switch patches to 3.14

This moves the patch series to 3.14.y  Everything was removed except for
lttng.  That patch was fixed to apply properly, but I have no if it
builds or works at all

Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

2512 files changed, 11 insertions, 334456 deletions

diff --git a/KERNEL_VERSION b/KERNEL_VERSION
index ab33b0b7366d2..0104088a93f37 100644
--- a/KERNEL_VERSION
+++ b/KERNEL_VERSION
@@ -1 +1 @@
-3.10.31
+3.14.4
diff --git a/patches.baytrail/0001-xhci-Refactor-port-status-into-a-new-function.patch b/patches.baytrail/0001-xhci-Refactor-port-status-into-a-new-function.patch
deleted file mode 100644
index b1a1b31ed65fb..0000000000000
--- a/patches.baytrail/0001-xhci-Refactor-port-status-into-a-new-function.patch
+++ /dev/null
@@ -1,253 +0,0 @@
-From a0e5974cd8eb63b95d53b73932035542cf56ca08 Mon Sep 17 00:00:00 2001
-From: Sarah Sharp <sarah.a.sharp@linux.intel.com>
-Date: Tue, 2 Apr 2013 08:42:20 -0700
-Subject: xhci: Refactor port status into a new function.
-
-The hub control function is *way* too long.  Refactor it into a new
-function, and document the side effects of calling that function.
-
-Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
-(cherry picked from commit eae5b17621d1053c81bec24e5dd5094bf50b31c6)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/usb/host/xhci-hub.c | 210 +++++++++++++++++++++++++-------------------
- 1 file changed, 119 insertions(+), 91 deletions(-)
-
-diff --git a/drivers/usb/host/xhci-hub.c b/drivers/usb/host/xhci-hub.c
-index 7cdcfd024744..458a89119aab 100644
---- a/drivers/usb/host/xhci-hub.c
-+++ b/drivers/usb/host/xhci-hub.c
-@@ -534,6 +534,118 @@ void xhci_del_comp_mod_timer(struct xhci_hcd *xhci, u32 status, u16 wIndex)
- 	}
- }
- 
-+/*
-+ * Converts a raw xHCI port status into the format that external USB 2.0 or USB
-+ * 3.0 hubs use.
-+ *
-+ * Possible side effects:
-+ *  - Mark a port as being done with device resume,
-+ *    and ring the endpoint doorbells.
-+ *  - Stop the Synopsys redriver Compliance Mode polling.
-+ */
-+static u32 xhci_get_port_status(struct usb_hcd *hcd,
-+		struct xhci_bus_state *bus_state,
-+		__le32 __iomem **port_array,
-+		u16 wIndex, u32 raw_port_status)
-+{
-+	struct xhci_hcd *xhci = hcd_to_xhci(hcd);
-+	u32 status = 0;
-+	int slot_id;
-+
-+	/* wPortChange bits */
-+	if (raw_port_status & PORT_CSC)
-+		status |= USB_PORT_STAT_C_CONNECTION << 16;
-+	if (raw_port_status & PORT_PEC)
-+		status |= USB_PORT_STAT_C_ENABLE << 16;
-+	if ((raw_port_status & PORT_OCC))
-+		status |= USB_PORT_STAT_C_OVERCURRENT << 16;
-+	if ((raw_port_status & PORT_RC))
-+		status |= USB_PORT_STAT_C_RESET << 16;
-+	/* USB3.0 only */
-+	if (hcd->speed == HCD_USB3) {
-+		if ((raw_port_status & PORT_PLC))
-+			status |= USB_PORT_STAT_C_LINK_STATE << 16;
-+		if ((raw_port_status & PORT_WRC))
-+			status |= USB_PORT_STAT_C_BH_RESET << 16;
-+	}
-+
-+	if (hcd->speed != HCD_USB3) {
-+		if ((raw_port_status & PORT_PLS_MASK) == XDEV_U3
-+				&& (raw_port_status & PORT_POWER))
-+			status |= USB_PORT_STAT_SUSPEND;
-+	}
-+	if ((raw_port_status & PORT_PLS_MASK) == XDEV_RESUME &&
-+			!DEV_SUPERSPEED(raw_port_status)) {
-+		if ((raw_port_status & PORT_RESET) ||
-+				!(raw_port_status & PORT_PE))
-+			return 0xffffffff;
-+		if (time_after_eq(jiffies,
-+					bus_state->resume_done[wIndex])) {
-+			xhci_dbg(xhci, "Resume USB2 port %d\n",
-+					wIndex + 1);
-+			bus_state->resume_done[wIndex] = 0;
-+			clear_bit(wIndex, &bus_state->resuming_ports);
-+			xhci_set_link_state(xhci, port_array, wIndex,
-+					XDEV_U0);
-+			xhci_dbg(xhci, "set port %d resume\n",
-+					wIndex + 1);
-+			slot_id = xhci_find_slot_id_by_port(hcd, xhci,
-+					wIndex + 1);
-+			if (!slot_id) {
-+				xhci_dbg(xhci, "slot_id is zero\n");
-+				return 0xffffffff;
-+			}
-+			xhci_ring_device(xhci, slot_id);
-+			bus_state->port_c_suspend |= 1 << wIndex;
-+			bus_state->suspended_ports &= ~(1 << wIndex);
-+		} else {
-+			/*
-+			 * The resume has been signaling for less than
-+			 * 20ms. Report the port status as SUSPEND,
-+			 * let the usbcore check port status again
-+			 * and clear resume signaling later.
-+			 */
-+			status |= USB_PORT_STAT_SUSPEND;
-+		}
-+	}
-+	if ((raw_port_status & PORT_PLS_MASK) == XDEV_U0
-+			&& (raw_port_status & PORT_POWER)
-+			&& (bus_state->suspended_ports & (1 << wIndex))) {
-+		bus_state->suspended_ports &= ~(1 << wIndex);
-+		if (hcd->speed != HCD_USB3)
-+			bus_state->port_c_suspend |= 1 << wIndex;
-+	}
-+	if (raw_port_status & PORT_CONNECT) {
-+		status |= USB_PORT_STAT_CONNECTION;
-+		status |= xhci_port_speed(raw_port_status);
-+	}
-+	if (raw_port_status & PORT_PE)
-+		status |= USB_PORT_STAT_ENABLE;
-+	if (raw_port_status & PORT_OC)
-+		status |= USB_PORT_STAT_OVERCURRENT;
-+	if (raw_port_status & PORT_RESET)
-+		status |= USB_PORT_STAT_RESET;
-+	if (raw_port_status & PORT_POWER) {
-+		if (hcd->speed == HCD_USB3)
-+			status |= USB_SS_PORT_STAT_POWER;
-+		else
-+			status |= USB_PORT_STAT_POWER;
-+	}
-+	/* Update Port Link State for super speed ports*/
-+	if (hcd->speed == HCD_USB3) {
-+		xhci_hub_report_link_state(&status, raw_port_status);
-+		/*
-+		 * Verify if all USB3 Ports Have entered U0 already.
-+		 * Delete Compliance Mode Timer if so.
-+		 */
-+		xhci_del_comp_mod_timer(xhci, raw_port_status, wIndex);
-+	}
-+	if (bus_state->port_c_suspend & (1 << wIndex))
-+		status |= 1 << USB_PORT_FEAT_C_SUSPEND;
-+
-+	return status;
-+}
-+
- int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
- 		u16 wIndex, char *buf, u16 wLength)
- {
-@@ -598,104 +710,20 @@ int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
- 		if (!wIndex || wIndex > max_ports)
- 			goto error;
- 		wIndex--;
--		status = 0;
- 		temp = xhci_readl(xhci, port_array[wIndex]);
- 		if (temp == 0xffffffff) {
- 			retval = -ENODEV;
- 			break;
- 		}
--		xhci_dbg(xhci, "get port status, actual port %d status  = 0x%x\n", wIndex, temp);
--
--		/* wPortChange bits */
--		if (temp & PORT_CSC)
--			status |= USB_PORT_STAT_C_CONNECTION << 16;
--		if (temp & PORT_PEC)
--			status |= USB_PORT_STAT_C_ENABLE << 16;
--		if ((temp & PORT_OCC))
--			status |= USB_PORT_STAT_C_OVERCURRENT << 16;
--		if ((temp & PORT_RC))
--			status |= USB_PORT_STAT_C_RESET << 16;
--		/* USB3.0 only */
--		if (hcd->speed == HCD_USB3) {
--			if ((temp & PORT_PLC))
--				status |= USB_PORT_STAT_C_LINK_STATE << 16;
--			if ((temp & PORT_WRC))
--				status |= USB_PORT_STAT_C_BH_RESET << 16;
--		}
-+		status = xhci_get_port_status(hcd, bus_state, port_array,
-+				wIndex, temp);
-+		if (status == 0xffffffff)
-+			goto error;
- 
--		if (hcd->speed != HCD_USB3) {
--			if ((temp & PORT_PLS_MASK) == XDEV_U3
--					&& (temp & PORT_POWER))
--				status |= USB_PORT_STAT_SUSPEND;
--		}
--		if ((temp & PORT_PLS_MASK) == XDEV_RESUME &&
--				!DEV_SUPERSPEED(temp)) {
--			if ((temp & PORT_RESET) || !(temp & PORT_PE))
--				goto error;
--			if (time_after_eq(jiffies,
--					bus_state->resume_done[wIndex])) {
--				xhci_dbg(xhci, "Resume USB2 port %d\n",
--					wIndex + 1);
--				bus_state->resume_done[wIndex] = 0;
--				clear_bit(wIndex, &bus_state->resuming_ports);
--				xhci_set_link_state(xhci, port_array, wIndex,
--							XDEV_U0);
--				xhci_dbg(xhci, "set port %d resume\n",
--					wIndex + 1);
--				slot_id = xhci_find_slot_id_by_port(hcd, xhci,
--								 wIndex + 1);
--				if (!slot_id) {
--					xhci_dbg(xhci, "slot_id is zero\n");
--					goto error;
--				}
--				xhci_ring_device(xhci, slot_id);
--				bus_state->port_c_suspend |= 1 << wIndex;
--				bus_state->suspended_ports &= ~(1 << wIndex);
--			} else {
--				/*
--				 * The resume has been signaling for less than
--				 * 20ms. Report the port status as SUSPEND,
--				 * let the usbcore check port status again
--				 * and clear resume signaling later.
--				 */
--				status |= USB_PORT_STAT_SUSPEND;
--			}
--		}
--		if ((temp & PORT_PLS_MASK) == XDEV_U0
--			&& (temp & PORT_POWER)
--			&& (bus_state->suspended_ports & (1 << wIndex))) {
--			bus_state->suspended_ports &= ~(1 << wIndex);
--			if (hcd->speed != HCD_USB3)
--				bus_state->port_c_suspend |= 1 << wIndex;
--		}
--		if (temp & PORT_CONNECT) {
--			status |= USB_PORT_STAT_CONNECTION;
--			status |= xhci_port_speed(temp);
--		}
--		if (temp & PORT_PE)
--			status |= USB_PORT_STAT_ENABLE;
--		if (temp & PORT_OC)
--			status |= USB_PORT_STAT_OVERCURRENT;
--		if (temp & PORT_RESET)
--			status |= USB_PORT_STAT_RESET;
--		if (temp & PORT_POWER) {
--			if (hcd->speed == HCD_USB3)
--				status |= USB_SS_PORT_STAT_POWER;
--			else
--				status |= USB_PORT_STAT_POWER;
--		}
--		/* Update Port Link State for super speed ports*/
--		if (hcd->speed == HCD_USB3) {
--			xhci_hub_report_link_state(&status, temp);
--			/*
--			 * Verify if all USB3 Ports Have entered U0 already.
--			 * Delete Compliance Mode Timer if so.
--			 */
--			xhci_del_comp_mod_timer(xhci, temp, wIndex);
--		}
--		if (bus_state->port_c_suspend & (1 << wIndex))
--			status |= 1 << USB_PORT_FEAT_C_SUSPEND;
-+		xhci_dbg(xhci, "get port status, actual port %d status  = 0x%x\n",
-+				wIndex, temp);
- 		xhci_dbg(xhci, "Get port status returned 0x%x\n", status);
-+
- 		put_unaligned(cpu_to_le32(status), (__le32 *) buf);
- 		break;
- 	case SetPortFeature:
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0002-usb-Fix-xHCI-host-issues-on-remote-wakeup.patch b/patches.baytrail/0002-usb-Fix-xHCI-host-issues-on-remote-wakeup.patch
deleted file mode 100644
index 8d1b2da008afb..0000000000000
--- a/patches.baytrail/0002-usb-Fix-xHCI-host-issues-on-remote-wakeup.patch
+++ /dev/null
@@ -1,198 +0,0 @@
-From 751f65aeec205eb72c33c07e8b7e50449d811ba9 Mon Sep 17 00:00:00 2001
-From: Sarah Sharp <sarah.a.sharp@linux.intel.com>
-Date: Tue, 20 Aug 2013 08:12:12 -0700
-Subject: usb: Fix xHCI host issues on remote wakeup.
-
-When a device signals remote wakeup on a roothub, and the suspend change
-bit is set, the host controller driver must not give control back to the
-USB core until the port goes back into the active state.
-
-EHCI accomplishes this by waiting in the get port status function until
-the PORT_RESUME bit is cleared:
-
-                        /* stop resume signaling */
-                        temp &= ~(PORT_RWC_BITS | PORT_SUSPEND | PORT_RESUME);
-                        ehci_writel(ehci, temp, status_reg);
-                        clear_bit(wIndex, &ehci->resuming_ports);
-                        retval = ehci_handshake(ehci, status_reg,
-                                        PORT_RESUME, 0, 2000 /* 2msec */);
-
-Similarly, the xHCI host should wait until the port goes into U0, before
-passing control up to the USB core.  When the port transitions from the
-RExit state to U0, the xHCI driver will get a port status change event.
-We need to wait for that event before passing control up to the USB
-core.
-
-After the port transitions to the active state, the USB core should time
-a recovery interval before it talks to the device.  The length of that
-recovery interval is TRSMRCY, 10 ms, mentioned in the USB 2.0 spec,
-section 7.1.7.7.  The previous xHCI code (which did not wait for the
-port to go into U0) would cause the USB core to violate that recovery
-interval.
-
-This bug caused numerous USB device disconnects on remote wakeup under
-ChromeOS and a Lynx Point LP xHCI host that takes up to 20 ms to move
-from RExit to U0.  ChromeOS is very aggressive about power savings, and
-sets the autosuspend_delay to 100 ms, and disables USB persist.
-
-I attempted to replicate this bug with Ubuntu 12.04, but could not.  I
-used Ubuntu 12.04 on the same platform, with the same BIOS that the bug
-was triggered on ChromeOS with.  I also changed the USB sysfs settings
-as described above, but still could not reproduce the bug under Ubuntu.
-It may be that ChromeOS userspace triggers this bug through additional
-settings.
-
-Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
-(cherry picked from commit 8b3d45705e54075cfb9d4212dbca9ea82c85c4b8)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/usb/host/xhci-hub.c  | 45 ++++++++++++++++++++++++++++++++++----------
- drivers/usb/host/xhci-mem.c  |  2 ++
- drivers/usb/host/xhci-ring.c | 13 +++++++++++++
- drivers/usb/host/xhci.h      | 10 ++++++++++
- 4 files changed, 60 insertions(+), 10 deletions(-)
-
-diff --git a/drivers/usb/host/xhci-hub.c b/drivers/usb/host/xhci-hub.c
-index 458a89119aab..1f94d42bcc56 100644
---- a/drivers/usb/host/xhci-hub.c
-+++ b/drivers/usb/host/xhci-hub.c
-@@ -542,11 +542,15 @@ void xhci_del_comp_mod_timer(struct xhci_hcd *xhci, u32 status, u16 wIndex)
-  *  - Mark a port as being done with device resume,
-  *    and ring the endpoint doorbells.
-  *  - Stop the Synopsys redriver Compliance Mode polling.
-+ *  - Drop and reacquire the xHCI lock, in order to wait for port resume.
-  */
- static u32 xhci_get_port_status(struct usb_hcd *hcd,
- 		struct xhci_bus_state *bus_state,
- 		__le32 __iomem **port_array,
--		u16 wIndex, u32 raw_port_status)
-+		u16 wIndex, u32 raw_port_status,
-+		unsigned long flags)
-+	__releases(&xhci->lock)
-+	__acquires(&xhci->lock)
- {
- 	struct xhci_hcd *xhci = hcd_to_xhci(hcd);
- 	u32 status = 0;
-@@ -581,21 +585,42 @@ static u32 xhci_get_port_status(struct usb_hcd *hcd,
- 			return 0xffffffff;
- 		if (time_after_eq(jiffies,
- 					bus_state->resume_done[wIndex])) {
-+			int time_left;
-+
- 			xhci_dbg(xhci, "Resume USB2 port %d\n",
- 					wIndex + 1);
- 			bus_state->resume_done[wIndex] = 0;
- 			clear_bit(wIndex, &bus_state->resuming_ports);
-+
-+			set_bit(wIndex, &bus_state->rexit_ports);
- 			xhci_set_link_state(xhci, port_array, wIndex,
- 					XDEV_U0);
--			xhci_dbg(xhci, "set port %d resume\n",
--					wIndex + 1);
--			slot_id = xhci_find_slot_id_by_port(hcd, xhci,
--					wIndex + 1);
--			if (!slot_id) {
--				xhci_dbg(xhci, "slot_id is zero\n");
--				return 0xffffffff;
-+
-+			spin_unlock_irqrestore(&xhci->lock, flags);
-+			time_left = wait_for_completion_timeout(
-+					&bus_state->rexit_done[wIndex],
-+					msecs_to_jiffies(
-+						XHCI_MAX_REXIT_TIMEOUT));
-+			spin_lock_irqsave(&xhci->lock, flags);
-+
-+			if (time_left) {
-+				slot_id = xhci_find_slot_id_by_port(hcd,
-+						xhci, wIndex + 1);
-+				if (!slot_id) {
-+					xhci_dbg(xhci, "slot_id is zero\n");
-+					return 0xffffffff;
-+				}
-+				xhci_ring_device(xhci, slot_id);
-+			} else {
-+				int port_status = xhci_readl(xhci,
-+						port_array[wIndex]);
-+				xhci_warn(xhci, "Port resume took longer than %i msec, port status = 0x%x\n",
-+						XHCI_MAX_REXIT_TIMEOUT,
-+						port_status);
-+				status |= USB_PORT_STAT_SUSPEND;
-+				clear_bit(wIndex, &bus_state->rexit_ports);
- 			}
--			xhci_ring_device(xhci, slot_id);
-+
- 			bus_state->port_c_suspend |= 1 << wIndex;
- 			bus_state->suspended_ports &= ~(1 << wIndex);
- 		} else {
-@@ -716,7 +741,7 @@ int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
- 			break;
- 		}
- 		status = xhci_get_port_status(hcd, bus_state, port_array,
--				wIndex, temp);
-+				wIndex, temp, flags);
- 		if (status == 0xffffffff)
- 			goto error;
- 
-diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c
-index f2e57a1112c9..19a0cc38b6d9 100644
---- a/drivers/usb/host/xhci-mem.c
-+++ b/drivers/usb/host/xhci-mem.c
-@@ -2448,6 +2448,8 @@ int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags)
- 	for (i = 0; i < USB_MAXCHILDREN; ++i) {
- 		xhci->bus_state[0].resume_done[i] = 0;
- 		xhci->bus_state[1].resume_done[i] = 0;
-+		/* Only the USB 2.0 completions will ever be used. */
-+		init_completion(&xhci->bus_state[1].rexit_done[i]);
- 	}
- 
- 	if (scratchpad_alloc(xhci, flags))
-diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c
-index bcfb08e41eb6..bfa24cd06b79 100644
---- a/drivers/usb/host/xhci-ring.c
-+++ b/drivers/usb/host/xhci-ring.c
-@@ -1732,6 +1732,19 @@ static void handle_port_status(struct xhci_hcd *xhci,
- 		}
- 	}
- 
-+	/*
-+	 * Check to see if xhci-hub.c is waiting on RExit to U0 transition (or
-+	 * RExit to a disconnect state).  If so, let the the driver know it's
-+	 * out of the RExit state.
-+	 */
-+	if (!DEV_SUPERSPEED(temp) &&
-+			test_and_clear_bit(faked_port_index,
-+				&bus_state->rexit_ports)) {
-+		complete(&bus_state->rexit_done[faked_port_index]);
-+		bogus_port_status = true;
-+		goto cleanup;
-+	}
-+
- 	if (hcd->speed != HCD_USB3)
- 		xhci_test_and_clear_bit(xhci, port_array, faked_port_index,
- 					PORT_PLC);
-diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h
-index 627fcd9388ca..cd35c1fc596f 100644
---- a/drivers/usb/host/xhci.h
-+++ b/drivers/usb/host/xhci.h
-@@ -1386,8 +1386,18 @@ struct xhci_bus_state {
- 	unsigned long		resume_done[USB_MAXCHILDREN];
- 	/* which ports have started to resume */
- 	unsigned long		resuming_ports;
-+	/* Which ports are waiting on RExit to U0 transition. */
-+	unsigned long		rexit_ports;
-+	struct completion	rexit_done[USB_MAXCHILDREN];
- };
- 
-+
-+/*
-+ * It can take up to 20 ms to transition from RExit to U0 on the
-+ * Intel Lynx Point LP xHCI host.
-+ */
-+#define	XHCI_MAX_REXIT_TIMEOUT	(20 * 1000)
-+
- static inline unsigned int hcd_index(struct usb_hcd *hcd)
- {
- 	if (hcd->speed == HCD_USB3)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0003-usb-xhci-check-usb2-port-capabilities-before-adding-.patch b/patches.baytrail/0003-usb-xhci-check-usb2-port-capabilities-before-adding-.patch
deleted file mode 100644
index 5a172886a4bfc..0000000000000
--- a/patches.baytrail/0003-usb-xhci-check-usb2-port-capabilities-before-adding-.patch
+++ /dev/null
@@ -1,162 +0,0 @@
-From 1c3285798797058421f167d3ae49b1d938d0dbc0 Mon Sep 17 00:00:00 2001
-From: Mathias Nyman <mathias.nyman@linux.intel.com>
-Date: Thu, 23 May 2013 17:14:28 +0300
-Subject: usb: xhci: check usb2 port capabilities before adding hw link PM
- support
-
-Hardware link powermanagement in usb2 is a per-port capability.
-Previously support for hw lpm was enabled for all ports if any usb2 port supported it.
-
-Now instead cache the capability values and check them for each port individually
-
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
-(cherry picked from commit b630d4b9d05ba2e66878ca4614946d0f950d4111)
-Signed-off-by: Benson Leung <bleung@chromium.org>
-
-
-Reviewed-on: https://chromium-review.googlesource.com/169210
-Reviewed-by: Julius Werner <jwerner@chromium.org>
-Commit-Queue: Benson Leung <bleung@chromium.org>
-Tested-by: Benson Leung <bleung@chromium.org>
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/usb/host/xhci-mem.c |   33 +++++++++++++++++++++++++++++----
- drivers/usb/host/xhci.c     |   27 ++++++++++++++++++++++++++-
- drivers/usb/host/xhci.h     |    3 +++
- 3 files changed, 58 insertions(+), 5 deletions(-)
-
---- a/drivers/usb/host/xhci-mem.c
-+++ b/drivers/usb/host/xhci-mem.c
-@@ -1860,6 +1860,7 @@ no_bw:
- 	kfree(xhci->usb3_ports);
- 	kfree(xhci->port_array);
- 	kfree(xhci->rh_bw);
-+	kfree(xhci->ext_caps);
- 
- 	xhci->page_size = 0;
- 	xhci->page_shift = 0;
-@@ -2047,7 +2048,7 @@ static void xhci_set_hc_event_deq(struct
- }
- 
- static void xhci_add_in_port(struct xhci_hcd *xhci, unsigned int num_ports,
--		__le32 __iomem *addr, u8 major_revision)
-+		__le32 __iomem *addr, u8 major_revision, int max_caps)
- {
- 	u32 temp, port_offset, port_count;
- 	int i;
-@@ -2072,6 +2073,10 @@ static void xhci_add_in_port(struct xhci
- 		/* WTF? "Valid values are ‘1’ to MaxPorts" */
- 		return;
- 
-+	/* cache usb2 port capabilities */
-+	if (major_revision < 0x03 && xhci->num_ext_caps < max_caps)
-+		xhci->ext_caps[xhci->num_ext_caps++] = temp;
-+
- 	/* Check the host's USB2 LPM capability */
- 	if ((xhci->hci_version == 0x96) && (major_revision != 0x03) &&
- 			(temp & XHCI_L1C)) {
-@@ -2129,10 +2134,11 @@ static void xhci_add_in_port(struct xhci
-  */
- static int xhci_setup_port_arrays(struct xhci_hcd *xhci, gfp_t flags)
- {
--	__le32 __iomem *addr;
--	u32 offset;
-+	__le32 __iomem *addr, *tmp_addr;
-+	u32 offset, tmp_offset;
- 	unsigned int num_ports;
- 	int i, j, port_index;
-+	int cap_count = 0;
- 
- 	addr = &xhci->cap_regs->hcc_params;
- 	offset = XHCI_HCC_EXT_CAPS(xhci_readl(xhci, addr));
-@@ -2165,13 +2171,32 @@ static int xhci_setup_port_arrays(struct
- 	 * See section 5.3.6 for offset calculation.
- 	 */
- 	addr = &xhci->cap_regs->hc_capbase + offset;
-+
-+	tmp_addr = addr;
-+	tmp_offset = offset;
-+
-+	/* count extended protocol capability entries for later caching */
-+	do {
-+		u32 cap_id;
-+		cap_id = xhci_readl(xhci, tmp_addr);
-+		if (XHCI_EXT_CAPS_ID(cap_id) == XHCI_EXT_CAPS_PROTOCOL)
-+			cap_count++;
-+		tmp_offset = XHCI_EXT_CAPS_NEXT(cap_id);
-+		tmp_addr += tmp_offset;
-+	} while (tmp_offset);
-+
-+	xhci->ext_caps = kzalloc(sizeof(*xhci->ext_caps) * cap_count, flags);
-+	if (!xhci->ext_caps)
-+		return -ENOMEM;
-+
- 	while (1) {
- 		u32 cap_id;
- 
- 		cap_id = xhci_readl(xhci, addr);
- 		if (XHCI_EXT_CAPS_ID(cap_id) == XHCI_EXT_CAPS_PROTOCOL)
- 			xhci_add_in_port(xhci, num_ports, addr,
--					(u8) XHCI_EXT_PORT_MAJOR(cap_id));
-+					(u8) XHCI_EXT_PORT_MAJOR(cap_id),
-+					cap_count);
- 		offset = XHCI_EXT_CAPS_NEXT(cap_id);
- 		if (!offset || (xhci->num_usb2_ports + xhci->num_usb3_ports)
- 				== num_ports)
---- a/drivers/usb/host/xhci.c
-+++ b/drivers/usb/host/xhci.c
-@@ -4048,15 +4048,40 @@ int xhci_set_usb2_hardware_lpm(struct us
- 	return 0;
- }
- 
-+/* check if a usb2 port supports a given extened capability protocol
-+ * only USB2 ports extended protocol capability values are cached.
-+ * Return 1 if capability is supported
-+ */
-+static int xhci_check_usb2_port_capability(struct xhci_hcd *xhci, int port,
-+					   unsigned capability)
-+{
-+	u32 port_offset, port_count;
-+	int i;
-+
-+	for (i = 0; i < xhci->num_ext_caps; i++) {
-+		if (xhci->ext_caps[i] & capability) {
-+			/* port offsets starts at 1 */
-+			port_offset = XHCI_EXT_PORT_OFF(xhci->ext_caps[i]) - 1;
-+			port_count = XHCI_EXT_PORT_COUNT(xhci->ext_caps[i]);
-+			if (port >= port_offset &&
-+			    port < port_offset + port_count)
-+				return 1;
-+		}
-+	}
-+	return 0;
-+}
-+
- int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
- {
- 	struct xhci_hcd	*xhci = hcd_to_xhci(hcd);
- 	int		ret;
-+	int		portnum = udev->portnum - 1;
- 
- 	ret = xhci_usb2_software_lpm_test(hcd, udev);
- 	if (!ret) {
- 		xhci_dbg(xhci, "software LPM test succeed\n");
--		if (xhci->hw_lpm_support == 1) {
-+		if (xhci->hw_lpm_support == 1 &&
-+		    xhci_check_usb2_port_capability(xhci, portnum, XHCI_HLC)) {
- 			udev->usb2_hw_lpm_capable = 1;
- 			ret = xhci_set_usb2_hardware_lpm(hcd, udev, 1);
- 			if (!ret)
---- a/drivers/usb/host/xhci.h
-+++ b/drivers/usb/host/xhci.h
-@@ -1543,6 +1543,9 @@ struct xhci_hcd {
- 	unsigned		sw_lpm_support:1;
- 	/* support xHCI 1.0 spec USB2 hardware LPM */
- 	unsigned		hw_lpm_support:1;
-+	/* cached usb2 extened protocol capabilites */
-+	u32                     *ext_caps;
-+	unsigned int            num_ext_caps;
- 	/* Compliance Mode Recovery Data */
- 	struct timer_list	comp_mode_recovery_timer;
- 	u32			port_status_u0;
diff --git a/patches.baytrail/0004-usb-xhci-define-port-register-names-and-use-them-ins.patch b/patches.baytrail/0004-usb-xhci-define-port-register-names-and-use-them-ins.patch
deleted file mode 100644
index 6c5604d419253..0000000000000
--- a/patches.baytrail/0004-usb-xhci-define-port-register-names-and-use-them-ins.patch
+++ /dev/null
@@ -1,104 +0,0 @@
-From d3690dac4e91a369c27937ac93dcf9a503ad2ada Mon Sep 17 00:00:00 2001
-From: Mathias Nyman <mathias.nyman@linux.intel.com>
-Date: Thu, 23 May 2013 17:14:29 +0300
-Subject: usb: xhci: define port register names and use them instead of magic
- numbers
-
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
-(cherry picked from commit b6e76371c888f5cb677f190a28444ac8875359ad)
-Signed-off-by: Benson Leung <bleung@chromium.org>
-
-
-Reviewed-on: https://chromium-review.googlesource.com/169211
-Reviewed-by: Julius Werner <jwerner@chromium.org>
-Commit-Queue: Benson Leung <bleung@chromium.org>
-Tested-by: Benson Leung <bleung@chromium.org>
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/usb/host/xhci-hub.c |   16 +++++++---------
- drivers/usb/host/xhci.c     |    4 ++--
- drivers/usb/host/xhci.h     |    5 +++++
- 3 files changed, 14 insertions(+), 11 deletions(-)
-
---- a/drivers/usb/host/xhci-hub.c
-+++ b/drivers/usb/host/xhci-hub.c
-@@ -920,18 +920,18 @@ int xhci_hub_control(struct usb_hcd *hcd
- 		case USB_PORT_FEAT_U1_TIMEOUT:
- 			if (hcd->speed != HCD_USB3)
- 				goto error;
--			temp = xhci_readl(xhci, port_array[wIndex] + 1);
-+			temp = xhci_readl(xhci, port_array[wIndex] + PORTPMSC);
- 			temp &= ~PORT_U1_TIMEOUT_MASK;
- 			temp |= PORT_U1_TIMEOUT(timeout);
--			xhci_writel(xhci, temp, port_array[wIndex] + 1);
-+			xhci_writel(xhci, temp, port_array[wIndex] + PORTPMSC);
- 			break;
- 		case USB_PORT_FEAT_U2_TIMEOUT:
- 			if (hcd->speed != HCD_USB3)
- 				goto error;
--			temp = xhci_readl(xhci, port_array[wIndex] + 1);
-+			temp = xhci_readl(xhci, port_array[wIndex] + PORTPMSC);
- 			temp &= ~PORT_U2_TIMEOUT_MASK;
- 			temp |= PORT_U2_TIMEOUT(timeout);
--			xhci_writel(xhci, temp, port_array[wIndex] + 1);
-+			xhci_writel(xhci, temp, port_array[wIndex] + PORTPMSC);
- 			break;
- 		default:
- 			goto error;
-@@ -1151,10 +1151,8 @@ int xhci_bus_suspend(struct usb_hcd *hcd
- 			__le32 __iomem *addr;
- 			u32 tmp;
- 
--			/* Add one to the port status register address to get
--			 * the port power control register address.
--			 */
--			addr = port_array[port_index] + 1;
-+			/* Get the port power control register address. */
-+			addr = port_array[port_index] + PORTPMSC;
- 			tmp = xhci_readl(xhci, addr);
- 			tmp |= PORT_RWE;
- 			xhci_writel(xhci, tmp, addr);
-@@ -1246,7 +1244,7 @@ int xhci_bus_resume(struct usb_hcd *hcd)
- 			/* Add one to the port status register address to get
- 			 * the port power control register address.
- 			 */
--			addr = port_array[port_index] + 1;
-+			addr = port_array[port_index] + PORTPMSC;
- 			tmp = xhci_readl(xhci, addr);
- 			tmp &= ~PORT_RWE;
- 			xhci_writel(xhci, tmp, addr);
---- a/drivers/usb/host/xhci.c
-+++ b/drivers/usb/host/xhci.c
-@@ -3926,7 +3926,7 @@ static int xhci_usb2_software_lpm_test(s
- 	 * Check device's USB 2.0 extension descriptor to determine whether
- 	 * HIRD or BESL shoule be used. See USB2.0 LPM errata.
- 	 */
--	pm_addr = port_array[port_num] + 1;
-+	pm_addr = port_array[port_num] + PORTPMSC;
- 	hird = xhci_calculate_hird_besl(xhci, udev);
- 	temp = PORT_L1DS(udev->slot_id) | PORT_HIRD(hird);
- 	xhci_writel(xhci, temp, pm_addr);
-@@ -4024,7 +4024,7 @@ int xhci_set_usb2_hardware_lpm(struct us
- 
- 	port_array = xhci->usb2_ports;
- 	port_num = udev->portnum - 1;
--	pm_addr = port_array[port_num] + 1;
-+	pm_addr = port_array[port_num] + PORTPMSC;
- 	temp = xhci_readl(xhci, pm_addr);
- 
- 	xhci_dbg(xhci, "%s port %d USB2 hardware LPM\n",
---- a/drivers/usb/host/xhci.h
-+++ b/drivers/usb/host/xhci.h
-@@ -132,6 +132,11 @@ struct xhci_cap_regs {
- /* Number of registers per port */
- #define	NUM_PORT_REGS	4
- 
-+#define PORTSC		0
-+#define PORTPMSC	1
-+#define PORTLI		2
-+#define PORTHLPMC	3
-+
- /**
-  * struct xhci_op_regs - xHCI Host Controller Operational Registers.
-  * @command:		USBCMD - xHC command register
diff --git a/patches.baytrail/0005-usb-xhci-add-USB2-Link-power-management-BESL-support.patch b/patches.baytrail/0005-usb-xhci-add-USB2-Link-power-management-BESL-support.patch
deleted file mode 100644
index 3cd7d358f942f..0000000000000
--- a/patches.baytrail/0005-usb-xhci-add-USB2-Link-power-management-BESL-support.patch
+++ /dev/null
@@ -1,345 +0,0 @@
-From 4294a2f541d0910fe8ce152c00b48ed021fe3e20 Mon Sep 17 00:00:00 2001
-From: Mathias Nyman <mathias.nyman@linux.intel.com>
-Date: Thu, 23 May 2013 17:14:30 +0300
-Subject: usb: xhci: add USB2 Link power management BESL support
-
-usb 2.0 devices with link power managment (LPM) can describe their idle link
-timeouts either in BESL or HIRD format, so far xHCI has only supported HIRD but
-later xHCI errata add BESL support as well
-
-BESL timeouts need to inform exit latency changes with an evaluate
-context command the same way USB 3.0 link PM code does.
-The same xhci_change_max_exit_latency() function is used as with USB3
-but code is pulled out from #ifdef CONFIG_PM as USB2.0 BESL LPM
-funcionality does not depend on CONFIG_PM.
-
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
-(cherry picked from commit a558ccdcc71c7770c5e80c926a31cfe8a3892a09)
-Signed-off-by: Benson Leung <bleung@chromium.org>
-
-
-[bleung : 3.10 rebase. Remove BACKPORT version of this patch for
- UPSTREAM]
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/usb/host/xhci-ext-caps.h |    1 
- drivers/usb/host/xhci.c          |  204 ++++++++++++++++++++++++++-------------
- drivers/usb/host/xhci.h          |   21 ++++
- include/linux/usb.h              |    2 
- 4 files changed, 164 insertions(+), 64 deletions(-)
-
---- a/drivers/usb/host/xhci-ext-caps.h
-+++ b/drivers/usb/host/xhci-ext-caps.h
-@@ -71,6 +71,7 @@
- 
- /* USB 2.0 xHCI 1.0 hardware LMP capability - section 7.2.2.1.3.2 */
- #define XHCI_HLC               (1 << 19)
-+#define XHCI_BLC               (1 << 19)
- 
- /* command register values to disable interrupts and halt the HC */
- /* start/stop HC execution - do not write unless HC is halted*/
---- a/drivers/usb/host/xhci.c
-+++ b/drivers/usb/host/xhci.c
-@@ -3830,6 +3830,56 @@ int xhci_find_raw_port_number(struct usb
- 	return raw_port;
- }
- 
-+/*
-+ * Issue an Evaluate Context command to change the Maximum Exit Latency in the
-+ * slot context.  If that succeeds, store the new MEL in the xhci_virt_device.
-+ */
-+static int xhci_change_max_exit_latency(struct xhci_hcd *xhci,
-+			struct usb_device *udev, u16 max_exit_latency)
-+{
-+	struct xhci_virt_device *virt_dev;
-+	struct xhci_command *command;
-+	struct xhci_input_control_ctx *ctrl_ctx;
-+	struct xhci_slot_ctx *slot_ctx;
-+	unsigned long flags;
-+	int ret;
-+
-+	spin_lock_irqsave(&xhci->lock, flags);
-+	if (max_exit_latency == xhci->devs[udev->slot_id]->current_mel) {
-+		spin_unlock_irqrestore(&xhci->lock, flags);
-+		return 0;
-+	}
-+
-+	/* Attempt to issue an Evaluate Context command to change the MEL. */
-+	virt_dev = xhci->devs[udev->slot_id];
-+	command = xhci->lpm_command;
-+	xhci_slot_copy(xhci, command->in_ctx, virt_dev->out_ctx);
-+	spin_unlock_irqrestore(&xhci->lock, flags);
-+
-+	ctrl_ctx = xhci_get_input_control_ctx(xhci, command->in_ctx);
-+	ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
-+	slot_ctx = xhci_get_slot_ctx(xhci, command->in_ctx);
-+	slot_ctx->dev_info2 &= cpu_to_le32(~((u32) MAX_EXIT));
-+	slot_ctx->dev_info2 |= cpu_to_le32(max_exit_latency);
-+
-+	xhci_dbg(xhci, "Set up evaluate context for LPM MEL change.\n");
-+	xhci_dbg(xhci, "Slot %u Input Context:\n", udev->slot_id);
-+	xhci_dbg_ctx(xhci, command->in_ctx, 0);
-+
-+	/* Issue and wait for the evaluate context command. */
-+	ret = xhci_configure_endpoint(xhci, udev, command,
-+			true, true);
-+	xhci_dbg(xhci, "Slot %u Output Context:\n", udev->slot_id);
-+	xhci_dbg_ctx(xhci, virt_dev->out_ctx, 0);
-+
-+	if (!ret) {
-+		spin_lock_irqsave(&xhci->lock, flags);
-+		virt_dev->current_mel = max_exit_latency;
-+		spin_unlock_irqrestore(&xhci->lock, flags);
-+	}
-+	return ret;
-+}
-+
- #ifdef CONFIG_PM_RUNTIME
- 
- /* BESL to HIRD Encoding array for USB2 LPM */
-@@ -3871,6 +3921,28 @@ static int xhci_calculate_hird_besl(stru
- 	return besl;
- }
- 
-+/* Calculate BESLD, L1 timeout and HIRDM for USB2 PORTHLPMC */
-+static int xhci_calculate_usb2_hw_lpm_params(struct usb_device *udev)
-+{
-+	u32 field;
-+	int l1;
-+	int besld = 0;
-+	int hirdm = 0;
-+
-+	field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
-+
-+	/* xHCI l1 is set in steps of 256us, xHCI 1.0 section 5.4.11.2 */
-+	l1 = XHCI_L1_TIMEOUT / 256;
-+
-+	/* device has preferred BESLD */
-+	if (field & USB_BESL_DEEP_VALID) {
-+		besld = USB_GET_BESL_DEEP(field);
-+		hirdm = 1;
-+	}
-+
-+	return PORT_BESLD(besld) | PORT_L1_TIMEOUT(l1) | PORT_HIRDM(hirdm);
-+}
-+
- static int xhci_usb2_software_lpm_test(struct usb_hcd *hcd,
- 					struct usb_device *udev)
- {
-@@ -4003,11 +4075,12 @@ int xhci_set_usb2_hardware_lpm(struct us
- {
- 	struct xhci_hcd	*xhci = hcd_to_xhci(hcd);
- 	__le32 __iomem	**port_array;
--	__le32 __iomem	*pm_addr;
--	u32		temp;
-+	__le32 __iomem	*pm_addr, *hlpm_addr;
-+	u32		pm_val, hlpm_val, field;
- 	unsigned int	port_num;
- 	unsigned long	flags;
--	int		hird;
-+	int		hird, exit_latency;
-+	int		ret;
- 
- 	if (hcd->speed == HCD_USB3 || !xhci->hw_lpm_support ||
- 			!udev->lpm_capable)
-@@ -4025,23 +4098,73 @@ int xhci_set_usb2_hardware_lpm(struct us
- 	port_array = xhci->usb2_ports;
- 	port_num = udev->portnum - 1;
- 	pm_addr = port_array[port_num] + PORTPMSC;
--	temp = xhci_readl(xhci, pm_addr);
-+	pm_val = xhci_readl(xhci, pm_addr);
-+	hlpm_addr = port_array[port_num] + PORTHLPMC;
-+	field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
- 
- 	xhci_dbg(xhci, "%s port %d USB2 hardware LPM\n",
- 			enable ? "enable" : "disable", port_num);
- 
--	hird = xhci_calculate_hird_besl(xhci, udev);
--
- 	if (enable) {
--		temp &= ~PORT_HIRD_MASK;
--		temp |= PORT_HIRD(hird) | PORT_RWE;
--		xhci_writel(xhci, temp, pm_addr);
--		temp = xhci_readl(xhci, pm_addr);
--		temp |= PORT_HLE;
--		xhci_writel(xhci, temp, pm_addr);
-+		/* Host supports BESL timeout instead of HIRD */
-+		if (udev->usb2_hw_lpm_besl_capable) {
-+			/* if device doesn't have a preferred BESL value use a
-+			 * default one which works with mixed HIRD and BESL
-+			 * systems. See XHCI_DEFAULT_BESL definition in xhci.h
-+			 */
-+			if ((field & USB_BESL_SUPPORT) &&
-+			    (field & USB_BESL_BASELINE_VALID))
-+				hird = USB_GET_BESL_BASELINE(field);
-+			else
-+				hird = XHCI_DEFAULT_BESL;
-+
-+			exit_latency = xhci_besl_encoding[hird];
-+			spin_unlock_irqrestore(&xhci->lock, flags);
-+
-+			/* USB 3.0 code dedicate one xhci->lpm_command->in_ctx
-+			 * input context for link powermanagement evaluate
-+			 * context commands. It is protected by hcd->bandwidth
-+			 * mutex and is shared by all devices. We need to set
-+			 * the max ext latency in USB 2 BESL LPM as well, so
-+			 * use the same mutex and xhci_change_max_exit_latency()
-+			 */
-+			mutex_lock(hcd->bandwidth_mutex);
-+			ret = xhci_change_max_exit_latency(xhci, udev,
-+							   exit_latency);
-+			mutex_unlock(hcd->bandwidth_mutex);
-+
-+			if (ret < 0)
-+				return ret;
-+			spin_lock_irqsave(&xhci->lock, flags);
-+
-+			hlpm_val = xhci_calculate_usb2_hw_lpm_params(udev);
-+			xhci_writel(xhci, hlpm_val, hlpm_addr);
-+			/* flush write */
-+			xhci_readl(xhci, hlpm_addr);
-+		} else {
-+			hird = xhci_calculate_hird_besl(xhci, udev);
-+		}
-+
-+		pm_val &= ~PORT_HIRD_MASK;
-+		pm_val |= PORT_HIRD(hird) | PORT_RWE;
-+		xhci_writel(xhci, pm_val, pm_addr);
-+		pm_val = xhci_readl(xhci, pm_addr);
-+		pm_val |= PORT_HLE;
-+		xhci_writel(xhci, pm_val, pm_addr);
-+		/* flush write */
-+		xhci_readl(xhci, pm_addr);
- 	} else {
--		temp &= ~(PORT_HLE | PORT_RWE | PORT_HIRD_MASK);
--		xhci_writel(xhci, temp, pm_addr);
-+		pm_val &= ~(PORT_HLE | PORT_RWE | PORT_HIRD_MASK);
-+		xhci_writel(xhci, pm_val, pm_addr);
-+		/* flush write */
-+		xhci_readl(xhci, pm_addr);
-+		if (udev->usb2_hw_lpm_besl_capable) {
-+			spin_unlock_irqrestore(&xhci->lock, flags);
-+			mutex_lock(hcd->bandwidth_mutex);
-+			xhci_change_max_exit_latency(xhci, udev, 0);
-+			mutex_unlock(hcd->bandwidth_mutex);
-+			return 0;
-+		}
- 	}
- 
- 	spin_unlock_irqrestore(&xhci->lock, flags);
-@@ -4083,6 +4206,9 @@ int xhci_update_device(struct usb_hcd *h
- 		if (xhci->hw_lpm_support == 1 &&
- 		    xhci_check_usb2_port_capability(xhci, portnum, XHCI_HLC)) {
- 			udev->usb2_hw_lpm_capable = 1;
-+			if (xhci_check_usb2_port_capability(xhci, portnum,
-+							    XHCI_BLC))
-+				udev->usb2_hw_lpm_besl_capable = 1;
- 			ret = xhci_set_usb2_hardware_lpm(hcd, udev, 1);
- 			if (!ret)
- 				udev->usb2_hw_lpm_enabled = 1;
-@@ -4413,56 +4539,6 @@ static u16 xhci_calculate_lpm_timeout(st
- 	return timeout;
- }
- 
--/*
-- * Issue an Evaluate Context command to change the Maximum Exit Latency in the
-- * slot context.  If that succeeds, store the new MEL in the xhci_virt_device.
-- */
--static int xhci_change_max_exit_latency(struct xhci_hcd *xhci,
--			struct usb_device *udev, u16 max_exit_latency)
--{
--	struct xhci_virt_device *virt_dev;
--	struct xhci_command *command;
--	struct xhci_input_control_ctx *ctrl_ctx;
--	struct xhci_slot_ctx *slot_ctx;
--	unsigned long flags;
--	int ret;
--
--	spin_lock_irqsave(&xhci->lock, flags);
--	if (max_exit_latency == xhci->devs[udev->slot_id]->current_mel) {
--		spin_unlock_irqrestore(&xhci->lock, flags);
--		return 0;
--	}
--
--	/* Attempt to issue an Evaluate Context command to change the MEL. */
--	virt_dev = xhci->devs[udev->slot_id];
--	command = xhci->lpm_command;
--	xhci_slot_copy(xhci, command->in_ctx, virt_dev->out_ctx);
--	spin_unlock_irqrestore(&xhci->lock, flags);
--
--	ctrl_ctx = xhci_get_input_control_ctx(xhci, command->in_ctx);
--	ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
--	slot_ctx = xhci_get_slot_ctx(xhci, command->in_ctx);
--	slot_ctx->dev_info2 &= cpu_to_le32(~((u32) MAX_EXIT));
--	slot_ctx->dev_info2 |= cpu_to_le32(max_exit_latency);
--
--	xhci_dbg(xhci, "Set up evaluate context for LPM MEL change.\n");
--	xhci_dbg(xhci, "Slot %u Input Context:\n", udev->slot_id);
--	xhci_dbg_ctx(xhci, command->in_ctx, 0);
--
--	/* Issue and wait for the evaluate context command. */
--	ret = xhci_configure_endpoint(xhci, udev, command,
--			true, true);
--	xhci_dbg(xhci, "Slot %u Output Context:\n", udev->slot_id);
--	xhci_dbg_ctx(xhci, virt_dev->out_ctx, 0);
--
--	if (!ret) {
--		spin_lock_irqsave(&xhci->lock, flags);
--		virt_dev->current_mel = max_exit_latency;
--		spin_unlock_irqrestore(&xhci->lock, flags);
--	}
--	return ret;
--}
--
- static int calculate_max_exit_latency(struct usb_device *udev,
- 		enum usb3_link_state state_changed,
- 		u16 hub_encoded_timeout)
---- a/drivers/usb/host/xhci.h
-+++ b/drivers/usb/host/xhci.h
-@@ -386,6 +386,27 @@ struct xhci_op_regs {
- #define	PORT_L1DS(p)		(((p) & 0xff) << 8)
- #define	PORT_HLE		(1 << 16)
- 
-+
-+/* USB2 Protocol PORTHLPMC */
-+#define PORT_HIRDM(p)((p) & 3)
-+#define PORT_L1_TIMEOUT(p)(((p) & 0xff) << 2)
-+#define PORT_BESLD(p)(((p) & 0xf) << 10)
-+
-+/* use 512 microseconds as USB2 LPM L1 default timeout. */
-+#define XHCI_L1_TIMEOUT		512
-+
-+/* Set default HIRD/BESL value to 4 (350/400us) for USB2 L1 LPM resume latency.
-+ * Safe to use with mixed HIRD and BESL systems (host and device) and is used
-+ * by other operating systems.
-+ *
-+ * XHCI 1.0 errata 8/14/12 Table 13 notes:
-+ * "Software should choose xHC BESL/BESLD field values that do not violate a
-+ * device's resume latency requirements,
-+ * e.g. not program values > '4' if BLC = '1' and a HIRD device is attached,
-+ * or not program values < '4' if BLC = '0' and a BESL device is attached.
-+ */
-+#define XHCI_DEFAULT_BESL	4
-+
- /**
-  * struct xhci_intr_reg - Interrupt Register Set
-  * @irq_pending:	IMAN - Interrupt Management Register.  Used to enable
---- a/include/linux/usb.h
-+++ b/include/linux/usb.h
-@@ -468,6 +468,7 @@ struct usb3_lpm_parameters {
-  * @wusb: device is Wireless USB
-  * @lpm_capable: device supports LPM
-  * @usb2_hw_lpm_capable: device can perform USB2 hardware LPM
-+ * @usb2_hw_lpm_besl_capable: device can perform USB2 hardware BESL LPM
-  * @usb2_hw_lpm_enabled: USB2 hardware LPM enabled
-  * @usb3_lpm_enabled: USB3 hardware LPM enabled
-  * @string_langid: language ID for strings
-@@ -538,6 +539,7 @@ struct usb_device {
- 	unsigned wusb:1;
- 	unsigned lpm_capable:1;
- 	unsigned usb2_hw_lpm_capable:1;
-+	unsigned usb2_hw_lpm_besl_capable:1;
- 	unsigned usb2_hw_lpm_enabled:1;
- 	unsigned usb3_lpm_enabled:1;
- 	int string_langid;
diff --git a/patches.baytrail/0006-usb-add-usb2-Link-PM-variables-to-sysfs-and-usb_devi.patch b/patches.baytrail/0006-usb-add-usb2-Link-PM-variables-to-sysfs-and-usb_devi.patch
deleted file mode 100644
index 2133d812459c0..0000000000000
--- a/patches.baytrail/0006-usb-add-usb2-Link-PM-variables-to-sysfs-and-usb_devi.patch
+++ /dev/null
@@ -1,197 +0,0 @@
-From d9bcaf6868ca8f304dd76246251154cfd2bd0b50 Mon Sep 17 00:00:00 2001
-From: Mathias Nyman <mathias.nyman@linux.intel.com>
-Date: Thu, 23 May 2013 17:14:31 +0300
-Subject: usb: add usb2 Link PM variables to sysfs and usb_device
-
-Adds abitilty to tune L1 timeout (inactivity timer for usb2 link sleep)
-and BESL (best effort service latency)via sysfs.
-
-This also adds a new usb2_lpm_parameters structure with those variables to
-struct usb_device.
-
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
-(cherry picked from commit 17f34867e98d2fb0c03918faab79efb989fa134b)
-Signed-off-by: Benson Leung <bleung@chromium.org>
-
-
-Reviewed-on: https://chromium-review.googlesource.com/169213
-Reviewed-by: Julius Werner <jwerner@chromium.org>
-Commit-Queue: Benson Leung <bleung@chromium.org>
-Tested-by: Benson Leung <bleung@chromium.org>
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- Documentation/ABI/testing/sysfs-bus-usb |   27 ++++++++++++++++
- drivers/usb/core/sysfs.c                |   54 ++++++++++++++++++++++++++++++++
- drivers/usb/host/xhci.c                 |    6 ++-
- include/linux/usb.h                     |   18 ++++++++++
- 4 files changed, 103 insertions(+), 2 deletions(-)
-
---- a/Documentation/ABI/testing/sysfs-bus-usb
-+++ b/Documentation/ABI/testing/sysfs-bus-usb
-@@ -236,3 +236,30 @@ Description:
- 		This attribute is to expose these information to user space.
- 		The file will read "hotplug", "wired" and "not used" if the
- 		information is available, and "unknown" otherwise.
-+
-+What:		/sys/bus/usb/devices/.../power/usb2_lpm_l1_timeout
-+Date:		May 2013
-+Contact:	Mathias Nyman <mathias.nyman@linux.intel.com>
-+Description:
-+		USB 2.0 devices may support hardware link power management (LPM)
-+		L1 sleep state. The usb2_lpm_l1_timeout attribute allows
-+		tuning the timeout for L1 inactivity timer (LPM timer), e.g.
-+		needed inactivity time before host requests the device to go to L1 sleep.
-+		Useful for power management tuning.
-+		Supported values are 0 - 65535 microseconds.
-+
-+What:		/sys/bus/usb/devices/.../power/usb2_lpm_besl
-+Date:		May 2013
-+Contact:	Mathias Nyman <mathias.nyman@linux.intel.com>
-+Description:
-+		USB 2.0 devices that support hardware link power management (LPM)
-+		L1 sleep state now use a best effort service latency value (BESL) to
-+		indicate the best effort to resumption of service to the device after the
-+		initiation of the resume event.
-+		If the device does not have a preferred besl value then the host can select
-+		one instead. This usb2_lpm_besl attribute allows to tune the host selected besl
-+		value in order to tune power saving and service latency.
-+
-+		Supported values are 0 - 15.
-+		More information on how besl values map to microseconds can be found in
-+		USB 2.0 ECN Errata for Link Power Management, section 4.10)
---- a/drivers/usb/core/sysfs.c
-+++ b/drivers/usb/core/sysfs.c
-@@ -497,8 +497,62 @@ set_usb2_hardware_lpm(struct device *dev
- static DEVICE_ATTR(usb2_hardware_lpm, S_IRUGO | S_IWUSR, show_usb2_hardware_lpm,
- 			set_usb2_hardware_lpm);
- 
-+static ssize_t
-+show_usb2_lpm_l1_timeout(struct device *dev, struct device_attribute *attr,
-+			 char *buf)
-+{
-+	struct usb_device *udev = to_usb_device(dev);
-+	return sprintf(buf, "%d\n", udev->l1_params.timeout);
-+}
-+
-+static ssize_t
-+set_usb2_lpm_l1_timeout(struct device *dev, struct device_attribute *attr,
-+			const char *buf, size_t count)
-+{
-+	struct usb_device *udev = to_usb_device(dev);
-+	u16 timeout;
-+
-+	if (kstrtou16(buf, 0, &timeout))
-+		return -EINVAL;
-+
-+	udev->l1_params.timeout = timeout;
-+
-+	return count;
-+}
-+
-+static DEVICE_ATTR(usb2_lpm_l1_timeout, S_IRUGO | S_IWUSR,
-+		   show_usb2_lpm_l1_timeout, set_usb2_lpm_l1_timeout);
-+
-+static ssize_t
-+show_usb2_lpm_besl(struct device *dev, struct device_attribute *attr,
-+		   char *buf)
-+{
-+	struct usb_device *udev = to_usb_device(dev);
-+	return sprintf(buf, "%d\n", udev->l1_params.besl);
-+}
-+
-+static ssize_t
-+set_usb2_lpm_besl(struct device *dev, struct device_attribute *attr,
-+		const char *buf, size_t count)
-+{
-+	struct usb_device *udev = to_usb_device(dev);
-+	u8 besl;
-+
-+	if (kstrtou8(buf, 0, &besl) || besl > 15)
-+		return -EINVAL;
-+
-+	udev->l1_params.besl = besl;
-+
-+	return count;
-+}
-+
-+static DEVICE_ATTR(usb2_lpm_besl, S_IRUGO | S_IWUSR,
-+		   show_usb2_lpm_besl, set_usb2_lpm_besl);
-+
- static struct attribute *usb2_hardware_lpm_attr[] = {
- 	&dev_attr_usb2_hardware_lpm.attr,
-+	&dev_attr_usb2_lpm_l1_timeout.attr,
-+	&dev_attr_usb2_lpm_besl.attr,
- 	NULL,
- };
- static struct attribute_group usb2_hardware_lpm_attr_group = {
---- a/drivers/usb/host/xhci.c
-+++ b/drivers/usb/host/xhci.c
-@@ -3932,7 +3932,7 @@ static int xhci_calculate_usb2_hw_lpm_pa
- 	field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
- 
- 	/* xHCI l1 is set in steps of 256us, xHCI 1.0 section 5.4.11.2 */
--	l1 = XHCI_L1_TIMEOUT / 256;
-+	l1 = udev->l1_params.timeout / 256;
- 
- 	/* device has preferred BESLD */
- 	if (field & USB_BESL_DEEP_VALID) {
-@@ -4116,7 +4116,7 @@ int xhci_set_usb2_hardware_lpm(struct us
- 			    (field & USB_BESL_BASELINE_VALID))
- 				hird = USB_GET_BESL_BASELINE(field);
- 			else
--				hird = XHCI_DEFAULT_BESL;
-+				hird = udev->l1_params.besl;
- 
- 			exit_latency = xhci_besl_encoding[hird];
- 			spin_unlock_irqrestore(&xhci->lock, flags);
-@@ -4206,6 +4206,8 @@ int xhci_update_device(struct usb_hcd *h
- 		if (xhci->hw_lpm_support == 1 &&
- 		    xhci_check_usb2_port_capability(xhci, portnum, XHCI_HLC)) {
- 			udev->usb2_hw_lpm_capable = 1;
-+			udev->l1_params.timeout = XHCI_L1_TIMEOUT;
-+			udev->l1_params.besl = XHCI_DEFAULT_BESL;
- 			if (xhci_check_usb2_port_capability(xhci, portnum,
- 							    XHCI_BLC))
- 				udev->usb2_hw_lpm_besl_capable = 1;
---- a/include/linux/usb.h
-+++ b/include/linux/usb.h
-@@ -394,6 +394,22 @@ enum usb_port_connect_type {
- };
- 
- /*
-+ * USB 2.0 Link Power Management (LPM) parameters.
-+ */
-+struct usb2_lpm_parameters {
-+	/* Best effort service latency indicate how long the host will drive
-+	 * resume on an exit from L1.
-+	 */
-+	unsigned int besl;
-+
-+	/* Timeout value in microseconds for the L1 inactivity (LPM) timer.
-+	 * When the timer counts to zero, the parent hub will initiate a LPM
-+	 * transition to L1.
-+	 */
-+	int timeout;
-+};
-+
-+/*
-  * USB 3.0 Link Power Management (LPM) parameters.
-  *
-  * PEL and SEL are USB 3.0 Link PM latencies for device-initiated LPM exit.
-@@ -488,6 +504,7 @@ struct usb3_lpm_parameters {
-  *	specific data for the device.
-  * @slot_id: Slot ID assigned by xHCI
-  * @removable: Device can be physically removed from this port
-+ * @l1_params: best effor service latency for USB2 L1 LPM state, and L1 timeout.
-  * @u1_params: exit latencies for USB3 U1 LPM state, and hub-initiated timeout.
-  * @u2_params: exit latencies for USB3 U2 LPM state, and hub-initiated timeout.
-  * @lpm_disable_count: Ref count used by usb_disable_lpm() and usb_enable_lpm()
-@@ -568,6 +585,7 @@ struct usb_device {
- 	struct wusb_dev *wusb_dev;
- 	int slot_id;
- 	enum usb_device_removable removable;
-+	struct usb2_lpm_parameters l1_params;
- 	struct usb3_lpm_parameters u1_params;
- 	struct usb3_lpm_parameters u2_params;
- 	unsigned lpm_disable_count;
diff --git a/patches.baytrail/0007-xhci-fix-port-BESL-LPM-capability-checking.patch b/patches.baytrail/0007-xhci-fix-port-BESL-LPM-capability-checking.patch
deleted file mode 100644
index 1f02bb81f0e6e..0000000000000
--- a/patches.baytrail/0007-xhci-fix-port-BESL-LPM-capability-checking.patch
+++ /dev/null
@@ -1,46 +0,0 @@
-From dcddb19f8ddd55b8709f90a7a92e9f39bdbdf825 Mon Sep 17 00:00:00 2001
-From: Mathias Nyman <mathias.nyman@linux.intel.com>
-Date: Wed, 21 Aug 2013 18:50:09 +0300
-Subject: xhci: fix port BESL LPM capability checking
-
-Wrong capability bit was checked for best effort service latency.
-bit 20 indicate port is BESL LPM capable (BLC),
-bit 19 is hardware LPM capable (HLC)
-
-This patch should be backported to kernels as old as 3.11, that
-contain the commit a558ccdcc71c7770c5e80c926a31cfe8a3892a09 "usb: xhci:
-add USB2 Link power management BESL support"
-
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
-Reported-by: Steve Cotton <steve@s.cotton.clara.co.uk>
-Cc: stable@vger.kernel.org
-(cherry picked from commit dcf06a036848b4e8e6c8220f2e00b9adf6f84918)
-Signed-off-by: Benson Leung <bleung@chromium.org>
-
-
-Reviewed-on: https://chromium-review.googlesource.com/169214
-Reviewed-by: Julius Werner <jwerner@chromium.org>
-Commit-Queue: Benson Leung <bleung@chromium.org>
-Tested-by: Benson Leung <bleung@chromium.org>
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/usb/host/xhci-ext-caps.h | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/usb/host/xhci-ext-caps.h b/drivers/usb/host/xhci-ext-caps.h
-index 8d7a1324e2f3..9fe3225e6c61 100644
---- a/drivers/usb/host/xhci-ext-caps.h
-+++ b/drivers/usb/host/xhci-ext-caps.h
-@@ -71,7 +71,7 @@
- 
- /* USB 2.0 xHCI 1.0 hardware LMP capability - section 7.2.2.1.3.2 */
- #define XHCI_HLC               (1 << 19)
--#define XHCI_BLC               (1 << 19)
-+#define XHCI_BLC               (1 << 20)
- 
- /* command register values to disable interrupts and halt the HC */
- /* start/stop HC execution - do not write unless HC is halted*/
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0008-usb-Don-t-enable-USB-2.0-Link-PM-by-default.patch b/patches.baytrail/0008-usb-Don-t-enable-USB-2.0-Link-PM-by-default.patch
deleted file mode 100644
index e890a9501dfef..0000000000000
--- a/patches.baytrail/0008-usb-Don-t-enable-USB-2.0-Link-PM-by-default.patch
+++ /dev/null
@@ -1,363 +0,0 @@
-From be4fc525ec62681a711552af31af72eddac487d8 Mon Sep 17 00:00:00 2001
-From: Sarah Sharp <sarah.a.sharp@linux.intel.com>
-Date: Mon, 30 Sep 2013 17:26:28 +0300
-Subject: usb: Don't enable USB 2.0 Link PM by default.
-
-How it's supposed to work:
---------------------------
-
-USB 2.0 Link PM is a lower power state that some newer USB 2.0 devices
-support.  USB 3.0 devices certified by the USB-IF are required to
-support it if they are plugged into a USB 2.0 only port, or a USB 2.0
-cable is used.  USB 2.0 Link PM requires both a USB device and a host
-controller that supports USB 2.0 hardware-enabled LPM.
-
-USB 2.0 Link PM is designed to be enabled once by software, and the host
-hardware handles transitions to the L1 state automatically.  The premise
-of USB 2.0 Link PM is to be able to put the device into a lower power
-link state when the bus is idle or the device NAKs USB IN transfers for
-a specified amount of time.
-
-...but hardware is broken:
---------------------------
-
-It turns out many USB 3.0 devices claim to support USB 2.0 Link PM (by
-setting the LPM bit in their USB 2.0 BOS descriptor), but they don't
-actually implement it correctly.  This manifests as the USB device
-refusing to respond to transfers when it is plugged into a USB 2.0 only
-port under the Haswell-ULT/Lynx Point LP xHCI host.
-
-These devices pass the xHCI driver's simple test to enable USB 2.0 Link
-PM, wait for the port to enter L1, and then bring it back into L0.  They
-only start to break when L1 entry is interleaved with transfers.
-
-Some devices then fail to respond to the next control transfer (usually
-a Set Configuration).  This results in devices never enumerating.
-
-Other mass storage devices (such as a later model Western Digital My
-Passport USB 3.0 hard drive) respond fine to going into L1 between
-control transfers.  They ACK the entry, come out of L1 when the host
-needs to send a control transfer, and respond properly to those control
-transfers.  However, when the first READ10 SCSI command is sent, the
-device NAKs the data phase while it's reading from the spinning disk.
-Eventually, the host requests to put the link into L1, and the device
-ACKs that request.  Then it never responds to the data phase of the
-READ10 command.  This results in not being able to read from the drive.
-
-Some mass storage devices (like the Corsair Survivor USB 3.0 flash
-drive) are well behaved.  They ACK the entry into L1 during control
-transfers, and when SCSI commands start coming in, they NAK the requests
-to go into L1, because they need to be at full power.
-
-Not all USB 3.0 devices advertise USB 2.0 link PM support.  My Point
-Grey USB 3.0 webcam advertises itself as a USB 2.1 device, but doesn't
-have a USB 2.0 BOS descriptor, so we don't enable USB 2.0 Link PM.  I
-suspect that means the device isn't certified.
-
-What do we do about it?
------------------------
-
-There's really no good way for the kernel to test these devices.
-Therefore, the kernel needs to disable USB 2.0 Link PM by default, and
-distros will have to enable it by writing 1 to the sysfs file
-/sys/bus/usb/devices/../power/usb2_hardware_lpm.  Rip out the xHCI Link
-PM test, since it's not sufficient to detect these buggy devices, and
-don't automatically enable LPM after the device is addressed.
-
-This patch should be backported to kernels as old as 3.11, that
-contain the commit a558ccdcc71c7770c5e80c926a31cfe8a3892a09 "usb: xhci:
-add USB2 Link power management BESL support".  Without this fix, some
-USB 3.0 devices will not enumerate or work properly under USB 2.0 ports
-on Haswell-ULT systems.
-
-Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
-Cc: stable@vger.kernel.org
-(cherry picked from commit de68bab4fa96014cfaa6fcbcdb9750e32969fb86)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/usb/core/driver.c   |    3 
- drivers/usb/core/hub.c      |    1 
- drivers/usb/core/sysfs.c    |    6 +
- drivers/usb/host/xhci-mem.c |   10 --
- drivers/usb/host/xhci.c     |  161 ++++----------------------------------------
- include/linux/usb.h         |    4 -
- 6 files changed, 29 insertions(+), 156 deletions(-)
-
---- a/drivers/usb/core/driver.c
-+++ b/drivers/usb/core/driver.c
-@@ -1773,6 +1773,9 @@ int usb_set_usb2_hardware_lpm(struct usb
- 	struct usb_hcd *hcd = bus_to_hcd(udev->bus);
- 	int ret = -EPERM;
- 
-+	if (enable && !udev->usb2_hw_lpm_allowed)
-+		return 0;
-+
- 	if (hcd->driver->set_usb2_hw_lpm) {
- 		ret = hcd->driver->set_usb2_hw_lpm(hcd, udev, enable);
- 		if (!ret)
---- a/drivers/usb/core/hub.c
-+++ b/drivers/usb/core/hub.c
-@@ -5165,6 +5165,7 @@ static int usb_reset_and_verify_device(s
- 
- done:
- 	/* Now that the alt settings are re-installed, enable LTM and LPM. */
-+	usb_set_usb2_hardware_lpm(udev, 1);
- 	usb_unlocked_enable_lpm(udev);
- 	usb_enable_ltm(udev);
- 	return 0;
---- a/drivers/usb/core/sysfs.c
-+++ b/drivers/usb/core/sysfs.c
-@@ -463,7 +463,7 @@ show_usb2_hardware_lpm(struct device *de
- 	struct usb_device *udev = to_usb_device(dev);
- 	const char *p;
- 
--	if (udev->usb2_hw_lpm_enabled == 1)
-+	if (udev->usb2_hw_lpm_allowed == 1)
- 		p = "enabled";
- 	else
- 		p = "disabled";
-@@ -483,8 +483,10 @@ set_usb2_hardware_lpm(struct device *dev
- 
- 	ret = strtobool(buf, &value);
- 
--	if (!ret)
-+	if (!ret) {
-+		udev->usb2_hw_lpm_allowed = value;
- 		ret = usb_set_usb2_hardware_lpm(udev, value);
-+	}
- 
- 	usb_unlock_device(udev);
- 
---- a/drivers/usb/host/xhci-mem.c
-+++ b/drivers/usb/host/xhci-mem.c
-@@ -1763,9 +1763,7 @@ void xhci_free_command(struct xhci_hcd *
- void xhci_mem_cleanup(struct xhci_hcd *xhci)
- {
- 	struct pci_dev	*pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
--	struct dev_info	*dev_info, *next;
- 	struct xhci_cd  *cur_cd, *next_cd;
--	unsigned long	flags;
- 	int size;
- 	int i, j, num_ports;
- 
-@@ -1824,13 +1822,6 @@ void xhci_mem_cleanup(struct xhci_hcd *x
- 
- 	scratchpad_free(xhci);
- 
--	spin_lock_irqsave(&xhci->lock, flags);
--	list_for_each_entry_safe(dev_info, next, &xhci->lpm_failed_devs, list) {
--		list_del(&dev_info->list);
--		kfree(dev_info);
--	}
--	spin_unlock_irqrestore(&xhci->lock, flags);
--
- 	if (!xhci->rh_bw)
- 		goto no_bw;
- 
-@@ -2289,7 +2280,6 @@ int xhci_mem_init(struct xhci_hcd *xhci,
- 	u32 page_size, temp;
- 	int i;
- 
--	INIT_LIST_HEAD(&xhci->lpm_failed_devs);
- 	INIT_LIST_HEAD(&xhci->cancel_cmd_list);
- 
- 	page_size = xhci_readl(xhci, &xhci->op_regs->page_size);
---- a/drivers/usb/host/xhci.c
-+++ b/drivers/usb/host/xhci.c
-@@ -3943,133 +3943,6 @@ static int xhci_calculate_usb2_hw_lpm_pa
- 	return PORT_BESLD(besld) | PORT_L1_TIMEOUT(l1) | PORT_HIRDM(hirdm);
- }
- 
--static int xhci_usb2_software_lpm_test(struct usb_hcd *hcd,
--					struct usb_device *udev)
--{
--	struct xhci_hcd	*xhci = hcd_to_xhci(hcd);
--	struct dev_info	*dev_info;
--	__le32 __iomem	**port_array;
--	__le32 __iomem	*addr, *pm_addr;
--	u32		temp, dev_id;
--	unsigned int	port_num;
--	unsigned long	flags;
--	int		hird;
--	int		ret;
--
--	if (hcd->speed == HCD_USB3 || !xhci->sw_lpm_support ||
--			!udev->lpm_capable)
--		return -EINVAL;
--
--	/* we only support lpm for non-hub device connected to root hub yet */
--	if (!udev->parent || udev->parent->parent ||
--			udev->descriptor.bDeviceClass == USB_CLASS_HUB)
--		return -EINVAL;
--
--	spin_lock_irqsave(&xhci->lock, flags);
--
--	/* Look for devices in lpm_failed_devs list */
--	dev_id = le16_to_cpu(udev->descriptor.idVendor) << 16 |
--			le16_to_cpu(udev->descriptor.idProduct);
--	list_for_each_entry(dev_info, &xhci->lpm_failed_devs, list) {
--		if (dev_info->dev_id == dev_id) {
--			ret = -EINVAL;
--			goto finish;
--		}
--	}
--
--	port_array = xhci->usb2_ports;
--	port_num = udev->portnum - 1;
--
--	if (port_num > HCS_MAX_PORTS(xhci->hcs_params1)) {
--		xhci_dbg(xhci, "invalid port number %d\n", udev->portnum);
--		ret = -EINVAL;
--		goto finish;
--	}
--
--	/*
--	 * Test USB 2.0 software LPM.
--	 * FIXME: some xHCI 1.0 hosts may implement a new register to set up
--	 * hardware-controlled USB 2.0 LPM. See section 5.4.11 and 4.23.5.1.1.1
--	 * in the June 2011 errata release.
--	 */
--	xhci_dbg(xhci, "test port %d software LPM\n", port_num);
--	/*
--	 * Set L1 Device Slot and HIRD/BESL.
--	 * Check device's USB 2.0 extension descriptor to determine whether
--	 * HIRD or BESL shoule be used. See USB2.0 LPM errata.
--	 */
--	pm_addr = port_array[port_num] + PORTPMSC;
--	hird = xhci_calculate_hird_besl(xhci, udev);
--	temp = PORT_L1DS(udev->slot_id) | PORT_HIRD(hird);
--	xhci_writel(xhci, temp, pm_addr);
--
--	/* Set port link state to U2(L1) */
--	addr = port_array[port_num];
--	xhci_set_link_state(xhci, port_array, port_num, XDEV_U2);
--
--	/* wait for ACK */
--	spin_unlock_irqrestore(&xhci->lock, flags);
--	msleep(10);
--	spin_lock_irqsave(&xhci->lock, flags);
--
--	/* Check L1 Status */
--	ret = xhci_handshake(xhci, pm_addr,
--			PORT_L1S_MASK, PORT_L1S_SUCCESS, 125);
--	if (ret != -ETIMEDOUT) {
--		/* enter L1 successfully */
--		temp = xhci_readl(xhci, addr);
--		xhci_dbg(xhci, "port %d entered L1 state, port status 0x%x\n",
--				port_num, temp);
--		ret = 0;
--	} else {
--		temp = xhci_readl(xhci, pm_addr);
--		xhci_dbg(xhci, "port %d software lpm failed, L1 status %d\n",
--				port_num, temp & PORT_L1S_MASK);
--		ret = -EINVAL;
--	}
--
--	/* Resume the port */
--	xhci_set_link_state(xhci, port_array, port_num, XDEV_U0);
--
--	spin_unlock_irqrestore(&xhci->lock, flags);
--	msleep(10);
--	spin_lock_irqsave(&xhci->lock, flags);
--
--	/* Clear PLC */
--	xhci_test_and_clear_bit(xhci, port_array, port_num, PORT_PLC);
--
--	/* Check PORTSC to make sure the device is in the right state */
--	if (!ret) {
--		temp = xhci_readl(xhci, addr);
--		xhci_dbg(xhci, "resumed port %d status 0x%x\n",	port_num, temp);
--		if (!(temp & PORT_CONNECT) || !(temp & PORT_PE) ||
--				(temp & PORT_PLS_MASK) != XDEV_U0) {
--			xhci_dbg(xhci, "port L1 resume fail\n");
--			ret = -EINVAL;
--		}
--	}
--
--	if (ret) {
--		/* Insert dev to lpm_failed_devs list */
--		xhci_warn(xhci, "device LPM test failed, may disconnect and "
--				"re-enumerate\n");
--		dev_info = kzalloc(sizeof(struct dev_info), GFP_ATOMIC);
--		if (!dev_info) {
--			ret = -ENOMEM;
--			goto finish;
--		}
--		dev_info->dev_id = dev_id;
--		INIT_LIST_HEAD(&dev_info->list);
--		list_add(&dev_info->list, &xhci->lpm_failed_devs);
--	} else {
--		xhci_ring_device(xhci, udev->slot_id);
--	}
--
--finish:
--	spin_unlock_irqrestore(&xhci->lock, flags);
--	return ret;
--}
--
- int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
- 			struct usb_device *udev, int enable)
- {
-@@ -4197,24 +4070,26 @@ static int xhci_check_usb2_port_capabili
- int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
- {
- 	struct xhci_hcd	*xhci = hcd_to_xhci(hcd);
--	int		ret;
- 	int		portnum = udev->portnum - 1;
- 
--	ret = xhci_usb2_software_lpm_test(hcd, udev);
--	if (!ret) {
--		xhci_dbg(xhci, "software LPM test succeed\n");
--		if (xhci->hw_lpm_support == 1 &&
--		    xhci_check_usb2_port_capability(xhci, portnum, XHCI_HLC)) {
--			udev->usb2_hw_lpm_capable = 1;
--			udev->l1_params.timeout = XHCI_L1_TIMEOUT;
--			udev->l1_params.besl = XHCI_DEFAULT_BESL;
--			if (xhci_check_usb2_port_capability(xhci, portnum,
--							    XHCI_BLC))
--				udev->usb2_hw_lpm_besl_capable = 1;
--			ret = xhci_set_usb2_hardware_lpm(hcd, udev, 1);
--			if (!ret)
--				udev->usb2_hw_lpm_enabled = 1;
--		}
-+	if (hcd->speed == HCD_USB3 || !xhci->sw_lpm_support ||
-+			!udev->lpm_capable)
-+		return 0;
-+
-+	/* we only support lpm for non-hub device connected to root hub yet */
-+	if (!udev->parent || udev->parent->parent ||
-+			udev->descriptor.bDeviceClass == USB_CLASS_HUB)
-+		return 0;
-+
-+	if (xhci->hw_lpm_support == 1 &&
-+			xhci_check_usb2_port_capability(
-+				xhci, portnum, XHCI_HLC)) {
-+		udev->usb2_hw_lpm_capable = 1;
-+		udev->l1_params.timeout = XHCI_L1_TIMEOUT;
-+		udev->l1_params.besl = XHCI_DEFAULT_BESL;
-+		if (xhci_check_usb2_port_capability(xhci, portnum,
-+					XHCI_BLC))
-+			udev->usb2_hw_lpm_besl_capable = 1;
- 	}
- 
- 	return 0;
---- a/include/linux/usb.h
-+++ b/include/linux/usb.h
-@@ -485,7 +485,8 @@ struct usb3_lpm_parameters {
-  * @lpm_capable: device supports LPM
-  * @usb2_hw_lpm_capable: device can perform USB2 hardware LPM
-  * @usb2_hw_lpm_besl_capable: device can perform USB2 hardware BESL LPM
-- * @usb2_hw_lpm_enabled: USB2 hardware LPM enabled
-+ * @usb2_hw_lpm_enabled: USB2 hardware LPM is enabled
-+ * @usb2_hw_lpm_allowed: Userspace allows USB 2.0 LPM to be enabled
-  * @usb3_lpm_enabled: USB3 hardware LPM enabled
-  * @string_langid: language ID for strings
-  * @product: iProduct string, if present (static)
-@@ -558,6 +559,7 @@ struct usb_device {
- 	unsigned usb2_hw_lpm_capable:1;
- 	unsigned usb2_hw_lpm_besl_capable:1;
- 	unsigned usb2_hw_lpm_enabled:1;
-+	unsigned usb2_hw_lpm_allowed:1;
- 	unsigned usb3_lpm_enabled:1;
- 	int string_langid;
- 
diff --git a/patches.baytrail/0009-drm-i915-quirk-away-phantom-LVDS-on-Intel-s-D525MW-m.patch b/patches.baytrail/0009-drm-i915-quirk-away-phantom-LVDS-on-Intel-s-D525MW-m.patch
deleted file mode 100644
index 377bc9ad5628b..0000000000000
--- a/patches.baytrail/0009-drm-i915-quirk-away-phantom-LVDS-on-Intel-s-D525MW-m.patch
+++ /dev/null
@@ -1,46 +0,0 @@
-From 2bac0d1c1ad07da04531d4fb59c0677fd7bd8db3 Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Wed, 3 Jul 2013 15:05:05 -0700
-Subject: drm/i915: quirk away phantom LVDS on Intel's D525MW mainboard
-
-This replaceable mainboard only has a VGA-out, yet it claims to also have
-a connected LVDS header.
-
-Addresses https://bugs.freedesktop.org/show_bug.cgi?id=65256
-
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Reported-by: Cornel Panceac <cpanceac@gmail.com>
-Cc: Chris Wilson <chris@chris-wilson.co.uk>
-Cc: <annndddrr@gmail.com>
-Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Cc: Greg KH <greg@kroah.com>
-Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
-Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
-(cherry picked from commit dcf6d294830d46b0e6901477fb4bf455281d90c8)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_lvds.c | 8 ++++++++
- 1 file changed, 8 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
-index f77d42f74427..b52f5cc7610b 100644
---- a/drivers/gpu/drm/i915/intel_lvds.c
-+++ b/drivers/gpu/drm/i915/intel_lvds.c
-@@ -893,6 +893,14 @@ static const struct dmi_system_id intel_no_lvds[] = {
- 			DMI_EXACT_MATCH(DMI_BOARD_NAME, "D510MO"),
- 		},
- 	},
-+	{
-+		.callback = intel_no_lvds_dmi_callback,
-+		.ident = "Intel D525MW",
-+		.matches = {
-+			DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
-+			DMI_EXACT_MATCH(DMI_BOARD_NAME, "D525MW"),
-+		},
-+	},
- 
- 	{ }	/* terminating entry */
- };
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0010-drm-i915-don-t-enable-the-plane-too-early-in-i9xx_cr.patch b/patches.baytrail/0010-drm-i915-don-t-enable-the-plane-too-early-in-i9xx_cr.patch
deleted file mode 100644
index 5b0ab6ab1fe97..0000000000000
--- a/patches.baytrail/0010-drm-i915-don-t-enable-the-plane-too-early-in-i9xx_cr.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From e00ba0d23f5dd0bd4535c4e72c75391346bb9a55 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 11 Apr 2013 16:29:07 +0200
-Subject: drm/i915: don't enable the plane too early in i9xx_crtc_mode_set
-
-This is horrible lore and we should be able to get rid of it now
-that the lvds/pfit handling code actually does the right thing.
-
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit d59f9f4d68ca82985a3b4578caa0485a9cb2b71b)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 2 --
- 1 file changed, 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index c714d4d5bedb..4edf527f1899 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -4745,8 +4745,6 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
- 
- 	i9xx_set_pipeconf(intel_crtc);
- 
--	intel_enable_pipe(dev_priv, pipe, false);
--
- 	intel_wait_for_vblank(dev, pipe);
- 
- 	I915_WRITE(DSPCNTR(plane), dspcntr);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0011-drm-i915-drop-redundant-vblank-waits.patch b/patches.baytrail/0011-drm-i915-drop-redundant-vblank-waits.patch
deleted file mode 100644
index b96d529cce7de..0000000000000
--- a/patches.baytrail/0011-drm-i915-drop-redundant-vblank-waits.patch
+++ /dev/null
@@ -1,40 +0,0 @@
-From 162cd921a7f0108629be8c9bd045e49fc72b5ac2 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 11 Apr 2013 16:29:08 +0200
-Subject: drm/i915: drop redundant vblank waits
-
-Just blows through 50ms for naught, since the pipe is off.
-
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 4667730163a6d0afb04cefae9805ca1cdad1df46)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 4 ----
- 1 file changed, 4 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 4edf527f1899..29675a78034e 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -4745,8 +4745,6 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
- 
- 	i9xx_set_pipeconf(intel_crtc);
- 
--	intel_wait_for_vblank(dev, pipe);
--
- 	I915_WRITE(DSPCNTR(plane), dspcntr);
- 	POSTING_READ(DSPCNTR(plane));
- 
-@@ -5716,8 +5714,6 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
- 
- 	ironlake_set_pipeconf(crtc, adjusted_mode, dither);
- 
--	intel_wait_for_vblank(dev, pipe);
--
- 	/* Set up the display plane register */
- 	I915_WRITE(DSPCNTR(plane), DISPPLANE_GAMMA_ENABLE);
- 	POSTING_READ(DSPCNTR(plane));
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0012-drm-i915-add-pipe-asserts-for-the-crtc-enable-sequen.patch b/patches.baytrail/0012-drm-i915-add-pipe-asserts-for-the-crtc-enable-sequen.patch
deleted file mode 100644
index d1203b80de82e..0000000000000
--- a/patches.baytrail/0012-drm-i915-add-pipe-asserts-for-the-crtc-enable-sequen.patch
+++ /dev/null
@@ -1,45 +0,0 @@
-From 51e43bae1aca2e0d51c5d71d7a5cf87e6896930c Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 11 Apr 2013 16:29:09 +0200
-Subject: drm/i915: add pipe asserts for the crtc enable sequence
-
-The i9xx modeset sequence is currently pretty fishy, so tight it all
-up with some good assert-sprinkling.
-
-We already have good coverage on the disable side, but the enable side
-is spotty (since until recently it was wrong).
-
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 58c6eaa24dbd8c97ef5f643324f087271aa79d64)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 5 +++++
- 1 file changed, 5 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 29675a78034e..4575e6ebfb07 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -1474,6 +1474,8 @@ static void intel_enable_pll(struct drm_i915_private *dev_priv, enum pipe pipe)
- 	int reg;
- 	u32 val;
- 
-+	assert_pipe_disabled(dev_priv, pipe);
-+
- 	/* No really, not for ILK+ */
- 	BUG_ON(!IS_VALLEYVIEW(dev_priv->dev) && dev_priv->info->gen >= 5);
- 
-@@ -1835,6 +1837,9 @@ static void intel_enable_pipe(struct drm_i915_private *dev_priv, enum pipe pipe,
- 	int reg;
- 	u32 val;
- 
-+	assert_planes_disabled(dev_priv, pipe);
-+	assert_sprites_disabled(dev_priv, pipe);
-+
- 	if (HAS_PCH_LPT(dev_priv->dev))
- 		pch_transcoder = TRANSCODER_A;
- 	else
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0013-drm-i915-add-i9xx-pfit-pipe-asserts.patch b/patches.baytrail/0013-drm-i915-add-i9xx-pfit-pipe-asserts.patch
deleted file mode 100644
index e97dfab25af4b..0000000000000
--- a/patches.baytrail/0013-drm-i915-add-i9xx-pfit-pipe-asserts.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From 09b415087bed853d41d688aa6e946468140314aa Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 11 Apr 2013 16:29:10 +0200
-Subject: drm/i915: add i9xx pfit pipe asserts
-
-We can only enable the pfit if the pipe is disabled. Ensure that this
-is obeyed with a neat assert.
-
-Also check whether the pfit is off before enabling it - if not we've
-lost track of things somewhere since the pfit is only ever used by the
-lvds output.
-
-v2: Fix spell fail in the commit message pointed out by Ville&Jani.
-
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit e29a18faaa18470f313b570fdf2d0f75c35e6cb2)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_lvds.c | 3 +++
- 1 file changed, 3 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
-index b52f5cc7610b..2379b5e404df 100644
---- a/drivers/gpu/drm/i915/intel_lvds.c
-+++ b/drivers/gpu/drm/i915/intel_lvds.c
-@@ -159,6 +159,9 @@ static void intel_pre_enable_lvds(struct intel_encoder *encoder)
- 	if (HAS_PCH_SPLIT(dev) || !enc->pfit_control)
- 		return;
- 
-+	WARN_ON(I915_READ(PFIT_CONTROL) & PFIT_ENABLE);
-+	assert_pipe_disabled(dev_priv, to_intel_crtc(encoder->base.crtc)->pipe);
-+
- 	/*
- 	 * Enable automatic panel scaling so that non-native modes
- 	 * fill the screen.  The panel fitter should only be
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0014-drm-i915-move-debug-output-back-to-the-right-place.patch b/patches.baytrail/0014-drm-i915-move-debug-output-back-to-the-right-place.patch
deleted file mode 100644
index ee4c7e392d5d0..0000000000000
--- a/patches.baytrail/0014-drm-i915-move-debug-output-back-to-the-right-place.patch
+++ /dev/null
@@ -1,50 +0,0 @@
-From 404a76c54fbaf2ef4478a8aa880b8133f39fdf14 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 11 Apr 2013 19:49:07 +0200
-Subject: drm/i915: move debug output back to the right place
-
-When adding the pipe config computation step I've accidentally moved
-this a bit away. Which momentarily confused me since the pipe config
-step rejected some modesetting operations I expected and so left me
-looking in vain for that debug output.
-
-v2: Move the debug output into the right function to prevent this from
-happening again.
-
-v3: Make it compile (Ville). Also reorder the patch so that the two
-bugfixes are first.
-
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit e3641d3f77bb9aea8442dc25018d651d3a348d76)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 6 +++---
- 1 file changed, 3 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 4575e6ebfb07..45ae32757212 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -7760,6 +7760,9 @@ intel_modeset_affected_pipes(struct drm_crtc *crtc, unsigned *modeset_pipes,
- 	 */
- 	*modeset_pipes &= 1 << intel_crtc->pipe;
- 	*prepare_pipes &= 1 << intel_crtc->pipe;
-+
-+	DRM_DEBUG_KMS("set mode pipe masks: modeset: %x, prepare: %x, disable: %x\n",
-+		      *modeset_pipes, *prepare_pipes, *disable_pipes);
- }
- 
- static bool intel_crtc_in_use(struct drm_crtc *crtc)
-@@ -7995,9 +7998,6 @@ static int __intel_set_mode(struct drm_crtc *crtc,
- 		}
- 	}
- 
--	DRM_DEBUG_KMS("set mode pipe masks: modeset: %x, prepare: %x, disable: %x\n",
--		      modeset_pipes, prepare_pipes, disable_pipes);
--
- 	for_each_intel_crtc_masked(dev, disable_pipes, intel_crtc)
- 		intel_crtc_disable(&intel_crtc->base);
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0015-drm-i915-Use-pipe_name-and-port_name-where-appropria.patch b/patches.baytrail/0015-drm-i915-Use-pipe_name-and-port_name-where-appropria.patch
deleted file mode 100644
index 2729eb1ce35e4..0000000000000
--- a/patches.baytrail/0015-drm-i915-Use-pipe_name-and-port_name-where-appropria.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From b4e0f9e940dfd6daff260cb0bcde58ef979acca4 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Wed, 17 Apr 2013 17:48:47 +0300
-Subject: drm/i915: Use pipe_name() and port_name() where appropriate
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Get rid of the few remaining open coded copies of
-pipe_name() and port_name().
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 2582a8504dbdc80b6e16ac8dfd6a7f9d03bece73)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 45ae32757212..46697588377e 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -4735,7 +4735,7 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
- 			dspcntr |= DISPPLANE_SEL_PIPE_B;
- 	}
- 
--	DRM_DEBUG_KMS("Mode for pipe %c:\n", pipe == 0 ? 'A' : 'B');
-+	DRM_DEBUG_KMS("Mode for pipe %c:\n", pipe_name(pipe));
- 	drm_mode_debug_printmodeline(mode);
- 
- 	intel_set_pipe_timings(intel_crtc, mode, adjusted_mode);
-@@ -6121,7 +6121,7 @@ static void ironlake_write_eld(struct drm_connector *connector,
- 		eldv |= IBX_ELD_VALIDB << 4;
- 		eldv |= IBX_ELD_VALIDB << 8;
- 	} else {
--		DRM_DEBUG_DRIVER("ELD on port %c\n", 'A' + i);
-+		DRM_DEBUG_DRIVER("ELD on port %c\n", port_name(i));
- 		eldv = IBX_ELD_VALIDB << ((i - 1) * 4);
- 	}
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0016-drm-i915-Use-port_name-in-PCH-port-audio-power-chang.patch b/patches.baytrail/0016-drm-i915-Use-port_name-in-PCH-port-audio-power-chang.patch
deleted file mode 100644
index c9a79be5ead5e..0000000000000
--- a/patches.baytrail/0016-drm-i915-Use-port_name-in-PCH-port-audio-power-chang.patch
+++ /dev/null
@@ -1,56 +0,0 @@
-From e1dfcd3d47c1413cea5c0f518ac2d4645a369c9f Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Wed, 17 Apr 2013 17:48:48 +0300
-Subject: drm/i915: Use port_name() in PCH port audio power change message
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit cfc33bf75bfbf8f95bffe040ee1a5ab1cda8c34c)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 18 +++++++++++-------
- 1 file changed, 11 insertions(+), 7 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index c8d16a622f3c..c939df03b229 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -754,10 +754,12 @@ static void ibx_irq_handler(struct drm_device *dev, u32 pch_iir)
- 			ibx_hpd_irq_setup(dev);
- 		queue_work(dev_priv->wq, &dev_priv->hotplug_work);
- 	}
--	if (pch_iir & SDE_AUDIO_POWER_MASK)
-+	if (pch_iir & SDE_AUDIO_POWER_MASK) {
-+		int port = ffs((pch_iir & SDE_AUDIO_POWER_MASK) >>
-+			       SDE_AUDIO_POWER_SHIFT);
- 		DRM_DEBUG_DRIVER("PCH audio power change on port %d\n",
--				 (pch_iir & SDE_AUDIO_POWER_MASK) >>
--				 SDE_AUDIO_POWER_SHIFT);
-+				 port_name(port));
-+	}
- 
- 	if (pch_iir & SDE_AUX_MASK)
- 		dp_aux_irq_handler(dev);
-@@ -803,10 +805,12 @@ static void cpt_irq_handler(struct drm_device *dev, u32 pch_iir)
- 			ibx_hpd_irq_setup(dev);
- 		queue_work(dev_priv->wq, &dev_priv->hotplug_work);
- 	}
--	if (pch_iir & SDE_AUDIO_POWER_MASK_CPT)
--		DRM_DEBUG_DRIVER("PCH audio power change on port %d\n",
--				 (pch_iir & SDE_AUDIO_POWER_MASK_CPT) >>
--				 SDE_AUDIO_POWER_SHIFT_CPT);
-+	if (pch_iir & SDE_AUDIO_POWER_MASK_CPT) {
-+		int port = ffs((pch_iir & SDE_AUDIO_POWER_MASK_CPT) >>
-+			       SDE_AUDIO_POWER_SHIFT_CPT);
-+		DRM_DEBUG_DRIVER("PCH audio power change on port %c\n",
-+				 port_name(port));
-+	}
- 
- 	if (pch_iir & SDE_AUX_MASK_CPT)
- 		dp_aux_irq_handler(dev);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0017-drm-i915-Print-plane-pipe-port-names-as-alphabetical.patch b/patches.baytrail/0017-drm-i915-Print-plane-pipe-port-names-as-alphabetical.patch
deleted file mode 100644
index 6db8b1e954c27..0000000000000
--- a/patches.baytrail/0017-drm-i915-Print-plane-pipe-port-names-as-alphabetical.patch
+++ /dev/null
@@ -1,276 +0,0 @@
-From 7c11d755e2b99567be12f53a0fa45ec0a9ec6a4e Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Wed, 17 Apr 2013 17:48:49 +0300
-Subject: drm/i915: Print plane, pipe, port names as alphabetical insted of
- decimal
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Alway use the alphabetical names in debug/error messages for planes,
-pipes and ports, instead of using decimal numbers occasionally.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 84f44ce795b3da9a08dc2041ecd60550d34c123e)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_ddi.c     | 10 ++++-----
- drivers/gpu/drm/i915/intel_display.c | 42 ++++++++++++++++++------------------
- drivers/gpu/drm/i915/intel_pm.c      | 26 +++++++++++-----------
- 3 files changed, 39 insertions(+), 39 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
-index 16e674af4d57..3b798ae62075 100644
---- a/drivers/gpu/drm/i915/intel_ddi.c
-+++ b/drivers/gpu/drm/i915/intel_ddi.c
-@@ -748,8 +748,8 @@ intel_ddi_get_crtc_encoder(struct drm_crtc *crtc)
- 	}
- 
- 	if (num_encoders != 1)
--		WARN(1, "%d encoders on crtc for pipe %d\n", num_encoders,
--		     intel_crtc->pipe);
-+		WARN(1, "%d encoders on crtc for pipe %c\n", num_encoders,
-+		     pipe_name(intel_crtc->pipe));
- 
- 	BUG_ON(ret == NULL);
- 	return ret;
-@@ -1047,8 +1047,8 @@ void intel_ddi_enable_transcoder_func(struct drm_crtc *crtc)
- 		}
- 
- 	} else {
--		WARN(1, "Invalid encoder type %d for pipe %d\n",
--		     intel_encoder->type, pipe);
-+		WARN(1, "Invalid encoder type %d for pipe %c\n",
-+		     intel_encoder->type, pipe_name(pipe));
- 	}
- 
- 	I915_WRITE(TRANS_DDI_FUNC_CTL(cpu_transcoder), temp);
-@@ -1148,7 +1148,7 @@ bool intel_ddi_get_hw_state(struct intel_encoder *encoder,
- 		}
- 	}
- 
--	DRM_DEBUG_KMS("No pipe for ddi port %i found\n", port);
-+	DRM_DEBUG_KMS("No pipe for ddi port %c found\n", port_name(port));
- 
- 	return false;
- }
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 46697588377e..8ce42fa31a55 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -2101,7 +2101,7 @@ static int i9xx_update_plane(struct drm_crtc *crtc, struct drm_framebuffer *fb,
- 	case 1:
- 		break;
- 	default:
--		DRM_ERROR("Can't update plane %d in SAREA\n", plane);
-+		DRM_ERROR("Can't update plane %c in SAREA\n", plane_name(plane));
- 		return -EINVAL;
- 	}
- 
-@@ -2198,7 +2198,7 @@ static int ironlake_update_plane(struct drm_crtc *crtc,
- 	case 2:
- 		break;
- 	default:
--		DRM_ERROR("Can't update plane %d in SAREA\n", plane);
-+		DRM_ERROR("Can't update plane %c in SAREA\n", plane_name(plane));
- 		return -EINVAL;
- 	}
- 
-@@ -2389,9 +2389,9 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
- 	}
- 
- 	if (intel_crtc->plane > INTEL_INFO(dev)->num_pipes) {
--		DRM_ERROR("no plane for crtc: plane %d, num_pipes %d\n",
--				intel_crtc->plane,
--				INTEL_INFO(dev)->num_pipes);
-+		DRM_ERROR("no plane for crtc: plane %c, num_pipes %d\n",
-+			  plane_name(intel_crtc->plane),
-+			  INTEL_INFO(dev)->num_pipes);
- 		return -EINVAL;
- 	}
- 
-@@ -3299,7 +3299,7 @@ static struct intel_pch_pll *intel_get_pch_pll(struct intel_crtc *intel_crtc, u3
- found:
- 	intel_crtc->pch_pll = pll;
- 	pll->refcount++;
--	DRM_DEBUG_DRIVER("using pll %d for pipe %d\n", i, intel_crtc->pipe);
-+	DRM_DEBUG_DRIVER("using pll %d for pipe %c\n", i, pipe_name(intel_crtc->pipe));
- prepare: /* separate function? */
- 	DRM_DEBUG_DRIVER("switching PLL %x off\n", pll->pll_reg);
- 
-@@ -3324,7 +3324,7 @@ void intel_cpt_verify_modeset(struct drm_device *dev, int pipe)
- 	udelay(500);
- 	if (wait_for(I915_READ(dslreg) != temp, 5)) {
- 		if (wait_for(I915_READ(dslreg) != temp, 5))
--			DRM_ERROR("mode set failed: pipe %d stuck\n", pipe);
-+			DRM_ERROR("mode set failed: pipe %c stuck\n", pipe_name(pipe));
- 	}
- }
- 
-@@ -5356,11 +5356,11 @@ static bool ironlake_check_fdi_lanes(struct intel_crtc *intel_crtc)
- 	struct intel_crtc *pipe_B_crtc =
- 		to_intel_crtc(dev_priv->pipe_to_crtc_mapping[PIPE_B]);
- 
--	DRM_DEBUG_KMS("checking fdi config on pipe %i, lanes %i\n",
--		      intel_crtc->pipe, intel_crtc->fdi_lanes);
-+	DRM_DEBUG_KMS("checking fdi config on pipe %c, lanes %i\n",
-+		      pipe_name(intel_crtc->pipe), intel_crtc->fdi_lanes);
- 	if (intel_crtc->fdi_lanes > 4) {
--		DRM_DEBUG_KMS("invalid fdi lane config on pipe %i: %i lanes\n",
--			      intel_crtc->pipe, intel_crtc->fdi_lanes);
-+		DRM_DEBUG_KMS("invalid fdi lane config on pipe %c: %i lanes\n",
-+			      pipe_name(intel_crtc->pipe), intel_crtc->fdi_lanes);
- 		/* Clamp lanes to avoid programming the hw with bogus values. */
- 		intel_crtc->fdi_lanes = 4;
- 
-@@ -5376,8 +5376,8 @@ static bool ironlake_check_fdi_lanes(struct intel_crtc *intel_crtc)
- 	case PIPE_B:
- 		if (dev_priv->pipe_to_crtc_mapping[PIPE_C]->enabled &&
- 		    intel_crtc->fdi_lanes > 2) {
--			DRM_DEBUG_KMS("invalid shared fdi lane config on pipe %i: %i lanes\n",
--				      intel_crtc->pipe, intel_crtc->fdi_lanes);
-+			DRM_DEBUG_KMS("invalid shared fdi lane config on pipe %c: %i lanes\n",
-+				      pipe_name(intel_crtc->pipe), intel_crtc->fdi_lanes);
- 			/* Clamp lanes to avoid programming the hw with bogus values. */
- 			intel_crtc->fdi_lanes = 2;
- 
-@@ -5393,8 +5393,8 @@ static bool ironlake_check_fdi_lanes(struct intel_crtc *intel_crtc)
- 	case PIPE_C:
- 		if (!pipe_B_crtc->base.enabled || pipe_B_crtc->fdi_lanes <= 2) {
- 			if (intel_crtc->fdi_lanes > 2) {
--				DRM_DEBUG_KMS("invalid shared fdi lane config on pipe %i: %i lanes\n",
--					      intel_crtc->pipe, intel_crtc->fdi_lanes);
-+				DRM_DEBUG_KMS("invalid shared fdi lane config on pipe %c: %i lanes\n",
-+					      pipe_name(intel_crtc->pipe), intel_crtc->fdi_lanes);
- 				/* Clamp lanes to avoid programming the hw with bogus values. */
- 				intel_crtc->fdi_lanes = 2;
- 
-@@ -5659,7 +5659,7 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
- 	dpll = ironlake_compute_dpll(intel_crtc, &clock, &fp, &reduced_clock,
- 				     has_reduced_clock ? &fp2 : NULL);
- 
--	DRM_DEBUG_KMS("Mode for pipe %d:\n", pipe);
-+	DRM_DEBUG_KMS("Mode for pipe %c:\n", pipe_name(pipe));
- 	drm_mode_debug_printmodeline(mode);
- 
- 	/* CPU eDP is the only output that doesn't need a PCH PLL of its own. */
-@@ -5668,8 +5668,8 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
- 
- 		pll = intel_get_pch_pll(intel_crtc, dpll, fp);
- 		if (pll == NULL) {
--			DRM_DEBUG_DRIVER("failed to find PLL for pipe %d\n",
--					 pipe);
-+			DRM_DEBUG_DRIVER("failed to find PLL for pipe %c\n",
-+					 pipe_name(pipe));
- 			return -EINVAL;
- 		}
- 	} else
-@@ -5833,7 +5833,7 @@ static int haswell_crtc_mode_set(struct drm_crtc *crtc,
- 	/* determine panel color depth */
- 	dither = intel_crtc->config.dither;
- 
--	DRM_DEBUG_KMS("Mode for pipe %d:\n", pipe);
-+	DRM_DEBUG_KMS("Mode for pipe %c:\n", pipe_name(pipe));
- 	drm_mode_debug_printmodeline(mode);
- 
- 	if (intel_crtc->config.has_dp_encoder)
-@@ -9106,8 +9106,8 @@ void intel_modeset_init(struct drm_device *dev)
- 		for (j = 0; j < dev_priv->num_plane; j++) {
- 			ret = intel_plane_init(dev, i, j);
- 			if (ret)
--				DRM_DEBUG_KMS("pipe %d plane %d init failed: %d\n",
--					      i, j, ret);
-+				DRM_DEBUG_KMS("pipe %c plane %d init failed: %d\n",
-+					      pipe_name(i), j, ret);
- 		}
- 	}
- 
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 94ad6bc08260..f10a9b6758cb 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -113,8 +113,8 @@ static void i8xx_enable_fbc(struct drm_crtc *crtc, unsigned long interval)
- 	fbc_ctl |= obj->fence_reg;
- 	I915_WRITE(FBC_CONTROL, fbc_ctl);
- 
--	DRM_DEBUG_KMS("enabled FBC, pitch %d, yoff %d, plane %d, ",
--		      cfb_pitch, crtc->y, intel_crtc->plane);
-+	DRM_DEBUG_KMS("enabled FBC, pitch %d, yoff %d, plane %c, ",
-+		      cfb_pitch, crtc->y, plane_name(intel_crtc->plane));
- }
- 
- static bool i8xx_fbc_enabled(struct drm_device *dev)
-@@ -148,7 +148,7 @@ static void g4x_enable_fbc(struct drm_crtc *crtc, unsigned long interval)
- 	/* enable it... */
- 	I915_WRITE(DPFC_CONTROL, I915_READ(DPFC_CONTROL) | DPFC_CTL_EN);
- 
--	DRM_DEBUG_KMS("enabled fbc on plane %d\n", intel_crtc->plane);
-+	DRM_DEBUG_KMS("enabled fbc on plane %c\n", plane_name(intel_crtc->plane));
- }
- 
- static void g4x_disable_fbc(struct drm_device *dev)
-@@ -228,7 +228,7 @@ static void ironlake_enable_fbc(struct drm_crtc *crtc, unsigned long interval)
- 		sandybridge_blit_fbc_update(dev);
- 	}
- 
--	DRM_DEBUG_KMS("enabled fbc on plane %d\n", intel_crtc->plane);
-+	DRM_DEBUG_KMS("enabled fbc on plane %c\n", plane_name(intel_crtc->plane));
- }
- 
- static void ironlake_disable_fbc(struct drm_device *dev)
-@@ -2146,15 +2146,15 @@ static void sandybridge_update_sprite_wm(struct drm_device *dev, int pipe,
- 					    &sandybridge_display_wm_info,
- 					    latency, &sprite_wm);
- 	if (!ret) {
--		DRM_DEBUG_KMS("failed to compute sprite wm for pipe %d\n",
--			      pipe);
-+		DRM_DEBUG_KMS("failed to compute sprite wm for pipe %c\n",
-+			      pipe_name(pipe));
- 		return;
- 	}
- 
- 	val = I915_READ(reg);
- 	val &= ~WM0_PIPE_SPRITE_MASK;
- 	I915_WRITE(reg, val | (sprite_wm << WM0_PIPE_SPRITE_SHIFT));
--	DRM_DEBUG_KMS("sprite watermarks For pipe %d - %d\n", pipe, sprite_wm);
-+	DRM_DEBUG_KMS("sprite watermarks For pipe %c - %d\n", pipe_name(pipe), sprite_wm);
- 
- 
- 	ret = sandybridge_compute_sprite_srwm(dev, pipe, sprite_width,
-@@ -2163,8 +2163,8 @@ static void sandybridge_update_sprite_wm(struct drm_device *dev, int pipe,
- 					      SNB_READ_WM1_LATENCY() * 500,
- 					      &sprite_wm);
- 	if (!ret) {
--		DRM_DEBUG_KMS("failed to compute sprite lp1 wm on pipe %d\n",
--			      pipe);
-+		DRM_DEBUG_KMS("failed to compute sprite lp1 wm on pipe %c\n",
-+			      pipe_name(pipe));
- 		return;
- 	}
- 	I915_WRITE(WM1S_LP_ILK, sprite_wm);
-@@ -2179,8 +2179,8 @@ static void sandybridge_update_sprite_wm(struct drm_device *dev, int pipe,
- 					      SNB_READ_WM2_LATENCY() * 500,
- 					      &sprite_wm);
- 	if (!ret) {
--		DRM_DEBUG_KMS("failed to compute sprite lp2 wm on pipe %d\n",
--			      pipe);
-+		DRM_DEBUG_KMS("failed to compute sprite lp2 wm on pipe %c\n",
-+			      pipe_name(pipe));
- 		return;
- 	}
- 	I915_WRITE(WM2S_LP_IVB, sprite_wm);
-@@ -2191,8 +2191,8 @@ static void sandybridge_update_sprite_wm(struct drm_device *dev, int pipe,
- 					      SNB_READ_WM3_LATENCY() * 500,
- 					      &sprite_wm);
- 	if (!ret) {
--		DRM_DEBUG_KMS("failed to compute sprite lp3 wm on pipe %d\n",
--			      pipe);
-+		DRM_DEBUG_KMS("failed to compute sprite lp3 wm on pipe %c\n",
-+			      pipe_name(pipe));
- 		return;
- 	}
- 	I915_WRITE(WM3S_LP_IVB, sprite_wm);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0018-drm-i915-Use-alphabetical-names-for-transcoders-too.patch b/patches.baytrail/0018-drm-i915-Use-alphabetical-names-for-transcoders-too.patch
deleted file mode 100644
index b51b43c050a07..0000000000000
--- a/patches.baytrail/0018-drm-i915-Use-alphabetical-names-for-transcoders-too.patch
+++ /dev/null
@@ -1,64 +0,0 @@
-From eea78c3f9820f0933e8b2f325aeb5d4a8d075890 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Wed, 17 Apr 2013 17:48:50 +0300
-Subject: drm/i915: Use alphabetical names for transcoders too
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Print the alphabetical name for transcoders. The code already used the
-pipe_name() macro for transcoders, so I did the same. But we do have the
-(unused) transcoder_name() macro which could be used instead.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 4bb6f1f3270923cdcd57293ea736955d5c35db72)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 12 ++++++------
- 1 file changed, 6 insertions(+), 6 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 8ce42fa31a55..518c507998a6 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -1097,14 +1097,14 @@ static void assert_pch_pll(struct drm_i915_private *dev_priv,
- 		pch_dpll = I915_READ(PCH_DPLL_SEL);
- 		cur_state = pll->pll_reg == _PCH_DPLL_B;
- 		if (!WARN(((pch_dpll >> (4 * crtc->pipe)) & 1) != cur_state,
--			  "PLL[%d] not attached to this transcoder %d: %08x\n",
--			  cur_state, crtc->pipe, pch_dpll)) {
-+			  "PLL[%d] not attached to this transcoder %c: %08x\n",
-+			  cur_state, pipe_name(crtc->pipe), pch_dpll)) {
- 			cur_state = !!(val >> (4*crtc->pipe + 3));
- 			WARN(cur_state != state,
--			     "PLL[%d] not %s on this transcoder %d: %08x\n",
-+			     "PLL[%d] not %s on this transcoder %c: %08x\n",
- 			     pll->pll_reg == _PCH_DPLL_B,
- 			     state_string(state),
--			     crtc->pipe,
-+			     pipe_name(crtc->pipe),
- 			     val);
- 		}
- 	}
-@@ -1733,7 +1733,7 @@ static void ironlake_enable_pch_transcoder(struct drm_i915_private *dev_priv,
- 
- 	I915_WRITE(reg, val | TRANS_ENABLE);
- 	if (wait_for(I915_READ(reg) & TRANS_STATE_ENABLE, 100))
--		DRM_ERROR("failed to enable transcoder %d\n", pipe);
-+		DRM_ERROR("failed to enable transcoder %c\n", pipe_name(pipe));
- }
- 
- static void lpt_enable_pch_transcoder(struct drm_i915_private *dev_priv,
-@@ -1786,7 +1786,7 @@ static void ironlake_disable_pch_transcoder(struct drm_i915_private *dev_priv,
- 	I915_WRITE(reg, val);
- 	/* wait for PCH transcoder off, transcoder state */
- 	if (wait_for((I915_READ(reg) & TRANS_STATE_ENABLE) == 0, 50))
--		DRM_ERROR("failed to disable transcoder %d\n", pipe);
-+		DRM_ERROR("failed to disable transcoder %c\n", pipe_name(pipe));
- 
- 	if (!HAS_PCH_IBX(dev)) {
- 		/* Workaround: Clear the timing override chicken bit again. */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0019-drm-i915-Use-alphabetical-names-for-sprites.patch b/patches.baytrail/0019-drm-i915-Use-alphabetical-names-for-sprites.patch
deleted file mode 100644
index 22567c0c9ac15..0000000000000
--- a/patches.baytrail/0019-drm-i915-Use-alphabetical-names-for-sprites.patch
+++ /dev/null
@@ -1,66 +0,0 @@
-From 9676fc9bb083f73bb2deefa3be3ef237b344a51e Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Wed, 17 Apr 2013 17:48:51 +0300
-Subject: drm/i915: Use alphabetical names for sprites
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Add sprite_name() macro which should be used with the kind of sprites
-that are fixed to pipes (gen4.5+).
-
-Also use dev_priv->num_plane to calculate the sprite index insted
-assuming two sprites per pipe. This should make it print the right
-name.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 06da8da2b014d6cc98fa86e72b605e525e6d6884)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h      | 2 ++
- drivers/gpu/drm/i915/intel_display.c | 8 ++++----
- 2 files changed, 6 insertions(+), 4 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 47d8b68c5004..989d9a2d8bff 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -76,6 +76,8 @@ enum plane {
- };
- #define plane_name(p) ((p) + 'A')
- 
-+#define sprite_name(p, s) ((p) * dev_priv->num_plane + (s) + 'A')
-+
- enum port {
- 	PORT_A = 0,
- 	PORT_B,
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 518c507998a6..bda32c4ebf58 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -1302,8 +1302,8 @@ static void assert_sprites_disabled(struct drm_i915_private *dev_priv,
- 		reg = SPCNTR(pipe, i);
- 		val = I915_READ(reg);
- 		WARN((val & SP_ENABLE),
--		     "sprite %d assertion failure, should be off on pipe %c but is still active\n",
--		     pipe * 2 + i, pipe_name(pipe));
-+		     "sprite %c assertion failure, should be off on pipe %c but is still active\n",
-+		     sprite_name(pipe, i), pipe_name(pipe));
- 	}
- }
- 
-@@ -9106,8 +9106,8 @@ void intel_modeset_init(struct drm_device *dev)
- 		for (j = 0; j < dev_priv->num_plane; j++) {
- 			ret = intel_plane_init(dev, i, j);
- 			if (ret)
--				DRM_DEBUG_KMS("pipe %c plane %d init failed: %d\n",
--					      pipe_name(i), j, ret);
-+				DRM_DEBUG_KMS("pipe %c sprite %c init failed: %d\n",
-+					      pipe_name(i), sprite_name(i, j), ret);
- 		}
- 	}
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0020-drm-i915-VLV-GPU-frequency-to-opcode-functions.patch b/patches.baytrail/0020-drm-i915-VLV-GPU-frequency-to-opcode-functions.patch
deleted file mode 100644
index 55af872df7a3c..0000000000000
--- a/patches.baytrail/0020-drm-i915-VLV-GPU-frequency-to-opcode-functions.patch
+++ /dev/null
@@ -1,99 +0,0 @@
-From 635708d73aec306534b98f6cda53b8049c14fc08 Mon Sep 17 00:00:00 2001
-From: Jesse Barnes <jbarnes@virtuousgeek.org>
-Date: Wed, 17 Apr 2013 15:54:57 -0700
-Subject: drm/i915: VLV GPU frequency to opcode functions
-
-When requesting frequency changes or querying status from the Punit, we
-need to use an opcode that corresponds to the frequency, taking into
-account the memory frequency.
-
-Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Acked-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 855ba3be12badf6228151ca3ccf54632cfdd463d)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h |  2 ++
- drivers/gpu/drm/i915/intel_pm.c | 56 +++++++++++++++++++++++++++++++++++++++++
- 2 files changed, 58 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 989d9a2d8bff..3be035a8a7b1 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1891,6 +1891,8 @@ int sandybridge_pcode_read(struct drm_i915_private *dev_priv, u8 mbox, u32 *val)
- int sandybridge_pcode_write(struct drm_i915_private *dev_priv, u8 mbox, u32 val);
- int valleyview_punit_read(struct drm_i915_private *dev_priv, u8 addr, u32 *val);
- int valleyview_punit_write(struct drm_i915_private *dev_priv, u8 addr, u32 val);
-+int vlv_gpu_freq(int ddr_freq, int val);
-+int vlv_freq_opcode(int ddr_freq, int val);
- 
- #define __i915_read(x, y) \
- 	u##x i915_read##x(struct drm_i915_private *dev_priv, u32 reg);
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index f10a9b6758cb..746990fd1bd4 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -4655,3 +4655,59 @@ int valleyview_punit_write(struct drm_i915_private *dev_priv, u8 addr, u32 val)
- {
- 	return vlv_punit_rw(dev_priv, PUNIT_OPCODE_REG_WRITE, addr, &val);
- }
-+
-+int vlv_gpu_freq(int ddr_freq, int val)
-+{
-+	int mult, base;
-+
-+	switch (ddr_freq) {
-+	case 800:
-+		mult = 20;
-+		base = 120;
-+		break;
-+	case 1066:
-+		mult = 22;
-+		base = 133;
-+		break;
-+	case 1333:
-+		mult = 21;
-+		base = 125;
-+		break;
-+	default:
-+		return -1;
-+	}
-+
-+	return ((val - 0xbd) * mult) + base;
-+}
-+
-+int vlv_freq_opcode(int ddr_freq, int val)
-+{
-+	int mult, base;
-+
-+	switch (ddr_freq) {
-+	case 800:
-+		mult = 20;
-+		base = 120;
-+		break;
-+	case 1066:
-+		mult = 22;
-+		base = 133;
-+		break;
-+	case 1333:
-+		mult = 21;
-+		base = 125;
-+		break;
-+	default:
-+		return -1;
-+	}
-+
-+	val /= mult;
-+	val -= base / mult;
-+	val += 0xbd;
-+
-+	if (val > 0xea)
-+		val = 0xea;
-+
-+	return val;
-+}
-+
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0021-drm-i915-turbo-RC6-support-for-VLV-v7.patch b/patches.baytrail/0021-drm-i915-turbo-RC6-support-for-VLV-v7.patch
deleted file mode 100644
index 9fd23dfae9c91..0000000000000
--- a/patches.baytrail/0021-drm-i915-turbo-RC6-support-for-VLV-v7.patch
+++ /dev/null
@@ -1,612 +0,0 @@
-From e6eabe75b201ee1221b5004ac98a4c9f1a8bdbaf Mon Sep 17 00:00:00 2001
-From: Jesse Barnes <jbarnes@virtuousgeek.org>
-Date: Wed, 17 Apr 2013 15:54:58 -0700
-Subject: drm/i915: turbo & RC6 support for VLV v7
-
-Uses slightly different interfaces than other platforms.
-
-v2: track actual set freq, not requested (Rohit)
-    fix debug prints in init code (Jesse)
-v3: don't write sleep reg (Jesse)
-    re-add RC6 wake limit write (Ben)
-    fixup thresholds to match other platforms (Ben)
-    clean up mem freq calculation (Ben)
-    clean up debug prints (Ben)
-v4: move defines from punit patch (Ville)
-v5: remove writes to nonexistent regs (Jesse)
-    put RP and RC regs together (Jesse)
-    fix RC6 enable (Jesse)
-v6: use correct fuse reads from NC (Jesse)
-    split out min/max funcs for use in sysfs (Jesse)
-    add debugfs & sysfs freq controls (Jesse)
-v7: update with Ben's hw_max changes (Jesse)
-
-Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Reviewed-by: Ben Widawsky <ben@bwidawsk.net> (v6)
-[danvet: Follow checkpatch sugggestion to use min_t to avoid casting
-fun.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 0a073b843bcd9a660f76e497182aac97cafddc4c)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_debugfs.c |   58 ++++++++--
- drivers/gpu/drm/i915/i915_drv.h     |    5 
- drivers/gpu/drm/i915/i915_irq.c     |    5 
- drivers/gpu/drm/i915/i915_reg.h     |   21 +++
- drivers/gpu/drm/i915/i915_sysfs.c   |   71 +++++++++---
- drivers/gpu/drm/i915/intel_pm.c     |  199 ++++++++++++++++++++++++++++++++++--
- 6 files changed, 320 insertions(+), 39 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_debugfs.c
-+++ b/drivers/gpu/drm/i915/i915_debugfs.c
-@@ -941,7 +941,7 @@ static int i915_cur_delayinfo(struct seq
- 			   MEMSTAT_VID_SHIFT);
- 		seq_printf(m, "Current P-state: %d\n",
- 			   (rgvstat & MEMSTAT_PSTATE_MASK) >> MEMSTAT_PSTATE_SHIFT);
--	} else if (IS_GEN6(dev) || IS_GEN7(dev)) {
-+	} else if ((IS_GEN6(dev) || IS_GEN7(dev)) && !IS_VALLEYVIEW(dev)) {
- 		u32 gt_perf_status = I915_READ(GEN6_GT_PERF_STATUS);
- 		u32 rp_state_limits = I915_READ(GEN6_RP_STATE_LIMITS);
- 		u32 rp_state_cap = I915_READ(GEN6_RP_STATE_CAP);
-@@ -1009,6 +1009,25 @@ static int i915_cur_delayinfo(struct seq
- 
- 		seq_printf(m, "Max overclocked frequency: %dMHz\n",
- 			   dev_priv->rps.hw_max * GT_FREQUENCY_MULTIPLIER);
-+	} else if (IS_VALLEYVIEW(dev)) {
-+		u32 freq_sts, val;
-+
-+		valleyview_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS,
-+				      &freq_sts);
-+		seq_printf(m, "PUNIT_REG_GPU_FREQ_STS: 0x%08x\n", freq_sts);
-+		seq_printf(m, "DDR freq: %d MHz\n", dev_priv->mem_freq);
-+
-+		valleyview_punit_read(dev_priv, PUNIT_FUSE_BUS1, &val);
-+		seq_printf(m, "max GPU freq: %d MHz\n",
-+			   vlv_gpu_freq(dev_priv->mem_freq, val));
-+
-+		valleyview_punit_read(dev_priv, PUNIT_REG_GPU_LFM, &val);
-+		seq_printf(m, "min GPU freq: %d MHz\n",
-+			   vlv_gpu_freq(dev_priv->mem_freq, val));
-+
-+		seq_printf(m, "current GPU freq: %d MHz\n",
-+			   vlv_gpu_freq(dev_priv->mem_freq,
-+					(freq_sts >> 8) & 0xff));
- 	} else {
- 		seq_printf(m, "no P-state info available\n");
- 	}
-@@ -1812,7 +1831,11 @@ i915_max_freq_get(void *data, u64 *val)
- 	if (ret)
- 		return ret;
- 
--	*val = dev_priv->rps.max_delay * GT_FREQUENCY_MULTIPLIER;
-+	if (IS_VALLEYVIEW(dev))
-+		*val = vlv_gpu_freq(dev_priv->mem_freq,
-+				    dev_priv->rps.max_delay);
-+	else
-+		*val = dev_priv->rps.max_delay * GT_FREQUENCY_MULTIPLIER;
- 	mutex_unlock(&dev_priv->rps.hw_lock);
- 
- 	return 0;
-@@ -1837,9 +1860,16 @@ i915_max_freq_set(void *data, u64 val)
- 	/*
- 	 * Turbo will still be enabled, but won't go above the set value.
- 	 */
--	do_div(val, GT_FREQUENCY_MULTIPLIER);
--	dev_priv->rps.max_delay = val;
--	gen6_set_rps(dev, val);
-+	if (IS_VALLEYVIEW(dev)) {
-+		val = vlv_freq_opcode(dev_priv->mem_freq, val);
-+		dev_priv->rps.max_delay = val;
-+		gen6_set_rps(dev, val);
-+	} else {
-+		do_div(val, GT_FREQUENCY_MULTIPLIER);
-+		dev_priv->rps.max_delay = val;
-+		gen6_set_rps(dev, val);
-+	}
-+
- 	mutex_unlock(&dev_priv->rps.hw_lock);
- 
- 	return 0;
-@@ -1863,7 +1893,11 @@ i915_min_freq_get(void *data, u64 *val)
- 	if (ret)
- 		return ret;
- 
--	*val = dev_priv->rps.min_delay * GT_FREQUENCY_MULTIPLIER;
-+	if (IS_VALLEYVIEW(dev))
-+		*val = vlv_gpu_freq(dev_priv->mem_freq,
-+				    dev_priv->rps.min_delay);
-+	else
-+		*val = dev_priv->rps.min_delay * GT_FREQUENCY_MULTIPLIER;
- 	mutex_unlock(&dev_priv->rps.hw_lock);
- 
- 	return 0;
-@@ -1888,9 +1922,15 @@ i915_min_freq_set(void *data, u64 val)
- 	/*
- 	 * Turbo will still be enabled, but won't go below the set value.
- 	 */
--	do_div(val, GT_FREQUENCY_MULTIPLIER);
--	dev_priv->rps.min_delay = val;
--	gen6_set_rps(dev, val);
-+	if (IS_VALLEYVIEW(dev)) {
-+		val = vlv_freq_opcode(dev_priv->mem_freq, val);
-+		dev_priv->rps.min_delay = val;
-+		valleyview_set_rps(dev, val);
-+	} else {
-+		do_div(val, GT_FREQUENCY_MULTIPLIER);
-+		dev_priv->rps.min_delay = val;
-+		gen6_set_rps(dev, val);
-+	}
- 	mutex_unlock(&dev_priv->rps.hw_lock);
- 
- 	return 0;
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1860,6 +1860,9 @@ extern void intel_disable_fbc(struct drm
- extern bool ironlake_set_drps(struct drm_device *dev, u8 val);
- extern void intel_init_pch_refclk(struct drm_device *dev);
- extern void gen6_set_rps(struct drm_device *dev, u8 val);
-+extern void valleyview_set_rps(struct drm_device *dev, u8 val);
-+extern int valleyview_rps_max_freq(struct drm_i915_private *dev_priv);
-+extern int valleyview_rps_min_freq(struct drm_i915_private *dev_priv);
- extern void intel_detect_pch(struct drm_device *dev);
- extern int intel_trans_dp_port_sel(struct drm_crtc *crtc);
- extern int intel_enable_rc6(const struct drm_device *dev);
-@@ -1891,6 +1894,8 @@ int sandybridge_pcode_read(struct drm_i9
- int sandybridge_pcode_write(struct drm_i915_private *dev_priv, u8 mbox, u32 val);
- int valleyview_punit_read(struct drm_i915_private *dev_priv, u8 addr, u32 *val);
- int valleyview_punit_write(struct drm_i915_private *dev_priv, u8 addr, u32 val);
-+int valleyview_nc_read(struct drm_i915_private *dev_priv, u8 addr, u32 *val);
-+
- int vlv_gpu_freq(int ddr_freq, int val);
- int vlv_freq_opcode(int ddr_freq, int val);
- 
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -473,7 +473,10 @@ static void gen6_pm_rps_work(struct work
- 	 */
- 	if (!(new_delay > dev_priv->rps.max_delay ||
- 	      new_delay < dev_priv->rps.min_delay)) {
--		gen6_set_rps(dev_priv->dev, new_delay);
-+		if (IS_VALLEYVIEW(dev_priv->dev))
-+			valleyview_set_rps(dev_priv->dev, new_delay);
-+		else
-+			gen6_set_rps(dev_priv->dev, new_delay);
- 	}
- 
- 	mutex_unlock(&dev_priv->rps.hw_lock);
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -4319,6 +4319,7 @@
- #define   GEN6_RC_CTL_RC6_ENABLE		(1<<18)
- #define   GEN6_RC_CTL_RC1e_ENABLE		(1<<20)
- #define   GEN6_RC_CTL_RC7_ENABLE		(1<<22)
-+#define   GEN7_RC_CTL_TO_MODE			(1<<28)
- #define   GEN6_RC_CTL_EI_MODE(x)		((x)<<27)
- #define   GEN6_RC_CTL_HW_ENABLE			(1<<31)
- #define GEN6_RP_DOWN_TIMEOUT			0xA010
-@@ -4410,12 +4411,32 @@
- #define   IOSF_BAR_SHIFT			1
- #define   IOSF_SB_BUSY				(1<<0)
- #define   IOSF_PORT_PUNIT			0x4
-+#define   IOSF_PORT_NC				0x11
- #define VLV_IOSF_DATA				0x182104
- #define VLV_IOSF_ADDR				0x182108
- 
- #define PUNIT_OPCODE_REG_READ			6
- #define PUNIT_OPCODE_REG_WRITE			7
- 
-+#define PUNIT_REG_GPU_LFM			0xd3
-+#define PUNIT_REG_GPU_FREQ_REQ			0xd4
-+#define PUNIT_REG_GPU_FREQ_STS			0xd8
-+#define PUNIT_REG_MEDIA_TURBO_FREQ_REQ		0xdc
-+
-+#define PUNIT_FUSE_BUS2				0xf6 /* bits 47:40 */
-+#define PUNIT_FUSE_BUS1				0xf5 /* bits 55:48 */
-+
-+#define IOSF_NC_FB_GFX_FREQ_FUSE		0x1c
-+#define   FB_GFX_MAX_FREQ_FUSE_SHIFT		3
-+#define   FB_GFX_MAX_FREQ_FUSE_MASK		0x000007f8
-+#define   FB_GFX_FGUARANTEED_FREQ_FUSE_SHIFT	11
-+#define   FB_GFX_FGUARANTEED_FREQ_FUSE_MASK	0x0007f800
-+#define IOSF_NC_FB_GFX_FMAX_FUSE_HI		0x34
-+#define   FB_FMAX_VMIN_FREQ_HI_MASK		0x00000007
-+#define IOSF_NC_FB_GFX_FMAX_FUSE_LO		0x30
-+#define   FB_FMAX_VMIN_FREQ_LO_SHIFT		27
-+#define   FB_FMAX_VMIN_FREQ_LO_MASK		0xf8000000
-+
- #define GEN6_GT_CORE_STATUS		0x138060
- #define   GEN6_CORE_CPD_STATE_MASK	(7<<4)
- #define   GEN6_RCn_MASK			7
---- a/drivers/gpu/drm/i915/i915_sysfs.c
-+++ b/drivers/gpu/drm/i915/i915_sysfs.c
-@@ -212,7 +212,10 @@ static ssize_t gt_cur_freq_mhz_show(stru
- 	int ret;
- 
- 	mutex_lock(&dev_priv->rps.hw_lock);
--	ret = dev_priv->rps.cur_delay * GT_FREQUENCY_MULTIPLIER;
-+	if (IS_VALLEYVIEW(dev_priv->dev))
-+		ret = vlv_gpu_freq(dev_priv->mem_freq, dev_priv->rps.cur_delay);
-+	else
-+		ret = dev_priv->rps.cur_delay * GT_FREQUENCY_MULTIPLIER;
- 	mutex_unlock(&dev_priv->rps.hw_lock);
- 
- 	return snprintf(buf, PAGE_SIZE, "%d\n", ret);
-@@ -226,7 +229,10 @@ static ssize_t gt_max_freq_mhz_show(stru
- 	int ret;
- 
- 	mutex_lock(&dev_priv->rps.hw_lock);
--	ret = dev_priv->rps.max_delay * GT_FREQUENCY_MULTIPLIER;
-+	if (IS_VALLEYVIEW(dev_priv->dev))
-+		ret = vlv_gpu_freq(dev_priv->mem_freq, dev_priv->rps.max_delay);
-+	else
-+		ret = dev_priv->rps.max_delay * GT_FREQUENCY_MULTIPLIER;
- 	mutex_unlock(&dev_priv->rps.hw_lock);
- 
- 	return snprintf(buf, PAGE_SIZE, "%d\n", ret);
-@@ -246,16 +252,25 @@ static ssize_t gt_max_freq_mhz_store(str
- 	if (ret)
- 		return ret;
- 
--	val /= GT_FREQUENCY_MULTIPLIER;
--
- 	mutex_lock(&dev_priv->rps.hw_lock);
- 
--	rp_state_cap = I915_READ(GEN6_RP_STATE_CAP);
--	hw_max = dev_priv->rps.hw_max;
--	non_oc_max = (rp_state_cap & 0xff);
--	hw_min = ((rp_state_cap & 0xff0000) >> 16);
-+	if (IS_VALLEYVIEW(dev_priv->dev)) {
-+		val = vlv_freq_opcode(dev_priv->mem_freq, val);
-+
-+		hw_max = valleyview_rps_max_freq(dev_priv);
-+		hw_min = valleyview_rps_min_freq(dev_priv);
-+		non_oc_max = hw_max;
-+	} else {
-+		val /= GT_FREQUENCY_MULTIPLIER;
-+
-+		rp_state_cap = I915_READ(GEN6_RP_STATE_CAP);
-+		hw_max = dev_priv->rps.hw_max;
-+		non_oc_max = (rp_state_cap & 0xff);
-+		hw_min = ((rp_state_cap & 0xff0000) >> 16);
-+	}
- 
--	if (val < hw_min || val > hw_max || val < dev_priv->rps.min_delay) {
-+	if (val < hw_min || val > hw_max ||
-+	    val < dev_priv->rps.min_delay) {
- 		mutex_unlock(&dev_priv->rps.hw_lock);
- 		return -EINVAL;
- 	}
-@@ -264,8 +279,12 @@ static ssize_t gt_max_freq_mhz_store(str
- 		DRM_DEBUG("User requested overclocking to %d\n",
- 			  val * GT_FREQUENCY_MULTIPLIER);
- 
--	if (dev_priv->rps.cur_delay > val)
--		gen6_set_rps(dev_priv->dev, val);
-+	if (dev_priv->rps.cur_delay > val) {
-+		if (IS_VALLEYVIEW(dev_priv->dev))
-+			valleyview_set_rps(dev_priv->dev, val);
-+		else
-+			gen6_set_rps(dev_priv->dev, val);
-+	}
- 
- 	dev_priv->rps.max_delay = val;
- 
-@@ -282,7 +301,10 @@ static ssize_t gt_min_freq_mhz_show(stru
- 	int ret;
- 
- 	mutex_lock(&dev_priv->rps.hw_lock);
--	ret = dev_priv->rps.min_delay * GT_FREQUENCY_MULTIPLIER;
-+	if (IS_VALLEYVIEW(dev_priv->dev))
-+		ret = vlv_gpu_freq(dev_priv->mem_freq, dev_priv->rps.min_delay);
-+	else
-+		ret = dev_priv->rps.min_delay * GT_FREQUENCY_MULTIPLIER;
- 	mutex_unlock(&dev_priv->rps.hw_lock);
- 
- 	return snprintf(buf, PAGE_SIZE, "%d\n", ret);
-@@ -302,21 +324,32 @@ static ssize_t gt_min_freq_mhz_store(str
- 	if (ret)
- 		return ret;
- 
--	val /= GT_FREQUENCY_MULTIPLIER;
--
- 	mutex_lock(&dev_priv->rps.hw_lock);
- 
--	rp_state_cap = I915_READ(GEN6_RP_STATE_CAP);
--	hw_max = dev_priv->rps.hw_max;
--	hw_min = ((rp_state_cap & 0xff0000) >> 16);
-+	if (IS_VALLEYVIEW(dev)) {
-+		val = vlv_freq_opcode(dev_priv->mem_freq, val);
-+
-+		hw_max = valleyview_rps_max_freq(dev_priv);
-+		hw_min = valleyview_rps_min_freq(dev_priv);
-+	} else {
-+		val /= GT_FREQUENCY_MULTIPLIER;
-+
-+		rp_state_cap = I915_READ(GEN6_RP_STATE_CAP);
-+		hw_max = dev_priv->rps.hw_max;
-+		hw_min = ((rp_state_cap & 0xff0000) >> 16);
-+	}
- 
- 	if (val < hw_min || val > hw_max || val > dev_priv->rps.max_delay) {
- 		mutex_unlock(&dev_priv->rps.hw_lock);
- 		return -EINVAL;
- 	}
- 
--	if (dev_priv->rps.cur_delay < val)
--		gen6_set_rps(dev_priv->dev, val);
-+	if (dev_priv->rps.cur_delay < val) {
-+		if (IS_VALLEYVIEW(dev))
-+			valleyview_set_rps(dev, val);
-+		else
-+			gen6_set_rps(dev_priv->dev, val);
-+	}
- 
- 	dev_priv->rps.min_delay = val;
- 
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2481,6 +2481,52 @@ void gen6_set_rps(struct drm_device *dev
- 	trace_intel_gpu_freq_change(val * 50);
- }
- 
-+void valleyview_set_rps(struct drm_device *dev, u8 val)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	unsigned long timeout = jiffies + msecs_to_jiffies(10);
-+	u32 limits = gen6_rps_limits(dev_priv, &val);
-+	u32 pval;
-+
-+	WARN_ON(!mutex_is_locked(&dev_priv->rps.hw_lock));
-+	WARN_ON(val > dev_priv->rps.max_delay);
-+	WARN_ON(val < dev_priv->rps.min_delay);
-+
-+	DRM_DEBUG_DRIVER("gpu freq request from %d to %d\n",
-+			 vlv_gpu_freq(dev_priv->mem_freq,
-+				      dev_priv->rps.cur_delay),
-+			 vlv_gpu_freq(dev_priv->mem_freq, val));
-+
-+	if (val == dev_priv->rps.cur_delay)
-+		return;
-+
-+	valleyview_punit_write(dev_priv, PUNIT_REG_GPU_FREQ_REQ, val);
-+
-+	do {
-+		valleyview_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS, &pval);
-+		if (time_after(jiffies, timeout)) {
-+			DRM_DEBUG_DRIVER("timed out waiting for Punit\n");
-+			break;
-+		}
-+		udelay(10);
-+	} while (pval & 1);
-+
-+	valleyview_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS, &pval);
-+	if ((pval >> 8) != val)
-+		DRM_DEBUG_DRIVER("punit overrode freq: %d requested, but got %d\n",
-+			  val, pval >> 8);
-+
-+	/* Make sure we continue to get interrupts
-+	 * until we hit the minimum or maximum frequencies.
-+	 */
-+	I915_WRITE(GEN6_RP_INTERRUPT_LIMITS, limits);
-+
-+	dev_priv->rps.cur_delay = pval >> 8;
-+
-+	trace_intel_gpu_freq_change(vlv_gpu_freq(dev_priv->mem_freq, val));
-+}
-+
-+
- static void gen6_disable_rps(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
-@@ -2742,6 +2788,127 @@ static void gen6_update_ring_freq(struct
- 	}
- }
- 
-+int valleyview_rps_max_freq(struct drm_i915_private *dev_priv)
-+{
-+	u32 val, rp0;
-+
-+	valleyview_nc_read(dev_priv, IOSF_NC_FB_GFX_FREQ_FUSE, &val);
-+
-+	rp0 = (val & FB_GFX_MAX_FREQ_FUSE_MASK) >> FB_GFX_MAX_FREQ_FUSE_SHIFT;
-+	/* Clamp to max */
-+	rp0 = min_t(u32, rp0, 0xea);
-+
-+	return rp0;
-+}
-+
-+static int valleyview_rps_rpe_freq(struct drm_i915_private *dev_priv)
-+{
-+	u32 val, rpe;
-+
-+	valleyview_nc_read(dev_priv, IOSF_NC_FB_GFX_FMAX_FUSE_LO, &val);
-+	rpe = (val & FB_FMAX_VMIN_FREQ_LO_MASK) >> FB_FMAX_VMIN_FREQ_LO_SHIFT;
-+	valleyview_nc_read(dev_priv, IOSF_NC_FB_GFX_FMAX_FUSE_HI, &val);
-+	rpe |= (val & FB_FMAX_VMIN_FREQ_HI_MASK) << 5;
-+
-+	return rpe;
-+}
-+
-+int valleyview_rps_min_freq(struct drm_i915_private *dev_priv)
-+{
-+	u32 val;
-+
-+	valleyview_punit_read(dev_priv, PUNIT_REG_GPU_LFM, &val);
-+
-+	return val & 0xff;
-+}
-+
-+static void valleyview_enable_rps(struct drm_device *dev)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct intel_ring_buffer *ring;
-+	u32 gtfifodbg, val, rpe;
-+	int i;
-+
-+	WARN_ON(!mutex_is_locked(&dev_priv->rps.hw_lock));
-+
-+	if ((gtfifodbg = I915_READ(GTFIFODBG))) {
-+		DRM_ERROR("GT fifo had a previous error %x\n", gtfifodbg);
-+		I915_WRITE(GTFIFODBG, gtfifodbg);
-+	}
-+
-+	gen6_gt_force_wake_get(dev_priv);
-+
-+	I915_WRITE(GEN6_RP_UP_THRESHOLD, 59400);
-+	I915_WRITE(GEN6_RP_DOWN_THRESHOLD, 245000);
-+	I915_WRITE(GEN6_RP_UP_EI, 66000);
-+	I915_WRITE(GEN6_RP_DOWN_EI, 350000);
-+
-+	I915_WRITE(GEN6_RP_IDLE_HYSTERSIS, 10);
-+
-+	I915_WRITE(GEN6_RP_CONTROL,
-+		   GEN6_RP_MEDIA_TURBO |
-+		   GEN6_RP_MEDIA_HW_NORMAL_MODE |
-+		   GEN6_RP_MEDIA_IS_GFX |
-+		   GEN6_RP_ENABLE |
-+		   GEN6_RP_UP_BUSY_AVG |
-+		   GEN6_RP_DOWN_IDLE_CONT);
-+
-+	I915_WRITE(GEN6_RC6_WAKE_RATE_LIMIT, 0x00280000);
-+	I915_WRITE(GEN6_RC_EVALUATION_INTERVAL, 125000);
-+	I915_WRITE(GEN6_RC_IDLE_HYSTERSIS, 25);
-+
-+	for_each_ring(ring, dev_priv, i)
-+		I915_WRITE(RING_MAX_IDLE(ring->mmio_base), 10);
-+
-+	I915_WRITE(GEN6_RC6_THRESHOLD, 0xc350);
-+
-+	/* allows RC6 residency counter to work */
-+	I915_WRITE(0x138104, _MASKED_BIT_ENABLE(0x3));
-+	I915_WRITE(GEN6_RC_CONTROL,
-+		   GEN7_RC_CTL_TO_MODE);
-+
-+	valleyview_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS, &val);
-+	dev_priv->mem_freq = 800 + (266 * (val >> 6) & 3);
-+	DRM_DEBUG_DRIVER("DDR speed: %d MHz", dev_priv->mem_freq);
-+
-+	DRM_DEBUG_DRIVER("GPLL enabled? %s\n", val & 0x10 ? "yes" : "no");
-+	DRM_DEBUG_DRIVER("GPU status: 0x%08x\n", val);
-+
-+	DRM_DEBUG_DRIVER("current GPU freq: %d\n",
-+			 vlv_gpu_freq(dev_priv->mem_freq, (val >> 8) & 0xff));
-+	dev_priv->rps.cur_delay = (val >> 8) & 0xff;
-+
-+	dev_priv->rps.max_delay = valleyview_rps_max_freq(dev_priv);
-+	dev_priv->rps.hw_max = dev_priv->rps.max_delay;
-+	DRM_DEBUG_DRIVER("max GPU freq: %d\n", vlv_gpu_freq(dev_priv->mem_freq,
-+						     dev_priv->rps.max_delay));
-+
-+	rpe = valleyview_rps_rpe_freq(dev_priv);
-+	DRM_DEBUG_DRIVER("RPe GPU freq: %d\n",
-+			 vlv_gpu_freq(dev_priv->mem_freq, rpe));
-+
-+	val = valleyview_rps_min_freq(dev_priv);
-+	DRM_DEBUG_DRIVER("min GPU freq: %d\n", vlv_gpu_freq(dev_priv->mem_freq,
-+							    val));
-+	dev_priv->rps.min_delay = val;
-+
-+	DRM_DEBUG_DRIVER("setting GPU freq to %d\n",
-+			 vlv_gpu_freq(dev_priv->mem_freq, rpe));
-+
-+	valleyview_set_rps(dev_priv->dev, rpe);
-+
-+	/* requires MSI enabled */
-+	I915_WRITE(GEN6_PMIER, GEN6_PM_DEFERRED_EVENTS);
-+	spin_lock_irq(&dev_priv->rps.lock);
-+	WARN_ON(dev_priv->rps.pm_iir != 0);
-+	I915_WRITE(GEN6_PMIMR, 0);
-+	spin_unlock_irq(&dev_priv->rps.lock);
-+	/* enable all PM interrupts */
-+	I915_WRITE(GEN6_PMINTRMSK, 0);
-+
-+	gen6_gt_force_wake_put(dev_priv);
-+}
-+
- void ironlake_teardown_rc6(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
-@@ -3468,7 +3635,7 @@ void intel_disable_gt_powersave(struct d
- 	if (IS_IRONLAKE_M(dev)) {
- 		ironlake_disable_drps(dev);
- 		ironlake_disable_rc6(dev);
--	} else if (INTEL_INFO(dev)->gen >= 6 && !IS_VALLEYVIEW(dev)) {
-+	} else if (INTEL_INFO(dev)->gen >= 6) {
- 		cancel_delayed_work_sync(&dev_priv->rps.delayed_resume_work);
- 		mutex_lock(&dev_priv->rps.hw_lock);
- 		gen6_disable_rps(dev);
-@@ -3484,8 +3651,13 @@ static void intel_gen6_powersave_work(st
- 	struct drm_device *dev = dev_priv->dev;
- 
- 	mutex_lock(&dev_priv->rps.hw_lock);
--	gen6_enable_rps(dev);
--	gen6_update_ring_freq(dev);
-+
-+	if (IS_VALLEYVIEW(dev)) {
-+		valleyview_enable_rps(dev);
-+	} else {
-+		gen6_enable_rps(dev);
-+		gen6_update_ring_freq(dev);
-+	}
- 	mutex_unlock(&dev_priv->rps.hw_lock);
- }
- 
-@@ -3497,7 +3669,7 @@ void intel_enable_gt_powersave(struct dr
- 		ironlake_enable_drps(dev);
- 		ironlake_enable_rc6(dev);
- 		intel_init_emon(dev);
--	} else if ((IS_GEN6(dev) || IS_GEN7(dev)) && !IS_VALLEYVIEW(dev)) {
-+	} else if (IS_GEN6(dev) || IS_GEN7(dev)) {
- 		/*
- 		 * PCU communication is slow and this doesn't need to be
- 		 * done at any specific time, so do this out of our fast path
-@@ -4603,14 +4775,13 @@ int sandybridge_pcode_write(struct drm_i
- 	return 0;
- }
- 
--static int vlv_punit_rw(struct drm_i915_private *dev_priv, u8 opcode,
-+static int vlv_punit_rw(struct drm_i915_private *dev_priv, u32 port, u8 opcode,
- 			u8 addr, u32 *val)
- {
--	u32 cmd, devfn, port, be, bar;
-+	u32 cmd, devfn, be, bar;
- 
- 	bar = 0;
- 	be = 0xf;
--	port = IOSF_PORT_PUNIT;
- 	devfn = PCI_DEVFN(2, 0);
- 
- 	cmd = (devfn << IOSF_DEVFN_SHIFT) | (opcode << IOSF_OPCODE_SHIFT) |
-@@ -4632,7 +4803,7 @@ static int vlv_punit_rw(struct drm_i915_
- 	I915_WRITE(VLV_IOSF_DOORBELL_REQ, cmd);
- 
- 	if (wait_for((I915_READ(VLV_IOSF_DOORBELL_REQ) & IOSF_SB_BUSY) == 0,
--		     500)) {
-+		     5)) {
- 		DRM_ERROR("timeout waiting for pcode %s (%d) to finish\n",
- 			  opcode == PUNIT_OPCODE_REG_READ ? "read" : "write",
- 			  addr);
-@@ -4648,12 +4819,20 @@ static int vlv_punit_rw(struct drm_i915_
- 
- int valleyview_punit_read(struct drm_i915_private *dev_priv, u8 addr, u32 *val)
- {
--	return vlv_punit_rw(dev_priv, PUNIT_OPCODE_REG_READ, addr, val);
-+	return vlv_punit_rw(dev_priv, IOSF_PORT_PUNIT, PUNIT_OPCODE_REG_READ,
-+			    addr, val);
- }
- 
- int valleyview_punit_write(struct drm_i915_private *dev_priv, u8 addr, u32 val)
- {
--	return vlv_punit_rw(dev_priv, PUNIT_OPCODE_REG_WRITE, addr, &val);
-+	return vlv_punit_rw(dev_priv, IOSF_PORT_PUNIT, PUNIT_OPCODE_REG_WRITE,
-+			    addr, &val);
-+}
-+
-+int valleyview_nc_read(struct drm_i915_private *dev_priv, u8 addr, u32 *val)
-+{
-+	return vlv_punit_rw(dev_priv, IOSF_PORT_NC, PUNIT_OPCODE_REG_READ,
-+			    addr, val);
- }
- 
- int vlv_gpu_freq(int ddr_freq, int val)
diff --git a/patches.baytrail/0022-drm-i915-fix-VLV-limits.patch b/patches.baytrail/0022-drm-i915-fix-VLV-limits.patch
deleted file mode 100644
index 8f1f3b4257a1d..0000000000000
--- a/patches.baytrail/0022-drm-i915-fix-VLV-limits.patch
+++ /dev/null
@@ -1,60 +0,0 @@
-From d5658e86973e337eea1ac4c3c4eee2fec09023be Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 18 Apr 2013 21:10:43 +0200
-Subject: drm/i915: fix VLV limits
-
-Magic updates.
-
-v2: use 64 bit types and math (Ville)
-
-v3: Trim out all the m/n/p calculation changes since they are still
-under discussion. Instead squash in a fixup for hdmi limits which
-slipped into a different patch.
-
-Signed-off-by: Pallavi G <pallavi.g@intel.com>
-Signed-off-by: Vijay Purushothaman <vijay.a.purushothaman@intel.com>
-Signed-off-by: Yogesh M <yogesh.mohan.marimuthu@intel.com>
-Signed-off-by: Gajanan Bhat <gajanan.bhat@intel.com>
-Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> (v2)
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 75e539864a133c4d8d6a4aac9f409e0a23d7bc3f)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 8 ++++----
- 1 file changed, 4 insertions(+), 4 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index bda32c4ebf58..717bc1ef7a89 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -396,15 +396,15 @@ static const intel_limit_t intel_limits_vlv_dac = {
- 	.m1 = { .min = 2, .max = 3 },
- 	.m2 = { .min = 11, .max = 156 },
- 	.p = { .min = 10, .max = 30 },
--	.p1 = { .min = 2, .max = 3 },
-+	.p1 = { .min = 1, .max = 3 },
- 	.p2 = { .dot_limit = 270000,
- 		.p2_slow = 2, .p2_fast = 20 },
- 	.find_pll = intel_vlv_find_best_pll,
- };
- 
- static const intel_limit_t intel_limits_vlv_hdmi = {
--	.dot = { .min = 20000, .max = 165000 },
--	.vco = { .min = 4000000, .max = 5994000},
-+	.dot = { .min = 25000, .max = 270000 },
-+	.vco = { .min = 4000000, .max = 6000000 },
- 	.n = { .min = 1, .max = 7 },
- 	.m = { .min = 60, .max = 300 }, /* guess */
- 	.m1 = { .min = 2, .max = 3 },
-@@ -424,7 +424,7 @@ static const intel_limit_t intel_limits_vlv_dp = {
- 	.m1 = { .min = 2, .max = 3 },
- 	.m2 = { .min = 11, .max = 156 },
- 	.p = { .min = 10, .max = 30 },
--	.p1 = { .min = 2, .max = 3 },
-+	.p1 = { .min = 1, .max = 3 },
- 	.p2 = { .dot_limit = 270000,
- 		.p2_slow = 2, .p2_fast = 20 },
- 	.find_pll = intel_vlv_find_best_pll,
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0023-drm-i915-magic-VLV-PLL-registers-in-the-dpio-sideban.patch b/patches.baytrail/0023-drm-i915-magic-VLV-PLL-registers-in-the-dpio-sideban.patch
deleted file mode 100644
index 20b6062afb554..0000000000000
--- a/patches.baytrail/0023-drm-i915-magic-VLV-PLL-registers-in-the-dpio-sideban.patch
+++ /dev/null
@@ -1,183 +0,0 @@
-From 4079198c5f551c1fc4c3f5e986cbc6713f32e7dc Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 18 Apr 2013 22:01:46 +0200
-Subject: drm/i915: magic VLV PLL registers in the dpio sideband
-
-Stolen from a patch with the below impressive sob-section.
-
-Signed-off-by: Pallavi G <pallavi.g@intel.com>
-Signed-off-by: Vijay Purushothaman <vijay.a.purushothaman@intel.com>
-Signed-off-by: Gajanan Bhat <gajanan.bhat@intel.com>
-Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
-Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-[danvet: Drop everything but the header #defines.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 598fac6bf8299ed7ae1852426660be3c265047a4)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_reg.h | 118 +++++++++++++++++++++++++++++++++++++++-
- 1 file changed, 116 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
-index acf0608cc761..a5fe3ba7d00d 100644
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -351,6 +351,8 @@
-  *  0x8100: fast clock controls
-  *
-  * DPIO is VLV only.
-+ *
-+ * Note: digital port B is DDI0, digital pot C is DDI1
-  */
- #define DPIO_PKT			(VLV_DISPLAY_BASE + 0x2100)
- #define  DPIO_RID			(0<<24)
-@@ -367,8 +369,20 @@
- #define  DPIO_SFR_BYPASS		(1<<1)
- #define  DPIO_RESET			(1<<0)
- 
-+#define _DPIO_TX3_SWING_CTL4_A		0x690
-+#define _DPIO_TX3_SWING_CTL4_B		0x2a90
-+#define DPIO_TX3_SWING_CTL4(pipe) _PIPE(pipe, _DPIO_TX_SWING_CTL4_A, \
-+					_DPIO_TX3_SWING_CTL4_B)
-+
-+/*
-+ * Per pipe/PLL DPIO regs
-+ */
- #define _DPIO_DIV_A			0x800c
- #define   DPIO_POST_DIV_SHIFT		(28) /* 3 bits */
-+#define   DPIO_POST_DIV_DAC		0
-+#define   DPIO_POST_DIV_HDMIDP		1 /* DAC 225-400M rate */
-+#define   DPIO_POST_DIV_LVDS1		2
-+#define   DPIO_POST_DIV_LVDS2		3
- #define   DPIO_K_SHIFT			(24) /* 4 bits */
- #define   DPIO_P1_SHIFT			(21) /* 3 bits */
- #define   DPIO_P2_SHIFT			(16) /* 5 bits */
-@@ -394,14 +408,111 @@
- #define _DPIO_CORE_CLK_B		0x803c
- #define DPIO_CORE_CLK(pipe) _PIPE(pipe, _DPIO_CORE_CLK_A, _DPIO_CORE_CLK_B)
- 
-+#define _DPIO_IREF_CTL_A		0x8040
-+#define _DPIO_IREF_CTL_B		0x8060
-+#define DPIO_IREF_CTL(pipe) _PIPE(pipe, _DPIO_IREF_CTL_A, _DPIO_IREF_CTL_B)
-+
-+#define DPIO_IREF_BCAST			0xc044
-+#define _DPIO_IREF_A			0x8044
-+#define _DPIO_IREF_B			0x8064
-+#define DPIO_IREF(pipe) _PIPE(pipe, _DPIO_IREF_A, _DPIO_IREF_B)
-+
-+#define _DPIO_PLL_CML_A			0x804c
-+#define _DPIO_PLL_CML_B			0x806c
-+#define DPIO_PLL_CML(pipe) _PIPE(pipe, _DPIO_PLL_CML_A, _DPIO_PLL_CML_B)
-+
- #define _DPIO_LFP_COEFF_A		0x8048
- #define _DPIO_LFP_COEFF_B		0x8068
- #define DPIO_LFP_COEFF(pipe) _PIPE(pipe, _DPIO_LFP_COEFF_A, _DPIO_LFP_COEFF_B)
- 
-+#define DPIO_CALIBRATION		0x80ac
-+
- #define DPIO_FASTCLK_DISABLE		0x8100
- 
--#define DPIO_DATA_CHANNEL1		0x8220
--#define DPIO_DATA_CHANNEL2		0x8420
-+/*
-+ * Per DDI channel DPIO regs
-+ */
-+
-+#define _DPIO_PCS_TX_0			0x8200
-+#define _DPIO_PCS_TX_1			0x8400
-+#define   DPIO_PCS_TX_LANE2_RESET	(1<<16)
-+#define   DPIO_PCS_TX_LANE1_RESET	(1<<7)
-+#define DPIO_PCS_TX(port) _PORT(port, _DPIO_PCS_TX_0, _DPIO_PCS_TX_1)
-+
-+#define _DPIO_PCS_CLK_0			0x8204
-+#define _DPIO_PCS_CLK_1			0x8404
-+#define   DPIO_PCS_CLK_CRI_RXEB_EIOS_EN	(1<<22)
-+#define   DPIO_PCS_CLK_CRI_RXDIGFILTSG_EN (1<<21)
-+#define   DPIO_PCS_CLK_DATAWIDTH_SHIFT	(6)
-+#define   DPIO_PCS_CLK_SOFT_RESET	(1<<5)
-+#define DPIO_PCS_CLK(port) _PORT(port, _DPIO_PCS_CLK_0, _DPIO_PCS_CLK_1)
-+
-+#define _DPIO_PCS_CTL_OVR1_A		0x8224
-+#define _DPIO_PCS_CTL_OVR1_B		0x8424
-+#define DPIO_PCS_CTL_OVER1(port) _PORT(port, _DPIO_PCS_CTL_OVR1_A, \
-+				       _DPIO_PCS_CTL_OVR1_B)
-+
-+#define _DPIO_PCS_STAGGER0_A		0x822c
-+#define _DPIO_PCS_STAGGER0_B		0x842c
-+#define DPIO_PCS_STAGGER0(port) _PORT(port, _DPIO_PCS_STAGGER0_A, \
-+				      _DPIO_PCS_STAGGER0_B)
-+
-+#define _DPIO_PCS_STAGGER1_A		0x8230
-+#define _DPIO_PCS_STAGGER1_B		0x8430
-+#define DPIO_PCS_STAGGER1(port) _PORT(port, _DPIO_PCS_STAGGER1_A, \
-+				      _DPIO_PCS_STAGGER1_B)
-+
-+#define _DPIO_PCS_CLOCKBUF0_A		0x8238
-+#define _DPIO_PCS_CLOCKBUF0_B		0x8438
-+#define DPIO_PCS_CLOCKBUF0(port) _PORT(port, _DPIO_PCS_CLOCKBUF0_A, \
-+				       _DPIO_PCS_CLOCKBUF0_B)
-+
-+#define _DPIO_PCS_CLOCKBUF8_A		0x825c
-+#define _DPIO_PCS_CLOCKBUF8_B		0x845c
-+#define DPIO_PCS_CLOCKBUF8(port) _PORT(port, _DPIO_PCS_CLOCKBUF8_A, \
-+				       _DPIO_PCS_CLOCKBUF8_B)
-+
-+#define _DPIO_TX_SWING_CTL2_A		0x8288
-+#define _DPIO_TX_SWING_CTL2_B		0x8488
-+#define DPIO_TX_SWING_CTL2(port) _PORT(port, _DPIO_TX_SWING_CTL2_A, \
-+				       _DPIO_TX_SWING_CTL2_B)
-+
-+#define _DPIO_TX_SWING_CTL3_A		0x828c
-+#define _DPIO_TX_SWING_CTL3_B		0x848c
-+#define DPIO_TX_SWING_CTL3(port) _PORT(port, _DPIO_TX_SWING_CTL3_A, \
-+				       _DPIO_TX_SWING_CTL3_B)
-+
-+#define _DPIO_TX_SWING_CTL4_A		0x8290
-+#define _DPIO_TX_SWING_CTL4_B		0x8490
-+#define DPIO_TX_SWING_CTL4(port) _PORT(port, _DPIO_TX_SWING_CTL4_A, \
-+				       _DPIO_TX_SWING_CTL4_B)
-+
-+#define _DPIO_TX_OCALINIT_0		0x8294
-+#define _DPIO_TX_OCALINIT_1		0x8494
-+#define   DPIO_TX_OCALINIT_EN		(1<<31)
-+#define DPIO_TX_OCALINIT(port) _PORT(port, _DPIO_TX_OCALINIT_0, \
-+				     _DPIO_TX_OCALINIT_1)
-+
-+#define _DPIO_TX_CTL_0			0x82ac
-+#define _DPIO_TX_CTL_1			0x84ac
-+#define DPIO_TX_CTL(port) _PORT(port, _DPIO_TX_CTL_0, _DPIO_TX_CTL_1)
-+
-+#define _DPIO_TX_LANE_0			0x82b8
-+#define _DPIO_TX_LANE_1			0x84b8
-+#define DPIO_TX_LANE(port) _PORT(port, _DPIO_TX_LANE_0, _DPIO_TX_LANE_1)
-+
-+#define _DPIO_DATA_CHANNEL1		0x8220
-+#define _DPIO_DATA_CHANNEL2		0x8420
-+#define DPIO_DATA_CHANNEL(port) _PORT(port, _DPIO_DATA_CHANNEL1, _DPIO_DATA_CHANNEL2)
-+
-+#define _DPIO_PORT0_PCS0		0x0220
-+#define _DPIO_PORT0_PCS1		0x0420
-+#define _DPIO_PORT1_PCS2		0x2620
-+#define _DPIO_PORT1_PCS3		0x2820
-+#define DPIO_DATA_LANE_A(port) _PORT(port, _DPIO_PORT0_PCS0, _DPIO_PORT1_PCS2)
-+#define DPIO_DATA_LANE_B(port) _PORT(port, _DPIO_PORT0_PCS1, _DPIO_PORT1_PCS3)
-+#define DPIO_DATA_CHANNEL1              0x8220
-+#define DPIO_DATA_CHANNEL2              0x8420
- 
- /*
-  * Fence registers
-@@ -965,7 +1076,10 @@
- #define   DPLL_FPA01_P1_POST_DIV_MASK	0x00ff0000 /* i915 */
- #define   DPLL_FPA01_P1_POST_DIV_MASK_PINEVIEW	0x00ff8000 /* Pineview */
- #define   DPLL_LOCK_VLV			(1<<15)
-+#define   DPLL_INTEGRATED_CRI_CLK_VLV	(1<<14)
- #define   DPLL_INTEGRATED_CLOCK_VLV	(1<<13)
-+#define   DPLL_PORTC_READY_MASK		(0xf << 4)
-+#define   DPLL_PORTB_READY_MASK		(0xf)
- 
- #define   DPLL_FPA01_P1_POST_DIV_MASK_I830	0x001f0000
- /*
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0024-drm-i915-dp-program-VSwing-and-Preemphasis-control-s.patch b/patches.baytrail/0024-drm-i915-dp-program-VSwing-and-Preemphasis-control-s.patch
deleted file mode 100644
index ba279346bbcf5..0000000000000
--- a/patches.baytrail/0024-drm-i915-dp-program-VSwing-and-Preemphasis-control-s.patch
+++ /dev/null
@@ -1,217 +0,0 @@
-From 99fc35d67bde57ea86f8c197fde5614988008f8a Mon Sep 17 00:00:00 2001
-From: Pallavi G <pallavi.g@intel.com>
-Date: Thu, 18 Apr 2013 14:44:28 -0700
-Subject: drm/i915/dp: program VSwing and Preemphasis control settings on VLV
- v2
-
-Program few Tx buffer Swing control settings through DPIO.
-
-v2: fix up codingstyle (Daniel)
-    call from set_signal_levels (Ville, Daniel)
-    use proper port numbers (Jesse)
-
-Signed-off-by: Pallavi G <pallavi.g@intel.com>
-Signed-off-by: Yogesh M <yogesh.mohan.marimuthu@intel.com>
-Signed-off-by: Gajanan Bhat <gajanan.bhat@intel.com>
-Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> (v2 changes)
-[danvet: Reorder if-ladder to avoid two IS_VLV checks.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit e2fa6fba3d2fa03a5efdedf0b6f045fcc3428a80)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c |   3 +-
- drivers/gpu/drm/i915/intel_dp.c      | 128 ++++++++++++++++++++++++++++++++++-
- drivers/gpu/drm/i915/intel_drv.h     |   2 +
- 3 files changed, 128 insertions(+), 5 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 717bc1ef7a89..7b52c0f729d5 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -450,8 +450,7 @@ u32 intel_dpio_read(struct drm_i915_private *dev_priv, int reg)
- 	return I915_READ(DPIO_DATA);
- }
- 
--static void intel_dpio_write(struct drm_i915_private *dev_priv, int reg,
--			     u32 val)
-+void intel_dpio_write(struct drm_i915_private *dev_priv, int reg, u32 val)
- {
- 	WARN_ON(!mutex_is_locked(&dev_priv->dpio_lock));
- 
-diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
-index 80feaec88d2b..cd460c90e4aa 100644
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -1463,7 +1463,9 @@ intel_dp_voltage_max(struct intel_dp *intel_dp)
- {
- 	struct drm_device *dev = intel_dp_to_dev(intel_dp);
- 
--	if (IS_GEN7(dev) && is_cpu_edp(intel_dp))
-+	if (IS_VALLEYVIEW(dev))
-+		return DP_TRAIN_VOLTAGE_SWING_1200;
-+	else if (IS_GEN7(dev) && is_cpu_edp(intel_dp))
- 		return DP_TRAIN_VOLTAGE_SWING_800;
- 	else if (HAS_PCH_CPT(dev) && !is_cpu_edp(intel_dp))
- 		return DP_TRAIN_VOLTAGE_SWING_1200;
-@@ -1488,7 +1490,19 @@ intel_dp_pre_emphasis_max(struct intel_dp *intel_dp, uint8_t voltage_swing)
- 		default:
- 			return DP_TRAIN_PRE_EMPHASIS_0;
- 		}
--	} else if (IS_GEN7(dev) && is_cpu_edp(intel_dp) && !IS_VALLEYVIEW(dev)) {
-+	} else if (IS_VALLEYVIEW(dev)) {
-+		switch (voltage_swing & DP_TRAIN_VOLTAGE_SWING_MASK) {
-+		case DP_TRAIN_VOLTAGE_SWING_400:
-+			return DP_TRAIN_PRE_EMPHASIS_9_5;
-+		case DP_TRAIN_VOLTAGE_SWING_600:
-+			return DP_TRAIN_PRE_EMPHASIS_6;
-+		case DP_TRAIN_VOLTAGE_SWING_800:
-+			return DP_TRAIN_PRE_EMPHASIS_3_5;
-+		case DP_TRAIN_VOLTAGE_SWING_1200:
-+		default:
-+			return DP_TRAIN_PRE_EMPHASIS_0;
-+		}
-+	} else if (IS_GEN7(dev) && is_cpu_edp(intel_dp)) {
- 		switch (voltage_swing & DP_TRAIN_VOLTAGE_SWING_MASK) {
- 		case DP_TRAIN_VOLTAGE_SWING_400:
- 			return DP_TRAIN_PRE_EMPHASIS_6;
-@@ -1513,6 +1527,111 @@ intel_dp_pre_emphasis_max(struct intel_dp *intel_dp, uint8_t voltage_swing)
- 	}
- }
- 
-+static uint32_t intel_vlv_signal_levels(struct intel_dp *intel_dp)
-+{
-+	struct drm_device *dev = intel_dp_to_dev(intel_dp);
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct intel_digital_port *dport = dp_to_dig_port(intel_dp);
-+	unsigned long demph_reg_value, preemph_reg_value,
-+		uniqtranscale_reg_value;
-+	uint8_t train_set = intel_dp->train_set[0];
-+	int port;
-+
-+	if (dport->port == PORT_B)
-+		port = 0;
-+	else if (dport->port == PORT_C)
-+		port = 1;
-+	else
-+		BUG();
-+
-+	switch (train_set & DP_TRAIN_PRE_EMPHASIS_MASK) {
-+	case DP_TRAIN_PRE_EMPHASIS_0:
-+		preemph_reg_value = 0x0004000;
-+		switch (train_set & DP_TRAIN_VOLTAGE_SWING_MASK) {
-+		case DP_TRAIN_VOLTAGE_SWING_400:
-+			demph_reg_value = 0x2B405555;
-+			uniqtranscale_reg_value = 0x552AB83A;
-+			break;
-+		case DP_TRAIN_VOLTAGE_SWING_600:
-+			demph_reg_value = 0x2B404040;
-+			uniqtranscale_reg_value = 0x5548B83A;
-+			break;
-+		case DP_TRAIN_VOLTAGE_SWING_800:
-+			demph_reg_value = 0x2B245555;
-+			uniqtranscale_reg_value = 0x5560B83A;
-+			break;
-+		case DP_TRAIN_VOLTAGE_SWING_1200:
-+			demph_reg_value = 0x2B405555;
-+			uniqtranscale_reg_value = 0x5598DA3A;
-+			break;
-+		default:
-+			return 0;
-+		}
-+		break;
-+	case DP_TRAIN_PRE_EMPHASIS_3_5:
-+		preemph_reg_value = 0x0002000;
-+		switch (train_set & DP_TRAIN_VOLTAGE_SWING_MASK) {
-+		case DP_TRAIN_VOLTAGE_SWING_400:
-+			demph_reg_value = 0x2B404040;
-+			uniqtranscale_reg_value = 0x5552B83A;
-+			break;
-+		case DP_TRAIN_VOLTAGE_SWING_600:
-+			demph_reg_value = 0x2B404848;
-+			uniqtranscale_reg_value = 0x5580B83A;
-+			break;
-+		case DP_TRAIN_VOLTAGE_SWING_800:
-+			demph_reg_value = 0x2B404040;
-+			uniqtranscale_reg_value = 0x55ADDA3A;
-+			break;
-+		default:
-+			return 0;
-+		}
-+		break;
-+	case DP_TRAIN_PRE_EMPHASIS_6:
-+		preemph_reg_value = 0x0000000;
-+		switch (train_set & DP_TRAIN_VOLTAGE_SWING_MASK) {
-+		case DP_TRAIN_VOLTAGE_SWING_400:
-+			demph_reg_value = 0x2B305555;
-+			uniqtranscale_reg_value = 0x5570B83A;
-+			break;
-+		case DP_TRAIN_VOLTAGE_SWING_600:
-+			demph_reg_value = 0x2B2B4040;
-+			uniqtranscale_reg_value = 0x55ADDA3A;
-+			break;
-+		default:
-+			return 0;
-+		}
-+		break;
-+	case DP_TRAIN_PRE_EMPHASIS_9_5:
-+		preemph_reg_value = 0x0006000;
-+		switch (train_set & DP_TRAIN_VOLTAGE_SWING_MASK) {
-+		case DP_TRAIN_VOLTAGE_SWING_400:
-+			demph_reg_value = 0x1B405555;
-+			uniqtranscale_reg_value = 0x55ADDA3A;
-+			break;
-+		default:
-+			return 0;
-+		}
-+		break;
-+	default:
-+		return 0;
-+	}
-+
-+	/* eDP is only on port C */
-+	mutex_lock(&dev_priv->dpio_lock);
-+	intel_dpio_write(dev_priv, DPIO_TX_OCALINIT(port), 0x00000000);
-+	intel_dpio_write(dev_priv, DPIO_TX_SWING_CTL4(port), demph_reg_value);
-+	intel_dpio_write(dev_priv, DPIO_TX_SWING_CTL2(port),
-+			 uniqtranscale_reg_value);
-+	intel_dpio_write(dev_priv, DPIO_TX_SWING_CTL3(port), 0x0C782040);
-+	intel_dpio_write(dev_priv, DPIO_PCS_STAGGER0(port), 0x00030000);
-+	intel_dpio_write(dev_priv, DPIO_PCS_CTL_OVER1(port), preemph_reg_value);
-+	intel_dpio_write(dev_priv, DPIO_TX_OCALINIT(port), 0x80000000);
-+	mutex_unlock(&dev_priv->dpio_lock);
-+
-+	return 0;
-+}
-+
- static void
- intel_get_adjust_train(struct intel_dp *intel_dp, uint8_t link_status[DP_LINK_STATUS_SIZE])
- {
-@@ -1687,7 +1806,10 @@ intel_dp_set_signal_levels(struct intel_dp *intel_dp, uint32_t *DP)
- 	if (HAS_DDI(dev)) {
- 		signal_levels = intel_hsw_signal_levels(train_set);
- 		mask = DDI_BUF_EMP_MASK;
--	} else if (IS_GEN7(dev) && is_cpu_edp(intel_dp) && !IS_VALLEYVIEW(dev)) {
-+	} else if (IS_VALLEYVIEW(dev)) {
-+		signal_levels = intel_vlv_signal_levels(intel_dp);
-+		mask = 0;
-+	} else if (IS_GEN7(dev) && is_cpu_edp(intel_dp)) {
- 		signal_levels = intel_gen7_edp_signal_levels(train_set);
- 		mask = EDP_LINK_TRAIN_VOL_EMP_MASK_IVB;
- 	} else if (IS_GEN6(dev) && is_cpu_edp(intel_dp)) {
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index 7cd55843e73e..4b8bec2ca2ab 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -690,6 +690,8 @@ extern int intel_sprite_get_colorkey(struct drm_device *dev, void *data,
- 				     struct drm_file *file_priv);
- 
- extern u32 intel_dpio_read(struct drm_i915_private *dev_priv, int reg);
-+extern void intel_dpio_write(struct drm_i915_private *dev_priv, int reg,
-+			     u32 val);
- 
- /* Power-related functions, located in intel_pm.c */
- extern void intel_init_pm(struct drm_device *dev);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0025-drm-i915-drop-init_dpio-shouldn-t-be-needed.patch b/patches.baytrail/0025-drm-i915-drop-init_dpio-shouldn-t-be-needed.patch
deleted file mode 100644
index a58c40455b0a3..0000000000000
--- a/patches.baytrail/0025-drm-i915-drop-init_dpio-shouldn-t-be-needed.patch
+++ /dev/null
@@ -1,47 +0,0 @@
-From e7c5a2856cd2fc6f7ad6e5b71a23c741e8d77b5a Mon Sep 17 00:00:00 2001
-From: Jesse Barnes <jbarnes@virtuousgeek.org>
-Date: Thu, 18 Apr 2013 14:44:29 -0700
-Subject: drm/i915: drop init_dpio, shouldn't be needed
-
-This is a reset feature we don't actually need.
-
-Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-[danvet: Make it compile.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 78c9b7e71d90f32ce19d4a575a1a206cfe7c6a00)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c |   14 --------------
- 1 file changed, 14 deletions(-)
-
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -467,17 +467,6 @@ void intel_dpio_write(struct drm_i915_pr
- 		DRM_ERROR("DPIO write wait timed out\n");
- }
- 
--static void vlv_init_dpio(struct drm_device *dev)
--{
--	struct drm_i915_private *dev_priv = dev->dev_private;
--
--	/* Reset the DPIO config */
--	I915_WRITE(DPIO_CTL, 0);
--	POSTING_READ(DPIO_CTL);
--	I915_WRITE(DPIO_CTL, 1);
--	POSTING_READ(DPIO_CTL);
--}
--
- static const intel_limit_t *intel_ironlake_limit(struct drm_crtc *crtc,
- 						int refclk)
- {
-@@ -9486,9 +9475,6 @@ void intel_modeset_cleanup(struct drm_de
- 
- 	ironlake_teardown_rc6(dev);
- 
--	if (IS_VALLEYVIEW(dev))
--		vlv_init_dpio(dev);
--
- 	mutex_unlock(&dev->struct_mutex);
- 
- 	/* Disable the irq before mode object teardown, for the irq might
diff --git a/patches.baytrail/0026-drm-i915-update-VLV-PLL-and-DPIO-code-v11.patch b/patches.baytrail/0026-drm-i915-update-VLV-PLL-and-DPIO-code-v11.patch
deleted file mode 100644
index cb9531237e044..0000000000000
--- a/patches.baytrail/0026-drm-i915-update-VLV-PLL-and-DPIO-code-v11.patch
+++ /dev/null
@@ -1,653 +0,0 @@
-From 8aba3a4c6aa58f5eccb37f3c27b4e4b2919e4252 Mon Sep 17 00:00:00 2001
-From: Jesse Barnes <jbarnes@virtuousgeek.org>
-Date: Thu, 18 Apr 2013 14:51:36 -0700
-Subject: drm/i915: update VLV PLL and DPIO code v11
-
-In Valleyview voltage swing, pre-emphasis and lane control registers can
-be programmed only through the h/w side band fabric.  Update
-vlv_update_pll, i9xx_crtc_enable, and intel_enable_pll with the
-appropriate programming.
-
-We need to make sure that the tx lane reset occurs in both the full mode
-set and DPMS paths, so factor things out to allow that.
-
-v2: use different DPIO_DIVISOR values for VGA and DisplayPort
-v3: Fix update pll logic to use same DPIO_DIVISOR & DPIO_REFSFR values
-        for all display interfaces
-v4: collapse with various updates
-v5: squash with crtc enable/pll enable bits
-v6: split out DP code (jbarnes)
-    put phyready check under IS_VALLEYVIEW (jbarnes)
-    remove unneeded check in 9xx pll div update (Jani)
-    wrap VLV pll update call in IS_VALLEYVIEW (Jani)
-    move port enable back to end of crtc enable (jbarnes)
-    put phyready check under IS_VALLEYVIEW (jbarnes)
-v7: fix up conflicts against latest drm-intel-next-queued
-v8: use DPIO reg names, fix pipes (Jani)
-    from mPhy_registers_VLV2_ww20p5 doc
-v9: update to latest info from driver enabling notes doc
-    driver_vbios_notes_9
-v10: fixup a bit of pipe/port confusion to allow eDP and HDMI to work
-     simultaneously (Jesse)
-v11: use pll/port callbacks for DPIO port activity (Daniel)
-     use separate VLV CRTC enable function (Daniel)
-     move around port ready checks (Jesse)
-
-Signed-off-by: Pallavi G <pallavi.g@intel.com>
-Signed-off-by: Vijay Purushothaman <vijay.a.purushothaman@intel.com>
-Signed-off-by: Gajanan Bhat <gajanan.bhat@intel.com>
-Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
-Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-[danvet: Drop pfit changes and add a little comment explaining that
-vlv has a different enable sequence and so needs it's own crtc_enable
-callback. Also apply a fixup patch from Wu Fengguang to shut up some
-compiler warnings.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 89b667f86a62a99a7b484a7e1b3f8f7a108a7dee)
-[dbasehore: Fixed Issue with number of arguments to function. 4th
-argument should not be removed (yet)]
-Signed-off-by: Derek Basehore <dbasehore@chromium.org>
-
-Conflicts:
-	drivers/gpu/drm/i915/intel_display.c
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c |  235 ++++++++++++++++++++++++++---------
- drivers/gpu/drm/i915/intel_dp.c      |   69 +++++++++-
- drivers/gpu/drm/i915/intel_drv.h     |   14 ++
- drivers/gpu/drm/i915/intel_hdmi.c    |  108 ++++++++++++++++
- 4 files changed, 369 insertions(+), 57 deletions(-)
-
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -1576,6 +1576,20 @@ intel_sbi_read(struct drm_i915_private *
- 	return I915_READ(SBI_DATA);
- }
- 
-+void vlv_wait_port_ready(struct drm_i915_private *dev_priv, int port)
-+{
-+	u32 port_mask;
-+
-+	if (!port)
-+		port_mask = DPLL_PORTB_READY_MASK;
-+	else
-+		port_mask = DPLL_PORTC_READY_MASK;
-+
-+	if (wait_for((I915_READ(DPLL(0)) & port_mask) == 0, 1000))
-+		WARN(1, "timed out waiting for port %c ready: 0x%08x\n",
-+		     'B' + port, I915_READ(DPLL(0)));
-+}
-+
- /**
-  * ironlake_enable_pch_pll - enable PCH PLL
-  * @dev_priv: i915 private structure
-@@ -3678,6 +3692,52 @@ g4x_fixup_plane(struct drm_i915_private
- 	}
- }
- 
-+static void valleyview_crtc_enable(struct drm_crtc *crtc)
-+{
-+	struct drm_device *dev = crtc->dev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
-+	struct intel_encoder *encoder;
-+	int pipe = intel_crtc->pipe;
-+	int plane = intel_crtc->plane;
-+
-+	WARN_ON(!crtc->enabled);
-+
-+	if (intel_crtc->active)
-+		return;
-+
-+	intel_crtc->active = true;
-+	intel_update_watermarks(dev);
-+
-+	mutex_lock(&dev_priv->dpio_lock);
-+
-+	for_each_encoder_on_crtc(dev, crtc, encoder)
-+		if (encoder->pre_pll_enable)
-+			encoder->pre_pll_enable(encoder);
-+
-+	intel_enable_pll(dev_priv, pipe);
-+
-+	for_each_encoder_on_crtc(dev, crtc, encoder)
-+		if (encoder->pre_enable)
-+			encoder->pre_enable(encoder);
-+
-+	/* VLV wants encoder enabling _before_ the pipe is up. */
-+	for_each_encoder_on_crtc(dev, crtc, encoder)
-+		encoder->enable(encoder);
-+
-+	intel_enable_pipe(dev_priv, pipe, false);
-+	intel_enable_plane(dev_priv, plane, pipe);
-+
-+	intel_crtc_load_lut(crtc);
-+	intel_update_fbc(dev);
-+
-+	/* Give the overlay scaler a chance to enable if it's on this pipe */
-+	intel_crtc_dpms_overlay(intel_crtc, true);
-+	intel_crtc_update_cursor(crtc, true);
-+
-+	mutex_unlock(&dev_priv->dpio_lock);
-+}
-+
- static void i9xx_crtc_enable(struct drm_crtc *crtc)
- {
- 	struct drm_device *dev = crtc->dev;
-@@ -3766,6 +3826,10 @@ static void i9xx_crtc_disable(struct drm
- 
- 	i9xx_pfit_disable(intel_crtc);
- 
-+	for_each_encoder_on_crtc(dev, crtc, encoder)
-+		if (encoder->post_disable)
-+			encoder->post_disable(encoder);
-+
- 	intel_disable_pll(dev_priv, pipe);
- 
- 	intel_crtc->active = false;
-@@ -4214,6 +4278,34 @@ static void i9xx_update_pll_dividers(str
- 	}
- }
- 
-+static void vlv_pllb_recal_opamp(struct drm_i915_private *dev_priv)
-+{
-+	u32 reg_val;
-+
-+	/*
-+	 * PLLB opamp always calibrates to max value of 0x3f, force enable it
-+	 * and set it to a reasonable value instead.
-+	 */
-+	reg_val = intel_dpio_read(dev_priv, DPIO_IREF(1));
-+	reg_val &= 0xffffff00;
-+	reg_val |= 0x00000030;
-+	intel_dpio_write(dev_priv, DPIO_IREF(1), reg_val);
-+
-+	reg_val = intel_dpio_read(dev_priv, DPIO_CALIBRATION);
-+	reg_val &= 0x8cffffff;
-+	reg_val = 0x8c000000;
-+	intel_dpio_write(dev_priv, DPIO_CALIBRATION, reg_val);
-+
-+	reg_val = intel_dpio_read(dev_priv, DPIO_IREF(1));
-+	reg_val &= 0xffffff00;
-+	intel_dpio_write(dev_priv, DPIO_IREF(1), reg_val);
-+
-+	reg_val = intel_dpio_read(dev_priv, DPIO_CALIBRATION);
-+	reg_val &= 0x00ffffff;
-+	reg_val |= 0xb0000000;
-+	intel_dpio_write(dev_priv, DPIO_CALIBRATION, reg_val);
-+}
-+
- static void intel_dp_set_m_n(struct intel_crtc *crtc)
- {
- 	if (crtc->config.has_pch_encoder)
-@@ -4226,24 +4318,18 @@ static void vlv_update_pll(struct intel_
- {
- 	struct drm_device *dev = crtc->base.dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct drm_display_mode *adjusted_mode =
-+		&crtc->config.adjusted_mode;
-+	struct intel_encoder *encoder;
- 	int pipe = crtc->pipe;
--	u32 dpll, mdiv, pdiv;
-+	u32 dpll, mdiv;
- 	u32 bestn, bestm1, bestm2, bestp1, bestp2;
--	bool is_sdvo;
--	u32 temp;
-+	bool is_hdmi;
-+	u32 coreclk, reg_val, temp;
- 
- 	mutex_lock(&dev_priv->dpio_lock);
- 
--	is_sdvo = intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_SDVO) ||
--		intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_HDMI);
--
--	dpll = DPLL_VGA_MODE_DIS;
--	dpll |= DPLL_EXT_BUFFER_ENABLE_VLV;
--	dpll |= DPLL_REFA_CLK_ENABLE_VLV;
--	dpll |= DPLL_INTEGRATED_CLOCK_VLV;
--
--	I915_WRITE(DPLL(pipe), dpll);
--	POSTING_READ(DPLL(pipe));
-+	is_hdmi = intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_HDMI);
- 
- 	bestn = crtc->config.dpll.n;
- 	bestm1 = crtc->config.dpll.m1;
-@@ -4251,72 +4337,106 @@ static void vlv_update_pll(struct intel_
- 	bestp1 = crtc->config.dpll.p1;
- 	bestp2 = crtc->config.dpll.p2;
- 
--	/*
--	 * In Valleyview PLL and program lane counter registers are exposed
--	 * through DPIO interface
--	 */
-+	/* See eDP HDMI DPIO driver vbios notes doc */
-+
-+	/* PLL B needs special handling */
-+	if (pipe)
-+		vlv_pllb_recal_opamp(dev_priv);
-+
-+	/* Set up Tx target for periodic Rcomp update */
-+	intel_dpio_write(dev_priv, DPIO_IREF_BCAST, 0x0100000f);
-+
-+	/* Disable target IRef on PLL */
-+	reg_val = intel_dpio_read(dev_priv, DPIO_IREF_CTL(pipe));
-+	reg_val &= 0x00ffffff;
-+	intel_dpio_write(dev_priv, DPIO_IREF_CTL(pipe), reg_val);
-+
-+	/* Disable fast lock */
-+	intel_dpio_write(dev_priv, DPIO_FASTCLK_DISABLE, 0x610);
-+
-+	/* Set idtafcrecal before PLL is enabled */
- 	mdiv = ((bestm1 << DPIO_M1DIV_SHIFT) | (bestm2 & DPIO_M2DIV_MASK));
- 	mdiv |= ((bestp1 << DPIO_P1_SHIFT) | (bestp2 << DPIO_P2_SHIFT));
- 	mdiv |= ((bestn << DPIO_N_SHIFT));
--	mdiv |= (1 << DPIO_POST_DIV_SHIFT);
- 	mdiv |= (1 << DPIO_K_SHIFT);
-+	if (intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_HDMI) ||
-+	    intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_EDP) ||
-+	    intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_DISPLAYPORT))
-+		mdiv |= (DPIO_POST_DIV_HDMIDP << DPIO_POST_DIV_SHIFT);
-+	intel_dpio_write(dev_priv, DPIO_DIV(pipe), mdiv);
-+
- 	mdiv |= DPIO_ENABLE_CALIBRATION;
- 	intel_dpio_write(dev_priv, DPIO_DIV(pipe), mdiv);
- 
--	intel_dpio_write(dev_priv, DPIO_CORE_CLK(pipe), 0x01000000);
-+	/* Set HBR and RBR LPF coefficients */
-+	if (adjusted_mode->clock == 162000 ||
-+	    intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_HDMI))
-+		intel_dpio_write(dev_priv, DPIO_LFP_COEFF(pipe),
-+				 0x005f0021);
-+	else
-+		intel_dpio_write(dev_priv, DPIO_LFP_COEFF(pipe),
-+				 0x00d0000f);
- 
--	pdiv = (1 << DPIO_REFSEL_OVERRIDE) | (5 << DPIO_PLL_MODESEL_SHIFT) |
--		(3 << DPIO_BIAS_CURRENT_CTL_SHIFT) | (1<<20) |
--		(7 << DPIO_PLL_REFCLK_SEL_SHIFT) | (8 << DPIO_DRIVER_CTL_SHIFT) |
--		(5 << DPIO_CLK_BIAS_CTL_SHIFT);
--	intel_dpio_write(dev_priv, DPIO_REFSFR(pipe), pdiv);
-+	if (intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_EDP) ||
-+	    intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_DISPLAYPORT)) {
-+		/* Use SSC source */
-+		if (!pipe)
-+			intel_dpio_write(dev_priv, DPIO_REFSFR(pipe),
-+					 0x0df40000);
-+		else
-+			intel_dpio_write(dev_priv, DPIO_REFSFR(pipe),
-+					 0x0df70000);
-+	} else { /* HDMI or VGA */
-+		/* Use bend source */
-+		if (!pipe)
-+			intel_dpio_write(dev_priv, DPIO_REFSFR(pipe),
-+					 0x0df70000);
-+		else
-+			intel_dpio_write(dev_priv, DPIO_REFSFR(pipe),
-+					 0x0df40000);
-+	}
- 
--	intel_dpio_write(dev_priv, DPIO_LFP_COEFF(pipe), 0x005f003b);
-+	coreclk = intel_dpio_read(dev_priv, DPIO_CORE_CLK(pipe));
-+	coreclk = (coreclk & 0x0000ff00) | 0x01c00000;
-+	if (intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_DISPLAYPORT) ||
-+	    intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_EDP))
-+		coreclk |= 0x01000000;
-+	intel_dpio_write(dev_priv, DPIO_CORE_CLK(pipe), coreclk);
- 
--	dpll |= DPLL_VCO_ENABLE;
--	I915_WRITE(DPLL(pipe), dpll);
--	POSTING_READ(DPLL(pipe));
--	if (wait_for(((I915_READ(DPLL(pipe)) & DPLL_LOCK_VLV) == DPLL_LOCK_VLV), 1))
--		DRM_ERROR("DPLL %d failed to lock\n", pipe);
-+	intel_dpio_write(dev_priv, DPIO_PLL_CML(pipe), 0x87871000);
- 
--	intel_dpio_write(dev_priv, DPIO_FASTCLK_DISABLE, 0x620);
-+	for_each_encoder_on_crtc(dev, &crtc->base, encoder)
-+		if (encoder->pre_pll_enable)
-+			encoder->pre_pll_enable(encoder);
- 
--	if (crtc->config.has_dp_encoder)
--		intel_dp_set_m_n(crtc);
-+	/* Enable DPIO clock input */
-+	dpll = DPLL_EXT_BUFFER_ENABLE_VLV | DPLL_REFA_CLK_ENABLE_VLV |
-+		DPLL_VGA_MODE_DIS | DPLL_INTEGRATED_CLOCK_VLV;
-+	if (pipe)
-+		dpll |= DPLL_INTEGRATED_CRI_CLK_VLV;
- 
-+	dpll |= DPLL_VCO_ENABLE;
- 	I915_WRITE(DPLL(pipe), dpll);
--
--	/* Wait for the clocks to stabilize. */
- 	POSTING_READ(DPLL(pipe));
- 	udelay(150);
- 
--	temp = 0;
--	if (is_sdvo) {
-+	if (wait_for(((I915_READ(DPLL(pipe)) & DPLL_LOCK_VLV) == DPLL_LOCK_VLV), 1))
-+		DRM_ERROR("DPLL %d failed to lock\n", pipe);
-+
-+	if (is_hdmi) {
- 		temp = 0;
- 		if (crtc->config.pixel_multiplier > 1) {
- 			temp = (crtc->config.pixel_multiplier - 1)
- 				<< DPLL_MD_UDI_MULTIPLIER_SHIFT;
- 		}
--	}
--	I915_WRITE(DPLL_MD(pipe), temp);
--	POSTING_READ(DPLL_MD(pipe));
- 
--	/* Now program lane control registers */
--	if(intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_DISPLAYPORT)
--	   || intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_HDMI)) {
--		temp = 0x1000C4;
--		if(pipe == 1)
--			temp |= (1 << 21);
--		intel_dpio_write(dev_priv, DPIO_DATA_CHANNEL1, temp);
--	}
--
--	if(intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_EDP)) {
--		temp = 0x1000C4;
--		if(pipe == 1)
--			temp |= (1 << 21);
--		intel_dpio_write(dev_priv, DPIO_DATA_CHANNEL2, temp);
-+		I915_WRITE(DPLL_MD(pipe), temp);
-+		POSTING_READ(DPLL_MD(pipe));
- 	}
- 
-+	if (crtc->config.has_dp_encoder)
-+		intel_dp_set_m_n(crtc);
-+
- 	mutex_unlock(&dev_priv->dpio_lock);
- }
- 
-@@ -8792,6 +8912,13 @@ static void intel_init_display(struct dr
- 		dev_priv->display.crtc_disable = ironlake_crtc_disable;
- 		dev_priv->display.off = ironlake_crtc_off;
- 		dev_priv->display.update_plane = ironlake_update_plane;
-+	} else if (IS_VALLEYVIEW(dev)) {
-+		dev_priv->display.get_pipe_config = i9xx_get_pipe_config;
-+		dev_priv->display.crtc_mode_set = i9xx_crtc_mode_set;
-+		dev_priv->display.crtc_enable = valleyview_crtc_enable;
-+		dev_priv->display.crtc_disable = i9xx_crtc_disable;
-+		dev_priv->display.off = i9xx_crtc_off;
-+		dev_priv->display.update_plane = i9xx_update_plane;
- 	} else {
- 		dev_priv->display.get_pipe_config = i9xx_get_pipe_config;
- 		dev_priv->display.crtc_mode_set = i9xx_crtc_mode_set;
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -1392,15 +1392,77 @@ static void intel_enable_dp(struct intel
- 	intel_dp_complete_link_train(intel_dp);
- 	intel_dp_stop_link_train(intel_dp);
- 	ironlake_edp_backlight_on(intel_dp);
-+
-+	if (IS_VALLEYVIEW(dev)) {
-+		struct intel_digital_port *dport =
-+			enc_to_dig_port(&encoder->base);
-+		int channel = vlv_dport_to_channel(dport);
-+
-+		vlv_wait_port_ready(dev_priv, channel);
-+	}
- }
- 
- static void intel_pre_enable_dp(struct intel_encoder *encoder)
- {
- 	struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
- 	struct drm_device *dev = encoder->base.dev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
- 
- 	if (is_cpu_edp(intel_dp) && !IS_VALLEYVIEW(dev))
- 		ironlake_edp_pll_on(intel_dp);
-+
-+	if (IS_VALLEYVIEW(dev)) {
-+		struct intel_digital_port *dport = enc_to_dig_port(&encoder->base);
-+		struct intel_crtc *intel_crtc =
-+			to_intel_crtc(encoder->base.crtc);
-+		int port = vlv_dport_to_channel(dport);
-+		int pipe = intel_crtc->pipe;
-+		u32 val;
-+
-+		WARN_ON(!mutex_is_locked(&dev_priv->dpio_lock));
-+
-+		val = intel_dpio_read(dev_priv, DPIO_DATA_LANE_A(port));
-+		val = 0;
-+		if (pipe)
-+			val |= (1<<21);
-+		else
-+			val &= ~(1<<21);
-+		val |= 0x001000c4;
-+		intel_dpio_write(dev_priv, DPIO_DATA_CHANNEL(port), val);
-+
-+		intel_dpio_write(dev_priv, DPIO_PCS_CLOCKBUF0(port),
-+				 0x00760018);
-+		intel_dpio_write(dev_priv, DPIO_PCS_CLOCKBUF8(port),
-+				 0x00400888);
-+	}
-+}
-+
-+static void intel_dp_pre_pll_enable(struct intel_encoder *encoder)
-+{
-+	struct intel_digital_port *dport = enc_to_dig_port(&encoder->base);
-+	struct drm_device *dev = encoder->base.dev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	int port = vlv_dport_to_channel(dport);
-+
-+	if (!IS_VALLEYVIEW(dev))
-+		return;
-+
-+	WARN_ON(!mutex_is_locked(&dev_priv->dpio_lock));
-+
-+	/* Program Tx lane resets to default */
-+	intel_dpio_write(dev_priv, DPIO_PCS_TX(port),
-+			 DPIO_PCS_TX_LANE2_RESET |
-+			 DPIO_PCS_TX_LANE1_RESET);
-+	intel_dpio_write(dev_priv, DPIO_PCS_CLK(port),
-+			 DPIO_PCS_CLK_CRI_RXEB_EIOS_EN |
-+			 DPIO_PCS_CLK_CRI_RXDIGFILTSG_EN |
-+			 (1<<DPIO_PCS_CLK_DATAWIDTH_SHIFT) |
-+				 DPIO_PCS_CLK_SOFT_RESET);
-+
-+	/* Fix up inter-pair skew failure */
-+	intel_dpio_write(dev_priv, DPIO_PCS_STAGGER1(port), 0x00750f00);
-+	intel_dpio_write(dev_priv, DPIO_TX_CTL(port), 0x00001500);
-+	intel_dpio_write(dev_priv, DPIO_TX_LANE(port), 0x40400000);
- }
- 
- /*
-@@ -1544,6 +1606,8 @@ static uint32_t intel_vlv_signal_levels(
- 	else
- 		BUG();
- 
-+	WARN_ON(!mutex_is_locked(&dev_priv->dpio_lock));
-+
- 	switch (train_set & DP_TRAIN_PRE_EMPHASIS_MASK) {
- 	case DP_TRAIN_PRE_EMPHASIS_0:
- 		preemph_reg_value = 0x0004000;
-@@ -1617,8 +1681,6 @@ static uint32_t intel_vlv_signal_levels(
- 		return 0;
- 	}
- 
--	/* eDP is only on port C */
--	mutex_lock(&dev_priv->dpio_lock);
- 	intel_dpio_write(dev_priv, DPIO_TX_OCALINIT(port), 0x00000000);
- 	intel_dpio_write(dev_priv, DPIO_TX_SWING_CTL4(port), demph_reg_value);
- 	intel_dpio_write(dev_priv, DPIO_TX_SWING_CTL2(port),
-@@ -1627,7 +1689,6 @@ static uint32_t intel_vlv_signal_levels(
- 	intel_dpio_write(dev_priv, DPIO_PCS_STAGGER0(port), 0x00030000);
- 	intel_dpio_write(dev_priv, DPIO_PCS_CTL_OVER1(port), preemph_reg_value);
- 	intel_dpio_write(dev_priv, DPIO_TX_OCALINIT(port), 0x80000000);
--	mutex_unlock(&dev_priv->dpio_lock);
- 
- 	return 0;
- }
-@@ -3135,6 +3196,8 @@ intel_dp_init(struct drm_device *dev, in
- 	intel_encoder->disable = intel_disable_dp;
- 	intel_encoder->post_disable = intel_post_disable_dp;
- 	intel_encoder->get_hw_state = intel_dp_get_hw_state;
-+	if (IS_VALLEYVIEW(dev))
-+		intel_encoder->pre_pll_enable = intel_dp_pre_pll_enable;
- 
- 	intel_dig_port->port = port;
- 	intel_dig_port->dp.output_reg = output_reg;
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -431,6 +431,19 @@ struct intel_digital_port {
- 	struct intel_hdmi hdmi;
- };
- 
-+static inline int
-+vlv_dport_to_channel(struct intel_digital_port *dport)
-+{
-+	switch (dport->port) {
-+	case PORT_B:
-+		return 0;
-+	case PORT_C:
-+		return 1;
-+	default:
-+		BUG();
-+	}
-+}
-+
- static inline struct drm_crtc *
- intel_get_crtc_for_pipe(struct drm_device *dev, int pipe)
- {
-@@ -607,6 +620,7 @@ intel_pipe_to_cpu_transcoder(struct drm_
- extern void intel_wait_for_vblank(struct drm_device *dev, int pipe);
- extern void intel_wait_for_pipe_off(struct drm_device *dev, int pipe);
- extern int ironlake_get_lanes_required(int target_clock, int link_bw, int bpp);
-+extern void vlv_wait_port_ready(struct drm_i915_private *dev_priv, int port);
- 
- struct intel_load_detect_pipe {
- 	struct drm_framebuffer *release_fb;
---- a/drivers/gpu/drm/i915/intel_hdmi.c
-+++ b/drivers/gpu/drm/i915/intel_hdmi.c
-@@ -697,6 +697,14 @@ static void intel_enable_hdmi(struct int
- 		I915_WRITE(intel_hdmi->hdmi_reg, temp);
- 		POSTING_READ(intel_hdmi->hdmi_reg);
- 	}
-+
-+	if (IS_VALLEYVIEW(dev)) {
-+		struct intel_digital_port *dport =
-+			enc_to_dig_port(&encoder->base);
-+		int channel = vlv_dport_to_channel(dport);
-+
-+		vlv_wait_port_ready(dev_priv, channel);
-+	}
- }
- 
- static void intel_disable_hdmi(struct intel_encoder *encoder)
-@@ -955,6 +963,101 @@ done:
- 	return 0;
- }
- 
-+static void intel_hdmi_pre_enable(struct intel_encoder *encoder)
-+{
-+	struct intel_digital_port *dport = enc_to_dig_port(&encoder->base);
-+	struct drm_device *dev = encoder->base.dev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct intel_crtc *intel_crtc =
-+		to_intel_crtc(encoder->base.crtc);
-+	int port = vlv_dport_to_channel(dport);
-+	int pipe = intel_crtc->pipe;
-+	u32 val;
-+
-+	if (!IS_VALLEYVIEW(dev))
-+		return;
-+
-+	WARN_ON(!mutex_is_locked(&dev_priv->dpio_lock));
-+
-+	/* Enable clock channels for this port */
-+	val = intel_dpio_read(dev_priv, DPIO_DATA_LANE_A(port));
-+	val = 0;
-+	if (pipe)
-+		val |= (1<<21);
-+	else
-+		val &= ~(1<<21);
-+	val |= 0x001000c4;
-+	intel_dpio_write(dev_priv, DPIO_DATA_CHANNEL(port), val);
-+
-+	/* HDMI 1.0V-2dB */
-+	intel_dpio_write(dev_priv, DPIO_TX_OCALINIT(port), 0);
-+	intel_dpio_write(dev_priv, DPIO_TX_SWING_CTL4(port),
-+			 0x2b245f5f);
-+	intel_dpio_write(dev_priv, DPIO_TX_SWING_CTL2(port),
-+			 0x5578b83a);
-+	intel_dpio_write(dev_priv, DPIO_TX_SWING_CTL3(port),
-+			 0x0c782040);
-+	intel_dpio_write(dev_priv, DPIO_TX3_SWING_CTL4(port),
-+			 0x2b247878);
-+	intel_dpio_write(dev_priv, DPIO_PCS_STAGGER0(port), 0x00030000);
-+	intel_dpio_write(dev_priv, DPIO_PCS_CTL_OVER1(port),
-+			 0x00002000);
-+	intel_dpio_write(dev_priv, DPIO_TX_OCALINIT(port),
-+			 DPIO_TX_OCALINIT_EN);
-+
-+	/* Program lane clock */
-+	intel_dpio_write(dev_priv, DPIO_PCS_CLOCKBUF0(port),
-+			 0x00760018);
-+	intel_dpio_write(dev_priv, DPIO_PCS_CLOCKBUF8(port),
-+			 0x00400888);
-+}
-+
-+static void intel_hdmi_pre_pll_enable(struct intel_encoder *encoder)
-+{
-+	struct intel_digital_port *dport = enc_to_dig_port(&encoder->base);
-+	struct drm_device *dev = encoder->base.dev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	int port = vlv_dport_to_channel(dport);
-+
-+	if (!IS_VALLEYVIEW(dev))
-+		return;
-+
-+	WARN_ON(!mutex_is_locked(&dev_priv->dpio_lock));
-+
-+	/* Program Tx lane resets to default */
-+	intel_dpio_write(dev_priv, DPIO_PCS_TX(port),
-+			 DPIO_PCS_TX_LANE2_RESET |
-+			 DPIO_PCS_TX_LANE1_RESET);
-+	intel_dpio_write(dev_priv, DPIO_PCS_CLK(port),
-+			 DPIO_PCS_CLK_CRI_RXEB_EIOS_EN |
-+			 DPIO_PCS_CLK_CRI_RXDIGFILTSG_EN |
-+			 (1<<DPIO_PCS_CLK_DATAWIDTH_SHIFT) |
-+			 DPIO_PCS_CLK_SOFT_RESET);
-+
-+	/* Fix up inter-pair skew failure */
-+	intel_dpio_write(dev_priv, DPIO_PCS_STAGGER1(port), 0x00750f00);
-+	intel_dpio_write(dev_priv, DPIO_TX_CTL(port), 0x00001500);
-+	intel_dpio_write(dev_priv, DPIO_TX_LANE(port), 0x40400000);
-+
-+	intel_dpio_write(dev_priv, DPIO_PCS_CTL_OVER1(port),
-+			 0x00002000);
-+	intel_dpio_write(dev_priv, DPIO_TX_OCALINIT(port),
-+			 DPIO_TX_OCALINIT_EN);
-+}
-+
-+static void intel_hdmi_post_disable(struct intel_encoder *encoder)
-+{
-+	struct intel_digital_port *dport = enc_to_dig_port(&encoder->base);
-+	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
-+	int port = vlv_dport_to_channel(dport);
-+
-+	/* Reset lanes to avoid HDMI flicker (VLV w/a) */
-+	mutex_lock(&dev_priv->dpio_lock);
-+	intel_dpio_write(dev_priv, DPIO_PCS_TX(port), 0x00000000);
-+	intel_dpio_write(dev_priv, DPIO_PCS_CLK(port), 0x00e00060);
-+	mutex_unlock(&dev_priv->dpio_lock);
-+}
-+
- static void intel_hdmi_destroy(struct drm_connector *connector)
- {
- 	drm_sysfs_connector_remove(connector);
-@@ -1094,6 +1197,11 @@ void intel_hdmi_init(struct drm_device *
- 	intel_encoder->enable = intel_enable_hdmi;
- 	intel_encoder->disable = intel_disable_hdmi;
- 	intel_encoder->get_hw_state = intel_hdmi_get_hw_state;
-+	if (IS_VALLEYVIEW(dev)) {
-+		intel_encoder->pre_enable = intel_hdmi_pre_enable;
-+		intel_encoder->pre_pll_enable = intel_hdmi_pre_pll_enable;
-+		intel_encoder->post_disable = intel_hdmi_post_disable;
-+	}
- 
- 	intel_encoder->type = INTEL_OUTPUT_HDMI;
- 	intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
diff --git a/patches.baytrail/0027-drm-i915-report-Gen5-CPU-and-PCH-FIFO-underruns.patch b/patches.baytrail/0027-drm-i915-report-Gen5-CPU-and-PCH-FIFO-underruns.patch
deleted file mode 100644
index f191d475a1ff0..0000000000000
--- a/patches.baytrail/0027-drm-i915-report-Gen5-CPU-and-PCH-FIFO-underruns.patch
+++ /dev/null
@@ -1,587 +0,0 @@
-From e6e1de1d67ec43930bb3470ee5d89e58a882559f Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Fri, 12 Apr 2013 17:57:57 -0300
-Subject: drm/i915: report Gen5+ CPU and PCH FIFO underruns
-
-In this commit we enable both CPU and PCH FIFO underrun reporting and
-start reporting them. We follow a few rules:
-  - after we receive one of these errors, we mask the interrupt, so
-    we won't get an "interrupt storm" and we also won't flood dmesg;
-  - at each mode set we enable the interrupts again, so we'll see each
-    message at most once per mode set;
-  - in the specific places where we need to ignore the errors, we
-    completely mask the interrupts.
-
-The downside of this patch is that since we're completely disabling
-(masking) the interrupts instead of just not printing error messages,
-we will mask more than just what we want on IVB/HSW CPU interrupts
-(due to GEN7_ERR_INT) and on CPT/PPT/LPT PCHs (due to SERR_INT). So
-when we decide to mask PCH FIFO underruns for pipe A on CPT, we'll
-also be masking PCH FIFO underruns for pipe B, because both are
-reported by SERR_INT, which has to be either completely enabled or
-completely disabled (in othe words, there's no way to disable/enable
-specific bits of GEN7_ERR_INT and SERR_INT).
-
-V2: Rename some functions and variables, downgrade messages to
-DRM_DEBUG_DRIVER and rebase.
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Imre Deak <imre.deak@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 8664281b64c457705db72fc60143d03827e75ca9)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c      |  315 ++++++++++++++++++++++++++++++++++-
- drivers/gpu/drm/i915/i915_reg.h      |   13 +
- drivers/gpu/drm/i915/intel_display.c |   14 +
- drivers/gpu/drm/i915/intel_drv.h     |   11 +
- 4 files changed, 342 insertions(+), 11 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -103,6 +103,213 @@ ironlake_disable_display_irq(drm_i915_pr
- 	}
- }
- 
-+static bool ivb_can_enable_err_int(struct drm_device *dev)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct intel_crtc *crtc;
-+	enum pipe pipe;
-+
-+	for_each_pipe(pipe) {
-+		crtc = to_intel_crtc(dev_priv->pipe_to_crtc_mapping[pipe]);
-+
-+		if (crtc->cpu_fifo_underrun_disabled)
-+			return false;
-+	}
-+
-+	return true;
-+}
-+
-+static bool cpt_can_enable_serr_int(struct drm_device *dev)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	enum pipe pipe;
-+	struct intel_crtc *crtc;
-+
-+	for_each_pipe(pipe) {
-+		crtc = to_intel_crtc(dev_priv->pipe_to_crtc_mapping[pipe]);
-+
-+		if (crtc->pch_fifo_underrun_disabled)
-+			return false;
-+	}
-+
-+	return true;
-+}
-+
-+static void ironlake_set_fifo_underrun_reporting(struct drm_device *dev,
-+						 enum pipe pipe, bool enable)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	uint32_t bit = (pipe == PIPE_A) ? DE_PIPEA_FIFO_UNDERRUN :
-+					  DE_PIPEB_FIFO_UNDERRUN;
-+
-+	if (enable)
-+		ironlake_enable_display_irq(dev_priv, bit);
-+	else
-+		ironlake_disable_display_irq(dev_priv, bit);
-+}
-+
-+static void ivybridge_set_fifo_underrun_reporting(struct drm_device *dev,
-+						  bool enable)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+
-+	if (enable) {
-+		if (!ivb_can_enable_err_int(dev))
-+			return;
-+
-+		I915_WRITE(GEN7_ERR_INT, ERR_INT_FIFO_UNDERRUN_A |
-+					 ERR_INT_FIFO_UNDERRUN_B |
-+					 ERR_INT_FIFO_UNDERRUN_C);
-+
-+		ironlake_enable_display_irq(dev_priv, DE_ERR_INT_IVB);
-+	} else {
-+		ironlake_disable_display_irq(dev_priv, DE_ERR_INT_IVB);
-+	}
-+}
-+
-+static void ibx_set_fifo_underrun_reporting(struct intel_crtc *crtc,
-+					    bool enable)
-+{
-+	struct drm_device *dev = crtc->base.dev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	uint32_t bit = (crtc->pipe == PIPE_A) ? SDE_TRANSA_FIFO_UNDER :
-+						SDE_TRANSB_FIFO_UNDER;
-+
-+	if (enable)
-+		I915_WRITE(SDEIMR, I915_READ(SDEIMR) & ~bit);
-+	else
-+		I915_WRITE(SDEIMR, I915_READ(SDEIMR) | bit);
-+
-+	POSTING_READ(SDEIMR);
-+}
-+
-+static void cpt_set_fifo_underrun_reporting(struct drm_device *dev,
-+					    enum transcoder pch_transcoder,
-+					    bool enable)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+
-+	if (enable) {
-+		if (!cpt_can_enable_serr_int(dev))
-+			return;
-+
-+		I915_WRITE(SERR_INT, SERR_INT_TRANS_A_FIFO_UNDERRUN |
-+				     SERR_INT_TRANS_B_FIFO_UNDERRUN |
-+				     SERR_INT_TRANS_C_FIFO_UNDERRUN);
-+
-+		I915_WRITE(SDEIMR, I915_READ(SDEIMR) & ~SDE_ERROR_CPT);
-+	} else {
-+		I915_WRITE(SDEIMR, I915_READ(SDEIMR) | SDE_ERROR_CPT);
-+	}
-+
-+	POSTING_READ(SDEIMR);
-+}
-+
-+/**
-+ * intel_set_cpu_fifo_underrun_reporting - enable/disable FIFO underrun messages
-+ * @dev: drm device
-+ * @pipe: pipe
-+ * @enable: true if we want to report FIFO underrun errors, false otherwise
-+ *
-+ * This function makes us disable or enable CPU fifo underruns for a specific
-+ * pipe. Notice that on some Gens (e.g. IVB, HSW), disabling FIFO underrun
-+ * reporting for one pipe may also disable all the other CPU error interruts for
-+ * the other pipes, due to the fact that there's just one interrupt mask/enable
-+ * bit for all the pipes.
-+ *
-+ * Returns the previous state of underrun reporting.
-+ */
-+bool intel_set_cpu_fifo_underrun_reporting(struct drm_device *dev,
-+					   enum pipe pipe, bool enable)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct drm_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe];
-+	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
-+	unsigned long flags;
-+	bool ret;
-+
-+	spin_lock_irqsave(&dev_priv->irq_lock, flags);
-+
-+	ret = !intel_crtc->cpu_fifo_underrun_disabled;
-+
-+	if (enable == ret)
-+		goto done;
-+
-+	intel_crtc->cpu_fifo_underrun_disabled = !enable;
-+
-+	if (IS_GEN5(dev) || IS_GEN6(dev))
-+		ironlake_set_fifo_underrun_reporting(dev, pipe, enable);
-+	else if (IS_GEN7(dev))
-+		ivybridge_set_fifo_underrun_reporting(dev, enable);
-+
-+done:
-+	spin_unlock_irqrestore(&dev_priv->irq_lock, flags);
-+	return ret;
-+}
-+
-+/**
-+ * intel_set_pch_fifo_underrun_reporting - enable/disable FIFO underrun messages
-+ * @dev: drm device
-+ * @pch_transcoder: the PCH transcoder (same as pipe on IVB and older)
-+ * @enable: true if we want to report FIFO underrun errors, false otherwise
-+ *
-+ * This function makes us disable or enable PCH fifo underruns for a specific
-+ * PCH transcoder. Notice that on some PCHs (e.g. CPT/PPT), disabling FIFO
-+ * underrun reporting for one transcoder may also disable all the other PCH
-+ * error interruts for the other transcoders, due to the fact that there's just
-+ * one interrupt mask/enable bit for all the transcoders.
-+ *
-+ * Returns the previous state of underrun reporting.
-+ */
-+bool intel_set_pch_fifo_underrun_reporting(struct drm_device *dev,
-+					   enum transcoder pch_transcoder,
-+					   bool enable)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	enum pipe p;
-+	struct drm_crtc *crtc;
-+	struct intel_crtc *intel_crtc;
-+	unsigned long flags;
-+	bool ret;
-+
-+	if (HAS_PCH_LPT(dev)) {
-+		crtc = NULL;
-+		for_each_pipe(p) {
-+			struct drm_crtc *c = dev_priv->pipe_to_crtc_mapping[p];
-+			if (intel_pipe_has_type(c, INTEL_OUTPUT_ANALOG)) {
-+				crtc = c;
-+				break;
-+			}
-+		}
-+		if (!crtc) {
-+			DRM_ERROR("PCH FIFO underrun, but no CRTC using the PCH found\n");
-+			return false;
-+		}
-+	} else {
-+		crtc = dev_priv->pipe_to_crtc_mapping[pch_transcoder];
-+	}
-+	intel_crtc = to_intel_crtc(crtc);
-+
-+	spin_lock_irqsave(&dev_priv->irq_lock, flags);
-+
-+	ret = !intel_crtc->pch_fifo_underrun_disabled;
-+
-+	if (enable == ret)
-+		goto done;
-+
-+	intel_crtc->pch_fifo_underrun_disabled = !enable;
-+
-+	if (HAS_PCH_IBX(dev))
-+		ibx_set_fifo_underrun_reporting(intel_crtc, enable);
-+	else
-+		cpt_set_fifo_underrun_reporting(dev, pch_transcoder, enable);
-+
-+done:
-+	spin_unlock_irqrestore(&dev_priv->irq_lock, flags);
-+	return ret;
-+}
-+
-+
- void
- i915_enable_pipestat(drm_i915_private_t *dev_priv, int pipe, u32 mask)
- {
-@@ -791,10 +998,58 @@ static void ibx_irq_handler(struct drm_d
- 	if (pch_iir & (SDE_TRANSB_CRC_ERR | SDE_TRANSA_CRC_ERR))
- 		DRM_DEBUG_DRIVER("PCH transcoder CRC error interrupt\n");
- 
--	if (pch_iir & SDE_TRANSB_FIFO_UNDER)
--		DRM_DEBUG_DRIVER("PCH transcoder B underrun interrupt\n");
- 	if (pch_iir & SDE_TRANSA_FIFO_UNDER)
--		DRM_DEBUG_DRIVER("PCH transcoder A underrun interrupt\n");
-+		if (intel_set_pch_fifo_underrun_reporting(dev, TRANSCODER_A,
-+							  false))
-+			DRM_DEBUG_DRIVER("PCH transcoder A FIFO underrun\n");
-+
-+	if (pch_iir & SDE_TRANSB_FIFO_UNDER)
-+		if (intel_set_pch_fifo_underrun_reporting(dev, TRANSCODER_B,
-+							  false))
-+			DRM_DEBUG_DRIVER("PCH transcoder B FIFO underrun\n");
-+}
-+
-+static void ivb_err_int_handler(struct drm_device *dev)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	u32 err_int = I915_READ(GEN7_ERR_INT);
-+
-+	if (err_int & ERR_INT_FIFO_UNDERRUN_A)
-+		if (intel_set_cpu_fifo_underrun_reporting(dev, PIPE_A, false))
-+			DRM_DEBUG_DRIVER("Pipe A FIFO underrun\n");
-+
-+	if (err_int & ERR_INT_FIFO_UNDERRUN_B)
-+		if (intel_set_cpu_fifo_underrun_reporting(dev, PIPE_B, false))
-+			DRM_DEBUG_DRIVER("Pipe B FIFO underrun\n");
-+
-+	if (err_int & ERR_INT_FIFO_UNDERRUN_C)
-+		if (intel_set_cpu_fifo_underrun_reporting(dev, PIPE_C, false))
-+			DRM_DEBUG_DRIVER("Pipe C FIFO underrun\n");
-+
-+	I915_WRITE(GEN7_ERR_INT, err_int);
-+}
-+
-+static void cpt_serr_int_handler(struct drm_device *dev)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	u32 serr_int = I915_READ(SERR_INT);
-+
-+	if (serr_int & SERR_INT_TRANS_A_FIFO_UNDERRUN)
-+		if (intel_set_pch_fifo_underrun_reporting(dev, TRANSCODER_A,
-+							  false))
-+			DRM_DEBUG_DRIVER("PCH transcoder A FIFO underrun\n");
-+
-+	if (serr_int & SERR_INT_TRANS_B_FIFO_UNDERRUN)
-+		if (intel_set_pch_fifo_underrun_reporting(dev, TRANSCODER_B,
-+							  false))
-+			DRM_DEBUG_DRIVER("PCH transcoder B FIFO underrun\n");
-+
-+	if (serr_int & SERR_INT_TRANS_C_FIFO_UNDERRUN)
-+		if (intel_set_pch_fifo_underrun_reporting(dev, TRANSCODER_C,
-+							  false))
-+			DRM_DEBUG_DRIVER("PCH transcoder C FIFO underrun\n");
-+
-+	I915_WRITE(SERR_INT, serr_int);
- }
- 
- static void cpt_irq_handler(struct drm_device *dev, u32 pch_iir)
-@@ -832,6 +1087,9 @@ static void cpt_irq_handler(struct drm_d
- 			DRM_DEBUG_DRIVER("  pipe %c FDI IIR: 0x%08x\n",
- 					 pipe_name(pipe),
- 					 I915_READ(FDI_RX_IIR(pipe)));
-+
-+	if (pch_iir & SDE_ERROR_CPT)
-+		cpt_serr_int_handler(dev);
- }
- 
- static irqreturn_t ivybridge_irq_handler(int irq, void *arg)
-@@ -844,6 +1102,14 @@ static irqreturn_t ivybridge_irq_handler
- 
- 	atomic_inc(&dev_priv->irq_received);
- 
-+	/* We get interrupts on unclaimed registers, so check for this before we
-+	 * do any I915_{READ,WRITE}. */
-+	if (IS_HASWELL(dev) &&
-+	    (I915_READ_NOTRACE(FPGA_DBG) & FPGA_DBG_RM_NOCLAIM)) {
-+		DRM_ERROR("Unclaimed register before interrupt\n");
-+		I915_WRITE_NOTRACE(FPGA_DBG, FPGA_DBG_RM_NOCLAIM);
-+	}
-+
- 	/* disable master interrupt before clearing iir  */
- 	de_ier = I915_READ(DEIER);
- 	I915_WRITE(DEIER, de_ier & ~DE_MASTER_IRQ_CONTROL);
-@@ -859,6 +1125,12 @@ static irqreturn_t ivybridge_irq_handler
- 		POSTING_READ(SDEIER);
- 	}
- 
-+	/* On Haswell, also mask ERR_INT because we don't want to risk
-+	 * generating "unclaimed register" interrupts from inside the interrupt
-+	 * handler. */
-+	if (IS_HASWELL(dev))
-+		ironlake_disable_display_irq(dev_priv, DE_ERR_INT_IVB);
-+
- 	gt_iir = I915_READ(GTIIR);
- 	if (gt_iir) {
- 		snb_gt_irq_handler(dev, dev_priv, gt_iir);
-@@ -868,6 +1140,9 @@ static irqreturn_t ivybridge_irq_handler
- 
- 	de_iir = I915_READ(DEIIR);
- 	if (de_iir) {
-+		if (de_iir & DE_ERR_INT_IVB)
-+			ivb_err_int_handler(dev);
-+
- 		if (de_iir & DE_AUX_CHANNEL_A_IVB)
- 			dp_aux_irq_handler(dev);
- 
-@@ -905,6 +1180,9 @@ static irqreturn_t ivybridge_irq_handler
- 		ret = IRQ_HANDLED;
- 	}
- 
-+	if (IS_HASWELL(dev) && ivb_can_enable_err_int(dev))
-+		ironlake_enable_display_irq(dev_priv, DE_ERR_INT_IVB);
-+
- 	I915_WRITE(DEIER, de_ier);
- 	POSTING_READ(DEIER);
- 	if (!HAS_PCH_NOP(dev)) {
-@@ -974,6 +1252,14 @@ static irqreturn_t ironlake_irq_handler(
- 	if (de_iir & DE_PIPEB_VBLANK)
- 		drm_handle_vblank(dev, 1);
- 
-+	if (de_iir & DE_PIPEA_FIFO_UNDERRUN)
-+		if (intel_set_cpu_fifo_underrun_reporting(dev, PIPE_A, false))
-+			DRM_DEBUG_DRIVER("Pipe A FIFO underrun\n");
-+
-+	if (de_iir & DE_PIPEB_FIFO_UNDERRUN)
-+		if (intel_set_cpu_fifo_underrun_reporting(dev, PIPE_B, false))
-+			DRM_DEBUG_DRIVER("Pipe B FIFO underrun\n");
-+
- 	if (de_iir & DE_PLANEA_FLIP_DONE) {
- 		intel_prepare_page_flip(dev, 0);
- 		intel_finish_page_flip_plane(dev, 0);
-@@ -2245,10 +2531,14 @@ static void ibx_irq_postinstall(struct d
- 	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
- 	u32 mask;
- 
--	if (HAS_PCH_IBX(dev))
--		mask = SDE_GMBUS | SDE_AUX_MASK;
--	else
--		mask = SDE_GMBUS_CPT | SDE_AUX_MASK_CPT;
-+	if (HAS_PCH_IBX(dev)) {
-+		mask = SDE_GMBUS | SDE_AUX_MASK | SDE_TRANSB_FIFO_UNDER |
-+		       SDE_TRANSA_FIFO_UNDER;
-+	} else {
-+		mask = SDE_GMBUS_CPT | SDE_AUX_MASK_CPT | SDE_ERROR_CPT;
-+
-+		I915_WRITE(SERR_INT, I915_READ(SERR_INT));
-+	}
- 
- 	if (HAS_PCH_NOP(dev))
- 		return;
-@@ -2263,7 +2553,8 @@ static int ironlake_irq_postinstall(stru
- 	/* enable kind of interrupts always enabled */
- 	u32 display_mask = DE_MASTER_IRQ_CONTROL | DE_GSE | DE_PCH_EVENT |
- 			   DE_PLANEA_FLIP_DONE | DE_PLANEB_FLIP_DONE |
--			   DE_AUX_CHANNEL_A;
-+			   DE_AUX_CHANNEL_A | DE_PIPEB_FIFO_UNDERRUN |
-+			   DE_PIPEA_FIFO_UNDERRUN;
- 	u32 render_irqs;
- 
- 	dev_priv->irq_mask = ~display_mask;
-@@ -2313,12 +2604,14 @@ static int ivybridge_irq_postinstall(str
- 		DE_PLANEC_FLIP_DONE_IVB |
- 		DE_PLANEB_FLIP_DONE_IVB |
- 		DE_PLANEA_FLIP_DONE_IVB |
--		DE_AUX_CHANNEL_A_IVB;
-+		DE_AUX_CHANNEL_A_IVB |
-+		DE_ERR_INT_IVB;
- 	u32 render_irqs;
- 
- 	dev_priv->irq_mask = ~display_mask;
- 
- 	/* should always can generate irq */
-+	I915_WRITE(GEN7_ERR_INT, I915_READ(GEN7_ERR_INT));
- 	I915_WRITE(DEIIR, I915_READ(DEIIR));
- 	I915_WRITE(DEIMR, dev_priv->irq_mask);
- 	I915_WRITE(DEIER,
-@@ -2446,6 +2739,8 @@ static void ironlake_irq_uninstall(struc
- 	I915_WRITE(DEIMR, 0xffffffff);
- 	I915_WRITE(DEIER, 0x0);
- 	I915_WRITE(DEIIR, I915_READ(DEIIR));
-+	if (IS_GEN7(dev))
-+		I915_WRITE(GEN7_ERR_INT, I915_READ(GEN7_ERR_INT));
- 
- 	I915_WRITE(GTIMR, 0xffffffff);
- 	I915_WRITE(GTIER, 0x0);
-@@ -2457,6 +2752,8 @@ static void ironlake_irq_uninstall(struc
- 	I915_WRITE(SDEIMR, 0xffffffff);
- 	I915_WRITE(SDEIER, 0x0);
- 	I915_WRITE(SDEIIR, I915_READ(SDEIIR));
-+	if (HAS_PCH_CPT(dev) || HAS_PCH_LPT(dev))
-+		I915_WRITE(SERR_INT, I915_READ(SERR_INT));
- }
- 
- static void i8xx_irq_preinstall(struct drm_device * dev)
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -638,7 +638,10 @@
- 
- #define ERROR_GEN6	0x040a0
- #define GEN7_ERR_INT	0x44040
--#define   ERR_INT_MMIO_UNCLAIMED (1<<13)
-+#define   ERR_INT_MMIO_UNCLAIMED	(1<<13)
-+#define   ERR_INT_FIFO_UNDERRUN_C	(1<<6)
-+#define   ERR_INT_FIFO_UNDERRUN_B	(1<<3)
-+#define   ERR_INT_FIFO_UNDERRUN_A	(1<<0)
- 
- #define FPGA_DBG		0x42300
- #define   FPGA_DBG_RM_NOCLAIM	(1<<31)
-@@ -3626,7 +3629,7 @@
- #define DE_PIPEA_FIFO_UNDERRUN  (1 << 0)
- 
- /* More Ivybridge lolz */
--#define DE_ERR_DEBUG_IVB		(1<<30)
-+#define DE_ERR_INT_IVB			(1<<30)
- #define DE_GSE_IVB			(1<<29)
- #define DE_PCH_EVENT_IVB		(1<<28)
- #define DE_DP_A_HOTPLUG_IVB		(1<<27)
-@@ -3785,6 +3788,7 @@
- 				 SDE_PORTC_HOTPLUG_CPT |	\
- 				 SDE_PORTB_HOTPLUG_CPT)
- #define SDE_GMBUS_CPT		(1 << 17)
-+#define SDE_ERROR_CPT		(1 << 16)
- #define SDE_AUDIO_CP_REQ_C_CPT	(1 << 10)
- #define SDE_AUDIO_CP_CHG_C_CPT	(1 << 9)
- #define SDE_FDI_RXC_CPT		(1 << 8)
-@@ -3809,6 +3813,11 @@
- #define SDEIIR  0xc4008
- #define SDEIER  0xc400c
- 
-+#define SERR_INT			0xc4040
-+#define  SERR_INT_TRANS_C_FIFO_UNDERRUN	(1<<6)
-+#define  SERR_INT_TRANS_B_FIFO_UNDERRUN	(1<<3)
-+#define  SERR_INT_TRANS_A_FIFO_UNDERRUN	(1<<0)
-+
- /* digital port hotplug */
- #define PCH_PORT_HOTPLUG        0xc4030		/* SHOTPLUG_CTL */
- #define PORTD_HOTPLUG_ENABLE            (1 << 20)
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -3346,6 +3346,10 @@ static void ironlake_crtc_enable(struct
- 		return;
- 
- 	intel_crtc->active = true;
-+
-+	intel_set_cpu_fifo_underrun_reporting(dev, pipe, true);
-+	intel_set_pch_fifo_underrun_reporting(dev, pipe, true);
-+
- 	intel_update_watermarks(dev);
- 
- 	if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) {
-@@ -3437,6 +3441,11 @@ static void haswell_crtc_enable(struct d
- 		return;
- 
- 	intel_crtc->active = true;
-+
-+	intel_set_cpu_fifo_underrun_reporting(dev, pipe, true);
-+	if (intel_crtc->config.has_pch_encoder)
-+		intel_set_pch_fifo_underrun_reporting(dev, TRANSCODER_A, true);
-+
- 	intel_update_watermarks(dev);
- 
- 	if (intel_crtc->config.has_pch_encoder)
-@@ -3523,6 +3532,7 @@ static void ironlake_crtc_disable(struct
- 	if (dev_priv->cfb_plane == plane)
- 		intel_disable_fbc(dev);
- 
-+	intel_set_pch_fifo_underrun_reporting(dev, pipe, false);
- 	intel_disable_pipe(dev_priv, pipe);
- 
- 	/* Disable PF */
-@@ -3536,6 +3546,7 @@ static void ironlake_crtc_disable(struct
- 	ironlake_fdi_disable(crtc);
- 
- 	ironlake_disable_pch_transcoder(dev_priv, pipe);
-+	intel_set_pch_fifo_underrun_reporting(dev, pipe, true);
- 
- 	if (HAS_PCH_CPT(dev)) {
- 		/* disable TRANS_DP_CTL */
-@@ -3602,6 +3613,8 @@ static void haswell_crtc_disable(struct
- 	if (dev_priv->cfb_plane == plane)
- 		intel_disable_fbc(dev);
- 
-+	if (intel_crtc->config.has_pch_encoder)
-+		intel_set_pch_fifo_underrun_reporting(dev, TRANSCODER_A, false);
- 	intel_disable_pipe(dev_priv, pipe);
- 
- 	intel_ddi_disable_transcoder_func(dev_priv, cpu_transcoder);
-@@ -3622,6 +3635,7 @@ static void haswell_crtc_disable(struct
- 
- 	if (intel_crtc->config.has_pch_encoder) {
- 		lpt_disable_pch_transcoder(dev_priv);
-+		intel_set_pch_fifo_underrun_reporting(dev, TRANSCODER_A, true);
- 		intel_ddi_fdi_disable(crtc);
- 	}
- 
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -265,6 +265,10 @@ struct intel_crtc {
- 
- 	/* reset counter value when the last flip was submitted */
- 	unsigned int reset_counter;
-+
-+	/* Access to these should be protected by dev_priv->irq_lock. */
-+	bool cpu_fifo_underrun_disabled;
-+	bool pch_fifo_underrun_disabled;
- };
- 
- struct intel_plane {
-@@ -487,6 +491,7 @@ int intel_ddc_get_modes(struct drm_conne
- extern void intel_attach_force_audio_property(struct drm_connector *connector);
- extern void intel_attach_broadcast_rgb_property(struct drm_connector *connector);
- 
-+extern bool intel_pipe_has_type(struct drm_crtc *crtc, int type);
- extern void intel_crt_init(struct drm_device *dev);
- extern void intel_hdmi_init(struct drm_device *dev,
- 			    int hdmi_reg, enum port port);
-@@ -744,5 +749,11 @@ intel_ddi_connector_get_hw_state(struct
- extern void intel_ddi_fdi_disable(struct drm_crtc *crtc);
- 
- extern void intel_display_handle_reset(struct drm_device *dev);
-+extern bool intel_set_cpu_fifo_underrun_reporting(struct drm_device *dev,
-+						  enum pipe pipe,
-+						  bool enable);
-+extern bool intel_set_pch_fifo_underrun_reporting(struct drm_device *dev,
-+						 enum transcoder pch_transcoder,
-+						 bool enable);
- 
- #endif /* __INTEL_DRV_H__ */
diff --git a/patches.baytrail/0028-drm-i915-print-Gen5-CPU-PCH-poison-interrupts.patch b/patches.baytrail/0028-drm-i915-print-Gen5-CPU-PCH-poison-interrupts.patch
deleted file mode 100644
index 3cb65f9f08a81..0000000000000
--- a/patches.baytrail/0028-drm-i915-print-Gen5-CPU-PCH-poison-interrupts.patch
+++ /dev/null
@@ -1,87 +0,0 @@
-From b8e93abe1d9a7e71c40997d861fa216ff96a0082 Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Fri, 12 Apr 2013 17:57:58 -0300
-Subject: drm/i915: print Gen5+ CPU/PCH poison interrupts
-
-This is bad news and shouldn't be happening.
-
-V2: Rebase.
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Imre Deak <imre.deak@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit de032bf40a52dbbada11e071d150d2c062b5527e)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c |   13 +++++++++++--
- drivers/gpu/drm/i915/i915_reg.h |    2 ++
- 2 files changed, 13 insertions(+), 2 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -1014,6 +1014,9 @@ static void ivb_err_int_handler(struct d
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	u32 err_int = I915_READ(GEN7_ERR_INT);
- 
-+	if (err_int & ERR_INT_POISON)
-+		DRM_ERROR("Poison interrupt\n");
-+
- 	if (err_int & ERR_INT_FIFO_UNDERRUN_A)
- 		if (intel_set_cpu_fifo_underrun_reporting(dev, PIPE_A, false))
- 			DRM_DEBUG_DRIVER("Pipe A FIFO underrun\n");
-@@ -1034,6 +1037,9 @@ static void cpt_serr_int_handler(struct
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	u32 serr_int = I915_READ(SERR_INT);
- 
-+	if (serr_int & SERR_INT_POISON)
-+		DRM_ERROR("PCH poison interrupt\n");
-+
- 	if (serr_int & SERR_INT_TRANS_A_FIFO_UNDERRUN)
- 		if (intel_set_pch_fifo_underrun_reporting(dev, TRANSCODER_A,
- 							  false))
-@@ -1252,6 +1258,9 @@ static irqreturn_t ironlake_irq_handler(
- 	if (de_iir & DE_PIPEB_VBLANK)
- 		drm_handle_vblank(dev, 1);
- 
-+	if (de_iir & DE_POISON)
-+		DRM_ERROR("Poison interrupt\n");
-+
- 	if (de_iir & DE_PIPEA_FIFO_UNDERRUN)
- 		if (intel_set_cpu_fifo_underrun_reporting(dev, PIPE_A, false))
- 			DRM_DEBUG_DRIVER("Pipe A FIFO underrun\n");
-@@ -2533,7 +2542,7 @@ static void ibx_irq_postinstall(struct d
- 
- 	if (HAS_PCH_IBX(dev)) {
- 		mask = SDE_GMBUS | SDE_AUX_MASK | SDE_TRANSB_FIFO_UNDER |
--		       SDE_TRANSA_FIFO_UNDER;
-+		       SDE_TRANSA_FIFO_UNDER | SDE_POISON;
- 	} else {
- 		mask = SDE_GMBUS_CPT | SDE_AUX_MASK_CPT | SDE_ERROR_CPT;
- 
-@@ -2554,7 +2563,7 @@ static int ironlake_irq_postinstall(stru
- 	u32 display_mask = DE_MASTER_IRQ_CONTROL | DE_GSE | DE_PCH_EVENT |
- 			   DE_PLANEA_FLIP_DONE | DE_PLANEB_FLIP_DONE |
- 			   DE_AUX_CHANNEL_A | DE_PIPEB_FIFO_UNDERRUN |
--			   DE_PIPEA_FIFO_UNDERRUN;
-+			   DE_PIPEA_FIFO_UNDERRUN | DE_POISON;
- 	u32 render_irqs;
- 
- 	dev_priv->irq_mask = ~display_mask;
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -638,6 +638,7 @@
- 
- #define ERROR_GEN6	0x040a0
- #define GEN7_ERR_INT	0x44040
-+#define   ERR_INT_POISON		(1<<31)
- #define   ERR_INT_MMIO_UNCLAIMED	(1<<13)
- #define   ERR_INT_FIFO_UNDERRUN_C	(1<<6)
- #define   ERR_INT_FIFO_UNDERRUN_B	(1<<3)
-@@ -3814,6 +3815,7 @@
- #define SDEIER  0xc400c
- 
- #define SERR_INT			0xc4040
-+#define  SERR_INT_POISON		(1<<31)
- #define  SERR_INT_TRANS_C_FIFO_UNDERRUN	(1<<6)
- #define  SERR_INT_TRANS_B_FIFO_UNDERRUN	(1<<3)
- #define  SERR_INT_TRANS_A_FIFO_UNDERRUN	(1<<0)
diff --git a/patches.baytrail/0029-drm-i915-check-the-power-well-inside-haswell_get_pip.patch b/patches.baytrail/0029-drm-i915-check-the-power-well-inside-haswell_get_pip.patch
deleted file mode 100644
index 3c313ea85bee6..0000000000000
--- a/patches.baytrail/0029-drm-i915-check-the-power-well-inside-haswell_get_pip.patch
+++ /dev/null
@@ -1,47 +0,0 @@
-From 53aa484893afe71e12b9e73cf75389cfc74ae314 Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Thu, 18 Apr 2013 16:35:40 -0300
-Subject: drm/i915: check the power well inside haswell_get_pipe_config
-
-This fixes "unclaimed register" messages when booting with eDP only
-and i915.disable_power_well=1.
-
-The error messages were caused by:
-
-  commit 0e8ffe1bf81b0780cc6229cb38664754dffe8776
-  Author: Daniel Vetter <daniel.vetter@ffwll.ch>
-  Date:   Thu Mar 28 10:42:00 2013 +0100
-      drm/i915: add hw state readout/checking for pipe_config
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 2bfce95075fa58eaf2ead5b0863c50a3f6098bc2)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 7 ++++++-
- 1 file changed, 6 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 212fb82e0f31..f81c1fce9621 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -5990,9 +5990,14 @@ static bool haswell_get_pipe_config(struct intel_crtc *crtc,
- {
- 	struct drm_device *dev = crtc->base.dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
-+	enum transcoder cpu_transcoder = crtc->config.cpu_transcoder;
- 	uint32_t tmp;
- 
--	tmp = I915_READ(PIPECONF(crtc->config.cpu_transcoder));
-+	if (!intel_using_power_well(dev_priv->dev) &&
-+	    cpu_transcoder != TRANSCODER_EDP)
-+		return false;
-+
-+	tmp = I915_READ(PIPECONF(cpu_transcoder));
- 	if (!(tmp & PIPECONF_ENABLE))
- 		return false;
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0030-drm-i915-use-cpu_transcoder-for-TRANS_DDI_FUNC_CTL.patch b/patches.baytrail/0030-drm-i915-use-cpu_transcoder-for-TRANS_DDI_FUNC_CTL.patch
deleted file mode 100644
index d819ac7222574..0000000000000
--- a/patches.baytrail/0030-drm-i915-use-cpu_transcoder-for-TRANS_DDI_FUNC_CTL.patch
+++ /dev/null
@@ -1,53 +0,0 @@
-From 89cda7e13d3f55c52ccf0f9e4ecb76b9a4ec96d1 Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Thu, 18 Apr 2013 16:35:41 -0300
-Subject: drm/i915: use cpu_transcoder for TRANS_DDI_FUNC_CTL
-
-... inside haswell_get_pipe_config. Because there's one TRANS_DDI_FUNC_CTL
-register per CPU transcoder, not per pipe. This solves "unclaimed register"
-messages when booting with eDP only and using the i915.disable_power_well=1.
-
-Also fix a comment and remove an useless empty line.
-
-The error messages were caused by:
-
-  commit 88adfff1ad5019f65b9d0b4e1a4ac900fb065183
-  Author: Daniel Vetter <daniel.vetter@ffwll.ch>
-  Date:   Thu Mar 28 10:42:01 2013 +0100
-      drm/i915: hw readout support for ->has_pch_encoders
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit f196e6bedb1b8a76f8526798e0feeb7a213e7505)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 5 ++---
- 1 file changed, 2 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index f81c1fce9621..ea83011e454e 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -6002,16 +6002,15 @@ static bool haswell_get_pipe_config(struct intel_crtc *crtc,
- 		return false;
- 
- 	/*
--	 * aswell has only FDI/PCH transcoder A. It is which is connected to
-+	 * Haswell has only FDI/PCH transcoder A. It is which is connected to
- 	 * DDI E. So just check whether this pipe is wired to DDI E and whether
- 	 * the PCH transcoder is on.
- 	 */
--	tmp = I915_READ(TRANS_DDI_FUNC_CTL(crtc->pipe));
-+	tmp = I915_READ(TRANS_DDI_FUNC_CTL(cpu_transcoder));
- 	if ((tmp & TRANS_DDI_PORT_MASK) == TRANS_DDI_SELECT_PORT(PORT_E) &&
- 	    I915_READ(TRANSCONF(PIPE_A)) & TRANS_ENABLE)
- 		pipe_config->has_pch_encoder = true;
- 
--
- 	return true;
- }
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0031-drm-i915-Move-the-CSC_MODE-bits-next-to-the-register.patch b/patches.baytrail/0031-drm-i915-Move-the-CSC_MODE-bits-next-to-the-register.patch
deleted file mode 100644
index 39fbf7f8a1d40..0000000000000
--- a/patches.baytrail/0031-drm-i915-Move-the-CSC_MODE-bits-next-to-the-register.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From 4ac68de94caec9322808b63579589d08a543414f Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Fri, 19 Apr 2013 12:23:02 +0300
-Subject: drm/i915: Move the CSC_MODE bits next to the register
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Shame on me for not putting the bit definitions next to the register
-definition in the first place.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 29a397ba7a4bded235c79f050753637cad3409ff)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_reg.h |    7 +++----
- 1 file changed, 3 insertions(+), 4 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -4943,6 +4943,9 @@
- #define _PIPE_A_CSC_COEFF_RV_GV	0x49020
- #define _PIPE_A_CSC_COEFF_BV	0x49024
- #define _PIPE_A_CSC_MODE	0x49028
-+#define   CSC_BLACK_SCREEN_OFFSET	(1 << 2)
-+#define   CSC_POSITION_BEFORE_GAMMA	(1 << 1)
-+#define   CSC_MODE_YUV_TO_RGB		(1 << 0)
- #define _PIPE_A_CSC_PREOFF_HI	0x49030
- #define _PIPE_A_CSC_PREOFF_ME	0x49034
- #define _PIPE_A_CSC_PREOFF_LO	0x49038
-@@ -4964,10 +4967,6 @@
- #define _PIPE_B_CSC_POSTOFF_ME	0x49144
- #define _PIPE_B_CSC_POSTOFF_LO	0x49148
- 
--#define CSC_BLACK_SCREEN_OFFSET (1 << 2)
--#define CSC_POSITION_BEFORE_GAMMA (1 << 1)
--#define CSC_MODE_YUV_TO_RGB (1 << 0)
--
- #define PIPE_CSC_COEFF_RY_GY(pipe) _PIPE(pipe, _PIPE_A_CSC_COEFF_RY_GY, _PIPE_B_CSC_COEFF_RY_GY)
- #define PIPE_CSC_COEFF_BY(pipe) _PIPE(pipe, _PIPE_A_CSC_COEFF_BY, _PIPE_B_CSC_COEFF_BY)
- #define PIPE_CSC_COEFF_RU_GU(pipe) _PIPE(pipe, _PIPE_A_CSC_COEFF_RU_GU, _PIPE_B_CSC_COEFF_RU_GU)
diff --git a/patches.baytrail/0032-drm-i915-Remove-mention-of-Haswell-in-DDI-code.patch b/patches.baytrail/0032-drm-i915-Remove-mention-of-Haswell-in-DDI-code.patch
deleted file mode 100644
index 1096e6701bbc1..0000000000000
--- a/patches.baytrail/0032-drm-i915-Remove-mention-of-Haswell-in-DDI-code.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From d60584171f5c15809251cecefe553680bd758d28 Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Fri, 19 Apr 2013 14:27:31 +0100
-Subject: drm/i915: Remove mention of Haswell in DDI code
-
-We are trying to have more platform-orthogonal pieces of code. The DDI
-code shouldn't mention Haswell.
-
-v2: Fix the email address
-
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit bf98a72650c9272e70e7f0e904f85c025c0bb421)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_ddi.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
-index 3b798ae62075..cfaf6bead217 100644
---- a/drivers/gpu/drm/i915/intel_ddi.c
-+++ b/drivers/gpu/drm/i915/intel_ddi.c
-@@ -675,7 +675,7 @@ static void intel_ddi_mode_set(struct drm_encoder *encoder,
- 	int pipe = intel_crtc->pipe;
- 	int type = intel_encoder->type;
- 
--	DRM_DEBUG_KMS("Preparing DDI mode for Haswell on port %c, pipe %c\n",
-+	DRM_DEBUG_KMS("Preparing DDI mode on port %c, pipe %c\n",
- 		      port_name(port), pipe_name(pipe));
- 
- 	intel_crtc->eld_vld = false;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0033-drm-i915-use-vlv_dport_to_channel-in-vlv_signal_leve.patch b/patches.baytrail/0033-drm-i915-use-vlv_dport_to_channel-in-vlv_signal_leve.patch
deleted file mode 100644
index b4a41a7563380..0000000000000
--- a/patches.baytrail/0033-drm-i915-use-vlv_dport_to_channel-in-vlv_signal_leve.patch
+++ /dev/null
@@ -1,40 +0,0 @@
-From 39c407ed1c6b7da0c806c98c21964cc1bd4f8230 Mon Sep 17 00:00:00 2001
-From: Jesse Barnes <jbarnes@virtuousgeek.org>
-Date: Fri, 19 Apr 2013 08:46:35 -0700
-Subject: drm/i915: use vlv_dport_to_channel in vlv_signal_levels
-
-Minor cleanup.  Would be nice to use an enum for channel in the DPIO
-macros so we don't mix up pipes and channels, but that's for another
-patch.
-
-Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit cece5d58d5568e4a7986e43981d21a80ea189a82)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_dp.c | 9 +--------
- 1 file changed, 1 insertion(+), 8 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
-index 415caad2b10f..d8407c9b0504 100644
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -1597,14 +1597,7 @@ static uint32_t intel_vlv_signal_levels(struct intel_dp *intel_dp)
- 	unsigned long demph_reg_value, preemph_reg_value,
- 		uniqtranscale_reg_value;
- 	uint8_t train_set = intel_dp->train_set[0];
--	int port;
--
--	if (dport->port == PORT_B)
--		port = 0;
--	else if (dport->port == PORT_C)
--		port = 1;
--	else
--		BUG();
-+	int port = vlv_dport_to_channel(dport);
- 
- 	WARN_ON(!mutex_is_locked(&dev_priv->dpio_lock));
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0034-drm-i915-Make-struct-dpll-intel_clock_t.patch b/patches.baytrail/0034-drm-i915-Make-struct-dpll-intel_clock_t.patch
deleted file mode 100644
index f390b3dcb88df..0000000000000
--- a/patches.baytrail/0034-drm-i915-Make-struct-dpll-intel_clock_t.patch
+++ /dev/null
@@ -1,81 +0,0 @@
-From 2bde9fef869ee4b50c60e74e71e5a34806176038 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Fri, 19 Apr 2013 14:36:51 +0300
-Subject: drm/i915: Make struct dpll == intel_clock_t
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-This allows unifying a bunch of the PLL calculations and whatnot.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 80ad9206c0d863832bc5f6008c4d1868d1df8e70)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 12 ------------
- drivers/gpu/drm/i915/intel_drv.h     | 18 +++++++++++++-----
- 2 files changed, 13 insertions(+), 17 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index ea83011e454e..0db840241690 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -46,18 +46,6 @@ static void intel_increase_pllclock(struct drm_crtc *crtc);
- static void intel_crtc_update_cursor(struct drm_crtc *crtc, bool on);
- 
- typedef struct {
--	/* given values */
--	int n;
--	int m1, m2;
--	int p1, p2;
--	/* derived values */
--	int	dot;
--	int	vco;
--	int	m;
--	int	p;
--} intel_clock_t;
--
--typedef struct {
- 	int	min, max;
- } intel_range_t;
- 
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index 3976eadbb4b6..a8e180732452 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -177,6 +177,18 @@ struct intel_connector {
- 	u8 polled;
- };
- 
-+typedef struct dpll {
-+	/* given values */
-+	int n;
-+	int m1, m2;
-+	int p1, p2;
-+	/* derived values */
-+	int	dot;
-+	int	vco;
-+	int	m;
-+	int	p;
-+} intel_clock_t;
-+
- struct intel_crtc_config {
- 	struct drm_display_mode requested_mode;
- 	struct drm_display_mode adjusted_mode;
-@@ -208,11 +220,7 @@ struct intel_crtc_config {
- 
- 	/* Settings for the intel dpll used on pretty much everything but
- 	 * haswell. */
--	struct dpll {
--		unsigned n;
--		unsigned m1, m2;
--		unsigned p1, p2;
--	} dpll;
-+	struct dpll dpll;
- 
- 	int pipe_bpp;
- 	struct intel_link_m_n dp_m_n;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0035-drm-i915-Add-PTE-encoding-function-to-the-gtt-ppgtt-.patch b/patches.baytrail/0035-drm-i915-Add-PTE-encoding-function-to-the-gtt-ppgtt-.patch
deleted file mode 100644
index 36e0cb695030b..0000000000000
--- a/patches.baytrail/0035-drm-i915-Add-PTE-encoding-function-to-the-gtt-ppgtt-.patch
+++ /dev/null
@@ -1,158 +0,0 @@
-From 951c1081a166a1a0f58a7a310c3c72057d097631 Mon Sep 17 00:00:00 2001
-From: Kenneth Graunke <kenneth@whitecape.org>
-Date: Mon, 22 Apr 2013 00:53:49 -0700
-Subject: drm/i915: Add PTE encoding function to the gtt/ppgtt vtables.
-
-Sandybridge/Ivybridge, Bay Trail, and Haswell all have slightly
-different page table entry formats.  Rather than polluting one function
-with generation checks, simply use a function pointer and set up the
-correct PTE encoding function at startup.
-
-v2: Move the gen6_gtt_pte_t typedef to i915_drv.h so that the function
-    pointers and implementations have identical signatures.  Also remove
-    inline keyword on gen6_pte_encode.  Both suggested by Jani Nikula.
-
-Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
-Reviewed-by: Jani Nikula <jani.nikula@linux.intel.com>
-Tested-by: Daniel Leung <daniel.leung@linux.intel.com> [v1]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 2d04befb949744998284d8551ae7cd47059b8a53)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h     |  8 ++++++++
- drivers/gpu/drm/i915/i915_gem_gtt.c | 30 ++++++++++++++++--------------
- 2 files changed, 24 insertions(+), 14 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index b32a0b18f003..0ede85bcb45b 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -395,6 +395,8 @@ enum i915_cache_level {
- 	I915_CACHE_LLC_MLC, /* gen6+, in docs at least! */
- };
- 
-+typedef uint32_t gen6_gtt_pte_t;
-+
- /* The Graphics Translation Table is the way in which GEN hardware translates a
-  * Graphics Virtual Address into a Physical Address. In addition to the normal
-  * collateral associated with any va->pa translations GEN hardware also has a
-@@ -430,6 +432,9 @@ struct i915_gtt {
- 				   struct sg_table *st,
- 				   unsigned int pg_start,
- 				   enum i915_cache_level cache_level);
-+	gen6_gtt_pte_t (*pte_encode)(struct drm_device *dev,
-+				     dma_addr_t addr,
-+				     enum i915_cache_level level);
- };
- #define gtt_total_entries(gtt) ((gtt).total >> PAGE_SHIFT)
- 
-@@ -451,6 +456,9 @@ struct i915_hw_ppgtt {
- 			       struct sg_table *st,
- 			       unsigned int pg_start,
- 			       enum i915_cache_level cache_level);
-+	gen6_gtt_pte_t (*pte_encode)(struct drm_device *dev,
-+				     dma_addr_t addr,
-+				     enum i915_cache_level level);
- 	int (*enable)(struct drm_device *dev);
- 	void (*cleanup)(struct i915_hw_ppgtt *ppgtt);
- };
-diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
-index bdb0d7717bc7..a6b4af7b425a 100644
---- a/drivers/gpu/drm/i915/i915_gem_gtt.c
-+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
-@@ -28,8 +28,6 @@
- #include "i915_trace.h"
- #include "intel_drv.h"
- 
--typedef uint32_t gen6_gtt_pte_t;
--
- /* PPGTT stuff */
- #define GEN6_GTT_ADDR_ENCODE(addr)	((addr) | (((addr) >> 28) & 0xff0))
- 
-@@ -44,9 +42,9 @@ typedef uint32_t gen6_gtt_pte_t;
- #define GEN6_PTE_CACHE_LLC_MLC		(3 << 1)
- #define GEN6_PTE_ADDR_ENCODE(addr)	GEN6_GTT_ADDR_ENCODE(addr)
- 
--static inline gen6_gtt_pte_t gen6_pte_encode(struct drm_device *dev,
--					     dma_addr_t addr,
--					     enum i915_cache_level level)
-+static gen6_gtt_pte_t gen6_pte_encode(struct drm_device *dev,
-+				      dma_addr_t addr,
-+				      enum i915_cache_level level)
- {
- 	gen6_gtt_pte_t pte = GEN6_PTE_VALID;
- 	pte |= GEN6_PTE_ADDR_ENCODE(addr);
-@@ -154,9 +152,9 @@ static void gen6_ppgtt_clear_range(struct i915_hw_ppgtt *ppgtt,
- 	unsigned first_pte = first_entry % I915_PPGTT_PT_ENTRIES;
- 	unsigned last_pte, i;
- 
--	scratch_pte = gen6_pte_encode(ppgtt->dev,
--				      ppgtt->scratch_page_dma_addr,
--				      I915_CACHE_LLC);
-+	scratch_pte = ppgtt->pte_encode(ppgtt->dev,
-+					ppgtt->scratch_page_dma_addr,
-+					I915_CACHE_LLC);
- 
- 	while (num_entries) {
- 		last_pte = first_pte + num_entries;
-@@ -191,8 +189,8 @@ static void gen6_ppgtt_insert_entries(struct i915_hw_ppgtt *ppgtt,
- 		dma_addr_t page_addr;
- 
- 		page_addr = sg_page_iter_dma_address(&sg_iter);
--		pt_vaddr[act_pte] = gen6_pte_encode(ppgtt->dev, page_addr,
--						    cache_level);
-+		pt_vaddr[act_pte] = ppgtt->pte_encode(ppgtt->dev, page_addr,
-+						      cache_level);
- 		if (++act_pte == I915_PPGTT_PT_ENTRIES) {
- 			kunmap_atomic(pt_vaddr);
- 			act_pt++;
-@@ -235,6 +233,7 @@ static int gen6_ppgtt_init(struct i915_hw_ppgtt *ppgtt)
- 	 * now. */
-        first_pd_entry_in_global_pt = gtt_total_entries(dev_priv->gtt);
- 
-+	ppgtt->pte_encode = gen6_pte_encode;
- 	ppgtt->num_pd_entries = I915_PPGTT_PD_ENTRIES;
- 	ppgtt->enable = gen6_ppgtt_enable;
- 	ppgtt->clear_range = gen6_ppgtt_clear_range;
-@@ -437,7 +436,8 @@ static void gen6_ggtt_insert_entries(struct drm_device *dev,
- 
- 	for_each_sg_page(st->sgl, &sg_iter, st->nents, 0) {
- 		addr = sg_page_iter_dma_address(&sg_iter);
--		iowrite32(gen6_pte_encode(dev, addr, level), &gtt_entries[i]);
-+		iowrite32(dev_priv->gtt.pte_encode(dev, addr, level),
-+			  &gtt_entries[i]);
- 		i++;
- 	}
- 
-@@ -449,7 +449,7 @@ static void gen6_ggtt_insert_entries(struct drm_device *dev,
- 	 */
- 	if (i != 0)
- 		WARN_ON(readl(&gtt_entries[i-1])
--			!= gen6_pte_encode(dev, addr, level));
-+			!= dev_priv->gtt.pte_encode(dev, addr, level));
- 
- 	/* This next bit makes the above posting read even more important. We
- 	 * want to flush the TLBs only after we're certain all the PTE updates
-@@ -474,8 +474,9 @@ static void gen6_ggtt_clear_range(struct drm_device *dev,
- 		 first_entry, num_entries, max_entries))
- 		num_entries = max_entries;
- 
--	scratch_pte = gen6_pte_encode(dev, dev_priv->gtt.scratch_page_dma,
--				      I915_CACHE_LLC);
-+	scratch_pte = dev_priv->gtt.pte_encode(dev,
-+					       dev_priv->gtt.scratch_page_dma,
-+					       I915_CACHE_LLC);
- 	for (i = 0; i < num_entries; i++)
- 		iowrite32(scratch_pte, &gtt_base[i]);
- 	readl(gtt_base);
-@@ -809,6 +810,7 @@ int i915_gem_gtt_init(struct drm_device *dev)
- 	} else {
- 		dev_priv->gtt.gtt_probe = gen6_gmch_probe;
- 		dev_priv->gtt.gtt_remove = gen6_gmch_remove;
-+		dev_priv->gtt.pte_encode = gen6_pte_encode;
- 	}
- 
- 	ret = dev_priv->gtt.gtt_probe(dev, &dev_priv->gtt.total,
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0036-drm-i915-Fix-page-table-entries-for-Bay-Trail.patch b/patches.baytrail/0036-drm-i915-Fix-page-table-entries-for-Bay-Trail.patch
deleted file mode 100644
index 230dc592ee3f5..0000000000000
--- a/patches.baytrail/0036-drm-i915-Fix-page-table-entries-for-Bay-Trail.patch
+++ /dev/null
@@ -1,81 +0,0 @@
-From 91990be7a31b091032b9ab5964ef3999f7d83fac Mon Sep 17 00:00:00 2001
-From: Kenneth Graunke <kenneth@whitecape.org>
-Date: Mon, 22 Apr 2013 00:53:50 -0700
-Subject: drm/i915: Fix page table entries for Bay Trail.
-
-On Bay Trail, bit 1 means "writeable by the GPU."  Failing to set that
-means basically anything using the GPU will cause hangs.
-
-v2: Drop accidental inline keyword on byt_pte_encode.
-
-Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
-Reviewed-by: Jani Nikula <jani.nikula@intel.com>
-Tested-by: Daniel Leung <daniel.leung@linux.intel.com> [v1]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 93c34e70ebf464a9ee142d93b681c5df094ec654)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem_gtt.c | 33 +++++++++++++++++++++++++++++++--
- 1 file changed, 31 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
-index a6b4af7b425a..4241c9697fe3 100644
---- a/drivers/gpu/drm/i915/i915_gem_gtt.c
-+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
-@@ -73,6 +73,27 @@ static gen6_gtt_pte_t gen6_pte_encode(struct drm_device *dev,
- 	return pte;
- }
- 
-+#define BYT_PTE_WRITEABLE		(1 << 1)
-+#define BYT_PTE_SNOOPED_BY_CPU_CACHES	(1 << 2)
-+
-+static gen6_gtt_pte_t byt_pte_encode(struct drm_device *dev,
-+				     dma_addr_t addr,
-+				     enum i915_cache_level level)
-+{
-+	gen6_gtt_pte_t pte = GEN6_PTE_VALID;
-+	pte |= GEN6_PTE_ADDR_ENCODE(addr);
-+
-+	/* Mark the page as writeable.  Other platforms don't have a
-+	 * setting for read-only/writable, so this matches that behavior.
-+	 */
-+	pte |= BYT_PTE_WRITEABLE;
-+
-+	if (level != I915_CACHE_NONE)
-+		pte |= BYT_PTE_SNOOPED_BY_CPU_CACHES;
-+
-+	return pte;
-+}
-+
- static int gen6_ppgtt_enable(struct drm_device *dev)
- {
- 	drm_i915_private_t *dev_priv = dev->dev_private;
-@@ -233,7 +254,11 @@ static int gen6_ppgtt_init(struct i915_hw_ppgtt *ppgtt)
- 	 * now. */
-        first_pd_entry_in_global_pt = gtt_total_entries(dev_priv->gtt);
- 
--	ppgtt->pte_encode = gen6_pte_encode;
-+	if (IS_VALLEYVIEW(dev)) {
-+		ppgtt->pte_encode = byt_pte_encode;
-+	} else {
-+		ppgtt->pte_encode = gen6_pte_encode;
-+	}
- 	ppgtt->num_pd_entries = I915_PPGTT_PD_ENTRIES;
- 	ppgtt->enable = gen6_ppgtt_enable;
- 	ppgtt->clear_range = gen6_ppgtt_clear_range;
-@@ -810,7 +835,11 @@ int i915_gem_gtt_init(struct drm_device *dev)
- 	} else {
- 		dev_priv->gtt.gtt_probe = gen6_gmch_probe;
- 		dev_priv->gtt.gtt_remove = gen6_gmch_remove;
--		dev_priv->gtt.pte_encode = gen6_pte_encode;
-+		if (IS_VALLEYVIEW(dev)) {
-+			dev_priv->gtt.pte_encode = byt_pte_encode;
-+		} else {
-+			dev_priv->gtt.pte_encode = gen6_pte_encode;
-+		}
- 	}
- 
- 	ret = dev_priv->gtt.gtt_probe(dev, &dev_priv->gtt.total,
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0037-drm-i915-Split-out-Haswell-code-from-gen6_pte_encode.patch b/patches.baytrail/0037-drm-i915-Split-out-Haswell-code-from-gen6_pte_encode.patch
deleted file mode 100644
index 7d2b22d18c67a..0000000000000
--- a/patches.baytrail/0037-drm-i915-Split-out-Haswell-code-from-gen6_pte_encode.patch
+++ /dev/null
@@ -1,94 +0,0 @@
-From 76889de98ca867d2bb10c1296e802290889658fd Mon Sep 17 00:00:00 2001
-From: Kenneth Graunke <kenneth@whitecape.org>
-Date: Mon, 22 Apr 2013 00:53:51 -0700
-Subject: drm/i915: Split out Haswell code from gen6_pte_encode.
-
-Now that we have function pointers, it's cleaner to just create a new
-per-platform PTE encoding function.
-
-This should be identical in behavior to the previous code.
-
-v2: Drop accidental inline keyword on hsw_pte_encode.
-
-Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
-Reviewed-by: Jani Nikula <jani.nikula@intel.com>
-Tested-by: Daniel Leung <daniel.leung@linux.intel.com> [v1]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 9119708cd484923bbc45fa60740bff58b358b848)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem_gtt.c | 32 +++++++++++++++++++++-----------
- 1 file changed, 21 insertions(+), 11 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
-index 4241c9697fe3..de6e7c54ea56 100644
---- a/drivers/gpu/drm/i915/i915_gem_gtt.c
-+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
-@@ -51,20 +51,13 @@ static gen6_gtt_pte_t gen6_pte_encode(struct drm_device *dev,
- 
- 	switch (level) {
- 	case I915_CACHE_LLC_MLC:
--		/* Haswell doesn't set L3 this way */
--		if (IS_HASWELL(dev))
--			pte |= GEN6_PTE_CACHE_LLC;
--		else
--			pte |= GEN6_PTE_CACHE_LLC_MLC;
-+		pte |= GEN6_PTE_CACHE_LLC_MLC;
- 		break;
- 	case I915_CACHE_LLC:
- 		pte |= GEN6_PTE_CACHE_LLC;
- 		break;
- 	case I915_CACHE_NONE:
--		if (IS_HASWELL(dev))
--			pte |= HSW_PTE_UNCACHED;
--		else
--			pte |= GEN6_PTE_UNCACHED;
-+		pte |= GEN6_PTE_UNCACHED;
- 		break;
- 	default:
- 		BUG();
-@@ -94,6 +87,19 @@ static gen6_gtt_pte_t byt_pte_encode(struct drm_device *dev,
- 	return pte;
- }
- 
-+static gen6_gtt_pte_t hsw_pte_encode(struct drm_device *dev,
-+				     dma_addr_t addr,
-+				     enum i915_cache_level level)
-+{
-+	gen6_gtt_pte_t pte = GEN6_PTE_VALID;
-+	pte |= GEN6_PTE_ADDR_ENCODE(addr);
-+
-+	if (level != I915_CACHE_NONE)
-+		pte |= GEN6_PTE_CACHE_LLC;
-+
-+	return pte;
-+}
-+
- static int gen6_ppgtt_enable(struct drm_device *dev)
- {
- 	drm_i915_private_t *dev_priv = dev->dev_private;
-@@ -254,7 +260,9 @@ static int gen6_ppgtt_init(struct i915_hw_ppgtt *ppgtt)
- 	 * now. */
-        first_pd_entry_in_global_pt = gtt_total_entries(dev_priv->gtt);
- 
--	if (IS_VALLEYVIEW(dev)) {
-+	if (IS_HASWELL(dev)) {
-+		ppgtt->pte_encode = hsw_pte_encode;
-+	} else if (IS_VALLEYVIEW(dev)) {
- 		ppgtt->pte_encode = byt_pte_encode;
- 	} else {
- 		ppgtt->pte_encode = gen6_pte_encode;
-@@ -835,7 +843,9 @@ int i915_gem_gtt_init(struct drm_device *dev)
- 	} else {
- 		dev_priv->gtt.gtt_probe = gen6_gmch_probe;
- 		dev_priv->gtt.gtt_remove = gen6_gmch_remove;
--		if (IS_VALLEYVIEW(dev)) {
-+		if (IS_HASWELL(dev)) {
-+			dev_priv->gtt.pte_encode = hsw_pte_encode;
-+		} else if (IS_VALLEYVIEW(dev)) {
- 			dev_priv->gtt.pte_encode = byt_pte_encode;
- 		} else {
- 			dev_priv->gtt.pte_encode = gen6_pte_encode;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0038-drm-i915-fix-locking-around-punit-access-in-cur_dela.patch b/patches.baytrail/0038-drm-i915-fix-locking-around-punit-access-in-cur_dela.patch
deleted file mode 100644
index d707c4610fbd6..0000000000000
--- a/patches.baytrail/0038-drm-i915-fix-locking-around-punit-access-in-cur_dela.patch
+++ /dev/null
@@ -1,40 +0,0 @@
-From d74b92dd977d6eac6daa8be6c7a2f91d85a8240d Mon Sep 17 00:00:00 2001
-From: Jesse Barnes <jbarnes@virtuousgeek.org>
-Date: Mon, 22 Apr 2013 15:59:30 -0700
-Subject: drm/i915: fix locking around punit access in cur_delayinfo for VLV
-
-We need to hold the rps lock around punit access.
-
-Reported-by: Kenneth Graunke <kenneth@whitecape.org>
-Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Reviewed-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 259bd5d4e909a6c07e0da8d6f623d2ab89b7a042)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_debugfs.c | 2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
-index 367b534d2260..d195d097cbb7 100644
---- a/drivers/gpu/drm/i915/i915_debugfs.c
-+++ b/drivers/gpu/drm/i915/i915_debugfs.c
-@@ -1012,6 +1012,7 @@ static int i915_cur_delayinfo(struct seq_file *m, void *unused)
- 	} else if (IS_VALLEYVIEW(dev)) {
- 		u32 freq_sts, val;
- 
-+		mutex_lock(&dev_priv->rps.hw_lock);
- 		valleyview_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS,
- 				      &freq_sts);
- 		seq_printf(m, "PUNIT_REG_GPU_FREQ_STS: 0x%08x\n", freq_sts);
-@@ -1028,6 +1029,7 @@ static int i915_cur_delayinfo(struct seq_file *m, void *unused)
- 		seq_printf(m, "current GPU freq: %d MHz\n",
- 			   vlv_gpu_freq(dev_priv->mem_freq,
- 					(freq_sts >> 8) & 0xff));
-+		mutex_unlock(&dev_priv->rps.hw_lock);
- 	} else {
- 		seq_printf(m, "no P-state info available\n");
- 	}
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0039-drm-i915-Add-bit-field-to-record-which-pins-have-rec.patch b/patches.baytrail/0039-drm-i915-Add-bit-field-to-record-which-pins-have-rec.patch
deleted file mode 100644
index 852a77bf5d29b..0000000000000
--- a/patches.baytrail/0039-drm-i915-Add-bit-field-to-record-which-pins-have-rec.patch
+++ /dev/null
@@ -1,86 +0,0 @@
-From 5404c5055fc3af2bb06fbac43e34387f4dd501dc Mon Sep 17 00:00:00 2001
-From: Egbert Eich <eich@suse.de>
-Date: Thu, 11 Apr 2013 15:57:57 +0200
-Subject: drm/i915: Add bit field to record which pins have received HPD events
- (v3)
-
-This way it is possible to limit 're'-detect() of displays to connectors
-which have received an HPD event.
-
-v2: Reordered drm_i915_private: Move hpd_event_bits to hpd state tracking.
-v3: Fixed merge conflicts with previous patches.
-
-Signed-off-by: Egbert Eich <eich@suse.de>
-Reviewed-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 142e239849c800f9dc23f828762873073f612d3f)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h |  1 +
- drivers/gpu/drm/i915/i915_irq.c | 10 ++++++++++
- 2 files changed, 11 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 0ede85bcb45b..698da6dbdb32 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -952,6 +952,7 @@ typedef struct drm_i915_private {
- 			HPD_MARK_DISABLED = 2
- 		} hpd_mark;
- 	} hpd_stats[HPD_NUM_PINS];
-+	u32 hpd_event_bits;
- 	struct timer_list hotplug_reenable_timer;
- 
- 	int num_pch_pll;
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index 450a03c6f945..66aa4dacd83f 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -548,6 +548,7 @@ static void i915_hotplug_work_func(struct work_struct *work)
- 	struct drm_connector *connector;
- 	unsigned long irqflags;
- 	bool hpd_disabled = false;
-+	u32 hpd_event_bits;
- 
- 	/* HPD irq before everything is fully set up. */
- 	if (!dev_priv->enable_hotplug_processing)
-@@ -557,6 +558,9 @@ static void i915_hotplug_work_func(struct work_struct *work)
- 	DRM_DEBUG_KMS("running encoder hotplug functions\n");
- 
- 	spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
-+
-+	hpd_event_bits = dev_priv->hpd_event_bits;
-+	dev_priv->hpd_event_bits = 0;
- 	list_for_each_entry(connector, &mode_config->connector_list, head) {
- 		intel_connector = to_intel_connector(connector);
- 		intel_encoder = intel_connector->encoder;
-@@ -571,6 +575,10 @@ static void i915_hotplug_work_func(struct work_struct *work)
- 				| DRM_CONNECTOR_POLL_DISCONNECT;
- 			hpd_disabled = true;
- 		}
-+		if (hpd_event_bits & (1 << intel_encoder->hpd_pin)) {
-+			DRM_DEBUG_KMS("Connector %s (pin %i) received hotplug event.\n",
-+				      drm_get_connector_name(connector), intel_encoder->hpd_pin);
-+		}
- 	}
- 	 /* if there were no outputs to poll, poll was disabled,
- 	  * therefore make sure it's enabled when disabling HPD on
-@@ -835,6 +843,7 @@ static inline bool hotplug_irq_storm_detect(struct drm_device *dev,
- 
- 		if (!(hpd[i] & hotplug_trigger) ||
- 		    dev_priv->hpd_stats[i].hpd_mark != HPD_ENABLED)
-+			dev_priv->hpd_event_bits |= (1 << i);
- 			continue;
- 
- 		if (!time_in_range(jiffies, dev_priv->hpd_stats[i].hpd_last_jiffies,
-@@ -844,6 +853,7 @@ static inline bool hotplug_irq_storm_detect(struct drm_device *dev,
- 			dev_priv->hpd_stats[i].hpd_cnt = 0;
- 		} else if (dev_priv->hpd_stats[i].hpd_cnt > HPD_STORM_THRESHOLD) {
- 			dev_priv->hpd_stats[i].hpd_mark = HPD_MARK_DISABLED;
-+			dev_priv->hpd_event_bits &= ~(1 << i);
- 			DRM_DEBUG_KMS("HPD interrupt storm detected on PIN %d\n", i);
- 			ret = true;
- 		} else {
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0040-drm-i915-Only-reprobe-display-on-encoder-which-has-r.patch b/patches.baytrail/0040-drm-i915-Only-reprobe-display-on-encoder-which-has-r.patch
deleted file mode 100644
index ed67dfa1b4537..0000000000000
--- a/patches.baytrail/0040-drm-i915-Only-reprobe-display-on-encoder-which-has-r.patch
+++ /dev/null
@@ -1,88 +0,0 @@
-From 8a85a19825edd287c64c597e0b1c51292cd2ceeb Mon Sep 17 00:00:00 2001
-From: Egbert Eich <eich@suse.de>
-Date: Thu, 11 Apr 2013 16:00:26 +0200
-Subject: drm/i915: Only reprobe display on encoder which has received an HPD
- event (v2)
-
-Instead of calling into the DRM helper layer to poll all connectors for
-changes in connected displays probe only those connectors which have
-received a hotplug event.
-
-v2: Resolved conflicts with changes in previous commits.
-    Renamed function and and added a WARN_ON() to warn of
-    intel_hpd_irq_event() from being called without
-    mode_config.mutex held - suggested by Jani Nikula.
-
-Signed-off-by: Egbert Eich <eich@suse.de>
-Reviewed-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 321a1b3026ea194dd084cf3bda1e235b2986b0af)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 34 ++++++++++++++++++++++++++++------
- 1 file changed, 28 insertions(+), 6 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index 66aa4dacd83f..1d42446e287c 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -532,6 +532,21 @@ static int i915_get_vblank_timestamp(struct drm_device *dev, int pipe,
- 						     crtc);
- }
- 
-+static int intel_hpd_irq_event(struct drm_device *dev, struct drm_connector *connector)
-+{
-+	enum drm_connector_status old_status;
-+
-+	WARN_ON(!mutex_is_locked(&dev->mode_config.mutex));
-+	old_status = connector->status;
-+
-+	connector->status = connector->funcs->detect(connector, false);
-+	DRM_DEBUG_KMS("[CONNECTOR:%d:%s] status updated from %d to %d\n",
-+		      connector->base.id,
-+		      drm_get_connector_name(connector),
-+		      old_status, connector->status);
-+	return (old_status != connector->status);
-+}
-+
- /*
-  * Handle hotplug events outside the interrupt handler proper.
-  */
-@@ -548,6 +563,7 @@ static void i915_hotplug_work_func(struct work_struct *work)
- 	struct drm_connector *connector;
- 	unsigned long irqflags;
- 	bool hpd_disabled = false;
-+	bool changed = false;
- 	u32 hpd_event_bits;
- 
- 	/* HPD irq before everything is fully set up. */
-@@ -591,14 +607,20 @@ static void i915_hotplug_work_func(struct work_struct *work)
- 
- 	spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
- 
--	list_for_each_entry(intel_encoder, &mode_config->encoder_list, base.head)
--		if (intel_encoder->hot_plug)
--			intel_encoder->hot_plug(intel_encoder);
--
-+	list_for_each_entry(connector, &mode_config->connector_list, head) {
-+		intel_connector = to_intel_connector(connector);
-+		intel_encoder = intel_connector->encoder;
-+		if (hpd_event_bits & (1 << intel_encoder->hpd_pin)) {
-+			if (intel_encoder->hot_plug)
-+				intel_encoder->hot_plug(intel_encoder);
-+			if (intel_hpd_irq_event(dev, connector))
-+				changed = true;
-+		}
-+	}
- 	mutex_unlock(&mode_config->mutex);
- 
--	/* Just fire off a uevent and let userspace tell us what to do */
--	drm_helper_hpd_irq_event(dev);
-+	if (changed)
-+		drm_kms_helper_hotplug_event(dev);
- }
- 
- static void ironlake_handle_rps_change(struct drm_device *dev)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0041-drm-i915-Turn-DEV_INFO_FLAGS-into-a-foreach-style-ma.patch b/patches.baytrail/0041-drm-i915-Turn-DEV_INFO_FLAGS-into-a-foreach-style-ma.patch
deleted file mode 100644
index 18261af217a71..0000000000000
--- a/patches.baytrail/0041-drm-i915-Turn-DEV_INFO_FLAGS-into-a-foreach-style-ma.patch
+++ /dev/null
@@ -1,130 +0,0 @@
-From cca87d75baaf99e9c071ca47b9d7fdd70129f9fc Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Tue, 23 Apr 2013 16:37:17 +0100
-Subject: drm/i915: Turn DEV_INFO_FLAGS into a foreach style macro
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-DEV_INFO_FOR_FLAG() now takes 2 parameters:
-  • A function to apply to the flag
-  • A separator
-
-This will allow us to use the macro twice in the DRM_DEBUG_DRIVER() call
-of i915_dump_device_info().
-
-v2: Fix a typo in the subject (Jani Nikula)
-v3: Undef the helper macros (Jani Nikula, Daniel vetter)
-
-Reviewed-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 79fc46dfd0c7cc68442554a428e03a3b7e0d44aa)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_debugfs.c |   10 +++----
- drivers/gpu/drm/i915/i915_dma.c     |   10 +++----
- drivers/gpu/drm/i915/i915_drv.h     |   50 ++++++++++++++++++------------------
- 3 files changed, 35 insertions(+), 35 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_debugfs.c
-+++ b/drivers/gpu/drm/i915/i915_debugfs.c
-@@ -61,11 +61,11 @@ static int i915_capabilities(struct seq_
- 
- 	seq_printf(m, "gen: %d\n", info->gen);
- 	seq_printf(m, "pch: %d\n", INTEL_PCH_TYPE(dev));
--#define DEV_INFO_FLAG(x) seq_printf(m, #x ": %s\n", yesno(info->x))
--#define DEV_INFO_SEP ;
--	DEV_INFO_FLAGS;
--#undef DEV_INFO_FLAG
--#undef DEV_INFO_SEP
-+#define PRINT_FLAG(x)  seq_printf(m, #x ": %s\n", yesno(info->x))
-+#define SEP_SEMICOLON ;
-+	DEV_INFO_FOR_EACH_FLAG(PRINT_FLAG, SEP_SEMICOLON);
-+#undef PRINT_FLAG
-+#undef SEP_SEMICOLON
- 
- 	return 0;
- }
---- a/drivers/gpu/drm/i915/i915_dma.c
-+++ b/drivers/gpu/drm/i915/i915_dma.c
-@@ -1453,15 +1453,15 @@ static void i915_dump_device_info(struct
- {
- 	const struct intel_device_info *info = dev_priv->info;
- 
--#define DEV_INFO_FLAG(name) info->name ? #name "," : ""
--#define DEV_INFO_SEP ,
-+#define PRINT_FLAG(name) info->name ? #name "," : ""
-+#define SEP_COMMA ,
- 	DRM_DEBUG_DRIVER("i915 device info: gen=%i, pciid=0x%04x flags="
- 			 "%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s",
- 			 info->gen,
- 			 dev_priv->dev->pdev->device,
--			 DEV_INFO_FLAGS);
--#undef DEV_INFO_FLAG
--#undef DEV_INFO_SEP
-+			 DEV_INFO_FOR_EACH_FLAG(PRINT_FLAG, SEP_COMMA));
-+#undef PRINT_FLAG
-+#undef SEP_COMMA
- }
- 
- /**
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -333,31 +333,31 @@ struct drm_i915_gt_funcs {
- 	void (*force_wake_put)(struct drm_i915_private *dev_priv);
- };
- 
--#define DEV_INFO_FLAGS \
--	DEV_INFO_FLAG(is_mobile) DEV_INFO_SEP \
--	DEV_INFO_FLAG(is_i85x) DEV_INFO_SEP \
--	DEV_INFO_FLAG(is_i915g) DEV_INFO_SEP \
--	DEV_INFO_FLAG(is_i945gm) DEV_INFO_SEP \
--	DEV_INFO_FLAG(is_g33) DEV_INFO_SEP \
--	DEV_INFO_FLAG(need_gfx_hws) DEV_INFO_SEP \
--	DEV_INFO_FLAG(is_g4x) DEV_INFO_SEP \
--	DEV_INFO_FLAG(is_pineview) DEV_INFO_SEP \
--	DEV_INFO_FLAG(is_broadwater) DEV_INFO_SEP \
--	DEV_INFO_FLAG(is_crestline) DEV_INFO_SEP \
--	DEV_INFO_FLAG(is_ivybridge) DEV_INFO_SEP \
--	DEV_INFO_FLAG(is_valleyview) DEV_INFO_SEP \
--	DEV_INFO_FLAG(is_haswell) DEV_INFO_SEP \
--	DEV_INFO_FLAG(has_force_wake) DEV_INFO_SEP \
--	DEV_INFO_FLAG(has_fbc) DEV_INFO_SEP \
--	DEV_INFO_FLAG(has_pipe_cxsr) DEV_INFO_SEP \
--	DEV_INFO_FLAG(has_hotplug) DEV_INFO_SEP \
--	DEV_INFO_FLAG(cursor_needs_physical) DEV_INFO_SEP \
--	DEV_INFO_FLAG(has_overlay) DEV_INFO_SEP \
--	DEV_INFO_FLAG(overlay_needs_physical) DEV_INFO_SEP \
--	DEV_INFO_FLAG(supports_tv) DEV_INFO_SEP \
--	DEV_INFO_FLAG(has_bsd_ring) DEV_INFO_SEP \
--	DEV_INFO_FLAG(has_blt_ring) DEV_INFO_SEP \
--	DEV_INFO_FLAG(has_llc)
-+#define DEV_INFO_FOR_EACH_FLAG(func, sep) \
-+	func(is_mobile) sep \
-+	func(is_i85x) sep \
-+	func(is_i915g) sep \
-+	func(is_i945gm) sep \
-+	func(is_g33) sep \
-+	func(need_gfx_hws) sep \
-+	func(is_g4x) sep \
-+	func(is_pineview) sep \
-+	func(is_broadwater) sep \
-+	func(is_crestline) sep \
-+	func(is_ivybridge) sep \
-+	func(is_valleyview) sep \
-+	func(is_haswell) sep \
-+	func(has_force_wake) sep \
-+	func(has_fbc) sep \
-+	func(has_pipe_cxsr) sep \
-+	func(has_hotplug) sep \
-+	func(cursor_needs_physical) sep \
-+	func(has_overlay) sep \
-+	func(overlay_needs_physical) sep \
-+	func(supports_tv) sep \
-+	func(has_bsd_ring) sep \
-+	func(has_blt_ring) sep \
-+	func(has_llc)
- 
- struct intel_device_info {
- 	u32 display_mmio_offset;
diff --git a/patches.baytrail/0042-drm-i915-Replace-the-line-of-s-by-a-DEV_INFO_FOR_EAC.patch b/patches.baytrail/0042-drm-i915-Replace-the-line-of-s-by-a-DEV_INFO_FOR_EAC.patch
deleted file mode 100644
index ff416fa979a1d..0000000000000
--- a/patches.baytrail/0042-drm-i915-Replace-the-line-of-s-by-a-DEV_INFO_FOR_EAC.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From 5f76c57898760f9ed1205180faec47afa81a3f0c Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Tue, 23 Apr 2013 16:38:34 +0100
-Subject: drm/i915: Replace the line of %s by a DEV_INFO_FOR_EACH_FLAG()
- invocation
-
-This way, when adding a device flag we don't have to manually maintain
-that list.
-
-v2: undefine the helper macros (Jani Nikula, Daniel Vetter)
-
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Reviewed-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit e2a5800a14abcf861b9d6565de2a22bd6e9ae0ef)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_dma.c |    6 +++++-
- 1 file changed, 5 insertions(+), 1 deletion(-)
-
---- a/drivers/gpu/drm/i915/i915_dma.c
-+++ b/drivers/gpu/drm/i915/i915_dma.c
-@@ -1453,13 +1453,17 @@ static void i915_dump_device_info(struct
- {
- 	const struct intel_device_info *info = dev_priv->info;
- 
-+#define PRINT_S(name) "%s"
-+#define SEP_EMPTY
- #define PRINT_FLAG(name) info->name ? #name "," : ""
- #define SEP_COMMA ,
- 	DRM_DEBUG_DRIVER("i915 device info: gen=%i, pciid=0x%04x flags="
--			 "%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s",
-+			 DEV_INFO_FOR_EACH_FLAG(PRINT_S, SEP_EMPTY),
- 			 info->gen,
- 			 dev_priv->dev->pdev->device,
- 			 DEV_INFO_FOR_EACH_FLAG(PRINT_FLAG, SEP_COMMA));
-+#undef PRINT_S
-+#undef SEP_EMPTY
- #undef PRINT_FLAG
- #undef SEP_COMMA
- }
diff --git a/patches.baytrail/0043-drm-i915-Use-DEV_INFO_FOR_EACH_FLAG-to-declare-flags.patch b/patches.baytrail/0043-drm-i915-Use-DEV_INFO_FOR_EACH_FLAG-to-declare-flags.patch
deleted file mode 100644
index b168869469ab6..0000000000000
--- a/patches.baytrail/0043-drm-i915-Use-DEV_INFO_FOR_EACH_FLAG-to-declare-flags.patch
+++ /dev/null
@@ -1,65 +0,0 @@
-From c51766e44eec61bd31f53b3299f743e56d5754a9 Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Mon, 22 Apr 2013 18:40:38 +0100
-Subject: drm/i915: Use DEV_INFO_FOR_EACH_FLAG() to declare flags as well
-
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Reviewed-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit a587f77987295ddec59afb653cea5335b4d1e191)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h | 31 +++++++------------------------
- 1 file changed, 7 insertions(+), 24 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index c6179c8bea21..cd1144e68d3c 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -359,36 +359,19 @@ struct drm_i915_gt_funcs {
- 	func(has_blt_ring) sep \
- 	func(has_llc)
- 
-+#define DEFINE_FLAG(name) u8 name:1
-+#define SEP_SEMICOLON ;
-+
- struct intel_device_info {
- 	u32 display_mmio_offset;
- 	u8 num_pipes:3;
- 	u8 gen;
--	u8 is_mobile:1;
--	u8 is_i85x:1;
--	u8 is_i915g:1;
--	u8 is_i945gm:1;
--	u8 is_g33:1;
--	u8 need_gfx_hws:1;
--	u8 is_g4x:1;
--	u8 is_pineview:1;
--	u8 is_broadwater:1;
--	u8 is_crestline:1;
--	u8 is_ivybridge:1;
--	u8 is_valleyview:1;
--	u8 has_force_wake:1;
--	u8 is_haswell:1;
--	u8 has_fbc:1;
--	u8 has_pipe_cxsr:1;
--	u8 has_hotplug:1;
--	u8 cursor_needs_physical:1;
--	u8 has_overlay:1;
--	u8 overlay_needs_physical:1;
--	u8 supports_tv:1;
--	u8 has_bsd_ring:1;
--	u8 has_blt_ring:1;
--	u8 has_llc:1;
-+	DEV_INFO_FOR_EACH_FLAG(DEFINE_FLAG, SEP_SEMICOLON);
- };
- 
-+#undef DEFINE_FLAG
-+#undef SEP_SEMICOLON
-+
- enum i915_cache_level {
- 	I915_CACHE_NONE = 0,
- 	I915_CACHE_LLC,
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0044-drm-i915-Turn-HAS_DDI-into-a-device_info-flag.patch b/patches.baytrail/0044-drm-i915-Turn-HAS_DDI-into-a-device_info-flag.patch
deleted file mode 100644
index 9c55c21a19e92..0000000000000
--- a/patches.baytrail/0044-drm-i915-Turn-HAS_DDI-into-a-device_info-flag.patch
+++ /dev/null
@@ -1,60 +0,0 @@
-From 727bb9225198092ea1906c6484ffbb737aba5efd Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Mon, 22 Apr 2013 18:40:39 +0100
-Subject: drm/i915: Turn HAS_DDI() into a device_info flag
-
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Reviewed-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit dd93be584099b157039c43c7b48eac56223ac94d)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.c | 2 ++
- drivers/gpu/drm/i915/i915_drv.h | 5 +++--
- 2 files changed, 5 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
-index bc6cd3117ac3..7d4a284487ee 100644
---- a/drivers/gpu/drm/i915/i915_drv.c
-+++ b/drivers/gpu/drm/i915/i915_drv.c
-@@ -308,12 +308,14 @@ static const struct intel_device_info intel_valleyview_d_info = {
- static const struct intel_device_info intel_haswell_d_info = {
- 	GEN7_FEATURES,
- 	.is_haswell = 1,
-+	.has_ddi = 1,
- };
- 
- static const struct intel_device_info intel_haswell_m_info = {
- 	GEN7_FEATURES,
- 	.is_haswell = 1,
- 	.is_mobile = 1,
-+	.has_ddi = 1,
- };
- 
- static const struct pci_device_id pciidlist[] = {		/* aka */
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index cd1144e68d3c..15951914a65b 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -357,7 +357,8 @@ struct drm_i915_gt_funcs {
- 	func(supports_tv) sep \
- 	func(has_bsd_ring) sep \
- 	func(has_blt_ring) sep \
--	func(has_llc)
-+	func(has_llc) sep \
-+	func(has_ddi)
- 
- #define DEFINE_FLAG(name) u8 name:1
- #define SEP_SEMICOLON ;
-@@ -1368,7 +1369,7 @@ struct drm_i915_file_private {
- 
- #define HAS_PIPE_CONTROL(dev) (INTEL_INFO(dev)->gen >= 5)
- 
--#define HAS_DDI(dev)		(IS_HASWELL(dev))
-+#define HAS_DDI(dev)		(INTEL_INFO(dev)->has_ddi)
- #define HAS_POWER_WELL(dev)	(IS_HASWELL(dev))
- 
- #define INTEL_PCH_DEVICE_ID_MASK		0xff00
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0045-drm-i915-Introduce-HAS_FPGA_DBG_UNCLAIMED.patch b/patches.baytrail/0045-drm-i915-Introduce-HAS_FPGA_DBG_UNCLAIMED.patch
deleted file mode 100644
index 792a77826945e..0000000000000
--- a/patches.baytrail/0045-drm-i915-Introduce-HAS_FPGA_DBG_UNCLAIMED.patch
+++ /dev/null
@@ -1,64 +0,0 @@
-From 903f857985d8452458e365ba7f8c87dff7104e0c Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Mon, 22 Apr 2013 18:40:40 +0100
-Subject: drm/i915: Introduce HAS_FPGA_DBG_UNCLAIMED()
-
-Let's introduce one more of those orthogonal feature macros. This should
-hopefully make the code more readable and make things easier for new platform
-enabling.
-
-This time, HAS_FPGA_DBG_UNCLAIMED() is true for platforms that have bit
-31 of FPGA_DBG able to signal unclaimed writes.
-
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Reviewed-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit e76ebff887e9cc4a8448a0fc6abbb1925291f38b)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_dma.c |    2 +-
- drivers/gpu/drm/i915/i915_drv.c |    4 ++--
- drivers/gpu/drm/i915/i915_drv.h |    1 +
- 3 files changed, 4 insertions(+), 3 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_dma.c
-+++ b/drivers/gpu/drm/i915/i915_dma.c
-@@ -1480,7 +1480,7 @@ static void intel_early_sanitize_regs(st
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 
--	if (IS_HASWELL(dev))
-+	if (HAS_FPGA_DBG_UNCLAIMED(dev))
- 		I915_WRITE_NOTRACE(FPGA_DBG, FPGA_DBG_RM_NOCLAIM);
- }
- 
---- a/drivers/gpu/drm/i915/i915_drv.c
-+++ b/drivers/gpu/drm/i915/i915_drv.c
-@@ -1229,7 +1229,7 @@ ilk_dummy_write(struct drm_i915_private
- static void
- hsw_unclaimed_reg_clear(struct drm_i915_private *dev_priv, u32 reg)
- {
--	if (IS_HASWELL(dev_priv->dev) &&
-+	if (HAS_FPGA_DBG_UNCLAIMED(dev_priv->dev) &&
- 	    (I915_READ_NOTRACE(FPGA_DBG) & FPGA_DBG_RM_NOCLAIM)) {
- 		DRM_ERROR("Unknown unclaimed register before writing to %x\n",
- 			  reg);
-@@ -1240,7 +1240,7 @@ hsw_unclaimed_reg_clear(struct drm_i915_
- static void
- hsw_unclaimed_reg_check(struct drm_i915_private *dev_priv, u32 reg)
- {
--	if (IS_HASWELL(dev_priv->dev) &&
-+	if (HAS_FPGA_DBG_UNCLAIMED(dev_priv->dev) &&
- 	    (I915_READ_NOTRACE(FPGA_DBG) & FPGA_DBG_RM_NOCLAIM)) {
- 		DRM_ERROR("Unclaimed write to %x\n", reg);
- 		I915_WRITE_NOTRACE(FPGA_DBG, FPGA_DBG_RM_NOCLAIM);
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1371,6 +1371,7 @@ struct drm_i915_file_private {
- 
- #define HAS_DDI(dev)		(INTEL_INFO(dev)->has_ddi)
- #define HAS_POWER_WELL(dev)	(IS_HASWELL(dev))
-+#define HAS_FPGA_DBG_UNCLAIMED(dev)	(IS_HASWELL(dev))
- 
- #define INTEL_PCH_DEVICE_ID_MASK		0xff00
- #define INTEL_PCH_IBX_DEVICE_ID_TYPE		0x3b00
diff --git a/patches.baytrail/0046-drm-i915-Turn-HAS_FPGA_DBG_UNCLAIMED-into-a-device_i.patch b/patches.baytrail/0046-drm-i915-Turn-HAS_FPGA_DBG_UNCLAIMED-into-a-device_i.patch
deleted file mode 100644
index c370c9e83d7c1..0000000000000
--- a/patches.baytrail/0046-drm-i915-Turn-HAS_FPGA_DBG_UNCLAIMED-into-a-device_i.patch
+++ /dev/null
@@ -1,61 +0,0 @@
-From 0c726f443a73bacd42656de8c2456f17768fc1b1 Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Mon, 22 Apr 2013 18:40:41 +0100
-Subject: drm/i915: Turn HAS_FPGA_DBG_UNCLAIMED into a device_info flag
-
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Reviewed-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 30568c45d9fc4ee0bb9e1da90e185692fcd67e38)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.c | 2 ++
- drivers/gpu/drm/i915/i915_drv.h | 5 +++--
- 2 files changed, 5 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
-index 97858c71b3f7..b7fdafdb496e 100644
---- a/drivers/gpu/drm/i915/i915_drv.c
-+++ b/drivers/gpu/drm/i915/i915_drv.c
-@@ -309,6 +309,7 @@ static const struct intel_device_info intel_haswell_d_info = {
- 	GEN7_FEATURES,
- 	.is_haswell = 1,
- 	.has_ddi = 1,
-+	.has_fpga_dbg = 1,
- };
- 
- static const struct intel_device_info intel_haswell_m_info = {
-@@ -316,6 +317,7 @@ static const struct intel_device_info intel_haswell_m_info = {
- 	.is_haswell = 1,
- 	.is_mobile = 1,
- 	.has_ddi = 1,
-+	.has_fpga_dbg = 1,
- };
- 
- static const struct pci_device_id pciidlist[] = {		/* aka */
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 99d744441ad6..4060621e76e3 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -358,7 +358,8 @@ struct drm_i915_gt_funcs {
- 	func(has_bsd_ring) sep \
- 	func(has_blt_ring) sep \
- 	func(has_llc) sep \
--	func(has_ddi)
-+	func(has_ddi) sep \
-+	func(has_fpga_dbg)
- 
- #define DEFINE_FLAG(name) u8 name:1
- #define SEP_SEMICOLON ;
-@@ -1371,7 +1372,7 @@ struct drm_i915_file_private {
- 
- #define HAS_DDI(dev)		(INTEL_INFO(dev)->has_ddi)
- #define HAS_POWER_WELL(dev)	(IS_HASWELL(dev))
--#define HAS_FPGA_DBG_UNCLAIMED(dev)	(IS_HASWELL(dev))
-+#define HAS_FPGA_DBG_UNCLAIMED(dev)	(INTEL_INFO(dev)->has_fpga_dbg)
- 
- #define INTEL_PCH_DEVICE_ID_MASK		0xff00
- #define INTEL_PCH_IBX_DEVICE_ID_TYPE		0x3b00
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0047-drm-i915-make-sure-GPU-freq-drops-to-minimum-after-e.patch b/patches.baytrail/0047-drm-i915-make-sure-GPU-freq-drops-to-minimum-after-e.patch
deleted file mode 100644
index 0c912490ad872..0000000000000
--- a/patches.baytrail/0047-drm-i915-make-sure-GPU-freq-drops-to-minimum-after-e.patch
+++ /dev/null
@@ -1,128 +0,0 @@
-From 89a1433aebda51050c4569740746560616c9f816 Mon Sep 17 00:00:00 2001
-From: Jesse Barnes <jbarnes@virtuousgeek.org>
-Date: Tue, 23 Apr 2013 10:09:26 -0700
-Subject: drm/i915: make sure GPU freq drops to minimum after entering RC6 v4
-
-On VLV, the Punit doesn't automatically drop the GPU to it's minimum
-voltage level when entering RC6, so we arm a timer to do it for us from
-the RPS interrupt handler.  It'll generally only fire when we go idle
-(or if for some reason there's a long delay between RPS interrupts), but
-won't be re-armed again until the next RPS event, so shouldn't affect
-power consumption after we go idle and it triggers.
-
-v2: use delayed work instead of timer + work queue combo (Ville)
-v3: fix up delayed work cancel (must be outside lock) (Daniel)
-    fix up delayed work handling func for delayed work (Jesse)
-v4: cancel delayed work before RPS shutdown (Jani)
-    pass delay not absolute time to mod_delayed_work (Jani)
-
-Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Reviewed-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 52ceb908018d3ac3c19cea85d5e407705f0a79c3)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h |  2 ++
- drivers/gpu/drm/i915/i915_irq.c | 11 +++++++++++
- drivers/gpu/drm/i915/intel_pm.c | 22 ++++++++++++++++++++++
- 3 files changed, 35 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 4060621e76e3..c123e9e0cd12 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -654,6 +654,7 @@ struct i915_suspend_saved_registers {
- 
- struct intel_gen6_power_mgmt {
- 	struct work_struct work;
-+	struct delayed_work vlv_work;
- 	u32 pm_iir;
- 	/* lock - irqsave spinlock that protectects the work_struct and
- 	 * pm_iir. */
-@@ -664,6 +665,7 @@ struct intel_gen6_power_mgmt {
- 	u8 cur_delay;
- 	u8 min_delay;
- 	u8 max_delay;
-+	u8 rpe_delay;
- 	u8 hw_max;
- 
- 	struct delayed_work delayed_resume_work;
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index 1d42446e287c..4fe62a65a87a 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -716,6 +716,17 @@ static void gen6_pm_rps_work(struct work_struct *work)
- 			gen6_set_rps(dev_priv->dev, new_delay);
- 	}
- 
-+	if (IS_VALLEYVIEW(dev_priv->dev)) {
-+		/*
-+		 * On VLV, when we enter RC6 we may not be at the minimum
-+		 * voltage level, so arm a timer to check.  It should only
-+		 * fire when there's activity or once after we've entered
-+		 * RC6, and then won't be re-armed until the next RPS interrupt.
-+		 */
-+		mod_delayed_work(dev_priv->wq, &dev_priv->rps.vlv_work,
-+				 msecs_to_jiffies(100));
-+	}
-+
- 	mutex_unlock(&dev_priv->rps.hw_lock);
- }
- 
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index ca43c4e33c45..d5946860ce5b 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2822,6 +2822,23 @@ int valleyview_rps_min_freq(struct drm_i915_private *dev_priv)
- 	return val & 0xff;
- }
- 
-+static void vlv_rps_timer_work(struct work_struct *work)
-+{
-+	drm_i915_private_t *dev_priv = container_of(work, drm_i915_private_t,
-+						    rps.vlv_work.work);
-+
-+	/*
-+	 * Timer fired, we must be idle.  Drop to min voltage state.
-+	 * Note: we use RPe here since it should match the
-+	 * Vmin we were shooting for.  That should give us better
-+	 * perf when we come back out of RC6 than if we used the
-+	 * min freq available.
-+	 */
-+	mutex_lock(&dev_priv->rps.hw_lock);
-+	valleyview_set_rps(dev_priv->dev, dev_priv->rps.rpe_delay);
-+	mutex_unlock(&dev_priv->rps.hw_lock);
-+}
-+
- static void valleyview_enable_rps(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
-@@ -2886,6 +2903,7 @@ static void valleyview_enable_rps(struct drm_device *dev)
- 	rpe = valleyview_rps_rpe_freq(dev_priv);
- 	DRM_DEBUG_DRIVER("RPe GPU freq: %d\n",
- 			 vlv_gpu_freq(dev_priv->mem_freq, rpe));
-+	dev_priv->rps.rpe_delay = rpe;
- 
- 	val = valleyview_rps_min_freq(dev_priv);
- 	DRM_DEBUG_DRIVER("min GPU freq: %d\n", vlv_gpu_freq(dev_priv->mem_freq,
-@@ -2895,6 +2913,8 @@ static void valleyview_enable_rps(struct drm_device *dev)
- 	DRM_DEBUG_DRIVER("setting GPU freq to %d\n",
- 			 vlv_gpu_freq(dev_priv->mem_freq, rpe));
- 
-+	INIT_DELAYED_WORK(&dev_priv->rps.vlv_work, vlv_rps_timer_work);
-+
- 	valleyview_set_rps(dev_priv->dev, rpe);
- 
- 	/* requires MSI enabled */
-@@ -3637,6 +3657,8 @@ void intel_disable_gt_powersave(struct drm_device *dev)
- 		ironlake_disable_rc6(dev);
- 	} else if (INTEL_INFO(dev)->gen >= 6) {
- 		cancel_delayed_work_sync(&dev_priv->rps.delayed_resume_work);
-+		if (IS_VALLEYVIEW(dev))
-+			cancel_delayed_work_sync(&dev_priv->rps.vlv_work);
- 		mutex_lock(&dev_priv->rps.hw_lock);
- 		gen6_disable_rps(dev);
- 		mutex_unlock(&dev_priv->rps.hw_lock);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0048-drm-i915-cancel-RPS-work-before-disabling-RPS.patch b/patches.baytrail/0048-drm-i915-cancel-RPS-work-before-disabling-RPS.patch
deleted file mode 100644
index ee5f752a190ed..0000000000000
--- a/patches.baytrail/0048-drm-i915-cancel-RPS-work-before-disabling-RPS.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 44b5c33aaebfcf8b56a78705ec366289e6b581ed Mon Sep 17 00:00:00 2001
-From: Jesse Barnes <jbarnes@virtuousgeek.org>
-Date: Tue, 23 Apr 2013 10:09:27 -0700
-Subject: drm/i915: cancel RPS work before disabling RPS
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Ville noticed this while doing another review; we may as well cancel
-this work just to make sure we don't try anything fancy after disabling
-the RPS interfaces.
-
-Reported-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Reviewed-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 250848ca04b734c91f491b7c9b6045d2198a208c)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index d5946860ce5b..69f19de204e2 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -3657,6 +3657,7 @@ void intel_disable_gt_powersave(struct drm_device *dev)
- 		ironlake_disable_rc6(dev);
- 	} else if (INTEL_INFO(dev)->gen >= 6) {
- 		cancel_delayed_work_sync(&dev_priv->rps.delayed_resume_work);
-+		cancel_work_sync(&dev_priv->rps.work);
- 		if (IS_VALLEYVIEW(dev))
- 			cancel_delayed_work_sync(&dev_priv->rps.vlv_work);
- 		mutex_lock(&dev_priv->rps.hw_lock);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0049-drm-i915-create-spearate-VLV-disable_rps-function.patch b/patches.baytrail/0049-drm-i915-create-spearate-VLV-disable_rps-function.patch
deleted file mode 100644
index c8a8f3c3b8864..0000000000000
--- a/patches.baytrail/0049-drm-i915-create-spearate-VLV-disable_rps-function.patch
+++ /dev/null
@@ -1,66 +0,0 @@
-From a0b6a29fce66d2d98e7dfd1d26f42ac345e5eab2 Mon Sep 17 00:00:00 2001
-From: Jesse Barnes <jbarnes@virtuousgeek.org>
-Date: Tue, 23 Apr 2013 10:09:28 -0700
-Subject: drm/i915: create spearate VLV disable_rps function
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-We don't want to write reserved regs here, and may want to do other bits
-in the future, so split it out.
-
-Reported-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Reviewed-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit d20d4f0ca343c0b76567d46fcc343c165e8d7c43)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 24 +++++++++++++++++++++++-
- 1 file changed, 23 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 69f19de204e2..789710624d75 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2547,6 +2547,25 @@ static void gen6_disable_rps(struct drm_device *dev)
- 	I915_WRITE(GEN6_PMIIR, I915_READ(GEN6_PMIIR));
- }
- 
-+static void valleyview_disable_rps(struct drm_device *dev)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+
-+	I915_WRITE(GEN6_RC_CONTROL, 0);
-+	I915_WRITE(GEN6_PMINTRMSK, 0xffffffff);
-+	I915_WRITE(GEN6_PMIER, 0);
-+	/* Complete PM interrupt masking here doesn't race with the rps work
-+	 * item again unmasking PM interrupts because that is using a different
-+	 * register (PMIMR) to mask PM interrupts. The only risk is in leaving
-+	 * stale bits in PMIIR and PMIMR which gen6_enable_rps will clean up. */
-+
-+	spin_lock_irq(&dev_priv->rps.lock);
-+	dev_priv->rps.pm_iir = 0;
-+	spin_unlock_irq(&dev_priv->rps.lock);
-+
-+	I915_WRITE(GEN6_PMIIR, I915_READ(GEN6_PMIIR));
-+}
-+
- int intel_enable_rc6(const struct drm_device *dev)
- {
- 	/* Respect the kernel parameter if it is set */
-@@ -3661,7 +3680,10 @@ void intel_disable_gt_powersave(struct drm_device *dev)
- 		if (IS_VALLEYVIEW(dev))
- 			cancel_delayed_work_sync(&dev_priv->rps.vlv_work);
- 		mutex_lock(&dev_priv->rps.hw_lock);
--		gen6_disable_rps(dev);
-+		if (IS_VALLEYVIEW(dev))
-+			valleyview_disable_rps(dev);
-+		else
-+			gen6_disable_rps(dev);
- 		mutex_unlock(&dev_priv->rps.hw_lock);
- 	}
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0050-drm-i915-disable-interrupts-earlier-in-the-driver-un.patch b/patches.baytrail/0050-drm-i915-disable-interrupts-earlier-in-the-driver-un.patch
deleted file mode 100644
index 9978ccf70ee16..0000000000000
--- a/patches.baytrail/0050-drm-i915-disable-interrupts-earlier-in-the-driver-un.patch
+++ /dev/null
@@ -1,83 +0,0 @@
-From 6ddefd3caa8401123586c7cec07c1dac9f0cb4e2 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Wed, 24 Apr 2013 11:13:35 +0200
-Subject: drm/i915: disable interrupts earlier in the driver unload code
-
-Our rps code relies on the interrupts being off to prevent re-arming
-of the work items at inopportune moments.
-
-Also drop the redundant cancel_work for the main rps work,
-disable_gt_powersave already takes care of that.
-
-Finally add a WARN_ON to ensure we obey that piece of ordering
-constraint. Long term I want to lock down the setup/teardown code in a
-similar way to how we painstakingly check modeset sequence constraints
-already.
-
-v2: Disable polling after hpd handling is shut down - since Egbert's
-hpd irq storm handling the hotplug work can re-arm the polling
-handler. Spotted by Jani Nikula.
-
-Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
-Cc: Jani Nikula <jani.nikula@intel.com>
-Reviewed-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit fd0c06420d39958032655a04cfd194d5a7b38f83)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c |   19 ++++++++++++-------
- drivers/gpu/drm/i915/intel_pm.c      |    3 +++
- 2 files changed, 15 insertions(+), 7 deletions(-)
-
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -9587,12 +9587,23 @@ void intel_modeset_cleanup(struct drm_de
- 	struct drm_crtc *crtc;
- 	struct intel_crtc *intel_crtc;
- 
-+	/*
-+	 * Interrupts and polling as the first thing to avoid creating havoc.
-+	 * Too much stuff here (turning of rps, connectors, ...) would
-+	 * experience fancy races otherwise.
-+	 */
-+	drm_irq_uninstall(dev);
-+	cancel_work_sync(&dev_priv->hotplug_work);
-+	/*
-+	 * Due to the hpd irq storm handling the hotplug work can re-arm the
-+	 * poll handlers. Hence disable polling after hpd handling is shut down.
-+	 */
- 	drm_kms_helper_poll_fini(dev);
-+
- 	mutex_lock(&dev->struct_mutex);
- 
- 	intel_unregister_dsm_handler();
- 
--
- 	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
- 		/* Skip inactive CRTCs */
- 		if (!crtc->fb)
-@@ -9610,12 +9621,6 @@ void intel_modeset_cleanup(struct drm_de
- 
- 	mutex_unlock(&dev->struct_mutex);
- 
--	/* Disable the irq before mode object teardown, for the irq might
--	 * enqueue unpin/hotplug work. */
--	drm_irq_uninstall(dev);
--	cancel_work_sync(&dev_priv->hotplug_work);
--	cancel_work_sync(&dev_priv->rps.work);
--
- 	/* flush any delayed tasks or pending work */
- 	flush_scheduled_work();
- 
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -3671,6 +3671,9 @@ void intel_disable_gt_powersave(struct d
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 
-+	/* Interrupts should be disabled already to avoid re-arming. */
-+	WARN_ON(dev->irq_enabled);
-+
- 	if (IS_IRONLAKE_M(dev)) {
- 		ironlake_disable_drps(dev);
- 		ironlake_disable_rc6(dev);
diff --git a/patches.baytrail/0051-drm-i915-Disable-high-bpc-on-pre-1.4-EDID-screens.patch b/patches.baytrail/0051-drm-i915-Disable-high-bpc-on-pre-1.4-EDID-screens.patch
deleted file mode 100644
index 16ac4efe6553b..0000000000000
--- a/patches.baytrail/0051-drm-i915-Disable-high-bpc-on-pre-1.4-EDID-screens.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-From dec37ba36f6a4b611381a5b575a19565b48dfd1f Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Fri, 19 Apr 2013 11:24:34 +0200
-Subject: drm/i915: Disable high-bpc on pre-1.4 EDID screens
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Prevents black screens when using 30bpp framebuffers on my
-HDMI screens here. The DP input on the same screen though reports a
-1.4 EDID with the correct 8bpc limit set.
-
-v2: Actually check for the right thing!
-
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 996a2239f93b03c5972923f04b097f65565c5bed)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 7 +++++++
- 1 file changed, 7 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index df0d00df3532..f8d54036bcf3 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -7710,6 +7710,13 @@ pipe_config_set_bpp(struct drm_crtc *crtc,
- 				      bpp, connector->display_info.bpc*3);
- 			pipe_config->pipe_bpp = connector->display_info.bpc*3;
- 		}
-+
-+		/* Clamp bpp to 8 on screens without EDID 1.4 */
-+		if (connector->display_info.bpc == 0 && bpp > 24) {
-+			DRM_DEBUG_KMS("clamping display bpp (was %d) to default limit of 24\n",
-+				      bpp);
-+			pipe_config->pipe_bpp = 24;
-+		}
- 	}
- 
- 	return bpp;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0052-drm-i915-Fixup-non-24bpp-support-for-VGA-screens-on-.patch b/patches.baytrail/0052-drm-i915-Fixup-non-24bpp-support-for-VGA-screens-on-.patch
deleted file mode 100644
index c3da46aa8f334..0000000000000
--- a/patches.baytrail/0052-drm-i915-Fixup-non-24bpp-support-for-VGA-screens-on-.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 5ac0a9430796e59ed945dd045d500f9d0c0f8e0f Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Fri, 19 Apr 2013 11:24:39 +0200
-Subject: drm/i915: Fixup non-24bpp support for VGA screens on Haswell
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The LPT PCH only supports 8bpc, so we need to force the pipe bpp
-to the right value.
-
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 2a7aceecf15a463ba6bfa83b6579e75bb4703cd9)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_crt.c | 4 ++++
- 1 file changed, 4 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
-index 58b4a53715cd..1b9ebf4b77fc 100644
---- a/drivers/gpu/drm/i915/intel_crt.c
-+++ b/drivers/gpu/drm/i915/intel_crt.c
-@@ -207,6 +207,10 @@ static bool intel_crt_compute_config(struct intel_encoder *encoder,
- 	if (HAS_PCH_SPLIT(dev))
- 		pipe_config->has_pch_encoder = true;
- 
-+	/* LPT FDI RX only supports 8bpc. */
-+	if (HAS_PCH_LPT(dev))
-+		pipe_config->pipe_bpp = 24;
-+
- 	return true;
- }
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0053-drm-i915-keep-max-backlight-internal-to-intel_panel..patch b/patches.baytrail/0053-drm-i915-keep-max-backlight-internal-to-intel_panel..patch
deleted file mode 100644
index ddfa714cccec8..0000000000000
--- a/patches.baytrail/0053-drm-i915-keep-max-backlight-internal-to-intel_panel..patch
+++ /dev/null
@@ -1,179 +0,0 @@
-From 0ee62d6476d1467b84498d1165a447394e135859 Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Fri, 12 Apr 2013 15:18:36 +0300
-Subject: drm/i915: keep max backlight internal to intel_panel.c
-
-In preparation of adding locking to backlight, make max backlight value
-(the modulation frequency the PWM duty cycle value must not exceed)
-internal to intel_panel.c.
-
-Have intel_panel_set_backlight() accept a caller defined range for level,
-and scale input to max backlight value internally.
-
-Clean up intel_panel_get_max_backlight() and usage internally.
-
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit d65406327345e5a5e0f697a3ffe3e53bc9b5d7c6)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_drv.h      |  4 +--
- drivers/gpu/drm/i915/intel_opregion.c |  4 +--
- drivers/gpu/drm/i915/intel_panel.c    | 51 ++++++++++++++++++++---------------
- 3 files changed, 32 insertions(+), 27 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index a8e180732452..86a26ae1615f 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -554,8 +554,8 @@ extern void intel_pch_panel_fitting(struct drm_device *dev,
- 				    int fitting_mode,
- 				    const struct drm_display_mode *mode,
- 				    struct drm_display_mode *adjusted_mode);
--extern u32 intel_panel_get_max_backlight(struct drm_device *dev);
--extern void intel_panel_set_backlight(struct drm_device *dev, u32 level);
-+extern void intel_panel_set_backlight(struct drm_device *dev,
-+				      u32 level, u32 max);
- extern int intel_panel_setup_backlight(struct drm_connector *connector);
- extern void intel_panel_enable_backlight(struct drm_device *dev,
- 					 enum pipe pipe);
-diff --git a/drivers/gpu/drm/i915/intel_opregion.c b/drivers/gpu/drm/i915/intel_opregion.c
-index a8117e614009..b9b2694be80f 100644
---- a/drivers/gpu/drm/i915/intel_opregion.c
-+++ b/drivers/gpu/drm/i915/intel_opregion.c
-@@ -152,7 +152,6 @@ static u32 asle_set_backlight(struct drm_device *dev, u32 bclp)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct opregion_asle __iomem *asle = dev_priv->opregion.asle;
--	u32 max;
- 
- 	DRM_DEBUG_DRIVER("bclp = 0x%08x\n", bclp);
- 
-@@ -163,8 +162,7 @@ static u32 asle_set_backlight(struct drm_device *dev, u32 bclp)
- 	if (bclp > 255)
- 		return ASLE_BACKLIGHT_FAILED;
- 
--	max = intel_panel_get_max_backlight(dev);
--	intel_panel_set_backlight(dev, bclp * max / 255);
-+	intel_panel_set_backlight(dev, bclp, 255);
- 	iowrite32((bclp*0x64)/0xff | ASLE_CBLV_VALID, &asle->cblv);
- 
- 	return 0;
-diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
-index 33cb87f7983e..3df5931e638f 100644
---- a/drivers/gpu/drm/i915/intel_panel.c
-+++ b/drivers/gpu/drm/i915/intel_panel.c
-@@ -130,6 +130,9 @@ static int is_backlight_combination_mode(struct drm_device *dev)
- 	return 0;
- }
- 
-+/* XXX: query mode clock or hardware clock and program max PWM appropriately
-+ * when it's 0.
-+ */
- static u32 i915_read_blc_pwm_ctl(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
-@@ -164,7 +167,7 @@ static u32 i915_read_blc_pwm_ctl(struct drm_device *dev)
- 	return val;
- }
- 
--static u32 _intel_panel_get_max_backlight(struct drm_device *dev)
-+static u32 intel_panel_get_max_backlight(struct drm_device *dev)
- {
- 	u32 max;
- 
-@@ -182,23 +185,8 @@ static u32 _intel_panel_get_max_backlight(struct drm_device *dev)
- 			max *= 0xff;
- 	}
- 
--	return max;
--}
--
--u32 intel_panel_get_max_backlight(struct drm_device *dev)
--{
--	u32 max;
--
--	max = _intel_panel_get_max_backlight(dev);
--	if (max == 0) {
--		/* XXX add code here to query mode clock or hardware clock
--		 * and program max PWM appropriately.
--		 */
--		pr_warn_once("fixme: max PWM is zero\n");
--		return 1;
--	}
--
- 	DRM_DEBUG_DRIVER("max backlight PWM = %d\n", max);
-+
- 	return max;
- }
- 
-@@ -217,8 +205,11 @@ static u32 intel_panel_compute_brightness(struct drm_device *dev, u32 val)
- 		return val;
- 
- 	if (i915_panel_invert_brightness > 0 ||
--	    dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS)
--		return intel_panel_get_max_backlight(dev) - val;
-+	    dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) {
-+		u32 max = intel_panel_get_max_backlight(dev);
-+		if (max)
-+			return max - val;
-+	}
- 
- 	return val;
- }
-@@ -270,6 +261,10 @@ static void intel_panel_actually_set_backlight(struct drm_device *dev, u32 level
- 		u32 max = intel_panel_get_max_backlight(dev);
- 		u8 lbpc;
- 
-+		/* we're screwed, but keep behaviour backwards compatible */
-+		if (!max)
-+			max = 1;
-+
- 		lbpc = level * 0xfe / max + 1;
- 		level /= lbpc;
- 		pci_write_config_byte(dev->pdev, PCI_LBPC, lbpc);
-@@ -282,9 +277,20 @@ static void intel_panel_actually_set_backlight(struct drm_device *dev, u32 level
- 	I915_WRITE(BLC_PWM_CTL, tmp | level);
- }
- 
--void intel_panel_set_backlight(struct drm_device *dev, u32 level)
-+/* set backlight brightness to level in range [0..max] */
-+void intel_panel_set_backlight(struct drm_device *dev, u32 level, u32 max)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
-+	u32 freq;
-+
-+	freq = intel_panel_get_max_backlight(dev);
-+	if (!freq) {
-+		/* we are screwed, bail out */
-+		return;
-+	}
-+
-+	/* scale to hardware */
-+	level = level * freq / max;
- 
- 	dev_priv->backlight.level = level;
- 	if (dev_priv->backlight.device)
-@@ -406,7 +412,8 @@ intel_panel_detect(struct drm_device *dev)
- static int intel_panel_update_status(struct backlight_device *bd)
- {
- 	struct drm_device *dev = bl_get_data(bd);
--	intel_panel_set_backlight(dev, bd->props.brightness);
-+	intel_panel_set_backlight(dev, bd->props.brightness,
-+				  bd->props.max_brightness);
- 	return 0;
- }
- 
-@@ -435,7 +442,7 @@ int intel_panel_setup_backlight(struct drm_connector *connector)
- 	memset(&props, 0, sizeof(props));
- 	props.type = BACKLIGHT_RAW;
- 	props.brightness = dev_priv->backlight.level;
--	props.max_brightness = _intel_panel_get_max_backlight(dev);
-+	props.max_brightness = intel_panel_get_max_backlight(dev);
- 	if (props.max_brightness == 0) {
- 		DRM_DEBUG_DRIVER("Failed to get maximum backlight value\n");
- 		return -ENODEV;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0054-drm-i915-protect-backlight-registers-and-data-with-a.patch b/patches.baytrail/0054-drm-i915-protect-backlight-registers-and-data-with-a.patch
deleted file mode 100644
index 13fd1dd8babf2..0000000000000
--- a/patches.baytrail/0054-drm-i915-protect-backlight-registers-and-data-with-a.patch
+++ /dev/null
@@ -1,217 +0,0 @@
-From f6675adc2421c21c8060e4f1ff1eb720ca61b66a Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Fri, 12 Apr 2013 15:18:37 +0300
-Subject: drm/i915: protect backlight registers and data with a spinlock
-
-Backlight data and registers are fiddled through LVDS/eDP modeset
-enable/disable hooks, backlight sysfs files, asle interrupts, and register
-save/restore. Protect the backlight related registers and driver private
-fields using a spinlock.
-
-The locking in register save/restore covers a little more than is strictly
-necessary, including non-modeset case, for simplicity.
-
-v2: Cover register access, save/restore, i915_read_blc_pwm_ctl() and code
-    paths leading there.
-
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 8ba2d18520ce380cf572e9902d9b3b91ece6c2c0)
-[dbasehore: Fixed simple conflict]
-Signed-off-by: Derek Basehore <dbasehore@chromium.org>
-
-Conflicts:
-	drivers/gpu/drm/i915/i915_dma.c
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_dma.c     |    1 +
- drivers/gpu/drm/i915/i915_drv.h     |    1 +
- drivers/gpu/drm/i915/i915_suspend.c |   10 ++++++++++
- drivers/gpu/drm/i915/intel_panel.c  |   30 +++++++++++++++++++++++++++++-
- 4 files changed, 41 insertions(+), 1 deletion(-)
-
---- a/drivers/gpu/drm/i915/i915_dma.c
-+++ b/drivers/gpu/drm/i915/i915_dma.c
-@@ -1527,6 +1527,7 @@ int i915_driver_load(struct drm_device *
- 	spin_lock_init(&dev_priv->gpu_error.lock);
- 	spin_lock_init(&dev_priv->rps.lock);
- 	spin_lock_init(&dev_priv->gt_lock);
-+	spin_lock_init(&dev_priv->backlight.lock);
- 	mutex_init(&dev_priv->dpio_lock);
- 	mutex_init(&dev_priv->rps.hw_lock);
- 	mutex_init(&dev_priv->modeset_restore_lock);
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -961,6 +961,7 @@ typedef struct drm_i915_private {
- 	struct {
- 		int level;
- 		bool enabled;
-+		spinlock_t lock; /* bl registers and the above bl fields */
- 		struct backlight_device *device;
- 	} backlight;
- 
---- a/drivers/gpu/drm/i915/i915_suspend.c
-+++ b/drivers/gpu/drm/i915/i915_suspend.c
-@@ -192,6 +192,7 @@ static void i915_restore_vga(struct drm_
- static void i915_save_display(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
-+	unsigned long flags;
- 
- 	/* Display arbitration control */
- 	if (INTEL_INFO(dev)->gen <= 4)
-@@ -202,6 +203,8 @@ static void i915_save_display(struct drm
- 	if (!drm_core_check_feature(dev, DRIVER_MODESET))
- 		i915_save_display_reg(dev);
- 
-+	spin_lock_irqsave(&dev_priv->backlight.lock, flags);
-+
- 	/* LVDS state */
- 	if (HAS_PCH_SPLIT(dev)) {
- 		dev_priv->regfile.savePP_CONTROL = I915_READ(PCH_PP_CONTROL);
-@@ -222,6 +225,8 @@ static void i915_save_display(struct drm
- 			dev_priv->regfile.saveLVDS = I915_READ(LVDS);
- 	}
- 
-+	spin_unlock_irqrestore(&dev_priv->backlight.lock, flags);
-+
- 	if (!IS_I830(dev) && !IS_845G(dev) && !HAS_PCH_SPLIT(dev))
- 		dev_priv->regfile.savePFIT_CONTROL = I915_READ(PFIT_CONTROL);
- 
-@@ -257,6 +262,7 @@ static void i915_restore_display(struct
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	u32 mask = 0xffffffff;
-+	unsigned long flags;
- 
- 	/* Display arbitration */
- 	if (INTEL_INFO(dev)->gen <= 4)
-@@ -265,6 +271,8 @@ static void i915_restore_display(struct
- 	if (!drm_core_check_feature(dev, DRIVER_MODESET))
- 		i915_restore_display_reg(dev);
- 
-+	spin_lock_irqsave(&dev_priv->backlight.lock, flags);
-+
- 	/* LVDS state */
- 	if (INTEL_INFO(dev)->gen >= 4 && !HAS_PCH_SPLIT(dev))
- 		I915_WRITE(BLC_PWM_CTL2, dev_priv->regfile.saveBLC_PWM_CTL2);
-@@ -304,6 +312,8 @@ static void i915_restore_display(struct
- 		I915_WRITE(PP_CONTROL, dev_priv->regfile.savePP_CONTROL);
- 	}
- 
-+	spin_unlock_irqrestore(&dev_priv->backlight.lock, flags);
-+
- 	/* only restore FBC info on the platform that supports FBC*/
- 	intel_disable_fbc(dev);
- 	if (I915_HAS_FBC(dev)) {
---- a/drivers/gpu/drm/i915/intel_panel.c
-+++ b/drivers/gpu/drm/i915/intel_panel.c
-@@ -138,6 +138,8 @@ static u32 i915_read_blc_pwm_ctl(struct
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	u32 val;
- 
-+	WARN_ON(!spin_is_locked(&dev_priv->backlight.lock));
-+
- 	/* Restore the CTL value if it lost, e.g. GPU reset */
- 
- 	if (HAS_PCH_SPLIT(dev_priv->dev)) {
-@@ -218,6 +220,9 @@ static u32 intel_panel_get_backlight(str
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	u32 val;
-+	unsigned long flags;
-+
-+	spin_lock_irqsave(&dev_priv->backlight.lock, flags);
- 
- 	if (HAS_PCH_SPLIT(dev)) {
- 		val = I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
-@@ -235,6 +240,9 @@ static u32 intel_panel_get_backlight(str
- 	}
- 
- 	val = intel_panel_compute_brightness(dev, val);
-+
-+	spin_unlock_irqrestore(&dev_priv->backlight.lock, flags);
-+
- 	DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val);
- 	return val;
- }
-@@ -282,11 +290,14 @@ void intel_panel_set_backlight(struct dr
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	u32 freq;
-+	unsigned long flags;
-+
-+	spin_lock_irqsave(&dev_priv->backlight.lock, flags);
- 
- 	freq = intel_panel_get_max_backlight(dev);
- 	if (!freq) {
- 		/* we are screwed, bail out */
--		return;
-+		goto out;
- 	}
- 
- 	/* scale to hardware */
-@@ -298,11 +309,16 @@ void intel_panel_set_backlight(struct dr
- 
- 	if (dev_priv->backlight.enabled)
- 		intel_panel_actually_set_backlight(dev, level);
-+out:
-+	spin_unlock_irqrestore(&dev_priv->backlight.lock, flags);
- }
- 
- void intel_panel_disable_backlight(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
-+	unsigned long flags;
-+
-+	spin_lock_irqsave(&dev_priv->backlight.lock, flags);
- 
- 	dev_priv->backlight.enabled = false;
- 	intel_panel_actually_set_backlight(dev, 0);
-@@ -320,12 +336,17 @@ void intel_panel_disable_backlight(struc
- 			I915_WRITE(BLC_PWM_PCH_CTL1, tmp);
- 		}
- 	}
-+
-+	spin_unlock_irqrestore(&dev_priv->backlight.lock, flags);
- }
- 
- void intel_panel_enable_backlight(struct drm_device *dev,
- 				  enum pipe pipe)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
-+	unsigned long flags;
-+
-+	spin_lock_irqsave(&dev_priv->backlight.lock, flags);
- 
- 	if (dev_priv->backlight.level == 0) {
- 		dev_priv->backlight.level = intel_panel_get_max_backlight(dev);
-@@ -376,6 +397,8 @@ set_level:
- 	 */
- 	dev_priv->backlight.enabled = true;
- 	intel_panel_actually_set_backlight(dev, dev_priv->backlight.level);
-+
-+	spin_unlock_irqrestore(&dev_priv->backlight.lock, flags);
- }
- 
- static void intel_panel_init_backlight(struct drm_device *dev)
-@@ -433,6 +456,7 @@ int intel_panel_setup_backlight(struct d
- 	struct drm_device *dev = connector->dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct backlight_properties props;
-+	unsigned long flags;
- 
- 	intel_panel_init_backlight(dev);
- 
-@@ -442,7 +466,11 @@ int intel_panel_setup_backlight(struct d
- 	memset(&props, 0, sizeof(props));
- 	props.type = BACKLIGHT_RAW;
- 	props.brightness = dev_priv->backlight.level;
-+
-+	spin_lock_irqsave(&dev_priv->backlight.lock, flags);
- 	props.max_brightness = intel_panel_get_max_backlight(dev);
-+	spin_unlock_irqrestore(&dev_priv->backlight.lock, flags);
-+
- 	if (props.max_brightness == 0) {
- 		DRM_DEBUG_DRIVER("Failed to get maximum backlight value\n");
- 		return -ENODEV;
diff --git a/patches.baytrail/0055-drm-i915-don-t-pretend-we-support-ASLE-ALS-PFIT-or-P.patch b/patches.baytrail/0055-drm-i915-don-t-pretend-we-support-ASLE-ALS-PFIT-or-P.patch
deleted file mode 100644
index 2f9602b858de8..0000000000000
--- a/patches.baytrail/0055-drm-i915-don-t-pretend-we-support-ASLE-ALS-PFIT-or-P.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From f398c5cc0afdad3aae3f5cfa203343ff8dd34299 Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Fri, 12 Apr 2013 15:20:56 +0300
-Subject: drm/i915: don't pretend we support ASLE ALS, PFIT, or PFMB
-
-In theory, this should prevent the BIOS from requesting them from us, and
-this should be the right thing.
-
-In practice, this is not always the case, and might surprise the BIOS.
-
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 1767afa4d0a6409e24fd9421a7c2df0490a0da4a)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_opregion.c | 4 +---
- 1 file changed, 1 insertion(+), 3 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_opregion.c b/drivers/gpu/drm/i915/intel_opregion.c
-index b9b2694be80f..772fbf344c33 100644
---- a/drivers/gpu/drm/i915/intel_opregion.c
-+++ b/drivers/gpu/drm/i915/intel_opregion.c
-@@ -280,9 +280,7 @@ void intel_opregion_enable_asle(struct drm_device *dev)
- 		if (IS_MOBILE(dev))
- 			intel_enable_asle(dev);
- 
--		iowrite32(ASLE_ALS_EN | ASLE_BLC_EN | ASLE_PFIT_EN |
--			  ASLE_PFMB_EN,
--			  &asle->tche);
-+		iowrite32(ASLE_BLC_EN, &asle->tche);
- 		iowrite32(1, &asle->ardy);
- 	}
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0056-drm-i915-opregion-don-t-pretend-we-did-something-whe.patch b/patches.baytrail/0056-drm-i915-opregion-don-t-pretend-we-did-something-whe.patch
deleted file mode 100644
index 821be6e4a491c..0000000000000
--- a/patches.baytrail/0056-drm-i915-opregion-don-t-pretend-we-did-something-whe.patch
+++ /dev/null
@@ -1,61 +0,0 @@
-From 25c2f460fe47244f7753c9cbb6b9f997748c46cd Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Fri, 12 Apr 2013 15:20:57 +0300
-Subject: drm/i915/opregion: don't pretend we did something when we didn't
-
-In theory, the BIOS should not even request these from us now that we
-aren't claiming we support these, but when it does anyway, don't pretend it
-succeeded. It should be the right thing to do, but might confuse the BIOS.
-
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit e93d440b352a1ba9e99cc17f3d46b1841caef3cd)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_opregion.c | 19 ++++++-------------
- 1 file changed, 6 insertions(+), 13 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_opregion.c b/drivers/gpu/drm/i915/intel_opregion.c
-index 772fbf344c33..34586410743b 100644
---- a/drivers/gpu/drm/i915/intel_opregion.c
-+++ b/drivers/gpu/drm/i915/intel_opregion.c
-@@ -172,29 +172,22 @@ static u32 asle_set_als_illum(struct drm_device *dev, u32 alsi)
- {
- 	/* alsi is the current ALS reading in lux. 0 indicates below sensor
- 	   range, 0xffff indicates above sensor range. 1-0xfffe are valid */
--	return 0;
-+	DRM_DEBUG_DRIVER("Illum is not supported\n");
-+	return ASLE_ALS_ILLUM_FAILED;
- }
- 
- static u32 asle_set_pwm_freq(struct drm_device *dev, u32 pfmb)
- {
--	struct drm_i915_private *dev_priv = dev->dev_private;
--	if (pfmb & ASLE_PFMB_PWM_VALID) {
--		u32 blc_pwm_ctl = I915_READ(BLC_PWM_CTL);
--		u32 pwm = pfmb & ASLE_PFMB_PWM_MASK;
--		blc_pwm_ctl &= BACKLIGHT_DUTY_CYCLE_MASK;
--		pwm = pwm >> 9;
--		/* FIXME - what do we do with the PWM? */
--	}
--	return 0;
-+	DRM_DEBUG_DRIVER("PWM freq is not supported\n");
-+	return ASLE_PWM_FREQ_FAILED;
- }
- 
- static u32 asle_set_pfit(struct drm_device *dev, u32 pfit)
- {
- 	/* Panel fitting is currently controlled by the X code, so this is a
- 	   noop until modesetting support works fully */
--	if (!(pfit & ASLE_PFIT_VALID))
--		return ASLE_PFIT_FAILED;
--	return 0;
-+	DRM_DEBUG_DRIVER("Pfit is not supported\n");
-+	return ASLE_PFIT_FAILED;
- }
- 
- void intel_opregion_asle_intr(struct drm_device *dev)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0057-drm-i915-drop-code-duplication-in-favor-of-asle-inte.patch b/patches.baytrail/0057-drm-i915-drop-code-duplication-in-favor-of-asle-inte.patch
deleted file mode 100644
index 3c25caaf9c632..0000000000000
--- a/patches.baytrail/0057-drm-i915-drop-code-duplication-in-favor-of-asle-inte.patch
+++ /dev/null
@@ -1,112 +0,0 @@
-From 75b6465485ee76c8432d06059734f7bab1b227c7 Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Wed, 24 Apr 2013 22:18:44 +0300
-Subject: drm/i915: drop code duplication in favor of asle interrupt handler
-
-With the previous work asle and gse interrupt handlers should now be
-functionally the same. Drop the duplicated code.
-
-v2: Drop intel_opregion_gse_intr() also in the !CONFIG_ACPI path. (Damien)
-
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 81a078092ed25b1017d1351c68837b750a09933a)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h       |  2 --
- drivers/gpu/drm/i915/i915_irq.c       |  4 ++--
- drivers/gpu/drm/i915/intel_opregion.c | 37 -----------------------------------
- 3 files changed, 2 insertions(+), 41 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 8a8e8dc5c2e1..afc6977303c6 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1825,13 +1825,11 @@ extern int intel_opregion_setup(struct drm_device *dev);
- extern void intel_opregion_init(struct drm_device *dev);
- extern void intel_opregion_fini(struct drm_device *dev);
- extern void intel_opregion_asle_intr(struct drm_device *dev);
--extern void intel_opregion_gse_intr(struct drm_device *dev);
- extern void intel_opregion_enable_asle(struct drm_device *dev);
- #else
- static inline void intel_opregion_init(struct drm_device *dev) { return; }
- static inline void intel_opregion_fini(struct drm_device *dev) { return; }
- static inline void intel_opregion_asle_intr(struct drm_device *dev) { return; }
--static inline void intel_opregion_gse_intr(struct drm_device *dev) { return; }
- static inline void intel_opregion_enable_asle(struct drm_device *dev) { return; }
- #endif
- 
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index 4fe62a65a87a..ebb0c7c3836e 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -1196,7 +1196,7 @@ static irqreturn_t ivybridge_irq_handler(int irq, void *arg)
- 			dp_aux_irq_handler(dev);
- 
- 		if (de_iir & DE_GSE_IVB)
--			intel_opregion_gse_intr(dev);
-+			intel_opregion_asle_intr(dev);
- 
- 		for (i = 0; i < 3; i++) {
- 			if (de_iir & (DE_PIPEA_VBLANK_IVB << (5 * i)))
-@@ -1293,7 +1293,7 @@ static irqreturn_t ironlake_irq_handler(int irq, void *arg)
- 		dp_aux_irq_handler(dev);
- 
- 	if (de_iir & DE_GSE)
--		intel_opregion_gse_intr(dev);
-+		intel_opregion_asle_intr(dev);
- 
- 	if (de_iir & DE_PIPEA_VBLANK)
- 		drm_handle_vblank(dev, 0);
-diff --git a/drivers/gpu/drm/i915/intel_opregion.c b/drivers/gpu/drm/i915/intel_opregion.c
-index 34586410743b..8f4989476a6f 100644
---- a/drivers/gpu/drm/i915/intel_opregion.c
-+++ b/drivers/gpu/drm/i915/intel_opregion.c
-@@ -222,43 +222,6 @@ void intel_opregion_asle_intr(struct drm_device *dev)
- 	iowrite32(asle_stat, &asle->aslc);
- }
- 
--void intel_opregion_gse_intr(struct drm_device *dev)
--{
--	struct drm_i915_private *dev_priv = dev->dev_private;
--	struct opregion_asle __iomem *asle = dev_priv->opregion.asle;
--	u32 asle_stat = 0;
--	u32 asle_req;
--
--	if (!asle)
--		return;
--
--	asle_req = ioread32(&asle->aslc) & ASLE_REQ_MSK;
--
--	if (!asle_req) {
--		DRM_DEBUG_DRIVER("non asle set request??\n");
--		return;
--	}
--
--	if (asle_req & ASLE_SET_ALS_ILLUM) {
--		DRM_DEBUG_DRIVER("Illum is not supported\n");
--		asle_stat |= ASLE_ALS_ILLUM_FAILED;
--	}
--
--	if (asle_req & ASLE_SET_BACKLIGHT)
--		asle_stat |= asle_set_backlight(dev, ioread32(&asle->bclp));
--
--	if (asle_req & ASLE_SET_PFIT) {
--		DRM_DEBUG_DRIVER("Pfit is not supported\n");
--		asle_stat |= ASLE_PFIT_FAILED;
--	}
--
--	if (asle_req & ASLE_SET_PWM_FREQ) {
--		DRM_DEBUG_DRIVER("PWM freq is not supported\n");
--		asle_stat |= ASLE_PWM_FREQ_FAILED;
--	}
--
--	iowrite32(asle_stat, &asle->aslc);
--}
- #define ASLE_ALS_EN    (1<<0)
- #define ASLE_BLC_EN    (1<<1)
- #define ASLE_PFIT_EN   (1<<2)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0058-drm-i915-hsw-backlight-registers-need-transcoder-ins.patch b/patches.baytrail/0058-drm-i915-hsw-backlight-registers-need-transcoder-ins.patch
deleted file mode 100644
index 70bf8f08ebd4a..0000000000000
--- a/patches.baytrail/0058-drm-i915-hsw-backlight-registers-need-transcoder-ins.patch
+++ /dev/null
@@ -1,53 +0,0 @@
-From 069a4e64a35dc46ffd6b5b89f1d3ee18ed919ddf Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Thu, 25 Apr 2013 16:49:25 +0300
-Subject: drm/i915: hsw backlight registers need transcoder instead of pipe
-
-v2: Make TRANSCODER_EDP handling more explicit. (Imre)
-
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Reviewed-by: Imre Deak <imre.deak@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 35ffda4883a8d3f75632d7389dc96a25640033f0)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_reg.h    |    4 ++++
- drivers/gpu/drm/i915/intel_panel.c |    7 ++++++-
- 2 files changed, 10 insertions(+), 1 deletion(-)
-
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -2095,6 +2095,10 @@
- #define   BLM_PIPE_A			(0 << 29)
- #define   BLM_PIPE_B			(1 << 29)
- #define   BLM_PIPE_C			(2 << 29) /* ivb + */
-+#define   BLM_TRANSCODER_A		BLM_PIPE_A /* hsw */
-+#define   BLM_TRANSCODER_B		BLM_PIPE_B
-+#define   BLM_TRANSCODER_C		BLM_PIPE_C
-+#define   BLM_TRANSCODER_EDP		(3 << 29)
- #define   BLM_PIPE(pipe)		((pipe) << 29)
- #define   BLM_POLARITY_I965		(1 << 28) /* gen4 only */
- #define   BLM_PHASE_IN_INTERUPT_STATUS	(1 << 26)
---- a/drivers/gpu/drm/i915/intel_panel.c
-+++ b/drivers/gpu/drm/i915/intel_panel.c
-@@ -344,6 +344,8 @@ void intel_panel_enable_backlight(struct
- 				  enum pipe pipe)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
-+	enum transcoder cpu_transcoder =
-+		intel_pipe_to_cpu_transcoder(dev_priv, pipe);
- 	unsigned long flags;
- 
- 	spin_lock_irqsave(&dev_priv->backlight.lock, flags);
-@@ -374,7 +376,10 @@ void intel_panel_enable_backlight(struct
- 		else
- 			tmp &= ~BLM_PIPE_SELECT;
- 
--		tmp |= BLM_PIPE(pipe);
-+		if (cpu_transcoder == TRANSCODER_EDP)
-+			tmp |= BLM_TRANSCODER_EDP;
-+		else
-+			tmp |= BLM_PIPE(cpu_transcoder);
- 		tmp &= ~BLM_PWM_ENABLE;
- 
- 		I915_WRITE(reg, tmp);
diff --git a/patches.baytrail/0059-drm-i915-Ivybridge-is-the-odd-one-when-it-comes-to-p.patch b/patches.baytrail/0059-drm-i915-Ivybridge-is-the-odd-one-when-it-comes-to-p.patch
deleted file mode 100644
index 2bb92995fcab9..0000000000000
--- a/patches.baytrail/0059-drm-i915-Ivybridge-is-the-odd-one-when-it-comes-to-p.patch
+++ /dev/null
@@ -1,59 +0,0 @@
-From ca90df43636d314d7febd1d7533dcb6c728bbd68 Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Thu, 25 Apr 2013 15:15:00 +0100
-Subject: drm/i915: Ivybridge is the odd one when it comes to pipe scalers
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Between ivb, hsw and vlv, only Ivybridge has sprites with scaling
-capabilities.
-
-Also make max_downscale coherent with that.
-
-v2: Rebase on top of the recent ivb/vlv/hsw sprite scaling fixes.
-
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> (v1)
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit d49f70915c07c1a313e459d23fad61ddbeeb1bae)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_sprite.c | 11 ++++++-----
- 1 file changed, 6 insertions(+), 5 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
-index c7d25c5dd4e6..18993ad93540 100644
---- a/drivers/gpu/drm/i915/intel_sprite.c
-+++ b/drivers/gpu/drm/i915/intel_sprite.c
-@@ -918,13 +918,15 @@ intel_plane_init(struct drm_device *dev, enum pipe pipe, int plane)
- 		break;
- 
- 	case 7:
--		if (IS_HASWELL(dev) || IS_VALLEYVIEW(dev))
--			intel_plane->can_scale = false;
--		else
-+		if (IS_IVYBRIDGE(dev)) {
- 			intel_plane->can_scale = true;
-+			intel_plane->max_downscale = 2;
-+		} else {
-+			intel_plane->can_scale = false;
-+			intel_plane->max_downscale = 1;
-+		}
- 
- 		if (IS_VALLEYVIEW(dev)) {
--			intel_plane->max_downscale = 1;
- 			intel_plane->update_plane = vlv_update_plane;
- 			intel_plane->disable_plane = vlv_disable_plane;
- 			intel_plane->update_colorkey = vlv_update_colorkey;
-@@ -933,7 +935,6 @@ intel_plane_init(struct drm_device *dev, enum pipe pipe, int plane)
- 			plane_formats = vlv_plane_formats;
- 			num_plane_formats = ARRAY_SIZE(vlv_plane_formats);
- 		} else {
--			intel_plane->max_downscale = 2;
- 			intel_plane->update_plane = ivb_update_plane;
- 			intel_plane->disable_plane = ivb_disable_plane;
- 			intel_plane->update_colorkey = ivb_update_colorkey;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0060-drm-i915-consolidate-pch-pll-computations-a-bit.patch b/patches.baytrail/0060-drm-i915-consolidate-pch-pll-computations-a-bit.patch
deleted file mode 100644
index 24b31d13b921c..0000000000000
--- a/patches.baytrail/0060-drm-i915-consolidate-pch-pll-computations-a-bit.patch
+++ /dev/null
@@ -1,66 +0,0 @@
-From 96c7053090b00d033164a2b794fa8efda5fda38f Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Fri, 19 Apr 2013 11:14:31 +0200
-Subject: drm/i915: consolidate pch pll computations a bit
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-We need the dpll/fp/fp2 values only when we need a pch pll. So move
-them together with the code to acquire such a pll.
-
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit cbbab5bdea0df4e85ac7fbc0b3e1d7dee71cb708)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 19 ++++++++++---------
- 1 file changed, 10 insertions(+), 9 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index f8d54036bcf3..1afc053c39cc 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -5716,7 +5716,7 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
- 	int plane = intel_crtc->plane;
- 	int num_connectors = 0;
- 	intel_clock_t clock, reduced_clock;
--	u32 dpll, fp = 0, fp2 = 0;
-+	u32 dpll = 0, fp = 0, fp2 = 0;
- 	bool ok, has_reduced_clock = false;
- 	bool is_lvds = false;
- 	struct intel_encoder *encoder;
-@@ -5761,14 +5761,6 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
- 	if (is_lvds && dev_priv->lvds_dither)
- 		dither = true;
- 
--	fp = clock.n << 16 | clock.m1 << 8 | clock.m2;
--	if (has_reduced_clock)
--		fp2 = reduced_clock.n << 16 | reduced_clock.m1 << 8 |
--			reduced_clock.m2;
--
--	dpll = ironlake_compute_dpll(intel_crtc, &clock, &fp, &reduced_clock,
--				     has_reduced_clock ? &fp2 : NULL);
--
- 	DRM_DEBUG_KMS("Mode for pipe %c:\n", pipe_name(pipe));
- 	drm_mode_debug_printmodeline(mode);
- 
-@@ -5776,6 +5768,15 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
- 	if (intel_crtc->config.has_pch_encoder) {
- 		struct intel_pch_pll *pll;
- 
-+		fp = clock.n << 16 | clock.m1 << 8 | clock.m2;
-+		if (has_reduced_clock)
-+			fp2 = reduced_clock.n << 16 | reduced_clock.m1 << 8 |
-+				reduced_clock.m2;
-+
-+		dpll = ironlake_compute_dpll(intel_crtc, &clock,
-+					     &fp, &reduced_clock,
-+					     has_reduced_clock ? &fp2 : NULL);
-+
- 		pll = intel_get_pch_pll(intel_crtc, dpll, fp);
- 		if (pll == NULL) {
- 			DRM_DEBUG_DRIVER("failed to find PLL for pipe %c\n",
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0061-drm-i915-shovel-compute-clock-into-crtc-config.dpll-.patch b/patches.baytrail/0061-drm-i915-shovel-compute-clock-into-crtc-config.dpll-.patch
deleted file mode 100644
index 50370ed120dd0..0000000000000
--- a/patches.baytrail/0061-drm-i915-shovel-compute-clock-into-crtc-config.dpll-.patch
+++ /dev/null
@@ -1,152 +0,0 @@
-From 9b72e6a45a1bd7a34003f4081443639cfd075dac Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Sat, 20 Apr 2013 17:19:46 +0200
-Subject: drm/i915: shovel compute clock into crtc->config.dpll on ilk
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-This was somehow lost in the pipe_config->dpll introduction in
-
-commit f47709a9502f3715cc488b788ca91cf0c142b1b1
-Author: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date:   Thu Mar 28 10:42:02 2013 +0100
-
-    drm/i915: create pipe_config->dpll for clock state
-
-While at it, extract a few small helpers for common computations.
-
-v2: Use the newly added helpers more thanks to Ville's trick to
-typedef the legacy intel_clock_t as the new-world struct dpll.
-
-Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 7429e9d4bfcfd08a00ed7b760386bd81a60e91d6)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 50 ++++++++++++++++++++++++------------
- 1 file changed, 33 insertions(+), 17 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 1afc053c39cc..eefc8e2ebe94 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -549,13 +549,18 @@ static void pineview_clock(int refclk, intel_clock_t *clock)
- 	clock->dot = clock->vco / clock->p;
- }
- 
-+static uint32_t i9xx_dpll_compute_m(struct dpll *dpll)
-+{
-+	return 5 * (dpll->m1 + 2) + (dpll->m2 + 2);
-+}
-+
- static void intel_clock(struct drm_device *dev, int refclk, intel_clock_t *clock)
- {
- 	if (IS_PINEVIEW(dev)) {
- 		pineview_clock(refclk, clock);
- 		return;
- 	}
--	clock->m = 5 * (clock->m1 + 2) + (clock->m2 + 2);
-+	clock->m = i9xx_dpll_compute_m(clock);
- 	clock->p = clock->p1 * clock->p2;
- 	clock->vco = refclk * clock->m / (clock->n + 2);
- 	clock->dot = clock->vco / clock->p;
-@@ -4247,6 +4252,16 @@ static void i9xx_adjust_sdvo_tv_clock(struct intel_crtc *crtc)
- 	crtc->config.clock_set = true;
- }
- 
-+static uint32_t pnv_dpll_compute_fp(struct dpll *dpll)
-+{
-+	return (1 << dpll->n) << 16 | dpll->m1 << 8 | dpll->m2;
-+}
-+
-+static uint32_t i9xx_dpll_compute_fp(struct dpll *dpll)
-+{
-+	return dpll->n << 16 | dpll->m1 << 8 | dpll->m2;
-+}
-+
- static void i9xx_update_pll_dividers(struct intel_crtc *crtc,
- 				     intel_clock_t *reduced_clock)
- {
-@@ -4254,18 +4269,15 @@ static void i9xx_update_pll_dividers(struct intel_crtc *crtc,
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	int pipe = crtc->pipe;
- 	u32 fp, fp2 = 0;
--	struct dpll *clock = &crtc->config.dpll;
- 
- 	if (IS_PINEVIEW(dev)) {
--		fp = (1 << clock->n) << 16 | clock->m1 << 8 | clock->m2;
-+		fp = pnv_dpll_compute_fp(&crtc->config.dpll);
- 		if (reduced_clock)
--			fp2 = (1 << reduced_clock->n) << 16 |
--				reduced_clock->m1 << 8 | reduced_clock->m2;
-+			fp2 = pnv_dpll_compute_fp(reduced_clock);
- 	} else {
--		fp = clock->n << 16 | clock->m1 << 8 | clock->m2;
-+		fp = i9xx_dpll_compute_fp(&crtc->config.dpll);
- 		if (reduced_clock)
--			fp2 = reduced_clock->n << 16 | reduced_clock->m1 << 8 |
--				reduced_clock->m2;
-+			fp2 = i9xx_dpll_compute_fp(reduced_clock);
- 	}
- 
- 	I915_WRITE(FP0(pipe), fp);
-@@ -5604,8 +5616,13 @@ static void ironlake_fdi_set_m_n(struct drm_crtc *crtc)
- 	intel_cpu_transcoder_set_m_n(intel_crtc, &m_n);
- }
- 
-+static bool ironlake_needs_fb_cb_tune(struct dpll *dpll, int factor)
-+{
-+	return i9xx_dpll_compute_m(dpll) < factor * dpll->n;
-+}
-+
- static uint32_t ironlake_compute_dpll(struct intel_crtc *intel_crtc,
--				      intel_clock_t *clock, u32 *fp,
-+				      u32 *fp,
- 				      intel_clock_t *reduced_clock, u32 *fp2)
- {
- 	struct drm_crtc *crtc = &intel_crtc->base;
-@@ -5645,7 +5662,7 @@ static uint32_t ironlake_compute_dpll(struct intel_crtc *intel_crtc,
- 	} else if (is_sdvo && is_tv)
- 		factor = 20;
- 
--	if (clock->m < factor * clock->n)
-+	if (ironlake_needs_fb_cb_tune(&intel_crtc->config.dpll, factor))
- 		*fp |= FP_CB_TUNE;
- 
- 	if (fp2 && (reduced_clock->m < factor * reduced_clock->n))
-@@ -5669,11 +5686,11 @@ static uint32_t ironlake_compute_dpll(struct intel_crtc *intel_crtc,
- 		dpll |= DPLL_DVO_HIGH_SPEED;
- 
- 	/* compute bitmask from p1 value */
--	dpll |= (1 << (clock->p1 - 1)) << DPLL_FPA01_P1_POST_DIV_SHIFT;
-+	dpll |= (1 << (intel_crtc->config.dpll.p1 - 1)) << DPLL_FPA01_P1_POST_DIV_SHIFT;
- 	/* also FPA1 */
--	dpll |= (1 << (clock->p1 - 1)) << DPLL_FPA1_P1_POST_DIV_SHIFT;
-+	dpll |= (1 << (intel_crtc->config.dpll.p1 - 1)) << DPLL_FPA1_P1_POST_DIV_SHIFT;
- 
--	switch (clock->p2) {
-+	switch (intel_crtc->config.dpll.p2) {
- 	case 5:
- 		dpll |= DPLL_DAC_SERIAL_P2_CLOCK_DIV_5;
- 		break;
-@@ -5768,12 +5785,11 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
- 	if (intel_crtc->config.has_pch_encoder) {
- 		struct intel_pch_pll *pll;
- 
--		fp = clock.n << 16 | clock.m1 << 8 | clock.m2;
-+		fp = i9xx_dpll_compute_fp(&intel_crtc->config.dpll);
- 		if (has_reduced_clock)
--			fp2 = reduced_clock.n << 16 | reduced_clock.m1 << 8 |
--				reduced_clock.m2;
-+			fp2 = i9xx_dpll_compute_fp(&reduced_clock);
- 
--		dpll = ironlake_compute_dpll(intel_crtc, &clock,
-+		dpll = ironlake_compute_dpll(intel_crtc,
- 					     &fp, &reduced_clock,
- 					     has_reduced_clock ? &fp2 : NULL);
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0062-drm-i915-move-dp-clock-computations-to-encoder-compu.patch b/patches.baytrail/0062-drm-i915-move-dp-clock-computations-to-encoder-compu.patch
deleted file mode 100644
index 70931eb13c615..0000000000000
--- a/patches.baytrail/0062-drm-i915-move-dp-clock-computations-to-encoder-compu.patch
+++ /dev/null
@@ -1,252 +0,0 @@
-From 92ad83df80e58305d098ae4d83206d0ca57f39d0 Mon Sep 17 00:00:00 2001
-From: James Ausmus <james.ausmus@intel.com>
-Date: Mon, 23 Sep 2013 16:48:59 -0700
-Subject: drm/i915: move dp clock computations to encoder->compute_config
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-With the exception of hsw, which has dedicated DP clocks which run at
-the fixed frequency already, and vlv, which doesn't have optmized
-pre-defined dp clock parameters (yet).
-
-v2: Ville asked me to elaborate a bit more on the longer-term goals
-wrt dpll settings computation:
-
-So ultimately my idea is that in the compute config stage first the crtc
-code puts the default platform pll limits into the pipe_config. Then
-encoders can either overwrite that limit structure with their own special
-stuff (mostly for lvds madness). Or they can pick some or all of the
-parameters (e.g. just the p2 switchover on hdmi, or all the clock
-parameters for dp/sdvo tv).
-
-Once that's done then the generic crtc code can fill out any missing bits
-(using the find_best_pll code) and then try to assign which pll to use (if
-it's a platform with shared plls). In the end the modeset could should
-simply write the computed stuff into registers and never be able to fail.
-
-Of course there's still a lot of data to be moved into pipe_config to make
-this all happen, hence some of the temporary ugliness.
-
-Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> (v1)
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit c6bb353815c30c3f8a33b436314926706f4b6360)
-
-Conflicts:
-	drivers/gpu/drm/i915/intel_dp.c
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 97 +-----------------------------------
- drivers/gpu/drm/i915/intel_dp.c      | 45 +++++++++++++++++
- 2 files changed, 46 insertions(+), 96 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index eefc8e2ebe94..32e3fea86606 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -102,15 +102,6 @@ intel_g4x_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
- 			intel_clock_t *best_clock);
- 
- static bool
--intel_find_pll_g4x_dp(const intel_limit_t *, struct drm_crtc *crtc,
--		      int target, int refclk, intel_clock_t *match_clock,
--		      intel_clock_t *best_clock);
--static bool
--intel_find_pll_ironlake_dp(const intel_limit_t *, struct drm_crtc *crtc,
--			   int target, int refclk, intel_clock_t *match_clock,
--			   intel_clock_t *best_clock);
--
--static bool
- intel_vlv_find_best_pll(const intel_limit_t *limit, struct drm_crtc *crtc,
- 			int target, int refclk, intel_clock_t *match_clock,
- 			intel_clock_t *best_clock);
-@@ -242,20 +233,6 @@ static const intel_limit_t intel_limits_g4x_dual_channel_lvds = {
- 	.find_pll = intel_g4x_find_best_PLL,
- };
- 
--static const intel_limit_t intel_limits_g4x_display_port = {
--	.dot = { .min = 161670, .max = 227000 },
--	.vco = { .min = 1750000, .max = 3500000},
--	.n = { .min = 1, .max = 2 },
--	.m = { .min = 97, .max = 108 },
--	.m1 = { .min = 0x10, .max = 0x12 },
--	.m2 = { .min = 0x05, .max = 0x06 },
--	.p = { .min = 10, .max = 20 },
--	.p1 = { .min = 1, .max = 2},
--	.p2 = { .dot_limit = 0,
--		.p2_slow = 10, .p2_fast = 10 },
--	.find_pll = intel_find_pll_g4x_dp,
--};
--
- static const intel_limit_t intel_limits_pineview_sdvo = {
- 	.dot = { .min = 20000, .max = 400000},
- 	.vco = { .min = 1700000, .max = 3500000 },
-@@ -362,20 +339,6 @@ static const intel_limit_t intel_limits_ironlake_dual_lvds_100m = {
- 	.find_pll = intel_g4x_find_best_PLL,
- };
- 
--static const intel_limit_t intel_limits_ironlake_display_port = {
--	.dot = { .min = 25000, .max = 350000 },
--	.vco = { .min = 1760000, .max = 3510000},
--	.n = { .min = 1, .max = 2 },
--	.m = { .min = 81, .max = 90 },
--	.m1 = { .min = 12, .max = 22 },
--	.m2 = { .min = 5, .max = 9 },
--	.p = { .min = 10, .max = 20 },
--	.p1 = { .min = 1, .max = 2},
--	.p2 = { .dot_limit = 0,
--		.p2_slow = 10, .p2_fast = 10 },
--	.find_pll = intel_find_pll_ironlake_dp,
--};
--
- static const intel_limit_t intel_limits_vlv_dac = {
- 	.dot = { .min = 25000, .max = 270000 },
- 	.vco = { .min = 4000000, .max = 6000000 },
-@@ -473,10 +436,7 @@ static const intel_limit_t *intel_ironlake_limit(struct drm_crtc *crtc,
- 			else
- 				limit = &intel_limits_ironlake_single_lvds;
- 		}
--	} else if (intel_pipe_has_type(crtc, INTEL_OUTPUT_DISPLAYPORT) ||
--		   intel_pipe_has_type(crtc, INTEL_OUTPUT_EDP))
--		limit = &intel_limits_ironlake_display_port;
--	else
-+	} else
- 		limit = &intel_limits_ironlake_dac;
- 
- 	return limit;
-@@ -497,8 +457,6 @@ static const intel_limit_t *intel_g4x_limit(struct drm_crtc *crtc)
- 		limit = &intel_limits_g4x_hdmi;
- 	} else if (intel_pipe_has_type(crtc, INTEL_OUTPUT_SDVO)) {
- 		limit = &intel_limits_g4x_sdvo;
--	} else if (intel_pipe_has_type(crtc, INTEL_OUTPUT_DISPLAYPORT)) {
--		limit = &intel_limits_g4x_display_port;
- 	} else /* The option is for other outputs */
- 		limit = &intel_limits_i9xx_sdvo;
- 
-@@ -746,59 +704,6 @@ intel_g4x_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
- }
- 
- static bool
--intel_find_pll_ironlake_dp(const intel_limit_t *limit, struct drm_crtc *crtc,
--			   int target, int refclk, intel_clock_t *match_clock,
--			   intel_clock_t *best_clock)
--{
--	struct drm_device *dev = crtc->dev;
--	intel_clock_t clock;
--
--	if (target < 200000) {
--		clock.n = 1;
--		clock.p1 = 2;
--		clock.p2 = 10;
--		clock.m1 = 12;
--		clock.m2 = 9;
--	} else {
--		clock.n = 2;
--		clock.p1 = 1;
--		clock.p2 = 10;
--		clock.m1 = 14;
--		clock.m2 = 8;
--	}
--	intel_clock(dev, refclk, &clock);
--	memcpy(best_clock, &clock, sizeof(intel_clock_t));
--	return true;
--}
--
--/* DisplayPort has only two frequencies, 162MHz and 270MHz */
--static bool
--intel_find_pll_g4x_dp(const intel_limit_t *limit, struct drm_crtc *crtc,
--		      int target, int refclk, intel_clock_t *match_clock,
--		      intel_clock_t *best_clock)
--{
--	intel_clock_t clock;
--	if (target < 200000) {
--		clock.p1 = 2;
--		clock.p2 = 10;
--		clock.n = 2;
--		clock.m1 = 23;
--		clock.m2 = 8;
--	} else {
--		clock.p1 = 1;
--		clock.p2 = 10;
--		clock.n = 1;
--		clock.m1 = 14;
--		clock.m2 = 2;
--	}
--	clock.m = 5 * (clock.m1 + 2) + (clock.m2 + 2);
--	clock.p = (clock.p1 * clock.p2);
--	clock.dot = 96000 * clock.m / (clock.n + 2) / clock.p;
--	clock.vco = 0;
--	memcpy(best_clock, &clock, sizeof(intel_clock_t));
--	return true;
--}
--static bool
- intel_vlv_find_best_pll(const intel_limit_t *limit, struct drm_crtc *crtc,
- 			int target, int refclk, intel_clock_t *match_clock,
- 			intel_clock_t *best_clock)
-diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
-index d8407c9b0504..fbae5092b1f6 100644
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -671,6 +671,49 @@ intel_dp_i2c_init(struct intel_dp *intel_dp,
- 	return ret;
- }
- 
-+static void
-+intel_dp_set_clock(struct intel_encoder *encoder,
-+		   struct intel_crtc_config *pipe_config, int link_bw)
-+{
-+	struct drm_device *dev = encoder->base.dev;
-+
-+	if (IS_G4X(dev)) {
-+		if (link_bw == DP_LINK_BW_1_62) {
-+			pipe_config->dpll.p1 = 2;
-+			pipe_config->dpll.p2 = 10;
-+			pipe_config->dpll.n = 2;
-+			pipe_config->dpll.m1 = 23;
-+			pipe_config->dpll.m2 = 8;
-+		} else {
-+			pipe_config->dpll.p1 = 1;
-+			pipe_config->dpll.p2 = 10;
-+			pipe_config->dpll.n = 1;
-+			pipe_config->dpll.m1 = 14;
-+			pipe_config->dpll.m2 = 2;
-+		}
-+		pipe_config->clock_set = true;
-+	} else if (IS_HASWELL(dev)) {
-+		/* Haswell has special-purpose DP DDI clocks. */
-+	} else if (HAS_PCH_SPLIT(dev)) {
-+		if (link_bw == DP_LINK_BW_1_62) {
-+			pipe_config->dpll.n = 1;
-+			pipe_config->dpll.p1 = 2;
-+			pipe_config->dpll.p2 = 10;
-+			pipe_config->dpll.m1 = 12;
-+			pipe_config->dpll.m2 = 9;
-+		} else {
-+			pipe_config->dpll.n = 2;
-+			pipe_config->dpll.p1 = 1;
-+			pipe_config->dpll.p2 = 10;
-+			pipe_config->dpll.m1 = 14;
-+			pipe_config->dpll.m2 = 8;
-+		}
-+		pipe_config->clock_set = true;
-+	} else if (IS_VALLEYVIEW(dev)) {
-+		/* FIXME: Need to figure out optimized DP clocks for vlv. */
-+	}
-+}
-+
- bool
- intel_dp_compute_config(struct intel_encoder *encoder,
- 			struct intel_crtc_config *pipe_config)
-@@ -766,6 +809,8 @@ found:
- 			       target_clock, adjusted_mode->clock,
- 			       &pipe_config->dp_m_n);
- 
-+	intel_dp_set_clock(encoder, pipe_config, intel_dp->link_bw);
-+
- 	return true;
- }
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0063-drm-i915-use-pipe_config-for-lvds-dithering.patch b/patches.baytrail/0063-drm-i915-use-pipe_config-for-lvds-dithering.patch
deleted file mode 100644
index 5e61df4326dfc..0000000000000
--- a/patches.baytrail/0063-drm-i915-use-pipe_config-for-lvds-dithering.patch
+++ /dev/null
@@ -1,203 +0,0 @@
-From 0af02f1028efb594bf9a6efacc6c8884eac1628f Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 25 Apr 2013 17:54:44 +0200
-Subject: drm/i915: use pipe_config for lvds dithering
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Up to now we've relied on the bios to get this right for us. Let's try
-out whether our code has improved a bit, since we should dither
-always when the output bpp doesn't match the plane bpp.
-- gen5+ should be fine, since we only use the bios hint as an upgrade.
-- gen4 changes, since here dithering is still controlled in the lvds
-  register.
-- gen2/3 has implicit dithering depeding upon whether you use 2 or 3
-  lvds pairs (which makes sense, since it only supports 8bpc pipe
-  outpu configurations).
-- hsw doesn't support lvds.
-
-v2: Remove redudant dither setting.
-
-v3: Completly drop reliance on dev_priv->lvds_dither.
-
-v4: Enable dithering on gen2/3 only when we have a 18bpp panel, since
-up-dithering to a 24bpp panel is not supported by the hw. Spotted by
-Ville.
-
-v5: Also only enable lvds port dithering on gen4 for 18bpp modes. In
-practice this only excludes dithering a 10bpc plane down for a 24bpp
-lvds panel. Not something we truly care about. Again noticed by Ville.
-
-v6: Actually git add.
-
-Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit d8b322474941fa565ba5c58292ccc54be92cca41)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 25 +++++++------------------
- drivers/gpu/drm/i915/intel_drv.h     |  5 +++++
- drivers/gpu/drm/i915/intel_lvds.c    | 15 ++++++++++-----
- 3 files changed, 22 insertions(+), 23 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 32e3fea86606..07f526ff5557 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -5158,8 +5158,7 @@ static int ironlake_get_refclk(struct drm_crtc *crtc)
- }
- 
- static void ironlake_set_pipeconf(struct drm_crtc *crtc,
--				  struct drm_display_mode *adjusted_mode,
--				  bool dither)
-+				  struct drm_display_mode *adjusted_mode)
- {
- 	struct drm_i915_private *dev_priv = crtc->dev->dev_private;
- 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
-@@ -5188,7 +5187,7 @@ static void ironlake_set_pipeconf(struct drm_crtc *crtc,
- 	}
- 
- 	val &= ~(PIPECONF_DITHER_EN | PIPECONF_DITHER_TYPE_MASK);
--	if (dither)
-+	if (intel_crtc->config.dither)
- 		val |= (PIPECONF_DITHER_EN | PIPECONF_DITHER_TYPE_SP);
- 
- 	val &= ~PIPECONF_INTERLACE_MASK;
-@@ -5271,8 +5270,7 @@ static void intel_set_pipe_csc(struct drm_crtc *crtc)
- }
- 
- static void haswell_set_pipeconf(struct drm_crtc *crtc,
--				 struct drm_display_mode *adjusted_mode,
--				 bool dither)
-+				 struct drm_display_mode *adjusted_mode)
- {
- 	struct drm_i915_private *dev_priv = crtc->dev->dev_private;
- 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
-@@ -5282,7 +5280,7 @@ static void haswell_set_pipeconf(struct drm_crtc *crtc,
- 	val = I915_READ(PIPECONF(cpu_transcoder));
- 
- 	val &= ~(PIPECONF_DITHER_EN | PIPECONF_DITHER_TYPE_MASK);
--	if (dither)
-+	if (intel_crtc->config.dither)
- 		val |= (PIPECONF_DITHER_EN | PIPECONF_DITHER_TYPE_SP);
- 
- 	val &= ~PIPECONF_INTERLACE_MASK_HSW;
-@@ -5643,7 +5641,7 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
- 	bool is_lvds = false;
- 	struct intel_encoder *encoder;
- 	int ret;
--	bool dither, fdi_config_ok;
-+	bool fdi_config_ok;
- 
- 	for_each_encoder_on_crtc(dev, crtc, encoder) {
- 		switch (encoder->type) {
-@@ -5678,11 +5676,6 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
- 	/* Ensure that the cursor is valid for the new mode before changing... */
- 	intel_crtc_update_cursor(crtc, true);
- 
--	/* determine panel color depth */
--	dither = intel_crtc->config.dither;
--	if (is_lvds && dev_priv->lvds_dither)
--		dither = true;
--
- 	DRM_DEBUG_KMS("Mode for pipe %c:\n", pipe_name(pipe));
- 	drm_mode_debug_printmodeline(mode);
- 
-@@ -5749,7 +5742,7 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
- 
- 	fdi_config_ok = ironlake_check_fdi_lanes(intel_crtc);
- 
--	ironlake_set_pipeconf(crtc, adjusted_mode, dither);
-+	ironlake_set_pipeconf(crtc, adjusted_mode);
- 
- 	/* Set up the display plane register */
- 	I915_WRITE(DSPCNTR(plane), DISPPLANE_GAMMA_ENABLE);
-@@ -5826,7 +5819,6 @@ static int haswell_crtc_mode_set(struct drm_crtc *crtc,
- 	bool is_cpu_edp = false;
- 	struct intel_encoder *encoder;
- 	int ret;
--	bool dither;
- 
- 	for_each_encoder_on_crtc(dev, crtc, encoder) {
- 		switch (encoder->type) {
-@@ -5862,9 +5854,6 @@ static int haswell_crtc_mode_set(struct drm_crtc *crtc,
- 	/* Ensure that the cursor is valid for the new mode before changing... */
- 	intel_crtc_update_cursor(crtc, true);
- 
--	/* determine panel color depth */
--	dither = intel_crtc->config.dither;
--
- 	DRM_DEBUG_KMS("Mode for pipe %c:\n", pipe_name(pipe));
- 	drm_mode_debug_printmodeline(mode);
- 
-@@ -5878,7 +5867,7 @@ static int haswell_crtc_mode_set(struct drm_crtc *crtc,
- 	if (intel_crtc->config.has_pch_encoder)
- 		ironlake_fdi_set_m_n(crtc);
- 
--	haswell_set_pipeconf(crtc, adjusted_mode, dither);
-+	haswell_set_pipeconf(crtc, adjusted_mode);
- 
- 	intel_set_pipe_csc(crtc);
- 
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index 86a26ae1615f..52b2505f1823 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -213,6 +213,11 @@ struct intel_crtc_config {
- 	/* DP has a bunch of special case unfortunately, so mark the pipe
- 	 * accordingly. */
- 	bool has_dp_encoder;
-+
-+	/*
-+	 * Enable dithering, used when the selected pipe bpp doesn't match the
-+	 * plane bpp.
-+	 */
- 	bool dither;
- 
- 	/* Controls for the clock computation, to override various stages. */
-diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
-index 2379b5e404df..855c0850f030 100644
---- a/drivers/gpu/drm/i915/intel_lvds.c
-+++ b/drivers/gpu/drm/i915/intel_lvds.c
-@@ -136,7 +136,10 @@ static void intel_pre_pll_enable_lvds(struct intel_encoder *encoder)
- 	 * special lvds dither control bit on pch-split platforms, dithering is
- 	 * only controlled through the PIPECONF reg. */
- 	if (INTEL_INFO(dev)->gen == 4) {
--		if (dev_priv->lvds_dither)
-+		/* Bspec wording suggests that LVDS port dithering only exists
-+		 * for 18bpp panels. */
-+		if (intel_crtc->config.dither &&
-+		    intel_crtc->config.pipe_bpp == 18)
- 			temp |= LVDS_ENABLE_DITHER;
- 		else
- 			temp &= ~LVDS_ENABLE_DITHER;
-@@ -335,7 +338,13 @@ static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
- 		DRM_DEBUG_KMS("forcing display bpp (was %d) to LVDS (%d)\n",
- 			      pipe_config->pipe_bpp, lvds_bpp);
- 		pipe_config->pipe_bpp = lvds_bpp;
-+
-+		/* Make sure pre-965 set dither correctly for 18bpp panels. */
-+		if (INTEL_INFO(dev)->gen < 4 && lvds_bpp == 18)
-+			pfit_control |= PANEL_8TO6_DITHER_ENABLE;
-+
- 	}
-+
- 	/*
- 	 * We have timings from the BIOS for the panel, put them in
- 	 * to the adjusted mode.  The CRTC will be set up for this mode,
-@@ -470,10 +479,6 @@ out:
- 		pfit_pgm_ratios = 0;
- 	}
- 
--	/* Make sure pre-965 set dither correctly */
--	if (INTEL_INFO(dev)->gen < 4 && dev_priv->lvds_dither)
--		pfit_control |= PANEL_8TO6_DITHER_ENABLE;
--
- 	if (pfit_control != lvds_encoder->pfit_control ||
- 	    pfit_pgm_ratios != lvds_encoder->pfit_pgm_ratios) {
- 		lvds_encoder->pfit_control = pfit_control;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0064-drm-i915-don-t-force-matching-p1-for-g4x-ilk-reduced.patch b/patches.baytrail/0064-drm-i915-don-t-force-matching-p1-for-g4x-ilk-reduced.patch
deleted file mode 100644
index 8fa445cafbccc..0000000000000
--- a/patches.baytrail/0064-drm-i915-don-t-force-matching-p1-for-g4x-ilk-reduced.patch
+++ /dev/null
@@ -1,47 +0,0 @@
-From 7a4b736b75ae8af323ae98892804544622892b3a Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Fri, 19 Apr 2013 11:14:35 +0200
-Subject: drm/i915: don't force matching p1 for g4x/ilk+ reduced pll settings
-
-g4x dplls and ilk+ pch plls have a separate field for the reduced p1
-setting, so this restriction does not apply. Only older platforms have
-the restriction that the p1 divisors must match.
-
-This unnecessary restriction has been introduced in
-
-commit cec2f356d59d9e070413e5966a3c5a1af136d948
-Author: Sean Paul <seanpaul@chromium.org>
-Date:   Tue Jan 10 15:09:36 2012 -0800
-
-    drm/i915: Only look for matching clocks for LVDS downcloc
-
-Note that with lvds the p2 divisors _always_ match for LVDS, and we
-don't support auto-downclocking anywhere else. On eDP downclocking
-works with separate data m/n settings, using the same link clock.
-
-Cc: Sean Paul <seanpaul@chromium.org>
-Reviewed-by: Sean Paul <seanpaul@chromium.org>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 4f4134ace04fd5b0e8734b65f4046e7aa2e39393)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 3 ---
- 1 file changed, 3 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 07f526ff5557..a22bcf576ea9 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -685,9 +685,6 @@ intel_g4x_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
- 					if (!intel_PLL_is_valid(dev, limit,
- 								&clock))
- 						continue;
--					if (match_clock &&
--					    clock.p != match_clock->p)
--						continue;
- 
- 					this_err = abs(clock.dot - target);
- 					if (this_err < err_most) {
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0065-drm-i915-remove-redundant-has_pch_encoder-check.patch b/patches.baytrail/0065-drm-i915-remove-redundant-has_pch_encoder-check.patch
deleted file mode 100644
index aa2c6965942c5..0000000000000
--- a/patches.baytrail/0065-drm-i915-remove-redundant-has_pch_encoder-check.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From 2997db2589af9a5081fa13a94fea9c69dd66e549 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Fri, 19 Apr 2013 11:14:36 +0200
-Subject: drm/i915: remove redundant has_pch_encoder check
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-If we compute the pch pll state, we _have_ a pch encoder.
-
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 9566e9af524856a27f3c6b00821e74ff9ae04732)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 3 +--
- 1 file changed, 1 insertion(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index a22bcf576ea9..2a951781074d 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -5581,8 +5581,7 @@ static uint32_t ironlake_compute_dpll(struct intel_crtc *intel_crtc,
- 		}
- 		dpll |= DPLL_DVO_HIGH_SPEED;
- 	}
--	if (intel_crtc->config.has_dp_encoder &&
--	    intel_crtc->config.has_pch_encoder)
-+	if (intel_crtc->config.has_dp_encoder)
- 		dpll |= DPLL_DVO_HIGH_SPEED;
- 
- 	/* compute bitmask from p1 value */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0066-drm-i915-simplify-config-pixel_multiplier-handling.patch b/patches.baytrail/0066-drm-i915-simplify-config-pixel_multiplier-handling.patch
deleted file mode 100644
index d90e9eb9c9fc7..0000000000000
--- a/patches.baytrail/0066-drm-i915-simplify-config-pixel_multiplier-handling.patch
+++ /dev/null
@@ -1,125 +0,0 @@
-From 9ffc79890b374125f8c047c25b067e19f2d3512b Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Fri, 19 Apr 2013 11:14:37 +0200
-Subject: drm/i915: simplify config->pixel_multiplier handling
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-We only ever check whether it's strictly bigger than one, so all the
-is_sdvo/is_hdmi checks are redundant. Flatten the code a bit.
-
-Also, s/temp/dpll_md/
-
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 198a037f02666eeaab5ba07974fa37467b1f6bd8)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 58 +++++++++++++++++-------------------
- 1 file changed, 27 insertions(+), 31 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 2a951781074d..c3da1726a027 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -4241,7 +4241,7 @@ static void vlv_update_pll(struct intel_crtc *crtc)
- 	u32 dpll, mdiv;
- 	u32 bestn, bestm1, bestm2, bestp1, bestp2;
- 	bool is_hdmi;
--	u32 coreclk, reg_val, temp;
-+	u32 coreclk, reg_val, dpll_md;
- 
- 	mutex_lock(&dev_priv->dpio_lock);
- 
-@@ -4339,16 +4339,13 @@ static void vlv_update_pll(struct intel_crtc *crtc)
- 	if (wait_for(((I915_READ(DPLL(pipe)) & DPLL_LOCK_VLV) == DPLL_LOCK_VLV), 1))
- 		DRM_ERROR("DPLL %d failed to lock\n", pipe);
- 
--	if (is_hdmi) {
--		temp = 0;
--		if (crtc->config.pixel_multiplier > 1) {
--			temp = (crtc->config.pixel_multiplier - 1)
--				<< DPLL_MD_UDI_MULTIPLIER_SHIFT;
--		}
--
--		I915_WRITE(DPLL_MD(pipe), temp);
--		POSTING_READ(DPLL_MD(pipe));
-+	dpll_md = 0;
-+	if (crtc->config.pixel_multiplier > 1) {
-+		dpll_md = (crtc->config.pixel_multiplier - 1)
-+			<< DPLL_MD_UDI_MULTIPLIER_SHIFT;
- 	}
-+	I915_WRITE(DPLL_MD(pipe), dpll_md);
-+	POSTING_READ(DPLL_MD(pipe));
- 
- 	if (crtc->config.has_dp_encoder)
- 		intel_dp_set_m_n(crtc);
-@@ -4381,14 +4378,15 @@ static void i9xx_update_pll(struct intel_crtc *crtc,
- 	else
- 		dpll |= DPLLB_MODE_DAC_SERIAL;
- 
--	if (is_sdvo) {
--		if ((crtc->config.pixel_multiplier > 1) &&
--		    (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev))) {
--			dpll |= (crtc->config.pixel_multiplier - 1)
--				<< SDVO_MULTIPLIER_SHIFT_HIRES;
--		}
--		dpll |= DPLL_DVO_HIGH_SPEED;
-+	if ((crtc->config.pixel_multiplier > 1) &&
-+	    (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev))) {
-+		dpll |= (crtc->config.pixel_multiplier - 1)
-+			<< SDVO_MULTIPLIER_SHIFT_HIRES;
- 	}
-+
-+	if (is_sdvo)
-+		dpll |= DPLL_DVO_HIGH_SPEED;
-+
- 	if (intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_DISPLAYPORT))
- 		dpll |= DPLL_DVO_HIGH_SPEED;
- 
-@@ -4448,15 +4446,12 @@ static void i9xx_update_pll(struct intel_crtc *crtc,
- 	udelay(150);
- 
- 	if (INTEL_INFO(dev)->gen >= 4) {
--		u32 temp = 0;
--		if (is_sdvo) {
--			temp = 0;
--			if (crtc->config.pixel_multiplier > 1) {
--				temp = (crtc->config.pixel_multiplier - 1)
--					<< DPLL_MD_UDI_MULTIPLIER_SHIFT;
--			}
-+		u32 dpll_md = 0;
-+		if (crtc->config.pixel_multiplier > 1) {
-+			dpll_md = (crtc->config.pixel_multiplier - 1)
-+				<< DPLL_MD_UDI_MULTIPLIER_SHIFT;
- 		}
--		I915_WRITE(DPLL_MD(pipe), temp);
-+		I915_WRITE(DPLL_MD(pipe), dpll_md);
- 	} else {
- 		/* The pixel multiplier can only be updated once the
- 		 * DPLL is enabled and the clocks are stable.
-@@ -5574,13 +5569,14 @@ static uint32_t ironlake_compute_dpll(struct intel_crtc *intel_crtc,
- 		dpll |= DPLLB_MODE_LVDS;
- 	else
- 		dpll |= DPLLB_MODE_DAC_SERIAL;
--	if (is_sdvo) {
--		if (intel_crtc->config.pixel_multiplier > 1) {
--			dpll |= (intel_crtc->config.pixel_multiplier - 1)
--				<< PLL_REF_SDVO_HDMI_MULTIPLIER_SHIFT;
--		}
--		dpll |= DPLL_DVO_HIGH_SPEED;
-+
-+	if (intel_crtc->config.pixel_multiplier > 1) {
-+		dpll |= (intel_crtc->config.pixel_multiplier - 1)
-+			<< PLL_REF_SDVO_HDMI_MULTIPLIER_SHIFT;
- 	}
-+
-+	if (is_sdvo)
-+		dpll |= DPLL_DVO_HIGH_SPEED;
- 	if (intel_crtc->config.has_dp_encoder)
- 		dpll |= DPLL_DVO_HIGH_SPEED;
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0067-drm-i915-factor-out-GMCH-panel-fitting-code-and-use-.patch b/patches.baytrail/0067-drm-i915-factor-out-GMCH-panel-fitting-code-and-use-.patch
deleted file mode 100644
index 36e69076a5eea..0000000000000
--- a/patches.baytrail/0067-drm-i915-factor-out-GMCH-panel-fitting-code-and-use-.patch
+++ /dev/null
@@ -1,632 +0,0 @@
-From 30af340d1b2fb5434c36e9f3ee4c4b01c815fa95 Mon Sep 17 00:00:00 2001
-From: Jesse Barnes <jbarnes@virtuousgeek.org>
-Date: Thu, 25 Apr 2013 12:55:01 -0700
-Subject: drm/i915: factor out GMCH panel fitting code and use for eDP v3
-
-This gets the panel fitter working on eDP on VLV, and should also apply
-to eDP panels on G4x chipsets (if we ever detect and mark an all-in-one
-panel as eDP anyway).
-
-A few cleanups are still possible on top of this, for example the LVDS
-border control could be placed in the LVDS encoder structure and updated
-based on the result of the panel fitter calculation.
-
-Multi-pipe fitting isn't handled correctly either if we ever get a config
-that wants to try the panel fitter on more than one output at a time.
-
-v2: use pipe_config for storing pfit values (Daniel)
-    add i9xx_pfit_enable function for use by 9xx and VLV (Daniel)
-v3: fixup conflicts and lvds_dither check
-
-Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-[danvet: fix up botched conflict resolution from Jesse:
-- border = LVDS_BORDER_ENABLE was lost for CENTER scaling
-- comment about gen2/3 panel fitter scaling was lost
-- dev_priv->lvds_dither reintroduced.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 2dd24552cab40ea829ba3fda890eeafd2c4816d8)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c |  33 ++++++
- drivers/gpu/drm/i915/intel_dp.c      |  11 +-
- drivers/gpu/drm/i915/intel_drv.h     |   6 +
- drivers/gpu/drm/i915/intel_lvds.c    | 209 +----------------------------------
- drivers/gpu/drm/i915/intel_panel.c   | 191 ++++++++++++++++++++++++++++++++
- 5 files changed, 241 insertions(+), 209 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index c3da1726a027..ab5758374f8d 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -3601,6 +3601,33 @@ g4x_fixup_plane(struct drm_i915_private *dev_priv, enum pipe pipe)
- 	}
- }
- 
-+static void i9xx_pfit_enable(struct intel_crtc *crtc)
-+{
-+	struct drm_device *dev = crtc->base.dev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct intel_crtc_config *pipe_config = &crtc->config;
-+
-+	if (!(intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_EDP) ||
-+	      intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_LVDS)))
-+		return;
-+
-+	WARN_ON(I915_READ(PFIT_CONTROL) & PFIT_ENABLE);
-+	assert_pipe_disabled(dev_priv, crtc->pipe);
-+
-+	/*
-+	 * Enable automatic panel scaling so that non-native modes
-+	 * fill the screen.  The panel fitter should only be
-+	 * adjusted whilst the pipe is disabled, according to
-+	 * register description and PRM.
-+	 */
-+	DRM_DEBUG_KMS("applying panel-fitter: %x, %x\n",
-+		      pipe_config->pfit_control,
-+		      pipe_config->pfit_pgm_ratios);
-+
-+	I915_WRITE(PFIT_PGM_RATIOS, pipe_config->pfit_pgm_ratios);
-+	I915_WRITE(PFIT_CONTROL, pipe_config->pfit_control);
-+}
-+
- static void valleyview_crtc_enable(struct drm_crtc *crtc)
- {
- 	struct drm_device *dev = crtc->dev;
-@@ -3634,6 +3661,9 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc)
- 	for_each_encoder_on_crtc(dev, crtc, encoder)
- 		encoder->enable(encoder);
- 
-+	/* Enable panel fitting for eDP */
-+	i9xx_pfit_enable(intel_crtc);
-+
- 	intel_enable_pipe(dev_priv, pipe, false);
- 	intel_enable_plane(dev_priv, plane, pipe);
- 
-@@ -3670,6 +3700,9 @@ static void i9xx_crtc_enable(struct drm_crtc *crtc)
- 		if (encoder->pre_enable)
- 			encoder->pre_enable(encoder);
- 
-+	/* Enable panel fitting for LVDS */
-+	i9xx_pfit_enable(intel_crtc);
-+
- 	intel_enable_pipe(dev_priv, pipe, false);
- 	intel_enable_plane(dev_priv, plane, pipe);
- 	if (IS_G4X(dev))
-diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
-index fbae5092b1f6..38b3fb549bac 100644
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -723,6 +723,7 @@ intel_dp_compute_config(struct intel_encoder *encoder,
- 	struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
- 	struct drm_display_mode *mode = &pipe_config->requested_mode;
- 	struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
-+	struct intel_crtc *intel_crtc = encoder->new_crtc;
- 	struct intel_connector *intel_connector = intel_dp->attached_connector;
- 	int lane_count, clock;
- 	int max_lane_count = drm_dp_max_lane_count(intel_dp->dpcd);
-@@ -739,9 +740,13 @@ intel_dp_compute_config(struct intel_encoder *encoder,
- 	if (is_edp(intel_dp) && intel_connector->panel.fixed_mode) {
- 		intel_fixed_panel_mode(intel_connector->panel.fixed_mode,
- 				       adjusted_mode);
--		intel_pch_panel_fitting(dev,
--					intel_connector->panel.fitting_mode,
--					mode, adjusted_mode);
-+		if (!HAS_PCH_SPLIT(dev))
-+			intel_gmch_panel_fitting(intel_crtc, pipe_config,
-+						 intel_connector->panel.fitting_mode);
-+		else
-+			intel_pch_panel_fitting(dev,
-+						intel_connector->panel.fitting_mode,
-+						mode, adjusted_mode);
- 	}
- 	/* We need to take the panel's fixed mode into account. */
- 	target_clock = adjusted_mode->clock;
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index 52b2505f1823..1780f79e1a89 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -237,6 +237,9 @@ struct intel_crtc_config {
- 	int pixel_target_clock;
- 	/* Used by SDVO (and if we ever fix it, HDMI). */
- 	unsigned pixel_multiplier;
-+
-+	/* Panel fitter controls for gen2-gen4 + VLV */
-+	u32 pfit_control, pfit_pgm_ratios;
- };
- 
- struct intel_crtc {
-@@ -559,6 +562,9 @@ extern void intel_pch_panel_fitting(struct drm_device *dev,
- 				    int fitting_mode,
- 				    const struct drm_display_mode *mode,
- 				    struct drm_display_mode *adjusted_mode);
-+extern void intel_gmch_panel_fitting(struct intel_crtc *crtc,
-+				     struct intel_crtc_config *pipe_config,
-+				     int fitting_mode);
- extern void intel_panel_set_backlight(struct drm_device *dev,
- 				      u32 level, u32 max);
- extern int intel_panel_setup_backlight(struct drm_connector *connector);
-diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
-index 855c0850f030..2a2180410cbd 100644
---- a/drivers/gpu/drm/i915/intel_lvds.c
-+++ b/drivers/gpu/drm/i915/intel_lvds.c
-@@ -49,8 +49,6 @@ struct intel_lvds_connector {
- struct intel_lvds_encoder {
- 	struct intel_encoder base;
- 
--	u32 pfit_control;
--	u32 pfit_pgm_ratios;
- 	bool is_dual_link;
- 	u32 reg;
- 
-@@ -153,32 +151,6 @@ static void intel_pre_pll_enable_lvds(struct intel_encoder *encoder)
- 	I915_WRITE(lvds_encoder->reg, temp);
- }
- 
--static void intel_pre_enable_lvds(struct intel_encoder *encoder)
--{
--	struct drm_device *dev = encoder->base.dev;
--	struct intel_lvds_encoder *enc = to_lvds_encoder(&encoder->base);
--	struct drm_i915_private *dev_priv = dev->dev_private;
--
--	if (HAS_PCH_SPLIT(dev) || !enc->pfit_control)
--		return;
--
--	WARN_ON(I915_READ(PFIT_CONTROL) & PFIT_ENABLE);
--	assert_pipe_disabled(dev_priv, to_intel_crtc(encoder->base.crtc)->pipe);
--
--	/*
--	 * Enable automatic panel scaling so that non-native modes
--	 * fill the screen.  The panel fitter should only be
--	 * adjusted whilst the pipe is disabled, according to
--	 * register description and PRM.
--	 */
--	DRM_DEBUG_KMS("applying panel-fitter: %x, %x\n",
--		      enc->pfit_control,
--		      enc->pfit_pgm_ratios);
--
--	I915_WRITE(PFIT_PGM_RATIOS, enc->pfit_pgm_ratios);
--	I915_WRITE(PFIT_CONTROL, enc->pfit_control);
--}
--
- /**
-  * Sets the power state for the panel.
-  */
-@@ -247,62 +219,6 @@ static int intel_lvds_mode_valid(struct drm_connector *connector,
- 	return MODE_OK;
- }
- 
--static void
--centre_horizontally(struct drm_display_mode *mode,
--		    int width)
--{
--	u32 border, sync_pos, blank_width, sync_width;
--
--	/* keep the hsync and hblank widths constant */
--	sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
--	blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
--	sync_pos = (blank_width - sync_width + 1) / 2;
--
--	border = (mode->hdisplay - width + 1) / 2;
--	border += border & 1; /* make the border even */
--
--	mode->crtc_hdisplay = width;
--	mode->crtc_hblank_start = width + border;
--	mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
--
--	mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
--	mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
--}
--
--static void
--centre_vertically(struct drm_display_mode *mode,
--		  int height)
--{
--	u32 border, sync_pos, blank_width, sync_width;
--
--	/* keep the vsync and vblank widths constant */
--	sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
--	blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
--	sync_pos = (blank_width - sync_width + 1) / 2;
--
--	border = (mode->vdisplay - height + 1) / 2;
--
--	mode->crtc_vdisplay = height;
--	mode->crtc_vblank_start = height + border;
--	mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
--
--	mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
--	mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
--}
--
--static inline u32 panel_fitter_scaling(u32 source, u32 target)
--{
--	/*
--	 * Floating point operation is not supported. So the FACTOR
--	 * is defined, which can avoid the floating point computation
--	 * when calculating the panel ratio.
--	 */
--#define ACCURACY 12
--#define FACTOR (1 << ACCURACY)
--	u32 ratio = source * FACTOR / target;
--	return (FACTOR * ratio + FACTOR/2) / FACTOR;
--}
--
- static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
- 				      struct intel_crtc_config *pipe_config)
- {
-@@ -315,7 +231,6 @@ static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
- 	struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
- 	struct drm_display_mode *mode = &pipe_config->requested_mode;
- 	struct intel_crtc *intel_crtc = lvds_encoder->base.new_crtc;
--	u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
- 	unsigned int lvds_bpp;
- 	int pipe;
- 
-@@ -338,11 +253,6 @@ static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
- 		DRM_DEBUG_KMS("forcing display bpp (was %d) to LVDS (%d)\n",
- 			      pipe_config->pipe_bpp, lvds_bpp);
- 		pipe_config->pipe_bpp = lvds_bpp;
--
--		/* Make sure pre-965 set dither correctly for 18bpp panels. */
--		if (INTEL_INFO(dev)->gen < 4 && lvds_bpp == 18)
--			pfit_control |= PANEL_8TO6_DITHER_ENABLE;
--
- 	}
- 
- 	/*
-@@ -361,18 +271,11 @@ static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
- 					intel_connector->panel.fitting_mode,
- 					mode, adjusted_mode);
- 		return true;
-+	} else {
-+		intel_gmch_panel_fitting(intel_crtc, pipe_config,
-+					 intel_connector->panel.fitting_mode);
- 	}
- 
--	/* Native modes don't need fitting */
--	if (adjusted_mode->hdisplay == mode->hdisplay &&
--	    adjusted_mode->vdisplay == mode->vdisplay)
--		goto out;
--
--	/* 965+ wants fuzzy fitting */
--	if (INTEL_INFO(dev)->gen >= 4)
--		pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
--				 PFIT_FILTER_FUZZY);
--
- 	/*
- 	 * Enable automatic panel scaling for non-native modes so that they fill
- 	 * the screen.  Should be enabled before the pipe is enabled, according
-@@ -385,107 +288,6 @@ static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
- 	drm_mode_set_crtcinfo(adjusted_mode, 0);
- 	pipe_config->timings_set = true;
- 
--	switch (intel_connector->panel.fitting_mode) {
--	case DRM_MODE_SCALE_CENTER:
--		/*
--		 * For centered modes, we have to calculate border widths &
--		 * heights and modify the values programmed into the CRTC.
--		 */
--		centre_horizontally(adjusted_mode, mode->hdisplay);
--		centre_vertically(adjusted_mode, mode->vdisplay);
--		border = LVDS_BORDER_ENABLE;
--		break;
--
--	case DRM_MODE_SCALE_ASPECT:
--		/* Scale but preserve the aspect ratio */
--		if (INTEL_INFO(dev)->gen >= 4) {
--			u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
--			u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
--
--			/* 965+ is easy, it does everything in hw */
--			if (scaled_width > scaled_height)
--				pfit_control |= PFIT_ENABLE | PFIT_SCALING_PILLAR;
--			else if (scaled_width < scaled_height)
--				pfit_control |= PFIT_ENABLE | PFIT_SCALING_LETTER;
--			else if (adjusted_mode->hdisplay != mode->hdisplay)
--				pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
--		} else {
--			u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
--			u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
--			/*
--			 * For earlier chips we have to calculate the scaling
--			 * ratio by hand and program it into the
--			 * PFIT_PGM_RATIO register
--			 */
--			if (scaled_width > scaled_height) { /* pillar */
--				centre_horizontally(adjusted_mode, scaled_height / mode->vdisplay);
--
--				border = LVDS_BORDER_ENABLE;
--				if (mode->vdisplay != adjusted_mode->vdisplay) {
--					u32 bits = panel_fitter_scaling(mode->vdisplay, adjusted_mode->vdisplay);
--					pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
--							    bits << PFIT_VERT_SCALE_SHIFT);
--					pfit_control |= (PFIT_ENABLE |
--							 VERT_INTERP_BILINEAR |
--							 HORIZ_INTERP_BILINEAR);
--				}
--			} else if (scaled_width < scaled_height) { /* letter */
--				centre_vertically(adjusted_mode, scaled_width / mode->hdisplay);
--
--				border = LVDS_BORDER_ENABLE;
--				if (mode->hdisplay != adjusted_mode->hdisplay) {
--					u32 bits = panel_fitter_scaling(mode->hdisplay, adjusted_mode->hdisplay);
--					pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
--							    bits << PFIT_VERT_SCALE_SHIFT);
--					pfit_control |= (PFIT_ENABLE |
--							 VERT_INTERP_BILINEAR |
--							 HORIZ_INTERP_BILINEAR);
--				}
--			} else
--				/* Aspects match, Let hw scale both directions */
--				pfit_control |= (PFIT_ENABLE |
--						 VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
--						 VERT_INTERP_BILINEAR |
--						 HORIZ_INTERP_BILINEAR);
--		}
--		break;
--
--	case DRM_MODE_SCALE_FULLSCREEN:
--		/*
--		 * Full scaling, even if it changes the aspect ratio.
--		 * Fortunately this is all done for us in hw.
--		 */
--		if (mode->vdisplay != adjusted_mode->vdisplay ||
--		    mode->hdisplay != adjusted_mode->hdisplay) {
--			pfit_control |= PFIT_ENABLE;
--			if (INTEL_INFO(dev)->gen >= 4)
--				pfit_control |= PFIT_SCALING_AUTO;
--			else
--				pfit_control |= (VERT_AUTO_SCALE |
--						 VERT_INTERP_BILINEAR |
--						 HORIZ_AUTO_SCALE |
--						 HORIZ_INTERP_BILINEAR);
--		}
--		break;
--
--	default:
--		break;
--	}
--
--out:
--	/* If not enabling scaling, be consistent and always use 0. */
--	if ((pfit_control & PFIT_ENABLE) == 0) {
--		pfit_control = 0;
--		pfit_pgm_ratios = 0;
--	}
--
--	if (pfit_control != lvds_encoder->pfit_control ||
--	    pfit_pgm_ratios != lvds_encoder->pfit_pgm_ratios) {
--		lvds_encoder->pfit_control = pfit_control;
--		lvds_encoder->pfit_pgm_ratios = pfit_pgm_ratios;
--	}
--	dev_priv->lvds_border_bits = border;
--
- 	/*
- 	 * XXX: It would be nice to support lower refresh rates on the
- 	 * panels to reduce power consumption, and perhaps match the
-@@ -1147,10 +949,6 @@ bool intel_lvds_init(struct drm_device *dev)
- 
- 	lvds_encoder->attached_connector = lvds_connector;
- 
--	if (!HAS_PCH_SPLIT(dev)) {
--		lvds_encoder->pfit_control = I915_READ(PFIT_CONTROL);
--	}
--
- 	intel_encoder = &lvds_encoder->base;
- 	encoder = &intel_encoder->base;
- 	intel_connector = &lvds_connector->base;
-@@ -1162,7 +960,6 @@ bool intel_lvds_init(struct drm_device *dev)
- 			 DRM_MODE_ENCODER_LVDS);
- 
- 	intel_encoder->enable = intel_enable_lvds;
--	intel_encoder->pre_enable = intel_pre_enable_lvds;
- 	intel_encoder->pre_pll_enable = intel_pre_pll_enable_lvds;
- 	intel_encoder->compute_config = intel_lvds_compute_config;
- 	intel_encoder->disable = intel_disable_lvds;
-diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
-index 317d2bc15049..b775dd5f8dd9 100644
---- a/drivers/gpu/drm/i915/intel_panel.c
-+++ b/drivers/gpu/drm/i915/intel_panel.c
-@@ -117,6 +117,197 @@ done:
- 	dev_priv->pch_pf_size = (width << 16) | height;
- }
- 
-+static void
-+centre_horizontally(struct drm_display_mode *mode,
-+		    int width)
-+{
-+	u32 border, sync_pos, blank_width, sync_width;
-+
-+	/* keep the hsync and hblank widths constant */
-+	sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
-+	blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
-+	sync_pos = (blank_width - sync_width + 1) / 2;
-+
-+	border = (mode->hdisplay - width + 1) / 2;
-+	border += border & 1; /* make the border even */
-+
-+	mode->crtc_hdisplay = width;
-+	mode->crtc_hblank_start = width + border;
-+	mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
-+
-+	mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
-+	mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
-+}
-+
-+static void
-+centre_vertically(struct drm_display_mode *mode,
-+		  int height)
-+{
-+	u32 border, sync_pos, blank_width, sync_width;
-+
-+	/* keep the vsync and vblank widths constant */
-+	sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
-+	blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
-+	sync_pos = (blank_width - sync_width + 1) / 2;
-+
-+	border = (mode->vdisplay - height + 1) / 2;
-+
-+	mode->crtc_vdisplay = height;
-+	mode->crtc_vblank_start = height + border;
-+	mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
-+
-+	mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
-+	mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
-+}
-+
-+static inline u32 panel_fitter_scaling(u32 source, u32 target)
-+{
-+	/*
-+	 * Floating point operation is not supported. So the FACTOR
-+	 * is defined, which can avoid the floating point computation
-+	 * when calculating the panel ratio.
-+	 */
-+#define ACCURACY 12
-+#define FACTOR (1 << ACCURACY)
-+	u32 ratio = source * FACTOR / target;
-+	return (FACTOR * ratio + FACTOR/2) / FACTOR;
-+}
-+
-+void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
-+			      struct intel_crtc_config *pipe_config,
-+			      int fitting_mode)
-+{
-+	struct drm_device *dev = intel_crtc->base.dev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
-+	struct drm_display_mode *mode, *adjusted_mode;
-+
-+	mode = &pipe_config->requested_mode;
-+	adjusted_mode = &pipe_config->adjusted_mode;
-+
-+	/* Native modes don't need fitting */
-+	if (adjusted_mode->hdisplay == mode->hdisplay &&
-+	    adjusted_mode->vdisplay == mode->vdisplay)
-+		goto out;
-+
-+	switch (fitting_mode) {
-+	case DRM_MODE_SCALE_CENTER:
-+		/*
-+		 * For centered modes, we have to calculate border widths &
-+		 * heights and modify the values programmed into the CRTC.
-+		 */
-+		centre_horizontally(adjusted_mode, mode->hdisplay);
-+		centre_vertically(adjusted_mode, mode->vdisplay);
-+		border = LVDS_BORDER_ENABLE;
-+		break;
-+	case DRM_MODE_SCALE_ASPECT:
-+		/* Scale but preserve the aspect ratio */
-+		if (INTEL_INFO(dev)->gen >= 4) {
-+			u32 scaled_width = adjusted_mode->hdisplay *
-+				mode->vdisplay;
-+			u32 scaled_height = mode->hdisplay *
-+				adjusted_mode->vdisplay;
-+
-+			/* 965+ is easy, it does everything in hw */
-+			if (scaled_width > scaled_height)
-+				pfit_control |= PFIT_ENABLE |
-+					PFIT_SCALING_PILLAR;
-+			else if (scaled_width < scaled_height)
-+				pfit_control |= PFIT_ENABLE |
-+					PFIT_SCALING_LETTER;
-+			else if (adjusted_mode->hdisplay != mode->hdisplay)
-+				pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
-+		} else {
-+			u32 scaled_width = adjusted_mode->hdisplay *
-+				mode->vdisplay;
-+			u32 scaled_height = mode->hdisplay *
-+				adjusted_mode->vdisplay;
-+			/*
-+			 * For earlier chips we have to calculate the scaling
-+			 * ratio by hand and program it into the
-+			 * PFIT_PGM_RATIO register
-+			 */
-+			if (scaled_width > scaled_height) { /* pillar */
-+				centre_horizontally(adjusted_mode,
-+						    scaled_height /
-+						    mode->vdisplay);
-+
-+				border = LVDS_BORDER_ENABLE;
-+				if (mode->vdisplay != adjusted_mode->vdisplay) {
-+					u32 bits = panel_fitter_scaling(mode->vdisplay, adjusted_mode->vdisplay);
-+					pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
-+							    bits << PFIT_VERT_SCALE_SHIFT);
-+					pfit_control |= (PFIT_ENABLE |
-+							 VERT_INTERP_BILINEAR |
-+							 HORIZ_INTERP_BILINEAR);
-+				}
-+			} else if (scaled_width < scaled_height) { /* letter */
-+				centre_vertically(adjusted_mode,
-+						  scaled_width /
-+						  mode->hdisplay);
-+
-+				border = LVDS_BORDER_ENABLE;
-+				if (mode->hdisplay != adjusted_mode->hdisplay) {
-+					u32 bits = panel_fitter_scaling(mode->hdisplay, adjusted_mode->hdisplay);
-+					pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
-+							    bits << PFIT_VERT_SCALE_SHIFT);
-+					pfit_control |= (PFIT_ENABLE |
-+							 VERT_INTERP_BILINEAR |
-+							 HORIZ_INTERP_BILINEAR);
-+				}
-+			} else {
-+				/* Aspects match, Let hw scale both directions */
-+				pfit_control |= (PFIT_ENABLE |
-+						 VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
-+						 VERT_INTERP_BILINEAR |
-+						 HORIZ_INTERP_BILINEAR);
-+			}
-+		}
-+		break;
-+	default:
-+	case DRM_MODE_SCALE_FULLSCREEN:
-+		/*
-+		 * Full scaling, even if it changes the aspect ratio.
-+		 * Fortunately this is all done for us in hw.
-+		 */
-+		if (mode->vdisplay != adjusted_mode->vdisplay ||
-+		    mode->hdisplay != adjusted_mode->hdisplay) {
-+			pfit_control |= PFIT_ENABLE;
-+			if (INTEL_INFO(dev)->gen >= 4)
-+				pfit_control |= PFIT_SCALING_AUTO;
-+			else
-+				pfit_control |= (VERT_AUTO_SCALE |
-+						 VERT_INTERP_BILINEAR |
-+						 HORIZ_AUTO_SCALE |
-+						 HORIZ_INTERP_BILINEAR);
-+		}
-+		break;
-+	}
-+
-+	/* 965+ wants fuzzy fitting */
-+	/* FIXME: handle multiple panels by failing gracefully */
-+	if (INTEL_INFO(dev)->gen >= 4)
-+		pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
-+				 PFIT_FILTER_FUZZY);
-+
-+out:
-+	if ((pfit_control & PFIT_ENABLE) == 0) {
-+		pfit_control = 0;
-+		pfit_pgm_ratios = 0;
-+	}
-+
-+	/* Make sure pre-965 set dither correctly for 18bpp panels. */
-+	if (INTEL_INFO(dev)->gen < 4 && pipe_config->pipe_bpp == 18)
-+		pfit_control |= PANEL_8TO6_DITHER_ENABLE;
-+
-+	if (pfit_control != pipe_config->pfit_control ||
-+	    pfit_pgm_ratios != pipe_config->pfit_pgm_ratios) {
-+		pipe_config->pfit_control = pfit_control;
-+		pipe_config->pfit_pgm_ratios = pfit_pgm_ratios;
-+	}
-+	dev_priv->lvds_border_bits = border;
-+}
-+
- static int is_backlight_combination_mode(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0068-drm-i915-move-PCH-pfit-controls-into-pipe_config.patch b/patches.baytrail/0068-drm-i915-move-PCH-pfit-controls-into-pipe_config.patch
deleted file mode 100644
index ac129d35a0c99..0000000000000
--- a/patches.baytrail/0068-drm-i915-move-PCH-pfit-controls-into-pipe_config.patch
+++ /dev/null
@@ -1,300 +0,0 @@
-From a2e5bc8abb3c38173c900dd9737f8a565c1d5357 Mon Sep 17 00:00:00 2001
-From: Jesse Barnes <jbarnes@virtuousgeek.org>
-Date: Thu, 25 Apr 2013 12:55:02 -0700
-Subject: drm/i915: move PCH pfit controls into pipe_config
-
-And put the pfit stuff into substructs while we're at it.
-
-Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit b074cec8c652f2d273907a4b35239b4766c894ac)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h      |  2 --
- drivers/gpu/drm/i915/intel_ddi.c     |  2 +-
- drivers/gpu/drm/i915/intel_display.c | 65 +++++++++++++++++-------------------
- drivers/gpu/drm/i915/intel_dp.c      |  6 ++--
- drivers/gpu/drm/i915/intel_drv.h     | 18 +++++++---
- drivers/gpu/drm/i915/intel_lvds.c    |  6 ++--
- drivers/gpu/drm/i915/intel_panel.c   | 25 ++++++++------
- 7 files changed, 63 insertions(+), 61 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index afc6977303c6..a540b1f2354e 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1022,8 +1022,6 @@ typedef struct drm_i915_private {
- 	struct sdvo_device_mapping sdvo_mappings[2];
- 	/* indicate whether the LVDS_BORDER should be enabled or not */
- 	unsigned int lvds_border_bits;
--	/* Panel fitter placement and size for Ironlake+ */
--	u32 pch_pf_pos, pch_pf_size;
- 
- 	struct drm_crtc *plane_to_crtc_mapping[3];
- 	struct drm_crtc *pipe_to_crtc_mapping[3];
-diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
-index cfaf6bead217..70a1e9ca87d3 100644
---- a/drivers/gpu/drm/i915/intel_ddi.c
-+++ b/drivers/gpu/drm/i915/intel_ddi.c
-@@ -995,7 +995,7 @@ void intel_ddi_enable_transcoder_func(struct drm_crtc *crtc)
- 			/* Can only use the always-on power well for eDP when
- 			 * not using the panel fitter, and when not using motion
- 			  * blur mitigation (which we don't support). */
--			if (dev_priv->pch_pf_size)
-+			if (intel_crtc->config.pch_pfit.size)
- 				temp |= TRANS_DDI_EDP_INPUT_A_ONOFF;
- 			else
- 				temp |= TRANS_DDI_EDP_INPUT_A_ON;
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index ab5758374f8d..0af841ebc505 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -3225,6 +3225,28 @@ void intel_cpt_verify_modeset(struct drm_device *dev, int pipe)
- 	}
- }
- 
-+static void ironlake_pfit_enable(struct intel_crtc *crtc)
-+{
-+	struct drm_device *dev = crtc->base.dev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	int pipe = crtc->pipe;
-+
-+	if (crtc->config.pch_pfit.size &&
-+	    intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_EDP)) {
-+		/* Force use of hard-coded filter coefficients
-+		 * as some pre-programmed values are broken,
-+		 * e.g. x201.
-+		 */
-+		if (IS_IVYBRIDGE(dev) || IS_HASWELL(dev))
-+			I915_WRITE(PF_CTL(pipe), PF_ENABLE | PF_FILTER_MED_3x3 |
-+						 PF_PIPE_SEL_IVB(pipe));
-+		else
-+			I915_WRITE(PF_CTL(pipe), PF_ENABLE | PF_FILTER_MED_3x3);
-+		I915_WRITE(PF_WIN_POS(pipe), crtc->config.pch_pfit.pos);
-+		I915_WRITE(PF_WIN_SZ(pipe), crtc->config.pch_pfit.size);
-+	}
-+}
-+
- static void ironlake_crtc_enable(struct drm_crtc *crtc)
- {
- 	struct drm_device *dev = crtc->dev;
-@@ -3269,21 +3291,7 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc)
- 			encoder->pre_enable(encoder);
- 
- 	/* Enable panel fitting for LVDS */
--	if (dev_priv->pch_pf_size &&
--	    (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS) ||
--	     intel_pipe_has_type(crtc, INTEL_OUTPUT_EDP))) {
--		/* Force use of hard-coded filter coefficients
--		 * as some pre-programmed values are broken,
--		 * e.g. x201.
--		 */
--		if (IS_IVYBRIDGE(dev))
--			I915_WRITE(PF_CTL(pipe), PF_ENABLE | PF_FILTER_MED_3x3 |
--						 PF_PIPE_SEL_IVB(pipe));
--		else
--			I915_WRITE(PF_CTL(pipe), PF_ENABLE | PF_FILTER_MED_3x3);
--		I915_WRITE(PF_WIN_POS(pipe), dev_priv->pch_pf_pos);
--		I915_WRITE(PF_WIN_SZ(pipe), dev_priv->pch_pf_size);
--	}
-+	ironlake_pfit_enable(intel_crtc);
- 
- 	/*
- 	 * On ILK+ LUT must be loaded before the pipe is running but with
-@@ -3353,17 +3361,7 @@ static void haswell_crtc_enable(struct drm_crtc *crtc)
- 	intel_ddi_enable_pipe_clock(intel_crtc);
- 
- 	/* Enable panel fitting for eDP */
--	if (dev_priv->pch_pf_size &&
--	    intel_pipe_has_type(crtc, INTEL_OUTPUT_EDP)) {
--		/* Force use of hard-coded filter coefficients
--		 * as some pre-programmed values are broken,
--		 * e.g. x201.
--		 */
--		I915_WRITE(PF_CTL(pipe), PF_ENABLE | PF_FILTER_MED_3x3 |
--					 PF_PIPE_SEL_IVB(pipe));
--		I915_WRITE(PF_WIN_POS(pipe), dev_priv->pch_pf_pos);
--		I915_WRITE(PF_WIN_SZ(pipe), dev_priv->pch_pf_size);
--	}
-+	ironlake_pfit_enable(intel_crtc);
- 
- 	/*
- 	 * On ILK+ LUT must be loaded before the pipe is running but with
-@@ -3621,11 +3619,11 @@ static void i9xx_pfit_enable(struct intel_crtc *crtc)
- 	 * register description and PRM.
- 	 */
- 	DRM_DEBUG_KMS("applying panel-fitter: %x, %x\n",
--		      pipe_config->pfit_control,
--		      pipe_config->pfit_pgm_ratios);
-+		      pipe_config->gmch_pfit.control,
-+		      pipe_config->gmch_pfit.pgm_ratios);
- 
--	I915_WRITE(PFIT_PGM_RATIOS, pipe_config->pfit_pgm_ratios);
--	I915_WRITE(PFIT_CONTROL, pipe_config->pfit_control);
-+	I915_WRITE(PFIT_PGM_RATIOS, pipe_config->gmch_pfit.pgm_ratios);
-+	I915_WRITE(PFIT_CONTROL, pipe_config->gmch_pfit.control);
- }
- 
- static void valleyview_crtc_enable(struct drm_crtc *crtc)
-@@ -5812,6 +5810,9 @@ static void haswell_modeset_global_resources(struct drm_device *dev)
- 		/* XXX: Should check for edp transcoder here, but thanks to init
- 		 * sequence that's not yet available. Just in case desktop eDP
- 		 * on PORT D is possible on haswell, too. */
-+		/* Even the eDP panel fitter is outside the always-on well. */
-+		if (I915_READ(PF_WIN_SZ(crtc->pipe)))
-+			enable = true;
- 	}
- 
- 	list_for_each_entry(encoder, &dev->mode_config.encoder_list,
-@@ -5821,10 +5822,6 @@ static void haswell_modeset_global_resources(struct drm_device *dev)
- 			enable = true;
- 	}
- 
--	/* Even the eDP panel fitter is outside the always-on well. */
--	if (dev_priv->pch_pf_size)
--		enable = true;
--
- 	intel_set_power_well(dev, enable);
- }
- 
-diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
-index 38b3fb549bac..83d2241176d8 100644
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -721,7 +721,6 @@ intel_dp_compute_config(struct intel_encoder *encoder,
- 	struct drm_device *dev = encoder->base.dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
--	struct drm_display_mode *mode = &pipe_config->requested_mode;
- 	struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
- 	struct intel_crtc *intel_crtc = encoder->new_crtc;
- 	struct intel_connector *intel_connector = intel_dp->attached_connector;
-@@ -744,9 +743,8 @@ intel_dp_compute_config(struct intel_encoder *encoder,
- 			intel_gmch_panel_fitting(intel_crtc, pipe_config,
- 						 intel_connector->panel.fitting_mode);
- 		else
--			intel_pch_panel_fitting(dev,
--						intel_connector->panel.fitting_mode,
--						mode, adjusted_mode);
-+			intel_pch_panel_fitting(intel_crtc, pipe_config,
-+						intel_connector->panel.fitting_mode);
- 	}
- 	/* We need to take the panel's fixed mode into account. */
- 	target_clock = adjusted_mode->clock;
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index 1780f79e1a89..6edab480f6b4 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -239,7 +239,16 @@ struct intel_crtc_config {
- 	unsigned pixel_multiplier;
- 
- 	/* Panel fitter controls for gen2-gen4 + VLV */
--	u32 pfit_control, pfit_pgm_ratios;
-+	struct {
-+		u32 control;
-+		u32 pgm_ratios;
-+	} gmch_pfit;
-+
-+	/* Panel fitter placement and size for Ironlake+ */
-+	struct {
-+		u32 pos;
-+		u32 size;
-+	} pch_pfit;
- };
- 
- struct intel_crtc {
-@@ -558,10 +567,9 @@ extern void intel_panel_fini(struct intel_panel *panel);
- 
- extern void intel_fixed_panel_mode(struct drm_display_mode *fixed_mode,
- 				   struct drm_display_mode *adjusted_mode);
--extern void intel_pch_panel_fitting(struct drm_device *dev,
--				    int fitting_mode,
--				    const struct drm_display_mode *mode,
--				    struct drm_display_mode *adjusted_mode);
-+extern void intel_pch_panel_fitting(struct intel_crtc *crtc,
-+				    struct intel_crtc_config *pipe_config,
-+				    int fitting_mode);
- extern void intel_gmch_panel_fitting(struct intel_crtc *crtc,
- 				     struct intel_crtc_config *pipe_config,
- 				     int fitting_mode);
-diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
-index 2a2180410cbd..d125756a2665 100644
---- a/drivers/gpu/drm/i915/intel_lvds.c
-+++ b/drivers/gpu/drm/i915/intel_lvds.c
-@@ -229,7 +229,6 @@ static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
- 	struct intel_connector *intel_connector =
- 		&lvds_encoder->attached_connector->base;
- 	struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
--	struct drm_display_mode *mode = &pipe_config->requested_mode;
- 	struct intel_crtc *intel_crtc = lvds_encoder->base.new_crtc;
- 	unsigned int lvds_bpp;
- 	int pipe;
-@@ -267,9 +266,8 @@ static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
- 	if (HAS_PCH_SPLIT(dev)) {
- 		pipe_config->has_pch_encoder = true;
- 
--		intel_pch_panel_fitting(dev,
--					intel_connector->panel.fitting_mode,
--					mode, adjusted_mode);
-+		intel_pch_panel_fitting(intel_crtc, pipe_config,
-+					intel_connector->panel.fitting_mode);
- 		return true;
- 	} else {
- 		intel_gmch_panel_fitting(intel_crtc, pipe_config,
-diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
-index b775dd5f8dd9..5cd82a5ce907 100644
---- a/drivers/gpu/drm/i915/intel_panel.c
-+++ b/drivers/gpu/drm/i915/intel_panel.c
-@@ -54,14 +54,17 @@ intel_fixed_panel_mode(struct drm_display_mode *fixed_mode,
- 
- /* adjusted_mode has been preset to be the panel's fixed mode */
- void
--intel_pch_panel_fitting(struct drm_device *dev,
--			int fitting_mode,
--			const struct drm_display_mode *mode,
--			struct drm_display_mode *adjusted_mode)
-+intel_pch_panel_fitting(struct intel_crtc *intel_crtc,
-+			struct intel_crtc_config *pipe_config,
-+			int fitting_mode)
- {
--	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct drm_i915_private *dev_priv = intel_crtc->base.dev->dev_private;
-+	struct drm_display_mode *mode, *adjusted_mode;
- 	int x, y, width, height;
- 
-+	mode = &pipe_config->requested_mode;
-+	adjusted_mode = &pipe_config->adjusted_mode;
-+
- 	x = y = width = height = 0;
- 
- 	/* Native modes don't need fitting */
-@@ -113,8 +116,8 @@ intel_pch_panel_fitting(struct drm_device *dev,
- 	}
- 
- done:
--	dev_priv->pch_pf_pos = (x << 16) | y;
--	dev_priv->pch_pf_size = (width << 16) | height;
-+	pipe_config->pch_pfit.pos = (x << 16) | y;
-+	pipe_config->pch_pfit.size = (width << 16) | height;
- }
- 
- static void
-@@ -300,10 +303,10 @@ out:
- 	if (INTEL_INFO(dev)->gen < 4 && pipe_config->pipe_bpp == 18)
- 		pfit_control |= PANEL_8TO6_DITHER_ENABLE;
- 
--	if (pfit_control != pipe_config->pfit_control ||
--	    pfit_pgm_ratios != pipe_config->pfit_pgm_ratios) {
--		pipe_config->pfit_control = pfit_control;
--		pipe_config->pfit_pgm_ratios = pfit_pgm_ratios;
-+	if (pfit_control != pipe_config->gmch_pfit.control ||
-+	    pfit_pgm_ratios != pipe_config->gmch_pfit.pgm_ratios) {
-+		pipe_config->gmch_pfit.control = pfit_control;
-+		pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios;
- 	}
- 	dev_priv->lvds_border_bits = border;
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0069-drm-i915-warn-about-invalid-pfit-modes.patch b/patches.baytrail/0069-drm-i915-warn-about-invalid-pfit-modes.patch
deleted file mode 100644
index fab908ec4d366..0000000000000
--- a/patches.baytrail/0069-drm-i915-warn-about-invalid-pfit-modes.patch
+++ /dev/null
@@ -1,66 +0,0 @@
-From 2c06dd310db8286f4a44bc4a92655335499f1bec Mon Sep 17 00:00:00 2001
-From: Jesse Barnes <jbarnes@virtuousgeek.org>
-Date: Thu, 25 Apr 2013 12:55:03 -0700
-Subject: drm/i915: warn about invalid pfit modes
-
-We prevent invalid ones from getting here in the first place, but it
-doesn't hurt to have an extra sanity check.
-
-Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit ab3e67f43a299b064ccd8cd230d4a006a05c8a4c)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_panel.c | 10 +++++++---
- 1 file changed, 7 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
-index 5cd82a5ce907..140f60d40105 100644
---- a/drivers/gpu/drm/i915/intel_panel.c
-+++ b/drivers/gpu/drm/i915/intel_panel.c
-@@ -58,7 +58,6 @@ intel_pch_panel_fitting(struct intel_crtc *intel_crtc,
- 			struct intel_crtc_config *pipe_config,
- 			int fitting_mode)
- {
--	struct drm_i915_private *dev_priv = intel_crtc->base.dev->dev_private;
- 	struct drm_display_mode *mode, *adjusted_mode;
- 	int x, y, width, height;
- 
-@@ -107,12 +106,15 @@ intel_pch_panel_fitting(struct intel_crtc *intel_crtc,
- 		}
- 		break;
- 
--	default:
- 	case DRM_MODE_SCALE_FULLSCREEN:
- 		x = y = 0;
- 		width = adjusted_mode->hdisplay;
- 		height = adjusted_mode->vdisplay;
- 		break;
-+
-+	default:
-+		WARN(1, "bad panel fit mode: %d\n", fitting_mode);
-+		return;
- 	}
- 
- done:
-@@ -267,7 +269,6 @@ void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
- 			}
- 		}
- 		break;
--	default:
- 	case DRM_MODE_SCALE_FULLSCREEN:
- 		/*
- 		 * Full scaling, even if it changes the aspect ratio.
-@@ -285,6 +286,9 @@ void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
- 						 HORIZ_INTERP_BILINEAR);
- 		}
- 		break;
-+	default:
-+		WARN(1, "bad panel fit mode: %d\n", fitting_mode);
-+		return;
- 	}
- 
- 	/* 965+ wants fuzzy fitting */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0070-drm-i915-remove-VLV-MSI-IRQ-hack.patch b/patches.baytrail/0070-drm-i915-remove-VLV-MSI-IRQ-hack.patch
deleted file mode 100644
index 275dc2fc9dcb9..0000000000000
--- a/patches.baytrail/0070-drm-i915-remove-VLV-MSI-IRQ-hack.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From c224c6efd49aaca8d56f1f5f5079ad29f4ebbd1b Mon Sep 17 00:00:00 2001
-From: Jesse Barnes <jbarnes@virtuousgeek.org>
-Date: Fri, 1 Mar 2013 14:08:33 -0800
-Subject: drm/i915: remove VLV MSI IRQ hack
-
-Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 2ce12e3dffe005f96e3b3ff1f761bbb0bf570fda)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 8 --------
- 1 file changed, 8 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index ebb0c7c3836e..3587ea7fa1fb 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -2694,7 +2694,6 @@ static int valleyview_irq_postinstall(struct drm_device *dev)
- 	u32 enable_mask;
- 	u32 pipestat_enable = PLANE_FLIP_DONE_INT_EN_VLV;
- 	u32 render_irqs;
--	u16 msid;
- 
- 	enable_mask = I915_DISPLAY_PORT_INTERRUPT;
- 	enable_mask |= I915_DISPLAY_PIPE_A_EVENT_INTERRUPT |
-@@ -2710,13 +2709,6 @@ static int valleyview_irq_postinstall(struct drm_device *dev)
- 		I915_DISPLAY_PIPE_A_VBLANK_INTERRUPT |
- 		I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT;
- 
--	/* Hack for broken MSIs on VLV */
--	pci_write_config_dword(dev_priv->dev->pdev, 0x94, 0xfee00000);
--	pci_read_config_word(dev->pdev, 0x98, &msid);
--	msid &= 0xff; /* mask out delivery bits */
--	msid |= (1<<14);
--	pci_write_config_word(dev_priv->dev->pdev, 0x98, msid);
--
- 	I915_WRITE(PORT_HOTPLUG_EN, 0);
- 	POSTING_READ(PORT_HOTPLUG_EN);
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0071-drm-i915-Only-print-the-info-message-about-incresing.patch b/patches.baytrail/0071-drm-i915-Only-print-the-info-message-about-incresing.patch
deleted file mode 100644
index 4699011bd9415..0000000000000
--- a/patches.baytrail/0071-drm-i915-Only-print-the-info-message-about-incresing.patch
+++ /dev/null
@@ -1,53 +0,0 @@
-From 825a350fccaeba4d96212e8db10a45cc9a746e5f Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Sat, 27 Apr 2013 12:44:16 +0100
-Subject: drm/i915: Only print the info message about incresing stolen size for
- FBC once
-
-Instead of repeatedly bombarding the user with a request to reboot and
-increase the stolen size with every fb refresh, just inform them the
-first time only.
-
-v2: Rearrange code so the hint to increase the amount of memory stolen
-by the BIOS is only emitted if we fail to find sufficient stolen memory
-for FBC.
-
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-[danvet: Fixup formatting code mismatch that gcc spotted.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit d8241785c24d4508ecc26fb91b28b39a0dd26070)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem_stolen.c | 1 +
- drivers/gpu/drm/i915/intel_pm.c        | 2 --
- 2 files changed, 1 insertion(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem_stolen.c b/drivers/gpu/drm/i915/i915_gem_stolen.c
-index 130d1db27e28..67d3510cafed 100644
---- a/drivers/gpu/drm/i915/i915_gem_stolen.c
-+++ b/drivers/gpu/drm/i915/i915_gem_stolen.c
-@@ -136,6 +136,7 @@ static int i915_setup_compression(struct drm_device *dev, int size)
- err_fb:
- 	drm_mm_put_block(compressed_fb);
- err:
-+	pr_info_once("drm: not enough stolen space for compressed buffer (need %d more bytes), disabling. Hint: you may be able to increase stolen memory size in the BIOS to avoid this.\n", size);
- 	return -ENOSPC;
- }
- 
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index ad9d622c55af..5977599bde42 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -481,8 +481,6 @@ void intel_update_fbc(struct drm_device *dev)
- 		goto out_disable;
- 
- 	if (i915_gem_stolen_setup_compression(dev, intel_fb->obj->base.size)) {
--		DRM_INFO("not enough stolen space for compressed buffer (need %zd bytes), disabling\n", intel_fb->obj->base.size);
--		DRM_INFO("hint: you may be able to increase stolen memory size in the BIOS to avoid this\n");
- 		DRM_DEBUG_KMS("framebuffer too large, disabling compression\n");
- 		dev_priv->no_fbc_reason = FBC_STOLEN_TOO_SMALL;
- 		goto out_disable;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0072-drm-i915-put-the-right-cpu_transcoder-into-pipe_conf.patch b/patches.baytrail/0072-drm-i915-put-the-right-cpu_transcoder-into-pipe_conf.patch
deleted file mode 100644
index 2c3cafb0fc26b..0000000000000
--- a/patches.baytrail/0072-drm-i915-put-the-right-cpu_transcoder-into-pipe_conf.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From ddf29ee753771fa4977b5af0afe24c4bd59593f4 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Mon, 29 Apr 2013 18:29:19 +0200
-Subject: drm/i915: put the right cpu_transcoder into pipe_config for hw state
- readout
-
-This hack is getting a bit messy, but this plugs the leak for now
-until we have the cpu_transcoder properly pipe_config'ed.
-
-Cc: Imre Deak <imre.deak@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 60c4ae101fdebdd1451e93f08161af3d78725cff)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 0af841ebc505..e5735287ff8c 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -7997,6 +7997,7 @@ intel_modeset_check_state(struct drm_device *dev)
- 		     "(expected %i, found %i)\n", enabled, crtc->base.enabled);
- 
- 		memset(&pipe_config, 0, sizeof(pipe_config));
-+		pipe_config.cpu_transcoder = crtc->config.cpu_transcoder;
- 		active = dev_priv->display.get_pipe_config(crtc,
- 							   &pipe_config);
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0073-drm-i915-force-bpp-for-eDP-panels.patch b/patches.baytrail/0073-drm-i915-force-bpp-for-eDP-panels.patch
deleted file mode 100644
index f6abf57bee7ee..0000000000000
--- a/patches.baytrail/0073-drm-i915-force-bpp-for-eDP-panels.patch
+++ /dev/null
@@ -1,87 +0,0 @@
-From df2f0819d9be05d3ae1148122c0666946f7bc6c0 Mon Sep 17 00:00:00 2001
-From: James Ausmus <james.ausmus@intel.com>
-Date: Mon, 23 Sep 2013 16:49:14 -0700
-Subject: drm/i915: force bpp for eDP panels
-
-We've had our fair share of woes already which showed that we can't
-rely on the bpc limits in the EDID for eDP panels without risking
-black screens. So now we limit the depth by what the BIOS recommends
-in the VBT:
-
-commit 2f4f649a69a9eb51f6e98130e19dd90a260a4145
-Author: Jani Nikula <jani.nikula@intel.com>
-Date:   Mon Nov 12 14:33:44 2012 +0200
-
-    drm/i915: do not ignore eDP bpc settings from vbt
-
-But that's not enough, since at least the panel on my ASUS Zenbook
-Prime here is also unhappy if the bpc is too low. Hence just take the
-firmware value and dither to get what flimsy panels want.
-
-Like before we ensure that we don't change the bpp if the firmware
-doesn't provide a value, see
-
-commit 9a30a61f3516871c5c638fd7c025fbaa11ddf7fe
-Author: Jani Nikula <jani.nikula@intel.com>
-Date:   Mon Nov 12 14:33:45 2012 +0200
-
-    drm/i915: do not default to 18 bpp for eDP if missing from VBT
-
-v2: Apparently there are some horribly broken eDP panels around which
-only work if the DP link is set up as if we want to driver a 24bpp
-mode, but still only work if the data is feed at 18bpp. See
-
-commit 57c219633275c7e7413f8bc7be250dc092887458
-Author: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date:   Thu Apr 4 17:19:37 2013 +0200
-
-    drm/i915: revert eDP bpp clamping code changes
-
-for the gory details.
-
-Adjust the patch accordingly and update all the relevant comments.
-
-v3: Give up on the cargo-culting v2 attempt and just enfore the edp
-bpp value if it's there. Broken panels be damned!
-
-Cc: Jani Nikula <jani.nikula@intel.com>
-Cc: Paulo Zanoni <przanoni@gmail.com>
-Reviewed-by: Jani Nikula <jani.nikula@intel.com>
-Tested-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit af13188a1a6623fc8b4b6c42178046fb80f8b1d0)
-
-Conflicts:
-	drivers/gpu/drm/i915/intel_dp.c
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_dp.c | 13 +++++++++++--
- 1 file changed, 11 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
-index 83d2241176d8..993d80eab510 100644
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -759,8 +759,17 @@ intel_dp_compute_config(struct intel_encoder *encoder,
- 	/* Walk through all bpp values. Luckily they're all nicely spaced with 2
- 	 * bpc in between. */
- 	bpp = min_t(int, 8*3, pipe_config->pipe_bpp);
--	if (is_edp(intel_dp) && dev_priv->edp.bpp)
--		bpp = min_t(int, bpp, dev_priv->edp.bpp);
-+
-+	/*
-+	 * eDP panels are really fickle, try to enfore the bpp the firmware
-+	 * recomments. This means we'll up-dither 16bpp framebuffers on
-+	 * high-depth panels.
-+	 */
-+	if (is_edp(intel_dp) && dev_priv->edp.bpp) {
-+		DRM_DEBUG_KMS("forcing bpp for eDP panel to BIOS-provided %i\n",
-+			      dev_priv->edp.bpp);
-+		bpp = dev_priv->edp.bpp;
-+	}
- 
- 	for (; bpp >= 6*3; bpp -= 2*3) {
- 		mode_rate = intel_dp_link_required(target_clock, bpp);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0074-drm-i915-drop-adjusted_mode-from-_set_pipeconf-funct.patch b/patches.baytrail/0074-drm-i915-drop-adjusted_mode-from-_set_pipeconf-funct.patch
deleted file mode 100644
index e39f2f70eb59c..0000000000000
--- a/patches.baytrail/0074-drm-i915-drop-adjusted_mode-from-_set_pipeconf-funct.patch
+++ /dev/null
@@ -1,81 +0,0 @@
-From 9728e06f73e44dc01dbcec5d61d16cbd0e21d315 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Fri, 19 Apr 2013 11:24:36 +0200
-Subject: drm/i915: drop adjusted_mode from *_set_pipeconf functions
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-They can get at the adjusted mode through intel_crtc->config.
-
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 6ff93609b1cf77121ec61e8fe197d683b1702cd9)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 14 ++++++--------
- 1 file changed, 6 insertions(+), 8 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index e5735287ff8c..45c2e32d65c7 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -5180,8 +5180,7 @@ static int ironlake_get_refclk(struct drm_crtc *crtc)
- 	return 120000;
- }
- 
--static void ironlake_set_pipeconf(struct drm_crtc *crtc,
--				  struct drm_display_mode *adjusted_mode)
-+static void ironlake_set_pipeconf(struct drm_crtc *crtc)
- {
- 	struct drm_i915_private *dev_priv = crtc->dev->dev_private;
- 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
-@@ -5214,7 +5213,7 @@ static void ironlake_set_pipeconf(struct drm_crtc *crtc,
- 		val |= (PIPECONF_DITHER_EN | PIPECONF_DITHER_TYPE_SP);
- 
- 	val &= ~PIPECONF_INTERLACE_MASK;
--	if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE)
-+	if (intel_crtc->config.adjusted_mode.flags & DRM_MODE_FLAG_INTERLACE)
- 		val |= PIPECONF_INTERLACED_ILK;
- 	else
- 		val |= PIPECONF_PROGRESSIVE;
-@@ -5292,8 +5291,7 @@ static void intel_set_pipe_csc(struct drm_crtc *crtc)
- 	}
- }
- 
--static void haswell_set_pipeconf(struct drm_crtc *crtc,
--				 struct drm_display_mode *adjusted_mode)
-+static void haswell_set_pipeconf(struct drm_crtc *crtc)
- {
- 	struct drm_i915_private *dev_priv = crtc->dev->dev_private;
- 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
-@@ -5307,7 +5305,7 @@ static void haswell_set_pipeconf(struct drm_crtc *crtc,
- 		val |= (PIPECONF_DITHER_EN | PIPECONF_DITHER_TYPE_SP);
- 
- 	val &= ~PIPECONF_INTERLACE_MASK_HSW;
--	if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE)
-+	if (intel_crtc->config.adjusted_mode.flags & DRM_MODE_FLAG_INTERLACE)
- 		val |= PIPECONF_INTERLACED_ILK;
- 	else
- 		val |= PIPECONF_PROGRESSIVE;
-@@ -5765,7 +5763,7 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
- 
- 	fdi_config_ok = ironlake_check_fdi_lanes(intel_crtc);
- 
--	ironlake_set_pipeconf(crtc, adjusted_mode);
-+	ironlake_set_pipeconf(crtc);
- 
- 	/* Set up the display plane register */
- 	I915_WRITE(DSPCNTR(plane), DISPPLANE_GAMMA_ENABLE);
-@@ -5889,7 +5887,7 @@ static int haswell_crtc_mode_set(struct drm_crtc *crtc,
- 	if (intel_crtc->config.has_pch_encoder)
- 		ironlake_fdi_set_m_n(crtc);
- 
--	haswell_set_pipeconf(crtc, adjusted_mode);
-+	haswell_set_pipeconf(crtc);
- 
- 	intel_set_pipe_csc(crtc);
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0075-drm-i915-implement-high-bpc-pipeconf-dither-support-.patch b/patches.baytrail/0075-drm-i915-implement-high-bpc-pipeconf-dither-support-.patch
deleted file mode 100644
index eae608bff49c7..0000000000000
--- a/patches.baytrail/0075-drm-i915-implement-high-bpc-pipeconf-dither-support-.patch
+++ /dev/null
@@ -1,101 +0,0 @@
-From 0f6b2b45fe4a5b27dcc7b76f15c8859a01f36182 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Wed, 24 Apr 2013 14:57:17 +0200
-Subject: drm/i915: implement high-bpc + pipeconf-dither support for g4x/vlv
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The current code is rather ... ugly. The only thing it managed to pull
-off is getting 6bpc on DP working on g4x. Then someone added another
-custom hack for 6bpc eDP on vlv. Fix up this entire mess by properly
-implementing the PIPECONF-based dither/bpc controls on g4x/vlv.
-
-Note that compared to pch based platforms g4x/vlv don't support 12bpc
-modes. g4x is already caught, extend the check for vlv.
-
-The other fixup is to restrict the lvds-specific dithering to early
-gen4 devices - g4x should use the pipeconf dither controls. Note that
-on gen2/3 the dither control is in the panel fitter even.
-
-v2: Don't enable dithering when the pipe is in 10 bpc mode. Quoting
-from Bspec "PIPEACONF - Pipe A Configuration Register, bit 4":
-
-"Programming note: Dithering should only be enabled for 8 bpc or 6
-bpc."
-
-v3: Actually drop the old ugly dither code.
-
-v4: Explain in a short comment why g4x/vlv shouldn't dither for 30 bpp
-pipes (Jesse).
-
-v5: Also clear the dither type correctly as spotted by Ville.
-
-v6: As Ville pointed out we need to indeed set the dithering both in
-the pipeconf register (for DP outputs) and in the LVDS port register
-(for LVDS ouputs). Otherwise LVDS panel will not get properly
-dithered. The old patch got away with this since it forgot to clear
-the LVDS dither bit ...
-
-v7: Remove redundant BPC_MASK clearing, spotted by Ville.
-
-Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit ff9ce46ed6878d6be08660f7d75897d500a4fe9e)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 35 +++++++++++++++++++++--------------
- 1 file changed, 21 insertions(+), 14 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 45c2e32d65c7..f3dc36f87760 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -4633,22 +4633,29 @@ static void i9xx_set_pipeconf(struct intel_crtc *intel_crtc)
- 			pipeconf &= ~PIPECONF_DOUBLE_WIDE;
- 	}
- 
--	/* default to 8bpc */
--	pipeconf &= ~(PIPECONF_BPC_MASK | PIPECONF_DITHER_EN);
--	if (intel_crtc->config.has_dp_encoder) {
--		if (intel_crtc->config.dither) {
--			pipeconf |= PIPECONF_6BPC |
--				    PIPECONF_DITHER_EN |
-+	/* only g4x and later have fancy bpc/dither controls */
-+	if (IS_G4X(dev) || IS_VALLEYVIEW(dev)) {
-+		pipeconf &= ~(PIPECONF_BPC_MASK |
-+			      PIPECONF_DITHER_EN | PIPECONF_DITHER_TYPE_MASK);
-+
-+		/* Bspec claims that we can't use dithering for 30bpp pipes. */
-+		if (intel_crtc->config.dither && intel_crtc->config.pipe_bpp != 30)
-+			pipeconf |= PIPECONF_DITHER_EN |
- 				    PIPECONF_DITHER_TYPE_SP;
--		}
--	}
- 
--	if (IS_VALLEYVIEW(dev) && intel_pipe_has_type(&intel_crtc->base,
--						      INTEL_OUTPUT_EDP)) {
--		if (intel_crtc->config.dither) {
--			pipeconf |= PIPECONF_6BPC |
--					PIPECONF_ENABLE |
--					I965_PIPECONF_ACTIVE;
-+		switch (intel_crtc->config.pipe_bpp) {
-+		case 18:
-+			pipeconf |= PIPECONF_6BPC;
-+			break;
-+		case 24:
-+			pipeconf |= PIPECONF_8BPC;
-+			break;
-+		case 30:
-+			pipeconf |= PIPECONF_10BPC;
-+			break;
-+		default:
-+			/* Case prevented by intel_choose_pipe_bpp_dither. */
-+			BUG();
- 		}
- 	}
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0076-drm-i915-allow-high-bpc-modes-on-DP.patch b/patches.baytrail/0076-drm-i915-allow-high-bpc-modes-on-DP.patch
deleted file mode 100644
index e33d85d256d58..0000000000000
--- a/patches.baytrail/0076-drm-i915-allow-high-bpc-modes-on-DP.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From 31012139f3e381dc4a006b11036a6af349a80971 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Fri, 19 Apr 2013 11:24:38 +0200
-Subject: drm/i915: allow high-bpc modes on DP
-
-Totally untested due to lack of screens supporting more than 8bpc. But
-now we should have closed all holes in our bpp handling, so this
-should be safe. The last missing piece was 10bpc support for g4x/vlv,
-since we directly use the pipe bpp to feed the display link (and
-anyway, only the cpt has any means to have a pipe bpp != the display
-link bpp).
-
-Reviewed-by: Imre Deak <imre.deak@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 52541e30339d932382ab9c0c1d1bacc8dacc541e)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_dp.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
-index 993d80eab510..98c871d1084c 100644
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -758,7 +758,7 @@ intel_dp_compute_config(struct intel_encoder *encoder,
- 
- 	/* Walk through all bpp values. Luckily they're all nicely spaced with 2
- 	 * bpc in between. */
--	bpp = min_t(int, 8*3, pipe_config->pipe_bpp);
-+	bpp = pipe_config->pipe_bpp;
- 
- 	/*
- 	 * eDP panels are really fickle, try to enfore the bpp the firmware
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0077-drm-i915-move-intel_crtc-fdi_lanes-to-pipe_config.patch b/patches.baytrail/0077-drm-i915-move-intel_crtc-fdi_lanes-to-pipe_config.patch
deleted file mode 100644
index a4294159253f0..0000000000000
--- a/patches.baytrail/0077-drm-i915-move-intel_crtc-fdi_lanes-to-pipe_config.patch
+++ /dev/null
@@ -1,191 +0,0 @@
-From 51cd1b72fc26b4f7beefbbe434239745efa6321a Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Wed, 13 Feb 2013 18:04:45 +0100
-Subject: drm/i915: move intel_crtc->fdi_lanes to pipe_config
-
-We need this for two reasons:
-- Correct handling of shared fdi lanes on ivb with fastboot.
-- Handling fdi link bw limits when we only have two fdi lanes by
-  dithering down a bit.
-
-Just search&replace in this patch, no functional change at all.
-
-Reviewed-by: Imre Deak <imre.deak@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 33d29b145305641f2c693b759cac468e0c87ab4d)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_ddi.c     |  7 ++++---
- drivers/gpu/drm/i915/intel_display.c | 36 ++++++++++++++++++------------------
- drivers/gpu/drm/i915/intel_drv.h     |  4 +++-
- 3 files changed, 25 insertions(+), 22 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
-index 70a1e9ca87d3..79c2af486dbb 100644
---- a/drivers/gpu/drm/i915/intel_ddi.c
-+++ b/drivers/gpu/drm/i915/intel_ddi.c
-@@ -181,7 +181,8 @@ void hsw_fdi_link_train(struct drm_crtc *crtc)
- 
- 	/* Enable the PCH Receiver FDI PLL */
- 	rx_ctl_val = dev_priv->fdi_rx_config | FDI_RX_ENHANCE_FRAME_ENABLE |
--		     FDI_RX_PLL_ENABLE | ((intel_crtc->fdi_lanes - 1) << 19);
-+		     FDI_RX_PLL_ENABLE |
-+		     ((intel_crtc->config.fdi_lanes - 1) << 19);
- 	I915_WRITE(_FDI_RXA_CTL, rx_ctl_val);
- 	POSTING_READ(_FDI_RXA_CTL);
- 	udelay(220);
-@@ -209,7 +210,7 @@ void hsw_fdi_link_train(struct drm_crtc *crtc)
- 		 * port reversal bit */
- 		I915_WRITE(DDI_BUF_CTL(PORT_E),
- 			   DDI_BUF_CTL_ENABLE |
--			   ((intel_crtc->fdi_lanes - 1) << 1) |
-+			   ((intel_crtc->config.fdi_lanes - 1) << 1) |
- 			   hsw_ddi_buf_ctl_values[i / 2]);
- 		POSTING_READ(DDI_BUF_CTL(PORT_E));
- 
-@@ -1022,7 +1023,7 @@ void intel_ddi_enable_transcoder_func(struct drm_crtc *crtc)
- 
- 	} else if (type == INTEL_OUTPUT_ANALOG) {
- 		temp |= TRANS_DDI_MODE_SELECT_FDI;
--		temp |= (intel_crtc->fdi_lanes - 1) << 1;
-+		temp |= (intel_crtc->config.fdi_lanes - 1) << 1;
- 
- 	} else if (type == INTEL_OUTPUT_DISPLAYPORT ||
- 		   type == INTEL_OUTPUT_EDP) {
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index f3dc36f87760..1a257d5bc8a9 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -2420,7 +2420,7 @@ static void ironlake_fdi_link_train(struct drm_crtc *crtc)
- 	reg = FDI_TX_CTL(pipe);
- 	temp = I915_READ(reg);
- 	temp &= ~(7 << 19);
--	temp |= (intel_crtc->fdi_lanes - 1) << 19;
-+	temp |= (intel_crtc->config.fdi_lanes - 1) << 19;
- 	temp &= ~FDI_LINK_TRAIN_NONE;
- 	temp |= FDI_LINK_TRAIN_PATTERN_1;
- 	I915_WRITE(reg, temp | FDI_TX_ENABLE);
-@@ -2518,7 +2518,7 @@ static void gen6_fdi_link_train(struct drm_crtc *crtc)
- 	reg = FDI_TX_CTL(pipe);
- 	temp = I915_READ(reg);
- 	temp &= ~(7 << 19);
--	temp |= (intel_crtc->fdi_lanes - 1) << 19;
-+	temp |= (intel_crtc->config.fdi_lanes - 1) << 19;
- 	temp &= ~FDI_LINK_TRAIN_NONE;
- 	temp |= FDI_LINK_TRAIN_PATTERN_1;
- 	temp &= ~FDI_LINK_TRAIN_VOL_EMP_MASK;
-@@ -2653,7 +2653,7 @@ static void ivb_manual_fdi_link_train(struct drm_crtc *crtc)
- 	reg = FDI_TX_CTL(pipe);
- 	temp = I915_READ(reg);
- 	temp &= ~(7 << 19);
--	temp |= (intel_crtc->fdi_lanes - 1) << 19;
-+	temp |= (intel_crtc->config.fdi_lanes - 1) << 19;
- 	temp &= ~(FDI_LINK_TRAIN_AUTO | FDI_LINK_TRAIN_NONE_IVB);
- 	temp |= FDI_LINK_TRAIN_PATTERN_1_IVB;
- 	temp &= ~FDI_LINK_TRAIN_VOL_EMP_MASK;
-@@ -2755,7 +2755,7 @@ static void ironlake_fdi_pll_enable(struct intel_crtc *intel_crtc)
- 	reg = FDI_RX_CTL(pipe);
- 	temp = I915_READ(reg);
- 	temp &= ~((0x7 << 19) | (0x7 << 16));
--	temp |= (intel_crtc->fdi_lanes - 1) << 19;
-+	temp |= (intel_crtc->config.fdi_lanes - 1) << 19;
- 	temp |= (I915_READ(PIPECONF(pipe)) & PIPECONF_BPC_MASK) << 11;
- 	I915_WRITE(reg, temp | FDI_RX_PLL_ENABLE);
- 
-@@ -5410,12 +5410,12 @@ static bool ironlake_check_fdi_lanes(struct intel_crtc *intel_crtc)
- 		to_intel_crtc(dev_priv->pipe_to_crtc_mapping[PIPE_B]);
- 
- 	DRM_DEBUG_KMS("checking fdi config on pipe %c, lanes %i\n",
--		      pipe_name(intel_crtc->pipe), intel_crtc->fdi_lanes);
--	if (intel_crtc->fdi_lanes > 4) {
-+		      pipe_name(intel_crtc->pipe), intel_crtc->config.fdi_lanes);
-+	if (intel_crtc->config.fdi_lanes > 4) {
- 		DRM_DEBUG_KMS("invalid fdi lane config on pipe %c: %i lanes\n",
--			      pipe_name(intel_crtc->pipe), intel_crtc->fdi_lanes);
-+			      pipe_name(intel_crtc->pipe), intel_crtc->config.fdi_lanes);
- 		/* Clamp lanes to avoid programming the hw with bogus values. */
--		intel_crtc->fdi_lanes = 4;
-+		intel_crtc->config.fdi_lanes = 4;
- 
- 		return false;
- 	}
-@@ -5428,28 +5428,28 @@ static bool ironlake_check_fdi_lanes(struct intel_crtc *intel_crtc)
- 		return true;
- 	case PIPE_B:
- 		if (dev_priv->pipe_to_crtc_mapping[PIPE_C]->enabled &&
--		    intel_crtc->fdi_lanes > 2) {
-+		    intel_crtc->config.fdi_lanes > 2) {
- 			DRM_DEBUG_KMS("invalid shared fdi lane config on pipe %c: %i lanes\n",
--				      pipe_name(intel_crtc->pipe), intel_crtc->fdi_lanes);
-+				      pipe_name(intel_crtc->pipe), intel_crtc->config.fdi_lanes);
- 			/* Clamp lanes to avoid programming the hw with bogus values. */
--			intel_crtc->fdi_lanes = 2;
-+			intel_crtc->config.fdi_lanes = 2;
- 
- 			return false;
- 		}
- 
--		if (intel_crtc->fdi_lanes > 2)
-+		if (intel_crtc->config.fdi_lanes > 2)
- 			WARN_ON(I915_READ(SOUTH_CHICKEN1) & FDI_BC_BIFURCATION_SELECT);
- 		else
- 			cpt_enable_fdi_bc_bifurcation(dev);
- 
- 		return true;
- 	case PIPE_C:
--		if (!pipe_B_crtc->base.enabled || pipe_B_crtc->fdi_lanes <= 2) {
--			if (intel_crtc->fdi_lanes > 2) {
-+		if (!pipe_B_crtc->base.enabled || pipe_B_crtc->config.fdi_lanes <= 2) {
-+			if (intel_crtc->config.fdi_lanes > 2) {
- 				DRM_DEBUG_KMS("invalid shared fdi lane config on pipe %c: %i lanes\n",
--					      pipe_name(intel_crtc->pipe), intel_crtc->fdi_lanes);
-+					      pipe_name(intel_crtc->pipe), intel_crtc->config.fdi_lanes);
- 				/* Clamp lanes to avoid programming the hw with bogus values. */
--				intel_crtc->fdi_lanes = 2;
-+				intel_crtc->config.fdi_lanes = 2;
- 
- 				return false;
- 			}
-@@ -5537,7 +5537,7 @@ static void ironlake_fdi_set_m_n(struct drm_crtc *crtc)
- 	lane = ironlake_get_lanes_required(target_clock, link_bw,
- 					   intel_crtc->config.pipe_bpp);
- 
--	intel_crtc->fdi_lanes = lane;
-+	intel_crtc->config.fdi_lanes = lane;
- 
- 	if (intel_crtc->config.pixel_multiplier > 1)
- 		link_bw *= intel_crtc->config.pixel_multiplier;
-@@ -5764,7 +5764,7 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
- 
- 	/* Note, this also computes intel_crtc->fdi_lanes which is used below in
- 	 * ironlake_check_fdi_lanes. */
--	intel_crtc->fdi_lanes = 0;
-+	intel_crtc->config.fdi_lanes = 0;
- 	if (intel_crtc->config.has_pch_encoder)
- 		ironlake_fdi_set_m_n(crtc);
- 
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index 6edab480f6b4..b078b1d51070 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -249,6 +249,9 @@ struct intel_crtc_config {
- 		u32 pos;
- 		u32 size;
- 	} pch_pfit;
-+
-+	/* FDI lanes used, only valid if has_pch_encoder is set. */
-+	int fdi_lanes;
- };
- 
- struct intel_crtc {
-@@ -267,7 +270,6 @@ struct intel_crtc {
- 	bool lowfreq_avail;
- 	struct intel_overlay *overlay;
- 	struct intel_unpin_work *unpin_work;
--	int fdi_lanes;
- 
- 	atomic_t unpin_work_count;
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0078-drm-i915-hw-state-readout-support-for-pipe_config-fd.patch b/patches.baytrail/0078-drm-i915-hw-state-readout-support-for-pipe_config-fd.patch
deleted file mode 100644
index 7874df637d91e..0000000000000
--- a/patches.baytrail/0078-drm-i915-hw-state-readout-support-for-pipe_config-fd.patch
+++ /dev/null
@@ -1,164 +0,0 @@
-From 223fcef7636ee4341fb610ebf6773f37c94172a4 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Mon, 29 Apr 2013 19:33:42 +0200
-Subject: drm/i915: hw state readout support for pipe_config->fdi_lanes
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-v2: Introduce some nice #defines for the FDI lane width fields and put
-them to good use. Suggested by Ville.
-
-v3: Fixup the mask vs. shift copy&pasta fail Imre Deak spotted, and
-use the shift #define also in the mask.
-
-Cc: Imre Deak <imre.deak@intel.com>
-Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Imre Deak <imre.deak@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 627eb5a318a6caca2145d3c7195b084c59b291d9)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_reg.h      |   11 ++--------
- drivers/gpu/drm/i915/intel_ddi.c     |    2 -
- drivers/gpu/drm/i915/intel_display.c |   38 +++++++++++++++++++++++++----------
- 3 files changed, 32 insertions(+), 19 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -4150,10 +4150,9 @@
- #define  FDI_LINK_TRAIN_600MV_3_5DB_SNB_B	(0x39<<22)
- #define  FDI_LINK_TRAIN_800MV_0DB_SNB_B		(0x38<<22)
- #define  FDI_LINK_TRAIN_VOL_EMP_MASK		(0x3f<<22)
--#define  FDI_DP_PORT_WIDTH_X1           (0<<19)
--#define  FDI_DP_PORT_WIDTH_X2           (1<<19)
--#define  FDI_DP_PORT_WIDTH_X3           (2<<19)
--#define  FDI_DP_PORT_WIDTH_X4           (3<<19)
-+#define  FDI_DP_PORT_WIDTH_SHIFT		19
-+#define  FDI_DP_PORT_WIDTH_MASK			(7 << FDI_DP_PORT_WIDTH_SHIFT)
-+#define  FDI_DP_PORT_WIDTH(width)           (((width) - 1) << FDI_DP_PORT_WIDTH_SHIFT)
- #define  FDI_TX_ENHANCE_FRAME_ENABLE    (1<<18)
- /* Ironlake: hardwired to 1 */
- #define  FDI_TX_PLL_ENABLE              (1<<14)
-@@ -4178,7 +4177,6 @@
- /* train, dp width same as FDI_TX */
- #define  FDI_FS_ERRC_ENABLE		(1<<27)
- #define  FDI_FE_ERRC_ENABLE		(1<<26)
--#define  FDI_DP_PORT_WIDTH_X8           (7<<19)
- #define  FDI_RX_POLARITY_REVERSED_LPT	(1<<16)
- #define  FDI_8BPC                       (0<<16)
- #define  FDI_10BPC                      (1<<16)
-@@ -4200,9 +4198,6 @@
- #define  FDI_LINK_TRAIN_PATTERN_IDLE_CPT	(2<<8)
- #define  FDI_LINK_TRAIN_NORMAL_CPT		(3<<8)
- #define  FDI_LINK_TRAIN_PATTERN_MASK_CPT	(3<<8)
--/* LPT */
--#define  FDI_PORT_WIDTH_2X_LPT			(1<<19)
--#define  FDI_PORT_WIDTH_1X_LPT			(0<<19)
- 
- #define _FDI_RXA_MISC			0xf0010
- #define _FDI_RXB_MISC			0xf1010
---- a/drivers/gpu/drm/i915/intel_ddi.c
-+++ b/drivers/gpu/drm/i915/intel_ddi.c
-@@ -182,7 +182,7 @@ void hsw_fdi_link_train(struct drm_crtc
- 	/* Enable the PCH Receiver FDI PLL */
- 	rx_ctl_val = dev_priv->fdi_rx_config | FDI_RX_ENHANCE_FRAME_ENABLE |
- 		     FDI_RX_PLL_ENABLE |
--		     ((intel_crtc->config.fdi_lanes - 1) << 19);
-+		     FDI_DP_PORT_WIDTH(intel_crtc->config.fdi_lanes);
- 	I915_WRITE(_FDI_RXA_CTL, rx_ctl_val);
- 	POSTING_READ(_FDI_RXA_CTL);
- 	udelay(220);
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -2419,8 +2419,8 @@ static void ironlake_fdi_link_train(stru
- 	/* enable CPU FDI TX and PCH FDI RX */
- 	reg = FDI_TX_CTL(pipe);
- 	temp = I915_READ(reg);
--	temp &= ~(7 << 19);
--	temp |= (intel_crtc->config.fdi_lanes - 1) << 19;
-+	temp &= ~FDI_DP_PORT_WIDTH_MASK;
-+	temp |= FDI_DP_PORT_WIDTH(intel_crtc->config.fdi_lanes);
- 	temp &= ~FDI_LINK_TRAIN_NONE;
- 	temp |= FDI_LINK_TRAIN_PATTERN_1;
- 	I915_WRITE(reg, temp | FDI_TX_ENABLE);
-@@ -2517,8 +2517,8 @@ static void gen6_fdi_link_train(struct d
- 	/* enable CPU FDI TX and PCH FDI RX */
- 	reg = FDI_TX_CTL(pipe);
- 	temp = I915_READ(reg);
--	temp &= ~(7 << 19);
--	temp |= (intel_crtc->config.fdi_lanes - 1) << 19;
-+	temp &= ~FDI_DP_PORT_WIDTH_MASK;
-+	temp |= FDI_DP_PORT_WIDTH(intel_crtc->config.fdi_lanes);
- 	temp &= ~FDI_LINK_TRAIN_NONE;
- 	temp |= FDI_LINK_TRAIN_PATTERN_1;
- 	temp &= ~FDI_LINK_TRAIN_VOL_EMP_MASK;
-@@ -2652,8 +2652,8 @@ static void ivb_manual_fdi_link_train(st
- 	/* enable CPU FDI TX and PCH FDI RX */
- 	reg = FDI_TX_CTL(pipe);
- 	temp = I915_READ(reg);
--	temp &= ~(7 << 19);
--	temp |= (intel_crtc->config.fdi_lanes - 1) << 19;
-+	temp &= ~FDI_DP_PORT_WIDTH_MASK;
-+	temp |= FDI_DP_PORT_WIDTH(intel_crtc->config.fdi_lanes);
- 	temp &= ~(FDI_LINK_TRAIN_AUTO | FDI_LINK_TRAIN_NONE_IVB);
- 	temp |= FDI_LINK_TRAIN_PATTERN_1_IVB;
- 	temp &= ~FDI_LINK_TRAIN_VOL_EMP_MASK;
-@@ -2754,8 +2754,8 @@ static void ironlake_fdi_pll_enable(stru
- 	/* enable PCH FDI RX PLL, wait warmup plus DMI latency */
- 	reg = FDI_RX_CTL(pipe);
- 	temp = I915_READ(reg);
--	temp &= ~((0x7 << 19) | (0x7 << 16));
--	temp |= (intel_crtc->config.fdi_lanes - 1) << 19;
-+	temp &= ~(FDI_DP_PORT_WIDTH_MASK | (0x7 << 16));
-+	temp |= FDI_DP_PORT_WIDTH(intel_crtc->config.fdi_lanes);
- 	temp |= (I915_READ(PIPECONF(pipe)) & PIPECONF_BPC_MASK) << 11;
- 	I915_WRITE(reg, temp | FDI_RX_PLL_ENABLE);
- 
-@@ -5796,9 +5796,14 @@ static bool ironlake_get_pipe_config(str
- 	if (!(tmp & PIPECONF_ENABLE))
- 		return false;
- 
--	if (I915_READ(TRANSCONF(crtc->pipe)) & TRANS_ENABLE)
-+	if (I915_READ(TRANSCONF(crtc->pipe)) & TRANS_ENABLE) {
- 		pipe_config->has_pch_encoder = true;
- 
-+		tmp = I915_READ(FDI_RX_CTL(crtc->pipe));
-+		pipe_config->fdi_lanes = ((FDI_DP_PORT_WIDTH_MASK & tmp) >>
-+					  FDI_DP_PORT_WIDTH_SHIFT) + 1;
-+	}
-+
- 	return true;
- }
- 
-@@ -5934,9 +5939,14 @@ static bool haswell_get_pipe_config(stru
- 	 */
- 	tmp = I915_READ(TRANS_DDI_FUNC_CTL(cpu_transcoder));
- 	if ((tmp & TRANS_DDI_PORT_MASK) == TRANS_DDI_SELECT_PORT(PORT_E) &&
--	    I915_READ(TRANSCONF(PIPE_A)) & TRANS_ENABLE)
-+	    I915_READ(TRANSCONF(PIPE_A)) & TRANS_ENABLE) {
- 		pipe_config->has_pch_encoder = true;
- 
-+		tmp = I915_READ(FDI_RX_CTL(PIPE_A));
-+		pipe_config->fdi_lanes = ((FDI_DP_PORT_WIDTH_MASK & tmp) >>
-+					  FDI_DP_PORT_WIDTH_SHIFT) + 1;
-+	}
-+
- 	return true;
- }
- 
-@@ -7902,6 +7912,14 @@ intel_pipe_config_compare(struct intel_c
- 		return false;
- 	}
- 
-+	if (current_config->fdi_lanes != pipe_config->fdi_lanes) {
-+		DRM_ERROR("mismatch in fdi_lanes "
-+			  "(expected %i, found %i)\n",
-+			  current_config->fdi_lanes,
-+			  pipe_config->fdi_lanes);
-+		return false;
-+	}
-+
- 	return true;
- }
- 
diff --git a/patches.baytrail/0079-drm-i915-split-up-fdi_set_m_n-into-computation-and-h.patch b/patches.baytrail/0079-drm-i915-split-up-fdi_set_m_n-into-computation-and-h.patch
deleted file mode 100644
index 9ea37ec602916..0000000000000
--- a/patches.baytrail/0079-drm-i915-split-up-fdi_set_m_n-into-computation-and-h.patch
+++ /dev/null
@@ -1,101 +0,0 @@
-From 28f0597efe29a1f7221cfe017479c531e3408739 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 14 Feb 2013 16:54:22 +0100
-Subject: drm/i915: split up fdi_set_m_n into computation and hw setup
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-And also move the computed m_n values into the pipe_config. This is a
-prep step to move the fdi state computation completely into the
-prepare phase of the modeset sequence. Which will allow us to handle
-fdi link bw constraints in a better way.
-
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit ca3a0ff80faa7ee043fd615c9d9394757e2acb09)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 26 +++++++++++++++-----------
- drivers/gpu/drm/i915/intel_drv.h     |  3 ++-
- 2 files changed, 17 insertions(+), 12 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index d3c2d5c1e72a..0d8ff30e62a2 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -5511,13 +5511,11 @@ void intel_cpu_transcoder_set_m_n(struct intel_crtc *crtc,
- 	}
- }
- 
--static void ironlake_fdi_set_m_n(struct drm_crtc *crtc)
-+static void ironlake_fdi_compute_config(struct intel_crtc *intel_crtc)
- {
--	struct drm_device *dev = crtc->dev;
--	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
-+	struct drm_device *dev = intel_crtc->base.dev;
- 	struct drm_display_mode *adjusted_mode =
- 		&intel_crtc->config.adjusted_mode;
--	struct intel_link_m_n m_n = {0};
- 	int target_clock, lane, link_bw;
- 
- 	/* FDI is a binary signal running at ~2.7GHz, encoding
-@@ -5542,9 +5540,7 @@ static void ironlake_fdi_set_m_n(struct drm_crtc *crtc)
- 	if (intel_crtc->config.pixel_multiplier > 1)
- 		link_bw *= intel_crtc->config.pixel_multiplier;
- 	intel_link_compute_m_n(intel_crtc->config.pipe_bpp, lane, target_clock,
--			       link_bw, &m_n);
--
--	intel_cpu_transcoder_set_m_n(intel_crtc, &m_n);
-+			       link_bw, &intel_crtc->config.fdi_m_n);
- }
- 
- static bool ironlake_needs_fb_cb_tune(struct dpll *dpll, int factor)
-@@ -5765,8 +5761,12 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
- 	/* Note, this also computes intel_crtc->fdi_lanes which is used below in
- 	 * ironlake_check_fdi_lanes. */
- 	intel_crtc->config.fdi_lanes = 0;
--	if (intel_crtc->config.has_pch_encoder)
--		ironlake_fdi_set_m_n(crtc);
-+	if (intel_crtc->config.has_pch_encoder) {
-+		ironlake_fdi_compute_config(intel_crtc);
-+
-+		intel_cpu_transcoder_set_m_n(intel_crtc,
-+					     &intel_crtc->config.fdi_m_n);
-+	}
- 
- 	fdi_config_ok = ironlake_check_fdi_lanes(intel_crtc);
- 
-@@ -5896,8 +5896,12 @@ static int haswell_crtc_mode_set(struct drm_crtc *crtc,
- 
- 	intel_set_pipe_timings(intel_crtc, mode, adjusted_mode);
- 
--	if (intel_crtc->config.has_pch_encoder)
--		ironlake_fdi_set_m_n(crtc);
-+	if (intel_crtc->config.has_pch_encoder) {
-+		ironlake_fdi_compute_config(intel_crtc);
-+
-+		intel_cpu_transcoder_set_m_n(intel_crtc,
-+					     &intel_crtc->config.fdi_m_n);
-+	}
- 
- 	haswell_set_pipeconf(crtc);
- 
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index b078b1d51070..cee65ee5745c 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -250,8 +250,9 @@ struct intel_crtc_config {
- 		u32 size;
- 	} pch_pfit;
- 
--	/* FDI lanes used, only valid if has_pch_encoder is set. */
-+	/* FDI configuration, only valid if has_pch_encoder is set. */
- 	int fdi_lanes;
-+	struct intel_link_m_n fdi_m_n;
- };
- 
- struct intel_crtc {
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0080-drm-i915-compute-fdi-lane-config-earlier.patch b/patches.baytrail/0080-drm-i915-compute-fdi-lane-config-earlier.patch
deleted file mode 100644
index a059c9488c6f8..0000000000000
--- a/patches.baytrail/0080-drm-i915-compute-fdi-lane-config-earlier.patch
+++ /dev/null
@@ -1,130 +0,0 @@
-From 77bfcf37950c6657b7ecc3cc051504899c305d9f Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Fri, 19 Apr 2013 11:24:43 +0200
-Subject: drm/i915: compute fdi lane config earlier
-
-Now that it's split up, we can easily move it around and precompute
-the fdi lane configuration.
-
-Reviewed-by: Imre Deak <imre.deak@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 877d48d5f7d4f90d3bd5fb5422e1a88d39e1d3b3)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 71 +++++++++++++++++-------------------
- 1 file changed, 34 insertions(+), 37 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 0d8ff30e62a2..d1b3e54e02d1 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -3970,6 +3970,37 @@ bool intel_connector_get_hw_state(struct intel_connector *connector)
- 	return encoder->get_hw_state(encoder, &pipe);
- }
- 
-+static void ironlake_fdi_compute_config(struct drm_device *dev,
-+					struct intel_crtc_config *pipe_config)
-+{
-+	struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
-+	int target_clock, lane, link_bw;
-+
-+	/* FDI is a binary signal running at ~2.7GHz, encoding
-+	 * each output octet as 10 bits. The actual frequency
-+	 * is stored as a divider into a 100MHz clock, and the
-+	 * mode pixel clock is stored in units of 1KHz.
-+	 * Hence the bw of each lane in terms of the mode signal
-+	 * is:
-+	 */
-+	link_bw = intel_fdi_link_freq(dev) * MHz(100)/KHz(1)/10;
-+
-+	if (pipe_config->pixel_target_clock)
-+		target_clock = pipe_config->pixel_target_clock;
-+	else
-+		target_clock = adjusted_mode->clock;
-+
-+	lane = ironlake_get_lanes_required(target_clock, link_bw,
-+					   pipe_config->pipe_bpp);
-+
-+	pipe_config->fdi_lanes = lane;
-+
-+	if (pipe_config->pixel_multiplier > 1)
-+		link_bw *= pipe_config->pixel_multiplier;
-+	intel_link_compute_m_n(pipe_config->pipe_bpp, lane, target_clock,
-+			       link_bw, &pipe_config->fdi_m_n);
-+}
-+
- static bool intel_crtc_compute_config(struct drm_crtc *crtc,
- 				      struct intel_crtc_config *pipe_config)
- {
-@@ -4004,6 +4035,9 @@ static bool intel_crtc_compute_config(struct drm_crtc *crtc,
- 		pipe_config->pipe_bpp = 8*3;
- 	}
- 
-+	if (pipe_config->has_pch_encoder)
-+		ironlake_fdi_compute_config(dev, pipe_config);
-+
- 	return true;
- }
- 
-@@ -5511,38 +5545,6 @@ void intel_cpu_transcoder_set_m_n(struct intel_crtc *crtc,
- 	}
- }
- 
--static void ironlake_fdi_compute_config(struct intel_crtc *intel_crtc)
--{
--	struct drm_device *dev = intel_crtc->base.dev;
--	struct drm_display_mode *adjusted_mode =
--		&intel_crtc->config.adjusted_mode;
--	int target_clock, lane, link_bw;
--
--	/* FDI is a binary signal running at ~2.7GHz, encoding
--	 * each output octet as 10 bits. The actual frequency
--	 * is stored as a divider into a 100MHz clock, and the
--	 * mode pixel clock is stored in units of 1KHz.
--	 * Hence the bw of each lane in terms of the mode signal
--	 * is:
--	 */
--	link_bw = intel_fdi_link_freq(dev) * MHz(100)/KHz(1)/10;
--
--	if (intel_crtc->config.pixel_target_clock)
--		target_clock = intel_crtc->config.pixel_target_clock;
--	else
--		target_clock = adjusted_mode->clock;
--
--	lane = ironlake_get_lanes_required(target_clock, link_bw,
--					   intel_crtc->config.pipe_bpp);
--
--	intel_crtc->config.fdi_lanes = lane;
--
--	if (intel_crtc->config.pixel_multiplier > 1)
--		link_bw *= intel_crtc->config.pixel_multiplier;
--	intel_link_compute_m_n(intel_crtc->config.pipe_bpp, lane, target_clock,
--			       link_bw, &intel_crtc->config.fdi_m_n);
--}
--
- static bool ironlake_needs_fb_cb_tune(struct dpll *dpll, int factor)
- {
- 	return i9xx_dpll_compute_m(dpll) < factor * dpll->n;
-@@ -5760,10 +5762,7 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
- 
- 	/* Note, this also computes intel_crtc->fdi_lanes which is used below in
- 	 * ironlake_check_fdi_lanes. */
--	intel_crtc->config.fdi_lanes = 0;
- 	if (intel_crtc->config.has_pch_encoder) {
--		ironlake_fdi_compute_config(intel_crtc);
--
- 		intel_cpu_transcoder_set_m_n(intel_crtc,
- 					     &intel_crtc->config.fdi_m_n);
- 	}
-@@ -5897,8 +5896,6 @@ static int haswell_crtc_mode_set(struct drm_crtc *crtc,
- 	intel_set_pipe_timings(intel_crtc, mode, adjusted_mode);
- 
- 	if (intel_crtc->config.has_pch_encoder) {
--		ironlake_fdi_compute_config(intel_crtc);
--
- 		intel_cpu_transcoder_set_m_n(intel_crtc,
- 					     &intel_crtc->config.fdi_m_n);
- 	}
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0081-drm-i915-Split-up-ironlake_check_fdi_lanes.patch b/patches.baytrail/0081-drm-i915-Split-up-ironlake_check_fdi_lanes.patch
deleted file mode 100644
index 750d89ba25c60..0000000000000
--- a/patches.baytrail/0081-drm-i915-Split-up-ironlake_check_fdi_lanes.patch
+++ /dev/null
@@ -1,77 +0,0 @@
-From 8d1b67f6cf1b27dca06f2049622357dbe8ef0a24 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Fri, 19 Apr 2013 11:24:44 +0200
-Subject: drm/i915: Split up ironlake_check_fdi_lanes
-
-Again in preparation to move the configuration checks into the
-pipe_config computation stage of the modeset sequence.
-
-Reviewed-by: Imre Deak <imre.deak@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit ebfd86fda69bbe4d7b15e0c31e86a3069cf69085)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 31 +++++++++++++++++++++++++------
- 1 file changed, 25 insertions(+), 6 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index d1b3e54e02d1..4dc01e9b59f7 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -5471,11 +5471,6 @@ static bool ironlake_check_fdi_lanes(struct intel_crtc *intel_crtc)
- 			return false;
- 		}
- 
--		if (intel_crtc->config.fdi_lanes > 2)
--			WARN_ON(I915_READ(SOUTH_CHICKEN1) & FDI_BC_BIFURCATION_SELECT);
--		else
--			cpt_enable_fdi_bc_bifurcation(dev);
--
- 		return true;
- 	case PIPE_C:
- 		if (!pipe_B_crtc->base.enabled || pipe_B_crtc->config.fdi_lanes <= 2) {
-@@ -5492,9 +5487,31 @@ static bool ironlake_check_fdi_lanes(struct intel_crtc *intel_crtc)
- 			return false;
- 		}
- 
-+		return true;
-+	default:
-+		BUG();
-+	}
-+}
-+
-+static void ivybridge_update_fdi_bc_bifurcation(struct intel_crtc *intel_crtc)
-+{
-+	struct drm_device *dev = intel_crtc->base.dev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+
-+	switch (intel_crtc->pipe) {
-+	case PIPE_A:
-+		break;
-+	case PIPE_B:
-+		if (intel_crtc->config.fdi_lanes > 2)
-+			WARN_ON(I915_READ(SOUTH_CHICKEN1) & FDI_BC_BIFURCATION_SELECT);
-+		else
-+			cpt_enable_fdi_bc_bifurcation(dev);
-+
-+		break;
-+	case PIPE_C:
- 		cpt_enable_fdi_bc_bifurcation(dev);
- 
--		return true;
-+		break;
- 	default:
- 		BUG();
- 	}
-@@ -5768,6 +5785,8 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
- 	}
- 
- 	fdi_config_ok = ironlake_check_fdi_lanes(intel_crtc);
-+	if (IS_IVYBRIDGE(dev))
-+		ivybridge_update_fdi_bc_bifurcation(intel_crtc);
- 
- 	ironlake_set_pipeconf(crtc);
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0082-drm-i915-move-fdi-lane-configuration-checks-ahead.patch b/patches.baytrail/0082-drm-i915-move-fdi-lane-configuration-checks-ahead.patch
deleted file mode 100644
index b8314f475aa04..0000000000000
--- a/patches.baytrail/0082-drm-i915-move-fdi-lane-configuration-checks-ahead.patch
+++ /dev/null
@@ -1,227 +0,0 @@
-From 5c7f57e276f8e6bc4a3a7b53221e751c76b7e181 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Mon, 29 Apr 2013 19:34:16 +0200
-Subject: drm/i915: move fdi lane configuration checks ahead
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-This nicely allows us to drop some hacks which have only been used
-to work around modeset failures due to lack of fdi lanes.
-
-v2: Implement proper checking for Haswell platforms - the fdi link to
-the LPT PCH has only 2 lanes. Note that we already filter out
-impossible modes in intel_crt_mode_valid. Unfortunately LPT does not
-support 6bpc on the fdi rx, so we can't pull clever tricks to squeeze
-in a few more modes.
-
-v2: Rebased on top of Ben Widawsky's num_pipes reorg.
-
-v3: Rebase on top of Ville's pipe debug output ocd rampage.
-
-v4: Fixup rebase fail spotted by Ville.
-
-v5: Fixup rebase fail spotted by Imre Deak. I suck.
-
-Cc: Imre Deak <imre.deak@intel.com>
-Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Imre Deak <imre.deak@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 1857e1daa0695d45b2639ac9e3cfcdaede4a7f8a)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 129 ++++++++++++++++++-----------------
- 1 file changed, 65 insertions(+), 64 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 4dc01e9b59f7..1b4af98f416a 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -3970,9 +3970,68 @@ bool intel_connector_get_hw_state(struct intel_connector *connector)
- 	return encoder->get_hw_state(encoder, &pipe);
- }
- 
--static void ironlake_fdi_compute_config(struct drm_device *dev,
-+static bool ironlake_check_fdi_lanes(struct drm_device *dev, enum pipe pipe,
-+				     struct intel_crtc_config *pipe_config)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct intel_crtc *pipe_B_crtc =
-+		to_intel_crtc(dev_priv->pipe_to_crtc_mapping[PIPE_B]);
-+
-+	DRM_DEBUG_KMS("checking fdi config on pipe %c, lanes %i\n",
-+		      pipe_name(pipe), pipe_config->fdi_lanes);
-+	if (pipe_config->fdi_lanes > 4) {
-+		DRM_DEBUG_KMS("invalid fdi lane config on pipe %c: %i lanes\n",
-+			      pipe_name(pipe), pipe_config->fdi_lanes);
-+		return false;
-+	}
-+
-+	if (IS_HASWELL(dev)) {
-+		if (pipe_config->fdi_lanes > 2) {
-+			DRM_DEBUG_KMS("only 2 lanes on haswell, required: %i lanes\n",
-+				      pipe_config->fdi_lanes);
-+			return false;
-+		} else {
-+			return true;
-+		}
-+	}
-+
-+	if (INTEL_INFO(dev)->num_pipes == 2)
-+		return true;
-+
-+	/* Ivybridge 3 pipe is really complicated */
-+	switch (pipe) {
-+	case PIPE_A:
-+		return true;
-+	case PIPE_B:
-+		if (dev_priv->pipe_to_crtc_mapping[PIPE_C]->enabled &&
-+		    pipe_config->fdi_lanes > 2) {
-+			DRM_DEBUG_KMS("invalid shared fdi lane config on pipe %c: %i lanes\n",
-+				      pipe_name(pipe), pipe_config->fdi_lanes);
-+			return false;
-+		}
-+		return true;
-+	case PIPE_C:
-+		if (!pipe_B_crtc->base.enabled ||
-+		    pipe_B_crtc->config.fdi_lanes <= 2) {
-+			if (pipe_config->fdi_lanes > 2) {
-+				DRM_DEBUG_KMS("invalid shared fdi lane config on pipe %c: %i lanes\n",
-+					      pipe_name(pipe), pipe_config->fdi_lanes);
-+				return false;
-+			}
-+		} else {
-+			DRM_DEBUG_KMS("fdi link B uses too many lanes to enable link C\n");
-+			return false;
-+		}
-+		return true;
-+	default:
-+		BUG();
-+	}
-+}
-+
-+static bool ironlake_fdi_compute_config(struct intel_crtc *intel_crtc,
- 					struct intel_crtc_config *pipe_config)
- {
-+	struct drm_device *dev = intel_crtc->base.dev;
- 	struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
- 	int target_clock, lane, link_bw;
- 
-@@ -3999,6 +4058,9 @@ static void ironlake_fdi_compute_config(struct drm_device *dev,
- 		link_bw *= pipe_config->pixel_multiplier;
- 	intel_link_compute_m_n(pipe_config->pipe_bpp, lane, target_clock,
- 			       link_bw, &pipe_config->fdi_m_n);
-+
-+	return ironlake_check_fdi_lanes(intel_crtc->base.dev,
-+					intel_crtc->pipe, pipe_config);
- }
- 
- static bool intel_crtc_compute_config(struct drm_crtc *crtc,
-@@ -4036,7 +4098,7 @@ static bool intel_crtc_compute_config(struct drm_crtc *crtc,
- 	}
- 
- 	if (pipe_config->has_pch_encoder)
--		ironlake_fdi_compute_config(dev, pipe_config);
-+		return ironlake_fdi_compute_config(to_intel_crtc(crtc), pipe_config);
- 
- 	return true;
- }
-@@ -5436,63 +5498,6 @@ static void cpt_enable_fdi_bc_bifurcation(struct drm_device *dev)
- 	POSTING_READ(SOUTH_CHICKEN1);
- }
- 
--static bool ironlake_check_fdi_lanes(struct intel_crtc *intel_crtc)
--{
--	struct drm_device *dev = intel_crtc->base.dev;
--	struct drm_i915_private *dev_priv = dev->dev_private;
--	struct intel_crtc *pipe_B_crtc =
--		to_intel_crtc(dev_priv->pipe_to_crtc_mapping[PIPE_B]);
--
--	DRM_DEBUG_KMS("checking fdi config on pipe %c, lanes %i\n",
--		      pipe_name(intel_crtc->pipe), intel_crtc->config.fdi_lanes);
--	if (intel_crtc->config.fdi_lanes > 4) {
--		DRM_DEBUG_KMS("invalid fdi lane config on pipe %c: %i lanes\n",
--			      pipe_name(intel_crtc->pipe), intel_crtc->config.fdi_lanes);
--		/* Clamp lanes to avoid programming the hw with bogus values. */
--		intel_crtc->config.fdi_lanes = 4;
--
--		return false;
--	}
--
--	if (INTEL_INFO(dev)->num_pipes == 2)
--		return true;
--
--	switch (intel_crtc->pipe) {
--	case PIPE_A:
--		return true;
--	case PIPE_B:
--		if (dev_priv->pipe_to_crtc_mapping[PIPE_C]->enabled &&
--		    intel_crtc->config.fdi_lanes > 2) {
--			DRM_DEBUG_KMS("invalid shared fdi lane config on pipe %c: %i lanes\n",
--				      pipe_name(intel_crtc->pipe), intel_crtc->config.fdi_lanes);
--			/* Clamp lanes to avoid programming the hw with bogus values. */
--			intel_crtc->config.fdi_lanes = 2;
--
--			return false;
--		}
--
--		return true;
--	case PIPE_C:
--		if (!pipe_B_crtc->base.enabled || pipe_B_crtc->config.fdi_lanes <= 2) {
--			if (intel_crtc->config.fdi_lanes > 2) {
--				DRM_DEBUG_KMS("invalid shared fdi lane config on pipe %c: %i lanes\n",
--					      pipe_name(intel_crtc->pipe), intel_crtc->config.fdi_lanes);
--				/* Clamp lanes to avoid programming the hw with bogus values. */
--				intel_crtc->config.fdi_lanes = 2;
--
--				return false;
--			}
--		} else {
--			DRM_DEBUG_KMS("fdi link B uses too many lanes to enable link C\n");
--			return false;
--		}
--
--		return true;
--	default:
--		BUG();
--	}
--}
--
- static void ivybridge_update_fdi_bc_bifurcation(struct intel_crtc *intel_crtc)
- {
- 	struct drm_device *dev = intel_crtc->base.dev;
-@@ -5684,7 +5689,6 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
- 	bool is_lvds = false;
- 	struct intel_encoder *encoder;
- 	int ret;
--	bool fdi_config_ok;
- 
- 	for_each_encoder_on_crtc(dev, crtc, encoder) {
- 		switch (encoder->type) {
-@@ -5777,14 +5781,11 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
- 
- 	intel_set_pipe_timings(intel_crtc, mode, adjusted_mode);
- 
--	/* Note, this also computes intel_crtc->fdi_lanes which is used below in
--	 * ironlake_check_fdi_lanes. */
- 	if (intel_crtc->config.has_pch_encoder) {
- 		intel_cpu_transcoder_set_m_n(intel_crtc,
- 					     &intel_crtc->config.fdi_m_n);
- 	}
- 
--	fdi_config_ok = ironlake_check_fdi_lanes(intel_crtc);
- 	if (IS_IVYBRIDGE(dev))
- 		ivybridge_update_fdi_bc_bifurcation(intel_crtc);
- 
-@@ -5800,7 +5801,7 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
- 
- 	intel_update_linetime_watermarks(dev, pipe, adjusted_mode);
- 
--	return fdi_config_ok ? ret : -EINVAL;
-+	return ret;
- }
- 
- static bool ironlake_get_pipe_config(struct intel_crtc *crtc,
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0083-drm-i915-don-t-count-cpu-ports-for-fdi-B-C-lane-shar.patch b/patches.baytrail/0083-drm-i915-don-t-count-cpu-ports-for-fdi-B-C-lane-shar.patch
deleted file mode 100644
index 8e70a2e9add79..0000000000000
--- a/patches.baytrail/0083-drm-i915-don-t-count-cpu-ports-for-fdi-B-C-lane-shar.patch
+++ /dev/null
@@ -1,65 +0,0 @@
-From 206a00e0c53e9cee8e994009c72d4cf2b7bd2c95 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Tue, 19 Feb 2013 22:31:57 +0100
-Subject: drm/i915: don't count cpu ports for fdi B/C lane sharing
-
-This allows us to use all 4 fdi lanes on fdi B when the cpu eDP is
-running on pipe C. Yay!
-
-v2: Encapsulate test into a little helper function, as suggested by
-Chris Wilson.
-
-Reviewed-by: Imre Deak <imre.deak@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 1e833f40eb38b033ea185687daa72c073f1acc15)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 18 +++++++++++++-----
- 1 file changed, 13 insertions(+), 5 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 1b4af98f416a..4fd41ecc063a 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -2369,6 +2369,11 @@ static void intel_fdi_normal_train(struct drm_crtc *crtc)
- 			   FDI_FE_ERRC_ENABLE);
- }
- 
-+static bool pipe_has_enabled_pch(struct intel_crtc *intel_crtc)
-+{
-+	return intel_crtc->base.enabled && intel_crtc->config.has_pch_encoder;
-+}
-+
- static void ivb_modeset_global_resources(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
-@@ -2378,10 +2383,13 @@ static void ivb_modeset_global_resources(struct drm_device *dev)
- 		to_intel_crtc(dev_priv->pipe_to_crtc_mapping[PIPE_C]);
- 	uint32_t temp;
- 
--	/* When everything is off disable fdi C so that we could enable fdi B
--	 * with all lanes. XXX: This misses the case where a pipe is not using
--	 * any pch resources and so doesn't need any fdi lanes. */
--	if (!pipe_B_crtc->base.enabled && !pipe_C_crtc->base.enabled) {
-+	/*
-+	 * When everything is off disable fdi C so that we could enable fdi B
-+	 * with all lanes. Note that we don't care about enabled pipes without
-+	 * an enabled pch encoder.
-+	 */
-+	if (!pipe_has_enabled_pch(pipe_B_crtc) &&
-+	    !pipe_has_enabled_pch(pipe_C_crtc)) {
- 		WARN_ON(I915_READ(FDI_RX_CTL(PIPE_B)) & FDI_RX_ENABLE);
- 		WARN_ON(I915_READ(FDI_RX_CTL(PIPE_C)) & FDI_RX_ENABLE);
- 
-@@ -4011,7 +4019,7 @@ static bool ironlake_check_fdi_lanes(struct drm_device *dev, enum pipe pipe,
- 		}
- 		return true;
- 	case PIPE_C:
--		if (!pipe_B_crtc->base.enabled ||
-+		if (!pipe_has_enabled_pch(pipe_B_crtc) ||
- 		    pipe_B_crtc->config.fdi_lanes <= 2) {
- 			if (pipe_config->fdi_lanes > 2) {
- 				DRM_DEBUG_KMS("invalid shared fdi lane config on pipe %c: %i lanes\n",
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0084-drm-i915-fixup-12bpc-hdmi-dotclock-handling.patch b/patches.baytrail/0084-drm-i915-fixup-12bpc-hdmi-dotclock-handling.patch
deleted file mode 100644
index 86ba0e3c08c60..0000000000000
--- a/patches.baytrail/0084-drm-i915-fixup-12bpc-hdmi-dotclock-handling.patch
+++ /dev/null
@@ -1,80 +0,0 @@
-From 0392902a59f13ae5b1bf023ee248a7f908df22d0 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Fri, 19 Apr 2013 11:24:33 +0200
-Subject: drm/i915: fixup 12bpc hdmi dotclock handling
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-We need to multiply the hdmi port dotclock by 1.5x since it's not
-really a dotclock, but the 10/8 encoding bitclock divided by 10.
-
-Also add correct limit checks for the dotclock and reject modes which
-don't fit. HDMI 1.4 would allow more, but our hw doesn't support that
-unfortunately :(
-
-Somehow I suspect 12bpc hdmi output never really worked - we really
-need an i-g-t testcase to check all the different pixel modes and
-outputs.
-
-v2: Fixup the adjusted port clock handling - we need to make sure that
-the fdi link code still gets the real pixelclock.
-
-v3: g4x/vlv don't support 12bpc hdmi output so drop the bogus comment.
-
-Acked-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-[danvet: Switch dotclock limit check to <= as suggested by Ville.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 325b9d048810f7689ec644595061c0b700e64bce)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_hdmi.c | 17 +++++++++++++++--
- 1 file changed, 15 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
-index 075b7d83d9f5..17e76478a8f5 100644
---- a/drivers/gpu/drm/i915/intel_hdmi.c
-+++ b/drivers/gpu/drm/i915/intel_hdmi.c
-@@ -783,6 +783,7 @@ bool intel_hdmi_compute_config(struct intel_encoder *encoder,
- 	struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base);
- 	struct drm_device *dev = encoder->base.dev;
- 	struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
-+	int clock_12bpc = pipe_config->requested_mode.clock * 3 / 2;
- 
- 	if (intel_hdmi->color_range_auto) {
- 		/* See CEA-861-E - 5.1 Default Encoding Parameters */
-@@ -802,16 +803,28 @@ bool intel_hdmi_compute_config(struct intel_encoder *encoder,
- 	/*
- 	 * HDMI is either 12 or 8, so if the display lets 10bpc sneak
- 	 * through, clamp it down. Note that g4x/vlv don't support 12bpc hdmi
--	 * outputs.
-+	 * outputs. We also need to check that the higher clock still fits
-+	 * within limits.
- 	 */
--	if (pipe_config->pipe_bpp > 8*3 && HAS_PCH_SPLIT(dev)) {
-+	if (pipe_config->pipe_bpp > 8*3 && clock_12bpc <= 225000
-+	    && HAS_PCH_SPLIT(dev)) {
- 		DRM_DEBUG_KMS("forcing bpc to 12 for HDMI\n");
- 		pipe_config->pipe_bpp = 12*3;
-+
-+		/* Need to adjust the port link by 1.5x for 12bpc. */
-+		adjusted_mode->clock = clock_12bpc;
-+		pipe_config->pixel_target_clock =
-+			pipe_config->requested_mode.clock;
- 	} else {
- 		DRM_DEBUG_KMS("forcing bpc to 8 for HDMI\n");
- 		pipe_config->pipe_bpp = 8*3;
- 	}
- 
-+	if (adjusted_mode->clock > 225000) {
-+		DRM_DEBUG_KMS("too high HDMI clock, rejecting mode\n");
-+		return false;
-+	}
-+
- 	return true;
- }
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0085-drm-i915-implement-fdi-auto-dithering.patch b/patches.baytrail/0085-drm-i915-implement-fdi-auto-dithering.patch
deleted file mode 100644
index 16bd86c281d62..0000000000000
--- a/patches.baytrail/0085-drm-i915-implement-fdi-auto-dithering.patch
+++ /dev/null
@@ -1,264 +0,0 @@
-From 97cd0f178e80376d1a83ee986b41454a2a461907 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 21 Feb 2013 00:00:16 +0100
-Subject: drm/i915: implement fdi auto-dithering
-
-So on a bunch of setups we only have 2 fdi lanes available, e.g. hsw
-VGA or 3 pipes on ivb. And seemingly a lot of modes don't quite fit
-into this, among them the default 1080p mode.
-
-The solution is to dither down the pipe a bit so that everything fits,
-which this patch implements.
-
-But ports compute their state under the assumption that the bpp they
-pick will be the one selected, e.g. the display port bw computations
-won't work otherwise. Now we could adjust our code to again up-dither
-to the computed DP link parameters, but that's pointless.
-
-So instead when the pipe needs to adjust parameters we need to retry
-the pipe_config computation at the encoder stage. Furthermore we need
-to inform encoders that they should not increase bandwidth
-requirements if possible. This is required for the hdmi code, which
-prefers the pipe to up-dither to either of the two possible hdmi bpc
-values.
-
-LVDS has a similar requirement, although that's probably only
-theoretical in nature: It's unlikely that we'll ever see an 8bpc
-high-res lvds panel (which is required to hit the 2 fdi lane limit).
-
-eDP is the only thing which could increase the pipe_bpp setting again,
-even when in the retry-loop. This could hit the WARN. Two reasons for
-not bothering:
-- On many eDP panels we'll get a black screen if the bpp settings
-  don't match vbt. So failing the modeset is the right thing to do.
-  But since that also means it's the only way to light up the panel,
-  it should work. So we shouldn't be able to hit this WARN.
-- There are still opens around the eDP panel handling, and maybe we
-  need additional tricks. Before that happens it's imo no use trying
-  to be too clever.
-Worst case we just need to kill that WARN or maybe fail the compute
-config stage if the eDP connector can't get the bpp setting it wants.
-And since this can only happen with an fdi link in between and so for
-pch eDP panels it's rather unlikely to blow up, if ever.
-
-v2: Rebased on top of a bikeshed from Paulo.
-
-v3: Improve commit message around eDP handling with the stuff
-things with Imre.
-
-Reviewed-by: Imre Deak <imre.deak@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit e29c22c0c4fefeb48a0157811930f7e9df0bb3f3)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 56 ++++++++++++++++++++++++++++--------
- drivers/gpu/drm/i915/intel_drv.h     |  7 +++++
- drivers/gpu/drm/i915/intel_hdmi.c    | 14 ++++++---
- drivers/gpu/drm/i915/intel_lvds.c    |  2 +-
- 4 files changed, 62 insertions(+), 17 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 4fd41ecc063a..dc9d2753d756 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -4036,13 +4036,16 @@ static bool ironlake_check_fdi_lanes(struct drm_device *dev, enum pipe pipe,
- 	}
- }
- 
--static bool ironlake_fdi_compute_config(struct intel_crtc *intel_crtc,
--					struct intel_crtc_config *pipe_config)
-+#define RETRY 1
-+static int ironlake_fdi_compute_config(struct intel_crtc *intel_crtc,
-+				       struct intel_crtc_config *pipe_config)
- {
- 	struct drm_device *dev = intel_crtc->base.dev;
- 	struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
- 	int target_clock, lane, link_bw;
-+	bool setup_ok, needs_recompute = false;
- 
-+retry:
- 	/* FDI is a binary signal running at ~2.7GHz, encoding
- 	 * each output octet as 10 bits. The actual frequency
- 	 * is stored as a divider into a 100MHz clock, and the
-@@ -4067,12 +4070,26 @@ static bool ironlake_fdi_compute_config(struct intel_crtc *intel_crtc,
- 	intel_link_compute_m_n(pipe_config->pipe_bpp, lane, target_clock,
- 			       link_bw, &pipe_config->fdi_m_n);
- 
--	return ironlake_check_fdi_lanes(intel_crtc->base.dev,
--					intel_crtc->pipe, pipe_config);
-+	setup_ok = ironlake_check_fdi_lanes(intel_crtc->base.dev,
-+					    intel_crtc->pipe, pipe_config);
-+	if (!setup_ok && pipe_config->pipe_bpp > 6*3) {
-+		pipe_config->pipe_bpp -= 2*3;
-+		DRM_DEBUG_KMS("fdi link bw constraint, reducing pipe bpp to %i\n",
-+			      pipe_config->pipe_bpp);
-+		needs_recompute = true;
-+		pipe_config->bw_constrained = true;
-+
-+		goto retry;
-+	}
-+
-+	if (needs_recompute)
-+		return RETRY;
-+
-+	return setup_ok ? 0 : -EINVAL;
- }
- 
--static bool intel_crtc_compute_config(struct drm_crtc *crtc,
--				      struct intel_crtc_config *pipe_config)
-+static int intel_crtc_compute_config(struct drm_crtc *crtc,
-+				     struct intel_crtc_config *pipe_config)
- {
- 	struct drm_device *dev = crtc->dev;
- 	struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
-@@ -4081,7 +4098,7 @@ static bool intel_crtc_compute_config(struct drm_crtc *crtc,
- 		/* FDI link clock is fixed at 2.7G */
- 		if (pipe_config->requested_mode.clock * 3
- 		    > IRONLAKE_FDI_FREQ * 4)
--			return false;
-+			return -EINVAL;
- 	}
- 
- 	/* All interlaced capable intel hw wants timings in frames. Note though
-@@ -4095,7 +4112,7 @@ static bool intel_crtc_compute_config(struct drm_crtc *crtc,
- 	 */
- 	if ((INTEL_INFO(dev)->gen > 4 || IS_G4X(dev)) &&
- 		adjusted_mode->hsync_start == adjusted_mode->hdisplay)
--		return false;
-+		return -EINVAL;
- 
- 	if ((IS_G4X(dev) || IS_VALLEYVIEW(dev)) && pipe_config->pipe_bpp > 10*3) {
- 		pipe_config->pipe_bpp = 10*3; /* 12bpc is gen5+ */
-@@ -4108,7 +4125,7 @@ static bool intel_crtc_compute_config(struct drm_crtc *crtc,
- 	if (pipe_config->has_pch_encoder)
- 		return ironlake_fdi_compute_config(to_intel_crtc(crtc), pipe_config);
- 
--	return true;
-+	return 0;
- }
- 
- static int valleyview_get_display_clock_speed(struct drm_device *dev)
-@@ -7708,7 +7725,8 @@ intel_modeset_pipe_config(struct drm_crtc *crtc,
- 	struct drm_encoder_helper_funcs *encoder_funcs;
- 	struct intel_encoder *encoder;
- 	struct intel_crtc_config *pipe_config;
--	int plane_bpp;
-+	int plane_bpp, ret = -EINVAL;
-+	bool retry = true;
- 
- 	pipe_config = kzalloc(sizeof(*pipe_config), GFP_KERNEL);
- 	if (!pipe_config)
-@@ -7721,6 +7739,7 @@ intel_modeset_pipe_config(struct drm_crtc *crtc,
- 	if (plane_bpp < 0)
- 		goto fail;
- 
-+encoder_retry:
- 	/* Pass our mode to the connectors and the CRTC to give them a chance to
- 	 * adjust it according to limitations or connector properties, and also
- 	 * a chance to reject the mode entirely.
-@@ -7749,10 +7768,23 @@ intel_modeset_pipe_config(struct drm_crtc *crtc,
- 		}
- 	}
- 
--	if (!(intel_crtc_compute_config(crtc, pipe_config))) {
-+	ret = intel_crtc_compute_config(crtc, pipe_config);
-+	if (ret < 0) {
- 		DRM_DEBUG_KMS("CRTC fixup failed\n");
- 		goto fail;
- 	}
-+
-+	if (ret == RETRY) {
-+		if (WARN(!retry, "loop in pipe configuration computation\n")) {
-+			ret = -EINVAL;
-+			goto fail;
-+		}
-+
-+		DRM_DEBUG_KMS("CRTC bw constrained, retrying\n");
-+		retry = false;
-+		goto encoder_retry;
-+	}
-+
- 	DRM_DEBUG_KMS("[CRTC:%d]\n", crtc->base.id);
- 
- 	pipe_config->dither = pipe_config->pipe_bpp != plane_bpp;
-@@ -7762,7 +7794,7 @@ intel_modeset_pipe_config(struct drm_crtc *crtc,
- 	return pipe_config;
- fail:
- 	kfree(pipe_config);
--	return ERR_PTR(-EINVAL);
-+	return ERR_PTR(ret);
- }
- 
- /* Computes which crtcs are affected and sets the relevant bits in the mask. For
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index cee65ee5745c..174ba4e6a105 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -223,6 +223,13 @@ struct intel_crtc_config {
- 	/* Controls for the clock computation, to override various stages. */
- 	bool clock_set;
- 
-+	/*
-+	 * crtc bandwidth limit, don't increase pipe bpp or clock if not really
-+	 * required. This is set in the 2nd loop of calling encoder's
-+	 * ->compute_config if the first pick doesn't work out.
-+	 */
-+	bool bw_constrained;
-+
- 	/* Settings for the intel dpll used on pretty much everything but
- 	 * haswell. */
- 	struct dpll dpll;
-diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
-index 17e76478a8f5..2b727f0d201f 100644
---- a/drivers/gpu/drm/i915/intel_hdmi.c
-+++ b/drivers/gpu/drm/i915/intel_hdmi.c
-@@ -784,6 +784,7 @@ bool intel_hdmi_compute_config(struct intel_encoder *encoder,
- 	struct drm_device *dev = encoder->base.dev;
- 	struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
- 	int clock_12bpc = pipe_config->requested_mode.clock * 3 / 2;
-+	int desired_bpp;
- 
- 	if (intel_hdmi->color_range_auto) {
- 		/* See CEA-861-E - 5.1 Default Encoding Parameters */
-@@ -808,16 +809,21 @@ bool intel_hdmi_compute_config(struct intel_encoder *encoder,
- 	 */
- 	if (pipe_config->pipe_bpp > 8*3 && clock_12bpc <= 225000
- 	    && HAS_PCH_SPLIT(dev)) {
--		DRM_DEBUG_KMS("forcing bpc to 12 for HDMI\n");
--		pipe_config->pipe_bpp = 12*3;
-+		DRM_DEBUG_KMS("picking bpc to 12 for HDMI output\n");
-+		desired_bpp = 12*3;
- 
- 		/* Need to adjust the port link by 1.5x for 12bpc. */
- 		adjusted_mode->clock = clock_12bpc;
- 		pipe_config->pixel_target_clock =
- 			pipe_config->requested_mode.clock;
- 	} else {
--		DRM_DEBUG_KMS("forcing bpc to 8 for HDMI\n");
--		pipe_config->pipe_bpp = 8*3;
-+		DRM_DEBUG_KMS("picking bpc to 8 for HDMI output\n");
-+		desired_bpp = 8*3;
-+	}
-+
-+	if (!pipe_config->bw_constrained) {
-+		DRM_DEBUG_KMS("forcing pipe bpc to %i for HDMI\n", desired_bpp);
-+		pipe_config->pipe_bpp = desired_bpp;
- 	}
- 
- 	if (adjusted_mode->clock > 225000) {
-diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
-index d125756a2665..ab04cb9d0725 100644
---- a/drivers/gpu/drm/i915/intel_lvds.c
-+++ b/drivers/gpu/drm/i915/intel_lvds.c
-@@ -248,7 +248,7 @@ static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
- 	else
- 		lvds_bpp = 6*3;
- 
--	if (lvds_bpp != pipe_config->pipe_bpp) {
-+	if (lvds_bpp != pipe_config->pipe_bpp && !pipe_config->bw_constrained) {
- 		DRM_DEBUG_KMS("forcing display bpp (was %d) to LVDS (%d)\n",
- 			      pipe_config->pipe_bpp, lvds_bpp);
- 		pipe_config->pipe_bpp = lvds_bpp;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0086-drm-i915-stop-for_each_intel_crtc_masked-macro-from-.patch b/patches.baytrail/0086-drm-i915-stop-for_each_intel_crtc_masked-macro-from-.patch
deleted file mode 100644
index d514613771f69..0000000000000
--- a/patches.baytrail/0086-drm-i915-stop-for_each_intel_crtc_masked-macro-from-.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From b8f0038d0ef746436f8176f92568288d27c7f922 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Fri, 19 Apr 2013 11:25:33 +0200
-Subject: drm/i915: stop for_each_intel_crtc_masked macro from leaking
-
-Spotted while changing related code.
-
-Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 0973f18f8a764d869add12728887c2d1cc281ffb)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index dc9d2753d756..390d529da28e 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -7959,7 +7959,7 @@ intel_modeset_update_state(struct drm_device *dev, unsigned prepare_pipes)
- 	list_for_each_entry((intel_crtc), \
- 			    &(dev)->mode_config.crtc_list, \
- 			    base.head) \
--		if (mask & (1 <<(intel_crtc)->pipe)) \
-+		if (mask & (1 <<(intel_crtc)->pipe))
- 
- static bool
- intel_pipe_config_compare(struct intel_crtc_config *current_config,
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0087-drm-i915-introduce-macros-to-check-pipe-config-prope.patch b/patches.baytrail/0087-drm-i915-introduce-macros-to-check-pipe-config-prope.patch
deleted file mode 100644
index afe00ffe3022c..0000000000000
--- a/patches.baytrail/0087-drm-i915-introduce-macros-to-check-pipe-config-prope.patch
+++ /dev/null
@@ -1,59 +0,0 @@
-From 945b40b7459bf86cf9867ec08b073d72cd959f69 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Fri, 19 Apr 2013 11:25:34 +0200
-Subject: drm/i915: introduce macros to check pipe config properties
-
-This code will get _really_ repetive, and we'll end up with tons more
-of this kind. So extract the common patterns.
-
-This should also help when we add a lazy pipe_config compare mode for
-fastboot.
-
-Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 08a24034a84866e3abb7fdb35ed0e479b240c205)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 24 +++++++++++-------------
- 1 file changed, 11 insertions(+), 13 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 390d529da28e..759034dfe617 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -7965,21 +7965,19 @@ static bool
- intel_pipe_config_compare(struct intel_crtc_config *current_config,
- 			  struct intel_crtc_config *pipe_config)
- {
--	if (current_config->has_pch_encoder != pipe_config->has_pch_encoder) {
--		DRM_ERROR("mismatch in has_pch_encoder "
--			  "(expected %i, found %i)\n",
--			  current_config->has_pch_encoder,
--			  pipe_config->has_pch_encoder);
--		return false;
-+#define PIPE_CONF_CHECK_I(name)	\
-+	if (current_config->name != pipe_config->name) { \
-+		DRM_ERROR("mismatch in " #name " " \
-+			  "(expected %i, found %i)\n", \
-+			  current_config->name, \
-+			  pipe_config->name); \
-+		return false; \
- 	}
- 
--	if (current_config->fdi_lanes != pipe_config->fdi_lanes) {
--		DRM_ERROR("mismatch in fdi_lanes "
--			  "(expected %i, found %i)\n",
--			  current_config->fdi_lanes,
--			  pipe_config->fdi_lanes);
--		return false;
--	}
-+	PIPE_CONF_CHECK_I(has_pch_encoder);
-+	PIPE_CONF_CHECK_I(fdi_lanes);
-+
-+#undef PIPE_CONF_CHECK_I
- 
- 	return true;
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0088-drm-i915-hw-state-readout-support-for-fdi-m-n.patch b/patches.baytrail/0088-drm-i915-hw-state-readout-support-for-fdi-m-n.patch
deleted file mode 100644
index 9f87b58b3a6a7..0000000000000
--- a/patches.baytrail/0088-drm-i915-hw-state-readout-support-for-fdi-m-n.patch
+++ /dev/null
@@ -1,90 +0,0 @@
-From bf13db128d25d79fb87a404590811433f6fe8cbd Mon Sep 17 00:00:00 2001
-From: James Ausmus <james.ausmus@intel.com>
-Date: Mon, 23 Sep 2013 16:49:38 -0700
-Subject: drm/i915: hw state readout support for fdi m/n
-
-We want to use the fdi m/n values to easily compute the adjusted mode
-dotclock on pch ports. Hence make sure the values stored in the pipe
-config are always reliable.
-
-v2: Fixup FDI TU readout.
-
-v3: Rebase on top of moved cpu_transcoder.
-
-Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 72419203cab9acf173956f5564639b0012cd2604)
-
-Conflicts:
-	drivers/gpu/drm/i915/i915_reg.h
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_reg.h      |    1 +
- drivers/gpu/drm/i915/intel_display.c |   25 +++++++++++++++++++++++++
- 2 files changed, 26 insertions(+)
-
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -2783,6 +2783,7 @@
- 
- /* Transfer unit size for display port - 1, default is 0x3f (for TU size 64) */
- #define  TU_SIZE(x)             (((x)-1) << 25) /* default size 64 */
-+#define  TU_SIZE_SHIFT		25
- #define  TU_SIZE_MASK           (0x3f << 25)
- 
- #define  DATA_LINK_M_N_MASK	(0xffffff)
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -5829,6 +5829,22 @@ static int ironlake_crtc_mode_set(struct
- 	return ret;
- }
- 
-+static void ironlake_get_fdi_m_n_config(struct intel_crtc *crtc,
-+					struct intel_crtc_config *pipe_config)
-+{
-+	struct drm_device *dev = crtc->base.dev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	enum transcoder transcoder = pipe_config->cpu_transcoder;
-+
-+	pipe_config->fdi_m_n.link_m = I915_READ(PIPE_LINK_M1(transcoder));
-+	pipe_config->fdi_m_n.link_n = I915_READ(PIPE_LINK_N1(transcoder));
-+	pipe_config->fdi_m_n.gmch_m = I915_READ(PIPE_DATA_M1(transcoder))
-+					& ~TU_SIZE_MASK;
-+	pipe_config->fdi_m_n.gmch_n = I915_READ(PIPE_DATA_N1(transcoder));
-+	pipe_config->fdi_m_n.tu = ((I915_READ(PIPE_DATA_M1(transcoder))
-+				   & TU_SIZE_MASK) >> TU_SIZE_SHIFT) + 1;
-+}
-+
- static bool ironlake_get_pipe_config(struct intel_crtc *crtc,
- 				     struct intel_crtc_config *pipe_config)
- {
-@@ -5846,6 +5862,8 @@ static bool ironlake_get_pipe_config(str
- 		tmp = I915_READ(FDI_RX_CTL(crtc->pipe));
- 		pipe_config->fdi_lanes = ((FDI_DP_PORT_WIDTH_MASK & tmp) >>
- 					  FDI_DP_PORT_WIDTH_SHIFT) + 1;
-+
-+		ironlake_get_fdi_m_n_config(crtc, pipe_config);
- 	}
- 
- 	return true;
-@@ -5991,6 +6009,8 @@ static bool haswell_get_pipe_config(stru
- 		tmp = I915_READ(FDI_RX_CTL(PIPE_A));
- 		pipe_config->fdi_lanes = ((FDI_DP_PORT_WIDTH_MASK & tmp) >>
- 					  FDI_DP_PORT_WIDTH_SHIFT) + 1;
-+
-+		ironlake_get_fdi_m_n_config(crtc, pipe_config);
- 	}
- 
- 	return true;
-@@ -7976,6 +7996,11 @@ intel_pipe_config_compare(struct intel_c
- 
- 	PIPE_CONF_CHECK_I(has_pch_encoder);
- 	PIPE_CONF_CHECK_I(fdi_lanes);
-+	PIPE_CONF_CHECK_I(fdi_m_n.gmch_m);
-+	PIPE_CONF_CHECK_I(fdi_m_n.gmch_n);
-+	PIPE_CONF_CHECK_I(fdi_m_n.link_m);
-+	PIPE_CONF_CHECK_I(fdi_m_n.link_n);
-+	PIPE_CONF_CHECK_I(fdi_m_n.tu);
- 
- #undef PIPE_CONF_CHECK_I
- 
diff --git a/patches.baytrail/0089-drm-i915-hw-state-readout-support-for-pipe-timings.patch b/patches.baytrail/0089-drm-i915-hw-state-readout-support-for-pipe-timings.patch
deleted file mode 100644
index 257e0edc4d382..0000000000000
--- a/patches.baytrail/0089-drm-i915-hw-state-readout-support-for-pipe-timings.patch
+++ /dev/null
@@ -1,161 +0,0 @@
-From 1292d9d152fd59e386e9c87110e0dc1c5a4f0e91 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Mon, 29 Apr 2013 21:56:12 +0200
-Subject: drm/i915: hw state readout support for pipe timings
-
-This does duplicate the logic in intel_crtc_mode_get a bit, but the
-issue is that we also should handle interlace modes and other insanity
-correctly.
-
-Hence I've opted for a sligthly more elaborate route where we first
-read out the crtc timings for the adjusted mode, and then optionally
-(not sure if we really need it) compute the modeline from that.
-
-v2: Also read out the pipe source dimensions into the requested mode.
-
-v3: Rebase on top of the moved cpu_transcoder.
-
-v4: Simplify CHECK_FLAGS logic as suggested by Chris Wilson. Also
-properly #undef that macro again.
-
-Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com> (v3)
-[danvet: Use the existing mask for interlaced bits, spotted by Mika.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 1bd1bd806037af04dd1d7bdd39b2b04090c10d2c)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_reg.h      |    1 
- drivers/gpu/drm/i915/intel_display.c |   75 +++++++++++++++++++++++++++++++++++
- 2 files changed, 76 insertions(+)
-
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -2848,6 +2848,7 @@
- #define   PIPECONF_INTERLACED_ILK		(3 << 21)
- #define   PIPECONF_INTERLACED_DBL_ILK		(4 << 21) /* ilk/snb only */
- #define   PIPECONF_PFIT_PF_INTERLACED_DBL_ILK	(5 << 21) /* ilk/snb only */
-+#define   PIPECONF_INTERLACE_MODE_MASK		(7 << 21)
- #define   PIPECONF_CXSR_DOWNCLOCK	(1<<16)
- #define   PIPECONF_COLOR_RANGE_SELECT	(1 << 13)
- #define   PIPECONF_BPC_MASK	(0x7 << 5)
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -4728,6 +4728,45 @@ static void intel_set_pipe_timings(struc
- 		   ((mode->hdisplay - 1) << 16) | (mode->vdisplay - 1));
- }
- 
-+static void intel_get_pipe_timings(struct intel_crtc *crtc,
-+				   struct intel_crtc_config *pipe_config)
-+{
-+	struct drm_device *dev = crtc->base.dev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	enum transcoder cpu_transcoder = pipe_config->cpu_transcoder;
-+	uint32_t tmp;
-+
-+	tmp = I915_READ(HTOTAL(cpu_transcoder));
-+	pipe_config->adjusted_mode.crtc_hdisplay = (tmp & 0xffff) + 1;
-+	pipe_config->adjusted_mode.crtc_htotal = ((tmp >> 16) & 0xffff) + 1;
-+	tmp = I915_READ(HBLANK(cpu_transcoder));
-+	pipe_config->adjusted_mode.crtc_hblank_start = (tmp & 0xffff) + 1;
-+	pipe_config->adjusted_mode.crtc_hblank_end = ((tmp >> 16) & 0xffff) + 1;
-+	tmp = I915_READ(HSYNC(cpu_transcoder));
-+	pipe_config->adjusted_mode.crtc_hsync_start = (tmp & 0xffff) + 1;
-+	pipe_config->adjusted_mode.crtc_hsync_end = ((tmp >> 16) & 0xffff) + 1;
-+
-+	tmp = I915_READ(VTOTAL(cpu_transcoder));
-+	pipe_config->adjusted_mode.crtc_vdisplay = (tmp & 0xffff) + 1;
-+	pipe_config->adjusted_mode.crtc_vtotal = ((tmp >> 16) & 0xffff) + 1;
-+	tmp = I915_READ(VBLANK(cpu_transcoder));
-+	pipe_config->adjusted_mode.crtc_vblank_start = (tmp & 0xffff) + 1;
-+	pipe_config->adjusted_mode.crtc_vblank_end = ((tmp >> 16) & 0xffff) + 1;
-+	tmp = I915_READ(VSYNC(cpu_transcoder));
-+	pipe_config->adjusted_mode.crtc_vsync_start = (tmp & 0xffff) + 1;
-+	pipe_config->adjusted_mode.crtc_vsync_end = ((tmp >> 16) & 0xffff) + 1;
-+
-+	if (I915_READ(PIPECONF(cpu_transcoder)) & PIPECONF_INTERLACE_MASK) {
-+		pipe_config->adjusted_mode.flags |= DRM_MODE_FLAG_INTERLACE;
-+		pipe_config->adjusted_mode.crtc_vtotal += 1;
-+		pipe_config->adjusted_mode.crtc_vblank_end += 1;
-+	}
-+
-+	tmp = I915_READ(PIPESRC(crtc->pipe));
-+	pipe_config->requested_mode.vdisplay = (tmp & 0xffff) + 1;
-+	pipe_config->requested_mode.hdisplay = ((tmp >> 16) & 0xffff) + 1;
-+}
-+
- static void i9xx_set_pipeconf(struct intel_crtc *intel_crtc)
- {
- 	struct drm_device *dev = intel_crtc->base.dev;
-@@ -4949,6 +4988,8 @@ static bool i9xx_get_pipe_config(struct
- 	if (!(tmp & PIPECONF_ENABLE))
- 		return false;
- 
-+	intel_get_pipe_timings(crtc, pipe_config);
-+
- 	return true;
- }
- 
-@@ -5866,6 +5907,8 @@ static bool ironlake_get_pipe_config(str
- 		ironlake_get_fdi_m_n_config(crtc, pipe_config);
- 	}
- 
-+	intel_get_pipe_timings(crtc, pipe_config);
-+
- 	return true;
- }
- 
-@@ -6013,6 +6056,8 @@ static bool haswell_get_pipe_config(stru
- 		ironlake_get_fdi_m_n_config(crtc, pipe_config);
- 	}
- 
-+	intel_get_pipe_timings(crtc, pipe_config);
-+
- 	return true;
- }
- 
-@@ -7994,6 +8039,15 @@ intel_pipe_config_compare(struct intel_c
- 		return false; \
- 	}
- 
-+#define PIPE_CONF_CHECK_FLAGS(name, mask)	\
-+	if ((current_config->name ^ pipe_config->name) & (mask)) { \
-+		DRM_ERROR("mismatch in " #name " " \
-+			  "(expected %i, found %i)\n", \
-+			  current_config->name & (mask), \
-+			  pipe_config->name & (mask)); \
-+		return false; \
-+	}
-+
- 	PIPE_CONF_CHECK_I(has_pch_encoder);
- 	PIPE_CONF_CHECK_I(fdi_lanes);
- 	PIPE_CONF_CHECK_I(fdi_m_n.gmch_m);
-@@ -8002,7 +8056,28 @@ intel_pipe_config_compare(struct intel_c
- 	PIPE_CONF_CHECK_I(fdi_m_n.link_n);
- 	PIPE_CONF_CHECK_I(fdi_m_n.tu);
- 
-+	PIPE_CONF_CHECK_I(adjusted_mode.crtc_hdisplay);
-+	PIPE_CONF_CHECK_I(adjusted_mode.crtc_htotal);
-+	PIPE_CONF_CHECK_I(adjusted_mode.crtc_hblank_start);
-+	PIPE_CONF_CHECK_I(adjusted_mode.crtc_hblank_end);
-+	PIPE_CONF_CHECK_I(adjusted_mode.crtc_hsync_start);
-+	PIPE_CONF_CHECK_I(adjusted_mode.crtc_hsync_end);
-+
-+	PIPE_CONF_CHECK_I(adjusted_mode.crtc_vdisplay);
-+	PIPE_CONF_CHECK_I(adjusted_mode.crtc_vtotal);
-+	PIPE_CONF_CHECK_I(adjusted_mode.crtc_vblank_start);
-+	PIPE_CONF_CHECK_I(adjusted_mode.crtc_vblank_end);
-+	PIPE_CONF_CHECK_I(adjusted_mode.crtc_vsync_start);
-+	PIPE_CONF_CHECK_I(adjusted_mode.crtc_vsync_end);
-+
-+	PIPE_CONF_CHECK_FLAGS(adjusted_mode.flags,
-+			      DRM_MODE_FLAG_INTERLACE);
-+
-+	PIPE_CONF_CHECK_I(requested_mode.hdisplay);
-+	PIPE_CONF_CHECK_I(requested_mode.vdisplay);
-+
- #undef PIPE_CONF_CHECK_I
-+#undef PIPE_CONF_CHECK_FLAGS
- 
- 	return true;
- }
diff --git a/patches.baytrail/0090-drm-i915-cleanup-opregion-technology-enabled-indicat.patch b/patches.baytrail/0090-drm-i915-cleanup-opregion-technology-enabled-indicat.patch
deleted file mode 100644
index b7d2903c89b1b..0000000000000
--- a/patches.baytrail/0090-drm-i915-cleanup-opregion-technology-enabled-indicat.patch
+++ /dev/null
@@ -1,57 +0,0 @@
-From ba84753f54b55bd4ce5b995769da515cd936fa7c Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Mon, 29 Apr 2013 13:02:50 +0300
-Subject: drm/i915: cleanup opregion technology enabled indicator defines
-
-Move near other defines, add TCHE in the name. No functional changes.
-
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit f599cc2917a1beb1a619d70e3ee7b9bc4dc17bb9)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_opregion.c | 13 +++++++------
- 1 file changed, 7 insertions(+), 6 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_opregion.c b/drivers/gpu/drm/i915/intel_opregion.c
-index 8f4989476a6f..3ddbffa1b792 100644
---- a/drivers/gpu/drm/i915/intel_opregion.c
-+++ b/drivers/gpu/drm/i915/intel_opregion.c
-@@ -123,6 +123,12 @@ struct opregion_asle {
- #define ASLE_PFIT_FAILED	(1<<14)
- #define ASLE_PWM_FREQ_FAILED	(1<<16)
- 
-+/* Technology enabled indicator */
-+#define ASLE_TCHE_ALS_EN	(1 << 0)
-+#define ASLE_TCHE_BLC_EN	(1 << 1)
-+#define ASLE_TCHE_PFIT_EN	(1 << 2)
-+#define ASLE_TCHE_PFMB_EN	(1 << 3)
-+
- /* ASLE backlight brightness to set */
- #define ASLE_BCLP_VALID                (1<<31)
- #define ASLE_BCLP_MSK          (~(1<<31))
-@@ -222,11 +228,6 @@ void intel_opregion_asle_intr(struct drm_device *dev)
- 	iowrite32(asle_stat, &asle->aslc);
- }
- 
--#define ASLE_ALS_EN    (1<<0)
--#define ASLE_BLC_EN    (1<<1)
--#define ASLE_PFIT_EN   (1<<2)
--#define ASLE_PFMB_EN   (1<<3)
--
- void intel_opregion_enable_asle(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
-@@ -236,7 +237,7 @@ void intel_opregion_enable_asle(struct drm_device *dev)
- 		if (IS_MOBILE(dev))
- 			intel_enable_asle(dev);
- 
--		iowrite32(ASLE_BLC_EN, &asle->tche);
-+		iowrite32(ASLE_TCHE_BLC_EN, &asle->tche);
- 		iowrite32(1, &asle->ardy);
- 	}
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0091-drm-i915-manage-opregion-asle-driver-readiness-prope.patch b/patches.baytrail/0091-drm-i915-manage-opregion-asle-driver-readiness-prope.patch
deleted file mode 100644
index 14c9960d607d0..0000000000000
--- a/patches.baytrail/0091-drm-i915-manage-opregion-asle-driver-readiness-prope.patch
+++ /dev/null
@@ -1,81 +0,0 @@
-From 9ee0256b9568f3afc95f6a4cdeb9ffc0449377a8 Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Mon, 29 Apr 2013 13:02:51 +0300
-Subject: drm/i915: manage opregion asle driver readiness properly
-
-Only set ASLE driver readiness (ARDY) and technology enabled indicator
-(TCHE) once per opregion init. There should be no need to do that at irq
-postinstall time. Also clear driver readiness at fini.
-
-While at it, add defines for driver readiness.
-
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 68bca4b0c5553c0137d13df37f18a4b059d6e795)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_opregion.c | 18 ++++++++++++++----
- 1 file changed, 14 insertions(+), 4 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_opregion.c b/drivers/gpu/drm/i915/intel_opregion.c
-index 3ddbffa1b792..c7b72efe6cd8 100644
---- a/drivers/gpu/drm/i915/intel_opregion.c
-+++ b/drivers/gpu/drm/i915/intel_opregion.c
-@@ -110,6 +110,10 @@ struct opregion_asle {
- 	u8 rsvd[102];
- } __attribute__((packed));
- 
-+/* Driver readiness indicator */
-+#define ASLE_ARDY_READY		(1 << 0)
-+#define ASLE_ARDY_NOT_READY	(0 << 0)
-+
- /* ASLE irq request bits */
- #define ASLE_SET_ALS_ILLUM     (1 << 0)
- #define ASLE_SET_BACKLIGHT     (1 << 1)
-@@ -236,9 +240,6 @@ void intel_opregion_enable_asle(struct drm_device *dev)
- 	if (asle) {
- 		if (IS_MOBILE(dev))
- 			intel_enable_asle(dev);
--
--		iowrite32(ASLE_TCHE_BLC_EN, &asle->tche);
--		iowrite32(1, &asle->ardy);
- 	}
- }
- 
-@@ -425,8 +426,12 @@ void intel_opregion_init(struct drm_device *dev)
- 		register_acpi_notifier(&intel_opregion_notifier);
- 	}
- 
--	if (opregion->asle)
-+	if (opregion->asle) {
- 		intel_opregion_enable_asle(dev);
-+
-+		iowrite32(ASLE_TCHE_BLC_EN, &opregion->asle->tche);
-+		iowrite32(ASLE_ARDY_READY, &opregion->asle->ardy);
-+	}
- }
- 
- void intel_opregion_fini(struct drm_device *dev)
-@@ -437,6 +442,9 @@ void intel_opregion_fini(struct drm_device *dev)
- 	if (!opregion->header)
- 		return;
- 
-+	if (opregion->asle)
-+		iowrite32(ASLE_ARDY_NOT_READY, &opregion->asle->ardy);
-+
- 	if (opregion->acpi) {
- 		iowrite32(0, &opregion->acpi->drdy);
- 
-@@ -499,6 +507,8 @@ int intel_opregion_setup(struct drm_device *dev)
- 	if (mboxes & MBOX_ASLE) {
- 		DRM_DEBUG_DRIVER("ASLE supported\n");
- 		opregion->asle = base + OPREGION_ASLE_OFFSET;
-+
-+		iowrite32(ASLE_ARDY_NOT_READY, &opregion->asle->ardy);
- 	}
- 
- 	return 0;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0092-drm-i915-untie-opregion-init-and-asle-irq-pipestat-e.patch b/patches.baytrail/0092-drm-i915-untie-opregion-init-and-asle-irq-pipestat-e.patch
deleted file mode 100644
index ee6715e988a40..0000000000000
--- a/patches.baytrail/0092-drm-i915-untie-opregion-init-and-asle-irq-pipestat-e.patch
+++ /dev/null
@@ -1,52 +0,0 @@
-From 53388964db8ca6deedde875aea32d544685e4120 Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Mon, 29 Apr 2013 13:02:52 +0300
-Subject: drm/i915: untie opregion init and asle irq/pipestat enable
-
-Stop calling intel_opregion_enable_asle() and consequently
-intel_enable_asle() on opregion init. It should not be necessary for
-these reasons:
-
-1) On PCH split platforms, it only enables GSE interrupt, which is
-   enabled in irq postinstall anyway. Moreover, the irq enable uses the
-   wrong bit on IVB+.
-
-2) On gen 2, it would enable a reserved pipestat bit. If there were gen
-   2 systems with opregion asle support, that is. And the gen 2 irq
-   handler won't handle it anyway.
-
-3) On gen 3-4, the irq postinstall will call
-   intel_opregion_enable_asle() to enable the pipestat.
-
-In short, move the asle irq/pipestat enable responsibility to irq
-postinstall, which already happens to be in place.
-
-This should not cause any functional changes, but only do the one line
-change here for easier bisectability, just in case, and leave all the
-cleanups this allows to followup patches.
-
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 2cc7aa29143b1276db3e87d2a2d50d3625b77d60)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_opregion.c | 2 --
- 1 file changed, 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_opregion.c b/drivers/gpu/drm/i915/intel_opregion.c
-index c7b72efe6cd8..700e83ba3378 100644
---- a/drivers/gpu/drm/i915/intel_opregion.c
-+++ b/drivers/gpu/drm/i915/intel_opregion.c
-@@ -427,8 +427,6 @@ void intel_opregion_init(struct drm_device *dev)
- 	}
- 
- 	if (opregion->asle) {
--		intel_opregion_enable_asle(dev);
--
- 		iowrite32(ASLE_TCHE_BLC_EN, &opregion->asle->tche);
- 		iowrite32(ASLE_ARDY_READY, &opregion->asle->ardy);
- 	}
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0093-drm-i915-cleanup-redundant-checks-from-intel_enable_.patch b/patches.baytrail/0093-drm-i915-cleanup-redundant-checks-from-intel_enable_.patch
deleted file mode 100644
index 37c27cbf87418..0000000000000
--- a/patches.baytrail/0093-drm-i915-cleanup-redundant-checks-from-intel_enable_.patch
+++ /dev/null
@@ -1,52 +0,0 @@
-From 78faa70b81e0428debe2fb0c938a00d897fdff92 Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Mon, 29 Apr 2013 13:02:53 +0300
-Subject: drm/i915: cleanup redundant checks from intel_enable_asle
-
-Realize that intel_enable_asle() is never called on PCH-split platforms
-or on VLV. Rip out the GSE irq enable for PCH-split platforms, which
-also happens to be incorrect for IVB+.
-
-This should not cause any functional changes.
-
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit f898780ba020696e50c04abf2a55790df37ce384)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 16 +++-------------
- 1 file changed, 3 insertions(+), 13 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index 3587ea7fa1fb..a39386c3d93a 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -347,21 +347,11 @@ void intel_enable_asle(struct drm_device *dev)
- 	drm_i915_private_t *dev_priv = dev->dev_private;
- 	unsigned long irqflags;
- 
--	/* FIXME: opregion/asle for VLV */
--	if (IS_VALLEYVIEW(dev))
--		return;
--
- 	spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
- 
--	if (HAS_PCH_SPLIT(dev))
--		ironlake_enable_display_irq(dev_priv, DE_GSE);
--	else {
--		i915_enable_pipestat(dev_priv, 1,
--				     PIPE_LEGACY_BLC_EVENT_ENABLE);
--		if (INTEL_INFO(dev)->gen >= 4)
--			i915_enable_pipestat(dev_priv, 0,
--					     PIPE_LEGACY_BLC_EVENT_ENABLE);
--	}
-+	i915_enable_pipestat(dev_priv, 1, PIPE_LEGACY_BLC_EVENT_ENABLE);
-+	if (INTEL_INFO(dev)->gen >= 4)
-+		i915_enable_pipestat(dev_priv, 0, PIPE_LEGACY_BLC_EVENT_ENABLE);
- 
- 	spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0094-drm-i915-cleanup-opregion-asle-pipestat-enable.patch b/patches.baytrail/0094-drm-i915-cleanup-opregion-asle-pipestat-enable.patch
deleted file mode 100644
index 2d80e38d8e003..0000000000000
--- a/patches.baytrail/0094-drm-i915-cleanup-opregion-asle-pipestat-enable.patch
+++ /dev/null
@@ -1,114 +0,0 @@
-From ac87d4f4f91fb9e3dd477ceb0fe4e7ebc45ffaec Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Mon, 29 Apr 2013 13:02:54 +0300
-Subject: drm/i915: cleanup opregion asle pipestat enable
-
-Both intel_opregion_enable_asle() and intel_enable_asle() have shrunk
-considerably. Merge them together into a static function in i915_irq.c,
-and rename to better reflect the purpose and the related platforms.
-
-No functional changes.
-
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit f49e38dd23d28d4fceea1e84ae444b4c25fc0407)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h       |  4 ----
- drivers/gpu/drm/i915/i915_irq.c       | 11 +++++++----
- drivers/gpu/drm/i915/intel_opregion.c | 11 -----------
- 3 files changed, 7 insertions(+), 19 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index a540b1f2354e..a3cdfbc3d8db 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1486,8 +1486,6 @@ i915_enable_pipestat(drm_i915_private_t *dev_priv, int pipe, u32 mask);
- void
- i915_disable_pipestat(drm_i915_private_t *dev_priv, int pipe, u32 mask);
- 
--void intel_enable_asle(struct drm_device *dev);
--
- #ifdef CONFIG_DEBUG_FS
- extern void i915_destroy_error_state(struct drm_device *dev);
- #else
-@@ -1823,12 +1821,10 @@ extern int intel_opregion_setup(struct drm_device *dev);
- extern void intel_opregion_init(struct drm_device *dev);
- extern void intel_opregion_fini(struct drm_device *dev);
- extern void intel_opregion_asle_intr(struct drm_device *dev);
--extern void intel_opregion_enable_asle(struct drm_device *dev);
- #else
- static inline void intel_opregion_init(struct drm_device *dev) { return; }
- static inline void intel_opregion_fini(struct drm_device *dev) { return; }
- static inline void intel_opregion_asle_intr(struct drm_device *dev) { return; }
--static inline void intel_opregion_enable_asle(struct drm_device *dev) { return; }
- #endif
- 
- /* intel_acpi.c */
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index a39386c3d93a..7d8cfedfaf86 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -340,13 +340,16 @@ i915_disable_pipestat(drm_i915_private_t *dev_priv, int pipe, u32 mask)
- }
- 
- /**
-- * intel_enable_asle - enable ASLE interrupt for OpRegion
-+ * i915_enable_asle_pipestat - enable ASLE pipestat for OpRegion
-  */
--void intel_enable_asle(struct drm_device *dev)
-+static void i915_enable_asle_pipestat(struct drm_device *dev)
- {
- 	drm_i915_private_t *dev_priv = dev->dev_private;
- 	unsigned long irqflags;
- 
-+	if (!dev_priv->opregion.asle || !IS_MOBILE(dev))
-+		return;
-+
- 	spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
- 
- 	i915_enable_pipestat(dev_priv, 1, PIPE_LEGACY_BLC_EVENT_ENABLE);
-@@ -3001,7 +3004,7 @@ static int i915_irq_postinstall(struct drm_device *dev)
- 	I915_WRITE(IER, enable_mask);
- 	POSTING_READ(IER);
- 
--	intel_opregion_enable_asle(dev);
-+	i915_enable_asle_pipestat(dev);
- 
- 	return 0;
- }
-@@ -3235,7 +3238,7 @@ static int i965_irq_postinstall(struct drm_device *dev)
- 	I915_WRITE(PORT_HOTPLUG_EN, 0);
- 	POSTING_READ(PORT_HOTPLUG_EN);
- 
--	intel_opregion_enable_asle(dev);
-+	i915_enable_asle_pipestat(dev);
- 
- 	return 0;
- }
-diff --git a/drivers/gpu/drm/i915/intel_opregion.c b/drivers/gpu/drm/i915/intel_opregion.c
-index 700e83ba3378..5c2d6939600e 100644
---- a/drivers/gpu/drm/i915/intel_opregion.c
-+++ b/drivers/gpu/drm/i915/intel_opregion.c
-@@ -232,17 +232,6 @@ void intel_opregion_asle_intr(struct drm_device *dev)
- 	iowrite32(asle_stat, &asle->aslc);
- }
- 
--void intel_opregion_enable_asle(struct drm_device *dev)
--{
--	struct drm_i915_private *dev_priv = dev->dev_private;
--	struct opregion_asle __iomem *asle = dev_priv->opregion.asle;
--
--	if (asle) {
--		if (IS_MOBILE(dev))
--			intel_enable_asle(dev);
--	}
--}
--
- #define ACPI_EV_DISPLAY_SWITCH (1<<0)
- #define ACPI_EV_LID            (1<<1)
- #define ACPI_EV_DOCK           (1<<2)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0095-drm-i915-move-lvds_border_bits-to-pipe_config.patch b/patches.baytrail/0095-drm-i915-move-lvds_border_bits-to-pipe_config.patch
deleted file mode 100644
index baad21feb7db0..0000000000000
--- a/patches.baytrail/0095-drm-i915-move-lvds_border_bits-to-pipe_config.patch
+++ /dev/null
@@ -1,88 +0,0 @@
-From 925df03211f20c2cab87e28cbf547abc1e4b2e9a Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 25 Apr 2013 22:52:16 +0200
-Subject: drm/i915: move lvds_border_bits to pipe_config
-
-pipe_config is the new dev_priv!
-
-More seriously, this is actually better since a pipe_config can be
-thrown away if the modeset compute config stage fails. Whereas any
-state stored in dev_prive needs to be painstakingly restored, since
-otherwise a dpms off/on will wreak massive havoc. Yes, that even
-applies to state only used in ->mode_set callbacks, since we need to
-call those even for dpms on when the Haswell power well cleared
-everything out.
-
-Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 68fc874289e58e62bd0820db0d52150ce6d9fe03)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h    | 2 --
- drivers/gpu/drm/i915/intel_drv.h   | 1 +
- drivers/gpu/drm/i915/intel_lvds.c  | 2 +-
- drivers/gpu/drm/i915/intel_panel.c | 3 +--
- 4 files changed, 3 insertions(+), 5 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index a3cdfbc3d8db..c5a31c628ab3 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1020,8 +1020,6 @@ typedef struct drm_i915_private {
- 	/* Kernel Modesetting */
- 
- 	struct sdvo_device_mapping sdvo_mappings[2];
--	/* indicate whether the LVDS_BORDER should be enabled or not */
--	unsigned int lvds_border_bits;
- 
- 	struct drm_crtc *plane_to_crtc_mapping[3];
- 	struct drm_crtc *pipe_to_crtc_mapping[3];
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index 174ba4e6a105..428b9c0357ba 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -249,6 +249,7 @@ struct intel_crtc_config {
- 	struct {
- 		u32 control;
- 		u32 pgm_ratios;
-+		u32 lvds_border_bits;
- 	} gmch_pfit;
- 
- 	/* Panel fitter placement and size for Ironlake+ */
-diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
-index ab04cb9d0725..6e1f65c4d8a2 100644
---- a/drivers/gpu/drm/i915/intel_lvds.c
-+++ b/drivers/gpu/drm/i915/intel_lvds.c
-@@ -116,7 +116,7 @@ static void intel_pre_pll_enable_lvds(struct intel_encoder *encoder)
- 	}
- 
- 	/* set the corresponsding LVDS_BORDER bit */
--	temp |= dev_priv->lvds_border_bits;
-+	temp |= intel_crtc->config.gmch_pfit.lvds_border_bits;
- 	/* Set the B0-B3 data pairs corresponding to whether we're going to
- 	 * set the DPLLs for dual-channel mode or not.
- 	 */
-diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
-index 140f60d40105..d8139f126bea 100644
---- a/drivers/gpu/drm/i915/intel_panel.c
-+++ b/drivers/gpu/drm/i915/intel_panel.c
-@@ -183,7 +183,6 @@ void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
- 			      int fitting_mode)
- {
- 	struct drm_device *dev = intel_crtc->base.dev;
--	struct drm_i915_private *dev_priv = dev->dev_private;
- 	u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
- 	struct drm_display_mode *mode, *adjusted_mode;
- 
-@@ -312,7 +311,7 @@ out:
- 		pipe_config->gmch_pfit.control = pfit_control;
- 		pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios;
- 	}
--	dev_priv->lvds_border_bits = border;
-+	pipe_config->gmch_pfit.lvds_border_bits = border;
- }
- 
- static int is_backlight_combination_mode(struct drm_device *dev)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0096-drm-i915-rip-out-indirection-for-pfit-pipe_config-as.patch b/patches.baytrail/0096-drm-i915-rip-out-indirection-for-pfit-pipe_config-as.patch
deleted file mode 100644
index 09432d2cd94b1..0000000000000
--- a/patches.baytrail/0096-drm-i915-rip-out-indirection-for-pfit-pipe_config-as.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From c3a9b19671d4ba953329d1fb2a7e1f4aafd66164 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 25 Apr 2013 22:52:17 +0200
-Subject: drm/i915: rip out indirection for pfit pipe_config assignment
-
-This was still required a bit (on the cargo-cult side though) when the
-state was stored in dev_priv, and when the enable/disable sequence was
-botched a bit (to avoid too many updates).
-
-But with pipeconfig we always get a clean slate, so this is pointless.
-Rip it out.
-
-Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 2deefda541edb0c73e57e988ccaac4cd014da0d3)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_panel.c | 7 ++-----
- 1 file changed, 2 insertions(+), 5 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
-index d8139f126bea..8cae635bb90a 100644
---- a/drivers/gpu/drm/i915/intel_panel.c
-+++ b/drivers/gpu/drm/i915/intel_panel.c
-@@ -306,11 +306,8 @@ out:
- 	if (INTEL_INFO(dev)->gen < 4 && pipe_config->pipe_bpp == 18)
- 		pfit_control |= PANEL_8TO6_DITHER_ENABLE;
- 
--	if (pfit_control != pipe_config->gmch_pfit.control ||
--	    pfit_pgm_ratios != pipe_config->gmch_pfit.pgm_ratios) {
--		pipe_config->gmch_pfit.control = pfit_control;
--		pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios;
--	}
-+	pipe_config->gmch_pfit.control = pfit_control;
-+	pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios;
- 	pipe_config->gmch_pfit.lvds_border_bits = border;
- }
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0097-drm-i915-move-border-color-writes-to-pfit_enable.patch b/patches.baytrail/0097-drm-i915-move-border-color-writes-to-pfit_enable.patch
deleted file mode 100644
index 432b758253624..0000000000000
--- a/patches.baytrail/0097-drm-i915-move-border-color-writes-to-pfit_enable.patch
+++ /dev/null
@@ -1,70 +0,0 @@
-From 2e1974cb6ac30203a60240adb8f7bf00019bd107 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 25 Apr 2013 22:52:18 +0200
-Subject: drm/i915: move border color writes to pfit_enable
-
-Writing hw registers from compute_config?
-Just say no!
-
-In this case not too horrible since we write a constant 0, and only
-debugging would put something else in there. But while checking that
-code I've noticed that this register disappeared on pch platforms, so
-fix that up, too.
-
-And adjust the comment a bit, it's outdated.
-
-Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 5a80c45c5297a025c2615624042ea8b6840a5376)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c |  4 ++++
- drivers/gpu/drm/i915/intel_lvds.c    | 10 ----------
- 2 files changed, 4 insertions(+), 10 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index f1b6ca3fe82a..5c89c0a293e5 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -3632,6 +3632,10 @@ static void i9xx_pfit_enable(struct intel_crtc *crtc)
- 
- 	I915_WRITE(PFIT_PGM_RATIOS, pipe_config->gmch_pfit.pgm_ratios);
- 	I915_WRITE(PFIT_CONTROL, pipe_config->gmch_pfit.control);
-+
-+	/* Border color in case we don't scale up to the full screen. Black by
-+	 * default, change to something else for debugging. */
-+	I915_WRITE(BCLRPAT(crtc->pipe), 0);
- }
- 
- static void valleyview_crtc_enable(struct drm_crtc *crtc)
-diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
-index 6e1f65c4d8a2..b314ef3ee644 100644
---- a/drivers/gpu/drm/i915/intel_lvds.c
-+++ b/drivers/gpu/drm/i915/intel_lvds.c
-@@ -231,7 +231,6 @@ static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
- 	struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
- 	struct intel_crtc *intel_crtc = lvds_encoder->base.new_crtc;
- 	unsigned int lvds_bpp;
--	int pipe;
- 
- 	/* Should never happen!! */
- 	if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
-@@ -274,15 +273,6 @@ static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
- 					 intel_connector->panel.fitting_mode);
- 	}
- 
--	/*
--	 * Enable automatic panel scaling for non-native modes so that they fill
--	 * the screen.  Should be enabled before the pipe is enabled, according
--	 * to register description and PRM.
--	 * Change the value here to see the borders for debugging
--	 */
--	for_each_pipe(pipe)
--		I915_WRITE(BCLRPAT(pipe), 0);
--
- 	drm_mode_set_crtcinfo(adjusted_mode, 0);
- 	pipe_config->timings_set = true;
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0098-drm-Add-struct-drm_rect-and-assorted-utility-functio.patch b/patches.baytrail/0098-drm-Add-struct-drm_rect-and-assorted-utility-functio.patch
deleted file mode 100644
index f5398e81e606d..0000000000000
--- a/patches.baytrail/0098-drm-Add-struct-drm_rect-and-assorted-utility-functio.patch
+++ /dev/null
@@ -1,306 +0,0 @@
-From dcbd4209c29fb5365e011e621a0e52dfddc9d2a4 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Wed, 24 Apr 2013 18:52:34 +0300
-Subject: drm: Add struct drm_rect and assorted utility functions
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-struct drm_rect represents a simple rectangle. The utility
-functions are there to help driver writers.
-
-v2: Moved the region stuff into its own file, made the smaller funcs
-    static inline, used 64bit maths in the scaled clipping function to
-    avoid overflows (instead it will saturate to INT_MIN or INT_MAX).
-v3: Renamed drm_region to drm_rect, drm_region_clip to
-    drm_rect_intersect, and drm_region_subsample to drm_rect_downscale.
-v4: Renamed some function parameters, improve kernel-doc comments a bit,
-    and actually generate documentation for drm_rect.[ch].
-v5: s/RETUTRNS/RETURNS/
-
-Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Acked-by: Dave Airlie <airlied@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 3512f976d252bd5d07d04e9e157f0cd210c959a0)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- Documentation/DocBook/drm.tmpl |   2 +
- drivers/gpu/drm/Makefile       |   3 +-
- drivers/gpu/drm/drm_rect.c     |  96 ++++++++++++++++++++++++++++++
- include/drm/drm_rect.h         | 132 +++++++++++++++++++++++++++++++++++++++++
- 4 files changed, 232 insertions(+), 1 deletion(-)
- create mode 100644 drivers/gpu/drm/drm_rect.c
- create mode 100644 include/drm/drm_rect.h
-
-diff --git a/Documentation/DocBook/drm.tmpl b/Documentation/DocBook/drm.tmpl
-index f9df3b872c16..7c7af25b330c 100644
---- a/Documentation/DocBook/drm.tmpl
-+++ b/Documentation/DocBook/drm.tmpl
-@@ -1653,6 +1653,8 @@ void intel_crt_init(struct drm_device *dev)
-     <sect2>
-       <title>KMS API Functions</title>
- !Edrivers/gpu/drm/drm_crtc.c
-+!Edrivers/gpu/drm/drm_rect.c
-+!Finclude/drm/drm_rect.h
-     </sect2>
-   </sect1>
- 
-diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
-index 1c9f24396002..1ecbe5b7312d 100644
---- a/drivers/gpu/drm/Makefile
-+++ b/drivers/gpu/drm/Makefile
-@@ -12,7 +12,8 @@ drm-y       :=	drm_auth.o drm_buffer.o drm_bufs.o drm_cache.o \
- 		drm_platform.o drm_sysfs.o drm_hashtab.o drm_mm.o \
- 		drm_crtc.o drm_modes.o drm_edid.o \
- 		drm_info.o drm_debugfs.o drm_encoder_slave.o \
--		drm_trace_points.o drm_global.o drm_prime.o
-+		drm_trace_points.o drm_global.o drm_prime.o \
-+		drm_rect.o
- 
- drm-$(CONFIG_COMPAT) += drm_ioc32.o
- drm-$(CONFIG_DRM_GEM_CMA_HELPER) += drm_gem_cma_helper.o
-diff --git a/drivers/gpu/drm/drm_rect.c b/drivers/gpu/drm/drm_rect.c
-new file mode 100644
-index 000000000000..22091ecdbff4
---- /dev/null
-+++ b/drivers/gpu/drm/drm_rect.c
-@@ -0,0 +1,96 @@
-+/*
-+ * Copyright (C) 2011-2013 Intel Corporation
-+ *
-+ * Permission is hereby granted, free of charge, to any person obtaining a
-+ * copy of this software and associated documentation files (the "Software"),
-+ * to deal in the Software without restriction, including without limitation
-+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
-+ * and/or sell copies of the Software, and to permit persons to whom the
-+ * Software is furnished to do so, subject to the following conditions:
-+ *
-+ * The above copyright notice and this permission notice (including the next
-+ * paragraph) shall be included in all copies or substantial portions of the
-+ * Software.
-+ *
-+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
-+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
-+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
-+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
-+ * SOFTWARE.
-+ */
-+
-+#include <linux/errno.h>
-+#include <linux/export.h>
-+#include <linux/kernel.h>
-+#include <drm/drm_rect.h>
-+
-+/**
-+ * drm_rect_intersect - intersect two rectangles
-+ * @r1: first rectangle
-+ * @r2: second rectangle
-+ *
-+ * Calculate the intersection of rectangles @r1 and @r2.
-+ * @r1 will be overwritten with the intersection.
-+ *
-+ * RETURNS:
-+ * %true if rectangle @r1 is still visible after the operation,
-+ * %false otherwise.
-+ */
-+bool drm_rect_intersect(struct drm_rect *r1, const struct drm_rect *r2)
-+{
-+	r1->x1 = max(r1->x1, r2->x1);
-+	r1->y1 = max(r1->y1, r2->y1);
-+	r1->x2 = min(r1->x2, r2->x2);
-+	r1->y2 = min(r1->y2, r2->y2);
-+
-+	return drm_rect_visible(r1);
-+}
-+EXPORT_SYMBOL(drm_rect_intersect);
-+
-+/**
-+ * drm_rect_clip_scaled - perform a scaled clip operation
-+ * @src: source window rectangle
-+ * @dst: destination window rectangle
-+ * @clip: clip rectangle
-+ * @hscale: horizontal scaling factor
-+ * @vscale: vertical scaling factor
-+ *
-+ * Clip rectangle @dst by rectangle @clip. Clip rectangle @src by the
-+ * same amounts multiplied by @hscale and @vscale.
-+ *
-+ * RETURNS:
-+ * %true if rectangle @dst is still visible after being clipped,
-+ * %false otherwise
-+ */
-+bool drm_rect_clip_scaled(struct drm_rect *src, struct drm_rect *dst,
-+			  const struct drm_rect *clip,
-+			  int hscale, int vscale)
-+{
-+	int diff;
-+
-+	diff = clip->x1 - dst->x1;
-+	if (diff > 0) {
-+		int64_t tmp = src->x1 + (int64_t) diff * hscale;
-+		src->x1 = clamp_t(int64_t, tmp, INT_MIN, INT_MAX);
-+	}
-+	diff = clip->y1 - dst->y1;
-+	if (diff > 0) {
-+		int64_t tmp = src->y1 + (int64_t) diff * vscale;
-+		src->y1 = clamp_t(int64_t, tmp, INT_MIN, INT_MAX);
-+	}
-+	diff = dst->x2 - clip->x2;
-+	if (diff > 0) {
-+		int64_t tmp = src->x2 - (int64_t) diff * hscale;
-+		src->x2 = clamp_t(int64_t, tmp, INT_MIN, INT_MAX);
-+	}
-+	diff = dst->y2 - clip->y2;
-+	if (diff > 0) {
-+		int64_t tmp = src->y2 - (int64_t) diff * vscale;
-+		src->y2 = clamp_t(int64_t, tmp, INT_MIN, INT_MAX);
-+	}
-+
-+	return drm_rect_intersect(dst, clip);
-+}
-+EXPORT_SYMBOL(drm_rect_clip_scaled);
-diff --git a/include/drm/drm_rect.h b/include/drm/drm_rect.h
-new file mode 100644
-index 000000000000..2b7278c1bc42
---- /dev/null
-+++ b/include/drm/drm_rect.h
-@@ -0,0 +1,132 @@
-+/*
-+ * Copyright (C) 2011-2013 Intel Corporation
-+ *
-+ * Permission is hereby granted, free of charge, to any person obtaining a
-+ * copy of this software and associated documentation files (the "Software"),
-+ * to deal in the Software without restriction, including without limitation
-+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
-+ * and/or sell copies of the Software, and to permit persons to whom the
-+ * Software is furnished to do so, subject to the following conditions:
-+ *
-+ * The above copyright notice and this permission notice (including the next
-+ * paragraph) shall be included in all copies or substantial portions of the
-+ * Software.
-+ *
-+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
-+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
-+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
-+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
-+ * SOFTWARE.
-+ */
-+
-+#ifndef DRM_RECT_H
-+#define DRM_RECT_H
-+
-+/**
-+ * drm_rect - two dimensional rectangle
-+ * @x1: horizontal starting coordinate (inclusive)
-+ * @x2: horizontal ending coordinate (exclusive)
-+ * @y1: vertical starting coordinate (inclusive)
-+ * @y2: vertical ending coordinate (exclusive)
-+ */
-+struct drm_rect {
-+	int x1, y1, x2, y2;
-+};
-+
-+/**
-+ * drm_rect_adjust_size - adjust the size of the rectangle
-+ * @r: rectangle to be adjusted
-+ * @dw: horizontal adjustment
-+ * @dh: vertical adjustment
-+ *
-+ * Change the size of rectangle @r by @dw in the horizontal direction,
-+ * and by @dh in the vertical direction, while keeping the center
-+ * of @r stationary.
-+ *
-+ * Positive @dw and @dh increase the size, negative values decrease it.
-+ */
-+static inline void drm_rect_adjust_size(struct drm_rect *r, int dw, int dh)
-+{
-+	r->x1 -= dw >> 1;
-+	r->y1 -= dh >> 1;
-+	r->x2 += (dw + 1) >> 1;
-+	r->y2 += (dh + 1) >> 1;
-+}
-+
-+/**
-+ * drm_rect_translate - translate the rectangle
-+ * @r: rectangle to be tranlated
-+ * @dx: horizontal translation
-+ * @dy: vertical translation
-+ *
-+ * Move rectangle @r by @dx in the horizontal direction,
-+ * and by @dy in the vertical direction.
-+ */
-+static inline void drm_rect_translate(struct drm_rect *r, int dx, int dy)
-+{
-+	r->x1 += dx;
-+	r->y1 += dy;
-+	r->x2 += dx;
-+	r->y2 += dy;
-+}
-+
-+/**
-+ * drm_rect_downscale - downscale a rectangle
-+ * @r: rectangle to be downscaled
-+ * @horz: horizontal downscale factor
-+ * @vert: vertical downscale factor
-+ *
-+ * Divide the coordinates of rectangle @r by @horz and @vert.
-+ */
-+static inline void drm_rect_downscale(struct drm_rect *r, int horz, int vert)
-+{
-+	r->x1 /= horz;
-+	r->y1 /= vert;
-+	r->x2 /= horz;
-+	r->y2 /= vert;
-+}
-+
-+/**
-+ * drm_rect_width - determine the rectangle width
-+ * @r: rectangle whose width is returned
-+ *
-+ * RETURNS:
-+ * The width of the rectangle.
-+ */
-+static inline int drm_rect_width(const struct drm_rect *r)
-+{
-+	return r->x2 - r->x1;
-+}
-+
-+/**
-+ * drm_rect_height - determine the rectangle height
-+ * @r: rectangle whose height is returned
-+ *
-+ * RETURNS:
-+ * The height of the rectangle.
-+ */
-+static inline int drm_rect_height(const struct drm_rect *r)
-+{
-+	return r->y2 - r->y1;
-+}
-+
-+/**
-+ * drm_rect_visible - determine if the the rectangle is visible
-+ * @r: rectangle whose visibility is returned
-+ *
-+ * RETURNS:
-+ * %true if the rectangle is visible, %false otherwise.
-+ */
-+static inline bool drm_rect_visible(const struct drm_rect *r)
-+{
-+	return drm_rect_width(r) > 0 && drm_rect_height(r) > 0;
-+}
-+
-+bool drm_rect_intersect(struct drm_rect *r, const struct drm_rect *clip);
-+bool drm_rect_clip_scaled(struct drm_rect *src, struct drm_rect *dst,
-+			  const struct drm_rect *clip,
-+			  int hscale, int vscale);
-+
-+#endif
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0099-drm-Add-drm_rect_calc_-hscale-vscale-utility-functio.patch b/patches.baytrail/0099-drm-Add-drm_rect_calc_-hscale-vscale-utility-functio.patch
deleted file mode 100644
index 5c32ac65da8ee..0000000000000
--- a/patches.baytrail/0099-drm-Add-drm_rect_calc_-hscale-vscale-utility-functio.patch
+++ /dev/null
@@ -1,243 +0,0 @@
-From c0ef841ef98c806b25480895da604d30a60a34fe Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Wed, 24 Apr 2013 18:52:35 +0300
-Subject: drm: Add drm_rect_calc_{hscale, vscale}() utility functions
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-These functions calculate the scaling factor based on the source and
-destination rectangles.
-
-There are two version of the functions, the strict ones that will
-return an error if the min/max scaling factor is exceeded, and the
-relaxed versions that will adjust the src/dst rectangles in order to
-keep the scaling factor withing the limits.
-
-v2: Return error instead of adjusting regions, refactor common parts
-    into one function, and split into strict and relaxed versions.
-v3: Renamed drm_region to drm_rect, add "_rect_" to the function
-    names.
-v4: Fix "calculcate" typos
-
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Acked-by: Dave Airlie <airlied@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 4954c4282f6b945f1dd5716f92b594a07fa4ffe3)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_rect.c | 177 +++++++++++++++++++++++++++++++++++++++++++++
- include/drm/drm_rect.h     |  12 +++
- 2 files changed, 189 insertions(+)
-
-diff --git a/drivers/gpu/drm/drm_rect.c b/drivers/gpu/drm/drm_rect.c
-index 22091ecdbff4..dc11a2867f20 100644
---- a/drivers/gpu/drm/drm_rect.c
-+++ b/drivers/gpu/drm/drm_rect.c
-@@ -94,3 +94,180 @@ bool drm_rect_clip_scaled(struct drm_rect *src, struct drm_rect *dst,
- 	return drm_rect_intersect(dst, clip);
- }
- EXPORT_SYMBOL(drm_rect_clip_scaled);
-+
-+static int drm_calc_scale(int src, int dst)
-+{
-+	int scale = 0;
-+
-+	if (src < 0 || dst < 0)
-+		return -EINVAL;
-+
-+	if (dst == 0)
-+		return 0;
-+
-+	scale = src / dst;
-+
-+	return scale;
-+}
-+
-+/**
-+ * drm_rect_calc_hscale - calculate the horizontal scaling factor
-+ * @src: source window rectangle
-+ * @dst: destination window rectangle
-+ * @min_hscale: minimum allowed horizontal scaling factor
-+ * @max_hscale: maximum allowed horizontal scaling factor
-+ *
-+ * Calculate the horizontal scaling factor as
-+ * (@src width) / (@dst width).
-+ *
-+ * RETURNS:
-+ * The horizontal scaling factor, or errno of out of limits.
-+ */
-+int drm_rect_calc_hscale(const struct drm_rect *src,
-+			 const struct drm_rect *dst,
-+			 int min_hscale, int max_hscale)
-+{
-+	int src_w = drm_rect_width(src);
-+	int dst_w = drm_rect_width(dst);
-+	int hscale = drm_calc_scale(src_w, dst_w);
-+
-+	if (hscale < 0 || dst_w == 0)
-+		return hscale;
-+
-+	if (hscale < min_hscale || hscale > max_hscale)
-+		return -ERANGE;
-+
-+	return hscale;
-+}
-+EXPORT_SYMBOL(drm_rect_calc_hscale);
-+
-+/**
-+ * drm_rect_calc_vscale - calculate the vertical scaling factor
-+ * @src: source window rectangle
-+ * @dst: destination window rectangle
-+ * @min_vscale: minimum allowed vertical scaling factor
-+ * @max_vscale: maximum allowed vertical scaling factor
-+ *
-+ * Calculate the vertical scaling factor as
-+ * (@src height) / (@dst height).
-+ *
-+ * RETURNS:
-+ * The vertical scaling factor, or errno of out of limits.
-+ */
-+int drm_rect_calc_vscale(const struct drm_rect *src,
-+			 const struct drm_rect *dst,
-+			 int min_vscale, int max_vscale)
-+{
-+	int src_h = drm_rect_height(src);
-+	int dst_h = drm_rect_height(dst);
-+	int vscale = drm_calc_scale(src_h, dst_h);
-+
-+	if (vscale < 0 || dst_h == 0)
-+		return vscale;
-+
-+	if (vscale < min_vscale || vscale > max_vscale)
-+		return -ERANGE;
-+
-+	return vscale;
-+}
-+EXPORT_SYMBOL(drm_rect_calc_vscale);
-+
-+/**
-+ * drm_calc_hscale_relaxed - calculate the horizontal scaling factor
-+ * @src: source window rectangle
-+ * @dst: destination window rectangle
-+ * @min_hscale: minimum allowed horizontal scaling factor
-+ * @max_hscale: maximum allowed horizontal scaling factor
-+ *
-+ * Calculate the horizontal scaling factor as
-+ * (@src width) / (@dst width).
-+ *
-+ * If the calculated scaling factor is below @min_vscale,
-+ * decrease the height of rectangle @dst to compensate.
-+ *
-+ * If the calculated scaling factor is above @max_vscale,
-+ * decrease the height of rectangle @src to compensate.
-+ *
-+ * RETURNS:
-+ * The horizontal scaling factor.
-+ */
-+int drm_rect_calc_hscale_relaxed(struct drm_rect *src,
-+				 struct drm_rect *dst,
-+				 int min_hscale, int max_hscale)
-+{
-+	int src_w = drm_rect_width(src);
-+	int dst_w = drm_rect_width(dst);
-+	int hscale = drm_calc_scale(src_w, dst_w);
-+
-+	if (hscale < 0 || dst_w == 0)
-+		return hscale;
-+
-+	if (hscale < min_hscale) {
-+		int max_dst_w = src_w / min_hscale;
-+
-+		drm_rect_adjust_size(dst, max_dst_w - dst_w, 0);
-+
-+		return min_hscale;
-+	}
-+
-+	if (hscale > max_hscale) {
-+		int max_src_w = dst_w * max_hscale;
-+
-+		drm_rect_adjust_size(src, max_src_w - src_w, 0);
-+
-+		return max_hscale;
-+	}
-+
-+	return hscale;
-+}
-+EXPORT_SYMBOL(drm_rect_calc_hscale_relaxed);
-+
-+/**
-+ * drm_rect_calc_vscale_relaxed - calculate the vertical scaling factor
-+ * @src: source window rectangle
-+ * @dst: destination window rectangle
-+ * @min_vscale: minimum allowed vertical scaling factor
-+ * @max_vscale: maximum allowed vertical scaling factor
-+ *
-+ * Calculate the vertical scaling factor as
-+ * (@src height) / (@dst height).
-+ *
-+ * If the calculated scaling factor is below @min_vscale,
-+ * decrease the height of rectangle @dst to compensate.
-+ *
-+ * If the calculated scaling factor is above @max_vscale,
-+ * decrease the height of rectangle @src to compensate.
-+ *
-+ * RETURNS:
-+ * The vertical scaling factor.
-+ */
-+int drm_rect_calc_vscale_relaxed(struct drm_rect *src,
-+				 struct drm_rect *dst,
-+				 int min_vscale, int max_vscale)
-+{
-+	int src_h = drm_rect_height(src);
-+	int dst_h = drm_rect_height(dst);
-+	int vscale = drm_calc_scale(src_h, dst_h);
-+
-+	if (vscale < 0 || dst_h == 0)
-+		return vscale;
-+
-+	if (vscale < min_vscale) {
-+		int max_dst_h = src_h / min_vscale;
-+
-+		drm_rect_adjust_size(dst, 0, max_dst_h - dst_h);
-+
-+		return min_vscale;
-+	}
-+
-+	if (vscale > max_vscale) {
-+		int max_src_h = dst_h * max_vscale;
-+
-+		drm_rect_adjust_size(src, 0, max_src_h - src_h);
-+
-+		return max_vscale;
-+	}
-+
-+	return vscale;
-+}
-+EXPORT_SYMBOL(drm_rect_calc_vscale_relaxed);
-diff --git a/include/drm/drm_rect.h b/include/drm/drm_rect.h
-index 2b7278c1bc42..de24f16a3c4f 100644
---- a/include/drm/drm_rect.h
-+++ b/include/drm/drm_rect.h
-@@ -128,5 +128,17 @@ bool drm_rect_intersect(struct drm_rect *r, const struct drm_rect *clip);
- bool drm_rect_clip_scaled(struct drm_rect *src, struct drm_rect *dst,
- 			  const struct drm_rect *clip,
- 			  int hscale, int vscale);
-+int drm_rect_calc_hscale(const struct drm_rect *src,
-+			 const struct drm_rect *dst,
-+			 int min_hscale, int max_hscale);
-+int drm_rect_calc_vscale(const struct drm_rect *src,
-+			 const struct drm_rect *dst,
-+			 int min_vscale, int max_vscale);
-+int drm_rect_calc_hscale_relaxed(struct drm_rect *src,
-+				 struct drm_rect *dst,
-+				 int min_hscale, int max_hscale);
-+int drm_rect_calc_vscale_relaxed(struct drm_rect *src,
-+				 struct drm_rect *dst,
-+				 int min_vscale, int max_vscale);
- 
- #endif
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0100-drm-Add-drm_rect_debug_print.patch b/patches.baytrail/0100-drm-Add-drm_rect_debug_print.patch
deleted file mode 100644
index c42836be057e0..0000000000000
--- a/patches.baytrail/0100-drm-Add-drm_rect_debug_print.patch
+++ /dev/null
@@ -1,76 +0,0 @@
-From 56af839c13bd5e918dfbb2e6e6406fa08c5d5544 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Wed, 24 Apr 2013 18:52:36 +0300
-Subject: drm: Add drm_rect_debug_print()
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Add a debug function to print the rectangle in a human readable format.
-
-v2: Renamed drm_region to drm_rect, the function from drm_region_debug
-    to drm_rect_debug_print(), and use %+d instead of +%d in the format.
-v3: Use %d format for width/height in the non fixed point case as well
-
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Acked-by: Dave Airlie <airlied@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit e7272df342ba337e87e210470bb93d97d192f2e0)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_rect.c | 22 ++++++++++++++++++++++
- include/drm/drm_rect.h     |  1 +
- 2 files changed, 23 insertions(+)
-
-diff --git a/drivers/gpu/drm/drm_rect.c b/drivers/gpu/drm/drm_rect.c
-index dc11a2867f20..7047ca025787 100644
---- a/drivers/gpu/drm/drm_rect.c
-+++ b/drivers/gpu/drm/drm_rect.c
-@@ -24,6 +24,7 @@
- #include <linux/errno.h>
- #include <linux/export.h>
- #include <linux/kernel.h>
-+#include <drm/drmP.h>
- #include <drm/drm_rect.h>
- 
- /**
-@@ -271,3 +272,24 @@ int drm_rect_calc_vscale_relaxed(struct drm_rect *src,
- 	return vscale;
- }
- EXPORT_SYMBOL(drm_rect_calc_vscale_relaxed);
-+
-+/**
-+ * drm_rect_debug_print - print the rectangle information
-+ * @r: rectangle to print
-+ * @fixed_point: rectangle is in 16.16 fixed point format
-+ */
-+void drm_rect_debug_print(const struct drm_rect *r, bool fixed_point)
-+{
-+	int w = drm_rect_width(r);
-+	int h = drm_rect_height(r);
-+
-+	if (fixed_point)
-+		DRM_DEBUG_KMS("%d.%06ux%d.%06u%+d.%06u%+d.%06u\n",
-+			      w >> 16, ((w & 0xffff) * 15625) >> 10,
-+			      h >> 16, ((h & 0xffff) * 15625) >> 10,
-+			      r->x1 >> 16, ((r->x1 & 0xffff) * 15625) >> 10,
-+			      r->y1 >> 16, ((r->y1 & 0xffff) * 15625) >> 10);
-+	else
-+		DRM_DEBUG_KMS("%dx%d%+d%+d\n", w, h, r->x1, r->y1);
-+}
-+EXPORT_SYMBOL(drm_rect_debug_print);
-diff --git a/include/drm/drm_rect.h b/include/drm/drm_rect.h
-index de24f16a3c4f..fe767b757c8c 100644
---- a/include/drm/drm_rect.h
-+++ b/include/drm/drm_rect.h
-@@ -140,5 +140,6 @@ int drm_rect_calc_hscale_relaxed(struct drm_rect *src,
- int drm_rect_calc_vscale_relaxed(struct drm_rect *src,
- 				 struct drm_rect *dst,
- 				 int min_vscale, int max_vscale);
-+void drm_rect_debug_print(const struct drm_rect *r, bool fixed_point);
- 
- #endif
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0101-drm-Add-drm_rect_equals.patch b/patches.baytrail/0101-drm-Add-drm_rect_equals.patch
deleted file mode 100644
index b4d0f6fea8fc2..0000000000000
--- a/patches.baytrail/0101-drm-Add-drm_rect_equals.patch
+++ /dev/null
@@ -1,49 +0,0 @@
-From c8d54d7f83ac5816b2533468745e1eff6e61c84f Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Wed, 24 Apr 2013 18:52:37 +0300
-Subject: drm: Add drm_rect_equals()
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-drm_rect_equals() tells whether two drm_rects are equal.
-
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Acked-by: Dave Airlie <airlied@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 0894c96bff762d0474a8722bba3d420f643db359)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- include/drm/drm_rect.h | 15 +++++++++++++++
- 1 file changed, 15 insertions(+)
-
-diff --git a/include/drm/drm_rect.h b/include/drm/drm_rect.h
-index fe767b757c8c..64fa265c6ffb 100644
---- a/include/drm/drm_rect.h
-+++ b/include/drm/drm_rect.h
-@@ -124,6 +124,21 @@ static inline bool drm_rect_visible(const struct drm_rect *r)
- 	return drm_rect_width(r) > 0 && drm_rect_height(r) > 0;
- }
- 
-+/**
-+ * drm_rect_equals - determine if two rectangles are equal
-+ * @r1: first rectangle
-+ * @r2: second rectangle
-+ *
-+ * RETURNS:
-+ * %true if the rectangles are equal, %false otherwise.
-+ */
-+static inline bool drm_rect_equals(const struct drm_rect *r1,
-+				   const struct drm_rect *r2)
-+{
-+	return r1->x1 == r2->x1 && r1->x2 == r2->x2 &&
-+		r1->y1 == r2->y1 && r1->y2 == r2->y2;
-+}
-+
- bool drm_rect_intersect(struct drm_rect *r, const struct drm_rect *clip);
- bool drm_rect_clip_scaled(struct drm_rect *src, struct drm_rect *dst,
- 			  const struct drm_rect *clip,
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0102-drm-i915-Implement-proper-clipping-for-video-sprites.patch b/patches.baytrail/0102-drm-i915-Implement-proper-clipping-for-video-sprites.patch
deleted file mode 100644
index 9a432b4611b66..0000000000000
--- a/patches.baytrail/0102-drm-i915-Implement-proper-clipping-for-video-sprites.patch
+++ /dev/null
@@ -1,314 +0,0 @@
-From 537809ef508043b78aa1476b199314793f665591 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Wed, 24 Apr 2013 18:52:38 +0300
-Subject: drm/i915: Implement proper clipping for video sprites
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Properly clip the source when the destination gets clipped
-by the pipe dimensions.
-
-Sadly the video sprite hardware is rather limited so it can't do proper
-sub-pixel postitioning. Resort to truncating the source coordinates to
-(macro)pixel boundary.
-
-The scaling checks are done using the strict drm_region functions.
-Which means that an error is returned when the min/max scaling
-ratios are exceeded.
-
-Also do some additional checking against various hardware limits.
-
-v2: Truncate src coords instead of rounding to avoid increasing src
-    viewport size, and adapt to changes in drm_calc_{h,v}scale().
-v3: Adapt to drm_region->drm_rect rename. Fix misaligned crtc_w for
-    packed YUV formats when scaling isn't supported.
-v4: Use stricter scaling checks, use drm_rect_equals()
-v5: If sprite is below min size, make it invisible instead returning
-    an error.
-    Use WARN_ON() instead if BUG_ON(), and add one to sanity check the
-    src viewport size.
-v6: Add comments to remind about src and dst coordinate types
-
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 1731693a5a372869d017e601a23b1ce2eb3135ed)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_sprite.c | 196 +++++++++++++++++++++++++++---------
- 1 file changed, 149 insertions(+), 47 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
-index 18993ad93540..87fe3b625c4b 100644
---- a/drivers/gpu/drm/i915/intel_sprite.c
-+++ b/drivers/gpu/drm/i915/intel_sprite.c
-@@ -32,6 +32,7 @@
- #include <drm/drmP.h>
- #include <drm/drm_crtc.h>
- #include <drm/drm_fourcc.h>
-+#include <drm/drm_rect.h>
- #include "intel_drv.h"
- #include <drm/i915_drm.h>
- #include "i915_drv.h"
-@@ -583,6 +584,20 @@ ilk_get_colorkey(struct drm_plane *plane, struct drm_intel_sprite_colorkey *key)
- 		key->flags = I915_SET_COLORKEY_NONE;
- }
- 
-+static bool
-+format_is_yuv(uint32_t format)
-+{
-+	switch (format) {
-+	case DRM_FORMAT_YUYV:
-+	case DRM_FORMAT_UYVY:
-+	case DRM_FORMAT_VYUY:
-+	case DRM_FORMAT_YVYU:
-+		return true;
-+	default:
-+		return false;
-+	}
-+}
-+
- static int
- intel_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
- 		   struct drm_framebuffer *fb, int crtc_x, int crtc_y,
-@@ -600,9 +615,29 @@ intel_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
- 	enum transcoder cpu_transcoder = intel_pipe_to_cpu_transcoder(dev_priv,
- 								      pipe);
- 	int ret = 0;
--	int x = src_x >> 16, y = src_y >> 16;
--	int primary_w = crtc->mode.hdisplay, primary_h = crtc->mode.vdisplay;
- 	bool disable_primary = false;
-+	bool visible;
-+	int hscale, vscale;
-+	int max_scale, min_scale;
-+	int pixel_size = drm_format_plane_cpp(fb->pixel_format, 0);
-+	struct drm_rect src = {
-+		/* sample coordinates in 16.16 fixed point */
-+		.x1 = src_x,
-+		.x2 = src_x + src_w,
-+		.y1 = src_y,
-+		.y2 = src_y + src_h,
-+	};
-+	struct drm_rect dst = {
-+		/* integer pixels */
-+		.x1 = crtc_x,
-+		.x2 = crtc_x + crtc_w,
-+		.y1 = crtc_y,
-+		.y2 = crtc_y + crtc_h,
-+	};
-+	const struct drm_rect clip = {
-+		.x2 = crtc->mode.hdisplay,
-+		.y2 = crtc->mode.vdisplay,
-+	};
- 
- 	intel_fb = to_intel_framebuffer(fb);
- 	obj = intel_fb->obj;
-@@ -618,19 +653,23 @@ intel_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
- 	intel_plane->src_w = src_w;
- 	intel_plane->src_h = src_h;
- 
--	src_w = src_w >> 16;
--	src_h = src_h >> 16;
--
- 	/* Pipe must be running... */
--	if (!(I915_READ(PIPECONF(cpu_transcoder)) & PIPECONF_ENABLE))
-+	if (!(I915_READ(PIPECONF(cpu_transcoder)) & PIPECONF_ENABLE)) {
-+		DRM_DEBUG_KMS("Pipe disabled\n");
- 		return -EINVAL;
-+	}
- 
--	if (crtc_x >= primary_w || crtc_y >= primary_h)
-+	/* Don't modify another pipe's plane */
-+	if (intel_plane->pipe != intel_crtc->pipe) {
-+		DRM_DEBUG_KMS("Wrong plane <-> crtc mapping\n");
- 		return -EINVAL;
-+	}
- 
--	/* Don't modify another pipe's plane */
--	if (intel_plane->pipe != intel_crtc->pipe)
-+	/* FIXME check all gen limits */
-+	if (fb->width < 3 || fb->height < 3 || fb->pitches[0] > 16384) {
-+		DRM_DEBUG_KMS("Unsuitable framebuffer for plane\n");
- 		return -EINVAL;
-+	}
- 
- 	/* Sprite planes can be linear or x-tiled surfaces */
- 	switch (obj->tiling_mode) {
-@@ -638,55 +677,115 @@ intel_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
- 		case I915_TILING_X:
- 			break;
- 		default:
-+			DRM_DEBUG_KMS("Unsupported tiling mode\n");
- 			return -EINVAL;
- 	}
- 
--	/*
--	 * Clamp the width & height into the visible area.  Note we don't
--	 * try to scale the source if part of the visible region is offscreen.
--	 * The caller must handle that by adjusting source offset and size.
--	 */
--	if ((crtc_x < 0) && ((crtc_x + crtc_w) > 0)) {
--		crtc_w += crtc_x;
--		crtc_x = 0;
-+	max_scale = intel_plane->max_downscale << 16;
-+	min_scale = intel_plane->can_scale ? 1 : (1 << 16);
-+
-+	hscale = drm_rect_calc_hscale(&src, &dst, min_scale, max_scale);
-+	if (hscale < 0) {
-+		DRM_DEBUG_KMS("Horizontal scaling factor out of limits\n");
-+		drm_rect_debug_print(&src, true);
-+		drm_rect_debug_print(&dst, false);
-+
-+		return hscale;
- 	}
--	if ((crtc_x + crtc_w) <= 0) /* Nothing to display */
--		goto out;
--	if ((crtc_x + crtc_w) > primary_w)
--		crtc_w = primary_w - crtc_x;
- 
--	if ((crtc_y < 0) && ((crtc_y + crtc_h) > 0)) {
--		crtc_h += crtc_y;
--		crtc_y = 0;
-+	vscale = drm_rect_calc_vscale(&src, &dst, min_scale, max_scale);
-+	if (vscale < 0) {
-+		DRM_DEBUG_KMS("Vertical scaling factor out of limits\n");
-+		drm_rect_debug_print(&src, true);
-+		drm_rect_debug_print(&dst, false);
-+
-+		return vscale;
- 	}
--	if ((crtc_y + crtc_h) <= 0) /* Nothing to display */
--		goto out;
--	if (crtc_y + crtc_h > primary_h)
--		crtc_h = primary_h - crtc_y;
- 
--	if (!crtc_w || !crtc_h) /* Again, nothing to display */
--		goto out;
-+	visible = drm_rect_clip_scaled(&src, &dst, &clip, hscale, vscale);
- 
--	/*
--	 * We may not have a scaler, eg. HSW does not have it any more
--	 */
--	if (!intel_plane->can_scale && (crtc_w != src_w || crtc_h != src_h))
--		return -EINVAL;
-+	crtc_x = dst.x1;
-+	crtc_y = dst.y1;
-+	crtc_w = drm_rect_width(&dst);
-+	crtc_h = drm_rect_height(&dst);
- 
--	/*
--	 * We can take a larger source and scale it down, but
--	 * only so much...  16x is the max on SNB.
--	 */
--	if (((src_w * src_h) / (crtc_w * crtc_h)) > intel_plane->max_downscale)
--		return -EINVAL;
-+	if (visible) {
-+		/* Make the source viewport size an exact multiple of the scaling factors. */
-+		drm_rect_adjust_size(&src,
-+				     drm_rect_width(&dst) * hscale - drm_rect_width(&src),
-+				     drm_rect_height(&dst) * vscale - drm_rect_height(&src));
-+
-+		/* sanity check to make sure the src viewport wasn't enlarged */
-+		WARN_ON(src.x1 < (int) src_x ||
-+			src.y1 < (int) src_y ||
-+			src.x2 > (int) (src_x + src_w) ||
-+			src.y2 > (int) (src_y + src_h));
-+
-+		/*
-+		 * Hardware doesn't handle subpixel coordinates.
-+		 * Adjust to (macro)pixel boundary, but be careful not to
-+		 * increase the source viewport size, because that could
-+		 * push the downscaling factor out of bounds.
-+		 *
-+		 * FIXME Should we be really strict and reject the
-+		 * config if it results in non (macro)pixel aligned
-+		 * coords?
-+		 */
-+		src_x = src.x1 >> 16;
-+		src_w = drm_rect_width(&src) >> 16;
-+		src_y = src.y1 >> 16;
-+		src_h = drm_rect_height(&src) >> 16;
-+
-+		if (format_is_yuv(fb->pixel_format)) {
-+			src_x &= ~1;
-+			src_w &= ~1;
-+
-+			/*
-+			 * Must keep src and dst the
-+			 * same if we can't scale.
-+			 */
-+			if (!intel_plane->can_scale)
-+				crtc_w &= ~1;
-+
-+			if (crtc_w == 0)
-+				visible = false;
-+		}
-+	}
-+
-+	/* Check size restrictions when scaling */
-+	if (visible && (src_w != crtc_w || src_h != crtc_h)) {
-+		unsigned int width_bytes;
-+
-+		WARN_ON(!intel_plane->can_scale);
-+
-+		/* FIXME interlacing min height is 6 */
-+
-+		if (crtc_w < 3 || crtc_h < 3)
-+			visible = false;
-+
-+		if (src_w < 3 || src_h < 3)
-+			visible = false;
-+
-+		width_bytes = ((src_x * pixel_size) & 63) + src_w * pixel_size;
-+
-+		if (src_w > 2048 || src_h > 2048 ||
-+		    width_bytes > 4096 || fb->pitches[0] > 4096) {
-+			DRM_DEBUG_KMS("Source dimensions exceed hardware limits\n");
-+			return -EINVAL;
-+		}
-+	}
-+
-+	dst.x1 = crtc_x;
-+	dst.x2 = crtc_x + crtc_w;
-+	dst.y1 = crtc_y;
-+	dst.y2 = crtc_y + crtc_h;
- 
- 	/*
- 	 * If the sprite is completely covering the primary plane,
- 	 * we can disable the primary and save power.
- 	 */
--	if ((crtc_x == 0) && (crtc_y == 0) &&
--	    (crtc_w == primary_w) && (crtc_h == primary_h))
--		disable_primary = true;
-+	disable_primary = drm_rect_equals(&dst, &clip);
-+	WARN_ON(disable_primary && !visible);
- 
- 	mutex_lock(&dev->struct_mutex);
- 
-@@ -708,8 +807,12 @@ intel_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
- 	if (!disable_primary)
- 		intel_enable_primary(crtc);
- 
--	intel_plane->update_plane(plane, fb, obj, crtc_x, crtc_y,
--				  crtc_w, crtc_h, x, y, src_w, src_h);
-+	if (visible)
-+		intel_plane->update_plane(plane, fb, obj,
-+					  crtc_x, crtc_y, crtc_w, crtc_h,
-+					  src_x, src_y, src_w, src_h);
-+	else
-+		intel_plane->disable_plane(plane);
- 
- 	if (disable_primary)
- 		intel_disable_primary(crtc);
-@@ -732,7 +835,6 @@ intel_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
- 
- out_unlock:
- 	mutex_unlock(&dev->struct_mutex);
--out:
- 	return ret;
- }
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0103-drm-i915-Relax-the-sprite-scaling-limits-checks.patch b/patches.baytrail/0103-drm-i915-Relax-the-sprite-scaling-limits-checks.patch
deleted file mode 100644
index 66782a65287e3..0000000000000
--- a/patches.baytrail/0103-drm-i915-Relax-the-sprite-scaling-limits-checks.patch
+++ /dev/null
@@ -1,102 +0,0 @@
-From d95b4ac7dbdf760f0e9008692771f6da34a05200 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Wed, 24 Apr 2013 18:52:39 +0300
-Subject: drm/i915: Relax the sprite scaling limits checks
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Reduce the size of the the src/dst viewport to keep the scalign ratios
-in check.
-
-v2: Below min size sprite handling squashed to previous patch
-
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 3c3686cd9700efefcfc24ab5910b3e5fffd0b069)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_sprite.c | 48 +++++++++++++++++++++----------------
- 1 file changed, 28 insertions(+), 20 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
-index 87fe3b625c4b..19b9cb961b5a 100644
---- a/drivers/gpu/drm/i915/intel_sprite.c
-+++ b/drivers/gpu/drm/i915/intel_sprite.c
-@@ -681,26 +681,19 @@ intel_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
- 			return -EINVAL;
- 	}
- 
-+	/*
-+	 * FIXME the following code does a bunch of fuzzy adjustments to the
-+	 * coordinates and sizes. We probably need some way to decide whether
-+	 * more strict checking should be done instead.
-+	 */
- 	max_scale = intel_plane->max_downscale << 16;
- 	min_scale = intel_plane->can_scale ? 1 : (1 << 16);
- 
--	hscale = drm_rect_calc_hscale(&src, &dst, min_scale, max_scale);
--	if (hscale < 0) {
--		DRM_DEBUG_KMS("Horizontal scaling factor out of limits\n");
--		drm_rect_debug_print(&src, true);
--		drm_rect_debug_print(&dst, false);
--
--		return hscale;
--	}
--
--	vscale = drm_rect_calc_vscale(&src, &dst, min_scale, max_scale);
--	if (vscale < 0) {
--		DRM_DEBUG_KMS("Vertical scaling factor out of limits\n");
--		drm_rect_debug_print(&src, true);
--		drm_rect_debug_print(&dst, false);
-+	hscale = drm_rect_calc_hscale_relaxed(&src, &dst, min_scale, max_scale);
-+	BUG_ON(hscale < 0);
- 
--		return vscale;
--	}
-+	vscale = drm_rect_calc_vscale_relaxed(&src, &dst, min_scale, max_scale);
-+	BUG_ON(vscale < 0);
- 
- 	visible = drm_rect_clip_scaled(&src, &dst, &clip, hscale, vscale);
- 
-@@ -710,6 +703,25 @@ intel_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
- 	crtc_h = drm_rect_height(&dst);
- 
- 	if (visible) {
-+		/* check again in case clipping clamped the results */
-+		hscale = drm_rect_calc_hscale(&src, &dst, min_scale, max_scale);
-+		if (hscale < 0) {
-+			DRM_DEBUG_KMS("Horizontal scaling factor out of limits\n");
-+			drm_rect_debug_print(&src, true);
-+			drm_rect_debug_print(&dst, false);
-+
-+			return hscale;
-+		}
-+
-+		vscale = drm_rect_calc_vscale(&src, &dst, min_scale, max_scale);
-+		if (vscale < 0) {
-+			DRM_DEBUG_KMS("Vertical scaling factor out of limits\n");
-+			drm_rect_debug_print(&src, true);
-+			drm_rect_debug_print(&dst, false);
-+
-+			return vscale;
-+		}
-+
- 		/* Make the source viewport size an exact multiple of the scaling factors. */
- 		drm_rect_adjust_size(&src,
- 				     drm_rect_width(&dst) * hscale - drm_rect_width(&src),
-@@ -726,10 +738,6 @@ intel_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
- 		 * Adjust to (macro)pixel boundary, but be careful not to
- 		 * increase the source viewport size, because that could
- 		 * push the downscaling factor out of bounds.
--		 *
--		 * FIXME Should we be really strict and reject the
--		 * config if it results in non (macro)pixel aligned
--		 * coords?
- 		 */
- 		src_x = src.x1 >> 16;
- 		src_w = drm_rect_width(&src) >> 16;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0104-drm-i915-reference-count-for-i915_hw_contexts.patch b/patches.baytrail/0104-drm-i915-reference-count-for-i915_hw_contexts.patch
deleted file mode 100644
index 8858591470218..0000000000000
--- a/patches.baytrail/0104-drm-i915-reference-count-for-i915_hw_contexts.patch
+++ /dev/null
@@ -1,171 +0,0 @@
-From 17d24d1cad976e85136fb806d891f01dabd90824 Mon Sep 17 00:00:00 2001
-From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
-Date: Tue, 30 Apr 2013 13:30:33 +0300
-Subject: drm/i915: reference count for i915_hw_contexts
-
-Enabling PPGTT and also the need to track which context was guilty of
-gpu hang (arb robustness enabling) have put pressure for struct i915_hw_context
-to be more than just a placeholder for hw context state.
-
-In order to track object lifetime properly in a multi peer usage, add reference
-counting for i915_hw_context.
-
-v2: track i915_hw_context pointers instead of using ctx_ids
-(from Chris Wilson)
-
-v3 (Ben): Get rid of do_release() and handle refcounting more compactly.
-(recommended by Chis)
-
-v4: kref_* put inside static inlines (Daniel Vetter)
-remove code duplication on freeing context (Chris Wilson)
-
-v5: idr_remove and ctx->file_priv = NULL in destroy ioctl (Chris)
-This actually will cause a problem if one destroys a context and later
-refers to the idea of the context (multiple contexts may have the same
-id, but only 1 will exist in the idr).
-
-v6: Strip out the request related stuff. Reworded commit message.
-Got rid of do_destroy and introduced i915_gem_context_release_handle,
-suggested by Chris Wilson.
-
-v7: idr_remove can't be called inside idr_for_each (Chris Wilson)
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net> (v5)
-Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com> (v7)
-Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-[danvet: Squash sob lines, the patch ping-ponged between Ben and Mika
-a bit ...]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit dce3271b1ee05ca01ebdde50d613d7b33ef178a9)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h         |   12 ++++++++++++
- drivers/gpu/drm/i915/i915_gem_context.c |   28 ++++++++++++++--------------
- 2 files changed, 26 insertions(+), 14 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -452,6 +452,7 @@ struct i915_hw_ppgtt {
- /* This must match up with the value previously used for execbuf2.rsvd1. */
- #define DEFAULT_CONTEXT_ID 0
- struct i915_hw_context {
-+	struct kref ref;
- 	int id;
- 	bool is_initialized;
- 	struct drm_i915_file_private *file_priv;
-@@ -1701,6 +1702,17 @@ void i915_gem_context_fini(struct drm_de
- void i915_gem_context_close(struct drm_device *dev, struct drm_file *file);
- int i915_switch_context(struct intel_ring_buffer *ring,
- 			struct drm_file *file, int to_id);
-+void i915_gem_context_free(struct kref *ctx_ref);
-+static inline void i915_gem_context_reference(struct i915_hw_context *ctx)
-+{
-+	kref_get(&ctx->ref);
-+}
-+
-+static inline void i915_gem_context_unreference(struct i915_hw_context *ctx)
-+{
-+	kref_put(&ctx->ref, i915_gem_context_free);
-+}
-+
- int i915_gem_context_create_ioctl(struct drm_device *dev, void *data,
- 				  struct drm_file *file);
- int i915_gem_context_destroy_ioctl(struct drm_device *dev, void *data,
---- a/drivers/gpu/drm/i915/i915_gem_context.c
-+++ b/drivers/gpu/drm/i915/i915_gem_context.c
-@@ -124,10 +124,10 @@ static int get_context_size(struct drm_d
- 	return ret;
- }
- 
--static void do_destroy(struct i915_hw_context *ctx)
-+void i915_gem_context_free(struct kref *ctx_ref)
- {
--	if (ctx->file_priv)
--		idr_remove(&ctx->file_priv->context_idr, ctx->id);
-+	struct i915_hw_context *ctx = container_of(ctx_ref,
-+						   typeof(*ctx), ref);
- 
- 	drm_gem_object_unreference(&ctx->obj->base);
- 	kfree(ctx);
-@@ -145,6 +145,7 @@ create_hw_context(struct drm_device *dev
- 	if (ctx == NULL)
- 		return ERR_PTR(-ENOMEM);
- 
-+	kref_init(&ctx->ref);
- 	ctx->obj = i915_gem_alloc_object(dev, dev_priv->hw_context_size);
- 	if (ctx->obj == NULL) {
- 		kfree(ctx);
-@@ -169,18 +170,18 @@ create_hw_context(struct drm_device *dev
- 	if (file_priv == NULL)
- 		return ctx;
- 
--	ctx->file_priv = file_priv;
--
- 	ret = idr_alloc(&file_priv->context_idr, ctx, DEFAULT_CONTEXT_ID + 1, 0,
- 			GFP_KERNEL);
- 	if (ret < 0)
- 		goto err_out;
-+
-+	ctx->file_priv = file_priv;
- 	ctx->id = ret;
- 
- 	return ctx;
- 
- err_out:
--	do_destroy(ctx);
-+	i915_gem_context_unreference(ctx);
- 	return ERR_PTR(ret);
- }
- 
-@@ -226,7 +227,7 @@ static int create_default_context(struct
- err_unpin:
- 	i915_gem_object_unpin(ctx->obj);
- err_destroy:
--	do_destroy(ctx);
-+	i915_gem_context_unreference(ctx);
- 	return ret;
- }
- 
-@@ -262,6 +263,7 @@ void i915_gem_context_init(struct drm_de
- void i915_gem_context_fini(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct i915_hw_context *dctx = dev_priv->ring[RCS].default_context;
- 
- 	if (dev_priv->hw_contexts_disabled)
- 		return;
-@@ -271,9 +273,8 @@ void i915_gem_context_fini(struct drm_de
- 	 * other code, leading to spurious errors. */
- 	intel_gpu_reset(dev);
- 
--	i915_gem_object_unpin(dev_priv->ring[RCS].default_context->obj);
--
--	do_destroy(dev_priv->ring[RCS].default_context);
-+	i915_gem_object_unpin(dctx->obj);
-+	i915_gem_context_unreference(dctx);
- }
- 
- static int context_idr_cleanup(int id, void *p, void *data)
-@@ -282,8 +283,7 @@ static int context_idr_cleanup(int id, v
- 
- 	BUG_ON(id == DEFAULT_CONTEXT_ID);
- 
--	do_destroy(ctx);
--
-+	i915_gem_context_unreference(ctx);
- 	return 0;
- }
- 
-@@ -510,8 +510,8 @@ int i915_gem_context_destroy_ioctl(struc
- 		return -ENOENT;
- 	}
- 
--	do_destroy(ctx);
--
-+	idr_remove(&ctx->file_priv->context_idr, ctx->id);
-+	i915_gem_context_unreference(ctx);
- 	mutex_unlock(&dev->struct_mutex);
- 
- 	DRM_DEBUG_DRIVER("HW context %d destroyed\n", args->ctx_id);
diff --git a/patches.baytrail/0105-drm-i915-simplify-DP-DDI-port-width-macros.patch b/patches.baytrail/0105-drm-i915-simplify-DP-DDI-port-width-macros.patch
deleted file mode 100644
index fc323d6c45bf1..0000000000000
--- a/patches.baytrail/0105-drm-i915-simplify-DP-DDI-port-width-macros.patch
+++ /dev/null
@@ -1,132 +0,0 @@
-From cd360890c9138ab0b281ea33b43f832a7a298393 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Tue, 30 Apr 2013 14:01:40 +0200
-Subject: drm/i915: simplify DP/DDI port width macros
-
-If we ever leak a non-DP compliant port width through here, we have a
-pretty serious issue. So just rip out all these WARNs - if we need
-them it's probably better to have them at a central place where we
-compute the dp lane count.
-
-Also use the new DDI width macro for FDI mode.
-
-Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-[danvet: fixup the embarrassing s/intel_dp->DP/temp/ mistake Paulo
-spotted.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 17aa6be9579eb204b426eeae146a43bf3dd05078)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_reg.h  |   11 ++---------
- drivers/gpu/drm/i915/intel_ddi.c |   34 ++--------------------------------
- drivers/gpu/drm/i915/intel_dp.c  |   12 +-----------
- 3 files changed, 5 insertions(+), 52 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -2672,9 +2672,7 @@
- #define   DP_PRE_EMPHASIS_SHIFT		22
- 
- /* How many wires to use. I guess 3 was too hard */
--#define   DP_PORT_WIDTH_1		(0 << 19)
--#define   DP_PORT_WIDTH_2		(1 << 19)
--#define   DP_PORT_WIDTH_4		(3 << 19)
-+#define   DP_PORT_WIDTH(width)		(((width) - 1) << 19)
- #define   DP_PORT_WIDTH_MASK		(7 << 19)
- 
- /* Mystic DPCD version 1.1 special mode */
-@@ -4759,9 +4757,6 @@
- #define  TRANS_DDI_EDP_INPUT_B_ONOFF	(5<<12)
- #define  TRANS_DDI_EDP_INPUT_C_ONOFF	(6<<12)
- #define  TRANS_DDI_BFI_ENABLE		(1<<4)
--#define  TRANS_DDI_PORT_WIDTH_X1	(0<<1)
--#define  TRANS_DDI_PORT_WIDTH_X2	(1<<1)
--#define  TRANS_DDI_PORT_WIDTH_X4	(3<<1)
- 
- /* DisplayPort Transport Control */
- #define DP_TP_CTL_A			0x64040
-@@ -4805,9 +4800,7 @@
- #define  DDI_BUF_PORT_REVERSAL			(1<<16)
- #define  DDI_BUF_IS_IDLE			(1<<7)
- #define  DDI_A_4_LANES				(1<<4)
--#define  DDI_PORT_WIDTH_X1			(0<<1)
--#define  DDI_PORT_WIDTH_X2			(1<<1)
--#define  DDI_PORT_WIDTH_X4			(3<<1)
-+#define  DDI_PORT_WIDTH(width)			(((width) - 1) << 1)
- #define  DDI_INIT_DISPLAY_DETECTED		(1<<0)
- 
- /* DDI Buffer Translations */
---- a/drivers/gpu/drm/i915/intel_ddi.c
-+++ b/drivers/gpu/drm/i915/intel_ddi.c
-@@ -687,22 +687,7 @@ static void intel_ddi_mode_set(struct dr
- 
- 		intel_dp->DP = intel_dig_port->saved_port_bits |
- 			       DDI_BUF_CTL_ENABLE | DDI_BUF_EMP_400MV_0DB_HSW;
--		switch (intel_dp->lane_count) {
--		case 1:
--			intel_dp->DP |= DDI_PORT_WIDTH_X1;
--			break;
--		case 2:
--			intel_dp->DP |= DDI_PORT_WIDTH_X2;
--			break;
--		case 4:
--			intel_dp->DP |= DDI_PORT_WIDTH_X4;
--			break;
--		default:
--			intel_dp->DP |= DDI_PORT_WIDTH_X4;
--			WARN(1, "Unexpected DP lane count %d\n",
--			     intel_dp->lane_count);
--			break;
--		}
-+		intel_dp->DP |= DDI_PORT_WIDTH(intel_dp->lane_count);
- 
- 		if (intel_dp->has_audio) {
- 			DRM_DEBUG_DRIVER("DP audio on pipe %c on DDI\n",
-@@ -1031,22 +1016,7 @@ void intel_ddi_enable_transcoder_func(st
- 
- 		temp |= TRANS_DDI_MODE_SELECT_DP_SST;
- 
--		switch (intel_dp->lane_count) {
--		case 1:
--			temp |= TRANS_DDI_PORT_WIDTH_X1;
--			break;
--		case 2:
--			temp |= TRANS_DDI_PORT_WIDTH_X2;
--			break;
--		case 4:
--			temp |= TRANS_DDI_PORT_WIDTH_X4;
--			break;
--		default:
--			temp |= TRANS_DDI_PORT_WIDTH_X4;
--			WARN(1, "Unsupported lane count %d\n",
--			     intel_dp->lane_count);
--		}
--
-+		temp |= DDI_PORT_WIDTH(intel_dp->lane_count);
- 	} else {
- 		WARN(1, "Invalid encoder type %d for pipe %c\n",
- 		     intel_encoder->type, pipe_name(pipe));
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -901,18 +901,8 @@ intel_dp_mode_set(struct drm_encoder *en
- 
- 	/* Handle DP bits in common between all three register formats */
- 	intel_dp->DP |= DP_VOLTAGE_0_4 | DP_PRE_EMPHASIS_0;
-+	intel_dp->DP |= DP_PORT_WIDTH(intel_dp->lane_count);
- 
--	switch (intel_dp->lane_count) {
--	case 1:
--		intel_dp->DP |= DP_PORT_WIDTH_1;
--		break;
--	case 2:
--		intel_dp->DP |= DP_PORT_WIDTH_2;
--		break;
--	case 4:
--		intel_dp->DP |= DP_PORT_WIDTH_4;
--		break;
--	}
- 	if (intel_dp->has_audio) {
- 		DRM_DEBUG_DRIVER("Enabling DP audio on pipe %c\n",
- 				 pipe_name(intel_crtc->pipe));
diff --git a/patches.baytrail/0106-drm-i915-unreference-default-context-on-module-unloa.patch b/patches.baytrail/0106-drm-i915-unreference-default-context-on-module-unloa.patch
deleted file mode 100644
index 6ddeea0ea526d..0000000000000
--- a/patches.baytrail/0106-drm-i915-unreference-default-context-on-module-unloa.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From e3b596e2379e1ee1cb7d9bc4ab69f4cedd10a9f3 Mon Sep 17 00:00:00 2001
-From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
-Date: Fri, 3 May 2013 16:29:08 +0300
-Subject: drm/i915: unreference default context on module unload
-
-Before module unload is called, gpu_idle() will switch
-to default context. This will increment ref count of base
-object as the default context is 'running' on module unload
-time. Unreference the drm object so that when context
-is freed, base object is freed as well.
-
-v2: added comment to explain the refcounts (Ben Widawsky)
-
-Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 168f83660211b9e059e3bc0638daaa01e9ea0b71)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem_context.c | 8 ++++++++
- 1 file changed, 8 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
-index 47ffea61c9fa..fa7d4a74af22 100644
---- a/drivers/gpu/drm/i915/i915_gem_context.c
-+++ b/drivers/gpu/drm/i915/i915_gem_context.c
-@@ -274,6 +274,14 @@ void i915_gem_context_fini(struct drm_device *dev)
- 	intel_gpu_reset(dev);
- 
- 	i915_gem_object_unpin(dctx->obj);
-+
-+	/* When default context is created and switched to, base object refcount
-+	 * will be 2 (+1 from object creation and +1 from do_switch()).
-+	 * i915_gem_context_fini() will be called after gpu_idle() has switched
-+	 * to default context. So we need to unreference the base object once
-+	 * to offset the do_switch part, so that i915_gem_context_unreference()
-+	 * can then free the base object correctly. */
-+	drm_gem_object_unreference(&dctx->obj->base);
- 	i915_gem_context_unreference(dctx);
- }
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0107-drm-i915-fix-Haswell-pfit-power-well-check-v2.patch b/patches.baytrail/0107-drm-i915-fix-Haswell-pfit-power-well-check-v2.patch
deleted file mode 100644
index 395bf545fa02a..0000000000000
--- a/patches.baytrail/0107-drm-i915-fix-Haswell-pfit-power-well-check-v2.patch
+++ /dev/null
@@ -1,48 +0,0 @@
-From a407105bbac2be1b34addecd46d8c2fa03c2e5ab Mon Sep 17 00:00:00 2001
-From: Jesse Barnes <jbarnes@virtuousgeek.org>
-Date: Thu, 2 May 2013 15:30:47 -0700
-Subject: drm/i915: fix Haswell pfit power well check v2
-
-We can't read the pfit regs if the power well is off, so use the cached
-value.
-
-v2: re-add lost comment (Jesse)
-    make sure the crtc using the fitter is actually enabled (Jesse)
-
-Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-[danvet: Drop now unused dev_priv, as spotted by Mika.]
-Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Tested-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 2b87f3b1bab1df814057ff551f4fc49c22a7fde9)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 3 +--
- 1 file changed, 1 insertion(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 5c89c0a293e5..d3c76234abda 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -5918,7 +5918,6 @@ static bool ironlake_get_pipe_config(struct intel_crtc *crtc,
- 
- static void haswell_modeset_global_resources(struct drm_device *dev)
- {
--	struct drm_i915_private *dev_priv = dev->dev_private;
- 	bool enable = false;
- 	struct intel_crtc *crtc;
- 	struct intel_encoder *encoder;
-@@ -5930,7 +5929,7 @@ static void haswell_modeset_global_resources(struct drm_device *dev)
- 		 * sequence that's not yet available. Just in case desktop eDP
- 		 * on PORT D is possible on haswell, too. */
- 		/* Even the eDP panel fitter is outside the always-on well. */
--		if (I915_READ(PF_WIN_SZ(crtc->pipe)))
-+		if (crtc->config.pch_pfit.size && crtc->base.enabled)
- 			enable = true;
- 	}
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0108-drm-i915-don-t-setup-hdmi-for-port-D-edp-in-ddi_init.patch b/patches.baytrail/0108-drm-i915-don-t-setup-hdmi-for-port-D-edp-in-ddi_init.patch
deleted file mode 100644
index b8919e9afb512..0000000000000
--- a/patches.baytrail/0108-drm-i915-don-t-setup-hdmi-for-port-D-edp-in-ddi_init.patch
+++ /dev/null
@@ -1,64 +0,0 @@
-From b2e4342340619e75727176da4002db22418a2d8d Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Wed, 10 Apr 2013 23:28:35 +0200
-Subject: drm/i915: don't setup hdmi for port D edp in ddi_init
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-dp_init_connector adjusts the encoder type if it is a eDP panel. Use
-that to decide whether we should set up a hdmi connector or not.
-
-To do so reorder the hdmi connector setup sequence in ddi_init a bit.
-
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 21a8e6a4853b2ed39fa4c5188a710f2cf1b92026)
-[dbasehore: Removed unused variable to solve conflict]
-Signed-off-by: Derek Basehore <dbasehore@chromium.org>
-
-Conflicts:
-	drivers/gpu/drm/i915/intel_ddi.c
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_ddi.c |   23 +++++++++++------------
- 1 file changed, 11 insertions(+), 12 deletions(-)
-
---- a/drivers/gpu/drm/i915/intel_ddi.c
-+++ b/drivers/gpu/drm/i915/intel_ddi.c
-@@ -1496,16 +1496,6 @@ void intel_ddi_init(struct drm_device *d
- 		return;
- 	}
- 
--	if (port != PORT_A) {
--		hdmi_connector = kzalloc(sizeof(struct intel_connector),
--					 GFP_KERNEL);
--		if (!hdmi_connector) {
--			kfree(dp_connector);
--			kfree(intel_dig_port);
--			return;
--		}
--	}
--
- 	intel_encoder = &intel_dig_port->base;
- 	encoder = &intel_encoder->base;
- 
-@@ -1533,7 +1523,16 @@ void intel_ddi_init(struct drm_device *d
- 	intel_encoder->cloneable = false;
- 	intel_encoder->hot_plug = intel_ddi_hot_plug;
- 
--	if (hdmi_connector)
--		intel_hdmi_init_connector(intel_dig_port, hdmi_connector);
- 	intel_dp_init_connector(intel_dig_port, dp_connector);
-+
-+	if (intel_encoder->type != INTEL_OUTPUT_EDP) {
-+		hdmi_connector = kzalloc(sizeof(struct intel_connector),
-+					 GFP_KERNEL);
-+		if (!hdmi_connector) {
-+			return;
-+		}
-+
-+		intel_dig_port->hdmi.hdmi_reg = DDI_BUF_CTL(port);
-+		intel_hdmi_init_connector(intel_dig_port, hdmi_connector);
-+	}
- }
diff --git a/patches.baytrail/0109-drm-i915-put-context-upon-switching.patch b/patches.baytrail/0109-drm-i915-put-context-upon-switching.patch
deleted file mode 100644
index d61ca23cbc9c3..0000000000000
--- a/patches.baytrail/0109-drm-i915-put-context-upon-switching.patch
+++ /dev/null
@@ -1,107 +0,0 @@
-From 0c39fc7722280edbc1ef64adceaaf9a644fe2a06 Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Thu, 2 May 2013 16:48:07 +0300
-Subject: drm/i915: put context upon switching
-
-In order to be notified of when the context and all of its associated
-objects is idle (for if the context maps to a ppgtt) we need a callback
-from the retire handler. We can arrange this by using the kref_get/put
-of the context for request tracking and by inserting a request to
-demarque the switch away from the old context.
-
-[Ben: fixed minor error to patch compile, AND s/last_context/from/]
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 112522f6789581824903f6f72082b5b841a7f0f9)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem_context.c |   37 ++++++++++++++++++++------------
- drivers/gpu/drm/i915/intel_ringbuffer.h |    2 -
- 2 files changed, 25 insertions(+), 14 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_gem_context.c
-+++ b/drivers/gpu/drm/i915/i915_gem_context.c
-@@ -359,13 +359,13 @@ mi_set_context(struct intel_ring_buffer
- static int do_switch(struct i915_hw_context *to)
- {
- 	struct intel_ring_buffer *ring = to->ring;
--	struct drm_i915_gem_object *from_obj = ring->last_context_obj;
-+	struct i915_hw_context *from = ring->last_context;
- 	u32 hw_flags = 0;
- 	int ret;
- 
--	BUG_ON(from_obj != NULL && from_obj->pin_count == 0);
-+	BUG_ON(from != NULL && from->obj != NULL && from->obj->pin_count == 0);
- 
--	if (from_obj == to->obj)
-+	if (from == to)
- 		return 0;
- 
- 	ret = i915_gem_object_pin(to->obj, CONTEXT_ALIGN, false, false);
-@@ -388,7 +388,7 @@ static int do_switch(struct i915_hw_cont
- 
- 	if (!to->is_initialized || is_default_context(to))
- 		hw_flags |= MI_RESTORE_INHIBIT;
--	else if (WARN_ON_ONCE(from_obj == to->obj)) /* not yet expected */
-+	else if (WARN_ON_ONCE(from == to)) /* not yet expected */
- 		hw_flags |= MI_FORCE_RESTORE;
- 
- 	ret = mi_set_context(ring, to, hw_flags);
-@@ -403,9 +403,9 @@ static int do_switch(struct i915_hw_cont
- 	 * is a bit suboptimal because the retiring can occur simply after the
- 	 * MI_SET_CONTEXT instead of when the next seqno has completed.
- 	 */
--	if (from_obj != NULL) {
--		from_obj->base.read_domains = I915_GEM_DOMAIN_INSTRUCTION;
--		i915_gem_object_move_to_active(from_obj, ring);
-+	if (from != NULL) {
-+		from->obj->base.read_domains = I915_GEM_DOMAIN_INSTRUCTION;
-+		i915_gem_object_move_to_active(from->obj, ring);
- 		/* As long as MI_SET_CONTEXT is serializing, ie. it flushes the
- 		 * whole damn pipeline, we don't need to explicitly mark the
- 		 * object dirty. The only exception is that the context must be
-@@ -413,15 +413,26 @@ static int do_switch(struct i915_hw_cont
- 		 * able to defer doing this until we know the object would be
- 		 * swapped, but there is no way to do that yet.
- 		 */
--		from_obj->dirty = 1;
--		BUG_ON(from_obj->ring != ring);
--		i915_gem_object_unpin(from_obj);
-+		from->obj->dirty = 1;
-+		BUG_ON(from->obj->ring != ring);
- 
--		drm_gem_object_unreference(&from_obj->base);
-+		ret = i915_add_request(ring, NULL, NULL);
-+		if (ret) {
-+			/* Too late, we've already scheduled a context switch.
-+			 * Try to undo the change so that the hw state is
-+			 * consistent with out tracking. In case of emergency,
-+			 * scream.
-+			 */
-+			WARN_ON(mi_set_context(ring, from, MI_RESTORE_INHIBIT));
-+			return ret;
-+		}
-+
-+		i915_gem_object_unpin(from->obj);
-+		i915_gem_context_unreference(from);
- 	}
- 
--	drm_gem_object_reference(&to->obj->base);
--	ring->last_context_obj = to->obj;
-+	i915_gem_context_reference(to);
-+	ring->last_context = to;
- 	to->is_initialized = true;
- 
- 	return 0;
---- a/drivers/gpu/drm/i915/intel_ringbuffer.h
-+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
-@@ -135,7 +135,7 @@ struct  intel_ring_buffer {
- 	 */
- 	bool itlb_before_ctx_switch;
- 	struct i915_hw_context *default_context;
--	struct drm_i915_gem_object *last_context_obj;
-+	struct i915_hw_context *last_context;
- 
- 	void *private;
- };
diff --git a/patches.baytrail/0110-drm-i915-add-context-into-request-struct.patch b/patches.baytrail/0110-drm-i915-add-context-into-request-struct.patch
deleted file mode 100644
index 67758eb5233fc..0000000000000
--- a/patches.baytrail/0110-drm-i915-add-context-into-request-struct.patch
+++ /dev/null
@@ -1,95 +0,0 @@
-From 52ce134310edec31deee95091661e17e7e56e932 Mon Sep 17 00:00:00 2001
-From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
-Date: Thu, 2 May 2013 16:48:08 +0300
-Subject: drm/i915: add context into request struct
-
-Storing context reference into request struct
-allows us to inspect context and its associated
-objects when requests are retired.
-
-Both ppgtt and arb robustness work will need
-this.
-
-Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 0e50e96bf2d89c3415cb68aead301f485938f1ca)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h |  3 +++
- drivers/gpu/drm/i915/i915_gem.c | 24 ++++++++++++++++++------
- 2 files changed, 21 insertions(+), 6 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index aac5740f1ee9..b5cdc737232f 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1271,6 +1271,9 @@ struct drm_i915_gem_request {
- 	/** Postion in the ringbuffer of the end of the request */
- 	u32 tail;
- 
-+	/** Context related to this request */
-+	struct i915_hw_context *ctx;
-+
- 	/** Time at which this request was emitted, in jiffies. */
- 	unsigned long emitted_jiffies;
- 
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index 0a30088178b0..34a1d71655a3 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -2053,6 +2053,11 @@ i915_add_request(struct intel_ring_buffer *ring,
- 	request->seqno = intel_ring_get_seqno(ring);
- 	request->ring = ring;
- 	request->tail = request_ring_position;
-+	request->ctx = ring->last_context;
-+
-+	if (request->ctx)
-+		i915_gem_context_reference(request->ctx);
-+
- 	request->emitted_jiffies = jiffies;
- 	was_empty = list_empty(&ring->request_list);
- 	list_add_tail(&request->list, &ring->request_list);
-@@ -2105,6 +2110,17 @@ i915_gem_request_remove_from_client(struct drm_i915_gem_request *request)
- 	spin_unlock(&file_priv->mm.lock);
- }
- 
-+static void i915_gem_free_request(struct drm_i915_gem_request *request)
-+{
-+	list_del(&request->list);
-+	i915_gem_request_remove_from_client(request);
-+
-+	if (request->ctx)
-+		i915_gem_context_unreference(request->ctx);
-+
-+	kfree(request);
-+}
-+
- static void i915_gem_reset_ring_lists(struct drm_i915_private *dev_priv,
- 				      struct intel_ring_buffer *ring)
- {
-@@ -2115,9 +2131,7 @@ static void i915_gem_reset_ring_lists(struct drm_i915_private *dev_priv,
- 					   struct drm_i915_gem_request,
- 					   list);
- 
--		list_del(&request->list);
--		i915_gem_request_remove_from_client(request);
--		kfree(request);
-+		i915_gem_free_request(request);
- 	}
- 
- 	while (!list_empty(&ring->active_list)) {
-@@ -2208,9 +2222,7 @@ i915_gem_retire_requests_ring(struct intel_ring_buffer *ring)
- 		 */
- 		ring->last_retired_head = request->tail;
- 
--		list_del(&request->list);
--		i915_gem_request_remove_from_client(request);
--		kfree(request);
-+		i915_gem_free_request(request);
- 	}
- 
- 	/* Move any buffers on the active list that are no longer referenced
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0111-drm-i915-fix-up-adjusted_mode-tracking-for-interlace.patch b/patches.baytrail/0111-drm-i915-fix-up-adjusted_mode-tracking-for-interlace.patch
deleted file mode 100644
index 05a06d4e3a63d..0000000000000
--- a/patches.baytrail/0111-drm-i915-fix-up-adjusted_mode-tracking-for-interlace.patch
+++ /dev/null
@@ -1,71 +0,0 @@
-From a29147460dad896ebc2de769daa9dfaec7a3d4c3 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Fri, 3 May 2013 11:49:51 +0200
-Subject: drm/i915: fix up adjusted_mode tracking for interlaced modes
-
-With the hw state readout&check code it's important that the values we
-keep around are the canonical ones. Unfortunately when adding the pipe
-timings readout support I've missed that the write side adjusts the
-timings in the pipe config.
-
-Fix this up and so prevent the unsightly WARN noise in dmesg. This
-regression has been introduced in
-
-commit 1bd1bd806037af04dd1d7bdd39b2b04090c10d2c
-Author: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date:   Mon Apr 29 21:56:12 2013 +0200
-
-    drm/i915: hw state readout support for pipe timings
-
-Reported-by: Paulo Zanoni <przanoni@gmail.com>
-Cc: Mika Kuoppala <mika.kuoppala@intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Tested-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 4d8a62eac3caad710ef030aab25248d56693a8f1)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 15 ++++++++++-----
- 1 file changed, 10 insertions(+), 5 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index d3c76234abda..dbef6715aa86 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -4682,12 +4682,17 @@ static void intel_set_pipe_timings(struct intel_crtc *intel_crtc,
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	enum pipe pipe = intel_crtc->pipe;
- 	enum transcoder cpu_transcoder = intel_crtc->config.cpu_transcoder;
--	uint32_t vsyncshift;
-+	uint32_t vsyncshift, crtc_vtotal, crtc_vblank_end;
-+
-+	/* We need to be careful not to changed the adjusted mode, for otherwise
-+	 * the hw state checker will get angry at the mismatch. */
-+	crtc_vtotal = adjusted_mode->crtc_vtotal;
-+	crtc_vblank_end = adjusted_mode->crtc_vblank_end;
- 
- 	if (!IS_GEN2(dev) && adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) {
- 		/* the chip adds 2 halflines automatically */
--		adjusted_mode->crtc_vtotal -= 1;
--		adjusted_mode->crtc_vblank_end -= 1;
-+		crtc_vtotal -= 1;
-+		crtc_vblank_end -= 1;
- 		vsyncshift = adjusted_mode->crtc_hsync_start
- 			     - adjusted_mode->crtc_htotal / 2;
- 	} else {
-@@ -4709,10 +4714,10 @@ static void intel_set_pipe_timings(struct intel_crtc *intel_crtc,
- 
- 	I915_WRITE(VTOTAL(cpu_transcoder),
- 		   (adjusted_mode->crtc_vdisplay - 1) |
--		   ((adjusted_mode->crtc_vtotal - 1) << 16));
-+		   ((crtc_vtotal - 1) << 16));
- 	I915_WRITE(VBLANK(cpu_transcoder),
- 		   (adjusted_mode->crtc_vblank_start - 1) |
--		   ((adjusted_mode->crtc_vblank_end - 1) << 16));
-+		   ((crtc_vblank_end - 1) << 16));
- 	I915_WRITE(VSYNC(cpu_transcoder),
- 		   (adjusted_mode->crtc_vsync_start - 1) |
- 		   ((adjusted_mode->crtc_vsync_end - 1) << 16));
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0112-drm-i915-s-TRANSCONF-PCH_TRANSCONF.patch b/patches.baytrail/0112-drm-i915-s-TRANSCONF-PCH_TRANSCONF.patch
deleted file mode 100644
index 6e824555d4970..0000000000000
--- a/patches.baytrail/0112-drm-i915-s-TRANSCONF-PCH_TRANSCONF.patch
+++ /dev/null
@@ -1,186 +0,0 @@
-From 1e81b3c7c04b4627e19632c54a6b309d11321d3a Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Fri, 3 May 2013 11:49:46 +0200
-Subject: drm/i915: s/TRANSCONF/PCH_TRANSCONF/
-
-Every time I read hsw code I get completely confused about this. So
-call it what it is more explicitly.
-
-Also, add an LPT_TRANSCONF for the pch transcoder A and use it in
-lpt-only code, to really unconfuse me.
-
-v2: s/plane/pipe/ in the TRANSCONF #define (Paulo).
-
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit ab9412ba06484cdfd82bdb748689024efe2221fe)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_reg.h      |    7 ++++---
- drivers/gpu/drm/i915/i915_ums.c      |    8 ++++----
- drivers/gpu/drm/i915/intel_display.c |   30 +++++++++++++++---------------
- 3 files changed, 23 insertions(+), 22 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -4064,9 +4064,10 @@
- #define TRANSDPLINK_M2(pipe) _PIPE(pipe, _TRANSA_DP_LINK_M2, _TRANSB_DP_LINK_M2)
- #define TRANSDPLINK_N2(pipe) _PIPE(pipe, _TRANSA_DP_LINK_N2, _TRANSB_DP_LINK_N2)
- 
--#define _TRANSACONF              0xf0008
--#define _TRANSBCONF              0xf1008
--#define TRANSCONF(plane) _PIPE(plane, _TRANSACONF, _TRANSBCONF)
-+#define _PCH_TRANSACONF              0xf0008
-+#define _PCH_TRANSBCONF              0xf1008
-+#define PCH_TRANSCONF(pipe) _PIPE(pipe, _PCH_TRANSACONF, _PCH_TRANSBCONF)
-+#define LPT_TRANSCONF		_PCH_TRANSACONF /* lpt has only one transcoder */
- #define  TRANS_DISABLE          (0<<31)
- #define  TRANS_ENABLE           (1<<31)
- #define  TRANS_STATE_MASK       (1<<30)
---- a/drivers/gpu/drm/i915/i915_ums.c
-+++ b/drivers/gpu/drm/i915/i915_ums.c
-@@ -148,7 +148,7 @@ void i915_save_display_reg(struct drm_de
- 		dev_priv->regfile.savePFA_WIN_SZ = I915_READ(_PFA_WIN_SZ);
- 		dev_priv->regfile.savePFA_WIN_POS = I915_READ(_PFA_WIN_POS);
- 
--		dev_priv->regfile.saveTRANSACONF = I915_READ(_TRANSACONF);
-+		dev_priv->regfile.saveTRANSACONF = I915_READ(_PCH_TRANSACONF);
- 		dev_priv->regfile.saveTRANS_HTOTAL_A = I915_READ(_TRANS_HTOTAL_A);
- 		dev_priv->regfile.saveTRANS_HBLANK_A = I915_READ(_TRANS_HBLANK_A);
- 		dev_priv->regfile.saveTRANS_HSYNC_A = I915_READ(_TRANS_HSYNC_A);
-@@ -205,7 +205,7 @@ void i915_save_display_reg(struct drm_de
- 		dev_priv->regfile.savePFB_WIN_SZ = I915_READ(_PFB_WIN_SZ);
- 		dev_priv->regfile.savePFB_WIN_POS = I915_READ(_PFB_WIN_POS);
- 
--		dev_priv->regfile.saveTRANSBCONF = I915_READ(_TRANSBCONF);
-+		dev_priv->regfile.saveTRANSBCONF = I915_READ(_PCH_TRANSBCONF);
- 		dev_priv->regfile.saveTRANS_HTOTAL_B = I915_READ(_TRANS_HTOTAL_B);
- 		dev_priv->regfile.saveTRANS_HBLANK_B = I915_READ(_TRANS_HBLANK_B);
- 		dev_priv->regfile.saveTRANS_HSYNC_B = I915_READ(_TRANS_HSYNC_B);
-@@ -379,7 +379,7 @@ void i915_restore_display_reg(struct drm
- 		I915_WRITE(_PFA_WIN_SZ, dev_priv->regfile.savePFA_WIN_SZ);
- 		I915_WRITE(_PFA_WIN_POS, dev_priv->regfile.savePFA_WIN_POS);
- 
--		I915_WRITE(_TRANSACONF, dev_priv->regfile.saveTRANSACONF);
-+		I915_WRITE(_PCH_TRANSACONF, dev_priv->regfile.saveTRANSACONF);
- 		I915_WRITE(_TRANS_HTOTAL_A, dev_priv->regfile.saveTRANS_HTOTAL_A);
- 		I915_WRITE(_TRANS_HBLANK_A, dev_priv->regfile.saveTRANS_HBLANK_A);
- 		I915_WRITE(_TRANS_HSYNC_A, dev_priv->regfile.saveTRANS_HSYNC_A);
-@@ -448,7 +448,7 @@ void i915_restore_display_reg(struct drm
- 		I915_WRITE(_PFB_WIN_SZ, dev_priv->regfile.savePFB_WIN_SZ);
- 		I915_WRITE(_PFB_WIN_POS, dev_priv->regfile.savePFB_WIN_POS);
- 
--		I915_WRITE(_TRANSBCONF, dev_priv->regfile.saveTRANSBCONF);
-+		I915_WRITE(_PCH_TRANSBCONF, dev_priv->regfile.saveTRANSBCONF);
- 		I915_WRITE(_TRANS_HTOTAL_B, dev_priv->regfile.saveTRANS_HTOTAL_B);
- 		I915_WRITE(_TRANS_HBLANK_B, dev_priv->regfile.saveTRANS_HBLANK_B);
- 		I915_WRITE(_TRANS_HSYNC_B, dev_priv->regfile.saveTRANS_HSYNC_B);
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -1206,14 +1206,14 @@ static void assert_pch_refclk_enabled(st
- 	WARN(!enabled, "PCH refclk assertion failure, should be active but is disabled\n");
- }
- 
--static void assert_transcoder_disabled(struct drm_i915_private *dev_priv,
--				       enum pipe pipe)
-+static void assert_pch_transcoder_disabled(struct drm_i915_private *dev_priv,
-+					   enum pipe pipe)
- {
- 	int reg;
- 	u32 val;
- 	bool enabled;
- 
--	reg = TRANSCONF(pipe);
-+	reg = PCH_TRANSCONF(pipe);
- 	val = I915_READ(reg);
- 	enabled = !!(val & TRANS_ENABLE);
- 	WARN(enabled,
-@@ -1565,7 +1565,7 @@ static void intel_disable_pch_pll(struct
- 	DRM_DEBUG_KMS("disabling PCH PLL %x\n", pll->pll_reg);
- 
- 	/* Make sure transcoder isn't still depending on us */
--	assert_transcoder_disabled(dev_priv, intel_crtc->pipe);
-+	assert_pch_transcoder_disabled(dev_priv, intel_crtc->pipe);
- 
- 	reg = pll->pll_reg;
- 	val = I915_READ(reg);
-@@ -1605,7 +1605,7 @@ static void ironlake_enable_pch_transcod
- 		I915_WRITE(reg, val);
- 	}
- 
--	reg = TRANSCONF(pipe);
-+	reg = PCH_TRANSCONF(pipe);
- 	val = I915_READ(reg);
- 	pipeconf_val = I915_READ(PIPECONF(pipe));
- 
-@@ -1659,8 +1659,8 @@ static void lpt_enable_pch_transcoder(st
- 	else
- 		val |= TRANS_PROGRESSIVE;
- 
--	I915_WRITE(TRANSCONF(TRANSCODER_A), val);
--	if (wait_for(I915_READ(_TRANSACONF) & TRANS_STATE_ENABLE, 100))
-+	I915_WRITE(LPT_TRANSCONF, val);
-+	if (wait_for(I915_READ(LPT_TRANSCONF) & TRANS_STATE_ENABLE, 100))
- 		DRM_ERROR("Failed to enable PCH transcoder\n");
- }
- 
-@@ -1677,7 +1677,7 @@ static void ironlake_disable_pch_transco
- 	/* Ports must be off as well */
- 	assert_pch_ports_disabled(dev_priv, pipe);
- 
--	reg = TRANSCONF(pipe);
-+	reg = PCH_TRANSCONF(pipe);
- 	val = I915_READ(reg);
- 	val &= ~TRANS_ENABLE;
- 	I915_WRITE(reg, val);
-@@ -1698,11 +1698,11 @@ static void lpt_disable_pch_transcoder(s
- {
- 	u32 val;
- 
--	val = I915_READ(_TRANSACONF);
-+	val = I915_READ(LPT_TRANSCONF);
- 	val &= ~TRANS_ENABLE;
--	I915_WRITE(_TRANSACONF, val);
-+	I915_WRITE(LPT_TRANSCONF, val);
- 	/* wait for PCH transcoder off, transcoder state */
--	if (wait_for((I915_READ(_TRANSACONF) & TRANS_STATE_ENABLE) == 0, 50))
-+	if (wait_for((I915_READ(LPT_TRANSCONF) & TRANS_STATE_ENABLE) == 0, 50))
- 		DRM_ERROR("Failed to disable PCH transcoder\n");
- 
- 	/* Workaround: clear timing override bit. */
-@@ -3011,7 +3011,7 @@ static void ironlake_pch_enable(struct d
- 	int pipe = intel_crtc->pipe;
- 	u32 reg, temp;
- 
--	assert_transcoder_disabled(dev_priv, pipe);
-+	assert_pch_transcoder_disabled(dev_priv, pipe);
- 
- 	/* Write the TU size bits before fdi link training, so that error
- 	 * detection works. */
-@@ -3115,7 +3115,7 @@ static void lpt_pch_enable(struct drm_cr
- 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
- 	enum transcoder cpu_transcoder = intel_crtc->config.cpu_transcoder;
- 
--	assert_transcoder_disabled(dev_priv, TRANSCODER_A);
-+	assert_pch_transcoder_disabled(dev_priv, TRANSCODER_A);
- 
- 	lpt_program_iclkip(crtc);
- 
-@@ -5906,7 +5906,7 @@ static bool ironlake_get_pipe_config(str
- 	if (!(tmp & PIPECONF_ENABLE))
- 		return false;
- 
--	if (I915_READ(TRANSCONF(crtc->pipe)) & TRANS_ENABLE) {
-+	if (I915_READ(PCH_TRANSCONF(crtc->pipe)) & TRANS_ENABLE) {
- 		pipe_config->has_pch_encoder = true;
- 
- 		tmp = I915_READ(FDI_RX_CTL(crtc->pipe));
-@@ -6054,7 +6054,7 @@ static bool haswell_get_pipe_config(stru
- 	 */
- 	tmp = I915_READ(TRANS_DDI_FUNC_CTL(cpu_transcoder));
- 	if ((tmp & TRANS_DDI_PORT_MASK) == TRANS_DDI_SELECT_PORT(PORT_E) &&
--	    I915_READ(TRANSCONF(PIPE_A)) & TRANS_ENABLE) {
-+	    I915_READ(LPT_TRANSCONF) & TRANS_ENABLE) {
- 		pipe_config->has_pch_encoder = true;
- 
- 		tmp = I915_READ(FDI_RX_CTL(PIPE_A));
diff --git a/patches.baytrail/0113-drm-i915-PCH_-prefix-for-transcoder-timings.patch b/patches.baytrail/0113-drm-i915-PCH_-prefix-for-transcoder-timings.patch
deleted file mode 100644
index 9a4649e23a900..0000000000000
--- a/patches.baytrail/0113-drm-i915-PCH_-prefix-for-transcoder-timings.patch
+++ /dev/null
@@ -1,258 +0,0 @@
-From 85799446ff2f1d06aef076526ffb5dbc6c38a6ee Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Fri, 3 May 2013 11:49:47 +0200
-Subject: drm/i915: PCH_ prefix for transcoder timings
-
-While at it, also extract a common helper to copy the timings from the
-cpu transcoder to the pch transcoder. That way it's really explicit
-how the lpt transcoder is hardcoded.
-
-v2:
-- Re-align #defines properly (Paulo).
-- Use cpu_transcoder when copying pipe timings (Paulo).
-- s/intel_pch_transcoder_enable/intel_pch_transcoder_set_timings/
-  since we already have a pch transcoder enable function, and this is
-  clearer, too.
-- Fixup 80 char line overflow in intel_display.c. I've opted to ignore
-  this in i915_reg.h and i915_ums.c since meh.
-
-Cc: Paulo Zanoni <przanoni@gmail.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 275f01b2694a52d13c32358d17d594ec9aba55e3)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_reg.h      |   70 +++++++++++++++++------------------
- drivers/gpu/drm/i915/i915_ums.c      |   48 ++++++++++++------------
- drivers/gpu/drm/i915/intel_display.c |   42 +++++++++++++--------
- 3 files changed, 85 insertions(+), 75 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -3933,25 +3933,25 @@
- 
- /* transcoder */
- 
--#define _TRANS_HTOTAL_A          0xe0000
--#define  TRANS_HTOTAL_SHIFT     16
--#define  TRANS_HACTIVE_SHIFT    0
--#define _TRANS_HBLANK_A          0xe0004
--#define  TRANS_HBLANK_END_SHIFT 16
--#define  TRANS_HBLANK_START_SHIFT 0
--#define _TRANS_HSYNC_A           0xe0008
--#define  TRANS_HSYNC_END_SHIFT  16
--#define  TRANS_HSYNC_START_SHIFT 0
--#define _TRANS_VTOTAL_A          0xe000c
--#define  TRANS_VTOTAL_SHIFT     16
--#define  TRANS_VACTIVE_SHIFT    0
--#define _TRANS_VBLANK_A          0xe0010
--#define  TRANS_VBLANK_END_SHIFT 16
--#define  TRANS_VBLANK_START_SHIFT 0
--#define _TRANS_VSYNC_A           0xe0014
--#define  TRANS_VSYNC_END_SHIFT  16
--#define  TRANS_VSYNC_START_SHIFT 0
--#define _TRANS_VSYNCSHIFT_A	0xe0028
-+#define _PCH_TRANS_HTOTAL_A		0xe0000
-+#define  TRANS_HTOTAL_SHIFT		16
-+#define  TRANS_HACTIVE_SHIFT		0
-+#define _PCH_TRANS_HBLANK_A		0xe0004
-+#define  TRANS_HBLANK_END_SHIFT		16
-+#define  TRANS_HBLANK_START_SHIFT	0
-+#define _PCH_TRANS_HSYNC_A		0xe0008
-+#define  TRANS_HSYNC_END_SHIFT		16
-+#define  TRANS_HSYNC_START_SHIFT	0
-+#define _PCH_TRANS_VTOTAL_A		0xe000c
-+#define  TRANS_VTOTAL_SHIFT		16
-+#define  TRANS_VACTIVE_SHIFT		0
-+#define _PCH_TRANS_VBLANK_A		0xe0010
-+#define  TRANS_VBLANK_END_SHIFT		16
-+#define  TRANS_VBLANK_START_SHIFT	0
-+#define _PCH_TRANS_VSYNC_A		0xe0014
-+#define  TRANS_VSYNC_END_SHIFT	 	16
-+#define  TRANS_VSYNC_START_SHIFT	0
-+#define _PCH_TRANS_VSYNCSHIFT_A		0xe0028
- 
- #define _TRANSA_DATA_M1          0xe0030
- #define _TRANSA_DATA_N1          0xe0034
-@@ -4029,22 +4029,22 @@
- #define HSW_TVIDEO_DIP_VSC_DATA(trans) \
- 	 _TRANSCODER(trans, HSW_VIDEO_DIP_VSC_DATA_A, HSW_VIDEO_DIP_VSC_DATA_B)
- 
--#define _TRANS_HTOTAL_B          0xe1000
--#define _TRANS_HBLANK_B          0xe1004
--#define _TRANS_HSYNC_B           0xe1008
--#define _TRANS_VTOTAL_B          0xe100c
--#define _TRANS_VBLANK_B          0xe1010
--#define _TRANS_VSYNC_B           0xe1014
--#define _TRANS_VSYNCSHIFT_B	 0xe1028
--
--#define TRANS_HTOTAL(pipe) _PIPE(pipe, _TRANS_HTOTAL_A, _TRANS_HTOTAL_B)
--#define TRANS_HBLANK(pipe) _PIPE(pipe, _TRANS_HBLANK_A, _TRANS_HBLANK_B)
--#define TRANS_HSYNC(pipe) _PIPE(pipe, _TRANS_HSYNC_A, _TRANS_HSYNC_B)
--#define TRANS_VTOTAL(pipe) _PIPE(pipe, _TRANS_VTOTAL_A, _TRANS_VTOTAL_B)
--#define TRANS_VBLANK(pipe) _PIPE(pipe, _TRANS_VBLANK_A, _TRANS_VBLANK_B)
--#define TRANS_VSYNC(pipe) _PIPE(pipe, _TRANS_VSYNC_A, _TRANS_VSYNC_B)
--#define TRANS_VSYNCSHIFT(pipe) _PIPE(pipe, _TRANS_VSYNCSHIFT_A, \
--				     _TRANS_VSYNCSHIFT_B)
-+#define _PCH_TRANS_HTOTAL_B          0xe1000
-+#define _PCH_TRANS_HBLANK_B          0xe1004
-+#define _PCH_TRANS_HSYNC_B           0xe1008
-+#define _PCH_TRANS_VTOTAL_B          0xe100c
-+#define _PCH_TRANS_VBLANK_B          0xe1010
-+#define _PCH_TRANS_VSYNC_B           0xe1014
-+#define _PCH_TRANS_VSYNCSHIFT_B	 0xe1028
-+
-+#define PCH_TRANS_HTOTAL(pipe) _PIPE(pipe, _PCH_TRANS_HTOTAL_A, _PCH_TRANS_HTOTAL_B)
-+#define PCH_TRANS_HBLANK(pipe) _PIPE(pipe, _PCH_TRANS_HBLANK_A, _PCH_TRANS_HBLANK_B)
-+#define PCH_TRANS_HSYNC(pipe) _PIPE(pipe, _PCH_TRANS_HSYNC_A, _PCH_TRANS_HSYNC_B)
-+#define PCH_TRANS_VTOTAL(pipe) _PIPE(pipe, _PCH_TRANS_VTOTAL_A, _PCH_TRANS_VTOTAL_B)
-+#define PCH_TRANS_VBLANK(pipe) _PIPE(pipe, _PCH_TRANS_VBLANK_A, _PCH_TRANS_VBLANK_B)
-+#define PCH_TRANS_VSYNC(pipe) _PIPE(pipe, _PCH_TRANS_VSYNC_A, _PCH_TRANS_VSYNC_B)
-+#define PCH_TRANS_VSYNCSHIFT(pipe) _PIPE(pipe, _PCH_TRANS_VSYNCSHIFT_A, \
-+					 _PCH_TRANS_VSYNCSHIFT_B)
- 
- #define _TRANSB_DATA_M1          0xe1030
- #define _TRANSB_DATA_N1          0xe1034
---- a/drivers/gpu/drm/i915/i915_ums.c
-+++ b/drivers/gpu/drm/i915/i915_ums.c
-@@ -149,12 +149,12 @@ void i915_save_display_reg(struct drm_de
- 		dev_priv->regfile.savePFA_WIN_POS = I915_READ(_PFA_WIN_POS);
- 
- 		dev_priv->regfile.saveTRANSACONF = I915_READ(_PCH_TRANSACONF);
--		dev_priv->regfile.saveTRANS_HTOTAL_A = I915_READ(_TRANS_HTOTAL_A);
--		dev_priv->regfile.saveTRANS_HBLANK_A = I915_READ(_TRANS_HBLANK_A);
--		dev_priv->regfile.saveTRANS_HSYNC_A = I915_READ(_TRANS_HSYNC_A);
--		dev_priv->regfile.saveTRANS_VTOTAL_A = I915_READ(_TRANS_VTOTAL_A);
--		dev_priv->regfile.saveTRANS_VBLANK_A = I915_READ(_TRANS_VBLANK_A);
--		dev_priv->regfile.saveTRANS_VSYNC_A = I915_READ(_TRANS_VSYNC_A);
-+		dev_priv->regfile.saveTRANS_HTOTAL_A = I915_READ(_PCH_TRANS_HTOTAL_A);
-+		dev_priv->regfile.saveTRANS_HBLANK_A = I915_READ(_PCH_TRANS_HBLANK_A);
-+		dev_priv->regfile.saveTRANS_HSYNC_A = I915_READ(_PCH_TRANS_HSYNC_A);
-+		dev_priv->regfile.saveTRANS_VTOTAL_A = I915_READ(_PCH_TRANS_VTOTAL_A);
-+		dev_priv->regfile.saveTRANS_VBLANK_A = I915_READ(_PCH_TRANS_VBLANK_A);
-+		dev_priv->regfile.saveTRANS_VSYNC_A = I915_READ(_PCH_TRANS_VSYNC_A);
- 	}
- 
- 	dev_priv->regfile.saveDSPACNTR = I915_READ(_DSPACNTR);
-@@ -206,12 +206,12 @@ void i915_save_display_reg(struct drm_de
- 		dev_priv->regfile.savePFB_WIN_POS = I915_READ(_PFB_WIN_POS);
- 
- 		dev_priv->regfile.saveTRANSBCONF = I915_READ(_PCH_TRANSBCONF);
--		dev_priv->regfile.saveTRANS_HTOTAL_B = I915_READ(_TRANS_HTOTAL_B);
--		dev_priv->regfile.saveTRANS_HBLANK_B = I915_READ(_TRANS_HBLANK_B);
--		dev_priv->regfile.saveTRANS_HSYNC_B = I915_READ(_TRANS_HSYNC_B);
--		dev_priv->regfile.saveTRANS_VTOTAL_B = I915_READ(_TRANS_VTOTAL_B);
--		dev_priv->regfile.saveTRANS_VBLANK_B = I915_READ(_TRANS_VBLANK_B);
--		dev_priv->regfile.saveTRANS_VSYNC_B = I915_READ(_TRANS_VSYNC_B);
-+		dev_priv->regfile.saveTRANS_HTOTAL_B = I915_READ(_PCH_TRANS_HTOTAL_B);
-+		dev_priv->regfile.saveTRANS_HBLANK_B = I915_READ(_PCH_TRANS_HBLANK_B);
-+		dev_priv->regfile.saveTRANS_HSYNC_B = I915_READ(_PCH_TRANS_HSYNC_B);
-+		dev_priv->regfile.saveTRANS_VTOTAL_B = I915_READ(_PCH_TRANS_VTOTAL_B);
-+		dev_priv->regfile.saveTRANS_VBLANK_B = I915_READ(_PCH_TRANS_VBLANK_B);
-+		dev_priv->regfile.saveTRANS_VSYNC_B = I915_READ(_PCH_TRANS_VSYNC_B);
- 	}
- 
- 	dev_priv->regfile.saveDSPBCNTR = I915_READ(_DSPBCNTR);
-@@ -380,12 +380,12 @@ void i915_restore_display_reg(struct drm
- 		I915_WRITE(_PFA_WIN_POS, dev_priv->regfile.savePFA_WIN_POS);
- 
- 		I915_WRITE(_PCH_TRANSACONF, dev_priv->regfile.saveTRANSACONF);
--		I915_WRITE(_TRANS_HTOTAL_A, dev_priv->regfile.saveTRANS_HTOTAL_A);
--		I915_WRITE(_TRANS_HBLANK_A, dev_priv->regfile.saveTRANS_HBLANK_A);
--		I915_WRITE(_TRANS_HSYNC_A, dev_priv->regfile.saveTRANS_HSYNC_A);
--		I915_WRITE(_TRANS_VTOTAL_A, dev_priv->regfile.saveTRANS_VTOTAL_A);
--		I915_WRITE(_TRANS_VBLANK_A, dev_priv->regfile.saveTRANS_VBLANK_A);
--		I915_WRITE(_TRANS_VSYNC_A, dev_priv->regfile.saveTRANS_VSYNC_A);
-+		I915_WRITE(_PCH_TRANS_HTOTAL_A, dev_priv->regfile.saveTRANS_HTOTAL_A);
-+		I915_WRITE(_PCH_TRANS_HBLANK_A, dev_priv->regfile.saveTRANS_HBLANK_A);
-+		I915_WRITE(_PCH_TRANS_HSYNC_A, dev_priv->regfile.saveTRANS_HSYNC_A);
-+		I915_WRITE(_PCH_TRANS_VTOTAL_A, dev_priv->regfile.saveTRANS_VTOTAL_A);
-+		I915_WRITE(_PCH_TRANS_VBLANK_A, dev_priv->regfile.saveTRANS_VBLANK_A);
-+		I915_WRITE(_PCH_TRANS_VSYNC_A, dev_priv->regfile.saveTRANS_VSYNC_A);
- 	}
- 
- 	/* Restore plane info */
-@@ -449,12 +449,12 @@ void i915_restore_display_reg(struct drm
- 		I915_WRITE(_PFB_WIN_POS, dev_priv->regfile.savePFB_WIN_POS);
- 
- 		I915_WRITE(_PCH_TRANSBCONF, dev_priv->regfile.saveTRANSBCONF);
--		I915_WRITE(_TRANS_HTOTAL_B, dev_priv->regfile.saveTRANS_HTOTAL_B);
--		I915_WRITE(_TRANS_HBLANK_B, dev_priv->regfile.saveTRANS_HBLANK_B);
--		I915_WRITE(_TRANS_HSYNC_B, dev_priv->regfile.saveTRANS_HSYNC_B);
--		I915_WRITE(_TRANS_VTOTAL_B, dev_priv->regfile.saveTRANS_VTOTAL_B);
--		I915_WRITE(_TRANS_VBLANK_B, dev_priv->regfile.saveTRANS_VBLANK_B);
--		I915_WRITE(_TRANS_VSYNC_B, dev_priv->regfile.saveTRANS_VSYNC_B);
-+		I915_WRITE(_PCH_TRANS_HTOTAL_B, dev_priv->regfile.saveTRANS_HTOTAL_B);
-+		I915_WRITE(_PCH_TRANS_HBLANK_B, dev_priv->regfile.saveTRANS_HBLANK_B);
-+		I915_WRITE(_PCH_TRANS_HSYNC_B, dev_priv->regfile.saveTRANS_HSYNC_B);
-+		I915_WRITE(_PCH_TRANS_VTOTAL_B, dev_priv->regfile.saveTRANS_VTOTAL_B);
-+		I915_WRITE(_PCH_TRANS_VBLANK_B, dev_priv->regfile.saveTRANS_VBLANK_B);
-+		I915_WRITE(_PCH_TRANS_VSYNC_B, dev_priv->regfile.saveTRANS_VSYNC_B);
- 	}
- 
- 	/* Restore plane info */
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -2995,6 +2995,30 @@ static void lpt_program_iclkip(struct dr
- 	mutex_unlock(&dev_priv->dpio_lock);
- }
- 
-+static void ironlake_pch_transcoder_set_timings(struct intel_crtc *crtc,
-+						enum pipe pch_transcoder)
-+{
-+	struct drm_device *dev = crtc->base.dev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	enum transcoder cpu_transcoder = crtc->config.cpu_transcoder;
-+
-+	I915_WRITE(PCH_TRANS_HTOTAL(pch_transcoder),
-+		   I915_READ(HTOTAL(cpu_transcoder)));
-+	I915_WRITE(PCH_TRANS_HBLANK(pch_transcoder),
-+		   I915_READ(HBLANK(cpu_transcoder)));
-+	I915_WRITE(PCH_TRANS_HSYNC(pch_transcoder),
-+		   I915_READ(HSYNC(cpu_transcoder)));
-+
-+	I915_WRITE(PCH_TRANS_VTOTAL(pch_transcoder),
-+		   I915_READ(VTOTAL(cpu_transcoder)));
-+	I915_WRITE(PCH_TRANS_VBLANK(pch_transcoder),
-+		   I915_READ(VBLANK(cpu_transcoder)));
-+	I915_WRITE(PCH_TRANS_VSYNC(pch_transcoder),
-+		   I915_READ(VSYNC(cpu_transcoder)));
-+	I915_WRITE(PCH_TRANS_VSYNCSHIFT(pch_transcoder),
-+		   I915_READ(VSYNCSHIFT(cpu_transcoder)));
-+}
-+
- /*
-  * Enable PCH resources required for PCH ports:
-  *   - PCH PLLs
-@@ -3058,14 +3082,7 @@ static void ironlake_pch_enable(struct d
- 
- 	/* set transcoder timing, panel must allow it */
- 	assert_panel_unlocked(dev_priv, pipe);
--	I915_WRITE(TRANS_HTOTAL(pipe), I915_READ(HTOTAL(pipe)));
--	I915_WRITE(TRANS_HBLANK(pipe), I915_READ(HBLANK(pipe)));
--	I915_WRITE(TRANS_HSYNC(pipe),  I915_READ(HSYNC(pipe)));
--
--	I915_WRITE(TRANS_VTOTAL(pipe), I915_READ(VTOTAL(pipe)));
--	I915_WRITE(TRANS_VBLANK(pipe), I915_READ(VBLANK(pipe)));
--	I915_WRITE(TRANS_VSYNC(pipe),  I915_READ(VSYNC(pipe)));
--	I915_WRITE(TRANS_VSYNCSHIFT(pipe),  I915_READ(VSYNCSHIFT(pipe)));
-+	ironlake_pch_transcoder_set_timings(intel_crtc, pipe);
- 
- 	intel_fdi_normal_train(crtc);
- 
-@@ -3120,14 +3137,7 @@ static void lpt_pch_enable(struct drm_cr
- 	lpt_program_iclkip(crtc);
- 
- 	/* Set transcoder timing. */
--	I915_WRITE(_TRANS_HTOTAL_A, I915_READ(HTOTAL(cpu_transcoder)));
--	I915_WRITE(_TRANS_HBLANK_A, I915_READ(HBLANK(cpu_transcoder)));
--	I915_WRITE(_TRANS_HSYNC_A,  I915_READ(HSYNC(cpu_transcoder)));
--
--	I915_WRITE(_TRANS_VTOTAL_A, I915_READ(VTOTAL(cpu_transcoder)));
--	I915_WRITE(_TRANS_VBLANK_A, I915_READ(VBLANK(cpu_transcoder)));
--	I915_WRITE(_TRANS_VSYNC_A,  I915_READ(VSYNC(cpu_transcoder)));
--	I915_WRITE(_TRANS_VSYNCSHIFT_A, I915_READ(VSYNCSHIFT(cpu_transcoder)));
-+	ironlake_pch_transcoder_set_timings(intel_crtc, PIPE_A);
- 
- 	lpt_enable_pch_transcoder(dev_priv, cpu_transcoder);
- }
diff --git a/patches.baytrail/0114-drm-i915-make-set_m_n-functions-static.patch b/patches.baytrail/0114-drm-i915-make-set_m_n-functions-static.patch
deleted file mode 100644
index 4653d1c65d200..0000000000000
--- a/patches.baytrail/0114-drm-i915-make-set_m_n-functions-static.patch
+++ /dev/null
@@ -1,123 +0,0 @@
-From ce4074ac37288d6f94d1d93e8dabdaa795701ab5 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Fri, 3 May 2013 11:49:48 +0200
-Subject: drm/i915: make set_m_n functions static
-
-This is possible thanks to moving the m/n stuff into pipe_config.
-
-Unfortunately we need to move them a bit to avoid forward
-declarations.
-
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit b551842d4d92cd337cc2af27947cc53e09fe34ab)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 68 ++++++++++++++++++------------------
- drivers/gpu/drm/i915/intel_drv.h     |  4 ---
- 2 files changed, 34 insertions(+), 38 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index e051ca86248e..27da171b6411 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -4388,6 +4388,40 @@ static void vlv_pllb_recal_opamp(struct drm_i915_private *dev_priv)
- 	intel_dpio_write(dev_priv, DPIO_CALIBRATION, reg_val);
- }
- 
-+static void intel_pch_transcoder_set_m_n(struct intel_crtc *crtc,
-+					 struct intel_link_m_n *m_n)
-+{
-+	struct drm_device *dev = crtc->base.dev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	int pipe = crtc->pipe;
-+
-+	I915_WRITE(TRANSDATA_M1(pipe), TU_SIZE(m_n->tu) | m_n->gmch_m);
-+	I915_WRITE(TRANSDATA_N1(pipe), m_n->gmch_n);
-+	I915_WRITE(TRANSDPLINK_M1(pipe), m_n->link_m);
-+	I915_WRITE(TRANSDPLINK_N1(pipe), m_n->link_n);
-+}
-+
-+static void intel_cpu_transcoder_set_m_n(struct intel_crtc *crtc,
-+					 struct intel_link_m_n *m_n)
-+{
-+	struct drm_device *dev = crtc->base.dev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	int pipe = crtc->pipe;
-+	enum transcoder transcoder = crtc->config.cpu_transcoder;
-+
-+	if (INTEL_INFO(dev)->gen >= 5) {
-+		I915_WRITE(PIPE_DATA_M1(transcoder), TU_SIZE(m_n->tu) | m_n->gmch_m);
-+		I915_WRITE(PIPE_DATA_N1(transcoder), m_n->gmch_n);
-+		I915_WRITE(PIPE_LINK_M1(transcoder), m_n->link_m);
-+		I915_WRITE(PIPE_LINK_N1(transcoder), m_n->link_n);
-+	} else {
-+		I915_WRITE(PIPE_GMCH_DATA_M(pipe), TU_SIZE(m_n->tu) | m_n->gmch_m);
-+		I915_WRITE(PIPE_GMCH_DATA_N(pipe), m_n->gmch_n);
-+		I915_WRITE(PIPE_DP_LINK_M(pipe), m_n->link_m);
-+		I915_WRITE(PIPE_DP_LINK_N(pipe), m_n->link_n);
-+	}
-+}
-+
- static void intel_dp_set_m_n(struct intel_crtc *crtc)
- {
- 	if (crtc->config.has_pch_encoder)
-@@ -5618,40 +5652,6 @@ int ironlake_get_lanes_required(int target_clock, int link_bw, int bpp)
- 	return bps / (link_bw * 8) + 1;
- }
- 
--void intel_pch_transcoder_set_m_n(struct intel_crtc *crtc,
--				  struct intel_link_m_n *m_n)
--{
--	struct drm_device *dev = crtc->base.dev;
--	struct drm_i915_private *dev_priv = dev->dev_private;
--	int pipe = crtc->pipe;
--
--	I915_WRITE(TRANSDATA_M1(pipe), TU_SIZE(m_n->tu) | m_n->gmch_m);
--	I915_WRITE(TRANSDATA_N1(pipe), m_n->gmch_n);
--	I915_WRITE(TRANSDPLINK_M1(pipe), m_n->link_m);
--	I915_WRITE(TRANSDPLINK_N1(pipe), m_n->link_n);
--}
--
--void intel_cpu_transcoder_set_m_n(struct intel_crtc *crtc,
--				  struct intel_link_m_n *m_n)
--{
--	struct drm_device *dev = crtc->base.dev;
--	struct drm_i915_private *dev_priv = dev->dev_private;
--	int pipe = crtc->pipe;
--	enum transcoder transcoder = crtc->config.cpu_transcoder;
--
--	if (INTEL_INFO(dev)->gen >= 5) {
--		I915_WRITE(PIPE_DATA_M1(transcoder), TU_SIZE(m_n->tu) | m_n->gmch_m);
--		I915_WRITE(PIPE_DATA_N1(transcoder), m_n->gmch_n);
--		I915_WRITE(PIPE_LINK_M1(transcoder), m_n->link_m);
--		I915_WRITE(PIPE_LINK_N1(transcoder), m_n->link_n);
--	} else {
--		I915_WRITE(PIPE_GMCH_DATA_M(pipe), TU_SIZE(m_n->tu) | m_n->gmch_m);
--		I915_WRITE(PIPE_GMCH_DATA_N(pipe), m_n->gmch_n);
--		I915_WRITE(PIPE_DP_LINK_M(pipe), m_n->link_m);
--		I915_WRITE(PIPE_DP_LINK_N(pipe), m_n->link_n);
--	}
--}
--
- static bool ironlake_needs_fb_cb_tune(struct dpll *dpll, int factor)
- {
- 	return i9xx_dpll_compute_m(dpll) < factor * dpll->n;
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index 428b9c0357ba..ce12398c34a6 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -720,10 +720,6 @@ extern void intel_init_clock_gating(struct drm_device *dev);
- extern void intel_write_eld(struct drm_encoder *encoder,
- 			    struct drm_display_mode *mode);
- extern void intel_cpt_verify_modeset(struct drm_device *dev, int pipe);
--extern void intel_cpu_transcoder_set_m_n(struct intel_crtc *crtc,
--					 struct intel_link_m_n *m_n);
--extern void intel_pch_transcoder_set_m_n(struct intel_crtc *crtc,
--					 struct intel_link_m_n *m_n);
- extern void intel_prepare_ddi(struct drm_device *dev);
- extern void hsw_fdi_link_train(struct drm_crtc *crtc);
- extern void intel_ddi_init(struct drm_device *dev, enum port port);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0115-drm-i915-Apply-OCD-to-data-link-m-n-register-defines.patch b/patches.baytrail/0115-drm-i915-Apply-OCD-to-data-link-m-n-register-defines.patch
deleted file mode 100644
index 74542e26f83fe..0000000000000
--- a/patches.baytrail/0115-drm-i915-Apply-OCD-to-data-link-m-n-register-defines.patch
+++ /dev/null
@@ -1,224 +0,0 @@
-From e3f17cf16015ade2884b65081dd67c88b1a3aebd Mon Sep 17 00:00:00 2001
-From: James Ausmus <james.ausmus@intel.com>
-Date: Mon, 23 Sep 2013 16:50:30 -0700
-Subject: drm/i915: Apply OCD to data/link m/n register #defines
-
-- PCH_ prefix for pch registers on ibx/cpt/ppt.
-- Drop the DP_ from the link defines, redundant.
-- Drop the GMCH from the data defines and instead give the special g4x
-  registers a consistent _G4X postfix.
-
-v2:
-- Realign #defines and use tabs (Paulo).
-
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit e3b95f1eb5b9a7ecc7241a27499ae8754b845926)
-
-Conflicts:
-	drivers/gpu/drm/i915/i915_reg.h
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_reg.h      |   81 ++++++++++++++++++-----------------
- drivers/gpu/drm/i915/i915_ums.c      |   32 ++++++-------
- drivers/gpu/drm/i915/intel_display.c |   16 +++---
- 3 files changed, 66 insertions(+), 63 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -2776,8 +2776,8 @@
-  * which is after the LUTs, so we want the bytes for our color format.
-  * For our current usage, this is always 3, one byte for R, G and B.
-  */
--#define _PIPEA_GMCH_DATA_M			0x70050
--#define _PIPEB_GMCH_DATA_M			0x71050
-+#define _PIPEA_DATA_M_G4X	0x70050
-+#define _PIPEB_DATA_M_G4X	0x71050
- 
- /* Transfer unit size for display port - 1, default is 0x3f (for TU size 64) */
- #define  TU_SIZE(x)             (((x)-1) << 25) /* default size 64 */
-@@ -2787,8 +2787,9 @@
- #define  DATA_LINK_M_N_MASK	(0xffffff)
- #define  DATA_LINK_N_MAX	(0x800000)
- 
--#define _PIPEA_GMCH_DATA_N			0x70054
--#define _PIPEB_GMCH_DATA_N			0x71054
-+#define _PIPEA_DATA_N_G4X	0x70054
-+#define _PIPEB_DATA_N_G4X	0x71054
-+#define   PIPE_GMCH_DATA_N_MASK			(0xffffff)
- 
- /*
-  * Computing Link M and N values for the Display Port link
-@@ -2801,16 +2802,18 @@
-  * Attributes and VB-ID.
-  */
- 
--#define _PIPEA_DP_LINK_M				0x70060
--#define _PIPEB_DP_LINK_M				0x71060
--
--#define _PIPEA_DP_LINK_N				0x70064
--#define _PIPEB_DP_LINK_N				0x71064
--
--#define PIPE_GMCH_DATA_M(pipe) _PIPE(pipe, _PIPEA_GMCH_DATA_M, _PIPEB_GMCH_DATA_M)
--#define PIPE_GMCH_DATA_N(pipe) _PIPE(pipe, _PIPEA_GMCH_DATA_N, _PIPEB_GMCH_DATA_N)
--#define PIPE_DP_LINK_M(pipe) _PIPE(pipe, _PIPEA_DP_LINK_M, _PIPEB_DP_LINK_M)
--#define PIPE_DP_LINK_N(pipe) _PIPE(pipe, _PIPEA_DP_LINK_N, _PIPEB_DP_LINK_N)
-+#define _PIPEA_LINK_M_G4X	0x70060
-+#define _PIPEB_LINK_M_G4X	0x71060
-+#define   PIPEA_DP_LINK_M_MASK			(0xffffff)
-+
-+#define _PIPEA_LINK_N_G4X	0x70064
-+#define _PIPEB_LINK_N_G4X	0x71064
-+#define   PIPEA_DP_LINK_N_MASK			(0xffffff)
-+
-+#define PIPE_DATA_M_G4X(pipe) _PIPE(pipe, _PIPEA_DATA_M_G4X, _PIPEB_DATA_M_G4X)
-+#define PIPE_DATA_N_G4X(pipe) _PIPE(pipe, _PIPEA_DATA_N_G4X, _PIPEB_DATA_N_G4X)
-+#define PIPE_LINK_M_G4X(pipe) _PIPE(pipe, _PIPEA_LINK_M_G4X, _PIPEB_LINK_M_G4X)
-+#define PIPE_LINK_N_G4X(pipe) _PIPE(pipe, _PIPEA_LINK_N_G4X, _PIPEB_LINK_N_G4X)
- 
- /* Display & cursor control */
- 
-@@ -3953,14 +3956,14 @@
- #define  TRANS_VSYNC_START_SHIFT	0
- #define _PCH_TRANS_VSYNCSHIFT_A		0xe0028
- 
--#define _TRANSA_DATA_M1          0xe0030
--#define _TRANSA_DATA_N1          0xe0034
--#define _TRANSA_DATA_M2          0xe0038
--#define _TRANSA_DATA_N2          0xe003c
--#define _TRANSA_DP_LINK_M1       0xe0040
--#define _TRANSA_DP_LINK_N1       0xe0044
--#define _TRANSA_DP_LINK_M2       0xe0048
--#define _TRANSA_DP_LINK_N2       0xe004c
-+#define _PCH_TRANSA_DATA_M1	0xe0030
-+#define _PCH_TRANSA_DATA_N1	0xe0034
-+#define _PCH_TRANSA_DATA_M2	0xe0038
-+#define _PCH_TRANSA_DATA_N2	0xe003c
-+#define _PCH_TRANSA_LINK_M1	0xe0040
-+#define _PCH_TRANSA_LINK_N1	0xe0044
-+#define _PCH_TRANSA_LINK_M2	0xe0048
-+#define _PCH_TRANSA_LINK_N2	0xe004c
- 
- /* Per-transcoder DIP controls */
- 
-@@ -4046,23 +4049,23 @@
- #define PCH_TRANS_VSYNCSHIFT(pipe) _PIPE(pipe, _PCH_TRANS_VSYNCSHIFT_A, \
- 					 _PCH_TRANS_VSYNCSHIFT_B)
- 
--#define _TRANSB_DATA_M1          0xe1030
--#define _TRANSB_DATA_N1          0xe1034
--#define _TRANSB_DATA_M2          0xe1038
--#define _TRANSB_DATA_N2          0xe103c
--#define _TRANSB_DP_LINK_M1       0xe1040
--#define _TRANSB_DP_LINK_N1       0xe1044
--#define _TRANSB_DP_LINK_M2       0xe1048
--#define _TRANSB_DP_LINK_N2       0xe104c
--
--#define TRANSDATA_M1(pipe) _PIPE(pipe, _TRANSA_DATA_M1, _TRANSB_DATA_M1)
--#define TRANSDATA_N1(pipe) _PIPE(pipe, _TRANSA_DATA_N1, _TRANSB_DATA_N1)
--#define TRANSDATA_M2(pipe) _PIPE(pipe, _TRANSA_DATA_M2, _TRANSB_DATA_M2)
--#define TRANSDATA_N2(pipe) _PIPE(pipe, _TRANSA_DATA_N2, _TRANSB_DATA_N2)
--#define TRANSDPLINK_M1(pipe) _PIPE(pipe, _TRANSA_DP_LINK_M1, _TRANSB_DP_LINK_M1)
--#define TRANSDPLINK_N1(pipe) _PIPE(pipe, _TRANSA_DP_LINK_N1, _TRANSB_DP_LINK_N1)
--#define TRANSDPLINK_M2(pipe) _PIPE(pipe, _TRANSA_DP_LINK_M2, _TRANSB_DP_LINK_M2)
--#define TRANSDPLINK_N2(pipe) _PIPE(pipe, _TRANSA_DP_LINK_N2, _TRANSB_DP_LINK_N2)
-+#define _PCH_TRANSB_DATA_M1	0xe1030
-+#define _PCH_TRANSB_DATA_N1	0xe1034
-+#define _PCH_TRANSB_DATA_M2	0xe1038
-+#define _PCH_TRANSB_DATA_N2	0xe103c
-+#define _PCH_TRANSB_LINK_M1	0xe1040
-+#define _PCH_TRANSB_LINK_N1	0xe1044
-+#define _PCH_TRANSB_LINK_M2	0xe1048
-+#define _PCH_TRANSB_LINK_N2	0xe104c
-+
-+#define PCH_TRANS_DATA_M1(pipe) _PIPE(pipe, _PCH_TRANSA_DATA_M1, _PCH_TRANSB_DATA_M1)
-+#define PCH_TRANS_DATA_N1(pipe) _PIPE(pipe, _PCH_TRANSA_DATA_N1, _PCH_TRANSB_DATA_N1)
-+#define PCH_TRANS_DATA_M2(pipe) _PIPE(pipe, _PCH_TRANSA_DATA_M2, _PCH_TRANSB_DATA_M2)
-+#define PCH_TRANS_DATA_N2(pipe) _PIPE(pipe, _PCH_TRANSA_DATA_N2, _PCH_TRANSB_DATA_N2)
-+#define PCH_TRANS_LINK_M1(pipe) _PIPE(pipe, _PCH_TRANSA_LINK_M1, _PCH_TRANSB_LINK_M1)
-+#define PCH_TRANS_LINK_N1(pipe) _PIPE(pipe, _PCH_TRANSA_LINK_N1, _PCH_TRANSB_LINK_N1)
-+#define PCH_TRANS_LINK_M2(pipe) _PIPE(pipe, _PCH_TRANSA_LINK_M2, _PCH_TRANSB_LINK_M2)
-+#define PCH_TRANS_LINK_N2(pipe) _PIPE(pipe, _PCH_TRANSA_LINK_N2, _PCH_TRANSB_LINK_N2)
- 
- #define _PCH_TRANSACONF              0xf0008
- #define _PCH_TRANSBCONF              0xf1008
---- a/drivers/gpu/drm/i915/i915_ums.c
-+++ b/drivers/gpu/drm/i915/i915_ums.c
-@@ -259,14 +259,14 @@ void i915_save_display_reg(struct drm_de
- 		dev_priv->regfile.saveDP_B = I915_READ(DP_B);
- 		dev_priv->regfile.saveDP_C = I915_READ(DP_C);
- 		dev_priv->regfile.saveDP_D = I915_READ(DP_D);
--		dev_priv->regfile.savePIPEA_GMCH_DATA_M = I915_READ(_PIPEA_GMCH_DATA_M);
--		dev_priv->regfile.savePIPEB_GMCH_DATA_M = I915_READ(_PIPEB_GMCH_DATA_M);
--		dev_priv->regfile.savePIPEA_GMCH_DATA_N = I915_READ(_PIPEA_GMCH_DATA_N);
--		dev_priv->regfile.savePIPEB_GMCH_DATA_N = I915_READ(_PIPEB_GMCH_DATA_N);
--		dev_priv->regfile.savePIPEA_DP_LINK_M = I915_READ(_PIPEA_DP_LINK_M);
--		dev_priv->regfile.savePIPEB_DP_LINK_M = I915_READ(_PIPEB_DP_LINK_M);
--		dev_priv->regfile.savePIPEA_DP_LINK_N = I915_READ(_PIPEA_DP_LINK_N);
--		dev_priv->regfile.savePIPEB_DP_LINK_N = I915_READ(_PIPEB_DP_LINK_N);
-+		dev_priv->regfile.savePIPEA_GMCH_DATA_M = I915_READ(_PIPEA_DATA_M_G4X);
-+		dev_priv->regfile.savePIPEB_GMCH_DATA_M = I915_READ(_PIPEB_DATA_M_G4X);
-+		dev_priv->regfile.savePIPEA_GMCH_DATA_N = I915_READ(_PIPEA_DATA_N_G4X);
-+		dev_priv->regfile.savePIPEB_GMCH_DATA_N = I915_READ(_PIPEB_DATA_N_G4X);
-+		dev_priv->regfile.savePIPEA_DP_LINK_M = I915_READ(_PIPEA_LINK_M_G4X);
-+		dev_priv->regfile.savePIPEB_DP_LINK_M = I915_READ(_PIPEB_LINK_M_G4X);
-+		dev_priv->regfile.savePIPEA_DP_LINK_N = I915_READ(_PIPEA_LINK_N_G4X);
-+		dev_priv->regfile.savePIPEB_DP_LINK_N = I915_READ(_PIPEB_LINK_N_G4X);
- 	}
- 	/* FIXME: regfile.save TV & SDVO state */
- 
-@@ -282,14 +282,14 @@ void i915_restore_display_reg(struct drm
- 
- 	/* Display port ratios (must be done before clock is set) */
- 	if (SUPPORTS_INTEGRATED_DP(dev)) {
--		I915_WRITE(_PIPEA_GMCH_DATA_M, dev_priv->regfile.savePIPEA_GMCH_DATA_M);
--		I915_WRITE(_PIPEB_GMCH_DATA_M, dev_priv->regfile.savePIPEB_GMCH_DATA_M);
--		I915_WRITE(_PIPEA_GMCH_DATA_N, dev_priv->regfile.savePIPEA_GMCH_DATA_N);
--		I915_WRITE(_PIPEB_GMCH_DATA_N, dev_priv->regfile.savePIPEB_GMCH_DATA_N);
--		I915_WRITE(_PIPEA_DP_LINK_M, dev_priv->regfile.savePIPEA_DP_LINK_M);
--		I915_WRITE(_PIPEB_DP_LINK_M, dev_priv->regfile.savePIPEB_DP_LINK_M);
--		I915_WRITE(_PIPEA_DP_LINK_N, dev_priv->regfile.savePIPEA_DP_LINK_N);
--		I915_WRITE(_PIPEB_DP_LINK_N, dev_priv->regfile.savePIPEB_DP_LINK_N);
-+		I915_WRITE(_PIPEA_DATA_M_G4X, dev_priv->regfile.savePIPEA_GMCH_DATA_M);
-+		I915_WRITE(_PIPEB_DATA_M_G4X, dev_priv->regfile.savePIPEB_GMCH_DATA_M);
-+		I915_WRITE(_PIPEA_DATA_N_G4X, dev_priv->regfile.savePIPEA_GMCH_DATA_N);
-+		I915_WRITE(_PIPEB_DATA_N_G4X, dev_priv->regfile.savePIPEB_GMCH_DATA_N);
-+		I915_WRITE(_PIPEA_LINK_M_G4X, dev_priv->regfile.savePIPEA_DP_LINK_M);
-+		I915_WRITE(_PIPEB_LINK_M_G4X, dev_priv->regfile.savePIPEB_DP_LINK_M);
-+		I915_WRITE(_PIPEA_LINK_N_G4X, dev_priv->regfile.savePIPEA_DP_LINK_N);
-+		I915_WRITE(_PIPEB_LINK_N_G4X, dev_priv->regfile.savePIPEB_DP_LINK_N);
- 	}
- 
- 	/* Fences */
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -4395,10 +4395,10 @@ static void intel_pch_transcoder_set_m_n
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	int pipe = crtc->pipe;
- 
--	I915_WRITE(TRANSDATA_M1(pipe), TU_SIZE(m_n->tu) | m_n->gmch_m);
--	I915_WRITE(TRANSDATA_N1(pipe), m_n->gmch_n);
--	I915_WRITE(TRANSDPLINK_M1(pipe), m_n->link_m);
--	I915_WRITE(TRANSDPLINK_N1(pipe), m_n->link_n);
-+	I915_WRITE(PCH_TRANS_DATA_M1(pipe), TU_SIZE(m_n->tu) | m_n->gmch_m);
-+	I915_WRITE(PCH_TRANS_DATA_N1(pipe), m_n->gmch_n);
-+	I915_WRITE(PCH_TRANS_LINK_M1(pipe), m_n->link_m);
-+	I915_WRITE(PCH_TRANS_LINK_N1(pipe), m_n->link_n);
- }
- 
- static void intel_cpu_transcoder_set_m_n(struct intel_crtc *crtc,
-@@ -4415,10 +4415,10 @@ static void intel_cpu_transcoder_set_m_n
- 		I915_WRITE(PIPE_LINK_M1(transcoder), m_n->link_m);
- 		I915_WRITE(PIPE_LINK_N1(transcoder), m_n->link_n);
- 	} else {
--		I915_WRITE(PIPE_GMCH_DATA_M(pipe), TU_SIZE(m_n->tu) | m_n->gmch_m);
--		I915_WRITE(PIPE_GMCH_DATA_N(pipe), m_n->gmch_n);
--		I915_WRITE(PIPE_DP_LINK_M(pipe), m_n->link_m);
--		I915_WRITE(PIPE_DP_LINK_N(pipe), m_n->link_n);
-+		I915_WRITE(PIPE_DATA_M_G4X(pipe), TU_SIZE(m_n->tu) | m_n->gmch_m);
-+		I915_WRITE(PIPE_DATA_N_G4X(pipe), m_n->gmch_n);
-+		I915_WRITE(PIPE_LINK_M_G4X(pipe), m_n->link_m);
-+		I915_WRITE(PIPE_LINK_N_G4X(pipe), m_n->link_n);
- 	}
- }
- 
diff --git a/patches.baytrail/0116-drm-i915-make-intel_cpt_verify_modeset-static.patch b/patches.baytrail/0116-drm-i915-make-intel_cpt_verify_modeset-static.patch
deleted file mode 100644
index 6a214344af1f8..0000000000000
--- a/patches.baytrail/0116-drm-i915-make-intel_cpt_verify_modeset-static.patch
+++ /dev/null
@@ -1,54 +0,0 @@
-From 0830eaca32a57729894d179c7ffa376ceb527dc5 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Fri, 3 May 2013 11:49:50 +0200
-Subject: drm/i915: make intel_cpt_verify_modeset static
-
-Only one caller. Also drop the intel_ prefix as is now customary for
-platform specific and static functions.
-
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit a1520318a51d6c21b1d9229a9c35b4fcb890b175)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 4 ++--
- drivers/gpu/drm/i915/intel_drv.h     | 1 -
- 2 files changed, 2 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 3915973ca2df..41df62afc08c 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -3229,7 +3229,7 @@ prepare: /* separate function? */
- 	return pll;
- }
- 
--void intel_cpt_verify_modeset(struct drm_device *dev, int pipe)
-+static void cpt_verify_modeset(struct drm_device *dev, int pipe)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	int dslreg = PIPEDSL(pipe);
-@@ -3334,7 +3334,7 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc)
- 		encoder->enable(encoder);
- 
- 	if (HAS_PCH_CPT(dev))
--		intel_cpt_verify_modeset(dev, intel_crtc->pipe);
-+		cpt_verify_modeset(dev, intel_crtc->pipe);
- 
- 	/*
- 	 * There seems to be a race in PCH platform hw (at least on some
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index ce12398c34a6..1e79be305396 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -719,7 +719,6 @@ extern void assert_pipe(struct drm_i915_private *dev_priv, enum pipe pipe,
- extern void intel_init_clock_gating(struct drm_device *dev);
- extern void intel_write_eld(struct drm_encoder *encoder,
- 			    struct drm_display_mode *mode);
--extern void intel_cpt_verify_modeset(struct drm_device *dev, int pipe);
- extern void intel_prepare_ddi(struct drm_device *dev);
- extern void hsw_fdi_link_train(struct drm_crtc *crtc);
- extern void intel_ddi_init(struct drm_device *dev, enum port port);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0117-drm-i915-Assert-mutex_is_locked-on-context-lookup.patch b/patches.baytrail/0117-drm-i915-Assert-mutex_is_locked-on-context-lookup.patch
deleted file mode 100644
index be69cbcf3d329..0000000000000
--- a/patches.baytrail/0117-drm-i915-Assert-mutex_is_locked-on-context-lookup.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From fb62a7a27c88ebb40af5d53dca686287413af01d Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Tue, 23 Apr 2013 23:15:29 -0700
-Subject: drm/i915: Assert mutex_is_locked on context lookup
-
-Because our context refcounting doesn't grab a ref at lookup time, it is
-unsafe to do so without the lock.
-
-NOTE: We don't have an easy way to put the assertion in the lookup
-function which is where this really belongs. Context switching is good
-enough because it actually asserts even more correctness by protecting
-the default_context.
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-[danvet: s/BUG/WARN/]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 186507e9e8e89d5920305fdffd8cbba6366da795)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem_context.c |    2 ++
- 1 file changed, 2 insertions(+)
-
---- a/drivers/gpu/drm/i915/i915_gem_context.c
-+++ b/drivers/gpu/drm/i915/i915_gem_context.c
-@@ -461,6 +461,8 @@ int i915_switch_context(struct intel_rin
- 	if (dev_priv->hw_contexts_disabled)
- 		return 0;
- 
-+	WARN_ON(!mutex_is_locked(&dev_priv->dev->struct_mutex));
-+
- 	if (ring != &dev_priv->ring[RCS])
- 		return 0;
- 
diff --git a/patches.baytrail/0118-drm-i915-BUG_ON-bad-PPGTT-offset.patch b/patches.baytrail/0118-drm-i915-BUG_ON-bad-PPGTT-offset.patch
deleted file mode 100644
index 0928d1de99fad..0000000000000
--- a/patches.baytrail/0118-drm-i915-BUG_ON-bad-PPGTT-offset.patch
+++ /dev/null
@@ -1,40 +0,0 @@
-From beb91f82dc8961b39bb0a815ef62d2db08777ed4 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Tue, 23 Apr 2013 23:15:30 -0700
-Subject: drm/i915: BUG_ON bad PPGTT offset
-
-Because PPGTT PDEs within the GTT are calculated in cachelines
-(HW guys consistency ftw) we do a divide which will wreak havoc if this
-is wrong, and I know that from experience).
-
-If/when we move to multiple PPGTTs this will have to become a WARN, and
-return an error. For now however it should always be considered fatal,
-and only a developer could hit it.
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-[danvet: s/BUG/WARN]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 0a73287060cdd8fc2b50ecd216c918c2d097de59)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem_gtt.c | 2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
-index de6e7c54ea56..a22e22cfd105 100644
---- a/drivers/gpu/drm/i915/i915_gem_gtt.c
-+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
-@@ -110,6 +110,8 @@ static int gen6_ppgtt_enable(struct drm_device *dev)
- 	uint32_t pd_entry;
- 	int i;
- 
-+	WARN_ON(ppgtt->pd_offset & 0x3f);
-+
- 	pd_addr = (gen6_gtt_pte_t __iomem*)dev_priv->gtt.gsm +
- 		ppgtt->pd_offset / sizeof(gen6_gtt_pte_t);
- 	for (i = 0; i < ppgtt->num_pd_entries; i++) {
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0119-drm-i915-Extract-PDE-writes.patch b/patches.baytrail/0119-drm-i915-Extract-PDE-writes.patch
deleted file mode 100644
index 611d5826ebc20..0000000000000
--- a/patches.baytrail/0119-drm-i915-Extract-PDE-writes.patch
+++ /dev/null
@@ -1,70 +0,0 @@
-From 068bcd070c2a567005b5356da74456f5f2f4c6a7 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Tue, 23 Apr 2013 23:15:32 -0700
-Subject: drm/i915: Extract PDE writes
-
-It also makes some sense IMO to have these two functions separate
-irrespective of the number of callers.
-
-Only the single caller for now, but that will change as we add more
-PPGTTs.
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-[danvet: Resolve conflict.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 3e302542055617703b260489ec1ff6fc6f1e68cd)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem_gtt.c | 21 +++++++++++++++------
- 1 file changed, 15 insertions(+), 6 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
-index a22e22cfd105..1bddf477304a 100644
---- a/drivers/gpu/drm/i915/i915_gem_gtt.c
-+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
-@@ -100,18 +100,14 @@ static gen6_gtt_pte_t hsw_pte_encode(struct drm_device *dev,
- 	return pte;
- }
- 
--static int gen6_ppgtt_enable(struct drm_device *dev)
-+static void gen6_write_pdes(struct i915_hw_ppgtt *ppgtt)
- {
--	drm_i915_private_t *dev_priv = dev->dev_private;
--	uint32_t pd_offset;
--	struct intel_ring_buffer *ring;
--	struct i915_hw_ppgtt *ppgtt = dev_priv->mm.aliasing_ppgtt;
-+	struct drm_i915_private *dev_priv = ppgtt->dev->dev_private;
- 	gen6_gtt_pte_t __iomem *pd_addr;
- 	uint32_t pd_entry;
- 	int i;
- 
- 	WARN_ON(ppgtt->pd_offset & 0x3f);
--
- 	pd_addr = (gen6_gtt_pte_t __iomem*)dev_priv->gtt.gsm +
- 		ppgtt->pd_offset / sizeof(gen6_gtt_pte_t);
- 	for (i = 0; i < ppgtt->num_pd_entries; i++) {
-@@ -124,6 +120,19 @@ static int gen6_ppgtt_enable(struct drm_device *dev)
- 		writel(pd_entry, pd_addr + i);
- 	}
- 	readl(pd_addr);
-+}
-+
-+static int gen6_ppgtt_enable(struct drm_device *dev)
-+{
-+	drm_i915_private_t *dev_priv = dev->dev_private;
-+	uint32_t pd_offset;
-+	struct intel_ring_buffer *ring;
-+	struct i915_hw_ppgtt *ppgtt = dev_priv->mm.aliasing_ppgtt;
-+	int i;
-+
-+	BUG_ON(ppgtt->pd_offset & 0x3f);
-+
-+	gen6_write_pdes(ppgtt);
- 
- 	pd_offset = ppgtt->pd_offset;
- 	pd_offset /= 64; /* in cachelines, */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0120-drm-i915-Fix-declaration-of-intel_gmbus_-is_forced_b.patch b/patches.baytrail/0120-drm-i915-Fix-declaration-of-intel_gmbus_-is_forced_b.patch
deleted file mode 100644
index ddf725f5b641b..0000000000000
--- a/patches.baytrail/0120-drm-i915-Fix-declaration-of-intel_gmbus_-is_forced_b.patch
+++ /dev/null
@@ -1,60 +0,0 @@
-From 8a8ff6c93bfa455d5dfad94507fd669396a086cf Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Jan-Simon=20M=C3=B6ller?= <dl9pf@gmx.de>
-Date: Mon, 6 May 2013 14:52:08 +0200
-Subject: drm/i915: Fix declaration of
- intel_gmbus_{is_forced_bit/is_port_falid}
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Description:
-intel_gmbus_is_forced_bit is no extern as its body is right below.
-Likewise for intel_gmbus_is_port_valid.
-
-This fixes a compilation issue with clang. An initial version of this patch
-was developed by PaX Team <pageexec at freemail.hu>.
-This is respin of this patch.
-
-20130509: v2: (re-)add inline upon request.
-
-Signed-off-by: Jan-Simon Möller <dl9pf@gmx.de>
-CC: pageexec@freemail.hu
-CC: daniel.vetter@ffwll.ch
-CC: airlied@linux.ie
-CC: intel-gfx@lists.freedesktop.org
-CC: dri-devel@lists.freedesktop.org
-CC: linux-kernel@vger.kernel.org
-[danvet: Bikeshed commit message.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 8f375e10ee47b9d7b9b3aefcf67854c6e92708be)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index b5cdc737232f..1c8896cbbf11 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1813,7 +1813,7 @@ void i915_teardown_sysfs(struct drm_device *dev_priv);
- /* intel_i2c.c */
- extern int intel_setup_gmbus(struct drm_device *dev);
- extern void intel_teardown_gmbus(struct drm_device *dev);
--extern inline bool intel_gmbus_is_port_valid(unsigned port)
-+static inline bool intel_gmbus_is_port_valid(unsigned port)
- {
- 	return (port >= GMBUS_PORT_SSC && port <= GMBUS_PORT_DPD);
- }
-@@ -1822,7 +1822,7 @@ extern struct i2c_adapter *intel_gmbus_get_adapter(
- 		struct drm_i915_private *dev_priv, unsigned port);
- extern void intel_gmbus_set_speed(struct i2c_adapter *adapter, int speed);
- extern void intel_gmbus_force_bit(struct i2c_adapter *adapter, bool force_bit);
--extern inline bool intel_gmbus_is_forced_bit(struct i2c_adapter *adapter)
-+static inline bool intel_gmbus_is_forced_bit(struct i2c_adapter *adapter)
- {
- 	return container_of(adapter, struct intel_gmbus, adapter)->force_bit;
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0121-drm-i915-read-current-freq-from-Punit-on-VLV.patch b/patches.baytrail/0121-drm-i915-read-current-freq-from-Punit-on-VLV.patch
deleted file mode 100644
index efa3415a31440..0000000000000
--- a/patches.baytrail/0121-drm-i915-read-current-freq-from-Punit-on-VLV.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From 97e7d634e0ec64c8977e8584f3067d09b7ca4efc Mon Sep 17 00:00:00 2001
-From: Jesse Barnes <jbarnes@virtuousgeek.org>
-Date: Thu, 2 May 2013 10:48:07 -0700
-Subject: drm/i915: read current freq from Punit on VLV
-
-Instead of returning the cached value, which is just what the kernel
-requested.
-
-Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
-Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 177006a10b33c9bd729cd60be0a37b41a23e4df3)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_sysfs.c | 9 ++++++---
- 1 file changed, 6 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c
-index ca00df2de07b..c0d7875b475c 100644
---- a/drivers/gpu/drm/i915/i915_sysfs.c
-+++ b/drivers/gpu/drm/i915/i915_sysfs.c
-@@ -212,10 +212,13 @@ static ssize_t gt_cur_freq_mhz_show(struct device *kdev,
- 	int ret;
- 
- 	mutex_lock(&dev_priv->rps.hw_lock);
--	if (IS_VALLEYVIEW(dev_priv->dev))
--		ret = vlv_gpu_freq(dev_priv->mem_freq, dev_priv->rps.cur_delay);
--	else
-+	if (IS_VALLEYVIEW(dev_priv->dev)) {
-+		u32 freq;
-+		valleyview_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS, &freq);
-+		ret = vlv_gpu_freq(dev_priv->mem_freq, (freq >> 8) & 0xff);
-+	} else {
- 		ret = dev_priv->rps.cur_delay * GT_FREQUENCY_MULTIPLIER;
-+	}
- 	mutex_unlock(&dev_priv->rps.hw_lock);
- 
- 	return snprintf(buf, PAGE_SIZE, "%d\n", ret);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0122-drm-i915-go-back-to-switch-for-VLV-mem-freq-detectio.patch b/patches.baytrail/0122-drm-i915-go-back-to-switch-for-VLV-mem-freq-detectio.patch
deleted file mode 100644
index 4ed79de6d9af7..0000000000000
--- a/patches.baytrail/0122-drm-i915-go-back-to-switch-for-VLV-mem-freq-detectio.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From 7fca879e3e68b2240cee2a10a9bceaf455d0e7a3 Mon Sep 17 00:00:00 2001
-From: Jesse Barnes <jbarnes@virtuousgeek.org>
-Date: Thu, 2 May 2013 10:48:08 -0700
-Subject: drm/i915: go back to switch for VLV mem freq detection v2
-
-Both the docs and the existing code were wrong.  So fix both and use a
-switch statement like we do elsewhere to make things simple & clear.
-
-Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 2445966ee80837116498bd83084ad6d28272320c)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 13 ++++++++++++-
- 1 file changed, 12 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 5977599bde42..c0a4f68f8a49 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2902,7 +2902,18 @@ static void valleyview_enable_rps(struct drm_device *dev)
- 		   GEN7_RC_CTL_TO_MODE);
- 
- 	valleyview_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS, &val);
--	dev_priv->mem_freq = 800 + (266 * (val >> 6) & 3);
-+	switch ((val >> 6) & 3) {
-+	case 0:
-+	case 1:
-+		dev_priv->mem_freq = 800;
-+		break;
-+	case 2:
-+		dev_priv->mem_freq = 1066;
-+		break;
-+	case 3:
-+		dev_priv->mem_freq = 1333;
-+		break;
-+	}
- 	DRM_DEBUG_DRIVER("DDR speed: %d MHz", dev_priv->mem_freq);
- 
- 	DRM_DEBUG_DRIVER("GPLL enabled? %s\n", val & 0x10 ? "yes" : "no");
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0123-drm-i915-fix-panel-fitting-on-LVDS-on-ILK-v2.patch b/patches.baytrail/0123-drm-i915-fix-panel-fitting-on-LVDS-on-ILK-v2.patch
deleted file mode 100644
index 9459a92d20870..0000000000000
--- a/patches.baytrail/0123-drm-i915-fix-panel-fitting-on-LVDS-on-ILK-v2.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From efd13db78707e9745a874a32e75df44ebf6b1920 Mon Sep 17 00:00:00 2001
-From: Jesse Barnes <jbarnes@virtuousgeek.org>
-Date: Fri, 3 May 2013 13:26:37 -0700
-Subject: drm/i915: fix panel fitting on LVDS on ILK+ v2
-
-This regression was introduced in:
-
-commit b074cec8c652f2d273907a4b35239b4766c894ac
-Author: Jesse Barnes <jbarnes@virtuousgeek.org>
-Date:   Thu Apr 25 12:55:02 2013 -0700
-
-    drm/i915: move PCH pfit controls into pipe_config
-
-In refactoring this, it was only applied to eDP, which is incorrect.  In
-fact, if we ever use the panel fitter to deal with overscan on HDMI,
-we'll need to extend it again, so just drop the conditional altogether.
-
-v2: drop check for eDP since we can use the fitter in any config (Daniel)
-
-Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 0ef37f3f5e33eae7d6c388a7b374397794beca39)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 3 +--
- 1 file changed, 1 insertion(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 41df62afc08c..745bcca57db6 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -3249,8 +3249,7 @@ static void ironlake_pfit_enable(struct intel_crtc *crtc)
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	int pipe = crtc->pipe;
- 
--	if (crtc->config.pch_pfit.size &&
--	    intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_EDP)) {
-+	if (crtc->config.pch_pfit.size) {
- 		/* Force use of hard-coded filter coefficients
- 		 * as some pre-programmed values are broken,
- 		 * e.g. x201.
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0124-drm-i915-set-proper-DPIO-post-divider-for-VGA-on-VLV.patch b/patches.baytrail/0124-drm-i915-set-proper-DPIO-post-divider-for-VGA-on-VLV.patch
deleted file mode 100644
index b439904d2ef57..0000000000000
--- a/patches.baytrail/0124-drm-i915-set-proper-DPIO-post-divider-for-VGA-on-VLV.patch
+++ /dev/null
@@ -1,49 +0,0 @@
-From 412c0089d9c529c571dc103885b206841d856db9 Mon Sep 17 00:00:00 2001
-From: Jesse Barnes <jbarnes@virtuousgeek.org>
-Date: Thu, 2 May 2013 10:48:09 -0700
-Subject: drm/i915: set proper DPIO post divider for VGA on VLV v4
-
-Supposedly we should use the DAC divider for <300MHz pixel clocks, but as
-that doesn't actually work as well as the high freq divider here in
-practice, just use the high freq divider all the time.
-
-v2: remove unconditional write (Jesse)
-    check for pixel rate properly (Jesse)
-v3: give up, the DAC divider apparently doesn't work, and low res modes
-    work ok (Jesse)
-    remove debug msg (Jesse)
-
-Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Tested-by: Kenneth Graunke <kenneth@whitecape.org>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 7df5080bc7f3e3fba9cddac71133ed52864c40be)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 11 +++++++----
- 1 file changed, 7 insertions(+), 4 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 745bcca57db6..b13dc43725da 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -4474,10 +4474,13 @@ static void vlv_update_pll(struct intel_crtc *crtc)
- 	mdiv |= ((bestp1 << DPIO_P1_SHIFT) | (bestp2 << DPIO_P2_SHIFT));
- 	mdiv |= ((bestn << DPIO_N_SHIFT));
- 	mdiv |= (1 << DPIO_K_SHIFT);
--	if (intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_HDMI) ||
--	    intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_EDP) ||
--	    intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_DISPLAYPORT))
--		mdiv |= (DPIO_POST_DIV_HDMIDP << DPIO_POST_DIV_SHIFT);
-+
-+	/*
-+	 * Post divider depends on pixel clock rate, DAC vs digital (and LVDS,
-+	 * but we don't support that).
-+	 * Note: don't use the DAC post divider as it seems unstable.
-+	 */
-+	mdiv |= (DPIO_POST_DIV_HDMIDP << DPIO_POST_DIV_SHIFT);
- 	intel_dpio_write(dev_priv, DPIO_DIV(pipe), mdiv);
- 
- 	mdiv |= DPIO_ENABLE_CALIBRATION;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0125-drm-i915-add-intel_display_power_enabled.patch b/patches.baytrail/0125-drm-i915-add-intel_display_power_enabled.patch
deleted file mode 100644
index aca8818f389ee..0000000000000
--- a/patches.baytrail/0125-drm-i915-add-intel_display_power_enabled.patch
+++ /dev/null
@@ -1,148 +0,0 @@
-From 2cdd2a5774fa76ce0eb7b7a34f9d79580b511f6c Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Fri, 3 May 2013 12:15:36 -0300
-Subject: drm/i915: add intel_display_power_enabled
-
-This should replace intel_using_power_well. The idea is that we're
-adding the requested power domain as an argument, so this might enable
-the code to look less platform-specific and also allows us to easily
-add new domains in case we need.
-
-v2: Add more domains to enum intel_display_power_domain
-v3: Even more domains requested
-
-Requested-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit b97186f0d94808ce94cd9b77b40e78f2fbd6e6b2)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h      | 18 ++++++++++++++++++
- drivers/gpu/drm/i915/intel_display.c | 11 ++++++-----
- drivers/gpu/drm/i915/intel_drv.h     |  3 ++-
- drivers/gpu/drm/i915/intel_pm.c      | 24 ++++++++++++++++++++----
- 4 files changed, 46 insertions(+), 10 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 1c8896cbbf11..eee5f8358579 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -88,6 +88,24 @@ enum port {
- };
- #define port_name(p) ((p) + 'A')
- 
-+enum intel_display_power_domain {
-+	POWER_DOMAIN_PIPE_A,
-+	POWER_DOMAIN_PIPE_B,
-+	POWER_DOMAIN_PIPE_C,
-+	POWER_DOMAIN_PIPE_A_PANEL_FITTER,
-+	POWER_DOMAIN_PIPE_B_PANEL_FITTER,
-+	POWER_DOMAIN_PIPE_C_PANEL_FITTER,
-+	POWER_DOMAIN_TRANSCODER_A,
-+	POWER_DOMAIN_TRANSCODER_B,
-+	POWER_DOMAIN_TRANSCODER_C,
-+	POWER_DOMAIN_TRANSCODER_EDP = POWER_DOMAIN_TRANSCODER_A + 0xF,
-+};
-+
-+#define POWER_DOMAIN_PIPE(pipe) ((pipe) + POWER_DOMAIN_PIPE_A)
-+#define POWER_DOMAIN_PIPE_PANEL_FITTER(pipe) \
-+		((pipe) + POWER_DOMAIN_PIPE_A_PANEL_FITTER)
-+#define POWER_DOMAIN_TRANSCODER(tran) ((tran) + POWER_DOMAIN_TRANSCODER_A)
-+
- enum hpd_pin {
- 	HPD_NONE = 0,
- 	HPD_PORT_A = HPD_NONE, /* PORT_A is internal */
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index b13dc43725da..4978de91fa5d 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -1110,8 +1110,8 @@ void assert_pipe(struct drm_i915_private *dev_priv,
- 	if (pipe == PIPE_A && dev_priv->quirks & QUIRK_PIPEA_FORCE)
- 		state = true;
- 
--	if (!intel_using_power_well(dev_priv->dev) &&
--	    cpu_transcoder != TRANSCODER_EDP) {
-+	if (!intel_display_power_enabled(dev_priv->dev,
-+				POWER_DOMAIN_TRANSCODER(cpu_transcoder))) {
- 		cur_state = false;
- 	} else {
- 		reg = PIPECONF(cpu_transcoder);
-@@ -3532,7 +3532,8 @@ static void haswell_crtc_disable(struct drm_crtc *crtc)
- 	/* XXX: Once we have proper panel fitter state tracking implemented with
- 	 * hardware state read/check support we should switch to only disable
- 	 * the panel fitter when we know it's used. */
--	if (intel_using_power_well(dev)) {
-+	if (intel_display_power_enabled(dev,
-+					POWER_DOMAIN_PIPE_PANEL_FITTER(pipe))) {
- 		I915_WRITE(PF_CTL(pipe), 0);
- 		I915_WRITE(PF_WIN_SZ(pipe), 0);
- 	}
-@@ -6051,8 +6052,8 @@ static bool haswell_get_pipe_config(struct intel_crtc *crtc,
- 	enum transcoder cpu_transcoder = crtc->config.cpu_transcoder;
- 	uint32_t tmp;
- 
--	if (!intel_using_power_well(dev_priv->dev) &&
--	    cpu_transcoder != TRANSCODER_EDP)
-+	if (!intel_display_power_enabled(dev,
-+			POWER_DOMAIN_TRANSCODER(cpu_transcoder)))
- 		return false;
- 
- 	tmp = I915_READ(PIPECONF(cpu_transcoder));
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index 1e79be305396..e0d68179d80e 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -755,7 +755,8 @@ extern void intel_update_fbc(struct drm_device *dev);
- extern void intel_gpu_ips_init(struct drm_i915_private *dev_priv);
- extern void intel_gpu_ips_teardown(void);
- 
--extern bool intel_using_power_well(struct drm_device *dev);
-+extern bool intel_display_power_enabled(struct drm_device *dev,
-+					enum intel_display_power_domain domain);
- extern void intel_init_power_well(struct drm_device *dev);
- extern void intel_set_power_well(struct drm_device *dev, bool enable);
- extern void intel_enable_gt_powersave(struct drm_device *dev);
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index c0a4f68f8a49..2f94a1c1f4a5 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -4344,15 +4344,31 @@ void intel_init_clock_gating(struct drm_device *dev)
-  * enable it, so check if it's enabled and also check if we've requested it to
-  * be enabled.
-  */
--bool intel_using_power_well(struct drm_device *dev)
-+bool intel_display_power_enabled(struct drm_device *dev,
-+				 enum intel_display_power_domain domain)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 
--	if (IS_HASWELL(dev))
-+	if (!HAS_POWER_WELL(dev))
-+		return true;
-+
-+	switch (domain) {
-+	case POWER_DOMAIN_PIPE_A:
-+	case POWER_DOMAIN_TRANSCODER_EDP:
-+		return true;
-+	case POWER_DOMAIN_PIPE_B:
-+	case POWER_DOMAIN_PIPE_C:
-+	case POWER_DOMAIN_PIPE_A_PANEL_FITTER:
-+	case POWER_DOMAIN_PIPE_B_PANEL_FITTER:
-+	case POWER_DOMAIN_PIPE_C_PANEL_FITTER:
-+	case POWER_DOMAIN_TRANSCODER_A:
-+	case POWER_DOMAIN_TRANSCODER_B:
-+	case POWER_DOMAIN_TRANSCODER_C:
- 		return I915_READ(HSW_PWR_WELL_DRIVER) ==
- 		       (HSW_PWR_WELL_ENABLE | HSW_PWR_WELL_STATE);
--	else
--		return true;
-+	default:
-+		BUG();
-+	}
- }
- 
- void intel_set_power_well(struct drm_device *dev, bool enable)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0126-drm-i915-add-power-well-and-cpu-transcoder-info-to-t.patch b/patches.baytrail/0126-drm-i915-add-power-well-and-cpu-transcoder-info-to-t.patch
deleted file mode 100644
index 4a090e6597ea5..0000000000000
--- a/patches.baytrail/0126-drm-i915-add-power-well-and-cpu-transcoder-info-to-t.patch
+++ /dev/null
@@ -1,64 +0,0 @@
-From 1502d4c0ce6baa9003fa855f3bdec24591d4b919 Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Fri, 3 May 2013 12:15:37 -0300
-Subject: drm/i915: add power well and cpu transcoder info to the error state
-
-We need to dump these registers if we want to properly interpret the
-others.
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit ff57f1b095e7c3ad0720193cd341d8ac1c781156)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c |   13 +++++++++++++
- 1 file changed, 13 insertions(+)
-
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -9814,6 +9814,9 @@ int intel_modeset_vga_set_state(struct d
- #include <linux/seq_file.h>
- 
- struct intel_display_error_state {
-+
-+	u32 power_well_driver;
-+
- 	struct intel_cursor_error_state {
- 		u32 control;
- 		u32 position;
-@@ -9822,6 +9825,7 @@ struct intel_display_error_state {
- 	} cursor[I915_MAX_PIPES];
- 
- 	struct intel_pipe_error_state {
-+		enum transcoder cpu_transcoder;
- 		u32 conf;
- 		u32 source;
- 
-@@ -9856,8 +9860,12 @@ intel_display_capture_error_state(struct
- 	if (error == NULL)
- 		return NULL;
- 
-+	if (HAS_POWER_WELL(dev))
-+		error->power_well_driver = I915_READ(HSW_PWR_WELL_DRIVER);
-+
- 	for_each_pipe(i) {
- 		cpu_transcoder = intel_pipe_to_cpu_transcoder(dev_priv, i);
-+		error->pipe[i].cpu_transcoder = cpu_transcoder;
- 
- 		if (INTEL_INFO(dev)->gen <= 6 || IS_VALLEYVIEW(dev)) {
- 			error->cursor[i].control = I915_READ(CURCNTR(i));
-@@ -9903,8 +9911,13 @@ intel_display_print_error_state(struct s
- 	int i;
- 
- 	seq_printf(m, "Num Pipes: %d\n", INTEL_INFO(dev)->num_pipes);
-+	if (HAS_POWER_WELL(dev))
-+		seq_printf(m, "PWR_WELL_CTL2: %08x\n",
-+			   error->power_well_driver);
- 	for_each_pipe(i) {
- 		seq_printf(m, "Pipe [%d]:\n", i);
-+		seq_printf(m, "  CPU transcoder: %c\n",
-+			   transcoder_name(error->pipe[i].cpu_transcoder));
- 		seq_printf(m, "  CONF: %08x\n", error->pipe[i].conf);
- 		seq_printf(m, "  SRC: %08x\n", error->pipe[i].source);
- 		seq_printf(m, "  HTOTAL: %08x\n", error->pipe[i].htotal);
diff --git a/patches.baytrail/0127-drm-i915-clear-FPGA_DBG_RM_NOCLAIM-when-capturing-er.patch b/patches.baytrail/0127-drm-i915-clear-FPGA_DBG_RM_NOCLAIM-when-capturing-er.patch
deleted file mode 100644
index 69dadfa696de0..0000000000000
--- a/patches.baytrail/0127-drm-i915-clear-FPGA_DBG_RM_NOCLAIM-when-capturing-er.patch
+++ /dev/null
@@ -1,40 +0,0 @@
-From 656d6aba4a2cd5dfb2f9c4b4f49e238a278aa81c Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Fri, 3 May 2013 12:15:38 -0300
-Subject: drm/i915: clear FPGA_DBG_RM_NOCLAIM when capturing error state
-
-In the error state function we read the registers without checking if
-the power well is on, so after doing this we have to clear the
-FPGA_DBG_RM_NOCLAIM bit to prevent the next I915_WRITE from detecting
-it and printing an error message.
-
-The first version of this patch was checking for the power well state
-and then avoiding reading registers that were off, but the reviewers
-requested to just read the registers any way and then later clear the
-FPGA_DBG_RM_NOCLAIM bit.
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 12d217c795071bfee483158e1397c57e8dc3cb76)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c |    7 +++++++
- 1 file changed, 7 insertions(+)
-
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -9900,6 +9900,13 @@ intel_display_capture_error_state(struct
- 		error->pipe[i].vsync = I915_READ(VSYNC(cpu_transcoder));
- 	}
- 
-+	/* In the code above we read the registers without checking if the power
-+	 * well was on, so here we have to clear the FPGA_DBG_RM_NOCLAIM bit to
-+	 * prevent the next I915_WRITE from detecting it and printing an error
-+	 * message. */
-+	if (HAS_POWER_WELL(dev))
-+		I915_WRITE_NOTRACE(FPGA_DBG, FPGA_DBG_RM_NOCLAIM);
-+
- 	return error;
- }
- 
diff --git a/patches.baytrail/0128-drm-i915-check-the-power-well-on-i915_pipe_enabled.patch b/patches.baytrail/0128-drm-i915-check-the-power-well-on-i915_pipe_enabled.patch
deleted file mode 100644
index 871c9292a5e03..0000000000000
--- a/patches.baytrail/0128-drm-i915-check-the-power-well-on-i915_pipe_enabled.patch
+++ /dev/null
@@ -1,38 +0,0 @@
-From c59e6c26e846e04192582e28deba8a7cb8e36e3b Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Fri, 3 May 2013 12:15:39 -0300
-Subject: drm/i915: check the power well on i915_pipe_enabled
-
-This fixes "unclaimed register" messages when the power well is
-disabled and there's a GPU hang.
-
-v2: Use the new intel_display_power_enabled().
-v3: Use the new domains for intel_display_power_enabled().
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 71f8ba6b7e44fc525fb15a60997c0c5064c160e6)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 4 ++++
- 1 file changed, 4 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index 7d8cfedfaf86..ae19a7cff5f9 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -375,6 +375,10 @@ i915_pipe_enabled(struct drm_device *dev, int pipe)
- 	enum transcoder cpu_transcoder = intel_pipe_to_cpu_transcoder(dev_priv,
- 								      pipe);
- 
-+	if (!intel_display_power_enabled(dev,
-+		POWER_DOMAIN_TRANSCODER(cpu_transcoder)))
-+		return false;
-+
- 	return I915_READ(PIPECONF(cpu_transcoder)) & PIPECONF_ENABLE;
- }
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0129-drm-i915-only-disable-DDI-sound-if-intel_crtc-eld_vl.patch b/patches.baytrail/0129-drm-i915-only-disable-DDI-sound-if-intel_crtc-eld_vl.patch
deleted file mode 100644
index 4b0cafac433e7..0000000000000
--- a/patches.baytrail/0129-drm-i915-only-disable-DDI-sound-if-intel_crtc-eld_vl.patch
+++ /dev/null
@@ -1,61 +0,0 @@
-From d13af6a5925bb25ee61e52d1ef5993fa5f3ba020 Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Fri, 3 May 2013 12:15:40 -0300
-Subject: drm/i915: only disable DDI sound if intel_crtc->eld_vld
-
-We already have the same check on intel_enable_ddi. This patch
-prevents "unclaimed register" messages when the power well is
-disabled.
-
-V2: Reset intel_crtc->eld_vld to false after the mode_set function.
-V3: Add both "type != INTEL_OUTPUT_EDP" requested.
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit c77bf5659deb9405ef61080c148e47d2c8ee31e5)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_ddi.c     |   11 +++++++----
- drivers/gpu/drm/i915/intel_display.c |    2 +-
- 2 files changed, 8 insertions(+), 5 deletions(-)
-
---- a/drivers/gpu/drm/i915/intel_ddi.c
-+++ b/drivers/gpu/drm/i915/intel_ddi.c
-@@ -1312,7 +1312,7 @@ static void intel_enable_ddi(struct inte
- 		ironlake_edp_backlight_on(intel_dp);
- 	}
- 
--	if (intel_crtc->eld_vld) {
-+	if (intel_crtc->eld_vld && type != INTEL_OUTPUT_EDP) {
- 		tmp = I915_READ(HSW_AUD_PIN_ELD_CP_VLD);
- 		tmp |= ((AUDIO_OUTPUT_ENABLE_A | AUDIO_ELD_VALID_A) << (pipe * 4));
- 		I915_WRITE(HSW_AUD_PIN_ELD_CP_VLD, tmp);
-@@ -1330,9 +1330,12 @@ static void intel_disable_ddi(struct int
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	uint32_t tmp;
- 
--	tmp = I915_READ(HSW_AUD_PIN_ELD_CP_VLD);
--	tmp &= ~((AUDIO_OUTPUT_ENABLE_A | AUDIO_ELD_VALID_A) << (pipe * 4));
--	I915_WRITE(HSW_AUD_PIN_ELD_CP_VLD, tmp);
-+	if (intel_crtc->eld_vld && type != INTEL_OUTPUT_EDP) {
-+		tmp = I915_READ(HSW_AUD_PIN_ELD_CP_VLD);
-+		tmp &= ~((AUDIO_OUTPUT_ENABLE_A | AUDIO_ELD_VALID_A) <<
-+			 (pipe * 4));
-+		I915_WRITE(HSW_AUD_PIN_ELD_CP_VLD, tmp);
-+	}
- 
- 	if (type == INTEL_OUTPUT_EDP) {
- 		struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -3864,8 +3864,8 @@ static void intel_crtc_disable(struct dr
- 	/* crtc should still be enabled when we disable it. */
- 	WARN_ON(!crtc->enabled);
- 
--	intel_crtc->eld_vld = false;
- 	dev_priv->display.crtc_disable(crtc);
-+	intel_crtc->eld_vld = false;
- 	intel_crtc_update_sarea(crtc, false);
- 	dev_priv->display.off(crtc);
- 
diff --git a/patches.baytrail/0130-drm-i915-Add-platform-information-to-implemented-wor.patch b/patches.baytrail/0130-drm-i915-Add-platform-information-to-implemented-wor.patch
deleted file mode 100644
index 1d37375e791eb..0000000000000
--- a/patches.baytrail/0130-drm-i915-Add-platform-information-to-implemented-wor.patch
+++ /dev/null
@@ -1,294 +0,0 @@
-From c523a9fe6d04280ec994f1a7f88ab736c18f8e26 Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Fri, 3 May 2013 18:48:10 +0100
-Subject: drm/i915: Add platform information to implemented workarounds
-
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Reviewed-by: Imre Deak <imre.deak@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit ecdb4eb71b8f76db2bf58c86af907e7b8ee056b0)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.c |  6 ++--
- drivers/gpu/drm/i915/intel_pm.c | 77 +++++++++++++++++++++--------------------
- 2 files changed, 42 insertions(+), 41 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
-index b7fdafdb496e..7610a28a1bf6 100644
---- a/drivers/gpu/drm/i915/i915_drv.c
-+++ b/drivers/gpu/drm/i915/i915_drv.c
-@@ -1222,9 +1222,9 @@ MODULE_LICENSE("GPL and additional rights");
- static void
- ilk_dummy_write(struct drm_i915_private *dev_priv)
- {
--	/* WaIssueDummyWriteToWakeupFromRC6: Issue a dummy write to wake up the
--	 * chip from rc6 before touching it for real. MI_MODE is masked, hence
--	 * harmless to write 0 into. */
-+	/* WaIssueDummyWriteToWakeupFromRC6:ilk Issue a dummy write to wake up
-+	 * the chip from rc6 before touching it for real. MI_MODE is masked,
-+	 * hence harmless to write 0 into. */
- 	I915_WRITE_NOTRACE(MI_MODE, 0);
- }
- 
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 2f94a1c1f4a5..89fe32002246 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -3808,7 +3808,7 @@ static void ironlake_init_clock_gating(struct drm_device *dev)
- 		   _3D_CHICKEN2_WM_READ_PIPELINED << 16 |
- 		   _3D_CHICKEN2_WM_READ_PIPELINED);
- 
--	/* WaDisableRenderCachePipelinedFlush */
-+	/* WaDisableRenderCachePipelinedFlush:ilk */
- 	I915_WRITE(CACHE_MODE_0,
- 		   _MASKED_BIT_ENABLE(CM0_PIPELINED_RENDER_FLUSH_DISABLE));
- 
-@@ -3875,11 +3875,11 @@ static void gen6_init_clock_gating(struct drm_device *dev)
- 		   I915_READ(ILK_DISPLAY_CHICKEN2) |
- 		   ILK_ELPIN_409_SELECT);
- 
--	/* WaDisableHiZPlanesWhenMSAAEnabled */
-+	/* WaDisableHiZPlanesWhenMSAAEnabled:snb */
- 	I915_WRITE(_3D_CHICKEN,
- 		   _MASKED_BIT_ENABLE(_3D_CHICKEN_HIZ_PLANE_DISABLE_MSAA_4X_SNB));
- 
--	/* WaSetupGtModeTdRowDispatch */
-+	/* WaSetupGtModeTdRowDispatch:snb */
- 	if (IS_SNB_GT1(dev))
- 		I915_WRITE(GEN6_GT_MODE,
- 			   _MASKED_BIT_ENABLE(GEN6_TD_FOUR_ROW_DISPATCH_DISABLE));
-@@ -3906,8 +3906,8 @@ static void gen6_init_clock_gating(struct drm_device *dev)
- 	 * According to the spec, bit 11 (RCCUNIT) must also be set,
- 	 * but we didn't debug actual testcases to find it out.
- 	 *
--	 * Also apply WaDisableVDSUnitClockGating and
--	 * WaDisableRCPBUnitClockGating.
-+	 * Also apply WaDisableVDSUnitClockGating:snb and
-+	 * WaDisableRCPBUnitClockGating:snb.
- 	 */
- 	I915_WRITE(GEN6_UCGCTL2,
- 		   GEN7_VDSUNIT_CLOCK_GATE_DISABLE |
-@@ -3938,7 +3938,7 @@ static void gen6_init_clock_gating(struct drm_device *dev)
- 		   ILK_DPARBUNIT_CLOCK_GATE_ENABLE  |
- 		   ILK_DPFDUNIT_CLOCK_GATE_ENABLE);
- 
--	/* WaMbcDriverBootEnable */
-+	/* WaMbcDriverBootEnable:snb */
- 	I915_WRITE(GEN6_MBCTL, I915_READ(GEN6_MBCTL) |
- 		   GEN6_MBCTL_ENABLE_BOOT_FETCH);
- 
-@@ -3968,7 +3968,6 @@ static void gen7_setup_fixed_func_scheduler(struct drm_i915_private *dev_priv)
- 	reg |= GEN7_FF_VS_SCHED_HW;
- 	reg |= GEN7_FF_DS_SCHED_HW;
- 
--	/* WaVSRefCountFullforceMissDisable */
- 	if (IS_HASWELL(dev_priv->dev))
- 		reg &= ~GEN7_FF_VS_REF_CNT_FFME;
- 
-@@ -3999,21 +3998,21 @@ static void haswell_init_clock_gating(struct drm_device *dev)
- 	I915_WRITE(WM1_LP_ILK, 0);
- 
- 	/* According to the spec, bit 13 (RCZUNIT) must be set on IVB.
--	 * This implements the WaDisableRCZUnitClockGating workaround.
-+	 * This implements the WaDisableRCZUnitClockGating:hsw workaround.
- 	 */
- 	I915_WRITE(GEN6_UCGCTL2, GEN6_RCZUNIT_CLOCK_GATE_DISABLE);
- 
--	/* Apply the WaDisableRHWOOptimizationForRenderHang workaround. */
-+	/* Apply the WaDisableRHWOOptimizationForRenderHang:hsw workaround. */
- 	I915_WRITE(GEN7_COMMON_SLICE_CHICKEN1,
- 		   GEN7_CSC1_RHWO_OPT_DISABLE_IN_RCC);
- 
--	/* WaApplyL3ControlAndL3ChickenMode requires those two on Ivy Bridge */
-+	/* WaApplyL3ControlAndL3ChickenMode:hsw */
- 	I915_WRITE(GEN7_L3CNTLREG1,
- 			GEN7_WA_FOR_GEN7_L3_CONTROL);
- 	I915_WRITE(GEN7_L3_CHICKEN_MODE_REGISTER,
- 			GEN7_WA_L3_CHICKEN_MODE);
- 
--	/* This is required by WaCatErrorRejectionIssue */
-+	/* This is required by WaCatErrorRejectionIssue:hsw */
- 	I915_WRITE(GEN7_SQ_CHICKEN_MBCUNIT_CONFIG,
- 			I915_READ(GEN7_SQ_CHICKEN_MBCUNIT_CONFIG) |
- 			GEN7_SQ_CHICKEN_MBCUNIT_SQINTMOB);
-@@ -4025,17 +4024,18 @@ static void haswell_init_clock_gating(struct drm_device *dev)
- 		intel_flush_display_plane(dev_priv, pipe);
- 	}
- 
-+	/* WaVSRefCountFullforceMissDisable:hsw */
- 	gen7_setup_fixed_func_scheduler(dev_priv);
- 
--	/* WaDisable4x2SubspanOptimization */
-+	/* WaDisable4x2SubspanOptimization:hsw */
- 	I915_WRITE(CACHE_MODE_1,
- 		   _MASKED_BIT_ENABLE(PIXEL_SUBSPAN_COLLECT_OPT_DISABLE));
- 
--	/* WaMbcDriverBootEnable */
-+	/* WaMbcDriverBootEnable:hsw */
- 	I915_WRITE(GEN6_MBCTL, I915_READ(GEN6_MBCTL) |
- 		   GEN6_MBCTL_ENABLE_BOOT_FETCH);
- 
--	/* WaSwitchSolVfFArbitrationPriority */
-+	/* WaSwitchSolVfFArbitrationPriority:hsw */
- 	I915_WRITE(GAM_ECOCHK, I915_READ(GAM_ECOCHK) | HSW_ECOCHK_ARB_PRIO_SOL);
- 
- 	/* XXX: This is a workaround for early silicon revisions and should be
-@@ -4062,16 +4062,16 @@ static void ivybridge_init_clock_gating(struct drm_device *dev)
- 
- 	I915_WRITE(ILK_DSPCLK_GATE_D, ILK_VRHUNIT_CLOCK_GATE_DISABLE);
- 
--	/* WaDisableEarlyCull */
-+	/* WaDisableEarlyCull:ivb */
- 	I915_WRITE(_3D_CHICKEN3,
- 		   _MASKED_BIT_ENABLE(_3D_CHICKEN_SF_DISABLE_OBJEND_CULL));
- 
--	/* WaDisableBackToBackFlipFix */
-+	/* WaDisableBackToBackFlipFix:ivb */
- 	I915_WRITE(IVB_CHICKEN3,
- 		   CHICKEN3_DGMG_REQ_OUT_FIX_DISABLE |
- 		   CHICKEN3_DGMG_DONE_FIX_DISABLE);
- 
--	/* WaDisablePSDDualDispatchEnable */
-+	/* WaDisablePSDDualDispatchEnable:ivb */
- 	if (IS_IVB_GT1(dev))
- 		I915_WRITE(GEN7_HALF_SLICE_CHICKEN1,
- 			   _MASKED_BIT_ENABLE(GEN7_PSD_SINGLE_PORT_DISPATCH_ENABLE));
-@@ -4079,11 +4079,11 @@ static void ivybridge_init_clock_gating(struct drm_device *dev)
- 		I915_WRITE(GEN7_HALF_SLICE_CHICKEN1_GT2,
- 			   _MASKED_BIT_ENABLE(GEN7_PSD_SINGLE_PORT_DISPATCH_ENABLE));
- 
--	/* Apply the WaDisableRHWOOptimizationForRenderHang workaround. */
-+	/* Apply the WaDisableRHWOOptimizationForRenderHang:ivb workaround. */
- 	I915_WRITE(GEN7_COMMON_SLICE_CHICKEN1,
- 		   GEN7_CSC1_RHWO_OPT_DISABLE_IN_RCC);
- 
--	/* WaApplyL3ControlAndL3ChickenMode requires those two on Ivy Bridge */
-+	/* WaApplyL3ControlAndL3ChickenMode:ivb */
- 	I915_WRITE(GEN7_L3CNTLREG1,
- 			GEN7_WA_FOR_GEN7_L3_CONTROL);
- 	I915_WRITE(GEN7_L3_CHICKEN_MODE_REGISTER,
-@@ -4096,7 +4096,7 @@ static void ivybridge_init_clock_gating(struct drm_device *dev)
- 			   _MASKED_BIT_ENABLE(DOP_CLOCK_GATING_DISABLE));
- 
- 
--	/* WaForceL3Serialization */
-+	/* WaForceL3Serialization:ivb */
- 	I915_WRITE(GEN7_L3SQCREG4, I915_READ(GEN7_L3SQCREG4) &
- 		   ~L3SQ_URB_READ_CAM_MATCH_DISABLE);
- 
-@@ -4111,13 +4111,13 @@ static void ivybridge_init_clock_gating(struct drm_device *dev)
- 	 * but we didn't debug actual testcases to find it out.
- 	 *
- 	 * According to the spec, bit 13 (RCZUNIT) must be set on IVB.
--	 * This implements the WaDisableRCZUnitClockGating workaround.
-+	 * This implements the WaDisableRCZUnitClockGating:ivb workaround.
- 	 */
- 	I915_WRITE(GEN6_UCGCTL2,
- 		   GEN6_RCZUNIT_CLOCK_GATE_DISABLE |
- 		   GEN6_RCCUNIT_CLOCK_GATE_DISABLE);
- 
--	/* This is required by WaCatErrorRejectionIssue */
-+	/* This is required by WaCatErrorRejectionIssue:ivb */
- 	I915_WRITE(GEN7_SQ_CHICKEN_MBCUNIT_CONFIG,
- 			I915_READ(GEN7_SQ_CHICKEN_MBCUNIT_CONFIG) |
- 			GEN7_SQ_CHICKEN_MBCUNIT_SQINTMOB);
-@@ -4129,13 +4129,14 @@ static void ivybridge_init_clock_gating(struct drm_device *dev)
- 		intel_flush_display_plane(dev_priv, pipe);
- 	}
- 
--	/* WaMbcDriverBootEnable */
-+	/* WaMbcDriverBootEnable:ivb */
- 	I915_WRITE(GEN6_MBCTL, I915_READ(GEN6_MBCTL) |
- 		   GEN6_MBCTL_ENABLE_BOOT_FETCH);
- 
-+	/* WaVSRefCountFullforceMissDisable:ivb */
- 	gen7_setup_fixed_func_scheduler(dev_priv);
- 
--	/* WaDisable4x2SubspanOptimization */
-+	/* WaDisable4x2SubspanOptimization:ivb */
- 	I915_WRITE(CACHE_MODE_1,
- 		   _MASKED_BIT_ENABLE(PIXEL_SUBSPAN_COLLECT_OPT_DISABLE));
- 
-@@ -4161,46 +4162,46 @@ static void valleyview_init_clock_gating(struct drm_device *dev)
- 
- 	I915_WRITE(ILK_DSPCLK_GATE_D, ILK_VRHUNIT_CLOCK_GATE_DISABLE);
- 
--	/* WaDisableEarlyCull */
-+	/* WaDisableEarlyCull:vlv */
- 	I915_WRITE(_3D_CHICKEN3,
- 		   _MASKED_BIT_ENABLE(_3D_CHICKEN_SF_DISABLE_OBJEND_CULL));
- 
--	/* WaDisableBackToBackFlipFix */
-+	/* WaDisableBackToBackFlipFix:vlv */
- 	I915_WRITE(IVB_CHICKEN3,
- 		   CHICKEN3_DGMG_REQ_OUT_FIX_DISABLE |
- 		   CHICKEN3_DGMG_DONE_FIX_DISABLE);
- 
--	/* WaDisablePSDDualDispatchEnable */
-+	/* WaDisablePSDDualDispatchEnable:vlv */
- 	I915_WRITE(GEN7_HALF_SLICE_CHICKEN1,
- 		   _MASKED_BIT_ENABLE(GEN7_MAX_PS_THREAD_DEP |
- 				      GEN7_PSD_SINGLE_PORT_DISPATCH_ENABLE));
- 
--	/* Apply the WaDisableRHWOOptimizationForRenderHang workaround. */
-+	/* Apply the WaDisableRHWOOptimizationForRenderHang:vlv workaround. */
- 	I915_WRITE(GEN7_COMMON_SLICE_CHICKEN1,
- 		   GEN7_CSC1_RHWO_OPT_DISABLE_IN_RCC);
- 
--	/* WaApplyL3ControlAndL3ChickenMode requires those two on Ivy Bridge */
-+	/* WaApplyL3ControlAndL3ChickenMode:vlv */
- 	I915_WRITE(GEN7_L3CNTLREG1, I915_READ(GEN7_L3CNTLREG1) | GEN7_L3AGDIS);
- 	I915_WRITE(GEN7_L3_CHICKEN_MODE_REGISTER, GEN7_WA_L3_CHICKEN_MODE);
- 
--	/* WaForceL3Serialization */
-+	/* WaForceL3Serialization:vlv */
- 	I915_WRITE(GEN7_L3SQCREG4, I915_READ(GEN7_L3SQCREG4) &
- 		   ~L3SQ_URB_READ_CAM_MATCH_DISABLE);
- 
--	/* WaDisableDopClockGating */
-+	/* WaDisableDopClockGating:vlv */
- 	I915_WRITE(GEN7_ROW_CHICKEN2,
- 		   _MASKED_BIT_ENABLE(DOP_CLOCK_GATING_DISABLE));
- 
--	/* WaForceL3Serialization */
-+	/* WaForceL3Serialization:vlv */
- 	I915_WRITE(GEN7_L3SQCREG4, I915_READ(GEN7_L3SQCREG4) &
- 		   ~L3SQ_URB_READ_CAM_MATCH_DISABLE);
- 
--	/* This is required by WaCatErrorRejectionIssue */
-+	/* This is required by WaCatErrorRejectionIssue:vlv */
- 	I915_WRITE(GEN7_SQ_CHICKEN_MBCUNIT_CONFIG,
- 		   I915_READ(GEN7_SQ_CHICKEN_MBCUNIT_CONFIG) |
- 		   GEN7_SQ_CHICKEN_MBCUNIT_SQINTMOB);
- 
--	/* WaMbcDriverBootEnable */
-+	/* WaMbcDriverBootEnable:vlv */
- 	I915_WRITE(GEN6_MBCTL, I915_READ(GEN6_MBCTL) |
- 		   GEN6_MBCTL_ENABLE_BOOT_FETCH);
- 
-@@ -4216,10 +4217,10 @@ static void valleyview_init_clock_gating(struct drm_device *dev)
- 	 * but we didn't debug actual testcases to find it out.
- 	 *
- 	 * According to the spec, bit 13 (RCZUNIT) must be set on IVB.
--	 * This implements the WaDisableRCZUnitClockGating workaround.
-+	 * This implements the WaDisableRCZUnitClockGating:vlv workaround.
- 	 *
--	 * Also apply WaDisableVDSUnitClockGating and
--	 * WaDisableRCPBUnitClockGating.
-+	 * Also apply WaDisableVDSUnitClockGating:vlv and
-+	 * WaDisableRCPBUnitClockGating:vlv.
- 	 */
- 	I915_WRITE(GEN6_UCGCTL2,
- 		   GEN7_VDSUNIT_CLOCK_GATE_DISABLE |
-@@ -4241,7 +4242,7 @@ static void valleyview_init_clock_gating(struct drm_device *dev)
- 		   _MASKED_BIT_ENABLE(PIXEL_SUBSPAN_COLLECT_OPT_DISABLE));
- 
- 	/*
--	 * WaDisableVLVClockGating_VBIIssue
-+	 * WaDisableVLVClockGating_VBIIssue:vlv
- 	 * Disable clock gating on th GCFG unit to prevent a delay
- 	 * in the reporting of vblank events.
- 	 */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0131-drm-i915-Add-references-to-some-workaround-we-implem.patch b/patches.baytrail/0131-drm-i915-Add-references-to-some-workaround-we-implem.patch
deleted file mode 100644
index c5a7d6301a8eb..0000000000000
--- a/patches.baytrail/0131-drm-i915-Add-references-to-some-workaround-we-implem.patch
+++ /dev/null
@@ -1,92 +0,0 @@
-From a6354f167ba5c01d1ee64f6292dcbd2ebb030e55 Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Fri, 3 May 2013 18:48:11 +0100
-Subject: drm/i915: Add references to some workaround we implement
-
-We did not mention the workaround name when implementing those. This
-should help us track what we already implement.
-
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Reviewed-by: Imre Deak <imre.deak@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 8693a824873a0a97be77c1d5f1e98777f06f7305)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem_context.c |    1 +
- drivers/gpu/drm/i915/intel_ddi.c        |    2 ++
- drivers/gpu/drm/i915/intel_display.c    |    4 ++--
- drivers/gpu/drm/i915/intel_pm.c         |    3 +++
- drivers/gpu/drm/i915/intel_ringbuffer.c |    2 ++
- 5 files changed, 10 insertions(+), 2 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_gem_context.c
-+++ b/drivers/gpu/drm/i915/i915_gem_context.c
-@@ -331,6 +331,7 @@ mi_set_context(struct intel_ring_buffer
- 	if (ret)
- 		return ret;
- 
-+	/* WaProgramMiArbOnOffAroundMiSetContext:ivb,vlv,hsw */
- 	if (IS_GEN7(ring->dev))
- 		intel_ring_emit(ring, MI_ARB_ON_OFF | MI_ARB_DISABLE);
- 	else
---- a/drivers/gpu/drm/i915/intel_ddi.c
-+++ b/drivers/gpu/drm/i915/intel_ddi.c
-@@ -174,6 +174,8 @@ void hsw_fdi_link_train(struct drm_crtc
- 	 * mode set "sequence for CRT port" document:
- 	 * - TP1 to TP2 time with the default value
- 	 * - FDI delay to 90h
-+	 *
-+	 * WaFDIAutoLinkSetTimingOverrride:hsw
- 	 */
- 	I915_WRITE(_FDI_RXA_MISC, FDI_RX_PWRDN_LANE1_VAL(2) |
- 				  FDI_RX_PWRDN_LANE0_VAL(2) |
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -4121,8 +4121,8 @@ static int intel_crtc_compute_config(str
- 	if (!pipe_config->timings_set)
- 		drm_mode_set_crtcinfo(adjusted_mode, 0);
- 
--	/* WaPruneModeWithIncorrectHsyncOffset: Cantiga+ cannot handle modes
--	 * with a hsync front porch of 0.
-+	/* Cantiga+ cannot handle modes with a hsync front porch of 0.
-+	 * WaPruneModeWithIncorrectHsyncOffset:ctg,elk,ilk,snb,ivb,vlv,hsw.
- 	 */
- 	if ((INTEL_INFO(dev)->gen > 4 || IS_G4X(dev)) &&
- 		adjusted_mode->hsync_start == adjusted_mode->hdisplay)
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -4586,6 +4586,7 @@ static void __gen6_gt_force_wake_get(str
- 			    FORCEWAKE_ACK_TIMEOUT_MS))
- 		DRM_ERROR("Timed out waiting for forcewake to ack request.\n");
- 
-+	/* WaRsForcewakeWaitTC0:snb */
- 	__gen6_gt_wait_for_thread_c0(dev_priv);
- }
- 
-@@ -4617,6 +4618,7 @@ static void __gen6_gt_force_wake_mt_get(
- 			    FORCEWAKE_ACK_TIMEOUT_MS))
- 		DRM_ERROR("Timed out waiting for forcewake to ack request.\n");
- 
-+	/* WaRsForcewakeWaitTC0:ivb,hsw */
- 	__gen6_gt_wait_for_thread_c0(dev_priv);
- }
- 
-@@ -4720,6 +4722,7 @@ static void vlv_force_wake_get(struct dr
- 			    FORCEWAKE_ACK_TIMEOUT_MS))
- 		DRM_ERROR("Timed out waiting for media to ack forcewake request.\n");
- 
-+	/* WaRsForcewakeWaitTC0:vlv */
- 	__gen6_gt_wait_for_thread_c0(dev_priv);
- }
- 
---- a/drivers/gpu/drm/i915/intel_ringbuffer.c
-+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
-@@ -511,6 +511,8 @@ static int init_render_ring(struct intel
- 	/* We need to disable the AsyncFlip performance optimisations in order
- 	 * to use MI_WAIT_FOR_EVENT within the CS. It should already be
- 	 * programmed to '1' on all products.
-+	 *
-+	 * WaDisableAsyncFlipPerfMode:snb,ivb,hsw,vlv
- 	 */
- 	if (INTEL_INFO(dev)->gen >= 6)
- 		I915_WRITE(MI_MODE, _MASKED_BIT_ENABLE(ASYNC_FLIP_PERF_DISABLE));
diff --git a/patches.baytrail/0132-drm-i915-fix-hotplug-event-bit-tracking.patch b/patches.baytrail/0132-drm-i915-fix-hotplug-event-bit-tracking.patch
deleted file mode 100644
index 12b0dc2f55b81..0000000000000
--- a/patches.baytrail/0132-drm-i915-fix-hotplug-event-bit-tracking.patch
+++ /dev/null
@@ -1,59 +0,0 @@
-From 2f3effdedbbd3c2559ab6ce8282472bc43961280 Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Tue, 7 May 2013 15:10:29 +0300
-Subject: drm/i915: fix hotplug event bit tracking
-
-commit 142e239849c800f9dc23f828762873073f612d3f
-Author: Egbert Eich <eich@suse.de>
-Date:   Thu Apr 11 15:57:57 2013 +0200
-
-    drm/i915: Add bit field to record which pins have received HPD events (v3)
-
-added a bit field for hotplug event tracking. There ended up being three
-different v3 of the patch: [1], [2], and [3]. Apparently [1] was the
-correct one, but some frankenstein combination of the three got
-committed, which reversed the logic for setting the hotplug bits and
-misplaced a continue statement, skipping the hotplug irq storm handling
-altogether.
-
-This lead to broken hotplug detection, bisected to
-commit 321a1b3026ea194dd084cf3bda1e235b2986b0af
-Author: Egbert Eich <eich@suse.de>
-Date:   Thu Apr 11 16:00:26 2013 +0200
-
-    drm/i915: Only reprobe display on encoder which has received an HPD event (v2)
-
-which uses the incorrectly set hotplug event bits.
-
-Fix the mess.
-
-[1] http://mid.gmane.org/1366112220-7638-6-git-send-email-eich@suse.de
-[2] http://mid.gmane.org/1365688677-13682-1-git-send-email-eich@suse.de
-[3] http://mid.gmane.org/1365688996-13874-1-git-send-email-eich@suse.de
-
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit bc5ead8c09b51e85d110132495a9bfa58dc39dab)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index ae19a7cff5f9..6b9bc815cc70 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -873,9 +873,9 @@ static inline bool hotplug_irq_storm_detect(struct drm_device *dev,
- 
- 		if (!(hpd[i] & hotplug_trigger) ||
- 		    dev_priv->hpd_stats[i].hpd_mark != HPD_ENABLED)
--			dev_priv->hpd_event_bits |= (1 << i);
- 			continue;
- 
-+		dev_priv->hpd_event_bits |= (1 << i);
- 		if (!time_in_range(jiffies, dev_priv->hpd_stats[i].hpd_last_jiffies,
- 				   dev_priv->hpd_stats[i].hpd_last_jiffies
- 				   + msecs_to_jiffies(HPD_STORM_DETECT_PERIOD))) {
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0133-drm-i915-HSW-allow-PCH-clock-gating-for-suspend.patch b/patches.baytrail/0133-drm-i915-HSW-allow-PCH-clock-gating-for-suspend.patch
deleted file mode 100644
index 18284ed9e34bc..0000000000000
--- a/patches.baytrail/0133-drm-i915-HSW-allow-PCH-clock-gating-for-suspend.patch
+++ /dev/null
@@ -1,116 +0,0 @@
-From 586758d9bec7b9acb46c94c37ae33c506f895bd1 Mon Sep 17 00:00:00 2001
-From: Imre Deak <imre.deak@intel.com>
-Date: Wed, 17 Apr 2013 14:04:50 +0300
-Subject: drm/i915: HSW: allow PCH clock gating for suspend
-
-For the device to enter D3 we should enable PCH clock gating.
-
-v2:
-- use HAS_PCH_LPT instead of IS_HASWELL (Ville, Paolo)
-- rename lpt_allow_clock_gating to lpt_suspend_hw (Paolo)
-
-Signed-off-by: Imre Deak <imre.deak@intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 7d708ee40a6b9ca1112a322e554c887df105b025)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.c      |  2 ++
- drivers/gpu/drm/i915/i915_drv.h      |  1 +
- drivers/gpu/drm/i915/intel_display.c |  5 +++++
- drivers/gpu/drm/i915/intel_drv.h     |  1 +
- drivers/gpu/drm/i915/intel_pm.c      | 18 ++++++++++++++++++
- 5 files changed, 27 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
-index 7610a28a1bf6..e91593a4d450 100644
---- a/drivers/gpu/drm/i915/i915_drv.c
-+++ b/drivers/gpu/drm/i915/i915_drv.c
-@@ -553,6 +553,8 @@ static int i915_drm_freeze(struct drm_device *dev)
- 		 */
- 		list_for_each_entry(crtc, &dev->mode_config.crtc_list, head)
- 			dev_priv->display.crtc_disable(crtc);
-+
-+		intel_modeset_suspend_hw(dev);
- 	}
- 
- 	i915_save_state(dev);
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index eee5f8358579..aa81716db4f3 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1869,6 +1869,7 @@ static inline void intel_unregister_dsm_handler(void) { return; }
- 
- /* modesetting */
- extern void intel_modeset_init_hw(struct drm_device *dev);
-+extern void intel_modeset_suspend_hw(struct drm_device *dev);
- extern void intel_modeset_init(struct drm_device *dev);
- extern void intel_modeset_gem_init(struct drm_device *dev);
- extern void intel_modeset_cleanup(struct drm_device *dev);
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index e43dad8d28bb..87414ec78fd4 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -9326,6 +9326,11 @@ void intel_modeset_init_hw(struct drm_device *dev)
- 	mutex_unlock(&dev->struct_mutex);
- }
- 
-+void intel_modeset_suspend_hw(struct drm_device *dev)
-+{
-+	intel_suspend_hw(dev);
-+}
-+
- void intel_modeset_init(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index e0d68179d80e..cb5e0cea4e93 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -717,6 +717,7 @@ extern void assert_pipe(struct drm_i915_private *dev_priv, enum pipe pipe,
- #define assert_pipe_disabled(d, p) assert_pipe(d, p, false)
- 
- extern void intel_init_clock_gating(struct drm_device *dev);
-+extern void intel_suspend_hw(struct drm_device *dev);
- extern void intel_write_eld(struct drm_encoder *encoder,
- 			    struct drm_display_mode *mode);
- extern void intel_prepare_ddi(struct drm_device *dev);
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index f88cfbedc90e..863eaec77481 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -3988,6 +3988,18 @@ static void lpt_init_clock_gating(struct drm_device *dev)
- 			   PCH_LP_PARTITION_LEVEL_DISABLE);
- }
- 
-+static void lpt_suspend_hw(struct drm_device *dev)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+
-+	if (dev_priv->pch_id == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE) {
-+		uint32_t val = I915_READ(SOUTH_DSPCLK_GATE_D);
-+
-+		val &= ~PCH_LP_PARTITION_LEVEL_DISABLE;
-+		I915_WRITE(SOUTH_DSPCLK_GATE_D, val);
-+	}
-+}
-+
- static void haswell_init_clock_gating(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
-@@ -4340,6 +4352,12 @@ void intel_init_clock_gating(struct drm_device *dev)
- 	dev_priv->display.init_clock_gating(dev);
- }
- 
-+void intel_suspend_hw(struct drm_device *dev)
-+{
-+	if (HAS_PCH_LPT(dev))
-+		lpt_suspend_hw(dev);
-+}
-+
- /**
-  * We should only use the power well if we explicitly asked the hardware to
-  * enable it, so check if it's enabled and also check if we've requested it to
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0134-drm-i915-Re-enable-FBC-WM-if-the-watermark-is-good-o.patch b/patches.baytrail/0134-drm-i915-Re-enable-FBC-WM-if-the-watermark-is-good-o.patch
deleted file mode 100644
index 2f066b36d68be..0000000000000
--- a/patches.baytrail/0134-drm-i915-Re-enable-FBC-WM-if-the-watermark-is-good-o.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From 8e16290f459196a1ea24fe8093a98c9ddec09eda Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Wed, 24 Apr 2013 21:09:10 +0300
-Subject: drm/i915: Re-enable FBC WM if the watermark is good on gen6+
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-If the calculated FBC watermark is no good, we simply disable FBC
-watermarks. But we fail to re-enable them later if the calculated
-watermark becomes good again. Fix that, but remember to leave FBC
-watermarks disabled on ILK since that's required by some workarounds.
-
-v2: Fix checkpatch complaint
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 615aaa5f96e40971039e01105c09808a3dead7d5)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 4 ++++
- 1 file changed, 4 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 863eaec77481..5a9b5bea5d10 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -1631,6 +1631,10 @@ static bool ironlake_check_srwm(struct drm_device *dev, int level,
- 		I915_WRITE(DISP_ARB_CTL,
- 			   I915_READ(DISP_ARB_CTL) | DISP_FBC_WM_DIS);
- 		return false;
-+	} else if (INTEL_INFO(dev)->gen >= 6) {
-+		/* enable FBC WM (except on ILK, where it must remain off) */
-+		I915_WRITE(DISP_ARB_CTL,
-+			   I915_READ(DISP_ARB_CTL) & ~DISP_FBC_WM_DIS);
- 	}
- 
- 	if (display_wm > display->max_wm) {
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0135-drm-i915-BIOS-and-power-context-stolen-mem-handling-.patch b/patches.baytrail/0135-drm-i915-BIOS-and-power-context-stolen-mem-handling-.patch
deleted file mode 100644
index 5dbe1cac08fcf..0000000000000
--- a/patches.baytrail/0135-drm-i915-BIOS-and-power-context-stolen-mem-handling-.patch
+++ /dev/null
@@ -1,173 +0,0 @@
-From 4b319c03ceffcd07ec0ef7268d348df1b1b53906 Mon Sep 17 00:00:00 2001
-From: Jesse Barnes <jbarnes@virtuousgeek.org>
-Date: Wed, 8 May 2013 10:45:13 -0700
-Subject: drm/i915: BIOS and power context stolen mem handling for VLV v7
-
-But we need to get the right stolen base and make pre-allocated objects
-for BIOS stuff so we don't clobber it.  If the BIOS hasn't allocated a
-power context, we allocate one here too, from stolen space as required
-by the docs.
-
-v2: fix stolen to phys if ladder (Ben)
-    keep BIOS reserved space out of allocator altogether (Ben)
-v3: fix mask of stolen base (Ben)
-v4: clean up preallocated object on unload (Ben)
-    don't zero reg on unload (Jesse)
-    fix mask harder (Jesse)
-v5: use unref for freeing stolen bits (Chris)
-    move alloc/free to intel_pm.c (Chris)
-v6: NULL pctx at disable time so error paths work (Ben)
-v7: use correct PCI device for config read (Jesse)
-
-Reviewed-by: Ben Widawsky <benjamin.widawsky@intel.com>
-Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit c9cddffc669408a361c62353a36dd40b469dd9c2)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h        |  2 ++
- drivers/gpu/drm/i915/i915_gem_stolen.c | 12 +++++++--
- drivers/gpu/drm/i915/i915_reg.h        |  1 +
- drivers/gpu/drm/i915/intel_pm.c        | 49 ++++++++++++++++++++++++++++++++++
- 4 files changed, 62 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index aa81716db4f3..05752eb2eb0c 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1074,6 +1074,8 @@ typedef struct drm_i915_private {
- 
- 	struct i915_gpu_error gpu_error;
- 
-+	struct drm_i915_gem_object *vlv_pctx;
-+
- 	/* list of fbdev register on this device */
- 	struct intel_fbdev *fbdev;
- 
-diff --git a/drivers/gpu/drm/i915/i915_gem_stolen.c b/drivers/gpu/drm/i915/i915_gem_stolen.c
-index 67d3510cafed..913994cd0a3a 100644
---- a/drivers/gpu/drm/i915/i915_gem_stolen.c
-+++ b/drivers/gpu/drm/i915/i915_gem_stolen.c
-@@ -62,7 +62,10 @@ static unsigned long i915_stolen_to_physical(struct drm_device *dev)
- 	 * its value of TOLUD.
- 	 */
- 	base = 0;
--	if (INTEL_INFO(dev)->gen >= 6) {
-+	if (IS_VALLEYVIEW(dev)) {
-+		pci_read_config_dword(dev->pdev, 0x5c, &base);
-+		base &= ~((1<<20) - 1);
-+	} else if (INTEL_INFO(dev)->gen >= 6) {
- 		/* Read Base Data of Stolen Memory Register (BDSM) directly.
- 		 * Note that there is also a MCHBAR miror at 0x1080c0 or
- 		 * we could use device 2:0x5c instead.
-@@ -183,6 +186,7 @@ void i915_gem_cleanup_stolen(struct drm_device *dev)
- int i915_gem_init_stolen(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
-+	int bios_reserved = 0;
- 
- 	dev_priv->mm.stolen_base = i915_stolen_to_physical(dev);
- 	if (dev_priv->mm.stolen_base == 0)
-@@ -191,8 +195,12 @@ int i915_gem_init_stolen(struct drm_device *dev)
- 	DRM_DEBUG_KMS("found %zd bytes of stolen memory at %08lx\n",
- 		      dev_priv->gtt.stolen_size, dev_priv->mm.stolen_base);
- 
-+	if (IS_VALLEYVIEW(dev))
-+		bios_reserved = 1024*1024; /* top 1M on VLV/BYT */
-+
- 	/* Basic memrange allocator for stolen space */
--	drm_mm_init(&dev_priv->mm.stolen, 0, dev_priv->gtt.stolen_size);
-+	drm_mm_init(&dev_priv->mm.stolen, 0, dev_priv->gtt.stolen_size -
-+		    bios_reserved);
- 
- 	return 0;
- }
-diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
-index 325534eb7fd2..5de7b03ff32a 100644
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -698,6 +698,7 @@
- #define VLV_IIR		(VLV_DISPLAY_BASE + 0x20a4)
- #define VLV_IMR		(VLV_DISPLAY_BASE + 0x20a8)
- #define VLV_ISR		(VLV_DISPLAY_BASE + 0x20ac)
-+#define VLV_PCBR	(VLV_DISPLAY_BASE + 0x2120)
- #define   I915_PIPE_CONTROL_NOTIFY_INTERRUPT		(1<<18)
- #define   I915_DISPLAY_PORT_INTERRUPT			(1<<17)
- #define   I915_RENDER_COMMAND_PARSER_ERROR_INTERRUPT	(1<<15)
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 5a9b5bea5d10..78b523e688da 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2566,6 +2566,11 @@ static void valleyview_disable_rps(struct drm_device *dev)
- 	spin_unlock_irq(&dev_priv->rps.lock);
- 
- 	I915_WRITE(GEN6_PMIIR, I915_READ(GEN6_PMIIR));
-+
-+	if (dev_priv->vlv_pctx) {
-+		drm_gem_object_unreference(&dev_priv->vlv_pctx->base);
-+		dev_priv->vlv_pctx = NULL;
-+	}
- }
- 
- int intel_enable_rc6(const struct drm_device *dev)
-@@ -2860,6 +2865,48 @@ static void vlv_rps_timer_work(struct work_struct *work)
- 	mutex_unlock(&dev_priv->rps.hw_lock);
- }
- 
-+static void valleyview_setup_pctx(struct drm_device *dev)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct drm_i915_gem_object *pctx;
-+	unsigned long pctx_paddr;
-+	u32 pcbr;
-+	int pctx_size = 24*1024;
-+
-+	pcbr = I915_READ(VLV_PCBR);
-+	if (pcbr) {
-+		/* BIOS set it up already, grab the pre-alloc'd space */
-+		int pcbr_offset;
-+
-+		pcbr_offset = (pcbr & (~4095)) - dev_priv->mm.stolen_base;
-+		pctx = i915_gem_object_create_stolen_for_preallocated(dev_priv->dev,
-+								      pcbr_offset,
-+								      pcbr_offset,
-+								      pctx_size);
-+		goto out;
-+	}
-+
-+	/*
-+	 * From the Gunit register HAS:
-+	 * The Gfx driver is expected to program this register and ensure
-+	 * proper allocation within Gfx stolen memory.  For example, this
-+	 * register should be programmed such than the PCBR range does not
-+	 * overlap with other ranges, such as the frame buffer, protected
-+	 * memory, or any other relevant ranges.
-+	 */
-+	pctx = i915_gem_object_create_stolen(dev, pctx_size);
-+	if (!pctx) {
-+		DRM_DEBUG("not enough stolen space for PCTX, disabling\n");
-+		return;
-+	}
-+
-+	pctx_paddr = dev_priv->mm.stolen_base + pctx->stolen->start;
-+	I915_WRITE(VLV_PCBR, pctx_paddr);
-+
-+out:
-+	dev_priv->vlv_pctx = pctx;
-+}
-+
- static void valleyview_enable_rps(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
-@@ -2874,6 +2921,8 @@ static void valleyview_enable_rps(struct drm_device *dev)
- 		I915_WRITE(GTFIFODBG, gtfifodbg);
- 	}
- 
-+	valleyview_setup_pctx(dev);
-+
- 	gen6_gt_force_wake_get(dev_priv);
- 
- 	I915_WRITE(GEN6_RP_UP_THRESHOLD, 59400);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0136-drm-i915-allow-stolen-pre-allocated-objects-to-avoid.patch b/patches.baytrail/0136-drm-i915-allow-stolen-pre-allocated-objects-to-avoid.patch
deleted file mode 100644
index 9ac8962430388..0000000000000
--- a/patches.baytrail/0136-drm-i915-allow-stolen-pre-allocated-objects-to-avoid.patch
+++ /dev/null
@@ -1,61 +0,0 @@
-From 3106d2e0e3bdc0f36dd266a60029cd9e06587a3b Mon Sep 17 00:00:00 2001
-From: Jesse Barnes <jbarnes@virtuousgeek.org>
-Date: Wed, 8 May 2013 10:45:14 -0700
-Subject: drm/i915: allow stolen, pre-allocated objects to avoid GTT allocation
- v2
-
-In some cases, we may not need GTT address space allocated to a stolen
-object, so allow passing -1 to the preallocated function to indicate as
-much.
-
-v2: remove BUG_ON(gtt_offset & 4095) now that -1 is allowed (Ville)
-
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 3727d55e4d85836aa6cb759a965daaef88074150)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem_stolen.c | 5 ++++-
- drivers/gpu/drm/i915/intel_pm.c        | 2 +-
- 2 files changed, 5 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem_stolen.c b/drivers/gpu/drm/i915/i915_gem_stolen.c
-index 913994cd0a3a..89cbfab9570e 100644
---- a/drivers/gpu/drm/i915/i915_gem_stolen.c
-+++ b/drivers/gpu/drm/i915/i915_gem_stolen.c
-@@ -339,7 +339,6 @@ i915_gem_object_create_stolen_for_preallocated(struct drm_device *dev,
- 
- 	/* KISS and expect everything to be page-aligned */
- 	BUG_ON(stolen_offset & 4095);
--	BUG_ON(gtt_offset & 4095);
- 	BUG_ON(size & 4095);
- 
- 	if (WARN_ON(size == 0))
-@@ -360,6 +359,10 @@ i915_gem_object_create_stolen_for_preallocated(struct drm_device *dev,
- 		return NULL;
- 	}
- 
-+	/* Some objects just need physical mem from stolen space */
-+	if (gtt_offset == -1)
-+		return obj;
-+
- 	/* To simplify the initialisation sequence between KMS and GTT,
- 	 * we allow construction of the stolen object prior to
- 	 * setting up the GTT space. The actual reservation will occur
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 78b523e688da..787813bb61c2 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2881,7 +2881,7 @@ static void valleyview_setup_pctx(struct drm_device *dev)
- 		pcbr_offset = (pcbr & (~4095)) - dev_priv->mm.stolen_base;
- 		pctx = i915_gem_object_create_stolen_for_preallocated(dev_priv->dev,
- 								      pcbr_offset,
--								      pcbr_offset,
-+								      -1,
- 								      pctx_size);
- 		goto out;
- 	}
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0137-drm-i915-VLV-support-is-no-longer-preliminary.patch b/patches.baytrail/0137-drm-i915-VLV-support-is-no-longer-preliminary.patch
deleted file mode 100644
index ba84acd21028b..0000000000000
--- a/patches.baytrail/0137-drm-i915-VLV-support-is-no-longer-preliminary.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From 21c1350adda6b531d992f3ad8ce9ab4a7864a4b1 Mon Sep 17 00:00:00 2001
-From: Jesse Barnes <jbarnes@virtuousgeek.org>
-Date: Wed, 8 May 2013 10:45:15 -0700
-Subject: drm/i915: VLV support is no longer preliminary
-
-Works pretty well actually.
-
-Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 590e4df8c82e6c2707ae12ba6672ab6fb9cd4b89)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.c | 6 ------
- 1 file changed, 6 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
-index e91593a4d450..9e9b612828b2 100644
---- a/drivers/gpu/drm/i915/i915_drv.c
-+++ b/drivers/gpu/drm/i915/i915_drv.c
-@@ -990,12 +990,6 @@ static int i915_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
- 	struct intel_device_info *intel_info =
- 		(struct intel_device_info *) ent->driver_data;
- 
--	if (intel_info->is_valleyview)
--		if(!i915_preliminary_hw_support) {
--			DRM_ERROR("Preliminary hardware support disabled\n");
--			return -ENODEV;
--		}
--
- 	/* Only bind to function 0 of the device. Early generations
- 	 * used function 1 as a placeholder for multi-head. This causes
- 	 * us confusion instead, especially on the systems where both
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0138-drm-i915-use-enc_to_intel_dp-instead-of-opencoding-t.patch b/patches.baytrail/0138-drm-i915-use-enc_to_intel_dp-instead-of-opencoding-t.patch
deleted file mode 100644
index 07a1df49d0f45..0000000000000
--- a/patches.baytrail/0138-drm-i915-use-enc_to_intel_dp-instead-of-opencoding-t.patch
+++ /dev/null
@@ -1,45 +0,0 @@
-From 1ab9e79d9c8d9ecba0446bd0871739fbe61e0efa Mon Sep 17 00:00:00 2001
-From: Imre Deak <imre.deak@intel.com>
-Date: Wed, 8 May 2013 13:14:02 +0300
-Subject: drm/i915: use enc_to_intel_dp() instead of opencoding the same
-
-Signed-off-by: Imre Deak <imre.deak@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 9ff8c9bac2d78634f34d9b6e43e04bf316a7f456)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_drv.h | 12 +++++-------
- 1 file changed, 5 insertions(+), 7 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index cb5e0cea4e93..ba12b5b47257 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -621,19 +621,17 @@ static inline struct intel_encoder *intel_attached_encoder(struct drm_connector
- 	return to_intel_connector(connector)->encoder;
- }
- 
--static inline struct intel_dp *enc_to_intel_dp(struct drm_encoder *encoder)
--{
--	struct intel_digital_port *intel_dig_port =
--		container_of(encoder, struct intel_digital_port, base.base);
--	return &intel_dig_port->dp;
--}
--
- static inline struct intel_digital_port *
- enc_to_dig_port(struct drm_encoder *encoder)
- {
- 	return container_of(encoder, struct intel_digital_port, base.base);
- }
- 
-+static inline struct intel_dp *enc_to_intel_dp(struct drm_encoder *encoder)
-+{
-+	return &enc_to_dig_port(encoder)->dp;
-+}
-+
- static inline struct intel_digital_port *
- dp_to_dig_port(struct intel_dp *intel_dp)
- {
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0139-drm-i915-hsw-replace-is_pch_edp-with-port-PORT_A.patch b/patches.baytrail/0139-drm-i915-hsw-replace-is_pch_edp-with-port-PORT_A.patch
deleted file mode 100644
index c9a317a34c20c..0000000000000
--- a/patches.baytrail/0139-drm-i915-hsw-replace-is_pch_edp-with-port-PORT_A.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From 73f5f53cbaa356d2a0c2f268caf707b14b89762d Mon Sep 17 00:00:00 2001
-From: Imre Deak <imre.deak@intel.com>
-Date: Wed, 8 May 2013 13:14:03 +0300
-Subject: drm/i915: hsw: replace !is_pch_edp() with port==PORT_A
-
-On HSW the CPU side eDP is always on port-A, the PCH side eDP is always
-on port-D.
-
-Signed-off-by: Imre Deak <imre.deak@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit d8e8b582b4e685a0e2a95ca0f4862582d465c649)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 87414ec78fd4..ee297a878aa5 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -5981,7 +5981,7 @@ static int haswell_crtc_mode_set(struct drm_crtc *crtc,
- 	for_each_encoder_on_crtc(dev, crtc, encoder) {
- 		switch (encoder->type) {
- 		case INTEL_OUTPUT_EDP:
--			if (!intel_encoder_is_pch_edp(&encoder->base))
-+			if (enc_to_dig_port(&encoder->base)->port == PORT_A)
- 				is_cpu_edp = true;
- 			break;
- 		}
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0140-drm-i915-ilk-ivb-replace-is_pch_edp-with-port-PORT_A.patch b/patches.baytrail/0140-drm-i915-ilk-ivb-replace-is_pch_edp-with-port-PORT_A.patch
deleted file mode 100644
index 0d04295ce57e3..0000000000000
--- a/patches.baytrail/0140-drm-i915-ilk-ivb-replace-is_pch_edp-with-port-PORT_A.patch
+++ /dev/null
@@ -1,58 +0,0 @@
-From 78f768ff627c426dc0f4475fc751baf79d01d8bf Mon Sep 17 00:00:00 2001
-From: Imre Deak <imre.deak@intel.com>
-Date: Wed, 8 May 2013 13:14:04 +0300
-Subject: drm/i915: ilk-ivb: replace !is_pch_edp() with port==PORT_A
-
-On ILK-IVB the CPU side eDP is always on port-A.
-
-Also reduce somewhat the debug verbosity.
-
-v2:
-- reduce debug verbosity
-
-Signed-off-by: Imre Deak <imre.deak@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 2de6905f0a30c8fbe293e1e3ecdb766bbf5f7760)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 10 +++-------
- 1 file changed, 3 insertions(+), 7 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index ee297a878aa5..b93b2407ab57 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -5057,7 +5057,6 @@ static void ironlake_init_pch_refclk(struct drm_device *dev)
- 	u32 val, final;
- 	bool has_lvds = false;
- 	bool has_cpu_edp = false;
--	bool has_pch_edp = false;
- 	bool has_panel = false;
- 	bool has_ck505 = false;
- 	bool can_ssc = false;
-@@ -5072,9 +5071,7 @@ static void ironlake_init_pch_refclk(struct drm_device *dev)
- 			break;
- 		case INTEL_OUTPUT_EDP:
- 			has_panel = true;
--			if (intel_encoder_is_pch_edp(&encoder->base))
--				has_pch_edp = true;
--			else
-+			if (enc_to_dig_port(&encoder->base)->port == PORT_A)
- 				has_cpu_edp = true;
- 			break;
- 		}
-@@ -5088,9 +5085,8 @@ static void ironlake_init_pch_refclk(struct drm_device *dev)
- 		can_ssc = true;
- 	}
- 
--	DRM_DEBUG_KMS("has_panel %d has_lvds %d has_pch_edp %d has_cpu_edp %d has_ck505 %d\n",
--		      has_panel, has_lvds, has_pch_edp, has_cpu_edp,
--		      has_ck505);
-+	DRM_DEBUG_KMS("has_panel %d has_lvds %d has_ck505 %d\n",
-+		      has_panel, has_lvds, has_ck505);
- 
- 	/* Ironlake: try to setup display ref clock before DPLL
- 	 * enabling. This is only under driver's control after
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0141-drm-i915-stop-using-is_pch_edp-in-intel_dp_init_conn.patch b/patches.baytrail/0141-drm-i915-stop-using-is_pch_edp-in-intel_dp_init_conn.patch
deleted file mode 100644
index 0d1814d59b736..0000000000000
--- a/patches.baytrail/0141-drm-i915-stop-using-is_pch_edp-in-intel_dp_init_conn.patch
+++ /dev/null
@@ -1,71 +0,0 @@
-From 82e6f928e0ffcef0d452617b53f02273d666638c Mon Sep 17 00:00:00 2001
-From: Imre Deak <imre.deak@intel.com>
-Date: Wed, 8 May 2013 13:14:05 +0300
-Subject: drm/i915: stop using is_pch_edp() in intel_dp_init_connector()
-
-is_pch_edp() will be removed in a follow-up patch, so replace it
-with a check for the port and VBT info (for port-D eDP).
-
-Also make things a bit clearer by using a switch on the ports.
-
-v2:
-- make the comment about not setting the conder type for DP clearer
-  (Ville)
-
-Signed-off-by: Imre Deak <imre.deak@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit f7d24902e197824eee717e4c3f406eb8623e67e0)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_dp.c |   33 ++++++++++++++++++++++-----------
- 1 file changed, 22 insertions(+), 11 deletions(-)
-
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -3046,24 +3046,35 @@ intel_dp_init_connector(struct intel_dig
- 		if (intel_dpd_is_edp(dev))
- 			intel_dp->is_pch_edp = true;
- 
-+	type = DRM_MODE_CONNECTOR_DisplayPort;
- 	/*
- 	 * FIXME : We need to initialize built-in panels before external panels.
- 	 * For X0, DP_C is fixed as eDP. Revisit this as part of VLV eDP cleanup
- 	 */
--	if (IS_VALLEYVIEW(dev) && port == PORT_C) {
-+	switch (port) {
-+	case PORT_A:
- 		type = DRM_MODE_CONNECTOR_eDP;
--		intel_encoder->type = INTEL_OUTPUT_EDP;
--	} else if (port == PORT_A || is_pch_edp(intel_dp)) {
--		type = DRM_MODE_CONNECTOR_eDP;
--		intel_encoder->type = INTEL_OUTPUT_EDP;
--	} else {
--		/* The intel_encoder->type value may be INTEL_OUTPUT_UNKNOWN for
--		 * DDI or INTEL_OUTPUT_DISPLAYPORT for the older gens, so don't
--		 * rewrite it.
--		 */
--		type = DRM_MODE_CONNECTOR_DisplayPort;
-+		break;
-+	case PORT_C:
-+		if (IS_VALLEYVIEW(dev))
-+			type = DRM_MODE_CONNECTOR_eDP;
-+		break;
-+	case PORT_D:
-+		if (HAS_PCH_SPLIT(dev) && intel_dpd_is_edp(dev))
-+			type = DRM_MODE_CONNECTOR_eDP;
-+		break;
-+	default:	/* silence GCC warning */
-+		break;
- 	}
- 
-+	/*
-+	 * For eDP we always set the encoder type to INTEL_OUTPUT_EDP, but
-+	 * for DP the encoder type can be set by the caller to
-+	 * INTEL_OUTPUT_UNKNOWN for DDI, so don't rewrite it.
-+	 */
-+	if (type == DRM_MODE_CONNECTOR_eDP)
-+		intel_encoder->type = INTEL_OUTPUT_EDP;
-+
- 	drm_connector_init(dev, connector, &intel_dp_connector_funcs, type);
- 	drm_connector_helper_add(connector, &intel_dp_connector_helper_funcs);
- 
diff --git a/patches.baytrail/0142-drm-i915-stop-using-is_pch_edp-in-is_cpu_edp.patch b/patches.baytrail/0142-drm-i915-stop-using-is_pch_edp-in-is_cpu_edp.patch
deleted file mode 100644
index b24e6cec1ba91..0000000000000
--- a/patches.baytrail/0142-drm-i915-stop-using-is_pch_edp-in-is_cpu_edp.patch
+++ /dev/null
@@ -1,56 +0,0 @@
-From 7c355b40a2f117d867af4f2e8b7e83879b68eb01 Mon Sep 17 00:00:00 2001
-From: Imre Deak <imre.deak@intel.com>
-Date: Wed, 8 May 2013 13:14:06 +0300
-Subject: drm/i915: stop using is_pch_edp() in is_cpu_edp()
-
-is_pch_edp() will be removed by the next patch, so replace it by a check
-for the port and device type.
-
-Signed-off-by: Imre Deak <imre.deak@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 68b4d8247033b425ae948f02885c2aed5ae823f3)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_dp.c | 17 +++++++++++------
- 1 file changed, 11 insertions(+), 6 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
-index 76c4f114674b..e69c84b6838b 100644
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -65,6 +65,13 @@ static bool is_pch_edp(struct intel_dp *intel_dp)
- 	return intel_dp->is_pch_edp;
- }
- 
-+static struct drm_device *intel_dp_to_dev(struct intel_dp *intel_dp)
-+{
-+	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
-+
-+	return intel_dig_port->base.base.dev;
-+}
-+
- /**
-  * is_cpu_edp - is the port on the CPU and attached to an eDP panel?
-  * @intel_dp: DP struct
-@@ -73,14 +80,12 @@ static bool is_pch_edp(struct intel_dp *intel_dp)
-  */
- static bool is_cpu_edp(struct intel_dp *intel_dp)
- {
--	return is_edp(intel_dp) && !is_pch_edp(intel_dp);
--}
--
--static struct drm_device *intel_dp_to_dev(struct intel_dp *intel_dp)
--{
-+	struct drm_device *dev = intel_dp_to_dev(intel_dp);
- 	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
-+	enum port port = intel_dig_port->port;
- 
--	return intel_dig_port->base.base.dev;
-+	return is_edp(intel_dp) &&
-+		(port == PORT_A || (port == PORT_C && IS_VALLEYVIEW(dev)));
- }
- 
- static struct intel_dp *intel_attached_dp(struct drm_connector *connector)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0143-drm-i915-remove-is_pch_edp-helpers-and-state-variabl.patch b/patches.baytrail/0143-drm-i915-remove-is_pch_edp-helpers-and-state-variabl.patch
deleted file mode 100644
index 7d60830917b25..0000000000000
--- a/patches.baytrail/0143-drm-i915-remove-is_pch_edp-helpers-and-state-variabl.patch
+++ /dev/null
@@ -1,93 +0,0 @@
-From 6f8562a66fcf33734e5aac04f1c0247ef277772b Mon Sep 17 00:00:00 2001
-From: Imre Deak <imre.deak@intel.com>
-Date: Wed, 8 May 2013 13:14:07 +0300
-Subject: drm/i915: remove is_pch_edp() helpers and state variable
-
-There are no more users for these, so remove them.
-
-Signed-off-by: Imre Deak <imre.deak@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 15e6bf74b660c2e7aecc200ac77eb19eb6628240)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_dp.c  |   36 ------------------------------------
- drivers/gpu/drm/i915/intel_drv.h |    2 --
- 2 files changed, 38 deletions(-)
-
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -52,19 +52,6 @@ static bool is_edp(struct intel_dp *inte
- 	return intel_dig_port->base.type == INTEL_OUTPUT_EDP;
- }
- 
--/**
-- * is_pch_edp - is the port on the PCH and attached to an eDP panel?
-- * @intel_dp: DP struct
-- *
-- * Returns true if the given DP struct corresponds to a PCH DP port attached
-- * to an eDP panel, false otherwise.  Helpful for determining whether we
-- * may need FDI resources for a given DP output or not.
-- */
--static bool is_pch_edp(struct intel_dp *intel_dp)
--{
--	return intel_dp->is_pch_edp;
--}
--
- static struct drm_device *intel_dp_to_dev(struct intel_dp *intel_dp)
- {
- 	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
-@@ -93,25 +80,6 @@ static struct intel_dp *intel_attached_d
- 	return enc_to_intel_dp(&intel_attached_encoder(connector)->base);
- }
- 
--/**
-- * intel_encoder_is_pch_edp - is the given encoder a PCH attached eDP?
-- * @encoder: DRM encoder
-- *
-- * Return true if @encoder corresponds to a PCH attached eDP panel.  Needed
-- * by intel_display.c.
-- */
--bool intel_encoder_is_pch_edp(struct drm_encoder *encoder)
--{
--	struct intel_dp *intel_dp;
--
--	if (!encoder)
--		return false;
--
--	intel_dp = enc_to_intel_dp(encoder);
--
--	return is_pch_edp(intel_dp);
--}
--
- static void intel_dp_link_down(struct intel_dp *intel_dp);
- 
- static int
-@@ -3047,10 +3015,6 @@ intel_dp_init_connector(struct intel_dig
- 	intel_dp->DP = I915_READ(intel_dp->output_reg);
- 	intel_dp->attached_connector = intel_connector;
- 
--	if (HAS_PCH_SPLIT(dev) && port == PORT_D)
--		if (intel_dpd_is_edp(dev))
--			intel_dp->is_pch_edp = true;
--
- 	type = DRM_MODE_CONNECTOR_DisplayPort;
- 	/*
- 	 * FIXME : We need to initialize built-in panels before external panels.
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -451,7 +451,6 @@ struct intel_dp {
- 	uint8_t downstream_ports[DP_MAX_DOWNSTREAM_PORTS];
- 	struct i2c_adapter adapter;
- 	struct i2c_algo_dp_aux_data algo;
--	bool is_pch_edp;
- 	uint8_t train_set[4];
- 	int panel_power_up_delay;
- 	int panel_power_down_delay;
-@@ -566,7 +565,6 @@ extern void ironlake_edp_panel_on(struct
- extern void ironlake_edp_panel_off(struct intel_dp *intel_dp);
- extern void ironlake_edp_panel_vdd_on(struct intel_dp *intel_dp);
- extern void ironlake_edp_panel_vdd_off(struct intel_dp *intel_dp, bool sync);
--extern bool intel_encoder_is_pch_edp(struct drm_encoder *encoder);
- extern int intel_plane_init(struct drm_device *dev, enum pipe pipe, int plane);
- extern void intel_flush_display_plane(struct drm_i915_private *dev_priv,
- 				      enum plane plane);
diff --git a/patches.baytrail/0144-drm-i915-print-DP-init-debug-messages-from-a-single-.patch b/patches.baytrail/0144-drm-i915-print-DP-init-debug-messages-from-a-single-.patch
deleted file mode 100644
index c4bccb427723f..0000000000000
--- a/patches.baytrail/0144-drm-i915-print-DP-init-debug-messages-from-a-single-.patch
+++ /dev/null
@@ -1,61 +0,0 @@
-From c7340a18574d949caa2400ced8a3bb66531123e6 Mon Sep 17 00:00:00 2001
-From: Imre Deak <imre.deak@intel.com>
-Date: Wed, 8 May 2013 13:14:08 +0300
-Subject: drm/i915: print DP init debug messages from a single place
-
-Signed-off-by: Imre Deak <imre.deak@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit e7281eab0bb4a5265593866d6f7acea2812fe0ec)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c |   12 +++---------
- drivers/gpu/drm/i915/intel_dp.c      |    4 ++++
- 2 files changed, 7 insertions(+), 9 deletions(-)
-
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -8860,10 +8860,8 @@ static void intel_setup_outputs(struct d
- 				intel_hdmi_init(dev, GEN4_HDMIB, PORT_B);
- 			}
- 
--			if (!found && SUPPORTS_INTEGRATED_DP(dev)) {
--				DRM_DEBUG_KMS("probing DP_B\n");
-+			if (!found && SUPPORTS_INTEGRATED_DP(dev))
- 				intel_dp_init(dev, DP_B, PORT_B);
--			}
- 		}
- 
- 		/* Before G4X SDVOC doesn't have its own detect register */
-@@ -8879,17 +8877,13 @@ static void intel_setup_outputs(struct d
- 				DRM_DEBUG_KMS("probing HDMI on SDVOC\n");
- 				intel_hdmi_init(dev, GEN4_HDMIC, PORT_C);
- 			}
--			if (SUPPORTS_INTEGRATED_DP(dev)) {
--				DRM_DEBUG_KMS("probing DP_C\n");
-+			if (SUPPORTS_INTEGRATED_DP(dev))
- 				intel_dp_init(dev, DP_C, PORT_C);
--			}
- 		}
- 
- 		if (SUPPORTS_INTEGRATED_DP(dev) &&
--		    (I915_READ(DP_D) & DP_DETECTED)) {
--			DRM_DEBUG_KMS("probing DP_D\n");
-+		    (I915_READ(DP_D) & DP_DETECTED))
- 			intel_dp_init(dev, DP_D, PORT_D);
--		}
- 	} else if (IS_GEN2(dev))
- 		intel_dvo_init(dev);
- 
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -3044,6 +3044,10 @@ intel_dp_init_connector(struct intel_dig
- 	if (type == DRM_MODE_CONNECTOR_eDP)
- 		intel_encoder->type = INTEL_OUTPUT_EDP;
- 
-+	DRM_DEBUG_KMS("Adding %s connector on port %c\n",
-+			type == DRM_MODE_CONNECTOR_eDP ? "eDP" : "DP",
-+			port_name(port));
-+
- 	drm_connector_init(dev, connector, &intel_dp_connector_funcs, type);
- 	drm_connector_helper_add(connector, &intel_dp_connector_helper_funcs);
- 
diff --git a/patches.baytrail/0145-drm-i915-move-sdvo-TV-clock-computation-to-intel_sdv.patch b/patches.baytrail/0145-drm-i915-move-sdvo-TV-clock-computation-to-intel_sdv.patch
deleted file mode 100644
index bd3d53242d5a5..0000000000000
--- a/patches.baytrail/0145-drm-i915-move-sdvo-TV-clock-computation-to-intel_sdv.patch
+++ /dev/null
@@ -1,132 +0,0 @@
-From b1dbf2e4102430c03e7b724ba06cb4b20acf54b7 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Tue, 30 Apr 2013 14:01:41 +0200
-Subject: drm/i915: move sdvo TV clock computation to intel_sdvo.c
-
-We have a very nice infrastructure for this now!
-
-Note that the multifunction sdvo support is pretty neatly broken: We
-completely ignore userspace's request for which connector to wire up
-with the encoder and just use whatever the last detect callback has
-seen.
-
-Not something I'll fix in this patch, but unfortunately something
-which is also broken in the DDI code ...
-
-v2: Don't call sdvo_tv_clock twice.
-
-Reviewed-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 70484559296623d49e559a3a10fa32fd2bc5dcc3)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 30 ------------------------------
- drivers/gpu/drm/i915/intel_sdvo.c    | 30 ++++++++++++++++++++++++++++++
- 2 files changed, 30 insertions(+), 30 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 66e8ba541084..1315576ee14b 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -4296,30 +4296,6 @@ static int i9xx_get_refclk(struct drm_crtc *crtc, int num_connectors)
- 	return refclk;
- }
- 
--static void i9xx_adjust_sdvo_tv_clock(struct intel_crtc *crtc)
--{
--	unsigned dotclock = crtc->config.adjusted_mode.clock;
--	struct dpll *clock = &crtc->config.dpll;
--
--	/* SDVO TV has fixed PLL values depend on its clock range,
--	   this mirrors vbios setting. */
--	if (dotclock >= 100000 && dotclock < 140500) {
--		clock->p1 = 2;
--		clock->p2 = 10;
--		clock->n = 3;
--		clock->m1 = 16;
--		clock->m2 = 8;
--	} else if (dotclock >= 140500 && dotclock <= 200000) {
--		clock->p1 = 1;
--		clock->p2 = 10;
--		clock->n = 6;
--		clock->m1 = 12;
--		clock->m2 = 8;
--	}
--
--	crtc->config.clock_set = true;
--}
--
- static uint32_t pnv_dpll_compute_fp(struct dpll *dpll)
- {
- 	return (1 << dpll->n) << 16 | dpll->m1 << 8 | dpll->m2;
-@@ -4983,9 +4959,6 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
- 		intel_crtc->config.dpll.p2 = clock.p2;
- 	}
- 
--	if (is_sdvo && is_tv)
--		i9xx_adjust_sdvo_tv_clock(intel_crtc);
--
- 	if (IS_GEN2(dev))
- 		i8xx_update_pll(intel_crtc, adjusted_mode,
- 				has_reduced_clock ? &reduced_clock : NULL,
-@@ -5592,9 +5565,6 @@ static bool ironlake_compute_clocks(struct drm_crtc *crtc,
- 						     reduced_clock);
- 	}
- 
--	if (is_sdvo && is_tv)
--		i9xx_adjust_sdvo_tv_clock(to_intel_crtc(crtc));
--
- 	return true;
- }
- 
-diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
-index d4ea6c265ce1..e1e59578db2d 100644
---- a/drivers/gpu/drm/i915/intel_sdvo.c
-+++ b/drivers/gpu/drm/i915/intel_sdvo.c
-@@ -1041,6 +1041,32 @@ intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo,
- 	return true;
- }
- 
-+static void i9xx_adjust_sdvo_tv_clock(struct intel_crtc_config *pipe_config)
-+{
-+	unsigned dotclock = pipe_config->adjusted_mode.clock;
-+	struct dpll *clock = &pipe_config->dpll;
-+
-+	/* SDVO TV has fixed PLL values depend on its clock range,
-+	   this mirrors vbios setting. */
-+	if (dotclock >= 100000 && dotclock < 140500) {
-+		clock->p1 = 2;
-+		clock->p2 = 10;
-+		clock->n = 3;
-+		clock->m1 = 16;
-+		clock->m2 = 8;
-+	} else if (dotclock >= 140500 && dotclock <= 200000) {
-+		clock->p1 = 1;
-+		clock->p2 = 10;
-+		clock->n = 6;
-+		clock->m1 = 12;
-+		clock->m2 = 8;
-+	} else {
-+		WARN(1, "SDVO TV clock out of range: %i\n", dotclock);
-+	}
-+
-+	pipe_config->clock_set = true;
-+}
-+
- static bool intel_sdvo_compute_config(struct intel_encoder *encoder,
- 				      struct intel_crtc_config *pipe_config)
- {
-@@ -1097,6 +1123,10 @@ static bool intel_sdvo_compute_config(struct intel_encoder *encoder,
- 	if (intel_sdvo->color_range)
- 		pipe_config->limited_color_range = true;
- 
-+	/* Clock computation needs to happen after pixel multiplier. */
-+	if (intel_sdvo->is_tv)
-+		i9xx_adjust_sdvo_tv_clock(pipe_config);
-+
- 	return true;
- }
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0146-drm-i915-drop-TVclock-special-casing-on-ilk.patch b/patches.baytrail/0146-drm-i915-drop-TVclock-special-casing-on-ilk.patch
deleted file mode 100644
index 21af39a6921b9..0000000000000
--- a/patches.baytrail/0146-drm-i915-drop-TVclock-special-casing-on-ilk.patch
+++ /dev/null
@@ -1,57 +0,0 @@
-From a3870966ac27eef95da068ecfb4ca761ceeda19b Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Tue, 30 Apr 2013 14:01:42 +0200
-Subject: drm/i915: drop TVclock special casing on ilk+
-
-TV-out uses the same reference clock as everyone else. The only
-difference seems to be in the slightly different CB tuning limit.
-
-Note that PLL_REF_INPUT_TVCLKINBC is a reserved value on ilk+. Also
-strictly speaking we don't support native TV-out on ilk+, hence all
-that code is dead. But Bspec still contains some residual mentions of
-native TV-out on some pch-split platforms, so I've figured it doesn't
-hurt to keep the code around a bit longer (e.g. in the cb tune
-function).
-
-v2: Improve the commit message as Jani suggested in his review.
-
-Reviewed-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit b4c09f3bbda97ec685afd604d8a3a08c72465910)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 11 +----------
- 1 file changed, 1 insertion(+), 10 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 1315576ee14b..d747f227bfe3 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -5649,9 +5649,6 @@ static uint32_t ironlake_compute_dpll(struct intel_crtc *intel_crtc,
- 			if (intel_encoder->needs_tv_clock)
- 				is_tv = true;
- 			break;
--		case INTEL_OUTPUT_TVOUT:
--			is_tv = true;
--			break;
- 		}
- 
- 		num_connectors++;
-@@ -5710,13 +5707,7 @@ static uint32_t ironlake_compute_dpll(struct intel_crtc *intel_crtc,
- 		break;
- 	}
- 
--	if (is_sdvo && is_tv)
--		dpll |= PLL_REF_INPUT_TVCLKINBC;
--	else if (is_tv)
--		/* XXX: just matching BIOS for now */
--		/*	dpll |= PLL_REF_INPUT_TVCLKINBC; */
--		dpll |= 3;
--	else if (is_lvds && intel_panel_use_ssc(dev_priv) && num_connectors < 2)
-+	if (is_lvds && intel_panel_use_ssc(dev_priv) && num_connectors < 2)
- 		dpll |= PLLB_REF_INPUT_SPREADSPECTRUMIN;
- 	else
- 		dpll |= PLL_REF_INPUT_DREFCLK;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0147-drm-i915-rip-out-TV-out-lore.patch b/patches.baytrail/0147-drm-i915-rip-out-TV-out-lore.patch
deleted file mode 100644
index f50fe2d378331..0000000000000
--- a/patches.baytrail/0147-drm-i915-rip-out-TV-out-lore.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-From 7e26f0edcc0626e680878903e2806ae7695b9ef9 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Tue, 30 Apr 2013 14:01:43 +0200
-Subject: drm/i915: rip out TV-out lore ...
-
-This seems to be an impressive piece of copy&pasta lore. I've
-checked all docs and on most platforms these bits are all MBZ, with
-the exception of the SDVO pixel multiplier on gen3. On gen4 that
-moved to a special DPLL_MD registers.
-
-No indication whatsoever that we actually need this for native
-TV-out support. I suspect this started as a hack when we didn't
-yet have proper pixel multiplier support in place for SDVO TV, but
-then got stuck in a life of its own.
-
-Just rip it out.
-
-Reviewed-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit fec32900cc8f4ec8ad6b3007d2035e598f128f24)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 4 ----
- 1 file changed, 4 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index d747f227bfe3..ca2d851d3b73 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -4596,10 +4596,6 @@ static void i9xx_update_pll(struct intel_crtc *crtc,
- 
- 	if (is_sdvo && needs_tv_clock)
- 		dpll |= PLL_REF_INPUT_TVCLKINBC;
--	else if (intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_TVOUT))
--		/* XXX: just matching BIOS for now */
--		/*	dpll |= PLL_REF_INPUT_TVCLKINBC; */
--		dpll |= 3;
- 	else if (intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_LVDS) &&
- 		 intel_panel_use_ssc(dev_priv) && num_connectors < 2)
- 		dpll |= PLLB_REF_INPUT_SPREADSPECTRUMIN;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0148-drm-i915-rip-out-now-unused-is_foo-tracking-from-crt.patch b/patches.baytrail/0148-drm-i915-rip-out-now-unused-is_foo-tracking-from-crt.patch
deleted file mode 100644
index fd1fe64bf8a2e..0000000000000
--- a/patches.baytrail/0148-drm-i915-rip-out-now-unused-is_foo-tracking-from-crt.patch
+++ /dev/null
@@ -1,92 +0,0 @@
-From 837ba391ce81f7fee547b684e7ddb89e86f1a219 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Tue, 30 Apr 2013 14:01:44 +0200
-Subject: drm/i915: rip out now unused is_foo tracking from crtc code
-
-More ugly stuff gone for good! The big special case left now is
-lvds (which is indeed really special).
-
-Reviewed-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit a16af721e83466b965c7e53d5350e16abf9691e4)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 28 +++-------------------------
- 1 file changed, 3 insertions(+), 25 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index ca2d851d3b73..72433196d976 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -4890,8 +4890,8 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
- 	int refclk, num_connectors = 0;
- 	intel_clock_t clock, reduced_clock;
- 	u32 dspcntr;
--	bool ok, has_reduced_clock = false, is_sdvo = false;
--	bool is_lvds = false, is_tv = false;
-+	bool ok, has_reduced_clock = false;
-+	bool is_lvds = false;
- 	struct intel_encoder *encoder;
- 	const intel_limit_t *limit;
- 	int ret;
-@@ -4901,15 +4901,6 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
- 		case INTEL_OUTPUT_LVDS:
- 			is_lvds = true;
- 			break;
--		case INTEL_OUTPUT_SDVO:
--		case INTEL_OUTPUT_HDMI:
--			is_sdvo = true;
--			if (encoder->needs_tv_clock)
--				is_tv = true;
--			break;
--		case INTEL_OUTPUT_TVOUT:
--			is_tv = true;
--			break;
- 		}
- 
- 		num_connectors++;
-@@ -5345,7 +5336,6 @@ static int ironlake_get_refclk(struct drm_crtc *crtc)
- 	struct drm_device *dev = crtc->dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct intel_encoder *encoder;
--	struct intel_encoder *edp_encoder = NULL;
- 	int num_connectors = 0;
- 	bool is_lvds = false;
- 
-@@ -5354,9 +5344,6 @@ static int ironlake_get_refclk(struct drm_crtc *crtc)
- 		case INTEL_OUTPUT_LVDS:
- 			is_lvds = true;
- 			break;
--		case INTEL_OUTPUT_EDP:
--			edp_encoder = encoder;
--			break;
- 		}
- 		num_connectors++;
- 	}
-@@ -5515,22 +5502,13 @@ static bool ironlake_compute_clocks(struct drm_crtc *crtc,
- 	struct intel_encoder *intel_encoder;
- 	int refclk;
- 	const intel_limit_t *limit;
--	bool ret, is_sdvo = false, is_tv = false, is_lvds = false;
-+	bool ret, is_lvds = false;
- 
- 	for_each_encoder_on_crtc(dev, crtc, intel_encoder) {
- 		switch (intel_encoder->type) {
- 		case INTEL_OUTPUT_LVDS:
- 			is_lvds = true;
- 			break;
--		case INTEL_OUTPUT_SDVO:
--		case INTEL_OUTPUT_HDMI:
--			is_sdvo = true;
--			if (intel_encoder->needs_tv_clock)
--				is_tv = true;
--			break;
--		case INTEL_OUTPUT_TVOUT:
--			is_tv = true;
--			break;
- 		}
- 	}
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0149-drm-i915-make-SDVO-TV-out-work-for-multifunction-dev.patch b/patches.baytrail/0149-drm-i915-make-SDVO-TV-out-work-for-multifunction-dev.patch
deleted file mode 100644
index 919c36df64eef..0000000000000
--- a/patches.baytrail/0149-drm-i915-make-SDVO-TV-out-work-for-multifunction-dev.patch
+++ /dev/null
@@ -1,156 +0,0 @@
-From 023747d4c8ddcacb3bdc2b5944f2517f26e2207f Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Tue, 30 Apr 2013 14:01:45 +0200
-Subject: drm/i915: make SDVO TV-out work for multifunction devices
-
-We need to track this correctly. While at it shovel the boolean
-to track whether the sdvo is in tv mode or not into pipe_config.
-
-Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=36997
-Tested-by: Pierre Assal <pierre.assal@verint.com>
-Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=63609
-Tested-by: cancan,feng <cancan.feng@intel.com>
-Reviewed-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 09ede5414f0215461c933032630bf9c3a61a8ba3)
-[dbasehore: Fix simple conflict by using new version and compile error by
-removing no longer used function argument]
-Signed-off-by: Derek Basehore <dbasehore@chromium.org>
-
-Conflicts:
-	drivers/gpu/drm/i915/intel_display.c
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 14 +++++---------
- drivers/gpu/drm/i915/intel_drv.h     |  5 ++++-
- drivers/gpu/drm/i915/intel_sdvo.c    |  8 ++------
- 3 files changed, 11 insertions(+), 16 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 72433196d976..0cfe23a65439 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -4534,8 +4534,7 @@ static void vlv_update_pll(struct intel_crtc *crtc)
- 
- static void i9xx_update_pll(struct intel_crtc *crtc,
- 			    intel_clock_t *reduced_clock,
--			    int num_connectors,
--			    bool needs_tv_clock)
-+			    int num_connectors)
- {
- 	struct drm_device *dev = crtc->base.dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
-@@ -4594,7 +4593,7 @@ static void i9xx_update_pll(struct intel_crtc *crtc,
- 	if (INTEL_INFO(dev)->gen >= 4)
- 		dpll |= (6 << PLL_LOAD_PULSE_PHASE_SHIFT);
- 
--	if (is_sdvo && needs_tv_clock)
-+	if (crtc->config.sdvo_tv_clock)
- 		dpll |= PLL_REF_INPUT_TVCLKINBC;
- 	else if (intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_LVDS) &&
- 		 intel_panel_use_ssc(dev_priv) && num_connectors < 2)
-@@ -4955,8 +4954,7 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
- 	else
- 		i9xx_update_pll(intel_crtc,
- 				has_reduced_clock ? &reduced_clock : NULL,
--				num_connectors,
--				is_sdvo && is_tv);
-+				num_connectors);
- 
- 	/* Set up the display plane register */
- 	dspcntr = DISPPLANE_GAMMA_ENABLE;
-@@ -5610,7 +5608,7 @@ static uint32_t ironlake_compute_dpll(struct intel_crtc *intel_crtc,
- 	struct intel_encoder *intel_encoder;
- 	uint32_t dpll;
- 	int factor, num_connectors = 0;
--	bool is_lvds = false, is_sdvo = false, is_tv = false;
-+	bool is_lvds = false, is_sdvo = false;
- 
- 	for_each_encoder_on_crtc(dev, crtc, intel_encoder) {
- 		switch (intel_encoder->type) {
-@@ -5620,8 +5618,6 @@ static uint32_t ironlake_compute_dpll(struct intel_crtc *intel_crtc,
- 		case INTEL_OUTPUT_SDVO:
- 		case INTEL_OUTPUT_HDMI:
- 			is_sdvo = true;
--			if (intel_encoder->needs_tv_clock)
--				is_tv = true;
- 			break;
- 		}
- 
-@@ -5635,7 +5631,7 @@ static uint32_t ironlake_compute_dpll(struct intel_crtc *intel_crtc,
- 		     dev_priv->lvds_ssc_freq == 100) ||
- 		    (HAS_PCH_IBX(dev) && intel_is_dual_link_lvds(dev)))
- 			factor = 25;
--	} else if (is_sdvo && is_tv)
-+	} else if (intel_crtc->config.sdvo_tv_clock)
- 		factor = 20;
- 
- 	if (ironlake_needs_fb_cb_tune(&intel_crtc->config.dpll, factor))
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index 7744595b07e2..8ef7496b74ef 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -120,7 +120,6 @@ struct intel_encoder {
- 	struct intel_crtc *new_crtc;
- 
- 	int type;
--	bool needs_tv_clock;
- 	/*
- 	 * Intel hw has only one MUX where encoders could be clone, hence a
- 	 * simple flag is enough to compute the possible_clones mask.
-@@ -223,6 +222,10 @@ struct intel_crtc_config {
- 	/* Controls for the clock computation, to override various stages. */
- 	bool clock_set;
- 
-+	/* SDVO TV has a bunch of special case. To make multifunction encoders
-+	 * work correctly, we need to track this at runtime.*/
-+	bool sdvo_tv_clock;
-+
- 	/*
- 	 * crtc bandwidth limit, don't increase pipe bpp or clock if not really
- 	 * required. This is set in the 2nd loop of calling encoder's
-diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
-index e1e59578db2d..03831c95b228 100644
---- a/drivers/gpu/drm/i915/intel_sdvo.c
-+++ b/drivers/gpu/drm/i915/intel_sdvo.c
-@@ -1092,6 +1092,7 @@ static bool intel_sdvo_compute_config(struct intel_encoder *encoder,
- 		(void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
- 							   mode,
- 							   adjusted_mode);
-+		pipe_config->sdvo_tv_clock = true;
- 	} else if (intel_sdvo->is_lvds) {
- 		if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
- 							     intel_sdvo->sdvo_lvds_fixed_mode))
-@@ -1655,12 +1656,9 @@ intel_sdvo_detect(struct drm_connector *connector, bool force)
- 	if (ret == connector_status_connected) {
- 		intel_sdvo->is_tv = false;
- 		intel_sdvo->is_lvds = false;
--		intel_sdvo->base.needs_tv_clock = false;
- 
--		if (response & SDVO_TV_MASK) {
-+		if (response & SDVO_TV_MASK)
- 			intel_sdvo->is_tv = true;
--			intel_sdvo->base.needs_tv_clock = true;
--		}
- 		if (response & SDVO_LVDS_MASK)
- 			intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
- 	}
-@@ -2359,7 +2357,6 @@ intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
- 	intel_sdvo_connector->output_flag = type;
- 
- 	intel_sdvo->is_tv = true;
--	intel_sdvo->base.needs_tv_clock = true;
- 
- 	intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
- 
-@@ -2447,7 +2444,6 @@ static bool
- intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
- {
- 	intel_sdvo->is_tv = false;
--	intel_sdvo->base.needs_tv_clock = false;
- 	intel_sdvo->is_lvds = false;
- 
- 	/* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0150-drm-i915-Organize-VBT-stuff-inside-drm_i915_private.patch b/patches.baytrail/0150-drm-i915-Organize-VBT-stuff-inside-drm_i915_private.patch
deleted file mode 100644
index 26d011478412d..0000000000000
--- a/patches.baytrail/0150-drm-i915-Organize-VBT-stuff-inside-drm_i915_private.patch
+++ /dev/null
@@ -1,643 +0,0 @@
-From 82b4a30a84555370265717f340fde4dae7ecf935 Mon Sep 17 00:00:00 2001
-From: James Ausmus <james.ausmus@intel.com>
-Date: Mon, 23 Sep 2013 16:51:08 -0700
-Subject: drm/i915: Organize VBT stuff inside drm_i915_private
-
-drm_i915_private is getting bigger and bigger when adding new vbt stuff.
-So, the better way of getting drm_i915_private organized is to create
-a special structure for vbt stuff.
-
-v2: Basically conflicts fixes
-
-Reviewed-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 41aa344866e3ba1d117a798355c35d44d7cc6318)
-
-Conflicts:
-	drivers/gpu/drm/i915/intel_sdvo.c
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_dma.c      |    8 +-
- drivers/gpu/drm/i915/i915_drv.h      |   57 +++++++++++--------
- drivers/gpu/drm/i915/intel_bios.c    |  100 +++++++++++++++++------------------
- drivers/gpu/drm/i915/intel_crt.c     |    4 -
- drivers/gpu/drm/i915/intel_display.c |   12 ++--
- drivers/gpu/drm/i915/intel_dp.c      |   18 +++---
- drivers/gpu/drm/i915/intel_lvds.c    |   16 ++---
- drivers/gpu/drm/i915/intel_pm.c      |    2 
- drivers/gpu/drm/i915/intel_sdvo.c    |   24 +++-----
- drivers/gpu/drm/i915/intel_tv.c      |    8 +-
- 10 files changed, 127 insertions(+), 122 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_dma.c
-+++ b/drivers/gpu/drm/i915/i915_dma.c
-@@ -1753,10 +1753,10 @@ int i915_driver_unload(struct drm_device
- 		 * free the memory space allocated for the child device
- 		 * config parsed from VBT
- 		 */
--		if (dev_priv->child_dev && dev_priv->child_dev_num) {
--			kfree(dev_priv->child_dev);
--			dev_priv->child_dev = NULL;
--			dev_priv->child_dev_num = 0;
-+		if (dev_priv->vbt.child_dev && dev_priv->vbt.child_dev_num) {
-+			kfree(dev_priv->vbt.child_dev);
-+			dev_priv->vbt.child_dev = NULL;
-+			dev_priv->vbt.child_dev_num = 0;
- 		}
- 
- 		vga_switcheroo_unregister_client(dev->pdev);
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -892,6 +892,37 @@ enum modeset_restore {
- 	MODESET_SUSPENDED,
- };
- 
-+struct intel_vbt_data {
-+	struct drm_display_mode *lfp_lvds_vbt_mode; /* if any */
-+	struct drm_display_mode *sdvo_lvds_vbt_mode; /* if any */
-+
-+	/* Feature bits */
-+	unsigned int int_tv_support:1;
-+	unsigned int lvds_dither:1;
-+	unsigned int lvds_vbt:1;
-+	unsigned int int_crt_support:1;
-+	unsigned int lvds_use_ssc:1;
-+	unsigned int display_clock_mode:1;
-+	unsigned int fdi_rx_polarity_inverted:1;
-+	int lvds_ssc_freq;
-+	unsigned int bios_lvds_val; /* initial [PCH_]LVDS reg val in VBIOS */
-+
-+	/* eDP */
-+	int edp_rate;
-+	int edp_lanes;
-+	int edp_preemphasis;
-+	int edp_vswing;
-+	bool edp_initialized;
-+	bool edp_support;
-+	int edp_bpp;
-+	struct edp_power_seq edp_pps;
-+
-+	int crt_ddc_pin;
-+
-+	int child_dev_num;
-+	struct child_device_config *child_dev;
-+};
-+
- typedef struct drm_i915_private {
- 	struct drm_device *dev;
- 	struct kmem_cache *slab;
-@@ -971,6 +1002,7 @@ typedef struct drm_i915_private {
- 	struct intel_fbc_work *fbc_work;
- 
- 	struct intel_opregion opregion;
-+	struct intel_vbt_data vbt;
- 
- 	/* overlay */
- 	struct intel_overlay *overlay;
-@@ -987,31 +1019,8 @@ typedef struct drm_i915_private {
- 	/* LVDS info */
- 	struct drm_display_mode *lfp_lvds_vbt_mode; /* if any */
- 	struct drm_display_mode *sdvo_lvds_vbt_mode; /* if any */
--
--	/* Feature bits from the VBIOS */
--	unsigned int int_tv_support:1;
--	unsigned int lvds_dither:1;
--	unsigned int lvds_vbt:1;
--	unsigned int int_crt_support:1;
--	unsigned int lvds_use_ssc:1;
--	unsigned int display_clock_mode:1;
--	unsigned int fdi_rx_polarity_inverted:1;
--	int lvds_ssc_freq;
--	unsigned int bios_lvds_val; /* initial [PCH_]LVDS reg val in VBIOS */
--	struct {
--		int rate;
--		int lanes;
--		int preemphasis;
--		int vswing;
--
--		bool initialized;
--		bool support;
--		int bpp;
--		struct edp_power_seq pps;
--	} edp;
- 	bool no_aux_handshake;
- 
--	int crt_ddc_pin;
- 	struct drm_i915_fence_reg fence_regs[I915_MAX_NUM_FENCES]; /* assume 965 */
- 	int fence_reg_start; /* 4 if userland hasn't ioctl'd us yet */
- 	int num_fence_regs; /* 8 on pre-965, 16 otherwise */
-@@ -1053,8 +1062,6 @@ typedef struct drm_i915_private {
- 	/* indicates the reduced downclock for LVDS*/
- 	int lvds_downclock;
- 	u16 orig_clock;
--	int child_dev_num;
--	struct child_device_config *child_dev;
- 
- 	bool mchbar_need_disable;
- 
---- a/drivers/gpu/drm/i915/intel_bios.c
-+++ b/drivers/gpu/drm/i915/intel_bios.c
-@@ -212,7 +212,7 @@ parse_lfp_panel_data(struct drm_i915_pri
- 	if (!lvds_options)
- 		return;
- 
--	dev_priv->lvds_dither = lvds_options->pixel_dither;
-+	dev_priv->vbt.lvds_dither = lvds_options->pixel_dither;
- 	if (lvds_options->panel_type == 0xff)
- 		return;
- 
-@@ -226,7 +226,7 @@ parse_lfp_panel_data(struct drm_i915_pri
- 	if (!lvds_lfp_data_ptrs)
- 		return;
- 
--	dev_priv->lvds_vbt = 1;
-+	dev_priv->vbt.lvds_vbt = 1;
- 
- 	panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
- 					       lvds_lfp_data_ptrs,
-@@ -238,7 +238,7 @@ parse_lfp_panel_data(struct drm_i915_pri
- 
- 	fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing);
- 
--	dev_priv->lfp_lvds_vbt_mode = panel_fixed_mode;
-+	dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
- 
- 	DRM_DEBUG_KMS("Found panel mode in BIOS VBT tables:\n");
- 	drm_mode_debug_printmodeline(panel_fixed_mode);
-@@ -274,9 +274,9 @@ parse_lfp_panel_data(struct drm_i915_pri
- 		/* check the resolution, just to be sure */
- 		if (fp_timing->x_res == panel_fixed_mode->hdisplay &&
- 		    fp_timing->y_res == panel_fixed_mode->vdisplay) {
--			dev_priv->bios_lvds_val = fp_timing->lvds_reg_val;
-+			dev_priv->vbt.bios_lvds_val = fp_timing->lvds_reg_val;
- 			DRM_DEBUG_KMS("VBT initial LVDS value %x\n",
--				      dev_priv->bios_lvds_val);
-+				      dev_priv->vbt.bios_lvds_val);
- 		}
- 	}
- }
-@@ -316,7 +316,7 @@ parse_sdvo_panel_data(struct drm_i915_pr
- 
- 	fill_detail_timing_data(panel_fixed_mode, dvo_timing + index);
- 
--	dev_priv->sdvo_lvds_vbt_mode = panel_fixed_mode;
-+	dev_priv->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode;
- 
- 	DRM_DEBUG_KMS("Found SDVO panel mode in BIOS VBT tables:\n");
- 	drm_mode_debug_printmodeline(panel_fixed_mode);
-@@ -345,20 +345,20 @@ parse_general_features(struct drm_i915_p
- 
- 	general = find_section(bdb, BDB_GENERAL_FEATURES);
- 	if (general) {
--		dev_priv->int_tv_support = general->int_tv_support;
--		dev_priv->int_crt_support = general->int_crt_support;
--		dev_priv->lvds_use_ssc = general->enable_ssc;
--		dev_priv->lvds_ssc_freq =
-+		dev_priv->vbt.int_tv_support = general->int_tv_support;
-+		dev_priv->vbt.int_crt_support = general->int_crt_support;
-+		dev_priv->vbt.lvds_use_ssc = general->enable_ssc;
-+		dev_priv->vbt.lvds_ssc_freq =
- 			intel_bios_ssc_frequency(dev, general->ssc_freq);
--		dev_priv->display_clock_mode = general->display_clock_mode;
--		dev_priv->fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted;
-+		dev_priv->vbt.display_clock_mode = general->display_clock_mode;
-+		dev_priv->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted;
- 		DRM_DEBUG_KMS("BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n",
--			      dev_priv->int_tv_support,
--			      dev_priv->int_crt_support,
--			      dev_priv->lvds_use_ssc,
--			      dev_priv->lvds_ssc_freq,
--			      dev_priv->display_clock_mode,
--			      dev_priv->fdi_rx_polarity_inverted);
-+			      dev_priv->vbt.int_tv_support,
-+			      dev_priv->vbt.int_crt_support,
-+			      dev_priv->vbt.lvds_use_ssc,
-+			      dev_priv->vbt.lvds_ssc_freq,
-+			      dev_priv->vbt.display_clock_mode,
-+			      dev_priv->vbt.fdi_rx_polarity_inverted);
- 	}
- }
- 
-@@ -375,7 +375,7 @@ parse_general_definitions(struct drm_i91
- 			int bus_pin = general->crt_ddc_gmbus_pin;
- 			DRM_DEBUG_KMS("crt_ddc_bus_pin: %d\n", bus_pin);
- 			if (intel_gmbus_is_port_valid(bus_pin))
--				dev_priv->crt_ddc_pin = bus_pin;
-+				dev_priv->vbt.crt_ddc_pin = bus_pin;
- 		} else {
- 			DRM_DEBUG_KMS("BDB_GD too small (%d). Invalid.\n",
- 				      block_size);
-@@ -486,7 +486,7 @@ parse_driver_features(struct drm_i915_pr
- 
- 	if (SUPPORTS_EDP(dev) &&
- 	    driver->lvds_config == BDB_DRIVER_FEATURE_EDP)
--		dev_priv->edp.support = 1;
-+		dev_priv->vbt.edp_support = 1;
- 
- 	if (driver->dual_frequency)
- 		dev_priv->render_reclock_avail = true;
-@@ -501,20 +501,20 @@ parse_edp(struct drm_i915_private *dev_p
- 
- 	edp = find_section(bdb, BDB_EDP);
- 	if (!edp) {
--		if (SUPPORTS_EDP(dev_priv->dev) && dev_priv->edp.support)
-+		if (SUPPORTS_EDP(dev_priv->dev) && dev_priv->vbt.edp_support)
- 			DRM_DEBUG_KMS("No eDP BDB found but eDP panel supported.\n");
- 		return;
- 	}
- 
- 	switch ((edp->color_depth >> (panel_type * 2)) & 3) {
- 	case EDP_18BPP:
--		dev_priv->edp.bpp = 18;
-+		dev_priv->vbt.edp_bpp = 18;
- 		break;
- 	case EDP_24BPP:
--		dev_priv->edp.bpp = 24;
-+		dev_priv->vbt.edp_bpp = 24;
- 		break;
- 	case EDP_30BPP:
--		dev_priv->edp.bpp = 30;
-+		dev_priv->vbt.edp_bpp = 30;
- 		break;
- 	}
- 
-@@ -522,48 +522,48 @@ parse_edp(struct drm_i915_private *dev_p
- 	edp_pps = &edp->power_seqs[panel_type];
- 	edp_link_params = &edp->link_params[panel_type];
- 
--	dev_priv->edp.pps = *edp_pps;
-+	dev_priv->vbt.edp_pps = *edp_pps;
- 
--	dev_priv->edp.rate = edp_link_params->rate ? DP_LINK_BW_2_7 :
-+	dev_priv->vbt.edp_rate = edp_link_params->rate ? DP_LINK_BW_2_7 :
- 		DP_LINK_BW_1_62;
- 	switch (edp_link_params->lanes) {
- 	case 0:
--		dev_priv->edp.lanes = 1;
-+		dev_priv->vbt.edp_lanes = 1;
- 		break;
- 	case 1:
--		dev_priv->edp.lanes = 2;
-+		dev_priv->vbt.edp_lanes = 2;
- 		break;
- 	case 3:
- 	default:
--		dev_priv->edp.lanes = 4;
-+		dev_priv->vbt.edp_lanes = 4;
- 		break;
- 	}
- 	switch (edp_link_params->preemphasis) {
- 	case 0:
--		dev_priv->edp.preemphasis = DP_TRAIN_PRE_EMPHASIS_0;
-+		dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPHASIS_0;
- 		break;
- 	case 1:
--		dev_priv->edp.preemphasis = DP_TRAIN_PRE_EMPHASIS_3_5;
-+		dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPHASIS_3_5;
- 		break;
- 	case 2:
--		dev_priv->edp.preemphasis = DP_TRAIN_PRE_EMPHASIS_6;
-+		dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPHASIS_6;
- 		break;
- 	case 3:
--		dev_priv->edp.preemphasis = DP_TRAIN_PRE_EMPHASIS_9_5;
-+		dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPHASIS_9_5;
- 		break;
- 	}
- 	switch (edp_link_params->vswing) {
- 	case 0:
--		dev_priv->edp.vswing = DP_TRAIN_VOLTAGE_SWING_400;
-+		dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_400;
- 		break;
- 	case 1:
--		dev_priv->edp.vswing = DP_TRAIN_VOLTAGE_SWING_600;
-+		dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_600;
- 		break;
- 	case 2:
--		dev_priv->edp.vswing = DP_TRAIN_VOLTAGE_SWING_800;
-+		dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_800;
- 		break;
- 	case 3:
--		dev_priv->edp.vswing = DP_TRAIN_VOLTAGE_SWING_1200;
-+		dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_1200;
- 		break;
- 	}
- }
-@@ -611,13 +611,13 @@ parse_device_mapping(struct drm_i915_pri
- 		DRM_DEBUG_KMS("no child dev is parsed from VBT\n");
- 		return;
- 	}
--	dev_priv->child_dev = kcalloc(count, sizeof(*p_child), GFP_KERNEL);
--	if (!dev_priv->child_dev) {
-+	dev_priv->vbt.child_dev = kcalloc(count, sizeof(*p_child), GFP_KERNEL);
-+	if (!dev_priv->vbt.child_dev) {
- 		DRM_DEBUG_KMS("No memory space for child device\n");
- 		return;
- 	}
- 
--	dev_priv->child_dev_num = count;
-+	dev_priv->vbt.child_dev_num = count;
- 	count = 0;
- 	for (i = 0; i < child_device_num; i++) {
- 		p_child = &(p_defs->devices[i]);
-@@ -625,7 +625,7 @@ parse_device_mapping(struct drm_i915_pri
- 			/* skip the device block if device type is invalid */
- 			continue;
- 		}
--		child_dev_ptr = dev_priv->child_dev + count;
-+		child_dev_ptr = dev_priv->vbt.child_dev + count;
- 		count++;
- 		memcpy((void *)child_dev_ptr, (void *)p_child,
- 					sizeof(*p_child));
-@@ -638,23 +638,23 @@ init_vbt_defaults(struct drm_i915_privat
- {
- 	struct drm_device *dev = dev_priv->dev;
- 
--	dev_priv->crt_ddc_pin = GMBUS_PORT_VGADDC;
-+	dev_priv->vbt.crt_ddc_pin = GMBUS_PORT_VGADDC;
- 
- 	/* LFP panel data */
--	dev_priv->lvds_dither = 1;
--	dev_priv->lvds_vbt = 0;
-+	dev_priv->vbt.lvds_dither = 1;
-+	dev_priv->vbt.lvds_vbt = 0;
- 
- 	/* SDVO panel data */
--	dev_priv->sdvo_lvds_vbt_mode = NULL;
-+	dev_priv->vbt.sdvo_lvds_vbt_mode = NULL;
- 
- 	/* general features */
--	dev_priv->int_tv_support = 1;
--	dev_priv->int_crt_support = 1;
-+	dev_priv->vbt.int_tv_support = 1;
-+	dev_priv->vbt.int_crt_support = 1;
- 
- 	/* Default to using SSC */
--	dev_priv->lvds_use_ssc = 1;
--	dev_priv->lvds_ssc_freq = intel_bios_ssc_frequency(dev, 1);
--	DRM_DEBUG_KMS("Set default to SSC at %dMHz\n", dev_priv->lvds_ssc_freq);
-+	dev_priv->vbt.lvds_use_ssc = 1;
-+	dev_priv->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(dev, 1);
-+	DRM_DEBUG_KMS("Set default to SSC at %dMHz\n", dev_priv->vbt.lvds_ssc_freq);
- }
- 
- static int __init intel_no_opregion_vbt_callback(const struct dmi_system_id *id)
---- a/drivers/gpu/drm/i915/intel_crt.c
-+++ b/drivers/gpu/drm/i915/intel_crt.c
-@@ -435,7 +435,7 @@ static bool intel_crt_detect_ddc(struct
- 
- 	BUG_ON(crt->base.type != INTEL_OUTPUT_ANALOG);
- 
--	i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->crt_ddc_pin);
-+	i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->vbt.crt_ddc_pin);
- 	edid = intel_crt_get_edid(connector, i2c);
- 
- 	if (edid) {
-@@ -641,7 +641,7 @@ static int intel_crt_get_modes(struct dr
- 	int ret;
- 	struct i2c_adapter *i2c;
- 
--	i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->crt_ddc_pin);
-+	i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->vbt.crt_ddc_pin);
- 	ret = intel_crt_ddc_get_modes(connector, i2c);
- 	if (ret || !IS_G4X(dev))
- 		return ret;
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -4248,7 +4248,7 @@ static inline bool intel_panel_use_ssc(s
- {
- 	if (i915_panel_use_ssc >= 0)
- 		return i915_panel_use_ssc != 0;
--	return dev_priv->lvds_use_ssc
-+	return dev_priv->vbt.lvds_use_ssc
- 		&& !(dev_priv->quirks & QUIRK_LVDS_SSC_DISABLE);
- }
- 
-@@ -4284,7 +4284,7 @@ static int i9xx_get_refclk(struct drm_cr
- 		refclk = vlv_get_refclk(crtc);
- 	} else if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS) &&
- 	    intel_panel_use_ssc(dev_priv) && num_connectors < 2) {
--		refclk = dev_priv->lvds_ssc_freq * 1000;
-+		refclk = dev_priv->vbt.lvds_ssc_freq * 1000;
- 		DRM_DEBUG_KMS("using SSC reference clock of %d MHz\n",
- 			      refclk / 1000);
- 	} else if (!IS_GEN2(dev)) {
-@@ -5036,7 +5036,7 @@ static void ironlake_init_pch_refclk(str
- 	}
- 
- 	if (HAS_PCH_IBX(dev)) {
--		has_ck505 = dev_priv->display_clock_mode;
-+		has_ck505 = dev_priv->vbt.display_clock_mode;
- 		can_ssc = has_ck505;
- 	} else {
- 		has_ck505 = false;
-@@ -5348,8 +5348,8 @@ static int ironlake_get_refclk(struct dr
- 
- 	if (is_lvds && intel_panel_use_ssc(dev_priv) && num_connectors < 2) {
- 		DRM_DEBUG_KMS("using SSC reference clock of %d MHz\n",
--			      dev_priv->lvds_ssc_freq);
--		return dev_priv->lvds_ssc_freq * 1000;
-+			      dev_priv->vbt.lvds_ssc_freq);
-+		return dev_priv->vbt.lvds_ssc_freq * 1000;
- 	}
- 
- 	return 120000;
-@@ -5628,7 +5628,7 @@ static uint32_t ironlake_compute_dpll(st
- 	factor = 21;
- 	if (is_lvds) {
- 		if ((intel_panel_use_ssc(dev_priv) &&
--		     dev_priv->lvds_ssc_freq == 100) ||
-+		     dev_priv->vbt.lvds_ssc_freq == 100) ||
- 		    (HAS_PCH_IBX(dev) && intel_is_dual_link_lvds(dev)))
- 			factor = 25;
- 	} else if (intel_crtc->config.sdvo_tv_clock)
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -738,10 +738,10 @@ intel_dp_compute_config(struct intel_enc
- 	 * recomments. This means we'll up-dither 16bpp framebuffers on
- 	 * high-depth panels.
- 	 */
--	if (is_edp(intel_dp) && dev_priv->edp.bpp) {
-+	if (is_edp(intel_dp) && dev_priv->vbt.edp_bpp) {
- 		DRM_DEBUG_KMS("forcing bpp for eDP panel to BIOS-provided %i\n",
--			      dev_priv->edp.bpp);
--		bpp = dev_priv->edp.bpp;
-+			      dev_priv->vbt.edp_bpp);
-+		bpp = dev_priv->vbt.edp_bpp;
- 	}
- 
- 	for (; bpp >= 6*3; bpp -= 2*3) {
-@@ -2811,11 +2811,11 @@ bool intel_dpd_is_edp(struct drm_device
- 	struct child_device_config *p_child;
- 	int i;
- 
--	if (!dev_priv->child_dev_num)
-+	if (!dev_priv->vbt.child_dev_num)
- 		return false;
- 
--	for (i = 0; i < dev_priv->child_dev_num; i++) {
--		p_child = dev_priv->child_dev + i;
-+	for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
-+		p_child = dev_priv->vbt.child_dev + i;
- 
- 		if (p_child->dvo_port == PORT_IDPD &&
- 		    p_child->device_type == DEVICE_TYPE_eDP)
-@@ -2893,7 +2893,7 @@ intel_dp_init_panel_power_sequencer(stru
- 	DRM_DEBUG_KMS("cur t1_t3 %d t8 %d t9 %d t10 %d t11_t12 %d\n",
- 		      cur.t1_t3, cur.t8, cur.t9, cur.t10, cur.t11_t12);
- 
--	vbt = dev_priv->edp.pps;
-+	vbt = dev_priv->vbt.edp_pps;
- 
- 	/* Upper limits from eDP 1.3 spec. Note that we use the clunky units of
- 	 * our hw here, which are all in 100usec. */
-@@ -3163,8 +3163,8 @@ intel_dp_init_connector(struct intel_dig
- 		}
- 
- 		/* fallback to VBT if available for eDP */
--		if (!fixed_mode && dev_priv->lfp_lvds_vbt_mode) {
--			fixed_mode = drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
-+		if (!fixed_mode && dev_priv->vbt.lfp_lvds_vbt_mode) {
-+			fixed_mode = drm_mode_duplicate(dev, dev_priv->vbt.lfp_lvds_vbt_mode);
- 			if (fixed_mode)
- 				fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
- 		}
---- a/drivers/gpu/drm/i915/intel_lvds.c
-+++ b/drivers/gpu/drm/i915/intel_lvds.c
-@@ -767,11 +767,11 @@ static bool lvds_is_present_in_vbt(struc
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	int i;
- 
--	if (!dev_priv->child_dev_num)
-+	if (!dev_priv->vbt.child_dev_num)
- 		return true;
- 
--	for (i = 0; i < dev_priv->child_dev_num; i++) {
--		struct child_device_config *child = dev_priv->child_dev + i;
-+	for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
-+		struct child_device_config *child = dev_priv->vbt.child_dev + i;
- 
- 		/* If the device type is not LFP, continue.
- 		 * We have to check both the new identifiers as well as the
-@@ -859,7 +859,7 @@ static bool compute_is_dual_link_lvds(st
- 	 */
- 	val = I915_READ(lvds_encoder->reg);
- 	if (!(val & ~(LVDS_PIPE_MASK | LVDS_DETECTED)))
--		val = dev_priv->bios_lvds_val;
-+		val = dev_priv->vbt.bios_lvds_val;
- 
- 	return (val & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP;
- }
-@@ -919,7 +919,7 @@ bool intel_lvds_init(struct drm_device *
- 	if (HAS_PCH_SPLIT(dev)) {
- 		if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
- 			return false;
--		if (dev_priv->edp.support) {
-+		if (dev_priv->vbt.edp_support) {
- 			DRM_DEBUG_KMS("disable LVDS for eDP support\n");
- 			return false;
- 		}
-@@ -1037,11 +1037,11 @@ bool intel_lvds_init(struct drm_device *
- 	}
- 
- 	/* Failed to get EDID, what about VBT? */
--	if (dev_priv->lfp_lvds_vbt_mode) {
-+	if (dev_priv->vbt.lfp_lvds_vbt_mode) {
- 		DRM_DEBUG_KMS("using mode from VBT: ");
--		drm_mode_debug_printmodeline(dev_priv->lfp_lvds_vbt_mode);
-+		drm_mode_debug_printmodeline(dev_priv->vbt.lfp_lvds_vbt_mode);
- 
--		fixed_mode = drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
-+		fixed_mode = drm_mode_duplicate(dev, dev_priv->vbt.lfp_lvds_vbt_mode);
- 		if (fixed_mode) {
- 			fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
- 			goto out;
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -3889,7 +3889,7 @@ static void cpt_init_clock_gating(struct
- 		val = I915_READ(TRANS_CHICKEN2(pipe));
- 		val |= TRANS_CHICKEN2_TIMING_OVERRIDE;
- 		val &= ~TRANS_CHICKEN2_FDI_POLARITY_REVERSED;
--		if (dev_priv->fdi_rx_polarity_inverted)
-+		if (dev_priv->vbt.fdi_rx_polarity_inverted)
- 			val |= TRANS_CHICKEN2_FDI_POLARITY_REVERSED;
- 		val &= ~TRANS_CHICKEN2_FRAME_START_DELAY_MASK;
- 		val &= ~TRANS_CHICKEN2_DISABLE_DEEP_COLOR_COUNTER;
---- a/drivers/gpu/drm/i915/intel_sdvo.c
-+++ b/drivers/gpu/drm/i915/intel_sdvo.c
-@@ -1526,7 +1526,7 @@ intel_sdvo_get_analog_edid(struct drm_co
- 
- 	return drm_get_edid(connector,
- 			    intel_gmbus_get_adapter(dev_priv,
--						    dev_priv->crt_ddc_pin));
-+						    dev_priv->vbt.crt_ddc_pin));
- }
- 
- static enum drm_connector_status
-@@ -1800,21 +1800,12 @@ static void intel_sdvo_get_lvds_modes(st
- 	struct drm_display_mode *newmode;
- 
- 	/*
--	 * Attempt to get the mode list from DDC.
--	 * Assume that the preferred modes are
--	 * arranged in priority order.
--	 */
--	intel_ddc_get_modes(connector, &intel_sdvo->ddc);
--
--	/*
- 	 * Fetch modes from VBT. For SDVO prefer the VBT mode since some
--	 * SDVO->LVDS transcoders can't cope with the EDID mode. Since
--	 * drm_mode_probed_add adds the mode at the head of the list we add it
--	 * last.
-+	 * SDVO->LVDS transcoders can't cope with the EDID mode.
- 	 */
--	if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
-+	if (dev_priv->vbt.sdvo_lvds_vbt_mode != NULL) {
- 		newmode = drm_mode_duplicate(connector->dev,
--					     dev_priv->sdvo_lvds_vbt_mode);
-+					     dev_priv->vbt.sdvo_lvds_vbt_mode);
- 		if (newmode != NULL) {
- 			/* Guarantee the mode is preferred */
- 			newmode->type = (DRM_MODE_TYPE_PREFERRED |
-@@ -1823,6 +1814,13 @@ static void intel_sdvo_get_lvds_modes(st
- 		}
- 	}
- 
-+	/*
-+	 * Attempt to get the mode list from DDC.
-+	 * Assume that the preferred modes are
-+	 * arranged in priority order.
-+	 */
-+	intel_ddc_get_modes(connector, &intel_sdvo->ddc);
-+
- 	list_for_each_entry(newmode, &connector->probed_modes, head) {
- 		if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
- 			intel_sdvo->sdvo_lvds_fixed_mode =
---- a/drivers/gpu/drm/i915/intel_tv.c
-+++ b/drivers/gpu/drm/i915/intel_tv.c
-@@ -1529,12 +1529,12 @@ static int tv_is_present_in_vbt(struct d
- 	struct child_device_config *p_child;
- 	int i, ret;
- 
--	if (!dev_priv->child_dev_num)
-+	if (!dev_priv->vbt.child_dev_num)
- 		return 1;
- 
- 	ret = 0;
--	for (i = 0; i < dev_priv->child_dev_num; i++) {
--		p_child = dev_priv->child_dev + i;
-+	for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
-+		p_child = dev_priv->vbt.child_dev + i;
- 		/*
- 		 * If the device type is not TV, continue.
- 		 */
-@@ -1572,7 +1572,7 @@ intel_tv_init(struct drm_device *dev)
- 		return;
- 	}
- 	/* Even if we have an encoder we may not have a connector */
--	if (!dev_priv->int_tv_support)
-+	if (!dev_priv->vbt.int_tv_support)
- 		return;
- 
- 	/*
diff --git a/patches.baytrail/0151-drm-i915-Add-support-for-FBC-on-Ivybridge.patch b/patches.baytrail/0151-drm-i915-Add-support-for-FBC-on-Ivybridge.patch
deleted file mode 100644
index 4e646d215076a..0000000000000
--- a/patches.baytrail/0151-drm-i915-Add-support-for-FBC-on-Ivybridge.patch
+++ /dev/null
@@ -1,145 +0,0 @@
-From d99cb6d41f54512a1db8488fdf35847fc98bb419 Mon Sep 17 00:00:00 2001
-From: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Date: Mon, 6 May 2013 19:37:33 -0300
-Subject: drm/i915: Add support for FBC on Ivybridge.
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-This patch introduce Frame Buffer Compression (FBC) support for IVB,
-without enabling it by default.
-It adds a new function gen7_enable_fbc to avoid getting
-ironlake_enable_fbc messed with many IS_IVYBRIDGE checks.
-
-v2: Fixes from Ville.
-     	*  Fix Plane. FBC is tied to primary plane A in HSW
-    	*  Fix DPFC initial write to avoid let trash on the register.
-v3: Checking for bad plane on intel_update_fbc() as Chris suggested.
-v4: Ville pointed out that according to BSpec FBC_CTL bits 0:3 must be 0.
-v5: Up to v4 this work was entirely focused on Haswell. However Ville
-    noticed I could reuse the FBC work done for HSW and get FBC for free
-    at Ivybridge. So it makes more sense enable FBC for IVB first.
-    FBC for HSW comming on next patches. We are just not enabling it by
-    default on IVB.
-v6: Fix confused commit name (by Matt Turner).
-v7: Remove gtt_offset shift since it is page aligned byte offset (by Ville).
-
-Cc: Matt Turner <mattst88@gmail.com>
-Cc: Chris Wilson <chris@chris-wilson.co.uk>
-Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit abe959c7e06f62f064432a2aa00c199f1f672c81)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.c |  1 +
- drivers/gpu/drm/i915/i915_reg.h |  6 ++++++
- drivers/gpu/drm/i915/intel_pm.c | 33 +++++++++++++++++++++++++++++++--
- 3 files changed, 38 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
-index 9e9b612828b2..e7099372913c 100644
---- a/drivers/gpu/drm/i915/i915_drv.c
-+++ b/drivers/gpu/drm/i915/i915_drv.c
-@@ -280,6 +280,7 @@ static const struct intel_device_info intel_ivybridge_m_info = {
- 	GEN7_FEATURES,
- 	.is_ivybridge = 1,
- 	.is_mobile = 1,
-+	.has_fbc = 1,
- };
- 
- static const struct intel_device_info intel_ivybridge_q_info = {
-diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
-index 5de7b03ff32a..b7e222464d42 100644
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -925,7 +925,9 @@
- #define   DPFC_CTL_EN		(1<<31)
- #define   DPFC_CTL_PLANEA	(0<<30)
- #define   DPFC_CTL_PLANEB	(1<<30)
-+#define   IVB_DPFC_CTL_PLANE_SHIFT	(29)
- #define   DPFC_CTL_FENCE_EN	(1<<29)
-+#define   IVB_DPFC_CTL_FENCE_EN	(1<<28)
- #define   DPFC_CTL_PERSISTENT_MODE	(1<<25)
- #define   DPFC_SR_EN		(1<<10)
- #define   DPFC_CTL_LIMIT_1X	(0<<6)
-@@ -958,6 +960,7 @@
- #define ILK_DPFC_CHICKEN	0x43224
- #define ILK_FBC_RT_BASE		0x2128
- #define   ILK_FBC_RT_VALID	(1<<0)
-+#define   SNB_FBC_FRONT_BUFFER	(1<<1)
- 
- #define ILK_DISPLAY_CHICKEN1	0x42000
- #define   ILK_FBCQ_DIS		(1<<22)
-@@ -973,6 +976,9 @@
- #define   SNB_CPU_FENCE_ENABLE	(1<<29)
- #define DPFC_CPU_FENCE_OFFSET	0x100104
- 
-+/* Framebuffer compression for Ivybridge */
-+#define IVB_FBC_RT_BASE			0x7020
-+
- 
- /*
-  * GPIO regs
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index df200a67492f..5c976e8aba4c 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -253,6 +253,30 @@ static bool ironlake_fbc_enabled(struct drm_device *dev)
- 	return I915_READ(ILK_DPFC_CONTROL) & DPFC_CTL_EN;
- }
- 
-+static void gen7_enable_fbc(struct drm_crtc *crtc, unsigned long interval)
-+{
-+	struct drm_device *dev = crtc->dev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct drm_framebuffer *fb = crtc->fb;
-+	struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
-+	struct drm_i915_gem_object *obj = intel_fb->obj;
-+	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
-+
-+	I915_WRITE(IVB_FBC_RT_BASE, obj->gtt_offset | ILK_FBC_RT_VALID);
-+
-+	I915_WRITE(ILK_DPFC_CONTROL, DPFC_CTL_EN | DPFC_CTL_LIMIT_1X |
-+		   IVB_DPFC_CTL_FENCE_EN |
-+		   intel_crtc->plane << IVB_DPFC_CTL_PLANE_SHIFT);
-+
-+	I915_WRITE(SNB_DPFC_CTL_SA,
-+		   SNB_CPU_FENCE_ENABLE | obj->fence_reg);
-+	I915_WRITE(DPFC_CPU_FENCE_OFFSET, crtc->y);
-+
-+	sandybridge_blit_fbc_update(dev);
-+
-+	DRM_DEBUG_KMS("enabled fbc on plane %d\n", intel_crtc->plane);
-+}
-+
- bool intel_fbc_enabled(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
-@@ -439,7 +463,7 @@ void intel_update_fbc(struct drm_device *dev)
- 	if (enable_fbc < 0) {
- 		DRM_DEBUG_KMS("fbc set to per-chip default\n");
- 		enable_fbc = 1;
--		if (INTEL_INFO(dev)->gen <= 6)
-+		if (INTEL_INFO(dev)->gen <= 7)
- 			enable_fbc = 0;
- 	}
- 	if (!enable_fbc) {
-@@ -4507,7 +4531,12 @@ void intel_init_pm(struct drm_device *dev)
- 	if (I915_HAS_FBC(dev)) {
- 		if (HAS_PCH_SPLIT(dev)) {
- 			dev_priv->display.fbc_enabled = ironlake_fbc_enabled;
--			dev_priv->display.enable_fbc = ironlake_enable_fbc;
-+			if (IS_IVYBRIDGE(dev))
-+				dev_priv->display.enable_fbc =
-+					gen7_enable_fbc;
-+			else
-+				dev_priv->display.enable_fbc =
-+					ironlake_enable_fbc;
- 			dev_priv->display.disable_fbc = ironlake_disable_fbc;
- 		} else if (IS_GM45(dev)) {
- 			dev_priv->display.fbc_enabled = g4x_fbc_enabled;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0152-drm-i915-IVB-FBC-WaFbcAsynchFlipDisableFbcQueue.patch b/patches.baytrail/0152-drm-i915-IVB-FBC-WaFbcAsynchFlipDisableFbcQueue.patch
deleted file mode 100644
index 611b5bcad8386..0000000000000
--- a/patches.baytrail/0152-drm-i915-IVB-FBC-WaFbcAsynchFlipDisableFbcQueue.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From 1942bc78fa200b14c821f42f57114f48fabbe5e7 Mon Sep 17 00:00:00 2001
-From: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Date: Mon, 6 May 2013 19:37:34 -0300
-Subject: drm/i915: IVB FBC WaFbcAsynchFlipDisableFbcQueue
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Display register 42000h bit 22 must be set to 1b for the entire time that
-Frame Buffer Compression is enabled.
-
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 30ca7c6f97e266d122b03261f75f530d5c83608b)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 5c976e8aba4c..26aabed959fa 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -268,6 +268,8 @@ static void gen7_enable_fbc(struct drm_crtc *crtc, unsigned long interval)
- 		   IVB_DPFC_CTL_FENCE_EN |
- 		   intel_crtc->plane << IVB_DPFC_CTL_PLANE_SHIFT);
- 
-+	/* WaFbcAsynchFlipDisableFbcQueue */
-+	I915_WRITE(ILK_DISPLAY_CHICKEN1, ILK_FBCQ_DIS);
- 	I915_WRITE(SNB_DPFC_CTL_SA,
- 		   SNB_CPU_FENCE_ENABLE | obj->fence_reg);
- 	I915_WRITE(DPFC_CPU_FENCE_OFFSET, crtc->y);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0153-drm-i915-IVB-FBC-WaFbcDisableDpfcClockGating.patch b/patches.baytrail/0153-drm-i915-IVB-FBC-WaFbcDisableDpfcClockGating.patch
deleted file mode 100644
index 8baa017b5b1a2..0000000000000
--- a/patches.baytrail/0153-drm-i915-IVB-FBC-WaFbcDisableDpfcClockGating.patch
+++ /dev/null
@@ -1,57 +0,0 @@
-From 5da0d11e20f7ce731582e8bc9ef8398149768469 Mon Sep 17 00:00:00 2001
-From: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Date: Thu, 9 May 2013 14:08:38 -0300
-Subject: drm/i915: IVB FBC WaFbcDisableDpfcClockGating
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Display register 42020h bit 9 must be set to 1b for the entire time that
-Frame Buffer Compression is enabled.
-
-v2: RMW to preserve other bits (by Ville)
-v3: Fix from Ville: sed &/| at RMW
-v4: Too far on sed.
-
-Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit b74ea102b746a1e5157d6b0c83f486ad3c6235d1)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 11 +++++++++++
- 1 file changed, 11 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 26aabed959fa..61420e64a6e6 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -242,6 +242,12 @@ static void ironlake_disable_fbc(struct drm_device *dev)
- 		dpfc_ctl &= ~DPFC_CTL_EN;
- 		I915_WRITE(ILK_DPFC_CONTROL, dpfc_ctl);
- 
-+		if (IS_IVYBRIDGE(dev))
-+			/* WaFbcDisableDpfcClockGating */
-+			I915_WRITE(ILK_DSPCLK_GATE_D,
-+				   I915_READ(ILK_DSPCLK_GATE_D) &
-+				   ~ILK_DPFCUNIT_CLOCK_GATE_DISABLE);
-+
- 		DRM_DEBUG_KMS("disabled FBC\n");
- 	}
- }
-@@ -270,6 +276,11 @@ static void gen7_enable_fbc(struct drm_crtc *crtc, unsigned long interval)
- 
- 	/* WaFbcAsynchFlipDisableFbcQueue */
- 	I915_WRITE(ILK_DISPLAY_CHICKEN1, ILK_FBCQ_DIS);
-+	/* WaFbcDisableDpfcClockGating */
-+	I915_WRITE(ILK_DSPCLK_GATE_D,
-+		   I915_READ(ILK_DSPCLK_GATE_D) |
-+		   ILK_DPFCUNIT_CLOCK_GATE_DISABLE);
-+
- 	I915_WRITE(SNB_DPFC_CTL_SA,
- 		   SNB_CPU_FENCE_ENABLE | obj->fence_reg);
- 	I915_WRITE(DPFC_CPU_FENCE_OFFSET, crtc->y);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0154-drm-i915-Enable-FBC-at-Haswell.patch b/patches.baytrail/0154-drm-i915-Enable-FBC-at-Haswell.patch
deleted file mode 100644
index 6e81104754c93..0000000000000
--- a/patches.baytrail/0154-drm-i915-Enable-FBC-at-Haswell.patch
+++ /dev/null
@@ -1,114 +0,0 @@
-From 7d76969ff0fbacb8563c0fa1f2c90a26c5c50cf3 Mon Sep 17 00:00:00 2001
-From: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Date: Mon, 6 May 2013 19:37:36 -0300
-Subject: drm/i915: Enable FBC at Haswell.
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-This patch introduce Frame Buffer Compression (FBC) support for HSW.
-FBC is tied to primary plane A in HSW.
-
-v2: Ville pointed out docs say FBC must be disabled before disabling
-    the plane on HSW.
-v3: Really enabling it by default at HSW.
-
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Tested-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 891348b2bf08d8946e0621bec49802897b28c1c4)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.c      |  1 +
- drivers/gpu/drm/i915/intel_display.c |  5 +++--
- drivers/gpu/drm/i915/intel_pm.c      | 21 ++++++++++++---------
- 3 files changed, 16 insertions(+), 11 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
-index e7099372913c..daf727e79ded 100644
---- a/drivers/gpu/drm/i915/i915_drv.c
-+++ b/drivers/gpu/drm/i915/i915_drv.c
-@@ -319,6 +319,7 @@ static const struct intel_device_info intel_haswell_m_info = {
- 	.is_mobile = 1,
- 	.has_ddi = 1,
- 	.has_fpga_dbg = 1,
-+	.has_fbc = 1,
- };
- 
- static const struct pci_device_id pciidlist[] = {		/* aka */
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index cd9600956dd7..ef6aa3496cbf 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -3518,11 +3518,12 @@ static void haswell_crtc_disable(struct drm_crtc *crtc)
- 	drm_vblank_off(dev, pipe);
- 	intel_crtc_update_cursor(crtc, false);
- 
--	intel_disable_plane(dev_priv, plane, pipe);
--
-+	/* FBC must be disabled before disabling the plane on HSW. */
- 	if (dev_priv->cfb_plane == plane)
- 		intel_disable_fbc(dev);
- 
-+	intel_disable_plane(dev_priv, plane, pipe);
-+
- 	if (intel_crtc->config.has_pch_encoder)
- 		intel_set_pch_fifo_underrun_reporting(dev, TRANSCODER_A, false);
- 	intel_disable_pipe(dev_priv, pipe);
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 61420e64a6e6..c28c0ac072bf 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -274,12 +274,14 @@ static void gen7_enable_fbc(struct drm_crtc *crtc, unsigned long interval)
- 		   IVB_DPFC_CTL_FENCE_EN |
- 		   intel_crtc->plane << IVB_DPFC_CTL_PLANE_SHIFT);
- 
--	/* WaFbcAsynchFlipDisableFbcQueue */
--	I915_WRITE(ILK_DISPLAY_CHICKEN1, ILK_FBCQ_DIS);
--	/* WaFbcDisableDpfcClockGating */
--	I915_WRITE(ILK_DSPCLK_GATE_D,
--		   I915_READ(ILK_DSPCLK_GATE_D) |
--		   ILK_DPFCUNIT_CLOCK_GATE_DISABLE);
-+	if (IS_IVYBRIDGE(dev)) {
-+		/* WaFbcAsynchFlipDisableFbcQueue */
-+		I915_WRITE(ILK_DISPLAY_CHICKEN1, ILK_FBCQ_DIS);
-+		/* WaFbcDisableDpfcClockGating */
-+		I915_WRITE(ILK_DSPCLK_GATE_D,
-+			   I915_READ(ILK_DSPCLK_GATE_D) |
-+			   ILK_DPFCUNIT_CLOCK_GATE_DISABLE);
-+	}
- 
- 	I915_WRITE(SNB_DPFC_CTL_SA,
- 		   SNB_CPU_FENCE_ENABLE | obj->fence_reg);
-@@ -476,7 +478,7 @@ void intel_update_fbc(struct drm_device *dev)
- 	if (enable_fbc < 0) {
- 		DRM_DEBUG_KMS("fbc set to per-chip default\n");
- 		enable_fbc = 1;
--		if (INTEL_INFO(dev)->gen <= 7)
-+		if (INTEL_INFO(dev)->gen <= 7 && !IS_HASWELL(dev))
- 			enable_fbc = 0;
- 	}
- 	if (!enable_fbc) {
-@@ -497,7 +499,8 @@ void intel_update_fbc(struct drm_device *dev)
- 		dev_priv->no_fbc_reason = FBC_MODE_TOO_LARGE;
- 		goto out_disable;
- 	}
--	if ((IS_I915GM(dev) || IS_I945GM(dev)) && intel_crtc->plane != 0) {
-+	if ((IS_I915GM(dev) || IS_I945GM(dev) || IS_HASWELL(dev)) &&
-+	    intel_crtc->plane != 0) {
- 		DRM_DEBUG_KMS("plane not 0, disabling compression\n");
- 		dev_priv->no_fbc_reason = FBC_BAD_PLANE;
- 		goto out_disable;
-@@ -4544,7 +4547,7 @@ void intel_init_pm(struct drm_device *dev)
- 	if (I915_HAS_FBC(dev)) {
- 		if (HAS_PCH_SPLIT(dev)) {
- 			dev_priv->display.fbc_enabled = ironlake_fbc_enabled;
--			if (IS_IVYBRIDGE(dev))
-+			if (IS_IVYBRIDGE(dev) || IS_HASWELL(dev))
- 				dev_priv->display.enable_fbc =
- 					gen7_enable_fbc;
- 			else
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0155-drm-i915-HSW-FBC-WaFbcAsynchFlipDisableFbcQueue.patch b/patches.baytrail/0155-drm-i915-HSW-FBC-WaFbcAsynchFlipDisableFbcQueue.patch
deleted file mode 100644
index 174d9428444fc..0000000000000
--- a/patches.baytrail/0155-drm-i915-HSW-FBC-WaFbcAsynchFlipDisableFbcQueue.patch
+++ /dev/null
@@ -1,57 +0,0 @@
-From 988115b9951d3f5d51619d1cbb249431956de23e Mon Sep 17 00:00:00 2001
-From: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Date: Mon, 6 May 2013 19:37:37 -0300
-Subject: drm/i915: HSW FBC WaFbcAsynchFlipDisableFbcQueue
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Display register 420B0h bit 22 must be set to 1b for the entire time that
-Frame Buffer Compression is enabled.
-
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 285541647a816e00348916ba7387eeacea30eba9)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_reg.h | 7 +++++++
- drivers/gpu/drm/i915/intel_pm.c | 4 ++++
- 2 files changed, 11 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
-index b7e222464d42..21a1d4640310 100644
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -980,6 +980,13 @@
- #define IVB_FBC_RT_BASE			0x7020
- 
- 
-+#define _HSW_PIPE_SLICE_CHICKEN_1_A	0x420B0
-+#define _HSW_PIPE_SLICE_CHICKEN_1_B	0x420B4
-+#define   HSW_BYPASS_FBC_QUEUE		(1<<22)
-+#define HSW_PIPE_SLICE_CHICKEN_1(pipe) _PIPE(pipe, + \
-+					     _HSW_PIPE_SLICE_CHICKEN_1_A, + \
-+					     _HSW_PIPE_SLICE_CHICKEN_1_B)
-+
- /*
-  * GPIO regs
-  */
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index c28c0ac072bf..0b4429252c0c 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -281,6 +281,10 @@ static void gen7_enable_fbc(struct drm_crtc *crtc, unsigned long interval)
- 		I915_WRITE(ILK_DSPCLK_GATE_D,
- 			   I915_READ(ILK_DSPCLK_GATE_D) |
- 			   ILK_DPFCUNIT_CLOCK_GATE_DISABLE);
-+	} else {
-+		/* WaFbcAsynchFlipDisableFbcQueue */
-+		I915_WRITE(HSW_PIPE_SLICE_CHICKEN_1(intel_crtc->pipe),
-+			   HSW_BYPASS_FBC_QUEUE);
- 	}
- 
- 	I915_WRITE(SNB_DPFC_CTL_SA,
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0156-drm-i915-HSW-FBC-WaFbcDisableDpfcClockGating.patch b/patches.baytrail/0156-drm-i915-HSW-FBC-WaFbcDisableDpfcClockGating.patch
deleted file mode 100644
index 162646f6f7373..0000000000000
--- a/patches.baytrail/0156-drm-i915-HSW-FBC-WaFbcDisableDpfcClockGating.patch
+++ /dev/null
@@ -1,76 +0,0 @@
-From fc6d6db5663ee3cbe8744b5f2152e243a01fe572 Mon Sep 17 00:00:00 2001
-From: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Date: Thu, 9 May 2013 14:20:50 -0300
-Subject: drm/i915: HSW FBC WaFbcDisableDpfcClockGating
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Display register 46500h bit 23 must be set to 1b for the entire time that
-Frame Buffer Compression is enabled.
-
-v2: Ville suggested to enable it back when disabling fbc to avoid wasting
-    power.
-
-v3: RMW to preserve other bits (by Ville)
-v4: Fix from Ville: sed &/| at RMW
-v5: Too far on sed.
-
-Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-[danvet: Insert missing space that checkpatch spotted.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit d89f2071461d5682b897c73278daaf25fd11aff5)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_reg.h |  3 +++
- drivers/gpu/drm/i915/intel_pm.c | 10 ++++++++++
- 2 files changed, 13 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
-index 21a1d4640310..83cc2e5dbd79 100644
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -987,6 +987,9 @@
- 					     _HSW_PIPE_SLICE_CHICKEN_1_A, + \
- 					     _HSW_PIPE_SLICE_CHICKEN_1_B)
- 
-+#define HSW_CLKGATE_DISABLE_PART_1	0x46500
-+#define   HSW_DPFC_GATING_DISABLE	(1<<23)
-+
- /*
-  * GPIO regs
-  */
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 0b4429252c0c..656ee57d1e05 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -248,6 +248,12 @@ static void ironlake_disable_fbc(struct drm_device *dev)
- 				   I915_READ(ILK_DSPCLK_GATE_D) &
- 				   ~ILK_DPFCUNIT_CLOCK_GATE_DISABLE);
- 
-+		if (IS_HASWELL(dev))
-+			/* WaFbcDisableDpfcClockGating */
-+			I915_WRITE(HSW_CLKGATE_DISABLE_PART_1,
-+				   I915_READ(HSW_CLKGATE_DISABLE_PART_1) &
-+				   ~HSW_DPFC_GATING_DISABLE);
-+
- 		DRM_DEBUG_KMS("disabled FBC\n");
- 	}
- }
-@@ -285,6 +291,10 @@ static void gen7_enable_fbc(struct drm_crtc *crtc, unsigned long interval)
- 		/* WaFbcAsynchFlipDisableFbcQueue */
- 		I915_WRITE(HSW_PIPE_SLICE_CHICKEN_1(intel_crtc->pipe),
- 			   HSW_BYPASS_FBC_QUEUE);
-+		/* WaFbcDisableDpfcClockGating */
-+		I915_WRITE(HSW_CLKGATE_DISABLE_PART_1,
-+			   I915_READ(HSW_CLKGATE_DISABLE_PART_1) |
-+			   HSW_DPFC_GATING_DISABLE);
- 	}
- 
- 	I915_WRITE(SNB_DPFC_CTL_SA,
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0157-drm-i915-Compute-WR-PLL-dividers-dynamically.patch b/patches.baytrail/0157-drm-i915-Compute-WR-PLL-dividers-dynamically.patch
deleted file mode 100644
index 3c86f7a34486a..0000000000000
--- a/patches.baytrail/0157-drm-i915-Compute-WR-PLL-dividers-dynamically.patch
+++ /dev/null
@@ -1,685 +0,0 @@
-From 47e16de4f9c39209142b58457859334ae65e48e5 Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Fri, 10 May 2013 14:01:51 +0100
-Subject: drm/i915: Compute WR PLL dividers dynamically
-
-Up to now, we were using a static table to match the clock frequency
-with a (r2,n2,p) triplet. Despite this table being big, it's by no mean
-comprehensive and we had to fall back to the closest frequency when the
-requested TMDS clock wasn't in the table.
-
-This patch computes (r2,n2,p) dynamically and get rid of The Big Table.
-
-v2: Replace the floating point constant 1e6 by 1000000
-
-Bugzilla: http://bugs.freedesktop.org/show_bug.cgi?id=58497
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> (v1)
-Tested-by: Paulo Zanoni <paulo.r.zanoni@intel.com> (v1)
-[danvet: s/        /^T/]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 1c0b85c566b7a5a5cdabb767a39b445ce271a4fa)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_ddi.c | 617 ++++++++++++++-------------------------
- 1 file changed, 214 insertions(+), 403 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
-index 217308ec3b3d..7799de733917 100644
---- a/drivers/gpu/drm/i915/intel_ddi.c
-+++ b/drivers/gpu/drm/i915/intel_ddi.c
-@@ -281,392 +281,6 @@ void hsw_fdi_link_train(struct drm_crtc *crtc)
- 	DRM_ERROR("FDI link training failed!\n");
- }
- 
--/* WRPLL clock dividers */
--struct wrpll_tmds_clock {
--	u32 clock;
--	u16 p;		/* Post divider */
--	u16 n2;		/* Feedback divider */
--	u16 r2;		/* Reference divider */
--};
--
--/* Table of matching values for WRPLL clocks programming for each frequency.
-- * The code assumes this table is sorted. */
--static const struct wrpll_tmds_clock wrpll_tmds_clock_table[] = {
--	{19750,	38,	25,	18},
--	{20000,	48,	32,	18},
--	{21000,	36,	21,	15},
--	{21912,	42,	29,	17},
--	{22000,	36,	22,	15},
--	{23000,	36,	23,	15},
--	{23500,	40,	40,	23},
--	{23750,	26,	16,	14},
--	{24000,	36,	24,	15},
--	{25000,	36,	25,	15},
--	{25175,	26,	40,	33},
--	{25200,	30,	21,	15},
--	{26000,	36,	26,	15},
--	{27000,	30,	21,	14},
--	{27027,	18,	100,	111},
--	{27500,	30,	29,	19},
--	{28000,	34,	30,	17},
--	{28320,	26,	30,	22},
--	{28322,	32,	42,	25},
--	{28750,	24,	23,	18},
--	{29000,	30,	29,	18},
--	{29750,	32,	30,	17},
--	{30000,	30,	25,	15},
--	{30750,	30,	41,	24},
--	{31000,	30,	31,	18},
--	{31500,	30,	28,	16},
--	{32000,	30,	32,	18},
--	{32500,	28,	32,	19},
--	{33000,	24,	22,	15},
--	{34000,	28,	30,	17},
--	{35000,	26,	32,	19},
--	{35500,	24,	30,	19},
--	{36000,	26,	26,	15},
--	{36750,	26,	46,	26},
--	{37000,	24,	23,	14},
--	{37762,	22,	40,	26},
--	{37800,	20,	21,	15},
--	{38000,	24,	27,	16},
--	{38250,	24,	34,	20},
--	{39000,	24,	26,	15},
--	{40000,	24,	32,	18},
--	{40500,	20,	21,	14},
--	{40541,	22,	147,	89},
--	{40750,	18,	19,	14},
--	{41000,	16,	17,	14},
--	{41500,	22,	44,	26},
--	{41540,	22,	44,	26},
--	{42000,	18,	21,	15},
--	{42500,	22,	45,	26},
--	{43000,	20,	43,	27},
--	{43163,	20,	24,	15},
--	{44000,	18,	22,	15},
--	{44900,	20,	108,	65},
--	{45000,	20,	25,	15},
--	{45250,	20,	52,	31},
--	{46000,	18,	23,	15},
--	{46750,	20,	45,	26},
--	{47000,	20,	40,	23},
--	{48000,	18,	24,	15},
--	{49000,	18,	49,	30},
--	{49500,	16,	22,	15},
--	{50000,	18,	25,	15},
--	{50500,	18,	32,	19},
--	{51000,	18,	34,	20},
--	{52000,	18,	26,	15},
--	{52406,	14,	34,	25},
--	{53000,	16,	22,	14},
--	{54000,	16,	24,	15},
--	{54054,	16,	173,	108},
--	{54500,	14,	24,	17},
--	{55000,	12,	22,	18},
--	{56000,	14,	45,	31},
--	{56250,	16,	25,	15},
--	{56750,	14,	25,	17},
--	{57000,	16,	27,	16},
--	{58000,	16,	43,	25},
--	{58250,	16,	38,	22},
--	{58750,	16,	40,	23},
--	{59000,	14,	26,	17},
--	{59341,	14,	40,	26},
--	{59400,	16,	44,	25},
--	{60000,	16,	32,	18},
--	{60500,	12,	39,	29},
--	{61000,	14,	49,	31},
--	{62000,	14,	37,	23},
--	{62250,	14,	42,	26},
--	{63000,	12,	21,	15},
--	{63500,	14,	28,	17},
--	{64000,	12,	27,	19},
--	{65000,	14,	32,	19},
--	{65250,	12,	29,	20},
--	{65500,	12,	32,	22},
--	{66000,	12,	22,	15},
--	{66667,	14,	38,	22},
--	{66750,	10,	21,	17},
--	{67000,	14,	33,	19},
--	{67750,	14,	58,	33},
--	{68000,	14,	30,	17},
--	{68179,	14,	46,	26},
--	{68250,	14,	46,	26},
--	{69000,	12,	23,	15},
--	{70000,	12,	28,	18},
--	{71000,	12,	30,	19},
--	{72000,	12,	24,	15},
--	{73000,	10,	23,	17},
--	{74000,	12,	23,	14},
--	{74176,	8,	100,	91},
--	{74250,	10,	22,	16},
--	{74481,	12,	43,	26},
--	{74500,	10,	29,	21},
--	{75000,	12,	25,	15},
--	{75250,	10,	39,	28},
--	{76000,	12,	27,	16},
--	{77000,	12,	53,	31},
--	{78000,	12,	26,	15},
--	{78750,	12,	28,	16},
--	{79000,	10,	38,	26},
--	{79500,	10,	28,	19},
--	{80000,	12,	32,	18},
--	{81000,	10,	21,	14},
--	{81081,	6,	100,	111},
--	{81624,	8,	29,	24},
--	{82000,	8,	17,	14},
--	{83000,	10,	40,	26},
--	{83950,	10,	28,	18},
--	{84000,	10,	28,	18},
--	{84750,	6,	16,	17},
--	{85000,	6,	17,	18},
--	{85250,	10,	30,	19},
--	{85750,	10,	27,	17},
--	{86000,	10,	43,	27},
--	{87000,	10,	29,	18},
--	{88000,	10,	44,	27},
--	{88500,	10,	41,	25},
--	{89000,	10,	28,	17},
--	{89012,	6,	90,	91},
--	{89100,	10,	33,	20},
--	{90000,	10,	25,	15},
--	{91000,	10,	32,	19},
--	{92000,	10,	46,	27},
--	{93000,	10,	31,	18},
--	{94000,	10,	40,	23},
--	{94500,	10,	28,	16},
--	{95000,	10,	44,	25},
--	{95654,	10,	39,	22},
--	{95750,	10,	39,	22},
--	{96000,	10,	32,	18},
--	{97000,	8,	23,	16},
--	{97750,	8,	42,	29},
--	{98000,	8,	45,	31},
--	{99000,	8,	22,	15},
--	{99750,	8,	34,	23},
--	{100000,	6,	20,	18},
--	{100500,	6,	19,	17},
--	{101000,	6,	37,	33},
--	{101250,	8,	21,	14},
--	{102000,	6,	17,	15},
--	{102250,	6,	25,	22},
--	{103000,	8,	29,	19},
--	{104000,	8,	37,	24},
--	{105000,	8,	28,	18},
--	{106000,	8,	22,	14},
--	{107000,	8,	46,	29},
--	{107214,	8,	27,	17},
--	{108000,	8,	24,	15},
--	{108108,	8,	173,	108},
--	{109000,	6,	23,	19},
--	{110000,	6,	22,	18},
--	{110013,	6,	22,	18},
--	{110250,	8,	49,	30},
--	{110500,	8,	36,	22},
--	{111000,	8,	23,	14},
--	{111264,	8,	150,	91},
--	{111375,	8,	33,	20},
--	{112000,	8,	63,	38},
--	{112500,	8,	25,	15},
--	{113100,	8,	57,	34},
--	{113309,	8,	42,	25},
--	{114000,	8,	27,	16},
--	{115000,	6,	23,	18},
--	{116000,	8,	43,	25},
--	{117000,	8,	26,	15},
--	{117500,	8,	40,	23},
--	{118000,	6,	38,	29},
--	{119000,	8,	30,	17},
--	{119500,	8,	46,	26},
--	{119651,	8,	39,	22},
--	{120000,	8,	32,	18},
--	{121000,	6,	39,	29},
--	{121250,	6,	31,	23},
--	{121750,	6,	23,	17},
--	{122000,	6,	42,	31},
--	{122614,	6,	30,	22},
--	{123000,	6,	41,	30},
--	{123379,	6,	37,	27},
--	{124000,	6,	51,	37},
--	{125000,	6,	25,	18},
--	{125250,	4,	13,	14},
--	{125750,	4,	27,	29},
--	{126000,	6,	21,	15},
--	{127000,	6,	24,	17},
--	{127250,	6,	41,	29},
--	{128000,	6,	27,	19},
--	{129000,	6,	43,	30},
--	{129859,	4,	25,	26},
--	{130000,	6,	26,	18},
--	{130250,	6,	42,	29},
--	{131000,	6,	32,	22},
--	{131500,	6,	38,	26},
--	{131850,	6,	41,	28},
--	{132000,	6,	22,	15},
--	{132750,	6,	28,	19},
--	{133000,	6,	34,	23},
--	{133330,	6,	37,	25},
--	{134000,	6,	61,	41},
--	{135000,	6,	21,	14},
--	{135250,	6,	167,	111},
--	{136000,	6,	62,	41},
--	{137000,	6,	35,	23},
--	{138000,	6,	23,	15},
--	{138500,	6,	40,	26},
--	{138750,	6,	37,	24},
--	{139000,	6,	34,	22},
--	{139050,	6,	34,	22},
--	{139054,	6,	34,	22},
--	{140000,	6,	28,	18},
--	{141000,	6,	36,	23},
--	{141500,	6,	22,	14},
--	{142000,	6,	30,	19},
--	{143000,	6,	27,	17},
--	{143472,	4,	17,	16},
--	{144000,	6,	24,	15},
--	{145000,	6,	29,	18},
--	{146000,	6,	47,	29},
--	{146250,	6,	26,	16},
--	{147000,	6,	49,	30},
--	{147891,	6,	23,	14},
--	{148000,	6,	23,	14},
--	{148250,	6,	28,	17},
--	{148352,	4,	100,	91},
--	{148500,	6,	33,	20},
--	{149000,	6,	48,	29},
--	{150000,	6,	25,	15},
--	{151000,	4,	19,	17},
--	{152000,	6,	27,	16},
--	{152280,	6,	44,	26},
--	{153000,	6,	34,	20},
--	{154000,	6,	53,	31},
--	{155000,	6,	31,	18},
--	{155250,	6,	50,	29},
--	{155750,	6,	45,	26},
--	{156000,	6,	26,	15},
--	{157000,	6,	61,	35},
--	{157500,	6,	28,	16},
--	{158000,	6,	65,	37},
--	{158250,	6,	44,	25},
--	{159000,	6,	53,	30},
--	{159500,	6,	39,	22},
--	{160000,	6,	32,	18},
--	{161000,	4,	31,	26},
--	{162000,	4,	18,	15},
--	{162162,	4,	131,	109},
--	{162500,	4,	53,	44},
--	{163000,	4,	29,	24},
--	{164000,	4,	17,	14},
--	{165000,	4,	22,	18},
--	{166000,	4,	32,	26},
--	{167000,	4,	26,	21},
--	{168000,	4,	46,	37},
--	{169000,	4,	104,	83},
--	{169128,	4,	64,	51},
--	{169500,	4,	39,	31},
--	{170000,	4,	34,	27},
--	{171000,	4,	19,	15},
--	{172000,	4,	51,	40},
--	{172750,	4,	32,	25},
--	{172800,	4,	32,	25},
--	{173000,	4,	41,	32},
--	{174000,	4,	49,	38},
--	{174787,	4,	22,	17},
--	{175000,	4,	35,	27},
--	{176000,	4,	30,	23},
--	{177000,	4,	38,	29},
--	{178000,	4,	29,	22},
--	{178500,	4,	37,	28},
--	{179000,	4,	53,	40},
--	{179500,	4,	73,	55},
--	{180000,	4,	20,	15},
--	{181000,	4,	55,	41},
--	{182000,	4,	31,	23},
--	{183000,	4,	42,	31},
--	{184000,	4,	30,	22},
--	{184750,	4,	26,	19},
--	{185000,	4,	37,	27},
--	{186000,	4,	51,	37},
--	{187000,	4,	36,	26},
--	{188000,	4,	32,	23},
--	{189000,	4,	21,	15},
--	{190000,	4,	38,	27},
--	{190960,	4,	41,	29},
--	{191000,	4,	41,	29},
--	{192000,	4,	27,	19},
--	{192250,	4,	37,	26},
--	{193000,	4,	20,	14},
--	{193250,	4,	53,	37},
--	{194000,	4,	23,	16},
--	{194208,	4,	23,	16},
--	{195000,	4,	26,	18},
--	{196000,	4,	45,	31},
--	{197000,	4,	35,	24},
--	{197750,	4,	41,	28},
--	{198000,	4,	22,	15},
--	{198500,	4,	25,	17},
--	{199000,	4,	28,	19},
--	{200000,	4,	37,	25},
--	{201000,	4,	61,	41},
--	{202000,	4,	112,	75},
--	{202500,	4,	21,	14},
--	{203000,	4,	146,	97},
--	{204000,	4,	62,	41},
--	{204750,	4,	44,	29},
--	{205000,	4,	38,	25},
--	{206000,	4,	29,	19},
--	{207000,	4,	23,	15},
--	{207500,	4,	40,	26},
--	{208000,	4,	37,	24},
--	{208900,	4,	48,	31},
--	{209000,	4,	48,	31},
--	{209250,	4,	31,	20},
--	{210000,	4,	28,	18},
--	{211000,	4,	25,	16},
--	{212000,	4,	22,	14},
--	{213000,	4,	30,	19},
--	{213750,	4,	38,	24},
--	{214000,	4,	46,	29},
--	{214750,	4,	35,	22},
--	{215000,	4,	43,	27},
--	{216000,	4,	24,	15},
--	{217000,	4,	37,	23},
--	{218000,	4,	42,	26},
--	{218250,	4,	42,	26},
--	{218750,	4,	34,	21},
--	{219000,	4,	47,	29},
--	{220000,	4,	44,	27},
--	{220640,	4,	49,	30},
--	{220750,	4,	36,	22},
--	{221000,	4,	36,	22},
--	{222000,	4,	23,	14},
--	{222525,	4,	28,	17},
--	{222750,	4,	33,	20},
--	{227000,	4,	37,	22},
--	{230250,	4,	29,	17},
--	{233500,	4,	38,	22},
--	{235000,	4,	40,	23},
--	{238000,	4,	30,	17},
--	{241500,	2,	17,	19},
--	{245250,	2,	20,	22},
--	{247750,	2,	22,	24},
--	{253250,	2,	15,	16},
--	{256250,	2,	18,	19},
--	{262500,	2,	31,	32},
--	{267250,	2,	66,	67},
--	{268500,	2,	94,	95},
--	{270000,	2,	14,	14},
--	{272500,	2,	77,	76},
--	{273750,	2,	57,	56},
--	{280750,	2,	24,	23},
--	{281250,	2,	23,	22},
--	{286000,	2,	17,	16},
--	{291750,	2,	26,	24},
--	{296703,	2,	56,	51},
--	{297000,	2,	22,	20},
--	{298000,	2,	21,	19},
--};
--
- static void intel_ddi_mode_set(struct drm_encoder *encoder,
- 			       struct drm_display_mode *mode,
- 			       struct drm_display_mode *adjusted_mode)
-@@ -790,27 +404,224 @@ void intel_ddi_put_crtc_pll(struct drm_crtc *crtc)
- 	intel_crtc->ddi_pll_sel = PORT_CLK_SEL_NONE;
- }
- 
--static void intel_ddi_calculate_wrpll(int clock, int *p, int *n2, int *r2)
-+#define LC_FREQ 2700
-+#define LC_FREQ_2K (LC_FREQ * 2000)
-+
-+#define P_MIN 2
-+#define P_MAX 64
-+#define P_INC 2
-+
-+/* Constraints for PLL good behavior */
-+#define REF_MIN 48
-+#define REF_MAX 400
-+#define VCO_MIN 2400
-+#define VCO_MAX 4800
-+
-+#define ABS_DIFF(a, b) ((a > b) ? (a - b) : (b - a))
-+
-+struct wrpll_rnp {
-+	unsigned p, n2, r2;
-+};
-+
-+static unsigned wrpll_get_budget_for_freq(int clock)
-+{
-+	unsigned budget;
-+
-+	switch (clock) {
-+	case 25175000:
-+	case 25200000:
-+	case 27000000:
-+	case 27027000:
-+	case 37762500:
-+	case 37800000:
-+	case 40500000:
-+	case 40541000:
-+	case 54000000:
-+	case 54054000:
-+	case 59341000:
-+	case 59400000:
-+	case 72000000:
-+	case 74176000:
-+	case 74250000:
-+	case 81000000:
-+	case 81081000:
-+	case 89012000:
-+	case 89100000:
-+	case 108000000:
-+	case 108108000:
-+	case 111264000:
-+	case 111375000:
-+	case 148352000:
-+	case 148500000:
-+	case 162000000:
-+	case 162162000:
-+	case 222525000:
-+	case 222750000:
-+	case 296703000:
-+	case 297000000:
-+		budget = 0;
-+		break;
-+	case 233500000:
-+	case 245250000:
-+	case 247750000:
-+	case 253250000:
-+	case 298000000:
-+		budget = 1500;
-+		break;
-+	case 169128000:
-+	case 169500000:
-+	case 179500000:
-+	case 202000000:
-+		budget = 2000;
-+		break;
-+	case 256250000:
-+	case 262500000:
-+	case 270000000:
-+	case 272500000:
-+	case 273750000:
-+	case 280750000:
-+	case 281250000:
-+	case 286000000:
-+	case 291750000:
-+		budget = 4000;
-+		break;
-+	case 267250000:
-+	case 268500000:
-+		budget = 5000;
-+		break;
-+	default:
-+		budget = 1000;
-+		break;
-+	}
-+
-+	return budget;
-+}
-+
-+static void wrpll_update_rnp(uint64_t freq2k, unsigned budget,
-+			     unsigned r2, unsigned n2, unsigned p,
-+			     struct wrpll_rnp *best)
- {
--	u32 i;
-+	uint64_t a, b, c, d, diff, diff_best;
- 
--	for (i = 0; i < ARRAY_SIZE(wrpll_tmds_clock_table); i++)
--		if (clock <= wrpll_tmds_clock_table[i].clock)
--			break;
-+	/* No best (r,n,p) yet */
-+	if (best->p == 0) {
-+		best->p = p;
-+		best->n2 = n2;
-+		best->r2 = r2;
-+		return;
-+	}
-+
-+	/*
-+	 * Output clock is (LC_FREQ_2K / 2000) * N / (P * R), which compares to
-+	 * freq2k.
-+	 *
-+	 * delta = 1e6 *
-+	 *	   abs(freq2k - (LC_FREQ_2K * n2/(p * r2))) /
-+	 *	   freq2k;
-+	 *
-+	 * and we would like delta <= budget.
-+	 *
-+	 * If the discrepancy is above the PPM-based budget, always prefer to
-+	 * improve upon the previous solution.  However, if you're within the
-+	 * budget, try to maximize Ref * VCO, that is N / (P * R^2).
-+	 */
-+	a = freq2k * budget * p * r2;
-+	b = freq2k * budget * best->p * best->r2;
-+	diff = ABS_DIFF((freq2k * p * r2), (LC_FREQ_2K * n2));
-+	diff_best = ABS_DIFF((freq2k * best->p * best->r2),
-+			     (LC_FREQ_2K * best->n2));
-+	c = 1000000 * diff;
-+	d = 1000000 * diff_best;
-+
-+	if (a < c && b < d) {
-+		/* If both are above the budget, pick the closer */
-+		if (best->p * best->r2 * diff < p * r2 * diff_best) {
-+			best->p = p;
-+			best->n2 = n2;
-+			best->r2 = r2;
-+		}
-+	} else if (a >= c && b < d) {
-+		/* If A is below the threshold but B is above it?  Update. */
-+		best->p = p;
-+		best->n2 = n2;
-+		best->r2 = r2;
-+	} else if (a >= c && b >= d) {
-+		/* Both are below the limit, so pick the higher n2/(r2*r2) */
-+		if (n2 * best->r2 * best->r2 > best->n2 * r2 * r2) {
-+			best->p = p;
-+			best->n2 = n2;
-+			best->r2 = r2;
-+		}
-+	}
-+	/* Otherwise a < c && b >= d, do nothing */
-+}
-+
-+static void
-+intel_ddi_calculate_wrpll(int clock /* in Hz */,
-+			  unsigned *r2_out, unsigned *n2_out, unsigned *p_out)
-+{
-+	uint64_t freq2k;
-+	unsigned p, n2, r2;
-+	struct wrpll_rnp best = { 0, 0, 0 };
-+	unsigned budget;
- 
--	if (i == ARRAY_SIZE(wrpll_tmds_clock_table))
--		i--;
-+	freq2k = clock / 100;
- 
--	*p = wrpll_tmds_clock_table[i].p;
--	*n2 = wrpll_tmds_clock_table[i].n2;
--	*r2 = wrpll_tmds_clock_table[i].r2;
-+	budget = wrpll_get_budget_for_freq(clock);
-+
-+	/* Special case handling for 540 pixel clock: bypass WR PLL entirely
-+	 * and directly pass the LC PLL to it. */
-+	if (freq2k == 5400000) {
-+		*n2_out = 2;
-+		*p_out = 1;
-+		*r2_out = 2;
-+		return;
-+	}
-+
-+	/*
-+	 * Ref = LC_FREQ / R, where Ref is the actual reference input seen by
-+	 * the WR PLL.
-+	 *
-+	 * We want R so that REF_MIN <= Ref <= REF_MAX.
-+	 * Injecting R2 = 2 * R gives:
-+	 *   REF_MAX * r2 > LC_FREQ * 2 and
-+	 *   REF_MIN * r2 < LC_FREQ * 2
-+	 *
-+	 * Which means the desired boundaries for r2 are:
-+	 *  LC_FREQ * 2 / REF_MAX < r2 < LC_FREQ * 2 / REF_MIN
-+	 *
-+	 */
-+	for (r2 = LC_FREQ * 2 / REF_MAX + 1;
-+	     r2 <= LC_FREQ * 2 / REF_MIN;
-+	     r2++) {
-+
-+		/*
-+		 * VCO = N * Ref, that is: VCO = N * LC_FREQ / R
-+		 *
-+		 * Once again we want VCO_MIN <= VCO <= VCO_MAX.
-+		 * Injecting R2 = 2 * R and N2 = 2 * N, we get:
-+		 *   VCO_MAX * r2 > n2 * LC_FREQ and
-+		 *   VCO_MIN * r2 < n2 * LC_FREQ)
-+		 *
-+		 * Which means the desired boundaries for n2 are:
-+		 * VCO_MIN * r2 / LC_FREQ < n2 < VCO_MAX * r2 / LC_FREQ
-+		 */
-+		for (n2 = VCO_MIN * r2 / LC_FREQ + 1;
-+		     n2 <= VCO_MAX * r2 / LC_FREQ;
-+		     n2++) {
-+
-+			for (p = P_MIN; p <= P_MAX; p += P_INC)
-+				wrpll_update_rnp(freq2k, budget,
-+						 r2, n2, p, &best);
-+		}
-+	}
- 
--	if (wrpll_tmds_clock_table[i].clock != clock)
--		DRM_INFO("WRPLL: using settings for %dKHz on %dKHz mode\n",
--			 wrpll_tmds_clock_table[i].clock, clock);
-+	*n2_out = best.n2;
-+	*p_out = best.p;
-+	*r2_out = best.r2;
- 
--	DRM_DEBUG_KMS("WRPLL: %dKHz refresh rate with p=%d, n2=%d r2=%d\n",
--		      clock, *p, *n2, *r2);
-+	DRM_DEBUG_KMS("WRPLL: %dHz refresh rate with p=%d, n2=%d r2=%d\n",
-+		      clock, *p_out, *n2_out, *r2_out);
- }
- 
- bool intel_ddi_pll_mode_set(struct drm_crtc *crtc, int clock)
-@@ -851,7 +662,7 @@ bool intel_ddi_pll_mode_set(struct drm_crtc *crtc, int clock)
- 		return true;
- 
- 	} else if (type == INTEL_OUTPUT_HDMI) {
--		int p, n2, r2;
-+		unsigned p, n2, r2;
- 
- 		if (plls->wrpll1_refcount == 0) {
- 			DRM_DEBUG_KMS("Using WRPLL 1 on pipe %c\n",
-@@ -873,7 +684,7 @@ bool intel_ddi_pll_mode_set(struct drm_crtc *crtc, int clock)
- 		WARN(I915_READ(reg) & WRPLL_PLL_ENABLE,
- 		     "WRPLL already enabled\n");
- 
--		intel_ddi_calculate_wrpll(clock, &p, &n2, &r2);
-+		intel_ddi_calculate_wrpll(clock * 1000, &r2, &n2, &p);
- 
- 		val = WRPLL_PLL_ENABLE | WRPLL_PLL_SELECT_LCPLL_2700 |
- 		      WRPLL_DIVIDER_REFERENCE(r2) | WRPLL_DIVIDER_FEEDBACK(n2) |
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0158-drm-i915-rip-out-an-unused-lvds_reg-variable.patch b/patches.baytrail/0158-drm-i915-rip-out-an-unused-lvds_reg-variable.patch
deleted file mode 100644
index c27bfcd7b5418..0000000000000
--- a/patches.baytrail/0158-drm-i915-rip-out-an-unused-lvds_reg-variable.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From 760627400cb04570026084d661434bd447b01d11 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Tue, 30 Apr 2013 14:01:46 +0200
-Subject: drm/i915: rip out an unused lvds_reg variable
-
-Somehow this has been forgotten in
-
-commit 1974cad0ee4ce84e5cb792e49c4f0d9421e0312c
-Author: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date:   Mon Nov 26 17:22:09 2012 +0100
-
-    drm/i915: move is_dual_link_lvds to intel_lvds.c
-
-Reviewed-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 7881d4f11c00f506907b1bccb73df81509dc9c15)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 6 ------
- 1 file changed, 6 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index ef6aa3496cbf..b5462d028883 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -651,12 +651,6 @@ intel_g4x_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
- 	found = false;
- 
- 	if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) {
--		int lvds_reg;
--
--		if (HAS_PCH_SPLIT(dev))
--			lvds_reg = PCH_LVDS;
--		else
--			lvds_reg = LVDS;
- 		if (intel_is_dual_link_lvds(dev))
- 			clock.p2 = limit->p2.p2_fast;
- 		else
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0159-drm-i915-Add-missing-platform-tags-to-FBC-workaround.patch b/patches.baytrail/0159-drm-i915-Add-missing-platform-tags-to-FBC-workaround.patch
deleted file mode 100644
index 33a9d7d10e97b..0000000000000
--- a/patches.baytrail/0159-drm-i915-Add-missing-platform-tags-to-FBC-workaround.patch
+++ /dev/null
@@ -1,61 +0,0 @@
-From 6d96af3ccda7a6e5361c5fc53abb5ca3dd4ac573 Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Fri, 10 May 2013 14:33:17 +0100
-Subject: drm/i915: Add missing platform tags to FBC workaround comments
-
-There was a race between Rodrigo writing those patches and me
-formalizing the addition of platform tags. This patches fixes it.
-
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 7dd23ba0899bd1a203cc1d6e7878d7dfc910a511)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 12 ++++++------
- 1 file changed, 6 insertions(+), 6 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 656ee57d1e05..5736098f9b0f 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -243,13 +243,13 @@ static void ironlake_disable_fbc(struct drm_device *dev)
- 		I915_WRITE(ILK_DPFC_CONTROL, dpfc_ctl);
- 
- 		if (IS_IVYBRIDGE(dev))
--			/* WaFbcDisableDpfcClockGating */
-+			/* WaFbcDisableDpfcClockGating:ivb */
- 			I915_WRITE(ILK_DSPCLK_GATE_D,
- 				   I915_READ(ILK_DSPCLK_GATE_D) &
- 				   ~ILK_DPFCUNIT_CLOCK_GATE_DISABLE);
- 
- 		if (IS_HASWELL(dev))
--			/* WaFbcDisableDpfcClockGating */
-+			/* WaFbcDisableDpfcClockGating:hsw */
- 			I915_WRITE(HSW_CLKGATE_DISABLE_PART_1,
- 				   I915_READ(HSW_CLKGATE_DISABLE_PART_1) &
- 				   ~HSW_DPFC_GATING_DISABLE);
-@@ -281,17 +281,17 @@ static void gen7_enable_fbc(struct drm_crtc *crtc, unsigned long interval)
- 		   intel_crtc->plane << IVB_DPFC_CTL_PLANE_SHIFT);
- 
- 	if (IS_IVYBRIDGE(dev)) {
--		/* WaFbcAsynchFlipDisableFbcQueue */
-+		/* WaFbcAsynchFlipDisableFbcQueue:ivb */
- 		I915_WRITE(ILK_DISPLAY_CHICKEN1, ILK_FBCQ_DIS);
--		/* WaFbcDisableDpfcClockGating */
-+		/* WaFbcDisableDpfcClockGating:ivb */
- 		I915_WRITE(ILK_DSPCLK_GATE_D,
- 			   I915_READ(ILK_DSPCLK_GATE_D) |
- 			   ILK_DPFCUNIT_CLOCK_GATE_DISABLE);
- 	} else {
--		/* WaFbcAsynchFlipDisableFbcQueue */
-+		/* WaFbcAsynchFlipDisableFbcQueue:hsw */
- 		I915_WRITE(HSW_PIPE_SLICE_CHICKEN_1(intel_crtc->pipe),
- 			   HSW_BYPASS_FBC_QUEUE);
--		/* WaFbcDisableDpfcClockGating */
-+		/* WaFbcDisableDpfcClockGating:hsw */
- 		I915_WRITE(HSW_CLKGATE_DISABLE_PART_1,
- 			   I915_READ(HSW_CLKGATE_DISABLE_PART_1) |
- 			   HSW_DPFC_GATING_DISABLE);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0160-drm-i915-implement-WADPOClockGatingDisable-for-LPT.patch b/patches.baytrail/0160-drm-i915-implement-WADPOClockGatingDisable-for-LPT.patch
deleted file mode 100644
index b655c84757116..0000000000000
--- a/patches.baytrail/0160-drm-i915-implement-WADPOClockGatingDisable-for-LPT.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 0a19680e6aa233046a19de41914db5d0315fd118 Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Wed, 17 Apr 2013 18:15:49 -0300
-Subject: drm/i915: implement WADPOClockGatingDisable for LPT
-
-This should prevent mode set failures on LPT.
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-[danvet: Pimp the w/a tag to fit into Damien's new scheme.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 0a790cdbfc526890af7dc41515a563f09e427129)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 5 +++++
- 1 file changed, 5 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 5736098f9b0f..71752d5cdaf4 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -4093,6 +4093,11 @@ static void lpt_init_clock_gating(struct drm_device *dev)
- 		I915_WRITE(SOUTH_DSPCLK_GATE_D,
- 			   I915_READ(SOUTH_DSPCLK_GATE_D) |
- 			   PCH_LP_PARTITION_LEVEL_DISABLE);
-+
-+	/* WADPOClockGatingDisable:hsw */
-+	I915_WRITE(_TRANSA_CHICKEN1,
-+		   I915_READ(_TRANSA_CHICKEN1) |
-+		   TRANS_CHICKEN1_DP0UNIT_GC_DISABLE);
- }
- 
- static void lpt_suspend_hw(struct drm_device *dev)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0161-drm-i915-panel-fitter-hw-state-readout-check-support.patch b/patches.baytrail/0161-drm-i915-panel-fitter-hw-state-readout-check-support.patch
deleted file mode 100644
index 86eb76894da7b..0000000000000
--- a/patches.baytrail/0161-drm-i915-panel-fitter-hw-state-readout-check-support.patch
+++ /dev/null
@@ -1,179 +0,0 @@
-From e6f30762d39e439dc8426f7487214e4541d45f63 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Tue, 7 May 2013 23:34:16 +0200
-Subject: drm/i915: panel fitter hw state readout&check support
-
-Pfit state readout is a bit ugly on gen2/3 due to the intermingling
-with the lvds state, but alas.
-
-Also note that since state is always cleared to zero we can
-unconditonally compare all the state and completely neglect the actual
-platform we're running on.
-
-v2: Properly check for the pfit power domain on haswell.
-
-v3: Don't check pgm_ratios on gen4+, they're auto-computed by the hw.
-
-v4: Properly clear the lvds border bits, upset the state checker a
-bit.
-
-v5: Unconditionally read out panel dither settings on gen2/3.
-
-Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 2fa2fe9a142cf8c8a30916ccf7ca6a27019fd6d2)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 67 ++++++++++++++++++++++++++++++++++--
- drivers/gpu/drm/i915/intel_lvds.c    |  1 +
- 2 files changed, 66 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index b5462d028883..e6939d5b6a18 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -4986,6 +4986,36 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
- 	return ret;
- }
- 
-+static void i9xx_get_pfit_config(struct intel_crtc *crtc,
-+				 struct intel_crtc_config *pipe_config)
-+{
-+	struct drm_device *dev = crtc->base.dev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	uint32_t tmp;
-+
-+	tmp = I915_READ(PFIT_CONTROL);
-+
-+	if (INTEL_INFO(dev)->gen < 4) {
-+		if (crtc->pipe != PIPE_B)
-+			return;
-+
-+		/* gen2/3 store dither state in pfit control, needs to match */
-+		pipe_config->gmch_pfit.control = tmp & PANEL_8TO6_DITHER_ENABLE;
-+	} else {
-+		if ((tmp & PFIT_PIPE_MASK) != (crtc->pipe << PFIT_PIPE_SHIFT))
-+			return;
-+	}
-+
-+	if (!(tmp & PFIT_ENABLE))
-+		return;
-+
-+	pipe_config->gmch_pfit.control = I915_READ(PFIT_CONTROL);
-+	pipe_config->gmch_pfit.pgm_ratios = I915_READ(PFIT_PGM_RATIOS);
-+	if (INTEL_INFO(dev)->gen < 5)
-+		pipe_config->gmch_pfit.lvds_border_bits =
-+			I915_READ(LVDS) & LVDS_BORDER_ENABLE;
-+}
-+
- static bool i9xx_get_pipe_config(struct intel_crtc *crtc,
- 				 struct intel_crtc_config *pipe_config)
- {
-@@ -4999,6 +5029,8 @@ static bool i9xx_get_pipe_config(struct intel_crtc *crtc,
- 
- 	intel_get_pipe_timings(crtc, pipe_config);
- 
-+	i9xx_get_pfit_config(crtc, pipe_config);
-+
- 	return true;
- }
- 
-@@ -5830,6 +5862,21 @@ static void ironlake_get_fdi_m_n_config(struct intel_crtc *crtc,
- 				   & TU_SIZE_MASK) >> TU_SIZE_SHIFT) + 1;
- }
- 
-+static void ironlake_get_pfit_config(struct intel_crtc *crtc,
-+				     struct intel_crtc_config *pipe_config)
-+{
-+	struct drm_device *dev = crtc->base.dev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	uint32_t tmp;
-+
-+	tmp = I915_READ(PF_CTL(crtc->pipe));
-+
-+	if (tmp & PF_ENABLE) {
-+		pipe_config->pch_pfit.pos = I915_READ(PF_WIN_POS(crtc->pipe));
-+		pipe_config->pch_pfit.size = I915_READ(PF_WIN_SZ(crtc->pipe));
-+	}
-+}
-+
- static bool ironlake_get_pipe_config(struct intel_crtc *crtc,
- 				     struct intel_crtc_config *pipe_config)
- {
-@@ -5853,6 +5900,8 @@ static bool ironlake_get_pipe_config(struct intel_crtc *crtc,
- 
- 	intel_get_pipe_timings(crtc, pipe_config);
- 
-+	ironlake_get_pfit_config(crtc, pipe_config);
-+
- 	return true;
- }
- 
-@@ -5972,6 +6021,7 @@ static bool haswell_get_pipe_config(struct intel_crtc *crtc,
- 	struct drm_device *dev = crtc->base.dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	enum transcoder cpu_transcoder = crtc->config.cpu_transcoder;
-+	enum intel_display_power_domain pfit_domain;
- 	uint32_t tmp;
- 
- 	if (!intel_display_power_enabled(dev,
-@@ -6001,6 +6051,10 @@ static bool haswell_get_pipe_config(struct intel_crtc *crtc,
- 
- 	intel_get_pipe_timings(crtc, pipe_config);
- 
-+	pfit_domain = POWER_DOMAIN_PIPE_PANEL_FITTER(crtc->pipe);
-+	if (intel_display_power_enabled(dev, pfit_domain))
-+		ironlake_get_pfit_config(crtc, pipe_config);
-+
- 	return true;
- }
- 
-@@ -7970,7 +8024,8 @@ intel_modeset_update_state(struct drm_device *dev, unsigned prepare_pipes)
- 		if (mask & (1 <<(intel_crtc)->pipe))
- 
- static bool
--intel_pipe_config_compare(struct intel_crtc_config *current_config,
-+intel_pipe_config_compare(struct drm_device *dev,
-+			  struct intel_crtc_config *current_config,
- 			  struct intel_crtc_config *pipe_config)
- {
- #define PIPE_CONF_CHECK_I(name)	\
-@@ -8019,6 +8074,14 @@ intel_pipe_config_compare(struct intel_crtc_config *current_config,
- 	PIPE_CONF_CHECK_I(requested_mode.hdisplay);
- 	PIPE_CONF_CHECK_I(requested_mode.vdisplay);
- 
-+	PIPE_CONF_CHECK_I(gmch_pfit.control);
-+	/* pfit ratios are autocomputed by the hw on gen4+ */
-+	if (INTEL_INFO(dev)->gen < 4)
-+		PIPE_CONF_CHECK_I(gmch_pfit.pgm_ratios);
-+	PIPE_CONF_CHECK_I(gmch_pfit.lvds_border_bits);
-+	PIPE_CONF_CHECK_I(pch_pfit.pos);
-+	PIPE_CONF_CHECK_I(pch_pfit.size);
-+
- #undef PIPE_CONF_CHECK_I
- #undef PIPE_CONF_CHECK_FLAGS
- 
-@@ -8135,7 +8198,7 @@ intel_modeset_check_state(struct drm_device *dev)
- 		     "(expected %i, found %i)\n", crtc->active, active);
- 
- 		WARN(active &&
--		     !intel_pipe_config_compare(&crtc->config, &pipe_config),
-+		     !intel_pipe_config_compare(dev, &crtc->config, &pipe_config),
- 		     "pipe state doesn't match!\n");
- 	}
- }
-diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
-index 04da66914757..fa7511143974 100644
---- a/drivers/gpu/drm/i915/intel_lvds.c
-+++ b/drivers/gpu/drm/i915/intel_lvds.c
-@@ -116,6 +116,7 @@ static void intel_pre_pll_enable_lvds(struct intel_encoder *encoder)
- 	}
- 
- 	/* set the corresponsding LVDS_BORDER bit */
-+	temp &= ~LVDS_BORDER_ENABLE;
- 	temp |= intel_crtc->config.gmch_pfit.lvds_border_bits;
- 	/* Set the B0-B3 data pairs corresponding to whether we're going to
- 	 * set the DPLLs for dual-channel mode or not.
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0162-drm-i915-Use-pipe_config-state-to-disable-ilk-pfit.patch b/patches.baytrail/0162-drm-i915-Use-pipe_config-state-to-disable-ilk-pfit.patch
deleted file mode 100644
index a6491f0493481..0000000000000
--- a/patches.baytrail/0162-drm-i915-Use-pipe_config-state-to-disable-ilk-pfit.patch
+++ /dev/null
@@ -1,78 +0,0 @@
-From 007c257f6a644dc90a20ca232f183bb304c82341 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Wed, 8 May 2013 10:36:30 +0200
-Subject: drm/i915: Use pipe_config state to disable ilk+ pfit
-
-No more need to guard the write with a power well check on Haswell now
-that we have proper pfit state readout: We can simply only clear the
-pfit if it's actually on.
-
-This removes some duplication of knowledge between the haswell pfit
-disable and pfit state readout code about.
-
-While at it extract a little helper for this.
-
-Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 3f8dce3ade6ae025a8a77e7b74ec58a5c26b17e2)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 28 +++++++++++++++++-----------
- 1 file changed, 17 insertions(+), 11 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index e6939d5b6a18..bb4c50f9243e 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -3410,6 +3410,21 @@ static void haswell_crtc_enable(struct drm_crtc *crtc)
- 	intel_wait_for_vblank(dev, intel_crtc->pipe);
- }
- 
-+static void ironlake_pfit_disable(struct intel_crtc *crtc)
-+{
-+	struct drm_device *dev = crtc->base.dev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	int pipe = crtc->pipe;
-+
-+	/* To avoid upsetting the power well on haswell only disable the pfit if
-+	 * it's in use. The hw state code will make sure we get this right. */
-+	if (crtc->config.pch_pfit.size) {
-+		I915_WRITE(PF_CTL(pipe), 0);
-+		I915_WRITE(PF_WIN_POS(pipe), 0);
-+		I915_WRITE(PF_WIN_SZ(pipe), 0);
-+	}
-+}
-+
- static void ironlake_crtc_disable(struct drm_crtc *crtc)
- {
- 	struct drm_device *dev = crtc->dev;
-@@ -3439,9 +3454,7 @@ static void ironlake_crtc_disable(struct drm_crtc *crtc)
- 	intel_set_pch_fifo_underrun_reporting(dev, pipe, false);
- 	intel_disable_pipe(dev_priv, pipe);
- 
--	/* Disable PF */
--	I915_WRITE(PF_CTL(pipe), 0);
--	I915_WRITE(PF_WIN_SZ(pipe), 0);
-+	ironlake_pfit_disable(intel_crtc);
- 
- 	for_each_encoder_on_crtc(dev, crtc, encoder)
- 		if (encoder->post_disable)
-@@ -3524,14 +3537,7 @@ static void haswell_crtc_disable(struct drm_crtc *crtc)
- 
- 	intel_ddi_disable_transcoder_func(dev_priv, cpu_transcoder);
- 
--	/* XXX: Once we have proper panel fitter state tracking implemented with
--	 * hardware state read/check support we should switch to only disable
--	 * the panel fitter when we know it's used. */
--	if (intel_display_power_enabled(dev,
--					POWER_DOMAIN_PIPE_PANEL_FITTER(pipe))) {
--		I915_WRITE(PF_CTL(pipe), 0);
--		I915_WRITE(PF_WIN_SZ(pipe), 0);
--	}
-+	ironlake_pfit_disable(intel_crtc);
- 
- 	intel_ddi_disable_pipe_clock(intel_crtc);
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0163-drm-i915-Use-pipe-config-state-to-control-gmch-pfit-.patch b/patches.baytrail/0163-drm-i915-Use-pipe-config-state-to-control-gmch-pfit-.patch
deleted file mode 100644
index 76b529fd3c244..0000000000000
--- a/patches.baytrail/0163-drm-i915-Use-pipe-config-state-to-control-gmch-pfit-.patch
+++ /dev/null
@@ -1,61 +0,0 @@
-From 10675524e7a7ae39415ff4574b80a61a38327c2f Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Wed, 8 May 2013 10:36:31 +0200
-Subject: drm/i915: Use pipe config state to control gmch pfit enable/disable
-
-Allows us to rip out a few fragile checks (which are duplicated in the
-hw state readout now, too). Also prepares us a bit for more than one
-panel/pfit.
-
-Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 328d8e829b9a05814af4722c1091d62c5533c4f8)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 20 +++++++-------------
- 1 file changed, 7 insertions(+), 13 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index bb4c50f9243e..957dd91803fa 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -3624,8 +3624,7 @@ static void i9xx_pfit_enable(struct intel_crtc *crtc)
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct intel_crtc_config *pipe_config = &crtc->config;
- 
--	if (!(intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_EDP) ||
--	      intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_LVDS)))
-+	if (!crtc->config.gmch_pfit.control)
- 		return;
- 
- 	WARN_ON(I915_READ(PFIT_CONTROL) & PFIT_ENABLE);
-@@ -3744,20 +3743,15 @@ static void i9xx_pfit_disable(struct intel_crtc *crtc)
- {
- 	struct drm_device *dev = crtc->base.dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
--	enum pipe pipe;
--	uint32_t pctl = I915_READ(PFIT_CONTROL);
- 
--	assert_pipe_disabled(dev_priv, crtc->pipe);
-+	if (!crtc->config.gmch_pfit.control)
-+		return;
- 
--	if (INTEL_INFO(dev)->gen >= 4)
--		pipe = (pctl & PFIT_PIPE_MASK) >> PFIT_PIPE_SHIFT;
--	else
--		pipe = PIPE_B;
-+	assert_pipe_disabled(dev_priv, crtc->pipe);
- 
--	if (pipe == crtc->pipe) {
--		DRM_DEBUG_DRIVER("disabling pfit, current: 0x%08x\n", pctl);
--		I915_WRITE(PFIT_CONTROL, 0);
--	}
-+	DRM_DEBUG_DRIVER("disabling pfit, current: 0x%08x\n",
-+			 I915_READ(PFIT_CONTROL));
-+	I915_WRITE(PFIT_CONTROL, 0);
- }
- 
- static void i9xx_crtc_disable(struct drm_crtc *crtc)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0164-drm-i915-add-support-for-dvo-Chrontel-7010B.patch b/patches.baytrail/0164-drm-i915-add-support-for-dvo-Chrontel-7010B.patch
deleted file mode 100644
index ad52c928e0f2d..0000000000000
--- a/patches.baytrail/0164-drm-i915-add-support-for-dvo-Chrontel-7010B.patch
+++ /dev/null
@@ -1,118 +0,0 @@
-From 6b5742b2072ef2441c813ac70828f8cc123eea61 Mon Sep 17 00:00:00 2001
-From: "braggle@free.fr" <braggle@free.fr>
-Date: Thu, 16 May 2013 12:57:38 +0200
-Subject: drm/i915: add support for dvo Chrontel 7010B
-
-This patch add dvo detection for the Chrontel 7010B on some old hardware.
-
-References: https://bugzilla.kernel.org/show_bug.cgi?id=55101
-Signed-off-by: Braggle <braggle at free.fr>
-[danvet: Fix up whitespace mangling.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 98304ad186296dc1e655399e28d5973c21db6a73)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/dvo_ch7xxx.c | 28 ++++++++++++++++++++++++++--
- drivers/gpu/drm/i915/intel_dvo.c  |  7 +++++++
- 2 files changed, 33 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/dvo_ch7xxx.c b/drivers/gpu/drm/i915/dvo_ch7xxx.c
-index 3edd981e0770..757e0fa11043 100644
---- a/drivers/gpu/drm/i915/dvo_ch7xxx.c
-+++ b/drivers/gpu/drm/i915/dvo_ch7xxx.c
-@@ -32,12 +32,14 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- #define CH7xxx_REG_DID		0x4b
- 
- #define CH7011_VID		0x83 /* 7010 as well */
-+#define CH7010B_VID		0x05
- #define CH7009A_VID		0x84
- #define CH7009B_VID		0x85
- #define CH7301_VID		0x95
- 
- #define CH7xxx_VID		0x84
- #define CH7xxx_DID		0x17
-+#define CH7010_DID		0x16
- 
- #define CH7xxx_NUM_REGS		0x4c
- 
-@@ -87,11 +89,20 @@ static struct ch7xxx_id_struct {
- 	char *name;
- } ch7xxx_ids[] = {
- 	{ CH7011_VID, "CH7011" },
-+	{ CH7010B_VID, "CH7010B" },
- 	{ CH7009A_VID, "CH7009A" },
- 	{ CH7009B_VID, "CH7009B" },
- 	{ CH7301_VID, "CH7301" },
- };
- 
-+static struct ch7xxx_did_struct {
-+	uint8_t did;
-+	char *name;
-+} ch7xxx_dids[] = {
-+	{ CH7xxx_DID, "CH7XXX" },
-+	{ CH7010_DID, "CH7010B" },
-+};
-+
- struct ch7xxx_priv {
- 	bool quiet;
- };
-@@ -108,6 +119,18 @@ static char *ch7xxx_get_id(uint8_t vid)
- 	return NULL;
- }
- 
-+static char *ch7xxx_get_did(uint8_t did)
-+{
-+	int i;
-+
-+	for (i = 0; i < ARRAY_SIZE(ch7xxx_dids); i++) {
-+		if (ch7xxx_dids[i].did == did)
-+			return ch7xxx_dids[i].name;
-+	}
-+
-+	return NULL;
-+}
-+
- /** Reads an 8 bit register */
- static bool ch7xxx_readb(struct intel_dvo_device *dvo, int addr, uint8_t *ch)
- {
-@@ -179,7 +202,7 @@ static bool ch7xxx_init(struct intel_dvo_device *dvo,
- 	/* this will detect the CH7xxx chip on the specified i2c bus */
- 	struct ch7xxx_priv *ch7xxx;
- 	uint8_t vendor, device;
--	char *name;
-+	char *name, *devid;
- 
- 	ch7xxx = kzalloc(sizeof(struct ch7xxx_priv), GFP_KERNEL);
- 	if (ch7xxx == NULL)
-@@ -204,7 +227,8 @@ static bool ch7xxx_init(struct intel_dvo_device *dvo,
- 	if (!ch7xxx_readb(dvo, CH7xxx_REG_DID, &device))
- 		goto out;
- 
--	if (device != CH7xxx_DID) {
-+	devid = ch7xxx_get_did(device);
-+	if (!devid) {
- 		DRM_DEBUG_KMS("ch7xxx not detected; got 0x%02x from %s "
- 				"slave %d.\n",
- 			  vendor, adapter->name, dvo->slave_addr);
-diff --git a/drivers/gpu/drm/i915/intel_dvo.c b/drivers/gpu/drm/i915/intel_dvo.c
-index cc70b16d5d42..2c0be924e9a9 100644
---- a/drivers/gpu/drm/i915/intel_dvo.c
-+++ b/drivers/gpu/drm/i915/intel_dvo.c
-@@ -54,6 +54,13 @@ static const struct intel_dvo_device intel_dvo_devices[] = {
- 		.dev_ops = &ch7xxx_ops,
- 	},
- 	{
-+		.type = INTEL_DVO_CHIP_TMDS,
-+		.name = "ch7xxx",
-+		.dvo_reg = DVOC,
-+		.slave_addr = 0x75, /* For some ch7010 */
-+		.dev_ops = &ch7xxx_ops,
-+	},
-+	{
- 		.type = INTEL_DVO_CHIP_LVDS,
- 		.name = "ivch",
- 		.dvo_reg = DVOA,
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0165-Add-arch_phys_wc_-add-del-to-manipulate-WC-MTRRs-if-.patch b/patches.baytrail/0165-Add-arch_phys_wc_-add-del-to-manipulate-WC-MTRRs-if-.patch
deleted file mode 100644
index c7aa2906e3e2f..0000000000000
--- a/patches.baytrail/0165-Add-arch_phys_wc_-add-del-to-manipulate-WC-MTRRs-if-.patch
+++ /dev/null
@@ -1,211 +0,0 @@
-From 6327ea0a9ef45cb41e24adc59acbf8fcc2cd443b Mon Sep 17 00:00:00 2001
-From: Andy Lutomirski <luto@amacapital.net>
-Date: Mon, 13 May 2013 23:58:40 +0000
-Subject: Add arch_phys_wc_{add, del} to manipulate WC MTRRs if needed
-
-Several drivers currently use mtrr_add through various #ifdef guards
-and/or drm wrappers.  The vast majority of them want to add WC MTRRs
-on x86 systems and don't actually need the MTRR if PAT (i.e.
-ioremap_wc, etc) are working.
-
-arch_phys_wc_add and arch_phys_wc_del are new functions, available
-on all architectures and configurations, that add WC MTRRs on x86 if
-needed (and handle errors) and do nothing at all otherwise.  They're
-also easier to use than mtrr_add and mtrr_del, so the call sites can
-be simplified.
-
-As an added benefit, this will avoid wasting MTRRs and possibly
-warning pointlessly on PAT-supporting systems.
-
-Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Signed-off-by: Andy Lutomirski <luto@amacapital.net>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit d0d98eedee2178c803dd824bb09f52b0e2ac1811)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- arch/x86/include/asm/io.h       |  7 ++++
- arch/x86/include/asm/mtrr.h     | 10 +++++-
- arch/x86/kernel/cpu/mtrr/main.c | 71 +++++++++++++++++++++++++++++++++++++++++
- include/linux/io.h              | 25 +++++++++++++++
- 4 files changed, 112 insertions(+), 1 deletion(-)
-
-diff --git a/arch/x86/include/asm/io.h b/arch/x86/include/asm/io.h
-index d8e8eefbe24c..34f69cb9350a 100644
---- a/arch/x86/include/asm/io.h
-+++ b/arch/x86/include/asm/io.h
-@@ -345,4 +345,11 @@ extern bool xen_biovec_phys_mergeable(const struct bio_vec *vec1,
- 
- #define IO_SPACE_LIMIT 0xffff
- 
-+#ifdef CONFIG_MTRR
-+extern int __must_check arch_phys_wc_add(unsigned long base,
-+					 unsigned long size);
-+extern void arch_phys_wc_del(int handle);
-+#define arch_phys_wc_add arch_phys_wc_add
-+#endif
-+
- #endif /* _ASM_X86_IO_H */
-diff --git a/arch/x86/include/asm/mtrr.h b/arch/x86/include/asm/mtrr.h
-index e235582f9930..f768f6298419 100644
---- a/arch/x86/include/asm/mtrr.h
-+++ b/arch/x86/include/asm/mtrr.h
-@@ -26,7 +26,10 @@
- #include <uapi/asm/mtrr.h>
- 
- 
--/*  The following functions are for use by other drivers  */
-+/*
-+ * The following functions are for use by other drivers that cannot use
-+ * arch_phys_wc_add and arch_phys_wc_del.
-+ */
- # ifdef CONFIG_MTRR
- extern u8 mtrr_type_lookup(u64 addr, u64 end);
- extern void mtrr_save_fixed_ranges(void *);
-@@ -45,6 +48,7 @@ extern void mtrr_aps_init(void);
- extern void mtrr_bp_restore(void);
- extern int mtrr_trim_uncached_memory(unsigned long end_pfn);
- extern int amd_special_default_mtrr(void);
-+extern int phys_wc_to_mtrr_index(int handle);
- #  else
- static inline u8 mtrr_type_lookup(u64 addr, u64 end)
- {
-@@ -80,6 +84,10 @@ static inline int mtrr_trim_uncached_memory(unsigned long end_pfn)
- static inline void mtrr_centaur_report_mcr(int mcr, u32 lo, u32 hi)
- {
- }
-+static inline int phys_wc_to_mtrr_index(int handle)
-+{
-+	return -1;
-+}
- 
- #define mtrr_ap_init() do {} while (0)
- #define mtrr_bp_init() do {} while (0)
-diff --git a/arch/x86/kernel/cpu/mtrr/main.c b/arch/x86/kernel/cpu/mtrr/main.c
-index ca22b73aaa25..f961de9964c7 100644
---- a/arch/x86/kernel/cpu/mtrr/main.c
-+++ b/arch/x86/kernel/cpu/mtrr/main.c
-@@ -51,9 +51,13 @@
- #include <asm/e820.h>
- #include <asm/mtrr.h>
- #include <asm/msr.h>
-+#include <asm/pat.h>
- 
- #include "mtrr.h"
- 
-+/* arch_phys_wc_add returns an MTRR register index plus this offset. */
-+#define MTRR_TO_PHYS_WC_OFFSET 1000
-+
- u32 num_var_ranges;
- 
- unsigned int mtrr_usage_table[MTRR_MAX_VAR_RANGES];
-@@ -525,6 +529,73 @@ int mtrr_del(int reg, unsigned long base, unsigned long size)
- }
- EXPORT_SYMBOL(mtrr_del);
- 
-+/**
-+ * arch_phys_wc_add - add a WC MTRR and handle errors if PAT is unavailable
-+ * @base: Physical base address
-+ * @size: Size of region
-+ *
-+ * If PAT is available, this does nothing.  If PAT is unavailable, it
-+ * attempts to add a WC MTRR covering size bytes starting at base and
-+ * logs an error if this fails.
-+ *
-+ * Drivers must store the return value to pass to mtrr_del_wc_if_needed,
-+ * but drivers should not try to interpret that return value.
-+ */
-+int arch_phys_wc_add(unsigned long base, unsigned long size)
-+{
-+	int ret;
-+
-+	if (pat_enabled)
-+		return 0;  /* Success!  (We don't need to do anything.) */
-+
-+	ret = mtrr_add(base, size, MTRR_TYPE_WRCOMB, true);
-+	if (ret < 0) {
-+		pr_warn("Failed to add WC MTRR for [%p-%p]; performance may suffer.",
-+			(void *)base, (void *)(base + size - 1));
-+		return ret;
-+	}
-+	return ret + MTRR_TO_PHYS_WC_OFFSET;
-+}
-+EXPORT_SYMBOL(arch_phys_wc_add);
-+
-+/*
-+ * arch_phys_wc_del - undoes arch_phys_wc_add
-+ * @handle: Return value from arch_phys_wc_add
-+ *
-+ * This cleans up after mtrr_add_wc_if_needed.
-+ *
-+ * The API guarantees that mtrr_del_wc_if_needed(error code) and
-+ * mtrr_del_wc_if_needed(0) do nothing.
-+ */
-+void arch_phys_wc_del(int handle)
-+{
-+	if (handle >= 1) {
-+		WARN_ON(handle < MTRR_TO_PHYS_WC_OFFSET);
-+		mtrr_del(handle - MTRR_TO_PHYS_WC_OFFSET, 0, 0);
-+	}
-+}
-+EXPORT_SYMBOL(arch_phys_wc_del);
-+
-+/*
-+ * phys_wc_to_mtrr_index - translates arch_phys_wc_add's return value
-+ * @handle: Return value from arch_phys_wc_add
-+ *
-+ * This will turn the return value from arch_phys_wc_add into an mtrr
-+ * index suitable for debugging.
-+ *
-+ * Note: There is no legitimate use for this function, except possibly
-+ * in printk line.  Alas there is an illegitimate use in some ancient
-+ * drm ioctls.
-+ */
-+int phys_wc_to_mtrr_index(int handle)
-+{
-+	if (handle < MTRR_TO_PHYS_WC_OFFSET)
-+		return -1;
-+	else
-+		return handle - MTRR_TO_PHYS_WC_OFFSET;
-+}
-+EXPORT_SYMBOL_GPL(phys_wc_to_mtrr_index);
-+
- /*
-  * HACK ALERT!
-  * These should be called implicitly, but we can't yet until all the initcall
-diff --git a/include/linux/io.h b/include/linux/io.h
-index 069e4075f872..f4f42faec686 100644
---- a/include/linux/io.h
-+++ b/include/linux/io.h
-@@ -76,4 +76,29 @@ void devm_ioremap_release(struct device *dev, void *res);
- #define arch_has_dev_port()     (1)
- #endif
- 
-+/*
-+ * Some systems (x86 without PAT) have a somewhat reliable way to mark a
-+ * physical address range such that uncached mappings will actually
-+ * end up write-combining.  This facility should be used in conjunction
-+ * with pgprot_writecombine, ioremap-wc, or set_memory_wc, since it has
-+ * no effect if the per-page mechanisms are functional.
-+ * (On x86 without PAT, these functions manipulate MTRRs.)
-+ *
-+ * arch_phys_del_wc(0) or arch_phys_del_wc(any error code) is guaranteed
-+ * to have no effect.
-+ */
-+#ifndef arch_phys_wc_add
-+static inline int __must_check arch_phys_wc_add(unsigned long base,
-+						unsigned long size)
-+{
-+	return 0;  /* It worked (i.e. did nothing). */
-+}
-+
-+static inline void arch_phys_wc_del(int handle)
-+{
-+}
-+
-+#define arch_phys_wc_add arch_phys_wc_add
-+#endif
-+
- #endif /* _LINUX_IO_H */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0166-i915-Use-arch_phys_wc_-add-del.patch b/patches.baytrail/0166-i915-Use-arch_phys_wc_-add-del.patch
deleted file mode 100644
index 41659dc458d5b..0000000000000
--- a/patches.baytrail/0166-i915-Use-arch_phys_wc_-add-del.patch
+++ /dev/null
@@ -1,95 +0,0 @@
-From c3448c1871794fd45a2162ec3c2b6bbaa1d0d0e0 Mon Sep 17 00:00:00 2001
-From: Andy Lutomirski <luto@amacapital.net>
-Date: Mon, 13 May 2013 23:58:44 +0000
-Subject: i915: Use arch_phys_wc_{add,del}
-
-i915 open-coded logic that was essentially equivalent to the new API.
-
-Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Signed-off-by: Andy Lutomirski <luto@amacapital.net>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit 1c0f6749e86a990eca10499c8da2b04888ce4560)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_dma.c |   42 +++-------------------------------------
- 1 file changed, 4 insertions(+), 38 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_dma.c
-+++ b/drivers/gpu/drm/i915/i915_dma.c
-@@ -42,7 +42,6 @@
- #include <linux/vga_switcheroo.h>
- #include <linux/slab.h>
- #include <acpi/video.h>
--#include <asm/pat.h>
- 
- #define LP_RING(d) (&((struct drm_i915_private *)(d))->ring[RCS])
- 
-@@ -1405,29 +1404,6 @@ void i915_master_destroy(struct drm_devi
- 	master->driver_priv = NULL;
- }
- 
--static void
--i915_mtrr_setup(struct drm_i915_private *dev_priv, unsigned long base,
--		unsigned long size)
--{
--	dev_priv->mm.gtt_mtrr = -1;
--
--#if defined(CONFIG_X86_PAT)
--	if (cpu_has_pat)
--		return;
--#endif
--
--	/* Set up a WC MTRR for non-PAT systems.  This is more common than
--	 * one would think, because the kernel disables PAT on first
--	 * generation Core chips because WC PAT gets overridden by a UC
--	 * MTRR if present.  Even if a UC MTRR isn't present.
--	 */
--	dev_priv->mm.gtt_mtrr = mtrr_add(base, size, MTRR_TYPE_WRCOMB, 1);
--	if (dev_priv->mm.gtt_mtrr < 0) {
--		DRM_INFO("MTRR allocation failed.  Graphics "
--			 "performance may suffer.\n");
--	}
--}
--
- static void i915_kick_out_firmware_fb(struct drm_i915_private *dev_priv)
- {
- 	struct apertures_struct *ap;
-@@ -1595,8 +1571,8 @@ int i915_driver_load(struct drm_device *
- 		goto out_rmmap;
- 	}
- 
--	i915_mtrr_setup(dev_priv, dev_priv->gtt.mappable_base,
--			aperture_size);
-+	dev_priv->mm.gtt_mtrr = arch_phys_wc_add(dev_priv->gtt.mappable_base,
-+						 aperture_size);
- 
- 	/* The i915 workqueue is primarily used for batched retirement of
- 	 * requests (and thus managing bo) once the task has been completed
-@@ -1695,12 +1671,7 @@ out_gem_unload:
- 	pm_qos_remove_request(&dev_priv->pm_qos);
- 	destroy_workqueue(dev_priv->wq);
- out_mtrrfree:
--	if (dev_priv->mm.gtt_mtrr >= 0) {
--		mtrr_del(dev_priv->mm.gtt_mtrr,
--			 dev_priv->gtt.mappable_base,
--			 aperture_size);
--		dev_priv->mm.gtt_mtrr = -1;
--	}
-+	arch_phys_wc_del(dev_priv->mm.gtt_mtrr);
- 	io_mapping_free(dev_priv->gtt.mappable);
- 	dev_priv->gtt.gtt_remove(dev);
- out_rmmap:
-@@ -1735,12 +1706,7 @@ int i915_driver_unload(struct drm_device
- 	cancel_delayed_work_sync(&dev_priv->mm.retire_work);
- 
- 	io_mapping_free(dev_priv->gtt.mappable);
--	if (dev_priv->mm.gtt_mtrr >= 0) {
--		mtrr_del(dev_priv->mm.gtt_mtrr,
--			 dev_priv->gtt.mappable_base,
--			 dev_priv->gtt.mappable_end);
--		dev_priv->mm.gtt_mtrr = -1;
--	}
-+	arch_phys_wc_del(dev_priv->mm.gtt_mtrr);
- 
- 	acpi_video_unregister();
- 
diff --git a/patches.baytrail/0167-drm-Print-pretty-names-for-pixel-formats.patch b/patches.baytrail/0167-drm-Print-pretty-names-for-pixel-formats.patch
deleted file mode 100644
index e5dae324f1cde..0000000000000
--- a/patches.baytrail/0167-drm-Print-pretty-names-for-pixel-formats.patch
+++ /dev/null
@@ -1,106 +0,0 @@
-From 79c344a29a11a32a899891b27d4943661930a9f3 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Mon, 10 Jun 2013 11:15:10 +0300
-Subject: drm: Print pretty names for pixel formats
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Rather than just printing the pixel format as a hex number, decode the
-fourcc into human readable form, and also decode the LE vs. BE flag.
-
-Keep printing the raw hex number too in case it contains non-printable
-characters.
-
-Some examples what the new drm_get_format_name() produces:
-DRM_FORMAT_XRGB8888: "XR24 little-endian (0x34325258)"
-DRM_FORMAT_YUYV: "YUYV little-endian (0x56595559)"
-DRM_FORMAT_RGB565|DRM_FORMAT_BIG_ENDIAN: "RG16 big-endian (0xb6314752)"
-Unprintable characters: "D??? big-endian (0xff7f0244)"
-
-v2: Fix patch author
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit 6ba6d03e69125ef42a63e90d45e49c659ea3c34f)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_crtc.c | 29 +++++++++++++++++++++++++++--
- include/drm/drm_crtc.h     |  1 +
- 2 files changed, 28 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
-index 8759d699bd8e..f4831510d38a 100644
---- a/drivers/gpu/drm/drm_crtc.c
-+++ b/drivers/gpu/drm/drm_crtc.c
-@@ -29,6 +29,7 @@
-  *      Dave Airlie <airlied@linux.ie>
-  *      Jesse Barnes <jesse.barnes@intel.com>
-  */
-+#include <linux/ctype.h>
- #include <linux/list.h>
- #include <linux/slab.h>
- #include <linux/export.h>
-@@ -252,6 +253,28 @@ char *drm_get_connector_status_name(enum drm_connector_status status)
- }
- EXPORT_SYMBOL(drm_get_connector_status_name);
- 
-+static char printable_char(int c)
-+{
-+	return isascii(c) && isprint(c) ? c : '?';
-+}
-+
-+char *drm_get_format_name(uint32_t format)
-+{
-+	static char buf[32];
-+
-+	snprintf(buf, sizeof(buf),
-+		 "%c%c%c%c %s-endian (0x%08x)",
-+		 printable_char(format & 0xff),
-+		 printable_char((format >> 8) & 0xff),
-+		 printable_char((format >> 16) & 0xff),
-+		 printable_char((format >> 24) & 0x7f),
-+		 format & DRM_FORMAT_BIG_ENDIAN ? "big" : "little",
-+		 format);
-+
-+	return buf;
-+}
-+EXPORT_SYMBOL(drm_get_format_name);
-+
- /**
-  * drm_mode_object_get - allocate a new modeset identifier
-  * @dev: DRM device
-@@ -1834,7 +1857,8 @@ int drm_mode_setplane(struct drm_device *dev, void *data,
- 		if (fb->pixel_format == plane->format_types[i])
- 			break;
- 	if (i == plane->format_count) {
--		DRM_DEBUG_KMS("Invalid pixel format 0x%08x\n", fb->pixel_format);
-+		DRM_DEBUG_KMS("Invalid pixel format %s\n",
-+			      drm_get_format_name(fb->pixel_format));
- 		ret = -EINVAL;
- 		goto out;
- 	}
-@@ -2312,7 +2336,8 @@ static int framebuffer_check(const struct drm_mode_fb_cmd2 *r)
- 
- 	ret = format_check(r);
- 	if (ret) {
--		DRM_DEBUG_KMS("bad framebuffer format 0x%08x\n", r->pixel_format);
-+		DRM_DEBUG_KMS("bad framebuffer format %s\n",
-+			      drm_get_format_name(r->pixel_format));
- 		return ret;
- 	}
- 
-diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h
-index adb3f9b625f6..2cbbfd44c6df 100644
---- a/include/drm/drm_crtc.h
-+++ b/include/drm/drm_crtc.h
-@@ -1094,5 +1094,6 @@ extern int drm_format_num_planes(uint32_t format);
- extern int drm_format_plane_cpp(uint32_t format, int plane);
- extern int drm_format_horz_chroma_subsampling(uint32_t format);
- extern int drm_format_vert_chroma_subsampling(uint32_t format);
-+extern char *drm_get_format_name(uint32_t format);
- 
- #endif /* __DRM_CRTC_H__ */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0168-drm-i915-Print-pretty-names-for-pixel-formats.patch b/patches.baytrail/0168-drm-i915-Print-pretty-names-for-pixel-formats.patch
deleted file mode 100644
index e4a2b2fc61c17..0000000000000
--- a/patches.baytrail/0168-drm-i915-Print-pretty-names-for-pixel-formats.patch
+++ /dev/null
@@ -1,67 +0,0 @@
-From e14831c7f71a50e363b95d2edfc59fe5eb335a92 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Fri, 7 Jun 2013 15:43:05 +0000
-Subject: drm/i915: Print pretty names for pixel formats
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Use drm_get_format_name to print more readable pixel format names
-in debug output.
-
-Also unify the debug messages to say "unsupported pixel format",
-which better describes what is going on.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit 4ee62c7669be1a6f1dd407e5ba7e38c0e2204e92)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 12 ++++++++----
- 1 file changed, 8 insertions(+), 4 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 957dd91803fa..7137d17f16b3 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -8957,7 +8957,8 @@ int intel_framebuffer_init(struct drm_device *dev,
- 	case DRM_FORMAT_XRGB1555:
- 	case DRM_FORMAT_ARGB1555:
- 		if (INTEL_INFO(dev)->gen > 3) {
--			DRM_DEBUG("invalid format: 0x%08x\n", mode_cmd->pixel_format);
-+			DRM_DEBUG("unsupported pixel format: %s\n",
-+				  drm_get_format_name(mode_cmd->pixel_format));
- 			return -EINVAL;
- 		}
- 		break;
-@@ -8968,7 +8969,8 @@ int intel_framebuffer_init(struct drm_device *dev,
- 	case DRM_FORMAT_XBGR2101010:
- 	case DRM_FORMAT_ABGR2101010:
- 		if (INTEL_INFO(dev)->gen < 4) {
--			DRM_DEBUG("invalid format: 0x%08x\n", mode_cmd->pixel_format);
-+			DRM_DEBUG("unsupported pixel format: %s\n",
-+				  drm_get_format_name(mode_cmd->pixel_format));
- 			return -EINVAL;
- 		}
- 		break;
-@@ -8977,12 +8979,14 @@ int intel_framebuffer_init(struct drm_device *dev,
- 	case DRM_FORMAT_YVYU:
- 	case DRM_FORMAT_VYUY:
- 		if (INTEL_INFO(dev)->gen < 5) {
--			DRM_DEBUG("invalid format: 0x%08x\n", mode_cmd->pixel_format);
-+			DRM_DEBUG("unsupported pixel format: %s\n",
-+				  drm_get_format_name(mode_cmd->pixel_format));
- 			return -EINVAL;
- 		}
- 		break;
- 	default:
--		DRM_DEBUG("unsupported pixel format 0x%08x\n", mode_cmd->pixel_format);
-+		DRM_DEBUG("unsupported pixel format: %s\n",
-+			  drm_get_format_name(mode_cmd->pixel_format));
- 		return -EINVAL;
- 	}
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0169-drm-i915-add-encoder-get_config-function-v5.patch b/patches.baytrail/0169-drm-i915-add-encoder-get_config-function-v5.patch
deleted file mode 100644
index e7168a57f376c..0000000000000
--- a/patches.baytrail/0169-drm-i915-add-encoder-get_config-function-v5.patch
+++ /dev/null
@@ -1,417 +0,0 @@
-From e94917dfbe1dab1819af4b23f0c7450bafb803a0 Mon Sep 17 00:00:00 2001
-From: Jesse Barnes <jbarnes@virtuousgeek.org>
-Date: Tue, 14 May 2013 17:08:26 -0700
-Subject: drm/i915: add encoder get_config function v5
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-We can use this for fetching encoder specific pipe_config state, like
-mode flags, adjusted clock, etc.
-
-Just used for mode flags atm, so we can check the pipe config state at
-mode set time.
-
-v2: get_config when checking hw state too
-v3: fix DVO and LVDS mode flags (Ville)
-    get SDVO DTD for flag fetch (Ville)
-v4: use input timings (Ville)
-    correct command used (Ville)
-    remove gen4 check (Ville)
-v5: get DDI flag config too
-
-Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> (v4)
-Tested-by: Paulo Zanoni <przanoni@gmail.com> (the new hsw ddi stuff)
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 045ac3b5629d9711531a408e92f9074db6afe7ce)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_crt.c     |   23 +++++++++++++++++++
- drivers/gpu/drm/i915/intel_ddi.c     |   23 +++++++++++++++++++
- drivers/gpu/drm/i915/intel_display.c |   20 ++++++++++++++--
- drivers/gpu/drm/i915/intel_dp.c      |   23 +++++++++++++++++++
- drivers/gpu/drm/i915/intel_drv.h     |    4 +++
- drivers/gpu/drm/i915/intel_dvo.c     |   21 +++++++++++++++++
- drivers/gpu/drm/i915/intel_hdmi.c    |   23 +++++++++++++++++++
- drivers/gpu/drm/i915/intel_lvds.c    |   26 +++++++++++++++++++++
- drivers/gpu/drm/i915/intel_sdvo.c    |   42 +++++++++++++++++++++++++++++++++++
- 9 files changed, 202 insertions(+), 3 deletions(-)
-
---- a/drivers/gpu/drm/i915/intel_crt.c
-+++ b/drivers/gpu/drm/i915/intel_crt.c
-@@ -84,6 +84,28 @@ static bool intel_crt_get_hw_state(struc
- 	return true;
- }
- 
-+static void intel_crt_get_config(struct intel_encoder *encoder,
-+				 struct intel_crtc_config *pipe_config)
-+{
-+	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
-+	struct intel_crt *crt = intel_encoder_to_crt(encoder);
-+	u32 tmp, flags = 0;
-+
-+	tmp = I915_READ(crt->adpa_reg);
-+
-+	if (tmp & ADPA_HSYNC_ACTIVE_HIGH)
-+		flags |= DRM_MODE_FLAG_PHSYNC;
-+	else
-+		flags |= DRM_MODE_FLAG_NHSYNC;
-+
-+	if (tmp & ADPA_VSYNC_ACTIVE_HIGH)
-+		flags |= DRM_MODE_FLAG_PVSYNC;
-+	else
-+		flags |= DRM_MODE_FLAG_NVSYNC;
-+
-+	pipe_config->adjusted_mode.flags |= flags;
-+}
-+
- /* Note: The caller is required to filter out dpms modes not supported by the
-  * platform. */
- static void intel_crt_set_dpms(struct intel_encoder *encoder, int mode)
-@@ -778,6 +800,7 @@ void intel_crt_init(struct drm_device *d
- 	crt->base.compute_config = intel_crt_compute_config;
- 	crt->base.disable = intel_disable_crt;
- 	crt->base.enable = intel_enable_crt;
-+	crt->base.get_config = intel_crt_get_config;
- 	if (I915_HAS_HOTPLUG(dev))
- 		crt->base.hpd_pin = HPD_CRT;
- 	if (HAS_DDI(dev))
---- a/drivers/gpu/drm/i915/intel_ddi.c
-+++ b/drivers/gpu/drm/i915/intel_ddi.c
-@@ -1266,6 +1266,28 @@ static void intel_ddi_hot_plug(struct in
- 		intel_dp_check_link_status(intel_dp);
- }
- 
-+static void intel_ddi_get_config(struct intel_encoder *encoder,
-+				 struct intel_crtc_config *pipe_config)
-+{
-+	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
-+	struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
-+	enum transcoder cpu_transcoder = intel_crtc->config.cpu_transcoder;
-+	u32 temp, flags = 0;
-+
-+	temp = I915_READ(TRANS_DDI_FUNC_CTL(cpu_transcoder));
-+	if (temp & TRANS_DDI_PHSYNC)
-+		flags |= DRM_MODE_FLAG_PHSYNC;
-+	else
-+		flags |= DRM_MODE_FLAG_NHSYNC;
-+	if (temp & TRANS_DDI_PVSYNC)
-+		flags |= DRM_MODE_FLAG_PVSYNC;
-+	else
-+		flags |= DRM_MODE_FLAG_NVSYNC;
-+
-+	pipe_config->adjusted_mode.flags |= flags;
-+	pipe_config->pixel_multiplier = 1;
-+}
-+
- static void intel_ddi_destroy(struct drm_encoder *encoder)
- {
- 	/* HDMI has nothing special to destroy, so we can go with this. */
-@@ -1325,6 +1347,7 @@ void intel_ddi_init(struct drm_device *d
- 	intel_encoder->disable = intel_disable_ddi;
- 	intel_encoder->post_disable = intel_ddi_post_disable;
- 	intel_encoder->get_hw_state = intel_ddi_get_hw_state;
-+	intel_encoder->get_config = intel_ddi_get_config;
- 
- 	intel_dig_port->port = port;
- 	intel_dig_port->saved_port_bits = I915_READ(DDI_BUF_CTL(port)) &
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -8071,6 +8071,15 @@ intel_pipe_config_compare(struct drm_dev
- 	PIPE_CONF_CHECK_FLAGS(adjusted_mode.flags,
- 			      DRM_MODE_FLAG_INTERLACE);
- 
-+	PIPE_CONF_CHECK_FLAGS(adjusted_mode.flags,
-+			      DRM_MODE_FLAG_PHSYNC);
-+	PIPE_CONF_CHECK_FLAGS(adjusted_mode.flags,
-+			      DRM_MODE_FLAG_NHSYNC);
-+	PIPE_CONF_CHECK_FLAGS(adjusted_mode.flags,
-+			      DRM_MODE_FLAG_PVSYNC);
-+	PIPE_CONF_CHECK_FLAGS(adjusted_mode.flags,
-+			      DRM_MODE_FLAG_NVSYNC);
-+
- 	PIPE_CONF_CHECK_I(requested_mode.hdisplay);
- 	PIPE_CONF_CHECK_I(requested_mode.vdisplay);
- 
-@@ -8163,6 +8172,8 @@ intel_modeset_check_state(struct drm_dev
- 		bool enabled = false;
- 		bool active = false;
- 
-+		memset(&pipe_config, 0, sizeof(pipe_config));
-+
- 		DRM_DEBUG_KMS("[CRTC:%d]\n",
- 			      crtc->base.base.id);
- 
-@@ -8176,6 +8187,8 @@ intel_modeset_check_state(struct drm_dev
- 			enabled = true;
- 			if (encoder->connectors_active)
- 				active = true;
-+			if (encoder->get_config)
-+				encoder->get_config(encoder, &pipe_config);
- 		}
- 		WARN(active != crtc->active,
- 		     "crtc's computed active state doesn't match tracked active state "
-@@ -8184,7 +8197,6 @@ intel_modeset_check_state(struct drm_dev
- 		     "crtc's computed enabled state doesn't match tracked enabled state "
- 		     "(expected %i, found %i)\n", enabled, crtc->base.enabled);
- 
--		memset(&pipe_config, 0, sizeof(pipe_config));
- 		pipe_config.cpu_transcoder = crtc->config.cpu_transcoder;
- 		active = dev_priv->display.get_pipe_config(crtc,
- 							   &pipe_config);
-@@ -9636,8 +9648,10 @@ setup_pipes:
- 		pipe = 0;
- 
- 		if (encoder->get_hw_state(encoder, &pipe)) {
--			encoder->base.crtc =
--				dev_priv->pipe_to_crtc_mapping[pipe];
-+			crtc = to_intel_crtc(dev_priv->pipe_to_crtc_mapping[pipe]);
-+			encoder->base.crtc = &crtc->base;
-+			if (encoder->get_config)
-+				encoder->get_config(encoder, &crtc->config);
- 		} else {
- 			encoder->base.crtc = NULL;
- 		}
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -1366,6 +1366,28 @@ static bool intel_dp_get_hw_state(struct
- 	return true;
- }
- 
-+static void intel_dp_get_config(struct intel_encoder *encoder,
-+				struct intel_crtc_config *pipe_config)
-+{
-+	struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
-+	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
-+	u32 tmp, flags = 0;
-+
-+	tmp = I915_READ(intel_dp->output_reg);
-+
-+	if (tmp & DP_SYNC_HS_HIGH)
-+		flags |= DRM_MODE_FLAG_PHSYNC;
-+	else
-+		flags |= DRM_MODE_FLAG_NHSYNC;
-+
-+	if (tmp & DP_SYNC_VS_HIGH)
-+		flags |= DRM_MODE_FLAG_PVSYNC;
-+	else
-+		flags |= DRM_MODE_FLAG_NVSYNC;
-+
-+	pipe_config->adjusted_mode.flags |= flags;
-+}
-+
- static void intel_disable_dp(struct intel_encoder *encoder)
- {
- 	struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
-@@ -3220,6 +3242,7 @@ intel_dp_init(struct drm_device *dev, in
- 	intel_encoder->disable = intel_disable_dp;
- 	intel_encoder->post_disable = intel_post_disable_dp;
- 	intel_encoder->get_hw_state = intel_dp_get_hw_state;
-+	intel_encoder->get_config = intel_dp_get_config;
- 	if (IS_VALLEYVIEW(dev))
- 		intel_encoder->pre_pll_enable = intel_dp_pre_pll_enable;
- 
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -139,6 +139,10 @@ struct intel_encoder {
- 	 * the encoder is active. If the encoder is enabled it also set the pipe
- 	 * it is connected to in the pipe parameter. */
- 	bool (*get_hw_state)(struct intel_encoder *, enum pipe *pipe);
-+	/* Reconstructs the equivalent mode flags for the current hardware
-+	 * state. */
-+	void (*get_config)(struct intel_encoder *,
-+			   struct intel_crtc_config *pipe_config);
- 	int crtc_mask;
- 	enum hpd_pin hpd_pin;
- };
---- a/drivers/gpu/drm/i915/intel_dvo.c
-+++ b/drivers/gpu/drm/i915/intel_dvo.c
-@@ -136,6 +136,26 @@ static bool intel_dvo_get_hw_state(struc
- 	return true;
- }
- 
-+static void intel_dvo_get_config(struct intel_encoder *encoder,
-+				 struct intel_crtc_config *pipe_config)
-+{
-+	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
-+	struct intel_dvo *intel_dvo = enc_to_intel_dvo(&encoder->base);
-+	u32 tmp, flags = 0;
-+
-+	tmp = I915_READ(intel_dvo->dev.dvo_reg);
-+	if (tmp & DVO_HSYNC_ACTIVE_HIGH)
-+		flags |= DRM_MODE_FLAG_PHSYNC;
-+	else
-+		flags |= DRM_MODE_FLAG_NHSYNC;
-+	if (tmp & DVO_VSYNC_ACTIVE_HIGH)
-+		flags |= DRM_MODE_FLAG_PVSYNC;
-+	else
-+		flags |= DRM_MODE_FLAG_NVSYNC;
-+
-+	pipe_config->adjusted_mode.flags |= flags;
-+}
-+
- static void intel_disable_dvo(struct intel_encoder *encoder)
- {
- 	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
-@@ -447,6 +467,7 @@ void intel_dvo_init(struct drm_device *d
- 	intel_encoder->disable = intel_disable_dvo;
- 	intel_encoder->enable = intel_enable_dvo;
- 	intel_encoder->get_hw_state = intel_dvo_get_hw_state;
-+	intel_encoder->get_config = intel_dvo_get_config;
- 	intel_connector->get_hw_state = intel_dvo_connector_get_hw_state;
- 
- 	/* Now, try to find a controller */
---- a/drivers/gpu/drm/i915/intel_hdmi.c
-+++ b/drivers/gpu/drm/i915/intel_hdmi.c
-@@ -658,6 +658,28 @@ static bool intel_hdmi_get_hw_state(stru
- 	return true;
- }
- 
-+static void intel_hdmi_get_config(struct intel_encoder *encoder,
-+				  struct intel_crtc_config *pipe_config)
-+{
-+	struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base);
-+	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
-+	u32 tmp, flags = 0;
-+
-+	tmp = I915_READ(intel_hdmi->hdmi_reg);
-+
-+	if (tmp & SDVO_HSYNC_ACTIVE_HIGH)
-+		flags |= DRM_MODE_FLAG_PHSYNC;
-+	else
-+		flags |= DRM_MODE_FLAG_NHSYNC;
-+
-+	if (tmp & SDVO_VSYNC_ACTIVE_HIGH)
-+		flags |= DRM_MODE_FLAG_PVSYNC;
-+	else
-+		flags |= DRM_MODE_FLAG_NVSYNC;
-+
-+	pipe_config->adjusted_mode.flags |= flags;
-+}
-+
- static void intel_enable_hdmi(struct intel_encoder *encoder)
- {
- 	struct drm_device *dev = encoder->base.dev;
-@@ -1216,6 +1238,7 @@ void intel_hdmi_init(struct drm_device *
- 	intel_encoder->enable = intel_enable_hdmi;
- 	intel_encoder->disable = intel_disable_hdmi;
- 	intel_encoder->get_hw_state = intel_hdmi_get_hw_state;
-+	intel_encoder->get_config = intel_hdmi_get_config;
- 	if (IS_VALLEYVIEW(dev)) {
- 		intel_encoder->pre_enable = intel_hdmi_pre_enable;
- 		intel_encoder->pre_pll_enable = intel_hdmi_pre_pll_enable;
---- a/drivers/gpu/drm/i915/intel_lvds.c
-+++ b/drivers/gpu/drm/i915/intel_lvds.c
-@@ -86,6 +86,31 @@ static bool intel_lvds_get_hw_state(stru
- 	return true;
- }
- 
-+static void intel_lvds_get_config(struct intel_encoder *encoder,
-+				  struct intel_crtc_config *pipe_config)
-+{
-+	struct drm_device *dev = encoder->base.dev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	u32 lvds_reg, tmp, flags = 0;
-+
-+	if (HAS_PCH_SPLIT(dev))
-+		lvds_reg = PCH_LVDS;
-+	else
-+		lvds_reg = LVDS;
-+
-+	tmp = I915_READ(lvds_reg);
-+	if (tmp & LVDS_HSYNC_POLARITY)
-+		flags |= DRM_MODE_FLAG_NHSYNC;
-+	else
-+		flags |= DRM_MODE_FLAG_PHSYNC;
-+	if (tmp & LVDS_VSYNC_POLARITY)
-+		flags |= DRM_MODE_FLAG_NVSYNC;
-+	else
-+		flags |= DRM_MODE_FLAG_PVSYNC;
-+
-+	pipe_config->adjusted_mode.flags |= flags;
-+}
-+
- /* The LVDS pin pair needs to be on before the DPLLs are enabled.
-  * This is an exception to the general rule that mode_set doesn't turn
-  * things on.
-@@ -953,6 +978,7 @@ bool intel_lvds_init(struct drm_device *
- 	intel_encoder->compute_config = intel_lvds_compute_config;
- 	intel_encoder->disable = intel_disable_lvds;
- 	intel_encoder->get_hw_state = intel_lvds_get_hw_state;
-+	intel_encoder->get_config = intel_lvds_get_config;
- 	intel_connector->get_hw_state = intel_connector_get_hw_state;
- 
- 	intel_connector_attach_encoder(intel_connector, intel_encoder);
---- a/drivers/gpu/drm/i915/intel_sdvo.c
-+++ b/drivers/gpu/drm/i915/intel_sdvo.c
-@@ -712,6 +712,13 @@ static bool intel_sdvo_set_timing(struct
- 		intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
- }
- 
-+static bool intel_sdvo_get_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
-+				  struct intel_sdvo_dtd *dtd)
-+{
-+	return intel_sdvo_get_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
-+		intel_sdvo_get_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
-+}
-+
- static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
- 					 struct intel_sdvo_dtd *dtd)
- {
-@@ -726,6 +733,13 @@ static bool intel_sdvo_set_output_timing
- 				     SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
- }
- 
-+static bool intel_sdvo_get_input_timing(struct intel_sdvo *intel_sdvo,
-+					struct intel_sdvo_dtd *dtd)
-+{
-+	return intel_sdvo_get_timing(intel_sdvo,
-+				     SDVO_CMD_GET_INPUT_TIMINGS_PART1, dtd);
-+}
-+
- static bool
- intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
- 					 uint16_t clock,
-@@ -1295,6 +1309,33 @@ static bool intel_sdvo_get_hw_state(stru
- 	return true;
- }
- 
-+static void intel_sdvo_get_config(struct intel_encoder *encoder,
-+				  struct intel_crtc_config *pipe_config)
-+{
-+	struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
-+	struct intel_sdvo_dtd dtd;
-+	u32 flags = 0;
-+	bool ret;
-+
-+	ret = intel_sdvo_get_input_timing(intel_sdvo, &dtd);
-+	if (!ret) {
-+		DRM_DEBUG_DRIVER("failed to retrieve SDVO DTD\n");
-+		return;
-+	}
-+
-+	if (dtd.part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
-+		flags |= DRM_MODE_FLAG_PHSYNC;
-+	else
-+		flags |= DRM_MODE_FLAG_NHSYNC;
-+
-+	if (dtd.part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
-+		flags |= DRM_MODE_FLAG_PVSYNC;
-+	else
-+		flags |= DRM_MODE_FLAG_NVSYNC;
-+
-+	pipe_config->adjusted_mode.flags |= flags;
-+}
-+
- static void intel_disable_sdvo(struct intel_encoder *encoder)
- {
- 	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
-@@ -2821,6 +2862,7 @@ bool intel_sdvo_init(struct drm_device *
- 	intel_encoder->mode_set = intel_sdvo_mode_set;
- 	intel_encoder->enable = intel_enable_sdvo;
- 	intel_encoder->get_hw_state = intel_sdvo_get_hw_state;
-+	intel_encoder->get_config = intel_sdvo_get_config;
- 
- 	/* In default case sdvo lvds is false */
- 	if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
diff --git a/patches.baytrail/0170-drm-i915-ILK-SNB-and-IVB-don-t-have-linetime-waterma.patch b/patches.baytrail/0170-drm-i915-ILK-SNB-and-IVB-don-t-have-linetime-waterma.patch
deleted file mode 100644
index ab194e7db331b..0000000000000
--- a/patches.baytrail/0170-drm-i915-ILK-SNB-and-IVB-don-t-have-linetime-waterma.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From 31c34ee116fd52a7461bba195c74d5bff1563774 Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Fri, 3 May 2013 17:23:37 -0300
-Subject: drm/i915: ILK, SNB and IVB don't have linetime watermarks
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-So don't call intel_update_linetime_watermarks from
-ironlake_crtc_mode_set. Only Haswell has these watermarks.
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 5a41254eac1137d0335c0aed7b00f1f3138ee9ca)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 2 --
- 1 file changed, 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index d2a01268443b..95dc839be850 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -5841,8 +5841,6 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
- 
- 	intel_update_watermarks(dev);
- 
--	intel_update_linetime_watermarks(dev, pipe, adjusted_mode);
--
- 	return ret;
- }
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0171-drm-i915-remove-intel_update_linetime_watermarks.patch b/patches.baytrail/0171-drm-i915-remove-intel_update_linetime_watermarks.patch
deleted file mode 100644
index 10b2d65ca0915..0000000000000
--- a/patches.baytrail/0171-drm-i915-remove-intel_update_linetime_watermarks.patch
+++ /dev/null
@@ -1,160 +0,0 @@
-From 67d7cd19116763b9de65ee81d1aeb3297bf970d7 Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Thu, 9 May 2013 16:55:50 -0300
-Subject: drm/i915: remove intel_update_linetime_watermarks
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The spec says the linetime watermarks must be programmed before
-enabling any display low power watermarks, but we're currently
-updating the linetime watermarks after we call intel_update_watermarks
-(and only at crtc_mode_set, not at crtc_{enable,disable}). So IMHO the
-best way guarantee the linetime watermarks will be updated before the
-low power watermarks is inside the update_wm function, because it's
-the function that enables low power watermarks. And since Haswell is
-the only platform that has linetime watermarks, let's completely kill
-the "intel_update_linetime_watermarks" abstraction and just use the
-intel_update_watermarks abstraction by creating haswell_update_wm.
-
-For now haswell_update_wm is still calling sandybridge_update_wm, but
-in the future I plan to implement a function specific to Haswell.
-
-v2: - Rename patch
-    - Disable LP watermarks before changing linetime WMs (Chris)
-    - Add a comment explaining that this is just temporary code.
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 1011d8c4373b229012208b5aedad4f46396bdd94)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h      |  2 --
- drivers/gpu/drm/i915/intel_display.c |  2 --
- drivers/gpu/drm/i915/intel_drv.h     |  2 --
- drivers/gpu/drm/i915/intel_pm.c      | 43 +++++++++++++++++++++++++-----------
- 4 files changed, 30 insertions(+), 19 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index dc2997828af1..4ab1e4266da0 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -316,8 +316,6 @@ struct drm_i915_display_funcs {
- 	void (*update_wm)(struct drm_device *dev);
- 	void (*update_sprite_wm)(struct drm_device *dev, int pipe,
- 				 uint32_t sprite_width, int pixel_size);
--	void (*update_linetime_wm)(struct drm_device *dev, int pipe,
--				 struct drm_display_mode *mode);
- 	void (*modeset_global_resources)(struct drm_device *dev);
- 	/* Returns the active state of the crtc, and if the crtc is active,
- 	 * fills out the pipe-config with the hw state. */
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 95dc839be850..e62a9770cf71 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -6008,8 +6008,6 @@ static int haswell_crtc_mode_set(struct drm_crtc *crtc,
- 
- 	intel_update_watermarks(dev);
- 
--	intel_update_linetime_watermarks(dev, pipe, adjusted_mode);
--
- 	return ret;
- }
- 
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index f0cae755a0a6..a5ba33bb6c0d 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -732,8 +732,6 @@ extern void intel_update_watermarks(struct drm_device *dev);
- extern void intel_update_sprite_watermarks(struct drm_device *dev, int pipe,
- 					   uint32_t sprite_width,
- 					   int pixel_size);
--extern void intel_update_linetime_watermarks(struct drm_device *dev, int pipe,
--			 struct drm_display_mode *mode);
- 
- extern unsigned long intel_gen4_compute_page_offset(int *x, int *y,
- 						    unsigned int tiling_mode,
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 71752d5cdaf4..e8505e8cd711 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2073,12 +2073,19 @@ static void ivybridge_update_wm(struct drm_device *dev)
- }
- 
- static void
--haswell_update_linetime_wm(struct drm_device *dev, int pipe,
--				 struct drm_display_mode *mode)
-+haswell_update_linetime_wm(struct drm_device *dev, struct drm_crtc *crtc)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
-+	enum pipe pipe = intel_crtc->pipe;
-+	struct drm_display_mode *mode = &intel_crtc->config.adjusted_mode;
- 	u32 temp;
- 
-+	if (!intel_crtc_active(crtc)) {
-+		I915_WRITE(PIPE_WM_LINETIME(pipe), 0);
-+		return;
-+	}
-+
- 	temp = I915_READ(PIPE_WM_LINETIME(pipe));
- 	temp &= ~PIPE_WM_LINETIME_MASK;
- 
-@@ -2099,6 +2106,26 @@ haswell_update_linetime_wm(struct drm_device *dev, int pipe,
- 	I915_WRITE(PIPE_WM_LINETIME(pipe), temp);
- }
- 
-+static void haswell_update_wm(struct drm_device *dev)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct drm_crtc *crtc;
-+	enum pipe pipe;
-+
-+	/* Disable the LP WMs before changine the linetime registers. This is
-+	 * just a temporary code that will be replaced soon. */
-+	I915_WRITE(WM3_LP_ILK, 0);
-+	I915_WRITE(WM2_LP_ILK, 0);
-+	I915_WRITE(WM1_LP_ILK, 0);
-+
-+	for_each_pipe(pipe) {
-+		crtc = dev_priv->pipe_to_crtc_mapping[pipe];
-+		haswell_update_linetime_wm(dev, crtc);
-+	}
-+
-+	sandybridge_update_wm(dev);
-+}
-+
- static bool
- sandybridge_compute_sprite_wm(struct drm_device *dev, int plane,
- 			      uint32_t sprite_width, int pixel_size,
-@@ -2294,15 +2321,6 @@ void intel_update_watermarks(struct drm_device *dev)
- 		dev_priv->display.update_wm(dev);
- }
- 
--void intel_update_linetime_watermarks(struct drm_device *dev,
--		int pipe, struct drm_display_mode *mode)
--{
--	struct drm_i915_private *dev_priv = dev->dev_private;
--
--	if (dev_priv->display.update_linetime_wm)
--		dev_priv->display.update_linetime_wm(dev, pipe, mode);
--}
--
- void intel_update_sprite_watermarks(struct drm_device *dev, int pipe,
- 				    uint32_t sprite_width, int pixel_size)
- {
-@@ -4624,9 +4642,8 @@ void intel_init_pm(struct drm_device *dev)
- 			dev_priv->display.init_clock_gating = ivybridge_init_clock_gating;
- 		} else if (IS_HASWELL(dev)) {
- 			if (SNB_READ_WM0_LATENCY()) {
--				dev_priv->display.update_wm = sandybridge_update_wm;
-+				dev_priv->display.update_wm = haswell_update_wm;
- 				dev_priv->display.update_sprite_wm = sandybridge_update_sprite_wm;
--				dev_priv->display.update_linetime_wm = haswell_update_linetime_wm;
- 			} else {
- 				DRM_DEBUG_KMS("Failed to read display plane latency. "
- 					      "Disable CxSR\n");
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0172-drm-i915-use-the-mode-htotal-to-calculate-linetime-w.patch b/patches.baytrail/0172-drm-i915-use-the-mode-htotal-to-calculate-linetime-w.patch
deleted file mode 100644
index 947f322015185..0000000000000
--- a/patches.baytrail/0172-drm-i915-use-the-mode-htotal-to-calculate-linetime-w.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From a387a082e8b46f08ecdb3fc3f5c514a9c070e9f6 Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Fri, 3 May 2013 17:23:39 -0300
-Subject: drm/i915: use the mode->htotal to calculate linetime watermarks
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-... instead of mode->crtc_display. The spec says "pipe horizontal
-total number of pixels" and the "Haswell Watermark Calculator" tool
-uses the "Pipe H Total" instead of "Pipe H Src" as the value.
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 7366937312d4e406539b1cf70e1562358bdd560e)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index e8505e8cd711..9f336991fee7 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2093,7 +2093,7 @@ haswell_update_linetime_wm(struct drm_device *dev, struct drm_crtc *crtc)
- 	 * row at the given clock rate, multiplied by 8.
- 	 * */
- 	temp |= PIPE_WM_LINETIME_TIME(
--		((mode->crtc_hdisplay * 1000) / mode->clock) * 8);
-+		((mode->htotal * 1000) / mode->clock) * 8);
- 
- 	/* IPS watermarks are only used by pipe A, and are ignored by
- 	 * pipes B and C.  They are calculated similarly to the common
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0173-drm-i915-fix-haswell-linetime-watermarks-calculation.patch b/patches.baytrail/0173-drm-i915-fix-haswell-linetime-watermarks-calculation.patch
deleted file mode 100644
index 6428336fba603..0000000000000
--- a/patches.baytrail/0173-drm-i915-fix-haswell-linetime-watermarks-calculation.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From c13117d00b2dfb5b8ed8472a47bbd73418dd73b8 Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Fri, 3 May 2013 17:23:40 -0300
-Subject: drm/i915: fix haswell linetime watermarks calculation
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Move the "*8"  calculation to the left side so we don't propagate
-rounding errors. Also use DIV_ROUND_CLOSEST because that's what the
-spec says we need to do.
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit eaa591ec528ad75bb4c77606c5cb671f05e04db6)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 9f336991fee7..84cc32643f63 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2093,7 +2093,7 @@ haswell_update_linetime_wm(struct drm_device *dev, struct drm_crtc *crtc)
- 	 * row at the given clock rate, multiplied by 8.
- 	 * */
- 	temp |= PIPE_WM_LINETIME_TIME(
--		((mode->htotal * 1000) / mode->clock) * 8);
-+		DIV_ROUND_CLOSEST(mode->htotal * 1000 * 8, mode->clock));
- 
- 	/* IPS watermarks are only used by pipe A, and are ignored by
- 	 * pipes B and C.  They are calculated similarly to the common
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0174-drm-i915-make-intel_ddi_get_cdclk_freq-return-values.patch b/patches.baytrail/0174-drm-i915-make-intel_ddi_get_cdclk_freq-return-values.patch
deleted file mode 100644
index d91a6d57c2303..0000000000000
--- a/patches.baytrail/0174-drm-i915-make-intel_ddi_get_cdclk_freq-return-values.patch
+++ /dev/null
@@ -1,94 +0,0 @@
-From 4395f23a2af9250ec17528c7fbccdf7b3a16badc Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Fri, 3 May 2013 17:23:42 -0300
-Subject: drm/i915: make intel_ddi_get_cdclk_freq return values in KHz
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-With this, that 338 can finally become the correct 337500.
-
-Due to the change we need to adjust the intel_dp_aux_ch function to
-set the correct value, so adjust the division and also use
-DIV_ROUND_CLOSEST instead of the old "round down" behavior because the
-spec says the value "should be programmed to get as close as possible
-to the ideal rate of 2MHz".
-
-Quoting Paulo's follow-up to a question from Chris Wilson to explain
-what exactly will change:
-
-I use the 337500 value on the next patch, when setting the
-ips_linetime value. The correct frequency is 337500, not 338000.
-
-ips_linetime = DIV_ROUND_CLOSEST(mode->htotal * 1000 * 8,
-intel_ddi_get_cdclk_freq);
-For a mode with htotal of 2640 [0] we'll have: (i) (2640 * 1000 * 8) /
-338000 = 62.48, resulting in 62 and (ii) (2640 * 1000 * 8) / 337500 =
-62.57 resulting in 63.
-
-For the case inside intel_dp.c:
-Previously we were using 338. So with the old formula we were writing
-338/2 = 169 to the register. And 337500 / 169 = 1997.04 (we use 337500
-here because it's the real clock value). With the new value of
-337500/2000 we'll have 168.75, which is 168 on the round-down case and
-169 on the round-closest case. If we write 168 to the register, 337500
-/ 168 = 2008.92, and 2008.92 is more distant from 2000 than 1997.04.
-So with this patch we're changing the formula but still writing the
-same correct value to the DP AUX register.
-
-[0]: That's 1920x1080@50Hz on my DP monitor.
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-[danvet: Pimp the commit message with Paulo's follow-up.]
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit b2b877ffe37d699f77f45e993590b66010491c52)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_ddi.c |   10 +++++-----
- drivers/gpu/drm/i915/intel_dp.c  |    3 ++-
- 2 files changed, 7 insertions(+), 6 deletions(-)
-
---- a/drivers/gpu/drm/i915/intel_ddi.c
-+++ b/drivers/gpu/drm/i915/intel_ddi.c
-@@ -1160,14 +1160,14 @@ static void intel_disable_ddi(struct int
- int intel_ddi_get_cdclk_freq(struct drm_i915_private *dev_priv)
- {
- 	if (I915_READ(HSW_FUSE_STRAP) & HSW_CDCLK_LIMIT)
--		return 450;
-+		return 450000;
- 	else if ((I915_READ(LCPLL_CTL) & LCPLL_CLK_FREQ_MASK) ==
- 		 LCPLL_CLK_FREQ_450)
--		return 450;
-+		return 450000;
- 	else if (IS_ULT(dev_priv->dev))
--		return 338;
-+		return 337500;
- 	else
--		return 540;
-+		return 540000;
- }
- 
- void intel_ddi_pll_init(struct drm_device *dev)
-@@ -1180,7 +1180,7 @@ void intel_ddi_pll_init(struct drm_devic
- 	 * Don't even try to turn it on.
- 	 */
- 
--	DRM_DEBUG_KMS("CDCLK running at %dMHz\n",
-+	DRM_DEBUG_KMS("CDCLK running at %dKHz\n",
- 		      intel_ddi_get_cdclk_freq(dev_priv));
- 
- 	if (val & LCPLL_CD_SOURCE_FCLK)
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -319,7 +319,8 @@ intel_dp_aux_ch(struct intel_dp *intel_d
- 	 */
- 	if (is_cpu_edp(intel_dp)) {
- 		if (HAS_DDI(dev))
--			aux_clock_divider = intel_ddi_get_cdclk_freq(dev_priv) >> 1;
-+			aux_clock_divider = DIV_ROUND_CLOSEST(
-+				intel_ddi_get_cdclk_freq(dev_priv), 2000);
- 		else if (IS_VALLEYVIEW(dev))
- 			aux_clock_divider = 100;
- 		else if (IS_GEN6(dev) || IS_GEN7(dev))
diff --git a/patches.baytrail/0175-drm-i915-set-the-IPS-linetime-watermark.patch b/patches.baytrail/0175-drm-i915-set-the-IPS-linetime-watermark.patch
deleted file mode 100644
index 2c87639b99b7d..0000000000000
--- a/patches.baytrail/0175-drm-i915-set-the-IPS-linetime-watermark.patch
+++ /dev/null
@@ -1,72 +0,0 @@
-From 842f1bd6f12a539caed5337bff25eec9f27df39e Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Fri, 3 May 2013 17:23:43 -0300
-Subject: drm/i915: set the IPS linetime watermark
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Remove the "placeholder" comment and set the actual value described by
-the specification. We still don't enable IPS, but it won't hurt to
-already have the value set here.
-
-While at it, fully set the register value instead of just masking the
-values we're changing.
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-[danvet: Resolve conflict due to reordered patches.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 85a02deb4ca5a7e1e39e8538b6eb3c7066469720)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 22 +++++++---------------
- 1 file changed, 7 insertions(+), 15 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 84cc32643f63..c121e516c2cc 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2079,31 +2079,23 @@ haswell_update_linetime_wm(struct drm_device *dev, struct drm_crtc *crtc)
- 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
- 	enum pipe pipe = intel_crtc->pipe;
- 	struct drm_display_mode *mode = &intel_crtc->config.adjusted_mode;
--	u32 temp;
-+	u32 linetime, ips_linetime;
- 
- 	if (!intel_crtc_active(crtc)) {
- 		I915_WRITE(PIPE_WM_LINETIME(pipe), 0);
- 		return;
- 	}
- 
--	temp = I915_READ(PIPE_WM_LINETIME(pipe));
--	temp &= ~PIPE_WM_LINETIME_MASK;
--
- 	/* The WM are computed with base on how long it takes to fill a single
- 	 * row at the given clock rate, multiplied by 8.
- 	 * */
--	temp |= PIPE_WM_LINETIME_TIME(
--		DIV_ROUND_CLOSEST(mode->htotal * 1000 * 8, mode->clock));
--
--	/* IPS watermarks are only used by pipe A, and are ignored by
--	 * pipes B and C.  They are calculated similarly to the common
--	 * linetime values, except that we are using CD clock frequency
--	 * in MHz instead of pixel rate for the division.
--	 *
--	 * This is a placeholder for the IPS watermark calculation code.
--	 */
-+	linetime = DIV_ROUND_CLOSEST(mode->htotal * 1000 * 8, mode->clock);
-+	ips_linetime = DIV_ROUND_CLOSEST(mode->htotal * 1000 * 8,
-+					 intel_ddi_get_cdclk_freq(dev_priv));
- 
--	I915_WRITE(PIPE_WM_LINETIME(pipe), temp);
-+	I915_WRITE(PIPE_WM_LINETIME(pipe),
-+		   PIPE_WM_LINETIME_IPS_LINETIME(ips_linetime) |
-+		   PIPE_WM_LINETIME_TIME(linetime));
- }
- 
- static void haswell_update_wm(struct drm_device *dev)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0176-drm-i915-MCH_SSKPD-is-a-64-bit-register-on-Haswell.patch b/patches.baytrail/0176-drm-i915-MCH_SSKPD-is-a-64-bit-register-on-Haswell.patch
deleted file mode 100644
index e2f91a0bac1ad..0000000000000
--- a/patches.baytrail/0176-drm-i915-MCH_SSKPD-is-a-64-bit-register-on-Haswell.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From d206a94de025497e11e0294766496b1bbf7e9919 Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Fri, 3 May 2013 17:23:44 -0300
-Subject: drm/i915: MCH_SSKPD is a 64 bit register on Haswell
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-And the SNB_READ_WM0_LATENCY macro is not valid anymore because we
-have the "New WM0" at 63:56, so the "Old WM0" could maybe be zero if
-the new one is not zero.
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 3e1f72664e0a8a31e9b90c48459deb6642fd52f3)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index c121e516c2cc..42bc0a36caac 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -4633,7 +4633,7 @@ void intel_init_pm(struct drm_device *dev)
- 			}
- 			dev_priv->display.init_clock_gating = ivybridge_init_clock_gating;
- 		} else if (IS_HASWELL(dev)) {
--			if (SNB_READ_WM0_LATENCY()) {
-+			if (I915_READ64(MCH_SSKPD)) {
- 				dev_priv->display.update_wm = haswell_update_wm;
- 				dev_priv->display.update_sprite_wm = sandybridge_update_sprite_wm;
- 			} else {
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0177-drm-i915-set-FORCE_ARB_IDLE_PLANES-workaround.patch b/patches.baytrail/0177-drm-i915-set-FORCE_ARB_IDLE_PLANES-workaround.patch
deleted file mode 100644
index 996086a1cd477..0000000000000
--- a/patches.baytrail/0177-drm-i915-set-FORCE_ARB_IDLE_PLANES-workaround.patch
+++ /dev/null
@@ -1,66 +0,0 @@
-From ad3d17fd1ffb41255af37cbacf0b3602627ece21 Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Fri, 3 May 2013 17:23:45 -0300
-Subject: drm/i915: set FORCE_ARB_IDLE_PLANES workaround
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Commit 1544d9d57396d5c0c6b7644ed5ae1f4d6caad07a added a workaround
-inside haswell_init_clock_gating and mentioned it is "a workaround for
-early silicon revisions and should be removed later". This workaround
-is documented in bit 31 of PRI_CTL. I asked Arthur and he mentioned
-that setting FORCE_ARB_IDLE_PLANES replaces that workaround for the
-newer machines. So use the new one.
-
-Also notice that there's still another workaround for PRI_CTL that
-involves WM_DBG, but it's not the one we're reverting. And notice that
-we were previously setting WM_DBG_DISALLOW_MULTIPIPE_LP which disables
-the LP watermarks when more than one pipe is used, and we really don't
-want this because we need the LP watermarks if we want to reach deeper
-PC states.
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-[danvet: Add a comment for the w/a name Ville dug out of Bspec.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 90a8864320b2a9f91e5b5d561924a4bb70b90dcc)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_reg.h |    3 +++
- drivers/gpu/drm/i915/intel_pm.c |   11 +++--------
- 2 files changed, 6 insertions(+), 8 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -3721,6 +3721,9 @@
- # define CHICKEN3_DGMG_REQ_OUT_FIX_DISABLE	(1 << 5)
- # define CHICKEN3_DGMG_DONE_FIX_DISABLE		(1 << 2)
- 
-+#define CHICKEN_PAR1_1		0x42080
-+#define  FORCE_ARB_IDLE_PLANES	(1 << 14)
-+
- #define DISP_ARB_CTL	0x45000
- #define  DISP_TILE_SURFACE_SWIZZLING	(1<<13)
- #define  DISP_FBC_WM_DIS		(1<<15)
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -4172,14 +4172,9 @@ static void haswell_init_clock_gating(st
- 	/* WaSwitchSolVfFArbitrationPriority:hsw */
- 	I915_WRITE(GAM_ECOCHK, I915_READ(GAM_ECOCHK) | HSW_ECOCHK_ARB_PRIO_SOL);
- 
--	/* XXX: This is a workaround for early silicon revisions and should be
--	 * removed later.
--	 */
--	I915_WRITE(WM_DBG,
--			I915_READ(WM_DBG) |
--			WM_DBG_DISALLOW_MULTIPLE_LP |
--			WM_DBG_DISALLOW_SPRITE |
--			WM_DBG_DISALLOW_MAXFIFO);
-+	/* WaRsPkgCStateDisplayPMReq:hsw */
-+	I915_WRITE(CHICKEN_PAR1_1,
-+		   I915_READ(CHICKEN_PAR1_1) | FORCE_ARB_IDLE_PLANES);
- 
- 	lpt_init_clock_gating(dev);
- }
diff --git a/patches.baytrail/0178-drm-i915-Be-more-informative-when-reporting-too-larg.patch b/patches.baytrail/0178-drm-i915-Be-more-informative-when-reporting-too-larg.patch
deleted file mode 100644
index ead49fa5bd216..0000000000000
--- a/patches.baytrail/0178-drm-i915-Be-more-informative-when-reporting-too-larg.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From c02628fc0cd3df67a39ce0ea2cb7dbfeaabbfd90 Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Tue, 21 May 2013 16:58:49 +0100
-Subject: drm/i915: Be more informative when reporting "too large for aperture"
- error
-
-This should help debugging the truly unexpected cases where it occurs -
-in particular to see which value is garbage.
-
-References: https://bugzilla.kernel.org/show_bug.cgi?id=58511
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-[danvet: s/%ld/%zd/ as spotted by Wu Fengguang's autobuilder.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit a36689cb771f06819c3fa8139c3d3716dfdf6d53)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem.c | 5 ++++-
- 1 file changed, 4 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index 34a1d71655a3..33de1ead1f5d 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -3007,7 +3007,10 @@ i915_gem_object_bind_to_gtt(struct drm_i915_gem_object *obj,
- 	 */
- 	if (obj->base.size >
- 	    (map_and_fenceable ? dev_priv->gtt.mappable_end : dev_priv->gtt.total)) {
--		DRM_ERROR("Attempting to bind an object larger than the aperture\n");
-+		DRM_ERROR("Attempting to bind an object larger than the aperture: object=%zd > %s aperture=%ld\n",
-+			  obj->base.size,
-+			  map_and_fenceable ? "mappable" : "total",
-+			  map_and_fenceable ? dev_priv->gtt.mappable_end : dev_priv->gtt.total);
- 		return -E2BIG;
- 	}
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0179-drm-i915-Fix-WARN_ON-on-UP-machines.patch b/patches.baytrail/0179-drm-i915-Fix-WARN_ON-on-UP-machines.patch
deleted file mode 100644
index 21e815351c7c4..0000000000000
--- a/patches.baytrail/0179-drm-i915-Fix-WARN_ON-on-UP-machines.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From c54aea2e14d56b49663106bc6bd97fc46e893937 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Wed, 22 May 2013 11:36:40 +0300
-Subject: drm/i915: Fix WARN_ON() on UP machines
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-WARN_ON(!spin_is_locked()) is not a good idea on a UP system w/o
-spinlock debugging. Use WARN_ON_SMP() instead.
-
-This check has been added in
-
-commit 8ba2d18520ce380cf572e9902d9b3b91ece6c2c0
-Author: Jani Nikula <jani.nikula@intel.com>
-Date:   Fri Apr 12 15:18:37 2013 +0300
-
-    drm/i915: protect backlight registers and data with a spinlock
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit df0a67979543e716d411eb11406848dcb50abd0a)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_panel.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
-index 8cae635bb90a..01b5a519c43c 100644
---- a/drivers/gpu/drm/i915/intel_panel.c
-+++ b/drivers/gpu/drm/i915/intel_panel.c
-@@ -332,7 +332,7 @@ static u32 i915_read_blc_pwm_ctl(struct drm_device *dev)
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	u32 val;
- 
--	WARN_ON(!spin_is_locked(&dev_priv->backlight.lock));
-+	WARN_ON_SMP(!spin_is_locked(&dev_priv->backlight.lock));
- 
- 	/* Restore the CTL value if it lost, e.g. GPU reset */
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0180-drm-i915-Workaround-incoherence-with-fence-updates-o.patch b/patches.baytrail/0180-drm-i915-Workaround-incoherence-with-fence-updates-o.patch
deleted file mode 100644
index 81129f1a92290..0000000000000
--- a/patches.baytrail/0180-drm-i915-Workaround-incoherence-with-fence-updates-o.patch
+++ /dev/null
@@ -1,101 +0,0 @@
-From 032d38bcda1684aac0ef54de8b6e9331735bd5f5 Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Wed, 22 May 2013 17:08:06 +0100
-Subject: drm/i915: Workaround incoherence with fence updates on Valleyview
-
-In commit 25ff1195f8a0b3724541ae7bbe331b4296de9c06
-Author: Chris Wilson <chris@chris-wilson.co.uk>
-Date:   Thu Apr 4 21:31:03 2013 +0100
-
-    drm/i915: Workaround incoherence between fences and LLC across multiple CPUs
-
-we introduced an empirical workaround for memory corruption when using
-fences from multiple CPUs. At the time, we did not have any results for
-Valleyview, so the presumption was that it was limited to recent
-generations using LLC. Now we have evidence that Valleyview also suffers
-incoherence and requires a similar but different workaround. For
-Valleyview, the wbinvd instruction is insufficient and we require the
-serialising register write per-CPU. Conversely, that serialising
-register write is not enough for SNB/IVB/HSW. To compromise and keep the
-code relatively clean, employ both serialisation techniques in the same
-workaround.
-
-Reported-by: Jon Bloomfield <jon.bloomfield@intel.com>
-Tested-by: Jon Bloomfield <jon.bloomfield@intel.com>
-Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=62191
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 2dc8aae06d53458dd3624dc0accd4f81100ee631)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem.c | 35 ++++++++++++++++++++++++++++-------
- 1 file changed, 28 insertions(+), 7 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index 33de1ead1f5d..229089c83f25 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -2725,18 +2725,33 @@ static inline int fence_number(struct drm_i915_private *dev_priv,
- 	return fence - dev_priv->fence_regs;
- }
- 
-+struct write_fence {
-+	struct drm_device *dev;
-+	struct drm_i915_gem_object *obj;
-+	int fence;
-+};
-+
- static void i915_gem_write_fence__ipi(void *data)
- {
-+	struct write_fence *args = data;
-+
-+	/* Required for SNB+ with LLC */
- 	wbinvd();
-+
-+	/* Required for VLV */
-+	i915_gem_write_fence(args->dev, args->fence, args->obj);
- }
- 
- static void i915_gem_object_update_fence(struct drm_i915_gem_object *obj,
- 					 struct drm_i915_fence_reg *fence,
- 					 bool enable)
- {
--	struct drm_device *dev = obj->base.dev;
--	struct drm_i915_private *dev_priv = dev->dev_private;
--	int fence_reg = fence_number(dev_priv, fence);
-+	struct drm_i915_private *dev_priv = obj->base.dev->dev_private;
-+	struct write_fence args = {
-+		.dev = obj->base.dev,
-+		.fence = fence_number(dev_priv, fence),
-+		.obj = enable ? obj : NULL,
-+	};
- 
- 	/* In order to fully serialize access to the fenced region and
- 	 * the update to the fence register we need to take extreme
-@@ -2747,13 +2762,19 @@ static void i915_gem_object_update_fence(struct drm_i915_gem_object *obj,
- 	 * SNB+ we need to take a step further and emit an explicit wbinvd()
- 	 * on each processor in order to manually flush all memory
- 	 * transactions before updating the fence register.
-+	 *
-+	 * However, Valleyview complicates matter. There the wbinvd is
-+	 * insufficient and unlike SNB/IVB requires the serialising
-+	 * register write. (Note that that register write by itself is
-+	 * conversely not sufficient for SNB+.) To compromise, we do both.
- 	 */
--	if (HAS_LLC(obj->base.dev))
--		on_each_cpu(i915_gem_write_fence__ipi, NULL, 1);
--	i915_gem_write_fence(dev, fence_reg, enable ? obj : NULL);
-+	if (INTEL_INFO(args.dev)->gen >= 6)
-+		on_each_cpu(i915_gem_write_fence__ipi, &args, 1);
-+	else
-+		i915_gem_write_fence(args.dev, args.fence, args.obj);
- 
- 	if (enable) {
--		obj->fence_reg = fence_reg;
-+		obj->fence_reg = args.fence;
- 		fence->obj = obj;
- 		list_move_tail(&fence->lru_list, &dev_priv->mm.fence_list);
- 	} else {
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0181-drm-i915-Cocci-spatch-memdup.spatch.patch b/patches.baytrail/0181-drm-i915-Cocci-spatch-memdup.spatch.patch
deleted file mode 100644
index 9af4e738f39fe..0000000000000
--- a/patches.baytrail/0181-drm-i915-Cocci-spatch-memdup.spatch.patch
+++ /dev/null
@@ -1,28 +0,0 @@
-From 2875f3868f69e8be973007bb5beba758e6ea215d Mon Sep 17 00:00:00 2001
-From: Thomas Meyer <thomas@m3y3r.de>
-Date: Wed, 22 May 2013 23:07:09 +0200
-Subject: drm/i915: Cocci spatch "memdup.spatch"
-
-Signed-off-by: Thomas Meyer <thomas@m3y3r.de>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit edbe1581c5f94f7fba39cd9a5b2facd624aab661)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_dp.c |    3 +--
- 1 file changed, 1 insertion(+), 2 deletions(-)
-
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -2547,11 +2547,10 @@ intel_dp_get_edid(struct drm_connector *
- 			return NULL;
- 
- 		size = (intel_connector->edid->extensions + 1) * EDID_LENGTH;
--		edid = kmalloc(size, GFP_KERNEL);
-+		edid = kmemdup(intel_connector->edid, size, GFP_KERNEL);
- 		if (!edid)
- 			return NULL;
- 
--		memcpy(edid, intel_connector->edid, size);
- 		return edid;
- 	}
- 
diff --git a/patches.baytrail/0182-drm-i915-avoid-big-kmallocs-on-reading-error-state.patch b/patches.baytrail/0182-drm-i915-avoid-big-kmallocs-on-reading-error-state.patch
deleted file mode 100644
index 16b52dbdba2b7..0000000000000
--- a/patches.baytrail/0182-drm-i915-avoid-big-kmallocs-on-reading-error-state.patch
+++ /dev/null
@@ -1,556 +0,0 @@
-From c92e8eb4241bddd30dceb7414cca1689b690dc53 Mon Sep 17 00:00:00 2001
-From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
-Date: Thu, 23 May 2013 13:55:35 +0300
-Subject: drm/i915: avoid big kmallocs on reading error state
-
-Sometimes when user is trying to get error state out from
-debugfs after gpu hang, the memory is low and/or fragmented
-enough that kmalloc in seq_file will fail.
-
-Prevent big kmalloc by avoiding seq_file and instead convert
-error state to string in smaller chunks.
-
-v2: better alloc flags, better truncate, correct
-locking, and error handling improvements (Chris Wilson)
-
-v3: printf annotations (Daniel Vetter)
-
-Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit edc3d8848dc9fe2a470316363dab8ef211d77e01)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_debugfs.c  |  242 ++++++++++++++++++++++++++---------
- drivers/gpu/drm/i915/i915_drv.h      |   16 ++
- drivers/gpu/drm/i915/intel_display.c |   52 +++----
- drivers/gpu/drm/i915/intel_overlay.c |   13 +
- 4 files changed, 231 insertions(+), 92 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_debugfs.c
-+++ b/drivers/gpu/drm/i915/i915_debugfs.c
-@@ -604,15 +604,80 @@ static const char *purgeable_flag(int pu
- 	return purgeable ? " purgeable" : "";
- }
- 
--static void print_error_buffers(struct seq_file *m,
-+static void i915_error_vprintf(struct drm_i915_error_state_buf *e,
-+			       const char *f, va_list args)
-+{
-+	unsigned len;
-+
-+	if (!e->err && WARN(e->bytes > (e->size - 1), "overflow")) {
-+		e->err = -ENOSPC;
-+		return;
-+	}
-+
-+	if (e->bytes == e->size - 1 || e->err)
-+		return;
-+
-+	/* Seek the first printf which is hits start position */
-+	if (e->pos < e->start) {
-+		len = vsnprintf(NULL, 0, f, args);
-+		if (e->pos + len <= e->start) {
-+			e->pos += len;
-+			return;
-+		}
-+
-+		/* First vsnprintf needs to fit in full for memmove*/
-+		if (len >= e->size) {
-+			e->err = -EIO;
-+			return;
-+		}
-+	}
-+
-+	len = vsnprintf(e->buf + e->bytes, e->size - e->bytes, f, args);
-+	if (len >= e->size - e->bytes)
-+		len = e->size - e->bytes - 1;
-+
-+	/* If this is first printf in this window, adjust it so that
-+	 * start position matches start of the buffer
-+	 */
-+	if (e->pos < e->start) {
-+		const size_t off = e->start - e->pos;
-+
-+		/* Should not happen but be paranoid */
-+		if (off > len || e->bytes) {
-+			e->err = -EIO;
-+			return;
-+		}
-+
-+		memmove(e->buf, e->buf + off, len - off);
-+		e->bytes = len - off;
-+		e->pos = e->start;
-+		return;
-+	}
-+
-+	e->bytes += len;
-+	e->pos += len;
-+}
-+
-+void i915_error_printf(struct drm_i915_error_state_buf *e, const char *f, ...)
-+{
-+	va_list args;
-+
-+	va_start(args, f);
-+	i915_error_vprintf(e, f, args);
-+	va_end(args);
-+}
-+
-+#define err_printf(e, ...) i915_error_printf(e, __VA_ARGS__)
-+
-+static void print_error_buffers(struct drm_i915_error_state_buf *m,
- 				const char *name,
- 				struct drm_i915_error_buffer *err,
- 				int count)
- {
--	seq_printf(m, "%s [%d]:\n", name, count);
-+	err_printf(m, "%s [%d]:\n", name, count);
- 
- 	while (count--) {
--		seq_printf(m, "  %08x %8u %02x %02x %x %x%s%s%s%s%s%s%s",
-+		err_printf(m, "  %08x %8u %02x %02x %x %x%s%s%s%s%s%s%s",
- 			   err->gtt_offset,
- 			   err->size,
- 			   err->read_domains,
-@@ -627,50 +692,50 @@ static void print_error_buffers(struct s
- 			   cache_level_str(err->cache_level));
- 
- 		if (err->name)
--			seq_printf(m, " (name: %d)", err->name);
-+			err_printf(m, " (name: %d)", err->name);
- 		if (err->fence_reg != I915_FENCE_REG_NONE)
--			seq_printf(m, " (fence: %d)", err->fence_reg);
-+			err_printf(m, " (fence: %d)", err->fence_reg);
- 
--		seq_printf(m, "\n");
-+		err_printf(m, "\n");
- 		err++;
- 	}
- }
- 
--static void i915_ring_error_state(struct seq_file *m,
-+static void i915_ring_error_state(struct drm_i915_error_state_buf *m,
- 				  struct drm_device *dev,
- 				  struct drm_i915_error_state *error,
- 				  unsigned ring)
- {
- 	BUG_ON(ring >= I915_NUM_RINGS); /* shut up confused gcc */
--	seq_printf(m, "%s command stream:\n", ring_str(ring));
--	seq_printf(m, "  HEAD: 0x%08x\n", error->head[ring]);
--	seq_printf(m, "  TAIL: 0x%08x\n", error->tail[ring]);
--	seq_printf(m, "  CTL: 0x%08x\n", error->ctl[ring]);
--	seq_printf(m, "  ACTHD: 0x%08x\n", error->acthd[ring]);
--	seq_printf(m, "  IPEIR: 0x%08x\n", error->ipeir[ring]);
--	seq_printf(m, "  IPEHR: 0x%08x\n", error->ipehr[ring]);
--	seq_printf(m, "  INSTDONE: 0x%08x\n", error->instdone[ring]);
-+	err_printf(m, "%s command stream:\n", ring_str(ring));
-+	err_printf(m, "  HEAD: 0x%08x\n", error->head[ring]);
-+	err_printf(m, "  TAIL: 0x%08x\n", error->tail[ring]);
-+	err_printf(m, "  CTL: 0x%08x\n", error->ctl[ring]);
-+	err_printf(m, "  ACTHD: 0x%08x\n", error->acthd[ring]);
-+	err_printf(m, "  IPEIR: 0x%08x\n", error->ipeir[ring]);
-+	err_printf(m, "  IPEHR: 0x%08x\n", error->ipehr[ring]);
-+	err_printf(m, "  INSTDONE: 0x%08x\n", error->instdone[ring]);
- 	if (ring == RCS && INTEL_INFO(dev)->gen >= 4)
--		seq_printf(m, "  BBADDR: 0x%08llx\n", error->bbaddr);
-+		err_printf(m, "  BBADDR: 0x%08llx\n", error->bbaddr);
- 
- 	if (INTEL_INFO(dev)->gen >= 4)
--		seq_printf(m, "  INSTPS: 0x%08x\n", error->instps[ring]);
--	seq_printf(m, "  INSTPM: 0x%08x\n", error->instpm[ring]);
--	seq_printf(m, "  FADDR: 0x%08x\n", error->faddr[ring]);
-+		err_printf(m, "  INSTPS: 0x%08x\n", error->instps[ring]);
-+	err_printf(m, "  INSTPM: 0x%08x\n", error->instpm[ring]);
-+	err_printf(m, "  FADDR: 0x%08x\n", error->faddr[ring]);
- 	if (INTEL_INFO(dev)->gen >= 6) {
--		seq_printf(m, "  RC PSMI: 0x%08x\n", error->rc_psmi[ring]);
--		seq_printf(m, "  FAULT_REG: 0x%08x\n", error->fault_reg[ring]);
--		seq_printf(m, "  SYNC_0: 0x%08x [last synced 0x%08x]\n",
-+		err_printf(m, "  RC PSMI: 0x%08x\n", error->rc_psmi[ring]);
-+		err_printf(m, "  FAULT_REG: 0x%08x\n", error->fault_reg[ring]);
-+		err_printf(m, "  SYNC_0: 0x%08x [last synced 0x%08x]\n",
- 			   error->semaphore_mboxes[ring][0],
- 			   error->semaphore_seqno[ring][0]);
--		seq_printf(m, "  SYNC_1: 0x%08x [last synced 0x%08x]\n",
-+		err_printf(m, "  SYNC_1: 0x%08x [last synced 0x%08x]\n",
- 			   error->semaphore_mboxes[ring][1],
- 			   error->semaphore_seqno[ring][1]);
- 	}
--	seq_printf(m, "  seqno: 0x%08x\n", error->seqno[ring]);
--	seq_printf(m, "  waiting: %s\n", yesno(error->waiting[ring]));
--	seq_printf(m, "  ring->head: 0x%08x\n", error->cpu_ring_head[ring]);
--	seq_printf(m, "  ring->tail: 0x%08x\n", error->cpu_ring_tail[ring]);
-+	err_printf(m, "  seqno: 0x%08x\n", error->seqno[ring]);
-+	err_printf(m, "  waiting: %s\n", yesno(error->waiting[ring]));
-+	err_printf(m, "  ring->head: 0x%08x\n", error->cpu_ring_head[ring]);
-+	err_printf(m, "  ring->tail: 0x%08x\n", error->cpu_ring_tail[ring]);
- }
- 
- struct i915_error_state_file_priv {
-@@ -678,9 +743,11 @@ struct i915_error_state_file_priv {
- 	struct drm_i915_error_state *error;
- };
- 
--static int i915_error_state(struct seq_file *m, void *unused)
-+
-+static int i915_error_state(struct i915_error_state_file_priv *error_priv,
-+			    struct drm_i915_error_state_buf *m)
-+
- {
--	struct i915_error_state_file_priv *error_priv = m->private;
- 	struct drm_device *dev = error_priv->dev;
- 	drm_i915_private_t *dev_priv = dev->dev_private;
- 	struct drm_i915_error_state *error = error_priv->error;
-@@ -688,34 +755,35 @@ static int i915_error_state(struct seq_f
- 	int i, j, page, offset, elt;
- 
- 	if (!error) {
--		seq_printf(m, "no error state collected\n");
-+		err_printf(m, "no error state collected\n");
- 		return 0;
- 	}
- 
--	seq_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec,
-+	err_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec,
- 		   error->time.tv_usec);
--	seq_printf(m, "Kernel: " UTS_RELEASE "\n");
--	seq_printf(m, "PCI ID: 0x%04x\n", dev->pci_device);
--	seq_printf(m, "EIR: 0x%08x\n", error->eir);
--	seq_printf(m, "IER: 0x%08x\n", error->ier);
--	seq_printf(m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er);
--	seq_printf(m, "FORCEWAKE: 0x%08x\n", error->forcewake);
--	seq_printf(m, "DERRMR: 0x%08x\n", error->derrmr);
--	seq_printf(m, "CCID: 0x%08x\n", error->ccid);
-+	err_printf(m, "Kernel: " UTS_RELEASE "\n");
-+	err_printf(m, "PCI ID: 0x%04x\n", dev->pci_device);
-+	err_printf(m, "EIR: 0x%08x\n", error->eir);
-+	err_printf(m, "IER: 0x%08x\n", error->ier);
-+	err_printf(m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er);
-+	err_printf(m, "FORCEWAKE: 0x%08x\n", error->forcewake);
-+	err_printf(m, "DERRMR: 0x%08x\n", error->derrmr);
-+	err_printf(m, "CCID: 0x%08x\n", error->ccid);
- 
- 	for (i = 0; i < dev_priv->num_fence_regs; i++)
--		seq_printf(m, "  fence[%d] = %08llx\n", i, error->fence[i]);
-+		err_printf(m, "  fence[%d] = %08llx\n", i, error->fence[i]);
- 
- 	for (i = 0; i < ARRAY_SIZE(error->extra_instdone); i++)
--		seq_printf(m, "  INSTDONE_%d: 0x%08x\n", i, error->extra_instdone[i]);
-+		err_printf(m, "  INSTDONE_%d: 0x%08x\n", i,
-+			   error->extra_instdone[i]);
- 
- 	if (INTEL_INFO(dev)->gen >= 6) {
--		seq_printf(m, "ERROR: 0x%08x\n", error->error);
--		seq_printf(m, "DONE_REG: 0x%08x\n", error->done_reg);
-+		err_printf(m, "ERROR: 0x%08x\n", error->error);
-+		err_printf(m, "DONE_REG: 0x%08x\n", error->done_reg);
- 	}
- 
- 	if (INTEL_INFO(dev)->gen == 7)
--		seq_printf(m, "ERR_INT: 0x%08x\n", error->err_int);
-+		err_printf(m, "ERR_INT: 0x%08x\n", error->err_int);
- 
- 	for_each_ring(ring, dev_priv, i)
- 		i915_ring_error_state(m, dev, error, i);
-@@ -734,24 +802,25 @@ static int i915_error_state(struct seq_f
- 		struct drm_i915_error_object *obj;
- 
- 		if ((obj = error->ring[i].batchbuffer)) {
--			seq_printf(m, "%s --- gtt_offset = 0x%08x\n",
-+			err_printf(m, "%s --- gtt_offset = 0x%08x\n",
- 				   dev_priv->ring[i].name,
- 				   obj->gtt_offset);
- 			offset = 0;
- 			for (page = 0; page < obj->page_count; page++) {
- 				for (elt = 0; elt < PAGE_SIZE/4; elt++) {
--					seq_printf(m, "%08x :  %08x\n", offset, obj->pages[page][elt]);
-+					err_printf(m, "%08x :  %08x\n", offset,
-+						   obj->pages[page][elt]);
- 					offset += 4;
- 				}
- 			}
- 		}
- 
- 		if (error->ring[i].num_requests) {
--			seq_printf(m, "%s --- %d requests\n",
-+			err_printf(m, "%s --- %d requests\n",
- 				   dev_priv->ring[i].name,
- 				   error->ring[i].num_requests);
- 			for (j = 0; j < error->ring[i].num_requests; j++) {
--				seq_printf(m, "  seqno 0x%08x, emitted %ld, tail 0x%08x\n",
-+				err_printf(m, "  seqno 0x%08x, emitted %ld, tail 0x%08x\n",
- 					   error->ring[i].requests[j].seqno,
- 					   error->ring[i].requests[j].jiffies,
- 					   error->ring[i].requests[j].tail);
-@@ -759,13 +828,13 @@ static int i915_error_state(struct seq_f
- 		}
- 
- 		if ((obj = error->ring[i].ringbuffer)) {
--			seq_printf(m, "%s --- ringbuffer = 0x%08x\n",
-+			err_printf(m, "%s --- ringbuffer = 0x%08x\n",
- 				   dev_priv->ring[i].name,
- 				   obj->gtt_offset);
- 			offset = 0;
- 			for (page = 0; page < obj->page_count; page++) {
- 				for (elt = 0; elt < PAGE_SIZE/4; elt++) {
--					seq_printf(m, "%08x :  %08x\n",
-+					err_printf(m, "%08x :  %08x\n",
- 						   offset,
- 						   obj->pages[page][elt]);
- 					offset += 4;
-@@ -775,12 +844,12 @@ static int i915_error_state(struct seq_f
- 
- 		obj = error->ring[i].ctx;
- 		if (obj) {
--			seq_printf(m, "%s --- HW Context = 0x%08x\n",
-+			err_printf(m, "%s --- HW Context = 0x%08x\n",
- 				   dev_priv->ring[i].name,
- 				   obj->gtt_offset);
- 			offset = 0;
- 			for (elt = 0; elt < PAGE_SIZE/16; elt += 4) {
--				seq_printf(m, "[%04x] %08x %08x %08x %08x\n",
-+				err_printf(m, "[%04x] %08x %08x %08x %08x\n",
- 					   offset,
- 					   obj->pages[0][elt],
- 					   obj->pages[0][elt+1],
-@@ -806,8 +875,7 @@ i915_error_state_write(struct file *filp
- 		       size_t cnt,
- 		       loff_t *ppos)
- {
--	struct seq_file *m = filp->private_data;
--	struct i915_error_state_file_priv *error_priv = m->private;
-+	struct i915_error_state_file_priv *error_priv = filp->private_data;
- 	struct drm_device *dev = error_priv->dev;
- 	int ret;
- 
-@@ -842,25 +910,81 @@ static int i915_error_state_open(struct
- 		kref_get(&error_priv->error->ref);
- 	spin_unlock_irqrestore(&dev_priv->gpu_error.lock, flags);
- 
--	return single_open(file, i915_error_state, error_priv);
-+	file->private_data = error_priv;
-+
-+	return 0;
- }
- 
- static int i915_error_state_release(struct inode *inode, struct file *file)
- {
--	struct seq_file *m = file->private_data;
--	struct i915_error_state_file_priv *error_priv = m->private;
-+	struct i915_error_state_file_priv *error_priv = file->private_data;
- 
- 	if (error_priv->error)
- 		kref_put(&error_priv->error->ref, i915_error_state_free);
- 	kfree(error_priv);
- 
--	return single_release(inode, file);
-+	return 0;
-+}
-+
-+static ssize_t i915_error_state_read(struct file *file, char __user *userbuf,
-+				     size_t count, loff_t *pos)
-+{
-+	struct i915_error_state_file_priv *error_priv = file->private_data;
-+	struct drm_i915_error_state_buf error_str;
-+	loff_t tmp_pos = 0;
-+	ssize_t ret_count = 0;
-+	int ret = 0;
-+
-+	memset(&error_str, 0, sizeof(error_str));
-+
-+	/* We need to have enough room to store any i915_error_state printf
-+	 * so that we can move it to start position.
-+	 */
-+	error_str.size = count + 1 > PAGE_SIZE ? count + 1 : PAGE_SIZE;
-+	error_str.buf = kmalloc(error_str.size,
-+				GFP_TEMPORARY | __GFP_NORETRY | __GFP_NOWARN);
-+
-+	if (error_str.buf == NULL) {
-+		error_str.size = PAGE_SIZE;
-+		error_str.buf = kmalloc(error_str.size, GFP_TEMPORARY);
-+	}
-+
-+	if (error_str.buf == NULL) {
-+		error_str.size = 128;
-+		error_str.buf = kmalloc(error_str.size, GFP_TEMPORARY);
-+	}
-+
-+	if (error_str.buf == NULL)
-+		return -ENOMEM;
-+
-+	error_str.start = *pos;
-+
-+	ret = i915_error_state(error_priv, &error_str);
-+	if (ret)
-+		goto out;
-+
-+	if (error_str.bytes == 0 && error_str.err) {
-+		ret = error_str.err;
-+		goto out;
-+	}
-+
-+	ret_count = simple_read_from_buffer(userbuf, count, &tmp_pos,
-+					    error_str.buf,
-+					    error_str.bytes);
-+
-+	if (ret_count < 0)
-+		ret = ret_count;
-+	else
-+		*pos = error_str.start + ret_count;
-+out:
-+	kfree(error_str.buf);
-+	return ret ?: ret_count;
- }
- 
- static const struct file_operations i915_error_state_fops = {
- 	.owner = THIS_MODULE,
- 	.open = i915_error_state_open,
--	.read = seq_read,
-+	.read = i915_error_state_read,
- 	.write = i915_error_state_write,
- 	.llseek = default_llseek,
- 	.release = i915_error_state_release,
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -827,6 +827,15 @@ struct i915_gem_mm {
- 	u32 object_count;
- };
- 
-+struct drm_i915_error_state_buf {
-+	unsigned bytes;
-+	unsigned size;
-+	int err;
-+	u8 *buf;
-+	loff_t start;
-+	loff_t pos;
-+};
-+
- struct i915_gpu_error {
- 	/* For hangcheck timer */
- #define DRM_I915_HANGCHECK_PERIOD 1500 /* in ms */
-@@ -1822,6 +1831,8 @@ void i915_gem_dump_object(struct drm_i91
- /* i915_debugfs.c */
- int i915_debugfs_init(struct drm_minor *minor);
- void i915_debugfs_cleanup(struct drm_minor *minor);
-+__printf(2, 3)
-+void i915_error_printf(struct drm_i915_error_state_buf *e, const char *f, ...);
- 
- /* i915_suspend.c */
- extern int i915_save_state(struct drm_device *dev);
-@@ -1903,10 +1914,11 @@ int i915_reg_read_ioctl(struct drm_devic
- /* overlay */
- #ifdef CONFIG_DEBUG_FS
- extern struct intel_overlay_error_state *intel_overlay_capture_error_state(struct drm_device *dev);
--extern void intel_overlay_print_error_state(struct seq_file *m, struct intel_overlay_error_state *error);
-+extern void intel_overlay_print_error_state(struct drm_i915_error_state_buf *e,
-+					    struct intel_overlay_error_state *error);
- 
- extern struct intel_display_error_state *intel_display_capture_error_state(struct drm_device *dev);
--extern void intel_display_print_error_state(struct seq_file *m,
-+extern void intel_display_print_error_state(struct drm_i915_error_state_buf *e,
- 					    struct drm_device *dev,
- 					    struct intel_display_error_state *error);
- #endif
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -9908,48 +9908,50 @@ intel_display_capture_error_state(struct
- 	return error;
- }
- 
-+#define err_printf(e, ...) i915_error_printf(e, __VA_ARGS__)
-+
- void
--intel_display_print_error_state(struct seq_file *m,
-+intel_display_print_error_state(struct drm_i915_error_state_buf *m,
- 				struct drm_device *dev,
- 				struct intel_display_error_state *error)
- {
- 	int i;
- 
--	seq_printf(m, "Num Pipes: %d\n", INTEL_INFO(dev)->num_pipes);
-+	err_printf(m, "Num Pipes: %d\n", INTEL_INFO(dev)->num_pipes);
- 	if (HAS_POWER_WELL(dev))
--		seq_printf(m, "PWR_WELL_CTL2: %08x\n",
-+		err_printf(m, "PWR_WELL_CTL2: %08x\n",
- 			   error->power_well_driver);
- 	for_each_pipe(i) {
--		seq_printf(m, "Pipe [%d]:\n", i);
--		seq_printf(m, "  CPU transcoder: %c\n",
-+		err_printf(m, "Pipe [%d]:\n", i);
-+		err_printf(m, "  CPU transcoder: %c\n",
- 			   transcoder_name(error->pipe[i].cpu_transcoder));
--		seq_printf(m, "  CONF: %08x\n", error->pipe[i].conf);
--		seq_printf(m, "  SRC: %08x\n", error->pipe[i].source);
--		seq_printf(m, "  HTOTAL: %08x\n", error->pipe[i].htotal);
--		seq_printf(m, "  HBLANK: %08x\n", error->pipe[i].hblank);
--		seq_printf(m, "  HSYNC: %08x\n", error->pipe[i].hsync);
--		seq_printf(m, "  VTOTAL: %08x\n", error->pipe[i].vtotal);
--		seq_printf(m, "  VBLANK: %08x\n", error->pipe[i].vblank);
--		seq_printf(m, "  VSYNC: %08x\n", error->pipe[i].vsync);
-+		err_printf(m, "  CONF: %08x\n", error->pipe[i].conf);
-+		err_printf(m, "  SRC: %08x\n", error->pipe[i].source);
-+		err_printf(m, "  HTOTAL: %08x\n", error->pipe[i].htotal);
-+		err_printf(m, "  HBLANK: %08x\n", error->pipe[i].hblank);
-+		err_printf(m, "  HSYNC: %08x\n", error->pipe[i].hsync);
-+		err_printf(m, "  VTOTAL: %08x\n", error->pipe[i].vtotal);
-+		err_printf(m, "  VBLANK: %08x\n", error->pipe[i].vblank);
-+		err_printf(m, "  VSYNC: %08x\n", error->pipe[i].vsync);
- 
--		seq_printf(m, "Plane [%d]:\n", i);
--		seq_printf(m, "  CNTR: %08x\n", error->plane[i].control);
--		seq_printf(m, "  STRIDE: %08x\n", error->plane[i].stride);
-+		err_printf(m, "Plane [%d]:\n", i);
-+		err_printf(m, "  CNTR: %08x\n", error->plane[i].control);
-+		err_printf(m, "  STRIDE: %08x\n", error->plane[i].stride);
- 		if (INTEL_INFO(dev)->gen <= 3) {
--			seq_printf(m, "  SIZE: %08x\n", error->plane[i].size);
--			seq_printf(m, "  POS: %08x\n", error->plane[i].pos);
-+			err_printf(m, "  SIZE: %08x\n", error->plane[i].size);
-+			err_printf(m, "  POS: %08x\n", error->plane[i].pos);
- 		}
- 		if (INTEL_INFO(dev)->gen <= 7 && !IS_HASWELL(dev))
--			seq_printf(m, "  ADDR: %08x\n", error->plane[i].addr);
-+			err_printf(m, "  ADDR: %08x\n", error->plane[i].addr);
- 		if (INTEL_INFO(dev)->gen >= 4) {
--			seq_printf(m, "  SURF: %08x\n", error->plane[i].surface);
--			seq_printf(m, "  TILEOFF: %08x\n", error->plane[i].tile_offset);
-+			err_printf(m, "  SURF: %08x\n", error->plane[i].surface);
-+			err_printf(m, "  TILEOFF: %08x\n", error->plane[i].tile_offset);
- 		}
- 
--		seq_printf(m, "Cursor [%d]:\n", i);
--		seq_printf(m, "  CNTR: %08x\n", error->cursor[i].control);
--		seq_printf(m, "  POS: %08x\n", error->cursor[i].position);
--		seq_printf(m, "  BASE: %08x\n", error->cursor[i].base);
-+		err_printf(m, "Cursor [%d]:\n", i);
-+		err_printf(m, "  CNTR: %08x\n", error->cursor[i].control);
-+		err_printf(m, "  POS: %08x\n", error->cursor[i].position);
-+		err_printf(m, "  BASE: %08x\n", error->cursor[i].base);
- 	}
- }
- #endif
---- a/drivers/gpu/drm/i915/intel_overlay.c
-+++ b/drivers/gpu/drm/i915/intel_overlay.c
-@@ -1485,14 +1485,15 @@ err:
- }
- 
- void
--intel_overlay_print_error_state(struct seq_file *m, struct intel_overlay_error_state *error)
-+intel_overlay_print_error_state(struct drm_i915_error_state_buf *m,
-+				struct intel_overlay_error_state *error)
- {
--	seq_printf(m, "Overlay, status: 0x%08x, interrupt: 0x%08x\n",
--		   error->dovsta, error->isr);
--	seq_printf(m, "  Register file at 0x%08lx:\n",
--		   error->base);
-+	i915_error_printf(m, "Overlay, status: 0x%08x, interrupt: 0x%08x\n",
-+			  error->dovsta, error->isr);
-+	i915_error_printf(m, "  Register file at 0x%08lx:\n",
-+			  error->base);
- 
--#define P(x) seq_printf(m, "    " #x ":	0x%08x\n", error->regs.x)
-+#define P(x) i915_error_printf(m, "    " #x ":	0x%08x\n", error->regs.x)
- 	P(OBUF_0Y);
- 	P(OBUF_1Y);
- 	P(OBUF_0U);
diff --git a/patches.baytrail/0183-drm-i915-group-sideband-register-accessors-to-a-new-.patch b/patches.baytrail/0183-drm-i915-group-sideband-register-accessors-to-a-new-.patch
deleted file mode 100644
index ee647e663fdff..0000000000000
--- a/patches.baytrail/0183-drm-i915-group-sideband-register-accessors-to-a-new-.patch
+++ /dev/null
@@ -1,453 +0,0 @@
-From 4ac209b0e285a218e0058390f2e31bae8bc04831 Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Wed, 22 May 2013 15:36:16 +0300
-Subject: drm/i915: group sideband register accessors to a new file
-
-Group both the HSW/LPT SBI interface and VLV IOSF sideband register
-accessor functions into a new file. No functional changes.
-
-v2: also move intel_sbi_{read,write} (Daniel)
-
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 59de08136f0c8d91bfd607d03cf722c5b6c60d1b)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/Makefile         |   1 +
- drivers/gpu/drm/i915/i915_drv.h       |   8 ++
- drivers/gpu/drm/i915/intel_display.c  |  98 ------------------
- drivers/gpu/drm/i915/intel_drv.h      |   4 -
- drivers/gpu/drm/i915/intel_pm.c       |  60 -----------
- drivers/gpu/drm/i915/intel_sideband.c | 183 ++++++++++++++++++++++++++++++++++
- 6 files changed, 192 insertions(+), 162 deletions(-)
- create mode 100644 drivers/gpu/drm/i915/intel_sideband.c
-
-diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
-index 91f3ac6cef35..40034ecefd3b 100644
---- a/drivers/gpu/drm/i915/Makefile
-+++ b/drivers/gpu/drm/i915/Makefile
-@@ -36,6 +36,7 @@ i915-y := i915_drv.o i915_dma.o i915_irq.o \
- 	  intel_overlay.o \
- 	  intel_sprite.o \
- 	  intel_opregion.o \
-+	  intel_sideband.o \
- 	  dvo_ch7xxx.o \
- 	  dvo_ch7017.o \
- 	  dvo_ivch.o \
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index e8c1ffbc9db3..0243cb0b2dee 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1933,9 +1933,17 @@ int __gen6_gt_wait_for_fifo(struct drm_i915_private *dev_priv);
- 
- int sandybridge_pcode_read(struct drm_i915_private *dev_priv, u8 mbox, u32 *val);
- int sandybridge_pcode_write(struct drm_i915_private *dev_priv, u8 mbox, u32 val);
-+
-+/* intel_sideband.c */
- int valleyview_punit_read(struct drm_i915_private *dev_priv, u8 addr, u32 *val);
- int valleyview_punit_write(struct drm_i915_private *dev_priv, u8 addr, u32 val);
- int valleyview_nc_read(struct drm_i915_private *dev_priv, u8 addr, u32 *val);
-+u32 intel_dpio_read(struct drm_i915_private *dev_priv, int reg);
-+void intel_dpio_write(struct drm_i915_private *dev_priv, int reg, u32 val);
-+u32 intel_sbi_read(struct drm_i915_private *dev_priv, u16 reg,
-+		   enum intel_sbi_destination destination);
-+void intel_sbi_write(struct drm_i915_private *dev_priv, u16 reg, u32 value,
-+		     enum intel_sbi_destination destination);
- 
- int vlv_gpu_freq(int ddr_freq, int val);
- int vlv_freq_opcode(int ddr_freq, int val);
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 121fc5d31c7d..613629ee81d9 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -381,43 +381,6 @@ static const intel_limit_t intel_limits_vlv_dp = {
- 	.find_pll = intel_vlv_find_best_pll,
- };
- 
--u32 intel_dpio_read(struct drm_i915_private *dev_priv, int reg)
--{
--	WARN_ON(!mutex_is_locked(&dev_priv->dpio_lock));
--
--	if (wait_for_atomic_us((I915_READ(DPIO_PKT) & DPIO_BUSY) == 0, 100)) {
--		DRM_ERROR("DPIO idle wait timed out\n");
--		return 0;
--	}
--
--	I915_WRITE(DPIO_REG, reg);
--	I915_WRITE(DPIO_PKT, DPIO_RID | DPIO_OP_READ | DPIO_PORTID |
--		   DPIO_BYTE);
--	if (wait_for_atomic_us((I915_READ(DPIO_PKT) & DPIO_BUSY) == 0, 100)) {
--		DRM_ERROR("DPIO read wait timed out\n");
--		return 0;
--	}
--
--	return I915_READ(DPIO_DATA);
--}
--
--void intel_dpio_write(struct drm_i915_private *dev_priv, int reg, u32 val)
--{
--	WARN_ON(!mutex_is_locked(&dev_priv->dpio_lock));
--
--	if (wait_for_atomic_us((I915_READ(DPIO_PKT) & DPIO_BUSY) == 0, 100)) {
--		DRM_ERROR("DPIO idle wait timed out\n");
--		return;
--	}
--
--	I915_WRITE(DPIO_DATA, val);
--	I915_WRITE(DPIO_REG, reg);
--	I915_WRITE(DPIO_PKT, DPIO_RID | DPIO_OP_WRITE | DPIO_PORTID |
--		   DPIO_BYTE);
--	if (wait_for_atomic_us((I915_READ(DPIO_PKT) & DPIO_BUSY) == 0, 100))
--		DRM_ERROR("DPIO write wait timed out\n");
--}
--
- static const intel_limit_t *intel_ironlake_limit(struct drm_crtc *crtc,
- 						int refclk)
- {
-@@ -1404,67 +1367,6 @@ static void intel_disable_pll(struct drm_i915_private *dev_priv, enum pipe pipe)
- 	POSTING_READ(reg);
- }
- 
--/* SBI access */
--static void
--intel_sbi_write(struct drm_i915_private *dev_priv, u16 reg, u32 value,
--		enum intel_sbi_destination destination)
--{
--	u32 tmp;
--
--	WARN_ON(!mutex_is_locked(&dev_priv->dpio_lock));
--
--	if (wait_for((I915_READ(SBI_CTL_STAT) & SBI_BUSY) == 0,
--				100)) {
--		DRM_ERROR("timeout waiting for SBI to become ready\n");
--		return;
--	}
--
--	I915_WRITE(SBI_ADDR, (reg << 16));
--	I915_WRITE(SBI_DATA, value);
--
--	if (destination == SBI_ICLK)
--		tmp = SBI_CTL_DEST_ICLK | SBI_CTL_OP_CRWR;
--	else
--		tmp = SBI_CTL_DEST_MPHY | SBI_CTL_OP_IOWR;
--	I915_WRITE(SBI_CTL_STAT, SBI_BUSY | tmp);
--
--	if (wait_for((I915_READ(SBI_CTL_STAT) & (SBI_BUSY | SBI_RESPONSE_FAIL)) == 0,
--				100)) {
--		DRM_ERROR("timeout waiting for SBI to complete write transaction\n");
--		return;
--	}
--}
--
--static u32
--intel_sbi_read(struct drm_i915_private *dev_priv, u16 reg,
--	       enum intel_sbi_destination destination)
--{
--	u32 value = 0;
--	WARN_ON(!mutex_is_locked(&dev_priv->dpio_lock));
--
--	if (wait_for((I915_READ(SBI_CTL_STAT) & SBI_BUSY) == 0,
--				100)) {
--		DRM_ERROR("timeout waiting for SBI to become ready\n");
--		return 0;
--	}
--
--	I915_WRITE(SBI_ADDR, (reg << 16));
--
--	if (destination == SBI_ICLK)
--		value = SBI_CTL_DEST_ICLK | SBI_CTL_OP_CRRD;
--	else
--		value = SBI_CTL_DEST_MPHY | SBI_CTL_OP_IORD;
--	I915_WRITE(SBI_CTL_STAT, value | SBI_BUSY);
--
--	if (wait_for((I915_READ(SBI_CTL_STAT) & (SBI_BUSY | SBI_RESPONSE_FAIL)) == 0,
--				100)) {
--		DRM_ERROR("timeout waiting for SBI to complete read transaction\n");
--		return 0;
--	}
--
--	return I915_READ(SBI_DATA);
--}
--
- void vlv_wait_port_ready(struct drm_i915_private *dev_priv, int port)
- {
- 	u32 port_mask;
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index a5ba33bb6c0d..928368a93f74 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -743,10 +743,6 @@ extern int intel_sprite_set_colorkey(struct drm_device *dev, void *data,
- extern int intel_sprite_get_colorkey(struct drm_device *dev, void *data,
- 				     struct drm_file *file_priv);
- 
--extern u32 intel_dpio_read(struct drm_i915_private *dev_priv, int reg);
--extern void intel_dpio_write(struct drm_i915_private *dev_priv, int reg,
--			     u32 val);
--
- /* Power-related functions, located in intel_pm.c */
- extern void intel_init_pm(struct drm_device *dev);
- /* FBC */
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index f016998ca83c..1b884359662a 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -4991,66 +4991,6 @@ int sandybridge_pcode_write(struct drm_i915_private *dev_priv, u8 mbox, u32 val)
- 	return 0;
- }
- 
--static int vlv_punit_rw(struct drm_i915_private *dev_priv, u32 port, u8 opcode,
--			u8 addr, u32 *val)
--{
--	u32 cmd, devfn, be, bar;
--
--	bar = 0;
--	be = 0xf;
--	devfn = PCI_DEVFN(2, 0);
--
--	cmd = (devfn << IOSF_DEVFN_SHIFT) | (opcode << IOSF_OPCODE_SHIFT) |
--		(port << IOSF_PORT_SHIFT) | (be << IOSF_BYTE_ENABLES_SHIFT) |
--		(bar << IOSF_BAR_SHIFT);
--
--	WARN_ON(!mutex_is_locked(&dev_priv->rps.hw_lock));
--
--	if (I915_READ(VLV_IOSF_DOORBELL_REQ) & IOSF_SB_BUSY) {
--		DRM_DEBUG_DRIVER("warning: pcode (%s) mailbox access failed\n",
--				 opcode == PUNIT_OPCODE_REG_READ ?
--				 "read" : "write");
--		return -EAGAIN;
--	}
--
--	I915_WRITE(VLV_IOSF_ADDR, addr);
--	if (opcode == PUNIT_OPCODE_REG_WRITE)
--		I915_WRITE(VLV_IOSF_DATA, *val);
--	I915_WRITE(VLV_IOSF_DOORBELL_REQ, cmd);
--
--	if (wait_for((I915_READ(VLV_IOSF_DOORBELL_REQ) & IOSF_SB_BUSY) == 0,
--		     5)) {
--		DRM_ERROR("timeout waiting for pcode %s (%d) to finish\n",
--			  opcode == PUNIT_OPCODE_REG_READ ? "read" : "write",
--			  addr);
--		return -ETIMEDOUT;
--	}
--
--	if (opcode == PUNIT_OPCODE_REG_READ)
--		*val = I915_READ(VLV_IOSF_DATA);
--	I915_WRITE(VLV_IOSF_DATA, 0);
--
--	return 0;
--}
--
--int valleyview_punit_read(struct drm_i915_private *dev_priv, u8 addr, u32 *val)
--{
--	return vlv_punit_rw(dev_priv, IOSF_PORT_PUNIT, PUNIT_OPCODE_REG_READ,
--			    addr, val);
--}
--
--int valleyview_punit_write(struct drm_i915_private *dev_priv, u8 addr, u32 val)
--{
--	return vlv_punit_rw(dev_priv, IOSF_PORT_PUNIT, PUNIT_OPCODE_REG_WRITE,
--			    addr, &val);
--}
--
--int valleyview_nc_read(struct drm_i915_private *dev_priv, u8 addr, u32 *val)
--{
--	return vlv_punit_rw(dev_priv, IOSF_PORT_NC, PUNIT_OPCODE_REG_READ,
--			    addr, val);
--}
--
- int vlv_gpu_freq(int ddr_freq, int val)
- {
- 	int mult, base;
-diff --git a/drivers/gpu/drm/i915/intel_sideband.c b/drivers/gpu/drm/i915/intel_sideband.c
-new file mode 100644
-index 000000000000..81af8857857d
---- /dev/null
-+++ b/drivers/gpu/drm/i915/intel_sideband.c
-@@ -0,0 +1,183 @@
-+/*
-+ * Copyright © 2013 Intel Corporation
-+ *
-+ * Permission is hereby granted, free of charge, to any person obtaining a
-+ * copy of this software and associated documentation files (the "Software"),
-+ * to deal in the Software without restriction, including without limitation
-+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
-+ * and/or sell copies of the Software, and to permit persons to whom the
-+ * Software is furnished to do so, subject to the following conditions:
-+ *
-+ * The above copyright notice and this permission notice (including the next
-+ * paragraph) shall be included in all copies or substantial portions of the
-+ * Software.
-+ *
-+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
-+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
-+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
-+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
-+ * IN THE SOFTWARE.
-+ *
-+ */
-+
-+#include "i915_drv.h"
-+#include "intel_drv.h"
-+
-+/* IOSF sideband */
-+static int vlv_punit_rw(struct drm_i915_private *dev_priv, u32 port, u8 opcode,
-+			u8 addr, u32 *val)
-+{
-+	u32 cmd, devfn, be, bar;
-+
-+	bar = 0;
-+	be = 0xf;
-+	devfn = PCI_DEVFN(2, 0);
-+
-+	cmd = (devfn << IOSF_DEVFN_SHIFT) | (opcode << IOSF_OPCODE_SHIFT) |
-+		(port << IOSF_PORT_SHIFT) | (be << IOSF_BYTE_ENABLES_SHIFT) |
-+		(bar << IOSF_BAR_SHIFT);
-+
-+	WARN_ON(!mutex_is_locked(&dev_priv->rps.hw_lock));
-+
-+	if (I915_READ(VLV_IOSF_DOORBELL_REQ) & IOSF_SB_BUSY) {
-+		DRM_DEBUG_DRIVER("warning: pcode (%s) mailbox access failed\n",
-+				 opcode == PUNIT_OPCODE_REG_READ ?
-+				 "read" : "write");
-+		return -EAGAIN;
-+	}
-+
-+	I915_WRITE(VLV_IOSF_ADDR, addr);
-+	if (opcode == PUNIT_OPCODE_REG_WRITE)
-+		I915_WRITE(VLV_IOSF_DATA, *val);
-+	I915_WRITE(VLV_IOSF_DOORBELL_REQ, cmd);
-+
-+	if (wait_for((I915_READ(VLV_IOSF_DOORBELL_REQ) & IOSF_SB_BUSY) == 0,
-+		     5)) {
-+		DRM_ERROR("timeout waiting for pcode %s (%d) to finish\n",
-+			  opcode == PUNIT_OPCODE_REG_READ ? "read" : "write",
-+			  addr);
-+		return -ETIMEDOUT;
-+	}
-+
-+	if (opcode == PUNIT_OPCODE_REG_READ)
-+		*val = I915_READ(VLV_IOSF_DATA);
-+	I915_WRITE(VLV_IOSF_DATA, 0);
-+
-+	return 0;
-+}
-+
-+int valleyview_punit_read(struct drm_i915_private *dev_priv, u8 addr, u32 *val)
-+{
-+	return vlv_punit_rw(dev_priv, IOSF_PORT_PUNIT, PUNIT_OPCODE_REG_READ,
-+			    addr, val);
-+}
-+
-+int valleyview_punit_write(struct drm_i915_private *dev_priv, u8 addr, u32 val)
-+{
-+	return vlv_punit_rw(dev_priv, IOSF_PORT_PUNIT, PUNIT_OPCODE_REG_WRITE,
-+			    addr, &val);
-+}
-+
-+int valleyview_nc_read(struct drm_i915_private *dev_priv, u8 addr, u32 *val)
-+{
-+	return vlv_punit_rw(dev_priv, IOSF_PORT_NC, PUNIT_OPCODE_REG_READ,
-+			    addr, val);
-+}
-+
-+u32 intel_dpio_read(struct drm_i915_private *dev_priv, int reg)
-+{
-+	WARN_ON(!mutex_is_locked(&dev_priv->dpio_lock));
-+
-+	if (wait_for_atomic_us((I915_READ(DPIO_PKT) & DPIO_BUSY) == 0, 100)) {
-+		DRM_ERROR("DPIO idle wait timed out\n");
-+		return 0;
-+	}
-+
-+	I915_WRITE(DPIO_REG, reg);
-+	I915_WRITE(DPIO_PKT, DPIO_RID | DPIO_OP_READ | DPIO_PORTID |
-+		   DPIO_BYTE);
-+	if (wait_for_atomic_us((I915_READ(DPIO_PKT) & DPIO_BUSY) == 0, 100)) {
-+		DRM_ERROR("DPIO read wait timed out\n");
-+		return 0;
-+	}
-+
-+	return I915_READ(DPIO_DATA);
-+}
-+
-+void intel_dpio_write(struct drm_i915_private *dev_priv, int reg, u32 val)
-+{
-+	WARN_ON(!mutex_is_locked(&dev_priv->dpio_lock));
-+
-+	if (wait_for_atomic_us((I915_READ(DPIO_PKT) & DPIO_BUSY) == 0, 100)) {
-+		DRM_ERROR("DPIO idle wait timed out\n");
-+		return;
-+	}
-+
-+	I915_WRITE(DPIO_DATA, val);
-+	I915_WRITE(DPIO_REG, reg);
-+	I915_WRITE(DPIO_PKT, DPIO_RID | DPIO_OP_WRITE | DPIO_PORTID |
-+		   DPIO_BYTE);
-+	if (wait_for_atomic_us((I915_READ(DPIO_PKT) & DPIO_BUSY) == 0, 100))
-+		DRM_ERROR("DPIO write wait timed out\n");
-+}
-+
-+/* SBI access */
-+u32 intel_sbi_read(struct drm_i915_private *dev_priv, u16 reg,
-+		   enum intel_sbi_destination destination)
-+{
-+	u32 value = 0;
-+	WARN_ON(!mutex_is_locked(&dev_priv->dpio_lock));
-+
-+	if (wait_for((I915_READ(SBI_CTL_STAT) & SBI_BUSY) == 0,
-+				100)) {
-+		DRM_ERROR("timeout waiting for SBI to become ready\n");
-+		return 0;
-+	}
-+
-+	I915_WRITE(SBI_ADDR, (reg << 16));
-+
-+	if (destination == SBI_ICLK)
-+		value = SBI_CTL_DEST_ICLK | SBI_CTL_OP_CRRD;
-+	else
-+		value = SBI_CTL_DEST_MPHY | SBI_CTL_OP_IORD;
-+	I915_WRITE(SBI_CTL_STAT, value | SBI_BUSY);
-+
-+	if (wait_for((I915_READ(SBI_CTL_STAT) & (SBI_BUSY | SBI_RESPONSE_FAIL)) == 0,
-+				100)) {
-+		DRM_ERROR("timeout waiting for SBI to complete read transaction\n");
-+		return 0;
-+	}
-+
-+	return I915_READ(SBI_DATA);
-+}
-+
-+void intel_sbi_write(struct drm_i915_private *dev_priv, u16 reg, u32 value,
-+		     enum intel_sbi_destination destination)
-+{
-+	u32 tmp;
-+
-+	WARN_ON(!mutex_is_locked(&dev_priv->dpio_lock));
-+
-+	if (wait_for((I915_READ(SBI_CTL_STAT) & SBI_BUSY) == 0,
-+				100)) {
-+		DRM_ERROR("timeout waiting for SBI to become ready\n");
-+		return;
-+	}
-+
-+	I915_WRITE(SBI_ADDR, (reg << 16));
-+	I915_WRITE(SBI_DATA, value);
-+
-+	if (destination == SBI_ICLK)
-+		tmp = SBI_CTL_DEST_ICLK | SBI_CTL_OP_CRWR;
-+	else
-+		tmp = SBI_CTL_DEST_MPHY | SBI_CTL_OP_IOWR;
-+	I915_WRITE(SBI_CTL_STAT, SBI_BUSY | tmp);
-+
-+	if (wait_for((I915_READ(SBI_CTL_STAT) & (SBI_BUSY | SBI_RESPONSE_FAIL)) == 0,
-+				100)) {
-+		DRM_ERROR("timeout waiting for SBI to complete write transaction\n");
-+		return;
-+	}
-+}
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0184-drm-i915-refactor-VLV-IOSF-sideband-accessors-to-use.patch b/patches.baytrail/0184-drm-i915-refactor-VLV-IOSF-sideband-accessors-to-use.patch
deleted file mode 100644
index 7b5cbe1ceec44..0000000000000
--- a/patches.baytrail/0184-drm-i915-refactor-VLV-IOSF-sideband-accessors-to-use.patch
+++ /dev/null
@@ -1,297 +0,0 @@
-From 957854930e3f56e214953ec6f22ecea76d782a3c Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Wed, 22 May 2013 15:36:17 +0300
-Subject: drm/i915: refactor VLV IOSF sideband accessors to use one helper
-
-Both the intel_dpio_{read,write} and valleyview_{punit,nc}_{read,write}
-use the IOSF sideband interface. They access the same registers and do
-mostly the same stuff, but no shared code. There are even duplicate
-register defines for the same registers. Both have locking, but the
-former use dpio_lock and the latter rps.hw_lock. It's racy.
-
-This patch refactors the sideband access to a single function that
-expects dpio_lock to be held. The dpio_lock is only used for sideband
-stuff, so it's a better match than rps.hw_lock for the purpose. The rps
-stuff still needs rps.hw_lock, since it's used to protect more than just
-the register access, so rps code will need to hold both locks.
-
-Based on the work by Shobhit Kumar <shobhit.kumar@intel.com> and Yogesh
-Mohan Marimuthu <yogesh.mohan.marimuthu@intel.com>.
-
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 5a09ae9fd509d7dded34e0d599e1afa5142c6987)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_reg.h       |   93 ++++++++++++++-----------------
- drivers/gpu/drm/i915/intel_sideband.c |  102 ++++++++++++++++------------------
- 2 files changed, 93 insertions(+), 102 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -342,27 +342,54 @@
- #define  DEBUG_RESET_DISPLAY		(1<<9)
- 
- /*
-- * DPIO - a special bus for various display related registers to hide behind:
-- *  0x800c: m1, m2, n, p1, p2, k dividers
-- *  0x8014: REF and SFR select
-- *  0x8014: N divider, VCO select
-- *  0x801c/3c: core clock bits
-- *  0x8048/68: low pass filter coefficients
-- *  0x8100: fast clock controls
-+ * IOSF sideband
-+ */
-+#define VLV_IOSF_DOORBELL_REQ			(VLV_DISPLAY_BASE + 0x2100)
-+#define   IOSF_DEVFN_SHIFT			24
-+#define   IOSF_OPCODE_SHIFT			16
-+#define   IOSF_PORT_SHIFT			8
-+#define   IOSF_BYTE_ENABLES_SHIFT		4
-+#define   IOSF_BAR_SHIFT			1
-+#define   IOSF_SB_BUSY				(1<<0)
-+#define   IOSF_PORT_PUNIT			0x4
-+#define   IOSF_PORT_NC				0x11
-+#define   IOSF_PORT_DPIO			0x12
-+#define VLV_IOSF_DATA				(VLV_DISPLAY_BASE + 0x2104)
-+#define VLV_IOSF_ADDR				(VLV_DISPLAY_BASE + 0x2108)
-+
-+#define PUNIT_OPCODE_REG_READ			6
-+#define PUNIT_OPCODE_REG_WRITE			7
-+
-+#define PUNIT_REG_GPU_LFM			0xd3
-+#define PUNIT_REG_GPU_FREQ_REQ			0xd4
-+#define PUNIT_REG_GPU_FREQ_STS			0xd8
-+#define PUNIT_REG_MEDIA_TURBO_FREQ_REQ		0xdc
-+
-+#define PUNIT_FUSE_BUS2				0xf6 /* bits 47:40 */
-+#define PUNIT_FUSE_BUS1				0xf5 /* bits 55:48 */
-+
-+#define IOSF_NC_FB_GFX_FREQ_FUSE		0x1c
-+#define   FB_GFX_MAX_FREQ_FUSE_SHIFT		3
-+#define   FB_GFX_MAX_FREQ_FUSE_MASK		0x000007f8
-+#define   FB_GFX_FGUARANTEED_FREQ_FUSE_SHIFT	11
-+#define   FB_GFX_FGUARANTEED_FREQ_FUSE_MASK	0x0007f800
-+#define IOSF_NC_FB_GFX_FMAX_FUSE_HI		0x34
-+#define   FB_FMAX_VMIN_FREQ_HI_MASK		0x00000007
-+#define IOSF_NC_FB_GFX_FMAX_FUSE_LO		0x30
-+#define   FB_FMAX_VMIN_FREQ_LO_SHIFT		27
-+#define   FB_FMAX_VMIN_FREQ_LO_MASK		0xf8000000
-+
-+/*
-+ * DPIO - a special bus for various display related registers to hide behind
-  *
-  * DPIO is VLV only.
-  *
-  * Note: digital port B is DDI0, digital pot C is DDI1
-  */
--#define DPIO_PKT			(VLV_DISPLAY_BASE + 0x2100)
--#define  DPIO_RID			(0<<24)
--#define  DPIO_OP_WRITE			(1<<16)
--#define  DPIO_OP_READ			(0<<16)
--#define  DPIO_PORTID			(0x12<<8)
--#define  DPIO_BYTE			(0xf<<4)
--#define  DPIO_BUSY			(1<<0) /* status only */
--#define DPIO_DATA			(VLV_DISPLAY_BASE + 0x2104)
--#define DPIO_REG			(VLV_DISPLAY_BASE + 0x2108)
-+#define DPIO_DEVFN			0
-+#define DPIO_OPCODE_REG_WRITE		1
-+#define DPIO_OPCODE_REG_READ		0
-+
- #define DPIO_CTL			(VLV_DISPLAY_BASE + 0x2110)
- #define  DPIO_MODSEL1			(1<<3) /* if ref clk b == 27 */
- #define  DPIO_MODSEL0			(1<<2) /* if ref clk a == 27 */
-@@ -4551,40 +4578,6 @@
- #define   GEN6_PCODE_FREQ_IA_RATIO_SHIFT	8
- #define   GEN6_PCODE_FREQ_RING_RATIO_SHIFT	16
- 
--#define VLV_IOSF_DOORBELL_REQ			0x182100
--#define   IOSF_DEVFN_SHIFT			24
--#define   IOSF_OPCODE_SHIFT			16
--#define   IOSF_PORT_SHIFT			8
--#define   IOSF_BYTE_ENABLES_SHIFT		4
--#define   IOSF_BAR_SHIFT			1
--#define   IOSF_SB_BUSY				(1<<0)
--#define   IOSF_PORT_PUNIT			0x4
--#define   IOSF_PORT_NC				0x11
--#define VLV_IOSF_DATA				0x182104
--#define VLV_IOSF_ADDR				0x182108
--
--#define PUNIT_OPCODE_REG_READ			6
--#define PUNIT_OPCODE_REG_WRITE			7
--
--#define PUNIT_REG_GPU_LFM			0xd3
--#define PUNIT_REG_GPU_FREQ_REQ			0xd4
--#define PUNIT_REG_GPU_FREQ_STS			0xd8
--#define PUNIT_REG_MEDIA_TURBO_FREQ_REQ		0xdc
--
--#define PUNIT_FUSE_BUS2				0xf6 /* bits 47:40 */
--#define PUNIT_FUSE_BUS1				0xf5 /* bits 55:48 */
--
--#define IOSF_NC_FB_GFX_FREQ_FUSE		0x1c
--#define   FB_GFX_MAX_FREQ_FUSE_SHIFT		3
--#define   FB_GFX_MAX_FREQ_FUSE_MASK		0x000007f8
--#define   FB_GFX_FGUARANTEED_FREQ_FUSE_SHIFT	11
--#define   FB_GFX_FGUARANTEED_FREQ_FUSE_MASK	0x0007f800
--#define IOSF_NC_FB_GFX_FMAX_FUSE_HI		0x34
--#define   FB_FMAX_VMIN_FREQ_HI_MASK		0x00000007
--#define IOSF_NC_FB_GFX_FMAX_FUSE_LO		0x30
--#define   FB_FMAX_VMIN_FREQ_LO_SHIFT		27
--#define   FB_FMAX_VMIN_FREQ_LO_MASK		0xf8000000
--
- #define GEN6_GT_CORE_STATUS		0x138060
- #define   GEN6_CORE_CPD_STATE_MASK	(7<<4)
- #define   GEN6_RCn_MASK			7
---- a/drivers/gpu/drm/i915/intel_sideband.c
-+++ b/drivers/gpu/drm/i915/intel_sideband.c
-@@ -26,42 +26,37 @@
- #include "intel_drv.h"
- 
- /* IOSF sideband */
--static int vlv_punit_rw(struct drm_i915_private *dev_priv, u32 port, u8 opcode,
--			u8 addr, u32 *val)
-+static int vlv_sideband_rw(struct drm_i915_private *dev_priv, u32 devfn,
-+			   u32 port, u32 opcode, u32 addr, u32 *val)
- {
--	u32 cmd, devfn, be, bar;
--
--	bar = 0;
--	be = 0xf;
--	devfn = PCI_DEVFN(2, 0);
-+	u32 cmd, be = 0xf, bar = 0;
-+	bool is_read = (opcode == PUNIT_OPCODE_REG_READ ||
-+			opcode == DPIO_OPCODE_REG_READ);
- 
- 	cmd = (devfn << IOSF_DEVFN_SHIFT) | (opcode << IOSF_OPCODE_SHIFT) |
- 		(port << IOSF_PORT_SHIFT) | (be << IOSF_BYTE_ENABLES_SHIFT) |
- 		(bar << IOSF_BAR_SHIFT);
- 
--	WARN_ON(!mutex_is_locked(&dev_priv->rps.hw_lock));
-+	WARN_ON(!mutex_is_locked(&dev_priv->dpio_lock));
- 
--	if (I915_READ(VLV_IOSF_DOORBELL_REQ) & IOSF_SB_BUSY) {
--		DRM_DEBUG_DRIVER("warning: pcode (%s) mailbox access failed\n",
--				 opcode == PUNIT_OPCODE_REG_READ ?
--				 "read" : "write");
-+	if (wait_for((I915_READ(VLV_IOSF_DOORBELL_REQ) & IOSF_SB_BUSY) == 0, 5)) {
-+		DRM_DEBUG_DRIVER("IOSF sideband idle wait (%s) timed out\n",
-+				 is_read ? "read" : "write");
- 		return -EAGAIN;
- 	}
- 
- 	I915_WRITE(VLV_IOSF_ADDR, addr);
--	if (opcode == PUNIT_OPCODE_REG_WRITE)
-+	if (!is_read)
- 		I915_WRITE(VLV_IOSF_DATA, *val);
- 	I915_WRITE(VLV_IOSF_DOORBELL_REQ, cmd);
- 
--	if (wait_for((I915_READ(VLV_IOSF_DOORBELL_REQ) & IOSF_SB_BUSY) == 0,
--		     5)) {
--		DRM_ERROR("timeout waiting for pcode %s (%d) to finish\n",
--			  opcode == PUNIT_OPCODE_REG_READ ? "read" : "write",
--			  addr);
-+	if (wait_for((I915_READ(VLV_IOSF_DOORBELL_REQ) & IOSF_SB_BUSY) == 0, 5)) {
-+		DRM_DEBUG_DRIVER("IOSF sideband finish wait (%s) timed out\n",
-+				 is_read ? "read" : "write");
- 		return -ETIMEDOUT;
- 	}
- 
--	if (opcode == PUNIT_OPCODE_REG_READ)
-+	if (is_read)
- 		*val = I915_READ(VLV_IOSF_DATA);
- 	I915_WRITE(VLV_IOSF_DATA, 0);
- 
-@@ -70,57 +65,60 @@ static int vlv_punit_rw(struct drm_i915_
- 
- int valleyview_punit_read(struct drm_i915_private *dev_priv, u8 addr, u32 *val)
- {
--	return vlv_punit_rw(dev_priv, IOSF_PORT_PUNIT, PUNIT_OPCODE_REG_READ,
--			    addr, val);
-+	int ret;
-+
-+	WARN_ON(!mutex_is_locked(&dev_priv->rps.hw_lock));
-+
-+	mutex_lock(&dev_priv->dpio_lock);
-+	ret = vlv_sideband_rw(dev_priv, PCI_DEVFN(2, 0), IOSF_PORT_PUNIT,
-+			      PUNIT_OPCODE_REG_READ, addr, val);
-+	mutex_unlock(&dev_priv->dpio_lock);
-+
-+	return ret;
- }
- 
- int valleyview_punit_write(struct drm_i915_private *dev_priv, u8 addr, u32 val)
- {
--	return vlv_punit_rw(dev_priv, IOSF_PORT_PUNIT, PUNIT_OPCODE_REG_WRITE,
--			    addr, &val);
-+	int ret;
-+
-+	WARN_ON(!mutex_is_locked(&dev_priv->rps.hw_lock));
-+
-+	mutex_lock(&dev_priv->dpio_lock);
-+	ret = vlv_sideband_rw(dev_priv, PCI_DEVFN(2, 0), IOSF_PORT_PUNIT,
-+			      PUNIT_OPCODE_REG_WRITE, addr, &val);
-+	mutex_unlock(&dev_priv->dpio_lock);
-+
-+	return ret;
- }
- 
- int valleyview_nc_read(struct drm_i915_private *dev_priv, u8 addr, u32 *val)
- {
--	return vlv_punit_rw(dev_priv, IOSF_PORT_NC, PUNIT_OPCODE_REG_READ,
--			    addr, val);
-+	int ret;
-+
-+	WARN_ON(!mutex_is_locked(&dev_priv->rps.hw_lock));
-+
-+	mutex_lock(&dev_priv->dpio_lock);
-+	ret = vlv_sideband_rw(dev_priv, PCI_DEVFN(2, 0), IOSF_PORT_NC,
-+			      PUNIT_OPCODE_REG_READ, addr, val);
-+	mutex_unlock(&dev_priv->dpio_lock);
-+
-+	return ret;
- }
- 
- u32 intel_dpio_read(struct drm_i915_private *dev_priv, int reg)
- {
--	WARN_ON(!mutex_is_locked(&dev_priv->dpio_lock));
-+	u32 val = 0;
- 
--	if (wait_for_atomic_us((I915_READ(DPIO_PKT) & DPIO_BUSY) == 0, 100)) {
--		DRM_ERROR("DPIO idle wait timed out\n");
--		return 0;
--	}
-+	vlv_sideband_rw(dev_priv, DPIO_DEVFN, IOSF_PORT_DPIO,
-+			DPIO_OPCODE_REG_READ, reg, &val);
- 
--	I915_WRITE(DPIO_REG, reg);
--	I915_WRITE(DPIO_PKT, DPIO_RID | DPIO_OP_READ | DPIO_PORTID |
--		   DPIO_BYTE);
--	if (wait_for_atomic_us((I915_READ(DPIO_PKT) & DPIO_BUSY) == 0, 100)) {
--		DRM_ERROR("DPIO read wait timed out\n");
--		return 0;
--	}
--
--	return I915_READ(DPIO_DATA);
-+	return val;
- }
- 
- void intel_dpio_write(struct drm_i915_private *dev_priv, int reg, u32 val)
- {
--	WARN_ON(!mutex_is_locked(&dev_priv->dpio_lock));
--
--	if (wait_for_atomic_us((I915_READ(DPIO_PKT) & DPIO_BUSY) == 0, 100)) {
--		DRM_ERROR("DPIO idle wait timed out\n");
--		return;
--	}
--
--	I915_WRITE(DPIO_DATA, val);
--	I915_WRITE(DPIO_REG, reg);
--	I915_WRITE(DPIO_PKT, DPIO_RID | DPIO_OP_WRITE | DPIO_PORTID |
--		   DPIO_BYTE);
--	if (wait_for_atomic_us((I915_READ(DPIO_PKT) & DPIO_BUSY) == 0, 100))
--		DRM_ERROR("DPIO write wait timed out\n");
-+	vlv_sideband_rw(dev_priv, DPIO_DEVFN, IOSF_PORT_DPIO,
-+			DPIO_OPCODE_REG_WRITE, reg, &val);
- }
- 
- /* SBI access */
diff --git a/patches.baytrail/0185-drm-i915-drop-redundant-warnings-on-not-holding-dpio.patch b/patches.baytrail/0185-drm-i915-drop-redundant-warnings-on-not-holding-dpio.patch
deleted file mode 100644
index b10934c7acdb8..0000000000000
--- a/patches.baytrail/0185-drm-i915-drop-redundant-warnings-on-not-holding-dpio.patch
+++ /dev/null
@@ -1,73 +0,0 @@
-From 5eccf5a47761f220e88e8fcc3672f6b80a911272 Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Wed, 22 May 2013 15:36:18 +0300
-Subject: drm/i915: drop redundant warnings on not holding dpio_lock
-
-The lower level sideband read/write functions already do this.
-
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit a1ca802d98acbc5fd87cc399b6aaf38f54be33e1)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_dp.c   | 6 ------
- drivers/gpu/drm/i915/intel_hdmi.c | 4 ----
- 2 files changed, 10 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
-index 093138c2f080..02e98fac18e5 100644
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -1462,8 +1462,6 @@ static void intel_pre_enable_dp(struct intel_encoder *encoder)
- 		int pipe = intel_crtc->pipe;
- 		u32 val;
- 
--		WARN_ON(!mutex_is_locked(&dev_priv->dpio_lock));
--
- 		val = intel_dpio_read(dev_priv, DPIO_DATA_LANE_A(port));
- 		val = 0;
- 		if (pipe)
-@@ -1490,8 +1488,6 @@ static void intel_dp_pre_pll_enable(struct intel_encoder *encoder)
- 	if (!IS_VALLEYVIEW(dev))
- 		return;
- 
--	WARN_ON(!mutex_is_locked(&dev_priv->dpio_lock));
--
- 	/* Program Tx lane resets to default */
- 	intel_dpio_write(dev_priv, DPIO_PCS_TX(port),
- 			 DPIO_PCS_TX_LANE2_RESET |
-@@ -1642,8 +1638,6 @@ static uint32_t intel_vlv_signal_levels(struct intel_dp *intel_dp)
- 	uint8_t train_set = intel_dp->train_set[0];
- 	int port = vlv_dport_to_channel(dport);
- 
--	WARN_ON(!mutex_is_locked(&dev_priv->dpio_lock));
--
- 	switch (train_set & DP_TRAIN_PRE_EMPHASIS_MASK) {
- 	case DP_TRAIN_PRE_EMPHASIS_0:
- 		preemph_reg_value = 0x0004000;
-diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
-index 18f8ce0404c6..83b63d72af83 100644
---- a/drivers/gpu/drm/i915/intel_hdmi.c
-+++ b/drivers/gpu/drm/i915/intel_hdmi.c
-@@ -1018,8 +1018,6 @@ static void intel_hdmi_pre_enable(struct intel_encoder *encoder)
- 	if (!IS_VALLEYVIEW(dev))
- 		return;
- 
--	WARN_ON(!mutex_is_locked(&dev_priv->dpio_lock));
--
- 	/* Enable clock channels for this port */
- 	val = intel_dpio_read(dev_priv, DPIO_DATA_LANE_A(port));
- 	val = 0;
-@@ -1063,8 +1061,6 @@ static void intel_hdmi_pre_pll_enable(struct intel_encoder *encoder)
- 	if (!IS_VALLEYVIEW(dev))
- 		return;
- 
--	WARN_ON(!mutex_is_locked(&dev_priv->dpio_lock));
--
- 	/* Program Tx lane resets to default */
- 	intel_dpio_write(dev_priv, DPIO_PCS_TX(port),
- 			 DPIO_PCS_TX_LANE2_RESET |
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0186-drm-i915-rename-VLV-IOSF-sideband-functions-logicall.patch b/patches.baytrail/0186-drm-i915-rename-VLV-IOSF-sideband-functions-logicall.patch
deleted file mode 100644
index 95fb2d79c6f33..0000000000000
--- a/patches.baytrail/0186-drm-i915-rename-VLV-IOSF-sideband-functions-logicall.patch
+++ /dev/null
@@ -1,520 +0,0 @@
-From 2b1355f668812ec8cabbbfe6c4dbd23b0cf2f51f Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Wed, 22 May 2013 15:36:19 +0300
-Subject: drm/i915: rename VLV IOSF sideband functions logically
-
-Rename all VLV IOSF sideband register accessor functions to
-vlv_<port>_{read,write}. No functional changes.
-
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit ae99258f02fe189c008af94f26140ed691258e9f)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_debugfs.c   | 24 +++++++++---------
- drivers/gpu/drm/i915/i915_drv.h       | 10 ++++----
- drivers/gpu/drm/i915/i915_sysfs.c     |  2 +-
- drivers/gpu/drm/i915/intel_display.c  | 46 +++++++++++++++++------------------
- drivers/gpu/drm/i915/intel_dp.c       | 32 ++++++++++++------------
- drivers/gpu/drm/i915/intel_hdmi.c     | 42 ++++++++++++++++----------------
- drivers/gpu/drm/i915/intel_pm.c       | 16 ++++++------
- drivers/gpu/drm/i915/intel_sideband.c | 10 ++++----
- 8 files changed, 91 insertions(+), 91 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
-index 3a8409a31266..bc0f6a55c74b 100644
---- a/drivers/gpu/drm/i915/i915_debugfs.c
-+++ b/drivers/gpu/drm/i915/i915_debugfs.c
-@@ -1137,16 +1137,16 @@ static int i915_cur_delayinfo(struct seq_file *m, void *unused)
- 		u32 freq_sts, val;
- 
- 		mutex_lock(&dev_priv->rps.hw_lock);
--		valleyview_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS,
-+		vlv_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS,
- 				      &freq_sts);
- 		seq_printf(m, "PUNIT_REG_GPU_FREQ_STS: 0x%08x\n", freq_sts);
- 		seq_printf(m, "DDR freq: %d MHz\n", dev_priv->mem_freq);
- 
--		valleyview_punit_read(dev_priv, PUNIT_FUSE_BUS1, &val);
-+		vlv_punit_read(dev_priv, PUNIT_FUSE_BUS1, &val);
- 		seq_printf(m, "max GPU freq: %d MHz\n",
- 			   vlv_gpu_freq(dev_priv->mem_freq, val));
- 
--		valleyview_punit_read(dev_priv, PUNIT_REG_GPU_LFM, &val);
-+		vlv_punit_read(dev_priv, PUNIT_REG_GPU_LFM, &val);
- 		seq_printf(m, "min GPU freq: %d MHz\n",
- 			   vlv_gpu_freq(dev_priv->mem_freq, val));
- 
-@@ -1787,27 +1787,27 @@ static int i915_dpio_info(struct seq_file *m, void *data)
- 	seq_printf(m, "DPIO_CTL: 0x%08x\n", I915_READ(DPIO_CTL));
- 
- 	seq_printf(m, "DPIO_DIV_A: 0x%08x\n",
--		   intel_dpio_read(dev_priv, _DPIO_DIV_A));
-+		   vlv_dpio_read(dev_priv, _DPIO_DIV_A));
- 	seq_printf(m, "DPIO_DIV_B: 0x%08x\n",
--		   intel_dpio_read(dev_priv, _DPIO_DIV_B));
-+		   vlv_dpio_read(dev_priv, _DPIO_DIV_B));
- 
- 	seq_printf(m, "DPIO_REFSFR_A: 0x%08x\n",
--		   intel_dpio_read(dev_priv, _DPIO_REFSFR_A));
-+		   vlv_dpio_read(dev_priv, _DPIO_REFSFR_A));
- 	seq_printf(m, "DPIO_REFSFR_B: 0x%08x\n",
--		   intel_dpio_read(dev_priv, _DPIO_REFSFR_B));
-+		   vlv_dpio_read(dev_priv, _DPIO_REFSFR_B));
- 
- 	seq_printf(m, "DPIO_CORE_CLK_A: 0x%08x\n",
--		   intel_dpio_read(dev_priv, _DPIO_CORE_CLK_A));
-+		   vlv_dpio_read(dev_priv, _DPIO_CORE_CLK_A));
- 	seq_printf(m, "DPIO_CORE_CLK_B: 0x%08x\n",
--		   intel_dpio_read(dev_priv, _DPIO_CORE_CLK_B));
-+		   vlv_dpio_read(dev_priv, _DPIO_CORE_CLK_B));
- 
- 	seq_printf(m, "DPIO_LFP_COEFF_A: 0x%08x\n",
--		   intel_dpio_read(dev_priv, _DPIO_LFP_COEFF_A));
-+		   vlv_dpio_read(dev_priv, _DPIO_LFP_COEFF_A));
- 	seq_printf(m, "DPIO_LFP_COEFF_B: 0x%08x\n",
--		   intel_dpio_read(dev_priv, _DPIO_LFP_COEFF_B));
-+		   vlv_dpio_read(dev_priv, _DPIO_LFP_COEFF_B));
- 
- 	seq_printf(m, "DPIO_FASTCLK_DISABLE: 0x%08x\n",
--		   intel_dpio_read(dev_priv, DPIO_FASTCLK_DISABLE));
-+		   vlv_dpio_read(dev_priv, DPIO_FASTCLK_DISABLE));
- 
- 	mutex_unlock(&dev_priv->dpio_lock);
- 
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 0243cb0b2dee..57911d47072e 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1935,11 +1935,11 @@ int sandybridge_pcode_read(struct drm_i915_private *dev_priv, u8 mbox, u32 *val)
- int sandybridge_pcode_write(struct drm_i915_private *dev_priv, u8 mbox, u32 val);
- 
- /* intel_sideband.c */
--int valleyview_punit_read(struct drm_i915_private *dev_priv, u8 addr, u32 *val);
--int valleyview_punit_write(struct drm_i915_private *dev_priv, u8 addr, u32 val);
--int valleyview_nc_read(struct drm_i915_private *dev_priv, u8 addr, u32 *val);
--u32 intel_dpio_read(struct drm_i915_private *dev_priv, int reg);
--void intel_dpio_write(struct drm_i915_private *dev_priv, int reg, u32 val);
-+int vlv_punit_read(struct drm_i915_private *dev_priv, u8 addr, u32 *val);
-+int vlv_punit_write(struct drm_i915_private *dev_priv, u8 addr, u32 val);
-+int vlv_nc_read(struct drm_i915_private *dev_priv, u8 addr, u32 *val);
-+u32 vlv_dpio_read(struct drm_i915_private *dev_priv, int reg);
-+void vlv_dpio_write(struct drm_i915_private *dev_priv, int reg, u32 val);
- u32 intel_sbi_read(struct drm_i915_private *dev_priv, u16 reg,
- 		   enum intel_sbi_destination destination);
- void intel_sbi_write(struct drm_i915_private *dev_priv, u16 reg, u32 value,
-diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c
-index c0d7875b475c..588fa00e6938 100644
---- a/drivers/gpu/drm/i915/i915_sysfs.c
-+++ b/drivers/gpu/drm/i915/i915_sysfs.c
-@@ -214,7 +214,7 @@ static ssize_t gt_cur_freq_mhz_show(struct device *kdev,
- 	mutex_lock(&dev_priv->rps.hw_lock);
- 	if (IS_VALLEYVIEW(dev_priv->dev)) {
- 		u32 freq;
--		valleyview_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS, &freq);
-+		vlv_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS, &freq);
- 		ret = vlv_gpu_freq(dev_priv->mem_freq, (freq >> 8) & 0xff);
- 	} else {
- 		ret = dev_priv->rps.cur_delay * GT_FREQUENCY_MULTIPLIER;
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 613629ee81d9..0159fe522d0d 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -4241,24 +4241,24 @@ static void vlv_pllb_recal_opamp(struct drm_i915_private *dev_priv)
- 	 * PLLB opamp always calibrates to max value of 0x3f, force enable it
- 	 * and set it to a reasonable value instead.
- 	 */
--	reg_val = intel_dpio_read(dev_priv, DPIO_IREF(1));
-+	reg_val = vlv_dpio_read(dev_priv, DPIO_IREF(1));
- 	reg_val &= 0xffffff00;
- 	reg_val |= 0x00000030;
--	intel_dpio_write(dev_priv, DPIO_IREF(1), reg_val);
-+	vlv_dpio_write(dev_priv, DPIO_IREF(1), reg_val);
- 
--	reg_val = intel_dpio_read(dev_priv, DPIO_CALIBRATION);
-+	reg_val = vlv_dpio_read(dev_priv, DPIO_CALIBRATION);
- 	reg_val &= 0x8cffffff;
- 	reg_val = 0x8c000000;
--	intel_dpio_write(dev_priv, DPIO_CALIBRATION, reg_val);
-+	vlv_dpio_write(dev_priv, DPIO_CALIBRATION, reg_val);
- 
--	reg_val = intel_dpio_read(dev_priv, DPIO_IREF(1));
-+	reg_val = vlv_dpio_read(dev_priv, DPIO_IREF(1));
- 	reg_val &= 0xffffff00;
--	intel_dpio_write(dev_priv, DPIO_IREF(1), reg_val);
-+	vlv_dpio_write(dev_priv, DPIO_IREF(1), reg_val);
- 
--	reg_val = intel_dpio_read(dev_priv, DPIO_CALIBRATION);
-+	reg_val = vlv_dpio_read(dev_priv, DPIO_CALIBRATION);
- 	reg_val &= 0x00ffffff;
- 	reg_val |= 0xb0000000;
--	intel_dpio_write(dev_priv, DPIO_CALIBRATION, reg_val);
-+	vlv_dpio_write(dev_priv, DPIO_CALIBRATION, reg_val);
- }
- 
- static void intel_pch_transcoder_set_m_n(struct intel_crtc *crtc,
-@@ -4333,15 +4333,15 @@ static void vlv_update_pll(struct intel_crtc *crtc)
- 		vlv_pllb_recal_opamp(dev_priv);
- 
- 	/* Set up Tx target for periodic Rcomp update */
--	intel_dpio_write(dev_priv, DPIO_IREF_BCAST, 0x0100000f);
-+	vlv_dpio_write(dev_priv, DPIO_IREF_BCAST, 0x0100000f);
- 
- 	/* Disable target IRef on PLL */
--	reg_val = intel_dpio_read(dev_priv, DPIO_IREF_CTL(pipe));
-+	reg_val = vlv_dpio_read(dev_priv, DPIO_IREF_CTL(pipe));
- 	reg_val &= 0x00ffffff;
--	intel_dpio_write(dev_priv, DPIO_IREF_CTL(pipe), reg_val);
-+	vlv_dpio_write(dev_priv, DPIO_IREF_CTL(pipe), reg_val);
- 
- 	/* Disable fast lock */
--	intel_dpio_write(dev_priv, DPIO_FASTCLK_DISABLE, 0x610);
-+	vlv_dpio_write(dev_priv, DPIO_FASTCLK_DISABLE, 0x610);
- 
- 	/* Set idtafcrecal before PLL is enabled */
- 	mdiv = ((bestm1 << DPIO_M1DIV_SHIFT) | (bestm2 & DPIO_M2DIV_MASK));
-@@ -4355,47 +4355,47 @@ static void vlv_update_pll(struct intel_crtc *crtc)
- 	 * Note: don't use the DAC post divider as it seems unstable.
- 	 */
- 	mdiv |= (DPIO_POST_DIV_HDMIDP << DPIO_POST_DIV_SHIFT);
--	intel_dpio_write(dev_priv, DPIO_DIV(pipe), mdiv);
-+	vlv_dpio_write(dev_priv, DPIO_DIV(pipe), mdiv);
- 
- 	mdiv |= DPIO_ENABLE_CALIBRATION;
--	intel_dpio_write(dev_priv, DPIO_DIV(pipe), mdiv);
-+	vlv_dpio_write(dev_priv, DPIO_DIV(pipe), mdiv);
- 
- 	/* Set HBR and RBR LPF coefficients */
- 	if (adjusted_mode->clock == 162000 ||
- 	    intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_HDMI))
--		intel_dpio_write(dev_priv, DPIO_LFP_COEFF(pipe),
-+		vlv_dpio_write(dev_priv, DPIO_LFP_COEFF(pipe),
- 				 0x005f0021);
- 	else
--		intel_dpio_write(dev_priv, DPIO_LFP_COEFF(pipe),
-+		vlv_dpio_write(dev_priv, DPIO_LFP_COEFF(pipe),
- 				 0x00d0000f);
- 
- 	if (intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_EDP) ||
- 	    intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_DISPLAYPORT)) {
- 		/* Use SSC source */
- 		if (!pipe)
--			intel_dpio_write(dev_priv, DPIO_REFSFR(pipe),
-+			vlv_dpio_write(dev_priv, DPIO_REFSFR(pipe),
- 					 0x0df40000);
- 		else
--			intel_dpio_write(dev_priv, DPIO_REFSFR(pipe),
-+			vlv_dpio_write(dev_priv, DPIO_REFSFR(pipe),
- 					 0x0df70000);
- 	} else { /* HDMI or VGA */
- 		/* Use bend source */
- 		if (!pipe)
--			intel_dpio_write(dev_priv, DPIO_REFSFR(pipe),
-+			vlv_dpio_write(dev_priv, DPIO_REFSFR(pipe),
- 					 0x0df70000);
- 		else
--			intel_dpio_write(dev_priv, DPIO_REFSFR(pipe),
-+			vlv_dpio_write(dev_priv, DPIO_REFSFR(pipe),
- 					 0x0df40000);
- 	}
- 
--	coreclk = intel_dpio_read(dev_priv, DPIO_CORE_CLK(pipe));
-+	coreclk = vlv_dpio_read(dev_priv, DPIO_CORE_CLK(pipe));
- 	coreclk = (coreclk & 0x0000ff00) | 0x01c00000;
- 	if (intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_DISPLAYPORT) ||
- 	    intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_EDP))
- 		coreclk |= 0x01000000;
--	intel_dpio_write(dev_priv, DPIO_CORE_CLK(pipe), coreclk);
-+	vlv_dpio_write(dev_priv, DPIO_CORE_CLK(pipe), coreclk);
- 
--	intel_dpio_write(dev_priv, DPIO_PLL_CML(pipe), 0x87871000);
-+	vlv_dpio_write(dev_priv, DPIO_PLL_CML(pipe), 0x87871000);
- 
- 	for_each_encoder_on_crtc(dev, &crtc->base, encoder)
- 		if (encoder->pre_pll_enable)
-diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
-index 02e98fac18e5..e21d98621078 100644
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -1462,18 +1462,18 @@ static void intel_pre_enable_dp(struct intel_encoder *encoder)
- 		int pipe = intel_crtc->pipe;
- 		u32 val;
- 
--		val = intel_dpio_read(dev_priv, DPIO_DATA_LANE_A(port));
-+		val = vlv_dpio_read(dev_priv, DPIO_DATA_LANE_A(port));
- 		val = 0;
- 		if (pipe)
- 			val |= (1<<21);
- 		else
- 			val &= ~(1<<21);
- 		val |= 0x001000c4;
--		intel_dpio_write(dev_priv, DPIO_DATA_CHANNEL(port), val);
-+		vlv_dpio_write(dev_priv, DPIO_DATA_CHANNEL(port), val);
- 
--		intel_dpio_write(dev_priv, DPIO_PCS_CLOCKBUF0(port),
-+		vlv_dpio_write(dev_priv, DPIO_PCS_CLOCKBUF0(port),
- 				 0x00760018);
--		intel_dpio_write(dev_priv, DPIO_PCS_CLOCKBUF8(port),
-+		vlv_dpio_write(dev_priv, DPIO_PCS_CLOCKBUF8(port),
- 				 0x00400888);
- 	}
- }
-@@ -1489,19 +1489,19 @@ static void intel_dp_pre_pll_enable(struct intel_encoder *encoder)
- 		return;
- 
- 	/* Program Tx lane resets to default */
--	intel_dpio_write(dev_priv, DPIO_PCS_TX(port),
-+	vlv_dpio_write(dev_priv, DPIO_PCS_TX(port),
- 			 DPIO_PCS_TX_LANE2_RESET |
- 			 DPIO_PCS_TX_LANE1_RESET);
--	intel_dpio_write(dev_priv, DPIO_PCS_CLK(port),
-+	vlv_dpio_write(dev_priv, DPIO_PCS_CLK(port),
- 			 DPIO_PCS_CLK_CRI_RXEB_EIOS_EN |
- 			 DPIO_PCS_CLK_CRI_RXDIGFILTSG_EN |
- 			 (1<<DPIO_PCS_CLK_DATAWIDTH_SHIFT) |
- 				 DPIO_PCS_CLK_SOFT_RESET);
- 
- 	/* Fix up inter-pair skew failure */
--	intel_dpio_write(dev_priv, DPIO_PCS_STAGGER1(port), 0x00750f00);
--	intel_dpio_write(dev_priv, DPIO_TX_CTL(port), 0x00001500);
--	intel_dpio_write(dev_priv, DPIO_TX_LANE(port), 0x40400000);
-+	vlv_dpio_write(dev_priv, DPIO_PCS_STAGGER1(port), 0x00750f00);
-+	vlv_dpio_write(dev_priv, DPIO_TX_CTL(port), 0x00001500);
-+	vlv_dpio_write(dev_priv, DPIO_TX_LANE(port), 0x40400000);
- }
- 
- /*
-@@ -1711,14 +1711,14 @@ static uint32_t intel_vlv_signal_levels(struct intel_dp *intel_dp)
- 		return 0;
- 	}
- 
--	intel_dpio_write(dev_priv, DPIO_TX_OCALINIT(port), 0x00000000);
--	intel_dpio_write(dev_priv, DPIO_TX_SWING_CTL4(port), demph_reg_value);
--	intel_dpio_write(dev_priv, DPIO_TX_SWING_CTL2(port),
-+	vlv_dpio_write(dev_priv, DPIO_TX_OCALINIT(port), 0x00000000);
-+	vlv_dpio_write(dev_priv, DPIO_TX_SWING_CTL4(port), demph_reg_value);
-+	vlv_dpio_write(dev_priv, DPIO_TX_SWING_CTL2(port),
- 			 uniqtranscale_reg_value);
--	intel_dpio_write(dev_priv, DPIO_TX_SWING_CTL3(port), 0x0C782040);
--	intel_dpio_write(dev_priv, DPIO_PCS_STAGGER0(port), 0x00030000);
--	intel_dpio_write(dev_priv, DPIO_PCS_CTL_OVER1(port), preemph_reg_value);
--	intel_dpio_write(dev_priv, DPIO_TX_OCALINIT(port), 0x80000000);
-+	vlv_dpio_write(dev_priv, DPIO_TX_SWING_CTL3(port), 0x0C782040);
-+	vlv_dpio_write(dev_priv, DPIO_PCS_STAGGER0(port), 0x00030000);
-+	vlv_dpio_write(dev_priv, DPIO_PCS_CTL_OVER1(port), preemph_reg_value);
-+	vlv_dpio_write(dev_priv, DPIO_TX_OCALINIT(port), 0x80000000);
- 
- 	return 0;
- }
-diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
-index 83b63d72af83..8062a92e6e80 100644
---- a/drivers/gpu/drm/i915/intel_hdmi.c
-+++ b/drivers/gpu/drm/i915/intel_hdmi.c
-@@ -1019,35 +1019,35 @@ static void intel_hdmi_pre_enable(struct intel_encoder *encoder)
- 		return;
- 
- 	/* Enable clock channels for this port */
--	val = intel_dpio_read(dev_priv, DPIO_DATA_LANE_A(port));
-+	val = vlv_dpio_read(dev_priv, DPIO_DATA_LANE_A(port));
- 	val = 0;
- 	if (pipe)
- 		val |= (1<<21);
- 	else
- 		val &= ~(1<<21);
- 	val |= 0x001000c4;
--	intel_dpio_write(dev_priv, DPIO_DATA_CHANNEL(port), val);
-+	vlv_dpio_write(dev_priv, DPIO_DATA_CHANNEL(port), val);
- 
- 	/* HDMI 1.0V-2dB */
--	intel_dpio_write(dev_priv, DPIO_TX_OCALINIT(port), 0);
--	intel_dpio_write(dev_priv, DPIO_TX_SWING_CTL4(port),
-+	vlv_dpio_write(dev_priv, DPIO_TX_OCALINIT(port), 0);
-+	vlv_dpio_write(dev_priv, DPIO_TX_SWING_CTL4(port),
- 			 0x2b245f5f);
--	intel_dpio_write(dev_priv, DPIO_TX_SWING_CTL2(port),
-+	vlv_dpio_write(dev_priv, DPIO_TX_SWING_CTL2(port),
- 			 0x5578b83a);
--	intel_dpio_write(dev_priv, DPIO_TX_SWING_CTL3(port),
-+	vlv_dpio_write(dev_priv, DPIO_TX_SWING_CTL3(port),
- 			 0x0c782040);
--	intel_dpio_write(dev_priv, DPIO_TX3_SWING_CTL4(port),
-+	vlv_dpio_write(dev_priv, DPIO_TX3_SWING_CTL4(port),
- 			 0x2b247878);
--	intel_dpio_write(dev_priv, DPIO_PCS_STAGGER0(port), 0x00030000);
--	intel_dpio_write(dev_priv, DPIO_PCS_CTL_OVER1(port),
-+	vlv_dpio_write(dev_priv, DPIO_PCS_STAGGER0(port), 0x00030000);
-+	vlv_dpio_write(dev_priv, DPIO_PCS_CTL_OVER1(port),
- 			 0x00002000);
--	intel_dpio_write(dev_priv, DPIO_TX_OCALINIT(port),
-+	vlv_dpio_write(dev_priv, DPIO_TX_OCALINIT(port),
- 			 DPIO_TX_OCALINIT_EN);
- 
- 	/* Program lane clock */
--	intel_dpio_write(dev_priv, DPIO_PCS_CLOCKBUF0(port),
-+	vlv_dpio_write(dev_priv, DPIO_PCS_CLOCKBUF0(port),
- 			 0x00760018);
--	intel_dpio_write(dev_priv, DPIO_PCS_CLOCKBUF8(port),
-+	vlv_dpio_write(dev_priv, DPIO_PCS_CLOCKBUF8(port),
- 			 0x00400888);
- }
- 
-@@ -1062,23 +1062,23 @@ static void intel_hdmi_pre_pll_enable(struct intel_encoder *encoder)
- 		return;
- 
- 	/* Program Tx lane resets to default */
--	intel_dpio_write(dev_priv, DPIO_PCS_TX(port),
-+	vlv_dpio_write(dev_priv, DPIO_PCS_TX(port),
- 			 DPIO_PCS_TX_LANE2_RESET |
- 			 DPIO_PCS_TX_LANE1_RESET);
--	intel_dpio_write(dev_priv, DPIO_PCS_CLK(port),
-+	vlv_dpio_write(dev_priv, DPIO_PCS_CLK(port),
- 			 DPIO_PCS_CLK_CRI_RXEB_EIOS_EN |
- 			 DPIO_PCS_CLK_CRI_RXDIGFILTSG_EN |
- 			 (1<<DPIO_PCS_CLK_DATAWIDTH_SHIFT) |
- 			 DPIO_PCS_CLK_SOFT_RESET);
- 
- 	/* Fix up inter-pair skew failure */
--	intel_dpio_write(dev_priv, DPIO_PCS_STAGGER1(port), 0x00750f00);
--	intel_dpio_write(dev_priv, DPIO_TX_CTL(port), 0x00001500);
--	intel_dpio_write(dev_priv, DPIO_TX_LANE(port), 0x40400000);
-+	vlv_dpio_write(dev_priv, DPIO_PCS_STAGGER1(port), 0x00750f00);
-+	vlv_dpio_write(dev_priv, DPIO_TX_CTL(port), 0x00001500);
-+	vlv_dpio_write(dev_priv, DPIO_TX_LANE(port), 0x40400000);
- 
--	intel_dpio_write(dev_priv, DPIO_PCS_CTL_OVER1(port),
-+	vlv_dpio_write(dev_priv, DPIO_PCS_CTL_OVER1(port),
- 			 0x00002000);
--	intel_dpio_write(dev_priv, DPIO_TX_OCALINIT(port),
-+	vlv_dpio_write(dev_priv, DPIO_TX_OCALINIT(port),
- 			 DPIO_TX_OCALINIT_EN);
- }
- 
-@@ -1090,8 +1090,8 @@ static void intel_hdmi_post_disable(struct intel_encoder *encoder)
- 
- 	/* Reset lanes to avoid HDMI flicker (VLV w/a) */
- 	mutex_lock(&dev_priv->dpio_lock);
--	intel_dpio_write(dev_priv, DPIO_PCS_TX(port), 0x00000000);
--	intel_dpio_write(dev_priv, DPIO_PCS_CLK(port), 0x00e00060);
-+	vlv_dpio_write(dev_priv, DPIO_PCS_TX(port), 0x00000000);
-+	vlv_dpio_write(dev_priv, DPIO_PCS_CLK(port), 0x00e00060);
- 	mutex_unlock(&dev_priv->dpio_lock);
- }
- 
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 1b884359662a..d158a34037ac 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2566,10 +2566,10 @@ void valleyview_set_rps(struct drm_device *dev, u8 val)
- 	if (val == dev_priv->rps.cur_delay)
- 		return;
- 
--	valleyview_punit_write(dev_priv, PUNIT_REG_GPU_FREQ_REQ, val);
-+	vlv_punit_write(dev_priv, PUNIT_REG_GPU_FREQ_REQ, val);
- 
- 	do {
--		valleyview_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS, &pval);
-+		vlv_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS, &pval);
- 		if (time_after(jiffies, timeout)) {
- 			DRM_DEBUG_DRIVER("timed out waiting for Punit\n");
- 			break;
-@@ -2577,7 +2577,7 @@ void valleyview_set_rps(struct drm_device *dev, u8 val)
- 		udelay(10);
- 	} while (pval & 1);
- 
--	valleyview_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS, &pval);
-+	vlv_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS, &pval);
- 	if ((pval >> 8) != val)
- 		DRM_DEBUG_DRIVER("punit overrode freq: %d requested, but got %d\n",
- 			  val, pval >> 8);
-@@ -2882,7 +2882,7 @@ int valleyview_rps_max_freq(struct drm_i915_private *dev_priv)
- {
- 	u32 val, rp0;
- 
--	valleyview_nc_read(dev_priv, IOSF_NC_FB_GFX_FREQ_FUSE, &val);
-+	vlv_nc_read(dev_priv, IOSF_NC_FB_GFX_FREQ_FUSE, &val);
- 
- 	rp0 = (val & FB_GFX_MAX_FREQ_FUSE_MASK) >> FB_GFX_MAX_FREQ_FUSE_SHIFT;
- 	/* Clamp to max */
-@@ -2895,9 +2895,9 @@ static int valleyview_rps_rpe_freq(struct drm_i915_private *dev_priv)
- {
- 	u32 val, rpe;
- 
--	valleyview_nc_read(dev_priv, IOSF_NC_FB_GFX_FMAX_FUSE_LO, &val);
-+	vlv_nc_read(dev_priv, IOSF_NC_FB_GFX_FMAX_FUSE_LO, &val);
- 	rpe = (val & FB_FMAX_VMIN_FREQ_LO_MASK) >> FB_FMAX_VMIN_FREQ_LO_SHIFT;
--	valleyview_nc_read(dev_priv, IOSF_NC_FB_GFX_FMAX_FUSE_HI, &val);
-+	vlv_nc_read(dev_priv, IOSF_NC_FB_GFX_FMAX_FUSE_HI, &val);
- 	rpe |= (val & FB_FMAX_VMIN_FREQ_HI_MASK) << 5;
- 
- 	return rpe;
-@@ -2907,7 +2907,7 @@ int valleyview_rps_min_freq(struct drm_i915_private *dev_priv)
- {
- 	u32 val;
- 
--	valleyview_punit_read(dev_priv, PUNIT_REG_GPU_LFM, &val);
-+	vlv_punit_read(dev_priv, PUNIT_REG_GPU_LFM, &val);
- 
- 	return val & 0xff;
- }
-@@ -3018,7 +3018,7 @@ static void valleyview_enable_rps(struct drm_device *dev)
- 	I915_WRITE(GEN6_RC_CONTROL,
- 		   GEN7_RC_CTL_TO_MODE);
- 
--	valleyview_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS, &val);
-+	vlv_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS, &val);
- 	switch ((val >> 6) & 3) {
- 	case 0:
- 	case 1:
-diff --git a/drivers/gpu/drm/i915/intel_sideband.c b/drivers/gpu/drm/i915/intel_sideband.c
-index a7c4b61e9c30..d150972da048 100644
---- a/drivers/gpu/drm/i915/intel_sideband.c
-+++ b/drivers/gpu/drm/i915/intel_sideband.c
-@@ -63,7 +63,7 @@ static int vlv_sideband_rw(struct drm_i915_private *dev_priv, u32 devfn,
- 	return 0;
- }
- 
--int valleyview_punit_read(struct drm_i915_private *dev_priv, u8 addr, u32 *val)
-+int vlv_punit_read(struct drm_i915_private *dev_priv, u8 addr, u32 *val)
- {
- 	int ret;
- 
-@@ -77,7 +77,7 @@ int valleyview_punit_read(struct drm_i915_private *dev_priv, u8 addr, u32 *val)
- 	return ret;
- }
- 
--int valleyview_punit_write(struct drm_i915_private *dev_priv, u8 addr, u32 val)
-+int vlv_punit_write(struct drm_i915_private *dev_priv, u8 addr, u32 val)
- {
- 	int ret;
- 
-@@ -91,7 +91,7 @@ int valleyview_punit_write(struct drm_i915_private *dev_priv, u8 addr, u32 val)
- 	return ret;
- }
- 
--int valleyview_nc_read(struct drm_i915_private *dev_priv, u8 addr, u32 *val)
-+int vlv_nc_read(struct drm_i915_private *dev_priv, u8 addr, u32 *val)
- {
- 	int ret;
- 
-@@ -105,7 +105,7 @@ int valleyview_nc_read(struct drm_i915_private *dev_priv, u8 addr, u32 *val)
- 	return ret;
- }
- 
--u32 intel_dpio_read(struct drm_i915_private *dev_priv, int reg)
-+u32 vlv_dpio_read(struct drm_i915_private *dev_priv, int reg)
- {
- 	u32 val = 0;
- 
-@@ -115,7 +115,7 @@ u32 intel_dpio_read(struct drm_i915_private *dev_priv, int reg)
- 	return val;
- }
- 
--void intel_dpio_write(struct drm_i915_private *dev_priv, int reg, u32 val)
-+void vlv_dpio_write(struct drm_i915_private *dev_priv, int reg, u32 val)
- {
- 	vlv_sideband_rw(dev_priv, DPIO_DEVFN, IOSF_PORT_DPIO,
- 			DPIO_OPCODE_REG_WRITE, reg, &val);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0187-drm-i915-change-VLV-IOSF-sideband-accessors-to-not-r.patch b/patches.baytrail/0187-drm-i915-change-VLV-IOSF-sideband-accessors-to-not-r.patch
deleted file mode 100644
index 3c0fb6b04e231..0000000000000
--- a/patches.baytrail/0187-drm-i915-change-VLV-IOSF-sideband-accessors-to-not-r.patch
+++ /dev/null
@@ -1,207 +0,0 @@
-From 16d8b3d29023040d295f6c6c26228560b8a8d242 Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Wed, 22 May 2013 15:36:20 +0300
-Subject: drm/i915: change VLV IOSF sideband accessors to not return error code
-
-We never check the return values, and there's not much we could do on
-errors anyway. Just simplify the signatures. No functional changes.
-
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 64936258d7e426bee5f2392269b1b20172db9ffb)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_debugfs.c   |  7 +++----
- drivers/gpu/drm/i915/i915_drv.h       |  6 +++---
- drivers/gpu/drm/i915/i915_sysfs.c     |  2 +-
- drivers/gpu/drm/i915/intel_pm.c       | 18 +++++++-----------
- drivers/gpu/drm/i915/intel_sideband.c | 30 +++++++++++++-----------------
- 5 files changed, 27 insertions(+), 36 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
-index bc0f6a55c74b..2eb572afbcd3 100644
---- a/drivers/gpu/drm/i915/i915_debugfs.c
-+++ b/drivers/gpu/drm/i915/i915_debugfs.c
-@@ -1137,16 +1137,15 @@ static int i915_cur_delayinfo(struct seq_file *m, void *unused)
- 		u32 freq_sts, val;
- 
- 		mutex_lock(&dev_priv->rps.hw_lock);
--		vlv_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS,
--				      &freq_sts);
-+		freq_sts = vlv_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS);
- 		seq_printf(m, "PUNIT_REG_GPU_FREQ_STS: 0x%08x\n", freq_sts);
- 		seq_printf(m, "DDR freq: %d MHz\n", dev_priv->mem_freq);
- 
--		vlv_punit_read(dev_priv, PUNIT_FUSE_BUS1, &val);
-+		val = vlv_punit_read(dev_priv, PUNIT_FUSE_BUS1);
- 		seq_printf(m, "max GPU freq: %d MHz\n",
- 			   vlv_gpu_freq(dev_priv->mem_freq, val));
- 
--		vlv_punit_read(dev_priv, PUNIT_REG_GPU_LFM, &val);
-+		val = vlv_punit_read(dev_priv, PUNIT_REG_GPU_LFM);
- 		seq_printf(m, "min GPU freq: %d MHz\n",
- 			   vlv_gpu_freq(dev_priv->mem_freq, val));
- 
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 57911d47072e..5161c2c7487f 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1935,9 +1935,9 @@ int sandybridge_pcode_read(struct drm_i915_private *dev_priv, u8 mbox, u32 *val)
- int sandybridge_pcode_write(struct drm_i915_private *dev_priv, u8 mbox, u32 val);
- 
- /* intel_sideband.c */
--int vlv_punit_read(struct drm_i915_private *dev_priv, u8 addr, u32 *val);
--int vlv_punit_write(struct drm_i915_private *dev_priv, u8 addr, u32 val);
--int vlv_nc_read(struct drm_i915_private *dev_priv, u8 addr, u32 *val);
-+u32 vlv_punit_read(struct drm_i915_private *dev_priv, u8 addr);
-+void vlv_punit_write(struct drm_i915_private *dev_priv, u8 addr, u32 val);
-+u32 vlv_nc_read(struct drm_i915_private *dev_priv, u8 addr);
- u32 vlv_dpio_read(struct drm_i915_private *dev_priv, int reg);
- void vlv_dpio_write(struct drm_i915_private *dev_priv, int reg, u32 val);
- u32 intel_sbi_read(struct drm_i915_private *dev_priv, u16 reg,
-diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c
-index 588fa00e6938..6875b5654c63 100644
---- a/drivers/gpu/drm/i915/i915_sysfs.c
-+++ b/drivers/gpu/drm/i915/i915_sysfs.c
-@@ -214,7 +214,7 @@ static ssize_t gt_cur_freq_mhz_show(struct device *kdev,
- 	mutex_lock(&dev_priv->rps.hw_lock);
- 	if (IS_VALLEYVIEW(dev_priv->dev)) {
- 		u32 freq;
--		vlv_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS, &freq);
-+		freq = vlv_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS);
- 		ret = vlv_gpu_freq(dev_priv->mem_freq, (freq >> 8) & 0xff);
- 	} else {
- 		ret = dev_priv->rps.cur_delay * GT_FREQUENCY_MULTIPLIER;
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index d158a34037ac..914257501006 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2569,7 +2569,7 @@ void valleyview_set_rps(struct drm_device *dev, u8 val)
- 	vlv_punit_write(dev_priv, PUNIT_REG_GPU_FREQ_REQ, val);
- 
- 	do {
--		vlv_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS, &pval);
-+		pval = vlv_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS);
- 		if (time_after(jiffies, timeout)) {
- 			DRM_DEBUG_DRIVER("timed out waiting for Punit\n");
- 			break;
-@@ -2577,7 +2577,7 @@ void valleyview_set_rps(struct drm_device *dev, u8 val)
- 		udelay(10);
- 	} while (pval & 1);
- 
--	vlv_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS, &pval);
-+	pval = vlv_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS);
- 	if ((pval >> 8) != val)
- 		DRM_DEBUG_DRIVER("punit overrode freq: %d requested, but got %d\n",
- 			  val, pval >> 8);
-@@ -2882,7 +2882,7 @@ int valleyview_rps_max_freq(struct drm_i915_private *dev_priv)
- {
- 	u32 val, rp0;
- 
--	vlv_nc_read(dev_priv, IOSF_NC_FB_GFX_FREQ_FUSE, &val);
-+	val = vlv_nc_read(dev_priv, IOSF_NC_FB_GFX_FREQ_FUSE);
- 
- 	rp0 = (val & FB_GFX_MAX_FREQ_FUSE_MASK) >> FB_GFX_MAX_FREQ_FUSE_SHIFT;
- 	/* Clamp to max */
-@@ -2895,9 +2895,9 @@ static int valleyview_rps_rpe_freq(struct drm_i915_private *dev_priv)
- {
- 	u32 val, rpe;
- 
--	vlv_nc_read(dev_priv, IOSF_NC_FB_GFX_FMAX_FUSE_LO, &val);
-+	val = vlv_nc_read(dev_priv, IOSF_NC_FB_GFX_FMAX_FUSE_LO);
- 	rpe = (val & FB_FMAX_VMIN_FREQ_LO_MASK) >> FB_FMAX_VMIN_FREQ_LO_SHIFT;
--	vlv_nc_read(dev_priv, IOSF_NC_FB_GFX_FMAX_FUSE_HI, &val);
-+	val = vlv_nc_read(dev_priv, IOSF_NC_FB_GFX_FMAX_FUSE_HI);
- 	rpe |= (val & FB_FMAX_VMIN_FREQ_HI_MASK) << 5;
- 
- 	return rpe;
-@@ -2905,11 +2905,7 @@ static int valleyview_rps_rpe_freq(struct drm_i915_private *dev_priv)
- 
- int valleyview_rps_min_freq(struct drm_i915_private *dev_priv)
- {
--	u32 val;
--
--	vlv_punit_read(dev_priv, PUNIT_REG_GPU_LFM, &val);
--
--	return val & 0xff;
-+	return vlv_punit_read(dev_priv, PUNIT_REG_GPU_LFM) & 0xff;
- }
- 
- static void vlv_rps_timer_work(struct work_struct *work)
-@@ -3018,7 +3014,7 @@ static void valleyview_enable_rps(struct drm_device *dev)
- 	I915_WRITE(GEN6_RC_CONTROL,
- 		   GEN7_RC_CTL_TO_MODE);
- 
--	vlv_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS, &val);
-+	val = vlv_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS);
- 	switch ((val >> 6) & 3) {
- 	case 0:
- 	case 1:
-diff --git a/drivers/gpu/drm/i915/intel_sideband.c b/drivers/gpu/drm/i915/intel_sideband.c
-index d150972da048..9a0e6c5ea540 100644
---- a/drivers/gpu/drm/i915/intel_sideband.c
-+++ b/drivers/gpu/drm/i915/intel_sideband.c
-@@ -63,46 +63,42 @@ static int vlv_sideband_rw(struct drm_i915_private *dev_priv, u32 devfn,
- 	return 0;
- }
- 
--int vlv_punit_read(struct drm_i915_private *dev_priv, u8 addr, u32 *val)
-+u32 vlv_punit_read(struct drm_i915_private *dev_priv, u8 addr)
- {
--	int ret;
-+	u32 val = 0;
- 
- 	WARN_ON(!mutex_is_locked(&dev_priv->rps.hw_lock));
- 
- 	mutex_lock(&dev_priv->dpio_lock);
--	ret = vlv_sideband_rw(dev_priv, PCI_DEVFN(2, 0), IOSF_PORT_PUNIT,
--			      PUNIT_OPCODE_REG_READ, addr, val);
-+	vlv_sideband_rw(dev_priv, PCI_DEVFN(2, 0), IOSF_PORT_PUNIT,
-+			PUNIT_OPCODE_REG_READ, addr, &val);
- 	mutex_unlock(&dev_priv->dpio_lock);
- 
--	return ret;
-+	return val;
- }
- 
--int vlv_punit_write(struct drm_i915_private *dev_priv, u8 addr, u32 val)
-+void vlv_punit_write(struct drm_i915_private *dev_priv, u8 addr, u32 val)
- {
--	int ret;
--
- 	WARN_ON(!mutex_is_locked(&dev_priv->rps.hw_lock));
- 
- 	mutex_lock(&dev_priv->dpio_lock);
--	ret = vlv_sideband_rw(dev_priv, PCI_DEVFN(2, 0), IOSF_PORT_PUNIT,
--			      PUNIT_OPCODE_REG_WRITE, addr, &val);
-+	vlv_sideband_rw(dev_priv, PCI_DEVFN(2, 0), IOSF_PORT_PUNIT,
-+			PUNIT_OPCODE_REG_WRITE, addr, &val);
- 	mutex_unlock(&dev_priv->dpio_lock);
--
--	return ret;
- }
- 
--int vlv_nc_read(struct drm_i915_private *dev_priv, u8 addr, u32 *val)
-+u32 vlv_nc_read(struct drm_i915_private *dev_priv, u8 addr)
- {
--	int ret;
-+	u32 val = 0;
- 
- 	WARN_ON(!mutex_is_locked(&dev_priv->rps.hw_lock));
- 
- 	mutex_lock(&dev_priv->dpio_lock);
--	ret = vlv_sideband_rw(dev_priv, PCI_DEVFN(2, 0), IOSF_PORT_NC,
--			      PUNIT_OPCODE_REG_READ, addr, val);
-+	vlv_sideband_rw(dev_priv, PCI_DEVFN(2, 0), IOSF_PORT_NC,
-+			PUNIT_OPCODE_REG_READ, addr, &val);
- 	mutex_unlock(&dev_priv->dpio_lock);
- 
--	return ret;
-+	return val;
- }
- 
- u32 vlv_dpio_read(struct drm_i915_private *dev_priv, int reg)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0188-drm-i915-add-enable-argument-to-intel_update_sprite_.patch b/patches.baytrail/0188-drm-i915-add-enable-argument-to-intel_update_sprite_.patch
deleted file mode 100644
index 4670c7744c6c4..0000000000000
--- a/patches.baytrail/0188-drm-i915-add-enable-argument-to-intel_update_sprite_.patch
+++ /dev/null
@@ -1,142 +0,0 @@
-From 41752b19eecbd28f97f57d19cf6d08415bbd3e45 Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Fri, 24 May 2013 11:59:17 -0300
-Subject: drm/i915: add "enable" argument to intel_update_sprite_watermarks
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Because we want to call it from the "sprite disable" paths, since on
-Haswell we need to update the sprite watermarks when we disable
-sprites.
-
-For now, all this patch does is to add the "enable" argument and call
-intel_update_sprite_watermarks from inside ivb_disable_plane. This
-shouldn't change how the code behaves because on
-sandybridge_update_sprite_wm we just ignore the "!enable" case. The
-patches that implement Haswell watermarks will make use of the changes
-introduced by this patch.
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 4c4ff43a692b44c6e326f9f28208f3d78ea51f7e)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h     |  3 ++-
- drivers/gpu/drm/i915/intel_drv.h    |  2 +-
- drivers/gpu/drm/i915/intel_pm.c     | 11 ++++++++---
- drivers/gpu/drm/i915/intel_sprite.c |  8 +++++---
- 4 files changed, 16 insertions(+), 8 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 5161c2c7487f..db0a41cf0d49 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -315,7 +315,8 @@ struct drm_i915_display_funcs {
- 	int (*get_fifo_size)(struct drm_device *dev, int plane);
- 	void (*update_wm)(struct drm_device *dev);
- 	void (*update_sprite_wm)(struct drm_device *dev, int pipe,
--				 uint32_t sprite_width, int pixel_size);
-+				 uint32_t sprite_width, int pixel_size,
-+				 bool enable);
- 	void (*modeset_global_resources)(struct drm_device *dev);
- 	/* Returns the active state of the crtc, and if the crtc is active,
- 	 * fills out the pipe-config with the hw state. */
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index 928368a93f74..cfc24a2257f4 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -731,7 +731,7 @@ extern void intel_ddi_init(struct drm_device *dev, enum port port);
- extern void intel_update_watermarks(struct drm_device *dev);
- extern void intel_update_sprite_watermarks(struct drm_device *dev, int pipe,
- 					   uint32_t sprite_width,
--					   int pixel_size);
-+					   int pixel_size, bool enable);
- 
- extern unsigned long intel_gen4_compute_page_offset(int *x, int *y,
- 						    unsigned int tiling_mode,
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 914257501006..0273da696394 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2195,7 +2195,8 @@ sandybridge_compute_sprite_srwm(struct drm_device *dev, int plane,
- }
- 
- static void sandybridge_update_sprite_wm(struct drm_device *dev, int pipe,
--					 uint32_t sprite_width, int pixel_size)
-+					 uint32_t sprite_width, int pixel_size,
-+					 bool enable)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	int latency = SNB_READ_WM0_LATENCY() * 100;	/* In unit 0.1us */
-@@ -2203,6 +2204,9 @@ static void sandybridge_update_sprite_wm(struct drm_device *dev, int pipe,
- 	int sprite_wm, reg;
- 	int ret;
- 
-+	if (!enable)
-+		return;
-+
- 	switch (pipe) {
- 	case 0:
- 		reg = WM0_PIPEA_ILK;
-@@ -2314,13 +2318,14 @@ void intel_update_watermarks(struct drm_device *dev)
- }
- 
- void intel_update_sprite_watermarks(struct drm_device *dev, int pipe,
--				    uint32_t sprite_width, int pixel_size)
-+				    uint32_t sprite_width, int pixel_size,
-+				    bool enable)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 
- 	if (dev_priv->display.update_sprite_wm)
- 		dev_priv->display.update_sprite_wm(dev, pipe, sprite_width,
--						   pixel_size);
-+						   pixel_size, enable);
- }
- 
- static struct drm_i915_gem_object *
-diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
-index 19b9cb961b5a..04d38d4d811a 100644
---- a/drivers/gpu/drm/i915/intel_sprite.c
-+++ b/drivers/gpu/drm/i915/intel_sprite.c
-@@ -114,7 +114,7 @@ vlv_update_plane(struct drm_plane *dplane, struct drm_framebuffer *fb,
- 	crtc_w--;
- 	crtc_h--;
- 
--	intel_update_sprite_watermarks(dev, pipe, crtc_w, pixel_size);
-+	intel_update_sprite_watermarks(dev, pipe, crtc_w, pixel_size, true);
- 
- 	I915_WRITE(SPSTRIDE(pipe, plane), fb->pitches[0]);
- 	I915_WRITE(SPPOS(pipe, plane), (crtc_y << 16) | crtc_x);
-@@ -268,7 +268,7 @@ ivb_update_plane(struct drm_plane *plane, struct drm_framebuffer *fb,
- 	crtc_w--;
- 	crtc_h--;
- 
--	intel_update_sprite_watermarks(dev, pipe, crtc_w, pixel_size);
-+	intel_update_sprite_watermarks(dev, pipe, crtc_w, pixel_size, true);
- 
- 	/*
- 	 * IVB workaround: must disable low power watermarks for at least
-@@ -335,6 +335,8 @@ ivb_disable_plane(struct drm_plane *plane)
- 
- 	dev_priv->sprite_scaling_enabled &= ~(1 << pipe);
- 
-+	intel_update_sprite_watermarks(dev, pipe, 0, 0, false);
-+
- 	/* potentially re-enable LP watermarks */
- 	if (scaling_was_enabled && !dev_priv->sprite_scaling_enabled)
- 		intel_update_watermarks(dev);
-@@ -453,7 +455,7 @@ ilk_update_plane(struct drm_plane *plane, struct drm_framebuffer *fb,
- 	crtc_w--;
- 	crtc_h--;
- 
--	intel_update_sprite_watermarks(dev, pipe, crtc_w, pixel_size);
-+	intel_update_sprite_watermarks(dev, pipe, crtc_w, pixel_size, true);
- 
- 	dvsscale = 0;
- 	if (IS_GEN5(dev) || crtc_w != src_w || crtc_h != src_h)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0189-drm-i915-add-haswell_update_sprite_wm.patch b/patches.baytrail/0189-drm-i915-add-haswell_update_sprite_wm.patch
deleted file mode 100644
index 01dbff9d5c6bb..0000000000000
--- a/patches.baytrail/0189-drm-i915-add-haswell_update_sprite_wm.patch
+++ /dev/null
@@ -1,98 +0,0 @@
-From ea067f886b0f3014da486f0714f394e88999835c Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Fri, 24 May 2013 11:59:18 -0300
-Subject: drm/i915: add haswell_update_sprite_wm
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-On Haswell, whenever we change the sprites we need to completely
-recalculate all the watermarks, because the sprites are one of the
-parameters to the LP watermarks, so a change on the sprites may
-trigger a change on which LP levels are enabled.
-
-So on this commit we store all the parameters we need to store for
-proper recalculation of the Haswell WMs and then call
-haswell_update_wm.
-
-Notice that for now our haswell_update_wm function is not really using
-these parameters we're storing, but on the next commits we'll use
-these parameters.
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 526682e9fabf22e82a02383e8f864a7330b73b25)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_drv.h | 12 ++++++++++++
- drivers/gpu/drm/i915/intel_pm.c  | 23 ++++++++++++++++++++++-
- 2 files changed, 34 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index cfc24a2257f4..c02bc97e350d 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -326,6 +326,18 @@ struct intel_plane {
- 	unsigned int crtc_w, crtc_h;
- 	uint32_t src_x, src_y;
- 	uint32_t src_w, src_h;
-+
-+	/* Since we need to change the watermarks before/after
-+	 * enabling/disabling the planes, we need to store the parameters here
-+	 * as the other pieces of the struct may not reflect the values we want
-+	 * for the watermark calculations. Currently only Haswell uses this.
-+	 */
-+	struct {
-+		bool enable;
-+		uint8_t bytes_per_pixel;
-+		uint32_t horiz_pixels;
-+	} wm;
-+
- 	void (*update_plane)(struct drm_plane *plane,
- 			     struct drm_framebuffer *fb,
- 			     struct drm_i915_gem_object *obj,
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 0273da696394..6d189cde8591 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2118,6 +2118,26 @@ static void haswell_update_wm(struct drm_device *dev)
- 	sandybridge_update_wm(dev);
- }
- 
-+static void haswell_update_sprite_wm(struct drm_device *dev, int pipe,
-+				     uint32_t sprite_width, int pixel_size,
-+				     bool enable)
-+{
-+	struct drm_plane *plane;
-+
-+	list_for_each_entry(plane, &dev->mode_config.plane_list, head) {
-+		struct intel_plane *intel_plane = to_intel_plane(plane);
-+
-+		if (intel_plane->pipe == pipe) {
-+			intel_plane->wm.enable = enable;
-+			intel_plane->wm.horiz_pixels = sprite_width + 1;
-+			intel_plane->wm.bytes_per_pixel = pixel_size;
-+			break;
-+		}
-+	}
-+
-+	haswell_update_wm(dev);
-+}
-+
- static bool
- sandybridge_compute_sprite_wm(struct drm_device *dev, int plane,
- 			      uint32_t sprite_width, int pixel_size,
-@@ -4631,7 +4651,8 @@ void intel_init_pm(struct drm_device *dev)
- 		} else if (IS_HASWELL(dev)) {
- 			if (I915_READ64(MCH_SSKPD)) {
- 				dev_priv->display.update_wm = haswell_update_wm;
--				dev_priv->display.update_sprite_wm = sandybridge_update_sprite_wm;
-+				dev_priv->display.update_sprite_wm =
-+					haswell_update_sprite_wm;
- 			} else {
- 				DRM_DEBUG_KMS("Failed to read display plane latency. "
- 					      "Disable CxSR\n");
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0190-drm-i915-pass-seqno-to-i915_hangcheck_ring_idle.patch b/patches.baytrail/0190-drm-i915-pass-seqno-to-i915_hangcheck_ring_idle.patch
deleted file mode 100644
index 7411a19e7e4f7..0000000000000
--- a/patches.baytrail/0190-drm-i915-pass-seqno-to-i915_hangcheck_ring_idle.patch
+++ /dev/null
@@ -1,52 +0,0 @@
-From 2c68ed1c6ef46f4c22bb63215d63e284f59243be Mon Sep 17 00:00:00 2001
-From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
-Date: Mon, 13 May 2013 16:32:09 +0300
-Subject: drm/i915: pass seqno to i915_hangcheck_ring_idle
-
-In preparation for next commit, pass seqno as a parameter
-to i915_hangcheck_ring_idle as it will be used inside
-i915_hangcheck_elapsed.
-
-Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 79ee20dc85072b0edfb5e461799d192a9cc9d422)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 11 +++++++----
- 1 file changed, 7 insertions(+), 4 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index 6b9bc815cc70..3920c26d56ca 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -2311,11 +2311,11 @@ ring_last_seqno(struct intel_ring_buffer *ring)
- 			  struct drm_i915_gem_request, list)->seqno;
- }
- 
--static bool i915_hangcheck_ring_idle(struct intel_ring_buffer *ring, bool *err)
-+static bool i915_hangcheck_ring_idle(struct intel_ring_buffer *ring,
-+				     u32 ring_seqno, bool *err)
- {
- 	if (list_empty(&ring->request_list) ||
--	    i915_seqno_passed(ring->get_seqno(ring, false),
--			      ring_last_seqno(ring))) {
-+	    i915_seqno_passed(ring_seqno, ring_last_seqno(ring))) {
- 		/* Issue a wake-up to catch stuck h/w. */
- 		if (waitqueue_active(&ring->irq_queue)) {
- 			DRM_ERROR("Hangcheck timer elapsed... %s idle\n",
-@@ -2432,7 +2432,10 @@ void i915_hangcheck_elapsed(unsigned long data)
- 	memset(acthd, 0, sizeof(acthd));
- 	idle = true;
- 	for_each_ring(ring, dev_priv, i) {
--	    idle &= i915_hangcheck_ring_idle(ring, &err);
-+		u32 seqno;
-+
-+		seqno = ring->get_seqno(ring, false);
-+		idle &= i915_hangcheck_ring_idle(ring, seqno, &err);
- 	    acthd[i] = intel_ring_get_active_head(ring);
- 	}
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0191-drm-i915-track-ring-progression-using-seqnos.patch b/patches.baytrail/0191-drm-i915-track-ring-progression-using-seqnos.patch
deleted file mode 100644
index 3a6065191a66c..0000000000000
--- a/patches.baytrail/0191-drm-i915-track-ring-progression-using-seqnos.patch
+++ /dev/null
@@ -1,126 +0,0 @@
-From 9f3f987cb1f2ebc32e2442b63a4b0e75c648f45f Mon Sep 17 00:00:00 2001
-From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
-Date: Fri, 24 May 2013 17:16:07 +0300
-Subject: drm/i915: track ring progression using seqnos
-
-Instead of relying in acthd, track ring seqno progression
-to detect if ring has hung.
-
-v2: put hangcheck stuff inside struct (Chris Wilson)
-
-v3: initialize hangcheck.seqno (Ben Widawsky)
-
-Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 92cab7345131db7af18f630a799ce6b2e8e624c5)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h         |    2 --
- drivers/gpu/drm/i915/i915_irq.c         |   30 +++++++++++++-----------------
- drivers/gpu/drm/i915/intel_ringbuffer.c |    1 +
- drivers/gpu/drm/i915/intel_ringbuffer.h |    6 ++++++
- 4 files changed, 20 insertions(+), 19 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -843,8 +843,6 @@ struct i915_gpu_error {
- #define DRM_I915_HANGCHECK_JIFFIES msecs_to_jiffies(DRM_I915_HANGCHECK_PERIOD)
- 	struct timer_list hangcheck_timer;
- 	int hangcheck_count;
--	uint32_t last_acthd[I915_NUM_RINGS];
--	uint32_t prev_instdone[I915_NUM_INSTDONE_REG];
- 
- 	/* For reset and error_state handling. */
- 	spinlock_t lock;
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -2421,22 +2421,19 @@ void i915_hangcheck_elapsed(unsigned lon
- {
- 	struct drm_device *dev = (struct drm_device *)data;
- 	drm_i915_private_t *dev_priv = dev->dev_private;
--	uint32_t acthd[I915_NUM_RINGS], instdone[I915_NUM_INSTDONE_REG];
- 	struct intel_ring_buffer *ring;
- 	bool err = false, idle;
- 	int i;
-+	u32 seqno[I915_NUM_RINGS];
-+	bool work_done;
- 
- 	if (!i915_enable_hangcheck)
- 		return;
- 
--	memset(acthd, 0, sizeof(acthd));
- 	idle = true;
- 	for_each_ring(ring, dev_priv, i) {
--		u32 seqno;
--
--		seqno = ring->get_seqno(ring, false);
--		idle &= i915_hangcheck_ring_idle(ring, seqno, &err);
--	    acthd[i] = intel_ring_get_active_head(ring);
-+		seqno[i] = ring->get_seqno(ring, false);
-+		idle &= i915_hangcheck_ring_idle(ring, seqno[i], &err);
- 	}
- 
- 	/* If all work is done then ACTHD clearly hasn't advanced. */
-@@ -2452,20 +2449,19 @@ void i915_hangcheck_elapsed(unsigned lon
- 		return;
- 	}
- 
--	i915_get_extra_instdone(dev, instdone);
--	if (memcmp(dev_priv->gpu_error.last_acthd, acthd,
--		   sizeof(acthd)) == 0 &&
--	    memcmp(dev_priv->gpu_error.prev_instdone, instdone,
--		   sizeof(instdone)) == 0) {
-+	work_done = false;
-+	for_each_ring(ring, dev_priv, i) {
-+		if (ring->hangcheck.seqno != seqno[i]) {
-+			work_done = true;
-+			ring->hangcheck.seqno = seqno[i];
-+		}
-+	}
-+
-+	if (!work_done) {
- 		if (i915_hangcheck_hung(dev))
- 			return;
- 	} else {
- 		dev_priv->gpu_error.hangcheck_count = 0;
--
--		memcpy(dev_priv->gpu_error.last_acthd, acthd,
--		       sizeof(acthd));
--		memcpy(dev_priv->gpu_error.prev_instdone, instdone,
--		       sizeof(instdone));
- 	}
- 
- repeat:
---- a/drivers/gpu/drm/i915/intel_ringbuffer.c
-+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
-@@ -1517,6 +1517,7 @@ void intel_ring_init_seqno(struct intel_
- 	}
- 
- 	ring->set_seqno(ring, seqno);
-+	ring->hangcheck.seqno = seqno;
- }
- 
- void intel_ring_advance(struct intel_ring_buffer *ring)
---- a/drivers/gpu/drm/i915/intel_ringbuffer.h
-+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
-@@ -37,6 +37,10 @@ struct  intel_hw_status_page {
- #define I915_READ_SYNC_0(ring) I915_READ(RING_SYNC_0((ring)->mmio_base))
- #define I915_READ_SYNC_1(ring) I915_READ(RING_SYNC_1((ring)->mmio_base))
- 
-+struct intel_ring_hangcheck {
-+	u32 seqno;
-+};
-+
- struct  intel_ring_buffer {
- 	const char	*name;
- 	enum intel_ring_id {
-@@ -137,6 +141,8 @@ struct  intel_ring_buffer {
- 	struct i915_hw_context *default_context;
- 	struct i915_hw_context *last_context;
- 
-+	struct intel_ring_hangcheck hangcheck;
-+
- 	void *private;
- };
- 
diff --git a/patches.baytrail/0192-drm-i915-introduce-i915_hangcheck_ring_hung.patch b/patches.baytrail/0192-drm-i915-introduce-i915_hangcheck_ring_hung.patch
deleted file mode 100644
index 27328f06cf4ea..0000000000000
--- a/patches.baytrail/0192-drm-i915-introduce-i915_hangcheck_ring_hung.patch
+++ /dev/null
@@ -1,72 +0,0 @@
-From 5dc06cf1f4a0e0ece5e4920226210238cc9c2e77 Mon Sep 17 00:00:00 2001
-From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
-Date: Mon, 13 May 2013 16:32:11 +0300
-Subject: drm/i915: introduce i915_hangcheck_ring_hung
-
-In preparation to track per ring progress in hangcheck,
-add i915_hangcheck_ring_hung.
-
-v2: omit dev parameter (Ben Widawsky)
-
-Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit ed5cbb0355779dc5516b2f7b62cedce185b00439)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 29 +++++++++++++++++------------
- 1 file changed, 17 insertions(+), 12 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index ef31d00fbf1e..427cf89923aa 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -2382,28 +2382,33 @@ static bool kick_ring(struct intel_ring_buffer *ring)
- 	return false;
- }
- 
-+static bool i915_hangcheck_ring_hung(struct intel_ring_buffer *ring)
-+{
-+	if (IS_GEN2(ring->dev))
-+		return false;
-+
-+	/* Is the chip hanging on a WAIT_FOR_EVENT?
-+	 * If so we can simply poke the RB_WAIT bit
-+	 * and break the hang. This should work on
-+	 * all but the second generation chipsets.
-+	 */
-+	return !kick_ring(ring);
-+}
-+
- static bool i915_hangcheck_hung(struct drm_device *dev)
- {
- 	drm_i915_private_t *dev_priv = dev->dev_private;
- 
- 	if (dev_priv->gpu_error.hangcheck_count++ > 1) {
- 		bool hung = true;
-+		struct intel_ring_buffer *ring;
-+		int i;
- 
- 		DRM_ERROR("Hangcheck timer elapsed... GPU hung\n");
- 		i915_handle_error(dev, true);
- 
--		if (!IS_GEN2(dev)) {
--			struct intel_ring_buffer *ring;
--			int i;
--
--			/* Is the chip hanging on a WAIT_FOR_EVENT?
--			 * If so we can simply poke the RB_WAIT bit
--			 * and break the hang. This should work on
--			 * all but the second generation chipsets.
--			 */
--			for_each_ring(ring, dev_priv, i)
--				hung &= !kick_ring(ring);
--		}
-+		for_each_ring(ring, dev_priv, i)
-+			hung &= i915_hangcheck_ring_hung(ring);
- 
- 		return hung;
- 	}
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0193-drm-i915-Fix-error-state-memory-leaks.patch b/patches.baytrail/0193-drm-i915-Fix-error-state-memory-leaks.patch
deleted file mode 100644
index c4dfb7d7e8df5..0000000000000
--- a/patches.baytrail/0193-drm-i915-Fix-error-state-memory-leaks.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From c9f4de633274816bd2d74bfd4702cd96398f9e66 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Sat, 25 May 2013 14:42:54 -0700
-Subject: drm/i915: Fix error state memory leaks
-
-Found with kmemleak.
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 7ed73da0eac4e2e06c06e8baf518e124fc1f6a17)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index 427cf89923aa..e8b5d548230e 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -1589,11 +1589,13 @@ i915_error_state_free(struct kref *error_ref)
- 	for (i = 0; i < ARRAY_SIZE(error->ring); i++) {
- 		i915_error_object_free(error->ring[i].batchbuffer);
- 		i915_error_object_free(error->ring[i].ringbuffer);
-+		i915_error_object_free(error->ring[i].ctx);
- 		kfree(error->ring[i].requests);
- 	}
- 
- 	kfree(error->active_bo);
- 	kfree(error->overlay);
-+	kfree(error->display);
- 	kfree(error);
- }
- static void capture_bo(struct drm_i915_error_buffer *err,
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0194-drm-i915-pre-fixes-for-checkpatch.patch b/patches.baytrail/0194-drm-i915-pre-fixes-for-checkpatch.patch
deleted file mode 100644
index 266da726bc5fe..0000000000000
--- a/patches.baytrail/0194-drm-i915-pre-fixes-for-checkpatch.patch
+++ /dev/null
@@ -1,69 +0,0 @@
-From ae75c68006432d74c83d2f50d8cd4c9038a249b0 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Sat, 25 May 2013 12:26:35 -0700
-Subject: drm/i915: pre-fixes for checkpatch
-
-Since I'll need to modify i915_gem_object_bind_to_gtt(), fix the errors
-now to get checkpatch to not complain.
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-[danvet: Resolve conflict with Chris' improved debug output, and
-bikeshed the new variable with s/max/gtt_max/ a bit while at it.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 0a9ae0d7f8249da5906c8cac7d56768975c38de4)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem.c | 19 ++++++++-----------
- 1 file changed, 8 insertions(+), 11 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index 229089c83f25..03103eb57e32 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -3000,6 +3000,8 @@ i915_gem_object_bind_to_gtt(struct drm_i915_gem_object *obj,
- 	struct drm_mm_node *node;
- 	u32 size, fence_size, fence_alignment, unfenced_alignment;
- 	bool mappable, fenceable;
-+	size_t gtt_max = map_and_fenceable ?
-+		dev_priv->gtt.mappable_end : dev_priv->gtt.total;
- 	int ret;
- 
- 	fence_size = i915_gem_get_gtt_size(dev,
-@@ -3026,12 +3028,11 @@ i915_gem_object_bind_to_gtt(struct drm_i915_gem_object *obj,
- 	/* If the object is bigger than the entire aperture, reject it early
- 	 * before evicting everything in a vain attempt to find space.
- 	 */
--	if (obj->base.size >
--	    (map_and_fenceable ? dev_priv->gtt.mappable_end : dev_priv->gtt.total)) {
-+	if (obj->base.size > gtt_max) {
- 		DRM_ERROR("Attempting to bind an object larger than the aperture: object=%zd > %s aperture=%ld\n",
- 			  obj->base.size,
- 			  map_and_fenceable ? "mappable" : "total",
--			  map_and_fenceable ? dev_priv->gtt.mappable_end : dev_priv->gtt.total);
-+			  gtt_max);
- 		return -E2BIG;
- 	}
- 
-@@ -3047,14 +3048,10 @@ i915_gem_object_bind_to_gtt(struct drm_i915_gem_object *obj,
- 		return -ENOMEM;
- 	}
- 
-- search_free:
--	if (map_and_fenceable)
--		ret = drm_mm_insert_node_in_range_generic(&dev_priv->mm.gtt_space, node,
--							  size, alignment, obj->cache_level,
--							  0, dev_priv->gtt.mappable_end);
--	else
--		ret = drm_mm_insert_node_generic(&dev_priv->mm.gtt_space, node,
--						 size, alignment, obj->cache_level);
-+search_free:
-+	ret = drm_mm_insert_node_in_range_generic(&dev_priv->mm.gtt_space, node,
-+						  size, alignment,
-+						  obj->cache_level, 0, gtt_max);
- 	if (ret) {
- 		ret = i915_gem_evict_something(dev, size, alignment,
- 					       obj->cache_level,
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0195-drm-i915-use-mappable-size-for-fb-kickout.patch b/patches.baytrail/0195-drm-i915-use-mappable-size-for-fb-kickout.patch
deleted file mode 100644
index 44cc4e91daa46..0000000000000
--- a/patches.baytrail/0195-drm-i915-use-mappable-size-for-fb-kickout.patch
+++ /dev/null
@@ -1,40 +0,0 @@
-From 20c2d0a631c088478598f0e4c8790f5a129a22cf Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Sat, 25 May 2013 12:26:36 -0700
-Subject: drm/i915: use mappable size for fb kickout
-
-The GTT start is either 0 in the KMS case, or some value which is set
-only after the init IOCTL in the UMS case. In both cases, we don't have
-this information until after we've tried to kick out the firmware fb.
-
-This patch should have no functional change since we kzalloc the GTT
-struct anyway. It only clarifies the situation for people who end up
-having to look at that code.
-
-This weirdness was introduced in:
-
-commit 93d187993b783c68383a884091a600d9ad499ea6
-Author: Ben Widawsky <ben@bwidawsk.net>
-Date:   Thu Jan 17 12:45:17 2013 -0800
-
-    drm/i915: Remove use of gtt_mappable_entries
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit f64e29227d80cc15c37c7dbf7030ffc8c415cbd4)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_dma.c |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/gpu/drm/i915/i915_dma.c
-+++ b/drivers/gpu/drm/i915/i915_dma.c
-@@ -1415,7 +1415,7 @@ static void i915_kick_out_firmware_fb(st
- 		return;
- 
- 	ap->ranges[0].base = dev_priv->gtt.mappable_base;
--	ap->ranges[0].size = dev_priv->gtt.mappable_end - dev_priv->gtt.start;
-+	ap->ranges[0].size = dev_priv->gtt.mappable_end;
- 
- 	primary =
- 		pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
diff --git a/patches.baytrail/0196-drm-i915-use-drm_mm_takedown.patch b/patches.baytrail/0196-drm-i915-use-drm_mm_takedown.patch
deleted file mode 100644
index a437000231996..0000000000000
--- a/patches.baytrail/0196-drm-i915-use-drm_mm_takedown.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From ad96fe201090c5d229cf892258fc504496513f14 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Sat, 25 May 2013 12:26:37 -0700
-Subject: drm/i915: use drm_mm_takedown
-
-I noticed this while doing the VMA abstraction. AFAICT, it won't
-actually fix anything, but it is the correct thing to do.
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit dd62eabd1d54336a2d5d3758ab4393cd13254102)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_dma.c |    2 ++
- 1 file changed, 2 insertions(+)
-
---- a/drivers/gpu/drm/i915/i915_dma.c
-+++ b/drivers/gpu/drm/i915/i915_dma.c
-@@ -1368,6 +1368,7 @@ cleanup_gem:
- 	i915_gem_cleanup_ringbuffer(dev);
- 	mutex_unlock(&dev->struct_mutex);
- 	i915_gem_cleanup_aliasing_ppgtt(dev);
-+	drm_mm_takedown(&dev_priv->mm.gtt_space);
- cleanup_irq:
- 	drm_irq_uninstall(dev);
- cleanup_gem_stolen:
-@@ -1755,6 +1756,7 @@ int i915_driver_unload(struct drm_device
- 			i915_free_hws(dev);
- 	}
- 
-+	drm_mm_takedown(&dev_priv->mm.gtt_space);
- 	if (dev_priv->regs != NULL)
- 		pci_iounmap(dev->pdev, dev_priv->regs);
- 
diff --git a/patches.baytrail/0197-drm-i915-context-debug-messages.patch b/patches.baytrail/0197-drm-i915-context-debug-messages.patch
deleted file mode 100644
index 3b0dc93a2b945..0000000000000
--- a/patches.baytrail/0197-drm-i915-context-debug-messages.patch
+++ /dev/null
@@ -1,82 +0,0 @@
-From a6993f7806610ac625570222337c16a91951decc Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Sat, 25 May 2013 12:26:38 -0700
-Subject: drm/i915: context debug messages
-
-Add some debug messages to help figure out what goes wrong on context
-initialization.
-
-Later in the PPGTT series, I ended up having a lot of failures after
-reset. In many cases it was extra difficult to debug because I hadn't
-even realized that contexts failed to reinitialize after reset (again an
-artifact of some later patches).
-
-This fairly benign patch does help debug some potential issues which
-arise later.
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit bb0364130fb0d272c838149b2ffe698a6c7afbfc)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem_context.c | 14 +++++++++++---
- 1 file changed, 11 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
-index 59b536a7f773..b3be2946e6db 100644
---- a/drivers/gpu/drm/i915/i915_gem_context.c
-+++ b/drivers/gpu/drm/i915/i915_gem_context.c
-@@ -156,7 +156,8 @@ create_hw_context(struct drm_device *dev,
- 	if (INTEL_INFO(dev)->gen >= 7) {
- 		ret = i915_gem_object_set_cache_level(ctx->obj,
- 						      I915_CACHE_LLC_MLC);
--		if (ret)
-+		/* Failure shouldn't ever happen this early */
-+		if (WARN_ON(ret))
- 			goto err_out;
- 	}
- 
-@@ -214,12 +215,16 @@ static int create_default_context(struct drm_i915_private *dev_priv)
- 	 */
- 	dev_priv->ring[RCS].default_context = ctx;
- 	ret = i915_gem_object_pin(ctx->obj, CONTEXT_ALIGN, false, false);
--	if (ret)
-+	if (ret) {
-+		DRM_DEBUG_DRIVER("Couldn't pin %d\n", ret);
- 		goto err_destroy;
-+	}
- 
- 	ret = do_switch(ctx);
--	if (ret)
-+	if (ret) {
-+		DRM_DEBUG_DRIVER("Switch failed %d\n", ret);
- 		goto err_unpin;
-+	}
- 
- 	DRM_DEBUG_DRIVER("Default HW context loaded\n");
- 	return 0;
-@@ -237,6 +242,7 @@ void i915_gem_context_init(struct drm_device *dev)
- 
- 	if (!HAS_HW_CONTEXTS(dev)) {
- 		dev_priv->hw_contexts_disabled = true;
-+		DRM_DEBUG_DRIVER("Disabling HW Contexts; old hardware\n");
- 		return;
- 	}
- 
-@@ -249,11 +255,13 @@ void i915_gem_context_init(struct drm_device *dev)
- 
- 	if (dev_priv->hw_context_size > (1<<20)) {
- 		dev_priv->hw_contexts_disabled = true;
-+		DRM_DEBUG_DRIVER("Disabling HW Contexts; invalid size\n");
- 		return;
- 	}
- 
- 	if (create_default_context(dev_priv)) {
- 		dev_priv->hw_contexts_disabled = true;
-+		DRM_DEBUG_DRIVER("Disabling HW Contexts; create failed\n");
- 		return;
- 	}
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0198-drm-i915-Call-context-fini-at-cleanup.patch b/patches.baytrail/0198-drm-i915-Call-context-fini-at-cleanup.patch
deleted file mode 100644
index 1bf6bd5446dbd..0000000000000
--- a/patches.baytrail/0198-drm-i915-Call-context-fini-at-cleanup.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From 75ee4b5cd86b57376566578871801ab841293b76 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Sat, 25 May 2013 12:26:39 -0700
-Subject: drm/i915: Call context fini at cleanup
-
-If contexts were actually initialized, and we fail somewhere later during
-init this would possibly leak memory, and lead to some error messages
-about unclean takedown. As the odds of this occurring, and someone
-actually caring/noticing are pretty slim, the patch isn't terribly
-important.
-
-Found by code inspection while working on something else.
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 55d23285745b1be7bd25a2a4ba5ba79e05ab843a)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_dma.c |    1 +
- 1 file changed, 1 insertion(+)
-
---- a/drivers/gpu/drm/i915/i915_dma.c
-+++ b/drivers/gpu/drm/i915/i915_dma.c
-@@ -1366,6 +1366,7 @@ static int i915_load_modeset_init(struct
- cleanup_gem:
- 	mutex_lock(&dev->struct_mutex);
- 	i915_gem_cleanup_ringbuffer(dev);
-+	i915_gem_context_fini(dev);
- 	mutex_unlock(&dev->struct_mutex);
- 	i915_gem_cleanup_aliasing_ppgtt(dev);
- 	drm_mm_takedown(&dev_priv->mm.gtt_space);
diff --git a/patches.baytrail/0199-drm-i915-release-scratch-page-at-module-unload.patch b/patches.baytrail/0199-drm-i915-release-scratch-page-at-module-unload.patch
deleted file mode 100644
index 34817fc16e52d..0000000000000
--- a/patches.baytrail/0199-drm-i915-release-scratch-page-at-module-unload.patch
+++ /dev/null
@@ -1,25 +0,0 @@
-From 855063179f42046e992a4c9be21c7d524c6c33f6 Mon Sep 17 00:00:00 2001
-From: Imre Deak <imre.deak@intel.com>
-Date: Wed, 22 May 2013 17:47:13 +0300
-Subject: drm/i915: release scratch page at module unload
-
-Signed-off-by: Imre Deak <imre.deak@intel.com>
-Acked-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 6640aab6f2aed89470bc44c7450b7573659e651e)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_dma.c |    2 ++
- 1 file changed, 2 insertions(+)
-
---- a/drivers/gpu/drm/i915/i915_dma.c
-+++ b/drivers/gpu/drm/i915/i915_dma.c
-@@ -1767,6 +1767,8 @@ int i915_driver_unload(struct drm_device
- 	destroy_workqueue(dev_priv->wq);
- 	pm_qos_remove_request(&dev_priv->pm_qos);
- 
-+	dev_priv->gtt.gtt_remove(dev);
-+
- 	if (dev_priv->slab)
- 		kmem_cache_destroy(dev_priv->slab);
- 
diff --git a/patches.baytrail/0200-drm-i915-stop-using-is_cpu_edp-in-intel_disable-post.patch b/patches.baytrail/0200-drm-i915-stop-using-is_cpu_edp-in-intel_disable-post.patch
deleted file mode 100644
index baccb7c57ce59..0000000000000
--- a/patches.baytrail/0200-drm-i915-stop-using-is_cpu_edp-in-intel_disable-post.patch
+++ /dev/null
@@ -1,64 +0,0 @@
-From 129dee5cd83f425ca16f18ac329b626f18711625 Mon Sep 17 00:00:00 2001
-From: Imre Deak <imre.deak@intel.com>
-Date: Thu, 23 May 2013 19:39:40 +0300
-Subject: drm/i915: stop using is_cpu_edp() in intel_disable/post_disable_dp
-
-Based on 3739850b46f - "drm/i915: disable the cpu edp port after the
-cpu pipe" and the bspec disabling sequence for IVB and older it seems we
-have to distinguish only the CPU vs. PCH port case, whether it's a DP or
-eDP doesn't seem to matter. For IVB and older on the CPU side we can
-only have eDP on port A, DP ports can only be on the PCH side. On VLV we
-have only CPU side eDP/DP ports, no PCH. So the condition for the
-disabling sequence we need for CPU ports is port == A || IS_VLV.
-
-This allows us to remove is_cpu_edp() completely in a later patch.
-
-v2:
-- simplify (and fix) the condition for CPU side ports and adjust the
-  commit message accordingly (Daniel)
-
-Signed-off-by: Imre Deak <imre.deak@intel.com>
-Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 982a38667dd9f175f8dd8a78651426ae6baac463)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_dp.c | 7 +++++--
- 1 file changed, 5 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
-index e21d98621078..af8bca7f1745 100644
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -1392,6 +1392,8 @@ static void intel_dp_get_config(struct intel_encoder *encoder,
- static void intel_disable_dp(struct intel_encoder *encoder)
- {
- 	struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
-+	enum port port = dp_to_dig_port(intel_dp)->port;
-+	struct drm_device *dev = encoder->base.dev;
- 
- 	/* Make sure the panel is off before trying to change the mode. But also
- 	 * ensure that we have vdd while we switch off the panel. */
-@@ -1401,16 +1403,17 @@ static void intel_disable_dp(struct intel_encoder *encoder)
- 	ironlake_edp_panel_off(intel_dp);
- 
- 	/* cpu edp my only be disable _after_ the cpu pipe/plane is disabled. */
--	if (!is_cpu_edp(intel_dp))
-+	if (!(port == PORT_A || IS_VALLEYVIEW(dev)))
- 		intel_dp_link_down(intel_dp);
- }
- 
- static void intel_post_disable_dp(struct intel_encoder *encoder)
- {
- 	struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
-+	enum port port = dp_to_dig_port(intel_dp)->port;
- 	struct drm_device *dev = encoder->base.dev;
- 
--	if (is_cpu_edp(intel_dp)) {
-+	if (port == PORT_A || IS_VALLEYVIEW(dev)) {
- 		intel_dp_link_down(intel_dp);
- 		if (!IS_VALLEYVIEW(dev))
- 			ironlake_edp_pll_off(intel_dp);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0201-drm-i915-merge-VLV-eDP-and-DP-AUX-clock-divider-calc.patch b/patches.baytrail/0201-drm-i915-merge-VLV-eDP-and-DP-AUX-clock-divider-calc.patch
deleted file mode 100644
index 5a73badf80fab..0000000000000
--- a/patches.baytrail/0201-drm-i915-merge-VLV-eDP-and-DP-AUX-clock-divider-calc.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From 6bee0308a9bc75184521e11ae551a11d670f1ede Mon Sep 17 00:00:00 2001
-From: Imre Deak <imre.deak@intel.com>
-Date: Thu, 16 May 2013 14:40:35 +0300
-Subject: drm/i915: merge VLV eDP and DP AUX clock divider calculation
-
-On ValleyView for both eDP and DP the AUX input clock is 200MHz, so we
-can calculate for both the clock divider for the 2MHz target rate at the
-same place. Afterwards we can also replace the is_cpu_edp() check with a
-check for port A.
-
-Signed-off-by: Imre Deak <imre.deak@intel.com>
-Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit a62d0834dee83994e41fcd0e5b7f10aad3d80de0)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_dp.c | 6 +++---
- 1 file changed, 3 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
-index af8bca7f1745..e1d39f2c70fe 100644
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -317,12 +317,12 @@ intel_dp_aux_ch(struct intel_dp *intel_dp,
- 	 * Note that PCH attached eDP panels should use a 125MHz input
- 	 * clock divider.
- 	 */
--	if (is_cpu_edp(intel_dp)) {
-+	if (IS_VALLEYVIEW(dev)) {
-+		aux_clock_divider = 100;
-+	} else if (intel_dig_port->port == PORT_A) {
- 		if (HAS_DDI(dev))
- 			aux_clock_divider = DIV_ROUND_CLOSEST(
- 				intel_ddi_get_cdclk_freq(dev_priv), 2000);
--		else if (IS_VALLEYVIEW(dev))
--			aux_clock_divider = 100;
- 		else if (IS_GEN6(dev) || IS_GEN7(dev))
- 			aux_clock_divider = 200; /* SNB & IVB eDP input clock at 400Mhz */
- 		else
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0202-drm-i915-replace-is_cpu_edp-with-a-check-for-port-A.patch b/patches.baytrail/0202-drm-i915-replace-is_cpu_edp-with-a-check-for-port-A.patch
deleted file mode 100644
index 6ab2430aa9cc9..0000000000000
--- a/patches.baytrail/0202-drm-i915-replace-is_cpu_edp-with-a-check-for-port-A.patch
+++ /dev/null
@@ -1,222 +0,0 @@
-From 836f214d6b146aad6223fd821f97f214ccff155c Mon Sep 17 00:00:00 2001
-From: Imre Deak <imre.deak@intel.com>
-Date: Thu, 16 May 2013 14:40:36 +0300
-Subject: drm/i915: replace is_cpu_edp() with a check for port A
-
-The patch changes all remaining is_cpu_edp() check with a check for port
-A. We can do this, since in all these cases ValleyView is handled
-separately and port A is always a CPU side eDP port.
-
-Signed-off-by: Imre Deak <imre.deak@intel.com>
-Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit bc7d38a43ab1af4cad1c235c3aa30426b6c7d6c5)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_dp.c |   49 ++++++++++++++++++++++------------------
- 1 file changed, 27 insertions(+), 22 deletions(-)
-
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -696,6 +696,7 @@ intel_dp_compute_config(struct intel_enc
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
- 	struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
-+	enum port port = dp_to_dig_port(intel_dp)->port;
- 	struct intel_crtc *intel_crtc = encoder->new_crtc;
- 	struct intel_connector *intel_connector = intel_dp->attached_connector;
- 	int lane_count, clock;
-@@ -705,7 +706,7 @@ intel_dp_compute_config(struct intel_enc
- 	static int bws[2] = { DP_LINK_BW_1_62, DP_LINK_BW_2_7 };
- 	int target_clock, link_avail, link_clock;
- 
--	if (HAS_PCH_SPLIT(dev) && !HAS_DDI(dev) && !is_cpu_edp(intel_dp))
-+	if (HAS_PCH_SPLIT(dev) && !HAS_DDI(dev) && port != PORT_A)
- 		pipe_config->has_pch_encoder = true;
- 
- 	pipe_config->has_dp_encoder = true;
-@@ -848,6 +849,7 @@ intel_dp_mode_set(struct drm_encoder *en
- 	struct drm_device *dev = encoder->dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
-+	enum port port = dp_to_dig_port(intel_dp)->port;
- 	struct drm_crtc *crtc = encoder->crtc;
- 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
- 
-@@ -888,7 +890,7 @@ intel_dp_mode_set(struct drm_encoder *en
- 
- 	/* Split out the IBX/CPU vs CPT settings */
- 
--	if (is_cpu_edp(intel_dp) && IS_GEN7(dev) && !IS_VALLEYVIEW(dev)) {
-+	if (port == PORT_A && IS_GEN7(dev) && !IS_VALLEYVIEW(dev)) {
- 		if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
- 			intel_dp->DP |= DP_SYNC_HS_HIGH;
- 		if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
-@@ -905,7 +907,7 @@ intel_dp_mode_set(struct drm_encoder *en
- 			intel_dp->DP |= DP_PLL_FREQ_160MHZ;
- 		else
- 			intel_dp->DP |= DP_PLL_FREQ_270MHZ;
--	} else if (!HAS_PCH_CPT(dev) || is_cpu_edp(intel_dp)) {
-+	} else if (!HAS_PCH_CPT(dev) || port == PORT_A) {
- 		if (!HAS_PCH_SPLIT(dev) && !IS_VALLEYVIEW(dev))
- 			intel_dp->DP |= intel_dp->color_range;
- 
-@@ -921,7 +923,7 @@ intel_dp_mode_set(struct drm_encoder *en
- 		if (intel_crtc->pipe == 1)
- 			intel_dp->DP |= DP_PIPEB_SELECT;
- 
--		if (is_cpu_edp(intel_dp) && !IS_VALLEYVIEW(dev)) {
-+		if (port == PORT_A && !IS_VALLEYVIEW(dev)) {
- 			/* don't miss out required setting for eDP */
- 			if (adjusted_mode->clock < 200000)
- 				intel_dp->DP |= DP_PLL_FREQ_160MHZ;
-@@ -932,7 +934,7 @@ intel_dp_mode_set(struct drm_encoder *en
- 		intel_dp->DP |= DP_LINK_TRAIN_OFF_CPT;
- 	}
- 
--	if (is_cpu_edp(intel_dp) && !IS_VALLEYVIEW(dev))
-+	if (port == PORT_A && !IS_VALLEYVIEW(dev))
- 		ironlake_set_pll_edp(crtc, adjusted_mode->clock);
- }
- 
-@@ -1322,6 +1324,7 @@ static bool intel_dp_get_hw_state(struct
- 				  enum pipe *pipe)
- {
- 	struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
-+	enum port port = dp_to_dig_port(intel_dp)->port;
- 	struct drm_device *dev = encoder->base.dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	u32 tmp = I915_READ(intel_dp->output_reg);
-@@ -1329,9 +1332,9 @@ static bool intel_dp_get_hw_state(struct
- 	if (!(tmp & DP_PORT_EN))
- 		return false;
- 
--	if (is_cpu_edp(intel_dp) && IS_GEN7(dev) && !IS_VALLEYVIEW(dev)) {
-+	if (port == PORT_A && IS_GEN7(dev) && !IS_VALLEYVIEW(dev)) {
- 		*pipe = PORT_TO_PIPE_CPT(tmp);
--	} else if (!HAS_PCH_CPT(dev) || is_cpu_edp(intel_dp)) {
-+	} else if (!HAS_PCH_CPT(dev) || port == PORT_A) {
- 		*pipe = PORT_TO_PIPE(tmp);
- 	} else {
- 		u32 trans_sel;
-@@ -1451,14 +1454,14 @@ static void intel_enable_dp(struct intel
- static void intel_pre_enable_dp(struct intel_encoder *encoder)
- {
- 	struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
-+	struct intel_digital_port *dport = dp_to_dig_port(intel_dp);
- 	struct drm_device *dev = encoder->base.dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 
--	if (is_cpu_edp(intel_dp) && !IS_VALLEYVIEW(dev))
-+	if (dport->port == PORT_A && !IS_VALLEYVIEW(dev))
- 		ironlake_edp_pll_on(intel_dp);
- 
- 	if (IS_VALLEYVIEW(dev)) {
--		struct intel_digital_port *dport = enc_to_dig_port(&encoder->base);
- 		struct intel_crtc *intel_crtc =
- 			to_intel_crtc(encoder->base.crtc);
- 		int port = vlv_dport_to_channel(dport);
-@@ -1566,12 +1569,13 @@ static uint8_t
- intel_dp_voltage_max(struct intel_dp *intel_dp)
- {
- 	struct drm_device *dev = intel_dp_to_dev(intel_dp);
-+	enum port port = dp_to_dig_port(intel_dp)->port;
- 
- 	if (IS_VALLEYVIEW(dev))
- 		return DP_TRAIN_VOLTAGE_SWING_1200;
--	else if (IS_GEN7(dev) && is_cpu_edp(intel_dp))
-+	else if (IS_GEN7(dev) && port == PORT_A)
- 		return DP_TRAIN_VOLTAGE_SWING_800;
--	else if (HAS_PCH_CPT(dev) && !is_cpu_edp(intel_dp))
-+	else if (HAS_PCH_CPT(dev) && port != PORT_A)
- 		return DP_TRAIN_VOLTAGE_SWING_1200;
- 	else
- 		return DP_TRAIN_VOLTAGE_SWING_800;
-@@ -1581,6 +1585,7 @@ static uint8_t
- intel_dp_pre_emphasis_max(struct intel_dp *intel_dp, uint8_t voltage_swing)
- {
- 	struct drm_device *dev = intel_dp_to_dev(intel_dp);
-+	enum port port = dp_to_dig_port(intel_dp)->port;
- 
- 	if (HAS_DDI(dev)) {
- 		switch (voltage_swing & DP_TRAIN_VOLTAGE_SWING_MASK) {
-@@ -1606,7 +1611,7 @@ intel_dp_pre_emphasis_max(struct intel_d
- 		default:
- 			return DP_TRAIN_PRE_EMPHASIS_0;
- 		}
--	} else if (IS_GEN7(dev) && is_cpu_edp(intel_dp)) {
-+	} else if (IS_GEN7(dev) && port == PORT_A) {
- 		switch (voltage_swing & DP_TRAIN_VOLTAGE_SWING_MASK) {
- 		case DP_TRAIN_VOLTAGE_SWING_400:
- 			return DP_TRAIN_PRE_EMPHASIS_6;
-@@ -1893,6 +1898,7 @@ static void
- intel_dp_set_signal_levels(struct intel_dp *intel_dp, uint32_t *DP)
- {
- 	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
-+	enum port port = intel_dig_port->port;
- 	struct drm_device *dev = intel_dig_port->base.base.dev;
- 	uint32_t signal_levels, mask;
- 	uint8_t train_set = intel_dp->train_set[0];
-@@ -1903,10 +1909,10 @@ intel_dp_set_signal_levels(struct intel_
- 	} else if (IS_VALLEYVIEW(dev)) {
- 		signal_levels = intel_vlv_signal_levels(intel_dp);
- 		mask = 0;
--	} else if (IS_GEN7(dev) && is_cpu_edp(intel_dp)) {
-+	} else if (IS_GEN7(dev) && port == PORT_A) {
- 		signal_levels = intel_gen7_edp_signal_levels(train_set);
- 		mask = EDP_LINK_TRAIN_VOL_EMP_MASK_IVB;
--	} else if (IS_GEN6(dev) && is_cpu_edp(intel_dp)) {
-+	} else if (IS_GEN6(dev) && port == PORT_A) {
- 		signal_levels = intel_gen6_edp_signal_levels(train_set);
- 		mask = EDP_LINK_TRAIN_VOL_EMP_MASK_SNB;
- 	} else {
-@@ -1956,8 +1962,7 @@ intel_dp_set_link_train(struct intel_dp
- 		}
- 		I915_WRITE(DP_TP_CTL(port), temp);
- 
--	} else if (HAS_PCH_CPT(dev) &&
--		   (IS_GEN7(dev) || !is_cpu_edp(intel_dp))) {
-+	} else if (HAS_PCH_CPT(dev) && (IS_GEN7(dev) || port != PORT_A)) {
- 		dp_reg_value &= ~DP_LINK_TRAIN_MASK_CPT;
- 
- 		switch (dp_train_pat & DP_TRAINING_PATTERN_MASK) {
-@@ -2208,6 +2213,7 @@ static void
- intel_dp_link_down(struct intel_dp *intel_dp)
- {
- 	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
-+	enum port port = intel_dig_port->port;
- 	struct drm_device *dev = intel_dig_port->base.base.dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct intel_crtc *intel_crtc =
-@@ -2237,7 +2243,7 @@ intel_dp_link_down(struct intel_dp *inte
- 
- 	DRM_DEBUG_KMS("\n");
- 
--	if (HAS_PCH_CPT(dev) && (IS_GEN7(dev) || !is_cpu_edp(intel_dp))) {
-+	if (HAS_PCH_CPT(dev) && (IS_GEN7(dev) || port != PORT_A)) {
- 		DP &= ~DP_LINK_TRAIN_MASK_CPT;
- 		I915_WRITE(intel_dp->output_reg, DP | DP_LINK_TRAIN_PAT_IDLE_CPT);
- 	} else {
-@@ -2980,9 +2986,6 @@ intel_dp_init_panel_power_sequencer_regi
- 		pp_div_reg = PIPEA_PP_DIVISOR;
- 	}
- 
--	if (IS_VALLEYVIEW(dev))
--		port_sel = I915_READ(pp_on_reg) & 0xc0000000;
--
- 	/* And finally store the new values in the power sequencer. */
- 	pp_on = (seq->t1_t3 << PANEL_POWER_UP_DELAY_SHIFT) |
- 		(seq->t8 << PANEL_LIGHT_ON_DELAY_SHIFT);
-@@ -2996,8 +2999,10 @@ intel_dp_init_panel_power_sequencer_regi
- 
- 	/* Haswell doesn't have any port selection bits for the panel
- 	 * power sequencer any more. */
--	if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev)) {
--		if (is_cpu_edp(intel_dp))
-+	if (IS_VALLEYVIEW(dev)) {
-+		port_sel = I915_READ(pp_on_reg) & 0xc0000000;
-+	} else if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev)) {
-+		if (dp_to_dig_port(intel_dp)->port == PORT_A)
- 			port_sel = PANEL_POWER_PORT_DP_A;
- 		else
- 			port_sel = PANEL_POWER_PORT_DP_D;
diff --git a/patches.baytrail/0203-drm-i915-remove-unused-is_cpu_edp.patch b/patches.baytrail/0203-drm-i915-remove-unused-is_cpu_edp.patch
deleted file mode 100644
index 547d4fa930ed8..0000000000000
--- a/patches.baytrail/0203-drm-i915-remove-unused-is_cpu_edp.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From 30435b091bdc92ea845f44db5ae794ce577b1d7a Mon Sep 17 00:00:00 2001
-From: Imre Deak <imre.deak@intel.com>
-Date: Thu, 16 May 2013 14:40:37 +0300
-Subject: drm/i915: remove unused is_cpu_edp()
-
-Signed-off-by: Imre Deak <imre.deak@intel.com>
-Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 55aab33e898eb61d6187b18c2446e2cb1b06b910)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_dp.c | 16 ----------------
- 1 file changed, 16 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
-index 63fa72d4a4c6..be862039eeab 100644
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -59,22 +59,6 @@ static struct drm_device *intel_dp_to_dev(struct intel_dp *intel_dp)
- 	return intel_dig_port->base.base.dev;
- }
- 
--/**
-- * is_cpu_edp - is the port on the CPU and attached to an eDP panel?
-- * @intel_dp: DP struct
-- *
-- * Returns true if the given DP struct corresponds to a CPU eDP port.
-- */
--static bool is_cpu_edp(struct intel_dp *intel_dp)
--{
--	struct drm_device *dev = intel_dp_to_dev(intel_dp);
--	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
--	enum port port = intel_dig_port->port;
--
--	return is_edp(intel_dp) &&
--		(port == PORT_A || (port == PORT_C && IS_VALLEYVIEW(dev)));
--}
--
- static struct intel_dp *intel_attached_dp(struct drm_connector *connector)
- {
- 	return enc_to_intel_dp(&intel_attached_encoder(connector)->base);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0204-drm-i915-fixup-i915_pipe_enabled-check-in-i915_irq.c.patch b/patches.baytrail/0204-drm-i915-fixup-i915_pipe_enabled-check-in-i915_irq.c.patch
deleted file mode 100644
index c5d114c22327d..0000000000000
--- a/patches.baytrail/0204-drm-i915-fixup-i915_pipe_enabled-check-in-i915_irq.c.patch
+++ /dev/null
@@ -1,74 +0,0 @@
-From 2267c95ec73c45ff5cd2749df882bcfb3d20c8c2 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Wed, 22 May 2013 00:50:23 +0200
-Subject: drm/i915: fixup i915_pipe_enabled check in i915_irq.c
-
-Well, as well as we can without completely revamping the drm vblank
-code. The issue are that
-- The vblank code needs to work on both ums and kms.
-- It deals always deals with pipes.
-- It doesn't take any of the kms locks.
-
-The last part is not really fixable without revamping the drm vblank
-code, since the drm core <-> driver interactions is a veritable pile
-of spaghettis. But the other pieces can be fixed by switching on the
-MODESET driver flag and either checking the hw state directly (ums
-case) or just querying our sw tracking (with broken locking, but
-that's not worse than what we've had).
-
-Note that this essentially reverts
-
-commit 702e7a56af3780d8b3a717f698209bef44187bb0
-Author: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date:   Tue Oct 23 18:29:59 2012 -0200
-
-    drm/i915: convert PIPECONF to use transcoder instead of pipe
-
-for the ums case, which will fix a NULL deref (since we really don't
-have any crtcs set up).
-
-But the real reason to do this is to drop our reliance on the
-cpu_transcoder: By only checking intel_crtc->active we don't need to
-make sure that the pipe_config (or at least the cpu_transcoder)
-contain safe values even when the pipe is off.
-
-Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Cc: Damien Lespiau <damien.lespiau@intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit a01025afa89ccaf1b0521f5862cbfcc73f970481)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 14 ++++++++------
- 1 file changed, 8 insertions(+), 6 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index e8b5d548230e..c0d9f876a690 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -372,14 +372,16 @@ static int
- i915_pipe_enabled(struct drm_device *dev, int pipe)
- {
- 	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
--	enum transcoder cpu_transcoder = intel_pipe_to_cpu_transcoder(dev_priv,
--								      pipe);
- 
--	if (!intel_display_power_enabled(dev,
--		POWER_DOMAIN_TRANSCODER(cpu_transcoder)))
--		return false;
-+	if (drm_core_check_feature(dev, DRIVER_MODESET)) {
-+		/* Locking is horribly broken here, but whatever. */
-+		struct drm_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe];
-+		struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
- 
--	return I915_READ(PIPECONF(cpu_transcoder)) & PIPECONF_ENABLE;
-+		return intel_crtc->active;
-+	} else {
-+		return I915_READ(PIPECONF(pipe)) & PIPECONF_ENABLE;
-+	}
- }
- 
- /* Called from drm generic code, passed a 'crtc', which
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0205-drm-i915-hw-state-readout-check-support-for-cpu_tran.patch b/patches.baytrail/0205-drm-i915-hw-state-readout-check-support-for-cpu_tran.patch
deleted file mode 100644
index 80b94560da4ec..0000000000000
--- a/patches.baytrail/0205-drm-i915-hw-state-readout-check-support-for-cpu_tran.patch
+++ /dev/null
@@ -1,259 +0,0 @@
-From febaa9a7bcf2b55e774a617e247cff437b25999f Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Wed, 22 May 2013 00:50:22 +0200
-Subject: drm/i915: hw state readout&check support for cpu_transcoder
-
-This allows us to drop a bunch of ugly hacks and finally implement
-what
-
-commit cc464b2a17c59adedbdc02cc54341d630354edc3
-Author: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date:   Fri Jan 25 16:59:16 2013 -0200
-
-    drm/i915: set TRANSCODER_EDP even earlier
-
-tried to achieve, but that was reverted again in
-
-commit bba2181c49f1dddf8b592804a1b53cc1a3cf408a
-Author: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date:   Fri Mar 22 10:53:40 2013 +0100
-
-    Revert "drm/i915: set TRANSCODER_EDP even earlier"
-
-Now we should always have a consistent cpu_transcoder in the
-pipe_config.
-
-v2: Fix up the code as spotted by Paulo:
-- read the register for real
-- assign the right pipes
-- break out if the hw state doesn't make sense
-
-v3: Shut up gcc.
-
-Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit eccb140bca6727f2ef849e8811d5fe4c9fbfd5dd)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_ddi.c     |    4 +
- drivers/gpu/drm/i915/intel_display.c |   90 ++++++++++++-----------------------
- 2 files changed, 37 insertions(+), 57 deletions(-)
-
---- a/drivers/gpu/drm/i915/intel_ddi.c
-+++ b/drivers/gpu/drm/i915/intel_ddi.c
-@@ -1298,9 +1298,13 @@ static bool intel_ddi_compute_config(str
- 				     struct intel_crtc_config *pipe_config)
- {
- 	int type = encoder->type;
-+	int port = intel_ddi_get_encoder_port(encoder);
- 
- 	WARN(type == INTEL_OUTPUT_UNKNOWN, "compute_config() on unknown output!\n");
- 
-+	if (port == PORT_A)
-+		pipe_config->cpu_transcoder = TRANSCODER_EDP;
-+
- 	if (type == INTEL_OUTPUT_HDMI)
- 		return intel_hdmi_compute_config(encoder, pipe_config);
- 	else
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -3469,12 +3469,6 @@ static void ironlake_crtc_off(struct drm
- 
- static void haswell_crtc_off(struct drm_crtc *crtc)
- {
--	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
--
--	/* Stop saying we're using TRANSCODER_EDP because some other CRTC might
--	 * start using it. */
--	intel_crtc->config.cpu_transcoder = (enum transcoder) intel_crtc->pipe;
--
- 	intel_ddi_put_crtc_pll(crtc);
- }
- 
-@@ -4925,6 +4919,8 @@ static bool i9xx_get_pipe_config(struct
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	uint32_t tmp;
- 
-+	pipe_config->cpu_transcoder = crtc->pipe;
-+
- 	tmp = I915_READ(PIPECONF(crtc->pipe));
- 	if (!(tmp & PIPECONF_ENABLE))
- 		return false;
-@@ -5647,8 +5643,6 @@ static int ironlake_crtc_mode_set(struct
- 	WARN(!(HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev)),
- 	     "Unexpected PCH type %d\n", INTEL_PCH_TYPE(dev));
- 
--	intel_crtc->config.cpu_transcoder = pipe;
--
- 	ok = ironlake_compute_clocks(crtc, adjusted_mode, &clock,
- 				     &has_reduced_clock, &reduced_clock);
- 	if (!ok) {
-@@ -5784,6 +5778,8 @@ static bool ironlake_get_pipe_config(str
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	uint32_t tmp;
- 
-+	pipe_config->cpu_transcoder = crtc->pipe;
-+
- 	tmp = I915_READ(PIPECONF(crtc->pipe));
- 	if (!(tmp & PIPECONF_ENABLE))
- 		return false;
-@@ -5860,11 +5856,6 @@ static int haswell_crtc_mode_set(struct
- 		num_connectors++;
- 	}
- 
--	if (is_cpu_edp)
--		intel_crtc->config.cpu_transcoder = TRANSCODER_EDP;
--	else
--		intel_crtc->config.cpu_transcoder = pipe;
--
- 	/* We are not sure yet this won't happen. */
- 	WARN(!HAS_PCH_LPT(dev), "Unexpected PCH type %d\n",
- 	     INTEL_PCH_TYPE(dev));
-@@ -5918,15 +5909,37 @@ static bool haswell_get_pipe_config(stru
- {
- 	struct drm_device *dev = crtc->base.dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
--	enum transcoder cpu_transcoder = crtc->config.cpu_transcoder;
- 	enum intel_display_power_domain pfit_domain;
- 	uint32_t tmp;
- 
-+	pipe_config->cpu_transcoder = crtc->pipe;
-+	tmp = I915_READ(TRANS_DDI_FUNC_CTL(TRANSCODER_EDP));
-+	if (tmp & TRANS_DDI_FUNC_ENABLE) {
-+		enum pipe trans_edp_pipe;
-+		switch (tmp & TRANS_DDI_EDP_INPUT_MASK) {
-+		default:
-+			WARN(1, "unknown pipe linked to edp transcoder\n");
-+		case TRANS_DDI_EDP_INPUT_A_ONOFF:
-+		case TRANS_DDI_EDP_INPUT_A_ON:
-+			trans_edp_pipe = PIPE_A;
-+			break;
-+		case TRANS_DDI_EDP_INPUT_B_ONOFF:
-+			trans_edp_pipe = PIPE_B;
-+			break;
-+		case TRANS_DDI_EDP_INPUT_C_ONOFF:
-+			trans_edp_pipe = PIPE_C;
-+			break;
-+		}
-+
-+		if (trans_edp_pipe == crtc->pipe)
-+			pipe_config->cpu_transcoder = TRANSCODER_EDP;
-+	}
-+
- 	if (!intel_display_power_enabled(dev,
--			POWER_DOMAIN_TRANSCODER(cpu_transcoder)))
-+			POWER_DOMAIN_TRANSCODER(pipe_config->cpu_transcoder)))
- 		return false;
- 
--	tmp = I915_READ(PIPECONF(cpu_transcoder));
-+	tmp = I915_READ(PIPECONF(pipe_config->cpu_transcoder));
- 	if (!(tmp & PIPECONF_ENABLE))
- 		return false;
- 
-@@ -5935,7 +5948,7 @@ static bool haswell_get_pipe_config(stru
- 	 * DDI E. So just check whether this pipe is wired to DDI E and whether
- 	 * the PCH transcoder is on.
- 	 */
--	tmp = I915_READ(TRANS_DDI_FUNC_CTL(cpu_transcoder));
-+	tmp = I915_READ(TRANS_DDI_FUNC_CTL(pipe_config->cpu_transcoder));
- 	if ((tmp & TRANS_DDI_PORT_MASK) == TRANS_DDI_SELECT_PORT(PORT_E) &&
- 	    I915_READ(LPT_TRANSCONF) & TRANS_ENABLE) {
- 		pipe_config->has_pch_encoder = true;
-@@ -7694,6 +7707,7 @@ intel_modeset_pipe_config(struct drm_crt
- 
- 	drm_mode_copy(&pipe_config->adjusted_mode, mode);
- 	drm_mode_copy(&pipe_config->requested_mode, mode);
-+	pipe_config->cpu_transcoder = to_intel_crtc(crtc)->pipe;
- 
- 	plane_bpp = pipe_config_set_bpp(crtc, fb, pipe_config);
- 	if (plane_bpp < 0)
-@@ -7944,6 +7958,8 @@ intel_pipe_config_compare(struct drm_dev
- 		return false; \
- 	}
- 
-+	PIPE_CONF_CHECK_I(cpu_transcoder);
-+
- 	PIPE_CONF_CHECK_I(has_pch_encoder);
- 	PIPE_CONF_CHECK_I(fdi_lanes);
- 	PIPE_CONF_CHECK_I(fdi_m_n.gmch_m);
-@@ -8095,7 +8111,6 @@ intel_modeset_check_state(struct drm_dev
- 		     "crtc's computed enabled state doesn't match tracked enabled state "
- 		     "(expected %i, found %i)\n", enabled, crtc->base.enabled);
- 
--		pipe_config.cpu_transcoder = crtc->config.cpu_transcoder;
- 		active = dev_priv->display.get_pipe_config(crtc,
- 							   &pipe_config);
- 
-@@ -8163,12 +8178,10 @@ static int __intel_set_mode(struct drm_c
- 	 * to set it here already despite that we pass it down the callchain.
- 	 */
- 	if (modeset_pipes) {
--		enum transcoder tmp = to_intel_crtc(crtc)->config.cpu_transcoder;
- 		crtc->mode = *mode;
- 		/* mode_set/enable/disable functions rely on a correct pipe
- 		 * config. */
- 		to_intel_crtc(crtc)->config = *pipe_config;
--		to_intel_crtc(crtc)->config.cpu_transcoder = tmp;
- 	}
- 
- 	/* Only after disabling all output pipelines that will be changed can we
-@@ -8597,7 +8610,6 @@ static void intel_crtc_init(struct drm_d
- 	/* Swap pipes & planes for FBC on pre-965 */
- 	intel_crtc->pipe = pipe;
- 	intel_crtc->plane = pipe;
--	intel_crtc->config.cpu_transcoder = pipe;
- 	if (IS_MOBILE(dev) && IS_GEN3(dev)) {
- 		DRM_DEBUG_KMS("swapping pipes & planes for FBC\n");
- 		intel_crtc->plane = !pipe;
-@@ -9483,50 +9495,14 @@ void intel_modeset_setup_hw_state(struct
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	enum pipe pipe;
--	u32 tmp;
- 	struct drm_plane *plane;
- 	struct intel_crtc *crtc;
- 	struct intel_encoder *encoder;
- 	struct intel_connector *connector;
- 
--	if (HAS_DDI(dev)) {
--		tmp = I915_READ(TRANS_DDI_FUNC_CTL(TRANSCODER_EDP));
--
--		if (tmp & TRANS_DDI_FUNC_ENABLE) {
--			switch (tmp & TRANS_DDI_EDP_INPUT_MASK) {
--			case TRANS_DDI_EDP_INPUT_A_ON:
--			case TRANS_DDI_EDP_INPUT_A_ONOFF:
--				pipe = PIPE_A;
--				break;
--			case TRANS_DDI_EDP_INPUT_B_ONOFF:
--				pipe = PIPE_B;
--				break;
--			case TRANS_DDI_EDP_INPUT_C_ONOFF:
--				pipe = PIPE_C;
--				break;
--			default:
--				/* A bogus value has been programmed, disable
--				 * the transcoder */
--				WARN(1, "Bogus eDP source %08x\n", tmp);
--				intel_ddi_disable_transcoder_func(dev_priv,
--						TRANSCODER_EDP);
--				goto setup_pipes;
--			}
--
--			crtc = to_intel_crtc(dev_priv->pipe_to_crtc_mapping[pipe]);
--			crtc->config.cpu_transcoder = TRANSCODER_EDP;
--
--			DRM_DEBUG_KMS("Pipe %c using transcoder EDP\n",
--				      pipe_name(pipe));
--		}
--	}
--
--setup_pipes:
- 	list_for_each_entry(crtc, &dev->mode_config.crtc_list,
- 			    base.head) {
--		enum transcoder tmp = crtc->config.cpu_transcoder;
- 		memset(&crtc->config, 0, sizeof(crtc->config));
--		crtc->config.cpu_transcoder = tmp;
- 
- 		crtc->active = dev_priv->display.get_pipe_config(crtc,
- 								 &crtc->config);
diff --git a/patches.baytrail/0206-drm-i915-document-why-dvo-sdvo-crt-need-a-special-dp.patch b/patches.baytrail/0206-drm-i915-document-why-dvo-sdvo-crt-need-a-special-dp.patch
deleted file mode 100644
index 1e47f30bfd048..0000000000000
--- a/patches.baytrail/0206-drm-i915-document-why-dvo-sdvo-crt-need-a-special-dp.patch
+++ /dev/null
@@ -1,89 +0,0 @@
-From 00e7394f71082ea6359da0cea8cbd461bfaf0bb3 Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Tue, 28 May 2013 12:35:02 +0300
-Subject: drm/i915: document why dvo/sdvo/crt need a special dpms function
-
-In the cloned case, changing just one output but keeping the other, the
-pipe state won't change and intel_crtc_update_dpms will be a nop, but we
-still need to update the dpms state of the output being changed.
-
-Only dvo, sdvo and crt are cloneable, so only those three have special
-dpms functions.
-
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 6b1c087ba5789aceb25a2170b217055ce2476f67)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_crt.c  | 4 +++-
- drivers/gpu/drm/i915/intel_dvo.c  | 3 +++
- drivers/gpu/drm/i915/intel_sdvo.c | 3 +++
- 3 files changed, 9 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
-index 5e9f93e53255..3acec8c48166 100644
---- a/drivers/gpu/drm/i915/intel_crt.c
-+++ b/drivers/gpu/drm/i915/intel_crt.c
-@@ -149,7 +149,7 @@ static void intel_enable_crt(struct intel_encoder *encoder)
- 	intel_crt_set_dpms(encoder, crt->connector->base.dpms);
- }
- 
--
-+/* Special dpms function to support cloning between dvo/sdvo/crt. */
- static void intel_crt_dpms(struct drm_connector *connector, int mode)
- {
- 	struct drm_device *dev = connector->dev;
-@@ -180,6 +180,8 @@ static void intel_crt_dpms(struct drm_connector *connector, int mode)
- 	else
- 		encoder->connectors_active = true;
- 
-+	/* We call connector dpms manually below in case pipe dpms doesn't
-+	 * change due to cloning. */
- 	if (mode < old_dpms) {
- 		/* From off to on, enable the pipe first. */
- 		intel_crtc_update_dpms(crtc);
-diff --git a/drivers/gpu/drm/i915/intel_dvo.c b/drivers/gpu/drm/i915/intel_dvo.c
-index 9e80d487b5cb..eb2020eb2b7e 100644
---- a/drivers/gpu/drm/i915/intel_dvo.c
-+++ b/drivers/gpu/drm/i915/intel_dvo.c
-@@ -180,6 +180,7 @@ static void intel_enable_dvo(struct intel_encoder *encoder)
- 	intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);
- }
- 
-+/* Special dpms function to support cloning between dvo/sdvo/crt. */
- static void intel_dvo_dpms(struct drm_connector *connector, int mode)
- {
- 	struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
-@@ -201,6 +202,8 @@ static void intel_dvo_dpms(struct drm_connector *connector, int mode)
- 		return;
- 	}
- 
-+	/* We call connector dpms manually below in case pipe dpms doesn't
-+	 * change due to cloning. */
- 	if (mode == DRM_MODE_DPMS_ON) {
- 		intel_dvo->base.connectors_active = true;
- 
-diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
-index f8ad93bd7d9b..c55841937705 100644
---- a/drivers/gpu/drm/i915/intel_sdvo.c
-+++ b/drivers/gpu/drm/i915/intel_sdvo.c
-@@ -1416,6 +1416,7 @@ static void intel_enable_sdvo(struct intel_encoder *encoder)
- 	intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
- }
- 
-+/* Special dpms function to support cloning between dvo/sdvo/crt. */
- static void intel_sdvo_dpms(struct drm_connector *connector, int mode)
- {
- 	struct drm_crtc *crtc;
-@@ -1437,6 +1438,8 @@ static void intel_sdvo_dpms(struct drm_connector *connector, int mode)
- 		return;
- 	}
- 
-+	/* We set active outputs manually below in case pipe dpms doesn't change
-+	 * due to cloning. */
- 	if (mode != DRM_MODE_DPMS_ON) {
- 		intel_sdvo_set_active_outputs(intel_sdvo, 0);
- 		if (0)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0207-drm-i915-fix-error-return-code-in-init_pipe_control.patch b/patches.baytrail/0207-drm-i915-fix-error-return-code-in-init_pipe_control.patch
deleted file mode 100644
index c76f374819717..0000000000000
--- a/patches.baytrail/0207-drm-i915-fix-error-return-code-in-init_pipe_control.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From b3cc024df0a7453c1488487b84bd3008975cc068 Mon Sep 17 00:00:00 2001
-From: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
-Date: Tue, 28 May 2013 17:51:44 +0800
-Subject: drm/i915: fix error return code in init_pipe_control()
-
-Fix to return -ENOMEM in the kmap() error handling case
-instead of 0, as done elsewhere in this function.
-
-Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 56b085a01befc7907d270e9acb349580015e7bad)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_ringbuffer.c | 6 ++++--
- 1 file changed, 4 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
-index df0b7c7ac166..4295400a39ac 100644
---- a/drivers/gpu/drm/i915/intel_ringbuffer.c
-+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
-@@ -464,9 +464,11 @@ init_pipe_control(struct intel_ring_buffer *ring)
- 		goto err_unref;
- 
- 	pc->gtt_offset = obj->gtt_offset;
--	pc->cpu_page =  kmap(sg_page(obj->pages->sgl));
--	if (pc->cpu_page == NULL)
-+	pc->cpu_page = kmap(sg_page(obj->pages->sgl));
-+	if (pc->cpu_page == NULL) {
-+		ret = -ENOMEM;
- 		goto err_unpin;
-+	}
- 
- 	DRM_DEBUG_DRIVER("%s pipe control offset: 0x%08x\n",
- 			 ring->name, pc->gtt_offset);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0208-drm-i915-add-basic-pipe-config-dump-support.patch b/patches.baytrail/0208-drm-i915-add-basic-pipe-config-dump-support.patch
deleted file mode 100644
index 8f2a56ace5592..0000000000000
--- a/patches.baytrail/0208-drm-i915-add-basic-pipe-config-dump-support.patch
+++ /dev/null
@@ -1,183 +0,0 @@
-From c93c0760b4b29502316c5e76138699cdb6e5644e Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Tue, 28 May 2013 12:05:54 +0200
-Subject: drm/i915: add basic pipe config dump support
-
-All this pipe config abstraction adds another layer of complexity, so
-it's good to have better visibility into what's going on exactly.
-Doesn't dump out everything yet, and some bits are a bit duplicated
-but this should be a good start.
-
-Note that at boot-up a lot of the fields are 0 even for enabled pipes,
-this is simply because our hw state readout code doesn't support
-everything.
-
-v2: Remove a few more now redudant debug output lines.
-
-v3: Review from Paulo
-- use transcoder_name
-- fix up format specifiers
-- add missing ':' in debug output
-
-Cc: Paulo Zanoni <przanoni@gmail.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit c0b0341121f2e2b329e60986aee766e4d1d80fde)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 74 +++++++++++++++++++++---------------
- 1 file changed, 44 insertions(+), 30 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 371cd327b6ea..c953cc46f208 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -3523,18 +3523,12 @@ static void i9xx_pfit_enable(struct intel_crtc *crtc)
- 	if (!crtc->config.gmch_pfit.control)
- 		return;
- 
--	WARN_ON(I915_READ(PFIT_CONTROL) & PFIT_ENABLE);
--	assert_pipe_disabled(dev_priv, crtc->pipe);
--
- 	/*
--	 * Enable automatic panel scaling so that non-native modes
--	 * fill the screen.  The panel fitter should only be
--	 * adjusted whilst the pipe is disabled, according to
--	 * register description and PRM.
-+	 * The panel fitter should only be adjusted whilst the pipe is disabled,
-+	 * according to register description and PRM.
- 	 */
--	DRM_DEBUG_KMS("applying panel-fitter: %x, %x\n",
--		      pipe_config->gmch_pfit.control,
--		      pipe_config->gmch_pfit.pgm_ratios);
-+	WARN_ON(I915_READ(PFIT_CONTROL) & PFIT_ENABLE);
-+	assert_pipe_disabled(dev_priv, crtc->pipe);
- 
- 	I915_WRITE(PFIT_PGM_RATIOS, pipe_config->gmch_pfit.pgm_ratios);
- 	I915_WRITE(PFIT_CONTROL, pipe_config->gmch_pfit.control);
-@@ -4857,9 +4851,6 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
- 			dspcntr |= DISPPLANE_SEL_PIPE_B;
- 	}
- 
--	DRM_DEBUG_KMS("Mode for pipe %c:\n", pipe_name(pipe));
--	drm_mode_debug_printmodeline(mode);
--
- 	intel_set_pipe_timings(intel_crtc, mode, adjusted_mode);
- 
- 	/* pipesrc and dspsize control the size that is scaled from,
-@@ -5661,9 +5652,6 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
- 	/* Ensure that the cursor is valid for the new mode before changing... */
- 	intel_crtc_update_cursor(crtc, true);
- 
--	DRM_DEBUG_KMS("Mode for pipe %c:\n", pipe_name(pipe));
--	drm_mode_debug_printmodeline(mode);
--
- 	/* CPU eDP is the only output that doesn't need a PCH PLL of its own. */
- 	if (intel_crtc->config.has_pch_encoder) {
- 		struct intel_pch_pll *pll;
-@@ -5874,9 +5862,6 @@ static int haswell_crtc_mode_set(struct drm_crtc *crtc,
- 	/* Ensure that the cursor is valid for the new mode before changing... */
- 	intel_crtc_update_cursor(crtc, true);
- 
--	DRM_DEBUG_KMS("Mode for pipe %c:\n", pipe_name(pipe));
--	drm_mode_debug_printmodeline(mode);
--
- 	if (intel_crtc->config.has_dp_encoder)
- 		intel_dp_set_m_n(intel_crtc);
- 
-@@ -7689,6 +7674,35 @@ pipe_config_set_bpp(struct drm_crtc *crtc,
- 	return bpp;
- }
- 
-+static void intel_dump_pipe_config(struct intel_crtc *crtc,
-+				   struct intel_crtc_config *pipe_config,
-+				   const char *context)
-+{
-+	DRM_DEBUG_KMS("[CRTC:%d]%s config for pipe %c\n", crtc->base.base.id,
-+		      context, pipe_name(crtc->pipe));
-+
-+	DRM_DEBUG_KMS("cpu_transcoder: %c\n", transcoder_name(pipe_config->cpu_transcoder));
-+	DRM_DEBUG_KMS("pipe bpp: %i, dithering: %i\n",
-+		      pipe_config->pipe_bpp, pipe_config->dither);
-+	DRM_DEBUG_KMS("fdi/pch: %i, lanes: %i, gmch_m: %u, gmch_n: %u, link_m: %u, link_n: %u, tu: %u\n",
-+		      pipe_config->has_pch_encoder,
-+		      pipe_config->fdi_lanes,
-+		      pipe_config->fdi_m_n.gmch_m, pipe_config->fdi_m_n.gmch_n,
-+		      pipe_config->fdi_m_n.link_m, pipe_config->fdi_m_n.link_n,
-+		      pipe_config->fdi_m_n.tu);
-+	DRM_DEBUG_KMS("requested mode:\n");
-+	drm_mode_debug_printmodeline(&pipe_config->requested_mode);
-+	DRM_DEBUG_KMS("adjusted mode:\n");
-+	drm_mode_debug_printmodeline(&pipe_config->adjusted_mode);
-+	DRM_DEBUG_KMS("gmch pfit: control: 0x%08x, ratios: 0x%08x, lvds border: 0x%08x\n",
-+		      pipe_config->gmch_pfit.control,
-+		      pipe_config->gmch_pfit.pgm_ratios,
-+		      pipe_config->gmch_pfit.lvds_border_bits);
-+	DRM_DEBUG_KMS("pch pfit: pos: 0x%08x, size: 0x%08x\n",
-+		      pipe_config->pch_pfit.pos,
-+		      pipe_config->pch_pfit.size);
-+}
-+
- static struct intel_crtc_config *
- intel_modeset_pipe_config(struct drm_crtc *crtc,
- 			  struct drm_framebuffer *fb,
-@@ -7759,8 +7773,6 @@ encoder_retry:
- 		goto encoder_retry;
- 	}
- 
--	DRM_DEBUG_KMS("[CRTC:%d]\n", crtc->base.id);
--
- 	pipe_config->dither = pipe_config->pipe_bpp != plane_bpp;
- 	DRM_DEBUG_KMS("plane bpp: %i, pipe bpp: %i, dithering: %i\n",
- 		      plane_bpp, pipe_config->pipe_bpp, pipe_config->dither);
-@@ -8122,9 +8134,14 @@ intel_modeset_check_state(struct drm_device *dev)
- 		     "crtc active state doesn't match with hw state "
- 		     "(expected %i, found %i)\n", crtc->active, active);
- 
--		WARN(active &&
--		     !intel_pipe_config_compare(dev, &crtc->config, &pipe_config),
--		     "pipe state doesn't match!\n");
-+		if (active &&
-+		    !intel_pipe_config_compare(dev, &crtc->config, &pipe_config)) {
-+			WARN(1, "pipe state doesn't match!\n");
-+			intel_dump_pipe_config(crtc, &pipe_config,
-+					       "[hw state]");
-+			intel_dump_pipe_config(crtc, &crtc->config,
-+					       "[sw state]");
-+		}
- 	}
- }
- 
-@@ -8164,6 +8181,8 @@ static int __intel_set_mode(struct drm_crtc *crtc,
- 
- 			goto out;
- 		}
-+		intel_dump_pipe_config(to_intel_crtc(crtc), pipe_config,
-+				       "[modeset]");
- 	}
- 
- 	for_each_intel_crtc_masked(dev, disable_pipes, intel_crtc)
-@@ -8523,12 +8542,6 @@ static int intel_crtc_set_config(struct drm_mode_set *set)
- 		goto fail;
- 
- 	if (config->mode_changed) {
--		if (set->mode) {
--			DRM_DEBUG_KMS("attempting to set mode from"
--					" userspace\n");
--			drm_mode_debug_printmodeline(set->mode);
--		}
--
- 		ret = intel_set_mode(set->crtc, set->mode,
- 				     set->x, set->y, set->fb);
- 	} else if (config->fb_changed) {
-@@ -9563,6 +9576,7 @@ void intel_modeset_setup_hw_state(struct drm_device *dev,
- 	for_each_pipe(pipe) {
- 		crtc = to_intel_crtc(dev_priv->pipe_to_crtc_mapping[pipe]);
- 		intel_sanitize_crtc(crtc);
-+		intel_dump_pipe_config(crtc, &crtc->config, "[setup_hw_state]");
- 	}
- 
- 	if (force_restore) {
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0209-drm-i915-drop-a-few-really-redundant-WARNs-in-hsw-mo.patch b/patches.baytrail/0209-drm-i915-drop-a-few-really-redundant-WARNs-in-hsw-mo.patch
deleted file mode 100644
index f8d1299405338..0000000000000
--- a/patches.baytrail/0209-drm-i915-drop-a-few-really-redundant-WARNs-in-hsw-mo.patch
+++ /dev/null
@@ -1,46 +0,0 @@
-From 32790092e61aa6de3df314cc35a74f524ac314e1 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Tue, 28 May 2013 16:28:55 +0200
-Subject: drm/i915: drop a few really redundant WARNs in hsw mode_set
-
-- Correct cpu->pch display matching is already check when we detect
-  the PCH type at driver load.
-- Plane/pipe state is already checked both when a) enabling, b)
-  disabling and in c) the modeset state checker. No need to go
-  overboard and also check it in in between a) and b).
-
-Cc: Paulo Zanoni <przanoni@gmail.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 64eae94134d2fd0a0f1cf2162fb91e46da4ec75f)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 9 ---------
- 1 file changed, 9 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index c953cc46f208..77f6784e2128 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -5844,18 +5844,9 @@ static int haswell_crtc_mode_set(struct drm_crtc *crtc,
- 		num_connectors++;
- 	}
- 
--	/* We are not sure yet this won't happen. */
--	WARN(!HAS_PCH_LPT(dev), "Unexpected PCH type %d\n",
--	     INTEL_PCH_TYPE(dev));
--
- 	WARN(num_connectors != 1, "%d connectors attached to pipe %c\n",
- 	     num_connectors, pipe_name(pipe));
- 
--	WARN_ON(I915_READ(PIPECONF(intel_crtc->config.cpu_transcoder)) &
--		(PIPECONF_ENABLE | I965_PIPECONF_ACTIVE));
--
--	WARN_ON(I915_READ(DSPCNTR(plane)) & DISPLAY_PLANE_ENABLE);
--
- 	if (!intel_ddi_pll_mode_set(crtc, adjusted_mode->clock))
- 		return -EINVAL;
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0210-drm-i915-Avoid-promoting-a-simulated-hang-to-wedged.patch b/patches.baytrail/0210-drm-i915-Avoid-promoting-a-simulated-hang-to-wedged.patch
deleted file mode 100644
index 051703d85ba63..0000000000000
--- a/patches.baytrail/0210-drm-i915-Avoid-promoting-a-simulated-hang-to-wedged.patch
+++ /dev/null
@@ -1,111 +0,0 @@
-From 01654de70fb4664215a98b55e0d8746cd81aa08e Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Tue, 28 May 2013 10:38:44 +0100
-Subject: drm/i915: Avoid promoting a simulated hang to 'wedged'
-
-It appears that a beneficial side-effect of Mika's more accurate hangman
-work is to speed up hang detection and execution. This exposes a bug in
-the reset code that then treats repeated simulated hangs as an
-indication that the machine is wedged. Jiggle the code around so that we
-only do the simulation processing from the hangcheck and avoid confusing
-it with a real hang.
-
-Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=65060
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 2e7c8ee7a6bf3440478120f14cbf597d416f88b2)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.c | 55 +++++++++++++++++------------------------
- 1 file changed, 23 insertions(+), 32 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
-index daf727e79ded..94492d1cdb0c 100644
---- a/drivers/gpu/drm/i915/i915_drv.c
-+++ b/drivers/gpu/drm/i915/i915_drv.c
-@@ -863,37 +863,14 @@ static int gen6_do_reset(struct drm_device *dev)
- 
- int intel_gpu_reset(struct drm_device *dev)
- {
--	struct drm_i915_private *dev_priv = dev->dev_private;
--	int ret = -ENODEV;
--
- 	switch (INTEL_INFO(dev)->gen) {
- 	case 7:
--	case 6:
--		ret = gen6_do_reset(dev);
--		break;
--	case 5:
--		ret = ironlake_do_reset(dev);
--		break;
--	case 4:
--		ret = i965_do_reset(dev);
--		break;
--	case 2:
--		ret = i8xx_do_reset(dev);
--		break;
--	}
--
--	/* Also reset the gpu hangman. */
--	if (dev_priv->gpu_error.stop_rings) {
--		DRM_INFO("Simulated gpu hang, resetting stop_rings\n");
--		dev_priv->gpu_error.stop_rings = 0;
--		if (ret == -ENODEV) {
--			DRM_ERROR("Reset not implemented, but ignoring "
--				  "error for simulated gpu hangs\n");
--			ret = 0;
--		}
-+	case 6: return gen6_do_reset(dev);
-+	case 5: return ironlake_do_reset(dev);
-+	case 4: return i965_do_reset(dev);
-+	case 2: return i8xx_do_reset(dev);
-+	default: return -ENODEV;
- 	}
--
--	return ret;
- }
- 
- /**
-@@ -914,6 +891,7 @@ int intel_gpu_reset(struct drm_device *dev)
- int i915_reset(struct drm_device *dev)
- {
- 	drm_i915_private_t *dev_priv = dev->dev_private;
-+	bool simulated;
- 	int ret;
- 
- 	if (!i915_try_reset)
-@@ -923,13 +901,26 @@ int i915_reset(struct drm_device *dev)
- 
- 	i915_gem_reset(dev);
- 
--	ret = -ENODEV;
--	if (get_seconds() - dev_priv->gpu_error.last_reset < 5)
-+	simulated = dev_priv->gpu_error.stop_rings != 0;
-+
-+	if (!simulated && get_seconds() - dev_priv->gpu_error.last_reset < 5) {
- 		DRM_ERROR("GPU hanging too fast, declaring wedged!\n");
--	else
-+		ret = -ENODEV;
-+	} else {
- 		ret = intel_gpu_reset(dev);
- 
--	dev_priv->gpu_error.last_reset = get_seconds();
-+		/* Also reset the gpu hangman. */
-+		if (simulated) {
-+			DRM_INFO("Simulated gpu hang, resetting stop_rings\n");
-+			dev_priv->gpu_error.stop_rings = 0;
-+			if (ret == -ENODEV) {
-+				DRM_ERROR("Reset not implemented, but ignoring "
-+					  "error for simulated gpu hangs\n");
-+				ret = 0;
-+			}
-+		} else
-+			dev_priv->gpu_error.last_reset = get_seconds();
-+	}
- 	if (ret) {
- 		DRM_ERROR("Failed to reset chip.\n");
- 		mutex_unlock(&dev->struct_mutex);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0211-drm-i915-release-cursor-when-crtc-is-destroyed.patch b/patches.baytrail/0211-drm-i915-release-cursor-when-crtc-is-destroyed.patch
deleted file mode 100644
index 6612d90d79dc4..0000000000000
--- a/patches.baytrail/0211-drm-i915-release-cursor-when-crtc-is-destroyed.patch
+++ /dev/null
@@ -1,57 +0,0 @@
-From 725a57ca50b050fa405c96ae6b8e61e13f07f6cf Mon Sep 17 00:00:00 2001
-From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
-Date: Tue, 23 Apr 2013 17:27:08 +0300
-Subject: drm/i915: release cursor when crtc is destroyed
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-crtc is holding a reference to a cursor bo and it needs
-to be released when crtc is destroyed so that we don't leak
-the cursor bo.
-
-v2: Enhance set and move cursor so that disabled
-cursor is handled correctly (Ville Syrjälä)
-
-Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 40ccc72b84a848e6fcbdb38fe716f0ac6939609e)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 6 ++++--
- 1 file changed, 4 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 77f6784e2128..959ebc7a8283 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -6513,7 +6513,7 @@ static int intel_crtc_cursor_set(struct drm_crtc *crtc,
- 	intel_crtc->cursor_width = width;
- 	intel_crtc->cursor_height = height;
- 
--	intel_crtc_update_cursor(crtc, true);
-+	intel_crtc_update_cursor(crtc, intel_crtc->cursor_bo != NULL);
- 
- 	return 0;
- fail_unpin:
-@@ -6532,7 +6532,7 @@ static int intel_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
- 	intel_crtc->cursor_x = x;
- 	intel_crtc->cursor_y = y;
- 
--	intel_crtc_update_cursor(crtc, true);
-+	intel_crtc_update_cursor(crtc, intel_crtc->cursor_bo != NULL);
- 
- 	return 0;
- }
-@@ -7046,6 +7046,8 @@ static void intel_crtc_destroy(struct drm_crtc *crtc)
- 		kfree(work);
- 	}
- 
-+	intel_crtc_cursor_set(crtc, NULL, 0, 0, 0);
-+
- 	drm_crtc_cleanup(crtc);
- 
- 	kfree(intel_crtc);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0212-drm-i915-Comments-for-semaphore-clarification.patch b/patches.baytrail/0212-drm-i915-Comments-for-semaphore-clarification.patch
deleted file mode 100644
index 878c930cf24fc..0000000000000
--- a/patches.baytrail/0212-drm-i915-Comments-for-semaphore-clarification.patch
+++ /dev/null
@@ -1,102 +0,0 @@
-From 5220eb4fdd65f13a5012aa077214ae80604e8467 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Tue, 28 May 2013 19:22:17 -0700
-Subject: drm/i915: Comments for semaphore clarification
-
-Semaphores are tied very closely to the rings in the GPU. Trivial patch
-adds comments to the existing code so that when we add new rings we can
-include comments there as well. It also helps distinguish the ring to
-semaphore mailbox interactions by using the ringname in the semaphore
-data structures.
-
-This patch should have no functional impact.
-
-v2: The English parts (as opposed to register names) of the comments
-were reversed. (Damien)
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 5586181fce2b2e89a0e281d78ffbdfa103bb0dde)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_reg.h         |   12 ++++++------
- drivers/gpu/drm/i915/intel_ringbuffer.c |   18 +++++++++---------
- drivers/gpu/drm/i915/intel_ringbuffer.h |    4 ++--
- 3 files changed, 17 insertions(+), 17 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -265,12 +265,12 @@
- #define  MI_SEMAPHORE_UPDATE	    (1<<21)
- #define  MI_SEMAPHORE_COMPARE	    (1<<20)
- #define  MI_SEMAPHORE_REGISTER	    (1<<18)
--#define  MI_SEMAPHORE_SYNC_RV	    (2<<16)
--#define  MI_SEMAPHORE_SYNC_RB	    (0<<16)
--#define  MI_SEMAPHORE_SYNC_VR	    (0<<16)
--#define  MI_SEMAPHORE_SYNC_VB	    (2<<16)
--#define  MI_SEMAPHORE_SYNC_BR	    (2<<16)
--#define  MI_SEMAPHORE_SYNC_BV	    (0<<16)
-+#define  MI_SEMAPHORE_SYNC_RB	    (0<<16) /* BCS wait for RCS  (BRSYNC) */
-+#define  MI_SEMAPHORE_SYNC_RV	    (2<<16) /* VCS wait for RCS  (VRSYNC) */
-+#define  MI_SEMAPHORE_SYNC_VR	    (0<<16) /* RCS wait for VCS  (RVSYNC) */
-+#define  MI_SEMAPHORE_SYNC_VB	    (2<<16) /* BCS wait for VCS  (BVSYNC) */
-+#define  MI_SEMAPHORE_SYNC_BV	    (0<<16) /* VCS wait for BCS  (VBSYNC) */
-+#define  MI_SEMAPHORE_SYNC_BR	    (2<<16) /* RCS wait for BCS  (RBSYNC) */
- #define  MI_SEMAPHORE_SYNC_INVALID  (1<<0)
- /*
-  * 3D instructions used by the kernel
---- a/drivers/gpu/drm/i915/intel_ringbuffer.c
-+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
-@@ -1686,9 +1686,9 @@ int intel_init_render_ring_buffer(struct
- 		ring->get_seqno = gen6_ring_get_seqno;
- 		ring->set_seqno = ring_set_seqno;
- 		ring->sync_to = gen6_ring_sync;
--		ring->semaphore_register[0] = MI_SEMAPHORE_SYNC_INVALID;
--		ring->semaphore_register[1] = MI_SEMAPHORE_SYNC_RV;
--		ring->semaphore_register[2] = MI_SEMAPHORE_SYNC_RB;
-+		ring->semaphore_register[RCS] = MI_SEMAPHORE_SYNC_INVALID;
-+		ring->semaphore_register[VCS] = MI_SEMAPHORE_SYNC_RV;
-+		ring->semaphore_register[BCS] = MI_SEMAPHORE_SYNC_RB;
- 		ring->signal_mbox[0] = GEN6_VRSYNC;
- 		ring->signal_mbox[1] = GEN6_BRSYNC;
- 	} else if (IS_GEN5(dev)) {
-@@ -1845,9 +1845,9 @@ int intel_init_bsd_ring_buffer(struct dr
- 		ring->irq_put = gen6_ring_put_irq;
- 		ring->dispatch_execbuffer = gen6_ring_dispatch_execbuffer;
- 		ring->sync_to = gen6_ring_sync;
--		ring->semaphore_register[0] = MI_SEMAPHORE_SYNC_VR;
--		ring->semaphore_register[1] = MI_SEMAPHORE_SYNC_INVALID;
--		ring->semaphore_register[2] = MI_SEMAPHORE_SYNC_VB;
-+		ring->semaphore_register[RCS] = MI_SEMAPHORE_SYNC_VR;
-+		ring->semaphore_register[VCS] = MI_SEMAPHORE_SYNC_INVALID;
-+		ring->semaphore_register[BCS] = MI_SEMAPHORE_SYNC_VB;
- 		ring->signal_mbox[0] = GEN6_RVSYNC;
- 		ring->signal_mbox[1] = GEN6_BVSYNC;
- 	} else {
-@@ -1891,9 +1891,9 @@ int intel_init_blt_ring_buffer(struct dr
- 	ring->irq_put = gen6_ring_put_irq;
- 	ring->dispatch_execbuffer = gen6_ring_dispatch_execbuffer;
- 	ring->sync_to = gen6_ring_sync;
--	ring->semaphore_register[0] = MI_SEMAPHORE_SYNC_BR;
--	ring->semaphore_register[1] = MI_SEMAPHORE_SYNC_BV;
--	ring->semaphore_register[2] = MI_SEMAPHORE_SYNC_INVALID;
-+	ring->semaphore_register[RCS] = MI_SEMAPHORE_SYNC_BR;
-+	ring->semaphore_register[VCS] = MI_SEMAPHORE_SYNC_BV;
-+	ring->semaphore_register[BCS] = MI_SEMAPHORE_SYNC_INVALID;
- 	ring->signal_mbox[0] = GEN6_RBSYNC;
- 	ring->signal_mbox[1] = GEN6_VBSYNC;
- 	ring->init = init_ring_common;
---- a/drivers/gpu/drm/i915/intel_ringbuffer.h
-+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
-@@ -105,8 +105,8 @@ struct  intel_ring_buffer {
- 	int		(*sync_to)(struct intel_ring_buffer *ring,
- 				   struct intel_ring_buffer *to,
- 				   u32 seqno);
--
--	u32		semaphore_register[3]; /*our mbox written by others */
-+	/* our mbox written by others */
-+	u32		semaphore_register[I915_NUM_RINGS];
- 	u32		signal_mbox[2]; /* mboxes this ring signals to */
- 	/**
- 	 * List of objects currently involved in rendering from the
diff --git a/patches.baytrail/0213-drm-i915-Semaphore-MBOX-update-generalization.patch b/patches.baytrail/0213-drm-i915-Semaphore-MBOX-update-generalization.patch
deleted file mode 100644
index 1ecd1896fb5f4..0000000000000
--- a/patches.baytrail/0213-drm-i915-Semaphore-MBOX-update-generalization.patch
+++ /dev/null
@@ -1,142 +0,0 @@
-From d2dfc993a86c85fda98e8aae9de0a8e7afb891cc Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Tue, 28 May 2013 19:22:18 -0700
-Subject: drm/i915: Semaphore MBOX update generalization
-
-This replaces the existing MBOX update code with a more generalized
-calculation for emitting mbox updates. We also create a sentinel for
-doing the updates so we can more abstractly deal with the rings.
-
-When doing MBOX updates the code must be aware of the /other/ rings.
-Until now the platforms which supported semaphores had a fixed number of
-rings and so it made sense for the code to be very specialized
-(hardcoded).
-
-The patch does contain a functional change, but should have no
-behavioral changes.
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit ad776f8b09d66e0145479fdbde2a710e5892441f)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_reg.h         |    1 
- drivers/gpu/drm/i915/intel_ringbuffer.c |   43 +++++++++++++++++++++-----------
- drivers/gpu/drm/i915/intel_ringbuffer.h |    5 ++-
- 3 files changed, 34 insertions(+), 15 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -593,6 +593,7 @@
- #define GEN6_VRSYNC (RING_SYNC_1(GEN6_BSD_RING_BASE))
- #define GEN6_VBSYNC (RING_SYNC_0(GEN6_BSD_RING_BASE))
- #define GEN6_BRSYNC (RING_SYNC_0(BLT_RING_BASE))
-+#define GEN6_NOSYNC 0
- #define GEN6_BVSYNC (RING_SYNC_1(BLT_RING_BASE))
- #define RING_MAX_IDLE(base)	((base)+0x54)
- #define RING_HWS_PGA(base)	((base)+0x80)
---- a/drivers/gpu/drm/i915/intel_ringbuffer.c
-+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
-@@ -581,9 +581,16 @@ static void
- update_mboxes(struct intel_ring_buffer *ring,
- 	      u32 mmio_offset)
- {
-+/* NB: In order to be able to do semaphore MBOX updates for varying number
-+ * of rings, it's easiest if we round up each individual update to a
-+ * multiple of 2 (since ring updates must always be a multiple of 2)
-+ * even though the actual update only requires 3 dwords.
-+ */
-+#define MBOX_UPDATE_DWORDS 4
- 	intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1));
- 	intel_ring_emit(ring, mmio_offset);
- 	intel_ring_emit(ring, ring->outstanding_lazy_request);
-+	intel_ring_emit(ring, MI_NOOP);
- }
- 
- /**
-@@ -598,19 +605,24 @@ update_mboxes(struct intel_ring_buffer *
- static int
- gen6_add_request(struct intel_ring_buffer *ring)
- {
--	u32 mbox1_reg;
--	u32 mbox2_reg;
--	int ret;
-+	struct drm_device *dev = ring->dev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct intel_ring_buffer *useless;
-+	int i, ret;
- 
--	ret = intel_ring_begin(ring, 10);
-+	ret = intel_ring_begin(ring, ((I915_NUM_RINGS-1) *
-+				      MBOX_UPDATE_DWORDS) +
-+				      4);
- 	if (ret)
- 		return ret;
-+#undef MBOX_UPDATE_DWORDS
- 
--	mbox1_reg = ring->signal_mbox[0];
--	mbox2_reg = ring->signal_mbox[1];
-+	for_each_ring(useless, dev_priv, i) {
-+		u32 mbox_reg = ring->signal_mbox[i];
-+		if (mbox_reg != GEN6_NOSYNC)
-+			update_mboxes(ring, mbox_reg);
-+	}
- 
--	update_mboxes(ring, mbox1_reg);
--	update_mboxes(ring, mbox2_reg);
- 	intel_ring_emit(ring, MI_STORE_DWORD_INDEX);
- 	intel_ring_emit(ring, I915_GEM_HWS_INDEX << MI_STORE_DWORD_INDEX_SHIFT);
- 	intel_ring_emit(ring, ring->outstanding_lazy_request);
-@@ -1689,8 +1701,9 @@ int intel_init_render_ring_buffer(struct
- 		ring->semaphore_register[RCS] = MI_SEMAPHORE_SYNC_INVALID;
- 		ring->semaphore_register[VCS] = MI_SEMAPHORE_SYNC_RV;
- 		ring->semaphore_register[BCS] = MI_SEMAPHORE_SYNC_RB;
--		ring->signal_mbox[0] = GEN6_VRSYNC;
--		ring->signal_mbox[1] = GEN6_BRSYNC;
-+		ring->signal_mbox[RCS] = GEN6_NOSYNC;
-+		ring->signal_mbox[VCS] = GEN6_VRSYNC;
-+		ring->signal_mbox[BCS] = GEN6_BRSYNC;
- 	} else if (IS_GEN5(dev)) {
- 		ring->add_request = pc_render_add_request;
- 		ring->flush = gen4_render_ring_flush;
-@@ -1848,8 +1861,9 @@ int intel_init_bsd_ring_buffer(struct dr
- 		ring->semaphore_register[RCS] = MI_SEMAPHORE_SYNC_VR;
- 		ring->semaphore_register[VCS] = MI_SEMAPHORE_SYNC_INVALID;
- 		ring->semaphore_register[BCS] = MI_SEMAPHORE_SYNC_VB;
--		ring->signal_mbox[0] = GEN6_RVSYNC;
--		ring->signal_mbox[1] = GEN6_BVSYNC;
-+		ring->signal_mbox[RCS] = GEN6_RVSYNC;
-+		ring->signal_mbox[VCS] = GEN6_NOSYNC;
-+		ring->signal_mbox[BCS] = GEN6_BVSYNC;
- 	} else {
- 		ring->mmio_base = BSD_RING_BASE;
- 		ring->flush = bsd_ring_flush;
-@@ -1894,8 +1908,9 @@ int intel_init_blt_ring_buffer(struct dr
- 	ring->semaphore_register[RCS] = MI_SEMAPHORE_SYNC_BR;
- 	ring->semaphore_register[VCS] = MI_SEMAPHORE_SYNC_BV;
- 	ring->semaphore_register[BCS] = MI_SEMAPHORE_SYNC_INVALID;
--	ring->signal_mbox[0] = GEN6_RBSYNC;
--	ring->signal_mbox[1] = GEN6_VBSYNC;
-+	ring->signal_mbox[RCS] = GEN6_RBSYNC;
-+	ring->signal_mbox[VCS] = GEN6_VBSYNC;
-+	ring->signal_mbox[BCS] = GEN6_NOSYNC;
- 	ring->init = init_ring_common;
- 
- 	return intel_init_ring_buffer(dev, ring);
---- a/drivers/gpu/drm/i915/intel_ringbuffer.h
-+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
-@@ -105,9 +105,12 @@ struct  intel_ring_buffer {
- 	int		(*sync_to)(struct intel_ring_buffer *ring,
- 				   struct intel_ring_buffer *to,
- 				   u32 seqno);
-+
- 	/* our mbox written by others */
- 	u32		semaphore_register[I915_NUM_RINGS];
--	u32		signal_mbox[2]; /* mboxes this ring signals to */
-+	/* mboxes this ring signals to */
-+	u32		signal_mbox[I915_NUM_RINGS];
-+
- 	/**
- 	 * List of objects currently involved in rendering from the
- 	 * ringbuffer.
diff --git a/patches.baytrail/0214-drm-i915-Introduce-VECS-the-4th-ring.patch b/patches.baytrail/0214-drm-i915-Introduce-VECS-the-4th-ring.patch
deleted file mode 100644
index a6804ad8c48df..0000000000000
--- a/patches.baytrail/0214-drm-i915-Introduce-VECS-the-4th-ring.patch
+++ /dev/null
@@ -1,55 +0,0 @@
-From 8b47e7d28bf88e4bedf76827a06aad825b94f91f Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Tue, 28 May 2013 19:22:19 -0700
-Subject: drm/i915: Introduce VECS: the 4th ring
-
-The video enhancement command streamer is a new ring on HSW which does
-what it sounds like it does. This patch provides the most minimal
-inception of the ring.
-
-In order to support a new ring, we need to bump the number. The patch
-may look trivial to the untrained eye, but bumping the number of rings
-is a bit scary. As such the patch is not terribly useful by itself, but
-a pretty nice place to find issues during a bisection.
-
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 4a3dd19d94c65323d71b2ffc7e63940f00acfb47)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_ringbuffer.c | 2 ++
- drivers/gpu/drm/i915/intel_ringbuffer.h | 3 ++-
- 2 files changed, 4 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
-index 97555b7d4d0c..4f51e8da8dfe 100644
---- a/drivers/gpu/drm/i915/intel_ringbuffer.c
-+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
-@@ -914,6 +914,8 @@ void intel_ring_setup_status_page(struct intel_ring_buffer *ring)
- 		case VCS:
- 			mmio = BSD_HWS_PGA_GEN7;
- 			break;
-+		case VECS:
-+			BUG();
- 		}
- 	} else if (IS_GEN6(ring->dev)) {
- 		mmio = RING_HWS_PGA_GEN6(ring->mmio_base);
-diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
-index f55d92eb6c2a..73619cb34631 100644
---- a/drivers/gpu/drm/i915/intel_ringbuffer.h
-+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
-@@ -47,8 +47,9 @@ struct  intel_ring_buffer {
- 		RCS = 0x0,
- 		VCS,
- 		BCS,
-+		VECS,
- 	} id;
--#define I915_NUM_RINGS 3
-+#define I915_NUM_RINGS 4
- 	u32		mmio_base;
- 	void		__iomem *virtual_start;
- 	struct		drm_device *dev;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0215-drm-i915-Add-VECS-semaphore-bits.patch b/patches.baytrail/0215-drm-i915-Add-VECS-semaphore-bits.patch
deleted file mode 100644
index dc596e4db5091..0000000000000
--- a/patches.baytrail/0215-drm-i915-Add-VECS-semaphore-bits.patch
+++ /dev/null
@@ -1,127 +0,0 @@
-From 894554d1cc2a1ec72c3f24a7f1dccbeb7288bc20 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Tue, 28 May 2013 19:22:20 -0700
-Subject: drm/i915: Add VECS semaphore bits
-
-Like the other rings, the VECS supports semaphores. The semaphore stuff
-is a bit wonky so this patch on it's own should be nice for review.
-
-This patch should have no functional impact.
-
-v2: Fix the English parts of clarification (again, register names were
-right, text was reversed) (Damien)
-Restore the still valid invariant. (Damien)
-The bsd semaphore register should be MI_SEMAPHORE_SYNC_VVE (Damien)
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 1950de14fd1b8ea27a411929156c7eccee2ad7c3)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_reg.h         |   40 +++++++++++++++++++++-----------
- drivers/gpu/drm/i915/intel_ringbuffer.c |    6 ++++
- 2 files changed, 33 insertions(+), 13 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -265,13 +265,19 @@
- #define  MI_SEMAPHORE_UPDATE	    (1<<21)
- #define  MI_SEMAPHORE_COMPARE	    (1<<20)
- #define  MI_SEMAPHORE_REGISTER	    (1<<18)
--#define  MI_SEMAPHORE_SYNC_RB	    (0<<16) /* BCS wait for RCS  (BRSYNC) */
--#define  MI_SEMAPHORE_SYNC_RV	    (2<<16) /* VCS wait for RCS  (VRSYNC) */
--#define  MI_SEMAPHORE_SYNC_VR	    (0<<16) /* RCS wait for VCS  (RVSYNC) */
--#define  MI_SEMAPHORE_SYNC_VB	    (2<<16) /* BCS wait for VCS  (BVSYNC) */
--#define  MI_SEMAPHORE_SYNC_BV	    (0<<16) /* VCS wait for BCS  (VBSYNC) */
--#define  MI_SEMAPHORE_SYNC_BR	    (2<<16) /* RCS wait for BCS  (RBSYNC) */
--#define  MI_SEMAPHORE_SYNC_INVALID  (1<<0)
-+#define  MI_SEMAPHORE_SYNC_VR	    (0<<16) /* RCS  wait for VCS  (RVSYNC) */
-+#define  MI_SEMAPHORE_SYNC_VER	    (1<<16) /* RCS  wait for VECS (RVESYNC) */
-+#define  MI_SEMAPHORE_SYNC_BR	    (2<<16) /* RCS  wait for BCS  (RBSYNC) */
-+#define  MI_SEMAPHORE_SYNC_BV	    (0<<16) /* VCS  wait for BCS  (VBSYNC) */
-+#define  MI_SEMAPHORE_SYNC_VEV	    (1<<16) /* VCS  wait for VECS (VVESYNC) */
-+#define  MI_SEMAPHORE_SYNC_RV	    (2<<16) /* VCS  wait for RCS  (VRSYNC) */
-+#define  MI_SEMAPHORE_SYNC_RB	    (0<<16) /* BCS  wait for RCS  (BRSYNC) */
-+#define  MI_SEMAPHORE_SYNC_VEB	    (1<<16) /* BCS  wait for VECS (BVESYNC) */
-+#define  MI_SEMAPHORE_SYNC_VB	    (2<<16) /* BCS  wait for VCS  (BVSYNC) */
-+#define  MI_SEMAPHORE_SYNC_BVE	    (0<<16) /* VECS wait for BCS  (VEBSYNC) */
-+#define  MI_SEMAPHORE_SYNC_VVE	    (1<<16) /* VECS wait for VCS  (VEVSYNC) */
-+#define  MI_SEMAPHORE_SYNC_RVE	    (2<<16) /* VECS wait for RCS  (VERSYNC) */
-+#define  MI_SEMAPHORE_SYNC_INVALID  (3<<16)
- /*
-  * 3D instructions used by the kernel
-  */
-@@ -581,6 +587,7 @@
- #define RENDER_RING_BASE	0x02000
- #define BSD_RING_BASE		0x04000
- #define GEN6_BSD_RING_BASE	0x12000
-+#define VEBOX_RING_BASE		0x1a000
- #define BLT_RING_BASE		0x22000
- #define RING_TAIL(base)		((base)+0x30)
- #define RING_HEAD(base)		((base)+0x34)
-@@ -588,13 +595,20 @@
- #define RING_CTL(base)		((base)+0x3c)
- #define RING_SYNC_0(base)	((base)+0x40)
- #define RING_SYNC_1(base)	((base)+0x44)
--#define GEN6_RVSYNC (RING_SYNC_0(RENDER_RING_BASE))
--#define GEN6_RBSYNC (RING_SYNC_1(RENDER_RING_BASE))
--#define GEN6_VRSYNC (RING_SYNC_1(GEN6_BSD_RING_BASE))
--#define GEN6_VBSYNC (RING_SYNC_0(GEN6_BSD_RING_BASE))
--#define GEN6_BRSYNC (RING_SYNC_0(BLT_RING_BASE))
-+#define RING_SYNC_2(base)	((base)+0x48)
-+#define GEN6_RVSYNC	(RING_SYNC_0(RENDER_RING_BASE))
-+#define GEN6_RBSYNC	(RING_SYNC_1(RENDER_RING_BASE))
-+#define GEN6_RVESYNC	(RING_SYNC_2(RENDER_RING_BASE))
-+#define GEN6_VBSYNC	(RING_SYNC_0(GEN6_BSD_RING_BASE))
-+#define GEN6_VRSYNC	(RING_SYNC_1(GEN6_BSD_RING_BASE))
-+#define GEN6_VVESYNC	(RING_SYNC_2(GEN6_BSD_RING_BASE))
-+#define GEN6_BRSYNC	(RING_SYNC_0(BLT_RING_BASE))
-+#define GEN6_BVSYNC	(RING_SYNC_1(BLT_RING_BASE))
-+#define GEN6_BVESYNC	(RING_SYNC_2(BLT_RING_BASE))
-+#define GEN6_VEBSYNC	(RING_SYNC_0(VEBOX_RING_BASE))
-+#define GEN6_VERSYNC	(RING_SYNC_1(VEBOX_RING_BASE))
-+#define GEN6_VEVSYNC	(RING_SYNC_2(VEBOX_RING_BASE))
- #define GEN6_NOSYNC 0
--#define GEN6_BVSYNC (RING_SYNC_1(BLT_RING_BASE))
- #define RING_MAX_IDLE(base)	((base)+0x54)
- #define RING_HWS_PGA(base)	((base)+0x80)
- #define RING_HWS_PGA_GEN6(base)	((base)+0x2080)
---- a/drivers/gpu/drm/i915/intel_ringbuffer.c
-+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
-@@ -1703,9 +1703,11 @@ int intel_init_render_ring_buffer(struct
- 		ring->semaphore_register[RCS] = MI_SEMAPHORE_SYNC_INVALID;
- 		ring->semaphore_register[VCS] = MI_SEMAPHORE_SYNC_RV;
- 		ring->semaphore_register[BCS] = MI_SEMAPHORE_SYNC_RB;
-+		ring->semaphore_register[VECS] = MI_SEMAPHORE_SYNC_RVE;
- 		ring->signal_mbox[RCS] = GEN6_NOSYNC;
- 		ring->signal_mbox[VCS] = GEN6_VRSYNC;
- 		ring->signal_mbox[BCS] = GEN6_BRSYNC;
-+		ring->signal_mbox[VECS] = GEN6_VERSYNC;
- 	} else if (IS_GEN5(dev)) {
- 		ring->add_request = pc_render_add_request;
- 		ring->flush = gen4_render_ring_flush;
-@@ -1863,9 +1865,11 @@ int intel_init_bsd_ring_buffer(struct dr
- 		ring->semaphore_register[RCS] = MI_SEMAPHORE_SYNC_VR;
- 		ring->semaphore_register[VCS] = MI_SEMAPHORE_SYNC_INVALID;
- 		ring->semaphore_register[BCS] = MI_SEMAPHORE_SYNC_VB;
-+		ring->semaphore_register[VECS] = MI_SEMAPHORE_SYNC_VVE;
- 		ring->signal_mbox[RCS] = GEN6_RVSYNC;
- 		ring->signal_mbox[VCS] = GEN6_NOSYNC;
- 		ring->signal_mbox[BCS] = GEN6_BVSYNC;
-+		ring->signal_mbox[VECS] = GEN6_VEVSYNC;
- 	} else {
- 		ring->mmio_base = BSD_RING_BASE;
- 		ring->flush = bsd_ring_flush;
-@@ -1910,9 +1914,11 @@ int intel_init_blt_ring_buffer(struct dr
- 	ring->semaphore_register[RCS] = MI_SEMAPHORE_SYNC_BR;
- 	ring->semaphore_register[VCS] = MI_SEMAPHORE_SYNC_BV;
- 	ring->semaphore_register[BCS] = MI_SEMAPHORE_SYNC_INVALID;
-+	ring->semaphore_register[VECS] = MI_SEMAPHORE_SYNC_BVE;
- 	ring->signal_mbox[RCS] = GEN6_RBSYNC;
- 	ring->signal_mbox[VCS] = GEN6_VBSYNC;
- 	ring->signal_mbox[BCS] = GEN6_NOSYNC;
-+	ring->signal_mbox[VECS] = GEN6_VEBSYNC;
- 	ring->init = init_ring_common;
- 
- 	return intel_init_ring_buffer(dev, ring);
diff --git a/patches.baytrail/0216-drm-i915-Rename-ring-flush-functions.patch b/patches.baytrail/0216-drm-i915-Rename-ring-flush-functions.patch
deleted file mode 100644
index f542c7535c290..0000000000000
--- a/patches.baytrail/0216-drm-i915-Rename-ring-flush-functions.patch
+++ /dev/null
@@ -1,66 +0,0 @@
-From 23a0013dedffc706c22105480f50489de98d6c00 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Tue, 28 May 2013 19:22:21 -0700
-Subject: drm/i915: Rename ring flush functions
-
-Historically we considered the render ring to have special flush
-semantics and everything else to fall under a more general umbrella.
-Probably by coincidence more than anything we decided to make the bsd
-ring have the default *other* flush. As the new vebox ring exposes, the
-bsd ring is actually the weird one. Doing this allows us to call
-gen6_ring_flush for the vebox because calling blt_ring_flush would be
-weird...
-
-This patch should have no functional change.
-
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit ea251324cac6c1e0402db073e5193f33aedd94f3)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_ringbuffer.c |   12 ++++++------
- 1 file changed, 6 insertions(+), 6 deletions(-)
-
---- a/drivers/gpu/drm/i915/intel_ringbuffer.c
-+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
-@@ -1580,8 +1580,8 @@ static void gen6_bsd_ring_write_tail(str
- 		   _MASKED_BIT_DISABLE(GEN6_BSD_SLEEP_MSG_DISABLE));
- }
- 
--static int gen6_ring_flush(struct intel_ring_buffer *ring,
--			   u32 invalidate, u32 flush)
-+static int gen6_bsd_ring_flush(struct intel_ring_buffer *ring,
-+			       u32 invalidate, u32 flush)
- {
- 	uint32_t cmd;
- 	int ret;
-@@ -1652,8 +1652,8 @@ gen6_ring_dispatch_execbuffer(struct int
- 
- /* Blitter support (SandyBridge+) */
- 
--static int blt_ring_flush(struct intel_ring_buffer *ring,
--			  u32 invalidate, u32 flush)
-+static int gen6_ring_flush(struct intel_ring_buffer *ring,
-+			   u32 invalidate, u32 flush)
- {
- 	uint32_t cmd;
- 	int ret;
-@@ -1853,7 +1853,7 @@ int intel_init_bsd_ring_buffer(struct dr
- 		/* gen6 bsd needs a special wa for tail updates */
- 		if (IS_GEN6(dev))
- 			ring->write_tail = gen6_bsd_ring_write_tail;
--		ring->flush = gen6_ring_flush;
-+		ring->flush = gen6_bsd_ring_flush;
- 		ring->add_request = gen6_add_request;
- 		ring->get_seqno = gen6_ring_get_seqno;
- 		ring->set_seqno = ring_set_seqno;
-@@ -1902,7 +1902,7 @@ int intel_init_blt_ring_buffer(struct dr
- 
- 	ring->mmio_base = BLT_RING_BASE;
- 	ring->write_tail = ring_write_tail;
--	ring->flush = blt_ring_flush;
-+	ring->flush = gen6_ring_flush;
- 	ring->add_request = gen6_add_request;
- 	ring->get_seqno = gen6_ring_get_seqno;
- 	ring->set_seqno = ring_set_seqno;
diff --git a/patches.baytrail/0217-drm-i915-add-HAS_VEBOX.patch b/patches.baytrail/0217-drm-i915-add-HAS_VEBOX.patch
deleted file mode 100644
index bacdcc636fed5..0000000000000
--- a/patches.baytrail/0217-drm-i915-add-HAS_VEBOX.patch
+++ /dev/null
@@ -1,65 +0,0 @@
-From 8e7b8296771e2e0f1eece8977aa5d84be8c4d9c0 Mon Sep 17 00:00:00 2001
-From: "Xiang, Haihao" <haihao.xiang@intel.com>
-Date: Tue, 28 May 2013 19:22:22 -0700
-Subject: drm/i915: add HAS_VEBOX
-
-The flag will be useful to help share code between IVB, and HSW as the
-programming is similar in many places with this as one of the major
-differences.
-
-Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
-[Commit message + small fix by]
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit f72a1183b31cd1bebf926f904c1f025a90d153a1)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.c | 2 ++
- drivers/gpu/drm/i915/i915_drv.h | 2 ++
- 2 files changed, 4 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
-index 94492d1cdb0c..9136fcdcd24a 100644
---- a/drivers/gpu/drm/i915/i915_drv.c
-+++ b/drivers/gpu/drm/i915/i915_drv.c
-@@ -311,6 +311,7 @@ static const struct intel_device_info intel_haswell_d_info = {
- 	.is_haswell = 1,
- 	.has_ddi = 1,
- 	.has_fpga_dbg = 1,
-+	.has_vebox_ring = 1,
- };
- 
- static const struct intel_device_info intel_haswell_m_info = {
-@@ -320,6 +321,7 @@ static const struct intel_device_info intel_haswell_m_info = {
- 	.has_ddi = 1,
- 	.has_fpga_dbg = 1,
- 	.has_fbc = 1,
-+	.has_vebox_ring = 1,
- };
- 
- static const struct pci_device_id pciidlist[] = {		/* aka */
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 16a69b82e865..ae8b9668b8ff 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -374,6 +374,7 @@ struct drm_i915_gt_funcs {
- 	func(supports_tv) sep \
- 	func(has_bsd_ring) sep \
- 	func(has_blt_ring) sep \
-+	func(has_vebox_ring) sep \
- 	func(has_llc) sep \
- 	func(has_ddi) sep \
- 	func(has_fpga_dbg)
-@@ -1374,6 +1375,7 @@ struct drm_i915_file_private {
- 
- #define HAS_BSD(dev)            (INTEL_INFO(dev)->has_bsd_ring)
- #define HAS_BLT(dev)            (INTEL_INFO(dev)->has_blt_ring)
-+#define HAS_VEBOX(dev)          (INTEL_INFO(dev)->has_vebox_ring)
- #define HAS_LLC(dev)            (INTEL_INFO(dev)->has_llc)
- #define I915_NEED_GFX_HWS(dev)	(INTEL_INFO(dev)->need_gfx_hws)
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0218-drm-i915-Vebox-ringbuffer-init.patch b/patches.baytrail/0218-drm-i915-Vebox-ringbuffer-init.patch
deleted file mode 100644
index bddad734a0124..0000000000000
--- a/patches.baytrail/0218-drm-i915-Vebox-ringbuffer-init.patch
+++ /dev/null
@@ -1,116 +0,0 @@
-From df17af4a02da8dc65abe33d9517038e2482adbb5 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Tue, 28 May 2013 19:22:23 -0700
-Subject: drm/i915: Vebox ringbuffer init
-
-v2: Add set_seqno which didn't exist before rebase (Haihao)
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 9a8a2213a778509b724c8fda04be70528a1f7130)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem.c         |   11 +++++++++-
- drivers/gpu/drm/i915/i915_reg.h         |    1 
- drivers/gpu/drm/i915/intel_ringbuffer.c |   35 +++++++++++++++++++++++++++++++-
- drivers/gpu/drm/i915/intel_ringbuffer.h |    1 
- 4 files changed, 46 insertions(+), 2 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -4043,12 +4043,21 @@ static int i915_gem_init_rings(struct dr
- 			goto cleanup_bsd_ring;
- 	}
- 
-+	if (HAS_VEBOX(dev)) {
-+		ret = intel_init_vebox_ring_buffer(dev);
-+		if (ret)
-+			goto cleanup_blt_ring;
-+	}
-+
-+
- 	ret = i915_gem_set_seqno(dev, ((u32)~0 - 0x1000));
- 	if (ret)
--		goto cleanup_blt_ring;
-+		goto cleanup_vebox_ring;
- 
- 	return 0;
- 
-+cleanup_vebox_ring:
-+	intel_cleanup_ring_buffer(&dev_priv->ring[VECS]);
- cleanup_blt_ring:
- 	intel_cleanup_ring_buffer(&dev_priv->ring[BCS]);
- cleanup_bsd_ring:
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -620,6 +620,7 @@
- #define DONE_REG		0x40b0
- #define BSD_HWS_PGA_GEN7	(0x04180)
- #define BLT_HWS_PGA_GEN7	(0x04280)
-+#define VEBOX_HWS_PGA_GEN7	(0x04380)
- #define RING_ACTHD(base)	((base)+0x74)
- #define RING_NOPID(base)	((base)+0x94)
- #define RING_IMR(base)		((base)+0xa8)
---- a/drivers/gpu/drm/i915/intel_ringbuffer.c
-+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
-@@ -915,7 +915,8 @@ void intel_ring_setup_status_page(struct
- 			mmio = BSD_HWS_PGA_GEN7;
- 			break;
- 		case VECS:
--			BUG();
-+			mmio = VEBOX_HWS_PGA_GEN7;
-+			break;
- 		}
- 	} else if (IS_GEN6(ring->dev)) {
- 		mmio = RING_HWS_PGA_GEN6(ring->mmio_base);
-@@ -1922,6 +1923,38 @@ int intel_init_blt_ring_buffer(struct dr
- 	ring->init = init_ring_common;
- 
- 	return intel_init_ring_buffer(dev, ring);
-+}
-+
-+int intel_init_vebox_ring_buffer(struct drm_device *dev)
-+{
-+	drm_i915_private_t *dev_priv = dev->dev_private;
-+	struct intel_ring_buffer *ring = &dev_priv->ring[VECS];
-+
-+	ring->name = "video enhancement ring";
-+	ring->id = VECS;
-+
-+	ring->mmio_base = VEBOX_RING_BASE;
-+	ring->write_tail = ring_write_tail;
-+	ring->flush = gen6_ring_flush;
-+	ring->add_request = gen6_add_request;
-+	ring->get_seqno = gen6_ring_get_seqno;
-+	ring->set_seqno = ring_set_seqno;
-+	ring->irq_enable_mask = 0;
-+	ring->irq_get = NULL;
-+	ring->irq_put = NULL;
-+	ring->dispatch_execbuffer = gen6_ring_dispatch_execbuffer;
-+	ring->sync_to = gen6_ring_sync;
-+	ring->semaphore_register[RCS] = MI_SEMAPHORE_SYNC_VER;
-+	ring->semaphore_register[VCS] = MI_SEMAPHORE_SYNC_VEV;
-+	ring->semaphore_register[BCS] = MI_SEMAPHORE_SYNC_VEB;
-+	ring->semaphore_register[VECS] = MI_SEMAPHORE_SYNC_INVALID;
-+	ring->signal_mbox[RCS] = GEN6_RVESYNC;
-+	ring->signal_mbox[VCS] = GEN6_VVESYNC;
-+	ring->signal_mbox[BCS] = GEN6_BVESYNC;
-+	ring->signal_mbox[VECS] = GEN6_NOSYNC;
-+	ring->init = init_ring_common;
-+
-+	return intel_init_ring_buffer(dev, ring);
- }
- 
- int
---- a/drivers/gpu/drm/i915/intel_ringbuffer.h
-+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
-@@ -234,6 +234,7 @@ int intel_ring_invalidate_all_caches(str
- int intel_init_render_ring_buffer(struct drm_device *dev);
- int intel_init_bsd_ring_buffer(struct drm_device *dev);
- int intel_init_blt_ring_buffer(struct drm_device *dev);
-+int intel_init_vebox_ring_buffer(struct drm_device *dev);
- 
- u32 intel_ring_get_active_head(struct intel_ring_buffer *ring);
- void intel_ring_setup_status_page(struct intel_ring_buffer *ring);
diff --git a/patches.baytrail/0219-drm-i915-fix-pch_nop-support.patch b/patches.baytrail/0219-drm-i915-fix-pch_nop-support.patch
deleted file mode 100644
index b1bff9107cd84..0000000000000
--- a/patches.baytrail/0219-drm-i915-fix-pch_nop-support.patch
+++ /dev/null
@@ -1,51 +0,0 @@
-From 56a3329380e6430d74d338bfcedda84951e80784 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Wed, 29 May 2013 21:43:05 +0200
-Subject: drm/i915: fix pch_nop support
-
-This was accidentally broken in the south error interrupt handling
-work:
-
-commit 8664281b64c457705db72fc60143d03827e75ca9
-Author: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date:   Fri Apr 12 17:57:57 2013 -0300
-
-    drm/i915: report Gen5+ CPU and PCH FIFO underruns
-
-Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Cc: Ben Widawsky <ben@bwidawsk.net>
-Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 692a04cf77e6073a60a9eaa87b7c409b6cf0283b)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 6 +++---
- 1 file changed, 3 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index c0d9f876a690..77baf991499b 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -2588,6 +2588,9 @@ static void ibx_irq_postinstall(struct drm_device *dev)
- 	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
- 	u32 mask;
- 
-+	if (HAS_PCH_NOP(dev))
-+		return;
-+
- 	if (HAS_PCH_IBX(dev)) {
- 		mask = SDE_GMBUS | SDE_AUX_MASK | SDE_TRANSB_FIFO_UNDER |
- 		       SDE_TRANSA_FIFO_UNDER | SDE_POISON;
-@@ -2597,9 +2600,6 @@ static void ibx_irq_postinstall(struct drm_device *dev)
- 		I915_WRITE(SERR_INT, I915_READ(SERR_INT));
- 	}
- 
--	if (HAS_PCH_NOP(dev))
--		return;
--
- 	I915_WRITE(SDEIIR, I915_READ(SDEIIR));
- 	I915_WRITE(SDEIMR, ~mask);
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0220-drm-i915-properly-set-HSW-WM_PIPE-registers.patch b/patches.baytrail/0220-drm-i915-properly-set-HSW-WM_PIPE-registers.patch
deleted file mode 100644
index 26867115d3722..0000000000000
--- a/patches.baytrail/0220-drm-i915-properly-set-HSW-WM_PIPE-registers.patch
+++ /dev/null
@@ -1,426 +0,0 @@
-From 9e5631af96314147533b47ba2c7c0a3f54b7db9d Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Fri, 31 May 2013 10:08:35 -0300
-Subject: drm/i915: properly set HSW WM_PIPE registers
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-We were previously calling sandybridge_update_wm on HSW, but the SNB
-function didn't really match the HSW specification, so we were just
-writing the wrong values.
-
-With this patch, the haswell_update_wm function will set the correct
-values for the WM_PIPE registers, but it will still keep all the LP
-watermarks disabled.
-
-The patch may look a little bit over-complicated for now, but it's
-because much of the infrastructure for setting the LP watermarks is
-already in place, so we won't have too much code churn on the patch
-that sets the LP watermarks.
-
-v2: - Fix pixel_rate on panel fitter case (Ville)
-    - Try to not overflow (Ville)
-    - Remove useless variable (Ville)
-    - Fix p->pri_horiz_pixels (Paulo)
-v3: - Fix rounding errors on hsw_wm_method2 (Ville)
-v4: - Fix memcmp bug (Paulo)
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 801bcfffbb0721d7131e930f9a46103e539c43a4)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_reg.h |    3 
- drivers/gpu/drm/i915/intel_pm.c |  342 +++++++++++++++++++++++++++++++++++++---
- 2 files changed, 327 insertions(+), 18 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -4957,6 +4957,9 @@
- #define  SFUSE_STRAP_DDIC_DETECTED	(1<<1)
- #define  SFUSE_STRAP_DDID_DETECTED	(1<<0)
- 
-+#define WM_MISC				0x45260
-+#define  WM_MISC_DATA_PARTITION_5_6	(1 << 0)
-+
- #define WM_DBG				0x45280
- #define  WM_DBG_DISALLOW_MULTIPLE_LP	(1<<0)
- #define  WM_DBG_DISALLOW_MAXFIFO	(1<<1)
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2072,19 +2072,170 @@ static void ivybridge_update_wm(struct d
- 		   cursor_wm);
- }
- 
--static void
--haswell_update_linetime_wm(struct drm_device *dev, struct drm_crtc *crtc)
-+static uint32_t hsw_wm_get_pixel_rate(struct drm_device *dev,
-+				      struct drm_crtc *crtc)
-+{
-+	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
-+	uint32_t pixel_rate, pfit_size;
-+
-+	if (intel_crtc->config.pixel_target_clock)
-+		pixel_rate = intel_crtc->config.pixel_target_clock;
-+	else
-+		pixel_rate = intel_crtc->config.adjusted_mode.clock;
-+
-+	/* We only use IF-ID interlacing. If we ever use PF-ID we'll need to
-+	 * adjust the pixel_rate here. */
-+
-+	pfit_size = intel_crtc->config.pch_pfit.size;
-+	if (pfit_size) {
-+		uint64_t pipe_w, pipe_h, pfit_w, pfit_h;
-+
-+		pipe_w = intel_crtc->config.requested_mode.hdisplay;
-+		pipe_h = intel_crtc->config.requested_mode.vdisplay;
-+		pfit_w = (pfit_size >> 16) & 0xFFFF;
-+		pfit_h = pfit_size & 0xFFFF;
-+		if (pipe_w < pfit_w)
-+			pipe_w = pfit_w;
-+		if (pipe_h < pfit_h)
-+			pipe_h = pfit_h;
-+
-+		pixel_rate = div_u64((uint64_t) pixel_rate * pipe_w * pipe_h,
-+				     pfit_w * pfit_h);
-+	}
-+
-+	return pixel_rate;
-+}
-+
-+static uint32_t hsw_wm_method1(uint32_t pixel_rate, uint8_t bytes_per_pixel,
-+			       uint32_t latency)
-+{
-+	uint64_t ret;
-+
-+	ret = (uint64_t) pixel_rate * bytes_per_pixel * latency;
-+	ret = DIV_ROUND_UP_ULL(ret, 64 * 10000) + 2;
-+
-+	return ret;
-+}
-+
-+static uint32_t hsw_wm_method2(uint32_t pixel_rate, uint32_t pipe_htotal,
-+			       uint32_t horiz_pixels, uint8_t bytes_per_pixel,
-+			       uint32_t latency)
-+{
-+	uint32_t ret;
-+
-+	ret = (latency * pixel_rate) / (pipe_htotal * 10000);
-+	ret = (ret + 1) * horiz_pixels * bytes_per_pixel;
-+	ret = DIV_ROUND_UP(ret, 64) + 2;
-+	return ret;
-+}
-+
-+struct hsw_pipe_wm_parameters {
-+	bool active;
-+	bool sprite_enabled;
-+	uint8_t pri_bytes_per_pixel;
-+	uint8_t spr_bytes_per_pixel;
-+	uint8_t cur_bytes_per_pixel;
-+	uint32_t pri_horiz_pixels;
-+	uint32_t spr_horiz_pixels;
-+	uint32_t cur_horiz_pixels;
-+	uint32_t pipe_htotal;
-+	uint32_t pixel_rate;
-+};
-+
-+struct hsw_wm_values {
-+	uint32_t wm_pipe[3];
-+	uint32_t wm_lp[3];
-+	uint32_t wm_lp_spr[3];
-+	uint32_t wm_linetime[3];
-+};
-+
-+enum hsw_data_buf_partitioning {
-+	HSW_DATA_BUF_PART_1_2,
-+	HSW_DATA_BUF_PART_5_6,
-+};
-+
-+/* Only for WM_PIPE. */
-+static uint32_t hsw_compute_pri_wm_pipe(struct hsw_pipe_wm_parameters *params,
-+					uint32_t mem_value)
-+{
-+	/* TODO: for now, assume the primary plane is always enabled. */
-+	if (!params->active)
-+		return 0;
-+
-+	return hsw_wm_method1(params->pixel_rate,
-+			      params->pri_bytes_per_pixel,
-+			      mem_value);
-+}
-+
-+/* For both WM_PIPE and WM_LP. */
-+static uint32_t hsw_compute_spr_wm(struct hsw_pipe_wm_parameters *params,
-+				   uint32_t mem_value)
-+{
-+	uint32_t method1, method2;
-+
-+	if (!params->active || !params->sprite_enabled)
-+		return 0;
-+
-+	method1 = hsw_wm_method1(params->pixel_rate,
-+				 params->spr_bytes_per_pixel,
-+				 mem_value);
-+	method2 = hsw_wm_method2(params->pixel_rate,
-+				 params->pipe_htotal,
-+				 params->spr_horiz_pixels,
-+				 params->spr_bytes_per_pixel,
-+				 mem_value);
-+	return min(method1, method2);
-+}
-+
-+/* For both WM_PIPE and WM_LP. */
-+static uint32_t hsw_compute_cur_wm(struct hsw_pipe_wm_parameters *params,
-+				   uint32_t mem_value)
-+{
-+	if (!params->active)
-+		return 0;
-+
-+	return hsw_wm_method2(params->pixel_rate,
-+			      params->pipe_htotal,
-+			      params->cur_horiz_pixels,
-+			      params->cur_bytes_per_pixel,
-+			      mem_value);
-+}
-+
-+static uint32_t hsw_compute_wm_pipe(struct drm_i915_private *dev_priv,
-+				    uint32_t mem_value, enum pipe pipe,
-+				    struct hsw_pipe_wm_parameters *params)
-+{
-+	uint32_t pri_val, cur_val, spr_val;
-+
-+	pri_val = hsw_compute_pri_wm_pipe(params, mem_value);
-+	spr_val = hsw_compute_spr_wm(params, mem_value);
-+	cur_val = hsw_compute_cur_wm(params, mem_value);
-+
-+	WARN(pri_val > 127,
-+	     "Primary WM error, mode not supported for pipe %c\n",
-+	     pipe_name(pipe));
-+	WARN(spr_val > 127,
-+	     "Sprite WM error, mode not supported for pipe %c\n",
-+	     pipe_name(pipe));
-+	WARN(cur_val > 63,
-+	     "Cursor WM error, mode not supported for pipe %c\n",
-+	     pipe_name(pipe));
-+
-+	return (pri_val << WM0_PIPE_PLANE_SHIFT) |
-+	       (spr_val << WM0_PIPE_SPRITE_SHIFT) |
-+	       cur_val;
-+}
-+
-+static uint32_t
-+hsw_compute_linetime_wm(struct drm_device *dev, struct drm_crtc *crtc)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
--	enum pipe pipe = intel_crtc->pipe;
- 	struct drm_display_mode *mode = &intel_crtc->config.adjusted_mode;
- 	u32 linetime, ips_linetime;
- 
--	if (!intel_crtc_active(crtc)) {
--		I915_WRITE(PIPE_WM_LINETIME(pipe), 0);
--		return;
--	}
-+	if (!intel_crtc_active(crtc))
-+		return 0;
- 
- 	/* The WM are computed with base on how long it takes to fill a single
- 	 * row at the given clock rate, multiplied by 8.
-@@ -2093,29 +2244,184 @@ haswell_update_linetime_wm(struct drm_de
- 	ips_linetime = DIV_ROUND_CLOSEST(mode->htotal * 1000 * 8,
- 					 intel_ddi_get_cdclk_freq(dev_priv));
- 
--	I915_WRITE(PIPE_WM_LINETIME(pipe),
--		   PIPE_WM_LINETIME_IPS_LINETIME(ips_linetime) |
--		   PIPE_WM_LINETIME_TIME(linetime));
-+	return PIPE_WM_LINETIME_IPS_LINETIME(ips_linetime) |
-+	       PIPE_WM_LINETIME_TIME(linetime);
- }
- 
--static void haswell_update_wm(struct drm_device *dev)
-+static void hsw_compute_wm_parameters(struct drm_device *dev,
-+				      struct hsw_pipe_wm_parameters *params,
-+				      uint32_t *wm)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct drm_crtc *crtc;
-+	struct drm_plane *plane;
-+	uint64_t sskpd = I915_READ64(MCH_SSKPD);
-+	enum pipe pipe;
-+
-+	if ((sskpd >> 56) & 0xFF)
-+		wm[0] = (sskpd >> 56) & 0xFF;
-+	else
-+		wm[0] = sskpd & 0xF;
-+	wm[1] = ((sskpd >> 4) & 0xFF) * 5;
-+	wm[2] = ((sskpd >> 12) & 0xFF) * 5;
-+	wm[3] = ((sskpd >> 20) & 0x1FF) * 5;
-+	wm[4] = ((sskpd >> 32) & 0x1FF) * 5;
-+
-+	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
-+		struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
-+		struct hsw_pipe_wm_parameters *p;
-+
-+		pipe = intel_crtc->pipe;
-+		p = &params[pipe];
-+
-+		p->active = intel_crtc_active(crtc);
-+		if (!p->active)
-+			continue;
-+
-+		p->pipe_htotal = intel_crtc->config.adjusted_mode.htotal;
-+		p->pixel_rate = hsw_wm_get_pixel_rate(dev, crtc);
-+		p->pri_bytes_per_pixel = crtc->fb->bits_per_pixel / 8;
-+		p->cur_bytes_per_pixel = 4;
-+		p->pri_horiz_pixels =
-+			intel_crtc->config.requested_mode.hdisplay;
-+		p->cur_horiz_pixels = 64;
-+	}
-+
-+	list_for_each_entry(plane, &dev->mode_config.plane_list, head) {
-+		struct intel_plane *intel_plane = to_intel_plane(plane);
-+		struct hsw_pipe_wm_parameters *p;
-+
-+		pipe = intel_plane->pipe;
-+		p = &params[pipe];
-+
-+		p->sprite_enabled = intel_plane->wm.enable;
-+		p->spr_bytes_per_pixel = intel_plane->wm.bytes_per_pixel;
-+		p->spr_horiz_pixels = intel_plane->wm.horiz_pixels;
-+	}
-+}
-+
-+static void hsw_compute_wm_results(struct drm_device *dev,
-+				   struct hsw_pipe_wm_parameters *params,
-+				   uint32_t *wm,
-+				   struct hsw_wm_values *results)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct drm_crtc *crtc;
- 	enum pipe pipe;
- 
--	/* Disable the LP WMs before changine the linetime registers. This is
--	 * just a temporary code that will be replaced soon. */
--	I915_WRITE(WM3_LP_ILK, 0);
--	I915_WRITE(WM2_LP_ILK, 0);
--	I915_WRITE(WM1_LP_ILK, 0);
-+	/* No support for LP WMs yet. */
-+	results->wm_lp[2] = 0;
-+	results->wm_lp[1] = 0;
-+	results->wm_lp[0] = 0;
-+	results->wm_lp_spr[2] = 0;
-+	results->wm_lp_spr[1] = 0;
-+	results->wm_lp_spr[0] = 0;
-+
-+	for_each_pipe(pipe)
-+		results->wm_pipe[pipe] = hsw_compute_wm_pipe(dev_priv, wm[0],
-+							     pipe,
-+							     &params[pipe]);
- 
- 	for_each_pipe(pipe) {
- 		crtc = dev_priv->pipe_to_crtc_mapping[pipe];
--		haswell_update_linetime_wm(dev, crtc);
-+		results->wm_linetime[pipe] = hsw_compute_linetime_wm(dev, crtc);
-+	}
-+}
-+
-+/*
-+ * The spec says we shouldn't write when we don't need, because every write
-+ * causes WMs to be re-evaluated, expending some power.
-+ */
-+static void hsw_write_wm_values(struct drm_i915_private *dev_priv,
-+				struct hsw_wm_values *results,
-+				enum hsw_data_buf_partitioning partitioning)
-+{
-+	struct hsw_wm_values previous;
-+	uint32_t val;
-+	enum hsw_data_buf_partitioning prev_partitioning;
-+
-+	previous.wm_pipe[0] = I915_READ(WM0_PIPEA_ILK);
-+	previous.wm_pipe[1] = I915_READ(WM0_PIPEB_ILK);
-+	previous.wm_pipe[2] = I915_READ(WM0_PIPEC_IVB);
-+	previous.wm_lp[0] = I915_READ(WM1_LP_ILK);
-+	previous.wm_lp[1] = I915_READ(WM2_LP_ILK);
-+	previous.wm_lp[2] = I915_READ(WM3_LP_ILK);
-+	previous.wm_lp_spr[0] = I915_READ(WM1S_LP_ILK);
-+	previous.wm_lp_spr[1] = I915_READ(WM2S_LP_IVB);
-+	previous.wm_lp_spr[2] = I915_READ(WM3S_LP_IVB);
-+	previous.wm_linetime[0] = I915_READ(PIPE_WM_LINETIME(PIPE_A));
-+	previous.wm_linetime[1] = I915_READ(PIPE_WM_LINETIME(PIPE_B));
-+	previous.wm_linetime[2] = I915_READ(PIPE_WM_LINETIME(PIPE_C));
-+
-+	prev_partitioning = (I915_READ(WM_MISC) & WM_MISC_DATA_PARTITION_5_6) ?
-+			    HSW_DATA_BUF_PART_5_6 : HSW_DATA_BUF_PART_1_2;
-+
-+	if (memcmp(results->wm_pipe, previous.wm_pipe,
-+		   sizeof(results->wm_pipe)) == 0 &&
-+	    memcmp(results->wm_lp, previous.wm_lp,
-+		   sizeof(results->wm_lp)) == 0 &&
-+	    memcmp(results->wm_lp_spr, previous.wm_lp_spr,
-+		   sizeof(results->wm_lp_spr)) == 0 &&
-+	    memcmp(results->wm_linetime, previous.wm_linetime,
-+		   sizeof(results->wm_linetime)) == 0 &&
-+	    partitioning == prev_partitioning)
-+		return;
-+
-+	if (previous.wm_lp[2] != 0)
-+		I915_WRITE(WM3_LP_ILK, 0);
-+	if (previous.wm_lp[1] != 0)
-+		I915_WRITE(WM2_LP_ILK, 0);
-+	if (previous.wm_lp[0] != 0)
-+		I915_WRITE(WM1_LP_ILK, 0);
-+
-+	if (previous.wm_pipe[0] != results->wm_pipe[0])
-+		I915_WRITE(WM0_PIPEA_ILK, results->wm_pipe[0]);
-+	if (previous.wm_pipe[1] != results->wm_pipe[1])
-+		I915_WRITE(WM0_PIPEB_ILK, results->wm_pipe[1]);
-+	if (previous.wm_pipe[2] != results->wm_pipe[2])
-+		I915_WRITE(WM0_PIPEC_IVB, results->wm_pipe[2]);
-+
-+	if (previous.wm_linetime[0] != results->wm_linetime[0])
-+		I915_WRITE(PIPE_WM_LINETIME(PIPE_A), results->wm_linetime[0]);
-+	if (previous.wm_linetime[1] != results->wm_linetime[1])
-+		I915_WRITE(PIPE_WM_LINETIME(PIPE_B), results->wm_linetime[1]);
-+	if (previous.wm_linetime[2] != results->wm_linetime[2])
-+		I915_WRITE(PIPE_WM_LINETIME(PIPE_C), results->wm_linetime[2]);
-+
-+	if (prev_partitioning != partitioning) {
-+		val = I915_READ(WM_MISC);
-+		if (partitioning == HSW_DATA_BUF_PART_1_2)
-+			val &= ~WM_MISC_DATA_PARTITION_5_6;
-+		else
-+			val |= WM_MISC_DATA_PARTITION_5_6;
-+		I915_WRITE(WM_MISC, val);
- 	}
- 
--	sandybridge_update_wm(dev);
-+	if (previous.wm_lp_spr[0] != results->wm_lp_spr[0])
-+		I915_WRITE(WM1S_LP_ILK, results->wm_lp_spr[0]);
-+	if (previous.wm_lp_spr[1] != results->wm_lp_spr[1])
-+		I915_WRITE(WM2S_LP_IVB, results->wm_lp_spr[1]);
-+	if (previous.wm_lp_spr[2] != results->wm_lp_spr[2])
-+		I915_WRITE(WM3S_LP_IVB, results->wm_lp_spr[2]);
-+
-+	if (results->wm_lp[0] != 0)
-+		I915_WRITE(WM1_LP_ILK, results->wm_lp[0]);
-+	if (results->wm_lp[1] != 0)
-+		I915_WRITE(WM2_LP_ILK, results->wm_lp[1]);
-+	if (results->wm_lp[2] != 0)
-+		I915_WRITE(WM3_LP_ILK, results->wm_lp[2]);
-+}
-+
-+static void haswell_update_wm(struct drm_device *dev)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct hsw_pipe_wm_parameters params[3];
-+	struct hsw_wm_values results;
-+	uint32_t wm[5];
-+
-+	hsw_compute_wm_parameters(dev, params, wm);
-+	hsw_compute_wm_results(dev, params, wm, &results);
-+	hsw_write_wm_values(dev_priv, &results, HSW_DATA_BUF_PART_1_2);
- }
- 
- static void haswell_update_sprite_wm(struct drm_device *dev, int pipe,
diff --git a/patches.baytrail/0221-drm-i915-properly-set-HSW-WM_LP-watermarks.patch b/patches.baytrail/0221-drm-i915-properly-set-HSW-WM_LP-watermarks.patch
deleted file mode 100644
index 5294d86db3843..0000000000000
--- a/patches.baytrail/0221-drm-i915-properly-set-HSW-WM_LP-watermarks.patch
+++ /dev/null
@@ -1,345 +0,0 @@
-From f242679dccec06216bfe835ee7daa6cdff6afb0d Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Fri, 31 May 2013 11:45:06 -0300
-Subject: drm/i915: properly set HSW WM_LP watermarks
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-We were previously only setting the WM_PIPE registers, now we are
-setting the LP watermark registers. This should allow deeper PC
-states, resulting in power savings.
-
-We're only using 1/2 data buffer partitioning for now.
-
-v2: Merge both hsw_compute_pri_wm_* functions (Ville)
-v3: - Simplify hsw_compute_wm_results (Ville)
-    - Rebase due to changes on the previous patch
-v4: Unconfuse wm_lp/level (Ville)
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit cca32e9ad372172c808b93eebff536459ce37d85)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_reg.h |    4 
- drivers/gpu/drm/i915/intel_pm.c |  179 +++++++++++++++++++++++++++++++++++-----
- 2 files changed, 165 insertions(+), 18 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -3110,6 +3110,10 @@
- #define WM3S_LP_IVB		0x45128
- #define  WM1S_LP_EN		(1<<31)
- 
-+#define HSW_WM_LP_VAL(lat, fbc, pri, cur) \
-+	(WM3_LP_EN | ((lat) << WM1_LP_LATENCY_SHIFT) | \
-+	 ((fbc) << WM1_LP_FBC_SHIFT) | ((pri) << WM1_LP_SR_SHIFT) | (cur))
-+
- /* Memory latency timer register */
- #define MLTR_ILK		0x11222
- #define  MLTR_WM1_SHIFT		0
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2129,6 +2129,12 @@ static uint32_t hsw_wm_method2(uint32_t
- 	return ret;
- }
- 
-+static uint32_t hsw_wm_fbc(uint32_t pri_val, uint32_t horiz_pixels,
-+			   uint8_t bytes_per_pixel)
-+{
-+	return DIV_ROUND_UP(pri_val * 64, horiz_pixels * bytes_per_pixel) + 2;
-+}
-+
- struct hsw_pipe_wm_parameters {
- 	bool active;
- 	bool sprite_enabled;
-@@ -2142,11 +2148,28 @@ struct hsw_pipe_wm_parameters {
- 	uint32_t pixel_rate;
- };
- 
-+struct hsw_wm_maximums {
-+	uint16_t pri;
-+	uint16_t spr;
-+	uint16_t cur;
-+	uint16_t fbc;
-+};
-+
-+struct hsw_lp_wm_result {
-+	bool enable;
-+	bool fbc_enable;
-+	uint32_t pri_val;
-+	uint32_t spr_val;
-+	uint32_t cur_val;
-+	uint32_t fbc_val;
-+};
-+
- struct hsw_wm_values {
- 	uint32_t wm_pipe[3];
- 	uint32_t wm_lp[3];
- 	uint32_t wm_lp_spr[3];
- 	uint32_t wm_linetime[3];
-+	bool enable_fbc_wm;
- };
- 
- enum hsw_data_buf_partitioning {
-@@ -2154,17 +2177,31 @@ enum hsw_data_buf_partitioning {
- 	HSW_DATA_BUF_PART_5_6,
- };
- 
--/* Only for WM_PIPE. */
--static uint32_t hsw_compute_pri_wm_pipe(struct hsw_pipe_wm_parameters *params,
--					uint32_t mem_value)
-+/* For both WM_PIPE and WM_LP. */
-+static uint32_t hsw_compute_pri_wm(struct hsw_pipe_wm_parameters *params,
-+				   uint32_t mem_value,
-+				   bool is_lp)
- {
-+	uint32_t method1, method2;
-+
- 	/* TODO: for now, assume the primary plane is always enabled. */
- 	if (!params->active)
- 		return 0;
- 
--	return hsw_wm_method1(params->pixel_rate,
--			      params->pri_bytes_per_pixel,
--			      mem_value);
-+	method1 = hsw_wm_method1(params->pixel_rate,
-+				 params->pri_bytes_per_pixel,
-+				 mem_value);
-+
-+	if (!is_lp)
-+		return method1;
-+
-+	method2 = hsw_wm_method2(params->pixel_rate,
-+				 params->pipe_htotal,
-+				 params->pri_horiz_pixels,
-+				 params->pri_bytes_per_pixel,
-+				 mem_value);
-+
-+	return min(method1, method2);
- }
- 
- /* For both WM_PIPE and WM_LP. */
-@@ -2201,13 +2238,60 @@ static uint32_t hsw_compute_cur_wm(struc
- 			      mem_value);
- }
- 
-+/* Only for WM_LP. */
-+static uint32_t hsw_compute_fbc_wm(struct hsw_pipe_wm_parameters *params,
-+				   uint32_t pri_val,
-+				   uint32_t mem_value)
-+{
-+	if (!params->active)
-+		return 0;
-+
-+	return hsw_wm_fbc(pri_val,
-+			  params->pri_horiz_pixels,
-+			  params->pri_bytes_per_pixel);
-+}
-+
-+static bool hsw_compute_lp_wm(uint32_t mem_value, struct hsw_wm_maximums *max,
-+			      struct hsw_pipe_wm_parameters *params,
-+			      struct hsw_lp_wm_result *result)
-+{
-+	enum pipe pipe;
-+	uint32_t pri_val[3], spr_val[3], cur_val[3], fbc_val[3];
-+
-+	for (pipe = PIPE_A; pipe <= PIPE_C; pipe++) {
-+		struct hsw_pipe_wm_parameters *p = &params[pipe];
-+
-+		pri_val[pipe] = hsw_compute_pri_wm(p, mem_value, true);
-+		spr_val[pipe] = hsw_compute_spr_wm(p, mem_value);
-+		cur_val[pipe] = hsw_compute_cur_wm(p, mem_value);
-+		fbc_val[pipe] = hsw_compute_fbc_wm(p, pri_val[pipe], mem_value);
-+	}
-+
-+	result->pri_val = max3(pri_val[0], pri_val[1], pri_val[2]);
-+	result->spr_val = max3(spr_val[0], spr_val[1], spr_val[2]);
-+	result->cur_val = max3(cur_val[0], cur_val[1], cur_val[2]);
-+	result->fbc_val = max3(fbc_val[0], fbc_val[1], fbc_val[2]);
-+
-+	if (result->fbc_val > max->fbc) {
-+		result->fbc_enable = false;
-+		result->fbc_val = 0;
-+	} else {
-+		result->fbc_enable = true;
-+	}
-+
-+	result->enable = result->pri_val <= max->pri &&
-+			 result->spr_val <= max->spr &&
-+			 result->cur_val <= max->cur;
-+	return result->enable;
-+}
-+
- static uint32_t hsw_compute_wm_pipe(struct drm_i915_private *dev_priv,
- 				    uint32_t mem_value, enum pipe pipe,
- 				    struct hsw_pipe_wm_parameters *params)
- {
- 	uint32_t pri_val, cur_val, spr_val;
- 
--	pri_val = hsw_compute_pri_wm_pipe(params, mem_value);
-+	pri_val = hsw_compute_pri_wm(params, mem_value, false);
- 	spr_val = hsw_compute_spr_wm(params, mem_value);
- 	cur_val = hsw_compute_cur_wm(params, mem_value);
- 
-@@ -2250,13 +2334,15 @@ hsw_compute_linetime_wm(struct drm_devic
- 
- static void hsw_compute_wm_parameters(struct drm_device *dev,
- 				      struct hsw_pipe_wm_parameters *params,
--				      uint32_t *wm)
-+				      uint32_t *wm,
-+				      struct hsw_wm_maximums *lp_max_1_2)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct drm_crtc *crtc;
- 	struct drm_plane *plane;
- 	uint64_t sskpd = I915_READ64(MCH_SSKPD);
- 	enum pipe pipe;
-+	int pipes_active = 0, sprites_enabled = 0;
- 
- 	if ((sskpd >> 56) & 0xFF)
- 		wm[0] = (sskpd >> 56) & 0xFF;
-@@ -2278,6 +2364,8 @@ static void hsw_compute_wm_parameters(st
- 		if (!p->active)
- 			continue;
- 
-+		pipes_active++;
-+
- 		p->pipe_htotal = intel_crtc->config.adjusted_mode.htotal;
- 		p->pixel_rate = hsw_wm_get_pixel_rate(dev, crtc);
- 		p->pri_bytes_per_pixel = crtc->fb->bits_per_pixel / 8;
-@@ -2297,25 +2385,66 @@ static void hsw_compute_wm_parameters(st
- 		p->sprite_enabled = intel_plane->wm.enable;
- 		p->spr_bytes_per_pixel = intel_plane->wm.bytes_per_pixel;
- 		p->spr_horiz_pixels = intel_plane->wm.horiz_pixels;
-+
-+		if (p->sprite_enabled)
-+			sprites_enabled++;
- 	}
-+
-+	if (pipes_active > 1) {
-+		lp_max_1_2->pri = sprites_enabled ? 128 : 256;
-+		lp_max_1_2->spr = 128;
-+		lp_max_1_2->cur = 64;
-+	} else {
-+		lp_max_1_2->pri = sprites_enabled ? 384 : 768;
-+		lp_max_1_2->spr = 384;
-+		lp_max_1_2->cur = 255;
-+	}
-+	lp_max_1_2->fbc = 15;
- }
- 
- static void hsw_compute_wm_results(struct drm_device *dev,
- 				   struct hsw_pipe_wm_parameters *params,
- 				   uint32_t *wm,
-+				   struct hsw_wm_maximums *lp_maximums,
- 				   struct hsw_wm_values *results)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct drm_crtc *crtc;
-+	struct hsw_lp_wm_result lp_results[4] = {};
- 	enum pipe pipe;
-+	int level, max_level, wm_lp;
-+
-+	for (level = 1; level <= 4; level++)
-+		if (!hsw_compute_lp_wm(wm[level], lp_maximums, params,
-+				       &lp_results[level - 1]))
-+			break;
-+	max_level = level - 1;
-+
-+	/* The spec says it is preferred to disable FBC WMs instead of disabling
-+	 * a WM level. */
-+	results->enable_fbc_wm = true;
-+	for (level = 1; level <= max_level; level++) {
-+		if (!lp_results[level - 1].fbc_enable) {
-+			results->enable_fbc_wm = false;
-+			break;
-+		}
-+	}
- 
--	/* No support for LP WMs yet. */
--	results->wm_lp[2] = 0;
--	results->wm_lp[1] = 0;
--	results->wm_lp[0] = 0;
--	results->wm_lp_spr[2] = 0;
--	results->wm_lp_spr[1] = 0;
--	results->wm_lp_spr[0] = 0;
-+	memset(results, 0, sizeof(*results));
-+	for (wm_lp = 1; wm_lp <= 3; wm_lp++) {
-+		const struct hsw_lp_wm_result *r;
-+
-+		level = (max_level == 4 && wm_lp > 1) ? wm_lp + 1 : wm_lp;
-+		if (level > max_level)
-+			break;
-+
-+		r = &lp_results[level - 1];
-+		results->wm_lp[wm_lp - 1] = HSW_WM_LP_VAL(level * 2,
-+							  r->fbc_val,
-+							  r->pri_val,
-+							  r->cur_val);
-+		results->wm_lp_spr[wm_lp - 1] = r->spr_val;
-+	}
- 
- 	for_each_pipe(pipe)
- 		results->wm_pipe[pipe] = hsw_compute_wm_pipe(dev_priv, wm[0],
-@@ -2339,6 +2468,7 @@ static void hsw_write_wm_values(struct d
- 	struct hsw_wm_values previous;
- 	uint32_t val;
- 	enum hsw_data_buf_partitioning prev_partitioning;
-+	bool prev_enable_fbc_wm;
- 
- 	previous.wm_pipe[0] = I915_READ(WM0_PIPEA_ILK);
- 	previous.wm_pipe[1] = I915_READ(WM0_PIPEB_ILK);
-@@ -2356,6 +2486,8 @@ static void hsw_write_wm_values(struct d
- 	prev_partitioning = (I915_READ(WM_MISC) & WM_MISC_DATA_PARTITION_5_6) ?
- 			    HSW_DATA_BUF_PART_5_6 : HSW_DATA_BUF_PART_1_2;
- 
-+	prev_enable_fbc_wm = !(I915_READ(DISP_ARB_CTL) & DISP_FBC_WM_DIS);
-+
- 	if (memcmp(results->wm_pipe, previous.wm_pipe,
- 		   sizeof(results->wm_pipe)) == 0 &&
- 	    memcmp(results->wm_lp, previous.wm_lp,
-@@ -2364,7 +2496,8 @@ static void hsw_write_wm_values(struct d
- 		   sizeof(results->wm_lp_spr)) == 0 &&
- 	    memcmp(results->wm_linetime, previous.wm_linetime,
- 		   sizeof(results->wm_linetime)) == 0 &&
--	    partitioning == prev_partitioning)
-+	    partitioning == prev_partitioning &&
-+	    results->enable_fbc_wm == prev_enable_fbc_wm)
- 		return;
- 
- 	if (previous.wm_lp[2] != 0)
-@@ -2397,6 +2530,15 @@ static void hsw_write_wm_values(struct d
- 		I915_WRITE(WM_MISC, val);
- 	}
- 
-+	if (prev_enable_fbc_wm != results->enable_fbc_wm) {
-+		val = I915_READ(DISP_ARB_CTL);
-+		if (results->enable_fbc_wm)
-+			val &= ~DISP_FBC_WM_DIS;
-+		else
-+			val |= DISP_FBC_WM_DIS;
-+		I915_WRITE(DISP_ARB_CTL, val);
-+	}
-+
- 	if (previous.wm_lp_spr[0] != results->wm_lp_spr[0])
- 		I915_WRITE(WM1S_LP_ILK, results->wm_lp_spr[0]);
- 	if (previous.wm_lp_spr[1] != results->wm_lp_spr[1])
-@@ -2415,12 +2557,13 @@ static void hsw_write_wm_values(struct d
- static void haswell_update_wm(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct hsw_wm_maximums lp_max_1_2;
- 	struct hsw_pipe_wm_parameters params[3];
- 	struct hsw_wm_values results;
- 	uint32_t wm[5];
- 
--	hsw_compute_wm_parameters(dev, params, wm);
--	hsw_compute_wm_results(dev, params, wm, &results);
-+	hsw_compute_wm_parameters(dev, params, wm, &lp_max_1_2);
-+	hsw_compute_wm_results(dev, params, wm, &lp_max_1_2, &results);
- 	hsw_write_wm_values(dev_priv, &results, HSW_DATA_BUF_PART_1_2);
- }
- 
diff --git a/patches.baytrail/0222-drm-i915-add-support-for-5-6-data-buffer-partitionin.patch b/patches.baytrail/0222-drm-i915-add-support-for-5-6-data-buffer-partitionin.patch
deleted file mode 100644
index e254eeaafb0aa..0000000000000
--- a/patches.baytrail/0222-drm-i915-add-support-for-5-6-data-buffer-partitionin.patch
+++ /dev/null
@@ -1,133 +0,0 @@
-From 101aa5ff33bb6e6195eadd076bbb54c545b4163a Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Fri, 31 May 2013 10:19:21 -0300
-Subject: drm/i915: add support for 5/6 data buffer partitioning on Haswell
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Now we compute the results for both 1/2 and 5/6 partitioning and then
-use hsw_find_best_result to choose which one to use.
-
-With this patch, Haswell watermarks support should be in good shape.
-The only improvement we're missing is the case where the primary plane
-is disabled: we always assume it's enabled, so we take it into
-consideration when calculating the watermarks.
-
-v2: - Check the latency when finding the best result
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 861f3389c6627460bcd19d1442eb650001f15c9b)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 64 ++++++++++++++++++++++++++++++++++-------
- 1 file changed, 53 insertions(+), 11 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index bc476bc15916..80294f285467 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2335,7 +2335,8 @@ hsw_compute_linetime_wm(struct drm_device *dev, struct drm_crtc *crtc)
- static void hsw_compute_wm_parameters(struct drm_device *dev,
- 				      struct hsw_pipe_wm_parameters *params,
- 				      uint32_t *wm,
--				      struct hsw_wm_maximums *lp_max_1_2)
-+				      struct hsw_wm_maximums *lp_max_1_2,
-+				      struct hsw_wm_maximums *lp_max_5_6)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct drm_crtc *crtc;
-@@ -2391,15 +2392,17 @@ static void hsw_compute_wm_parameters(struct drm_device *dev,
- 	}
- 
- 	if (pipes_active > 1) {
--		lp_max_1_2->pri = sprites_enabled ? 128 : 256;
--		lp_max_1_2->spr = 128;
--		lp_max_1_2->cur = 64;
-+		lp_max_1_2->pri = lp_max_5_6->pri = sprites_enabled ? 128 : 256;
-+		lp_max_1_2->spr = lp_max_5_6->spr = 128;
-+		lp_max_1_2->cur = lp_max_5_6->cur = 64;
- 	} else {
- 		lp_max_1_2->pri = sprites_enabled ? 384 : 768;
-+		lp_max_5_6->pri = sprites_enabled ? 128 : 768;
- 		lp_max_1_2->spr = 384;
--		lp_max_1_2->cur = 255;
-+		lp_max_5_6->spr = 640;
-+		lp_max_1_2->cur = lp_max_5_6->cur = 255;
- 	}
--	lp_max_1_2->fbc = 15;
-+	lp_max_1_2->fbc = lp_max_5_6->fbc = 15;
- }
- 
- static void hsw_compute_wm_results(struct drm_device *dev,
-@@ -2457,6 +2460,32 @@ static void hsw_compute_wm_results(struct drm_device *dev,
- 	}
- }
- 
-+/* Find the result with the highest level enabled. Check for enable_fbc_wm in
-+ * case both are at the same level. Prefer r1 in case they're the same. */
-+struct hsw_wm_values *hsw_find_best_result(struct hsw_wm_values *r1,
-+					   struct hsw_wm_values *r2)
-+{
-+	int i, val_r1 = 0, val_r2 = 0;
-+
-+	for (i = 0; i < 3; i++) {
-+		if (r1->wm_lp[i] & WM3_LP_EN)
-+			val_r1 = r1->wm_lp[i] & WM1_LP_LATENCY_MASK;
-+		if (r2->wm_lp[i] & WM3_LP_EN)
-+			val_r2 = r2->wm_lp[i] & WM1_LP_LATENCY_MASK;
-+	}
-+
-+	if (val_r1 == val_r2) {
-+		if (r2->enable_fbc_wm && !r1->enable_fbc_wm)
-+			return r2;
-+		else
-+			return r1;
-+	} else if (val_r1 > val_r2) {
-+		return r1;
-+	} else {
-+		return r2;
-+	}
-+}
-+
- /*
-  * The spec says we shouldn't write when we don't need, because every write
-  * causes WMs to be re-evaluated, expending some power.
-@@ -2557,14 +2586,27 @@ static void hsw_write_wm_values(struct drm_i915_private *dev_priv,
- static void haswell_update_wm(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
--	struct hsw_wm_maximums lp_max_1_2;
-+	struct hsw_wm_maximums lp_max_1_2, lp_max_5_6;
- 	struct hsw_pipe_wm_parameters params[3];
--	struct hsw_wm_values results;
-+	struct hsw_wm_values results_1_2, results_5_6, *best_results;
- 	uint32_t wm[5];
-+	enum hsw_data_buf_partitioning partitioning;
-+
-+	hsw_compute_wm_parameters(dev, params, wm, &lp_max_1_2, &lp_max_5_6);
-+
-+	hsw_compute_wm_results(dev, params, wm, &lp_max_1_2, &results_1_2);
-+	if (lp_max_1_2.pri != lp_max_5_6.pri) {
-+		hsw_compute_wm_results(dev, params, wm, &lp_max_5_6,
-+				       &results_5_6);
-+		best_results = hsw_find_best_result(&results_1_2, &results_5_6);
-+	} else {
-+		best_results = &results_1_2;
-+	}
-+
-+	partitioning = (best_results == &results_1_2) ?
-+		       HSW_DATA_BUF_PART_1_2 : HSW_DATA_BUF_PART_5_6;
- 
--	hsw_compute_wm_parameters(dev, params, wm, &lp_max_1_2);
--	hsw_compute_wm_results(dev, params, wm, &lp_max_1_2, &results);
--	hsw_write_wm_values(dev_priv, &results, HSW_DATA_BUF_PART_1_2);
-+	hsw_write_wm_values(dev_priv, best_results, partitioning);
- }
- 
- static void haswell_update_sprite_wm(struct drm_device *dev, int pipe,
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0223-drm-i915-Create-a-more-generic-pm-handler-for-hsw.patch b/patches.baytrail/0223-drm-i915-Create-a-more-generic-pm-handler-for-hsw.patch
deleted file mode 100644
index b50d6b3a22f63..0000000000000
--- a/patches.baytrail/0223-drm-i915-Create-a-more-generic-pm-handler-for-hsw.patch
+++ /dev/null
@@ -1,80 +0,0 @@
-From b933565650c82ce49fbc4eb152834d9f6bad4001 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Tue, 28 May 2013 19:22:24 -0700
-Subject: drm/i915: Create a more generic pm handler for hsw+
-
-HSW has some special requirements for the VEBOX. Splitting out the
-interrupt handler will make the code a bit nicer and less error prone
-when we begin to handle those.
-
-The slight functional change in this patch (queueing work while holding
-the spinlock) is intentional as it makes a subsequent patch a bit nicer.
-The change should also only effect HSW platforms.
-
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit baf02a1fb0485b0cca8666241577b4ef87914d87)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 30 +++++++++++++++++++++++++++++-
- 1 file changed, 29 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index 77baf991499b..85149d27f9e1 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -833,6 +833,7 @@ static void snb_gt_irq_handler(struct drm_device *dev,
- 		ivybridge_handle_parity_error(dev);
- }
- 
-+/* Legacy way of handling PM interrupts */
- static void gen6_queue_rps_work(struct drm_i915_private *dev_priv,
- 				u32 pm_iir)
- {
-@@ -912,6 +913,31 @@ static void dp_aux_irq_handler(struct drm_device *dev)
- 	wake_up_all(&dev_priv->gmbus_wait_queue);
- }
- 
-+/* Unlike gen6_queue_rps_work() from which this function is originally derived,
-+ * we must be able to deal with other PM interrupts. This is complicated because
-+ * of the way in which we use the masks to defer the RPS work (which for
-+ * posterity is necessary because of forcewake).
-+ */
-+static void hsw_pm_irq_handler(struct drm_i915_private *dev_priv,
-+			       u32 pm_iir)
-+{
-+	unsigned long flags;
-+
-+	spin_lock_irqsave(&dev_priv->rps.lock, flags);
-+	dev_priv->rps.pm_iir |= pm_iir & GEN6_PM_DEFERRED_EVENTS;
-+	if (dev_priv->rps.pm_iir) {
-+		I915_WRITE(GEN6_PMIMR, dev_priv->rps.pm_iir);
-+		/* never want to mask useful interrupts. (also posting read) */
-+		WARN_ON(I915_READ_NOTRACE(GEN6_PMIMR) & ~GEN6_PM_DEFERRED_EVENTS);
-+		/* TODO: if queue_work is slow, move it out of the spinlock */
-+		queue_work(dev_priv->wq, &dev_priv->rps.work);
-+	}
-+	spin_unlock_irqrestore(&dev_priv->rps.lock, flags);
-+
-+	if (pm_iir & ~GEN6_PM_DEFERRED_EVENTS)
-+		DRM_ERROR("Unexpected PM interrupted\n");
-+}
-+
- static irqreturn_t valleyview_irq_handler(int irq, void *arg)
- {
- 	struct drm_device *dev = (struct drm_device *) arg;
-@@ -1222,7 +1248,9 @@ static irqreturn_t ivybridge_irq_handler(int irq, void *arg)
- 
- 	pm_iir = I915_READ(GEN6_PMIIR);
- 	if (pm_iir) {
--		if (pm_iir & GEN6_PM_DEFERRED_EVENTS)
-+		if (IS_HASWELL(dev))
-+			hsw_pm_irq_handler(dev_priv, pm_iir);
-+		else if (pm_iir & GEN6_PM_DEFERRED_EVENTS)
- 			gen6_queue_rps_work(dev_priv, pm_iir);
- 		I915_WRITE(GEN6_PMIIR, pm_iir);
- 		ret = IRQ_HANDLED;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0224-drm-i915-Create-an-ivybridge_irq_preinstall.patch b/patches.baytrail/0224-drm-i915-Create-an-ivybridge_irq_preinstall.patch
deleted file mode 100644
index 68b9f5f614ee6..0000000000000
--- a/patches.baytrail/0224-drm-i915-Create-an-ivybridge_irq_preinstall.patch
+++ /dev/null
@@ -1,78 +0,0 @@
-From 2b144769b8d88652ed455bd426084f2e4f667452 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Tue, 28 May 2013 19:22:25 -0700
-Subject: drm/i915: Create an ivybridge_irq_preinstall
-
-Just duplicates ironlake_irq_preinstall for now.
-
-v2: Add new PCH_NOP check (Damien)
-Add SDEIMR comment (Damien)
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-[danvet: Update now outdated comment.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 7d99163da69e04ccae0b52093f716167ed71d66d)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 35 +++++++++++++++++++++++++++++++++--
- 1 file changed, 33 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index 85149d27f9e1..f490d54f4726 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -2528,6 +2528,37 @@ static void ironlake_irq_preinstall(struct drm_device *dev)
- 	I915_WRITE(GTIER, 0x0);
- 	POSTING_READ(GTIER);
- 
-+	/* south display irq */
-+	I915_WRITE(SDEIMR, 0xffffffff);
-+	/*
-+	 * SDEIER is also touched by the interrupt handler to work around missed
-+	 * PCH interrupts. Hence we can't update it after the interrupt handler
-+	 * is enabled - instead we unconditionally enable all PCH interrupt
-+	 * sources here, but then only unmask them as needed with SDEIMR.
-+	 */
-+	I915_WRITE(SDEIER, 0xffffffff);
-+	POSTING_READ(SDEIER);
-+}
-+
-+static void ivybridge_irq_preinstall(struct drm_device *dev)
-+{
-+	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
-+
-+	atomic_set(&dev_priv->irq_received, 0);
-+
-+	I915_WRITE(HWSTAM, 0xeffe);
-+
-+	/* XXX hotplug from PCH */
-+
-+	I915_WRITE(DEIMR, 0xffffffff);
-+	I915_WRITE(DEIER, 0x0);
-+	POSTING_READ(DEIER);
-+
-+	/* and GT */
-+	I915_WRITE(GTIMR, 0xffffffff);
-+	I915_WRITE(GTIER, 0x0);
-+	POSTING_READ(GTIER);
-+
- 	if (HAS_PCH_NOP(dev))
- 		return;
- 
-@@ -3531,9 +3562,9 @@ void intel_irq_init(struct drm_device *dev)
- 		dev->driver->disable_vblank = valleyview_disable_vblank;
- 		dev_priv->display.hpd_irq_setup = i915_hpd_irq_setup;
- 	} else if (IS_IVYBRIDGE(dev) || IS_HASWELL(dev)) {
--		/* Share pre & uninstall handlers with ILK/SNB */
-+		/* Share uninstall handlers with ILK/SNB */
- 		dev->driver->irq_handler = ivybridge_irq_handler;
--		dev->driver->irq_preinstall = ironlake_irq_preinstall;
-+		dev->driver->irq_preinstall = ivybridge_irq_preinstall;
- 		dev->driver->irq_postinstall = ivybridge_irq_postinstall;
- 		dev->driver->irq_uninstall = ironlake_irq_uninstall;
- 		dev->driver->enable_vblank = ivybridge_enable_vblank;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0225-drm-i915-Add-PM-regs-to-pre-post-install.patch b/patches.baytrail/0225-drm-i915-Add-PM-regs-to-pre-post-install.patch
deleted file mode 100644
index e09fd89852d8c..0000000000000
--- a/patches.baytrail/0225-drm-i915-Add-PM-regs-to-pre-post-install.patch
+++ /dev/null
@@ -1,80 +0,0 @@
-From 52b9a7ae4e27b821aaf99d0fd54a3e9a603a42d4 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Tue, 28 May 2013 19:22:26 -0700
-Subject: drm/i915: Add PM regs to pre/post install
-
-At the moment, these values are wiped out anyway by the rps
-enable/disable. That will be changed in the next patch though.
-
-v2: Add post install setup to address issue found by Damien in the next
-patch.
-replaced
-WARN_ON(dev_priv->rps.pm_iir != 0);
-with rps.pm_iir = 0;
-
-With the v2 of this patch and the deferred pm enabling (which changed
-since the original patches) we're now able to get PM interrupts before
-we've brought up enabled rps. At this point in boot, we don't want to do
-anything about it, so we simply ignore it. Since writing the original
-assertion, the code has changed quite a bit, and I believe removing this
-assertion is perfectly safe.
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-[danvet: I don't agree with the justification to drop the WARN and
-added a FIXME to that effect.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit eda63ffb906c2fb3b609a0e87aeb63c0f25b9e6b)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 10 ++++++++++
- drivers/gpu/drm/i915/intel_pm.c |  4 +++-
- 2 files changed, 13 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index f490d54f4726..c150f90b5770 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -2559,6 +2559,11 @@ static void ivybridge_irq_preinstall(struct drm_device *dev)
- 	I915_WRITE(GTIER, 0x0);
- 	POSTING_READ(GTIER);
- 
-+	/* Power management */
-+	I915_WRITE(GEN6_PMIMR, 0xffffffff);
-+	I915_WRITE(GEN6_PMIER, 0x0);
-+	POSTING_READ(GEN6_PMIER);
-+
- 	if (HAS_PCH_NOP(dev))
- 		return;
- 
-@@ -2747,6 +2752,11 @@ static int ivybridge_irq_postinstall(struct drm_device *dev)
- 	I915_WRITE(GTIER, render_irqs);
- 	POSTING_READ(GTIER);
- 
-+	/* Power management */
-+	I915_WRITE(GEN6_PMIMR, ~GEN6_PM_DEFERRED_EVENTS);
-+	I915_WRITE(GEN6_PMIER, GEN6_PM_DEFERRED_EVENTS);
-+	POSTING_READ(GEN6_PMIMR);
-+
- 	ibx_irq_postinstall(dev);
- 
- 	return 0;
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 80294f285467..5890c610db3c 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -3309,7 +3309,9 @@ static void gen6_enable_rps(struct drm_device *dev)
- 	/* requires MSI enabled */
- 	I915_WRITE(GEN6_PMIER, GEN6_PM_DEFERRED_EVENTS);
- 	spin_lock_irq(&dev_priv->rps.lock);
--	WARN_ON(dev_priv->rps.pm_iir != 0);
-+	/* FIXME: Our interrupt enabling sequence is bonghits.
-+	 * dev_priv->rps.pm_iir really should be 0 here. */
-+	dev_priv->rps.pm_iir = 0;
- 	I915_WRITE(GEN6_PMIMR, 0);
- 	spin_unlock_irq(&dev_priv->rps.lock);
- 	/* enable all PM interrupts */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0226-drm-i915-make-PM-interrupt-writes-non-destructive.patch b/patches.baytrail/0226-drm-i915-make-PM-interrupt-writes-non-destructive.patch
deleted file mode 100644
index 6ed25279fb87c..0000000000000
--- a/patches.baytrail/0226-drm-i915-make-PM-interrupt-writes-non-destructive.patch
+++ /dev/null
@@ -1,187 +0,0 @@
-From ea23acc752f131163b7b23c06453f478e5991981 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Tue, 28 May 2013 19:22:27 -0700
-Subject: drm/i915: make PM interrupt writes non-destructive
-
-PM interrupts have an expanded role on HSW. It helps route the EBOX
-interrupts. This patch is necessary to make the existing code which
-touches the mask, and enable registers more friendly to other code paths
-that also will need these registers.
-
-To be more explicit:
-At preinstall all interrupts are masked and disabled. This implies that
-preinstall should always happen before any enabling/disabling of RPS or
-other interrupts.
-
-The PMIMR is touched by the workqueue, so enable/disable touch IER and
-IIR. Similarly, the code currently expects IMR has no use outside of the
-RPS related interrupts so they unconditionally set 0, or ~0. We could
-use IER in the workqueue, and IMR elsewhere, but since the workqueue
-use-case is more transient the existing usage makes sense.
-
-Disable RPS events:
-IER := IER & ~GEN6_PM_RPS_EVENTS // Disable RPS related interrupts
-IIR := GEN6_PM_RPS_EVENTS // Disable any outstanding interrupts
-
-Enable RPS events:
-IER := IER | GEN6_PM_RPS_EVENTS // Enable the RPS related interrupts
-IIR := GEN6_PM_RPS_EVENTS // Make sure there were no leftover events
-(really shouldn't happen)
-
-v2: Shouldn't destroy PMIIR or PMIMR VEBOX interrupt state in
-enable/disable rps functions (Haihao)
-
-v3: Bug found by Chris where we were clearing the wrong bits at rps
-disable.
-    expanded commit message
-
-v4: v3 was based off the wrong branch
-
-v5: Added the setting of PMIMR because of previous patch update
-
-CC: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 4848405cced3b46f4ec7d404b8ed5873171ae10a)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c |   21 +++++++++++----------
- drivers/gpu/drm/i915/i915_reg.h |    2 +-
- drivers/gpu/drm/i915/intel_pm.c |   13 +++++++------
- 3 files changed, 19 insertions(+), 17 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -691,10 +691,11 @@ static void gen6_pm_rps_work(struct work
- 	pm_iir = dev_priv->rps.pm_iir;
- 	dev_priv->rps.pm_iir = 0;
- 	pm_imr = I915_READ(GEN6_PMIMR);
--	I915_WRITE(GEN6_PMIMR, 0);
-+	/* Make sure not to corrupt PMIMR state used by ringbuffer code */
-+	I915_WRITE(GEN6_PMIMR, pm_imr & ~GEN6_PM_RPS_EVENTS);
- 	spin_unlock_irq(&dev_priv->rps.lock);
- 
--	if ((pm_iir & GEN6_PM_DEFERRED_EVENTS) == 0)
-+	if ((pm_iir & GEN6_PM_RPS_EVENTS) == 0)
- 		return;
- 
- 	mutex_lock(&dev_priv->rps.hw_lock);
-@@ -924,17 +925,17 @@ static void hsw_pm_irq_handler(struct dr
- 	unsigned long flags;
- 
- 	spin_lock_irqsave(&dev_priv->rps.lock, flags);
--	dev_priv->rps.pm_iir |= pm_iir & GEN6_PM_DEFERRED_EVENTS;
-+	dev_priv->rps.pm_iir |= pm_iir & GEN6_PM_RPS_EVENTS;
- 	if (dev_priv->rps.pm_iir) {
- 		I915_WRITE(GEN6_PMIMR, dev_priv->rps.pm_iir);
- 		/* never want to mask useful interrupts. (also posting read) */
--		WARN_ON(I915_READ_NOTRACE(GEN6_PMIMR) & ~GEN6_PM_DEFERRED_EVENTS);
-+		WARN_ON(I915_READ_NOTRACE(GEN6_PMIMR) & ~GEN6_PM_RPS_EVENTS);
- 		/* TODO: if queue_work is slow, move it out of the spinlock */
- 		queue_work(dev_priv->wq, &dev_priv->rps.work);
- 	}
- 	spin_unlock_irqrestore(&dev_priv->rps.lock, flags);
- 
--	if (pm_iir & ~GEN6_PM_DEFERRED_EVENTS)
-+	if (pm_iir & ~GEN6_PM_RPS_EVENTS)
- 		DRM_ERROR("Unexpected PM interrupted\n");
- }
- 
-@@ -1009,7 +1010,7 @@ static irqreturn_t valleyview_irq_handle
- 		if (pipe_stats[0] & PIPE_GMBUS_INTERRUPT_STATUS)
- 			gmbus_irq_handler(dev);
- 
--		if (pm_iir & GEN6_PM_DEFERRED_EVENTS)
-+		if (pm_iir & GEN6_PM_RPS_EVENTS)
- 			gen6_queue_rps_work(dev_priv, pm_iir);
- 
- 		I915_WRITE(GTIIR, gt_iir);
-@@ -1250,7 +1251,7 @@ static irqreturn_t ivybridge_irq_handler
- 	if (pm_iir) {
- 		if (IS_HASWELL(dev))
- 			hsw_pm_irq_handler(dev_priv, pm_iir);
--		else if (pm_iir & GEN6_PM_DEFERRED_EVENTS)
-+		else if (pm_iir & GEN6_PM_RPS_EVENTS)
- 			gen6_queue_rps_work(dev_priv, pm_iir);
- 		I915_WRITE(GEN6_PMIIR, pm_iir);
- 		ret = IRQ_HANDLED;
-@@ -1365,7 +1366,7 @@ static irqreturn_t ironlake_irq_handler(
- 	if (IS_GEN5(dev) &&  de_iir & DE_PCU_EVENT)
- 		ironlake_handle_rps_change(dev);
- 
--	if (IS_GEN6(dev) && pm_iir & GEN6_PM_DEFERRED_EVENTS)
-+	if (IS_GEN6(dev) && pm_iir & GEN6_PM_RPS_EVENTS)
- 		gen6_queue_rps_work(dev_priv, pm_iir);
- 
- 	I915_WRITE(GTIIR, gt_iir);
-@@ -2753,8 +2754,8 @@ static int ivybridge_irq_postinstall(str
- 	POSTING_READ(GTIER);
- 
- 	/* Power management */
--	I915_WRITE(GEN6_PMIMR, ~GEN6_PM_DEFERRED_EVENTS);
--	I915_WRITE(GEN6_PMIER, GEN6_PM_DEFERRED_EVENTS);
-+	I915_WRITE(GEN6_PMIMR, ~GEN6_PM_RPS_EVENTS);
-+	I915_WRITE(GEN6_PMIER, GEN6_PM_RPS_EVENTS);
- 	POSTING_READ(GEN6_PMIMR);
- 
- 	ibx_irq_postinstall(dev);
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -4576,7 +4576,7 @@
- #define  GEN6_PM_RP_DOWN_THRESHOLD		(1<<4)
- #define  GEN6_PM_RP_UP_EI_EXPIRED		(1<<2)
- #define  GEN6_PM_RP_DOWN_EI_EXPIRED		(1<<1)
--#define  GEN6_PM_DEFERRED_EVENTS		(GEN6_PM_RP_UP_THRESHOLD | \
-+#define  GEN6_PM_RPS_EVENTS			(GEN6_PM_RP_UP_THRESHOLD | \
- 						 GEN6_PM_RP_DOWN_THRESHOLD | \
- 						 GEN6_PM_RP_DOWN_TIMEOUT)
- 
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -3116,7 +3116,7 @@ static void gen6_disable_rps(struct drm_
- 	I915_WRITE(GEN6_RC_CONTROL, 0);
- 	I915_WRITE(GEN6_RPNSWREQ, 1 << 31);
- 	I915_WRITE(GEN6_PMINTRMSK, 0xffffffff);
--	I915_WRITE(GEN6_PMIER, 0);
-+	I915_WRITE(GEN6_PMIER, I915_READ(GEN6_PMIER) & ~GEN6_PM_RPS_EVENTS);
- 	/* Complete PM interrupt masking here doesn't race with the rps work
- 	 * item again unmasking PM interrupts because that is using a different
- 	 * register (PMIMR) to mask PM interrupts. The only risk is in leaving
-@@ -3126,7 +3126,7 @@ static void gen6_disable_rps(struct drm_
- 	dev_priv->rps.pm_iir = 0;
- 	spin_unlock_irq(&dev_priv->rps.lock);
- 
--	I915_WRITE(GEN6_PMIIR, I915_READ(GEN6_PMIIR));
-+	I915_WRITE(GEN6_PMIIR, GEN6_PM_RPS_EVENTS);
- }
- 
- static void valleyview_disable_rps(struct drm_device *dev)
-@@ -3307,14 +3307,15 @@ static void gen6_enable_rps(struct drm_d
- 	gen6_set_rps(dev_priv->dev, (gt_perf_status & 0xff00) >> 8);
- 
- 	/* requires MSI enabled */
--	I915_WRITE(GEN6_PMIER, GEN6_PM_DEFERRED_EVENTS);
-+	I915_WRITE(GEN6_PMIER, I915_READ(GEN6_PMIER) | GEN6_PM_RPS_EVENTS);
- 	spin_lock_irq(&dev_priv->rps.lock);
- 	/* FIXME: Our interrupt enabling sequence is bonghits.
- 	 * dev_priv->rps.pm_iir really should be 0 here. */
- 	dev_priv->rps.pm_iir = 0;
--	I915_WRITE(GEN6_PMIMR, 0);
-+	I915_WRITE(GEN6_PMIMR, I915_READ(GEN6_PMIMR) & ~GEN6_PM_RPS_EVENTS);
-+	I915_WRITE(GEN6_PMIIR, GEN6_PM_RPS_EVENTS);
- 	spin_unlock_irq(&dev_priv->rps.lock);
--	/* enable all PM interrupts */
-+	/* unmask all PM interrupts */
- 	I915_WRITE(GEN6_PMINTRMSK, 0);
- 
- 	rc6vids = 0;
-@@ -3577,7 +3578,7 @@ static void valleyview_enable_rps(struct
- 	valleyview_set_rps(dev_priv->dev, rpe);
- 
- 	/* requires MSI enabled */
--	I915_WRITE(GEN6_PMIER, GEN6_PM_DEFERRED_EVENTS);
-+	I915_WRITE(GEN6_PMIER, GEN6_PM_RPS_EVENTS);
- 	spin_lock_irq(&dev_priv->rps.lock);
- 	WARN_ON(dev_priv->rps.pm_iir != 0);
- 	I915_WRITE(GEN6_PMIMR, 0);
diff --git a/patches.baytrail/0227-drm-i915-Convert-irq_refounct-to-struct.patch b/patches.baytrail/0227-drm-i915-Convert-irq_refounct-to-struct.patch
deleted file mode 100644
index 4ee723c8970c4..0000000000000
--- a/patches.baytrail/0227-drm-i915-Convert-irq_refounct-to-struct.patch
+++ /dev/null
@@ -1,111 +0,0 @@
-From 79ebbcfe0b10e4ec570759644c30e7376b7bda0b Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Tue, 28 May 2013 19:22:28 -0700
-Subject: drm/i915: Convert irq_refounct to struct
-
-It's overkill on older gens, but it's useful for newer gens.
-
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit aeb0659338793746b8a4e482fa588ba1dd9ee559)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_ringbuffer.c | 16 ++++++++--------
- drivers/gpu/drm/i915/intel_ringbuffer.h |  4 +++-
- 2 files changed, 11 insertions(+), 9 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
-index c626a943d9c2..8246213ffada 100644
---- a/drivers/gpu/drm/i915/intel_ringbuffer.c
-+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
-@@ -794,7 +794,7 @@ gen5_ring_get_irq(struct intel_ring_buffer *ring)
- 		return false;
- 
- 	spin_lock_irqsave(&dev_priv->irq_lock, flags);
--	if (ring->irq_refcount++ == 0) {
-+	if (ring->irq_refcount.gt++ == 0) {
- 		dev_priv->gt_irq_mask &= ~ring->irq_enable_mask;
- 		I915_WRITE(GTIMR, dev_priv->gt_irq_mask);
- 		POSTING_READ(GTIMR);
-@@ -812,7 +812,7 @@ gen5_ring_put_irq(struct intel_ring_buffer *ring)
- 	unsigned long flags;
- 
- 	spin_lock_irqsave(&dev_priv->irq_lock, flags);
--	if (--ring->irq_refcount == 0) {
-+	if (--ring->irq_refcount.gt == 0) {
- 		dev_priv->gt_irq_mask |= ring->irq_enable_mask;
- 		I915_WRITE(GTIMR, dev_priv->gt_irq_mask);
- 		POSTING_READ(GTIMR);
-@@ -831,7 +831,7 @@ i9xx_ring_get_irq(struct intel_ring_buffer *ring)
- 		return false;
- 
- 	spin_lock_irqsave(&dev_priv->irq_lock, flags);
--	if (ring->irq_refcount++ == 0) {
-+	if (ring->irq_refcount.gt++ == 0) {
- 		dev_priv->irq_mask &= ~ring->irq_enable_mask;
- 		I915_WRITE(IMR, dev_priv->irq_mask);
- 		POSTING_READ(IMR);
-@@ -849,7 +849,7 @@ i9xx_ring_put_irq(struct intel_ring_buffer *ring)
- 	unsigned long flags;
- 
- 	spin_lock_irqsave(&dev_priv->irq_lock, flags);
--	if (--ring->irq_refcount == 0) {
-+	if (--ring->irq_refcount.gt == 0) {
- 		dev_priv->irq_mask |= ring->irq_enable_mask;
- 		I915_WRITE(IMR, dev_priv->irq_mask);
- 		POSTING_READ(IMR);
-@@ -868,7 +868,7 @@ i8xx_ring_get_irq(struct intel_ring_buffer *ring)
- 		return false;
- 
- 	spin_lock_irqsave(&dev_priv->irq_lock, flags);
--	if (ring->irq_refcount++ == 0) {
-+	if (ring->irq_refcount.gt++ == 0) {
- 		dev_priv->irq_mask &= ~ring->irq_enable_mask;
- 		I915_WRITE16(IMR, dev_priv->irq_mask);
- 		POSTING_READ16(IMR);
-@@ -886,7 +886,7 @@ i8xx_ring_put_irq(struct intel_ring_buffer *ring)
- 	unsigned long flags;
- 
- 	spin_lock_irqsave(&dev_priv->irq_lock, flags);
--	if (--ring->irq_refcount == 0) {
-+	if (--ring->irq_refcount.gt == 0) {
- 		dev_priv->irq_mask |= ring->irq_enable_mask;
- 		I915_WRITE16(IMR, dev_priv->irq_mask);
- 		POSTING_READ16(IMR);
-@@ -991,7 +991,7 @@ gen6_ring_get_irq(struct intel_ring_buffer *ring)
- 	gen6_gt_force_wake_get(dev_priv);
- 
- 	spin_lock_irqsave(&dev_priv->irq_lock, flags);
--	if (ring->irq_refcount++ == 0) {
-+	if (ring->irq_refcount.gt++ == 0) {
- 		if (HAS_L3_GPU_CACHE(dev) && ring->id == RCS)
- 			I915_WRITE_IMR(ring, ~(ring->irq_enable_mask |
- 						GEN6_RENDER_L3_PARITY_ERROR));
-@@ -1014,7 +1014,7 @@ gen6_ring_put_irq(struct intel_ring_buffer *ring)
- 	unsigned long flags;
- 
- 	spin_lock_irqsave(&dev_priv->irq_lock, flags);
--	if (--ring->irq_refcount == 0) {
-+	if (--ring->irq_refcount.gt == 0) {
- 		if (HAS_L3_GPU_CACHE(dev) && ring->id == RCS)
- 			I915_WRITE_IMR(ring, ~GEN6_RENDER_L3_PARITY_ERROR);
- 		else
-diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
-index 1c79520c7e45..153b87f67aae 100644
---- a/drivers/gpu/drm/i915/intel_ringbuffer.h
-+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
-@@ -72,7 +72,9 @@ struct  intel_ring_buffer {
- 	 */
- 	u32		last_retired_head;
- 
--	u32		irq_refcount;		/* protected by dev_priv->irq_lock */
-+	struct {
-+		u32	gt;
-+	} irq_refcount;	/* protected by dev_priv->irq_lock */
- 	u32		irq_enable_mask;	/* bitmask to enable ring interrupt */
- 	u32		trace_irq_seqno;
- 	u32		sync_seqno[I915_NUM_RINGS-1];
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0228-drm-i915-consolidate-interrupt-naming-scheme.patch b/patches.baytrail/0228-drm-i915-consolidate-interrupt-naming-scheme.patch
deleted file mode 100644
index 44419f5de0f45..0000000000000
--- a/patches.baytrail/0228-drm-i915-consolidate-interrupt-naming-scheme.patch
+++ /dev/null
@@ -1,393 +0,0 @@
-From 3aafcac2d475ed673c184ebfaa1351c8274e9f74 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Tue, 28 May 2013 19:22:29 -0700
-Subject: drm/i915: consolidate interrupt naming scheme
-
-The motivation here is we're going to add some new interrupt definitions
-and handling outside of the GT interrupts which is all we've managed so
-far (with some RPS exceptions). By consolidating the names in the future
-we can make thing a bit cleaner as we don't need to define register
-names twice, and we can leverage pretty decent overlap in HW registers
-since ILK.
-
-To explain briefly what is in the comments: there are two sets of
-interrupt masking/enabling registers. At least so far, the definitions
-of the two sets overlap. The old code setup distinct names for
-interrupts in each set, ie. one for global, and one for ring. This made
-things confusing when using the wrong defines in the wrong places.
-
-rebase: Modified VLV bits
-
-v2: Renamed GT_RENDER_MASTER to GT_RENDER_CS_MASTER (Damien)
-
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit cc609d5da5c78c92a2e2565604b2603a0965b494)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c         |   61 +++++++++----------
- drivers/gpu/drm/i915/i915_reg.h         |  101 +++++++++++++-------------------
- drivers/gpu/drm/i915/intel_ringbuffer.c |   21 +++---
- 3 files changed, 85 insertions(+), 98 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -771,7 +771,7 @@ static void ivybridge_parity_work(struct
- 	I915_WRITE(GEN7_MISCCPCTL, misccpctl);
- 
- 	spin_lock_irqsave(&dev_priv->irq_lock, flags);
--	dev_priv->gt_irq_mask &= ~GT_GEN7_L3_PARITY_ERROR_INTERRUPT;
-+	dev_priv->gt_irq_mask &= ~GT_RENDER_L3_PARITY_ERROR_INTERRUPT;
- 	I915_WRITE(GTIMR, dev_priv->gt_irq_mask);
- 	spin_unlock_irqrestore(&dev_priv->irq_lock, flags);
- 
-@@ -803,7 +803,7 @@ static void ivybridge_handle_parity_erro
- 		return;
- 
- 	spin_lock_irqsave(&dev_priv->irq_lock, flags);
--	dev_priv->gt_irq_mask |= GT_GEN7_L3_PARITY_ERROR_INTERRUPT;
-+	dev_priv->gt_irq_mask |= GT_RENDER_L3_PARITY_ERROR_INTERRUPT;
- 	I915_WRITE(GTIMR, dev_priv->gt_irq_mask);
- 	spin_unlock_irqrestore(&dev_priv->irq_lock, flags);
- 
-@@ -815,22 +815,22 @@ static void snb_gt_irq_handler(struct dr
- 			       u32 gt_iir)
- {
- 
--	if (gt_iir & (GEN6_RENDER_USER_INTERRUPT |
--		      GEN6_RENDER_PIPE_CONTROL_NOTIFY_INTERRUPT))
-+	if (gt_iir &
-+	    (GT_RENDER_USER_INTERRUPT | GT_RENDER_PIPECTL_NOTIFY_INTERRUPT))
- 		notify_ring(dev, &dev_priv->ring[RCS]);
--	if (gt_iir & GEN6_BSD_USER_INTERRUPT)
-+	if (gt_iir & GT_BSD_USER_INTERRUPT)
- 		notify_ring(dev, &dev_priv->ring[VCS]);
--	if (gt_iir & GEN6_BLITTER_USER_INTERRUPT)
-+	if (gt_iir & GT_BLT_USER_INTERRUPT)
- 		notify_ring(dev, &dev_priv->ring[BCS]);
- 
--	if (gt_iir & (GT_GEN6_BLT_CS_ERROR_INTERRUPT |
--		      GT_GEN6_BSD_CS_ERROR_INTERRUPT |
--		      GT_RENDER_CS_ERROR_INTERRUPT)) {
-+	if (gt_iir & (GT_BLT_CS_ERROR_INTERRUPT |
-+		      GT_BSD_CS_ERROR_INTERRUPT |
-+		      GT_RENDER_CS_MASTER_ERROR_INTERRUPT)) {
- 		DRM_ERROR("GT error interrupt 0x%08x\n", gt_iir);
- 		i915_handle_error(dev, false);
- 	}
- 
--	if (gt_iir & GT_GEN7_L3_PARITY_ERROR_INTERRUPT)
-+	if (gt_iir & GT_RENDER_L3_PARITY_ERROR_INTERRUPT)
- 		ivybridge_handle_parity_error(dev);
- }
- 
-@@ -1274,9 +1274,10 @@ static void ilk_gt_irq_handler(struct dr
- 			       struct drm_i915_private *dev_priv,
- 			       u32 gt_iir)
- {
--	if (gt_iir & (GT_USER_INTERRUPT | GT_PIPE_NOTIFY))
-+	if (gt_iir &
-+	    (GT_RENDER_USER_INTERRUPT | GT_RENDER_PIPECTL_NOTIFY_INTERRUPT))
- 		notify_ring(dev, &dev_priv->ring[RCS]);
--	if (gt_iir & GT_BSD_USER_INTERRUPT)
-+	if (gt_iir & ILK_BSD_USER_INTERRUPT)
- 		notify_ring(dev, &dev_priv->ring[VCS]);
- }
- 
-@@ -2677,7 +2678,7 @@ static int ironlake_irq_postinstall(stru
- 			   DE_PLANEA_FLIP_DONE | DE_PLANEB_FLIP_DONE |
- 			   DE_AUX_CHANNEL_A | DE_PIPEB_FIFO_UNDERRUN |
- 			   DE_PIPEA_FIFO_UNDERRUN | DE_POISON;
--	u32 render_irqs;
-+	u32 gt_irqs;
- 
- 	dev_priv->irq_mask = ~display_mask;
- 
-@@ -2692,17 +2693,15 @@ static int ironlake_irq_postinstall(stru
- 	I915_WRITE(GTIIR, I915_READ(GTIIR));
- 	I915_WRITE(GTIMR, dev_priv->gt_irq_mask);
- 
-+	gt_irqs = GT_RENDER_USER_INTERRUPT;
-+
- 	if (IS_GEN6(dev))
--		render_irqs =
--			GT_USER_INTERRUPT |
--			GEN6_BSD_USER_INTERRUPT |
--			GEN6_BLITTER_USER_INTERRUPT;
-+		gt_irqs |= GT_BLT_USER_INTERRUPT | GT_BSD_USER_INTERRUPT;
- 	else
--		render_irqs =
--			GT_USER_INTERRUPT |
--			GT_PIPE_NOTIFY |
--			GT_BSD_USER_INTERRUPT;
--	I915_WRITE(GTIER, render_irqs);
-+		gt_irqs |= GT_RENDER_PIPECTL_NOTIFY_INTERRUPT |
-+			   ILK_BSD_USER_INTERRUPT;
-+
-+	I915_WRITE(GTIER, gt_irqs);
- 	POSTING_READ(GTIER);
- 
- 	ibx_irq_postinstall(dev);
-@@ -2728,7 +2727,7 @@ static int ivybridge_irq_postinstall(str
- 		DE_PLANEA_FLIP_DONE_IVB |
- 		DE_AUX_CHANNEL_A_IVB |
- 		DE_ERR_INT_IVB;
--	u32 render_irqs;
-+	u32 gt_irqs;
- 
- 	dev_priv->irq_mask = ~display_mask;
- 
-@@ -2743,14 +2742,14 @@ static int ivybridge_irq_postinstall(str
- 		   DE_PIPEA_VBLANK_IVB);
- 	POSTING_READ(DEIER);
- 
--	dev_priv->gt_irq_mask = ~GT_GEN7_L3_PARITY_ERROR_INTERRUPT;
-+	dev_priv->gt_irq_mask = ~GT_RENDER_L3_PARITY_ERROR_INTERRUPT;
- 
- 	I915_WRITE(GTIIR, I915_READ(GTIIR));
- 	I915_WRITE(GTIMR, dev_priv->gt_irq_mask);
- 
--	render_irqs = GT_USER_INTERRUPT | GEN6_BSD_USER_INTERRUPT |
--		GEN6_BLITTER_USER_INTERRUPT | GT_GEN7_L3_PARITY_ERROR_INTERRUPT;
--	I915_WRITE(GTIER, render_irqs);
-+	gt_irqs = GT_RENDER_USER_INTERRUPT | GT_BSD_USER_INTERRUPT |
-+		  GT_BLT_USER_INTERRUPT | GT_RENDER_L3_PARITY_ERROR_INTERRUPT;
-+	I915_WRITE(GTIER, gt_irqs);
- 	POSTING_READ(GTIER);
- 
- 	/* Power management */
-@@ -2766,9 +2765,9 @@ static int ivybridge_irq_postinstall(str
- static int valleyview_irq_postinstall(struct drm_device *dev)
- {
- 	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
-+	u32 gt_irqs;
- 	u32 enable_mask;
- 	u32 pipestat_enable = PLANE_FLIP_DONE_INT_EN_VLV;
--	u32 render_irqs;
- 
- 	enable_mask = I915_DISPLAY_PORT_INTERRUPT;
- 	enable_mask |= I915_DISPLAY_PIPE_A_EVENT_INTERRUPT |
-@@ -2804,9 +2803,9 @@ static int valleyview_irq_postinstall(st
- 	I915_WRITE(GTIIR, I915_READ(GTIIR));
- 	I915_WRITE(GTIMR, dev_priv->gt_irq_mask);
- 
--	render_irqs = GT_USER_INTERRUPT | GEN6_BSD_USER_INTERRUPT |
--		GEN6_BLITTER_USER_INTERRUPT;
--	I915_WRITE(GTIER, render_irqs);
-+	gt_irqs = GT_RENDER_USER_INTERRUPT | GT_BSD_USER_INTERRUPT |
-+		GT_BLT_USER_INTERRUPT;
-+	I915_WRITE(GTIER, gt_irqs);
- 	POSTING_READ(GTIER);
- 
- 	/* ack & enable invalid PTE error interrupts */
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -742,24 +742,6 @@
- #define VLV_IMR		(VLV_DISPLAY_BASE + 0x20a8)
- #define VLV_ISR		(VLV_DISPLAY_BASE + 0x20ac)
- #define VLV_PCBR	(VLV_DISPLAY_BASE + 0x2120)
--#define   I915_PIPE_CONTROL_NOTIFY_INTERRUPT		(1<<18)
--#define   I915_DISPLAY_PORT_INTERRUPT			(1<<17)
--#define   I915_RENDER_COMMAND_PARSER_ERROR_INTERRUPT	(1<<15)
--#define   I915_GMCH_THERMAL_SENSOR_EVENT_INTERRUPT	(1<<14) /* p-state */
--#define   I915_HWB_OOM_INTERRUPT			(1<<13)
--#define   I915_SYNC_STATUS_INTERRUPT			(1<<12)
--#define   I915_DISPLAY_PLANE_A_FLIP_PENDING_INTERRUPT	(1<<11)
--#define   I915_DISPLAY_PLANE_B_FLIP_PENDING_INTERRUPT	(1<<10)
--#define   I915_OVERLAY_PLANE_FLIP_PENDING_INTERRUPT	(1<<9)
--#define   I915_DISPLAY_PLANE_C_FLIP_PENDING_INTERRUPT	(1<<8)
--#define   I915_DISPLAY_PIPE_A_VBLANK_INTERRUPT		(1<<7)
--#define   I915_DISPLAY_PIPE_A_EVENT_INTERRUPT		(1<<6)
--#define   I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT		(1<<5)
--#define   I915_DISPLAY_PIPE_B_EVENT_INTERRUPT		(1<<4)
--#define   I915_DEBUG_INTERRUPT				(1<<2)
--#define   I915_USER_INTERRUPT				(1<<1)
--#define   I915_ASLE_INTERRUPT				(1<<0)
--#define   I915_BSD_USER_INTERRUPT                      (1<<25)
- #define   DISPLAY_PLANE_FLIP_PENDING(plane) (1<<(11-(plane))) /* A and B only */
- #define EIR		0x020b0
- #define EMR		0x020b4
-@@ -873,28 +855,6 @@
- #define CACHE_MODE_1		0x7004 /* IVB+ */
- #define   PIXEL_SUBSPAN_COLLECT_OPT_DISABLE (1<<6)
- 
--/* GEN6 interrupt control
-- * Note that the per-ring interrupt bits do alias with the global interrupt bits
-- * in GTIMR. */
--#define GEN6_RENDER_HWSTAM	0x2098
--#define GEN6_RENDER_IMR		0x20a8
--#define   GEN6_RENDER_CONTEXT_SWITCH_INTERRUPT		(1 << 8)
--#define   GEN6_RENDER_PPGTT_PAGE_FAULT			(1 << 7)
--#define   GEN6_RENDER_TIMEOUT_COUNTER_EXPIRED		(1 << 6)
--#define   GEN6_RENDER_L3_PARITY_ERROR			(1 << 5)
--#define   GEN6_RENDER_PIPE_CONTROL_NOTIFY_INTERRUPT	(1 << 4)
--#define   GEN6_RENDER_COMMAND_PARSER_MASTER_ERROR	(1 << 3)
--#define   GEN6_RENDER_SYNC_STATUS			(1 << 2)
--#define   GEN6_RENDER_DEBUG_INTERRUPT			(1 << 1)
--#define   GEN6_RENDER_USER_INTERRUPT			(1 << 0)
--
--#define GEN6_BLITTER_HWSTAM	0x22098
--#define GEN6_BLITTER_IMR	0x220a8
--#define   GEN6_BLITTER_MI_FLUSH_DW_NOTIFY_INTERRUPT	(1 << 26)
--#define   GEN6_BLITTER_COMMAND_PARSER_MASTER_ERROR	(1 << 25)
--#define   GEN6_BLITTER_SYNC_STATUS			(1 << 24)
--#define   GEN6_BLITTER_USER_INTERRUPT			(1 << 22)
--
- #define GEN6_BLITTER_ECOSKPD	0x221d0
- #define   GEN6_BLITTER_LOCK_SHIFT			16
- #define   GEN6_BLITTER_FBC_NOTIFY			(1<<3)
-@@ -905,9 +865,49 @@
- #define   GEN6_BSD_SLEEP_INDICATOR	(1 << 3)
- #define   GEN6_BSD_GO_INDICATOR		(1 << 4)
- 
--#define GEN6_BSD_HWSTAM			0x12098
--#define GEN6_BSD_IMR			0x120a8
--#define   GEN6_BSD_USER_INTERRUPT	(1 << 12)
-+/* On modern GEN architectures interrupt control consists of two sets
-+ * of registers. The first set pertains to the ring generating the
-+ * interrupt. The second control is for the functional block generating the
-+ * interrupt. These are PM, GT, DE, etc.
-+ *
-+ * Luckily *knocks on wood* all the ring interrupt bits match up with the
-+ * GT interrupt bits, so we don't need to duplicate the defines.
-+ *
-+ * These defines should cover us well from SNB->HSW with minor exceptions
-+ * it can also work on ILK.
-+ */
-+#define GT_BLT_FLUSHDW_NOTIFY_INTERRUPT		(1 << 26)
-+#define GT_BLT_CS_ERROR_INTERRUPT		(1 << 25)
-+#define GT_BLT_USER_INTERRUPT			(1 << 22)
-+#define GT_BSD_CS_ERROR_INTERRUPT		(1 << 15)
-+#define GT_BSD_USER_INTERRUPT			(1 << 12)
-+#define GT_RENDER_L3_PARITY_ERROR_INTERRUPT	(1 <<  5) /* !snb */
-+#define GT_RENDER_PIPECTL_NOTIFY_INTERRUPT	(1 <<  4)
-+#define GT_RENDER_CS_MASTER_ERROR_INTERRUPT	(1 <<  3)
-+#define GT_RENDER_SYNC_STATUS_INTERRUPT		(1 <<  2)
-+#define GT_RENDER_DEBUG_INTERRUPT		(1 <<  1)
-+#define GT_RENDER_USER_INTERRUPT		(1 <<  0)
-+
-+/* These are all the "old" interrupts */
-+#define ILK_BSD_USER_INTERRUPT				(1<<5)
-+#define I915_PIPE_CONTROL_NOTIFY_INTERRUPT		(1<<18)
-+#define I915_DISPLAY_PORT_INTERRUPT			(1<<17)
-+#define I915_RENDER_COMMAND_PARSER_ERROR_INTERRUPT	(1<<15)
-+#define I915_GMCH_THERMAL_SENSOR_EVENT_INTERRUPT	(1<<14) /* p-state */
-+#define I915_HWB_OOM_INTERRUPT				(1<<13)
-+#define I915_SYNC_STATUS_INTERRUPT			(1<<12)
-+#define I915_DISPLAY_PLANE_A_FLIP_PENDING_INTERRUPT	(1<<11)
-+#define I915_DISPLAY_PLANE_B_FLIP_PENDING_INTERRUPT	(1<<10)
-+#define I915_OVERLAY_PLANE_FLIP_PENDING_INTERRUPT	(1<<9)
-+#define I915_DISPLAY_PLANE_C_FLIP_PENDING_INTERRUPT	(1<<8)
-+#define I915_DISPLAY_PIPE_A_VBLANK_INTERRUPT		(1<<7)
-+#define I915_DISPLAY_PIPE_A_EVENT_INTERRUPT		(1<<6)
-+#define I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT		(1<<5)
-+#define I915_DISPLAY_PIPE_B_EVENT_INTERRUPT		(1<<4)
-+#define I915_DEBUG_INTERRUPT				(1<<2)
-+#define I915_USER_INTERRUPT				(1<<1)
-+#define I915_ASLE_INTERRUPT				(1<<0)
-+#define I915_BSD_USER_INTERRUPT				(1 << 25)
- 
- #define GEN6_BSD_RNCID			0x12198
- 
-@@ -3724,21 +3724,6 @@
- #define DEIIR   0x44008
- #define DEIER   0x4400c
- 
--/* GT interrupt.
-- * Note that for gen6+ the ring-specific interrupt bits do alias with the
-- * corresponding bits in the per-ring interrupt control registers. */
--#define GT_GEN6_BLT_FLUSHDW_NOTIFY_INTERRUPT	(1 << 26)
--#define GT_GEN6_BLT_CS_ERROR_INTERRUPT		(1 << 25)
--#define GT_GEN6_BLT_USER_INTERRUPT		(1 << 22)
--#define GT_GEN6_BSD_CS_ERROR_INTERRUPT		(1 << 15)
--#define GT_GEN6_BSD_USER_INTERRUPT		(1 << 12)
--#define GT_BSD_USER_INTERRUPT			(1 << 5) /* ilk only */
--#define GT_GEN7_L3_PARITY_ERROR_INTERRUPT	(1 << 5)
--#define GT_PIPE_NOTIFY				(1 << 4)
--#define GT_RENDER_CS_ERROR_INTERRUPT		(1 << 3)
--#define GT_SYNC_STATUS				(1 << 2)
--#define GT_USER_INTERRUPT			(1 << 0)
--
- #define GTISR   0x44010
- #define GTIMR   0x44014
- #define GTIIR   0x44018
---- a/drivers/gpu/drm/i915/intel_ringbuffer.c
-+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
-@@ -556,7 +556,7 @@ static int init_render_ring(struct intel
- 		I915_WRITE(INSTPM, _MASKED_BIT_ENABLE(INSTPM_FORCE_ORDERING));
- 
- 	if (HAS_L3_GPU_CACHE(dev))
--		I915_WRITE_IMR(ring, ~GEN6_RENDER_L3_PARITY_ERROR);
-+		I915_WRITE_IMR(ring, ~GT_RENDER_L3_PARITY_ERROR_INTERRUPT);
- 
- 	return ret;
- }
-@@ -993,8 +993,9 @@ gen6_ring_get_irq(struct intel_ring_buff
- 	spin_lock_irqsave(&dev_priv->irq_lock, flags);
- 	if (ring->irq_refcount.gt++ == 0) {
- 		if (HAS_L3_GPU_CACHE(dev) && ring->id == RCS)
--			I915_WRITE_IMR(ring, ~(ring->irq_enable_mask |
--						GEN6_RENDER_L3_PARITY_ERROR));
-+			I915_WRITE_IMR(ring,
-+				       ~(ring->irq_enable_mask |
-+					 GT_RENDER_L3_PARITY_ERROR_INTERRUPT));
- 		else
- 			I915_WRITE_IMR(ring, ~ring->irq_enable_mask);
- 		dev_priv->gt_irq_mask &= ~ring->irq_enable_mask;
-@@ -1016,7 +1017,8 @@ gen6_ring_put_irq(struct intel_ring_buff
- 	spin_lock_irqsave(&dev_priv->irq_lock, flags);
- 	if (--ring->irq_refcount.gt == 0) {
- 		if (HAS_L3_GPU_CACHE(dev) && ring->id == RCS)
--			I915_WRITE_IMR(ring, ~GEN6_RENDER_L3_PARITY_ERROR);
-+			I915_WRITE_IMR(ring,
-+				       ~GT_RENDER_L3_PARITY_ERROR_INTERRUPT);
- 		else
- 			I915_WRITE_IMR(ring, ~0);
- 		dev_priv->gt_irq_mask |= ring->irq_enable_mask;
-@@ -1697,7 +1699,7 @@ int intel_init_render_ring_buffer(struct
- 			ring->flush = gen6_render_ring_flush;
- 		ring->irq_get = gen6_ring_get_irq;
- 		ring->irq_put = gen6_ring_put_irq;
--		ring->irq_enable_mask = GT_USER_INTERRUPT;
-+		ring->irq_enable_mask = GT_RENDER_USER_INTERRUPT;
- 		ring->get_seqno = gen6_ring_get_seqno;
- 		ring->set_seqno = ring_set_seqno;
- 		ring->sync_to = gen6_ring_sync;
-@@ -1716,7 +1718,8 @@ int intel_init_render_ring_buffer(struct
- 		ring->set_seqno = pc_render_set_seqno;
- 		ring->irq_get = gen5_ring_get_irq;
- 		ring->irq_put = gen5_ring_put_irq;
--		ring->irq_enable_mask = GT_USER_INTERRUPT | GT_PIPE_NOTIFY;
-+		ring->irq_enable_mask = GT_RENDER_USER_INTERRUPT |
-+					GT_RENDER_PIPECTL_NOTIFY_INTERRUPT;
- 	} else {
- 		ring->add_request = i9xx_add_request;
- 		if (INTEL_INFO(dev)->gen < 4)
-@@ -1858,7 +1861,7 @@ int intel_init_bsd_ring_buffer(struct dr
- 		ring->add_request = gen6_add_request;
- 		ring->get_seqno = gen6_ring_get_seqno;
- 		ring->set_seqno = ring_set_seqno;
--		ring->irq_enable_mask = GEN6_BSD_USER_INTERRUPT;
-+		ring->irq_enable_mask = GT_BSD_USER_INTERRUPT;
- 		ring->irq_get = gen6_ring_get_irq;
- 		ring->irq_put = gen6_ring_put_irq;
- 		ring->dispatch_execbuffer = gen6_ring_dispatch_execbuffer;
-@@ -1878,7 +1881,7 @@ int intel_init_bsd_ring_buffer(struct dr
- 		ring->get_seqno = ring_get_seqno;
- 		ring->set_seqno = ring_set_seqno;
- 		if (IS_GEN5(dev)) {
--			ring->irq_enable_mask = GT_BSD_USER_INTERRUPT;
-+			ring->irq_enable_mask = ILK_BSD_USER_INTERRUPT;
- 			ring->irq_get = gen5_ring_get_irq;
- 			ring->irq_put = gen5_ring_put_irq;
- 		} else {
-@@ -1907,7 +1910,7 @@ int intel_init_blt_ring_buffer(struct dr
- 	ring->add_request = gen6_add_request;
- 	ring->get_seqno = gen6_ring_get_seqno;
- 	ring->set_seqno = ring_set_seqno;
--	ring->irq_enable_mask = GEN6_BLITTER_USER_INTERRUPT;
-+	ring->irq_enable_mask = GT_BLT_USER_INTERRUPT;
- 	ring->irq_get = gen6_ring_get_irq;
- 	ring->irq_put = gen6_ring_put_irq;
- 	ring->dispatch_execbuffer = gen6_ring_dispatch_execbuffer;
diff --git a/patches.baytrail/0229-drm-i915-vebox-interrupt-get-put.patch b/patches.baytrail/0229-drm-i915-vebox-interrupt-get-put.patch
deleted file mode 100644
index 43aaedd8e169a..0000000000000
--- a/patches.baytrail/0229-drm-i915-vebox-interrupt-get-put.patch
+++ /dev/null
@@ -1,95 +0,0 @@
-From 47d9c22e933d7fd7308b8184939d9e1f88437393 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Tue, 28 May 2013 19:22:30 -0700
-Subject: drm/i915: vebox interrupt get/put
-
-v2: Use the correct lock to protect PM interrupt regs, this was
-accidentally lost from earlier (Haihao)
-Fix return types (Ben)
-
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit a19d2933cbc4c7b8e3d72e9fd2d48847c25bb41d)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_ringbuffer.c |   46 ++++++++++++++++++++++++++++++--
- drivers/gpu/drm/i915/intel_ringbuffer.h |    5 ++-
- 2 files changed, 47 insertions(+), 4 deletions(-)
-
---- a/drivers/gpu/drm/i915/intel_ringbuffer.c
-+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
-@@ -1030,6 +1030,48 @@ gen6_ring_put_irq(struct intel_ring_buff
- 	gen6_gt_force_wake_put(dev_priv);
- }
- 
-+static bool
-+hsw_vebox_get_irq(struct intel_ring_buffer *ring)
-+{
-+	struct drm_device *dev = ring->dev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	unsigned long flags;
-+
-+	if (!dev->irq_enabled)
-+		return false;
-+
-+	spin_lock_irqsave(&dev_priv->rps.lock, flags);
-+	if (ring->irq_refcount.pm++ == 0) {
-+		u32 pm_imr = I915_READ(GEN6_PMIMR);
-+		I915_WRITE_IMR(ring, ~ring->irq_enable_mask);
-+		I915_WRITE(GEN6_PMIMR, pm_imr & ~ring->irq_enable_mask);
-+		POSTING_READ(GEN6_PMIMR);
-+	}
-+	spin_unlock_irqrestore(&dev_priv->rps.lock, flags);
-+
-+	return true;
-+}
-+
-+static void
-+hsw_vebox_put_irq(struct intel_ring_buffer *ring)
-+{
-+	struct drm_device *dev = ring->dev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	unsigned long flags;
-+
-+	if (!dev->irq_enabled)
-+		return;
-+
-+	spin_lock_irqsave(&dev_priv->rps.lock, flags);
-+	if (--ring->irq_refcount.pm == 0) {
-+		u32 pm_imr = I915_READ(GEN6_PMIMR);
-+		I915_WRITE_IMR(ring, ~0);
-+		I915_WRITE(GEN6_PMIMR, pm_imr | ring->irq_enable_mask);
-+		POSTING_READ(GEN6_PMIMR);
-+	}
-+	spin_unlock_irqrestore(&dev_priv->rps.lock, flags);
-+}
-+
- static int
- i965_dispatch_execbuffer(struct intel_ring_buffer *ring,
- 			 u32 offset, u32 length,
-@@ -1943,8 +1985,8 @@ int intel_init_vebox_ring_buffer(struct
- 	ring->get_seqno = gen6_ring_get_seqno;
- 	ring->set_seqno = ring_set_seqno;
- 	ring->irq_enable_mask = 0;
--	ring->irq_get = NULL;
--	ring->irq_put = NULL;
-+	ring->irq_get = hsw_vebox_get_irq;
-+	ring->irq_put = hsw_vebox_put_irq;
- 	ring->dispatch_execbuffer = gen6_ring_dispatch_execbuffer;
- 	ring->sync_to = gen6_ring_sync;
- 	ring->semaphore_register[RCS] = MI_SEMAPHORE_SYNC_VER;
---- a/drivers/gpu/drm/i915/intel_ringbuffer.h
-+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
-@@ -73,8 +73,9 @@ struct  intel_ring_buffer {
- 	u32		last_retired_head;
- 
- 	struct {
--		u32	gt;
--	} irq_refcount;	/* protected by dev_priv->irq_lock */
-+		u32	gt; /*  protected by dev_priv->irq_lock */
-+		u32	pm; /*  protected by dev_priv->rps.lock (sucks) */
-+	} irq_refcount;
- 	u32		irq_enable_mask;	/* bitmask to enable ring interrupt */
- 	u32		trace_irq_seqno;
- 	u32		sync_seqno[I915_NUM_RINGS-1];
diff --git a/patches.baytrail/0230-drm-i915-Enable-vebox-interrupts.patch b/patches.baytrail/0230-drm-i915-Enable-vebox-interrupts.patch
deleted file mode 100644
index a9fe609331d97..0000000000000
--- a/patches.baytrail/0230-drm-i915-Enable-vebox-interrupts.patch
+++ /dev/null
@@ -1,104 +0,0 @@
-From 925cdffd7db75dc492ed4600bd0b9e20e98ad1c3 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Tue, 28 May 2013 19:22:31 -0700
-Subject: drm/i915: Enable vebox interrupts
-
-Similar to a patch originally written by:
-
-v2: Reversed the meanings of masked and enabled (Haihao)
-Made non-destructive writes in case enable/disabler rps runs first
-(Haihao)
-
-v3: Reword error message (Damien)
-Modify postinstall to do the right thing based on previous fixup. (Ben)
-
-CC: Xiang, Haihao <haihao.xiang@intel.com>
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 12638c57f31952127c734c26315e1348fa1334c2)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c         |   31 +++++++++++++++++++++++++------
- drivers/gpu/drm/i915/i915_reg.h         |    3 +++
- drivers/gpu/drm/i915/intel_ringbuffer.c |    3 ++-
- 3 files changed, 30 insertions(+), 7 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -935,8 +935,15 @@ static void hsw_pm_irq_handler(struct dr
- 	}
- 	spin_unlock_irqrestore(&dev_priv->rps.lock, flags);
- 
--	if (pm_iir & ~GEN6_PM_RPS_EVENTS)
--		DRM_ERROR("Unexpected PM interrupted\n");
-+	if (pm_iir & ~GEN6_PM_RPS_EVENTS) {
-+		if (pm_iir & PM_VEBOX_USER_INTERRUPT)
-+			notify_ring(dev_priv->dev, &dev_priv->ring[VECS]);
-+
-+		if (pm_iir & PM_VEBOX_CS_ERROR_INTERRUPT) {
-+			DRM_ERROR("VEBOX CS error interrupt 0x%08x\n", pm_iir);
-+			i915_handle_error(dev_priv->dev, false);
-+		}
-+	}
- }
- 
- static irqreturn_t valleyview_irq_handler(int irq, void *arg)
-@@ -2727,6 +2734,7 @@ static int ivybridge_irq_postinstall(str
- 		DE_PLANEA_FLIP_DONE_IVB |
- 		DE_AUX_CHANNEL_A_IVB |
- 		DE_ERR_INT_IVB;
-+	u32 pm_irqs = GEN6_PM_RPS_EVENTS;
- 	u32 gt_irqs;
- 
- 	dev_priv->irq_mask = ~display_mask;
-@@ -2752,10 +2760,21 @@ static int ivybridge_irq_postinstall(str
- 	I915_WRITE(GTIER, gt_irqs);
- 	POSTING_READ(GTIER);
- 
--	/* Power management */
--	I915_WRITE(GEN6_PMIMR, ~GEN6_PM_RPS_EVENTS);
--	I915_WRITE(GEN6_PMIER, GEN6_PM_RPS_EVENTS);
--	POSTING_READ(GEN6_PMIMR);
-+	I915_WRITE(GEN6_PMIIR, I915_READ(GEN6_PMIIR));
-+	if (HAS_VEBOX(dev))
-+		pm_irqs |= PM_VEBOX_USER_INTERRUPT |
-+			PM_VEBOX_CS_ERROR_INTERRUPT;
-+
-+	/* Our enable/disable rps functions may touch these registers so
-+	 * make sure to set a known state for only the non-RPS bits.
-+	 * The RMW is extra paranoia since this should be called after being set
-+	 * to a known state in preinstall.
-+	 * */
-+	I915_WRITE(GEN6_PMIMR,
-+		   (I915_READ(GEN6_PMIMR) | ~GEN6_PM_RPS_EVENTS) & ~pm_irqs);
-+	I915_WRITE(GEN6_PMIER,
-+		   (I915_READ(GEN6_PMIER) & GEN6_PM_RPS_EVENTS) | pm_irqs);
-+	POSTING_READ(GEN6_PMIER);
- 
- 	ibx_irq_postinstall(dev);
- 
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -888,6 +888,9 @@
- #define GT_RENDER_DEBUG_INTERRUPT		(1 <<  1)
- #define GT_RENDER_USER_INTERRUPT		(1 <<  0)
- 
-+#define PM_VEBOX_CS_ERROR_INTERRUPT		(1 << 12) /* hsw+ */
-+#define PM_VEBOX_USER_INTERRUPT			(1 << 10) /* hsw+ */
-+
- /* These are all the "old" interrupts */
- #define ILK_BSD_USER_INTERRUPT				(1<<5)
- #define I915_PIPE_CONTROL_NOTIFY_INTERRUPT		(1<<18)
---- a/drivers/gpu/drm/i915/intel_ringbuffer.c
-+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
-@@ -1984,7 +1984,8 @@ int intel_init_vebox_ring_buffer(struct
- 	ring->add_request = gen6_add_request;
- 	ring->get_seqno = gen6_ring_get_seqno;
- 	ring->set_seqno = ring_set_seqno;
--	ring->irq_enable_mask = 0;
-+	ring->irq_enable_mask = PM_VEBOX_USER_INTERRUPT |
-+		PM_VEBOX_CS_ERROR_INTERRUPT;
- 	ring->irq_get = hsw_vebox_get_irq;
- 	ring->irq_put = hsw_vebox_put_irq;
- 	ring->dispatch_execbuffer = gen6_ring_dispatch_execbuffer;
diff --git a/patches.baytrail/0231-drm-i915-add-VEBOX-into-debugfs.patch b/patches.baytrail/0231-drm-i915-add-VEBOX-into-debugfs.patch
deleted file mode 100644
index f7ca63bd7ac19..0000000000000
--- a/patches.baytrail/0231-drm-i915-add-VEBOX-into-debugfs.patch
+++ /dev/null
@@ -1,45 +0,0 @@
-From 10fa3bda880c59f074f87063893c6144a5180160 Mon Sep 17 00:00:00 2001
-From: "Xiang, Haihao" <haihao.xiang@intel.com>
-Date: Wed, 29 May 2013 09:22:36 -0700
-Subject: drm/i915: add VEBOX into debugfs
-
-v2: Removed rebase relic VECS ring from i915_gem_request_info (Damien)
-
-v3: s/hsw/hws in debugfs which I introduced in v2 (Jon)
-
-Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
-[Order changed, and modified by]
-CC:  "Bloomfield, Jon" <jon.bloomfield@intel.com>
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 9010ebfd2b803ebab6c2fc70b9004b2a59e7937a)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_debugfs.c | 2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
-index 2eb572afbcd3..2b4a6fa6350e 100644
---- a/drivers/gpu/drm/i915/i915_debugfs.c
-+++ b/drivers/gpu/drm/i915/i915_debugfs.c
-@@ -570,6 +570,7 @@ static const char *ring_str(int ring)
- 	case RCS: return "render";
- 	case VCS: return "bsd";
- 	case BCS: return "blt";
-+	case VECS: return "vebox";
- 	default: return "";
- 	}
- }
-@@ -2222,6 +2223,7 @@ static struct drm_info_list i915_debugfs_list[] = {
- 	{"i915_gem_hws", i915_hws_info, 0, (void *)RCS},
- 	{"i915_gem_hws_blt", i915_hws_info, 0, (void *)BCS},
- 	{"i915_gem_hws_bsd", i915_hws_info, 0, (void *)VCS},
-+	{"i915_gem_hws_vebox", i915_hws_info, 0, (void *)VECS},
- 	{"i915_rstdby_delays", i915_rstdby_delays, 0},
- 	{"i915_cur_delayinfo", i915_cur_delayinfo, 0},
- 	{"i915_delayfreq_table", i915_delayfreq_table, 0},
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0232-drm-i915-add-I915_EXEC_VEBOX-to-i915_gem_do_execbuff.patch b/patches.baytrail/0232-drm-i915-add-I915_EXEC_VEBOX-to-i915_gem_do_execbuff.patch
deleted file mode 100644
index c6d87cd7722c4..0000000000000
--- a/patches.baytrail/0232-drm-i915-add-I915_EXEC_VEBOX-to-i915_gem_do_execbuff.patch
+++ /dev/null
@@ -1,53 +0,0 @@
-From 5c5cf6265426c14439c7fcd37443709567808f58 Mon Sep 17 00:00:00 2001
-From: "Xiang, Haihao" <haihao.xiang@intel.com>
-Date: Tue, 28 May 2013 19:22:33 -0700
-Subject: drm/i915: add I915_EXEC_VEBOX to i915_gem_do_execbuffer()
-
-A user can run batchbuffer via VEBOX ring.
-
-Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 82f91b6e93e2138c7e02b5a866f63d04cf040c86)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem_execbuffer.c | 9 +++++++++
- include/uapi/drm/i915_drm.h                | 1 +
- 2 files changed, 10 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-index 117ce3813681..a8bb62ca8756 100644
---- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-@@ -885,6 +885,15 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
- 			return -EPERM;
- 		}
- 		break;
-+	case I915_EXEC_VEBOX:
-+		ring = &dev_priv->ring[VECS];
-+		if (ctx_id != 0) {
-+			DRM_DEBUG("Ring %s doesn't support contexts\n",
-+				  ring->name);
-+			return -EPERM;
-+		}
-+		break;
-+
- 	default:
- 		DRM_DEBUG("execbuf with unknown ring: %d\n",
- 			  (int)(args->flags & I915_EXEC_RING_MASK));
-diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
-index 07d59419fe6b..81b99817198e 100644
---- a/include/uapi/drm/i915_drm.h
-+++ b/include/uapi/drm/i915_drm.h
-@@ -660,6 +660,7 @@ struct drm_i915_gem_execbuffer2 {
- #define I915_EXEC_RENDER                 (1<<0)
- #define I915_EXEC_BSD                    (2<<0)
- #define I915_EXEC_BLT                    (3<<0)
-+#define I915_EXEC_VEBOX                  (4<<0)
- 
- /* Used for switching the constants addressing mode on gen4+ RENDER ring.
-  * Gen6+ only supports relative addressing to dynamic state (default) and
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0233-drm-i915-add-I915_PARAM_HAS_VEBOX-to-i915_getparam.patch b/patches.baytrail/0233-drm-i915-add-I915_PARAM_HAS_VEBOX-to-i915_getparam.patch
deleted file mode 100644
index 893008dbf3b5d..0000000000000
--- a/patches.baytrail/0233-drm-i915-add-I915_PARAM_HAS_VEBOX-to-i915_getparam.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From b63204214b602f8ae8373aaac21b68178caa1eb5 Mon Sep 17 00:00:00 2001
-From: "Xiang, Haihao" <haihao.xiang@intel.com>
-Date: Tue, 28 May 2013 19:22:34 -0700
-Subject: drm/i915: add I915_PARAM_HAS_VEBOX to i915_getparam
-
-This will let userland only try to use the new ring
-when the appropriate kernel is present
-
-Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit a1f2cc73c762868435ae6ec9126bb2240337c61c)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_dma.c |    3 +++
- include/uapi/drm/i915_drm.h     |    2 +-
- 2 files changed, 4 insertions(+), 1 deletion(-)
-
---- a/drivers/gpu/drm/i915/i915_dma.c
-+++ b/drivers/gpu/drm/i915/i915_dma.c
-@@ -963,6 +963,9 @@ static int i915_getparam(struct drm_devi
- 	case I915_PARAM_HAS_BLT:
- 		value = intel_ring_initialized(&dev_priv->ring[BCS]);
- 		break;
-+	case I915_PARAM_HAS_VEBOX:
-+		value = intel_ring_initialized(&dev_priv->ring[VECS]);
-+		break;
- 	case I915_PARAM_HAS_RELAXED_FENCING:
- 		value = 1;
- 		break;
---- a/include/uapi/drm/i915_drm.h
-+++ b/include/uapi/drm/i915_drm.h
-@@ -305,7 +305,7 @@ typedef struct drm_i915_irq_wait {
- #define I915_PARAM_HAS_WAIT_TIMEOUT	 19
- #define I915_PARAM_HAS_SEMAPHORES	 20
- #define I915_PARAM_HAS_PRIME_VMAP_FLUSH	 21
--#define I915_PARAM_RSVD_FOR_FUTURE_USE	 22
-+#define I915_PARAM_HAS_VEBOX		 22
- #define I915_PARAM_HAS_SECURE_BATCHES	 23
- #define I915_PARAM_HAS_PINNED_BATCHES	 24
- #define I915_PARAM_HAS_EXEC_NO_RELOC	 25
diff --git a/patches.baytrail/0234-drm-i915-fix-up-the-edp-power-well-check.patch b/patches.baytrail/0234-drm-i915-fix-up-the-edp-power-well-check.patch
deleted file mode 100644
index 0bbb4e4108272..0000000000000
--- a/patches.baytrail/0234-drm-i915-fix-up-the-edp-power-well-check.patch
+++ /dev/null
@@ -1,70 +0,0 @@
-From 5a53a12165befa51a0a7c6def19ce1f856b1c73a Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Fri, 31 May 2013 17:49:17 +0200
-Subject: drm/i915: fix up the edp power well check
-
-Now that we track the cpu transcoder we need accurately in the pipe
-config we can finally fix up the transcoder check. With the current
-code eDP on port D will be broken since we'd errornously cut the
-power.
-
-For reference see
-
-commit 2124b72e6283c4e84a55e71077fee91793f4c801
-Author: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date:   Fri Mar 22 14:07:23 2013 -0300
-
-    drm/i915: don't disable the power well yet
-
-v2:
-- Kill the now outdated comment (Paulo)
-- Add the missing crtc->base.enabled check and consolidate it (Paulo)
-- Smash all checks together, looks neater that way.
-
-v3: Kill the unused encoder variable.
-
-Cc: Takashi Iwai <tiwai@suse.de>
-Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit e7a639c445e1f7c44adc1665539fa8e3af0b8e30)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 18 ++++--------------
- 1 file changed, 4 insertions(+), 14 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 959ebc7a8283..b16c95720f7b 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -5793,23 +5793,13 @@ static void haswell_modeset_global_resources(struct drm_device *dev)
- {
- 	bool enable = false;
- 	struct intel_crtc *crtc;
--	struct intel_encoder *encoder;
- 
- 	list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head) {
--		if (crtc->pipe != PIPE_A && crtc->base.enabled)
--			enable = true;
--		/* XXX: Should check for edp transcoder here, but thanks to init
--		 * sequence that's not yet available. Just in case desktop eDP
--		 * on PORT D is possible on haswell, too. */
--		/* Even the eDP panel fitter is outside the always-on well. */
--		if (crtc->config.pch_pfit.size && crtc->base.enabled)
--			enable = true;
--	}
-+		if (!crtc->base.enabled)
-+			continue;
- 
--	list_for_each_entry(encoder, &dev->mode_config.encoder_list,
--			    base.head) {
--		if (encoder->type != INTEL_OUTPUT_EDP &&
--		    encoder->connectors_active)
-+		if (crtc->pipe != PIPE_A || crtc->config.pch_pfit.size ||
-+		    crtc->config.cpu_transcoder != TRANSCODER_EDP)
- 			enable = true;
- 	}
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0235-drm-i915-implement-IPS-feature.patch b/patches.baytrail/0235-drm-i915-implement-IPS-feature.patch
deleted file mode 100644
index da190d9e46778..0000000000000
--- a/patches.baytrail/0235-drm-i915-implement-IPS-feature.patch
+++ /dev/null
@@ -1,235 +0,0 @@
-From b404317dbebe844ac7ca6bfa2d6ac34f4380f69b Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Fri, 31 May 2013 16:33:22 -0300
-Subject: drm/i915: implement IPS feature
-
-Intermediate Pixel Storage is a feature that should reduce the number
-of times the display engine wakes up memory to read pixels, so it
-should allow deeper PC states. IPS can only be enabled on ULT pipe A
-with 8:8:8 pipe pixel formats.
-
-With eDP 1920x1080 and correct watermarks but without FBC this moves
-my PC7 residency from 2.5% to around 38%.
-
-v2: - It's tied to pipe A, not port A
-    - Add pipe_config support (Chris)
-    - Add some assertions (Chris)
-    - Rebase against latest dinq
-v3: - Don't ever set ips_enabled to false (Daniel)
-    - Only check for ips_enabled at hsw_disable_ips (Daniel)
-v4: - Add hsw_compute_ips_config (Daniel)
-    - Use the new dump_pipe_config (Daniel)
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 42db64efcd95014570835c7b0a08277c60486f07)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_reg.h      |   11 ++++
- drivers/gpu/drm/i915/intel_display.c |   78 +++++++++++++++++++++++++++++++++--
- drivers/gpu/drm/i915/intel_drv.h     |    2 
- 3 files changed, 88 insertions(+), 3 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -1025,6 +1025,8 @@
- /* Framebuffer compression for Ivybridge */
- #define IVB_FBC_RT_BASE			0x7020
- 
-+#define IPS_CTL		0x43408
-+#define   IPS_ENABLE	(1 << 31)
- 
- #define _HSW_PIPE_SLICE_CHICKEN_1_A	0x420B0
- #define _HSW_PIPE_SLICE_CHICKEN_1_B	0x420B4
-@@ -3676,6 +3678,15 @@
- #define _LGC_PALETTE_B           0x4a800
- #define LGC_PALETTE(pipe) _PIPE(pipe, _LGC_PALETTE_A, _LGC_PALETTE_B)
- 
-+#define _GAMMA_MODE_A		0x4a480
-+#define _GAMMA_MODE_B		0x4ac80
-+#define GAMMA_MODE(pipe) _PIPE(pipe, _GAMMA_MODE_A, _GAMMA_MODE_B)
-+#define GAMMA_MODE_MODE_MASK	(3 << 0)
-+#define GAMMA_MODE_MODE_8bit	(0 << 0)
-+#define GAMMA_MODE_MODE_10bit	(1 << 0)
-+#define GAMMA_MODE_MODE_12bit	(2 << 0)
-+#define GAMMA_MODE_MODE_SPLIT	(3 << 0)
-+
- /* interrupts */
- #define DE_MASTER_IRQ_CONTROL   (1 << 31)
- #define DE_SPRITEB_FLIP_DONE    (1 << 29)
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -3242,6 +3242,42 @@ static void ironlake_crtc_enable(struct
- 	intel_wait_for_vblank(dev, intel_crtc->pipe);
- }
- 
-+/* IPS only exists on ULT machines and is tied to pipe A. */
-+static bool hsw_crtc_supports_ips(struct intel_crtc *crtc)
-+{
-+	return IS_ULT(crtc->base.dev) && crtc->pipe == PIPE_A;
-+}
-+
-+static void hsw_enable_ips(struct intel_crtc *crtc)
-+{
-+	struct drm_i915_private *dev_priv = crtc->base.dev->dev_private;
-+
-+	if (!crtc->config.ips_enabled)
-+		return;
-+
-+	/* We can only enable IPS after we enable a plane and wait for a vblank.
-+	 * We guarantee that the plane is enabled by calling intel_enable_ips
-+	 * only after intel_enable_plane. And intel_enable_plane already waits
-+	 * for a vblank, so all we need to do here is to enable the IPS bit. */
-+	assert_plane_enabled(dev_priv, crtc->plane);
-+	I915_WRITE(IPS_CTL, IPS_ENABLE);
-+}
-+
-+static void hsw_disable_ips(struct intel_crtc *crtc)
-+{
-+	struct drm_device *dev = crtc->base.dev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+
-+	if (!crtc->config.ips_enabled)
-+		return;
-+
-+	assert_plane_enabled(dev_priv, crtc->plane);
-+	I915_WRITE(IPS_CTL, 0);
-+
-+	/* We need to wait for a vblank before we can disable the plane. */
-+	intel_wait_for_vblank(dev, crtc->pipe);
-+}
-+
- static void haswell_crtc_enable(struct drm_crtc *crtc)
- {
- 	struct drm_device *dev = crtc->dev;
-@@ -3289,6 +3325,8 @@ static void haswell_crtc_enable(struct d
- 			  intel_crtc->config.has_pch_encoder);
- 	intel_enable_plane(dev_priv, plane, pipe);
- 
-+	hsw_enable_ips(intel_crtc);
-+
- 	if (intel_crtc->config.has_pch_encoder)
- 		lpt_pch_enable(crtc);
- 
-@@ -3431,6 +3469,8 @@ static void haswell_crtc_disable(struct
- 	if (dev_priv->cfb_plane == plane)
- 		intel_disable_fbc(dev);
- 
-+	hsw_disable_ips(intel_crtc);
-+
- 	intel_disable_plane(dev_priv, plane, pipe);
- 
- 	if (intel_crtc->config.has_pch_encoder)
-@@ -3987,11 +4027,19 @@ retry:
- 	return setup_ok ? 0 : -EINVAL;
- }
- 
-+static void hsw_compute_ips_config(struct intel_crtc *crtc,
-+				   struct intel_crtc_config *pipe_config)
-+{
-+	pipe_config->ips_enabled = hsw_crtc_supports_ips(crtc) &&
-+				   pipe_config->pipe_bpp == 24;
-+}
-+
- static int intel_crtc_compute_config(struct drm_crtc *crtc,
- 				     struct intel_crtc_config *pipe_config)
- {
- 	struct drm_device *dev = crtc->dev;
- 	struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
-+	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
- 
- 	if (HAS_PCH_SPLIT(dev)) {
- 		/* FDI link clock is fixed at 2.7G */
-@@ -4021,8 +4069,11 @@ static int intel_crtc_compute_config(str
- 		pipe_config->pipe_bpp = 8*3;
- 	}
- 
-+	if (IS_HASWELL(dev))
-+		hsw_compute_ips_config(intel_crtc, pipe_config);
-+
- 	if (pipe_config->has_pch_encoder)
--		return ironlake_fdi_compute_config(to_intel_crtc(crtc), pipe_config);
-+		return ironlake_fdi_compute_config(intel_crtc, pipe_config);
- 
- 	return 0;
- }
-@@ -5932,6 +5983,9 @@ static bool haswell_get_pipe_config(stru
- 	if (intel_display_power_enabled(dev, pfit_domain))
- 		ironlake_get_pfit_config(crtc, pipe_config);
- 
-+	pipe_config->ips_enabled = hsw_crtc_supports_ips(crtc) &&
-+				   (I915_READ(IPS_CTL) & IPS_ENABLE);
-+
- 	return true;
- }
- 
-@@ -6236,8 +6290,10 @@ void intel_crtc_load_lut(struct drm_crtc
- 	struct drm_device *dev = crtc->dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
--	int palreg = PALETTE(intel_crtc->pipe);
-+	enum pipe pipe = intel_crtc->pipe;
-+	int palreg = PALETTE(pipe);
- 	int i;
-+	bool reenable_ips = false;
- 
- 	/* The clocks have to be on to load the palette. */
- 	if (!crtc->enabled || !intel_crtc->active)
-@@ -6245,7 +6301,17 @@ void intel_crtc_load_lut(struct drm_crtc
- 
- 	/* use legacy palette for Ironlake */
- 	if (HAS_PCH_SPLIT(dev))
--		palreg = LGC_PALETTE(intel_crtc->pipe);
-+		palreg = LGC_PALETTE(pipe);
-+
-+	/* Workaround : Do not read or write the pipe palette/gamma data while
-+	 * GAMMA_MODE is configured for split gamma and IPS_CTL has IPS enabled.
-+	 */
-+	if (intel_crtc->config.ips_enabled &&
-+	    ((I915_READ(GAMMA_MODE(pipe)) & GAMMA_MODE_MODE_MASK) ==
-+	     GAMMA_MODE_MODE_SPLIT)) {
-+		hsw_disable_ips(intel_crtc);
-+		reenable_ips = true;
-+	}
- 
- 	for (i = 0; i < 256; i++) {
- 		I915_WRITE(palreg + 4 * i,
-@@ -6253,6 +6319,9 @@ void intel_crtc_load_lut(struct drm_crtc
- 			   (intel_crtc->lut_g[i] << 8) |
- 			   intel_crtc->lut_b[i]);
- 	}
-+
-+	if (reenable_ips)
-+		hsw_enable_ips(intel_crtc);
- }
- 
- static void i845_update_cursor(struct drm_crtc *crtc, u32 base)
-@@ -7684,6 +7753,7 @@ static void intel_dump_pipe_config(struc
- 	DRM_DEBUG_KMS("pch pfit: pos: 0x%08x, size: 0x%08x\n",
- 		      pipe_config->pch_pfit.pos,
- 		      pipe_config->pch_pfit.size);
-+	DRM_DEBUG_KMS("ips: %i\n", pipe_config->ips_enabled);
- }
- 
- static struct intel_crtc_config *
-@@ -8000,6 +8070,8 @@ intel_pipe_config_compare(struct drm_dev
- 	PIPE_CONF_CHECK_I(pch_pfit.pos);
- 	PIPE_CONF_CHECK_I(pch_pfit.size);
- 
-+	PIPE_CONF_CHECK_I(ips_enabled);
-+
- #undef PIPE_CONF_CHECK_I
- #undef PIPE_CONF_CHECK_FLAGS
- 
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -268,6 +268,8 @@ struct intel_crtc_config {
- 	/* FDI configuration, only valid if has_pch_encoder is set. */
- 	int fdi_lanes;
- 	struct intel_link_m_n fdi_m_n;
-+
-+	bool ips_enabled;
- };
- 
- struct intel_crtc {
diff --git a/patches.baytrail/0236-drm-i915-add-enable_ips-module-option.patch b/patches.baytrail/0236-drm-i915-add-enable_ips-module-option.patch
deleted file mode 100644
index 2b57f44f3ccf3..0000000000000
--- a/patches.baytrail/0236-drm-i915-add-enable_ips-module-option.patch
+++ /dev/null
@@ -1,71 +0,0 @@
-From 8157c06d90041377493b7d8c9298fdaa05347039 Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Fri, 31 May 2013 16:33:23 -0300
-Subject: drm/i915: add enable_ips module option
-
-IPS is still enabled by default. Feature requested by the power
-management team.
-
-This should also help testing the feature on some early pre-production
-hardware where there were relationship problems between IPS and PSR.
-
-v2: Rebase on top of the newest IPS implementation.
-v3: Check i915_enable_ips at compute_config, not supports_ips, so the
-    kernel parameter will be ignored at haswell_get_pipe_config.
-
-Requested-by: Kristen Accardi <kristen.c.accardi@intel.com>
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 3c4ca58c12a3bf71433425df534dfbb85d8a5dc5)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.c      | 4 ++++
- drivers/gpu/drm/i915/i915_drv.h      | 1 +
- drivers/gpu/drm/i915/intel_display.c | 3 ++-
- 3 files changed, 7 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
-index 9136fcdcd24a..4ae308e845d4 100644
---- a/drivers/gpu/drm/i915/i915_drv.c
-+++ b/drivers/gpu/drm/i915/i915_drv.c
-@@ -128,6 +128,10 @@ module_param_named(disable_power_well, i915_disable_power_well, int, 0600);
- MODULE_PARM_DESC(disable_power_well,
- 		 "Disable the power well when possible (default: false)");
- 
-+int i915_enable_ips __read_mostly = 1;
-+module_param_named(enable_ips, i915_enable_ips, int, 0600);
-+MODULE_PARM_DESC(enable_ips, "Enable IPS (default: true)");
-+
- static struct drm_driver driver;
- extern int intel_agp_enabled;
- 
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index ae8b9668b8ff..4eed8559fa90 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1471,6 +1471,7 @@ extern bool i915_enable_hangcheck __read_mostly;
- extern int i915_enable_ppgtt __read_mostly;
- extern unsigned int i915_preliminary_hw_support __read_mostly;
- extern int i915_disable_power_well __read_mostly;
-+extern int i915_enable_ips __read_mostly;
- 
- extern int i915_suspend(struct drm_device *dev, pm_message_t state);
- extern int i915_resume(struct drm_device *dev);
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 20fa85137060..b26c3a08d8e1 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -4030,7 +4030,8 @@ retry:
- static void hsw_compute_ips_config(struct intel_crtc *crtc,
- 				   struct intel_crtc_config *pipe_config)
- {
--	pipe_config->ips_enabled = hsw_crtc_supports_ips(crtc) &&
-+	pipe_config->ips_enabled = i915_enable_ips &&
-+				   hsw_crtc_supports_ips(crtc) &&
- 				   pipe_config->pipe_bpp == 24;
- }
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0237-drm-i915-add-i915_ips_status-debugfs-entry.patch b/patches.baytrail/0237-drm-i915-add-i915_ips_status-debugfs-entry.patch
deleted file mode 100644
index 7aee79ac7c7f3..0000000000000
--- a/patches.baytrail/0237-drm-i915-add-i915_ips_status-debugfs-entry.patch
+++ /dev/null
@@ -1,61 +0,0 @@
-From b3d96bf0c2c11911f7edf146e34f5d366e0a5082 Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Fri, 31 May 2013 16:33:24 -0300
-Subject: drm/i915: add i915_ips_status debugfs entry
-
-It just prints whether it's supported/enabled/disabled. Feature
-requested by the power management team.
-
-v2: Checkpatch started complaining about seq_printf with 1 argument.
-
-Requested-by: Kristen Accardi <kristen.c.accardi@intel.com>
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 92d44621ad2d083bc03920c904ca0a5eb10d9ded)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_debugfs.c | 20 ++++++++++++++++++++
- 1 file changed, 20 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
-index 2b4a6fa6350e..76255a69752a 100644
---- a/drivers/gpu/drm/i915/i915_debugfs.c
-+++ b/drivers/gpu/drm/i915/i915_debugfs.c
-@@ -1435,6 +1435,25 @@ static int i915_fbc_status(struct seq_file *m, void *unused)
- 	return 0;
- }
- 
-+static int i915_ips_status(struct seq_file *m, void *unused)
-+{
-+	struct drm_info_node *node = (struct drm_info_node *) m->private;
-+	struct drm_device *dev = node->minor->dev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+
-+	if (!IS_ULT(dev)) {
-+		seq_puts(m, "not supported\n");
-+		return 0;
-+	}
-+
-+	if (I915_READ(IPS_CTL) & IPS_ENABLE)
-+		seq_puts(m, "enabled\n");
-+	else
-+		seq_puts(m, "disabled\n");
-+
-+	return 0;
-+}
-+
- static int i915_sr_status(struct seq_file *m, void *unused)
- {
- 	struct drm_info_node *node = (struct drm_info_node *) m->private;
-@@ -2233,6 +2252,7 @@ static struct drm_info_list i915_debugfs_list[] = {
- 	{"i915_ring_freq_table", i915_ring_freq_table, 0},
- 	{"i915_gfxec", i915_gfxec, 0},
- 	{"i915_fbc_status", i915_fbc_status, 0},
-+	{"i915_ips_status", i915_ips_status, 0},
- 	{"i915_sr_status", i915_sr_status, 0},
- 	{"i915_opregion", i915_opregion, 0},
- 	{"i915_gem_framebuffer", i915_gem_framebuffer_info, 0},
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0238-drm-i915-Drop-bogus-fbdev-sprite-disable-code.patch b/patches.baytrail/0238-drm-i915-Drop-bogus-fbdev-sprite-disable-code.patch
deleted file mode 100644
index 2c906bf3a5691..0000000000000
--- a/patches.baytrail/0238-drm-i915-Drop-bogus-fbdev-sprite-disable-code.patch
+++ /dev/null
@@ -1,48 +0,0 @@
-From 3437a0f608f9c36c1fc289628202ddc4827921ee Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Mon, 3 Jun 2013 16:11:41 +0300
-Subject: drm/i915: Drop bogus fbdev sprite disable code
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-plane->enabled is never set, so this code didn't do anything.
-
-Also drm_fb_helper_restore_fbdev_mode() will now disable all cursors
-and sprites for us, so we don't have to bother anymore.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Dave Airlie <airlied@gmail.com>
-(cherry picked from commit b72447cdf1298b46af87d754bfb5d3db6eb7dbfe)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_fb.c | 7 -------
- 1 file changed, 7 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_fb.c b/drivers/gpu/drm/i915/intel_fb.c
-index 6b7c3ca2c035..3b03c3c6cc5d 100644
---- a/drivers/gpu/drm/i915/intel_fb.c
-+++ b/drivers/gpu/drm/i915/intel_fb.c
-@@ -292,8 +292,6 @@ void intel_fb_restore_mode(struct drm_device *dev)
- {
- 	int ret;
- 	drm_i915_private_t *dev_priv = dev->dev_private;
--	struct drm_mode_config *config = &dev->mode_config;
--	struct drm_plane *plane;
- 
- 	if (INTEL_INFO(dev)->num_pipes == 0)
- 		return;
-@@ -304,10 +302,5 @@ void intel_fb_restore_mode(struct drm_device *dev)
- 	if (ret)
- 		DRM_DEBUG("failed to restore crtc mode\n");
- 
--	/* Be sure to shut off any planes that may be active */
--	list_for_each_entry(plane, &config->plane_list, head)
--		if (plane->enabled)
--			plane->funcs->disable_plane(plane);
--
- 	drm_modeset_unlock_all(dev);
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0239-drm-i915-Demote-unknown-param-to-DRM_DEBUG.patch b/patches.baytrail/0239-drm-i915-Demote-unknown-param-to-DRM_DEBUG.patch
deleted file mode 100644
index fded118987bd2..0000000000000
--- a/patches.baytrail/0239-drm-i915-Demote-unknown-param-to-DRM_DEBUG.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From 6316ab13178e4a5ce7897eba035b1286ccee440c Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Fri, 31 May 2013 11:28:45 -0700
-Subject: drm/i915: Demote unknown param to DRM_DEBUG
-
-It's not terribly interesting to know that a parameter doesn't exist,
-and it can get in the way of interesting messages, especially with the
-staggered VECS merging as we've done.
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit e29c32da531dfd94cffb150fd69760605739fb3a)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_dma.c |    3 +--
- 1 file changed, 1 insertion(+), 2 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_dma.c
-+++ b/drivers/gpu/drm/i915/i915_dma.c
-@@ -1009,8 +1009,7 @@ static int i915_getparam(struct drm_devi
- 		value = 1;
- 		break;
- 	default:
--		DRM_DEBUG_DRIVER("Unknown parameter %d\n",
--				 param->param);
-+		DRM_DEBUG("Unknown parameter %d\n", param->param);
- 		return -EINVAL;
- 	}
- 
diff --git a/patches.baytrail/0240-drm-i915-Make-stolen-use-pin-pages.patch b/patches.baytrail/0240-drm-i915-Make-stolen-use-pin-pages.patch
deleted file mode 100644
index d32616962ac9d..0000000000000
--- a/patches.baytrail/0240-drm-i915-Make-stolen-use-pin-pages.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From 180938694fb4ff6714d2aca947d68f4dc596ffaf Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Fri, 31 May 2013 14:46:19 -0700
-Subject: drm/i915: Make stolen use pin pages
-
-This makes it easier to catch leaks.
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit dd53e1b0ed82ba72b2e9f11ae9c3d38bb82113cc)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem_stolen.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem_stolen.c b/drivers/gpu/drm/i915/i915_gem_stolen.c
-index 89cbfab9570e..bc593e353576 100644
---- a/drivers/gpu/drm/i915/i915_gem_stolen.c
-+++ b/drivers/gpu/drm/i915/i915_gem_stolen.c
-@@ -279,7 +279,7 @@ _i915_gem_object_create_stolen(struct drm_device *dev,
- 		goto cleanup;
- 
- 	obj->has_dma_mapping = true;
--	obj->pages_pin_count = 1;
-+	i915_gem_object_pin_pages(obj);
- 	obj->stolen = stolen;
- 
- 	obj->base.write_domain = I915_GEM_DOMAIN_GTT;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0241-drm-i915-Unpin-stolen-pages.patch b/patches.baytrail/0241-drm-i915-Unpin-stolen-pages.patch
deleted file mode 100644
index 1f15280a751f6..0000000000000
--- a/patches.baytrail/0241-drm-i915-Unpin-stolen-pages.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From 8ef8ec6911e8776c8cbcdc516007803a5c8d92bd Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Fri, 31 May 2013 14:46:20 -0700
-Subject: drm/i915: Unpin stolen pages
-
-The way the stolen handling works is we take a pin on the backing pages,
-but we never actually get a reference to the bo. On freeing objects
-allocated with stolen memory, the final unref will end up freeing the
-object with pinned pages count left. To enable an assertion to catch
-bugs in this code path, this patch cleans up that remaining pin.
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 1d64ae719b436f2a5f8f5da801b4c560bf24aaa9)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem.c | 5 +++++
- 1 file changed, 5 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index 25f327cc1127..fdb203fb5cb1 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -3892,6 +3892,11 @@ void i915_gem_free_object(struct drm_gem_object *gem_obj)
- 		dev_priv->mm.interruptible = was_interruptible;
- 	}
- 
-+	/* Stolen objects don't hold a ref, but do hold pin count. Fix that up
-+	 * before progressing. */
-+	if (obj->stolen)
-+		i915_gem_object_unpin_pages(obj);
-+
- 	obj->pages_pin_count = 0;
- 	i915_gem_object_put_pages(obj);
- 	i915_gem_object_free_mmap_offset(obj);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0242-drm-i915-unpin-pages-at-unbind.patch b/patches.baytrail/0242-drm-i915-unpin-pages-at-unbind.patch
deleted file mode 100644
index e6d4ffc3a80d3..0000000000000
--- a/patches.baytrail/0242-drm-i915-unpin-pages-at-unbind.patch
+++ /dev/null
@@ -1,54 +0,0 @@
-From 10fc4a8c0bb80e95b2fb3d272cdf3b602b9d50d5 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Fri, 31 May 2013 11:28:47 -0700
-Subject: drm/i915: unpin pages at unbind
-
-If we properly keep track of the pages_pin_count, then when we later add
-multiple address spaces, the put_pages doesn't need any special checks
-to be able to perform it's job.
-
-CC: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-[danvet: Rebased on top of the fix for stolen memory pinning.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 401c29f607702864fd00b6154325f7570ebaba4f)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem.c | 5 +++--
- 1 file changed, 3 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index fdb203fb5cb1..4c01b1b3d902 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -2521,6 +2521,7 @@ i915_gem_object_unbind(struct drm_i915_gem_object *obj)
- 		obj->has_aliasing_ppgtt_mapping = 0;
- 	}
- 	i915_gem_gtt_finish_object(obj);
-+	i915_gem_object_unpin_pages(obj);
- 
- 	list_del(&obj->mm_list);
- 	list_move_tail(&obj->gtt_list, &dev_priv->mm.unbound_list);
-@@ -3092,7 +3093,6 @@ search_free:
- 
- 	obj->map_and_fenceable = mappable && fenceable;
- 
--	i915_gem_object_unpin_pages(obj);
- 	trace_i915_gem_object_bind(obj, map_and_fenceable);
- 	i915_gem_verify_gtt(dev);
- 	return 0;
-@@ -3897,7 +3897,8 @@ void i915_gem_free_object(struct drm_gem_object *gem_obj)
- 	if (obj->stolen)
- 		i915_gem_object_unpin_pages(obj);
- 
--	obj->pages_pin_count = 0;
-+	if (WARN_ON(obj->pages_pin_count))
-+		obj->pages_pin_count = 0;
- 	i915_gem_object_put_pages(obj);
- 	i915_gem_object_free_mmap_offset(obj);
- 	i915_gem_object_release_stolen(obj);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0243-drm-i915-Rename-the-gtt_list-to-global_list.patch b/patches.baytrail/0243-drm-i915-Rename-the-gtt_list-to-global_list.patch
deleted file mode 100644
index 6f008d5d947b4..0000000000000
--- a/patches.baytrail/0243-drm-i915-Rename-the-gtt_list-to-global_list.patch
+++ /dev/null
@@ -1,256 +0,0 @@
-From 3c99a2602793537216ffb67e68f7cec221c9ed14 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Fri, 31 May 2013 11:28:48 -0700
-Subject: drm/i915: Rename the gtt_list to global_list
-
-Since it will be used for the global bound/unbound list with full PPGTT,
-this helps clarify things for upcoming code rework.
-
-Recommended-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 35c20a60c7549b11fd1d8c5d5d7ab5b6b54d6ff9)
-[dbasehore: Fixed conflict that seems to be due to incorrect ordering
-of CLs]
-Signed-off-by: Derek Basehore <dbasehore@chromium.org>
-
-Conflicts:
-	drivers/gpu/drm/i915/i915_gem.c
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_debugfs.c    | 11 ++++++-----
- drivers/gpu/drm/i915/i915_drv.h        |  2 +-
- drivers/gpu/drm/i915/i915_gem.c        | 21 +++++++++++----------
- drivers/gpu/drm/i915/i915_gem_gtt.c    |  4 ++--
- drivers/gpu/drm/i915/i915_gem_stolen.c |  2 +-
- drivers/gpu/drm/i915/i915_irq.c        |  6 +++---
- 6 files changed, 24 insertions(+), 22 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
-index 76255a69752a..0e7e3c04d939 100644
---- a/drivers/gpu/drm/i915/i915_debugfs.c
-+++ b/drivers/gpu/drm/i915/i915_debugfs.c
-@@ -215,7 +215,7 @@ static int i915_gem_object_info(struct seq_file *m, void* data)
- 		   dev_priv->mm.object_memory);
- 
- 	size = count = mappable_size = mappable_count = 0;
--	count_objects(&dev_priv->mm.bound_list, gtt_list);
-+	count_objects(&dev_priv->mm.bound_list, global_list);
- 	seq_printf(m, "%u [%u] objects, %zu [%zu] bytes in gtt\n",
- 		   count, mappable_count, size, mappable_size);
- 
-@@ -230,7 +230,7 @@ static int i915_gem_object_info(struct seq_file *m, void* data)
- 		   count, mappable_count, size, mappable_size);
- 
- 	size = count = purgeable_size = purgeable_count = 0;
--	list_for_each_entry(obj, &dev_priv->mm.unbound_list, gtt_list) {
-+	list_for_each_entry(obj, &dev_priv->mm.unbound_list, global_list) {
- 		size += obj->base.size, ++count;
- 		if (obj->madv == I915_MADV_DONTNEED)
- 			purgeable_size += obj->base.size, ++purgeable_count;
-@@ -238,7 +238,7 @@ static int i915_gem_object_info(struct seq_file *m, void* data)
- 	seq_printf(m, "%u unbound objects, %zu bytes\n", count, size);
- 
- 	size = count = mappable_size = mappable_count = 0;
--	list_for_each_entry(obj, &dev_priv->mm.bound_list, gtt_list) {
-+	list_for_each_entry(obj, &dev_priv->mm.bound_list, global_list) {
- 		if (obj->fault_mappable) {
- 			size += obj->gtt_space->size;
- 			++count;
-@@ -283,7 +283,7 @@ static int i915_gem_gtt_info(struct seq_file *m, void* data)
- 		return ret;
- 
- 	total_obj_size = total_gtt_size = count = 0;
--	list_for_each_entry(obj, &dev_priv->mm.bound_list, gtt_list) {
-+	list_for_each_entry(obj, &dev_priv->mm.bound_list, global_list) {
- 		if (list == PINNED_LIST && obj->pin_count == 0)
- 			continue;
- 
-@@ -1944,7 +1944,8 @@ i915_drop_caches_set(void *data, u64 val)
- 	}
- 
- 	if (val & DROP_UNBOUND) {
--		list_for_each_entry_safe(obj, next, &dev_priv->mm.unbound_list, gtt_list)
-+		list_for_each_entry_safe(obj, next, &dev_priv->mm.unbound_list,
-+					 global_list)
- 			if (obj->pages_pin_count == 0) {
- 				ret = i915_gem_object_put_pages(obj);
- 				if (ret)
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 4eed8559fa90..36ed6041a259 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1155,7 +1155,7 @@ struct drm_i915_gem_object {
- 	struct drm_mm_node *gtt_space;
- 	/** Stolen memory for this object, instead of being backed by shmem. */
- 	struct drm_mm_node *stolen;
--	struct list_head gtt_list;
-+	struct list_head global_list;
- 
- 	/** This object's place on the active/inactive lists */
- 	struct list_head ring_list;
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index 4c01b1b3d902..694af6db61a2 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -176,7 +176,7 @@ i915_gem_get_aperture_ioctl(struct drm_device *dev, void *data,
- 
- 	pinned = 0;
- 	mutex_lock(&dev->struct_mutex);
--	list_for_each_entry(obj, &dev_priv->mm.bound_list, gtt_list)
-+	list_for_each_entry(obj, &dev_priv->mm.bound_list, global_list)
- 		if (obj->pin_count)
- 			pinned += obj->gtt_space->size;
- 	mutex_unlock(&dev->struct_mutex);
-@@ -1677,7 +1677,7 @@ i915_gem_object_put_pages(struct drm_i915_gem_object *obj)
- 	/* ->put_pages might need to allocate memory for the bit17 swizzle
- 	 * array, hence protect them from being reaped by removing them from gtt
- 	 * lists early. */
--	list_del(&obj->gtt_list);
-+	list_del(&obj->global_list);
- 
- 	ops->put_pages(obj);
- 	obj->pages = NULL;
-@@ -1697,7 +1697,7 @@ __i915_gem_shrink(struct drm_i915_private *dev_priv, long target,
- 
- 	list_for_each_entry_safe(obj, next,
- 				 &dev_priv->mm.unbound_list,
--				 gtt_list) {
-+				 global_list) {
- 		if ((i915_gem_object_is_purgeable(obj) || !purgeable_only) &&
- 		    i915_gem_object_put_pages(obj) == 0) {
- 			count += obj->base.size >> PAGE_SHIFT;
-@@ -1734,7 +1734,8 @@ i915_gem_shrink_all(struct drm_i915_private *dev_priv)
- 
- 	i915_gem_evict_everything(dev_priv->dev);
- 
--	list_for_each_entry_safe(obj, next, &dev_priv->mm.unbound_list, gtt_list)
-+	list_for_each_entry_safe(obj, next, &dev_priv->mm.unbound_list,
-+				 global_list)
- 		i915_gem_object_put_pages(obj);
- }
- 
-@@ -1868,7 +1869,7 @@ i915_gem_object_get_pages(struct drm_i915_gem_object *obj)
- 	if (ret)
- 		return ret;
- 
--	list_add_tail(&obj->gtt_list, &dev_priv->mm.unbound_list);
-+	list_add_tail(&obj->global_list, &dev_priv->mm.unbound_list);
- 	return 0;
- }
- 
-@@ -2524,7 +2525,7 @@ i915_gem_object_unbind(struct drm_i915_gem_object *obj)
- 	i915_gem_object_unpin_pages(obj);
- 
- 	list_del(&obj->mm_list);
--	list_move_tail(&obj->gtt_list, &dev_priv->mm.unbound_list);
-+	list_move_tail(&obj->global_list, &dev_priv->mm.unbound_list);
- 	/* Avoid an unnecessary call to unbind on rebind. */
- 	obj->map_and_fenceable = true;
- 
-@@ -2954,7 +2955,7 @@ static void i915_gem_verify_gtt(struct drm_device *dev)
- 	struct drm_i915_gem_object *obj;
- 	int err = 0;
- 
--	list_for_each_entry(obj, &dev_priv->mm.gtt_list, gtt_list) {
-+	list_for_each_entry(obj, &dev_priv->mm.gtt_list, global_list) {
- 		if (obj->gtt_space == NULL) {
- 			printk(KERN_ERR "object found on GTT list with no space reserved\n");
- 			err++;
-@@ -3078,7 +3079,7 @@ search_free:
- 		return ret;
- 	}
- 
--	list_move_tail(&obj->gtt_list, &dev_priv->mm.bound_list);
-+	list_move_tail(&obj->global_list, &dev_priv->mm.bound_list);
- 	list_add_tail(&obj->mm_list, &dev_priv->mm.inactive_list);
- 
- 	obj->gtt_space = node;
-@@ -3792,7 +3793,7 @@ void i915_gem_object_init(struct drm_i915_gem_object *obj,
- 			  const struct drm_i915_gem_object_ops *ops)
- {
- 	INIT_LIST_HEAD(&obj->mm_list);
--	INIT_LIST_HEAD(&obj->gtt_list);
-+	INIT_LIST_HEAD(&obj->global_list);
- 	INIT_LIST_HEAD(&obj->ring_list);
- 	INIT_LIST_HEAD(&obj->exec_list);
- 
-@@ -4538,7 +4539,7 @@ i915_gem_inactive_shrink(struct shrinker *shrinker, struct shrink_control *sc)
- 	}
- 
- 	cnt = 0;
--	list_for_each_entry(obj, &dev_priv->mm.unbound_list, gtt_list)
-+	list_for_each_entry(obj, &dev_priv->mm.unbound_list, global_list)
- 		if (obj->pages_pin_count == 0)
- 			cnt += obj->base.size >> PAGE_SHIFT;
- 	list_for_each_entry(obj, &dev_priv->mm.inactive_list, mm_list)
-diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
-index 1bddf477304a..95acae13b059 100644
---- a/drivers/gpu/drm/i915/i915_gem_gtt.c
-+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
-@@ -439,7 +439,7 @@ void i915_gem_restore_gtt_mappings(struct drm_device *dev)
- 	dev_priv->gtt.gtt_clear_range(dev, dev_priv->gtt.start / PAGE_SIZE,
- 				      dev_priv->gtt.total / PAGE_SIZE);
- 
--	list_for_each_entry(obj, &dev_priv->mm.bound_list, gtt_list) {
-+	list_for_each_entry(obj, &dev_priv->mm.bound_list, global_list) {
- 		i915_gem_clflush_object(obj);
- 		i915_gem_gtt_bind_object(obj, obj->cache_level);
- 	}
-@@ -631,7 +631,7 @@ void i915_gem_setup_global_gtt(struct drm_device *dev,
- 		dev_priv->mm.gtt_space.color_adjust = i915_gtt_color_adjust;
- 
- 	/* Mark any preallocated objects as occupied */
--	list_for_each_entry(obj, &dev_priv->mm.bound_list, gtt_list) {
-+	list_for_each_entry(obj, &dev_priv->mm.bound_list, global_list) {
- 		DRM_DEBUG_KMS("reserving preallocated space: %x + %zx\n",
- 			      obj->gtt_offset, obj->base.size);
- 
-diff --git a/drivers/gpu/drm/i915/i915_gem_stolen.c b/drivers/gpu/drm/i915/i915_gem_stolen.c
-index bc593e353576..f713294618fe 100644
---- a/drivers/gpu/drm/i915/i915_gem_stolen.c
-+++ b/drivers/gpu/drm/i915/i915_gem_stolen.c
-@@ -383,7 +383,7 @@ i915_gem_object_create_stolen_for_preallocated(struct drm_device *dev,
- 	obj->gtt_offset = gtt_offset;
- 	obj->has_global_gtt_mapping = 1;
- 
--	list_add_tail(&obj->gtt_list, &dev_priv->mm.bound_list);
-+	list_add_tail(&obj->global_list, &dev_priv->mm.bound_list);
- 	list_add_tail(&obj->mm_list, &dev_priv->mm.inactive_list);
- 
- 	return obj;
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index ea396518baab..2ecf66cb26f3 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -1681,7 +1681,7 @@ static u32 capture_pinned_bo(struct drm_i915_error_buffer *err,
- 	struct drm_i915_gem_object *obj;
- 	int i = 0;
- 
--	list_for_each_entry(obj, head, gtt_list) {
-+	list_for_each_entry(obj, head, global_list) {
- 		if (obj->pin_count == 0)
- 			continue;
- 
-@@ -1823,7 +1823,7 @@ static void i915_gem_record_active_context(struct intel_ring_buffer *ring,
- 	if (ring->id != RCS || !error->ccid)
- 		return;
- 
--	list_for_each_entry(obj, &dev_priv->mm.bound_list, gtt_list) {
-+	list_for_each_entry(obj, &dev_priv->mm.bound_list, global_list) {
- 		if ((error->ccid & PAGE_MASK) == obj->gtt_offset) {
- 			ering->ctx = i915_error_object_create_sized(dev_priv,
- 								    obj, 1);
-@@ -1960,7 +1960,7 @@ static void i915_capture_error_state(struct drm_device *dev)
- 	list_for_each_entry(obj, &dev_priv->mm.active_list, mm_list)
- 		i++;
- 	error->active_bo_count = i;
--	list_for_each_entry(obj, &dev_priv->mm.bound_list, gtt_list)
-+	list_for_each_entry(obj, &dev_priv->mm.bound_list, global_list)
- 		if (obj->pin_count)
- 			i++;
- 	error->pinned_bo_count = i - error->active_bo_count;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0244-drm-i915-detect-hang-using-per-ring-hangcheck_score.patch b/patches.baytrail/0244-drm-i915-detect-hang-using-per-ring-hangcheck_score.patch
deleted file mode 100644
index b78c8a18387f6..0000000000000
--- a/patches.baytrail/0244-drm-i915-detect-hang-using-per-ring-hangcheck_score.patch
+++ /dev/null
@@ -1,188 +0,0 @@
-From f31ffe1f1f0f76084f88564bcd0b8cd97068eca0 Mon Sep 17 00:00:00 2001
-From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
-Date: Thu, 30 May 2013 09:04:29 +0300
-Subject: drm/i915: detect hang using per ring hangcheck_score
-
-Keep track of ring seqno progress and if there are no
-progress detected, declare hang. Use actual head (acthd)
-to distinguish between ring stuck and batchbuffer looping
-situation. Stuck ring will be kicked to trigger progress.
-
-This commit adds a hard limit for batchbuffer completion time.
-If batchbuffer completion time is more than 4.5 seconds,
-the gpu will be declared hung.
-
-Review comment from Ben which nicely clarifies the semantic change:
-
-"Maybe I'm just stating the functional changes of the patch, but in case
-they were unintended here is what I see as potential issues:
-
-1. "If ring B is waiting on ring A via semaphore, and ring A is making
-   progress, albeit slowly - the hangcheck will fire. The check will
-   determine that A is moving, however ring B will appear hung because
-   the ACTHD doesn't move. I honestly can't say if that's actually a
-   realistic problem to hit it probably implies the timeout value is too
-   low.
-
-2. "There's also another corner case on the kick. If the seqno = 2
-   (though not stuck), and on the 3rd hangcheck, the ring is stuck, and
-   we try to kick it... we don't actually try to find out if the kick
-   helped"
-
-v2: use atchd to detect stuck ring from loop (Ben Widawsky)
-
-v3: Use acthd to check when ring needs kicking.
-Declare hang on third time in order to give time for
-kick_ring to take effect.
-
-v4: Update commit msg
-
-Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
-[danvet: Paste in Ben's review comment.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 05407ff889ceebe383aa5907219f86582ef96b72)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c         | 80 +++++++++++++++++++--------------
- drivers/gpu/drm/i915/intel_ringbuffer.h |  2 +
- 2 files changed, 49 insertions(+), 33 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index 2ecf66cb26f3..e213bd71524e 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -674,7 +674,6 @@ static void notify_ring(struct drm_device *dev,
- 
- 	wake_up_all(&ring->irq_queue);
- 	if (i915_enable_hangcheck) {
--		dev_priv->gpu_error.hangcheck_count = 0;
- 		mod_timer(&dev_priv->gpu_error.hangcheck_timer,
- 			  round_jiffies_up(jiffies + DRM_I915_HANGCHECK_JIFFIES));
- 	}
-@@ -2459,61 +2458,76 @@ static bool i915_hangcheck_hung(struct drm_device *dev)
- 
- /**
-  * This is called when the chip hasn't reported back with completed
-- * batchbuffers in a long time. The first time this is called we simply record
-- * ACTHD. If ACTHD hasn't changed by the time the hangcheck timer elapses
-- * again, we assume the chip is wedged and try to fix it.
-+ * batchbuffers in a long time. We keep track per ring seqno progress and
-+ * if there are no progress, hangcheck score for that ring is increased.
-+ * Further, acthd is inspected to see if the ring is stuck. On stuck case
-+ * we kick the ring. If we see no progress on three subsequent calls
-+ * we assume chip is wedged and try to fix it by resetting the chip.
-  */
- void i915_hangcheck_elapsed(unsigned long data)
- {
- 	struct drm_device *dev = (struct drm_device *)data;
- 	drm_i915_private_t *dev_priv = dev->dev_private;
- 	struct intel_ring_buffer *ring;
--	bool err = false, idle;
- 	int i;
--	u32 seqno[I915_NUM_RINGS];
--	bool work_done;
-+	int busy_count = 0, rings_hung = 0;
-+	bool stuck[I915_NUM_RINGS];
- 
- 	if (!i915_enable_hangcheck)
- 		return;
- 
--	idle = true;
- 	for_each_ring(ring, dev_priv, i) {
--		seqno[i] = ring->get_seqno(ring, false);
--		idle &= i915_hangcheck_ring_idle(ring, seqno[i], &err);
--	}
-+		u32 seqno, acthd;
-+		bool idle, err = false;
-+
-+		seqno = ring->get_seqno(ring, false);
-+		acthd = intel_ring_get_active_head(ring);
-+		idle = i915_hangcheck_ring_idle(ring, seqno, &err);
-+		stuck[i] = ring->hangcheck.acthd == acthd;
-+
-+		if (idle) {
-+			if (err)
-+				ring->hangcheck.score += 2;
-+			else
-+				ring->hangcheck.score = 0;
-+		} else {
-+			busy_count++;
- 
--	/* If all work is done then ACTHD clearly hasn't advanced. */
--	if (idle) {
--		if (err) {
--			if (i915_hangcheck_hung(dev))
--				return;
-+			if (ring->hangcheck.seqno == seqno) {
-+				ring->hangcheck.score++;
- 
--			goto repeat;
-+				/* Kick ring if stuck*/
-+				if (stuck[i])
-+					i915_hangcheck_ring_hung(ring);
-+			} else {
-+				ring->hangcheck.score = 0;
-+			}
- 		}
- 
--		dev_priv->gpu_error.hangcheck_count = 0;
--		return;
-+		ring->hangcheck.seqno = seqno;
-+		ring->hangcheck.acthd = acthd;
- 	}
- 
--	work_done = false;
- 	for_each_ring(ring, dev_priv, i) {
--		if (ring->hangcheck.seqno != seqno[i]) {
--			work_done = true;
--			ring->hangcheck.seqno = seqno[i];
-+		if (ring->hangcheck.score > 2) {
-+			rings_hung++;
-+			DRM_ERROR("%s: %s on %s 0x%x\n", ring->name,
-+				  stuck[i] ? "stuck" : "no progress",
-+				  stuck[i] ? "addr" : "seqno",
-+				  stuck[i] ? ring->hangcheck.acthd & HEAD_ADDR :
-+				  ring->hangcheck.seqno);
- 		}
- 	}
- 
--	if (!work_done) {
--		if (i915_hangcheck_hung(dev))
--			return;
--	} else {
--		dev_priv->gpu_error.hangcheck_count = 0;
--	}
-+	if (rings_hung)
-+		return i915_handle_error(dev, true);
- 
--repeat:
--	/* Reset timer case chip hangs without another request being added */
--	mod_timer(&dev_priv->gpu_error.hangcheck_timer,
--		  round_jiffies_up(jiffies + DRM_I915_HANGCHECK_JIFFIES));
-+	if (busy_count)
-+		/* Reset timer case chip hangs without another request
-+		 * being added */
-+		mod_timer(&dev_priv->gpu_error.hangcheck_timer,
-+			  round_jiffies_up(jiffies +
-+					   DRM_I915_HANGCHECK_JIFFIES));
- }
- 
- /* drm_dma.h hooks
-diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
-index 022d07e43d12..4c7e103e6fa4 100644
---- a/drivers/gpu/drm/i915/intel_ringbuffer.h
-+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
-@@ -39,6 +39,8 @@ struct  intel_hw_status_page {
- 
- struct intel_ring_hangcheck {
- 	u32 seqno;
-+	u32 acthd;
-+	int score;
- };
- 
- struct  intel_ring_buffer {
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0245-drm-i915-remove-i915_hangcheck_hung.patch b/patches.baytrail/0245-drm-i915-remove-i915_hangcheck_hung.patch
deleted file mode 100644
index 4c4be58579549..0000000000000
--- a/patches.baytrail/0245-drm-i915-remove-i915_hangcheck_hung.patch
+++ /dev/null
@@ -1,64 +0,0 @@
-From 2dafb7e8f861588146d496267825941169efe20d Mon Sep 17 00:00:00 2001
-From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
-Date: Mon, 13 May 2013 16:32:13 +0300
-Subject: drm/i915: remove i915_hangcheck_hung
-
-Rework of per ring hangcheck made this obsolete.
-
-Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 96a764d983647636b39c462ea14cd1f588f6c0bd)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h |  1 -
- drivers/gpu/drm/i915/i915_irq.c | 21 ---------------------
- 2 files changed, 22 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 36ed6041a259..92a0f5e42aca 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -843,7 +843,6 @@ struct i915_gpu_error {
- #define DRM_I915_HANGCHECK_PERIOD 1500 /* in ms */
- #define DRM_I915_HANGCHECK_JIFFIES msecs_to_jiffies(DRM_I915_HANGCHECK_PERIOD)
- 	struct timer_list hangcheck_timer;
--	int hangcheck_count;
- 
- 	/* For reset and error_state handling. */
- 	spinlock_t lock;
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index e213bd71524e..2eaae3211553 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -2435,27 +2435,6 @@ static bool i915_hangcheck_ring_hung(struct intel_ring_buffer *ring)
- 	return !kick_ring(ring);
- }
- 
--static bool i915_hangcheck_hung(struct drm_device *dev)
--{
--	drm_i915_private_t *dev_priv = dev->dev_private;
--
--	if (dev_priv->gpu_error.hangcheck_count++ > 1) {
--		bool hung = true;
--		struct intel_ring_buffer *ring;
--		int i;
--
--		DRM_ERROR("Hangcheck timer elapsed... GPU hung\n");
--		i915_handle_error(dev, true);
--
--		for_each_ring(ring, dev_priv, i)
--			hung &= i915_hangcheck_ring_hung(ring);
--
--		return hung;
--	}
--
--	return false;
--}
--
- /**
-  * This is called when the chip hasn't reported back with completed
-  * batchbuffers in a long time. We keep track per ring seqno progress and
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0246-drm-i915-Use-container_of-in-the-fbdev-code.patch b/patches.baytrail/0246-drm-i915-Use-container_of-in-the-fbdev-code.patch
deleted file mode 100644
index 8211eed3a083c..0000000000000
--- a/patches.baytrail/0246-drm-i915-Use-container_of-in-the-fbdev-code.patch
+++ /dev/null
@@ -1,54 +0,0 @@
-From 1d8b3fd87e153e799ccf8dbd41583d21121958ea Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Fri, 31 May 2013 20:07:05 +0300
-Subject: drm/i915: Use container_of() in the fbdev code
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Use container_of() instead of a cast to get struct intel_fbdev
-from struct drm_fb_helper.
-
-Also populate the fb_info->par correctly with the drm_fb_helper pointer
-instead of the intel_fbdev pointer.
-
-There's no actual functional change since the drm_fb_helper happens to
-be the first member inside intel_fbdev.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 3430824b4ba9f8b658d5503d390ce9a7286b0b4a)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_fb.c | 7 ++++---
- 1 file changed, 4 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_fb.c b/drivers/gpu/drm/i915/intel_fb.c
-index 3b03c3c6cc5d..9061edcf4b74 100644
---- a/drivers/gpu/drm/i915/intel_fb.c
-+++ b/drivers/gpu/drm/i915/intel_fb.c
-@@ -60,8 +60,9 @@ static struct fb_ops intelfb_ops = {
- static int intelfb_create(struct drm_fb_helper *helper,
- 			  struct drm_fb_helper_surface_size *sizes)
- {
--	struct intel_fbdev *ifbdev = (struct intel_fbdev *)helper;
--	struct drm_device *dev = ifbdev->helper.dev;
-+	struct intel_fbdev *ifbdev =
-+		container_of(helper, struct intel_fbdev, helper);
-+	struct drm_device *dev = helper->dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct fb_info *info;
- 	struct drm_framebuffer *fb;
-@@ -108,7 +109,7 @@ static int intelfb_create(struct drm_fb_helper *helper,
- 		goto out_unpin;
- 	}
- 
--	info->par = ifbdev;
-+	info->par = helper;
- 
- 	ret = intel_framebuffer_init(dev, &ifbdev->ifb, &mode_cmd, obj);
- 	if (ret)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0247-drm-i915-s-drm_i915_private_t-struct-drm_i915_privat.patch b/patches.baytrail/0247-drm-i915-s-drm_i915_private_t-struct-drm_i915_privat.patch
deleted file mode 100644
index 6df60dd810ce4..0000000000000
--- a/patches.baytrail/0247-drm-i915-s-drm_i915_private_t-struct-drm_i915_privat.patch
+++ /dev/null
@@ -1,82 +0,0 @@
-From 17a448203ff89adab92129c42c49490cd5d667dc Mon Sep 17 00:00:00 2001
-From: James Ausmus <james.ausmus@intel.com>
-Date: Mon, 23 Sep 2013 16:52:19 -0700
-Subject: drm/i915: s/drm_i915_private_t/struct drm_i915_private/
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-People don't like typedefs these days. Eliminate their use from intel_fb.c.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit b51b32cde1757cd0f3f75bc15d5e0e98c3007dff)
-
-Conflicts:
-	drivers/gpu/drm/i915/intel_fb.c
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_fb.c | 12 ++++++------
- 1 file changed, 6 insertions(+), 6 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_fb.c b/drivers/gpu/drm/i915/intel_fb.c
-index 9061edcf4b74..7f3ac54b56e9 100644
---- a/drivers/gpu/drm/i915/intel_fb.c
-+++ b/drivers/gpu/drm/i915/intel_fb.c
-@@ -218,7 +218,7 @@ static void intel_fbdev_destroy(struct drm_device *dev,
- int intel_fbdev_init(struct drm_device *dev)
- {
- 	struct intel_fbdev *ifbdev;
--	drm_i915_private_t *dev_priv = dev->dev_private;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
- 	int ret;
- 
- 	ifbdev = kzalloc(sizeof(struct intel_fbdev), GFP_KERNEL);
-@@ -243,7 +243,7 @@ int intel_fbdev_init(struct drm_device *dev)
- 
- void intel_fbdev_initial_config(struct drm_device *dev)
- {
--	drm_i915_private_t *dev_priv = dev->dev_private;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
- 
- 	/* Due to peculiar init order wrt to hpd handling this is separate. */
- 	drm_fb_helper_initial_config(&dev_priv->fbdev->helper, 32);
-@@ -251,7 +251,7 @@ void intel_fbdev_initial_config(struct drm_device *dev)
- 
- void intel_fbdev_fini(struct drm_device *dev)
- {
--	drm_i915_private_t *dev_priv = dev->dev_private;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
- 	if (!dev_priv->fbdev)
- 		return;
- 
-@@ -262,7 +262,7 @@ void intel_fbdev_fini(struct drm_device *dev)
- 
- void intel_fbdev_set_suspend(struct drm_device *dev, int state)
- {
--	drm_i915_private_t *dev_priv = dev->dev_private;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct intel_fbdev *ifbdev = dev_priv->fbdev;
- 	struct fb_info *info;
- 
-@@ -285,14 +285,14 @@ MODULE_LICENSE("GPL and additional rights");
- 
- void intel_fb_output_poll_changed(struct drm_device *dev)
- {
--	drm_i915_private_t *dev_priv = dev->dev_private;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
- 	drm_fb_helper_hotplug_event(&dev_priv->fbdev->helper);
- }
- 
- void intel_fb_restore_mode(struct drm_device *dev)
- {
- 	int ret;
--	drm_i915_private_t *dev_priv = dev->dev_private;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
- 
- 	if (INTEL_INFO(dev)->num_pipes == 0)
- 		return;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0248-drm-i915-optimize-vblank-waits-in-set_base_atomic.patch b/patches.baytrail/0248-drm-i915-optimize-vblank-waits-in-set_base_atomic.patch
deleted file mode 100644
index ce54777e7134d..0000000000000
--- a/patches.baytrail/0248-drm-i915-optimize-vblank-waits-in-set_base_atomic.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From 3d97fe8c502a307b76e4c6dc967c88b4aefc3a2f Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Sun, 2 Jun 2013 17:23:01 +0200
-Subject: drm/i915: optimize vblank waits in set_base_atomic
-
-We only need to do them if the pipe is actually running and if the
-framebuffers have changed. Removes two "wait for vblank timed out"
-messages when doing a suspend/resume cycle on my i855gm.
-
-v2: s/to_intel_ctrc(crtc)/intel_crtc/ spotted by Chris.
-
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit d7697eea3eec74c561d12887d892c53ac4380c00)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index b26c3a08d8e1..799f2bd36aee 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -2212,7 +2212,8 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
- 	crtc->y = y;
- 
- 	if (old_fb) {
--		intel_wait_for_vblank(dev, intel_crtc->pipe);
-+		if (intel_crtc->active && old_fb != fb)
-+			intel_wait_for_vblank(dev, intel_crtc->pipe);
- 		intel_unpin_fb_obj(to_intel_framebuffer(old_fb)->obj);
- 	}
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0249-drm-i915-refactor-sink-bpp-clamping.patch b/patches.baytrail/0249-drm-i915-refactor-sink-bpp-clamping.patch
deleted file mode 100644
index 42d5d9acebb8a..0000000000000
--- a/patches.baytrail/0249-drm-i915-refactor-sink-bpp-clamping.patch
+++ /dev/null
@@ -1,120 +0,0 @@
-From df3d709ec0bcc8cf08f8e2ad4ea50ce6fcec71b6 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Sun, 2 Jun 2013 13:26:23 +0200
-Subject: drm/i915: refactor sink bpp clamping
-
-As a prep work to fix it up:
-- Use intel_connector instead of drm_connector to avoid too much
-  upcasting in the bugfix patch.
-- Extract the connector bpp clamping from the loop-over-connectors
-  logic.
-- Bikeshed function names (to make it clearer that
-  acompute_baseline_pipe_bpp runs in the compute stage of the modeset
-  sequence) and add a comment to make it clearer what it does.
-
-No functional change in this patch.
-
-Cc: Chris Wilson <chris@chris-wilson.co.uk>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 050f7aeb129c1b9fb63dd523ca9bc1101bbae6cc)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 63 +++++++++++++++++++++++-------------
- 1 file changed, 41 insertions(+), 22 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 799f2bd36aee..e51b59cdee23 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -7656,13 +7656,39 @@ static void intel_modeset_commit_output_state(struct drm_device *dev)
- 	}
- }
- 
-+static void
-+connected_sink_compute_bpp(struct intel_connector * connector,
-+			   struct intel_crtc_config *pipe_config)
-+{
-+	int bpp = pipe_config->pipe_bpp;
-+
-+	DRM_DEBUG_KMS("[CONNECTOR:%d:%s] checking for sink bpp constrains\n",
-+		connector->base.base.id,
-+		drm_get_connector_name(&connector->base));
-+
-+	/* Don't use an invalid EDID bpc value */
-+	if (connector->base.display_info.bpc &&
-+	    connector->base.display_info.bpc * 3 < bpp) {
-+		DRM_DEBUG_KMS("clamping display bpp (was %d) to EDID reported max of %d\n",
-+			      bpp, connector->base.display_info.bpc*3);
-+		pipe_config->pipe_bpp = connector->base.display_info.bpc*3;
-+	}
-+
-+	/* Clamp bpp to 8 on screens without EDID 1.4 */
-+	if (connector->base.display_info.bpc == 0 && bpp > 24) {
-+		DRM_DEBUG_KMS("clamping display bpp (was %d) to default limit of 24\n",
-+			      bpp);
-+		pipe_config->pipe_bpp = 24;
-+	}
-+}
-+
- static int
--pipe_config_set_bpp(struct drm_crtc *crtc,
--		    struct drm_framebuffer *fb,
--		    struct intel_crtc_config *pipe_config)
-+compute_baseline_pipe_bpp(struct intel_crtc *crtc,
-+			  struct drm_framebuffer *fb,
-+			  struct intel_crtc_config *pipe_config)
- {
--	struct drm_device *dev = crtc->dev;
--	struct drm_connector *connector;
-+	struct drm_device *dev = crtc->base.dev;
-+	struct intel_connector *connector;
- 	int bpp;
- 
- 	switch (fb->pixel_format) {
-@@ -7705,24 +7731,12 @@ pipe_config_set_bpp(struct drm_crtc *crtc,
- 
- 	/* Clamp display bpp to EDID value */
- 	list_for_each_entry(connector, &dev->mode_config.connector_list,
--			    head) {
--		if (connector->encoder && connector->encoder->crtc != crtc)
-+			    base.head) {
-+		if (connector->base.encoder &&
-+		    connector->base.encoder->crtc != crtc)
- 			continue;
- 
--		/* Don't use an invalid EDID bpc value */
--		if (connector->display_info.bpc &&
--		    connector->display_info.bpc * 3 < bpp) {
--			DRM_DEBUG_KMS("clamping display bpp (was %d) to EDID reported max of %d\n",
--				      bpp, connector->display_info.bpc*3);
--			pipe_config->pipe_bpp = connector->display_info.bpc*3;
--		}
--
--		/* Clamp bpp to 8 on screens without EDID 1.4 */
--		if (connector->display_info.bpc == 0 && bpp > 24) {
--			DRM_DEBUG_KMS("clamping display bpp (was %d) to default limit of 24\n",
--				      bpp);
--			pipe_config->pipe_bpp = 24;
--		}
-+		connected_sink_compute_bpp(connector, pipe_config);
- 	}
- 
- 	return bpp;
-@@ -7778,7 +7792,12 @@ intel_modeset_pipe_config(struct drm_crtc *crtc,
- 	drm_mode_copy(&pipe_config->requested_mode, mode);
- 	pipe_config->cpu_transcoder = to_intel_crtc(crtc)->pipe;
- 
--	plane_bpp = pipe_config_set_bpp(crtc, fb, pipe_config);
-+	/* Compute a starting value for pipe_config->pipe_bpp taking the source
-+	 * plane pixel format and any sink constraints into account. Returns the
-+	 * source plane bpp so that dithering can be selected on mismatches
-+	 * after encoders and crtc also have had their say. */
-+	plane_bpp = compute_baseline_pipe_bpp(to_intel_crtc(crtc),
-+					      fb, pipe_config);
- 	if (plane_bpp < 0)
- 		goto fail;
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0250-drm-i915-fix-EDID-sink-based-bpp-clamping.patch b/patches.baytrail/0250-drm-i915-fix-EDID-sink-based-bpp-clamping.patch
deleted file mode 100644
index 484cbcf54a6f7..0000000000000
--- a/patches.baytrail/0250-drm-i915-fix-EDID-sink-based-bpp-clamping.patch
+++ /dev/null
@@ -1,64 +0,0 @@
-From b2d8446051b9cc80759004487b0d0d3130218c6f Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Sun, 2 Jun 2013 13:26:24 +0200
-Subject: drm/i915: fix EDID/sink-based bpp clamping
-
-Since this is run in the compute config stage we need to check
-the new_ pointers, i.e the stage output routing, not the current
-modeset layout. Also there was a little logic bug in properly skipping
-connectors: The old code did not skip any unused connectors and so
-clamped to whatever was left in there (usually 0 if that connector
-hasn't seen a EDID 1.4 screen ever since boot-up).
-
-This has been broken when moving the pipe bpp selection in
-
-commit 4e53c2e010e531b4a014692199e978482d471c7e
-Author: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date:   Wed Mar 27 00:44:58 2013 +0100
-
-    drm/i915: precompute pipe bpp before touching the hw
-
-To avoid too much casting switch from drm_ to intel_ types.
-
-Also add a bit of debug output to help reconstructing what's going
-on.
-
-v2: Try to clarify this a bit:
-- s/pipe_config_set_bpp/compute_baseline_pipe_bpp/ to make it clearer
-  at which stage this function is run. Also add a comment about what
-  it does.
-- Extract the sink clamping into it's own function.
-
-v3: Actually make it compile.
-
-v4: Split out all the prep refactoring to make the bugfix stick out
-really badly. Also elaborate a bit in the commit message about the
-nature of the bugfix.
-
-Cc: Chris Wilson <chris@chris-wilson.co.uk>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 1b829e05469963301736df69f0a2a2c3d3fb2225)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index e51b59cdee23..989b9af8e2bc 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -7732,8 +7732,8 @@ compute_baseline_pipe_bpp(struct intel_crtc *crtc,
- 	/* Clamp display bpp to EDID value */
- 	list_for_each_entry(connector, &dev->mode_config.connector_list,
- 			    base.head) {
--		if (connector->base.encoder &&
--		    connector->base.encoder->crtc != crtc)
-+		if (!connector->new_encoder ||
-+		    connector->new_encoder->new_crtc != crtc)
- 			continue;
- 
- 		connected_sink_compute_bpp(connector, pipe_config);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0251-drm-i915-split-out-intel_pnv_find_best_PLL.patch b/patches.baytrail/0251-drm-i915-split-out-intel_pnv_find_best_PLL.patch
deleted file mode 100644
index d7cf53873d8d5..0000000000000
--- a/patches.baytrail/0251-drm-i915-split-out-intel_pnv_find_best_PLL.patch
+++ /dev/null
@@ -1,200 +0,0 @@
-From bd3df75a31a1e4a0d7e2c69e228cbf896b0360f3 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Sat, 1 Jun 2013 17:16:17 +0200
-Subject: drm/i915: split out intel_pnv_find_best_PLL
-
-Pineview is just different.
-
-Also split out i9xx_clock from intel_clock and drop the now redundant
-struct device * parameter.
-
-Note that in this patch I kill an XXX comment about 100MHz clocks. I
-couldn't figure out what this is about, and we don't seem to have any
-bug reports about this either. I suspect that it's a remnant from when
-the i9xx and ilk+ modeset code was all in the same file since ilk+
-does indeed have a 100MHz clock. So I've just killed it to stop the
-cargo-culting.
-
-Reviewed-by: Paulo Zanoni <przanoni@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit ac58c3f046dde3c29b0e3fc7ea71a82b5f80c470)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 92 ++++++++++++++++++++++++++++++------
- 1 file changed, 77 insertions(+), 15 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 989b9af8e2bc..c06140cbc6af 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -97,10 +97,13 @@ intel_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
- 		    int target, int refclk, intel_clock_t *match_clock,
- 		    intel_clock_t *best_clock);
- static bool
-+intel_pnv_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
-+			int target, int refclk, intel_clock_t *match_clock,
-+			intel_clock_t *best_clock);
-+static bool
- intel_g4x_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
- 			int target, int refclk, intel_clock_t *match_clock,
- 			intel_clock_t *best_clock);
--
- static bool
- intel_vlv_find_best_pll(const intel_limit_t *limit, struct drm_crtc *crtc,
- 			int target, int refclk, intel_clock_t *match_clock,
-@@ -246,7 +249,7 @@ static const intel_limit_t intel_limits_pineview_sdvo = {
- 	.p1 = { .min = 1, .max = 8 },
- 	.p2 = { .dot_limit = 200000,
- 		.p2_slow = 10, .p2_fast = 5 },
--	.find_pll = intel_find_best_PLL,
-+	.find_pll = intel_pnv_find_best_PLL,
- };
- 
- static const intel_limit_t intel_limits_pineview_lvds = {
-@@ -260,7 +263,7 @@ static const intel_limit_t intel_limits_pineview_lvds = {
- 	.p1 = { .min = 1, .max = 8 },
- 	.p2 = { .dot_limit = 112000,
- 		.p2_slow = 14, .p2_fast = 14 },
--	.find_pll = intel_find_best_PLL,
-+	.find_pll = intel_pnv_find_best_PLL,
- };
- 
- /* Ironlake / Sandybridge
-@@ -475,12 +478,8 @@ static uint32_t i9xx_dpll_compute_m(struct dpll *dpll)
- 	return 5 * (dpll->m1 + 2) + (dpll->m2 + 2);
- }
- 
--static void intel_clock(struct drm_device *dev, int refclk, intel_clock_t *clock)
-+static void i9xx_clock(int refclk, intel_clock_t *clock)
- {
--	if (IS_PINEVIEW(dev)) {
--		pineview_clock(refclk, clock);
--		return;
--	}
- 	clock->m = i9xx_dpll_compute_m(clock);
- 	clock->p = clock->p1 * clock->p2;
- 	clock->vco = refclk * clock->m / (clock->n + 2);
-@@ -541,7 +540,68 @@ static bool
- intel_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
- 		    int target, int refclk, intel_clock_t *match_clock,
- 		    intel_clock_t *best_clock)
-+{
-+	struct drm_device *dev = crtc->dev;
-+	intel_clock_t clock;
-+	int err = target;
-+
-+	if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) {
-+		/*
-+		 * For LVDS just rely on its current settings for dual-channel.
-+		 * We haven't figured out how to reliably set up different
-+		 * single/dual channel state, if we even can.
-+		 */
-+		if (intel_is_dual_link_lvds(dev))
-+			clock.p2 = limit->p2.p2_fast;
-+		else
-+			clock.p2 = limit->p2.p2_slow;
-+	} else {
-+		if (target < limit->p2.dot_limit)
-+			clock.p2 = limit->p2.p2_slow;
-+		else
-+			clock.p2 = limit->p2.p2_fast;
-+	}
-+
-+	memset(best_clock, 0, sizeof(*best_clock));
-+
-+	for (clock.m1 = limit->m1.min; clock.m1 <= limit->m1.max;
-+	     clock.m1++) {
-+		for (clock.m2 = limit->m2.min;
-+		     clock.m2 <= limit->m2.max; clock.m2++) {
-+			/* m1 is always 0 in Pineview */
-+			if (clock.m2 >= clock.m1 && !IS_PINEVIEW(dev))
-+				break;
-+			for (clock.n = limit->n.min;
-+			     clock.n <= limit->n.max; clock.n++) {
-+				for (clock.p1 = limit->p1.min;
-+					clock.p1 <= limit->p1.max; clock.p1++) {
-+					int this_err;
- 
-+					i9xx_clock(refclk, &clock);
-+					if (!intel_PLL_is_valid(dev, limit,
-+								&clock))
-+						continue;
-+					if (match_clock &&
-+					    clock.p != match_clock->p)
-+						continue;
-+
-+					this_err = abs(clock.dot - target);
-+					if (this_err < err) {
-+						*best_clock = clock;
-+						err = this_err;
-+					}
-+				}
-+			}
-+		}
-+	}
-+
-+	return (err != target);
-+}
-+
-+static bool
-+intel_pnv_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
-+			int target, int refclk, intel_clock_t *match_clock,
-+			intel_clock_t *best_clock)
- {
- 	struct drm_device *dev = crtc->dev;
- 	intel_clock_t clock;
-@@ -579,7 +639,7 @@ intel_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
- 					clock.p1 <= limit->p1.max; clock.p1++) {
- 					int this_err;
- 
--					intel_clock(dev, refclk, &clock);
-+					pineview_clock(refclk, &clock);
- 					if (!intel_PLL_is_valid(dev, limit,
- 								&clock))
- 						continue;
-@@ -638,7 +698,7 @@ intel_g4x_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
- 				     clock.p1 >= limit->p1.min; clock.p1--) {
- 					int this_err;
- 
--					intel_clock(dev, refclk, &clock);
-+					i9xx_clock(refclk, &clock);
- 					if (!intel_PLL_is_valid(dev, limit,
- 								&clock))
- 						continue;
-@@ -6914,8 +6974,10 @@ static int intel_crtc_clock_get(struct drm_device *dev, struct drm_crtc *crtc)
- 			return 0;
- 		}
- 
--		/* XXX: Handle the 100Mhz refclk */
--		intel_clock(dev, 96000, &clock);
-+		if (IS_PINEVIEW(dev))
-+			pineview_clock(96000, &clock);
-+		else
-+			i9xx_clock(96000, &clock);
- 	} else {
- 		bool is_lvds = (pipe == 1) && (I915_READ(LVDS) & LVDS_PORT_EN);
- 
-@@ -6927,9 +6989,9 @@ static int intel_crtc_clock_get(struct drm_device *dev, struct drm_crtc *crtc)
- 			if ((dpll & PLL_REF_INPUT_MASK) ==
- 			    PLLB_REF_INPUT_SPREADSPECTRUMIN) {
- 				/* XXX: might not be 66MHz */
--				intel_clock(dev, 66000, &clock);
-+				i9xx_clock(66000, &clock);
- 			} else
--				intel_clock(dev, 48000, &clock);
-+				i9xx_clock(48000, &clock);
- 		} else {
- 			if (dpll & PLL_P1_DIVIDE_BY_TWO)
- 				clock.p1 = 2;
-@@ -6942,7 +7004,7 @@ static int intel_crtc_clock_get(struct drm_device *dev, struct drm_crtc *crtc)
- 			else
- 				clock.p2 = 2;
- 
--			intel_clock(dev, 48000, &clock);
-+			i9xx_clock(48000, &clock);
- 		}
- 	}
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0252-drm-i915-move-find_pll-callback-to-dev_priv-display.patch b/patches.baytrail/0252-drm-i915-move-find_pll-callback-to-dev_priv-display.patch
deleted file mode 100644
index b3f934c3df8d3..0000000000000
--- a/patches.baytrail/0252-drm-i915-move-find_pll-callback-to-dev_priv-display.patch
+++ /dev/null
@@ -1,415 +0,0 @@
-From 043261d79ed4087c60cd8254afe05dda45e69021 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Mon, 3 Jun 2013 22:40:22 +0200
-Subject: drm/i915: move find_pll callback to dev_priv->display
-
-Now that the DP madness is cleared out, this is all only per-platform.
-So move it out from the intel clock limits structure.
-
-While at it drop the intel prefix on the static functions, call the
-vtable entry find_dpll (since it's for the display pll) and rip out
-the now unnecessary forward declarations.
-
-Note that the parameters of ->find_dpll are still unchanged, but they
-eventually need to be moved over to just take in a pipe configuration.
-But currently a lot of things are still missing from the pipe
-configuration (reflock, output-specific dpll limits and preferences,
-downclocked dotclock). So this will happen in a later step.
-
-Note that intel_g4x_limit has a peculiar case where it selects
-intel_limits_i9xx_sdvo as the limit. This is pretty bogus and also not
-used since the only output types left are DP and native TV-out which
-both use special pre-tuned dpll values.
-
-v2: Re-add comment for the find_pll callback (requested by Paulo) and
-elaborate on why the transformation is correct for g4x platforms (to
-clarify a review question from Paulo). Double up on that by adding a
-WARN as suggested by Paulo Zanoni on irc.
-
-v3: Initialize limits to NULL since gcc is now unhappy.
-
-v4: v2/3 will blow up with a NULL dereference in ->find_dpll for dp and
-TV-out ports, spotted by Paulo on irc. So just give up on this madness for
-now, and leave this to be fixed in a later patch.
-
-v5: Since the ever-so-slight change for g4x might result in some dpll
-parameter computation failing spuriously where before it didn't for
-ports with preset dpll settings (DP & TV-out) override this. For
-paranoia also do it in the ilk+ code.
-
-Cc: Paulo Zanoni <przanoni@gmail.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit ee9300bb5fa423117585a57c6a158522d2298b4e)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h      |  20 +++++++
- drivers/gpu/drm/i915/intel_display.c | 110 +++++++++++------------------------
- 2 files changed, 53 insertions(+), 77 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 92a0f5e42aca..5297b1fe3a2c 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -306,6 +306,8 @@ struct drm_i915_error_state {
- 
- struct intel_crtc_config;
- struct intel_crtc;
-+struct intel_limit;
-+struct dpll;
- 
- struct drm_i915_display_funcs {
- 	bool (*fbc_enabled)(struct drm_device *dev);
-@@ -313,6 +315,24 @@ struct drm_i915_display_funcs {
- 	void (*disable_fbc)(struct drm_device *dev);
- 	int (*get_display_clock_speed)(struct drm_device *dev);
- 	int (*get_fifo_size)(struct drm_device *dev, int plane);
-+	/**
-+	 * find_dpll() - Find the best values for the PLL
-+	 * @limit: limits for the PLL
-+	 * @crtc: current CRTC
-+	 * @target: target frequency in kHz
-+	 * @refclk: reference clock frequency in kHz
-+	 * @match_clock: if provided, @best_clock P divider must
-+	 *               match the P divider from @match_clock
-+	 *               used for LVDS downclocking
-+	 * @best_clock: best PLL values found
-+	 *
-+	 * Returns true on success, false on failure.
-+	 */
-+	bool (*find_dpll)(const struct intel_limit *limit,
-+			  struct drm_crtc *crtc,
-+			  int target, int refclk,
-+			  struct dpll *match_clock,
-+			  struct dpll *best_clock);
- 	void (*update_wm)(struct drm_device *dev);
- 	void (*update_sprite_wm)(struct drm_device *dev, int pipe,
- 				 uint32_t sprite_width, int pixel_size,
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index c06140cbc6af..e8985a1c1c2c 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -59,24 +59,6 @@ typedef struct intel_limit intel_limit_t;
- struct intel_limit {
- 	intel_range_t   dot, vco, n, m, m1, m2, p, p1;
- 	intel_p2_t	    p2;
--	/**
--	 * find_pll() - Find the best values for the PLL
--	 * @limit: limits for the PLL
--	 * @crtc: current CRTC
--	 * @target: target frequency in kHz
--	 * @refclk: reference clock frequency in kHz
--	 * @match_clock: if provided, @best_clock P divider must
--	 *               match the P divider from @match_clock
--	 *               used for LVDS downclocking
--	 * @best_clock: best PLL values found
--	 *
--	 * Returns true on success, false on failure.
--	 */
--	bool (*find_pll)(const intel_limit_t *limit,
--			 struct drm_crtc *crtc,
--			 int target, int refclk,
--			 intel_clock_t *match_clock,
--			 intel_clock_t *best_clock);
- };
- 
- /* FDI */
-@@ -92,23 +74,6 @@ intel_pch_rawclk(struct drm_device *dev)
- 	return I915_READ(PCH_RAWCLK_FREQ) & RAWCLK_FREQ_MASK;
- }
- 
--static bool
--intel_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
--		    int target, int refclk, intel_clock_t *match_clock,
--		    intel_clock_t *best_clock);
--static bool
--intel_pnv_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
--			int target, int refclk, intel_clock_t *match_clock,
--			intel_clock_t *best_clock);
--static bool
--intel_g4x_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
--			int target, int refclk, intel_clock_t *match_clock,
--			intel_clock_t *best_clock);
--static bool
--intel_vlv_find_best_pll(const intel_limit_t *limit, struct drm_crtc *crtc,
--			int target, int refclk, intel_clock_t *match_clock,
--			intel_clock_t *best_clock);
--
- static inline u32 /* units of 100MHz */
- intel_fdi_link_freq(struct drm_device *dev)
- {
-@@ -130,7 +95,6 @@ static const intel_limit_t intel_limits_i8xx_dvo = {
- 	.p1 = { .min = 2, .max = 33 },
- 	.p2 = { .dot_limit = 165000,
- 		.p2_slow = 4, .p2_fast = 2 },
--	.find_pll = intel_find_best_PLL,
- };
- 
- static const intel_limit_t intel_limits_i8xx_lvds = {
-@@ -144,7 +108,6 @@ static const intel_limit_t intel_limits_i8xx_lvds = {
- 	.p1 = { .min = 1, .max = 6 },
- 	.p2 = { .dot_limit = 165000,
- 		.p2_slow = 14, .p2_fast = 7 },
--	.find_pll = intel_find_best_PLL,
- };
- 
- static const intel_limit_t intel_limits_i9xx_sdvo = {
-@@ -158,7 +121,6 @@ static const intel_limit_t intel_limits_i9xx_sdvo = {
- 	.p1 = { .min = 1, .max = 8 },
- 	.p2 = { .dot_limit = 200000,
- 		.p2_slow = 10, .p2_fast = 5 },
--	.find_pll = intel_find_best_PLL,
- };
- 
- static const intel_limit_t intel_limits_i9xx_lvds = {
-@@ -172,7 +134,6 @@ static const intel_limit_t intel_limits_i9xx_lvds = {
- 	.p1 = { .min = 1, .max = 8 },
- 	.p2 = { .dot_limit = 112000,
- 		.p2_slow = 14, .p2_fast = 7 },
--	.find_pll = intel_find_best_PLL,
- };
- 
- 
-@@ -189,7 +150,6 @@ static const intel_limit_t intel_limits_g4x_sdvo = {
- 		.p2_slow = 10,
- 		.p2_fast = 10
- 	},
--	.find_pll = intel_g4x_find_best_PLL,
- };
- 
- static const intel_limit_t intel_limits_g4x_hdmi = {
-@@ -203,7 +163,6 @@ static const intel_limit_t intel_limits_g4x_hdmi = {
- 	.p1 = { .min = 1, .max = 8},
- 	.p2 = { .dot_limit = 165000,
- 		.p2_slow = 10, .p2_fast = 5 },
--	.find_pll = intel_g4x_find_best_PLL,
- };
- 
- static const intel_limit_t intel_limits_g4x_single_channel_lvds = {
-@@ -218,7 +177,6 @@ static const intel_limit_t intel_limits_g4x_single_channel_lvds = {
- 	.p2 = { .dot_limit = 0,
- 		.p2_slow = 14, .p2_fast = 14
- 	},
--	.find_pll = intel_g4x_find_best_PLL,
- };
- 
- static const intel_limit_t intel_limits_g4x_dual_channel_lvds = {
-@@ -233,7 +191,6 @@ static const intel_limit_t intel_limits_g4x_dual_channel_lvds = {
- 	.p2 = { .dot_limit = 0,
- 		.p2_slow = 7, .p2_fast = 7
- 	},
--	.find_pll = intel_g4x_find_best_PLL,
- };
- 
- static const intel_limit_t intel_limits_pineview_sdvo = {
-@@ -249,7 +206,6 @@ static const intel_limit_t intel_limits_pineview_sdvo = {
- 	.p1 = { .min = 1, .max = 8 },
- 	.p2 = { .dot_limit = 200000,
- 		.p2_slow = 10, .p2_fast = 5 },
--	.find_pll = intel_pnv_find_best_PLL,
- };
- 
- static const intel_limit_t intel_limits_pineview_lvds = {
-@@ -263,7 +219,6 @@ static const intel_limit_t intel_limits_pineview_lvds = {
- 	.p1 = { .min = 1, .max = 8 },
- 	.p2 = { .dot_limit = 112000,
- 		.p2_slow = 14, .p2_fast = 14 },
--	.find_pll = intel_pnv_find_best_PLL,
- };
- 
- /* Ironlake / Sandybridge
-@@ -282,7 +237,6 @@ static const intel_limit_t intel_limits_ironlake_dac = {
- 	.p1 = { .min = 1, .max = 8 },
- 	.p2 = { .dot_limit = 225000,
- 		.p2_slow = 10, .p2_fast = 5 },
--	.find_pll = intel_g4x_find_best_PLL,
- };
- 
- static const intel_limit_t intel_limits_ironlake_single_lvds = {
-@@ -296,7 +250,6 @@ static const intel_limit_t intel_limits_ironlake_single_lvds = {
- 	.p1 = { .min = 2, .max = 8 },
- 	.p2 = { .dot_limit = 225000,
- 		.p2_slow = 14, .p2_fast = 14 },
--	.find_pll = intel_g4x_find_best_PLL,
- };
- 
- static const intel_limit_t intel_limits_ironlake_dual_lvds = {
-@@ -310,7 +263,6 @@ static const intel_limit_t intel_limits_ironlake_dual_lvds = {
- 	.p1 = { .min = 2, .max = 8 },
- 	.p2 = { .dot_limit = 225000,
- 		.p2_slow = 7, .p2_fast = 7 },
--	.find_pll = intel_g4x_find_best_PLL,
- };
- 
- /* LVDS 100mhz refclk limits. */
-@@ -325,7 +277,6 @@ static const intel_limit_t intel_limits_ironlake_single_lvds_100m = {
- 	.p1 = { .min = 2, .max = 8 },
- 	.p2 = { .dot_limit = 225000,
- 		.p2_slow = 14, .p2_fast = 14 },
--	.find_pll = intel_g4x_find_best_PLL,
- };
- 
- static const intel_limit_t intel_limits_ironlake_dual_lvds_100m = {
-@@ -339,7 +290,6 @@ static const intel_limit_t intel_limits_ironlake_dual_lvds_100m = {
- 	.p1 = { .min = 2, .max = 6 },
- 	.p2 = { .dot_limit = 225000,
- 		.p2_slow = 7, .p2_fast = 7 },
--	.find_pll = intel_g4x_find_best_PLL,
- };
- 
- static const intel_limit_t intel_limits_vlv_dac = {
-@@ -353,7 +303,6 @@ static const intel_limit_t intel_limits_vlv_dac = {
- 	.p1 = { .min = 1, .max = 3 },
- 	.p2 = { .dot_limit = 270000,
- 		.p2_slow = 2, .p2_fast = 20 },
--	.find_pll = intel_vlv_find_best_pll,
- };
- 
- static const intel_limit_t intel_limits_vlv_hdmi = {
-@@ -367,7 +316,6 @@ static const intel_limit_t intel_limits_vlv_hdmi = {
- 	.p1 = { .min = 2, .max = 3 },
- 	.p2 = { .dot_limit = 270000,
- 		.p2_slow = 2, .p2_fast = 20 },
--	.find_pll = intel_vlv_find_best_pll,
- };
- 
- static const intel_limit_t intel_limits_vlv_dp = {
-@@ -381,7 +329,6 @@ static const intel_limit_t intel_limits_vlv_dp = {
- 	.p1 = { .min = 1, .max = 3 },
- 	.p2 = { .dot_limit = 270000,
- 		.p2_slow = 2, .p2_fast = 20 },
--	.find_pll = intel_vlv_find_best_pll,
- };
- 
- static const intel_limit_t *intel_ironlake_limit(struct drm_crtc *crtc,
-@@ -537,7 +484,7 @@ static bool intel_PLL_is_valid(struct drm_device *dev,
- }
- 
- static bool
--intel_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
-+i9xx_find_best_dpll(const intel_limit_t *limit, struct drm_crtc *crtc,
- 		    int target, int refclk, intel_clock_t *match_clock,
- 		    intel_clock_t *best_clock)
- {
-@@ -599,9 +546,9 @@ intel_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
- }
- 
- static bool
--intel_pnv_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
--			int target, int refclk, intel_clock_t *match_clock,
--			intel_clock_t *best_clock)
-+pnv_find_best_dpll(const intel_limit_t *limit, struct drm_crtc *crtc,
-+		   int target, int refclk, intel_clock_t *match_clock,
-+		   intel_clock_t *best_clock)
- {
- 	struct drm_device *dev = crtc->dev;
- 	intel_clock_t clock;
-@@ -661,9 +608,9 @@ intel_pnv_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
- }
- 
- static bool
--intel_g4x_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
--			int target, int refclk, intel_clock_t *match_clock,
--			intel_clock_t *best_clock)
-+g4x_find_best_dpll(const intel_limit_t *limit, struct drm_crtc *crtc,
-+		   int target, int refclk, intel_clock_t *match_clock,
-+		   intel_clock_t *best_clock)
- {
- 	struct drm_device *dev = crtc->dev;
- 	intel_clock_t clock;
-@@ -718,9 +665,9 @@ intel_g4x_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
- }
- 
- static bool
--intel_vlv_find_best_pll(const intel_limit_t *limit, struct drm_crtc *crtc,
--			int target, int refclk, intel_clock_t *match_clock,
--			intel_clock_t *best_clock)
-+vlv_find_best_dpll(const intel_limit_t *limit, struct drm_crtc *crtc,
-+		   int target, int refclk, intel_clock_t *match_clock,
-+		   intel_clock_t *best_clock)
- {
- 	u32 p1, p2, m1, m2, vco, bestn, bestm1, bestm2, bestp1, bestp2;
- 	u32 m, n, fastclk;
-@@ -4911,9 +4858,9 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
- 	 * reflck * (5 * (m1 + 2) + (m2 + 2)) / (n + 2) / p1 / p2.
- 	 */
- 	limit = intel_limit(crtc, refclk);
--	ok = limit->find_pll(limit, crtc, adjusted_mode->clock, refclk, NULL,
--			     &clock);
--	if (!ok) {
-+	ok = dev_priv->display.find_dpll(limit, crtc, adjusted_mode->clock,
-+					 refclk, NULL, &clock);
-+	if (!ok && !intel_crtc->config.clock_set) {
- 		DRM_ERROR("Couldn't find PLL settings for mode!\n");
- 		return -EINVAL;
- 	}
-@@ -4928,10 +4875,10 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
- 		 * by using the FP0/FP1. In such case we will disable the LVDS
- 		 * downclock feature.
- 		*/
--		has_reduced_clock = limit->find_pll(limit, crtc,
-+		has_reduced_clock =
-+			dev_priv->display.find_dpll(limit, crtc,
- 						    dev_priv->lvds_downclock,
--						    refclk,
--						    &clock,
-+						    refclk, &clock,
- 						    &reduced_clock);
- 	}
- 	/* Compat-code for transition, will disappear. */
-@@ -5547,8 +5494,8 @@ static bool ironlake_compute_clocks(struct drm_crtc *crtc,
- 	 * reflck * (5 * (m1 + 2) + (m2 + 2)) / (n + 2) / p1 / p2.
- 	 */
- 	limit = intel_limit(crtc, refclk);
--	ret = limit->find_pll(limit, crtc, adjusted_mode->clock, refclk, NULL,
--			      clock);
-+	ret = dev_priv->display.find_dpll(limit, crtc, adjusted_mode->clock,
-+					  refclk, NULL, clock);
- 	if (!ret)
- 		return false;
- 
-@@ -5559,11 +5506,11 @@ static bool ironlake_compute_clocks(struct drm_crtc *crtc,
- 		 * by using the FP0/FP1. In such case we will disable the LVDS
- 		 * downclock feature.
- 		*/
--		*has_reduced_clock = limit->find_pll(limit, crtc,
--						     dev_priv->lvds_downclock,
--						     refclk,
--						     clock,
--						     reduced_clock);
-+		*has_reduced_clock =
-+			dev_priv->display.find_dpll(limit, crtc,
-+						    dev_priv->lvds_downclock,
-+						    refclk, clock,
-+						    reduced_clock);
- 	}
- 
- 	return true;
-@@ -5749,7 +5696,7 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
- 
- 	ok = ironlake_compute_clocks(crtc, adjusted_mode, &clock,
- 				     &has_reduced_clock, &reduced_clock);
--	if (!ok) {
-+	if (!ok && !intel_crtc->config.clock_set) {
- 		DRM_ERROR("Couldn't find PLL settings for mode!\n");
- 		return -EINVAL;
- 	}
-@@ -9104,6 +9051,15 @@ static void intel_init_display(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 
-+	if (HAS_PCH_SPLIT(dev) || IS_G4X(dev))
-+		dev_priv->display.find_dpll = g4x_find_best_dpll;
-+	else if (IS_VALLEYVIEW(dev))
-+		dev_priv->display.find_dpll = vlv_find_best_dpll;
-+	else if (IS_PINEVIEW(dev))
-+		dev_priv->display.find_dpll = pnv_find_best_dpll;
-+	else
-+		dev_priv->display.find_dpll = i9xx_find_best_dpll;
-+
- 	if (HAS_DDI(dev)) {
- 		dev_priv->display.get_pipe_config = haswell_get_pipe_config;
- 		dev_priv->display.crtc_mode_set = haswell_crtc_mode_set;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0253-drm-i915-fold-in-IS_PNV-checks-from-the-split-up-fin.patch b/patches.baytrail/0253-drm-i915-fold-in-IS_PNV-checks-from-the-split-up-fin.patch
deleted file mode 100644
index 33de78349e325..0000000000000
--- a/patches.baytrail/0253-drm-i915-fold-in-IS_PNV-checks-from-the-split-up-fin.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From 647c2f946258fb511afae73b127da61cac81e749 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Mon, 3 Jun 2013 20:56:24 +0200
-Subject: drm/i915: fold in IS_PNV checks from the split up find_dpll functions
-
-Since I stand by my rule that splitting functions should only do an
-exact copy, this is a follow-up patch.
-
-Suggested-by: Paulo Zanoni <przanoni@gmail.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit c0efc387a8893470c1744e775e214c069bd2465e)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 6 +-----
- 1 file changed, 1 insertion(+), 5 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index e8985a1c1c2c..d23f4e1c977b 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -515,8 +515,7 @@ i9xx_find_best_dpll(const intel_limit_t *limit, struct drm_crtc *crtc,
- 	     clock.m1++) {
- 		for (clock.m2 = limit->m2.min;
- 		     clock.m2 <= limit->m2.max; clock.m2++) {
--			/* m1 is always 0 in Pineview */
--			if (clock.m2 >= clock.m1 && !IS_PINEVIEW(dev))
-+			if (clock.m2 >= clock.m1)
- 				break;
- 			for (clock.n = limit->n.min;
- 			     clock.n <= limit->n.max; clock.n++) {
-@@ -577,9 +576,6 @@ pnv_find_best_dpll(const intel_limit_t *limit, struct drm_crtc *crtc,
- 	     clock.m1++) {
- 		for (clock.m2 = limit->m2.min;
- 		     clock.m2 <= limit->m2.max; clock.m2++) {
--			/* m1 is always 0 in Pineview */
--			if (clock.m2 >= clock.m1 && !IS_PINEVIEW(dev))
--				break;
- 			for (clock.n = limit->n.min;
- 			     clock.n <= limit->n.max; clock.n++) {
- 				for (clock.p1 = limit->p1.min;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0254-drm-i915-clear-up-the-fdi-dotclock-semantics-for-M-N.patch b/patches.baytrail/0254-drm-i915-clear-up-the-fdi-dotclock-semantics-for-M-N.patch
deleted file mode 100644
index 595deae5f6532..0000000000000
--- a/patches.baytrail/0254-drm-i915-clear-up-the-fdi-dotclock-semantics-for-M-N.patch
+++ /dev/null
@@ -1,78 +0,0 @@
-From 77043cf0368a0f6a671f48bfff89b71bfdbc6368 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Sat, 1 Jun 2013 17:16:19 +0200
-Subject: drm/i915: clear up the fdi dotclock semantics for M/N computation
-
-We currently mutliply the link_bw of the fdi link with the pixel
-multiplier, which is wrong: The FDI link doesn't suddenly grow more
-bandwidth. In reality the pixel mutliplication only happens in the PCH,
-before the pixels are fed into the port.
-
-But since we our code treats the uses the target clock after pixels
-are doubled (tripled, ...) already, we need to correct this.
-
-Semantically it's clearer to divide the target clock to get the fdi
-dotclock instead of multiplying the bw, so do that instead.
-
-Note that the target clock is already multiplied by the same factor,
-so the division will never loose accuracy for the M/N computation.
-
-The lane computation otoh used the wrong value, we also need to feed
-the fdi dotclock to that.
-
-Split out on a request from Paulo Zanoni.
-
-v2: Also fix the lane computation, it used the target clock to compute
-the bw requirements, not the fdi dotclock (i.e. adjusted with the
-pixel multiplier). Since sdvo only uses the pixel multiplier for
-low-res modes (with a dotclock below 100MHz) we wouldn't ever have
-rejected a bogus mode, but just used an inefficient fdi config.
-
-v3: Amend the commit message to explain better what the change for the
-fdi lane config computation is all about. Requested by Paulo.
-
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 2bd89a07db684573d2fce0d5148103c3dcfb0873)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 12 +++++++-----
- 1 file changed, 7 insertions(+), 5 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index d23f4e1c977b..f80612174e6a 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -3985,7 +3985,7 @@ static int ironlake_fdi_compute_config(struct intel_crtc *intel_crtc,
- {
- 	struct drm_device *dev = intel_crtc->base.dev;
- 	struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
--	int target_clock, lane, link_bw;
-+	int target_clock, lane, link_bw, fdi_dotclock;
- 	bool setup_ok, needs_recompute = false;
- 
- retry:
-@@ -4003,14 +4003,16 @@ retry:
- 	else
- 		target_clock = adjusted_mode->clock;
- 
--	lane = ironlake_get_lanes_required(target_clock, link_bw,
-+	fdi_dotclock = target_clock;
-+	if (pipe_config->pixel_multiplier > 1)
-+		fdi_dotclock /= pipe_config->pixel_multiplier;
-+
-+	lane = ironlake_get_lanes_required(fdi_dotclock, link_bw,
- 					   pipe_config->pipe_bpp);
- 
- 	pipe_config->fdi_lanes = lane;
- 
--	if (pipe_config->pixel_multiplier > 1)
--		link_bw *= pipe_config->pixel_multiplier;
--	intel_link_compute_m_n(pipe_config->pipe_bpp, lane, target_clock,
-+	intel_link_compute_m_n(pipe_config->pipe_bpp, lane, fdi_dotclock,
- 			       link_bw, &pipe_config->fdi_m_n);
- 
- 	setup_ok = ironlake_check_fdi_lanes(intel_crtc->base.dev,
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0255-drm-i915-refactor-cpu-eDP-PLL-handling-a-bit.patch b/patches.baytrail/0255-drm-i915-refactor-cpu-eDP-PLL-handling-a-bit.patch
deleted file mode 100644
index 5bc65ece82253..0000000000000
--- a/patches.baytrail/0255-drm-i915-refactor-cpu-eDP-PLL-handling-a-bit.patch
+++ /dev/null
@@ -1,121 +0,0 @@
-From a402f14410640278ac0b33f7ccca207abee52e5c Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Sat, 1 Jun 2013 17:16:20 +0200
-Subject: drm/i915: refactor cpu eDP PLL handling a bit
-
-This prepares a bit for the next big patch, where we switch the
-semantics of the different clocks in the pipe config around.
-
-Since I've broken cpu eDP PLL handling in the first version I've
-figured some refactoring is in order.
-
-Split out on request from Paulo Zanoni.
-
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 7c62a164faea430c6e4c411eb0870640cf51a6e5)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_dp.c | 38 ++++++++++++++------------------------
- 1 file changed, 14 insertions(+), 24 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
-index be862039eeab..046d539d8746 100644
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -800,24 +800,29 @@ void intel_dp_init_link_config(struct intel_dp *intel_dp)
- 	}
- }
- 
--static void ironlake_set_pll_edp(struct drm_crtc *crtc, int clock)
-+static void ironlake_set_pll_cpu_edp(struct intel_dp *intel_dp)
- {
--	struct drm_device *dev = crtc->dev;
-+	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
-+	struct intel_crtc *crtc = to_intel_crtc(dig_port->base.base.crtc);
-+	struct drm_device *dev = crtc->base.dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	u32 dpa_ctl;
- 
--	DRM_DEBUG_KMS("eDP PLL enable for clock %d\n", clock);
-+	DRM_DEBUG_KMS("eDP PLL enable for clock %d\n",
-+		      crtc->config.adjusted_mode.clock);
- 	dpa_ctl = I915_READ(DP_A);
- 	dpa_ctl &= ~DP_PLL_FREQ_MASK;
- 
--	if (clock < 200000) {
-+	if (crtc->config.adjusted_mode.clock == 162000) {
- 		/* For a long time we've carried around a ILK-DevA w/a for the
- 		 * 160MHz clock. If we're really unlucky, it's still required.
- 		 */
- 		DRM_DEBUG_KMS("160MHz cpu eDP clock, might need ilk devA w/a\n");
- 		dpa_ctl |= DP_PLL_FREQ_160MHZ;
-+		intel_dp->DP |= DP_PLL_FREQ_160MHZ;
- 	} else {
- 		dpa_ctl |= DP_PLL_FREQ_270MHZ;
-+		intel_dp->DP |= DP_PLL_FREQ_270MHZ;
- 	}
- 
- 	I915_WRITE(DP_A, dpa_ctl);
-@@ -834,8 +839,7 @@ intel_dp_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
- 	enum port port = dp_to_dig_port(intel_dp)->port;
--	struct drm_crtc *crtc = encoder->crtc;
--	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
-+	struct intel_crtc *crtc = to_intel_crtc(encoder->crtc);
- 
- 	/*
- 	 * There are four kinds of DP registers:
-@@ -865,7 +869,7 @@ intel_dp_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
- 
- 	if (intel_dp->has_audio) {
- 		DRM_DEBUG_DRIVER("Enabling DP audio on pipe %c\n",
--				 pipe_name(intel_crtc->pipe));
-+				 pipe_name(crtc->pipe));
- 		intel_dp->DP |= DP_AUDIO_OUTPUT_ENABLE;
- 		intel_write_eld(encoder, adjusted_mode);
- 	}
-@@ -884,13 +888,7 @@ intel_dp_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
- 		if (intel_dp->link_configuration[1] & DP_LANE_COUNT_ENHANCED_FRAME_EN)
- 			intel_dp->DP |= DP_ENHANCED_FRAMING;
- 
--		intel_dp->DP |= intel_crtc->pipe << 29;
--
--		/* don't miss out required setting for eDP */
--		if (adjusted_mode->clock < 200000)
--			intel_dp->DP |= DP_PLL_FREQ_160MHZ;
--		else
--			intel_dp->DP |= DP_PLL_FREQ_270MHZ;
-+		intel_dp->DP |= crtc->pipe << 29;
- 	} else if (!HAS_PCH_CPT(dev) || port == PORT_A) {
- 		if (!HAS_PCH_SPLIT(dev) && !IS_VALLEYVIEW(dev))
- 			intel_dp->DP |= intel_dp->color_range;
-@@ -904,22 +902,14 @@ intel_dp_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
- 		if (intel_dp->link_configuration[1] & DP_LANE_COUNT_ENHANCED_FRAME_EN)
- 			intel_dp->DP |= DP_ENHANCED_FRAMING;
- 
--		if (intel_crtc->pipe == 1)
-+		if (crtc->pipe == 1)
- 			intel_dp->DP |= DP_PIPEB_SELECT;
--
--		if (port == PORT_A && !IS_VALLEYVIEW(dev)) {
--			/* don't miss out required setting for eDP */
--			if (adjusted_mode->clock < 200000)
--				intel_dp->DP |= DP_PLL_FREQ_160MHZ;
--			else
--				intel_dp->DP |= DP_PLL_FREQ_270MHZ;
--		}
- 	} else {
- 		intel_dp->DP |= DP_LINK_TRAIN_OFF_CPT;
- 	}
- 
- 	if (port == PORT_A && !IS_VALLEYVIEW(dev))
--		ironlake_set_pll_edp(crtc, adjusted_mode->clock);
-+		ironlake_set_pll_cpu_edp(intel_dp);
- }
- 
- #define IDLE_ON_MASK		(PP_ON | 0 	  | PP_SEQUENCE_MASK | 0                     | PP_SEQUENCE_STATE_MASK)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0256-drm-i915-store-adjusted-dotclock-in-adjusted_mode-cl.patch b/patches.baytrail/0256-drm-i915-store-adjusted-dotclock-in-adjusted_mode-cl.patch
deleted file mode 100644
index a2cac6c7730fb..0000000000000
--- a/patches.baytrail/0256-drm-i915-store-adjusted-dotclock-in-adjusted_mode-cl.patch
+++ /dev/null
@@ -1,329 +0,0 @@
-From 5ee0a522bd68f6962bfa73f61de6cc8db3140ebd Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Sat, 1 Jun 2013 17:16:21 +0200
-Subject: drm/i915: store adjusted dotclock in adjusted_mode->clock
-
-... not the port clock. This allows us to kill the funny semantics
-around pixel_target_clock.
-
-Since the dpll code still needs the real port clock, add a new
-port_clock field to the pipe configuration. Handling the default case
-for that one is a bit tricky, since encoders might not consistently
-overwrite it when retrying the crtc/encoder bw arbitrage step in the
-compute config stage. Hence we need to always clear port_clock and
-update it again if the encoder hasn't put in something more specific.
-This can't be done in one step since the encoder might want to adjust
-the mode first.
-
-I was a bit on the fence whether I should subsume the pixel multiplier
-handling into the port_clock, too. But then I decided against this
-since it's on an abstract level still the dotclock of the adjusted
-mode, and only our hw makes it a bit special due to the separate pixel
-mulitplier setting (which requires that the dpll runs at the
-non-multiplied dotclock).
-
-So after this patch the adjusted_mode accurately describes the mode we
-feed into the port, after the panel fitter and pixel multiplier (or
-line doubling, if we ever bother with that) have done their job.
-Since the fdi link is between the pfit and the pixel multiplier steps
-we need to be careful with calculating the fdi link config.
-
-v2: Fix up ilk cpu pll handling.
-
-v3: Introduce an fdi_dotclock variable in ironlake_fdi_compute_config
-to make it clearer that we transmit the adjusted_mode without the
-pixel multiplier taken into account. The old code multiplied the the
-available link bw with the pixel multiplier, which results in the same
-fdi configuration, but is much more confusing.
-
-v4: Rebase on top of Imre's is_cpu_edp removal.
-
-v5: Rebase on top of Paulo's haswell watermark fixes, which introduce
-a new place which looked at the pixel_clock and so needed conversion.
-
-v6: Split out prep patches as requested by Paulo Zanoni. Also rebase
-on top of the fdi dotclock handling fix in the fdi lanes/bw
-computation code.
-
-Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> (v3)
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> (v6)
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit ff9a6750aca3553c78385a9aa89b678b2b9be7df)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_ddi.c     |  3 ++-
- drivers/gpu/drm/i915/intel_display.c | 32 +++++++++++++++++---------------
- drivers/gpu/drm/i915/intel_dp.c      | 18 +++++++-----------
- drivers/gpu/drm/i915/intel_drv.h     | 13 +++++++------
- drivers/gpu/drm/i915/intel_hdmi.c    |  4 +---
- drivers/gpu/drm/i915/intel_pm.c      |  5 +----
- 6 files changed, 35 insertions(+), 40 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
-index 74b372dc14a4..fc31ffa497eb 100644
---- a/drivers/gpu/drm/i915/intel_ddi.c
-+++ b/drivers/gpu/drm/i915/intel_ddi.c
-@@ -624,7 +624,7 @@ intel_ddi_calculate_wrpll(int clock /* in Hz */,
- 		      clock, *p_out, *n2_out, *r2_out);
- }
- 
--bool intel_ddi_pll_mode_set(struct drm_crtc *crtc, int clock)
-+bool intel_ddi_pll_mode_set(struct drm_crtc *crtc)
- {
- 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
- 	struct intel_encoder *intel_encoder = intel_ddi_get_crtc_encoder(crtc);
-@@ -634,6 +634,7 @@ bool intel_ddi_pll_mode_set(struct drm_crtc *crtc, int clock)
- 	int type = intel_encoder->type;
- 	enum pipe pipe = intel_crtc->pipe;
- 	uint32_t reg, val;
-+	int clock = intel_crtc->config.port_clock;
- 
- 	/* TODO: reuse PLLs when possible (compare values) */
- 
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index f80612174e6a..6d0f8f6ba4d2 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -3985,7 +3985,7 @@ static int ironlake_fdi_compute_config(struct intel_crtc *intel_crtc,
- {
- 	struct drm_device *dev = intel_crtc->base.dev;
- 	struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
--	int target_clock, lane, link_bw, fdi_dotclock;
-+	int lane, link_bw, fdi_dotclock;
- 	bool setup_ok, needs_recompute = false;
- 
- retry:
-@@ -3998,12 +3998,7 @@ retry:
- 	 */
- 	link_bw = intel_fdi_link_freq(dev) * MHz(100)/KHz(1)/10;
- 
--	if (pipe_config->pixel_target_clock)
--		target_clock = pipe_config->pixel_target_clock;
--	else
--		target_clock = adjusted_mode->clock;
--
--	fdi_dotclock = target_clock;
-+	fdi_dotclock = adjusted_mode->clock;
- 	if (pipe_config->pixel_multiplier > 1)
- 		fdi_dotclock /= pipe_config->pixel_multiplier;
- 
-@@ -4353,8 +4348,6 @@ static void vlv_update_pll(struct intel_crtc *crtc)
- {
- 	struct drm_device *dev = crtc->base.dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
--	struct drm_display_mode *adjusted_mode =
--		&crtc->config.adjusted_mode;
- 	struct intel_encoder *encoder;
- 	int pipe = crtc->pipe;
- 	u32 dpll, mdiv;
-@@ -4407,7 +4400,7 @@ static void vlv_update_pll(struct intel_crtc *crtc)
- 	vlv_dpio_write(dev_priv, DPIO_DIV(pipe), mdiv);
- 
- 	/* Set HBR and RBR LPF coefficients */
--	if (adjusted_mode->clock == 162000 ||
-+	if (crtc->config.port_clock == 162000 ||
- 	    intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_HDMI))
- 		vlv_dpio_write(dev_priv, DPIO_LFP_COEFF(pipe),
- 				 0x005f0021);
-@@ -4856,7 +4849,8 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
- 	 * reflck * (5 * (m1 + 2) + (m2 + 2)) / (n + 2) / p1 / p2.
- 	 */
- 	limit = intel_limit(crtc, refclk);
--	ok = dev_priv->display.find_dpll(limit, crtc, adjusted_mode->clock,
-+	ok = dev_priv->display.find_dpll(limit, crtc,
-+					 intel_crtc->config.port_clock,
- 					 refclk, NULL, &clock);
- 	if (!ok && !intel_crtc->config.clock_set) {
- 		DRM_ERROR("Couldn't find PLL settings for mode!\n");
-@@ -5464,7 +5458,6 @@ static void haswell_set_pipeconf(struct drm_crtc *crtc)
- }
- 
- static bool ironlake_compute_clocks(struct drm_crtc *crtc,
--				    struct drm_display_mode *adjusted_mode,
- 				    intel_clock_t *clock,
- 				    bool *has_reduced_clock,
- 				    intel_clock_t *reduced_clock)
-@@ -5492,7 +5485,8 @@ static bool ironlake_compute_clocks(struct drm_crtc *crtc,
- 	 * reflck * (5 * (m1 + 2) + (m2 + 2)) / (n + 2) / p1 / p2.
- 	 */
- 	limit = intel_limit(crtc, refclk);
--	ret = dev_priv->display.find_dpll(limit, crtc, adjusted_mode->clock,
-+	ret = dev_priv->display.find_dpll(limit, crtc,
-+					  to_intel_crtc(crtc)->config.port_clock,
- 					  refclk, NULL, clock);
- 	if (!ret)
- 		return false;
-@@ -5692,7 +5686,7 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
- 	WARN(!(HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev)),
- 	     "Unexpected PCH type %d\n", INTEL_PCH_TYPE(dev));
- 
--	ok = ironlake_compute_clocks(crtc, adjusted_mode, &clock,
-+	ok = ironlake_compute_clocks(crtc, &clock,
- 				     &has_reduced_clock, &reduced_clock);
- 	if (!ok && !intel_crtc->config.clock_set) {
- 		DRM_ERROR("Couldn't find PLL settings for mode!\n");
-@@ -5895,7 +5889,7 @@ static int haswell_crtc_mode_set(struct drm_crtc *crtc,
- 	WARN(num_connectors != 1, "%d connectors attached to pipe %c\n",
- 	     num_connectors, pipe_name(pipe));
- 
--	if (!intel_ddi_pll_mode_set(crtc, adjusted_mode->clock))
-+	if (!intel_ddi_pll_mode_set(crtc))
- 		return -EINVAL;
- 
- 	/* Ensure that the cursor is valid for the new mode before changing... */
-@@ -7809,6 +7803,9 @@ intel_modeset_pipe_config(struct drm_crtc *crtc,
- 		goto fail;
- 
- encoder_retry:
-+	/* Ensure the port clock default is reset when retrying. */
-+	pipe_config->port_clock = 0;
-+
- 	/* Pass our mode to the connectors and the CRTC to give them a chance to
- 	 * adjust it according to limitations or connector properties, and also
- 	 * a chance to reject the mode entirely.
-@@ -7837,6 +7834,11 @@ encoder_retry:
- 		}
- 	}
- 
-+	/* Set default port clock if not overwritten by the encoder. Needs to be
-+	 * done afterwards in case the encoder adjusts the mode. */
-+	if (!pipe_config->port_clock)
-+		pipe_config->port_clock = pipe_config->adjusted_mode.clock;
-+
- 	ret = intel_crtc_compute_config(crtc, pipe_config);
- 	if (ret < 0) {
- 		DRM_DEBUG_KMS("CRTC fixup failed\n");
-diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
-index 046d539d8746..8d11dfa9a169 100644
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -688,7 +688,7 @@ intel_dp_compute_config(struct intel_encoder *encoder,
- 	int max_clock = intel_dp_max_link_bw(intel_dp) == DP_LINK_BW_2_7 ? 1 : 0;
- 	int bpp, mode_rate;
- 	static int bws[2] = { DP_LINK_BW_1_62, DP_LINK_BW_2_7 };
--	int target_clock, link_avail, link_clock;
-+	int link_avail, link_clock;
- 
- 	if (HAS_PCH_SPLIT(dev) && !HAS_DDI(dev) && port != PORT_A)
- 		pipe_config->has_pch_encoder = true;
-@@ -705,8 +705,6 @@ intel_dp_compute_config(struct intel_encoder *encoder,
- 			intel_pch_panel_fitting(intel_crtc, pipe_config,
- 						intel_connector->panel.fitting_mode);
- 	}
--	/* We need to take the panel's fixed mode into account. */
--	target_clock = adjusted_mode->clock;
- 
- 	if (adjusted_mode->flags & DRM_MODE_FLAG_DBLCLK)
- 		return false;
-@@ -731,7 +729,7 @@ intel_dp_compute_config(struct intel_encoder *encoder,
- 	}
- 
- 	for (; bpp >= 6*3; bpp -= 2*3) {
--		mode_rate = intel_dp_link_required(target_clock, bpp);
-+		mode_rate = intel_dp_link_required(adjusted_mode->clock, bpp);
- 
- 		for (clock = 0; clock <= max_clock; clock++) {
- 			for (lane_count = 1; lane_count <= max_lane_count; lane_count <<= 1) {
-@@ -766,18 +764,17 @@ found:
- 
- 	intel_dp->link_bw = bws[clock];
- 	intel_dp->lane_count = lane_count;
--	adjusted_mode->clock = drm_dp_bw_code_to_link_rate(intel_dp->link_bw);
- 	pipe_config->pipe_bpp = bpp;
--	pipe_config->pixel_target_clock = target_clock;
-+	pipe_config->port_clock = drm_dp_bw_code_to_link_rate(intel_dp->link_bw);
- 
- 	DRM_DEBUG_KMS("DP link bw %02x lane count %d clock %d bpp %d\n",
- 		      intel_dp->link_bw, intel_dp->lane_count,
--		      adjusted_mode->clock, bpp);
-+		      pipe_config->port_clock, bpp);
- 	DRM_DEBUG_KMS("DP link bw required %i available %i\n",
- 		      mode_rate, link_avail);
- 
- 	intel_link_compute_m_n(bpp, lane_count,
--			       target_clock, adjusted_mode->clock,
-+			       adjusted_mode->clock, pipe_config->port_clock,
- 			       &pipe_config->dp_m_n);
- 
- 	intel_dp_set_clock(encoder, pipe_config, intel_dp->link_bw);
-@@ -808,12 +805,11 @@ static void ironlake_set_pll_cpu_edp(struct intel_dp *intel_dp)
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	u32 dpa_ctl;
- 
--	DRM_DEBUG_KMS("eDP PLL enable for clock %d\n",
--		      crtc->config.adjusted_mode.clock);
-+	DRM_DEBUG_KMS("eDP PLL enable for clock %d\n", crtc->config.port_clock);
- 	dpa_ctl = I915_READ(DP_A);
- 	dpa_ctl &= ~DP_PLL_FREQ_MASK;
- 
--	if (crtc->config.adjusted_mode.clock == 162000) {
-+	if (crtc->config.port_clock == 162000) {
- 		/* For a long time we've carried around a ILK-DevA w/a for the
- 		 * 160MHz clock. If we're really unlucky, it's still required.
- 		 */
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index b81cc4512c0a..b0b5ea70af18 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -243,12 +243,13 @@ struct intel_crtc_config {
- 
- 	int pipe_bpp;
- 	struct intel_link_m_n dp_m_n;
--	/**
--	 * This is currently used by DP and HDMI encoders since those can have a
--	 * target pixel clock != the port link clock (which is currently stored
--	 * in adjusted_mode->clock).
-+
-+	/*
-+	 * Frequence the dpll for the port should run at. Differs from the
-+	 * adjusted dotclock e.g. for DP or 12bpc hdmi mode.
- 	 */
--	int pixel_target_clock;
-+	int port_clock;
-+
- 	/* Used by SDVO (and if we ever fix it, HDMI). */
- 	unsigned pixel_multiplier;
- 
-@@ -786,7 +787,7 @@ extern void intel_ddi_disable_transcoder_func(struct drm_i915_private *dev_priv,
- extern void intel_ddi_enable_pipe_clock(struct intel_crtc *intel_crtc);
- extern void intel_ddi_disable_pipe_clock(struct intel_crtc *intel_crtc);
- extern void intel_ddi_setup_hw_pll_state(struct drm_device *dev);
--extern bool intel_ddi_pll_mode_set(struct drm_crtc *crtc, int clock);
-+extern bool intel_ddi_pll_mode_set(struct drm_crtc *crtc);
- extern void intel_ddi_put_crtc_pll(struct drm_crtc *crtc);
- extern void intel_ddi_set_pipe_settings(struct drm_crtc *crtc);
- extern void intel_ddi_prepare_link_retrain(struct drm_encoder *encoder);
-diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
-index 8062a92e6e80..bc12518a21b4 100644
---- a/drivers/gpu/drm/i915/intel_hdmi.c
-+++ b/drivers/gpu/drm/i915/intel_hdmi.c
-@@ -835,9 +835,7 @@ bool intel_hdmi_compute_config(struct intel_encoder *encoder,
- 		desired_bpp = 12*3;
- 
- 		/* Need to adjust the port link by 1.5x for 12bpc. */
--		adjusted_mode->clock = clock_12bpc;
--		pipe_config->pixel_target_clock =
--			pipe_config->requested_mode.clock;
-+		pipe_config->port_clock = clock_12bpc;
- 	} else {
- 		DRM_DEBUG_KMS("picking bpc to 8 for HDMI output\n");
- 		desired_bpp = 8*3;
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 8af5c12e944d..a6b1f22d9848 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2078,10 +2078,7 @@ static uint32_t hsw_wm_get_pixel_rate(struct drm_device *dev,
- 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
- 	uint32_t pixel_rate, pfit_size;
- 
--	if (intel_crtc->config.pixel_target_clock)
--		pixel_rate = intel_crtc->config.pixel_target_clock;
--	else
--		pixel_rate = intel_crtc->config.adjusted_mode.clock;
-+	pixel_rate = intel_crtc->config.adjusted_mode.clock;
- 
- 	/* We only use IF-ID interlacing. If we ever use PF-ID we'll need to
- 	 * adjust the pixel_rate here. */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0257-drm-i915-Drop-some-no-longer-required-mode-adjusted_.patch b/patches.baytrail/0257-drm-i915-Drop-some-no-longer-required-mode-adjusted_.patch
deleted file mode 100644
index 4f945a954f3e5..0000000000000
--- a/patches.baytrail/0257-drm-i915-Drop-some-no-longer-required-mode-adjusted_.patch
+++ /dev/null
@@ -1,120 +0,0 @@
-From ddbf1b18e2955eaef330c527bc8bae4143186468 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Sat, 1 Jun 2013 17:16:22 +0200
-Subject: drm/i915: Drop some no longer required mode/adjusted_mode parameters
-
-We can get at this easily through intel_crtc->config now.
-
-v2: Drop more stuff gcc spotted.
-
-v3: Drop even more stuff gcc spotted.
-
-v4: Yet more ...
-
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 8a654f3b743d0f645848f5fde5059f31a78260bf)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 24 ++++++++----------------
- 1 file changed, 8 insertions(+), 16 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 6d0f8f6ba4d2..ca0da5e3e5e5 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -4573,7 +4573,6 @@ static void i9xx_update_pll(struct intel_crtc *crtc,
- }
- 
- static void i8xx_update_pll(struct intel_crtc *crtc,
--			    struct drm_display_mode *adjusted_mode,
- 			    intel_clock_t *reduced_clock,
- 			    int num_connectors)
- {
-@@ -4628,14 +4627,15 @@ static void i8xx_update_pll(struct intel_crtc *crtc,
- 	I915_WRITE(DPLL(pipe), dpll);
- }
- 
--static void intel_set_pipe_timings(struct intel_crtc *intel_crtc,
--				   struct drm_display_mode *mode,
--				   struct drm_display_mode *adjusted_mode)
-+static void intel_set_pipe_timings(struct intel_crtc *intel_crtc)
- {
- 	struct drm_device *dev = intel_crtc->base.dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	enum pipe pipe = intel_crtc->pipe;
- 	enum transcoder cpu_transcoder = intel_crtc->config.cpu_transcoder;
-+	struct drm_display_mode *adjusted_mode =
-+		&intel_crtc->config.adjusted_mode;
-+	struct drm_display_mode *mode = &intel_crtc->config.requested_mode;
- 	uint32_t vsyncshift, crtc_vtotal, crtc_vblank_end;
- 
- 	/* We need to be careful not to changed the adjusted mode, for otherwise
-@@ -4817,8 +4817,6 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
- 	struct drm_device *dev = crtc->dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
--	struct drm_display_mode *adjusted_mode =
--		&intel_crtc->config.adjusted_mode;
- 	struct drm_display_mode *mode = &intel_crtc->config.requested_mode;
- 	int pipe = intel_crtc->pipe;
- 	int plane = intel_crtc->plane;
-@@ -4883,7 +4881,7 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
- 	}
- 
- 	if (IS_GEN2(dev))
--		i8xx_update_pll(intel_crtc, adjusted_mode,
-+		i8xx_update_pll(intel_crtc,
- 				has_reduced_clock ? &reduced_clock : NULL,
- 				num_connectors);
- 	else if (IS_VALLEYVIEW(dev))
-@@ -4903,7 +4901,7 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
- 			dspcntr |= DISPPLANE_SEL_PIPE_B;
- 	}
- 
--	intel_set_pipe_timings(intel_crtc, mode, adjusted_mode);
-+	intel_set_pipe_timings(intel_crtc);
- 
- 	/* pipesrc and dspsize control the size that is scaled from,
- 	 * which should always be the user's requested size.
-@@ -5660,9 +5658,6 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
- 	struct drm_device *dev = crtc->dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
--	struct drm_display_mode *adjusted_mode =
--		&intel_crtc->config.adjusted_mode;
--	struct drm_display_mode *mode = &intel_crtc->config.requested_mode;
- 	int pipe = intel_crtc->pipe;
- 	int plane = intel_crtc->plane;
- 	int num_connectors = 0;
-@@ -5757,7 +5752,7 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
- 		}
- 	}
- 
--	intel_set_pipe_timings(intel_crtc, mode, adjusted_mode);
-+	intel_set_pipe_timings(intel_crtc);
- 
- 	if (intel_crtc->config.has_pch_encoder) {
- 		intel_cpu_transcoder_set_m_n(intel_crtc,
-@@ -5865,9 +5860,6 @@ static int haswell_crtc_mode_set(struct drm_crtc *crtc,
- 	struct drm_device *dev = crtc->dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
--	struct drm_display_mode *adjusted_mode =
--		&intel_crtc->config.adjusted_mode;
--	struct drm_display_mode *mode = &intel_crtc->config.requested_mode;
- 	int pipe = intel_crtc->pipe;
- 	int plane = intel_crtc->plane;
- 	int num_connectors = 0;
-@@ -5900,7 +5892,7 @@ static int haswell_crtc_mode_set(struct drm_crtc *crtc,
- 
- 	intel_crtc->lowfreq_avail = false;
- 
--	intel_set_pipe_timings(intel_crtc, mode, adjusted_mode);
-+	intel_set_pipe_timings(intel_crtc);
- 
- 	if (intel_crtc->config.has_pch_encoder) {
- 		intel_cpu_transcoder_set_m_n(intel_crtc,
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0258-drm-i915-check-for-strange-pfit-pipe-assignemnt-on-i.patch b/patches.baytrail/0258-drm-i915-check-for-strange-pfit-pipe-assignemnt-on-i.patch
deleted file mode 100644
index 9095baf796a38..0000000000000
--- a/patches.baytrail/0258-drm-i915-check-for-strange-pfit-pipe-assignemnt-on-i.patch
+++ /dev/null
@@ -1,50 +0,0 @@
-From 4904237024bbd124a13e54ee5131f021f61cf58b Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Sat, 1 Jun 2013 17:16:23 +0200
-Subject: drm/i915: check for strange pfit pipe assignemnt on ivb/hsw
-
-Panel fitters on ivb/hsw are not created equal since not all of them
-support the new high-quality upscaling mode. To offset this the hw
-allows us to freely assign the pfits to pipes.
-
-Since our code currently doesn't support this we might fall over when
-taking over firmware state. So check for this case and WARN about it.
-We can then improve the code once we've hit this in the wild. Or once
-we decide to support the improved upscale modes, though that requires
-global arbitrage of modeset resources across crtcs.
-
-v2: Check for IS_GEN7 instead of IS_IVB || IS_HSW as suggested by
-Paulo in his review comment.
-
-Suggested-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Cc: Mika Kuoppala <mika.kuoppala@intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit cb8b2a30b32cde5ac9053d399d084c487598976a)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 8 ++++++++
- 1 file changed, 8 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index ca0da5e3e5e5..83864bda87ac 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -5803,6 +5803,14 @@ static void ironlake_get_pfit_config(struct intel_crtc *crtc,
- 	if (tmp & PF_ENABLE) {
- 		pipe_config->pch_pfit.pos = I915_READ(PF_WIN_POS(crtc->pipe));
- 		pipe_config->pch_pfit.size = I915_READ(PF_WIN_SZ(crtc->pipe));
-+
-+		/* We currently do not free assignements of panel fitters on
-+		 * ivb/hsw (since we don't use the higher upscaling modes which
-+		 * differentiates them) so just WARN about this case for now. */
-+		if (IS_GEN7(dev)) {
-+			WARN_ON((tmp & PF_PIPE_SEL_MASK_IVB) !=
-+				PF_PIPE_SEL_IVB(crtc->pipe));
-+		}
- 	}
- }
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0259-drm-i915-VLV-doesn-t-have-the-ILK-style-LP-watermark.patch b/patches.baytrail/0259-drm-i915-VLV-doesn-t-have-the-ILK-style-LP-watermark.patch
deleted file mode 100644
index c2251e6c58446..0000000000000
--- a/patches.baytrail/0259-drm-i915-VLV-doesn-t-have-the-ILK-style-LP-watermark.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 280b2dcb714291346ae162e16cde0d3482d993ad Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Tue, 21 May 2013 18:01:49 +0300
-Subject: drm/i915: VLV doesn't have the ILK+ style LP watermark registers
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The LP watermark registers don't exist on VLV, so don't touch them.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 4548feb1fe1f17c0d7ad7acdd267a875b22e6910)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 4 ----
- 1 file changed, 4 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index a6b1f22d9848..e107d56efc38 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -4797,10 +4797,6 @@ static void valleyview_init_clock_gating(struct drm_device *dev)
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	int pipe;
- 
--	I915_WRITE(WM3_LP_ILK, 0);
--	I915_WRITE(WM2_LP_ILK, 0);
--	I915_WRITE(WM1_LP_ILK, 0);
--
- 	I915_WRITE(ILK_DSPCLK_GATE_D, ILK_VRHUNIT_CLOCK_GATE_DISABLE);
- 
- 	/* WaDisableEarlyCull:vlv */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0260-drm-i915-Fix-DSPCLK_GATE_D-for-VLV.patch b/patches.baytrail/0260-drm-i915-Fix-DSPCLK_GATE_D-for-VLV.patch
deleted file mode 100644
index 2e433a9efca27..0000000000000
--- a/patches.baytrail/0260-drm-i915-Fix-DSPCLK_GATE_D-for-VLV.patch
+++ /dev/null
@@ -1,50 +0,0 @@
-From 6134b86ab84148c5da9ea9371e9c4c7c8370dac7 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Tue, 21 May 2013 18:01:50 +0300
-Subject: drm/i915: Fix DSPCLK_GATE_D for VLV
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Fix the DSPCLK_GATE_D access for VLV. The code incorrectly tried to
-poke at the ILK+ version of the register which is at the wrong offset.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit d7fe0cc0f2e0b302b247caa4306915a06218e0be)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_reg.h | 2 +-
- drivers/gpu/drm/i915/intel_pm.c | 2 +-
- 2 files changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
-index 13d4d5e21ce0..77ebaf06855a 100644
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -1258,7 +1258,7 @@
- #define  DSTATE_PLL_D3_OFF			(1<<3)
- #define  DSTATE_GFX_CLOCK_GATING		(1<<1)
- #define  DSTATE_DOT_CLOCK_GATING		(1<<0)
--#define DSPCLK_GATE_D		0x6200
-+#define DSPCLK_GATE_D	(dev_priv->info->display_mmio_offset + 0x6200)
- # define DPUNIT_B_CLOCK_GATE_DISABLE		(1 << 30) /* 965 */
- # define VSUNIT_CLOCK_GATE_DISABLE		(1 << 29) /* 965 */
- # define VRHUNIT_CLOCK_GATE_DISABLE		(1 << 28) /* 965 */
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index e107d56efc38..6ce122be6b4b 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -4797,7 +4797,7 @@ static void valleyview_init_clock_gating(struct drm_device *dev)
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	int pipe;
- 
--	I915_WRITE(ILK_DSPCLK_GATE_D, ILK_VRHUNIT_CLOCK_GATE_DISABLE);
-+	I915_WRITE(DSPCLK_GATE_D, VRHUNIT_CLOCK_GATE_DISABLE);
- 
- 	/* WaDisableEarlyCull:vlv */
- 	I915_WRITE(_3D_CHICKEN3,
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0261-drm-i915-consolidate-and-tighten-encoder-cloning-che.patch b/patches.baytrail/0261-drm-i915-consolidate-and-tighten-encoder-cloning-che.patch
deleted file mode 100644
index b2048280629ae..0000000000000
--- a/patches.baytrail/0261-drm-i915-consolidate-and-tighten-encoder-cloning-che.patch
+++ /dev/null
@@ -1,196 +0,0 @@
-From f3a04941c986b5e1e5a45b5d8e185b453b1d6a4b Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 30 May 2013 15:04:25 +0200
-Subject: drm/i915: consolidate and tighten encoder cloning checks
-
-Only lvds/tv did actually check for cloning or not, but many more
-places should.
-
-Notices because my ivb tried to enable both cpu edp and vga on the
-first crtc - the resulting confusion between has_pch_encoder,
-has_dp_encoder but not actually being a pch dp encoder resulting in
-hilarity (hitting a BUG).
-
-We _really_ need an igt to random-walk our modeset space more
-exhaustively.
-
-The bug seems to have been exposed due to a race in the hw load
-detection support for VGA: Right after a hotplug VGA was still
-detected as connected, but obviously reading the EDID wasn't possible
-any more. Hence why restarting X a bit later fixed things. Due to the
-1024x756 fallback resolution suddenly more outputs had the same
-resolution.
-
-On top of that SNA was confused with the possible_clones mask, trying
-to clone outputs which cannot be cloned. That bug is now fixed with
-
-commit fc1e0702b25e647cb423851fb7228989fec28bd6
-Author: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date:   Wed May 29 11:25:28 2013 +0100
-
-    sna: fixup up possible_clones kms->X impedance mismatch
-
-v2: Kill intel_encoder_check_is_cloned, spotted by Paulo.
-
-v3: Drop the now unused pipe param.
-
-v4: Kill the stray printk Chris spotted.
-
-v5: Elaborate on how the bug in userspace happened and why it was racy
-to reproduce.
-
-Cc: Chris Wilson <chris@chris-wilson.co.uk>
-Cc: stable@vger.kernel.org
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit accfc0c50659c330cfde684017e5c1b58eee2857)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 64 ++++++++++++++----------------------
- drivers/gpu/drm/i915/intel_drv.h     |  1 -
- drivers/gpu/drm/i915/intel_lvds.c    |  3 --
- drivers/gpu/drm/i915/intel_tv.c      |  3 --
- 4 files changed, 24 insertions(+), 47 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 83864bda87ac..f8bfd510d2ff 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -5868,27 +5868,9 @@ static int haswell_crtc_mode_set(struct drm_crtc *crtc,
- 	struct drm_device *dev = crtc->dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
--	int pipe = intel_crtc->pipe;
- 	int plane = intel_crtc->plane;
--	int num_connectors = 0;
--	bool is_cpu_edp = false;
--	struct intel_encoder *encoder;
- 	int ret;
- 
--	for_each_encoder_on_crtc(dev, crtc, encoder) {
--		switch (encoder->type) {
--		case INTEL_OUTPUT_EDP:
--			if (enc_to_dig_port(&encoder->base)->port == PORT_A)
--				is_cpu_edp = true;
--			break;
--		}
--
--		num_connectors++;
--	}
--
--	WARN(num_connectors != 1, "%d connectors attached to pipe %c\n",
--	     num_connectors, pipe_name(pipe));
--
- 	if (!intel_ddi_pll_mode_set(crtc))
- 		return -EINVAL;
- 
-@@ -7568,28 +7550,6 @@ static struct drm_crtc_helper_funcs intel_helper_funcs = {
- 	.load_lut = intel_crtc_load_lut,
- };
- 
--bool intel_encoder_check_is_cloned(struct intel_encoder *encoder)
--{
--	struct intel_encoder *other_encoder;
--	struct drm_crtc *crtc = &encoder->new_crtc->base;
--
--	if (WARN_ON(!crtc))
--		return false;
--
--	list_for_each_entry(other_encoder,
--			    &crtc->dev->mode_config.encoder_list,
--			    base.head) {
--
--		if (&other_encoder->new_crtc->base != crtc ||
--		    encoder == other_encoder)
--			continue;
--		else
--			return true;
--	}
--
--	return false;
--}
--
- static bool intel_encoder_crtc_ok(struct drm_encoder *encoder,
- 				  struct drm_crtc *crtc)
- {
-@@ -7773,6 +7733,25 @@ static void intel_dump_pipe_config(struct intel_crtc *crtc,
- 	DRM_DEBUG_KMS("ips: %i\n", pipe_config->ips_enabled);
- }
- 
-+static bool check_encoder_cloning(struct drm_crtc *crtc)
-+{
-+	int num_encoders = 0;
-+	bool uncloneable_encoders = false;
-+	struct intel_encoder *encoder;
-+
-+	list_for_each_entry(encoder, &crtc->dev->mode_config.encoder_list,
-+			    base.head) {
-+		if (&encoder->new_crtc->base != crtc)
-+			continue;
-+
-+		num_encoders++;
-+		if (!encoder->cloneable)
-+			uncloneable_encoders = true;
-+	}
-+
-+	return !(num_encoders > 1 && uncloneable_encoders);
-+}
-+
- static struct intel_crtc_config *
- intel_modeset_pipe_config(struct drm_crtc *crtc,
- 			  struct drm_framebuffer *fb,
-@@ -7785,6 +7764,11 @@ intel_modeset_pipe_config(struct drm_crtc *crtc,
- 	int plane_bpp, ret = -EINVAL;
- 	bool retry = true;
- 
-+	if (!check_encoder_cloning(crtc)) {
-+		DRM_DEBUG_KMS("rejecting invalid cloning configuration\n");
-+		return ERR_PTR(-EINVAL);
-+	}
-+
- 	pipe_config = kzalloc(sizeof(*pipe_config), GFP_KERNEL);
- 	if (!pipe_config)
- 		return ERR_PTR(-ENOMEM);
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index b0b5ea70af18..baa217d89c59 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -629,7 +629,6 @@ extern void intel_crtc_load_lut(struct drm_crtc *crtc);
- extern void intel_crtc_update_dpms(struct drm_crtc *crtc);
- extern void intel_encoder_destroy(struct drm_encoder *encoder);
- extern void intel_encoder_dpms(struct intel_encoder *encoder, int mode);
--extern bool intel_encoder_check_is_cloned(struct intel_encoder *encoder);
- extern void intel_connector_dpms(struct drm_connector *, int mode);
- extern bool intel_connector_get_hw_state(struct intel_connector *connector);
- extern void intel_modeset_check_state(struct drm_device *dev);
-diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
-index 0b67e89cac9c..7feaba3de45f 100644
---- a/drivers/gpu/drm/i915/intel_lvds.c
-+++ b/drivers/gpu/drm/i915/intel_lvds.c
-@@ -264,9 +264,6 @@ static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
- 		return false;
- 	}
- 
--	if (intel_encoder_check_is_cloned(&lvds_encoder->base))
--		return false;
--
- 	if ((I915_READ(lvds_encoder->reg) & LVDS_A3_POWER_MASK) ==
- 	    LVDS_A3_POWER_UP)
- 		lvds_bpp = 8*3;
-diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c
-index a2fb39dede3c..d7fe4f89f7fc 100644
---- a/drivers/gpu/drm/i915/intel_tv.c
-+++ b/drivers/gpu/drm/i915/intel_tv.c
-@@ -914,9 +914,6 @@ intel_tv_compute_config(struct intel_encoder *encoder,
- 	if (!tv_mode)
- 		return false;
- 
--	if (intel_encoder_check_is_cloned(&intel_tv->base))
--		return false;
--
- 	pipe_config->adjusted_mode.clock = tv_mode->clock;
- 	DRM_DEBUG_KMS("forcing bpc to 8 for TV\n");
- 	pipe_config->pipe_bpp = 8*3;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0262-drm-i915-distinguish-between-error-messages-in-DIDL-.patch b/patches.baytrail/0262-drm-i915-distinguish-between-error-messages-in-DIDL-.patch
deleted file mode 100644
index 9e20b0dcd8445..0000000000000
--- a/patches.baytrail/0262-drm-i915-distinguish-between-error-messages-in-DIDL-.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From 05f41a63270816574a246def7727d29f0723aada Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Wed, 5 Jun 2013 21:55:29 +0300
-Subject: drm/i915: distinguish between error messages in DIDL initialization
-
-Two exactly same error messages on different error paths makes debugging
-difficult. Clarify the messages and distinguish them from each other.
-
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit c2a2a1a722b7e4edce7dad285b461e0b2592eecc)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_opregion.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_opregion.c b/drivers/gpu/drm/i915/intel_opregion.c
-index 5c2d6939600e..79be7cfd3152 100644
---- a/drivers/gpu/drm/i915/intel_opregion.c
-+++ b/drivers/gpu/drm/i915/intel_opregion.c
-@@ -312,7 +312,7 @@ static void intel_didl_outputs(struct drm_device *dev)
- 	list_for_each_entry(acpi_cdev, &acpi_video_bus->children, node) {
- 		if (i >= 8) {
- 			dev_printk(KERN_ERR, &dev->pdev->dev,
--				    "More than 8 outputs detected\n");
-+				   "More than 8 outputs detected via ACPI\n");
- 			return;
- 		}
- 		status =
-@@ -339,7 +339,7 @@ blind_set:
- 		int output_type = ACPI_OTHER_OUTPUT;
- 		if (i >= 8) {
- 			dev_printk(KERN_ERR, &dev->pdev->dev,
--				    "More than 8 outputs detected\n");
-+				   "More than 8 outputs in connector list\n");
- 			return;
- 		}
- 		switch (connector->connector_type) {
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0263-drm-i915-set-default-value-for-config-pixel_multipli.patch b/patches.baytrail/0263-drm-i915-set-default-value-for-config-pixel_multipli.patch
deleted file mode 100644
index 0dc7e7cd3d036..0000000000000
--- a/patches.baytrail/0263-drm-i915-set-default-value-for-config-pixel_multipli.patch
+++ /dev/null
@@ -1,118 +0,0 @@
-From 262b273f372d6546a823ee867dbb69a1b3451377 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Sat, 1 Jun 2013 17:17:04 +0200
-Subject: drm/i915: set default value for config->pixel_multiplier
-
-This way we can simplify the code quite a bit.
-
-Also add a WARN in the sdvo code to complain about a bogus value
-and kill the readout code in intel_ddi.c that Jesse sneaked in.
-HW state readout for the pixel multiplier will work a bit differently
-in the end.
-
-v2: Rebase on top of the fdi pixel mutliplier handling fix.
-
-Reviewed-by: Imre Deak <imre.deak@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit ef1b460d1bab7e5b04c34f88c3dfa042528e7c27)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_ddi.c     |    1 -
- drivers/gpu/drm/i915/intel_display.c |   29 ++++++++++-------------------
- drivers/gpu/drm/i915/intel_sdvo.c    |    1 +
- 3 files changed, 11 insertions(+), 20 deletions(-)
-
---- a/drivers/gpu/drm/i915/intel_ddi.c
-+++ b/drivers/gpu/drm/i915/intel_ddi.c
-@@ -1286,7 +1286,6 @@ static void intel_ddi_get_config(struct
- 		flags |= DRM_MODE_FLAG_NVSYNC;
- 
- 	pipe_config->adjusted_mode.flags |= flags;
--	pipe_config->pixel_multiplier = 1;
- }
- 
- static void intel_ddi_destroy(struct drm_encoder *encoder)
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -3999,8 +3999,7 @@ retry:
- 	link_bw = intel_fdi_link_freq(dev) * MHz(100)/KHz(1)/10;
- 
- 	fdi_dotclock = adjusted_mode->clock;
--	if (pipe_config->pixel_multiplier > 1)
--		fdi_dotclock /= pipe_config->pixel_multiplier;
-+	fdi_dotclock /= pipe_config->pixel_multiplier;
- 
- 	lane = ironlake_get_lanes_required(fdi_dotclock, link_bw,
- 					   pipe_config->pipe_bpp);
-@@ -4454,11 +4453,8 @@ static void vlv_update_pll(struct intel_
- 	if (wait_for(((I915_READ(DPLL(pipe)) & DPLL_LOCK_VLV) == DPLL_LOCK_VLV), 1))
- 		DRM_ERROR("DPLL %d failed to lock\n", pipe);
- 
--	dpll_md = 0;
--	if (crtc->config.pixel_multiplier > 1) {
--		dpll_md = (crtc->config.pixel_multiplier - 1)
--			<< DPLL_MD_UDI_MULTIPLIER_SHIFT;
--	}
-+	dpll_md = (crtc->config.pixel_multiplier - 1)
-+		<< DPLL_MD_UDI_MULTIPLIER_SHIFT;
- 	I915_WRITE(DPLL_MD(pipe), dpll_md);
- 	POSTING_READ(DPLL_MD(pipe));
- 
-@@ -4492,8 +4488,7 @@ static void i9xx_update_pll(struct intel
- 	else
- 		dpll |= DPLLB_MODE_DAC_SERIAL;
- 
--	if ((crtc->config.pixel_multiplier > 1) &&
--	    (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev))) {
-+	if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
- 		dpll |= (crtc->config.pixel_multiplier - 1)
- 			<< SDVO_MULTIPLIER_SHIFT_HIRES;
- 	}
-@@ -4556,11 +4551,8 @@ static void i9xx_update_pll(struct intel
- 	udelay(150);
- 
- 	if (INTEL_INFO(dev)->gen >= 4) {
--		u32 dpll_md = 0;
--		if (crtc->config.pixel_multiplier > 1) {
--			dpll_md = (crtc->config.pixel_multiplier - 1)
--				<< DPLL_MD_UDI_MULTIPLIER_SHIFT;
--		}
-+		u32 dpll_md = (crtc->config.pixel_multiplier - 1)
-+			<< DPLL_MD_UDI_MULTIPLIER_SHIFT;
- 		I915_WRITE(DPLL_MD(pipe), dpll_md);
- 	} else {
- 		/* The pixel multiplier can only be updated once the
-@@ -5613,10 +5605,8 @@ static uint32_t ironlake_compute_dpll(st
- 	else
- 		dpll |= DPLLB_MODE_DAC_SERIAL;
- 
--	if (intel_crtc->config.pixel_multiplier > 1) {
--		dpll |= (intel_crtc->config.pixel_multiplier - 1)
--			<< PLL_REF_SDVO_HDMI_MULTIPLIER_SHIFT;
--	}
-+	dpll |= (intel_crtc->config.pixel_multiplier - 1)
-+		<< PLL_REF_SDVO_HDMI_MULTIPLIER_SHIFT;
- 
- 	if (is_sdvo)
- 		dpll |= DPLL_DVO_HIGH_SPEED;
-@@ -7787,8 +7777,9 @@ intel_modeset_pipe_config(struct drm_crt
- 		goto fail;
- 
- encoder_retry:
--	/* Ensure the port clock default is reset when retrying. */
-+	/* Ensure the port clock defaults are reset when retrying. */
- 	pipe_config->port_clock = 0;
-+	pipe_config->pixel_multiplier = 1;
- 
- 	/* Pass our mode to the connectors and the CRTC to give them a chance to
- 	 * adjust it according to limitations or connector properties, and also
---- a/drivers/gpu/drm/i915/intel_sdvo.c
-+++ b/drivers/gpu/drm/i915/intel_sdvo.c
-@@ -1219,6 +1219,7 @@ static void intel_sdvo_mode_set(struct i
- 
- 	switch (intel_crtc->config.pixel_multiplier) {
- 	default:
-+		WARN(1, "unknown pixel mutlipler specified\n");
- 	case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
- 	case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
- 	case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
diff --git a/patches.baytrail/0264-drm-i915-Track-clients-and-print-their-object-usage-.patch b/patches.baytrail/0264-drm-i915-Track-clients-and-print-their-object-usage-.patch
deleted file mode 100644
index c826fa50958e5..0000000000000
--- a/patches.baytrail/0264-drm-i915-Track-clients-and-print-their-object-usage-.patch
+++ /dev/null
@@ -1,107 +0,0 @@
-From 7b69b79737f7325735e43b3b6e3189cd0af5e8da Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Tue, 4 Jun 2013 23:49:08 +0100
-Subject: drm/i915: Track clients and print their object usage in debugfs
-
-By stashing a pointer of who opened the device and keeping a list of
-open fd, we can then walk each client and inspect how many objects they
-have open. For example,
-
-i915_gem_objects:
-1102 objects, 613646336 bytes
-663 [662] objects, 468783104 [468750336] bytes in gtt
-  37 [37] active objects, 46874624 [46874624] bytes
-  626 [625] inactive objects, 421908480 [421875712] bytes
-282 unbound objects, 6512640 bytes
-85 purgeable objects, 6787072 bytes
-28 pinned mappable objects, 3686400 bytes
-40 fault mappable objects, 27783168 bytes
-2145386496 [536870912] gtt total
-
-Xorg: 43 objects, 32243712 bytes (10223616 active, 16683008 inactive, 4096 unbound)
-gnome-shell: 30 objects, 28381184 bytes (0 active, 28336128 inactive, 0 unbound)
-xonotic-linux64: 1032 objects, 569933824 bytes (46874624 active, 383545344 inactive, 6508544 unbound)
-
-v2: Use existing drm->filelist as pointed out by Ben.
-v3: Not even stashing the task_struct is required as Ben pointed out
-    drm_file->pid.
-
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 2db8e9d6b255a4fd070df70fa58306bf64b41984)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_debugfs.c | 42 +++++++++++++++++++++++++++++++++++++
- 1 file changed, 42 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
-index 0e7e3c04d939..d4e78b64ca87 100644
---- a/drivers/gpu/drm/i915/i915_debugfs.c
-+++ b/drivers/gpu/drm/i915/i915_debugfs.c
-@@ -196,6 +196,32 @@ static int i915_gem_object_list_info(struct seq_file *m, void *data)
- 	} \
- } while (0)
- 
-+struct file_stats {
-+	int count;
-+	size_t total, active, inactive, unbound;
-+};
-+
-+static int per_file_stats(int id, void *ptr, void *data)
-+{
-+	struct drm_i915_gem_object *obj = ptr;
-+	struct file_stats *stats = data;
-+
-+	stats->count++;
-+	stats->total += obj->base.size;
-+
-+	if (obj->gtt_space) {
-+		if (!list_empty(&obj->ring_list))
-+			stats->active += obj->base.size;
-+		else
-+			stats->inactive += obj->base.size;
-+	} else {
-+		if (!list_empty(&obj->global_list))
-+			stats->unbound += obj->base.size;
-+	}
-+
-+	return 0;
-+}
-+
- static int i915_gem_object_info(struct seq_file *m, void* data)
- {
- 	struct drm_info_node *node = (struct drm_info_node *) m->private;
-@@ -204,6 +230,7 @@ static int i915_gem_object_info(struct seq_file *m, void* data)
- 	u32 count, mappable_count, purgeable_count;
- 	size_t size, mappable_size, purgeable_size;
- 	struct drm_i915_gem_object *obj;
-+	struct drm_file *file;
- 	int ret;
- 
- 	ret = mutex_lock_interruptible(&dev->struct_mutex);
-@@ -263,6 +290,21 @@ static int i915_gem_object_info(struct seq_file *m, void* data)
- 		   dev_priv->gtt.total,
- 		   dev_priv->gtt.mappable_end - dev_priv->gtt.start);
- 
-+	seq_printf(m, "\n");
-+	list_for_each_entry_reverse(file, &dev->filelist, lhead) {
-+		struct file_stats stats;
-+
-+		memset(&stats, 0, sizeof(stats));
-+		idr_for_each(&file->object_idr, per_file_stats, &stats);
-+		seq_printf(m, "%s: %u objects, %zu bytes (%zu active, %zu inactive, %zu unbound)\n",
-+			   get_pid_task(file->pid, PIDTYPE_PID)->comm,
-+			   stats.count,
-+			   stats.total,
-+			   stats.active,
-+			   stats.inactive,
-+			   stats.unbound);
-+	}
-+
- 	mutex_unlock(&dev->struct_mutex);
- 
- 	return 0;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0265-drm-i915-add-ibx_irq_preinstall.patch b/patches.baytrail/0265-drm-i915-add-ibx_irq_preinstall.patch
deleted file mode 100644
index c9a622d8a00f6..0000000000000
--- a/patches.baytrail/0265-drm-i915-add-ibx_irq_preinstall.patch
+++ /dev/null
@@ -1,89 +0,0 @@
-From 87306762f22e0facac9a08137cba763a768d869d Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Wed, 5 Jun 2013 14:21:51 -0300
-Subject: drm/i915: add ibx_irq_preinstall
-
-So we can remove some duplicate code. All the PCHs are very similar
-and right now the code is the same. I plan to add more code, so we
-would have more duplicated code.
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 91738a95bf40a3405bb7b8a3e76d30e060a80705)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 44 ++++++++++++++++++++---------------------
- 1 file changed, 21 insertions(+), 23 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index 2eaae3211553..8916651b3e1e 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -2509,6 +2509,25 @@ void i915_hangcheck_elapsed(unsigned long data)
- 					   DRM_I915_HANGCHECK_JIFFIES));
- }
- 
-+static void ibx_irq_preinstall(struct drm_device *dev)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+
-+	if (HAS_PCH_NOP(dev))
-+		return;
-+
-+	/* south display irq */
-+	I915_WRITE(SDEIMR, 0xffffffff);
-+	/*
-+	 * SDEIER is also touched by the interrupt handler to work around missed
-+	 * PCH interrupts. Hence we can't update it after the interrupt handler
-+	 * is enabled - instead we unconditionally enable all PCH interrupt
-+	 * sources here, but then only unmask them as needed with SDEIMR.
-+	 */
-+	I915_WRITE(SDEIER, 0xffffffff);
-+	POSTING_READ(SDEIER);
-+}
-+
- /* drm_dma.h hooks
- */
- static void ironlake_irq_preinstall(struct drm_device *dev)
-@@ -2530,16 +2549,7 @@ static void ironlake_irq_preinstall(struct drm_device *dev)
- 	I915_WRITE(GTIER, 0x0);
- 	POSTING_READ(GTIER);
- 
--	/* south display irq */
--	I915_WRITE(SDEIMR, 0xffffffff);
--	/*
--	 * SDEIER is also touched by the interrupt handler to work around missed
--	 * PCH interrupts. Hence we can't update it after the interrupt handler
--	 * is enabled - instead we unconditionally enable all PCH interrupt
--	 * sources here, but then only unmask them as needed with SDEIMR.
--	 */
--	I915_WRITE(SDEIER, 0xffffffff);
--	POSTING_READ(SDEIER);
-+	ibx_irq_preinstall(dev);
- }
- 
- static void ivybridge_irq_preinstall(struct drm_device *dev)
-@@ -2566,19 +2576,7 @@ static void ivybridge_irq_preinstall(struct drm_device *dev)
- 	I915_WRITE(GEN6_PMIER, 0x0);
- 	POSTING_READ(GEN6_PMIER);
- 
--	if (HAS_PCH_NOP(dev))
--		return;
--
--	/* south display irq */
--	I915_WRITE(SDEIMR, 0xffffffff);
--	/*
--	 * SDEIER is also touched by the interrupt handler to work around missed
--	 * PCH interrupts. Hence we can't update it after the interrupt handler
--	 * is enabled - instead we unconditionally enable all PCH interrupt
--	 * sources here, but then only unmask them as needed with SDEIMR.
--	 */
--	I915_WRITE(SDEIER, 0xffffffff);
--	POSTING_READ(SDEIER);
-+	ibx_irq_preinstall(dev);
- }
- 
- static void valleyview_irq_preinstall(struct drm_device *dev)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0266-Revert-drm-i915-Include-display_mmio_offset-in-seque.patch b/patches.baytrail/0266-Revert-drm-i915-Include-display_mmio_offset-in-seque.patch
deleted file mode 100644
index d102b10f7ee8d..0000000000000
--- a/patches.baytrail/0266-Revert-drm-i915-Include-display_mmio_offset-in-seque.patch
+++ /dev/null
@@ -1,47 +0,0 @@
-From 390acd2e535a8d1c78e9849d8e38a34edd3bcc6b Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Thu, 6 Jun 2013 13:09:32 +0300
-Subject: Revert "drm/i915: Include display_mmio_offset in sequencer index/data
- registers"
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-We use port I/O for VGA register access, so adding display_mmio_offset
-is just wrong.
-
-This reverts commit 56a12a509296c87d6f149be86c6694d312b21d35.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 5434fd926d1e4de5d82fcbd4e7e4698cc6575bdb)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_reg.h | 10 ++--------
- 1 file changed, 2 insertions(+), 8 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
-index 77ebaf06855a..65547c1f1001 100644
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -147,15 +147,9 @@
- #define   VGA_MSR_MEM_EN (1<<1)
- #define   VGA_MSR_CGA_MODE (1<<0)
- 
--/*
-- * SR01 is the only VGA register touched on non-UMS setups.
-- * VLV doesn't do UMS, so the sequencer index/data registers
-- * are the only VGA registers which need to include
-- * display_mmio_offset.
-- */
--#define VGA_SR_INDEX (dev_priv->info->display_mmio_offset + 0x3c4)
-+#define VGA_SR_INDEX 0x3c4
- #define SR01			1
--#define VGA_SR_DATA (dev_priv->info->display_mmio_offset + 0x3c5)
-+#define VGA_SR_DATA 0x3c5
- 
- #define VGA_AR_INDEX 0x3c0
- #define   VGA_AR_VID_EN (1<<5)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0267-drm-i915-Always-load-the-display-palette-before-enab.patch b/patches.baytrail/0267-drm-i915-Always-load-the-display-palette-before-enab.patch
deleted file mode 100644
index 4559afe413edb..0000000000000
--- a/patches.baytrail/0267-drm-i915-Always-load-the-display-palette-before-enab.patch
+++ /dev/null
@@ -1,63 +0,0 @@
-From c9a4f9452c674a864b7e27fccf1e977d1bb84bc4 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Tue, 4 Jun 2013 13:48:59 +0300
-Subject: drm/i915: Always load the display palette before enabling the pipe
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Loading the palette after the planes are enabled can risk showing
-incorrect colors. ILK+ already load the palette before even the pipe
-is enabled. Just follow the same order for gen2-4 and VLV.
-
-According to BSpec the requirements for palette access are
-display core clock and display PLL running. In certain platforms
-just the core clock may be enough. But we definitely should have both
-running when this gets called during the modeset.
-
-v2: Amend the commit message with some display PLL/core clock info
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 63cbb0747622d923665294519e9a24bc9c654c19)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 6 ++++--
- 1 file changed, 4 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 7bd619db7cd6..885aa16b74f1 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -3618,10 +3618,11 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc)
- 	/* Enable panel fitting for eDP */
- 	i9xx_pfit_enable(intel_crtc);
- 
-+	intel_crtc_load_lut(crtc);
-+
- 	intel_enable_pipe(dev_priv, pipe, false);
- 	intel_enable_plane(dev_priv, plane, pipe);
- 
--	intel_crtc_load_lut(crtc);
- 	intel_update_fbc(dev);
- 
- 	/* Give the overlay scaler a chance to enable if it's on this pipe */
-@@ -3657,12 +3658,13 @@ static void i9xx_crtc_enable(struct drm_crtc *crtc)
- 	/* Enable panel fitting for LVDS */
- 	i9xx_pfit_enable(intel_crtc);
- 
-+	intel_crtc_load_lut(crtc);
-+
- 	intel_enable_pipe(dev_priv, pipe, false);
- 	intel_enable_plane(dev_priv, plane, pipe);
- 	if (IS_G4X(dev))
- 		g4x_fixup_plane(dev_priv, pipe);
- 
--	intel_crtc_load_lut(crtc);
- 	intel_update_fbc(dev);
- 
- 	/* Give the overlay scaler a chance to enable if it's on this pipe */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0268-drm-i915-Always-enable-the-cursor-right-after-the-pr.patch b/patches.baytrail/0268-drm-i915-Always-enable-the-cursor-right-after-the-pr.patch
deleted file mode 100644
index 34a7a04fe854f..0000000000000
--- a/patches.baytrail/0268-drm-i915-Always-enable-the-cursor-right-after-the-pr.patch
+++ /dev/null
@@ -1,96 +0,0 @@
-From 5f6b5c8bf7ce495c239364afee4774611421198a Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Tue, 4 Jun 2013 13:49:00 +0300
-Subject: drm/i915: Always enable the cursor right after the primary plane
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Follow the same sequence when enabling the cursor plane during
-modeset. No point in doing this stuff in different order on different
-generations.
-
-This should also avoid a needless wait for vblank for the g4x cursor
-workaround when the cursor gets enabled anyway.
-
-Acked-by: Egbert Eich <eich@suse.com>
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 5c38d48cd8dfb3332c072a257bc2a6dab1e5dc3b)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 10 ++++------
- 1 file changed, 4 insertions(+), 6 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 885aa16b74f1..9e1ff008e733 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -3219,6 +3219,7 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc)
- 	intel_enable_pipe(dev_priv, pipe,
- 			  intel_crtc->config.has_pch_encoder);
- 	intel_enable_plane(dev_priv, plane, pipe);
-+	intel_crtc_update_cursor(crtc, true);
- 
- 	if (intel_crtc->config.has_pch_encoder)
- 		ironlake_pch_enable(crtc);
-@@ -3227,8 +3228,6 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc)
- 	intel_update_fbc(dev);
- 	mutex_unlock(&dev->struct_mutex);
- 
--	intel_crtc_update_cursor(crtc, true);
--
- 	for_each_encoder_on_crtc(dev, crtc, encoder)
- 		encoder->enable(encoder);
- 
-@@ -3328,6 +3327,7 @@ static void haswell_crtc_enable(struct drm_crtc *crtc)
- 	intel_enable_pipe(dev_priv, pipe,
- 			  intel_crtc->config.has_pch_encoder);
- 	intel_enable_plane(dev_priv, plane, pipe);
-+	intel_crtc_update_cursor(crtc, true);
- 
- 	hsw_enable_ips(intel_crtc);
- 
-@@ -3338,8 +3338,6 @@ static void haswell_crtc_enable(struct drm_crtc *crtc)
- 	intel_update_fbc(dev);
- 	mutex_unlock(&dev->struct_mutex);
- 
--	intel_crtc_update_cursor(crtc, true);
--
- 	for_each_encoder_on_crtc(dev, crtc, encoder)
- 		encoder->enable(encoder);
- 
-@@ -3622,12 +3620,12 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc)
- 
- 	intel_enable_pipe(dev_priv, pipe, false);
- 	intel_enable_plane(dev_priv, plane, pipe);
-+	intel_crtc_update_cursor(crtc, true);
- 
- 	intel_update_fbc(dev);
- 
- 	/* Give the overlay scaler a chance to enable if it's on this pipe */
- 	intel_crtc_dpms_overlay(intel_crtc, true);
--	intel_crtc_update_cursor(crtc, true);
- 
- 	mutex_unlock(&dev_priv->dpio_lock);
- }
-@@ -3662,6 +3660,7 @@ static void i9xx_crtc_enable(struct drm_crtc *crtc)
- 
- 	intel_enable_pipe(dev_priv, pipe, false);
- 	intel_enable_plane(dev_priv, plane, pipe);
-+	intel_crtc_update_cursor(crtc, true);
- 	if (IS_G4X(dev))
- 		g4x_fixup_plane(dev_priv, pipe);
- 
-@@ -3669,7 +3668,6 @@ static void i9xx_crtc_enable(struct drm_crtc *crtc)
- 
- 	/* Give the overlay scaler a chance to enable if it's on this pipe */
- 	intel_crtc_dpms_overlay(intel_crtc, true);
--	intel_crtc_update_cursor(crtc, true);
- 
- 	for_each_encoder_on_crtc(dev, crtc, encoder)
- 		encoder->enable(encoder);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0269-drm-i915-Enable-the-overlay-right-after-primary-and-.patch b/patches.baytrail/0269-drm-i915-Enable-the-overlay-right-after-primary-and-.patch
deleted file mode 100644
index 08caabfc311ba..0000000000000
--- a/patches.baytrail/0269-drm-i915-Enable-the-overlay-right-after-primary-and-.patch
+++ /dev/null
@@ -1,55 +0,0 @@
-From ea429c26e8534e29b9e999d3e1b1df4f674a3ef0 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Tue, 4 Jun 2013 13:49:01 +0300
-Subject: drm/i915: Enable the overlay right after primary and cursor planes
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Again follow the same sequence for all generations, because doing
-otherwise just doesn't make sense.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit f440eb1354bc92855bbbff08d3ac4a93029c3097)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 8 ++++----
- 1 file changed, 4 insertions(+), 4 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 9e1ff008e733..00b197c625c2 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -3622,11 +3622,11 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc)
- 	intel_enable_plane(dev_priv, plane, pipe);
- 	intel_crtc_update_cursor(crtc, true);
- 
--	intel_update_fbc(dev);
--
- 	/* Give the overlay scaler a chance to enable if it's on this pipe */
- 	intel_crtc_dpms_overlay(intel_crtc, true);
- 
-+	intel_update_fbc(dev);
-+
- 	mutex_unlock(&dev_priv->dpio_lock);
- }
- 
-@@ -3664,11 +3664,11 @@ static void i9xx_crtc_enable(struct drm_crtc *crtc)
- 	if (IS_G4X(dev))
- 		g4x_fixup_plane(dev_priv, pipe);
- 
--	intel_update_fbc(dev);
--
- 	/* Give the overlay scaler a chance to enable if it's on this pipe */
- 	intel_crtc_dpms_overlay(intel_crtc, true);
- 
-+	intel_update_fbc(dev);
-+
- 	for_each_encoder_on_crtc(dev, crtc, encoder)
- 		encoder->enable(encoder);
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0270-drm-i915-Follow-the-same-sequence-when-disabling-pla.patch b/patches.baytrail/0270-drm-i915-Follow-the-same-sequence-when-disabling-pla.patch
deleted file mode 100644
index 9745b2be80c9c..0000000000000
--- a/patches.baytrail/0270-drm-i915-Follow-the-same-sequence-when-disabling-pla.patch
+++ /dev/null
@@ -1,79 +0,0 @@
-From c307ac446c7cb7ef6b452d3d80347d7ffd23c328 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Tue, 4 Jun 2013 13:49:02 +0300
-Subject: drm/i915: Follow the same sequence when disabling planes
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-First disable FBC, then IPS, then disable all planes, and finally
-disable the pipe.
-
-v2: Mention IPS in the commit message
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 0d5b8c61d877072431d29f3338ec081a3f5d7981)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 13 +++++++------
- 1 file changed, 7 insertions(+), 6 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 00b197c625c2..b3dbdec72790 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -3386,13 +3386,13 @@ static void ironlake_crtc_disable(struct drm_crtc *crtc)
- 
- 	intel_crtc_wait_for_pending_flips(crtc);
- 	drm_vblank_off(dev, pipe);
--	intel_crtc_update_cursor(crtc, false);
--
--	intel_disable_plane(dev_priv, plane, pipe);
- 
- 	if (dev_priv->cfb_plane == plane)
- 		intel_disable_fbc(dev);
- 
-+	intel_crtc_update_cursor(crtc, false);
-+	intel_disable_plane(dev_priv, plane, pipe);
-+
- 	intel_set_pch_fifo_underrun_reporting(dev, pipe, false);
- 	intel_disable_pipe(dev_priv, pipe);
- 
-@@ -3465,7 +3465,6 @@ static void haswell_crtc_disable(struct drm_crtc *crtc)
- 
- 	intel_crtc_wait_for_pending_flips(crtc);
- 	drm_vblank_off(dev, pipe);
--	intel_crtc_update_cursor(crtc, false);
- 
- 	/* FBC must be disabled before disabling the plane on HSW. */
- 	if (dev_priv->cfb_plane == plane)
-@@ -3473,6 +3472,7 @@ static void haswell_crtc_disable(struct drm_crtc *crtc)
- 
- 	hsw_disable_ips(intel_crtc);
- 
-+	intel_crtc_update_cursor(crtc, false);
- 	intel_disable_plane(dev_priv, plane, pipe);
- 
- 	if (intel_crtc->config.has_pch_encoder)
-@@ -3706,13 +3706,14 @@ static void i9xx_crtc_disable(struct drm_crtc *crtc)
- 	/* Give the overlay scaler a chance to disable if it's on this pipe */
- 	intel_crtc_wait_for_pending_flips(crtc);
- 	drm_vblank_off(dev, pipe);
--	intel_crtc_dpms_overlay(intel_crtc, false);
--	intel_crtc_update_cursor(crtc, false);
- 
- 	if (dev_priv->cfb_plane == plane)
- 		intel_disable_fbc(dev);
- 
-+	intel_crtc_dpms_overlay(intel_crtc, false);
-+	intel_crtc_update_cursor(crtc, false);
- 	intel_disable_plane(dev_priv, plane, pipe);
-+
- 	intel_disable_pipe(dev_priv, pipe);
- 
- 	i9xx_pfit_disable(intel_crtc);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0271-drm-i915-Drop-overlay-DPMS-call-from-valleyview_crtc.patch b/patches.baytrail/0271-drm-i915-Drop-overlay-DPMS-call-from-valleyview_crtc.patch
deleted file mode 100644
index 97391f2793bbb..0000000000000
--- a/patches.baytrail/0271-drm-i915-Drop-overlay-DPMS-call-from-valleyview_crtc.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From ab8f92be3931515e7bf35e5044e1845297d9e548 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Tue, 4 Jun 2013 13:49:03 +0300
-Subject: drm/i915: Drop overlay DPMS call from valleyview_crtc_enable
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-VLV doesn't have the old video overlay.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit b85dfcf9240043e81ba13b1bc99afc8645bf4c6a)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 3 ---
- 1 file changed, 3 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index b3dbdec72790..31076e0392e4 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -3622,9 +3622,6 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc)
- 	intel_enable_plane(dev_priv, plane, pipe);
- 	intel_crtc_update_cursor(crtc, true);
- 
--	/* Give the overlay scaler a chance to enable if it's on this pipe */
--	intel_crtc_dpms_overlay(intel_crtc, true);
--
- 	intel_update_fbc(dev);
- 
- 	mutex_unlock(&dev_priv->dpio_lock);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0272-drm-i915-Disable-restore-all-sprite-planes-around-mo.patch b/patches.baytrail/0272-drm-i915-Disable-restore-all-sprite-planes-around-mo.patch
deleted file mode 100644
index 951f4389dea58..0000000000000
--- a/patches.baytrail/0272-drm-i915-Disable-restore-all-sprite-planes-around-mo.patch
+++ /dev/null
@@ -1,153 +0,0 @@
-From 8e588dc30b42c25ce0dac3fd6cf606aaba0dbd08 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Tue, 4 Jun 2013 13:49:04 +0300
-Subject: drm/i915: Disable/restore all sprite planes around modeset
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Disable/restore sprite planes around mode-set just like we do for the
-primary and cursor planes. Now that we have working sprite clipping,
-this actually works quite decently.
-
-Previosuly we didn't even bother to disable sprites when changing mode,
-which could lead to a corrupted sprite appearing on the screen after a
-modeset (at least on my IVB). Not sure if all hardware generations would
-be so forgiving when enabled sprites end up outside the pipe dimensons.
-
-v2: Disable rather than enable sprites in ironlake_crtc_disable()
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit bb53d4aeac59079240605ef9269166f204612b78)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 29 +++++++++++++++++++++++++++++
- drivers/gpu/drm/i915/intel_drv.h     |  1 +
- drivers/gpu/drm/i915/intel_sprite.c  |  8 ++++++++
- 3 files changed, 38 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 31076e0392e4..fc34abdae369 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -3164,6 +3164,28 @@ static void ironlake_pfit_enable(struct intel_crtc *crtc)
- 	}
- }
- 
-+static void intel_enable_planes(struct drm_crtc *crtc)
-+{
-+	struct drm_device *dev = crtc->dev;
-+	enum pipe pipe = to_intel_crtc(crtc)->pipe;
-+	struct intel_plane *intel_plane;
-+
-+	list_for_each_entry(intel_plane, &dev->mode_config.plane_list, base.head)
-+		if (intel_plane->pipe == pipe)
-+			intel_plane_restore(&intel_plane->base);
-+}
-+
-+static void intel_disable_planes(struct drm_crtc *crtc)
-+{
-+	struct drm_device *dev = crtc->dev;
-+	enum pipe pipe = to_intel_crtc(crtc)->pipe;
-+	struct intel_plane *intel_plane;
-+
-+	list_for_each_entry(intel_plane, &dev->mode_config.plane_list, base.head)
-+		if (intel_plane->pipe == pipe)
-+			intel_plane_disable(&intel_plane->base);
-+}
-+
- static void ironlake_crtc_enable(struct drm_crtc *crtc)
- {
- 	struct drm_device *dev = crtc->dev;
-@@ -3219,6 +3241,7 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc)
- 	intel_enable_pipe(dev_priv, pipe,
- 			  intel_crtc->config.has_pch_encoder);
- 	intel_enable_plane(dev_priv, plane, pipe);
-+	intel_enable_planes(crtc);
- 	intel_crtc_update_cursor(crtc, true);
- 
- 	if (intel_crtc->config.has_pch_encoder)
-@@ -3327,6 +3350,7 @@ static void haswell_crtc_enable(struct drm_crtc *crtc)
- 	intel_enable_pipe(dev_priv, pipe,
- 			  intel_crtc->config.has_pch_encoder);
- 	intel_enable_plane(dev_priv, plane, pipe);
-+	intel_enable_planes(crtc);
- 	intel_crtc_update_cursor(crtc, true);
- 
- 	hsw_enable_ips(intel_crtc);
-@@ -3391,6 +3415,7 @@ static void ironlake_crtc_disable(struct drm_crtc *crtc)
- 		intel_disable_fbc(dev);
- 
- 	intel_crtc_update_cursor(crtc, false);
-+	intel_disable_planes(crtc);
- 	intel_disable_plane(dev_priv, plane, pipe);
- 
- 	intel_set_pch_fifo_underrun_reporting(dev, pipe, false);
-@@ -3473,6 +3498,7 @@ static void haswell_crtc_disable(struct drm_crtc *crtc)
- 	hsw_disable_ips(intel_crtc);
- 
- 	intel_crtc_update_cursor(crtc, false);
-+	intel_disable_planes(crtc);
- 	intel_disable_plane(dev_priv, plane, pipe);
- 
- 	if (intel_crtc->config.has_pch_encoder)
-@@ -3620,6 +3646,7 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc)
- 
- 	intel_enable_pipe(dev_priv, pipe, false);
- 	intel_enable_plane(dev_priv, plane, pipe);
-+	intel_enable_planes(crtc);
- 	intel_crtc_update_cursor(crtc, true);
- 
- 	intel_update_fbc(dev);
-@@ -3657,6 +3684,7 @@ static void i9xx_crtc_enable(struct drm_crtc *crtc)
- 
- 	intel_enable_pipe(dev_priv, pipe, false);
- 	intel_enable_plane(dev_priv, plane, pipe);
-+	intel_enable_planes(crtc);
- 	intel_crtc_update_cursor(crtc, true);
- 	if (IS_G4X(dev))
- 		g4x_fixup_plane(dev_priv, pipe);
-@@ -3709,6 +3737,7 @@ static void i9xx_crtc_disable(struct drm_crtc *crtc)
- 
- 	intel_crtc_dpms_overlay(intel_crtc, false);
- 	intel_crtc_update_cursor(crtc, false);
-+	intel_disable_planes(crtc);
- 	intel_disable_plane(dev_priv, plane, pipe);
- 
- 	intel_disable_pipe(dev_priv, pipe);
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index baa217d89c59..915d2693e1a0 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -633,6 +633,7 @@ extern void intel_connector_dpms(struct drm_connector *, int mode);
- extern bool intel_connector_get_hw_state(struct intel_connector *connector);
- extern void intel_modeset_check_state(struct drm_device *dev);
- extern void intel_plane_restore(struct drm_plane *plane);
-+extern void intel_plane_disable(struct drm_plane *plane);
- 
- 
- static inline struct intel_encoder *intel_attached_encoder(struct drm_connector *connector)
-diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
-index 04d38d4d811a..1fa5612a4572 100644
---- a/drivers/gpu/drm/i915/intel_sprite.c
-+++ b/drivers/gpu/drm/i915/intel_sprite.c
-@@ -957,6 +957,14 @@ void intel_plane_restore(struct drm_plane *plane)
- 			   intel_plane->src_w, intel_plane->src_h);
- }
- 
-+void intel_plane_disable(struct drm_plane *plane)
-+{
-+	if (!plane->crtc || !plane->fb)
-+		return;
-+
-+	intel_disable_plane(plane);
-+}
-+
- static const struct drm_plane_funcs intel_plane_funcs = {
- 	.update_plane = intel_update_plane,
- 	.disable_plane = intel_disable_plane,
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0273-drm-i915-Improve-assert_planes_disabled.patch b/patches.baytrail/0273-drm-i915-Improve-assert_planes_disabled.patch
deleted file mode 100644
index f6dca1f698e55..0000000000000
--- a/patches.baytrail/0273-drm-i915-Improve-assert_planes_disabled.patch
+++ /dev/null
@@ -1,53 +0,0 @@
-From 1a6d11332fd1b67099afac6e6d2ce6a8577beaaf Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Tue, 4 Jun 2013 13:49:05 +0300
-Subject: drm/i915: Improve assert_planes_disabled()
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Ever since gen4 primary planes were fixed to pipes.
-
-And for gen2-3, don't check plane B if it doesn't exist.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 653e10266df8319d6003fbf46ec34865a5a363f6)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 7 ++++---
- 1 file changed, 4 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index fc34abdae369..8389d954c99c 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -1105,12 +1105,13 @@ static void assert_plane(struct drm_i915_private *dev_priv,
- static void assert_planes_disabled(struct drm_i915_private *dev_priv,
- 				   enum pipe pipe)
- {
-+	struct drm_device *dev = dev_priv->dev;
- 	int reg, i;
- 	u32 val;
- 	int cur_pipe;
- 
--	/* Planes are fixed to pipes on ILK+ */
--	if (HAS_PCH_SPLIT(dev_priv->dev) || IS_VALLEYVIEW(dev_priv->dev)) {
-+	/* Primary planes are fixed to pipes on gen4+ */
-+	if (INTEL_INFO(dev)->gen >= 4) {
- 		reg = DSPCNTR(pipe);
- 		val = I915_READ(reg);
- 		WARN((val & DISPLAY_PLANE_ENABLE),
-@@ -1120,7 +1121,7 @@ static void assert_planes_disabled(struct drm_i915_private *dev_priv,
- 	}
- 
- 	/* Need to check both planes against the pipe */
--	for (i = 0; i < 2; i++) {
-+	for (i = 0; i < INTEL_INFO(dev)->num_pipes; i++) {
- 		reg = DSPCNTR(i);
- 		val = I915_READ(reg);
- 		cur_pipe = (val & DISPPLANE_SEL_PIPE_MASK) >>
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0274-drm-i915-Spruce-up-assert_sprites_disabled.patch b/patches.baytrail/0274-drm-i915-Spruce-up-assert_sprites_disabled.patch
deleted file mode 100644
index 7ebcfdeb1962a..0000000000000
--- a/patches.baytrail/0274-drm-i915-Spruce-up-assert_sprites_disabled.patch
+++ /dev/null
@@ -1,66 +0,0 @@
-From 49d01355d8d14a16287c33033085b8126d9e55ba Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Tue, 4 Jun 2013 13:49:06 +0300
-Subject: drm/i915: Spruce up assert_sprites_disabled()
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Make assert_sprites_disabled() operational on all platforms where
-we currently have sprite support enabled.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 20674eef808dada6c30988a8cfcb908406cdea02)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 27 +++++++++++++++++++--------
- 1 file changed, 19 insertions(+), 8 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 8389d954c99c..54208ba52894 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -1135,19 +1135,30 @@ static void assert_planes_disabled(struct drm_i915_private *dev_priv,
- static void assert_sprites_disabled(struct drm_i915_private *dev_priv,
- 				    enum pipe pipe)
- {
-+	struct drm_device *dev = dev_priv->dev;
- 	int reg, i;
- 	u32 val;
- 
--	if (!IS_VALLEYVIEW(dev_priv->dev))
--		return;
--
--	/* Need to check both planes against the pipe */
--	for (i = 0; i < dev_priv->num_plane; i++) {
--		reg = SPCNTR(pipe, i);
-+	if (IS_VALLEYVIEW(dev)) {
-+		for (i = 0; i < dev_priv->num_plane; i++) {
-+			reg = SPCNTR(pipe, i);
-+			val = I915_READ(reg);
-+			WARN((val & SP_ENABLE),
-+			     "sprite %c assertion failure, should be off on pipe %c but is still active\n",
-+			     sprite_name(pipe, i), pipe_name(pipe));
-+		}
-+	} else if (INTEL_INFO(dev)->gen >= 7) {
-+		reg = SPRCTL(pipe);
-+		val = I915_READ(reg);
-+		WARN((val & SPRITE_ENABLE),
-+		     "sprite %c assertion failure, should be off on pipe %c but is still active\n",
-+		     plane_name(pipe), pipe_name(pipe));
-+	} else if (INTEL_INFO(dev)->gen >= 5) {
-+		reg = DVSCNTR(pipe);
- 		val = I915_READ(reg);
--		WARN((val & SP_ENABLE),
-+		WARN((val & DVS_ENABLE),
- 		     "sprite %c assertion failure, should be off on pipe %c but is still active\n",
--		     sprite_name(pipe, i), pipe_name(pipe));
-+		     plane_name(pipe), pipe_name(pipe));
- 	}
- }
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0275-drm-i915-Assert-dpll-running-in-intel_crtc_load_lut-.patch b/patches.baytrail/0275-drm-i915-Assert-dpll-running-in-intel_crtc_load_lut-.patch
deleted file mode 100644
index 5331c5eee509c..0000000000000
--- a/patches.baytrail/0275-drm-i915-Assert-dpll-running-in-intel_crtc_load_lut-.patch
+++ /dev/null
@@ -1,48 +0,0 @@
-From 43b399b96c042230cccacac01e533d1e2464977f Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Tue, 4 Jun 2013 13:49:07 +0300
-Subject: drm/i915: Assert dpll running in intel_crtc_load_lut() on pre-PCH
- platforms
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Adding more context from Ville's reply to Rodrigo's question why we
-need this:
-
-"The spec says that on some hardware you need to PLL running before you
-can poke at the palette registers. I didn't actually try to anger the
-hardware so I'm not really sure what would happen otherwise, but IIRC
-Jesse said something about a hard system hang..."
-
-And generally documenting such ordering constraints with asserts is
-Just Good.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-[danvet: Spruce up the commit message a lot.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 14420bd0065c1757a353e36ebc9cc4bdc6932dcd)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 3 +++
- 1 file changed, 3 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 54208ba52894..63ff08834209 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -6311,6 +6311,9 @@ void intel_crtc_load_lut(struct drm_crtc *crtc)
- 	if (!crtc->enabled || !intel_crtc->active)
- 		return;
- 
-+	if (!HAS_PCH_SPLIT(dev_priv->dev))
-+		assert_pll_enabled(dev_priv, pipe);
-+
- 	/* use legacy palette for Ironlake */
- 	if (HAS_PCH_SPLIT(dev))
- 		palreg = LGC_PALETTE(pipe);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0276-drm-i915-hw-state-readout-support-for-pixel_multipli.patch b/patches.baytrail/0276-drm-i915-hw-state-readout-support-for-pixel_multipli.patch
deleted file mode 100644
index 3ee02943f9f0e..0000000000000
--- a/patches.baytrail/0276-drm-i915-hw-state-readout-support-for-pixel_multipli.patch
+++ /dev/null
@@ -1,173 +0,0 @@
-From 2976464a757dd085d72ebe29aed51604012984d5 Mon Sep 17 00:00:00 2001
-From: James Ausmus <james.ausmus@intel.com>
-Date: Mon, 23 Sep 2013 16:52:48 -0700
-Subject: drm/i915: hw state readout support for pixel_multiplier
-
-Incomplete since ilk+ support needs proper pch dpll tracking first.
-SDVO get_config parts based on a patch from Jesse Barnes, but fixed up
-to actually work.
-
-v2: Make sure that we call encoder->get_config _after_ we
-get_pipe_config to be consistent in both setup_hw_state and the
-modeset state checker. Otherwise the clever trick with handling the
-pixel mutliplier on i915G/GM where the encoder overrides the default
-value of 1 from the crtc get_pipe_config function doesn't work.
-Spotted by Imre Deak.
-
-v3: Actually cross-check the pixel mutliplier (but not on pch split
-platforms for now). Now actually also tested on a i915G with a sdvo
-encoder plugged in.
-
-Cc: Imre Deak <imre.deak@intel.com>
-Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
-Reviewed-by: Imre Deak <imre.deak@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 6c49f24180c308a07be3f1d59ee7af33184ba17e)
-
-Conflicts:
-	drivers/gpu/drm/i915/intel_display.c
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 39 ++++++++++++++++++++++++++++++++++--
- drivers/gpu/drm/i915/intel_sdvo.c    | 30 ++++++++++++++++++++++++++-
- 2 files changed, 66 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 63ff08834209..69c70dd606e3 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -5001,6 +5001,23 @@ static bool i9xx_get_pipe_config(struct intel_crtc *crtc,
- 
- 	i9xx_get_pfit_config(crtc, pipe_config);
- 
-+	if (INTEL_INFO(dev)->gen >= 4) {
-+		tmp = I915_READ(DPLL_MD(crtc->pipe));
-+		pipe_config->pixel_multiplier =
-+			((tmp & DPLL_MD_UDI_MULTIPLIER_MASK)
-+			 >> DPLL_MD_UDI_MULTIPLIER_SHIFT) + 1;
-+	} else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
-+		tmp = I915_READ(DPLL(crtc->pipe));
-+		pipe_config->pixel_multiplier =
-+			((tmp & SDVO_MULTIPLIER_MASK)
-+			 >> SDVO_MULTIPLIER_SHIFT_HIRES) + 1;
-+	} else {
-+		/* Note that on i915G/GM the pixel multiplier is in the sdvo
-+		 * port and will be fixed up in the encoder->get_config
-+		 * function. */
-+		pipe_config->pixel_multiplier = 1;
-+	}
-+
- 	return true;
- }
- 
-@@ -5864,6 +5881,12 @@ static bool ironlake_get_pipe_config(struct intel_crtc *crtc,
- 					  FDI_DP_PORT_WIDTH_SHIFT) + 1;
- 
- 		ironlake_get_fdi_m_n_config(crtc, pipe_config);
-+
-+		/* XXX: Can't properly read out the pch dpll pixel multiplier
-+		 * since we don't have state tracking for pch clocks yet. */
-+		pipe_config->pixel_multiplier = 1;
-+	} else {
-+		pipe_config->pixel_multiplier = 1;
- 	}
- 
- 	intel_get_pipe_timings(crtc, pipe_config);
-@@ -5998,6 +6021,8 @@ static bool haswell_get_pipe_config(struct intel_crtc *crtc,
- 	pipe_config->ips_enabled = hsw_crtc_supports_ips(crtc) &&
- 				   (I915_READ(IPS_CTL) & IPS_ENABLE);
- 
-+	pipe_config->pixel_multiplier = 1;
-+
- 	return true;
- }
- 
-@@ -8094,6 +8119,9 @@ intel_pipe_config_compare(struct drm_device *dev,
- 	PIPE_CONF_CHECK_I(adjusted_mode.crtc_vsync_start);
- 	PIPE_CONF_CHECK_I(adjusted_mode.crtc_vsync_end);
- 
-+	if (!HAS_PCH_SPLIT(dev))
-+		PIPE_CONF_CHECK_I(pixel_multiplier);
-+
- 	PIPE_CONF_CHECK_FLAGS(adjusted_mode.flags,
- 			      DRM_MODE_FLAG_INTERLACE);
- 
-@@ -8215,9 +8243,8 @@ intel_modeset_check_state(struct drm_device *dev)
- 			enabled = true;
- 			if (encoder->connectors_active)
- 				active = true;
--			if (encoder->get_config)
--				encoder->get_config(encoder, &pipe_config);
- 		}
-+
- 		WARN(active != crtc->active,
- 		     "crtc's computed active state doesn't match tracked active state "
- 		     "(expected %i, found %i)\n", active, crtc->active);
-@@ -8232,6 +8259,14 @@ intel_modeset_check_state(struct drm_device *dev)
- 		if (crtc->pipe == PIPE_A && dev_priv->quirks & QUIRK_PIPEA_FORCE)
- 			active = crtc->active;
- 
-+		list_for_each_entry(encoder, &dev->mode_config.encoder_list,
-+				    base.head) {
-+			if (encoder->base.crtc != &crtc->base)
-+				continue;
-+			if (encoder->get_config)
-+				encoder->get_config(encoder, &pipe_config);
-+		}
-+
- 		WARN(crtc->active != active,
- 		     "crtc active state doesn't match with hw state "
- 		     "(expected %i, found %i)\n", crtc->active, active);
-diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
-index 73179dfa5daa..785968c6916f 100644
---- a/drivers/gpu/drm/i915/intel_sdvo.c
-+++ b/drivers/gpu/drm/i915/intel_sdvo.c
-@@ -1313,9 +1313,13 @@ static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder,
- static void intel_sdvo_get_config(struct intel_encoder *encoder,
- 				  struct intel_crtc_config *pipe_config)
- {
-+	struct drm_device *dev = encoder->base.dev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
- 	struct intel_sdvo_dtd dtd;
--	u32 flags = 0;
-+	int encoder_pixel_multiplier = 0;
-+	u32 flags = 0, sdvox;
-+	u8 val;
- 	bool ret;
- 
- 	ret = intel_sdvo_get_input_timing(intel_sdvo, &dtd);
-@@ -1335,6 +1339,30 @@ static void intel_sdvo_get_config(struct intel_encoder *encoder,
- 		flags |= DRM_MODE_FLAG_NVSYNC;
- 
- 	pipe_config->adjusted_mode.flags |= flags;
-+
-+	if (IS_I915G(dev) || IS_I915GM(dev)) {
-+		sdvox = I915_READ(intel_sdvo->sdvo_reg);
-+		pipe_config->pixel_multiplier =
-+			((sdvox & SDVO_PORT_MULTIPLY_MASK)
-+			 >> SDVO_PORT_MULTIPLY_SHIFT) + 1;
-+	}
-+
-+	/* Cross check the port pixel multiplier with the sdvo encoder state. */
-+	intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_CLOCK_RATE_MULT, &val, 1);
-+	switch (val) {
-+	case SDVO_CLOCK_RATE_MULT_1X:
-+		encoder_pixel_multiplier = 1;
-+		break;
-+	case SDVO_CLOCK_RATE_MULT_2X:
-+		encoder_pixel_multiplier = 2;
-+		break;
-+	case SDVO_CLOCK_RATE_MULT_4X:
-+		encoder_pixel_multiplier = 4;
-+		break;
-+	}
-+	WARN(encoder_pixel_multiplier != pipe_config->pixel_multiplier,
-+	     "SDVO pixel multiplier mismatch, port: %i, encoder: %i\n",
-+	     pipe_config->pixel_multiplier, encoder_pixel_multiplier);
- }
- 
- static void intel_disable_sdvo(struct intel_encoder *encoder)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0277-drm-i915-update-FBC-maximum-fb-sizes.patch b/patches.baytrail/0277-drm-i915-update-FBC-maximum-fb-sizes.patch
deleted file mode 100644
index 8044c61d9e23e..0000000000000
--- a/patches.baytrail/0277-drm-i915-update-FBC-maximum-fb-sizes.patch
+++ /dev/null
@@ -1,62 +0,0 @@
-From d2f63c4f790c1be74679692e81889b55c9ffcda2 Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Tue, 4 Jun 2013 16:53:39 -0300
-Subject: drm/i915: update FBC maximum fb sizes
-
-CTG/ILK/SNB/IVB support 4kx2k surfaces. HSW supports 4kx4k, but
-without proper front buffer invalidation on the last 2k lines, so
-don't enable FBC on these cases for now.
-
-v2: Use gen >= 5, not gen > 4 (Daniel).
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit f85da868e3b998394634209cc1e48e0f4126901b)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 15 ++++++++++++---
- 1 file changed, 12 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 6ce122be6b4b..da49e46062e1 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -431,7 +431,7 @@ void intel_disable_fbc(struct drm_device *dev)
-  *   - no pixel mulitply/line duplication
-  *   - no alpha buffer discard
-  *   - no dual wide
-- *   - framebuffer <= 2048 in width, 1536 in height
-+ *   - framebuffer <= max_hdisplay in width, max_vdisplay in height
-  *
-  * We can't assume that any compression will take place (worst case),
-  * so the compressed buffer has to be the same size as the uncompressed
-@@ -449,6 +449,7 @@ void intel_update_fbc(struct drm_device *dev)
- 	struct intel_framebuffer *intel_fb;
- 	struct drm_i915_gem_object *obj;
- 	int enable_fbc;
-+	unsigned int max_hdisplay, max_vdisplay;
- 
- 	if (!i915_powersave)
- 		return;
-@@ -507,8 +508,16 @@ void intel_update_fbc(struct drm_device *dev)
- 		dev_priv->no_fbc_reason = FBC_UNSUPPORTED_MODE;
- 		goto out_disable;
- 	}
--	if ((crtc->mode.hdisplay > 2048) ||
--	    (crtc->mode.vdisplay > 1536)) {
-+
-+	if (IS_G4X(dev) || INTEL_INFO(dev)->gen >= 5) {
-+		max_hdisplay = 4096;
-+		max_vdisplay = 2048;
-+	} else {
-+		max_hdisplay = 2048;
-+		max_vdisplay = 1536;
-+	}
-+	if ((crtc->mode.hdisplay > max_hdisplay) ||
-+	    (crtc->mode.vdisplay > max_vdisplay)) {
- 		DRM_DEBUG_KMS("mode too large for compression, disabling\n");
- 		dev_priv->no_fbc_reason = FBC_MODE_TOO_LARGE;
- 		goto out_disable;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0278-i915-drm-Add-private-api-for-power-well-usage.patch b/patches.baytrail/0278-i915-drm-Add-private-api-for-power-well-usage.patch
deleted file mode 100644
index 0c60d0692f3a9..0000000000000
--- a/patches.baytrail/0278-i915-drm-Add-private-api-for-power-well-usage.patch
+++ /dev/null
@@ -1,230 +0,0 @@
-From 9466381b07a964c686d678d34ebc6079d3f5025c Mon Sep 17 00:00:00 2001
-From: Wang Xingchao <xingchao.wang@linux.intel.com>
-Date: Thu, 30 May 2013 22:07:11 +0800
-Subject: i915/drm: Add private api for power well usage
-
-Haswell Display audio depends on power well in graphic side, it should
-request power well before use it and release power well after use.
-I915 will not shutdown power well if it detects audio is using.
-This patch protects display audio crash for Intel Haswell C3 stepping board.
-
-Signed-off-by: Wang Xingchao <xingchao.wang@linux.intel.com>
-Reviewed-by: Takashi Iwai <tiwai@suse.de>
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit a38911a3fede294e2adfd2deea8104dfbbd760c5)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_dma.c  |    6 ++
- drivers/gpu/drm/i915/i915_drv.h  |   12 +++++
- drivers/gpu/drm/i915/intel_drv.h |    4 +
- drivers/gpu/drm/i915/intel_pm.c  |   81 +++++++++++++++++++++++++++++++++++----
- include/drm/i915_powerwell.h     |   36 +++++++++++++++++
- 5 files changed, 132 insertions(+), 7 deletions(-)
- create mode 100644 include/drm/i915_powerwell.h
-
---- a/drivers/gpu/drm/i915/i915_dma.c
-+++ b/drivers/gpu/drm/i915/i915_dma.c
-@@ -1642,6 +1642,9 @@ int i915_driver_load(struct drm_device *
- 	/* Start out suspended */
- 	dev_priv->mm.suspended = 1;
- 
-+	if (HAS_POWER_WELL(dev))
-+		i915_init_power_well(dev);
-+
- 	if (drm_core_check_feature(dev, DRIVER_MODESET)) {
- 		ret = i915_load_modeset_init(dev);
- 		if (ret < 0) {
-@@ -1694,6 +1697,9 @@ int i915_driver_unload(struct drm_device
- 
- 	intel_gpu_ips_teardown();
- 
-+	if (HAS_POWER_WELL(dev))
-+		i915_remove_power_well(dev);
-+
- 	i915_teardown_sysfs(dev);
- 
- 	if (dev_priv->mm.inactive_shrinker.shrink)
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -741,6 +741,15 @@ struct intel_ilk_power_mgmt {
- 	struct drm_i915_gem_object *renderctx;
- };
- 
-+/* Power well structure for haswell */
-+struct i915_power_well {
-+	struct drm_device *device;
-+	spinlock_t lock;
-+	/* power well enable/disable usage count */
-+	int count;
-+	int i915_request;
-+};
-+
- struct i915_dri1_state {
- 	unsigned allow_batchbuffer : 1;
- 	u32 __iomem *gfx_hws_cpu_addr;
-@@ -1100,6 +1109,9 @@ typedef struct drm_i915_private {
- 	 * mchdev_lock in intel_pm.c */
- 	struct intel_ilk_power_mgmt ips;
- 
-+	/* Haswell power well */
-+	struct i915_power_well power_well;
-+
- 	enum no_fbc_reason no_fbc_reason;
- 
- 	struct drm_mm_node *compressed_fb;
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -768,6 +768,10 @@ extern void intel_update_fbc(struct drm_
- extern void intel_gpu_ips_init(struct drm_i915_private *dev_priv);
- extern void intel_gpu_ips_teardown(void);
- 
-+/* Power well */
-+extern int i915_init_power_well(struct drm_device *dev);
-+extern void i915_remove_power_well(struct drm_device *dev);
-+
- extern bool intel_display_power_enabled(struct drm_device *dev,
- 					enum intel_display_power_domain domain);
- extern void intel_init_power_well(struct drm_device *dev);
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -5024,18 +5024,12 @@ bool intel_display_power_enabled(struct
- 	}
- }
- 
--void intel_set_power_well(struct drm_device *dev, bool enable)
-+static void __intel_set_power_well(struct drm_device *dev, bool enable)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	bool is_enabled, enable_requested;
- 	uint32_t tmp;
- 
--	if (!HAS_POWER_WELL(dev))
--		return;
--
--	if (!i915_disable_power_well && !enable)
--		return;
--
- 	tmp = I915_READ(HSW_PWR_WELL_DRIVER);
- 	is_enabled = tmp & HSW_PWR_WELL_STATE;
- 	enable_requested = tmp & HSW_PWR_WELL_ENABLE;
-@@ -5058,6 +5052,79 @@ void intel_set_power_well(struct drm_dev
- 	}
- }
- 
-+static struct i915_power_well *hsw_pwr;
-+
-+/* Display audio driver power well request */
-+void i915_request_power_well(void)
-+{
-+	if (WARN_ON(!hsw_pwr))
-+		return;
-+
-+	spin_lock_irq(&hsw_pwr->lock);
-+	if (!hsw_pwr->count++ &&
-+			!hsw_pwr->i915_request)
-+		__intel_set_power_well(hsw_pwr->device, true);
-+	spin_unlock_irq(&hsw_pwr->lock);
-+}
-+EXPORT_SYMBOL_GPL(i915_request_power_well);
-+
-+/* Display audio driver power well release */
-+void i915_release_power_well(void)
-+{
-+	if (WARN_ON(!hsw_pwr))
-+		return;
-+
-+	spin_lock_irq(&hsw_pwr->lock);
-+	WARN_ON(!hsw_pwr->count);
-+	if (!--hsw_pwr->count &&
-+		       !hsw_pwr->i915_request)
-+		__intel_set_power_well(hsw_pwr->device, false);
-+	spin_unlock_irq(&hsw_pwr->lock);
-+}
-+EXPORT_SYMBOL_GPL(i915_release_power_well);
-+
-+int i915_init_power_well(struct drm_device *dev)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+
-+	hsw_pwr = &dev_priv->power_well;
-+
-+	hsw_pwr->device = dev;
-+	spin_lock_init(&hsw_pwr->lock);
-+	hsw_pwr->count = 0;
-+
-+	return 0;
-+}
-+
-+void i915_remove_power_well(struct drm_device *dev)
-+{
-+	hsw_pwr = NULL;
-+}
-+
-+void intel_set_power_well(struct drm_device *dev, bool enable)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct i915_power_well *power_well = &dev_priv->power_well;
-+
-+	if (!HAS_POWER_WELL(dev))
-+		return;
-+
-+	if (!i915_disable_power_well && !enable)
-+		return;
-+
-+	spin_lock_irq(&power_well->lock);
-+	power_well->i915_request = enable;
-+
-+	/* only reject "disable" power well request */
-+	if (power_well->count && !enable) {
-+		spin_unlock_irq(&power_well->lock);
-+		return;
-+	}
-+
-+	__intel_set_power_well(dev, enable);
-+	spin_unlock_irq(&power_well->lock);
-+}
-+
- /*
-  * Starting with Haswell, we have a "Power Down Well" that can be turned off
-  * when not needed anymore. We have 4 registers that can request the power well
---- /dev/null
-+++ b/include/drm/i915_powerwell.h
-@@ -0,0 +1,36 @@
-+/**************************************************************************
-+ *
-+ * Copyright 2013 Intel Inc.
-+ * All Rights Reserved.
-+ *
-+ * Permission is hereby granted, free of charge, to any person obtaining a
-+ * copy of this software and associated documentation files (the
-+ * "Software"), to deal in the Software without restriction, including
-+ * without limitation the rights to use, copy, modify, merge, publish,
-+ * distribute, sub license, and/or sell copies of the Software, and to
-+ * permit persons to whom the Software is furnished to do so, subject to
-+ * the following conditions:
-+ *
-+ * The above copyright notice and this permission notice (including the
-+ * next paragraph) shall be included in all copies or substantial portions
-+ * of the Software.
-+ *
-+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
-+ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
-+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
-+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
-+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
-+ *
-+ *
-+ **************************************************************************/
-+
-+#ifndef _I915_POWERWELL_H_
-+#define _I915_POWERWELL_H_
-+
-+/* For use by hda_i915 driver */
-+extern void i915_request_power_well(void);
-+extern void i915_release_power_well(void);
-+
-+#endif				/* _I915_POWERWELL_H_ */
diff --git a/patches.baytrail/0279-drm-i915-pipe-config-quirk-infrastructure-plus-sdvo-.patch b/patches.baytrail/0279-drm-i915-pipe-config-quirk-infrastructure-plus-sdvo-.patch
deleted file mode 100644
index c6fea94aa030b..0000000000000
--- a/patches.baytrail/0279-drm-i915-pipe-config-quirk-infrastructure-plus-sdvo-.patch
+++ /dev/null
@@ -1,153 +0,0 @@
-From ef60f6c04841f649ef0e7c6c5c43a439fa0fe380 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 6 Jun 2013 14:55:52 +0200
-Subject: drm/i915: pipe config quirk infrastructure plus sdvo mode.flags fix
-
-For various reasons the hw state readout might not be able to
-faithfully match the hw state:
-- broken hw (like the case which motivated this patch here where the
-  sdvo encoder does not implemented mandatory functionality
-  correctly).
-- platforms which are not supported fully with the pipe config
-  infrastructure
-- if our code doesn't support a given hw configuration natively, e.g.
-  special restrictions on the per-pipe panel fitters when they're used
-  in high-quality scaling modes.
-
-In all these cases both fastboot and the hw state cross checker need
-to be aware of these cases and act accordingly. To be able to do this
-add a new quirk flag to the pipe config structure.
-
-The specific case at hand is an sdvo encoder which doesn't implement
-the get_timings function, so adjusted_mode flags will be wrong. The
-strange thing though is that the encoder _does_ work, even though it
-doesn't implement any of the timings functions (so neither get nor
-set, neither for input nor output timings).
-
-Not that non-compliant sdvo encoder are any surprise at all ...
-
-v2:
-- Don't read random garbage from the dtd if the get_timings call
-  failed (suggested by Chris).
-- Still check the interlaced flag, that's read out from someplace
-  else. We want maximal paranoia, after all.
-
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit bb760063790fbbc3c956f23aff4dbdfdd3c03818)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 22 ++++++++++++++--------
- drivers/gpu/drm/i915/intel_drv.h     | 11 +++++++++++
- drivers/gpu/drm/i915/intel_sdvo.c    | 24 +++++++++++++-----------
- 3 files changed, 38 insertions(+), 19 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 69c70dd606e3..b8851f3f4911 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -8095,6 +8095,9 @@ intel_pipe_config_compare(struct drm_device *dev,
- 		return false; \
- 	}
- 
-+#define PIPE_CONF_QUIRK(quirk)	\
-+	((current_config->quirks | pipe_config->quirks) & (quirk))
-+
- 	PIPE_CONF_CHECK_I(cpu_transcoder);
- 
- 	PIPE_CONF_CHECK_I(has_pch_encoder);
-@@ -8125,14 +8128,16 @@ intel_pipe_config_compare(struct drm_device *dev,
- 	PIPE_CONF_CHECK_FLAGS(adjusted_mode.flags,
- 			      DRM_MODE_FLAG_INTERLACE);
- 
--	PIPE_CONF_CHECK_FLAGS(adjusted_mode.flags,
--			      DRM_MODE_FLAG_PHSYNC);
--	PIPE_CONF_CHECK_FLAGS(adjusted_mode.flags,
--			      DRM_MODE_FLAG_NHSYNC);
--	PIPE_CONF_CHECK_FLAGS(adjusted_mode.flags,
--			      DRM_MODE_FLAG_PVSYNC);
--	PIPE_CONF_CHECK_FLAGS(adjusted_mode.flags,
--			      DRM_MODE_FLAG_NVSYNC);
-+	if (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS)) {
-+		PIPE_CONF_CHECK_FLAGS(adjusted_mode.flags,
-+				      DRM_MODE_FLAG_PHSYNC);
-+		PIPE_CONF_CHECK_FLAGS(adjusted_mode.flags,
-+				      DRM_MODE_FLAG_NHSYNC);
-+		PIPE_CONF_CHECK_FLAGS(adjusted_mode.flags,
-+				      DRM_MODE_FLAG_PVSYNC);
-+		PIPE_CONF_CHECK_FLAGS(adjusted_mode.flags,
-+				      DRM_MODE_FLAG_NVSYNC);
-+	}
- 
- 	PIPE_CONF_CHECK_I(requested_mode.hdisplay);
- 	PIPE_CONF_CHECK_I(requested_mode.vdisplay);
-@@ -8149,6 +8154,7 @@ intel_pipe_config_compare(struct drm_device *dev,
- 
- #undef PIPE_CONF_CHECK_I
- #undef PIPE_CONF_CHECK_FLAGS
-+#undef PIPE_CONF_QUIRK
- 
- 	return true;
- }
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index 0e5897cb8d48..a060d82f175b 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -193,6 +193,17 @@ typedef struct dpll {
- } intel_clock_t;
- 
- struct intel_crtc_config {
-+	/**
-+	 * quirks - bitfield with hw state readout quirks
-+	 *
-+	 * For various reasons the hw state readout code might not be able to
-+	 * completely faithfully read out the current state. These cases are
-+	 * tracked with quirk flags so that fastboot and state checker can act
-+	 * accordingly.
-+	 */
-+#define PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS (1<<0) /* unreliable sync mode.flags */
-+	unsigned long quirks;
-+
- 	struct drm_display_mode requested_mode;
- 	struct drm_display_mode adjusted_mode;
- 	/* This flag must be set by the encoder's compute_config callback if it
-diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
-index 785968c6916f..1262fc4a1b34 100644
---- a/drivers/gpu/drm/i915/intel_sdvo.c
-+++ b/drivers/gpu/drm/i915/intel_sdvo.c
-@@ -1324,19 +1324,21 @@ static void intel_sdvo_get_config(struct intel_encoder *encoder,
- 
- 	ret = intel_sdvo_get_input_timing(intel_sdvo, &dtd);
- 	if (!ret) {
-+		/* Some sdvo encoders are not spec compliant and don't
-+		 * implement the mandatory get_timings function. */
- 		DRM_DEBUG_DRIVER("failed to retrieve SDVO DTD\n");
--		return;
--	}
--
--	if (dtd.part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
--		flags |= DRM_MODE_FLAG_PHSYNC;
--	else
--		flags |= DRM_MODE_FLAG_NHSYNC;
-+		pipe_config->quirks |= PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS;
-+	} else {
-+		if (dtd.part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
-+			flags |= DRM_MODE_FLAG_PHSYNC;
-+		else
-+			flags |= DRM_MODE_FLAG_NHSYNC;
- 
--	if (dtd.part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
--		flags |= DRM_MODE_FLAG_PVSYNC;
--	else
--		flags |= DRM_MODE_FLAG_NVSYNC;
-+		if (dtd.part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
-+			flags |= DRM_MODE_FLAG_PVSYNC;
-+		else
-+			flags |= DRM_MODE_FLAG_NVSYNC;
-+	}
- 
- 	pipe_config->adjusted_mode.flags |= flags;
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0280-drm-i915-enable-30bpp-for-DP-outputs.patch b/patches.baytrail/0280-drm-i915-enable-30bpp-for-DP-outputs.patch
deleted file mode 100644
index 5967ca9b6e941..0000000000000
--- a/patches.baytrail/0280-drm-i915-enable-30bpp-for-DP-outputs.patch
+++ /dev/null
@@ -1,48 +0,0 @@
-From 87bfa88832b71d764b60f457e01560661f6934e1 Mon Sep 17 00:00:00 2001
-From: James Ausmus <james.ausmus@intel.com>
-Date: Mon, 23 Sep 2013 16:53:36 -0700
-Subject: drm/i915: enable 30bpp for DP outputs
-
-We always limited the link bw calculations to 24bpp. Tested with
-my shiny new high-bpc screen, seems to work as advertised.
-
-Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=65280
-Tested-by: shui yangwei <yangweix.shui@intel.com>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 3e7ca9858d51a8df2bb18b82a529df5e5f9abc51)
-
-Conflicts:
-	drivers/gpu/drm/i915/intel_dp.c
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_dp.c | 13 ++-----------
- 1 file changed, 2 insertions(+), 11 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
-index 8d11dfa9a169..0066c2314e1f 100644
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -716,17 +716,8 @@ intel_dp_compute_config(struct intel_encoder *encoder,
- 	/* Walk through all bpp values. Luckily they're all nicely spaced with 2
- 	 * bpc in between. */
- 	bpp = pipe_config->pipe_bpp;
--
--	/*
--	 * eDP panels are really fickle, try to enfore the bpp the firmware
--	 * recomments. This means we'll up-dither 16bpp framebuffers on
--	 * high-depth panels.
--	 */
--	if (is_edp(intel_dp) && dev_priv->vbt.edp_bpp) {
--		DRM_DEBUG_KMS("forcing bpp for eDP panel to BIOS-provided %i\n",
--			      dev_priv->vbt.edp_bpp);
--		bpp = dev_priv->vbt.edp_bpp;
--	}
-+	if (is_edp(intel_dp) && dev_priv->vbt.edp_bpp)
-+		bpp = min_t(int, bpp, dev_priv->vbt.edp_bpp);
- 
- 	for (; bpp >= 6*3; bpp -= 2*3) {
- 		mode_rate = intel_dp_link_required(adjusted_mode->clock, bpp);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0281-drm-i915-Disable-primary-plane-trickle-feed-for-g4x.patch b/patches.baytrail/0281-drm-i915-Disable-primary-plane-trickle-feed-for-g4x.patch
deleted file mode 100644
index 1895d87e8790e..0000000000000
--- a/patches.baytrail/0281-drm-i915-Disable-primary-plane-trickle-feed-for-g4x.patch
+++ /dev/null
@@ -1,68 +0,0 @@
-From 4b09d64485596ba706a226e2c3dc4d8bf7a787b0 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Fri, 7 Jun 2013 10:47:01 +0300
-Subject: drm/i915: Disable primary plane trickle feed for g4x
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The docs say that the trickle feed disable bit is present (for primary
-planes only, not video sprites) on CTG, and that it must be set
-for ELK. Just set it for all g4x chipsets.
-
-v2: Do it in init_clock_gating too
-
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit de1aa629aac8377bdfc55674bb8e30b5f15f418d)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 3 +++
- drivers/gpu/drm/i915/intel_pm.c      | 9 +++++++++
- 2 files changed, 12 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index b8851f3f4911..0e697bda5dab 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -1958,6 +1958,9 @@ static int i9xx_update_plane(struct drm_crtc *crtc, struct drm_framebuffer *fb,
- 			dspcntr &= ~DISPPLANE_TILED;
- 	}
- 
-+	if (IS_G4X(dev))
-+		dspcntr |= DISPPLANE_TRICKLE_FEED_DISABLE;
-+
- 	I915_WRITE(reg, dspcntr);
- 
- 	linear_offset = y * fb->pitches[0] + x * (fb->bits_per_pixel / 8);
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index e3aa054417d6..af6c0d15d896 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -4908,6 +4908,7 @@ static void g4x_init_clock_gating(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	uint32_t dspclk_gate;
-+	int pipe;
- 
- 	I915_WRITE(RENCLK_GATE_D1, 0);
- 	I915_WRITE(RENCLK_GATE_D2, VF_UNIT_CLOCK_GATE_DISABLE |
-@@ -4924,6 +4925,14 @@ static void g4x_init_clock_gating(struct drm_device *dev)
- 	/* WaDisableRenderCachePipelinedFlush */
- 	I915_WRITE(CACHE_MODE_0,
- 		   _MASKED_BIT_ENABLE(CM0_PIPELINED_RENDER_FLUSH_DISABLE));
-+
-+	for_each_pipe(pipe) {
-+		I915_WRITE(DSPCNTR(pipe),
-+			   I915_READ(DSPCNTR(pipe)) |
-+			   DISPPLANE_TRICKLE_FEED_DISABLE);
-+		intel_flush_display_plane(dev_priv, pipe);
-+	}
-+
- }
- 
- static void crestline_init_clock_gating(struct drm_device *dev)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0282-drm-i915-Disable-trickle-feed-via-MI_ARB_STATE-for-t.patch b/patches.baytrail/0282-drm-i915-Disable-trickle-feed-via-MI_ARB_STATE-for-t.patch
deleted file mode 100644
index 05880d9a6a706..0000000000000
--- a/patches.baytrail/0282-drm-i915-Disable-trickle-feed-via-MI_ARB_STATE-for-t.patch
+++ /dev/null
@@ -1,48 +0,0 @@
-From d7aa5286201c7c2b61ae4da25355314084d4645c Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Fri, 7 Jun 2013 10:47:02 +0300
-Subject: drm/i915: Disable trickle feed via MI_ARB_STATE for the gen4
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-According to BSpec, trickle feed should be disabled for BW and
-mobile CL. Those constraints seem to match all of our gen4 chipsets.
-
-Trickle feed is disabled via the MI_ARB_STATE register instead of
-per plane controls on gen4.
-
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 20f949670f51341f255b17ec4650fa69ba22cb87)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 4 ++++
- 1 file changed, 4 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index af6c0d15d896..d1e2e68edeb7 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -4944,6 +4944,8 @@ static void crestline_init_clock_gating(struct drm_device *dev)
- 	I915_WRITE(DSPCLK_GATE_D, 0);
- 	I915_WRITE(RAMCLK_GATE_D, 0);
- 	I915_WRITE16(DEUC, 0);
-+	I915_WRITE(MI_ARB_STATE,
-+		   _MASKED_BIT_ENABLE(MI_ARB_DISPLAY_TRICKLE_FEED_DISABLE));
- }
- 
- static void broadwater_init_clock_gating(struct drm_device *dev)
-@@ -4956,6 +4958,8 @@ static void broadwater_init_clock_gating(struct drm_device *dev)
- 		   I965_ISC_CLOCK_GATE_DISABLE |
- 		   I965_FBC_CLOCK_GATE_DISABLE);
- 	I915_WRITE(RENCLK_GATE_D2, 0);
-+	I915_WRITE(MI_ARB_STATE,
-+		   _MASKED_BIT_ENABLE(MI_ARB_DISPLAY_TRICKLE_FEED_DISABLE));
- }
- 
- static void gen3_init_clock_gating(struct drm_device *dev)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0283-drm-i915-Disable-trickle-feed-in-ironlake_init_clock.patch b/patches.baytrail/0283-drm-i915-Disable-trickle-feed-in-ironlake_init_clock.patch
deleted file mode 100644
index 3f3198e5e5a6d..0000000000000
--- a/patches.baytrail/0283-drm-i915-Disable-trickle-feed-in-ironlake_init_clock.patch
+++ /dev/null
@@ -1,50 +0,0 @@
-From 3993bfbeb68026e9a7bb7148bd6ad1386b243bc9 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Fri, 7 Jun 2013 10:47:03 +0300
-Subject: drm/i915: Disable trickle feed in ironlake_init_clock_gating()
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-We disable trickle feed in all the (relevant) clock gating functions,
-except ironlake_init_clock_gating(). Copy paste the same code there as
-well.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit bdad2b2f31852af4eb450d6a96e38940a0a1fdef)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 8 ++++++++
- 1 file changed, 8 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index d1e2e68edeb7..6b9718ef6266 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -4391,6 +4391,7 @@ static void ironlake_init_clock_gating(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	uint32_t dspclk_gate = ILK_VRHUNIT_CLOCK_GATE_DISABLE;
-+	int pipe;
- 
- 	/* Required for FBC */
- 	dspclk_gate |= ILK_DPFCRUNIT_CLOCK_GATE_DISABLE |
-@@ -4450,6 +4451,13 @@ static void ironlake_init_clock_gating(struct drm_device *dev)
- 	I915_WRITE(CACHE_MODE_0,
- 		   _MASKED_BIT_ENABLE(CM0_PIPELINED_RENDER_FLUSH_DISABLE));
- 
-+	for_each_pipe(pipe) {
-+		I915_WRITE(DSPCNTR(pipe),
-+			   I915_READ(DSPCNTR(pipe)) |
-+			   DISPPLANE_TRICKLE_FEED_DISABLE);
-+		intel_flush_display_plane(dev_priv, pipe);
-+	}
-+
- 	ibx_init_clock_gating(dev);
- }
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0284-drm-i915-Refactor-ctg-trickle-feed-disable.patch b/patches.baytrail/0284-drm-i915-Refactor-ctg-trickle-feed-disable.patch
deleted file mode 100644
index 377f817122551..0000000000000
--- a/patches.baytrail/0284-drm-i915-Refactor-ctg-trickle-feed-disable.patch
+++ /dev/null
@@ -1,177 +0,0 @@
-From 737c37212b1b3f98e929ef03a20b7d49ceef4e81 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Fri, 7 Jun 2013 10:47:04 +0300
-Subject: drm/i915: Refactor ctg+ trickle feed disable
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Pull the code to disable trickle feed for all primary planes into a
-separate function.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 0e088b8f33dab39bd8beb0c7a030d44beb936dd0)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 62 +++++++++++++----------------------------
- 1 file changed, 19 insertions(+), 43 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 6b9718ef6266..b5959c49a6f4 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -4387,11 +4387,23 @@ static void ibx_init_clock_gating(struct drm_device *dev)
- 	I915_WRITE(SOUTH_DSPCLK_GATE_D, PCH_DPLSUNIT_CLOCK_GATE_DISABLE);
- }
- 
-+static void g4x_disable_trickle_feed(struct drm_device *dev)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	int pipe;
-+
-+	for_each_pipe(pipe) {
-+		I915_WRITE(DSPCNTR(pipe),
-+			   I915_READ(DSPCNTR(pipe)) |
-+			   DISPPLANE_TRICKLE_FEED_DISABLE);
-+		intel_flush_display_plane(dev_priv, pipe);
-+	}
-+}
-+
- static void ironlake_init_clock_gating(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	uint32_t dspclk_gate = ILK_VRHUNIT_CLOCK_GATE_DISABLE;
--	int pipe;
- 
- 	/* Required for FBC */
- 	dspclk_gate |= ILK_DPFCRUNIT_CLOCK_GATE_DISABLE |
-@@ -4451,12 +4463,7 @@ static void ironlake_init_clock_gating(struct drm_device *dev)
- 	I915_WRITE(CACHE_MODE_0,
- 		   _MASKED_BIT_ENABLE(CM0_PIPELINED_RENDER_FLUSH_DISABLE));
- 
--	for_each_pipe(pipe) {
--		I915_WRITE(DSPCNTR(pipe),
--			   I915_READ(DSPCNTR(pipe)) |
--			   DISPPLANE_TRICKLE_FEED_DISABLE);
--		intel_flush_display_plane(dev_priv, pipe);
--	}
-+	g4x_disable_trickle_feed(dev);
- 
- 	ibx_init_clock_gating(dev);
- }
-@@ -4512,7 +4519,6 @@ static void gen6_check_mch_setup(struct drm_device *dev)
- static void gen6_init_clock_gating(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
--	int pipe;
- 	uint32_t dspclk_gate = ILK_VRHUNIT_CLOCK_GATE_DISABLE;
- 
- 	I915_WRITE(ILK_DSPCLK_GATE_D, dspclk_gate);
-@@ -4588,12 +4594,7 @@ static void gen6_init_clock_gating(struct drm_device *dev)
- 	I915_WRITE(GEN6_MBCTL, I915_READ(GEN6_MBCTL) |
- 		   GEN6_MBCTL_ENABLE_BOOT_FETCH);
- 
--	for_each_pipe(pipe) {
--		I915_WRITE(DSPCNTR(pipe),
--			   I915_READ(DSPCNTR(pipe)) |
--			   DISPPLANE_TRICKLE_FEED_DISABLE);
--		intel_flush_display_plane(dev_priv, pipe);
--	}
-+	g4x_disable_trickle_feed(dev);
- 
- 	/* The default value should be 0x200 according to docs, but the two
- 	 * platforms I checked have a 0 for this. (Maybe BIOS overrides?) */
-@@ -4654,7 +4655,6 @@ static void lpt_suspend_hw(struct drm_device *dev)
- static void haswell_init_clock_gating(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
--	int pipe;
- 
- 	I915_WRITE(WM3_LP_ILK, 0);
- 	I915_WRITE(WM2_LP_ILK, 0);
-@@ -4680,12 +4680,7 @@ static void haswell_init_clock_gating(struct drm_device *dev)
- 			I915_READ(GEN7_SQ_CHICKEN_MBCUNIT_CONFIG) |
- 			GEN7_SQ_CHICKEN_MBCUNIT_SQINTMOB);
- 
--	for_each_pipe(pipe) {
--		I915_WRITE(DSPCNTR(pipe),
--			   I915_READ(DSPCNTR(pipe)) |
--			   DISPPLANE_TRICKLE_FEED_DISABLE);
--		intel_flush_display_plane(dev_priv, pipe);
--	}
-+	g4x_disable_trickle_feed(dev);
- 
- 	/* WaVSRefCountFullforceMissDisable:hsw */
- 	gen7_setup_fixed_func_scheduler(dev_priv);
-@@ -4711,7 +4706,6 @@ static void haswell_init_clock_gating(struct drm_device *dev)
- static void ivybridge_init_clock_gating(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
--	int pipe;
- 	uint32_t snpcr;
- 
- 	I915_WRITE(WM3_LP_ILK, 0);
-@@ -4780,12 +4774,7 @@ static void ivybridge_init_clock_gating(struct drm_device *dev)
- 			I915_READ(GEN7_SQ_CHICKEN_MBCUNIT_CONFIG) |
- 			GEN7_SQ_CHICKEN_MBCUNIT_SQINTMOB);
- 
--	for_each_pipe(pipe) {
--		I915_WRITE(DSPCNTR(pipe),
--			   I915_READ(DSPCNTR(pipe)) |
--			   DISPPLANE_TRICKLE_FEED_DISABLE);
--		intel_flush_display_plane(dev_priv, pipe);
--	}
-+	g4x_disable_trickle_feed(dev);
- 
- 	/* WaMbcDriverBootEnable:ivb */
- 	I915_WRITE(GEN6_MBCTL, I915_READ(GEN6_MBCTL) |
-@@ -4812,7 +4801,6 @@ static void ivybridge_init_clock_gating(struct drm_device *dev)
- static void valleyview_init_clock_gating(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
--	int pipe;
- 
- 	I915_WRITE(DSPCLK_GATE_D, VRHUNIT_CLOCK_GATE_DISABLE);
- 
-@@ -4885,12 +4873,7 @@ static void valleyview_init_clock_gating(struct drm_device *dev)
- 
- 	I915_WRITE(GEN7_UCGCTL4, GEN7_L3BANK2X_CLOCK_GATE_DISABLE);
- 
--	for_each_pipe(pipe) {
--		I915_WRITE(DSPCNTR(pipe),
--			   I915_READ(DSPCNTR(pipe)) |
--			   DISPPLANE_TRICKLE_FEED_DISABLE);
--		intel_flush_display_plane(dev_priv, pipe);
--	}
-+	g4x_disable_trickle_feed(dev);
- 
- 	I915_WRITE(CACHE_MODE_1,
- 		   _MASKED_BIT_ENABLE(PIXEL_SUBSPAN_COLLECT_OPT_DISABLE));
-@@ -4916,7 +4899,6 @@ static void g4x_init_clock_gating(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	uint32_t dspclk_gate;
--	int pipe;
- 
- 	I915_WRITE(RENCLK_GATE_D1, 0);
- 	I915_WRITE(RENCLK_GATE_D2, VF_UNIT_CLOCK_GATE_DISABLE |
-@@ -4934,13 +4916,7 @@ static void g4x_init_clock_gating(struct drm_device *dev)
- 	I915_WRITE(CACHE_MODE_0,
- 		   _MASKED_BIT_ENABLE(CM0_PIPELINED_RENDER_FLUSH_DISABLE));
- 
--	for_each_pipe(pipe) {
--		I915_WRITE(DSPCNTR(pipe),
--			   I915_READ(DSPCNTR(pipe)) |
--			   DISPPLANE_TRICKLE_FEED_DISABLE);
--		intel_flush_display_plane(dev_priv, pipe);
--	}
--
-+	g4x_disable_trickle_feed(dev);
- }
- 
- static void crestline_init_clock_gating(struct drm_device *dev)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0285-drm-i915-Track-when-we-dirty-the-scanout-with-render.patch b/patches.baytrail/0285-drm-i915-Track-when-we-dirty-the-scanout-with-render.patch
deleted file mode 100644
index 8e3397ad0d8b5..0000000000000
--- a/patches.baytrail/0285-drm-i915-Track-when-we-dirty-the-scanout-with-render.patch
+++ /dev/null
@@ -1,100 +0,0 @@
-From 1bf78c2350823f98ee9e5ed70c517805b80fae03 Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Thu, 6 Jun 2013 16:53:41 -0300
-Subject: drm/i915: Track when we dirty the scanout with render commands
-
-This is required for tracking render damage for use with FBC and will be
-used in subsequent patches.
-
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit c65355bbefaf02d8819a810aacfd566634e3b146)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem_execbuffer.c |  2 +-
- drivers/gpu/drm/i915/intel_display.c       | 13 +++++++++----
- drivers/gpu/drm/i915/intel_drv.h           |  3 ++-
- drivers/gpu/drm/i915/intel_ringbuffer.h    |  1 +
- 4 files changed, 13 insertions(+), 6 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-index a8bb62ca8756..c98333d74111 100644
---- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-@@ -786,7 +786,7 @@ i915_gem_execbuffer_move_to_active(struct list_head *objects,
- 			obj->dirty = 1;
- 			obj->last_write_seqno = intel_ring_get_seqno(ring);
- 			if (obj->pin_count) /* check for potential scanout */
--				intel_mark_fb_busy(obj);
-+				intel_mark_fb_busy(obj, ring);
- 		}
- 
- 		trace_i915_gem_object_change_domain(obj, old_read, old_write);
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 0e697bda5dab..ddc8eea42b19 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -7116,7 +7116,8 @@ void intel_mark_idle(struct drm_device *dev)
- 	}
- }
- 
--void intel_mark_fb_busy(struct drm_i915_gem_object *obj)
-+void intel_mark_fb_busy(struct drm_i915_gem_object *obj,
-+			struct intel_ring_buffer *ring)
- {
- 	struct drm_device *dev = obj->base.dev;
- 	struct drm_crtc *crtc;
-@@ -7128,8 +7129,12 @@ void intel_mark_fb_busy(struct drm_i915_gem_object *obj)
- 		if (!crtc->fb)
- 			continue;
- 
--		if (to_intel_framebuffer(crtc->fb)->obj == obj)
--			intel_increase_pllclock(crtc);
-+		if (to_intel_framebuffer(crtc->fb)->obj != obj)
-+			continue;
-+
-+		intel_increase_pllclock(crtc);
-+		if (ring && intel_fbc_enabled(dev))
-+			ring->fbc_dirty = true;
- 	}
- }
- 
-@@ -7579,7 +7584,7 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
- 		goto cleanup_pending;
- 
- 	intel_disable_fbc(dev);
--	intel_mark_fb_busy(obj);
-+	intel_mark_fb_busy(obj, NULL);
- 	mutex_unlock(&dev->struct_mutex);
- 
- 	trace_i915_flip_request(intel_crtc->plane, obj);
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index a060d82f175b..259a6873aacc 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -574,7 +574,8 @@ extern bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg,
- extern void intel_dvo_init(struct drm_device *dev);
- extern void intel_tv_init(struct drm_device *dev);
- extern void intel_mark_busy(struct drm_device *dev);
--extern void intel_mark_fb_busy(struct drm_i915_gem_object *obj);
-+extern void intel_mark_fb_busy(struct drm_i915_gem_object *obj,
-+			       struct intel_ring_buffer *ring);
- extern void intel_mark_idle(struct drm_device *dev);
- extern bool intel_lvds_init(struct drm_device *dev);
- extern bool intel_is_dual_link_lvds(struct drm_device *dev);
-diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
-index 4c7e103e6fa4..efc403d1e3e0 100644
---- a/drivers/gpu/drm/i915/intel_ringbuffer.h
-+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
-@@ -140,6 +140,7 @@ struct  intel_ring_buffer {
- 	 */
- 	u32 outstanding_lazy_request;
- 	bool gpu_caches_dirty;
-+	bool fbc_dirty;
- 
- 	wait_queue_head_t irq_queue;
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0286-drm-i915-WA-FBC-Render-Nuke.patch b/patches.baytrail/0286-drm-i915-WA-FBC-Render-Nuke.patch
deleted file mode 100644
index 5b2f633262104..0000000000000
--- a/patches.baytrail/0286-drm-i915-WA-FBC-Render-Nuke.patch
+++ /dev/null
@@ -1,127 +0,0 @@
-From 68449b3aaa8c55dd83dc7f21f0c2496238961987 Mon Sep 17 00:00:00 2001
-From: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Date: Thu, 6 Jun 2013 16:58:16 -0300
-Subject: drm/i915: WA: FBC Render Nuke.
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-WaFbcNukeOn3DBlt for IVB, HSW.
-
-According BSPec: "Workaround: Do not enable Render Command Streamer tracking for FBC.
-Instead insert a LRI to address 0x50380 with data 0x00000004 after the PIPE_CONTROL that
-follows each render submission."
-
-v2: Chris noticed that flush_domains check was missing here and also suggested to do
-    LRI only when fbc is enabled. To avoid do a I915_READ on every flush lets use the
-    module parameter check.
-
-v3: Adding Wa name as Damien suggested.
-
-v4: Ville noticed VLV doesn't support fbc at all and comment came wrong from spec.
-
-v5: Ville noticed than on blt a Cache Clean LRI should be used instead the Nuke one.
-
-v6: Check for flush domain on blt (by Ville).
-    Check for scanout dirty (by Chris).
-
-v7: Apply proper fbc_dirty implemented by Chris.
-
-v8: remove unused variables.
-
-Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Cc: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit fd3da6c95b6d865446fa9b29df6edff4343e385a)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_reg.h         |    4 ++++
- drivers/gpu/drm/i915/intel_pm.c         |    2 +-
- drivers/gpu/drm/i915/intel_ringbuffer.c |   29 +++++++++++++++++++++++++++++
- 3 files changed, 34 insertions(+), 1 deletion(-)
-
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -1022,6 +1022,10 @@
- #define IPS_CTL		0x43408
- #define   IPS_ENABLE	(1 << 31)
- 
-+#define MSG_FBC_REND_STATE	0x50380
-+#define   FBC_REND_NUKE		(1<<2)
-+#define   FBC_REND_CACHE_CLEAN	(1<<1)
-+
- #define _HSW_PIPE_SLICE_CHICKEN_1_A	0x420B0
- #define _HSW_PIPE_SLICE_CHICKEN_1_B	0x420B4
- #define   HSW_BYPASS_FBC_QUEUE		(1<<22)
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -274,7 +274,7 @@ static void gen7_enable_fbc(struct drm_c
- 	struct drm_i915_gem_object *obj = intel_fb->obj;
- 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
- 
--	I915_WRITE(IVB_FBC_RT_BASE, obj->gtt_offset | ILK_FBC_RT_VALID);
-+	I915_WRITE(IVB_FBC_RT_BASE, obj->gtt_offset);
- 
- 	I915_WRITE(ILK_DPFC_CONTROL, DPFC_CTL_EN | DPFC_CTL_LIMIT_1X |
- 		   IVB_DPFC_CTL_FENCE_EN |
---- a/drivers/gpu/drm/i915/intel_ringbuffer.c
-+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
-@@ -280,6 +280,27 @@ gen7_render_ring_cs_stall_wa(struct inte
- 	return 0;
- }
- 
-+static int gen7_ring_fbc_flush(struct intel_ring_buffer *ring, u32 value)
-+{
-+	int ret;
-+
-+	if (!ring->fbc_dirty)
-+		return 0;
-+
-+	ret = intel_ring_begin(ring, 4);
-+	if (ret)
-+		return ret;
-+	intel_ring_emit(ring, MI_NOOP);
-+	/* WaFbcNukeOn3DBlt:ivb/hsw */
-+	intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1));
-+	intel_ring_emit(ring, MSG_FBC_REND_STATE);
-+	intel_ring_emit(ring, value);
-+	intel_ring_advance(ring);
-+
-+	ring->fbc_dirty = false;
-+	return 0;
-+}
-+
- static int
- gen7_render_ring_flush(struct intel_ring_buffer *ring,
- 		       u32 invalidate_domains, u32 flush_domains)
-@@ -336,6 +357,9 @@ gen7_render_ring_flush(struct intel_ring
- 	intel_ring_emit(ring, 0);
- 	intel_ring_advance(ring);
- 
-+	if (flush_domains)
-+		return gen7_ring_fbc_flush(ring, FBC_REND_NUKE);
-+
- 	return 0;
- }
- 
-@@ -1700,6 +1724,7 @@ gen6_ring_dispatch_execbuffer(struct int
- static int gen6_ring_flush(struct intel_ring_buffer *ring,
- 			   u32 invalidate, u32 flush)
- {
-+	struct drm_device *dev = ring->dev;
- 	uint32_t cmd;
- 	int ret;
- 
-@@ -1722,6 +1747,10 @@ static int gen6_ring_flush(struct intel_
- 	intel_ring_emit(ring, 0);
- 	intel_ring_emit(ring, MI_NOOP);
- 	intel_ring_advance(ring);
-+
-+	if (IS_GEN7(dev) && flush)
-+		return gen7_ring_fbc_flush(ring, FBC_REND_CACHE_CLEAN);
-+
- 	return 0;
- }
- 
diff --git a/patches.baytrail/0287-drm-i915-Make-g4x_fixup_plane-operational-again.patch b/patches.baytrail/0287-drm-i915-Make-g4x_fixup_plane-operational-again.patch
deleted file mode 100644
index 66d8d7197f85c..0000000000000
--- a/patches.baytrail/0287-drm-i915-Make-g4x_fixup_plane-operational-again.patch
+++ /dev/null
@@ -1,58 +0,0 @@
-From 9b607b4b4d58ea16c1cc333882e8147d7bd6fe18 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Fri, 7 Jun 2013 18:52:24 +0300
-Subject: drm/i915: Make g4x_fixup_plane() operational again
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Don't enable the cursor until g4x_fixup_plane() had a chance to do
-cast its magic spell.
-
-Egbert writes:
-"Today I had the chance to test this. First I tried
- if I can still reproduce the blank with this patch
- added when I disable my voodoo g4x_fixup_plane():
- It turned out it still happens however very rarely
- (like 1 out of 20 tries). When I reenabled my voodoo
- the issue still occurred.
- I had to switch two lines around, ie:
-
-         intel_enable_plane(dev_priv, plane, pipe);
-         if (IS_G4X(dev))
-                 g4x_fixup_plane(dev_priv, pipe);
- +       intel_crtc_update_cursor(crtc, true);
-
- to avoid the blank screen issue - which is it didn't
- happen in ~75 tries."
-
-v2: Add a comment to remind people of the ordering constraints
-
-Acked-by: Egbert Eich <eich@suse.com>
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 22e407d749a418b4bb4cc93ef76e0429a9f83c82)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index ddc8eea42b19..8927b3fb1982 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -3700,9 +3700,10 @@ static void i9xx_crtc_enable(struct drm_crtc *crtc)
- 	intel_enable_pipe(dev_priv, pipe, false);
- 	intel_enable_plane(dev_priv, plane, pipe);
- 	intel_enable_planes(crtc);
--	intel_crtc_update_cursor(crtc, true);
-+	/* The fixup needs to happen before cursor is enabled */
- 	if (IS_G4X(dev))
- 		g4x_fixup_plane(dev_priv, pipe);
-+	intel_crtc_update_cursor(crtc, true);
- 
- 	/* Give the overlay scaler a chance to enable if it's on this pipe */
- 	intel_crtc_dpms_overlay(intel_crtc, true);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0288-drm-i915-Remove-dead-code-from-SDVO-initialisation.patch b/patches.baytrail/0288-drm-i915-Remove-dead-code-from-SDVO-initialisation.patch
deleted file mode 100644
index 2a9959288699d..0000000000000
--- a/patches.baytrail/0288-drm-i915-Remove-dead-code-from-SDVO-initialisation.patch
+++ /dev/null
@@ -1,53 +0,0 @@
-From 8181e51dcbe56fc572c292e5e4aaed8a9aa4bdf3 Mon Sep 17 00:00:00 2001
-From: James Ausmus <james.ausmus@intel.com>
-Date: Mon, 23 Sep 2013 16:53:57 -0700
-Subject: drm/i915: Remove dead code from SDVO initialisation
-
-The hotplug_mask is no longer used as the hpd interrupt setup is now
-handled in the core.
-
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit e596a02ccfc6503ae5c37b14c74b6b743eefe102)
-
-Conflicts:
-	drivers/gpu/drm/i915/intel_sdvo.c
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_sdvo.c | 13 -------------
- 1 file changed, 13 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
-index 1262fc4a1b34..5c53fc79977a 100644
---- a/drivers/gpu/drm/i915/intel_sdvo.c
-+++ b/drivers/gpu/drm/i915/intel_sdvo.c
-@@ -2850,7 +2850,6 @@ bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob)
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct intel_encoder *intel_encoder;
- 	struct intel_sdvo *intel_sdvo;
--	u32 hotplug_mask;
- 	int i;
- 	intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
- 	if (!intel_sdvo)
-@@ -2879,18 +2878,6 @@ bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob)
- 		}
- 	}
- 
--	hotplug_mask = 0;
--	if (IS_G4X(dev)) {
--		hotplug_mask = intel_sdvo->is_sdvob ?
--			SDVOB_HOTPLUG_INT_STATUS_G4X : SDVOC_HOTPLUG_INT_STATUS_G4X;
--	} else if (IS_GEN4(dev)) {
--		hotplug_mask = intel_sdvo->is_sdvob ?
--			SDVOB_HOTPLUG_INT_STATUS_I965 : SDVOC_HOTPLUG_INT_STATUS_I965;
--	} else {
--		hotplug_mask = intel_sdvo->is_sdvob ?
--			SDVOB_HOTPLUG_INT_STATUS_I915 : SDVOC_HOTPLUG_INT_STATUS_I915;
--	}
--
- 	intel_encoder->compute_config = intel_sdvo_compute_config;
- 	intel_encoder->disable = intel_disable_sdvo;
- 	intel_encoder->mode_set = intel_sdvo_mode_set;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0289-drm-i915-Use-FBINFO_STATE-defines-instead-of-0-and-1.patch b/patches.baytrail/0289-drm-i915-Use-FBINFO_STATE-defines-instead-of-0-and-1.patch
deleted file mode 100644
index d16b8accf51a9..0000000000000
--- a/patches.baytrail/0289-drm-i915-Use-FBINFO_STATE-defines-instead-of-0-and-1.patch
+++ /dev/null
@@ -1,65 +0,0 @@
-From 03a5ee0baf3d7ec0d492a368ee97098b729ccb4e Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Mon, 10 Jun 2013 15:48:09 +0100
-Subject: drm/i915: Use FBINFO_STATE defines instead of 0 and 1
-
-This makes, arguably, the condition on state easier to read.
-
-Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit b6f3eff7130bbdb3d3ca5b7bbff2384b362606b4)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.c | 6 +++---
- drivers/gpu/drm/i915/intel_fb.c | 2 +-
- 2 files changed, 4 insertions(+), 4 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
-index 4ae308e845d4..0b1edad2b4df 100644
---- a/drivers/gpu/drm/i915/i915_drv.c
-+++ b/drivers/gpu/drm/i915/i915_drv.c
-@@ -570,7 +570,7 @@ static int i915_drm_freeze(struct drm_device *dev)
- 	intel_opregion_fini(dev);
- 
- 	console_lock();
--	intel_fbdev_set_suspend(dev, 1);
-+	intel_fbdev_set_suspend(dev, FBINFO_STATE_SUSPENDED);
- 	console_unlock();
- 
- 	return 0;
-@@ -614,7 +614,7 @@ void intel_console_resume(struct work_struct *work)
- 	struct drm_device *dev = dev_priv->dev;
- 
- 	console_lock();
--	intel_fbdev_set_suspend(dev, 0);
-+	intel_fbdev_set_suspend(dev, FBINFO_STATE_RUNNING);
- 	console_unlock();
- }
- 
-@@ -683,7 +683,7 @@ static int __i915_drm_thaw(struct drm_device *dev)
- 	 * path of resume if possible.
- 	 */
- 	if (console_trylock()) {
--		intel_fbdev_set_suspend(dev, 0);
-+		intel_fbdev_set_suspend(dev, FBINFO_STATE_RUNNING);
- 		console_unlock();
- 	} else {
- 		schedule_work(&dev_priv->console_resume_work);
-diff --git a/drivers/gpu/drm/i915/intel_fb.c b/drivers/gpu/drm/i915/intel_fb.c
-index 7f3ac54b56e9..dff669e2387f 100644
---- a/drivers/gpu/drm/i915/intel_fb.c
-+++ b/drivers/gpu/drm/i915/intel_fb.c
-@@ -275,7 +275,7 @@ void intel_fbdev_set_suspend(struct drm_device *dev, int state)
- 	 * been restored from swap. If the object is stolen however, it will be
- 	 * full of whatever garbage was left in there.
- 	 */
--	if (!state && ifbdev->ifb.obj->stolen)
-+	if (state == FBINFO_STATE_RUNNING && ifbdev->ifb.obj->stolen)
- 		memset_io(info->screen_base, 0, info->screen_size);
- 
- 	fb_set_suspend(info, state);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0290-drm-i915-fix-up-pch-pll-handling-in-mode_set.patch b/patches.baytrail/0290-drm-i915-fix-up-pch-pll-handling-in-mode_set.patch
deleted file mode 100644
index b42705bfe4476..0000000000000
--- a/patches.baytrail/0290-drm-i915-fix-up-pch-pll-handling-in-mode_set.patch
+++ /dev/null
@@ -1,103 +0,0 @@
-From 35cb46d950d8e9a098f6b2cb5eb24c5d7c1e3f46 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Wed, 5 Jun 2013 13:34:03 +0200
-Subject: drm/i915: fix up pch pll handling in ->mode_set
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-We ->mode_set is called we can't just blindly reuse an existing pll
-since that might be shared with a different, still active pch output.
-
-v2: Only update the pll settings when the pch pll is know to be
-unused, otherwise we can wreak havoc with a running pipe. Which in the
-case of DP will likely result in a black screen due to loss of link
-lock.
-
-v3: Tighten up the asserts a bit more, especially make sure that the
-pch pll is still enabled when we try to disable it. This would have
-caught the bug fixed in this patch.
-
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit cdbd2316a03f68b25a135a34d1d24f01ddef0c53)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 35 +++++++++++++++++++----------------
- 1 file changed, 19 insertions(+), 16 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 8927b3fb1982..89722233ad8b 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -1427,7 +1427,8 @@ static void ironlake_enable_pch_pll(struct intel_crtc *intel_crtc)
- 	/* PCH refclock must be enabled first */
- 	assert_pch_refclk_enabled(dev_priv);
- 
--	if (pll->active++ && pll->on) {
-+	if (pll->active++) {
-+		WARN_ON(!pll->on);
- 		assert_pch_pll_enabled(dev_priv, pll, NULL);
- 		return;
- 	}
-@@ -1468,10 +1469,9 @@ static void intel_disable_pch_pll(struct intel_crtc *intel_crtc)
- 		return;
- 	}
- 
--	if (--pll->active) {
--		assert_pch_pll_enabled(dev_priv, pll, NULL);
-+	assert_pch_pll_enabled(dev_priv, pll, NULL);
-+	if (--pll->active)
- 		return;
--	}
- 
- 	DRM_DEBUG_KMS("disabling PCH PLL %x\n", pll->pll_reg);
- 
-@@ -3081,9 +3081,9 @@ static struct intel_pch_pll *intel_get_pch_pll(struct intel_crtc *intel_crtc, u3
- 
- 	pll = intel_crtc->pch_pll;
- 	if (pll) {
--		DRM_DEBUG_KMS("CRTC:%d reusing existing PCH PLL %x\n",
-+		DRM_DEBUG_KMS("CRTC:%d dropping existing PCH PLL %x\n",
- 			      intel_crtc->base.base.id, pll->pll_reg);
--		goto prepare;
-+		intel_put_pch_pll(intel_crtc);
- 	}
- 
- 	if (HAS_PCH_IBX(dev_priv->dev)) {
-@@ -3128,19 +3128,22 @@ static struct intel_pch_pll *intel_get_pch_pll(struct intel_crtc *intel_crtc, u3
- 
- found:
- 	intel_crtc->pch_pll = pll;
--	pll->refcount++;
- 	DRM_DEBUG_DRIVER("using pll %d for pipe %c\n", i, pipe_name(intel_crtc->pipe));
--prepare: /* separate function? */
--	DRM_DEBUG_DRIVER("switching PLL %x off\n", pll->pll_reg);
-+	if (pll->active == 0) {
-+		DRM_DEBUG_DRIVER("setting up pll %d\n", i);
-+		WARN_ON(pll->on);
-+		assert_pch_pll_disabled(dev_priv, pll, NULL);
- 
--	/* Wait for the clocks to stabilize before rewriting the regs */
--	I915_WRITE(pll->pll_reg, dpll & ~DPLL_VCO_ENABLE);
--	POSTING_READ(pll->pll_reg);
--	udelay(150);
-+		/* Wait for the clocks to stabilize before rewriting the regs */
-+		I915_WRITE(pll->pll_reg, dpll & ~DPLL_VCO_ENABLE);
-+		POSTING_READ(pll->pll_reg);
-+		udelay(150);
-+
-+		I915_WRITE(pll->fp0_reg, fp);
-+		I915_WRITE(pll->pll_reg, dpll & ~DPLL_VCO_ENABLE);
-+	}
-+	pll->refcount++;
- 
--	I915_WRITE(pll->fp0_reg, fp);
--	I915_WRITE(pll->pll_reg, dpll & ~DPLL_VCO_ENABLE);
--	pll->on = false;
- 	return pll;
- }
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0291-drm-i915-conditionally-disable-pch-resources-in-ilk_.patch b/patches.baytrail/0291-drm-i915-conditionally-disable-pch-resources-in-ilk_.patch
deleted file mode 100644
index d130c2aa459cf..0000000000000
--- a/patches.baytrail/0291-drm-i915-conditionally-disable-pch-resources-in-ilk_.patch
+++ /dev/null
@@ -1,114 +0,0 @@
-From 3194c15479a09ab1d6690c3caf98a5325fed8f4c Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Wed, 5 Jun 2013 13:34:04 +0200
-Subject: drm/i915: conditionally disable pch resources in ilk_crtc_disable
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Simlar to how disable already works on haswell. This is possible
-since we now carefully track the pch state in the pipe config.
-
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit d925c59a8174c8c150da7e0a38e35d89a8e7149c)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 69 +++++++++++++++++++-----------------
- 1 file changed, 37 insertions(+), 32 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 89722233ad8b..74412d011df9 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -3436,7 +3436,9 @@ static void ironlake_crtc_disable(struct drm_crtc *crtc)
- 	intel_disable_planes(crtc);
- 	intel_disable_plane(dev_priv, plane, pipe);
- 
--	intel_set_pch_fifo_underrun_reporting(dev, pipe, false);
-+	if (intel_crtc->config.has_pch_encoder)
-+		intel_set_pch_fifo_underrun_reporting(dev, pipe, false);
-+
- 	intel_disable_pipe(dev_priv, pipe);
- 
- 	ironlake_pfit_disable(intel_crtc);
-@@ -3445,42 +3447,45 @@ static void ironlake_crtc_disable(struct drm_crtc *crtc)
- 		if (encoder->post_disable)
- 			encoder->post_disable(encoder);
- 
--	ironlake_fdi_disable(crtc);
-+	if (intel_crtc->config.has_pch_encoder) {
-+		ironlake_fdi_disable(crtc);
- 
--	ironlake_disable_pch_transcoder(dev_priv, pipe);
--	intel_set_pch_fifo_underrun_reporting(dev, pipe, true);
-+		ironlake_disable_pch_transcoder(dev_priv, pipe);
-+		intel_set_pch_fifo_underrun_reporting(dev, pipe, true);
- 
--	if (HAS_PCH_CPT(dev)) {
--		/* disable TRANS_DP_CTL */
--		reg = TRANS_DP_CTL(pipe);
--		temp = I915_READ(reg);
--		temp &= ~(TRANS_DP_OUTPUT_ENABLE | TRANS_DP_PORT_SEL_MASK);
--		temp |= TRANS_DP_PORT_SEL_NONE;
--		I915_WRITE(reg, temp);
--
--		/* disable DPLL_SEL */
--		temp = I915_READ(PCH_DPLL_SEL);
--		switch (pipe) {
--		case 0:
--			temp &= ~(TRANSA_DPLL_ENABLE | TRANSA_DPLLB_SEL);
--			break;
--		case 1:
--			temp &= ~(TRANSB_DPLL_ENABLE | TRANSB_DPLLB_SEL);
--			break;
--		case 2:
--			/* C shares PLL A or B */
--			temp &= ~(TRANSC_DPLL_ENABLE | TRANSC_DPLLB_SEL);
--			break;
--		default:
--			BUG(); /* wtf */
-+		if (HAS_PCH_CPT(dev)) {
-+			/* disable TRANS_DP_CTL */
-+			reg = TRANS_DP_CTL(pipe);
-+			temp = I915_READ(reg);
-+			temp &= ~(TRANS_DP_OUTPUT_ENABLE |
-+				  TRANS_DP_PORT_SEL_MASK);
-+			temp |= TRANS_DP_PORT_SEL_NONE;
-+			I915_WRITE(reg, temp);
-+
-+			/* disable DPLL_SEL */
-+			temp = I915_READ(PCH_DPLL_SEL);
-+			switch (pipe) {
-+			case 0:
-+				temp &= ~(TRANSA_DPLL_ENABLE | TRANSA_DPLLB_SEL);
-+				break;
-+			case 1:
-+				temp &= ~(TRANSB_DPLL_ENABLE | TRANSB_DPLLB_SEL);
-+				break;
-+			case 2:
-+				/* C shares PLL A or B */
-+				temp &= ~(TRANSC_DPLL_ENABLE | TRANSC_DPLLB_SEL);
-+				break;
-+			default:
-+				BUG(); /* wtf */
-+			}
-+			I915_WRITE(PCH_DPLL_SEL, temp);
- 		}
--		I915_WRITE(PCH_DPLL_SEL, temp);
--	}
- 
--	/* disable PCH DPLL */
--	intel_disable_pch_pll(intel_crtc);
-+		/* disable PCH DPLL */
-+		intel_disable_pch_pll(intel_crtc);
- 
--	ironlake_fdi_pll_disable(intel_crtc);
-+		ironlake_fdi_pll_disable(intel_crtc);
-+	}
- 
- 	intel_crtc->active = false;
- 	intel_update_watermarks(dev);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0292-drm-i915-lock-down-pch-pll-accouting-some-more.patch b/patches.baytrail/0292-drm-i915-lock-down-pch-pll-accouting-some-more.patch
deleted file mode 100644
index ed5998689be46..0000000000000
--- a/patches.baytrail/0292-drm-i915-lock-down-pch-pll-accouting-some-more.patch
+++ /dev/null
@@ -1,63 +0,0 @@
-From 094f7d93b6fbf0bf5798b062ecc53d5d8c716d3d Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Mon, 10 Jun 2013 17:28:22 +0200
-Subject: drm/i915: lock down pch pll accouting some more
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Before I start to make a complete mess out of this, crank up
-the paranoia level a bit.
-
-v2: Kill the has_pch_encoder check in put_shared_dpll - it's invalid
-as spotted by Ville since we currently only put the dpll when we
-already have the new pipe config. So a direct pch port -> cpu edp
-transition will hit this.
-
-v3: Now that I've lifted my blinders add the WARN_ON Ville requested.
-
-Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit f4a091c71baa55dc8822614ab716525779623c1c)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 8 +++++++-
- 1 file changed, 7 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 74412d011df9..7f0a7f763c5f 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -1432,6 +1432,7 @@ static void ironlake_enable_pch_pll(struct intel_crtc *intel_crtc)
- 		assert_pch_pll_enabled(dev_priv, pll, NULL);
- 		return;
- 	}
-+	WARN_ON(pll->on);
- 
- 	DRM_DEBUG_KMS("enabling PCH PLL %x\n", pll->pll_reg);
- 
-@@ -1470,6 +1471,7 @@ static void intel_disable_pch_pll(struct intel_crtc *intel_crtc)
- 	}
- 
- 	assert_pch_pll_enabled(dev_priv, pll, NULL);
-+	WARN_ON(!pll->on);
- 	if (--pll->active)
- 		return;
- 
-@@ -3069,7 +3071,11 @@ static void intel_put_pch_pll(struct intel_crtc *intel_crtc)
- 		return;
- 	}
- 
--	--pll->refcount;
-+	if (--pll->refcount == 0) {
-+		WARN_ON(pll->on);
-+		WARN_ON(pll->active);
-+	}
-+
- 	intel_crtc->pch_pll = NULL;
- }
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0293-drm-i915-s-pch_pll-shared_dpll.patch b/patches.baytrail/0293-drm-i915-s-pch_pll-shared_dpll.patch
deleted file mode 100644
index 1905fdac5600a..0000000000000
--- a/patches.baytrail/0293-drm-i915-s-pch_pll-shared_dpll.patch
+++ /dev/null
@@ -1,471 +0,0 @@
-From 59292ff786779ebd8774b94ba55c14c909bbe7e1 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Wed, 5 Jun 2013 13:34:06 +0200
-Subject: drm/i915: s/pch_pll/shared_dpll/
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-For fastboot we need some support to read out the sharing state of
-plls, at least for platforms where they can be shared (or freely
-assigned at least). Now for ivb we already have pretty extensive
-infrastructure for tracking pch plls, and it took us an aweful lot of
-tries to get that remotely right. Note that hsw could also share plls,
-but even now they're already freely assignable. So we need this on
-more than just ivb.
-
-So on top of the usual fastboot fun pll sharing seems to be an
-additional step up in fragility. Hence a common infrastructure for all
-shared/freely assignable display plls seems to be in order.
-
-The plan is to have a bit of dpll hw state readout code, which can be
-used individually, but also to fill in the pipe config. The hw state
-cross check code will then use that information to make sure that
-after every modeset every pipe still is connected to a pll which still
-has the correct configuration - a lot of the pch pll sharing bugs
-where due to incorrect sharing.
-
-We start this endeavour with a simple s/pch_pll/shared_dpll/ rename
-job.
-
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit e72f9fbf99c4277b2ccfd4d55d66aa6caf922f42)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.c      |  14 ++---
- drivers/gpu/drm/i915/i915_drv.h      |   6 +-
- drivers/gpu/drm/i915/intel_display.c | 112 +++++++++++++++++------------------
- drivers/gpu/drm/i915/intel_drv.h     |   2 +-
- 4 files changed, 67 insertions(+), 67 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
-index 0b1edad2b4df..235749dba729 100644
---- a/drivers/gpu/drm/i915/i915_drv.c
-+++ b/drivers/gpu/drm/i915/i915_drv.c
-@@ -457,7 +457,7 @@ void intel_detect_pch(struct drm_device *dev)
- 	 */
- 	if (INTEL_INFO(dev)->num_pipes == 0) {
- 		dev_priv->pch_type = PCH_NOP;
--		dev_priv->num_pch_pll = 0;
-+		dev_priv->num_shared_dpll = 0;
- 		return;
- 	}
- 
-@@ -476,34 +476,34 @@ void intel_detect_pch(struct drm_device *dev)
- 
- 			if (id == INTEL_PCH_IBX_DEVICE_ID_TYPE) {
- 				dev_priv->pch_type = PCH_IBX;
--				dev_priv->num_pch_pll = 2;
-+				dev_priv->num_shared_dpll = 2;
- 				DRM_DEBUG_KMS("Found Ibex Peak PCH\n");
- 				WARN_ON(!IS_GEN5(dev));
- 			} else if (id == INTEL_PCH_CPT_DEVICE_ID_TYPE) {
- 				dev_priv->pch_type = PCH_CPT;
--				dev_priv->num_pch_pll = 2;
-+				dev_priv->num_shared_dpll = 2;
- 				DRM_DEBUG_KMS("Found CougarPoint PCH\n");
- 				WARN_ON(!(IS_GEN6(dev) || IS_IVYBRIDGE(dev)));
- 			} else if (id == INTEL_PCH_PPT_DEVICE_ID_TYPE) {
- 				/* PantherPoint is CPT compatible */
- 				dev_priv->pch_type = PCH_CPT;
--				dev_priv->num_pch_pll = 2;
-+				dev_priv->num_shared_dpll = 2;
- 				DRM_DEBUG_KMS("Found PatherPoint PCH\n");
- 				WARN_ON(!(IS_GEN6(dev) || IS_IVYBRIDGE(dev)));
- 			} else if (id == INTEL_PCH_LPT_DEVICE_ID_TYPE) {
- 				dev_priv->pch_type = PCH_LPT;
--				dev_priv->num_pch_pll = 0;
-+				dev_priv->num_shared_dpll = 0;
- 				DRM_DEBUG_KMS("Found LynxPoint PCH\n");
- 				WARN_ON(!IS_HASWELL(dev));
- 				WARN_ON(IS_ULT(dev));
- 			} else if (id == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE) {
- 				dev_priv->pch_type = PCH_LPT;
--				dev_priv->num_pch_pll = 0;
-+				dev_priv->num_shared_dpll = 0;
- 				DRM_DEBUG_KMS("Found LynxPoint LP PCH\n");
- 				WARN_ON(!IS_HASWELL(dev));
- 				WARN_ON(!IS_ULT(dev));
- 			}
--			BUG_ON(dev_priv->num_pch_pll > I915_NUM_PLLS);
-+			BUG_ON(dev_priv->num_shared_dpll > I915_NUM_PLLS);
- 		}
- 		pci_dev_put(pch);
- 	}
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index fec0c8f56e05..d46339018156 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -132,7 +132,7 @@ enum hpd_pin {
- 	list_for_each_entry((intel_encoder), &(dev)->mode_config.encoder_list, base.head) \
- 		if ((intel_encoder)->base.crtc == (__crtc))
- 
--struct intel_pch_pll {
-+struct intel_shared_dpll {
- 	int refcount; /* count of number of CRTCs sharing this PLL */
- 	int active; /* count of number of active CRTCs (i.e. DPMS on) */
- 	bool on; /* is the PLL actually active? Disabled during modeset */
-@@ -1027,7 +1027,6 @@ typedef struct drm_i915_private {
- 	u32 hpd_event_bits;
- 	struct timer_list hotplug_reenable_timer;
- 
--	int num_pch_pll;
- 	int num_plane;
- 
- 	unsigned long cfb_size;
-@@ -1088,7 +1087,8 @@ typedef struct drm_i915_private {
- 	struct drm_crtc *pipe_to_crtc_mapping[3];
- 	wait_queue_head_t pending_flip_queue;
- 
--	struct intel_pch_pll pch_plls[I915_NUM_PLLS];
-+	int num_shared_dpll;
-+	struct intel_shared_dpll shared_dplls[I915_NUM_PLLS];
- 	struct intel_ddi_plls ddi_plls;
- 
- 	/* Reclocking support */
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 7f0a7f763c5f..2f2f68a9a6d3 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -910,10 +910,10 @@ static void assert_pll(struct drm_i915_private *dev_priv,
- #define assert_pll_disabled(d, p) assert_pll(d, p, false)
- 
- /* For ILK+ */
--static void assert_pch_pll(struct drm_i915_private *dev_priv,
--			   struct intel_pch_pll *pll,
--			   struct intel_crtc *crtc,
--			   bool state)
-+static void assert_shared_dpll(struct drm_i915_private *dev_priv,
-+			       struct intel_shared_dpll *pll,
-+			       struct intel_crtc *crtc,
-+			       bool state)
- {
- 	u32 val;
- 	bool cur_state;
-@@ -952,8 +952,8 @@ static void assert_pch_pll(struct drm_i915_private *dev_priv,
- 		}
- 	}
- }
--#define assert_pch_pll_enabled(d, p, c) assert_pch_pll(d, p, c, true)
--#define assert_pch_pll_disabled(d, p, c) assert_pch_pll(d, p, c, false)
-+#define assert_shared_dpll_enabled(d, p, c) assert_shared_dpll(d, p, c, true)
-+#define assert_shared_dpll_disabled(d, p, c) assert_shared_dpll(d, p, c, false)
- 
- static void assert_fdi_tx(struct drm_i915_private *dev_priv,
- 			  enum pipe pipe, bool state)
-@@ -1397,23 +1397,23 @@ void vlv_wait_port_ready(struct drm_i915_private *dev_priv, int port)
- }
- 
- /**
-- * ironlake_enable_pch_pll - enable PCH PLL
-+ * ironlake_enable_shared_dpll - enable PCH PLL
-  * @dev_priv: i915 private structure
-  * @pipe: pipe PLL to enable
-  *
-  * The PCH PLL needs to be enabled before the PCH transcoder, since it
-  * drives the transcoder clock.
-  */
--static void ironlake_enable_pch_pll(struct intel_crtc *intel_crtc)
-+static void ironlake_enable_shared_dpll(struct intel_crtc *intel_crtc)
- {
- 	struct drm_i915_private *dev_priv = intel_crtc->base.dev->dev_private;
--	struct intel_pch_pll *pll;
-+	struct intel_shared_dpll *pll;
- 	int reg;
- 	u32 val;
- 
- 	/* PCH PLLs only available on ILK, SNB and IVB */
- 	BUG_ON(dev_priv->info->gen < 5);
--	pll = intel_crtc->pch_pll;
-+	pll = intel_crtc->shared_dpll;
- 	if (pll == NULL)
- 		return;
- 
-@@ -1429,7 +1429,7 @@ static void ironlake_enable_pch_pll(struct intel_crtc *intel_crtc)
- 
- 	if (pll->active++) {
- 		WARN_ON(!pll->on);
--		assert_pch_pll_enabled(dev_priv, pll, NULL);
-+		assert_shared_dpll_enabled(dev_priv, pll, NULL);
- 		return;
- 	}
- 	WARN_ON(pll->on);
-@@ -1446,10 +1446,10 @@ static void ironlake_enable_pch_pll(struct intel_crtc *intel_crtc)
- 	pll->on = true;
- }
- 
--static void intel_disable_pch_pll(struct intel_crtc *intel_crtc)
-+static void intel_disable_shared_dpll(struct intel_crtc *intel_crtc)
- {
- 	struct drm_i915_private *dev_priv = intel_crtc->base.dev->dev_private;
--	struct intel_pch_pll *pll = intel_crtc->pch_pll;
-+	struct intel_shared_dpll *pll = intel_crtc->shared_dpll;
- 	int reg;
- 	u32 val;
- 
-@@ -1466,11 +1466,11 @@ static void intel_disable_pch_pll(struct intel_crtc *intel_crtc)
- 		      intel_crtc->base.base.id);
- 
- 	if (WARN_ON(pll->active == 0)) {
--		assert_pch_pll_disabled(dev_priv, pll, NULL);
-+		assert_shared_dpll_disabled(dev_priv, pll, NULL);
- 		return;
- 	}
- 
--	assert_pch_pll_enabled(dev_priv, pll, NULL);
-+	assert_shared_dpll_enabled(dev_priv, pll, NULL);
- 	WARN_ON(!pll->on);
- 	if (--pll->active)
- 		return;
-@@ -1501,9 +1501,9 @@ static void ironlake_enable_pch_transcoder(struct drm_i915_private *dev_priv,
- 	BUG_ON(dev_priv->info->gen < 5);
- 
- 	/* Make sure PCH DPLL is enabled */
--	assert_pch_pll_enabled(dev_priv,
--			       to_intel_crtc(crtc)->pch_pll,
--			       to_intel_crtc(crtc));
-+	assert_shared_dpll_enabled(dev_priv,
-+				   to_intel_crtc(crtc)->shared_dpll,
-+				   to_intel_crtc(crtc));
- 
- 	/* FDI must be feeding us bits for PCH ports */
- 	assert_fdi_tx_enabled(dev_priv, pipe);
-@@ -2966,10 +2966,10 @@ static void ironlake_pch_enable(struct drm_crtc *crtc)
- 	 * transcoder, and we actually should do this to not upset any PCH
- 	 * transcoder that already use the clock when we share it.
- 	 *
--	 * Note that enable_pch_pll tries to do the right thing, but get_pch_pll
--	 * unconditionally resets the pll - we need that to have the right LVDS
--	 * enable sequence. */
--	ironlake_enable_pch_pll(intel_crtc);
-+	 * Note that enable_shared_dpll tries to do the right thing, but
-+	 * get_shared_dpll unconditionally resets the pll - we need that to have
-+	 * the right LVDS enable sequence. */
-+	ironlake_enable_shared_dpll(intel_crtc);
- 
- 	if (HAS_PCH_CPT(dev)) {
- 		u32 sel;
-@@ -2990,7 +2990,7 @@ static void ironlake_pch_enable(struct drm_crtc *crtc)
- 			sel = TRANSC_DPLLB_SEL;
- 			break;
- 		}
--		if (intel_crtc->pch_pll->pll_reg == _PCH_DPLL_B)
-+		if (intel_crtc->shared_dpll->pll_reg == _PCH_DPLL_B)
- 			temp |= sel;
- 		else
- 			temp &= ~sel;
-@@ -3059,9 +3059,9 @@ static void lpt_pch_enable(struct drm_crtc *crtc)
- 	lpt_enable_pch_transcoder(dev_priv, cpu_transcoder);
- }
- 
--static void intel_put_pch_pll(struct intel_crtc *intel_crtc)
-+static void intel_put_shared_dpll(struct intel_crtc *intel_crtc)
- {
--	struct intel_pch_pll *pll = intel_crtc->pch_pll;
-+	struct intel_shared_dpll *pll = intel_crtc->shared_dpll;
- 
- 	if (pll == NULL)
- 		return;
-@@ -3076,26 +3076,26 @@ static void intel_put_pch_pll(struct intel_crtc *intel_crtc)
- 		WARN_ON(pll->active);
- 	}
- 
--	intel_crtc->pch_pll = NULL;
-+	intel_crtc->shared_dpll = NULL;
- }
- 
--static struct intel_pch_pll *intel_get_pch_pll(struct intel_crtc *intel_crtc, u32 dpll, u32 fp)
-+static struct intel_shared_dpll *intel_get_shared_dpll(struct intel_crtc *intel_crtc, u32 dpll, u32 fp)
- {
- 	struct drm_i915_private *dev_priv = intel_crtc->base.dev->dev_private;
--	struct intel_pch_pll *pll;
-+	struct intel_shared_dpll *pll;
- 	int i;
- 
--	pll = intel_crtc->pch_pll;
-+	pll = intel_crtc->shared_dpll;
- 	if (pll) {
- 		DRM_DEBUG_KMS("CRTC:%d dropping existing PCH PLL %x\n",
- 			      intel_crtc->base.base.id, pll->pll_reg);
--		intel_put_pch_pll(intel_crtc);
-+		intel_put_shared_dpll(intel_crtc);
- 	}
- 
- 	if (HAS_PCH_IBX(dev_priv->dev)) {
- 		/* Ironlake PCH has a fixed PLL->PCH pipe mapping. */
- 		i = intel_crtc->pipe;
--		pll = &dev_priv->pch_plls[i];
-+		pll = &dev_priv->shared_dplls[i];
- 
- 		DRM_DEBUG_KMS("CRTC:%d using pre-allocated PCH PLL %x\n",
- 			      intel_crtc->base.base.id, pll->pll_reg);
-@@ -3103,8 +3103,8 @@ static struct intel_pch_pll *intel_get_pch_pll(struct intel_crtc *intel_crtc, u3
- 		goto found;
- 	}
- 
--	for (i = 0; i < dev_priv->num_pch_pll; i++) {
--		pll = &dev_priv->pch_plls[i];
-+	for (i = 0; i < dev_priv->num_shared_dpll; i++) {
-+		pll = &dev_priv->shared_dplls[i];
- 
- 		/* Only want to check enabled timings first */
- 		if (pll->refcount == 0)
-@@ -3121,8 +3121,8 @@ static struct intel_pch_pll *intel_get_pch_pll(struct intel_crtc *intel_crtc, u3
- 	}
- 
- 	/* Ok no matching timings, maybe there's a free one? */
--	for (i = 0; i < dev_priv->num_pch_pll; i++) {
--		pll = &dev_priv->pch_plls[i];
-+	for (i = 0; i < dev_priv->num_shared_dpll; i++) {
-+		pll = &dev_priv->shared_dplls[i];
- 		if (pll->refcount == 0) {
- 			DRM_DEBUG_KMS("CRTC:%d allocated PCH PLL %x\n",
- 				      intel_crtc->base.base.id, pll->pll_reg);
-@@ -3133,12 +3133,12 @@ static struct intel_pch_pll *intel_get_pch_pll(struct intel_crtc *intel_crtc, u3
- 	return NULL;
- 
- found:
--	intel_crtc->pch_pll = pll;
-+	intel_crtc->shared_dpll = pll;
- 	DRM_DEBUG_DRIVER("using pll %d for pipe %c\n", i, pipe_name(intel_crtc->pipe));
- 	if (pll->active == 0) {
- 		DRM_DEBUG_DRIVER("setting up pll %d\n", i);
- 		WARN_ON(pll->on);
--		assert_pch_pll_disabled(dev_priv, pll, NULL);
-+		assert_shared_dpll_disabled(dev_priv, pll, NULL);
- 
- 		/* Wait for the clocks to stabilize before rewriting the regs */
- 		I915_WRITE(pll->pll_reg, dpll & ~DPLL_VCO_ENABLE);
-@@ -3488,7 +3488,7 @@ static void ironlake_crtc_disable(struct drm_crtc *crtc)
- 		}
- 
- 		/* disable PCH DPLL */
--		intel_disable_pch_pll(intel_crtc);
-+		intel_disable_shared_dpll(intel_crtc);
- 
- 		ironlake_fdi_pll_disable(intel_crtc);
- 	}
-@@ -3561,7 +3561,7 @@ static void haswell_crtc_disable(struct drm_crtc *crtc)
- static void ironlake_crtc_off(struct drm_crtc *crtc)
- {
- 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
--	intel_put_pch_pll(intel_crtc);
-+	intel_put_shared_dpll(intel_crtc);
- }
- 
- static void haswell_crtc_off(struct drm_crtc *crtc)
-@@ -5765,7 +5765,7 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
- 
- 	/* CPU eDP is the only output that doesn't need a PCH PLL of its own. */
- 	if (intel_crtc->config.has_pch_encoder) {
--		struct intel_pch_pll *pll;
-+		struct intel_shared_dpll *pll;
- 
- 		fp = i9xx_dpll_compute_fp(&intel_crtc->config.dpll);
- 		if (has_reduced_clock)
-@@ -5775,14 +5775,14 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
- 					     &fp, &reduced_clock,
- 					     has_reduced_clock ? &fp2 : NULL);
- 
--		pll = intel_get_pch_pll(intel_crtc, dpll, fp);
-+		pll = intel_get_shared_dpll(intel_crtc, dpll, fp);
- 		if (pll == NULL) {
- 			DRM_DEBUG_DRIVER("failed to find PLL for pipe %c\n",
- 					 pipe_name(pipe));
- 			return -EINVAL;
- 		}
- 	} else
--		intel_put_pch_pll(intel_crtc);
-+		intel_put_shared_dpll(intel_crtc);
- 
- 	if (intel_crtc->config.has_dp_encoder)
- 		intel_dp_set_m_n(intel_crtc);
-@@ -5791,11 +5791,11 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
- 		if (encoder->pre_pll_enable)
- 			encoder->pre_pll_enable(encoder);
- 
--	if (intel_crtc->pch_pll) {
--		I915_WRITE(intel_crtc->pch_pll->pll_reg, dpll);
-+	if (intel_crtc->shared_dpll) {
-+		I915_WRITE(intel_crtc->shared_dpll->pll_reg, dpll);
- 
- 		/* Wait for the clocks to stabilize. */
--		POSTING_READ(intel_crtc->pch_pll->pll_reg);
-+		POSTING_READ(intel_crtc->shared_dpll->pll_reg);
- 		udelay(150);
- 
- 		/* The pixel multiplier can only be updated once the
-@@ -5803,16 +5803,16 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
- 		 *
- 		 * So write it again.
- 		 */
--		I915_WRITE(intel_crtc->pch_pll->pll_reg, dpll);
-+		I915_WRITE(intel_crtc->shared_dpll->pll_reg, dpll);
- 	}
- 
- 	intel_crtc->lowfreq_avail = false;
--	if (intel_crtc->pch_pll) {
-+	if (intel_crtc->shared_dpll) {
- 		if (is_lvds && has_reduced_clock && i915_powersave) {
--			I915_WRITE(intel_crtc->pch_pll->fp1_reg, fp2);
-+			I915_WRITE(intel_crtc->shared_dpll->fp1_reg, fp2);
- 			intel_crtc->lowfreq_avail = true;
- 		} else {
--			I915_WRITE(intel_crtc->pch_pll->fp1_reg, fp);
-+			I915_WRITE(intel_crtc->shared_dpll->fp1_reg, fp);
- 		}
- 	}
- 
-@@ -8750,20 +8750,20 @@ static void intel_cpu_pll_init(struct drm_device *dev)
- 		intel_ddi_pll_init(dev);
- }
- 
--static void intel_pch_pll_init(struct drm_device *dev)
-+static void intel_shared_dpll_init(struct drm_device *dev)
- {
- 	drm_i915_private_t *dev_priv = dev->dev_private;
- 	int i;
- 
--	if (dev_priv->num_pch_pll == 0) {
-+	if (dev_priv->num_shared_dpll == 0) {
- 		DRM_DEBUG_KMS("No PCH PLLs on this hardware, skipping initialisation\n");
- 		return;
- 	}
- 
--	for (i = 0; i < dev_priv->num_pch_pll; i++) {
--		dev_priv->pch_plls[i].pll_reg = _PCH_DPLL(i);
--		dev_priv->pch_plls[i].fp0_reg = _PCH_FP0(i);
--		dev_priv->pch_plls[i].fp1_reg = _PCH_FP1(i);
-+	for (i = 0; i < dev_priv->num_shared_dpll; i++) {
-+		dev_priv->shared_dplls[i].pll_reg = _PCH_DPLL(i);
-+		dev_priv->shared_dplls[i].fp0_reg = _PCH_FP0(i);
-+		dev_priv->shared_dplls[i].fp1_reg = _PCH_FP1(i);
- 	}
- }
- 
-@@ -9475,7 +9475,7 @@ void intel_modeset_init(struct drm_device *dev)
- 	}
- 
- 	intel_cpu_pll_init(dev);
--	intel_pch_pll_init(dev);
-+	intel_shared_dpll_init(dev);
- 
- 	/* Just disable it once at startup */
- 	i915_disable_vga(dev);
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index 259a6873aacc..ccf92ff03755 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -317,7 +317,7 @@ struct intel_crtc {
- 	struct intel_crtc_config config;
- 
- 	/* We can share PLLs across outputs if the timings match */
--	struct intel_pch_pll *pch_pll;
-+	struct intel_shared_dpll *shared_dpll;
- 	uint32_t ddi_pll_sel;
- 
- 	/* reset counter value when the last flip was submitted */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0294-drm-i915-switch-crtc-shared_dpll-from-a-pointer-to-a.patch b/patches.baytrail/0294-drm-i915-switch-crtc-shared_dpll-from-a-pointer-to-a.patch
deleted file mode 100644
index 7a3bd4e50d0cd..0000000000000
--- a/patches.baytrail/0294-drm-i915-switch-crtc-shared_dpll-from-a-pointer-to-a.patch
+++ /dev/null
@@ -1,330 +0,0 @@
-From 4999e50705bba978fee82b49a5e8fd11913fa118 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Fri, 7 Jun 2013 23:10:03 +0200
-Subject: drm/i915: switch crtc->shared_dpll from a pointer to an enum
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Dealing with discrete enum values is simpler for hw state readout and
-pipe config computations than pointers - having neat names instead of
-chasing pointers should look better in the code.
-
-This isn't a that good reason for pch plls, but on haswell we actually
-have 3 different types of plls: WRPLL, SPLL and the DP clocks. Having
-explicit names should help there.
-
-Since this also adds the intel_crtc_to_shared_dpll helper to further
-abstract away the crtc -> dpll relationship this will also help to
-make the next patch simpler, which moves the shared dpll into the pipe
-configuration.
-
-Also note that for uniformity we have two special dpll ids: NONE for
-pipes which need a shared pll but don't have one (yet) and private for
-when there's a non-shared pll (e.g. per-pipe or per-port pll).
-
-I've thought whether we should also add a 2nd enum for the type of the
-pll we want (for really generic pll selection code) but thrown that
-idea out again - likely there's too much platform craziness going on
-to be able to share the pll selection logic much.
-
-Since this touched all the shared_pll functions a bit I've also done
-an s/intel_crtc/crtc/ replacement on a few of them.
-
-v2: Kill DPLL_ID_NONE. It's probably better to call it DPLL_ID_INVALID and use
-it to check that the compute config stage assigns a dpll to every pipe.
-But since that code isn't ready yet until we move the dpll selection out
-of the ->mode_set callback, there's no use for it.
-
-Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit e2b78267421c2b407409772119a4aa500da56cc8)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h      |  7 +++
- drivers/gpu/drm/i915/intel_display.c | 90 ++++++++++++++++++++----------------
- drivers/gpu/drm/i915/intel_drv.h     |  2 +-
- 3 files changed, 58 insertions(+), 41 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index d46339018156..81a424d91c20 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -140,6 +140,13 @@ struct intel_shared_dpll {
- 	int fp0_reg;
- 	int fp1_reg;
- };
-+
-+enum intel_dpll_id {
-+	DPLL_ID_PRIVATE = -1, /* non-shared dpll in use */
-+	/* real shared dpll ids must be >= 0 */
-+	DPLL_ID_PCH_PLL_A,
-+	DPLL_ID_PCH_PLL_B,
-+};
- #define I915_NUM_PLLS 2
- 
- /* Used by dp and fdi links */
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 2f2f68a9a6d3..9af8a7449d3f 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -909,6 +909,17 @@ static void assert_pll(struct drm_i915_private *dev_priv,
- #define assert_pll_enabled(d, p) assert_pll(d, p, true)
- #define assert_pll_disabled(d, p) assert_pll(d, p, false)
- 
-+static struct intel_shared_dpll *
-+intel_crtc_to_shared_dpll(struct intel_crtc *crtc)
-+{
-+	struct drm_i915_private *dev_priv = crtc->base.dev->dev_private;
-+
-+	if (crtc->shared_dpll < 0)
-+		return NULL;
-+
-+	return &dev_priv->shared_dplls[crtc->shared_dpll];
-+}
-+
- /* For ILK+ */
- static void assert_shared_dpll(struct drm_i915_private *dev_priv,
- 			       struct intel_shared_dpll *pll,
-@@ -1404,16 +1415,15 @@ void vlv_wait_port_ready(struct drm_i915_private *dev_priv, int port)
-  * The PCH PLL needs to be enabled before the PCH transcoder, since it
-  * drives the transcoder clock.
-  */
--static void ironlake_enable_shared_dpll(struct intel_crtc *intel_crtc)
-+static void ironlake_enable_shared_dpll(struct intel_crtc *crtc)
- {
--	struct drm_i915_private *dev_priv = intel_crtc->base.dev->dev_private;
--	struct intel_shared_dpll *pll;
-+	struct drm_i915_private *dev_priv = crtc->base.dev->dev_private;
-+	struct intel_shared_dpll *pll = intel_crtc_to_shared_dpll(crtc);
- 	int reg;
- 	u32 val;
- 
- 	/* PCH PLLs only available on ILK, SNB and IVB */
- 	BUG_ON(dev_priv->info->gen < 5);
--	pll = intel_crtc->shared_dpll;
- 	if (pll == NULL)
- 		return;
- 
-@@ -1422,7 +1432,7 @@ static void ironlake_enable_shared_dpll(struct intel_crtc *intel_crtc)
- 
- 	DRM_DEBUG_KMS("enable PCH PLL %x (active %d, on? %d)for crtc %d\n",
- 		      pll->pll_reg, pll->active, pll->on,
--		      intel_crtc->base.base.id);
-+		      crtc->base.base.id);
- 
- 	/* PCH refclock must be enabled first */
- 	assert_pch_refclk_enabled(dev_priv);
-@@ -1446,10 +1456,10 @@ static void ironlake_enable_shared_dpll(struct intel_crtc *intel_crtc)
- 	pll->on = true;
- }
- 
--static void intel_disable_shared_dpll(struct intel_crtc *intel_crtc)
-+static void intel_disable_shared_dpll(struct intel_crtc *crtc)
- {
--	struct drm_i915_private *dev_priv = intel_crtc->base.dev->dev_private;
--	struct intel_shared_dpll *pll = intel_crtc->shared_dpll;
-+	struct drm_i915_private *dev_priv = crtc->base.dev->dev_private;
-+	struct intel_shared_dpll *pll = intel_crtc_to_shared_dpll(crtc);
- 	int reg;
- 	u32 val;
- 
-@@ -1463,7 +1473,7 @@ static void intel_disable_shared_dpll(struct intel_crtc *intel_crtc)
- 
- 	DRM_DEBUG_KMS("disable PCH PLL %x (active %d, on? %d) for crtc %d\n",
- 		      pll->pll_reg, pll->active, pll->on,
--		      intel_crtc->base.base.id);
-+		      crtc->base.base.id);
- 
- 	if (WARN_ON(pll->active == 0)) {
- 		assert_shared_dpll_disabled(dev_priv, pll, NULL);
-@@ -1478,7 +1488,7 @@ static void intel_disable_shared_dpll(struct intel_crtc *intel_crtc)
- 	DRM_DEBUG_KMS("disabling PCH PLL %x\n", pll->pll_reg);
- 
- 	/* Make sure transcoder isn't still depending on us */
--	assert_pch_transcoder_disabled(dev_priv, intel_crtc->pipe);
-+	assert_pch_transcoder_disabled(dev_priv, crtc->pipe);
- 
- 	reg = pll->pll_reg;
- 	val = I915_READ(reg);
-@@ -1495,6 +1505,7 @@ static void ironlake_enable_pch_transcoder(struct drm_i915_private *dev_priv,
- {
- 	struct drm_device *dev = dev_priv->dev;
- 	struct drm_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe];
-+	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
- 	uint32_t reg, val, pipeconf_val;
- 
- 	/* PCH only available on ILK+ */
-@@ -1502,8 +1513,8 @@ static void ironlake_enable_pch_transcoder(struct drm_i915_private *dev_priv,
- 
- 	/* Make sure PCH DPLL is enabled */
- 	assert_shared_dpll_enabled(dev_priv,
--				   to_intel_crtc(crtc)->shared_dpll,
--				   to_intel_crtc(crtc));
-+				   intel_crtc_to_shared_dpll(intel_crtc),
-+				   intel_crtc);
- 
- 	/* FDI must be feeding us bits for PCH ports */
- 	assert_fdi_tx_enabled(dev_priv, pipe);
-@@ -2990,7 +3001,7 @@ static void ironlake_pch_enable(struct drm_crtc *crtc)
- 			sel = TRANSC_DPLLB_SEL;
- 			break;
- 		}
--		if (intel_crtc->shared_dpll->pll_reg == _PCH_DPLL_B)
-+		if (intel_crtc->shared_dpll == DPLL_ID_PCH_PLL_B)
- 			temp |= sel;
- 		else
- 			temp &= ~sel;
-@@ -3059,9 +3070,9 @@ static void lpt_pch_enable(struct drm_crtc *crtc)
- 	lpt_enable_pch_transcoder(dev_priv, cpu_transcoder);
- }
- 
--static void intel_put_shared_dpll(struct intel_crtc *intel_crtc)
-+static void intel_put_shared_dpll(struct intel_crtc *crtc)
- {
--	struct intel_shared_dpll *pll = intel_crtc->shared_dpll;
-+	struct intel_shared_dpll *pll = intel_crtc_to_shared_dpll(crtc);
- 
- 	if (pll == NULL)
- 		return;
-@@ -3076,29 +3087,28 @@ static void intel_put_shared_dpll(struct intel_crtc *intel_crtc)
- 		WARN_ON(pll->active);
- 	}
- 
--	intel_crtc->shared_dpll = NULL;
-+	crtc->shared_dpll = DPLL_ID_PRIVATE;
- }
- 
--static struct intel_shared_dpll *intel_get_shared_dpll(struct intel_crtc *intel_crtc, u32 dpll, u32 fp)
-+static struct intel_shared_dpll *intel_get_shared_dpll(struct intel_crtc *crtc, u32 dpll, u32 fp)
- {
--	struct drm_i915_private *dev_priv = intel_crtc->base.dev->dev_private;
--	struct intel_shared_dpll *pll;
--	int i;
-+	struct drm_i915_private *dev_priv = crtc->base.dev->dev_private;
-+	struct intel_shared_dpll *pll = intel_crtc_to_shared_dpll(crtc);
-+	enum intel_dpll_id i;
- 
--	pll = intel_crtc->shared_dpll;
- 	if (pll) {
- 		DRM_DEBUG_KMS("CRTC:%d dropping existing PCH PLL %x\n",
--			      intel_crtc->base.base.id, pll->pll_reg);
--		intel_put_shared_dpll(intel_crtc);
-+			      crtc->base.base.id, pll->pll_reg);
-+		intel_put_shared_dpll(crtc);
- 	}
- 
- 	if (HAS_PCH_IBX(dev_priv->dev)) {
- 		/* Ironlake PCH has a fixed PLL->PCH pipe mapping. */
--		i = intel_crtc->pipe;
-+		i = crtc->pipe;
- 		pll = &dev_priv->shared_dplls[i];
- 
- 		DRM_DEBUG_KMS("CRTC:%d using pre-allocated PCH PLL %x\n",
--			      intel_crtc->base.base.id, pll->pll_reg);
-+			      crtc->base.base.id, pll->pll_reg);
- 
- 		goto found;
- 	}
-@@ -3113,7 +3123,7 @@ static struct intel_shared_dpll *intel_get_shared_dpll(struct intel_crtc *intel_
- 		if (dpll == (I915_READ(pll->pll_reg) & 0x7fffffff) &&
- 		    fp == I915_READ(pll->fp0_reg)) {
- 			DRM_DEBUG_KMS("CRTC:%d sharing existing PCH PLL %x (refcount %d, ative %d)\n",
--				      intel_crtc->base.base.id,
-+				      crtc->base.base.id,
- 				      pll->pll_reg, pll->refcount, pll->active);
- 
- 			goto found;
-@@ -3125,7 +3135,7 @@ static struct intel_shared_dpll *intel_get_shared_dpll(struct intel_crtc *intel_
- 		pll = &dev_priv->shared_dplls[i];
- 		if (pll->refcount == 0) {
- 			DRM_DEBUG_KMS("CRTC:%d allocated PCH PLL %x\n",
--				      intel_crtc->base.base.id, pll->pll_reg);
-+				      crtc->base.base.id, pll->pll_reg);
- 			goto found;
- 		}
- 	}
-@@ -3133,8 +3143,8 @@ static struct intel_shared_dpll *intel_get_shared_dpll(struct intel_crtc *intel_
- 	return NULL;
- 
- found:
--	intel_crtc->shared_dpll = pll;
--	DRM_DEBUG_DRIVER("using pll %d for pipe %c\n", i, pipe_name(intel_crtc->pipe));
-+	crtc->shared_dpll = i;
-+	DRM_DEBUG_DRIVER("using pll %d for pipe %c\n", i, pipe_name(crtc->pipe));
- 	if (pll->active == 0) {
- 		DRM_DEBUG_DRIVER("setting up pll %d\n", i);
- 		WARN_ON(pll->on);
-@@ -5730,6 +5740,7 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
- 	bool ok, has_reduced_clock = false;
- 	bool is_lvds = false;
- 	struct intel_encoder *encoder;
-+	struct intel_shared_dpll *pll;
- 	int ret;
- 
- 	for_each_encoder_on_crtc(dev, crtc, encoder) {
-@@ -5765,8 +5776,6 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
- 
- 	/* CPU eDP is the only output that doesn't need a PCH PLL of its own. */
- 	if (intel_crtc->config.has_pch_encoder) {
--		struct intel_shared_dpll *pll;
--
- 		fp = i9xx_dpll_compute_fp(&intel_crtc->config.dpll);
- 		if (has_reduced_clock)
- 			fp2 = i9xx_dpll_compute_fp(&reduced_clock);
-@@ -5791,11 +5800,15 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
- 		if (encoder->pre_pll_enable)
- 			encoder->pre_pll_enable(encoder);
- 
--	if (intel_crtc->shared_dpll) {
--		I915_WRITE(intel_crtc->shared_dpll->pll_reg, dpll);
-+	intel_crtc->lowfreq_avail = false;
-+
-+	if (intel_crtc->config.has_pch_encoder) {
-+		pll = intel_crtc_to_shared_dpll(intel_crtc);
-+
-+		I915_WRITE(pll->pll_reg, dpll);
- 
- 		/* Wait for the clocks to stabilize. */
--		POSTING_READ(intel_crtc->shared_dpll->pll_reg);
-+		POSTING_READ(pll->pll_reg);
- 		udelay(150);
- 
- 		/* The pixel multiplier can only be updated once the
-@@ -5803,16 +5816,13 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
- 		 *
- 		 * So write it again.
- 		 */
--		I915_WRITE(intel_crtc->shared_dpll->pll_reg, dpll);
--	}
-+		I915_WRITE(pll->pll_reg, dpll);
- 
--	intel_crtc->lowfreq_avail = false;
--	if (intel_crtc->shared_dpll) {
- 		if (is_lvds && has_reduced_clock && i915_powersave) {
--			I915_WRITE(intel_crtc->shared_dpll->fp1_reg, fp2);
-+			I915_WRITE(pll->fp1_reg, fp2);
- 			intel_crtc->lowfreq_avail = true;
- 		} else {
--			I915_WRITE(intel_crtc->shared_dpll->fp1_reg, fp);
-+			I915_WRITE(pll->fp1_reg, fp);
- 		}
- 	}
- 
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index ccf92ff03755..bcc313368410 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -317,7 +317,7 @@ struct intel_crtc {
- 	struct intel_crtc_config config;
- 
- 	/* We can share PLLs across outputs if the timings match */
--	struct intel_shared_dpll *shared_dpll;
-+	enum intel_dpll_id shared_dpll;
- 	uint32_t ddi_pll_sel;
- 
- 	/* reset counter value when the last flip was submitted */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0295-drm-i915-move-shared_dpll-into-the-pipe-config.patch b/patches.baytrail/0295-drm-i915-move-shared_dpll-into-the-pipe-config.patch
deleted file mode 100644
index 24a66633b9067..0000000000000
--- a/patches.baytrail/0295-drm-i915-move-shared_dpll-into-the-pipe-config.patch
+++ /dev/null
@@ -1,145 +0,0 @@
-From ef58b25b78ca4c35eb61872d3e580de3b50a2ee8 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Fri, 7 Jun 2013 23:10:32 +0200
-Subject: drm/i915: move shared_dpll into the pipe config
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-With the big sed-job prep work done this is now really simple. With
-the exception that we only assign the right shared dpll id in the
-->mode_set callback but also depend upon the old one still being
-around.
-
-Until that mess is fixed up we need to jump through a few hoops to
-keep the old value save.
-
-v2: Kill the funny whitespace spotted by Chris.
-
-v3: Move the shared_dpll pipe config fixup into this patch as noticed
-by Ville. Also unconditionally set the shared_dpll with the current
-one, since otherwise we won't handle direct pch port -> cpu edp
-transitions correctly.
-
-Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit a43f6e0fd6219e806268d5fef67db722875393a0)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 26 +++++++++++++++-----------
- drivers/gpu/drm/i915/intel_drv.h     |  5 +++--
- 2 files changed, 18 insertions(+), 13 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 9af8a7449d3f..0fdb80517545 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -914,10 +914,10 @@ intel_crtc_to_shared_dpll(struct intel_crtc *crtc)
- {
- 	struct drm_i915_private *dev_priv = crtc->base.dev->dev_private;
- 
--	if (crtc->shared_dpll < 0)
-+	if (crtc->config.shared_dpll < 0)
- 		return NULL;
- 
--	return &dev_priv->shared_dplls[crtc->shared_dpll];
-+	return &dev_priv->shared_dplls[crtc->config.shared_dpll];
- }
- 
- /* For ILK+ */
-@@ -3001,7 +3001,7 @@ static void ironlake_pch_enable(struct drm_crtc *crtc)
- 			sel = TRANSC_DPLLB_SEL;
- 			break;
- 		}
--		if (intel_crtc->shared_dpll == DPLL_ID_PCH_PLL_B)
-+		if (intel_crtc->config.shared_dpll == DPLL_ID_PCH_PLL_B)
- 			temp |= sel;
- 		else
- 			temp &= ~sel;
-@@ -3087,7 +3087,7 @@ static void intel_put_shared_dpll(struct intel_crtc *crtc)
- 		WARN_ON(pll->active);
- 	}
- 
--	crtc->shared_dpll = DPLL_ID_PRIVATE;
-+	crtc->config.shared_dpll = DPLL_ID_PRIVATE;
- }
- 
- static struct intel_shared_dpll *intel_get_shared_dpll(struct intel_crtc *crtc, u32 dpll, u32 fp)
-@@ -3143,7 +3143,7 @@ static struct intel_shared_dpll *intel_get_shared_dpll(struct intel_crtc *crtc,
- 	return NULL;
- 
- found:
--	crtc->shared_dpll = i;
-+	crtc->config.shared_dpll = i;
- 	DRM_DEBUG_DRIVER("using pll %d for pipe %c\n", i, pipe_name(crtc->pipe));
- 	if (pll->active == 0) {
- 		DRM_DEBUG_DRIVER("setting up pll %d\n", i);
-@@ -4102,12 +4102,11 @@ static void hsw_compute_ips_config(struct intel_crtc *crtc,
- 				   pipe_config->pipe_bpp == 24;
- }
- 
--static int intel_crtc_compute_config(struct drm_crtc *crtc,
-+static int intel_crtc_compute_config(struct intel_crtc *crtc,
- 				     struct intel_crtc_config *pipe_config)
- {
--	struct drm_device *dev = crtc->dev;
-+	struct drm_device *dev = crtc->base.dev;
- 	struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
--	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
- 
- 	if (HAS_PCH_SPLIT(dev)) {
- 		/* FDI link clock is fixed at 2.7G */
-@@ -4138,10 +4137,15 @@ static int intel_crtc_compute_config(struct drm_crtc *crtc,
- 	}
- 
- 	if (IS_HASWELL(dev))
--		hsw_compute_ips_config(intel_crtc, pipe_config);
-+		hsw_compute_ips_config(crtc, pipe_config);
-+
-+	/* XXX: PCH clock sharing is done in ->mode_set, so make sure the old
-+	 * clock survives for now. */
-+	if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev))
-+		pipe_config->shared_dpll = crtc->config.shared_dpll;
- 
- 	if (pipe_config->has_pch_encoder)
--		return ironlake_fdi_compute_config(intel_crtc, pipe_config);
-+		return ironlake_fdi_compute_config(crtc, pipe_config);
- 
- 	return 0;
- }
-@@ -7914,7 +7918,7 @@ encoder_retry:
- 	if (!pipe_config->port_clock)
- 		pipe_config->port_clock = pipe_config->adjusted_mode.clock;
- 
--	ret = intel_crtc_compute_config(crtc, pipe_config);
-+	ret = intel_crtc_compute_config(to_intel_crtc(crtc), pipe_config);
- 	if (ret < 0) {
- 		DRM_DEBUG_KMS("CRTC fixup failed\n");
- 		goto fail;
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index bcc313368410..3ecc3d0e6acc 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -252,6 +252,9 @@ struct intel_crtc_config {
- 	 * haswell. */
- 	struct dpll dpll;
- 
-+	/* Selected dpll when shared or DPLL_ID_PRIVATE. */
-+	enum intel_dpll_id shared_dpll;
-+
- 	int pipe_bpp;
- 	struct intel_link_m_n dp_m_n;
- 
-@@ -316,8 +319,6 @@ struct intel_crtc {
- 
- 	struct intel_crtc_config config;
- 
--	/* We can share PLLs across outputs if the timings match */
--	enum intel_dpll_id shared_dpll;
- 	uint32_t ddi_pll_sel;
- 
- 	/* reset counter value when the last flip was submitted */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0296-drm-i915-refactor-PCH_DPLL_SEL-defines.patch b/patches.baytrail/0296-drm-i915-refactor-PCH_DPLL_SEL-defines.patch
deleted file mode 100644
index bb8d94edcf42d..0000000000000
--- a/patches.baytrail/0296-drm-i915-refactor-PCH_DPLL_SEL-defines.patch
+++ /dev/null
@@ -1,90 +0,0 @@
-From b53b1bd3890c5a98301e919c87139ae43bdc0fdb Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Wed, 5 Jun 2013 13:34:09 +0200
-Subject: drm/i915: refactor PCH_DPLL_SEL #defines
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The bits are evenly space, so we can cut down on two big switch
-blocks. This also greatly simplifies the hw state readout which
-follows in the next patch.
-
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 1188739757d0e78810de5fe83dbe0128f624b9e8)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_reg.h      |   12 +++---------
- drivers/gpu/drm/i915/intel_display.c |   32 +++-----------------------------
- 2 files changed, 6 insertions(+), 38 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -3988,15 +3988,9 @@
- #define PCH_SSC4_AUX_PARMS      0xc6214
- 
- #define PCH_DPLL_SEL		0xc7000
--#define  TRANSA_DPLL_ENABLE	(1<<3)
--#define	 TRANSA_DPLLB_SEL	(1<<0)
--#define	 TRANSA_DPLLA_SEL	0
--#define  TRANSB_DPLL_ENABLE	(1<<7)
--#define	 TRANSB_DPLLB_SEL	(1<<4)
--#define	 TRANSB_DPLLA_SEL	(0)
--#define  TRANSC_DPLL_ENABLE	(1<<11)
--#define	 TRANSC_DPLLB_SEL	(1<<8)
--#define	 TRANSC_DPLLA_SEL	(0)
-+#define	 TRANS_DPLLB_SEL(pipe)		(1 << (pipe * 4))
-+#define	 TRANS_DPLLA_SEL(pipe)		0
-+#define  TRANS_DPLL_ENABLE(pipe)	(1 << (pipe * 4 + 3))
- 
- /* transcoder */
- 
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -2986,21 +2986,8 @@ static void ironlake_pch_enable(struct d
- 		u32 sel;
- 
- 		temp = I915_READ(PCH_DPLL_SEL);
--		switch (pipe) {
--		default:
--		case 0:
--			temp |= TRANSA_DPLL_ENABLE;
--			sel = TRANSA_DPLLB_SEL;
--			break;
--		case 1:
--			temp |= TRANSB_DPLL_ENABLE;
--			sel = TRANSB_DPLLB_SEL;
--			break;
--		case 2:
--			temp |= TRANSC_DPLL_ENABLE;
--			sel = TRANSC_DPLLB_SEL;
--			break;
--		}
-+		temp |= TRANS_DPLL_ENABLE(pipe);
-+		sel = TRANS_DPLLB_SEL(pipe);
- 		if (intel_crtc->config.shared_dpll == DPLL_ID_PCH_PLL_B)
- 			temp |= sel;
- 		else
-@@ -3480,20 +3467,7 @@ static void ironlake_crtc_disable(struct
- 
- 			/* disable DPLL_SEL */
- 			temp = I915_READ(PCH_DPLL_SEL);
--			switch (pipe) {
--			case 0:
--				temp &= ~(TRANSA_DPLL_ENABLE | TRANSA_DPLLB_SEL);
--				break;
--			case 1:
--				temp &= ~(TRANSB_DPLL_ENABLE | TRANSB_DPLLB_SEL);
--				break;
--			case 2:
--				/* C shares PLL A or B */
--				temp &= ~(TRANSC_DPLL_ENABLE | TRANSC_DPLLB_SEL);
--				break;
--			default:
--				BUG(); /* wtf */
--			}
-+			temp &= ~(TRANS_DPLL_ENABLE(pipe) | TRANS_DPLLB_SEL(pipe));
- 			I915_WRITE(PCH_DPLL_SEL, temp);
- 		}
- 
diff --git a/patches.baytrail/0297-drm-i915-hw-state-readout-for-shared-pch-plls.patch b/patches.baytrail/0297-drm-i915-hw-state-readout-for-shared-pch-plls.patch
deleted file mode 100644
index a3b8d78b3eaf1..0000000000000
--- a/patches.baytrail/0297-drm-i915-hw-state-readout-for-shared-pch-plls.patch
+++ /dev/null
@@ -1,123 +0,0 @@
-From ecf1997ca311a1f0a871631dab31ee149c16779b Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Fri, 7 Jun 2013 23:11:08 +0200
-Subject: drm/i915: hw state readout for shared pch plls
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Well, the first step of a long road at least, it only reads out
-the pipe -> shared dpll association thus far. Other state which needs
-to follow:
-
-- hw state of the dpll (on/off + dpll registers). Currently we just
-  read that out from the hw state, but that doesn't work too well when
-  the dpll is in use, but not yet fully enabled. We get away since
-  most likely it already has been enabled and so the correct state is
-  left behind in the registers. But that doesn't hold for atomic
-  modesets when we want to enable all pipes at once.
-
-- Refcount reconstruction for each dpll.
-
-- Cross-checking of all the above. For that we need to keep the dpll
-  register state both in the pipe and in the shared_dpll struct, so
-  that we can check that every pipe is still connected to a correctly
-  configured dpll.
-
-Note that since the refcount resconstruction isn't done yet this will
-spill a few WARNs at boot-up while trying to disable pch plls which
-have bogus refcounts. But since there's still a pile of refactoring to
-do I'd like to lock down the state handling as soon as possible hence
-decided against reordering the patches to quiet these WARNs - after
-all the issues they're complaining about have existed since forever,
-as Jesse can testify by having pch pll states blow up consistently in
-his fastboot patches ...
-
-v2: We need to preserve the old shared_dpll since currently the
-shared dpll refcount dropping/getting is done in ->mode_set. With
-the usual pipe_config infrastructure the old dpll id is already lost
-at that point, hence preserve it in the new config.
-
-v3: Rebase on top of the ips patch from Paulo.
-
-v4: We need to unconditionally take over the shared_dpll id from the
-old pipe config when e.g. doing a direct pch port -> cpu edp
-transition.
-
-v5: Move the saving of the old shared_dpll id to an ealier patch.
-
-Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit c0d43d62233b3d4523a62fe88896bfc7a609e572)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 17 +++++++++++++++++
- 1 file changed, 17 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 887b7e6f5025..c0a40063dded 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -4998,6 +4998,7 @@ static bool i9xx_get_pipe_config(struct intel_crtc *crtc,
- 	uint32_t tmp;
- 
- 	pipe_config->cpu_transcoder = crtc->pipe;
-+	pipe_config->shared_dpll = DPLL_ID_PRIVATE;
- 
- 	tmp = I915_READ(PIPECONF(crtc->pipe));
- 	if (!(tmp & PIPECONF_ENABLE))
-@@ -5874,6 +5875,7 @@ static bool ironlake_get_pipe_config(struct intel_crtc *crtc,
- 	uint32_t tmp;
- 
- 	pipe_config->cpu_transcoder = crtc->pipe;
-+	pipe_config->shared_dpll = DPLL_ID_PRIVATE;
- 
- 	tmp = I915_READ(PIPECONF(crtc->pipe));
- 	if (!(tmp & PIPECONF_ENABLE))
-@@ -5891,6 +5893,16 @@ static bool ironlake_get_pipe_config(struct intel_crtc *crtc,
- 		/* XXX: Can't properly read out the pch dpll pixel multiplier
- 		 * since we don't have state tracking for pch clocks yet. */
- 		pipe_config->pixel_multiplier = 1;
-+
-+		if (HAS_PCH_IBX(dev_priv->dev)) {
-+			pipe_config->shared_dpll = crtc->pipe;
-+		} else {
-+			tmp = I915_READ(PCH_DPLL_SEL);
-+			if (tmp & TRANS_DPLLB_SEL(crtc->pipe))
-+				pipe_config->shared_dpll = DPLL_ID_PCH_PLL_B;
-+			else
-+				pipe_config->shared_dpll = DPLL_ID_PCH_PLL_A;
-+		}
- 	} else {
- 		pipe_config->pixel_multiplier = 1;
- 	}
-@@ -5971,6 +5983,8 @@ static bool haswell_get_pipe_config(struct intel_crtc *crtc,
- 	uint32_t tmp;
- 
- 	pipe_config->cpu_transcoder = crtc->pipe;
-+	pipe_config->shared_dpll = DPLL_ID_PRIVATE;
-+
- 	tmp = I915_READ(TRANS_DDI_FUNC_CTL(TRANSCODER_EDP));
- 	if (tmp & TRANS_DDI_FUNC_ENABLE) {
- 		enum pipe trans_edp_pipe;
-@@ -7844,6 +7858,7 @@ intel_modeset_pipe_config(struct drm_crtc *crtc,
- 	drm_mode_copy(&pipe_config->adjusted_mode, mode);
- 	drm_mode_copy(&pipe_config->requested_mode, mode);
- 	pipe_config->cpu_transcoder = to_intel_crtc(crtc)->pipe;
-+	pipe_config->shared_dpll = DPLL_ID_PRIVATE;
- 
- 	/* Compute a starting value for pipe_config->pipe_bpp taking the source
- 	 * plane pixel format and any sink constraints into account. Returns the
-@@ -8163,6 +8178,8 @@ intel_pipe_config_compare(struct drm_device *dev,
- 
- 	PIPE_CONF_CHECK_I(ips_enabled);
- 
-+	PIPE_CONF_CHECK_I(shared_dpll);
-+
- #undef PIPE_CONF_CHECK_I
- #undef PIPE_CONF_CHECK_FLAGS
- #undef PIPE_CONF_QUIRK
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0298-drm-i915-consolidate-num_shared_dplls-assignement.patch b/patches.baytrail/0298-drm-i915-consolidate-num_shared_dplls-assignement.patch
deleted file mode 100644
index 3b5dada867490..0000000000000
--- a/patches.baytrail/0298-drm-i915-consolidate-num_shared_dplls-assignement.patch
+++ /dev/null
@@ -1,116 +0,0 @@
-From c9bf14961b028ab765cf8c3206a1626efda754a3 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Wed, 5 Jun 2013 13:34:11 +0200
-Subject: drm/i915: consolidate ->num_shared_dplls assignement
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-In the future this won't be just for pch plls, so move it into the
-shared dpll init code.
-
-v2: Bikeshed the uncessary {} away while applying to appease
-checkpatch.
-
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> (v1)
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 7c74ade1de5b5311e7c886de27aa54e3285bd220)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.c      |  7 -------
- drivers/gpu/drm/i915/intel_display.c | 21 ++++++++++++++++-----
- 2 files changed, 16 insertions(+), 12 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
-index 235749dba729..b255b0bb0953 100644
---- a/drivers/gpu/drm/i915/i915_drv.c
-+++ b/drivers/gpu/drm/i915/i915_drv.c
-@@ -457,7 +457,6 @@ void intel_detect_pch(struct drm_device *dev)
- 	 */
- 	if (INTEL_INFO(dev)->num_pipes == 0) {
- 		dev_priv->pch_type = PCH_NOP;
--		dev_priv->num_shared_dpll = 0;
- 		return;
- 	}
- 
-@@ -476,34 +475,28 @@ void intel_detect_pch(struct drm_device *dev)
- 
- 			if (id == INTEL_PCH_IBX_DEVICE_ID_TYPE) {
- 				dev_priv->pch_type = PCH_IBX;
--				dev_priv->num_shared_dpll = 2;
- 				DRM_DEBUG_KMS("Found Ibex Peak PCH\n");
- 				WARN_ON(!IS_GEN5(dev));
- 			} else if (id == INTEL_PCH_CPT_DEVICE_ID_TYPE) {
- 				dev_priv->pch_type = PCH_CPT;
--				dev_priv->num_shared_dpll = 2;
- 				DRM_DEBUG_KMS("Found CougarPoint PCH\n");
- 				WARN_ON(!(IS_GEN6(dev) || IS_IVYBRIDGE(dev)));
- 			} else if (id == INTEL_PCH_PPT_DEVICE_ID_TYPE) {
- 				/* PantherPoint is CPT compatible */
- 				dev_priv->pch_type = PCH_CPT;
--				dev_priv->num_shared_dpll = 2;
- 				DRM_DEBUG_KMS("Found PatherPoint PCH\n");
- 				WARN_ON(!(IS_GEN6(dev) || IS_IVYBRIDGE(dev)));
- 			} else if (id == INTEL_PCH_LPT_DEVICE_ID_TYPE) {
- 				dev_priv->pch_type = PCH_LPT;
--				dev_priv->num_shared_dpll = 0;
- 				DRM_DEBUG_KMS("Found LynxPoint PCH\n");
- 				WARN_ON(!IS_HASWELL(dev));
- 				WARN_ON(IS_ULT(dev));
- 			} else if (id == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE) {
- 				dev_priv->pch_type = PCH_LPT;
--				dev_priv->num_shared_dpll = 0;
- 				DRM_DEBUG_KMS("Found LynxPoint LP PCH\n");
- 				WARN_ON(!IS_HASWELL(dev));
- 				WARN_ON(!IS_ULT(dev));
- 			}
--			BUG_ON(dev_priv->num_shared_dpll > I915_NUM_PLLS);
- 		}
- 		pci_dev_put(pch);
- 	}
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index c0a40063dded..da2c4070f154 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -8755,15 +8755,12 @@ static void intel_cpu_pll_init(struct drm_device *dev)
- 		intel_ddi_pll_init(dev);
- }
- 
--static void intel_shared_dpll_init(struct drm_device *dev)
-+static void ibx_pch_dpll_init(struct drm_device *dev)
- {
- 	drm_i915_private_t *dev_priv = dev->dev_private;
- 	int i;
- 
--	if (dev_priv->num_shared_dpll == 0) {
--		DRM_DEBUG_KMS("No PCH PLLs on this hardware, skipping initialisation\n");
--		return;
--	}
-+	dev_priv->num_shared_dpll = 2;
- 
- 	for (i = 0; i < dev_priv->num_shared_dpll; i++) {
- 		dev_priv->shared_dplls[i].pll_reg = _PCH_DPLL(i);
-@@ -8772,6 +8769,20 @@ static void intel_shared_dpll_init(struct drm_device *dev)
- 	}
- }
- 
-+static void intel_shared_dpll_init(struct drm_device *dev)
-+{
-+	drm_i915_private_t *dev_priv = dev->dev_private;
-+
-+	if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev))
-+		ibx_pch_dpll_init(dev);
-+	else
-+		dev_priv->num_shared_dpll = 0;
-+
-+	BUG_ON(dev_priv->num_shared_dpll > I915_NUM_PLLS);
-+	DRM_DEBUG_KMS("%i shared PLLs initialized\n",
-+		      dev_priv->num_shared_dpll);
-+}
-+
- static void intel_crtc_init(struct drm_device *dev, int pipe)
- {
- 	drm_i915_private_t *dev_priv = dev->dev_private;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0299-drm-i915-metadata-for-shared-dplls.patch b/patches.baytrail/0299-drm-i915-metadata-for-shared-dplls.patch
deleted file mode 100644
index 84755a15a02f7..0000000000000
--- a/patches.baytrail/0299-drm-i915-metadata-for-shared-dplls.patch
+++ /dev/null
@@ -1,212 +0,0 @@
-From 7c33e10b63e6017065b78cc23b631b8ac8504a52 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Wed, 5 Jun 2013 13:34:12 +0200
-Subject: drm/i915: metadata for shared dplls
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-An id to match the idx (useful for register access macros) and a name
-fore neater debug output.
-
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 46edb027df0d4bd423f7430dd473609caad4674b)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h      | 19 ++++++++------
- drivers/gpu/drm/i915/intel_display.c | 48 +++++++++++++++++++++---------------
- 2 files changed, 39 insertions(+), 28 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 81a424d91c20..7e3d3b349bf6 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -132,23 +132,26 @@ enum hpd_pin {
- 	list_for_each_entry((intel_encoder), &(dev)->mode_config.encoder_list, base.head) \
- 		if ((intel_encoder)->base.crtc == (__crtc))
- 
-+enum intel_dpll_id {
-+	DPLL_ID_PRIVATE = -1, /* non-shared dpll in use */
-+	/* real shared dpll ids must be >= 0 */
-+	DPLL_ID_PCH_PLL_A,
-+	DPLL_ID_PCH_PLL_B,
-+};
-+#define I915_NUM_PLLS 2
-+
- struct intel_shared_dpll {
- 	int refcount; /* count of number of CRTCs sharing this PLL */
- 	int active; /* count of number of active CRTCs (i.e. DPMS on) */
- 	bool on; /* is the PLL actually active? Disabled during modeset */
-+	const char *name;
-+	/* should match the index in the dev_priv->shared_dplls array */
-+	enum intel_dpll_id id;
- 	int pll_reg;
- 	int fp0_reg;
- 	int fp1_reg;
- };
- 
--enum intel_dpll_id {
--	DPLL_ID_PRIVATE = -1, /* non-shared dpll in use */
--	/* real shared dpll ids must be >= 0 */
--	DPLL_ID_PCH_PLL_A,
--	DPLL_ID_PCH_PLL_B,
--};
--#define I915_NUM_PLLS 2
--
- /* Used by dp and fdi links */
- struct intel_link_m_n {
- 	uint32_t	tu;
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index da2c4070f154..3e5eeb0b5dec 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -935,14 +935,14 @@ static void assert_shared_dpll(struct drm_i915_private *dev_priv,
- 	}
- 
- 	if (WARN (!pll,
--		  "asserting PCH PLL %s with no PLL\n", state_string(state)))
-+		  "asserting DPLL %s with no DPLL\n", state_string(state)))
- 		return;
- 
- 	val = I915_READ(pll->pll_reg);
- 	cur_state = !!(val & DPLL_VCO_ENABLE);
- 	WARN(cur_state != state,
--	     "PCH PLL state for reg %x assertion failure (expected %s, current %s), val=%08x\n",
--	     pll->pll_reg, state_string(state), state_string(cur_state), val);
-+	     "%s assertion failure (expected %s, current %s), val=%08x\n",
-+	     pll->name, state_string(state), state_string(cur_state), val);
- 
- 	/* Make sure the selected PLL is correctly attached to the transcoder */
- 	if (crtc && HAS_PCH_CPT(dev_priv->dev)) {
-@@ -1430,8 +1430,8 @@ static void ironlake_enable_shared_dpll(struct intel_crtc *crtc)
- 	if (WARN_ON(pll->refcount == 0))
- 		return;
- 
--	DRM_DEBUG_KMS("enable PCH PLL %x (active %d, on? %d)for crtc %d\n",
--		      pll->pll_reg, pll->active, pll->on,
-+	DRM_DEBUG_KMS("enable %s (active %d, on? %d)for crtc %d\n",
-+		      pll->name, pll->active, pll->on,
- 		      crtc->base.base.id);
- 
- 	/* PCH refclock must be enabled first */
-@@ -1444,7 +1444,7 @@ static void ironlake_enable_shared_dpll(struct intel_crtc *crtc)
- 	}
- 	WARN_ON(pll->on);
- 
--	DRM_DEBUG_KMS("enabling PCH PLL %x\n", pll->pll_reg);
-+	DRM_DEBUG_KMS("enabling %s\n", pll->name);
- 
- 	reg = pll->pll_reg;
- 	val = I915_READ(reg);
-@@ -1471,8 +1471,8 @@ static void intel_disable_shared_dpll(struct intel_crtc *crtc)
- 	if (WARN_ON(pll->refcount == 0))
- 		return;
- 
--	DRM_DEBUG_KMS("disable PCH PLL %x (active %d, on? %d) for crtc %d\n",
--		      pll->pll_reg, pll->active, pll->on,
-+	DRM_DEBUG_KMS("disable %s (active %d, on? %d) for crtc %d\n",
-+		      pll->name, pll->active, pll->on,
- 		      crtc->base.base.id);
- 
- 	if (WARN_ON(pll->active == 0)) {
-@@ -1485,7 +1485,7 @@ static void intel_disable_shared_dpll(struct intel_crtc *crtc)
- 	if (--pll->active)
- 		return;
- 
--	DRM_DEBUG_KMS("disabling PCH PLL %x\n", pll->pll_reg);
-+	DRM_DEBUG_KMS("disabling %s\n", pll->name);
- 
- 	/* Make sure transcoder isn't still depending on us */
- 	assert_pch_transcoder_disabled(dev_priv, crtc->pipe);
-@@ -3065,7 +3065,7 @@ static void intel_put_shared_dpll(struct intel_crtc *crtc)
- 		return;
- 
- 	if (pll->refcount == 0) {
--		WARN(1, "bad PCH PLL refcount\n");
-+		WARN(1, "bad %s refcount\n", pll->name);
- 		return;
- 	}
- 
-@@ -3084,8 +3084,8 @@ static struct intel_shared_dpll *intel_get_shared_dpll(struct intel_crtc *crtc,
- 	enum intel_dpll_id i;
- 
- 	if (pll) {
--		DRM_DEBUG_KMS("CRTC:%d dropping existing PCH PLL %x\n",
--			      crtc->base.base.id, pll->pll_reg);
-+		DRM_DEBUG_KMS("CRTC:%d dropping existing %s\n",
-+			      crtc->base.base.id, pll->name);
- 		intel_put_shared_dpll(crtc);
- 	}
- 
-@@ -3094,8 +3094,8 @@ static struct intel_shared_dpll *intel_get_shared_dpll(struct intel_crtc *crtc,
- 		i = crtc->pipe;
- 		pll = &dev_priv->shared_dplls[i];
- 
--		DRM_DEBUG_KMS("CRTC:%d using pre-allocated PCH PLL %x\n",
--			      crtc->base.base.id, pll->pll_reg);
-+		DRM_DEBUG_KMS("CRTC:%d using pre-allocated %s\n",
-+			      crtc->base.base.id, pll->name);
- 
- 		goto found;
- 	}
-@@ -3109,9 +3109,9 @@ static struct intel_shared_dpll *intel_get_shared_dpll(struct intel_crtc *crtc,
- 
- 		if (dpll == (I915_READ(pll->pll_reg) & 0x7fffffff) &&
- 		    fp == I915_READ(pll->fp0_reg)) {
--			DRM_DEBUG_KMS("CRTC:%d sharing existing PCH PLL %x (refcount %d, ative %d)\n",
-+			DRM_DEBUG_KMS("CRTC:%d sharing existing %s (refcount %d, ative %d)\n",
- 				      crtc->base.base.id,
--				      pll->pll_reg, pll->refcount, pll->active);
-+				      pll->name, pll->refcount, pll->active);
- 
- 			goto found;
- 		}
-@@ -3121,8 +3121,8 @@ static struct intel_shared_dpll *intel_get_shared_dpll(struct intel_crtc *crtc,
- 	for (i = 0; i < dev_priv->num_shared_dpll; i++) {
- 		pll = &dev_priv->shared_dplls[i];
- 		if (pll->refcount == 0) {
--			DRM_DEBUG_KMS("CRTC:%d allocated PCH PLL %x\n",
--				      crtc->base.base.id, pll->pll_reg);
-+			DRM_DEBUG_KMS("CRTC:%d allocated %s\n",
-+				      crtc->base.base.id, pll->name);
- 			goto found;
- 		}
- 	}
-@@ -3131,9 +3131,10 @@ static struct intel_shared_dpll *intel_get_shared_dpll(struct intel_crtc *crtc,
- 
- found:
- 	crtc->config.shared_dpll = i;
--	DRM_DEBUG_DRIVER("using pll %d for pipe %c\n", i, pipe_name(crtc->pipe));
-+	DRM_DEBUG_DRIVER("using %s for pipe %c\n", pll->name,
-+			 pipe_name(crtc->pipe));
- 	if (pll->active == 0) {
--		DRM_DEBUG_DRIVER("setting up pll %d\n", i);
-+		DRM_DEBUG_DRIVER("setting up %s\n", pll->name);
- 		WARN_ON(pll->on);
- 		assert_shared_dpll_disabled(dev_priv, pll, NULL);
- 
-@@ -8755,6 +8756,11 @@ static void intel_cpu_pll_init(struct drm_device *dev)
- 		intel_ddi_pll_init(dev);
- }
- 
-+static char *ibx_pch_dpll_names[] = {
-+	"PCH DPLL A",
-+	"PCH DPLL B",
-+};
-+
- static void ibx_pch_dpll_init(struct drm_device *dev)
- {
- 	drm_i915_private_t *dev_priv = dev->dev_private;
-@@ -8763,6 +8769,8 @@ static void ibx_pch_dpll_init(struct drm_device *dev)
- 	dev_priv->num_shared_dpll = 2;
- 
- 	for (i = 0; i < dev_priv->num_shared_dpll; i++) {
-+		dev_priv->shared_dplls[i].id = i;
-+		dev_priv->shared_dplls[i].name = ibx_pch_dpll_names[i];
- 		dev_priv->shared_dplls[i].pll_reg = _PCH_DPLL(i);
- 		dev_priv->shared_dplls[i].fp0_reg = _PCH_FP0(i);
- 		dev_priv->shared_dplls[i].fp1_reg = _PCH_FP1(i);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0300-drm-i915-scrap-register-address-storage.patch b/patches.baytrail/0300-drm-i915-scrap-register-address-storage.patch
deleted file mode 100644
index 99a2bf045760f..0000000000000
--- a/patches.baytrail/0300-drm-i915-scrap-register-address-storage.patch
+++ /dev/null
@@ -1,180 +0,0 @@
-From e560ad6046950a9f20045d98563b0da19177128f Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Wed, 5 Jun 2013 13:34:13 +0200
-Subject: drm/i915: scrap register address storage
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Using ids in register macros is much more common in our driver. Also
-this way we can reduce the platform specific stuff a bit.
-
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit e9a632a578e0205c1fb015bb01af49c2ae71d6f2)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h      |    3 ---
- drivers/gpu/drm/i915/i915_reg.h      |    6 +++---
- drivers/gpu/drm/i915/i915_ums.c      |    2 +-
- drivers/gpu/drm/i915/intel_display.c |   35 ++++++++++++++++-------------------
- 4 files changed, 20 insertions(+), 26 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -147,9 +147,6 @@ struct intel_shared_dpll {
- 	const char *name;
- 	/* should match the index in the dev_priv->shared_dplls array */
- 	enum intel_dpll_id id;
--	int pll_reg;
--	int fp0_reg;
--	int fp1_reg;
- };
- 
- /* Used by dp and fdi links */
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -3940,15 +3940,15 @@
- 
- #define _PCH_DPLL_A              0xc6014
- #define _PCH_DPLL_B              0xc6018
--#define _PCH_DPLL(pll) (pll == 0 ? _PCH_DPLL_A : _PCH_DPLL_B)
-+#define PCH_DPLL(pll) (pll == 0 ? _PCH_DPLL_A : _PCH_DPLL_B)
- 
- #define _PCH_FPA0                0xc6040
- #define  FP_CB_TUNE		(0x3<<22)
- #define _PCH_FPA1                0xc6044
- #define _PCH_FPB0                0xc6048
- #define _PCH_FPB1                0xc604c
--#define _PCH_FP0(pll) (pll == 0 ? _PCH_FPA0 : _PCH_FPB0)
--#define _PCH_FP1(pll) (pll == 0 ? _PCH_FPA1 : _PCH_FPB1)
-+#define PCH_FP0(pll) (pll == 0 ? _PCH_FPA0 : _PCH_FPB0)
-+#define PCH_FP1(pll) (pll == 0 ? _PCH_FPA1 : _PCH_FPB1)
- 
- #define PCH_DPLL_TEST           0xc606c
- 
---- a/drivers/gpu/drm/i915/i915_ums.c
-+++ b/drivers/gpu/drm/i915/i915_ums.c
-@@ -41,7 +41,7 @@ static bool i915_pipe_enabled(struct drm
- 		return false;
- 
- 	if (HAS_PCH_SPLIT(dev))
--		dpll_reg = _PCH_DPLL(pipe);
-+		dpll_reg = PCH_DPLL(pipe);
- 	else
- 		dpll_reg = (pipe == PIPE_A) ? _DPLL_A : _DPLL_B;
- 
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -938,7 +938,7 @@ static void assert_shared_dpll(struct dr
- 		  "asserting DPLL %s with no DPLL\n", state_string(state)))
- 		return;
- 
--	val = I915_READ(pll->pll_reg);
-+	val = I915_READ(PCH_DPLL(pll->id));
- 	cur_state = !!(val & DPLL_VCO_ENABLE);
- 	WARN(cur_state != state,
- 	     "%s assertion failure (expected %s, current %s), val=%08x\n",
-@@ -949,14 +949,14 @@ static void assert_shared_dpll(struct dr
- 		u32 pch_dpll;
- 
- 		pch_dpll = I915_READ(PCH_DPLL_SEL);
--		cur_state = pll->pll_reg == _PCH_DPLL_B;
-+		cur_state = pll->id == DPLL_ID_PCH_PLL_B;
- 		if (!WARN(((pch_dpll >> (4 * crtc->pipe)) & 1) != cur_state,
- 			  "PLL[%d] not attached to this transcoder %c: %08x\n",
- 			  cur_state, pipe_name(crtc->pipe), pch_dpll)) {
- 			cur_state = !!(val >> (4*crtc->pipe + 3));
- 			WARN(cur_state != state,
- 			     "PLL[%d] not %s on this transcoder %c: %08x\n",
--			     pll->pll_reg == _PCH_DPLL_B,
-+			     pll->id == DPLL_ID_PCH_PLL_B,
- 			     state_string(state),
- 			     pipe_name(crtc->pipe),
- 			     val);
-@@ -1446,7 +1446,7 @@ static void ironlake_enable_shared_dpll(
- 
- 	DRM_DEBUG_KMS("enabling %s\n", pll->name);
- 
--	reg = pll->pll_reg;
-+	reg = PCH_DPLL(pll->id);
- 	val = I915_READ(reg);
- 	val |= DPLL_VCO_ENABLE;
- 	I915_WRITE(reg, val);
-@@ -1490,7 +1490,7 @@ static void intel_disable_shared_dpll(st
- 	/* Make sure transcoder isn't still depending on us */
- 	assert_pch_transcoder_disabled(dev_priv, crtc->pipe);
- 
--	reg = pll->pll_reg;
-+	reg = PCH_DPLL(pll->id);
- 	val = I915_READ(reg);
- 	val &= ~DPLL_VCO_ENABLE;
- 	I915_WRITE(reg, val);
-@@ -3107,8 +3107,8 @@ static struct intel_shared_dpll *intel_g
- 		if (pll->refcount == 0)
- 			continue;
- 
--		if (dpll == (I915_READ(pll->pll_reg) & 0x7fffffff) &&
--		    fp == I915_READ(pll->fp0_reg)) {
-+		if (dpll == (I915_READ(PCH_DPLL(pll->id)) & 0x7fffffff) &&
-+		    fp == I915_READ(PCH_FP0(pll->id))) {
- 			DRM_DEBUG_KMS("CRTC:%d sharing existing %s (refcount %d, ative %d)\n",
- 				      crtc->base.base.id,
- 				      pll->name, pll->refcount, pll->active);
-@@ -3139,12 +3139,12 @@ found:
- 		assert_shared_dpll_disabled(dev_priv, pll, NULL);
- 
- 		/* Wait for the clocks to stabilize before rewriting the regs */
--		I915_WRITE(pll->pll_reg, dpll & ~DPLL_VCO_ENABLE);
--		POSTING_READ(pll->pll_reg);
-+		I915_WRITE(PCH_DPLL(pll->id), dpll & ~DPLL_VCO_ENABLE);
-+		POSTING_READ(PCH_DPLL(pll->id));
- 		udelay(150);
- 
--		I915_WRITE(pll->fp0_reg, fp);
--		I915_WRITE(pll->pll_reg, dpll & ~DPLL_VCO_ENABLE);
-+		I915_WRITE(PCH_FP0(pll->id), fp);
-+		I915_WRITE(PCH_DPLL(pll->id), dpll & ~DPLL_VCO_ENABLE);
- 	}
- 	pll->refcount++;
- 
-@@ -5785,10 +5785,10 @@ static int ironlake_crtc_mode_set(struct
- 	if (intel_crtc->config.has_pch_encoder) {
- 		pll = intel_crtc_to_shared_dpll(intel_crtc);
- 
--		I915_WRITE(pll->pll_reg, dpll);
-+		I915_WRITE(PCH_DPLL(pll->id), dpll);
- 
- 		/* Wait for the clocks to stabilize. */
--		POSTING_READ(pll->pll_reg);
-+		POSTING_READ(PCH_DPLL(pll->id));
- 		udelay(150);
- 
- 		/* The pixel multiplier can only be updated once the
-@@ -5796,13 +5796,13 @@ static int ironlake_crtc_mode_set(struct
- 		 *
- 		 * So write it again.
- 		 */
--		I915_WRITE(pll->pll_reg, dpll);
-+		I915_WRITE(PCH_DPLL(pll->id), dpll);
- 
- 		if (is_lvds && has_reduced_clock && i915_powersave) {
--			I915_WRITE(pll->fp1_reg, fp2);
-+			I915_WRITE(PCH_FP1(pll->id), fp2);
- 			intel_crtc->lowfreq_avail = true;
- 		} else {
--			I915_WRITE(pll->fp1_reg, fp);
-+			I915_WRITE(PCH_FP1(pll->id), fp);
- 		}
- 	}
- 
-@@ -8771,9 +8771,6 @@ static void ibx_pch_dpll_init(struct drm
- 	for (i = 0; i < dev_priv->num_shared_dpll; i++) {
- 		dev_priv->shared_dplls[i].id = i;
- 		dev_priv->shared_dplls[i].name = ibx_pch_dpll_names[i];
--		dev_priv->shared_dplls[i].pll_reg = _PCH_DPLL(i);
--		dev_priv->shared_dplls[i].fp0_reg = _PCH_FP0(i);
--		dev_priv->shared_dplls[i].fp1_reg = _PCH_FP1(i);
- 	}
- }
- 
diff --git a/patches.baytrail/0301-drm-i915-enable-disable-hooks-for-shared-dplls.patch b/patches.baytrail/0301-drm-i915-enable-disable-hooks-for-shared-dplls.patch
deleted file mode 100644
index 6b7aebcb1ce53..0000000000000
--- a/patches.baytrail/0301-drm-i915-enable-disable-hooks-for-shared-dplls.patch
+++ /dev/null
@@ -1,194 +0,0 @@
-From 9343f3db115d6952668ac1eafc70b1849345d5c8 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Wed, 5 Jun 2013 13:34:14 +0200
-Subject: drm/i915: enable/disable hooks for shared dplls
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Looks at first like a bit of overkill, but
-- Haswell actually wants different enable/disable functions for
-  different plls.
-- And once we have full dpll hw state tracking we can move the full
-  register setup into the ->enable hook.
-
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit e7b903d2525fe3be12b6535a27915186529a51b4)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h      |  7 +++-
- drivers/gpu/drm/i915/intel_display.c | 71 ++++++++++++++++++++++--------------
- 2 files changed, 49 insertions(+), 29 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index c0779fe39576..aaff7ddc4162 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -132,6 +132,8 @@ enum hpd_pin {
- 	list_for_each_entry((intel_encoder), &(dev)->mode_config.encoder_list, base.head) \
- 		if ((intel_encoder)->base.crtc == (__crtc))
- 
-+struct drm_i915_private;
-+
- enum intel_dpll_id {
- 	DPLL_ID_PRIVATE = -1, /* non-shared dpll in use */
- 	/* real shared dpll ids must be >= 0 */
-@@ -147,6 +149,10 @@ struct intel_shared_dpll {
- 	const char *name;
- 	/* should match the index in the dev_priv->shared_dplls array */
- 	enum intel_dpll_id id;
-+	void (*enable)(struct drm_i915_private *dev_priv,
-+		       struct intel_shared_dpll *pll);
-+	void (*disable)(struct drm_i915_private *dev_priv,
-+			struct intel_shared_dpll *pll);
- };
- 
- /* Used by dp and fdi links */
-@@ -202,7 +208,6 @@ struct opregion_header;
- struct opregion_acpi;
- struct opregion_swsci;
- struct opregion_asle;
--struct drm_i915_private;
- 
- struct intel_opregion {
- 	struct opregion_header __iomem *header;
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index cbe2a077a822..4dd9e134f687 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -1419,8 +1419,6 @@ static void ironlake_enable_shared_dpll(struct intel_crtc *crtc)
- {
- 	struct drm_i915_private *dev_priv = crtc->base.dev->dev_private;
- 	struct intel_shared_dpll *pll = intel_crtc_to_shared_dpll(crtc);
--	int reg;
--	u32 val;
- 
- 	/* PCH PLLs only available on ILK, SNB and IVB */
- 	BUG_ON(dev_priv->info->gen < 5);
-@@ -1434,9 +1432,6 @@ static void ironlake_enable_shared_dpll(struct intel_crtc *crtc)
- 		      pll->name, pll->active, pll->on,
- 		      crtc->base.base.id);
- 
--	/* PCH refclock must be enabled first */
--	assert_pch_refclk_enabled(dev_priv);
--
- 	if (pll->active++) {
- 		WARN_ON(!pll->on);
- 		assert_shared_dpll_enabled(dev_priv, pll, NULL);
-@@ -1445,14 +1440,7 @@ static void ironlake_enable_shared_dpll(struct intel_crtc *crtc)
- 	WARN_ON(pll->on);
- 
- 	DRM_DEBUG_KMS("enabling %s\n", pll->name);
--
--	reg = PCH_DPLL(pll->id);
--	val = I915_READ(reg);
--	val |= DPLL_VCO_ENABLE;
--	I915_WRITE(reg, val);
--	POSTING_READ(reg);
--	udelay(200);
--
-+	pll->enable(dev_priv, pll);
- 	pll->on = true;
- }
- 
-@@ -1460,8 +1448,6 @@ static void intel_disable_shared_dpll(struct intel_crtc *crtc)
- {
- 	struct drm_i915_private *dev_priv = crtc->base.dev->dev_private;
- 	struct intel_shared_dpll *pll = intel_crtc_to_shared_dpll(crtc);
--	int reg;
--	u32 val;
- 
- 	/* PCH only available on ILK+ */
- 	BUG_ON(dev_priv->info->gen < 5);
-@@ -1486,17 +1472,7 @@ static void intel_disable_shared_dpll(struct intel_crtc *crtc)
- 		return;
- 
- 	DRM_DEBUG_KMS("disabling %s\n", pll->name);
--
--	/* Make sure transcoder isn't still depending on us */
--	assert_pch_transcoder_disabled(dev_priv, crtc->pipe);
--
--	reg = PCH_DPLL(pll->id);
--	val = I915_READ(reg);
--	val &= ~DPLL_VCO_ENABLE;
--	I915_WRITE(reg, val);
--	POSTING_READ(reg);
--	udelay(200);
--
-+	pll->disable(dev_priv, pll);
- 	pll->on = false;
- }
- 
-@@ -8756,6 +8732,43 @@ static void intel_cpu_pll_init(struct drm_device *dev)
- 		intel_ddi_pll_init(dev);
- }
- 
-+static void ibx_pch_dpll_enable(struct drm_i915_private *dev_priv,
-+				struct intel_shared_dpll *pll)
-+{
-+	uint32_t reg, val;
-+
-+	/* PCH refclock must be enabled first */
-+	assert_pch_refclk_enabled(dev_priv);
-+
-+	reg = PCH_DPLL(pll->id);
-+	val = I915_READ(reg);
-+	val |= DPLL_VCO_ENABLE;
-+	I915_WRITE(reg, val);
-+	POSTING_READ(reg);
-+	udelay(200);
-+}
-+
-+static void ibx_pch_dpll_disable(struct drm_i915_private *dev_priv,
-+				 struct intel_shared_dpll *pll)
-+{
-+	struct drm_device *dev = dev_priv->dev;
-+	struct intel_crtc *crtc;
-+	uint32_t reg, val;
-+
-+	/* Make sure no transcoder isn't still depending on us. */
-+	list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head) {
-+		if (intel_crtc_to_shared_dpll(crtc) == pll)
-+			assert_pch_transcoder_disabled(dev_priv, crtc->pipe);
-+	}
-+
-+	reg = PCH_DPLL(pll->id);
-+	val = I915_READ(reg);
-+	val &= ~DPLL_VCO_ENABLE;
-+	I915_WRITE(reg, val);
-+	POSTING_READ(reg);
-+	udelay(200);
-+}
-+
- static char *ibx_pch_dpll_names[] = {
- 	"PCH DPLL A",
- 	"PCH DPLL B",
-@@ -8763,7 +8776,7 @@ static char *ibx_pch_dpll_names[] = {
- 
- static void ibx_pch_dpll_init(struct drm_device *dev)
- {
--	drm_i915_private_t *dev_priv = dev->dev_private;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
- 	int i;
- 
- 	dev_priv->num_shared_dpll = 2;
-@@ -8771,12 +8784,14 @@ static void ibx_pch_dpll_init(struct drm_device *dev)
- 	for (i = 0; i < dev_priv->num_shared_dpll; i++) {
- 		dev_priv->shared_dplls[i].id = i;
- 		dev_priv->shared_dplls[i].name = ibx_pch_dpll_names[i];
-+		dev_priv->shared_dplls[i].enable = ibx_pch_dpll_enable;
-+		dev_priv->shared_dplls[i].disable = ibx_pch_dpll_disable;
- 	}
- }
- 
- static void intel_shared_dpll_init(struct drm_device *dev)
- {
--	drm_i915_private_t *dev_priv = dev->dev_private;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
- 
- 	if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev))
- 		ibx_pch_dpll_init(dev);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0302-drm-i915-drop-crtc-checking-from-assert_shared_dpll.patch b/patches.baytrail/0302-drm-i915-drop-crtc-checking-from-assert_shared_dpll.patch
deleted file mode 100644
index 2e97b3b054960..0000000000000
--- a/patches.baytrail/0302-drm-i915-drop-crtc-checking-from-assert_shared_dpll.patch
+++ /dev/null
@@ -1,107 +0,0 @@
-From 214ac6d59b698fa49712b1592dcac43de38d8bc7 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Wed, 5 Jun 2013 13:34:15 +0200
-Subject: drm/i915: drop crtc checking from assert_shared_dpll
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The hw state readout code for the pipe config will now check
-this for us, so rip out this hand-rolled complexity.
-
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit e9d6944ed75dbf16ae34bb73bd1eeca7cb183b67)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 35 +++++++----------------------------
- 1 file changed, 7 insertions(+), 28 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 4dd9e134f687..f29c8a4477da 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -923,7 +923,6 @@ intel_crtc_to_shared_dpll(struct intel_crtc *crtc)
- /* For ILK+ */
- static void assert_shared_dpll(struct drm_i915_private *dev_priv,
- 			       struct intel_shared_dpll *pll,
--			       struct intel_crtc *crtc,
- 			       bool state)
- {
- 	u32 val;
-@@ -943,28 +942,9 @@ static void assert_shared_dpll(struct drm_i915_private *dev_priv,
- 	WARN(cur_state != state,
- 	     "%s assertion failure (expected %s, current %s), val=%08x\n",
- 	     pll->name, state_string(state), state_string(cur_state), val);
--
--	/* Make sure the selected PLL is correctly attached to the transcoder */
--	if (crtc && HAS_PCH_CPT(dev_priv->dev)) {
--		u32 pch_dpll;
--
--		pch_dpll = I915_READ(PCH_DPLL_SEL);
--		cur_state = pll->id == DPLL_ID_PCH_PLL_B;
--		if (!WARN(((pch_dpll >> (4 * crtc->pipe)) & 1) != cur_state,
--			  "PLL[%d] not attached to this transcoder %c: %08x\n",
--			  cur_state, pipe_name(crtc->pipe), pch_dpll)) {
--			cur_state = !!(val >> (4*crtc->pipe + 3));
--			WARN(cur_state != state,
--			     "PLL[%d] not %s on this transcoder %c: %08x\n",
--			     pll->id == DPLL_ID_PCH_PLL_B,
--			     state_string(state),
--			     pipe_name(crtc->pipe),
--			     val);
--		}
--	}
- }
--#define assert_shared_dpll_enabled(d, p, c) assert_shared_dpll(d, p, c, true)
--#define assert_shared_dpll_disabled(d, p, c) assert_shared_dpll(d, p, c, false)
-+#define assert_shared_dpll_enabled(d, p) assert_shared_dpll(d, p, true)
-+#define assert_shared_dpll_disabled(d, p) assert_shared_dpll(d, p, false)
- 
- static void assert_fdi_tx(struct drm_i915_private *dev_priv,
- 			  enum pipe pipe, bool state)
-@@ -1434,7 +1414,7 @@ static void ironlake_enable_shared_dpll(struct intel_crtc *crtc)
- 
- 	if (pll->active++) {
- 		WARN_ON(!pll->on);
--		assert_shared_dpll_enabled(dev_priv, pll, NULL);
-+		assert_shared_dpll_enabled(dev_priv, pll);
- 		return;
- 	}
- 	WARN_ON(pll->on);
-@@ -1462,11 +1442,11 @@ static void intel_disable_shared_dpll(struct intel_crtc *crtc)
- 		      crtc->base.base.id);
- 
- 	if (WARN_ON(pll->active == 0)) {
--		assert_shared_dpll_disabled(dev_priv, pll, NULL);
-+		assert_shared_dpll_disabled(dev_priv, pll);
- 		return;
- 	}
- 
--	assert_shared_dpll_enabled(dev_priv, pll, NULL);
-+	assert_shared_dpll_enabled(dev_priv, pll);
- 	WARN_ON(!pll->on);
- 	if (--pll->active)
- 		return;
-@@ -1489,8 +1469,7 @@ static void ironlake_enable_pch_transcoder(struct drm_i915_private *dev_priv,
- 
- 	/* Make sure PCH DPLL is enabled */
- 	assert_shared_dpll_enabled(dev_priv,
--				   intel_crtc_to_shared_dpll(intel_crtc),
--				   intel_crtc);
-+				   intel_crtc_to_shared_dpll(intel_crtc));
- 
- 	/* FDI must be feeding us bits for PCH ports */
- 	assert_fdi_tx_enabled(dev_priv, pipe);
-@@ -3112,7 +3091,7 @@ found:
- 	if (pll->active == 0) {
- 		DRM_DEBUG_DRIVER("setting up %s\n", pll->name);
- 		WARN_ON(pll->on);
--		assert_shared_dpll_disabled(dev_priv, pll, NULL);
-+		assert_shared_dpll_disabled(dev_priv, pll);
- 
- 		/* Wait for the clocks to stabilize before rewriting the regs */
- 		I915_WRITE(PCH_DPLL(pll->id), dpll & ~DPLL_VCO_ENABLE);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0303-drm-i915-Fix-old-reference-to-i830_sdvo_get_capabili.patch b/patches.baytrail/0303-drm-i915-Fix-old-reference-to-i830_sdvo_get_capabili.patch
deleted file mode 100644
index 6060c15c0024d..0000000000000
--- a/patches.baytrail/0303-drm-i915-Fix-old-reference-to-i830_sdvo_get_capabili.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From 49ee3b66adbd7fbf83d3e8f2298bc2af0fd99b26 Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Mon, 10 Jun 2013 13:28:42 +0100
-Subject: drm/i915: Fix old reference to i830_sdvo_get_capabilities()
-
-It's now intel_sdvo_get_capabilities().
-
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 19d415a25e9078dba26adb54396d4e5b30d3b572)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_sdvo.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
-index 5c53fc79977a..019b0380a3d6 100644
---- a/drivers/gpu/drm/i915/intel_sdvo.c
-+++ b/drivers/gpu/drm/i915/intel_sdvo.c
-@@ -80,7 +80,7 @@ struct intel_sdvo {
- 
- 	/*
- 	 * Capabilities of the SDVO device returned by
--	 * i830_sdvo_get_capabilities()
-+	 * intel_sdvo_get_capabilities()
- 	 */
- 	struct intel_sdvo_caps caps;
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0304-drm-i915-Initialize-active_outputs-to-never-read-uni.patch b/patches.baytrail/0304-drm-i915-Initialize-active_outputs-to-never-read-uni.patch
deleted file mode 100644
index e22020e9909d3..0000000000000
--- a/patches.baytrail/0304-drm-i915-Initialize-active_outputs-to-never-read-uni.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From 5c0a059d629b00e5497d444fa41dab8b523134fb Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Mon, 10 Jun 2013 13:49:25 +0100
-Subject: drm/i915: Initialize active_outputs to never read unitialized values
-
-In case of intel_sdvo_get_active_outputs() failing, we end up reading a
-value from the stack.
-
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 2f28c50bb3881f11afee8f8c9041dad2c96653aa)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_sdvo.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
-index 019b0380a3d6..44609b623100 100644
---- a/drivers/gpu/drm/i915/intel_sdvo.c
-+++ b/drivers/gpu/drm/i915/intel_sdvo.c
-@@ -1277,7 +1277,7 @@ static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector)
- 	struct intel_sdvo_connector *intel_sdvo_connector =
- 		to_intel_sdvo_connector(&connector->base);
- 	struct intel_sdvo *intel_sdvo = intel_attached_sdvo(&connector->base);
--	u16 active_outputs;
-+	u16 active_outputs = 0;
- 
- 	intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
- 
-@@ -1293,7 +1293,7 @@ static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder,
- 	struct drm_device *dev = encoder->base.dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
--	u16 active_outputs;
-+	u16 active_outputs = 0;
- 	u32 tmp;
- 
- 	tmp = I915_READ(intel_sdvo->sdvo_reg);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0305-drm-i915-Initialize-ring-hangcheck-upon-ring-init.patch b/patches.baytrail/0305-drm-i915-Initialize-ring-hangcheck-upon-ring-init.patch
deleted file mode 100644
index 52b01563a75d3..0000000000000
--- a/patches.baytrail/0305-drm-i915-Initialize-ring-hangcheck-upon-ring-init.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From c4b39cf5636e20fd0bc0ec734078dbb1f8d29a51 Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Mon, 10 Jun 2013 11:20:19 +0100
-Subject: drm/i915: Initialize ring->hangcheck upon ring init
-
-When we reset and restart a ring, we also want to clear any existing
-hangcheck.
-
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 50f018dff180942dc40e601de6e97145a4aaeaa9)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_ringbuffer.c | 2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
-index 07a949c042f2..1d4a7ee41881 100644
---- a/drivers/gpu/drm/i915/intel_ringbuffer.c
-+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
-@@ -453,6 +453,8 @@ static int init_ring_common(struct intel_ring_buffer *ring)
- 		ring->last_retired_head = -1;
- 	}
- 
-+	memset(&ring->hangcheck, 0, sizeof(ring->hangcheck));
-+
- out:
- 	if (HAS_FORCE_WAKE(dev))
- 		gen6_gt_force_wake_put(dev_priv);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0306-drm-i915-Only-slightly-increment-hangcheck-score-if-.patch b/patches.baytrail/0306-drm-i915-Only-slightly-increment-hangcheck-score-if-.patch
deleted file mode 100644
index 1bc76ac63aab9..0000000000000
--- a/patches.baytrail/0306-drm-i915-Only-slightly-increment-hangcheck-score-if-.patch
+++ /dev/null
@@ -1,215 +0,0 @@
-From ac8570c9d2d2d6f199dcc020d34a421ffe02f98e Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Mon, 10 Jun 2013 11:20:20 +0100
-Subject: drm/i915: Only slightly increment hangcheck score if we succesfully
- kick a ring
-
-After kicking a ring, it should be free to make progress again and so
-should not be accused of being stuck until hangcheck fires once more. In
-order to catch a denial-of-service within a batch or across multiple
-batches, we still do increment the hangcheck score - just not as
-severely so that it takes multiple kicks to fail.
-
-This should address part of Ben's justified criticism of
-
-commit 05407ff889ceebe383aa5907219f86582ef96b72
-Author: Mika Kuoppala <mika.kuoppala@linux.intel.com>
-Date:   Thu May 30 09:04:29 2013 +0300
-
-    drm/i915: detect hang using per ring hangcheck_score
-
-"There's also another corner case on the kick. If the seqno = 2
-(though not stuck), and on the 3rd hangcheck, the ring is stuck, and
-we try to kick it... we don't actually try to find out if the kick
-helped."
-
-v2: Make sure we catch DoS attempts with batches full of invalid WAITs.
-v3: Preserve the ability to detect loops by always charging the ring
-    if it is busy on the same request.
-v4: Make sure we queue another check if on a new batch
-
-References: https://bugs.freedesktop.org/show_bug.cgi?id=65394
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
-Cc: Ben Widawsky <ben@bwidawsk.net>
-Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 9107e9d227e3b0893829baee4ac59feb874d4c23)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 110 +++++++++++++++++++++-------------------
- 1 file changed, 58 insertions(+), 52 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index 8916651b3e1e..b1e504a8d531 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -2351,21 +2351,11 @@ ring_last_seqno(struct intel_ring_buffer *ring)
- 			  struct drm_i915_gem_request, list)->seqno;
- }
- 
--static bool i915_hangcheck_ring_idle(struct intel_ring_buffer *ring,
--				     u32 ring_seqno, bool *err)
--{
--	if (list_empty(&ring->request_list) ||
--	    i915_seqno_passed(ring_seqno, ring_last_seqno(ring))) {
--		/* Issue a wake-up to catch stuck h/w. */
--		if (waitqueue_active(&ring->irq_queue)) {
--			DRM_ERROR("Hangcheck timer elapsed... %s idle\n",
--				  ring->name);
--			wake_up_all(&ring->irq_queue);
--			*err = true;
--		}
--		return true;
--	}
--	return false;
-+static bool
-+ring_idle(struct intel_ring_buffer *ring, u32 seqno)
-+{
-+	return (list_empty(&ring->request_list) ||
-+		i915_seqno_passed(seqno, ring_last_seqno(ring)));
- }
- 
- static bool semaphore_passed(struct intel_ring_buffer *ring)
-@@ -2399,16 +2389,26 @@ static bool semaphore_passed(struct intel_ring_buffer *ring)
- 				 ioread32(ring->virtual_start+acthd+4)+1);
- }
- 
--static bool kick_ring(struct intel_ring_buffer *ring)
-+static bool ring_hung(struct intel_ring_buffer *ring)
- {
- 	struct drm_device *dev = ring->dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
--	u32 tmp = I915_READ_CTL(ring);
-+	u32 tmp;
-+
-+	if (IS_GEN2(dev))
-+		return true;
-+
-+	/* Is the chip hanging on a WAIT_FOR_EVENT?
-+	 * If so we can simply poke the RB_WAIT bit
-+	 * and break the hang. This should work on
-+	 * all but the second generation chipsets.
-+	 */
-+	tmp = I915_READ_CTL(ring);
- 	if (tmp & RING_WAIT) {
- 		DRM_ERROR("Kicking stuck wait on %s\n",
- 			  ring->name);
- 		I915_WRITE_CTL(ring, tmp);
--		return true;
-+		return false;
- 	}
- 
- 	if (INTEL_INFO(dev)->gen >= 6 &&
-@@ -2417,22 +2417,10 @@ static bool kick_ring(struct intel_ring_buffer *ring)
- 		DRM_ERROR("Kicking stuck semaphore on %s\n",
- 			  ring->name);
- 		I915_WRITE_CTL(ring, tmp);
--		return true;
--	}
--	return false;
--}
--
--static bool i915_hangcheck_ring_hung(struct intel_ring_buffer *ring)
--{
--	if (IS_GEN2(ring->dev))
- 		return false;
-+	}
- 
--	/* Is the chip hanging on a WAIT_FOR_EVENT?
--	 * If so we can simply poke the RB_WAIT bit
--	 * and break the hang. This should work on
--	 * all but the second generation chipsets.
--	 */
--	return !kick_ring(ring);
-+	return true;
- }
- 
- /**
-@@ -2450,45 +2438,63 @@ void i915_hangcheck_elapsed(unsigned long data)
- 	struct intel_ring_buffer *ring;
- 	int i;
- 	int busy_count = 0, rings_hung = 0;
--	bool stuck[I915_NUM_RINGS];
-+	bool stuck[I915_NUM_RINGS] = { 0 };
-+#define BUSY 1
-+#define KICK 5
-+#define HUNG 20
-+#define FIRE 30
- 
- 	if (!i915_enable_hangcheck)
- 		return;
- 
- 	for_each_ring(ring, dev_priv, i) {
- 		u32 seqno, acthd;
--		bool idle, err = false;
-+		bool busy = true;
- 
- 		seqno = ring->get_seqno(ring, false);
- 		acthd = intel_ring_get_active_head(ring);
--		idle = i915_hangcheck_ring_idle(ring, seqno, &err);
--		stuck[i] = ring->hangcheck.acthd == acthd;
--
--		if (idle) {
--			if (err)
--				ring->hangcheck.score += 2;
--			else
--				ring->hangcheck.score = 0;
--		} else {
--			busy_count++;
- 
--			if (ring->hangcheck.seqno == seqno) {
--				ring->hangcheck.score++;
--
--				/* Kick ring if stuck*/
--				if (stuck[i])
--					i915_hangcheck_ring_hung(ring);
-+		if (ring->hangcheck.seqno == seqno) {
-+			if (ring_idle(ring, seqno)) {
-+				if (waitqueue_active(&ring->irq_queue)) {
-+					/* Issue a wake-up to catch stuck h/w. */
-+					DRM_ERROR("Hangcheck timer elapsed... %s idle\n",
-+						  ring->name);
-+					wake_up_all(&ring->irq_queue);
-+					ring->hangcheck.score += HUNG;
-+				} else
-+					busy = false;
- 			} else {
--				ring->hangcheck.score = 0;
-+				int score;
-+
-+				stuck[i] = ring->hangcheck.acthd == acthd;
-+				if (stuck[i]) {
-+					/* Every time we kick the ring, add a
-+					 * small increment to the hangcheck
-+					 * score so that we can catch a
-+					 * batch that is repeatedly kicked.
-+					 */
-+					score = ring_hung(ring) ? HUNG : KICK;
-+				} else
-+					score = BUSY;
-+
-+				ring->hangcheck.score += score;
- 			}
-+		} else {
-+			/* Gradually reduce the count so that we catch DoS
-+			 * attempts across multiple batches.
-+			 */
-+			if (ring->hangcheck.score > 0)
-+				ring->hangcheck.score--;
- 		}
- 
- 		ring->hangcheck.seqno = seqno;
- 		ring->hangcheck.acthd = acthd;
-+		busy_count += busy;
- 	}
- 
- 	for_each_ring(ring, dev_priv, i) {
--		if (ring->hangcheck.score > 2) {
-+		if (ring->hangcheck.score > FIRE) {
- 			rings_hung++;
- 			DRM_ERROR("%s: %s on %s 0x%x\n", ring->name,
- 				  stuck[i] ? "stuck" : "no progress",
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0307-drm-i915-Don-t-count-semaphore-waits-towards-a-stuck.patch b/patches.baytrail/0307-drm-i915-Don-t-count-semaphore-waits-towards-a-stuck.patch
deleted file mode 100644
index c81d35c4041f5..0000000000000
--- a/patches.baytrail/0307-drm-i915-Don-t-count-semaphore-waits-towards-a-stuck.patch
+++ /dev/null
@@ -1,237 +0,0 @@
-From 73e8d739d327e068bdf4bae329d273583f0ef8d2 Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Mon, 10 Jun 2013 11:20:21 +0100
-Subject: drm/i915: Don't count semaphore waits towards a stuck ring
-
-If we detect a ring is in a valid wait for another, just let it be.
-Eventually it will either begin to progress again, or the entire system
-will come grinding to a halt and then hangcheck will fire as soon as the
-deadlock is detected.
-
-This error was foretold by Ben in
-commit 05407ff889ceebe383aa5907219f86582ef96b72
-Author: Mika Kuoppala <mika.kuoppala@linux.intel.com>
-Date:   Thu May 30 09:04:29 2013 +0300
-
-    drm/i915: detect hang using per ring hangcheck_score
-
-"If ring B is waiting on ring A via semaphore, and ring A is making
-progress, albeit slowly - the hangcheck will fire. The check will
-determine that A is moving, however ring B will appear hung because
-the ACTHD doesn't move. I honestly can't say if that's actually a
-realistic problem to hit it probably implies the timeout value is too
-low."
-
-v2: Make sure we don't even incur the KICK cost whilst waiting.
-
-Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=65394
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
-Cc: Ben Widawsky <ben@bwidawsk.net>
-Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 6274f2126a0454d3c3df1bc9cc6f5e18302696f7)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c         | 121 +++++++++++++++++++++++---------
- drivers/gpu/drm/i915/intel_ringbuffer.h |   1 +
- 2 files changed, 90 insertions(+), 32 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index b1e504a8d531..486016b641e8 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -2358,21 +2358,21 @@ ring_idle(struct intel_ring_buffer *ring, u32 seqno)
- 		i915_seqno_passed(seqno, ring_last_seqno(ring)));
- }
- 
--static bool semaphore_passed(struct intel_ring_buffer *ring)
-+static struct intel_ring_buffer *
-+semaphore_waits_for(struct intel_ring_buffer *ring, u32 *seqno)
- {
- 	struct drm_i915_private *dev_priv = ring->dev->dev_private;
--	u32 acthd = intel_ring_get_active_head(ring) & HEAD_ADDR;
--	struct intel_ring_buffer *signaller;
--	u32 cmd, ipehr, acthd_min;
-+	u32 cmd, ipehr, acthd, acthd_min;
- 
- 	ipehr = I915_READ(RING_IPEHR(ring->mmio_base));
- 	if ((ipehr & ~(0x3 << 16)) !=
- 	    (MI_SEMAPHORE_MBOX | MI_SEMAPHORE_COMPARE | MI_SEMAPHORE_REGISTER))
--		return false;
-+		return NULL;
- 
- 	/* ACTHD is likely pointing to the dword after the actual command,
- 	 * so scan backwards until we find the MBOX.
- 	 */
-+	acthd = intel_ring_get_active_head(ring) & HEAD_ADDR;
- 	acthd_min = max((int)acthd - 3 * 4, 0);
- 	do {
- 		cmd = ioread32(ring->virtual_start + acthd);
-@@ -2381,22 +2381,53 @@ static bool semaphore_passed(struct intel_ring_buffer *ring)
- 
- 		acthd -= 4;
- 		if (acthd < acthd_min)
--			return false;
-+			return NULL;
- 	} while (1);
- 
--	signaller = &dev_priv->ring[(ring->id + (((ipehr >> 17) & 1) + 1)) % 3];
--	return i915_seqno_passed(signaller->get_seqno(signaller, false),
--				 ioread32(ring->virtual_start+acthd+4)+1);
-+	*seqno = ioread32(ring->virtual_start+acthd+4)+1;
-+	return &dev_priv->ring[(ring->id + (((ipehr >> 17) & 1) + 1)) % 3];
- }
- 
--static bool ring_hung(struct intel_ring_buffer *ring)
-+static int semaphore_passed(struct intel_ring_buffer *ring)
-+{
-+	struct drm_i915_private *dev_priv = ring->dev->dev_private;
-+	struct intel_ring_buffer *signaller;
-+	u32 seqno, ctl;
-+
-+	ring->hangcheck.deadlock = true;
-+
-+	signaller = semaphore_waits_for(ring, &seqno);
-+	if (signaller == NULL || signaller->hangcheck.deadlock)
-+		return -1;
-+
-+	/* cursory check for an unkickable deadlock */
-+	ctl = I915_READ_CTL(signaller);
-+	if (ctl & RING_WAIT_SEMAPHORE && semaphore_passed(signaller) < 0)
-+		return -1;
-+
-+	return i915_seqno_passed(signaller->get_seqno(signaller, false), seqno);
-+}
-+
-+static void semaphore_clear_deadlocks(struct drm_i915_private *dev_priv)
-+{
-+	struct intel_ring_buffer *ring;
-+	int i;
-+
-+	for_each_ring(ring, dev_priv, i)
-+		ring->hangcheck.deadlock = false;
-+}
-+
-+static enum { wait, active, kick, hung } ring_stuck(struct intel_ring_buffer *ring, u32 acthd)
- {
- 	struct drm_device *dev = ring->dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	u32 tmp;
- 
-+	if (ring->hangcheck.acthd != acthd)
-+		return active;
-+
- 	if (IS_GEN2(dev))
--		return true;
-+		return hung;
- 
- 	/* Is the chip hanging on a WAIT_FOR_EVENT?
- 	 * If so we can simply poke the RB_WAIT bit
-@@ -2408,19 +2439,24 @@ static bool ring_hung(struct intel_ring_buffer *ring)
- 		DRM_ERROR("Kicking stuck wait on %s\n",
- 			  ring->name);
- 		I915_WRITE_CTL(ring, tmp);
--		return false;
--	}
--
--	if (INTEL_INFO(dev)->gen >= 6 &&
--	    tmp & RING_WAIT_SEMAPHORE &&
--	    semaphore_passed(ring)) {
--		DRM_ERROR("Kicking stuck semaphore on %s\n",
--			  ring->name);
--		I915_WRITE_CTL(ring, tmp);
--		return false;
-+		return kick;
-+	}
-+
-+	if (INTEL_INFO(dev)->gen >= 6 && tmp & RING_WAIT_SEMAPHORE) {
-+		switch (semaphore_passed(ring)) {
-+		default:
-+			return hung;
-+		case 1:
-+			DRM_ERROR("Kicking stuck semaphore on %s\n",
-+				  ring->name);
-+			I915_WRITE_CTL(ring, tmp);
-+			return kick;
-+		case 0:
-+			return wait;
-+		}
- 	}
- 
--	return true;
-+	return hung;
- }
- 
- /**
-@@ -2451,6 +2487,8 @@ void i915_hangcheck_elapsed(unsigned long data)
- 		u32 seqno, acthd;
- 		bool busy = true;
- 
-+		semaphore_clear_deadlocks(dev_priv);
-+
- 		seqno = ring->get_seqno(ring, false);
- 		acthd = intel_ring_get_active_head(ring);
- 
-@@ -2467,17 +2505,36 @@ void i915_hangcheck_elapsed(unsigned long data)
- 			} else {
- 				int score;
- 
--				stuck[i] = ring->hangcheck.acthd == acthd;
--				if (stuck[i]) {
--					/* Every time we kick the ring, add a
--					 * small increment to the hangcheck
--					 * score so that we can catch a
--					 * batch that is repeatedly kicked.
--					 */
--					score = ring_hung(ring) ? HUNG : KICK;
--				} else
-+				/* We always increment the hangcheck score
-+				 * if the ring is busy and still processing
-+				 * the same request, so that no single request
-+				 * can run indefinitely (such as a chain of
-+				 * batches). The only time we do not increment
-+				 * the hangcheck score on this ring, if this
-+				 * ring is in a legitimate wait for another
-+				 * ring. In that case the waiting ring is a
-+				 * victim and we want to be sure we catch the
-+				 * right culprit. Then every time we do kick
-+				 * the ring, add a small increment to the
-+				 * score so that we can catch a batch that is
-+				 * being repeatedly kicked and so responsible
-+				 * for stalling the machine.
-+				 */
-+				switch (ring_stuck(ring, acthd)) {
-+				case wait:
-+					score = 0;
-+					break;
-+				case active:
- 					score = BUSY;
--
-+					break;
-+				case kick:
-+					score = KICK;
-+					break;
-+				case hung:
-+					score = HUNG;
-+					stuck[i] = true;
-+					break;
-+				}
- 				ring->hangcheck.score += score;
- 			}
- 		} else {
-diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
-index efc403d1e3e0..a3e96103dbe5 100644
---- a/drivers/gpu/drm/i915/intel_ringbuffer.h
-+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
-@@ -38,6 +38,7 @@ struct  intel_hw_status_page {
- #define I915_READ_SYNC_1(ring) I915_READ(RING_SYNC_1((ring)->mmio_base))
- 
- struct intel_ring_hangcheck {
-+	bool deadlock;
- 	u32 seqno;
- 	u32 acthd;
- 	int score;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0308-drm-i915-Eliminate-the-addr-seqno-from-the-hangcheck.patch b/patches.baytrail/0308-drm-i915-Eliminate-the-addr-seqno-from-the-hangcheck.patch
deleted file mode 100644
index 31fff66757639..0000000000000
--- a/patches.baytrail/0308-drm-i915-Eliminate-the-addr-seqno-from-the-hangcheck.patch
+++ /dev/null
@@ -1,40 +0,0 @@
-From ecb0044dc539859dbfea59587f9807258fabd665 Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Mon, 10 Jun 2013 11:20:22 +0100
-Subject: drm/i915: Eliminate the addr/seqno from the hangcheck warning
-
-This is of no value to the developer reading the report, let alone the
-bamboozled user.
-
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Acked-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit a43adf0747ecde0d211f29adcbebf067f92e9cbb)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 8 +++-----
- 1 file changed, 3 insertions(+), 5 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index 486016b641e8..b6e0b15552e9 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -2552,12 +2552,10 @@ void i915_hangcheck_elapsed(unsigned long data)
- 
- 	for_each_ring(ring, dev_priv, i) {
- 		if (ring->hangcheck.score > FIRE) {
--			rings_hung++;
--			DRM_ERROR("%s: %s on %s 0x%x\n", ring->name,
-+			DRM_ERROR("%s on %s ring\n",
- 				  stuck[i] ? "stuck" : "no progress",
--				  stuck[i] ? "addr" : "seqno",
--				  stuck[i] ? ring->hangcheck.acthd & HEAD_ADDR :
--				  ring->hangcheck.seqno);
-+				  ring->name);
-+			rings_hung++;
- 		}
- 	}
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0309-drm-i915-WARN-if-the-fence-pin_count-is-invalid.patch b/patches.baytrail/0309-drm-i915-WARN-if-the-fence-pin_count-is-invalid.patch
deleted file mode 100644
index ffbf0667da1a6..0000000000000
--- a/patches.baytrail/0309-drm-i915-WARN-if-the-fence-pin_count-is-invalid.patch
+++ /dev/null
@@ -1,38 +0,0 @@
-From 1299ac5d6df0da627ebb6a474e433f098fa668b2 Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Wed, 12 Jun 2013 11:29:47 +0100
-Subject: drm/i915: WARN if the fence pin_count is invalid
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Stéphane Marchesin found a bug where the fences were not being restored,
-and in particular the fence pin_count was incorrect. Had we had a
-warning in place, this bug would have come to light much earlier. Better
-late than never?
-
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
-Cc: Stéphane Marchesin <marcheu@chromium.org>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit b8c3af766b7f9350c581bb44e6ffaaabc8c1c198)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index aaff7ddc4162..24b5e25412be 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1705,6 +1705,7 @@ i915_gem_object_unpin_fence(struct drm_i915_gem_object *obj)
- {
- 	if (obj->fence_reg != I915_FENCE_REG_NONE) {
- 		struct drm_i915_private *dev_priv = obj->base.dev->dev_private;
-+		WARN_ON(dev_priv->fence_regs[obj->fence_reg].pin_count <= 0);
- 		dev_priv->fence_regs[obj->fence_reg].pin_count--;
- 	}
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0310-drm-i915-disable-sdvo-pixel-multiplier-cross-check-f.patch b/patches.baytrail/0310-drm-i915-disable-sdvo-pixel-multiplier-cross-check-f.patch
deleted file mode 100644
index 4a984c2817ac5..0000000000000
--- a/patches.baytrail/0310-drm-i915-disable-sdvo-pixel-multiplier-cross-check-f.patch
+++ /dev/null
@@ -1,76 +0,0 @@
-From 2aabd37076e0d34510683811277181c166507b29 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Wed, 12 Jun 2013 11:47:24 +0200
-Subject: drm/i915: disable sdvo pixel multiplier cross-check for HAS_PCH_SPLIT
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-We don't (yet) have proper pixel multiplier readout support on pch
-split platforms, so the cross check will naturally fail.
-
-v2: Fix spelling in the comment, spotted by Ville.
-
-v3: Since the ordering constraint is pretty tricky between the crtc
-get_pipe_config callback and the encoder->get_config callback add a
-few comments about it. Prompted by a discussion with Chris Wilson on
-irc about why this does work anywhere else than on i915g/gm.
-
-Reported-by: Chris Wilson <chris@chris-wilson.co.uk>
-Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
-Cc: Chris Wilson <chris@chris-wilson.co.uk>
-Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit fdafa9e276235225ce087695984cf1e52dd0c159)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_drv.h  |  3 ++-
- drivers/gpu/drm/i915/intel_sdvo.c | 11 +++++++++++
- 2 files changed, 13 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index 3ecc3d0e6acc..5817a1643dea 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -140,7 +140,8 @@ struct intel_encoder {
- 	 * it is connected to in the pipe parameter. */
- 	bool (*get_hw_state)(struct intel_encoder *, enum pipe *pipe);
- 	/* Reconstructs the equivalent mode flags for the current hardware
--	 * state. */
-+	 * state. This must be called _after_ display->get_pipe_config has
-+	 * pre-filled the pipe config. */
- 	void (*get_config)(struct intel_encoder *,
- 			   struct intel_crtc_config *pipe_config);
- 	int crtc_mask;
-diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
-index 44609b623100..2628d5622449 100644
---- a/drivers/gpu/drm/i915/intel_sdvo.c
-+++ b/drivers/gpu/drm/i915/intel_sdvo.c
-@@ -1342,6 +1342,13 @@ static void intel_sdvo_get_config(struct intel_encoder *encoder,
- 
- 	pipe_config->adjusted_mode.flags |= flags;
- 
-+	/*
-+	 * pixel multiplier readout is tricky: Only on i915g/gm it is stored in
-+	 * the sdvo port register, on all other platforms it is part of the dpll
-+	 * state. Since the general pipe state readout happens before the
-+	 * encoder->get_config we so already have a valid pixel multplier on all
-+	 * other platfroms.
-+	 */
- 	if (IS_I915G(dev) || IS_I915GM(dev)) {
- 		sdvox = I915_READ(intel_sdvo->sdvo_reg);
- 		pipe_config->pixel_multiplier =
-@@ -1362,6 +1369,10 @@ static void intel_sdvo_get_config(struct intel_encoder *encoder,
- 		encoder_pixel_multiplier = 4;
- 		break;
- 	}
-+
-+	if(HAS_PCH_SPLIT(dev))
-+		return; /* no pixel multiplier readout support yet */
-+
- 	WARN(encoder_pixel_multiplier != pipe_config->pixel_multiplier,
- 	     "SDVO pixel multiplier mismatch, port: %i, encoder: %i\n",
- 	     pipe_config->pixel_multiplier, encoder_pixel_multiplier);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0311-drm-i915-pnv-dpll-doesn-t-use-m1.patch b/patches.baytrail/0311-drm-i915-pnv-dpll-doesn-t-use-m1.patch
deleted file mode 100644
index b4e02d98c1f57..0000000000000
--- a/patches.baytrail/0311-drm-i915-pnv-dpll-doesn-t-use-m1.patch
+++ /dev/null
@@ -1,47 +0,0 @@
-From 1da5d6aeb2f6038bd908c8e30de516b4d1989151 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Tue, 21 May 2013 21:54:55 +0200
-Subject: drm/i915: pnv dpll doesn't use m1!
-
-So don't try to store it in the DPLL_FP register.
-
-Otherwise it looks like the limits for pineview are correct: It has
-it's own clock computation code, which doesn't use an offset for n
-divisors, and the register value based m limits look sane enough.
-
-v2: Rebase on top of the pineview clock refactor and fixup up the
-commit message: It's m1 pnv doens't care about, not m2!
-
-Quoting Damien's review:
-
-  - "n can vary between 2 and 6, but we declare the 3-6 as limits.
-  - "p1 seems to be able to go up to 9
-  - "the m upper limit seems a bit big, but the docs are a bit shy on
-    that values for pnv.
-
-"Otherwise, the change itself seems good:"
-
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 7df00d7adb080122502a30ec48f237d2f90d36ad)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index f29c8a4477da..e21c1466a97d 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -4236,7 +4236,7 @@ static int i9xx_get_refclk(struct drm_crtc *crtc, int num_connectors)
- 
- static uint32_t pnv_dpll_compute_fp(struct dpll *dpll)
- {
--	return (1 << dpll->n) << 16 | dpll->m1 << 8 | dpll->m2;
-+	return (1 << dpll->n) << 16 | dpll->m2;
- }
- 
- static uint32_t i9xx_dpll_compute_fp(struct dpll *dpll)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0312-drm-i915-display-pll-hw-state-readout-and-checking.patch b/patches.baytrail/0312-drm-i915-display-pll-hw-state-readout-and-checking.patch
deleted file mode 100644
index 914423c825135..0000000000000
--- a/patches.baytrail/0312-drm-i915-display-pll-hw-state-readout-and-checking.patch
+++ /dev/null
@@ -1,204 +0,0 @@
-From 47fff9f06340231bec1845484552322a52b70561 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Wed, 5 Jun 2013 13:34:16 +0200
-Subject: drm/i915: display pll hw state readout and checking
-
-Currently still with an empty register state, this will follow in a
-next step. This one here just creates the new vfunc and uses it for
-cross-checking, initial state takeover and the dpll assert function.
-
-And add a FIXME for the ddi pll readout code, which still needs to be
-converted over.
-
-v2:
-- Add some hw state readout debug output.
-- Also cross check the enabled crtc counting.
-
-Note that I've botched up the patch ordering, and before this patch
-we've read out the pll selection correctly, but did not reconstruct
-the refcounts properly. See the bug link.
-
-Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=65673
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 5358901f99153085db59c3644db00b8753b50ac1)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h      |  7 ++++
- drivers/gpu/drm/i915/intel_display.c | 77 +++++++++++++++++++++++++++++++++---
- 2 files changed, 79 insertions(+), 5 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 24b5e25412be..41ec967a97bb 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -142,6 +142,9 @@ enum intel_dpll_id {
- };
- #define I915_NUM_PLLS 2
- 
-+struct intel_dpll_hw_state {
-+};
-+
- struct intel_shared_dpll {
- 	int refcount; /* count of number of CRTCs sharing this PLL */
- 	int active; /* count of number of active CRTCs (i.e. DPMS on) */
-@@ -149,10 +152,14 @@ struct intel_shared_dpll {
- 	const char *name;
- 	/* should match the index in the dev_priv->shared_dplls array */
- 	enum intel_dpll_id id;
-+	struct intel_dpll_hw_state hw_state;
- 	void (*enable)(struct drm_i915_private *dev_priv,
- 		       struct intel_shared_dpll *pll);
- 	void (*disable)(struct drm_i915_private *dev_priv,
- 			struct intel_shared_dpll *pll);
-+	bool (*get_hw_state)(struct drm_i915_private *dev_priv,
-+			     struct intel_shared_dpll *pll,
-+			     struct intel_dpll_hw_state *hw_state);
- };
- 
- /* Used by dp and fdi links */
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index e21c1466a97d..aba95868a7cb 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -925,8 +925,8 @@ static void assert_shared_dpll(struct drm_i915_private *dev_priv,
- 			       struct intel_shared_dpll *pll,
- 			       bool state)
- {
--	u32 val;
- 	bool cur_state;
-+	struct intel_dpll_hw_state hw_state;
- 
- 	if (HAS_PCH_LPT(dev_priv->dev)) {
- 		DRM_DEBUG_DRIVER("LPT detected: skipping PCH PLL test\n");
-@@ -937,11 +937,10 @@ static void assert_shared_dpll(struct drm_i915_private *dev_priv,
- 		  "asserting DPLL %s with no DPLL\n", state_string(state)))
- 		return;
- 
--	val = I915_READ(PCH_DPLL(pll->id));
--	cur_state = !!(val & DPLL_VCO_ENABLE);
-+	cur_state = pll->get_hw_state(dev_priv, pll, &hw_state);
- 	WARN(cur_state != state,
--	     "%s assertion failure (expected %s, current %s), val=%08x\n",
--	     pll->name, state_string(state), state_string(cur_state), val);
-+	     "%s assertion failure (expected %s, current %s)\n",
-+	     pll->name, state_string(state), state_string(cur_state));
- }
- #define assert_shared_dpll_enabled(d, p) assert_shared_dpll(d, p, true)
- #define assert_shared_dpll_disabled(d, p) assert_shared_dpll(d, p, false)
-@@ -8151,6 +8150,8 @@ intel_modeset_check_state(struct drm_device *dev)
- 	struct intel_encoder *encoder;
- 	struct intel_connector *connector;
- 	struct intel_crtc_config pipe_config;
-+	struct intel_dpll_hw_state dpll_hw_state;
-+	int i;
- 
- 	list_for_each_entry(connector, &dev->mode_config.connector_list,
- 			    base.head) {
-@@ -8270,6 +8271,41 @@ intel_modeset_check_state(struct drm_device *dev)
- 					       "[sw state]");
- 		}
- 	}
-+
-+	for (i = 0; i < dev_priv->num_shared_dpll; i++) {
-+		struct intel_shared_dpll *pll = &dev_priv->shared_dplls[i];
-+		int enabled_crtcs = 0, active_crtcs = 0;
-+		bool active;
-+
-+		memset(&dpll_hw_state, 0, sizeof(dpll_hw_state));
-+
-+		DRM_DEBUG_KMS("%s\n", pll->name);
-+
-+		active = pll->get_hw_state(dev_priv, pll, &dpll_hw_state);
-+
-+		WARN(pll->active > pll->refcount,
-+		     "more active pll users than references: %i vs %i\n",
-+		     pll->active, pll->refcount);
-+		WARN(pll->active && !pll->on,
-+		     "pll in active use but not on in sw tracking\n");
-+		WARN(pll->on != active,
-+		     "pll on state mismatch (expected %i, found %i)\n",
-+		     pll->on, active);
-+
-+		list_for_each_entry(crtc, &dev->mode_config.crtc_list,
-+				    base.head) {
-+			if (crtc->base.enabled && intel_crtc_to_shared_dpll(crtc) == pll)
-+				enabled_crtcs++;
-+			if (crtc->active && intel_crtc_to_shared_dpll(crtc) == pll)
-+				active_crtcs++;
-+		}
-+		WARN(pll->active != active_crtcs,
-+		     "pll active crtcs mismatch (expected %i, found %i)\n",
-+		     pll->active, active_crtcs);
-+		WARN(pll->refcount != enabled_crtcs,
-+		     "pll enabled crtcs mismatch (expected %i, found %i)\n",
-+		     pll->refcount, enabled_crtcs);
-+	}
- }
- 
- static int __intel_set_mode(struct drm_crtc *crtc,
-@@ -8711,6 +8747,17 @@ static void intel_cpu_pll_init(struct drm_device *dev)
- 		intel_ddi_pll_init(dev);
- }
- 
-+static bool ibx_pch_dpll_get_hw_state(struct drm_i915_private *dev_priv,
-+				      struct intel_shared_dpll *pll,
-+				      struct intel_dpll_hw_state *hw_state)
-+{
-+	uint32_t val;
-+
-+	val = I915_READ(PCH_DPLL(pll->id));
-+
-+	return val & DPLL_VCO_ENABLE;
-+}
-+
- static void ibx_pch_dpll_enable(struct drm_i915_private *dev_priv,
- 				struct intel_shared_dpll *pll)
- {
-@@ -8765,6 +8812,8 @@ static void ibx_pch_dpll_init(struct drm_device *dev)
- 		dev_priv->shared_dplls[i].name = ibx_pch_dpll_names[i];
- 		dev_priv->shared_dplls[i].enable = ibx_pch_dpll_enable;
- 		dev_priv->shared_dplls[i].disable = ibx_pch_dpll_disable;
-+		dev_priv->shared_dplls[i].get_hw_state =
-+			ibx_pch_dpll_get_hw_state;
- 	}
- }
- 
-@@ -9702,6 +9751,7 @@ void intel_modeset_setup_hw_state(struct drm_device *dev,
- 	struct intel_crtc *crtc;
- 	struct intel_encoder *encoder;
- 	struct intel_connector *connector;
-+	int i;
- 
- 	list_for_each_entry(crtc, &dev->mode_config.crtc_list,
- 			    base.head) {
-@@ -9717,9 +9767,26 @@ void intel_modeset_setup_hw_state(struct drm_device *dev,
- 			      crtc->active ? "enabled" : "disabled");
- 	}
- 
-+	/* FIXME: Smash this into the new shared dpll infrastructure. */
- 	if (HAS_DDI(dev))
- 		intel_ddi_setup_hw_pll_state(dev);
- 
-+	for (i = 0; i < dev_priv->num_shared_dpll; i++) {
-+		struct intel_shared_dpll *pll = &dev_priv->shared_dplls[i];
-+
-+		pll->on = pll->get_hw_state(dev_priv, pll, &pll->hw_state);
-+		pll->active = 0;
-+		list_for_each_entry(crtc, &dev->mode_config.crtc_list,
-+				    base.head) {
-+			if (crtc->active && intel_crtc_to_shared_dpll(crtc) == pll)
-+				pll->active++;
-+		}
-+		pll->refcount = pll->active;
-+
-+		DRM_DEBUG_KMS("%s hw state readout: refcount %i\n",
-+			      pll->name, pll->refcount);
-+	}
-+
- 	list_for_each_entry(encoder, &dev->mode_config.encoder_list,
- 			    base.head) {
- 		pipe = 0;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0313-drm-i915-extract-readout_hw_state-from-setup_hw_stat.patch b/patches.baytrail/0313-drm-i915-extract-readout_hw_state-from-setup_hw_stat.patch
deleted file mode 100644
index 0e21f90fa801e..0000000000000
--- a/patches.baytrail/0313-drm-i915-extract-readout_hw_state-from-setup_hw_stat.patch
+++ /dev/null
@@ -1,60 +0,0 @@
-From b940485e1839d152aebff85c6db21ea4f36e26dc Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Wed, 5 Jun 2013 13:34:17 +0200
-Subject: drm/i915: extract readout_hw_state from setup_hw_state
-
-Simply grew too big. This also makes the fixup and restore logic in
-setup_hw_state stand out a bit more clearly.
-
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 30e984df4c5633363b45108473b0561e7d89476d)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 20 +++++++++++++++-----
- 1 file changed, 15 insertions(+), 5 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index aba95868a7cb..aeff32e5c547 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -9740,14 +9740,10 @@ void i915_redisable_vga(struct drm_device *dev)
- 	}
- }
- 
--/* Scan out the current hw modeset state, sanitizes it and maps it into the drm
-- * and i915 state tracking structures. */
--void intel_modeset_setup_hw_state(struct drm_device *dev,
--				  bool force_restore)
-+static void intel_modeset_readout_hw_state(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	enum pipe pipe;
--	struct drm_plane *plane;
- 	struct intel_crtc *crtc;
- 	struct intel_encoder *encoder;
- 	struct intel_connector *connector;
-@@ -9823,6 +9819,20 @@ void intel_modeset_setup_hw_state(struct drm_device *dev,
- 			      drm_get_connector_name(&connector->base),
- 			      connector->base.encoder ? "enabled" : "disabled");
- 	}
-+}
-+
-+/* Scan out the current hw modeset state, sanitizes it and maps it into the drm
-+ * and i915 state tracking structures. */
-+void intel_modeset_setup_hw_state(struct drm_device *dev,
-+				  bool force_restore)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	enum pipe pipe;
-+	struct drm_plane *plane;
-+	struct intel_crtc *crtc;
-+	struct intel_encoder *encoder;
-+
-+	intel_modeset_readout_hw_state(dev);
- 
- 	/* HW state is read out, now we need to sanitize this mess. */
- 	list_for_each_entry(encoder, &dev->mode_config.encoder_list,
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0314-drm-i915-split-up-intel_modeset_check_state.patch b/patches.baytrail/0314-drm-i915-split-up-intel_modeset_check_state.patch
deleted file mode 100644
index 35675a409c85c..0000000000000
--- a/patches.baytrail/0314-drm-i915-split-up-intel_modeset_check_state.patch
+++ /dev/null
@@ -1,103 +0,0 @@
-From 2ad3b115a44c7c774fc9dc9a00ee17ddb440de0f Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Wed, 5 Jun 2013 13:34:18 +0200
-Subject: drm/i915: split up intel_modeset_check_state
-
-Simply grew too large and needed to be split up into parts.
-
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 91d1b4bd14fd0bfe87e91a0fd115fcc15c9c9cc5)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 44 +++++++++++++++++++++++++++++-------
- 1 file changed, 36 insertions(+), 8 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index aeff32e5c547..eecfcea4bfc5 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -8142,16 +8142,10 @@ intel_pipe_config_compare(struct drm_device *dev,
- 	return true;
- }
- 
--void
--intel_modeset_check_state(struct drm_device *dev)
-+static void
-+check_connector_state(struct drm_device *dev)
- {
--	drm_i915_private_t *dev_priv = dev->dev_private;
--	struct intel_crtc *crtc;
--	struct intel_encoder *encoder;
- 	struct intel_connector *connector;
--	struct intel_crtc_config pipe_config;
--	struct intel_dpll_hw_state dpll_hw_state;
--	int i;
- 
- 	list_for_each_entry(connector, &dev->mode_config.connector_list,
- 			    base.head) {
-@@ -8162,6 +8156,13 @@ intel_modeset_check_state(struct drm_device *dev)
- 		WARN(&connector->new_encoder->base != connector->base.encoder,
- 		     "connector's staged encoder doesn't match current encoder\n");
- 	}
-+}
-+
-+static void
-+check_encoder_state(struct drm_device *dev)
-+{
-+	struct intel_encoder *encoder;
-+	struct intel_connector *connector;
- 
- 	list_for_each_entry(encoder, &dev->mode_config.encoder_list,
- 			    base.head) {
-@@ -8213,6 +8214,15 @@ intel_modeset_check_state(struct drm_device *dev)
- 		     tracked_pipe, pipe);
- 
- 	}
-+}
-+
-+static void
-+check_crtc_state(struct drm_device *dev)
-+{
-+	drm_i915_private_t *dev_priv = dev->dev_private;
-+	struct intel_crtc *crtc;
-+	struct intel_encoder *encoder;
-+	struct intel_crtc_config pipe_config;
- 
- 	list_for_each_entry(crtc, &dev->mode_config.crtc_list,
- 			    base.head) {
-@@ -8271,6 +8281,15 @@ intel_modeset_check_state(struct drm_device *dev)
- 					       "[sw state]");
- 		}
- 	}
-+}
-+
-+static void
-+check_shared_dpll_state(struct drm_device *dev)
-+{
-+	drm_i915_private_t *dev_priv = dev->dev_private;
-+	struct intel_crtc *crtc;
-+	struct intel_dpll_hw_state dpll_hw_state;
-+	int i;
- 
- 	for (i = 0; i < dev_priv->num_shared_dpll; i++) {
- 		struct intel_shared_dpll *pll = &dev_priv->shared_dplls[i];
-@@ -8308,6 +8327,15 @@ intel_modeset_check_state(struct drm_device *dev)
- 	}
- }
- 
-+void
-+intel_modeset_check_state(struct drm_device *dev)
-+{
-+	check_connector_state(dev);
-+	check_encoder_state(dev);
-+	check_crtc_state(dev);
-+	check_shared_dpll_state(dev);
-+}
-+
- static int __intel_set_mode(struct drm_crtc *crtc,
- 			    struct drm_display_mode *mode,
- 			    int x, int y, struct drm_framebuffer *fb)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0315-drm-i915-WARN-on-lack-of-shared-dpll.patch b/patches.baytrail/0315-drm-i915-WARN-on-lack-of-shared-dpll.patch
deleted file mode 100644
index 096fea8af4338..0000000000000
--- a/patches.baytrail/0315-drm-i915-WARN-on-lack-of-shared-dpll.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From 0a5bb54b923146f69b6acfadfaab483f217d4506 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Wed, 5 Jun 2013 13:34:19 +0200
-Subject: drm/i915: WARN on lack of shared dpll
-
-Now that we have proper hw state reconstruction we should never have a
-case where we don't have the software dpll state properly set up. So
-add WARNs to the respective !pll cases in enable/disabel_shared_dpll.
-
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 87a875bbffcfac7cb7c9a106fda40f04de1f60a2)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index eecfcea4bfc5..9ed5e6ccdb43 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -1401,7 +1401,7 @@ static void ironlake_enable_shared_dpll(struct intel_crtc *crtc)
- 
- 	/* PCH PLLs only available on ILK, SNB and IVB */
- 	BUG_ON(dev_priv->info->gen < 5);
--	if (pll == NULL)
-+	if (WARN_ON(pll == NULL))
- 		return;
- 
- 	if (WARN_ON(pll->refcount == 0))
-@@ -1430,7 +1430,7 @@ static void intel_disable_shared_dpll(struct intel_crtc *crtc)
- 
- 	/* PCH only available on ILK+ */
- 	BUG_ON(dev_priv->info->gen < 5);
--	if (pll == NULL)
-+	if (WARN_ON(pll == NULL))
- 	       return;
- 
- 	if (WARN_ON(pll->refcount == 0))
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0316-drm-i915-hw-state-readout-and-cross-checking-for-sha.patch b/patches.baytrail/0316-drm-i915-hw-state-readout-and-cross-checking-for-sha.patch
deleted file mode 100644
index b242f59f6abeb..0000000000000
--- a/patches.baytrail/0316-drm-i915-hw-state-readout-and-cross-checking-for-sha.patch
+++ /dev/null
@@ -1,164 +0,0 @@
-From 97ca43ab87f5b74e806ca1fd49c2c2e230928b95 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Wed, 5 Jun 2013 13:34:20 +0200
-Subject: drm/i915: hw state readout and cross-checking for shared dplls
-
-Just the plumbing, all the modeset and enable code has not yet been
-switched over to use the new state. It seems to be decently broken
-anyway, at least wrt to handling of the special pixel mutliplier
-enabling sequence. Follow-up patches will clean up that mess.
-
-Another missing piece is more careful handling (and fixup) of the fp1
-alternate divisor state. The BIOS most likely doesn't bother to
-program that one to what we expect. So we need to be more careful with
-comparing that state, both for cross checking but also when checking
-for dpll sharing when acquiring shared dpll. Otherwise fastboot will
-deny a few shared dpll configurations which would otherwise work.
-
-v2: We need to memcpy the pipe config dpll hw state into the pll, for
-otherwise the cross-check code will get angry.
-
-v3: Don't forget to read the pch pll state in the crtc get_pipe_config
-function for ibx/ilk platforms.
-
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 66e985c035f4554939b8b63a8e21418271160ab0)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h      |  3 +++
- drivers/gpu/drm/i915/intel_display.c | 38 ++++++++++++++++++++++++++++++++++++
- drivers/gpu/drm/i915/intel_drv.h     |  3 +++
- 3 files changed, 44 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 41ec967a97bb..0b7d8fd1685b 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -143,6 +143,9 @@ enum intel_dpll_id {
- #define I915_NUM_PLLS 2
- 
- struct intel_dpll_hw_state {
-+	uint32_t dpll;
-+	uint32_t fp0;
-+	uint32_t fp1;
- };
- 
- struct intel_shared_dpll {
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 9ed5e6ccdb43..e29ce6b31f67 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -3087,7 +3087,11 @@ found:
- 	crtc->config.shared_dpll = i;
- 	DRM_DEBUG_DRIVER("using %s for pipe %c\n", pll->name,
- 			 pipe_name(crtc->pipe));
-+
- 	if (pll->active == 0) {
-+		memcpy(&pll->hw_state, &crtc->config.dpll_hw_state,
-+		       sizeof(pll->hw_state));
-+
- 		DRM_DEBUG_DRIVER("setting up %s\n", pll->name);
- 		WARN_ON(pll->on);
- 		assert_shared_dpll_disabled(dev_priv, pll);
-@@ -5718,6 +5722,13 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
- 					     &fp, &reduced_clock,
- 					     has_reduced_clock ? &fp2 : NULL);
- 
-+		intel_crtc->config.dpll_hw_state.dpll = dpll | DPLL_VCO_ENABLE;
-+		intel_crtc->config.dpll_hw_state.fp0 = fp;
-+		if (has_reduced_clock)
-+			intel_crtc->config.dpll_hw_state.fp1 = fp2;
-+		else
-+			intel_crtc->config.dpll_hw_state.fp1 = fp;
-+
- 		pll = intel_get_shared_dpll(intel_crtc, dpll, fp);
- 		if (pll == NULL) {
- 			DRM_DEBUG_DRIVER("failed to find PLL for pipe %c\n",
-@@ -5837,6 +5848,8 @@ static bool ironlake_get_pipe_config(struct intel_crtc *crtc,
- 		return false;
- 
- 	if (I915_READ(PCH_TRANSCONF(crtc->pipe)) & TRANS_ENABLE) {
-+		struct intel_shared_dpll *pll;
-+
- 		pipe_config->has_pch_encoder = true;
- 
- 		tmp = I915_READ(FDI_RX_CTL(crtc->pipe));
-@@ -5858,6 +5871,11 @@ static bool ironlake_get_pipe_config(struct intel_crtc *crtc,
- 			else
- 				pipe_config->shared_dpll = DPLL_ID_PCH_PLL_A;
- 		}
-+
-+		pll = &dev_priv->shared_dplls[pipe_config->shared_dpll];
-+
-+		WARN_ON(!pll->get_hw_state(dev_priv, pll,
-+					   &pipe_config->dpll_hw_state));
- 	} else {
- 		pipe_config->pixel_multiplier = 1;
- 	}
-@@ -8058,6 +8076,15 @@ intel_pipe_config_compare(struct drm_device *dev,
- 			  struct intel_crtc_config *current_config,
- 			  struct intel_crtc_config *pipe_config)
- {
-+#define PIPE_CONF_CHECK_X(name)	\
-+	if (current_config->name != pipe_config->name) { \
-+		DRM_ERROR("mismatch in " #name " " \
-+			  "(expected 0x%08x, found 0x%08x)\n", \
-+			  current_config->name, \
-+			  pipe_config->name); \
-+		return false; \
-+	}
-+
- #define PIPE_CONF_CHECK_I(name)	\
- 	if (current_config->name != pipe_config->name) { \
- 		DRM_ERROR("mismatch in " #name " " \
-@@ -8134,7 +8161,11 @@ intel_pipe_config_compare(struct drm_device *dev,
- 	PIPE_CONF_CHECK_I(ips_enabled);
- 
- 	PIPE_CONF_CHECK_I(shared_dpll);
-+	PIPE_CONF_CHECK_X(dpll_hw_state.dpll);
-+	PIPE_CONF_CHECK_X(dpll_hw_state.fp0);
-+	PIPE_CONF_CHECK_X(dpll_hw_state.fp1);
- 
-+#undef PIPE_CONF_CHECK_X
- #undef PIPE_CONF_CHECK_I
- #undef PIPE_CONF_CHECK_FLAGS
- #undef PIPE_CONF_QUIRK
-@@ -8324,6 +8355,10 @@ check_shared_dpll_state(struct drm_device *dev)
- 		WARN(pll->refcount != enabled_crtcs,
- 		     "pll enabled crtcs mismatch (expected %i, found %i)\n",
- 		     pll->refcount, enabled_crtcs);
-+
-+		WARN(pll->on && memcmp(&pll->hw_state, &dpll_hw_state,
-+				       sizeof(dpll_hw_state)),
-+		     "pll hw state mismatch\n");
- 	}
- }
- 
-@@ -8782,6 +8817,9 @@ static bool ibx_pch_dpll_get_hw_state(struct drm_i915_private *dev_priv,
- 	uint32_t val;
- 
- 	val = I915_READ(PCH_DPLL(pll->id));
-+	hw_state->dpll = val;
-+	hw_state->fp0 = I915_READ(PCH_FP0(pll->id));
-+	hw_state->fp1 = I915_READ(PCH_FP1(pll->id));
- 
- 	return val & DPLL_VCO_ENABLE;
- }
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index 5817a1643dea..abe9c9e9d8a3 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -256,6 +256,9 @@ struct intel_crtc_config {
- 	/* Selected dpll when shared or DPLL_ID_PRIVATE. */
- 	enum intel_dpll_id shared_dpll;
- 
-+	/* Actual register state of the dpll, for shared dpll cross-checking. */
-+	struct intel_dpll_hw_state dpll_hw_state;
-+
- 	int pipe_bpp;
- 	struct intel_link_m_n dp_m_n;
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0317-drm-i915-fix-up-pch-pll-enabling-for-pixel-multiplie.patch b/patches.baytrail/0317-drm-i915-fix-up-pch-pll-enabling-for-pixel-multiplie.patch
deleted file mode 100644
index be4a32bb48f1a..0000000000000
--- a/patches.baytrail/0317-drm-i915-fix-up-pch-pll-enabling-for-pixel-multiplie.patch
+++ /dev/null
@@ -1,46 +0,0 @@
-From 108b434e1db643a84d439f8820afb95ab8bcb83c Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Wed, 5 Jun 2013 13:34:21 +0200
-Subject: drm/i915: fix up pch pll enabling for pixel multipliers
-
-We have a nice comment saying that the pixel multiplier only sticks
-once the vco is on and stable. The only problem is that the enable bit
-wasn't set at all. This patch fixes this and so brings the ilk+ pch
-pll code in line with the i8xx/i9xx pll code. Or at least improves
-matters a lot.
-
-This should fix sdvo on ilk-ivb for low-res modes.
-
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 959e16d65d808602cd88b82530626f964f684c05)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index e29ce6b31f67..6b475793cb66 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -5660,7 +5660,7 @@ static uint32_t ironlake_compute_dpll(struct intel_crtc *intel_crtc,
- 	else
- 		dpll |= PLL_REF_INPUT_DREFCLK;
- 
--	return dpll;
-+	return dpll | DPLL_VCO_ENABLE;
- }
- 
- static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
-@@ -5722,7 +5722,7 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
- 					     &fp, &reduced_clock,
- 					     has_reduced_clock ? &fp2 : NULL);
- 
--		intel_crtc->config.dpll_hw_state.dpll = dpll | DPLL_VCO_ENABLE;
-+		intel_crtc->config.dpll_hw_state.dpll = dpll;
- 		intel_crtc->config.dpll_hw_state.fp0 = fp;
- 		if (has_reduced_clock)
- 			intel_crtc->config.dpll_hw_state.fp1 = fp2;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0318-drm-i915-Try-harder-to-disable-trickle-feed-on-VLV.patch b/patches.baytrail/0318-drm-i915-Try-harder-to-disable-trickle-feed-on-VLV.patch
deleted file mode 100644
index 5f850cfaf2170..0000000000000
--- a/patches.baytrail/0318-drm-i915-Try-harder-to-disable-trickle-feed-on-VLV.patch
+++ /dev/null
@@ -1,69 +0,0 @@
-From eedf76facbe0527aa8201e52d661005bbc36b3bd Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Wed, 12 Jun 2013 22:11:18 +0300
-Subject: drm/i915: Try harder to disable trickle feed on VLV
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The specs are a bit unclear whether the per-plane trickle feed disable
-control exists on VLV. There is another trickle feed disable control
-in the MI_ARB register.
-
-After some experimentation it turns out both the DSPCNTR trickle feed
-bits and the MI_ARB bit can be toggled. However the DSPCNTR bits don't
-seem to have any effect.
-
-The MI_ARB bit, on the other hand, has a noticable effect. I performed
-an experiment where I reduced the FIFO size via DSPARB and observed the
-effect of the MI_ARB trickle feed bit on the display.
-
-Using a 1920x1080-60 mode, with MI_ARB=0x4 the display started to have
-problems with DSPARB=0x42424242, whereas with MI_ARB=0x0 the problems
-didn't start until DSPARB=0x09090909. This seems to confirm that the
-MI_ARB trickle feed bit actually does work.
-
-So replace the use of the DSPCNTR trickle feed bits with MI_ARB
-on VLV.
-
-v2: Amend commit message with results from experimentation
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit e0d8d59b0831523da61739c9d5e3bc3c77d7b5db)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_reg.h | 2 ++
- drivers/gpu/drm/i915/intel_pm.c | 2 +-
- 2 files changed, 3 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
-index f21d0f5dc9f2..da456bc4c35a 100644
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -1369,6 +1369,8 @@
- #define FW_BLC_SELF_VLV		(VLV_DISPLAY_BASE + 0x6500)
- #define  FW_CSPWRDWNEN		(1<<15)
- 
-+#define MI_ARB_VLV		(VLV_DISPLAY_BASE + 0x6504)
-+
- /*
-  * Palette regs
-  */
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 681699671893..6ff11802e49a 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -4873,7 +4873,7 @@ static void valleyview_init_clock_gating(struct drm_device *dev)
- 
- 	I915_WRITE(GEN7_UCGCTL4, GEN7_L3BANK2X_CLOCK_GATE_DISABLE);
- 
--	g4x_disable_trickle_feed(dev);
-+	I915_WRITE(MI_ARB_VLV, MI_ARB_DISPLAY_TRICKLE_FEED_DISABLE);
- 
- 	I915_WRITE(CACHE_MODE_1,
- 		   _MASKED_BIT_ENABLE(PIXEL_SUBSPAN_COLLECT_OPT_DISABLE));
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0319-drm-i915-add-struct-i915_ctx_hang_stats.patch b/patches.baytrail/0319-drm-i915-add-struct-i915_ctx_hang_stats.patch
deleted file mode 100644
index 469939d6dc936..0000000000000
--- a/patches.baytrail/0319-drm-i915-add-struct-i915_ctx_hang_stats.patch
+++ /dev/null
@@ -1,66 +0,0 @@
-From 0a73e165e739e38bd42b859834a62eacf28b15bf Mon Sep 17 00:00:00 2001
-From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
-Date: Wed, 12 Jun 2013 12:35:28 +0300
-Subject: drm/i915: add struct i915_ctx_hang_stats
-
-To count context losses, add struct i915_ctx_hang_stats for
-both i915_hw_context and drm_i915_file_private.
-drm_i915_file_private is used when there is no context.
-
-v2: renamed and cleaned up the struct (Chris Wilson, Ian Romanick)
-
-Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Acked-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit e59ec13de40ed1edd19940322ebd009423fd716d)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_dma.c |    2 +-
- drivers/gpu/drm/i915/i915_drv.h |   10 ++++++++++
- 2 files changed, 11 insertions(+), 1 deletion(-)
-
---- a/drivers/gpu/drm/i915/i915_dma.c
-+++ b/drivers/gpu/drm/i915/i915_dma.c
-@@ -1791,7 +1791,7 @@ int i915_driver_open(struct drm_device *
- 	struct drm_i915_file_private *file_priv;
- 
- 	DRM_DEBUG_DRIVER("\n");
--	file_priv = kmalloc(sizeof(*file_priv), GFP_KERNEL);
-+	file_priv = kzalloc(sizeof(*file_priv), GFP_KERNEL);
- 	if (!file_priv)
- 		return -ENOMEM;
- 
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -508,6 +508,13 @@ struct i915_hw_ppgtt {
- 	void (*cleanup)(struct i915_hw_ppgtt *ppgtt);
- };
- 
-+struct i915_ctx_hang_stats {
-+	/* This context had batch pending when hang was declared */
-+	unsigned batch_pending;
-+
-+	/* This context had batch active when hang was declared */
-+	unsigned batch_active;
-+};
- 
- /* This must match up with the value previously used for execbuf2.rsvd1. */
- #define DEFAULT_CONTEXT_ID 0
-@@ -518,6 +525,7 @@ struct i915_hw_context {
- 	struct drm_i915_file_private *file_priv;
- 	struct intel_ring_buffer *ring;
- 	struct drm_i915_gem_object *obj;
-+	struct i915_ctx_hang_stats hang_stats;
- };
- 
- enum no_fbc_reason {
-@@ -1378,6 +1386,8 @@ struct drm_i915_file_private {
- 		struct list_head request_list;
- 	} mm;
- 	struct idr context_idr;
-+
-+	struct i915_ctx_hang_stats hang_stats;
- };
- 
- #define INTEL_INFO(dev)	(((struct drm_i915_private *) (dev)->dev_private)->info)
diff --git a/patches.baytrail/0320-drm-i915-add-i915_gem_context_get_hang_stats.patch b/patches.baytrail/0320-drm-i915-add-i915_gem_context_get_hang_stats.patch
deleted file mode 100644
index 5da4ce34dc98a..0000000000000
--- a/patches.baytrail/0320-drm-i915-add-i915_gem_context_get_hang_stats.patch
+++ /dev/null
@@ -1,86 +0,0 @@
-From e1c68a84e86ee299c1fd39fe8efb738a57efb3b7 Mon Sep 17 00:00:00 2001
-From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
-Date: Wed, 12 Jun 2013 12:35:29 +0300
-Subject: drm/i915: add i915_gem_context_get_hang_stats()
-
-To get context hang statistics for specified context,
-add i915_gem_context_get_hang_stats().
-
-For arb-robustness, every context needs to have its own
-hang statistics tracking. Added function will return
-the user specified context statistics or in case of
-default context, statistics from drm_i915_file_private.
-
-v2: handle default context inside get_reset_state
-
-v3: return struct pointer instead of passing it in as param
-    (Chris Wilson)
-
-Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Acked-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit c0bb617a70c94d660001f06f9810d53085e2c88d)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h         |  4 ++++
- drivers/gpu/drm/i915/i915_gem_context.c | 28 ++++++++++++++++++++++++++++
- 2 files changed, 32 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 95b19a53aa26..dcf5db4c0d8f 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1816,6 +1816,10 @@ static inline void i915_gem_context_unreference(struct i915_hw_context *ctx)
- 	kref_put(&ctx->ref, i915_gem_context_free);
- }
- 
-+struct i915_ctx_hang_stats * __must_check
-+i915_gem_context_get_hang_stats(struct intel_ring_buffer *ring,
-+				struct drm_file *file,
-+				u32 id);
- int i915_gem_context_create_ioctl(struct drm_device *dev, void *data,
- 				  struct drm_file *file);
- int i915_gem_context_destroy_ioctl(struct drm_device *dev, void *data,
-diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
-index b3be2946e6db..e3e62aac413c 100644
---- a/drivers/gpu/drm/i915/i915_gem_context.c
-+++ b/drivers/gpu/drm/i915/i915_gem_context.c
-@@ -303,6 +303,34 @@ static int context_idr_cleanup(int id, void *p, void *data)
- 	return 0;
- }
- 
-+struct i915_ctx_hang_stats *
-+i915_gem_context_get_hang_stats(struct intel_ring_buffer *ring,
-+				struct drm_file *file,
-+				u32 id)
-+{
-+	struct drm_i915_private *dev_priv = ring->dev->dev_private;
-+	struct drm_i915_file_private *file_priv = file->driver_priv;
-+	struct i915_hw_context *to;
-+
-+	if (dev_priv->hw_contexts_disabled)
-+		return ERR_PTR(-ENOENT);
-+
-+	if (ring->id != RCS)
-+		return ERR_PTR(-EINVAL);
-+
-+	if (file == NULL)
-+		return ERR_PTR(-EINVAL);
-+
-+	if (id == DEFAULT_CONTEXT_ID)
-+		return &file_priv->hang_stats;
-+
-+	to = i915_gem_context_get(file->driver_priv, id);
-+	if (to == NULL)
-+		return ERR_PTR(-ENOENT);
-+
-+	return &to->hang_stats;
-+}
-+
- void i915_gem_context_close(struct drm_device *dev, struct drm_file *file)
- {
- 	struct drm_i915_file_private *file_priv = file->driver_priv;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0321-drm-i915-change-i915_add_request-to-macro.patch b/patches.baytrail/0321-drm-i915-change-i915_add_request-to-macro.patch
deleted file mode 100644
index ec740edf51fb9..0000000000000
--- a/patches.baytrail/0321-drm-i915-change-i915_add_request-to-macro.patch
+++ /dev/null
@@ -1,134 +0,0 @@
-From 9b7a49fa7922a18508a0fee8953ccd8ac5af96ab Mon Sep 17 00:00:00 2001
-From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
-Date: Wed, 12 Jun 2013 12:35:30 +0300
-Subject: drm/i915: change i915_add_request to macro
-
-Only execbuffer needed all the parameters on i915_add_request().
-By putting __i915_add_request behind macro, all current callsites
-become cleaner. Following patch will introduce a new parameter
-for __i915_add_request. With this patch, only the relevant callsite
-will reflect the change making commit smaller and easier to understand.
-
-v2: _i915_add_request as function name (Chris Wilson)
-
-v3: change name __i915_add_request and fix ordering of params (Ben Widawsky)
-
-Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Acked-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 0025c0772de7451c2302fa628f038b213a0783bf)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h            |    8 +++++---
- drivers/gpu/drm/i915/i915_gem.c            |   11 +++++------
- drivers/gpu/drm/i915/i915_gem_context.c    |    2 +-
- drivers/gpu/drm/i915/i915_gem_execbuffer.c |    2 +-
- drivers/gpu/drm/i915/intel_overlay.c       |    4 ++--
- drivers/gpu/drm/i915/intel_ringbuffer.c    |    2 +-
- 6 files changed, 15 insertions(+), 14 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1758,9 +1758,11 @@ void i915_gem_init_swizzling(struct drm_
- void i915_gem_cleanup_ringbuffer(struct drm_device *dev);
- int __must_check i915_gpu_idle(struct drm_device *dev);
- int __must_check i915_gem_idle(struct drm_device *dev);
--int i915_add_request(struct intel_ring_buffer *ring,
--		     struct drm_file *file,
--		     u32 *seqno);
-+int __i915_add_request(struct intel_ring_buffer *ring,
-+		       struct drm_file *file,
-+		       u32 *seqno);
-+#define i915_add_request(ring, seqno) \
-+	__i915_add_request(ring, NULL, seqno);
- int __must_check i915_wait_seqno(struct intel_ring_buffer *ring,
- 				 uint32_t seqno);
- int i915_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf);
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -956,7 +956,7 @@ i915_gem_check_olr(struct intel_ring_buf
- 
- 	ret = 0;
- 	if (seqno == ring->outstanding_lazy_request)
--		ret = i915_add_request(ring, NULL, NULL);
-+		ret = i915_add_request(ring, NULL);
- 
- 	return ret;
- }
-@@ -2011,10 +2011,9 @@ i915_gem_get_seqno(struct drm_device *de
- 	return 0;
- }
- 
--int
--i915_add_request(struct intel_ring_buffer *ring,
--		 struct drm_file *file,
--		 u32 *out_seqno)
-+int __i915_add_request(struct intel_ring_buffer *ring,
-+		       struct drm_file *file,
-+		       u32 *out_seqno)
- {
- 	drm_i915_private_t *dev_priv = ring->dev->dev_private;
- 	struct drm_i915_gem_request *request;
-@@ -2290,7 +2289,7 @@ i915_gem_retire_work_handler(struct work
- 	idle = true;
- 	for_each_ring(ring, dev_priv, i) {
- 		if (ring->gpu_caches_dirty)
--			i915_add_request(ring, NULL, NULL);
-+			i915_add_request(ring, NULL);
- 
- 		idle &= list_empty(&ring->request_list);
- 	}
---- a/drivers/gpu/drm/i915/i915_gem_context.c
-+++ b/drivers/gpu/drm/i915/i915_gem_context.c
-@@ -453,7 +453,7 @@ static int do_switch(struct i915_hw_cont
- 		from->obj->dirty = 1;
- 		BUG_ON(from->obj->ring != ring);
- 
--		ret = i915_add_request(ring, NULL, NULL);
-+		ret = i915_add_request(ring, NULL);
- 		if (ret) {
- 			/* Too late, we've already scheduled a context switch.
- 			 * Try to undo the change so that the hw state is
---- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-@@ -802,7 +802,7 @@ i915_gem_execbuffer_retire_commands(stru
- 	ring->gpu_caches_dirty = true;
- 
- 	/* Add a breadcrumb for the completion of the batch buffer */
--	(void)i915_add_request(ring, file, NULL);
-+	(void)__i915_add_request(ring, file, NULL);
- }
- 
- static int
---- a/drivers/gpu/drm/i915/intel_overlay.c
-+++ b/drivers/gpu/drm/i915/intel_overlay.c
-@@ -217,7 +217,7 @@ static int intel_overlay_do_wait_request
- 	int ret;
- 
- 	BUG_ON(overlay->last_flip_req);
--	ret = i915_add_request(ring, NULL, &overlay->last_flip_req);
-+	ret = i915_add_request(ring, &overlay->last_flip_req);
- 	if (ret)
- 		return ret;
- 
-@@ -286,7 +286,7 @@ static int intel_overlay_continue(struct
- 	intel_ring_emit(ring, flip_addr);
- 	intel_ring_advance(ring);
- 
--	return i915_add_request(ring, NULL, &overlay->last_flip_req);
-+	return i915_add_request(ring, &overlay->last_flip_req);
- }
- 
- static void intel_overlay_release_old_vid_tail(struct intel_overlay *overlay)
---- a/drivers/gpu/drm/i915/intel_ringbuffer.c
-+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
-@@ -1523,7 +1523,7 @@ int intel_ring_idle(struct intel_ring_bu
- 
- 	/* We need to add any requests required to flush the objects and ring */
- 	if (ring->outstanding_lazy_request) {
--		ret = i915_add_request(ring, NULL, NULL);
-+		ret = i915_add_request(ring, NULL);
- 		if (ret)
- 			return ret;
- 	}
diff --git a/patches.baytrail/0322-drm-i915-add-batch-bo-to-i915_add_request.patch b/patches.baytrail/0322-drm-i915-add-batch-bo-to-i915_add_request.patch
deleted file mode 100644
index 356f6cf0493ad..0000000000000
--- a/patches.baytrail/0322-drm-i915-add-batch-bo-to-i915_add_request.patch
+++ /dev/null
@@ -1,134 +0,0 @@
-From 925be0fec93d527f53fdf0ced8f86a9b5f45002c Mon Sep 17 00:00:00 2001
-From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
-Date: Wed, 12 Jun 2013 15:01:39 +0300
-Subject: drm/i915: add batch bo to i915_add_request()
-
-In order to track down a batch buffer and context which
-caused the ring to hang, store reference to bo into the request struct.
-Request can also cause gpu to hang after the batch in the flush section
-in the ring. To detect this add start of the flush portion offset into the
-request.
-
-v2: Included comment about request vs batch_obj lifetimes (Chris Wilson)
-
-Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Acked-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 7d736f4f0b405b1421d280632ef077eb8135e5c6)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h            | 11 +++++++++--
- drivers/gpu/drm/i915/i915_gem.c            | 13 ++++++++++++-
- drivers/gpu/drm/i915/i915_gem_execbuffer.c |  7 ++++---
- 3 files changed, 25 insertions(+), 6 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 3d8ae61ffe3b..e73bc66ef1dc 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1363,12 +1363,18 @@ struct drm_i915_gem_request {
- 	/** GEM sequence number associated with this request. */
- 	uint32_t seqno;
- 
--	/** Postion in the ringbuffer of the end of the request */
-+	/** Position in the ringbuffer of the start of the request */
-+	u32 head;
-+
-+	/** Position in the ringbuffer of the end of the request */
- 	u32 tail;
- 
- 	/** Context related to this request */
- 	struct i915_hw_context *ctx;
- 
-+	/** Batch buffer related to this request if any */
-+	struct drm_i915_gem_object *batch_obj;
-+
- 	/** Time at which this request was emitted, in jiffies. */
- 	unsigned long emitted_jiffies;
- 
-@@ -1760,9 +1766,10 @@ int __must_check i915_gpu_idle(struct drm_device *dev);
- int __must_check i915_gem_idle(struct drm_device *dev);
- int __i915_add_request(struct intel_ring_buffer *ring,
- 		       struct drm_file *file,
-+		       struct drm_i915_gem_object *batch_obj,
- 		       u32 *seqno);
- #define i915_add_request(ring, seqno) \
--	__i915_add_request(ring, NULL, seqno);
-+	__i915_add_request(ring, NULL, NULL, seqno);
- int __must_check i915_wait_seqno(struct intel_ring_buffer *ring,
- 				 uint32_t seqno);
- int i915_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf);
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index 6671b8e11e55..855742a058b3 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -2013,14 +2013,16 @@ i915_gem_get_seqno(struct drm_device *dev, u32 *seqno)
- 
- int __i915_add_request(struct intel_ring_buffer *ring,
- 		       struct drm_file *file,
-+		       struct drm_i915_gem_object *obj,
- 		       u32 *out_seqno)
- {
- 	drm_i915_private_t *dev_priv = ring->dev->dev_private;
- 	struct drm_i915_gem_request *request;
--	u32 request_ring_position;
-+	u32 request_ring_position, request_start;
- 	int was_empty;
- 	int ret;
- 
-+	request_start = intel_ring_get_tail(ring);
- 	/*
- 	 * Emit any outstanding flushes - execbuf can fail to emit the flush
- 	 * after having emitted the batchbuffer command. Hence we need to fix
-@@ -2052,8 +2054,17 @@ int __i915_add_request(struct intel_ring_buffer *ring,
- 
- 	request->seqno = intel_ring_get_seqno(ring);
- 	request->ring = ring;
-+	request->head = request_start;
- 	request->tail = request_ring_position;
- 	request->ctx = ring->last_context;
-+	request->batch_obj = obj;
-+
-+	/* Whilst this request exists, batch_obj will be on the
-+	 * active_list, and so will hold the active reference. Only when this
-+	 * request is retired will the the batch_obj be moved onto the
-+	 * inactive_list and lose its active reference. Hence we do not need
-+	 * to explicitly hold another reference here.
-+	 */
- 
- 	if (request->ctx)
- 		i915_gem_context_reference(request->ctx);
-diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-index d79ac7aa55d4..87a3227e5179 100644
---- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-@@ -796,13 +796,14 @@ i915_gem_execbuffer_move_to_active(struct list_head *objects,
- static void
- i915_gem_execbuffer_retire_commands(struct drm_device *dev,
- 				    struct drm_file *file,
--				    struct intel_ring_buffer *ring)
-+				    struct intel_ring_buffer *ring,
-+				    struct drm_i915_gem_object *obj)
- {
- 	/* Unconditionally force add_request to emit a full flush. */
- 	ring->gpu_caches_dirty = true;
- 
- 	/* Add a breadcrumb for the completion of the batch buffer */
--	(void)__i915_add_request(ring, file, NULL);
-+	(void)__i915_add_request(ring, file, obj, NULL);
- }
- 
- static int
-@@ -1083,7 +1084,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
- 	trace_i915_gem_ring_dispatch(ring, intel_ring_get_seqno(ring), flags);
- 
- 	i915_gem_execbuffer_move_to_active(&eb->objects, ring);
--	i915_gem_execbuffer_retire_commands(dev, file, ring);
-+	i915_gem_execbuffer_retire_commands(dev, file, ring, batch_obj);
- 
- err:
- 	eb_destroy(eb);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0323-drm-i915-store-ring-hangcheck-action.patch b/patches.baytrail/0323-drm-i915-store-ring-hangcheck-action.patch
deleted file mode 100644
index f09077c3f7323..0000000000000
--- a/patches.baytrail/0323-drm-i915-store-ring-hangcheck-action.patch
+++ /dev/null
@@ -1,68 +0,0 @@
-From 2117021b2325d4a5169175390c4d8560080359c4 Mon Sep 17 00:00:00 2001
-From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
-Date: Wed, 12 Jun 2013 12:35:32 +0300
-Subject: drm/i915: store ring hangcheck action
-
-For guilty batchbuffer analysis later on when rings are reset,
-store what state the ring was on when hang was declared.
-This helps to weed out the waiting rings from the active ones.
-
-Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Acked-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit ad8beaeada276b4b2d31e1c3422346e8829a67d6)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c         | 8 ++++++--
- drivers/gpu/drm/i915/intel_ringbuffer.h | 3 +++
- 2 files changed, 9 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index b6e0b15552e9..5c344a5f307c 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -2417,7 +2417,8 @@ static void semaphore_clear_deadlocks(struct drm_i915_private *dev_priv)
- 		ring->hangcheck.deadlock = false;
- }
- 
--static enum { wait, active, kick, hung } ring_stuck(struct intel_ring_buffer *ring, u32 acthd)
-+static enum intel_ring_hangcheck_action
-+ring_stuck(struct intel_ring_buffer *ring, u32 acthd)
- {
- 	struct drm_device *dev = ring->dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
-@@ -2520,7 +2521,10 @@ void i915_hangcheck_elapsed(unsigned long data)
- 				 * being repeatedly kicked and so responsible
- 				 * for stalling the machine.
- 				 */
--				switch (ring_stuck(ring, acthd)) {
-+				ring->hangcheck.action = ring_stuck(ring,
-+								    acthd);
-+
-+				switch (ring->hangcheck.action) {
- 				case wait:
- 					score = 0;
- 					break;
-diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
-index a3e96103dbe5..799f04c9da45 100644
---- a/drivers/gpu/drm/i915/intel_ringbuffer.h
-+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
-@@ -37,11 +37,14 @@ struct  intel_hw_status_page {
- #define I915_READ_SYNC_0(ring) I915_READ(RING_SYNC_0((ring)->mmio_base))
- #define I915_READ_SYNC_1(ring) I915_READ(RING_SYNC_1((ring)->mmio_base))
- 
-+enum intel_ring_hangcheck_action { wait, active, kick, hung };
-+
- struct intel_ring_hangcheck {
- 	bool deadlock;
- 	u32 seqno;
- 	u32 acthd;
- 	int score;
-+	enum intel_ring_hangcheck_action action;
- };
- 
- struct  intel_ring_buffer {
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0324-drm-i915-find-guilty-batch-buffer-on-ring-resets.patch b/patches.baytrail/0324-drm-i915-find-guilty-batch-buffer-on-ring-resets.patch
deleted file mode 100644
index 5635aa0e3c876..0000000000000
--- a/patches.baytrail/0324-drm-i915-find-guilty-batch-buffer-on-ring-resets.patch
+++ /dev/null
@@ -1,166 +0,0 @@
-From 8f2a1df53dda1674ffed043a982e7b5514e7dc50 Mon Sep 17 00:00:00 2001
-From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
-Date: Wed, 12 Jun 2013 15:13:20 +0300
-Subject: drm/i915: find guilty batch buffer on ring resets
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-After hang check timer has declared gpu to be hung,
-rings are reset. In ring reset, when clearing
-request list, do post mortem analysis to find out
-the guilty batch buffer.
-
-Select requests for further analysis by inspecting
-the completed sequence number which has been updated
-into the HWS page. If request was completed, it can't
-be related to the hang.
-
-For noncompleted requests mark the batch as guilty
-if the ring was not waiting and the ring head was
-stuck inside the buffer object or in the flush region
-right after the batch. For everything else, mark
-them as innocents.
-
-v2: Fixed a typo in commit message (Ville Syrjälä)
-
-v3: - more descriptive function parameters (Chris Wilson)
-    - use masked head address when inspecting if request is in ring
-    - s/hangcheck.last_action/hangcheck.action
-    - added comment about unmasked head hitting batch_obj range
-
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Acked-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit aa60c664e6df502578454621c3a9b1f087ff8d25)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem.c | 97 +++++++++++++++++++++++++++++++++++++++++
- 1 file changed, 97 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index 855742a058b3..70af73dff001 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -2121,6 +2121,94 @@ i915_gem_request_remove_from_client(struct drm_i915_gem_request *request)
- 	spin_unlock(&file_priv->mm.lock);
- }
- 
-+static bool i915_head_inside_object(u32 acthd, struct drm_i915_gem_object *obj)
-+{
-+	if (acthd >= obj->gtt_offset &&
-+	    acthd < obj->gtt_offset + obj->base.size)
-+		return true;
-+
-+	return false;
-+}
-+
-+static bool i915_head_inside_request(const u32 acthd_unmasked,
-+				     const u32 request_start,
-+				     const u32 request_end)
-+{
-+	const u32 acthd = acthd_unmasked & HEAD_ADDR;
-+
-+	if (request_start < request_end) {
-+		if (acthd >= request_start && acthd < request_end)
-+			return true;
-+	} else if (request_start > request_end) {
-+		if (acthd >= request_start || acthd < request_end)
-+			return true;
-+	}
-+
-+	return false;
-+}
-+
-+static bool i915_request_guilty(struct drm_i915_gem_request *request,
-+				const u32 acthd, bool *inside)
-+{
-+	/* There is a possibility that unmasked head address
-+	 * pointing inside the ring, matches the batch_obj address range.
-+	 * However this is extremely unlikely.
-+	 */
-+
-+	if (request->batch_obj) {
-+		if (i915_head_inside_object(acthd, request->batch_obj)) {
-+			*inside = true;
-+			return true;
-+		}
-+	}
-+
-+	if (i915_head_inside_request(acthd, request->head, request->tail)) {
-+		*inside = false;
-+		return true;
-+	}
-+
-+	return false;
-+}
-+
-+static void i915_set_reset_status(struct intel_ring_buffer *ring,
-+				  struct drm_i915_gem_request *request,
-+				  u32 acthd)
-+{
-+	struct i915_ctx_hang_stats *hs = NULL;
-+	bool inside, guilty;
-+
-+	/* Innocent until proven guilty */
-+	guilty = false;
-+
-+	if (ring->hangcheck.action != wait &&
-+	    i915_request_guilty(request, acthd, &inside)) {
-+		DRM_ERROR("%s hung %s bo (0x%x ctx %d) at 0x%x\n",
-+			  ring->name,
-+			  inside ? "inside" : "flushing",
-+			  request->batch_obj ?
-+			  request->batch_obj->gtt_offset : 0,
-+			  request->ctx ? request->ctx->id : 0,
-+			  acthd);
-+
-+		guilty = true;
-+	}
-+
-+	/* If contexts are disabled or this is the default context, use
-+	 * file_priv->reset_state
-+	 */
-+	if (request->ctx && request->ctx->id != DEFAULT_CONTEXT_ID)
-+		hs = &request->ctx->hang_stats;
-+	else if (request->file_priv)
-+		hs = &request->file_priv->hang_stats;
-+
-+	if (hs) {
-+		if (guilty)
-+			hs->batch_active++;
-+		else
-+			hs->batch_pending++;
-+	}
-+}
-+
- static void i915_gem_free_request(struct drm_i915_gem_request *request)
- {
- 	list_del(&request->list);
-@@ -2135,6 +2223,12 @@ static void i915_gem_free_request(struct drm_i915_gem_request *request)
- static void i915_gem_reset_ring_lists(struct drm_i915_private *dev_priv,
- 				      struct intel_ring_buffer *ring)
- {
-+	u32 completed_seqno;
-+	u32 acthd;
-+
-+	acthd = intel_ring_get_active_head(ring);
-+	completed_seqno = ring->get_seqno(ring, false);
-+
- 	while (!list_empty(&ring->request_list)) {
- 		struct drm_i915_gem_request *request;
- 
-@@ -2142,6 +2236,9 @@ static void i915_gem_reset_ring_lists(struct drm_i915_private *dev_priv,
- 					   struct drm_i915_gem_request,
- 					   list);
- 
-+		if (request->seqno > completed_seqno)
-+			i915_set_reset_status(ring, request, acthd);
-+
- 		i915_gem_free_request(request);
- 	}
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0325-drm-i915-set-up-PIPECONF-explicitly-on-ilk-ivb.patch b/patches.baytrail/0325-drm-i915-set-up-PIPECONF-explicitly-on-ilk-ivb.patch
deleted file mode 100644
index 1464d8af2ed33..0000000000000
--- a/patches.baytrail/0325-drm-i915-set-up-PIPECONF-explicitly-on-ilk-ivb.patch
+++ /dev/null
@@ -1,70 +0,0 @@
-From 57d85c38b203da82dadf0a77e5087af2451adc4b Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 13 Jun 2013 00:54:57 +0200
-Subject: drm/i915: set up PIPECONF explicitly on ilk-ivb
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Dragging random garbage along from the BIOS isn't a good idea, since
-we really only support exactly what we've set up.
-
-In the specific case for the bug reporter the BIOS used the 10bit
-gamma table, but since we only support an 8bit table the dark colors
-ended up all wrong and the light ones all unadjusted.
-
-Note that this has a nice implication for fastboot, it essentially
-means that we have quite a bit more state to check and compare before
-we can decide whether fastboot is possible.
-
-Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=65593
-Reported-and-Tested-by: Thomas Hebb <tommyhebb@gmail.com>
-Cc: stable@vger.kernel.org
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 78114071ff9e3c2f6c1715bfb01ac8c0b3618e72)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 7 +------
- 1 file changed, 1 insertion(+), 6 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 6b475793cb66..1bbab24b3293 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -5342,9 +5342,8 @@ static void ironlake_set_pipeconf(struct drm_crtc *crtc)
- 	int pipe = intel_crtc->pipe;
- 	uint32_t val;
- 
--	val = I915_READ(PIPECONF(pipe));
-+	val = 0;
- 
--	val &= ~PIPECONF_BPC_MASK;
- 	switch (intel_crtc->config.pipe_bpp) {
- 	case 18:
- 		val |= PIPECONF_6BPC;
-@@ -5363,11 +5362,9 @@ static void ironlake_set_pipeconf(struct drm_crtc *crtc)
- 		BUG();
- 	}
- 
--	val &= ~(PIPECONF_DITHER_EN | PIPECONF_DITHER_TYPE_MASK);
- 	if (intel_crtc->config.dither)
- 		val |= (PIPECONF_DITHER_EN | PIPECONF_DITHER_TYPE_SP);
- 
--	val &= ~PIPECONF_INTERLACE_MASK;
- 	if (intel_crtc->config.adjusted_mode.flags & DRM_MODE_FLAG_INTERLACE)
- 		val |= PIPECONF_INTERLACED_ILK;
- 	else
-@@ -5375,8 +5372,6 @@ static void ironlake_set_pipeconf(struct drm_crtc *crtc)
- 
- 	if (intel_crtc->config.limited_color_range)
- 		val |= PIPECONF_COLOR_RANGE_SELECT;
--	else
--		val &= ~PIPECONF_COLOR_RANGE_SELECT;
- 
- 	I915_WRITE(PIPECONF(pipe), val);
- 	POSTING_READ(PIPECONF(pipe));
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0326-drm-i915-set-up-PIPECONF-explicitly-for-i9xx-vlv-pla.patch b/patches.baytrail/0326-drm-i915-set-up-PIPECONF-explicitly-for-i9xx-vlv-pla.patch
deleted file mode 100644
index f1d835fb315f2..0000000000000
--- a/patches.baytrail/0326-drm-i915-set-up-PIPECONF-explicitly-for-i9xx-vlv-pla.patch
+++ /dev/null
@@ -1,81 +0,0 @@
-From 17b72372335404ea3b033bd9391f32ab3d9f4dff Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 13 Jun 2013 00:54:58 +0200
-Subject: drm/i915: set up PIPECONF explicitly for i9xx/vlv platforms
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Same reasons as for the previous patch, just no bug report about
-anything going wrong yet: We only support exactly the mode we program,
-so don't leave any stale BIOS state behind.
-
-Again this will be fun to properly track for fastboot.
-
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 9f11a9e4e50006b615ba94722dfc33ced89664cf)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 17 +++--------------
- 1 file changed, 3 insertions(+), 14 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 1bbab24b3293..0d23d7bfc884 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -4732,7 +4732,7 @@ static void i9xx_set_pipeconf(struct intel_crtc *intel_crtc)
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	uint32_t pipeconf;
- 
--	pipeconf = I915_READ(PIPECONF(intel_crtc->pipe));
-+	pipeconf = 0;
- 
- 	if (dev_priv->quirks & QUIRK_PIPEA_FORCE &&
- 	    I915_READ(PIPECONF(intel_crtc->pipe)) & PIPECONF_ENABLE)
-@@ -4748,15 +4748,10 @@ static void i9xx_set_pipeconf(struct intel_crtc *intel_crtc)
- 		if (intel_crtc->config.requested_mode.clock >
- 		    dev_priv->display.get_display_clock_speed(dev) * 9 / 10)
- 			pipeconf |= PIPECONF_DOUBLE_WIDE;
--		else
--			pipeconf &= ~PIPECONF_DOUBLE_WIDE;
- 	}
- 
- 	/* only g4x and later have fancy bpc/dither controls */
- 	if (IS_G4X(dev) || IS_VALLEYVIEW(dev)) {
--		pipeconf &= ~(PIPECONF_BPC_MASK |
--			      PIPECONF_DITHER_EN | PIPECONF_DITHER_TYPE_MASK);
--
- 		/* Bspec claims that we can't use dithering for 30bpp pipes. */
- 		if (intel_crtc->config.dither && intel_crtc->config.pipe_bpp != 30)
- 			pipeconf |= PIPECONF_DITHER_EN |
-@@ -4784,23 +4779,17 @@ static void i9xx_set_pipeconf(struct intel_crtc *intel_crtc)
- 			pipeconf |= PIPECONF_CXSR_DOWNCLOCK;
- 		} else {
- 			DRM_DEBUG_KMS("disabling CxSR downclocking\n");
--			pipeconf &= ~PIPECONF_CXSR_DOWNCLOCK;
- 		}
- 	}
- 
--	pipeconf &= ~PIPECONF_INTERLACE_MASK;
- 	if (!IS_GEN2(dev) &&
- 	    intel_crtc->config.adjusted_mode.flags & DRM_MODE_FLAG_INTERLACE)
- 		pipeconf |= PIPECONF_INTERLACE_W_FIELD_INDICATION;
- 	else
- 		pipeconf |= PIPECONF_PROGRESSIVE;
- 
--	if (IS_VALLEYVIEW(dev)) {
--		if (intel_crtc->config.limited_color_range)
--			pipeconf |= PIPECONF_COLOR_RANGE_SELECT;
--		else
--			pipeconf &= ~PIPECONF_COLOR_RANGE_SELECT;
--	}
-+	if (IS_VALLEYVIEW(dev) && intel_crtc->config.limited_color_range)
-+		pipeconf |= PIPECONF_COLOR_RANGE_SELECT;
- 
- 	I915_WRITE(PIPECONF(intel_crtc->pipe), pipeconf);
- 	POSTING_READ(PIPECONF(intel_crtc->pipe));
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0327-drm-i915-explicitly-set-up-PIPECONF-and-gamma-table-.patch b/patches.baytrail/0327-drm-i915-explicitly-set-up-PIPECONF-and-gamma-table-.patch
deleted file mode 100644
index 0de913e4224e6..0000000000000
--- a/patches.baytrail/0327-drm-i915-explicitly-set-up-PIPECONF-and-gamma-table-.patch
+++ /dev/null
@@ -1,70 +0,0 @@
-From 1dc91cc92322c86a937405bc660332eb065d7d57 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 13 Jun 2013 00:54:59 +0200
-Subject: drm/i915: explicitly set up PIPECONF (and gamma table) on haswell
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Again we don't really support different settings, so don't let the
-BIOS sneak stuff through.
-
-Since the motivation for this patch series is to ensure we have the
-correct gamma table mode selected also add the required write to the
-GAMMA_MODE register to select the 8bit legacy table.
-
-And since I find lowercase letters in #defines offensive, also
-bikeshed those.
-
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 3eff4faa9f59c581538663e3f42b9e16210cafd0)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_reg.h      |    6 +++---
- drivers/gpu/drm/i915/intel_display.c |    7 ++++---
- 2 files changed, 7 insertions(+), 6 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -3682,9 +3682,9 @@
- #define _GAMMA_MODE_B		0x4ac80
- #define GAMMA_MODE(pipe) _PIPE(pipe, _GAMMA_MODE_A, _GAMMA_MODE_B)
- #define GAMMA_MODE_MODE_MASK	(3 << 0)
--#define GAMMA_MODE_MODE_8bit	(0 << 0)
--#define GAMMA_MODE_MODE_10bit	(1 << 0)
--#define GAMMA_MODE_MODE_12bit	(2 << 0)
-+#define GAMMA_MODE_MODE_8BIT	(0 << 0)
-+#define GAMMA_MODE_MODE_10BIT	(1 << 0)
-+#define GAMMA_MODE_MODE_12BIT	(2 << 0)
- #define GAMMA_MODE_MODE_SPLIT	(3 << 0)
- 
- /* interrupts */
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -5437,13 +5437,11 @@ static void haswell_set_pipeconf(struct
- 	enum transcoder cpu_transcoder = intel_crtc->config.cpu_transcoder;
- 	uint32_t val;
- 
--	val = I915_READ(PIPECONF(cpu_transcoder));
-+	val = 0;
- 
--	val &= ~(PIPECONF_DITHER_EN | PIPECONF_DITHER_TYPE_MASK);
- 	if (intel_crtc->config.dither)
- 		val |= (PIPECONF_DITHER_EN | PIPECONF_DITHER_TYPE_SP);
- 
--	val &= ~PIPECONF_INTERLACE_MASK_HSW;
- 	if (intel_crtc->config.adjusted_mode.flags & DRM_MODE_FLAG_INTERLACE)
- 		val |= PIPECONF_INTERLACED_ILK;
- 	else
-@@ -5451,6 +5449,9 @@ static void haswell_set_pipeconf(struct
- 
- 	I915_WRITE(PIPECONF(cpu_transcoder), val);
- 	POSTING_READ(PIPECONF(cpu_transcoder));
-+
-+	I915_WRITE(GAMMA_MODE(intel_crtc->pipe), GAMMA_MODE_MODE_8BIT);
-+	POSTING_READ(GAMMA_MODE(intel_crtc->pipe));
- }
- 
- static bool ironlake_compute_clocks(struct drm_crtc *crtc,
diff --git a/patches.baytrail/0328-drm-i915-stop-killing-pfit-on-i9xx.patch b/patches.baytrail/0328-drm-i915-stop-killing-pfit-on-i9xx.patch
deleted file mode 100644
index b9aabd4a625c9..0000000000000
--- a/patches.baytrail/0328-drm-i915-stop-killing-pfit-on-i9xx.patch
+++ /dev/null
@@ -1,132 +0,0 @@
-From ad5b8315250a36c3c08412dc67440174c7063a4f Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 6 Jun 2013 22:22:47 +0200
-Subject: drm/i915: stop killing pfit on i9xx
-
-Nowadays (i.e. with Valleyview) we also have edp on non-PCH_SPLIT
-platforms, so just checking for LVDS is not good enough.
-
-Secondly we have full pfit pipe config tracking, so we'll correctly
-disable the pfit as part of the initial modeset.
-
-For fastboot we need a bit of work here to correctly kill unsupported
-configs (if e.g. the pfit is used on anything else than the built-in
-panel). But since that's not yet supported we don't need to worry.
-
-Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit c9093354a1e839be057aee66bac37bd3b2f44d0e)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c |  7 +------
- drivers/gpu/drm/i915/intel_drv.h     |  2 +-
- drivers/gpu/drm/i915/intel_lvds.c    | 20 ++++++++++----------
- 3 files changed, 12 insertions(+), 17 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 24c8384228b6..28f97e9aeedc 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -8986,13 +8986,8 @@ static void intel_setup_outputs(struct drm_device *dev)
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct intel_encoder *encoder;
- 	bool dpd_is_edp = false;
--	bool has_lvds;
- 
--	has_lvds = intel_lvds_init(dev);
--	if (!has_lvds && !HAS_PCH_SPLIT(dev)) {
--		/* disable the panel fitter on everything but LVDS */
--		I915_WRITE(PFIT_CONTROL, 0);
--	}
-+	intel_lvds_init(dev);
- 
- 	if (!IS_ULT(dev))
- 		intel_crt_init(dev);
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index abe9c9e9d8a3..20396d624819 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -582,7 +582,7 @@ extern void intel_mark_busy(struct drm_device *dev);
- extern void intel_mark_fb_busy(struct drm_i915_gem_object *obj,
- 			       struct intel_ring_buffer *ring);
- extern void intel_mark_idle(struct drm_device *dev);
--extern bool intel_lvds_init(struct drm_device *dev);
-+extern void intel_lvds_init(struct drm_device *dev);
- extern bool intel_is_dual_link_lvds(struct drm_device *dev);
- extern void intel_dp_init(struct drm_device *dev, int output_reg,
- 			  enum port port);
-diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
-index 7feaba3de45f..3264bfa842fc 100644
---- a/drivers/gpu/drm/i915/intel_lvds.c
-+++ b/drivers/gpu/drm/i915/intel_lvds.c
-@@ -909,7 +909,7 @@ static bool intel_lvds_supported(struct drm_device *dev)
-  * Create the connector, register the LVDS DDC bus, and try to figure out what
-  * modes we can display on the LVDS panel (if present).
-  */
--bool intel_lvds_init(struct drm_device *dev)
-+void intel_lvds_init(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct intel_lvds_encoder *lvds_encoder;
-@@ -927,35 +927,35 @@ bool intel_lvds_init(struct drm_device *dev)
- 	u8 pin;
- 
- 	if (!intel_lvds_supported(dev))
--		return false;
-+		return;
- 
- 	/* Skip init on machines we know falsely report LVDS */
- 	if (dmi_check_system(intel_no_lvds))
--		return false;
-+		return;
- 
- 	pin = GMBUS_PORT_PANEL;
- 	if (!lvds_is_present_in_vbt(dev, &pin)) {
- 		DRM_DEBUG_KMS("LVDS is not present in VBT\n");
--		return false;
-+		return;
- 	}
- 
- 	if (HAS_PCH_SPLIT(dev)) {
- 		if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
--			return false;
-+			return;
- 		if (dev_priv->vbt.edp_support) {
- 			DRM_DEBUG_KMS("disable LVDS for eDP support\n");
--			return false;
-+			return;
- 		}
- 	}
- 
- 	lvds_encoder = kzalloc(sizeof(struct intel_lvds_encoder), GFP_KERNEL);
- 	if (!lvds_encoder)
--		return false;
-+		return;
- 
- 	lvds_connector = kzalloc(sizeof(struct intel_lvds_connector), GFP_KERNEL);
- 	if (!lvds_connector) {
- 		kfree(lvds_encoder);
--		return false;
-+		return;
- 	}
- 
- 	lvds_encoder->attached_connector = lvds_connector;
-@@ -1126,7 +1126,7 @@ out:
- 	intel_panel_init(&intel_connector->panel, fixed_mode);
- 	intel_panel_setup_backlight(connector);
- 
--	return true;
-+	return;
- 
- failed:
- 	DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
-@@ -1136,5 +1136,5 @@ failed:
- 		drm_mode_destroy(dev, fixed_mode);
- 	kfree(lvds_encoder);
- 	kfree(lvds_connector);
--	return false;
-+	return;
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0329-drm-i915-simplify-the-reduced-clock-handling-for-pch.patch b/patches.baytrail/0329-drm-i915-simplify-the-reduced-clock-handling-for-pch.patch
deleted file mode 100644
index c6f4818969c09..0000000000000
--- a/patches.baytrail/0329-drm-i915-simplify-the-reduced-clock-handling-for-pch.patch
+++ /dev/null
@@ -1,62 +0,0 @@
-From 24a3492aef4e63327e474aef6e0192458b5c4562 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Wed, 5 Jun 2013 13:34:22 +0200
-Subject: drm/i915: simplify the reduced clock handling for pch plls
-
-Just move the lowfreq_avail logic out of the register writing as a
-prep step for the next patch, which will coalesce all the pch pll
-enabling into one spot.
-
-Note that writing the reduced clock dividers to FP1 in a few more
-cases (as this patch ends up doing) isn't really relevant since the
-FP1 value only matters when we enable the low lock. Which despite
-can only happen if we've actually enabled the reduced dotclock and
-furthermore isn't even properly implemented on ilk+: Despite claims to
-the contrary in the code switching between frequencies if fully
-manual.
-
-v2: Explain matters around the FP1 change to answer a question Damien
-raised in his review.
-
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit bcd644e046d97b317255ee75f0ebd289b9bcd9ba)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 11 ++++++-----
- 1 file changed, 6 insertions(+), 5 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 28f97e9aeedc..fd96db306c6a 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -5730,7 +5730,10 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
- 		if (encoder->pre_pll_enable)
- 			encoder->pre_pll_enable(encoder);
- 
--	intel_crtc->lowfreq_avail = false;
-+	if (is_lvds && has_reduced_clock && i915_powersave)
-+		intel_crtc->lowfreq_avail = true;
-+	else
-+		intel_crtc->lowfreq_avail = false;
- 
- 	if (intel_crtc->config.has_pch_encoder) {
- 		pll = intel_crtc_to_shared_dpll(intel_crtc);
-@@ -5748,12 +5751,10 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
- 		 */
- 		I915_WRITE(PCH_DPLL(pll->id), dpll);
- 
--		if (is_lvds && has_reduced_clock && i915_powersave) {
-+		if (has_reduced_clock)
- 			I915_WRITE(PCH_FP1(pll->id), fp2);
--			intel_crtc->lowfreq_avail = true;
--		} else {
-+		else
- 			I915_WRITE(PCH_FP1(pll->id), fp);
--		}
- 	}
- 
- 	intel_set_pipe_timings(intel_crtc);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0330-drm-i915-Remove-extra-ring-from-error-message.patch b/patches.baytrail/0330-drm-i915-Remove-extra-ring-from-error-message.patch
deleted file mode 100644
index 5274534d02eae..0000000000000
--- a/patches.baytrail/0330-drm-i915-Remove-extra-ring-from-error-message.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From 5a98d3a3e680490278bc2e9b3ad1075439604044 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Thu, 13 Jun 2013 21:33:33 -0700
-Subject: drm/i915: Remove extra "ring" from error message
-
-The ring names already have "ring" in it.
-
-CC: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit acd78c117f0ac6960dc9e51801adb59810e49e75)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index 5c344a5f307c..a35fb3ce973b 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -2556,7 +2556,7 @@ void i915_hangcheck_elapsed(unsigned long data)
- 
- 	for_each_ring(ring, dev_priv, i) {
- 		if (ring->hangcheck.score > FIRE) {
--			DRM_ERROR("%s on %s ring\n",
-+			DRM_ERROR("%s on %s\n",
- 				  stuck[i] ? "stuck" : "no progress",
- 				  ring->name);
- 			rings_hung++;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0331-drm-i915-Kill-useless-Enable-panel-fitter-comments.patch b/patches.baytrail/0331-drm-i915-Kill-useless-Enable-panel-fitter-comments.patch
deleted file mode 100644
index ee0de459f41fb..0000000000000
--- a/patches.baytrail/0331-drm-i915-Kill-useless-Enable-panel-fitter-comments.patch
+++ /dev/null
@@ -1,59 +0,0 @@
-From 7134654c3f1a430482fb6737812e4ff8b6d5c754 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Fri, 14 Jun 2013 00:51:23 +0200
-Subject: drm/i915: Kill useless "Enable panel fitter" comments
-
-Now that we have this all nicely abstract into separate functions with
-self-documenting names this is pointless. And as Yuly Novikov spotted
-in the case of ilk-ivb also wrong since we use the pfit both for lvds
-and eDP
-
-Reported-By: Yuly Novikov <ynovikov@chromium.org>
-Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
-Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 05d62b831367cece58363dfe5768a00d2a1faaf5)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 4 ----
- 1 file changed, 4 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index fd96db306c6a..9c5eae0f42f6 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -3209,7 +3209,6 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc)
- 		if (encoder->pre_enable)
- 			encoder->pre_enable(encoder);
- 
--	/* Enable panel fitting for LVDS */
- 	ironlake_pfit_enable(intel_crtc);
- 
- 	/*
-@@ -3315,7 +3314,6 @@ static void haswell_crtc_enable(struct drm_crtc *crtc)
- 
- 	intel_ddi_enable_pipe_clock(intel_crtc);
- 
--	/* Enable panel fitting for eDP */
- 	ironlake_pfit_enable(intel_crtc);
- 
- 	/*
-@@ -3611,7 +3609,6 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc)
- 	for_each_encoder_on_crtc(dev, crtc, encoder)
- 		encoder->enable(encoder);
- 
--	/* Enable panel fitting for eDP */
- 	i9xx_pfit_enable(intel_crtc);
- 
- 	intel_crtc_load_lut(crtc);
-@@ -3649,7 +3646,6 @@ static void i9xx_crtc_enable(struct drm_crtc *crtc)
- 		if (encoder->pre_enable)
- 			encoder->pre_enable(encoder);
- 
--	/* Enable panel fitting for LVDS */
- 	i9xx_pfit_enable(intel_crtc);
- 
- 	intel_crtc_load_lut(crtc);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0332-drm-i915-remove-a-superflous-semi-colon.patch b/patches.baytrail/0332-drm-i915-remove-a-superflous-semi-colon.patch
deleted file mode 100644
index a11f23d554eaa..0000000000000
--- a/patches.baytrail/0332-drm-i915-remove-a-superflous-semi-colon.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From 3cd18b148c2b9d417f926df6ff0f4e6579312767 Mon Sep 17 00:00:00 2001
-From: Dan Carpenter <dan.carpenter@oracle.com>
-Date: Tue, 18 Jun 2013 10:29:58 +0300
-Subject: drm/i915: remove a superflous semi-colon
-
-This macro doesn't need a semi-colon.
-
-Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 854c94a7854a4fabdd7db451cf1774e6dcba6bab)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index e73bc66ef1dc..fb98a787864f 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1769,7 +1769,7 @@ int __i915_add_request(struct intel_ring_buffer *ring,
- 		       struct drm_i915_gem_object *batch_obj,
- 		       u32 *seqno);
- #define i915_add_request(ring, seqno) \
--	__i915_add_request(ring, NULL, NULL, seqno);
-+	__i915_add_request(ring, NULL, NULL, seqno)
- int __must_check i915_wait_seqno(struct intel_ring_buffer *ring,
- 				 uint32_t seqno);
- int i915_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0333-drm-make-drm_mm_init-return-void.patch b/patches.baytrail/0333-drm-make-drm_mm_init-return-void.patch
deleted file mode 100644
index b8d533a771793..0000000000000
--- a/patches.baytrail/0333-drm-make-drm_mm_init-return-void.patch
+++ /dev/null
@@ -1,130 +0,0 @@
-From 9aeefe0127725edb81bd4d38feccf41b3bde24f0 Mon Sep 17 00:00:00 2001
-From: David Herrmann <dh.herrmann@gmail.com>
-Date: Mon, 1 Jul 2013 20:32:58 +0200
-Subject: drm: make drm_mm_init() return void
-
-There is no reason to return "int" as this function never fails.
-Furthermore, several drivers (ast, sis) already depend on this.
-
-Signed-off-by: David Herrmann <dh.herrmann@gmail.com>
-Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit 77ef8bbc87be7ad10b410247efc6d0f10676b401)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_gem.c            | 8 ++------
- drivers/gpu/drm/drm_mm.c             | 4 +---
- drivers/gpu/drm/ttm/ttm_bo.c         | 6 +-----
- drivers/gpu/drm/ttm/ttm_bo_manager.c | 8 +-------
- include/drm/drm_mm.h                 | 6 +++---
- 5 files changed, 8 insertions(+), 24 deletions(-)
-
-diff --git a/drivers/gpu/drm/drm_gem.c b/drivers/gpu/drm/drm_gem.c
-index 239ef30f4a62..4e7407cb0ebc 100644
---- a/drivers/gpu/drm/drm_gem.c
-+++ b/drivers/gpu/drm/drm_gem.c
-@@ -108,12 +108,8 @@ drm_gem_init(struct drm_device *dev)
- 		return -ENOMEM;
- 	}
- 
--	if (drm_mm_init(&mm->offset_manager, DRM_FILE_PAGE_OFFSET_START,
--			DRM_FILE_PAGE_OFFSET_SIZE)) {
--		drm_ht_remove(&mm->offset_hash);
--		kfree(mm);
--		return -ENOMEM;
--	}
-+	drm_mm_init(&mm->offset_manager, DRM_FILE_PAGE_OFFSET_START,
-+		    DRM_FILE_PAGE_OFFSET_SIZE);
- 
- 	return 0;
- }
-diff --git a/drivers/gpu/drm/drm_mm.c b/drivers/gpu/drm/drm_mm.c
-index 07cf99cc8862..7917729ee61d 100644
---- a/drivers/gpu/drm/drm_mm.c
-+++ b/drivers/gpu/drm/drm_mm.c
-@@ -669,7 +669,7 @@ int drm_mm_clean(struct drm_mm * mm)
- }
- EXPORT_SYMBOL(drm_mm_clean);
- 
--int drm_mm_init(struct drm_mm * mm, unsigned long start, unsigned long size)
-+void drm_mm_init(struct drm_mm * mm, unsigned long start, unsigned long size)
- {
- 	INIT_LIST_HEAD(&mm->hole_stack);
- 	INIT_LIST_HEAD(&mm->unused_nodes);
-@@ -690,8 +690,6 @@ int drm_mm_init(struct drm_mm * mm, unsigned long start, unsigned long size)
- 	list_add_tail(&mm->head_node.hole_stack, &mm->hole_stack);
- 
- 	mm->color_adjust = NULL;
--
--	return 0;
- }
- EXPORT_SYMBOL(drm_mm_init);
- 
-diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c
-index 8697abd7b173..57f9766e1135 100644
---- a/drivers/gpu/drm/ttm/ttm_bo.c
-+++ b/drivers/gpu/drm/ttm/ttm_bo.c
-@@ -1627,9 +1627,7 @@ int ttm_bo_device_init(struct ttm_bo_device *bdev,
- 		goto out_no_sys;
- 
- 	bdev->addr_space_rb = RB_ROOT;
--	ret = drm_mm_init(&bdev->addr_space_mm, file_page_offset, 0x10000000);
--	if (unlikely(ret != 0))
--		goto out_no_addr_mm;
-+	drm_mm_init(&bdev->addr_space_mm, file_page_offset, 0x10000000);
- 
- 	INIT_DELAYED_WORK(&bdev->wq, ttm_bo_delayed_workqueue);
- 	INIT_LIST_HEAD(&bdev->ddestroy);
-@@ -1643,8 +1641,6 @@ int ttm_bo_device_init(struct ttm_bo_device *bdev,
- 	mutex_unlock(&glob->device_list_mutex);
- 
- 	return 0;
--out_no_addr_mm:
--	ttm_bo_clean_mm(bdev, 0);
- out_no_sys:
- 	return ret;
- }
-diff --git a/drivers/gpu/drm/ttm/ttm_bo_manager.c b/drivers/gpu/drm/ttm/ttm_bo_manager.c
-index 9212494e9072..e4367f91472a 100644
---- a/drivers/gpu/drm/ttm/ttm_bo_manager.c
-+++ b/drivers/gpu/drm/ttm/ttm_bo_manager.c
-@@ -103,18 +103,12 @@ static int ttm_bo_man_init(struct ttm_mem_type_manager *man,
- 			   unsigned long p_size)
- {
- 	struct ttm_range_manager *rman;
--	int ret;
- 
- 	rman = kzalloc(sizeof(*rman), GFP_KERNEL);
- 	if (!rman)
- 		return -ENOMEM;
- 
--	ret = drm_mm_init(&rman->mm, 0, p_size);
--	if (ret) {
--		kfree(rman);
--		return ret;
--	}
--
-+	drm_mm_init(&rman->mm, 0, p_size);
- 	spin_lock_init(&rman->lock);
- 	man->priv = rman;
- 	return 0;
-diff --git a/include/drm/drm_mm.h b/include/drm/drm_mm.h
-index 88591ef8fa24..de9242542f05 100644
---- a/include/drm/drm_mm.h
-+++ b/include/drm/drm_mm.h
-@@ -275,9 +275,9 @@ static inline  struct drm_mm_node *drm_mm_search_free_in_range_color(
- 	return drm_mm_search_free_in_range_generic(mm, size, alignment, color,
- 						   start, end, best_match);
- }
--extern int drm_mm_init(struct drm_mm *mm,
--		       unsigned long start,
--		       unsigned long size);
-+extern void drm_mm_init(struct drm_mm *mm,
-+			unsigned long start,
-+			unsigned long size);
- extern void drm_mm_takedown(struct drm_mm *mm);
- extern int drm_mm_clean(struct drm_mm *mm);
- extern int drm_mm_pre_get(struct drm_mm *mm);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0334-drm-i915-don-t-check-encoder-at-DP-connector-destroy.patch b/patches.baytrail/0334-drm-i915-don-t-check-encoder-at-DP-connector-destroy.patch
deleted file mode 100644
index f3c87de3adbaf..0000000000000
--- a/patches.baytrail/0334-drm-i915-don-t-check-encoder-at-DP-connector-destroy.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From 6b1cd26d404de74ce9fddad6675845307db67eb0 Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Wed, 12 Jun 2013 17:27:23 -0300
-Subject: drm/i915: don't check encoder at DP connector destroy()
-
-By the time we call intel_dp_destroy (which destroys the connector)
-the encoder may have been destroyed already, so if we use it we may be
-reading some free memory. That happens in drm_mode_config_cleanup()
-and also inside intel_dp_init_connector() when we detect a ghost eDP.
-
-I also hope this may solve some random memory bugs.
-
-Reported by kmemcheck.
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Zoltan Nyul <zoltan.nyul@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit acd8db100ed5220fe8043f91cdc20155325542a9)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_dp.c |    5 +++--
- 1 file changed, 3 insertions(+), 2 deletions(-)
-
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -2710,13 +2710,14 @@ done:
- static void
- intel_dp_destroy(struct drm_connector *connector)
- {
--	struct intel_dp *intel_dp = intel_attached_dp(connector);
- 	struct intel_connector *intel_connector = to_intel_connector(connector);
- 
- 	if (!IS_ERR_OR_NULL(intel_connector->edid))
- 		kfree(intel_connector->edid);
- 
--	if (is_edp(intel_dp))
-+	/* Can't call is_edp() since the encoder may have been destroyed
-+	 * already. */
-+	if (connector->connector_type == DRM_MODE_CONNECTOR_eDP)
- 		intel_panel_fini(&intel_connector->panel);
- 
- 	drm_sysfs_connector_remove(connector);
diff --git a/patches.baytrail/0335-drm-i915-extract-intel_edp_init_connector.patch b/patches.baytrail/0335-drm-i915-extract-intel_edp_init_connector.patch
deleted file mode 100644
index 18b7c810991a3..0000000000000
--- a/patches.baytrail/0335-drm-i915-extract-intel_edp_init_connector.patch
+++ /dev/null
@@ -1,193 +0,0 @@
-From 1125a7294a1187b78ef9c43e37ccd323867a63f4 Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Wed, 12 Jun 2013 17:27:24 -0300
-Subject: drm/i915: extract intel_edp_init_connector
-
-Because intel_dp_init_connector is too big for my poor little brain.
-No functional changes.
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Zoltan Nyul <zoltan.nyul@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit ed92f0b239ac971edc509169ae3d6955fbe0a188)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_dp.c |  151 +++++++++++++++++++++-------------------
- 1 file changed, 82 insertions(+), 69 deletions(-)
-
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -2982,6 +2982,86 @@ intel_dp_init_panel_power_sequencer_regi
- 		      I915_READ(pp_div_reg));
- }
- 
-+static bool intel_edp_init_connector(struct intel_dp *intel_dp,
-+				     struct intel_connector *intel_connector)
-+{
-+	struct drm_connector *connector = &intel_connector->base;
-+	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
-+	struct drm_device *dev = intel_dig_port->base.base.dev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct drm_display_mode *fixed_mode = NULL;
-+	struct edp_power_seq power_seq = { 0 };
-+	bool has_dpcd;
-+	struct drm_display_mode *scan;
-+	struct edid *edid;
-+
-+	if (!is_edp(intel_dp))
-+		return true;
-+
-+	intel_dp_init_panel_power_sequencer(dev, intel_dp, &power_seq);
-+
-+	/* Cache DPCD and EDID for edp. */
-+	ironlake_edp_panel_vdd_on(intel_dp);
-+	has_dpcd = intel_dp_get_dpcd(intel_dp);
-+	ironlake_edp_panel_vdd_off(intel_dp, false);
-+
-+	if (has_dpcd) {
-+		if (intel_dp->dpcd[DP_DPCD_REV] >= 0x11)
-+			dev_priv->no_aux_handshake =
-+				intel_dp->dpcd[DP_MAX_DOWNSPREAD] &
-+				DP_NO_AUX_HANDSHAKE_LINK_TRAINING;
-+	} else {
-+		/* if this fails, presume the device is a ghost */
-+		DRM_INFO("failed to retrieve link info, disabling eDP\n");
-+		intel_dp_encoder_destroy(&intel_dig_port->base.base);
-+		intel_dp_destroy(connector);
-+		return false;
-+	}
-+
-+	/* We now know it's not a ghost, init power sequence regs. */
-+	intel_dp_init_panel_power_sequencer_registers(dev, intel_dp,
-+						      &power_seq);
-+
-+	ironlake_edp_panel_vdd_on(intel_dp);
-+	edid = drm_get_edid(connector, &intel_dp->adapter);
-+	if (edid) {
-+		if (drm_add_edid_modes(connector, edid)) {
-+			drm_mode_connector_update_edid_property(connector,
-+								edid);
-+			drm_edid_to_eld(connector, edid);
-+		} else {
-+			kfree(edid);
-+			edid = ERR_PTR(-EINVAL);
-+		}
-+	} else {
-+		edid = ERR_PTR(-ENOENT);
-+	}
-+	intel_connector->edid = edid;
-+
-+	/* prefer fixed mode from EDID if available */
-+	list_for_each_entry(scan, &connector->probed_modes, head) {
-+		if ((scan->type & DRM_MODE_TYPE_PREFERRED)) {
-+			fixed_mode = drm_mode_duplicate(dev, scan);
-+			break;
-+		}
-+	}
-+
-+	/* fallback to VBT if available for eDP */
-+	if (!fixed_mode && dev_priv->vbt.lfp_lvds_vbt_mode) {
-+		fixed_mode = drm_mode_duplicate(dev,
-+					dev_priv->vbt.lfp_lvds_vbt_mode);
-+		if (fixed_mode)
-+			fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
-+	}
-+
-+	ironlake_edp_panel_vdd_off(intel_dp, false);
-+
-+	intel_panel_init(&intel_connector->panel, fixed_mode);
-+	intel_panel_setup_backlight(connector);
-+
-+	return true;
-+}
-+
- void
- intel_dp_init_connector(struct intel_digital_port *intel_dig_port,
- 			struct intel_connector *intel_connector)
-@@ -2991,8 +3071,6 @@ intel_dp_init_connector(struct intel_dig
- 	struct intel_encoder *intel_encoder = &intel_dig_port->base;
- 	struct drm_device *dev = intel_encoder->base.dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
--	struct drm_display_mode *fixed_mode = NULL;
--	struct edp_power_seq power_seq = { 0 };
- 	enum port port = intel_dig_port->port;
- 	const char *name = NULL;
- 	int type;
-@@ -3093,75 +3171,10 @@ intel_dp_init_connector(struct intel_dig
- 		BUG();
- 	}
- 
--	if (is_edp(intel_dp))
--		intel_dp_init_panel_power_sequencer(dev, intel_dp, &power_seq);
--
- 	intel_dp_i2c_init(intel_dp, intel_connector, name);
- 
--	/* Cache DPCD and EDID for edp. */
--	if (is_edp(intel_dp)) {
--		bool ret;
--		struct drm_display_mode *scan;
--		struct edid *edid;
--
--		ironlake_edp_panel_vdd_on(intel_dp);
--		ret = intel_dp_get_dpcd(intel_dp);
--		ironlake_edp_panel_vdd_off(intel_dp, false);
--
--		if (ret) {
--			if (intel_dp->dpcd[DP_DPCD_REV] >= 0x11)
--				dev_priv->no_aux_handshake =
--					intel_dp->dpcd[DP_MAX_DOWNSPREAD] &
--					DP_NO_AUX_HANDSHAKE_LINK_TRAINING;
--		} else {
--			/* if this fails, presume the device is a ghost */
--			DRM_INFO("failed to retrieve link info, disabling eDP\n");
--			intel_dp_encoder_destroy(&intel_encoder->base);
--			intel_dp_destroy(connector);
--			return;
--		}
--
--		/* We now know it's not a ghost, init power sequence regs. */
--		intel_dp_init_panel_power_sequencer_registers(dev, intel_dp,
--							      &power_seq);
--
--		ironlake_edp_panel_vdd_on(intel_dp);
--		edid = drm_get_edid(connector, &intel_dp->adapter);
--		if (edid) {
--			if (drm_add_edid_modes(connector, edid)) {
--				drm_mode_connector_update_edid_property(connector, edid);
--				drm_edid_to_eld(connector, edid);
--			} else {
--				kfree(edid);
--				edid = ERR_PTR(-EINVAL);
--			}
--		} else {
--			edid = ERR_PTR(-ENOENT);
--		}
--		intel_connector->edid = edid;
--
--		/* prefer fixed mode from EDID if available */
--		list_for_each_entry(scan, &connector->probed_modes, head) {
--			if ((scan->type & DRM_MODE_TYPE_PREFERRED)) {
--				fixed_mode = drm_mode_duplicate(dev, scan);
--				break;
--			}
--		}
--
--		/* fallback to VBT if available for eDP */
--		if (!fixed_mode && dev_priv->vbt.lfp_lvds_vbt_mode) {
--			fixed_mode = drm_mode_duplicate(dev, dev_priv->vbt.lfp_lvds_vbt_mode);
--			if (fixed_mode)
--				fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
--		}
--
--		ironlake_edp_panel_vdd_off(intel_dp, false);
--	}
--
--	if (is_edp(intel_dp)) {
--		intel_panel_init(&intel_connector->panel, fixed_mode);
--		intel_panel_setup_backlight(connector);
--	}
-+	if (!intel_edp_init_connector(intel_dp, intel_connector))
-+		return;
- 
- 	intel_dp_add_properties(intel_dp, connector);
- 
diff --git a/patches.baytrail/0336-drm-i915-propagate-errors-from-intel_dp_init_connect.patch b/patches.baytrail/0336-drm-i915-propagate-errors-from-intel_dp_init_connect.patch
deleted file mode 100644
index 01723dc760c0c..0000000000000
--- a/patches.baytrail/0336-drm-i915-propagate-errors-from-intel_dp_init_connect.patch
+++ /dev/null
@@ -1,82 +0,0 @@
-From 897f7793ad6f32bc1fc191bfbfc6ca9bbd509d08 Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Wed, 12 Jun 2013 17:27:25 -0300
-Subject: drm/i915: propagate errors from intel_dp_init_connector
-
-In case we detect a "ghost eDP", intel_edp_init_connector frees both
-the connector and encoder and then returns. On Haswell, intel_ddi_init
-then tries to use the freed encoder on the HDMI initialization path
-since the following commit:
-
-commit 21a8e6a4853b2ed39fa4c5188a710f2cf1b92026
-Author: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date:   Wed Apr 10 23:28:35 2013 +0200
-    drm/i915: don't setup hdmi for port D edp in ddi_init
-
-So now on intel_ddi_init we check for the "ghost eDP" case and return
-without trying to initialize HDMI. This way we won't try to read the
-freed "intel_encoder" struct in the next "if" statement.
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Zoltan Nyul <zoltan.nyul@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 16c255335b0ec39b4e5e976f4b260978aeed5a68)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_ddi.c |    3 ++-
- drivers/gpu/drm/i915/intel_dp.c  |    6 ++++--
- drivers/gpu/drm/i915/intel_drv.h |    2 +-
- 3 files changed, 7 insertions(+), 4 deletions(-)
-
---- a/drivers/gpu/drm/i915/intel_ddi.c
-+++ b/drivers/gpu/drm/i915/intel_ddi.c
-@@ -1366,7 +1366,8 @@ void intel_ddi_init(struct drm_device *d
- 	intel_encoder->cloneable = false;
- 	intel_encoder->hot_plug = intel_ddi_hot_plug;
- 
--	intel_dp_init_connector(intel_dig_port, dp_connector);
-+	if (!intel_dp_init_connector(intel_dig_port, dp_connector))
-+		return;
- 
- 	if (intel_encoder->type != INTEL_OUTPUT_EDP) {
- 		hdmi_connector = kzalloc(sizeof(struct intel_connector),
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -3062,7 +3062,7 @@ static bool intel_edp_init_connector(str
- 	return true;
- }
- 
--void
-+bool
- intel_dp_init_connector(struct intel_digital_port *intel_dig_port,
- 			struct intel_connector *intel_connector)
- {
-@@ -3174,7 +3174,7 @@ intel_dp_init_connector(struct intel_dig
- 	intel_dp_i2c_init(intel_dp, intel_connector, name);
- 
- 	if (!intel_edp_init_connector(intel_dp, intel_connector))
--		return;
-+		return false;
- 
- 	intel_dp_add_properties(intel_dp, connector);
- 
-@@ -3186,6 +3186,8 @@ intel_dp_init_connector(struct intel_dig
- 		u32 temp = I915_READ(PEG_BAND_GAP_DATA);
- 		I915_WRITE(PEG_BAND_GAP_DATA, (temp & ~0xf) | 0xd);
- 	}
-+
-+	return true;
- }
- 
- void
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -586,7 +586,7 @@ extern void intel_lvds_init(struct drm_d
- extern bool intel_is_dual_link_lvds(struct drm_device *dev);
- extern void intel_dp_init(struct drm_device *dev, int output_reg,
- 			  enum port port);
--extern void intel_dp_init_connector(struct intel_digital_port *intel_dig_port,
-+extern bool intel_dp_init_connector(struct intel_digital_port *intel_dig_port,
- 				    struct intel_connector *intel_connector);
- extern void intel_dp_init_link_config(struct intel_dp *intel_dp);
- extern void intel_dp_start_link_train(struct intel_dp *intel_dp);
diff --git a/patches.baytrail/0337-drm-i915-fix-the-ghost-eDP-connector-unwind-path.patch b/patches.baytrail/0337-drm-i915-fix-the-ghost-eDP-connector-unwind-path.patch
deleted file mode 100644
index 530798721622f..0000000000000
--- a/patches.baytrail/0337-drm-i915-fix-the-ghost-eDP-connector-unwind-path.patch
+++ /dev/null
@@ -1,78 +0,0 @@
-From 4c61b19b8fd1ed30b80dbd6dba91146e71c532d0 Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Wed, 12 Jun 2013 17:27:26 -0300
-Subject: drm/i915: fix the "ghost eDP" connector unwind path
-
-Because calling intel_dp_destroy inside intel_edp_init_connector is
-just wrong. This is the initialization path, so we should properly
-unwind all the initialization through the whole caller stack.
-
-On the intel_dp_destroy function we do the following:
-1 - Free edid if it exists
-2 - Call intel_panel_fini in case it's eDP
-3 - Call drm_sysfs_connector_remove
-4 - Call drm_connector_cleanup
-5 - Free the connector
-
-And here is how we unwind each specific step:
-1 - No need as we still didn't assign anything
-2 - No need as we still didn't call intel_panel_init
-3 - Call it in the same function that called drm_sysfs_connector_add
-4 - Call it in the same function that called drm_connector_init
-5 - Free it in the same function that allocated it
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Zoltan Nyul <zoltan.nyul@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit b2f246a8998ccf9e00477c8829a62139804e9857)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_ddi.c |    4 +++-
- drivers/gpu/drm/i915/intel_dp.c  |    9 ++++++---
- 2 files changed, 9 insertions(+), 4 deletions(-)
-
---- a/drivers/gpu/drm/i915/intel_ddi.c
-+++ b/drivers/gpu/drm/i915/intel_ddi.c
-@@ -1366,8 +1366,10 @@ void intel_ddi_init(struct drm_device *d
- 	intel_encoder->cloneable = false;
- 	intel_encoder->hot_plug = intel_ddi_hot_plug;
- 
--	if (!intel_dp_init_connector(intel_dig_port, dp_connector))
-+	if (!intel_dp_init_connector(intel_dig_port, dp_connector)) {
-+		kfree(dp_connector);
- 		return;
-+	}
- 
- 	if (intel_encoder->type != INTEL_OUTPUT_EDP) {
- 		hdmi_connector = kzalloc(sizeof(struct intel_connector),
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -3014,7 +3014,6 @@ static bool intel_edp_init_connector(str
- 		/* if this fails, presume the device is a ghost */
- 		DRM_INFO("failed to retrieve link info, disabling eDP\n");
- 		intel_dp_encoder_destroy(&intel_dig_port->base.base);
--		intel_dp_destroy(connector);
- 		return false;
- 	}
- 
-@@ -3173,8 +3172,11 @@ intel_dp_init_connector(struct intel_dig
- 
- 	intel_dp_i2c_init(intel_dp, intel_connector, name);
- 
--	if (!intel_edp_init_connector(intel_dp, intel_connector))
-+	if (!intel_edp_init_connector(intel_dp, intel_connector)) {
-+		drm_sysfs_connector_remove(connector);
-+		drm_connector_cleanup(connector);
- 		return false;
-+	}
- 
- 	intel_dp_add_properties(intel_dp, connector);
- 
-@@ -3233,5 +3235,6 @@ intel_dp_init(struct drm_device *dev, in
- 	intel_encoder->cloneable = false;
- 	intel_encoder->hot_plug = intel_dp_hot_plug;
- 
--	intel_dp_init_connector(intel_dig_port, intel_connector);
-+	if (!intel_dp_init_connector(intel_dig_port, intel_connector))
-+		kfree(intel_connector);
- }
diff --git a/patches.baytrail/0338-drm-i915-fix-the-ghost-eDP-encoder-unwind-path.patch b/patches.baytrail/0338-drm-i915-fix-the-ghost-eDP-encoder-unwind-path.patch
deleted file mode 100644
index c127a2e10e645..0000000000000
--- a/patches.baytrail/0338-drm-i915-fix-the-ghost-eDP-encoder-unwind-path.patch
+++ /dev/null
@@ -1,82 +0,0 @@
-From b76b6f1d0b67532fdd33934addae3c3e30e8f8c1 Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Wed, 12 Jun 2013 17:27:27 -0300
-Subject: drm/i915: fix the "ghost eDP" encoder unwind path
-
-Because calling intel_dp_encoder_destroy inside
-intel_edp_init_connector is just wrong. This is the initialization
-path, so we should properly unwind all the initialization through the
-whole caller stack.
-
-On the intel_dp_encoder_destroy function we do the following:
-1 - Call i2c_del_adapter
-2 - Call drm_encoder_cleanup
-3 - If edp:
-3.1 - Cancel panel_vdd_work
-3.2 - Call ironlake_panel_vdd_of_sync
-4 - Free the encoder
-
-And here is how we unwind each specific step:
-1 - We have intel_dp_init_connector -> intel_dp_i2c_init ->
-    i2c_dp_aux_add_bus -> i2c_add_adapter, so we call
-    i2c_del_dapter at intel_dp_init_connector
-2 - Call it in the same function that called drm_encoder_init
-3 - Call it in the same function that called INIT_DELAYED_WORK
-4 - Free it in the same function that allocated it
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Zoltan Nyul <zoltan.nyul@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 15b1d171d87e86366266255462e6b11d21b61c1c)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_ddi.c |    2 ++
- drivers/gpu/drm/i915/intel_dp.c  |   13 +++++++++++--
- 2 files changed, 13 insertions(+), 2 deletions(-)
-
---- a/drivers/gpu/drm/i915/intel_ddi.c
-+++ b/drivers/gpu/drm/i915/intel_ddi.c
-@@ -1367,6 +1367,8 @@ void intel_ddi_init(struct drm_device *d
- 	intel_encoder->hot_plug = intel_ddi_hot_plug;
- 
- 	if (!intel_dp_init_connector(intel_dig_port, dp_connector)) {
-+		drm_encoder_cleanup(encoder);
-+		kfree(intel_dig_port);
- 		kfree(dp_connector);
- 		return;
- 	}
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -3013,7 +3013,6 @@ static bool intel_edp_init_connector(str
- 	} else {
- 		/* if this fails, presume the device is a ghost */
- 		DRM_INFO("failed to retrieve link info, disabling eDP\n");
--		intel_dp_encoder_destroy(&intel_dig_port->base.base);
- 		return false;
- 	}
- 
-@@ -3173,6 +3172,13 @@ intel_dp_init_connector(struct intel_dig
- 	intel_dp_i2c_init(intel_dp, intel_connector, name);
- 
- 	if (!intel_edp_init_connector(intel_dp, intel_connector)) {
-+		i2c_del_adapter(&intel_dp->adapter);
-+		if (is_edp(intel_dp)) {
-+			cancel_delayed_work_sync(&intel_dp->panel_vdd_work);
-+			mutex_lock(&dev->mode_config.mutex);
-+			ironlake_panel_vdd_off_sync(intel_dp);
-+			mutex_unlock(&dev->mode_config.mutex);
-+		}
- 		drm_sysfs_connector_remove(connector);
- 		drm_connector_cleanup(connector);
- 		return false;
-@@ -3235,6 +3241,9 @@ intel_dp_init(struct drm_device *dev, in
- 	intel_encoder->cloneable = false;
- 	intel_encoder->hot_plug = intel_dp_hot_plug;
- 
--	if (!intel_dp_init_connector(intel_dig_port, intel_connector))
-+	if (!intel_dp_init_connector(intel_dig_port, intel_connector)) {
-+		drm_encoder_cleanup(encoder);
-+		kfree(intel_dig_port);
- 		kfree(intel_connector);
-+	}
- }
diff --git a/patches.baytrail/0339-drm-i915-check-the-return-value-of-intel_dp_i2c_init.patch b/patches.baytrail/0339-drm-i915-check-the-return-value-of-intel_dp_i2c_init.patch
deleted file mode 100644
index 2b601d7f17a02..0000000000000
--- a/patches.baytrail/0339-drm-i915-check-the-return-value-of-intel_dp_i2c_init.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From 1a2ece247f17addccbce131ba57391c11a042f0e Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Wed, 12 Jun 2013 17:27:28 -0300
-Subject: drm/i915: check the return value of intel_dp_i2c_init
-
-We've been ignoring this return value, so print a nice backtrace in
-case it's not what we expected.
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Zoltan Nyul <zoltan.nyul@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit b2a1475561d59e8d182ba8cc4b7e78b662a3f533)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_dp.c |    6 ++++--
- 1 file changed, 4 insertions(+), 2 deletions(-)
-
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -3071,7 +3071,7 @@ intel_dp_init_connector(struct intel_dig
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	enum port port = intel_dig_port->port;
- 	const char *name = NULL;
--	int type;
-+	int type, error;
- 
- 	/* Preserve the current hw state. */
- 	intel_dp->DP = I915_READ(intel_dp->output_reg);
-@@ -3169,7 +3169,9 @@ intel_dp_init_connector(struct intel_dig
- 		BUG();
- 	}
- 
--	intel_dp_i2c_init(intel_dp, intel_connector, name);
-+	error = intel_dp_i2c_init(intel_dp, intel_connector, name);
-+	WARN(error, "intel_dp_i2c_init failed with error %d for port %c\n",
-+	     error, port_name(port));
- 
- 	if (!intel_edp_init_connector(intel_dp, intel_connector)) {
- 		i2c_del_adapter(&intel_dp->adapter);
diff --git a/patches.baytrail/0340-drm-i915-rename-intel_dp_destroy-to-intel_dp_connect.patch b/patches.baytrail/0340-drm-i915-rename-intel_dp_destroy-to-intel_dp_connect.patch
deleted file mode 100644
index e7658e2066d1f..0000000000000
--- a/patches.baytrail/0340-drm-i915-rename-intel_dp_destroy-to-intel_dp_connect.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From 05fc6037d90b0a9f248f55a616f633f2fba543a2 Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Wed, 12 Jun 2013 17:27:30 -0300
-Subject: drm/i915: rename intel_dp_destroy to intel_dp_connector_destroy
-
-Because it's the function that destroys the connector, not the
-encoder. And we already have intel_dp_encoder_destroy.
-
-This has annoyed me for a long time.
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Zoltan Nyul <zoltan.nyul@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 73845adf3357c3c71da25e18f44e5a9924d666d5)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_dp.c |    4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -2708,7 +2708,7 @@ done:
- }
- 
- static void
--intel_dp_destroy(struct drm_connector *connector)
-+intel_dp_connector_destroy(struct drm_connector *connector)
- {
- 	struct intel_connector *intel_connector = to_intel_connector(connector);
- 
-@@ -2751,7 +2751,7 @@ static const struct drm_connector_funcs
- 	.detect = intel_dp_detect,
- 	.fill_modes = drm_helper_probe_single_connector_modes,
- 	.set_property = intel_dp_set_property,
--	.destroy = intel_dp_destroy,
-+	.destroy = intel_dp_connector_destroy,
- };
- 
- static const struct drm_connector_helper_funcs intel_dp_connector_helper_funcs = {
diff --git a/patches.baytrail/0341-drm-i915-Fix-PCH-detect-with-multiple-ISA-bridges-in.patch b/patches.baytrail/0341-drm-i915-Fix-PCH-detect-with-multiple-ISA-bridges-in.patch
deleted file mode 100644
index d2ef9a361d2e1..0000000000000
--- a/patches.baytrail/0341-drm-i915-Fix-PCH-detect-with-multiple-ISA-bridges-in.patch
+++ /dev/null
@@ -1,64 +0,0 @@
-From 927cf082463ae442014d8a34195010ce2ab7f708 Mon Sep 17 00:00:00 2001
-From: Rui Guo <firemeteor@users.sourceforge.net>
-Date: Wed, 19 Jun 2013 21:10:23 +0800
-Subject: drm/i915: Fix PCH detect with multiple ISA bridges in VM
-
-In some virtualized environments (e.g. XEN), there is irrelevant ISA bridge in
-the system. To work reliably, we should scan trhough all the ISA bridge
-devices and check for the first match, instead of only checking the first one.
-
-Signed-off-by: Rui Guo <firemeteor@users.sourceforge.net>
-[danvet: Fixup conflict with the num_pch_pll removal. And add
-subsystem header to the commit message headline.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 6a9c4b35e6696a63805b6da5e4889c6986e9ee1b)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.c | 18 ++++++++++++++++--
- 1 file changed, 16 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
-index b255b0bb0953..27a8bedd9156 100644
---- a/drivers/gpu/drm/i915/i915_drv.c
-+++ b/drivers/gpu/drm/i915/i915_drv.c
-@@ -465,9 +465,15 @@ void intel_detect_pch(struct drm_device *dev)
- 	 * make graphics device passthrough work easy for VMM, that only
- 	 * need to expose ISA bridge to let driver know the real hardware
- 	 * underneath. This is a requirement from virtualization team.
-+	 *
-+	 * In some virtualized environments (e.g. XEN), there is irrelevant
-+	 * ISA bridge in the system. To work reliably, we should scan trhough
-+	 * all the ISA bridge devices and check for the first match, instead
-+	 * of only checking the first one.
- 	 */
- 	pch = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, NULL);
--	if (pch) {
-+	while (pch) {
-+		struct pci_dev *curr = pch;
- 		if (pch->vendor == PCI_VENDOR_ID_INTEL) {
- 			unsigned short id;
- 			id = pch->device & INTEL_PCH_DEVICE_ID_MASK;
-@@ -496,10 +502,18 @@ void intel_detect_pch(struct drm_device *dev)
- 				DRM_DEBUG_KMS("Found LynxPoint LP PCH\n");
- 				WARN_ON(!IS_HASWELL(dev));
- 				WARN_ON(!IS_ULT(dev));
-+			} else {
-+				goto check_next;
- 			}
-+			pci_dev_put(pch);
-+			break;
- 		}
--		pci_dev_put(pch);
-+check_next:
-+		pch = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, curr);
-+		pci_dev_put(curr);
- 	}
-+	if (!pch)
-+		DRM_DEBUG_KMS("No PCH found?\n");
- }
- 
- bool i915_semaphore_is_enabled(struct drm_device *dev)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0342-drm-i915-tune-down-DIDL-warning-about-too-many-outpu.patch b/patches.baytrail/0342-drm-i915-tune-down-DIDL-warning-about-too-many-outpu.patch
deleted file mode 100644
index 1618bd77cc932..0000000000000
--- a/patches.baytrail/0342-drm-i915-tune-down-DIDL-warning-about-too-many-outpu.patch
+++ /dev/null
@@ -1,51 +0,0 @@
-From e622cbff5041689378f915f41715311b616be112 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Mon, 24 Jun 2013 18:32:36 +0200
-Subject: drm/i915: tune down DIDL warning about too many outputs
-
-Nothing the user (nor we) really can do about this, but upsets a nice
-quiet boot.
-
-Note that this happens mostly on SDVs where OEMs obviously haven't had
-a chance yet to appropriately trim the output list.
-
-Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=65988
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-[danvet: Amend commit message a bit to clarify a question from Paulo.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 0f4f7b57954dda93b10e3b46594b0bfe24bba22c)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_opregion.c | 8 ++++----
- 1 file changed, 4 insertions(+), 4 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_opregion.c b/drivers/gpu/drm/i915/intel_opregion.c
-index 79be7cfd3152..cfb8fb68f09c 100644
---- a/drivers/gpu/drm/i915/intel_opregion.c
-+++ b/drivers/gpu/drm/i915/intel_opregion.c
-@@ -311,8 +311,8 @@ static void intel_didl_outputs(struct drm_device *dev)
- 
- 	list_for_each_entry(acpi_cdev, &acpi_video_bus->children, node) {
- 		if (i >= 8) {
--			dev_printk(KERN_ERR, &dev->pdev->dev,
--				   "More than 8 outputs detected via ACPI\n");
-+			dev_dbg(&dev->pdev->dev,
-+				"More than 8 outputs detected via ACPI\n");
- 			return;
- 		}
- 		status =
-@@ -338,8 +338,8 @@ blind_set:
- 	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
- 		int output_type = ACPI_OTHER_OUTPUT;
- 		if (i >= 8) {
--			dev_printk(KERN_ERR, &dev->pdev->dev,
--				   "More than 8 outputs in connector list\n");
-+			dev_dbg(&dev->pdev->dev,
-+				"More than 8 outputs in connector list\n");
- 			return;
- 		}
- 		switch (connector->connector_type) {
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0343-drm-i915-fix-build-warning-on-format-specifier-misma.patch b/patches.baytrail/0343-drm-i915-fix-build-warning-on-format-specifier-misma.patch
deleted file mode 100644
index dc3483f1002e2..0000000000000
--- a/patches.baytrail/0343-drm-i915-fix-build-warning-on-format-specifier-misma.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From bfc9affe523ef2d2b72844b56151e82bbb602081 Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Fri, 7 Jun 2013 16:03:50 +0300
-Subject: drm/i915: fix build warning on format specifier mismatch
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-drivers/gpu/drm/i915/i915_gem.c: In function ‘i915_gem_object_bind_to_gtt’:
-drivers/gpu/drm/i915/i915_gem.c:3002:3: warning: format ‘%ld’ expects
-argument of type ‘long int’, but argument 5 has type ‘size_t’ [-Wformat]
-
-v2: Use %zu instead of %d. Two char patch, and 100% wrong. (Ville)
-
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 3765f3048651586e2617793e9efe184ff8c79a97)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index 70af73dff001..5fcee7608228 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -3138,7 +3138,7 @@ i915_gem_object_bind_to_gtt(struct drm_i915_gem_object *obj,
- 	 * before evicting everything in a vain attempt to find space.
- 	 */
- 	if (obj->base.size > gtt_max) {
--		DRM_ERROR("Attempting to bind an object larger than the aperture: object=%zd > %s aperture=%ld\n",
-+		DRM_ERROR("Attempting to bind an object larger than the aperture: object=%zd > %s aperture=%zu\n",
- 			  obj->base.size,
- 			  map_and_fenceable ? "mappable" : "total",
- 			  gtt_max);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0344-drm-i915-Introduce-an-HAS_IPS-macro.patch b/patches.baytrail/0344-drm-i915-Introduce-an-HAS_IPS-macro.patch
deleted file mode 100644
index e97357a3a49d2..0000000000000
--- a/patches.baytrail/0344-drm-i915-Introduce-an-HAS_IPS-macro.patch
+++ /dev/null
@@ -1,69 +0,0 @@
-From f336d3c8e153abd11567568c6ebfcd9352ee16c5 Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Mon, 24 Jun 2013 18:29:34 +0100
-Subject: drm/i915: Introduce an HAS_IPS() macro
-
-Follow the trend and don't code conditions with platforms but with
-features.
-
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit f5adf94e5fed2468eef4f0c094b66bf834770d7b)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_debugfs.c  | 2 +-
- drivers/gpu/drm/i915/i915_drv.h      | 2 ++
- drivers/gpu/drm/i915/intel_display.c | 4 ++--
- 3 files changed, 5 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
-index d4e78b64ca87..f72d5a3fdfba 100644
---- a/drivers/gpu/drm/i915/i915_debugfs.c
-+++ b/drivers/gpu/drm/i915/i915_debugfs.c
-@@ -1483,7 +1483,7 @@ static int i915_ips_status(struct seq_file *m, void *unused)
- 	struct drm_device *dev = node->minor->dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 
--	if (!IS_ULT(dev)) {
-+	if (!HAS_IPS(dev)) {
- 		seq_puts(m, "not supported\n");
- 		return 0;
- 	}
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index fb98a787864f..1929bffc1c77 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1475,6 +1475,8 @@ struct drm_i915_file_private {
- #define HAS_PIPE_CXSR(dev) (INTEL_INFO(dev)->has_pipe_cxsr)
- #define I915_HAS_FBC(dev) (INTEL_INFO(dev)->has_fbc)
- 
-+#define HAS_IPS(dev)		(IS_ULT(dev))
-+
- #define HAS_PIPE_CONTROL(dev) (INTEL_INFO(dev)->gen >= 5)
- 
- #define HAS_DDI(dev)		(INTEL_INFO(dev)->has_ddi)
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 9c5eae0f42f6..82cdb4c5dede 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -3250,7 +3250,7 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc)
- /* IPS only exists on ULT machines and is tied to pipe A. */
- static bool hsw_crtc_supports_ips(struct intel_crtc *crtc)
- {
--	return IS_ULT(crtc->base.dev) && crtc->pipe == PIPE_A;
-+	return HAS_IPS(crtc->base.dev) && crtc->pipe == PIPE_A;
- }
- 
- static void hsw_enable_ips(struct intel_crtc *crtc)
-@@ -4065,7 +4065,7 @@ static int intel_crtc_compute_config(struct intel_crtc *crtc,
- 		pipe_config->pipe_bpp = 8*3;
- 	}
- 
--	if (IS_HASWELL(dev))
-+	if (HAS_IPS(dev))
- 		hsw_compute_ips_config(crtc, pipe_config);
- 
- 	/* XXX: PCH clock sharing is done in ->mode_set, so make sure the old
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0345-drm-i915-don-t-scream-into-dmesg-when-a-modeset-fail.patch b/patches.baytrail/0345-drm-i915-don-t-scream-into-dmesg-when-a-modeset-fail.patch
deleted file mode 100644
index 769f5becae58d..0000000000000
--- a/patches.baytrail/0345-drm-i915-don-t-scream-into-dmesg-when-a-modeset-fail.patch
+++ /dev/null
@@ -1,38 +0,0 @@
-From a6b237fd0a42eafdb93833157080c570818ccece Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Tue, 25 Jun 2013 11:06:52 +0200
-Subject: drm/i915: don't scream into dmesg when a modeset fails
-
-There are legit cases, e.g. when userspace asks for something
-impossible. So tune it down to debug output like we do with all other
-userspace-triggerable warnings.
-
-Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=66111#c5
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-[danvet: Rebased.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit bf67dfeb6899e140710d2138535b519dd8e46417)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 82cdb4c5dede..0cc81f6c0af3 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -8760,8 +8760,8 @@ static int intel_crtc_set_config(struct drm_mode_set *set)
- 	}
- 
- 	if (ret) {
--		DRM_ERROR("failed to set mode on [CRTC:%d], err = %d\n",
--			  set->crtc->base.id, ret);
-+		DRM_DEBUG_KMS("failed to set mode on [CRTC:%d], err = %d\n",
-+			      set->crtc->base.id, ret);
- fail:
- 		intel_set_config_restore_state(dev, config);
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0346-drm-i915-Remove-duplicated-WaForceL3Serialization-vl.patch b/patches.baytrail/0346-drm-i915-Remove-duplicated-WaForceL3Serialization-vl.patch
deleted file mode 100644
index 09527c5853d1a..0000000000000
--- a/patches.baytrail/0346-drm-i915-Remove-duplicated-WaForceL3Serialization-vl.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 3e0bc0db8e5208aa7c20a09814e8d94f578af954 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Tue, 25 Jun 2013 16:38:21 +0300
-Subject: drm/i915: Remove duplicated WaForceL3Serialization:vlv
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-No need to apply WaForceL3Serialization:vlv twice.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit e4e9222d4b5e041c3b5a54ee21d6c62e7cc56609)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 4 ----
- 1 file changed, 4 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 6ff11802e49a..ef160e9a3ba6 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -4834,10 +4834,6 @@ static void valleyview_init_clock_gating(struct drm_device *dev)
- 	I915_WRITE(GEN7_ROW_CHICKEN2,
- 		   _MASKED_BIT_ENABLE(DOP_CLOCK_GATING_DISABLE));
- 
--	/* WaForceL3Serialization:vlv */
--	I915_WRITE(GEN7_L3SQCREG4, I915_READ(GEN7_L3SQCREG4) &
--		   ~L3SQ_URB_READ_CAM_MATCH_DISABLE);
--
- 	/* This is required by WaCatErrorRejectionIssue:vlv */
- 	I915_WRITE(GEN7_SQ_CHICKEN_MBCUNIT_CONFIG,
- 		   I915_READ(GEN7_SQ_CHICKEN_MBCUNIT_CONFIG) |
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0347-drm-i915-Detect-invalid-scanout-pitches.patch b/patches.baytrail/0347-drm-i915-Detect-invalid-scanout-pitches.patch
deleted file mode 100644
index efdc7947ba419..0000000000000
--- a/patches.baytrail/0347-drm-i915-Detect-invalid-scanout-pitches.patch
+++ /dev/null
@@ -1,73 +0,0 @@
-From fb4fea58f0910b13047947a03b8cfa8c5f5890d0 Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Tue, 25 Jun 2013 17:26:45 +0100
-Subject: drm/i915: Detect invalid scanout pitches
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Report back the user error of attempting to setup a CRTC with an invalid
-framebuffer pitch. This is trickier than it should be as on gen4, there
-is a restriction that tiled surfaces must have a stride less than 16k -
-which is less than the largest supported CRTC size.
-
-v2: Fix the limits for gen3
-v3: Move check into intel_framebuffer_init() and fix VLV limits. (vsyrjala)
-v4: Use idiomatic '>=' for generation checks
-
-References: https://bugs.freedesktop.org/show_bug.cgi?id=65099
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit a35cdaa0e13e24f3fccc518bfef1516aa8a8a665)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 25 +++++++++++++++++++++----
- 1 file changed, 21 insertions(+), 4 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 0cc81f6c0af3..e441a4b5904a 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -9128,6 +9128,7 @@ int intel_framebuffer_init(struct drm_device *dev,
- 			   struct drm_mode_fb_cmd2 *mode_cmd,
- 			   struct drm_i915_gem_object *obj)
- {
-+	int pitch_limit;
- 	int ret;
- 
- 	if (obj->tiling_mode == I915_TILING_Y) {
-@@ -9141,10 +9142,26 @@ int intel_framebuffer_init(struct drm_device *dev,
- 		return -EINVAL;
- 	}
- 
--	/* FIXME <= Gen4 stride limits are bit unclear */
--	if (mode_cmd->pitches[0] > 32768) {
--		DRM_DEBUG("pitch (%d) must be at less than 32768\n",
--			  mode_cmd->pitches[0]);
-+	if (INTEL_INFO(dev)->gen >= 5 && !IS_VALLEYVIEW(dev)) {
-+		pitch_limit = 32*1024;
-+	} else if (INTEL_INFO(dev)->gen >= 4) {
-+		if (obj->tiling_mode)
-+			pitch_limit = 16*1024;
-+		else
-+			pitch_limit = 32*1024;
-+	} else if (INTEL_INFO(dev)->gen >= 3) {
-+		if (obj->tiling_mode)
-+			pitch_limit = 8*1024;
-+		else
-+			pitch_limit = 16*1024;
-+	} else
-+		/* XXX DSPC is limited to 4k tiled */
-+		pitch_limit = 8*1024;
-+
-+	if (mode_cmd->pitches[0] > pitch_limit) {
-+		DRM_DEBUG("%s pitch (%d) must be at less than %d\n",
-+			  obj->tiling_mode ? "tiled" : "linear",
-+			  mode_cmd->pitches[0], pitch_limit);
- 		return -EINVAL;
- 	}
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0348-drm-i915-Clean-up-VLV-rps-code-a-bit.patch b/patches.baytrail/0348-drm-i915-Clean-up-VLV-rps-code-a-bit.patch
deleted file mode 100644
index 3e1f05e528548..0000000000000
--- a/patches.baytrail/0348-drm-i915-Clean-up-VLV-rps-code-a-bit.patch
+++ /dev/null
@@ -1,121 +0,0 @@
-From be2e64c2b4121991a3e3a062868b4ffc8fac9923 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Tue, 25 Jun 2013 19:21:01 +0300
-Subject: drm/i915: Clean up VLV rps code a bit
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Always print both the MHz value and raw register value for rps stuff.
-
-Also kill a somewhat pointless local 'rpe' variable and just use
-dev_priv->rps.rpe_delay.
-
-While at it clean up the caps in "GPU" and "Punit" debug messages.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 73008b989faf4200907a858f9b902ee29d6edbea)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 50 ++++++++++++++++++++++++-----------------
- 1 file changed, 30 insertions(+), 20 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index ef160e9a3ba6..9f1134b95fa7 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -3080,10 +3080,11 @@ void valleyview_set_rps(struct drm_device *dev, u8 val)
- 	WARN_ON(val > dev_priv->rps.max_delay);
- 	WARN_ON(val < dev_priv->rps.min_delay);
- 
--	DRM_DEBUG_DRIVER("gpu freq request from %d to %d\n",
-+	DRM_DEBUG_DRIVER("GPU freq request from %d MHz (%u) to %d MHz (%u)\n",
- 			 vlv_gpu_freq(dev_priv->mem_freq,
- 				      dev_priv->rps.cur_delay),
--			 vlv_gpu_freq(dev_priv->mem_freq, val));
-+			 dev_priv->rps.cur_delay,
-+			 vlv_gpu_freq(dev_priv->mem_freq, val), val);
- 
- 	if (val == dev_priv->rps.cur_delay)
- 		return;
-@@ -3101,8 +3102,9 @@ void valleyview_set_rps(struct drm_device *dev, u8 val)
- 
- 	pval = vlv_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS);
- 	if ((pval >> 8) != val)
--		DRM_DEBUG_DRIVER("punit overrode freq: %d requested, but got %d\n",
--			  val, pval >> 8);
-+		DRM_DEBUG_DRIVER("Punit overrode GPU freq: %d MHz (%u) requested, but got %d Mhz (%u)\n",
-+				 vlv_gpu_freq(dev_priv->mem_freq, val), val,
-+				 vlv_gpu_freq(dev_priv->mem_freq, pval >> 8), pval >> 8);
- 
- 	/* Make sure we continue to get interrupts
- 	 * until we hit the minimum or maximum frequencies.
-@@ -3496,7 +3498,7 @@ static void valleyview_enable_rps(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct intel_ring_buffer *ring;
--	u32 gtfifodbg, val, rpe;
-+	u32 gtfifodbg, val;
- 	int i;
- 
- 	WARN_ON(!mutex_is_locked(&dev_priv->rps.hw_lock));
-@@ -3557,31 +3559,39 @@ static void valleyview_enable_rps(struct drm_device *dev)
- 	DRM_DEBUG_DRIVER("GPLL enabled? %s\n", val & 0x10 ? "yes" : "no");
- 	DRM_DEBUG_DRIVER("GPU status: 0x%08x\n", val);
- 
--	DRM_DEBUG_DRIVER("current GPU freq: %d\n",
--			 vlv_gpu_freq(dev_priv->mem_freq, (val >> 8) & 0xff));
- 	dev_priv->rps.cur_delay = (val >> 8) & 0xff;
-+	DRM_DEBUG_DRIVER("current GPU freq: %d MHz (%u)\n",
-+			 vlv_gpu_freq(dev_priv->mem_freq,
-+				      dev_priv->rps.cur_delay),
-+			 dev_priv->rps.cur_delay);
- 
- 	dev_priv->rps.max_delay = valleyview_rps_max_freq(dev_priv);
- 	dev_priv->rps.hw_max = dev_priv->rps.max_delay;
--	DRM_DEBUG_DRIVER("max GPU freq: %d\n", vlv_gpu_freq(dev_priv->mem_freq,
--						     dev_priv->rps.max_delay));
-+	DRM_DEBUG_DRIVER("max GPU freq: %d MHz (%u)\n",
-+			 vlv_gpu_freq(dev_priv->mem_freq,
-+				      dev_priv->rps.max_delay),
-+			 dev_priv->rps.max_delay);
- 
--	rpe = valleyview_rps_rpe_freq(dev_priv);
--	DRM_DEBUG_DRIVER("RPe GPU freq: %d\n",
--			 vlv_gpu_freq(dev_priv->mem_freq, rpe));
--	dev_priv->rps.rpe_delay = rpe;
-+	dev_priv->rps.rpe_delay = valleyview_rps_rpe_freq(dev_priv);
-+	DRM_DEBUG_DRIVER("RPe GPU freq: %d MHz (%u)\n",
-+			 vlv_gpu_freq(dev_priv->mem_freq,
-+				      dev_priv->rps.rpe_delay),
-+			 dev_priv->rps.rpe_delay);
- 
--	val = valleyview_rps_min_freq(dev_priv);
--	DRM_DEBUG_DRIVER("min GPU freq: %d\n", vlv_gpu_freq(dev_priv->mem_freq,
--							    val));
--	dev_priv->rps.min_delay = val;
-+	dev_priv->rps.min_delay = valleyview_rps_min_freq(dev_priv);
-+	DRM_DEBUG_DRIVER("min GPU freq: %d MHz (%u)\n",
-+			 vlv_gpu_freq(dev_priv->mem_freq,
-+				      dev_priv->rps.min_delay),
-+			 dev_priv->rps.min_delay);
- 
--	DRM_DEBUG_DRIVER("setting GPU freq to %d\n",
--			 vlv_gpu_freq(dev_priv->mem_freq, rpe));
-+	DRM_DEBUG_DRIVER("setting GPU freq to %d MHz (%u)\n",
-+			 vlv_gpu_freq(dev_priv->mem_freq,
-+				      dev_priv->rps.rpe_delay),
-+			 dev_priv->rps.rpe_delay);
- 
- 	INIT_DELAYED_WORK(&dev_priv->rps.vlv_work, vlv_rps_timer_work);
- 
--	valleyview_set_rps(dev_priv->dev, rpe);
-+	valleyview_set_rps(dev_priv->dev, dev_priv->rps.rpe_delay);
- 
- 	/* requires MSI enabled */
- 	I915_WRITE(GEN6_PMIER, GEN6_PM_RPS_EVENTS);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0349-drm-i915-Don-t-wait-for-Punit-after-each-freq-change.patch b/patches.baytrail/0349-drm-i915-Don-t-wait-for-Punit-after-each-freq-change.patch
deleted file mode 100644
index 75b16ad965214..0000000000000
--- a/patches.baytrail/0349-drm-i915-Don-t-wait-for-Punit-after-each-freq-change.patch
+++ /dev/null
@@ -1,121 +0,0 @@
-From 2da6a37ac0c5a3c36cc58ff11a6c529c8c4205fa Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Tue, 25 Jun 2013 19:21:02 +0300
-Subject: drm/i915: Don't wait for Punit after each freq change on VLV
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-It seems that even though Punit reports the frequency change to have
-been completed, it still reports the old frequency in the status
-register for some time.
-
-So rather than polling for Punit to complete the frequency change after
-each request, poll before. This gets rid of the spurious "Punit overrode
-GPU freq" messages.
-
-This also lets us continue working while Punit is performing the actual
-frequency change. As a result, openarena demo088-test1 timedemo average
-fps is increased by ~5 fps, and the slowest frame duration is reduced
-by ~25%.
-
-The sysfs cur_freq file always reads the current frequency from Punit
-anyway, so having rps.cur_delay be slightly off at times doesn't matter.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 80814ae4dae5d2070b1ca848df728feb6a10e6f2)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 53 +++++++++++++++++++++++++++--------------
- 1 file changed, 35 insertions(+), 18 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 9f1134b95fa7..b3622a2f6c4f 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -3069,17 +3069,49 @@ void gen6_set_rps(struct drm_device *dev, u8 val)
- 	trace_intel_gpu_freq_change(val * 50);
- }
- 
-+/*
-+ * Wait until the previous freq change has completed,
-+ * or the timeout elapsed, and then update our notion
-+ * of the current GPU frequency.
-+ */
-+static void vlv_update_rps_cur_delay(struct drm_i915_private *dev_priv)
-+{
-+	unsigned long timeout = jiffies + msecs_to_jiffies(10);
-+	u32 pval;
-+
-+	WARN_ON(!mutex_is_locked(&dev_priv->rps.hw_lock));
-+
-+	do {
-+		pval = vlv_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS);
-+		if (time_after(jiffies, timeout)) {
-+			DRM_DEBUG_DRIVER("timed out waiting for Punit\n");
-+			break;
-+		}
-+		udelay(10);
-+	} while (pval & 1);
-+
-+	pval >>= 8;
-+
-+	if (pval != dev_priv->rps.cur_delay)
-+		DRM_DEBUG_DRIVER("Punit overrode GPU freq: %d MHz (%u) requested, but got %d Mhz (%u)\n",
-+				 vlv_gpu_freq(dev_priv->mem_freq, dev_priv->rps.cur_delay),
-+				 dev_priv->rps.cur_delay,
-+				 vlv_gpu_freq(dev_priv->mem_freq, pval), pval);
-+
-+	dev_priv->rps.cur_delay = pval;
-+}
-+
- void valleyview_set_rps(struct drm_device *dev, u8 val)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
--	unsigned long timeout = jiffies + msecs_to_jiffies(10);
- 	u32 limits = gen6_rps_limits(dev_priv, &val);
--	u32 pval;
- 
- 	WARN_ON(!mutex_is_locked(&dev_priv->rps.hw_lock));
- 	WARN_ON(val > dev_priv->rps.max_delay);
- 	WARN_ON(val < dev_priv->rps.min_delay);
- 
-+	vlv_update_rps_cur_delay(dev_priv);
-+
- 	DRM_DEBUG_DRIVER("GPU freq request from %d MHz (%u) to %d MHz (%u)\n",
- 			 vlv_gpu_freq(dev_priv->mem_freq,
- 				      dev_priv->rps.cur_delay),
-@@ -3091,27 +3123,12 @@ void valleyview_set_rps(struct drm_device *dev, u8 val)
- 
- 	vlv_punit_write(dev_priv, PUNIT_REG_GPU_FREQ_REQ, val);
- 
--	do {
--		pval = vlv_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS);
--		if (time_after(jiffies, timeout)) {
--			DRM_DEBUG_DRIVER("timed out waiting for Punit\n");
--			break;
--		}
--		udelay(10);
--	} while (pval & 1);
--
--	pval = vlv_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS);
--	if ((pval >> 8) != val)
--		DRM_DEBUG_DRIVER("Punit overrode GPU freq: %d MHz (%u) requested, but got %d Mhz (%u)\n",
--				 vlv_gpu_freq(dev_priv->mem_freq, val), val,
--				 vlv_gpu_freq(dev_priv->mem_freq, pval >> 8), pval >> 8);
--
- 	/* Make sure we continue to get interrupts
- 	 * until we hit the minimum or maximum frequencies.
- 	 */
- 	I915_WRITE(GEN6_RP_INTERRUPT_LIMITS, limits);
- 
--	dev_priv->rps.cur_delay = pval >> 8;
-+	dev_priv->rps.cur_delay = val;
- 
- 	trace_intel_gpu_freq_change(vlv_gpu_freq(dev_priv->mem_freq, val));
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0350-drm-i915-Make-the-rps-new_delay-comparison-more-read.patch b/patches.baytrail/0350-drm-i915-Make-the-rps-new_delay-comparison-more-read.patch
deleted file mode 100644
index e43c57a05ad1c..0000000000000
--- a/patches.baytrail/0350-drm-i915-Make-the-rps-new_delay-comparison-more-read.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 459fd310a684c9d5dd012421286b1594b7001c15 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Tue, 25 Jun 2013 19:21:05 +0300
-Subject: drm/i915: Make the rps new_delay comparison more readable
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Eliminate the weird inverted logic from the rps new_delay comparison.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit d8289c9e7bb34b136433a44937e3ebe3a7beea1c)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index a35fb3ce973b..8bf780c41c50 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -707,8 +707,8 @@ static void gen6_pm_rps_work(struct work_struct *work)
- 	/* sysfs frequency interfaces may have snuck in while servicing the
- 	 * interrupt
- 	 */
--	if (!(new_delay > dev_priv->rps.max_delay ||
--	      new_delay < dev_priv->rps.min_delay)) {
-+	if (new_delay >= dev_priv->rps.min_delay &&
-+	    new_delay <= dev_priv->rps.max_delay) {
- 		if (IS_VALLEYVIEW(dev_priv->dev))
- 			valleyview_set_rps(dev_priv->dev, new_delay);
- 		else
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0351-drm-i915-GEN6_RP_INTERRUPT_LIMITS-doesn-t-seem-to-ex.patch b/patches.baytrail/0351-drm-i915-GEN6_RP_INTERRUPT_LIMITS-doesn-t-seem-to-ex.patch
deleted file mode 100644
index 3949195f6b418..0000000000000
--- a/patches.baytrail/0351-drm-i915-GEN6_RP_INTERRUPT_LIMITS-doesn-t-seem-to-ex.patch
+++ /dev/null
@@ -1,50 +0,0 @@
-From 2337a349c0c9e4d013563851c7e8220e13094334 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Tue, 25 Jun 2013 19:21:06 +0300
-Subject: drm/i915: GEN6_RP_INTERRUPT_LIMITS doesn't seem to exist on VLV
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-I can't find GEN6_RP_INTERRUPT_LIMITS (0xA014) anywhere in VLV docs.
-Reading it always returns zero from what I can tell, and eliminating
-it doesn't seem to make any difference to the behaviour of the system.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 7a67092a25d854a4f5c53a6495d33e250896f9db)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 8 ++------
- 1 file changed, 2 insertions(+), 6 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index b3622a2f6c4f..5da417f9c8c7 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -3104,7 +3104,8 @@ static void vlv_update_rps_cur_delay(struct drm_i915_private *dev_priv)
- void valleyview_set_rps(struct drm_device *dev, u8 val)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
--	u32 limits = gen6_rps_limits(dev_priv, &val);
-+
-+	gen6_rps_limits(dev_priv, &val);
- 
- 	WARN_ON(!mutex_is_locked(&dev_priv->rps.hw_lock));
- 	WARN_ON(val > dev_priv->rps.max_delay);
-@@ -3123,11 +3124,6 @@ void valleyview_set_rps(struct drm_device *dev, u8 val)
- 
- 	vlv_punit_write(dev_priv, PUNIT_REG_GPU_FREQ_REQ, val);
- 
--	/* Make sure we continue to get interrupts
--	 * until we hit the minimum or maximum frequencies.
--	 */
--	I915_WRITE(GEN6_RP_INTERRUPT_LIMITS, limits);
--
- 	dev_priv->rps.cur_delay = val;
- 
- 	trace_intel_gpu_freq_change(vlv_gpu_freq(dev_priv->mem_freq, val));
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0352-drm-i915-Don-t-increase-the-GPU-frequency-from-the-d.patch b/patches.baytrail/0352-drm-i915-Don-t-increase-the-GPU-frequency-from-the-d.patch
deleted file mode 100644
index b844aa6f429e1..0000000000000
--- a/patches.baytrail/0352-drm-i915-Don-t-increase-the-GPU-frequency-from-the-d.patch
+++ /dev/null
@@ -1,40 +0,0 @@
-From e9ca918ae1d3fc2213b5d1de32aea0ae7a531e0a Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Tue, 25 Jun 2013 21:38:10 +0300
-Subject: drm/i915: Don't increase the GPU frequency from the delayed VLV rps
- timer
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-There's little point in increasing the GPU frequency from the delayed
-rps work on VLV. Now when the GPU is idle, the GPU frequency actually
-keeps dropping gradually until it hits the minimum, whereas previously
-it just ping-ponged constantly between RPe and RPe-1.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 6dc5848899a7ddbf1d02f104a97dde7ba0200693)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 5da417f9c8c7..f895d1508df8 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -3461,7 +3461,8 @@ static void vlv_rps_timer_work(struct work_struct *work)
- 	 * min freq available.
- 	 */
- 	mutex_lock(&dev_priv->rps.hw_lock);
--	valleyview_set_rps(dev_priv->dev, dev_priv->rps.rpe_delay);
-+	if (dev_priv->rps.cur_delay > dev_priv->rps.rpe_delay)
-+		valleyview_set_rps(dev_priv->dev, dev_priv->rps.rpe_delay);
- 	mutex_unlock(&dev_priv->rps.hw_lock);
- }
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0353-drm-i915-Jump-to-at-least-RPe-on-VLV-when-increasing.patch b/patches.baytrail/0353-drm-i915-Jump-to-at-least-RPe-on-VLV-when-increasing.patch
deleted file mode 100644
index dc413b462d3e9..0000000000000
--- a/patches.baytrail/0353-drm-i915-Jump-to-at-least-RPe-on-VLV-when-increasing.patch
+++ /dev/null
@@ -1,53 +0,0 @@
-From 49bdeee2b3077ddae5f394d23b1fcc30d3aeea26 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Tue, 25 Jun 2013 21:38:11 +0300
-Subject: drm/i915: Jump to at least RPe on VLV when increasing the GPU
- frequency
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-If the current GPU frquency is below RPe, and we're asked to increase
-it, just go directly to RPe. This should provide better performance
-faster than letting the frequency trickle up in response to the up
-threshold interrupts.
-
-For now just do it for VLV, since that matches quite closely how VLV
-used to operate when the rps delayed timer kept things at RPe always.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 7425034a3361145c109510892d1e5154af2cdfed)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 12 ++++++++++--
- 1 file changed, 10 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index 8bf780c41c50..5afa1d01c8a8 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -699,9 +699,17 @@ static void gen6_pm_rps_work(struct work_struct *work)
- 
- 	mutex_lock(&dev_priv->rps.hw_lock);
- 
--	if (pm_iir & GEN6_PM_RP_UP_THRESHOLD)
-+	if (pm_iir & GEN6_PM_RP_UP_THRESHOLD) {
- 		new_delay = dev_priv->rps.cur_delay + 1;
--	else
-+
-+		/*
-+		 * For better performance, jump directly
-+		 * to RPe if we're below it.
-+		 */
-+		if (IS_VALLEYVIEW(dev_priv->dev) &&
-+		    dev_priv->rps.cur_delay < dev_priv->rps.rpe_delay)
-+			new_delay = dev_priv->rps.rpe_delay;
-+	} else
- 		new_delay = dev_priv->rps.cur_delay - 1;
- 
- 	/* sysfs frequency interfaces may have snuck in while servicing the
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0354-drm-i915-Fix-VLV-PLL-LPF-coefficients-for-DAC.patch b/patches.baytrail/0354-drm-i915-Fix-VLV-PLL-LPF-coefficients-for-DAC.patch
deleted file mode 100644
index b8ee47a1f9cb5..0000000000000
--- a/patches.baytrail/0354-drm-i915-Fix-VLV-PLL-LPF-coefficients-for-DAC.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From 6156c74dbf521a7035984c63e178607597f64481 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Fri, 14 Jun 2013 14:02:52 +0300
-Subject: drm/i915: Fix VLV PLL LPF coefficients for DAC
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The current PLL settings produce a rather unstable picture when
-I hook up a VLV to my HP ZR24w display via a VGA cable.
-
-According to VLV2A0_DP_eDP_HDMI_DPIO_driver_vbios_notes_9, we should
-use the the same LPF coefficients for DAC as we do for HDMI and RBR DP.
-And indeed that seems to cure the shivers.
-
-v2: Add the name of the relevant document to the commit message
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 99750bd46f6ad3816fe2045a34fac432114c8196)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index e441a4b5904a..6901b1b466e6 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -4400,6 +4400,7 @@ static void vlv_update_pll(struct intel_crtc *crtc)
- 
- 	/* Set HBR and RBR LPF coefficients */
- 	if (crtc->config.port_clock == 162000 ||
-+	    intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_ANALOG) ||
- 	    intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_HDMI))
- 		vlv_dpio_write(dev_priv, DPIO_LFP_COEFF(pipe),
- 				 0x005f0021);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0355-drm-i915-s-LFP-LPF-in-DPIO-PLL-register-names.patch b/patches.baytrail/0355-drm-i915-s-LFP-LPF-in-DPIO-PLL-register-names.patch
deleted file mode 100644
index d4155d165995a..0000000000000
--- a/patches.baytrail/0355-drm-i915-s-LFP-LPF-in-DPIO-PLL-register-names.patch
+++ /dev/null
@@ -1,77 +0,0 @@
-From d991307dd0f44aa4d585938f82e368da8bb30a9a Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Fri, 14 Jun 2013 14:02:53 +0300
-Subject: drm/i915: s/LFP/LPF in DPIO PLL register names
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-LPF is short for "low pass filter".
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 4abb2c39811eb81a653461d5ed8c75c528cb2245)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_debugfs.c  | 8 ++++----
- drivers/gpu/drm/i915/i915_reg.h      | 6 +++---
- drivers/gpu/drm/i915/intel_display.c | 4 ++--
- 3 files changed, 9 insertions(+), 9 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
-index f72d5a3fdfba..04cf6c09710a 100644
---- a/drivers/gpu/drm/i915/i915_debugfs.c
-+++ b/drivers/gpu/drm/i915/i915_debugfs.c
-@@ -1862,10 +1862,10 @@ static int i915_dpio_info(struct seq_file *m, void *data)
- 	seq_printf(m, "DPIO_CORE_CLK_B: 0x%08x\n",
- 		   vlv_dpio_read(dev_priv, _DPIO_CORE_CLK_B));
- 
--	seq_printf(m, "DPIO_LFP_COEFF_A: 0x%08x\n",
--		   vlv_dpio_read(dev_priv, _DPIO_LFP_COEFF_A));
--	seq_printf(m, "DPIO_LFP_COEFF_B: 0x%08x\n",
--		   vlv_dpio_read(dev_priv, _DPIO_LFP_COEFF_B));
-+	seq_printf(m, "DPIO_LPF_COEFF_A: 0x%08x\n",
-+		   vlv_dpio_read(dev_priv, _DPIO_LPF_COEFF_A));
-+	seq_printf(m, "DPIO_LPF_COEFF_B: 0x%08x\n",
-+		   vlv_dpio_read(dev_priv, _DPIO_LPF_COEFF_B));
- 
- 	seq_printf(m, "DPIO_FASTCLK_DISABLE: 0x%08x\n",
- 		   vlv_dpio_read(dev_priv, DPIO_FASTCLK_DISABLE));
-diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
-index a2fe7efe0701..13dd0731dbd7 100644
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -448,9 +448,9 @@
- #define _DPIO_PLL_CML_B			0x806c
- #define DPIO_PLL_CML(pipe) _PIPE(pipe, _DPIO_PLL_CML_A, _DPIO_PLL_CML_B)
- 
--#define _DPIO_LFP_COEFF_A		0x8048
--#define _DPIO_LFP_COEFF_B		0x8068
--#define DPIO_LFP_COEFF(pipe) _PIPE(pipe, _DPIO_LFP_COEFF_A, _DPIO_LFP_COEFF_B)
-+#define _DPIO_LPF_COEFF_A		0x8048
-+#define _DPIO_LPF_COEFF_B		0x8068
-+#define DPIO_LPF_COEFF(pipe) _PIPE(pipe, _DPIO_LPF_COEFF_A, _DPIO_LPF_COEFF_B)
- 
- #define DPIO_CALIBRATION		0x80ac
- 
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 6901b1b466e6..7a4669183b6a 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -4402,10 +4402,10 @@ static void vlv_update_pll(struct intel_crtc *crtc)
- 	if (crtc->config.port_clock == 162000 ||
- 	    intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_ANALOG) ||
- 	    intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_HDMI))
--		vlv_dpio_write(dev_priv, DPIO_LFP_COEFF(pipe),
-+		vlv_dpio_write(dev_priv, DPIO_LPF_COEFF(pipe),
- 				 0x005f0021);
- 	else
--		vlv_dpio_write(dev_priv, DPIO_LFP_COEFF(pipe),
-+		vlv_dpio_write(dev_priv, DPIO_LPF_COEFF(pipe),
- 				 0x00d0000f);
- 
- 	if (intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_EDP) ||
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0356-Revert-drm-i915-Don-t-use-the-HDMI-port-color-range-.patch b/patches.baytrail/0356-Revert-drm-i915-Don-t-use-the-HDMI-port-color-range-.patch
deleted file mode 100644
index f71a6b1460563..0000000000000
--- a/patches.baytrail/0356-Revert-drm-i915-Don-t-use-the-HDMI-port-color-range-.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From 8969b2b8ca45f3a05ceb3dd76cf57afac4f4856d Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Tue, 25 Jun 2013 14:16:34 +0300
-Subject: Revert "drm/i915: Don't use the HDMI port color range bit on
- Valleyview"
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The PIPECONF color range bit doesn't appear to be effective, on HDMI
-outputs at least. The color range bit in the port register works though,
-so let's use it.
-
-I have not yet verified whether the PIPECONF bit works on DP outputs.
-
-This reverts commit 83a2af88f80ebf8104c9e083b786668b00f5b9ce.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 2af2c4909b7c8bc76beef25941b2218b3bd8e4fc)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_hdmi.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
-index bc12518a21b4..98df2a0c85bd 100644
---- a/drivers/gpu/drm/i915/intel_hdmi.c
-+++ b/drivers/gpu/drm/i915/intel_hdmi.c
-@@ -602,7 +602,7 @@ static void intel_hdmi_mode_set(struct drm_encoder *encoder,
- 	u32 hdmi_val;
- 
- 	hdmi_val = SDVO_ENCODING_HDMI;
--	if (!HAS_PCH_SPLIT(dev) && !IS_VALLEYVIEW(dev))
-+	if (!HAS_PCH_SPLIT(dev))
- 		hdmi_val |= intel_hdmi->color_range;
- 	if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
- 		hdmi_val |= SDVO_VSYNC_ACTIVE_HIGH;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0357-drm-i915-Fix-VLV-sprite-register-offsets.patch b/patches.baytrail/0357-drm-i915-Fix-VLV-sprite-register-offsets.patch
deleted file mode 100644
index 984272a5f679a..0000000000000
--- a/patches.baytrail/0357-drm-i915-Fix-VLV-sprite-register-offsets.patch
+++ /dev/null
@@ -1,85 +0,0 @@
-From cdd9252b0beeb0ae371922a6e65ded17eac7fd94 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Tue, 25 Jun 2013 14:16:35 +0300
-Subject: drm/i915: Fix VLV sprite register offsets
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-We forgot to add VLV_DISPLAY_BASE to the VLV sprite registers, which
-caused the sprites to not work at all.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 921c3b677bf6340cd92800fb99350532674dea29)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_reg.h |   48 ++++++++++++++++++++--------------------
- 1 file changed, 24 insertions(+), 24 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -3498,7 +3498,7 @@
- #define SPRGAMC(pipe) _PIPE(pipe, _SPRA_GAMC, _SPRB_GAMC)
- #define SPRSURFLIVE(pipe) _PIPE(pipe, _SPRA_SURFLIVE, _SPRB_SURFLIVE)
- 
--#define _SPACNTR		0x72180
-+#define _SPACNTR		(VLV_DISPLAY_BASE + 0x72180)
- #define   SP_ENABLE			(1<<31)
- #define   SP_GEAMMA_ENABLE		(1<<30)
- #define   SP_PIXFORMAT_MASK		(0xf<<26)
-@@ -3517,30 +3517,30 @@
- #define   SP_YUV_ORDER_YVYU		(2<<16)
- #define   SP_YUV_ORDER_VYUY		(3<<16)
- #define   SP_TILED			(1<<10)
--#define _SPALINOFF		0x72184
--#define _SPASTRIDE		0x72188
--#define _SPAPOS			0x7218c
--#define _SPASIZE		0x72190
--#define _SPAKEYMINVAL		0x72194
--#define _SPAKEYMSK		0x72198
--#define _SPASURF		0x7219c
--#define _SPAKEYMAXVAL		0x721a0
--#define _SPATILEOFF		0x721a4
--#define _SPACONSTALPHA		0x721a8
--#define _SPAGAMC		0x721f4
-+#define _SPALINOFF		(VLV_DISPLAY_BASE + 0x72184)
-+#define _SPASTRIDE		(VLV_DISPLAY_BASE + 0x72188)
-+#define _SPAPOS			(VLV_DISPLAY_BASE + 0x7218c)
-+#define _SPASIZE		(VLV_DISPLAY_BASE + 0x72190)
-+#define _SPAKEYMINVAL		(VLV_DISPLAY_BASE + 0x72194)
-+#define _SPAKEYMSK		(VLV_DISPLAY_BASE + 0x72198)
-+#define _SPASURF		(VLV_DISPLAY_BASE + 0x7219c)
-+#define _SPAKEYMAXVAL		(VLV_DISPLAY_BASE + 0x721a0)
-+#define _SPATILEOFF		(VLV_DISPLAY_BASE + 0x721a4)
-+#define _SPACONSTALPHA		(VLV_DISPLAY_BASE + 0x721a8)
-+#define _SPAGAMC		(VLV_DISPLAY_BASE + 0x721f4)
- 
--#define _SPBCNTR		0x72280
--#define _SPBLINOFF		0x72284
--#define _SPBSTRIDE		0x72288
--#define _SPBPOS			0x7228c
--#define _SPBSIZE		0x72290
--#define _SPBKEYMINVAL		0x72294
--#define _SPBKEYMSK		0x72298
--#define _SPBSURF		0x7229c
--#define _SPBKEYMAXVAL		0x722a0
--#define _SPBTILEOFF		0x722a4
--#define _SPBCONSTALPHA		0x722a8
--#define _SPBGAMC		0x722f4
-+#define _SPBCNTR		(VLV_DISPLAY_BASE + 0x72280)
-+#define _SPBLINOFF		(VLV_DISPLAY_BASE + 0x72284)
-+#define _SPBSTRIDE		(VLV_DISPLAY_BASE + 0x72288)
-+#define _SPBPOS			(VLV_DISPLAY_BASE + 0x7228c)
-+#define _SPBSIZE		(VLV_DISPLAY_BASE + 0x72290)
-+#define _SPBKEYMINVAL		(VLV_DISPLAY_BASE + 0x72294)
-+#define _SPBKEYMSK		(VLV_DISPLAY_BASE + 0x72298)
-+#define _SPBSURF		(VLV_DISPLAY_BASE + 0x7229c)
-+#define _SPBKEYMAXVAL		(VLV_DISPLAY_BASE + 0x722a0)
-+#define _SPBTILEOFF		(VLV_DISPLAY_BASE + 0x722a4)
-+#define _SPBCONSTALPHA		(VLV_DISPLAY_BASE + 0x722a8)
-+#define _SPBGAMC		(VLV_DISPLAY_BASE + 0x722f4)
- 
- #define SPCNTR(pipe, plane) _PIPE(pipe * 2 + plane, _SPACNTR, _SPBCNTR)
- #define SPLINOFF(pipe, plane) _PIPE(pipe * 2 + plane, _SPALINOFF, _SPBLINOFF)
diff --git a/patches.baytrail/0358-drm-i915-fix-locking-around-ironlake_enable-disable_.patch b/patches.baytrail/0358-drm-i915-fix-locking-around-ironlake_enable-disable_.patch
deleted file mode 100644
index f11ce58a41fba..0000000000000
--- a/patches.baytrail/0358-drm-i915-fix-locking-around-ironlake_enable-disable_.patch
+++ /dev/null
@@ -1,119 +0,0 @@
-From def345ed308deb5023a0801a6eec65a3e9782cb6 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 27 Jun 2013 13:44:58 +0200
-Subject: drm/i915: fix locking around ironlake_enable|disable_display_irq
-
-The haswell unclaimed register handling code forgot to take the
-spinlock. Since this is in the context of the non-rentrant interupt
-handler and we only have one interrupt handler it is sufficient to
-just grab the spinlock - we do not need to exclude any other
-interrupts from running on the same cpu.
-
-To prevent such gaffles in the future sprinkle assert_spin_locked over
-these functions. Unfornately this requires us to hold the spinlock in
-the ironlake postinstall hook where it is not strictly required:
-Currently that is run in single-threaded context and with userspace
-exlcuded from running concurrent ioctls. Add a comment explaining
-this.
-
-v2: ivb_can_enable_err_int also needs to be protected by the spinlock.
-To ensure this won't happen in the future again also sprinkle a
-spinlock assert in there.
-
-v3: Kill the 2nd call to ivb_can_enable_err_int I've accidentally left
-behind, spotted by Paulo.
-
-Cc: Paulo Zanoni <przanoni@gmail.com>
-Reviewed-by: Paulo Zanoni <przanoni@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 4bc9d4301573403c578e545b34dceac61891f39c)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 27 ++++++++++++++++++++++++---
- 1 file changed, 24 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index 5afa1d01c8a8..ecea1896b0cc 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -86,6 +86,8 @@ static void i915_hpd_irq_setup(struct drm_device *dev);
- static void
- ironlake_enable_display_irq(drm_i915_private_t *dev_priv, u32 mask)
- {
-+	assert_spin_locked(&dev_priv->irq_lock);
-+
- 	if ((dev_priv->irq_mask & mask) != 0) {
- 		dev_priv->irq_mask &= ~mask;
- 		I915_WRITE(DEIMR, dev_priv->irq_mask);
-@@ -96,6 +98,8 @@ ironlake_enable_display_irq(drm_i915_private_t *dev_priv, u32 mask)
- static void
- ironlake_disable_display_irq(drm_i915_private_t *dev_priv, u32 mask)
- {
-+	assert_spin_locked(&dev_priv->irq_lock);
-+
- 	if ((dev_priv->irq_mask & mask) != mask) {
- 		dev_priv->irq_mask |= mask;
- 		I915_WRITE(DEIMR, dev_priv->irq_mask);
-@@ -109,6 +113,8 @@ static bool ivb_can_enable_err_int(struct drm_device *dev)
- 	struct intel_crtc *crtc;
- 	enum pipe pipe;
- 
-+	assert_spin_locked(&dev_priv->irq_lock);
-+
- 	for_each_pipe(pipe) {
- 		crtc = to_intel_crtc(dev_priv->pipe_to_crtc_mapping[pipe]);
- 
-@@ -1217,8 +1223,11 @@ static irqreturn_t ivybridge_irq_handler(int irq, void *arg)
- 	/* On Haswell, also mask ERR_INT because we don't want to risk
- 	 * generating "unclaimed register" interrupts from inside the interrupt
- 	 * handler. */
--	if (IS_HASWELL(dev))
-+	if (IS_HASWELL(dev)) {
-+		spin_lock(&dev_priv->irq_lock);
- 		ironlake_disable_display_irq(dev_priv, DE_ERR_INT_IVB);
-+		spin_unlock(&dev_priv->irq_lock);
-+	}
- 
- 	gt_iir = I915_READ(GTIIR);
- 	if (gt_iir) {
-@@ -1271,8 +1280,12 @@ static irqreturn_t ivybridge_irq_handler(int irq, void *arg)
- 		ret = IRQ_HANDLED;
- 	}
- 
--	if (IS_HASWELL(dev) && ivb_can_enable_err_int(dev))
--		ironlake_enable_display_irq(dev_priv, DE_ERR_INT_IVB);
-+	if (IS_HASWELL(dev)) {
-+		spin_lock(&dev_priv->irq_lock);
-+		if (ivb_can_enable_err_int(dev))
-+			ironlake_enable_display_irq(dev_priv, DE_ERR_INT_IVB);
-+		spin_unlock(&dev_priv->irq_lock);
-+	}
- 
- 	I915_WRITE(DEIER, de_ier);
- 	POSTING_READ(DEIER);
-@@ -2743,6 +2756,8 @@ static void ibx_irq_postinstall(struct drm_device *dev)
- 
- static int ironlake_irq_postinstall(struct drm_device *dev)
- {
-+	unsigned long irqflags;
-+
- 	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
- 	/* enable kind of interrupts always enabled */
- 	u32 display_mask = DE_MASTER_IRQ_CONTROL | DE_GSE | DE_PCH_EVENT |
-@@ -2781,7 +2796,13 @@ static int ironlake_irq_postinstall(struct drm_device *dev)
- 		/* Clear & enable PCU event interrupts */
- 		I915_WRITE(DEIIR, DE_PCU_EVENT);
- 		I915_WRITE(DEIER, I915_READ(DEIER) | DE_PCU_EVENT);
-+
-+		/* spinlocking not required here for correctness since interrupt
-+		 * setup is guaranteed to run in single-threaded context. But we
-+		 * need it to make the assert_spin_locked happy. */
-+		spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
- 		ironlake_enable_display_irq(dev_priv, DE_PCU_EVENT);
-+		spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
- 	}
- 
- 	return 0;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0359-drm-i915-close-tiny-race-in-the-ilk-pcu-even-interru.patch b/patches.baytrail/0359-drm-i915-close-tiny-race-in-the-ilk-pcu-even-interru.patch
deleted file mode 100644
index a84c5a24183ed..0000000000000
--- a/patches.baytrail/0359-drm-i915-close-tiny-race-in-the-ilk-pcu-even-interru.patch
+++ /dev/null
@@ -1,62 +0,0 @@
-From 0ca8a9ab5a237f848ff1b83e6acc51fa4a24baa6 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 27 Jun 2013 13:44:59 +0200
-Subject: drm/i915: close tiny race in the ilk pcu even interrupt setup
-
-By the time we write DEIER in the postinstall hook the interrupt
-handler could run any time. And it does modify DEIER to handle
-interrupts.
-
-Hence the DEIER read-modify-write cycle for enabling the PCU event
-source is racy. Close this races the same way we handle vblank
-interrupts: Unconditionally enable the interrupt in the IER register,
-but conditionally mask it in IMR. The later poses no such race since
-the interrupt handler does not touch DEIMR.
-
-Also update the comment, the clearing has already happened
-unconditionally above.
-
-v2: Actually shove the updated comment into the right train^W commit,
-as spotted by Paulo.
-
-Cc: Paulo Zanoni <przanoni@gmail.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 6005ce42433df3f69de99d7e730383a6adb852ef)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 11 +++++------
- 1 file changed, 5 insertions(+), 6 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index ecea1896b0cc..27374f421354 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -2771,7 +2771,8 @@ static int ironlake_irq_postinstall(struct drm_device *dev)
- 	/* should always can generate irq */
- 	I915_WRITE(DEIIR, I915_READ(DEIIR));
- 	I915_WRITE(DEIMR, dev_priv->irq_mask);
--	I915_WRITE(DEIER, display_mask | DE_PIPEA_VBLANK | DE_PIPEB_VBLANK);
-+	I915_WRITE(DEIER, display_mask |
-+			  DE_PIPEA_VBLANK | DE_PIPEB_VBLANK | DE_PCU_EVENT);
- 	POSTING_READ(DEIER);
- 
- 	dev_priv->gt_irq_mask = ~0;
-@@ -2793,11 +2794,9 @@ static int ironlake_irq_postinstall(struct drm_device *dev)
- 	ibx_irq_postinstall(dev);
- 
- 	if (IS_IRONLAKE_M(dev)) {
--		/* Clear & enable PCU event interrupts */
--		I915_WRITE(DEIIR, DE_PCU_EVENT);
--		I915_WRITE(DEIER, I915_READ(DEIER) | DE_PCU_EVENT);
--
--		/* spinlocking not required here for correctness since interrupt
-+		/* Enable PCU event interrupts
-+		 *
-+		 * spinlocking not required here for correctness since interrupt
- 		 * setup is guaranteed to run in single-threaded context. But we
- 		 * need it to make the assert_spin_locked happy. */
- 		spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0360-drm-i915-s-hotplug_irq_storm_detect-intel_hpd_irq_ha.patch b/patches.baytrail/0360-drm-i915-s-hotplug_irq_storm_detect-intel_hpd_irq_ha.patch
deleted file mode 100644
index af389eac56017..0000000000000
--- a/patches.baytrail/0360-drm-i915-s-hotplug_irq_storm_detect-intel_hpd_irq_ha.patch
+++ /dev/null
@@ -1,91 +0,0 @@
-From 3a0b66ed6ee8c4cf0f2b66ea9db7e1f6ce6cd3b0 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 27 Jun 2013 17:52:11 +0200
-Subject: drm/i915: s/hotplug_irq_storm_detect/intel_hpd_irq_handler/
-
-The combination of Paulo's fifo underrun detection code and Egbert's
-hpd storm handling code unfortunately made the hpd storm handling code
-racy.
-
-To avoid duplicating tricky interrupt locking code over all platforms
-start with a bit of refactoring. This patch is the very first step
-since in the end the irq storm handling code will handle all hotplug
-logic (and so also encapsulate the locking nicely).
-
-v2: Rebase on top of the i965g/gm sdvo hpd fix.
-
-Cc: Egbert Eich <eich@suse.de>
-Reviewed-by: Egbert Eich <eich@suse.de>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 22062dbacf7ccc325c8b0ccc3fb90bf487be5c5c)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 16 ++++++++--------
- 1 file changed, 8 insertions(+), 8 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index 27374f421354..99bc9dc351e1 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -875,9 +875,9 @@ static void gen6_queue_rps_work(struct drm_i915_private *dev_priv,
- #define HPD_STORM_DETECT_PERIOD 1000
- #define HPD_STORM_THRESHOLD 5
- 
--static inline bool hotplug_irq_storm_detect(struct drm_device *dev,
--					    u32 hotplug_trigger,
--					    const u32 *hpd)
-+static inline bool intel_hpd_irq_handler(struct drm_device *dev,
-+					 u32 hotplug_trigger,
-+					 const u32 *hpd)
- {
- 	drm_i915_private_t *dev_priv = dev->dev_private;
- 	unsigned long irqflags;
-@@ -1018,7 +1018,7 @@ static irqreturn_t valleyview_irq_handler(int irq, void *arg)
- 			DRM_DEBUG_DRIVER("hotplug event received, stat 0x%08x\n",
- 					 hotplug_status);
- 			if (hotplug_trigger) {
--				if (hotplug_irq_storm_detect(dev, hotplug_trigger, hpd_status_i915))
-+				if (intel_hpd_irq_handler(dev, hotplug_trigger, hpd_status_i915))
- 					i915_hpd_irq_setup(dev);
- 				queue_work(dev_priv->wq,
- 					   &dev_priv->hotplug_work);
-@@ -1049,7 +1049,7 @@ static void ibx_irq_handler(struct drm_device *dev, u32 pch_iir)
- 	u32 hotplug_trigger = pch_iir & SDE_HOTPLUG_MASK;
- 
- 	if (hotplug_trigger) {
--		if (hotplug_irq_storm_detect(dev, hotplug_trigger, hpd_ibx))
-+		if (intel_hpd_irq_handler(dev, hotplug_trigger, hpd_ibx))
- 			ibx_hpd_irq_setup(dev);
- 		queue_work(dev_priv->wq, &dev_priv->hotplug_work);
- 	}
-@@ -1154,7 +1154,7 @@ static void cpt_irq_handler(struct drm_device *dev, u32 pch_iir)
- 	u32 hotplug_trigger = pch_iir & SDE_HOTPLUG_MASK_CPT;
- 
- 	if (hotplug_trigger) {
--		if (hotplug_irq_storm_detect(dev, hotplug_trigger, hpd_cpt))
-+		if (intel_hpd_irq_handler(dev, hotplug_trigger, hpd_cpt))
- 			ibx_hpd_irq_setup(dev);
- 		queue_work(dev_priv->wq, &dev_priv->hotplug_work);
- 	}
-@@ -3278,7 +3278,7 @@ static irqreturn_t i915_irq_handler(int irq, void *arg)
- 			DRM_DEBUG_DRIVER("hotplug event received, stat 0x%08x\n",
- 				  hotplug_status);
- 			if (hotplug_trigger) {
--				if (hotplug_irq_storm_detect(dev, hotplug_trigger, hpd_status_i915))
-+				if (intel_hpd_irq_handler(dev, hotplug_trigger, hpd_status_i915))
- 					i915_hpd_irq_setup(dev);
- 				queue_work(dev_priv->wq,
- 					   &dev_priv->hotplug_work);
-@@ -3519,7 +3519,7 @@ static irqreturn_t i965_irq_handler(int irq, void *arg)
- 			DRM_DEBUG_DRIVER("hotplug event received, stat 0x%08x\n",
- 				  hotplug_status);
- 			if (hotplug_trigger) {
--				if (hotplug_irq_storm_detect(dev, hotplug_trigger,
-+				if (intel_hpd_irq_handler(dev, hotplug_trigger,
- 							    IS_G4X(dev) ? hpd_status_gen4 : hpd_status_i915))
- 					i915_hpd_irq_setup(dev);
- 				queue_work(dev_priv->wq,
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0361-drm-i915-fold-the-hpd_irq_setup-call-into-intel_hpd_.patch b/patches.baytrail/0361-drm-i915-fold-the-hpd_irq_setup-call-into-intel_hpd_.patch
deleted file mode 100644
index 6b40da55a932f..0000000000000
--- a/patches.baytrail/0361-drm-i915-fold-the-hpd_irq_setup-call-into-intel_hpd_.patch
+++ /dev/null
@@ -1,125 +0,0 @@
-From 8c60a6cc8169c56149a4e80ac36a4f13692c108c Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 27 Jun 2013 17:52:12 +0200
-Subject: drm/i915: fold the hpd_irq_setup call into intel_hpd_irq_handler
-
-We already have a vfunc for this (and other parts of the hpd storm
-handling code already use it).
-
-v2: Rebase on top of the i965g/gm sdvo hpd fix.
-
-Cc: Egbert Eich <eich@suse.de>
-Reviewed-by: Egbert Eich <eich@suse.de>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 10a504de56f0451c828a9207e36c5610d5b0209a)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 29 +++++++++++------------------
- 1 file changed, 11 insertions(+), 18 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index 99bc9dc351e1..779b40102b83 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -79,9 +79,6 @@ static const u32 hpd_status_i915[] = { /* i915 and valleyview are the same */
- 	[HPD_PORT_D] = PORTD_HOTPLUG_INT_STATUS
- };
- 
--static void ibx_hpd_irq_setup(struct drm_device *dev);
--static void i915_hpd_irq_setup(struct drm_device *dev);
--
- /* For display hotplug interrupt */
- static void
- ironlake_enable_display_irq(drm_i915_private_t *dev_priv, u32 mask)
-@@ -875,14 +872,14 @@ static void gen6_queue_rps_work(struct drm_i915_private *dev_priv,
- #define HPD_STORM_DETECT_PERIOD 1000
- #define HPD_STORM_THRESHOLD 5
- 
--static inline bool intel_hpd_irq_handler(struct drm_device *dev,
-+static inline void intel_hpd_irq_handler(struct drm_device *dev,
- 					 u32 hotplug_trigger,
- 					 const u32 *hpd)
- {
- 	drm_i915_private_t *dev_priv = dev->dev_private;
- 	unsigned long irqflags;
- 	int i;
--	bool ret = false;
-+	bool storm_detected = false;
- 
- 	spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
- 
-@@ -902,7 +899,7 @@ static inline bool intel_hpd_irq_handler(struct drm_device *dev,
- 			dev_priv->hpd_stats[i].hpd_mark = HPD_MARK_DISABLED;
- 			dev_priv->hpd_event_bits &= ~(1 << i);
- 			DRM_DEBUG_KMS("HPD interrupt storm detected on PIN %d\n", i);
--			ret = true;
-+			storm_detected = true;
- 		} else {
- 			dev_priv->hpd_stats[i].hpd_cnt++;
- 		}
-@@ -910,7 +907,8 @@ static inline bool intel_hpd_irq_handler(struct drm_device *dev,
- 
- 	spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
- 
--	return ret;
-+	if (storm_detected)
-+		dev_priv->display.hpd_irq_setup(dev);
- }
- 
- static void gmbus_irq_handler(struct drm_device *dev)
-@@ -1018,8 +1016,7 @@ static irqreturn_t valleyview_irq_handler(int irq, void *arg)
- 			DRM_DEBUG_DRIVER("hotplug event received, stat 0x%08x\n",
- 					 hotplug_status);
- 			if (hotplug_trigger) {
--				if (intel_hpd_irq_handler(dev, hotplug_trigger, hpd_status_i915))
--					i915_hpd_irq_setup(dev);
-+				intel_hpd_irq_handler(dev, hotplug_trigger, hpd_status_i915);
- 				queue_work(dev_priv->wq,
- 					   &dev_priv->hotplug_work);
- 			}
-@@ -1049,8 +1046,7 @@ static void ibx_irq_handler(struct drm_device *dev, u32 pch_iir)
- 	u32 hotplug_trigger = pch_iir & SDE_HOTPLUG_MASK;
- 
- 	if (hotplug_trigger) {
--		if (intel_hpd_irq_handler(dev, hotplug_trigger, hpd_ibx))
--			ibx_hpd_irq_setup(dev);
-+		intel_hpd_irq_handler(dev, hotplug_trigger, hpd_ibx);
- 		queue_work(dev_priv->wq, &dev_priv->hotplug_work);
- 	}
- 	if (pch_iir & SDE_AUDIO_POWER_MASK) {
-@@ -1154,8 +1150,7 @@ static void cpt_irq_handler(struct drm_device *dev, u32 pch_iir)
- 	u32 hotplug_trigger = pch_iir & SDE_HOTPLUG_MASK_CPT;
- 
- 	if (hotplug_trigger) {
--		if (intel_hpd_irq_handler(dev, hotplug_trigger, hpd_cpt))
--			ibx_hpd_irq_setup(dev);
-+		intel_hpd_irq_handler(dev, hotplug_trigger, hpd_cpt);
- 		queue_work(dev_priv->wq, &dev_priv->hotplug_work);
- 	}
- 	if (pch_iir & SDE_AUDIO_POWER_MASK_CPT) {
-@@ -3278,8 +3273,7 @@ static irqreturn_t i915_irq_handler(int irq, void *arg)
- 			DRM_DEBUG_DRIVER("hotplug event received, stat 0x%08x\n",
- 				  hotplug_status);
- 			if (hotplug_trigger) {
--				if (intel_hpd_irq_handler(dev, hotplug_trigger, hpd_status_i915))
--					i915_hpd_irq_setup(dev);
-+				intel_hpd_irq_handler(dev, hotplug_trigger, hpd_status_i915);
- 				queue_work(dev_priv->wq,
- 					   &dev_priv->hotplug_work);
- 			}
-@@ -3519,9 +3513,8 @@ static irqreturn_t i965_irq_handler(int irq, void *arg)
- 			DRM_DEBUG_DRIVER("hotplug event received, stat 0x%08x\n",
- 				  hotplug_status);
- 			if (hotplug_trigger) {
--				if (intel_hpd_irq_handler(dev, hotplug_trigger,
--							    IS_G4X(dev) ? hpd_status_gen4 : hpd_status_i915))
--					i915_hpd_irq_setup(dev);
-+				intel_hpd_irq_handler(dev, hotplug_trigger,
-+						      IS_G4X(dev) ? hpd_status_gen4 : hpd_status_i915);
- 				queue_work(dev_priv->wq,
- 					   &dev_priv->hotplug_work);
- 			}
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0362-drm-i915-fold-the-queue_work-into-intel_hpd_irq_hand.patch b/patches.baytrail/0362-drm-i915-fold-the-queue_work-into-intel_hpd_irq_hand.patch
deleted file mode 100644
index d104fdee6d936..0000000000000
--- a/patches.baytrail/0362-drm-i915-fold-the-queue_work-into-intel_hpd_irq_hand.patch
+++ /dev/null
@@ -1,83 +0,0 @@
-From 027ca0f4232095bc6c5399d210b3addf36e03d9c Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 27 Jun 2013 17:52:13 +0200
-Subject: drm/i915: fold the queue_work into intel_hpd_irq_handler
-
-Everywhere the same.
-
-Note that this patch leaves unnecessary braces behind, but the next
-patch will kill those all anyway (including the if itself) so I've
-figured I can keep the diff a bit smaller.
-
-v2: Rebase on top of the i965g/gm sdvo hpd fix.
-
-Cc: Egbert Eich <eich@suse.de>
-Reviewed-by: Egbert Eich <eich@suse.de>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 5876fa0d9e9097d980a72152f4967a52b1adaaac)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 11 +++--------
- 1 file changed, 3 insertions(+), 8 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index 779b40102b83..cddfe417d878 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -909,6 +909,9 @@ static inline void intel_hpd_irq_handler(struct drm_device *dev,
- 
- 	if (storm_detected)
- 		dev_priv->display.hpd_irq_setup(dev);
-+
-+	queue_work(dev_priv->wq,
-+		   &dev_priv->hotplug_work);
- }
- 
- static void gmbus_irq_handler(struct drm_device *dev)
-@@ -1017,8 +1020,6 @@ static irqreturn_t valleyview_irq_handler(int irq, void *arg)
- 					 hotplug_status);
- 			if (hotplug_trigger) {
- 				intel_hpd_irq_handler(dev, hotplug_trigger, hpd_status_i915);
--				queue_work(dev_priv->wq,
--					   &dev_priv->hotplug_work);
- 			}
- 			I915_WRITE(PORT_HOTPLUG_STAT, hotplug_status);
- 			I915_READ(PORT_HOTPLUG_STAT);
-@@ -1047,7 +1048,6 @@ static void ibx_irq_handler(struct drm_device *dev, u32 pch_iir)
- 
- 	if (hotplug_trigger) {
- 		intel_hpd_irq_handler(dev, hotplug_trigger, hpd_ibx);
--		queue_work(dev_priv->wq, &dev_priv->hotplug_work);
- 	}
- 	if (pch_iir & SDE_AUDIO_POWER_MASK) {
- 		int port = ffs((pch_iir & SDE_AUDIO_POWER_MASK) >>
-@@ -1151,7 +1151,6 @@ static void cpt_irq_handler(struct drm_device *dev, u32 pch_iir)
- 
- 	if (hotplug_trigger) {
- 		intel_hpd_irq_handler(dev, hotplug_trigger, hpd_cpt);
--		queue_work(dev_priv->wq, &dev_priv->hotplug_work);
- 	}
- 	if (pch_iir & SDE_AUDIO_POWER_MASK_CPT) {
- 		int port = ffs((pch_iir & SDE_AUDIO_POWER_MASK_CPT) >>
-@@ -3274,8 +3273,6 @@ static irqreturn_t i915_irq_handler(int irq, void *arg)
- 				  hotplug_status);
- 			if (hotplug_trigger) {
- 				intel_hpd_irq_handler(dev, hotplug_trigger, hpd_status_i915);
--				queue_work(dev_priv->wq,
--					   &dev_priv->hotplug_work);
- 			}
- 			I915_WRITE(PORT_HOTPLUG_STAT, hotplug_status);
- 			POSTING_READ(PORT_HOTPLUG_STAT);
-@@ -3515,8 +3512,6 @@ static irqreturn_t i965_irq_handler(int irq, void *arg)
- 			if (hotplug_trigger) {
- 				intel_hpd_irq_handler(dev, hotplug_trigger,
- 						      IS_G4X(dev) ? hpd_status_gen4 : hpd_status_i915);
--				queue_work(dev_priv->wq,
--					   &dev_priv->hotplug_work);
- 			}
- 			I915_WRITE(PORT_HOTPLUG_STAT, hotplug_status);
- 			I915_READ(PORT_HOTPLUG_STAT);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0363-drm-i915-fold-the-no-irq-check-into-intel_hpd_irq_ha.patch b/patches.baytrail/0363-drm-i915-fold-the-no-irq-check-into-intel_hpd_irq_ha.patch
deleted file mode 100644
index e80dcfc43c9dd..0000000000000
--- a/patches.baytrail/0363-drm-i915-fold-the-no-irq-check-into-intel_hpd_irq_ha.patch
+++ /dev/null
@@ -1,103 +0,0 @@
-From 2708d4972a34602bfbf3b3ebf480a3880b693f41 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 27 Jun 2013 17:52:14 +0200
-Subject: drm/i915: fold the no-irq check into intel_hpd_irq_handler
-
-The usual pattern for our sub-function irq_handlers is that they check
-for the no-irq case themselves. This results in more streamlined code
-in the upper irq handlers.
-
-v2: Rebase on top of the i965g/gm sdvo hpd fix.
-
-Cc: Egbert Eich <eich@suse.de>
-Reviewed-by: Egbert Eich <eich@suse.de>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 91d131d21e4916f84e5957cc25bea6dd355dfe77)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 33 +++++++++++++++++----------------
- 1 file changed, 17 insertions(+), 16 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index cddfe417d878..2221158bebc5 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -881,6 +881,9 @@ static inline void intel_hpd_irq_handler(struct drm_device *dev,
- 	int i;
- 	bool storm_detected = false;
- 
-+	if (!hotplug_trigger)
-+		return;
-+
- 	spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
- 
- 	for (i = 1; i < HPD_NUM_PINS; i++) {
-@@ -1018,9 +1021,9 @@ static irqreturn_t valleyview_irq_handler(int irq, void *arg)
- 
- 			DRM_DEBUG_DRIVER("hotplug event received, stat 0x%08x\n",
- 					 hotplug_status);
--			if (hotplug_trigger) {
--				intel_hpd_irq_handler(dev, hotplug_trigger, hpd_status_i915);
--			}
-+
-+			intel_hpd_irq_handler(dev, hotplug_trigger, hpd_status_i915);
-+
- 			I915_WRITE(PORT_HOTPLUG_STAT, hotplug_status);
- 			I915_READ(PORT_HOTPLUG_STAT);
- 		}
-@@ -1046,9 +1049,8 @@ static void ibx_irq_handler(struct drm_device *dev, u32 pch_iir)
- 	int pipe;
- 	u32 hotplug_trigger = pch_iir & SDE_HOTPLUG_MASK;
- 
--	if (hotplug_trigger) {
--		intel_hpd_irq_handler(dev, hotplug_trigger, hpd_ibx);
--	}
-+	intel_hpd_irq_handler(dev, hotplug_trigger, hpd_ibx);
-+
- 	if (pch_iir & SDE_AUDIO_POWER_MASK) {
- 		int port = ffs((pch_iir & SDE_AUDIO_POWER_MASK) >>
- 			       SDE_AUDIO_POWER_SHIFT);
-@@ -1149,9 +1151,8 @@ static void cpt_irq_handler(struct drm_device *dev, u32 pch_iir)
- 	int pipe;
- 	u32 hotplug_trigger = pch_iir & SDE_HOTPLUG_MASK_CPT;
- 
--	if (hotplug_trigger) {
--		intel_hpd_irq_handler(dev, hotplug_trigger, hpd_cpt);
--	}
-+	intel_hpd_irq_handler(dev, hotplug_trigger, hpd_cpt);
-+
- 	if (pch_iir & SDE_AUDIO_POWER_MASK_CPT) {
- 		int port = ffs((pch_iir & SDE_AUDIO_POWER_MASK_CPT) >>
- 			       SDE_AUDIO_POWER_SHIFT_CPT);
-@@ -3271,9 +3272,9 @@ static irqreturn_t i915_irq_handler(int irq, void *arg)
- 
- 			DRM_DEBUG_DRIVER("hotplug event received, stat 0x%08x\n",
- 				  hotplug_status);
--			if (hotplug_trigger) {
--				intel_hpd_irq_handler(dev, hotplug_trigger, hpd_status_i915);
--			}
-+
-+			intel_hpd_irq_handler(dev, hotplug_trigger, hpd_status_i915);
-+
- 			I915_WRITE(PORT_HOTPLUG_STAT, hotplug_status);
- 			POSTING_READ(PORT_HOTPLUG_STAT);
- 		}
-@@ -3509,10 +3510,10 @@ static irqreturn_t i965_irq_handler(int irq, void *arg)
- 
- 			DRM_DEBUG_DRIVER("hotplug event received, stat 0x%08x\n",
- 				  hotplug_status);
--			if (hotplug_trigger) {
--				intel_hpd_irq_handler(dev, hotplug_trigger,
--						      IS_G4X(dev) ? hpd_status_gen4 : hpd_status_i915);
--			}
-+
-+			intel_hpd_irq_handler(dev, hotplug_trigger,
-+					      IS_G4X(dev) ? hpd_status_gen4 : hpd_status_i915);
-+
- 			I915_WRITE(PORT_HOTPLUG_STAT, hotplug_status);
- 			I915_READ(PORT_HOTPLUG_STAT);
- 		}
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0364-drm-i915-fix-hpd-interrupt-register-locking.patch b/patches.baytrail/0364-drm-i915-fix-hpd-interrupt-register-locking.patch
deleted file mode 100644
index fdb5317736f36..0000000000000
--- a/patches.baytrail/0364-drm-i915-fix-hpd-interrupt-register-locking.patch
+++ /dev/null
@@ -1,100 +0,0 @@
-From df88d00a0e7a7654a8c808ca82f85fb80a5dbb4c Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 27 Jun 2013 17:52:15 +0200
-Subject: drm/i915: fix hpd interrupt register locking
-
-Our interrupt handler (in hardirq context) could race with the timer
-(in softirq context), hence we need to hold the spinlock around the
-call to ->hdp_irq_setup in intel_hpd_irq_handler, too.
-
-But as an optimization (and more so to clarify things) we don't need
-to do the irqsave/restore dance in the hardirq context.
-
-Note also that on ilk+ the race isn't just against the hotplug
-reenable timer, but also against the fifo underrun reporting. That one
-also modifies the SDEIMR register (again protected by the same
-dev_priv->irq_lock).
-
-To lock things down again sprinkle a assert_spin_locked. But exclude
-the functions touching SDEIMR for now, I want to extract them all into
-a new helper function (like we do already for pipestate, display
-interrupts and all the various gt interrupts).
-
-v2: Add the missing 't' Egbert spotted in a comment.
-
-v3: Actually fix the right misspelled comment (Paulo).
-
-Cc: Egbert Eich <eich@suse.de>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit b5ea2d5681522f1b8ef886b5ac039903bf1d39fe)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 15 ++++++++++-----
- 1 file changed, 10 insertions(+), 5 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index 2221158bebc5..7748dce240d8 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -877,15 +877,13 @@ static inline void intel_hpd_irq_handler(struct drm_device *dev,
- 					 const u32 *hpd)
- {
- 	drm_i915_private_t *dev_priv = dev->dev_private;
--	unsigned long irqflags;
- 	int i;
- 	bool storm_detected = false;
- 
- 	if (!hotplug_trigger)
- 		return;
- 
--	spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
--
-+	spin_lock(&dev_priv->irq_lock);
- 	for (i = 1; i < HPD_NUM_PINS; i++) {
- 
- 		if (!(hpd[i] & hotplug_trigger) ||
-@@ -908,10 +906,9 @@ static inline void intel_hpd_irq_handler(struct drm_device *dev,
- 		}
- 	}
- 
--	spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
--
- 	if (storm_detected)
- 		dev_priv->display.hpd_irq_setup(dev);
-+	spin_unlock(&dev_priv->irq_lock);
- 
- 	queue_work(dev_priv->wq,
- 		   &dev_priv->hotplug_work);
-@@ -3426,6 +3423,8 @@ static void i915_hpd_irq_setup(struct drm_device *dev)
- 	struct intel_encoder *intel_encoder;
- 	u32 hotplug_en;
- 
-+	assert_spin_locked(&dev_priv->irq_lock);
-+
- 	if (I915_HAS_HOTPLUG(dev)) {
- 		hotplug_en = I915_READ(PORT_HOTPLUG_EN);
- 		hotplug_en &= ~HOTPLUG_INT_EN_MASK;
-@@ -3709,6 +3708,7 @@ void intel_hpd_init(struct drm_device *dev)
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct drm_mode_config *mode_config = &dev->mode_config;
- 	struct drm_connector *connector;
-+	unsigned long irqflags;
- 	int i;
- 
- 	for (i = 1; i < HPD_NUM_PINS; i++) {
-@@ -3721,6 +3721,11 @@ void intel_hpd_init(struct drm_device *dev)
- 		if (!connector->polled && I915_HAS_HOTPLUG(dev) && intel_connector->encoder->hpd_pin > HPD_NONE)
- 			connector->polled = DRM_CONNECTOR_POLL_HPD;
- 	}
-+
-+	/* Interrupt setup is already guaranteed to be single-threaded, this is
-+	 * just to make the assert_spin_locked checks happy. */
-+	spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
- 	if (dev_priv->display.hpd_irq_setup)
- 		dev_priv->display.hpd_irq_setup(dev);
-+	spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0365-drm-i915-correct-intel_dp_get_config-function-for-De.patch b/patches.baytrail/0365-drm-i915-correct-intel_dp_get_config-function-for-De.patch
deleted file mode 100644
index bf775cd00ac90..0000000000000
--- a/patches.baytrail/0365-drm-i915-correct-intel_dp_get_config-function-for-De.patch
+++ /dev/null
@@ -1,93 +0,0 @@
-From 070034ad42450056294bc77cb7aa210ef8ef497d Mon Sep 17 00:00:00 2001
-From: Xiong Zhang <xiong.y.zhang@intel.com>
-Date: Fri, 28 Jun 2013 12:59:06 +0800
-Subject: drm/i915: correct intel_dp_get_config() function for DevCPT
-
-On DevCPT, the control register for Transcoder DP Sync Polarity is
-TRANS_DP_CTL, not DP_CTL.
-Without this patch, Many call trace occur on CPT machine with DP monitor.
-The call trace is like: *ERROR* mismatch in adjusted_mode.flags(expected X,found X)
-
-v2: use intel-crtc to simple patch, suggested by Daniel.
-
-Signed-off-by: Xiong Zhang <xiong.y.zhang@intel.com>
-[danvet: Extend the encoder->get_config comment to specify that we now
-also depend upon intel_encoder->base.crtc being correct. Also bikeshed
-s/intel_crtc/crtc/.]
-Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=65287
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 63000ef656190b65a8ae4d00acd7f22b6d92415d)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_dp.c  | 35 +++++++++++++++++++++++++----------
- drivers/gpu/drm/i915/intel_drv.h |  3 ++-
- 2 files changed, 27 insertions(+), 11 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
-index 0f7e9094098d..47713d6aa4a5 100644
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -1335,20 +1335,35 @@ static void intel_dp_get_config(struct intel_encoder *encoder,
- 				struct intel_crtc_config *pipe_config)
- {
- 	struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
--	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
- 	u32 tmp, flags = 0;
-+	struct drm_device *dev = encoder->base.dev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	enum port port = dp_to_dig_port(intel_dp)->port;
-+	struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
- 
--	tmp = I915_READ(intel_dp->output_reg);
-+	if ((port == PORT_A) || !HAS_PCH_CPT(dev)) {
-+		tmp = I915_READ(intel_dp->output_reg);
-+		if (tmp & DP_SYNC_HS_HIGH)
-+			flags |= DRM_MODE_FLAG_PHSYNC;
-+		else
-+			flags |= DRM_MODE_FLAG_NHSYNC;
- 
--	if (tmp & DP_SYNC_HS_HIGH)
--		flags |= DRM_MODE_FLAG_PHSYNC;
--	else
--		flags |= DRM_MODE_FLAG_NHSYNC;
-+		if (tmp & DP_SYNC_VS_HIGH)
-+			flags |= DRM_MODE_FLAG_PVSYNC;
-+		else
-+			flags |= DRM_MODE_FLAG_NVSYNC;
-+	} else {
-+		tmp = I915_READ(TRANS_DP_CTL(crtc->pipe));
-+		if (tmp & TRANS_DP_HSYNC_ACTIVE_HIGH)
-+			flags |= DRM_MODE_FLAG_PHSYNC;
-+		else
-+			flags |= DRM_MODE_FLAG_NHSYNC;
- 
--	if (tmp & DP_SYNC_VS_HIGH)
--		flags |= DRM_MODE_FLAG_PVSYNC;
--	else
--		flags |= DRM_MODE_FLAG_NVSYNC;
-+		if (tmp & TRANS_DP_VSYNC_ACTIVE_HIGH)
-+			flags |= DRM_MODE_FLAG_PVSYNC;
-+		else
-+			flags |= DRM_MODE_FLAG_NVSYNC;
-+	}
- 
- 	pipe_config->adjusted_mode.flags |= flags;
- }
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index c7b93c61e467..b7d6e09456ce 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -141,7 +141,8 @@ struct intel_encoder {
- 	bool (*get_hw_state)(struct intel_encoder *, enum pipe *pipe);
- 	/* Reconstructs the equivalent mode flags for the current hardware
- 	 * state. This must be called _after_ display->get_pipe_config has
--	 * pre-filled the pipe config. */
-+	 * pre-filled the pipe config. Note that intel_encoder->base.crtc must
-+	 * be set correctly before calling this function. */
- 	void (*get_config)(struct intel_encoder *,
- 			   struct intel_crtc_config *pipe_config);
- 	int crtc_mask;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0366-drm-i915-Refactor-the-wait_rendering-completion-into.patch b/patches.baytrail/0366-drm-i915-Refactor-the-wait_rendering-completion-into.patch
deleted file mode 100644
index 2659b7c4f300c..0000000000000
--- a/patches.baytrail/0366-drm-i915-Refactor-the-wait_rendering-completion-into.patch
+++ /dev/null
@@ -1,102 +0,0 @@
-From 8ede90d39f6fd423b9e3153e05a59e05fb1eb5e5 Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Sat, 29 Jun 2013 22:05:26 +0100
-Subject: drm/i915: Refactor the wait_rendering completion into a common
- routine
-
-Harmonise the completion logic between the non-blocking and normal
-wait_rendering paths, and move that logic into a common function.
-
-In the process, we note that the last_write_seqno is by definition the
-earlier of the two read/write seqnos and so all successful waits will
-have passed the last_write_seqno. Therefore we can unconditionally clear
-the write seqno and its domains in the completion logic.
-
-v2: Add the missing ring parameter, because sometimes it is good to have
-things compile.
-
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit d26e3af842023603747f1566caff5f471508bbd4)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem.c | 48 ++++++++++++++++++++---------------------
- 1 file changed, 23 insertions(+), 25 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index 5fcee7608228..2f58889ec120 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -1087,6 +1087,25 @@ i915_wait_seqno(struct intel_ring_buffer *ring, uint32_t seqno)
- 			    interruptible, NULL);
- }
- 
-+static int
-+i915_gem_object_wait_rendering__tail(struct drm_i915_gem_object *obj,
-+				     struct intel_ring_buffer *ring)
-+{
-+	i915_gem_retire_requests_ring(ring);
-+
-+	/* Manually manage the write flush as we may have not yet
-+	 * retired the buffer.
-+	 *
-+	 * Note that the last_write_seqno is always the earlier of
-+	 * the two (read/write) seqno, so if we haved successfully waited,
-+	 * we know we have passed the last write.
-+	 */
-+	obj->last_write_seqno = 0;
-+	obj->base.write_domain &= ~I915_GEM_GPU_DOMAINS;
-+
-+	return 0;
-+}
-+
- /**
-  * Ensures that all rendering to the object has completed and the object is
-  * safe to unbind from the GTT or access from the CPU.
-@@ -1107,18 +1126,7 @@ i915_gem_object_wait_rendering(struct drm_i915_gem_object *obj,
- 	if (ret)
- 		return ret;
- 
--	i915_gem_retire_requests_ring(ring);
--
--	/* Manually manage the write flush as we may have not yet
--	 * retired the buffer.
--	 */
--	if (obj->last_write_seqno &&
--	    i915_seqno_passed(seqno, obj->last_write_seqno)) {
--		obj->last_write_seqno = 0;
--		obj->base.write_domain &= ~I915_GEM_GPU_DOMAINS;
--	}
--
--	return 0;
-+	return i915_gem_object_wait_rendering__tail(obj, ring);
- }
- 
- /* A nonblocking variant of the above wait. This is a highly dangerous routine
-@@ -1154,20 +1162,10 @@ i915_gem_object_wait_rendering__nonblocking(struct drm_i915_gem_object *obj,
- 	mutex_unlock(&dev->struct_mutex);
- 	ret = __wait_seqno(ring, seqno, reset_counter, true, NULL);
- 	mutex_lock(&dev->struct_mutex);
-+	if (ret)
-+		return ret;
- 
--	i915_gem_retire_requests_ring(ring);
--
--	/* Manually manage the write flush as we may have not yet
--	 * retired the buffer.
--	 */
--	if (ret == 0 &&
--	    obj->last_write_seqno &&
--	    i915_seqno_passed(seqno, obj->last_write_seqno)) {
--		obj->last_write_seqno = 0;
--		obj->base.write_domain &= ~I915_GEM_GPU_DOMAINS;
--	}
--
--	return ret;
-+	return i915_gem_object_wait_rendering__tail(obj, ring);
- }
- 
- /**
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0367-drm-i915-Break-up-the-large-vsnprintf-in-print_error.patch b/patches.baytrail/0367-drm-i915-Break-up-the-large-vsnprintf-in-print_error.patch
deleted file mode 100644
index 6d4aec397ad29..0000000000000
--- a/patches.baytrail/0367-drm-i915-Break-up-the-large-vsnprintf-in-print_error.patch
+++ /dev/null
@@ -1,196 +0,0 @@
-From a41d52f08034e78e3ba036142d6ded37577f6158 Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Sat, 29 Jun 2013 23:26:50 +0100
-Subject: drm/i915: Break up the large vsnprintf() in print_error_buffers()
-
-So it appears that I have encountered some bogosity when trying to call
-i915_error_printf() with many arguments from print_error_buffers(). The
-symptom is that the vsnprintf parser tries to interpret an integer arg
-as a character string, the resulting OOPS indicating stack corruption.
-Replacing the single call with its 13 format specifiers and arguments
-with multiple calls to i915_error_printf() worked fine. This patch goes
-one step further and introduced i915_error_puts() to pass the strings
-simply.
-
-It may not fix the root cause, but it does prevent my box from dying and
-I think helps make print_error_buffers() more friendly.
-
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=66077
-Cc: Mika Kuoppala <mika.kuoppala@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit baf27f9b17bf2f369f3865e38c41d2163e8d815d)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_debugfs.c | 109 ++++++++++++++++++++++++++----------
- 1 file changed, 79 insertions(+), 30 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
-index 04cf6c09710a..47d6c748057e 100644
---- a/drivers/gpu/drm/i915/i915_debugfs.c
-+++ b/drivers/gpu/drm/i915/i915_debugfs.c
-@@ -647,41 +647,44 @@ static const char *purgeable_flag(int purgeable)
- 	return purgeable ? " purgeable" : "";
- }
- 
--static void i915_error_vprintf(struct drm_i915_error_state_buf *e,
--			       const char *f, va_list args)
-+static bool __i915_error_ok(struct drm_i915_error_state_buf *e)
- {
--	unsigned len;
- 
- 	if (!e->err && WARN(e->bytes > (e->size - 1), "overflow")) {
- 		e->err = -ENOSPC;
--		return;
-+		return false;
- 	}
- 
- 	if (e->bytes == e->size - 1 || e->err)
--		return;
-+		return false;
- 
--	/* Seek the first printf which is hits start position */
--	if (e->pos < e->start) {
--		len = vsnprintf(NULL, 0, f, args);
--		if (e->pos + len <= e->start) {
--			e->pos += len;
--			return;
--		}
-+	return true;
-+}
- 
--		/* First vsnprintf needs to fit in full for memmove*/
--		if (len >= e->size) {
--			e->err = -EIO;
--			return;
--		}
-+static bool __i915_error_seek(struct drm_i915_error_state_buf *e,
-+			      unsigned len)
-+{
-+	if (e->pos + len <= e->start) {
-+		e->pos += len;
-+		return false;
- 	}
- 
--	len = vsnprintf(e->buf + e->bytes, e->size - e->bytes, f, args);
--	if (len >= e->size - e->bytes)
--		len = e->size - e->bytes - 1;
-+	/* First vsnprintf needs to fit in its entirety for memmove */
-+	if (len >= e->size) {
-+		e->err = -EIO;
-+		return false;
-+	}
- 
-+	return true;
-+}
-+
-+static void __i915_error_advance(struct drm_i915_error_state_buf *e,
-+				 unsigned len)
-+{
- 	/* If this is first printf in this window, adjust it so that
- 	 * start position matches start of the buffer
- 	 */
-+
- 	if (e->pos < e->start) {
- 		const size_t off = e->start - e->pos;
- 
-@@ -701,6 +704,51 @@ static void i915_error_vprintf(struct drm_i915_error_state_buf *e,
- 	e->pos += len;
- }
- 
-+static void i915_error_vprintf(struct drm_i915_error_state_buf *e,
-+			       const char *f, va_list args)
-+{
-+	unsigned len;
-+
-+	if (!__i915_error_ok(e))
-+		return;
-+
-+	/* Seek the first printf which is hits start position */
-+	if (e->pos < e->start) {
-+		len = vsnprintf(NULL, 0, f, args);
-+		if (!__i915_error_seek(e, len))
-+			return;
-+	}
-+
-+	len = vsnprintf(e->buf + e->bytes, e->size - e->bytes, f, args);
-+	if (len >= e->size - e->bytes)
-+		len = e->size - e->bytes - 1;
-+
-+	__i915_error_advance(e, len);
-+}
-+
-+static void i915_error_puts(struct drm_i915_error_state_buf *e,
-+			    const char *str)
-+{
-+	unsigned len;
-+
-+	if (!__i915_error_ok(e))
-+		return;
-+
-+	len = strlen(str);
-+
-+	/* Seek the first printf which is hits start position */
-+	if (e->pos < e->start) {
-+		if (!__i915_error_seek(e, len))
-+			return;
-+	}
-+
-+	if (len >= e->size - e->bytes)
-+		len = e->size - e->bytes - 1;
-+	memcpy(e->buf + e->bytes, str, len);
-+
-+	__i915_error_advance(e, len);
-+}
-+
- void i915_error_printf(struct drm_i915_error_state_buf *e, const char *f, ...)
- {
- 	va_list args;
-@@ -711,6 +759,7 @@ void i915_error_printf(struct drm_i915_error_state_buf *e, const char *f, ...)
- }
- 
- #define err_printf(e, ...) i915_error_printf(e, __VA_ARGS__)
-+#define err_puts(e, s) i915_error_puts(e, s)
- 
- static void print_error_buffers(struct drm_i915_error_state_buf *m,
- 				const char *name,
-@@ -720,26 +769,26 @@ static void print_error_buffers(struct drm_i915_error_state_buf *m,
- 	err_printf(m, "%s [%d]:\n", name, count);
- 
- 	while (count--) {
--		err_printf(m, "  %08x %8u %02x %02x %x %x%s%s%s%s%s%s%s",
-+		err_printf(m, "  %08x %8u %02x %02x %x %x",
- 			   err->gtt_offset,
- 			   err->size,
- 			   err->read_domains,
- 			   err->write_domain,
--			   err->rseqno, err->wseqno,
--			   pin_flag(err->pinned),
--			   tiling_flag(err->tiling),
--			   dirty_flag(err->dirty),
--			   purgeable_flag(err->purgeable),
--			   err->ring != -1 ? " " : "",
--			   ring_str(err->ring),
--			   cache_level_str(err->cache_level));
-+			   err->rseqno, err->wseqno);
-+		err_puts(m, pin_flag(err->pinned));
-+		err_puts(m, tiling_flag(err->tiling));
-+		err_puts(m, dirty_flag(err->dirty));
-+		err_puts(m, purgeable_flag(err->purgeable));
-+		err_puts(m, err->ring != -1 ? " " : "");
-+		err_puts(m, ring_str(err->ring));
-+		err_puts(m, cache_level_str(err->cache_level));
- 
- 		if (err->name)
- 			err_printf(m, " (name: %d)", err->name);
- 		if (err->fence_reg != I915_FENCE_REG_NONE)
- 			err_printf(m, " (fence: %d)", err->fence_reg);
- 
--		err_printf(m, "\n");
-+		err_puts(m, "\n");
- 		err++;
- 	}
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0368-drm-i915-Don-t-try-to-tear-down-the-stolen-drm_mm-if.patch b/patches.baytrail/0368-drm-i915-Don-t-try-to-tear-down-the-stolen-drm_mm-if.patch
deleted file mode 100644
index d413d84a7e81a..0000000000000
--- a/patches.baytrail/0368-drm-i915-Don-t-try-to-tear-down-the-stolen-drm_mm-if.patch
+++ /dev/null
@@ -1,80 +0,0 @@
-From b98193c5349454f5a543d3701546f07e3af88e0f Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Tue, 2 Jul 2013 10:48:31 +0200
-Subject: drm/i915: Don't try to tear down the stolen drm_mm if it's not there
-
-Every other place properly checks whether we've managed to set
-up the stolen allocator at boot-up properly, with the exception
-of the cleanup code. Which results in an ugly
-
-*ERROR* Memory manager not clean. Delaying takedown
-
-at module unload time since the drm_mm isn't initialized at all.
-
-v2: While at it check whether the stolen drm_mm is initialized instead
-of the more obscure stolen_base == 0 check.
-
-v3: Fix up the logic. Also we need to keep the stolen_base check in
-i915_gem_object_create_stolen_for_preallocated since that can be
-called before stolen memory is fully set up. Spotted by Chris Wilson.
-
-v4: Readd the conversion in i915_gem_object_create_stolen_for_preallocated,
-the check is for the dev_priv->mm.gtt_space drm_mm, the stolen
-allocatot must already be initialized when calling that function (if
-we indeed have stolen memory).
-
-Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=65953
-Cc: Chris Wilson <chris@chris-wilson.co.uk>
-Tested-by: lu hua <huax.lu@intel.com> (v3)
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 446f8d81ca2d9cefb614e87f2fabcc996a9e4e7e)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem_stolen.c | 9 ++++++---
- 1 file changed, 6 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem_stolen.c b/drivers/gpu/drm/i915/i915_gem_stolen.c
-index f713294618fe..982d4732cecf 100644
---- a/drivers/gpu/drm/i915/i915_gem_stolen.c
-+++ b/drivers/gpu/drm/i915/i915_gem_stolen.c
-@@ -147,7 +147,7 @@ int i915_gem_stolen_setup_compression(struct drm_device *dev, int size)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 
--	if (dev_priv->mm.stolen_base == 0)
-+	if (!drm_mm_initialized(&dev_priv->mm.stolen))
- 		return -ENODEV;
- 
- 	if (size < dev_priv->cfb_size)
-@@ -179,6 +179,9 @@ void i915_gem_cleanup_stolen(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 
-+	if (!drm_mm_initialized(&dev_priv->mm.stolen))
-+		return;
-+
- 	i915_gem_stolen_cleanup_compression(dev);
- 	drm_mm_takedown(&dev_priv->mm.stolen);
- }
-@@ -300,7 +303,7 @@ i915_gem_object_create_stolen(struct drm_device *dev, u32 size)
- 	struct drm_i915_gem_object *obj;
- 	struct drm_mm_node *stolen;
- 
--	if (dev_priv->mm.stolen_base == 0)
-+	if (!drm_mm_initialized(&dev_priv->mm.stolen))
- 		return NULL;
- 
- 	DRM_DEBUG_KMS("creating stolen object: size=%x\n", size);
-@@ -331,7 +334,7 @@ i915_gem_object_create_stolen_for_preallocated(struct drm_device *dev,
- 	struct drm_i915_gem_object *obj;
- 	struct drm_mm_node *stolen;
- 
--	if (dev_priv->mm.stolen_base == 0)
-+	if (!drm_mm_initialized(&dev_priv->mm.stolen))
- 		return NULL;
- 
- 	DRM_DEBUG_KMS("creating preallocated stolen object: stolen_offset=%x, gtt_offset=%x, size=%x\n",
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0369-drm-i915-reinit-status-page-registers-after-gpu-rese.patch b/patches.baytrail/0369-drm-i915-reinit-status-page-registers-after-gpu-rese.patch
deleted file mode 100644
index 88855cba560bf..0000000000000
--- a/patches.baytrail/0369-drm-i915-reinit-status-page-registers-after-gpu-rese.patch
+++ /dev/null
@@ -1,116 +0,0 @@
-From 02b4f8bd472ddf7a976ebe56ce11324b6e940304 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Wed, 3 Jul 2013 12:56:54 +0200
-Subject: drm/i915: reinit status page registers after gpu reset
-
-This fixes gpu reset on my gm45 - without this patch the bsd thing is
-forever stuck since the seqno updates never reach the status page.
-
-Tbh I have no idea how this ever worked without rewriting the hws
-registers after a gpu reset.
-
-To satisfy my OCD also give the functions a bit more consistent names:
-- Use status_page everywhere, also for the physical addressed one.
-- Use init for the allocation part and setup for the register setup
-  part consistently.
-
-Long term I'd really like to share the hw init parts completely
-between gpu reset, resume and driver load, i.e. to call
-i915_gem_init_hw instead of the individual pieces we might need.
-
-v2: Add the missing paragraph to the commit message about what bug
-exactly this patch here fixes.
-
-Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=65495
-Cc: Chris Wilson <chris@chris-wilson.co.uk>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Tested-by: lu hua <huax.lu@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 035dc1e0f9008b48630e02bf0eaa7cc547416d1d)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_ringbuffer.c |   29 +++++++++++++++++++----------
- 1 file changed, 19 insertions(+), 10 deletions(-)
-
---- a/drivers/gpu/drm/i915/intel_ringbuffer.c
-+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
-@@ -379,6 +379,17 @@ u32 intel_ring_get_active_head(struct in
- 	return I915_READ(acthd_reg);
- }
- 
-+static void ring_setup_phys_status_page(struct intel_ring_buffer *ring)
-+{
-+	struct drm_i915_private *dev_priv = ring->dev->dev_private;
-+	u32 addr;
-+
-+	addr = dev_priv->status_page_dmah->busaddr;
-+	if (INTEL_INFO(ring->dev)->gen >= 4)
-+		addr |= (dev_priv->status_page_dmah->busaddr >> 28) & 0xf0;
-+	I915_WRITE(HWS_PGA, addr);
-+}
-+
- static int init_ring_common(struct intel_ring_buffer *ring)
- {
- 	struct drm_device *dev = ring->dev;
-@@ -390,6 +401,11 @@ static int init_ring_common(struct intel
- 	if (HAS_FORCE_WAKE(dev))
- 		gen6_gt_force_wake_get(dev_priv);
- 
-+	if (I915_NEED_GFX_HWS(dev))
-+		intel_ring_setup_status_page(ring);
-+	else
-+		ring_setup_phys_status_page(ring);
-+
- 	/* Stop the ring if it's running. */
- 	I915_WRITE_CTL(ring, 0);
- 	I915_WRITE_HEAD(ring, 0);
-@@ -1234,7 +1250,6 @@ static int init_status_page(struct intel
- 	ring->status_page.obj = obj;
- 	memset(ring->status_page.page_addr, 0, PAGE_SIZE);
- 
--	intel_ring_setup_status_page(ring);
- 	DRM_DEBUG_DRIVER("%s hws offset: 0x%08x\n",
- 			ring->name, ring->status_page.gfx_addr);
- 
-@@ -1248,10 +1263,9 @@ err:
- 	return ret;
- }
- 
--static int init_phys_hws_pga(struct intel_ring_buffer *ring)
-+static int init_phys_status_page(struct intel_ring_buffer *ring)
- {
- 	struct drm_i915_private *dev_priv = ring->dev->dev_private;
--	u32 addr;
- 
- 	if (!dev_priv->status_page_dmah) {
- 		dev_priv->status_page_dmah =
-@@ -1260,11 +1274,6 @@ static int init_phys_hws_pga(struct inte
- 			return -ENOMEM;
- 	}
- 
--	addr = dev_priv->status_page_dmah->busaddr;
--	if (INTEL_INFO(ring->dev)->gen >= 4)
--		addr |= (dev_priv->status_page_dmah->busaddr >> 28) & 0xf0;
--	I915_WRITE(HWS_PGA, addr);
--
- 	ring->status_page.page_addr = dev_priv->status_page_dmah->vaddr;
- 	memset(ring->status_page.page_addr, 0, PAGE_SIZE);
- 
-@@ -1292,7 +1301,7 @@ static int intel_init_ring_buffer(struct
- 			return ret;
- 	} else {
- 		BUG_ON(ring->id != RCS);
--		ret = init_phys_hws_pga(ring);
-+		ret = init_phys_status_page(ring);
- 		if (ret)
- 			return ret;
- 	}
-@@ -1908,7 +1917,7 @@ int intel_render_ring_init_dri(struct dr
- 	}
- 
- 	if (!I915_NEED_GFX_HWS(dev)) {
--		ret = init_phys_hws_pga(ring);
-+		ret = init_phys_status_page(ring);
- 		if (ret)
- 			return ret;
- 	}
diff --git a/patches.baytrail/0370-drm-i915-switch-disable_power_well-default-value-to-.patch b/patches.baytrail/0370-drm-i915-switch-disable_power_well-default-value-to-.patch
deleted file mode 100644
index 28814deb3311a..0000000000000
--- a/patches.baytrail/0370-drm-i915-switch-disable_power_well-default-value-to-.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From 884556d35128efd2069e4805a021a0f5048f4dda Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Wed, 3 Jul 2013 17:12:13 -0300
-Subject: drm/i915: switch disable_power_well default value to 1
-
-Now that the audio driver is using our power well API, everything
-should be working correctly, so let's give it a try.
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit bf51d5e2cda5d36d98e4b46ac7fca9461e512c41)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
-index 27a8bedd9156..45b3c030f483 100644
---- a/drivers/gpu/drm/i915/i915_drv.c
-+++ b/drivers/gpu/drm/i915/i915_drv.c
-@@ -123,10 +123,10 @@ module_param_named(preliminary_hw_support, i915_preliminary_hw_support, int, 060
- MODULE_PARM_DESC(preliminary_hw_support,
- 		"Enable preliminary hardware support. (default: false)");
- 
--int i915_disable_power_well __read_mostly = 0;
-+int i915_disable_power_well __read_mostly = 1;
- module_param_named(disable_power_well, i915_disable_power_well, int, 0600);
- MODULE_PARM_DESC(disable_power_well,
--		 "Disable the power well when possible (default: false)");
-+		 "Disable the power well when possible (default: true)");
- 
- int i915_enable_ips __read_mostly = 1;
- module_param_named(enable_ips, i915_enable_ips, int, 0600);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0371-drm-i915-fix-lane-bandwidth-capping-for-DP-1.2-sinks.patch b/patches.baytrail/0371-drm-i915-fix-lane-bandwidth-capping-for-DP-1.2-sinks.patch
deleted file mode 100644
index 93ce9d8c69af9..0000000000000
--- a/patches.baytrail/0371-drm-i915-fix-lane-bandwidth-capping-for-DP-1.2-sinks.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-From b53c54ca82a560b896552b3ef034ce3368d9c189 Mon Sep 17 00:00:00 2001
-From: Imre Deak <imre.deak@intel.com>
-Date: Tue, 9 Jul 2013 17:05:26 +0300
-Subject: drm/i915: fix lane bandwidth capping for DP 1.2 sinks
-
-DP 1.2 compatible displays may report a 5.4Gbps maximum bandwidth which
-the driver will treat as an invalid value and use 1.62Gbps instead. Fix
-this by capping to 2.7Gbps for sinks reporting a 5.4Gbps max bw.
-
-Also add a warning for reserved values.
-
-v2:
-- allow only bw values explicitly listed in the DP standard (Daniel,
-  Chris)
-
-Signed-off-by: Imre Deak <imre.deak@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit d4eead50eb206b875f54f66cc0f6ec7d54122c28)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_dp.c | 5 +++++
- 1 file changed, 5 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
-index 47713d6aa4a5..3aed1fe0aa51 100644
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -75,7 +75,12 @@ intel_dp_max_link_bw(struct intel_dp *intel_dp)
- 	case DP_LINK_BW_1_62:
- 	case DP_LINK_BW_2_7:
- 		break;
-+	case DP_LINK_BW_5_4: /* 1.2 capable displays may advertise higher bw */
-+		max_link_bw = DP_LINK_BW_2_7;
-+		break;
- 	default:
-+		WARN(1, "invalid max DP link bw val %x, using 1.62Gbps\n",
-+		     max_link_bw);
- 		max_link_bw = DP_LINK_BW_1_62;
- 		break;
- 	}
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0372-Revert-drm-i915-Workaround-incoherence-between-fence.patch b/patches.baytrail/0372-Revert-drm-i915-Workaround-incoherence-between-fence.patch
deleted file mode 100644
index 1aa92cd022c03..0000000000000
--- a/patches.baytrail/0372-Revert-drm-i915-Workaround-incoherence-between-fence.patch
+++ /dev/null
@@ -1,111 +0,0 @@
-From cf09896eb9285f2446189d98d558998dcf8cd3b1 Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Wed, 10 Jul 2013 13:36:24 +0100
-Subject: Revert "drm/i915: Workaround incoherence between fences and LLC
- across multiple CPUs"
-
-This reverts commit 25ff119 and the follow on for Valleyview commit 2dc8aae.
-
-commit 25ff1195f8a0b3724541ae7bbe331b4296de9c06
-Author: Chris Wilson <chris@chris-wilson.co.uk>
-Date:   Thu Apr 4 21:31:03 2013 +0100
-
-    drm/i915: Workaround incoherence between fences and LLC across multiple CPUs
-
-commit 2dc8aae06d53458dd3624dc0accd4f81100ee631
-Author: Chris Wilson <chris@chris-wilson.co.uk>
-Date:   Wed May 22 17:08:06 2013 +0100
-
-    drm/i915: Workaround incoherence with fence updates on Valleyview
-
-Jon Bloomfield came up with a plausible explanation and cheap fix
-(drm/i915: Fix incoherence with fence updates on Sandybridge+) for the
-race condition, so lets run with it.
-
-This is a candidate for stable as the old workaround incurs a
-significant cost (calling wbinvd on all CPUs before performing the
-register write) for some workloads as noted by Carsten Emde.
-
-Link: http://lists.freedesktop.org/archives/intel-gfx/2013-June/028819.html
-References: https://www.osadl.org/?id=1543#c7602
-References: https://bugs.freedesktop.org/show_bug.cgi?id=63825
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
-Cc: Jon Bloomfield <jon.bloomfield@intel.com>
-Cc: Carsten Emde <C.Emde@osadl.org>
-Cc: stable@vger.kernel.org
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 46a0b638f35b45fc13d3dc0deb6a7e17988170b2)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem.c | 47 ++++-------------------------------------
- 1 file changed, 4 insertions(+), 43 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index 2f58889ec120..d9e2208cfe98 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -2832,56 +2832,17 @@ static inline int fence_number(struct drm_i915_private *dev_priv,
- 	return fence - dev_priv->fence_regs;
- }
- 
--struct write_fence {
--	struct drm_device *dev;
--	struct drm_i915_gem_object *obj;
--	int fence;
--};
--
--static void i915_gem_write_fence__ipi(void *data)
--{
--	struct write_fence *args = data;
--
--	/* Required for SNB+ with LLC */
--	wbinvd();
--
--	/* Required for VLV */
--	i915_gem_write_fence(args->dev, args->fence, args->obj);
--}
--
- static void i915_gem_object_update_fence(struct drm_i915_gem_object *obj,
- 					 struct drm_i915_fence_reg *fence,
- 					 bool enable)
- {
- 	struct drm_i915_private *dev_priv = obj->base.dev->dev_private;
--	struct write_fence args = {
--		.dev = obj->base.dev,
--		.fence = fence_number(dev_priv, fence),
--		.obj = enable ? obj : NULL,
--	};
--
--	/* In order to fully serialize access to the fenced region and
--	 * the update to the fence register we need to take extreme
--	 * measures on SNB+. In theory, the write to the fence register
--	 * flushes all memory transactions before, and coupled with the
--	 * mb() placed around the register write we serialise all memory
--	 * operations with respect to the changes in the tiler. Yet, on
--	 * SNB+ we need to take a step further and emit an explicit wbinvd()
--	 * on each processor in order to manually flush all memory
--	 * transactions before updating the fence register.
--	 *
--	 * However, Valleyview complicates matter. There the wbinvd is
--	 * insufficient and unlike SNB/IVB requires the serialising
--	 * register write. (Note that that register write by itself is
--	 * conversely not sufficient for SNB+.) To compromise, we do both.
--	 */
--	if (INTEL_INFO(args.dev)->gen >= 6)
--		on_each_cpu(i915_gem_write_fence__ipi, &args, 1);
--	else
--		i915_gem_write_fence(args.dev, args.fence, args.obj);
-+	int reg = fence_number(dev_priv, fence);
-+
-+	i915_gem_write_fence(obj->base.dev, reg, enable ? obj : NULL);
- 
- 	if (enable) {
--		obj->fence_reg = args.fence;
-+		obj->fence_reg = reg;
- 		fence->obj = obj;
- 		list_move_tail(&fence->lru_list, &dev_priv->mm.fence_list);
- 	} else {
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0373-drm-i915-fix-up-readout-of-the-lvds-dither-bit-on-ge.patch b/patches.baytrail/0373-drm-i915-fix-up-readout-of-the-lvds-dither-bit-on-ge.patch
deleted file mode 100644
index 749976e53696a..0000000000000
--- a/patches.baytrail/0373-drm-i915-fix-up-readout-of-the-lvds-dither-bit-on-ge.patch
+++ /dev/null
@@ -1,99 +0,0 @@
-From 3bd01ef97d4c2dd8f35f47f1fb11047931cf2158 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 11 Jul 2013 13:35:40 +0200
-Subject: drm/i915: fix up readout of the lvds dither bit on gen2/3
-
-It's in the PFIT_CONTROL register, but very much associated with the
-lvds encoder. So move the readout for it (in the case of an otherwise
-disabled pfit) from the pipe to the lvds encoder's get_config
-function.
-
-Otherwise we get a pipe state mismatch if we use pipe B for a non-lvds
-output and we've left the dither bit enabled behind us. This can
-happen if the BIOS has set the bit (some seem to unconditionally do
-that, even in the complete absence of an lvds port), but not enabled
-pipe B at boot-up. Then we won't clear the pfit control register since
-we can only touch that if the pfit is associated with our pipe in the
-crtc configuration - we could trample over the pfit state of the other
-pipe otherwise since it's shared. Once pipe B is enabled we notice
-that the 6to8 dither bit is set and complain about the mismatch.
-
-Note that testing indicates that we don't actually need to set this
-bit when the pfit is disabled, dithering on 18bpp panels seems to work
-regardless. But ripping that code out is not something for a bugfix
-meant for -rc kernels.
-
-v2: While at it clarify the logic in i9xx_get_pfit_config, spurred by
-comments from Chris on irc.
-
-v3: Use Chris suggestion to make the control flow in
-i9xx_get_pfit_config easier to understand.
-
-v4: Kill the extra line, spotted by Chris.
-
-Reported-by: Knut Petersen <Knut_Petersen@t-online.de>
-Cc: Knut Petersen <Knut_Petersen@t-online.de>
-Cc: Chris Wilson <chris@chris-wilson.co.uk>
-References: http://lists.freedesktop.org/archives/intel-gfx/2013-July/030092.html
-Tested-by: Knut Petersen <Knut_Petersen@t-online.de>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 0692282181e248328c226c2520994fc06dfd65bf)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 11 ++++-------
- drivers/gpu/drm/i915/intel_lvds.c    |  7 +++++++
- 2 files changed, 11 insertions(+), 7 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 7a4669183b6a..2962d0fa11e1 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -4913,22 +4913,19 @@ static void i9xx_get_pfit_config(struct intel_crtc *crtc,
- 	uint32_t tmp;
- 
- 	tmp = I915_READ(PFIT_CONTROL);
-+	if (!(tmp & PFIT_ENABLE))
-+		return;
- 
-+	/* Check whether the pfit is attached to our pipe. */
- 	if (INTEL_INFO(dev)->gen < 4) {
- 		if (crtc->pipe != PIPE_B)
- 			return;
--
--		/* gen2/3 store dither state in pfit control, needs to match */
--		pipe_config->gmch_pfit.control = tmp & PANEL_8TO6_DITHER_ENABLE;
- 	} else {
- 		if ((tmp & PFIT_PIPE_MASK) != (crtc->pipe << PFIT_PIPE_SHIFT))
- 			return;
- 	}
- 
--	if (!(tmp & PFIT_ENABLE))
--		return;
--
--	pipe_config->gmch_pfit.control = I915_READ(PFIT_CONTROL);
-+	pipe_config->gmch_pfit.control = tmp;
- 	pipe_config->gmch_pfit.pgm_ratios = I915_READ(PFIT_PGM_RATIOS);
- 	if (INTEL_INFO(dev)->gen < 5)
- 		pipe_config->gmch_pfit.lvds_border_bits =
-diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
-index 3264bfa842fc..9eeae0e3a062 100644
---- a/drivers/gpu/drm/i915/intel_lvds.c
-+++ b/drivers/gpu/drm/i915/intel_lvds.c
-@@ -109,6 +109,13 @@ static void intel_lvds_get_config(struct intel_encoder *encoder,
- 		flags |= DRM_MODE_FLAG_PVSYNC;
- 
- 	pipe_config->adjusted_mode.flags |= flags;
-+
-+	/* gen2/3 store dither state in pfit control, needs to match */
-+	if (INTEL_INFO(dev)->gen < 4) {
-+		tmp = I915_READ(PFIT_CONTROL);
-+
-+		pipe_config->gmch_pfit.control |= tmp & PANEL_8TO6_DITHER_ENABLE;
-+	}
- }
- 
- /* The LVDS pin pair needs to be on before the DPLLs are enabled.
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0374-drm-i915-fix-pfit-regression-for-non-autoscaled-reso.patch b/patches.baytrail/0374-drm-i915-fix-pfit-regression-for-non-autoscaled-reso.patch
deleted file mode 100644
index a56ff092e1972..0000000000000
--- a/patches.baytrail/0374-drm-i915-fix-pfit-regression-for-non-autoscaled-reso.patch
+++ /dev/null
@@ -1,72 +0,0 @@
-From 88ef018ef1229e52282ee5a080ef4efe796bcc08 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Fri, 12 Jul 2013 08:07:30 +0200
-Subject: drm/i915: fix pfit regression for non-autoscaled resolutions
-
-I.e. for letter/pillarboxing. For those cases we need to adjust the
-mode a bit, but Jesse gmch pfit refactoring in
-
-commit 2dd24552cab40ea829ba3fda890eeafd2c4816d8
-Author: Jesse Barnes <jbarnes@virtuousgeek.org>
-Date:   Thu Apr 25 12:55:01 2013 -0700
-
-    drm/i915: factor out GMCH panel fitting code and use for eDP v3
-
-broke that by reordering the computation of the gmch pfit state with
-the block of code that prepared the adjusted mode for it and told the
-modeset core not to overwrite the adjusted mode with default settings.
-
-We might want to switch around the core code to just fill in defaults,
-but this code predates the pipe_config modeset rework. And in the old
-crtc helpers we did not have a suitable spot to do this.
-
-Cc: Mika Kuoppala <mika.kuoppala@intel.com>
-Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
-Cc: Hans de Bruin <jmdebruin@xmsnet.nl>
-Reported-and-tested-by: Hans de Bruin <jmdebruin@xmsnet.nl>
-Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 21d8a4756af5fdf4a42e79a77cf3b6f52678d443)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_lvds.c  | 5 +----
- drivers/gpu/drm/i915/intel_panel.c | 3 +++
- 2 files changed, 4 insertions(+), 4 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
-index 9eeae0e3a062..44533dde25c1 100644
---- a/drivers/gpu/drm/i915/intel_lvds.c
-+++ b/drivers/gpu/drm/i915/intel_lvds.c
-@@ -297,14 +297,11 @@ static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
- 
- 		intel_pch_panel_fitting(intel_crtc, pipe_config,
- 					intel_connector->panel.fitting_mode);
--		return true;
- 	} else {
- 		intel_gmch_panel_fitting(intel_crtc, pipe_config,
- 					 intel_connector->panel.fitting_mode);
--	}
- 
--	drm_mode_set_crtcinfo(adjusted_mode, 0);
--	pipe_config->timings_set = true;
-+	}
- 
- 	/*
- 	 * XXX: It would be nice to support lower refresh rates on the
-diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
-index 01b5a519c43c..67e2c1f1c9a8 100644
---- a/drivers/gpu/drm/i915/intel_panel.c
-+++ b/drivers/gpu/drm/i915/intel_panel.c
-@@ -194,6 +194,9 @@ void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
- 	    adjusted_mode->vdisplay == mode->vdisplay)
- 		goto out;
- 
-+	drm_mode_set_crtcinfo(adjusted_mode, 0);
-+	pipe_config->timings_set = true;
-+
- 	switch (fitting_mode) {
- 	case DRM_MODE_SCALE_CENTER:
- 		/*
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0375-drm-i915-Preserve-the-DDI_A_4_LANES-bit-from-the-bio.patch b/patches.baytrail/0375-drm-i915-Preserve-the-DDI_A_4_LANES-bit-from-the-bio.patch
deleted file mode 100644
index 0951eab7b9150..0000000000000
--- a/patches.baytrail/0375-drm-i915-Preserve-the-DDI_A_4_LANES-bit-from-the-bio.patch
+++ /dev/null
@@ -1,40 +0,0 @@
-From 9237256b4dc9207b37b52a0ee0b9b5770a5e5c92 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?St=C3=A9phane=20Marchesin?= <marcheu@chromium.org>
-Date: Fri, 12 Jul 2013 13:54:41 -0700
-Subject: drm/i915: Preserve the DDI_A_4_LANES bit from the bios
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Otherwise the DDI_A_4_LANES bit gets lost and we can't use > 2 lanes
-on eDP. This fixes eDP on hsw with > 2 lanes.
-
-Also s/port_reversal/saved_port_bits/ since the current name is
-confusing.
-
-Signed-off-by: Stéphane Marchesin <marcheu@chromium.org>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Cc: stable@vger.kernel.org
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit bcf53de4e60d9000b82f541d654529e2902a4c2c)
-[dbasehore: removed if statement on a NULL pointer value in conflict]
-Signed-off-by: Derek Basehore <dbasehore@chromium.org>
-
-Conflicts:
-	drivers/gpu/drm/i915/intel_ddi.c
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_ddi.c |    2 --
- 1 file changed, 2 deletions(-)
-
---- a/drivers/gpu/drm/i915/intel_ddi.c
-+++ b/drivers/gpu/drm/i915/intel_ddi.c
-@@ -1357,8 +1357,6 @@ void intel_ddi_init(struct drm_device *d
- 	intel_dig_port->saved_port_bits = I915_READ(DDI_BUF_CTL(port)) &
- 					  (DDI_BUF_PORT_REVERSAL |
- 					   DDI_A_4_LANES);
--	if (hdmi_connector)
--		intel_dig_port->hdmi.hdmi_reg = DDI_BUF_CTL(port);
- 	intel_dig_port->dp.output_reg = DDI_BUF_CTL(port);
- 
- 	intel_encoder->type = INTEL_OUTPUT_UNKNOWN;
diff --git a/patches.baytrail/0376-drm-i915-fix-long-standing-SNB-regression-in-power-c.patch b/patches.baytrail/0376-drm-i915-fix-long-standing-SNB-regression-in-power-c.patch
deleted file mode 100644
index b5dd0d8a45614..0000000000000
--- a/patches.baytrail/0376-drm-i915-fix-long-standing-SNB-regression-in-power-c.patch
+++ /dev/null
@@ -1,79 +0,0 @@
-From 9cdccab3f0ea875b9bc0f7a77eef020f5acd1daf Mon Sep 17 00:00:00 2001
-From: Konstantin Khlebnikov <khlebnikov@openvz.org>
-Date: Wed, 17 Jul 2013 10:22:58 +0400
-Subject: drm/i915: fix long-standing SNB regression in power consumption after
- resume v2
-
-This patch fixes regression in power consumtion of sandy bridge gpu, which
-exists since v3.6 Sometimes after resuming from s2ram gpu starts thinking that
-it's extremely busy. After that it never reaches rc6 state.
-
-Bug exists since kernel v3.6:
-
-commit b4ae3f22d238617ca11610b29fde16cf8c0bc6e0
-Author: Jesse Barnes <jbarnes@virtuousgeek.org>
-Date:   Thu Jun 14 11:04:48 2012 -0700
-
-    drm/i915: load boot context at driver init time
-
-For some reason RC6 is already enabled at the beginning of resuming process.
-Following initliaztion breaks some internal state and confuses RPS engine.
-This patch disables RC6 at the beginnig of resume and initialization.
-
-I've rearranged initialization sequence, because intel_disable_gt_powersave()
-needs initialized force_wake_get/put and some locks from the dev_priv.
-
-Note: The culprit in the initialization sequence seems to be the write
-to MBCTL added in the above mentioned commit. The first version of
-this patch just held a forcewake reference across the clock gating
-init functions, which seems to have been enought to gather quite a few
-positive test reports. But since that smelled a bit like ad-hoc
-duct-tape v2 now just disables rps/rc6 across the entire hw setup.
-
-References: https://bugs.freedesktop.org/show_bug.cgi?id=54089
-References: https://bugzilla.kernel.org/show_bug.cgi?id=58971
-References: https://patchwork.kernel.org/patch/2827634/ (patch v1)
-Signed-off-by: Konstantin Khlebnikov <khlebnikov@openvz.org>
-Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
-Cc: Chris Wilson <chris@chris-wilson.co.uk>
-Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
-[danvet: Add note about v1 vs. v2 of this patch and use standard
-layout for the commit citation. Also add the tested-bys from v1 and a
-cc: stable.]
-Cc: stable@vger.kernel.org (Note: tiny conflict due to the addition of
-the backlight lock in 3.11)
-Tested-by: Alexander Kaltsas <alexkaltsas@gmail.com> (v1)
-Tested-by: rocko <rockorequin@hotmail.com> (v1)
-Tested-by: JohnMB <johnmbryant@sky.com> (v1)
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 7dcd2677ea912573d9ed4bcd629b0023b2d11505)
-[dbasehore: removed call to function that no longer exists, removed redundant
-branch, and moved back spinlock initialization for conflict]
-Signed-off-by: Derek Basehore <dbasehore@chromium.org>
-
-Conflicts:
-	drivers/gpu/drm/i915/i915_dma.c
-	drivers/gpu/drm/i915/intel_pm.c
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 3 +--
- 1 file changed, 1 insertion(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index f895d1508df8..aa962ef827c4 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -5489,8 +5489,7 @@ void intel_gt_sanitize(struct drm_device *dev)
- 	}
- 
- 	/* BIOS often leaves RC6 enabled, but disable it for hw init */
--	if (INTEL_INFO(dev)->gen >= 6)
--		intel_disable_gt_powersave(dev);
-+	intel_disable_gt_powersave(dev);
- }
- 
- void intel_gt_init(struct drm_device *dev)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0377-drm-i915-Sanitize-shared-dpll-state.patch b/patches.baytrail/0377-drm-i915-Sanitize-shared-dpll-state.patch
deleted file mode 100644
index e528c01f3450c..0000000000000
--- a/patches.baytrail/0377-drm-i915-Sanitize-shared-dpll-state.patch
+++ /dev/null
@@ -1,81 +0,0 @@
-From 41d5751570c52b0dd020858fb4c0059dc46d4f8e Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Wed, 17 Jul 2013 06:55:04 +0200
-Subject: drm/i915: Sanitize shared dpll state
-
-There seems to be no limit to the amount of gunk the firmware can
-leave behind. Some platforms leave pch dplls on which are not in
-active use at all. The example in the bug report is a Apple Macbook
-Pro.
-
-Note that this escape scrunity of the hw state checker until we've
-tried to use this enabled, but unused pll since we did only check for
-the inverse case of a in-used, but disabled pll.
-
-v2: Add a WARN in the pll state checker which would have caught this
-case.
-
-Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=66952
-Reported-and-tested-by: shui yangwei <yangweix.shui@intel.com>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 35c95375f69ceec721fea67a0532bc17ceb5cf64)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 19 +++++++++++++++++--
- 1 file changed, 17 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 2962d0fa11e1..cd93b1b1840d 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -8318,6 +8318,8 @@ check_shared_dpll_state(struct drm_device *dev)
- 		     pll->active, pll->refcount);
- 		WARN(pll->active && !pll->on,
- 		     "pll in active use but not on in sw tracking\n");
-+		WARN(pll->on && !pll->active,
-+		     "pll in on but not on in use in sw tracking\n");
- 		WARN(pll->on != active,
- 		     "pll on state mismatch (expected %i, found %i)\n",
- 		     pll->on, active);
-@@ -9837,8 +9839,8 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev)
- 		}
- 		pll->refcount = pll->active;
- 
--		DRM_DEBUG_KMS("%s hw state readout: refcount %i\n",
--			      pll->name, pll->refcount);
-+		DRM_DEBUG_KMS("%s hw state readout: refcount %i, on %i\n",
-+			      pll->name, pll->refcount, pll->on);
- 	}
- 
- 	list_for_each_entry(encoder, &dev->mode_config.encoder_list,
-@@ -9889,6 +9891,7 @@ void intel_modeset_setup_hw_state(struct drm_device *dev,
- 	struct drm_plane *plane;
- 	struct intel_crtc *crtc;
- 	struct intel_encoder *encoder;
-+	int i;
- 
- 	intel_modeset_readout_hw_state(dev);
- 
-@@ -9904,6 +9907,18 @@ void intel_modeset_setup_hw_state(struct drm_device *dev,
- 		intel_dump_pipe_config(crtc, &crtc->config, "[setup_hw_state]");
- 	}
- 
-+	for (i = 0; i < dev_priv->num_shared_dpll; i++) {
-+		struct intel_shared_dpll *pll = &dev_priv->shared_dplls[i];
-+
-+		if (!pll->on || pll->active)
-+			continue;
-+
-+		DRM_DEBUG_KMS("%s enabled but not in use, disabling\n", pll->name);
-+
-+		pll->disable(dev_priv, pll);
-+		pll->on = false;
-+	}
-+
- 	if (force_restore) {
- 		/*
- 		 * We need to use raw interfaces for restoring state to avoid
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0378-drm-i915-fix-up-gt-init-sequence-fallout.patch b/patches.baytrail/0378-drm-i915-fix-up-gt-init-sequence-fallout.patch
deleted file mode 100644
index 61d0d44aab7d6..0000000000000
--- a/patches.baytrail/0378-drm-i915-fix-up-gt-init-sequence-fallout.patch
+++ /dev/null
@@ -1,65 +0,0 @@
-From abb221042ebe297834475c54eeb9061480e0f280 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Sun, 21 Jul 2013 13:16:24 +0200
-Subject: drm/i915: fix up gt init sequence fallout
-
-The regression fix for gen6+ rps fallout
-
-commit 7dcd2677ea912573d9ed4bcd629b0023b2d11505
-Author: Konstantin Khlebnikov <khlebnikov@openvz.org>
-Date:   Wed Jul 17 10:22:58 2013 +0400
-
-    drm/i915: fix long-standing SNB regression in power consumption after resume
-
-unintentionally also changed the init sequence ordering between
-gt_init and gt_reset - we need to reset BIOS damage like leftover
-forcewake references before we run our own code. Otherwise we can get
-nasty dmesg noise like
-
-[drm:__gen6_gt_force_wake_mt_get] *ERROR* Timed out waiting for forcewake old ack to clear.
-
-again. Since _reset suggests that we first need to have stuff
-initialized (which isn't the case here) call it sanitze instead.
-
-While at it also block out the rps disable introduced by the above
-commit on ilk: We don't have any knowledge of ilk rps being broken in
-similar ways. And the disable functions uses the default hw state
-which is only read out when we're enabling rps. So essentially we've
-been writing random grabage into that register.
-
-Reported-by: Chris Wilson <chris@chris-wilson.co.uk>
-Cc: Chris Wilson <chris@chris-wilson.co.uk>
-Cc: Konstantin Khlebnikov <khlebnikov@openvz.org>
-Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
-Cc: stable@vger.kernel.org
-Tested-by: Chris Wilson <chris@chris-wilson.co.uk>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 181d1b9e31c668259d3798c521672afb8edd355c)
-[dbasehore: fixed conflict from missing line in commit due to 3.10 backport]
-Signed-off-by: Derek Basehore <dbasehore@chromium.org>
-
-Conflicts:
-	drivers/gpu/drm/i915/i915_dma.c
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index aa962ef827c4..f895d1508df8 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -5489,7 +5489,8 @@ void intel_gt_sanitize(struct drm_device *dev)
- 	}
- 
- 	/* BIOS often leaves RC6 enabled, but disable it for hw init */
--	intel_disable_gt_powersave(dev);
-+	if (INTEL_INFO(dev)->gen >= 6)
-+		intel_disable_gt_powersave(dev);
- }
- 
- void intel_gt_init(struct drm_device *dev)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0379-drm-i915-fix-hdmi-portclock-limits.patch b/patches.baytrail/0379-drm-i915-fix-hdmi-portclock-limits.patch
deleted file mode 100644
index ca24b9b66d1cd..0000000000000
--- a/patches.baytrail/0379-drm-i915-fix-hdmi-portclock-limits.patch
+++ /dev/null
@@ -1,101 +0,0 @@
-From 88de448b0b06ea20c4c20e9285c71e1af5dc95a9 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Mon, 22 Jul 2013 18:02:39 +0200
-Subject: drm/i915: fix hdmi portclock limits
-
-In
-
-commit 325b9d048810f7689ec644595061c0b700e64bce
-Author: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date:   Fri Apr 19 11:24:33 2013 +0200
-
-    drm/i915: fixup 12bpc hdmi dotclock handling
-
-I've errornously claimed that we don't yet support the hdmi 1.4
-dotclocks > 225 MHz on Haswell. But a bug report and a closer look at
-the wrpll table showed that we've supported port clocks up to 300MHz.
-
-With the new code to dynamically compute wrpll limits we should have
-no issues going up to the full 340 MHz range of hdmi 1.4, so let's
-just use that to fix this regression. That'll allow 4k over hdmi for
-free!
-
-v2: Drop the random hunk that somehow slipped in.
-
-v3: Cantiga has the original HDMI dotclock limit of 165MHz. And also
-patch up the mode filtering. To do so extract the dotclock limits into
-a little helper function.
-
-v4: Use 300MHz (from Bspec) instead of 340MHz (upper limit for hdmi
-1.3), apparently hw is not required to be able to drive the highest
-dotclocks. Suggested by Damien.
-
-Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67048
-Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67030
-Tested-by: Andreas Reis <andreas.reis@gmail.com> (v2)
-Cc: Damien Lespiau <damien.lespiau@intel.com>
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 7d148ef51a657fd04036c3ed7803da600dd0d451)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_hdmi.c | 19 ++++++++++++++++---
- 1 file changed, 16 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
-index 98df2a0c85bd..2fd3fd5b943e 100644
---- a/drivers/gpu/drm/i915/intel_hdmi.c
-+++ b/drivers/gpu/drm/i915/intel_hdmi.c
-@@ -785,10 +785,22 @@ static void intel_disable_hdmi(struct intel_encoder *encoder)
- 	}
- }
- 
-+static int hdmi_portclock_limit(struct intel_hdmi *hdmi)
-+{
-+	struct drm_device *dev = intel_hdmi_to_dev(hdmi);
-+
-+	if (IS_G4X(dev))
-+		return 165000;
-+	else if (IS_HASWELL(dev))
-+		return 300000;
-+	else
-+		return 225000;
-+}
-+
- static int intel_hdmi_mode_valid(struct drm_connector *connector,
- 				 struct drm_display_mode *mode)
- {
--	if (mode->clock > 165000)
-+	if (mode->clock > hdmi_portclock_limit(intel_attached_hdmi(connector)))
- 		return MODE_CLOCK_HIGH;
- 	if (mode->clock < 20000)
- 		return MODE_CLOCK_LOW;
-@@ -806,6 +818,7 @@ bool intel_hdmi_compute_config(struct intel_encoder *encoder,
- 	struct drm_device *dev = encoder->base.dev;
- 	struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
- 	int clock_12bpc = pipe_config->requested_mode.clock * 3 / 2;
-+	int portclock_limit = hdmi_portclock_limit(intel_hdmi);
- 	int desired_bpp;
- 
- 	if (intel_hdmi->color_range_auto) {
-@@ -829,7 +842,7 @@ bool intel_hdmi_compute_config(struct intel_encoder *encoder,
- 	 * outputs. We also need to check that the higher clock still fits
- 	 * within limits.
- 	 */
--	if (pipe_config->pipe_bpp > 8*3 && clock_12bpc <= 225000
-+	if (pipe_config->pipe_bpp > 8*3 && clock_12bpc <= portclock_limit
- 	    && HAS_PCH_SPLIT(dev)) {
- 		DRM_DEBUG_KMS("picking bpc to 12 for HDMI output\n");
- 		desired_bpp = 12*3;
-@@ -846,7 +859,7 @@ bool intel_hdmi_compute_config(struct intel_encoder *encoder,
- 		pipe_config->pipe_bpp = desired_bpp;
- 	}
- 
--	if (adjusted_mode->clock > 225000) {
-+	if (adjusted_mode->clock > portclock_limit) {
- 		DRM_DEBUG_KMS("too high HDMI clock, rejecting mode\n");
- 		return false;
- 	}
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0380-drm-i915-update-last_vblank-when-disabling-the-power.patch b/patches.baytrail/0380-drm-i915-update-last_vblank-when-disabling-the-power.patch
deleted file mode 100644
index 38961d33c770b..0000000000000
--- a/patches.baytrail/0380-drm-i915-update-last_vblank-when-disabling-the-power.patch
+++ /dev/null
@@ -1,68 +0,0 @@
-From ea02b4f5dce4566bf236c80e637bc7a07a5299de Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Tue, 23 Jul 2013 10:48:11 -0300
-Subject: drm/i915: update last_vblank when disabling the power well
-
-The DRM layer keeps track of our vblanks and it assumes our vblank
-counters only go back to zero when they overflow. The problem is that
-when we disable the power well our counters also go to zero, but it
-doesn't mean they did overflow. So on this patch we grab the lock and
-update last_vblank so the DRM layer won't think our counters
-overflowed.
-
-This patch fixes the following intel-gpu-tools test:
-./kms_flip --run-subtest blocking-absolute-wf_vblank
-
-Regression introduced by the following commit:
-
-commit bf51d5e2cda5d36d98e4b46ac7fca9461e512c41
-Author: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date:   Wed Jul 3 17:12:13 2013 -0300
-    drm/i915: switch disable_power_well default value to 1
-
-Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=66808
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-[danvet: Added a comment that this might be better done in
-drm_vblank_post_modeset in general.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 9dbd8febb4dbc9199fcf340b882eb930e36b65b6)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 18 ++++++++++++++++++
- 1 file changed, 18 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index f895d1508df8..b0e4a0bd1313 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -5063,8 +5063,26 @@ static void __intel_set_power_well(struct drm_device *dev, bool enable)
- 		}
- 	} else {
- 		if (enable_requested) {
-+			unsigned long irqflags;
-+			enum pipe p;
-+
- 			I915_WRITE(HSW_PWR_WELL_DRIVER, 0);
-+			POSTING_READ(HSW_PWR_WELL_DRIVER);
- 			DRM_DEBUG_KMS("Requesting to disable the power well\n");
-+
-+			/*
-+			 * After this, the registers on the pipes that are part
-+			 * of the power well will become zero, so we have to
-+			 * adjust our counters according to that.
-+			 *
-+			 * FIXME: Should we do this in general in
-+			 * drm_vblank_post_modeset?
-+			 */
-+			spin_lock_irqsave(&dev->vbl_lock, irqflags);
-+			for_each_pipe(p)
-+				if (p != PIPE_A)
-+					dev->last_vblank[p] = 0;
-+			spin_unlock_irqrestore(&dev->vbl_lock, irqflags);
- 		}
- 	}
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0381-drm-i915-avoid-brightness-overflow-when-doing-scale.patch b/patches.baytrail/0381-drm-i915-avoid-brightness-overflow-when-doing-scale.patch
deleted file mode 100644
index f0959b9094df7..0000000000000
--- a/patches.baytrail/0381-drm-i915-avoid-brightness-overflow-when-doing-scale.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From 14e2b8a2e963c015372733d3d0950384ee5fa4fb Mon Sep 17 00:00:00 2001
-From: Aaron Lu <aaron.lu@intel.com>
-Date: Fri, 2 Aug 2013 09:16:03 +0800
-Subject: drm/i915: avoid brightness overflow when doing scale
-
-Some card's max brightness level is pretty large, e.g. on Acer Aspire
-4732Z, the max level is 989910. If user space set a large enough level
-then the current scale done in intel_panel_set_backlight will cause an
-integer overflow and the scaled level will be mistakenly small, leaving
-user with an almost black screen. This patch fixes this problem.
-
-Signed-off-by: Aaron Lu <aaron.lu@intel.com>
-[danvet: Add a comment to explain what's going on.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 22505b82a2800bddb67908522833bef96dd15845)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_panel.c | 7 +++++--
- 1 file changed, 5 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
-index 67e2c1f1c9a8..5063eadac3ef 100644
---- a/drivers/gpu/drm/i915/intel_panel.c
-+++ b/drivers/gpu/drm/i915/intel_panel.c
-@@ -497,8 +497,11 @@ void intel_panel_set_backlight(struct drm_device *dev, u32 level, u32 max)
- 		goto out;
- 	}
- 
--	/* scale to hardware */
--	level = level * freq / max;
-+	/* scale to hardware, but be careful to not overflow */
-+	if (freq < max)
-+		level = level * freq / max;
-+	else
-+		level = freq / max * level;
- 
- 	dev_priv->backlight.level = level;
- 	if (dev_priv->backlight.device)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0382-drm-i915-Don-t-call-encoder-s-get_config-unless-enco.patch b/patches.baytrail/0382-drm-i915-Don-t-call-encoder-s-get_config-unless-enco.patch
deleted file mode 100644
index 385a502ad330d..0000000000000
--- a/patches.baytrail/0382-drm-i915-Don-t-call-encoder-s-get_config-unless-enco.patch
+++ /dev/null
@@ -1,72 +0,0 @@
-From 51bd061c699974f196f8e13c602283ed55837d1c Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Mon, 5 Aug 2013 17:57:48 +0300
-Subject: drm/i915: Don't call encoder's get_config unless encoder is active
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The SDVO code tries to compare the encoder's and crtc's idea of the
-pixel_multiplier. Normally they have to match, but when transitioning
-to DPMS off, we turn off the pipe before reading out the pipe_config,
-so the pixel_multiplier in the pipe_config will be 0, whereas the
-encoder will still have its pixel_multiplier set to whatever value we
-were using when the display was active. This leads to a warning
-from intel_modeset_check_state().
-
-WARNING: CPU: 1 PID: 2846 at drivers/gpu/drm/i915/intel_sdvo.c:1378 intel_sdvo_get_config+0x158/0x160()
-SDVO pixel multiplier mismatch, port: 0, encoder: 1
-Modules linked in: snd_hda_codec_idt snd_hda_intel snd_hda_codec snd_hwdep
-CPU: 1 PID: 2846 Comm: Xorg Not tainted 3.11.0-rc3-00208-gbe1e8d7-dirty #19
-Hardware name: Apple Computer, Inc. Macmini1,1/Mac-F4208EC8, BIOS  MM11.88Z.0055.B03.0604071521 04/07/06
- 00000000 00000000 ef0afa54 c1597bbb c1737ea4 ef0afa84 c10392ca c1737e6c
- ef0afab0 00000b1e c1737ea4 00000562 c12dfbe8 c12dfbe8 ef0afb14 00000000
- f697ec00 ef0afa9c c103936e 00000009 ef0afa94 c1737e6c ef0afab0 ef0afadc
-Call Trace:
- [<c1597bbb>] dump_stack+0x41/0x56
- [<c10392ca>] warn_slowpath_common+0x7a/0xa0
- [<c103936e>] warn_slowpath_fmt+0x2e/0x30
- [<c12dfbe8>] intel_sdvo_get_config+0x158/0x160
- [<c12c3220>] check_crtc_state+0x1e0/0xb10
- [<c12cdc7d>] intel_modeset_check_state+0x29d/0x7c0
- [<c12dfe5c>] intel_sdvo_dpms+0x5c/0xa0
- [<c12985de>] drm_mode_obj_set_property_ioctl+0x40e/0x420
- [<c1298625>] drm_mode_connector_property_set_ioctl+0x35/0x40
- [<c1289294>] drm_ioctl+0x3e4/0x540
- [<c10fc1a2>] do_vfs_ioctl+0x72/0x570
- [<c10fc72f>] SyS_ioctl+0x8f/0xa0
- [<c159b7fa>] sysenter_do_call+0x12/0x22
----[ end trace 7ce940aff1366d60 ]---
-
-Fix the problem by skipping the encoder get_config() function for
-inactive encoders.
-
-Tested-by: Linus Torvalds <torvalds@linux-foundation.org>
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 3eaba51cd399f5362a9fd9ebd5fb8b625b454271)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 4 +++-
- 1 file changed, 3 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index cd93b1b1840d..f0701147a68a 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -8273,9 +8273,11 @@ check_crtc_state(struct drm_device *dev)
- 
- 		list_for_each_entry(encoder, &dev->mode_config.encoder_list,
- 				    base.head) {
-+			enum pipe pipe;
- 			if (encoder->base.crtc != &crtc->base)
- 				continue;
--			if (encoder->get_config)
-+			if (encoder->get_config &&
-+			    encoder->get_hw_state(encoder, &pipe))
- 				encoder->get_config(encoder, &pipe_config);
- 		}
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0383-drm-i915-do-not-disable-backlight-on-vgaswitcheroo-s.patch b/patches.baytrail/0383-drm-i915-do-not-disable-backlight-on-vgaswitcheroo-s.patch
deleted file mode 100644
index 7661df9d91567..0000000000000
--- a/patches.baytrail/0383-drm-i915-do-not-disable-backlight-on-vgaswitcheroo-s.patch
+++ /dev/null
@@ -1,62 +0,0 @@
-From 2df6459e273480b665df692627bf4611e68496ed Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Thu, 25 Jul 2013 14:31:30 +0300
-Subject: drm/i915: do not disable backlight on vgaswitcheroo switch off
-
-On muxed systems, the other vgaswitcheroo client may depend on i915 to
-handle the backlight. We began switching off the backlight since
-
-commit a261b246ebd552fd5d5a8ed84cc931bb821c427f
-Author: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date:   Thu Jul 26 19:21:47 2012 +0200
-
-    drm/i915: disable all crtcs at suspend time
-
-breaking backlight on discreet graphics in (some) muxed systems.
-
-Keep the backlight on when the state is changed through vgaswitcheroo.
-
-Note: The alternative would be to add a quirk table to achieve the same
-based on system identifiers, but AFAICS it would asymptotically approach
-effectively the same as this patch as more IDs are added, but with the
-maintenance burden of the quirk table.
-
-Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=55311
-Tested-by: Fede <fedevx@yahoo.com>
-Tested-by: Aximab <laurent.debian@gmail.com>
-Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=59785
-Tested-by: sfievet <sebastien.fievet@free.fr>
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Cc: stable@vger.kernel.org
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 3f577573cd5482a32f85bd131e52f7cb4b9ac518)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_panel.c | 11 +++++++++++
- 1 file changed, 11 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
-index 5063eadac3ef..5950888ae1d0 100644
---- a/drivers/gpu/drm/i915/intel_panel.c
-+++ b/drivers/gpu/drm/i915/intel_panel.c
-@@ -518,6 +518,17 @@ void intel_panel_disable_backlight(struct drm_device *dev)
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	unsigned long flags;
- 
-+	/*
-+	 * Do not disable backlight on the vgaswitcheroo path. When switching
-+	 * away from i915, the other client may depend on i915 to handle the
-+	 * backlight. This will leave the backlight on unnecessarily when
-+	 * another client is not activated.
-+	 */
-+	if (dev->switch_power_state == DRM_SWITCH_POWER_CHANGING) {
-+		DRM_DEBUG_DRIVER("Skipping backlight disable on vga switch\n");
-+		return;
-+	}
-+
- 	spin_lock_irqsave(&dev_priv->backlight.lock, flags);
- 
- 	dev_priv->backlight.enabled = false;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0384-drm-i915-unpin-backing-storage-in-dmabuf_unmap.patch b/patches.baytrail/0384-drm-i915-unpin-backing-storage-in-dmabuf_unmap.patch
deleted file mode 100644
index 5e6ebac28a7fc..0000000000000
--- a/patches.baytrail/0384-drm-i915-unpin-backing-storage-in-dmabuf_unmap.patch
+++ /dev/null
@@ -1,56 +0,0 @@
-From edb774d58c6b800ab1b7bbfebeca5eb96bf57e61 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 8 Aug 2013 09:10:37 +0200
-Subject: drm/i915: unpin backing storage in dmabuf_unmap
-
-This fixes a WARN in i915_gem_free_object when the
-obj->pages_pin_count isn't 0.
-
-v2: Add locking to unmap, noticed by Chris Wilson. Note that even
-though we call unmap with our own dev->struct_mutex held that won't
-result in an immediate deadlock since we never go through the dma_buf
-interfaces for our own, reimported buffers. But it's still easy to
-blow up and anger lockdep, but that's already the case with our ->map
-implementation. Fixing this for real will involve per dma-buf ww mutex
-locking by the callers. And lots of fun. So go with the duct-tape
-approach for now.
-
-Cc: Chris Wilson <chris@chris-wilson.co.uk>
-Reported-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
-Cc: Maarten Lankhorst <maarten.lankhorst@canonical.com>
-Tested-by: Armin K. <krejzi@email.com> (v1)
-Tested-by: Dave Airlie <airlied@redhat.com>
-Acked-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Signed-off-by: Dave Airlie <airlied@gmail.com>
-(cherry picked from commit eb91626ac4b9af3d5602a7db888b8bc4cb23eb3b)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem_dmabuf.c | 8 ++++++++
- 1 file changed, 8 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem_dmabuf.c b/drivers/gpu/drm/i915/i915_gem_dmabuf.c
-index dc53a527126b..9e6578330801 100644
---- a/drivers/gpu/drm/i915/i915_gem_dmabuf.c
-+++ b/drivers/gpu/drm/i915/i915_gem_dmabuf.c
-@@ -85,9 +85,17 @@ static void i915_gem_unmap_dma_buf(struct dma_buf_attachment *attachment,
- 				   struct sg_table *sg,
- 				   enum dma_data_direction dir)
- {
-+	struct drm_i915_gem_object *obj = attachment->dmabuf->priv;
-+
-+	mutex_lock(&obj->base.dev->struct_mutex);
-+
- 	dma_unmap_sg(attachment->dev, sg->sgl, sg->nents, dir);
- 	sg_free_table(sg);
- 	kfree(sg);
-+
-+	i915_gem_object_unpin_pages(obj);
-+
-+	mutex_unlock(&obj->base.dev->struct_mutex);
- }
- 
- static void i915_gem_dmabuf_release(struct dma_buf *dma_buf)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0385-drm-i915-Don-t-deref-pipe-cpu_transcoder-in-the-hang.patch b/patches.baytrail/0385-drm-i915-Don-t-deref-pipe-cpu_transcoder-in-the-hang.patch
deleted file mode 100644
index 446628842e38a..0000000000000
--- a/patches.baytrail/0385-drm-i915-Don-t-deref-pipe-cpu_transcoder-in-the-hang.patch
+++ /dev/null
@@ -1,210 +0,0 @@
-From 45c21a9c41e9dee8d3236f8fb3c9f7345121c0e1 Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Thu, 8 Aug 2013 15:12:06 +0200
-Subject: drm/i915: Don't deref pipe->cpu_transcoder in the hangcheck code
-
-If we get an error event really early in the driver setup sequence,
-which gen3 is especially prone to with various display GTT faults we
-Oops. So try to avoid this.
-
-Additionally with Haswell the transcoders are a separate bank of
-registers from the pipes (4 transcoders, 3 pipes). In event of an
-error, we want to be sure we have a complete and accurate picture of
-the machine state, so record all the transcoders in addition to all
-the active pipes.
-
-This regression has been introduced in
-
-commit 702e7a56af3780d8b3a717f698209bef44187bb0
-Author: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date:   Tue Oct 23 18:29:59 2012 -0200
-
-    drm/i915: convert PIPECONF to use transcoder instead of pipe
-
-Based on the patch "drm/i915: Dump all transcoder registers on error"
-from Chris Wilson:
-
-v2: Rebase so that we don't try to be clever and try to figure out the
-cpu transcoder from hw state. That exercise should be done when we
-analyze the error state offline.
-
-The actual bugfix is to not call intel_pipe_to_cpu_transcoder in the
-error state capture code in case the pipes aren't fully set up yet.
-
-v3: Simplifiy the err->num_transcoders computation a bit. While at it
-make the error capture stuff save on systems without a display block.
-
-v4: Fix fail, spotted by Jani.
-
-v5: Completely new commit message, cc: stable.
-
-Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Cc: Damien Lespiau <damien.lespiau@intel.com>
-Cc: Jani Nikula <jani.nikula@intel.com>
-Cc: Chris Wilson <chris@chris-wilson.co.uk>
-Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=60021
-Cc: stable@vger.kernel.org
-Tested-by: Dustin King <daking@rescomp.stanford.edu>
-Reviewed-by: Jani Nikula <jani.nikula@intel.com>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 63b66e5ba54b15a6592be00555d762db6db739ce)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c |   86 +++++++++++++++++++++++------------
- 1 file changed, 57 insertions(+), 29 deletions(-)
-
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -10049,6 +10049,8 @@ struct intel_display_error_state {
- 
- 	u32 power_well_driver;
- 
-+	int num_transcoders;
-+
- 	struct intel_cursor_error_state {
- 		u32 control;
- 		u32 position;
-@@ -10057,16 +10059,7 @@ struct intel_display_error_state {
- 	} cursor[I915_MAX_PIPES];
- 
- 	struct intel_pipe_error_state {
--		enum transcoder cpu_transcoder;
--		u32 conf;
- 		u32 source;
--
--		u32 htotal;
--		u32 hblank;
--		u32 hsync;
--		u32 vtotal;
--		u32 vblank;
--		u32 vsync;
- 	} pipe[I915_MAX_PIPES];
- 
- 	struct intel_plane_error_state {
-@@ -10078,6 +10071,19 @@ struct intel_display_error_state {
- 		u32 surface;
- 		u32 tile_offset;
- 	} plane[I915_MAX_PIPES];
-+
-+	struct intel_transcoder_error_state {
-+		enum transcoder cpu_transcoder;
-+
-+		u32 conf;
-+
-+		u32 htotal;
-+		u32 hblank;
-+		u32 hsync;
-+		u32 vtotal;
-+		u32 vblank;
-+		u32 vsync;
-+	} transcoder[4];
- };
- 
- struct intel_display_error_state *
-@@ -10085,9 +10091,17 @@ intel_display_capture_error_state(struct
- {
- 	drm_i915_private_t *dev_priv = dev->dev_private;
- 	struct intel_display_error_state *error;
--	enum transcoder cpu_transcoder;
-+	int transcoders[] = {
-+		TRANSCODER_A,
-+		TRANSCODER_B,
-+		TRANSCODER_C,
-+		TRANSCODER_EDP,
-+	};
- 	int i;
- 
-+	if (INTEL_INFO(dev)->num_pipes == 0)
-+		return NULL;
-+
- 	error = kmalloc(sizeof(*error), GFP_ATOMIC);
- 	if (error == NULL)
- 		return NULL;
-@@ -10096,9 +10110,6 @@ intel_display_capture_error_state(struct
- 		error->power_well_driver = I915_READ(HSW_PWR_WELL_DRIVER);
- 
- 	for_each_pipe(i) {
--		cpu_transcoder = intel_pipe_to_cpu_transcoder(dev_priv, i);
--		error->pipe[i].cpu_transcoder = cpu_transcoder;
--
- 		if (INTEL_INFO(dev)->gen <= 6 || IS_VALLEYVIEW(dev)) {
- 			error->cursor[i].control = I915_READ(CURCNTR(i));
- 			error->cursor[i].position = I915_READ(CURPOS(i));
-@@ -10122,14 +10133,25 @@ intel_display_capture_error_state(struct
- 			error->plane[i].tile_offset = I915_READ(DSPTILEOFF(i));
- 		}
- 
--		error->pipe[i].conf = I915_READ(PIPECONF(cpu_transcoder));
- 		error->pipe[i].source = I915_READ(PIPESRC(i));
--		error->pipe[i].htotal = I915_READ(HTOTAL(cpu_transcoder));
--		error->pipe[i].hblank = I915_READ(HBLANK(cpu_transcoder));
--		error->pipe[i].hsync = I915_READ(HSYNC(cpu_transcoder));
--		error->pipe[i].vtotal = I915_READ(VTOTAL(cpu_transcoder));
--		error->pipe[i].vblank = I915_READ(VBLANK(cpu_transcoder));
--		error->pipe[i].vsync = I915_READ(VSYNC(cpu_transcoder));
-+	}
-+
-+	error->num_transcoders = INTEL_INFO(dev)->num_pipes;
-+	if (HAS_DDI(dev_priv->dev))
-+		error->num_transcoders++; /* Account for eDP. */
-+
-+	for (i = 0; i < error->num_transcoders; i++) {
-+		enum transcoder cpu_transcoder = transcoders[i];
-+
-+		error->transcoder[i].cpu_transcoder = cpu_transcoder;
-+
-+		error->transcoder[i].conf = I915_READ(PIPECONF(cpu_transcoder));
-+		error->transcoder[i].htotal = I915_READ(HTOTAL(cpu_transcoder));
-+		error->transcoder[i].hblank = I915_READ(HBLANK(cpu_transcoder));
-+		error->transcoder[i].hsync = I915_READ(HSYNC(cpu_transcoder));
-+		error->transcoder[i].vtotal = I915_READ(VTOTAL(cpu_transcoder));
-+		error->transcoder[i].vblank = I915_READ(VBLANK(cpu_transcoder));
-+		error->transcoder[i].vsync = I915_READ(VSYNC(cpu_transcoder));
- 	}
- 
- 	/* In the code above we read the registers without checking if the power
-@@ -10151,22 +10173,16 @@ intel_display_print_error_state(struct d
- {
- 	int i;
- 
-+	if (!error)
-+		return;
-+
- 	err_printf(m, "Num Pipes: %d\n", INTEL_INFO(dev)->num_pipes);
- 	if (HAS_POWER_WELL(dev))
- 		err_printf(m, "PWR_WELL_CTL2: %08x\n",
- 			   error->power_well_driver);
- 	for_each_pipe(i) {
- 		err_printf(m, "Pipe [%d]:\n", i);
--		err_printf(m, "  CPU transcoder: %c\n",
--			   transcoder_name(error->pipe[i].cpu_transcoder));
--		err_printf(m, "  CONF: %08x\n", error->pipe[i].conf);
- 		err_printf(m, "  SRC: %08x\n", error->pipe[i].source);
--		err_printf(m, "  HTOTAL: %08x\n", error->pipe[i].htotal);
--		err_printf(m, "  HBLANK: %08x\n", error->pipe[i].hblank);
--		err_printf(m, "  HSYNC: %08x\n", error->pipe[i].hsync);
--		err_printf(m, "  VTOTAL: %08x\n", error->pipe[i].vtotal);
--		err_printf(m, "  VBLANK: %08x\n", error->pipe[i].vblank);
--		err_printf(m, "  VSYNC: %08x\n", error->pipe[i].vsync);
- 
- 		err_printf(m, "Plane [%d]:\n", i);
- 		err_printf(m, "  CNTR: %08x\n", error->plane[i].control);
-@@ -10187,5 +10203,17 @@ intel_display_print_error_state(struct d
- 		err_printf(m, "  POS: %08x\n", error->cursor[i].position);
- 		err_printf(m, "  BASE: %08x\n", error->cursor[i].base);
- 	}
-+
-+	for (i = 0; i < error->num_transcoders; i++) {
-+		err_printf(m, "  CPU transcoder: %c\n",
-+			   transcoder_name(error->transcoder[i].cpu_transcoder));
-+		err_printf(m, "  CONF: %08x\n", error->transcoder[i].conf);
-+		err_printf(m, "  HTOTAL: %08x\n", error->transcoder[i].htotal);
-+		err_printf(m, "  HBLANK: %08x\n", error->transcoder[i].hblank);
-+		err_printf(m, "  HSYNC: %08x\n", error->transcoder[i].hsync);
-+		err_printf(m, "  VTOTAL: %08x\n", error->transcoder[i].vtotal);
-+		err_printf(m, "  VBLANK: %08x\n", error->transcoder[i].vblank);
-+		err_printf(m, "  VSYNC: %08x\n", error->transcoder[i].vsync);
-+	}
- }
- #endif
diff --git a/patches.baytrail/0386-drm-i915-Fix-whitespace-issue-in-i915_gem_gtt.patch b/patches.baytrail/0386-drm-i915-Fix-whitespace-issue-in-i915_gem_gtt.patch
deleted file mode 100644
index 13af21c58c08b..0000000000000
--- a/patches.baytrail/0386-drm-i915-Fix-whitespace-issue-in-i915_gem_gtt.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From 09323567097a7d0077577256c3819aa19b4c925c Mon Sep 17 00:00:00 2001
-From: James Ausmus <james.ausmus@intel.com>
-Date: Fri, 20 Sep 2013 15:40:40 -0700
-Subject: drm/i915: Fix whitespace issue in i915_gem_gtt
-
-This fixes the whitespace issue fixed up in the merge commit
-e1b73cba13a0cc68dd4f746eced15bd6bb24cda4 ("Merge tag 'v3.10-rc2' into
-drm-intel-next-queued")
-
-Signed-off-by: James Ausmus <james.ausmus@intel.com>
-(cherry picked from
- https://chromium.googlesource.com/chromiumos/third_party/kernel-next
- chromeos-3.10, 7ba2021ae44ef8d64d3d79b0b5f9e096395f160a)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem_gtt.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
-index 95acae13b059..5101ab6869b4 100644
---- a/drivers/gpu/drm/i915/i915_gem_gtt.c
-+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
-@@ -269,7 +269,7 @@ static int gen6_ppgtt_init(struct i915_hw_ppgtt *ppgtt)
- 	/* ppgtt PDEs reside in the global gtt pagetable, which has 512*1024
- 	 * entries. For aliasing ppgtt support we just steal them at the end for
- 	 * now. */
--       first_pd_entry_in_global_pt = gtt_total_entries(dev_priv->gtt);
-+	first_pd_entry_in_global_pt = gtt_total_entries(dev_priv->gtt);
- 
- 	if (IS_HASWELL(dev)) {
- 		ppgtt->pte_encode = hsw_pte_encode;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0387-drm-i915-invert-the-verbosity-of-intel_enable_fbc.patch b/patches.baytrail/0387-drm-i915-invert-the-verbosity-of-intel_enable_fbc.patch
deleted file mode 100644
index fd1f23068e10f..0000000000000
--- a/patches.baytrail/0387-drm-i915-invert-the-verbosity-of-intel_enable_fbc.patch
+++ /dev/null
@@ -1,47 +0,0 @@
-From 922bc2ad079155a1463179513bf881308329c070 Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Wed, 12 Jun 2013 17:27:29 -0300
-Subject: drm/i915: invert the verbosity of intel_enable_fbc
-
-We currently print a DRM_DEBUG_KMS message on the happy path and don't
-print anything on the "failed to allocate" path. On some desktop
-environments (e.g., Unity) I see the "scheduling delayed FBC enable"
-thousands and thousands of times on my dmesg.
-
-So kill the useless message for the happy case, saving a lot of dmesg
-space, and properly signal the "kzalloc fail" case.
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Zoltan Nyul <zoltan.nyul@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 6cdcb5e73fba29bf115f2677c59de63f95039e2b)
-(cherry picked from drm-intel-next-queued)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 3 +--
- 1 file changed, 1 insertion(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index b0e4a0bd1313..bd7e682e12aa 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -381,6 +381,7 @@ void intel_enable_fbc(struct drm_crtc *crtc, unsigned long interval)
- 
- 	work = kzalloc(sizeof *work, GFP_KERNEL);
- 	if (work == NULL) {
-+		DRM_ERROR("Failed to allocate FBC work structure\n");
- 		dev_priv->display.enable_fbc(crtc, interval);
- 		return;
- 	}
-@@ -392,8 +393,6 @@ void intel_enable_fbc(struct drm_crtc *crtc, unsigned long interval)
- 
- 	dev_priv->fbc_work = work;
- 
--	DRM_DEBUG_KMS("scheduling delayed FBC enable\n");
--
- 	/* Delay the actual enabling to let pageflipping cease and the
- 	 * display to settle before starting the compression. Note that
- 	 * this delay also serves a second purpose: it allows for a
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0388-drm-i915-Make-intel_enable_fbc-static.patch b/patches.baytrail/0388-drm-i915-Make-intel_enable_fbc-static.patch
deleted file mode 100644
index 7c8caba7ca9f8..0000000000000
--- a/patches.baytrail/0388-drm-i915-Make-intel_enable_fbc-static.patch
+++ /dev/null
@@ -1,45 +0,0 @@
-From 9425689ff1a2042db266d2f00b0dfef22b9eb483 Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Mon, 24 Jun 2013 16:22:01 +0100
-Subject: drm/i915: Make intel_enable_fbc() static
-
-This function has no user outside of intel_pm.c.
-
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit b63fb44c65ac37ceac8acd258939fcdc9f223c42)
-(cherry picked from drm-intel-next-queued)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_drv.h | 1 -
- drivers/gpu/drm/i915/intel_pm.c  | 2 +-
- 2 files changed, 1 insertion(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index b7d6e09456ce..d03c2c8a06b1 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -780,7 +780,6 @@ extern int intel_sprite_get_colorkey(struct drm_device *dev, void *data,
- extern void intel_init_pm(struct drm_device *dev);
- /* FBC */
- extern bool intel_fbc_enabled(struct drm_device *dev);
--extern void intel_enable_fbc(struct drm_crtc *crtc, unsigned long interval);
- extern void intel_update_fbc(struct drm_device *dev);
- /* IPS */
- extern void intel_gpu_ips_init(struct drm_i915_private *dev_priv);
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index bd7e682e12aa..692ebc89df17 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -368,7 +368,7 @@ static void intel_cancel_fbc_work(struct drm_i915_private *dev_priv)
- 	dev_priv->fbc_work = NULL;
- }
- 
--void intel_enable_fbc(struct drm_crtc *crtc, unsigned long interval)
-+static void intel_enable_fbc(struct drm_crtc *crtc, unsigned long interval)
- {
- 	struct intel_fbc_work *work;
- 	struct drm_device *dev = crtc->dev;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0389-drm-i915-Fix-reason-for-per-chip-disabling-of-FBC.patch b/patches.baytrail/0389-drm-i915-Fix-reason-for-per-chip-disabling-of-FBC.patch
deleted file mode 100644
index 29eb3c516ca1c..0000000000000
--- a/patches.baytrail/0389-drm-i915-Fix-reason-for-per-chip-disabling-of-FBC.patch
+++ /dev/null
@@ -1,89 +0,0 @@
-From 112f55523a93f5ab380c312344ed96b2ddd5fdca Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Mon, 24 Jun 2013 16:22:02 +0100
-Subject: drm/i915: Fix reason for per-chip disabling of FBC
-
-When running on my snb machine, recent kernels display successively:
-
-[drm:intel_update_fbc], fbc set to per-chip default
-[drm:intel_update_fbc], fbc disabled per module param
-
-But no module param is set. This happens because the check for the
-module parameter uses a variable that has been overridden inside the
-"per-chip default" code.
-
-Fix up the logic and add another reason for the FBC to the be disabled.
-
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 8a5729a37375c20a196e14ce49b4390d42bdb87b)
-(cherry picked from drm-intel-next-queued)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_debugfs.c |  3 +++
- drivers/gpu/drm/i915/i915_drv.h     |  1 +
- drivers/gpu/drm/i915/intel_pm.c     | 14 ++++++--------
- 3 files changed, 10 insertions(+), 8 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
-index 47d6c748057e..dca49828e3fc 100644
---- a/drivers/gpu/drm/i915/i915_debugfs.c
-+++ b/drivers/gpu/drm/i915/i915_debugfs.c
-@@ -1518,6 +1518,9 @@ static int i915_fbc_status(struct seq_file *m, void *unused)
- 		case FBC_MODULE_PARAM:
- 			seq_printf(m, "disabled per module param (default off)");
- 			break;
-+		case FBC_CHIP_DEFAULT:
-+			seq_printf(m, "disabled per chip default");
-+			break;
- 		default:
- 			seq_printf(m, "unknown reason");
- 		}
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 1929bffc1c77..9ad49335e808 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -537,6 +537,7 @@ enum no_fbc_reason {
- 	FBC_NOT_TILED, /* buffer not tiled */
- 	FBC_MULTIPLE_PIPES, /* more than one pipe active */
- 	FBC_MODULE_PARAM,
-+	FBC_CHIP_DEFAULT, /* disabled by default on this chip */
- };
- 
- enum intel_pch {
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 692ebc89df17..941af917388b 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -447,7 +447,6 @@ void intel_update_fbc(struct drm_device *dev)
- 	struct drm_framebuffer *fb;
- 	struct intel_framebuffer *intel_fb;
- 	struct drm_i915_gem_object *obj;
--	int enable_fbc;
- 	unsigned int max_hdisplay, max_vdisplay;
- 
- 	if (!i915_powersave)
-@@ -488,14 +487,13 @@ void intel_update_fbc(struct drm_device *dev)
- 	intel_fb = to_intel_framebuffer(fb);
- 	obj = intel_fb->obj;
- 
--	enable_fbc = i915_enable_fbc;
--	if (enable_fbc < 0) {
--		DRM_DEBUG_KMS("fbc set to per-chip default\n");
--		enable_fbc = 1;
--		if (INTEL_INFO(dev)->gen <= 7 && !IS_HASWELL(dev))
--			enable_fbc = 0;
-+	if (i915_enable_fbc < 0 &&
-+	    INTEL_INFO(dev)->gen <= 7 && !IS_HASWELL(dev)) {
-+		DRM_DEBUG_KMS("disabled per chip default\n");
-+		dev_priv->no_fbc_reason = FBC_CHIP_DEFAULT;
-+		goto out_disable;
- 	}
--	if (!enable_fbc) {
-+	if (!i915_enable_fbc) {
- 		DRM_DEBUG_KMS("fbc disabled per module param\n");
- 		dev_priv->no_fbc_reason = FBC_MODULE_PARAM;
- 		goto out_disable;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0390-drm-i915-Use-seq_puts-seq_putc-when-possible.patch b/patches.baytrail/0390-drm-i915-Use-seq_puts-seq_putc-when-possible.patch
deleted file mode 100644
index dad17e753457f..0000000000000
--- a/patches.baytrail/0390-drm-i915-Use-seq_puts-seq_putc-when-possible.patch
+++ /dev/null
@@ -1,342 +0,0 @@
-From 5e7ecc7c730ed71c82383a66afb87307e5f5b7dd Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Mon, 24 Jun 2013 22:59:48 +0100
-Subject: drm/i915: Use seq_puts/seq_putc when possible
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Caught with checkpatch.pl.
-
-Suggested-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 267f0c90ac6728f70fade74ab89932a00e5e5a7e)
-(cherry picked from drm-intel-next-queued)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_debugfs.c | 110 ++++++++++++++++++------------------
- 1 file changed, 55 insertions(+), 55 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
-index dca49828e3fc..b1e91f33e377 100644
---- a/drivers/gpu/drm/i915/i915_debugfs.c
-+++ b/drivers/gpu/drm/i915/i915_debugfs.c
-@@ -157,11 +157,11 @@ static int i915_gem_object_list_info(struct seq_file *m, void *data)
- 
- 	switch (list) {
- 	case ACTIVE_LIST:
--		seq_printf(m, "Active:\n");
-+		seq_puts(m, "Active:\n");
- 		head = &dev_priv->mm.active_list;
- 		break;
- 	case INACTIVE_LIST:
--		seq_printf(m, "Inactive:\n");
-+		seq_puts(m, "Inactive:\n");
- 		head = &dev_priv->mm.inactive_list;
- 		break;
- 	default:
-@@ -171,9 +171,9 @@ static int i915_gem_object_list_info(struct seq_file *m, void *data)
- 
- 	total_obj_size = total_gtt_size = count = 0;
- 	list_for_each_entry(obj, head, mm_list) {
--		seq_printf(m, "   ");
-+		seq_puts(m, "   ");
- 		describe_obj(m, obj);
--		seq_printf(m, "\n");
-+		seq_putc(m, '\n');
- 		total_obj_size += obj->base.size;
- 		total_gtt_size += obj->gtt_space->size;
- 		count++;
-@@ -290,7 +290,7 @@ static int i915_gem_object_info(struct seq_file *m, void* data)
- 		   dev_priv->gtt.total,
- 		   dev_priv->gtt.mappable_end - dev_priv->gtt.start);
- 
--	seq_printf(m, "\n");
-+	seq_putc(m, '\n');
- 	list_for_each_entry_reverse(file, &dev->filelist, lhead) {
- 		struct file_stats stats;
- 
-@@ -329,9 +329,9 @@ static int i915_gem_gtt_info(struct seq_file *m, void* data)
- 		if (list == PINNED_LIST && obj->pin_count == 0)
- 			continue;
- 
--		seq_printf(m, "   ");
-+		seq_puts(m, "   ");
- 		describe_obj(m, obj);
--		seq_printf(m, "\n");
-+		seq_putc(m, '\n');
- 		total_obj_size += obj->base.size;
- 		total_gtt_size += obj->gtt_space->size;
- 		count++;
-@@ -371,9 +371,9 @@ static int i915_gem_pageflip_info(struct seq_file *m, void *data)
- 					   pipe, plane);
- 			}
- 			if (work->enable_stall_check)
--				seq_printf(m, "Stall check enabled, ");
-+				seq_puts(m, "Stall check enabled, ");
- 			else
--				seq_printf(m, "Stall check waiting for page flip ioctl, ");
-+				seq_puts(m, "Stall check waiting for page flip ioctl, ");
- 			seq_printf(m, "%d prepares\n", atomic_read(&work->pending));
- 
- 			if (work->old_fb_obj) {
-@@ -424,7 +424,7 @@ static int i915_gem_request_info(struct seq_file *m, void *data)
- 	mutex_unlock(&dev->struct_mutex);
- 
- 	if (count == 0)
--		seq_printf(m, "No requests\n");
-+		seq_puts(m, "No requests\n");
- 
- 	return 0;
- }
-@@ -574,10 +574,10 @@ static int i915_gem_fence_regs_info(struct seq_file *m, void *data)
- 		seq_printf(m, "Fence %d, pin count = %d, object = ",
- 			   i, dev_priv->fence_regs[i].pin_count);
- 		if (obj == NULL)
--			seq_printf(m, "unused");
-+			seq_puts(m, "unused");
- 		else
- 			describe_obj(m, obj);
--		seq_printf(m, "\n");
-+		seq_putc(m, '\n');
- 	}
- 
- 	mutex_unlock(&dev->struct_mutex);
-@@ -1246,7 +1246,7 @@ static int i915_cur_delayinfo(struct seq_file *m, void *unused)
- 					(freq_sts >> 8) & 0xff));
- 		mutex_unlock(&dev_priv->rps.hw_lock);
- 	} else {
--		seq_printf(m, "no P-state info available\n");
-+		seq_puts(m, "no P-state info available\n");
- 	}
- 
- 	return 0;
-@@ -1341,28 +1341,28 @@ static int ironlake_drpc_info(struct seq_file *m)
- 	seq_printf(m, "RS2 VID: %d\n", ((crstandvid >> 8) & 0x3f));
- 	seq_printf(m, "Render standby enabled: %s\n",
- 		   (rstdbyctl & RCX_SW_EXIT) ? "no" : "yes");
--	seq_printf(m, "Current RS state: ");
-+	seq_puts(m, "Current RS state: ");
- 	switch (rstdbyctl & RSX_STATUS_MASK) {
- 	case RSX_STATUS_ON:
--		seq_printf(m, "on\n");
-+		seq_puts(m, "on\n");
- 		break;
- 	case RSX_STATUS_RC1:
--		seq_printf(m, "RC1\n");
-+		seq_puts(m, "RC1\n");
- 		break;
- 	case RSX_STATUS_RC1E:
--		seq_printf(m, "RC1E\n");
-+		seq_puts(m, "RC1E\n");
- 		break;
- 	case RSX_STATUS_RS1:
--		seq_printf(m, "RS1\n");
-+		seq_puts(m, "RS1\n");
- 		break;
- 	case RSX_STATUS_RS2:
--		seq_printf(m, "RS2 (RC6)\n");
-+		seq_puts(m, "RS2 (RC6)\n");
- 		break;
- 	case RSX_STATUS_RS3:
--		seq_printf(m, "RC3 (RC6+)\n");
-+		seq_puts(m, "RC3 (RC6+)\n");
- 		break;
- 	default:
--		seq_printf(m, "unknown\n");
-+		seq_puts(m, "unknown\n");
- 		break;
- 	}
- 
-@@ -1389,8 +1389,8 @@ static int gen6_drpc_info(struct seq_file *m)
- 	spin_unlock_irq(&dev_priv->gt_lock);
- 
- 	if (forcewake_count) {
--		seq_printf(m, "RC information inaccurate because somebody "
--			      "holds a forcewake reference \n");
-+		seq_puts(m, "RC information inaccurate because somebody "
-+			    "holds a forcewake reference \n");
- 	} else {
- 		/* NB: we cannot use forcewake, else we read the wrong values */
- 		while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK) & 1))
-@@ -1423,25 +1423,25 @@ static int gen6_drpc_info(struct seq_file *m)
- 		   yesno(rcctl1 & GEN6_RC_CTL_RC6p_ENABLE));
- 	seq_printf(m, "Deepest RC6 Enabled: %s\n",
- 		   yesno(rcctl1 & GEN6_RC_CTL_RC6pp_ENABLE));
--	seq_printf(m, "Current RC state: ");
-+	seq_puts(m, "Current RC state: ");
- 	switch (gt_core_status & GEN6_RCn_MASK) {
- 	case GEN6_RC0:
- 		if (gt_core_status & GEN6_CORE_CPD_STATE_MASK)
--			seq_printf(m, "Core Power Down\n");
-+			seq_puts(m, "Core Power Down\n");
- 		else
--			seq_printf(m, "on\n");
-+			seq_puts(m, "on\n");
- 		break;
- 	case GEN6_RC3:
--		seq_printf(m, "RC3\n");
-+		seq_puts(m, "RC3\n");
- 		break;
- 	case GEN6_RC6:
--		seq_printf(m, "RC6\n");
-+		seq_puts(m, "RC6\n");
- 		break;
- 	case GEN6_RC7:
--		seq_printf(m, "RC7\n");
-+		seq_puts(m, "RC7\n");
- 		break;
- 	default:
--		seq_printf(m, "Unknown\n");
-+		seq_puts(m, "Unknown\n");
- 		break;
- 	}
- 
-@@ -1485,46 +1485,46 @@ static int i915_fbc_status(struct seq_file *m, void *unused)
- 	drm_i915_private_t *dev_priv = dev->dev_private;
- 
- 	if (!I915_HAS_FBC(dev)) {
--		seq_printf(m, "FBC unsupported on this chipset\n");
-+		seq_puts(m, "FBC unsupported on this chipset\n");
- 		return 0;
- 	}
- 
- 	if (intel_fbc_enabled(dev)) {
--		seq_printf(m, "FBC enabled\n");
-+		seq_puts(m, "FBC enabled\n");
- 	} else {
--		seq_printf(m, "FBC disabled: ");
-+		seq_puts(m, "FBC disabled: ");
- 		switch (dev_priv->no_fbc_reason) {
- 		case FBC_NO_OUTPUT:
--			seq_printf(m, "no outputs");
-+			seq_puts(m, "no outputs");
- 			break;
- 		case FBC_STOLEN_TOO_SMALL:
--			seq_printf(m, "not enough stolen memory");
-+			seq_puts(m, "not enough stolen memory");
- 			break;
- 		case FBC_UNSUPPORTED_MODE:
--			seq_printf(m, "mode not supported");
-+			seq_puts(m, "mode not supported");
- 			break;
- 		case FBC_MODE_TOO_LARGE:
--			seq_printf(m, "mode too large");
-+			seq_puts(m, "mode too large");
- 			break;
- 		case FBC_BAD_PLANE:
--			seq_printf(m, "FBC unsupported on plane");
-+			seq_puts(m, "FBC unsupported on plane");
- 			break;
- 		case FBC_NOT_TILED:
--			seq_printf(m, "scanout buffer not tiled");
-+			seq_puts(m, "scanout buffer not tiled");
- 			break;
- 		case FBC_MULTIPLE_PIPES:
--			seq_printf(m, "multiple pipes are enabled");
-+			seq_puts(m, "multiple pipes are enabled");
- 			break;
- 		case FBC_MODULE_PARAM:
--			seq_printf(m, "disabled per module param (default off)");
-+			seq_puts(m, "disabled per module param (default off)");
- 			break;
- 		case FBC_CHIP_DEFAULT:
--			seq_printf(m, "disabled per chip default");
-+			seq_puts(m, "disabled per chip default");
- 			break;
- 		default:
--			seq_printf(m, "unknown reason");
-+			seq_puts(m, "unknown reason");
- 		}
--		seq_printf(m, "\n");
-+		seq_putc(m, '\n');
- 	}
- 	return 0;
- }
-@@ -1607,7 +1607,7 @@ static int i915_ring_freq_table(struct seq_file *m, void *unused)
- 	int gpu_freq, ia_freq;
- 
- 	if (!(IS_GEN6(dev) || IS_GEN7(dev))) {
--		seq_printf(m, "unsupported on this chipset\n");
-+		seq_puts(m, "unsupported on this chipset\n");
- 		return 0;
- 	}
- 
-@@ -1615,7 +1615,7 @@ static int i915_ring_freq_table(struct seq_file *m, void *unused)
- 	if (ret)
- 		return ret;
- 
--	seq_printf(m, "GPU freq (MHz)\tEffective CPU freq (MHz)\tEffective Ring freq (MHz)\n");
-+	seq_puts(m, "GPU freq (MHz)\tEffective CPU freq (MHz)\tEffective Ring freq (MHz)\n");
- 
- 	for (gpu_freq = dev_priv->rps.min_delay;
- 	     gpu_freq <= dev_priv->rps.max_delay;
-@@ -1704,7 +1704,7 @@ static int i915_gem_framebuffer_info(struct seq_file *m, void *data)
- 		   fb->base.bits_per_pixel,
- 		   atomic_read(&fb->base.refcount.refcount));
- 	describe_obj(m, fb->obj);
--	seq_printf(m, "\n");
-+	seq_putc(m, '\n');
- 	mutex_unlock(&dev->mode_config.mutex);
- 
- 	mutex_lock(&dev->mode_config.fb_lock);
-@@ -1719,7 +1719,7 @@ static int i915_gem_framebuffer_info(struct seq_file *m, void *data)
- 			   fb->base.bits_per_pixel,
- 			   atomic_read(&fb->base.refcount.refcount));
- 		describe_obj(m, fb->obj);
--		seq_printf(m, "\n");
-+		seq_putc(m, '\n');
- 	}
- 	mutex_unlock(&dev->mode_config.fb_lock);
- 
-@@ -1739,22 +1739,22 @@ static int i915_context_status(struct seq_file *m, void *unused)
- 		return ret;
- 
- 	if (dev_priv->ips.pwrctx) {
--		seq_printf(m, "power context ");
-+		seq_puts(m, "power context ");
- 		describe_obj(m, dev_priv->ips.pwrctx);
--		seq_printf(m, "\n");
-+		seq_putc(m, '\n');
- 	}
- 
- 	if (dev_priv->ips.renderctx) {
--		seq_printf(m, "render context ");
-+		seq_puts(m, "render context ");
- 		describe_obj(m, dev_priv->ips.renderctx);
--		seq_printf(m, "\n");
-+		seq_putc(m, '\n');
- 	}
- 
- 	for_each_ring(ring, dev_priv, i) {
- 		if (ring->default_context) {
- 			seq_printf(m, "HW default context %s ring ", ring->name);
- 			describe_obj(m, ring->default_context->obj);
--			seq_printf(m, "\n");
-+			seq_putc(m, '\n');
- 		}
- 	}
- 
-@@ -1871,7 +1871,7 @@ static int i915_ppgtt_info(struct seq_file *m, void *data)
- 	if (dev_priv->mm.aliasing_ppgtt) {
- 		struct i915_hw_ppgtt *ppgtt = dev_priv->mm.aliasing_ppgtt;
- 
--		seq_printf(m, "aliasing PPGTT:\n");
-+		seq_puts(m, "aliasing PPGTT:\n");
- 		seq_printf(m, "pd gtt offset: 0x%08x\n", ppgtt->pd_offset);
- 	}
- 	seq_printf(m, "ECOCHK: 0x%08x\n", I915_READ(GAM_ECOCHK));
-@@ -1889,7 +1889,7 @@ static int i915_dpio_info(struct seq_file *m, void *data)
- 
- 
- 	if (!IS_VALLEYVIEW(dev)) {
--		seq_printf(m, "unsupported\n");
-+		seq_puts(m, "unsupported\n");
- 		return 0;
- 	}
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0391-drm-i915-Fix-a-few-style-issues-found-by-checkpatch..patch b/patches.baytrail/0391-drm-i915-Fix-a-few-style-issues-found-by-checkpatch..patch
deleted file mode 100644
index f619fbb887e2b..0000000000000
--- a/patches.baytrail/0391-drm-i915-Fix-a-few-style-issues-found-by-checkpatch..patch
+++ /dev/null
@@ -1,64 +0,0 @@
-From bfaa03679330bba834611cc9a79c733a6c4fc1f2 Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Mon, 24 Jun 2013 22:59:49 +0100
-Subject: drm/i915: Fix a few style issues found by checkpatch.pl
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Missing spaces and misplaced '*'.
-
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit aee56cff333d15e14c5bb2ff3b1e5c7cd15c3805)
-(cherry picked from drm-intel-next-queued)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_debugfs.c | 9 ++++-----
- 1 file changed, 4 insertions(+), 5 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
-index b1e91f33e377..c16926ca15be 100644
---- a/drivers/gpu/drm/i915/i915_debugfs.c
-+++ b/drivers/gpu/drm/i915/i915_debugfs.c
-@@ -222,7 +222,7 @@ static int per_file_stats(int id, void *ptr, void *data)
- 	return 0;
- }
- 
--static int i915_gem_object_info(struct seq_file *m, void* data)
-+static int i915_gem_object_info(struct seq_file *m, void *data)
- {
- 	struct drm_info_node *node = (struct drm_info_node *) m->private;
- 	struct drm_device *dev = node->minor->dev;
-@@ -310,7 +310,7 @@ static int i915_gem_object_info(struct seq_file *m, void* data)
- 	return 0;
- }
- 
--static int i915_gem_gtt_info(struct seq_file *m, void* data)
-+static int i915_gem_gtt_info(struct seq_file *m, void *data)
- {
- 	struct drm_info_node *node = (struct drm_info_node *) m->private;
- 	struct drm_device *dev = node->minor->dev;
-@@ -1377,8 +1377,7 @@ static int gen6_drpc_info(struct seq_file *m)
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	u32 rpmodectl1, gt_core_status, rcctl1, rc6vids = 0;
- 	unsigned forcewake_count;
--	int count=0, ret;
--
-+	int count = 0, ret;
- 
- 	ret = mutex_lock_interruptible(&dev->struct_mutex);
- 	if (ret)
-@@ -1781,7 +1780,7 @@ static int i915_gen6_forcewake_count_info(struct seq_file *m, void *data)
- 
- static const char *swizzle_string(unsigned swizzle)
- {
--	switch(swizzle) {
-+	switch (swizzle) {
- 	case I915_BIT_6_SWIZZLE_NONE:
- 		return "none";
- 	case I915_BIT_6_SWIZZLE_9:
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0392-drm-i915-Fix-a-couple-of-should-it-be-static-sparse-.patch b/patches.baytrail/0392-drm-i915-Fix-a-couple-of-should-it-be-static-sparse-.patch
deleted file mode 100644
index 13e52317447d3..0000000000000
--- a/patches.baytrail/0392-drm-i915-Fix-a-couple-of-should-it-be-static-sparse-.patch
+++ /dev/null
@@ -1,47 +0,0 @@
-From cb11cdbd87e83fed0cfe774604b11873dde3d3fe Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Mon, 24 Jun 2013 22:59:50 +0100
-Subject: drm/i915: Fix a couple of "should it be static?" sparse warnings
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-A genuine 'static' omission and 2 other warnings triggered by not
-including the header where those functions where defined.
-
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit f4db9321a77258587d70cccdd4ff556df48eba2e)
-(cherry picked from drm-intel-next-queued)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 5 +++--
- 1 file changed, 3 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 941af917388b..217e5dd1b8ff 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -30,6 +30,7 @@
- #include "intel_drv.h"
- #include "../../../platform/x86/intel_ips.h"
- #include <linux/module.h>
-+#include <drm/i915_powerwell.h>
- 
- #define FORCEWAKE_ACK_TIMEOUT_MS 2
- 
-@@ -2465,8 +2466,8 @@ static void hsw_compute_wm_results(struct drm_device *dev,
- 
- /* Find the result with the highest level enabled. Check for enable_fbc_wm in
-  * case both are at the same level. Prefer r1 in case they're the same. */
--struct hsw_wm_values *hsw_find_best_result(struct hsw_wm_values *r1,
--					   struct hsw_wm_values *r2)
-+static struct hsw_wm_values *hsw_find_best_result(struct hsw_wm_values *r1,
-+						  struct hsw_wm_values *r2)
- {
- 	int i, val_r1 = 0, val_r2 = 0;
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0393-drm-i915-Bail-out-once-we-ve-found-the-context-objec.patch b/patches.baytrail/0393-drm-i915-Bail-out-once-we-ve-found-the-context-objec.patch
deleted file mode 100644
index 4d6f0950e9d2d..0000000000000
--- a/patches.baytrail/0393-drm-i915-Bail-out-once-we-ve-found-the-context-objec.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From 7f5fb26d47788591bb68203917bb57971a6ec2f1 Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Mon, 24 Jun 2013 14:54:50 +0100
-Subject: drm/i915: Bail out once we've found the context object
-
-Once we've found the the context object programmed in CCID, there's no
-need to look the other objects in the list.
-
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 3ef8fb5ae296c3b626b87ec1422aeb66dd338ee8)
-(cherry picked from drm-intel-next-queued)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index 7748dce240d8..6df227352fd3 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -1839,6 +1839,7 @@ static void i915_gem_record_active_context(struct intel_ring_buffer *ring,
- 		if ((error->ccid & PAGE_MASK) == obj->gtt_offset) {
- 			ering->ctx = i915_error_object_create_sized(dev_priv,
- 								    obj, 1);
-+			break;
- 		}
- 	}
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0394-drm-i915-consolidate-pch-pll-enable-sequence.patch b/patches.baytrail/0394-drm-i915-consolidate-pch-pll-enable-sequence.patch
deleted file mode 100644
index ba300962d4880..0000000000000
--- a/patches.baytrail/0394-drm-i915-consolidate-pch-pll-enable-sequence.patch
+++ /dev/null
@@ -1,207 +0,0 @@
-From db2baccdbf1f9a5a60c4f117b9d9d1739ea843d4 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Wed, 5 Jun 2013 13:34:23 +0200
-Subject: drm/i915: consolidate pch pll enable sequence
-
-It's been splattered over 3 different places all doing random things.
-Now we have (mostly) the same sequence as i8xx/i9xx, but all called
-from the crtc_enable hook (through the pll->enable function):
-- write new dividers
-- enable vco and wait for stable clocks
-- write again for the pixel mutliplier
-
-I've left the seemingly random 200 usec delay in there, just in case.
-
-Also move the encoder->pre_pll_enable hook into the crtc_enable
-function, at the same spot we currently have a hack to enable the lvds
-port. Since that hack is now redundant, kill it.
-
-While doing this patch I've learned the hard way that we can only fire
-up the LVDS port if both the pch dpll _and_ the fdi rc pll are not yet
-enabled. Otherwise things go haywire, at least on cpt.
-
-v2: It is paramount to write the FPx divisors before we enable the
-the vco by writing to the DPLL registers, for otherwise the divisors
-won't get updated. This is in line with the i8xx/i9xx dpll.
-
-v3: To keep the nice abstraction add a ->mode_set callback to set the
-divisors. Also streamline the enabling/disabling code a bit by
-removing some cargo-cult duplication and clearing registers where
-possible in the ->disable hook.
-
-v4: Remove now unused local variable.
-
-Acked-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 15bdd4cff43104cc0692f8694019c043cf19d102)
-(cherry picked from drm-intel-next-queued)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h      |  2 +
- drivers/gpu/drm/i915/intel_display.c | 75 +++++++++++++-----------------------
- 2 files changed, 29 insertions(+), 48 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 9ad49335e808..6a45c0539d7d 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -156,6 +156,8 @@ struct intel_shared_dpll {
- 	/* should match the index in the dev_priv->shared_dplls array */
- 	enum intel_dpll_id id;
- 	struct intel_dpll_hw_state hw_state;
-+	void (*mode_set)(struct drm_i915_private *dev_priv,
-+			 struct intel_shared_dpll *pll);
- 	void (*enable)(struct drm_i915_private *dev_priv,
- 		       struct intel_shared_dpll *pll);
- 	void (*disable)(struct drm_i915_private *dev_priv,
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index bde6a5547568..d1d7b77de30b 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -3096,13 +3096,7 @@ found:
- 		WARN_ON(pll->on);
- 		assert_shared_dpll_disabled(dev_priv, pll);
- 
--		/* Wait for the clocks to stabilize before rewriting the regs */
--		I915_WRITE(PCH_DPLL(pll->id), dpll & ~DPLL_VCO_ENABLE);
--		POSTING_READ(PCH_DPLL(pll->id));
--		udelay(150);
--
--		I915_WRITE(PCH_FP0(pll->id), fp);
--		I915_WRITE(PCH_DPLL(pll->id), dpll & ~DPLL_VCO_ENABLE);
-+		pll->mode_set(dev_priv, pll);
- 	}
- 	pll->refcount++;
- 
-@@ -3174,7 +3168,6 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc)
- 	struct intel_encoder *encoder;
- 	int pipe = intel_crtc->pipe;
- 	int plane = intel_crtc->plane;
--	u32 temp;
- 
- 	WARN_ON(!crtc->enabled);
- 
-@@ -3188,12 +3181,9 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc)
- 
- 	intel_update_watermarks(dev);
- 
--	if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) {
--		temp = I915_READ(PCH_LVDS);
--		if ((temp & LVDS_PORT_EN) == 0)
--			I915_WRITE(PCH_LVDS, temp | LVDS_PORT_EN);
--	}
--
-+	for_each_encoder_on_crtc(dev, crtc, encoder)
-+		if (encoder->pre_pll_enable)
-+			encoder->pre_pll_enable(encoder);
- 
- 	if (intel_crtc->config.has_pch_encoder) {
- 		/* Note: FDI PLL enabling _must_ be done before we enable the
-@@ -5720,10 +5710,6 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
- 	if (intel_crtc->config.has_dp_encoder)
- 		intel_dp_set_m_n(intel_crtc);
- 
--	for_each_encoder_on_crtc(dev, crtc, encoder)
--		if (encoder->pre_pll_enable)
--			encoder->pre_pll_enable(encoder);
--
- 	if (is_lvds && has_reduced_clock && i915_powersave)
- 		intel_crtc->lowfreq_avail = true;
- 	else
-@@ -5732,23 +5718,6 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
- 	if (intel_crtc->config.has_pch_encoder) {
- 		pll = intel_crtc_to_shared_dpll(intel_crtc);
- 
--		I915_WRITE(PCH_DPLL(pll->id), dpll);
--
--		/* Wait for the clocks to stabilize. */
--		POSTING_READ(PCH_DPLL(pll->id));
--		udelay(150);
--
--		/* The pixel multiplier can only be updated once the
--		 * DPLL is enabled and the clocks are stable.
--		 *
--		 * So write it again.
--		 */
--		I915_WRITE(PCH_DPLL(pll->id), dpll);
--
--		if (has_reduced_clock)
--			I915_WRITE(PCH_FP1(pll->id), fp2);
--		else
--			I915_WRITE(PCH_FP1(pll->id), fp);
- 	}
- 
- 	intel_set_pipe_timings(intel_crtc);
-@@ -8808,19 +8777,32 @@ static bool ibx_pch_dpll_get_hw_state(struct drm_i915_private *dev_priv,
- 	return val & DPLL_VCO_ENABLE;
- }
- 
-+static void ibx_pch_dpll_mode_set(struct drm_i915_private *dev_priv,
-+				  struct intel_shared_dpll *pll)
-+{
-+	I915_WRITE(PCH_FP0(pll->id), pll->hw_state.fp0);
-+	I915_WRITE(PCH_FP1(pll->id), pll->hw_state.fp1);
-+}
-+
- static void ibx_pch_dpll_enable(struct drm_i915_private *dev_priv,
- 				struct intel_shared_dpll *pll)
- {
--	uint32_t reg, val;
--
- 	/* PCH refclock must be enabled first */
- 	assert_pch_refclk_enabled(dev_priv);
- 
--	reg = PCH_DPLL(pll->id);
--	val = I915_READ(reg);
--	val |= DPLL_VCO_ENABLE;
--	I915_WRITE(reg, val);
--	POSTING_READ(reg);
-+	I915_WRITE(PCH_DPLL(pll->id), pll->hw_state.dpll);
-+
-+	/* Wait for the clocks to stabilize. */
-+	POSTING_READ(PCH_DPLL(pll->id));
-+	udelay(150);
-+
-+	/* The pixel multiplier can only be updated once the
-+	 * DPLL is enabled and the clocks are stable.
-+	 *
-+	 * So write it again.
-+	 */
-+	I915_WRITE(PCH_DPLL(pll->id), pll->hw_state.dpll);
-+	POSTING_READ(PCH_DPLL(pll->id));
- 	udelay(200);
- }
- 
-@@ -8829,7 +8811,6 @@ static void ibx_pch_dpll_disable(struct drm_i915_private *dev_priv,
- {
- 	struct drm_device *dev = dev_priv->dev;
- 	struct intel_crtc *crtc;
--	uint32_t reg, val;
- 
- 	/* Make sure no transcoder isn't still depending on us. */
- 	list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head) {
-@@ -8837,11 +8818,8 @@ static void ibx_pch_dpll_disable(struct drm_i915_private *dev_priv,
- 			assert_pch_transcoder_disabled(dev_priv, crtc->pipe);
- 	}
- 
--	reg = PCH_DPLL(pll->id);
--	val = I915_READ(reg);
--	val &= ~DPLL_VCO_ENABLE;
--	I915_WRITE(reg, val);
--	POSTING_READ(reg);
-+	I915_WRITE(PCH_DPLL(pll->id), 0);
-+	POSTING_READ(PCH_DPLL(pll->id));
- 	udelay(200);
- }
- 
-@@ -8860,6 +8838,7 @@ static void ibx_pch_dpll_init(struct drm_device *dev)
- 	for (i = 0; i < dev_priv->num_shared_dpll; i++) {
- 		dev_priv->shared_dplls[i].id = i;
- 		dev_priv->shared_dplls[i].name = ibx_pch_dpll_names[i];
-+		dev_priv->shared_dplls[i].mode_set = ibx_pch_dpll_mode_set;
- 		dev_priv->shared_dplls[i].enable = ibx_pch_dpll_enable;
- 		dev_priv->shared_dplls[i].disable = ibx_pch_dpll_disable;
- 		dev_priv->shared_dplls[i].get_hw_state =
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0395-drm-i915-use-sw-tracked-state-to-select-shared-dplls.patch b/patches.baytrail/0395-drm-i915-use-sw-tracked-state-to-select-shared-dplls.patch
deleted file mode 100644
index a802177aeedf9..0000000000000
--- a/patches.baytrail/0395-drm-i915-use-sw-tracked-state-to-select-shared-dplls.patch
+++ /dev/null
@@ -1,54 +0,0 @@
-From 3b87da7f4c6bf7a9d0ae23d1d63e509e0c757468 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Wed, 5 Jun 2013 13:34:24 +0200
-Subject: drm/i915: use sw tracked state to select shared dplls
-
-Just yet another prep step to be able to do all this up-front, before
-we've set up any of the shared dplls in the new state. This will
-eventually be useful for atomic modesetting.
-
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit b89a1d395bf8bd209f1e14265c5b1d34c4a98d57)
-(cherry picked from drm-intel-next-queued)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 8 ++++----
- 1 file changed, 4 insertions(+), 4 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index d1d7b77de30b..60ae6d3c6d16 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -3031,7 +3031,7 @@ static void intel_put_shared_dpll(struct intel_crtc *crtc)
- 	crtc->config.shared_dpll = DPLL_ID_PRIVATE;
- }
- 
--static struct intel_shared_dpll *intel_get_shared_dpll(struct intel_crtc *crtc, u32 dpll, u32 fp)
-+static struct intel_shared_dpll *intel_get_shared_dpll(struct intel_crtc *crtc)
- {
- 	struct drm_i915_private *dev_priv = crtc->base.dev->dev_private;
- 	struct intel_shared_dpll *pll = intel_crtc_to_shared_dpll(crtc);
-@@ -3061,8 +3061,8 @@ static struct intel_shared_dpll *intel_get_shared_dpll(struct intel_crtc *crtc,
- 		if (pll->refcount == 0)
- 			continue;
- 
--		if (dpll == (I915_READ(PCH_DPLL(pll->id)) & 0x7fffffff) &&
--		    fp == I915_READ(PCH_FP0(pll->id))) {
-+		if (memcmp(&crtc->config.dpll_hw_state, &pll->hw_state,
-+			   sizeof(pll->hw_state)) == 0) {
- 			DRM_DEBUG_KMS("CRTC:%d sharing existing %s (refcount %d, ative %d)\n",
- 				      crtc->base.base.id,
- 				      pll->name, pll->refcount, pll->active);
-@@ -5698,7 +5698,7 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
- 		else
- 			intel_crtc->config.dpll_hw_state.fp1 = fp;
- 
--		pll = intel_get_shared_dpll(intel_crtc, dpll, fp);
-+		pll = intel_get_shared_dpll(intel_crtc);
- 		if (pll == NULL) {
- 			DRM_DEBUG_DRIVER("failed to find PLL for pipe %c\n",
- 					 pipe_name(pipe));
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0396-drm-i915-duplicate-intel_enable_pll-into-i9xx-and-vl.patch b/patches.baytrail/0396-drm-i915-duplicate-intel_enable_pll-into-i9xx-and-vl.patch
deleted file mode 100644
index 8514f02ef327d..0000000000000
--- a/patches.baytrail/0396-drm-i915-duplicate-intel_enable_pll-into-i9xx-and-vl.patch
+++ /dev/null
@@ -1,110 +0,0 @@
-From 7259cc8ab017834f2307de356b9fa91629e2e266 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 6 Jun 2013 00:52:17 +0200
-Subject: drm/i915: duplicate intel_enable_pll into i9xx and vlv versions
-
-Mostly since I _really_ don't want to touch the vlv hell.
-
-No code change, just duplication. Also kill a now seriously outdated
-code comment - the remark about the dvo encoder is now handled with
-the pipe A quirk.
-
-v2: Update the BUG_ONs as suggested by Jani (both in vlv_ and i9xx_
-functions, since the split happens here).
-
-Cc: Jani Nikula <jani.nikula@linux.intel.com>
-Reviewed-by: Imre Deak <imre.deak@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 87442f732bfad16a8b65fb5d86f69bc0417dc9db)
-(cherry picked from drm-intel-next-queued)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 51 ++++++++++++++++++++++++------------
- 1 file changed, 34 insertions(+), 17 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 60ae6d3c6d16..370c720fd039 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -1301,20 +1301,37 @@ static void assert_pch_ports_disabled(struct drm_i915_private *dev_priv,
- 	assert_pch_hdmi_disabled(dev_priv, pipe, PCH_HDMID);
- }
- 
--/**
-- * intel_enable_pll - enable a PLL
-- * @dev_priv: i915 private structure
-- * @pipe: pipe PLL to enable
-- *
-- * Enable @pipe's PLL so we can start pumping pixels from a plane.  Check to
-- * make sure the PLL reg is writable first though, since the panel write
-- * protect mechanism may be enabled.
-- *
-- * Note!  This is for pre-ILK only.
-- *
-- * Unfortunately needed by dvo_ns2501 since the dvo depends on it running.
-- */
--static void intel_enable_pll(struct drm_i915_private *dev_priv, enum pipe pipe)
-+static void vlv_enable_pll(struct drm_i915_private *dev_priv, enum pipe pipe)
-+{
-+	int reg;
-+	u32 val;
-+
-+	assert_pipe_disabled(dev_priv, pipe);
-+
-+	/* No really, not for ILK+ */
-+	BUG_ON(!IS_VALLEYVIEW(dev_priv->dev));
-+
-+	/* PLL is protected by panel, make sure we can write it */
-+	if (IS_MOBILE(dev_priv->dev) && !IS_I830(dev_priv->dev))
-+		assert_panel_unlocked(dev_priv, pipe);
-+
-+	reg = DPLL(pipe);
-+	val = I915_READ(reg);
-+	val |= DPLL_VCO_ENABLE;
-+
-+	/* We do this three times for luck */
-+	I915_WRITE(reg, val);
-+	POSTING_READ(reg);
-+	udelay(150); /* wait for warmup */
-+	I915_WRITE(reg, val);
-+	POSTING_READ(reg);
-+	udelay(150); /* wait for warmup */
-+	I915_WRITE(reg, val);
-+	POSTING_READ(reg);
-+	udelay(150); /* wait for warmup */
-+}
-+
-+static void i9xx_enable_pll(struct drm_i915_private *dev_priv, enum pipe pipe)
- {
- 	int reg;
- 	u32 val;
-@@ -1322,7 +1339,7 @@ static void intel_enable_pll(struct drm_i915_private *dev_priv, enum pipe pipe)
- 	assert_pipe_disabled(dev_priv, pipe);
- 
- 	/* No really, not for ILK+ */
--	BUG_ON(!IS_VALLEYVIEW(dev_priv->dev) && dev_priv->info->gen >= 5);
-+	BUG_ON(dev_priv->info->gen >= 5);
- 
- 	/* PLL is protected by panel, make sure we can write it */
- 	if (IS_MOBILE(dev_priv->dev) && !IS_I830(dev_priv->dev))
-@@ -3589,7 +3606,7 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc)
- 		if (encoder->pre_pll_enable)
- 			encoder->pre_pll_enable(encoder);
- 
--	intel_enable_pll(dev_priv, pipe);
-+	vlv_enable_pll(dev_priv, pipe);
- 
- 	for_each_encoder_on_crtc(dev, crtc, encoder)
- 		if (encoder->pre_enable)
-@@ -3630,7 +3647,7 @@ static void i9xx_crtc_enable(struct drm_crtc *crtc)
- 	intel_crtc->active = true;
- 	intel_update_watermarks(dev);
- 
--	intel_enable_pll(dev_priv, pipe);
-+	i9xx_enable_pll(dev_priv, pipe);
- 
- 	for_each_encoder_on_crtc(dev, crtc, encoder)
- 		if (encoder->pre_enable)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0397-drm-i915-asserts-for-lvds-pre_enable.patch b/patches.baytrail/0397-drm-i915-asserts-for-lvds-pre_enable.patch
deleted file mode 100644
index 8566233c4b934..0000000000000
--- a/patches.baytrail/0397-drm-i915-asserts-for-lvds-pre_enable.patch
+++ /dev/null
@@ -1,179 +0,0 @@
-From b68b60e412a03006f4cae3493a5a0a23fda5eb3f Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Sun, 16 Jun 2013 21:42:39 +0200
-Subject: drm/i915: asserts for lvds pre_enable
-
-Lots of bangin my head against the wall^UExperiments have shown that
-we really need to enable the lvds port before we enable plls. Strangely
-that seems to include the fdi rx pll on the pch.
-
-Note that the pch pll assert can fire since the lvds port has it's own
-special clock source settings in the DPLL register, which means it
-will never have a shared dpll (since there's only one LVDS port).
-
-Anyway, encode this new evidence with a few nice WARNs.
-
-v2: Incorporate review comments from Imre.
-- Explain why lvds can't have a shared dpll.
-- Update the WARN output.
-
-Cc: Imre Deak <imre.deak@intel.com>
-Reviewed-by: Imre Deak <imre.deak@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 55607e8aaa86e68ed4f37d072ee9af404cc8a830)
-(cherry picked from drm-intel-next-queued)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 26 +++++++++++++-------------
- drivers/gpu/drm/i915/intel_drv.h     | 16 ++++++++++++++++
- drivers/gpu/drm/i915/intel_lvds.c    | 17 ++++++++++++-----
- 3 files changed, 41 insertions(+), 18 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 370c720fd039..577882646b0f 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -892,8 +892,8 @@ static const char *state_string(bool enabled)
- }
- 
- /* Only for pre-ILK configs */
--static void assert_pll(struct drm_i915_private *dev_priv,
--		       enum pipe pipe, bool state)
-+void assert_pll(struct drm_i915_private *dev_priv,
-+		enum pipe pipe, bool state)
- {
- 	int reg;
- 	u32 val;
-@@ -906,10 +906,8 @@ static void assert_pll(struct drm_i915_private *dev_priv,
- 	     "PLL state assertion failure (expected %s, current %s)\n",
- 	     state_string(state), state_string(cur_state));
- }
--#define assert_pll_enabled(d, p) assert_pll(d, p, true)
--#define assert_pll_disabled(d, p) assert_pll(d, p, false)
- 
--static struct intel_shared_dpll *
-+struct intel_shared_dpll *
- intel_crtc_to_shared_dpll(struct intel_crtc *crtc)
- {
- 	struct drm_i915_private *dev_priv = crtc->base.dev->dev_private;
-@@ -921,9 +919,9 @@ intel_crtc_to_shared_dpll(struct intel_crtc *crtc)
- }
- 
- /* For ILK+ */
--static void assert_shared_dpll(struct drm_i915_private *dev_priv,
--			       struct intel_shared_dpll *pll,
--			       bool state)
-+void assert_shared_dpll(struct drm_i915_private *dev_priv,
-+			struct intel_shared_dpll *pll,
-+			bool state)
- {
- 	bool cur_state;
- 	struct intel_dpll_hw_state hw_state;
-@@ -942,8 +940,6 @@ static void assert_shared_dpll(struct drm_i915_private *dev_priv,
- 	     "%s assertion failure (expected %s, current %s)\n",
- 	     pll->name, state_string(state), state_string(cur_state));
- }
--#define assert_shared_dpll_enabled(d, p) assert_shared_dpll(d, p, true)
--#define assert_shared_dpll_disabled(d, p) assert_shared_dpll(d, p, false)
- 
- static void assert_fdi_tx(struct drm_i915_private *dev_priv,
- 			  enum pipe pipe, bool state)
-@@ -1007,15 +1003,19 @@ static void assert_fdi_tx_pll_enabled(struct drm_i915_private *dev_priv,
- 	WARN(!(val & FDI_TX_PLL_ENABLE), "FDI TX PLL assertion failure, should be active but is disabled\n");
- }
- 
--static void assert_fdi_rx_pll_enabled(struct drm_i915_private *dev_priv,
--				      enum pipe pipe)
-+void assert_fdi_rx_pll(struct drm_i915_private *dev_priv,
-+		       enum pipe pipe, bool state)
- {
- 	int reg;
- 	u32 val;
-+	bool cur_state;
- 
- 	reg = FDI_RX_CTL(pipe);
- 	val = I915_READ(reg);
--	WARN(!(val & FDI_RX_PLL_ENABLE), "FDI RX PLL assertion failure, should be active but is disabled\n");
-+	cur_state = !!(val & FDI_RX_PLL_ENABLE);
-+	WARN(cur_state != state,
-+	     "FDI RX PLL assertion failure (expected %s, current %s)\n",
-+	     state_string(state), state_string(cur_state));
- }
- 
- static void assert_panel_unlocked(struct drm_i915_private *dev_priv,
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index d03c2c8a06b1..16ad38fd859d 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -747,6 +747,22 @@ extern int intel_overlay_attrs(struct drm_device *dev, void *data,
- extern void intel_fb_output_poll_changed(struct drm_device *dev);
- extern void intel_fb_restore_mode(struct drm_device *dev);
- 
-+struct intel_shared_dpll *
-+intel_crtc_to_shared_dpll(struct intel_crtc *crtc);
-+
-+void assert_shared_dpll(struct drm_i915_private *dev_priv,
-+			struct intel_shared_dpll *pll,
-+			bool state);
-+#define assert_shared_dpll_enabled(d, p) assert_shared_dpll(d, p, true)
-+#define assert_shared_dpll_disabled(d, p) assert_shared_dpll(d, p, false)
-+void assert_pll(struct drm_i915_private *dev_priv,
-+		enum pipe pipe, bool state);
-+#define assert_pll_enabled(d, p) assert_pll(d, p, true)
-+#define assert_pll_disabled(d, p) assert_pll(d, p, false)
-+void assert_fdi_rx_pll(struct drm_i915_private *dev_priv,
-+		       enum pipe pipe, bool state);
-+#define assert_fdi_rx_pll_enabled(d, p) assert_fdi_rx_pll(d, p, true)
-+#define assert_fdi_rx_pll_disabled(d, p) assert_fdi_rx_pll(d, p, false)
- extern void assert_pipe(struct drm_i915_private *dev_priv, enum pipe pipe,
- 			bool state);
- #define assert_pipe_enabled(d, p) assert_pipe(d, p, true)
-diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
-index 44533dde25c1..f2a5c898244c 100644
---- a/drivers/gpu/drm/i915/intel_lvds.c
-+++ b/drivers/gpu/drm/i915/intel_lvds.c
-@@ -127,12 +127,20 @@ static void intel_pre_pll_enable_lvds(struct intel_encoder *encoder)
- 	struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
- 	struct drm_device *dev = encoder->base.dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
--	struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
-+	struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
- 	struct drm_display_mode *fixed_mode =
- 		lvds_encoder->attached_connector->base.panel.fixed_mode;
--	int pipe = intel_crtc->pipe;
-+	int pipe = crtc->pipe;
- 	u32 temp;
- 
-+	if (HAS_PCH_SPLIT(dev)) {
-+		assert_fdi_rx_pll_disabled(dev_priv, pipe);
-+		assert_shared_dpll_disabled(dev_priv,
-+					    intel_crtc_to_shared_dpll(crtc));
-+	} else {
-+		assert_pll_disabled(dev_priv, pipe);
-+	}
-+
- 	temp = I915_READ(lvds_encoder->reg);
- 	temp |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP;
- 
-@@ -149,7 +157,7 @@ static void intel_pre_pll_enable_lvds(struct intel_encoder *encoder)
- 
- 	/* set the corresponsding LVDS_BORDER bit */
- 	temp &= ~LVDS_BORDER_ENABLE;
--	temp |= intel_crtc->config.gmch_pfit.lvds_border_bits;
-+	temp |= crtc->config.gmch_pfit.lvds_border_bits;
- 	/* Set the B0-B3 data pairs corresponding to whether we're going to
- 	 * set the DPLLs for dual-channel mode or not.
- 	 */
-@@ -169,8 +177,7 @@ static void intel_pre_pll_enable_lvds(struct intel_encoder *encoder)
- 	if (INTEL_INFO(dev)->gen == 4) {
- 		/* Bspec wording suggests that LVDS port dithering only exists
- 		 * for 18bpp panels. */
--		if (intel_crtc->config.dither &&
--		    intel_crtc->config.pipe_bpp == 18)
-+		if (crtc->config.dither && crtc->config.pipe_bpp == 18)
- 			temp |= LVDS_ENABLE_DITHER;
- 		else
- 			temp &= ~LVDS_ENABLE_DITHER;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0398-drm-i915-move-encoder-pre-enable-hooks-togther-on-il.patch b/patches.baytrail/0398-drm-i915-move-encoder-pre-enable-hooks-togther-on-il.patch
deleted file mode 100644
index 83f1ed1974daf..0000000000000
--- a/patches.baytrail/0398-drm-i915-move-encoder-pre-enable-hooks-togther-on-il.patch
+++ /dev/null
@@ -1,54 +0,0 @@
-From cb814de7106959950cbebe2945925e6818d2db57 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Wed, 5 Jun 2013 13:34:27 +0200
-Subject: drm/i915: move encoder pre enable hooks togther on ilk+
-
-The ->pre_enable hook is only used for the cpu edp port on ilk-ivb, so
-we can safely move it up across the fdi pll enabling.
-
-Unfortunately we can't (yet) merge in the pre_pll enable hook despite
-that only lvds uses it on ilk-ivb: Since the same lvds hook is also
-need on i9xx platforms we need to fix up the pll enabling sequence
-there, too.
-
-Reviewed-by: Imre Deak <imre.deak@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 952735ee416f686fac55957b221461dfbd80ce1c)
-(cherry picked from drm-intel-next-queued)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 9 ++++-----
- 1 file changed, 4 insertions(+), 5 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 577882646b0f..e5d24bfb2633 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -3198,9 +3198,12 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc)
- 
- 	intel_update_watermarks(dev);
- 
--	for_each_encoder_on_crtc(dev, crtc, encoder)
-+	for_each_encoder_on_crtc(dev, crtc, encoder) {
- 		if (encoder->pre_pll_enable)
- 			encoder->pre_pll_enable(encoder);
-+		if (encoder->pre_enable)
-+			encoder->pre_enable(encoder);
-+	}
- 
- 	if (intel_crtc->config.has_pch_encoder) {
- 		/* Note: FDI PLL enabling _must_ be done before we enable the
-@@ -3212,10 +3215,6 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc)
- 		assert_fdi_rx_disabled(dev_priv, pipe);
- 	}
- 
--	for_each_encoder_on_crtc(dev, crtc, encoder)
--		if (encoder->pre_enable)
--			encoder->pre_enable(encoder);
--
- 	ironlake_pfit_enable(intel_crtc);
- 
- 	/*
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0399-drm-i915-hw-state-readout-for-i9xx-dplls.patch b/patches.baytrail/0399-drm-i915-hw-state-readout-for-i9xx-dplls.patch
deleted file mode 100644
index 03a4625e01020..0000000000000
--- a/patches.baytrail/0399-drm-i915-hw-state-readout-for-i9xx-dplls.patch
+++ /dev/null
@@ -1,130 +0,0 @@
-From 5e82822d0eae3c62c013bb93a3468749ac52cd5a Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Wed, 5 Jun 2013 13:34:28 +0200
-Subject: drm/i915: hw state readout for i9xx dplls
-
-In addition to existing stuff we also need to track DPLL_MD on gen4
-and vlv. This is prep work so that we can move the dpll enable
-sequence out from the ->mode_set callback into the crtc enabling
-functions.
-
-Reviewed-by: Imre Deak <imre.deak@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 8bcc2795a68ad9c2010fd5a2548432fad930fcc1)
-(cherry picked from drm-intel-next-queued)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h      |  1 +
- drivers/gpu/drm/i915/intel_display.c | 20 ++++++++++++++++++++
- 2 files changed, 21 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 6a45c0539d7d..3d98ed475a1f 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -144,6 +144,7 @@ enum intel_dpll_id {
- 
- struct intel_dpll_hw_state {
- 	uint32_t dpll;
-+	uint32_t dpll_md;
- 	uint32_t fp0;
- 	uint32_t fp1;
- };
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index e5d24bfb2633..46bbd267e0a7 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -4268,14 +4268,17 @@ static void i9xx_update_pll_dividers(struct intel_crtc *crtc,
- 	}
- 
- 	I915_WRITE(FP0(pipe), fp);
-+	crtc->config.dpll_hw_state.fp0 = fp;
- 
- 	crtc->lowfreq_avail = false;
- 	if (intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_LVDS) &&
- 	    reduced_clock && i915_powersave) {
- 		I915_WRITE(FP1(pipe), fp2);
-+		crtc->config.dpll_hw_state.fp1 = fp2;
- 		crtc->lowfreq_avail = true;
- 	} else {
- 		I915_WRITE(FP1(pipe), fp);
-+		crtc->config.dpll_hw_state.fp1 = fp;
- 	}
- }
- 
-@@ -4453,6 +4456,8 @@ static void vlv_update_pll(struct intel_crtc *crtc)
- 		dpll |= DPLL_INTEGRATED_CRI_CLK_VLV;
- 
- 	dpll |= DPLL_VCO_ENABLE;
-+	crtc->config.dpll_hw_state.dpll = dpll;
-+
- 	I915_WRITE(DPLL(pipe), dpll);
- 	POSTING_READ(DPLL(pipe));
- 	udelay(150);
-@@ -4462,6 +4467,8 @@ static void vlv_update_pll(struct intel_crtc *crtc)
- 
- 	dpll_md = (crtc->config.pixel_multiplier - 1)
- 		<< DPLL_MD_UDI_MULTIPLIER_SHIFT;
-+	crtc->config.dpll_hw_state.dpll_md = dpll_md;
-+
- 	I915_WRITE(DPLL_MD(pipe), dpll_md);
- 	POSTING_READ(DPLL_MD(pipe));
- 
-@@ -4540,6 +4547,8 @@ static void i9xx_update_pll(struct intel_crtc *crtc,
- 		dpll |= PLL_REF_INPUT_DREFCLK;
- 
- 	dpll |= DPLL_VCO_ENABLE;
-+	crtc->config.dpll_hw_state.dpll = dpll;
-+
- 	I915_WRITE(DPLL(pipe), dpll & ~DPLL_VCO_ENABLE);
- 	POSTING_READ(DPLL(pipe));
- 	udelay(150);
-@@ -4560,6 +4569,8 @@ static void i9xx_update_pll(struct intel_crtc *crtc,
- 	if (INTEL_INFO(dev)->gen >= 4) {
- 		u32 dpll_md = (crtc->config.pixel_multiplier - 1)
- 			<< DPLL_MD_UDI_MULTIPLIER_SHIFT;
-+		crtc->config.dpll_hw_state.dpll_md = dpll_md;
-+
- 		I915_WRITE(DPLL_MD(pipe), dpll_md);
- 	} else {
- 		/* The pixel multiplier can only be updated once the
-@@ -4604,6 +4615,8 @@ static void i8xx_update_pll(struct intel_crtc *crtc,
- 		dpll |= PLL_REF_INPUT_DREFCLK;
- 
- 	dpll |= DPLL_VCO_ENABLE;
-+	crtc->config.dpll_hw_state.dpll = dpll;
-+
- 	I915_WRITE(DPLL(pipe), dpll & ~DPLL_VCO_ENABLE);
- 	POSTING_READ(DPLL(pipe));
- 	udelay(150);
-@@ -4961,6 +4974,7 @@ static bool i9xx_get_pipe_config(struct intel_crtc *crtc,
- 		pipe_config->pixel_multiplier =
- 			((tmp & DPLL_MD_UDI_MULTIPLIER_MASK)
- 			 >> DPLL_MD_UDI_MULTIPLIER_SHIFT) + 1;
-+		pipe_config->dpll_hw_state.dpll_md = tmp;
- 	} else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
- 		tmp = I915_READ(DPLL(crtc->pipe));
- 		pipe_config->pixel_multiplier =
-@@ -4972,6 +4986,11 @@ static bool i9xx_get_pipe_config(struct intel_crtc *crtc,
- 		 * function. */
- 		pipe_config->pixel_multiplier = 1;
- 	}
-+	pipe_config->dpll_hw_state.dpll = I915_READ(DPLL(crtc->pipe));
-+	if (!IS_VALLEYVIEW(dev)) {
-+		pipe_config->dpll_hw_state.fp0 = I915_READ(FP0(crtc->pipe));
-+		pipe_config->dpll_hw_state.fp1 = I915_READ(FP1(crtc->pipe));
-+	}
- 
- 	return true;
- }
-@@ -8127,6 +8146,7 @@ intel_pipe_config_compare(struct drm_device *dev,
- 
- 	PIPE_CONF_CHECK_I(shared_dpll);
- 	PIPE_CONF_CHECK_X(dpll_hw_state.dpll);
-+	PIPE_CONF_CHECK_X(dpll_hw_state.dpll_md);
- 	PIPE_CONF_CHECK_X(dpll_hw_state.fp0);
- 	PIPE_CONF_CHECK_X(dpll_hw_state.fp1);
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0400-drm-i915-move-i9xx-dpll-enabling-into-crtc-enable-fu.patch b/patches.baytrail/0400-drm-i915-move-i9xx-dpll-enabling-into-crtc-enable-fu.patch
deleted file mode 100644
index 9a386a2c335ef..0000000000000
--- a/patches.baytrail/0400-drm-i915-move-i9xx-dpll-enabling-into-crtc-enable-fu.patch
+++ /dev/null
@@ -1,200 +0,0 @@
-From 2b2567cafaf34da1f3a9e33d7ac38b1ff740a047 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Sun, 16 Jun 2013 21:24:16 +0200
-Subject: drm/i915: move i9xx dpll enabling into crtc enable function
-
-Now that we have the proper pipe config to track this, we don't need
-to write any registers any more.
-
-Note that for platforms without DPLL_MD (pre-gen4) which store the
-pixel mutliplier in the DPLL register I've decided to keep the
-seemingly "redundant" write: The comment right below saying "do this
-trice for luck" doesn't instill confidence ...
-
-v2: Drop a few now unnecessary local variables and switch the enable
-function to take a struct intel_crtc * to simply arguments.
-
-v3: Rebase on top of the newly-colored BUG_ON.
-
-v4: Amend commit message to alliviate Imre's comment about the
-redudant DPLL write for the pixel mutliplier.
-
-Cc: Imre Deak <imre.deak@intel.com>
-Cc: Jani Nikula <jani.nikula@linux.intel.com>
-Reviewed-by: Imre Deak <imre.deak@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 66e3d5c09940d08d94b03e65b420fadaa7484318)
-(cherry picked from drm-intel-next-queued)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 100 +++++++++++++----------------------
- 1 file changed, 36 insertions(+), 64 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 46bbd267e0a7..608f04adb2c9 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -1331,32 +1331,48 @@ static void vlv_enable_pll(struct drm_i915_private *dev_priv, enum pipe pipe)
- 	udelay(150); /* wait for warmup */
- }
- 
--static void i9xx_enable_pll(struct drm_i915_private *dev_priv, enum pipe pipe)
-+static void i9xx_enable_pll(struct intel_crtc *crtc)
- {
--	int reg;
--	u32 val;
-+	struct drm_device *dev = crtc->base.dev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	int reg = DPLL(crtc->pipe);
-+	u32 dpll = crtc->config.dpll_hw_state.dpll;
- 
--	assert_pipe_disabled(dev_priv, pipe);
-+	assert_pipe_disabled(dev_priv, crtc->pipe);
- 
- 	/* No really, not for ILK+ */
- 	BUG_ON(dev_priv->info->gen >= 5);
- 
- 	/* PLL is protected by panel, make sure we can write it */
--	if (IS_MOBILE(dev_priv->dev) && !IS_I830(dev_priv->dev))
--		assert_panel_unlocked(dev_priv, pipe);
-+	if (IS_MOBILE(dev) && !IS_I830(dev))
-+		assert_panel_unlocked(dev_priv, crtc->pipe);
- 
--	reg = DPLL(pipe);
--	val = I915_READ(reg);
--	val |= DPLL_VCO_ENABLE;
-+	I915_WRITE(reg, dpll);
-+
-+	/* Wait for the clocks to stabilize. */
-+	POSTING_READ(reg);
-+	udelay(150);
-+
-+	if (INTEL_INFO(dev)->gen >= 4) {
-+		I915_WRITE(DPLL_MD(crtc->pipe),
-+			   crtc->config.dpll_hw_state.dpll_md);
-+	} else {
-+		/* The pixel multiplier can only be updated once the
-+		 * DPLL is enabled and the clocks are stable.
-+		 *
-+		 * So write it again.
-+		 */
-+		I915_WRITE(reg, dpll);
-+	}
- 
- 	/* We do this three times for luck */
--	I915_WRITE(reg, val);
-+	I915_WRITE(reg, dpll);
- 	POSTING_READ(reg);
- 	udelay(150); /* wait for warmup */
--	I915_WRITE(reg, val);
-+	I915_WRITE(reg, dpll);
- 	POSTING_READ(reg);
- 	udelay(150); /* wait for warmup */
--	I915_WRITE(reg, val);
-+	I915_WRITE(reg, dpll);
- 	POSTING_READ(reg);
- 	udelay(150); /* wait for warmup */
- }
-@@ -3646,7 +3662,11 @@ static void i9xx_crtc_enable(struct drm_crtc *crtc)
- 	intel_crtc->active = true;
- 	intel_update_watermarks(dev);
- 
--	i9xx_enable_pll(dev_priv, pipe);
-+	for_each_encoder_on_crtc(dev, crtc, encoder)
-+		if (encoder->pre_pll_enable)
-+			encoder->pre_pll_enable(encoder);
-+
-+	i9xx_enable_pll(intel_crtc);
- 
- 	for_each_encoder_on_crtc(dev, crtc, encoder)
- 		if (encoder->pre_enable)
-@@ -4484,8 +4504,6 @@ static void i9xx_update_pll(struct intel_crtc *crtc,
- {
- 	struct drm_device *dev = crtc->base.dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
--	struct intel_encoder *encoder;
--	int pipe = crtc->pipe;
- 	u32 dpll;
- 	bool is_sdvo;
- 	struct dpll *clock = &crtc->config.dpll;
-@@ -4549,37 +4567,14 @@ static void i9xx_update_pll(struct intel_crtc *crtc,
- 	dpll |= DPLL_VCO_ENABLE;
- 	crtc->config.dpll_hw_state.dpll = dpll;
- 
--	I915_WRITE(DPLL(pipe), dpll & ~DPLL_VCO_ENABLE);
--	POSTING_READ(DPLL(pipe));
--	udelay(150);
--
--	for_each_encoder_on_crtc(dev, &crtc->base, encoder)
--		if (encoder->pre_pll_enable)
--			encoder->pre_pll_enable(encoder);
--
--	if (crtc->config.has_dp_encoder)
--		intel_dp_set_m_n(crtc);
--
--	I915_WRITE(DPLL(pipe), dpll);
--
--	/* Wait for the clocks to stabilize. */
--	POSTING_READ(DPLL(pipe));
--	udelay(150);
--
- 	if (INTEL_INFO(dev)->gen >= 4) {
- 		u32 dpll_md = (crtc->config.pixel_multiplier - 1)
- 			<< DPLL_MD_UDI_MULTIPLIER_SHIFT;
- 		crtc->config.dpll_hw_state.dpll_md = dpll_md;
--
--		I915_WRITE(DPLL_MD(pipe), dpll_md);
--	} else {
--		/* The pixel multiplier can only be updated once the
--		 * DPLL is enabled and the clocks are stable.
--		 *
--		 * So write it again.
--		 */
--		I915_WRITE(DPLL(pipe), dpll);
- 	}
-+
-+	if (crtc->config.has_dp_encoder)
-+		intel_dp_set_m_n(crtc);
- }
- 
- static void i8xx_update_pll(struct intel_crtc *crtc,
-@@ -4588,8 +4583,6 @@ static void i8xx_update_pll(struct intel_crtc *crtc,
- {
- 	struct drm_device *dev = crtc->base.dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
--	struct intel_encoder *encoder;
--	int pipe = crtc->pipe;
- 	u32 dpll;
- 	struct dpll *clock = &crtc->config.dpll;
- 
-@@ -4616,27 +4609,6 @@ static void i8xx_update_pll(struct intel_crtc *crtc,
- 
- 	dpll |= DPLL_VCO_ENABLE;
- 	crtc->config.dpll_hw_state.dpll = dpll;
--
--	I915_WRITE(DPLL(pipe), dpll & ~DPLL_VCO_ENABLE);
--	POSTING_READ(DPLL(pipe));
--	udelay(150);
--
--	for_each_encoder_on_crtc(dev, &crtc->base, encoder)
--		if (encoder->pre_pll_enable)
--			encoder->pre_pll_enable(encoder);
--
--	I915_WRITE(DPLL(pipe), dpll);
--
--	/* Wait for the clocks to stabilize. */
--	POSTING_READ(DPLL(pipe));
--	udelay(150);
--
--	/* The pixel multiplier can only be updated once the
--	 * DPLL is enabled and the clocks are stable.
--	 *
--	 * So write it again.
--	 */
--	I915_WRITE(DPLL(pipe), dpll);
- }
- 
- static void intel_set_pipe_timings(struct intel_crtc *intel_crtc)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0401-drm-i915-s-pre_pll-pre-on-the-lvds-port-enable-funct.patch b/patches.baytrail/0401-drm-i915-s-pre_pll-pre-on-the-lvds-port-enable-funct.patch
deleted file mode 100644
index db290909d39ad..0000000000000
--- a/patches.baytrail/0401-drm-i915-s-pre_pll-pre-on-the-lvds-port-enable-funct.patch
+++ /dev/null
@@ -1,78 +0,0 @@
-From 85476373e8ea62fa091f5e336374dadc08a0b98e Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Wed, 5 Jun 2013 13:34:30 +0200
-Subject: drm/i915: s/pre_pll/pre/ on the lvds port enable function
-
-i9xx doesn't use pre_enable at all, so we can fold this in now.
-
-Reviewed-by: Imre Deak <imre.deak@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit f6736a1a7b846d0af90135c7a7f121ab3ada9ee1)
-(cherry picked from drm-intel-next-queued)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 13 +++----------
- drivers/gpu/drm/i915/intel_lvds.c    |  4 ++--
- 2 files changed, 5 insertions(+), 12 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 608f04adb2c9..d6dcd0162b53 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -3214,12 +3214,9 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc)
- 
- 	intel_update_watermarks(dev);
- 
--	for_each_encoder_on_crtc(dev, crtc, encoder) {
--		if (encoder->pre_pll_enable)
--			encoder->pre_pll_enable(encoder);
-+	for_each_encoder_on_crtc(dev, crtc, encoder)
- 		if (encoder->pre_enable)
- 			encoder->pre_enable(encoder);
--	}
- 
- 	if (intel_crtc->config.has_pch_encoder) {
- 		/* Note: FDI PLL enabling _must_ be done before we enable the
-@@ -3663,15 +3660,11 @@ static void i9xx_crtc_enable(struct drm_crtc *crtc)
- 	intel_update_watermarks(dev);
- 
- 	for_each_encoder_on_crtc(dev, crtc, encoder)
--		if (encoder->pre_pll_enable)
--			encoder->pre_pll_enable(encoder);
--
--	i9xx_enable_pll(intel_crtc);
--
--	for_each_encoder_on_crtc(dev, crtc, encoder)
- 		if (encoder->pre_enable)
- 			encoder->pre_enable(encoder);
- 
-+	i9xx_enable_pll(intel_crtc);
-+
- 	i9xx_pfit_enable(intel_crtc);
- 
- 	intel_crtc_load_lut(crtc);
-diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
-index f2a5c898244c..57ecc57a6fa4 100644
---- a/drivers/gpu/drm/i915/intel_lvds.c
-+++ b/drivers/gpu/drm/i915/intel_lvds.c
-@@ -122,7 +122,7 @@ static void intel_lvds_get_config(struct intel_encoder *encoder,
-  * This is an exception to the general rule that mode_set doesn't turn
-  * things on.
-  */
--static void intel_pre_pll_enable_lvds(struct intel_encoder *encoder)
-+static void intel_pre_enable_lvds(struct intel_encoder *encoder)
- {
- 	struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
- 	struct drm_device *dev = encoder->base.dev;
-@@ -982,7 +982,7 @@ void intel_lvds_init(struct drm_device *dev)
- 			 DRM_MODE_ENCODER_LVDS);
- 
- 	intel_encoder->enable = intel_enable_lvds;
--	intel_encoder->pre_pll_enable = intel_pre_pll_enable_lvds;
-+	intel_encoder->pre_enable = intel_pre_enable_lvds;
- 	intel_encoder->compute_config = intel_lvds_compute_config;
- 	intel_encoder->disable = intel_disable_lvds;
- 	intel_encoder->get_hw_state = intel_lvds_get_hw_state;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0402-drm-i915-Mask-out-hardware-status-bits-from-VLV-DPLL.patch b/patches.baytrail/0402-drm-i915-Mask-out-hardware-status-bits-from-VLV-DPLL.patch
deleted file mode 100644
index e93b6036d9ddd..0000000000000
--- a/patches.baytrail/0402-drm-i915-Mask-out-hardware-status-bits-from-VLV-DPLL.patch
+++ /dev/null
@@ -1,45 +0,0 @@
-From 50d940f3c03cea58e10dff26f21054a91bc1122e Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Wed, 26 Jun 2013 17:44:15 +0300
-Subject: drm/i915: Mask out hardware status bits from VLV DPLL register
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The DPLL lock bit, and the DPIO phy status bits are read-only and
-controlled by the hardware, so they will never be set by the driver.
-Mask them out when reading the hw state, so that the state
-comparison won't fail.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Jesse Barnes <jbarnes@virtuosugeek.org>
-[danvet: Jesse asked for a code comment and I wholeheartly agree, so
-added one.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 165e901caa4c9d768dd572aab6b95f89a2e9e204)
-(cherry picked from drm-intel-next-queued)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 5 +++++
- 1 file changed, 5 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index d6dcd0162b53..19b7189f2ba3 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -4955,6 +4955,11 @@ static bool i9xx_get_pipe_config(struct intel_crtc *crtc,
- 	if (!IS_VALLEYVIEW(dev)) {
- 		pipe_config->dpll_hw_state.fp0 = I915_READ(FP0(crtc->pipe));
- 		pipe_config->dpll_hw_state.fp1 = I915_READ(FP1(crtc->pipe));
-+	} else {
-+		/* Mask out read-only status bits. */
-+		pipe_config->dpll_hw_state.dpll &= ~(DPLL_LOCK_VLV |
-+						     DPLL_PORTC_READY_MASK |
-+						     DPLL_PORTB_READY_MASK);
- 	}
- 
- 	return true;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0403-drm-i915-Remove-extra-error-state-NULL.patch b/patches.baytrail/0403-drm-i915-Remove-extra-error-state-NULL.patch
deleted file mode 100644
index 0a2f88e509792..0000000000000
--- a/patches.baytrail/0403-drm-i915-Remove-extra-error-state-NULL.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From d3c7dbaab830e6221ef47717fdc0281390d28965 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Thu, 27 Jun 2013 16:30:02 -0700
-Subject: drm/i915: Remove extra error state NULL
-
-Not only was there an extra, but since we now kzalloc the error state,
-we don't need either.
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 5476f8505b4c4178dbb9f4e9d2bf17e52d8026ed)
-(cherry picked from drm-intel-next-queued)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 6 ------
- 1 file changed, 6 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index 6df227352fd3..bdbbad92f495 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -1965,10 +1965,6 @@ static void i915_capture_error_state(struct drm_device *dev)
- 	i915_gem_record_fences(dev, error);
- 	i915_gem_record_rings(dev, error);
- 
--	/* Record buffers on the active and pinned lists. */
--	error->active_bo = NULL;
--	error->pinned_bo = NULL;
--
- 	i = 0;
- 	list_for_each_entry(obj, &dev_priv->mm.active_list, mm_list)
- 		i++;
-@@ -1978,8 +1974,6 @@ static void i915_capture_error_state(struct drm_device *dev)
- 			i++;
- 	error->pinned_bo_count = i - error->active_bo_count;
- 
--	error->active_bo = NULL;
--	error->pinned_bo = NULL;
- 	if (i) {
- 		error->active_bo = kmalloc(sizeof(*error->active_bo)*i,
- 					   GFP_ATOMIC);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0404-drm-i915-Extract-error-buffer-capture.patch b/patches.baytrail/0404-drm-i915-Extract-error-buffer-capture.patch
deleted file mode 100644
index 2650f33a49b6d..0000000000000
--- a/patches.baytrail/0404-drm-i915-Extract-error-buffer-capture.patch
+++ /dev/null
@@ -1,118 +0,0 @@
-From c337cb5b3187445c2a7fbc6a5112c0fa56be3daf Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Thu, 27 Jun 2013 16:30:03 -0700
-Subject: drm/i915: Extract error buffer capture
-
-This helps when we have per VM buffer capturing.
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 26b7c22465cbfaa40d7f2de6d5933a66106eb778)
-(cherry picked from drm-intel-next-queued)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 69 +++++++++++++++++++++++------------------
- 1 file changed, 38 insertions(+), 31 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index bdbbad92f495..a53d1d3040eb 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -1889,6 +1889,42 @@ static void i915_gem_record_rings(struct drm_device *dev,
- 	}
- }
- 
-+static void i915_gem_capture_buffers(struct drm_i915_private *dev_priv,
-+				     struct drm_i915_error_state *error)
-+{
-+	struct drm_i915_gem_object *obj;
-+	int i;
-+
-+	i = 0;
-+	list_for_each_entry(obj, &dev_priv->mm.active_list, mm_list)
-+		i++;
-+	error->active_bo_count = i;
-+	list_for_each_entry(obj, &dev_priv->mm.bound_list, global_list)
-+		if (obj->pin_count)
-+			i++;
-+	error->pinned_bo_count = i - error->active_bo_count;
-+
-+	if (i) {
-+		error->active_bo = kmalloc(sizeof(*error->active_bo)*i,
-+					   GFP_ATOMIC);
-+		if (error->active_bo)
-+			error->pinned_bo =
-+				error->active_bo + error->active_bo_count;
-+	}
-+
-+	if (error->active_bo)
-+		error->active_bo_count =
-+			capture_active_bo(error->active_bo,
-+					  error->active_bo_count,
-+					  &dev_priv->mm.active_list);
-+
-+	if (error->pinned_bo)
-+		error->pinned_bo_count =
-+			capture_pinned_bo(error->pinned_bo,
-+					  error->pinned_bo_count,
-+					  &dev_priv->mm.bound_list);
-+}
-+
- /**
-  * i915_capture_error_state - capture an error record for later analysis
-  * @dev: drm device
-@@ -1901,10 +1937,9 @@ static void i915_gem_record_rings(struct drm_device *dev,
- static void i915_capture_error_state(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
--	struct drm_i915_gem_object *obj;
- 	struct drm_i915_error_state *error;
- 	unsigned long flags;
--	int i, pipe;
-+	int pipe;
- 
- 	spin_lock_irqsave(&dev_priv->gpu_error.lock, flags);
- 	error = dev_priv->gpu_error.first_error;
-@@ -1962,38 +1997,10 @@ static void i915_capture_error_state(struct drm_device *dev)
- 
- 	i915_get_extra_instdone(dev, error->extra_instdone);
- 
-+	i915_gem_capture_buffers(dev_priv, error);
- 	i915_gem_record_fences(dev, error);
- 	i915_gem_record_rings(dev, error);
- 
--	i = 0;
--	list_for_each_entry(obj, &dev_priv->mm.active_list, mm_list)
--		i++;
--	error->active_bo_count = i;
--	list_for_each_entry(obj, &dev_priv->mm.bound_list, global_list)
--		if (obj->pin_count)
--			i++;
--	error->pinned_bo_count = i - error->active_bo_count;
--
--	if (i) {
--		error->active_bo = kmalloc(sizeof(*error->active_bo)*i,
--					   GFP_ATOMIC);
--		if (error->active_bo)
--			error->pinned_bo =
--				error->active_bo + error->active_bo_count;
--	}
--
--	if (error->active_bo)
--		error->active_bo_count =
--			capture_active_bo(error->active_bo,
--					  error->active_bo_count,
--					  &dev_priv->mm.active_list);
--
--	if (error->pinned_bo)
--		error->pinned_bo_count =
--			capture_pinned_bo(error->pinned_bo,
--					  error->pinned_bo_count,
--					  &dev_priv->mm.bound_list);
--
- 	do_gettimeofday(&error->time);
- 
- 	error->overlay = intel_overlay_capture_error_state(dev);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0405-drm-i915-make-PDE-PTE-platform-specific.patch b/patches.baytrail/0405-drm-i915-make-PDE-PTE-platform-specific.patch
deleted file mode 100644
index 1b75f6c74cd86..0000000000000
--- a/patches.baytrail/0405-drm-i915-make-PDE-PTE-platform-specific.patch
+++ /dev/null
@@ -1,87 +0,0 @@
-From f45a4df9b3983ebb664e6da51edf491b7e2a604d Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Thu, 27 Jun 2013 16:30:04 -0700
-Subject: drm/i915: make PDE|PTE platform specific
-
-Nothing outside of i915_gem_gtt.c and more specifically, the relevant
-gen specific init function should need to know about number of PDEs, or
-PTEs per PD. Exposing this will only lead to circumventing using the
-upcoming VM abstraction.
-
-To accomplish this, move the defines into the .c file, rename the PDE
-define to be GEN6, and make the PTE count less of a magic number.
-
-The remaining code in the global gtt setup is a bit messy, but an
-upcoming patch will clean that one up.
-
-v2: Don't hardcode number of PDEs (Daniel + Jesse)
-Reworded commit message to reflect change.
-
-Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 6670a5a5c77b8fc17962742f9bcf6f47e489aa62)
-(cherry picked from drm-intel-next-queued)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h     | 2 --
- drivers/gpu/drm/i915/i915_gem_gtt.c | 9 ++++++---
- 2 files changed, 6 insertions(+), 5 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 3d98ed475a1f..c38084df3313 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -486,8 +486,6 @@ struct i915_gtt {
- };
- #define gtt_total_entries(gtt) ((gtt).total >> PAGE_SHIFT)
- 
--#define I915_PPGTT_PD_ENTRIES 512
--#define I915_PPGTT_PT_ENTRIES 1024
- struct i915_hw_ppgtt {
- 	struct drm_device *dev;
- 	unsigned num_pd_entries;
-diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
-index 5101ab6869b4..216e7a19e63d 100644
---- a/drivers/gpu/drm/i915/i915_gem_gtt.c
-+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
-@@ -28,6 +28,9 @@
- #include "i915_trace.h"
- #include "intel_drv.h"
- 
-+#define GEN6_PPGTT_PD_ENTRIES 512
-+#define I915_PPGTT_PT_ENTRIES (PAGE_SIZE / sizeof(gen6_gtt_pte_t))
-+
- /* PPGTT stuff */
- #define GEN6_GTT_ADDR_ENCODE(addr)	((addr) | (((addr) >> 28) & 0xff0))
- 
-@@ -278,7 +281,7 @@ static int gen6_ppgtt_init(struct i915_hw_ppgtt *ppgtt)
- 	} else {
- 		ppgtt->pte_encode = gen6_pte_encode;
- 	}
--	ppgtt->num_pd_entries = I915_PPGTT_PD_ENTRIES;
-+	ppgtt->num_pd_entries = GEN6_PPGTT_PD_ENTRIES;
- 	ppgtt->enable = gen6_ppgtt_enable;
- 	ppgtt->clear_range = gen6_ppgtt_clear_range;
- 	ppgtt->insert_entries = gen6_ppgtt_insert_entries;
-@@ -688,7 +691,7 @@ void i915_gem_init_global_gtt(struct drm_device *dev)
- 		if (INTEL_INFO(dev)->gen <= 7) {
- 			/* PPGTT pdes are stolen from global gtt ptes, so shrink the
- 			 * aperture accordingly when using aliasing ppgtt. */
--			gtt_size -= I915_PPGTT_PD_ENTRIES*PAGE_SIZE;
-+			gtt_size -= GEN6_PPGTT_PD_ENTRIES * PAGE_SIZE;
- 		}
- 
- 		i915_gem_setup_global_gtt(dev, 0, mappable_size, gtt_size);
-@@ -699,7 +702,7 @@ void i915_gem_init_global_gtt(struct drm_device *dev)
- 
- 		DRM_ERROR("Aliased PPGTT setup failed %d\n", ret);
- 		drm_mm_takedown(&dev_priv->mm.gtt_space);
--		gtt_size += I915_PPGTT_PD_ENTRIES*PAGE_SIZE;
-+		gtt_size += GEN6_PPGTT_PD_ENTRIES * PAGE_SIZE;
- 	}
- 	i915_gem_setup_global_gtt(dev, 0, mappable_size, gtt_size);
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0406-drm-i915-Really-share-scratch-page.patch b/patches.baytrail/0406-drm-i915-Really-share-scratch-page.patch
deleted file mode 100644
index 81df424113a5b..0000000000000
--- a/patches.baytrail/0406-drm-i915-Really-share-scratch-page.patch
+++ /dev/null
@@ -1,62 +0,0 @@
-From aec87ca35c93140954c4e82732fa016686bc3f9e Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Thu, 27 Jun 2013 16:30:17 -0700
-Subject: drm/i915: Really share scratch page
-
-A previous patch had set up the ppgtt and ggtt to use the same scratch
-page, but still kept around both pointers. Kill it, it's not needed and
-gets in our way for upcoming cleanups.
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 84f135605898708ab692fc84555c31fbfe2983c1)
-(cherry picked from drm-intel-next-queued)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h     | 1 -
- drivers/gpu/drm/i915/i915_gem_gtt.c | 4 ++--
- 2 files changed, 2 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index c38084df3313..cba5dec686c9 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -492,7 +492,6 @@ struct i915_hw_ppgtt {
- 	struct page **pt_pages;
- 	uint32_t pd_offset;
- 	dma_addr_t *pt_dma_addr;
--	dma_addr_t scratch_page_dma_addr;
- 
- 	/* pte functions, mirroring the interface of the global gtt. */
- 	void (*clear_range)(struct i915_hw_ppgtt *ppgtt,
-diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
-index 216e7a19e63d..46b9e32b1109 100644
---- a/drivers/gpu/drm/i915/i915_gem_gtt.c
-+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
-@@ -188,13 +188,14 @@ static void gen6_ppgtt_clear_range(struct i915_hw_ppgtt *ppgtt,
- 				   unsigned first_entry,
- 				   unsigned num_entries)
- {
-+	struct drm_i915_private *dev_priv = ppgtt->dev->dev_private;
- 	gen6_gtt_pte_t *pt_vaddr, scratch_pte;
- 	unsigned act_pt = first_entry / I915_PPGTT_PT_ENTRIES;
- 	unsigned first_pte = first_entry % I915_PPGTT_PT_ENTRIES;
- 	unsigned last_pte, i;
- 
- 	scratch_pte = ppgtt->pte_encode(ppgtt->dev,
--					ppgtt->scratch_page_dma_addr,
-+					dev_priv->gtt.scratch_page_dma,
- 					I915_CACHE_LLC);
- 
- 	while (num_entries) {
-@@ -351,7 +352,6 @@ static int i915_gem_init_aliasing_ppgtt(struct drm_device *dev)
- 		return -ENOMEM;
- 
- 	ppgtt->dev = dev;
--	ppgtt->scratch_page_dma_addr = dev_priv->gtt.scratch_page_dma;
- 
- 	if (INTEL_INFO(dev)->gen < 8)
- 		ret = gen6_ppgtt_init(ppgtt);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0407-drm-i915-Combine-scratch-members-into-a-struct.patch b/patches.baytrail/0407-drm-i915-Combine-scratch-members-into-a-struct.patch
deleted file mode 100644
index 76abc0480df76..0000000000000
--- a/patches.baytrail/0407-drm-i915-Combine-scratch-members-into-a-struct.patch
+++ /dev/null
@@ -1,88 +0,0 @@
-From 3ac343195fac1d6a3892b28368394d6307959b20 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Thu, 27 Jun 2013 16:30:18 -0700
-Subject: drm/i915: Combine scratch members into a struct
-
-There isn't any special reason to do this other than it makes it obvious
-that the two members are connected.
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 67167240063c9eff15d60754c8d786a7a237ffa2)
-(cherry picked from drm-intel-next-queued)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h     |  6 ++++--
- drivers/gpu/drm/i915/i915_gem_gtt.c | 17 ++++++++---------
- 2 files changed, 12 insertions(+), 11 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index cba5dec686c9..fc7f5a8355f4 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -465,8 +465,10 @@ struct i915_gtt {
- 	void __iomem *gsm;
- 
- 	bool do_idle_maps;
--	dma_addr_t scratch_page_dma;
--	struct page *scratch_page;
-+	struct {
-+		dma_addr_t addr;
-+		struct page *page;
-+	} scratch;
- 
- 	/* global gtt ops */
- 	int (*gtt_probe)(struct drm_device *dev, size_t *gtt_total,
-diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
-index 46b9e32b1109..cdd7b45cd501 100644
---- a/drivers/gpu/drm/i915/i915_gem_gtt.c
-+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
-@@ -195,7 +195,7 @@ static void gen6_ppgtt_clear_range(struct i915_hw_ppgtt *ppgtt,
- 	unsigned last_pte, i;
- 
- 	scratch_pte = ppgtt->pte_encode(ppgtt->dev,
--					dev_priv->gtt.scratch_page_dma,
-+					dev_priv->gtt.scratch.addr,
- 					I915_CACHE_LLC);
- 
- 	while (num_entries) {
-@@ -521,8 +521,7 @@ static void gen6_ggtt_clear_range(struct drm_device *dev,
- 		 first_entry, num_entries, max_entries))
- 		num_entries = max_entries;
- 
--	scratch_pte = dev_priv->gtt.pte_encode(dev,
--					       dev_priv->gtt.scratch_page_dma,
-+	scratch_pte = dev_priv->gtt.pte_encode(dev, dev_priv->gtt.scratch.addr,
- 					       I915_CACHE_LLC);
- 	for (i = 0; i < num_entries; i++)
- 		iowrite32(scratch_pte, &gtt_base[i]);
-@@ -727,8 +726,8 @@ static int setup_scratch_page(struct drm_device *dev)
- #else
- 	dma_addr = page_to_phys(page);
- #endif
--	dev_priv->gtt.scratch_page = page;
--	dev_priv->gtt.scratch_page_dma = dma_addr;
-+	dev_priv->gtt.scratch.page = page;
-+	dev_priv->gtt.scratch.addr = dma_addr;
- 
- 	return 0;
- }
-@@ -736,11 +735,11 @@ static int setup_scratch_page(struct drm_device *dev)
- static void teardown_scratch_page(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
--	set_pages_wb(dev_priv->gtt.scratch_page, 1);
--	pci_unmap_page(dev->pdev, dev_priv->gtt.scratch_page_dma,
-+	set_pages_wb(dev_priv->gtt.scratch.page, 1);
-+	pci_unmap_page(dev->pdev, dev_priv->gtt.scratch.addr,
- 		       PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
--	put_page(dev_priv->gtt.scratch_page);
--	__free_page(dev_priv->gtt.scratch_page);
-+	put_page(dev_priv->gtt.scratch.page);
-+	__free_page(dev_priv->gtt.scratch.page);
- }
- 
- static inline unsigned int gen6_get_total_gtt_size(u16 snb_gmch_ctl)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0408-drm-i915-Drop-dev-from-pte_encode.patch b/patches.baytrail/0408-drm-i915-Drop-dev-from-pte_encode.patch
deleted file mode 100644
index 5e87856439e68..0000000000000
--- a/patches.baytrail/0408-drm-i915-Drop-dev-from-pte_encode.patch
+++ /dev/null
@@ -1,132 +0,0 @@
-From ea90eddb18a4a02cd5eb89c2e327b6a6c18e8ad2 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Thu, 27 Jun 2013 16:30:19 -0700
-Subject: drm/i915: Drop dev from pte_encode
-
-The original pte_encode function needed the dev argument so we could do
-platform specific handling via IS_GENX, etc. With the merging of a pte
-encoding function there should never been a need to quirk away gen
-specific details.
-
-The patch doesn't do much but makes the upcoming reworks in gtt/ppgtt/mm
-slightly (albeit, ever so) easier.
-
-Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 80a74f7f9c3e57123b6c3d314d4340fc8195a524)
-(cherry picked from drm-intel-next-queued)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h     |  6 ++----
- drivers/gpu/drm/i915/i915_gem_gtt.c | 21 ++++++++-------------
- 2 files changed, 10 insertions(+), 17 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index fc7f5a8355f4..956849f594e0 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -482,8 +482,7 @@ struct i915_gtt {
- 				   struct sg_table *st,
- 				   unsigned int pg_start,
- 				   enum i915_cache_level cache_level);
--	gen6_gtt_pte_t (*pte_encode)(struct drm_device *dev,
--				     dma_addr_t addr,
-+	gen6_gtt_pte_t (*pte_encode)(dma_addr_t addr,
- 				     enum i915_cache_level level);
- };
- #define gtt_total_entries(gtt) ((gtt).total >> PAGE_SHIFT)
-@@ -503,8 +502,7 @@ struct i915_hw_ppgtt {
- 			       struct sg_table *st,
- 			       unsigned int pg_start,
- 			       enum i915_cache_level cache_level);
--	gen6_gtt_pte_t (*pte_encode)(struct drm_device *dev,
--				     dma_addr_t addr,
-+	gen6_gtt_pte_t (*pte_encode)(dma_addr_t addr,
- 				     enum i915_cache_level level);
- 	int (*enable)(struct drm_device *dev);
- 	void (*cleanup)(struct i915_hw_ppgtt *ppgtt);
-diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
-index cdd7b45cd501..42b5a4fc3932 100644
---- a/drivers/gpu/drm/i915/i915_gem_gtt.c
-+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
-@@ -45,8 +45,7 @@
- #define GEN6_PTE_CACHE_LLC_MLC		(3 << 1)
- #define GEN6_PTE_ADDR_ENCODE(addr)	GEN6_GTT_ADDR_ENCODE(addr)
- 
--static gen6_gtt_pte_t gen6_pte_encode(struct drm_device *dev,
--				      dma_addr_t addr,
-+static gen6_gtt_pte_t gen6_pte_encode(dma_addr_t addr,
- 				      enum i915_cache_level level)
- {
- 	gen6_gtt_pte_t pte = GEN6_PTE_VALID;
-@@ -72,8 +71,7 @@ static gen6_gtt_pte_t gen6_pte_encode(struct drm_device *dev,
- #define BYT_PTE_WRITEABLE		(1 << 1)
- #define BYT_PTE_SNOOPED_BY_CPU_CACHES	(1 << 2)
- 
--static gen6_gtt_pte_t byt_pte_encode(struct drm_device *dev,
--				     dma_addr_t addr,
-+static gen6_gtt_pte_t byt_pte_encode(dma_addr_t addr,
- 				     enum i915_cache_level level)
- {
- 	gen6_gtt_pte_t pte = GEN6_PTE_VALID;
-@@ -90,8 +88,7 @@ static gen6_gtt_pte_t byt_pte_encode(struct drm_device *dev,
- 	return pte;
- }
- 
--static gen6_gtt_pte_t hsw_pte_encode(struct drm_device *dev,
--				     dma_addr_t addr,
-+static gen6_gtt_pte_t hsw_pte_encode(dma_addr_t addr,
- 				     enum i915_cache_level level)
- {
- 	gen6_gtt_pte_t pte = GEN6_PTE_VALID;
-@@ -194,8 +191,7 @@ static void gen6_ppgtt_clear_range(struct i915_hw_ppgtt *ppgtt,
- 	unsigned first_pte = first_entry % I915_PPGTT_PT_ENTRIES;
- 	unsigned last_pte, i;
- 
--	scratch_pte = ppgtt->pte_encode(ppgtt->dev,
--					dev_priv->gtt.scratch.addr,
-+	scratch_pte = ppgtt->pte_encode(dev_priv->gtt.scratch.addr,
- 					I915_CACHE_LLC);
- 
- 	while (num_entries) {
-@@ -231,8 +227,7 @@ static void gen6_ppgtt_insert_entries(struct i915_hw_ppgtt *ppgtt,
- 		dma_addr_t page_addr;
- 
- 		page_addr = sg_page_iter_dma_address(&sg_iter);
--		pt_vaddr[act_pte] = ppgtt->pte_encode(ppgtt->dev, page_addr,
--						      cache_level);
-+		pt_vaddr[act_pte] = ppgtt->pte_encode(page_addr, cache_level);
- 		if (++act_pte == I915_PPGTT_PT_ENTRIES) {
- 			kunmap_atomic(pt_vaddr);
- 			act_pt++;
-@@ -483,7 +478,7 @@ static void gen6_ggtt_insert_entries(struct drm_device *dev,
- 
- 	for_each_sg_page(st->sgl, &sg_iter, st->nents, 0) {
- 		addr = sg_page_iter_dma_address(&sg_iter);
--		iowrite32(dev_priv->gtt.pte_encode(dev, addr, level),
-+		iowrite32(dev_priv->gtt.pte_encode(addr, level),
- 			  &gtt_entries[i]);
- 		i++;
- 	}
-@@ -496,7 +491,7 @@ static void gen6_ggtt_insert_entries(struct drm_device *dev,
- 	 */
- 	if (i != 0)
- 		WARN_ON(readl(&gtt_entries[i-1])
--			!= dev_priv->gtt.pte_encode(dev, addr, level));
-+			!= dev_priv->gtt.pte_encode(addr, level));
- 
- 	/* This next bit makes the above posting read even more important. We
- 	 * want to flush the TLBs only after we're certain all the PTE updates
-@@ -521,7 +516,7 @@ static void gen6_ggtt_clear_range(struct drm_device *dev,
- 		 first_entry, num_entries, max_entries))
- 		num_entries = max_entries;
- 
--	scratch_pte = dev_priv->gtt.pte_encode(dev, dev_priv->gtt.scratch.addr,
-+	scratch_pte = dev_priv->gtt.pte_encode(dev_priv->gtt.scratch.addr,
- 					       I915_CACHE_LLC);
- 	for (i = 0; i < num_entries; i++)
- 		iowrite32(scratch_pte, &gtt_base[i]);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0409-drm-i915-Use-gtt-shortform-where-possible.patch b/patches.baytrail/0409-drm-i915-Use-gtt-shortform-where-possible.patch
deleted file mode 100644
index 31ebc559ea5d6..0000000000000
--- a/patches.baytrail/0409-drm-i915-Use-gtt-shortform-where-possible.patch
+++ /dev/null
@@ -1,73 +0,0 @@
-From a06cef966fc5d8c8035d7fa86e2b00dbbd57c2dd Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Thu, 27 Jun 2013 16:30:20 -0700
-Subject: drm/i915: Use gtt shortform where possible
-
-Just for compactness.
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit b2f21b4dfdd1e7396a99312c35092c8bb486a699)
-(cherry picked from drm-intel-next-queued)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem_gtt.c | 36 +++++++++++++++---------------------
- 1 file changed, 15 insertions(+), 21 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
-index 42b5a4fc3932..66929eac6367 100644
---- a/drivers/gpu/drm/i915/i915_gem_gtt.c
-+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
-@@ -846,34 +846,28 @@ int i915_gem_gtt_init(struct drm_device *dev)
- 	int ret;
- 
- 	if (INTEL_INFO(dev)->gen <= 5) {
--		dev_priv->gtt.gtt_probe = i915_gmch_probe;
--		dev_priv->gtt.gtt_remove = i915_gmch_remove;
-+		gtt->gtt_probe = i915_gmch_probe;
-+		gtt->gtt_remove = i915_gmch_remove;
- 	} else {
--		dev_priv->gtt.gtt_probe = gen6_gmch_probe;
--		dev_priv->gtt.gtt_remove = gen6_gmch_remove;
--		if (IS_HASWELL(dev)) {
--			dev_priv->gtt.pte_encode = hsw_pte_encode;
--		} else if (IS_VALLEYVIEW(dev)) {
--			dev_priv->gtt.pte_encode = byt_pte_encode;
--		} else {
--			dev_priv->gtt.pte_encode = gen6_pte_encode;
--		}
-+		gtt->gtt_probe = gen6_gmch_probe;
-+		gtt->gtt_remove = gen6_gmch_remove;
-+		if (IS_HASWELL(dev))
-+			gtt->pte_encode = hsw_pte_encode;
-+		else if (IS_VALLEYVIEW(dev))
-+			gtt->pte_encode = byt_pte_encode;
-+		else
-+			gtt->pte_encode = gen6_pte_encode;
- 	}
- 
--	ret = dev_priv->gtt.gtt_probe(dev, &dev_priv->gtt.total,
--				     &dev_priv->gtt.stolen_size,
--				     &gtt->mappable_base,
--				     &gtt->mappable_end);
-+	ret = gtt->gtt_probe(dev, &gtt->total, &gtt->stolen_size,
-+			     &gtt->mappable_base, &gtt->mappable_end);
- 	if (ret)
- 		return ret;
- 
- 	/* GMADR is the PCI mmio aperture into the global GTT. */
--	DRM_INFO("Memory usable by graphics device = %zdM\n",
--		 dev_priv->gtt.total >> 20);
--	DRM_DEBUG_DRIVER("GMADR size = %ldM\n",
--			 dev_priv->gtt.mappable_end >> 20);
--	DRM_DEBUG_DRIVER("GTT stolen size = %zdM\n",
--			 dev_priv->gtt.stolen_size >> 20);
-+	DRM_INFO("Memory usable by graphics device = %zdM\n", gtt->total >> 20);
-+	DRM_DEBUG_DRIVER("GMADR size = %ldM\n", gtt->mappable_end >> 20);
-+	DRM_DEBUG_DRIVER("GTT stolen size = %zdM\n", gtt->stolen_size >> 20);
- 
- 	return 0;
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0410-drm-i915-Move-fbc-members-out-of-line.patch b/patches.baytrail/0410-drm-i915-Move-fbc-members-out-of-line.patch
deleted file mode 100644
index 0c0a2ea5a5704..0000000000000
--- a/patches.baytrail/0410-drm-i915-Move-fbc-members-out-of-line.patch
+++ /dev/null
@@ -1,397 +0,0 @@
-From e2663b379ed8acc083f1527fd8bcd4835a9648e1 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Thu, 27 Jun 2013 16:30:21 -0700
-Subject: drm/i915: Move fbc members out of line
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-[danvet: Resolve conflict with Damien's FBC_CHIP_DEFAULT no fbc
-reason.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 5c3fe8b03ea6eb61617edb390d51c08609a495f7)
-(cherry picked from drm-intel-next-queued)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_debugfs.c    |  2 +-
- drivers/gpu/drm/i915/i915_drv.h        | 50 +++++++++++++++++++--------------
- drivers/gpu/drm/i915/i915_gem_stolen.c | 20 ++++++-------
- drivers/gpu/drm/i915/intel_display.c   |  6 ++--
- drivers/gpu/drm/i915/intel_drv.h       |  7 -----
- drivers/gpu/drm/i915/intel_pm.c        | 51 +++++++++++++++++-----------------
- 6 files changed, 69 insertions(+), 67 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
-index c16926ca15be..f82134f8e9fb 100644
---- a/drivers/gpu/drm/i915/i915_debugfs.c
-+++ b/drivers/gpu/drm/i915/i915_debugfs.c
-@@ -1492,7 +1492,7 @@ static int i915_fbc_status(struct seq_file *m, void *unused)
- 		seq_puts(m, "FBC enabled\n");
- 	} else {
- 		seq_puts(m, "FBC disabled: ");
--		switch (dev_priv->no_fbc_reason) {
-+		switch (dev_priv->fbc.no_fbc_reason) {
- 		case FBC_NO_OUTPUT:
- 			seq_puts(m, "no outputs");
- 			break;
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 956849f594e0..4bd72bf26049 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -528,18 +528,36 @@ struct i915_hw_context {
- 	struct i915_ctx_hang_stats hang_stats;
- };
- 
--enum no_fbc_reason {
--	FBC_NO_OUTPUT, /* no outputs enabled to compress */
--	FBC_STOLEN_TOO_SMALL, /* not enough space to hold compressed buffers */
--	FBC_UNSUPPORTED_MODE, /* interlace or doublescanned mode */
--	FBC_MODE_TOO_LARGE, /* mode too large for compression */
--	FBC_BAD_PLANE, /* fbc not supported on plane */
--	FBC_NOT_TILED, /* buffer not tiled */
--	FBC_MULTIPLE_PIPES, /* more than one pipe active */
--	FBC_MODULE_PARAM,
--	FBC_CHIP_DEFAULT, /* disabled by default on this chip */
-+struct i915_fbc {
-+	unsigned long size;
-+	unsigned int fb_id;
-+	enum plane plane;
-+	int y;
-+
-+	struct drm_mm_node *compressed_fb;
-+	struct drm_mm_node *compressed_llb;
-+
-+	struct intel_fbc_work {
-+		struct delayed_work work;
-+		struct drm_crtc *crtc;
-+		struct drm_framebuffer *fb;
-+		int interval;
-+	} *fbc_work;
-+
-+	enum {
-+		FBC_NO_OUTPUT, /* no outputs enabled to compress */
-+		FBC_STOLEN_TOO_SMALL, /* not enough space for buffers */
-+		FBC_UNSUPPORTED_MODE, /* interlace or doublescanned mode */
-+		FBC_MODE_TOO_LARGE, /* mode too large for compression */
-+		FBC_BAD_PLANE, /* fbc not supported on plane */
-+		FBC_NOT_TILED, /* buffer not tiled */
-+		FBC_MULTIPLE_PIPES, /* more than one pipe active */
-+		FBC_MODULE_PARAM,
-+		FBC_CHIP_DEFAULT, /* disabled by default on this chip */
-+	} no_fbc_reason;
- };
- 
-+
- enum intel_pch {
- 	PCH_NONE = 0,	/* No PCH present */
- 	PCH_IBX,	/* Ibexpeak PCH */
-@@ -1060,12 +1078,7 @@ typedef struct drm_i915_private {
- 
- 	int num_plane;
- 
--	unsigned long cfb_size;
--	unsigned int cfb_fb;
--	enum plane cfb_plane;
--	int cfb_y;
--	struct intel_fbc_work *fbc_work;
--
-+	struct i915_fbc fbc;
- 	struct intel_opregion opregion;
- 	struct intel_vbt_data vbt;
- 
-@@ -1143,11 +1156,6 @@ typedef struct drm_i915_private {
- 	/* Haswell power well */
- 	struct i915_power_well power_well;
- 
--	enum no_fbc_reason no_fbc_reason;
--
--	struct drm_mm_node *compressed_fb;
--	struct drm_mm_node *compressed_llb;
--
- 	struct i915_gpu_error gpu_error;
- 
- 	struct drm_i915_gem_object *vlv_pctx;
-diff --git a/drivers/gpu/drm/i915/i915_gem_stolen.c b/drivers/gpu/drm/i915/i915_gem_stolen.c
-index 982d4732cecf..0f8cf62a5b83 100644
---- a/drivers/gpu/drm/i915/i915_gem_stolen.c
-+++ b/drivers/gpu/drm/i915/i915_gem_stolen.c
-@@ -120,7 +120,7 @@ static int i915_setup_compression(struct drm_device *dev, int size)
- 		if (!compressed_llb)
- 			goto err_fb;
- 
--		dev_priv->compressed_llb = compressed_llb;
-+		dev_priv->fbc.compressed_llb = compressed_llb;
- 
- 		I915_WRITE(FBC_CFB_BASE,
- 			   dev_priv->mm.stolen_base + compressed_fb->start);
-@@ -128,8 +128,8 @@ static int i915_setup_compression(struct drm_device *dev, int size)
- 			   dev_priv->mm.stolen_base + compressed_llb->start);
- 	}
- 
--	dev_priv->compressed_fb = compressed_fb;
--	dev_priv->cfb_size = size;
-+	dev_priv->fbc.compressed_fb = compressed_fb;
-+	dev_priv->fbc.size = size;
- 
- 	DRM_DEBUG_KMS("reserved %d bytes of contiguous stolen space for FBC\n",
- 		      size);
-@@ -150,7 +150,7 @@ int i915_gem_stolen_setup_compression(struct drm_device *dev, int size)
- 	if (!drm_mm_initialized(&dev_priv->mm.stolen))
- 		return -ENODEV;
- 
--	if (size < dev_priv->cfb_size)
-+	if (size < dev_priv->fbc.size)
- 		return 0;
- 
- 	/* Release any current block */
-@@ -163,16 +163,16 @@ void i915_gem_stolen_cleanup_compression(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 
--	if (dev_priv->cfb_size == 0)
-+	if (dev_priv->fbc.size == 0)
- 		return;
- 
--	if (dev_priv->compressed_fb)
--		drm_mm_put_block(dev_priv->compressed_fb);
-+	if (dev_priv->fbc.compressed_fb)
-+		drm_mm_put_block(dev_priv->fbc.compressed_fb);
- 
--	if (dev_priv->compressed_llb)
--		drm_mm_put_block(dev_priv->compressed_llb);
-+	if (dev_priv->fbc.compressed_llb)
-+		drm_mm_put_block(dev_priv->fbc.compressed_llb);
- 
--	dev_priv->cfb_size = 0;
-+	dev_priv->fbc.size = 0;
- }
- 
- void i915_gem_cleanup_stolen(struct drm_device *dev)
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 19b7189f2ba3..2dff2112def1 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -3408,7 +3408,7 @@ static void ironlake_crtc_disable(struct drm_crtc *crtc)
- 	intel_crtc_wait_for_pending_flips(crtc);
- 	drm_vblank_off(dev, pipe);
- 
--	if (dev_priv->cfb_plane == plane)
-+	if (dev_priv->fbc.plane == plane)
- 		intel_disable_fbc(dev);
- 
- 	intel_crtc_update_cursor(crtc, false);
-@@ -3481,7 +3481,7 @@ static void haswell_crtc_disable(struct drm_crtc *crtc)
- 	drm_vblank_off(dev, pipe);
- 
- 	/* FBC must be disabled before disabling the plane on HSW. */
--	if (dev_priv->cfb_plane == plane)
-+	if (dev_priv->fbc.plane == plane)
- 		intel_disable_fbc(dev);
- 
- 	hsw_disable_ips(intel_crtc);
-@@ -3720,7 +3720,7 @@ static void i9xx_crtc_disable(struct drm_crtc *crtc)
- 	intel_crtc_wait_for_pending_flips(crtc);
- 	drm_vblank_off(dev, pipe);
- 
--	if (dev_priv->cfb_plane == plane)
-+	if (dev_priv->fbc.plane == plane)
- 		intel_disable_fbc(dev);
- 
- 	intel_crtc_dpms_overlay(intel_crtc, false);
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index 16ad38fd859d..02fee4364e8a 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -549,13 +549,6 @@ struct intel_unpin_work {
- 	bool enable_stall_check;
- };
- 
--struct intel_fbc_work {
--	struct delayed_work work;
--	struct drm_crtc *crtc;
--	struct drm_framebuffer *fb;
--	int interval;
--};
--
- int intel_pch_rawclk(struct drm_device *dev);
- 
- int intel_connector_update_modes(struct drm_connector *connector,
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 217e5dd1b8ff..940311fcee64 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -87,7 +87,7 @@ static void i8xx_enable_fbc(struct drm_crtc *crtc, unsigned long interval)
- 	int plane, i;
- 	u32 fbc_ctl, fbc_ctl2;
- 
--	cfb_pitch = dev_priv->cfb_size / FBC_LL_SIZE;
-+	cfb_pitch = dev_priv->fbc.size / FBC_LL_SIZE;
- 	if (fb->pitches[0] < cfb_pitch)
- 		cfb_pitch = fb->pitches[0];
- 
-@@ -326,7 +326,7 @@ static void intel_fbc_work_fn(struct work_struct *__work)
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 
- 	mutex_lock(&dev->struct_mutex);
--	if (work == dev_priv->fbc_work) {
-+	if (work == dev_priv->fbc.fbc_work) {
- 		/* Double check that we haven't switched fb without cancelling
- 		 * the prior work.
- 		 */
-@@ -334,12 +334,12 @@ static void intel_fbc_work_fn(struct work_struct *__work)
- 			dev_priv->display.enable_fbc(work->crtc,
- 						     work->interval);
- 
--			dev_priv->cfb_plane = to_intel_crtc(work->crtc)->plane;
--			dev_priv->cfb_fb = work->crtc->fb->base.id;
--			dev_priv->cfb_y = work->crtc->y;
-+			dev_priv->fbc.plane = to_intel_crtc(work->crtc)->plane;
-+			dev_priv->fbc.fb_id = work->crtc->fb->base.id;
-+			dev_priv->fbc.y = work->crtc->y;
- 		}
- 
--		dev_priv->fbc_work = NULL;
-+		dev_priv->fbc.fbc_work = NULL;
- 	}
- 	mutex_unlock(&dev->struct_mutex);
- 
-@@ -348,25 +348,25 @@ static void intel_fbc_work_fn(struct work_struct *__work)
- 
- static void intel_cancel_fbc_work(struct drm_i915_private *dev_priv)
- {
--	if (dev_priv->fbc_work == NULL)
-+	if (dev_priv->fbc.fbc_work == NULL)
- 		return;
- 
- 	DRM_DEBUG_KMS("cancelling pending FBC enable\n");
- 
- 	/* Synchronisation is provided by struct_mutex and checking of
--	 * dev_priv->fbc_work, so we can perform the cancellation
-+	 * dev_priv->fbc.fbc_work, so we can perform the cancellation
- 	 * entirely asynchronously.
- 	 */
--	if (cancel_delayed_work(&dev_priv->fbc_work->work))
-+	if (cancel_delayed_work(&dev_priv->fbc.fbc_work->work))
- 		/* tasklet was killed before being run, clean up */
--		kfree(dev_priv->fbc_work);
-+		kfree(dev_priv->fbc.fbc_work);
- 
- 	/* Mark the work as no longer wanted so that if it does
- 	 * wake-up (because the work was already running and waiting
- 	 * for our mutex), it will discover that is no longer
- 	 * necessary to run.
- 	 */
--	dev_priv->fbc_work = NULL;
-+	dev_priv->fbc.fbc_work = NULL;
- }
- 
- static void intel_enable_fbc(struct drm_crtc *crtc, unsigned long interval)
-@@ -392,7 +392,7 @@ static void intel_enable_fbc(struct drm_crtc *crtc, unsigned long interval)
- 	work->interval = interval;
- 	INIT_DELAYED_WORK(&work->work, intel_fbc_work_fn);
- 
--	dev_priv->fbc_work = work;
-+	dev_priv->fbc.fbc_work = work;
- 
- 	/* Delay the actual enabling to let pageflipping cease and the
- 	 * display to settle before starting the compression. Note that
-@@ -418,7 +418,7 @@ void intel_disable_fbc(struct drm_device *dev)
- 		return;
- 
- 	dev_priv->display.disable_fbc(dev);
--	dev_priv->cfb_plane = -1;
-+	dev_priv->fbc.plane = -1;
- }
- 
- /**
-@@ -470,7 +470,8 @@ void intel_update_fbc(struct drm_device *dev)
- 		    !to_intel_crtc(tmp_crtc)->primary_disabled) {
- 			if (crtc) {
- 				DRM_DEBUG_KMS("more than one pipe active, disabling compression\n");
--				dev_priv->no_fbc_reason = FBC_MULTIPLE_PIPES;
-+				dev_priv->fbc.no_fbc_reason =
-+					FBC_MULTIPLE_PIPES;
- 				goto out_disable;
- 			}
- 			crtc = tmp_crtc;
-@@ -479,7 +480,7 @@ void intel_update_fbc(struct drm_device *dev)
- 
- 	if (!crtc || crtc->fb == NULL) {
- 		DRM_DEBUG_KMS("no output, disabling\n");
--		dev_priv->no_fbc_reason = FBC_NO_OUTPUT;
-+		dev_priv->fbc.no_fbc_reason = FBC_NO_OUTPUT;
- 		goto out_disable;
- 	}
- 
-@@ -491,19 +492,19 @@ void intel_update_fbc(struct drm_device *dev)
- 	if (i915_enable_fbc < 0 &&
- 	    INTEL_INFO(dev)->gen <= 7 && !IS_HASWELL(dev)) {
- 		DRM_DEBUG_KMS("disabled per chip default\n");
--		dev_priv->no_fbc_reason = FBC_CHIP_DEFAULT;
-+		dev_priv->fbc.no_fbc_reason = FBC_CHIP_DEFAULT;
- 		goto out_disable;
- 	}
- 	if (!i915_enable_fbc) {
- 		DRM_DEBUG_KMS("fbc disabled per module param\n");
--		dev_priv->no_fbc_reason = FBC_MODULE_PARAM;
-+		dev_priv->fbc.no_fbc_reason = FBC_MODULE_PARAM;
- 		goto out_disable;
- 	}
- 	if ((crtc->mode.flags & DRM_MODE_FLAG_INTERLACE) ||
- 	    (crtc->mode.flags & DRM_MODE_FLAG_DBLSCAN)) {
- 		DRM_DEBUG_KMS("mode incompatible with compression, "
- 			      "disabling\n");
--		dev_priv->no_fbc_reason = FBC_UNSUPPORTED_MODE;
-+		dev_priv->fbc.no_fbc_reason = FBC_UNSUPPORTED_MODE;
- 		goto out_disable;
- 	}
- 
-@@ -517,13 +518,13 @@ void intel_update_fbc(struct drm_device *dev)
- 	if ((crtc->mode.hdisplay > max_hdisplay) ||
- 	    (crtc->mode.vdisplay > max_vdisplay)) {
- 		DRM_DEBUG_KMS("mode too large for compression, disabling\n");
--		dev_priv->no_fbc_reason = FBC_MODE_TOO_LARGE;
-+		dev_priv->fbc.no_fbc_reason = FBC_MODE_TOO_LARGE;
- 		goto out_disable;
- 	}
- 	if ((IS_I915GM(dev) || IS_I945GM(dev) || IS_HASWELL(dev)) &&
- 	    intel_crtc->plane != 0) {
- 		DRM_DEBUG_KMS("plane not 0, disabling compression\n");
--		dev_priv->no_fbc_reason = FBC_BAD_PLANE;
-+		dev_priv->fbc.no_fbc_reason = FBC_BAD_PLANE;
- 		goto out_disable;
- 	}
- 
-@@ -533,7 +534,7 @@ void intel_update_fbc(struct drm_device *dev)
- 	if (obj->tiling_mode != I915_TILING_X ||
- 	    obj->fence_reg == I915_FENCE_REG_NONE) {
- 		DRM_DEBUG_KMS("framebuffer not tiled or fenced, disabling compression\n");
--		dev_priv->no_fbc_reason = FBC_NOT_TILED;
-+		dev_priv->fbc.no_fbc_reason = FBC_NOT_TILED;
- 		goto out_disable;
- 	}
- 
-@@ -543,7 +544,7 @@ void intel_update_fbc(struct drm_device *dev)
- 
- 	if (i915_gem_stolen_setup_compression(dev, intel_fb->obj->base.size)) {
- 		DRM_DEBUG_KMS("framebuffer too large, disabling compression\n");
--		dev_priv->no_fbc_reason = FBC_STOLEN_TOO_SMALL;
-+		dev_priv->fbc.no_fbc_reason = FBC_STOLEN_TOO_SMALL;
- 		goto out_disable;
- 	}
- 
-@@ -552,9 +553,9 @@ void intel_update_fbc(struct drm_device *dev)
- 	 * cannot be unpinned (and have its GTT offset and fence revoked)
- 	 * without first being decoupled from the scanout and FBC disabled.
- 	 */
--	if (dev_priv->cfb_plane == intel_crtc->plane &&
--	    dev_priv->cfb_fb == fb->base.id &&
--	    dev_priv->cfb_y == crtc->y)
-+	if (dev_priv->fbc.plane == intel_crtc->plane &&
-+	    dev_priv->fbc.fb_id == fb->base.id &&
-+	    dev_priv->fbc.y == crtc->y)
- 		return;
- 
- 	if (intel_fbc_enabled(dev)) {
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0411-drm-i915-Move-gtt_mtrr-to-i915_gtt.patch b/patches.baytrail/0411-drm-i915-Move-gtt_mtrr-to-i915_gtt.patch
deleted file mode 100644
index cbf11a078629a..0000000000000
--- a/patches.baytrail/0411-drm-i915-Move-gtt_mtrr-to-i915_gtt.patch
+++ /dev/null
@@ -1,70 +0,0 @@
-From f1b3e46f84c991d61e999335f5a44168645430cd Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Thu, 27 Jun 2013 16:30:23 -0700
-Subject: drm/i915: Move gtt_mtrr to i915_gtt
-
-for file in `ls drivers/gpu/drm/i915/*.c` ; do
-	sed -i "s/mm.gtt_mtrr/gtt.mtrr/" $file;
-done
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 911bdf0ae6405db3313c6e5798cf08640fdd0714)
-(cherry picked from drm-intel-next-queued)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_dma.c |    8 ++++----
- drivers/gpu/drm/i915/i915_drv.h |    4 ++--
- 2 files changed, 6 insertions(+), 6 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_dma.c
-+++ b/drivers/gpu/drm/i915/i915_dma.c
-@@ -1575,8 +1575,8 @@ int i915_driver_load(struct drm_device *
- 		goto out_rmmap;
- 	}
- 
--	dev_priv->mm.gtt_mtrr = arch_phys_wc_add(dev_priv->gtt.mappable_base,
--						 aperture_size);
-+	dev_priv->gtt.mtrr = arch_phys_wc_add(dev_priv->gtt.mappable_base,
-+					      aperture_size);
- 
- 	/* The i915 workqueue is primarily used for batched retirement of
- 	 * requests (and thus managing bo) once the task has been completed
-@@ -1678,7 +1678,7 @@ out_gem_unload:
- 	pm_qos_remove_request(&dev_priv->pm_qos);
- 	destroy_workqueue(dev_priv->wq);
- out_mtrrfree:
--	arch_phys_wc_del(dev_priv->mm.gtt_mtrr);
-+	arch_phys_wc_del(dev_priv->gtt.mtrr);
- 	io_mapping_free(dev_priv->gtt.mappable);
- 	dev_priv->gtt.gtt_remove(dev);
- out_rmmap:
-@@ -1716,7 +1716,7 @@ int i915_driver_unload(struct drm_device
- 	cancel_delayed_work_sync(&dev_priv->mm.retire_work);
- 
- 	io_mapping_free(dev_priv->gtt.mappable);
--	arch_phys_wc_del(dev_priv->mm.gtt_mtrr);
-+	arch_phys_wc_del(dev_priv->gtt.mtrr);
- 
- 	acpi_video_unregister();
- 
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -470,6 +470,8 @@ struct i915_gtt {
- 		struct page *page;
- 	} scratch;
- 
-+	int mtrr;
-+
- 	/* global gtt ops */
- 	int (*gtt_probe)(struct drm_device *dev, size_t *gtt_total,
- 			  size_t *stolen, phys_addr_t *mappable_base,
-@@ -835,8 +837,6 @@ struct i915_gem_mm {
- 	/** Usable portion of the GTT for GEM */
- 	unsigned long stolen_base; /* limited to low memory (32-bit) */
- 
--	int gtt_mtrr;
--
- 	/** PPGTT used for aliasing the PPGTT with the GTT */
- 	struct i915_hw_ppgtt *aliasing_ppgtt;
- 
diff --git a/patches.baytrail/0412-drm-i915-pixel-multiplier-readout-support-for-pch-po.patch b/patches.baytrail/0412-drm-i915-pixel-multiplier-readout-support-for-pch-po.patch
deleted file mode 100644
index 1e4d0e353ac3b..0000000000000
--- a/patches.baytrail/0412-drm-i915-pixel-multiplier-readout-support-for-pch-po.patch
+++ /dev/null
@@ -1,77 +0,0 @@
-From 8a022b924d5437af2370924a2086969dadcaf1c8 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 27 Jun 2013 19:47:19 +0200
-Subject: drm/i915: pixel multiplier readout support for pch ports
-
-Now that we painstakingly track the shared pch dplls we can finally
-implement pixel mutliplier readout support for pch ports, too.
-
-v2: Undo the temporary hack to disable the sdvo pixel multiplier
-cross-checking.
-
-Cc: Imre Deak <imre.deak@intel.com>
-Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
-Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit c93f54cf7de31d44b4036d0d1e291172b2bd5743)
-(cherry picked from drm-intel-next-queued)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 12 ++++++------
- drivers/gpu/drm/i915/intel_sdvo.c    |  3 ---
- 2 files changed, 6 insertions(+), 9 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 2dff2112def1..8345c2441047 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -5812,10 +5812,6 @@ static bool ironlake_get_pipe_config(struct intel_crtc *crtc,
- 
- 		ironlake_get_fdi_m_n_config(crtc, pipe_config);
- 
--		/* XXX: Can't properly read out the pch dpll pixel multiplier
--		 * since we don't have state tracking for pch clocks yet. */
--		pipe_config->pixel_multiplier = 1;
--
- 		if (HAS_PCH_IBX(dev_priv->dev)) {
- 			pipe_config->shared_dpll = crtc->pipe;
- 		} else {
-@@ -5830,6 +5826,11 @@ static bool ironlake_get_pipe_config(struct intel_crtc *crtc,
- 
- 		WARN_ON(!pll->get_hw_state(dev_priv, pll,
- 					   &pipe_config->dpll_hw_state));
-+
-+		tmp = pipe_config->dpll_hw_state.dpll;
-+		pipe_config->pixel_multiplier =
-+			((tmp & PLL_REF_SDVO_HDMI_MULTIPLIER_MASK)
-+			 >> PLL_REF_SDVO_HDMI_MULTIPLIER_SHIFT) + 1;
- 	} else {
- 		pipe_config->pixel_multiplier = 1;
- 	}
-@@ -8084,8 +8085,7 @@ intel_pipe_config_compare(struct drm_device *dev,
- 	PIPE_CONF_CHECK_I(adjusted_mode.crtc_vsync_start);
- 	PIPE_CONF_CHECK_I(adjusted_mode.crtc_vsync_end);
- 
--	if (!HAS_PCH_SPLIT(dev))
--		PIPE_CONF_CHECK_I(pixel_multiplier);
-+	PIPE_CONF_CHECK_I(pixel_multiplier);
- 
- 	PIPE_CONF_CHECK_FLAGS(adjusted_mode.flags,
- 			      DRM_MODE_FLAG_INTERLACE);
-diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
-index 2628d5622449..8415d6a610dd 100644
---- a/drivers/gpu/drm/i915/intel_sdvo.c
-+++ b/drivers/gpu/drm/i915/intel_sdvo.c
-@@ -1370,9 +1370,6 @@ static void intel_sdvo_get_config(struct intel_encoder *encoder,
- 		break;
- 	}
- 
--	if(HAS_PCH_SPLIT(dev))
--		return; /* no pixel multiplier readout support yet */
--
- 	WARN(encoder_pixel_multiplier != pipe_config->pixel_multiplier,
- 	     "SDVO pixel multiplier mismatch, port: %i, encoder: %i\n",
- 	     pipe_config->pixel_multiplier, encoder_pixel_multiplier);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0413-drm-i915-add-fastboot-param-for-fast-loose-mode-sett.patch b/patches.baytrail/0413-drm-i915-add-fastboot-param-for-fast-loose-mode-sett.patch
deleted file mode 100644
index b674be35e1c5e..0000000000000
--- a/patches.baytrail/0413-drm-i915-add-fastboot-param-for-fast-loose-mode-sett.patch
+++ /dev/null
@@ -1,52 +0,0 @@
-From e2e034af7b76954f324b71d8d4832ff76eb4cf61 Mon Sep 17 00:00:00 2001
-From: Jesse Barnes <jbarnes@virtuousgeek.org>
-Date: Wed, 26 Jun 2013 01:38:15 +0300
-Subject: drm/i915: add fastboot param for fast & loose mode setting
-
-Handling all the state properly for fastboot is still not yet done by
-far, but we need some way to be able to test what we currently have.
-So hide the not-yet-quite-complete stuff behind a module option.
-
-Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-[danvet: Add a real commit message.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 2385bdf0787aef45ee1847b8508a417433da7e14)
-(cherry picked from drm-intel-next-queued)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.c | 5 +++++
- drivers/gpu/drm/i915/i915_drv.h | 1 +
- 2 files changed, 6 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
-index 45b3c030f483..d286785c1bab 100644
---- a/drivers/gpu/drm/i915/i915_drv.c
-+++ b/drivers/gpu/drm/i915/i915_drv.c
-@@ -132,6 +132,11 @@ int i915_enable_ips __read_mostly = 1;
- module_param_named(enable_ips, i915_enable_ips, int, 0600);
- MODULE_PARM_DESC(enable_ips, "Enable IPS (default: true)");
- 
-+bool i915_fastboot __read_mostly = 0;
-+module_param_named(fastboot, i915_fastboot, bool, 0600);
-+MODULE_PARM_DESC(fastboot, "Try to skip unnecessary mode sets at boot time "
-+		 "(default: false)");
-+
- static struct drm_driver driver;
- extern int intel_agp_enabled;
- 
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index cd31abf92e1d..45da73925d02 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1552,6 +1552,7 @@ extern int i915_enable_ppgtt __read_mostly;
- extern unsigned int i915_preliminary_hw_support __read_mostly;
- extern int i915_disable_power_well __read_mostly;
- extern int i915_enable_ips __read_mostly;
-+extern bool i915_fastboot __read_mostly;
- 
- extern int i915_suspend(struct drm_device *dev, pm_message_t state);
- extern int i915_resume(struct drm_device *dev);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0414-drm-i915-get-mode-clock-when-reading-the-pipe-config.patch b/patches.baytrail/0414-drm-i915-get-mode-clock-when-reading-the-pipe-config.patch
deleted file mode 100644
index cf779c7338946..0000000000000
--- a/patches.baytrail/0414-drm-i915-get-mode-clock-when-reading-the-pipe-config.patch
+++ /dev/null
@@ -1,310 +0,0 @@
-From c287947be1b0a603ce25bef17b88e23f98673334 Mon Sep 17 00:00:00 2001
-From: Jesse Barnes <jbarnes@virtuousgeek.org>
-Date: Thu, 27 Jun 2013 00:39:25 +0300
-Subject: drm/i915: get mode clock when reading the pipe config v9
-
-We need this for comparing modes between configuration changes.
-
-The tricky part is to allow us to reuse the new get_clock stuff to
-recover the lvds clock on gen2/3 when neither the vbt has an lvds mode
-nor the panel a (useful) EDID.
-
-v2: try harder to calulate non-simple pixel clocks (Daniel)
-    call get_clock after getting the encoder config, needed for pixel multiply
-    (Jesse)
-v3: drop get_clock now that the pixel_multiply has been moved into
-    get_pipe_config
-v4: re-add get_clock; we need to get the pixel multiplier in the
-    encoder, so need to calculate the clock value after the encoder's
-    get_config is called
-v5: drop hsw clock_get, still needs to be written
-v6: add fuzzy clock check (Daniel)
-v7: wrap fuzzy clock check under !IS_HASWELL
-    use port_clock field rather than a new CPU eDP clock field in crtc_config
-v8: remove stale pixel_multiplier sets (Daniel)
-    multiply by pixel_multiplier in 9xx clock get too (Daniel)
-v9: make sure we set pixel_multiplier before calling clock_get from mode_get
-    for LVDS (Daniel)
-
-Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-[danvet: Add some explanation to the commit message about why we have
-to jump through a few hoops. Also remove the rebase-fail hunk from
-intel_sdvo.c]
-[danvet: Squash in the fixup from Jesse to also call ->get_clock in
-the modeset state checker.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit f1f644dc66cbaf5a4c7dcde683361536b41885b9)
-(cherry picked from drm-intel-next-queued)
-Signed-off-by: James Ausmus <james.ausmus@intel.com>
-
-Conflicts:
-	drivers/gpu/drm/i915/intel_display.c
-	(context changes)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h      |   1 +
- drivers/gpu/drm/i915/intel_display.c | 126 ++++++++++++++++++++++++++++++++---
- drivers/gpu/drm/i915/intel_dp.c      |   7 ++
- 3 files changed, 123 insertions(+), 11 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 45da73925d02..e90b919c0d32 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -367,6 +367,7 @@ struct drm_i915_display_funcs {
- 	 * fills out the pipe-config with the hw state. */
- 	bool (*get_pipe_config)(struct intel_crtc *,
- 				struct intel_crtc_config *);
-+	void (*get_clock)(struct intel_crtc *, struct intel_crtc_config *);
- 	int (*crtc_mode_set)(struct drm_crtc *crtc,
- 			     int x, int y,
- 			     struct drm_framebuffer *old_fb);
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 8345c2441047..2841c79525db 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -45,6 +45,11 @@ bool intel_pipe_has_type(struct drm_crtc *crtc, int type);
- static void intel_increase_pllclock(struct drm_crtc *crtc);
- static void intel_crtc_update_cursor(struct drm_crtc *crtc, bool on);
- 
-+static void i9xx_crtc_clock_get(struct intel_crtc *crtc,
-+				struct intel_crtc_config *pipe_config);
-+static void ironlake_crtc_clock_get(struct intel_crtc *crtc,
-+				    struct intel_crtc_config *pipe_config);
-+
- typedef struct {
- 	int	min, max;
- } intel_range_t;
-@@ -6854,11 +6859,12 @@ void intel_release_load_detect_pipe(struct drm_connector *connector,
- }
- 
- /* Returns the clock of the currently programmed mode of the given pipe. */
--static int intel_crtc_clock_get(struct drm_device *dev, struct drm_crtc *crtc)
-+static void i9xx_crtc_clock_get(struct intel_crtc *crtc,
-+				struct intel_crtc_config *pipe_config)
- {
-+	struct drm_device *dev = crtc->base.dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
--	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
--	int pipe = intel_crtc->pipe;
-+	int pipe = pipe_config->cpu_transcoder;
- 	u32 dpll = I915_READ(DPLL(pipe));
- 	u32 fp;
- 	intel_clock_t clock;
-@@ -6897,7 +6903,8 @@ static int intel_crtc_clock_get(struct drm_device *dev, struct drm_crtc *crtc)
- 		default:
- 			DRM_DEBUG_KMS("Unknown DPLL mode %08x in programmed "
- 				  "mode\n", (int)(dpll & DPLL_MODE_MASK));
--			return 0;
-+			pipe_config->adjusted_mode.clock = 0;
-+			return;
- 		}
- 
- 		if (IS_PINEVIEW(dev))
-@@ -6934,12 +6941,55 @@ static int intel_crtc_clock_get(struct drm_device *dev, struct drm_crtc *crtc)
- 		}
- 	}
- 
--	/* XXX: It would be nice to validate the clocks, but we can't reuse
--	 * i830PllIsValid() because it relies on the xf86_config connector
--	 * configuration being accurate, which it isn't necessarily.
-+	pipe_config->adjusted_mode.clock = clock.dot *
-+		pipe_config->pixel_multiplier;
-+}
-+
-+static void ironlake_crtc_clock_get(struct intel_crtc *crtc,
-+				    struct intel_crtc_config *pipe_config)
-+{
-+	struct drm_device *dev = crtc->base.dev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	enum transcoder cpu_transcoder = pipe_config->cpu_transcoder;
-+	int link_freq, repeat;
-+	u64 clock;
-+	u32 link_m, link_n;
-+
-+	repeat = pipe_config->pixel_multiplier;
-+
-+	/*
-+	 * The calculation for the data clock is:
-+	 * pixel_clock = ((m/n)*(link_clock * nr_lanes * repeat))/bpp
-+	 * But we want to avoid losing precison if possible, so:
-+	 * pixel_clock = ((m * link_clock * nr_lanes * repeat)/(n*bpp))
-+	 *
-+	 * and the link clock is simpler:
-+	 * link_clock = (m * link_clock * repeat) / n
-+	 */
-+
-+	/*
-+	 * We need to get the FDI or DP link clock here to derive
-+	 * the M/N dividers.
-+	 *
-+	 * For FDI, we read it from the BIOS or use a fixed 2.7GHz.
-+	 * For DP, it's either 1.62GHz or 2.7GHz.
-+	 * We do our calculations in 10*MHz since we don't need much precison.
- 	 */
-+	if (pipe_config->has_pch_encoder)
-+		link_freq = intel_fdi_link_freq(dev) * 10000;
-+	else
-+		link_freq = pipe_config->port_clock;
-+
-+	link_m = I915_READ(PIPE_LINK_M1(cpu_transcoder));
-+	link_n = I915_READ(PIPE_LINK_N1(cpu_transcoder));
-+
-+	if (!link_m || !link_n)
-+		return;
-+
-+	clock = ((u64)link_m * (u64)link_freq * (u64)repeat);
-+	do_div(clock, link_n);
- 
--	return clock.dot;
-+	pipe_config->adjusted_mode.clock = clock;
- }
- 
- /** Returns the currently programmed mode of the given pipe. */
-@@ -6950,6 +7000,7 @@ struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev,
- 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
- 	enum transcoder cpu_transcoder = intel_crtc->config.cpu_transcoder;
- 	struct drm_display_mode *mode;
-+	struct intel_crtc_config pipe_config;
- 	int htot = I915_READ(HTOTAL(cpu_transcoder));
- 	int hsync = I915_READ(HSYNC(cpu_transcoder));
- 	int vtot = I915_READ(VTOTAL(cpu_transcoder));
-@@ -6959,7 +7010,18 @@ struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev,
- 	if (!mode)
- 		return NULL;
- 
--	mode->clock = intel_crtc_clock_get(dev, crtc);
-+	/*
-+	 * Construct a pipe_config sufficient for getting the clock info
-+	 * back out of crtc_clock_get.
-+	 *
-+	 * Note, if LVDS ever uses a non-1 pixel multiplier, we'll need
-+	 * to use a real value here instead.
-+	 */
-+	pipe_config.cpu_transcoder = intel_crtc->pipe;
-+	pipe_config.pixel_multiplier = 1;
-+	i9xx_crtc_clock_get(intel_crtc, &pipe_config);
-+
-+	mode->clock = pipe_config.adjusted_mode.clock;
- 	mode->hdisplay = (htot & 0xffff) + 1;
- 	mode->htotal = ((htot & 0xffff0000) >> 16) + 1;
- 	mode->hsync_start = (hsync & 0xffff) + 1;
-@@ -8020,6 +8082,28 @@ intel_modeset_update_state(struct drm_device *dev, unsigned prepare_pipes)
- 
- }
- 
-+static bool intel_fuzzy_clock_check(struct intel_crtc_config *cur,
-+				    struct intel_crtc_config *new)
-+{
-+	int clock1, clock2, diff;
-+
-+	clock1 = cur->adjusted_mode.clock;
-+	clock2 = new->adjusted_mode.clock;
-+
-+	if (clock1 == clock2)
-+		return true;
-+
-+	if (!clock1 || !clock2)
-+		return false;
-+
-+	diff = abs(clock1 - clock2);
-+
-+	if (((((diff + clock1 + clock2) * 100)) / (clock1 + clock2)) < 105)
-+		return true;
-+
-+	return false;
-+}
-+
- #define for_each_intel_crtc_masked(dev, mask, intel_crtc) \
- 	list_for_each_entry((intel_crtc), \
- 			    &(dev)->mode_config.crtc_list, \
-@@ -8125,6 +8209,15 @@ intel_pipe_config_compare(struct drm_device *dev,
- #undef PIPE_CONF_CHECK_FLAGS
- #undef PIPE_CONF_QUIRK
- 
-+	if (!IS_HASWELL(dev)) {
-+		if (!intel_fuzzy_clock_check(current_config, pipe_config)) {
-+			DRM_ERROR("mismatch in clock (expected %d, found %d\n",
-+				  current_config->adjusted_mode.clock,
-+				  pipe_config->adjusted_mode.clock);
-+			return false;
-+		}
-+	}
-+
- 	return true;
- }
- 
-@@ -8252,8 +8345,12 @@ check_crtc_state(struct drm_device *dev)
- 			if (encoder->base.crtc != &crtc->base)
- 				continue;
- 			if (encoder->get_config &&
--			    encoder->get_hw_state(encoder, &pipe))
-+			    encoder->get_hw_state(encoder, &pipe) &&
-+			    dev_priv->display.get_clock) {
- 				encoder->get_config(encoder, &pipe_config);
-+				dev_priv->display.get_clock(crtc,
-+							    &pipe_config);
-+			}
- 		}
- 
- 		WARN(crtc->active != active,
-@@ -9261,6 +9358,7 @@ static void intel_init_display(struct drm_device *dev)
- 		dev_priv->display.update_plane = ironlake_update_plane;
- 	} else if (HAS_PCH_SPLIT(dev)) {
- 		dev_priv->display.get_pipe_config = ironlake_get_pipe_config;
-+		dev_priv->display.get_clock = ironlake_crtc_clock_get;
- 		dev_priv->display.crtc_mode_set = ironlake_crtc_mode_set;
- 		dev_priv->display.crtc_enable = ironlake_crtc_enable;
- 		dev_priv->display.crtc_disable = ironlake_crtc_disable;
-@@ -9268,6 +9366,7 @@ static void intel_init_display(struct drm_device *dev)
- 		dev_priv->display.update_plane = ironlake_update_plane;
- 	} else if (IS_VALLEYVIEW(dev)) {
- 		dev_priv->display.get_pipe_config = i9xx_get_pipe_config;
-+		dev_priv->display.get_clock = i9xx_crtc_clock_get;
- 		dev_priv->display.crtc_mode_set = i9xx_crtc_mode_set;
- 		dev_priv->display.crtc_enable = valleyview_crtc_enable;
- 		dev_priv->display.crtc_disable = i9xx_crtc_disable;
-@@ -9275,6 +9374,7 @@ static void intel_init_display(struct drm_device *dev)
- 		dev_priv->display.update_plane = i9xx_update_plane;
- 	} else {
- 		dev_priv->display.get_pipe_config = i9xx_get_pipe_config;
-+		dev_priv->display.get_clock = i9xx_crtc_clock_get;
- 		dev_priv->display.crtc_mode_set = i9xx_crtc_mode_set;
- 		dev_priv->display.crtc_enable = i9xx_crtc_enable;
- 		dev_priv->display.crtc_disable = i9xx_crtc_disable;
-@@ -9837,8 +9937,12 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev)
- 		if (encoder->get_hw_state(encoder, &pipe)) {
- 			crtc = to_intel_crtc(dev_priv->pipe_to_crtc_mapping[pipe]);
- 			encoder->base.crtc = &crtc->base;
--			if (encoder->get_config)
-+			if (encoder->get_config &&
-+			    dev_priv->display.get_clock) {
- 				encoder->get_config(encoder, &crtc->config);
-+				dev_priv->display.get_clock(crtc,
-+							    &crtc->config);
-+			}
- 		} else {
- 			encoder->base.crtc = NULL;
- 		}
-diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
-index 3aed1fe0aa51..9d90d4350ebf 100644
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -1371,6 +1371,13 @@ static void intel_dp_get_config(struct intel_encoder *encoder,
- 	}
- 
- 	pipe_config->adjusted_mode.flags |= flags;
-+
-+	if (dp_to_dig_port(intel_dp)->port == PORT_A) {
-+		if ((I915_READ(DP_A) & DP_PLL_FREQ_MASK) == DP_PLL_FREQ_160MHZ)
-+			pipe_config->port_clock = 162000;
-+		else
-+			pipe_config->port_clock = 270000;
-+	}
- }
- 
- static void intel_disable_dp(struct intel_encoder *encoder)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0415-drm-i915-copy-fetched-mode-state-into-crtc-at-setup_.patch b/patches.baytrail/0415-drm-i915-copy-fetched-mode-state-into-crtc-at-setup_.patch
deleted file mode 100644
index f9cc5f88b2484..0000000000000
--- a/patches.baytrail/0415-drm-i915-copy-fetched-mode-state-into-crtc-at-setup_.patch
+++ /dev/null
@@ -1,81 +0,0 @@
-From dfa9d3dad396183266cd7a9e5197113a0fcbda0a Mon Sep 17 00:00:00 2001
-From: Jesse Barnes <jbarnes@virtuousgeek.org>
-Date: Wed, 26 Jun 2013 18:57:38 +0300
-Subject: drm/i915: copy fetched mode state into crtc at setup_hw time v5
-
-We already fetch and track other state into the main CRTC and encoder
-structs, and for fastboot we need to do the same with the mode and clock
-data we read out.
-
-v2: fix debug print
-v3: use fastboot param around state copy
-v4: set clock and flags for crtc here instead of in setup_hw_state
-v5: rename function to intel_crtc_mode_from_pipe_config for consistency (Chris)
-
-Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit babea61dfb82b4bdfdbc57ebf081ef6c16ffd524)
-(cherry picked from drm-intel-next-queued)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 37 ++++++++++++++++++++++++++++++++++++
- 1 file changed, 37 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 2841c79525db..3199691d6a51 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -4712,6 +4712,27 @@ static void intel_get_pipe_timings(struct intel_crtc *crtc,
- 	pipe_config->requested_mode.hdisplay = ((tmp >> 16) & 0xffff) + 1;
- }
- 
-+static void intel_crtc_mode_from_pipe_config(struct intel_crtc *intel_crtc,
-+					     struct intel_crtc_config *pipe_config)
-+{
-+	struct drm_crtc *crtc = &intel_crtc->base;
-+
-+	crtc->mode.hdisplay = pipe_config->adjusted_mode.crtc_hdisplay;
-+	crtc->mode.htotal = pipe_config->adjusted_mode.crtc_htotal;
-+	crtc->mode.hsync_start = pipe_config->adjusted_mode.crtc_hsync_start;
-+	crtc->mode.hsync_end = pipe_config->adjusted_mode.crtc_hsync_end;
-+
-+	crtc->mode.vdisplay = pipe_config->adjusted_mode.crtc_vdisplay;
-+	crtc->mode.vtotal = pipe_config->adjusted_mode.crtc_vtotal;
-+	crtc->mode.vsync_start = pipe_config->adjusted_mode.crtc_vsync_start;
-+	crtc->mode.vsync_end = pipe_config->adjusted_mode.crtc_vsync_end;
-+
-+	crtc->mode.flags = pipe_config->adjusted_mode.flags;
-+
-+	crtc->mode.clock = pipe_config->adjusted_mode.clock;
-+	crtc->mode.flags |= pipe_config->adjusted_mode.flags;
-+}
-+
- static void i9xx_set_pipeconf(struct intel_crtc *intel_crtc)
- {
- 	struct drm_device *dev = intel_crtc->base.dev;
-@@ -9986,6 +10007,22 @@ void intel_modeset_setup_hw_state(struct drm_device *dev,
- 
- 	intel_modeset_readout_hw_state(dev);
- 
-+	/*
-+	 * Now that we have the config, copy it to each CRTC struct
-+	 * Note that this could go away if we move to using crtc_config
-+	 * checking everywhere.
-+	 */
-+	list_for_each_entry(crtc, &dev->mode_config.crtc_list,
-+			    base.head) {
-+		if (crtc->active && i915_fastboot) {
-+			intel_crtc_mode_from_pipe_config(crtc, &crtc->config);
-+
-+			DRM_DEBUG_KMS("[CRTC:%d] found active mode: ",
-+				      crtc->base.base.id);
-+			drm_mode_debug_printmodeline(&crtc->base.mode);
-+		}
-+	}
-+
- 	/* HW state is read out, now we need to sanitize this mess. */
- 	list_for_each_entry(encoder, &dev->mode_config.encoder_list,
- 			    base.head) {
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0416-drm-i915-turn-off-panel-fitting-at-flip-time-if-need.patch b/patches.baytrail/0416-drm-i915-turn-off-panel-fitting-at-flip-time-if-need.patch
deleted file mode 100644
index ff12b0e8ecd4d..0000000000000
--- a/patches.baytrail/0416-drm-i915-turn-off-panel-fitting-at-flip-time-if-need.patch
+++ /dev/null
@@ -1,46 +0,0 @@
-From cc4427d0ef99f61802d2f3e4284f905dc67ab24f Mon Sep 17 00:00:00 2001
-From: Jesse Barnes <jbarnes@virtuousgeek.org>
-Date: Wed, 26 Jun 2013 01:38:18 +0300
-Subject: drm/i915: turn off panel fitting at flip time if needed v2
-
-Need better pfit tracking to do this right.
-
-v2: use fastboot param around this hack
-
-Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 4d6a3e63bce0cb604864e36585ca8983160a421a)
-(cherry picked from drm-intel-next-queued)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 14 ++++++++++++++
- 1 file changed, 14 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 3199691d6a51..eddd57bb1673 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -2221,6 +2221,20 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
- 		return ret;
- 	}
- 
-+	/* Update pipe size and adjust fitter if needed */
-+	if (i915_fastboot) {
-+		I915_WRITE(PIPESRC(intel_crtc->pipe),
-+			   ((crtc->mode.hdisplay - 1) << 16) |
-+			   (crtc->mode.vdisplay - 1));
-+		if (!intel_crtc->config.pch_pfit.size &&
-+		    (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS) ||
-+		     intel_pipe_has_type(crtc, INTEL_OUTPUT_EDP))) {
-+			I915_WRITE(PF_CTL(intel_crtc->pipe), 0);
-+			I915_WRITE(PF_WIN_POS(intel_crtc->pipe), 0);
-+			I915_WRITE(PF_WIN_SZ(intel_crtc->pipe), 0);
-+		}
-+	}
-+
- 	ret = dev_priv->display.update_plane(crtc, fb, x, y);
- 	if (ret) {
- 		intel_unpin_fb_obj(to_intel_framebuffer(fb)->obj);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0417-drm-i915-flip-on-a-no-fb-fb-transition-if-crtc-is-ac.patch b/patches.baytrail/0417-drm-i915-flip-on-a-no-fb-fb-transition-if-crtc-is-ac.patch
deleted file mode 100644
index 1edd734e0a491..0000000000000
--- a/patches.baytrail/0417-drm-i915-flip-on-a-no-fb-fb-transition-if-crtc-is-ac.patch
+++ /dev/null
@@ -1,47 +0,0 @@
-From 3d05616831acc6afac7036387417554257a7e047 Mon Sep 17 00:00:00 2001
-From: Jesse Barnes <jbarnes@virtuousgeek.org>
-Date: Wed, 26 Jun 2013 01:38:19 +0300
-Subject: drm/i915: flip on a no fb -> fb transition if crtc is active v3
-
-If the crtc is active, we can simply flip a new fb onto it, provided the
-other mode setting reqs are met.  Otherwise, we'll need to do a full
-mode set to re-enable the crtc.
-
-v2: check for crtc active and set mode_changed accordingly
-v3: add module parameter, i915.fastboot, to control no fb -> fb flip behavior
-
-Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 319d9827ebb55d58d1b02d8a4eba48bbb2702376)
-(cherry picked from drm-intel-next-queued)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 12 ++++++++++--
- 1 file changed, 10 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index eddd57bb1673..b902399f367f 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -8684,8 +8684,16 @@ intel_set_config_compute_mode_changes(struct drm_mode_set *set,
- 	} else if (set->crtc->fb != set->fb) {
- 		/* If we have no fb then treat it as a full mode set */
- 		if (set->crtc->fb == NULL) {
--			DRM_DEBUG_KMS("crtc has no fb, full mode set\n");
--			config->mode_changed = true;
-+			struct intel_crtc *intel_crtc =
-+				to_intel_crtc(set->crtc);
-+
-+			if (intel_crtc->active && i915_fastboot) {
-+				DRM_DEBUG_KMS("crtc has no fb, will flip\n");
-+				config->fb_changed = true;
-+			} else {
-+				DRM_DEBUG_KMS("inactive crtc, full mode set\n");
-+				config->mode_changed = true;
-+			}
- 		} else if (set->fb == NULL) {
- 			config->mode_changed = true;
- 		} else if (set->fb->pixel_format !=
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0418-drm-i915-export-error-state-to-string-conversion.patch b/patches.baytrail/0418-drm-i915-export-error-state-to-string-conversion.patch
deleted file mode 100644
index bb2b01cc17c2e..0000000000000
--- a/patches.baytrail/0418-drm-i915-export-error-state-to-string-conversion.patch
+++ /dev/null
@@ -1,107 +0,0 @@
-From 25e27302c30bff1c1142f5947ca3514fb1efb447 Mon Sep 17 00:00:00 2001
-From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
-Date: Thu, 6 Jun 2013 15:18:39 +0300
-Subject: drm/i915: export error state to string conversion
-
-In preparation for accessing error state from sysfs, export
-error state to string conversion function. Also tuck buffer
-error handling inside the function.
-
-Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit fc16b48be665d94337a861486dd25499971742a2)
-(cherry picked from drm-intel-next-queued)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_debugfs.c | 24 ++++++++----------------
- drivers/gpu/drm/i915/i915_drv.h     |  7 +++++++
- 2 files changed, 15 insertions(+), 16 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
-index f82134f8e9fb..b64af15eb388 100644
---- a/drivers/gpu/drm/i915/i915_debugfs.c
-+++ b/drivers/gpu/drm/i915/i915_debugfs.c
-@@ -830,15 +830,8 @@ static void i915_ring_error_state(struct drm_i915_error_state_buf *m,
- 	err_printf(m, "  ring->tail: 0x%08x\n", error->cpu_ring_tail[ring]);
- }
- 
--struct i915_error_state_file_priv {
--	struct drm_device *dev;
--	struct drm_i915_error_state *error;
--};
--
--
--static int i915_error_state(struct i915_error_state_file_priv *error_priv,
--			    struct drm_i915_error_state_buf *m)
--
-+int i915_error_state_to_str(struct drm_i915_error_state_buf *m,
-+			    const struct i915_error_state_file_priv *error_priv)
- {
- 	struct drm_device *dev = error_priv->dev;
- 	drm_i915_private_t *dev_priv = dev->dev_private;
-@@ -848,7 +841,7 @@ static int i915_error_state(struct i915_error_state_file_priv *error_priv,
- 
- 	if (!error) {
- 		err_printf(m, "no error state collected\n");
--		return 0;
-+		goto out;
- 	}
- 
- 	err_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec,
-@@ -958,6 +951,10 @@ static int i915_error_state(struct i915_error_state_file_priv *error_priv,
- 	if (error->display)
- 		intel_display_print_error_state(m, dev, error->display);
- 
-+out:
-+	if (m->bytes == 0 && m->err)
-+		return m->err;
-+
- 	return 0;
- }
- 
-@@ -1051,15 +1048,10 @@ static ssize_t i915_error_state_read(struct file *file, char __user *userbuf,
- 
- 	error_str.start = *pos;
- 
--	ret = i915_error_state(error_priv, &error_str);
-+	ret = i915_error_state_to_str(&error_str, error_priv);
- 	if (ret)
- 		goto out;
- 
--	if (error_str.bytes == 0 && error_str.err) {
--		ret = error_str.err;
--		goto out;
--	}
--
- 	ret_count = simple_read_from_buffer(userbuf, count, &tmp_pos,
- 					    error_str.buf,
- 					    error_str.bytes);
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index e90b919c0d32..e4ac32298055 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -917,6 +917,11 @@ struct drm_i915_error_state_buf {
- 	loff_t pos;
- };
- 
-+struct i915_error_state_file_priv {
-+	struct drm_device *dev;
-+	struct drm_i915_error_state *error;
-+};
-+
- struct i915_gpu_error {
- 	/* For hangcheck timer */
- #define DRM_I915_HANGCHECK_PERIOD 1500 /* in ms */
-@@ -1925,6 +1930,8 @@ int i915_debugfs_init(struct drm_minor *minor);
- void i915_debugfs_cleanup(struct drm_minor *minor);
- __printf(2, 3)
- void i915_error_printf(struct drm_i915_error_state_buf *e, const char *f, ...);
-+int i915_error_state_to_str(struct drm_i915_error_state_buf *estr,
-+			    const struct i915_error_state_file_priv *error);
- 
- /* i915_suspend.c */
- extern int i915_save_state(struct drm_device *dev);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0419-drm-i915-export-error-state-ref-handling.patch b/patches.baytrail/0419-drm-i915-export-error-state-ref-handling.patch
deleted file mode 100644
index 6933c95ec6ad5..0000000000000
--- a/patches.baytrail/0419-drm-i915-export-error-state-ref-handling.patch
+++ /dev/null
@@ -1,96 +0,0 @@
-From 3eeb61347413b883d9dfd0d2f98b97ecfd9429f0 Mon Sep 17 00:00:00 2001
-From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
-Date: Thu, 6 Jun 2013 15:18:40 +0300
-Subject: drm/i915: export error state ref handling
-
-In preparation for sysfs error state access,
-export ref error state ref counting interface.
-
-Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 95d5bfb3ac4cf5d7311f496761506c676f6b6323)
-(cherry picked from drm-intel-next-queued)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_debugfs.c | 31 ++++++++++++++++++++++---------
- drivers/gpu/drm/i915/i915_drv.h     |  3 +++
- 2 files changed, 25 insertions(+), 9 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
-index b64af15eb388..eef4c01ab61a 100644
---- a/drivers/gpu/drm/i915/i915_debugfs.c
-+++ b/drivers/gpu/drm/i915/i915_debugfs.c
-@@ -980,12 +980,30 @@ i915_error_state_write(struct file *filp,
- 	return cnt;
- }
- 
-+void i915_error_state_get(struct drm_device *dev,
-+			  struct i915_error_state_file_priv *error_priv)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	unsigned long flags;
-+
-+	spin_lock_irqsave(&dev_priv->gpu_error.lock, flags);
-+	error_priv->error = dev_priv->gpu_error.first_error;
-+	if (error_priv->error)
-+		kref_get(&error_priv->error->ref);
-+	spin_unlock_irqrestore(&dev_priv->gpu_error.lock, flags);
-+
-+}
-+
-+void i915_error_state_put(struct i915_error_state_file_priv *error_priv)
-+{
-+	if (error_priv->error)
-+		kref_put(&error_priv->error->ref, i915_error_state_free);
-+}
-+
- static int i915_error_state_open(struct inode *inode, struct file *file)
- {
- 	struct drm_device *dev = inode->i_private;
--	drm_i915_private_t *dev_priv = dev->dev_private;
- 	struct i915_error_state_file_priv *error_priv;
--	unsigned long flags;
- 
- 	error_priv = kzalloc(sizeof(*error_priv), GFP_KERNEL);
- 	if (!error_priv)
-@@ -993,11 +1011,7 @@ static int i915_error_state_open(struct inode *inode, struct file *file)
- 
- 	error_priv->dev = dev;
- 
--	spin_lock_irqsave(&dev_priv->gpu_error.lock, flags);
--	error_priv->error = dev_priv->gpu_error.first_error;
--	if (error_priv->error)
--		kref_get(&error_priv->error->ref);
--	spin_unlock_irqrestore(&dev_priv->gpu_error.lock, flags);
-+	i915_error_state_get(dev, error_priv);
- 
- 	file->private_data = error_priv;
- 
-@@ -1008,8 +1022,7 @@ static int i915_error_state_release(struct inode *inode, struct file *file)
- {
- 	struct i915_error_state_file_priv *error_priv = file->private_data;
- 
--	if (error_priv->error)
--		kref_put(&error_priv->error->ref, i915_error_state_free);
-+	i915_error_state_put(error_priv);
- 	kfree(error_priv);
- 
- 	return 0;
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index e4ac32298055..90ec48ed8052 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1932,6 +1932,9 @@ __printf(2, 3)
- void i915_error_printf(struct drm_i915_error_state_buf *e, const char *f, ...);
- int i915_error_state_to_str(struct drm_i915_error_state_buf *estr,
- 			    const struct i915_error_state_file_priv *error);
-+void i915_error_state_get(struct drm_device *dev,
-+			  struct i915_error_state_file_priv *error_priv);
-+void i915_error_state_put(struct i915_error_state_file_priv *error_priv);
- 
- /* i915_suspend.c */
- extern int i915_save_state(struct drm_device *dev);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0420-drm-i915-introduce-i915_error_state_buf_init.patch b/patches.baytrail/0420-drm-i915-introduce-i915_error_state_buf_init.patch
deleted file mode 100644
index e6daac194b312..0000000000000
--- a/patches.baytrail/0420-drm-i915-introduce-i915_error_state_buf_init.patch
+++ /dev/null
@@ -1,121 +0,0 @@
-From 4d17c0d8e4dc0176158bfe66d3520023de5252d0 Mon Sep 17 00:00:00 2001
-From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
-Date: Thu, 6 Jun 2013 15:18:41 +0300
-Subject: drm/i915: introduce i915_error_state_buf_init
-
-Make function for struct i915_error_state_buf initialization
-and export it, for sysfs and debugfs.
-
-Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 4dc955f7f5241a92767e2b3ffd74f49a82938999)
-(cherry picked from drm-intel-next-queued)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_debugfs.c | 50 ++++++++++++++++++++++---------------
- drivers/gpu/drm/i915/i915_drv.h     |  7 ++++++
- 2 files changed, 37 insertions(+), 20 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
-index eef4c01ab61a..3e36756d0439 100644
---- a/drivers/gpu/drm/i915/i915_debugfs.c
-+++ b/drivers/gpu/drm/i915/i915_debugfs.c
-@@ -1028,38 +1028,48 @@ static int i915_error_state_release(struct inode *inode, struct file *file)
- 	return 0;
- }
- 
--static ssize_t i915_error_state_read(struct file *file, char __user *userbuf,
--				     size_t count, loff_t *pos)
-+int i915_error_state_buf_init(struct drm_i915_error_state_buf *ebuf,
-+			      size_t count, loff_t pos)
- {
--	struct i915_error_state_file_priv *error_priv = file->private_data;
--	struct drm_i915_error_state_buf error_str;
--	loff_t tmp_pos = 0;
--	ssize_t ret_count = 0;
--	int ret = 0;
--
--	memset(&error_str, 0, sizeof(error_str));
-+	memset(ebuf, 0, sizeof(*ebuf));
- 
- 	/* We need to have enough room to store any i915_error_state printf
- 	 * so that we can move it to start position.
- 	 */
--	error_str.size = count + 1 > PAGE_SIZE ? count + 1 : PAGE_SIZE;
--	error_str.buf = kmalloc(error_str.size,
-+	ebuf->size = count + 1 > PAGE_SIZE ? count + 1 : PAGE_SIZE;
-+	ebuf->buf = kmalloc(ebuf->size,
- 				GFP_TEMPORARY | __GFP_NORETRY | __GFP_NOWARN);
- 
--	if (error_str.buf == NULL) {
--		error_str.size = PAGE_SIZE;
--		error_str.buf = kmalloc(error_str.size, GFP_TEMPORARY);
-+	if (ebuf->buf == NULL) {
-+		ebuf->size = PAGE_SIZE;
-+		ebuf->buf = kmalloc(ebuf->size, GFP_TEMPORARY);
- 	}
- 
--	if (error_str.buf == NULL) {
--		error_str.size = 128;
--		error_str.buf = kmalloc(error_str.size, GFP_TEMPORARY);
-+	if (ebuf->buf == NULL) {
-+		ebuf->size = 128;
-+		ebuf->buf = kmalloc(ebuf->size, GFP_TEMPORARY);
- 	}
- 
--	if (error_str.buf == NULL)
-+	if (ebuf->buf == NULL)
- 		return -ENOMEM;
- 
--	error_str.start = *pos;
-+	ebuf->start = pos;
-+
-+	return 0;
-+}
-+
-+static ssize_t i915_error_state_read(struct file *file, char __user *userbuf,
-+				     size_t count, loff_t *pos)
-+{
-+	struct i915_error_state_file_priv *error_priv = file->private_data;
-+	struct drm_i915_error_state_buf error_str;
-+	loff_t tmp_pos = 0;
-+	ssize_t ret_count = 0;
-+	int ret;
-+
-+	ret = i915_error_state_buf_init(&error_str, count, *pos);
-+	if (ret)
-+		return ret;
- 
- 	ret = i915_error_state_to_str(&error_str, error_priv);
- 	if (ret)
-@@ -1074,7 +1084,7 @@ static ssize_t i915_error_state_read(struct file *file, char __user *userbuf,
- 	else
- 		*pos = error_str.start + ret_count;
- out:
--	kfree(error_str.buf);
-+	i915_error_state_buf_release(&error_str);
- 	return ret ?: ret_count;
- }
- 
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 90ec48ed8052..98dfe0cbd2be 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1935,6 +1935,13 @@ int i915_error_state_to_str(struct drm_i915_error_state_buf *estr,
- void i915_error_state_get(struct drm_device *dev,
- 			  struct i915_error_state_file_priv *error_priv);
- void i915_error_state_put(struct i915_error_state_file_priv *error_priv);
-+int i915_error_state_buf_init(struct drm_i915_error_state_buf *eb,
-+			      size_t count, loff_t pos);
-+static inline void i915_error_state_buf_release(
-+	struct drm_i915_error_state_buf *eb)
-+{
-+	kfree(eb->buf);
-+}
- 
- /* i915_suspend.c */
- extern int i915_save_state(struct drm_device *dev);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0421-drm-i915-add-error_state-sysfs-entry.patch b/patches.baytrail/0421-drm-i915-add-error_state-sysfs-entry.patch
deleted file mode 100644
index a1b31234a2dc7..0000000000000
--- a/patches.baytrail/0421-drm-i915-add-error_state-sysfs-entry.patch
+++ /dev/null
@@ -1,138 +0,0 @@
-From 76f8e27cd3b6f23dcf858f9adc0179cfd98cefb8 Mon Sep 17 00:00:00 2001
-From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
-Date: Thu, 6 Jun 2013 17:38:54 +0300
-Subject: drm/i915: add error_state sysfs entry
-
-As getting error state doesn't anymore require big kmallocs,
-make error state accessible also from sysfs.
-
-v2: - error state clearing (Chris Wilson)
-    - user hint, proper access mode bits and name (Daniel Vetter)
-
-v3: release resources in proper order (Chris Wilson)
-
-Suggested-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-[danvet: Apply Chris' s/error_state/error/ bikeshed on the sysfs
-name. Also update the dmesg message, spotted by Chris.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit ef86ddced720fddc3835558447a7f594d3609c73)
-(cherry picked from drm-intel-next-queued)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c   |  3 +-
- drivers/gpu/drm/i915/i915_sysfs.c | 71 +++++++++++++++++++++++++++++++++++++++
- 2 files changed, 72 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index a53d1d3040eb..7564063ecc70 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -1955,8 +1955,7 @@ static void i915_capture_error_state(struct drm_device *dev)
- 	}
- 
- 	DRM_INFO("capturing error event; look for more information in "
--		 "/sys/kernel/debug/dri/%d/i915_error_state\n",
--		 dev->primary->index);
-+		 "/sys/class/drm/card%d/error\n", dev->primary->index);
- 
- 	kref_init(&error->ref);
- 	error->eir = I915_READ(EIR);
-diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c
-index 6875b5654c63..a777e7f3b0df 100644
---- a/drivers/gpu/drm/i915/i915_sysfs.c
-+++ b/drivers/gpu/drm/i915/i915_sysfs.c
-@@ -409,6 +409,71 @@ static const struct attribute *gen6_attrs[] = {
- 	NULL,
- };
- 
-+static ssize_t error_state_read(struct file *filp, struct kobject *kobj,
-+				struct bin_attribute *attr, char *buf,
-+				loff_t off, size_t count)
-+{
-+
-+	struct device *kdev = container_of(kobj, struct device, kobj);
-+	struct drm_minor *minor = container_of(kdev, struct drm_minor, kdev);
-+	struct drm_device *dev = minor->dev;
-+	struct i915_error_state_file_priv error_priv;
-+	struct drm_i915_error_state_buf error_str;
-+	ssize_t ret_count = 0;
-+	int ret;
-+
-+	memset(&error_priv, 0, sizeof(error_priv));
-+
-+	ret = i915_error_state_buf_init(&error_str, count, off);
-+	if (ret)
-+		return ret;
-+
-+	error_priv.dev = dev;
-+	i915_error_state_get(dev, &error_priv);
-+
-+	ret = i915_error_state_to_str(&error_str, &error_priv);
-+	if (ret)
-+		goto out;
-+
-+	ret_count = count < error_str.bytes ? count : error_str.bytes;
-+
-+	memcpy(buf, error_str.buf, ret_count);
-+out:
-+	i915_error_state_put(&error_priv);
-+	i915_error_state_buf_release(&error_str);
-+
-+	return ret ?: ret_count;
-+}
-+
-+static ssize_t error_state_write(struct file *file, struct kobject *kobj,
-+				 struct bin_attribute *attr, char *buf,
-+				 loff_t off, size_t count)
-+{
-+	struct device *kdev = container_of(kobj, struct device, kobj);
-+	struct drm_minor *minor = container_of(kdev, struct drm_minor, kdev);
-+	struct drm_device *dev = minor->dev;
-+	int ret;
-+
-+	DRM_DEBUG_DRIVER("Resetting error state\n");
-+
-+	ret = mutex_lock_interruptible(&dev->struct_mutex);
-+	if (ret)
-+		return ret;
-+
-+	i915_destroy_error_state(dev);
-+	mutex_unlock(&dev->struct_mutex);
-+
-+	return count;
-+}
-+
-+static struct bin_attribute error_state_attr = {
-+	.attr.name = "error",
-+	.attr.mode = S_IRUSR | S_IWUSR,
-+	.size = 0,
-+	.read = error_state_read,
-+	.write = error_state_write,
-+};
-+
- void i915_setup_sysfs(struct drm_device *dev)
- {
- 	int ret;
-@@ -432,10 +497,16 @@ void i915_setup_sysfs(struct drm_device *dev)
- 		if (ret)
- 			DRM_ERROR("gen6 sysfs setup failed\n");
- 	}
-+
-+	ret = sysfs_create_bin_file(&dev->primary->kdev.kobj,
-+				    &error_state_attr);
-+	if (ret)
-+		DRM_ERROR("error_state sysfs setup failed\n");
- }
- 
- void i915_teardown_sysfs(struct drm_device *dev)
- {
-+	sysfs_remove_bin_file(&dev->primary->kdev.kobj, &error_state_attr);
- 	sysfs_remove_files(&dev->primary->kdev.kobj, gen6_attrs);
- 	device_remove_bin_file(&dev->primary->kdev,  &dpf_attrs);
- #ifdef CONFIG_PM
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0422-drm-i915-fixup-messages-in-pipe_config_compare.patch b/patches.baytrail/0422-drm-i915-fixup-messages-in-pipe_config_compare.patch
deleted file mode 100644
index 38f40ada78820..0000000000000
--- a/patches.baytrail/0422-drm-i915-fixup-messages-in-pipe_config_compare.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From 10a2b7443fcf4d6ee975d992252d2e1a1a55c009 Mon Sep 17 00:00:00 2001
-From: Jesse Barnes <jbarnes@virtuousgeek.org>
-Date: Mon, 1 Jul 2013 10:19:09 -0700
-Subject: drm/i915: fixup messages in pipe_config_compare
-
-Print out the flag that failed and fix up a mismatched paren.
-
-Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 6f02488e3a5cbd76974b9d56140b11f3aa012124)
-(cherry picked from drm-intel-next-queued)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index b902399f367f..1910cc9725fa 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -8170,7 +8170,7 @@ intel_pipe_config_compare(struct drm_device *dev,
- 
- #define PIPE_CONF_CHECK_FLAGS(name, mask)	\
- 	if ((current_config->name ^ pipe_config->name) & (mask)) { \
--		DRM_ERROR("mismatch in " #name " " \
-+		DRM_ERROR("mismatch in " #name "(" #mask ") "	   \
- 			  "(expected %i, found %i)\n", \
- 			  current_config->name & (mask), \
- 			  pipe_config->name & (mask)); \
-@@ -8246,7 +8246,7 @@ intel_pipe_config_compare(struct drm_device *dev,
- 
- 	if (!IS_HASWELL(dev)) {
- 		if (!intel_fuzzy_clock_check(current_config, pipe_config)) {
--			DRM_ERROR("mismatch in clock (expected %d, found %d\n",
-+			DRM_ERROR("mismatch in clock (expected %d, found %d)\n",
- 				  current_config->adjusted_mode.clock,
- 				  pipe_config->adjusted_mode.clock);
- 			return false;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0423-drm-i915-split-encoder-get_config-calls-from-crtc-ge.patch b/patches.baytrail/0423-drm-i915-split-encoder-get_config-calls-from-crtc-ge.patch
deleted file mode 100644
index 0d321e2fdb271..0000000000000
--- a/patches.baytrail/0423-drm-i915-split-encoder-get_config-calls-from-crtc-ge.patch
+++ /dev/null
@@ -1,78 +0,0 @@
-From 4c5e3cb13c3d32e550f87b4c7c088330be170a2a Mon Sep 17 00:00:00 2001
-From: Jesse Barnes <jbarnes@virtuousgeek.org>
-Date: Mon, 1 Jul 2013 15:50:17 -0700
-Subject: drm/i915: split encoder get_config calls from crtc get_clock calls
-
-This should help on HSW, where we don't currently have a get_clock call.
-
-Reported-by: Paulo Zanoni <przanoni@gmail.com>
-Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 510d5f2f6b97eccbfa08234e21b0577c1748807d)
-(cherry picked from drm-intel-next-queued)
-Signed-off-by: James Ausmus <james.ausmus@intel.com>
-
-Conflicts:
-	drivers/gpu/drm/i915/intel_display.c
-	(context changes)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 24 ++++++++++++++----------
- 1 file changed, 14 insertions(+), 10 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 1910cc9725fa..87c5d76a7361 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -8380,14 +8380,13 @@ check_crtc_state(struct drm_device *dev)
- 			if (encoder->base.crtc != &crtc->base)
- 				continue;
- 			if (encoder->get_config &&
--			    encoder->get_hw_state(encoder, &pipe) &&
--			    dev_priv->display.get_clock) {
-+			    encoder->get_hw_state(encoder, &pipe))
- 				encoder->get_config(encoder, &pipe_config);
--				dev_priv->display.get_clock(crtc,
--							    &pipe_config);
--			}
- 		}
- 
-+		if (dev_priv->display.get_clock)
-+			dev_priv->display.get_clock(crtc, &pipe_config);
-+
- 		WARN(crtc->active != active,
- 		     "crtc active state doesn't match with hw state "
- 		     "(expected %i, found %i)\n", crtc->active, active);
-@@ -9980,12 +9979,8 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev)
- 		if (encoder->get_hw_state(encoder, &pipe)) {
- 			crtc = to_intel_crtc(dev_priv->pipe_to_crtc_mapping[pipe]);
- 			encoder->base.crtc = &crtc->base;
--			if (encoder->get_config &&
--			    dev_priv->display.get_clock) {
-+			if (encoder->get_config)
- 				encoder->get_config(encoder, &crtc->config);
--				dev_priv->display.get_clock(crtc,
--							    &crtc->config);
--			}
- 		} else {
- 			encoder->base.crtc = NULL;
- 		}
-@@ -9998,6 +9993,15 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev)
- 			      pipe);
- 	}
- 
-+	list_for_each_entry(crtc, &dev->mode_config.crtc_list,
-+			    base.head) {
-+		if (!crtc->active)
-+			continue;
-+		if (dev_priv->display.get_clock)
-+			dev_priv->display.get_clock(crtc,
-+						    &crtc->config);
-+	}
-+
- 	list_for_each_entry(connector, &dev->mode_config.connector_list,
- 			    base.head) {
- 		if (connector->get_hw_state(connector)) {
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0424-drm-i915-Use-wait_for-to-wait-for-Punit-to-change-GP.patch b/patches.baytrail/0424-drm-i915-Use-wait_for-to-wait-for-Punit-to-change-GP.patch
deleted file mode 100644
index 3829740b0f444..0000000000000
--- a/patches.baytrail/0424-drm-i915-Use-wait_for-to-wait-for-Punit-to-change-GP.patch
+++ /dev/null
@@ -1,70 +0,0 @@
-From 32a1e9c9ae4dfc6539b02de59424f48791bf83f9 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Wed, 26 Jun 2013 17:43:24 +0300
-Subject: drm/i915: Use wait_for() to wait for Punit to change GPU freq on VLV
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Use wait_for() instead of the open coded loop to avoid spreading the
-same old timeout related bugs.
-
-This changes the loop to use msleep(1) instead of udelay(10) when the
-Punit had not yet completed the frequency change. In practice that
-doesn't seem to hurt performance as the Punit appears to be ready pretty
-much always.
-
-Also give the status bit a name, instead of using the magic number 1.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit e8474409d7ab6dac38d4a3a6a365504b302f6c16)
-(cherry picked from drm-intel-next-queued)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_reg.h |  1 +
- drivers/gpu/drm/i915/intel_pm.c | 11 ++---------
- 2 files changed, 3 insertions(+), 9 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
-index 342f1f336168..d8278254bca3 100644
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -363,6 +363,7 @@
- #define PUNIT_REG_GPU_LFM			0xd3
- #define PUNIT_REG_GPU_FREQ_REQ			0xd4
- #define PUNIT_REG_GPU_FREQ_STS			0xd8
-+#define   GENFREQSTATUS				(1<<0)
- #define PUNIT_REG_MEDIA_TURBO_FREQ_REQ		0xdc
- 
- #define PUNIT_FUSE_BUS2				0xf6 /* bits 47:40 */
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 940311fcee64..91471e6f23cd 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -3075,19 +3075,12 @@ void gen6_set_rps(struct drm_device *dev, u8 val)
-  */
- static void vlv_update_rps_cur_delay(struct drm_i915_private *dev_priv)
- {
--	unsigned long timeout = jiffies + msecs_to_jiffies(10);
- 	u32 pval;
- 
- 	WARN_ON(!mutex_is_locked(&dev_priv->rps.hw_lock));
- 
--	do {
--		pval = vlv_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS);
--		if (time_after(jiffies, timeout)) {
--			DRM_DEBUG_DRIVER("timed out waiting for Punit\n");
--			break;
--		}
--		udelay(10);
--	} while (pval & 1);
-+	if (wait_for(((pval = vlv_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS)) & GENFREQSTATUS) == 0, 10))
-+		DRM_DEBUG_DRIVER("timed out waiting for Punit\n");
- 
- 	pval >>= 8;
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0425-drm-i915-explicitly-cast-pipe-cpu_transcoder.patch b/patches.baytrail/0425-drm-i915-explicitly-cast-pipe-cpu_transcoder.patch
deleted file mode 100644
index 47fa16e703aaa..0000000000000
--- a/patches.baytrail/0425-drm-i915-explicitly-cast-pipe-cpu_transcoder.patch
+++ /dev/null
@@ -1,72 +0,0 @@
-From 738e64e47af0f3a3364a7142a27eaf78db2329fc Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 4 Jul 2013 12:01:15 +0200
-Subject: drm/i915: explicitly cast pipe -> cpu_transcoder
-
-This makes sparse happy and also makes it a bit more obvious where we
-pull off this trick - after all we're only allowed to do it eithe as a
-default or on platforms where there is no disdinction between the pipe
-and the cpu transcoder.
-
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit e143a21c4d60d13dbdad133b7b2c9d9bb2dfb982)
-(cherry picked from drm-intel-next-queued)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 11 ++++++-----
- 1 file changed, 6 insertions(+), 5 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 87c5d76a7361..08217b92f33d 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -4963,7 +4963,7 @@ static bool i9xx_get_pipe_config(struct intel_crtc *crtc,
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	uint32_t tmp;
- 
--	pipe_config->cpu_transcoder = crtc->pipe;
-+	pipe_config->cpu_transcoder = (enum transcoder) crtc->pipe;
- 	pipe_config->shared_dpll = DPLL_ID_PRIVATE;
- 
- 	tmp = I915_READ(PIPECONF(crtc->pipe));
-@@ -5834,7 +5834,7 @@ static bool ironlake_get_pipe_config(struct intel_crtc *crtc,
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	uint32_t tmp;
- 
--	pipe_config->cpu_transcoder = crtc->pipe;
-+	pipe_config->cpu_transcoder = (enum transcoder) crtc->pipe;
- 	pipe_config->shared_dpll = DPLL_ID_PRIVATE;
- 
- 	tmp = I915_READ(PIPECONF(crtc->pipe));
-@@ -5950,7 +5950,7 @@ static bool haswell_get_pipe_config(struct intel_crtc *crtc,
- 	enum intel_display_power_domain pfit_domain;
- 	uint32_t tmp;
- 
--	pipe_config->cpu_transcoder = crtc->pipe;
-+	pipe_config->cpu_transcoder = (enum transcoder) crtc->pipe;
- 	pipe_config->shared_dpll = DPLL_ID_PRIVATE;
- 
- 	tmp = I915_READ(TRANS_DDI_FUNC_CTL(TRANSCODER_EDP));
-@@ -7052,7 +7052,7 @@ struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev,
- 	 * Note, if LVDS ever uses a non-1 pixel multiplier, we'll need
- 	 * to use a real value here instead.
- 	 */
--	pipe_config.cpu_transcoder = intel_crtc->pipe;
-+	pipe_config.cpu_transcoder = (enum transcoder) intel_crtc->pipe;
- 	pipe_config.pixel_multiplier = 1;
- 	i9xx_crtc_clock_get(intel_crtc, &pipe_config);
- 
-@@ -7882,7 +7882,8 @@ intel_modeset_pipe_config(struct drm_crtc *crtc,
- 
- 	drm_mode_copy(&pipe_config->adjusted_mode, mode);
- 	drm_mode_copy(&pipe_config->requested_mode, mode);
--	pipe_config->cpu_transcoder = to_intel_crtc(crtc)->pipe;
-+	pipe_config->cpu_transcoder =
-+		(enum transcoder) to_intel_crtc(crtc)->pipe;
- 	pipe_config->shared_dpll = DPLL_ID_PRIVATE;
- 
- 	/* Compute a starting value for pipe_config->pipe_bpp taking the source
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0426-drm-i915-Explicitly-cast-pipe-intel_dpll_id.patch b/patches.baytrail/0426-drm-i915-Explicitly-cast-pipe-intel_dpll_id.patch
deleted file mode 100644
index 4cf584f7c86fb..0000000000000
--- a/patches.baytrail/0426-drm-i915-Explicitly-cast-pipe-intel_dpll_id.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From dca79cb257028b072d6b4d6964430d083853e4fb Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 4 Jul 2013 12:01:16 +0200
-Subject: drm/i915: Explicitly cast pipe -> intel_dpll_id
-
-We only do this on IBX where there's a fixed pch dpll to pipe
-assignment. Being explicit about it can't really hurt and makes
-sparse happy.
-
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit d94ab068277bda17bfeb0e976049035153299a1a)
-(cherry picked from drm-intel-next-queued)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 5 +++--
- 1 file changed, 3 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 08217b92f33d..9733f275454d 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -3097,7 +3097,7 @@ static struct intel_shared_dpll *intel_get_shared_dpll(struct intel_crtc *crtc)
- 
- 	if (HAS_PCH_IBX(dev_priv->dev)) {
- 		/* Ironlake PCH has a fixed PLL->PCH pipe mapping. */
--		i = crtc->pipe;
-+		i = (enum intel_dpll_id) crtc->pipe;
- 		pll = &dev_priv->shared_dplls[i];
- 
- 		DRM_DEBUG_KMS("CRTC:%d using pre-allocated %s\n",
-@@ -5853,7 +5853,8 @@ static bool ironlake_get_pipe_config(struct intel_crtc *crtc,
- 		ironlake_get_fdi_m_n_config(crtc, pipe_config);
- 
- 		if (HAS_PCH_IBX(dev_priv->dev)) {
--			pipe_config->shared_dpll = crtc->pipe;
-+			pipe_config->shared_dpll =
-+				(enum intel_dpll_id) crtc->pipe;
- 		} else {
- 			tmp = I915_READ(PCH_DPLL_SEL);
- 			if (tmp & TRANS_DPLLB_SEL(crtc->pipe))
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0427-drm-i915-less-magic-for-stolen-preallocated-objects-.patch b/patches.baytrail/0427-drm-i915-less-magic-for-stolen-preallocated-objects-.patch
deleted file mode 100644
index a4e8fca8b94c4..0000000000000
--- a/patches.baytrail/0427-drm-i915-less-magic-for-stolen-preallocated-objects-.patch
+++ /dev/null
@@ -1,75 +0,0 @@
-From 49e32c99eef85615971b82cef11d52a8cdd6d948 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 4 Jul 2013 13:06:28 +0200
-Subject: drm/i915: less magic for stolen preallocated objects w/o gtt offset
-
-A magic -1 is a obscure, especially since it's actually passed as an
-unsigned, so depends upon the magic sign extension rules in C. This has
-been added in
-
-commit 3727d55e4d85836aa6cb759a965daaef88074150
-Author: Jesse Barnes <jbarnes@virtuousgeek.org>
-Date:   Wed May 8 10:45:14 2013 -0700
-
-    drm/i915: allow stolen, pre-allocated objects to avoid GTT allocation v2
-
-Use a proper #define instead. Spotted while reviewing Ben's
-drm_mm_create_block changes.
-
-v2: Cast the constant to u32 since otherwise we again have a type
-mismatch. Suggested by Chris Wilson.
-
-Cc: Ben Widawsky <ben@bwidawsk.net>
-Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 190d6cd5cd3606dd13a3ca5bf0c23dc520659c15)
-(cherry picked from drm-intel-next-queued)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h        | 1 +
- drivers/gpu/drm/i915/i915_gem_stolen.c | 2 +-
- drivers/gpu/drm/i915/intel_pm.c        | 2 +-
- 3 files changed, 3 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 98dfe0cbd2be..8e40123f6a12 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1203,6 +1203,7 @@ enum hdmi_force_audio {
- };
- 
- #define I915_GTT_RESERVED ((struct drm_mm_node *)0x1)
-+#define I915_GTT_OFFSET_NONE ((u32)-1)
- 
- struct drm_i915_gem_object_ops {
- 	/* Interface between the GEM object and its backing storage.
-diff --git a/drivers/gpu/drm/i915/i915_gem_stolen.c b/drivers/gpu/drm/i915/i915_gem_stolen.c
-index 0f8cf62a5b83..f1664f272fc3 100644
---- a/drivers/gpu/drm/i915/i915_gem_stolen.c
-+++ b/drivers/gpu/drm/i915/i915_gem_stolen.c
-@@ -363,7 +363,7 @@ i915_gem_object_create_stolen_for_preallocated(struct drm_device *dev,
- 	}
- 
- 	/* Some objects just need physical mem from stolen space */
--	if (gtt_offset == -1)
-+	if (gtt_offset == I915_GTT_OFFSET_NONE)
- 		return obj;
- 
- 	/* To simplify the initialisation sequence between KMS and GTT,
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 91471e6f23cd..f9d0afd4bd6c 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -3474,7 +3474,7 @@ static void valleyview_setup_pctx(struct drm_device *dev)
- 		pcbr_offset = (pcbr & (~4095)) - dev_priv->mm.stolen_base;
- 		pctx = i915_gem_object_create_stolen_for_preallocated(dev_priv->dev,
- 								      pcbr_offset,
--								      -1,
-+								      I915_GTT_OFFSET_NONE,
- 								      pctx_size);
- 		goto out;
- 	}
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0428-drm-i915-assert_spin_locked-for-pipestat-interrupt-e.patch b/patches.baytrail/0428-drm-i915-assert_spin_locked-for-pipestat-interrupt-e.patch
deleted file mode 100644
index b86d4a23e76be..0000000000000
--- a/patches.baytrail/0428-drm-i915-assert_spin_locked-for-pipestat-interrupt-e.patch
+++ /dev/null
@@ -1,90 +0,0 @@
-From 80ee4f01913713437683b8a30ead777c977da9cf Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 27 Jun 2013 17:52:10 +0200
-Subject: drm/i915: assert_spin_locked for pipestat interrupt enable/disable
-
-Just to keep the paranoia equal also sprinkle locking asserts over the
-pipestat interrupt enable/disable functions.
-
-Again this results in false positives in the interrupt setup. Add
-bogo-locking for these and a big comment explaining why it's there and
-that it's indeed unnecessary.
-
-v2: Fix up the spelling fail Paulo spotted in comments.
-
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit b79480ba5074ae81d1c32073bce3981652e0f717)
-(cherry picked from drm-intel-next-queued)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 14 ++++++++++++++
- 1 file changed, 14 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index 7564063ecc70..4a98600c6f41 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -319,6 +319,8 @@ i915_enable_pipestat(drm_i915_private_t *dev_priv, int pipe, u32 mask)
- 	u32 reg = PIPESTAT(pipe);
- 	u32 pipestat = I915_READ(reg) & 0x7fff0000;
- 
-+	assert_spin_locked(&dev_priv->irq_lock);
-+
- 	if ((pipestat & mask) == mask)
- 		return;
- 
-@@ -334,6 +336,8 @@ i915_disable_pipestat(drm_i915_private_t *dev_priv, int pipe, u32 mask)
- 	u32 reg = PIPESTAT(pipe);
- 	u32 pipestat = I915_READ(reg) & 0x7fff0000;
- 
-+	assert_spin_locked(&dev_priv->irq_lock);
-+
- 	if ((pipestat & mask) == 0)
- 		return;
- 
-@@ -2864,6 +2868,7 @@ static int valleyview_irq_postinstall(struct drm_device *dev)
- 	u32 gt_irqs;
- 	u32 enable_mask;
- 	u32 pipestat_enable = PLANE_FLIP_DONE_INT_EN_VLV;
-+	unsigned long irqflags;
- 
- 	enable_mask = I915_DISPLAY_PORT_INTERRUPT;
- 	enable_mask |= I915_DISPLAY_PIPE_A_EVENT_INTERRUPT |
-@@ -2889,9 +2894,13 @@ static int valleyview_irq_postinstall(struct drm_device *dev)
- 	I915_WRITE(PIPESTAT(1), 0xffff);
- 	POSTING_READ(VLV_IER);
- 
-+	/* Interrupt setup is already guaranteed to be single-threaded, this is
-+	 * just to make the assert_spin_locked check happy. */
-+	spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
- 	i915_enable_pipestat(dev_priv, 0, pipestat_enable);
- 	i915_enable_pipestat(dev_priv, 0, PIPE_GMBUS_EVENT_ENABLE);
- 	i915_enable_pipestat(dev_priv, 1, pipestat_enable);
-+	spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
- 
- 	I915_WRITE(VLV_IIR, 0xffffffff);
- 	I915_WRITE(VLV_IIR, 0xffffffff);
-@@ -3370,6 +3379,7 @@ static int i965_irq_postinstall(struct drm_device *dev)
- 	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
- 	u32 enable_mask;
- 	u32 error_mask;
-+	unsigned long irqflags;
- 
- 	/* Unmask the interrupts that we always want on. */
- 	dev_priv->irq_mask = ~(I915_ASLE_INTERRUPT |
-@@ -3388,7 +3398,11 @@ static int i965_irq_postinstall(struct drm_device *dev)
- 	if (IS_G4X(dev))
- 		enable_mask |= I915_BSD_USER_INTERRUPT;
- 
-+	/* Interrupt setup is already guaranteed to be single-threaded, this is
-+	 * just to make the assert_spin_locked check happy. */
-+	spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
- 	i915_enable_pipestat(dev_priv, 0, PIPE_GMBUS_EVENT_ENABLE);
-+	spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
- 
- 	/*
- 	 * Enable some error detection, note the instruction error mask
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0429-drm-pre-allocate-node-for-create_block.patch b/patches.baytrail/0429-drm-pre-allocate-node-for-create_block.patch
deleted file mode 100644
index 302070751ca3f..0000000000000
--- a/patches.baytrail/0429-drm-pre-allocate-node-for-create_block.patch
+++ /dev/null
@@ -1,219 +0,0 @@
-From 36e2ed3d4176d01b17c16c790931f2b50f60c8aa Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Fri, 5 Jul 2013 14:41:02 -0700
-Subject: drm: pre allocate node for create_block
-
-For an upcoming patch where we introduce the i915 VMA, it's ideal to
-have the drm_mm_node as part of the VMA struct (ie. it's pre-allocated).
-Part of the conversion to VMAs is to kill off obj->gtt_space. Doing this
-will break a bunch of code, but amongst them are 2 callers of
-drm_mm_create_block(), both related to stolen memory.
-
-It also allows us to embed the drm_mm_node into the object currently
-which provides a nice transition over to the new code.
-
-v2: Reordered to do before ripping out obj->gtt_offset.
-Some minor cleanups made available because of reordering.
-
-v3: s/continue/break on failed stolen node allocation (David)
-Set obj->gtt_space on failed node allocation (David)
-Only unref stolen (fix double free) on failed create_stolen (David)
-Free node, and NULL it in failed create_stolen (David)
-Add back accidentally removed newline (David)
-
-CC: <dri-devel@lists.freedesktop.org>
-Reviewed-by: David Herrmann <dh.herrmann@gmail.com>
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Acked-by: David Airlie <airlied@linux.ie>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit b3a070cccb9135f8bec63d9f194ddaa422136fb0)
-(cherry picked from drm-intel-next-queued)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_mm.c               | 16 +++++----------
- drivers/gpu/drm/i915/i915_gem_gtt.c    | 20 ++++++++++++++----
- drivers/gpu/drm/i915/i915_gem_stolen.c | 37 +++++++++++++++++++++++++---------
- include/drm/drm_mm.h                   |  9 +++++----
- 4 files changed, 53 insertions(+), 29 deletions(-)
-
-diff --git a/drivers/gpu/drm/drm_mm.c b/drivers/gpu/drm/drm_mm.c
-index 7917729ee61d..520f7463bb77 100644
---- a/drivers/gpu/drm/drm_mm.c
-+++ b/drivers/gpu/drm/drm_mm.c
-@@ -147,12 +147,10 @@ static void drm_mm_insert_helper(struct drm_mm_node *hole_node,
- 	}
- }
- 
--struct drm_mm_node *drm_mm_create_block(struct drm_mm *mm,
--					unsigned long start,
--					unsigned long size,
--					bool atomic)
-+int drm_mm_create_block(struct drm_mm *mm, struct drm_mm_node *node,
-+			unsigned long start, unsigned long size)
- {
--	struct drm_mm_node *hole, *node;
-+	struct drm_mm_node *hole;
- 	unsigned long end = start + size;
- 	unsigned long hole_start;
- 	unsigned long hole_end;
-@@ -161,10 +159,6 @@ struct drm_mm_node *drm_mm_create_block(struct drm_mm *mm,
- 		if (hole_start > start || hole_end < end)
- 			continue;
- 
--		node = drm_mm_kmalloc(mm, atomic);
--		if (unlikely(node == NULL))
--			return NULL;
--
- 		node->start = start;
- 		node->size = size;
- 		node->mm = mm;
-@@ -184,11 +178,11 @@ struct drm_mm_node *drm_mm_create_block(struct drm_mm *mm,
- 			node->hole_follows = 1;
- 		}
- 
--		return node;
-+		return 0;
- 	}
- 
- 	WARN(1, "no hole found for block 0x%lx + 0x%lx\n", start, size);
--	return NULL;
-+	return -ENOSPC;
- }
- EXPORT_SYMBOL(drm_mm_create_block);
- 
-diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
-index 66929eac6367..88180a597c0a 100644
---- a/drivers/gpu/drm/i915/i915_gem_gtt.c
-+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
-@@ -629,14 +629,26 @@ void i915_gem_setup_global_gtt(struct drm_device *dev,
- 
- 	/* Mark any preallocated objects as occupied */
- 	list_for_each_entry(obj, &dev_priv->mm.bound_list, global_list) {
-+		int ret;
- 		DRM_DEBUG_KMS("reserving preallocated space: %x + %zx\n",
- 			      obj->gtt_offset, obj->base.size);
- 
- 		BUG_ON(obj->gtt_space != I915_GTT_RESERVED);
--		obj->gtt_space = drm_mm_create_block(&dev_priv->mm.gtt_space,
--						     obj->gtt_offset,
--						     obj->base.size,
--						     false);
-+		obj->gtt_space = kzalloc(sizeof(*obj->gtt_space), GFP_KERNEL);
-+		if (!obj->gtt_space) {
-+			DRM_ERROR("Failed to preserve object at offset %x\n",
-+				  obj->gtt_offset);
-+			continue;
-+		}
-+		ret = drm_mm_create_block(&dev_priv->mm.gtt_space,
-+					  obj->gtt_space,
-+					  obj->gtt_offset,
-+					  obj->base.size);
-+		if (ret) {
-+			DRM_DEBUG_KMS("Reservation failed\n");
-+			kfree(obj->gtt_space);
-+			obj->gtt_space = NULL;
-+		}
- 		obj->has_global_gtt_mapping = 1;
- 	}
- 
-diff --git a/drivers/gpu/drm/i915/i915_gem_stolen.c b/drivers/gpu/drm/i915/i915_gem_stolen.c
-index f1664f272fc3..fdcc96b636b2 100644
---- a/drivers/gpu/drm/i915/i915_gem_stolen.c
-+++ b/drivers/gpu/drm/i915/i915_gem_stolen.c
-@@ -333,6 +333,7 @@ i915_gem_object_create_stolen_for_preallocated(struct drm_device *dev,
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct drm_i915_gem_object *obj;
- 	struct drm_mm_node *stolen;
-+	int ret;
- 
- 	if (!drm_mm_initialized(&dev_priv->mm.stolen))
- 		return NULL;
-@@ -347,11 +348,15 @@ i915_gem_object_create_stolen_for_preallocated(struct drm_device *dev,
- 	if (WARN_ON(size == 0))
- 		return NULL;
- 
--	stolen = drm_mm_create_block(&dev_priv->mm.stolen,
--				     stolen_offset, size,
--				     false);
--	if (stolen == NULL) {
-+	stolen = kzalloc(sizeof(*stolen), GFP_KERNEL);
-+	if (!stolen)
-+		return NULL;
-+
-+	ret = drm_mm_create_block(&dev_priv->mm.stolen, stolen, stolen_offset,
-+				  size);
-+	if (ret) {
- 		DRM_DEBUG_KMS("failed to allocate stolen space\n");
-+		kfree(stolen);
- 		return NULL;
- 	}
- 
-@@ -372,13 +377,18 @@ i915_gem_object_create_stolen_for_preallocated(struct drm_device *dev,
- 	 * later.
- 	 */
- 	if (drm_mm_initialized(&dev_priv->mm.gtt_space)) {
--		obj->gtt_space = drm_mm_create_block(&dev_priv->mm.gtt_space,
--						     gtt_offset, size,
--						     false);
--		if (obj->gtt_space == NULL) {
-+		obj->gtt_space = kzalloc(sizeof(*obj->gtt_space), GFP_KERNEL);
-+		if (!obj->gtt_space) {
-+			DRM_DEBUG_KMS("-ENOMEM stolen GTT space\n");
-+			goto unref_out;
-+		}
-+
-+		ret = drm_mm_create_block(&dev_priv->mm.gtt_space,
-+					  obj->gtt_space,
-+					  gtt_offset, size);
-+		if (ret) {
- 			DRM_DEBUG_KMS("failed to allocate stolen GTT space\n");
--			drm_gem_object_unreference(&obj->base);
--			return NULL;
-+			goto free_out;
- 		}
- 	} else
- 		obj->gtt_space = I915_GTT_RESERVED;
-@@ -390,6 +400,13 @@ i915_gem_object_create_stolen_for_preallocated(struct drm_device *dev,
- 	list_add_tail(&obj->mm_list, &dev_priv->mm.inactive_list);
- 
- 	return obj;
-+
-+free_out:
-+	kfree(obj->gtt_space);
-+	obj->gtt_space = NULL;
-+unref_out:
-+	drm_gem_object_unreference(&obj->base);
-+	return NULL;
- }
- 
- void
-diff --git a/include/drm/drm_mm.h b/include/drm/drm_mm.h
-index de9242542f05..00904bfe1355 100644
---- a/include/drm/drm_mm.h
-+++ b/include/drm/drm_mm.h
-@@ -138,10 +138,10 @@ static inline unsigned long drm_mm_hole_node_end(struct drm_mm_node *hole_node)
- /*
-  * Basic range manager support (drm_mm.c)
-  */
--extern struct drm_mm_node *drm_mm_create_block(struct drm_mm *mm,
--					       unsigned long start,
--					       unsigned long size,
--					       bool atomic);
-+extern int drm_mm_create_block(struct drm_mm *mm,
-+			       struct drm_mm_node *node,
-+			       unsigned long start,
-+			       unsigned long size);
- extern struct drm_mm_node *drm_mm_get_block_generic(struct drm_mm_node *node,
- 						    unsigned long size,
- 						    unsigned alignment,
-@@ -155,6 +155,7 @@ extern struct drm_mm_node *drm_mm_get_block_range_generic(
- 						unsigned long start,
- 						unsigned long end,
- 						int atomic);
-+
- static inline struct drm_mm_node *drm_mm_get_block(struct drm_mm_node *parent,
- 						   unsigned long size,
- 						   unsigned alignment)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0430-drm-Change-create-block-to-reserve-node.patch b/patches.baytrail/0430-drm-Change-create-block-to-reserve-node.patch
deleted file mode 100644
index e370ceafe0b9b..0000000000000
--- a/patches.baytrail/0430-drm-Change-create-block-to-reserve-node.patch
+++ /dev/null
@@ -1,149 +0,0 @@
-From f212fd2daaa15e7a1c1cce9e196d75febf00046a Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Fri, 5 Jul 2013 14:41:03 -0700
-Subject: drm: Change create block to reserve node
-
-With the previous patch we no longer actually create a node, we simply
-find the correct hole and occupy it. This very well could have been
-squashed with the last patch, but since I already had David's review, I
-figured it's easiest to keep it distinct.
-
-Also update the users in i915. Conveniently this is the only user of the
-interface.
-
-CC: David Airlie <airlied@linux.ie>
-CC: <dri-devel@lists.freedesktop.org>
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Acked-by: David Airlie <airlied@linux.ie>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 338710e7aff3428dc8170a03704a8ae981b58dcd)
-(cherry picked from drm-intel-next-queued)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_mm.c               | 19 ++++++++++---------
- drivers/gpu/drm/i915/i915_gem_gtt.c    |  8 ++++----
- drivers/gpu/drm/i915/i915_gem_stolen.c | 12 +++++++-----
- include/drm/drm_mm.h                   |  5 +----
- 4 files changed, 22 insertions(+), 22 deletions(-)
-
-diff --git a/drivers/gpu/drm/drm_mm.c b/drivers/gpu/drm/drm_mm.c
-index 520f7463bb77..2f6b06b5a617 100644
---- a/drivers/gpu/drm/drm_mm.c
-+++ b/drivers/gpu/drm/drm_mm.c
-@@ -147,27 +147,27 @@ static void drm_mm_insert_helper(struct drm_mm_node *hole_node,
- 	}
- }
- 
--int drm_mm_create_block(struct drm_mm *mm, struct drm_mm_node *node,
--			unsigned long start, unsigned long size)
-+int drm_mm_reserve_node(struct drm_mm *mm, struct drm_mm_node *node)
- {
- 	struct drm_mm_node *hole;
--	unsigned long end = start + size;
-+	unsigned long end = node->start + node->size;
- 	unsigned long hole_start;
- 	unsigned long hole_end;
- 
-+	BUG_ON(node == NULL);
-+
-+	/* Find the relevant hole to add our node to */
- 	drm_mm_for_each_hole(hole, mm, hole_start, hole_end) {
--		if (hole_start > start || hole_end < end)
-+		if (hole_start > node->start || hole_end < end)
- 			continue;
- 
--		node->start = start;
--		node->size = size;
- 		node->mm = mm;
- 		node->allocated = 1;
- 
- 		INIT_LIST_HEAD(&node->hole_stack);
- 		list_add(&node->node_list, &hole->node_list);
- 
--		if (start == hole_start) {
-+		if (node->start == hole_start) {
- 			hole->hole_follows = 0;
- 			list_del_init(&hole->hole_stack);
- 		}
-@@ -181,10 +181,11 @@ int drm_mm_create_block(struct drm_mm *mm, struct drm_mm_node *node,
- 		return 0;
- 	}
- 
--	WARN(1, "no hole found for block 0x%lx + 0x%lx\n", start, size);
-+	WARN(1, "no hole found for node 0x%lx + 0x%lx\n",
-+	     node->start, node->size);
- 	return -ENOSPC;
- }
--EXPORT_SYMBOL(drm_mm_create_block);
-+EXPORT_SYMBOL(drm_mm_reserve_node);
- 
- struct drm_mm_node *drm_mm_get_block_generic(struct drm_mm_node *hole_node,
- 					     unsigned long size,
-diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
-index 88180a597c0a..afba7e5e7739 100644
---- a/drivers/gpu/drm/i915/i915_gem_gtt.c
-+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
-@@ -640,10 +640,10 @@ void i915_gem_setup_global_gtt(struct drm_device *dev,
- 				  obj->gtt_offset);
- 			continue;
- 		}
--		ret = drm_mm_create_block(&dev_priv->mm.gtt_space,
--					  obj->gtt_space,
--					  obj->gtt_offset,
--					  obj->base.size);
-+		obj->gtt_space->start = obj->gtt_offset;
-+		obj->gtt_space->size = obj->base.size;
-+		ret = drm_mm_reserve_node(&dev_priv->mm.gtt_space,
-+					  obj->gtt_space);
- 		if (ret) {
- 			DRM_DEBUG_KMS("Reservation failed\n");
- 			kfree(obj->gtt_space);
-diff --git a/drivers/gpu/drm/i915/i915_gem_stolen.c b/drivers/gpu/drm/i915/i915_gem_stolen.c
-index fdcc96b636b2..bc601c4fdc37 100644
---- a/drivers/gpu/drm/i915/i915_gem_stolen.c
-+++ b/drivers/gpu/drm/i915/i915_gem_stolen.c
-@@ -352,8 +352,9 @@ i915_gem_object_create_stolen_for_preallocated(struct drm_device *dev,
- 	if (!stolen)
- 		return NULL;
- 
--	ret = drm_mm_create_block(&dev_priv->mm.stolen, stolen, stolen_offset,
--				  size);
-+	stolen->start = stolen_offset;
-+	stolen->size = size;
-+	ret = drm_mm_reserve_node(&dev_priv->mm.stolen, stolen);
- 	if (ret) {
- 		DRM_DEBUG_KMS("failed to allocate stolen space\n");
- 		kfree(stolen);
-@@ -383,9 +384,10 @@ i915_gem_object_create_stolen_for_preallocated(struct drm_device *dev,
- 			goto unref_out;
- 		}
- 
--		ret = drm_mm_create_block(&dev_priv->mm.gtt_space,
--					  obj->gtt_space,
--					  gtt_offset, size);
-+		obj->gtt_space->start = gtt_offset;
-+		obj->gtt_space->size = size;
-+		ret = drm_mm_reserve_node(&dev_priv->mm.gtt_space,
-+					  obj->gtt_space);
- 		if (ret) {
- 			DRM_DEBUG_KMS("failed to allocate stolen GTT space\n");
- 			goto free_out;
-diff --git a/include/drm/drm_mm.h b/include/drm/drm_mm.h
-index 00904bfe1355..e3aceb350001 100644
---- a/include/drm/drm_mm.h
-+++ b/include/drm/drm_mm.h
-@@ -138,10 +138,7 @@ static inline unsigned long drm_mm_hole_node_end(struct drm_mm_node *hole_node)
- /*
-  * Basic range manager support (drm_mm.c)
-  */
--extern int drm_mm_create_block(struct drm_mm *mm,
--			       struct drm_mm_node *node,
--			       unsigned long start,
--			       unsigned long size);
-+extern int drm_mm_reserve_node(struct drm_mm *mm, struct drm_mm_node *node);
- extern struct drm_mm_node *drm_mm_get_block_generic(struct drm_mm_node *node,
- 						    unsigned long size,
- 						    unsigned alignment,
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0431-drm-i915-Getter-setter-for-object-attributes.patch b/patches.baytrail/0431-drm-i915-Getter-setter-for-object-attributes.patch
deleted file mode 100644
index ec92148bee3b7..0000000000000
--- a/patches.baytrail/0431-drm-i915-Getter-setter-for-object-attributes.patch
+++ /dev/null
@@ -1,1018 +0,0 @@
-From 08bb633ed0667bcf1c2479eb7811e720a65f3589 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Fri, 5 Jul 2013 14:41:04 -0700
-Subject: drm/i915: Getter/setter for object attributes
-
-Soon we want to gut a lot of our existing assumptions how many address
-spaces an object can live in, and in doing so, embed the drm_mm_node in
-the object (and later the VMA).
-
-It's possible in the future we'll want to add more getter/setter
-methods, but for now this is enough to enable the VMAs.
-
-v2: Reworked commit message (Ben)
-Added comments to the main functions (Ben)
-sed -i "s/i915_gem_obj_set_color/i915_gem_obj_ggtt_set_color/" drivers/gpu/drm/i915/*.[ch]
-sed -i "s/i915_gem_obj_bound/i915_gem_obj_ggtt_bound/" drivers/gpu/drm/i915/*.[ch]
-sed -i "s/i915_gem_obj_size/i915_gem_obj_ggtt_size/" drivers/gpu/drm/i915/*.[ch]
-sed -i "s/i915_gem_obj_offset/i915_gem_obj_ggtt_offset/" drivers/gpu/drm/i915/*.[ch]
-(Daniel)
-
-v3: Rebased on new reserve_node patch
-Changed DRM_DEBUG_KMS to actually work (will need fixing later)
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit f343c5f6477354967ee1e331a68a56b9fece2f36)
-(cherry picked from drm-intel-next-queued)
-Signed-off-by: James Ausmus <james.ausmus@intel.com>
-
-Conflicts:
-	drivers/gpu/drm/i915/i915_gem.c
-	(used airlied's rerere from
-	e13af9a8340685cfe25d0c9f708da7121e0f51dd)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_debugfs.c        |   26 ++++----
- drivers/gpu/drm/i915/i915_drv.h            |   31 ++++++++++
- drivers/gpu/drm/i915/i915_gem.c            |   89 ++++++++++++++---------------
- drivers/gpu/drm/i915/i915_gem_context.c    |    2 
- drivers/gpu/drm/i915/i915_gem_execbuffer.c |   19 +++---
- drivers/gpu/drm/i915/i915_gem_gtt.c        |    8 +-
- drivers/gpu/drm/i915/i915_gem_tiling.c     |   14 ++--
- drivers/gpu/drm/i915/i915_irq.c            |   15 ++--
- drivers/gpu/drm/i915/i915_trace.h          |    8 +-
- drivers/gpu/drm/i915/intel_display.c       |   28 ++++-----
- drivers/gpu/drm/i915/intel_fb.c            |    8 +-
- drivers/gpu/drm/i915/intel_overlay.c       |   14 ++--
- drivers/gpu/drm/i915/intel_pm.c            |    8 +-
- drivers/gpu/drm/i915/intel_ringbuffer.c    |   12 +--
- drivers/gpu/drm/i915/intel_sprite.c        |    8 +-
- 15 files changed, 164 insertions(+), 126 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_debugfs.c
-+++ b/drivers/gpu/drm/i915/i915_debugfs.c
-@@ -122,9 +122,9 @@ describe_obj(struct seq_file *m, struct
- 		seq_printf(m, " (pinned x %d)", obj->pin_count);
- 	if (obj->fence_reg != I915_FENCE_REG_NONE)
- 		seq_printf(m, " (fence: %d)", obj->fence_reg);
--	if (obj->gtt_space != NULL)
--		seq_printf(m, " (gtt offset: %08x, size: %08x)",
--			   obj->gtt_offset, (unsigned int)obj->gtt_space->size);
-+	if (i915_gem_obj_ggtt_bound(obj))
-+		seq_printf(m, " (gtt offset: %08lx, size: %08x)",
-+			   i915_gem_obj_ggtt_offset(obj), (unsigned int)i915_gem_obj_ggtt_size(obj));
- 	if (obj->stolen)
- 		seq_printf(m, " (stolen: %08lx)", obj->stolen->start);
- 	if (obj->pin_mappable || obj->fault_mappable) {
-@@ -175,7 +175,7 @@ static int i915_gem_object_list_info(str
- 		describe_obj(m, obj);
- 		seq_putc(m, '\n');
- 		total_obj_size += obj->base.size;
--		total_gtt_size += obj->gtt_space->size;
-+		total_gtt_size += i915_gem_obj_ggtt_size(obj);
- 		count++;
- 	}
- 	mutex_unlock(&dev->struct_mutex);
-@@ -187,10 +187,10 @@ static int i915_gem_object_list_info(str
- 
- #define count_objects(list, member) do { \
- 	list_for_each_entry(obj, list, member) { \
--		size += obj->gtt_space->size; \
-+		size += i915_gem_obj_ggtt_size(obj); \
- 		++count; \
- 		if (obj->map_and_fenceable) { \
--			mappable_size += obj->gtt_space->size; \
-+			mappable_size += i915_gem_obj_ggtt_size(obj); \
- 			++mappable_count; \
- 		} \
- 	} \
-@@ -209,7 +209,7 @@ static int per_file_stats(int id, void *
- 	stats->count++;
- 	stats->total += obj->base.size;
- 
--	if (obj->gtt_space) {
-+	if (i915_gem_obj_ggtt_bound(obj)) {
- 		if (!list_empty(&obj->ring_list))
- 			stats->active += obj->base.size;
- 		else
-@@ -267,11 +267,11 @@ static int i915_gem_object_info(struct s
- 	size = count = mappable_size = mappable_count = 0;
- 	list_for_each_entry(obj, &dev_priv->mm.bound_list, global_list) {
- 		if (obj->fault_mappable) {
--			size += obj->gtt_space->size;
-+			size += i915_gem_obj_ggtt_size(obj);
- 			++count;
- 		}
- 		if (obj->pin_mappable) {
--			mappable_size += obj->gtt_space->size;
-+			mappable_size += i915_gem_obj_ggtt_size(obj);
- 			++mappable_count;
- 		}
- 		if (obj->madv == I915_MADV_DONTNEED) {
-@@ -333,7 +333,7 @@ static int i915_gem_gtt_info(struct seq_
- 		describe_obj(m, obj);
- 		seq_putc(m, '\n');
- 		total_obj_size += obj->base.size;
--		total_gtt_size += obj->gtt_space->size;
-+		total_gtt_size += i915_gem_obj_ggtt_size(obj);
- 		count++;
- 	}
- 
-@@ -379,12 +379,14 @@ static int i915_gem_pageflip_info(struct
- 			if (work->old_fb_obj) {
- 				struct drm_i915_gem_object *obj = work->old_fb_obj;
- 				if (obj)
--					seq_printf(m, "Old framebuffer gtt_offset 0x%08x\n", obj->gtt_offset);
-+					seq_printf(m, "Old framebuffer gtt_offset 0x%08lx\n",
-+						   i915_gem_obj_ggtt_offset(obj));
- 			}
- 			if (work->pending_flip_obj) {
- 				struct drm_i915_gem_object *obj = work->pending_flip_obj;
- 				if (obj)
--					seq_printf(m, "New framebuffer gtt_offset 0x%08x\n", obj->gtt_offset);
-+					seq_printf(m, "New framebuffer gtt_offset 0x%08lx\n",
-+						   i915_gem_obj_ggtt_offset(obj));
- 			}
- 		}
- 		spin_unlock_irqrestore(&dev->event_lock, flags);
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1362,6 +1362,37 @@ struct drm_i915_gem_object {
- 
- #define to_intel_bo(x) container_of(x, struct drm_i915_gem_object, base)
- 
-+/* Offset of the first PTE pointing to this object */
-+static inline unsigned long
-+i915_gem_obj_ggtt_offset(struct drm_i915_gem_object *o)
-+{
-+	return o->gtt_space->start;
-+}
-+
-+/* Whether or not this object is currently mapped by the translation tables */
-+static inline bool
-+i915_gem_obj_ggtt_bound(struct drm_i915_gem_object *o)
-+{
-+	return o->gtt_space != NULL;
-+}
-+
-+/* The size used in the translation tables may be larger than the actual size of
-+ * the object on GEN2/GEN3 because of the way tiling is handled. See
-+ * i915_gem_get_gtt_size() for more details.
-+ */
-+static inline unsigned long
-+i915_gem_obj_ggtt_size(struct drm_i915_gem_object *o)
-+{
-+	return o->gtt_space->size;
-+}
-+
-+static inline void
-+i915_gem_obj_ggtt_set_color(struct drm_i915_gem_object *o,
-+			    enum i915_cache_level color)
-+{
-+	o->gtt_space->color = color;
-+}
-+
- /**
-  * Request queue structure.
-  *
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -135,7 +135,7 @@ int i915_mutex_lock_interruptible(struct
- static inline bool
- i915_gem_object_is_inactive(struct drm_i915_gem_object *obj)
- {
--	return obj->gtt_space && !obj->active;
-+	return i915_gem_obj_ggtt_bound(obj) && !obj->active;
- }
- 
- int
-@@ -178,7 +178,7 @@ i915_gem_get_aperture_ioctl(struct drm_d
- 	mutex_lock(&dev->struct_mutex);
- 	list_for_each_entry(obj, &dev_priv->mm.bound_list, global_list)
- 		if (obj->pin_count)
--			pinned += obj->gtt_space->size;
-+			pinned += i915_gem_obj_ggtt_size(obj);
- 	mutex_unlock(&dev->struct_mutex);
- 
- 	args->aper_size = dev_priv->gtt.total;
-@@ -422,7 +422,7 @@ i915_gem_shmem_pread(struct drm_device *
- 		 * anyway again before the next pread happens. */
- 		if (obj->cache_level == I915_CACHE_NONE)
- 			needs_clflush = 1;
--		if (obj->gtt_space) {
-+		if (i915_gem_obj_ggtt_bound(obj)) {
- 			ret = i915_gem_object_set_to_gtt_domain(obj, false);
- 			if (ret)
- 				return ret;
-@@ -609,7 +609,7 @@ i915_gem_gtt_pwrite_fast(struct drm_devi
- 	user_data = to_user_ptr(args->data_ptr);
- 	remain = args->size;
- 
--	offset = obj->gtt_offset + args->offset;
-+	offset = i915_gem_obj_ggtt_offset(obj) + args->offset;
- 
- 	while (remain > 0) {
- 		/* Operation in this page
-@@ -739,7 +739,7 @@ i915_gem_shmem_pwrite(struct drm_device
- 		 * right away and we therefore have to clflush anyway. */
- 		if (obj->cache_level == I915_CACHE_NONE)
- 			needs_clflush_after = 1;
--		if (obj->gtt_space) {
-+		if (i915_gem_obj_ggtt_bound(obj)) {
- 			ret = i915_gem_object_set_to_gtt_domain(obj, true);
- 			if (ret)
- 				return ret;
-@@ -1360,8 +1360,9 @@ int i915_gem_fault(struct vm_area_struct
- 
- 	obj->fault_mappable = true;
- 
--	pfn = ((dev_priv->gtt.mappable_base + obj->gtt_offset) >> PAGE_SHIFT) +
--		page_offset;
-+	pfn = dev_priv->gtt.mappable_base + i915_gem_obj_ggtt_offset(obj);
-+	pfn >>= PAGE_SHIFT;
-+	pfn += page_offset;
- 
- 	/* Finally, remap it using the new GTT offset */
- 	ret = vm_insert_pfn(vma, (unsigned long)vmf->virtual_address, pfn);
-@@ -1667,7 +1668,7 @@ i915_gem_object_put_pages(struct drm_i91
- 	if (obj->pages == NULL)
- 		return 0;
- 
--	BUG_ON(obj->gtt_space);
-+	BUG_ON(i915_gem_obj_ggtt_bound(obj));
- 
- 	if (obj->pages_pin_count)
- 		return -EBUSY;
-@@ -2121,8 +2122,8 @@ i915_gem_request_remove_from_client(stru
- 
- static bool i915_head_inside_object(u32 acthd, struct drm_i915_gem_object *obj)
- {
--	if (acthd >= obj->gtt_offset &&
--	    acthd < obj->gtt_offset + obj->base.size)
-+	if (acthd >= i915_gem_obj_ggtt_offset(obj) &&
-+	    acthd < i915_gem_obj_ggtt_offset(obj) + obj->base.size)
- 		return true;
- 
- 	return false;
-@@ -2180,11 +2181,11 @@ static void i915_set_reset_status(struct
- 
- 	if (ring->hangcheck.action != wait &&
- 	    i915_request_guilty(request, acthd, &inside)) {
--		DRM_ERROR("%s hung %s bo (0x%x ctx %d) at 0x%x\n",
-+		DRM_ERROR("%s hung %s bo (0x%lx ctx %d) at 0x%x\n",
- 			  ring->name,
- 			  inside ? "inside" : "flushing",
- 			  request->batch_obj ?
--			  request->batch_obj->gtt_offset : 0,
-+			  i915_gem_obj_ggtt_offset(request->batch_obj) : 0,
- 			  request->ctx ? request->ctx->id : 0,
- 			  acthd);
- 
-@@ -2595,7 +2596,7 @@ i915_gem_object_unbind(struct drm_i915_g
- 	drm_i915_private_t *dev_priv = obj->base.dev->dev_private;
- 	int ret;
- 
--	if (obj->gtt_space == NULL)
-+	if (!i915_gem_obj_ggtt_bound(obj))
- 		return 0;
- 
- 	if (obj->pin_count)
-@@ -2691,12 +2692,12 @@ static void i965_write_fence_reg(struct
- 	POSTING_READ(fence_reg);
- 
- 	if (obj) {
--		u32 size = obj->gtt_space->size;
-+		u32 size = i915_gem_obj_ggtt_size(obj);
- 		uint64_t val;
- 
--		val = (uint64_t)((obj->gtt_offset + size - 4096) &
-+		val = (uint64_t)((i915_gem_obj_ggtt_offset(obj) + size - 4096) &
- 				 0xfffff000) << 32;
--		val |= obj->gtt_offset & 0xfffff000;
-+		val |= i915_gem_obj_ggtt_offset(obj) & 0xfffff000;
- 		val |= (uint64_t)((obj->stride / 128) - 1) << fence_pitch_shift;
- 		if (obj->tiling_mode == I915_TILING_Y)
- 			val |= 1 << I965_FENCE_TILING_Y_SHIFT;
-@@ -2720,15 +2721,15 @@ static void i915_write_fence_reg(struct
- 	u32 val;
- 
- 	if (obj) {
--		u32 size = obj->gtt_space->size;
-+		u32 size = i915_gem_obj_ggtt_size(obj);
- 		int pitch_val;
- 		int tile_width;
- 
--		WARN((obj->gtt_offset & ~I915_FENCE_START_MASK) ||
-+		WARN((i915_gem_obj_ggtt_offset(obj) & ~I915_FENCE_START_MASK) ||
- 		     (size & -size) != size ||
--		     (obj->gtt_offset & (size - 1)),
--		     "object 0x%08x [fenceable? %d] not 1M or pot-size (0x%08x) aligned\n",
--		     obj->gtt_offset, obj->map_and_fenceable, size);
-+		     (i915_gem_obj_ggtt_offset(obj) & (size - 1)),
-+		     "object 0x%08lx [fenceable? %d] not 1M or pot-size (0x%08x) aligned\n",
-+		     i915_gem_obj_ggtt_offset(obj), obj->map_and_fenceable, size);
- 
- 		if (obj->tiling_mode == I915_TILING_Y && HAS_128_BYTE_Y_TILING(dev))
- 			tile_width = 128;
-@@ -2739,7 +2740,7 @@ static void i915_write_fence_reg(struct
- 		pitch_val = obj->stride / tile_width;
- 		pitch_val = ffs(pitch_val) - 1;
- 
--		val = obj->gtt_offset;
-+		val = i915_gem_obj_ggtt_offset(obj);
- 		if (obj->tiling_mode == I915_TILING_Y)
- 			val |= 1 << I830_FENCE_TILING_Y_SHIFT;
- 		val |= I915_FENCE_SIZE_BITS(size);
-@@ -2764,19 +2765,19 @@ static void i830_write_fence_reg(struct
- 	uint32_t val;
- 
- 	if (obj) {
--		u32 size = obj->gtt_space->size;
-+		u32 size = i915_gem_obj_ggtt_size(obj);
- 		uint32_t pitch_val;
- 
--		WARN((obj->gtt_offset & ~I830_FENCE_START_MASK) ||
-+		WARN((i915_gem_obj_ggtt_offset(obj) & ~I830_FENCE_START_MASK) ||
- 		     (size & -size) != size ||
--		     (obj->gtt_offset & (size - 1)),
--		     "object 0x%08x not 512K or pot-size 0x%08x aligned\n",
--		     obj->gtt_offset, size);
-+		     (i915_gem_obj_ggtt_offset(obj) & (size - 1)),
-+		     "object 0x%08lx not 512K or pot-size 0x%08x aligned\n",
-+		     i915_gem_obj_ggtt_offset(obj), size);
- 
- 		pitch_val = obj->stride / 128;
- 		pitch_val = ffs(pitch_val) - 1;
- 
--		val = obj->gtt_offset;
-+		val = i915_gem_obj_ggtt_offset(obj);
- 		if (obj->tiling_mode == I915_TILING_Y)
- 			val |= 1 << I830_FENCE_TILING_Y_SHIFT;
- 		val |= I830_FENCE_SIZE_BITS(size);
-@@ -3030,8 +3031,8 @@ static void i915_gem_verify_gtt(struct d
- 
- 		if (obj->cache_level != obj->gtt_space->color) {
- 			printk(KERN_ERR "object reserved space [%08lx, %08lx] with wrong color, cache_level=%x, color=%lx\n",
--			       obj->gtt_space->start,
--			       obj->gtt_space->start + obj->gtt_space->size,
-+			       i915_gem_obj_ggtt_offset(obj),
-+			       i915_gem_obj_ggtt_offset(obj) + i915_gem_obj_ggtt_size(obj),
- 			       obj->cache_level,
- 			       obj->gtt_space->color);
- 			err++;
-@@ -3042,8 +3043,8 @@ static void i915_gem_verify_gtt(struct d
- 					      obj->gtt_space,
- 					      obj->cache_level)) {
- 			printk(KERN_ERR "invalid GTT space found at [%08lx, %08lx] - color=%x\n",
--			       obj->gtt_space->start,
--			       obj->gtt_space->start + obj->gtt_space->size,
-+			       i915_gem_obj_ggtt_offset(obj),
-+			       i915_gem_obj_ggtt_offset(obj) + i915_gem_obj_ggtt_size(obj),
- 			       obj->cache_level);
- 			err++;
- 			continue;
-@@ -3155,8 +3156,8 @@ search_free:
- 		node->size == fence_size &&
- 		(node->start & (fence_alignment - 1)) == 0;
- 
--	mappable =
--		obj->gtt_offset + obj->base.size <= dev_priv->gtt.mappable_end;
-+	mappable = i915_gem_obj_ggtt_offset(obj) + obj->base.size <=
-+		dev_priv->gtt.mappable_end;
- 
- 	obj->map_and_fenceable = mappable && fenceable;
- 
-@@ -3258,7 +3259,7 @@ i915_gem_object_set_to_gtt_domain(struct
- 	int ret;
- 
- 	/* Not valid to be called on unbound objects. */
--	if (obj->gtt_space == NULL)
-+	if (!i915_gem_obj_ggtt_bound(obj))
- 		return -EINVAL;
- 
- 	if (obj->base.write_domain == I915_GEM_DOMAIN_GTT)
-@@ -3323,7 +3324,7 @@ int i915_gem_object_set_cache_level(stru
- 			return ret;
- 	}
- 
--	if (obj->gtt_space) {
-+	if (i915_gem_obj_ggtt_bound(obj)) {
- 		ret = i915_gem_object_finish_gpu(obj);
- 		if (ret)
- 			return ret;
-@@ -3346,7 +3347,7 @@ int i915_gem_object_set_cache_level(stru
- 			i915_ppgtt_bind_object(dev_priv->mm.aliasing_ppgtt,
- 					       obj, cache_level);
- 
--		obj->gtt_space->color = cache_level;
-+		i915_gem_obj_ggtt_set_color(obj, cache_level);
- 	}
- 
- 	if (cache_level == I915_CACHE_NONE) {
-@@ -3627,14 +3628,14 @@ i915_gem_object_pin(struct drm_i915_gem_
- 	if (WARN_ON(obj->pin_count == DRM_I915_GEM_OBJECT_MAX_PIN_COUNT))
- 		return -EBUSY;
- 
--	if (obj->gtt_space != NULL) {
--		if ((alignment && obj->gtt_offset & (alignment - 1)) ||
-+	if (i915_gem_obj_ggtt_bound(obj)) {
-+		if ((alignment && i915_gem_obj_ggtt_offset(obj) & (alignment - 1)) ||
- 		    (map_and_fenceable && !obj->map_and_fenceable)) {
- 			WARN(obj->pin_count,
- 			     "bo is already pinned with incorrect alignment:"
--			     " offset=%x, req.alignment=%x, req.map_and_fenceable=%d,"
-+			     " offset=%lx, req.alignment=%x, req.map_and_fenceable=%d,"
- 			     " obj->map_and_fenceable=%d\n",
--			     obj->gtt_offset, alignment,
-+			     i915_gem_obj_ggtt_offset(obj), alignment,
- 			     map_and_fenceable,
- 			     obj->map_and_fenceable);
- 			ret = i915_gem_object_unbind(obj);
-@@ -3643,7 +3644,7 @@ i915_gem_object_pin(struct drm_i915_gem_
- 		}
- 	}
- 
--	if (obj->gtt_space == NULL) {
-+	if (!i915_gem_obj_ggtt_bound(obj)) {
- 		struct drm_i915_private *dev_priv = obj->base.dev->dev_private;
- 
- 		ret = i915_gem_object_bind_to_gtt(obj, alignment,
-@@ -3669,7 +3670,7 @@ void
- i915_gem_object_unpin(struct drm_i915_gem_object *obj)
- {
- 	BUG_ON(obj->pin_count == 0);
--	BUG_ON(obj->gtt_space == NULL);
-+	BUG_ON(!i915_gem_obj_ggtt_bound(obj));
- 
- 	if (--obj->pin_count == 0)
- 		obj->pin_mappable = false;
-@@ -3719,7 +3720,7 @@ i915_gem_pin_ioctl(struct drm_device *de
- 	 * as the X server doesn't manage domains yet
- 	 */
- 	i915_gem_object_flush_cpu_write_domain(obj);
--	args->offset = obj->gtt_offset;
-+	args->offset = i915_gem_obj_ggtt_offset(obj);
- out:
- 	drm_gem_object_unreference(&obj->base);
- unlock:
---- a/drivers/gpu/drm/i915/i915_gem_context.c
-+++ b/drivers/gpu/drm/i915/i915_gem_context.c
-@@ -375,7 +375,7 @@ mi_set_context(struct intel_ring_buffer
- 
- 	intel_ring_emit(ring, MI_NOOP);
- 	intel_ring_emit(ring, MI_SET_CONTEXT);
--	intel_ring_emit(ring, new_context->obj->gtt_offset |
-+	intel_ring_emit(ring, i915_gem_obj_ggtt_offset(new_context->obj) |
- 			MI_MM_SPACE_GTT |
- 			MI_SAVE_EXT_STATE_EN |
- 			MI_RESTORE_EXT_STATE_EN |
---- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-@@ -188,7 +188,7 @@ i915_gem_execbuffer_relocate_entry(struc
- 		return -ENOENT;
- 
- 	target_i915_obj = to_intel_bo(target_obj);
--	target_offset = target_i915_obj->gtt_offset;
-+	target_offset = i915_gem_obj_ggtt_offset(target_i915_obj);
- 
- 	/* Sandybridge PPGTT errata: We need a global gtt mapping for MI and
- 	 * pipe_control writes because the gpu doesn't properly redirect them
-@@ -280,7 +280,7 @@ i915_gem_execbuffer_relocate_entry(struc
- 			return ret;
- 
- 		/* Map the page containing the relocation we're going to perform.  */
--		reloc->offset += obj->gtt_offset;
-+		reloc->offset += i915_gem_obj_ggtt_offset(obj);
- 		reloc_page = io_mapping_map_atomic_wc(dev_priv->gtt.mappable,
- 						      reloc->offset & PAGE_MASK);
- 		reloc_entry = (uint32_t __iomem *)
-@@ -436,8 +436,8 @@ i915_gem_execbuffer_reserve_object(struc
- 		obj->has_aliasing_ppgtt_mapping = 1;
- 	}
- 
--	if (entry->offset != obj->gtt_offset) {
--		entry->offset = obj->gtt_offset;
-+	if (entry->offset != i915_gem_obj_ggtt_offset(obj)) {
-+		entry->offset = i915_gem_obj_ggtt_offset(obj);
- 		*need_reloc = true;
- 	}
- 
-@@ -458,7 +458,7 @@ i915_gem_execbuffer_unreserve_object(str
- {
- 	struct drm_i915_gem_exec_object2 *entry;
- 
--	if (!obj->gtt_space)
-+	if (!i915_gem_obj_ggtt_bound(obj))
- 		return;
- 
- 	entry = obj->exec_entry;
-@@ -530,7 +530,7 @@ i915_gem_execbuffer_reserve(struct intel
- 			struct drm_i915_gem_exec_object2 *entry = obj->exec_entry;
- 			bool need_fence, need_mappable;
- 
--			if (!obj->gtt_space)
-+			if (!i915_gem_obj_ggtt_bound(obj))
- 				continue;
- 
- 			need_fence =
-@@ -539,7 +539,8 @@ i915_gem_execbuffer_reserve(struct intel
- 				obj->tiling_mode != I915_TILING_NONE;
- 			need_mappable = need_fence || need_reloc_mappable(obj);
- 
--			if ((entry->alignment && obj->gtt_offset & (entry->alignment - 1)) ||
-+			if ((entry->alignment &&
-+			     i915_gem_obj_ggtt_offset(obj) & (entry->alignment - 1)) ||
- 			    (need_mappable && !obj->map_and_fenceable))
- 				ret = i915_gem_object_unbind(obj);
- 			else
-@@ -550,7 +551,7 @@ i915_gem_execbuffer_reserve(struct intel
- 
- 		/* Bind fresh objects */
- 		list_for_each_entry(obj, objects, exec_list) {
--			if (obj->gtt_space)
-+			if (i915_gem_obj_ggtt_bound(obj))
- 				continue;
- 
- 			ret = i915_gem_execbuffer_reserve_object(obj, ring, need_relocs);
-@@ -1058,7 +1059,7 @@ i915_gem_do_execbuffer(struct drm_device
- 			goto err;
- 	}
- 
--	exec_start = batch_obj->gtt_offset + args->batch_start_offset;
-+	exec_start = i915_gem_obj_ggtt_offset(batch_obj) + args->batch_start_offset;
- 	exec_len = args->batch_len;
- 	if (cliprects) {
- 		for (i = 0; i < args->num_cliprects; i++) {
---- a/drivers/gpu/drm/i915/i915_gem_gtt.c
-+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
-@@ -378,7 +378,7 @@ void i915_ppgtt_bind_object(struct i915_
- 			    enum i915_cache_level cache_level)
- {
- 	ppgtt->insert_entries(ppgtt, obj->pages,
--			      obj->gtt_space->start >> PAGE_SHIFT,
-+			      i915_gem_obj_ggtt_offset(obj) >> PAGE_SHIFT,
- 			      cache_level);
- }
- 
-@@ -386,7 +386,7 @@ void i915_ppgtt_unbind_object(struct i91
- 			      struct drm_i915_gem_object *obj)
- {
- 	ppgtt->clear_range(ppgtt,
--			   obj->gtt_space->start >> PAGE_SHIFT,
-+			   i915_gem_obj_ggtt_offset(obj) >> PAGE_SHIFT,
- 			   obj->base.size >> PAGE_SHIFT);
- }
- 
-@@ -551,7 +551,7 @@ void i915_gem_gtt_bind_object(struct drm
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 
- 	dev_priv->gtt.gtt_insert_entries(dev, obj->pages,
--					 obj->gtt_space->start >> PAGE_SHIFT,
-+					 i915_gem_obj_ggtt_offset(obj) >> PAGE_SHIFT,
- 					 cache_level);
- 
- 	obj->has_global_gtt_mapping = 1;
-@@ -563,7 +563,7 @@ void i915_gem_gtt_unbind_object(struct d
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 
- 	dev_priv->gtt.gtt_clear_range(obj->base.dev,
--				      obj->gtt_space->start >> PAGE_SHIFT,
-+				      i915_gem_obj_ggtt_offset(obj) >> PAGE_SHIFT,
- 				      obj->base.size >> PAGE_SHIFT);
- 
- 	obj->has_global_gtt_mapping = 0;
---- a/drivers/gpu/drm/i915/i915_gem_tiling.c
-+++ b/drivers/gpu/drm/i915/i915_gem_tiling.c
-@@ -268,18 +268,18 @@ i915_gem_object_fence_ok(struct drm_i915
- 		return true;
- 
- 	if (INTEL_INFO(obj->base.dev)->gen == 3) {
--		if (obj->gtt_offset & ~I915_FENCE_START_MASK)
-+		if (i915_gem_obj_ggtt_offset(obj) & ~I915_FENCE_START_MASK)
- 			return false;
- 	} else {
--		if (obj->gtt_offset & ~I830_FENCE_START_MASK)
-+		if (i915_gem_obj_ggtt_offset(obj) & ~I830_FENCE_START_MASK)
- 			return false;
- 	}
- 
- 	size = i915_gem_get_gtt_size(obj->base.dev, obj->base.size, tiling_mode);
--	if (obj->gtt_space->size != size)
-+	if (i915_gem_obj_ggtt_size(obj) != size)
- 		return false;
- 
--	if (obj->gtt_offset & (size - 1))
-+	if (i915_gem_obj_ggtt_offset(obj) & (size - 1))
- 		return false;
- 
- 	return true;
-@@ -359,8 +359,8 @@ i915_gem_set_tiling(struct drm_device *d
- 		 */
- 
- 		obj->map_and_fenceable =
--			obj->gtt_space == NULL ||
--			(obj->gtt_offset + obj->base.size <= dev_priv->gtt.mappable_end &&
-+			!i915_gem_obj_ggtt_bound(obj) ||
-+			(i915_gem_obj_ggtt_offset(obj) + obj->base.size <= dev_priv->gtt.mappable_end &&
- 			 i915_gem_object_fence_ok(obj, args->tiling_mode));
- 
- 		/* Rebind if we need a change of alignment */
-@@ -369,7 +369,7 @@ i915_gem_set_tiling(struct drm_device *d
- 				i915_gem_get_gtt_alignment(dev, obj->base.size,
- 							    args->tiling_mode,
- 							    false);
--			if (obj->gtt_offset & (unfenced_alignment - 1))
-+			if (i915_gem_obj_ggtt_offset(obj) & (unfenced_alignment - 1))
- 				ret = i915_gem_object_unbind(obj);
- 		}
- 
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -1554,7 +1554,7 @@ i915_error_object_create_sized(struct dr
- 	if (dst == NULL)
- 		return NULL;
- 
--	reloc_offset = src->gtt_offset;
-+	reloc_offset = dst->gtt_offset = i915_gem_obj_ggtt_offset(src);
- 	for (i = 0; i < num_pages; i++) {
- 		unsigned long flags;
- 		void *d;
-@@ -1606,7 +1606,6 @@ i915_error_object_create_sized(struct dr
- 		reloc_offset += PAGE_SIZE;
- 	}
- 	dst->page_count = num_pages;
--	dst->gtt_offset = src->gtt_offset;
- 
- 	return dst;
- 
-@@ -1660,7 +1659,7 @@ static void capture_bo(struct drm_i915_e
- 	err->name = obj->base.name;
- 	err->rseqno = obj->last_read_seqno;
- 	err->wseqno = obj->last_write_seqno;
--	err->gtt_offset = obj->gtt_offset;
-+	err->gtt_offset = i915_gem_obj_ggtt_offset(obj);
- 	err->read_domains = obj->base.read_domains;
- 	err->write_domain = obj->base.write_domain;
- 	err->fence_reg = obj->fence_reg;
-@@ -1758,8 +1757,8 @@ i915_error_first_batchbuffer(struct drm_
- 			return NULL;
- 
- 		obj = ring->private;
--		if (acthd >= obj->gtt_offset &&
--		    acthd < obj->gtt_offset + obj->base.size)
-+		if (acthd >= i915_gem_obj_ggtt_offset(obj) &&
-+		    acthd < i915_gem_obj_ggtt_offset(obj) + obj->base.size)
- 			return i915_error_object_create(dev_priv, obj);
- 	}
- 
-@@ -1840,7 +1839,7 @@ static void i915_gem_record_active_conte
- 		return;
- 
- 	list_for_each_entry(obj, &dev_priv->mm.bound_list, global_list) {
--		if ((error->ccid & PAGE_MASK) == obj->gtt_offset) {
-+		if ((error->ccid & PAGE_MASK) == i915_gem_obj_ggtt_offset(obj)) {
- 			ering->ctx = i915_error_object_create_sized(dev_priv,
- 								    obj, 1);
- 			break;
-@@ -2206,10 +2205,10 @@ static void __always_unused i915_pagefli
- 	if (INTEL_INFO(dev)->gen >= 4) {
- 		int dspsurf = DSPSURF(intel_crtc->plane);
- 		stall_detected = I915_HI_DISPBASE(I915_READ(dspsurf)) ==
--					obj->gtt_offset;
-+					i915_gem_obj_ggtt_offset(obj);
- 	} else {
- 		int dspaddr = DSPADDR(intel_crtc->plane);
--		stall_detected = I915_READ(dspaddr) == (obj->gtt_offset +
-+		stall_detected = I915_READ(dspaddr) == (i915_gem_obj_ggtt_offset(obj) +
- 							crtc->y * crtc->fb->pitches[0] +
- 							crtc->x * crtc->fb->bits_per_pixel/8);
- 	}
---- a/drivers/gpu/drm/i915/i915_trace.h
-+++ b/drivers/gpu/drm/i915/i915_trace.h
-@@ -46,8 +46,8 @@ TRACE_EVENT(i915_gem_object_bind,
- 
- 	    TP_fast_assign(
- 			   __entry->obj = obj;
--			   __entry->offset = obj->gtt_space->start;
--			   __entry->size = obj->gtt_space->size;
-+			   __entry->offset = i915_gem_obj_ggtt_offset(obj);
-+			   __entry->size = i915_gem_obj_ggtt_size(obj);
- 			   __entry->mappable = mappable;
- 			   ),
- 
-@@ -68,8 +68,8 @@ TRACE_EVENT(i915_gem_object_unbind,
- 
- 	    TP_fast_assign(
- 			   __entry->obj = obj;
--			   __entry->offset = obj->gtt_space->start;
--			   __entry->size = obj->gtt_space->size;
-+			   __entry->offset = i915_gem_obj_ggtt_offset(obj);
-+			   __entry->size = i915_gem_obj_ggtt_size(obj);
- 			   ),
- 
- 	    TP_printk("obj=%p, offset=%08x size=%x",
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -1980,16 +1980,17 @@ static int i9xx_update_plane(struct drm_
- 		intel_crtc->dspaddr_offset = linear_offset;
- 	}
- 
--	DRM_DEBUG_KMS("Writing base %08X %08lX %d %d %d\n",
--		      obj->gtt_offset, linear_offset, x, y, fb->pitches[0]);
-+	DRM_DEBUG_KMS("Writing base %08lX %08lX %d %d %d\n",
-+		      i915_gem_obj_ggtt_offset(obj), linear_offset, x, y,
-+		      fb->pitches[0]);
- 	I915_WRITE(DSPSTRIDE(plane), fb->pitches[0]);
- 	if (INTEL_INFO(dev)->gen >= 4) {
- 		I915_MODIFY_DISPBASE(DSPSURF(plane),
--				     obj->gtt_offset + intel_crtc->dspaddr_offset);
-+				     i915_gem_obj_ggtt_offset(obj) + intel_crtc->dspaddr_offset);
- 		I915_WRITE(DSPTILEOFF(plane), (y << 16) | x);
- 		I915_WRITE(DSPLINOFF(plane), linear_offset);
- 	} else
--		I915_WRITE(DSPADDR(plane), obj->gtt_offset + linear_offset);
-+		I915_WRITE(DSPADDR(plane), i915_gem_obj_ggtt_offset(obj) + linear_offset);
- 	POSTING_READ(reg);
- 
- 	return 0;
-@@ -2069,11 +2070,12 @@ static int ironlake_update_plane(struct
- 					       fb->pitches[0]);
- 	linear_offset -= intel_crtc->dspaddr_offset;
- 
--	DRM_DEBUG_KMS("Writing base %08X %08lX %d %d %d\n",
--		      obj->gtt_offset, linear_offset, x, y, fb->pitches[0]);
-+	DRM_DEBUG_KMS("Writing base %08lX %08lX %d %d %d\n",
-+		      i915_gem_obj_ggtt_offset(obj), linear_offset, x, y,
-+		      fb->pitches[0]);
- 	I915_WRITE(DSPSTRIDE(plane), fb->pitches[0]);
- 	I915_MODIFY_DISPBASE(DSPSURF(plane),
--			     obj->gtt_offset + intel_crtc->dspaddr_offset);
-+			     i915_gem_obj_ggtt_offset(obj) + intel_crtc->dspaddr_offset);
- 	if (IS_HASWELL(dev)) {
- 		I915_WRITE(DSPOFFSET(plane), (y << 16) | x);
- 	} else {
-@@ -6568,7 +6570,7 @@ static int intel_crtc_cursor_set(struct
- 			goto fail_unpin;
- 		}
- 
--		addr = obj->gtt_offset;
-+		addr = i915_gem_obj_ggtt_offset(obj);
- 	} else {
- 		int align = IS_I830(dev) ? 16 * 1024 : 256;
- 		ret = i915_gem_attach_phys_object(dev, obj,
-@@ -7340,7 +7342,7 @@ static int intel_gen2_queue_flip(struct
- 	intel_ring_emit(ring, MI_DISPLAY_FLIP |
- 			MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));
- 	intel_ring_emit(ring, fb->pitches[0]);
--	intel_ring_emit(ring, obj->gtt_offset + intel_crtc->dspaddr_offset);
-+	intel_ring_emit(ring, i915_gem_obj_ggtt_offset(obj) + intel_crtc->dspaddr_offset);
- 	intel_ring_emit(ring, 0); /* aux display base address, unused */
- 
- 	intel_mark_page_flip_active(intel_crtc);
-@@ -7381,7 +7383,7 @@ static int intel_gen3_queue_flip(struct
- 	intel_ring_emit(ring, MI_DISPLAY_FLIP_I915 |
- 			MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));
- 	intel_ring_emit(ring, fb->pitches[0]);
--	intel_ring_emit(ring, obj->gtt_offset + intel_crtc->dspaddr_offset);
-+	intel_ring_emit(ring, i915_gem_obj_ggtt_offset(obj) + intel_crtc->dspaddr_offset);
- 	intel_ring_emit(ring, MI_NOOP);
- 
- 	intel_mark_page_flip_active(intel_crtc);
-@@ -7421,7 +7423,7 @@ static int intel_gen4_queue_flip(struct
- 			MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));
- 	intel_ring_emit(ring, fb->pitches[0]);
- 	intel_ring_emit(ring,
--			(obj->gtt_offset + intel_crtc->dspaddr_offset) |
-+			(i915_gem_obj_ggtt_offset(obj) + intel_crtc->dspaddr_offset) |
- 			obj->tiling_mode);
- 
- 	/* XXX Enabling the panel-fitter across page-flip is so far
-@@ -7464,7 +7466,7 @@ static int intel_gen6_queue_flip(struct
- 	intel_ring_emit(ring, MI_DISPLAY_FLIP |
- 			MI_DISPLAY_FLIP_PLANE(intel_crtc->plane));
- 	intel_ring_emit(ring, fb->pitches[0] | obj->tiling_mode);
--	intel_ring_emit(ring, obj->gtt_offset + intel_crtc->dspaddr_offset);
-+	intel_ring_emit(ring, i915_gem_obj_ggtt_offset(obj) + intel_crtc->dspaddr_offset);
- 
- 	/* Contrary to the suggestions in the documentation,
- 	 * "Enable Panel Fitter" does not seem to be required when page
-@@ -7529,7 +7531,7 @@ static int intel_gen7_queue_flip(struct
- 
- 	intel_ring_emit(ring, MI_DISPLAY_FLIP_I915 | plane_bit);
- 	intel_ring_emit(ring, (fb->pitches[0] | obj->tiling_mode));
--	intel_ring_emit(ring, obj->gtt_offset + intel_crtc->dspaddr_offset);
-+	intel_ring_emit(ring, i915_gem_obj_ggtt_offset(obj) + intel_crtc->dspaddr_offset);
- 	intel_ring_emit(ring, (MI_NOOP));
- 
- 	intel_mark_page_flip_active(intel_crtc);
---- a/drivers/gpu/drm/i915/intel_fb.c
-+++ b/drivers/gpu/drm/i915/intel_fb.c
-@@ -139,11 +139,11 @@ static int intelfb_create(struct drm_fb_
- 	info->apertures->ranges[0].base = dev->mode_config.fb_base;
- 	info->apertures->ranges[0].size = dev_priv->gtt.mappable_end;
- 
--	info->fix.smem_start = dev->mode_config.fb_base + obj->gtt_offset;
-+	info->fix.smem_start = dev->mode_config.fb_base + i915_gem_obj_ggtt_offset(obj);
- 	info->fix.smem_len = size;
- 
- 	info->screen_base =
--		ioremap_wc(dev_priv->gtt.mappable_base + obj->gtt_offset,
-+		ioremap_wc(dev_priv->gtt.mappable_base + i915_gem_obj_ggtt_offset(obj),
- 			   size);
- 	if (!info->screen_base) {
- 		ret = -ENOSPC;
-@@ -166,9 +166,9 @@ static int intelfb_create(struct drm_fb_
- 
- 	/* Use default scratch pixmap (info->pixmap.flags = FB_PIXMAP_SYSTEM) */
- 
--	DRM_DEBUG_KMS("allocated %dx%d fb: 0x%08x, bo %p\n",
-+	DRM_DEBUG_KMS("allocated %dx%d fb: 0x%08lx, bo %p\n",
- 		      fb->width, fb->height,
--		      obj->gtt_offset, obj);
-+		      i915_gem_obj_ggtt_offset(obj), obj);
- 
- 
- 	mutex_unlock(&dev->struct_mutex);
---- a/drivers/gpu/drm/i915/intel_overlay.c
-+++ b/drivers/gpu/drm/i915/intel_overlay.c
-@@ -196,7 +196,7 @@ intel_overlay_map_regs(struct intel_over
- 		regs = (struct overlay_registers __iomem *)overlay->reg_bo->phys_obj->handle->vaddr;
- 	else
- 		regs = io_mapping_map_wc(dev_priv->gtt.mappable,
--					 overlay->reg_bo->gtt_offset);
-+					 i915_gem_obj_ggtt_offset(overlay->reg_bo));
- 
- 	return regs;
- }
-@@ -740,7 +740,7 @@ static int intel_overlay_do_put_image(st
- 	swidth = params->src_w;
- 	swidthsw = calc_swidthsw(overlay->dev, params->offset_Y, tmp_width);
- 	sheight = params->src_h;
--	iowrite32(new_bo->gtt_offset + params->offset_Y, &regs->OBUF_0Y);
-+	iowrite32(i915_gem_obj_ggtt_offset(new_bo) + params->offset_Y, &regs->OBUF_0Y);
- 	ostride = params->stride_Y;
- 
- 	if (params->format & I915_OVERLAY_YUV_PLANAR) {
-@@ -754,8 +754,8 @@ static int intel_overlay_do_put_image(st
- 				      params->src_w/uv_hscale);
- 		swidthsw |= max_t(u32, tmp_U, tmp_V) << 16;
- 		sheight |= (params->src_h/uv_vscale) << 16;
--		iowrite32(new_bo->gtt_offset + params->offset_U, &regs->OBUF_0U);
--		iowrite32(new_bo->gtt_offset + params->offset_V, &regs->OBUF_0V);
-+		iowrite32(i915_gem_obj_ggtt_offset(new_bo) + params->offset_U, &regs->OBUF_0U);
-+		iowrite32(i915_gem_obj_ggtt_offset(new_bo) + params->offset_V, &regs->OBUF_0V);
- 		ostride |= params->stride_UV << 16;
- 	}
- 
-@@ -1355,7 +1355,7 @@ void intel_setup_overlay(struct drm_devi
- 			DRM_ERROR("failed to pin overlay register bo\n");
- 			goto out_free_bo;
- 		}
--		overlay->flip_addr = reg_bo->gtt_offset;
-+		overlay->flip_addr = i915_gem_obj_ggtt_offset(reg_bo);
- 
- 		ret = i915_gem_object_set_to_gtt_domain(reg_bo, true);
- 		if (ret) {
-@@ -1435,7 +1435,7 @@ intel_overlay_map_regs_atomic(struct int
- 			overlay->reg_bo->phys_obj->handle->vaddr;
- 	else
- 		regs = io_mapping_map_atomic_wc(dev_priv->gtt.mappable,
--						overlay->reg_bo->gtt_offset);
-+						i915_gem_obj_ggtt_offset(overlay->reg_bo));
- 
- 	return regs;
- }
-@@ -1468,7 +1468,7 @@ intel_overlay_capture_error_state(struct
- 	if (OVERLAY_NEEDS_PHYSICAL(overlay->dev))
- 		error->base = (__force long)overlay->reg_bo->phys_obj->handle->vaddr;
- 	else
--		error->base = overlay->reg_bo->gtt_offset;
-+		error->base = i915_gem_obj_ggtt_offset(overlay->reg_bo);
- 
- 	regs = intel_overlay_map_regs_atomic(overlay);
- 	if (!regs)
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -218,7 +218,7 @@ static void ironlake_enable_fbc(struct d
- 		   (stall_watermark << DPFC_RECOMP_STALL_WM_SHIFT) |
- 		   (interval << DPFC_RECOMP_TIMER_COUNT_SHIFT));
- 	I915_WRITE(ILK_DPFC_FENCE_YOFF, crtc->y);
--	I915_WRITE(ILK_FBC_RT_BASE, obj->gtt_offset | ILK_FBC_RT_VALID);
-+	I915_WRITE(ILK_FBC_RT_BASE, i915_gem_obj_ggtt_offset(obj) | ILK_FBC_RT_VALID);
- 	/* enable it... */
- 	I915_WRITE(ILK_DPFC_CONTROL, dpfc_ctl | DPFC_CTL_EN);
- 
-@@ -275,7 +275,7 @@ static void gen7_enable_fbc(struct drm_c
- 	struct drm_i915_gem_object *obj = intel_fb->obj;
- 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
- 
--	I915_WRITE(IVB_FBC_RT_BASE, obj->gtt_offset);
-+	I915_WRITE(IVB_FBC_RT_BASE, i915_gem_obj_ggtt_offset(obj));
- 
- 	I915_WRITE(ILK_DPFC_CONTROL, DPFC_CTL_EN | DPFC_CTL_LIMIT_1X |
- 		   IVB_DPFC_CTL_FENCE_EN |
-@@ -3700,7 +3700,7 @@ static void ironlake_enable_rc6(struct d
- 
- 	intel_ring_emit(ring, MI_SUSPEND_FLUSH | MI_SUSPEND_FLUSH_EN);
- 	intel_ring_emit(ring, MI_SET_CONTEXT);
--	intel_ring_emit(ring, dev_priv->ips.renderctx->gtt_offset |
-+	intel_ring_emit(ring, i915_gem_obj_ggtt_offset(dev_priv->ips.renderctx) |
- 			MI_MM_SPACE_GTT |
- 			MI_SAVE_EXT_STATE_EN |
- 			MI_RESTORE_EXT_STATE_EN |
-@@ -3723,7 +3723,7 @@ static void ironlake_enable_rc6(struct d
- 		return;
- 	}
- 
--	I915_WRITE(PWRCTXA, dev_priv->ips.pwrctx->gtt_offset | PWRCTX_EN);
-+	I915_WRITE(PWRCTXA, i915_gem_obj_ggtt_offset(dev_priv->ips.pwrctx) | PWRCTX_EN);
- 	I915_WRITE(RSTDBYCTL, I915_READ(RSTDBYCTL) & ~RCX_SW_EXIT);
- }
- 
---- a/drivers/gpu/drm/i915/intel_ringbuffer.c
-+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
-@@ -440,14 +440,14 @@ static int init_ring_common(struct intel
- 	 * registers with the above sequence (the readback of the HEAD registers
- 	 * also enforces ordering), otherwise the hw might lose the new ring
- 	 * register values. */
--	I915_WRITE_START(ring, obj->gtt_offset);
-+	I915_WRITE_START(ring, i915_gem_obj_ggtt_offset(obj));
- 	I915_WRITE_CTL(ring,
- 			((ring->size - PAGE_SIZE) & RING_NR_PAGES)
- 			| RING_VALID);
- 
- 	/* If the head is still not zero, the ring is dead */
- 	if (wait_for((I915_READ_CTL(ring) & RING_VALID) != 0 &&
--		     I915_READ_START(ring) == obj->gtt_offset &&
-+		     I915_READ_START(ring) == i915_gem_obj_ggtt_offset(obj) &&
- 		     (I915_READ_HEAD(ring) & HEAD_ADDR) == 0, 50)) {
- 		DRM_ERROR("%s initialization failed "
- 				"ctl %08x head %08x tail %08x start %08x\n",
-@@ -505,7 +505,7 @@ init_pipe_control(struct intel_ring_buff
- 	if (ret)
- 		goto err_unref;
- 
--	pc->gtt_offset = obj->gtt_offset;
-+	pc->gtt_offset = i915_gem_obj_ggtt_offset(obj);
- 	pc->cpu_page = kmap(sg_page(obj->pages->sgl));
- 	if (pc->cpu_page == NULL) {
- 		ret = -ENOMEM;
-@@ -1156,7 +1156,7 @@ i830_dispatch_execbuffer(struct intel_ri
- 		intel_ring_advance(ring);
- 	} else {
- 		struct drm_i915_gem_object *obj = ring->private;
--		u32 cs_offset = obj->gtt_offset;
-+		u32 cs_offset = i915_gem_obj_ggtt_offset(obj);
- 
- 		if (len > I830_BATCH_LIMIT)
- 			return -ENOSPC;
-@@ -1241,7 +1241,7 @@ static int init_status_page(struct intel
- 		goto err_unref;
- 	}
- 
--	ring->status_page.gfx_addr = obj->gtt_offset;
-+	ring->status_page.gfx_addr = i915_gem_obj_ggtt_offset(obj);
- 	ring->status_page.page_addr = kmap(sg_page(obj->pages->sgl));
- 	if (ring->status_page.page_addr == NULL) {
- 		ret = -ENOMEM;
-@@ -1328,7 +1328,7 @@ static int intel_init_ring_buffer(struct
- 		goto err_unpin;
- 
- 	ring->virtual_start =
--		ioremap_wc(dev_priv->gtt.mappable_base + obj->gtt_offset,
-+		ioremap_wc(dev_priv->gtt.mappable_base + i915_gem_obj_ggtt_offset(obj),
- 			   ring->size);
- 	if (ring->virtual_start == NULL) {
- 		DRM_ERROR("Failed to map ringbuffer.\n");
---- a/drivers/gpu/drm/i915/intel_sprite.c
-+++ b/drivers/gpu/drm/i915/intel_sprite.c
-@@ -133,7 +133,7 @@ vlv_update_plane(struct drm_plane *dplan
- 
- 	I915_WRITE(SPSIZE(pipe, plane), (crtc_h << 16) | crtc_w);
- 	I915_WRITE(SPCNTR(pipe, plane), sprctl);
--	I915_MODIFY_DISPBASE(SPSURF(pipe, plane), obj->gtt_offset +
-+	I915_MODIFY_DISPBASE(SPSURF(pipe, plane), i915_gem_obj_ggtt_offset(obj) +
- 			     sprsurf_offset);
- 	POSTING_READ(SPSURF(pipe, plane));
- }
-@@ -308,7 +308,8 @@ ivb_update_plane(struct drm_plane *plane
- 	if (intel_plane->can_scale)
- 		I915_WRITE(SPRSCALE(pipe), sprscale);
- 	I915_WRITE(SPRCTL(pipe), sprctl);
--	I915_MODIFY_DISPBASE(SPRSURF(pipe), obj->gtt_offset + sprsurf_offset);
-+	I915_MODIFY_DISPBASE(SPRSURF(pipe),
-+			     i915_gem_obj_ggtt_offset(obj) + sprsurf_offset);
- 	POSTING_READ(SPRSURF(pipe));
- 
- 	/* potentially re-enable LP watermarks */
-@@ -478,7 +479,8 @@ ilk_update_plane(struct drm_plane *plane
- 	I915_WRITE(DVSSIZE(pipe), (crtc_h << 16) | crtc_w);
- 	I915_WRITE(DVSSCALE(pipe), dvsscale);
- 	I915_WRITE(DVSCNTR(pipe), dvscntr);
--	I915_MODIFY_DISPBASE(DVSSURF(pipe), obj->gtt_offset + dvssurf_offset);
-+	I915_MODIFY_DISPBASE(DVSSURF(pipe),
-+			     i915_gem_obj_ggtt_offset(obj) + dvssurf_offset);
- 	POSTING_READ(DVSSURF(pipe));
- }
- 
diff --git a/patches.baytrail/0432-drm-i915-Kill-obj-gtt_offset.patch b/patches.baytrail/0432-drm-i915-Kill-obj-gtt_offset.patch
deleted file mode 100644
index e1bfb5c085f94..0000000000000
--- a/patches.baytrail/0432-drm-i915-Kill-obj-gtt_offset.patch
+++ /dev/null
@@ -1,131 +0,0 @@
-From 2181bd42613113ce8c43f1e1d3fe573f254ab008 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Fri, 5 Jul 2013 14:41:05 -0700
-Subject: drm/i915: Kill obj->gtt_offset
-
-With the getters in place from the previous patch this members serves no
-purpose other than saving one spare pointer chase, which will be killed
-in the next patch anyway.
-
-Moving to VMAs, this members adds unnecessary confusion since an object
-may exist at different offsets in different VMs.
-
-v2: Properly preserve the stolen offset. This code is a bit hacky but it
-all goes away when we embed the drm_mm_node and removes the need for the
-incorrect patch I submitted previously: "Use gtt_space->start for stolen
-reservation"
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit edd41a870f11157a1bf4c15080421f9770912e09)
-(cherry picked from drm-intel-next-queued)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h        |  9 +--------
- drivers/gpu/drm/i915/i915_gem.c        |  2 --
- drivers/gpu/drm/i915/i915_gem_gtt.c    | 14 ++++++++------
- drivers/gpu/drm/i915/i915_gem_stolen.c |  9 ++++++---
- 4 files changed, 15 insertions(+), 19 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index ccf9bfa54c08..83946426f3d9 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1202,7 +1202,7 @@ enum hdmi_force_audio {
- 	HDMI_AUDIO_ON,			/* force turn on HDMI audio */
- };
- 
--#define I915_GTT_RESERVED ((struct drm_mm_node *)0x1)
-+#define I915_GTT_RESERVED (1<<0)
- #define I915_GTT_OFFSET_NONE ((u32)-1)
- 
- struct drm_i915_gem_object_ops {
-@@ -1330,13 +1330,6 @@ struct drm_i915_gem_object {
- 	unsigned long exec_handle;
- 	struct drm_i915_gem_exec_object2 *exec_entry;
- 
--	/**
--	 * Current offset of the object in GTT space.
--	 *
--	 * This is the same as gtt_space->start
--	 */
--	uint32_t gtt_offset;
--
- 	struct intel_ring_buffer *ring;
- 
- 	/** Breadcrumb of last rendering to the buffer. */
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index e43a35dcff63..468a08060020 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -2637,7 +2637,6 @@ i915_gem_object_unbind(struct drm_i915_gem_object *obj)
- 
- 	drm_mm_put_block(obj->gtt_space);
- 	obj->gtt_space = NULL;
--	obj->gtt_offset = 0;
- 
- 	return 0;
- }
-@@ -3150,7 +3149,6 @@ search_free:
- 	list_add_tail(&obj->mm_list, &dev_priv->mm.inactive_list);
- 
- 	obj->gtt_space = node;
--	obj->gtt_offset = node->start;
- 
- 	fenceable =
- 		node->size == fence_size &&
-diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
-index 6f0a4c09e26a..76a4095452c7 100644
---- a/drivers/gpu/drm/i915/i915_gem_gtt.c
-+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
-@@ -629,18 +629,20 @@ void i915_gem_setup_global_gtt(struct drm_device *dev,
- 
- 	/* Mark any preallocated objects as occupied */
- 	list_for_each_entry(obj, &dev_priv->mm.bound_list, global_list) {
-+		uintptr_t offset = (uintptr_t) obj->gtt_space;
- 		int ret;
--		DRM_DEBUG_KMS("reserving preallocated space: %x + %zx\n",
--			      obj->gtt_offset, obj->base.size);
-+		DRM_DEBUG_KMS("reserving preallocated space: %lx + %zx\n",
-+			      offset, obj->base.size);
- 
--		BUG_ON(obj->gtt_space != I915_GTT_RESERVED);
-+		BUG_ON((offset & I915_GTT_RESERVED) != 0);
-+		offset &= ~I915_GTT_RESERVED;
- 		obj->gtt_space = kzalloc(sizeof(*obj->gtt_space), GFP_KERNEL);
- 		if (!obj->gtt_space) {
--			DRM_ERROR("Failed to preserve object at offset %x\n",
--				  obj->gtt_offset);
-+			DRM_ERROR("Failed to preserve object at offset %lx\n",
-+				  offset);
- 			continue;
- 		}
--		obj->gtt_space->start = obj->gtt_offset;
-+		obj->gtt_space->start = (unsigned long)offset;
- 		obj->gtt_space->size = obj->base.size;
- 		ret = drm_mm_reserve_node(&dev_priv->mm.gtt_space,
- 					  obj->gtt_space);
-diff --git a/drivers/gpu/drm/i915/i915_gem_stolen.c b/drivers/gpu/drm/i915/i915_gem_stolen.c
-index bc601c4fdc37..ee3d619ac2a3 100644
---- a/drivers/gpu/drm/i915/i915_gem_stolen.c
-+++ b/drivers/gpu/drm/i915/i915_gem_stolen.c
-@@ -392,10 +392,13 @@ i915_gem_object_create_stolen_for_preallocated(struct drm_device *dev,
- 			DRM_DEBUG_KMS("failed to allocate stolen GTT space\n");
- 			goto free_out;
- 		}
--	} else
--		obj->gtt_space = I915_GTT_RESERVED;
-+	} else {
-+		if (WARN_ON(gtt_offset & ~PAGE_MASK))
-+			DRM_DEBUG_KMS("Cannot preserve non page aligned offset\n");
-+		obj->gtt_space =
-+			(struct drm_mm_node *)((uintptr_t)(I915_GTT_RESERVED | gtt_offset));
-+	}
- 
--	obj->gtt_offset = gtt_offset;
- 	obj->has_global_gtt_mapping = 1;
- 
- 	list_add_tail(&obj->global_list, &dev_priv->mm.bound_list);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0433-drm-i915-Embed-drm_mm_node-in-i915-gem-obj.patch b/patches.baytrail/0433-drm-i915-Embed-drm_mm_node-in-i915-gem-obj.patch
deleted file mode 100644
index 7987912271f27..0000000000000
--- a/patches.baytrail/0433-drm-i915-Embed-drm_mm_node-in-i915-gem-obj.patch
+++ /dev/null
@@ -1,304 +0,0 @@
-From e81aa7d263996c1af86e0493b1753dd401577239 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Fri, 5 Jul 2013 14:41:06 -0700
-Subject: drm/i915: Embed drm_mm_node in i915 gem obj
-
-Embedding the node in the obj is more natural in the transition to VMAs
-which will also have embedded nodes. This change also helps transition
-away from put_block to remove node.
-
-Though it's quite an uncommon occurrence, it's somewhat convenient to not
-fail at bind time because we cannot allocate the node. Though in
-practice there are other allocations (like the request structure) which
-would probably make this point not terribly useful.
-
-Quoting Daniel:
-Note that the only difference between put_block and remove_node is
-that the former fills up the preallocation cache. Which we don't need
-anyway and hence is just wasted space.
-
-v2: Clean up the stolen preallocation code.
-Rebased on the reserve_node patches
-renames ggtt_ stuff to gtt_ stuff
-WARN_ON if the object is already bound (which doesn't mean it's in the
-bound list, tricky)
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit c6cfb325677ea6305fb19acf3a4d14ea267f923e)
-(cherry picked from drm-intel-next-queued)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h        | 11 +++++------
- drivers/gpu/drm/i915/i915_gem.c        | 31 +++++++++++--------------------
- drivers/gpu/drm/i915/i915_gem_evict.c  |  6 +++---
- drivers/gpu/drm/i915/i915_gem_gtt.c    | 23 +++++------------------
- drivers/gpu/drm/i915/i915_gem_stolen.c | 22 ++++------------------
- 5 files changed, 28 insertions(+), 65 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 83946426f3d9..db64bfefe8c5 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1202,7 +1202,6 @@ enum hdmi_force_audio {
- 	HDMI_AUDIO_ON,			/* force turn on HDMI audio */
- };
- 
--#define I915_GTT_RESERVED (1<<0)
- #define I915_GTT_OFFSET_NONE ((u32)-1)
- 
- struct drm_i915_gem_object_ops {
-@@ -1229,7 +1228,7 @@ struct drm_i915_gem_object {
- 	const struct drm_i915_gem_object_ops *ops;
- 
- 	/** Current space allocated to this object in the GTT, if any. */
--	struct drm_mm_node *gtt_space;
-+	struct drm_mm_node gtt_space;
- 	/** Stolen memory for this object, instead of being backed by shmem. */
- 	struct drm_mm_node *stolen;
- 	struct list_head global_list;
-@@ -1359,14 +1358,14 @@ struct drm_i915_gem_object {
- static inline unsigned long
- i915_gem_obj_ggtt_offset(struct drm_i915_gem_object *o)
- {
--	return o->gtt_space->start;
-+	return o->gtt_space.start;
- }
- 
- /* Whether or not this object is currently mapped by the translation tables */
- static inline bool
- i915_gem_obj_ggtt_bound(struct drm_i915_gem_object *o)
- {
--	return o->gtt_space != NULL;
-+	return drm_mm_node_allocated(&o->gtt_space);
- }
- 
- /* The size used in the translation tables may be larger than the actual size of
-@@ -1376,14 +1375,14 @@ i915_gem_obj_ggtt_bound(struct drm_i915_gem_object *o)
- static inline unsigned long
- i915_gem_obj_ggtt_size(struct drm_i915_gem_object *o)
- {
--	return o->gtt_space->size;
-+	return o->gtt_space.size;
- }
- 
- static inline void
- i915_gem_obj_ggtt_set_color(struct drm_i915_gem_object *o,
- 			    enum i915_cache_level color)
- {
--	o->gtt_space->color = color;
-+	o->gtt_space.color = color;
- }
- 
- /**
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index 468a08060020..ee1f4add3430 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -2635,8 +2635,7 @@ i915_gem_object_unbind(struct drm_i915_gem_object *obj)
- 	/* Avoid an unnecessary call to unbind on rebind. */
- 	obj->map_and_fenceable = true;
- 
--	drm_mm_put_block(obj->gtt_space);
--	obj->gtt_space = NULL;
-+	drm_mm_remove_node(&obj->gtt_space);
- 
- 	return 0;
- }
-@@ -2997,7 +2996,7 @@ static bool i915_gem_valid_gtt_space(struct drm_device *dev,
- 	if (HAS_LLC(dev))
- 		return true;
- 
--	if (gtt_space == NULL)
-+	if (!drm_mm_node_allocated(gtt_space))
- 		return true;
- 
- 	if (list_empty(&gtt_space->node_list))
-@@ -3065,7 +3064,6 @@ i915_gem_object_bind_to_gtt(struct drm_i915_gem_object *obj,
- {
- 	struct drm_device *dev = obj->base.dev;
- 	drm_i915_private_t *dev_priv = dev->dev_private;
--	struct drm_mm_node *node;
- 	u32 size, fence_size, fence_alignment, unfenced_alignment;
- 	bool mappable, fenceable;
- 	size_t gtt_max = map_and_fenceable ?
-@@ -3110,14 +3108,9 @@ i915_gem_object_bind_to_gtt(struct drm_i915_gem_object *obj,
- 
- 	i915_gem_object_pin_pages(obj);
- 
--	node = kzalloc(sizeof(*node), GFP_KERNEL);
--	if (node == NULL) {
--		i915_gem_object_unpin_pages(obj);
--		return -ENOMEM;
--	}
--
- search_free:
--	ret = drm_mm_insert_node_in_range_generic(&dev_priv->mm.gtt_space, node,
-+	ret = drm_mm_insert_node_in_range_generic(&dev_priv->mm.gtt_space,
-+						  &obj->gtt_space,
- 						  size, alignment,
- 						  obj->cache_level, 0, gtt_max);
- 	if (ret) {
-@@ -3129,30 +3122,28 @@ search_free:
- 			goto search_free;
- 
- 		i915_gem_object_unpin_pages(obj);
--		kfree(node);
- 		return ret;
- 	}
--	if (WARN_ON(!i915_gem_valid_gtt_space(dev, node, obj->cache_level))) {
-+	if (WARN_ON(!i915_gem_valid_gtt_space(dev, &obj->gtt_space,
-+					      obj->cache_level))) {
- 		i915_gem_object_unpin_pages(obj);
--		drm_mm_put_block(node);
-+		drm_mm_remove_node(&obj->gtt_space);
- 		return -EINVAL;
- 	}
- 
- 	ret = i915_gem_gtt_prepare_object(obj);
- 	if (ret) {
- 		i915_gem_object_unpin_pages(obj);
--		drm_mm_put_block(node);
-+		drm_mm_remove_node(&obj->gtt_space);
- 		return ret;
- 	}
- 
- 	list_move_tail(&obj->global_list, &dev_priv->mm.bound_list);
- 	list_add_tail(&obj->mm_list, &dev_priv->mm.inactive_list);
- 
--	obj->gtt_space = node;
--
- 	fenceable =
--		node->size == fence_size &&
--		(node->start & (fence_alignment - 1)) == 0;
-+		i915_gem_obj_ggtt_size(obj) == fence_size &&
-+		(i915_gem_obj_ggtt_offset(obj) & (fence_alignment - 1)) == 0;
- 
- 	mappable = i915_gem_obj_ggtt_offset(obj) + obj->base.size <=
- 		dev_priv->gtt.mappable_end;
-@@ -3316,7 +3307,7 @@ int i915_gem_object_set_cache_level(struct drm_i915_gem_object *obj,
- 		return -EBUSY;
- 	}
- 
--	if (!i915_gem_valid_gtt_space(dev, obj->gtt_space, cache_level)) {
-+	if (!i915_gem_valid_gtt_space(dev, &obj->gtt_space, cache_level)) {
- 		ret = i915_gem_object_unbind(obj);
- 		if (ret)
- 			return ret;
-diff --git a/drivers/gpu/drm/i915/i915_gem_evict.c b/drivers/gpu/drm/i915/i915_gem_evict.c
-index c86d5d9356fd..5f8afc48bb7e 100644
---- a/drivers/gpu/drm/i915/i915_gem_evict.c
-+++ b/drivers/gpu/drm/i915/i915_gem_evict.c
-@@ -38,7 +38,7 @@ mark_free(struct drm_i915_gem_object *obj, struct list_head *unwind)
- 		return false;
- 
- 	list_add(&obj->exec_list, unwind);
--	return drm_mm_scan_add_block(obj->gtt_space);
-+	return drm_mm_scan_add_block(&obj->gtt_space);
- }
- 
- int
-@@ -107,7 +107,7 @@ none:
- 				       struct drm_i915_gem_object,
- 				       exec_list);
- 
--		ret = drm_mm_scan_remove_block(obj->gtt_space);
-+		ret = drm_mm_scan_remove_block(&obj->gtt_space);
- 		BUG_ON(ret);
- 
- 		list_del_init(&obj->exec_list);
-@@ -127,7 +127,7 @@ found:
- 		obj = list_first_entry(&unwind_list,
- 				       struct drm_i915_gem_object,
- 				       exec_list);
--		if (drm_mm_scan_remove_block(obj->gtt_space)) {
-+		if (drm_mm_scan_remove_block(&obj->gtt_space)) {
- 			list_move(&obj->exec_list, &eviction_list);
- 			drm_gem_object_reference(&obj->base);
- 			continue;
-diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
-index 76a4095452c7..242d0f9bb9e4 100644
---- a/drivers/gpu/drm/i915/i915_gem_gtt.c
-+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
-@@ -629,28 +629,15 @@ void i915_gem_setup_global_gtt(struct drm_device *dev,
- 
- 	/* Mark any preallocated objects as occupied */
- 	list_for_each_entry(obj, &dev_priv->mm.bound_list, global_list) {
--		uintptr_t offset = (uintptr_t) obj->gtt_space;
- 		int ret;
- 		DRM_DEBUG_KMS("reserving preallocated space: %lx + %zx\n",
--			      offset, obj->base.size);
--
--		BUG_ON((offset & I915_GTT_RESERVED) != 0);
--		offset &= ~I915_GTT_RESERVED;
--		obj->gtt_space = kzalloc(sizeof(*obj->gtt_space), GFP_KERNEL);
--		if (!obj->gtt_space) {
--			DRM_ERROR("Failed to preserve object at offset %lx\n",
--				  offset);
--			continue;
--		}
--		obj->gtt_space->start = (unsigned long)offset;
--		obj->gtt_space->size = obj->base.size;
-+			      i915_gem_obj_ggtt_offset(obj), obj->base.size);
-+
-+		WARN_ON(i915_gem_obj_ggtt_bound(obj));
- 		ret = drm_mm_reserve_node(&dev_priv->mm.gtt_space,
--					  obj->gtt_space);
--		if (ret) {
-+					  &obj->gtt_space);
-+		if (ret)
- 			DRM_DEBUG_KMS("Reservation failed\n");
--			kfree(obj->gtt_space);
--			obj->gtt_space = NULL;
--		}
- 		obj->has_global_gtt_mapping = 1;
- 	}
- 
-diff --git a/drivers/gpu/drm/i915/i915_gem_stolen.c b/drivers/gpu/drm/i915/i915_gem_stolen.c
-index ee3d619ac2a3..bbe4391f904f 100644
---- a/drivers/gpu/drm/i915/i915_gem_stolen.c
-+++ b/drivers/gpu/drm/i915/i915_gem_stolen.c
-@@ -377,26 +377,15 @@ i915_gem_object_create_stolen_for_preallocated(struct drm_device *dev,
- 	 * setting up the GTT space. The actual reservation will occur
- 	 * later.
- 	 */
-+	obj->gtt_space.start = gtt_offset;
-+	obj->gtt_space.size = size;
- 	if (drm_mm_initialized(&dev_priv->mm.gtt_space)) {
--		obj->gtt_space = kzalloc(sizeof(*obj->gtt_space), GFP_KERNEL);
--		if (!obj->gtt_space) {
--			DRM_DEBUG_KMS("-ENOMEM stolen GTT space\n");
--			goto unref_out;
--		}
--
--		obj->gtt_space->start = gtt_offset;
--		obj->gtt_space->size = size;
- 		ret = drm_mm_reserve_node(&dev_priv->mm.gtt_space,
--					  obj->gtt_space);
-+					  &obj->gtt_space);
- 		if (ret) {
- 			DRM_DEBUG_KMS("failed to allocate stolen GTT space\n");
--			goto free_out;
-+			goto unref_out;
- 		}
--	} else {
--		if (WARN_ON(gtt_offset & ~PAGE_MASK))
--			DRM_DEBUG_KMS("Cannot preserve non page aligned offset\n");
--		obj->gtt_space =
--			(struct drm_mm_node *)((uintptr_t)(I915_GTT_RESERVED | gtt_offset));
- 	}
- 
- 	obj->has_global_gtt_mapping = 1;
-@@ -406,9 +395,6 @@ i915_gem_object_create_stolen_for_preallocated(struct drm_device *dev,
- 
- 	return obj;
- 
--free_out:
--	kfree(obj->gtt_space);
--	obj->gtt_space = NULL;
- unref_out:
- 	drm_gem_object_unreference(&obj->base);
- 	return NULL;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0434-drm-i915-fix-dvo-DPLL-regression.patch b/patches.baytrail/0434-drm-i915-fix-dvo-DPLL-regression.patch
deleted file mode 100644
index b76bfce664b98..0000000000000
--- a/patches.baytrail/0434-drm-i915-fix-dvo-DPLL-regression.patch
+++ /dev/null
@@ -1,118 +0,0 @@
-From 1d9af76730003a1defef3b2386964c90c80c3297 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Sat, 6 Jul 2013 12:52:05 +0200
-Subject: drm/i915: fix dvo DPLL regression
-
-I've missed that intel_dvo_mode_set changes the dpll configuration.
-Hence when I've reworked the sequence to only enable the dpll in the
-crtc_enable callback in
-
-commit 66e3d5c09940d08d94b03e65b420fadaa7484318
-Author: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date:   Sun Jun 16 21:24:16 2013 +0200
-
-    drm/i915: move i9xx dpll enabling into crtc enable function
-
-that special DVO bit was lost. Some BSpec reading confirms that it's
-only needed for DVO encoders. Section 1.5.4, "DPLL A Control Register"
-for bit 30:
-
-"2X Clock Enable. When driving In non-gang DVO modes such as a
-connected flat panel or TV, a 2X" version of the clock is needed. When
-not using the 2X output it should be disabled. This bit cannot be set
-when driving the integrated LVDS port on devices such as Montara-GM."
-
-Fix this regression up.
-
-Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=66516
-Cc: Chris Wilson <chris@chris-wilson.co.uk>
-Reported-by: Chris Wilson <chris@chris-wilson.co.uk>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Partially-tested-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 4a33e48d0e121953342194b45d33dc752353d62b)
-(cherry picked from drm-intel-next-queued)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_reg.h      |  3 ++-
- drivers/gpu/drm/i915/intel_display.c | 11 +++++++----
- drivers/gpu/drm/i915/intel_dvo.c     |  3 ---
- 3 files changed, 9 insertions(+), 8 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
-index d8278254bca3..0f604881a3b4 100644
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -1128,7 +1128,8 @@
- #define _DPLL_B	(dev_priv->info->display_mmio_offset + 0x6018)
- #define DPLL(pipe) _PIPE(pipe, _DPLL_A, _DPLL_B)
- #define   DPLL_VCO_ENABLE		(1 << 31)
--#define   DPLL_DVO_HIGH_SPEED		(1 << 30)
-+#define   DPLL_SDVO_HIGH_SPEED		(1 << 30)
-+#define   DPLL_DVO_2X_MODE		(1 << 30)
- #define   DPLL_EXT_BUFFER_ENABLE_VLV	(1 << 30)
- #define   DPLL_SYNCLOCK_ENABLE		(1 << 29)
- #define   DPLL_REFA_CLK_ENABLE_VLV	(1 << 29)
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 3886db95a688..9be6594e7f06 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -4540,10 +4540,10 @@ static void i9xx_update_pll(struct intel_crtc *crtc,
- 	}
- 
- 	if (is_sdvo)
--		dpll |= DPLL_DVO_HIGH_SPEED;
-+		dpll |= DPLL_SDVO_HIGH_SPEED;
- 
- 	if (intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_DISPLAYPORT))
--		dpll |= DPLL_DVO_HIGH_SPEED;
-+		dpll |= DPLL_SDVO_HIGH_SPEED;
- 
- 	/* compute bitmask from p1 value */
- 	if (IS_PINEVIEW(dev))
-@@ -4615,6 +4615,9 @@ static void i8xx_update_pll(struct intel_crtc *crtc,
- 			dpll |= PLL_P2_DIVIDE_BY_4;
- 	}
- 
-+	if (intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_DVO))
-+		dpll |= DPLL_DVO_2X_MODE;
-+
- 	if (intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_LVDS) &&
- 		 intel_panel_use_ssc(dev_priv) && num_connectors < 2)
- 		dpll |= PLLB_REF_INPUT_SPREADSPECTRUMIN;
-@@ -5647,9 +5650,9 @@ static uint32_t ironlake_compute_dpll(struct intel_crtc *intel_crtc,
- 		<< PLL_REF_SDVO_HDMI_MULTIPLIER_SHIFT;
- 
- 	if (is_sdvo)
--		dpll |= DPLL_DVO_HIGH_SPEED;
-+		dpll |= DPLL_SDVO_HIGH_SPEED;
- 	if (intel_crtc->config.has_dp_encoder)
--		dpll |= DPLL_DVO_HIGH_SPEED;
-+		dpll |= DPLL_SDVO_HIGH_SPEED;
- 
- 	/* compute bitmask from p1 value */
- 	dpll |= (1 << (intel_crtc->config.dpll.p1 - 1)) << DPLL_FPA01_P1_POST_DIV_SHIFT;
-diff --git a/drivers/gpu/drm/i915/intel_dvo.c b/drivers/gpu/drm/i915/intel_dvo.c
-index eb2020eb2b7e..cbbc49dc03be 100644
---- a/drivers/gpu/drm/i915/intel_dvo.c
-+++ b/drivers/gpu/drm/i915/intel_dvo.c
-@@ -283,7 +283,6 @@ static void intel_dvo_mode_set(struct drm_encoder *encoder,
- 	int pipe = intel_crtc->pipe;
- 	u32 dvo_val;
- 	u32 dvo_reg = intel_dvo->dev.dvo_reg, dvo_srcdim_reg;
--	int dpll_reg = DPLL(pipe);
- 
- 	switch (dvo_reg) {
- 	case DVOA:
-@@ -314,8 +313,6 @@ static void intel_dvo_mode_set(struct drm_encoder *encoder,
- 	if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
- 		dvo_val |= DVO_VSYNC_ACTIVE_HIGH;
- 
--	I915_WRITE(dpll_reg, I915_READ(dpll_reg) | DPLL_DVO_HIGH_SPEED);
--
- 	/*I915_WRITE(DVOB_SRCDIM,
- 	  (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
- 	  (adjusted_mode->VDisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0435-drm-i915-dvo-needs-a-P2-divisor-of-4.patch b/patches.baytrail/0435-drm-i915-dvo-needs-a-P2-divisor-of-4.patch
deleted file mode 100644
index 088a4e5615020..0000000000000
--- a/patches.baytrail/0435-drm-i915-dvo-needs-a-P2-divisor-of-4.patch
+++ /dev/null
@@ -1,70 +0,0 @@
-From 4c47f5e1da55a659db8511ef3b2a34080b031b16 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Sat, 6 Jul 2013 12:52:06 +0200
-Subject: drm/i915: dvo needs a P2 divisor of 4
-
-Section 1.5.4, "DPLL A Control Register" from Bspec about bit 23
-"FPA0/A1 P2 Clock Divide":
-
-0 = Divide by 2
-1 = Divide by 4. This bit must be set in DVO non-gang mode
-
-So copy the current limits (which should be good for i8xx) and create
-a new set for dvo encoders.
-
-Reviewed-by: Chris Wilson <chris@chris-wilson.oc.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 5d536e2858ead64ea945552ec6a491f968c55888)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 19 +++++++++++++++++--
- 1 file changed, 17 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 9be6594e7f06..15f72adde61d 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -89,7 +89,7 @@ intel_fdi_link_freq(struct drm_device *dev)
- 		return 27;
- }
- 
--static const intel_limit_t intel_limits_i8xx_dvo = {
-+static const intel_limit_t intel_limits_i8xx_dac = {
- 	.dot = { .min = 25000, .max = 350000 },
- 	.vco = { .min = 930000, .max = 1400000 },
- 	.n = { .min = 3, .max = 16 },
-@@ -102,6 +102,19 @@ static const intel_limit_t intel_limits_i8xx_dvo = {
- 		.p2_slow = 4, .p2_fast = 2 },
- };
- 
-+static const intel_limit_t intel_limits_i8xx_dvo = {
-+	.dot = { .min = 25000, .max = 350000 },
-+	.vco = { .min = 930000, .max = 1400000 },
-+	.n = { .min = 3, .max = 16 },
-+	.m = { .min = 96, .max = 140 },
-+	.m1 = { .min = 18, .max = 26 },
-+	.m2 = { .min = 6, .max = 16 },
-+	.p = { .min = 4, .max = 128 },
-+	.p1 = { .min = 2, .max = 33 },
-+	.p2 = { .dot_limit = 165000,
-+		.p2_slow = 4, .p2_fast = 4 },
-+};
-+
- static const intel_limit_t intel_limits_i8xx_lvds = {
- 	.dot = { .min = 25000, .max = 350000 },
- 	.vco = { .min = 930000, .max = 1400000 },
-@@ -410,8 +423,10 @@ static const intel_limit_t *intel_limit(struct drm_crtc *crtc, int refclk)
- 	} else {
- 		if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS))
- 			limit = &intel_limits_i8xx_lvds;
--		else
-+		else if (intel_pipe_has_type(crtc, INTEL_OUTPUT_DVO))
- 			limit = &intel_limits_i8xx_dvo;
-+		else
-+			limit = &intel_limits_i8xx_dac;
- 	}
- 	return limit;
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0436-drm-i915-convert-debugfs-creation-destruction-to-tab.patch b/patches.baytrail/0436-drm-i915-convert-debugfs-creation-destruction-to-tab.patch
deleted file mode 100644
index e0444f29f1e17..0000000000000
--- a/patches.baytrail/0436-drm-i915-convert-debugfs-creation-destruction-to-tab.patch
+++ /dev/null
@@ -1,146 +0,0 @@
-From 84533bd99dfd6e65ad34703c2f2bf9c906821ffb Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 4 Jul 2013 20:49:44 +0200
-Subject: drm/i915: convert debugfs creation/destruction to table
-
-At least for the common cases where we only need special file
-operations. The forcewake file is still rather more special.
-
-v2: Fix up the debugfs unregister code.
-
-v3: Actually squash in the right fixup.
-
-Acked-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 34b9674c786c73e5472e8b98a729bcdde9197859)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_debugfs.c | 94 ++++++++++++-------------------------
- 1 file changed, 30 insertions(+), 64 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
-index 396387ed207a..d4138124d993 100644
---- a/drivers/gpu/drm/i915/i915_debugfs.c
-+++ b/drivers/gpu/drm/i915/i915_debugfs.c
-@@ -2375,61 +2375,35 @@ static struct drm_info_list i915_debugfs_list[] = {
- };
- #define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
- 
-+struct i915_debugfs_files {
-+	const char *name;
-+	const struct file_operations *fops;
-+} i915_debugfs_files[] = {
-+	{"i915_wedged", &i915_wedged_fops},
-+	{"i915_max_freq", &i915_max_freq_fops},
-+	{"i915_min_freq", &i915_min_freq_fops},
-+	{"i915_cache_sharing", &i915_cache_sharing_fops},
-+	{"i915_ring_stop", &i915_ring_stop_fops},
-+	{"i915_gem_drop_caches", &i915_drop_caches_fops},
-+	{"i915_error_state", &i915_error_state_fops},
-+	{"i915_next_seqno", &i915_next_seqno_fops},
-+};
-+
- int i915_debugfs_init(struct drm_minor *minor)
- {
--	int ret;
--
--	ret = i915_debugfs_create(minor->debugfs_root, minor,
--				  "i915_wedged",
--				  &i915_wedged_fops);
--	if (ret)
--		return ret;
-+	int ret, i;
- 
- 	ret = i915_forcewake_create(minor->debugfs_root, minor);
- 	if (ret)
- 		return ret;
- 
--	ret = i915_debugfs_create(minor->debugfs_root, minor,
--				  "i915_max_freq",
--				  &i915_max_freq_fops);
--	if (ret)
--		return ret;
--
--	ret = i915_debugfs_create(minor->debugfs_root, minor,
--				  "i915_min_freq",
--				  &i915_min_freq_fops);
--	if (ret)
--		return ret;
--
--	ret = i915_debugfs_create(minor->debugfs_root, minor,
--				  "i915_cache_sharing",
--				  &i915_cache_sharing_fops);
--	if (ret)
--		return ret;
--
--	ret = i915_debugfs_create(minor->debugfs_root, minor,
--				  "i915_ring_stop",
--				  &i915_ring_stop_fops);
--	if (ret)
--		return ret;
--
--	ret = i915_debugfs_create(minor->debugfs_root, minor,
--				  "i915_gem_drop_caches",
--				  &i915_drop_caches_fops);
--	if (ret)
--		return ret;
--
--	ret = i915_debugfs_create(minor->debugfs_root, minor,
--				  "i915_error_state",
--				  &i915_error_state_fops);
--	if (ret)
--		return ret;
--
--	ret = i915_debugfs_create(minor->debugfs_root, minor,
--				 "i915_next_seqno",
--				 &i915_next_seqno_fops);
--	if (ret)
--		return ret;
-+	for (i = 0; i < ARRAY_SIZE(i915_debugfs_files); i++) {
-+		ret = i915_debugfs_create(minor->debugfs_root, minor,
-+					  i915_debugfs_files[i].name,
-+					  i915_debugfs_files[i].fops);
-+		if (ret)
-+			return ret;
-+	}
- 
- 	return drm_debugfs_create_files(i915_debugfs_list,
- 					I915_DEBUGFS_ENTRIES,
-@@ -2438,26 +2412,18 @@ int i915_debugfs_init(struct drm_minor *minor)
- 
- void i915_debugfs_cleanup(struct drm_minor *minor)
- {
-+	int i;
-+
- 	drm_debugfs_remove_files(i915_debugfs_list,
- 				 I915_DEBUGFS_ENTRIES, minor);
- 	drm_debugfs_remove_files((struct drm_info_list *) &i915_forcewake_fops,
- 				 1, minor);
--	drm_debugfs_remove_files((struct drm_info_list *) &i915_wedged_fops,
--				 1, minor);
--	drm_debugfs_remove_files((struct drm_info_list *) &i915_max_freq_fops,
--				 1, minor);
--	drm_debugfs_remove_files((struct drm_info_list *) &i915_min_freq_fops,
--				 1, minor);
--	drm_debugfs_remove_files((struct drm_info_list *) &i915_cache_sharing_fops,
--				 1, minor);
--	drm_debugfs_remove_files((struct drm_info_list *) &i915_drop_caches_fops,
--				 1, minor);
--	drm_debugfs_remove_files((struct drm_info_list *) &i915_ring_stop_fops,
--				 1, minor);
--	drm_debugfs_remove_files((struct drm_info_list *) &i915_error_state_fops,
--				 1, minor);
--	drm_debugfs_remove_files((struct drm_info_list *) &i915_next_seqno_fops,
--				 1, minor);
-+	for (i = 0; i < ARRAY_SIZE(i915_debugfs_files); i++) {
-+		struct drm_info_list *info_list =
-+			(struct drm_info_list *) i915_debugfs_files[i].fops;
-+
-+		drm_debugfs_remove_files(info_list, 1, minor);
-+	}
- }
- 
- #endif /* CONFIG_DEBUG_FS */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0437-drm-i915-Verify-that-our-stolen-memory-doesn-t-confl.patch b/patches.baytrail/0437-drm-i915-Verify-that-our-stolen-memory-doesn-t-confl.patch
deleted file mode 100644
index c3634ed090912..0000000000000
--- a/patches.baytrail/0437-drm-i915-Verify-that-our-stolen-memory-doesn-t-confl.patch
+++ /dev/null
@@ -1,62 +0,0 @@
-From de3d30956679caeeb67be4f5891883fb20819c7c Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Thu, 4 Jul 2013 12:28:35 +0100
-Subject: drm/i915: Verify that our stolen memory doesn't conflict
-
-Sanity check that the memory region found through the Graphics Base
-of Stolen Memory is reserved and hidden from the rest of the system
-through the use of the resource API.
-
-v2: "Graphics Stolen Memory" is such a more bodacious name than the lame
-    "i915 stolen", and convert to using devres for automagical cleanup of
-    the resource. (danvet)
-
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
-[danvet: Dump proper hexcodes.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit eaba1b8f3379b5d100bd146b9a41d28348bdfd09)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem_stolen.c | 17 +++++++++++++++++
- 1 file changed, 17 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem_stolen.c b/drivers/gpu/drm/i915/i915_gem_stolen.c
-index bbe4391f904f..24cae1c17e5a 100644
---- a/drivers/gpu/drm/i915/i915_gem_stolen.c
-+++ b/drivers/gpu/drm/i915/i915_gem_stolen.c
-@@ -46,6 +46,7 @@ static unsigned long i915_stolen_to_physical(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct pci_dev *pdev = dev_priv->bridge_dev;
-+	struct resource *r;
- 	u32 base;
- 
- 	/* On the machines I have tested the Graphics Base of Stolen Memory
-@@ -88,6 +89,22 @@ static unsigned long i915_stolen_to_physical(struct drm_device *dev)
- #endif
- 	}
- 
-+	if (base == 0)
-+		return 0;
-+
-+	/* Verify that nothing else uses this physical address. Stolen
-+	 * memory should be reserved by the BIOS and hidden from the
-+	 * kernel. So if the region is already marked as busy, something
-+	 * is seriously wrong.
-+	 */
-+	r = devm_request_mem_region(dev->dev, base, dev_priv->gtt.stolen_size,
-+				    "Graphics Stolen Memory");
-+	if (r == NULL) {
-+		DRM_ERROR("conflict detected with stolen region: [0x%08x - 0x%08x]\n",
-+			  base, base + (uint32_t)dev_priv->gtt.stolen_size);
-+		base = 0;
-+	}
-+
- 	return base;
- }
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0438-drm-i915-clean-up-media-reset-on-gm45.patch b/patches.baytrail/0438-drm-i915-clean-up-media-reset-on-gm45.patch
deleted file mode 100644
index a748033be5e22..0000000000000
--- a/patches.baytrail/0438-drm-i915-clean-up-media-reset-on-gm45.patch
+++ /dev/null
@@ -1,77 +0,0 @@
-From 673c7631ef372793cd0bd8718caea4eaccd6dc6a Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Tue, 9 Jul 2013 14:44:26 +0200
-Subject: drm/i915: clean up media reset on gm45
-
-Originally I've thought that this fixes up the reset issues on my
-gm45, but that was just a red herring due to b0rked testing.
-
-Still I much prefer writing the right values (all other fields are
-reserved) instead of potentially dragging gunk around. Hence also
-clear the register to 0 after a reset.
-
-Note that Cspec is a bit confused and doesn't explicitly say that all
-the other bits in this register are "reserved, mbz" like usually.
-Instead they're marked as "r/o, default value = 0" which semantically
-amounts to the same thing.
-
-v2: Stop claiming this fixes anything and return 0 if successful
-instead of stack garbage.
-
-v3: Pimp the commit message to explain exactly why I think the docs
-allow us to ditch the rmw cycle, spurred by a discussion with Chris.
-
-Cc: Chris Wilson <chris@chris-wilson.co.uk>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 36c0cc616e518bfc2b685bed7fb3243d1242eca4)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.c | 17 +++++++++--------
- 1 file changed, 9 insertions(+), 8 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
-index d286785c1bab..95fe9c2a1449 100644
---- a/drivers/gpu/drm/i915/i915_drv.c
-+++ b/drivers/gpu/drm/i915/i915_drv.c
-@@ -798,28 +798,29 @@ static int i965_reset_complete(struct drm_device *dev)
- static int i965_do_reset(struct drm_device *dev)
- {
- 	int ret;
--	u8 gdrst;
- 
- 	/*
- 	 * Set the domains we want to reset (GRDOM/bits 2 and 3) as
- 	 * well as the reset bit (GR/bit 0).  Setting the GR bit
- 	 * triggers the reset; when done, the hardware will clear it.
- 	 */
--	pci_read_config_byte(dev->pdev, I965_GDRST, &gdrst);
- 	pci_write_config_byte(dev->pdev, I965_GDRST,
--			      gdrst | GRDOM_RENDER |
--			      GRDOM_RESET_ENABLE);
-+			      GRDOM_RENDER | GRDOM_RESET_ENABLE);
- 	ret =  wait_for(i965_reset_complete(dev), 500);
- 	if (ret)
- 		return ret;
- 
- 	/* We can't reset render&media without also resetting display ... */
--	pci_read_config_byte(dev->pdev, I965_GDRST, &gdrst);
- 	pci_write_config_byte(dev->pdev, I965_GDRST,
--			      gdrst | GRDOM_MEDIA |
--			      GRDOM_RESET_ENABLE);
-+			      GRDOM_MEDIA | GRDOM_RESET_ENABLE);
- 
--	return wait_for(i965_reset_complete(dev), 500);
-+	ret =  wait_for(i965_reset_complete(dev), 500);
-+	if (ret)
-+		return ret;
-+
-+	pci_write_config_byte(dev->pdev, I965_GDRST, 0);
-+
-+	return 0;
- }
- 
- static int ironlake_do_reset(struct drm_device *dev)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0439-drm-i915-WARN-if-the-bios-reserved-range-is-bigger-t.patch b/patches.baytrail/0439-drm-i915-WARN-if-the-bios-reserved-range-is-bigger-t.patch
deleted file mode 100644
index e3b68055e2e84..0000000000000
--- a/patches.baytrail/0439-drm-i915-WARN-if-the-bios-reserved-range-is-bigger-t.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From 327cf4f35a050d41ea17900d3b74956e5e2bd8b8 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Tue, 9 Jul 2013 14:44:27 +0200
-Subject: drm/i915: WARN if the bios reserved range is bigger than stolen size
-
-v2: Bail out if we hit the WARN_ON to avoid fallout later on. Spotted
-by Chris Wilson.
-
-Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
-Cc: Chris Wilson <chris@chris-wilson.co.uk>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 897f9ed00a906dd3edc69f64d590bba87c45617b)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem_stolen.c | 3 +++
- 1 file changed, 3 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem_stolen.c b/drivers/gpu/drm/i915/i915_gem_stolen.c
-index 24cae1c17e5a..5c1a535d5072 100644
---- a/drivers/gpu/drm/i915/i915_gem_stolen.c
-+++ b/drivers/gpu/drm/i915/i915_gem_stolen.c
-@@ -218,6 +218,9 @@ int i915_gem_init_stolen(struct drm_device *dev)
- 	if (IS_VALLEYVIEW(dev))
- 		bios_reserved = 1024*1024; /* top 1M on VLV/BYT */
- 
-+	if (WARN_ON(bios_reserved > dev_priv->gtt.stolen_size))
-+		return 0;
-+
- 	/* Basic memrange allocator for stolen space */
- 	drm_mm_init(&dev_priv->mm.stolen, 0, dev_priv->gtt.stolen_size -
- 		    bios_reserved);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0440-drm-i915-Fix-VLV-DP-RBR-HDMI-DAC-PLL-LPF-coefficient.patch b/patches.baytrail/0440-drm-i915-Fix-VLV-DP-RBR-HDMI-DAC-PLL-LPF-coefficient.patch
deleted file mode 100644
index ea994e0b64a60..0000000000000
--- a/patches.baytrail/0440-drm-i915-Fix-VLV-DP-RBR-HDMI-DAC-PLL-LPF-coefficient.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-From bd1283dde3e950c3403364ee2f32cb68a30280a1 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Fri, 5 Jul 2013 19:21:38 +0300
-Subject: drm/i915: Fix VLV DP RBR/HDMI/DAC PLL LPF coefficients
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-I just got confirmation that we're using some old values for the PLL
-LPF coefficients for DP RBR/HDMI/DAC on VLV. The
-VLV2A0_DP_eDP_HDMI_DPIO_driver_vbios_notes_9 document lists both values
-by mistake, and apparently we had picked the wrong one. Change the
-coefficients to the recommended values.
-
-Changing the value doesn't appear to destabilize the VGA output picture
-even with my sensitive HP ZR24w display. Also HDMI output to my TV still
-works fine.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 885b012008583ba70e5537d479454450f5bdfa09)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 15f72adde61d..7ab60c74dff4 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -4461,7 +4461,7 @@ static void vlv_update_pll(struct intel_crtc *crtc)
- 	    intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_ANALOG) ||
- 	    intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_HDMI))
- 		vlv_dpio_write(dev_priv, DPIO_LPF_COEFF(pipe),
--				 0x005f0021);
-+				 0x009f0003);
- 	else
- 		vlv_dpio_write(dev_priv, DPIO_LPF_COEFF(pipe),
- 				 0x00d0000f);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0441-drm-i915-don-t-frob-mm.suspended-when-not-using-ums.patch b/patches.baytrail/0441-drm-i915-don-t-frob-mm.suspended-when-not-using-ums.patch
deleted file mode 100644
index c68f21daa83ea..0000000000000
--- a/patches.baytrail/0441-drm-i915-don-t-frob-mm.suspended-when-not-using-ums.patch
+++ /dev/null
@@ -1,302 +0,0 @@
-From 4370ef17e5269a02647a350abbdcb6ae171a41b7 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Tue, 9 Jul 2013 16:51:37 +0200
-Subject: drm/i915: don't frob mm.suspended when not using ums
-
-In kernel modeset driver mode we're in full control of the chip,
-always. So there's no need at all to set mm.suspended in
-i915_gem_idle. Hence move that out into the leavevt ioctl. Since
-i915_gem_idle doesn't suspend gem any more we can also drop the
-re-enabling for KMS in the thaw function.
-
-Also clean up the handling of mm.suspend at driver load by coalescing
-all the assignments.
-
-Stumbled over while reading through our resume code for unrelated
-reasons.
-
-v2: Shovel mm.suspended into the (newly created) ums dungeon as
-suggested by Chris Wilson. The plan is that once we've completely
-stopped relying on the register save/restore code we could shovel even
-that in there.
-
-v3: Improve the locking for the entervt/leavevt ioctls a bit by moving
-the dev->struct_mutex locking outside of i915_gem_idle. Also don't
-clear dev_priv->ums.mm_suspended for the kms case, we allocate it with
-kzalloc. Both suggested by Chris Wilson.
-
-Cc: Chris Wilson <chris@chris-wilson.co.uk>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> (v2)
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit db1b76ca6a79c774074ae87bee7afc0825a478f5)
-Signed-off-by: James Ausmus <james.ausmus@intel.com>
-
-Conflicts:
-	drivers/gpu/drm/i915/i915_gem.c
-	(used airlied's rerere from
-	e13af9a8340685cfe25d0c9f708da7121e0f51dd)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_dma.c            |   13 ++-------
- drivers/gpu/drm/i915/i915_drv.c            |   11 +++++--
- drivers/gpu/drm/i915/i915_drv.h            |   24 ++++++++++-------
- drivers/gpu/drm/i915/i915_gem.c            |   40 +++++++++++++++++------------
- drivers/gpu/drm/i915/i915_gem_execbuffer.c |    2 -
- 5 files changed, 50 insertions(+), 40 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_dma.c
-+++ b/drivers/gpu/drm/i915/i915_dma.c
-@@ -1331,10 +1331,8 @@ static int i915_load_modeset_init(struct
- 	/* Always safe in the mode setting case. */
- 	/* FIXME: do pre/post-mode set stuff in core KMS code */
- 	dev->vblank_disable_allowed = 1;
--	if (INTEL_INFO(dev)->num_pipes == 0) {
--		dev_priv->mm.suspended = 0;
-+	if (INTEL_INFO(dev)->num_pipes == 0)
- 		return 0;
--	}
- 
- 	ret = intel_fbdev_init(dev);
- 	if (ret)
-@@ -1360,9 +1358,6 @@ static int i915_load_modeset_init(struct
- 
- 	drm_kms_helper_poll_init(dev);
- 
--	/* We're off and running w/KMS */
--	dev_priv->mm.suspended = 0;
--
- 	return 0;
- 
- cleanup_gem:
-@@ -1639,9 +1634,6 @@ int i915_driver_load(struct drm_device *
- 			goto out_gem_unload;
- 	}
- 
--	/* Start out suspended */
--	dev_priv->mm.suspended = 1;
--
- 	if (HAS_POWER_WELL(dev))
- 		i915_init_power_well(dev);
- 
-@@ -1651,6 +1643,9 @@ int i915_driver_load(struct drm_device *
- 			DRM_ERROR("failed to init modeset\n");
- 			goto out_gem_unload;
- 		}
-+	} else {
-+		/* Start out suspended in ums mode. */
-+		dev_priv->ums.mm_suspended = 1;
- 	}
- 
- 	i915_setup_sysfs(dev);
---- a/drivers/gpu/drm/i915/i915_drv.c
-+++ b/drivers/gpu/drm/i915/i915_drv.c
-@@ -556,7 +556,11 @@ static int i915_drm_freeze(struct drm_de
- 
- 	/* If KMS is active, we do the leavevt stuff here */
- 	if (drm_core_check_feature(dev, DRIVER_MODESET)) {
--		int error = i915_gem_idle(dev);
-+		int error;
-+
-+		mutex_lock(&dev->struct_mutex);
-+		error = i915_gem_idle(dev);
-+		mutex_unlock(&dev->struct_mutex);
- 		if (error) {
- 			dev_err(&dev->pdev->dev,
- 				"GEM idle failed, resume might fail\n");
-@@ -661,7 +665,6 @@ static int __i915_drm_thaw(struct drm_de
- 		intel_init_pch_refclk(dev);
- 
- 		mutex_lock(&dev->struct_mutex);
--		dev_priv->mm.suspended = 0;
- 
- 		error = i915_gem_init_hw(dev);
- 		mutex_unlock(&dev->struct_mutex);
-@@ -961,11 +964,11 @@ int i915_reset(struct drm_device *dev)
- 	 * switched away).
- 	 */
- 	if (drm_core_check_feature(dev, DRIVER_MODESET) ||
--			!dev_priv->mm.suspended) {
-+			!dev_priv->ums.mm_suspended) {
- 		struct intel_ring_buffer *ring;
- 		int i;
- 
--		dev_priv->mm.suspended = 0;
-+		dev_priv->ums.mm_suspended = 0;
- 
- 		i915_gem_init_swizzling(dev);
- 
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -815,6 +815,18 @@ struct i915_dri1_state {
- 	uint32_t counter;
- };
- 
-+struct i915_ums_state {
-+	/**
-+	 * Flag if the X Server, and thus DRM, is not currently in
-+	 * control of the device.
-+	 *
-+	 * This is set between LeaveVT and EnterVT.  It needs to be
-+	 * replaced with a semaphore.  It also needs to be
-+	 * transitioned away from for kernel modesetting.
-+	 */
-+	int mm_suspended;
-+};
-+
- struct intel_l3_parity {
- 	u32 *remap_info;
- 	struct work_struct error_work;
-@@ -885,16 +897,6 @@ struct i915_gem_mm {
- 	 */
- 	bool interruptible;
- 
--	/**
--	 * Flag if the X Server, and thus DRM, is not currently in
--	 * control of the device.
--	 *
--	 * This is set between LeaveVT and EnterVT.  It needs to be
--	 * replaced with a semaphore.  It also needs to be
--	 * transitioned away from for kernel modesetting.
--	 */
--	int suspended;
--
- 	/** Bit 6 swizzling required for X tiling */
- 	uint32_t bit_6_swizzle_x;
- 	/** Bit 6 swizzling required for Y tiling */
-@@ -1188,6 +1190,8 @@ typedef struct drm_i915_private {
- 	/* Old dri1 support infrastructure, beware the dragons ya fools entering
- 	 * here! */
- 	struct i915_dri1_state dri1;
-+	/* Old ums support infrastructure, same warning applies. */
-+	struct i915_ums_state ums;
- } drm_i915_private_t;
- 
- /* Iterate over initialised rings */
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -2086,7 +2086,7 @@ int __i915_add_request(struct intel_ring
- 	trace_i915_gem_request_add(ring, request->seqno);
- 	ring->outstanding_lazy_request = 0;
- 
--	if (!dev_priv->mm.suspended) {
-+	if (!dev_priv->ums.mm_suspended) {
- 		if (i915_enable_hangcheck) {
- 			mod_timer(&dev_priv->gpu_error.hangcheck_timer,
- 				  round_jiffies_up(jiffies + DRM_I915_HANGCHECK_JIFFIES));
-@@ -2401,7 +2401,7 @@ i915_gem_retire_work_handler(struct work
- 		idle &= list_empty(&ring->request_list);
- 	}
- 
--	if (!dev_priv->mm.suspended && !idle)
-+	if (!dev_priv->ums.mm_suspended && !idle)
- 		queue_delayed_work(dev_priv->wq, &dev_priv->mm.retire_work,
- 				   round_jiffies_up_relative(HZ));
- 	if (idle)
-@@ -3978,9 +3978,7 @@ i915_gem_idle(struct drm_device *dev)
- 	drm_i915_private_t *dev_priv = dev->dev_private;
- 	int ret;
- 
--	mutex_lock(&dev->struct_mutex);
--
--	if (dev_priv->mm.suspended) {
-+	if (dev_priv->ums.mm_suspended) {
- 		mutex_unlock(&dev->struct_mutex);
- 		return 0;
- 	}
-@@ -3996,18 +3994,11 @@ i915_gem_idle(struct drm_device *dev)
- 	if (!drm_core_check_feature(dev, DRIVER_MODESET))
- 		i915_gem_evict_everything(dev);
- 
--	/* Hack!  Don't let anybody do execbuf while we don't control the chip.
--	 * We need to replace this with a semaphore, or something.
--	 * And not confound mm.suspended!
--	 */
--	dev_priv->mm.suspended = 1;
- 	del_timer_sync(&dev_priv->gpu_error.hangcheck_timer);
- 
- 	i915_kernel_lost_context(dev);
- 	i915_gem_cleanup_ringbuffer(dev);
- 
--	mutex_unlock(&dev->struct_mutex);
--
- 	/* Cancel the retire work handler, which should be idle now. */
- 	cancel_delayed_work_sync(&dev_priv->mm.retire_work);
- 
-@@ -4217,7 +4208,7 @@ int
- i915_gem_entervt_ioctl(struct drm_device *dev, void *data,
- 		       struct drm_file *file_priv)
- {
--	drm_i915_private_t *dev_priv = dev->dev_private;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
- 	int ret;
- 
- 	if (drm_core_check_feature(dev, DRIVER_MODESET))
-@@ -4229,7 +4220,7 @@ i915_gem_entervt_ioctl(struct drm_device
- 	}
- 
- 	mutex_lock(&dev->struct_mutex);
--	dev_priv->mm.suspended = 0;
-+	dev_priv->ums.mm_suspended = 0;
- 
- 	ret = i915_gem_init_hw(dev);
- 	if (ret != 0) {
-@@ -4249,7 +4240,7 @@ i915_gem_entervt_ioctl(struct drm_device
- cleanup_ringbuffer:
- 	mutex_lock(&dev->struct_mutex);
- 	i915_gem_cleanup_ringbuffer(dev);
--	dev_priv->mm.suspended = 1;
-+	dev_priv->ums.mm_suspended = 1;
- 	mutex_unlock(&dev->struct_mutex);
- 
- 	return ret;
-@@ -4259,11 +4250,26 @@ int
- i915_gem_leavevt_ioctl(struct drm_device *dev, void *data,
- 		       struct drm_file *file_priv)
- {
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	int ret;
-+
- 	if (drm_core_check_feature(dev, DRIVER_MODESET))
- 		return 0;
- 
- 	drm_irq_uninstall(dev);
--	return i915_gem_idle(dev);
-+
-+	mutex_lock(&dev->struct_mutex);
-+	ret =  i915_gem_idle(dev);
-+
-+	/* Hack!  Don't let anybody do execbuf while we don't control the chip.
-+	 * We need to replace this with a semaphore, or something.
-+	 * And not confound ums.mm_suspended!
-+	 */
-+	if (ret != 0)
-+		dev_priv->ums.mm_suspended = 1;
-+	mutex_unlock(&dev->struct_mutex);
-+
-+	return ret;
- }
- 
- void
-@@ -4274,9 +4280,11 @@ i915_gem_lastclose(struct drm_device *de
- 	if (drm_core_check_feature(dev, DRIVER_MODESET))
- 		return;
- 
-+	mutex_lock(&dev->struct_mutex);
- 	ret = i915_gem_idle(dev);
- 	if (ret)
- 		DRM_ERROR("failed to idle hardware: %d\n", ret);
-+	mutex_unlock(&dev->struct_mutex);
- }
- 
- static void
---- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-@@ -973,7 +973,7 @@ i915_gem_do_execbuffer(struct drm_device
- 	if (ret)
- 		goto pre_mutex_err;
- 
--	if (dev_priv->mm.suspended) {
-+	if (dev_priv->ums.mm_suspended) {
- 		mutex_unlock(&dev->struct_mutex);
- 		ret = -EBUSY;
- 		goto pre_mutex_err;
diff --git a/patches.baytrail/0442-drm-i915-remove-unused-members-from-drm_i915_private.patch b/patches.baytrail/0442-drm-i915-remove-unused-members-from-drm_i915_private.patch
deleted file mode 100644
index db3ad96ee6ce7..0000000000000
--- a/patches.baytrail/0442-drm-i915-remove-unused-members-from-drm_i915_private.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From 0a81dc6e95de43d04684f735430f81dc23ac725d Mon Sep 17 00:00:00 2001
-From: Maarten Lankhorst <maarten.lankhorst@canonical.com>
-Date: Wed, 10 Jul 2013 14:27:31 +0200
-Subject: drm/i915: remove unused members from drm_i915_private
-
-Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 12f56f51925dfca7caf079a6e6ccd22b63cdb39a)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h | 2 --
- 1 file changed, 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index eab408e66584..876ba7d7efd5 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1103,8 +1103,6 @@ typedef struct drm_i915_private {
- 	} backlight;
- 
- 	/* LVDS info */
--	struct drm_display_mode *lfp_lvds_vbt_mode; /* if any */
--	struct drm_display_mode *sdvo_lvds_vbt_mode; /* if any */
- 	bool no_aux_handshake;
- 
- 	struct drm_i915_fence_reg fence_regs[I915_MAX_NUM_FENCES]; /* assume 965 */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0443-drm-i915-extract-ibx_display_interrupt_update.patch b/patches.baytrail/0443-drm-i915-extract-ibx_display_interrupt_update.patch
deleted file mode 100644
index 6c9e662e14760..0000000000000
--- a/patches.baytrail/0443-drm-i915-extract-ibx_display_interrupt_update.patch
+++ /dev/null
@@ -1,130 +0,0 @@
-From 872526a9fec83c9d09af066fd0ca1697326d3a27 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 4 Jul 2013 23:35:21 +0200
-Subject: drm/i915: extract ibx_display_interrupt_update
-
-This way all changes to SDEIMR all go through the same function, with
-the exception of the (single-threaded) setup/teardown code.
-
-For paranoia again add an assert_spin_locked.
-
-v2: For even more paranoia also sprinkle a spinlock assert over
-cpt_can_enable_serr_int since we need to have that one there, too.
-
-v3: Fix the logic of interrupt enabling, add enable/disable macros for
-the simple cases in the fifo code and add a comment. All requested by
-Paulo.
-
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit fee884ed285a110b665c00b07b134cd2616122bc)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 51 +++++++++++++++++++++++++++++------------
- 1 file changed, 36 insertions(+), 15 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index eaa8c1eda17f..079408a56c4e 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -128,6 +128,8 @@ static bool cpt_can_enable_serr_int(struct drm_device *dev)
- 	enum pipe pipe;
- 	struct intel_crtc *crtc;
- 
-+	assert_spin_locked(&dev_priv->irq_lock);
-+
- 	for_each_pipe(pipe) {
- 		crtc = to_intel_crtc(dev_priv->pipe_to_crtc_mapping[pipe]);
- 
-@@ -170,6 +172,30 @@ static void ivybridge_set_fifo_underrun_reporting(struct drm_device *dev,
- 	}
- }
- 
-+/**
-+ * ibx_display_interrupt_update - update SDEIMR
-+ * @dev_priv: driver private
-+ * @interrupt_mask: mask of interrupt bits to update
-+ * @enabled_irq_mask: mask of interrupt bits to enable
-+ */
-+static void ibx_display_interrupt_update(struct drm_i915_private *dev_priv,
-+					 uint32_t interrupt_mask,
-+					 uint32_t enabled_irq_mask)
-+{
-+	uint32_t sdeimr = I915_READ(SDEIMR);
-+	sdeimr &= ~interrupt_mask;
-+	sdeimr |= (~enabled_irq_mask & interrupt_mask);
-+
-+	assert_spin_locked(&dev_priv->irq_lock);
-+
-+	I915_WRITE(SDEIMR, sdeimr);
-+	POSTING_READ(SDEIMR);
-+}
-+#define ibx_enable_display_interrupt(dev_priv, bits) \
-+	ibx_display_interrupt_update((dev_priv), (bits), (bits))
-+#define ibx_disable_display_interrupt(dev_priv, bits) \
-+	ibx_display_interrupt_update((dev_priv), (bits), 0)
-+
- static void ibx_set_fifo_underrun_reporting(struct intel_crtc *crtc,
- 					    bool enable)
- {
-@@ -179,11 +205,9 @@ static void ibx_set_fifo_underrun_reporting(struct intel_crtc *crtc,
- 						SDE_TRANSB_FIFO_UNDER;
- 
- 	if (enable)
--		I915_WRITE(SDEIMR, I915_READ(SDEIMR) & ~bit);
-+		ibx_enable_display_interrupt(dev_priv, bit);
- 	else
--		I915_WRITE(SDEIMR, I915_READ(SDEIMR) | bit);
--
--	POSTING_READ(SDEIMR);
-+		ibx_disable_display_interrupt(dev_priv, bit);
- }
- 
- static void cpt_set_fifo_underrun_reporting(struct drm_device *dev,
-@@ -200,12 +224,10 @@ static void cpt_set_fifo_underrun_reporting(struct drm_device *dev,
- 				     SERR_INT_TRANS_B_FIFO_UNDERRUN |
- 				     SERR_INT_TRANS_C_FIFO_UNDERRUN);
- 
--		I915_WRITE(SDEIMR, I915_READ(SDEIMR) & ~SDE_ERROR_CPT);
-+		ibx_enable_display_interrupt(dev_priv, SDE_ERROR_CPT);
- 	} else {
--		I915_WRITE(SDEIMR, I915_READ(SDEIMR) | SDE_ERROR_CPT);
-+		ibx_disable_display_interrupt(dev_priv, SDE_ERROR_CPT);
- 	}
--
--	POSTING_READ(SDEIMR);
- }
- 
- /**
-@@ -2698,22 +2720,21 @@ static void ibx_hpd_irq_setup(struct drm_device *dev)
- 	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
- 	struct drm_mode_config *mode_config = &dev->mode_config;
- 	struct intel_encoder *intel_encoder;
--	u32 mask = ~I915_READ(SDEIMR);
--	u32 hotplug;
-+	u32 hotplug_irqs, hotplug, enabled_irqs = 0;
- 
- 	if (HAS_PCH_IBX(dev)) {
--		mask &= ~SDE_HOTPLUG_MASK;
-+		hotplug_irqs = SDE_HOTPLUG_MASK;
- 		list_for_each_entry(intel_encoder, &mode_config->encoder_list, base.head)
- 			if (dev_priv->hpd_stats[intel_encoder->hpd_pin].hpd_mark == HPD_ENABLED)
--				mask |= hpd_ibx[intel_encoder->hpd_pin];
-+				enabled_irqs |= hpd_ibx[intel_encoder->hpd_pin];
- 	} else {
--		mask &= ~SDE_HOTPLUG_MASK_CPT;
-+		hotplug_irqs = SDE_HOTPLUG_MASK_CPT;
- 		list_for_each_entry(intel_encoder, &mode_config->encoder_list, base.head)
- 			if (dev_priv->hpd_stats[intel_encoder->hpd_pin].hpd_mark == HPD_ENABLED)
--				mask |= hpd_cpt[intel_encoder->hpd_pin];
-+				enabled_irqs |= hpd_cpt[intel_encoder->hpd_pin];
- 	}
- 
--	I915_WRITE(SDEIMR, ~mask);
-+	ibx_display_interrupt_update(dev_priv, hotplug_irqs, enabled_irqs);
- 
- 	/*
- 	 * Enable digital hotplug on the PCH, and configure the DP short pulse
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0444-drm-i915-improve-SERR_INT-clearing-for-fifo-underrun.patch b/patches.baytrail/0444-drm-i915-improve-SERR_INT-clearing-for-fifo-underrun.patch
deleted file mode 100644
index 9d7797a7312cd..0000000000000
--- a/patches.baytrail/0444-drm-i915-improve-SERR_INT-clearing-for-fifo-underrun.patch
+++ /dev/null
@@ -1,96 +0,0 @@
-From 1a82876919a51de9776e3d05088ec401775e6242 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Wed, 10 Jul 2013 08:30:23 +0200
-Subject: drm/i915: improve SERR_INT clearing for fifo underrun reporting
-
-The current code won't report any fifo underruns on cpt if just one
-pipe has fifo underrun reporting disabled. We can't enable the
-interrupts, but we can still check the per-transcoder bits and so
-report the underrun delayed if:
-- We always clear the transcoder's bit (and none of the other bits)
-  when enabling.
-- We check the transcoder's bit after disabling (to avoid racing with
-  the interrupt handler).
-
-v2: I've forgotten to actually remove the old SERR_INT clearing.
-
-v3: Use transcoder_name as suggested by Paulo Zanoni. Paulo also
-noticed a logic bug: When an underrun interrupt fires we report it
-both in the interrupt handler and when checking for underruns when
-disabling it in cpt_set_fifo_underrun_reporting. But that second check
-is only required if the interrupt is disabled and we're switching of
-underrun reporting (e.g. because we're disabling the crtc). Hence
-check for that condition.
-
-At first I wanted to rework the code to pass that bit of information
-from the uppper functions down to cpt_set_fifo_underrun_reporting. But
-that turned out too messy. Hence the quick&dirty check whether the
-south error interrupt source is masked off or not.
-
-v4: Streamline the control flow a bit.
-
-v5: s/pipe/pch transcoder/ in the dmesg output, suggested by Paulo.
-
-v6: Review from Paulo:
-- Reorder the was_enabled assignment to only read the register when we
-  need it. Also add a comment that we need to do that before updating
-  the register.
-- s/%i/%c/ fix for the debug output.
-- Fix the checkpath complaint in the SERR_INT_TRANS_FIFO_UNDERRUN
-  #define.
-
-v7: Hopefully put that elusive SERR hunk back into this patch, spotted
-by Paulo.
-
-Cc: Paulo Zanoni <przanoni@gmail.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 1dd246fb165819d31119e988c2887934c255fadc)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c |   17 +++++++++++++----
- drivers/gpu/drm/i915/i915_reg.h |    1 +
- 2 files changed, 14 insertions(+), 4 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -217,16 +217,25 @@ static void cpt_set_fifo_underrun_report
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 
- 	if (enable) {
-+		I915_WRITE(SERR_INT,
-+			   SERR_INT_TRANS_FIFO_UNDERRUN(pch_transcoder));
-+
- 		if (!cpt_can_enable_serr_int(dev))
- 			return;
- 
--		I915_WRITE(SERR_INT, SERR_INT_TRANS_A_FIFO_UNDERRUN |
--				     SERR_INT_TRANS_B_FIFO_UNDERRUN |
--				     SERR_INT_TRANS_C_FIFO_UNDERRUN);
--
- 		ibx_enable_display_interrupt(dev_priv, SDE_ERROR_CPT);
- 	} else {
-+		uint32_t tmp = I915_READ(SERR_INT);
-+		bool was_enabled = !(I915_READ(SDEIMR) & SDE_ERROR_CPT);
-+
-+		/* Change the state _after_ we've read out the current one. */
- 		ibx_disable_display_interrupt(dev_priv, SDE_ERROR_CPT);
-+
-+		if (!was_enabled &&
-+		    (tmp & SERR_INT_TRANS_FIFO_UNDERRUN(pch_transcoder))) {
-+			DRM_DEBUG_KMS("uncleared pch fifo underrun on pch transcoder %c\n",
-+				      transcoder_name(pch_transcoder));
-+		}
- 	}
- }
- 
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -3894,6 +3894,7 @@
- #define  SERR_INT_TRANS_C_FIFO_UNDERRUN	(1<<6)
- #define  SERR_INT_TRANS_B_FIFO_UNDERRUN	(1<<3)
- #define  SERR_INT_TRANS_A_FIFO_UNDERRUN	(1<<0)
-+#define  SERR_INT_TRANS_FIFO_UNDERRUN(pipe)	(1<<(pipe*3))
- 
- /* digital port hotplug */
- #define PCH_PORT_HOTPLUG        0xc4030		/* SHOTPLUG_CTL */
diff --git a/patches.baytrail/0445-drm-i915-improve-GEN7_ERR_INT-clearing-for-fifo-unde.patch b/patches.baytrail/0445-drm-i915-improve-GEN7_ERR_INT-clearing-for-fifo-unde.patch
deleted file mode 100644
index b2dc46b55aa9e..0000000000000
--- a/patches.baytrail/0445-drm-i915-improve-GEN7_ERR_INT-clearing-for-fifo-unde.patch
+++ /dev/null
@@ -1,94 +0,0 @@
-From 14056959f1898894f882665f3361ba1014de4e9e Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Tue, 9 Jul 2013 22:59:16 +0200
-Subject: drm/i915: improve GEN7_ERR_INT clearing for fifo underrun reporting
-
-Same treatment as for SERR_INT: If we clear only the bit for the pipe
-we're enabling (but unconditionally) then we can always check for
-possible underruns after having disabled the interrupt. That way pipe
-underruns won't be lost, but at worst only get reported in a delayed
-fashion.
-
-v2: The same logic bug as in the SERR handling change also existed
-here. The same bugfix of only reporting missed underruns when the
-error interrupt was masked applies, too.
-
-v3: Do the same fixes as for the SERR handling that Paulo suggested in
-his review:
-- s/%i/%c/ fix in the debug output
-- move the DE_ERR_INT_IVB read into the respective if block
-
-Cc: Paulo Zanoni <przanoni@gmail.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-[danvet: Fix up the checkpatch bikeshed Paulo noticed.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 7336df6512440a494d3a705dfc6a883a42733c8f)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 20 +++++++++++++-------
- drivers/gpu/drm/i915/i915_reg.h |  1 +
- 2 files changed, 14 insertions(+), 7 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index d41b7a87c129..c21ea44ede4e 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -154,21 +154,27 @@ static void ironlake_set_fifo_underrun_reporting(struct drm_device *dev,
- }
- 
- static void ivybridge_set_fifo_underrun_reporting(struct drm_device *dev,
--						  bool enable)
-+						  enum pipe pipe, bool enable)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
--
- 	if (enable) {
-+		I915_WRITE(GEN7_ERR_INT, ERR_INT_FIFO_UNDERRUN(pipe));
-+
- 		if (!ivb_can_enable_err_int(dev))
- 			return;
- 
--		I915_WRITE(GEN7_ERR_INT, ERR_INT_FIFO_UNDERRUN_A |
--					 ERR_INT_FIFO_UNDERRUN_B |
--					 ERR_INT_FIFO_UNDERRUN_C);
--
- 		ironlake_enable_display_irq(dev_priv, DE_ERR_INT_IVB);
- 	} else {
-+		bool was_enabled = !(I915_READ(DEIMR) & DE_ERR_INT_IVB);
-+
-+		/* Change the state _after_ we've read out the current one. */
- 		ironlake_disable_display_irq(dev_priv, DE_ERR_INT_IVB);
-+
-+		if (!was_enabled &&
-+		    (I915_READ(GEN7_ERR_INT) & ERR_INT_FIFO_UNDERRUN(pipe))) {
-+			DRM_DEBUG_KMS("uncleared fifo underrun on pipe %c\n",
-+				      pipe_name(pipe));
-+		}
- 	}
- }
- 
-@@ -274,7 +280,7 @@ bool intel_set_cpu_fifo_underrun_reporting(struct drm_device *dev,
- 	if (IS_GEN5(dev) || IS_GEN6(dev))
- 		ironlake_set_fifo_underrun_reporting(dev, pipe, enable);
- 	else if (IS_GEN7(dev))
--		ivybridge_set_fifo_underrun_reporting(dev, enable);
-+		ivybridge_set_fifo_underrun_reporting(dev, pipe, enable);
- 
- done:
- 	spin_unlock_irqrestore(&dev_priv->irq_lock, flags);
-diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
-index beb5d119b7e6..b131773190f3 100644
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -681,6 +681,7 @@
- #define   ERR_INT_FIFO_UNDERRUN_C	(1<<6)
- #define   ERR_INT_FIFO_UNDERRUN_B	(1<<3)
- #define   ERR_INT_FIFO_UNDERRUN_A	(1<<0)
-+#define   ERR_INT_FIFO_UNDERRUN(pipe)	(1<<(pipe*3))
- 
- #define FPGA_DBG		0x42300
- #define   FPGA_DBG_RM_NOCLAIM	(1<<31)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0446-drm-i915-kill-lpt-pch-transcoder-crtc-mapping-code-f.patch b/patches.baytrail/0446-drm-i915-kill-lpt-pch-transcoder-crtc-mapping-code-f.patch
deleted file mode 100644
index 681c466d48080..0000000000000
--- a/patches.baytrail/0446-drm-i915-kill-lpt-pch-transcoder-crtc-mapping-code-f.patch
+++ /dev/null
@@ -1,106 +0,0 @@
-From 6f409609ee19f1cb08c9a6212a6287a59f526657 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 4 Jul 2013 23:35:24 +0200
-Subject: drm/i915: kill lpt pch transcoder->crtc mapping code for fifo
- underruns
-
-It's racy: There's no guarantee that we won't walk this code (due to a
-pch fifo underrun interrupt) while someone is changing the pointers
-around.
-
-The only reason we do this is to use the righ crtc for the pch fifo
-underrun accounting. But we never expose this to userspace, so
-essentially no one really cares if we use the "wrong" crtc.
-
-So let's just rip it out.
-
-With this patch fifo underrun code will always use crtc A for tracking
-underruns on the (only) pch transcoder on LPT.
-
-v2: Add a big comment explaining what's going on. Requested by Paulo.
-
-v3: Fixup spelling in comment as spotted by Paulo.
-
-Cc: Paulo Zanoni <przanoni@gmail.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit de28075d5bb3e1e9f92d19da214b6a96f544b66d)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 40 +++++++++++++++-------------------------
- 1 file changed, 15 insertions(+), 25 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index c21ea44ede4e..aeb2232a9e76 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -202,13 +202,13 @@ static void ibx_display_interrupt_update(struct drm_i915_private *dev_priv,
- #define ibx_disable_display_interrupt(dev_priv, bits) \
- 	ibx_display_interrupt_update((dev_priv), (bits), 0)
- 
--static void ibx_set_fifo_underrun_reporting(struct intel_crtc *crtc,
-+static void ibx_set_fifo_underrun_reporting(struct drm_device *dev,
-+					    enum transcoder pch_transcoder,
- 					    bool enable)
- {
--	struct drm_device *dev = crtc->base.dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
--	uint32_t bit = (crtc->pipe == PIPE_A) ? SDE_TRANSA_FIFO_UNDER :
--						SDE_TRANSB_FIFO_UNDER;
-+	uint32_t bit = (pch_transcoder == TRANSCODER_A) ?
-+		       SDE_TRANSA_FIFO_UNDER : SDE_TRANSB_FIFO_UNDER;
- 
- 	if (enable)
- 		ibx_enable_display_interrupt(dev_priv, bit);
-@@ -306,29 +306,19 @@ bool intel_set_pch_fifo_underrun_reporting(struct drm_device *dev,
- 					   bool enable)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
--	enum pipe p;
--	struct drm_crtc *crtc;
--	struct intel_crtc *intel_crtc;
-+	struct drm_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pch_transcoder];
-+	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
- 	unsigned long flags;
- 	bool ret;
- 
--	if (HAS_PCH_LPT(dev)) {
--		crtc = NULL;
--		for_each_pipe(p) {
--			struct drm_crtc *c = dev_priv->pipe_to_crtc_mapping[p];
--			if (intel_pipe_has_type(c, INTEL_OUTPUT_ANALOG)) {
--				crtc = c;
--				break;
--			}
--		}
--		if (!crtc) {
--			DRM_ERROR("PCH FIFO underrun, but no CRTC using the PCH found\n");
--			return false;
--		}
--	} else {
--		crtc = dev_priv->pipe_to_crtc_mapping[pch_transcoder];
--	}
--	intel_crtc = to_intel_crtc(crtc);
-+	/*
-+	 * NOTE: Pre-LPT has a fixed cpu pipe -> pch transcoder mapping, but LPT
-+	 * has only one pch transcoder A that all pipes can use. To avoid racy
-+	 * pch transcoder -> pipe lookups from interrupt code simply store the
-+	 * underrun statistics in crtc A. Since we never expose this anywhere
-+	 * nor use it outside of the fifo underrun code here using the "wrong"
-+	 * crtc on LPT won't cause issues.
-+	 */
- 
- 	spin_lock_irqsave(&dev_priv->irq_lock, flags);
- 
-@@ -340,7 +330,7 @@ bool intel_set_pch_fifo_underrun_reporting(struct drm_device *dev,
- 	intel_crtc->pch_fifo_underrun_disabled = !enable;
- 
- 	if (HAS_PCH_IBX(dev))
--		ibx_set_fifo_underrun_reporting(intel_crtc, enable);
-+		ibx_set_fifo_underrun_reporting(dev, pch_transcoder, enable);
- 	else
- 		cpt_set_fifo_underrun_reporting(dev, pch_transcoder, enable);
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0447-drm-i915-irq-handlers-don-t-need-interrupt-safe-spin.patch b/patches.baytrail/0447-drm-i915-irq-handlers-don-t-need-interrupt-safe-spin.patch
deleted file mode 100644
index e8ff154fcf530..0000000000000
--- a/patches.baytrail/0447-drm-i915-irq-handlers-don-t-need-interrupt-safe-spin.patch
+++ /dev/null
@@ -1,173 +0,0 @@
-From bd0d40aee3ddd369389f22cc0166a7c480e073eb Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 4 Jul 2013 23:35:25 +0200
-Subject: drm/i915: irq handlers don't need interrupt-safe spinlocks
-
-Since we only have one interrupt handler and interrupt handlers are
-non-reentrant.
-
-To drive the point really home give them all an _irq_handler suffix.
-
-This is a tiny micro-optimization but even more important it makes it
-clearer what locking we actually need. And in case someone screws this
-up: lockdep will catch hardirq vs. other context deadlocks.
-
-v2: Fix up compile fail.
-
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit d0ecd7e221c87514b1eca84b11fee1e262f5d816)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 42 ++++++++++++++++++-----------------------
- 1 file changed, 18 insertions(+), 24 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index aeb2232a9e76..4eaa79f7b49d 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -656,14 +656,13 @@ static void i915_hotplug_work_func(struct work_struct *work)
- 		drm_kms_helper_hotplug_event(dev);
- }
- 
--static void ironlake_handle_rps_change(struct drm_device *dev)
-+static void ironlake_rps_change_irq_handler(struct drm_device *dev)
- {
- 	drm_i915_private_t *dev_priv = dev->dev_private;
- 	u32 busy_up, busy_down, max_avg, min_avg;
- 	u8 new_delay;
--	unsigned long flags;
- 
--	spin_lock_irqsave(&mchdev_lock, flags);
-+	spin_lock(&mchdev_lock);
- 
- 	I915_WRITE16(MEMINTRSTS, I915_READ(MEMINTRSTS));
- 
-@@ -691,7 +690,7 @@ static void ironlake_handle_rps_change(struct drm_device *dev)
- 	if (ironlake_set_drps(dev, new_delay))
- 		dev_priv->ips.cur_delay = new_delay;
- 
--	spin_unlock_irqrestore(&mchdev_lock, flags);
-+	spin_unlock(&mchdev_lock);
- 
- 	return;
- }
-@@ -835,18 +834,17 @@ static void ivybridge_parity_work(struct work_struct *work)
- 	kfree(parity_event[1]);
- }
- 
--static void ivybridge_handle_parity_error(struct drm_device *dev)
-+static void ivybridge_parity_error_irq_handler(struct drm_device *dev)
- {
- 	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
--	unsigned long flags;
- 
- 	if (!HAS_L3_GPU_CACHE(dev))
- 		return;
- 
--	spin_lock_irqsave(&dev_priv->irq_lock, flags);
-+	spin_lock(&dev_priv->irq_lock);
- 	dev_priv->gt_irq_mask |= GT_RENDER_L3_PARITY_ERROR_INTERRUPT;
- 	I915_WRITE(GTIMR, dev_priv->gt_irq_mask);
--	spin_unlock_irqrestore(&dev_priv->irq_lock, flags);
-+	spin_unlock(&dev_priv->irq_lock);
- 
- 	queue_work(dev_priv->wq, &dev_priv->l3_parity.error_work);
- }
-@@ -872,15 +870,13 @@ static void snb_gt_irq_handler(struct drm_device *dev,
- 	}
- 
- 	if (gt_iir & GT_RENDER_L3_PARITY_ERROR_INTERRUPT)
--		ivybridge_handle_parity_error(dev);
-+		ivybridge_parity_error_irq_handler(dev);
- }
- 
- /* Legacy way of handling PM interrupts */
--static void gen6_queue_rps_work(struct drm_i915_private *dev_priv,
--				u32 pm_iir)
-+static void gen6_rps_irq_handler(struct drm_i915_private *dev_priv,
-+				 u32 pm_iir)
- {
--	unsigned long flags;
--
- 	/*
- 	 * IIR bits should never already be set because IMR should
- 	 * prevent an interrupt from being shown in IIR. The warning
-@@ -891,11 +887,11 @@ static void gen6_queue_rps_work(struct drm_i915_private *dev_priv,
- 	 * The mask bit in IMR is cleared by dev_priv->rps.work.
- 	 */
- 
--	spin_lock_irqsave(&dev_priv->rps.lock, flags);
-+	spin_lock(&dev_priv->rps.lock);
- 	dev_priv->rps.pm_iir |= pm_iir;
- 	I915_WRITE(GEN6_PMIMR, dev_priv->rps.pm_iir);
- 	POSTING_READ(GEN6_PMIMR);
--	spin_unlock_irqrestore(&dev_priv->rps.lock, flags);
-+	spin_unlock(&dev_priv->rps.lock);
- 
- 	queue_work(dev_priv->wq, &dev_priv->rps.work);
- }
-@@ -959,7 +955,7 @@ static void dp_aux_irq_handler(struct drm_device *dev)
- 	wake_up_all(&dev_priv->gmbus_wait_queue);
- }
- 
--/* Unlike gen6_queue_rps_work() from which this function is originally derived,
-+/* Unlike gen6_rps_irq_handler() from which this function is originally derived,
-  * we must be able to deal with other PM interrupts. This is complicated because
-  * of the way in which we use the masks to defer the RPS work (which for
-  * posterity is necessary because of forcewake).
-@@ -967,9 +963,7 @@ static void dp_aux_irq_handler(struct drm_device *dev)
- static void hsw_pm_irq_handler(struct drm_i915_private *dev_priv,
- 			       u32 pm_iir)
- {
--	unsigned long flags;
--
--	spin_lock_irqsave(&dev_priv->rps.lock, flags);
-+	spin_lock(&dev_priv->rps.lock);
- 	dev_priv->rps.pm_iir |= pm_iir & GEN6_PM_RPS_EVENTS;
- 	if (dev_priv->rps.pm_iir) {
- 		I915_WRITE(GEN6_PMIMR, dev_priv->rps.pm_iir);
-@@ -978,7 +972,7 @@ static void hsw_pm_irq_handler(struct drm_i915_private *dev_priv,
- 		/* TODO: if queue_work is slow, move it out of the spinlock */
- 		queue_work(dev_priv->wq, &dev_priv->rps.work);
- 	}
--	spin_unlock_irqrestore(&dev_priv->rps.lock, flags);
-+	spin_unlock(&dev_priv->rps.lock);
- 
- 	if (pm_iir & ~GEN6_PM_RPS_EVENTS) {
- 		if (pm_iir & PM_VEBOX_USER_INTERRUPT)
-@@ -1060,7 +1054,7 @@ static irqreturn_t valleyview_irq_handler(int irq, void *arg)
- 			gmbus_irq_handler(dev);
- 
- 		if (pm_iir & GEN6_PM_RPS_EVENTS)
--			gen6_queue_rps_work(dev_priv, pm_iir);
-+			gen6_rps_irq_handler(dev_priv, pm_iir);
- 
- 		I915_WRITE(GTIIR, gt_iir);
- 		I915_WRITE(GEN6_PMIIR, pm_iir);
-@@ -1298,7 +1292,7 @@ static irqreturn_t ivybridge_irq_handler(int irq, void *arg)
- 		if (IS_HASWELL(dev))
- 			hsw_pm_irq_handler(dev_priv, pm_iir);
- 		else if (pm_iir & GEN6_PM_RPS_EVENTS)
--			gen6_queue_rps_work(dev_priv, pm_iir);
-+			gen6_rps_irq_handler(dev_priv, pm_iir);
- 		I915_WRITE(GEN6_PMIIR, pm_iir);
- 		ret = IRQ_HANDLED;
- 	}
-@@ -1415,10 +1409,10 @@ static irqreturn_t ironlake_irq_handler(int irq, void *arg)
- 	}
- 
- 	if (IS_GEN5(dev) &&  de_iir & DE_PCU_EVENT)
--		ironlake_handle_rps_change(dev);
-+		ironlake_rps_change_irq_handler(dev);
- 
- 	if (IS_GEN6(dev) && pm_iir & GEN6_PM_RPS_EVENTS)
--		gen6_queue_rps_work(dev_priv, pm_iir);
-+		gen6_rps_irq_handler(dev_priv, pm_iir);
- 
- 	I915_WRITE(GTIIR, gt_iir);
- 	I915_WRITE(DEIIR, de_iir);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0448-drm-i915-streamline-hsw_pm_irq_handler.patch b/patches.baytrail/0448-drm-i915-streamline-hsw_pm_irq_handler.patch
deleted file mode 100644
index 7a8465dbe0329..0000000000000
--- a/patches.baytrail/0448-drm-i915-streamline-hsw_pm_irq_handler.patch
+++ /dev/null
@@ -1,61 +0,0 @@
-From 7c9542eac46e653b530245dc8972590a6eae2b7d Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 4 Jul 2013 23:35:26 +0200
-Subject: drm/i915: streamline hsw_pm_irq_handler
-
-The if (pm_iir & ~GEN6_PM_RPS_EVENTS) check was redunandant. Otoh
-adding a check for rps events allows us to avoid the spinlock grabbing
-for VECS interrupts.
-
-v2: Drop misplaced hunk which now moved to the right patch.
-
-Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 41a05a3a5cdc5d731014588b9a24759af1804d48)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 20 +++++++++-----------
- 1 file changed, 9 insertions(+), 11 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index 4eaa79f7b49d..b6a53950099d 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -963,25 +963,23 @@ static void dp_aux_irq_handler(struct drm_device *dev)
- static void hsw_pm_irq_handler(struct drm_i915_private *dev_priv,
- 			       u32 pm_iir)
- {
--	spin_lock(&dev_priv->rps.lock);
--	dev_priv->rps.pm_iir |= pm_iir & GEN6_PM_RPS_EVENTS;
--	if (dev_priv->rps.pm_iir) {
-+	if (pm_iir & GEN6_PM_RPS_EVENTS) {
-+		spin_lock(&dev_priv->rps.lock);
-+		dev_priv->rps.pm_iir |= pm_iir & GEN6_PM_RPS_EVENTS;
- 		I915_WRITE(GEN6_PMIMR, dev_priv->rps.pm_iir);
- 		/* never want to mask useful interrupts. (also posting read) */
- 		WARN_ON(I915_READ_NOTRACE(GEN6_PMIMR) & ~GEN6_PM_RPS_EVENTS);
- 		/* TODO: if queue_work is slow, move it out of the spinlock */
- 		queue_work(dev_priv->wq, &dev_priv->rps.work);
-+		spin_unlock(&dev_priv->rps.lock);
- 	}
--	spin_unlock(&dev_priv->rps.lock);
- 
--	if (pm_iir & ~GEN6_PM_RPS_EVENTS) {
--		if (pm_iir & PM_VEBOX_USER_INTERRUPT)
--			notify_ring(dev_priv->dev, &dev_priv->ring[VECS]);
-+	if (pm_iir & PM_VEBOX_USER_INTERRUPT)
-+		notify_ring(dev_priv->dev, &dev_priv->ring[VECS]);
- 
--		if (pm_iir & PM_VEBOX_CS_ERROR_INTERRUPT) {
--			DRM_ERROR("VEBOX CS error interrupt 0x%08x\n", pm_iir);
--			i915_handle_error(dev_priv->dev, false);
--		}
-+	if (pm_iir & PM_VEBOX_CS_ERROR_INTERRUPT) {
-+		DRM_ERROR("VEBOX CS error interrupt 0x%08x\n", pm_iir);
-+		i915_handle_error(dev_priv->dev, false);
- 	}
- }
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0449-drm-i915-queue-work-outside-spinlock-in-hsw_pm_irq_h.patch b/patches.baytrail/0449-drm-i915-queue-work-outside-spinlock-in-hsw_pm_irq_h.patch
deleted file mode 100644
index 485e05045e510..0000000000000
--- a/patches.baytrail/0449-drm-i915-queue-work-outside-spinlock-in-hsw_pm_irq_h.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From 4e8341154892efef0fa6558245694a3f8ffd619a Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 4 Jul 2013 23:35:27 +0200
-Subject: drm/i915: queue work outside spinlock in hsw_pm_irq_handler
-
-And kill the comment about it. Queueing work is a barrier type event,
-no amount of locking will help in ordering things (as long as we queue
-the work after having updated all relevant data structures). Also, the
-queue_work works itself as a sufficient memory barrier.
-
-Again on the surface this is just a tiny micro-optimization to reduce
-the hold-time of dev_priv->irq_lock. But the better reason is that it
-reduces superficial locking and so makes it clearer what we actually
-need for correctness.
-
-Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 2adbee62e00d869a30cb93ea2269e5ea26a9bbc4)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index b6a53950099d..b08ce0b9f0bb 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -969,9 +969,9 @@ static void hsw_pm_irq_handler(struct drm_i915_private *dev_priv,
- 		I915_WRITE(GEN6_PMIMR, dev_priv->rps.pm_iir);
- 		/* never want to mask useful interrupts. (also posting read) */
- 		WARN_ON(I915_READ_NOTRACE(GEN6_PMIMR) & ~GEN6_PM_RPS_EVENTS);
--		/* TODO: if queue_work is slow, move it out of the spinlock */
--		queue_work(dev_priv->wq, &dev_priv->rps.work);
- 		spin_unlock(&dev_priv->rps.lock);
-+
-+		queue_work(dev_priv->wq, &dev_priv->rps.work);
- 	}
- 
- 	if (pm_iir & PM_VEBOX_USER_INTERRUPT)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0450-drm-i915-kill-dev_priv-rps.lock.patch b/patches.baytrail/0450-drm-i915-kill-dev_priv-rps.lock.patch
deleted file mode 100644
index 0fa422ba37187..0000000000000
--- a/patches.baytrail/0450-drm-i915-kill-dev_priv-rps.lock.patch
+++ /dev/null
@@ -1,214 +0,0 @@
-From 83eddc48ea173ba5cf9f3fdd5b6488801e3a6fb1 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 4 Jul 2013 23:35:28 +0200
-Subject: drm/i915: kill dev_priv->rps.lock
-
-Now that the rps interrupt locking isn't clearly separated (at elast
-conceptually) from all the other interrupt locking having a different
-lock stopped making sense: It protects much more than just the rps
-workqueue it started out with. But with the addition of VECS the
-separation started to blurr and resulted in some more complex locking
-for the ring interrupt refcount.
-
-With this we can (again) unifiy the ringbuffer irq refcounts without
-causing a massive confusion, but that's for the next patch.
-
-v2: Explain better why the rps.lock once made sense and why no longer,
-requested by Ben.
-
-Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 59cdb63d529c81fc8ac0620ad50f29d5fb4411c9)
-Signed-off-by: James Ausmus <james.ausmus@intel.com>
-
-Conflicts:
-	drivers/gpu/drm/i915/i915_dma.c
-	(context changes)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_dma.c         |    1 -
- drivers/gpu/drm/i915/i915_drv.h         |    8 ++++----
- drivers/gpu/drm/i915/i915_irq.c         |   12 ++++++------
- drivers/gpu/drm/i915/intel_pm.c         |   16 ++++++++--------
- drivers/gpu/drm/i915/intel_ringbuffer.c |    8 ++++----
- drivers/gpu/drm/i915/intel_ringbuffer.h |    2 +-
- 6 files changed, 23 insertions(+), 24 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_dma.c
-+++ b/drivers/gpu/drm/i915/i915_dma.c
-@@ -1500,7 +1500,6 @@ int i915_driver_load(struct drm_device *
- 
- 	spin_lock_init(&dev_priv->irq_lock);
- 	spin_lock_init(&dev_priv->gpu_error.lock);
--	spin_lock_init(&dev_priv->rps.lock);
- 	spin_lock_init(&dev_priv->gt_lock);
- 	spin_lock_init(&dev_priv->backlight.lock);
- 	mutex_init(&dev_priv->dpio_lock);
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -744,12 +744,12 @@ struct i915_suspend_saved_registers {
- };
- 
- struct intel_gen6_power_mgmt {
-+	/* work and pm_iir are protected by dev_priv->irq_lock */
- 	struct work_struct work;
--	struct delayed_work vlv_work;
- 	u32 pm_iir;
--	/* lock - irqsave spinlock that protectects the work_struct and
--	 * pm_iir. */
--	spinlock_t lock;
-+
-+	/* On vlv we need to manually drop to Vmin with a delayed work. */
-+	struct delayed_work vlv_work;
- 
- 	/* The below variables an all the rps hw state are protected by
- 	 * dev->struct mutext. */
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -719,13 +719,13 @@ static void gen6_pm_rps_work(struct work
- 	u32 pm_iir, pm_imr;
- 	u8 new_delay;
- 
--	spin_lock_irq(&dev_priv->rps.lock);
-+	spin_lock_irq(&dev_priv->irq_lock);
- 	pm_iir = dev_priv->rps.pm_iir;
- 	dev_priv->rps.pm_iir = 0;
- 	pm_imr = I915_READ(GEN6_PMIMR);
- 	/* Make sure not to corrupt PMIMR state used by ringbuffer code */
- 	I915_WRITE(GEN6_PMIMR, pm_imr & ~GEN6_PM_RPS_EVENTS);
--	spin_unlock_irq(&dev_priv->rps.lock);
-+	spin_unlock_irq(&dev_priv->irq_lock);
- 
- 	if ((pm_iir & GEN6_PM_RPS_EVENTS) == 0)
- 		return;
-@@ -887,11 +887,11 @@ static void gen6_rps_irq_handler(struct
- 	 * The mask bit in IMR is cleared by dev_priv->rps.work.
- 	 */
- 
--	spin_lock(&dev_priv->rps.lock);
-+	spin_lock(&dev_priv->irq_lock);
- 	dev_priv->rps.pm_iir |= pm_iir;
- 	I915_WRITE(GEN6_PMIMR, dev_priv->rps.pm_iir);
- 	POSTING_READ(GEN6_PMIMR);
--	spin_unlock(&dev_priv->rps.lock);
-+	spin_unlock(&dev_priv->irq_lock);
- 
- 	queue_work(dev_priv->wq, &dev_priv->rps.work);
- }
-@@ -964,12 +964,12 @@ static void hsw_pm_irq_handler(struct dr
- 			       u32 pm_iir)
- {
- 	if (pm_iir & GEN6_PM_RPS_EVENTS) {
--		spin_lock(&dev_priv->rps.lock);
-+		spin_lock(&dev_priv->irq_lock);
- 		dev_priv->rps.pm_iir |= pm_iir & GEN6_PM_RPS_EVENTS;
- 		I915_WRITE(GEN6_PMIMR, dev_priv->rps.pm_iir);
- 		/* never want to mask useful interrupts. (also posting read) */
- 		WARN_ON(I915_READ_NOTRACE(GEN6_PMIMR) & ~GEN6_PM_RPS_EVENTS);
--		spin_unlock(&dev_priv->rps.lock);
-+		spin_unlock(&dev_priv->irq_lock);
- 
- 		queue_work(dev_priv->wq, &dev_priv->rps.work);
- 	}
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -3135,9 +3135,9 @@ static void gen6_disable_rps(struct drm_
- 	 * register (PMIMR) to mask PM interrupts. The only risk is in leaving
- 	 * stale bits in PMIIR and PMIMR which gen6_enable_rps will clean up. */
- 
--	spin_lock_irq(&dev_priv->rps.lock);
-+	spin_lock_irq(&dev_priv->irq_lock);
- 	dev_priv->rps.pm_iir = 0;
--	spin_unlock_irq(&dev_priv->rps.lock);
-+	spin_unlock_irq(&dev_priv->irq_lock);
- 
- 	I915_WRITE(GEN6_PMIIR, GEN6_PM_RPS_EVENTS);
- }
-@@ -3154,9 +3154,9 @@ static void valleyview_disable_rps(struc
- 	 * register (PMIMR) to mask PM interrupts. The only risk is in leaving
- 	 * stale bits in PMIIR and PMIMR which gen6_enable_rps will clean up. */
- 
--	spin_lock_irq(&dev_priv->rps.lock);
-+	spin_lock_irq(&dev_priv->irq_lock);
- 	dev_priv->rps.pm_iir = 0;
--	spin_unlock_irq(&dev_priv->rps.lock);
-+	spin_unlock_irq(&dev_priv->irq_lock);
- 
- 	I915_WRITE(GEN6_PMIIR, I915_READ(GEN6_PMIIR));
- 
-@@ -3321,13 +3321,13 @@ static void gen6_enable_rps(struct drm_d
- 
- 	/* requires MSI enabled */
- 	I915_WRITE(GEN6_PMIER, I915_READ(GEN6_PMIER) | GEN6_PM_RPS_EVENTS);
--	spin_lock_irq(&dev_priv->rps.lock);
-+	spin_lock_irq(&dev_priv->irq_lock);
- 	/* FIXME: Our interrupt enabling sequence is bonghits.
- 	 * dev_priv->rps.pm_iir really should be 0 here. */
- 	dev_priv->rps.pm_iir = 0;
- 	I915_WRITE(GEN6_PMIMR, I915_READ(GEN6_PMIMR) & ~GEN6_PM_RPS_EVENTS);
- 	I915_WRITE(GEN6_PMIIR, GEN6_PM_RPS_EVENTS);
--	spin_unlock_irq(&dev_priv->rps.lock);
-+	spin_unlock_irq(&dev_priv->irq_lock);
- 	/* unmask all PM interrupts */
- 	I915_WRITE(GEN6_PMINTRMSK, 0);
- 
-@@ -3601,10 +3601,10 @@ static void valleyview_enable_rps(struct
- 
- 	/* requires MSI enabled */
- 	I915_WRITE(GEN6_PMIER, GEN6_PM_RPS_EVENTS);
--	spin_lock_irq(&dev_priv->rps.lock);
-+	spin_lock_irq(&dev_priv->irq_lock);
- 	WARN_ON(dev_priv->rps.pm_iir != 0);
- 	I915_WRITE(GEN6_PMIMR, 0);
--	spin_unlock_irq(&dev_priv->rps.lock);
-+	spin_unlock_irq(&dev_priv->irq_lock);
- 	/* enable all PM interrupts */
- 	I915_WRITE(GEN6_PMINTRMSK, 0);
- 
---- a/drivers/gpu/drm/i915/intel_ringbuffer.c
-+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
-@@ -1082,14 +1082,14 @@ hsw_vebox_get_irq(struct intel_ring_buff
- 	if (!dev->irq_enabled)
- 		return false;
- 
--	spin_lock_irqsave(&dev_priv->rps.lock, flags);
-+	spin_lock_irqsave(&dev_priv->irq_lock, flags);
- 	if (ring->irq_refcount.pm++ == 0) {
- 		u32 pm_imr = I915_READ(GEN6_PMIMR);
- 		I915_WRITE_IMR(ring, ~ring->irq_enable_mask);
- 		I915_WRITE(GEN6_PMIMR, pm_imr & ~ring->irq_enable_mask);
- 		POSTING_READ(GEN6_PMIMR);
- 	}
--	spin_unlock_irqrestore(&dev_priv->rps.lock, flags);
-+	spin_unlock_irqrestore(&dev_priv->irq_lock, flags);
- 
- 	return true;
- }
-@@ -1104,14 +1104,14 @@ hsw_vebox_put_irq(struct intel_ring_buff
- 	if (!dev->irq_enabled)
- 		return;
- 
--	spin_lock_irqsave(&dev_priv->rps.lock, flags);
-+	spin_lock_irqsave(&dev_priv->irq_lock, flags);
- 	if (--ring->irq_refcount.pm == 0) {
- 		u32 pm_imr = I915_READ(GEN6_PMIMR);
- 		I915_WRITE_IMR(ring, ~0);
- 		I915_WRITE(GEN6_PMIMR, pm_imr | ring->irq_enable_mask);
- 		POSTING_READ(GEN6_PMIMR);
- 	}
--	spin_unlock_irqrestore(&dev_priv->rps.lock, flags);
-+	spin_unlock_irqrestore(&dev_priv->irq_lock, flags);
- }
- 
- static int
---- a/drivers/gpu/drm/i915/intel_ringbuffer.h
-+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
-@@ -80,7 +80,7 @@ struct  intel_ring_buffer {
- 
- 	struct {
- 		u32	gt; /*  protected by dev_priv->irq_lock */
--		u32	pm; /*  protected by dev_priv->rps.lock (sucks) */
-+		u32	pm; /*  protected by dev_priv->irq_lock */
- 	} irq_refcount;
- 	u32		irq_enable_mask;	/* bitmask to enable ring interrupt */
- 	u32		trace_irq_seqno;
diff --git a/patches.baytrail/0451-drm-i915-unify-ring-irq-refcounts-again.patch b/patches.baytrail/0451-drm-i915-unify-ring-irq-refcounts-again.patch
deleted file mode 100644
index b4ba30c539c64..0000000000000
--- a/patches.baytrail/0451-drm-i915-unify-ring-irq-refcounts-again.patch
+++ /dev/null
@@ -1,133 +0,0 @@
-From dc81fb3d61796b23bd7b6296a2fe10b6d8821fbe Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 4 Jul 2013 23:35:29 +0200
-Subject: drm/i915: unify ring irq refcounts (again)
-
-With the simplified locking there's no reason any more to keep the
-refcounts seperate.
-
-v2: Readd the lost comment that ring->irq_refcount is protected by
-dev_priv->irq_lock.
-
-Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit c7113cc35f59b46b301367b947c4f71ac8f0d5bb)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_ringbuffer.c | 20 ++++++++++----------
- drivers/gpu/drm/i915/intel_ringbuffer.h |  5 +----
- 2 files changed, 11 insertions(+), 14 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
-index ad439afdcc6d..e97a7a0455c2 100644
---- a/drivers/gpu/drm/i915/intel_ringbuffer.c
-+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
-@@ -836,7 +836,7 @@ gen5_ring_get_irq(struct intel_ring_buffer *ring)
- 		return false;
- 
- 	spin_lock_irqsave(&dev_priv->irq_lock, flags);
--	if (ring->irq_refcount.gt++ == 0) {
-+	if (ring->irq_refcount++ == 0) {
- 		dev_priv->gt_irq_mask &= ~ring->irq_enable_mask;
- 		I915_WRITE(GTIMR, dev_priv->gt_irq_mask);
- 		POSTING_READ(GTIMR);
-@@ -854,7 +854,7 @@ gen5_ring_put_irq(struct intel_ring_buffer *ring)
- 	unsigned long flags;
- 
- 	spin_lock_irqsave(&dev_priv->irq_lock, flags);
--	if (--ring->irq_refcount.gt == 0) {
-+	if (--ring->irq_refcount == 0) {
- 		dev_priv->gt_irq_mask |= ring->irq_enable_mask;
- 		I915_WRITE(GTIMR, dev_priv->gt_irq_mask);
- 		POSTING_READ(GTIMR);
-@@ -873,7 +873,7 @@ i9xx_ring_get_irq(struct intel_ring_buffer *ring)
- 		return false;
- 
- 	spin_lock_irqsave(&dev_priv->irq_lock, flags);
--	if (ring->irq_refcount.gt++ == 0) {
-+	if (ring->irq_refcount++ == 0) {
- 		dev_priv->irq_mask &= ~ring->irq_enable_mask;
- 		I915_WRITE(IMR, dev_priv->irq_mask);
- 		POSTING_READ(IMR);
-@@ -891,7 +891,7 @@ i9xx_ring_put_irq(struct intel_ring_buffer *ring)
- 	unsigned long flags;
- 
- 	spin_lock_irqsave(&dev_priv->irq_lock, flags);
--	if (--ring->irq_refcount.gt == 0) {
-+	if (--ring->irq_refcount == 0) {
- 		dev_priv->irq_mask |= ring->irq_enable_mask;
- 		I915_WRITE(IMR, dev_priv->irq_mask);
- 		POSTING_READ(IMR);
-@@ -910,7 +910,7 @@ i8xx_ring_get_irq(struct intel_ring_buffer *ring)
- 		return false;
- 
- 	spin_lock_irqsave(&dev_priv->irq_lock, flags);
--	if (ring->irq_refcount.gt++ == 0) {
-+	if (ring->irq_refcount++ == 0) {
- 		dev_priv->irq_mask &= ~ring->irq_enable_mask;
- 		I915_WRITE16(IMR, dev_priv->irq_mask);
- 		POSTING_READ16(IMR);
-@@ -928,7 +928,7 @@ i8xx_ring_put_irq(struct intel_ring_buffer *ring)
- 	unsigned long flags;
- 
- 	spin_lock_irqsave(&dev_priv->irq_lock, flags);
--	if (--ring->irq_refcount.gt == 0) {
-+	if (--ring->irq_refcount == 0) {
- 		dev_priv->irq_mask |= ring->irq_enable_mask;
- 		I915_WRITE16(IMR, dev_priv->irq_mask);
- 		POSTING_READ16(IMR);
-@@ -1033,7 +1033,7 @@ gen6_ring_get_irq(struct intel_ring_buffer *ring)
- 	gen6_gt_force_wake_get(dev_priv);
- 
- 	spin_lock_irqsave(&dev_priv->irq_lock, flags);
--	if (ring->irq_refcount.gt++ == 0) {
-+	if (ring->irq_refcount++ == 0) {
- 		if (HAS_L3_GPU_CACHE(dev) && ring->id == RCS)
- 			I915_WRITE_IMR(ring,
- 				       ~(ring->irq_enable_mask |
-@@ -1057,7 +1057,7 @@ gen6_ring_put_irq(struct intel_ring_buffer *ring)
- 	unsigned long flags;
- 
- 	spin_lock_irqsave(&dev_priv->irq_lock, flags);
--	if (--ring->irq_refcount.gt == 0) {
-+	if (--ring->irq_refcount == 0) {
- 		if (HAS_L3_GPU_CACHE(dev) && ring->id == RCS)
- 			I915_WRITE_IMR(ring,
- 				       ~GT_RENDER_L3_PARITY_ERROR_INTERRUPT);
-@@ -1083,7 +1083,7 @@ hsw_vebox_get_irq(struct intel_ring_buffer *ring)
- 		return false;
- 
- 	spin_lock_irqsave(&dev_priv->irq_lock, flags);
--	if (ring->irq_refcount.pm++ == 0) {
-+	if (ring->irq_refcount++ == 0) {
- 		u32 pm_imr = I915_READ(GEN6_PMIMR);
- 		I915_WRITE_IMR(ring, ~ring->irq_enable_mask);
- 		I915_WRITE(GEN6_PMIMR, pm_imr & ~ring->irq_enable_mask);
-@@ -1105,7 +1105,7 @@ hsw_vebox_put_irq(struct intel_ring_buffer *ring)
- 		return;
- 
- 	spin_lock_irqsave(&dev_priv->irq_lock, flags);
--	if (--ring->irq_refcount.pm == 0) {
-+	if (--ring->irq_refcount == 0) {
- 		u32 pm_imr = I915_READ(GEN6_PMIMR);
- 		I915_WRITE_IMR(ring, ~0);
- 		I915_WRITE(GEN6_PMIMR, pm_imr | ring->irq_enable_mask);
-diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
-index 8a87b3f9974c..6e38256d41e1 100644
---- a/drivers/gpu/drm/i915/intel_ringbuffer.h
-+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
-@@ -78,10 +78,7 @@ struct  intel_ring_buffer {
- 	 */
- 	u32		last_retired_head;
- 
--	struct {
--		u32	gt; /*  protected by dev_priv->irq_lock */
--		u32	pm; /*  protected by dev_priv->irq_lock */
--	} irq_refcount;
-+	unsigned irq_refcount; /* protected by dev_priv->irq_lock */
- 	u32		irq_enable_mask;	/* bitmask to enable ring interrupt */
- 	u32		trace_irq_seqno;
- 	u32		sync_seqno[I915_NUM_RINGS-1];
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0452-drm-i915-don-t-enable-PM_VEBOX_CS_ERROR_INTERRUPT.patch b/patches.baytrail/0452-drm-i915-don-t-enable-PM_VEBOX_CS_ERROR_INTERRUPT.patch
deleted file mode 100644
index c81899eab2160..0000000000000
--- a/patches.baytrail/0452-drm-i915-don-t-enable-PM_VEBOX_CS_ERROR_INTERRUPT.patch
+++ /dev/null
@@ -1,55 +0,0 @@
-From 0c4b34c049b3ff05e65bd2f75ddafb84365d8b8f Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 4 Jul 2013 23:35:30 +0200
-Subject: drm/i915: don't enable PM_VEBOX_CS_ERROR_INTERRUPT
-
-The code to handle it is broken - there's simply no code to clear CS
-parser errors on gen5+. And behold, for all the other rings we also
-don't enable it!
-
-Leave the handling code itself in place just to be consistent with the
-existing mess though. And in case someone feels like fixing it all up.
-
-This has been errornously enabled in
-
-commit 12638c57f31952127c734c26315e1348fa1334c2
-Author: Ben Widawsky <ben@bwidawsk.net>
-Date:   Tue May 28 19:22:31 2013 -0700
-
-    drm/i915: Enable vebox interrupts
-
-Cc: Damien Lespiau <damien.lespiau@intel.com>
-Cc: Ben Widawsky <ben@bwidawsk.net>
-Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit c0d6a3dd61d46a640ead0a9d38b78ca22d37a304)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c         |    3 +--
- drivers/gpu/drm/i915/intel_ringbuffer.c |    3 +--
- 2 files changed, 2 insertions(+), 4 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -2860,8 +2860,7 @@ static int ivybridge_irq_postinstall(str
- 
- 	I915_WRITE(GEN6_PMIIR, I915_READ(GEN6_PMIIR));
- 	if (HAS_VEBOX(dev))
--		pm_irqs |= PM_VEBOX_USER_INTERRUPT |
--			PM_VEBOX_CS_ERROR_INTERRUPT;
-+		pm_irqs |= PM_VEBOX_USER_INTERRUPT;
- 
- 	/* Our enable/disable rps functions may touch these registers so
- 	 * make sure to set a known state for only the non-RPS bits.
---- a/drivers/gpu/drm/i915/intel_ringbuffer.c
-+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
-@@ -2024,8 +2024,7 @@ int intel_init_vebox_ring_buffer(struct
- 	ring->add_request = gen6_add_request;
- 	ring->get_seqno = gen6_ring_get_seqno;
- 	ring->set_seqno = ring_set_seqno;
--	ring->irq_enable_mask = PM_VEBOX_USER_INTERRUPT |
--		PM_VEBOX_CS_ERROR_INTERRUPT;
-+	ring->irq_enable_mask = PM_VEBOX_USER_INTERRUPT;
- 	ring->irq_get = hsw_vebox_get_irq;
- 	ring->irq_put = hsw_vebox_put_irq;
- 	ring->dispatch_execbuffer = gen6_ring_dispatch_execbuffer;
diff --git a/patches.baytrail/0453-drm-i915-Use-for_each_pipe-when-possible.patch b/patches.baytrail/0453-drm-i915-Use-for_each_pipe-when-possible.patch
deleted file mode 100644
index e76e3c868411d..0000000000000
--- a/patches.baytrail/0453-drm-i915-Use-for_each_pipe-when-possible.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From 7b59d9e8ca7135f620eaf6d829bcc0c2a97bba4a Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Thu, 11 Jul 2013 20:10:54 +0100
-Subject: drm/i915: Use for_each_pipe() when possible
-
-Came accross two open coding of for_each_pipe(), might as well use the
-macro.
-
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 08e2a7de8ec86054a1272e4fc9d15fa6c18d3b16)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 7ab60c74dff4..861dcc5d4ebf 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -1131,7 +1131,7 @@ static void assert_planes_disabled(struct drm_i915_private *dev_priv,
- 	}
- 
- 	/* Need to check both planes against the pipe */
--	for (i = 0; i < INTEL_INFO(dev)->num_pipes; i++) {
-+	for_each_pipe(i) {
- 		reg = DSPCNTR(i);
- 		val = I915_READ(reg);
- 		cur_pipe = (val & DISPPLANE_SEL_PIPE_MASK) >>
-@@ -9739,7 +9739,7 @@ void intel_modeset_init(struct drm_device *dev)
- 		      INTEL_INFO(dev)->num_pipes,
- 		      INTEL_INFO(dev)->num_pipes > 1 ? "s" : "");
- 
--	for (i = 0; i < INTEL_INFO(dev)->num_pipes; i++) {
-+	for_each_pipe(i) {
- 		intel_crtc_init(dev, i);
- 		for (j = 0; j < dev_priv->num_plane; j++) {
- 			ret = intel_plane_init(dev, i, j);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0454-drm-i915-Don-t-attempt-to-read-an-unitialized-stack-.patch b/patches.baytrail/0454-drm-i915-Don-t-attempt-to-read-an-unitialized-stack-.patch
deleted file mode 100644
index bae79b49eb4fe..0000000000000
--- a/patches.baytrail/0454-drm-i915-Don-t-attempt-to-read-an-unitialized-stack-.patch
+++ /dev/null
@@ -1,61 +0,0 @@
-From 5463eed827d33a796298cd360ea5663c1aecaba5 Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Fri, 12 Jul 2013 16:24:40 +0100
-Subject: drm/i915: Don't attempt to read an unitialized stack value
-
-If intel_sdvo_get_value() fails here, val is unitialized and the cross
-check will compare the pipe config multiplier with a bogus value.
-
-Instead, only set encoder_pixel_multiplier when the sdvo command has
-been successful. The cross check will compare the pipe config value with
-0 otherwise.
-
-v2: Do the cross check with the initial value of encoder_pixel_multiplier (0)
-if the sdvo command fails (and thus keep the warning) (Daniel Vetter)
-
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 53b914084950e5766b40228c4e08706e28745fa5)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_sdvo.c | 24 +++++++++++++-----------
- 1 file changed, 13 insertions(+), 11 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
-index 8415d6a610dd..798df114cfd3 100644
---- a/drivers/gpu/drm/i915/intel_sdvo.c
-+++ b/drivers/gpu/drm/i915/intel_sdvo.c
-@@ -1357,17 +1357,19 @@ static void intel_sdvo_get_config(struct intel_encoder *encoder,
- 	}
- 
- 	/* Cross check the port pixel multiplier with the sdvo encoder state. */
--	intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_CLOCK_RATE_MULT, &val, 1);
--	switch (val) {
--	case SDVO_CLOCK_RATE_MULT_1X:
--		encoder_pixel_multiplier = 1;
--		break;
--	case SDVO_CLOCK_RATE_MULT_2X:
--		encoder_pixel_multiplier = 2;
--		break;
--	case SDVO_CLOCK_RATE_MULT_4X:
--		encoder_pixel_multiplier = 4;
--		break;
-+	if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_CLOCK_RATE_MULT,
-+				 &val, 1)) {
-+		switch (val) {
-+		case SDVO_CLOCK_RATE_MULT_1X:
-+			encoder_pixel_multiplier = 1;
-+			break;
-+		case SDVO_CLOCK_RATE_MULT_2X:
-+			encoder_pixel_multiplier = 2;
-+			break;
-+		case SDVO_CLOCK_RATE_MULT_4X:
-+			encoder_pixel_multiplier = 4;
-+			break;
-+		}
- 	}
- 
- 	WARN(encoder_pixel_multiplier != pipe_config->pixel_multiplier,
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0455-drm-i915-move-error-state-to-own-compilation-unit.patch b/patches.baytrail/0455-drm-i915-move-error-state-to-own-compilation-unit.patch
deleted file mode 100644
index 39a0283b47d53..0000000000000
--- a/patches.baytrail/0455-drm-i915-move-error-state-to-own-compilation-unit.patch
+++ /dev/null
@@ -1,2120 +0,0 @@
-From 9a93870372ecf1f32901e1a1cae23f64cdf412fd Mon Sep 17 00:00:00 2001
-From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
-Date: Fri, 12 Jul 2013 16:50:57 +0300
-Subject: drm/i915: move error state to own compilation unit
-
-Move error state generation and stringification to it's
-own compilation unit. Sysfs also uses this so it can't be
-under CONFIG_DEBUG_FS
-
-This fixes a regression introduced in
-
-commit ef86ddced720fddc3835558447a7f594d3609c73
-Author: Mika Kuoppala <mika.kuoppala@linux.intel.com>
-Date:   Thu Jun 6 17:38:54 2013 +0300
-
-    drm/i915: add error_state sysfs entry
-
-Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=66814
-Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Reported-by: kbuild test robot <fengguang.wu@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 84734a049d0ef2f6f5fb0a1fe060cd51480dd855)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/Makefile         |    1 
- drivers/gpu/drm/i915/i915_debugfs.c   |  415 --------------
- drivers/gpu/drm/i915/i915_drv.h       |   24 
- drivers/gpu/drm/i915/i915_gpu_error.c |  971 ++++++++++++++++++++++++++++++++++
- drivers/gpu/drm/i915/i915_irq.c       |  529 ------------------
- drivers/gpu/drm/i915/intel_display.c  |    4 
- drivers/gpu/drm/i915/intel_overlay.c  |    4 
- 7 files changed, 983 insertions(+), 965 deletions(-)
- create mode 100644 drivers/gpu/drm/i915/i915_gpu_error.c
-
---- a/drivers/gpu/drm/i915/Makefile
-+++ b/drivers/gpu/drm/i915/Makefile
-@@ -5,6 +5,7 @@
- ccflags-y := -Iinclude/drm
- i915-y := i915_drv.o i915_dma.o i915_irq.o \
- 	  i915_debugfs.o \
-+	  i915_gpu_error.o \
-           i915_suspend.o \
- 	  i915_gem.o \
- 	  i915_gem_context.o \
---- a/drivers/gpu/drm/i915/i915_debugfs.c
-+++ b/drivers/gpu/drm/i915/i915_debugfs.c
-@@ -30,7 +30,6 @@
- #include <linux/debugfs.h>
- #include <linux/slab.h>
- #include <linux/export.h>
--#include <generated/utsrelease.h>
- #include <drm/drmP.h>
- #include "intel_drv.h"
- #include "intel_ringbuffer.h"
-@@ -90,16 +89,6 @@ static const char *get_tiling_flag(struc
- 	}
- }
- 
--static const char *cache_level_str(int type)
--{
--	switch (type) {
--	case I915_CACHE_NONE: return " uncached";
--	case I915_CACHE_LLC: return " snooped (LLC)";
--	case I915_CACHE_LLC_MLC: return " snooped (LLC+MLC)";
--	default: return "";
--	}
--}
--
- static void
- describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj)
- {
-@@ -113,7 +102,7 @@ describe_obj(struct seq_file *m, struct
- 		   obj->last_read_seqno,
- 		   obj->last_write_seqno,
- 		   obj->last_fenced_seqno,
--		   cache_level_str(obj->cache_level),
-+		   i915_cache_level_str(obj->cache_level),
- 		   obj->dirty ? " dirty" : "",
- 		   obj->madv == I915_MADV_DONTNEED ? " purgeable" : "");
- 	if (obj->base.name)
-@@ -608,358 +597,6 @@ static int i915_hws_info(struct seq_file
- 	return 0;
- }
- 
--static const char *ring_str(int ring)
--{
--	switch (ring) {
--	case RCS: return "render";
--	case VCS: return "bsd";
--	case BCS: return "blt";
--	case VECS: return "vebox";
--	default: return "";
--	}
--}
--
--static const char *pin_flag(int pinned)
--{
--	if (pinned > 0)
--		return " P";
--	else if (pinned < 0)
--		return " p";
--	else
--		return "";
--}
--
--static const char *tiling_flag(int tiling)
--{
--	switch (tiling) {
--	default:
--	case I915_TILING_NONE: return "";
--	case I915_TILING_X: return " X";
--	case I915_TILING_Y: return " Y";
--	}
--}
--
--static const char *dirty_flag(int dirty)
--{
--	return dirty ? " dirty" : "";
--}
--
--static const char *purgeable_flag(int purgeable)
--{
--	return purgeable ? " purgeable" : "";
--}
--
--static bool __i915_error_ok(struct drm_i915_error_state_buf *e)
--{
--
--	if (!e->err && WARN(e->bytes > (e->size - 1), "overflow")) {
--		e->err = -ENOSPC;
--		return false;
--	}
--
--	if (e->bytes == e->size - 1 || e->err)
--		return false;
--
--	return true;
--}
--
--static bool __i915_error_seek(struct drm_i915_error_state_buf *e,
--			      unsigned len)
--{
--	if (e->pos + len <= e->start) {
--		e->pos += len;
--		return false;
--	}
--
--	/* First vsnprintf needs to fit in its entirety for memmove */
--	if (len >= e->size) {
--		e->err = -EIO;
--		return false;
--	}
--
--	return true;
--}
--
--static void __i915_error_advance(struct drm_i915_error_state_buf *e,
--				 unsigned len)
--{
--	/* If this is first printf in this window, adjust it so that
--	 * start position matches start of the buffer
--	 */
--
--	if (e->pos < e->start) {
--		const size_t off = e->start - e->pos;
--
--		/* Should not happen but be paranoid */
--		if (off > len || e->bytes) {
--			e->err = -EIO;
--			return;
--		}
--
--		memmove(e->buf, e->buf + off, len - off);
--		e->bytes = len - off;
--		e->pos = e->start;
--		return;
--	}
--
--	e->bytes += len;
--	e->pos += len;
--}
--
--static void i915_error_vprintf(struct drm_i915_error_state_buf *e,
--			       const char *f, va_list args)
--{
--	unsigned len;
--
--	if (!__i915_error_ok(e))
--		return;
--
--	/* Seek the first printf which is hits start position */
--	if (e->pos < e->start) {
--		len = vsnprintf(NULL, 0, f, args);
--		if (!__i915_error_seek(e, len))
--			return;
--	}
--
--	len = vsnprintf(e->buf + e->bytes, e->size - e->bytes, f, args);
--	if (len >= e->size - e->bytes)
--		len = e->size - e->bytes - 1;
--
--	__i915_error_advance(e, len);
--}
--
--static void i915_error_puts(struct drm_i915_error_state_buf *e,
--			    const char *str)
--{
--	unsigned len;
--
--	if (!__i915_error_ok(e))
--		return;
--
--	len = strlen(str);
--
--	/* Seek the first printf which is hits start position */
--	if (e->pos < e->start) {
--		if (!__i915_error_seek(e, len))
--			return;
--	}
--
--	if (len >= e->size - e->bytes)
--		len = e->size - e->bytes - 1;
--	memcpy(e->buf + e->bytes, str, len);
--
--	__i915_error_advance(e, len);
--}
--
--void i915_error_printf(struct drm_i915_error_state_buf *e, const char *f, ...)
--{
--	va_list args;
--
--	va_start(args, f);
--	i915_error_vprintf(e, f, args);
--	va_end(args);
--}
--
--#define err_printf(e, ...) i915_error_printf(e, __VA_ARGS__)
--#define err_puts(e, s) i915_error_puts(e, s)
--
--static void print_error_buffers(struct drm_i915_error_state_buf *m,
--				const char *name,
--				struct drm_i915_error_buffer *err,
--				int count)
--{
--	err_printf(m, "%s [%d]:\n", name, count);
--
--	while (count--) {
--		err_printf(m, "  %08x %8u %02x %02x %x %x",
--			   err->gtt_offset,
--			   err->size,
--			   err->read_domains,
--			   err->write_domain,
--			   err->rseqno, err->wseqno);
--		err_puts(m, pin_flag(err->pinned));
--		err_puts(m, tiling_flag(err->tiling));
--		err_puts(m, dirty_flag(err->dirty));
--		err_puts(m, purgeable_flag(err->purgeable));
--		err_puts(m, err->ring != -1 ? " " : "");
--		err_puts(m, ring_str(err->ring));
--		err_puts(m, cache_level_str(err->cache_level));
--
--		if (err->name)
--			err_printf(m, " (name: %d)", err->name);
--		if (err->fence_reg != I915_FENCE_REG_NONE)
--			err_printf(m, " (fence: %d)", err->fence_reg);
--
--		err_puts(m, "\n");
--		err++;
--	}
--}
--
--static void i915_ring_error_state(struct drm_i915_error_state_buf *m,
--				  struct drm_device *dev,
--				  struct drm_i915_error_state *error,
--				  unsigned ring)
--{
--	BUG_ON(ring >= I915_NUM_RINGS); /* shut up confused gcc */
--	err_printf(m, "%s command stream:\n", ring_str(ring));
--	err_printf(m, "  HEAD: 0x%08x\n", error->head[ring]);
--	err_printf(m, "  TAIL: 0x%08x\n", error->tail[ring]);
--	err_printf(m, "  CTL: 0x%08x\n", error->ctl[ring]);
--	err_printf(m, "  ACTHD: 0x%08x\n", error->acthd[ring]);
--	err_printf(m, "  IPEIR: 0x%08x\n", error->ipeir[ring]);
--	err_printf(m, "  IPEHR: 0x%08x\n", error->ipehr[ring]);
--	err_printf(m, "  INSTDONE: 0x%08x\n", error->instdone[ring]);
--	if (ring == RCS && INTEL_INFO(dev)->gen >= 4)
--		err_printf(m, "  BBADDR: 0x%08llx\n", error->bbaddr);
--
--	if (INTEL_INFO(dev)->gen >= 4)
--		err_printf(m, "  INSTPS: 0x%08x\n", error->instps[ring]);
--	err_printf(m, "  INSTPM: 0x%08x\n", error->instpm[ring]);
--	err_printf(m, "  FADDR: 0x%08x\n", error->faddr[ring]);
--	if (INTEL_INFO(dev)->gen >= 6) {
--		err_printf(m, "  RC PSMI: 0x%08x\n", error->rc_psmi[ring]);
--		err_printf(m, "  FAULT_REG: 0x%08x\n", error->fault_reg[ring]);
--		err_printf(m, "  SYNC_0: 0x%08x [last synced 0x%08x]\n",
--			   error->semaphore_mboxes[ring][0],
--			   error->semaphore_seqno[ring][0]);
--		err_printf(m, "  SYNC_1: 0x%08x [last synced 0x%08x]\n",
--			   error->semaphore_mboxes[ring][1],
--			   error->semaphore_seqno[ring][1]);
--	}
--	err_printf(m, "  seqno: 0x%08x\n", error->seqno[ring]);
--	err_printf(m, "  waiting: %s\n", yesno(error->waiting[ring]));
--	err_printf(m, "  ring->head: 0x%08x\n", error->cpu_ring_head[ring]);
--	err_printf(m, "  ring->tail: 0x%08x\n", error->cpu_ring_tail[ring]);
--}
--
--int i915_error_state_to_str(struct drm_i915_error_state_buf *m,
--			    const struct i915_error_state_file_priv *error_priv)
--{
--	struct drm_device *dev = error_priv->dev;
--	drm_i915_private_t *dev_priv = dev->dev_private;
--	struct drm_i915_error_state *error = error_priv->error;
--	struct intel_ring_buffer *ring;
--	int i, j, page, offset, elt;
--
--	if (!error) {
--		err_printf(m, "no error state collected\n");
--		goto out;
--	}
--
--	err_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec,
--		   error->time.tv_usec);
--	err_printf(m, "Kernel: " UTS_RELEASE "\n");
--	err_printf(m, "PCI ID: 0x%04x\n", dev->pci_device);
--	err_printf(m, "EIR: 0x%08x\n", error->eir);
--	err_printf(m, "IER: 0x%08x\n", error->ier);
--	err_printf(m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er);
--	err_printf(m, "FORCEWAKE: 0x%08x\n", error->forcewake);
--	err_printf(m, "DERRMR: 0x%08x\n", error->derrmr);
--	err_printf(m, "CCID: 0x%08x\n", error->ccid);
--
--	for (i = 0; i < dev_priv->num_fence_regs; i++)
--		err_printf(m, "  fence[%d] = %08llx\n", i, error->fence[i]);
--
--	for (i = 0; i < ARRAY_SIZE(error->extra_instdone); i++)
--		err_printf(m, "  INSTDONE_%d: 0x%08x\n", i,
--			   error->extra_instdone[i]);
--
--	if (INTEL_INFO(dev)->gen >= 6) {
--		err_printf(m, "ERROR: 0x%08x\n", error->error);
--		err_printf(m, "DONE_REG: 0x%08x\n", error->done_reg);
--	}
--
--	if (INTEL_INFO(dev)->gen == 7)
--		err_printf(m, "ERR_INT: 0x%08x\n", error->err_int);
--
--	for_each_ring(ring, dev_priv, i)
--		i915_ring_error_state(m, dev, error, i);
--
--	if (error->active_bo)
--		print_error_buffers(m, "Active",
--				    error->active_bo,
--				    error->active_bo_count);
--
--	if (error->pinned_bo)
--		print_error_buffers(m, "Pinned",
--				    error->pinned_bo,
--				    error->pinned_bo_count);
--
--	for (i = 0; i < ARRAY_SIZE(error->ring); i++) {
--		struct drm_i915_error_object *obj;
--
--		if ((obj = error->ring[i].batchbuffer)) {
--			err_printf(m, "%s --- gtt_offset = 0x%08x\n",
--				   dev_priv->ring[i].name,
--				   obj->gtt_offset);
--			offset = 0;
--			for (page = 0; page < obj->page_count; page++) {
--				for (elt = 0; elt < PAGE_SIZE/4; elt++) {
--					err_printf(m, "%08x :  %08x\n", offset,
--						   obj->pages[page][elt]);
--					offset += 4;
--				}
--			}
--		}
--
--		if (error->ring[i].num_requests) {
--			err_printf(m, "%s --- %d requests\n",
--				   dev_priv->ring[i].name,
--				   error->ring[i].num_requests);
--			for (j = 0; j < error->ring[i].num_requests; j++) {
--				err_printf(m, "  seqno 0x%08x, emitted %ld, tail 0x%08x\n",
--					   error->ring[i].requests[j].seqno,
--					   error->ring[i].requests[j].jiffies,
--					   error->ring[i].requests[j].tail);
--			}
--		}
--
--		if ((obj = error->ring[i].ringbuffer)) {
--			err_printf(m, "%s --- ringbuffer = 0x%08x\n",
--				   dev_priv->ring[i].name,
--				   obj->gtt_offset);
--			offset = 0;
--			for (page = 0; page < obj->page_count; page++) {
--				for (elt = 0; elt < PAGE_SIZE/4; elt++) {
--					err_printf(m, "%08x :  %08x\n",
--						   offset,
--						   obj->pages[page][elt]);
--					offset += 4;
--				}
--			}
--		}
--
--		obj = error->ring[i].ctx;
--		if (obj) {
--			err_printf(m, "%s --- HW Context = 0x%08x\n",
--				   dev_priv->ring[i].name,
--				   obj->gtt_offset);
--			offset = 0;
--			for (elt = 0; elt < PAGE_SIZE/16; elt += 4) {
--				err_printf(m, "[%04x] %08x %08x %08x %08x\n",
--					   offset,
--					   obj->pages[0][elt],
--					   obj->pages[0][elt+1],
--					   obj->pages[0][elt+2],
--					   obj->pages[0][elt+3]);
--					offset += 16;
--			}
--		}
--	}
--
--	if (error->overlay)
--		intel_overlay_print_error_state(m, error->overlay);
--
--	if (error->display)
--		intel_display_print_error_state(m, dev, error->display);
--
--out:
--	if (m->bytes == 0 && m->err)
--		return m->err;
--
--	return 0;
--}
--
- static ssize_t
- i915_error_state_write(struct file *filp,
- 		       const char __user *ubuf,
-@@ -982,26 +619,6 @@ i915_error_state_write(struct file *filp
- 	return cnt;
- }
- 
--void i915_error_state_get(struct drm_device *dev,
--			  struct i915_error_state_file_priv *error_priv)
--{
--	struct drm_i915_private *dev_priv = dev->dev_private;
--	unsigned long flags;
--
--	spin_lock_irqsave(&dev_priv->gpu_error.lock, flags);
--	error_priv->error = dev_priv->gpu_error.first_error;
--	if (error_priv->error)
--		kref_get(&error_priv->error->ref);
--	spin_unlock_irqrestore(&dev_priv->gpu_error.lock, flags);
--
--}
--
--void i915_error_state_put(struct i915_error_state_file_priv *error_priv)
--{
--	if (error_priv->error)
--		kref_put(&error_priv->error->ref, i915_error_state_free);
--}
--
- static int i915_error_state_open(struct inode *inode, struct file *file)
- {
- 	struct drm_device *dev = inode->i_private;
-@@ -1029,36 +646,6 @@ static int i915_error_state_release(stru
- 
- 	return 0;
- }
--
--int i915_error_state_buf_init(struct drm_i915_error_state_buf *ebuf,
--			      size_t count, loff_t pos)
--{
--	memset(ebuf, 0, sizeof(*ebuf));
--
--	/* We need to have enough room to store any i915_error_state printf
--	 * so that we can move it to start position.
--	 */
--	ebuf->size = count + 1 > PAGE_SIZE ? count + 1 : PAGE_SIZE;
--	ebuf->buf = kmalloc(ebuf->size,
--				GFP_TEMPORARY | __GFP_NORETRY | __GFP_NOWARN);
--
--	if (ebuf->buf == NULL) {
--		ebuf->size = PAGE_SIZE;
--		ebuf->buf = kmalloc(ebuf->size, GFP_TEMPORARY);
--	}
--
--	if (ebuf->buf == NULL) {
--		ebuf->size = 128;
--		ebuf->buf = kmalloc(ebuf->size, GFP_TEMPORARY);
--	}
--
--	if (ebuf->buf == NULL)
--		return -ENOMEM;
--
--	ebuf->start = pos;
--
--	return 0;
--}
- 
- static ssize_t i915_error_state_read(struct file *file, char __user *userbuf,
- 				     size_t count, loff_t *pos)
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1629,21 +1629,12 @@ extern void intel_hpd_init(struct drm_de
- extern void intel_gt_init(struct drm_device *dev);
- extern void intel_gt_sanitize(struct drm_device *dev);
- 
--void i915_error_state_free(struct kref *error_ref);
--
- void
- i915_enable_pipestat(drm_i915_private_t *dev_priv, int pipe, u32 mask);
- 
- void
- i915_disable_pipestat(drm_i915_private_t *dev_priv, int pipe, u32 mask);
- 
--#ifdef CONFIG_DEBUG_FS
--extern void i915_destroy_error_state(struct drm_device *dev);
--#else
--#define i915_destroy_error_state(x)
--#endif
--
--
- /* i915_gem.c */
- int i915_gem_init_ioctl(struct drm_device *dev, void *data,
- 			struct drm_file *file_priv);
-@@ -1954,13 +1945,12 @@ void i915_gem_dump_object(struct drm_i91
- /* i915_debugfs.c */
- int i915_debugfs_init(struct drm_minor *minor);
- void i915_debugfs_cleanup(struct drm_minor *minor);
-+
-+/* i915_gpu_error.c */
- __printf(2, 3)
- void i915_error_printf(struct drm_i915_error_state_buf *e, const char *f, ...);
- int i915_error_state_to_str(struct drm_i915_error_state_buf *estr,
- 			    const struct i915_error_state_file_priv *error);
--void i915_error_state_get(struct drm_device *dev,
--			  struct i915_error_state_file_priv *error_priv);
--void i915_error_state_put(struct i915_error_state_file_priv *error_priv);
- int i915_error_state_buf_init(struct drm_i915_error_state_buf *eb,
- 			      size_t count, loff_t pos);
- static inline void i915_error_state_buf_release(
-@@ -1968,6 +1958,14 @@ static inline void i915_error_state_buf_
- {
- 	kfree(eb->buf);
- }
-+void i915_capture_error_state(struct drm_device *dev);
-+void i915_error_state_get(struct drm_device *dev,
-+			  struct i915_error_state_file_priv *error_priv);
-+void i915_error_state_put(struct i915_error_state_file_priv *error_priv);
-+void i915_destroy_error_state(struct drm_device *dev);
-+
-+void i915_get_extra_instdone(struct drm_device *dev, uint32_t *instdone);
-+const char *i915_cache_level_str(int type);
- 
- /* i915_suspend.c */
- extern int i915_save_state(struct drm_device *dev);
-@@ -2047,7 +2045,6 @@ int i915_reg_read_ioctl(struct drm_devic
- 			struct drm_file *file);
- 
- /* overlay */
--#ifdef CONFIG_DEBUG_FS
- extern struct intel_overlay_error_state *intel_overlay_capture_error_state(struct drm_device *dev);
- extern void intel_overlay_print_error_state(struct drm_i915_error_state_buf *e,
- 					    struct intel_overlay_error_state *error);
-@@ -2056,7 +2053,6 @@ extern struct intel_display_error_state
- extern void intel_display_print_error_state(struct drm_i915_error_state_buf *e,
- 					    struct drm_device *dev,
- 					    struct intel_display_error_state *error);
--#endif
- 
- /* On SNB platform, before reading ring registers forcewake bit
-  * must be set to prevent GT core from power down and stale values being
---- /dev/null
-+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
-@@ -0,0 +1,971 @@
-+/*
-+ * Copyright (c) 2008 Intel Corporation
-+ *
-+ * Permission is hereby granted, free of charge, to any person obtaining a
-+ * copy of this software and associated documentation files (the "Software"),
-+ * to deal in the Software without restriction, including without limitation
-+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
-+ * and/or sell copies of the Software, and to permit persons to whom the
-+ * Software is furnished to do so, subject to the following conditions:
-+ *
-+ * The above copyright notice and this permission notice (including the next
-+ * paragraph) shall be included in all copies or substantial portions of the
-+ * Software.
-+ *
-+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
-+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
-+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
-+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
-+ * IN THE SOFTWARE.
-+ *
-+ * Authors:
-+ *    Eric Anholt <eric@anholt.net>
-+ *    Keith Packard <keithp@keithp.com>
-+ *    Mika Kuoppala <mika.kuoppala@intel.com>
-+ *
-+ */
-+
-+#include <generated/utsrelease.h>
-+#include "i915_drv.h"
-+
-+static const char *yesno(int v)
-+{
-+	return v ? "yes" : "no";
-+}
-+
-+static const char *ring_str(int ring)
-+{
-+	switch (ring) {
-+	case RCS: return "render";
-+	case VCS: return "bsd";
-+	case BCS: return "blt";
-+	case VECS: return "vebox";
-+	default: return "";
-+	}
-+}
-+
-+static const char *pin_flag(int pinned)
-+{
-+	if (pinned > 0)
-+		return " P";
-+	else if (pinned < 0)
-+		return " p";
-+	else
-+		return "";
-+}
-+
-+static const char *tiling_flag(int tiling)
-+{
-+	switch (tiling) {
-+	default:
-+	case I915_TILING_NONE: return "";
-+	case I915_TILING_X: return " X";
-+	case I915_TILING_Y: return " Y";
-+	}
-+}
-+
-+static const char *dirty_flag(int dirty)
-+{
-+	return dirty ? " dirty" : "";
-+}
-+
-+static const char *purgeable_flag(int purgeable)
-+{
-+	return purgeable ? " purgeable" : "";
-+}
-+
-+static bool __i915_error_ok(struct drm_i915_error_state_buf *e)
-+{
-+
-+	if (!e->err && WARN(e->bytes > (e->size - 1), "overflow")) {
-+		e->err = -ENOSPC;
-+		return false;
-+	}
-+
-+	if (e->bytes == e->size - 1 || e->err)
-+		return false;
-+
-+	return true;
-+}
-+
-+static bool __i915_error_seek(struct drm_i915_error_state_buf *e,
-+			      unsigned len)
-+{
-+	if (e->pos + len <= e->start) {
-+		e->pos += len;
-+		return false;
-+	}
-+
-+	/* First vsnprintf needs to fit in its entirety for memmove */
-+	if (len >= e->size) {
-+		e->err = -EIO;
-+		return false;
-+	}
-+
-+	return true;
-+}
-+
-+static void __i915_error_advance(struct drm_i915_error_state_buf *e,
-+				 unsigned len)
-+{
-+	/* If this is first printf in this window, adjust it so that
-+	 * start position matches start of the buffer
-+	 */
-+
-+	if (e->pos < e->start) {
-+		const size_t off = e->start - e->pos;
-+
-+		/* Should not happen but be paranoid */
-+		if (off > len || e->bytes) {
-+			e->err = -EIO;
-+			return;
-+		}
-+
-+		memmove(e->buf, e->buf + off, len - off);
-+		e->bytes = len - off;
-+		e->pos = e->start;
-+		return;
-+	}
-+
-+	e->bytes += len;
-+	e->pos += len;
-+}
-+
-+static void i915_error_vprintf(struct drm_i915_error_state_buf *e,
-+			       const char *f, va_list args)
-+{
-+	unsigned len;
-+
-+	if (!__i915_error_ok(e))
-+		return;
-+
-+	/* Seek the first printf which is hits start position */
-+	if (e->pos < e->start) {
-+		len = vsnprintf(NULL, 0, f, args);
-+		if (!__i915_error_seek(e, len))
-+			return;
-+	}
-+
-+	len = vsnprintf(e->buf + e->bytes, e->size - e->bytes, f, args);
-+	if (len >= e->size - e->bytes)
-+		len = e->size - e->bytes - 1;
-+
-+	__i915_error_advance(e, len);
-+}
-+
-+static void i915_error_puts(struct drm_i915_error_state_buf *e,
-+			    const char *str)
-+{
-+	unsigned len;
-+
-+	if (!__i915_error_ok(e))
-+		return;
-+
-+	len = strlen(str);
-+
-+	/* Seek the first printf which is hits start position */
-+	if (e->pos < e->start) {
-+		if (!__i915_error_seek(e, len))
-+			return;
-+	}
-+
-+	if (len >= e->size - e->bytes)
-+		len = e->size - e->bytes - 1;
-+	memcpy(e->buf + e->bytes, str, len);
-+
-+	__i915_error_advance(e, len);
-+}
-+
-+#define err_printf(e, ...) i915_error_printf(e, __VA_ARGS__)
-+#define err_puts(e, s) i915_error_puts(e, s)
-+
-+static void print_error_buffers(struct drm_i915_error_state_buf *m,
-+				const char *name,
-+				struct drm_i915_error_buffer *err,
-+				int count)
-+{
-+	err_printf(m, "%s [%d]:\n", name, count);
-+
-+	while (count--) {
-+		err_printf(m, "  %08x %8u %02x %02x %x %x",
-+			   err->gtt_offset,
-+			   err->size,
-+			   err->read_domains,
-+			   err->write_domain,
-+			   err->rseqno, err->wseqno);
-+		err_puts(m, pin_flag(err->pinned));
-+		err_puts(m, tiling_flag(err->tiling));
-+		err_puts(m, dirty_flag(err->dirty));
-+		err_puts(m, purgeable_flag(err->purgeable));
-+		err_puts(m, err->ring != -1 ? " " : "");
-+		err_puts(m, ring_str(err->ring));
-+		err_puts(m, i915_cache_level_str(err->cache_level));
-+
-+		if (err->name)
-+			err_printf(m, " (name: %d)", err->name);
-+		if (err->fence_reg != I915_FENCE_REG_NONE)
-+			err_printf(m, " (fence: %d)", err->fence_reg);
-+
-+		err_puts(m, "\n");
-+		err++;
-+	}
-+}
-+
-+static void i915_ring_error_state(struct drm_i915_error_state_buf *m,
-+				  struct drm_device *dev,
-+				  struct drm_i915_error_state *error,
-+				  unsigned ring)
-+{
-+	BUG_ON(ring >= I915_NUM_RINGS); /* shut up confused gcc */
-+	err_printf(m, "%s command stream:\n", ring_str(ring));
-+	err_printf(m, "  HEAD: 0x%08x\n", error->head[ring]);
-+	err_printf(m, "  TAIL: 0x%08x\n", error->tail[ring]);
-+	err_printf(m, "  CTL: 0x%08x\n", error->ctl[ring]);
-+	err_printf(m, "  ACTHD: 0x%08x\n", error->acthd[ring]);
-+	err_printf(m, "  IPEIR: 0x%08x\n", error->ipeir[ring]);
-+	err_printf(m, "  IPEHR: 0x%08x\n", error->ipehr[ring]);
-+	err_printf(m, "  INSTDONE: 0x%08x\n", error->instdone[ring]);
-+	if (ring == RCS && INTEL_INFO(dev)->gen >= 4)
-+		err_printf(m, "  BBADDR: 0x%08llx\n", error->bbaddr);
-+
-+	if (INTEL_INFO(dev)->gen >= 4)
-+		err_printf(m, "  INSTPS: 0x%08x\n", error->instps[ring]);
-+	err_printf(m, "  INSTPM: 0x%08x\n", error->instpm[ring]);
-+	err_printf(m, "  FADDR: 0x%08x\n", error->faddr[ring]);
-+	if (INTEL_INFO(dev)->gen >= 6) {
-+		err_printf(m, "  RC PSMI: 0x%08x\n", error->rc_psmi[ring]);
-+		err_printf(m, "  FAULT_REG: 0x%08x\n", error->fault_reg[ring]);
-+		err_printf(m, "  SYNC_0: 0x%08x [last synced 0x%08x]\n",
-+			   error->semaphore_mboxes[ring][0],
-+			   error->semaphore_seqno[ring][0]);
-+		err_printf(m, "  SYNC_1: 0x%08x [last synced 0x%08x]\n",
-+			   error->semaphore_mboxes[ring][1],
-+			   error->semaphore_seqno[ring][1]);
-+	}
-+	err_printf(m, "  seqno: 0x%08x\n", error->seqno[ring]);
-+	err_printf(m, "  waiting: %s\n", yesno(error->waiting[ring]));
-+	err_printf(m, "  ring->head: 0x%08x\n", error->cpu_ring_head[ring]);
-+	err_printf(m, "  ring->tail: 0x%08x\n", error->cpu_ring_tail[ring]);
-+}
-+
-+void i915_error_printf(struct drm_i915_error_state_buf *e, const char *f, ...)
-+{
-+	va_list args;
-+
-+	va_start(args, f);
-+	i915_error_vprintf(e, f, args);
-+	va_end(args);
-+}
-+
-+int i915_error_state_to_str(struct drm_i915_error_state_buf *m,
-+			    const struct i915_error_state_file_priv *error_priv)
-+{
-+	struct drm_device *dev = error_priv->dev;
-+	drm_i915_private_t *dev_priv = dev->dev_private;
-+	struct drm_i915_error_state *error = error_priv->error;
-+	struct intel_ring_buffer *ring;
-+	int i, j, page, offset, elt;
-+
-+	if (!error) {
-+		err_printf(m, "no error state collected\n");
-+		goto out;
-+	}
-+
-+	err_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec,
-+		   error->time.tv_usec);
-+	err_printf(m, "Kernel: " UTS_RELEASE "\n");
-+	err_printf(m, "PCI ID: 0x%04x\n", dev->pci_device);
-+	err_printf(m, "EIR: 0x%08x\n", error->eir);
-+	err_printf(m, "IER: 0x%08x\n", error->ier);
-+	err_printf(m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er);
-+	err_printf(m, "FORCEWAKE: 0x%08x\n", error->forcewake);
-+	err_printf(m, "DERRMR: 0x%08x\n", error->derrmr);
-+	err_printf(m, "CCID: 0x%08x\n", error->ccid);
-+
-+	for (i = 0; i < dev_priv->num_fence_regs; i++)
-+		err_printf(m, "  fence[%d] = %08llx\n", i, error->fence[i]);
-+
-+	for (i = 0; i < ARRAY_SIZE(error->extra_instdone); i++)
-+		err_printf(m, "  INSTDONE_%d: 0x%08x\n", i,
-+			   error->extra_instdone[i]);
-+
-+	if (INTEL_INFO(dev)->gen >= 6) {
-+		err_printf(m, "ERROR: 0x%08x\n", error->error);
-+		err_printf(m, "DONE_REG: 0x%08x\n", error->done_reg);
-+	}
-+
-+	if (INTEL_INFO(dev)->gen == 7)
-+		err_printf(m, "ERR_INT: 0x%08x\n", error->err_int);
-+
-+	for_each_ring(ring, dev_priv, i)
-+		i915_ring_error_state(m, dev, error, i);
-+
-+	if (error->active_bo)
-+		print_error_buffers(m, "Active",
-+				    error->active_bo,
-+				    error->active_bo_count);
-+
-+	if (error->pinned_bo)
-+		print_error_buffers(m, "Pinned",
-+				    error->pinned_bo,
-+				    error->pinned_bo_count);
-+
-+	for (i = 0; i < ARRAY_SIZE(error->ring); i++) {
-+		struct drm_i915_error_object *obj;
-+
-+		if ((obj = error->ring[i].batchbuffer)) {
-+			err_printf(m, "%s --- gtt_offset = 0x%08x\n",
-+				   dev_priv->ring[i].name,
-+				   obj->gtt_offset);
-+			offset = 0;
-+			for (page = 0; page < obj->page_count; page++) {
-+				for (elt = 0; elt < PAGE_SIZE/4; elt++) {
-+					err_printf(m, "%08x :  %08x\n", offset,
-+						   obj->pages[page][elt]);
-+					offset += 4;
-+				}
-+			}
-+		}
-+
-+		if (error->ring[i].num_requests) {
-+			err_printf(m, "%s --- %d requests\n",
-+				   dev_priv->ring[i].name,
-+				   error->ring[i].num_requests);
-+			for (j = 0; j < error->ring[i].num_requests; j++) {
-+				err_printf(m, "  seqno 0x%08x, emitted %ld, tail 0x%08x\n",
-+					   error->ring[i].requests[j].seqno,
-+					   error->ring[i].requests[j].jiffies,
-+					   error->ring[i].requests[j].tail);
-+			}
-+		}
-+
-+		if ((obj = error->ring[i].ringbuffer)) {
-+			err_printf(m, "%s --- ringbuffer = 0x%08x\n",
-+				   dev_priv->ring[i].name,
-+				   obj->gtt_offset);
-+			offset = 0;
-+			for (page = 0; page < obj->page_count; page++) {
-+				for (elt = 0; elt < PAGE_SIZE/4; elt++) {
-+					err_printf(m, "%08x :  %08x\n",
-+						   offset,
-+						   obj->pages[page][elt]);
-+					offset += 4;
-+				}
-+			}
-+		}
-+
-+		obj = error->ring[i].ctx;
-+		if (obj) {
-+			err_printf(m, "%s --- HW Context = 0x%08x\n",
-+				   dev_priv->ring[i].name,
-+				   obj->gtt_offset);
-+			offset = 0;
-+			for (elt = 0; elt < PAGE_SIZE/16; elt += 4) {
-+				err_printf(m, "[%04x] %08x %08x %08x %08x\n",
-+					   offset,
-+					   obj->pages[0][elt],
-+					   obj->pages[0][elt+1],
-+					   obj->pages[0][elt+2],
-+					   obj->pages[0][elt+3]);
-+					offset += 16;
-+			}
-+		}
-+	}
-+
-+	if (error->overlay)
-+		intel_overlay_print_error_state(m, error->overlay);
-+
-+	if (error->display)
-+		intel_display_print_error_state(m, dev, error->display);
-+
-+out:
-+	if (m->bytes == 0 && m->err)
-+		return m->err;
-+
-+	return 0;
-+}
-+
-+int i915_error_state_buf_init(struct drm_i915_error_state_buf *ebuf,
-+			      size_t count, loff_t pos)
-+{
-+	memset(ebuf, 0, sizeof(*ebuf));
-+
-+	/* We need to have enough room to store any i915_error_state printf
-+	 * so that we can move it to start position.
-+	 */
-+	ebuf->size = count + 1 > PAGE_SIZE ? count + 1 : PAGE_SIZE;
-+	ebuf->buf = kmalloc(ebuf->size,
-+				GFP_TEMPORARY | __GFP_NORETRY | __GFP_NOWARN);
-+
-+	if (ebuf->buf == NULL) {
-+		ebuf->size = PAGE_SIZE;
-+		ebuf->buf = kmalloc(ebuf->size, GFP_TEMPORARY);
-+	}
-+
-+	if (ebuf->buf == NULL) {
-+		ebuf->size = 128;
-+		ebuf->buf = kmalloc(ebuf->size, GFP_TEMPORARY);
-+	}
-+
-+	if (ebuf->buf == NULL)
-+		return -ENOMEM;
-+
-+	ebuf->start = pos;
-+
-+	return 0;
-+}
-+
-+static void i915_error_object_free(struct drm_i915_error_object *obj)
-+{
-+	int page;
-+
-+	if (obj == NULL)
-+		return;
-+
-+	for (page = 0; page < obj->page_count; page++)
-+		kfree(obj->pages[page]);
-+
-+	kfree(obj);
-+}
-+
-+static void i915_error_state_free(struct kref *error_ref)
-+{
-+	struct drm_i915_error_state *error = container_of(error_ref,
-+							  typeof(*error), ref);
-+	int i;
-+
-+	for (i = 0; i < ARRAY_SIZE(error->ring); i++) {
-+		i915_error_object_free(error->ring[i].batchbuffer);
-+		i915_error_object_free(error->ring[i].ringbuffer);
-+		i915_error_object_free(error->ring[i].ctx);
-+		kfree(error->ring[i].requests);
-+	}
-+
-+	kfree(error->active_bo);
-+	kfree(error->overlay);
-+	kfree(error->display);
-+	kfree(error);
-+}
-+
-+static struct drm_i915_error_object *
-+i915_error_object_create_sized(struct drm_i915_private *dev_priv,
-+			       struct drm_i915_gem_object *src,
-+			       const int num_pages)
-+{
-+	struct drm_i915_error_object *dst;
-+	int i;
-+	u32 reloc_offset;
-+
-+	if (src == NULL || src->pages == NULL)
-+		return NULL;
-+
-+	dst = kmalloc(sizeof(*dst) + num_pages * sizeof(u32 *), GFP_ATOMIC);
-+	if (dst == NULL)
-+		return NULL;
-+
-+	reloc_offset = dst->gtt_offset = i915_gem_obj_ggtt_offset(src);
-+	for (i = 0; i < num_pages; i++) {
-+		unsigned long flags;
-+		void *d;
-+
-+		d = kmalloc(PAGE_SIZE, GFP_ATOMIC);
-+		if (d == NULL)
-+			goto unwind;
-+
-+		local_irq_save(flags);
-+		if (reloc_offset < dev_priv->gtt.mappable_end &&
-+		    src->has_global_gtt_mapping) {
-+			void __iomem *s;
-+
-+			/* Simply ignore tiling or any overlapping fence.
-+			 * It's part of the error state, and this hopefully
-+			 * captures what the GPU read.
-+			 */
-+
-+			s = io_mapping_map_atomic_wc(dev_priv->gtt.mappable,
-+						     reloc_offset);
-+			memcpy_fromio(d, s, PAGE_SIZE);
-+			io_mapping_unmap_atomic(s);
-+		} else if (src->stolen) {
-+			unsigned long offset;
-+
-+			offset = dev_priv->mm.stolen_base;
-+			offset += src->stolen->start;
-+			offset += i << PAGE_SHIFT;
-+
-+			memcpy_fromio(d, (void __iomem *) offset, PAGE_SIZE);
-+		} else {
-+			struct page *page;
-+			void *s;
-+
-+			page = i915_gem_object_get_page(src, i);
-+
-+			drm_clflush_pages(&page, 1);
-+
-+			s = kmap_atomic(page);
-+			memcpy(d, s, PAGE_SIZE);
-+			kunmap_atomic(s);
-+
-+			drm_clflush_pages(&page, 1);
-+		}
-+		local_irq_restore(flags);
-+
-+		dst->pages[i] = d;
-+
-+		reloc_offset += PAGE_SIZE;
-+	}
-+	dst->page_count = num_pages;
-+
-+	return dst;
-+
-+unwind:
-+	while (i--)
-+		kfree(dst->pages[i]);
-+	kfree(dst);
-+	return NULL;
-+}
-+#define i915_error_object_create(dev_priv, src) \
-+	i915_error_object_create_sized((dev_priv), (src), \
-+				       (src)->base.size>>PAGE_SHIFT)
-+
-+static void capture_bo(struct drm_i915_error_buffer *err,
-+		       struct drm_i915_gem_object *obj)
-+{
-+	err->size = obj->base.size;
-+	err->name = obj->base.name;
-+	err->rseqno = obj->last_read_seqno;
-+	err->wseqno = obj->last_write_seqno;
-+	err->gtt_offset = i915_gem_obj_ggtt_offset(obj);
-+	err->read_domains = obj->base.read_domains;
-+	err->write_domain = obj->base.write_domain;
-+	err->fence_reg = obj->fence_reg;
-+	err->pinned = 0;
-+	if (obj->pin_count > 0)
-+		err->pinned = 1;
-+	if (obj->user_pin_count > 0)
-+		err->pinned = -1;
-+	err->tiling = obj->tiling_mode;
-+	err->dirty = obj->dirty;
-+	err->purgeable = obj->madv != I915_MADV_WILLNEED;
-+	err->ring = obj->ring ? obj->ring->id : -1;
-+	err->cache_level = obj->cache_level;
-+}
-+
-+static u32 capture_active_bo(struct drm_i915_error_buffer *err,
-+			     int count, struct list_head *head)
-+{
-+	struct drm_i915_gem_object *obj;
-+	int i = 0;
-+
-+	list_for_each_entry(obj, head, mm_list) {
-+		capture_bo(err++, obj);
-+		if (++i == count)
-+			break;
-+	}
-+
-+	return i;
-+}
-+
-+static u32 capture_pinned_bo(struct drm_i915_error_buffer *err,
-+			     int count, struct list_head *head)
-+{
-+	struct drm_i915_gem_object *obj;
-+	int i = 0;
-+
-+	list_for_each_entry(obj, head, global_list) {
-+		if (obj->pin_count == 0)
-+			continue;
-+
-+		capture_bo(err++, obj);
-+		if (++i == count)
-+			break;
-+	}
-+
-+	return i;
-+}
-+
-+static void i915_gem_record_fences(struct drm_device *dev,
-+				   struct drm_i915_error_state *error)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	int i;
-+
-+	/* Fences */
-+	switch (INTEL_INFO(dev)->gen) {
-+	case 7:
-+	case 6:
-+		for (i = 0; i < dev_priv->num_fence_regs; i++)
-+			error->fence[i] = I915_READ64(FENCE_REG_SANDYBRIDGE_0 + (i * 8));
-+		break;
-+	case 5:
-+	case 4:
-+		for (i = 0; i < 16; i++)
-+			error->fence[i] = I915_READ64(FENCE_REG_965_0 + (i * 8));
-+		break;
-+	case 3:
-+		if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev))
-+			for (i = 0; i < 8; i++)
-+				error->fence[i+8] = I915_READ(FENCE_REG_945_8 + (i * 4));
-+	case 2:
-+		for (i = 0; i < 8; i++)
-+			error->fence[i] = I915_READ(FENCE_REG_830_0 + (i * 4));
-+		break;
-+
-+	default:
-+		BUG();
-+	}
-+}
-+
-+static struct drm_i915_error_object *
-+i915_error_first_batchbuffer(struct drm_i915_private *dev_priv,
-+			     struct intel_ring_buffer *ring)
-+{
-+	struct drm_i915_gem_object *obj;
-+	u32 seqno;
-+
-+	if (!ring->get_seqno)
-+		return NULL;
-+
-+	if (HAS_BROKEN_CS_TLB(dev_priv->dev)) {
-+		u32 acthd = I915_READ(ACTHD);
-+
-+		if (WARN_ON(ring->id != RCS))
-+			return NULL;
-+
-+		obj = ring->private;
-+		if (acthd >= i915_gem_obj_ggtt_offset(obj) &&
-+		    acthd < i915_gem_obj_ggtt_offset(obj) + obj->base.size)
-+			return i915_error_object_create(dev_priv, obj);
-+	}
-+
-+	seqno = ring->get_seqno(ring, false);
-+	list_for_each_entry(obj, &dev_priv->mm.active_list, mm_list) {
-+		if (obj->ring != ring)
-+			continue;
-+
-+		if (i915_seqno_passed(seqno, obj->last_read_seqno))
-+			continue;
-+
-+		if ((obj->base.read_domains & I915_GEM_DOMAIN_COMMAND) == 0)
-+			continue;
-+
-+		/* We need to copy these to an anonymous buffer as the simplest
-+		 * method to avoid being overwritten by userspace.
-+		 */
-+		return i915_error_object_create(dev_priv, obj);
-+	}
-+
-+	return NULL;
-+}
-+
-+static void i915_record_ring_state(struct drm_device *dev,
-+				   struct drm_i915_error_state *error,
-+				   struct intel_ring_buffer *ring)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+
-+	if (INTEL_INFO(dev)->gen >= 6) {
-+		error->rc_psmi[ring->id] = I915_READ(ring->mmio_base + 0x50);
-+		error->fault_reg[ring->id] = I915_READ(RING_FAULT_REG(ring));
-+		error->semaphore_mboxes[ring->id][0]
-+			= I915_READ(RING_SYNC_0(ring->mmio_base));
-+		error->semaphore_mboxes[ring->id][1]
-+			= I915_READ(RING_SYNC_1(ring->mmio_base));
-+		error->semaphore_seqno[ring->id][0] = ring->sync_seqno[0];
-+		error->semaphore_seqno[ring->id][1] = ring->sync_seqno[1];
-+	}
-+
-+	if (INTEL_INFO(dev)->gen >= 4) {
-+		error->faddr[ring->id] = I915_READ(RING_DMA_FADD(ring->mmio_base));
-+		error->ipeir[ring->id] = I915_READ(RING_IPEIR(ring->mmio_base));
-+		error->ipehr[ring->id] = I915_READ(RING_IPEHR(ring->mmio_base));
-+		error->instdone[ring->id] = I915_READ(RING_INSTDONE(ring->mmio_base));
-+		error->instps[ring->id] = I915_READ(RING_INSTPS(ring->mmio_base));
-+		if (ring->id == RCS)
-+			error->bbaddr = I915_READ64(BB_ADDR);
-+	} else {
-+		error->faddr[ring->id] = I915_READ(DMA_FADD_I8XX);
-+		error->ipeir[ring->id] = I915_READ(IPEIR);
-+		error->ipehr[ring->id] = I915_READ(IPEHR);
-+		error->instdone[ring->id] = I915_READ(INSTDONE);
-+	}
-+
-+	error->waiting[ring->id] = waitqueue_active(&ring->irq_queue);
-+	error->instpm[ring->id] = I915_READ(RING_INSTPM(ring->mmio_base));
-+	error->seqno[ring->id] = ring->get_seqno(ring, false);
-+	error->acthd[ring->id] = intel_ring_get_active_head(ring);
-+	error->head[ring->id] = I915_READ_HEAD(ring);
-+	error->tail[ring->id] = I915_READ_TAIL(ring);
-+	error->ctl[ring->id] = I915_READ_CTL(ring);
-+
-+	error->cpu_ring_head[ring->id] = ring->head;
-+	error->cpu_ring_tail[ring->id] = ring->tail;
-+}
-+
-+
-+static void i915_gem_record_active_context(struct intel_ring_buffer *ring,
-+					   struct drm_i915_error_state *error,
-+					   struct drm_i915_error_ring *ering)
-+{
-+	struct drm_i915_private *dev_priv = ring->dev->dev_private;
-+	struct drm_i915_gem_object *obj;
-+
-+	/* Currently render ring is the only HW context user */
-+	if (ring->id != RCS || !error->ccid)
-+		return;
-+
-+	list_for_each_entry(obj, &dev_priv->mm.bound_list, global_list) {
-+		if ((error->ccid & PAGE_MASK) == i915_gem_obj_ggtt_offset(obj)) {
-+			ering->ctx = i915_error_object_create_sized(dev_priv,
-+								    obj, 1);
-+			break;
-+		}
-+	}
-+}
-+
-+static void i915_gem_record_rings(struct drm_device *dev,
-+				  struct drm_i915_error_state *error)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct intel_ring_buffer *ring;
-+	struct drm_i915_gem_request *request;
-+	int i, count;
-+
-+	for_each_ring(ring, dev_priv, i) {
-+		i915_record_ring_state(dev, error, ring);
-+
-+		error->ring[i].batchbuffer =
-+			i915_error_first_batchbuffer(dev_priv, ring);
-+
-+		error->ring[i].ringbuffer =
-+			i915_error_object_create(dev_priv, ring->obj);
-+
-+
-+		i915_gem_record_active_context(ring, error, &error->ring[i]);
-+
-+		count = 0;
-+		list_for_each_entry(request, &ring->request_list, list)
-+			count++;
-+
-+		error->ring[i].num_requests = count;
-+		error->ring[i].requests =
-+			kmalloc(count*sizeof(struct drm_i915_error_request),
-+				GFP_ATOMIC);
-+		if (error->ring[i].requests == NULL) {
-+			error->ring[i].num_requests = 0;
-+			continue;
-+		}
-+
-+		count = 0;
-+		list_for_each_entry(request, &ring->request_list, list) {
-+			struct drm_i915_error_request *erq;
-+
-+			erq = &error->ring[i].requests[count++];
-+			erq->seqno = request->seqno;
-+			erq->jiffies = request->emitted_jiffies;
-+			erq->tail = request->tail;
-+		}
-+	}
-+}
-+
-+static void i915_gem_capture_buffers(struct drm_i915_private *dev_priv,
-+				     struct drm_i915_error_state *error)
-+{
-+	struct drm_i915_gem_object *obj;
-+	int i;
-+
-+	i = 0;
-+	list_for_each_entry(obj, &dev_priv->mm.active_list, mm_list)
-+		i++;
-+	error->active_bo_count = i;
-+	list_for_each_entry(obj, &dev_priv->mm.bound_list, global_list)
-+		if (obj->pin_count)
-+			i++;
-+	error->pinned_bo_count = i - error->active_bo_count;
-+
-+	if (i) {
-+		error->active_bo = kmalloc(sizeof(*error->active_bo)*i,
-+					   GFP_ATOMIC);
-+		if (error->active_bo)
-+			error->pinned_bo =
-+				error->active_bo + error->active_bo_count;
-+	}
-+
-+	if (error->active_bo)
-+		error->active_bo_count =
-+			capture_active_bo(error->active_bo,
-+					  error->active_bo_count,
-+					  &dev_priv->mm.active_list);
-+
-+	if (error->pinned_bo)
-+		error->pinned_bo_count =
-+			capture_pinned_bo(error->pinned_bo,
-+					  error->pinned_bo_count,
-+					  &dev_priv->mm.bound_list);
-+}
-+
-+/**
-+ * i915_capture_error_state - capture an error record for later analysis
-+ * @dev: drm device
-+ *
-+ * Should be called when an error is detected (either a hang or an error
-+ * interrupt) to capture error state from the time of the error.  Fills
-+ * out a structure which becomes available in debugfs for user level tools
-+ * to pick up.
-+ */
-+void i915_capture_error_state(struct drm_device *dev)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct drm_i915_error_state *error;
-+	unsigned long flags;
-+	int pipe;
-+
-+	spin_lock_irqsave(&dev_priv->gpu_error.lock, flags);
-+	error = dev_priv->gpu_error.first_error;
-+	spin_unlock_irqrestore(&dev_priv->gpu_error.lock, flags);
-+	if (error)
-+		return;
-+
-+	/* Account for pipe specific data like PIPE*STAT */
-+	error = kzalloc(sizeof(*error), GFP_ATOMIC);
-+	if (!error) {
-+		DRM_DEBUG_DRIVER("out of memory, not capturing error state\n");
-+		return;
-+	}
-+
-+	DRM_INFO("capturing error event; look for more information in "
-+		 "/sys/class/drm/card%d/error\n", dev->primary->index);
-+
-+	kref_init(&error->ref);
-+	error->eir = I915_READ(EIR);
-+	error->pgtbl_er = I915_READ(PGTBL_ER);
-+	if (HAS_HW_CONTEXTS(dev))
-+		error->ccid = I915_READ(CCID);
-+
-+	if (HAS_PCH_SPLIT(dev))
-+		error->ier = I915_READ(DEIER) | I915_READ(GTIER);
-+	else if (IS_VALLEYVIEW(dev))
-+		error->ier = I915_READ(GTIER) | I915_READ(VLV_IER);
-+	else if (IS_GEN2(dev))
-+		error->ier = I915_READ16(IER);
-+	else
-+		error->ier = I915_READ(IER);
-+
-+	if (INTEL_INFO(dev)->gen >= 6)
-+		error->derrmr = I915_READ(DERRMR);
-+
-+	if (IS_VALLEYVIEW(dev))
-+		error->forcewake = I915_READ(FORCEWAKE_VLV);
-+	else if (INTEL_INFO(dev)->gen >= 7)
-+		error->forcewake = I915_READ(FORCEWAKE_MT);
-+	else if (INTEL_INFO(dev)->gen == 6)
-+		error->forcewake = I915_READ(FORCEWAKE);
-+
-+	if (!HAS_PCH_SPLIT(dev))
-+		for_each_pipe(pipe)
-+			error->pipestat[pipe] = I915_READ(PIPESTAT(pipe));
-+
-+	if (INTEL_INFO(dev)->gen >= 6) {
-+		error->error = I915_READ(ERROR_GEN6);
-+		error->done_reg = I915_READ(DONE_REG);
-+	}
-+
-+	if (INTEL_INFO(dev)->gen == 7)
-+		error->err_int = I915_READ(GEN7_ERR_INT);
-+
-+	i915_get_extra_instdone(dev, error->extra_instdone);
-+
-+	i915_gem_capture_buffers(dev_priv, error);
-+	i915_gem_record_fences(dev, error);
-+	i915_gem_record_rings(dev, error);
-+
-+	do_gettimeofday(&error->time);
-+
-+	error->overlay = intel_overlay_capture_error_state(dev);
-+	error->display = intel_display_capture_error_state(dev);
-+
-+	spin_lock_irqsave(&dev_priv->gpu_error.lock, flags);
-+	if (dev_priv->gpu_error.first_error == NULL) {
-+		dev_priv->gpu_error.first_error = error;
-+		error = NULL;
-+	}
-+	spin_unlock_irqrestore(&dev_priv->gpu_error.lock, flags);
-+
-+	if (error)
-+		i915_error_state_free(&error->ref);
-+}
-+
-+void i915_error_state_get(struct drm_device *dev,
-+			  struct i915_error_state_file_priv *error_priv)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	unsigned long flags;
-+
-+	spin_lock_irqsave(&dev_priv->gpu_error.lock, flags);
-+	error_priv->error = dev_priv->gpu_error.first_error;
-+	if (error_priv->error)
-+		kref_get(&error_priv->error->ref);
-+	spin_unlock_irqrestore(&dev_priv->gpu_error.lock, flags);
-+
-+}
-+
-+void i915_error_state_put(struct i915_error_state_file_priv *error_priv)
-+{
-+	if (error_priv->error)
-+		kref_put(&error_priv->error->ref, i915_error_state_free);
-+}
-+
-+void i915_destroy_error_state(struct drm_device *dev)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct drm_i915_error_state *error;
-+	unsigned long flags;
-+
-+	spin_lock_irqsave(&dev_priv->gpu_error.lock, flags);
-+	error = dev_priv->gpu_error.first_error;
-+	dev_priv->gpu_error.first_error = NULL;
-+	spin_unlock_irqrestore(&dev_priv->gpu_error.lock, flags);
-+
-+	if (error)
-+		kref_put(&error->ref, i915_error_state_free);
-+}
-+
-+const char *i915_cache_level_str(int type)
-+{
-+	switch (type) {
-+	case I915_CACHE_NONE: return " uncached";
-+	case I915_CACHE_LLC: return " snooped (LLC)";
-+	case I915_CACHE_LLC_MLC: return " snooped (LLC+MLC)";
-+	default: return "";
-+	}
-+}
-+
-+/* NB: please notice the memset */
-+void i915_get_extra_instdone(struct drm_device *dev, uint32_t *instdone)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	memset(instdone, 0, sizeof(*instdone) * I915_NUM_INSTDONE_REG);
-+
-+	switch (INTEL_INFO(dev)->gen) {
-+	case 2:
-+	case 3:
-+		instdone[0] = I915_READ(INSTDONE);
-+		break;
-+	case 4:
-+	case 5:
-+	case 6:
-+		instdone[0] = I915_READ(INSTDONE_I965);
-+		instdone[1] = I915_READ(INSTDONE1);
-+		break;
-+	default:
-+		WARN_ONCE(1, "Unsupported platform\n");
-+	case 7:
-+		instdone[0] = I915_READ(GEN7_INSTDONE_1);
-+		instdone[1] = I915_READ(GEN7_SC_INSTDONE);
-+		instdone[2] = I915_READ(GEN7_SAMPLER_INSTDONE);
-+		instdone[3] = I915_READ(GEN7_ROW_INSTDONE);
-+		break;
-+	}
-+}
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -1527,535 +1527,6 @@ static void i915_error_work_func(struct
- 	}
- }
- 
--/* NB: please notice the memset */
--static void i915_get_extra_instdone(struct drm_device *dev,
--				    uint32_t *instdone)
--{
--	struct drm_i915_private *dev_priv = dev->dev_private;
--	memset(instdone, 0, sizeof(*instdone) * I915_NUM_INSTDONE_REG);
--
--	switch(INTEL_INFO(dev)->gen) {
--	case 2:
--	case 3:
--		instdone[0] = I915_READ(INSTDONE);
--		break;
--	case 4:
--	case 5:
--	case 6:
--		instdone[0] = I915_READ(INSTDONE_I965);
--		instdone[1] = I915_READ(INSTDONE1);
--		break;
--	default:
--		WARN_ONCE(1, "Unsupported platform\n");
--	case 7:
--		instdone[0] = I915_READ(GEN7_INSTDONE_1);
--		instdone[1] = I915_READ(GEN7_SC_INSTDONE);
--		instdone[2] = I915_READ(GEN7_SAMPLER_INSTDONE);
--		instdone[3] = I915_READ(GEN7_ROW_INSTDONE);
--		break;
--	}
--}
--
--#ifdef CONFIG_DEBUG_FS
--static struct drm_i915_error_object *
--i915_error_object_create_sized(struct drm_i915_private *dev_priv,
--			       struct drm_i915_gem_object *src,
--			       const int num_pages)
--{
--	struct drm_i915_error_object *dst;
--	int i;
--	u32 reloc_offset;
--
--	if (src == NULL || src->pages == NULL)
--		return NULL;
--
--	dst = kmalloc(sizeof(*dst) + num_pages * sizeof(u32 *), GFP_ATOMIC);
--	if (dst == NULL)
--		return NULL;
--
--	reloc_offset = dst->gtt_offset = i915_gem_obj_ggtt_offset(src);
--	for (i = 0; i < num_pages; i++) {
--		unsigned long flags;
--		void *d;
--
--		d = kmalloc(PAGE_SIZE, GFP_ATOMIC);
--		if (d == NULL)
--			goto unwind;
--
--		local_irq_save(flags);
--		if (reloc_offset < dev_priv->gtt.mappable_end &&
--		    src->has_global_gtt_mapping) {
--			void __iomem *s;
--
--			/* Simply ignore tiling or any overlapping fence.
--			 * It's part of the error state, and this hopefully
--			 * captures what the GPU read.
--			 */
--
--			s = io_mapping_map_atomic_wc(dev_priv->gtt.mappable,
--						     reloc_offset);
--			memcpy_fromio(d, s, PAGE_SIZE);
--			io_mapping_unmap_atomic(s);
--		} else if (src->stolen) {
--			unsigned long offset;
--
--			offset = dev_priv->mm.stolen_base;
--			offset += src->stolen->start;
--			offset += i << PAGE_SHIFT;
--
--			memcpy_fromio(d, (void __iomem *) offset, PAGE_SIZE);
--		} else {
--			struct page *page;
--			void *s;
--
--			page = i915_gem_object_get_page(src, i);
--
--			drm_clflush_pages(&page, 1);
--
--			s = kmap_atomic(page);
--			memcpy(d, s, PAGE_SIZE);
--			kunmap_atomic(s);
--
--			drm_clflush_pages(&page, 1);
--		}
--		local_irq_restore(flags);
--
--		dst->pages[i] = d;
--
--		reloc_offset += PAGE_SIZE;
--	}
--	dst->page_count = num_pages;
--
--	return dst;
--
--unwind:
--	while (i--)
--		kfree(dst->pages[i]);
--	kfree(dst);
--	return NULL;
--}
--#define i915_error_object_create(dev_priv, src) \
--	i915_error_object_create_sized((dev_priv), (src), \
--				       (src)->base.size>>PAGE_SHIFT)
--
--static void
--i915_error_object_free(struct drm_i915_error_object *obj)
--{
--	int page;
--
--	if (obj == NULL)
--		return;
--
--	for (page = 0; page < obj->page_count; page++)
--		kfree(obj->pages[page]);
--
--	kfree(obj);
--}
--
--void
--i915_error_state_free(struct kref *error_ref)
--{
--	struct drm_i915_error_state *error = container_of(error_ref,
--							  typeof(*error), ref);
--	int i;
--
--	for (i = 0; i < ARRAY_SIZE(error->ring); i++) {
--		i915_error_object_free(error->ring[i].batchbuffer);
--		i915_error_object_free(error->ring[i].ringbuffer);
--		i915_error_object_free(error->ring[i].ctx);
--		kfree(error->ring[i].requests);
--	}
--
--	kfree(error->active_bo);
--	kfree(error->overlay);
--	kfree(error->display);
--	kfree(error);
--}
--static void capture_bo(struct drm_i915_error_buffer *err,
--		       struct drm_i915_gem_object *obj)
--{
--	err->size = obj->base.size;
--	err->name = obj->base.name;
--	err->rseqno = obj->last_read_seqno;
--	err->wseqno = obj->last_write_seqno;
--	err->gtt_offset = i915_gem_obj_ggtt_offset(obj);
--	err->read_domains = obj->base.read_domains;
--	err->write_domain = obj->base.write_domain;
--	err->fence_reg = obj->fence_reg;
--	err->pinned = 0;
--	if (obj->pin_count > 0)
--		err->pinned = 1;
--	if (obj->user_pin_count > 0)
--		err->pinned = -1;
--	err->tiling = obj->tiling_mode;
--	err->dirty = obj->dirty;
--	err->purgeable = obj->madv != I915_MADV_WILLNEED;
--	err->ring = obj->ring ? obj->ring->id : -1;
--	err->cache_level = obj->cache_level;
--}
--
--static u32 capture_active_bo(struct drm_i915_error_buffer *err,
--			     int count, struct list_head *head)
--{
--	struct drm_i915_gem_object *obj;
--	int i = 0;
--
--	list_for_each_entry(obj, head, mm_list) {
--		capture_bo(err++, obj);
--		if (++i == count)
--			break;
--	}
--
--	return i;
--}
--
--static u32 capture_pinned_bo(struct drm_i915_error_buffer *err,
--			     int count, struct list_head *head)
--{
--	struct drm_i915_gem_object *obj;
--	int i = 0;
--
--	list_for_each_entry(obj, head, global_list) {
--		if (obj->pin_count == 0)
--			continue;
--
--		capture_bo(err++, obj);
--		if (++i == count)
--			break;
--	}
--
--	return i;
--}
--
--static void i915_gem_record_fences(struct drm_device *dev,
--				   struct drm_i915_error_state *error)
--{
--	struct drm_i915_private *dev_priv = dev->dev_private;
--	int i;
--
--	/* Fences */
--	switch (INTEL_INFO(dev)->gen) {
--	case 7:
--	case 6:
--		for (i = 0; i < dev_priv->num_fence_regs; i++)
--			error->fence[i] = I915_READ64(FENCE_REG_SANDYBRIDGE_0 + (i * 8));
--		break;
--	case 5:
--	case 4:
--		for (i = 0; i < 16; i++)
--			error->fence[i] = I915_READ64(FENCE_REG_965_0 + (i * 8));
--		break;
--	case 3:
--		if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev))
--			for (i = 0; i < 8; i++)
--				error->fence[i+8] = I915_READ(FENCE_REG_945_8 + (i * 4));
--	case 2:
--		for (i = 0; i < 8; i++)
--			error->fence[i] = I915_READ(FENCE_REG_830_0 + (i * 4));
--		break;
--
--	default:
--		BUG();
--	}
--}
--
--static struct drm_i915_error_object *
--i915_error_first_batchbuffer(struct drm_i915_private *dev_priv,
--			     struct intel_ring_buffer *ring)
--{
--	struct drm_i915_gem_object *obj;
--	u32 seqno;
--
--	if (!ring->get_seqno)
--		return NULL;
--
--	if (HAS_BROKEN_CS_TLB(dev_priv->dev)) {
--		u32 acthd = I915_READ(ACTHD);
--
--		if (WARN_ON(ring->id != RCS))
--			return NULL;
--
--		obj = ring->private;
--		if (acthd >= i915_gem_obj_ggtt_offset(obj) &&
--		    acthd < i915_gem_obj_ggtt_offset(obj) + obj->base.size)
--			return i915_error_object_create(dev_priv, obj);
--	}
--
--	seqno = ring->get_seqno(ring, false);
--	list_for_each_entry(obj, &dev_priv->mm.active_list, mm_list) {
--		if (obj->ring != ring)
--			continue;
--
--		if (i915_seqno_passed(seqno, obj->last_read_seqno))
--			continue;
--
--		if ((obj->base.read_domains & I915_GEM_DOMAIN_COMMAND) == 0)
--			continue;
--
--		/* We need to copy these to an anonymous buffer as the simplest
--		 * method to avoid being overwritten by userspace.
--		 */
--		return i915_error_object_create(dev_priv, obj);
--	}
--
--	return NULL;
--}
--
--static void i915_record_ring_state(struct drm_device *dev,
--				   struct drm_i915_error_state *error,
--				   struct intel_ring_buffer *ring)
--{
--	struct drm_i915_private *dev_priv = dev->dev_private;
--
--	if (INTEL_INFO(dev)->gen >= 6) {
--		error->rc_psmi[ring->id] = I915_READ(ring->mmio_base + 0x50);
--		error->fault_reg[ring->id] = I915_READ(RING_FAULT_REG(ring));
--		error->semaphore_mboxes[ring->id][0]
--			= I915_READ(RING_SYNC_0(ring->mmio_base));
--		error->semaphore_mboxes[ring->id][1]
--			= I915_READ(RING_SYNC_1(ring->mmio_base));
--		error->semaphore_seqno[ring->id][0] = ring->sync_seqno[0];
--		error->semaphore_seqno[ring->id][1] = ring->sync_seqno[1];
--	}
--
--	if (INTEL_INFO(dev)->gen >= 4) {
--		error->faddr[ring->id] = I915_READ(RING_DMA_FADD(ring->mmio_base));
--		error->ipeir[ring->id] = I915_READ(RING_IPEIR(ring->mmio_base));
--		error->ipehr[ring->id] = I915_READ(RING_IPEHR(ring->mmio_base));
--		error->instdone[ring->id] = I915_READ(RING_INSTDONE(ring->mmio_base));
--		error->instps[ring->id] = I915_READ(RING_INSTPS(ring->mmio_base));
--		if (ring->id == RCS)
--			error->bbaddr = I915_READ64(BB_ADDR);
--	} else {
--		error->faddr[ring->id] = I915_READ(DMA_FADD_I8XX);
--		error->ipeir[ring->id] = I915_READ(IPEIR);
--		error->ipehr[ring->id] = I915_READ(IPEHR);
--		error->instdone[ring->id] = I915_READ(INSTDONE);
--	}
--
--	error->waiting[ring->id] = waitqueue_active(&ring->irq_queue);
--	error->instpm[ring->id] = I915_READ(RING_INSTPM(ring->mmio_base));
--	error->seqno[ring->id] = ring->get_seqno(ring, false);
--	error->acthd[ring->id] = intel_ring_get_active_head(ring);
--	error->head[ring->id] = I915_READ_HEAD(ring);
--	error->tail[ring->id] = I915_READ_TAIL(ring);
--	error->ctl[ring->id] = I915_READ_CTL(ring);
--
--	error->cpu_ring_head[ring->id] = ring->head;
--	error->cpu_ring_tail[ring->id] = ring->tail;
--}
--
--
--static void i915_gem_record_active_context(struct intel_ring_buffer *ring,
--					   struct drm_i915_error_state *error,
--					   struct drm_i915_error_ring *ering)
--{
--	struct drm_i915_private *dev_priv = ring->dev->dev_private;
--	struct drm_i915_gem_object *obj;
--
--	/* Currently render ring is the only HW context user */
--	if (ring->id != RCS || !error->ccid)
--		return;
--
--	list_for_each_entry(obj, &dev_priv->mm.bound_list, global_list) {
--		if ((error->ccid & PAGE_MASK) == i915_gem_obj_ggtt_offset(obj)) {
--			ering->ctx = i915_error_object_create_sized(dev_priv,
--								    obj, 1);
--			break;
--		}
--	}
--}
--
--static void i915_gem_record_rings(struct drm_device *dev,
--				  struct drm_i915_error_state *error)
--{
--	struct drm_i915_private *dev_priv = dev->dev_private;
--	struct intel_ring_buffer *ring;
--	struct drm_i915_gem_request *request;
--	int i, count;
--
--	for_each_ring(ring, dev_priv, i) {
--		i915_record_ring_state(dev, error, ring);
--
--		error->ring[i].batchbuffer =
--			i915_error_first_batchbuffer(dev_priv, ring);
--
--		error->ring[i].ringbuffer =
--			i915_error_object_create(dev_priv, ring->obj);
--
--
--		i915_gem_record_active_context(ring, error, &error->ring[i]);
--
--		count = 0;
--		list_for_each_entry(request, &ring->request_list, list)
--			count++;
--
--		error->ring[i].num_requests = count;
--		error->ring[i].requests =
--			kmalloc(count*sizeof(struct drm_i915_error_request),
--				GFP_ATOMIC);
--		if (error->ring[i].requests == NULL) {
--			error->ring[i].num_requests = 0;
--			continue;
--		}
--
--		count = 0;
--		list_for_each_entry(request, &ring->request_list, list) {
--			struct drm_i915_error_request *erq;
--
--			erq = &error->ring[i].requests[count++];
--			erq->seqno = request->seqno;
--			erq->jiffies = request->emitted_jiffies;
--			erq->tail = request->tail;
--		}
--	}
--}
--
--static void i915_gem_capture_buffers(struct drm_i915_private *dev_priv,
--				     struct drm_i915_error_state *error)
--{
--	struct drm_i915_gem_object *obj;
--	int i;
--
--	i = 0;
--	list_for_each_entry(obj, &dev_priv->mm.active_list, mm_list)
--		i++;
--	error->active_bo_count = i;
--	list_for_each_entry(obj, &dev_priv->mm.bound_list, global_list)
--		if (obj->pin_count)
--			i++;
--	error->pinned_bo_count = i - error->active_bo_count;
--
--	if (i) {
--		error->active_bo = kmalloc(sizeof(*error->active_bo)*i,
--					   GFP_ATOMIC);
--		if (error->active_bo)
--			error->pinned_bo =
--				error->active_bo + error->active_bo_count;
--	}
--
--	if (error->active_bo)
--		error->active_bo_count =
--			capture_active_bo(error->active_bo,
--					  error->active_bo_count,
--					  &dev_priv->mm.active_list);
--
--	if (error->pinned_bo)
--		error->pinned_bo_count =
--			capture_pinned_bo(error->pinned_bo,
--					  error->pinned_bo_count,
--					  &dev_priv->mm.bound_list);
--}
--
--/**
-- * i915_capture_error_state - capture an error record for later analysis
-- * @dev: drm device
-- *
-- * Should be called when an error is detected (either a hang or an error
-- * interrupt) to capture error state from the time of the error.  Fills
-- * out a structure which becomes available in debugfs for user level tools
-- * to pick up.
-- */
--static void i915_capture_error_state(struct drm_device *dev)
--{
--	struct drm_i915_private *dev_priv = dev->dev_private;
--	struct drm_i915_error_state *error;
--	unsigned long flags;
--	int pipe;
--
--	spin_lock_irqsave(&dev_priv->gpu_error.lock, flags);
--	error = dev_priv->gpu_error.first_error;
--	spin_unlock_irqrestore(&dev_priv->gpu_error.lock, flags);
--	if (error)
--		return;
--
--	/* Account for pipe specific data like PIPE*STAT */
--	error = kzalloc(sizeof(*error), GFP_ATOMIC);
--	if (!error) {
--		DRM_DEBUG_DRIVER("out of memory, not capturing error state\n");
--		return;
--	}
--
--	DRM_INFO("capturing error event; look for more information in "
--		 "/sys/class/drm/card%d/error\n", dev->primary->index);
--
--	kref_init(&error->ref);
--	error->eir = I915_READ(EIR);
--	error->pgtbl_er = I915_READ(PGTBL_ER);
--	if (HAS_HW_CONTEXTS(dev))
--		error->ccid = I915_READ(CCID);
--
--	if (HAS_PCH_SPLIT(dev))
--		error->ier = I915_READ(DEIER) | I915_READ(GTIER);
--	else if (IS_VALLEYVIEW(dev))
--		error->ier = I915_READ(GTIER) | I915_READ(VLV_IER);
--	else if (IS_GEN2(dev))
--		error->ier = I915_READ16(IER);
--	else
--		error->ier = I915_READ(IER);
--
--	if (INTEL_INFO(dev)->gen >= 6)
--		error->derrmr = I915_READ(DERRMR);
--
--	if (IS_VALLEYVIEW(dev))
--		error->forcewake = I915_READ(FORCEWAKE_VLV);
--	else if (INTEL_INFO(dev)->gen >= 7)
--		error->forcewake = I915_READ(FORCEWAKE_MT);
--	else if (INTEL_INFO(dev)->gen == 6)
--		error->forcewake = I915_READ(FORCEWAKE);
--
--	if (!HAS_PCH_SPLIT(dev))
--		for_each_pipe(pipe)
--			error->pipestat[pipe] = I915_READ(PIPESTAT(pipe));
--
--	if (INTEL_INFO(dev)->gen >= 6) {
--		error->error = I915_READ(ERROR_GEN6);
--		error->done_reg = I915_READ(DONE_REG);
--	}
--
--	if (INTEL_INFO(dev)->gen == 7)
--		error->err_int = I915_READ(GEN7_ERR_INT);
--
--	i915_get_extra_instdone(dev, error->extra_instdone);
--
--	i915_gem_capture_buffers(dev_priv, error);
--	i915_gem_record_fences(dev, error);
--	i915_gem_record_rings(dev, error);
--
--	do_gettimeofday(&error->time);
--
--	error->overlay = intel_overlay_capture_error_state(dev);
--	error->display = intel_display_capture_error_state(dev);
--
--	spin_lock_irqsave(&dev_priv->gpu_error.lock, flags);
--	if (dev_priv->gpu_error.first_error == NULL) {
--		dev_priv->gpu_error.first_error = error;
--		error = NULL;
--	}
--	spin_unlock_irqrestore(&dev_priv->gpu_error.lock, flags);
--
--	if (error)
--		i915_error_state_free(&error->ref);
--}
--
--void i915_destroy_error_state(struct drm_device *dev)
--{
--	struct drm_i915_private *dev_priv = dev->dev_private;
--	struct drm_i915_error_state *error;
--	unsigned long flags;
--
--	spin_lock_irqsave(&dev_priv->gpu_error.lock, flags);
--	error = dev_priv->gpu_error.first_error;
--	dev_priv->gpu_error.first_error = NULL;
--	spin_unlock_irqrestore(&dev_priv->gpu_error.lock, flags);
--
--	if (error)
--		kref_put(&error->ref, i915_error_state_free);
--}
--#else
--#define i915_capture_error_state(x)
--#endif
--
- static void i915_report_and_clear_eir(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -10216,9 +10216,6 @@ int intel_modeset_vga_set_state(struct d
- 	return 0;
- }
- 
--#ifdef CONFIG_DEBUG_FS
--#include <linux/seq_file.h>
--
- struct intel_display_error_state {
- 
- 	u32 power_well_driver;
-@@ -10390,4 +10387,3 @@ intel_display_print_error_state(struct d
- 		err_printf(m, "  VSYNC: %08x\n", error->transcoder[i].vsync);
- 	}
- }
--#endif
---- a/drivers/gpu/drm/i915/intel_overlay.c
-+++ b/drivers/gpu/drm/i915/intel_overlay.c
-@@ -1412,9 +1412,6 @@ void intel_cleanup_overlay(struct drm_de
- 	kfree(dev_priv->overlay);
- }
- 
--#ifdef CONFIG_DEBUG_FS
--#include <linux/seq_file.h>
--
- struct intel_overlay_error_state {
- 	struct overlay_registers regs;
- 	unsigned long base;
-@@ -1537,4 +1534,3 @@ intel_overlay_print_error_state(struct d
- 	P(UVSCALEV);
- #undef P
- }
--#endif
diff --git a/patches.baytrail/0456-drm-i915-clean-up-vlv-pre_pll_enable-and-pll-enable-.patch b/patches.baytrail/0456-drm-i915-clean-up-vlv-pre_pll_enable-and-pll-enable-.patch
deleted file mode 100644
index 7dd40420e0c78..0000000000000
--- a/patches.baytrail/0456-drm-i915-clean-up-vlv-pre_pll_enable-and-pll-enable-.patch
+++ /dev/null
@@ -1,130 +0,0 @@
-From 3ed81defe5fab6e99bcfb957594814147923929e Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 11 Jul 2013 22:13:42 +0200
-Subject: drm/i915: clean up vlv ->pre_pll_enable and pll enable sequence
-
-No need to call the ->pre_pll_enable hook twice if we don't enable the
-dpll too early. This should make Jani a bit less grumpy.
-
-v2: Rebase on top of the newly-colored BUG_ONs.
-
-v3: Reinstate the lost write of the DPLL_MD register, spotted by Imre.
-
-Cc: Imre Deak <imre.deak@intel.com>
-Cc: Jani Nikula <jani.nikula@intel.com>
-Reviewed-by: Imre Deak <imre.deak@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 426115cf5dd81d17a6322c493ca337e637ce2aed)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 47 +++++++++++++++---------------------
- 1 file changed, 20 insertions(+), 27 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 7b52eaab0dc4..ddf3d3292eb6 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -1321,32 +1321,40 @@ static void assert_pch_ports_disabled(struct drm_i915_private *dev_priv,
- 	assert_pch_hdmi_disabled(dev_priv, pipe, PCH_HDMID);
- }
- 
--static void vlv_enable_pll(struct drm_i915_private *dev_priv, enum pipe pipe)
-+static void vlv_enable_pll(struct intel_crtc *crtc)
- {
--	int reg;
--	u32 val;
-+	struct drm_device *dev = crtc->base.dev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	int reg = DPLL(crtc->pipe);
-+	u32 dpll = crtc->config.dpll_hw_state.dpll;
- 
--	assert_pipe_disabled(dev_priv, pipe);
-+	assert_pipe_disabled(dev_priv, crtc->pipe);
- 
- 	/* No really, not for ILK+ */
- 	BUG_ON(!IS_VALLEYVIEW(dev_priv->dev));
- 
- 	/* PLL is protected by panel, make sure we can write it */
- 	if (IS_MOBILE(dev_priv->dev) && !IS_I830(dev_priv->dev))
--		assert_panel_unlocked(dev_priv, pipe);
-+		assert_panel_unlocked(dev_priv, crtc->pipe);
- 
--	reg = DPLL(pipe);
--	val = I915_READ(reg);
--	val |= DPLL_VCO_ENABLE;
-+	I915_WRITE(reg, dpll);
-+	POSTING_READ(reg);
-+	udelay(150);
-+
-+	if (wait_for(((I915_READ(reg) & DPLL_LOCK_VLV) == DPLL_LOCK_VLV), 1))
-+		DRM_ERROR("DPLL %d failed to lock\n", crtc->pipe);
-+
-+	I915_WRITE(DPLL_MD(crtc->pipe), crtc->config.dpll_hw_state.dpll_md);
-+	POSTING_READ(DPLL_MD(crtc->pipe));
- 
- 	/* We do this three times for luck */
--	I915_WRITE(reg, val);
-+	I915_WRITE(reg, dpll);
- 	POSTING_READ(reg);
- 	udelay(150); /* wait for warmup */
--	I915_WRITE(reg, val);
-+	I915_WRITE(reg, dpll);
- 	POSTING_READ(reg);
- 	udelay(150); /* wait for warmup */
--	I915_WRITE(reg, val);
-+	I915_WRITE(reg, dpll);
- 	POSTING_READ(reg);
- 	udelay(150); /* wait for warmup */
- }
-@@ -3654,7 +3662,7 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc)
- 		if (encoder->pre_pll_enable)
- 			encoder->pre_pll_enable(encoder);
- 
--	vlv_enable_pll(dev_priv, pipe);
-+	vlv_enable_pll(intel_crtc);
- 
- 	for_each_encoder_on_crtc(dev, crtc, encoder)
- 		if (encoder->pre_enable)
-@@ -4405,7 +4413,6 @@ static void vlv_update_pll(struct intel_crtc *crtc)
- {
- 	struct drm_device *dev = crtc->base.dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
--	struct intel_encoder *encoder;
- 	int pipe = crtc->pipe;
- 	u32 dpll, mdiv;
- 	u32 bestn, bestm1, bestm2, bestp1, bestp2;
-@@ -4494,10 +4501,6 @@ static void vlv_update_pll(struct intel_crtc *crtc)
- 
- 	vlv_dpio_write(dev_priv, DPIO_PLL_CML(pipe), 0x87871000);
- 
--	for_each_encoder_on_crtc(dev, &crtc->base, encoder)
--		if (encoder->pre_pll_enable)
--			encoder->pre_pll_enable(encoder);
--
- 	/* Enable DPIO clock input */
- 	dpll = DPLL_EXT_BUFFER_ENABLE_VLV | DPLL_REFA_CLK_ENABLE_VLV |
- 		DPLL_VGA_MODE_DIS | DPLL_INTEGRATED_CLOCK_VLV;
-@@ -4507,20 +4510,10 @@ static void vlv_update_pll(struct intel_crtc *crtc)
- 	dpll |= DPLL_VCO_ENABLE;
- 	crtc->config.dpll_hw_state.dpll = dpll;
- 
--	I915_WRITE(DPLL(pipe), dpll);
--	POSTING_READ(DPLL(pipe));
--	udelay(150);
--
--	if (wait_for(((I915_READ(DPLL(pipe)) & DPLL_LOCK_VLV) == DPLL_LOCK_VLV), 1))
--		DRM_ERROR("DPLL %d failed to lock\n", pipe);
--
- 	dpll_md = (crtc->config.pixel_multiplier - 1)
- 		<< DPLL_MD_UDI_MULTIPLIER_SHIFT;
- 	crtc->config.dpll_hw_state.dpll_md = dpll_md;
- 
--	I915_WRITE(DPLL_MD(pipe), dpll_md);
--	POSTING_READ(DPLL_MD(pipe));
--
- 	if (crtc->config.has_dp_encoder)
- 		intel_dp_set_m_n(crtc);
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0457-drm-i915-Fix-up-cpt-pixel-multiplier-enable-sequence.patch b/patches.baytrail/0457-drm-i915-Fix-up-cpt-pixel-multiplier-enable-sequence.patch
deleted file mode 100644
index 21aa99d063f6f..0000000000000
--- a/patches.baytrail/0457-drm-i915-Fix-up-cpt-pixel-multiplier-enable-sequence.patch
+++ /dev/null
@@ -1,63 +0,0 @@
-From e966974d3ccc47ddd2b6f2bc372c50bb79b0ccec Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Wed, 5 Jun 2013 13:34:32 +0200
-Subject: drm/i915: Fix up cpt pixel multiplier enable sequence
-
-Bspec for the "DPLL HDMI multiplier" field says:
-
-"Restriction : The DPLL must be enabled and stable before setting these bits.
-These bits must be programmed after DPLL_SEL is programmed."
-
-There is apparently no restriction on programming the DPLL_SEL
-register wrt the DPLL. So let's just move that up before we enable the
-pch dpll.
-
-Reviewed-by: Imre Deak <imre.deak@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 3ad8a208abbe1bdfe31512053a81ac4938aed447)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 20 +++++++++++---------
- 1 file changed, 11 insertions(+), 9 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index ddf3d3292eb6..0448b4899ea4 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -3004,15 +3004,8 @@ static void ironlake_pch_enable(struct drm_crtc *crtc)
- 	/* For PCH output, training FDI link */
- 	dev_priv->display.fdi_link_train(crtc);
- 
--	/* XXX: pch pll's can be enabled any time before we enable the PCH
--	 * transcoder, and we actually should do this to not upset any PCH
--	 * transcoder that already use the clock when we share it.
--	 *
--	 * Note that enable_shared_dpll tries to do the right thing, but
--	 * get_shared_dpll unconditionally resets the pll - we need that to have
--	 * the right LVDS enable sequence. */
--	ironlake_enable_shared_dpll(intel_crtc);
--
-+	/* We need to program the right clock selection before writing the pixel
-+	 * mutliplier into the DPLL. */
- 	if (HAS_PCH_CPT(dev)) {
- 		u32 sel;
- 
-@@ -3026,6 +3019,15 @@ static void ironlake_pch_enable(struct drm_crtc *crtc)
- 		I915_WRITE(PCH_DPLL_SEL, temp);
- 	}
- 
-+	/* XXX: pch pll's can be enabled any time before we enable the PCH
-+	 * transcoder, and we actually should do this to not upset any PCH
-+	 * transcoder that already use the clock when we share it.
-+	 *
-+	 * Note that enable_shared_dpll tries to do the right thing, but
-+	 * get_shared_dpll unconditionally resets the pll - we need that to have
-+	 * the right LVDS enable sequence. */
-+	ironlake_enable_shared_dpll(intel_crtc);
-+
- 	/* set transcoder timing, panel must allow it */
- 	assert_panel_unlocked(dev_priv, pipe);
- 	ironlake_pch_transcoder_set_timings(intel_crtc, pipe);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0458-drm-i915-clear-DPLL-reg-when-disabling-i9xx-dplls.patch b/patches.baytrail/0458-drm-i915-clear-DPLL-reg-when-disabling-i9xx-dplls.patch
deleted file mode 100644
index bb4742637f196..0000000000000
--- a/patches.baytrail/0458-drm-i915-clear-DPLL-reg-when-disabling-i9xx-dplls.patch
+++ /dev/null
@@ -1,73 +0,0 @@
-From febaa69de1410d2360f8f9c7f7a0a21e8c074dfd Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Wed, 5 Jun 2013 13:34:33 +0200
-Subject: drm/i915: clear DPLL reg when disabling i9xx dplls
-
-Toghether with the hw state readout this should catch cases where we
-don't properly updated the pll state (either in sw or hw). At least
-for the shared dpll code the equivalent tricke helped a lot in
-catching bugs.
-
-Also rename the function prefix, it's not a generic piece of
-infrastructure.
-
-Reviewed-by: Imre Deak <imre.deak@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 50b44a449ff1a19712ebc36ffccf9ac0a68033bf)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 16 +++++-----------
- 1 file changed, 5 insertions(+), 11 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 0448b4899ea4..5363ff059ec9 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -1406,7 +1406,7 @@ static void i9xx_enable_pll(struct intel_crtc *crtc)
- }
- 
- /**
-- * intel_disable_pll - disable a PLL
-+ * i9xx_disable_pll - disable a PLL
-  * @dev_priv: i915 private structure
-  * @pipe: pipe PLL to disable
-  *
-@@ -1414,11 +1414,8 @@ static void i9xx_enable_pll(struct intel_crtc *crtc)
-  *
-  * Note!  This is for pre-ILK only.
-  */
--static void intel_disable_pll(struct drm_i915_private *dev_priv, enum pipe pipe)
-+static void i9xx_disable_pll(struct drm_i915_private *dev_priv, enum pipe pipe)
- {
--	int reg;
--	u32 val;
--
- 	/* Don't disable pipe A or pipe A PLLs if needed */
- 	if (pipe == PIPE_A && (dev_priv->quirks & QUIRK_PIPEA_FORCE))
- 		return;
-@@ -1426,11 +1423,8 @@ static void intel_disable_pll(struct drm_i915_private *dev_priv, enum pipe pipe)
- 	/* Make sure the pipe isn't still relying on us */
- 	assert_pipe_disabled(dev_priv, pipe);
- 
--	reg = DPLL(pipe);
--	val = I915_READ(reg);
--	val &= ~DPLL_VCO_ENABLE;
--	I915_WRITE(reg, val);
--	POSTING_READ(reg);
-+	I915_WRITE(DPLL(pipe), 0);
-+	POSTING_READ(DPLL(pipe));
- }
- 
- void vlv_wait_port_ready(struct drm_i915_private *dev_priv, int port)
-@@ -3782,7 +3776,7 @@ static void i9xx_crtc_disable(struct drm_crtc *crtc)
- 		if (encoder->post_disable)
- 			encoder->post_disable(encoder);
- 
--	intel_disable_pll(dev_priv, pipe);
-+	i9xx_disable_pll(dev_priv, pipe);
- 
- 	intel_crtc->active = false;
- 	intel_update_fbc(dev);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0459-drm-i915-hsw-Set-correct-Haswell-PTE-encodings.patch b/patches.baytrail/0459-drm-i915-hsw-Set-correct-Haswell-PTE-encodings.patch
deleted file mode 100644
index e130537eba886..0000000000000
--- a/patches.baytrail/0459-drm-i915-hsw-Set-correct-Haswell-PTE-encodings.patch
+++ /dev/null
@@ -1,78 +0,0 @@
-From 81c6997e1293f4294566100af157f13b4c654428 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <benjamin.widawsky@intel.com>
-Date: Thu, 4 Jul 2013 11:02:03 -0700
-Subject: drm/i915/hsw: Set correct Haswell PTE encodings.
-
-The cacheability controls have changed, and the bits have been
-rearranged in general.
-
-Note that age 0 is the oldest (most likely to get evicted) and age 3
-is the youngest (most likely to stick around for a bit). We've picked
-0 for no reason, but atm it shouldn't matter anyway (since we don't
-yet try to differentiate between different objects).
-
-v2: Remove comments for snb/ivb cache leves, that's a separate change.
-
-v3: Resolve conflicts due to patch series reordering.
-
-v4: Rebased on top of Kenneth Graunke's ->pte_encode refactoring.
-
-v5: Removed eLLC bits for separate patch.
-
-In the internal repository this was:
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-[danvet: Add comment about cache ages as requested by Ben provoked due
-to a question from Damien.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 0d8ff15e9a15f2b393e53337a107b7a1e5919b6d)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem_gtt.c | 13 +++++++++++--
- 1 file changed, 11 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
-index 242d0f9bb9e4..5534dd5cea58 100644
---- a/drivers/gpu/drm/i915/i915_gem_gtt.c
-+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
-@@ -33,6 +33,7 @@
- 
- /* PPGTT stuff */
- #define GEN6_GTT_ADDR_ENCODE(addr)	((addr) | (((addr) >> 28) & 0xff0))
-+#define HSW_GTT_ADDR_ENCODE(addr)	((addr) | (((addr) >> 28) & 0x7f0))
- 
- #define GEN6_PDE_VALID			(1 << 0)
- /* gen6+ has bit 11-4 for physical addr bit 39-32 */
-@@ -44,6 +45,14 @@
- #define GEN6_PTE_CACHE_LLC		(2 << 1)
- #define GEN6_PTE_CACHE_LLC_MLC		(3 << 1)
- #define GEN6_PTE_ADDR_ENCODE(addr)	GEN6_GTT_ADDR_ENCODE(addr)
-+#define HSW_PTE_ADDR_ENCODE(addr)	HSW_GTT_ADDR_ENCODE(addr)
-+
-+/* Cacheability Control is a 4-bit value. The low three bits are stored in *
-+ * bits 3:1 of the PTE, while the fourth bit is stored in bit 11 of the PTE.
-+ */
-+#define HSW_CACHEABILITY_CONTROL(bits)	((((bits) & 0x7) << 1) | \
-+					 (((bits) & 0x8) << (11 - 3)))
-+#define HSW_WB_LLC_AGE0			HSW_CACHEABILITY_CONTROL(0x3)
- 
- static gen6_gtt_pte_t gen6_pte_encode(dma_addr_t addr,
- 				      enum i915_cache_level level)
-@@ -92,10 +101,10 @@ static gen6_gtt_pte_t hsw_pte_encode(dma_addr_t addr,
- 				     enum i915_cache_level level)
- {
- 	gen6_gtt_pte_t pte = GEN6_PTE_VALID;
--	pte |= GEN6_PTE_ADDR_ENCODE(addr);
-+	pte |= HSW_PTE_ADDR_ENCODE(addr);
- 
- 	if (level != I915_CACHE_NONE)
--		pte |= GEN6_PTE_CACHE_LLC;
-+		pte |= HSW_WB_LLC_AGE0;
- 
- 	return pte;
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0460-drm-i915-Define-some-of-the-eLLC-magic.patch b/patches.baytrail/0460-drm-i915-Define-some-of-the-eLLC-magic.patch
deleted file mode 100644
index 98a00e201ab43..0000000000000
--- a/patches.baytrail/0460-drm-i915-Define-some-of-the-eLLC-magic.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From 6b30fedf8f6c31c1a0744fad8b10d0c0894cb114 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Thu, 4 Jul 2013 11:02:04 -0700
-Subject: drm/i915: Define some of the eLLC magic
-
-The EDRAM present register isn't really defined in the docs. It just
-says check to see if it's set to 1. So I haven't defined the 1 value not
-knowing what it actually means.
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 05e21cc43da5a1a58b34a2cfad13d22bcfeb1f2b)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem.c |    4 ++--
- drivers/gpu/drm/i915/i915_reg.h |    4 ++++
- 2 files changed, 6 insertions(+), 2 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -4131,8 +4131,8 @@ i915_gem_init_hw(struct drm_device *dev)
- 	if (INTEL_INFO(dev)->gen < 6 && !intel_enable_gtt())
- 		return -EIO;
- 
--	if (IS_HASWELL(dev) && (I915_READ(0x120010) == 1))
--		I915_WRITE(0x9008, I915_READ(0x9008) | 0xf0000);
-+	if (IS_HASWELL(dev) && (I915_READ(HSW_EDRAM_PRESENT) == 1))
-+		I915_WRITE(HSW_IDICR, I915_READ(HSW_IDICR) | IDIHASHMSK(0xf));
- 
- 	if (HAS_PCH_NOP(dev)) {
- 		u32 temp = I915_READ(GEN7_MSG_CTL);
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -4484,6 +4484,10 @@
- #define  GT_FIFO_FREE_ENTRIES			0x120008
- #define    GT_FIFO_NUM_RESERVED_ENTRIES		20
- 
-+#define  HSW_IDICR				0x9008
-+#define    IDIHASHMSK(x)			(((x) & 0x3f) << 16)
-+#define  HSW_EDRAM_PRESENT			0x120010
-+
- #define GEN6_UCGCTL1				0x9400
- # define GEN6_BLBUNIT_CLOCK_GATE_DISABLE		(1 << 5)
- # define GEN6_CSUNIT_CLOCK_GATE_DISABLE			(1 << 7)
diff --git a/patches.baytrail/0461-drm-i915-store-eLLC-size.patch b/patches.baytrail/0461-drm-i915-store-eLLC-size.patch
deleted file mode 100644
index 753c2819a1839..0000000000000
--- a/patches.baytrail/0461-drm-i915-store-eLLC-size.patch
+++ /dev/null
@@ -1,81 +0,0 @@
-From 0da26735bb0eadfe8905c5c59022f1ba36375f1f Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Thu, 4 Jul 2013 11:02:05 -0700
-Subject: drm/i915: store eLLC size
-
-The eLLC cannot be determined by PCIID because as far as we know, even
-machines supporting eLLC may not have it enabled, or fused off or
-whatever. It's possible this isn't actually true, and at that point we
-can switch to a DEV_INFO flag instead.
-
-I've defined everything where the docs are clear, and left the rest as
-magic.
-
-But we need it before we set the pte_encode function pointers, which
-happens really early, in gtt_init.
-
-The problem with just doing the normal sequence earlier is we don't have
-the ability to use forcewake until after the pte functions have been set
-up.
-
-Since all solutions are somewhat ugly (barring rewriting all the init
-ordering), I've opted to do the detection really early, and the enabling
-later - since the register to detect doesn't require forcewake.
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-[danvet: Move dev_priv->ellc_size away from the dri1 dungeon to a nice
-place right next to the l3 parity stuff. Also squash in the follow-up
-commit to read out the eLLC size a bit earlier.]
-Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 59124506ba5297e48410e410c3bce83784fddf58)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_dma.c |   10 ++++++++++
- drivers/gpu/drm/i915/i915_drv.h |    3 +++
- drivers/gpu/drm/i915/i915_gem.c |    2 +-
- 3 files changed, 14 insertions(+), 1 deletion(-)
-
---- a/drivers/gpu/drm/i915/i915_dma.c
-+++ b/drivers/gpu/drm/i915/i915_dma.c
-@@ -1535,6 +1535,16 @@ int i915_driver_load(struct drm_device *
- 
- 	intel_early_sanitize_regs(dev);
- 
-+	if (IS_HASWELL(dev) && (I915_READ(HSW_EDRAM_PRESENT) == 1)) {
-+		/* The docs do not explain exactly how the calculation can be
-+		 * made. It is somewhat guessable, but for now, it's always
-+		 * 128MB.
-+		 * NB: We can't write IDICR yet because we do not have gt funcs
-+		 * set up */
-+		dev_priv->ellc_size = 128;
-+		DRM_INFO("Found %zuMB of eLLC\n", dev_priv->ellc_size);
-+	}
-+
- 	ret = i915_gem_gtt_init(dev);
- 	if (ret)
- 		goto put_bridge;
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1152,6 +1152,9 @@ typedef struct drm_i915_private {
- 
- 	struct intel_l3_parity l3_parity;
- 
-+	/* Cannot be determined by PCIID. You must always read a register. */
-+	size_t ellc_size;
-+
- 	/* gen6+ rps state */
- 	struct intel_gen6_power_mgmt rps;
- 
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -4131,7 +4131,7 @@ i915_gem_init_hw(struct drm_device *dev)
- 	if (INTEL_INFO(dev)->gen < 6 && !intel_enable_gtt())
- 		return -EIO;
- 
--	if (IS_HASWELL(dev) && (I915_READ(HSW_EDRAM_PRESENT) == 1))
-+	if (dev_priv->ellc_size)
- 		I915_WRITE(HSW_IDICR, I915_READ(HSW_IDICR) | IDIHASHMSK(0xf));
- 
- 	if (HAS_PCH_NOP(dev)) {
diff --git a/patches.baytrail/0462-drm-i915-Use-eLLC-LLC-by-default-when-available.patch b/patches.baytrail/0462-drm-i915-Use-eLLC-LLC-by-default-when-available.patch
deleted file mode 100644
index 22231546c930a..0000000000000
--- a/patches.baytrail/0462-drm-i915-Use-eLLC-LLC-by-default-when-available.patch
+++ /dev/null
@@ -1,70 +0,0 @@
-From a2a4cf92146ca96a4ebc5021348ec8fa7e4326ac Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Thu, 4 Jul 2013 11:02:06 -0700
-Subject: drm/i915: Use eLLC/LLC by default when available
-
-DRI clients really should be using MOCS to get fine grained streaming
-cache controls. With that note, I *hope* that this patch doesn't improve
-performance overwhelmingly, because if it does - it means there is a
-problem elsewhere.
-
-In any case, the kernel, and old userspace should get some benefit from
-this, so let's do it. eLLC is always a good default, and really not
-using it is the special case for MOCS.
-
-References: http://www.intel.com/newsroom/kits/restricted/ha$well!/pdfs/4th_Gen_Intel_Core_PressBriefing_5-29.pdf (page 57)
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 4d15c145a6234d999c0452eec0d275c1fbf0688c)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem_gtt.c | 17 ++++++++++++++++-
- 1 file changed, 16 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
-index 5534dd5cea58..422273328302 100644
---- a/drivers/gpu/drm/i915/i915_gem_gtt.c
-+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
-@@ -53,6 +53,7 @@
- #define HSW_CACHEABILITY_CONTROL(bits)	((((bits) & 0x7) << 1) | \
- 					 (((bits) & 0x8) << (11 - 3)))
- #define HSW_WB_LLC_AGE0			HSW_CACHEABILITY_CONTROL(0x3)
-+#define HSW_WB_ELLC_LLC_AGE0		HSW_CACHEABILITY_CONTROL(0xb)
- 
- static gen6_gtt_pte_t gen6_pte_encode(dma_addr_t addr,
- 				      enum i915_cache_level level)
-@@ -109,6 +110,18 @@ static gen6_gtt_pte_t hsw_pte_encode(dma_addr_t addr,
- 	return pte;
- }
- 
-+static gen6_gtt_pte_t iris_pte_encode(dma_addr_t addr,
-+				      enum i915_cache_level level)
-+{
-+	gen6_gtt_pte_t pte = GEN6_PTE_VALID;
-+	pte |= HSW_PTE_ADDR_ENCODE(addr);
-+
-+	if (level != I915_CACHE_NONE)
-+		pte |= HSW_WB_ELLC_LLC_AGE0;
-+
-+	return pte;
-+}
-+
- static void gen6_write_pdes(struct i915_hw_ppgtt *ppgtt)
- {
- 	struct drm_i915_private *dev_priv = ppgtt->dev->dev_private;
-@@ -861,7 +874,9 @@ int i915_gem_gtt_init(struct drm_device *dev)
- 	} else {
- 		gtt->gtt_probe = gen6_gmch_probe;
- 		gtt->gtt_remove = gen6_gmch_remove;
--		if (IS_HASWELL(dev))
-+		if (IS_HASWELL(dev) && dev_priv->ellc_size)
-+			gtt->pte_encode = iris_pte_encode;
-+		else if (IS_HASWELL(dev))
- 			gtt->pte_encode = hsw_pte_encode;
- 		else if (IS_VALLEYVIEW(dev))
- 			gtt->pte_encode = byt_pte_encode;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0463-drm-i915-debugfs-entries-for-e-LLC.patch b/patches.baytrail/0463-drm-i915-debugfs-entries-for-e-LLC.patch
deleted file mode 100644
index 2304451024f2a..0000000000000
--- a/patches.baytrail/0463-drm-i915-debugfs-entries-for-e-LLC.patch
+++ /dev/null
@@ -1,55 +0,0 @@
-From c3eba28ecf9223901660808cc044dd312c8fdc36 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Thu, 4 Jul 2013 11:02:07 -0700
-Subject: drm/i915: debugfs entries for [e]LLC
-
-To make users life a little easier figuring out what they have on their
-system.
-
-Ideally, I'd really like to report LLC size, but it turned out to be a
-bit of a pain. Maybe I'll revisit it in the future.
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 63573eb7ba3d1bdc1db25fe79314609a4189a306)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_debugfs.c | 14 ++++++++++++++
- 1 file changed, 14 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
-index 86379799dab8..8819f851e996 100644
---- a/drivers/gpu/drm/i915/i915_debugfs.c
-+++ b/drivers/gpu/drm/i915/i915_debugfs.c
-@@ -1530,6 +1530,19 @@ static int i915_dpio_info(struct seq_file *m, void *data)
- 	return 0;
- }
- 
-+static int i915_llc(struct seq_file *m, void *data)
-+{
-+	struct drm_info_node *node = (struct drm_info_node *) m->private;
-+	struct drm_device *dev = node->minor->dev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+
-+	/* Size calculation for LLC is a bit of a pain. Ignore for now. */
-+	seq_printf(m, "LLC: %s\n", yesno(HAS_LLC(dev)));
-+	seq_printf(m, "eLLC: %zuMB\n", dev_priv->ellc_size);
-+
-+	return 0;
-+}
-+
- static int
- i915_wedged_get(void *data, u64 *val)
- {
-@@ -1959,6 +1972,7 @@ static struct drm_info_list i915_debugfs_list[] = {
- 	{"i915_swizzle_info", i915_swizzle_info, 0},
- 	{"i915_ppgtt_info", i915_ppgtt_info, 0},
- 	{"i915_dpio", i915_dpio_info, 0},
-+	{"i915_llc", i915_llc, 0},
- };
- #define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0464-drm-i915-unify-PM-interrupt-preinstall-sequence.patch b/patches.baytrail/0464-drm-i915-unify-PM-interrupt-preinstall-sequence.patch
deleted file mode 100644
index 9c7f6b5ffb9e8..0000000000000
--- a/patches.baytrail/0464-drm-i915-unify-PM-interrupt-preinstall-sequence.patch
+++ /dev/null
@@ -1,121 +0,0 @@
-From 1ae26ca5c6065f48c418016a20e28fb354f2da76 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Fri, 12 Jul 2013 22:43:25 +0200
-Subject: drm/i915: unify PM interrupt preinstall sequence
-
-Since the addition of VECS we have a slightly different enable
-sequence for PM interrupts on ivb/hsw vs snb and vlv. Usually that
-will end up in hard to track down surprises.
-
-Hence unifiy things and since we have copies of this code in 3 places
-now, extract it into its own little helper.
-
-Note that this changes the irq preinstall sequence a bit for snb and
-vlv: We now also clear the PM registers in the preinstall hook, in
-addition to the PM register clearing/setup already done when actually
-enabling rps. So this doesn't fix a bug but simply unifies the code
-across all platforms. After the postinstall hook is similarly unified
-we can rip out the then redundant PM interrupt setup from the rps
-code.
-
-v3: Rebase on top of the retained double-GTIIR clearing. Also
-resurrect the masking/disabling of the gen6+ PM interrupts as spotted
-by Ben Widaswky.
-
-v4: Move the DE interrupt reset code out of gen5_gt_irq_preinstall
-back to ironlake_irq_preinstall where it really belongs. Spotted by
-Paulo.
-
-v3: Improve the commit message to more clearly spell out why we want
-to unify the code and what exactly changes.
-
-Cc: Paulo Zanoni <przanoni@gmail.com>
-Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
-[danvet: s/GT/PM/ to fix up a comment which Ben spotted while
-reviewing.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit d18ea1b58a5003eb6fca03aff03c4c01321e6cb1)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 39 +++++++++++++++++++++------------------
- 1 file changed, 21 insertions(+), 18 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index a710ec29781b..64ff74990db9 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -2100,6 +2100,23 @@ static void ibx_irq_preinstall(struct drm_device *dev)
- 	POSTING_READ(SDEIER);
- }
- 
-+static void gen5_gt_irq_preinstall(struct drm_device *dev)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+
-+	/* and GT */
-+	I915_WRITE(GTIMR, 0xffffffff);
-+	I915_WRITE(GTIER, 0x0);
-+	POSTING_READ(GTIER);
-+
-+	if (INTEL_INFO(dev)->gen >= 6) {
-+		/* and PM */
-+		I915_WRITE(GEN6_PMIMR, 0xffffffff);
-+		I915_WRITE(GEN6_PMIER, 0x0);
-+		POSTING_READ(GEN6_PMIER);
-+	}
-+}
-+
- /* drm_dma.h hooks
- */
- static void ironlake_irq_preinstall(struct drm_device *dev)
-@@ -2110,16 +2127,11 @@ static void ironlake_irq_preinstall(struct drm_device *dev)
- 
- 	I915_WRITE(HWSTAM, 0xeffe);
- 
--	/* XXX hotplug from PCH */
--
- 	I915_WRITE(DEIMR, 0xffffffff);
- 	I915_WRITE(DEIER, 0x0);
- 	POSTING_READ(DEIER);
- 
--	/* and GT */
--	I915_WRITE(GTIMR, 0xffffffff);
--	I915_WRITE(GTIER, 0x0);
--	POSTING_READ(GTIER);
-+	gen5_gt_irq_preinstall(dev);
- 
- 	ibx_irq_preinstall(dev);
- }
-@@ -2138,15 +2150,7 @@ static void ivybridge_irq_preinstall(struct drm_device *dev)
- 	I915_WRITE(DEIER, 0x0);
- 	POSTING_READ(DEIER);
- 
--	/* and GT */
--	I915_WRITE(GTIMR, 0xffffffff);
--	I915_WRITE(GTIER, 0x0);
--	POSTING_READ(GTIER);
--
--	/* Power management */
--	I915_WRITE(GEN6_PMIMR, 0xffffffff);
--	I915_WRITE(GEN6_PMIER, 0x0);
--	POSTING_READ(GEN6_PMIER);
-+	gen5_gt_irq_preinstall(dev);
- 
- 	ibx_irq_preinstall(dev);
- }
-@@ -2167,9 +2171,8 @@ static void valleyview_irq_preinstall(struct drm_device *dev)
- 	/* and GT */
- 	I915_WRITE(GTIIR, I915_READ(GTIIR));
- 	I915_WRITE(GTIIR, I915_READ(GTIIR));
--	I915_WRITE(GTIMR, 0xffffffff);
--	I915_WRITE(GTIER, 0x0);
--	POSTING_READ(GTIER);
-+
-+	gen5_gt_irq_preinstall(dev);
- 
- 	I915_WRITE(DPINVGTT, 0xff);
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0465-drm-i915-unify-GT-PM-irq-postinstall-code.patch b/patches.baytrail/0465-drm-i915-unify-GT-PM-irq-postinstall-code.patch
deleted file mode 100644
index e52ccad6158db..0000000000000
--- a/patches.baytrail/0465-drm-i915-unify-GT-PM-irq-postinstall-code.patch
+++ /dev/null
@@ -1,233 +0,0 @@
-From d440c3fb9446923253e27d31fa6fb4e0d64bfe45 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Fri, 12 Jul 2013 22:43:26 +0200
-Subject: drm/i915: unify GT/PM irq postinstall code
-
-Again extract a common helper. For the postinstall hook things are a
-bit more complicated since we have more cases on ilk-hsw/vlv here.
-
-But since vlv was clearly broken by failing to initialize
-dev_priv->gt_irq_mask correctly the shared code is clearly justified.
-
-Also kill the PMIER setting in the async rps enable work. I should
-have been save, but also clearly looked rather fragile. PMIER setup is
-now all down in the irq pre/postinstall hooks.
-
-With this we now have the usual interrupt register sequence for GT/PM
-irq registers:
-
-- IER is setup once with all the interrupts we ever need in the
-  postinstall hook and never touched again. Exceptions are SDEIER,
-  which is touched in the preinstall hook (when the irq handler isn't
-  enabled) and then only from the irq handler. And DEIER/VLV_IER with
-  is used in the irq handler but also written to once in the
-  postinstall hook. But since that write is essentially what enables
-  the interrupt and we should always have MSI interrupts we should be
-  save. In case we ever have non-MSI interrupts we'd be screwed.
-
-- IIR is cleared in the postinstall hook before we enable/unmask the
-  respective interrupt sources. Hence we can't steal an interrupt
-  event an accidentally trigger the spurious interrupt logic in the
-  core kernel. Note that after some discussion with Ben Widawsky we
-  think that we actually should clear the IIR registers in the
-  preinstall hook. But doing that is a much larger patch series.
-
-- IMR regs are (usually) all masked off. Those are the only regs
-  changed at runtime, which is all protected by dev_priv->irq_lock.
-
-This unification also kills the cargo-culted read-modify-write PM
-register setup for VECS. Interrupt setup is done without userspace
-being able to interfere, so we better know what values we want to put
-into those registers. RMW cycles otoh are really good at papering over
-races, until stuff magically blows up and no one has a clue why.
-
-v2: Touch the gen6+ PM interrupt registers only on gen6+.
-
-v3: Improve the commit message to more clearly spell out why we want
-to unify the code and what exactly changes.
-
-Cc: Ben Widawsky <ben@bwidawsk.net>
-Cc: Paulo Zanoni <przanoni@gmail.com>
-Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
-[danvet: Add a comment to explain why the l3 parity interrupt is
-special.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 0a9a8c91a5f9617d6fa319fe052de38691fb29cb)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 93 +++++++++++++++++++----------------------
- drivers/gpu/drm/i915/intel_pm.c |  4 --
- 2 files changed, 43 insertions(+), 54 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index 64ff74990db9..70cd3053fac5 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -2242,6 +2242,46 @@ static void ibx_irq_postinstall(struct drm_device *dev)
- 	I915_WRITE(SDEIMR, ~mask);
- }
- 
-+static void gen5_gt_irq_postinstall(struct drm_device *dev)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	u32 pm_irqs, gt_irqs;
-+
-+	pm_irqs = gt_irqs = 0;
-+
-+	dev_priv->gt_irq_mask = ~0;
-+	if (HAS_L3_GPU_CACHE(dev)) {
-+		/* L3 parity interrupt is always unmasked. */
-+		dev_priv->gt_irq_mask = ~GT_RENDER_L3_PARITY_ERROR_INTERRUPT;
-+		gt_irqs |= GT_RENDER_L3_PARITY_ERROR_INTERRUPT;
-+	}
-+
-+	gt_irqs |= GT_RENDER_USER_INTERRUPT;
-+	if (IS_GEN5(dev)) {
-+		gt_irqs |= GT_RENDER_PIPECTL_NOTIFY_INTERRUPT |
-+			   ILK_BSD_USER_INTERRUPT;
-+	} else {
-+		gt_irqs |= GT_BLT_USER_INTERRUPT | GT_BSD_USER_INTERRUPT;
-+	}
-+
-+	I915_WRITE(GTIIR, I915_READ(GTIIR));
-+	I915_WRITE(GTIMR, dev_priv->gt_irq_mask);
-+	I915_WRITE(GTIER, gt_irqs);
-+	POSTING_READ(GTIER);
-+
-+	if (INTEL_INFO(dev)->gen >= 6) {
-+		pm_irqs |= GEN6_PM_RPS_EVENTS;
-+
-+		if (HAS_VEBOX(dev))
-+			pm_irqs |= PM_VEBOX_USER_INTERRUPT;
-+
-+		I915_WRITE(GEN6_PMIIR, I915_READ(GEN6_PMIIR));
-+		I915_WRITE(GEN6_PMIMR, 0xffffffff);
-+		I915_WRITE(GEN6_PMIER, pm_irqs);
-+		POSTING_READ(GEN6_PMIER);
-+	}
-+}
-+
- static int ironlake_irq_postinstall(struct drm_device *dev)
- {
- 	unsigned long irqflags;
-@@ -2252,7 +2292,6 @@ static int ironlake_irq_postinstall(struct drm_device *dev)
- 			   DE_PLANEA_FLIP_DONE | DE_PLANEB_FLIP_DONE |
- 			   DE_AUX_CHANNEL_A | DE_PIPEB_FIFO_UNDERRUN |
- 			   DE_PIPEA_FIFO_UNDERRUN | DE_POISON;
--	u32 gt_irqs;
- 
- 	dev_priv->irq_mask = ~display_mask;
- 
-@@ -2263,21 +2302,7 @@ static int ironlake_irq_postinstall(struct drm_device *dev)
- 			  DE_PIPEA_VBLANK | DE_PIPEB_VBLANK | DE_PCU_EVENT);
- 	POSTING_READ(DEIER);
- 
--	dev_priv->gt_irq_mask = ~0;
--
--	I915_WRITE(GTIIR, I915_READ(GTIIR));
--	I915_WRITE(GTIMR, dev_priv->gt_irq_mask);
--
--	gt_irqs = GT_RENDER_USER_INTERRUPT;
--
--	if (IS_GEN6(dev))
--		gt_irqs |= GT_BLT_USER_INTERRUPT | GT_BSD_USER_INTERRUPT;
--	else
--		gt_irqs |= GT_RENDER_PIPECTL_NOTIFY_INTERRUPT |
--			   ILK_BSD_USER_INTERRUPT;
--
--	I915_WRITE(GTIER, gt_irqs);
--	POSTING_READ(GTIER);
-+	gen5_gt_irq_postinstall(dev);
- 
- 	ibx_irq_postinstall(dev);
- 
-@@ -2306,8 +2331,6 @@ static int ivybridge_irq_postinstall(struct drm_device *dev)
- 		DE_PLANEA_FLIP_DONE_IVB |
- 		DE_AUX_CHANNEL_A_IVB |
- 		DE_ERR_INT_IVB;
--	u32 pm_irqs = GEN6_PM_RPS_EVENTS;
--	u32 gt_irqs;
- 
- 	dev_priv->irq_mask = ~display_mask;
- 
-@@ -2322,30 +2345,7 @@ static int ivybridge_irq_postinstall(struct drm_device *dev)
- 		   DE_PIPEA_VBLANK_IVB);
- 	POSTING_READ(DEIER);
- 
--	dev_priv->gt_irq_mask = ~GT_RENDER_L3_PARITY_ERROR_INTERRUPT;
--
--	I915_WRITE(GTIIR, I915_READ(GTIIR));
--	I915_WRITE(GTIMR, dev_priv->gt_irq_mask);
--
--	gt_irqs = GT_RENDER_USER_INTERRUPT | GT_BSD_USER_INTERRUPT |
--		  GT_BLT_USER_INTERRUPT | GT_RENDER_L3_PARITY_ERROR_INTERRUPT;
--	I915_WRITE(GTIER, gt_irqs);
--	POSTING_READ(GTIER);
--
--	I915_WRITE(GEN6_PMIIR, I915_READ(GEN6_PMIIR));
--	if (HAS_VEBOX(dev))
--		pm_irqs |= PM_VEBOX_USER_INTERRUPT;
--
--	/* Our enable/disable rps functions may touch these registers so
--	 * make sure to set a known state for only the non-RPS bits.
--	 * The RMW is extra paranoia since this should be called after being set
--	 * to a known state in preinstall.
--	 * */
--	I915_WRITE(GEN6_PMIMR,
--		   (I915_READ(GEN6_PMIMR) | ~GEN6_PM_RPS_EVENTS) & ~pm_irqs);
--	I915_WRITE(GEN6_PMIER,
--		   (I915_READ(GEN6_PMIER) & GEN6_PM_RPS_EVENTS) | pm_irqs);
--	POSTING_READ(GEN6_PMIER);
-+	gen5_gt_irq_postinstall(dev);
- 
- 	ibx_irq_postinstall(dev);
- 
-@@ -2355,7 +2355,6 @@ static int ivybridge_irq_postinstall(struct drm_device *dev)
- static int valleyview_irq_postinstall(struct drm_device *dev)
- {
- 	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
--	u32 gt_irqs;
- 	u32 enable_mask;
- 	u32 pipestat_enable = PLANE_FLIP_DONE_INT_EN_VLV;
- 	unsigned long irqflags;
-@@ -2395,13 +2394,7 @@ static int valleyview_irq_postinstall(struct drm_device *dev)
- 	I915_WRITE(VLV_IIR, 0xffffffff);
- 	I915_WRITE(VLV_IIR, 0xffffffff);
- 
--	I915_WRITE(GTIIR, I915_READ(GTIIR));
--	I915_WRITE(GTIMR, dev_priv->gt_irq_mask);
--
--	gt_irqs = GT_RENDER_USER_INTERRUPT | GT_BSD_USER_INTERRUPT |
--		GT_BLT_USER_INTERRUPT;
--	I915_WRITE(GTIER, gt_irqs);
--	POSTING_READ(GTIER);
-+	gen5_gt_irq_postinstall(dev);
- 
- 	/* ack & enable invalid PTE error interrupts */
- #if 0 /* FIXME: add support to irq handler for checking these bits */
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 886da760df06..20c7c77e2b5e 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -3319,8 +3319,6 @@ static void gen6_enable_rps(struct drm_device *dev)
- 
- 	gen6_set_rps(dev_priv->dev, (gt_perf_status & 0xff00) >> 8);
- 
--	/* requires MSI enabled */
--	I915_WRITE(GEN6_PMIER, I915_READ(GEN6_PMIER) | GEN6_PM_RPS_EVENTS);
- 	spin_lock_irq(&dev_priv->irq_lock);
- 	/* FIXME: Our interrupt enabling sequence is bonghits.
- 	 * dev_priv->rps.pm_iir really should be 0 here. */
-@@ -3599,8 +3597,6 @@ static void valleyview_enable_rps(struct drm_device *dev)
- 
- 	valleyview_set_rps(dev_priv->dev, dev_priv->rps.rpe_delay);
- 
--	/* requires MSI enabled */
--	I915_WRITE(GEN6_PMIER, GEN6_PM_RPS_EVENTS);
- 	spin_lock_irq(&dev_priv->irq_lock);
- 	WARN_ON(dev_priv->rps.pm_iir != 0);
- 	I915_WRITE(GEN6_PMIMR, 0);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0466-drm-i915-extract-rps-interrupt-enable-disable-helper.patch b/patches.baytrail/0466-drm-i915-extract-rps-interrupt-enable-disable-helper.patch
deleted file mode 100644
index 237093a143165..0000000000000
--- a/patches.baytrail/0466-drm-i915-extract-rps-interrupt-enable-disable-helper.patch
+++ /dev/null
@@ -1,158 +0,0 @@
-From 8d69e66e6e90841bf12223765e74531f45195407 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Fri, 12 Jul 2013 22:43:27 +0200
-Subject: drm/i915: extract rps interrupt enable/disable helpers
-
-The VECS enabling required some changes to how rps interrupts are
-enabled/disabled since VECS interrupts are handling with the PM
-interrupt registers.
-
-But now that the pre/postinstall sequences is identical for all
-platforms with rps support (snb, ivb, hsw, vlv) we can also use the
-exact same sequence to actually enable the rps interrupts. Strictly
-speaking using spinlocks is overkill on snb/ivb & vlv since they have
-no VECS ring, but imo that's more than made up by the common code.
-
-Hence this just unifies the vlv code with the snb-hsw code which
-matched exactly before the VECS enabling. See
-
-commit eda63ffb906c2fb3b609a0e87aeb63c0f25b9e6b
-Author: Ben Widawsky <ben@bwidawsk.net>
-Date:   Tue May 28 19:22:26 2013 -0700
-
-    drm/i915: Add PM regs to pre/post install
-
-and
-
-commit 4848405cced3b46f4ec7d404b8ed5873171ae10a
-Author: Ben Widawsky <ben@bwidawsk.net>
-Date:   Tue May 28 19:22:27 2013 -0700
-
-    drm/i915: make PM interrupt writes non-destructive
-
-for why the gen6 code (shared between snb, ivb and hsw) needed to be
-changed originally.
-
-v3: Improve the commit message to more clearly spell out why we want
-to unify the code and what exactly changes.
-
-Cc: Paulo Zanoni <przanoni@gmail.com>
-Cc: Ben Widawsky <ben@bwidawsk.net>
-Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 44fc7d5cf30723563558715f0794c8389a5c15ba)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 59 ++++++++++++++++++++---------------------
- 1 file changed, 29 insertions(+), 30 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 20c7c77e2b5e..f3ae27291701 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -3121,13 +3121,10 @@ void valleyview_set_rps(struct drm_device *dev, u8 val)
- 	trace_intel_gpu_freq_change(vlv_gpu_freq(dev_priv->mem_freq, val));
- }
- 
--
--static void gen6_disable_rps(struct drm_device *dev)
-+static void gen6_disable_rps_interrupts(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 
--	I915_WRITE(GEN6_RC_CONTROL, 0);
--	I915_WRITE(GEN6_RPNSWREQ, 1 << 31);
- 	I915_WRITE(GEN6_PMINTRMSK, 0xffffffff);
- 	I915_WRITE(GEN6_PMIER, I915_READ(GEN6_PMIER) & ~GEN6_PM_RPS_EVENTS);
- 	/* Complete PM interrupt masking here doesn't race with the rps work
-@@ -3142,23 +3139,23 @@ static void gen6_disable_rps(struct drm_device *dev)
- 	I915_WRITE(GEN6_PMIIR, GEN6_PM_RPS_EVENTS);
- }
- 
--static void valleyview_disable_rps(struct drm_device *dev)
-+static void gen6_disable_rps(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 
- 	I915_WRITE(GEN6_RC_CONTROL, 0);
--	I915_WRITE(GEN6_PMINTRMSK, 0xffffffff);
--	I915_WRITE(GEN6_PMIER, 0);
--	/* Complete PM interrupt masking here doesn't race with the rps work
--	 * item again unmasking PM interrupts because that is using a different
--	 * register (PMIMR) to mask PM interrupts. The only risk is in leaving
--	 * stale bits in PMIIR and PMIMR which gen6_enable_rps will clean up. */
-+	I915_WRITE(GEN6_RPNSWREQ, 1 << 31);
- 
--	spin_lock_irq(&dev_priv->irq_lock);
--	dev_priv->rps.pm_iir = 0;
--	spin_unlock_irq(&dev_priv->irq_lock);
-+	gen6_disable_rps_interrupts(dev);
-+}
-+
-+static void valleyview_disable_rps(struct drm_device *dev)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+
-+	I915_WRITE(GEN6_RC_CONTROL, 0);
- 
--	I915_WRITE(GEN6_PMIIR, I915_READ(GEN6_PMIIR));
-+	gen6_disable_rps_interrupts(dev);
- 
- 	if (dev_priv->vlv_pctx) {
- 		drm_gem_object_unreference(&dev_priv->vlv_pctx->base);
-@@ -3191,6 +3188,21 @@ int intel_enable_rc6(const struct drm_device *dev)
- 	return (INTEL_RC6_ENABLE | INTEL_RC6p_ENABLE);
- }
- 
-+static void gen6_enable_rps_interrupts(struct drm_device *dev)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+
-+	spin_lock_irq(&dev_priv->irq_lock);
-+	/* FIXME: Our interrupt enabling sequence is bonghits.
-+	 * dev_priv->rps.pm_iir really should be 0 here. */
-+	dev_priv->rps.pm_iir = 0;
-+	I915_WRITE(GEN6_PMIMR, I915_READ(GEN6_PMIMR) & ~GEN6_PM_RPS_EVENTS);
-+	I915_WRITE(GEN6_PMIIR, GEN6_PM_RPS_EVENTS);
-+	spin_unlock_irq(&dev_priv->irq_lock);
-+	/* unmask all PM interrupts */
-+	I915_WRITE(GEN6_PMINTRMSK, 0);
-+}
-+
- static void gen6_enable_rps(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
-@@ -3319,15 +3331,7 @@ static void gen6_enable_rps(struct drm_device *dev)
- 
- 	gen6_set_rps(dev_priv->dev, (gt_perf_status & 0xff00) >> 8);
- 
--	spin_lock_irq(&dev_priv->irq_lock);
--	/* FIXME: Our interrupt enabling sequence is bonghits.
--	 * dev_priv->rps.pm_iir really should be 0 here. */
--	dev_priv->rps.pm_iir = 0;
--	I915_WRITE(GEN6_PMIMR, I915_READ(GEN6_PMIMR) & ~GEN6_PM_RPS_EVENTS);
--	I915_WRITE(GEN6_PMIIR, GEN6_PM_RPS_EVENTS);
--	spin_unlock_irq(&dev_priv->irq_lock);
--	/* unmask all PM interrupts */
--	I915_WRITE(GEN6_PMINTRMSK, 0);
-+	gen6_enable_rps_interrupts(dev);
- 
- 	rc6vids = 0;
- 	ret = sandybridge_pcode_read(dev_priv, GEN6_PCODE_READ_RC6VIDS, &rc6vids);
-@@ -3597,12 +3601,7 @@ static void valleyview_enable_rps(struct drm_device *dev)
- 
- 	valleyview_set_rps(dev_priv->dev, dev_priv->rps.rpe_delay);
- 
--	spin_lock_irq(&dev_priv->irq_lock);
--	WARN_ON(dev_priv->rps.pm_iir != 0);
--	I915_WRITE(GEN6_PMIMR, 0);
--	spin_unlock_irq(&dev_priv->irq_lock);
--	/* enable all PM interrupts */
--	I915_WRITE(GEN6_PMINTRMSK, 0);
-+	gen6_enable_rps_interrupts(dev);
- 
- 	gen6_gt_force_wake_put(dev_priv);
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0467-drm-i915-simplify-rps-interrupt-enabling-disabling-s.patch b/patches.baytrail/0467-drm-i915-simplify-rps-interrupt-enabling-disabling-s.patch
deleted file mode 100644
index be0293be6979e..0000000000000
--- a/patches.baytrail/0467-drm-i915-simplify-rps-interrupt-enabling-disabling-s.patch
+++ /dev/null
@@ -1,55 +0,0 @@
-From 89aad62e712a481d4d311b6846e2845638a88cfb Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 4 Jul 2013 23:35:34 +0200
-Subject: drm/i915: simplify rps interrupt enabling/disabling sequence
-
-At the moment we have the following interrupt enabling sequence:
-1. irq preinstall hook
-2. enabling the interrupt handler and calling irq postinstall hook
-3. enable rps interrupts from the async work
-
-And the folliwing disable sequence:
-1. disabling the interrupt handler and calling the uninstall hook
-2. disabling the rps interrupt
-
-Since the postinstall hook now always sets up PMIIR, PMIER and PMIMR
-to known-good states there no way for an interrupt to sneak in in the
-enable sequence, so we can reinstate the WARN lost in
-
-commit eda63ffb906c2fb3b609a0e87aeb63c0f25b9e6b
-Author: Ben Widawsky <ben@bwidawsk.net>
-Date:   Tue May 28 19:22:26 2013 -0700
-
-    drm/i915: Add PM regs to pre/post install
-
-Note that there's some room for future cleanups since most of the
-interrupt register clearing in the disable function is rather
-redundant. But that's better done in follow-up patches, if at all.
-
-Cc: Ben Widawsky <ben@bwidawsk.net>
-Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit a0b3335a2141aadb8f2398ade97fe574f2ddc875)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 4 +---
- 1 file changed, 1 insertion(+), 3 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index f3ae27291701..19646d3aa052 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -3193,9 +3193,7 @@ static void gen6_enable_rps_interrupts(struct drm_device *dev)
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 
- 	spin_lock_irq(&dev_priv->irq_lock);
--	/* FIXME: Our interrupt enabling sequence is bonghits.
--	 * dev_priv->rps.pm_iir really should be 0 here. */
--	dev_priv->rps.pm_iir = 0;
-+	WARN_ON(dev_priv->rps.pm_iir);
- 	I915_WRITE(GEN6_PMIMR, I915_READ(GEN6_PMIMR) & ~GEN6_PM_RPS_EVENTS);
- 	I915_WRITE(GEN6_PMIIR, GEN6_PM_RPS_EVENTS);
- 	spin_unlock_irq(&dev_priv->irq_lock);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0468-drm-i915-We-implement-WaFbcWaitForVBlankBeforeEnable.patch b/patches.baytrail/0468-drm-i915-We-implement-WaFbcWaitForVBlankBeforeEnable.patch
deleted file mode 100644
index 52f598287d080..0000000000000
--- a/patches.baytrail/0468-drm-i915-We-implement-WaFbcWaitForVBlankBeforeEnable.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From 77516eaf1c5aee58fef3981d8ac480401801a3f4 Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Fri, 7 Jun 2013 17:41:07 +0100
-Subject: drm/i915: We implement WaFbcWaitForVBlankBeforeEnable for ilk and snb
-
-We also wait for that blank on other platforms but the w/a doesn't
-apply there. Not an issue at all.
-
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 7457d61748f7939dea49849db442cb3df4c7c3fe)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 19646d3aa052..abd216d6cde3 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -404,6 +404,8 @@ static void intel_enable_fbc(struct drm_crtc *crtc, unsigned long interval)
- 	 * following the termination of the page-flipping sequence
- 	 * and indeed performing the enable as a co-routine and not
- 	 * waiting synchronously upon the vblank.
-+	 *
-+	 * WaFbcWaitForVBlankBeforeEnable:ilk,snb
- 	 */
- 	schedule_delayed_work(&work->work, msecs_to_jiffies(50));
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0469-drm-i915-We-implement-WaFbcAsynchFlipDisableFbcQueue.patch b/patches.baytrail/0469-drm-i915-We-implement-WaFbcAsynchFlipDisableFbcQueue.patch
deleted file mode 100644
index 14d41d16303c4..0000000000000
--- a/patches.baytrail/0469-drm-i915-We-implement-WaFbcAsynchFlipDisableFbcQueue.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From 8d1ab59df9e8a19abc331c73180269222c8cf96c Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Fri, 14 Jun 2013 15:23:24 +0100
-Subject: drm/i915: We implement WaFbcAsynchFlipDisableFbcQueue on ilk and snb
-
-v2: Put the comment a bit closer to the actual write (Paulo Zanoni)
-
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-[danvet: Fix space before tab.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 4bb353343dcc2486a1deda87f4c069153dc353c3)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 3 +++
- 1 file changed, 3 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index abd216d6cde3..cc5883215df4 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -4453,6 +4453,7 @@ static void ironlake_init_clock_gating(struct drm_device *dev)
- 	 * The bit 7,8,9 of 0x42020.
- 	 */
- 	if (IS_IRONLAKE_M(dev)) {
-+		/* WaFbcAsynchFlipDisableFbcQueue:ilk */
- 		I915_WRITE(ILK_DISPLAY_CHICKEN1,
- 			   I915_READ(ILK_DISPLAY_CHICKEN1) |
- 			   ILK_FBCQ_DIS);
-@@ -4589,6 +4590,8 @@ static void gen6_init_clock_gating(struct drm_device *dev)
- 	 * The bit5 and bit7 of 0x42020
- 	 * The bit14 of 0x70180
- 	 * The bit14 of 0x71180
-+	 *
-+	 * WaFbcAsynchFlipDisableFbcQueue:snb
- 	 */
- 	I915_WRITE(ILK_DISPLAY_CHICKEN1,
- 		   I915_READ(ILK_DISPLAY_CHICKEN1) |
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0470-drm-i915-We-implement-WaFbcDisableDpfcClockGating-on.patch b/patches.baytrail/0470-drm-i915-We-implement-WaFbcDisableDpfcClockGating-on.patch
deleted file mode 100644
index e9b820a4b1cc4..0000000000000
--- a/patches.baytrail/0470-drm-i915-We-implement-WaFbcDisableDpfcClockGating-on.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From 253338ee832f1975a5802417448206c528043593 Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Fri, 7 Jun 2013 17:41:09 +0100
-Subject: drm/i915: We implement WaFbcDisableDpfcClockGating on ilk
-
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit f1e8fa56fd650e0a23f64afdf59f3907d9a89615)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 5 ++++-
- 1 file changed, 4 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index cc5883215df4..7c7e0cd40295 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -4416,7 +4416,10 @@ static void ironlake_init_clock_gating(struct drm_device *dev)
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	uint32_t dspclk_gate = ILK_VRHUNIT_CLOCK_GATE_DISABLE;
- 
--	/* Required for FBC */
-+	/*
-+	 * Required for FBC
-+	 * WaFbcDisableDpfcClockGating:ilk
-+	 */
- 	dspclk_gate |= ILK_DPFCRUNIT_CLOCK_GATE_DISABLE |
- 		   ILK_DPFCUNIT_CLOCK_GATE_DISABLE |
- 		   ILK_DPFDUNIT_CLOCK_GATE_ENABLE;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0471-drm-i915-We-implement-WaMPhyProgramming-on-Haswell.patch b/patches.baytrail/0471-drm-i915-We-implement-WaMPhyProgramming-on-Haswell.patch
deleted file mode 100644
index 49ce966521822..0000000000000
--- a/patches.baytrail/0471-drm-i915-We-implement-WaMPhyProgramming-on-Haswell.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From 1c28bae6e1cf1449a6f8ef34999ea7c8963d979c Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Fri, 7 Jun 2013 17:41:10 +0100
-Subject: drm/i915: We implement WaMPhyProgramming on Haswell
-
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 19bc678a6066d4ecca938c50ac2f9e9ccfb0ddbe)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 5 ++++-
- 1 file changed, 4 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 5363ff059ec9..e11d7426328f 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -5163,7 +5163,10 @@ static void ironlake_init_pch_refclk(struct drm_device *dev)
- 	BUG_ON(val != final);
- }
- 
--/* Sequence to enable CLKOUT_DP for FDI usage and configure PCH FDI I/O. */
-+/*
-+ * Sequence to enable CLKOUT_DP for FDI usage and configure PCH FDI I/O.
-+ * WaMPhyProgramming:hsw
-+ */
- static void lpt_init_pch_refclk(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0472-drm-i915-Don-t-try-to-calculate-RC6-residency-on-GEN.patch b/patches.baytrail/0472-drm-i915-Don-t-try-to-calculate-RC6-residency-on-GEN.patch
deleted file mode 100644
index 53661fa54727f..0000000000000
--- a/patches.baytrail/0472-drm-i915-Don-t-try-to-calculate-RC6-residency-on-GEN.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From ddf5ba89918a5441e160c67591dad60752afa2c6 Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Fri, 7 Jun 2013 17:41:14 +0100
-Subject: drm/i915: Don't try to calculate RC6 residency on GEN4 and before
-
-intel_enable_rc6() is used to check if we can compute the RC6 residency
-in the sysfs code. Disable this for platforms older than Ironlake.
-
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit eb4926e4a6e3922398fd6880f07a84db95aa3741)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 4 ++++
- 1 file changed, 4 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 7c7e0cd40295..948c171d7f73 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -3167,6 +3167,10 @@ static void valleyview_disable_rps(struct drm_device *dev)
- 
- int intel_enable_rc6(const struct drm_device *dev)
- {
-+	/* No RC6 before Ironlake */
-+	if (INTEL_INFO(dev)->gen < 5)
-+		return 0;
-+
- 	/* Respect the kernel parameter if it is set */
- 	if (i915_enable_rc6 >= 0)
- 		return i915_enable_rc6;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0473-drm-i915-Fix-retrieval-of-hangcheck-stats.patch b/patches.baytrail/0473-drm-i915-Fix-retrieval-of-hangcheck-stats.patch
deleted file mode 100644
index 94b025d14c163..0000000000000
--- a/patches.baytrail/0473-drm-i915-Fix-retrieval-of-hangcheck-stats.patch
+++ /dev/null
@@ -1,80 +0,0 @@
-From 93fda4f8e7ba96edfcdd01a5cfc955a9a1c0b0e2 Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Wed, 3 Jul 2013 17:22:06 +0300
-Subject: drm/i915: Fix retrieval of hangcheck stats
-
-The default context is always supported (as it contains the global
-hangcheck stats) and the contexts for hangcheck are not limited
-to any ring.
-
-References: https://bugs.freedesktop.org/show_bug.cgi?id=65845
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 11fa3384042f5578e0f6179eef70cbcb2892be92)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h         |  2 +-
- drivers/gpu/drm/i915/i915_gem_context.c | 23 ++++++++---------------
- 2 files changed, 9 insertions(+), 16 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 7adf2b45b185..dae1bf60d068 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1864,7 +1864,7 @@ static inline void i915_gem_context_unreference(struct i915_hw_context *ctx)
- }
- 
- struct i915_ctx_hang_stats * __must_check
--i915_gem_context_get_hang_stats(struct intel_ring_buffer *ring,
-+i915_gem_context_get_hang_stats(struct drm_device *dev,
- 				struct drm_file *file,
- 				u32 id);
- int i915_gem_context_create_ioctl(struct drm_device *dev, void *data,
-diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
-index 2074544682cf..2470206a4d07 100644
---- a/drivers/gpu/drm/i915/i915_gem_context.c
-+++ b/drivers/gpu/drm/i915/i915_gem_context.c
-@@ -304,31 +304,24 @@ static int context_idr_cleanup(int id, void *p, void *data)
- }
- 
- struct i915_ctx_hang_stats *
--i915_gem_context_get_hang_stats(struct intel_ring_buffer *ring,
-+i915_gem_context_get_hang_stats(struct drm_device *dev,
- 				struct drm_file *file,
- 				u32 id)
- {
--	struct drm_i915_private *dev_priv = ring->dev->dev_private;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct drm_i915_file_private *file_priv = file->driver_priv;
--	struct i915_hw_context *to;
--
--	if (dev_priv->hw_contexts_disabled)
--		return ERR_PTR(-ENOENT);
--
--	if (ring->id != RCS)
--		return ERR_PTR(-EINVAL);
--
--	if (file == NULL)
--		return ERR_PTR(-EINVAL);
-+	struct i915_hw_context *ctx;
- 
- 	if (id == DEFAULT_CONTEXT_ID)
- 		return &file_priv->hang_stats;
- 
--	to = i915_gem_context_get(file->driver_priv, id);
--	if (to == NULL)
-+	ctx = NULL;
-+	if (!dev_priv->hw_contexts_disabled)
-+		ctx = i915_gem_context_get(file->driver_priv, id);
-+	if (ctx == NULL)
- 		return ERR_PTR(-ENOENT);
- 
--	return &to->hang_stats;
-+	return &ctx->hang_stats;
- }
- 
- void i915_gem_context_close(struct drm_device *dev, struct drm_file *file)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0474-drm-i915-Replace-open-coding-of-DEFAULT_CONTEXT_ID.patch b/patches.baytrail/0474-drm-i915-Replace-open-coding-of-DEFAULT_CONTEXT_ID.patch
deleted file mode 100644
index f7c95760cc3df..0000000000000
--- a/patches.baytrail/0474-drm-i915-Replace-open-coding-of-DEFAULT_CONTEXT_ID.patch
+++ /dev/null
@@ -1,52 +0,0 @@
-From 4e3d6c24c1064ef08aceb1f8913c82a14aa7ac7e Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Wed, 3 Jul 2013 17:22:07 +0300
-Subject: drm/i915: Replace open-coding of DEFAULT_CONTEXT_ID
-
-The intent of the check is made more clear if we use the proper name for
-0 here.
-
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit e85209698649be30cb1389966f29107d63f16940)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem_execbuffer.c | 6 +++---
- 1 file changed, 3 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-index 64eda4463b70..1b58694d7be7 100644
---- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-@@ -873,7 +873,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
- 		break;
- 	case I915_EXEC_BSD:
- 		ring = &dev_priv->ring[VCS];
--		if (ctx_id != 0) {
-+		if (ctx_id != DEFAULT_CONTEXT_ID) {
- 			DRM_DEBUG("Ring %s doesn't support contexts\n",
- 				  ring->name);
- 			return -EPERM;
-@@ -881,7 +881,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
- 		break;
- 	case I915_EXEC_BLT:
- 		ring = &dev_priv->ring[BCS];
--		if (ctx_id != 0) {
-+		if (ctx_id != DEFAULT_CONTEXT_ID) {
- 			DRM_DEBUG("Ring %s doesn't support contexts\n",
- 				  ring->name);
- 			return -EPERM;
-@@ -889,7 +889,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
- 		break;
- 	case I915_EXEC_VEBOX:
- 		ring = &dev_priv->ring[VECS];
--		if (ctx_id != 0) {
-+		if (ctx_id != DEFAULT_CONTEXT_ID) {
- 			DRM_DEBUG("Ring %s doesn't support contexts\n",
- 				  ring->name);
- 			return -EPERM;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0475-drm-i915-introduce-i915_queue_hangcheck.patch b/patches.baytrail/0475-drm-i915-introduce-i915_queue_hangcheck.patch
deleted file mode 100644
index 60a40b40a26d1..0000000000000
--- a/patches.baytrail/0475-drm-i915-introduce-i915_queue_hangcheck.patch
+++ /dev/null
@@ -1,95 +0,0 @@
-From 984bf9a3ba2731044bbb1cdc0bd70caeb4172108 Mon Sep 17 00:00:00 2001
-From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
-Date: Wed, 3 Jul 2013 17:22:08 +0300
-Subject: drm/i915: introduce i915_queue_hangcheck
-
-To run hangcheck in near future.
-
-Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 10cd45b6e8ac1d1a99f6bdf0e0c80f2a1351f3f5)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h |  1 +
- drivers/gpu/drm/i915/i915_gem.c |  6 ++----
- drivers/gpu/drm/i915/i915_irq.c | 21 ++++++++++++---------
- 3 files changed, 15 insertions(+), 13 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index dae1bf60d068..fc7b1105b47a 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1623,6 +1623,7 @@ extern void i915_update_gfx_val(struct drm_i915_private *dev_priv);
- extern void intel_console_resume(struct work_struct *work);
- 
- /* i915_irq.c */
-+void i915_queue_hangcheck(struct drm_device *dev);
- void i915_hangcheck_elapsed(unsigned long data);
- void i915_handle_error(struct drm_device *dev, bool wedged);
- 
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index 791c238a6b01..e2370a2ef1ae 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -2087,10 +2087,8 @@ int __i915_add_request(struct intel_ring_buffer *ring,
- 	ring->outstanding_lazy_request = 0;
- 
- 	if (!dev_priv->ums.mm_suspended) {
--		if (i915_enable_hangcheck) {
--			mod_timer(&dev_priv->gpu_error.hangcheck_timer,
--				  round_jiffies_up(jiffies + DRM_I915_HANGCHECK_JIFFIES));
--		}
-+		i915_queue_hangcheck(ring->dev);
-+
- 		if (was_empty) {
- 			queue_delayed_work(dev_priv->wq,
- 					   &dev_priv->mm.retire_work,
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index 70cd3053fac5..55086078cdc4 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -698,18 +698,13 @@ static void ironlake_rps_change_irq_handler(struct drm_device *dev)
- static void notify_ring(struct drm_device *dev,
- 			struct intel_ring_buffer *ring)
- {
--	struct drm_i915_private *dev_priv = dev->dev_private;
--
- 	if (ring->obj == NULL)
- 		return;
- 
- 	trace_i915_gem_request_complete(ring, ring->get_seqno(ring, false));
- 
- 	wake_up_all(&ring->irq_queue);
--	if (i915_enable_hangcheck) {
--		mod_timer(&dev_priv->gpu_error.hangcheck_timer,
--			  round_jiffies_up(jiffies + DRM_I915_HANGCHECK_JIFFIES));
--	}
-+	i915_queue_hangcheck(dev);
- }
- 
- static void gen6_pm_rps_work(struct work_struct *work)
-@@ -2076,9 +2071,17 @@ void i915_hangcheck_elapsed(unsigned long data)
- 	if (busy_count)
- 		/* Reset timer case chip hangs without another request
- 		 * being added */
--		mod_timer(&dev_priv->gpu_error.hangcheck_timer,
--			  round_jiffies_up(jiffies +
--					   DRM_I915_HANGCHECK_JIFFIES));
-+		i915_queue_hangcheck(dev);
-+}
-+
-+void i915_queue_hangcheck(struct drm_device *dev)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	if (!i915_enable_hangcheck)
-+		return;
-+
-+	mod_timer(&dev_priv->gpu_error.hangcheck_timer,
-+		  round_jiffies_up(jiffies + DRM_I915_HANGCHECK_JIFFIES));
- }
- 
- static void ibx_irq_preinstall(struct drm_device *dev)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0476-drm-i915-Move-gtt-and-ppgtt-under-address-space-umbr.patch b/patches.baytrail/0476-drm-i915-Move-gtt-and-ppgtt-under-address-space-umbr.patch
deleted file mode 100644
index 3673d62a21f7f..0000000000000
--- a/patches.baytrail/0476-drm-i915-Move-gtt-and-ppgtt-under-address-space-umbr.patch
+++ /dev/null
@@ -1,625 +0,0 @@
-From e08dbc07fcc5b2ba9439f5ecf34f3e19994383ac Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Tue, 16 Jul 2013 16:50:05 -0700
-Subject: drm/i915: Move gtt and ppgtt under address space umbrella
-
-The GTT and PPGTT can be thought of more generally as GPU address
-spaces. Many of their actions (insert entries), state (LRU lists), and
-many of their characteristics (size) can be shared. Do that.
-
-The change itself doesn't actually impact most of the VMA/VM rework
-coming up, it just fits in with the grand scheme of abstracting the GPU
-VM operations. GGTT will usually be a special case where we either know
-an object must be in the GGTT (dislay engine, workarounds, etc.).
-
-The scratch page is left as part of the VM (even though it's currently
-shared with the ppgtt code) because in the future when we have Full
-PPGTT, I intend to create a separate scratch page for each.
-
-v2: Drop usage of i915_gtt_vm (Daniel)
-Make cleanup also part of the parent class (Ben)
-Modified commit msg
-Rebased
-
-v3: Properly share scratch page (Imre)
-Finish commit message (Daniel, Imre)
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Reviewed-by: Imre Deak <imre.deak@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 853ba5d2231619e1c7f7de1269e135174ec8e3cb)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_debugfs.c |    4 
- drivers/gpu/drm/i915/i915_dma.c     |    4 
- drivers/gpu/drm/i915/i915_drv.h     |   57 +++++-------
- drivers/gpu/drm/i915/i915_gem.c     |    4 
- drivers/gpu/drm/i915/i915_gem_gtt.c |  165 +++++++++++++++++++-----------------
- 5 files changed, 123 insertions(+), 111 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_debugfs.c
-+++ b/drivers/gpu/drm/i915/i915_debugfs.c
-@@ -276,8 +276,8 @@ static int i915_gem_object_info(struct s
- 		   count, size);
- 
- 	seq_printf(m, "%zu [%lu] gtt total\n",
--		   dev_priv->gtt.total,
--		   dev_priv->gtt.mappable_end - dev_priv->gtt.start);
-+		   dev_priv->gtt.base.total,
-+		   dev_priv->gtt.mappable_end - dev_priv->gtt.base.start);
- 
- 	seq_putc(m, '\n');
- 	list_for_each_entry_reverse(file, &dev->filelist, lhead) {
---- a/drivers/gpu/drm/i915/i915_dma.c
-+++ b/drivers/gpu/drm/i915/i915_dma.c
-@@ -1684,7 +1684,7 @@ out_gem_unload:
- out_mtrrfree:
- 	arch_phys_wc_del(dev_priv->gtt.mtrr);
- 	io_mapping_free(dev_priv->gtt.mappable);
--	dev_priv->gtt.gtt_remove(dev);
-+	dev_priv->gtt.base.cleanup(&dev_priv->gtt.base);
- out_rmmap:
- 	pci_iounmap(dev->pdev, dev_priv->regs);
- put_bridge:
-@@ -1779,7 +1779,7 @@ int i915_driver_unload(struct drm_device
- 	destroy_workqueue(dev_priv->wq);
- 	pm_qos_remove_request(&dev_priv->pm_qos);
- 
--	dev_priv->gtt.gtt_remove(dev);
-+	dev_priv->gtt.base.cleanup(&dev_priv->gtt.base);
- 
- 	if (dev_priv->slab)
- 		kmem_cache_destroy(dev_priv->slab);
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -446,6 +446,29 @@ enum i915_cache_level {
- 
- typedef uint32_t gen6_gtt_pte_t;
- 
-+struct i915_address_space {
-+	struct drm_device *dev;
-+	unsigned long start;		/* Start offset always 0 for dri2 */
-+	size_t total;		/* size addr space maps (ex. 2GB for ggtt) */
-+
-+	struct {
-+		dma_addr_t addr;
-+		struct page *page;
-+	} scratch;
-+
-+	/* FIXME: Need a more generic return type */
-+	gen6_gtt_pte_t (*pte_encode)(dma_addr_t addr,
-+				     enum i915_cache_level level);
-+	void (*clear_range)(struct i915_address_space *vm,
-+			    unsigned int first_entry,
-+			    unsigned int num_entries);
-+	void (*insert_entries)(struct i915_address_space *vm,
-+			       struct sg_table *st,
-+			       unsigned int first_entry,
-+			       enum i915_cache_level cache_level);
-+	void (*cleanup)(struct i915_address_space *vm);
-+};
-+
- /* The Graphics Translation Table is the way in which GEN hardware translates a
-  * Graphics Virtual Address into a Physical Address. In addition to the normal
-  * collateral associated with any va->pa translations GEN hardware also has a
-@@ -454,8 +477,7 @@ typedef uint32_t gen6_gtt_pte_t;
-  * the spec.
-  */
- struct i915_gtt {
--	unsigned long start;		/* Start offset of used GTT */
--	size_t total;			/* Total size GTT can map */
-+	struct i915_address_space base;
- 	size_t stolen_size;		/* Total size of stolen memory */
- 
- 	unsigned long mappable_end;	/* End offset that we can CPU map */
-@@ -466,10 +488,6 @@ struct i915_gtt {
- 	void __iomem *gsm;
- 
- 	bool do_idle_maps;
--	struct {
--		dma_addr_t addr;
--		struct page *page;
--	} scratch;
- 
- 	int mtrr;
- 
-@@ -477,38 +495,17 @@ struct i915_gtt {
- 	int (*gtt_probe)(struct drm_device *dev, size_t *gtt_total,
- 			  size_t *stolen, phys_addr_t *mappable_base,
- 			  unsigned long *mappable_end);
--	void (*gtt_remove)(struct drm_device *dev);
--	void (*gtt_clear_range)(struct drm_device *dev,
--				unsigned int first_entry,
--				unsigned int num_entries);
--	void (*gtt_insert_entries)(struct drm_device *dev,
--				   struct sg_table *st,
--				   unsigned int pg_start,
--				   enum i915_cache_level cache_level);
--	gen6_gtt_pte_t (*pte_encode)(dma_addr_t addr,
--				     enum i915_cache_level level);
- };
--#define gtt_total_entries(gtt) ((gtt).total >> PAGE_SHIFT)
-+#define gtt_total_entries(gtt) ((gtt).base.total >> PAGE_SHIFT)
- 
- struct i915_hw_ppgtt {
--	struct drm_device *dev;
-+	struct i915_address_space base;
- 	unsigned num_pd_entries;
- 	struct page **pt_pages;
- 	uint32_t pd_offset;
- 	dma_addr_t *pt_dma_addr;
- 
--	/* pte functions, mirroring the interface of the global gtt. */
--	void (*clear_range)(struct i915_hw_ppgtt *ppgtt,
--			    unsigned int first_entry,
--			    unsigned int num_entries);
--	void (*insert_entries)(struct i915_hw_ppgtt *ppgtt,
--			       struct sg_table *st,
--			       unsigned int pg_start,
--			       enum i915_cache_level cache_level);
--	gen6_gtt_pte_t (*pte_encode)(dma_addr_t addr,
--				     enum i915_cache_level level);
- 	int (*enable)(struct drm_device *dev);
--	void (*cleanup)(struct i915_hw_ppgtt *ppgtt);
- };
- 
- struct i915_ctx_hang_stats {
-@@ -1125,7 +1122,7 @@ typedef struct drm_i915_private {
- 	enum modeset_restore modeset_restore;
- 	struct mutex modeset_restore_lock;
- 
--	struct i915_gtt gtt;
-+	struct i915_gtt gtt; /* VMA representing the global address space */
- 
- 	struct i915_gem_mm mm;
- 
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -181,7 +181,7 @@ i915_gem_get_aperture_ioctl(struct drm_d
- 			pinned += i915_gem_obj_ggtt_size(obj);
- 	mutex_unlock(&dev->struct_mutex);
- 
--	args->aper_size = dev_priv->gtt.total;
-+	args->aper_size = dev_priv->gtt.base.total;
- 	args->aper_available_size = args->aper_size - pinned;
- 
- 	return 0;
-@@ -3065,7 +3065,7 @@ i915_gem_object_bind_to_gtt(struct drm_i
- 	u32 size, fence_size, fence_alignment, unfenced_alignment;
- 	bool mappable, fenceable;
- 	size_t gtt_max = map_and_fenceable ?
--		dev_priv->gtt.mappable_end : dev_priv->gtt.total;
-+		dev_priv->gtt.mappable_end : dev_priv->gtt.base.total;
- 	int ret;
- 
- 	fence_size = i915_gem_get_gtt_size(dev,
---- a/drivers/gpu/drm/i915/i915_gem_gtt.c
-+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
-@@ -124,7 +124,7 @@ static gen6_gtt_pte_t iris_pte_encode(dm
- 
- static void gen6_write_pdes(struct i915_hw_ppgtt *ppgtt)
- {
--	struct drm_i915_private *dev_priv = ppgtt->dev->dev_private;
-+	struct drm_i915_private *dev_priv = ppgtt->base.dev->dev_private;
- 	gen6_gtt_pte_t __iomem *pd_addr;
- 	uint32_t pd_entry;
- 	int i;
-@@ -203,18 +203,18 @@ static int gen6_ppgtt_enable(struct drm_
- }
- 
- /* PPGTT support for Sandybdrige/Gen6 and later */
--static void gen6_ppgtt_clear_range(struct i915_hw_ppgtt *ppgtt,
-+static void gen6_ppgtt_clear_range(struct i915_address_space *vm,
- 				   unsigned first_entry,
- 				   unsigned num_entries)
- {
--	struct drm_i915_private *dev_priv = ppgtt->dev->dev_private;
-+	struct i915_hw_ppgtt *ppgtt =
-+		container_of(vm, struct i915_hw_ppgtt, base);
- 	gen6_gtt_pte_t *pt_vaddr, scratch_pte;
- 	unsigned act_pt = first_entry / I915_PPGTT_PT_ENTRIES;
- 	unsigned first_pte = first_entry % I915_PPGTT_PT_ENTRIES;
- 	unsigned last_pte, i;
- 
--	scratch_pte = ppgtt->pte_encode(dev_priv->gtt.scratch.addr,
--					I915_CACHE_LLC);
-+	scratch_pte = vm->pte_encode(vm->scratch.addr, I915_CACHE_LLC);
- 
- 	while (num_entries) {
- 		last_pte = first_pte + num_entries;
-@@ -234,11 +234,13 @@ static void gen6_ppgtt_clear_range(struc
- 	}
- }
- 
--static void gen6_ppgtt_insert_entries(struct i915_hw_ppgtt *ppgtt,
-+static void gen6_ppgtt_insert_entries(struct i915_address_space *vm,
- 				      struct sg_table *pages,
- 				      unsigned first_entry,
- 				      enum i915_cache_level cache_level)
- {
-+	struct i915_hw_ppgtt *ppgtt =
-+		container_of(vm, struct i915_hw_ppgtt, base);
- 	gen6_gtt_pte_t *pt_vaddr;
- 	unsigned act_pt = first_entry / I915_PPGTT_PT_ENTRIES;
- 	unsigned act_pte = first_entry % I915_PPGTT_PT_ENTRIES;
-@@ -249,7 +251,7 @@ static void gen6_ppgtt_insert_entries(st
- 		dma_addr_t page_addr;
- 
- 		page_addr = sg_page_iter_dma_address(&sg_iter);
--		pt_vaddr[act_pte] = ppgtt->pte_encode(page_addr, cache_level);
-+		pt_vaddr[act_pte] = vm->pte_encode(page_addr, cache_level);
- 		if (++act_pte == I915_PPGTT_PT_ENTRIES) {
- 			kunmap_atomic(pt_vaddr);
- 			act_pt++;
-@@ -261,13 +263,15 @@ static void gen6_ppgtt_insert_entries(st
- 	kunmap_atomic(pt_vaddr);
- }
- 
--static void gen6_ppgtt_cleanup(struct i915_hw_ppgtt *ppgtt)
-+static void gen6_ppgtt_cleanup(struct i915_address_space *vm)
- {
-+	struct i915_hw_ppgtt *ppgtt =
-+		container_of(vm, struct i915_hw_ppgtt, base);
- 	int i;
- 
- 	if (ppgtt->pt_dma_addr) {
- 		for (i = 0; i < ppgtt->num_pd_entries; i++)
--			pci_unmap_page(ppgtt->dev->pdev,
-+			pci_unmap_page(ppgtt->base.dev->pdev,
- 				       ppgtt->pt_dma_addr[i],
- 				       4096, PCI_DMA_BIDIRECTIONAL);
- 	}
-@@ -281,7 +285,7 @@ static void gen6_ppgtt_cleanup(struct i9
- 
- static int gen6_ppgtt_init(struct i915_hw_ppgtt *ppgtt)
- {
--	struct drm_device *dev = ppgtt->dev;
-+	struct drm_device *dev = ppgtt->base.dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	unsigned first_pd_entry_in_global_pt;
- 	int i;
-@@ -293,17 +297,18 @@ static int gen6_ppgtt_init(struct i915_h
- 	first_pd_entry_in_global_pt = gtt_total_entries(dev_priv->gtt);
- 
- 	if (IS_HASWELL(dev)) {
--		ppgtt->pte_encode = hsw_pte_encode;
-+		ppgtt->base.pte_encode = hsw_pte_encode;
- 	} else if (IS_VALLEYVIEW(dev)) {
--		ppgtt->pte_encode = byt_pte_encode;
-+		ppgtt->base.pte_encode = byt_pte_encode;
- 	} else {
--		ppgtt->pte_encode = gen6_pte_encode;
-+		ppgtt->base.pte_encode = gen6_pte_encode;
- 	}
- 	ppgtt->num_pd_entries = GEN6_PPGTT_PD_ENTRIES;
- 	ppgtt->enable = gen6_ppgtt_enable;
--	ppgtt->clear_range = gen6_ppgtt_clear_range;
--	ppgtt->insert_entries = gen6_ppgtt_insert_entries;
--	ppgtt->cleanup = gen6_ppgtt_cleanup;
-+	ppgtt->base.clear_range = gen6_ppgtt_clear_range;
-+	ppgtt->base.insert_entries = gen6_ppgtt_insert_entries;
-+	ppgtt->base.cleanup = gen6_ppgtt_cleanup;
-+	ppgtt->base.scratch = dev_priv->gtt.base.scratch;
- 	ppgtt->pt_pages = kzalloc(sizeof(struct page *)*ppgtt->num_pd_entries,
- 				  GFP_KERNEL);
- 	if (!ppgtt->pt_pages)
-@@ -334,8 +339,8 @@ static int gen6_ppgtt_init(struct i915_h
- 		ppgtt->pt_dma_addr[i] = pt_addr;
- 	}
- 
--	ppgtt->clear_range(ppgtt, 0,
--			   ppgtt->num_pd_entries*I915_PPGTT_PT_ENTRIES);
-+	ppgtt->base.clear_range(&ppgtt->base, 0,
-+				ppgtt->num_pd_entries * I915_PPGTT_PT_ENTRIES);
- 
- 	ppgtt->pd_offset = first_pd_entry_in_global_pt * sizeof(gen6_gtt_pte_t);
- 
-@@ -368,7 +373,7 @@ static int i915_gem_init_aliasing_ppgtt(
- 	if (!ppgtt)
- 		return -ENOMEM;
- 
--	ppgtt->dev = dev;
-+	ppgtt->base.dev = dev;
- 
- 	if (INTEL_INFO(dev)->gen < 8)
- 		ret = gen6_ppgtt_init(ppgtt);
-@@ -391,7 +396,7 @@ void i915_gem_cleanup_aliasing_ppgtt(str
- 	if (!ppgtt)
- 		return;
- 
--	ppgtt->cleanup(ppgtt);
-+	ppgtt->base.cleanup(&ppgtt->base);
- 	dev_priv->mm.aliasing_ppgtt = NULL;
- }
- 
-@@ -399,17 +404,17 @@ void i915_ppgtt_bind_object(struct i915_
- 			    struct drm_i915_gem_object *obj,
- 			    enum i915_cache_level cache_level)
- {
--	ppgtt->insert_entries(ppgtt, obj->pages,
--			      i915_gem_obj_ggtt_offset(obj) >> PAGE_SHIFT,
--			      cache_level);
-+	ppgtt->base.insert_entries(&ppgtt->base, obj->pages,
-+				   i915_gem_obj_ggtt_offset(obj) >> PAGE_SHIFT,
-+				   cache_level);
- }
- 
- void i915_ppgtt_unbind_object(struct i915_hw_ppgtt *ppgtt,
- 			      struct drm_i915_gem_object *obj)
- {
--	ppgtt->clear_range(ppgtt,
--			   i915_gem_obj_ggtt_offset(obj) >> PAGE_SHIFT,
--			   obj->base.size >> PAGE_SHIFT);
-+	ppgtt->base.clear_range(&ppgtt->base,
-+				i915_gem_obj_ggtt_offset(obj) >> PAGE_SHIFT,
-+				obj->base.size >> PAGE_SHIFT);
- }
- 
- extern int intel_iommu_gfx_mapped;
-@@ -456,8 +461,9 @@ void i915_gem_restore_gtt_mappings(struc
- 	struct drm_i915_gem_object *obj;
- 
- 	/* First fill our portion of the GTT with scratch pages */
--	dev_priv->gtt.gtt_clear_range(dev, dev_priv->gtt.start / PAGE_SIZE,
--				      dev_priv->gtt.total / PAGE_SIZE);
-+	dev_priv->gtt.base.clear_range(&dev_priv->gtt.base,
-+				       dev_priv->gtt.base.start / PAGE_SIZE,
-+				       dev_priv->gtt.base.total / PAGE_SIZE);
- 
- 	list_for_each_entry(obj, &dev_priv->mm.bound_list, global_list) {
- 		i915_gem_clflush_object(obj);
-@@ -486,12 +492,12 @@ int i915_gem_gtt_prepare_object(struct d
-  * within the global GTT as well as accessible by the GPU through the GMADR
-  * mapped BAR (dev_priv->mm.gtt->gtt).
-  */
--static void gen6_ggtt_insert_entries(struct drm_device *dev,
-+static void gen6_ggtt_insert_entries(struct i915_address_space *vm,
- 				     struct sg_table *st,
- 				     unsigned int first_entry,
- 				     enum i915_cache_level level)
- {
--	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct drm_i915_private *dev_priv = vm->dev->dev_private;
- 	gen6_gtt_pte_t __iomem *gtt_entries =
- 		(gen6_gtt_pte_t __iomem *)dev_priv->gtt.gsm + first_entry;
- 	int i = 0;
-@@ -500,8 +506,7 @@ static void gen6_ggtt_insert_entries(str
- 
- 	for_each_sg_page(st->sgl, &sg_iter, st->nents, 0) {
- 		addr = sg_page_iter_dma_address(&sg_iter);
--		iowrite32(dev_priv->gtt.pte_encode(addr, level),
--			  &gtt_entries[i]);
-+		iowrite32(vm->pte_encode(addr, level), &gtt_entries[i]);
- 		i++;
- 	}
- 
-@@ -512,8 +517,8 @@ static void gen6_ggtt_insert_entries(str
- 	 * hardware should work, we must keep this posting read for paranoia.
- 	 */
- 	if (i != 0)
--		WARN_ON(readl(&gtt_entries[i-1])
--			!= dev_priv->gtt.pte_encode(addr, level));
-+		WARN_ON(readl(&gtt_entries[i-1]) !=
-+			vm->pte_encode(addr, level));
- 
- 	/* This next bit makes the above posting read even more important. We
- 	 * want to flush the TLBs only after we're certain all the PTE updates
-@@ -523,11 +528,11 @@ static void gen6_ggtt_insert_entries(str
- 	POSTING_READ(GFX_FLSH_CNTL_GEN6);
- }
- 
--static void gen6_ggtt_clear_range(struct drm_device *dev,
-+static void gen6_ggtt_clear_range(struct i915_address_space *vm,
- 				  unsigned int first_entry,
- 				  unsigned int num_entries)
- {
--	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct drm_i915_private *dev_priv = vm->dev->dev_private;
- 	gen6_gtt_pte_t scratch_pte, __iomem *gtt_base =
- 		(gen6_gtt_pte_t __iomem *) dev_priv->gtt.gsm + first_entry;
- 	const int max_entries = gtt_total_entries(dev_priv->gtt) - first_entry;
-@@ -538,15 +543,14 @@ static void gen6_ggtt_clear_range(struct
- 		 first_entry, num_entries, max_entries))
- 		num_entries = max_entries;
- 
--	scratch_pte = dev_priv->gtt.pte_encode(dev_priv->gtt.scratch.addr,
--					       I915_CACHE_LLC);
-+	scratch_pte = vm->pte_encode(vm->scratch.addr, I915_CACHE_LLC);
- 	for (i = 0; i < num_entries; i++)
- 		iowrite32(scratch_pte, &gtt_base[i]);
- 	readl(gtt_base);
- }
- 
- 
--static void i915_ggtt_insert_entries(struct drm_device *dev,
-+static void i915_ggtt_insert_entries(struct i915_address_space *vm,
- 				     struct sg_table *st,
- 				     unsigned int pg_start,
- 				     enum i915_cache_level cache_level)
-@@ -558,7 +562,7 @@ static void i915_ggtt_insert_entries(str
- 
- }
- 
--static void i915_ggtt_clear_range(struct drm_device *dev,
-+static void i915_ggtt_clear_range(struct i915_address_space *vm,
- 				  unsigned int first_entry,
- 				  unsigned int num_entries)
- {
-@@ -571,10 +575,11 @@ void i915_gem_gtt_bind_object(struct drm
- {
- 	struct drm_device *dev = obj->base.dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
-+	const unsigned long entry = i915_gem_obj_ggtt_offset(obj) >> PAGE_SHIFT;
- 
--	dev_priv->gtt.gtt_insert_entries(dev, obj->pages,
--					 i915_gem_obj_ggtt_offset(obj) >> PAGE_SHIFT,
--					 cache_level);
-+	dev_priv->gtt.base.insert_entries(&dev_priv->gtt.base, obj->pages,
-+					  entry,
-+					  cache_level);
- 
- 	obj->has_global_gtt_mapping = 1;
- }
-@@ -583,10 +588,11 @@ void i915_gem_gtt_unbind_object(struct d
- {
- 	struct drm_device *dev = obj->base.dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
-+	const unsigned long entry = i915_gem_obj_ggtt_offset(obj) >> PAGE_SHIFT;
- 
--	dev_priv->gtt.gtt_clear_range(obj->base.dev,
--				      i915_gem_obj_ggtt_offset(obj) >> PAGE_SHIFT,
--				      obj->base.size >> PAGE_SHIFT);
-+	dev_priv->gtt.base.clear_range(&dev_priv->gtt.base,
-+				       entry,
-+				       obj->base.size >> PAGE_SHIFT);
- 
- 	obj->has_global_gtt_mapping = 0;
- }
-@@ -663,20 +669,23 @@ void i915_gem_setup_global_gtt(struct dr
- 		obj->has_global_gtt_mapping = 1;
- 	}
- 
--	dev_priv->gtt.start = start;
--	dev_priv->gtt.total = end - start;
-+	dev_priv->gtt.base.start = start;
-+	dev_priv->gtt.base.total = end - start;
- 
- 	/* Clear any non-preallocated blocks */
- 	drm_mm_for_each_hole(entry, &dev_priv->mm.gtt_space,
- 			     hole_start, hole_end) {
-+		const unsigned long count = (hole_end - hole_start) / PAGE_SIZE;
- 		DRM_DEBUG_KMS("clearing unused GTT space: [%lx, %lx]\n",
- 			      hole_start, hole_end);
--		dev_priv->gtt.gtt_clear_range(dev, hole_start / PAGE_SIZE,
--					      (hole_end-hole_start) / PAGE_SIZE);
-+		dev_priv->gtt.base.clear_range(&dev_priv->gtt.base,
-+					       hole_start / PAGE_SIZE,
-+					       count);
- 	}
- 
- 	/* And finally clear the reserved guard page */
--	dev_priv->gtt.gtt_clear_range(dev, end / PAGE_SIZE - 1, 1);
-+	dev_priv->gtt.base.clear_range(&dev_priv->gtt.base,
-+				       end / PAGE_SIZE - 1, 1);
- }
- 
- static bool
-@@ -699,7 +708,7 @@ void i915_gem_init_global_gtt(struct drm
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	unsigned long gtt_size, mappable_size;
- 
--	gtt_size = dev_priv->gtt.total;
-+	gtt_size = dev_priv->gtt.base.total;
- 	mappable_size = dev_priv->gtt.mappable_end;
- 
- 	if (intel_enable_ppgtt(dev) && HAS_ALIASING_PPGTT(dev)) {
-@@ -744,8 +753,8 @@ static int setup_scratch_page(struct drm
- #else
- 	dma_addr = page_to_phys(page);
- #endif
--	dev_priv->gtt.scratch.page = page;
--	dev_priv->gtt.scratch.addr = dma_addr;
-+	dev_priv->gtt.base.scratch.page = page;
-+	dev_priv->gtt.base.scratch.addr = dma_addr;
- 
- 	return 0;
- }
-@@ -753,11 +762,13 @@ static int setup_scratch_page(struct drm
- static void teardown_scratch_page(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
--	set_pages_wb(dev_priv->gtt.scratch.page, 1);
--	pci_unmap_page(dev->pdev, dev_priv->gtt.scratch.addr,
-+	struct page *page = dev_priv->gtt.base.scratch.page;
-+
-+	set_pages_wb(page, 1);
-+	pci_unmap_page(dev->pdev, dev_priv->gtt.base.scratch.addr,
- 		       PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
--	put_page(dev_priv->gtt.scratch.page);
--	__free_page(dev_priv->gtt.scratch.page);
-+	put_page(page);
-+	__free_page(page);
- }
- 
- static inline unsigned int gen6_get_total_gtt_size(u16 snb_gmch_ctl)
-@@ -820,17 +831,18 @@ static int gen6_gmch_probe(struct drm_de
- 	if (ret)
- 		DRM_ERROR("Scratch setup failed\n");
- 
--	dev_priv->gtt.gtt_clear_range = gen6_ggtt_clear_range;
--	dev_priv->gtt.gtt_insert_entries = gen6_ggtt_insert_entries;
-+	dev_priv->gtt.base.clear_range = gen6_ggtt_clear_range;
-+	dev_priv->gtt.base.insert_entries = gen6_ggtt_insert_entries;
- 
- 	return ret;
- }
- 
--static void gen6_gmch_remove(struct drm_device *dev)
-+static void gen6_gmch_remove(struct i915_address_space *vm)
- {
--	struct drm_i915_private *dev_priv = dev->dev_private;
--	iounmap(dev_priv->gtt.gsm);
--	teardown_scratch_page(dev_priv->dev);
-+
-+	struct i915_gtt *gtt = container_of(vm, struct i915_gtt, base);
-+	iounmap(gtt->gsm);
-+	teardown_scratch_page(vm->dev);
- }
- 
- static int i915_gmch_probe(struct drm_device *dev,
-@@ -851,13 +863,13 @@ static int i915_gmch_probe(struct drm_de
- 	intel_gtt_get(gtt_total, stolen, mappable_base, mappable_end);
- 
- 	dev_priv->gtt.do_idle_maps = needs_idle_maps(dev_priv->dev);
--	dev_priv->gtt.gtt_clear_range = i915_ggtt_clear_range;
--	dev_priv->gtt.gtt_insert_entries = i915_ggtt_insert_entries;
-+	dev_priv->gtt.base.clear_range = i915_ggtt_clear_range;
-+	dev_priv->gtt.base.insert_entries = i915_ggtt_insert_entries;
- 
- 	return 0;
- }
- 
--static void i915_gmch_remove(struct drm_device *dev)
-+static void i915_gmch_remove(struct i915_address_space *vm)
- {
- 	intel_gmch_remove();
- }
-@@ -870,27 +882,30 @@ int i915_gem_gtt_init(struct drm_device
- 
- 	if (INTEL_INFO(dev)->gen <= 5) {
- 		gtt->gtt_probe = i915_gmch_probe;
--		gtt->gtt_remove = i915_gmch_remove;
-+		gtt->base.cleanup = i915_gmch_remove;
- 	} else {
- 		gtt->gtt_probe = gen6_gmch_probe;
--		gtt->gtt_remove = gen6_gmch_remove;
-+		gtt->base.cleanup = gen6_gmch_remove;
- 		if (IS_HASWELL(dev) && dev_priv->ellc_size)
--			gtt->pte_encode = iris_pte_encode;
-+			gtt->base.pte_encode = iris_pte_encode;
- 		else if (IS_HASWELL(dev))
--			gtt->pte_encode = hsw_pte_encode;
-+			gtt->base.pte_encode = hsw_pte_encode;
- 		else if (IS_VALLEYVIEW(dev))
--			gtt->pte_encode = byt_pte_encode;
-+			gtt->base.pte_encode = byt_pte_encode;
- 		else
--			gtt->pte_encode = gen6_pte_encode;
-+			gtt->base.pte_encode = gen6_pte_encode;
- 	}
- 
--	ret = gtt->gtt_probe(dev, &gtt->total, &gtt->stolen_size,
-+	ret = gtt->gtt_probe(dev, &gtt->base.total, &gtt->stolen_size,
- 			     &gtt->mappable_base, &gtt->mappable_end);
- 	if (ret)
- 		return ret;
- 
-+	gtt->base.dev = dev;
-+
- 	/* GMADR is the PCI mmio aperture into the global GTT. */
--	DRM_INFO("Memory usable by graphics device = %zdM\n", gtt->total >> 20);
-+	DRM_INFO("Memory usable by graphics device = %zdM\n",
-+		 gtt->base.total >> 20);
- 	DRM_DEBUG_DRIVER("GMADR size = %ldM\n", gtt->mappable_end >> 20);
- 	DRM_DEBUG_DRIVER("GTT stolen size = %zdM\n", gtt->stolen_size >> 20);
- 
diff --git a/patches.baytrail/0477-drm-i915-Put-the-mm-in-the-parent-address-space.patch b/patches.baytrail/0477-drm-i915-Put-the-mm-in-the-parent-address-space.patch
deleted file mode 100644
index 6da9ed5732370..0000000000000
--- a/patches.baytrail/0477-drm-i915-Put-the-mm-in-the-parent-address-space.patch
+++ /dev/null
@@ -1,175 +0,0 @@
-From f86250e11b7c42d330a84ca7410b435537841a07 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Tue, 16 Jul 2013 16:50:06 -0700
-Subject: drm/i915: Put the mm in the parent address space
-
-Every address space should support object allocation. It therefore makes
-sense to have the allocator be part of the "superclass" which GGTT and
-PPGTT will derive.
-
-Since our maximum address space size is only 2GB we're not yet able to
-avoid doing allocation/eviction; but we'd hope one day this becomes
-almost irrelvant.
-
-v2: Rebased
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Reviewed-by: Imre Deak <imre.deak@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 93bd8649dba3155d1a0ba2a902d9c49f1c75a1da)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_dma.c        |    4 ++--
- drivers/gpu/drm/i915/i915_drv.h        |    3 +--
- drivers/gpu/drm/i915/i915_gem.c        |    2 +-
- drivers/gpu/drm/i915/i915_gem_evict.c  |   10 +++++-----
- drivers/gpu/drm/i915/i915_gem_gtt.c    |   17 +++++++++++------
- drivers/gpu/drm/i915/i915_gem_stolen.c |    4 ++--
- 6 files changed, 22 insertions(+), 18 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_dma.c
-+++ b/drivers/gpu/drm/i915/i915_dma.c
-@@ -1366,7 +1366,7 @@ cleanup_gem:
- 	i915_gem_context_fini(dev);
- 	mutex_unlock(&dev->struct_mutex);
- 	i915_gem_cleanup_aliasing_ppgtt(dev);
--	drm_mm_takedown(&dev_priv->mm.gtt_space);
-+	drm_mm_takedown(&dev_priv->gtt.base.mm);
- cleanup_irq:
- 	drm_irq_uninstall(dev);
- cleanup_gem_stolen:
-@@ -1769,7 +1769,7 @@ int i915_driver_unload(struct drm_device
- 			i915_free_hws(dev);
- 	}
- 
--	drm_mm_takedown(&dev_priv->mm.gtt_space);
-+	drm_mm_takedown(&dev_priv->gtt.base.mm);
- 	if (dev_priv->regs != NULL)
- 		pci_iounmap(dev->pdev, dev_priv->regs);
- 
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -447,6 +447,7 @@ enum i915_cache_level {
- typedef uint32_t gen6_gtt_pte_t;
- 
- struct i915_address_space {
-+	struct drm_mm mm;
- 	struct drm_device *dev;
- 	unsigned long start;		/* Start offset always 0 for dri2 */
- 	size_t total;		/* size addr space maps (ex. 2GB for ggtt) */
-@@ -832,8 +833,6 @@ struct intel_l3_parity {
- struct i915_gem_mm {
- 	/** Memory allocator for GTT stolen memory */
- 	struct drm_mm stolen;
--	/** Memory allocator for GTT */
--	struct drm_mm gtt_space;
- 	/** List of all objects in gtt_space. Used to restore gtt
- 	 * mappings on resume */
- 	struct list_head bound_list;
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -3107,7 +3107,7 @@ i915_gem_object_bind_to_gtt(struct drm_i
- 	i915_gem_object_pin_pages(obj);
- 
- search_free:
--	ret = drm_mm_insert_node_in_range_generic(&dev_priv->mm.gtt_space,
-+	ret = drm_mm_insert_node_in_range_generic(&dev_priv->gtt.base.mm,
- 						  &obj->gtt_space,
- 						  size, alignment,
- 						  obj->cache_level, 0, gtt_max);
---- a/drivers/gpu/drm/i915/i915_gem_evict.c
-+++ b/drivers/gpu/drm/i915/i915_gem_evict.c
-@@ -78,12 +78,12 @@ i915_gem_evict_something(struct drm_devi
- 
- 	INIT_LIST_HEAD(&unwind_list);
- 	if (mappable)
--		drm_mm_init_scan_with_range(&dev_priv->mm.gtt_space,
--					    min_size, alignment, cache_level,
--					    0, dev_priv->gtt.mappable_end);
-+		drm_mm_init_scan_with_range(&dev_priv->gtt.base.mm, min_size,
-+					    alignment, cache_level, 0,
-+					    dev_priv->gtt.mappable_end);
- 	else
--		drm_mm_init_scan(&dev_priv->mm.gtt_space,
--				 min_size, alignment, cache_level);
-+		drm_mm_init_scan(&dev_priv->gtt.base.mm, min_size, alignment,
-+				 cache_level);
- 
- 	/* First see if there is a large enough contiguous idle region... */
- 	list_for_each_entry(obj, &dev_priv->mm.inactive_list, mm_list) {
---- a/drivers/gpu/drm/i915/i915_gem_gtt.c
-+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
-@@ -269,6 +269,8 @@ static void gen6_ppgtt_cleanup(struct i9
- 		container_of(vm, struct i915_hw_ppgtt, base);
- 	int i;
- 
-+	drm_mm_takedown(&ppgtt->base.mm);
-+
- 	if (ppgtt->pt_dma_addr) {
- 		for (i = 0; i < ppgtt->num_pd_entries; i++)
- 			pci_unmap_page(ppgtt->base.dev->pdev,
-@@ -382,8 +384,11 @@ static int i915_gem_init_aliasing_ppgtt(
- 
- 	if (ret)
- 		kfree(ppgtt);
--	else
-+	else {
- 		dev_priv->mm.aliasing_ppgtt = ppgtt;
-+		drm_mm_init(&ppgtt->base.mm, ppgtt->base.start,
-+			    ppgtt->base.total);
-+	}
- 
- 	return ret;
- }
-@@ -651,9 +656,9 @@ void i915_gem_setup_global_gtt(struct dr
- 	BUG_ON(mappable_end > end);
- 
- 	/* Subtract the guard page ... */
--	drm_mm_init(&dev_priv->mm.gtt_space, start, end - start - PAGE_SIZE);
-+	drm_mm_init(&dev_priv->gtt.base.mm, start, end - start - PAGE_SIZE);
- 	if (!HAS_LLC(dev))
--		dev_priv->mm.gtt_space.color_adjust = i915_gtt_color_adjust;
-+		dev_priv->gtt.base.mm.color_adjust = i915_gtt_color_adjust;
- 
- 	/* Mark any preallocated objects as occupied */
- 	list_for_each_entry(obj, &dev_priv->mm.bound_list, global_list) {
-@@ -662,7 +667,7 @@ void i915_gem_setup_global_gtt(struct dr
- 			      i915_gem_obj_ggtt_offset(obj), obj->base.size);
- 
- 		WARN_ON(i915_gem_obj_ggtt_bound(obj));
--		ret = drm_mm_reserve_node(&dev_priv->mm.gtt_space,
-+		ret = drm_mm_reserve_node(&dev_priv->gtt.base.mm,
- 					  &obj->gtt_space);
- 		if (ret)
- 			DRM_DEBUG_KMS("Reservation failed\n");
-@@ -673,7 +678,7 @@ void i915_gem_setup_global_gtt(struct dr
- 	dev_priv->gtt.base.total = end - start;
- 
- 	/* Clear any non-preallocated blocks */
--	drm_mm_for_each_hole(entry, &dev_priv->mm.gtt_space,
-+	drm_mm_for_each_hole(entry, &dev_priv->gtt.base.mm,
- 			     hole_start, hole_end) {
- 		const unsigned long count = (hole_end - hole_start) / PAGE_SIZE;
- 		DRM_DEBUG_KMS("clearing unused GTT space: [%lx, %lx]\n",
-@@ -727,7 +732,7 @@ void i915_gem_init_global_gtt(struct drm
- 			return;
- 
- 		DRM_ERROR("Aliased PPGTT setup failed %d\n", ret);
--		drm_mm_takedown(&dev_priv->mm.gtt_space);
-+		drm_mm_takedown(&dev_priv->gtt.base.mm);
- 		gtt_size += GEN6_PPGTT_PD_ENTRIES * PAGE_SIZE;
- 	}
- 	i915_gem_setup_global_gtt(dev, 0, mappable_size, gtt_size);
---- a/drivers/gpu/drm/i915/i915_gem_stolen.c
-+++ b/drivers/gpu/drm/i915/i915_gem_stolen.c
-@@ -399,8 +399,8 @@ i915_gem_object_create_stolen_for_preall
- 	 */
- 	obj->gtt_space.start = gtt_offset;
- 	obj->gtt_space.size = size;
--	if (drm_mm_initialized(&dev_priv->mm.gtt_space)) {
--		ret = drm_mm_reserve_node(&dev_priv->mm.gtt_space,
-+	if (drm_mm_initialized(&dev_priv->gtt.base.mm)) {
-+		ret = drm_mm_reserve_node(&dev_priv->gtt.base.mm,
- 					  &obj->gtt_space);
- 		if (ret) {
- 			DRM_DEBUG_KMS("failed to allocate stolen GTT space\n");
diff --git a/patches.baytrail/0478-drm-i915-Create-a-global-list-of-vms.patch b/patches.baytrail/0478-drm-i915-Create-a-global-list-of-vms.patch
deleted file mode 100644
index c0801df0c9ef3..0000000000000
--- a/patches.baytrail/0478-drm-i915-Create-a-global-list-of-vms.patch
+++ /dev/null
@@ -1,64 +0,0 @@
-From 348a43de739dadc5abbe04ba13b5ff4573206e24 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Tue, 16 Jul 2013 16:50:07 -0700
-Subject: drm/i915: Create a global list of vms
-
-After we plumb our code to support multiple address spaces (VMs), there
-are a few situations where we want to be able to traverse the list of
-all address spaces in the system. Cases like eviction, or error state
-collection are obvious example.
-
-v2: Delete the global link instead of the list head. While this in and
-of itself shouldn't be really be a problem, doing this allows us to WARN
-on an non-empty list, which is a problem. (Daniel)
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Reviewed-by: Imre Deak <imre.deak@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit a7bbbd63e79a89b3e7b77eb734f2773ad69a2a43)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_dma.c |    6 ++++++
- drivers/gpu/drm/i915/i915_drv.h |    2 ++
- 2 files changed, 8 insertions(+)
-
---- a/drivers/gpu/drm/i915/i915_dma.c
-+++ b/drivers/gpu/drm/i915/i915_dma.c
-@@ -1508,6 +1508,10 @@ int i915_driver_load(struct drm_device *
- 
- 	i915_dump_device_info(dev_priv);
- 
-+	INIT_LIST_HEAD(&dev_priv->vm_list);
-+	INIT_LIST_HEAD(&dev_priv->gtt.base.global_link);
-+	list_add(&dev_priv->gtt.base.global_link, &dev_priv->vm_list);
-+
- 	if (i915_get_bridge_dev(dev)) {
- 		ret = -EIO;
- 		goto free_priv;
-@@ -1769,6 +1773,8 @@ int i915_driver_unload(struct drm_device
- 			i915_free_hws(dev);
- 	}
- 
-+	list_del(&dev_priv->gtt.base.global_link);
-+	WARN_ON(!list_empty(&dev_priv->vm_list));
- 	drm_mm_takedown(&dev_priv->gtt.base.mm);
- 	if (dev_priv->regs != NULL)
- 		pci_iounmap(dev->pdev, dev_priv->regs);
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -449,6 +449,7 @@ typedef uint32_t gen6_gtt_pte_t;
- struct i915_address_space {
- 	struct drm_mm mm;
- 	struct drm_device *dev;
-+	struct list_head global_link;
- 	unsigned long start;		/* Start offset always 0 for dri2 */
- 	size_t total;		/* size addr space maps (ex. 2GB for ggtt) */
- 
-@@ -1121,6 +1122,7 @@ typedef struct drm_i915_private {
- 	enum modeset_restore modeset_restore;
- 	struct mutex modeset_restore_lock;
- 
-+	struct list_head vm_list; /* Global list of all address spaces */
- 	struct i915_gtt gtt; /* VMA representing the global address space */
- 
- 	struct i915_gem_mm mm;
diff --git a/patches.baytrail/0479-drm-i915-Move-active-inactive-lists-to-new-mm.patch b/patches.baytrail/0479-drm-i915-Move-active-inactive-lists-to-new-mm.patch
deleted file mode 100644
index 2e794304388d6..0000000000000
--- a/patches.baytrail/0479-drm-i915-Move-active-inactive-lists-to-new-mm.patch
+++ /dev/null
@@ -1,462 +0,0 @@
-From 95829069a5f93790175d1cd4ef53bcd62dd145aa Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Tue, 16 Jul 2013 16:50:08 -0700
-Subject: drm/i915: Move active/inactive lists to new mm
-
-Shamelessly manipulated out of Daniel :-)
-"When moving the lists around explain that the active/inactive stuff is
-used by eviction when we run out of address space, so needs to be
-per-vma and per-address space. Bound/unbound otoh is used by the
-shrinker which only cares about the amount of memory used and not one
-bit about in which address space this memory is all used in. Of course
-to actual kick out an object we need to unbind it from every address
-space, but for that we have the per-object list of vmas."
-
-v2: Leave the bound list as a global one. (Chris, indirectly)
-
-v3: Rebased with no i915_gtt_vm. In most places I added a new *vm local,
-since it will eventually be replaces by a vm argument.
-Put comment back inline, since it no longer makes sense to do otherwise.
-
-v4: Rebased on hangcheck/error state movement
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Reviewed-by: Imre Deak <imre.deak@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 5cef07e1628300aeda9ac9dae95a2b406175b3ff)
-Signed-off-by: James Ausmus <james.ausmus@intel.com>
-
-Conflicts:
-	drivers/gpu/drm/i915/i915_gem.c
-	(context changes)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_debugfs.c    | 16 +++++++-----
- drivers/gpu/drm/i915/i915_drv.h        | 46 +++++++++++++++++-----------------
- drivers/gpu/drm/i915/i915_gem.c        | 33 ++++++++++++------------
- drivers/gpu/drm/i915/i915_gem_debug.c  |  2 +-
- drivers/gpu/drm/i915/i915_gem_evict.c  | 18 ++++++-------
- drivers/gpu/drm/i915/i915_gem_stolen.c |  3 ++-
- drivers/gpu/drm/i915/i915_gpu_error.c  |  8 +++---
- 7 files changed, 67 insertions(+), 59 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
-index 1c697c0ab7e5..a9246e9c5f9d 100644
---- a/drivers/gpu/drm/i915/i915_debugfs.c
-+++ b/drivers/gpu/drm/i915/i915_debugfs.c
-@@ -135,7 +135,8 @@ static int i915_gem_object_list_info(struct seq_file *m, void *data)
- 	uintptr_t list = (uintptr_t) node->info_ent->data;
- 	struct list_head *head;
- 	struct drm_device *dev = node->minor->dev;
--	drm_i915_private_t *dev_priv = dev->dev_private;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct i915_address_space *vm = &dev_priv->gtt.base;
- 	struct drm_i915_gem_object *obj;
- 	size_t total_obj_size, total_gtt_size;
- 	int count, ret;
-@@ -147,11 +148,11 @@ static int i915_gem_object_list_info(struct seq_file *m, void *data)
- 	switch (list) {
- 	case ACTIVE_LIST:
- 		seq_puts(m, "Active:\n");
--		head = &dev_priv->mm.active_list;
-+		head = &vm->active_list;
- 		break;
- 	case INACTIVE_LIST:
- 		seq_puts(m, "Inactive:\n");
--		head = &dev_priv->mm.inactive_list;
-+		head = &vm->inactive_list;
- 		break;
- 	default:
- 		mutex_unlock(&dev->struct_mutex);
-@@ -219,6 +220,7 @@ static int i915_gem_object_info(struct seq_file *m, void *data)
- 	u32 count, mappable_count, purgeable_count;
- 	size_t size, mappable_size, purgeable_size;
- 	struct drm_i915_gem_object *obj;
-+	struct i915_address_space *vm = &dev_priv->gtt.base;
- 	struct drm_file *file;
- 	int ret;
- 
-@@ -236,12 +238,12 @@ static int i915_gem_object_info(struct seq_file *m, void *data)
- 		   count, mappable_count, size, mappable_size);
- 
- 	size = count = mappable_size = mappable_count = 0;
--	count_objects(&dev_priv->mm.active_list, mm_list);
-+	count_objects(&vm->active_list, mm_list);
- 	seq_printf(m, "  %u [%u] active objects, %zu [%zu] bytes\n",
- 		   count, mappable_count, size, mappable_size);
- 
- 	size = count = mappable_size = mappable_count = 0;
--	count_objects(&dev_priv->mm.inactive_list, mm_list);
-+	count_objects(&vm->inactive_list, mm_list);
- 	seq_printf(m, "  %u [%u] inactive objects, %zu [%zu] bytes\n",
- 		   count, mappable_count, size, mappable_size);
- 
-@@ -1625,6 +1627,7 @@ i915_drop_caches_set(void *data, u64 val)
- 	struct drm_device *dev = data;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct drm_i915_gem_object *obj, *next;
-+	struct i915_address_space *vm = &dev_priv->gtt.base;
- 	int ret;
- 
- 	DRM_DEBUG_DRIVER("Dropping caches: 0x%08llx\n", val);
-@@ -1645,7 +1648,8 @@ i915_drop_caches_set(void *data, u64 val)
- 		i915_gem_retire_requests(dev);
- 
- 	if (val & DROP_BOUND) {
--		list_for_each_entry_safe(obj, next, &dev_priv->mm.inactive_list, mm_list)
-+		list_for_each_entry_safe(obj, next, &vm->inactive_list,
-+					 mm_list)
- 			if (obj->pin_count == 0) {
- 				ret = i915_gem_object_unbind(obj);
- 				if (ret)
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index bcfcc1086d5b..0bd41e4b9f08 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -458,6 +458,29 @@ struct i915_address_space {
- 		struct page *page;
- 	} scratch;
- 
-+	/**
-+	 * List of objects currently involved in rendering.
-+	 *
-+	 * Includes buffers having the contents of their GPU caches
-+	 * flushed, not necessarily primitives.  last_rendering_seqno
-+	 * represents when the rendering involved will be completed.
-+	 *
-+	 * A reference is held on the buffer while on this list.
-+	 */
-+	struct list_head active_list;
-+
-+	/**
-+	 * LRU list of objects which are not in the ringbuffer and
-+	 * are ready to unbind, but are still in the GTT.
-+	 *
-+	 * last_rendering_seqno is 0 while an object is in this list.
-+	 *
-+	 * A reference is not held on the buffer while on this list,
-+	 * as merely being GTT-bound shouldn't prevent its being
-+	 * freed, and we'll pull it off the list in the free path.
-+	 */
-+	struct list_head inactive_list;
-+
- 	/* FIXME: Need a more generic return type */
- 	gen6_gtt_pte_t (*pte_encode)(dma_addr_t addr,
- 				     enum i915_cache_level level);
-@@ -853,29 +876,6 @@ struct i915_gem_mm {
- 	struct shrinker inactive_shrinker;
- 	bool shrinker_no_lock_stealing;
- 
--	/**
--	 * List of objects currently involved in rendering.
--	 *
--	 * Includes buffers having the contents of their GPU caches
--	 * flushed, not necessarily primitives.  last_rendering_seqno
--	 * represents when the rendering involved will be completed.
--	 *
--	 * A reference is held on the buffer while on this list.
--	 */
--	struct list_head active_list;
--
--	/**
--	 * LRU list of objects which are not in the ringbuffer and
--	 * are ready to unbind, but are still in the GTT.
--	 *
--	 * last_rendering_seqno is 0 while an object is in this list.
--	 *
--	 * A reference is not held on the buffer while on this list,
--	 * as merely being GTT-bound shouldn't prevent its being
--	 * freed, and we'll pull it off the list in the free path.
--	 */
--	struct list_head inactive_list;
--
- 	/** LRU list of objects with fence regs on them. */
- 	struct list_head fence_list;
- 
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index b99c73b82ce4..0d749cb9d01a 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -1692,6 +1692,7 @@ __i915_gem_shrink(struct drm_i915_private *dev_priv, long target,
- 		  bool purgeable_only)
- {
- 	struct drm_i915_gem_object *obj, *next;
-+	struct i915_address_space *vm = &dev_priv->gtt.base;
- 	long count = 0;
- 
- 	list_for_each_entry_safe(obj, next,
-@@ -1705,9 +1706,7 @@ __i915_gem_shrink(struct drm_i915_private *dev_priv, long target,
- 		}
- 	}
- 
--	list_for_each_entry_safe(obj, next,
--				 &dev_priv->mm.inactive_list,
--				 mm_list) {
-+	list_for_each_entry_safe(obj, next, &vm->inactive_list, mm_list) {
- 		if ((i915_gem_object_is_purgeable(obj) || !purgeable_only) &&
- 		    i915_gem_object_unbind(obj) == 0 &&
- 		    i915_gem_object_put_pages(obj) == 0) {
-@@ -1878,6 +1877,7 @@ i915_gem_object_move_to_active(struct drm_i915_gem_object *obj,
- {
- 	struct drm_device *dev = obj->base.dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct i915_address_space *vm = &dev_priv->gtt.base;
- 	u32 seqno = intel_ring_get_seqno(ring);
- 
- 	BUG_ON(ring == NULL);
-@@ -1894,7 +1894,7 @@ i915_gem_object_move_to_active(struct drm_i915_gem_object *obj,
- 	}
- 
- 	/* Move from whatever list we were on to the tail of execution. */
--	list_move_tail(&obj->mm_list, &dev_priv->mm.active_list);
-+	list_move_tail(&obj->mm_list, &vm->active_list);
- 	list_move_tail(&obj->ring_list, &ring->active_list);
- 
- 	obj->last_read_seqno = seqno;
-@@ -1918,11 +1918,12 @@ i915_gem_object_move_to_inactive(struct drm_i915_gem_object *obj)
- {
- 	struct drm_device *dev = obj->base.dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct i915_address_space *vm = &dev_priv->gtt.base;
- 
- 	BUG_ON(obj->base.write_domain & ~I915_GEM_GPU_DOMAINS);
- 	BUG_ON(!obj->active);
- 
--	list_move_tail(&obj->mm_list, &dev_priv->mm.inactive_list);
-+	list_move_tail(&obj->mm_list, &vm->inactive_list);
- 
- 	list_del_init(&obj->ring_list);
- 	obj->ring = NULL;
-@@ -2274,6 +2275,7 @@ void i915_gem_restore_fences(struct drm_device *dev)
- void i915_gem_reset(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct i915_address_space *vm = &dev_priv->gtt.base;
- 	struct drm_i915_gem_object *obj;
- 	struct intel_ring_buffer *ring;
- 	int i;
-@@ -2284,12 +2286,8 @@ void i915_gem_reset(struct drm_device *dev)
- 	/* Move everything out of the GPU domains to ensure we do any
- 	 * necessary invalidation upon reuse.
- 	 */
--	list_for_each_entry(obj,
--			    &dev_priv->mm.inactive_list,
--			    mm_list)
--	{
-+	list_for_each_entry(obj, &vm->inactive_list, mm_list)
- 		obj->base.read_domains &= ~I915_GEM_GPU_DOMAINS;
--	}
- 
- 	i915_gem_restore_fences(dev);
- }
-@@ -3062,6 +3060,7 @@ i915_gem_object_bind_to_gtt(struct drm_i915_gem_object *obj,
- {
- 	struct drm_device *dev = obj->base.dev;
- 	drm_i915_private_t *dev_priv = dev->dev_private;
-+	struct i915_address_space *vm = &dev_priv->gtt.base;
- 	u32 size, fence_size, fence_alignment, unfenced_alignment;
- 	bool mappable, fenceable;
- 	size_t gtt_max = map_and_fenceable ?
-@@ -3137,7 +3136,7 @@ search_free:
- 	}
- 
- 	list_move_tail(&obj->global_list, &dev_priv->mm.bound_list);
--	list_add_tail(&obj->mm_list, &dev_priv->mm.inactive_list);
-+	list_add_tail(&obj->mm_list, &vm->inactive_list);
- 
- 	fenceable =
- 		i915_gem_obj_ggtt_size(obj) == fence_size &&
-@@ -3285,7 +3284,8 @@ i915_gem_object_set_to_gtt_domain(struct drm_i915_gem_object *obj, bool write)
- 
- 	/* And bump the LRU for this access */
- 	if (i915_gem_object_is_inactive(obj))
--		list_move_tail(&obj->mm_list, &dev_priv->mm.inactive_list);
-+		list_move_tail(&obj->mm_list,
-+			       &dev_priv->gtt.base.inactive_list);
- 
- 	return 0;
- }
-@@ -4226,7 +4226,7 @@ i915_gem_entervt_ioctl(struct drm_device *dev, void *data,
- 		return ret;
- 	}
- 
--	BUG_ON(!list_empty(&dev_priv->mm.active_list));
-+	BUG_ON(!list_empty(&dev_priv->gtt.base.active_list));
- 	mutex_unlock(&dev->struct_mutex);
- 
- 	ret = drm_irq_install(dev);
-@@ -4304,8 +4304,8 @@ i915_gem_load(struct drm_device *dev)
- 				  SLAB_HWCACHE_ALIGN,
- 				  NULL);
- 
--	INIT_LIST_HEAD(&dev_priv->mm.active_list);
--	INIT_LIST_HEAD(&dev_priv->mm.inactive_list);
-+	INIT_LIST_HEAD(&dev_priv->gtt.base.active_list);
-+	INIT_LIST_HEAD(&dev_priv->gtt.base.inactive_list);
- 	INIT_LIST_HEAD(&dev_priv->mm.unbound_list);
- 	INIT_LIST_HEAD(&dev_priv->mm.bound_list);
- 	INIT_LIST_HEAD(&dev_priv->mm.fence_list);
-@@ -4576,6 +4576,7 @@ i915_gem_inactive_shrink(struct shrinker *shrinker, struct shrink_control *sc)
- 			     struct drm_i915_private,
- 			     mm.inactive_shrinker);
- 	struct drm_device *dev = dev_priv->dev;
-+	struct i915_address_space *vm = &dev_priv->gtt.base;
- 	struct drm_i915_gem_object *obj;
- 	int nr_to_scan = sc->nr_to_scan;
- 	bool unlock = true;
-@@ -4604,7 +4605,7 @@ i915_gem_inactive_shrink(struct shrinker *shrinker, struct shrink_control *sc)
- 	list_for_each_entry(obj, &dev_priv->mm.unbound_list, global_list)
- 		if (obj->pages_pin_count == 0)
- 			cnt += obj->base.size >> PAGE_SHIFT;
--	list_for_each_entry(obj, &dev_priv->mm.inactive_list, mm_list)
-+	list_for_each_entry(obj, &vm->inactive_list, global_list)
- 		if (obj->pin_count == 0 && obj->pages_pin_count == 0)
- 			cnt += obj->base.size >> PAGE_SHIFT;
- 
-diff --git a/drivers/gpu/drm/i915/i915_gem_debug.c b/drivers/gpu/drm/i915/i915_gem_debug.c
-index 582e6a5f3dac..bf945a39fbb1 100644
---- a/drivers/gpu/drm/i915/i915_gem_debug.c
-+++ b/drivers/gpu/drm/i915/i915_gem_debug.c
-@@ -97,7 +97,7 @@ i915_verify_lists(struct drm_device *dev)
- 		}
- 	}
- 
--	list_for_each_entry(obj, &dev_priv->mm.inactive_list, list) {
-+	list_for_each_entry(obj, &i915_gtt_vm->inactive_list, list) {
- 		if (obj->base.dev != dev ||
- 		    !atomic_read(&obj->base.refcount.refcount)) {
- 			DRM_ERROR("freed inactive %p\n", obj);
-diff --git a/drivers/gpu/drm/i915/i915_gem_evict.c b/drivers/gpu/drm/i915/i915_gem_evict.c
-index f1c9ab096b00..43b82350d8dc 100644
---- a/drivers/gpu/drm/i915/i915_gem_evict.c
-+++ b/drivers/gpu/drm/i915/i915_gem_evict.c
-@@ -47,6 +47,7 @@ i915_gem_evict_something(struct drm_device *dev, int min_size,
- 			 bool mappable, bool nonblocking)
- {
- 	drm_i915_private_t *dev_priv = dev->dev_private;
-+	struct i915_address_space *vm = &dev_priv->gtt.base;
- 	struct list_head eviction_list, unwind_list;
- 	struct drm_i915_gem_object *obj;
- 	int ret = 0;
-@@ -78,15 +79,14 @@ i915_gem_evict_something(struct drm_device *dev, int min_size,
- 
- 	INIT_LIST_HEAD(&unwind_list);
- 	if (mappable)
--		drm_mm_init_scan_with_range(&dev_priv->gtt.base.mm, min_size,
-+		drm_mm_init_scan_with_range(&vm->mm, min_size,
- 					    alignment, cache_level, 0,
- 					    dev_priv->gtt.mappable_end);
- 	else
--		drm_mm_init_scan(&dev_priv->gtt.base.mm, min_size, alignment,
--				 cache_level);
-+		drm_mm_init_scan(&vm->mm, min_size, alignment, cache_level);
- 
- 	/* First see if there is a large enough contiguous idle region... */
--	list_for_each_entry(obj, &dev_priv->mm.inactive_list, mm_list) {
-+	list_for_each_entry(obj, &vm->inactive_list, mm_list) {
- 		if (mark_free(obj, &unwind_list))
- 			goto found;
- 	}
-@@ -95,7 +95,7 @@ i915_gem_evict_something(struct drm_device *dev, int min_size,
- 		goto none;
- 
- 	/* Now merge in the soon-to-be-expired objects... */
--	list_for_each_entry(obj, &dev_priv->mm.active_list, mm_list) {
-+	list_for_each_entry(obj, &vm->active_list, mm_list) {
- 		if (mark_free(obj, &unwind_list))
- 			goto found;
- 	}
-@@ -154,12 +154,13 @@ int
- i915_gem_evict_everything(struct drm_device *dev)
- {
- 	drm_i915_private_t *dev_priv = dev->dev_private;
-+	struct i915_address_space *vm = &dev_priv->gtt.base;
- 	struct drm_i915_gem_object *obj, *next;
- 	bool lists_empty;
- 	int ret;
- 
--	lists_empty = (list_empty(&dev_priv->mm.inactive_list) &&
--		       list_empty(&dev_priv->mm.active_list));
-+	lists_empty = (list_empty(&vm->inactive_list) &&
-+		       list_empty(&vm->active_list));
- 	if (lists_empty)
- 		return -ENOSPC;
- 
-@@ -176,8 +177,7 @@ i915_gem_evict_everything(struct drm_device *dev)
- 	i915_gem_retire_requests(dev);
- 
- 	/* Having flushed everything, unbind() should never raise an error */
--	list_for_each_entry_safe(obj, next,
--				 &dev_priv->mm.inactive_list, mm_list)
-+	list_for_each_entry_safe(obj, next, &vm->inactive_list, mm_list)
- 		if (obj->pin_count == 0)
- 			WARN_ON(i915_gem_object_unbind(obj));
- 
-diff --git a/drivers/gpu/drm/i915/i915_gem_stolen.c b/drivers/gpu/drm/i915/i915_gem_stolen.c
-index ede8c41399d9..46a971560b01 100644
---- a/drivers/gpu/drm/i915/i915_gem_stolen.c
-+++ b/drivers/gpu/drm/i915/i915_gem_stolen.c
-@@ -351,6 +351,7 @@ i915_gem_object_create_stolen_for_preallocated(struct drm_device *dev,
- 					       u32 size)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct i915_address_space *vm = &dev_priv->gtt.base;
- 	struct drm_i915_gem_object *obj;
- 	struct drm_mm_node *stolen;
- 	int ret;
-@@ -411,7 +412,7 @@ i915_gem_object_create_stolen_for_preallocated(struct drm_device *dev,
- 	obj->has_global_gtt_mapping = 1;
- 
- 	list_add_tail(&obj->global_list, &dev_priv->mm.bound_list);
--	list_add_tail(&obj->mm_list, &dev_priv->mm.inactive_list);
-+	list_add_tail(&obj->mm_list, &vm->inactive_list);
- 
- 	return obj;
- 
-diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
-index 58386cebb865..d970d84da65f 100644
---- a/drivers/gpu/drm/i915/i915_gpu_error.c
-+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
-@@ -622,6 +622,7 @@ static struct drm_i915_error_object *
- i915_error_first_batchbuffer(struct drm_i915_private *dev_priv,
- 			     struct intel_ring_buffer *ring)
- {
-+	struct i915_address_space *vm = &dev_priv->gtt.base;
- 	struct drm_i915_gem_object *obj;
- 	u32 seqno;
- 
-@@ -641,7 +642,7 @@ i915_error_first_batchbuffer(struct drm_i915_private *dev_priv,
- 	}
- 
- 	seqno = ring->get_seqno(ring, false);
--	list_for_each_entry(obj, &dev_priv->mm.active_list, mm_list) {
-+	list_for_each_entry(obj, &vm->active_list, mm_list) {
- 		if (obj->ring != ring)
- 			continue;
- 
-@@ -773,11 +774,12 @@ static void i915_gem_record_rings(struct drm_device *dev,
- static void i915_gem_capture_buffers(struct drm_i915_private *dev_priv,
- 				     struct drm_i915_error_state *error)
- {
-+	struct i915_address_space *vm = &dev_priv->gtt.base;
- 	struct drm_i915_gem_object *obj;
- 	int i;
- 
- 	i = 0;
--	list_for_each_entry(obj, &dev_priv->mm.active_list, mm_list)
-+	list_for_each_entry(obj, &vm->active_list, mm_list)
- 		i++;
- 	error->active_bo_count = i;
- 	list_for_each_entry(obj, &dev_priv->mm.bound_list, global_list)
-@@ -797,7 +799,7 @@ static void i915_gem_capture_buffers(struct drm_i915_private *dev_priv,
- 		error->active_bo_count =
- 			capture_active_bo(error->active_bo,
- 					  error->active_bo_count,
--					  &dev_priv->mm.active_list);
-+					  &vm->active_list);
- 
- 	if (error->pinned_bo)
- 		error->pinned_bo_count =
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0480-drm-i915-Free-stolen-node-on-failed-preallocation.patch b/patches.baytrail/0480-drm-i915-Free-stolen-node-on-failed-preallocation.patch
deleted file mode 100644
index f007759673022..0000000000000
--- a/patches.baytrail/0480-drm-i915-Free-stolen-node-on-failed-preallocation.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From d6abeb0a8a79c011114af53bf02f60845e8a9907 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Wed, 17 Jul 2013 12:19:02 -0700
-Subject: drm/i915: Free stolen node on failed preallocation
-
-The odds of this happening are *extremely* unlikely.
-
-Reported-by: Imre Deak <imre.deak@intel.com>
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit f7f181843e6c24644b4b71b8631a5ea87de05158)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem_stolen.c | 5 +++--
- 1 file changed, 3 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem_stolen.c b/drivers/gpu/drm/i915/i915_gem_stolen.c
-index 46a971560b01..a893834ab010 100644
---- a/drivers/gpu/drm/i915/i915_gem_stolen.c
-+++ b/drivers/gpu/drm/i915/i915_gem_stolen.c
-@@ -405,7 +405,7 @@ i915_gem_object_create_stolen_for_preallocated(struct drm_device *dev,
- 					  &obj->gtt_space);
- 		if (ret) {
- 			DRM_DEBUG_KMS("failed to allocate stolen GTT space\n");
--			goto unref_out;
-+			goto err_out;
- 		}
- 	}
- 
-@@ -416,7 +416,8 @@ i915_gem_object_create_stolen_for_preallocated(struct drm_device *dev,
- 
- 	return obj;
- 
--unref_out:
-+err_out:
-+	drm_mm_put_block(stolen);
- 	drm_gem_object_unreference(&obj->base);
- 	return NULL;
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0481-drm-i915-Create-VMAs.patch b/patches.baytrail/0481-drm-i915-Create-VMAs.patch
deleted file mode 100644
index 30e3da3ee971b..0000000000000
--- a/patches.baytrail/0481-drm-i915-Create-VMAs.patch
+++ /dev/null
@@ -1,428 +0,0 @@
-From ccf33cf038a407ddfe8b2037e1640479865847f4 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Wed, 17 Jul 2013 12:19:03 -0700
-Subject: drm/i915: Create VMAs
-
-Formerly: "drm/i915: Create VMAs (part 1)"
-
-In a previous patch, the notion of a VM was introduced. A VMA describes
-an area of part of the VM address space. A VMA is similar to the concept
-in the linux mm. However, instead of representing regular memory, a VMA
-is backed by a GEM BO. There may be many VMAs for a given object, one
-for each VM the object is to be used in. This may occur through flink,
-dma-buf, or a number of other transient states.
-
-Currently the code depends on only 1 VMA per object, for the global GTT
-(and aliasing PPGTT). The following patches will address this and make
-the rest of the infrastructure more suited
-
-v2: s/i915_obj/i915_gem_obj (Chris)
-
-v3: Only move an object to the now global unbound list if there are no
-more VMAs for the object which are bound into a VM (ie. the list is
-empty).
-
-v4: killed obj->gtt_space
-some reworks due to rebase
-
-v5: Free vma on error path (Imre)
-
-v6: Another missed vma free in i915_gem_object_bind_to_gtt error path
-(Imre)
-Fixed vma freeing in stolen preallocation (Imre)
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Reviewed-by: Imre Deak <imre.deak@intel.com>
-[danvet: Squash in fixup from Ben to not deref a non-existing vma in
-set_cache_level, reported by Chris.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 2f63315692b1d3c055972ad33fc7168ae908b97b)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h        | 48 +++++++++++++++++-----
- drivers/gpu/drm/i915/i915_gem.c        | 74 +++++++++++++++++++++++++++-------
- drivers/gpu/drm/i915/i915_gem_evict.c  | 12 ++++--
- drivers/gpu/drm/i915/i915_gem_gtt.c    |  5 ++-
- drivers/gpu/drm/i915/i915_gem_stolen.c | 15 +++++--
- 5 files changed, 120 insertions(+), 34 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 0bd41e4b9f08..d972025bff14 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -533,6 +533,17 @@ struct i915_hw_ppgtt {
- 	int (*enable)(struct drm_device *dev);
- };
- 
-+/* To make things as simple as possible (ie. no refcounting), a VMA's lifetime
-+ * will always be <= an objects lifetime. So object refcounting should cover us.
-+ */
-+struct i915_vma {
-+	struct drm_mm_node node;
-+	struct drm_i915_gem_object *obj;
-+	struct i915_address_space *vm;
-+
-+	struct list_head vma_link; /* Link in the object's VMA list */
-+};
-+
- struct i915_ctx_hang_stats {
- 	/* This context had batch pending when hang was declared */
- 	unsigned batch_pending;
-@@ -1230,8 +1241,9 @@ struct drm_i915_gem_object {
- 
- 	const struct drm_i915_gem_object_ops *ops;
- 
--	/** Current space allocated to this object in the GTT, if any. */
--	struct drm_mm_node gtt_space;
-+	/** List of VMAs backed by this object */
-+	struct list_head vma_list;
-+
- 	/** Stolen memory for this object, instead of being backed by shmem. */
- 	struct drm_mm_node *stolen;
- 	struct list_head global_list;
-@@ -1357,18 +1369,32 @@ struct drm_i915_gem_object {
- 
- #define to_intel_bo(x) container_of(x, struct drm_i915_gem_object, base)
- 
--/* Offset of the first PTE pointing to this object */
--static inline unsigned long
--i915_gem_obj_ggtt_offset(struct drm_i915_gem_object *o)
-+/* This is a temporary define to help transition us to real VMAs. If you see
-+ * this, you're either reviewing code, or bisecting it. */
-+static inline struct i915_vma *
-+__i915_gem_obj_to_vma(struct drm_i915_gem_object *obj)
- {
--	return o->gtt_space.start;
-+	if (list_empty(&obj->vma_list))
-+		return NULL;
-+	return list_first_entry(&obj->vma_list, struct i915_vma, vma_link);
- }
- 
- /* Whether or not this object is currently mapped by the translation tables */
- static inline bool
- i915_gem_obj_ggtt_bound(struct drm_i915_gem_object *o)
- {
--	return drm_mm_node_allocated(&o->gtt_space);
-+	struct i915_vma *vma = __i915_gem_obj_to_vma(o);
-+	if (vma == NULL)
-+		return false;
-+	return drm_mm_node_allocated(&vma->node);
-+}
-+
-+/* Offset of the first PTE pointing to this object */
-+static inline unsigned long
-+i915_gem_obj_ggtt_offset(struct drm_i915_gem_object *o)
-+{
-+	BUG_ON(list_empty(&o->vma_list));
-+	return __i915_gem_obj_to_vma(o)->node.start;
- }
- 
- /* The size used in the translation tables may be larger than the actual size of
-@@ -1378,14 +1404,15 @@ i915_gem_obj_ggtt_bound(struct drm_i915_gem_object *o)
- static inline unsigned long
- i915_gem_obj_ggtt_size(struct drm_i915_gem_object *o)
- {
--	return o->gtt_space.size;
-+	BUG_ON(list_empty(&o->vma_list));
-+	return __i915_gem_obj_to_vma(o)->node.size;
- }
- 
- static inline void
- i915_gem_obj_ggtt_set_color(struct drm_i915_gem_object *o,
- 			    enum i915_cache_level color)
- {
--	o->gtt_space.color = color;
-+	__i915_gem_obj_to_vma(o)->node.color = color;
- }
- 
- /**
-@@ -1693,6 +1720,9 @@ void i915_gem_object_init(struct drm_i915_gem_object *obj,
- struct drm_i915_gem_object *i915_gem_alloc_object(struct drm_device *dev,
- 						  size_t size);
- void i915_gem_free_object(struct drm_gem_object *obj);
-+struct i915_vma *i915_gem_vma_create(struct drm_i915_gem_object *obj,
-+				     struct i915_address_space *vm);
-+void i915_gem_vma_destroy(struct i915_vma *vma);
- 
- int __must_check i915_gem_object_pin(struct drm_i915_gem_object *obj,
- 				     uint32_t alignment,
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index 0d749cb9d01a..3200a201bcba 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -2590,6 +2590,7 @@ int
- i915_gem_object_unbind(struct drm_i915_gem_object *obj)
- {
- 	drm_i915_private_t *dev_priv = obj->base.dev->dev_private;
-+	struct i915_vma *vma;
- 	int ret;
- 
- 	if (!i915_gem_obj_ggtt_bound(obj))
-@@ -2627,11 +2628,20 @@ i915_gem_object_unbind(struct drm_i915_gem_object *obj)
- 	i915_gem_object_unpin_pages(obj);
- 
- 	list_del(&obj->mm_list);
--	list_move_tail(&obj->global_list, &dev_priv->mm.unbound_list);
- 	/* Avoid an unnecessary call to unbind on rebind. */
- 	obj->map_and_fenceable = true;
- 
--	drm_mm_remove_node(&obj->gtt_space);
-+	vma = __i915_gem_obj_to_vma(obj);
-+	list_del(&vma->vma_link);
-+	drm_mm_remove_node(&vma->node);
-+	i915_gem_vma_destroy(vma);
-+
-+	/* Since the unbound list is global, only move to that list if
-+	 * no more VMAs exist.
-+	 * NB: Until we have real VMAs there will only ever be one */
-+	WARN_ON(!list_empty(&obj->vma_list));
-+	if (list_empty(&obj->vma_list))
-+		list_move_tail(&obj->global_list, &dev_priv->mm.unbound_list);
- 
- 	return 0;
- }
-@@ -3065,8 +3075,12 @@ i915_gem_object_bind_to_gtt(struct drm_i915_gem_object *obj,
- 	bool mappable, fenceable;
- 	size_t gtt_max = map_and_fenceable ?
- 		dev_priv->gtt.mappable_end : dev_priv->gtt.base.total;
-+	struct i915_vma *vma;
- 	int ret;
- 
-+	if (WARN_ON(!list_empty(&obj->vma_list)))
-+		return -EBUSY;
-+
- 	fence_size = i915_gem_get_gtt_size(dev,
- 					   obj->base.size,
- 					   obj->tiling_mode);
-@@ -3105,9 +3119,15 @@ i915_gem_object_bind_to_gtt(struct drm_i915_gem_object *obj,
- 
- 	i915_gem_object_pin_pages(obj);
- 
-+	vma = i915_gem_vma_create(obj, &dev_priv->gtt.base);
-+	if (vma == NULL) {
-+		i915_gem_object_unpin_pages(obj);
-+		return -ENOMEM;
-+	}
-+
- search_free:
- 	ret = drm_mm_insert_node_in_range_generic(&dev_priv->gtt.base.mm,
--						  &obj->gtt_space,
-+						  &vma->node,
- 						  size, alignment,
- 						  obj->cache_level, 0, gtt_max);
- 	if (ret) {
-@@ -3118,25 +3138,21 @@ search_free:
- 		if (ret == 0)
- 			goto search_free;
- 
--		i915_gem_object_unpin_pages(obj);
--		return ret;
-+		goto err_out;
- 	}
--	if (WARN_ON(!i915_gem_valid_gtt_space(dev, &obj->gtt_space,
-+	if (WARN_ON(!i915_gem_valid_gtt_space(dev, &vma->node,
- 					      obj->cache_level))) {
--		i915_gem_object_unpin_pages(obj);
--		drm_mm_remove_node(&obj->gtt_space);
--		return -EINVAL;
-+		ret = -EINVAL;
-+		goto err_out;
- 	}
- 
- 	ret = i915_gem_gtt_prepare_object(obj);
--	if (ret) {
--		i915_gem_object_unpin_pages(obj);
--		drm_mm_remove_node(&obj->gtt_space);
--		return ret;
--	}
-+	if (ret)
-+		goto err_out;
- 
- 	list_move_tail(&obj->global_list, &dev_priv->mm.bound_list);
- 	list_add_tail(&obj->mm_list, &vm->inactive_list);
-+	list_add(&vma->vma_link, &obj->vma_list);
- 
- 	fenceable =
- 		i915_gem_obj_ggtt_size(obj) == fence_size &&
-@@ -3150,6 +3166,12 @@ search_free:
- 	trace_i915_gem_object_bind(obj, map_and_fenceable);
- 	i915_gem_verify_gtt(dev);
- 	return 0;
-+
-+err_out:
-+	i915_gem_vma_destroy(vma);
-+	i915_gem_object_unpin_pages(obj);
-+	drm_mm_remove_node(&vma->node);
-+	return ret;
- }
- 
- void
-@@ -3295,6 +3317,7 @@ int i915_gem_object_set_cache_level(struct drm_i915_gem_object *obj,
- {
- 	struct drm_device *dev = obj->base.dev;
- 	drm_i915_private_t *dev_priv = dev->dev_private;
-+	struct i915_vma *vma = __i915_gem_obj_to_vma(obj);
- 	int ret;
- 
- 	if (obj->cache_level == cache_level)
-@@ -3305,7 +3328,7 @@ int i915_gem_object_set_cache_level(struct drm_i915_gem_object *obj,
- 		return -EBUSY;
- 	}
- 
--	if (!i915_gem_valid_gtt_space(dev, &obj->gtt_space, cache_level)) {
-+	if (vma && !i915_gem_valid_gtt_space(dev, &vma->node, cache_level)) {
- 		ret = i915_gem_object_unbind(obj);
- 		if (ret)
- 			return ret;
-@@ -3850,6 +3873,7 @@ void i915_gem_object_init(struct drm_i915_gem_object *obj,
- 	INIT_LIST_HEAD(&obj->global_list);
- 	INIT_LIST_HEAD(&obj->ring_list);
- 	INIT_LIST_HEAD(&obj->exec_list);
-+	INIT_LIST_HEAD(&obj->vma_list);
- 
- 	obj->ops = ops;
- 
-@@ -3970,6 +3994,26 @@ void i915_gem_free_object(struct drm_gem_object *gem_obj)
- 	i915_gem_object_free(obj);
- }
- 
-+struct i915_vma *i915_gem_vma_create(struct drm_i915_gem_object *obj,
-+				     struct i915_address_space *vm)
-+{
-+	struct i915_vma *vma = kzalloc(sizeof(*vma), GFP_KERNEL);
-+	if (vma == NULL)
-+		return ERR_PTR(-ENOMEM);
-+
-+	INIT_LIST_HEAD(&vma->vma_link);
-+	vma->vm = vm;
-+	vma->obj = obj;
-+
-+	return vma;
-+}
-+
-+void i915_gem_vma_destroy(struct i915_vma *vma)
-+{
-+	WARN_ON(vma->node.allocated);
-+	kfree(vma);
-+}
-+
- int
- i915_gem_idle(struct drm_device *dev)
- {
-diff --git a/drivers/gpu/drm/i915/i915_gem_evict.c b/drivers/gpu/drm/i915/i915_gem_evict.c
-index 43b82350d8dc..df61f338dea1 100644
---- a/drivers/gpu/drm/i915/i915_gem_evict.c
-+++ b/drivers/gpu/drm/i915/i915_gem_evict.c
-@@ -34,11 +34,13 @@
- static bool
- mark_free(struct drm_i915_gem_object *obj, struct list_head *unwind)
- {
-+	struct i915_vma *vma = __i915_gem_obj_to_vma(obj);
-+
- 	if (obj->pin_count)
- 		return false;
- 
- 	list_add(&obj->exec_list, unwind);
--	return drm_mm_scan_add_block(&obj->gtt_space);
-+	return drm_mm_scan_add_block(&vma->node);
- }
- 
- int
-@@ -49,6 +51,7 @@ i915_gem_evict_something(struct drm_device *dev, int min_size,
- 	drm_i915_private_t *dev_priv = dev->dev_private;
- 	struct i915_address_space *vm = &dev_priv->gtt.base;
- 	struct list_head eviction_list, unwind_list;
-+	struct i915_vma *vma;
- 	struct drm_i915_gem_object *obj;
- 	int ret = 0;
- 
-@@ -106,8 +109,8 @@ none:
- 		obj = list_first_entry(&unwind_list,
- 				       struct drm_i915_gem_object,
- 				       exec_list);
--
--		ret = drm_mm_scan_remove_block(&obj->gtt_space);
-+		vma = __i915_gem_obj_to_vma(obj);
-+		ret = drm_mm_scan_remove_block(&vma->node);
- 		BUG_ON(ret);
- 
- 		list_del_init(&obj->exec_list);
-@@ -127,7 +130,8 @@ found:
- 		obj = list_first_entry(&unwind_list,
- 				       struct drm_i915_gem_object,
- 				       exec_list);
--		if (drm_mm_scan_remove_block(&obj->gtt_space)) {
-+		vma = __i915_gem_obj_to_vma(obj);
-+		if (drm_mm_scan_remove_block(&vma->node)) {
- 			list_move(&obj->exec_list, &eviction_list);
- 			drm_gem_object_reference(&obj->base);
- 			continue;
-diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
-index 999ecfecb32e..3b639a94dddf 100644
---- a/drivers/gpu/drm/i915/i915_gem_gtt.c
-+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
-@@ -662,16 +662,17 @@ void i915_gem_setup_global_gtt(struct drm_device *dev,
- 
- 	/* Mark any preallocated objects as occupied */
- 	list_for_each_entry(obj, &dev_priv->mm.bound_list, global_list) {
-+		struct i915_vma *vma = __i915_gem_obj_to_vma(obj);
- 		int ret;
- 		DRM_DEBUG_KMS("reserving preallocated space: %lx + %zx\n",
- 			      i915_gem_obj_ggtt_offset(obj), obj->base.size);
- 
- 		WARN_ON(i915_gem_obj_ggtt_bound(obj));
--		ret = drm_mm_reserve_node(&dev_priv->gtt.base.mm,
--					  &obj->gtt_space);
-+		ret = drm_mm_reserve_node(&dev_priv->gtt.base.mm, &vma->node);
- 		if (ret)
- 			DRM_DEBUG_KMS("Reservation failed\n");
- 		obj->has_global_gtt_mapping = 1;
-+		list_add(&vma->vma_link, &obj->vma_list);
- 	}
- 
- 	dev_priv->gtt.base.start = start;
-diff --git a/drivers/gpu/drm/i915/i915_gem_stolen.c b/drivers/gpu/drm/i915/i915_gem_stolen.c
-index a893834ab010..f52613605fe1 100644
---- a/drivers/gpu/drm/i915/i915_gem_stolen.c
-+++ b/drivers/gpu/drm/i915/i915_gem_stolen.c
-@@ -354,6 +354,7 @@ i915_gem_object_create_stolen_for_preallocated(struct drm_device *dev,
- 	struct i915_address_space *vm = &dev_priv->gtt.base;
- 	struct drm_i915_gem_object *obj;
- 	struct drm_mm_node *stolen;
-+	struct i915_vma *vma;
- 	int ret;
- 
- 	if (!drm_mm_initialized(&dev_priv->mm.stolen))
-@@ -393,18 +394,24 @@ i915_gem_object_create_stolen_for_preallocated(struct drm_device *dev,
- 	if (gtt_offset == I915_GTT_OFFSET_NONE)
- 		return obj;
- 
-+	vma = i915_gem_vma_create(obj, &dev_priv->gtt.base);
-+	if (!vma) {
-+		ret = -ENOMEM;
-+		goto err_out;
-+	}
-+
- 	/* To simplify the initialisation sequence between KMS and GTT,
- 	 * we allow construction of the stolen object prior to
- 	 * setting up the GTT space. The actual reservation will occur
- 	 * later.
- 	 */
--	obj->gtt_space.start = gtt_offset;
--	obj->gtt_space.size = size;
-+	vma->node.start = gtt_offset;
-+	vma->node.size = size;
- 	if (drm_mm_initialized(&dev_priv->gtt.base.mm)) {
--		ret = drm_mm_reserve_node(&dev_priv->gtt.base.mm,
--					  &obj->gtt_space);
-+		ret = drm_mm_reserve_node(&dev_priv->gtt.base.mm, &vma->node);
- 		if (ret) {
- 			DRM_DEBUG_KMS("failed to allocate stolen GTT space\n");
-+			i915_gem_vma_destroy(vma);
- 			goto err_out;
- 		}
- 	}
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0482-drm-Added-SDP-and-VSC-structures-for-handling-PSR-fo.patch b/patches.baytrail/0482-drm-Added-SDP-and-VSC-structures-for-handling-PSR-fo.patch
deleted file mode 100644
index 09d8516eaf68d..0000000000000
--- a/patches.baytrail/0482-drm-Added-SDP-and-VSC-structures-for-handling-PSR-fo.patch
+++ /dev/null
@@ -1,83 +0,0 @@
-From dcd463f5f27da560f0b00453d033d99fd0f1a63d Mon Sep 17 00:00:00 2001
-From: Shobhit Kumar <shobhit.kumar@intel.com>
-Date: Thu, 11 Jul 2013 18:44:55 -0300
-Subject: drm: Added SDP and VSC structures for handling PSR for eDP
-
-SDP header and SDP VSC header as per eDP 1.3 spec, section 3.5,
-chapter "PSR Secondary Data Package Support".
-
-v2: Modified and corrected the structures to be more in line for
-kernel coding guidelines and rebased the code on Paulo's DP patchset
-v3: removing unecessary identation at DP_RECEIVER_CAP_SIZE
-v4: moving them to include/drm/drm_dp_helper.h and also already
-    icluding EDP_PSR_RECEIVER_CAP_SIZE to add everything needed
-    for PSR at once at drm_dp_helper.h
-v5: Fix SDP VSC header and identation by (Paulo Zanoni) and
-    remove i915 from title (Daniel Vetter)
-v6: Fix spec version and move comments from code to commit message
-    since numbers might change in the future (by Paulo Zanoni).
-
-CC: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Sateesh Kavuri <sateesh.kavuri@intel.com>
-Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com>
-Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Acked-by: Dave Airlie <airlied@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 52604b1ffabac61eb07cce711f18e18ac74fbeae)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- include/drm/drm_dp_helper.h | 31 ++++++++++++++++++++++++++++++-
- 1 file changed, 30 insertions(+), 1 deletion(-)
-
-diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
-index e8e1417af3d9..ae8dbfb1207c 100644
---- a/include/drm/drm_dp_helper.h
-+++ b/include/drm/drm_dp_helper.h
-@@ -342,13 +342,42 @@ u8 drm_dp_get_adjust_request_voltage(u8 link_status[DP_LINK_STATUS_SIZE],
- u8 drm_dp_get_adjust_request_pre_emphasis(u8 link_status[DP_LINK_STATUS_SIZE],
- 					  int lane);
- 
--#define DP_RECEIVER_CAP_SIZE	0xf
-+#define DP_RECEIVER_CAP_SIZE		0xf
-+#define EDP_PSR_RECEIVER_CAP_SIZE	2
-+
- void drm_dp_link_train_clock_recovery_delay(u8 dpcd[DP_RECEIVER_CAP_SIZE]);
- void drm_dp_link_train_channel_eq_delay(u8 dpcd[DP_RECEIVER_CAP_SIZE]);
- 
- u8 drm_dp_link_rate_to_bw_code(int link_rate);
- int drm_dp_bw_code_to_link_rate(u8 link_bw);
- 
-+struct edp_sdp_header {
-+	u8 HB0; /* Secondary Data Packet ID */
-+	u8 HB1; /* Secondary Data Packet Type */
-+	u8 HB2; /* 7:5 reserved, 4:0 revision number */
-+	u8 HB3; /* 7:5 reserved, 4:0 number of valid data bytes */
-+} __packed;
-+
-+#define EDP_SDP_HEADER_REVISION_MASK		0x1F
-+#define EDP_SDP_HEADER_VALID_PAYLOAD_BYTES	0x1F
-+
-+struct edp_vsc_psr {
-+	struct edp_sdp_header sdp_header;
-+	u8 DB0; /* Stereo Interface */
-+	u8 DB1; /* 0 - PSR State; 1 - Update RFB; 2 - CRC Valid */
-+	u8 DB2; /* CRC value bits 7:0 of the R or Cr component */
-+	u8 DB3; /* CRC value bits 15:8 of the R or Cr component */
-+	u8 DB4; /* CRC value bits 7:0 of the G or Y component */
-+	u8 DB5; /* CRC value bits 15:8 of the G or Y component */
-+	u8 DB6; /* CRC value bits 7:0 of the B or Cb component */
-+	u8 DB7; /* CRC value bits 15:8 of the B or Cb component */
-+	u8 DB8_31[24]; /* Reserved */
-+} __packed;
-+
-+#define EDP_VSC_PSR_STATE_ACTIVE	(1<<0)
-+#define EDP_VSC_PSR_UPDATE_RFB		(1<<1)
-+#define EDP_VSC_PSR_CRC_VALUES_VALID	(1<<2)
-+
- static inline int
- drm_dp_max_link_rate(u8 dpcd[DP_RECEIVER_CAP_SIZE])
- {
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0483-drm-i915-Read-the-EDP-DPCD-and-PSR-Capability.patch b/patches.baytrail/0483-drm-i915-Read-the-EDP-DPCD-and-PSR-Capability.patch
deleted file mode 100644
index c662f1bd35788..0000000000000
--- a/patches.baytrail/0483-drm-i915-Read-the-EDP-DPCD-and-PSR-Capability.patch
+++ /dev/null
@@ -1,67 +0,0 @@
-From dae792591097723957e5b0824f38c7803052876b Mon Sep 17 00:00:00 2001
-From: Shobhit Kumar <shobhit.kumar@intel.com>
-Date: Thu, 11 Jul 2013 18:44:56 -0300
-Subject: drm/i915: Read the EDP DPCD and PSR Capability
-
-v2: reuse of just created is_edp_psr and put it at right place.
-v3: move is_edp_psr above intel_edp_disable
-v4: remove parentheses. Noticed by Paulo.
-
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com>
-Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 2293bb5c0383f522ac659946ccfadb0e6d2f03c5)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_dp.c  | 13 +++++++++++++
- drivers/gpu/drm/i915/intel_drv.h |  1 +
- 2 files changed, 14 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
-index 9d90d4350ebf..71c7e9ef8152 100644
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -1380,6 +1380,12 @@ static void intel_dp_get_config(struct intel_encoder *encoder,
- 	}
- }
- 
-+static bool is_edp_psr(struct intel_dp *intel_dp)
-+{
-+	return is_edp(intel_dp) &&
-+		intel_dp->psr_dpcd[0] & DP_PSR_IS_SUPPORTED;
-+}
-+
- static void intel_disable_dp(struct intel_encoder *encoder)
- {
- 	struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
-@@ -2293,6 +2299,13 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp)
- 	if (intel_dp->dpcd[DP_DPCD_REV] == 0)
- 		return false; /* DPCD not present */
- 
-+	/* Check if the panel supports PSR */
-+	memset(intel_dp->psr_dpcd, 0, sizeof(intel_dp->psr_dpcd));
-+	intel_dp_aux_native_read_retry(intel_dp, DP_PSR_SUPPORT,
-+				       intel_dp->psr_dpcd,
-+				       sizeof(intel_dp->psr_dpcd));
-+	if (is_edp_psr(intel_dp))
-+		DRM_DEBUG_KMS("Detected EDP PSR Panel.\n");
- 	if (!(intel_dp->dpcd[DP_DOWNSTREAMPORT_PRESENT] &
- 	      DP_DWN_STRM_PORT_PRESENT))
- 		return true; /* native DP sink */
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index 02fee4364e8a..fdb71b445bf9 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -487,6 +487,7 @@ struct intel_dp {
- 	uint8_t link_bw;
- 	uint8_t lane_count;
- 	uint8_t dpcd[DP_RECEIVER_CAP_SIZE];
-+	uint8_t psr_dpcd[EDP_PSR_RECEIVER_CAP_SIZE];
- 	uint8_t downstream_ports[DP_MAX_DOWNSTREAM_PORTS];
- 	struct i2c_adapter adapter;
- 	struct i2c_algo_dp_aux_data algo;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0484-drm-i915-split-aux_clock_divider-logic-in-a-separate.patch b/patches.baytrail/0484-drm-i915-split-aux_clock_divider-logic-in-a-separate.patch
deleted file mode 100644
index 6243cbe1ab8ba..0000000000000
--- a/patches.baytrail/0484-drm-i915-split-aux_clock_divider-logic-in-a-separate.patch
+++ /dev/null
@@ -1,112 +0,0 @@
-From 97dece8e9c9b71933535a703d3f2df0da89363e6 Mon Sep 17 00:00:00 2001
-From: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Date: Thu, 11 Jul 2013 18:44:57 -0300
-Subject: drm/i915: split aux_clock_divider logic in a separated function for
- reuse.
-
-Prep patch for reuse aux_clock_divider with EDP_PSR_AUX_CTL setup.
-
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Reviewed-by: Shobhit Kumar <shobhit.kumar@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit b84a1cf8950ed075c4ab2630514d4caaae504176)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_dp.c | 58 +++++++++++++++++++++++------------------
- 1 file changed, 33 insertions(+), 25 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
-index 71c7e9ef8152..be6b47140e09 100644
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -276,29 +276,12 @@ intel_dp_aux_wait_done(struct intel_dp *intel_dp, bool has_aux_irq)
- 	return status;
- }
- 
--static int
--intel_dp_aux_ch(struct intel_dp *intel_dp,
--		uint8_t *send, int send_bytes,
--		uint8_t *recv, int recv_size)
-+static uint32_t get_aux_clock_divider(struct intel_dp *intel_dp)
- {
- 	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
- 	struct drm_device *dev = intel_dig_port->base.base.dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
--	uint32_t ch_ctl = intel_dp->aux_ch_ctl_reg;
--	uint32_t ch_data = ch_ctl + 4;
--	int i, ret, recv_bytes;
--	uint32_t status;
--	uint32_t aux_clock_divider;
--	int try, precharge;
--	bool has_aux_irq = INTEL_INFO(dev)->gen >= 5 && !IS_VALLEYVIEW(dev);
- 
--	/* dp aux is extremely sensitive to irq latency, hence request the
--	 * lowest possible wakeup latency and so prevent the cpu from going into
--	 * deep sleep states.
--	 */
--	pm_qos_update_request(&dev_priv->pm_qos, 0);
--
--	intel_dp_check_edp(intel_dp);
- 	/* The clock divider is based off the hrawclk,
- 	 * and would like to run at 2MHz. So, take the
- 	 * hrawclk value and divide by 2 and use that
-@@ -307,23 +290,48 @@ intel_dp_aux_ch(struct intel_dp *intel_dp,
- 	 * clock divider.
- 	 */
- 	if (IS_VALLEYVIEW(dev)) {
--		aux_clock_divider = 100;
-+		return 100;
- 	} else if (intel_dig_port->port == PORT_A) {
- 		if (HAS_DDI(dev))
--			aux_clock_divider = DIV_ROUND_CLOSEST(
-+			return DIV_ROUND_CLOSEST(
- 				intel_ddi_get_cdclk_freq(dev_priv), 2000);
- 		else if (IS_GEN6(dev) || IS_GEN7(dev))
--			aux_clock_divider = 200; /* SNB & IVB eDP input clock at 400Mhz */
-+			return 200; /* SNB & IVB eDP input clock at 400Mhz */
- 		else
--			aux_clock_divider = 225; /* eDP input clock at 450Mhz */
-+			return 225; /* eDP input clock at 450Mhz */
- 	} else if (dev_priv->pch_id == INTEL_PCH_LPT_DEVICE_ID_TYPE) {
- 		/* Workaround for non-ULT HSW */
--		aux_clock_divider = 74;
-+		return 74;
- 	} else if (HAS_PCH_SPLIT(dev)) {
--		aux_clock_divider = DIV_ROUND_UP(intel_pch_rawclk(dev), 2);
-+		return DIV_ROUND_UP(intel_pch_rawclk(dev), 2);
- 	} else {
--		aux_clock_divider = intel_hrawclk(dev) / 2;
-+		return intel_hrawclk(dev) / 2;
- 	}
-+}
-+
-+static int
-+intel_dp_aux_ch(struct intel_dp *intel_dp,
-+		uint8_t *send, int send_bytes,
-+		uint8_t *recv, int recv_size)
-+{
-+	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
-+	struct drm_device *dev = intel_dig_port->base.base.dev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	uint32_t ch_ctl = intel_dp->aux_ch_ctl_reg;
-+	uint32_t ch_data = ch_ctl + 4;
-+	int i, ret, recv_bytes;
-+	uint32_t status;
-+	uint32_t aux_clock_divider = get_aux_clock_divider(intel_dp);
-+	int try, precharge;
-+	bool has_aux_irq = INTEL_INFO(dev)->gen >= 5 && !IS_VALLEYVIEW(dev);
-+
-+	/* dp aux is extremely sensitive to irq latency, hence request the
-+	 * lowest possible wakeup latency and so prevent the cpu from going into
-+	 * deep sleep states.
-+	 */
-+	pm_qos_update_request(&dev_priv->pm_qos, 0);
-+
-+	intel_dp_check_edp(intel_dp);
- 
- 	if (IS_GEN6(dev))
- 		precharge = 3;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0485-drm-i915-Enable-Disable-PSR.patch b/patches.baytrail/0485-drm-i915-Enable-Disable-PSR.patch
deleted file mode 100644
index a96d1e2c40dc9..0000000000000
--- a/patches.baytrail/0485-drm-i915-Enable-Disable-PSR.patch
+++ /dev/null
@@ -1,289 +0,0 @@
-From 339b1baee30650c3ac63c2790c78960ba12bbfdc Mon Sep 17 00:00:00 2001
-From: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Date: Thu, 11 Jul 2013 18:44:58 -0300
-Subject: drm/i915: Enable/Disable PSR
-
-Adding Enable and Disable PSR functionalities. This includes setting the
-PSR configuration over AUX, sending SDP VSC DIP over the eDP PIPE config,
-enabling PSR in the sink via DPCD register and finally enabling PSR on
-the host.
-
-This patch is based on initial PSR code by Sateesh Kavuri and Kumar Shobhit
-but in a different implementation.
-
-v2: * moved functions around and changed its names.
-    * removed VSC DIP unset from disable.
-    * remove FBC wa.
-    * don't mask LSPS anymore.
-    * incorporate new crtc usage after a rebase.
-v3: Make a clear separation between Sink (Panel) and Source (HW) enabling.
-v4: Fix identation and other style issues raised by checkpatch (by Paulo).
-v5: Changes according to Paulo's review:
-    static on write_vsc;
-    avoid using dp_to_dev when already calling dp_to_dig_port;
-    remove unecessary TP default time setting;
-    remove unecessary interrupts disabling;
-    remove unecessary wait_for_vblank when disabling psr;
-v6: remove unecessary wait_for_vblank when writing vsc;
-v7: adding setup once function to avoid unnecessarily write to vsc
-    and set debug_ctl every time we enable or disable psr.
-
-Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Credits-by: Sateesh Kavuri <sateesh.kavuri@intel.com>
-Credits-by: Shobhit Kumar <shobhit.kumar@intel.com>
-Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Shobhit Kumar <shobhit.kumar@intel.com>
-[danvet: Apply Paulo's suggestion for unconditionally clearing the
-control register when writing the DIP.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 2b28bb1b6440fadececc4cf8f29c55d510c6db09)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_reg.h  |   42 ++++++++++
- drivers/gpu/drm/i915/intel_dp.c  |  149 +++++++++++++++++++++++++++++++++++++++
- drivers/gpu/drm/i915/intel_drv.h |    4 +
- 3 files changed, 195 insertions(+)
-
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -1781,6 +1781,47 @@
- #define BCLRPAT(pipe) _PIPE(pipe, _BCLRPAT_A, _BCLRPAT_B)
- #define VSYNCSHIFT(trans) _TRANSCODER(trans, _VSYNCSHIFT_A, _VSYNCSHIFT_B)
- 
-+/* HSW eDP PSR registers */
-+#define EDP_PSR_CTL				0x64800
-+#define   EDP_PSR_ENABLE			(1<<31)
-+#define   EDP_PSR_LINK_DISABLE			(0<<27)
-+#define   EDP_PSR_LINK_STANDBY			(1<<27)
-+#define   EDP_PSR_MIN_LINK_ENTRY_TIME_MASK	(3<<25)
-+#define   EDP_PSR_MIN_LINK_ENTRY_TIME_8_LINES	(0<<25)
-+#define   EDP_PSR_MIN_LINK_ENTRY_TIME_4_LINES	(1<<25)
-+#define   EDP_PSR_MIN_LINK_ENTRY_TIME_2_LINES	(2<<25)
-+#define   EDP_PSR_MIN_LINK_ENTRY_TIME_0_LINES	(3<<25)
-+#define   EDP_PSR_MAX_SLEEP_TIME_SHIFT		20
-+#define   EDP_PSR_SKIP_AUX_EXIT			(1<<12)
-+#define   EDP_PSR_TP1_TP2_SEL			(0<<11)
-+#define   EDP_PSR_TP1_TP3_SEL			(1<<11)
-+#define   EDP_PSR_TP2_TP3_TIME_500us		(0<<8)
-+#define   EDP_PSR_TP2_TP3_TIME_100us		(1<<8)
-+#define   EDP_PSR_TP2_TP3_TIME_2500us		(2<<8)
-+#define   EDP_PSR_TP2_TP3_TIME_0us		(3<<8)
-+#define   EDP_PSR_TP1_TIME_500us		(0<<4)
-+#define   EDP_PSR_TP1_TIME_100us		(1<<4)
-+#define   EDP_PSR_TP1_TIME_2500us		(2<<4)
-+#define   EDP_PSR_TP1_TIME_0us			(3<<4)
-+#define   EDP_PSR_IDLE_FRAME_SHIFT		0
-+
-+#define EDP_PSR_AUX_CTL			0x64810
-+#define EDP_PSR_AUX_DATA1		0x64814
-+#define   EDP_PSR_DPCD_COMMAND		0x80060000
-+#define EDP_PSR_AUX_DATA2		0x64818
-+#define   EDP_PSR_DPCD_NORMAL_OPERATION	(1<<24)
-+#define EDP_PSR_AUX_DATA3		0x6481c
-+#define EDP_PSR_AUX_DATA4		0x64820
-+#define EDP_PSR_AUX_DATA5		0x64824
-+
-+#define EDP_PSR_STATUS_CTL			0x64840
-+#define   EDP_PSR_STATUS_STATE_MASK		(7<<29)
-+
-+#define EDP_PSR_DEBUG_CTL		0x64860
-+#define   EDP_PSR_DEBUG_MASK_LPSP	(1<<27)
-+#define   EDP_PSR_DEBUG_MASK_MEMUP	(1<<26)
-+#define   EDP_PSR_DEBUG_MASK_HPD	(1<<25)
-+
- /* VGA port control */
- #define ADPA			0x61100
- #define PCH_ADPA                0xe1100
-@@ -2060,6 +2101,7 @@
-  * (Haswell and newer) to see which VIDEO_DIP_DATA byte corresponds to each byte
-  * of the infoframe structure specified by CEA-861. */
- #define   VIDEO_DIP_DATA_SIZE	32
-+#define   VIDEO_DIP_VSC_DATA_SIZE	36
- #define VIDEO_DIP_CTL		0x61170
- /* Pre HSW: */
- #define   VIDEO_DIP_ENABLE		(1 << 31)
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -1394,6 +1394,153 @@ static bool is_edp_psr(struct intel_dp *
- 		intel_dp->psr_dpcd[0] & DP_PSR_IS_SUPPORTED;
- }
- 
-+static bool intel_edp_is_psr_enabled(struct drm_device *dev)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+
-+	if (!IS_HASWELL(dev))
-+		return false;
-+
-+	return I915_READ(EDP_PSR_CTL) & EDP_PSR_ENABLE;
-+}
-+
-+static void intel_edp_psr_write_vsc(struct intel_dp *intel_dp,
-+				    struct edp_vsc_psr *vsc_psr)
-+{
-+	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
-+	struct drm_device *dev = dig_port->base.base.dev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct intel_crtc *crtc = to_intel_crtc(dig_port->base.base.crtc);
-+	u32 ctl_reg = HSW_TVIDEO_DIP_CTL(crtc->config.cpu_transcoder);
-+	u32 data_reg = HSW_TVIDEO_DIP_VSC_DATA(crtc->config.cpu_transcoder);
-+	uint32_t *data = (uint32_t *) vsc_psr;
-+	unsigned int i;
-+
-+	/* As per BSPec (Pipe Video Data Island Packet), we need to disable
-+	   the video DIP being updated before program video DIP data buffer
-+	   registers for DIP being updated. */
-+	I915_WRITE(ctl_reg, 0);
-+	POSTING_READ(ctl_reg);
-+
-+	for (i = 0; i < VIDEO_DIP_VSC_DATA_SIZE; i += 4) {
-+		if (i < sizeof(struct edp_vsc_psr))
-+			I915_WRITE(data_reg + i, *data++);
-+		else
-+			I915_WRITE(data_reg + i, 0);
-+	}
-+
-+	I915_WRITE(ctl_reg, VIDEO_DIP_ENABLE_VSC_HSW);
-+	POSTING_READ(ctl_reg);
-+}
-+
-+static void intel_edp_psr_setup(struct intel_dp *intel_dp)
-+{
-+	struct drm_device *dev = intel_dp_to_dev(intel_dp);
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct edp_vsc_psr psr_vsc;
-+
-+	if (intel_dp->psr_setup_done)
-+		return;
-+
-+	/* Prepare VSC packet as per EDP 1.3 spec, Table 3.10 */
-+	memset(&psr_vsc, 0, sizeof(psr_vsc));
-+	psr_vsc.sdp_header.HB0 = 0;
-+	psr_vsc.sdp_header.HB1 = 0x7;
-+	psr_vsc.sdp_header.HB2 = 0x2;
-+	psr_vsc.sdp_header.HB3 = 0x8;
-+	intel_edp_psr_write_vsc(intel_dp, &psr_vsc);
-+
-+	/* Avoid continuous PSR exit by masking memup and hpd */
-+	I915_WRITE(EDP_PSR_DEBUG_CTL, EDP_PSR_DEBUG_MASK_MEMUP |
-+		   EDP_PSR_DEBUG_MASK_HPD);
-+
-+	intel_dp->psr_setup_done = true;
-+}
-+
-+static void intel_edp_psr_enable_sink(struct intel_dp *intel_dp)
-+{
-+	struct drm_device *dev = intel_dp_to_dev(intel_dp);
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	uint32_t aux_clock_divider = get_aux_clock_divider(intel_dp);
-+	int precharge = 0x3;
-+	int msg_size = 5;       /* Header(4) + Message(1) */
-+
-+	/* Enable PSR in sink */
-+	if (intel_dp->psr_dpcd[1] & DP_PSR_NO_TRAIN_ON_EXIT)
-+		intel_dp_aux_native_write_1(intel_dp, DP_PSR_EN_CFG,
-+					    DP_PSR_ENABLE &
-+					    ~DP_PSR_MAIN_LINK_ACTIVE);
-+	else
-+		intel_dp_aux_native_write_1(intel_dp, DP_PSR_EN_CFG,
-+					    DP_PSR_ENABLE |
-+					    DP_PSR_MAIN_LINK_ACTIVE);
-+
-+	/* Setup AUX registers */
-+	I915_WRITE(EDP_PSR_AUX_DATA1, EDP_PSR_DPCD_COMMAND);
-+	I915_WRITE(EDP_PSR_AUX_DATA2, EDP_PSR_DPCD_NORMAL_OPERATION);
-+	I915_WRITE(EDP_PSR_AUX_CTL,
-+		   DP_AUX_CH_CTL_TIME_OUT_400us |
-+		   (msg_size << DP_AUX_CH_CTL_MESSAGE_SIZE_SHIFT) |
-+		   (precharge << DP_AUX_CH_CTL_PRECHARGE_2US_SHIFT) |
-+		   (aux_clock_divider << DP_AUX_CH_CTL_BIT_CLOCK_2X_SHIFT));
-+}
-+
-+static void intel_edp_psr_enable_source(struct intel_dp *intel_dp)
-+{
-+	struct drm_device *dev = intel_dp_to_dev(intel_dp);
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	uint32_t max_sleep_time = 0x1f;
-+	uint32_t idle_frames = 1;
-+	uint32_t val = 0x0;
-+
-+	if (intel_dp->psr_dpcd[1] & DP_PSR_NO_TRAIN_ON_EXIT) {
-+		val |= EDP_PSR_LINK_STANDBY;
-+		val |= EDP_PSR_TP2_TP3_TIME_0us;
-+		val |= EDP_PSR_TP1_TIME_0us;
-+		val |= EDP_PSR_SKIP_AUX_EXIT;
-+	} else
-+		val |= EDP_PSR_LINK_DISABLE;
-+
-+	I915_WRITE(EDP_PSR_CTL, val |
-+		   EDP_PSR_MIN_LINK_ENTRY_TIME_8_LINES |
-+		   max_sleep_time << EDP_PSR_MAX_SLEEP_TIME_SHIFT |
-+		   idle_frames << EDP_PSR_IDLE_FRAME_SHIFT |
-+		   EDP_PSR_ENABLE);
-+}
-+
-+void intel_edp_psr_enable(struct intel_dp *intel_dp)
-+{
-+	struct drm_device *dev = intel_dp_to_dev(intel_dp);
-+
-+	if (!is_edp_psr(intel_dp) || intel_edp_is_psr_enabled(dev))
-+		return;
-+
-+	/* Setup PSR once */
-+	intel_edp_psr_setup(intel_dp);
-+
-+	/* Enable PSR on the panel */
-+	intel_edp_psr_enable_sink(intel_dp);
-+
-+	/* Enable PSR on the host */
-+	intel_edp_psr_enable_source(intel_dp);
-+}
-+
-+void intel_edp_psr_disable(struct intel_dp *intel_dp)
-+{
-+	struct drm_device *dev = intel_dp_to_dev(intel_dp);
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+
-+	if (!intel_edp_is_psr_enabled(dev))
-+		return;
-+
-+	I915_WRITE(EDP_PSR_CTL, I915_READ(EDP_PSR_CTL) & ~EDP_PSR_ENABLE);
-+
-+	/* Wait till PSR is idle */
-+	if (_wait_for((I915_READ(EDP_PSR_STATUS_CTL) &
-+		       EDP_PSR_STATUS_STATE_MASK) == 0, 2000, 10))
-+		DRM_ERROR("Timed out waiting for PSR Idle State\n");
-+}
-+
- static void intel_disable_dp(struct intel_encoder *encoder)
- {
- 	struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
-@@ -3221,6 +3368,8 @@ intel_dp_init_connector(struct intel_dig
- 	WARN(error, "intel_dp_i2c_init failed with error %d for port %c\n",
- 	     error, port_name(port));
- 
-+	intel_dp->psr_setup_done = false;
-+
- 	if (!intel_edp_init_connector(intel_dp, intel_connector)) {
- 		i2c_del_adapter(&intel_dp->adapter);
- 		if (is_edp(intel_dp)) {
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -499,6 +499,7 @@ struct intel_dp {
- 	int backlight_off_delay;
- 	struct delayed_work panel_vdd_work;
- 	bool want_panel_vdd;
-+	bool psr_setup_done;
- 	struct intel_connector *attached_connector;
- };
- 
-@@ -834,4 +835,7 @@ extern bool intel_set_pch_fifo_underrun_
- 						 enum transcoder pch_transcoder,
- 						 bool enable);
- 
-+extern void intel_edp_psr_enable(struct intel_dp *intel_dp);
-+extern void intel_edp_psr_disable(struct intel_dp *intel_dp);
-+
- #endif /* __INTEL_DRV_H__ */
diff --git a/patches.baytrail/0486-drm-i915-Added-debugfs-support-for-PSR-Status.patch b/patches.baytrail/0486-drm-i915-Added-debugfs-support-for-PSR-Status.patch
deleted file mode 100644
index 49268668cea34..0000000000000
--- a/patches.baytrail/0486-drm-i915-Added-debugfs-support-for-PSR-Status.patch
+++ /dev/null
@@ -1,178 +0,0 @@
-From 23d01f158b1023d3b2430328fc5088989d5a22ea Mon Sep 17 00:00:00 2001
-From: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Date: Thu, 11 Jul 2013 18:44:59 -0300
-Subject: drm/i915: Added debugfs support for PSR Status
-
-Adding support for PSR Status, PSR entry counter and performance counters.
-Heavily based on initial work from Shobhit.
-
-v2: Fix PSR Status Link bits by Paulo Zanoni.
-v3: Prefer seq_puts to seq_printf by Paulo Zanoni.
-v4: Fix identation by Paulo Zanoni.
-v5: Return earlier if it isn't Haswell in order to avoid reading non-existing
-    registers - by Paulo Zanoni.
-
-CC: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Credits-by: Shobhit Kumar <shobhit.kumar@intel.com>
-Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Reviewed-by: Shobhit Kumar <shobhit.kumar@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit e91fd8c6dec2ffa903b4f695fce4b9d7248ed2d5)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_debugfs.c | 95 +++++++++++++++++++++++++++++++++++++
- drivers/gpu/drm/i915/i915_reg.h     | 24 ++++++++++
- 2 files changed, 119 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
-index a9246e9c5f9d..65619e6fde86 100644
---- a/drivers/gpu/drm/i915/i915_debugfs.c
-+++ b/drivers/gpu/drm/i915/i915_debugfs.c
-@@ -1545,6 +1545,100 @@ static int i915_llc(struct seq_file *m, void *data)
- 	return 0;
- }
- 
-+static int i915_edp_psr_status(struct seq_file *m, void *data)
-+{
-+	struct drm_info_node *node = m->private;
-+	struct drm_device *dev = node->minor->dev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	u32 psrctl, psrstat, psrperf;
-+
-+	if (!IS_HASWELL(dev)) {
-+		seq_puts(m, "PSR not supported on this platform\n");
-+		return 0;
-+	}
-+
-+	psrctl = I915_READ(EDP_PSR_CTL);
-+	seq_printf(m, "PSR Enabled: %s\n",
-+		   yesno(psrctl & EDP_PSR_ENABLE));
-+
-+	psrstat = I915_READ(EDP_PSR_STATUS_CTL);
-+
-+	seq_puts(m, "PSR Current State: ");
-+	switch (psrstat & EDP_PSR_STATUS_STATE_MASK) {
-+	case EDP_PSR_STATUS_STATE_IDLE:
-+		seq_puts(m, "Reset state\n");
-+		break;
-+	case EDP_PSR_STATUS_STATE_SRDONACK:
-+		seq_puts(m, "Wait for TG/Stream to send on frame of data after SRD conditions are met\n");
-+		break;
-+	case EDP_PSR_STATUS_STATE_SRDENT:
-+		seq_puts(m, "SRD entry\n");
-+		break;
-+	case EDP_PSR_STATUS_STATE_BUFOFF:
-+		seq_puts(m, "Wait for buffer turn off\n");
-+		break;
-+	case EDP_PSR_STATUS_STATE_BUFON:
-+		seq_puts(m, "Wait for buffer turn on\n");
-+		break;
-+	case EDP_PSR_STATUS_STATE_AUXACK:
-+		seq_puts(m, "Wait for AUX to acknowledge on SRD exit\n");
-+		break;
-+	case EDP_PSR_STATUS_STATE_SRDOFFACK:
-+		seq_puts(m, "Wait for TG/Stream to acknowledge the SRD VDM exit\n");
-+		break;
-+	default:
-+		seq_puts(m, "Unknown\n");
-+		break;
-+	}
-+
-+	seq_puts(m, "Link Status: ");
-+	switch (psrstat & EDP_PSR_STATUS_LINK_MASK) {
-+	case EDP_PSR_STATUS_LINK_FULL_OFF:
-+		seq_puts(m, "Link is fully off\n");
-+		break;
-+	case EDP_PSR_STATUS_LINK_FULL_ON:
-+		seq_puts(m, "Link is fully on\n");
-+		break;
-+	case EDP_PSR_STATUS_LINK_STANDBY:
-+		seq_puts(m, "Link is in standby\n");
-+		break;
-+	default:
-+		seq_puts(m, "Unknown\n");
-+		break;
-+	}
-+
-+	seq_printf(m, "PSR Entry Count: %u\n",
-+		   psrstat >> EDP_PSR_STATUS_COUNT_SHIFT &
-+		   EDP_PSR_STATUS_COUNT_MASK);
-+
-+	seq_printf(m, "Max Sleep Timer Counter: %u\n",
-+		   psrstat >> EDP_PSR_STATUS_MAX_SLEEP_TIMER_SHIFT &
-+		   EDP_PSR_STATUS_MAX_SLEEP_TIMER_MASK);
-+
-+	seq_printf(m, "Had AUX error: %s\n",
-+		   yesno(psrstat & EDP_PSR_STATUS_AUX_ERROR));
-+
-+	seq_printf(m, "Sending AUX: %s\n",
-+		   yesno(psrstat & EDP_PSR_STATUS_AUX_SENDING));
-+
-+	seq_printf(m, "Sending Idle: %s\n",
-+		   yesno(psrstat & EDP_PSR_STATUS_SENDING_IDLE));
-+
-+	seq_printf(m, "Sending TP2 TP3: %s\n",
-+		   yesno(psrstat & EDP_PSR_STATUS_SENDING_TP2_TP3));
-+
-+	seq_printf(m, "Sending TP1: %s\n",
-+		   yesno(psrstat & EDP_PSR_STATUS_SENDING_TP1));
-+
-+	seq_printf(m, "Idle Count: %u\n",
-+		   psrstat & EDP_PSR_STATUS_IDLE_MASK);
-+
-+	psrperf = (I915_READ(EDP_PSR_PERF_CNT)) & EDP_PSR_PERF_CNT_MASK;
-+	seq_printf(m, "Performance Counter: %u\n", psrperf);
-+
-+	return 0;
-+}
-+
- static int
- i915_wedged_get(void *data, u64 *val)
- {
-@@ -1977,6 +2071,7 @@ static struct drm_info_list i915_debugfs_list[] = {
- 	{"i915_ppgtt_info", i915_ppgtt_info, 0},
- 	{"i915_dpio", i915_dpio_info, 0},
- 	{"i915_llc", i915_llc, 0},
-+	{"i915_edp_psr_status", i915_edp_psr_status, 0},
- };
- #define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
- 
-diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
-index 780a5dc9c131..918597035b62 100644
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -1816,6 +1816,30 @@
- 
- #define EDP_PSR_STATUS_CTL			0x64840
- #define   EDP_PSR_STATUS_STATE_MASK		(7<<29)
-+#define   EDP_PSR_STATUS_STATE_IDLE		(0<<29)
-+#define   EDP_PSR_STATUS_STATE_SRDONACK		(1<<29)
-+#define   EDP_PSR_STATUS_STATE_SRDENT		(2<<29)
-+#define   EDP_PSR_STATUS_STATE_BUFOFF		(3<<29)
-+#define   EDP_PSR_STATUS_STATE_BUFON		(4<<29)
-+#define   EDP_PSR_STATUS_STATE_AUXACK		(5<<29)
-+#define   EDP_PSR_STATUS_STATE_SRDOFFACK	(6<<29)
-+#define   EDP_PSR_STATUS_LINK_MASK		(3<<26)
-+#define   EDP_PSR_STATUS_LINK_FULL_OFF		(0<<26)
-+#define   EDP_PSR_STATUS_LINK_FULL_ON		(1<<26)
-+#define   EDP_PSR_STATUS_LINK_STANDBY		(2<<26)
-+#define   EDP_PSR_STATUS_MAX_SLEEP_TIMER_SHIFT	20
-+#define   EDP_PSR_STATUS_MAX_SLEEP_TIMER_MASK	0x1f
-+#define   EDP_PSR_STATUS_COUNT_SHIFT		16
-+#define   EDP_PSR_STATUS_COUNT_MASK		0xf
-+#define   EDP_PSR_STATUS_AUX_ERROR		(1<<15)
-+#define   EDP_PSR_STATUS_AUX_SENDING		(1<<12)
-+#define   EDP_PSR_STATUS_SENDING_IDLE		(1<<9)
-+#define   EDP_PSR_STATUS_SENDING_TP2_TP3	(1<<8)
-+#define   EDP_PSR_STATUS_SENDING_TP1		(1<<4)
-+#define   EDP_PSR_STATUS_IDLE_MASK		0xf
-+
-+#define EDP_PSR_PERF_CNT		0x64844
-+#define   EDP_PSR_PERF_CNT_MASK		0xffffff
- 
- #define EDP_PSR_DEBUG_CTL		0x64860
- #define   EDP_PSR_DEBUG_MASK_LPSP	(1<<27)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0487-drm-i915-Match-all-PSR-mode-entry-conditions-before-.patch b/patches.baytrail/0487-drm-i915-Match-all-PSR-mode-entry-conditions-before-.patch
deleted file mode 100644
index 1679a8476a3ac..0000000000000
--- a/patches.baytrail/0487-drm-i915-Match-all-PSR-mode-entry-conditions-before-.patch
+++ /dev/null
@@ -1,214 +0,0 @@
-From 73746c30cf601a60c7ccfbb261bbbc145ee31881 Mon Sep 17 00:00:00 2001
-From: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Date: Thu, 11 Jul 2013 18:45:00 -0300
-Subject: drm/i915: Match all PSR mode entry conditions before enabling it.
-
-v2: Prefer seq_puts to seq_printf by Paulo Zanoni.
-v3: small changes like avoiding calling dp_to_dig_port twice as noticed by
-    Paulo Zanoni.
-v4: Avoiding reading non-existent registers - noticed by Paulo
-    on first psr debugfs patch.
-v5: Accepting more suggestions from Paulo:
-    * check sw interlace flag instead of i915_read
-    * introduce PSR_S3D_ENABLED to avoid forgeting it whenever added.
-
-Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Shobhit Kumar <shobhit.kumar@intel.com>
-[danvet: Fix up debugfs output (spotted by Paulo) and rip out the
-power well check since we really can't do that in a race-free manner,
-so it's bogus.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 3f51e4713fc57ab0fc225c3f0e67578a53c24a11)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_debugfs.c |   42 +++++++++++++++++++---
- drivers/gpu/drm/i915/i915_drv.h     |   13 ++++++
- drivers/gpu/drm/i915/i915_reg.h     |    7 +++
- drivers/gpu/drm/i915/intel_dp.c     |   67 +++++++++++++++++++++++++++++++++++-
- 4 files changed, 123 insertions(+), 6 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_debugfs.c
-+++ b/drivers/gpu/drm/i915/i915_debugfs.c
-@@ -1550,17 +1550,49 @@ static int i915_edp_psr_status(struct se
- 	struct drm_info_node *node = m->private;
- 	struct drm_device *dev = node->minor->dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
--	u32 psrctl, psrstat, psrperf;
-+	u32 psrstat, psrperf;
- 
- 	if (!IS_HASWELL(dev)) {
- 		seq_puts(m, "PSR not supported on this platform\n");
-+	} else if (IS_HASWELL(dev) && I915_READ(EDP_PSR_CTL) & EDP_PSR_ENABLE) {
-+		seq_puts(m, "PSR enabled\n");
-+	} else {
-+		seq_puts(m, "PSR disabled: ");
-+		switch (dev_priv->no_psr_reason) {
-+		case PSR_NO_SOURCE:
-+			seq_puts(m, "not supported on this platform");
-+			break;
-+		case PSR_NO_SINK:
-+			seq_puts(m, "not supported by panel");
-+			break;
-+		case PSR_CRTC_NOT_ACTIVE:
-+			seq_puts(m, "crtc not active");
-+			break;
-+		case PSR_PWR_WELL_ENABLED:
-+			seq_puts(m, "power well enabled");
-+			break;
-+		case PSR_NOT_TILED:
-+			seq_puts(m, "not tiled");
-+			break;
-+		case PSR_SPRITE_ENABLED:
-+			seq_puts(m, "sprite enabled");
-+			break;
-+		case PSR_S3D_ENABLED:
-+			seq_puts(m, "stereo 3d enabled");
-+			break;
-+		case PSR_INTERLACED_ENABLED:
-+			seq_puts(m, "interlaced enabled");
-+			break;
-+		case PSR_HSW_NOT_DDIA:
-+			seq_puts(m, "HSW ties PSR to DDI A (eDP)");
-+			break;
-+		default:
-+			seq_puts(m, "unknown reason");
-+		}
-+		seq_puts(m, "\n");
- 		return 0;
- 	}
- 
--	psrctl = I915_READ(EDP_PSR_CTL);
--	seq_printf(m, "PSR Enabled: %s\n",
--		   yesno(psrctl & EDP_PSR_ENABLE));
--
- 	psrstat = I915_READ(EDP_PSR_STATUS_CTL);
- 
- 	seq_puts(m, "PSR Current State: ");
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -593,6 +593,17 @@ struct i915_fbc {
- 	} no_fbc_reason;
- };
- 
-+enum no_psr_reason {
-+	PSR_NO_SOURCE, /* Not supported on platform */
-+	PSR_NO_SINK, /* Not supported by panel */
-+	PSR_CRTC_NOT_ACTIVE,
-+	PSR_PWR_WELL_ENABLED,
-+	PSR_NOT_TILED,
-+	PSR_SPRITE_ENABLED,
-+	PSR_S3D_ENABLED,
-+	PSR_INTERLACED_ENABLED,
-+	PSR_HSW_NOT_DDIA,
-+};
- 
- enum intel_pch {
- 	PCH_NONE = 0,	/* No PCH present */
-@@ -1174,6 +1185,8 @@ typedef struct drm_i915_private {
- 	/* Haswell power well */
- 	struct i915_power_well power_well;
- 
-+	enum no_psr_reason no_psr_reason;
-+
- 	struct i915_gpu_error gpu_error;
- 
- 	struct drm_i915_gem_object *vlv_pctx;
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -4162,6 +4162,13 @@
- #define HSW_TVIDEO_DIP_VSC_DATA(trans) \
- 	 _TRANSCODER(trans, HSW_VIDEO_DIP_VSC_DATA_A, HSW_VIDEO_DIP_VSC_DATA_B)
- 
-+#define HSW_STEREO_3D_CTL_A	0x70020
-+#define   S3D_ENABLE		(1<<31)
-+#define HSW_STEREO_3D_CTL_B	0x71020
-+
-+#define HSW_STEREO_3D_CTL(trans) \
-+	_TRANSCODER(trans, HSW_STEREO_3D_CTL_A, HSW_STEREO_3D_CTL_A)
-+
- #define _PCH_TRANS_HTOTAL_B          0xe1000
- #define _PCH_TRANS_HBLANK_B          0xe1004
- #define _PCH_TRANS_HSYNC_B           0xe1008
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -1508,11 +1508,76 @@ static void intel_edp_psr_enable_source(
- 		   EDP_PSR_ENABLE);
- }
- 
-+static bool intel_edp_psr_match_conditions(struct intel_dp *intel_dp)
-+{
-+	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
-+	struct drm_device *dev = dig_port->base.base.dev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct drm_crtc *crtc = dig_port->base.base.crtc;
-+	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
-+	struct drm_i915_gem_object *obj = to_intel_framebuffer(crtc->fb)->obj;
-+	struct intel_encoder *intel_encoder = &dp_to_dig_port(intel_dp)->base;
-+
-+	if (!IS_HASWELL(dev)) {
-+		DRM_DEBUG_KMS("PSR not supported on this platform\n");
-+		dev_priv->no_psr_reason = PSR_NO_SOURCE;
-+		return false;
-+	}
-+
-+	if ((intel_encoder->type != INTEL_OUTPUT_EDP) ||
-+	    (dig_port->port != PORT_A)) {
-+		DRM_DEBUG_KMS("HSW ties PSR to DDI A (eDP)\n");
-+		dev_priv->no_psr_reason = PSR_HSW_NOT_DDIA;
-+		return false;
-+	}
-+
-+	if (!is_edp_psr(intel_dp)) {
-+		DRM_DEBUG_KMS("PSR not supported by this panel\n");
-+		dev_priv->no_psr_reason = PSR_NO_SINK;
-+		return false;
-+	}
-+
-+	if (!intel_crtc->active || !crtc->fb || !crtc->mode.clock) {
-+		DRM_DEBUG_KMS("crtc not active for PSR\n");
-+		dev_priv->no_psr_reason = PSR_CRTC_NOT_ACTIVE;
-+		return false;
-+	}
-+
-+	if (obj->tiling_mode != I915_TILING_X ||
-+	    obj->fence_reg == I915_FENCE_REG_NONE) {
-+		DRM_DEBUG_KMS("PSR condition failed: fb not tiled or fenced\n");
-+		dev_priv->no_psr_reason = PSR_NOT_TILED;
-+		return false;
-+	}
-+
-+	if (I915_READ(SPRCTL(intel_crtc->pipe)) & SPRITE_ENABLE) {
-+		DRM_DEBUG_KMS("PSR condition failed: Sprite is Enabled\n");
-+		dev_priv->no_psr_reason = PSR_SPRITE_ENABLED;
-+		return false;
-+	}
-+
-+	if (I915_READ(HSW_STEREO_3D_CTL(intel_crtc->config.cpu_transcoder)) &
-+	    S3D_ENABLE) {
-+		DRM_DEBUG_KMS("PSR condition failed: Stereo 3D is Enabled\n");
-+		dev_priv->no_psr_reason = PSR_S3D_ENABLED;
-+		return false;
-+	}
-+
-+	if (crtc->mode.flags & DRM_MODE_FLAG_INTERLACE) {
-+		DRM_DEBUG_KMS("PSR condition failed: Interlaced is Enabled\n");
-+		dev_priv->no_psr_reason = PSR_INTERLACED_ENABLED;
-+		return false;
-+	}
-+
-+	return true;
-+}
-+
- void intel_edp_psr_enable(struct intel_dp *intel_dp)
- {
- 	struct drm_device *dev = intel_dp_to_dev(intel_dp);
- 
--	if (!is_edp_psr(intel_dp) || intel_edp_is_psr_enabled(dev))
-+	if (!intel_edp_psr_match_conditions(intel_dp) ||
-+	    intel_edp_is_psr_enabled(dev))
- 		return;
- 
- 	/* Setup PSR once */
diff --git a/patches.baytrail/0488-drm-intel-add-enable_psr-module-option-and-disable-p.patch b/patches.baytrail/0488-drm-intel-add-enable_psr-module-option-and-disable-p.patch
deleted file mode 100644
index b7cebd2ee7f4d..0000000000000
--- a/patches.baytrail/0488-drm-intel-add-enable_psr-module-option-and-disable-p.patch
+++ /dev/null
@@ -1,90 +0,0 @@
-From 82f4d4d6fdc5f059029c045fc9ddf784eeaec035 Mon Sep 17 00:00:00 2001
-From: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Date: Thu, 11 Jul 2013 18:45:02 -0300
-Subject: drm/intel: add enable_psr module option and disable psr by default
-
-v2: prefer seq_puts to seq_printf detected by Paulo Zanoni.
-v3: PSR is disabled by default. Without userspace ready it
-    will cause regression for kde and xdm users
-
-Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Reviewed-by: Shobhit Kumar <shobhit.kumar@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 105b7c11f036f734988990541674a93e54cf4ec1)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_debugfs.c | 3 +++
- drivers/gpu/drm/i915/i915_drv.c     | 4 ++++
- drivers/gpu/drm/i915/i915_drv.h     | 2 ++
- drivers/gpu/drm/i915/intel_dp.c     | 6 ++++++
- 4 files changed, 15 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
-index 973f2727d703..9d871c7eeaee 100644
---- a/drivers/gpu/drm/i915/i915_debugfs.c
-+++ b/drivers/gpu/drm/i915/i915_debugfs.c
-@@ -1565,6 +1565,9 @@ static int i915_edp_psr_status(struct seq_file *m, void *data)
- 		case PSR_NO_SINK:
- 			seq_puts(m, "not supported by panel");
- 			break;
-+		case PSR_MODULE_PARAM:
-+			seq_puts(m, "disabled by flag");
-+			break;
- 		case PSR_CRTC_NOT_ACTIVE:
- 			seq_puts(m, "crtc not active");
- 			break;
-diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
-index 370f2da5d9c0..dd6324901d57 100644
---- a/drivers/gpu/drm/i915/i915_drv.c
-+++ b/drivers/gpu/drm/i915/i915_drv.c
-@@ -118,6 +118,10 @@ module_param_named(i915_enable_ppgtt, i915_enable_ppgtt, int, 0600);
- MODULE_PARM_DESC(i915_enable_ppgtt,
- 		"Enable PPGTT (default: true)");
- 
-+int i915_enable_psr __read_mostly = 0;
-+module_param_named(enable_psr, i915_enable_psr, int, 0600);
-+MODULE_PARM_DESC(enable_psr, "Enable PSR (default: false)");
-+
- unsigned int i915_preliminary_hw_support __read_mostly = 0;
- module_param_named(preliminary_hw_support, i915_preliminary_hw_support, int, 0600);
- MODULE_PARM_DESC(preliminary_hw_support,
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 6d8dc7475536..31441f8561e5 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -596,6 +596,7 @@ struct i915_fbc {
- enum no_psr_reason {
- 	PSR_NO_SOURCE, /* Not supported on platform */
- 	PSR_NO_SINK, /* Not supported by panel */
-+	PSR_MODULE_PARAM,
- 	PSR_CRTC_NOT_ACTIVE,
- 	PSR_PWR_WELL_ENABLED,
- 	PSR_NOT_TILED,
-@@ -1622,6 +1623,7 @@ extern int i915_enable_rc6 __read_mostly;
- extern int i915_enable_fbc __read_mostly;
- extern bool i915_enable_hangcheck __read_mostly;
- extern int i915_enable_ppgtt __read_mostly;
-+extern int i915_enable_psr __read_mostly;
- extern unsigned int i915_preliminary_hw_support __read_mostly;
- extern int i915_disable_power_well __read_mostly;
- extern int i915_enable_ips __read_mostly;
-diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
-index 070dc55c10d4..74e81383eddb 100644
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -1537,6 +1537,12 @@ static bool intel_edp_psr_match_conditions(struct intel_dp *intel_dp)
- 		return false;
- 	}
- 
-+	if (!i915_enable_psr) {
-+		DRM_DEBUG_KMS("PSR disable by flag\n");
-+		dev_priv->no_psr_reason = PSR_MODULE_PARAM;
-+		return false;
-+	}
-+
- 	if (!intel_crtc->active || !crtc->fb || !crtc->mode.clock) {
- 		DRM_DEBUG_KMS("crtc not active for PSR\n");
- 		dev_priv->no_psr_reason = PSR_CRTC_NOT_ACTIVE;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0489-drm-i915-add-update-function-to-disable-enable-back-.patch b/patches.baytrail/0489-drm-i915-add-update-function-to-disable-enable-back-.patch
deleted file mode 100644
index 4bf6367a5f2ee..0000000000000
--- a/patches.baytrail/0489-drm-i915-add-update-function-to-disable-enable-back-.patch
+++ /dev/null
@@ -1,94 +0,0 @@
-From 3e3fc7cebc1c398779837011c75b18b230239154 Mon Sep 17 00:00:00 2001
-From: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Date: Thu, 11 Jul 2013 18:45:01 -0300
-Subject: drm/i915: add update function to disable/enable-back PSR
-
-Required function to disable PSR when going to console mode.
-But also can be used whenever PSR mode entry conditions changed.
-
-v2: Add it before PSR Hook. Update function not really been called yet.
-v3: Fix coding style detected by checkpatch by Paulo Zanoni.
-v4: do_enable must be static as Paulo noticed.
-
-Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Shobhit Kumar <shobhit.kumar@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 3d739d92d9cbce6cdaf101fe78870f97fcbf5349)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_dp.c  | 31 ++++++++++++++++++++++++++++++-
- drivers/gpu/drm/i915/intel_drv.h |  1 +
- 2 files changed, 31 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
-index 74e81383eddb..55f3c970a766 100644
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -1578,7 +1578,7 @@ static bool intel_edp_psr_match_conditions(struct intel_dp *intel_dp)
- 	return true;
- }
- 
--void intel_edp_psr_enable(struct intel_dp *intel_dp)
-+static void intel_edp_psr_do_enable(struct intel_dp *intel_dp)
- {
- 	struct drm_device *dev = intel_dp_to_dev(intel_dp);
- 
-@@ -1596,6 +1596,15 @@ void intel_edp_psr_enable(struct intel_dp *intel_dp)
- 	intel_edp_psr_enable_source(intel_dp);
- }
- 
-+void intel_edp_psr_enable(struct intel_dp *intel_dp)
-+{
-+	struct drm_device *dev = intel_dp_to_dev(intel_dp);
-+
-+	if (intel_edp_psr_match_conditions(intel_dp) &&
-+	    !intel_edp_is_psr_enabled(dev))
-+		intel_edp_psr_do_enable(intel_dp);
-+}
-+
- void intel_edp_psr_disable(struct intel_dp *intel_dp)
- {
- 	struct drm_device *dev = intel_dp_to_dev(intel_dp);
-@@ -1612,6 +1621,26 @@ void intel_edp_psr_disable(struct intel_dp *intel_dp)
- 		DRM_ERROR("Timed out waiting for PSR Idle State\n");
- }
- 
-+void intel_edp_psr_update(struct drm_device *dev)
-+{
-+	struct intel_encoder *encoder;
-+	struct intel_dp *intel_dp = NULL;
-+
-+	list_for_each_entry(encoder, &dev->mode_config.encoder_list, base.head)
-+		if (encoder->type == INTEL_OUTPUT_EDP) {
-+			intel_dp = enc_to_intel_dp(&encoder->base);
-+
-+			if (!is_edp_psr(intel_dp))
-+				return;
-+
-+			if (!intel_edp_psr_match_conditions(intel_dp))
-+				intel_edp_psr_disable(intel_dp);
-+			else
-+				if (!intel_edp_is_psr_enabled(dev))
-+					intel_edp_psr_do_enable(intel_dp);
-+		}
-+}
-+
- static void intel_disable_dp(struct intel_encoder *encoder)
- {
- 	struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index 9b0ac47a565e..31087ff6d871 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -837,5 +837,6 @@ extern bool intel_set_pch_fifo_underrun_reporting(struct drm_device *dev,
- 
- extern void intel_edp_psr_enable(struct intel_dp *intel_dp);
- extern void intel_edp_psr_disable(struct intel_dp *intel_dp);
-+extern void intel_edp_psr_update(struct drm_device *dev);
- 
- #endif /* __INTEL_DRV_H__ */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0490-drm-i915-Hook-PSR-functionality.patch b/patches.baytrail/0490-drm-i915-Hook-PSR-functionality.patch
deleted file mode 100644
index d38663fd7469f..0000000000000
--- a/patches.baytrail/0490-drm-i915-Hook-PSR-functionality.patch
+++ /dev/null
@@ -1,56 +0,0 @@
-From 82161b2209ac8fc97b473c77442defeef84b3400 Mon Sep 17 00:00:00 2001
-From: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Date: Thu, 11 Jul 2013 18:45:05 -0300
-Subject: drm/i915: Hook PSR functionality
-
-PSR must be enabled after transcoder and port are running.
-And it is only available for HSW.
-
-v2: move enable/disable to intel_ddi
-v3: The spec suggests PSR should be disabled even before backlight (by pzanoni)
-v4: also disabling and enabling whenever panel is disabled/enabled.
-v5: make it last patch to avoid breaking whenever bisecting. So calling for
-    update and force exit came to this patch along with enable/disable calls.
-v6: Remove unused and unecessary psr_enable/disable calls, as notice by Paulo.
-
-CC: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-[danvet: Drop the psr exit code in the busy ioctl since I didn't merge
-that part of the infrastructure yet - it needs more thought.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 4906557eb37b7fef84fad4304acef6dedf919880)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_ddi.c     |    2 ++
- drivers/gpu/drm/i915/intel_display.c |    1 +
- 2 files changed, 3 insertions(+)
-
---- a/drivers/gpu/drm/i915/intel_ddi.c
-+++ b/drivers/gpu/drm/i915/intel_ddi.c
-@@ -1124,6 +1124,7 @@ static void intel_enable_ddi(struct inte
- 			intel_dp_stop_link_train(intel_dp);
- 
- 		ironlake_edp_backlight_on(intel_dp);
-+		intel_edp_psr_enable(intel_dp);
- 	}
- 
- 	if (intel_crtc->eld_vld && type != INTEL_OUTPUT_EDP) {
-@@ -1154,6 +1155,7 @@ static void intel_disable_ddi(struct int
- 	if (type == INTEL_OUTPUT_EDP) {
- 		struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
- 
-+		intel_edp_psr_disable(intel_dp);
- 		ironlake_edp_backlight_off(intel_dp);
- 	}
- }
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -2274,6 +2274,7 @@ intel_pipe_set_base(struct drm_crtc *crt
- 	}
- 
- 	intel_update_fbc(dev);
-+	intel_edp_psr_update(dev);
- 	mutex_unlock(&dev->struct_mutex);
- 
- 	intel_crtc_update_sarea_pos(crtc, x, y);
diff --git a/patches.baytrail/0491-drm-i915-restore-debug-message-lost-in-merge-resolut.patch b/patches.baytrail/0491-drm-i915-restore-debug-message-lost-in-merge-resolut.patch
deleted file mode 100644
index 00a808acc0d8d..0000000000000
--- a/patches.baytrail/0491-drm-i915-restore-debug-message-lost-in-merge-resolut.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From 20f582a1a0d9696587528f41fcb1822e81d11b54 Mon Sep 17 00:00:00 2001
-From: Imre Deak <imre.deak@intel.com>
-Date: Thu, 18 Jul 2013 17:44:13 +0300
-Subject: drm/i915: restore debug message lost in merge resolution
-
-Restore debug message lost in merge commit e1b73cba13. Also clarify it
-that we are only clamping bpp not overwriting it.
-
-Signed-off-by: Imre Deak <imre.deak@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 7984211ee8e1fa03cd4bc9ef3d347f94f8a2c8a8)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_dp.c | 5 ++++-
- 1 file changed, 4 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
-index 55f3c970a766..db9cb317f5ce 100644
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -729,8 +729,11 @@ intel_dp_compute_config(struct intel_encoder *encoder,
- 	/* Walk through all bpp values. Luckily they're all nicely spaced with 2
- 	 * bpc in between. */
- 	bpp = pipe_config->pipe_bpp;
--	if (is_edp(intel_dp) && dev_priv->vbt.edp_bpp)
-+	if (is_edp(intel_dp) && dev_priv->vbt.edp_bpp) {
-+		DRM_DEBUG_KMS("clamping bpp for eDP panel to BIOS-provided %i\n",
-+			      dev_priv->vbt.edp_bpp);
- 		bpp = min_t(int, bpp, dev_priv->vbt.edp_bpp);
-+	}
- 
- 	for (; bpp >= 6*3; bpp -= 2*3) {
- 		mode_rate = intel_dp_link_required(adjusted_mode->clock, bpp);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0492-drm-i915-remove-SDV-support-from-lpt_pch_init_refclk.patch b/patches.baytrail/0492-drm-i915-remove-SDV-support-from-lpt_pch_init_refclk.patch
deleted file mode 100644
index 02722235805a5..0000000000000
--- a/patches.baytrail/0492-drm-i915-remove-SDV-support-from-lpt_pch_init_refclk.patch
+++ /dev/null
@@ -1,186 +0,0 @@
-From 3fb9e9cdf36d39a8009dd1b6b09d61267d2e0f48 Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Fri, 12 Jul 2013 14:19:36 -0300
-Subject: drm/i915: remove SDV support from lpt_pch_init_refclk
-
-The machines that fall in the "is_sdv" case are some very early
-pre-production steppings. This patch may break VGA output after
-suspend/resume on these machines.
-
-Even the documentation for the is_sdv cases was removed from BSpec.
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 0ff066a9e4a29481226a6d46eab6bd9499aeaddb)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 104 ++++++++++++-----------------------
- 1 file changed, 34 insertions(+), 70 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 55fcab85b7db..891594cf7a35 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -5174,7 +5174,6 @@ static void lpt_init_pch_refclk(struct drm_device *dev)
- 	struct drm_mode_config *mode_config = &dev->mode_config;
- 	struct intel_encoder *encoder;
- 	bool has_vga = false;
--	bool is_sdv = false;
- 	u32 tmp;
- 
- 	list_for_each_entry(encoder, &mode_config->encoder_list, base.head) {
-@@ -5190,10 +5189,6 @@ static void lpt_init_pch_refclk(struct drm_device *dev)
- 
- 	mutex_lock(&dev_priv->dpio_lock);
- 
--	/* XXX: Rip out SDV support once Haswell ships for real. */
--	if (IS_HASWELL(dev) && (dev->pci_device & 0xFF00) == 0x0C00)
--		is_sdv = true;
--
- 	tmp = intel_sbi_read(dev_priv, SBI_SSCCTL, SBI_ICLK);
- 	tmp &= ~SBI_SSCCTL_DISABLE;
- 	tmp |= SBI_SSCCTL_PATHALT;
-@@ -5205,36 +5200,27 @@ static void lpt_init_pch_refclk(struct drm_device *dev)
- 	tmp &= ~SBI_SSCCTL_PATHALT;
- 	intel_sbi_write(dev_priv, SBI_SSCCTL, tmp, SBI_ICLK);
- 
--	if (!is_sdv) {
--		tmp = I915_READ(SOUTH_CHICKEN2);
--		tmp |= FDI_MPHY_IOSFSB_RESET_CTL;
--		I915_WRITE(SOUTH_CHICKEN2, tmp);
-+	tmp = I915_READ(SOUTH_CHICKEN2);
-+	tmp |= FDI_MPHY_IOSFSB_RESET_CTL;
-+	I915_WRITE(SOUTH_CHICKEN2, tmp);
- 
--		if (wait_for_atomic_us(I915_READ(SOUTH_CHICKEN2) &
--				       FDI_MPHY_IOSFSB_RESET_STATUS, 100))
--			DRM_ERROR("FDI mPHY reset assert timeout\n");
-+	if (wait_for_atomic_us(I915_READ(SOUTH_CHICKEN2) &
-+			       FDI_MPHY_IOSFSB_RESET_STATUS, 100))
-+		DRM_ERROR("FDI mPHY reset assert timeout\n");
- 
--		tmp = I915_READ(SOUTH_CHICKEN2);
--		tmp &= ~FDI_MPHY_IOSFSB_RESET_CTL;
--		I915_WRITE(SOUTH_CHICKEN2, tmp);
-+	tmp = I915_READ(SOUTH_CHICKEN2);
-+	tmp &= ~FDI_MPHY_IOSFSB_RESET_CTL;
-+	I915_WRITE(SOUTH_CHICKEN2, tmp);
- 
--		if (wait_for_atomic_us((I915_READ(SOUTH_CHICKEN2) &
--				        FDI_MPHY_IOSFSB_RESET_STATUS) == 0,
--				       100))
--			DRM_ERROR("FDI mPHY reset de-assert timeout\n");
--	}
-+	if (wait_for_atomic_us((I915_READ(SOUTH_CHICKEN2) &
-+				FDI_MPHY_IOSFSB_RESET_STATUS) == 0, 100))
-+		DRM_ERROR("FDI mPHY reset de-assert timeout\n");
- 
- 	tmp = intel_sbi_read(dev_priv, 0x8008, SBI_MPHY);
- 	tmp &= ~(0xFF << 24);
- 	tmp |= (0x12 << 24);
- 	intel_sbi_write(dev_priv, 0x8008, tmp, SBI_MPHY);
- 
--	if (is_sdv) {
--		tmp = intel_sbi_read(dev_priv, 0x800C, SBI_MPHY);
--		tmp |= 0x7FFF;
--		intel_sbi_write(dev_priv, 0x800C, tmp, SBI_MPHY);
--	}
--
- 	tmp = intel_sbi_read(dev_priv, 0x2008, SBI_MPHY);
- 	tmp |= (1 << 11);
- 	intel_sbi_write(dev_priv, 0x2008, tmp, SBI_MPHY);
-@@ -5243,24 +5229,6 @@ static void lpt_init_pch_refclk(struct drm_device *dev)
- 	tmp |= (1 << 11);
- 	intel_sbi_write(dev_priv, 0x2108, tmp, SBI_MPHY);
- 
--	if (is_sdv) {
--		tmp = intel_sbi_read(dev_priv, 0x2038, SBI_MPHY);
--		tmp |= (0x3F << 24) | (0xF << 20) | (0xF << 16);
--		intel_sbi_write(dev_priv, 0x2038, tmp, SBI_MPHY);
--
--		tmp = intel_sbi_read(dev_priv, 0x2138, SBI_MPHY);
--		tmp |= (0x3F << 24) | (0xF << 20) | (0xF << 16);
--		intel_sbi_write(dev_priv, 0x2138, tmp, SBI_MPHY);
--
--		tmp = intel_sbi_read(dev_priv, 0x203C, SBI_MPHY);
--		tmp |= (0x3F << 8);
--		intel_sbi_write(dev_priv, 0x203C, tmp, SBI_MPHY);
--
--		tmp = intel_sbi_read(dev_priv, 0x213C, SBI_MPHY);
--		tmp |= (0x3F << 8);
--		intel_sbi_write(dev_priv, 0x213C, tmp, SBI_MPHY);
--	}
--
- 	tmp = intel_sbi_read(dev_priv, 0x206C, SBI_MPHY);
- 	tmp |= (1 << 24) | (1 << 21) | (1 << 18);
- 	intel_sbi_write(dev_priv, 0x206C, tmp, SBI_MPHY);
-@@ -5269,17 +5237,15 @@ static void lpt_init_pch_refclk(struct drm_device *dev)
- 	tmp |= (1 << 24) | (1 << 21) | (1 << 18);
- 	intel_sbi_write(dev_priv, 0x216C, tmp, SBI_MPHY);
- 
--	if (!is_sdv) {
--		tmp = intel_sbi_read(dev_priv, 0x2080, SBI_MPHY);
--		tmp &= ~(7 << 13);
--		tmp |= (5 << 13);
--		intel_sbi_write(dev_priv, 0x2080, tmp, SBI_MPHY);
-+	tmp = intel_sbi_read(dev_priv, 0x2080, SBI_MPHY);
-+	tmp &= ~(7 << 13);
-+	tmp |= (5 << 13);
-+	intel_sbi_write(dev_priv, 0x2080, tmp, SBI_MPHY);
- 
--		tmp = intel_sbi_read(dev_priv, 0x2180, SBI_MPHY);
--		tmp &= ~(7 << 13);
--		tmp |= (5 << 13);
--		intel_sbi_write(dev_priv, 0x2180, tmp, SBI_MPHY);
--	}
-+	tmp = intel_sbi_read(dev_priv, 0x2180, SBI_MPHY);
-+	tmp &= ~(7 << 13);
-+	tmp |= (5 << 13);
-+	intel_sbi_write(dev_priv, 0x2180, tmp, SBI_MPHY);
- 
- 	tmp = intel_sbi_read(dev_priv, 0x208C, SBI_MPHY);
- 	tmp &= ~0xFF;
-@@ -5301,25 +5267,23 @@ static void lpt_init_pch_refclk(struct drm_device *dev)
- 	tmp |= (0x1C << 16);
- 	intel_sbi_write(dev_priv, 0x2198, tmp, SBI_MPHY);
- 
--	if (!is_sdv) {
--		tmp = intel_sbi_read(dev_priv, 0x20C4, SBI_MPHY);
--		tmp |= (1 << 27);
--		intel_sbi_write(dev_priv, 0x20C4, tmp, SBI_MPHY);
-+	tmp = intel_sbi_read(dev_priv, 0x20C4, SBI_MPHY);
-+	tmp |= (1 << 27);
-+	intel_sbi_write(dev_priv, 0x20C4, tmp, SBI_MPHY);
- 
--		tmp = intel_sbi_read(dev_priv, 0x21C4, SBI_MPHY);
--		tmp |= (1 << 27);
--		intel_sbi_write(dev_priv, 0x21C4, tmp, SBI_MPHY);
-+	tmp = intel_sbi_read(dev_priv, 0x21C4, SBI_MPHY);
-+	tmp |= (1 << 27);
-+	intel_sbi_write(dev_priv, 0x21C4, tmp, SBI_MPHY);
- 
--		tmp = intel_sbi_read(dev_priv, 0x20EC, SBI_MPHY);
--		tmp &= ~(0xF << 28);
--		tmp |= (4 << 28);
--		intel_sbi_write(dev_priv, 0x20EC, tmp, SBI_MPHY);
-+	tmp = intel_sbi_read(dev_priv, 0x20EC, SBI_MPHY);
-+	tmp &= ~(0xF << 28);
-+	tmp |= (4 << 28);
-+	intel_sbi_write(dev_priv, 0x20EC, tmp, SBI_MPHY);
- 
--		tmp = intel_sbi_read(dev_priv, 0x21EC, SBI_MPHY);
--		tmp &= ~(0xF << 28);
--		tmp |= (4 << 28);
--		intel_sbi_write(dev_priv, 0x21EC, tmp, SBI_MPHY);
--	}
-+	tmp = intel_sbi_read(dev_priv, 0x21EC, SBI_MPHY);
-+	tmp &= ~(0xF << 28);
-+	tmp |= (4 << 28);
-+	intel_sbi_write(dev_priv, 0x21EC, tmp, SBI_MPHY);
- 
- 	/* ULT uses SBI_GEN0, but ULT doesn't have VGA, so we don't care. */
- 	tmp = intel_sbi_read(dev_priv, SBI_DBUFF0, SBI_ICLK);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0493-drm-i915-extract-FDI-mPHY-functions-from-lpt_init_pc.patch b/patches.baytrail/0493-drm-i915-extract-FDI-mPHY-functions-from-lpt_init_pc.patch
deleted file mode 100644
index 5ce093b7be8a2..0000000000000
--- a/patches.baytrail/0493-drm-i915-extract-FDI-mPHY-functions-from-lpt_init_pc.patch
+++ /dev/null
@@ -1,130 +0,0 @@
-From 5ac7aac76266a0da596a2b41b8d718af5ccf08aa Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Thu, 18 Jul 2013 18:51:11 -0300
-Subject: drm/i915: extract FDI mPHY functions from lpt_init_pch_refclk
-
-Because lpt_init_pch_refclk implements the "Sequence to enable
-CLKOUT_DP for FDI usage and configure PCH FDI I/O", which is very
-similar to "Sequence to enable CLKOUT_DP" and "Sequence to enable
-CLKOUT_DP without spread". With the extracted functions we can more
-easily implement the two missing sequences.
-
-v2: Rebase (WaMPhyProgramming:hsw comment).
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit f31f2d55eb77190e66cb13e5dd2beca7a91f8dd0)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 79 ++++++++++++++++++++----------------
- 1 file changed, 45 insertions(+), 34 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 891594cf7a35..3129a58f32c8 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -5164,41 +5164,9 @@ static void ironlake_init_pch_refclk(struct drm_device *dev)
- 	BUG_ON(val != final);
- }
- 
--/*
-- * Sequence to enable CLKOUT_DP for FDI usage and configure PCH FDI I/O.
-- * WaMPhyProgramming:hsw
-- */
--static void lpt_init_pch_refclk(struct drm_device *dev)
-+static void lpt_reset_fdi_mphy(struct drm_i915_private *dev_priv)
- {
--	struct drm_i915_private *dev_priv = dev->dev_private;
--	struct drm_mode_config *mode_config = &dev->mode_config;
--	struct intel_encoder *encoder;
--	bool has_vga = false;
--	u32 tmp;
--
--	list_for_each_entry(encoder, &mode_config->encoder_list, base.head) {
--		switch (encoder->type) {
--		case INTEL_OUTPUT_ANALOG:
--			has_vga = true;
--			break;
--		}
--	}
--
--	if (!has_vga)
--		return;
--
--	mutex_lock(&dev_priv->dpio_lock);
--
--	tmp = intel_sbi_read(dev_priv, SBI_SSCCTL, SBI_ICLK);
--	tmp &= ~SBI_SSCCTL_DISABLE;
--	tmp |= SBI_SSCCTL_PATHALT;
--	intel_sbi_write(dev_priv, SBI_SSCCTL, tmp, SBI_ICLK);
--
--	udelay(24);
--
--	tmp = intel_sbi_read(dev_priv, SBI_SSCCTL, SBI_ICLK);
--	tmp &= ~SBI_SSCCTL_PATHALT;
--	intel_sbi_write(dev_priv, SBI_SSCCTL, tmp, SBI_ICLK);
-+	uint32_t tmp;
- 
- 	tmp = I915_READ(SOUTH_CHICKEN2);
- 	tmp |= FDI_MPHY_IOSFSB_RESET_CTL;
-@@ -5215,6 +5183,12 @@ static void lpt_init_pch_refclk(struct drm_device *dev)
- 	if (wait_for_atomic_us((I915_READ(SOUTH_CHICKEN2) &
- 				FDI_MPHY_IOSFSB_RESET_STATUS) == 0, 100))
- 		DRM_ERROR("FDI mPHY reset de-assert timeout\n");
-+}
-+
-+/* WaMPhyProgramming:hsw */
-+static void lpt_program_fdi_mphy(struct drm_i915_private *dev_priv)
-+{
-+	uint32_t tmp;
- 
- 	tmp = intel_sbi_read(dev_priv, 0x8008, SBI_MPHY);
- 	tmp &= ~(0xFF << 24);
-@@ -5284,6 +5258,43 @@ static void lpt_init_pch_refclk(struct drm_device *dev)
- 	tmp &= ~(0xF << 28);
- 	tmp |= (4 << 28);
- 	intel_sbi_write(dev_priv, 0x21EC, tmp, SBI_MPHY);
-+}
-+
-+/* Sequence to enable CLKOUT_DP for FDI usage and configure PCH FDI I/O. */
-+static void lpt_init_pch_refclk(struct drm_device *dev)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct drm_mode_config *mode_config = &dev->mode_config;
-+	struct intel_encoder *encoder;
-+	bool has_vga = false;
-+	u32 tmp;
-+
-+	list_for_each_entry(encoder, &mode_config->encoder_list, base.head) {
-+		switch (encoder->type) {
-+		case INTEL_OUTPUT_ANALOG:
-+			has_vga = true;
-+			break;
-+		}
-+	}
-+
-+	if (!has_vga)
-+		return;
-+
-+	mutex_lock(&dev_priv->dpio_lock);
-+
-+	tmp = intel_sbi_read(dev_priv, SBI_SSCCTL, SBI_ICLK);
-+	tmp &= ~SBI_SSCCTL_DISABLE;
-+	tmp |= SBI_SSCCTL_PATHALT;
-+	intel_sbi_write(dev_priv, SBI_SSCCTL, tmp, SBI_ICLK);
-+
-+	udelay(24);
-+
-+	tmp = intel_sbi_read(dev_priv, SBI_SSCCTL, SBI_ICLK);
-+	tmp &= ~SBI_SSCCTL_PATHALT;
-+	intel_sbi_write(dev_priv, SBI_SSCCTL, tmp, SBI_ICLK);
-+
-+	lpt_reset_fdi_mphy(dev_priv);
-+	lpt_program_fdi_mphy(dev_priv);
- 
- 	/* ULT uses SBI_GEN0, but ULT doesn't have VGA, so we don't care. */
- 	tmp = intel_sbi_read(dev_priv, SBI_DBUFF0, SBI_ICLK);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0494-drm-i915-extract-lpt_enable_clkout_dp-from-lpt_init_.patch b/patches.baytrail/0494-drm-i915-extract-lpt_enable_clkout_dp-from-lpt_init_.patch
deleted file mode 100644
index 9e47d9da48801..0000000000000
--- a/patches.baytrail/0494-drm-i915-extract-lpt_enable_clkout_dp-from-lpt_init_.patch
+++ /dev/null
@@ -1,79 +0,0 @@
-From 696201aba17ac3c191f106dd213b75e6f127bb88 Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Fri, 12 Jul 2013 14:19:38 -0300
-Subject: drm/i915: extract lpt_enable_clkout_dp from lpt_init_pch_refclk
-
-The next step is to modify lpt_enable_clkout_dp to enable support for
-"Sequence to enable CLKOUT_DP" and "Sequence to enable CLKOUT_DP
-without spread".
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit bf8fa3d383aa9eb0003419e40ad0f3667c810154)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 38 +++++++++++++++++++++---------------
- 1 file changed, 22 insertions(+), 16 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 3129a58f32c8..bf450d725fc3 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -5261,24 +5261,10 @@ static void lpt_program_fdi_mphy(struct drm_i915_private *dev_priv)
- }
- 
- /* Sequence to enable CLKOUT_DP for FDI usage and configure PCH FDI I/O. */
--static void lpt_init_pch_refclk(struct drm_device *dev)
-+static void lpt_enable_clkout_dp(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
--	struct drm_mode_config *mode_config = &dev->mode_config;
--	struct intel_encoder *encoder;
--	bool has_vga = false;
--	u32 tmp;
--
--	list_for_each_entry(encoder, &mode_config->encoder_list, base.head) {
--		switch (encoder->type) {
--		case INTEL_OUTPUT_ANALOG:
--			has_vga = true;
--			break;
--		}
--	}
--
--	if (!has_vga)
--		return;
-+	uint32_t tmp;
- 
- 	mutex_lock(&dev_priv->dpio_lock);
- 
-@@ -5304,6 +5290,26 @@ static void lpt_init_pch_refclk(struct drm_device *dev)
- 	mutex_unlock(&dev_priv->dpio_lock);
- }
- 
-+static void lpt_init_pch_refclk(struct drm_device *dev)
-+{
-+	struct drm_mode_config *mode_config = &dev->mode_config;
-+	struct intel_encoder *encoder;
-+	bool has_vga = false;
-+
-+	list_for_each_entry(encoder, &mode_config->encoder_list, base.head) {
-+		switch (encoder->type) {
-+		case INTEL_OUTPUT_ANALOG:
-+			has_vga = true;
-+			break;
-+		}
-+	}
-+
-+	if (!has_vga)
-+		return;
-+
-+	lpt_enable_clkout_dp(dev);
-+}
-+
- /*
-  * Initialize reference clocks when the driver loads
-  */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0495-drm-i915-checking-for-NULL-instead-of-IS_ERR.patch b/patches.baytrail/0495-drm-i915-checking-for-NULL-instead-of-IS_ERR.patch
deleted file mode 100644
index 4cdc47c6bc8c8..0000000000000
--- a/patches.baytrail/0495-drm-i915-checking-for-NULL-instead-of-IS_ERR.patch
+++ /dev/null
@@ -1,51 +0,0 @@
-From fa20686f5067a32dc89268886469fcc5213a3066 Mon Sep 17 00:00:00 2001
-From: Dan Carpenter <dan.carpenter@oracle.com>
-Date: Fri, 19 Jul 2013 08:45:46 +0300
-Subject: drm/i915: checking for NULL instead of IS_ERR()
-
-i915_gem_vma_create() returns and ERR_PTR() or a valid pointer, it never
-returns NULL.
-
-Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit db473b36d4a2eb02c65aefca11578698b3699fe0)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem.c        | 4 ++--
- drivers/gpu/drm/i915/i915_gem_stolen.c | 4 ++--
- 2 files changed, 4 insertions(+), 4 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index 3200a201bcba..5a0f78dfd0bf 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -3120,9 +3120,9 @@ i915_gem_object_bind_to_gtt(struct drm_i915_gem_object *obj,
- 	i915_gem_object_pin_pages(obj);
- 
- 	vma = i915_gem_vma_create(obj, &dev_priv->gtt.base);
--	if (vma == NULL) {
-+	if (IS_ERR(vma)) {
- 		i915_gem_object_unpin_pages(obj);
--		return -ENOMEM;
-+		return PTR_ERR(vma);
- 	}
- 
- search_free:
-diff --git a/drivers/gpu/drm/i915/i915_gem_stolen.c b/drivers/gpu/drm/i915/i915_gem_stolen.c
-index f52613605fe1..27ffb4c865fa 100644
---- a/drivers/gpu/drm/i915/i915_gem_stolen.c
-+++ b/drivers/gpu/drm/i915/i915_gem_stolen.c
-@@ -395,8 +395,8 @@ i915_gem_object_create_stolen_for_preallocated(struct drm_device *dev,
- 		return obj;
- 
- 	vma = i915_gem_vma_create(obj, &dev_priv->gtt.base);
--	if (!vma) {
--		ret = -ENOMEM;
-+	if (IS_ERR(vma)) {
-+		ret = PTR_ERR(vma);
- 		goto err_out;
- 	}
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0496-drm-i915-use-after-free-on-error-path.patch b/patches.baytrail/0496-drm-i915-use-after-free-on-error-path.patch
deleted file mode 100644
index 10a544a680ee0..0000000000000
--- a/patches.baytrail/0496-drm-i915-use-after-free-on-error-path.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From d04b7be170996f83bcf5087b834b23bd8e1b9b9c Mon Sep 17 00:00:00 2001
-From: Dan Carpenter <dan.carpenter@oracle.com>
-Date: Fri, 19 Jul 2013 08:46:27 +0300
-Subject: drm/i915: use after free on error path
-
-i915_gem_vma_destroy() frees its argument so we have to move the
-drm_mm_remove_node() call up a few lines.
-
-Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 6286ef9b56bfc5d4f3f06ef5488e41da4480dc85)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index 5a0f78dfd0bf..c2e226edd999 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -3168,9 +3168,9 @@ search_free:
- 	return 0;
- 
- err_out:
-+	drm_mm_remove_node(&vma->node);
- 	i915_gem_vma_destroy(vma);
- 	i915_gem_object_unpin_pages(obj);
--	drm_mm_remove_node(&vma->node);
- 	return ret;
- }
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0497-drm-i915-add-prefault_disable-module-option.patch b/patches.baytrail/0497-drm-i915-add-prefault_disable-module-option.patch
deleted file mode 100644
index 32419945f46ab..0000000000000
--- a/patches.baytrail/0497-drm-i915-add-prefault_disable-module-option.patch
+++ /dev/null
@@ -1,101 +0,0 @@
-From 642da32b66bcfd5caa1dcc26bb01817c4e30d050 Mon Sep 17 00:00:00 2001
-From: Xiong Zhang <xiong.y.zhang@intel.com>
-Date: Fri, 19 Jul 2013 13:51:24 +0800
-Subject: drm/i915: add prefault_disable module option
-
-prefault is stll enabled by default which prevent most of pwrite/pread/reloc
-from running slow path, in order to verify these slow pathes, prefault need
-to be disabled.
-
-Signed-off-by: Xiong Zhang <xiong.y.zhang@intel.com>
-[danvet: Make checkpatch happy and bikeshed the module option help
-text a bit.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 0b74b508f78cea96d0d1b47e72cc0ec7959cdc68)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.c            |  5 +++++
- drivers/gpu/drm/i915/i915_drv.h            |  1 +
- drivers/gpu/drm/i915/i915_gem.c            | 12 +++++++-----
- drivers/gpu/drm/i915/i915_gem_execbuffer.c |  6 ++++--
- 4 files changed, 17 insertions(+), 7 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
-index dd6324901d57..5849b0a91b4e 100644
---- a/drivers/gpu/drm/i915/i915_drv.c
-+++ b/drivers/gpu/drm/i915/i915_drv.c
-@@ -141,6 +141,11 @@ module_param_named(fastboot, i915_fastboot, bool, 0600);
- MODULE_PARM_DESC(fastboot, "Try to skip unnecessary mode sets at boot time "
- 		 "(default: false)");
- 
-+bool i915_prefault_disable __read_mostly;
-+module_param_named(prefault_disable, i915_prefault_disable, bool, 0600);
-+MODULE_PARM_DESC(prefault_disable,
-+		"Disable page prefaulting for pread/pwrite/reloc (default:false). For developers only.");
-+
- static struct drm_driver driver;
- extern int intel_agp_enabled;
- 
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 31441f8561e5..452b2ae84c4e 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1628,6 +1628,7 @@ extern unsigned int i915_preliminary_hw_support __read_mostly;
- extern int i915_disable_power_well __read_mostly;
- extern int i915_enable_ips __read_mostly;
- extern bool i915_fastboot __read_mostly;
-+extern bool i915_prefault_disable __read_mostly;
- 
- extern int i915_suspend(struct drm_device *dev, pm_message_t state);
- extern int i915_resume(struct drm_device *dev);
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index c2e226edd999..37641c014e7a 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -465,7 +465,7 @@ i915_gem_shmem_pread(struct drm_device *dev,
- 
- 		mutex_unlock(&dev->struct_mutex);
- 
--		if (!prefaulted) {
-+		if (likely(!i915_prefault_disable) && !prefaulted) {
- 			ret = fault_in_multipages_writeable(user_data, remain);
- 			/* Userspace is tricking us, but we've already clobbered
- 			 * its pages with the prefault and promised to write the
-@@ -860,10 +860,12 @@ i915_gem_pwrite_ioctl(struct drm_device *dev, void *data,
- 		       args->size))
- 		return -EFAULT;
- 
--	ret = fault_in_multipages_readable(to_user_ptr(args->data_ptr),
--					   args->size);
--	if (ret)
--		return -EFAULT;
-+	if (likely(!i915_prefault_disable)) {
-+		ret = fault_in_multipages_readable(to_user_ptr(args->data_ptr),
-+						   args->size);
-+		if (ret)
-+			return -EFAULT;
-+	}
- 
- 	ret = i915_mutex_lock_interruptible(dev);
- 	if (ret)
-diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-index 1b58694d7be7..1734825bef34 100644
---- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-@@ -759,8 +759,10 @@ validate_exec_list(struct drm_i915_gem_exec_object2 *exec,
- 		if (!access_ok(VERIFY_WRITE, ptr, length))
- 			return -EFAULT;
- 
--		if (fault_in_multipages_readable(ptr, length))
--			return -EFAULT;
-+		if (likely(!i915_prefault_disable)) {
-+			if (fault_in_multipages_readable(ptr, length))
-+				return -EFAULT;
-+		}
- 	}
- 
- 	return 0;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0498-drm-i915-kill-ivybridge_irq_preinstall.patch b/patches.baytrail/0498-drm-i915-kill-ivybridge_irq_preinstall.patch
deleted file mode 100644
index 17bb569f8c520..0000000000000
--- a/patches.baytrail/0498-drm-i915-kill-ivybridge_irq_preinstall.patch
+++ /dev/null
@@ -1,59 +0,0 @@
-From 0cbf79b7218bbd8fc1ae9dc50cd1164ab175831b Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Fri, 12 Jul 2013 16:35:09 -0300
-Subject: drm/i915: kill ivybridge_irq_preinstall
-
-After Daniel's latest changes it's now equal to
-ironlake_irq_preinstall.
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 31694658fa5bc604a2df2cbaf72d4cfc52e9db48)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 21 +--------------------
- 1 file changed, 1 insertion(+), 20 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index 55086078cdc4..3a37041c845c 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -2139,25 +2139,6 @@ static void ironlake_irq_preinstall(struct drm_device *dev)
- 	ibx_irq_preinstall(dev);
- }
- 
--static void ivybridge_irq_preinstall(struct drm_device *dev)
--{
--	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
--
--	atomic_set(&dev_priv->irq_received, 0);
--
--	I915_WRITE(HWSTAM, 0xeffe);
--
--	/* XXX hotplug from PCH */
--
--	I915_WRITE(DEIMR, 0xffffffff);
--	I915_WRITE(DEIER, 0x0);
--	POSTING_READ(DEIER);
--
--	gen5_gt_irq_preinstall(dev);
--
--	ibx_irq_preinstall(dev);
--}
--
- static void valleyview_irq_preinstall(struct drm_device *dev)
- {
- 	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
-@@ -3166,7 +3147,7 @@ void intel_irq_init(struct drm_device *dev)
- 	} else if (IS_IVYBRIDGE(dev) || IS_HASWELL(dev)) {
- 		/* Share uninstall handlers with ILK/SNB */
- 		dev->driver->irq_handler = ivybridge_irq_handler;
--		dev->driver->irq_preinstall = ivybridge_irq_preinstall;
-+		dev->driver->irq_preinstall = ironlake_irq_preinstall;
- 		dev->driver->irq_postinstall = ivybridge_irq_postinstall;
- 		dev->driver->irq_uninstall = ironlake_irq_uninstall;
- 		dev->driver->enable_vblank = ivybridge_enable_vblank;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0499-drm-i915-extract-ilk_display_irq_handler.patch b/patches.baytrail/0499-drm-i915-extract-ilk_display_irq_handler.patch
deleted file mode 100644
index a59f7f29f138d..0000000000000
--- a/patches.baytrail/0499-drm-i915-extract-ilk_display_irq_handler.patch
+++ /dev/null
@@ -1,141 +0,0 @@
-From 7cf0072b0de580f5ef2f3c40cc400d29cf8c9572 Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Fri, 12 Jul 2013 16:35:10 -0300
-Subject: drm/i915: extract ilk_display_irq_handler
-
-It's the code that deals with de_iir.
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit c008bc6eda951dd091115374930de97de48a8b67)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 104 +++++++++++++++++++++-------------------
- 1 file changed, 56 insertions(+), 48 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index 3a37041c845c..587a51af1e66 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -1197,6 +1197,60 @@ static void cpt_irq_handler(struct drm_device *dev, u32 pch_iir)
- 		cpt_serr_int_handler(dev);
- }
- 
-+static void ilk_display_irq_handler(struct drm_device *dev, u32 de_iir)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+
-+	if (de_iir & DE_AUX_CHANNEL_A)
-+		dp_aux_irq_handler(dev);
-+
-+	if (de_iir & DE_GSE)
-+		intel_opregion_asle_intr(dev);
-+
-+	if (de_iir & DE_PIPEA_VBLANK)
-+		drm_handle_vblank(dev, 0);
-+
-+	if (de_iir & DE_PIPEB_VBLANK)
-+		drm_handle_vblank(dev, 1);
-+
-+	if (de_iir & DE_POISON)
-+		DRM_ERROR("Poison interrupt\n");
-+
-+	if (de_iir & DE_PIPEA_FIFO_UNDERRUN)
-+		if (intel_set_cpu_fifo_underrun_reporting(dev, PIPE_A, false))
-+			DRM_DEBUG_DRIVER("Pipe A FIFO underrun\n");
-+
-+	if (de_iir & DE_PIPEB_FIFO_UNDERRUN)
-+		if (intel_set_cpu_fifo_underrun_reporting(dev, PIPE_B, false))
-+			DRM_DEBUG_DRIVER("Pipe B FIFO underrun\n");
-+
-+	if (de_iir & DE_PLANEA_FLIP_DONE) {
-+		intel_prepare_page_flip(dev, 0);
-+		intel_finish_page_flip_plane(dev, 0);
-+	}
-+
-+	if (de_iir & DE_PLANEB_FLIP_DONE) {
-+		intel_prepare_page_flip(dev, 1);
-+		intel_finish_page_flip_plane(dev, 1);
-+	}
-+
-+	/* check event from PCH */
-+	if (de_iir & DE_PCH_EVENT) {
-+		u32 pch_iir = I915_READ(SDEIIR);
-+
-+		if (HAS_PCH_CPT(dev))
-+			cpt_irq_handler(dev, pch_iir);
-+		else
-+			ibx_irq_handler(dev, pch_iir);
-+
-+		/* should clear PCH hotplug event before clear CPU irq */
-+		I915_WRITE(SDEIIR, pch_iir);
-+	}
-+
-+	if (IS_GEN5(dev) && de_iir & DE_PCU_EVENT)
-+		ironlake_rps_change_irq_handler(dev);
-+}
-+
- static irqreturn_t ivybridge_irq_handler(int irq, void *arg)
- {
- 	struct drm_device *dev = (struct drm_device *) arg;
-@@ -1355,54 +1409,8 @@ static irqreturn_t ironlake_irq_handler(int irq, void *arg)
- 	else
- 		snb_gt_irq_handler(dev, dev_priv, gt_iir);
- 
--	if (de_iir & DE_AUX_CHANNEL_A)
--		dp_aux_irq_handler(dev);
--
--	if (de_iir & DE_GSE)
--		intel_opregion_asle_intr(dev);
--
--	if (de_iir & DE_PIPEA_VBLANK)
--		drm_handle_vblank(dev, 0);
--
--	if (de_iir & DE_PIPEB_VBLANK)
--		drm_handle_vblank(dev, 1);
--
--	if (de_iir & DE_POISON)
--		DRM_ERROR("Poison interrupt\n");
--
--	if (de_iir & DE_PIPEA_FIFO_UNDERRUN)
--		if (intel_set_cpu_fifo_underrun_reporting(dev, PIPE_A, false))
--			DRM_DEBUG_DRIVER("Pipe A FIFO underrun\n");
--
--	if (de_iir & DE_PIPEB_FIFO_UNDERRUN)
--		if (intel_set_cpu_fifo_underrun_reporting(dev, PIPE_B, false))
--			DRM_DEBUG_DRIVER("Pipe B FIFO underrun\n");
--
--	if (de_iir & DE_PLANEA_FLIP_DONE) {
--		intel_prepare_page_flip(dev, 0);
--		intel_finish_page_flip_plane(dev, 0);
--	}
--
--	if (de_iir & DE_PLANEB_FLIP_DONE) {
--		intel_prepare_page_flip(dev, 1);
--		intel_finish_page_flip_plane(dev, 1);
--	}
--
--	/* check event from PCH */
--	if (de_iir & DE_PCH_EVENT) {
--		u32 pch_iir = I915_READ(SDEIIR);
--
--		if (HAS_PCH_CPT(dev))
--			cpt_irq_handler(dev, pch_iir);
--		else
--			ibx_irq_handler(dev, pch_iir);
--
--		/* should clear PCH hotplug event before clear CPU irq */
--		I915_WRITE(SDEIIR, pch_iir);
--	}
--
--	if (IS_GEN5(dev) &&  de_iir & DE_PCU_EVENT)
--		ironlake_rps_change_irq_handler(dev);
-+	if (de_iir)
-+		ilk_display_irq_handler(dev, de_iir);
- 
- 	if (IS_GEN6(dev) && pm_iir & GEN6_PM_RPS_EVENTS)
- 		gen6_rps_irq_handler(dev_priv, pm_iir);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0500-drm-i915-extract-ivb_display_irq_handler.patch b/patches.baytrail/0500-drm-i915-extract-ivb_display_irq_handler.patch
deleted file mode 100644
index b2a25fe785c9e..0000000000000
--- a/patches.baytrail/0500-drm-i915-extract-ivb_display_irq_handler.patch
+++ /dev/null
@@ -1,106 +0,0 @@
-From 9dfc86c8bbeadd616b86e983fe2862eeaf060c4d Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Fri, 12 Jul 2013 16:35:11 -0300
-Subject: drm/i915: extract ivb_display_irq_handler
-
-Just like we did with ilk_display_irq_handler.
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 9719fb9852e4301d5b8d74feec141d3c3e60fae0)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 63 +++++++++++++++++++++++------------------
- 1 file changed, 35 insertions(+), 28 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index 587a51af1e66..287078707881 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -1251,13 +1251,46 @@ static void ilk_display_irq_handler(struct drm_device *dev, u32 de_iir)
- 		ironlake_rps_change_irq_handler(dev);
- }
- 
-+static void ivb_display_irq_handler(struct drm_device *dev, u32 de_iir)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	int i;
-+
-+	if (de_iir & DE_ERR_INT_IVB)
-+		ivb_err_int_handler(dev);
-+
-+	if (de_iir & DE_AUX_CHANNEL_A_IVB)
-+		dp_aux_irq_handler(dev);
-+
-+	if (de_iir & DE_GSE_IVB)
-+		intel_opregion_asle_intr(dev);
-+
-+	for (i = 0; i < 3; i++) {
-+		if (de_iir & (DE_PIPEA_VBLANK_IVB << (5 * i)))
-+			drm_handle_vblank(dev, i);
-+		if (de_iir & (DE_PLANEA_FLIP_DONE_IVB << (5 * i))) {
-+			intel_prepare_page_flip(dev, i);
-+			intel_finish_page_flip_plane(dev, i);
-+		}
-+	}
-+
-+	/* check event from PCH */
-+	if (!HAS_PCH_NOP(dev) && (de_iir & DE_PCH_EVENT_IVB)) {
-+		u32 pch_iir = I915_READ(SDEIIR);
-+
-+		cpt_irq_handler(dev, pch_iir);
-+
-+		/* clear PCH hotplug event before clear CPU irq */
-+		I915_WRITE(SDEIIR, pch_iir);
-+	}
-+}
-+
- static irqreturn_t ivybridge_irq_handler(int irq, void *arg)
- {
- 	struct drm_device *dev = (struct drm_device *) arg;
- 	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
- 	u32 de_iir, gt_iir, de_ier, pm_iir, sde_ier = 0;
- 	irqreturn_t ret = IRQ_NONE;
--	int i;
- 
- 	atomic_inc(&dev_priv->irq_received);
- 
-@@ -1302,33 +1335,7 @@ static irqreturn_t ivybridge_irq_handler(int irq, void *arg)
- 
- 	de_iir = I915_READ(DEIIR);
- 	if (de_iir) {
--		if (de_iir & DE_ERR_INT_IVB)
--			ivb_err_int_handler(dev);
--
--		if (de_iir & DE_AUX_CHANNEL_A_IVB)
--			dp_aux_irq_handler(dev);
--
--		if (de_iir & DE_GSE_IVB)
--			intel_opregion_asle_intr(dev);
--
--		for (i = 0; i < 3; i++) {
--			if (de_iir & (DE_PIPEA_VBLANK_IVB << (5 * i)))
--				drm_handle_vblank(dev, i);
--			if (de_iir & (DE_PLANEA_FLIP_DONE_IVB << (5 * i))) {
--				intel_prepare_page_flip(dev, i);
--				intel_finish_page_flip_plane(dev, i);
--			}
--		}
--
--		/* check event from PCH */
--		if (!HAS_PCH_NOP(dev) && (de_iir & DE_PCH_EVENT_IVB)) {
--			u32 pch_iir = I915_READ(SDEIIR);
--
--			cpt_irq_handler(dev, pch_iir);
--
--			/* clear PCH hotplug event before clear CPU irq */
--			I915_WRITE(SDEIIR, pch_iir);
--		}
-+		ivb_display_irq_handler(dev, de_iir);
- 
- 		I915_WRITE(DEIIR, de_iir);
- 		ret = IRQ_HANDLED;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0501-drm-i915-don-t-read-or-write-GEN6_PMIIR-on-Gen-5.patch b/patches.baytrail/0501-drm-i915-don-t-read-or-write-GEN6_PMIIR-on-Gen-5.patch
deleted file mode 100644
index d34e9f3e46af8..0000000000000
--- a/patches.baytrail/0501-drm-i915-don-t-read-or-write-GEN6_PMIIR-on-Gen-5.patch
+++ /dev/null
@@ -1,63 +0,0 @@
-From 7f322440b870dd7e69955e4d66b4709fa51c878d Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Fri, 12 Jul 2013 19:52:36 -0300
-Subject: drm/i915: don't read or write GEN6_PMIIR on Gen 5
-
-The register doesn't exist on Gen 5.
-
-v2: Simplify checks since pm_iir is always 0 on Gen 5 (Chris)
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 221ab43e8abe1e395d4bdd475ee3d4c2548f04ca)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 12 +++++++-----
- 1 file changed, 7 insertions(+), 5 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index 287078707881..ed4459e46e10 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -1384,7 +1384,7 @@ static irqreturn_t ironlake_irq_handler(int irq, void *arg)
- 	struct drm_device *dev = (struct drm_device *) arg;
- 	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
- 	int ret = IRQ_NONE;
--	u32 de_iir, gt_iir, de_ier, pm_iir, sde_ier;
-+	u32 de_iir, gt_iir, de_ier, pm_iir = 0, sde_ier;
- 
- 	atomic_inc(&dev_priv->irq_received);
- 
-@@ -1404,9 +1404,10 @@ static irqreturn_t ironlake_irq_handler(int irq, void *arg)
- 
- 	de_iir = I915_READ(DEIIR);
- 	gt_iir = I915_READ(GTIIR);
--	pm_iir = I915_READ(GEN6_PMIIR);
-+	if (IS_GEN6(dev))
-+		pm_iir = I915_READ(GEN6_PMIIR);
- 
--	if (de_iir == 0 && gt_iir == 0 && (!IS_GEN6(dev) || pm_iir == 0))
-+	if (de_iir == 0 && gt_iir == 0 && pm_iir == 0)
- 		goto done;
- 
- 	ret = IRQ_HANDLED;
-@@ -1419,12 +1420,13 @@ static irqreturn_t ironlake_irq_handler(int irq, void *arg)
- 	if (de_iir)
- 		ilk_display_irq_handler(dev, de_iir);
- 
--	if (IS_GEN6(dev) && pm_iir & GEN6_PM_RPS_EVENTS)
-+	if (pm_iir & GEN6_PM_RPS_EVENTS)
- 		gen6_rps_irq_handler(dev_priv, pm_iir);
- 
- 	I915_WRITE(GTIIR, gt_iir);
- 	I915_WRITE(DEIIR, de_iir);
--	I915_WRITE(GEN6_PMIIR, pm_iir);
-+	if (pm_iir)
-+		I915_WRITE(GEN6_PMIIR, pm_iir);
- 
- done:
- 	I915_WRITE(DEIER, de_ier);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0502-drm-i915-reorganize-ironlake_irq_handler.patch b/patches.baytrail/0502-drm-i915-reorganize-ironlake_irq_handler.patch
deleted file mode 100644
index 7b64089e5f8b1..0000000000000
--- a/patches.baytrail/0502-drm-i915-reorganize-ironlake_irq_handler.patch
+++ /dev/null
@@ -1,97 +0,0 @@
-From 3fdaeda4bd25298e58e0d7692e76e6afa0654dbc Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Fri, 12 Jul 2013 19:54:41 -0300
-Subject: drm/i915: reorganize ironlake_irq_handler
-
-The ironlake_irq_handler and ivybridge_irq_handler functions do
-basically the same thing, but they have different implementation
-styles. With this patch we reorganize ironlake_irq_handler in a way
-that makes it look very similar to ivybridge_irq_handler.
-
-One of the advantages of this new function style is that we don't
-write 0 to the IIR registers anymore.
-
-v2: - Rebase due to changes on previous patches
-    - Move pm_iir to a tighter scope (Chris)
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 27b9188e14f5f1033ed36ea84035898fe21e4f46)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 46 ++++++++++++++++++++---------------------
- 1 file changed, 23 insertions(+), 23 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index ed4459e46e10..703fe8343507 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -1384,7 +1384,7 @@ static irqreturn_t ironlake_irq_handler(int irq, void *arg)
- 	struct drm_device *dev = (struct drm_device *) arg;
- 	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
- 	int ret = IRQ_NONE;
--	u32 de_iir, gt_iir, de_ier, pm_iir = 0, sde_ier;
-+	u32 de_iir, gt_iir, de_ier, sde_ier;
- 
- 	atomic_inc(&dev_priv->irq_received);
- 
-@@ -1402,33 +1402,33 @@ static irqreturn_t ironlake_irq_handler(int irq, void *arg)
- 	I915_WRITE(SDEIER, 0);
- 	POSTING_READ(SDEIER);
- 
--	de_iir = I915_READ(DEIIR);
- 	gt_iir = I915_READ(GTIIR);
--	if (IS_GEN6(dev))
--		pm_iir = I915_READ(GEN6_PMIIR);
--
--	if (de_iir == 0 && gt_iir == 0 && pm_iir == 0)
--		goto done;
--
--	ret = IRQ_HANDLED;
--
--	if (IS_GEN5(dev))
--		ilk_gt_irq_handler(dev, dev_priv, gt_iir);
--	else
--		snb_gt_irq_handler(dev, dev_priv, gt_iir);
-+	if (gt_iir) {
-+		if (IS_GEN5(dev))
-+			ilk_gt_irq_handler(dev, dev_priv, gt_iir);
-+		else
-+			snb_gt_irq_handler(dev, dev_priv, gt_iir);
-+		I915_WRITE(GTIIR, gt_iir);
-+		ret = IRQ_HANDLED;
-+	}
- 
--	if (de_iir)
-+	de_iir = I915_READ(DEIIR);
-+	if (de_iir) {
- 		ilk_display_irq_handler(dev, de_iir);
-+		I915_WRITE(DEIIR, de_iir);
-+		ret = IRQ_HANDLED;
-+	}
- 
--	if (pm_iir & GEN6_PM_RPS_EVENTS)
--		gen6_rps_irq_handler(dev_priv, pm_iir);
--
--	I915_WRITE(GTIIR, gt_iir);
--	I915_WRITE(DEIIR, de_iir);
--	if (pm_iir)
--		I915_WRITE(GEN6_PMIIR, pm_iir);
-+	if (IS_GEN6(dev)) {
-+		u32 pm_iir = I915_READ(GEN6_PMIIR);
-+		if (pm_iir) {
-+			if (pm_iir & GEN6_PM_RPS_EVENTS)
-+				gen6_rps_irq_handler(dev_priv, pm_iir);
-+			I915_WRITE(GEN6_PMIIR, pm_iir);
-+			ret = IRQ_HANDLED;
-+		}
-+	}
- 
--done:
- 	I915_WRITE(DEIER, de_ier);
- 	POSTING_READ(DEIER);
- 	I915_WRITE(SDEIER, sde_ier);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0503-drm-i915-POSTING_READ-DEIER-on-ivybridge_irq_handler.patch b/patches.baytrail/0503-drm-i915-POSTING_READ-DEIER-on-ivybridge_irq_handler.patch
deleted file mode 100644
index fa9e719579c7e..0000000000000
--- a/patches.baytrail/0503-drm-i915-POSTING_READ-DEIER-on-ivybridge_irq_handler.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From 82027f5e48e9c5c5cc300c0f9b8a40d9e649a9e3 Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Fri, 12 Jul 2013 16:35:14 -0300
-Subject: drm/i915: POSTING_READ(DEIER) on ivybridge_irq_handler
-
-We have this POSTING_READ inside ironlake_irq_handler. I suppose we
-also want it on IVB because we want to stop the IRQ handler as soon as
-possible at this point.
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 23a78516081c49398b6bf08d7a40e954048426bf)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index 703fe8343507..d4b2682641ed 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -1305,6 +1305,7 @@ static irqreturn_t ivybridge_irq_handler(int irq, void *arg)
- 	/* disable master interrupt before clearing iir  */
- 	de_ier = I915_READ(DEIER);
- 	I915_WRITE(DEIER, de_ier & ~DE_MASTER_IRQ_CONTROL);
-+	POSTING_READ(DEIER);
- 
- 	/* Disable south interrupts. We'll only write to SDEIIR once, so further
- 	 * interrupts will will be stored on its back queue, and then we'll be
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0504-drm-i915-add-ILK-SNB-support-to-ivybridge_irq_handle.patch b/patches.baytrail/0504-drm-i915-add-ILK-SNB-support-to-ivybridge_irq_handle.patch
deleted file mode 100644
index c7a0e9ee77622..0000000000000
--- a/patches.baytrail/0504-drm-i915-add-ILK-SNB-support-to-ivybridge_irq_handle.patch
+++ /dev/null
@@ -1,197 +0,0 @@
-From 80e2d2b31df39c8fc8302f21f00dd46aafd44131 Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Fri, 12 Jul 2013 19:56:30 -0300
-Subject: drm/i915: add ILK/SNB support to ivybridge_irq_handler
-
-And then rename it to ironlake_irq_handler. Also move
-ilk_gt_irq_handler up to avoid forward declarations.
-
-In the previous patches I did small modifications to both
-ironlake_irq_handler an ivybridge_irq_handler so they became very
-similar functions. Now it should be very easy to verify that all we
-need to add ILK/SNB support is to call ilk_gt_irq_handler, call
-ilk_display_irq_handler and avoid reading pm_iir on gen 5.
-
-v2: - Rebase due to changes on the previous patches
-    - Move pm_iir to a tighter scope (Chris)
-    - Change some Gen checks for readability
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit f1af8fc10cdb75da7f07f765e9af86dec064f2a8)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 115 +++++++++++-----------------------------
- 1 file changed, 32 insertions(+), 83 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index d4b2682641ed..a2bcfa2908ab 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -844,6 +844,17 @@ static void ivybridge_parity_error_irq_handler(struct drm_device *dev)
- 	queue_work(dev_priv->wq, &dev_priv->l3_parity.error_work);
- }
- 
-+static void ilk_gt_irq_handler(struct drm_device *dev,
-+			       struct drm_i915_private *dev_priv,
-+			       u32 gt_iir)
-+{
-+	if (gt_iir &
-+	    (GT_RENDER_USER_INTERRUPT | GT_RENDER_PIPECTL_NOTIFY_INTERRUPT))
-+		notify_ring(dev, &dev_priv->ring[RCS]);
-+	if (gt_iir & ILK_BSD_USER_INTERRUPT)
-+		notify_ring(dev, &dev_priv->ring[VCS]);
-+}
-+
- static void snb_gt_irq_handler(struct drm_device *dev,
- 			       struct drm_i915_private *dev_priv,
- 			       u32 gt_iir)
-@@ -1285,11 +1296,11 @@ static void ivb_display_irq_handler(struct drm_device *dev, u32 de_iir)
- 	}
- }
- 
--static irqreturn_t ivybridge_irq_handler(int irq, void *arg)
-+static irqreturn_t ironlake_irq_handler(int irq, void *arg)
- {
- 	struct drm_device *dev = (struct drm_device *) arg;
- 	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
--	u32 de_iir, gt_iir, de_ier, pm_iir, sde_ier = 0;
-+	u32 de_iir, gt_iir, de_ier, sde_ier = 0;
- 	irqreturn_t ret = IRQ_NONE;
- 
- 	atomic_inc(&dev_priv->irq_received);
-@@ -1329,27 +1340,34 @@ static irqreturn_t ivybridge_irq_handler(int irq, void *arg)
- 
- 	gt_iir = I915_READ(GTIIR);
- 	if (gt_iir) {
--		snb_gt_irq_handler(dev, dev_priv, gt_iir);
-+		if (IS_GEN5(dev))
-+			ilk_gt_irq_handler(dev, dev_priv, gt_iir);
-+		else
-+			snb_gt_irq_handler(dev, dev_priv, gt_iir);
- 		I915_WRITE(GTIIR, gt_iir);
- 		ret = IRQ_HANDLED;
- 	}
- 
- 	de_iir = I915_READ(DEIIR);
- 	if (de_iir) {
--		ivb_display_irq_handler(dev, de_iir);
--
-+		if (INTEL_INFO(dev)->gen >= 7)
-+			ivb_display_irq_handler(dev, de_iir);
-+		else
-+			ilk_display_irq_handler(dev, de_iir);
- 		I915_WRITE(DEIIR, de_iir);
- 		ret = IRQ_HANDLED;
- 	}
- 
--	pm_iir = I915_READ(GEN6_PMIIR);
--	if (pm_iir) {
--		if (IS_HASWELL(dev))
--			hsw_pm_irq_handler(dev_priv, pm_iir);
--		else if (pm_iir & GEN6_PM_RPS_EVENTS)
--			gen6_rps_irq_handler(dev_priv, pm_iir);
--		I915_WRITE(GEN6_PMIIR, pm_iir);
--		ret = IRQ_HANDLED;
-+	if (INTEL_INFO(dev)->gen >= 6) {
-+		u32 pm_iir = I915_READ(GEN6_PMIIR);
-+		if (pm_iir) {
-+			if (IS_HASWELL(dev))
-+				hsw_pm_irq_handler(dev_priv, pm_iir);
-+			else if (pm_iir & GEN6_PM_RPS_EVENTS)
-+				gen6_rps_irq_handler(dev_priv, pm_iir);
-+			I915_WRITE(GEN6_PMIIR, pm_iir);
-+			ret = IRQ_HANDLED;
-+		}
- 	}
- 
- 	if (IS_HASWELL(dev)) {
-@@ -1369,75 +1387,6 @@ static irqreturn_t ivybridge_irq_handler(int irq, void *arg)
- 	return ret;
- }
- 
--static void ilk_gt_irq_handler(struct drm_device *dev,
--			       struct drm_i915_private *dev_priv,
--			       u32 gt_iir)
--{
--	if (gt_iir &
--	    (GT_RENDER_USER_INTERRUPT | GT_RENDER_PIPECTL_NOTIFY_INTERRUPT))
--		notify_ring(dev, &dev_priv->ring[RCS]);
--	if (gt_iir & ILK_BSD_USER_INTERRUPT)
--		notify_ring(dev, &dev_priv->ring[VCS]);
--}
--
--static irqreturn_t ironlake_irq_handler(int irq, void *arg)
--{
--	struct drm_device *dev = (struct drm_device *) arg;
--	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
--	int ret = IRQ_NONE;
--	u32 de_iir, gt_iir, de_ier, sde_ier;
--
--	atomic_inc(&dev_priv->irq_received);
--
--	/* disable master interrupt before clearing iir  */
--	de_ier = I915_READ(DEIER);
--	I915_WRITE(DEIER, de_ier & ~DE_MASTER_IRQ_CONTROL);
--	POSTING_READ(DEIER);
--
--	/* Disable south interrupts. We'll only write to SDEIIR once, so further
--	 * interrupts will will be stored on its back queue, and then we'll be
--	 * able to process them after we restore SDEIER (as soon as we restore
--	 * it, we'll get an interrupt if SDEIIR still has something to process
--	 * due to its back queue). */
--	sde_ier = I915_READ(SDEIER);
--	I915_WRITE(SDEIER, 0);
--	POSTING_READ(SDEIER);
--
--	gt_iir = I915_READ(GTIIR);
--	if (gt_iir) {
--		if (IS_GEN5(dev))
--			ilk_gt_irq_handler(dev, dev_priv, gt_iir);
--		else
--			snb_gt_irq_handler(dev, dev_priv, gt_iir);
--		I915_WRITE(GTIIR, gt_iir);
--		ret = IRQ_HANDLED;
--	}
--
--	de_iir = I915_READ(DEIIR);
--	if (de_iir) {
--		ilk_display_irq_handler(dev, de_iir);
--		I915_WRITE(DEIIR, de_iir);
--		ret = IRQ_HANDLED;
--	}
--
--	if (IS_GEN6(dev)) {
--		u32 pm_iir = I915_READ(GEN6_PMIIR);
--		if (pm_iir) {
--			if (pm_iir & GEN6_PM_RPS_EVENTS)
--				gen6_rps_irq_handler(dev_priv, pm_iir);
--			I915_WRITE(GEN6_PMIIR, pm_iir);
--			ret = IRQ_HANDLED;
--		}
--	}
--
--	I915_WRITE(DEIER, de_ier);
--	POSTING_READ(DEIER);
--	I915_WRITE(SDEIER, sde_ier);
--	POSTING_READ(SDEIER);
--
--	return ret;
--}
--
- static void i915_error_wake_up(struct drm_i915_private *dev_priv,
- 			       bool reset_completed)
- {
-@@ -3164,7 +3113,7 @@ void intel_irq_init(struct drm_device *dev)
- 		dev_priv->display.hpd_irq_setup = i915_hpd_irq_setup;
- 	} else if (IS_IVYBRIDGE(dev) || IS_HASWELL(dev)) {
- 		/* Share uninstall handlers with ILK/SNB */
--		dev->driver->irq_handler = ivybridge_irq_handler;
-+		dev->driver->irq_handler = ironlake_irq_handler;
- 		dev->driver->irq_preinstall = ironlake_irq_preinstall;
- 		dev->driver->irq_postinstall = ivybridge_irq_postinstall;
- 		dev->driver->irq_uninstall = ironlake_irq_uninstall;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0505-drm-i915-kill-Ivybridge-vblank-irq-vfuncs.patch b/patches.baytrail/0505-drm-i915-kill-Ivybridge-vblank-irq-vfuncs.patch
deleted file mode 100644
index 16ab2cda08eb6..0000000000000
--- a/patches.baytrail/0505-drm-i915-kill-Ivybridge-vblank-irq-vfuncs.patch
+++ /dev/null
@@ -1,103 +0,0 @@
-From faf1b557b49c6bb294699ca765af752fefc6b207 Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Fri, 12 Jul 2013 20:00:08 -0300
-Subject: drm/i915: kill Ivybridge vblank irq vfuncs
-
-The IVB funtions are exactly the same as the ILK ones, with the
-exception of the bit register. So add IVB/HSW support to
-ironlake_enable_vblank and ironlake_disable_vblank, then kill the
-ivybridge functions.
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit b518421f5f91365a08ebe55497b32fe6d90ef4df)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c |   41 +++++++---------------------------------
- drivers/gpu/drm/i915/i915_reg.h |    3 ++
- 2 files changed, 11 insertions(+), 33 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -1704,29 +1704,14 @@ static int ironlake_enable_vblank(struct
- {
- 	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
- 	unsigned long irqflags;
-+	uint32_t bit = (INTEL_INFO(dev)->gen >= 7) ? DE_PIPE_VBLANK_IVB(pipe) :
-+						     DE_PIPE_VBLANK_ILK(pipe);
- 
- 	if (!i915_pipe_enabled(dev, pipe))
- 		return -EINVAL;
- 
- 	spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
--	ironlake_enable_display_irq(dev_priv, (pipe == 0) ?
--				    DE_PIPEA_VBLANK : DE_PIPEB_VBLANK);
--	spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
--
--	return 0;
--}
--
--static int ivybridge_enable_vblank(struct drm_device *dev, int pipe)
--{
--	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
--	unsigned long irqflags;
--
--	if (!i915_pipe_enabled(dev, pipe))
--		return -EINVAL;
--
--	spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
--	ironlake_enable_display_irq(dev_priv,
--				    DE_PIPEA_VBLANK_IVB << (5 * pipe));
-+	ironlake_enable_display_irq(dev_priv, bit);
- 	spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
- 
- 	return 0;
-@@ -1777,21 +1762,11 @@ static void ironlake_disable_vblank(stru
- {
- 	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
- 	unsigned long irqflags;
-+	uint32_t bit = (INTEL_INFO(dev)->gen >= 7) ? DE_PIPE_VBLANK_IVB(pipe) :
-+						     DE_PIPE_VBLANK_ILK(pipe);
- 
- 	spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
--	ironlake_disable_display_irq(dev_priv, (pipe == 0) ?
--				     DE_PIPEA_VBLANK : DE_PIPEB_VBLANK);
--	spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
--}
--
--static void ivybridge_disable_vblank(struct drm_device *dev, int pipe)
--{
--	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
--	unsigned long irqflags;
--
--	spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
--	ironlake_disable_display_irq(dev_priv,
--				     DE_PIPEA_VBLANK_IVB << (pipe * 5));
-+	ironlake_disable_display_irq(dev_priv, bit);
- 	spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
- }
- 
-@@ -3117,8 +3092,8 @@ void intel_irq_init(struct drm_device *d
- 		dev->driver->irq_preinstall = ironlake_irq_preinstall;
- 		dev->driver->irq_postinstall = ivybridge_irq_postinstall;
- 		dev->driver->irq_uninstall = ironlake_irq_uninstall;
--		dev->driver->enable_vblank = ivybridge_enable_vblank;
--		dev->driver->disable_vblank = ivybridge_disable_vblank;
-+		dev->driver->enable_vblank = ironlake_enable_vblank;
-+		dev->driver->disable_vblank = ironlake_disable_vblank;
- 		dev_priv->display.hpd_irq_setup = ibx_hpd_irq_setup;
- 	} else if (HAS_PCH_SPLIT(dev)) {
- 		dev->driver->irq_handler = ironlake_irq_handler;
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -3799,6 +3799,9 @@
- #define DE_PLANEA_FLIP_DONE_IVB		(1<<3)
- #define DE_PIPEA_VBLANK_IVB		(1<<0)
- 
-+#define DE_PIPE_VBLANK_ILK(pipe)	(1 << ((pipe * 8) + 7))
-+#define DE_PIPE_VBLANK_IVB(pipe)	(1 << (pipe * 5))
-+
- #define VLV_MASTER_IER			0x4400c /* Gunit master IER */
- #define   MASTER_INTERRUPT_ENABLE	(1<<31)
- 
diff --git a/patches.baytrail/0506-drm-i915-kill-ivybridge_irq_postinstall.patch b/patches.baytrail/0506-drm-i915-kill-ivybridge_irq_postinstall.patch
deleted file mode 100644
index aa0a166420038..0000000000000
--- a/patches.baytrail/0506-drm-i915-kill-ivybridge_irq_postinstall.patch
+++ /dev/null
@@ -1,126 +0,0 @@
-From fb2438fb26b7a7a833663f64df79cef5b97c455b Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Fri, 12 Jul 2013 20:01:56 -0300
-Subject: drm/i915: kill ivybridge_irq_postinstall
-
-It was very similar to ironlake_irq_postinstall, so IMHO merging both
-functions results in a code that is easier to maintain.
-
-With this change, all the irq handler vfuncs between ironlake and
-ivybridge are now unified.
-
-v2: Add "(" and ")" to make at least one vim user much happier (Chris)
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 8e76f8dc49f180b0e9d750426c99e37a7d6162ae)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 69 ++++++++++++-----------------------------
- 1 file changed, 20 insertions(+), 49 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index 31a13fdec7a7..ad92161b6974 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -2211,21 +2211,33 @@ static void gen5_gt_irq_postinstall(struct drm_device *dev)
- static int ironlake_irq_postinstall(struct drm_device *dev)
- {
- 	unsigned long irqflags;
--
- 	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
--	/* enable kind of interrupts always enabled */
--	u32 display_mask = DE_MASTER_IRQ_CONTROL | DE_GSE | DE_PCH_EVENT |
--			   DE_PLANEA_FLIP_DONE | DE_PLANEB_FLIP_DONE |
--			   DE_AUX_CHANNEL_A | DE_PIPEB_FIFO_UNDERRUN |
--			   DE_PIPEA_FIFO_UNDERRUN | DE_POISON;
-+	u32 display_mask, extra_mask;
-+
-+	if (INTEL_INFO(dev)->gen >= 7) {
-+		display_mask = (DE_MASTER_IRQ_CONTROL | DE_GSE_IVB |
-+				DE_PCH_EVENT_IVB | DE_PLANEC_FLIP_DONE_IVB |
-+				DE_PLANEB_FLIP_DONE_IVB |
-+				DE_PLANEA_FLIP_DONE_IVB | DE_AUX_CHANNEL_A_IVB |
-+				DE_ERR_INT_IVB);
-+		extra_mask = (DE_PIPEC_VBLANK_IVB | DE_PIPEB_VBLANK_IVB |
-+			      DE_PIPEA_VBLANK_IVB);
-+
-+		I915_WRITE(GEN7_ERR_INT, I915_READ(GEN7_ERR_INT));
-+	} else {
-+		display_mask = (DE_MASTER_IRQ_CONTROL | DE_GSE | DE_PCH_EVENT |
-+				DE_PLANEA_FLIP_DONE | DE_PLANEB_FLIP_DONE |
-+				DE_AUX_CHANNEL_A | DE_PIPEB_FIFO_UNDERRUN |
-+				DE_PIPEA_FIFO_UNDERRUN | DE_POISON);
-+		extra_mask = DE_PIPEA_VBLANK | DE_PIPEB_VBLANK | DE_PCU_EVENT;
-+	}
- 
- 	dev_priv->irq_mask = ~display_mask;
- 
- 	/* should always can generate irq */
- 	I915_WRITE(DEIIR, I915_READ(DEIIR));
- 	I915_WRITE(DEIMR, dev_priv->irq_mask);
--	I915_WRITE(DEIER, display_mask |
--			  DE_PIPEA_VBLANK | DE_PIPEB_VBLANK | DE_PCU_EVENT);
-+	I915_WRITE(DEIER, display_mask | extra_mask);
- 	POSTING_READ(DEIER);
- 
- 	gen5_gt_irq_postinstall(dev);
-@@ -2246,38 +2258,6 @@ static int ironlake_irq_postinstall(struct drm_device *dev)
- 	return 0;
- }
- 
--static int ivybridge_irq_postinstall(struct drm_device *dev)
--{
--	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
--	/* enable kind of interrupts always enabled */
--	u32 display_mask =
--		DE_MASTER_IRQ_CONTROL | DE_GSE_IVB | DE_PCH_EVENT_IVB |
--		DE_PLANEC_FLIP_DONE_IVB |
--		DE_PLANEB_FLIP_DONE_IVB |
--		DE_PLANEA_FLIP_DONE_IVB |
--		DE_AUX_CHANNEL_A_IVB |
--		DE_ERR_INT_IVB;
--
--	dev_priv->irq_mask = ~display_mask;
--
--	/* should always can generate irq */
--	I915_WRITE(GEN7_ERR_INT, I915_READ(GEN7_ERR_INT));
--	I915_WRITE(DEIIR, I915_READ(DEIIR));
--	I915_WRITE(DEIMR, dev_priv->irq_mask);
--	I915_WRITE(DEIER,
--		   display_mask |
--		   DE_PIPEC_VBLANK_IVB |
--		   DE_PIPEB_VBLANK_IVB |
--		   DE_PIPEA_VBLANK_IVB);
--	POSTING_READ(DEIER);
--
--	gen5_gt_irq_postinstall(dev);
--
--	ibx_irq_postinstall(dev);
--
--	return 0;
--}
--
- static int valleyview_irq_postinstall(struct drm_device *dev)
- {
- 	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
-@@ -3086,15 +3066,6 @@ void intel_irq_init(struct drm_device *dev)
- 		dev->driver->enable_vblank = valleyview_enable_vblank;
- 		dev->driver->disable_vblank = valleyview_disable_vblank;
- 		dev_priv->display.hpd_irq_setup = i915_hpd_irq_setup;
--	} else if (IS_IVYBRIDGE(dev) || IS_HASWELL(dev)) {
--		/* Share uninstall handlers with ILK/SNB */
--		dev->driver->irq_handler = ironlake_irq_handler;
--		dev->driver->irq_preinstall = ironlake_irq_preinstall;
--		dev->driver->irq_postinstall = ivybridge_irq_postinstall;
--		dev->driver->irq_uninstall = ironlake_irq_uninstall;
--		dev->driver->enable_vblank = ironlake_enable_vblank;
--		dev->driver->disable_vblank = ironlake_disable_vblank;
--		dev_priv->display.hpd_irq_setup = ibx_hpd_irq_setup;
- 	} else if (HAS_PCH_SPLIT(dev)) {
- 		dev->driver->irq_handler = ironlake_irq_handler;
- 		dev->driver->irq_preinstall = ironlake_irq_preinstall;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0507-drm-i915-Make-i915-events-part-of-uapi.patch b/patches.baytrail/0507-drm-i915-Make-i915-events-part-of-uapi.patch
deleted file mode 100644
index cb75c7f47847f..0000000000000
--- a/patches.baytrail/0507-drm-i915-Make-i915-events-part-of-uapi.patch
+++ /dev/null
@@ -1,91 +0,0 @@
-From d8e699c8d39f88f16b603d768a90c6d0ab13df03 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Fri, 19 Jul 2013 09:16:42 -0700
-Subject: drm/i915: Make i915 events part of uapi
-
-Make the uevent strings part of the user API for people who wish to
-write their own listeners.
-
-v2: Make a space in the string concatenation. (Chad)
-Use the "UEVENT" suffix intead of "EVENT" (Chad)
-Make kernel-doc parseable Docbook comments (Daniel)
-
-v3: Undid reset change introduced in last submission (Daniel)
-Fixed up comments to address removal changes.
-
-Thanks to Daniel Vetter for a majority of the parity error comments.
-
-CC: Chad Versace <chad.versace@linux.intel.com>
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit cce723ed091ac304d48386bcc3524994c345123e)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c |  8 ++++----
- include/uapi/drm/i915_drm.h     | 24 ++++++++++++++++++++++++
- 2 files changed, 28 insertions(+), 4 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index ad92161b6974..d9927f60a97e 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -812,7 +812,7 @@ static void ivybridge_parity_work(struct work_struct *work)
- 
- 	mutex_unlock(&dev_priv->dev->struct_mutex);
- 
--	parity_event[0] = "L3_PARITY_ERROR=1";
-+	parity_event[0] = I915_L3_PARITY_UEVENT "=1";
- 	parity_event[1] = kasprintf(GFP_KERNEL, "ROW=%d", row);
- 	parity_event[2] = kasprintf(GFP_KERNEL, "BANK=%d", bank);
- 	parity_event[3] = kasprintf(GFP_KERNEL, "SUBBANK=%d", subbank);
-@@ -1429,9 +1429,9 @@ static void i915_error_work_func(struct work_struct *work)
- 	drm_i915_private_t *dev_priv = container_of(error, drm_i915_private_t,
- 						    gpu_error);
- 	struct drm_device *dev = dev_priv->dev;
--	char *error_event[] = { "ERROR=1", NULL };
--	char *reset_event[] = { "RESET=1", NULL };
--	char *reset_done_event[] = { "ERROR=0", NULL };
-+	char *error_event[] = { I915_ERROR_UEVENT "=1", NULL };
-+	char *reset_event[] = { I915_RESET_UEVENT "=1", NULL };
-+	char *reset_done_event[] = { I915_ERROR_UEVENT "=0", NULL };
- 	int ret;
- 
- 	kobject_uevent_env(&dev->primary->kdev.kobj, KOBJ_CHANGE, error_event);
-diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
-index 923ed7fe5775..a1a7b6bd60d8 100644
---- a/include/uapi/drm/i915_drm.h
-+++ b/include/uapi/drm/i915_drm.h
-@@ -33,6 +33,30 @@
-  * subject to backwards-compatibility constraints.
-  */
- 
-+/**
-+ * DOC: uevents generated by i915 on it's device node
-+ *
-+ * I915_L3_PARITY_UEVENT - Generated when the driver receives a parity mismatch
-+ *	event from the gpu l3 cache. Additional information supplied is ROW,
-+ *	BANK, SUBBANK of the affected cacheline. Userspace should keep track of
-+ *	these events and if a specific cache-line seems to have a persistent
-+ *	error remap it with the l3 remapping tool supplied in intel-gpu-tools.
-+ *	The value supplied with the event is always 1.
-+ *
-+ * I915_ERROR_UEVENT - Generated upon error detection, currently only via
-+ *	hangcheck. The error detection event is a good indicator of when things
-+ *	began to go badly. The value supplied with the event is a 1 upon error
-+ *	detection, and a 0 upon reset completion, signifying no more error
-+ *	exists. NOTE: Disabling hangcheck or reset via module parameter will
-+ *	cause the related events to not be seen.
-+ *
-+ * I915_RESET_UEVENT - Event is generated just before an attempt to reset the
-+ *	the GPU. The value supplied with the event is always 1. NOTE: Disable
-+ *	reset via module parameter will cause this event to not be seen.
-+ */
-+#define I915_L3_PARITY_UEVENT		"L3_PARITY_ERROR"
-+#define I915_ERROR_UEVENT		"ERROR"
-+#define I915_RESET_UEVENT		"RESET"
- 
- /* Each region is a minimum of 16k, and there are at most 255 of them.
-  */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0508-drm-i915-invert-ilk-snb-_gt_irq_handler-check.patch b/patches.baytrail/0508-drm-i915-invert-ilk-snb-_gt_irq_handler-check.patch
deleted file mode 100644
index 7b0e1f926168d..0000000000000
--- a/patches.baytrail/0508-drm-i915-invert-ilk-snb-_gt_irq_handler-check.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From 1d67dbc32fa9cf6ebb1b096c5634bac52e11bc7a Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Fri, 19 Jul 2013 18:57:55 -0300
-Subject: drm/i915: invert {ilk, snb}_gt_irq_handler check
-
-Requested by Chris Wilson on IRC.
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit d8fc8a47105bc744000cec280269e1054921f8d6)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 6 +++---
- 1 file changed, 3 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index d9927f60a97e..52a43470e125 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -1340,10 +1340,10 @@ static irqreturn_t ironlake_irq_handler(int irq, void *arg)
- 
- 	gt_iir = I915_READ(GTIIR);
- 	if (gt_iir) {
--		if (IS_GEN5(dev))
--			ilk_gt_irq_handler(dev, dev_priv, gt_iir);
--		else
-+		if (INTEL_INFO(dev)->gen >= 6)
- 			snb_gt_irq_handler(dev, dev_priv, gt_iir);
-+		else
-+			ilk_gt_irq_handler(dev, dev_priv, gt_iir);
- 		I915_WRITE(GTIIR, gt_iir);
- 		ret = IRQ_HANDLED;
- 	}
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0509-drm-gem-simplify-object-initialization.patch b/patches.baytrail/0509-drm-gem-simplify-object-initialization.patch
deleted file mode 100644
index 25bd27d095541..0000000000000
--- a/patches.baytrail/0509-drm-gem-simplify-object-initialization.patch
+++ /dev/null
@@ -1,184 +0,0 @@
-From 831337c7d33d6d219086feba2b6687334f65db8e Mon Sep 17 00:00:00 2001
-From: David Herrmann <dh.herrmann@gmail.com>
-Date: Thu, 11 Jul 2013 11:56:32 +0200
-Subject: drm/gem: simplify object initialization
-
-drm_gem_object_init() and drm_gem_private_object_init() do exactly the
-same (except for shmem alloc) so make the first use the latter to reduce
-code duplication.
-
-Also drop the return code from drm_gem_private_object_init(). It seems
-unlikely that we will extend it any time soon so no reason to keep it
-around. This simplifies code paths in drivers, too.
-
-Last but not least, fix gma500 to call drm_gem_object_release() before
-freeing objects that were allocated via drm_gem_private_object_init().
-That isn't actually necessary for now, but might be in the future.
-
-Signed-off-by: David Herrmann <dh.herrmann@gmail.com>
-Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Reviewed-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-Acked-by: Rob Clark <robdclark@gmail.com>
-Signed-off-by: Dave Airlie <airlied@gmail.com>
-(cherry picked from commit 89c8233f82d9c8af5b20e72e4a185a38a7d3c50b)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_gem.c              | 20 ++++++++------------
- drivers/gpu/drm/gma500/framebuffer.c   |  6 ++----
- drivers/gpu/drm/gma500/gem.c           |  7 ++++---
- drivers/gpu/drm/i915/i915_gem_dmabuf.c |  7 +------
- drivers/gpu/drm/i915/i915_gem_stolen.c |  4 +---
- drivers/gpu/drm/omapdrm/omap_gem.c     |  3 ++-
- include/drm/drmP.h                     |  4 ++--
- 7 files changed, 20 insertions(+), 31 deletions(-)
-
-diff --git a/drivers/gpu/drm/drm_gem.c b/drivers/gpu/drm/drm_gem.c
-index 4e7407cb0ebc..fdd8248925b8 100644
---- a/drivers/gpu/drm/drm_gem.c
-+++ b/drivers/gpu/drm/drm_gem.c
-@@ -132,16 +132,14 @@ drm_gem_destroy(struct drm_device *dev)
- int drm_gem_object_init(struct drm_device *dev,
- 			struct drm_gem_object *obj, size_t size)
- {
--	BUG_ON((size & (PAGE_SIZE - 1)) != 0);
-+	struct file *filp;
- 
--	obj->dev = dev;
--	obj->filp = shmem_file_setup("drm mm object", size, VM_NORESERVE);
--	if (IS_ERR(obj->filp))
--		return PTR_ERR(obj->filp);
-+	filp = shmem_file_setup("drm mm object", size, VM_NORESERVE);
-+	if (IS_ERR(filp))
-+		return PTR_ERR(filp);
- 
--	kref_init(&obj->refcount);
--	atomic_set(&obj->handle_count, 0);
--	obj->size = size;
-+	drm_gem_private_object_init(dev, obj, size);
-+	obj->filp = filp;
- 
- 	return 0;
- }
-@@ -152,8 +150,8 @@ EXPORT_SYMBOL(drm_gem_object_init);
-  * no GEM provided backing store. Instead the caller is responsible for
-  * backing the object and handling it.
-  */
--int drm_gem_private_object_init(struct drm_device *dev,
--			struct drm_gem_object *obj, size_t size)
-+void drm_gem_private_object_init(struct drm_device *dev,
-+				 struct drm_gem_object *obj, size_t size)
- {
- 	BUG_ON((size & (PAGE_SIZE - 1)) != 0);
- 
-@@ -163,8 +161,6 @@ int drm_gem_private_object_init(struct drm_device *dev,
- 	kref_init(&obj->refcount);
- 	atomic_set(&obj->handle_count, 0);
- 	obj->size = size;
--
--	return 0;
- }
- EXPORT_SYMBOL(drm_gem_private_object_init);
- 
-diff --git a/drivers/gpu/drm/gma500/framebuffer.c b/drivers/gpu/drm/gma500/framebuffer.c
-index 8b1b6d923abe..362dd2ad286f 100644
---- a/drivers/gpu/drm/gma500/framebuffer.c
-+++ b/drivers/gpu/drm/gma500/framebuffer.c
-@@ -321,10 +321,8 @@ static struct gtt_range *psbfb_alloc(struct drm_device *dev, int aligned_size)
- 	/* Begin by trying to use stolen memory backing */
- 	backing = psb_gtt_alloc_range(dev, aligned_size, "fb", 1);
- 	if (backing) {
--		if (drm_gem_private_object_init(dev,
--					&backing->gem, aligned_size) == 0)
--			return backing;
--		psb_gtt_free_range(dev, backing);
-+		drm_gem_private_object_init(dev, &backing->gem, aligned_size);
-+		return backing;
- 	}
- 	return NULL;
- }
-diff --git a/drivers/gpu/drm/gma500/gem.c b/drivers/gpu/drm/gma500/gem.c
-index eefd6cc5b80d..fe1d3320ce6a 100644
---- a/drivers/gpu/drm/gma500/gem.c
-+++ b/drivers/gpu/drm/gma500/gem.c
-@@ -261,11 +261,12 @@ static int psb_gem_create_stolen(struct drm_file *file, struct drm_device *dev,
- 	struct gtt_range *gtt = psb_gtt_alloc_range(dev, size, "gem", 1);
- 	if (gtt == NULL)
- 		return -ENOMEM;
--	if (drm_gem_private_object_init(dev, &gtt->gem, size) != 0)
--		goto free_gtt;
-+
-+	drm_gem_private_object_init(dev, &gtt->gem, size);
- 	if (drm_gem_handle_create(file, &gtt->gem, handle) == 0)
- 		return 0;
--free_gtt:
-+
-+	drm_gem_object_release(&gtt->gem);
- 	psb_gtt_free_range(dev, gtt);
- 	return -ENOMEM;
- }
-diff --git a/drivers/gpu/drm/i915/i915_gem_dmabuf.c b/drivers/gpu/drm/i915/i915_gem_dmabuf.c
-index 9e6578330801..6ed7275d0900 100644
---- a/drivers/gpu/drm/i915/i915_gem_dmabuf.c
-+++ b/drivers/gpu/drm/i915/i915_gem_dmabuf.c
-@@ -297,12 +297,7 @@ struct drm_gem_object *i915_gem_prime_import(struct drm_device *dev,
- 		goto fail_detach;
- 	}
- 
--	ret = drm_gem_private_object_init(dev, &obj->base, dma_buf->size);
--	if (ret) {
--		i915_gem_object_free(obj);
--		goto fail_detach;
--	}
--
-+	drm_gem_private_object_init(dev, &obj->base, dma_buf->size);
- 	i915_gem_object_init(obj, &i915_gem_object_dmabuf_ops);
- 	obj->base.import_attach = attach;
- 
-diff --git a/drivers/gpu/drm/i915/i915_gem_stolen.c b/drivers/gpu/drm/i915/i915_gem_stolen.c
-index 27ffb4c865fa..977b3d91f4e0 100644
---- a/drivers/gpu/drm/i915/i915_gem_stolen.c
-+++ b/drivers/gpu/drm/i915/i915_gem_stolen.c
-@@ -291,9 +291,7 @@ _i915_gem_object_create_stolen(struct drm_device *dev,
- 	if (obj == NULL)
- 		return NULL;
- 
--	if (drm_gem_private_object_init(dev, &obj->base, stolen->size))
--		goto cleanup;
--
-+	drm_gem_private_object_init(dev, &obj->base, stolen->size);
- 	i915_gem_object_init(obj, &i915_gem_object_stolen_ops);
- 
- 	obj->pages = i915_pages_create_for_stolen(dev,
-diff --git a/drivers/gpu/drm/omapdrm/omap_gem.c b/drivers/gpu/drm/omapdrm/omap_gem.c
-index ebbdf4132e9c..cbcd71e6ed83 100644
---- a/drivers/gpu/drm/omapdrm/omap_gem.c
-+++ b/drivers/gpu/drm/omapdrm/omap_gem.c
-@@ -1427,8 +1427,9 @@ struct drm_gem_object *omap_gem_new(struct drm_device *dev,
- 		omap_obj->height = gsize.tiled.height;
- 	}
- 
-+	ret = 0;
- 	if (flags & (OMAP_BO_DMA|OMAP_BO_EXT_MEM))
--		ret = drm_gem_private_object_init(dev, obj, size);
-+		drm_gem_private_object_init(dev, obj, size);
- 	else
- 		ret = drm_gem_object_init(dev, obj, size);
- 
-diff --git a/include/drm/drmP.h b/include/drm/drmP.h
-index 63d17ee9eb48..8043e53374d9 100644
---- a/include/drm/drmP.h
-+++ b/include/drm/drmP.h
-@@ -1643,8 +1643,8 @@ struct drm_gem_object *drm_gem_object_alloc(struct drm_device *dev,
- 					    size_t size);
- int drm_gem_object_init(struct drm_device *dev,
- 			struct drm_gem_object *obj, size_t size);
--int drm_gem_private_object_init(struct drm_device *dev,
--			struct drm_gem_object *obj, size_t size);
-+void drm_gem_private_object_init(struct drm_device *dev,
-+				 struct drm_gem_object *obj, size_t size);
- void drm_gem_object_handle_free(struct drm_gem_object *obj);
- void drm_gem_vm_open(struct vm_area_struct *vma);
- void drm_gem_vm_close(struct vm_area_struct *vma);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0510-drm-i915-Add-some-debug-breadcrumbs-to-connector-det.patch b/patches.baytrail/0510-drm-i915-Add-some-debug-breadcrumbs-to-connector-det.patch
deleted file mode 100644
index 6b31df46bee1c..0000000000000
--- a/patches.baytrail/0510-drm-i915-Add-some-debug-breadcrumbs-to-connector-det.patch
+++ /dev/null
@@ -1,110 +0,0 @@
-From 8a0ef882a773379ea5b08464d0c8018dddfd3c69 Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Sat, 20 Jul 2013 20:27:08 +0100
-Subject: drm/i915: Add some debug breadcrumbs to connector detection
-
-Try to decypher detection failures is a little tricker at the moment as
-the only indicator of progress is when output_poll_execute() tells us
-the result after the connector->detect() has run. This patch adds a
-telltale to the start of each detect function so that we can track
-progress and associate activity more clearly with each connector.
-
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 164c8598450657d01fa75d6c997e95eb35672eef)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_crt.c  |    4 ++++
- drivers/gpu/drm/i915/intel_dp.c   |    3 +++
- drivers/gpu/drm/i915/intel_dvo.c  |    2 ++
- drivers/gpu/drm/i915/intel_hdmi.c |    3 +++
- drivers/gpu/drm/i915/intel_lvds.c |    3 +++
- drivers/gpu/drm/i915/intel_sdvo.c |    3 +++
- drivers/gpu/drm/i915/intel_tv.c   |    4 ++++
- 7 files changed, 22 insertions(+)
-
---- a/drivers/gpu/drm/i915/intel_crt.c
-+++ b/drivers/gpu/drm/i915/intel_crt.c
-@@ -613,6 +613,10 @@ intel_crt_detect(struct drm_connector *c
- 	enum drm_connector_status status;
- 	struct intel_load_detect_pipe tmp;
- 
-+	DRM_DEBUG_KMS("[CONNECTOR:%d:%s] force=%d\n",
-+		      connector->base.id, drm_get_connector_name(connector),
-+		      force);
-+
- 	if (I915_HAS_HOTPLUG(dev)) {
- 		/* We can not rely on the HPD pin always being correctly wired
- 		 * up, for example many KVM do not pass it through, and so
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -2847,6 +2847,9 @@ intel_dp_detect(struct drm_connector *co
- 	enum drm_connector_status status;
- 	struct edid *edid = NULL;
- 
-+	DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
-+		      connector->base.id, drm_get_connector_name(connector));
-+
- 	intel_dp->has_audio = false;
- 
- 	if (HAS_PCH_SPLIT(dev))
---- a/drivers/gpu/drm/i915/intel_dvo.c
-+++ b/drivers/gpu/drm/i915/intel_dvo.c
-@@ -332,6 +332,8 @@ static enum drm_connector_status
- intel_dvo_detect(struct drm_connector *connector, bool force)
- {
- 	struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
-+	DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
-+		      connector->base.id, drm_get_connector_name(connector));
- 	return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev);
- }
- 
---- a/drivers/gpu/drm/i915/intel_hdmi.c
-+++ b/drivers/gpu/drm/i915/intel_hdmi.c
-@@ -879,6 +879,9 @@ intel_hdmi_detect(struct drm_connector *
- 	struct edid *edid;
- 	enum drm_connector_status status = connector_status_disconnected;
- 
-+	DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
-+		      connector->base.id, drm_get_connector_name(connector));
-+
- 	intel_hdmi->has_hdmi_sink = false;
- 	intel_hdmi->has_audio = false;
- 	intel_hdmi->rgb_quant_range_selectable = false;
---- a/drivers/gpu/drm/i915/intel_lvds.c
-+++ b/drivers/gpu/drm/i915/intel_lvds.c
-@@ -343,6 +343,9 @@ intel_lvds_detect(struct drm_connector *
- 	struct drm_device *dev = connector->dev;
- 	enum drm_connector_status status;
- 
-+	DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
-+		      connector->base.id, drm_get_connector_name(connector));
-+
- 	status = intel_panel_detect(dev);
- 	if (status != connector_status_unknown)
- 		return status;
---- a/drivers/gpu/drm/i915/intel_sdvo.c
-+++ b/drivers/gpu/drm/i915/intel_sdvo.c
-@@ -1696,6 +1696,9 @@ intel_sdvo_detect(struct drm_connector *
- 	struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
- 	enum drm_connector_status ret;
- 
-+	DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
-+		      connector->base.id, drm_get_connector_name(connector));
-+
- 	if (!intel_sdvo_get_value(intel_sdvo,
- 				  SDVO_CMD_GET_ATTACHED_DISPLAYS,
- 				  &response, 2))
---- a/drivers/gpu/drm/i915/intel_tv.c
-+++ b/drivers/gpu/drm/i915/intel_tv.c
-@@ -1313,6 +1313,10 @@ intel_tv_detect(struct drm_connector *co
- 	struct intel_tv *intel_tv = intel_attached_tv(connector);
- 	int type;
- 
-+	DRM_DEBUG_KMS("[CONNECTOR:%d:%s] force=%d\n",
-+		      connector->base.id, drm_get_connector_name(connector),
-+		      force);
-+
- 	mode = reported_modes[0];
- 
- 	if (force) {
diff --git a/patches.baytrail/0511-drm-i915-fix-up-error-cleanup-in-i915_gem_object_bin.patch b/patches.baytrail/0511-drm-i915-fix-up-error-cleanup-in-i915_gem_object_bin.patch
deleted file mode 100644
index 7c6627a8294b9..0000000000000
--- a/patches.baytrail/0511-drm-i915-fix-up-error-cleanup-in-i915_gem_object_bin.patch
+++ /dev/null
@@ -1,80 +0,0 @@
-From 53c09e4ab5a802738c4716fe9c88f84452549687 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Mon, 22 Jul 2013 12:12:38 +0200
-Subject: drm/i915: fix up error cleanup in i915_gem_object_bind_to_gtt
-
-This has been broken in
-
-commit 2f63315692b1d3c055972ad33fc7168ae908b97b
-Author: Ben Widawsky <ben@bwidawsk.net>
-Date:   Wed Jul 17 12:19:03 2013 -0700
-
-    drm/i915: Create VMAs
-
-which resulted in an OOPS the first time around we've hit -ENOSPC.
-
-Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67156
-Cc: Imre Deak <imre.deak@intel.com>
-Cc: Ben Widawsky <ben@bwidawsk.net>
-Tested-by: meng <mengmeng.meng@intel.com>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit bc6bc15bd7d6bbe3dd2da65d1a81a6dec5d0fa94)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem.c | 14 ++++++++------
- 1 file changed, 8 insertions(+), 6 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index 37641c014e7a..6703fc35a0b9 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -3123,8 +3123,8 @@ i915_gem_object_bind_to_gtt(struct drm_i915_gem_object *obj,
- 
- 	vma = i915_gem_vma_create(obj, &dev_priv->gtt.base);
- 	if (IS_ERR(vma)) {
--		i915_gem_object_unpin_pages(obj);
--		return PTR_ERR(vma);
-+		ret = PTR_ERR(vma);
-+		goto err_unpin;
- 	}
- 
- search_free:
-@@ -3140,17 +3140,17 @@ search_free:
- 		if (ret == 0)
- 			goto search_free;
- 
--		goto err_out;
-+		goto err_free_vma;
- 	}
- 	if (WARN_ON(!i915_gem_valid_gtt_space(dev, &vma->node,
- 					      obj->cache_level))) {
- 		ret = -EINVAL;
--		goto err_out;
-+		goto err_remove_node;
- 	}
- 
- 	ret = i915_gem_gtt_prepare_object(obj);
- 	if (ret)
--		goto err_out;
-+		goto err_remove_node;
- 
- 	list_move_tail(&obj->global_list, &dev_priv->mm.bound_list);
- 	list_add_tail(&obj->mm_list, &vm->inactive_list);
-@@ -3169,9 +3169,11 @@ search_free:
- 	i915_gem_verify_gtt(dev);
- 	return 0;
- 
--err_out:
-+err_remove_node:
- 	drm_mm_remove_node(&vma->node);
-+err_free_vma:
- 	i915_gem_vma_destroy(vma);
-+err_unpin:
- 	i915_gem_object_unpin_pages(obj);
- 	return ret;
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0512-drm-i915-extend-lpt_enable_clkout_dp.patch b/patches.baytrail/0512-drm-i915-extend-lpt_enable_clkout_dp.patch
deleted file mode 100644
index 3a6167c3e0193..0000000000000
--- a/patches.baytrail/0512-drm-i915-extend-lpt_enable_clkout_dp.patch
+++ /dev/null
@@ -1,107 +0,0 @@
-From b95b1781aa152aa74d2051937a5216acde78ed92 Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Tue, 23 Jul 2013 11:19:24 -0300
-Subject: drm/i915: extend lpt_enable_clkout_dp
-
-Now it implements 3 different sequences from BSpec and also has
-support for ULT.
-
-v2: - Change IS_ULT checks for LPT-LP checks
-    - Add check for LPT-LP + with_fdi (Ben)
-    - Merge DBUFF0/GEN0 bit definitions since they're the same
-      register (Ben)
-    - DBUFF0 (1<<0) is Disable, not Enable
-
-Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 2fa86a1fea14c3019b2de16ea47e1a5363c60905)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_reg.h      |    3 +-
- drivers/gpu/drm/i915/intel_display.c |   45 ++++++++++++++++++++++++-----------
- 2 files changed, 33 insertions(+), 15 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -4954,7 +4954,8 @@
- #define  SBI_SSCAUXDIV6				0x0610
- #define   SBI_SSCAUXDIV_FINALDIV2SEL(x)		((x)<<4)
- #define  SBI_DBUFF0				0x2a00
--#define   SBI_DBUFF0_ENABLE			(1<<0)
-+#define  SBI_GEN0				0x1f00
-+#define   SBI_GEN0_CFG_BUFFENABLE_DISABLE	(1<<0)
- 
- /* LPT PIXCLK_GATE */
- #define PIXCLK_GATE			0xC6020
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -5260,11 +5260,23 @@ static void lpt_program_fdi_mphy(struct
- 	intel_sbi_write(dev_priv, 0x21EC, tmp, SBI_MPHY);
- }
- 
--/* Sequence to enable CLKOUT_DP for FDI usage and configure PCH FDI I/O. */
--static void lpt_enable_clkout_dp(struct drm_device *dev)
-+/* Implements 3 different sequences from BSpec chapter "Display iCLK
-+ * Programming" based on the parameters passed:
-+ * - Sequence to enable CLKOUT_DP
-+ * - Sequence to enable CLKOUT_DP without spread
-+ * - Sequence to enable CLKOUT_DP for FDI usage and configure PCH FDI I/O
-+ */
-+static void lpt_enable_clkout_dp(struct drm_device *dev, bool with_spread,
-+				 bool with_fdi)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
--	uint32_t tmp;
-+	uint32_t reg, tmp;
-+
-+	if (WARN(with_fdi && !with_spread, "FDI requires downspread\n"))
-+		with_spread = true;
-+	if (WARN(dev_priv->pch_id == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE &&
-+		 with_fdi, "LP PCH doesn't have FDI\n"))
-+		with_fdi = false;
- 
- 	mutex_lock(&dev_priv->dpio_lock);
- 
-@@ -5275,17 +5287,22 @@ static void lpt_enable_clkout_dp(struct
- 
- 	udelay(24);
- 
--	tmp = intel_sbi_read(dev_priv, SBI_SSCCTL, SBI_ICLK);
--	tmp &= ~SBI_SSCCTL_PATHALT;
--	intel_sbi_write(dev_priv, SBI_SSCCTL, tmp, SBI_ICLK);
--
--	lpt_reset_fdi_mphy(dev_priv);
--	lpt_program_fdi_mphy(dev_priv);
-+	if (with_spread) {
-+		tmp = intel_sbi_read(dev_priv, SBI_SSCCTL, SBI_ICLK);
-+		tmp &= ~SBI_SSCCTL_PATHALT;
-+		intel_sbi_write(dev_priv, SBI_SSCCTL, tmp, SBI_ICLK);
-+
-+		if (with_fdi) {
-+			lpt_reset_fdi_mphy(dev_priv);
-+			lpt_program_fdi_mphy(dev_priv);
-+		}
-+	}
- 
--	/* ULT uses SBI_GEN0, but ULT doesn't have VGA, so we don't care. */
--	tmp = intel_sbi_read(dev_priv, SBI_DBUFF0, SBI_ICLK);
--	tmp |= SBI_DBUFF0_ENABLE;
--	intel_sbi_write(dev_priv, SBI_DBUFF0, tmp, SBI_ICLK);
-+	reg = (dev_priv->pch_id == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE) ?
-+	       SBI_GEN0 : SBI_DBUFF0;
-+	tmp = intel_sbi_read(dev_priv, reg, SBI_ICLK);
-+	tmp |= SBI_GEN0_CFG_BUFFENABLE_DISABLE;
-+	intel_sbi_write(dev_priv, reg, tmp, SBI_ICLK);
- 
- 	mutex_unlock(&dev_priv->dpio_lock);
- }
-@@ -5307,7 +5324,7 @@ static void lpt_init_pch_refclk(struct d
- 	if (!has_vga)
- 		return;
- 
--	lpt_enable_clkout_dp(dev);
-+	lpt_enable_clkout_dp(dev, true, true);
- }
- 
- /*
diff --git a/patches.baytrail/0513-drm-i915-disable-CLKOUT_DP-when-it-s-not-needed.patch b/patches.baytrail/0513-drm-i915-disable-CLKOUT_DP-when-it-s-not-needed.patch
deleted file mode 100644
index af5efd0ccccd8..0000000000000
--- a/patches.baytrail/0513-drm-i915-disable-CLKOUT_DP-when-it-s-not-needed.patch
+++ /dev/null
@@ -1,78 +0,0 @@
-From c106ff43d2181472bd3214eddf01241195dc9909 Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Tue, 23 Jul 2013 11:19:25 -0300
-Subject: drm/i915: disable CLKOUT_DP when it's not needed
-
-We currently don't support HDMI clock bending nor use SSC for DP or
-HDMI on Haswell, so the only case where we need CLKOUT_DP is for VGA.
-
-v2: - Replace the IS_ULT check for LPT-LP
-    - Simplify GEN0/DBUFF0 check due to change on the previous patch
-    - Also check for SBI_SSCCTL_DISABLE (Ben).
-
-Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 47701c3ba26cb33ebe8a5e899ec922ab0de621a3)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 36 ++++++++++++++++++++++++++++++++----
- 1 file changed, 32 insertions(+), 4 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 216de8639c70..4da60eebdf96 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -5307,6 +5307,34 @@ static void lpt_enable_clkout_dp(struct drm_device *dev, bool with_spread,
- 	mutex_unlock(&dev_priv->dpio_lock);
- }
- 
-+/* Sequence to disable CLKOUT_DP */
-+static void lpt_disable_clkout_dp(struct drm_device *dev)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	uint32_t reg, tmp;
-+
-+	mutex_lock(&dev_priv->dpio_lock);
-+
-+	reg = (dev_priv->pch_id == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE) ?
-+	       SBI_GEN0 : SBI_DBUFF0;
-+	tmp = intel_sbi_read(dev_priv, reg, SBI_ICLK);
-+	tmp &= ~SBI_GEN0_CFG_BUFFENABLE_DISABLE;
-+	intel_sbi_write(dev_priv, reg, tmp, SBI_ICLK);
-+
-+	tmp = intel_sbi_read(dev_priv, SBI_SSCCTL, SBI_ICLK);
-+	if (!(tmp & SBI_SSCCTL_DISABLE)) {
-+		if (!(tmp & SBI_SSCCTL_PATHALT)) {
-+			tmp |= SBI_SSCCTL_PATHALT;
-+			intel_sbi_write(dev_priv, SBI_SSCCTL, tmp, SBI_ICLK);
-+			udelay(32);
-+		}
-+		tmp |= SBI_SSCCTL_DISABLE;
-+		intel_sbi_write(dev_priv, SBI_SSCCTL, tmp, SBI_ICLK);
-+	}
-+
-+	mutex_unlock(&dev_priv->dpio_lock);
-+}
-+
- static void lpt_init_pch_refclk(struct drm_device *dev)
- {
- 	struct drm_mode_config *mode_config = &dev->mode_config;
-@@ -5321,10 +5349,10 @@ static void lpt_init_pch_refclk(struct drm_device *dev)
- 		}
- 	}
- 
--	if (!has_vga)
--		return;
--
--	lpt_enable_clkout_dp(dev, true, true);
-+	if (has_vga)
-+		lpt_enable_clkout_dp(dev, true, true);
-+	else
-+		lpt_disable_clkout_dp(dev);
- }
- 
- /*
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0514-drm-i915-add-functions-to-disable-and-restore-LCPLL.patch b/patches.baytrail/0514-drm-i915-add-functions-to-disable-and-restore-LCPLL.patch
deleted file mode 100644
index e4229e52f047d..0000000000000
--- a/patches.baytrail/0514-drm-i915-add-functions-to-disable-and-restore-LCPLL.patch
+++ /dev/null
@@ -1,237 +0,0 @@
-From 0f1a41c7df58bb279ba6421d5c7e6f6ab8c5562b Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Tue, 23 Jul 2013 11:19:26 -0300
-Subject: drm/i915: add functions to disable and restore LCPLL
-
-For now there are no callers, but these functions are going to be
-needed for the code that allows Package C8+. Other future features may
-also require this code.
-
-Also merge the commit which introduced assert_can_disable_lcpll and
-had the following commit message:
-
-Most of the hardware needs to be disabled before LCPLL is disabled, so
-let's add a function to assert some of items listed in the "Display
-Sequences for LCPLL disabling" documentation.
-
-The idea is that hsw_disable_lcpll should not disable the hardware,
-the callers need to take care of calling hsw_disable_lcpll only once
-everything is already disabled.
-
-v2: - Rebase.
-    - Fix D_COMP wait timeout.
-v3: - Use wait_for_atomic_use (Ben)
-    - Remove/add a useless/needed POSTING_READ (Ben)
-    - Early return in case LCPLL is already restored (Ben)
-    - Add ndelay(100) (Ben)
-v4: - Merge the commit that added assert_can_disable_lcpll (Ben)
-    - Add interrupt assertions (Ben)
-
-Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-[danvet: Fix compile fail since there's no HAS_LP_PCH yet.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit be256dc70284c028d0dd828b18b8f804e310507b)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_reg.h      |   15 +++
- drivers/gpu/drm/i915/intel_display.c |  136 +++++++++++++++++++++++++++++++++++
- drivers/gpu/drm/i915/intel_drv.h     |    3 
- 3 files changed, 154 insertions(+)
-
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -2273,6 +2273,8 @@
- #define BLC_PWM_CPU_CTL2	0x48250
- #define BLC_PWM_CPU_CTL		0x48254
- 
-+#define HSW_BLC_PWM2_CTL	0x48350
-+
- /* PCH CTL1 is totally different, all but the below bits are reserved. CTL2 is
-  * like the normal CTL from gen4 and earlier. Hooray for confusing naming. */
- #define BLC_PWM_PCH_CTL1	0xc8250
-@@ -2281,6 +2283,12 @@
- #define   BLM_PCH_POLARITY			(1 << 29)
- #define BLC_PWM_PCH_CTL2	0xc8254
- 
-+#define UTIL_PIN_CTL		0x48400
-+#define   UTIL_PIN_ENABLE	(1 << 31)
-+
-+#define PCH_GTC_CTL		0xe7000
-+#define   PCH_GTC_ENABLE	(1 << 31)
-+
- /* TV port control */
- #define TV_CTL			0x68000
- /** Enables the TV encoder */
-@@ -5021,7 +5029,14 @@
- #define  LCPLL_CLK_FREQ_450		(0<<26)
- #define  LCPLL_CD_CLOCK_DISABLE		(1<<25)
- #define  LCPLL_CD2X_CLOCK_DISABLE	(1<<23)
-+#define  LCPLL_POWER_DOWN_ALLOW		(1<<22)
- #define  LCPLL_CD_SOURCE_FCLK		(1<<21)
-+#define  LCPLL_CD_SOURCE_FCLK_DONE	(1<<19)
-+
-+#define D_COMP				(MCHBAR_MIRROR_BASE_SNB + 0x5F0C)
-+#define  D_COMP_RCOMP_IN_PROGRESS	(1<<9)
-+#define  D_COMP_COMP_FORCE		(1<<8)
-+#define  D_COMP_COMP_DISABLE		(1<<0)
- 
- /* Pipe WM_LINETIME - watermark line time */
- #define PIPE_WM_LINETIME_A		0x45270
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -5922,6 +5922,142 @@ static bool ironlake_get_pipe_config(str
- 	return true;
- }
- 
-+static void assert_can_disable_lcpll(struct drm_i915_private *dev_priv)
-+{
-+	struct drm_device *dev = dev_priv->dev;
-+	struct intel_ddi_plls *plls = &dev_priv->ddi_plls;
-+	struct intel_crtc *crtc;
-+	unsigned long irqflags;
-+	uint32_t val, pch_hpd_mask;
-+
-+	pch_hpd_mask = SDE_PORTB_HOTPLUG_CPT | SDE_PORTC_HOTPLUG_CPT;
-+	if (!(dev_priv->pch_id == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE))
-+		pch_hpd_mask |= SDE_PORTD_HOTPLUG_CPT | SDE_CRT_HOTPLUG_CPT;
-+
-+	list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head)
-+		WARN(crtc->base.enabled, "CRTC for pipe %c enabled\n",
-+		     pipe_name(crtc->pipe));
-+
-+	WARN(I915_READ(HSW_PWR_WELL_DRIVER), "Power well on\n");
-+	WARN(plls->spll_refcount, "SPLL enabled\n");
-+	WARN(plls->wrpll1_refcount, "WRPLL1 enabled\n");
-+	WARN(plls->wrpll2_refcount, "WRPLL2 enabled\n");
-+	WARN(I915_READ(PCH_PP_STATUS) & PP_ON, "Panel power on\n");
-+	WARN(I915_READ(BLC_PWM_CPU_CTL2) & BLM_PWM_ENABLE,
-+	     "CPU PWM1 enabled\n");
-+	WARN(I915_READ(HSW_BLC_PWM2_CTL) & BLM_PWM_ENABLE,
-+	     "CPU PWM2 enabled\n");
-+	WARN(I915_READ(BLC_PWM_PCH_CTL1) & BLM_PCH_PWM_ENABLE,
-+	     "PCH PWM1 enabled\n");
-+	WARN(I915_READ(UTIL_PIN_CTL) & UTIL_PIN_ENABLE,
-+	     "Utility pin enabled\n");
-+	WARN(I915_READ(PCH_GTC_CTL) & PCH_GTC_ENABLE, "PCH GTC enabled\n");
-+
-+	spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
-+	val = I915_READ(DEIMR);
-+	WARN((val & ~DE_PCH_EVENT_IVB) != val,
-+	     "Unexpected DEIMR bits enabled: 0x%x\n", val);
-+	val = I915_READ(SDEIMR);
-+	WARN((val & ~pch_hpd_mask) != val,
-+	     "Unexpected SDEIMR bits enabled: 0x%x\n", val);
-+	spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
-+}
-+
-+/*
-+ * This function implements pieces of two sequences from BSpec:
-+ * - Sequence for display software to disable LCPLL
-+ * - Sequence for display software to allow package C8+
-+ * The steps implemented here are just the steps that actually touch the LCPLL
-+ * register. Callers should take care of disabling all the display engine
-+ * functions, doing the mode unset, fixing interrupts, etc.
-+ */
-+void hsw_disable_lcpll(struct drm_i915_private *dev_priv,
-+		       bool switch_to_fclk, bool allow_power_down)
-+{
-+	uint32_t val;
-+
-+	assert_can_disable_lcpll(dev_priv);
-+
-+	val = I915_READ(LCPLL_CTL);
-+
-+	if (switch_to_fclk) {
-+		val |= LCPLL_CD_SOURCE_FCLK;
-+		I915_WRITE(LCPLL_CTL, val);
-+
-+		if (wait_for_atomic_us(I915_READ(LCPLL_CTL) &
-+				       LCPLL_CD_SOURCE_FCLK_DONE, 1))
-+			DRM_ERROR("Switching to FCLK failed\n");
-+
-+		val = I915_READ(LCPLL_CTL);
-+	}
-+
-+	val |= LCPLL_PLL_DISABLE;
-+	I915_WRITE(LCPLL_CTL, val);
-+	POSTING_READ(LCPLL_CTL);
-+
-+	if (wait_for((I915_READ(LCPLL_CTL) & LCPLL_PLL_LOCK) == 0, 1))
-+		DRM_ERROR("LCPLL still locked\n");
-+
-+	val = I915_READ(D_COMP);
-+	val |= D_COMP_COMP_DISABLE;
-+	I915_WRITE(D_COMP, val);
-+	POSTING_READ(D_COMP);
-+	ndelay(100);
-+
-+	if (wait_for((I915_READ(D_COMP) & D_COMP_RCOMP_IN_PROGRESS) == 0, 1))
-+		DRM_ERROR("D_COMP RCOMP still in progress\n");
-+
-+	if (allow_power_down) {
-+		val = I915_READ(LCPLL_CTL);
-+		val |= LCPLL_POWER_DOWN_ALLOW;
-+		I915_WRITE(LCPLL_CTL, val);
-+		POSTING_READ(LCPLL_CTL);
-+	}
-+}
-+
-+/*
-+ * Fully restores LCPLL, disallowing power down and switching back to LCPLL
-+ * source.
-+ */
-+void hsw_restore_lcpll(struct drm_i915_private *dev_priv)
-+{
-+	uint32_t val;
-+
-+	val = I915_READ(LCPLL_CTL);
-+
-+	if ((val & (LCPLL_PLL_LOCK | LCPLL_PLL_DISABLE | LCPLL_CD_SOURCE_FCLK |
-+		    LCPLL_POWER_DOWN_ALLOW)) == LCPLL_PLL_LOCK)
-+		return;
-+
-+	if (val & LCPLL_POWER_DOWN_ALLOW) {
-+		val &= ~LCPLL_POWER_DOWN_ALLOW;
-+		I915_WRITE(LCPLL_CTL, val);
-+	}
-+
-+	val = I915_READ(D_COMP);
-+	val |= D_COMP_COMP_FORCE;
-+	val &= ~D_COMP_COMP_DISABLE;
-+	I915_WRITE(D_COMP, val);
-+	I915_READ(D_COMP);
-+
-+	val = I915_READ(LCPLL_CTL);
-+	val &= ~LCPLL_PLL_DISABLE;
-+	I915_WRITE(LCPLL_CTL, val);
-+
-+	if (wait_for(I915_READ(LCPLL_CTL) & LCPLL_PLL_LOCK, 5))
-+		DRM_ERROR("LCPLL not locked yet\n");
-+
-+	if (val & LCPLL_CD_SOURCE_FCLK) {
-+		val = I915_READ(LCPLL_CTL);
-+		val &= ~LCPLL_CD_SOURCE_FCLK;
-+		I915_WRITE(LCPLL_CTL, val);
-+
-+		if (wait_for_atomic_us((I915_READ(LCPLL_CTL) &
-+					LCPLL_CD_SOURCE_FCLK_DONE) == 0, 1))
-+			DRM_ERROR("Switching back to LCPLL failed\n");
-+	}
-+}
-+
- static void haswell_modeset_global_resources(struct drm_device *dev)
- {
- 	bool enable = false;
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -838,5 +838,8 @@ extern bool intel_set_pch_fifo_underrun_
- extern void intel_edp_psr_enable(struct intel_dp *intel_dp);
- extern void intel_edp_psr_disable(struct intel_dp *intel_dp);
- extern void intel_edp_psr_update(struct drm_device *dev);
-+extern void hsw_disable_lcpll(struct drm_i915_private *dev_priv,
-+			      bool switch_to_fclk, bool allow_power_down);
-+extern void hsw_restore_lcpll(struct drm_i915_private *dev_priv);
- 
- #endif /* __INTEL_DRV_H__ */
diff --git a/patches.baytrail/0515-drm-i915-disable-stolen-mem-for-OVERLAY_NEEDS_PHYSIC.patch b/patches.baytrail/0515-drm-i915-disable-stolen-mem-for-OVERLAY_NEEDS_PHYSIC.patch
deleted file mode 100644
index 5ff340deaf48e..0000000000000
--- a/patches.baytrail/0515-drm-i915-disable-stolen-mem-for-OVERLAY_NEEDS_PHYSIC.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From f9807e455d3b32ed6c661152de6974d0e171769d Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Tue, 23 Jul 2013 19:24:38 +0200
-Subject: drm/i915: disable stolen mem for OVERLAY_NEEDS_PHYSICAL
-
-Our phys_object code can't deal with stolen memory and so blows up.
-Fixing this is quite a bit of work and not worth it much for a single
-page object, so just opt-out.
-
-This is necessary prep work to enable stolen on gen2/3 platforms where
-the overlay register file isn't stored in the gtt.
-
-Cc: Chris Wilson <chris@chris-wilson.co.uk>
-Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit f63a484c2f606b8267eb4d1dbfce5d1d3416e0bb)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_overlay.c | 4 +++-
- 1 file changed, 3 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c
-index 2abb53e6f1e0..9ec5a4e12af2 100644
---- a/drivers/gpu/drm/i915/intel_overlay.c
-+++ b/drivers/gpu/drm/i915/intel_overlay.c
-@@ -1333,7 +1333,9 @@ void intel_setup_overlay(struct drm_device *dev)
- 
- 	overlay->dev = dev;
- 
--	reg_bo = i915_gem_object_create_stolen(dev, PAGE_SIZE);
-+	reg_bo = NULL;
-+	if (!OVERLAY_NEEDS_PHYSICAL(dev))
-+		reg_bo = i915_gem_object_create_stolen(dev, PAGE_SIZE);
- 	if (reg_bo == NULL)
- 		reg_bo = i915_gem_alloc_object(dev, PAGE_SIZE);
- 	if (reg_bo == NULL)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0516-drm-i915-Use-Graphics-Base-of-Stolen-Memory-on-all-g.patch b/patches.baytrail/0516-drm-i915-Use-Graphics-Base-of-Stolen-Memory-on-all-g.patch
deleted file mode 100644
index f373b0f0c89da..0000000000000
--- a/patches.baytrail/0516-drm-i915-Use-Graphics-Base-of-Stolen-Memory-on-all-g.patch
+++ /dev/null
@@ -1,89 +0,0 @@
-From 42d8eb1da8adc1eefac8d10f38a885f15d217e73 Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Thu, 4 Jul 2013 00:23:33 +0100
-Subject: drm/i915: Use Graphics Base of Stolen Memory on all gen3+
-
-So I made the mistake of missing that the desktop and mobile chipsets
-have different layouts in their PCI configurations, and we were
-incorrectly setting the wrong physical address for stolen memory on
-mobile chipsets.
-
-Since all gen3+ are actually consistent in the location of the GBSM
-register in the PCI configuration space on device 2 (the GPU), use it.
-
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
-[danvet: Drop cc: stable and fudge conflicts.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 17fec8a08698bcab98788e1e89f5b8e7502ababd)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem_stolen.c | 42 ++++++++++------------------------
- 1 file changed, 12 insertions(+), 30 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem_stolen.c b/drivers/gpu/drm/i915/i915_gem_stolen.c
-index 977b3d91f4e0..cacf769c95fd 100644
---- a/drivers/gpu/drm/i915/i915_gem_stolen.c
-+++ b/drivers/gpu/drm/i915/i915_gem_stolen.c
-@@ -45,45 +45,27 @@
- static unsigned long i915_stolen_to_physical(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
--	struct pci_dev *pdev = dev_priv->bridge_dev;
- 	struct resource *r;
- 	u32 base;
- 
--	/* On the machines I have tested the Graphics Base of Stolen Memory
--	 * is unreliable, so on those compute the base by subtracting the
--	 * stolen memory from the Top of Low Usable DRAM which is where the
--	 * BIOS places the graphics stolen memory.
-+	/* Almost universally we can find the Graphics Base of Stolen Memory
-+	 * at offset 0x5c in the igfx configuration space. On a few (desktop)
-+	 * machines this is also mirrored in the bridge device at different
-+	 * locations, or in the MCHBAR. On gen2, the layout is again slightly
-+	 * different with the Graphics Segment immediately following Top of
-+	 * Memory (or Top of Usable DRAM). Note it appears that TOUD is only
-+	 * reported by 865g, so we just use the top of memory as determined
-+	 * by the e820 probe.
- 	 *
--	 * On gen2, the layout is slightly different with the Graphics Segment
--	 * immediately following Top of Memory (or Top of Usable DRAM). Note
--	 * it appears that TOUD is only reported by 865g, so we just use the
--	 * top of memory as determined by the e820 probe.
--	 *
--	 * XXX gen2 requires an unavailable symbol and 945gm fails with
--	 * its value of TOLUD.
-+	 * XXX However gen2 requires an unavailable symbol.
- 	 */
- 	base = 0;
--	if (IS_VALLEYVIEW(dev)) {
-+	if (INTEL_INFO(dev)->gen >= 3) {
-+		/* Read Graphics Base of Stolen Memory directly */
- 		pci_read_config_dword(dev->pdev, 0x5c, &base);
- 		base &= ~((1<<20) - 1);
--	} else if (INTEL_INFO(dev)->gen >= 6) {
--		/* Read Base Data of Stolen Memory Register (BDSM) directly.
--		 * Note that there is also a MCHBAR miror at 0x1080c0 or
--		 * we could use device 2:0x5c instead.
--		*/
--		pci_read_config_dword(pdev, 0xB0, &base);
--		base &= ~4095; /* lower bits used for locking register */
--	} else if (INTEL_INFO(dev)->gen > 3 || IS_G33(dev)) {
--		/* Read Graphics Base of Stolen Memory directly */
--		pci_read_config_dword(pdev, 0xA4, &base);
-+	} else { /* GEN2 */
- #if 0
--	} else if (IS_GEN3(dev)) {
--		u8 val;
--		/* Stolen is immediately below Top of Low Usable DRAM */
--		pci_read_config_byte(pdev, 0x9c, &val);
--		base = val >> 3 << 27;
--		base -= dev_priv->mm.gtt->stolen_size;
--	} else {
- 		/* Stolen is immediately above Top of Memory */
- 		base = max_low_pfn_mapped << PAGE_SHIFT;
- #endif
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0517-drm-i915-fix-reference-counting-in-i915_gem_create.patch b/patches.baytrail/0517-drm-i915-fix-reference-counting-in-i915_gem_create.patch
deleted file mode 100644
index 331152236af13..0000000000000
--- a/patches.baytrail/0517-drm-i915-fix-reference-counting-in-i915_gem_create.patch
+++ /dev/null
@@ -1,70 +0,0 @@
-From ab7bc74d70e58ff6f07227bf0e5b605bc71a19b4 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Wed, 24 Jul 2013 23:25:03 +0200
-Subject: drm/i915: fix reference counting in i915_gem_create
-
-This function is called without the dev->struct_mutex held, hence we
-need to use the _unlocked unreference variants.
-
-As soon as the object is registered userspace can sneak in here with a
-gem_close ioctl call, so the object can (and with my new evil tests
-actually does) get the final unreference in this place. The lack of
-locking then results in hilarity and some good leakage.
-
-To fix this we simply need to revert
-
-Chris Wilson <chris@chris-wilson.co.uk>
-
-v2: We need to make the trace call _before_ we drop our ref - the
-object might very well be gone by then already.
-
-v3: Just revert the original patch as suggested by Chris Wilson.
-
-Cc: Chris Wilson <chris@chris-wilson.co.uk>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-[danvet: Remove the added white line again to tighten the return
-block, requested by Chris.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit d861e3387650296f1fca2a4dd0dcd380c8fdddad)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem.c | 14 +++++---------
- 1 file changed, 5 insertions(+), 9 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index 6703fc35a0b9..050eb9b92595 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -219,16 +219,10 @@ i915_gem_create(struct drm_file *file,
- 		return -ENOMEM;
- 
- 	ret = drm_gem_handle_create(file, &obj->base, &handle);
--	if (ret) {
--		drm_gem_object_release(&obj->base);
--		i915_gem_info_remove_obj(dev->dev_private, obj->base.size);
--		i915_gem_object_free(obj);
--		return ret;
--	}
--
- 	/* drop reference from allocate - handle holds it now */
--	drm_gem_object_unreference(&obj->base);
--	trace_i915_gem_object_create(obj);
-+	drm_gem_object_unreference_unlocked(&obj->base);
-+	if (ret)
-+		return ret;
- 
- 	*handle_p = handle;
- 	return 0;
-@@ -3942,6 +3936,8 @@ struct drm_i915_gem_object *i915_gem_alloc_object(struct drm_device *dev,
- 	} else
- 		obj->cache_level = I915_CACHE_NONE;
- 
-+	trace_i915_gem_object_create(obj);
-+
- 	return obj;
- }
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0518-drm-gem-Split-drm_gem_mmap-into-object-search-and-ob.patch b/patches.baytrail/0518-drm-gem-Split-drm_gem_mmap-into-object-search-and-ob.patch
deleted file mode 100644
index 18af07238baf0..0000000000000
--- a/patches.baytrail/0518-drm-gem-Split-drm_gem_mmap-into-object-search-and-ob.patch
+++ /dev/null
@@ -1,151 +0,0 @@
-From 2d6a5bc564be3b4a255d5448e69520526b80f13b Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 16 Apr 2013 14:14:52 +0200
-Subject: drm/gem: Split drm_gem_mmap() into object search and object mapping
-
-The drm_gem_mmap() function first finds the GEM object to be mapped
-based on the fake mmap offset and then maps the object. Split the object
-mapping code into a standalone drm_gem_mmap_obj() function that can be
-used to implement dma-buf mmap() operations.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Reviewed-by: Rob Clark <robdclark@gmail.com>
-(cherry picked from commit 1c5aafa6eee2d5712f774676d407e5ab6dae9a1b)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_gem.c | 83 +++++++++++++++++++++++++++++------------------
- include/drm/drmP.h        |  2 ++
- 2 files changed, 54 insertions(+), 31 deletions(-)
-
-diff --git a/drivers/gpu/drm/drm_gem.c b/drivers/gpu/drm/drm_gem.c
-index fdd8248925b8..df6c89ec27ec 100644
---- a/drivers/gpu/drm/drm_gem.c
-+++ b/drivers/gpu/drm/drm_gem.c
-@@ -632,6 +632,55 @@ void drm_gem_vm_close(struct vm_area_struct *vma)
- }
- EXPORT_SYMBOL(drm_gem_vm_close);
- 
-+/**
-+ * drm_gem_mmap_obj - memory map a GEM object
-+ * @obj: the GEM object to map
-+ * @obj_size: the object size to be mapped, in bytes
-+ * @vma: VMA for the area to be mapped
-+ *
-+ * Set up the VMA to prepare mapping of the GEM object using the gem_vm_ops
-+ * provided by the driver. Depending on their requirements, drivers can either
-+ * provide a fault handler in their gem_vm_ops (in which case any accesses to
-+ * the object will be trapped, to perform migration, GTT binding, surface
-+ * register allocation, or performance monitoring), or mmap the buffer memory
-+ * synchronously after calling drm_gem_mmap_obj.
-+ *
-+ * This function is mainly intended to implement the DMABUF mmap operation, when
-+ * the GEM object is not looked up based on its fake offset. To implement the
-+ * DRM mmap operation, drivers should use the drm_gem_mmap() function.
-+ *
-+ * Return 0 or success or -EINVAL if the object size is smaller than the VMA
-+ * size, or if no gem_vm_ops are provided.
-+ */
-+int drm_gem_mmap_obj(struct drm_gem_object *obj, unsigned long obj_size,
-+		     struct vm_area_struct *vma)
-+{
-+	struct drm_device *dev = obj->dev;
-+
-+	/* Check for valid size. */
-+	if (obj_size < vma->vm_end - vma->vm_start)
-+		return -EINVAL;
-+
-+	if (!dev->driver->gem_vm_ops)
-+		return -EINVAL;
-+
-+	vma->vm_flags |= VM_IO | VM_PFNMAP | VM_DONTEXPAND | VM_DONTDUMP;
-+	vma->vm_ops = dev->driver->gem_vm_ops;
-+	vma->vm_private_data = obj;
-+	vma->vm_page_prot =  pgprot_writecombine(vm_get_page_prot(vma->vm_flags));
-+
-+	/* Take a ref for this mapping of the object, so that the fault
-+	 * handler can dereference the mmap offset's pointer to the object.
-+	 * This reference is cleaned up by the corresponding vm_close
-+	 * (which should happen whether the vma was created by this call, or
-+	 * by a vm_open due to mremap or partial unmap or whatever).
-+	 */
-+	drm_gem_object_reference(obj);
-+
-+	drm_vm_open_locked(dev, vma);
-+	return 0;
-+}
-+EXPORT_SYMBOL(drm_gem_mmap_obj);
- 
- /**
-  * drm_gem_mmap - memory map routine for GEM objects
-@@ -641,11 +690,9 @@ EXPORT_SYMBOL(drm_gem_vm_close);
-  * If a driver supports GEM object mapping, mmap calls on the DRM file
-  * descriptor will end up here.
-  *
-- * If we find the object based on the offset passed in (vma->vm_pgoff will
-+ * Look up the GEM object based on the offset passed in (vma->vm_pgoff will
-  * contain the fake offset we created when the GTT map ioctl was called on
-- * the object), we set up the driver fault handler so that any accesses
-- * to the object can be trapped, to perform migration, GTT binding, surface
-- * register allocation, or performance monitoring.
-+ * the object) and map it with a call to drm_gem_mmap_obj().
-  */
- int drm_gem_mmap(struct file *filp, struct vm_area_struct *vma)
- {
-@@ -653,7 +700,6 @@ int drm_gem_mmap(struct file *filp, struct vm_area_struct *vma)
- 	struct drm_device *dev = priv->minor->dev;
- 	struct drm_gem_mm *mm = dev->mm_private;
- 	struct drm_local_map *map = NULL;
--	struct drm_gem_object *obj;
- 	struct drm_hash_item *hash;
- 	int ret = 0;
- 
-@@ -674,32 +720,7 @@ int drm_gem_mmap(struct file *filp, struct vm_area_struct *vma)
- 		goto out_unlock;
- 	}
- 
--	/* Check for valid size. */
--	if (map->size < vma->vm_end - vma->vm_start) {
--		ret = -EINVAL;
--		goto out_unlock;
--	}
--
--	obj = map->handle;
--	if (!obj->dev->driver->gem_vm_ops) {
--		ret = -EINVAL;
--		goto out_unlock;
--	}
--
--	vma->vm_flags |= VM_IO | VM_PFNMAP | VM_DONTEXPAND | VM_DONTDUMP;
--	vma->vm_ops = obj->dev->driver->gem_vm_ops;
--	vma->vm_private_data = map->handle;
--	vma->vm_page_prot =  pgprot_writecombine(vm_get_page_prot(vma->vm_flags));
--
--	/* Take a ref for this mapping of the object, so that the fault
--	 * handler can dereference the mmap offset's pointer to the object.
--	 * This reference is cleaned up by the corresponding vm_close
--	 * (which should happen whether the vma was created by this call, or
--	 * by a vm_open due to mremap or partial unmap or whatever).
--	 */
--	drm_gem_object_reference(obj);
--
--	drm_vm_open_locked(dev, vma);
-+	ret = drm_gem_mmap_obj(map->handle, map->size, vma);
- 
- out_unlock:
- 	mutex_unlock(&dev->struct_mutex);
-diff --git a/include/drm/drmP.h b/include/drm/drmP.h
-index 8043e53374d9..5ff88ad7b23c 100644
---- a/include/drm/drmP.h
-+++ b/include/drm/drmP.h
-@@ -1648,6 +1648,8 @@ void drm_gem_private_object_init(struct drm_device *dev,
- void drm_gem_object_handle_free(struct drm_gem_object *obj);
- void drm_gem_vm_open(struct vm_area_struct *vma);
- void drm_gem_vm_close(struct vm_area_struct *vma);
-+int drm_gem_mmap_obj(struct drm_gem_object *obj, unsigned long obj_size,
-+		     struct vm_area_struct *vma);
- int drm_gem_mmap(struct file *filp, struct vm_area_struct *vma);
- 
- #include <drm/drm_global.h>
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0519-drm-add-unified-vma-offset-manager.patch b/patches.baytrail/0519-drm-add-unified-vma-offset-manager.patch
deleted file mode 100644
index 82c7779be6e40..0000000000000
--- a/patches.baytrail/0519-drm-add-unified-vma-offset-manager.patch
+++ /dev/null
@@ -1,588 +0,0 @@
-From 8cd816e0319f1a1263e882a8f74ba33161fd9e06 Mon Sep 17 00:00:00 2001
-From: David Herrmann <dh.herrmann@gmail.com>
-Date: Wed, 24 Jul 2013 21:06:15 +0200
-Subject: drm: add unified vma offset manager
-
-If we want to map GPU memory into user-space, we need to linearize the
-addresses to not confuse mm-core. Currently, GEM and TTM both implement
-their own offset-managers to assign a pgoff to each object for user-space
-CPU access. GEM uses a hash-table, TTM uses an rbtree.
-
-This patch provides a unified implementation that can be used to replace
-both. TTM allows partial mmaps with a given offset, so we cannot use
-hashtables as the start address may not be known at mmap time. Hence, we
-use the rbtree-implementation of TTM.
-
-We could easily update drm_mm to use an rbtree instead of a linked list
-for it's object list and thus drop the rbtree from the vma-manager.
-However, this would slow down drm_mm object allocation for all other
-use-cases (rbtree insertion) and add another 4-8 bytes to each mm node.
-Hence, use the separate tree but allow for later migration.
-
-This is a rewrite of the 2012-proposal by David Airlie <airlied@linux.ie>
-
-v2:
- - fix Docbook integration
- - drop drm_mm_node_linked() and use drm_mm_node_allocated()
- - remove unjustified likely/unlikely usage (but keep for rbtree paths)
- - remove BUG_ON() as drm_mm already does that
- - clarify page-based vs. byte-based addresses
- - use drm_vma_node_reset() for initialization, too
-v4:
- - allow external locking via drm_vma_offset_un/lock_lookup()
- - add locked lookup helper drm_vma_offset_lookup_locked()
-v5:
- - fix drm_vma_offset_lookup() to correctly validate range-mismatches
-   (fix (offset > start + pages))
- - fix drm_vma_offset_exact_lookup() to actually do what it says
- - remove redundant vm_pages member (add drm_vma_node_size() helper)
- - remove unneeded goto
- - fix documentation
-
-Signed-off-by: David Herrmann <dh.herrmann@gmail.com>
-Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Signed-off-by: Dave Airlie <airlied@gmail.com>
-(cherry picked from commit fe3078fa5c367186c94a6652581ffbe9ccea4640)
-Signed-off-by: James Ausmus <james.ausmus@intel.com>
-
-Conflicts:
-	Documentation/DocBook/drm.tmpl
-	(context changes)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- Documentation/DocBook/drm.tmpl    |   6 +
- drivers/gpu/drm/Makefile          |   2 +-
- drivers/gpu/drm/drm_vma_manager.c | 281 ++++++++++++++++++++++++++++++++++++++
- include/drm/drm_vma_manager.h     | 202 +++++++++++++++++++++++++++
- 4 files changed, 490 insertions(+), 1 deletion(-)
- create mode 100644 drivers/gpu/drm/drm_vma_manager.c
- create mode 100644 include/drm/drm_vma_manager.h
-
-diff --git a/Documentation/DocBook/drm.tmpl b/Documentation/DocBook/drm.tmpl
-index 7c7af25b330c..ba664d7c5a89 100644
---- a/Documentation/DocBook/drm.tmpl
-+++ b/Documentation/DocBook/drm.tmpl
-@@ -2163,6 +2163,12 @@ void intel_crt_init(struct drm_device *dev)
-       <title>EDID Helper Functions Reference</title>
- !Edrivers/gpu/drm/drm_edid.c
-     </sect2>
-+    <sect2>
-+      <title>VMA Offset Manager</title>
-+!Pdrivers/gpu/drm/drm_vma_manager.c vma offset manager
-+!Edrivers/gpu/drm/drm_vma_manager.c
-+!Iinclude/drm/drm_vma_manager.h
-+    </sect2>
-   </sect1>
- 
-   <!-- Internals: vertical blanking -->
-diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
-index 1ecbe5b7312d..d7115ad6f20d 100644
---- a/drivers/gpu/drm/Makefile
-+++ b/drivers/gpu/drm/Makefile
-@@ -13,7 +13,7 @@ drm-y       :=	drm_auth.o drm_buffer.o drm_bufs.o drm_cache.o \
- 		drm_crtc.o drm_modes.o drm_edid.o \
- 		drm_info.o drm_debugfs.o drm_encoder_slave.o \
- 		drm_trace_points.o drm_global.o drm_prime.o \
--		drm_rect.o
-+		drm_rect.o drm_vma_manager.o
- 
- drm-$(CONFIG_COMPAT) += drm_ioc32.o
- drm-$(CONFIG_DRM_GEM_CMA_HELPER) += drm_gem_cma_helper.o
-diff --git a/drivers/gpu/drm/drm_vma_manager.c b/drivers/gpu/drm/drm_vma_manager.c
-new file mode 100644
-index 000000000000..b966cea95f11
---- /dev/null
-+++ b/drivers/gpu/drm/drm_vma_manager.c
-@@ -0,0 +1,281 @@
-+/*
-+ * Copyright (c) 2006-2009 VMware, Inc., Palo Alto, CA., USA
-+ * Copyright (c) 2012 David Airlie <airlied@linux.ie>
-+ * Copyright (c) 2013 David Herrmann <dh.herrmann@gmail.com>
-+ *
-+ * Permission is hereby granted, free of charge, to any person obtaining a
-+ * copy of this software and associated documentation files (the "Software"),
-+ * to deal in the Software without restriction, including without limitation
-+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
-+ * and/or sell copies of the Software, and to permit persons to whom the
-+ * Software is furnished to do so, subject to the following conditions:
-+ *
-+ * The above copyright notice and this permission notice shall be included in
-+ * all copies or substantial portions of the Software.
-+ *
-+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
-+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
-+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
-+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
-+ * OTHER DEALINGS IN THE SOFTWARE.
-+ */
-+
-+#include <drm/drmP.h>
-+#include <drm/drm_mm.h>
-+#include <drm/drm_vma_manager.h>
-+#include <linux/mm.h>
-+#include <linux/module.h>
-+#include <linux/rbtree.h>
-+#include <linux/slab.h>
-+#include <linux/spinlock.h>
-+#include <linux/types.h>
-+
-+/**
-+ * DOC: vma offset manager
-+ *
-+ * The vma-manager is responsible to map arbitrary driver-dependent memory
-+ * regions into the linear user address-space. It provides offsets to the
-+ * caller which can then be used on the address_space of the drm-device. It
-+ * takes care to not overlap regions, size them appropriately and to not
-+ * confuse mm-core by inconsistent fake vm_pgoff fields.
-+ * Drivers shouldn't use this for object placement in VMEM. This manager should
-+ * only be used to manage mappings into linear user-space VMs.
-+ *
-+ * We use drm_mm as backend to manage object allocations. But it is highly
-+ * optimized for alloc/free calls, not lookups. Hence, we use an rb-tree to
-+ * speed up offset lookups.
-+ *
-+ * You must not use multiple offset managers on a single address_space.
-+ * Otherwise, mm-core will be unable to tear down memory mappings as the VM will
-+ * no longer be linear. Please use VM_NONLINEAR in that case and implement your
-+ * own offset managers.
-+ *
-+ * This offset manager works on page-based addresses. That is, every argument
-+ * and return code (with the exception of drm_vma_node_offset_addr()) is given
-+ * in number of pages, not number of bytes. That means, object sizes and offsets
-+ * must always be page-aligned (as usual).
-+ * If you want to get a valid byte-based user-space address for a given offset,
-+ * please see drm_vma_node_offset_addr().
-+ */
-+
-+/**
-+ * drm_vma_offset_manager_init - Initialize new offset-manager
-+ * @mgr: Manager object
-+ * @page_offset: Offset of available memory area (page-based)
-+ * @size: Size of available address space range (page-based)
-+ *
-+ * Initialize a new offset-manager. The offset and area size available for the
-+ * manager are given as @page_offset and @size. Both are interpreted as
-+ * page-numbers, not bytes.
-+ *
-+ * Adding/removing nodes from the manager is locked internally and protected
-+ * against concurrent access. However, node allocation and destruction is left
-+ * for the caller. While calling into the vma-manager, a given node must
-+ * always be guaranteed to be referenced.
-+ */
-+void drm_vma_offset_manager_init(struct drm_vma_offset_manager *mgr,
-+				 unsigned long page_offset, unsigned long size)
-+{
-+	rwlock_init(&mgr->vm_lock);
-+	mgr->vm_addr_space_rb = RB_ROOT;
-+	drm_mm_init(&mgr->vm_addr_space_mm, page_offset, size);
-+}
-+EXPORT_SYMBOL(drm_vma_offset_manager_init);
-+
-+/**
-+ * drm_vma_offset_manager_destroy() - Destroy offset manager
-+ * @mgr: Manager object
-+ *
-+ * Destroy an object manager which was previously created via
-+ * drm_vma_offset_manager_init(). The caller must remove all allocated nodes
-+ * before destroying the manager. Otherwise, drm_mm will refuse to free the
-+ * requested resources.
-+ *
-+ * The manager must not be accessed after this function is called.
-+ */
-+void drm_vma_offset_manager_destroy(struct drm_vma_offset_manager *mgr)
-+{
-+	/* take the lock to protect against buggy drivers */
-+	write_lock(&mgr->vm_lock);
-+	drm_mm_takedown(&mgr->vm_addr_space_mm);
-+	write_unlock(&mgr->vm_lock);
-+}
-+EXPORT_SYMBOL(drm_vma_offset_manager_destroy);
-+
-+/**
-+ * drm_vma_offset_lookup() - Find node in offset space
-+ * @mgr: Manager object
-+ * @start: Start address for object (page-based)
-+ * @pages: Size of object (page-based)
-+ *
-+ * Find a node given a start address and object size. This returns the _best_
-+ * match for the given node. That is, @start may point somewhere into a valid
-+ * region and the given node will be returned, as long as the node spans the
-+ * whole requested area (given the size in number of pages as @pages).
-+ *
-+ * RETURNS:
-+ * Returns NULL if no suitable node can be found. Otherwise, the best match
-+ * is returned. It's the caller's responsibility to make sure the node doesn't
-+ * get destroyed before the caller can access it.
-+ */
-+struct drm_vma_offset_node *drm_vma_offset_lookup(struct drm_vma_offset_manager *mgr,
-+						  unsigned long start,
-+						  unsigned long pages)
-+{
-+	struct drm_vma_offset_node *node;
-+
-+	read_lock(&mgr->vm_lock);
-+	node = drm_vma_offset_lookup_locked(mgr, start, pages);
-+	read_unlock(&mgr->vm_lock);
-+
-+	return node;
-+}
-+EXPORT_SYMBOL(drm_vma_offset_lookup);
-+
-+/**
-+ * drm_vma_offset_lookup_locked() - Find node in offset space
-+ * @mgr: Manager object
-+ * @start: Start address for object (page-based)
-+ * @pages: Size of object (page-based)
-+ *
-+ * Same as drm_vma_offset_lookup() but requires the caller to lock offset lookup
-+ * manually. See drm_vma_offset_lock_lookup() for an example.
-+ *
-+ * RETURNS:
-+ * Returns NULL if no suitable node can be found. Otherwise, the best match
-+ * is returned.
-+ */
-+struct drm_vma_offset_node *drm_vma_offset_lookup_locked(struct drm_vma_offset_manager *mgr,
-+							 unsigned long start,
-+							 unsigned long pages)
-+{
-+	struct drm_vma_offset_node *node, *best;
-+	struct rb_node *iter;
-+	unsigned long offset;
-+
-+	iter = mgr->vm_addr_space_rb.rb_node;
-+	best = NULL;
-+
-+	while (likely(iter)) {
-+		node = rb_entry(iter, struct drm_vma_offset_node, vm_rb);
-+		offset = node->vm_node.start;
-+		if (start >= offset) {
-+			iter = iter->rb_right;
-+			best = node;
-+			if (start == offset)
-+				break;
-+		} else {
-+			iter = iter->rb_left;
-+		}
-+	}
-+
-+	/* verify that the node spans the requested area */
-+	if (best) {
-+		offset = best->vm_node.start + best->vm_node.size;
-+		if (offset < start + pages)
-+			best = NULL;
-+	}
-+
-+	return best;
-+}
-+EXPORT_SYMBOL(drm_vma_offset_lookup_locked);
-+
-+/* internal helper to link @node into the rb-tree */
-+static void _drm_vma_offset_add_rb(struct drm_vma_offset_manager *mgr,
-+				   struct drm_vma_offset_node *node)
-+{
-+	struct rb_node **iter = &mgr->vm_addr_space_rb.rb_node;
-+	struct rb_node *parent = NULL;
-+	struct drm_vma_offset_node *iter_node;
-+
-+	while (likely(*iter)) {
-+		parent = *iter;
-+		iter_node = rb_entry(*iter, struct drm_vma_offset_node, vm_rb);
-+
-+		if (node->vm_node.start < iter_node->vm_node.start)
-+			iter = &(*iter)->rb_left;
-+		else if (node->vm_node.start > iter_node->vm_node.start)
-+			iter = &(*iter)->rb_right;
-+		else
-+			BUG();
-+	}
-+
-+	rb_link_node(&node->vm_rb, parent, iter);
-+	rb_insert_color(&node->vm_rb, &mgr->vm_addr_space_rb);
-+}
-+
-+/**
-+ * drm_vma_offset_add() - Add offset node to manager
-+ * @mgr: Manager object
-+ * @node: Node to be added
-+ * @pages: Allocation size visible to user-space (in number of pages)
-+ *
-+ * Add a node to the offset-manager. If the node was already added, this does
-+ * nothing and return 0. @pages is the size of the object given in number of
-+ * pages.
-+ * After this call succeeds, you can access the offset of the node until it
-+ * is removed again.
-+ *
-+ * If this call fails, it is safe to retry the operation or call
-+ * drm_vma_offset_remove(), anyway. However, no cleanup is required in that
-+ * case.
-+ *
-+ * @pages is not required to be the same size as the underlying memory object
-+ * that you want to map. It only limits the size that user-space can map into
-+ * their address space.
-+ *
-+ * RETURNS:
-+ * 0 on success, negative error code on failure.
-+ */
-+int drm_vma_offset_add(struct drm_vma_offset_manager *mgr,
-+		       struct drm_vma_offset_node *node, unsigned long pages)
-+{
-+	int ret;
-+
-+	write_lock(&mgr->vm_lock);
-+
-+	if (drm_mm_node_allocated(&node->vm_node)) {
-+		ret = 0;
-+		goto out_unlock;
-+	}
-+
-+	ret = drm_mm_insert_node_generic(&mgr->vm_addr_space_mm,
-+					 &node->vm_node, pages, 0, 0);
-+	if (ret)
-+		goto out_unlock;
-+
-+	_drm_vma_offset_add_rb(mgr, node);
-+
-+out_unlock:
-+	write_unlock(&mgr->vm_lock);
-+	return ret;
-+}
-+EXPORT_SYMBOL(drm_vma_offset_add);
-+
-+/**
-+ * drm_vma_offset_remove() - Remove offset node from manager
-+ * @mgr: Manager object
-+ * @node: Node to be removed
-+ *
-+ * Remove a node from the offset manager. If the node wasn't added before, this
-+ * does nothing. After this call returns, the offset and size will be 0 until a
-+ * new offset is allocated via drm_vma_offset_add() again. Helper functions like
-+ * drm_vma_node_start() and drm_vma_node_offset_addr() will return 0 if no
-+ * offset is allocated.
-+ */
-+void drm_vma_offset_remove(struct drm_vma_offset_manager *mgr,
-+			   struct drm_vma_offset_node *node)
-+{
-+	write_lock(&mgr->vm_lock);
-+
-+	if (drm_mm_node_allocated(&node->vm_node)) {
-+		rb_erase(&node->vm_rb, &mgr->vm_addr_space_rb);
-+		drm_mm_remove_node(&node->vm_node);
-+		memset(&node->vm_node, 0, sizeof(node->vm_node));
-+	}
-+
-+	write_unlock(&mgr->vm_lock);
-+}
-+EXPORT_SYMBOL(drm_vma_offset_remove);
-diff --git a/include/drm/drm_vma_manager.h b/include/drm/drm_vma_manager.h
-new file mode 100644
-index 000000000000..7ee8c4babeb9
---- /dev/null
-+++ b/include/drm/drm_vma_manager.h
-@@ -0,0 +1,202 @@
-+#ifndef __DRM_VMA_MANAGER_H__
-+#define __DRM_VMA_MANAGER_H__
-+
-+/*
-+ * Copyright (c) 2013 David Herrmann <dh.herrmann@gmail.com>
-+ *
-+ * Permission is hereby granted, free of charge, to any person obtaining a
-+ * copy of this software and associated documentation files (the "Software"),
-+ * to deal in the Software without restriction, including without limitation
-+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
-+ * and/or sell copies of the Software, and to permit persons to whom the
-+ * Software is furnished to do so, subject to the following conditions:
-+ *
-+ * The above copyright notice and this permission notice shall be included in
-+ * all copies or substantial portions of the Software.
-+ *
-+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
-+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
-+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
-+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
-+ * OTHER DEALINGS IN THE SOFTWARE.
-+ */
-+
-+#include <drm/drm_mm.h>
-+#include <linux/module.h>
-+#include <linux/rbtree.h>
-+#include <linux/spinlock.h>
-+#include <linux/types.h>
-+
-+struct drm_vma_offset_node {
-+	struct drm_mm_node vm_node;
-+	struct rb_node vm_rb;
-+};
-+
-+struct drm_vma_offset_manager {
-+	rwlock_t vm_lock;
-+	struct rb_root vm_addr_space_rb;
-+	struct drm_mm vm_addr_space_mm;
-+};
-+
-+void drm_vma_offset_manager_init(struct drm_vma_offset_manager *mgr,
-+				 unsigned long page_offset, unsigned long size);
-+void drm_vma_offset_manager_destroy(struct drm_vma_offset_manager *mgr);
-+
-+struct drm_vma_offset_node *drm_vma_offset_lookup(struct drm_vma_offset_manager *mgr,
-+						  unsigned long start,
-+						  unsigned long pages);
-+struct drm_vma_offset_node *drm_vma_offset_lookup_locked(struct drm_vma_offset_manager *mgr,
-+							   unsigned long start,
-+							   unsigned long pages);
-+int drm_vma_offset_add(struct drm_vma_offset_manager *mgr,
-+		       struct drm_vma_offset_node *node, unsigned long pages);
-+void drm_vma_offset_remove(struct drm_vma_offset_manager *mgr,
-+			   struct drm_vma_offset_node *node);
-+
-+/**
-+ * drm_vma_offset_exact_lookup() - Look up node by exact address
-+ * @mgr: Manager object
-+ * @start: Start address (page-based, not byte-based)
-+ * @pages: Size of object (page-based)
-+ *
-+ * Same as drm_vma_offset_lookup() but does not allow any offset into the node.
-+ * It only returns the exact object with the given start address.
-+ *
-+ * RETURNS:
-+ * Node at exact start address @start.
-+ */
-+static inline struct drm_vma_offset_node *
-+drm_vma_offset_exact_lookup(struct drm_vma_offset_manager *mgr,
-+			    unsigned long start,
-+			    unsigned long pages)
-+{
-+	struct drm_vma_offset_node *node;
-+
-+	node = drm_vma_offset_lookup(mgr, start, pages);
-+	return (node && node->vm_node.start == start) ? node : NULL;
-+}
-+
-+/**
-+ * drm_vma_offset_lock_lookup() - Lock lookup for extended private use
-+ * @mgr: Manager object
-+ *
-+ * Lock VMA manager for extended lookups. Only *_locked() VMA function calls
-+ * are allowed while holding this lock. All other contexts are blocked from VMA
-+ * until the lock is released via drm_vma_offset_unlock_lookup().
-+ *
-+ * Use this if you need to take a reference to the objects returned by
-+ * drm_vma_offset_lookup_locked() before releasing this lock again.
-+ *
-+ * This lock must not be used for anything else than extended lookups. You must
-+ * not call any other VMA helpers while holding this lock.
-+ *
-+ * Note: You're in atomic-context while holding this lock!
-+ *
-+ * Example:
-+ *   drm_vma_offset_lock_lookup(mgr);
-+ *   node = drm_vma_offset_lookup_locked(mgr);
-+ *   if (node)
-+ *       kref_get_unless_zero(container_of(node, sth, entr));
-+ *   drm_vma_offset_unlock_lookup(mgr);
-+ */
-+static inline void drm_vma_offset_lock_lookup(struct drm_vma_offset_manager *mgr)
-+{
-+	read_lock(&mgr->vm_lock);
-+}
-+
-+/**
-+ * drm_vma_offset_unlock_lookup() - Unlock lookup for extended private use
-+ * @mgr: Manager object
-+ *
-+ * Release lookup-lock. See drm_vma_offset_lock_lookup() for more information.
-+ */
-+static inline void drm_vma_offset_unlock_lookup(struct drm_vma_offset_manager *mgr)
-+{
-+	read_unlock(&mgr->vm_lock);
-+}
-+
-+/**
-+ * drm_vma_node_reset() - Initialize or reset node object
-+ * @node: Node to initialize or reset
-+ *
-+ * Reset a node to its initial state. This must be called if @node isn't
-+ * already cleared (eg., via kzalloc) before using it with any VMA offset
-+ * manager.
-+ *
-+ * This must not be called on an already allocated node, or you will leak
-+ * memory.
-+ */
-+static inline void drm_vma_node_reset(struct drm_vma_offset_node *node)
-+{
-+	memset(node, 0, sizeof(*node));
-+}
-+
-+/**
-+ * drm_vma_node_start() - Return start address for page-based addressing
-+ * @node: Node to inspect
-+ *
-+ * Return the start address of the given node. This can be used as offset into
-+ * the linear VM space that is provided by the VMA offset manager. Note that
-+ * this can only be used for page-based addressing. If you need a proper offset
-+ * for user-space mappings, you must apply "<< PAGE_SHIFT" or use the
-+ * drm_vma_node_offset_addr() helper instead.
-+ *
-+ * RETURNS:
-+ * Start address of @node for page-based addressing. 0 if the node does not
-+ * have an offset allocated.
-+ */
-+static inline unsigned long drm_vma_node_start(struct drm_vma_offset_node *node)
-+{
-+	return node->vm_node.start;
-+}
-+
-+/**
-+ * drm_vma_node_size() - Return size (page-based)
-+ * @node: Node to inspect
-+ *
-+ * Return the size as number of pages for the given node. This is the same size
-+ * that was passed to drm_vma_offset_add(). If no offset is allocated for the
-+ * node, this is 0.
-+ *
-+ * RETURNS:
-+ * Size of @node as number of pages. 0 if the node does not have an offset
-+ * allocated.
-+ */
-+static inline unsigned long drm_vma_node_size(struct drm_vma_offset_node *node)
-+{
-+	return node->vm_node.size;
-+}
-+
-+/**
-+ * drm_vma_node_has_offset() - Check whether node is added to offset manager
-+ * @node: Node to be checked
-+ *
-+ * RETURNS:
-+ * true iff the node was previously allocated an offset and added to
-+ * an vma offset manager.
-+ */
-+static inline bool drm_vma_node_has_offset(struct drm_vma_offset_node *node)
-+{
-+	return drm_mm_node_allocated(&node->vm_node);
-+}
-+
-+/**
-+ * drm_vma_node_offset_addr() - Return sanitized offset for user-space mmaps
-+ * @node: Linked offset node
-+ *
-+ * Same as drm_vma_node_start() but returns the address as a valid offset that
-+ * can be used for user-space mappings during mmap().
-+ * This must not be called on unlinked nodes.
-+ *
-+ * RETURNS:
-+ * Offset of @node for byte-based addressing. 0 if the node does not have an
-+ * object allocated.
-+ */
-+static inline __u64 drm_vma_node_offset_addr(struct drm_vma_offset_node *node)
-+{
-+	return ((__u64)node->vm_node.start) << PAGE_SHIFT;
-+}
-+
-+#endif /* __DRM_VMA_MANAGER_H__ */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0520-drm-gem-convert-to-new-unified-vma-manager.patch b/patches.baytrail/0520-drm-gem-convert-to-new-unified-vma-manager.patch
deleted file mode 100644
index 640b3607f1f2d..0000000000000
--- a/patches.baytrail/0520-drm-gem-convert-to-new-unified-vma-manager.patch
+++ /dev/null
@@ -1,591 +0,0 @@
-From 9f9bd2603f4383aa68ec4440cdd9997057e643f7 Mon Sep 17 00:00:00 2001
-From: David Herrmann <dh.herrmann@gmail.com>
-Date: Wed, 24 Jul 2013 21:07:52 +0200
-Subject: drm/gem: convert to new unified vma manager
-
-Use the new vma manager instead of the old hashtable. Also convert all
-drivers to use the new convenience helpers. This drops all the
-(map_list.hash.key << PAGE_SHIFT) non-sense.
-
-Locking and access-management is exactly the same as before with an
-additional lock inside of the vma-manager, which strictly wouldn't be
-needed for gem.
-
-v2:
- - rebase on drm-next
- - init nodes via drm_vma_node_reset() in drm_gem.c
-v3:
- - fix tegra
-v4:
- - remove duplicate if (drm_vma_node_has_offset()) checks
- - inline now trivial drm_vma_node_offset_addr() calls
-v5:
- - skip node-reset on gem-init due to kzalloc()
- - do not allow mapping gem-objects with offsets (backwards compat)
- - remove unneccessary casts
-
-Cc: Inki Dae <inki.dae@samsung.com>
-Cc: Rob Clark <robdclark@gmail.com>
-Cc: Dave Airlie <airlied@redhat.com>
-Cc: Thierry Reding <thierry.reding@gmail.com>
-Signed-off-by: David Herrmann <dh.herrmann@gmail.com>
-Acked-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Signed-off-by: Dave Airlie <airlied@gmail.com>
-(cherry picked from commit 0de23977cfeb5b357ec884ba15417ae118ff9e9b)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_gem.c                  |   89 ++++-------------------------
- drivers/gpu/drm/drm_gem_cma_helper.c       |   16 +----
- drivers/gpu/drm/exynos/exynos_drm_gem.c    |   14 +---
- drivers/gpu/drm/gma500/gem.c               |   15 +---
- drivers/gpu/drm/i915/i915_gem.c            |   10 +--
- drivers/gpu/drm/omapdrm/omap_gem.c         |   28 ++++-----
- drivers/gpu/drm/omapdrm/omap_gem_helpers.c |   49 ---------------
- drivers/gpu/drm/udl/udl_gem.c              |   13 +---
- drivers/gpu/host1x/drm/gem.c               |    5 -
- include/drm/drmP.h                         |    7 --
- include/uapi/drm/drm.h                     |    2 
- 11 files changed, 62 insertions(+), 186 deletions(-)
-
---- a/drivers/gpu/drm/drm_gem.c
-+++ b/drivers/gpu/drm/drm_gem.c
-@@ -37,6 +37,7 @@
- #include <linux/shmem_fs.h>
- #include <linux/dma-buf.h>
- #include <drm/drmP.h>
-+#include <drm/drm_vma_manager.h>
- 
- /** @file drm_gem.c
-  *
-@@ -102,14 +103,9 @@ drm_gem_init(struct drm_device *dev)
- 	}
- 
- 	dev->mm_private = mm;
--
--	if (drm_ht_create(&mm->offset_hash, 12)) {
--		kfree(mm);
--		return -ENOMEM;
--	}
--
--	drm_mm_init(&mm->offset_manager, DRM_FILE_PAGE_OFFSET_START,
--		    DRM_FILE_PAGE_OFFSET_SIZE);
-+	drm_vma_offset_manager_init(&mm->vma_manager,
-+				    DRM_FILE_PAGE_OFFSET_START,
-+				    DRM_FILE_PAGE_OFFSET_SIZE);
- 
- 	return 0;
- }
-@@ -119,8 +115,7 @@ drm_gem_destroy(struct drm_device *dev)
- {
- 	struct drm_gem_mm *mm = dev->mm_private;
- 
--	drm_mm_takedown(&mm->offset_manager);
--	drm_ht_remove(&mm->offset_hash);
-+	drm_vma_offset_manager_destroy(&mm->vma_manager);
- 	kfree(mm);
- 	dev->mm_private = NULL;
- }
-@@ -302,12 +297,8 @@ drm_gem_free_mmap_offset(struct drm_gem_
- {
- 	struct drm_device *dev = obj->dev;
- 	struct drm_gem_mm *mm = dev->mm_private;
--	struct drm_map_list *list = &obj->map_list;
- 
--	drm_ht_remove_item(&mm->offset_hash, &list->hash);
--	drm_mm_put_block(list->file_offset_node);
--	kfree(list->map);
--	list->map = NULL;
-+	drm_vma_offset_remove(&mm->vma_manager, &obj->vma_node);
- }
- EXPORT_SYMBOL(drm_gem_free_mmap_offset);
- 
-@@ -327,54 +318,9 @@ drm_gem_create_mmap_offset(struct drm_ge
- {
- 	struct drm_device *dev = obj->dev;
- 	struct drm_gem_mm *mm = dev->mm_private;
--	struct drm_map_list *list;
--	struct drm_local_map *map;
--	int ret;
--
--	/* Set the object up for mmap'ing */
--	list = &obj->map_list;
--	list->map = kzalloc(sizeof(struct drm_map_list), GFP_KERNEL);
--	if (!list->map)
--		return -ENOMEM;
--
--	map = list->map;
--	map->type = _DRM_GEM;
--	map->size = obj->size;
--	map->handle = obj;
--
--	/* Get a DRM GEM mmap offset allocated... */
--	list->file_offset_node = drm_mm_search_free(&mm->offset_manager,
--			obj->size / PAGE_SIZE, 0, false);
--
--	if (!list->file_offset_node) {
--		DRM_ERROR("failed to allocate offset for bo %d\n", obj->name);
--		ret = -ENOSPC;
--		goto out_free_list;
--	}
--
--	list->file_offset_node = drm_mm_get_block(list->file_offset_node,
--			obj->size / PAGE_SIZE, 0);
--	if (!list->file_offset_node) {
--		ret = -ENOMEM;
--		goto out_free_list;
--	}
--
--	list->hash.key = list->file_offset_node->start;
--	ret = drm_ht_insert_item(&mm->offset_hash, &list->hash);
--	if (ret) {
--		DRM_ERROR("failed to add to map hash\n");
--		goto out_free_mm;
--	}
--
--	return 0;
- 
--out_free_mm:
--	drm_mm_put_block(list->file_offset_node);
--out_free_list:
--	kfree(list->map);
--	list->map = NULL;
--
--	return ret;
-+	return drm_vma_offset_add(&mm->vma_manager, &obj->vma_node,
-+				  obj->size / PAGE_SIZE);
- }
- EXPORT_SYMBOL(drm_gem_create_mmap_offset);
- 
-@@ -699,8 +645,8 @@ int drm_gem_mmap(struct file *filp, stru
- 	struct drm_file *priv = filp->private_data;
- 	struct drm_device *dev = priv->minor->dev;
- 	struct drm_gem_mm *mm = dev->mm_private;
--	struct drm_local_map *map = NULL;
--	struct drm_hash_item *hash;
-+	struct drm_gem_object *obj;
-+	struct drm_vma_offset_node *node;
- 	int ret = 0;
- 
- 	if (drm_device_is_unplugged(dev))
-@@ -708,21 +654,16 @@ int drm_gem_mmap(struct file *filp, stru
- 
- 	mutex_lock(&dev->struct_mutex);
- 
--	if (drm_ht_find_item(&mm->offset_hash, vma->vm_pgoff, &hash)) {
-+	node = drm_vma_offset_exact_lookup(&mm->vma_manager, vma->vm_pgoff,
-+					   vma_pages(vma));
-+	if (!node) {
- 		mutex_unlock(&dev->struct_mutex);
- 		return drm_mmap(filp, vma);
- 	}
- 
--	map = drm_hash_entry(hash, struct drm_map_list, hash)->map;
--	if (!map ||
--	    ((map->flags & _DRM_RESTRICTED) && !capable(CAP_SYS_ADMIN))) {
--		ret =  -EPERM;
--		goto out_unlock;
--	}
--
--	ret = drm_gem_mmap_obj(map->handle, map->size, vma);
-+	obj = container_of(node, struct drm_gem_object, vma_node);
-+	ret = drm_gem_mmap_obj(obj, drm_vma_node_size(node), vma);
- 
--out_unlock:
- 	mutex_unlock(&dev->struct_mutex);
- 
- 	return ret;
---- a/drivers/gpu/drm/drm_gem_cma_helper.c
-+++ b/drivers/gpu/drm/drm_gem_cma_helper.c
-@@ -27,11 +27,7 @@
- #include <drm/drmP.h>
- #include <drm/drm.h>
- #include <drm/drm_gem_cma_helper.h>
--
--static unsigned int get_gem_mmap_offset(struct drm_gem_object *obj)
--{
--	return (unsigned int)obj->map_list.hash.key << PAGE_SHIFT;
--}
-+#include <drm/drm_vma_manager.h>
- 
- /*
-  * __drm_gem_cma_create - Create a GEM CMA object without allocating memory
-@@ -172,8 +168,7 @@ void drm_gem_cma_free_object(struct drm_
- {
- 	struct drm_gem_cma_object *cma_obj;
- 
--	if (gem_obj->map_list.map)
--		drm_gem_free_mmap_offset(gem_obj);
-+	drm_gem_free_mmap_offset(gem_obj);
- 
- 	cma_obj = to_drm_gem_cma_obj(gem_obj);
- 
-@@ -240,7 +235,7 @@ int drm_gem_cma_dumb_map_offset(struct d
- 		return -EINVAL;
- 	}
- 
--	*offset = get_gem_mmap_offset(gem_obj);
-+	*offset = drm_vma_node_offset_addr(&gem_obj->vma_node);
- 
- 	drm_gem_object_unreference(gem_obj);
- 
-@@ -304,12 +299,11 @@ void drm_gem_cma_describe(struct drm_gem
- {
- 	struct drm_gem_object *obj = &cma_obj->base;
- 	struct drm_device *dev = obj->dev;
--	uint64_t off = 0;
-+	uint64_t off;
- 
- 	WARN_ON(!mutex_is_locked(&dev->struct_mutex));
- 
--	if (obj->map_list.map)
--		off = (uint64_t)obj->map_list.hash.key;
-+	off = drm_vma_node_start(&obj->vma_node);
- 
- 	seq_printf(m, "%2d (%2d) %08llx %08Zx %p %d",
- 			obj->name, obj->refcount.refcount.counter,
---- a/drivers/gpu/drm/exynos/exynos_drm_gem.c
-+++ b/drivers/gpu/drm/exynos/exynos_drm_gem.c
-@@ -10,6 +10,7 @@
-  */
- 
- #include <drm/drmP.h>
-+#include <drm/drm_vma_manager.h>
- 
- #include <linux/shmem_fs.h>
- #include <drm/exynos_drm.h>
-@@ -154,8 +155,7 @@ out:
- 	exynos_drm_fini_buf(obj->dev, buf);
- 	exynos_gem_obj->buffer = NULL;
- 
--	if (obj->map_list.map)
--		drm_gem_free_mmap_offset(obj);
-+	drm_gem_free_mmap_offset(obj);
- 
- 	/* release file pointer to gem object. */
- 	drm_gem_object_release(obj);
-@@ -721,13 +721,11 @@ int exynos_drm_gem_dumb_map_offset(struc
- 		goto unlock;
- 	}
- 
--	if (!obj->map_list.map) {
--		ret = drm_gem_create_mmap_offset(obj);
--		if (ret)
--			goto out;
--	}
-+	ret = drm_gem_create_mmap_offset(obj);
-+	if (ret)
-+		goto out;
- 
--	*offset = (u64)obj->map_list.hash.key << PAGE_SHIFT;
-+	*offset = drm_vma_node_offset_addr(&obj->vma_node);
- 	DRM_DEBUG_KMS("offset = 0x%lx\n", (unsigned long)*offset);
- 
- out:
---- a/drivers/gpu/drm/gma500/gem.c
-+++ b/drivers/gpu/drm/gma500/gem.c
-@@ -26,6 +26,7 @@
- #include <drm/drmP.h>
- #include <drm/drm.h>
- #include <drm/gma_drm.h>
-+#include <drm/drm_vma_manager.h>
- #include "psb_drv.h"
- 
- int psb_gem_init_object(struct drm_gem_object *obj)
-@@ -38,8 +39,7 @@ void psb_gem_free_object(struct drm_gem_
- 	struct gtt_range *gtt = container_of(obj, struct gtt_range, gem);
- 
- 	/* Remove the list map if one is present */
--	if (obj->map_list.map)
--		drm_gem_free_mmap_offset(obj);
-+	drm_gem_free_mmap_offset(obj);
- 	drm_gem_object_release(obj);
- 
- 	/* This must occur last as it frees up the memory of the GEM object */
-@@ -81,13 +81,10 @@ int psb_gem_dumb_map_gtt(struct drm_file
- 	/* What validation is needed here ? */
- 
- 	/* Make it mmapable */
--	if (!obj->map_list.map) {
--		ret = drm_gem_create_mmap_offset(obj);
--		if (ret)
--			goto out;
--	}
--	/* GEM should really work out the hash offsets for us */
--	*offset = (u64)obj->map_list.hash.key << PAGE_SHIFT;
-+	ret = drm_gem_create_mmap_offset(obj);
-+	if (ret)
-+		goto out;
-+	*offset = drm_vma_node_offset_addr(&obj->vma_node);
- out:
- 	drm_gem_object_unreference(obj);
- unlock:
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -26,6 +26,7 @@
-  */
- 
- #include <drm/drmP.h>
-+#include <drm/drm_vma_manager.h>
- #include <drm/i915_drm.h>
- #include "i915_drv.h"
- #include "i915_trace.h"
-@@ -1424,7 +1425,7 @@ i915_gem_release_mmap(struct drm_i915_ge
- 
- 	if (obj->base.dev->dev_mapping)
- 		unmap_mapping_range(obj->base.dev->dev_mapping,
--				    (loff_t)obj->base.map_list.hash.key<<PAGE_SHIFT,
-+				    (loff_t)drm_vma_node_offset_addr(&obj->base.vma_node),
- 				    obj->base.size, 1);
- 
- 	obj->fault_mappable = false;
-@@ -1482,7 +1483,7 @@ static int i915_gem_object_create_mmap_o
- 	struct drm_i915_private *dev_priv = obj->base.dev->dev_private;
- 	int ret;
- 
--	if (obj->base.map_list.map)
-+	if (drm_vma_node_has_offset(&obj->base.vma_node))
- 		return 0;
- 
- 	dev_priv->mm.shrinker_no_lock_stealing = true;
-@@ -1513,9 +1514,6 @@ out:
- 
- static void i915_gem_object_free_mmap_offset(struct drm_i915_gem_object *obj)
- {
--	if (!obj->base.map_list.map)
--		return;
--
- 	drm_gem_free_mmap_offset(&obj->base);
- }
- 
-@@ -1554,7 +1552,7 @@ i915_gem_mmap_gtt(struct drm_file *file,
- 	if (ret)
- 		goto out;
- 
--	*offset = (u64)obj->base.map_list.hash.key << PAGE_SHIFT;
-+	*offset = drm_vma_node_offset_addr(&obj->base.vma_node);
- 
- out:
- 	drm_gem_object_unreference(&obj->base);
---- a/drivers/gpu/drm/omapdrm/omap_gem.c
-+++ b/drivers/gpu/drm/omapdrm/omap_gem.c
-@@ -20,6 +20,7 @@
- 
- #include <linux/spinlock.h>
- #include <linux/shmem_fs.h>
-+#include <drm/drm_vma_manager.h>
- 
- #include "omap_drv.h"
- #include "omap_dmm_tiler.h"
-@@ -308,21 +309,20 @@ uint32_t omap_gem_flags(struct drm_gem_o
- static uint64_t mmap_offset(struct drm_gem_object *obj)
- {
- 	struct drm_device *dev = obj->dev;
-+	int ret;
-+	size_t size;
- 
- 	WARN_ON(!mutex_is_locked(&dev->struct_mutex));
- 
--	if (!obj->map_list.map) {
--		/* Make it mmapable */
--		size_t size = omap_gem_mmap_size(obj);
--		int ret = _drm_gem_create_mmap_offset_size(obj, size);
--
--		if (ret) {
--			dev_err(dev->dev, "could not allocate mmap offset\n");
--			return 0;
--		}
-+	/* Make it mmapable */
-+	size = omap_gem_mmap_size(obj);
-+	ret = _drm_gem_create_mmap_offset_size(obj, size);
-+	if (ret) {
-+		dev_err(dev->dev, "could not allocate mmap offset\n");
-+		return 0;
- 	}
- 
--	return (uint64_t)obj->map_list.hash.key << PAGE_SHIFT;
-+	return drm_vma_node_offset_addr(&obj->vma_node);
- }
- 
- uint64_t omap_gem_mmap_offset(struct drm_gem_object *obj)
-@@ -997,12 +997,11 @@ void omap_gem_describe(struct drm_gem_ob
- {
- 	struct drm_device *dev = obj->dev;
- 	struct omap_gem_object *omap_obj = to_omap_bo(obj);
--	uint64_t off = 0;
-+	uint64_t off;
- 
- 	WARN_ON(!mutex_is_locked(&dev->struct_mutex));
- 
--	if (obj->map_list.map)
--		off = (uint64_t)obj->map_list.hash.key;
-+	off = drm_vma_node_start(&obj->vma_node);
- 
- 	seq_printf(m, "%08x: %2d (%2d) %08llx %08Zx (%2d) %p %4d",
- 			omap_obj->flags, obj->name, obj->refcount.refcount.counter,
-@@ -1309,8 +1308,7 @@ void omap_gem_free_object(struct drm_gem
- 
- 	list_del(&omap_obj->mm_list);
- 
--	if (obj->map_list.map)
--		drm_gem_free_mmap_offset(obj);
-+	drm_gem_free_mmap_offset(obj);
- 
- 	/* this means the object is still pinned.. which really should
- 	 * not happen.  I think..
---- a/drivers/gpu/drm/omapdrm/omap_gem_helpers.c
-+++ b/drivers/gpu/drm/omapdrm/omap_gem_helpers.c
-@@ -118,52 +118,7 @@ _drm_gem_create_mmap_offset_size(struct
- {
- 	struct drm_device *dev = obj->dev;
- 	struct drm_gem_mm *mm = dev->mm_private;
--	struct drm_map_list *list;
--	struct drm_local_map *map;
--	int ret = 0;
- 
--	/* Set the object up for mmap'ing */
--	list = &obj->map_list;
--	list->map = kzalloc(sizeof(struct drm_map_list), GFP_KERNEL);
--	if (!list->map)
--		return -ENOMEM;
--
--	map = list->map;
--	map->type = _DRM_GEM;
--	map->size = size;
--	map->handle = obj;
--
--	/* Get a DRM GEM mmap offset allocated... */
--	list->file_offset_node = drm_mm_search_free(&mm->offset_manager,
--			size / PAGE_SIZE, 0, 0);
--
--	if (!list->file_offset_node) {
--		DRM_ERROR("failed to allocate offset for bo %d\n", obj->name);
--		ret = -ENOSPC;
--		goto out_free_list;
--	}
--
--	list->file_offset_node = drm_mm_get_block(list->file_offset_node,
--			size / PAGE_SIZE, 0);
--	if (!list->file_offset_node) {
--		ret = -ENOMEM;
--		goto out_free_list;
--	}
--
--	list->hash.key = list->file_offset_node->start;
--	ret = drm_ht_insert_item(&mm->offset_hash, &list->hash);
--	if (ret) {
--		DRM_ERROR("failed to add to map hash\n");
--		goto out_free_mm;
--	}
--
--	return 0;
--
--out_free_mm:
--	drm_mm_put_block(list->file_offset_node);
--out_free_list:
--	kfree(list->map);
--	list->map = NULL;
--
--	return ret;
-+	return drm_vma_offset_add(&mm->vma_manager, &obj->vma_node,
-+				  size / PAGE_SIZE);
- }
---- a/drivers/gpu/drm/udl/udl_gem.c
-+++ b/drivers/gpu/drm/udl/udl_gem.c
-@@ -223,8 +223,7 @@ void udl_gem_free_object(struct drm_gem_
- 	if (obj->pages)
- 		udl_gem_put_pages(obj);
- 
--	if (gem_obj->map_list.map)
--		drm_gem_free_mmap_offset(gem_obj);
-+	drm_gem_free_mmap_offset(gem_obj);
- }
- 
- /* the dumb interface doesn't work with the GEM straight MMAP
-@@ -247,13 +246,11 @@ int udl_gem_mmap(struct drm_file *file,
- 	ret = udl_gem_get_pages(gobj, GFP_KERNEL);
- 	if (ret)
- 		goto out;
--	if (!gobj->base.map_list.map) {
--		ret = drm_gem_create_mmap_offset(obj);
--		if (ret)
--			goto out;
--	}
-+	ret = drm_gem_create_mmap_offset(obj);
-+	if (ret)
-+		goto out;
- 
--	*offset = (u64)gobj->base.map_list.hash.key << PAGE_SHIFT;
-+	*offset = drm_vma_node_offset_addr(&gobj->base.vma_node);
- 
- out:
- 	drm_gem_object_unreference(&gobj->base);
---- a/drivers/gpu/host1x/drm/gem.c
-+++ b/drivers/gpu/host1x/drm/gem.c
-@@ -108,7 +108,7 @@ static void tegra_bo_destroy(struct drm_
- 
- unsigned int tegra_bo_get_mmap_offset(struct tegra_bo *bo)
- {
--	return (unsigned int)bo->gem.map_list.hash.key << PAGE_SHIFT;
-+	return (unsigned int)drm_vma_node_offset_addr(&bo->gem.vma_node);
- }
- 
- struct tegra_bo *tegra_bo_create(struct drm_device *drm, unsigned int size)
-@@ -182,8 +182,7 @@ void tegra_bo_free_object(struct drm_gem
- {
- 	struct tegra_bo *bo = to_tegra_bo(gem);
- 
--	if (gem->map_list.map)
--		drm_gem_free_mmap_offset(gem);
-+	drm_gem_free_mmap_offset(gem);
- 
- 	drm_gem_object_release(gem);
- 	tegra_bo_destroy(gem->dev, bo);
---- a/include/drm/drmP.h
-+++ b/include/drm/drmP.h
-@@ -74,6 +74,7 @@
- #include <asm/pgalloc.h>
- #include <drm/drm.h>
- #include <drm/drm_sarea.h>
-+#include <drm/drm_vma_manager.h>
- 
- #include <linux/idr.h>
- 
-@@ -590,7 +591,6 @@ struct drm_map_list {
- 	struct drm_local_map *map;	/**< mapping */
- 	uint64_t user_token;
- 	struct drm_master *master;
--	struct drm_mm_node *file_offset_node;	/**< fake offset */
- };
- 
- /**
-@@ -625,8 +625,7 @@ struct drm_ati_pcigart_info {
-  * GEM specific mm private for tracking GEM objects
-  */
- struct drm_gem_mm {
--	struct drm_mm offset_manager;	/**< Offset mgmt for buffer objects */
--	struct drm_open_hash offset_hash; /**< User token hash table for maps */
-+	struct drm_vma_offset_manager vma_manager;
- };
- 
- /**
-@@ -647,7 +646,7 @@ struct drm_gem_object {
- 	struct file *filp;
- 
- 	/* Mapping info for this object */
--	struct drm_map_list map_list;
-+	struct drm_vma_offset_node vma_node;
- 
- 	/**
- 	 * Size of the object, in bytes.  Immutable over the object's
---- a/include/uapi/drm/drm.h
-+++ b/include/uapi/drm/drm.h
-@@ -181,7 +181,7 @@ enum drm_map_type {
- 	_DRM_AGP = 3,		  /**< AGP/GART */
- 	_DRM_SCATTER_GATHER = 4,  /**< Scatter/gather memory for PCI DMA */
- 	_DRM_CONSISTENT = 5,	  /**< Consistent memory for PCI DMA */
--	_DRM_GEM = 6,		  /**< GEM object */
-+	_DRM_GEM = 6,		  /**< GEM object (obsolete) */
- };
- 
- /**
diff --git a/patches.baytrail/0521-drm-gem-fix-mmap-vma-size-calculations.patch b/patches.baytrail/0521-drm-gem-fix-mmap-vma-size-calculations.patch
deleted file mode 100644
index 59bb0ef727296..0000000000000
--- a/patches.baytrail/0521-drm-gem-fix-mmap-vma-size-calculations.patch
+++ /dev/null
@@ -1,45 +0,0 @@
-From 3331761cbf57b3819e5075eef1bfc42e58bd8f20 Mon Sep 17 00:00:00 2001
-From: David Herrmann <dh.herrmann@gmail.com>
-Date: Fri, 26 Jul 2013 12:09:32 +0200
-Subject: drm/gem: fix mmap vma size calculations
-
-The VMA manager is page-size based so drm_vma_node_size() returns the size
-in pages. However, drm_gem_mmap_obj() requires the size in bytes. Apply
-PAGE_SHIFT so we no longer get EINVAL during mmaps due to too small
-buffers.
-
-This bug was introduced in commit:
-  0de23977cfeb5b357ec884ba15417ae118ff9e9b
-  "drm/gem: convert to new unified vma manager"
-
-Fixes i915 gtt mmap failure reported by Sedat Dilek in:
-  Re: linux-next: Tree for Jul 25 [ call-trace: drm | drm-intel related? ]
-
-Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
-Cc: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: David Herrmann <dh.herrmann@gmail.com>
-Reported-by: Sedat Dilek <sedat.dilek@gmail.com>
-Tested-by: Sedat Dilek <sedat.dilek@gmail.com>
-Signed-off-by: Dave Airlie <airlied@gmail.com>
-(cherry picked from commit aed2c03c8d96ea471b86761129c213e05ab6fbef)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_gem.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/drm_gem.c b/drivers/gpu/drm/drm_gem.c
-index d1ba36512fe4..2688795172f9 100644
---- a/drivers/gpu/drm/drm_gem.c
-+++ b/drivers/gpu/drm/drm_gem.c
-@@ -662,7 +662,7 @@ int drm_gem_mmap(struct file *filp, struct vm_area_struct *vma)
- 	}
- 
- 	obj = container_of(node, struct drm_gem_object, vma_node);
--	ret = drm_gem_mmap_obj(obj, drm_vma_node_size(node), vma);
-+	ret = drm_gem_mmap_obj(obj, drm_vma_node_size(node) << PAGE_SHIFT, vma);
- 
- 	mutex_unlock(&dev->struct_mutex);
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0522-drm-ttm-convert-to-unified-vma-offset-manager.patch b/patches.baytrail/0522-drm-ttm-convert-to-unified-vma-offset-manager.patch
deleted file mode 100644
index 2089d5e7a56b0..0000000000000
--- a/patches.baytrail/0522-drm-ttm-convert-to-unified-vma-offset-manager.patch
+++ /dev/null
@@ -1,595 +0,0 @@
-From 8db22e0b6d06a7666fcdc9434e82cb3b6a58c774 Mon Sep 17 00:00:00 2001
-From: David Herrmann <dh.herrmann@gmail.com>
-Date: Wed, 24 Jul 2013 21:08:53 +0200
-Subject: drm/ttm: convert to unified vma offset manager
-
-Use the new vma-manager infrastructure. This doesn't change any
-implementation details as the vma-offset-manager is nearly copied 1-to-1
-from TTM.
-
-The vm_lock is moved into the offset manager so we can drop it from TTM.
-During lookup, we use the vma locking helpers to take a reference to the
-found object.
-In all other scenarios, locking stays the same as before. We always
-guarantee that drm_vma_offset_remove() is called only during destruction.
-Hence, helpers like drm_vma_node_offset_addr() are always safe as long as
-the node has a valid offset.
-
-This also drops the addr_space_offset member as it is a copy of vm_start
-in vma_node objects. Use the accessor functions instead.
-
-v4:
- - remove vm_lock
- - use drm_vma_offset_lock_lookup() to protect lookup (instead of vm_lock)
-
-Cc: Dave Airlie <airlied@redhat.com>
-Cc: Ben Skeggs <bskeggs@redhat.com>
-Cc: Maarten Lankhorst <maarten.lankhorst@canonical.com>
-Cc: Martin Peres <martin.peres@labri.fr>
-Cc: Alex Deucher <alexander.deucher@amd.com>
-Cc: Thomas Hellstrom <thellstrom@vmware.com>
-Signed-off-by: David Herrmann <dh.herrmann@gmail.com>
-Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Signed-off-by: Dave Airlie <airlied@gmail.com>
-(cherry picked from commit 72525b3f333de54fa0c42ef87f27861e41478f1e)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/ast/ast_main.c            |  2 +-
- drivers/gpu/drm/cirrus/cirrus_main.c      |  2 +-
- drivers/gpu/drm/mgag200/mgag200_main.c    |  2 +-
- drivers/gpu/drm/nouveau/nouveau_display.c |  2 +-
- drivers/gpu/drm/nouveau/nouveau_gem.c     |  2 +-
- drivers/gpu/drm/qxl/qxl_object.h          |  2 +-
- drivers/gpu/drm/qxl/qxl_release.c         |  2 +-
- drivers/gpu/drm/radeon/radeon_object.h    |  5 +-
- drivers/gpu/drm/ttm/ttm_bo.c              | 89 ++++++-------------------------
- drivers/gpu/drm/ttm/ttm_bo_util.c         |  3 +-
- drivers/gpu/drm/ttm/ttm_bo_vm.c           | 81 +++++++++++-----------------
- drivers/gpu/drm/vmwgfx/vmwgfx_resource.c  |  4 +-
- include/drm/ttm/ttm_bo_api.h              | 15 ++----
- include/drm/ttm/ttm_bo_driver.h           | 10 ++--
- 14 files changed, 66 insertions(+), 155 deletions(-)
-
-diff --git a/drivers/gpu/drm/ast/ast_main.c b/drivers/gpu/drm/ast/ast_main.c
-index f60fd7bd1183..c195dc2abc09 100644
---- a/drivers/gpu/drm/ast/ast_main.c
-+++ b/drivers/gpu/drm/ast/ast_main.c
-@@ -487,7 +487,7 @@ void ast_gem_free_object(struct drm_gem_object *obj)
- 
- static inline u64 ast_bo_mmap_offset(struct ast_bo *bo)
- {
--	return bo->bo.addr_space_offset;
-+	return drm_vma_node_offset_addr(&bo->bo.vma_node);
- }
- int
- ast_dumb_mmap_offset(struct drm_file *file,
-diff --git a/drivers/gpu/drm/cirrus/cirrus_main.c b/drivers/gpu/drm/cirrus/cirrus_main.c
-index 35cbae827771..3a7a0efe3675 100644
---- a/drivers/gpu/drm/cirrus/cirrus_main.c
-+++ b/drivers/gpu/drm/cirrus/cirrus_main.c
-@@ -294,7 +294,7 @@ void cirrus_gem_free_object(struct drm_gem_object *obj)
- 
- static inline u64 cirrus_bo_mmap_offset(struct cirrus_bo *bo)
- {
--	return bo->bo.addr_space_offset;
-+	return drm_vma_node_offset_addr(&bo->bo.vma_node);
- }
- 
- int
-diff --git a/drivers/gpu/drm/mgag200/mgag200_main.c b/drivers/gpu/drm/mgag200/mgag200_main.c
-index dafe049fb1ae..2d56e28d2b21 100644
---- a/drivers/gpu/drm/mgag200/mgag200_main.c
-+++ b/drivers/gpu/drm/mgag200/mgag200_main.c
-@@ -330,7 +330,7 @@ void mgag200_gem_free_object(struct drm_gem_object *obj)
- 
- static inline u64 mgag200_bo_mmap_offset(struct mgag200_bo *bo)
- {
--	return bo->bo.addr_space_offset;
-+	return drm_vma_node_offset_addr(&bo->bo.vma_node);
- }
- 
- int
-diff --git a/drivers/gpu/drm/nouveau/nouveau_display.c b/drivers/gpu/drm/nouveau/nouveau_display.c
-index f17dc2ab03ec..52498de87a3b 100644
---- a/drivers/gpu/drm/nouveau/nouveau_display.c
-+++ b/drivers/gpu/drm/nouveau/nouveau_display.c
-@@ -705,7 +705,7 @@ nouveau_display_dumb_map_offset(struct drm_file *file_priv,
- 	gem = drm_gem_object_lookup(dev, file_priv, handle);
- 	if (gem) {
- 		struct nouveau_bo *bo = gem->driver_private;
--		*poffset = bo->bo.addr_space_offset;
-+		*poffset = drm_vma_node_offset_addr(&bo->bo.vma_node);
- 		drm_gem_object_unreference_unlocked(gem);
- 		return 0;
- 	}
-diff --git a/drivers/gpu/drm/nouveau/nouveau_gem.c b/drivers/gpu/drm/nouveau/nouveau_gem.c
-index 5bccf31cc974..3b11fc07a88b 100644
---- a/drivers/gpu/drm/nouveau/nouveau_gem.c
-+++ b/drivers/gpu/drm/nouveau/nouveau_gem.c
-@@ -192,7 +192,7 @@ nouveau_gem_info(struct drm_file *file_priv, struct drm_gem_object *gem,
- 	}
- 
- 	rep->size = nvbo->bo.mem.num_pages << PAGE_SHIFT;
--	rep->map_handle = nvbo->bo.addr_space_offset;
-+	rep->map_handle = drm_vma_node_offset_addr(&nvbo->bo.vma_node);
- 	rep->tile_mode = nvbo->tile_mode;
- 	rep->tile_flags = nvbo->tile_flags;
- 	return 0;
-diff --git a/drivers/gpu/drm/qxl/qxl_object.h b/drivers/gpu/drm/qxl/qxl_object.h
-index b4fd89fbd8b7..1fc4e4b833a3 100644
---- a/drivers/gpu/drm/qxl/qxl_object.h
-+++ b/drivers/gpu/drm/qxl/qxl_object.h
-@@ -64,7 +64,7 @@ static inline bool qxl_bo_is_reserved(struct qxl_bo *bo)
- 
- static inline u64 qxl_bo_mmap_offset(struct qxl_bo *bo)
- {
--	return bo->tbo.addr_space_offset;
-+	return drm_vma_node_offset_addr(&bo->tbo.vma_node);
- }
- 
- static inline int qxl_bo_wait(struct qxl_bo *bo, u32 *mem_type,
-diff --git a/drivers/gpu/drm/qxl/qxl_release.c b/drivers/gpu/drm/qxl/qxl_release.c
-index b443d6751d5f..1a648e1da6a6 100644
---- a/drivers/gpu/drm/qxl/qxl_release.c
-+++ b/drivers/gpu/drm/qxl/qxl_release.c
-@@ -87,7 +87,7 @@ qxl_release_free(struct qxl_device *qdev,
- 
- 	for (i = 0 ; i < release->bo_count; ++i) {
- 		QXL_INFO(qdev, "release %llx\n",
--			release->bos[i]->tbo.addr_space_offset
-+			drm_vma_node_offset_addr(&release->bos[i]->tbo.vma_node)
- 						- DRM_FILE_OFFSET);
- 		qxl_fence_remove_release(&release->bos[i]->fence, release->id);
- 		qxl_bo_unref(&release->bos[i]);
-diff --git a/drivers/gpu/drm/radeon/radeon_object.h b/drivers/gpu/drm/radeon/radeon_object.h
-index 294382394608..a185b0f46dd3 100644
---- a/drivers/gpu/drm/radeon/radeon_object.h
-+++ b/drivers/gpu/drm/radeon/radeon_object.h
-@@ -98,13 +98,10 @@ static inline unsigned radeon_bo_gpu_page_alignment(struct radeon_bo *bo)
-  * @bo:	radeon object for which we query the offset
-  *
-  * Returns mmap offset of the object.
-- *
-- * Note: addr_space_offset is constant after ttm bo init thus isn't protected
-- * by any lock.
-  */
- static inline u64 radeon_bo_mmap_offset(struct radeon_bo *bo)
- {
--	return bo->tbo.addr_space_offset;
-+	return drm_vma_node_offset_addr(&bo->tbo.vma_node);
- }
- 
- extern int radeon_bo_wait(struct radeon_bo *bo, u32 *mem_type,
-diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c
-index 57f9766e1135..447010fbc2cd 100644
---- a/drivers/gpu/drm/ttm/ttm_bo.c
-+++ b/drivers/gpu/drm/ttm/ttm_bo.c
-@@ -775,13 +775,7 @@ static void ttm_bo_release(struct kref *kref)
- 	struct ttm_bo_device *bdev = bo->bdev;
- 	struct ttm_mem_type_manager *man = &bdev->man[bo->mem.mem_type];
- 
--	write_lock(&bdev->vm_lock);
--	if (likely(bo->vm_node != NULL)) {
--		rb_erase(&bo->vm_rb, &bdev->addr_space_rb);
--		drm_mm_put_block(bo->vm_node);
--		bo->vm_node = NULL;
--	}
--	write_unlock(&bdev->vm_lock);
-+	drm_vma_offset_remove(&bdev->vma_manager, &bo->vma_node);
- 	ttm_mem_io_lock(man, false);
- 	ttm_mem_io_free_vm(bo);
- 	ttm_mem_io_unlock(man);
-@@ -1297,6 +1291,7 @@ int ttm_bo_init(struct ttm_bo_device *bdev,
- 	bo->acc_size = acc_size;
- 	bo->sg = sg;
- 	atomic_inc(&bo->glob->bo_count);
-+	drm_vma_node_reset(&bo->vma_node);
- 
- 	ret = ttm_bo_check_placement(bo, placement);
- 	if (unlikely(ret != 0))
-@@ -1596,10 +1591,7 @@ int ttm_bo_device_release(struct ttm_bo_device *bdev)
- 		TTM_DEBUG("Swap list was clean\n");
- 	spin_unlock(&glob->lru_lock);
- 
--	BUG_ON(!drm_mm_clean(&bdev->addr_space_mm));
--	write_lock(&bdev->vm_lock);
--	drm_mm_takedown(&bdev->addr_space_mm);
--	write_unlock(&bdev->vm_lock);
-+	drm_vma_offset_manager_destroy(&bdev->vma_manager);
- 
- 	return ret;
- }
-@@ -1613,7 +1605,6 @@ int ttm_bo_device_init(struct ttm_bo_device *bdev,
- {
- 	int ret = -EINVAL;
- 
--	rwlock_init(&bdev->vm_lock);
- 	bdev->driver = driver;
- 
- 	memset(bdev->man, 0, sizeof(bdev->man));
-@@ -1626,9 +1617,8 @@ int ttm_bo_device_init(struct ttm_bo_device *bdev,
- 	if (unlikely(ret != 0))
- 		goto out_no_sys;
- 
--	bdev->addr_space_rb = RB_ROOT;
--	drm_mm_init(&bdev->addr_space_mm, file_page_offset, 0x10000000);
--
-+	drm_vma_offset_manager_init(&bdev->vma_manager, file_page_offset,
-+				    0x10000000);
- 	INIT_DELAYED_WORK(&bdev->wq, ttm_bo_delayed_workqueue);
- 	INIT_LIST_HEAD(&bdev->ddestroy);
- 	bdev->dev_mapping = NULL;
-@@ -1670,12 +1660,17 @@ bool ttm_mem_reg_is_pci(struct ttm_bo_device *bdev, struct ttm_mem_reg *mem)
- void ttm_bo_unmap_virtual_locked(struct ttm_buffer_object *bo)
- {
- 	struct ttm_bo_device *bdev = bo->bdev;
--	loff_t offset = (loff_t) bo->addr_space_offset;
--	loff_t holelen = ((loff_t) bo->mem.num_pages) << PAGE_SHIFT;
-+	loff_t offset, holelen;
- 
- 	if (!bdev->dev_mapping)
- 		return;
--	unmap_mapping_range(bdev->dev_mapping, offset, holelen, 1);
-+
-+	if (drm_vma_node_has_offset(&bo->vma_node)) {
-+		offset = (loff_t) drm_vma_node_offset_addr(&bo->vma_node);
-+		holelen = ((loff_t) bo->mem.num_pages) << PAGE_SHIFT;
-+
-+		unmap_mapping_range(bdev->dev_mapping, offset, holelen, 1);
-+	}
- 	ttm_mem_io_free_vm(bo);
- }
- 
-@@ -1692,31 +1687,6 @@ void ttm_bo_unmap_virtual(struct ttm_buffer_object *bo)
- 
- EXPORT_SYMBOL(ttm_bo_unmap_virtual);
- 
--static void ttm_bo_vm_insert_rb(struct ttm_buffer_object *bo)
--{
--	struct ttm_bo_device *bdev = bo->bdev;
--	struct rb_node **cur = &bdev->addr_space_rb.rb_node;
--	struct rb_node *parent = NULL;
--	struct ttm_buffer_object *cur_bo;
--	unsigned long offset = bo->vm_node->start;
--	unsigned long cur_offset;
--
--	while (*cur) {
--		parent = *cur;
--		cur_bo = rb_entry(parent, struct ttm_buffer_object, vm_rb);
--		cur_offset = cur_bo->vm_node->start;
--		if (offset < cur_offset)
--			cur = &parent->rb_left;
--		else if (offset > cur_offset)
--			cur = &parent->rb_right;
--		else
--			BUG();
--	}
--
--	rb_link_node(&bo->vm_rb, parent, cur);
--	rb_insert_color(&bo->vm_rb, &bdev->addr_space_rb);
--}
--
- /**
-  * ttm_bo_setup_vm:
-  *
-@@ -1731,38 +1701,9 @@ static void ttm_bo_vm_insert_rb(struct ttm_buffer_object *bo)
- static int ttm_bo_setup_vm(struct ttm_buffer_object *bo)
- {
- 	struct ttm_bo_device *bdev = bo->bdev;
--	int ret;
--
--retry_pre_get:
--	ret = drm_mm_pre_get(&bdev->addr_space_mm);
--	if (unlikely(ret != 0))
--		return ret;
--
--	write_lock(&bdev->vm_lock);
--	bo->vm_node = drm_mm_search_free(&bdev->addr_space_mm,
--					 bo->mem.num_pages, 0, 0);
--
--	if (unlikely(bo->vm_node == NULL)) {
--		ret = -ENOMEM;
--		goto out_unlock;
--	}
- 
--	bo->vm_node = drm_mm_get_block_atomic(bo->vm_node,
--					      bo->mem.num_pages, 0);
--
--	if (unlikely(bo->vm_node == NULL)) {
--		write_unlock(&bdev->vm_lock);
--		goto retry_pre_get;
--	}
--
--	ttm_bo_vm_insert_rb(bo);
--	write_unlock(&bdev->vm_lock);
--	bo->addr_space_offset = ((uint64_t) bo->vm_node->start) << PAGE_SHIFT;
--
--	return 0;
--out_unlock:
--	write_unlock(&bdev->vm_lock);
--	return ret;
-+	return drm_vma_offset_add(&bdev->vma_manager, &bo->vma_node,
-+				  bo->mem.num_pages);
- }
- 
- int ttm_bo_wait(struct ttm_buffer_object *bo,
-diff --git a/drivers/gpu/drm/ttm/ttm_bo_util.c b/drivers/gpu/drm/ttm/ttm_bo_util.c
-index b7f757158df7..7f6e018055bc 100644
---- a/drivers/gpu/drm/ttm/ttm_bo_util.c
-+++ b/drivers/gpu/drm/ttm/ttm_bo_util.c
-@@ -30,6 +30,7 @@
- 
- #include <drm/ttm/ttm_bo_driver.h>
- #include <drm/ttm/ttm_placement.h>
-+#include <drm/drm_vma_manager.h>
- #include <linux/io.h>
- #include <linux/highmem.h>
- #include <linux/wait.h>
-@@ -458,7 +459,7 @@ static int ttm_buffer_object_transfer(struct ttm_buffer_object *bo,
- 	INIT_LIST_HEAD(&fbo->lru);
- 	INIT_LIST_HEAD(&fbo->swap);
- 	INIT_LIST_HEAD(&fbo->io_reserve_lru);
--	fbo->vm_node = NULL;
-+	drm_vma_node_reset(&fbo->vma_node);
- 	atomic_set(&fbo->cpu_writers, 0);
- 
- 	spin_lock(&bdev->fence_lock);
-diff --git a/drivers/gpu/drm/ttm/ttm_bo_vm.c b/drivers/gpu/drm/ttm/ttm_bo_vm.c
-index 3df9f16b041c..8c0e2c020215 100644
---- a/drivers/gpu/drm/ttm/ttm_bo_vm.c
-+++ b/drivers/gpu/drm/ttm/ttm_bo_vm.c
-@@ -33,6 +33,7 @@
- #include <ttm/ttm_module.h>
- #include <ttm/ttm_bo_driver.h>
- #include <ttm/ttm_placement.h>
-+#include <drm/drm_vma_manager.h>
- #include <linux/mm.h>
- #include <linux/rbtree.h>
- #include <linux/module.h>
-@@ -40,37 +41,6 @@
- 
- #define TTM_BO_VM_NUM_PREFAULT 16
- 
--static struct ttm_buffer_object *ttm_bo_vm_lookup_rb(struct ttm_bo_device *bdev,
--						     unsigned long page_start,
--						     unsigned long num_pages)
--{
--	struct rb_node *cur = bdev->addr_space_rb.rb_node;
--	unsigned long cur_offset;
--	struct ttm_buffer_object *bo;
--	struct ttm_buffer_object *best_bo = NULL;
--
--	while (likely(cur != NULL)) {
--		bo = rb_entry(cur, struct ttm_buffer_object, vm_rb);
--		cur_offset = bo->vm_node->start;
--		if (page_start >= cur_offset) {
--			cur = cur->rb_right;
--			best_bo = bo;
--			if (page_start == cur_offset)
--				break;
--		} else
--			cur = cur->rb_left;
--	}
--
--	if (unlikely(best_bo == NULL))
--		return NULL;
--
--	if (unlikely((best_bo->vm_node->start + best_bo->num_pages) <
--		     (page_start + num_pages)))
--		return NULL;
--
--	return best_bo;
--}
--
- static int ttm_bo_vm_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
- {
- 	struct ttm_buffer_object *bo = (struct ttm_buffer_object *)
-@@ -146,9 +116,9 @@ static int ttm_bo_vm_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
- 	}
- 
- 	page_offset = ((address - vma->vm_start) >> PAGE_SHIFT) +
--	    bo->vm_node->start - vma->vm_pgoff;
-+	    drm_vma_node_start(&bo->vma_node) - vma->vm_pgoff;
- 	page_last = vma_pages(vma) +
--	    bo->vm_node->start - vma->vm_pgoff;
-+	    drm_vma_node_start(&bo->vma_node) - vma->vm_pgoff;
- 
- 	if (unlikely(page_offset >= bo->num_pages)) {
- 		retval = VM_FAULT_SIGBUS;
-@@ -249,6 +219,30 @@ static const struct vm_operations_struct ttm_bo_vm_ops = {
- 	.close = ttm_bo_vm_close
- };
- 
-+static struct ttm_buffer_object *ttm_bo_vm_lookup(struct ttm_bo_device *bdev,
-+						  unsigned long offset,
-+						  unsigned long pages)
-+{
-+	struct drm_vma_offset_node *node;
-+	struct ttm_buffer_object *bo = NULL;
-+
-+	drm_vma_offset_lock_lookup(&bdev->vma_manager);
-+
-+	node = drm_vma_offset_lookup_locked(&bdev->vma_manager, offset, pages);
-+	if (likely(node)) {
-+		bo = container_of(node, struct ttm_buffer_object, vma_node);
-+		if (!kref_get_unless_zero(&bo->kref))
-+			bo = NULL;
-+	}
-+
-+	drm_vma_offset_unlock_lookup(&bdev->vma_manager);
-+
-+	if (!bo)
-+		pr_err("Could not find buffer object to map\n");
-+
-+	return bo;
-+}
-+
- int ttm_bo_mmap(struct file *filp, struct vm_area_struct *vma,
- 		struct ttm_bo_device *bdev)
- {
-@@ -256,17 +250,9 @@ int ttm_bo_mmap(struct file *filp, struct vm_area_struct *vma,
- 	struct ttm_buffer_object *bo;
- 	int ret;
- 
--	read_lock(&bdev->vm_lock);
--	bo = ttm_bo_vm_lookup_rb(bdev, vma->vm_pgoff,
--				 vma_pages(vma));
--	if (likely(bo != NULL) && !kref_get_unless_zero(&bo->kref))
--		bo = NULL;
--	read_unlock(&bdev->vm_lock);
--
--	if (unlikely(bo == NULL)) {
--		pr_err("Could not find buffer object to map\n");
-+	bo = ttm_bo_vm_lookup(bdev, vma->vm_pgoff, vma_pages(vma));
-+	if (unlikely(!bo))
- 		return -EINVAL;
--	}
- 
- 	driver = bo->bdev->driver;
- 	if (unlikely(!driver->verify_access)) {
-@@ -324,12 +310,7 @@ ssize_t ttm_bo_io(struct ttm_bo_device *bdev, struct file *filp,
- 	bool no_wait = false;
- 	bool dummy;
- 
--	read_lock(&bdev->vm_lock);
--	bo = ttm_bo_vm_lookup_rb(bdev, dev_offset, 1);
--	if (likely(bo != NULL))
--		ttm_bo_reference(bo);
--	read_unlock(&bdev->vm_lock);
--
-+	bo = ttm_bo_vm_lookup(bdev, dev_offset, 1);
- 	if (unlikely(bo == NULL))
- 		return -EFAULT;
- 
-@@ -343,7 +324,7 @@ ssize_t ttm_bo_io(struct ttm_bo_device *bdev, struct file *filp,
- 	if (unlikely(ret != 0))
- 		goto out_unref;
- 
--	kmap_offset = dev_offset - bo->vm_node->start;
-+	kmap_offset = dev_offset - drm_vma_node_start(&bo->vma_node);
- 	if (unlikely(kmap_offset >= bo->num_pages)) {
- 		ret = -EFBIG;
- 		goto out_unref;
-diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c b/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c
-index 407d7f9fe8a8..40a4d91168f2 100644
---- a/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c
-+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c
-@@ -500,7 +500,7 @@ int vmw_dmabuf_alloc_ioctl(struct drm_device *dev, void *data,
- 		goto out_no_dmabuf;
- 
- 	rep->handle = handle;
--	rep->map_handle = dma_buf->base.addr_space_offset;
-+	rep->map_handle = drm_vma_node_offset_addr(&dma_buf->base.vma_node);
- 	rep->cur_gmr_id = handle;
- 	rep->cur_gmr_offset = 0;
- 
-@@ -834,7 +834,7 @@ int vmw_dumb_map_offset(struct drm_file *file_priv,
- 	if (ret != 0)
- 		return -EINVAL;
- 
--	*offset = out_buf->base.addr_space_offset;
-+	*offset = drm_vma_node_offset_addr(&out_buf->base.vma_node);
- 	vmw_dmabuf_unreference(&out_buf);
- 	return 0;
- }
-diff --git a/include/drm/ttm/ttm_bo_api.h b/include/drm/ttm/ttm_bo_api.h
-index 3cb5d848fb66..fcbe1983cc9a 100644
---- a/include/drm/ttm/ttm_bo_api.h
-+++ b/include/drm/ttm/ttm_bo_api.h
-@@ -32,12 +32,12 @@
- #define _TTM_BO_API_H_
- 
- #include <drm/drm_hashtab.h>
-+#include <drm/drm_vma_manager.h>
- #include <linux/kref.h>
- #include <linux/list.h>
- #include <linux/wait.h>
- #include <linux/mutex.h>
- #include <linux/mm.h>
--#include <linux/rbtree.h>
- #include <linux/bitmap.h>
- 
- struct ttm_bo_device;
-@@ -144,7 +144,6 @@ struct ttm_tt;
-  * @type: The bo type.
-  * @destroy: Destruction function. If NULL, kfree is used.
-  * @num_pages: Actual number of pages.
-- * @addr_space_offset: Address space offset.
-  * @acc_size: Accounted size for this object.
-  * @kref: Reference count of this buffer object. When this refcount reaches
-  * zero, the object is put on the delayed delete list.
-@@ -172,8 +171,7 @@ struct ttm_tt;
-  * @reserved: Deadlock-free lock used for synchronization state transitions.
-  * @sync_obj: Pointer to a synchronization object.
-  * @priv_flags: Flags describing buffer object internal state.
-- * @vm_rb: Rb node for the vm rb tree.
-- * @vm_node: Address space manager node.
-+ * @vma_node: Address space manager node.
-  * @offset: The current GPU offset, which can have different meanings
-  * depending on the memory type. For SYSTEM type memory, it should be 0.
-  * @cur_placement: Hint of current placement.
-@@ -200,7 +198,6 @@ struct ttm_buffer_object {
- 	enum ttm_bo_type type;
- 	void (*destroy) (struct ttm_buffer_object *);
- 	unsigned long num_pages;
--	uint64_t addr_space_offset;
- 	size_t acc_size;
- 
- 	/**
-@@ -254,13 +251,7 @@ struct ttm_buffer_object {
- 	void *sync_obj;
- 	unsigned long priv_flags;
- 
--	/**
--	 * Members protected by the bdev::vm_lock
--	 */
--
--	struct rb_node vm_rb;
--	struct drm_mm_node *vm_node;
--
-+	struct drm_vma_offset_node vma_node;
- 
- 	/**
- 	 * Special members that are protected by the reserve lock
-diff --git a/include/drm/ttm/ttm_bo_driver.h b/include/drm/ttm/ttm_bo_driver.h
-index 9c8dca79808e..8cc4c73d9bc4 100644
---- a/include/drm/ttm/ttm_bo_driver.h
-+++ b/include/drm/ttm/ttm_bo_driver.h
-@@ -35,6 +35,7 @@
- #include <ttm/ttm_module.h>
- #include <drm/drm_mm.h>
- #include <drm/drm_global.h>
-+#include <drm/drm_vma_manager.h>
- #include <linux/workqueue.h>
- #include <linux/fs.h>
- #include <linux/spinlock.h>
-@@ -517,7 +518,7 @@ struct ttm_bo_global {
-  * @man: An array of mem_type_managers.
-  * @fence_lock: Protects the synchronizing members on *all* bos belonging
-  * to this device.
-- * @addr_space_mm: Range manager for the device address space.
-+ * @vma_manager: Address space manager
-  * lru_lock: Spinlock that protects the buffer+device lru lists and
-  * ddestroy lists.
-  * @val_seq: Current validation sequence.
-@@ -535,14 +536,13 @@ struct ttm_bo_device {
- 	struct list_head device_list;
- 	struct ttm_bo_global *glob;
- 	struct ttm_bo_driver *driver;
--	rwlock_t vm_lock;
- 	struct ttm_mem_type_manager man[TTM_NUM_MEM_TYPES];
- 	spinlock_t fence_lock;
-+
- 	/*
--	 * Protected by the vm lock.
-+	 * Protected by internal locks.
- 	 */
--	struct rb_root addr_space_rb;
--	struct drm_mm addr_space_mm;
-+	struct drm_vma_offset_manager vma_manager;
- 
- 	/*
- 	 * Protected by the global:lru lock.
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0523-drm-vma-provide-drm_vma_node_unmap-helper.patch b/patches.baytrail/0523-drm-vma-provide-drm_vma_node_unmap-helper.patch
deleted file mode 100644
index 660eb02889fe0..0000000000000
--- a/patches.baytrail/0523-drm-vma-provide-drm_vma_node_unmap-helper.patch
+++ /dev/null
@@ -1,108 +0,0 @@
-From 32a9d247c614b7b396211a1205bade73c92a9d46 Mon Sep 17 00:00:00 2001
-From: David Herrmann <dh.herrmann@gmail.com>
-Date: Wed, 24 Jul 2013 21:10:03 +0200
-Subject: drm/vma: provide drm_vma_node_unmap() helper
-
-Instead of unmapping the nodes in TTM and GEM users manually, we provide
-a generic wrapper which does the correct thing for all vma-nodes.
-
-v2: remove bdev->dev_mapping test in ttm_bo_unmap_virtual_unlocked() as
-ttm_mem_io_free_vm() does nothing in that case (io_reserved_vm is 0).
-v4: Fix docbook comments
-v5: use drm_vma_node_size()
-
-Cc: Dave Airlie <airlied@redhat.com>
-Cc: Maarten Lankhorst <maarten.lankhorst@canonical.com>
-Cc: Thomas Hellstrom <thellstrom@vmware.com>
-Signed-off-by: David Herrmann <dh.herrmann@gmail.com>
-Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Signed-off-by: Dave Airlie <airlied@gmail.com>
-(cherry picked from commit 51335df9f044ccfafb029f4d7fbeb11c4526340a)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem.c |  6 +-----
- drivers/gpu/drm/ttm/ttm_bo.c    | 11 +----------
- include/drm/drm_vma_manager.h   | 22 ++++++++++++++++++++++
- 3 files changed, 24 insertions(+), 15 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index 607dc675840e..7221793239c3 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -1423,11 +1423,7 @@ i915_gem_release_mmap(struct drm_i915_gem_object *obj)
- 	if (!obj->fault_mappable)
- 		return;
- 
--	if (obj->base.dev->dev_mapping)
--		unmap_mapping_range(obj->base.dev->dev_mapping,
--				    (loff_t)drm_vma_node_offset_addr(&obj->base.vma_node),
--				    obj->base.size, 1);
--
-+	drm_vma_node_unmap(&obj->base.vma_node, obj->base.dev->dev_mapping);
- 	obj->fault_mappable = false;
- }
- 
-diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c
-index 447010fbc2cd..80db5b3b31e5 100644
---- a/drivers/gpu/drm/ttm/ttm_bo.c
-+++ b/drivers/gpu/drm/ttm/ttm_bo.c
-@@ -1660,17 +1660,8 @@ bool ttm_mem_reg_is_pci(struct ttm_bo_device *bdev, struct ttm_mem_reg *mem)
- void ttm_bo_unmap_virtual_locked(struct ttm_buffer_object *bo)
- {
- 	struct ttm_bo_device *bdev = bo->bdev;
--	loff_t offset, holelen;
- 
--	if (!bdev->dev_mapping)
--		return;
--
--	if (drm_vma_node_has_offset(&bo->vma_node)) {
--		offset = (loff_t) drm_vma_node_offset_addr(&bo->vma_node);
--		holelen = ((loff_t) bo->mem.num_pages) << PAGE_SHIFT;
--
--		unmap_mapping_range(bdev->dev_mapping, offset, holelen, 1);
--	}
-+	drm_vma_node_unmap(&bo->vma_node, bdev->dev_mapping);
- 	ttm_mem_io_free_vm(bo);
- }
- 
-diff --git a/include/drm/drm_vma_manager.h b/include/drm/drm_vma_manager.h
-index 7ee8c4babeb9..22eedac046ac 100644
---- a/include/drm/drm_vma_manager.h
-+++ b/include/drm/drm_vma_manager.h
-@@ -24,6 +24,7 @@
-  */
- 
- #include <drm/drm_mm.h>
-+#include <linux/mm.h>
- #include <linux/module.h>
- #include <linux/rbtree.h>
- #include <linux/spinlock.h>
-@@ -199,4 +200,25 @@ static inline __u64 drm_vma_node_offset_addr(struct drm_vma_offset_node *node)
- 	return ((__u64)node->vm_node.start) << PAGE_SHIFT;
- }
- 
-+/**
-+ * drm_vma_node_unmap() - Unmap offset node
-+ * @node: Offset node
-+ * @file_mapping: Address space to unmap @node from
-+ *
-+ * Unmap all userspace mappings for a given offset node. The mappings must be
-+ * associated with the @file_mapping address-space. If no offset exists or
-+ * the address-space is invalid, nothing is done.
-+ *
-+ * This call is unlocked. The caller must guarantee that drm_vma_offset_remove()
-+ * is not called on this node concurrently.
-+ */
-+static inline void drm_vma_node_unmap(struct drm_vma_offset_node *node,
-+				      struct address_space *file_mapping)
-+{
-+	if (file_mapping && drm_vma_node_has_offset(node))
-+		unmap_mapping_range(file_mapping,
-+				    drm_vma_node_offset_addr(node),
-+				    drm_vma_node_size(node) << PAGE_SHIFT, 1);
-+}
-+
- #endif /* __DRM_VMA_MANAGER_H__ */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0524-Re-create-dirty-merge-cb54b53.patch b/patches.baytrail/0524-Re-create-dirty-merge-cb54b53.patch
deleted file mode 100644
index b2a4dfc691592..0000000000000
--- a/patches.baytrail/0524-Re-create-dirty-merge-cb54b53.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From 98fe2cb687466b92fce162dfc0058656d4881557 Mon Sep 17 00:00:00 2001
-From: James Ausmus <james.ausmus@intel.com>
-Date: Thu, 10 Oct 2013 18:30:59 -0700
-Subject: Re-create dirty merge cb54b53
-
-Fix code up to post-merge state after cb54b53adae70701bdd77d848cea4b9b39b61cf9
-("Merge commit 'Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linux'")
-
-Signed-off-by: James Ausmus <james.ausmus@intel.com>
-(cherry picked from
- https://chromium.googlesource.com/chromiumos/third_party/kernel-next
- chromeos-3.10, e362220fa6a86569cf3c2dfa47ce24935da661d6)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_dma.c |    2 +-
- drivers/gpu/drm/i915/i915_gem.c |    2 +-
- 2 files changed, 2 insertions(+), 2 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_dma.c
-+++ b/drivers/gpu/drm/i915/i915_dma.c
-@@ -1500,8 +1500,8 @@ int i915_driver_load(struct drm_device *
- 
- 	spin_lock_init(&dev_priv->irq_lock);
- 	spin_lock_init(&dev_priv->gpu_error.lock);
--	spin_lock_init(&dev_priv->gt_lock);
- 	spin_lock_init(&dev_priv->backlight.lock);
-+	spin_lock_init(&dev_priv->gt_lock);
- 	mutex_init(&dev_priv->dpio_lock);
- 	mutex_init(&dev_priv->rps.hw_lock);
- 	mutex_init(&dev_priv->modeset_restore_lock);
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -4643,7 +4643,7 @@ i915_gem_inactive_shrink(struct shrinker
- 	list_for_each_entry(obj, &dev_priv->mm.unbound_list, global_list)
- 		if (obj->pages_pin_count == 0)
- 			cnt += obj->base.size >> PAGE_SHIFT;
--	list_for_each_entry(obj, &vm->inactive_list, global_list)
-+	list_for_each_entry(obj, &vm->inactive_list, mm_list)
- 		if (obj->pin_count == 0 && obj->pages_pin_count == 0)
- 			cnt += obj->base.size >> PAGE_SHIFT;
- 
diff --git a/patches.baytrail/0525-drm-i915-Colocate-all-GT-access-routines-in-the-same.patch b/patches.baytrail/0525-drm-i915-Colocate-all-GT-access-routines-in-the-same.patch
deleted file mode 100644
index 75d6aa3add671..0000000000000
--- a/patches.baytrail/0525-drm-i915-Colocate-all-GT-access-routines-in-the-same.patch
+++ /dev/null
@@ -1,1399 +0,0 @@
-From 130059e2fe52f76a0c8456856e75d84c9d478441 Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Fri, 19 Jul 2013 20:36:52 +0100
-Subject: drm/i915: Colocate all GT access routines in the same file
-
-Currently, the register access code is split between i915_drv.c and
-intel_pm.c. It only bares a superficial resemblance to the reset of the
-powermanagement code, so move it all into its own file. This is to ease
-further patches to enforce serialised register access.
-
-v2: Scan for random abuse of I915_WRITE_NOTRACE
-v3: Take the opportunity to rename the GT functions as uncore. Uncore is
-the term used by the hardware design (and bspec) for all functions
-outside of the GPU (and CPU) cores in what is also known as the System
-Agent.
-v4: Rebase onto SNB rc6 fixes
-
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
-[danvet: Wrestle patch into applying and inline
-intel_uncore_early_sanitize (plus move the old comment to the new
-function). Also keep the _santize postfix for intel_uncore_sanitize.]
-[danvet: Squash in fixup spotted by Chris on irc: We need to call
-intel_pm_init before intel_uncore_sanitize since the later will call
-cancel_work on the delayed rps setup work the former initializes.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 907b28c56ea40629aa6595ddfa414ec2fc7da41c)
-Signed-off-by: James Ausmus <james.ausmus@intel.com>
-
-Conflicts:
-	drivers/gpu/drm/i915/i915_dma.c
-	drivers/gpu/drm/i915/intel_pm.c
-	(context changes)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/Makefile        |    1 
- drivers/gpu/drm/i915/i915_debugfs.c  |   12 
- drivers/gpu/drm/i915/i915_dma.c      |   24 -
- drivers/gpu/drm/i915/i915_drv.c      |  271 ----------------
- drivers/gpu/drm/i915/i915_drv.h      |   31 +
- drivers/gpu/drm/i915/i915_irq.c      |    6 
- drivers/gpu/drm/i915/intel_display.c |    3 
- drivers/gpu/drm/i915/intel_drv.h     |    1 
- drivers/gpu/drm/i915/intel_pm.c      |  264 ----------------
- drivers/gpu/drm/i915/intel_uncore.c  |  571 +++++++++++++++++++++++++++++++++++
- 10 files changed, 613 insertions(+), 571 deletions(-)
- create mode 100644 drivers/gpu/drm/i915/intel_uncore.c
-
---- a/drivers/gpu/drm/i915/Makefile
-+++ b/drivers/gpu/drm/i915/Makefile
-@@ -38,6 +38,7 @@ i915-y := i915_drv.o i915_dma.o i915_irq
- 	  intel_sprite.o \
- 	  intel_opregion.o \
- 	  intel_sideband.o \
-+	  intel_uncore.o \
- 	  dvo_ch7xxx.o \
- 	  dvo_ch7017.o \
- 	  dvo_ivch.o \
---- a/drivers/gpu/drm/i915/i915_debugfs.c
-+++ b/drivers/gpu/drm/i915/i915_debugfs.c
-@@ -989,9 +989,9 @@ static int gen6_drpc_info(struct seq_fil
- 	if (ret)
- 		return ret;
- 
--	spin_lock_irq(&dev_priv->gt_lock);
--	forcewake_count = dev_priv->forcewake_count;
--	spin_unlock_irq(&dev_priv->gt_lock);
-+	spin_lock_irq(&dev_priv->uncore.lock);
-+	forcewake_count = dev_priv->uncore.forcewake_count;
-+	spin_unlock_irq(&dev_priv->uncore.lock);
- 
- 	if (forcewake_count) {
- 		seq_puts(m, "RC information inaccurate because somebody "
-@@ -1375,9 +1375,9 @@ static int i915_gen6_forcewake_count_inf
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	unsigned forcewake_count;
- 
--	spin_lock_irq(&dev_priv->gt_lock);
--	forcewake_count = dev_priv->forcewake_count;
--	spin_unlock_irq(&dev_priv->gt_lock);
-+	spin_lock_irq(&dev_priv->uncore.lock);
-+	forcewake_count = dev_priv->uncore.forcewake_count;
-+	spin_unlock_irq(&dev_priv->uncore.lock);
- 
- 	seq_printf(m, "forcewake count = %u\n", forcewake_count);
- 
---- a/drivers/gpu/drm/i915/i915_dma.c
-+++ b/drivers/gpu/drm/i915/i915_dma.c
-@@ -1444,22 +1444,6 @@ static void i915_dump_device_info(struct
- }
- 
- /**
-- * intel_early_sanitize_regs - clean up BIOS state
-- * @dev: DRM device
-- *
-- * This function must be called before we do any I915_READ or I915_WRITE. Its
-- * purpose is to clean up any state left by the BIOS that may affect us when
-- * reading and/or writing registers.
-- */
--static void intel_early_sanitize_regs(struct drm_device *dev)
--{
--	struct drm_i915_private *dev_priv = dev->dev_private;
--
--	if (HAS_FPGA_DBG_UNCLAIMED(dev))
--		I915_WRITE_NOTRACE(FPGA_DBG, FPGA_DBG_RM_NOCLAIM);
--}
--
--/**
-  * i915_driver_load - setup chip and create an initial config
-  * @dev: DRM device
-  * @flags: startup flags
-@@ -1501,7 +1485,7 @@ int i915_driver_load(struct drm_device *
- 	spin_lock_init(&dev_priv->irq_lock);
- 	spin_lock_init(&dev_priv->gpu_error.lock);
- 	spin_lock_init(&dev_priv->backlight.lock);
--	spin_lock_init(&dev_priv->gt_lock);
-+	spin_lock_init(&dev_priv->uncore.lock);
- 	mutex_init(&dev_priv->dpio_lock);
- 	mutex_init(&dev_priv->rps.hw_lock);
- 	mutex_init(&dev_priv->modeset_restore_lock);
-@@ -1537,7 +1521,7 @@ int i915_driver_load(struct drm_device *
- 		goto put_bridge;
- 	}
- 
--	intel_early_sanitize_regs(dev);
-+	intel_uncore_early_sanitize(dev);
- 
- 	if (IS_HASWELL(dev) && (I915_READ(HSW_EDRAM_PRESENT) == 1)) {
- 		/* The docs do not explain exactly how the calculation can be
-@@ -1611,8 +1595,8 @@ int i915_driver_load(struct drm_device *
- 
- 	intel_irq_init(dev);
- 	intel_pm_init(dev);
--	intel_gt_sanitize(dev);
--	intel_gt_init(dev);
-+	intel_uncore_sanitize(dev);
-+	intel_uncore_init(dev);
- 
- 	/* Try to make sure MCHBAR is enabled before poking at it */
- 	intel_setup_mchbar(dev);
---- a/drivers/gpu/drm/i915/i915_drv.c
-+++ b/drivers/gpu/drm/i915/i915_drv.c
-@@ -723,7 +723,7 @@ static int i915_drm_thaw(struct drm_devi
- {
- 	int error = 0;
- 
--	intel_gt_sanitize(dev);
-+	intel_uncore_sanitize(dev);
- 
- 	if (drm_core_check_feature(dev, DRIVER_MODESET)) {
- 		mutex_lock(&dev->struct_mutex);
-@@ -749,7 +749,7 @@ int i915_resume(struct drm_device *dev)
- 
- 	pci_set_master(dev->pdev);
- 
--	intel_gt_sanitize(dev);
-+	intel_uncore_sanitize(dev);
- 
- 	/*
- 	 * Platforms with opregion should have sane BIOS, older ones (gen3 and
-@@ -770,140 +770,6 @@ int i915_resume(struct drm_device *dev)
- 	return 0;
- }
- 
--static int i8xx_do_reset(struct drm_device *dev)
--{
--	struct drm_i915_private *dev_priv = dev->dev_private;
--
--	if (IS_I85X(dev))
--		return -ENODEV;
--
--	I915_WRITE(D_STATE, I915_READ(D_STATE) | DSTATE_GFX_RESET_I830);
--	POSTING_READ(D_STATE);
--
--	if (IS_I830(dev) || IS_845G(dev)) {
--		I915_WRITE(DEBUG_RESET_I830,
--			   DEBUG_RESET_DISPLAY |
--			   DEBUG_RESET_RENDER |
--			   DEBUG_RESET_FULL);
--		POSTING_READ(DEBUG_RESET_I830);
--		msleep(1);
--
--		I915_WRITE(DEBUG_RESET_I830, 0);
--		POSTING_READ(DEBUG_RESET_I830);
--	}
--
--	msleep(1);
--
--	I915_WRITE(D_STATE, I915_READ(D_STATE) & ~DSTATE_GFX_RESET_I830);
--	POSTING_READ(D_STATE);
--
--	return 0;
--}
--
--static int i965_reset_complete(struct drm_device *dev)
--{
--	u8 gdrst;
--	pci_read_config_byte(dev->pdev, I965_GDRST, &gdrst);
--	return (gdrst & GRDOM_RESET_ENABLE) == 0;
--}
--
--static int i965_do_reset(struct drm_device *dev)
--{
--	int ret;
--
--	/*
--	 * Set the domains we want to reset (GRDOM/bits 2 and 3) as
--	 * well as the reset bit (GR/bit 0).  Setting the GR bit
--	 * triggers the reset; when done, the hardware will clear it.
--	 */
--	pci_write_config_byte(dev->pdev, I965_GDRST,
--			      GRDOM_RENDER | GRDOM_RESET_ENABLE);
--	ret =  wait_for(i965_reset_complete(dev), 500);
--	if (ret)
--		return ret;
--
--	/* We can't reset render&media without also resetting display ... */
--	pci_write_config_byte(dev->pdev, I965_GDRST,
--			      GRDOM_MEDIA | GRDOM_RESET_ENABLE);
--
--	ret =  wait_for(i965_reset_complete(dev), 500);
--	if (ret)
--		return ret;
--
--	pci_write_config_byte(dev->pdev, I965_GDRST, 0);
--
--	return 0;
--}
--
--static int ironlake_do_reset(struct drm_device *dev)
--{
--	struct drm_i915_private *dev_priv = dev->dev_private;
--	u32 gdrst;
--	int ret;
--
--	gdrst = I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR);
--	gdrst &= ~GRDOM_MASK;
--	I915_WRITE(MCHBAR_MIRROR_BASE + ILK_GDSR,
--		   gdrst | GRDOM_RENDER | GRDOM_RESET_ENABLE);
--	ret = wait_for(I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR) & 0x1, 500);
--	if (ret)
--		return ret;
--
--	/* We can't reset render&media without also resetting display ... */
--	gdrst = I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR);
--	gdrst &= ~GRDOM_MASK;
--	I915_WRITE(MCHBAR_MIRROR_BASE + ILK_GDSR,
--		   gdrst | GRDOM_MEDIA | GRDOM_RESET_ENABLE);
--	return wait_for(I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR) & 0x1, 500);
--}
--
--static int gen6_do_reset(struct drm_device *dev)
--{
--	struct drm_i915_private *dev_priv = dev->dev_private;
--	int	ret;
--	unsigned long irqflags;
--
--	/* Hold gt_lock across reset to prevent any register access
--	 * with forcewake not set correctly
--	 */
--	spin_lock_irqsave(&dev_priv->gt_lock, irqflags);
--
--	/* Reset the chip */
--
--	/* GEN6_GDRST is not in the gt power well, no need to check
--	 * for fifo space for the write or forcewake the chip for
--	 * the read
--	 */
--	I915_WRITE_NOTRACE(GEN6_GDRST, GEN6_GRDOM_FULL);
--
--	/* Spin waiting for the device to ack the reset request */
--	ret = wait_for((I915_READ_NOTRACE(GEN6_GDRST) & GEN6_GRDOM_FULL) == 0, 500);
--
--	/* If reset with a user forcewake, try to restore, otherwise turn it off */
--	if (dev_priv->forcewake_count)
--		dev_priv->gt.force_wake_get(dev_priv);
--	else
--		dev_priv->gt.force_wake_put(dev_priv);
--
--	/* Restore fifo count */
--	dev_priv->gt_fifo_count = I915_READ_NOTRACE(GT_FIFO_FREE_ENTRIES);
--
--	spin_unlock_irqrestore(&dev_priv->gt_lock, irqflags);
--	return ret;
--}
--
--int intel_gpu_reset(struct drm_device *dev)
--{
--	switch (INTEL_INFO(dev)->gen) {
--	case 7:
--	case 6: return gen6_do_reset(dev);
--	case 5: return ironlake_do_reset(dev);
--	case 4: return i965_do_reset(dev);
--	case 2: return i8xx_do_reset(dev);
--	default: return -ENODEV;
--	}
--}
--
- /**
-  * i915_reset - reset chip after a hang
-  * @dev: drm device to reset
-@@ -1233,136 +1099,3 @@ module_exit(i915_exit);
- MODULE_AUTHOR(DRIVER_AUTHOR);
- MODULE_DESCRIPTION(DRIVER_DESC);
- MODULE_LICENSE("GPL and additional rights");
--
--/* We give fast paths for the really cool registers */
--#define NEEDS_FORCE_WAKE(dev_priv, reg) \
--	((HAS_FORCE_WAKE((dev_priv)->dev)) && \
--	 ((reg) < 0x40000) &&            \
--	 ((reg) != FORCEWAKE))
--static void
--ilk_dummy_write(struct drm_i915_private *dev_priv)
--{
--	/* WaIssueDummyWriteToWakeupFromRC6:ilk Issue a dummy write to wake up
--	 * the chip from rc6 before touching it for real. MI_MODE is masked,
--	 * hence harmless to write 0 into. */
--	I915_WRITE_NOTRACE(MI_MODE, 0);
--}
--
--static void
--hsw_unclaimed_reg_clear(struct drm_i915_private *dev_priv, u32 reg)
--{
--	if (HAS_FPGA_DBG_UNCLAIMED(dev_priv->dev) &&
--	    (I915_READ_NOTRACE(FPGA_DBG) & FPGA_DBG_RM_NOCLAIM)) {
--		DRM_ERROR("Unknown unclaimed register before writing to %x\n",
--			  reg);
--		I915_WRITE_NOTRACE(FPGA_DBG, FPGA_DBG_RM_NOCLAIM);
--	}
--}
--
--static void
--hsw_unclaimed_reg_check(struct drm_i915_private *dev_priv, u32 reg)
--{
--	if (HAS_FPGA_DBG_UNCLAIMED(dev_priv->dev) &&
--	    (I915_READ_NOTRACE(FPGA_DBG) & FPGA_DBG_RM_NOCLAIM)) {
--		DRM_ERROR("Unclaimed write to %x\n", reg);
--		I915_WRITE_NOTRACE(FPGA_DBG, FPGA_DBG_RM_NOCLAIM);
--	}
--}
--
--#define __i915_read(x, y) \
--u##x i915_read##x(struct drm_i915_private *dev_priv, u32 reg) { \
--	unsigned long irqflags; \
--	u##x val = 0; \
--	spin_lock_irqsave(&dev_priv->gt_lock, irqflags); \
--	if (IS_GEN5(dev_priv->dev)) \
--		ilk_dummy_write(dev_priv); \
--	if (NEEDS_FORCE_WAKE((dev_priv), (reg))) { \
--		if (dev_priv->forcewake_count == 0) \
--			dev_priv->gt.force_wake_get(dev_priv); \
--		val = read##y(dev_priv->regs + reg); \
--		if (dev_priv->forcewake_count == 0) \
--			dev_priv->gt.force_wake_put(dev_priv); \
--	} else { \
--		val = read##y(dev_priv->regs + reg); \
--	} \
--	spin_unlock_irqrestore(&dev_priv->gt_lock, irqflags); \
--	trace_i915_reg_rw(false, reg, val, sizeof(val)); \
--	return val; \
--}
--
--__i915_read(8, b)
--__i915_read(16, w)
--__i915_read(32, l)
--__i915_read(64, q)
--#undef __i915_read
--
--#define __i915_write(x, y) \
--void i915_write##x(struct drm_i915_private *dev_priv, u32 reg, u##x val) { \
--	unsigned long irqflags; \
--	u32 __fifo_ret = 0; \
--	trace_i915_reg_rw(true, reg, val, sizeof(val)); \
--	spin_lock_irqsave(&dev_priv->gt_lock, irqflags); \
--	if (NEEDS_FORCE_WAKE((dev_priv), (reg))) { \
--		__fifo_ret = __gen6_gt_wait_for_fifo(dev_priv); \
--	} \
--	if (IS_GEN5(dev_priv->dev)) \
--		ilk_dummy_write(dev_priv); \
--	hsw_unclaimed_reg_clear(dev_priv, reg); \
--	write##y(val, dev_priv->regs + reg); \
--	if (unlikely(__fifo_ret)) { \
--		gen6_gt_check_fifodbg(dev_priv); \
--	} \
--	hsw_unclaimed_reg_check(dev_priv, reg); \
--	spin_unlock_irqrestore(&dev_priv->gt_lock, irqflags); \
--}
--__i915_write(8, b)
--__i915_write(16, w)
--__i915_write(32, l)
--__i915_write(64, q)
--#undef __i915_write
--
--static const struct register_whitelist {
--	uint64_t offset;
--	uint32_t size;
--	uint32_t gen_bitmask; /* support gens, 0x10 for 4, 0x30 for 4 and 5, etc. */
--} whitelist[] = {
--	{ RING_TIMESTAMP(RENDER_RING_BASE), 8, 0xF0 },
--};
--
--int i915_reg_read_ioctl(struct drm_device *dev,
--			void *data, struct drm_file *file)
--{
--	struct drm_i915_private *dev_priv = dev->dev_private;
--	struct drm_i915_reg_read *reg = data;
--	struct register_whitelist const *entry = whitelist;
--	int i;
--
--	for (i = 0; i < ARRAY_SIZE(whitelist); i++, entry++) {
--		if (entry->offset == reg->offset &&
--		    (1 << INTEL_INFO(dev)->gen & entry->gen_bitmask))
--			break;
--	}
--
--	if (i == ARRAY_SIZE(whitelist))
--		return -EINVAL;
--
--	switch (entry->size) {
--	case 8:
--		reg->val = I915_READ64(reg->offset);
--		break;
--	case 4:
--		reg->val = I915_READ(reg->offset);
--		break;
--	case 2:
--		reg->val = I915_READ16(reg->offset);
--		break;
--	case 1:
--		reg->val = I915_READ8(reg->offset);
--		break;
--	default:
--		WARN_ON(1);
--		return -EINVAL;
--	}
--
--	return 0;
--}
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -391,11 +391,20 @@ struct drm_i915_display_funcs {
- 	/* pll clock increase/decrease */
- };
- 
--struct drm_i915_gt_funcs {
-+struct intel_uncore_funcs {
- 	void (*force_wake_get)(struct drm_i915_private *dev_priv);
- 	void (*force_wake_put)(struct drm_i915_private *dev_priv);
- };
- 
-+struct intel_uncore {
-+	spinlock_t lock; /** lock is also taken in irq contexts. */
-+
-+	struct intel_uncore_funcs funcs;
-+
-+	unsigned fifo_count;
-+	unsigned forcewake_count;
-+};
-+
- #define DEV_INFO_FOR_EACH_FLAG(func, sep) \
- 	func(is_mobile) sep \
- 	func(is_i85x) sep \
-@@ -1045,14 +1054,7 @@ typedef struct drm_i915_private {
- 
- 	void __iomem *regs;
- 
--	struct drm_i915_gt_funcs gt;
--	/** gt_fifo_count and the subsequent register write are synchronized
--	 * with dev->struct_mutex. */
--	unsigned gt_fifo_count;
--	/** forcewake_count is protected by gt_lock */
--	unsigned forcewake_count;
--	/** gt_lock is also taken in irq contexts. */
--	spinlock_t gt_lock;
-+	struct intel_uncore uncore;
- 
- 	struct intel_gmbus gmbus[GMBUS_NUM_PORTS];
- 
-@@ -1671,8 +1673,14 @@ void i915_handle_error(struct drm_device
- extern void intel_irq_init(struct drm_device *dev);
- extern void intel_pm_init(struct drm_device *dev);
- extern void intel_hpd_init(struct drm_device *dev);
--extern void intel_gt_init(struct drm_device *dev);
--extern void intel_gt_sanitize(struct drm_device *dev);
-+extern void intel_pm_init(struct drm_device *dev);
-+
-+extern void intel_uncore_sanitize(struct drm_device *dev);
-+extern void intel_uncore_early_sanitize(struct drm_device *dev);
-+extern void intel_uncore_init(struct drm_device *dev);
-+extern void intel_uncore_reset(struct drm_device *dev);
-+extern void intel_uncore_clear_errors(struct drm_device *dev);
-+extern void intel_uncore_check_errors(struct drm_device *dev);
- 
- void
- i915_enable_pipestat(drm_i915_private_t *dev_priv, int pipe, u32 mask);
-@@ -2108,7 +2116,6 @@ extern void intel_display_print_error_st
-  */
- void gen6_gt_force_wake_get(struct drm_i915_private *dev_priv);
- void gen6_gt_force_wake_put(struct drm_i915_private *dev_priv);
--int __gen6_gt_wait_for_fifo(struct drm_i915_private *dev_priv);
- 
- int sandybridge_pcode_read(struct drm_i915_private *dev_priv, u8 mbox, u32 *val);
- int sandybridge_pcode_write(struct drm_i915_private *dev_priv, u8 mbox, u32 val);
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -1307,11 +1307,7 @@ static irqreturn_t ironlake_irq_handler(
- 
- 	/* We get interrupts on unclaimed registers, so check for this before we
- 	 * do any I915_{READ,WRITE}. */
--	if (IS_HASWELL(dev) &&
--	    (I915_READ_NOTRACE(FPGA_DBG) & FPGA_DBG_RM_NOCLAIM)) {
--		DRM_ERROR("Unclaimed register before interrupt\n");
--		I915_WRITE_NOTRACE(FPGA_DBG, FPGA_DBG_RM_NOCLAIM);
--	}
-+	intel_uncore_check_errors(dev);
- 
- 	/* disable master interrupt before clearing iir  */
- 	de_ier = I915_READ(DEIER);
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -10484,8 +10484,7 @@ intel_display_capture_error_state(struct
- 	 * well was on, so here we have to clear the FPGA_DBG_RM_NOCLAIM bit to
- 	 * prevent the next I915_WRITE from detecting it and printing an error
- 	 * message. */
--	if (HAS_POWER_WELL(dev))
--		I915_WRITE_NOTRACE(FPGA_DBG, FPGA_DBG_RM_NOCLAIM);
-+	intel_uncore_clear_errors(dev);
- 
- 	return error;
- }
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -806,7 +806,6 @@ extern void intel_init_power_well(struct
- extern void intel_set_power_well(struct drm_device *dev, bool enable);
- extern void intel_enable_gt_powersave(struct drm_device *dev);
- extern void intel_disable_gt_powersave(struct drm_device *dev);
--extern void gen6_gt_check_fifodbg(struct drm_i915_private *dev_priv);
- extern void ironlake_teardown_rc6(struct drm_device *dev);
- 
- extern bool intel_ddi_get_hw_state(struct intel_encoder *encoder,
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -32,8 +32,6 @@
- #include <linux/module.h>
- #include <drm/i915_powerwell.h>
- 
--#define FORCEWAKE_ACK_TIMEOUT_MS 2
--
- /* FBC, or Frame Buffer Compression, is a technique employed to compress the
-  * framebuffer contents in-memory, aiming at reducing the required bandwidth
-  * during in-memory transfers and, therefore, reduce the power packet.
-@@ -5307,260 +5305,6 @@ void intel_init_pm(struct drm_device *de
- 	}
- }
- 
--static void __gen6_gt_wait_for_thread_c0(struct drm_i915_private *dev_priv)
--{
--	u32 gt_thread_status_mask;
--
--	if (IS_HASWELL(dev_priv->dev))
--		gt_thread_status_mask = GEN6_GT_THREAD_STATUS_CORE_MASK_HSW;
--	else
--		gt_thread_status_mask = GEN6_GT_THREAD_STATUS_CORE_MASK;
--
--	/* w/a for a sporadic read returning 0 by waiting for the GT
--	 * thread to wake up.
--	 */
--	if (wait_for_atomic_us((I915_READ_NOTRACE(GEN6_GT_THREAD_STATUS_REG) & gt_thread_status_mask) == 0, 500))
--		DRM_ERROR("GT thread status wait timed out\n");
--}
--
--static void __gen6_gt_force_wake_reset(struct drm_i915_private *dev_priv)
--{
--	I915_WRITE_NOTRACE(FORCEWAKE, 0);
--	POSTING_READ(ECOBUS); /* something from same cacheline, but !FORCEWAKE */
--}
--
--static void __gen6_gt_force_wake_get(struct drm_i915_private *dev_priv)
--{
--	if (wait_for_atomic((I915_READ_NOTRACE(FORCEWAKE_ACK) & 1) == 0,
--			    FORCEWAKE_ACK_TIMEOUT_MS))
--		DRM_ERROR("Timed out waiting for forcewake old ack to clear.\n");
--
--	I915_WRITE_NOTRACE(FORCEWAKE, 1);
--	POSTING_READ(ECOBUS); /* something from same cacheline, but !FORCEWAKE */
--
--	if (wait_for_atomic((I915_READ_NOTRACE(FORCEWAKE_ACK) & 1),
--			    FORCEWAKE_ACK_TIMEOUT_MS))
--		DRM_ERROR("Timed out waiting for forcewake to ack request.\n");
--
--	/* WaRsForcewakeWaitTC0:snb */
--	__gen6_gt_wait_for_thread_c0(dev_priv);
--}
--
--static void __gen6_gt_force_wake_mt_reset(struct drm_i915_private *dev_priv)
--{
--	I915_WRITE_NOTRACE(FORCEWAKE_MT, _MASKED_BIT_DISABLE(0xffff));
--	/* something from same cacheline, but !FORCEWAKE_MT */
--	POSTING_READ(ECOBUS);
--}
--
--static void __gen6_gt_force_wake_mt_get(struct drm_i915_private *dev_priv)
--{
--	u32 forcewake_ack;
--
--	if (IS_HASWELL(dev_priv->dev))
--		forcewake_ack = FORCEWAKE_ACK_HSW;
--	else
--		forcewake_ack = FORCEWAKE_MT_ACK;
--
--	if (wait_for_atomic((I915_READ_NOTRACE(forcewake_ack) & FORCEWAKE_KERNEL) == 0,
--			    FORCEWAKE_ACK_TIMEOUT_MS))
--		DRM_ERROR("Timed out waiting for forcewake old ack to clear.\n");
--
--	I915_WRITE_NOTRACE(FORCEWAKE_MT, _MASKED_BIT_ENABLE(FORCEWAKE_KERNEL));
--	/* something from same cacheline, but !FORCEWAKE_MT */
--	POSTING_READ(ECOBUS);
--
--	if (wait_for_atomic((I915_READ_NOTRACE(forcewake_ack) & FORCEWAKE_KERNEL),
--			    FORCEWAKE_ACK_TIMEOUT_MS))
--		DRM_ERROR("Timed out waiting for forcewake to ack request.\n");
--
--	/* WaRsForcewakeWaitTC0:ivb,hsw */
--	__gen6_gt_wait_for_thread_c0(dev_priv);
--}
--
--/*
-- * Generally this is called implicitly by the register read function. However,
-- * if some sequence requires the GT to not power down then this function should
-- * be called at the beginning of the sequence followed by a call to
-- * gen6_gt_force_wake_put() at the end of the sequence.
-- */
--void gen6_gt_force_wake_get(struct drm_i915_private *dev_priv)
--{
--	unsigned long irqflags;
--
--	spin_lock_irqsave(&dev_priv->gt_lock, irqflags);
--	if (dev_priv->forcewake_count++ == 0)
--		dev_priv->gt.force_wake_get(dev_priv);
--	spin_unlock_irqrestore(&dev_priv->gt_lock, irqflags);
--}
--
--void gen6_gt_check_fifodbg(struct drm_i915_private *dev_priv)
--{
--	u32 gtfifodbg;
--	gtfifodbg = I915_READ_NOTRACE(GTFIFODBG);
--	if (WARN(gtfifodbg & GT_FIFO_CPU_ERROR_MASK,
--	     "MMIO read or write has been dropped %x\n", gtfifodbg))
--		I915_WRITE_NOTRACE(GTFIFODBG, GT_FIFO_CPU_ERROR_MASK);
--}
--
--static void __gen6_gt_force_wake_put(struct drm_i915_private *dev_priv)
--{
--	I915_WRITE_NOTRACE(FORCEWAKE, 0);
--	/* something from same cacheline, but !FORCEWAKE */
--	POSTING_READ(ECOBUS);
--	gen6_gt_check_fifodbg(dev_priv);
--}
--
--static void __gen6_gt_force_wake_mt_put(struct drm_i915_private *dev_priv)
--{
--	I915_WRITE_NOTRACE(FORCEWAKE_MT, _MASKED_BIT_DISABLE(FORCEWAKE_KERNEL));
--	/* something from same cacheline, but !FORCEWAKE_MT */
--	POSTING_READ(ECOBUS);
--	gen6_gt_check_fifodbg(dev_priv);
--}
--
--/*
-- * see gen6_gt_force_wake_get()
-- */
--void gen6_gt_force_wake_put(struct drm_i915_private *dev_priv)
--{
--	unsigned long irqflags;
--
--	spin_lock_irqsave(&dev_priv->gt_lock, irqflags);
--	if (--dev_priv->forcewake_count == 0)
--		dev_priv->gt.force_wake_put(dev_priv);
--	spin_unlock_irqrestore(&dev_priv->gt_lock, irqflags);
--}
--
--int __gen6_gt_wait_for_fifo(struct drm_i915_private *dev_priv)
--{
--	int ret = 0;
--
--	if (dev_priv->gt_fifo_count < GT_FIFO_NUM_RESERVED_ENTRIES) {
--		int loop = 500;
--		u32 fifo = I915_READ_NOTRACE(GT_FIFO_FREE_ENTRIES);
--		while (fifo <= GT_FIFO_NUM_RESERVED_ENTRIES && loop--) {
--			udelay(10);
--			fifo = I915_READ_NOTRACE(GT_FIFO_FREE_ENTRIES);
--		}
--		if (WARN_ON(loop < 0 && fifo <= GT_FIFO_NUM_RESERVED_ENTRIES))
--			++ret;
--		dev_priv->gt_fifo_count = fifo;
--	}
--	dev_priv->gt_fifo_count--;
--
--	return ret;
--}
--
--static void vlv_force_wake_reset(struct drm_i915_private *dev_priv)
--{
--	I915_WRITE_NOTRACE(FORCEWAKE_VLV, _MASKED_BIT_DISABLE(0xffff));
--	/* something from same cacheline, but !FORCEWAKE_VLV */
--	POSTING_READ(FORCEWAKE_ACK_VLV);
--}
--
--static void vlv_force_wake_get(struct drm_i915_private *dev_priv)
--{
--	if (wait_for_atomic((I915_READ_NOTRACE(FORCEWAKE_ACK_VLV) & FORCEWAKE_KERNEL) == 0,
--			    FORCEWAKE_ACK_TIMEOUT_MS))
--		DRM_ERROR("Timed out waiting for forcewake old ack to clear.\n");
--
--	I915_WRITE_NOTRACE(FORCEWAKE_VLV, _MASKED_BIT_ENABLE(FORCEWAKE_KERNEL));
--	I915_WRITE_NOTRACE(FORCEWAKE_MEDIA_VLV,
--			   _MASKED_BIT_ENABLE(FORCEWAKE_KERNEL));
--
--	if (wait_for_atomic((I915_READ_NOTRACE(FORCEWAKE_ACK_VLV) & FORCEWAKE_KERNEL),
--			    FORCEWAKE_ACK_TIMEOUT_MS))
--		DRM_ERROR("Timed out waiting for GT to ack forcewake request.\n");
--
--	if (wait_for_atomic((I915_READ_NOTRACE(FORCEWAKE_ACK_MEDIA_VLV) &
--			     FORCEWAKE_KERNEL),
--			    FORCEWAKE_ACK_TIMEOUT_MS))
--		DRM_ERROR("Timed out waiting for media to ack forcewake request.\n");
--
--	/* WaRsForcewakeWaitTC0:vlv */
--	__gen6_gt_wait_for_thread_c0(dev_priv);
--}
--
--static void vlv_force_wake_put(struct drm_i915_private *dev_priv)
--{
--	I915_WRITE_NOTRACE(FORCEWAKE_VLV, _MASKED_BIT_DISABLE(FORCEWAKE_KERNEL));
--	I915_WRITE_NOTRACE(FORCEWAKE_MEDIA_VLV,
--			   _MASKED_BIT_DISABLE(FORCEWAKE_KERNEL));
--	/* The below doubles as a POSTING_READ */
--	gen6_gt_check_fifodbg(dev_priv);
--}
--
--void intel_gt_sanitize(struct drm_device *dev)
--{
--	struct drm_i915_private *dev_priv = dev->dev_private;
--
--	if (IS_VALLEYVIEW(dev)) {
--		vlv_force_wake_reset(dev_priv);
--	} else if (INTEL_INFO(dev)->gen >= 6) {
--		__gen6_gt_force_wake_reset(dev_priv);
--		if (IS_IVYBRIDGE(dev) || IS_HASWELL(dev))
--			__gen6_gt_force_wake_mt_reset(dev_priv);
--	}
--
--	/* BIOS often leaves RC6 enabled, but disable it for hw init */
--	if (INTEL_INFO(dev)->gen >= 6)
--		intel_disable_gt_powersave(dev);
--}
--
--void intel_gt_init(struct drm_device *dev)
--{
--	struct drm_i915_private *dev_priv = dev->dev_private;
--
--	if (IS_VALLEYVIEW(dev)) {
--		dev_priv->gt.force_wake_get = vlv_force_wake_get;
--		dev_priv->gt.force_wake_put = vlv_force_wake_put;
--	} else if (IS_HASWELL(dev)) {
--		dev_priv->gt.force_wake_get = __gen6_gt_force_wake_mt_get;
--		dev_priv->gt.force_wake_put = __gen6_gt_force_wake_mt_put;
--	} else if (IS_IVYBRIDGE(dev)) {
--		u32 ecobus;
--
--		/* IVB configs may use multi-threaded forcewake */
--
--		/* A small trick here - if the bios hasn't configured
--		 * MT forcewake, and if the device is in RC6, then
--		 * force_wake_mt_get will not wake the device and the
--		 * ECOBUS read will return zero. Which will be
--		 * (correctly) interpreted by the test below as MT
--		 * forcewake being disabled.
--		 */
--		mutex_lock(&dev->struct_mutex);
--		__gen6_gt_force_wake_mt_get(dev_priv);
--		ecobus = I915_READ_NOTRACE(ECOBUS);
--		__gen6_gt_force_wake_mt_put(dev_priv);
--		mutex_unlock(&dev->struct_mutex);
--
--		if (ecobus & FORCEWAKE_MT_ENABLE) {
--			dev_priv->gt.force_wake_get =
--						__gen6_gt_force_wake_mt_get;
--			dev_priv->gt.force_wake_put =
--						__gen6_gt_force_wake_mt_put;
--		} else {
--			DRM_INFO("No MT forcewake available on Ivybridge, this can result in issues\n");
--			DRM_INFO("when using vblank-synced partial screen updates.\n");
--			dev_priv->gt.force_wake_get = __gen6_gt_force_wake_get;
--			dev_priv->gt.force_wake_put = __gen6_gt_force_wake_put;
--		}
--	} else if (IS_GEN6(dev)) {
--		dev_priv->gt.force_wake_get = __gen6_gt_force_wake_get;
--		dev_priv->gt.force_wake_put = __gen6_gt_force_wake_put;
--	}
--}
--
--void intel_pm_init(struct drm_device *dev)
--{
--	struct drm_i915_private *dev_priv = dev->dev_private;
--
--	INIT_DELAYED_WORK(&dev_priv->rps.delayed_resume_work,
--			  intel_gen6_powersave_work);
--}
--
- int sandybridge_pcode_read(struct drm_i915_private *dev_priv, u8 mbox, u32 *val)
- {
- 	WARN_ON(!mutex_is_locked(&dev_priv->rps.hw_lock));
-@@ -5663,3 +5407,11 @@ int vlv_freq_opcode(int ddr_freq, int va
- 	return val;
- }
- 
-+void intel_pm_init(struct drm_device *dev)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+
-+	INIT_DELAYED_WORK(&dev_priv->rps.delayed_resume_work,
-+			  intel_gen6_powersave_work);
-+}
-+
---- /dev/null
-+++ b/drivers/gpu/drm/i915/intel_uncore.c
-@@ -0,0 +1,571 @@
-+/*
-+ * Copyright © 2013 Intel Corporation
-+ *
-+ * Permission is hereby granted, free of charge, to any person obtaining a
-+ * copy of this software and associated documentation files (the "Software"),
-+ * to deal in the Software without restriction, including without limitation
-+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
-+ * and/or sell copies of the Software, and to permit persons to whom the
-+ * Software is furnished to do so, subject to the following conditions:
-+ *
-+ * The above copyright notice and this permission notice (including the next
-+ * paragraph) shall be included in all copies or substantial portions of the
-+ * Software.
-+ *
-+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
-+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
-+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
-+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
-+ * IN THE SOFTWARE.
-+ */
-+
-+#include "i915_drv.h"
-+#include "intel_drv.h"
-+
-+#define FORCEWAKE_ACK_TIMEOUT_MS 2
-+
-+static void __gen6_gt_wait_for_thread_c0(struct drm_i915_private *dev_priv)
-+{
-+	u32 gt_thread_status_mask;
-+
-+	if (IS_HASWELL(dev_priv->dev))
-+		gt_thread_status_mask = GEN6_GT_THREAD_STATUS_CORE_MASK_HSW;
-+	else
-+		gt_thread_status_mask = GEN6_GT_THREAD_STATUS_CORE_MASK;
-+
-+	/* w/a for a sporadic read returning 0 by waiting for the GT
-+	 * thread to wake up.
-+	 */
-+	if (wait_for_atomic_us((I915_READ_NOTRACE(GEN6_GT_THREAD_STATUS_REG) & gt_thread_status_mask) == 0, 500))
-+		DRM_ERROR("GT thread status wait timed out\n");
-+}
-+
-+static void __gen6_gt_force_wake_reset(struct drm_i915_private *dev_priv)
-+{
-+	I915_WRITE_NOTRACE(FORCEWAKE, 0);
-+	POSTING_READ(ECOBUS); /* something from same cacheline, but !FORCEWAKE */
-+}
-+
-+static void __gen6_gt_force_wake_get(struct drm_i915_private *dev_priv)
-+{
-+	if (wait_for_atomic((I915_READ_NOTRACE(FORCEWAKE_ACK) & 1) == 0,
-+			    FORCEWAKE_ACK_TIMEOUT_MS))
-+		DRM_ERROR("Timed out waiting for forcewake old ack to clear.\n");
-+
-+	I915_WRITE_NOTRACE(FORCEWAKE, 1);
-+	POSTING_READ(ECOBUS); /* something from same cacheline, but !FORCEWAKE */
-+
-+	if (wait_for_atomic((I915_READ_NOTRACE(FORCEWAKE_ACK) & 1),
-+			    FORCEWAKE_ACK_TIMEOUT_MS))
-+		DRM_ERROR("Timed out waiting for forcewake to ack request.\n");
-+
-+	/* WaRsForcewakeWaitTC0:snb */
-+	__gen6_gt_wait_for_thread_c0(dev_priv);
-+}
-+
-+static void __gen6_gt_force_wake_mt_reset(struct drm_i915_private *dev_priv)
-+{
-+	I915_WRITE_NOTRACE(FORCEWAKE_MT, _MASKED_BIT_DISABLE(0xffff));
-+	/* something from same cacheline, but !FORCEWAKE_MT */
-+	POSTING_READ(ECOBUS);
-+}
-+
-+static void __gen6_gt_force_wake_mt_get(struct drm_i915_private *dev_priv)
-+{
-+	u32 forcewake_ack;
-+
-+	if (IS_HASWELL(dev_priv->dev))
-+		forcewake_ack = FORCEWAKE_ACK_HSW;
-+	else
-+		forcewake_ack = FORCEWAKE_MT_ACK;
-+
-+	if (wait_for_atomic((I915_READ_NOTRACE(forcewake_ack) & FORCEWAKE_KERNEL) == 0,
-+			    FORCEWAKE_ACK_TIMEOUT_MS))
-+		DRM_ERROR("Timed out waiting for forcewake old ack to clear.\n");
-+
-+	I915_WRITE_NOTRACE(FORCEWAKE_MT, _MASKED_BIT_ENABLE(FORCEWAKE_KERNEL));
-+	/* something from same cacheline, but !FORCEWAKE_MT */
-+	POSTING_READ(ECOBUS);
-+
-+	if (wait_for_atomic((I915_READ_NOTRACE(forcewake_ack) & FORCEWAKE_KERNEL),
-+			    FORCEWAKE_ACK_TIMEOUT_MS))
-+		DRM_ERROR("Timed out waiting for forcewake to ack request.\n");
-+
-+	/* WaRsForcewakeWaitTC0:ivb,hsw */
-+	__gen6_gt_wait_for_thread_c0(dev_priv);
-+}
-+
-+static void gen6_gt_check_fifodbg(struct drm_i915_private *dev_priv)
-+{
-+	u32 gtfifodbg;
-+	gtfifodbg = I915_READ_NOTRACE(GTFIFODBG);
-+	if (WARN(gtfifodbg & GT_FIFO_CPU_ERROR_MASK,
-+	     "MMIO read or write has been dropped %x\n", gtfifodbg))
-+		I915_WRITE_NOTRACE(GTFIFODBG, GT_FIFO_CPU_ERROR_MASK);
-+}
-+
-+static void __gen6_gt_force_wake_put(struct drm_i915_private *dev_priv)
-+{
-+	I915_WRITE_NOTRACE(FORCEWAKE, 0);
-+	/* something from same cacheline, but !FORCEWAKE */
-+	POSTING_READ(ECOBUS);
-+	gen6_gt_check_fifodbg(dev_priv);
-+}
-+
-+static void __gen6_gt_force_wake_mt_put(struct drm_i915_private *dev_priv)
-+{
-+	I915_WRITE_NOTRACE(FORCEWAKE_MT, _MASKED_BIT_DISABLE(FORCEWAKE_KERNEL));
-+	/* something from same cacheline, but !FORCEWAKE_MT */
-+	POSTING_READ(ECOBUS);
-+	gen6_gt_check_fifodbg(dev_priv);
-+}
-+
-+static int __gen6_gt_wait_for_fifo(struct drm_i915_private *dev_priv)
-+{
-+	int ret = 0;
-+
-+	if (dev_priv->uncore.fifo_count < GT_FIFO_NUM_RESERVED_ENTRIES) {
-+		int loop = 500;
-+		u32 fifo = I915_READ_NOTRACE(GT_FIFO_FREE_ENTRIES);
-+		while (fifo <= GT_FIFO_NUM_RESERVED_ENTRIES && loop--) {
-+			udelay(10);
-+			fifo = I915_READ_NOTRACE(GT_FIFO_FREE_ENTRIES);
-+		}
-+		if (WARN_ON(loop < 0 && fifo <= GT_FIFO_NUM_RESERVED_ENTRIES))
-+			++ret;
-+		dev_priv->uncore.fifo_count = fifo;
-+	}
-+	dev_priv->uncore.fifo_count--;
-+
-+	return ret;
-+}
-+
-+static void vlv_force_wake_reset(struct drm_i915_private *dev_priv)
-+{
-+	I915_WRITE_NOTRACE(FORCEWAKE_VLV, _MASKED_BIT_DISABLE(0xffff));
-+	/* something from same cacheline, but !FORCEWAKE_VLV */
-+	POSTING_READ(FORCEWAKE_ACK_VLV);
-+}
-+
-+static void vlv_force_wake_get(struct drm_i915_private *dev_priv)
-+{
-+	if (wait_for_atomic((I915_READ_NOTRACE(FORCEWAKE_ACK_VLV) & FORCEWAKE_KERNEL) == 0,
-+			    FORCEWAKE_ACK_TIMEOUT_MS))
-+		DRM_ERROR("Timed out waiting for forcewake old ack to clear.\n");
-+
-+	I915_WRITE_NOTRACE(FORCEWAKE_VLV, _MASKED_BIT_ENABLE(FORCEWAKE_KERNEL));
-+	I915_WRITE_NOTRACE(FORCEWAKE_MEDIA_VLV,
-+			   _MASKED_BIT_ENABLE(FORCEWAKE_KERNEL));
-+
-+	if (wait_for_atomic((I915_READ_NOTRACE(FORCEWAKE_ACK_VLV) & FORCEWAKE_KERNEL),
-+			    FORCEWAKE_ACK_TIMEOUT_MS))
-+		DRM_ERROR("Timed out waiting for GT to ack forcewake request.\n");
-+
-+	if (wait_for_atomic((I915_READ_NOTRACE(FORCEWAKE_ACK_MEDIA_VLV) &
-+			     FORCEWAKE_KERNEL),
-+			    FORCEWAKE_ACK_TIMEOUT_MS))
-+		DRM_ERROR("Timed out waiting for media to ack forcewake request.\n");
-+
-+	/* WaRsForcewakeWaitTC0:vlv */
-+	__gen6_gt_wait_for_thread_c0(dev_priv);
-+}
-+
-+static void vlv_force_wake_put(struct drm_i915_private *dev_priv)
-+{
-+	I915_WRITE_NOTRACE(FORCEWAKE_VLV, _MASKED_BIT_DISABLE(FORCEWAKE_KERNEL));
-+	I915_WRITE_NOTRACE(FORCEWAKE_MEDIA_VLV,
-+			   _MASKED_BIT_DISABLE(FORCEWAKE_KERNEL));
-+	/* The below doubles as a POSTING_READ */
-+	gen6_gt_check_fifodbg(dev_priv);
-+}
-+
-+void intel_uncore_early_sanitize(struct drm_device *dev)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+
-+	if (HAS_FPGA_DBG_UNCLAIMED(dev))
-+		I915_WRITE_NOTRACE(FPGA_DBG, FPGA_DBG_RM_NOCLAIM);
-+}
-+
-+void intel_uncore_init(struct drm_device *dev)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+
-+	if (IS_VALLEYVIEW(dev)) {
-+		dev_priv->uncore.funcs.force_wake_get = vlv_force_wake_get;
-+		dev_priv->uncore.funcs.force_wake_put = vlv_force_wake_put;
-+	} else if (IS_HASWELL(dev)) {
-+		dev_priv->uncore.funcs.force_wake_get = __gen6_gt_force_wake_mt_get;
-+		dev_priv->uncore.funcs.force_wake_put = __gen6_gt_force_wake_mt_put;
-+	} else if (IS_IVYBRIDGE(dev)) {
-+		u32 ecobus;
-+
-+		/* IVB configs may use multi-threaded forcewake */
-+
-+		/* A small trick here - if the bios hasn't configured
-+		 * MT forcewake, and if the device is in RC6, then
-+		 * force_wake_mt_get will not wake the device and the
-+		 * ECOBUS read will return zero. Which will be
-+		 * (correctly) interpreted by the test below as MT
-+		 * forcewake being disabled.
-+		 */
-+		mutex_lock(&dev->struct_mutex);
-+		__gen6_gt_force_wake_mt_get(dev_priv);
-+		ecobus = I915_READ_NOTRACE(ECOBUS);
-+		__gen6_gt_force_wake_mt_put(dev_priv);
-+		mutex_unlock(&dev->struct_mutex);
-+
-+		if (ecobus & FORCEWAKE_MT_ENABLE) {
-+			dev_priv->uncore.funcs.force_wake_get =
-+				__gen6_gt_force_wake_mt_get;
-+			dev_priv->uncore.funcs.force_wake_put =
-+				__gen6_gt_force_wake_mt_put;
-+		} else {
-+			DRM_INFO("No MT forcewake available on Ivybridge, this can result in issues\n");
-+			DRM_INFO("when using vblank-synced partial screen updates.\n");
-+			dev_priv->uncore.funcs.force_wake_get =
-+				__gen6_gt_force_wake_get;
-+			dev_priv->uncore.funcs.force_wake_put =
-+				__gen6_gt_force_wake_put;
-+		}
-+	} else if (IS_GEN6(dev)) {
-+		dev_priv->uncore.funcs.force_wake_get =
-+			__gen6_gt_force_wake_get;
-+		dev_priv->uncore.funcs.force_wake_put =
-+			__gen6_gt_force_wake_put;
-+	}
-+}
-+
-+void intel_uncore_sanitize(struct drm_device *dev)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+
-+	if (IS_VALLEYVIEW(dev)) {
-+		vlv_force_wake_reset(dev_priv);
-+	} else if (INTEL_INFO(dev)->gen >= 6) {
-+		__gen6_gt_force_wake_reset(dev_priv);
-+		if (IS_IVYBRIDGE(dev) || IS_HASWELL(dev))
-+			__gen6_gt_force_wake_mt_reset(dev_priv);
-+	}
-+
-+	/* BIOS often leaves RC6 enabled, but disable it for hw init */
-+	intel_disable_gt_powersave(dev);
-+}
-+
-+/*
-+ * Generally this is called implicitly by the register read function. However,
-+ * if some sequence requires the GT to not power down then this function should
-+ * be called at the beginning of the sequence followed by a call to
-+ * gen6_gt_force_wake_put() at the end of the sequence.
-+ */
-+void gen6_gt_force_wake_get(struct drm_i915_private *dev_priv)
-+{
-+	unsigned long irqflags;
-+
-+	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
-+	if (dev_priv->uncore.forcewake_count++ == 0)
-+		dev_priv->uncore.funcs.force_wake_get(dev_priv);
-+	spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
-+}
-+
-+/*
-+ * see gen6_gt_force_wake_get()
-+ */
-+void gen6_gt_force_wake_put(struct drm_i915_private *dev_priv)
-+{
-+	unsigned long irqflags;
-+
-+	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
-+	if (--dev_priv->uncore.forcewake_count == 0)
-+		dev_priv->uncore.funcs.force_wake_put(dev_priv);
-+	spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
-+}
-+
-+/* We give fast paths for the really cool registers */
-+#define NEEDS_FORCE_WAKE(dev_priv, reg) \
-+	((HAS_FORCE_WAKE((dev_priv)->dev)) && \
-+	 ((reg) < 0x40000) &&            \
-+	 ((reg) != FORCEWAKE))
-+
-+static void
-+ilk_dummy_write(struct drm_i915_private *dev_priv)
-+{
-+	/* WaIssueDummyWriteToWakeupFromRC6:ilk Issue a dummy write to wake up
-+	 * the chip from rc6 before touching it for real. MI_MODE is masked,
-+	 * hence harmless to write 0 into. */
-+	I915_WRITE_NOTRACE(MI_MODE, 0);
-+}
-+
-+static void
-+hsw_unclaimed_reg_clear(struct drm_i915_private *dev_priv, u32 reg)
-+{
-+	if (HAS_FPGA_DBG_UNCLAIMED(dev_priv->dev) &&
-+	    (I915_READ_NOTRACE(FPGA_DBG) & FPGA_DBG_RM_NOCLAIM)) {
-+		DRM_ERROR("Unknown unclaimed register before writing to %x\n",
-+			  reg);
-+		I915_WRITE_NOTRACE(FPGA_DBG, FPGA_DBG_RM_NOCLAIM);
-+	}
-+}
-+
-+static void
-+hsw_unclaimed_reg_check(struct drm_i915_private *dev_priv, u32 reg)
-+{
-+	if (HAS_FPGA_DBG_UNCLAIMED(dev_priv->dev) &&
-+	    (I915_READ_NOTRACE(FPGA_DBG) & FPGA_DBG_RM_NOCLAIM)) {
-+		DRM_ERROR("Unclaimed write to %x\n", reg);
-+		I915_WRITE_NOTRACE(FPGA_DBG, FPGA_DBG_RM_NOCLAIM);
-+	}
-+}
-+
-+#define __i915_read(x, y) \
-+u##x i915_read##x(struct drm_i915_private *dev_priv, u32 reg) { \
-+	unsigned long irqflags; \
-+	u##x val = 0; \
-+	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags); \
-+	if (IS_GEN5(dev_priv->dev)) \
-+		ilk_dummy_write(dev_priv); \
-+	if (NEEDS_FORCE_WAKE((dev_priv), (reg))) { \
-+		if (dev_priv->uncore.forcewake_count == 0) \
-+			dev_priv->uncore.funcs.force_wake_get(dev_priv); \
-+		val = read##y(dev_priv->regs + reg); \
-+		if (dev_priv->uncore.forcewake_count == 0) \
-+			dev_priv->uncore.funcs.force_wake_put(dev_priv); \
-+	} else { \
-+		val = read##y(dev_priv->regs + reg); \
-+	} \
-+	spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags); \
-+	trace_i915_reg_rw(false, reg, val, sizeof(val)); \
-+	return val; \
-+}
-+
-+__i915_read(8, b)
-+__i915_read(16, w)
-+__i915_read(32, l)
-+__i915_read(64, q)
-+#undef __i915_read
-+
-+#define __i915_write(x, y) \
-+void i915_write##x(struct drm_i915_private *dev_priv, u32 reg, u##x val) { \
-+	unsigned long irqflags; \
-+	u32 __fifo_ret = 0; \
-+	trace_i915_reg_rw(true, reg, val, sizeof(val)); \
-+	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags); \
-+	if (NEEDS_FORCE_WAKE((dev_priv), (reg))) { \
-+		__fifo_ret = __gen6_gt_wait_for_fifo(dev_priv); \
-+	} \
-+	if (IS_GEN5(dev_priv->dev)) \
-+		ilk_dummy_write(dev_priv); \
-+	hsw_unclaimed_reg_clear(dev_priv, reg); \
-+	write##y(val, dev_priv->regs + reg); \
-+	if (unlikely(__fifo_ret)) { \
-+		gen6_gt_check_fifodbg(dev_priv); \
-+	} \
-+	hsw_unclaimed_reg_check(dev_priv, reg); \
-+	spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags); \
-+}
-+__i915_write(8, b)
-+__i915_write(16, w)
-+__i915_write(32, l)
-+__i915_write(64, q)
-+#undef __i915_write
-+
-+static const struct register_whitelist {
-+	uint64_t offset;
-+	uint32_t size;
-+	uint32_t gen_bitmask; /* support gens, 0x10 for 4, 0x30 for 4 and 5, etc. */
-+} whitelist[] = {
-+	{ RING_TIMESTAMP(RENDER_RING_BASE), 8, 0xF0 },
-+};
-+
-+int i915_reg_read_ioctl(struct drm_device *dev,
-+			void *data, struct drm_file *file)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct drm_i915_reg_read *reg = data;
-+	struct register_whitelist const *entry = whitelist;
-+	int i;
-+
-+	for (i = 0; i < ARRAY_SIZE(whitelist); i++, entry++) {
-+		if (entry->offset == reg->offset &&
-+		    (1 << INTEL_INFO(dev)->gen & entry->gen_bitmask))
-+			break;
-+	}
-+
-+	if (i == ARRAY_SIZE(whitelist))
-+		return -EINVAL;
-+
-+	switch (entry->size) {
-+	case 8:
-+		reg->val = I915_READ64(reg->offset);
-+		break;
-+	case 4:
-+		reg->val = I915_READ(reg->offset);
-+		break;
-+	case 2:
-+		reg->val = I915_READ16(reg->offset);
-+		break;
-+	case 1:
-+		reg->val = I915_READ8(reg->offset);
-+		break;
-+	default:
-+		WARN_ON(1);
-+		return -EINVAL;
-+	}
-+
-+	return 0;
-+}
-+
-+static int i8xx_do_reset(struct drm_device *dev)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+
-+	if (IS_I85X(dev))
-+		return -ENODEV;
-+
-+	I915_WRITE(D_STATE, I915_READ(D_STATE) | DSTATE_GFX_RESET_I830);
-+	POSTING_READ(D_STATE);
-+
-+	if (IS_I830(dev) || IS_845G(dev)) {
-+		I915_WRITE(DEBUG_RESET_I830,
-+			   DEBUG_RESET_DISPLAY |
-+			   DEBUG_RESET_RENDER |
-+			   DEBUG_RESET_FULL);
-+		POSTING_READ(DEBUG_RESET_I830);
-+		msleep(1);
-+
-+		I915_WRITE(DEBUG_RESET_I830, 0);
-+		POSTING_READ(DEBUG_RESET_I830);
-+	}
-+
-+	msleep(1);
-+
-+	I915_WRITE(D_STATE, I915_READ(D_STATE) & ~DSTATE_GFX_RESET_I830);
-+	POSTING_READ(D_STATE);
-+
-+	return 0;
-+}
-+
-+static int i965_reset_complete(struct drm_device *dev)
-+{
-+	u8 gdrst;
-+	pci_read_config_byte(dev->pdev, I965_GDRST, &gdrst);
-+	return (gdrst & GRDOM_RESET_ENABLE) == 0;
-+}
-+
-+static int i965_do_reset(struct drm_device *dev)
-+{
-+	int ret;
-+
-+	/*
-+	 * Set the domains we want to reset (GRDOM/bits 2 and 3) as
-+	 * well as the reset bit (GR/bit 0).  Setting the GR bit
-+	 * triggers the reset; when done, the hardware will clear it.
-+	 */
-+	pci_write_config_byte(dev->pdev, I965_GDRST,
-+			      GRDOM_RENDER | GRDOM_RESET_ENABLE);
-+	ret =  wait_for(i965_reset_complete(dev), 500);
-+	if (ret)
-+		return ret;
-+
-+	/* We can't reset render&media without also resetting display ... */
-+	pci_write_config_byte(dev->pdev, I965_GDRST,
-+			      GRDOM_MEDIA | GRDOM_RESET_ENABLE);
-+
-+	ret =  wait_for(i965_reset_complete(dev), 500);
-+	if (ret)
-+		return ret;
-+
-+	pci_write_config_byte(dev->pdev, I965_GDRST, 0);
-+
-+	return 0;
-+}
-+
-+static int ironlake_do_reset(struct drm_device *dev)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	u32 gdrst;
-+	int ret;
-+
-+	gdrst = I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR);
-+	gdrst &= ~GRDOM_MASK;
-+	I915_WRITE(MCHBAR_MIRROR_BASE + ILK_GDSR,
-+		   gdrst | GRDOM_RENDER | GRDOM_RESET_ENABLE);
-+	ret = wait_for(I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR) & 0x1, 500);
-+	if (ret)
-+		return ret;
-+
-+	/* We can't reset render&media without also resetting display ... */
-+	gdrst = I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR);
-+	gdrst &= ~GRDOM_MASK;
-+	I915_WRITE(MCHBAR_MIRROR_BASE + ILK_GDSR,
-+		   gdrst | GRDOM_MEDIA | GRDOM_RESET_ENABLE);
-+	return wait_for(I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR) & 0x1, 500);
-+}
-+
-+static int gen6_do_reset(struct drm_device *dev)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	int	ret;
-+	unsigned long irqflags;
-+
-+	/* Hold uncore.lock across reset to prevent any register access
-+	 * with forcewake not set correctly
-+	 */
-+	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
-+
-+	/* Reset the chip */
-+
-+	/* GEN6_GDRST is not in the gt power well, no need to check
-+	 * for fifo space for the write or forcewake the chip for
-+	 * the read
-+	 */
-+	I915_WRITE_NOTRACE(GEN6_GDRST, GEN6_GRDOM_FULL);
-+
-+	/* Spin waiting for the device to ack the reset request */
-+	ret = wait_for((I915_READ_NOTRACE(GEN6_GDRST) & GEN6_GRDOM_FULL) == 0, 500);
-+
-+	/* If reset with a user forcewake, try to restore, otherwise turn it off */
-+	if (dev_priv->uncore.forcewake_count)
-+		dev_priv->uncore.funcs.force_wake_get(dev_priv);
-+	else
-+		dev_priv->uncore.funcs.force_wake_put(dev_priv);
-+
-+	/* Restore fifo count */
-+	dev_priv->uncore.fifo_count = I915_READ_NOTRACE(GT_FIFO_FREE_ENTRIES);
-+
-+	spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
-+	return ret;
-+}
-+
-+int intel_gpu_reset(struct drm_device *dev)
-+{
-+	switch (INTEL_INFO(dev)->gen) {
-+	case 7:
-+	case 6: return gen6_do_reset(dev);
-+	case 5: return ironlake_do_reset(dev);
-+	case 4: return i965_do_reset(dev);
-+	case 2: return i8xx_do_reset(dev);
-+	default: return -ENODEV;
-+	}
-+}
-+
-+void intel_uncore_clear_errors(struct drm_device *dev)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+
-+	if (HAS_FPGA_DBG_UNCLAIMED(dev))
-+		I915_WRITE_NOTRACE(FPGA_DBG, FPGA_DBG_RM_NOCLAIM);
-+}
-+
-+void intel_uncore_check_errors(struct drm_device *dev)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+
-+	if (HAS_FPGA_DBG_UNCLAIMED(dev) &&
-+	    (I915_READ_NOTRACE(FPGA_DBG) & FPGA_DBG_RM_NOCLAIM)) {
-+		DRM_ERROR("Unclaimed register before interrupt\n");
-+		I915_WRITE_NOTRACE(FPGA_DBG, FPGA_DBG_RM_NOCLAIM);
-+	}
-+}
diff --git a/patches.baytrail/0526-drm-i915-Use-a-private-interface-for-register-access.patch b/patches.baytrail/0526-drm-i915-Use-a-private-interface-for-register-access.patch
deleted file mode 100644
index 9bc54b39423dd..0000000000000
--- a/patches.baytrail/0526-drm-i915-Use-a-private-interface-for-register-access.patch
+++ /dev/null
@@ -1,410 +0,0 @@
-From 68ca0e9ca7290951c0e87a380a6715af573a00e7 Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Fri, 19 Jul 2013 20:36:53 +0100
-Subject: drm/i915: Use a private interface for register access within GT
-
-The GT functions for enabling register access also need to occasionally
-write to and read from registers. To avoid the potential recursion as we
-modify the public interface to be stricter, introduce a private register
-access API for the GT functions.
-
-v2: Rebase
-v3: Rebase onto uncore
-v4: Use raw interfaces consistently so that we only use the low-level
-    readN functions from a single location.
-
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 6af5d92f909796cb706f3b9efefd75cb0f5afcff)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h     |  22 +++---
- drivers/gpu/drm/i915/intel_uncore.c | 136 +++++++++++++++++++++---------------
- 2 files changed, 90 insertions(+), 68 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 928a7309b7c3..ababee4f2f2e 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -2134,22 +2134,20 @@ void intel_sbi_write(struct drm_i915_private *dev_priv, u16 reg, u32 value,
- int vlv_gpu_freq(int ddr_freq, int val);
- int vlv_freq_opcode(int ddr_freq, int val);
- 
--#define __i915_read(x, y) \
-+#define __i915_read(x) \
- 	u##x i915_read##x(struct drm_i915_private *dev_priv, u32 reg);
--
--__i915_read(8, b)
--__i915_read(16, w)
--__i915_read(32, l)
--__i915_read(64, q)
-+__i915_read(8)
-+__i915_read(16)
-+__i915_read(32)
-+__i915_read(64)
- #undef __i915_read
- 
--#define __i915_write(x, y) \
-+#define __i915_write(x) \
- 	void i915_write##x(struct drm_i915_private *dev_priv, u32 reg, u##x val);
--
--__i915_write(8, b)
--__i915_write(16, w)
--__i915_write(32, l)
--__i915_write(64, q)
-+__i915_write(8)
-+__i915_write(16)
-+__i915_write(32)
-+__i915_write(64)
- #undef __i915_write
- 
- #define I915_READ8(reg)		i915_read8(dev_priv, (reg))
-diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
-index 97e8b1b86476..228bc7a3f373 100644
---- a/drivers/gpu/drm/i915/intel_uncore.c
-+++ b/drivers/gpu/drm/i915/intel_uncore.c
-@@ -26,6 +26,21 @@
- 
- #define FORCEWAKE_ACK_TIMEOUT_MS 2
- 
-+#define __raw_i915_read8(dev_priv__, reg__) readb((dev_priv__)->regs + (reg__))
-+#define __raw_i915_write8(dev_priv__, reg__, val__) writeb(val__, (dev_priv__)->regs + (reg__))
-+
-+#define __raw_i915_read16(dev_priv__, reg__) readw((dev_priv__)->regs + (reg__))
-+#define __raw_i915_write16(dev_priv__, reg__, val__) writew(val__, (dev_priv__)->regs + (reg__))
-+
-+#define __raw_i915_read32(dev_priv__, reg__) readl((dev_priv__)->regs + (reg__))
-+#define __raw_i915_write32(dev_priv__, reg__, val__) writel(val__, (dev_priv__)->regs + (reg__))
-+
-+#define __raw_i915_read64(dev_priv__, reg__) readq((dev_priv__)->regs + (reg__))
-+#define __raw_i915_write64(dev_priv__, reg__, val__) writeq(val__, (dev_priv__)->regs + (reg__))
-+
-+#define __raw_posting_read(dev_priv__, reg__) (void)__raw_i915_read32(dev_priv__, reg__)
-+
-+
- static void __gen6_gt_wait_for_thread_c0(struct drm_i915_private *dev_priv)
- {
- 	u32 gt_thread_status_mask;
-@@ -38,26 +53,28 @@ static void __gen6_gt_wait_for_thread_c0(struct drm_i915_private *dev_priv)
- 	/* w/a for a sporadic read returning 0 by waiting for the GT
- 	 * thread to wake up.
- 	 */
--	if (wait_for_atomic_us((I915_READ_NOTRACE(GEN6_GT_THREAD_STATUS_REG) & gt_thread_status_mask) == 0, 500))
-+	if (wait_for_atomic_us((__raw_i915_read32(dev_priv, GEN6_GT_THREAD_STATUS_REG) & gt_thread_status_mask) == 0, 500))
- 		DRM_ERROR("GT thread status wait timed out\n");
- }
- 
- static void __gen6_gt_force_wake_reset(struct drm_i915_private *dev_priv)
- {
--	I915_WRITE_NOTRACE(FORCEWAKE, 0);
--	POSTING_READ(ECOBUS); /* something from same cacheline, but !FORCEWAKE */
-+	__raw_i915_write32(dev_priv, FORCEWAKE, 0);
-+	/* something from same cacheline, but !FORCEWAKE */
-+	__raw_posting_read(dev_priv, ECOBUS);
- }
- 
- static void __gen6_gt_force_wake_get(struct drm_i915_private *dev_priv)
- {
--	if (wait_for_atomic((I915_READ_NOTRACE(FORCEWAKE_ACK) & 1) == 0,
-+	if (wait_for_atomic((__raw_i915_read32(dev_priv, FORCEWAKE_ACK) & 1) == 0,
- 			    FORCEWAKE_ACK_TIMEOUT_MS))
- 		DRM_ERROR("Timed out waiting for forcewake old ack to clear.\n");
- 
--	I915_WRITE_NOTRACE(FORCEWAKE, 1);
--	POSTING_READ(ECOBUS); /* something from same cacheline, but !FORCEWAKE */
-+	__raw_i915_write32(dev_priv, FORCEWAKE, 1);
-+	/* something from same cacheline, but !FORCEWAKE */
-+	__raw_posting_read(dev_priv, ECOBUS);
- 
--	if (wait_for_atomic((I915_READ_NOTRACE(FORCEWAKE_ACK) & 1),
-+	if (wait_for_atomic((__raw_i915_read32(dev_priv, FORCEWAKE_ACK) & 1),
- 			    FORCEWAKE_ACK_TIMEOUT_MS))
- 		DRM_ERROR("Timed out waiting for forcewake to ack request.\n");
- 
-@@ -67,9 +84,9 @@ static void __gen6_gt_force_wake_get(struct drm_i915_private *dev_priv)
- 
- static void __gen6_gt_force_wake_mt_reset(struct drm_i915_private *dev_priv)
- {
--	I915_WRITE_NOTRACE(FORCEWAKE_MT, _MASKED_BIT_DISABLE(0xffff));
-+	__raw_i915_write32(dev_priv, FORCEWAKE_MT, _MASKED_BIT_DISABLE(0xffff));
- 	/* something from same cacheline, but !FORCEWAKE_MT */
--	POSTING_READ(ECOBUS);
-+	__raw_posting_read(dev_priv, ECOBUS);
- }
- 
- static void __gen6_gt_force_wake_mt_get(struct drm_i915_private *dev_priv)
-@@ -81,15 +98,16 @@ static void __gen6_gt_force_wake_mt_get(struct drm_i915_private *dev_priv)
- 	else
- 		forcewake_ack = FORCEWAKE_MT_ACK;
- 
--	if (wait_for_atomic((I915_READ_NOTRACE(forcewake_ack) & FORCEWAKE_KERNEL) == 0,
-+	if (wait_for_atomic((__raw_i915_read32(dev_priv, forcewake_ack) & FORCEWAKE_KERNEL) == 0,
- 			    FORCEWAKE_ACK_TIMEOUT_MS))
- 		DRM_ERROR("Timed out waiting for forcewake old ack to clear.\n");
- 
--	I915_WRITE_NOTRACE(FORCEWAKE_MT, _MASKED_BIT_ENABLE(FORCEWAKE_KERNEL));
-+	__raw_i915_write32(dev_priv, FORCEWAKE_MT,
-+			   _MASKED_BIT_ENABLE(FORCEWAKE_KERNEL));
- 	/* something from same cacheline, but !FORCEWAKE_MT */
--	POSTING_READ(ECOBUS);
-+	__raw_posting_read(dev_priv, ECOBUS);
- 
--	if (wait_for_atomic((I915_READ_NOTRACE(forcewake_ack) & FORCEWAKE_KERNEL),
-+	if (wait_for_atomic((__raw_i915_read32(dev_priv, forcewake_ack) & FORCEWAKE_KERNEL),
- 			    FORCEWAKE_ACK_TIMEOUT_MS))
- 		DRM_ERROR("Timed out waiting for forcewake to ack request.\n");
- 
-@@ -100,25 +118,27 @@ static void __gen6_gt_force_wake_mt_get(struct drm_i915_private *dev_priv)
- static void gen6_gt_check_fifodbg(struct drm_i915_private *dev_priv)
- {
- 	u32 gtfifodbg;
--	gtfifodbg = I915_READ_NOTRACE(GTFIFODBG);
-+
-+	gtfifodbg = __raw_i915_read32(dev_priv, GTFIFODBG);
- 	if (WARN(gtfifodbg & GT_FIFO_CPU_ERROR_MASK,
- 	     "MMIO read or write has been dropped %x\n", gtfifodbg))
--		I915_WRITE_NOTRACE(GTFIFODBG, GT_FIFO_CPU_ERROR_MASK);
-+		__raw_i915_write32(dev_priv, GTFIFODBG, GT_FIFO_CPU_ERROR_MASK);
- }
- 
- static void __gen6_gt_force_wake_put(struct drm_i915_private *dev_priv)
- {
--	I915_WRITE_NOTRACE(FORCEWAKE, 0);
-+	__raw_i915_write32(dev_priv, FORCEWAKE, 0);
- 	/* something from same cacheline, but !FORCEWAKE */
--	POSTING_READ(ECOBUS);
-+	__raw_posting_read(dev_priv, ECOBUS);
- 	gen6_gt_check_fifodbg(dev_priv);
- }
- 
- static void __gen6_gt_force_wake_mt_put(struct drm_i915_private *dev_priv)
- {
--	I915_WRITE_NOTRACE(FORCEWAKE_MT, _MASKED_BIT_DISABLE(FORCEWAKE_KERNEL));
-+	__raw_i915_write32(dev_priv, FORCEWAKE_MT,
-+			   _MASKED_BIT_DISABLE(FORCEWAKE_KERNEL));
- 	/* something from same cacheline, but !FORCEWAKE_MT */
--	POSTING_READ(ECOBUS);
-+	__raw_posting_read(dev_priv, ECOBUS);
- 	gen6_gt_check_fifodbg(dev_priv);
- }
- 
-@@ -128,10 +148,10 @@ static int __gen6_gt_wait_for_fifo(struct drm_i915_private *dev_priv)
- 
- 	if (dev_priv->uncore.fifo_count < GT_FIFO_NUM_RESERVED_ENTRIES) {
- 		int loop = 500;
--		u32 fifo = I915_READ_NOTRACE(GT_FIFO_FREE_ENTRIES);
-+		u32 fifo = __raw_i915_read32(dev_priv, GT_FIFO_FREE_ENTRIES);
- 		while (fifo <= GT_FIFO_NUM_RESERVED_ENTRIES && loop--) {
- 			udelay(10);
--			fifo = I915_READ_NOTRACE(GT_FIFO_FREE_ENTRIES);
-+			fifo = __raw_i915_read32(dev_priv, GT_FIFO_FREE_ENTRIES);
- 		}
- 		if (WARN_ON(loop < 0 && fifo <= GT_FIFO_NUM_RESERVED_ENTRIES))
- 			++ret;
-@@ -144,26 +164,28 @@ static int __gen6_gt_wait_for_fifo(struct drm_i915_private *dev_priv)
- 
- static void vlv_force_wake_reset(struct drm_i915_private *dev_priv)
- {
--	I915_WRITE_NOTRACE(FORCEWAKE_VLV, _MASKED_BIT_DISABLE(0xffff));
-+	__raw_i915_write32(dev_priv, FORCEWAKE_VLV,
-+			   _MASKED_BIT_DISABLE(0xffff));
- 	/* something from same cacheline, but !FORCEWAKE_VLV */
--	POSTING_READ(FORCEWAKE_ACK_VLV);
-+	__raw_posting_read(dev_priv, FORCEWAKE_ACK_VLV);
- }
- 
- static void vlv_force_wake_get(struct drm_i915_private *dev_priv)
- {
--	if (wait_for_atomic((I915_READ_NOTRACE(FORCEWAKE_ACK_VLV) & FORCEWAKE_KERNEL) == 0,
-+	if (wait_for_atomic((__raw_i915_read32(dev_priv, FORCEWAKE_ACK_VLV) & FORCEWAKE_KERNEL) == 0,
- 			    FORCEWAKE_ACK_TIMEOUT_MS))
- 		DRM_ERROR("Timed out waiting for forcewake old ack to clear.\n");
- 
--	I915_WRITE_NOTRACE(FORCEWAKE_VLV, _MASKED_BIT_ENABLE(FORCEWAKE_KERNEL));
--	I915_WRITE_NOTRACE(FORCEWAKE_MEDIA_VLV,
-+	__raw_i915_write32(dev_priv, FORCEWAKE_VLV,
-+			   _MASKED_BIT_ENABLE(FORCEWAKE_KERNEL));
-+	__raw_i915_write32(dev_priv, FORCEWAKE_MEDIA_VLV,
- 			   _MASKED_BIT_ENABLE(FORCEWAKE_KERNEL));
- 
--	if (wait_for_atomic((I915_READ_NOTRACE(FORCEWAKE_ACK_VLV) & FORCEWAKE_KERNEL),
-+	if (wait_for_atomic((__raw_i915_read32(dev_priv, FORCEWAKE_ACK_VLV) & FORCEWAKE_KERNEL),
- 			    FORCEWAKE_ACK_TIMEOUT_MS))
- 		DRM_ERROR("Timed out waiting for GT to ack forcewake request.\n");
- 
--	if (wait_for_atomic((I915_READ_NOTRACE(FORCEWAKE_ACK_MEDIA_VLV) &
-+	if (wait_for_atomic((__raw_i915_read32(dev_priv, FORCEWAKE_ACK_MEDIA_VLV) &
- 			     FORCEWAKE_KERNEL),
- 			    FORCEWAKE_ACK_TIMEOUT_MS))
- 		DRM_ERROR("Timed out waiting for media to ack forcewake request.\n");
-@@ -174,8 +196,9 @@ static void vlv_force_wake_get(struct drm_i915_private *dev_priv)
- 
- static void vlv_force_wake_put(struct drm_i915_private *dev_priv)
- {
--	I915_WRITE_NOTRACE(FORCEWAKE_VLV, _MASKED_BIT_DISABLE(FORCEWAKE_KERNEL));
--	I915_WRITE_NOTRACE(FORCEWAKE_MEDIA_VLV,
-+	__raw_i915_write32(dev_priv, FORCEWAKE_VLV,
-+			   _MASKED_BIT_DISABLE(FORCEWAKE_KERNEL));
-+	__raw_i915_write32(dev_priv, FORCEWAKE_MEDIA_VLV,
- 			   _MASKED_BIT_DISABLE(FORCEWAKE_KERNEL));
- 	/* The below doubles as a POSTING_READ */
- 	gen6_gt_check_fifodbg(dev_priv);
-@@ -186,7 +209,7 @@ void intel_uncore_early_sanitize(struct drm_device *dev)
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 
- 	if (HAS_FPGA_DBG_UNCLAIMED(dev))
--		I915_WRITE_NOTRACE(FPGA_DBG, FPGA_DBG_RM_NOCLAIM);
-+		__raw_i915_write32(dev_priv, FPGA_DBG, FPGA_DBG_RM_NOCLAIM);
- }
- 
- void intel_uncore_init(struct drm_device *dev)
-@@ -213,7 +236,7 @@ void intel_uncore_init(struct drm_device *dev)
- 		 */
- 		mutex_lock(&dev->struct_mutex);
- 		__gen6_gt_force_wake_mt_get(dev_priv);
--		ecobus = I915_READ_NOTRACE(ECOBUS);
-+		ecobus = __raw_i915_read32(dev_priv, ECOBUS);
- 		__gen6_gt_force_wake_mt_put(dev_priv);
- 		mutex_unlock(&dev->struct_mutex);
- 
-@@ -295,17 +318,17 @@ ilk_dummy_write(struct drm_i915_private *dev_priv)
- 	/* WaIssueDummyWriteToWakeupFromRC6:ilk Issue a dummy write to wake up
- 	 * the chip from rc6 before touching it for real. MI_MODE is masked,
- 	 * hence harmless to write 0 into. */
--	I915_WRITE_NOTRACE(MI_MODE, 0);
-+	__raw_i915_write32(dev_priv, MI_MODE, 0);
- }
- 
- static void
- hsw_unclaimed_reg_clear(struct drm_i915_private *dev_priv, u32 reg)
- {
- 	if (HAS_FPGA_DBG_UNCLAIMED(dev_priv->dev) &&
--	    (I915_READ_NOTRACE(FPGA_DBG) & FPGA_DBG_RM_NOCLAIM)) {
-+	    (__raw_i915_read32(dev_priv, FPGA_DBG) & FPGA_DBG_RM_NOCLAIM)) {
- 		DRM_ERROR("Unknown unclaimed register before writing to %x\n",
- 			  reg);
--		I915_WRITE_NOTRACE(FPGA_DBG, FPGA_DBG_RM_NOCLAIM);
-+		__raw_i915_write32(dev_priv, FPGA_DBG, FPGA_DBG_RM_NOCLAIM);
- 	}
- }
- 
-@@ -313,13 +336,13 @@ static void
- hsw_unclaimed_reg_check(struct drm_i915_private *dev_priv, u32 reg)
- {
- 	if (HAS_FPGA_DBG_UNCLAIMED(dev_priv->dev) &&
--	    (I915_READ_NOTRACE(FPGA_DBG) & FPGA_DBG_RM_NOCLAIM)) {
-+	    (__raw_i915_read32(dev_priv, FPGA_DBG) & FPGA_DBG_RM_NOCLAIM)) {
- 		DRM_ERROR("Unclaimed write to %x\n", reg);
--		I915_WRITE_NOTRACE(FPGA_DBG, FPGA_DBG_RM_NOCLAIM);
-+		__raw_i915_write32(dev_priv, FPGA_DBG, FPGA_DBG_RM_NOCLAIM);
- 	}
- }
- 
--#define __i915_read(x, y) \
-+#define __i915_read(x) \
- u##x i915_read##x(struct drm_i915_private *dev_priv, u32 reg) { \
- 	unsigned long irqflags; \
- 	u##x val = 0; \
-@@ -329,24 +352,24 @@ u##x i915_read##x(struct drm_i915_private *dev_priv, u32 reg) { \
- 	if (NEEDS_FORCE_WAKE((dev_priv), (reg))) { \
- 		if (dev_priv->uncore.forcewake_count == 0) \
- 			dev_priv->uncore.funcs.force_wake_get(dev_priv); \
--		val = read##y(dev_priv->regs + reg); \
-+		val = __raw_i915_read##x(dev_priv, reg); \
- 		if (dev_priv->uncore.forcewake_count == 0) \
- 			dev_priv->uncore.funcs.force_wake_put(dev_priv); \
- 	} else { \
--		val = read##y(dev_priv->regs + reg); \
-+		val = __raw_i915_read##x(dev_priv, reg); \
- 	} \
- 	spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags); \
- 	trace_i915_reg_rw(false, reg, val, sizeof(val)); \
- 	return val; \
- }
- 
--__i915_read(8, b)
--__i915_read(16, w)
--__i915_read(32, l)
--__i915_read(64, q)
-+__i915_read(8)
-+__i915_read(16)
-+__i915_read(32)
-+__i915_read(64)
- #undef __i915_read
- 
--#define __i915_write(x, y) \
-+#define __i915_write(x) \
- void i915_write##x(struct drm_i915_private *dev_priv, u32 reg, u##x val) { \
- 	unsigned long irqflags; \
- 	u32 __fifo_ret = 0; \
-@@ -358,17 +381,17 @@ void i915_write##x(struct drm_i915_private *dev_priv, u32 reg, u##x val) { \
- 	if (IS_GEN5(dev_priv->dev)) \
- 		ilk_dummy_write(dev_priv); \
- 	hsw_unclaimed_reg_clear(dev_priv, reg); \
--	write##y(val, dev_priv->regs + reg); \
-+	__raw_i915_write##x(dev_priv, reg, val); \
- 	if (unlikely(__fifo_ret)) { \
- 		gen6_gt_check_fifodbg(dev_priv); \
- 	} \
- 	hsw_unclaimed_reg_check(dev_priv, reg); \
- 	spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags); \
- }
--__i915_write(8, b)
--__i915_write(16, w)
--__i915_write(32, l)
--__i915_write(64, q)
-+__i915_write(8)
-+__i915_write(16)
-+__i915_write(32)
-+__i915_write(64)
- #undef __i915_write
- 
- static const struct register_whitelist {
-@@ -521,10 +544,10 @@ static int gen6_do_reset(struct drm_device *dev)
- 	 * for fifo space for the write or forcewake the chip for
- 	 * the read
- 	 */
--	I915_WRITE_NOTRACE(GEN6_GDRST, GEN6_GRDOM_FULL);
-+	__raw_i915_write32(dev_priv, GEN6_GDRST, GEN6_GRDOM_FULL);
- 
- 	/* Spin waiting for the device to ack the reset request */
--	ret = wait_for((I915_READ_NOTRACE(GEN6_GDRST) & GEN6_GRDOM_FULL) == 0, 500);
-+	ret = wait_for((__raw_i915_read32(dev_priv, GEN6_GDRST) & GEN6_GRDOM_FULL) == 0, 500);
- 
- 	/* If reset with a user forcewake, try to restore, otherwise turn it off */
- 	if (dev_priv->uncore.forcewake_count)
-@@ -533,7 +556,7 @@ static int gen6_do_reset(struct drm_device *dev)
- 		dev_priv->uncore.funcs.force_wake_put(dev_priv);
- 
- 	/* Restore fifo count */
--	dev_priv->uncore.fifo_count = I915_READ_NOTRACE(GT_FIFO_FREE_ENTRIES);
-+	dev_priv->uncore.fifo_count = __raw_i915_read32(dev_priv, GT_FIFO_FREE_ENTRIES);
- 
- 	spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
- 	return ret;
-@@ -555,8 +578,9 @@ void intel_uncore_clear_errors(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 
-+	/* XXX needs spinlock around caller's grouping */
- 	if (HAS_FPGA_DBG_UNCLAIMED(dev))
--		I915_WRITE_NOTRACE(FPGA_DBG, FPGA_DBG_RM_NOCLAIM);
-+		__raw_i915_write32(dev_priv, FPGA_DBG, FPGA_DBG_RM_NOCLAIM);
- }
- 
- void intel_uncore_check_errors(struct drm_device *dev)
-@@ -564,8 +588,8 @@ void intel_uncore_check_errors(struct drm_device *dev)
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 
- 	if (HAS_FPGA_DBG_UNCLAIMED(dev) &&
--	    (I915_READ_NOTRACE(FPGA_DBG) & FPGA_DBG_RM_NOCLAIM)) {
-+	    (__raw_i915_read32(dev_priv, FPGA_DBG) & FPGA_DBG_RM_NOCLAIM)) {
- 		DRM_ERROR("Unclaimed register before interrupt\n");
--		I915_WRITE_NOTRACE(FPGA_DBG, FPGA_DBG_RM_NOCLAIM);
-+		__raw_i915_write32(dev_priv, FPGA_DBG, FPGA_DBG_RM_NOCLAIM);
- 	}
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0527-drm-i915-Use-the-common-register-access-functions-fo.patch b/patches.baytrail/0527-drm-i915-Use-the-common-register-access-functions-fo.patch
deleted file mode 100644
index 7a5a64aa2c782..0000000000000
--- a/patches.baytrail/0527-drm-i915-Use-the-common-register-access-functions-fo.patch
+++ /dev/null
@@ -1,114 +0,0 @@
-From 23cd4eb0e4a3c1048ff92f0bace88a60e12c3459 Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Fri, 19 Jul 2013 20:36:54 +0100
-Subject: drm/i915: Use the common register access functions for NOTRACE
- variants
-
-Detangle the confusion that NOTRACE variants of the register read/write
-routines were directly using the raw register access. We need for those
-routines to reuse the common code for serializing register access and
-ensuring the correct register power states. This is only possible now
-that the only routines that required raw access use their own API.
-
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit dba8e41f2be04de58eadf78f524b3f981bf438c2)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h     | 28 ++++++++++++++--------------
- drivers/gpu/drm/i915/intel_uncore.c |  8 ++++----
- 2 files changed, 18 insertions(+), 18 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index ababee4f2f2e..2f8699b03722 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -2135,7 +2135,7 @@ int vlv_gpu_freq(int ddr_freq, int val);
- int vlv_freq_opcode(int ddr_freq, int val);
- 
- #define __i915_read(x) \
--	u##x i915_read##x(struct drm_i915_private *dev_priv, u32 reg);
-+	u##x i915_read##x(struct drm_i915_private *dev_priv, u32 reg, bool trace);
- __i915_read(8)
- __i915_read(16)
- __i915_read(32)
-@@ -2143,28 +2143,28 @@ __i915_read(64)
- #undef __i915_read
- 
- #define __i915_write(x) \
--	void i915_write##x(struct drm_i915_private *dev_priv, u32 reg, u##x val);
-+	void i915_write##x(struct drm_i915_private *dev_priv, u32 reg, u##x val, bool trace);
- __i915_write(8)
- __i915_write(16)
- __i915_write(32)
- __i915_write(64)
- #undef __i915_write
- 
--#define I915_READ8(reg)		i915_read8(dev_priv, (reg))
--#define I915_WRITE8(reg, val)	i915_write8(dev_priv, (reg), (val))
-+#define I915_READ8(reg)		i915_read8(dev_priv, (reg), true)
-+#define I915_WRITE8(reg, val)	i915_write8(dev_priv, (reg), (val), true)
- 
--#define I915_READ16(reg)	i915_read16(dev_priv, (reg))
--#define I915_WRITE16(reg, val)	i915_write16(dev_priv, (reg), (val))
--#define I915_READ16_NOTRACE(reg)	readw(dev_priv->regs + (reg))
--#define I915_WRITE16_NOTRACE(reg, val)	writew(val, dev_priv->regs + (reg))
-+#define I915_READ16(reg)	i915_read16(dev_priv, (reg), true)
-+#define I915_WRITE16(reg, val)	i915_write16(dev_priv, (reg), (val), true)
-+#define I915_READ16_NOTRACE(reg)	i915_read16(dev_priv, (reg), false)
-+#define I915_WRITE16_NOTRACE(reg, val)	i915_write16(dev_priv, (reg), (val), false)
- 
--#define I915_READ(reg)		i915_read32(dev_priv, (reg))
--#define I915_WRITE(reg, val)	i915_write32(dev_priv, (reg), (val))
--#define I915_READ_NOTRACE(reg)		readl(dev_priv->regs + (reg))
--#define I915_WRITE_NOTRACE(reg, val)	writel(val, dev_priv->regs + (reg))
-+#define I915_READ(reg)		i915_read32(dev_priv, (reg), true)
-+#define I915_WRITE(reg, val)	i915_write32(dev_priv, (reg), (val), true)
-+#define I915_READ_NOTRACE(reg)		i915_read32(dev_priv, (reg), false)
-+#define I915_WRITE_NOTRACE(reg, val)	i915_write32(dev_priv, (reg), (val), false)
- 
--#define I915_WRITE64(reg, val)	i915_write64(dev_priv, (reg), (val))
--#define I915_READ64(reg)	i915_read64(dev_priv, (reg))
-+#define I915_WRITE64(reg, val)	i915_write64(dev_priv, (reg), (val), true)
-+#define I915_READ64(reg)	i915_read64(dev_priv, (reg), true)
- 
- #define POSTING_READ(reg)	(void)I915_READ_NOTRACE(reg)
- #define POSTING_READ16(reg)	(void)I915_READ16_NOTRACE(reg)
-diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
-index 228bc7a3f373..2dcf682d8dad 100644
---- a/drivers/gpu/drm/i915/intel_uncore.c
-+++ b/drivers/gpu/drm/i915/intel_uncore.c
-@@ -343,7 +343,7 @@ hsw_unclaimed_reg_check(struct drm_i915_private *dev_priv, u32 reg)
- }
- 
- #define __i915_read(x) \
--u##x i915_read##x(struct drm_i915_private *dev_priv, u32 reg) { \
-+u##x i915_read##x(struct drm_i915_private *dev_priv, u32 reg, bool trace) { \
- 	unsigned long irqflags; \
- 	u##x val = 0; \
- 	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags); \
-@@ -359,7 +359,7 @@ u##x i915_read##x(struct drm_i915_private *dev_priv, u32 reg) { \
- 		val = __raw_i915_read##x(dev_priv, reg); \
- 	} \
- 	spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags); \
--	trace_i915_reg_rw(false, reg, val, sizeof(val)); \
-+	if (trace) trace_i915_reg_rw(false, reg, val, sizeof(val)); \
- 	return val; \
- }
- 
-@@ -370,10 +370,10 @@ __i915_read(64)
- #undef __i915_read
- 
- #define __i915_write(x) \
--void i915_write##x(struct drm_i915_private *dev_priv, u32 reg, u##x val) { \
-+void i915_write##x(struct drm_i915_private *dev_priv, u32 reg, u##x val, bool trace) { \
- 	unsigned long irqflags; \
- 	u32 __fifo_ret = 0; \
--	trace_i915_reg_rw(true, reg, val, sizeof(val)); \
-+	if (trace) trace_i915_reg_rw(true, reg, val, sizeof(val)); \
- 	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags); \
- 	if (NEEDS_FORCE_WAKE((dev_priv), (reg))) { \
- 		__fifo_ret = __gen6_gt_wait_for_fifo(dev_priv); \
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0528-drm-i915-Squash-gen-lookup-through-multiple-indirect.patch b/patches.baytrail/0528-drm-i915-Squash-gen-lookup-through-multiple-indirect.patch
deleted file mode 100644
index c9207ed173696..0000000000000
--- a/patches.baytrail/0528-drm-i915-Squash-gen-lookup-through-multiple-indirect.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From 825b81dd06095d52bf121707f4cb1677ceec0433 Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Fri, 19 Jul 2013 20:36:55 +0100
-Subject: drm/i915: Squash gen lookup through multiple indirections inside GT
- access
-
-The INTEL_INFO() macro extracts the dev_private pointer from the device,
-so passing in the dev_private->dev is a long winded circumlocution.
-
-v2: rebase onto uncore
-
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit a7f31ee0b00203fcf47fb74a1d61a1c9be8d142e)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_uncore.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
-index 2dcf682d8dad..89bb9da377fc 100644
---- a/drivers/gpu/drm/i915/intel_uncore.c
-+++ b/drivers/gpu/drm/i915/intel_uncore.c
-@@ -347,7 +347,7 @@ u##x i915_read##x(struct drm_i915_private *dev_priv, u32 reg, bool trace) { \
- 	unsigned long irqflags; \
- 	u##x val = 0; \
- 	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags); \
--	if (IS_GEN5(dev_priv->dev)) \
-+	if (dev_priv->info->gen == 5) \
- 		ilk_dummy_write(dev_priv); \
- 	if (NEEDS_FORCE_WAKE((dev_priv), (reg))) { \
- 		if (dev_priv->uncore.forcewake_count == 0) \
-@@ -378,7 +378,7 @@ void i915_write##x(struct drm_i915_private *dev_priv, u32 reg, u##x val, bool tr
- 	if (NEEDS_FORCE_WAKE((dev_priv), (reg))) { \
- 		__fifo_ret = __gen6_gt_wait_for_fifo(dev_priv); \
- 	} \
--	if (IS_GEN5(dev_priv->dev)) \
-+	if (dev_priv->info->gen == 5) \
- 		ilk_dummy_write(dev_priv); \
- 	hsw_unclaimed_reg_clear(dev_priv, reg); \
- 	__raw_i915_write##x(dev_priv, reg, val); \
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0529-drm-i915-Convert-the-register-access-tracepoint-to-b.patch b/patches.baytrail/0529-drm-i915-Convert-the-register-access-tracepoint-to-b.patch
deleted file mode 100644
index af196ade0d056..0000000000000
--- a/patches.baytrail/0529-drm-i915-Convert-the-register-access-tracepoint-to-b.patch
+++ /dev/null
@@ -1,79 +0,0 @@
-From e5a42eea249706b6c224da0944bd1877383976ef Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Fri, 19 Jul 2013 20:36:56 +0100
-Subject: drm/i915: Convert the register access tracepoint to be conditional
-
-The TRACE_EVENT_CONDITION is supposed to generate more efficient code
-than if (cond) trace(), which is what we are currently using inside the
-register access functions.
-
-v2: Rebase onto uncore
-
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit ed71f1b48e95408d0b3ded014a15fb9d52ac5a86)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_debugfs.c | 2 +-
- drivers/gpu/drm/i915/i915_trace.h   | 8 +++++---
- drivers/gpu/drm/i915/intel_uncore.c | 4 ++--
- 3 files changed, 8 insertions(+), 6 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
-index 0e904986f3e9..ed72fe08217c 100644
---- a/drivers/gpu/drm/i915/i915_debugfs.c
-+++ b/drivers/gpu/drm/i915/i915_debugfs.c
-@@ -1004,7 +1004,7 @@ static int gen6_drpc_info(struct seq_file *m)
- 	}
- 
- 	gt_core_status = readl(dev_priv->regs + GEN6_GT_CORE_STATUS);
--	trace_i915_reg_rw(false, GEN6_GT_CORE_STATUS, gt_core_status, 4);
-+	trace_i915_reg_rw(false, GEN6_GT_CORE_STATUS, gt_core_status, 4, true);
- 
- 	rpmodectl1 = I915_READ(GEN6_RP_CONTROL);
- 	rcctl1 = I915_READ(GEN6_RC_CONTROL);
-diff --git a/drivers/gpu/drm/i915/i915_trace.h b/drivers/gpu/drm/i915/i915_trace.h
-index 7d283b5fcbf9..2933e2ffeaa4 100644
---- a/drivers/gpu/drm/i915/i915_trace.h
-+++ b/drivers/gpu/drm/i915/i915_trace.h
-@@ -406,10 +406,12 @@ TRACE_EVENT(i915_flip_complete,
- 	    TP_printk("plane=%d, obj=%p", __entry->plane, __entry->obj)
- );
- 
--TRACE_EVENT(i915_reg_rw,
--	TP_PROTO(bool write, u32 reg, u64 val, int len),
-+TRACE_EVENT_CONDITION(i915_reg_rw,
-+	TP_PROTO(bool write, u32 reg, u64 val, int len, bool trace),
- 
--	TP_ARGS(write, reg, val, len),
-+	TP_ARGS(write, reg, val, len, trace),
-+
-+	TP_CONDITION(trace),
- 
- 	TP_STRUCT__entry(
- 		__field(u64, val)
-diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
-index 89bb9da377fc..8f5bc869c023 100644
---- a/drivers/gpu/drm/i915/intel_uncore.c
-+++ b/drivers/gpu/drm/i915/intel_uncore.c
-@@ -359,7 +359,7 @@ u##x i915_read##x(struct drm_i915_private *dev_priv, u32 reg, bool trace) { \
- 		val = __raw_i915_read##x(dev_priv, reg); \
- 	} \
- 	spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags); \
--	if (trace) trace_i915_reg_rw(false, reg, val, sizeof(val)); \
-+	trace_i915_reg_rw(false, reg, val, sizeof(val), trace); \
- 	return val; \
- }
- 
-@@ -373,7 +373,7 @@ __i915_read(64)
- void i915_write##x(struct drm_i915_private *dev_priv, u32 reg, u##x val, bool trace) { \
- 	unsigned long irqflags; \
- 	u32 __fifo_ret = 0; \
--	if (trace) trace_i915_reg_rw(true, reg, val, sizeof(val)); \
-+	trace_i915_reg_rw(true, reg, val, sizeof(val), trace); \
- 	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags); \
- 	if (NEEDS_FORCE_WAKE((dev_priv), (reg))) { \
- 		__fifo_ret = __gen6_gt_wait_for_fifo(dev_priv); \
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0530-drm-i915-fix-the-racy-object-accounting.patch b/patches.baytrail/0530-drm-i915-fix-the-racy-object-accounting.patch
deleted file mode 100644
index 3fe0876e1f00a..0000000000000
--- a/patches.baytrail/0530-drm-i915-fix-the-racy-object-accounting.patch
+++ /dev/null
@@ -1,66 +0,0 @@
-From 92ea2894437ba14514dfddef4ad27ee506e780a5 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Wed, 24 Jul 2013 22:40:23 +0200
-Subject: drm/i915: fix the racy object accounting
-
-Just use a spinlock to protect them.
-
-v2: Rebase onto the new object create refcount fix patch.
-
-v3: Don't kill dev_priv->mm.object_memory as requested by Chris and
-hence just use a spinlock instead of atomic_t.
-
-Cc: Chris Wilson <chris@chris-wilson.co.uk>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67287
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit c20e835586c0e4d08f891362b3c829d45ef45f9d)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_dma.c |    1 +
- drivers/gpu/drm/i915/i915_drv.h |    1 +
- drivers/gpu/drm/i915/i915_gem.c |    4 ++++
- 3 files changed, 6 insertions(+)
-
---- a/drivers/gpu/drm/i915/i915_dma.c
-+++ b/drivers/gpu/drm/i915/i915_dma.c
-@@ -1486,6 +1486,7 @@ int i915_driver_load(struct drm_device *
- 	spin_lock_init(&dev_priv->gpu_error.lock);
- 	spin_lock_init(&dev_priv->backlight.lock);
- 	spin_lock_init(&dev_priv->uncore.lock);
-+	spin_lock_init(&dev_priv->mm.object_stat_lock);
- 	mutex_init(&dev_priv->dpio_lock);
- 	mutex_init(&dev_priv->rps.hw_lock);
- 	mutex_init(&dev_priv->modeset_restore_lock);
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -935,6 +935,7 @@ struct i915_gem_mm {
- 	struct drm_i915_gem_phys_object *phys_objs[I915_MAX_PHYS_OBJECT];
- 
- 	/* accounting, useful for userland debugging */
-+	spinlock_t object_stat_lock;
- 	size_t object_memory;
- 	u32 object_count;
- };
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -76,15 +76,19 @@ static inline void i915_gem_object_fence
- static void i915_gem_info_add_obj(struct drm_i915_private *dev_priv,
- 				  size_t size)
- {
-+	spin_lock(&dev_priv->mm.object_stat_lock);
- 	dev_priv->mm.object_count++;
- 	dev_priv->mm.object_memory += size;
-+	spin_unlock(&dev_priv->mm.object_stat_lock);
- }
- 
- static void i915_gem_info_remove_obj(struct drm_i915_private *dev_priv,
- 				     size_t size)
- {
-+	spin_lock(&dev_priv->mm.object_stat_lock);
- 	dev_priv->mm.object_count--;
- 	dev_priv->mm.object_memory -= size;
-+	spin_unlock(&dev_priv->mm.object_stat_lock);
- }
- 
- static int
diff --git a/patches.baytrail/0531-drm-i915-dvo_ch7xxx-fix-vsync-polarity-setting.patch b/patches.baytrail/0531-drm-i915-dvo_ch7xxx-fix-vsync-polarity-setting.patch
deleted file mode 100644
index 35cc9bfa42a72..0000000000000
--- a/patches.baytrail/0531-drm-i915-dvo_ch7xxx-fix-vsync-polarity-setting.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From 5631557b638676dc7433e55f7bcf64990c104d42 Mon Sep 17 00:00:00 2001
-From: Imre Deak <imre.deak@intel.com>
-Date: Thu, 25 Jul 2013 16:22:31 +0300
-Subject: drm/i915: dvo_ch7xxx: fix vsync polarity setting
-
-This fixes a typo which set the wrong vsync and possibly also hsync
-polarity for any modes with positive vsync polarity.
-
-Signed-off-by: Imre Deak <imre.deak@intel.com>
-Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 3b27af3560f3cfe4e09171024515fa304ebae93b)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/dvo_ch7xxx.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/dvo_ch7xxx.c b/drivers/gpu/drm/i915/dvo_ch7xxx.c
-index 757e0fa11043..af42e94f6846 100644
---- a/drivers/gpu/drm/i915/dvo_ch7xxx.c
-+++ b/drivers/gpu/drm/i915/dvo_ch7xxx.c
-@@ -307,7 +307,7 @@ static void ch7xxx_mode_set(struct intel_dvo_device *dvo,
- 		idf |= CH7xxx_IDF_HSP;
- 
- 	if (mode->flags & DRM_MODE_FLAG_PVSYNC)
--		idf |= CH7xxx_IDF_HSP;
-+		idf |= CH7xxx_IDF_VSP;
- 
- 	ch7xxx_writeb(dvo, CH7xxx_IDF, idf);
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0532-drm-i915-Add-messages-useful-for-HPD-storm-detection.patch b/patches.baytrail/0532-drm-i915-Add-messages-useful-for-HPD-storm-detection.patch
deleted file mode 100644
index 34fae282d24ce..0000000000000
--- a/patches.baytrail/0532-drm-i915-Add-messages-useful-for-HPD-storm-detection.patch
+++ /dev/null
@@ -1,56 +0,0 @@
-From e8b83ad337464dbd862bbae90e82be22031a1a6f Mon Sep 17 00:00:00 2001
-From: Egbert Eich <eich@suse.de>
-Date: Fri, 26 Jul 2013 14:14:24 +0200
-Subject: drm/i915: Add messages useful for HPD storm detection debugging (v2)
-
-For HPD storm detection we now mask out individual interrupt source
-bits. We have already seen a case where HPD interrupt enable bits
-were assigned to the wrong pins. To track these conditions more
-easily add some debugging messages.
-
-v2: Spelling fixes as suggested by Jani Nikula <jani.nikula@linux.intel.com>
-
-Signed-off-by: Egbert Eich <eich@suse.de>
-Reviewed-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit b8f102e8bf71cacf33326360fdf9dcfd1a63925b)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 7 +++++++
- 1 file changed, 7 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index a588cd5745aa..97f60282d397 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -919,6 +919,10 @@ static inline void intel_hpd_irq_handler(struct drm_device *dev,
- 	spin_lock(&dev_priv->irq_lock);
- 	for (i = 1; i < HPD_NUM_PINS; i++) {
- 
-+		WARN(((hpd[i] & hotplug_trigger) &&
-+		      dev_priv->hpd_stats[i].hpd_mark != HPD_ENABLED),
-+		     "Received HPD interrupt although disabled\n");
-+
- 		if (!(hpd[i] & hotplug_trigger) ||
- 		    dev_priv->hpd_stats[i].hpd_mark != HPD_ENABLED)
- 			continue;
-@@ -929,6 +933,7 @@ static inline void intel_hpd_irq_handler(struct drm_device *dev,
- 				   + msecs_to_jiffies(HPD_STORM_DETECT_PERIOD))) {
- 			dev_priv->hpd_stats[i].hpd_last_jiffies = jiffies;
- 			dev_priv->hpd_stats[i].hpd_cnt = 0;
-+			DRM_DEBUG_KMS("Received HPD interrupt on PIN %d - cnt: 0\n", i);
- 		} else if (dev_priv->hpd_stats[i].hpd_cnt > HPD_STORM_THRESHOLD) {
- 			dev_priv->hpd_stats[i].hpd_mark = HPD_MARK_DISABLED;
- 			dev_priv->hpd_event_bits &= ~(1 << i);
-@@ -936,6 +941,8 @@ static inline void intel_hpd_irq_handler(struct drm_device *dev,
- 			storm_detected = true;
- 		} else {
- 			dev_priv->hpd_stats[i].hpd_cnt++;
-+			DRM_DEBUG_KMS("Received HPD interrupt on PIN %d - cnt: %d\n", i,
-+				      dev_priv->hpd_stats[i].hpd_cnt);
- 		}
- 	}
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0533-drm-i915-Retry-DP-aux_ch-communications-with-a-diffe.patch b/patches.baytrail/0533-drm-i915-Retry-DP-aux_ch-communications-with-a-diffe.patch
deleted file mode 100644
index 32b93a133b1f1..0000000000000
--- a/patches.baytrail/0533-drm-i915-Retry-DP-aux_ch-communications-with-a-diffe.patch
+++ /dev/null
@@ -1,169 +0,0 @@
-From 0e455435d45fda47c39a7efcfcb78b6db355c97c Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Sun, 21 Jul 2013 16:00:03 +0100
-Subject: drm/i915: Retry DP aux_ch communications with a different clock after
- failure
-
-The w/a db makes the recommendation to both use a non-default value for
-the initial clock and then to retry with an alternative clock for
-Haswell with the Lakeport PCH.
-
-"On LPT:H, use a divider value of 63 decimal (03Fh). If there is a
-failure, retry at least three times with 63, then retry at least three
-times with 72 decimal (048h)."
-
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Reviewed-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit bc86625a4ff7574d4d4dba79723457711eb784e0)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_dp.c | 92 +++++++++++++++++++++++------------------
- 1 file changed, 51 insertions(+), 41 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
-index ccf3b6f0c9a9..8b41cd9d9329 100644
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -276,7 +276,8 @@ intel_dp_aux_wait_done(struct intel_dp *intel_dp, bool has_aux_irq)
- 	return status;
- }
- 
--static uint32_t get_aux_clock_divider(struct intel_dp *intel_dp)
-+static uint32_t get_aux_clock_divider(struct intel_dp *intel_dp,
-+				      int index)
- {
- 	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
- 	struct drm_device *dev = intel_dig_port->base.base.dev;
-@@ -290,22 +291,27 @@ static uint32_t get_aux_clock_divider(struct intel_dp *intel_dp)
- 	 * clock divider.
- 	 */
- 	if (IS_VALLEYVIEW(dev)) {
--		return 100;
-+		return index ? 0 : 100;
- 	} else if (intel_dig_port->port == PORT_A) {
-+		if (index)
-+			return 0;
- 		if (HAS_DDI(dev))
--			return DIV_ROUND_CLOSEST(
--				intel_ddi_get_cdclk_freq(dev_priv), 2000);
-+			return DIV_ROUND_CLOSEST(intel_ddi_get_cdclk_freq(dev_priv), 2000);
- 		else if (IS_GEN6(dev) || IS_GEN7(dev))
- 			return 200; /* SNB & IVB eDP input clock at 400Mhz */
- 		else
- 			return 225; /* eDP input clock at 450Mhz */
- 	} else if (dev_priv->pch_id == INTEL_PCH_LPT_DEVICE_ID_TYPE) {
- 		/* Workaround for non-ULT HSW */
--		return 74;
-+		switch (index) {
-+		case 0: return 63;
-+		case 1: return 72;
-+		default: return 0;
-+		}
- 	} else if (HAS_PCH_SPLIT(dev)) {
--		return DIV_ROUND_UP(intel_pch_rawclk(dev), 2);
-+		return index ? 0 : DIV_ROUND_UP(intel_pch_rawclk(dev), 2);
- 	} else {
--		return intel_hrawclk(dev) / 2;
-+		return index ? 0 :intel_hrawclk(dev) / 2;
- 	}
- }
- 
-@@ -319,10 +325,10 @@ intel_dp_aux_ch(struct intel_dp *intel_dp,
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	uint32_t ch_ctl = intel_dp->aux_ch_ctl_reg;
- 	uint32_t ch_data = ch_ctl + 4;
-+	uint32_t aux_clock_divider;
- 	int i, ret, recv_bytes;
- 	uint32_t status;
--	uint32_t aux_clock_divider = get_aux_clock_divider(intel_dp);
--	int try, precharge;
-+	int try, precharge, clock = 0;
- 	bool has_aux_irq = INTEL_INFO(dev)->gen >= 5 && !IS_VALLEYVIEW(dev);
- 
- 	/* dp aux is extremely sensitive to irq latency, hence request the
-@@ -353,37 +359,41 @@ intel_dp_aux_ch(struct intel_dp *intel_dp,
- 		goto out;
- 	}
- 
--	/* Must try at least 3 times according to DP spec */
--	for (try = 0; try < 5; try++) {
--		/* Load the send data into the aux channel data registers */
--		for (i = 0; i < send_bytes; i += 4)
--			I915_WRITE(ch_data + i,
--				   pack_aux(send + i, send_bytes - i));
--
--		/* Send the command and wait for it to complete */
--		I915_WRITE(ch_ctl,
--			   DP_AUX_CH_CTL_SEND_BUSY |
--			   (has_aux_irq ? DP_AUX_CH_CTL_INTERRUPT : 0) |
--			   DP_AUX_CH_CTL_TIME_OUT_400us |
--			   (send_bytes << DP_AUX_CH_CTL_MESSAGE_SIZE_SHIFT) |
--			   (precharge << DP_AUX_CH_CTL_PRECHARGE_2US_SHIFT) |
--			   (aux_clock_divider << DP_AUX_CH_CTL_BIT_CLOCK_2X_SHIFT) |
--			   DP_AUX_CH_CTL_DONE |
--			   DP_AUX_CH_CTL_TIME_OUT_ERROR |
--			   DP_AUX_CH_CTL_RECEIVE_ERROR);
--
--		status = intel_dp_aux_wait_done(intel_dp, has_aux_irq);
--
--		/* Clear done status and any errors */
--		I915_WRITE(ch_ctl,
--			   status |
--			   DP_AUX_CH_CTL_DONE |
--			   DP_AUX_CH_CTL_TIME_OUT_ERROR |
--			   DP_AUX_CH_CTL_RECEIVE_ERROR);
--
--		if (status & (DP_AUX_CH_CTL_TIME_OUT_ERROR |
--			      DP_AUX_CH_CTL_RECEIVE_ERROR))
--			continue;
-+	while ((aux_clock_divider = get_aux_clock_divider(intel_dp, clock++))) {
-+		/* Must try at least 3 times according to DP spec */
-+		for (try = 0; try < 5; try++) {
-+			/* Load the send data into the aux channel data registers */
-+			for (i = 0; i < send_bytes; i += 4)
-+				I915_WRITE(ch_data + i,
-+					   pack_aux(send + i, send_bytes - i));
-+
-+			/* Send the command and wait for it to complete */
-+			I915_WRITE(ch_ctl,
-+				   DP_AUX_CH_CTL_SEND_BUSY |
-+				   (has_aux_irq ? DP_AUX_CH_CTL_INTERRUPT : 0) |
-+				   DP_AUX_CH_CTL_TIME_OUT_400us |
-+				   (send_bytes << DP_AUX_CH_CTL_MESSAGE_SIZE_SHIFT) |
-+				   (precharge << DP_AUX_CH_CTL_PRECHARGE_2US_SHIFT) |
-+				   (aux_clock_divider << DP_AUX_CH_CTL_BIT_CLOCK_2X_SHIFT) |
-+				   DP_AUX_CH_CTL_DONE |
-+				   DP_AUX_CH_CTL_TIME_OUT_ERROR |
-+				   DP_AUX_CH_CTL_RECEIVE_ERROR);
-+
-+			status = intel_dp_aux_wait_done(intel_dp, has_aux_irq);
-+
-+			/* Clear done status and any errors */
-+			I915_WRITE(ch_ctl,
-+				   status |
-+				   DP_AUX_CH_CTL_DONE |
-+				   DP_AUX_CH_CTL_TIME_OUT_ERROR |
-+				   DP_AUX_CH_CTL_RECEIVE_ERROR);
-+
-+			if (status & (DP_AUX_CH_CTL_TIME_OUT_ERROR |
-+				      DP_AUX_CH_CTL_RECEIVE_ERROR))
-+				continue;
-+			if (status & DP_AUX_CH_CTL_DONE)
-+				break;
-+		}
- 		if (status & DP_AUX_CH_CTL_DONE)
- 			break;
- 	}
-@@ -1464,7 +1474,7 @@ static void intel_edp_psr_enable_sink(struct intel_dp *intel_dp)
- {
- 	struct drm_device *dev = intel_dp_to_dev(intel_dp);
- 	struct drm_i915_private *dev_priv = dev->dev_private;
--	uint32_t aux_clock_divider = get_aux_clock_divider(intel_dp);
-+	uint32_t aux_clock_divider = get_aux_clock_divider(intel_dp, 0);
- 	int precharge = 0x3;
- 	int msg_size = 5;       /* Header(4) + Message(1) */
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0534-drm-i915-Replace-open-coded-offset_in_page.patch b/patches.baytrail/0534-drm-i915-Replace-open-coded-offset_in_page.patch
deleted file mode 100644
index 4ede453229571..0000000000000
--- a/patches.baytrail/0534-drm-i915-Replace-open-coded-offset_in_page.patch
+++ /dev/null
@@ -1,38 +0,0 @@
-From 941f20f10b1b911f61354a3910f183e7799f41bc Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Sun, 21 Jul 2013 17:23:11 +0100
-Subject: drm/i915: Replace open-coded offset_in_page()
-
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit de51f04f06d5e4a37f8e5a2b1019eb34140480f0)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem_execbuffer.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-index 1734825bef34..5b6d764e9bb2 100644
---- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-@@ -255,7 +255,7 @@ i915_gem_execbuffer_relocate_entry(struct drm_i915_gem_object *obj,
- 
- 	reloc->delta += target_offset;
- 	if (use_cpu_reloc(obj)) {
--		uint32_t page_offset = reloc->offset & ~PAGE_MASK;
-+		uint32_t page_offset = offset_in_page(reloc->offset);
- 		char *vaddr;
- 
- 		ret = i915_gem_object_set_to_cpu_domain(obj, 1);
-@@ -284,7 +284,7 @@ i915_gem_execbuffer_relocate_entry(struct drm_i915_gem_object *obj,
- 		reloc_page = io_mapping_map_atomic_wc(dev_priv->gtt.mappable,
- 						      reloc->offset & PAGE_MASK);
- 		reloc_entry = (uint32_t __iomem *)
--			(reloc_page + (reloc->offset & ~PAGE_MASK));
-+			(reloc_page + offset_in_page(reloc->offset));
- 		iowrite32(reloc->delta, reloc_entry);
- 		io_mapping_unmap_atomic(reloc_page);
- 	}
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0535-drm-i915-fix-pnv-display-core-clock-readout-out.patch b/patches.baytrail/0535-drm-i915-fix-pnv-display-core-clock-readout-out.patch
deleted file mode 100644
index 79c79df6b6806..0000000000000
--- a/patches.baytrail/0535-drm-i915-fix-pnv-display-core-clock-readout-out.patch
+++ /dev/null
@@ -1,92 +0,0 @@
-From d5785745998c402eb10cea7f7bea3862e9ec8162 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Fri, 26 Jul 2013 08:35:42 +0200
-Subject: drm/i915: fix pnv display core clock readout out
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-We need the correct clock to accurately assess whether we need to
-enable the double wide pipe mode or not.
-
-Cc: Chris Wilson <chris@chris-wilson.co.uk>
-Cc: Stéphane Marchesin <marcheu@chromium.org>
-Cc: Stuart Abercrombie <sabercrombie@google.com>
-Reviewed-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 257a7ffcfaf68718c963db6e9978d1f4f647986b)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_reg.h      |  6 ++++++
- drivers/gpu/drm/i915/intel_display.c | 29 ++++++++++++++++++++++++++++-
- 2 files changed, 34 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
-index fbe585da44d9..615d66717016 100644
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -61,6 +61,12 @@
- #define   GC_LOW_FREQUENCY_ENABLE	(1 << 7)
- #define   GC_DISPLAY_CLOCK_190_200_MHZ	(0 << 4)
- #define   GC_DISPLAY_CLOCK_333_MHZ	(4 << 4)
-+#define   GC_DISPLAY_CLOCK_267_MHZ_PNV	(0 << 4)
-+#define   GC_DISPLAY_CLOCK_333_MHZ_PNV	(1 << 4)
-+#define   GC_DISPLAY_CLOCK_444_MHZ_PNV	(2 << 4)
-+#define   GC_DISPLAY_CLOCK_200_MHZ_PNV	(5 << 4)
-+#define   GC_DISPLAY_CLOCK_133_MHZ_PNV	(6 << 4)
-+#define   GC_DISPLAY_CLOCK_167_MHZ_PNV	(7 << 4)
- #define   GC_DISPLAY_CLOCK_MASK		(7 << 4)
- #define   GM45_GC_RENDER_CLOCK_MASK	(0xf << 0)
- #define   GM45_GC_RENDER_CLOCK_266_MHZ	(8 << 0)
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index afac090a4f3d..cf78f44dc4bf 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -4159,6 +4159,30 @@ static int i9xx_misc_get_display_clock_speed(struct drm_device *dev)
- 	return 200000;
- }
- 
-+static int pnv_get_display_clock_speed(struct drm_device *dev)
-+{
-+	u16 gcfgc = 0;
-+
-+	pci_read_config_word(dev->pdev, GCFGC, &gcfgc);
-+
-+	switch (gcfgc & GC_DISPLAY_CLOCK_MASK) {
-+	case GC_DISPLAY_CLOCK_267_MHZ_PNV:
-+		return 267000;
-+	case GC_DISPLAY_CLOCK_333_MHZ_PNV:
-+		return 333000;
-+	case GC_DISPLAY_CLOCK_444_MHZ_PNV:
-+		return 444000;
-+	case GC_DISPLAY_CLOCK_200_MHZ_PNV:
-+		return 200000;
-+	default:
-+		DRM_ERROR("Unknown pnv display core clock 0x%04x\n", gcfgc);
-+	case GC_DISPLAY_CLOCK_133_MHZ_PNV:
-+		return 133000;
-+	case GC_DISPLAY_CLOCK_167_MHZ_PNV:
-+		return 167000;
-+	}
-+}
-+
- static int i915gm_get_display_clock_speed(struct drm_device *dev)
- {
- 	u16 gcfgc = 0;
-@@ -9611,9 +9635,12 @@ static void intel_init_display(struct drm_device *dev)
- 	else if (IS_I915G(dev))
- 		dev_priv->display.get_display_clock_speed =
- 			i915_get_display_clock_speed;
--	else if (IS_I945GM(dev) || IS_845G(dev) || IS_PINEVIEW_M(dev))
-+	else if (IS_I945GM(dev) || IS_845G(dev))
- 		dev_priv->display.get_display_clock_speed =
- 			i9xx_misc_get_display_clock_speed;
-+	else if (IS_PINEVIEW(dev))
-+		dev_priv->display.get_display_clock_speed =
-+			pnv_get_display_clock_speed;
- 	else if (IS_I915GM(dev))
- 		dev_priv->display.get_display_clock_speed =
- 			i915gm_get_display_clock_speed;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0536-drm-i915-Do-not-dereference-NULL-crtc-or-fb-until-af.patch b/patches.baytrail/0536-drm-i915-Do-not-dereference-NULL-crtc-or-fb-until-af.patch
deleted file mode 100644
index bf40bb64a4f8d..0000000000000
--- a/patches.baytrail/0536-drm-i915-Do-not-dereference-NULL-crtc-or-fb-until-af.patch
+++ /dev/null
@@ -1,53 +0,0 @@
-From ca58dc081fef5c5ad2f0e8c1be00ed80cbf190c0 Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Fri, 2 Aug 2013 20:39:49 +0100
-Subject: drm/i915: Do not dereference NULL crtc or fb until after checking
-
-Fixes regression from
-commit 4906557eb37b7fef84fad4304acef6dedf919880
-Author: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Date:   Thu Jul 11 18:45:05 2013 -0300
-
-    drm/i915: Hook PSR functionality
-
-Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67526
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Cc: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit cd234b0bfd5ab012e42274b24aae420fa1823d58)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_dp.c | 9 +++++++++
- 1 file changed, 9 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
-index 8b41cd9d9329..42ddfd457ca6 100644
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -1556,12 +1556,21 @@ static bool intel_edp_psr_match_conditions(struct intel_dp *intel_dp)
- 		return false;
- 	}
- 
-+	crtc = dig_port->base.base.crtc;
-+	if (crtc == NULL) {
-+		DRM_DEBUG_KMS("crtc not active for PSR\n");
-+		dev_priv->no_psr_reason = PSR_CRTC_NOT_ACTIVE;
-+		return false;
-+	}
-+
-+	intel_crtc = to_intel_crtc(crtc);
- 	if (!intel_crtc->active || !crtc->fb || !crtc->mode.clock) {
- 		DRM_DEBUG_KMS("crtc not active for PSR\n");
- 		dev_priv->no_psr_reason = PSR_CRTC_NOT_ACTIVE;
- 		return false;
- 	}
- 
-+	obj = to_intel_framebuffer(crtc->fb)->obj;
- 	if (obj->tiling_mode != I915_TILING_X ||
- 	    obj->fence_reg == I915_FENCE_REG_NONE) {
- 		DRM_DEBUG_KMS("PSR condition failed: fb not tiled or fenced\n");
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0537-drm-i915-dvo-use-intel_encoder-to-the-upcast-macro.patch b/patches.baytrail/0537-drm-i915-dvo-use-intel_encoder-to-the-upcast-macro.patch
deleted file mode 100644
index 6e26ef7948e8d..0000000000000
--- a/patches.baytrail/0537-drm-i915-dvo-use-intel_encoder-to-the-upcast-macro.patch
+++ /dev/null
@@ -1,97 +0,0 @@
-From d75e863623bb3ae1846e87fd8d4c4a639fecc3ee Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Sun, 21 Jul 2013 21:36:57 +0200
-Subject: drm/i915/dvo: use intel_encoder to the upcast macro
-
-More natural and will soon be even better!
-
-Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 69438e64afc7343e641afa57f6e73618e46d8984)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_dvo.c | 18 +++++++++---------
- 1 file changed, 9 insertions(+), 9 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_dvo.c b/drivers/gpu/drm/i915/intel_dvo.c
-index 8b4ad27791f3..39cf596cc42c 100644
---- a/drivers/gpu/drm/i915/intel_dvo.c
-+++ b/drivers/gpu/drm/i915/intel_dvo.c
-@@ -100,9 +100,9 @@ struct intel_dvo {
- 	bool panel_wants_dither;
- };
- 
--static struct intel_dvo *enc_to_intel_dvo(struct drm_encoder *encoder)
-+static struct intel_dvo *enc_to_dvo(struct intel_encoder *encoder)
- {
--	return container_of(encoder, struct intel_dvo, base.base);
-+	return container_of(encoder, struct intel_dvo, base);
- }
- 
- static struct intel_dvo *intel_attached_dvo(struct drm_connector *connector)
-@@ -123,7 +123,7 @@ static bool intel_dvo_get_hw_state(struct intel_encoder *encoder,
- {
- 	struct drm_device *dev = encoder->base.dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
--	struct intel_dvo *intel_dvo = enc_to_intel_dvo(&encoder->base);
-+	struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
- 	u32 tmp;
- 
- 	tmp = I915_READ(intel_dvo->dev.dvo_reg);
-@@ -140,7 +140,7 @@ static void intel_dvo_get_config(struct intel_encoder *encoder,
- 				 struct intel_crtc_config *pipe_config)
- {
- 	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
--	struct intel_dvo *intel_dvo = enc_to_intel_dvo(&encoder->base);
-+	struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
- 	u32 tmp, flags = 0;
- 
- 	tmp = I915_READ(intel_dvo->dev.dvo_reg);
-@@ -159,7 +159,7 @@ static void intel_dvo_get_config(struct intel_encoder *encoder,
- static void intel_disable_dvo(struct intel_encoder *encoder)
- {
- 	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
--	struct intel_dvo *intel_dvo = enc_to_intel_dvo(&encoder->base);
-+	struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
- 	u32 dvo_reg = intel_dvo->dev.dvo_reg;
- 	u32 temp = I915_READ(dvo_reg);
- 
-@@ -171,7 +171,7 @@ static void intel_disable_dvo(struct intel_encoder *encoder)
- static void intel_enable_dvo(struct intel_encoder *encoder)
- {
- 	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
--	struct intel_dvo *intel_dvo = enc_to_intel_dvo(&encoder->base);
-+	struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
- 	u32 dvo_reg = intel_dvo->dev.dvo_reg;
- 	u32 temp = I915_READ(dvo_reg);
- 
-@@ -245,7 +245,7 @@ static bool intel_dvo_mode_fixup(struct drm_encoder *encoder,
- 				 const struct drm_display_mode *mode,
- 				 struct drm_display_mode *adjusted_mode)
- {
--	struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
-+	struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder));
- 
- 	/* If we have timings from the BIOS for the panel, put them in
- 	 * to the adjusted mode.  The CRTC will be set up for this mode,
-@@ -279,7 +279,7 @@ static void intel_dvo_mode_set(struct drm_encoder *encoder,
- 	struct drm_device *dev = encoder->dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
--	struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
-+	struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder));
- 	int pipe = intel_crtc->pipe;
- 	u32 dvo_val;
- 	u32 dvo_reg = intel_dvo->dev.dvo_reg, dvo_srcdim_reg;
-@@ -391,7 +391,7 @@ static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs
- 
- static void intel_dvo_enc_destroy(struct drm_encoder *encoder)
- {
--	struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
-+	struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder));
- 
- 	if (intel_dvo->dev.dev_ops->destroy)
- 		intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0538-drm-i915-dvo-switch-mode_fixup-to-compute_config.patch b/patches.baytrail/0538-drm-i915-dvo-switch-mode_fixup-to-compute_config.patch
deleted file mode 100644
index e1b755e27676e..0000000000000
--- a/patches.baytrail/0538-drm-i915-dvo-switch-mode_fixup-to-compute_config.patch
+++ /dev/null
@@ -1,76 +0,0 @@
-From 303c303e7dd6b08ad8f5e4d02db287bf157e8d15 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Sun, 21 Jul 2013 21:36:58 +0200
-Subject: drm/i915/dvo: switch ->mode_fixup to ->compute_config
-
-This is the last encoder ->mode_fixup callback we have left, so
-convert it.
-
-Note that we want to only rip out the encoder->mode_fixup callback.
-But we still have the dvo_slave->mode_fixup callback. dvo is gen2
-only, so we won't ever touch this again. Hence why I didn't go through
-all 6-7 dvo slave drivers and give them the same treatment. I'll add a
-note to the commit message about this when merging, presuming there's
-nothing else in the patch that needs to be fixed up.
-
-Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-[danvet: Add note about why we keep the dvo->mode_fixup callback to
-answer a question from Rodrigo's review.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit a34703752e0b682ab4e6fccf1ce675176cf1dad2)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_dvo.c | 14 ++++++++------
- 1 file changed, 8 insertions(+), 6 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_dvo.c b/drivers/gpu/drm/i915/intel_dvo.c
-index 39cf596cc42c..51eadc944d9a 100644
---- a/drivers/gpu/drm/i915/intel_dvo.c
-+++ b/drivers/gpu/drm/i915/intel_dvo.c
-@@ -241,11 +241,11 @@ static int intel_dvo_mode_valid(struct drm_connector *connector,
- 	return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode);
- }
- 
--static bool intel_dvo_mode_fixup(struct drm_encoder *encoder,
--				 const struct drm_display_mode *mode,
--				 struct drm_display_mode *adjusted_mode)
-+static bool intel_dvo_compute_config(struct intel_encoder *encoder,
-+				     struct intel_crtc_config *pipe_config)
- {
--	struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder));
-+	struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
-+	struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
- 
- 	/* If we have timings from the BIOS for the panel, put them in
- 	 * to the adjusted mode.  The CRTC will be set up for this mode,
-@@ -267,7 +267,9 @@ static bool intel_dvo_mode_fixup(struct drm_encoder *encoder,
- 	}
- 
- 	if (intel_dvo->dev.dev_ops->mode_fixup)
--		return intel_dvo->dev.dev_ops->mode_fixup(&intel_dvo->dev, mode, adjusted_mode);
-+		return intel_dvo->dev.dev_ops->mode_fixup(&intel_dvo->dev,
-+							  &pipe_config->requested_mode,
-+							  adjusted_mode);
- 
- 	return true;
- }
-@@ -372,7 +374,6 @@ static void intel_dvo_destroy(struct drm_connector *connector)
- }
- 
- static const struct drm_encoder_helper_funcs intel_dvo_helper_funcs = {
--	.mode_fixup = intel_dvo_mode_fixup,
- 	.mode_set = intel_dvo_mode_set,
- };
- 
-@@ -470,6 +471,7 @@ void intel_dvo_init(struct drm_device *dev)
- 	intel_encoder->enable = intel_enable_dvo;
- 	intel_encoder->get_hw_state = intel_dvo_get_hw_state;
- 	intel_encoder->get_config = intel_dvo_get_config;
-+	intel_encoder->compute_config = intel_dvo_compute_config;
- 	intel_connector->get_hw_state = intel_dvo_connector_get_hw_state;
- 
- 	/* Now, try to find a controller */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0539-drm-i915-rip-out-legacy-encoder-mode_fixup-logic.patch b/patches.baytrail/0539-drm-i915-rip-out-legacy-encoder-mode_fixup-logic.patch
deleted file mode 100644
index 1482358245149..0000000000000
--- a/patches.baytrail/0539-drm-i915-rip-out-legacy-encoder-mode_fixup-logic.patch
+++ /dev/null
@@ -1,63 +0,0 @@
-From b09cffb594e2f62dc0d97a5f9435281869f75600 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Sun, 21 Jul 2013 21:36:59 +0200
-Subject: drm/i915: rip out legacy encoder->mode_fixup logic
-
-Everyone is now using our own ->compute_config callback, which means
-we can now also make that callback mandatory.
-
-Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit efea6e8e49388478be405b3ae62644ef06dca9a1)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 19 +++----------------
- 1 file changed, 3 insertions(+), 16 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index cf78f44dc4bf..4a3b386bc642 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -4105,7 +4105,7 @@ static int intel_crtc_compute_config(struct intel_crtc *crtc,
- 	}
- 
- 	/* All interlaced capable intel hw wants timings in frames. Note though
--	 * that intel_lvds_mode_fixup does some funny tricks with the crtc
-+	 * that intel_lvds_compute_config does some funny tricks with the crtc
- 	 * timings, so we need to be careful not to clobber these.*/
- 	if (!pipe_config->timings_set)
- 		drm_mode_set_crtcinfo(adjusted_mode, 0);
-@@ -8065,7 +8065,6 @@ intel_modeset_pipe_config(struct drm_crtc *crtc,
- 			  struct drm_display_mode *mode)
- {
- 	struct drm_device *dev = crtc->dev;
--	struct drm_encoder_helper_funcs *encoder_funcs;
- 	struct intel_encoder *encoder;
- 	struct intel_crtc_config *pipe_config;
- 	int plane_bpp, ret = -EINVAL;
-@@ -8110,20 +8109,8 @@ encoder_retry:
- 		if (&encoder->new_crtc->base != crtc)
- 			continue;
- 
--		if (encoder->compute_config) {
--			if (!(encoder->compute_config(encoder, pipe_config))) {
--				DRM_DEBUG_KMS("Encoder config failure\n");
--				goto fail;
--			}
--
--			continue;
--		}
--
--		encoder_funcs = encoder->base.helper_private;
--		if (!(encoder_funcs->mode_fixup(&encoder->base,
--						&pipe_config->requested_mode,
--						&pipe_config->adjusted_mode))) {
--			DRM_DEBUG_KMS("Encoder fixup failed\n");
-+		if (!(encoder->compute_config(encoder, pipe_config))) {
-+			DRM_DEBUG_KMS("Encoder config failure\n");
- 			goto fail;
- 		}
- 	}
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0540-drm-i915-dvo-use-native-encoder-mode_set-callback.patch b/patches.baytrail/0540-drm-i915-dvo-use-native-encoder-mode_set-callback.patch
deleted file mode 100644
index 5c6b91f053638..0000000000000
--- a/patches.baytrail/0540-drm-i915-dvo-use-native-encoder-mode_set-callback.patch
+++ /dev/null
@@ -1,92 +0,0 @@
-From 4d3d1edf776cc509e3f4b434768645edba82930e Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Sun, 21 Jul 2013 21:37:00 +0200
-Subject: drm/i915/dvo: use native encoder ->mode_set callback
-
-Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 79fde3011fe03f4cef31e55eff607180e1c7c5fd)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_dvo.c | 28 +++++++++++-----------------
- 1 file changed, 11 insertions(+), 17 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_dvo.c b/drivers/gpu/drm/i915/intel_dvo.c
-index 51eadc944d9a..406303b509c1 100644
---- a/drivers/gpu/drm/i915/intel_dvo.c
-+++ b/drivers/gpu/drm/i915/intel_dvo.c
-@@ -107,8 +107,7 @@ static struct intel_dvo *enc_to_dvo(struct intel_encoder *encoder)
- 
- static struct intel_dvo *intel_attached_dvo(struct drm_connector *connector)
- {
--	return container_of(intel_attached_encoder(connector),
--			    struct intel_dvo, base);
-+	return enc_to_dvo(intel_attached_encoder(connector));
- }
- 
- static bool intel_dvo_connector_get_hw_state(struct intel_connector *connector)
-@@ -274,15 +273,14 @@ static bool intel_dvo_compute_config(struct intel_encoder *encoder,
- 	return true;
- }
- 
--static void intel_dvo_mode_set(struct drm_encoder *encoder,
--			       struct drm_display_mode *mode,
--			       struct drm_display_mode *adjusted_mode)
-+static void intel_dvo_mode_set(struct intel_encoder *encoder)
- {
--	struct drm_device *dev = encoder->dev;
-+	struct drm_device *dev = encoder->base.dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
--	struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
--	struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder));
--	int pipe = intel_crtc->pipe;
-+	struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
-+	struct drm_display_mode *adjusted_mode = &crtc->config.adjusted_mode;
-+	struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
-+	int pipe = crtc->pipe;
- 	u32 dvo_val;
- 	u32 dvo_reg = intel_dvo->dev.dvo_reg, dvo_srcdim_reg;
- 
-@@ -299,7 +297,9 @@ static void intel_dvo_mode_set(struct drm_encoder *encoder,
- 		break;
- 	}
- 
--	intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev, mode, adjusted_mode);
-+	intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev,
-+					 &crtc->config.requested_mode,
-+					 adjusted_mode);
- 
- 	/* Save the data order, since I don't know what it should be set to. */
- 	dvo_val = I915_READ(dvo_reg) &
-@@ -373,10 +373,6 @@ static void intel_dvo_destroy(struct drm_connector *connector)
- 	kfree(connector);
- }
- 
--static const struct drm_encoder_helper_funcs intel_dvo_helper_funcs = {
--	.mode_set = intel_dvo_mode_set,
--};
--
- static const struct drm_connector_funcs intel_dvo_connector_funcs = {
- 	.dpms = intel_dvo_dpms,
- 	.detect = intel_dvo_detect,
-@@ -472,6 +468,7 @@ void intel_dvo_init(struct drm_device *dev)
- 	intel_encoder->get_hw_state = intel_dvo_get_hw_state;
- 	intel_encoder->get_config = intel_dvo_get_config;
- 	intel_encoder->compute_config = intel_dvo_compute_config;
-+	intel_encoder->mode_set = intel_dvo_mode_set;
- 	intel_connector->get_hw_state = intel_dvo_connector_get_hw_state;
- 
- 	/* Now, try to find a controller */
-@@ -538,9 +535,6 @@ void intel_dvo_init(struct drm_device *dev)
- 		connector->interlace_allowed = false;
- 		connector->doublescan_allowed = false;
- 
--		drm_encoder_helper_add(&intel_encoder->base,
--				       &intel_dvo_helper_funcs);
--
- 		intel_connector_attach_encoder(intel_connector, intel_encoder);
- 		if (dvo->type == INTEL_DVO_CHIP_LVDS) {
- 			/* For our LVDS chipsets, we should hopefully be able
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0541-drm-i915-sdvo-use-intel_encoder-for-upcast-helper.patch b/patches.baytrail/0541-drm-i915-sdvo-use-intel_encoder-for-upcast-helper.patch
deleted file mode 100644
index 7f69d5889f5f9..0000000000000
--- a/patches.baytrail/0541-drm-i915-sdvo-use-intel_encoder-for-upcast-helper.patch
+++ /dev/null
@@ -1,114 +0,0 @@
-From e97b6edc877481a13874661526a726ac43870d3c Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Sun, 21 Jul 2013 21:37:01 +0200
-Subject: drm/i915/sdvo: use intel_encoder for upcast helper
-
-It's what all callers (except for the destroy callback which is called
-from drm core) actually want.
-
-Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 8aca63aae07681a0c9a2a0ebcca82ca5f7f6aa08)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_sdvo.c | 23 +++++++++++------------
- 1 file changed, 11 insertions(+), 12 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
-index c3b59b8593b9..47423f31f82b 100644
---- a/drivers/gpu/drm/i915/intel_sdvo.c
-+++ b/drivers/gpu/drm/i915/intel_sdvo.c
-@@ -202,15 +202,14 @@ struct intel_sdvo_connector {
- 	u32	cur_dot_crawl,	max_dot_crawl;
- };
- 
--static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
-+static struct intel_sdvo *to_sdvo(struct intel_encoder *encoder)
- {
--	return container_of(encoder, struct intel_sdvo, base.base);
-+	return container_of(encoder, struct intel_sdvo, base);
- }
- 
- static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
- {
--	return container_of(intel_attached_encoder(connector),
--			    struct intel_sdvo, base);
-+	return to_sdvo(intel_attached_encoder(connector));
- }
- 
- static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
-@@ -1084,7 +1083,7 @@ static void i9xx_adjust_sdvo_tv_clock(struct intel_crtc_config *pipe_config)
- static bool intel_sdvo_compute_config(struct intel_encoder *encoder,
- 				      struct intel_crtc_config *pipe_config)
- {
--	struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
-+	struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
- 	struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
- 	struct drm_display_mode *mode = &pipe_config->requested_mode;
- 
-@@ -1154,7 +1153,7 @@ static void intel_sdvo_mode_set(struct intel_encoder *intel_encoder)
- 	struct drm_display_mode *adjusted_mode =
- 		&intel_crtc->config.adjusted_mode;
- 	struct drm_display_mode *mode = &intel_crtc->config.requested_mode;
--	struct intel_sdvo *intel_sdvo = to_intel_sdvo(&intel_encoder->base);
-+	struct intel_sdvo *intel_sdvo = to_sdvo(intel_encoder);
- 	u32 sdvox;
- 	struct intel_sdvo_in_out_map in_out;
- 	struct intel_sdvo_dtd input_dtd, output_dtd;
-@@ -1292,7 +1291,7 @@ static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder,
- {
- 	struct drm_device *dev = encoder->base.dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
--	struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
-+	struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
- 	u16 active_outputs = 0;
- 	u32 tmp;
- 
-@@ -1315,7 +1314,7 @@ static void intel_sdvo_get_config(struct intel_encoder *encoder,
- {
- 	struct drm_device *dev = encoder->base.dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
--	struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
-+	struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
- 	struct intel_sdvo_dtd dtd;
- 	int encoder_pixel_multiplier = 0;
- 	u32 flags = 0, sdvox;
-@@ -1380,7 +1379,7 @@ static void intel_sdvo_get_config(struct intel_encoder *encoder,
- static void intel_disable_sdvo(struct intel_encoder *encoder)
- {
- 	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
--	struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
-+	struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
- 	u32 temp;
- 
- 	intel_sdvo_set_active_outputs(intel_sdvo, 0);
-@@ -1422,7 +1421,7 @@ static void intel_enable_sdvo(struct intel_encoder *encoder)
- {
- 	struct drm_device *dev = encoder->base.dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
--	struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
-+	struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
- 	struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
- 	u32 temp;
- 	bool input1, input2;
-@@ -1583,7 +1582,7 @@ static uint16_t intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo)
- 
- static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
- {
--	struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
-+	struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
- 
- 	intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG,
- 			&intel_sdvo->hotplug_active, 2);
-@@ -2190,7 +2189,7 @@ static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs
- 
- static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
- {
--	struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
-+	struct intel_sdvo *intel_sdvo = to_sdvo(to_intel_encoder(encoder));
- 
- 	if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
- 		drm_mode_destroy(encoder->dev,
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0542-drm-i915-tv-Use-native-encoder-mode_set-callback.patch b/patches.baytrail/0542-drm-i915-tv-Use-native-encoder-mode_set-callback.patch
deleted file mode 100644
index 41de720ede836..0000000000000
--- a/patches.baytrail/0542-drm-i915-tv-Use-native-encoder-mode_set-callback.patch
+++ /dev/null
@@ -1,98 +0,0 @@
-From 7fe9cc566bde9f8e4c8f34a1c25382f2f53c34cc Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Sun, 21 Jul 2013 21:37:02 +0200
-Subject: drm/i915/tv: Use native encoder->mode_set callback
-
-Also switch to intel_encoder for the upcast helper while at it.
-
-Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit cd91ef23c426fe5aeee6ca8090551547b3a8795e)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_tv.c | 27 +++++++++------------------
- 1 file changed, 9 insertions(+), 18 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c
-index 685017000087..dd6f84bf6c22 100644
---- a/drivers/gpu/drm/i915/intel_tv.c
-+++ b/drivers/gpu/drm/i915/intel_tv.c
-@@ -823,16 +823,14 @@ static const struct tv_mode tv_modes[] = {
- 	},
- };
- 
--static struct intel_tv *enc_to_intel_tv(struct drm_encoder *encoder)
-+static struct intel_tv *enc_to_tv(struct intel_encoder *encoder)
- {
--	return container_of(encoder, struct intel_tv, base.base);
-+	return container_of(encoder, struct intel_tv, base);
- }
- 
- static struct intel_tv *intel_attached_tv(struct drm_connector *connector)
- {
--	return container_of(intel_attached_encoder(connector),
--			    struct intel_tv,
--			    base);
-+	return enc_to_tv(intel_attached_encoder(connector));
- }
- 
- static bool
-@@ -908,7 +906,7 @@ static bool
- intel_tv_compute_config(struct intel_encoder *encoder,
- 			struct intel_crtc_config *pipe_config)
- {
--	struct intel_tv *intel_tv = enc_to_intel_tv(&encoder->base);
-+	struct intel_tv *intel_tv = enc_to_tv(encoder);
- 	const struct tv_mode *tv_mode = intel_tv_mode_find(intel_tv);
- 
- 	if (!tv_mode)
-@@ -929,15 +927,12 @@ intel_tv_compute_config(struct intel_encoder *encoder,
- 	return true;
- }
- 
--static void
--intel_tv_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
--		  struct drm_display_mode *adjusted_mode)
-+static void intel_tv_mode_set(struct intel_encoder *encoder)
- {
--	struct drm_device *dev = encoder->dev;
-+	struct drm_device *dev = encoder->base.dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
--	struct drm_crtc *crtc = encoder->crtc;
--	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
--	struct intel_tv *intel_tv = enc_to_intel_tv(encoder);
-+	struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
-+	struct intel_tv *intel_tv = enc_to_tv(encoder);
- 	const struct tv_mode *tv_mode = intel_tv_mode_find(intel_tv);
- 	u32 tv_ctl;
- 	u32 hctl1, hctl2, hctl3;
-@@ -1495,10 +1490,6 @@ out:
- 	return ret;
- }
- 
--static const struct drm_encoder_helper_funcs intel_tv_helper_funcs = {
--	.mode_set = intel_tv_mode_set,
--};
--
- static const struct drm_connector_funcs intel_tv_connector_funcs = {
- 	.dpms = intel_connector_dpms,
- 	.detect = intel_tv_detect,
-@@ -1631,6 +1622,7 @@ intel_tv_init(struct drm_device *dev)
- 			 DRM_MODE_ENCODER_TVDAC);
- 
- 	intel_encoder->compute_config = intel_tv_compute_config;
-+	intel_encoder->mode_set = intel_tv_mode_set;
- 	intel_encoder->enable = intel_enable_tv;
- 	intel_encoder->disable = intel_disable_tv;
- 	intel_encoder->get_hw_state = intel_tv_get_hw_state;
-@@ -1652,7 +1644,6 @@ intel_tv_init(struct drm_device *dev)
- 
- 	intel_tv->tv_format = tv_modes[initial_mode].name;
- 
--	drm_encoder_helper_add(&intel_encoder->base, &intel_tv_helper_funcs);
- 	drm_connector_helper_add(connector, &intel_tv_connector_helper_funcs);
- 	connector->interlace_allowed = false;
- 	connector->doublescan_allowed = false;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0543-drm-i915-crt-use-native-encoder-mode_set-callback.patch b/patches.baytrail/0543-drm-i915-crt-use-native-encoder-mode_set-callback.patch
deleted file mode 100644
index 958568ec58820..0000000000000
--- a/patches.baytrail/0543-drm-i915-crt-use-native-encoder-mode_set-callback.patch
+++ /dev/null
@@ -1,111 +0,0 @@
-From c074cd0d33191d5d1ce6962f661d83f9124dc9e9 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Sun, 21 Jul 2013 21:37:03 +0200
-Subject: drm/i915/crt: use native encoder->mode_set callback
-
-Also drop the intel_ prefix from the local intel_crtc variable and
-reorder the upcast macros a bit for more reuse.
-
-Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit eebe6f0b3d4207a05000921a5e60b4161f89ca35)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_crt.c | 34 +++++++++++++---------------------
- 1 file changed, 13 insertions(+), 21 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
-index 0c0d4e8d768e..b5a3875f22c7 100644
---- a/drivers/gpu/drm/i915/intel_crt.c
-+++ b/drivers/gpu/drm/i915/intel_crt.c
-@@ -52,15 +52,14 @@ struct intel_crt {
- 	u32 adpa_reg;
- };
- 
--static struct intel_crt *intel_attached_crt(struct drm_connector *connector)
-+static struct intel_crt *intel_encoder_to_crt(struct intel_encoder *encoder)
- {
--	return container_of(intel_attached_encoder(connector),
--			    struct intel_crt, base);
-+	return container_of(encoder, struct intel_crt, base);
- }
- 
--static struct intel_crt *intel_encoder_to_crt(struct intel_encoder *encoder)
-+static struct intel_crt *intel_attached_crt(struct drm_connector *connector)
- {
--	return container_of(encoder, struct intel_crt, base);
-+	return intel_encoder_to_crt(intel_attached_encoder(connector));
- }
- 
- static bool intel_crt_get_hw_state(struct intel_encoder *encoder,
-@@ -238,17 +237,14 @@ static bool intel_crt_compute_config(struct intel_encoder *encoder,
- 	return true;
- }
- 
--static void intel_crt_mode_set(struct drm_encoder *encoder,
--			       struct drm_display_mode *mode,
--			       struct drm_display_mode *adjusted_mode)
-+static void intel_crt_mode_set(struct intel_encoder *encoder)
- {
- 
--	struct drm_device *dev = encoder->dev;
--	struct drm_crtc *crtc = encoder->crtc;
--	struct intel_crt *crt =
--		intel_encoder_to_crt(to_intel_encoder(encoder));
--	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
-+	struct drm_device *dev = encoder->base.dev;
-+	struct intel_crt *crt = intel_encoder_to_crt(encoder);
-+	struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
- 	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct drm_display_mode *adjusted_mode = &crtc->config.adjusted_mode;
- 	u32 adpa;
- 
- 	if (HAS_PCH_SPLIT(dev))
-@@ -265,14 +261,14 @@ static void intel_crt_mode_set(struct drm_encoder *encoder,
- 	if (HAS_PCH_LPT(dev))
- 		; /* Those bits don't exist here */
- 	else if (HAS_PCH_CPT(dev))
--		adpa |= PORT_TRANS_SEL_CPT(intel_crtc->pipe);
--	else if (intel_crtc->pipe == 0)
-+		adpa |= PORT_TRANS_SEL_CPT(crtc->pipe);
-+	else if (crtc->pipe == 0)
- 		adpa |= ADPA_PIPE_A_SELECT;
- 	else
- 		adpa |= ADPA_PIPE_B_SELECT;
- 
- 	if (!HAS_PCH_SPLIT(dev))
--		I915_WRITE(BCLRPAT(intel_crtc->pipe), 0);
-+		I915_WRITE(BCLRPAT(crtc->pipe), 0);
- 
- 	I915_WRITE(crt->adpa_reg, adpa);
- }
-@@ -711,10 +707,6 @@ static void intel_crt_reset(struct drm_connector *connector)
-  * Routines for controlling stuff on the analog port
-  */
- 
--static const struct drm_encoder_helper_funcs crt_encoder_funcs = {
--	.mode_set = intel_crt_mode_set,
--};
--
- static const struct drm_connector_funcs intel_crt_connector_funcs = {
- 	.reset = intel_crt_reset,
- 	.dpms = intel_crt_dpms,
-@@ -804,6 +796,7 @@ void intel_crt_init(struct drm_device *dev)
- 		crt->adpa_reg = ADPA;
- 
- 	crt->base.compute_config = intel_crt_compute_config;
-+	crt->base.mode_set = intel_crt_mode_set;
- 	crt->base.disable = intel_disable_crt;
- 	crt->base.enable = intel_enable_crt;
- 	crt->base.get_config = intel_crt_get_config;
-@@ -815,7 +808,6 @@ void intel_crt_init(struct drm_device *dev)
- 		crt->base.get_hw_state = intel_crt_get_hw_state;
- 	intel_connector->get_hw_state = intel_connector_get_hw_state;
- 
--	drm_encoder_helper_add(&crt->base.base, &crt_encoder_funcs);
- 	drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
- 
- 	drm_sysfs_connector_add(connector);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0544-drm-i915-hdmi-use-native-encoder-mode_set-callback.patch b/patches.baytrail/0544-drm-i915-hdmi-use-native-encoder-mode_set-callback.patch
deleted file mode 100644
index 89de529a20fe8..0000000000000
--- a/patches.baytrail/0544-drm-i915-hdmi-use-native-encoder-mode_set-callback.patch
+++ /dev/null
@@ -1,103 +0,0 @@
-From 754df95a7c0312c9f1c5011aa51cb691ee741aef Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Sun, 21 Jul 2013 21:37:04 +0200
-Subject: drm/i915/hdmi: use native encoder mode_set callback
-
-Again drop the intel_ prefix from the intel_crtc local variable to
-save a bit of space. But here I didn't switch the upcast macros to
-intel_encoder since all our infoframe interfaces still use
-drm_encoder. That needs to be changed first.
-
-Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit c59423a3dd4186ed4c352537c2b572a9bb950fe9)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_hdmi.c | 29 ++++++++++++-----------------
- 1 file changed, 12 insertions(+), 17 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
-index 044d11d05944..e82cd816bde9 100644
---- a/drivers/gpu/drm/i915/intel_hdmi.c
-+++ b/drivers/gpu/drm/i915/intel_hdmi.c
-@@ -591,14 +591,13 @@ static void hsw_set_infoframes(struct drm_encoder *encoder,
- 	intel_hdmi_set_spd_infoframe(encoder);
- }
- 
--static void intel_hdmi_mode_set(struct drm_encoder *encoder,
--				struct drm_display_mode *mode,
--				struct drm_display_mode *adjusted_mode)
-+static void intel_hdmi_mode_set(struct intel_encoder *encoder)
- {
--	struct drm_device *dev = encoder->dev;
-+	struct drm_device *dev = encoder->base.dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
--	struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
--	struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
-+	struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
-+	struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base);
-+	struct drm_display_mode *adjusted_mode = &crtc->config.adjusted_mode;
- 	u32 hdmi_val;
- 
- 	hdmi_val = SDVO_ENCODING_HDMI;
-@@ -609,7 +608,7 @@ static void intel_hdmi_mode_set(struct drm_encoder *encoder,
- 	if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
- 		hdmi_val |= SDVO_HSYNC_ACTIVE_HIGH;
- 
--	if (intel_crtc->config.pipe_bpp > 24)
-+	if (crtc->config.pipe_bpp > 24)
- 		hdmi_val |= HDMI_COLOR_FORMAT_12bpc;
- 	else
- 		hdmi_val |= SDVO_COLOR_FORMAT_8bpc;
-@@ -620,21 +619,21 @@ static void intel_hdmi_mode_set(struct drm_encoder *encoder,
- 
- 	if (intel_hdmi->has_audio) {
- 		DRM_DEBUG_DRIVER("Enabling HDMI audio on pipe %c\n",
--				 pipe_name(intel_crtc->pipe));
-+				 pipe_name(crtc->pipe));
- 		hdmi_val |= SDVO_AUDIO_ENABLE;
- 		hdmi_val |= HDMI_MODE_SELECT_HDMI;
--		intel_write_eld(encoder, adjusted_mode);
-+		intel_write_eld(&encoder->base, adjusted_mode);
- 	}
- 
- 	if (HAS_PCH_CPT(dev))
--		hdmi_val |= SDVO_PIPE_SEL_CPT(intel_crtc->pipe);
-+		hdmi_val |= SDVO_PIPE_SEL_CPT(crtc->pipe);
- 	else
--		hdmi_val |= SDVO_PIPE_SEL(intel_crtc->pipe);
-+		hdmi_val |= SDVO_PIPE_SEL(crtc->pipe);
- 
- 	I915_WRITE(intel_hdmi->hdmi_reg, hdmi_val);
- 	POSTING_READ(intel_hdmi->hdmi_reg);
- 
--	intel_hdmi->set_infoframes(encoder, adjusted_mode);
-+	intel_hdmi->set_infoframes(&encoder->base, adjusted_mode);
- }
- 
- static bool intel_hdmi_get_hw_state(struct intel_encoder *encoder,
-@@ -1116,10 +1115,6 @@ static void intel_hdmi_destroy(struct drm_connector *connector)
- 	kfree(connector);
- }
- 
--static const struct drm_encoder_helper_funcs intel_hdmi_helper_funcs = {
--	.mode_set = intel_hdmi_mode_set,
--};
--
- static const struct drm_connector_funcs intel_hdmi_connector_funcs = {
- 	.dpms = intel_connector_dpms,
- 	.detect = intel_hdmi_detect,
-@@ -1242,9 +1237,9 @@ void intel_hdmi_init(struct drm_device *dev, int hdmi_reg, enum port port)
- 
- 	drm_encoder_init(dev, &intel_encoder->base, &intel_hdmi_enc_funcs,
- 			 DRM_MODE_ENCODER_TMDS);
--	drm_encoder_helper_add(&intel_encoder->base, &intel_hdmi_helper_funcs);
- 
- 	intel_encoder->compute_config = intel_hdmi_compute_config;
-+	intel_encoder->mode_set = intel_hdmi_mode_set;
- 	intel_encoder->enable = intel_enable_hdmi;
- 	intel_encoder->disable = intel_disable_hdmi;
- 	intel_encoder->get_hw_state = intel_hdmi_get_hw_state;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0545-drm-i915-dp-use-native-encoder-mode_set-callback.patch b/patches.baytrail/0545-drm-i915-dp-use-native-encoder-mode_set-callback.patch
deleted file mode 100644
index 7cf45b2791535..0000000000000
--- a/patches.baytrail/0545-drm-i915-dp-use-native-encoder-mode_set-callback.patch
+++ /dev/null
@@ -1,71 +0,0 @@
-From 4f337b2af7ab8d4fb9761d5424be9ba6645d7b39 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Sun, 21 Jul 2013 21:37:05 +0200
-Subject: drm/i915/dp: use native encoder ->mode_set callback
-
-Usual drill applies. Again I've not switched the upcast helpers to use
-intel_encoder instead of drm_encoder since that's much more invasive
-and will change also the hdmi and ddi encoders.
-
-Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit b934223d7abae2f52d22b4734a02b9a0867eafe3)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_dp.c |   19 +++++++------------
- 1 file changed, 7 insertions(+), 12 deletions(-)
-
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -844,15 +844,14 @@ static void ironlake_set_pll_cpu_edp(str
- 	udelay(500);
- }
- 
--static void
--intel_dp_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
--		  struct drm_display_mode *adjusted_mode)
-+static void intel_dp_mode_set(struct intel_encoder *encoder)
- {
--	struct drm_device *dev = encoder->dev;
-+	struct drm_device *dev = encoder->base.dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
--	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
-+	struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
- 	enum port port = dp_to_dig_port(intel_dp)->port;
--	struct intel_crtc *crtc = to_intel_crtc(encoder->crtc);
-+	struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
-+	struct drm_display_mode *adjusted_mode = &crtc->config.adjusted_mode;
- 
- 	/*
- 	 * There are four kinds of DP registers:
-@@ -884,7 +883,7 @@ intel_dp_mode_set(struct drm_encoder *en
- 		DRM_DEBUG_DRIVER("Enabling DP audio on pipe %c\n",
- 				 pipe_name(crtc->pipe));
- 		intel_dp->DP |= DP_AUDIO_OUTPUT_ENABLE;
--		intel_write_eld(encoder, adjusted_mode);
-+		intel_write_eld(&encoder->base, adjusted_mode);
- 	}
- 
- 	intel_dp_init_link_config(intel_dp);
-@@ -3062,10 +3061,6 @@ void intel_dp_encoder_destroy(struct drm
- 	kfree(intel_dig_port);
- }
- 
--static const struct drm_encoder_helper_funcs intel_dp_helper_funcs = {
--	.mode_set = intel_dp_mode_set,
--};
--
- static const struct drm_connector_funcs intel_dp_connector_funcs = {
- 	.dpms = intel_connector_dpms,
- 	.detect = intel_dp_detect,
-@@ -3545,9 +3540,9 @@ intel_dp_init(struct drm_device *dev, in
- 
- 	drm_encoder_init(dev, &intel_encoder->base, &intel_dp_enc_funcs,
- 			 DRM_MODE_ENCODER_TMDS);
--	drm_encoder_helper_add(&intel_encoder->base, &intel_dp_helper_funcs);
- 
- 	intel_encoder->compute_config = intel_dp_compute_config;
-+	intel_encoder->mode_set = intel_dp_mode_set;
- 	intel_encoder->enable = intel_enable_dp;
- 	intel_encoder->pre_enable = intel_pre_enable_dp;
- 	intel_encoder->disable = intel_disable_dp;
diff --git a/patches.baytrail/0546-drm-i915-lvds-use-the-native-encoder-mode_set-callba.patch b/patches.baytrail/0546-drm-i915-lvds-use-the-native-encoder-mode_set-callba.patch
deleted file mode 100644
index 55f8ab2aabd2a..0000000000000
--- a/patches.baytrail/0546-drm-i915-lvds-use-the-native-encoder-mode_set-callba.patch
+++ /dev/null
@@ -1,69 +0,0 @@
-From 11d6d834ae9e3521231d520b8dde663b8cc39646 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Sun, 21 Jul 2013 21:37:06 +0200
-Subject: drm/i915/lvds: use the native encoder ->mode_set callback
-
-Does nothing, so trivial conversion. But update the outdated comment
-while at it.
-
-Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 66df24d926fe0686034bb8d47a0f586310602178)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_lvds.c | 16 +++++-----------
- 1 file changed, 5 insertions(+), 11 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
-index 176891679ae9..acaaafc75502 100644
---- a/drivers/gpu/drm/i915/intel_lvds.c
-+++ b/drivers/gpu/drm/i915/intel_lvds.c
-@@ -319,14 +319,12 @@ static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
- 	return true;
- }
- 
--static void intel_lvds_mode_set(struct drm_encoder *encoder,
--				struct drm_display_mode *mode,
--				struct drm_display_mode *adjusted_mode)
-+static void intel_lvds_mode_set(struct intel_encoder *encoder)
- {
- 	/*
--	 * The LVDS pin pair will already have been turned on in the
--	 * intel_crtc_mode_set since it has a large impact on the DPLL
--	 * settings.
-+	 * We don't do anything here, the LVDS port is fully set up in the pre
-+	 * enable hook - the ordering constraints for enabling the lvds port vs.
-+	 * enabling the display pll are too strict.
- 	 */
- }
- 
-@@ -507,10 +505,6 @@ static int intel_lvds_set_property(struct drm_connector *connector,
- 	return 0;
- }
- 
--static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
--	.mode_set = intel_lvds_mode_set,
--};
--
- static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
- 	.get_modes = intel_lvds_get_modes,
- 	.mode_valid = intel_lvds_mode_valid,
-@@ -987,6 +981,7 @@ void intel_lvds_init(struct drm_device *dev)
- 	intel_encoder->enable = intel_enable_lvds;
- 	intel_encoder->pre_enable = intel_pre_enable_lvds;
- 	intel_encoder->compute_config = intel_lvds_compute_config;
-+	intel_encoder->mode_set = intel_lvds_mode_set;
- 	intel_encoder->disable = intel_disable_lvds;
- 	intel_encoder->get_hw_state = intel_lvds_get_hw_state;
- 	intel_encoder->get_config = intel_lvds_get_config;
-@@ -1003,7 +998,6 @@ void intel_lvds_init(struct drm_device *dev)
- 	else
- 		intel_encoder->crtc_mask = (1 << 1);
- 
--	drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
- 	drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
- 	connector->display_info.subpixel_order = SubPixelHorizontalRGB;
- 	connector->interlace_allowed = false;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0547-drm-i915-ddi-use-the-native-encoder-mode_set-callbac.patch b/patches.baytrail/0547-drm-i915-ddi-use-the-native-encoder-mode_set-callbac.patch
deleted file mode 100644
index 79f5f1de21540..0000000000000
--- a/patches.baytrail/0547-drm-i915-ddi-use-the-native-encoder-mode_set-callbac.patch
+++ /dev/null
@@ -1,113 +0,0 @@
-From 69bf13ad09f5cd1485f069e44538ecf48b074fb3 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Sun, 21 Jul 2013 21:37:07 +0200
-Subject: drm/i915/ddi: use the native encoder ->mode_set callback
-
-Same conversion as for hdmi/dp.
-
-Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit c7d8be305aa28dd809dedd401adcd4da8e4f9144)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_ddi.c |   39 ++++++++++++++++-----------------------
- 1 file changed, 16 insertions(+), 23 deletions(-)
-
---- a/drivers/gpu/drm/i915/intel_ddi.c
-+++ b/drivers/gpu/drm/i915/intel_ddi.c
-@@ -281,25 +281,22 @@ void hsw_fdi_link_train(struct drm_crtc
- 	DRM_ERROR("FDI link training failed!\n");
- }
- 
--static void intel_ddi_mode_set(struct drm_encoder *encoder,
--			       struct drm_display_mode *mode,
--			       struct drm_display_mode *adjusted_mode)
-+static void intel_ddi_mode_set(struct intel_encoder *encoder)
- {
--	struct drm_crtc *crtc = encoder->crtc;
--	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
--	struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
--	int port = intel_ddi_get_encoder_port(intel_encoder);
--	int pipe = intel_crtc->pipe;
--	int type = intel_encoder->type;
-+	struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
-+	int port = intel_ddi_get_encoder_port(encoder);
-+	int pipe = crtc->pipe;
-+	int type = encoder->type;
-+	struct drm_display_mode *adjusted_mode = &crtc->config.adjusted_mode;
- 
- 	DRM_DEBUG_KMS("Preparing DDI mode on port %c, pipe %c\n",
- 		      port_name(port), pipe_name(pipe));
- 
--	intel_crtc->eld_vld = false;
-+	crtc->eld_vld = false;
- 	if (type == INTEL_OUTPUT_DISPLAYPORT || type == INTEL_OUTPUT_EDP) {
--		struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
-+		struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
- 		struct intel_digital_port *intel_dig_port =
--			enc_to_dig_port(encoder);
-+			enc_to_dig_port(&encoder->base);
- 
- 		intel_dp->DP = intel_dig_port->saved_port_bits |
- 			       DDI_BUF_CTL_ENABLE | DDI_BUF_EMP_400MV_0DB_HSW;
-@@ -307,17 +304,17 @@ static void intel_ddi_mode_set(struct dr
- 
- 		if (intel_dp->has_audio) {
- 			DRM_DEBUG_DRIVER("DP audio on pipe %c on DDI\n",
--					 pipe_name(intel_crtc->pipe));
-+					 pipe_name(crtc->pipe));
- 
- 			/* write eld */
- 			DRM_DEBUG_DRIVER("DP audio: write eld information\n");
--			intel_write_eld(encoder, adjusted_mode);
-+			intel_write_eld(&encoder->base, adjusted_mode);
- 		}
- 
- 		intel_dp_init_link_config(intel_dp);
- 
- 	} else if (type == INTEL_OUTPUT_HDMI) {
--		struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
-+		struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base);
- 
- 		if (intel_hdmi->has_audio) {
- 			/* Proper support for digital audio needs a new logic
-@@ -325,14 +322,14 @@ static void intel_ddi_mode_set(struct dr
- 			 * patch bombing.
- 			 */
- 			DRM_DEBUG_DRIVER("HDMI audio on pipe %c on DDI\n",
--					 pipe_name(intel_crtc->pipe));
-+					 pipe_name(crtc->pipe));
- 
- 			/* write eld */
- 			DRM_DEBUG_DRIVER("HDMI audio: write eld information\n");
--			intel_write_eld(encoder, adjusted_mode);
-+			intel_write_eld(&encoder->base, adjusted_mode);
- 		}
- 
--		intel_hdmi->set_infoframes(encoder, adjusted_mode);
-+		intel_hdmi->set_infoframes(&encoder->base, adjusted_mode);
- 	}
- }
- 
-@@ -1317,10 +1314,6 @@ static const struct drm_encoder_funcs in
- 	.destroy = intel_ddi_destroy,
- };
- 
--static const struct drm_encoder_helper_funcs intel_ddi_helper_funcs = {
--	.mode_set = intel_ddi_mode_set,
--};
--
- void intel_ddi_init(struct drm_device *dev, enum port port)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
-@@ -1345,9 +1338,9 @@ void intel_ddi_init(struct drm_device *d
- 
- 	drm_encoder_init(dev, encoder, &intel_ddi_funcs,
- 			 DRM_MODE_ENCODER_TMDS);
--	drm_encoder_helper_add(encoder, &intel_ddi_helper_funcs);
- 
- 	intel_encoder->compute_config = intel_ddi_compute_config;
-+	intel_encoder->mode_set = intel_ddi_mode_set;
- 	intel_encoder->enable = intel_enable_ddi;
- 	intel_encoder->pre_enable = intel_ddi_pre_enable;
- 	intel_encoder->disable = intel_disable_ddi;
diff --git a/patches.baytrail/0548-drm-i915-rip-out-legacy-encoder-mode_set-callback.patch b/patches.baytrail/0548-drm-i915-rip-out-legacy-encoder-mode_set-callback.patch
deleted file mode 100644
index 6bc891f4febfa..0000000000000
--- a/patches.baytrail/0548-drm-i915-rip-out-legacy-encoder-mode_set-callback.patch
+++ /dev/null
@@ -1,49 +0,0 @@
-From 5ee1b46ef995844b1390ac095ef5accd6ef820ac Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Sun, 21 Jul 2013 21:37:08 +0200
-Subject: drm/i915: rip out legacy encoder->mode_set callback
-
-The encoder->mode_set callback from the crtc helpers is now completely
-unused in our driver. Good riddance!
-
-Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 36f2d1f151215c48d902947d64b86dc5ab277e19)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 10 +---------
- 1 file changed, 1 insertion(+), 9 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 4a3b386bc642..d67285745d6e 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -6220,11 +6220,8 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
- {
- 	struct drm_device *dev = crtc->dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
--	struct drm_encoder_helper_funcs *encoder_funcs;
- 	struct intel_encoder *encoder;
- 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
--	struct drm_display_mode *adjusted_mode =
--		&intel_crtc->config.adjusted_mode;
- 	struct drm_display_mode *mode = &intel_crtc->config.requested_mode;
- 	int pipe = intel_crtc->pipe;
- 	int ret;
-@@ -6243,12 +6240,7 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
- 			encoder->base.base.id,
- 			drm_get_encoder_name(&encoder->base),
- 			mode->base.id, mode->name);
--		if (encoder->mode_set) {
--			encoder->mode_set(encoder);
--		} else {
--			encoder_funcs = encoder->base.helper_private;
--			encoder_funcs->mode_set(&encoder->base, mode, adjusted_mode);
--		}
-+		encoder->mode_set(encoder);
- 	}
- 
- 	return 0;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0549-drm-i915-clean-up-crtc-timings-computation.patch b/patches.baytrail/0549-drm-i915-clean-up-crtc-timings-computation.patch
deleted file mode 100644
index 321bf54efbabf..0000000000000
--- a/patches.baytrail/0549-drm-i915-clean-up-crtc-timings-computation.patch
+++ /dev/null
@@ -1,110 +0,0 @@
-From fde9d0f5e2f884b674711fce03cbee00bbad8681 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Sun, 21 Jul 2013 21:37:09 +0200
-Subject: drm/i915: clean up crtc timings computation
-
-In the old days of the crtc helpers we've only had the encoder and
-crtc ->mode_fixup callbacks. So when the lvds connector wanted to
-adjust the crtc timings it had to set a driver-private mode flag to
-tell the crtc mode fixup code to not overwrite them with the generic
-ones.
-
-When converting things to the new infrastructure I've kept the entire
-logic and only moved the flag to pipe_config->timings_set. But this
-logic is pretty tricky and already caused regressions:
-
-commit 21d8a4756af5fdf4a42e79a77cf3b6f52678d443
-Author: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date:   Fri Jul 12 08:07:30 2013 +0200
-
-    drm/i915: fix pfit regression for non-autoscaled resolutions
-
-So take advantage of the flexibility our own modeset infrastructure
-affords us and prefill default crtc timings. This allows us to rip out
-->timings_set. Note that we overwrite things again when retrying the
-pipe config computation due to bandwidth constraints to avoid bogus
-crtc timings if the encoder only does relative adjustments (which is
-how the pfit code works). Only a theoretical concern though since
-platforms where we retry (pch-split platforms) do not need
-adjustements (since only the old gmch pfit needs that). But let's
-better be safe than sorry.
-
-Since we now initialize the crtc timings before calling the
-encoder->compute_config functions the crtc initialization in the gmch
-pfit code is now redudant and so can be removed.
-
-Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
-Cc: Mika Kuoppala <mika.kuoppala@intel.com>
-Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-[danvet: Add a paragraph to the commit message to explain why we can
-ditch the crtc timings initialization call from the gmch pfit code, to
-answer a question from Rodrigo's review.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 135c81b8c3c9a70d7b55758c9c2a247a4abb7b64)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 9 +++------
- drivers/gpu/drm/i915/intel_drv.h     | 4 ----
- drivers/gpu/drm/i915/intel_panel.c   | 3 ---
- 3 files changed, 3 insertions(+), 13 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index d67285745d6e..722c99e16dc4 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -4104,12 +4104,6 @@ static int intel_crtc_compute_config(struct intel_crtc *crtc,
- 			return -EINVAL;
- 	}
- 
--	/* All interlaced capable intel hw wants timings in frames. Note though
--	 * that intel_lvds_compute_config does some funny tricks with the crtc
--	 * timings, so we need to be careful not to clobber these.*/
--	if (!pipe_config->timings_set)
--		drm_mode_set_crtcinfo(adjusted_mode, 0);
--
- 	/* Cantiga+ cannot handle modes with a hsync front porch of 0.
- 	 * WaPruneModeWithIncorrectHsyncOffset:ctg,elk,ilk,snb,ivb,vlv,hsw.
- 	 */
-@@ -8091,6 +8085,9 @@ encoder_retry:
- 	pipe_config->port_clock = 0;
- 	pipe_config->pixel_multiplier = 1;
- 
-+	/* Fill in default crtc timings, allow encoders to overwrite them. */
-+	drm_mode_set_crtcinfo(&pipe_config->adjusted_mode, 0);
-+
- 	/* Pass our mode to the connectors and the CRTC to give them a chance to
- 	 * adjust it according to limitations or connector properties, and also
- 	 * a chance to reject the mode entirely.
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index d9f50e368fe9..474797be1fc2 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -208,10 +208,6 @@ struct intel_crtc_config {
- 
- 	struct drm_display_mode requested_mode;
- 	struct drm_display_mode adjusted_mode;
--	/* This flag must be set by the encoder's compute_config callback if it
--	 * changes the crtc timings in the mode to prevent the crtc fixup from
--	 * overwriting them.  Currently only lvds needs that. */
--	bool timings_set;
- 	/* Whether to set up the PCH/FDI. Note that we never allow sharing
- 	 * between pch encoders and cpu encoders. */
- 	bool has_pch_encoder;
-diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
-index 5950888ae1d0..a43c33bc4a35 100644
---- a/drivers/gpu/drm/i915/intel_panel.c
-+++ b/drivers/gpu/drm/i915/intel_panel.c
-@@ -194,9 +194,6 @@ void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
- 	    adjusted_mode->vdisplay == mode->vdisplay)
- 		goto out;
- 
--	drm_mode_set_crtcinfo(adjusted_mode, 0);
--	pipe_config->timings_set = true;
--
- 	switch (fitting_mode) {
- 	case DRM_MODE_SCALE_CENTER:
- 		/*
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0550-drm-i915-Squelch-repeated-reasoning-for-why-FBC-cann.patch b/patches.baytrail/0550-drm-i915-Squelch-repeated-reasoning-for-why-FBC-cann.patch
deleted file mode 100644
index 301b9711423aa..0000000000000
--- a/patches.baytrail/0550-drm-i915-Squelch-repeated-reasoning-for-why-FBC-cann.patch
+++ /dev/null
@@ -1,196 +0,0 @@
-From 6cb2ab7901882146e6d41a4d4e29a96584c4946a Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Sat, 27 Jul 2013 17:23:55 +0100
-Subject: drm/i915: Squelch repeated reasoning for why FBC cannot be activated
-
-Almost invariably the reason why FBC cannot be turned on is the same
-every time (disabled via parameter, too many pipes, pipe too large etc)
-as modesetting and framebuffer configuration changes less frequently
-than trying to enable FBC.
-
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 29ebf90f8157f9d01dda2b1555b4a08e9e542b21)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_debugfs.c |  6 ++++
- drivers/gpu/drm/i915/i915_drv.h     |  4 ++-
- drivers/gpu/drm/i915/intel_pm.c     | 59 +++++++++++++++++++++++--------------
- 3 files changed, 46 insertions(+), 23 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
-index ed72fe08217c..eed2f4ca9a76 100644
---- a/drivers/gpu/drm/i915/i915_debugfs.c
-+++ b/drivers/gpu/drm/i915/i915_debugfs.c
-@@ -1099,6 +1099,12 @@ static int i915_fbc_status(struct seq_file *m, void *unused)
- 	} else {
- 		seq_puts(m, "FBC disabled: ");
- 		switch (dev_priv->fbc.no_fbc_reason) {
-+		case FBC_OK:
-+			seq_puts(m, "FBC actived, but currently disabled in hardware");
-+			break;
-+		case FBC_UNSUPPORTED:
-+			seq_puts(m, "unsupported by this chipset");
-+			break;
- 		case FBC_NO_OUTPUT:
- 			seq_puts(m, "no outputs");
- 			break;
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index f31a1b0adbda..f8ea9179728a 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -589,7 +589,9 @@ struct i915_fbc {
- 		int interval;
- 	} *fbc_work;
- 
--	enum {
-+	enum no_fbc_reason {
-+		FBC_OK, /* FBC is enabled */
-+		FBC_UNSUPPORTED, /* FBC is not supported by this chipset */
- 		FBC_NO_OUTPUT, /* no outputs enabled to compress */
- 		FBC_STOLEN_TOO_SMALL, /* not enough space for buffers */
- 		FBC_UNSUPPORTED_MODE, /* interlace or doublescanned mode */
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 5d7d0e76da7f..c11aae3ae18d 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -421,6 +421,16 @@ void intel_disable_fbc(struct drm_device *dev)
- 	dev_priv->fbc.plane = -1;
- }
- 
-+static bool set_no_fbc_reason(struct drm_i915_private *dev_priv,
-+			      enum no_fbc_reason reason)
-+{
-+	if (dev_priv->fbc.no_fbc_reason == reason)
-+		return false;
-+
-+	dev_priv->fbc.no_fbc_reason = reason;
-+	return true;
-+}
-+
- /**
-  * intel_update_fbc - enable/disable FBC as needed
-  * @dev: the drm_device
-@@ -450,11 +460,16 @@ void intel_update_fbc(struct drm_device *dev)
- 	struct drm_i915_gem_object *obj;
- 	unsigned int max_hdisplay, max_vdisplay;
- 
--	if (!i915_powersave)
-+	if (!I915_HAS_FBC(dev)) {
-+		set_no_fbc_reason(dev_priv, FBC_UNSUPPORTED);
- 		return;
-+	}
- 
--	if (!I915_HAS_FBC(dev))
-+	if (!i915_powersave) {
-+		if (set_no_fbc_reason(dev_priv, FBC_MODULE_PARAM))
-+			DRM_DEBUG_KMS("fbc disabled per module param\n");
- 		return;
-+	}
- 
- 	/*
- 	 * If FBC is already on, we just have to verify that we can
-@@ -469,9 +484,8 @@ void intel_update_fbc(struct drm_device *dev)
- 		if (intel_crtc_active(tmp_crtc) &&
- 		    !to_intel_crtc(tmp_crtc)->primary_disabled) {
- 			if (crtc) {
--				DRM_DEBUG_KMS("more than one pipe active, disabling compression\n");
--				dev_priv->fbc.no_fbc_reason =
--					FBC_MULTIPLE_PIPES;
-+				if (set_no_fbc_reason(dev_priv, FBC_MULTIPLE_PIPES))
-+					DRM_DEBUG_KMS("more than one pipe active, disabling compression\n");
- 				goto out_disable;
- 			}
- 			crtc = tmp_crtc;
-@@ -479,8 +493,8 @@ void intel_update_fbc(struct drm_device *dev)
- 	}
- 
- 	if (!crtc || crtc->fb == NULL) {
--		DRM_DEBUG_KMS("no output, disabling\n");
--		dev_priv->fbc.no_fbc_reason = FBC_NO_OUTPUT;
-+		if (set_no_fbc_reason(dev_priv, FBC_NO_OUTPUT))
-+			DRM_DEBUG_KMS("no output, disabling\n");
- 		goto out_disable;
- 	}
- 
-@@ -491,20 +505,20 @@ void intel_update_fbc(struct drm_device *dev)
- 
- 	if (i915_enable_fbc < 0 &&
- 	    INTEL_INFO(dev)->gen <= 7 && !IS_HASWELL(dev)) {
--		DRM_DEBUG_KMS("disabled per chip default\n");
--		dev_priv->fbc.no_fbc_reason = FBC_CHIP_DEFAULT;
-+		if (set_no_fbc_reason(dev_priv, FBC_CHIP_DEFAULT))
-+			DRM_DEBUG_KMS("disabled per chip default\n");
- 		goto out_disable;
- 	}
- 	if (!i915_enable_fbc) {
--		DRM_DEBUG_KMS("fbc disabled per module param\n");
--		dev_priv->fbc.no_fbc_reason = FBC_MODULE_PARAM;
-+		if (set_no_fbc_reason(dev_priv, FBC_MODULE_PARAM))
-+			DRM_DEBUG_KMS("fbc disabled per module param\n");
- 		goto out_disable;
- 	}
- 	if ((crtc->mode.flags & DRM_MODE_FLAG_INTERLACE) ||
- 	    (crtc->mode.flags & DRM_MODE_FLAG_DBLSCAN)) {
--		DRM_DEBUG_KMS("mode incompatible with compression, "
--			      "disabling\n");
--		dev_priv->fbc.no_fbc_reason = FBC_UNSUPPORTED_MODE;
-+		if (set_no_fbc_reason(dev_priv, FBC_UNSUPPORTED_MODE))
-+			DRM_DEBUG_KMS("mode incompatible with compression, "
-+				      "disabling\n");
- 		goto out_disable;
- 	}
- 
-@@ -517,14 +531,14 @@ void intel_update_fbc(struct drm_device *dev)
- 	}
- 	if ((crtc->mode.hdisplay > max_hdisplay) ||
- 	    (crtc->mode.vdisplay > max_vdisplay)) {
--		DRM_DEBUG_KMS("mode too large for compression, disabling\n");
--		dev_priv->fbc.no_fbc_reason = FBC_MODE_TOO_LARGE;
-+		if (set_no_fbc_reason(dev_priv, FBC_MODE_TOO_LARGE))
-+			DRM_DEBUG_KMS("mode too large for compression, disabling\n");
- 		goto out_disable;
- 	}
- 	if ((IS_I915GM(dev) || IS_I945GM(dev) || IS_HASWELL(dev)) &&
- 	    intel_crtc->plane != 0) {
--		DRM_DEBUG_KMS("plane not 0, disabling compression\n");
--		dev_priv->fbc.no_fbc_reason = FBC_BAD_PLANE;
-+		if (set_no_fbc_reason(dev_priv, FBC_BAD_PLANE))
-+			DRM_DEBUG_KMS("plane not 0, disabling compression\n");
- 		goto out_disable;
- 	}
- 
-@@ -533,8 +547,8 @@ void intel_update_fbc(struct drm_device *dev)
- 	 */
- 	if (obj->tiling_mode != I915_TILING_X ||
- 	    obj->fence_reg == I915_FENCE_REG_NONE) {
--		DRM_DEBUG_KMS("framebuffer not tiled or fenced, disabling compression\n");
--		dev_priv->fbc.no_fbc_reason = FBC_NOT_TILED;
-+		if (set_no_fbc_reason(dev_priv, FBC_NOT_TILED))
-+			DRM_DEBUG_KMS("framebuffer not tiled or fenced, disabling compression\n");
- 		goto out_disable;
- 	}
- 
-@@ -543,8 +557,8 @@ void intel_update_fbc(struct drm_device *dev)
- 		goto out_disable;
- 
- 	if (i915_gem_stolen_setup_compression(dev, intel_fb->obj->base.size)) {
--		DRM_DEBUG_KMS("framebuffer too large, disabling compression\n");
--		dev_priv->fbc.no_fbc_reason = FBC_STOLEN_TOO_SMALL;
-+		if (set_no_fbc_reason(dev_priv, FBC_STOLEN_TOO_SMALL))
-+			DRM_DEBUG_KMS("framebuffer too large, disabling compression\n");
- 		goto out_disable;
- 	}
- 
-@@ -587,6 +601,7 @@ void intel_update_fbc(struct drm_device *dev)
- 	}
- 
- 	intel_enable_fbc(crtc, 500);
-+	dev_priv->fbc.no_fbc_reason = FBC_OK;
- 	return;
- 
- out_disable:
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0551-drm-i915-Use-the-same-pte_encoding-for-ppgtt-as-for-.patch b/patches.baytrail/0551-drm-i915-Use-the-same-pte_encoding-for-ppgtt-as-for-.patch
deleted file mode 100644
index a0007f81a6842..0000000000000
--- a/patches.baytrail/0551-drm-i915-Use-the-same-pte_encoding-for-ppgtt-as-for-.patch
+++ /dev/null
@@ -1,55 +0,0 @@
-From 75a13a01efd883ebb54e127d5710c10066827c96 Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Tue, 30 Jul 2013 19:04:37 +0100
-Subject: drm/i915: Use the same pte_encoding for ppgtt as for gtt
-
-The PTE layouts are the same for both ppgtt and gtt, so we can simplify
-the setup for ppgtt by copying the encoding function pointer from gtt.
-This prevents bugs where we update one function pointer, but forget the
-other.
-
-For instance,
-
-commit 4d15c145a6234d999c0452eec0d275c1fbf0688c
-Author: Ben Widawsky <ben@bwidawsk.net>
-Date:   Thu Jul 4 11:02:06 2013 -0700
-
-    drm/i915: Use eLLC/LLC by default when available
-
-only extends the gtt to use eLLC/LLC cacheing and forgets to also update
-the ppgtt function pointer.
-
-v2: Actually mention the bug being fixed (Kenneth)
-
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 08c45263a62af33348e674765710cb49dd3959e0)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem_gtt.c | 8 +-------
- 1 file changed, 1 insertion(+), 7 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
-index 3b639a94dddf..e7b420495516 100644
---- a/drivers/gpu/drm/i915/i915_gem_gtt.c
-+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
-@@ -298,13 +298,7 @@ static int gen6_ppgtt_init(struct i915_hw_ppgtt *ppgtt)
- 	 * now. */
- 	first_pd_entry_in_global_pt = gtt_total_entries(dev_priv->gtt);
- 
--	if (IS_HASWELL(dev)) {
--		ppgtt->base.pte_encode = hsw_pte_encode;
--	} else if (IS_VALLEYVIEW(dev)) {
--		ppgtt->base.pte_encode = byt_pte_encode;
--	} else {
--		ppgtt->base.pte_encode = gen6_pte_encode;
--	}
-+	ppgtt->base.pte_encode = dev_priv->gtt.base.pte_encode;
- 	ppgtt->num_pd_entries = GEN6_PPGTT_PD_ENTRIES;
- 	ppgtt->enable = gen6_ppgtt_enable;
- 	ppgtt->base.clear_range = gen6_ppgtt_clear_range;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0552-drm-i915-Remove-useless-define.patch b/patches.baytrail/0552-drm-i915-Remove-useless-define.patch
deleted file mode 100644
index fd262bf1c6c8e..0000000000000
--- a/patches.baytrail/0552-drm-i915-Remove-useless-define.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From 8c17a0e220ac83d1d5e63914d961ca9ebc6d7221 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?St=C3=A9phane=20Marchesin?= <marcheu@chromium.org>
-Date: Wed, 31 Jul 2013 00:11:07 -0700
-Subject: drm/i915: Remove useless define
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Signed-off-by: Stéphane Marchesin <marcheu@chromium.org>
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit b3ae96a8ea1cbd0970459b6efd7ea7550fe033c6)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 1 -
- 1 file changed, 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 722c99e16dc4..3fd109df65a6 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -59,7 +59,6 @@ typedef struct {
- 	int	p2_slow, p2_fast;
- } intel_p2_t;
- 
--#define INTEL_P2_NUM		      2
- typedef struct intel_limit intel_limit_t;
- struct intel_limit {
- 	intel_range_t   dot, vco, n, m, m1, m2, p, p1;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0553-drm-i915-Tidy-the-macro-casting-by-using-an-inline-f.patch b/patches.baytrail/0553-drm-i915-Tidy-the-macro-casting-by-using-an-inline-f.patch
deleted file mode 100644
index 46e5e59d8d72c..0000000000000
--- a/patches.baytrail/0553-drm-i915-Tidy-the-macro-casting-by-using-an-inline-f.patch
+++ /dev/null
@@ -1,69 +0,0 @@
-From eb844c2530cd98fb2b6fc979aeae2e3aaefe5704 Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Thu, 1 Aug 2013 18:39:55 +0100
-Subject: drm/i915: Tidy the macro casting by using an inline function
-
-Some of our macros we trying to convert from an drm_device to a
-drm_i915_private and then use the pointer inline. This is not only
-cumbersome but prone to error. Replacing it with a typesafe function
-should help catch those errors in future.
-
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-[danvet: Squash in fixup to correctly order static vs. inline
-qualifiers, static comes first. Also fix up another offender.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 2c1792a10b10e41dcf34c97304fb8f75e52e7112)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h | 11 ++++++++---
- 1 file changed, 8 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index f8ea9179728a..fbd2522462bb 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1223,6 +1223,11 @@ typedef struct drm_i915_private {
- 	struct i915_ums_state ums;
- } drm_i915_private_t;
- 
-+static inline struct drm_i915_private *to_i915(const struct drm_device *dev)
-+{
-+	return dev->dev_private;
-+}
-+
- /* Iterate over initialised rings */
- #define for_each_ring(ring__, dev_priv__, i__) \
- 	for ((i__) = 0; (i__) < I915_NUM_RINGS; (i__)++) \
-@@ -1484,7 +1489,7 @@ struct drm_i915_file_private {
- 	struct i915_ctx_hang_stats hang_stats;
- };
- 
--#define INTEL_INFO(dev)	(((struct drm_i915_private *) (dev)->dev_private)->info)
-+#define INTEL_INFO(dev)	(to_i915(dev)->info)
- 
- #define IS_I830(dev)		((dev)->pci_device == 0x3577)
- #define IS_845G(dev)		((dev)->pci_device == 0x2562)
-@@ -1578,7 +1583,7 @@ struct drm_i915_file_private {
- #define INTEL_PCH_LPT_DEVICE_ID_TYPE		0x8c00
- #define INTEL_PCH_LPT_LP_DEVICE_ID_TYPE		0x9c00
- 
--#define INTEL_PCH_TYPE(dev) (((struct drm_i915_private *)(dev)->dev_private)->pch_type)
-+#define INTEL_PCH_TYPE(dev) (to_i915(dev)->pch_type)
- #define HAS_PCH_LPT(dev) (INTEL_PCH_TYPE(dev) == PCH_LPT)
- #define HAS_PCH_CPT(dev) (INTEL_PCH_TYPE(dev) == PCH_CPT)
- #define HAS_PCH_IBX(dev) (INTEL_PCH_TYPE(dev) == PCH_IBX)
-@@ -1976,7 +1981,7 @@ i915_gem_object_create_stolen_for_preallocated(struct drm_device *dev,
- void i915_gem_object_release_stolen(struct drm_i915_gem_object *obj);
- 
- /* i915_gem_tiling.c */
--inline static bool i915_gem_object_needs_bit17_swizzle(struct drm_i915_gem_object *obj)
-+static inline bool i915_gem_object_needs_bit17_swizzle(struct drm_i915_gem_object *obj)
- {
- 	drm_i915_private_t *dev_priv = obj->base.dev->dev_private;
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0554-drm-i915-Add-scaled-paramater-to-update_sprite_water.patch b/patches.baytrail/0554-drm-i915-Add-scaled-paramater-to-update_sprite_water.patch
deleted file mode 100644
index d11876d7be7d0..0000000000000
--- a/patches.baytrail/0554-drm-i915-Add-scaled-paramater-to-update_sprite_water.patch
+++ /dev/null
@@ -1,165 +0,0 @@
-From b8abaed21da362bc49f643220dbb61c6e7a03599 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Fri, 5 Jul 2013 11:57:13 +0300
-Subject: drm/i915: Add scaled paramater to update_sprite_watermarks()
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-For calculating watermarks we want to know whether sprites are
-scaled. Pass that information to update_sprite_watermarks() so that
-eventually we may do some watermark pre-computing.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit bdd57d0386d892e5c470a3d615c3034389700964)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h     |  2 +-
- drivers/gpu/drm/i915/intel_drv.h    |  7 ++++---
- drivers/gpu/drm/i915/intel_pm.c     | 13 +++++++------
- drivers/gpu/drm/i915/intel_sprite.c | 11 +++++++----
- 4 files changed, 19 insertions(+), 14 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index fbd2522462bb..bb7d0ba5589b 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -361,7 +361,7 @@ struct drm_i915_display_funcs {
- 	void (*update_wm)(struct drm_device *dev);
- 	void (*update_sprite_wm)(struct drm_device *dev, int pipe,
- 				 uint32_t sprite_width, int pixel_size,
--				 bool enable);
-+				 bool enable, bool scaled);
- 	void (*modeset_global_resources)(struct drm_device *dev);
- 	/* Returns the active state of the crtc, and if the crtc is active,
- 	 * fills out the pipe-config with the hw state. */
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index 474797be1fc2..ed33976c194b 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -349,7 +349,8 @@ struct intel_plane {
- 	 * for the watermark calculations. Currently only Haswell uses this.
- 	 */
- 	struct {
--		bool enable;
-+		bool enabled;
-+		bool scaled;
- 		uint8_t bytes_per_pixel;
- 		uint32_t horiz_pixels;
- 	} wm;
-@@ -770,8 +771,8 @@ extern void intel_ddi_init(struct drm_device *dev, enum port port);
- /* For use by IVB LP watermark workaround in intel_sprite.c */
- extern void intel_update_watermarks(struct drm_device *dev);
- extern void intel_update_sprite_watermarks(struct drm_device *dev, int pipe,
--					   uint32_t sprite_width,
--					   int pixel_size, bool enable);
-+					   uint32_t sprite_width, int pixel_size,
-+					   bool enabled, bool scaled);
- 
- extern unsigned long intel_gen4_compute_page_offset(int *x, int *y,
- 						    unsigned int tiling_mode,
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index c11aae3ae18d..5799324a8c4d 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2403,7 +2403,7 @@ static void hsw_compute_wm_parameters(struct drm_device *dev,
- 		pipe = intel_plane->pipe;
- 		p = &params[pipe];
- 
--		p->sprite_enabled = intel_plane->wm.enable;
-+		p->sprite_enabled = intel_plane->wm.enabled;
- 		p->spr_bytes_per_pixel = intel_plane->wm.bytes_per_pixel;
- 		p->spr_horiz_pixels = intel_plane->wm.horiz_pixels;
- 
-@@ -2631,7 +2631,7 @@ static void haswell_update_wm(struct drm_device *dev)
- 
- static void haswell_update_sprite_wm(struct drm_device *dev, int pipe,
- 				     uint32_t sprite_width, int pixel_size,
--				     bool enable)
-+				     bool enabled, bool scaled)
- {
- 	struct drm_plane *plane;
- 
-@@ -2639,7 +2639,8 @@ static void haswell_update_sprite_wm(struct drm_device *dev, int pipe,
- 		struct intel_plane *intel_plane = to_intel_plane(plane);
- 
- 		if (intel_plane->pipe == pipe) {
--			intel_plane->wm.enable = enable;
-+			intel_plane->wm.enabled = enabled;
-+			intel_plane->wm.scaled = scaled;
- 			intel_plane->wm.horiz_pixels = sprite_width + 1;
- 			intel_plane->wm.bytes_per_pixel = pixel_size;
- 			break;
-@@ -2727,7 +2728,7 @@ sandybridge_compute_sprite_srwm(struct drm_device *dev, int plane,
- 
- static void sandybridge_update_sprite_wm(struct drm_device *dev, int pipe,
- 					 uint32_t sprite_width, int pixel_size,
--					 bool enable)
-+					 bool enable, bool scaled)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	int latency = SNB_READ_WM0_LATENCY() * 100;	/* In unit 0.1us */
-@@ -2850,13 +2851,13 @@ void intel_update_watermarks(struct drm_device *dev)
- 
- void intel_update_sprite_watermarks(struct drm_device *dev, int pipe,
- 				    uint32_t sprite_width, int pixel_size,
--				    bool enable)
-+				    bool enable, bool scaled)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 
- 	if (dev_priv->display.update_sprite_wm)
- 		dev_priv->display.update_sprite_wm(dev, pipe, sprite_width,
--						   pixel_size, enable);
-+						   pixel_size, enable, scaled);
- }
- 
- static struct drm_i915_gem_object *
-diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
-index 55bdf70b548b..069155f17edb 100644
---- a/drivers/gpu/drm/i915/intel_sprite.c
-+++ b/drivers/gpu/drm/i915/intel_sprite.c
-@@ -114,7 +114,8 @@ vlv_update_plane(struct drm_plane *dplane, struct drm_framebuffer *fb,
- 	crtc_w--;
- 	crtc_h--;
- 
--	intel_update_sprite_watermarks(dev, pipe, crtc_w, pixel_size, true);
-+	intel_update_sprite_watermarks(dev, pipe, crtc_w, pixel_size, true,
-+				       src_w != crtc_w || src_h != crtc_h);
- 
- 	I915_WRITE(SPSTRIDE(pipe, plane), fb->pitches[0]);
- 	I915_WRITE(SPPOS(pipe, plane), (crtc_y << 16) | crtc_x);
-@@ -268,7 +269,8 @@ ivb_update_plane(struct drm_plane *plane, struct drm_framebuffer *fb,
- 	crtc_w--;
- 	crtc_h--;
- 
--	intel_update_sprite_watermarks(dev, pipe, crtc_w, pixel_size, true);
-+	intel_update_sprite_watermarks(dev, pipe, crtc_w, pixel_size, true,
-+				       src_w != crtc_w || src_h != crtc_h);
- 
- 	/*
- 	 * IVB workaround: must disable low power watermarks for at least
-@@ -336,7 +338,7 @@ ivb_disable_plane(struct drm_plane *plane)
- 
- 	dev_priv->sprite_scaling_enabled &= ~(1 << pipe);
- 
--	intel_update_sprite_watermarks(dev, pipe, 0, 0, false);
-+	intel_update_sprite_watermarks(dev, pipe, 0, 0, false, false);
- 
- 	/* potentially re-enable LP watermarks */
- 	if (scaling_was_enabled && !dev_priv->sprite_scaling_enabled)
-@@ -456,7 +458,8 @@ ilk_update_plane(struct drm_plane *plane, struct drm_framebuffer *fb,
- 	crtc_w--;
- 	crtc_h--;
- 
--	intel_update_sprite_watermarks(dev, pipe, crtc_w, pixel_size, true);
-+	intel_update_sprite_watermarks(dev, pipe, crtc_w, pixel_size, true,
-+				       src_w != crtc_w || src_h != crtc_h);
- 
- 	dvsscale = 0;
- 	if (IS_GEN5(dev) || crtc_w != src_w || crtc_h != src_h)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0555-drm-i915-Pass-the-actual-sprite-width-to-watermarks-.patch b/patches.baytrail/0555-drm-i915-Pass-the-actual-sprite-width-to-watermarks-.patch
deleted file mode 100644
index 4da05d63f0202..0000000000000
--- a/patches.baytrail/0555-drm-i915-Pass-the-actual-sprite-width-to-watermarks-.patch
+++ /dev/null
@@ -1,97 +0,0 @@
-From 498124bceb005d793a9c672a46994393e6a8f340 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Fri, 5 Jul 2013 11:57:14 +0300
-Subject: drm/i915: Pass the actual sprite width to watermarks functions
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Don't subtract one from the sprite width before watermark calculations.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 67ca28f30af8e7555f40b916c28148b432168eec)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c     |  2 +-
- drivers/gpu/drm/i915/intel_sprite.c | 18 +++++++++---------
- 2 files changed, 10 insertions(+), 10 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 5799324a8c4d..901479fb2695 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2641,7 +2641,7 @@ static void haswell_update_sprite_wm(struct drm_device *dev, int pipe,
- 		if (intel_plane->pipe == pipe) {
- 			intel_plane->wm.enabled = enabled;
- 			intel_plane->wm.scaled = scaled;
--			intel_plane->wm.horiz_pixels = sprite_width + 1;
-+			intel_plane->wm.horiz_pixels = sprite_width;
- 			intel_plane->wm.bytes_per_pixel = pixel_size;
- 			break;
- 		}
-diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
-index 069155f17edb..3e3a6d01cff6 100644
---- a/drivers/gpu/drm/i915/intel_sprite.c
-+++ b/drivers/gpu/drm/i915/intel_sprite.c
-@@ -108,15 +108,15 @@ vlv_update_plane(struct drm_plane *dplane, struct drm_framebuffer *fb,
- 
- 	sprctl |= SP_ENABLE;
- 
-+	intel_update_sprite_watermarks(dev, pipe, crtc_w, pixel_size, true,
-+				       src_w != crtc_w || src_h != crtc_h);
-+
- 	/* Sizes are 0 based */
- 	src_w--;
- 	src_h--;
- 	crtc_w--;
- 	crtc_h--;
- 
--	intel_update_sprite_watermarks(dev, pipe, crtc_w, pixel_size, true,
--				       src_w != crtc_w || src_h != crtc_h);
--
- 	I915_WRITE(SPSTRIDE(pipe, plane), fb->pitches[0]);
- 	I915_WRITE(SPPOS(pipe, plane), (crtc_y << 16) | crtc_x);
- 
-@@ -263,15 +263,15 @@ ivb_update_plane(struct drm_plane *plane, struct drm_framebuffer *fb,
- 	if (IS_HASWELL(dev))
- 		sprctl |= SPRITE_PIPE_CSC_ENABLE;
- 
-+	intel_update_sprite_watermarks(dev, pipe, crtc_w, pixel_size, true,
-+				       src_w != crtc_w || src_h != crtc_h);
-+
- 	/* Sizes are 0 based */
- 	src_w--;
- 	src_h--;
- 	crtc_w--;
- 	crtc_h--;
- 
--	intel_update_sprite_watermarks(dev, pipe, crtc_w, pixel_size, true,
--				       src_w != crtc_w || src_h != crtc_h);
--
- 	/*
- 	 * IVB workaround: must disable low power watermarks for at least
- 	 * one frame before enabling scaling.  LP watermarks can be re-enabled
-@@ -452,15 +452,15 @@ ilk_update_plane(struct drm_plane *plane, struct drm_framebuffer *fb,
- 		dvscntr |= DVS_TRICKLE_FEED_DISABLE; /* must disable */
- 	dvscntr |= DVS_ENABLE;
- 
-+	intel_update_sprite_watermarks(dev, pipe, crtc_w, pixel_size, true,
-+				       src_w != crtc_w || src_h != crtc_h);
-+
- 	/* Sizes are 0 based */
- 	src_w--;
- 	src_h--;
- 	crtc_w--;
- 	crtc_h--;
- 
--	intel_update_sprite_watermarks(dev, pipe, crtc_w, pixel_size, true,
--				       src_w != crtc_w || src_h != crtc_h);
--
- 	dvsscale = 0;
- 	if (IS_GEN5(dev) || crtc_w != src_w || crtc_h != src_h)
- 		dvsscale = DVS_SCALE_ENABLE | (src_w << 16) | src_h;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0556-drm-i915-Calculate-the-sprite-WM-based-on-the-source.patch b/patches.baytrail/0556-drm-i915-Calculate-the-sprite-WM-based-on-the-source.patch
deleted file mode 100644
index 980c199962300..0000000000000
--- a/patches.baytrail/0556-drm-i915-Calculate-the-sprite-WM-based-on-the-source.patch
+++ /dev/null
@@ -1,60 +0,0 @@
-From ed1197848495e5949c4295ece90cccf9f59b6136 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Fri, 5 Jul 2013 11:57:15 +0300
-Subject: drm/i915: Calculate the sprite WM based on the source width instead
- of the destination width
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Using the destination width in the sprite WM calculations isn't correct.
-We should be using the source width.
-
-Note: This doesn't affect hsw since it does not support sprite
-scaling.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-[danvet: Add review note from Paulo to the commit message.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit ec4c4aa14720b284af8eadd2d65d5131519fc29f)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_sprite.c | 6 +++---
- 1 file changed, 3 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
-index 3e3a6d01cff6..5a36afb6ea03 100644
---- a/drivers/gpu/drm/i915/intel_sprite.c
-+++ b/drivers/gpu/drm/i915/intel_sprite.c
-@@ -108,7 +108,7 @@ vlv_update_plane(struct drm_plane *dplane, struct drm_framebuffer *fb,
- 
- 	sprctl |= SP_ENABLE;
- 
--	intel_update_sprite_watermarks(dev, pipe, crtc_w, pixel_size, true,
-+	intel_update_sprite_watermarks(dev, pipe, src_w, pixel_size, true,
- 				       src_w != crtc_w || src_h != crtc_h);
- 
- 	/* Sizes are 0 based */
-@@ -263,7 +263,7 @@ ivb_update_plane(struct drm_plane *plane, struct drm_framebuffer *fb,
- 	if (IS_HASWELL(dev))
- 		sprctl |= SPRITE_PIPE_CSC_ENABLE;
- 
--	intel_update_sprite_watermarks(dev, pipe, crtc_w, pixel_size, true,
-+	intel_update_sprite_watermarks(dev, pipe, src_w, pixel_size, true,
- 				       src_w != crtc_w || src_h != crtc_h);
- 
- 	/* Sizes are 0 based */
-@@ -452,7 +452,7 @@ ilk_update_plane(struct drm_plane *plane, struct drm_framebuffer *fb,
- 		dvscntr |= DVS_TRICKLE_FEED_DISABLE; /* must disable */
- 	dvscntr |= DVS_ENABLE;
- 
--	intel_update_sprite_watermarks(dev, pipe, crtc_w, pixel_size, true,
-+	intel_update_sprite_watermarks(dev, pipe, src_w, pixel_size, true,
- 				       src_w != crtc_w || src_h != crtc_h);
- 
- 	/* Sizes are 0 based */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0557-drm-i915-Rename-hsw_wm_get_pixel_rate-to-ilk_pipe_pi.patch b/patches.baytrail/0557-drm-i915-Rename-hsw_wm_get_pixel_rate-to-ilk_pipe_pi.patch
deleted file mode 100644
index df21a0d9c5b87..0000000000000
--- a/patches.baytrail/0557-drm-i915-Rename-hsw_wm_get_pixel_rate-to-ilk_pipe_pi.patch
+++ /dev/null
@@ -1,48 +0,0 @@
-From 6216be4a48e617722822d76387792cc2c357cef1 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Fri, 5 Jul 2013 11:57:16 +0300
-Subject: drm/i915: Rename hsw_wm_get_pixel_rate to ilk_pipe_pixel_rate
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-hsw_wm_get_pixel_rate() isn't specific to HSW. In fact it should be made
-to handle all gens, but for now it depends on the PCH panel fitter
-state, so give it an ilk_ prefix.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 3658729a72b19f5e1cb92bd972939a13db970168)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 6 +++---
- 1 file changed, 3 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 901479fb2695..73e99cfeff48 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2095,8 +2095,8 @@ static void ivybridge_update_wm(struct drm_device *dev)
- 		   cursor_wm);
- }
- 
--static uint32_t hsw_wm_get_pixel_rate(struct drm_device *dev,
--				      struct drm_crtc *crtc)
-+static uint32_t ilk_pipe_pixel_rate(struct drm_device *dev,
-+				    struct drm_crtc *crtc)
- {
- 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
- 	uint32_t pixel_rate, pfit_size;
-@@ -2388,7 +2388,7 @@ static void hsw_compute_wm_parameters(struct drm_device *dev,
- 		pipes_active++;
- 
- 		p->pipe_htotal = intel_crtc->config.adjusted_mode.htotal;
--		p->pixel_rate = hsw_wm_get_pixel_rate(dev, crtc);
-+		p->pixel_rate = ilk_pipe_pixel_rate(dev, crtc);
- 		p->pri_bytes_per_pixel = crtc->fb->bits_per_pixel / 8;
- 		p->cur_bytes_per_pixel = 4;
- 		p->pri_horiz_pixels =
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0558-drm-i915-Rename-most-wm-compute-functions-to-ilk_-pr.patch b/patches.baytrail/0558-drm-i915-Rename-most-wm-compute-functions-to-ilk_-pr.patch
deleted file mode 100644
index e509ba8ba63ea..0000000000000
--- a/patches.baytrail/0558-drm-i915-Rename-most-wm-compute-functions-to-ilk_-pr.patch
+++ /dev/null
@@ -1,162 +0,0 @@
-From 15af91ef1315c736e8bdb8826ed79117af564093 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Fri, 5 Jul 2013 11:57:17 +0300
-Subject: drm/i915: Rename most wm compute functions to ilk_ prefix
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-These functions are appropriate for everything since ILK.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 23297044ac70da5c87b1c1ef7d5cf32c84b2fd00)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 40 ++++++++++++++++++++--------------------
- 1 file changed, 20 insertions(+), 20 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 73e99cfeff48..e2842614bf76 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2126,7 +2126,7 @@ static uint32_t ilk_pipe_pixel_rate(struct drm_device *dev,
- 	return pixel_rate;
- }
- 
--static uint32_t hsw_wm_method1(uint32_t pixel_rate, uint8_t bytes_per_pixel,
-+static uint32_t ilk_wm_method1(uint32_t pixel_rate, uint8_t bytes_per_pixel,
- 			       uint32_t latency)
- {
- 	uint64_t ret;
-@@ -2137,7 +2137,7 @@ static uint32_t hsw_wm_method1(uint32_t pixel_rate, uint8_t bytes_per_pixel,
- 	return ret;
- }
- 
--static uint32_t hsw_wm_method2(uint32_t pixel_rate, uint32_t pipe_htotal,
-+static uint32_t ilk_wm_method2(uint32_t pixel_rate, uint32_t pipe_htotal,
- 			       uint32_t horiz_pixels, uint8_t bytes_per_pixel,
- 			       uint32_t latency)
- {
-@@ -2149,7 +2149,7 @@ static uint32_t hsw_wm_method2(uint32_t pixel_rate, uint32_t pipe_htotal,
- 	return ret;
- }
- 
--static uint32_t hsw_wm_fbc(uint32_t pri_val, uint32_t horiz_pixels,
-+static uint32_t ilk_wm_fbc(uint32_t pri_val, uint32_t horiz_pixels,
- 			   uint8_t bytes_per_pixel)
- {
- 	return DIV_ROUND_UP(pri_val * 64, horiz_pixels * bytes_per_pixel) + 2;
-@@ -2198,7 +2198,7 @@ enum hsw_data_buf_partitioning {
- };
- 
- /* For both WM_PIPE and WM_LP. */
--static uint32_t hsw_compute_pri_wm(struct hsw_pipe_wm_parameters *params,
-+static uint32_t ilk_compute_pri_wm(struct hsw_pipe_wm_parameters *params,
- 				   uint32_t mem_value,
- 				   bool is_lp)
- {
-@@ -2208,14 +2208,14 @@ static uint32_t hsw_compute_pri_wm(struct hsw_pipe_wm_parameters *params,
- 	if (!params->active)
- 		return 0;
- 
--	method1 = hsw_wm_method1(params->pixel_rate,
-+	method1 = ilk_wm_method1(params->pixel_rate,
- 				 params->pri_bytes_per_pixel,
- 				 mem_value);
- 
- 	if (!is_lp)
- 		return method1;
- 
--	method2 = hsw_wm_method2(params->pixel_rate,
-+	method2 = ilk_wm_method2(params->pixel_rate,
- 				 params->pipe_htotal,
- 				 params->pri_horiz_pixels,
- 				 params->pri_bytes_per_pixel,
-@@ -2225,7 +2225,7 @@ static uint32_t hsw_compute_pri_wm(struct hsw_pipe_wm_parameters *params,
- }
- 
- /* For both WM_PIPE and WM_LP. */
--static uint32_t hsw_compute_spr_wm(struct hsw_pipe_wm_parameters *params,
-+static uint32_t ilk_compute_spr_wm(struct hsw_pipe_wm_parameters *params,
- 				   uint32_t mem_value)
- {
- 	uint32_t method1, method2;
-@@ -2233,10 +2233,10 @@ static uint32_t hsw_compute_spr_wm(struct hsw_pipe_wm_parameters *params,
- 	if (!params->active || !params->sprite_enabled)
- 		return 0;
- 
--	method1 = hsw_wm_method1(params->pixel_rate,
-+	method1 = ilk_wm_method1(params->pixel_rate,
- 				 params->spr_bytes_per_pixel,
- 				 mem_value);
--	method2 = hsw_wm_method2(params->pixel_rate,
-+	method2 = ilk_wm_method2(params->pixel_rate,
- 				 params->pipe_htotal,
- 				 params->spr_horiz_pixels,
- 				 params->spr_bytes_per_pixel,
-@@ -2245,13 +2245,13 @@ static uint32_t hsw_compute_spr_wm(struct hsw_pipe_wm_parameters *params,
- }
- 
- /* For both WM_PIPE and WM_LP. */
--static uint32_t hsw_compute_cur_wm(struct hsw_pipe_wm_parameters *params,
-+static uint32_t ilk_compute_cur_wm(struct hsw_pipe_wm_parameters *params,
- 				   uint32_t mem_value)
- {
- 	if (!params->active)
- 		return 0;
- 
--	return hsw_wm_method2(params->pixel_rate,
-+	return ilk_wm_method2(params->pixel_rate,
- 			      params->pipe_htotal,
- 			      params->cur_horiz_pixels,
- 			      params->cur_bytes_per_pixel,
-@@ -2259,14 +2259,14 @@ static uint32_t hsw_compute_cur_wm(struct hsw_pipe_wm_parameters *params,
- }
- 
- /* Only for WM_LP. */
--static uint32_t hsw_compute_fbc_wm(struct hsw_pipe_wm_parameters *params,
-+static uint32_t ilk_compute_fbc_wm(struct hsw_pipe_wm_parameters *params,
- 				   uint32_t pri_val,
- 				   uint32_t mem_value)
- {
- 	if (!params->active)
- 		return 0;
- 
--	return hsw_wm_fbc(pri_val,
-+	return ilk_wm_fbc(pri_val,
- 			  params->pri_horiz_pixels,
- 			  params->pri_bytes_per_pixel);
- }
-@@ -2281,10 +2281,10 @@ static bool hsw_compute_lp_wm(uint32_t mem_value, struct hsw_wm_maximums *max,
- 	for (pipe = PIPE_A; pipe <= PIPE_C; pipe++) {
- 		struct hsw_pipe_wm_parameters *p = &params[pipe];
- 
--		pri_val[pipe] = hsw_compute_pri_wm(p, mem_value, true);
--		spr_val[pipe] = hsw_compute_spr_wm(p, mem_value);
--		cur_val[pipe] = hsw_compute_cur_wm(p, mem_value);
--		fbc_val[pipe] = hsw_compute_fbc_wm(p, pri_val[pipe], mem_value);
-+		pri_val[pipe] = ilk_compute_pri_wm(p, mem_value, true);
-+		spr_val[pipe] = ilk_compute_spr_wm(p, mem_value);
-+		cur_val[pipe] = ilk_compute_cur_wm(p, mem_value);
-+		fbc_val[pipe] = ilk_compute_fbc_wm(p, pri_val[pipe], mem_value);
- 	}
- 
- 	result->pri_val = max3(pri_val[0], pri_val[1], pri_val[2]);
-@@ -2311,9 +2311,9 @@ static uint32_t hsw_compute_wm_pipe(struct drm_i915_private *dev_priv,
- {
- 	uint32_t pri_val, cur_val, spr_val;
- 
--	pri_val = hsw_compute_pri_wm(params, mem_value, false);
--	spr_val = hsw_compute_spr_wm(params, mem_value);
--	cur_val = hsw_compute_cur_wm(params, mem_value);
-+	pri_val = ilk_compute_pri_wm(params, mem_value, false);
-+	spr_val = ilk_compute_spr_wm(params, mem_value);
-+	cur_val = ilk_compute_cur_wm(params, mem_value);
- 
- 	WARN(pri_val > 127,
- 	     "Primary WM error, mode not supported for pipe %c\n",
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0559-drm-i915-Don-t-pass-mem_value-to-ilk_compute_fbc_wm.patch b/patches.baytrail/0559-drm-i915-Don-t-pass-mem_value-to-ilk_compute_fbc_wm.patch
deleted file mode 100644
index 4f0ea74d35b01..0000000000000
--- a/patches.baytrail/0559-drm-i915-Don-t-pass-mem_value-to-ilk_compute_fbc_wm.patch
+++ /dev/null
@@ -1,51 +0,0 @@
-From 00b87c74b30ace16d028aeb50796d7101086cf09 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Fri, 5 Jul 2013 11:57:19 +0300
-Subject: drm/i915: Don't pass "mem_value" to ilk_compute_fbc_wm
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The FBC watermark doesn't depend on the latency value, so no point in
-passing it in.
-
-Note: It actually depends upon the latency, but only through priv_val
-...
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-[danvet: Add review comment from Paulo to the commit message.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 1fda9882ca0ba134134c5bf04b8d4f4f06b52649)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 5 ++---
- 1 file changed, 2 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index e2842614bf76..573c13c3046e 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2260,8 +2260,7 @@ static uint32_t ilk_compute_cur_wm(struct hsw_pipe_wm_parameters *params,
- 
- /* Only for WM_LP. */
- static uint32_t ilk_compute_fbc_wm(struct hsw_pipe_wm_parameters *params,
--				   uint32_t pri_val,
--				   uint32_t mem_value)
-+				   uint32_t pri_val)
- {
- 	if (!params->active)
- 		return 0;
-@@ -2284,7 +2283,7 @@ static bool hsw_compute_lp_wm(uint32_t mem_value, struct hsw_wm_maximums *max,
- 		pri_val[pipe] = ilk_compute_pri_wm(p, mem_value, true);
- 		spr_val[pipe] = ilk_compute_spr_wm(p, mem_value);
- 		cur_val[pipe] = ilk_compute_cur_wm(p, mem_value);
--		fbc_val[pipe] = ilk_compute_fbc_wm(p, pri_val[pipe], mem_value);
-+		fbc_val[pipe] = ilk_compute_fbc_wm(p, pri_val[pipe]);
- 	}
- 
- 	result->pri_val = max3(pri_val[0], pri_val[1], pri_val[2]);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0560-drm-i915-Change-the-watermark-latency-type-to-uint16.patch b/patches.baytrail/0560-drm-i915-Change-the-watermark-latency-type-to-uint16.patch
deleted file mode 100644
index d9e6951463262..0000000000000
--- a/patches.baytrail/0560-drm-i915-Change-the-watermark-latency-type-to-uint16.patch
+++ /dev/null
@@ -1,53 +0,0 @@
-From a37f63762cb81b1cd999314fc50d04b6f5417e4a Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Fri, 5 Jul 2013 11:57:20 +0300
-Subject: drm/i915: Change the watermark latency type to uint16_t
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The latency values fit in uint16_t, so let's save a few bytes.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 888fd1594e38c21f8dc5aa28b90a556df32f61e0)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 6 +++---
- 1 file changed, 3 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 573c13c3046e..eef173df268b 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2353,7 +2353,7 @@ hsw_compute_linetime_wm(struct drm_device *dev, struct drm_crtc *crtc)
- 
- static void hsw_compute_wm_parameters(struct drm_device *dev,
- 				      struct hsw_pipe_wm_parameters *params,
--				      uint32_t *wm,
-+				      uint16_t *wm,
- 				      struct hsw_wm_maximums *lp_max_1_2,
- 				      struct hsw_wm_maximums *lp_max_5_6)
- {
-@@ -2426,7 +2426,7 @@ static void hsw_compute_wm_parameters(struct drm_device *dev,
- 
- static void hsw_compute_wm_results(struct drm_device *dev,
- 				   struct hsw_pipe_wm_parameters *params,
--				   uint32_t *wm,
-+				   uint16_t *wm,
- 				   struct hsw_wm_maximums *lp_maximums,
- 				   struct hsw_wm_values *results)
- {
-@@ -2608,7 +2608,7 @@ static void haswell_update_wm(struct drm_device *dev)
- 	struct hsw_wm_maximums lp_max_1_2, lp_max_5_6;
- 	struct hsw_pipe_wm_parameters params[3];
- 	struct hsw_wm_values results_1_2, results_5_6, *best_results;
--	uint32_t wm[5];
-+	uint16_t wm[5];
- 	enum hsw_data_buf_partitioning partitioning;
- 
- 	hsw_compute_wm_parameters(dev, params, wm, &lp_max_1_2, &lp_max_5_6);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0561-drm-i915-Split-out-reading-of-HSW-watermark-latency-.patch b/patches.baytrail/0561-drm-i915-Split-out-reading-of-HSW-watermark-latency-.patch
deleted file mode 100644
index f669e6efe0724..0000000000000
--- a/patches.baytrail/0561-drm-i915-Split-out-reading-of-HSW-watermark-latency-.patch
+++ /dev/null
@@ -1,95 +0,0 @@
-From bd5245b1b7a008c00cd4f25fd1204f25f27bec61 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Fri, 5 Jul 2013 11:57:21 +0300
-Subject: drm/i915: Split out reading of HSW watermark latency values
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Move parsing of MCH_SSKPD to a separate function, we'll add other
-platforms there later.
-
-Note: Chris spotted an empty struct initializer and wondered whether
-that is hiding a compilier warning. Ville explained that it should
-have been part of the patch that extends this function to snb/ivb,
-which don't have all levels hsw has. I've figured it's ok to keep it
-here with a small note.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-[danvet: Add note about the ominous struct initializer.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 12b134df4e42ea1ac141388e563346777f8a1605)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 34 ++++++++++++++++++++--------------
- 1 file changed, 20 insertions(+), 14 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index eef173df268b..aa7dd82d4489 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2351,28 +2351,33 @@ hsw_compute_linetime_wm(struct drm_device *dev, struct drm_crtc *crtc)
- 	       PIPE_WM_LINETIME_TIME(linetime);
- }
- 
-+static void intel_read_wm_latency(struct drm_device *dev, uint16_t wm[5])
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+
-+	if (IS_HASWELL(dev)) {
-+		uint64_t sskpd = I915_READ64(MCH_SSKPD);
-+
-+		wm[0] = (sskpd >> 56) & 0xFF;
-+		if (wm[0] == 0)
-+			wm[0] = sskpd & 0xF;
-+		wm[1] = ((sskpd >> 4) & 0xFF) * 5;
-+		wm[2] = ((sskpd >> 12) & 0xFF) * 5;
-+		wm[3] = ((sskpd >> 20) & 0x1FF) * 5;
-+		wm[4] = ((sskpd >> 32) & 0x1FF) * 5;
-+	}
-+}
-+
- static void hsw_compute_wm_parameters(struct drm_device *dev,
- 				      struct hsw_pipe_wm_parameters *params,
--				      uint16_t *wm,
- 				      struct hsw_wm_maximums *lp_max_1_2,
- 				      struct hsw_wm_maximums *lp_max_5_6)
- {
--	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct drm_crtc *crtc;
- 	struct drm_plane *plane;
--	uint64_t sskpd = I915_READ64(MCH_SSKPD);
- 	enum pipe pipe;
- 	int pipes_active = 0, sprites_enabled = 0;
- 
--	if ((sskpd >> 56) & 0xFF)
--		wm[0] = (sskpd >> 56) & 0xFF;
--	else
--		wm[0] = sskpd & 0xF;
--	wm[1] = ((sskpd >> 4) & 0xFF) * 5;
--	wm[2] = ((sskpd >> 12) & 0xFF) * 5;
--	wm[3] = ((sskpd >> 20) & 0x1FF) * 5;
--	wm[4] = ((sskpd >> 32) & 0x1FF) * 5;
--
- 	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
- 		struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
- 		struct hsw_pipe_wm_parameters *p;
-@@ -2608,10 +2613,11 @@ static void haswell_update_wm(struct drm_device *dev)
- 	struct hsw_wm_maximums lp_max_1_2, lp_max_5_6;
- 	struct hsw_pipe_wm_parameters params[3];
- 	struct hsw_wm_values results_1_2, results_5_6, *best_results;
--	uint16_t wm[5];
-+	uint16_t wm[5] = {};
- 	enum hsw_data_buf_partitioning partitioning;
- 
--	hsw_compute_wm_parameters(dev, params, wm, &lp_max_1_2, &lp_max_5_6);
-+	intel_read_wm_latency(dev, wm);
-+	hsw_compute_wm_parameters(dev, params, &lp_max_1_2, &lp_max_5_6);
- 
- 	hsw_compute_wm_results(dev, params, wm, &lp_max_1_2, &results_1_2);
- 	if (lp_max_1_2.pri != lp_max_5_6.pri) {
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0562-drm-i915-Don-t-multiply-the-watermark-latency-values.patch b/patches.baytrail/0562-drm-i915-Don-t-multiply-the-watermark-latency-values.patch
deleted file mode 100644
index 8644b74ba06c8..0000000000000
--- a/patches.baytrail/0562-drm-i915-Don-t-multiply-the-watermark-latency-values.patch
+++ /dev/null
@@ -1,59 +0,0 @@
-From 177a0ab7aa7203fd5e5c4db111b7cda654d3c414 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Fri, 5 Jul 2013 11:57:22 +0300
-Subject: drm/i915: Don't multiply the watermark latency values too early
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The LP1+ watermark latency values need to be multiplied by 5 to
-make them suitable for watermark calculations. However on pre-HSW
-platforms we're going to need the raw value later when we have to
-write it to the WM_LPn registers' latency field. So delay the
-multiplication until it's needed.
-
-Note: Paulo complains that the units of wm (now in 100ns) aren't
-really clear and I agree. But that can be fixed later on ...
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-[danvet: Add a comment about the unit obfuscation.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit e5d5019e95415a99b1c0bca3dab6d8fcd39f4c65)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 10 +++++-----
- 1 file changed, 5 insertions(+), 5 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index aa7dd82d4489..c2b993fe82ca 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2361,10 +2361,10 @@ static void intel_read_wm_latency(struct drm_device *dev, uint16_t wm[5])
- 		wm[0] = (sskpd >> 56) & 0xFF;
- 		if (wm[0] == 0)
- 			wm[0] = sskpd & 0xF;
--		wm[1] = ((sskpd >> 4) & 0xFF) * 5;
--		wm[2] = ((sskpd >> 12) & 0xFF) * 5;
--		wm[3] = ((sskpd >> 20) & 0x1FF) * 5;
--		wm[4] = ((sskpd >> 32) & 0x1FF) * 5;
-+		wm[1] = (sskpd >> 4) & 0xFF;
-+		wm[2] = (sskpd >> 12) & 0xFF;
-+		wm[3] = (sskpd >> 20) & 0x1FF;
-+		wm[4] = (sskpd >> 32) & 0x1FF;
- 	}
- }
- 
-@@ -2442,7 +2442,7 @@ static void hsw_compute_wm_results(struct drm_device *dev,
- 	int level, max_level, wm_lp;
- 
- 	for (level = 1; level <= 4; level++)
--		if (!hsw_compute_lp_wm(wm[level], lp_maximums, params,
-+		if (!hsw_compute_lp_wm(wm[level] * 5, lp_maximums, params,
- 				       &lp_results[level - 1]))
- 			break;
- 	max_level = level - 1;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0563-drm-i915-Add-SNB-IVB-support-to-intel_read_wm_latenc.patch b/patches.baytrail/0563-drm-i915-Add-SNB-IVB-support-to-intel_read_wm_latenc.patch
deleted file mode 100644
index 6ba12516deeb3..0000000000000
--- a/patches.baytrail/0563-drm-i915-Add-SNB-IVB-support-to-intel_read_wm_latenc.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From 9683ce954bc6585d96dbe66f6bd697b69b78d8fc Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Fri, 5 Jul 2013 11:57:23 +0300
-Subject: drm/i915: Add SNB/IVB support to intel_read_wm_latency
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-SNB and IVB have slightly a different way to read out the
-watermark latency values.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 63cf9a131ee60fa2458d75f5c0d7a3a5dcaa2b3e)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 7 +++++++
- 1 file changed, 7 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index c2b993fe82ca..03fa8656155d 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2365,6 +2365,13 @@ static void intel_read_wm_latency(struct drm_device *dev, uint16_t wm[5])
- 		wm[2] = (sskpd >> 12) & 0xFF;
- 		wm[3] = (sskpd >> 20) & 0x1FF;
- 		wm[4] = (sskpd >> 32) & 0x1FF;
-+	} else if (INTEL_INFO(dev)->gen >= 6) {
-+		uint32_t sskpd = I915_READ(MCH_SSKPD);
-+
-+		wm[0] = (sskpd >> SSKPD_WM0_SHIFT) & SSKPD_WM_MASK;
-+		wm[1] = (sskpd >> SSKPD_WM1_SHIFT) & SSKPD_WM_MASK;
-+		wm[2] = (sskpd >> SSKPD_WM2_SHIFT) & SSKPD_WM_MASK;
-+		wm[3] = (sskpd >> SSKPD_WM3_SHIFT) & SSKPD_WM_MASK;
- 	}
- }
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0564-drm-i915-enable-IPS-for-bpp-24.patch b/patches.baytrail/0564-drm-i915-enable-IPS-for-bpp-24.patch
deleted file mode 100644
index fe22102a2d318..0000000000000
--- a/patches.baytrail/0564-drm-i915-enable-IPS-for-bpp-24.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From 4695860630dae079809f30df5630bc6c1170ebaf Mon Sep 17 00:00:00 2001
-From: Jesse Barnes <jbarnes@virtuousgeek.org>
-Date: Thu, 25 Jul 2013 10:06:50 -0700
-Subject: drm/i915: enable IPS for bpp <= 24
-
-Art confirms that this should work fine.  Since most panels are 18bpp
-with dithering from 24bpp, the existing code wouldn't be enabled in most
-cases.
-
-Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit b6dfdc9b7f0d7859ea146b6c869aa2cfe6d713f3)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 3fd109df65a6..5521fb66f2a4 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -4087,7 +4087,7 @@ static void hsw_compute_ips_config(struct intel_crtc *crtc,
- {
- 	pipe_config->ips_enabled = i915_enable_ips &&
- 				   hsw_crtc_supports_ips(crtc) &&
--				   pipe_config->pipe_bpp == 24;
-+				   pipe_config->pipe_bpp <= 24;
- }
- 
- static int intel_crtc_compute_config(struct intel_crtc *crtc,
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0565-drm-i915-Acquire-dpio_lock-for-VLV-sideband-programm.patch b/patches.baytrail/0565-drm-i915-Acquire-dpio_lock-for-VLV-sideband-programm.patch
deleted file mode 100644
index 0c81c3c0c9da1..0000000000000
--- a/patches.baytrail/0565-drm-i915-Acquire-dpio_lock-for-VLV-sideband-programm.patch
+++ /dev/null
@@ -1,157 +0,0 @@
-From 63b712d08cf564097c2ae1977252d641991baea2 Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Fri, 26 Jul 2013 19:57:35 +0100
-Subject: drm/i915: Acquire dpio_lock for VLV sideband programming in DP/HDMI
-
-Otherwise we get flooded by the kernel warning us that we are doing
-long sequences of IO without serialisation. For example,
-
- WARNING: CPU: 0 PID: 11136 at drivers/gpu/drm/i915/intel_sideband.c:40 vlv_sideband_rw+0x48/0x1ef()
- Modules linked in:
- CPU: 0 PID: 11136 Comm: kworker/u2:0 Tainted: G        W    3.11.0-rc2+ #4
- Call Trace:
-  [<c2028564>] ?  warn_slowpath_common+0x63/0x78
-  [<c227ad43>] ?  vlv_sideband_rw+0x48/0x1ef
-  [<c20285dd>] ?  warn_slowpath_null+0xf/0x13
-  [<c227ad43>] ?  vlv_sideband_rw+0x48/0x1ef
-  [<c227b060>] ?  vlv_dpio_write+0x1c/0x21
-  [<c2262b3b>] ?  intel_dp_set_signal_levels+0x24a/0x385
-  [<c2264909>] ?  intel_dp_complete_link_train+0x25/0x1d1
-  [<c2264c55>] ?  intel_dp_check_link_status+0xf7/0x106
-  [<c2238ced>] ?  i915_hotplug_work_func+0x17b/0x221
-  [<c203a204>] ?  process_one_work+0x12e/0x210
-  [<c203a5e4>] ?  worker_thread+0x116/0x1ad
-  [<c203a4ce>] ?  rescuer_thread+0x1cb/0x1cb
-  [<c203d8f5>] ?  kthread+0x67/0x6c
-  [<c2457ebb>] ?  ret_from_kernel_thread+0x1b/0x30
-  [<c203d88e>] ?  init_completion+0x18/0x18
-
-v2: Retire the locking in vlv_crtc_enable() and do it close to the meat.
-
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Reviewed-by: Jani Nikula <jani.nikula@intel.com>
-[danvet: Squash in a s/mutex_lock/mutex_unlock/ fixup spotted by the 0
-day kernel build/coccinelle and reported by Dan Carpenter.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 0980a60fba7a9afa3259390e8af16b6ce486858a)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 4 ----
- drivers/gpu/drm/i915/intel_dp.c      | 6 ++++++
- drivers/gpu/drm/i915/intel_hdmi.c    | 4 ++++
- 3 files changed, 10 insertions(+), 4 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 5521fb66f2a4..20510cb59085 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -3652,8 +3652,6 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc)
- 	intel_crtc->active = true;
- 	intel_update_watermarks(dev);
- 
--	mutex_lock(&dev_priv->dpio_lock);
--
- 	for_each_encoder_on_crtc(dev, crtc, encoder)
- 		if (encoder->pre_pll_enable)
- 			encoder->pre_pll_enable(encoder);
-@@ -3678,8 +3676,6 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc)
- 	intel_crtc_update_cursor(crtc, true);
- 
- 	intel_update_fbc(dev);
--
--	mutex_unlock(&dev_priv->dpio_lock);
- }
- 
- static void i9xx_crtc_enable(struct drm_crtc *crtc)
-diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
-index 44972a679517..57d9b979a846 100644
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -1738,6 +1738,7 @@ static void intel_pre_enable_dp(struct intel_encoder *encoder)
- 		int pipe = intel_crtc->pipe;
- 		u32 val;
- 
-+		mutex_lock(&dev_priv->dpio_lock);
- 		val = vlv_dpio_read(dev_priv, DPIO_DATA_LANE_A(port));
- 		val = 0;
- 		if (pipe)
-@@ -1751,6 +1752,7 @@ static void intel_pre_enable_dp(struct intel_encoder *encoder)
- 				 0x00760018);
- 		vlv_dpio_write(dev_priv, DPIO_PCS_CLOCKBUF8(port),
- 				 0x00400888);
-+		mutex_unlock(&dev_priv->dpio_lock);
- 	}
- }
- 
-@@ -1765,6 +1767,7 @@ static void intel_dp_pre_pll_enable(struct intel_encoder *encoder)
- 		return;
- 
- 	/* Program Tx lane resets to default */
-+	mutex_lock(&dev_priv->dpio_lock);
- 	vlv_dpio_write(dev_priv, DPIO_PCS_TX(port),
- 			 DPIO_PCS_TX_LANE2_RESET |
- 			 DPIO_PCS_TX_LANE1_RESET);
-@@ -1778,6 +1781,7 @@ static void intel_dp_pre_pll_enable(struct intel_encoder *encoder)
- 	vlv_dpio_write(dev_priv, DPIO_PCS_STAGGER1(port), 0x00750f00);
- 	vlv_dpio_write(dev_priv, DPIO_TX_CTL(port), 0x00001500);
- 	vlv_dpio_write(dev_priv, DPIO_TX_LANE(port), 0x40400000);
-+	mutex_unlock(&dev_priv->dpio_lock);
- }
- 
- /*
-@@ -1989,6 +1993,7 @@ static uint32_t intel_vlv_signal_levels(struct intel_dp *intel_dp)
- 		return 0;
- 	}
- 
-+	mutex_lock(&dev_priv->dpio_lock);
- 	vlv_dpio_write(dev_priv, DPIO_TX_OCALINIT(port), 0x00000000);
- 	vlv_dpio_write(dev_priv, DPIO_TX_SWING_CTL4(port), demph_reg_value);
- 	vlv_dpio_write(dev_priv, DPIO_TX_SWING_CTL2(port),
-@@ -1997,6 +2002,7 @@ static uint32_t intel_vlv_signal_levels(struct intel_dp *intel_dp)
- 	vlv_dpio_write(dev_priv, DPIO_PCS_STAGGER0(port), 0x00030000);
- 	vlv_dpio_write(dev_priv, DPIO_PCS_CTL_OVER1(port), preemph_reg_value);
- 	vlv_dpio_write(dev_priv, DPIO_TX_OCALINIT(port), 0x80000000);
-+	mutex_unlock(&dev_priv->dpio_lock);
- 
- 	return 0;
- }
-diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
-index e82cd816bde9..1e602058d475 100644
---- a/drivers/gpu/drm/i915/intel_hdmi.c
-+++ b/drivers/gpu/drm/i915/intel_hdmi.c
-@@ -1032,6 +1032,7 @@ static void intel_hdmi_pre_enable(struct intel_encoder *encoder)
- 		return;
- 
- 	/* Enable clock channels for this port */
-+	mutex_lock(&dev_priv->dpio_lock);
- 	val = vlv_dpio_read(dev_priv, DPIO_DATA_LANE_A(port));
- 	val = 0;
- 	if (pipe)
-@@ -1062,6 +1063,7 @@ static void intel_hdmi_pre_enable(struct intel_encoder *encoder)
- 			 0x00760018);
- 	vlv_dpio_write(dev_priv, DPIO_PCS_CLOCKBUF8(port),
- 			 0x00400888);
-+	mutex_unlock(&dev_priv->dpio_lock);
- }
- 
- static void intel_hdmi_pre_pll_enable(struct intel_encoder *encoder)
-@@ -1075,6 +1077,7 @@ static void intel_hdmi_pre_pll_enable(struct intel_encoder *encoder)
- 		return;
- 
- 	/* Program Tx lane resets to default */
-+	mutex_lock(&dev_priv->dpio_lock);
- 	vlv_dpio_write(dev_priv, DPIO_PCS_TX(port),
- 			 DPIO_PCS_TX_LANE2_RESET |
- 			 DPIO_PCS_TX_LANE1_RESET);
-@@ -1093,6 +1096,7 @@ static void intel_hdmi_pre_pll_enable(struct intel_encoder *encoder)
- 			 0x00002000);
- 	vlv_dpio_write(dev_priv, DPIO_TX_OCALINIT(port),
- 			 DPIO_TX_OCALINIT_EN);
-+	mutex_unlock(&dev_priv->dpio_lock);
- }
- 
- static void intel_hdmi_post_disable(struct intel_encoder *encoder)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0566-drm-i915-rearrange-vlv-dp-enable-and-pre_enable-call.patch b/patches.baytrail/0566-drm-i915-rearrange-vlv-dp-enable-and-pre_enable-call.patch
deleted file mode 100644
index cccd123c9e093..0000000000000
--- a/patches.baytrail/0566-drm-i915-rearrange-vlv-dp-enable-and-pre_enable-call.patch
+++ /dev/null
@@ -1,141 +0,0 @@
-From 20397ab650e3678471b68e06a48aaa5db2d3a962 Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Tue, 30 Jul 2013 12:20:30 +0300
-Subject: drm/i915: rearrange vlv dp enable and pre_enable callbacks
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-VLV wants encoder enabling before the pipe is up. This is currently
-achieved through calling the ->enable callback early, right after the
-->pre_enable callback, in valleyview_crtc_enable(). This loses both the
-distinction between ->pre_enable and ->enable on VLV and the possibility
-to use a hook at the end of the modeset sequence.
-
-Rearrange the DP callbacks to make it possible to move ->enable call
-later. Basically do everything in ->pre_enable on VLV, and make ->enable
-a NOP.
-
-There should be no functional changes.
-
-v2: Rebase.
-
-v3: Explain why this is needed in the commit message (Chris).
-
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit ab1f90f9662482021fddd0e7868005401f62866f)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_dp.c |   75 +++++++++++++++++++++-------------------
- 1 file changed, 40 insertions(+), 35 deletions(-)
-
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -1711,49 +1711,50 @@ static void intel_enable_dp(struct intel
- 	intel_dp_complete_link_train(intel_dp);
- 	intel_dp_stop_link_train(intel_dp);
- 	ironlake_edp_backlight_on(intel_dp);
-+}
- 
--	if (IS_VALLEYVIEW(dev)) {
--		struct intel_digital_port *dport =
--			enc_to_dig_port(&encoder->base);
--		int channel = vlv_dport_to_channel(dport);
--
--		vlv_wait_port_ready(dev_priv, channel);
--	}
-+static void vlv_enable_dp(struct intel_encoder *encoder)
-+{
- }
- 
- static void intel_pre_enable_dp(struct intel_encoder *encoder)
- {
- 	struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
- 	struct intel_digital_port *dport = dp_to_dig_port(intel_dp);
-+
-+	if (dport->port == PORT_A)
-+		ironlake_edp_pll_on(intel_dp);
-+}
-+
-+static void vlv_pre_enable_dp(struct intel_encoder *encoder)
-+{
-+	struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
-+	struct intel_digital_port *dport = dp_to_dig_port(intel_dp);
- 	struct drm_device *dev = encoder->base.dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
-+	int port = vlv_dport_to_channel(dport);
-+	int pipe = intel_crtc->pipe;
-+	u32 val;
- 
--	if (dport->port == PORT_A && !IS_VALLEYVIEW(dev))
--		ironlake_edp_pll_on(intel_dp);
-+	mutex_lock(&dev_priv->dpio_lock);
- 
--	if (IS_VALLEYVIEW(dev)) {
--		struct intel_crtc *intel_crtc =
--			to_intel_crtc(encoder->base.crtc);
--		int port = vlv_dport_to_channel(dport);
--		int pipe = intel_crtc->pipe;
--		u32 val;
--
--		mutex_lock(&dev_priv->dpio_lock);
--		val = vlv_dpio_read(dev_priv, DPIO_DATA_LANE_A(port));
--		val = 0;
--		if (pipe)
--			val |= (1<<21);
--		else
--			val &= ~(1<<21);
--		val |= 0x001000c4;
--		vlv_dpio_write(dev_priv, DPIO_DATA_CHANNEL(port), val);
--
--		vlv_dpio_write(dev_priv, DPIO_PCS_CLOCKBUF0(port),
--				 0x00760018);
--		vlv_dpio_write(dev_priv, DPIO_PCS_CLOCKBUF8(port),
--				 0x00400888);
--		mutex_unlock(&dev_priv->dpio_lock);
--	}
-+	val = vlv_dpio_read(dev_priv, DPIO_DATA_LANE_A(port));
-+	val = 0;
-+	if (pipe)
-+		val |= (1<<21);
-+	else
-+		val &= ~(1<<21);
-+	val |= 0x001000c4;
-+	vlv_dpio_write(dev_priv, DPIO_DATA_CHANNEL(port), val);
-+	vlv_dpio_write(dev_priv, DPIO_PCS_CLOCKBUF0(port), 0x00760018);
-+	vlv_dpio_write(dev_priv, DPIO_PCS_CLOCKBUF8(port), 0x00400888);
-+
-+	mutex_unlock(&dev_priv->dpio_lock);
-+
-+	intel_enable_dp(encoder);
-+
-+	vlv_wait_port_ready(dev_priv, port);
- }
- 
- static void intel_dp_pre_pll_enable(struct intel_encoder *encoder)
-@@ -3549,14 +3550,18 @@ intel_dp_init(struct drm_device *dev, in
- 
- 	intel_encoder->compute_config = intel_dp_compute_config;
- 	intel_encoder->mode_set = intel_dp_mode_set;
--	intel_encoder->enable = intel_enable_dp;
--	intel_encoder->pre_enable = intel_pre_enable_dp;
- 	intel_encoder->disable = intel_disable_dp;
- 	intel_encoder->post_disable = intel_post_disable_dp;
- 	intel_encoder->get_hw_state = intel_dp_get_hw_state;
- 	intel_encoder->get_config = intel_dp_get_config;
--	if (IS_VALLEYVIEW(dev))
-+	if (IS_VALLEYVIEW(dev)) {
- 		intel_encoder->pre_pll_enable = intel_dp_pre_pll_enable;
-+		intel_encoder->pre_enable = vlv_pre_enable_dp;
-+		intel_encoder->enable = vlv_enable_dp;
-+	} else {
-+		intel_encoder->pre_enable = intel_pre_enable_dp;
-+		intel_encoder->enable = intel_enable_dp;
-+	}
- 
- 	intel_dig_port->port = port;
- 	intel_dig_port->dp.output_reg = output_reg;
diff --git a/patches.baytrail/0567-drm-i915-rearrange-vlv-hdmi-enable-and-pre_enable-ca.patch b/patches.baytrail/0567-drm-i915-rearrange-vlv-hdmi-enable-and-pre_enable-ca.patch
deleted file mode 100644
index 4f74b19cb7b6f..0000000000000
--- a/patches.baytrail/0567-drm-i915-rearrange-vlv-hdmi-enable-and-pre_enable-ca.patch
+++ /dev/null
@@ -1,89 +0,0 @@
-From 262be8838a9892f97e034e991e9c8139ffd8f538 Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Tue, 30 Jul 2013 12:20:31 +0300
-Subject: drm/i915: rearrange vlv hdmi enable and pre_enable callbacks
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-VLV wants encoder enabling before the pipe is up. This is currently
-achieved through calling the ->enable callback early, right after the
-->pre_enable callback, in valleyview_crtc_enable(). This loses both the
-distinction between ->pre_enable and ->enable on VLV and the possibility
-to use a hook at the end of the modeset sequence.
-
-Rearrange the HDMI callbacks to make it possible to move ->enable call
-later. Basically do everything in ->pre_enable on VLV, and make ->enable
-a NOP.
-
-There should be no functional changes.
-
-v2: Rebase.
-
-v3: Explain why this is needed in the commit message (Chris).
-
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit b76cf76bfa76246c8acce104de8f2fdd001069fb)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_hdmi.c | 20 +++++++++++---------
- 1 file changed, 11 insertions(+), 9 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
-index 1e602058d475..0b3750f11a97 100644
---- a/drivers/gpu/drm/i915/intel_hdmi.c
-+++ b/drivers/gpu/drm/i915/intel_hdmi.c
-@@ -718,14 +718,10 @@ static void intel_enable_hdmi(struct intel_encoder *encoder)
- 		I915_WRITE(intel_hdmi->hdmi_reg, temp);
- 		POSTING_READ(intel_hdmi->hdmi_reg);
- 	}
-+}
- 
--	if (IS_VALLEYVIEW(dev)) {
--		struct intel_digital_port *dport =
--			enc_to_dig_port(&encoder->base);
--		int channel = vlv_dport_to_channel(dport);
--
--		vlv_wait_port_ready(dev_priv, channel);
--	}
-+static void vlv_enable_hdmi(struct intel_encoder *encoder)
-+{
- }
- 
- static void intel_disable_hdmi(struct intel_encoder *encoder)
-@@ -1064,6 +1060,10 @@ static void intel_hdmi_pre_enable(struct intel_encoder *encoder)
- 	vlv_dpio_write(dev_priv, DPIO_PCS_CLOCKBUF8(port),
- 			 0x00400888);
- 	mutex_unlock(&dev_priv->dpio_lock);
-+
-+	intel_enable_hdmi(encoder);
-+
-+	vlv_wait_port_ready(dev_priv, port);
- }
- 
- static void intel_hdmi_pre_pll_enable(struct intel_encoder *encoder)
-@@ -1244,14 +1244,16 @@ void intel_hdmi_init(struct drm_device *dev, int hdmi_reg, enum port port)
- 
- 	intel_encoder->compute_config = intel_hdmi_compute_config;
- 	intel_encoder->mode_set = intel_hdmi_mode_set;
--	intel_encoder->enable = intel_enable_hdmi;
- 	intel_encoder->disable = intel_disable_hdmi;
- 	intel_encoder->get_hw_state = intel_hdmi_get_hw_state;
- 	intel_encoder->get_config = intel_hdmi_get_config;
- 	if (IS_VALLEYVIEW(dev)) {
--		intel_encoder->pre_enable = intel_hdmi_pre_enable;
- 		intel_encoder->pre_pll_enable = intel_hdmi_pre_pll_enable;
-+		intel_encoder->pre_enable = intel_hdmi_pre_enable;
-+		intel_encoder->enable = vlv_enable_hdmi;
- 		intel_encoder->post_disable = intel_hdmi_post_disable;
-+	} else {
-+		intel_encoder->enable = intel_enable_hdmi;
- 	}
- 
- 	intel_encoder->type = INTEL_OUTPUT_HDMI;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0568-drm-i915-move-encoder-enable-callback-later-in-VLV-c.patch b/patches.baytrail/0568-drm-i915-move-encoder-enable-callback-later-in-VLV-c.patch
deleted file mode 100644
index 97367b8ad03a6..0000000000000
--- a/patches.baytrail/0568-drm-i915-move-encoder-enable-callback-later-in-VLV-c.patch
+++ /dev/null
@@ -1,60 +0,0 @@
-From 5c9b0d896db72e6b777ed60f663652ef45f0cacf Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Tue, 30 Jul 2013 12:20:32 +0300
-Subject: drm/i915: move encoder->enable callback later in VLV crtc enable
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-VLV wants encoder enabling before the pipe is up. With the previously
-rearranged VLV DP and HDMI ->pre_enable and ->enable callbacks in place,
-this no longer depends on the early ->enable hook call. Move the
-->enable call at the end of the sequence, similar to the crtc enable on
-other platforms. This will be needed e.g. for moving the eDP backlight
-enabling to the right place in the sequence, currently done too early on
-VLV.
-
-There should be no functional changes.
-
-v2: Rebase.
-
-v3: Explain why this is needed in the commit message (Chris).
-
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 5004945f1d6c0282c0288afa89ad85d7f2bea4d5)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 7 +++----
- 1 file changed, 3 insertions(+), 4 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 20510cb59085..41ce30eac8ec 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -3662,10 +3662,6 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc)
- 		if (encoder->pre_enable)
- 			encoder->pre_enable(encoder);
- 
--	/* VLV wants encoder enabling _before_ the pipe is up. */
--	for_each_encoder_on_crtc(dev, crtc, encoder)
--		encoder->enable(encoder);
--
- 	i9xx_pfit_enable(intel_crtc);
- 
- 	intel_crtc_load_lut(crtc);
-@@ -3676,6 +3672,9 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc)
- 	intel_crtc_update_cursor(crtc, true);
- 
- 	intel_update_fbc(dev);
-+
-+	for_each_encoder_on_crtc(dev, crtc, encoder)
-+		encoder->enable(encoder);
- }
- 
- static void i9xx_crtc_enable(struct drm_crtc *crtc)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0569-drm-i915-make-user-mode-sync-polarity-setting-explic.patch b/patches.baytrail/0569-drm-i915-make-user-mode-sync-polarity-setting-explic.patch
deleted file mode 100644
index c9c23f0545e09..0000000000000
--- a/patches.baytrail/0569-drm-i915-make-user-mode-sync-polarity-setting-explic.patch
+++ /dev/null
@@ -1,59 +0,0 @@
-From bd601bcf434dbc2cb43751f507e24a0163401c62 Mon Sep 17 00:00:00 2001
-From: Imre Deak <imre.deak@intel.com>
-Date: Tue, 30 Jul 2013 13:36:32 +0300
-Subject: drm/i915: make user mode sync polarity setting explicit
-
-Userspace can pass a mode with an unspecified vsync/hsync polarity
-setting. All encoders in the Intel driver take this to mean a negative
-polarity setting. The HW readout/state checker code on the other hand
-needs these flags to be explicitly set, otherwise the state checker will
-WARN about the mismatch.
-
-Get rid of the WARN by making the polarity setting explicit in the
-adjusted mode flags based on the requested mode flags. This will keep
-the existing behavior otherwise.
-
-Note that we could guess from the other timing parameters whether the
-user wanted a VESA or other standard mode and set the polarity
-accordingly. This is what the NV driver does
-(drivers/gpu/drm/nouveau/dispnv04/crtc.c), but I think that's not very
-exact and would change the existing behavior of the Intel driver.
-
-Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=65442
-Signed-off-by: Imre Deak <imre.deak@intel.com>
-Tested-by: cancan,feng <cancan.feng@intel.com>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 2960bc9cceecb5d556ce1c07656a6609e2f7e8b0)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 13 +++++++++++++
- 1 file changed, 13 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 41ce30eac8ec..bd3591af3395 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -8065,6 +8065,19 @@ intel_modeset_pipe_config(struct drm_crtc *crtc,
- 		(enum transcoder) to_intel_crtc(crtc)->pipe;
- 	pipe_config->shared_dpll = DPLL_ID_PRIVATE;
- 
-+	/*
-+	 * Sanitize sync polarity flags based on requested ones. If neither
-+	 * positive or negative polarity is requested, treat this as meaning
-+	 * negative polarity.
-+	 */
-+	if (!(pipe_config->adjusted_mode.flags &
-+	      (DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NHSYNC)))
-+		pipe_config->adjusted_mode.flags |= DRM_MODE_FLAG_NHSYNC;
-+
-+	if (!(pipe_config->adjusted_mode.flags &
-+	      (DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_NVSYNC)))
-+		pipe_config->adjusted_mode.flags |= DRM_MODE_FLAG_NVSYNC;
-+
- 	/* Compute a starting value for pipe_config->pipe_bpp taking the source
- 	 * plane pixel format and any sink constraints into account. Returns the
- 	 * source plane bpp so that dithering can be selected on mismatches
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0570-i915-fix-ACPI-_DSM-warning.patch b/patches.baytrail/0570-i915-fix-ACPI-_DSM-warning.patch
deleted file mode 100644
index 38b26e1376169..0000000000000
--- a/patches.baytrail/0570-i915-fix-ACPI-_DSM-warning.patch
+++ /dev/null
@@ -1,75 +0,0 @@
-From 769c4bfea7d9f6c47ed7e40fe42cca7dcaadfb66 Mon Sep 17 00:00:00 2001
-From: Peter Wu <lekensteyn@gmail.com>
-Date: Thu, 1 Aug 2013 18:21:28 +0200
-Subject: i915: fix ACPI _DSM warning
-
-Since commit 29a241c (ACPICA: Add argument typechecking for all
-predefined ACPI names), _DSM parameters are validated which trigger the
-following warning:
-
-    ACPI Warning: \_SB_.PCI0.GFX0._DSM: Argument #4 type mismatch - Found [Integer], ACPI requires [Package] (20130517/nsarguments-95)
-    ACPI Warning: \_SB_.PCI0.GFX0._DSM: Argument #4 type mismatch - Found [Integer], ACPI requires [Package] (20130517/nsarguments-95)
-    ACPI Warning: \_SB_.PCI0.P0P2.PEGP._DSM: Argument #4 type mismatch - Found [Integer], ACPI requires [Package] (20130517/nsarguments-95)
-    ACPI Warning: \_SB_.PCI0.P0P2.PEGP._DSM: Argument #4 type mismatch - Found [Integer], ACPI requires [Package] (20130517/nsarguments-95)
-
-As the Intel _DSM method seems to ignore this parameter, let's comply to
-the ACPI spec and use a Package instead.
-
-Signed-off-by: Peter Wu <lekensteyn@gmail.com>
-Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=32602
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 6d5c2d8ca3c15a191a8078316e547c1f4e5ad6eb)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_acpi.c | 14 ++++++++------
- 1 file changed, 8 insertions(+), 6 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_acpi.c b/drivers/gpu/drm/i915/intel_acpi.c
-index bcbbaea2a78e..57fe1ae32a0d 100644
---- a/drivers/gpu/drm/i915/intel_acpi.c
-+++ b/drivers/gpu/drm/i915/intel_acpi.c
-@@ -28,7 +28,7 @@ static const u8 intel_dsm_guid[] = {
- 	0x0f, 0x13, 0x17, 0xb0, 0x1c, 0x2c
- };
- 
--static int intel_dsm(acpi_handle handle, int func, int arg)
-+static int intel_dsm(acpi_handle handle, int func)
- {
- 	struct acpi_buffer output = { ACPI_ALLOCATE_BUFFER, NULL };
- 	struct acpi_object_list input;
-@@ -46,8 +46,9 @@ static int intel_dsm(acpi_handle handle, int func, int arg)
- 	params[1].integer.value = INTEL_DSM_REVISION_ID;
- 	params[2].type = ACPI_TYPE_INTEGER;
- 	params[2].integer.value = func;
--	params[3].type = ACPI_TYPE_INTEGER;
--	params[3].integer.value = arg;
-+	params[3].type = ACPI_TYPE_PACKAGE;
-+	params[3].package.count = 0;
-+	params[3].package.elements = NULL;
- 
- 	ret = acpi_evaluate_object(handle, "_DSM", &input, &output);
- 	if (ret) {
-@@ -151,8 +152,9 @@ static void intel_dsm_platform_mux_info(void)
- 	params[1].integer.value = INTEL_DSM_REVISION_ID;
- 	params[2].type = ACPI_TYPE_INTEGER;
- 	params[2].integer.value = INTEL_DSM_FN_PLATFORM_MUX_INFO;
--	params[3].type = ACPI_TYPE_INTEGER;
--	params[3].integer.value = 0;
-+	params[3].type = ACPI_TYPE_PACKAGE;
-+	params[3].package.count = 0;
-+	params[3].package.elements = NULL;
- 
- 	ret = acpi_evaluate_object(intel_dsm_priv.dhandle, "_DSM", &input,
- 				   &output);
-@@ -205,7 +207,7 @@ static bool intel_dsm_pci_probe(struct pci_dev *pdev)
- 		return false;
- 	}
- 
--	ret = intel_dsm(dhandle, INTEL_DSM_FN_SUPPORTED_FUNCTIONS, 0);
-+	ret = intel_dsm(dhandle, INTEL_DSM_FN_SUPPORTED_FUNCTIONS);
- 	if (ret < 0) {
- 		DRM_DEBUG_KMS("failed to get supported _DSM functions\n");
- 		return false;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0571-drm-i915-hsw-Change-default-LLC-age-to-3.patch b/patches.baytrail/0571-drm-i915-hsw-Change-default-LLC-age-to-3.patch
deleted file mode 100644
index 055b04cea4350..0000000000000
--- a/patches.baytrail/0571-drm-i915-hsw-Change-default-LLC-age-to-3.patch
+++ /dev/null
@@ -1,69 +0,0 @@
-From 7809753376f1dbacf3b24318baf0a90cb40908a8 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Sun, 4 Aug 2013 23:47:29 -0700
-Subject: drm/i915/hsw: Change default LLC age to 3
-
-The default LLC age was changed:
-commit 0d8ff15e9a15f2b393e53337a107b7a1e5919b6d
-Author: Ben Widawsky <benjamin.widawsky@intel.com>
-Date:   Thu Jul 4 11:02:03 2013 -0700
-
-drm/i915/hsw: Set correct Haswell PTE encodings.
-
-On the surface it would seem setting a default age wouldn't matter
-because all GEM BOs are aged similarly, so the order in which objects
-are evicted would not be subject to aging. The current working theory as
-to why this caused a regression though is that LLC is a bit special in
-that it is shared with the CPU. Presumably (not verified) the CPU
-fetches cachelines with age 3, and therefore recently cached GPU objects
-would be evicted before similar CPU object first when the LLC is full.
-It stands to reason therefore that this would negatively impact CPU
-bound benchmarks - but those seem to be low on the priority list.
-
-eLLC OTOH does not have this same property as LLC. It should be used
-entirely for the GPU, and so the age really shouldn't matter.
-Furthermore, we have no evidence to suggest one is better than another
-on eLLC. Since we've never properly supported eLLC before no, there
-should be no regression. If the GPU client really wants "younger"
-objects, they should use MOCS.
-
-v2: Drop the extra #define (Chad)
-
-v3: Actually git add
-
-v4: Pimped commit message
-
-Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67062
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 87a6b688ccc78b2c54bee56879c6d195d2457ebe)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem_gtt.c | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
-index e7b420495516..3e7f1242af91 100644
---- a/drivers/gpu/drm/i915/i915_gem_gtt.c
-+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
-@@ -52,6 +52,7 @@
-  */
- #define HSW_CACHEABILITY_CONTROL(bits)	((((bits) & 0x7) << 1) | \
- 					 (((bits) & 0x8) << (11 - 3)))
-+#define HSW_WB_LLC_AGE3			HSW_CACHEABILITY_CONTROL(0x2)
- #define HSW_WB_LLC_AGE0			HSW_CACHEABILITY_CONTROL(0x3)
- #define HSW_WB_ELLC_LLC_AGE0		HSW_CACHEABILITY_CONTROL(0xb)
- 
-@@ -105,7 +106,7 @@ static gen6_gtt_pte_t hsw_pte_encode(dma_addr_t addr,
- 	pte |= HSW_PTE_ADDR_ENCODE(addr);
- 
- 	if (level != I915_CACHE_NONE)
--		pte |= HSW_WB_LLC_AGE0;
-+		pte |= HSW_WB_LLC_AGE3;
- 
- 	return pte;
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0572-drm-i915-Create-an-init-vm.patch b/patches.baytrail/0572-drm-i915-Create-an-init-vm.patch
deleted file mode 100644
index 093c272ac38a3..0000000000000
--- a/patches.baytrail/0572-drm-i915-Create-an-init-vm.patch
+++ /dev/null
@@ -1,63 +0,0 @@
-From 6b9875e68984ff9b2be13ad1c97506da6f951fba Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Wed, 31 Jul 2013 16:59:54 -0700
-Subject: drm/i915: Create an init vm
-
-Move all the similar address space (VM) initialization code to one
-function. Until we have multiple VMs, there should only ever be 1 VM.
-The aliasing ppgtt is a special case without it's own VM (since it
-doesn't need it's own address space management).
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit fc8c067eee712b274e554be5cc87c79366cc5ad2)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_dma.c |    4 ----
- drivers/gpu/drm/i915/i915_gem.c |   15 +++++++++++++--
- 2 files changed, 13 insertions(+), 6 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_dma.c
-+++ b/drivers/gpu/drm/i915/i915_dma.c
-@@ -1493,10 +1493,6 @@ int i915_driver_load(struct drm_device *
- 
- 	i915_dump_device_info(dev_priv);
- 
--	INIT_LIST_HEAD(&dev_priv->vm_list);
--	INIT_LIST_HEAD(&dev_priv->gtt.base.global_link);
--	list_add(&dev_priv->gtt.base.global_link, &dev_priv->vm_list);
--
- 	if (i915_get_bridge_dev(dev)) {
- 		ret = -EIO;
- 		goto free_priv;
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -4334,6 +4334,16 @@ init_ring_lists(struct intel_ring_buffer
- 	INIT_LIST_HEAD(&ring->request_list);
- }
- 
-+static void i915_init_vm(struct drm_i915_private *dev_priv,
-+			 struct i915_address_space *vm)
-+{
-+	vm->dev = dev_priv->dev;
-+	INIT_LIST_HEAD(&vm->active_list);
-+	INIT_LIST_HEAD(&vm->inactive_list);
-+	INIT_LIST_HEAD(&vm->global_link);
-+	list_add(&vm->global_link, &dev_priv->vm_list);
-+}
-+
- void
- i915_gem_load(struct drm_device *dev)
- {
-@@ -4346,8 +4356,9 @@ i915_gem_load(struct drm_device *dev)
- 				  SLAB_HWCACHE_ALIGN,
- 				  NULL);
- 
--	INIT_LIST_HEAD(&dev_priv->gtt.base.active_list);
--	INIT_LIST_HEAD(&dev_priv->gtt.base.inactive_list);
-+	INIT_LIST_HEAD(&dev_priv->vm_list);
-+	i915_init_vm(dev_priv, &dev_priv->gtt.base);
-+
- 	INIT_LIST_HEAD(&dev_priv->mm.unbound_list);
- 	INIT_LIST_HEAD(&dev_priv->mm.bound_list);
- 	INIT_LIST_HEAD(&dev_priv->mm.fence_list);
diff --git a/patches.baytrail/0573-drm-i915-Rework-drop-caches-for-checkpatch.patch b/patches.baytrail/0573-drm-i915-Rework-drop-caches-for-checkpatch.patch
deleted file mode 100644
index 76b358eab6491..0000000000000
--- a/patches.baytrail/0573-drm-i915-Rework-drop-caches-for-checkpatch.patch
+++ /dev/null
@@ -1,48 +0,0 @@
-From 21ed6373813736ade99edab76808d6c611757a08 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Wed, 31 Jul 2013 16:59:55 -0700
-Subject: drm/i915: Rework drop caches for checkpatch
-
-With an upcoming change to bind, to make checkpatch happy and keep the
-code clean, we need to rework this code a bit.
-
-This should have no functional impact.
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-[danvet: Add the newline Chris requested.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 31a46c9c092afc6558e7be7eaa42eb9bd4d3de8b)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_debugfs.c | 14 ++++++++------
- 1 file changed, 8 insertions(+), 6 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
-index eed2f4ca9a76..04debcedac2d 100644
---- a/drivers/gpu/drm/i915/i915_debugfs.c
-+++ b/drivers/gpu/drm/i915/i915_debugfs.c
-@@ -1784,12 +1784,14 @@ i915_drop_caches_set(void *data, u64 val)
- 
- 	if (val & DROP_BOUND) {
- 		list_for_each_entry_safe(obj, next, &vm->inactive_list,
--					 mm_list)
--			if (obj->pin_count == 0) {
--				ret = i915_gem_object_unbind(obj);
--				if (ret)
--					goto unlock;
--			}
-+					 mm_list) {
-+			if (obj->pin_count)
-+				continue;
-+
-+			ret = i915_gem_object_unbind(obj);
-+			if (ret)
-+				goto unlock;
-+		}
- 	}
- 
- 	if (val & DROP_UNBOUND) {
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0574-drm-i915-Make-proper-functions-for-VMs.patch b/patches.baytrail/0574-drm-i915-Make-proper-functions-for-VMs.patch
deleted file mode 100644
index 2af190e5e1c39..0000000000000
--- a/patches.baytrail/0574-drm-i915-Make-proper-functions-for-VMs.patch
+++ /dev/null
@@ -1,283 +0,0 @@
-From 57f6bf0985349cc6e143765725575c1776e0883a Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Wed, 31 Jul 2013 16:59:56 -0700
-Subject: drm/i915: Make proper functions for VMs
-
-Earlier in the conversion sequence we attempted to quickly wedge in the
-transitional interface as static inlines.
-
-Now that we're sure these interfaces are sane, for easier debug and to
-decrease code size (since many of these functions may be called quite a
-bit), make them real functions
-
-While at it, kill off the set_color interface. We'll always have the
-VMA, or easily get to it.
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit a70a3148b0c61cb7c588ea650db785b261b378a3)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h       | 83 ++++++++++++++++-------------------
- drivers/gpu/drm/i915/i915_gem.c       | 78 ++++++++++++++++++++++++++++++--
- drivers/gpu/drm/i915/i915_gem_evict.c |  8 ++--
- drivers/gpu/drm/i915/i915_gem_gtt.c   |  2 +-
- 4 files changed, 118 insertions(+), 53 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index bb7d0ba5589b..5fe98c572ba3 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1393,52 +1393,6 @@ struct drm_i915_gem_object {
- 
- #define to_intel_bo(x) container_of(x, struct drm_i915_gem_object, base)
- 
--/* This is a temporary define to help transition us to real VMAs. If you see
-- * this, you're either reviewing code, or bisecting it. */
--static inline struct i915_vma *
--__i915_gem_obj_to_vma(struct drm_i915_gem_object *obj)
--{
--	if (list_empty(&obj->vma_list))
--		return NULL;
--	return list_first_entry(&obj->vma_list, struct i915_vma, vma_link);
--}
--
--/* Whether or not this object is currently mapped by the translation tables */
--static inline bool
--i915_gem_obj_ggtt_bound(struct drm_i915_gem_object *o)
--{
--	struct i915_vma *vma = __i915_gem_obj_to_vma(o);
--	if (vma == NULL)
--		return false;
--	return drm_mm_node_allocated(&vma->node);
--}
--
--/* Offset of the first PTE pointing to this object */
--static inline unsigned long
--i915_gem_obj_ggtt_offset(struct drm_i915_gem_object *o)
--{
--	BUG_ON(list_empty(&o->vma_list));
--	return __i915_gem_obj_to_vma(o)->node.start;
--}
--
--/* The size used in the translation tables may be larger than the actual size of
-- * the object on GEN2/GEN3 because of the way tiling is handled. See
-- * i915_gem_get_gtt_size() for more details.
-- */
--static inline unsigned long
--i915_gem_obj_ggtt_size(struct drm_i915_gem_object *o)
--{
--	BUG_ON(list_empty(&o->vma_list));
--	return __i915_gem_obj_to_vma(o)->node.size;
--}
--
--static inline void
--i915_gem_obj_ggtt_set_color(struct drm_i915_gem_object *o,
--			    enum i915_cache_level color)
--{
--	__i915_gem_obj_to_vma(o)->node.color = color;
--}
--
- /**
-  * Request queue structure.
-  *
-@@ -1907,6 +1861,43 @@ struct dma_buf *i915_gem_prime_export(struct drm_device *dev,
- 
- void i915_gem_restore_fences(struct drm_device *dev);
- 
-+unsigned long i915_gem_obj_offset(struct drm_i915_gem_object *o,
-+				  struct i915_address_space *vm);
-+bool i915_gem_obj_bound_any(struct drm_i915_gem_object *o);
-+bool i915_gem_obj_bound(struct drm_i915_gem_object *o,
-+			struct i915_address_space *vm);
-+unsigned long i915_gem_obj_size(struct drm_i915_gem_object *o,
-+				struct i915_address_space *vm);
-+struct i915_vma *i915_gem_obj_to_vma(struct drm_i915_gem_object *obj,
-+				     struct i915_address_space *vm);
-+/* Some GGTT VM helpers */
-+#define obj_to_ggtt(obj) \
-+	(&((struct drm_i915_private *)(obj)->base.dev->dev_private)->gtt.base)
-+static inline bool i915_is_ggtt(struct i915_address_space *vm)
-+{
-+	struct i915_address_space *ggtt =
-+		&((struct drm_i915_private *)(vm)->dev->dev_private)->gtt.base;
-+	return vm == ggtt;
-+}
-+
-+static inline bool i915_gem_obj_ggtt_bound(struct drm_i915_gem_object *obj)
-+{
-+	return i915_gem_obj_bound(obj, obj_to_ggtt(obj));
-+}
-+
-+static inline unsigned long
-+i915_gem_obj_ggtt_offset(struct drm_i915_gem_object *obj)
-+{
-+	return i915_gem_obj_offset(obj, obj_to_ggtt(obj));
-+}
-+
-+static inline unsigned long
-+i915_gem_obj_ggtt_size(struct drm_i915_gem_object *obj)
-+{
-+	return i915_gem_obj_size(obj, obj_to_ggtt(obj));
-+}
-+#undef obj_to_ggtt
-+
- /* i915_gem_context.c */
- void i915_gem_context_init(struct drm_device *dev);
- void i915_gem_context_fini(struct drm_device *dev);
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index 8f9ee89ed971..f99fffb61b8a 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -2625,7 +2625,7 @@ i915_gem_object_unbind(struct drm_i915_gem_object *obj)
- 	/* Avoid an unnecessary call to unbind on rebind. */
- 	obj->map_and_fenceable = true;
- 
--	vma = __i915_gem_obj_to_vma(obj);
-+	vma = i915_gem_obj_to_vma(obj, &dev_priv->gtt.base);
- 	list_del(&vma->vma_link);
- 	drm_mm_remove_node(&vma->node);
- 	i915_gem_vma_destroy(vma);
-@@ -3313,7 +3313,7 @@ int i915_gem_object_set_cache_level(struct drm_i915_gem_object *obj,
- {
- 	struct drm_device *dev = obj->base.dev;
- 	drm_i915_private_t *dev_priv = dev->dev_private;
--	struct i915_vma *vma = __i915_gem_obj_to_vma(obj);
-+	struct i915_vma *vma = i915_gem_obj_to_vma(obj, &dev_priv->gtt.base);
- 	int ret;
- 
- 	if (obj->cache_level == cache_level)
-@@ -3353,7 +3353,7 @@ int i915_gem_object_set_cache_level(struct drm_i915_gem_object *obj,
- 			i915_ppgtt_bind_object(dev_priv->mm.aliasing_ppgtt,
- 					       obj, cache_level);
- 
--		i915_gem_obj_ggtt_set_color(obj, cache_level);
-+		i915_gem_obj_to_vma(obj, &dev_priv->gtt.base)->node.color = cache_level;
- 	}
- 
- 	if (cache_level == I915_CACHE_NONE) {
-@@ -4666,3 +4666,75 @@ i915_gem_inactive_shrink(struct shrinker *shrinker, struct shrink_control *sc)
- 		mutex_unlock(&dev->struct_mutex);
- 	return cnt;
- }
-+
-+/* All the new VM stuff */
-+unsigned long i915_gem_obj_offset(struct drm_i915_gem_object *o,
-+				  struct i915_address_space *vm)
-+{
-+	struct drm_i915_private *dev_priv = o->base.dev->dev_private;
-+	struct i915_vma *vma;
-+
-+	if (vm == &dev_priv->mm.aliasing_ppgtt->base)
-+		vm = &dev_priv->gtt.base;
-+
-+	BUG_ON(list_empty(&o->vma_list));
-+	list_for_each_entry(vma, &o->vma_list, vma_link) {
-+		if (vma->vm == vm)
-+			return vma->node.start;
-+
-+	}
-+	return -1;
-+}
-+
-+bool i915_gem_obj_bound(struct drm_i915_gem_object *o,
-+			struct i915_address_space *vm)
-+{
-+	struct i915_vma *vma;
-+
-+	list_for_each_entry(vma, &o->vma_list, vma_link)
-+		if (vma->vm == vm)
-+			return true;
-+
-+	return false;
-+}
-+
-+bool i915_gem_obj_bound_any(struct drm_i915_gem_object *o)
-+{
-+	struct drm_i915_private *dev_priv = o->base.dev->dev_private;
-+	struct i915_address_space *vm;
-+
-+	list_for_each_entry(vm, &dev_priv->vm_list, global_link)
-+		if (i915_gem_obj_bound(o, vm))
-+			return true;
-+
-+	return false;
-+}
-+
-+unsigned long i915_gem_obj_size(struct drm_i915_gem_object *o,
-+				struct i915_address_space *vm)
-+{
-+	struct drm_i915_private *dev_priv = o->base.dev->dev_private;
-+	struct i915_vma *vma;
-+
-+	if (vm == &dev_priv->mm.aliasing_ppgtt->base)
-+		vm = &dev_priv->gtt.base;
-+
-+	BUG_ON(list_empty(&o->vma_list));
-+
-+	list_for_each_entry(vma, &o->vma_list, vma_link)
-+		if (vma->vm == vm)
-+			return vma->node.size;
-+
-+	return 0;
-+}
-+
-+struct i915_vma *i915_gem_obj_to_vma(struct drm_i915_gem_object *obj,
-+				     struct i915_address_space *vm)
-+{
-+	struct i915_vma *vma;
-+	list_for_each_entry(vma, &obj->vma_list, vma_link)
-+		if (vma->vm == vm)
-+			return vma;
-+
-+	return NULL;
-+}
-diff --git a/drivers/gpu/drm/i915/i915_gem_evict.c b/drivers/gpu/drm/i915/i915_gem_evict.c
-index df61f338dea1..33d85a4447a6 100644
---- a/drivers/gpu/drm/i915/i915_gem_evict.c
-+++ b/drivers/gpu/drm/i915/i915_gem_evict.c
-@@ -34,7 +34,9 @@
- static bool
- mark_free(struct drm_i915_gem_object *obj, struct list_head *unwind)
- {
--	struct i915_vma *vma = __i915_gem_obj_to_vma(obj);
-+	struct drm_device *dev = obj->base.dev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct i915_vma *vma = i915_gem_obj_to_vma(obj, &dev_priv->gtt.base);
- 
- 	if (obj->pin_count)
- 		return false;
-@@ -109,7 +111,7 @@ none:
- 		obj = list_first_entry(&unwind_list,
- 				       struct drm_i915_gem_object,
- 				       exec_list);
--		vma = __i915_gem_obj_to_vma(obj);
-+		vma = i915_gem_obj_to_vma(obj, &dev_priv->gtt.base);
- 		ret = drm_mm_scan_remove_block(&vma->node);
- 		BUG_ON(ret);
- 
-@@ -130,7 +132,7 @@ found:
- 		obj = list_first_entry(&unwind_list,
- 				       struct drm_i915_gem_object,
- 				       exec_list);
--		vma = __i915_gem_obj_to_vma(obj);
-+		vma = i915_gem_obj_to_vma(obj, &dev_priv->gtt.base);
- 		if (drm_mm_scan_remove_block(&vma->node)) {
- 			list_move(&obj->exec_list, &eviction_list);
- 			drm_gem_object_reference(&obj->base);
-diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
-index 3e7f1242af91..90a276e35909 100644
---- a/drivers/gpu/drm/i915/i915_gem_gtt.c
-+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
-@@ -657,7 +657,7 @@ void i915_gem_setup_global_gtt(struct drm_device *dev,
- 
- 	/* Mark any preallocated objects as occupied */
- 	list_for_each_entry(obj, &dev_priv->mm.bound_list, global_list) {
--		struct i915_vma *vma = __i915_gem_obj_to_vma(obj);
-+		struct i915_vma *vma = i915_gem_obj_to_vma(obj, &dev_priv->gtt.base);
- 		int ret;
- 		DRM_DEBUG_KMS("reserving preallocated space: %lx + %zx\n",
- 			      i915_gem_obj_ggtt_offset(obj), obj->base.size);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0575-drm-i915-Use-bound-list-for-inactive-shrink.patch b/patches.baytrail/0575-drm-i915-Use-bound-list-for-inactive-shrink.patch
deleted file mode 100644
index 7ff2c8b913b8c..0000000000000
--- a/patches.baytrail/0575-drm-i915-Use-bound-list-for-inactive-shrink.patch
+++ /dev/null
@@ -1,51 +0,0 @@
-From 815cd2437d7f2b92b87d70c4dc2f28fb4c69430d Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Wed, 31 Jul 2013 16:59:57 -0700
-Subject: drm/i915: Use bound list for inactive shrink
-
-Do to the move active/inactive lists, it no longer makes sense to use
-them for shrinking, since shrinking isn't VM specific (such a need may
-also exist, but doesn't yet).
-
-What we can do instead is use the global bound list to find all objects
-which aren't active.
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit fcb4a57805e04dee04f736c25a5648ec7bebe30f)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem.c | 8 ++++++--
- 1 file changed, 6 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index f99fffb61b8a..c7e0db1ff8f5 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -4629,7 +4629,6 @@ i915_gem_inactive_shrink(struct shrinker *shrinker, struct shrink_control *sc)
- 			     struct drm_i915_private,
- 			     mm.inactive_shrinker);
- 	struct drm_device *dev = dev_priv->dev;
--	struct i915_address_space *vm = &dev_priv->gtt.base;
- 	struct drm_i915_gem_object *obj;
- 	int nr_to_scan = sc->nr_to_scan;
- 	bool unlock = true;
-@@ -4658,9 +4657,14 @@ i915_gem_inactive_shrink(struct shrinker *shrinker, struct shrink_control *sc)
- 	list_for_each_entry(obj, &dev_priv->mm.unbound_list, global_list)
- 		if (obj->pages_pin_count == 0)
- 			cnt += obj->base.size >> PAGE_SHIFT;
--	list_for_each_entry(obj, &vm->inactive_list, mm_list)
-+
-+	list_for_each_entry(obj, &dev_priv->mm.bound_list, global_list) {
-+		if (obj->active)
-+			continue;
-+
- 		if (obj->pin_count == 0 && obj->pages_pin_count == 0)
- 			cnt += obj->base.size >> PAGE_SHIFT;
-+	}
- 
- 	if (unlock)
- 		mutex_unlock(&dev->struct_mutex);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0576-drm-i915-Add-VM-to-pin.patch b/patches.baytrail/0576-drm-i915-Add-VM-to-pin.patch
deleted file mode 100644
index 50265e43f8962..0000000000000
--- a/patches.baytrail/0576-drm-i915-Add-VM-to-pin.patch
+++ /dev/null
@@ -1,194 +0,0 @@
-From 1895dade01f62a6396dd2f4735ef61d26785fda0 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Wed, 31 Jul 2013 16:59:58 -0700
-Subject: drm/i915: Add VM to pin
-
-To verbalize it, one can say, "pin an object into the given address
-space." The semantics of pinning remain the same otherwise.
-
-Certain objects will always have to be bound into the global GTT.
-Therefore, global GTT is a special case, and keep a special interface
-around for it (i915_gem_obj_ggtt_pin).
-
-v2: s/i915_gem_ggtt_pin/i915_gem_obj_ggtt_pin
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit c37e22046148971a35a89931aa1f951bb99d5514)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h            |   11 +++++++++++
- drivers/gpu/drm/i915/i915_gem.c            |    9 +++++----
- drivers/gpu/drm/i915/i915_gem_context.c    |    4 ++--
- drivers/gpu/drm/i915/i915_gem_execbuffer.c |    4 +++-
- drivers/gpu/drm/i915/intel_overlay.c       |    2 +-
- drivers/gpu/drm/i915/intel_pm.c            |    2 +-
- drivers/gpu/drm/i915/intel_ringbuffer.c    |    8 ++++----
- 7 files changed, 27 insertions(+), 13 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1711,6 +1711,7 @@ struct i915_vma *i915_gem_vma_create(str
- void i915_gem_vma_destroy(struct i915_vma *vma);
- 
- int __must_check i915_gem_object_pin(struct drm_i915_gem_object *obj,
-+				     struct i915_address_space *vm,
- 				     uint32_t alignment,
- 				     bool map_and_fenceable,
- 				     bool nonblocking);
-@@ -1896,6 +1897,16 @@ i915_gem_obj_ggtt_size(struct drm_i915_g
- {
- 	return i915_gem_obj_size(obj, obj_to_ggtt(obj));
- }
-+
-+static inline int __must_check
-+i915_gem_obj_ggtt_pin(struct drm_i915_gem_object *obj,
-+		      uint32_t alignment,
-+		      bool map_and_fenceable,
-+		      bool nonblocking)
-+{
-+	return i915_gem_object_pin(obj, obj_to_ggtt(obj), alignment,
-+				   map_and_fenceable, nonblocking);
-+}
- #undef obj_to_ggtt
- 
- /* i915_gem_context.c */
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -593,7 +593,7 @@ i915_gem_gtt_pwrite_fast(struct drm_devi
- 	char __user *user_data;
- 	int page_offset, page_length, ret;
- 
--	ret = i915_gem_object_pin(obj, 0, true, true);
-+	ret = i915_gem_obj_ggtt_pin(obj, 0, true, true);
- 	if (ret)
- 		goto out;
- 
-@@ -1347,7 +1347,7 @@ int i915_gem_fault(struct vm_area_struct
- 	}
- 
- 	/* Now bind it into the GTT if needed */
--	ret = i915_gem_object_pin(obj, 0, true, false);
-+	ret = i915_gem_obj_ggtt_pin(obj,  0, true, false);
- 	if (ret)
- 		goto unlock;
- 
-@@ -3482,7 +3482,7 @@ i915_gem_object_pin_to_display_plane(str
- 	 * (e.g. libkms for the bootup splash), we have to ensure that we
- 	 * always use map_and_fenceable for all scanout buffers.
- 	 */
--	ret = i915_gem_object_pin(obj, alignment, true, false);
-+	ret = i915_gem_obj_ggtt_pin(obj, alignment, true, false);
- 	if (ret)
- 		return ret;
- 
-@@ -3625,6 +3625,7 @@ i915_gem_ring_throttle(struct drm_device
- 
- int
- i915_gem_object_pin(struct drm_i915_gem_object *obj,
-+		    struct i915_address_space *vm,
- 		    uint32_t alignment,
- 		    bool map_and_fenceable,
- 		    bool nonblocking)
-@@ -3714,7 +3715,7 @@ i915_gem_pin_ioctl(struct drm_device *de
- 	}
- 
- 	if (obj->user_pin_count == 0) {
--		ret = i915_gem_object_pin(obj, args->alignment, true, false);
-+		ret = i915_gem_obj_ggtt_pin(obj, args->alignment, true, false);
- 		if (ret)
- 			goto out;
- 	}
---- a/drivers/gpu/drm/i915/i915_gem_context.c
-+++ b/drivers/gpu/drm/i915/i915_gem_context.c
-@@ -214,7 +214,7 @@ static int create_default_context(struct
- 	 * default context.
- 	 */
- 	dev_priv->ring[RCS].default_context = ctx;
--	ret = i915_gem_object_pin(ctx->obj, CONTEXT_ALIGN, false, false);
-+	ret = i915_gem_obj_ggtt_pin(ctx->obj, CONTEXT_ALIGN, false, false);
- 	if (ret) {
- 		DRM_DEBUG_DRIVER("Couldn't pin %d\n", ret);
- 		goto err_destroy;
-@@ -398,7 +398,7 @@ static int do_switch(struct i915_hw_cont
- 	if (from == to)
- 		return 0;
- 
--	ret = i915_gem_object_pin(to->obj, CONTEXT_ALIGN, false, false);
-+	ret = i915_gem_obj_ggtt_pin(to->obj, CONTEXT_ALIGN, false, false);
- 	if (ret)
- 		return ret;
- 
---- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-@@ -409,7 +409,9 @@ i915_gem_execbuffer_reserve_object(struc
- 		obj->tiling_mode != I915_TILING_NONE;
- 	need_mappable = need_fence || need_reloc_mappable(obj);
- 
--	ret = i915_gem_object_pin(obj, entry->alignment, need_mappable, false);
-+	/* FIXME: vm plubming */
-+	ret = i915_gem_object_pin(obj, &dev_priv->gtt.base, entry->alignment,
-+				  need_mappable, false);
- 	if (ret)
- 		return ret;
- 
---- a/drivers/gpu/drm/i915/intel_overlay.c
-+++ b/drivers/gpu/drm/i915/intel_overlay.c
-@@ -1352,7 +1352,7 @@ void intel_setup_overlay(struct drm_devi
- 		}
- 		overlay->flip_addr = reg_bo->phys_obj->handle->busaddr;
- 	} else {
--		ret = i915_gem_object_pin(reg_bo, PAGE_SIZE, true, false);
-+		ret = i915_gem_obj_ggtt_pin(reg_bo, PAGE_SIZE, true, false);
- 		if (ret) {
- 			DRM_ERROR("failed to pin overlay register bo\n");
- 			goto out_free_bo;
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2886,7 +2886,7 @@ intel_alloc_context_page(struct drm_devi
- 		return NULL;
- 	}
- 
--	ret = i915_gem_object_pin(ctx, 4096, true, false);
-+	ret = i915_gem_obj_ggtt_pin(ctx, 4096, true, false);
- 	if (ret) {
- 		DRM_ERROR("failed to pin power context: %d\n", ret);
- 		goto err_unref;
---- a/drivers/gpu/drm/i915/intel_ringbuffer.c
-+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
-@@ -501,7 +501,7 @@ init_pipe_control(struct intel_ring_buff
- 
- 	i915_gem_object_set_cache_level(obj, I915_CACHE_LLC);
- 
--	ret = i915_gem_object_pin(obj, 4096, true, false);
-+	ret = i915_gem_obj_ggtt_pin(obj, 4096, true, false);
- 	if (ret)
- 		goto err_unref;
- 
-@@ -1236,7 +1236,7 @@ static int init_status_page(struct intel
- 
- 	i915_gem_object_set_cache_level(obj, I915_CACHE_LLC);
- 
--	ret = i915_gem_object_pin(obj, 4096, true, false);
-+	ret = i915_gem_obj_ggtt_pin(obj, 4096, true, false);
- 	if (ret != 0) {
- 		goto err_unref;
- 	}
-@@ -1319,7 +1319,7 @@ static int intel_init_ring_buffer(struct
- 
- 	ring->obj = obj;
- 
--	ret = i915_gem_object_pin(obj, PAGE_SIZE, true, false);
-+	ret = i915_gem_obj_ggtt_pin(obj, PAGE_SIZE, true, false);
- 	if (ret)
- 		goto err_unref;
- 
-@@ -1844,7 +1844,7 @@ int intel_init_render_ring_buffer(struct
- 			return -ENOMEM;
- 		}
- 
--		ret = i915_gem_object_pin(obj, 0, true, false);
-+		ret = i915_gem_obj_ggtt_pin(obj, 0, true, false);
- 		if (ret != 0) {
- 			drm_gem_object_unreference(&obj->base);
- 			DRM_ERROR("Failed to ping batch bo\n");
diff --git a/patches.baytrail/0577-drm-i915-Use-ggtt_vm-to-save-some-typing.patch b/patches.baytrail/0577-drm-i915-Use-ggtt_vm-to-save-some-typing.patch
deleted file mode 100644
index c59a9f56b8a6a..0000000000000
--- a/patches.baytrail/0577-drm-i915-Use-ggtt_vm-to-save-some-typing.patch
+++ /dev/null
@@ -1,122 +0,0 @@
-From fa7f50823f9bb75a1e7239eb785370c6f098e5cd Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Wed, 31 Jul 2013 16:59:59 -0700
-Subject: drm/i915: Use ggtt_vm to save some typing
-
-Just some small cleanups, and a rename of vm->ggtt_vm requested by
-Daniel.
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 40d74980d3ada5ad76e333dfcc87645f3f7e9820)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem_gtt.c    | 19 ++++++++-----------
- drivers/gpu/drm/i915/i915_gem_stolen.c | 10 +++++-----
- 2 files changed, 13 insertions(+), 16 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
-index 90a276e35909..f38cc696be7f 100644
---- a/drivers/gpu/drm/i915/i915_gem_gtt.c
-+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
-@@ -643,7 +643,8 @@ void i915_gem_setup_global_gtt(struct drm_device *dev,
- 	 * aperture.  One page should be enough to keep any prefetching inside
- 	 * of the aperture.
- 	 */
--	drm_i915_private_t *dev_priv = dev->dev_private;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct i915_address_space *ggtt_vm = &dev_priv->gtt.base;
- 	struct drm_mm_node *entry;
- 	struct drm_i915_gem_object *obj;
- 	unsigned long hole_start, hole_end;
-@@ -651,19 +652,19 @@ void i915_gem_setup_global_gtt(struct drm_device *dev,
- 	BUG_ON(mappable_end > end);
- 
- 	/* Subtract the guard page ... */
--	drm_mm_init(&dev_priv->gtt.base.mm, start, end - start - PAGE_SIZE);
-+	drm_mm_init(&ggtt_vm->mm, start, end - start - PAGE_SIZE);
- 	if (!HAS_LLC(dev))
- 		dev_priv->gtt.base.mm.color_adjust = i915_gtt_color_adjust;
- 
- 	/* Mark any preallocated objects as occupied */
- 	list_for_each_entry(obj, &dev_priv->mm.bound_list, global_list) {
--		struct i915_vma *vma = i915_gem_obj_to_vma(obj, &dev_priv->gtt.base);
-+		struct i915_vma *vma = i915_gem_obj_to_vma(obj, ggtt_vm);
- 		int ret;
- 		DRM_DEBUG_KMS("reserving preallocated space: %lx + %zx\n",
- 			      i915_gem_obj_ggtt_offset(obj), obj->base.size);
- 
- 		WARN_ON(i915_gem_obj_ggtt_bound(obj));
--		ret = drm_mm_reserve_node(&dev_priv->gtt.base.mm, &vma->node);
-+		ret = drm_mm_reserve_node(&ggtt_vm->mm, &vma->node);
- 		if (ret)
- 			DRM_DEBUG_KMS("Reservation failed\n");
- 		obj->has_global_gtt_mapping = 1;
-@@ -674,19 +675,15 @@ void i915_gem_setup_global_gtt(struct drm_device *dev,
- 	dev_priv->gtt.base.total = end - start;
- 
- 	/* Clear any non-preallocated blocks */
--	drm_mm_for_each_hole(entry, &dev_priv->gtt.base.mm,
--			     hole_start, hole_end) {
-+	drm_mm_for_each_hole(entry, &ggtt_vm->mm, hole_start, hole_end) {
- 		const unsigned long count = (hole_end - hole_start) / PAGE_SIZE;
- 		DRM_DEBUG_KMS("clearing unused GTT space: [%lx, %lx]\n",
- 			      hole_start, hole_end);
--		dev_priv->gtt.base.clear_range(&dev_priv->gtt.base,
--					       hole_start / PAGE_SIZE,
--					       count);
-+		ggtt_vm->clear_range(ggtt_vm, hole_start / PAGE_SIZE, count);
- 	}
- 
- 	/* And finally clear the reserved guard page */
--	dev_priv->gtt.base.clear_range(&dev_priv->gtt.base,
--				       end / PAGE_SIZE - 1, 1);
-+	ggtt_vm->clear_range(ggtt_vm, end / PAGE_SIZE - 1, 1);
- }
- 
- static bool
-diff --git a/drivers/gpu/drm/i915/i915_gem_stolen.c b/drivers/gpu/drm/i915/i915_gem_stolen.c
-index cacf769c95fd..5531643136f5 100644
---- a/drivers/gpu/drm/i915/i915_gem_stolen.c
-+++ b/drivers/gpu/drm/i915/i915_gem_stolen.c
-@@ -331,7 +331,7 @@ i915_gem_object_create_stolen_for_preallocated(struct drm_device *dev,
- 					       u32 size)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
--	struct i915_address_space *vm = &dev_priv->gtt.base;
-+	struct i915_address_space *ggtt = &dev_priv->gtt.base;
- 	struct drm_i915_gem_object *obj;
- 	struct drm_mm_node *stolen;
- 	struct i915_vma *vma;
-@@ -374,7 +374,7 @@ i915_gem_object_create_stolen_for_preallocated(struct drm_device *dev,
- 	if (gtt_offset == I915_GTT_OFFSET_NONE)
- 		return obj;
- 
--	vma = i915_gem_vma_create(obj, &dev_priv->gtt.base);
-+	vma = i915_gem_vma_create(obj, ggtt);
- 	if (IS_ERR(vma)) {
- 		ret = PTR_ERR(vma);
- 		goto err_out;
-@@ -387,8 +387,8 @@ i915_gem_object_create_stolen_for_preallocated(struct drm_device *dev,
- 	 */
- 	vma->node.start = gtt_offset;
- 	vma->node.size = size;
--	if (drm_mm_initialized(&dev_priv->gtt.base.mm)) {
--		ret = drm_mm_reserve_node(&dev_priv->gtt.base.mm, &vma->node);
-+	if (drm_mm_initialized(&ggtt->mm)) {
-+		ret = drm_mm_reserve_node(&ggtt->mm, &vma->node);
- 		if (ret) {
- 			DRM_DEBUG_KMS("failed to allocate stolen GTT space\n");
- 			i915_gem_vma_destroy(vma);
-@@ -399,7 +399,7 @@ i915_gem_object_create_stolen_for_preallocated(struct drm_device *dev,
- 	obj->has_global_gtt_mapping = 1;
- 
- 	list_add_tail(&obj->global_list, &dev_priv->mm.bound_list);
--	list_add_tail(&obj->mm_list, &vm->inactive_list);
-+	list_add_tail(&obj->mm_list, &ggtt->inactive_list);
- 
- 	return obj;
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0578-drm-i915-Update-describe_obj.patch b/patches.baytrail/0578-drm-i915-Update-describe_obj.patch
deleted file mode 100644
index 863c8970addd2..0000000000000
--- a/patches.baytrail/0578-drm-i915-Update-describe_obj.patch
+++ /dev/null
@@ -1,68 +0,0 @@
-From 34004cbab5bb27341c7fedc250e77a2f9e76e9c2 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Wed, 31 Jul 2013 17:00:00 -0700
-Subject: drm/i915: Update describe_obj
-
-Make it aware of which domain it is bound into GGTT, or PPGTT.
-
-While modifying the function, add a global gtt flag to the object
-description. Global is more interesting than aliasing since aliasing is
-the default.
-
-v2: Access VMA directly for start/size instead of helpers (Daniel)
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 1d693bcc37461a66fafd13ff171c4496aee0df98)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_debugfs.c | 20 ++++++++++++++++----
- 1 file changed, 16 insertions(+), 4 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
-index 04debcedac2d..748af58b0cea 100644
---- a/drivers/gpu/drm/i915/i915_debugfs.c
-+++ b/drivers/gpu/drm/i915/i915_debugfs.c
-@@ -89,13 +89,20 @@ static const char *get_tiling_flag(struct drm_i915_gem_object *obj)
- 	}
- }
- 
-+static inline const char *get_global_flag(struct drm_i915_gem_object *obj)
-+{
-+	return obj->has_global_gtt_mapping ? "g" : " ";
-+}
-+
- static void
- describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj)
- {
--	seq_printf(m, "%pK: %s%s %8zdKiB %02x %02x %d %d %d%s%s%s",
-+	struct i915_vma *vma;
-+	seq_printf(m, "%pK: %s%s%s %8zdKiB %02x %02x %d %d %d%s%s%s",
- 		   &obj->base,
- 		   get_pin_flag(obj),
- 		   get_tiling_flag(obj),
-+		   get_global_flag(obj),
- 		   obj->base.size / 1024,
- 		   obj->base.read_domains,
- 		   obj->base.write_domain,
-@@ -111,9 +118,14 @@ describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj)
- 		seq_printf(m, " (pinned x %d)", obj->pin_count);
- 	if (obj->fence_reg != I915_FENCE_REG_NONE)
- 		seq_printf(m, " (fence: %d)", obj->fence_reg);
--	if (i915_gem_obj_ggtt_bound(obj))
--		seq_printf(m, " (gtt offset: %08lx, size: %08x)",
--			   i915_gem_obj_ggtt_offset(obj), (unsigned int)i915_gem_obj_ggtt_size(obj));
-+	list_for_each_entry(vma, &obj->vma_list, vma_link) {
-+		if (!i915_is_ggtt(vma->vm))
-+			seq_puts(m, " (pp");
-+		else
-+			seq_puts(m, " (g");
-+		seq_printf(m, "gtt offset: %08lx, size: %08lx)",
-+			   vma->node.start, vma->node.size);
-+	}
- 	if (obj->stolen)
- 		seq_printf(m, " (stolen: %08lx)", obj->stolen->start);
- 	if (obj->pin_mappable || obj->fault_mappable) {
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0579-drm-i915-thread-address-space-through-execbuf.patch b/patches.baytrail/0579-drm-i915-thread-address-space-through-execbuf.patch
deleted file mode 100644
index 65395c767b0fe..0000000000000
--- a/patches.baytrail/0579-drm-i915-thread-address-space-through-execbuf.patch
+++ /dev/null
@@ -1,302 +0,0 @@
-From df38f653b5913040aa286a391a3b3ab7964e6eb6 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Wed, 31 Jul 2013 17:00:02 -0700
-Subject: drm/i915: thread address space through execbuf
-
-This represents the first half of hooking up VMs to execbuf. Here we
-basically pass an address space all around to the different internal
-functions. It should be much more readable, and have less risk than the
-second half, which begins switching over to using VMAs instead of an
-obj,vm.
-
-The overall series echoes this style of, "add a VM, then make it smart
-later"
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-[danvet: Switch a BUG_ON to WARN_ON.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 28d6a7bfa2560cb94727a68511ed68561e84dcc8)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem_execbuffer.c | 77 +++++++++++++++++++-----------
- 1 file changed, 49 insertions(+), 28 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-index 7addab31783f..9939d2ef3ea9 100644
---- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-@@ -174,7 +174,8 @@ static inline int use_cpu_reloc(struct drm_i915_gem_object *obj)
- static int
- i915_gem_execbuffer_relocate_entry(struct drm_i915_gem_object *obj,
- 				   struct eb_objects *eb,
--				   struct drm_i915_gem_relocation_entry *reloc)
-+				   struct drm_i915_gem_relocation_entry *reloc,
-+				   struct i915_address_space *vm)
- {
- 	struct drm_device *dev = obj->base.dev;
- 	struct drm_gem_object *target_obj;
-@@ -297,7 +298,8 @@ i915_gem_execbuffer_relocate_entry(struct drm_i915_gem_object *obj,
- 
- static int
- i915_gem_execbuffer_relocate_object(struct drm_i915_gem_object *obj,
--				    struct eb_objects *eb)
-+				    struct eb_objects *eb,
-+				    struct i915_address_space *vm)
- {
- #define N_RELOC(x) ((x) / sizeof(struct drm_i915_gem_relocation_entry))
- 	struct drm_i915_gem_relocation_entry stack_reloc[N_RELOC(512)];
-@@ -321,7 +323,8 @@ i915_gem_execbuffer_relocate_object(struct drm_i915_gem_object *obj,
- 		do {
- 			u64 offset = r->presumed_offset;
- 
--			ret = i915_gem_execbuffer_relocate_entry(obj, eb, r);
-+			ret = i915_gem_execbuffer_relocate_entry(obj, eb, r,
-+								 vm);
- 			if (ret)
- 				return ret;
- 
-@@ -344,13 +347,15 @@ i915_gem_execbuffer_relocate_object(struct drm_i915_gem_object *obj,
- static int
- i915_gem_execbuffer_relocate_object_slow(struct drm_i915_gem_object *obj,
- 					 struct eb_objects *eb,
--					 struct drm_i915_gem_relocation_entry *relocs)
-+					 struct drm_i915_gem_relocation_entry *relocs,
-+					 struct i915_address_space *vm)
- {
- 	const struct drm_i915_gem_exec_object2 *entry = obj->exec_entry;
- 	int i, ret;
- 
- 	for (i = 0; i < entry->relocation_count; i++) {
--		ret = i915_gem_execbuffer_relocate_entry(obj, eb, &relocs[i]);
-+		ret = i915_gem_execbuffer_relocate_entry(obj, eb, &relocs[i],
-+							 vm);
- 		if (ret)
- 			return ret;
- 	}
-@@ -359,7 +364,8 @@ i915_gem_execbuffer_relocate_object_slow(struct drm_i915_gem_object *obj,
- }
- 
- static int
--i915_gem_execbuffer_relocate(struct eb_objects *eb)
-+i915_gem_execbuffer_relocate(struct eb_objects *eb,
-+			     struct i915_address_space *vm)
- {
- 	struct drm_i915_gem_object *obj;
- 	int ret = 0;
-@@ -373,7 +379,7 @@ i915_gem_execbuffer_relocate(struct eb_objects *eb)
- 	 */
- 	pagefault_disable();
- 	list_for_each_entry(obj, &eb->objects, exec_list) {
--		ret = i915_gem_execbuffer_relocate_object(obj, eb);
-+		ret = i915_gem_execbuffer_relocate_object(obj, eb, vm);
- 		if (ret)
- 			break;
- 	}
-@@ -395,6 +401,7 @@ need_reloc_mappable(struct drm_i915_gem_object *obj)
- static int
- i915_gem_execbuffer_reserve_object(struct drm_i915_gem_object *obj,
- 				   struct intel_ring_buffer *ring,
-+				   struct i915_address_space *vm,
- 				   bool *need_reloc)
- {
- 	struct drm_i915_private *dev_priv = obj->base.dev->dev_private;
-@@ -409,9 +416,8 @@ i915_gem_execbuffer_reserve_object(struct drm_i915_gem_object *obj,
- 		obj->tiling_mode != I915_TILING_NONE;
- 	need_mappable = need_fence || need_reloc_mappable(obj);
- 
--	/* FIXME: vm plubming */
--	ret = i915_gem_object_pin(obj, &dev_priv->gtt.base, entry->alignment,
--				  need_mappable, false);
-+	ret = i915_gem_object_pin(obj, vm, entry->alignment, need_mappable,
-+				  false);
- 	if (ret)
- 		return ret;
- 
-@@ -438,8 +444,8 @@ i915_gem_execbuffer_reserve_object(struct drm_i915_gem_object *obj,
- 		obj->has_aliasing_ppgtt_mapping = 1;
- 	}
- 
--	if (entry->offset != i915_gem_obj_ggtt_offset(obj)) {
--		entry->offset = i915_gem_obj_ggtt_offset(obj);
-+	if (entry->offset != i915_gem_obj_offset(obj, vm)) {
-+		entry->offset = i915_gem_obj_offset(obj, vm);
- 		*need_reloc = true;
- 	}
- 
-@@ -477,6 +483,7 @@ i915_gem_execbuffer_unreserve_object(struct drm_i915_gem_object *obj)
- static int
- i915_gem_execbuffer_reserve(struct intel_ring_buffer *ring,
- 			    struct list_head *objects,
-+			    struct i915_address_space *vm,
- 			    bool *need_relocs)
- {
- 	struct drm_i915_gem_object *obj;
-@@ -531,32 +538,37 @@ i915_gem_execbuffer_reserve(struct intel_ring_buffer *ring,
- 		list_for_each_entry(obj, objects, exec_list) {
- 			struct drm_i915_gem_exec_object2 *entry = obj->exec_entry;
- 			bool need_fence, need_mappable;
-+			u32 obj_offset;
- 
--			if (!i915_gem_obj_ggtt_bound(obj))
-+			if (!i915_gem_obj_bound(obj, vm))
- 				continue;
- 
-+			obj_offset = i915_gem_obj_offset(obj, vm);
- 			need_fence =
- 				has_fenced_gpu_access &&
- 				entry->flags & EXEC_OBJECT_NEEDS_FENCE &&
- 				obj->tiling_mode != I915_TILING_NONE;
- 			need_mappable = need_fence || need_reloc_mappable(obj);
- 
-+			WARN_ON((need_mappable || need_fence) &&
-+				!i915_is_ggtt(vm));
-+
- 			if ((entry->alignment &&
--			     i915_gem_obj_ggtt_offset(obj) & (entry->alignment - 1)) ||
-+			     obj_offset & (entry->alignment - 1)) ||
- 			    (need_mappable && !obj->map_and_fenceable))
- 				ret = i915_gem_object_unbind(obj);
- 			else
--				ret = i915_gem_execbuffer_reserve_object(obj, ring, need_relocs);
-+				ret = i915_gem_execbuffer_reserve_object(obj, ring, vm, need_relocs);
- 			if (ret)
- 				goto err;
- 		}
- 
- 		/* Bind fresh objects */
- 		list_for_each_entry(obj, objects, exec_list) {
--			if (i915_gem_obj_ggtt_bound(obj))
-+			if (i915_gem_obj_bound(obj, vm))
- 				continue;
- 
--			ret = i915_gem_execbuffer_reserve_object(obj, ring, need_relocs);
-+			ret = i915_gem_execbuffer_reserve_object(obj, ring, vm, need_relocs);
- 			if (ret)
- 				goto err;
- 		}
-@@ -580,7 +592,8 @@ i915_gem_execbuffer_relocate_slow(struct drm_device *dev,
- 				  struct drm_file *file,
- 				  struct intel_ring_buffer *ring,
- 				  struct eb_objects *eb,
--				  struct drm_i915_gem_exec_object2 *exec)
-+				  struct drm_i915_gem_exec_object2 *exec,
-+				  struct i915_address_space *vm)
- {
- 	struct drm_i915_gem_relocation_entry *reloc;
- 	struct drm_i915_gem_object *obj;
-@@ -664,14 +677,15 @@ i915_gem_execbuffer_relocate_slow(struct drm_device *dev,
- 		goto err;
- 
- 	need_relocs = (args->flags & I915_EXEC_NO_RELOC) == 0;
--	ret = i915_gem_execbuffer_reserve(ring, &eb->objects, &need_relocs);
-+	ret = i915_gem_execbuffer_reserve(ring, &eb->objects, vm, &need_relocs);
- 	if (ret)
- 		goto err;
- 
- 	list_for_each_entry(obj, &eb->objects, exec_list) {
- 		int offset = obj->exec_entry - exec;
- 		ret = i915_gem_execbuffer_relocate_object_slow(obj, eb,
--							       reloc + reloc_offset[offset]);
-+							       reloc + reloc_offset[offset],
-+							       vm);
- 		if (ret)
- 			goto err;
- 	}
-@@ -772,6 +786,7 @@ validate_exec_list(struct drm_i915_gem_exec_object2 *exec,
- 
- static void
- i915_gem_execbuffer_move_to_active(struct list_head *objects,
-+				   struct i915_address_space *vm,
- 				   struct intel_ring_buffer *ring)
- {
- 	struct drm_i915_gem_object *obj;
-@@ -840,7 +855,8 @@ static int
- i915_gem_do_execbuffer(struct drm_device *dev, void *data,
- 		       struct drm_file *file,
- 		       struct drm_i915_gem_execbuffer2 *args,
--		       struct drm_i915_gem_exec_object2 *exec)
-+		       struct drm_i915_gem_exec_object2 *exec,
-+		       struct i915_address_space *vm)
- {
- 	drm_i915_private_t *dev_priv = dev->dev_private;
- 	struct eb_objects *eb;
-@@ -1002,17 +1018,17 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
- 
- 	/* Move the objects en-masse into the GTT, evicting if necessary. */
- 	need_relocs = (args->flags & I915_EXEC_NO_RELOC) == 0;
--	ret = i915_gem_execbuffer_reserve(ring, &eb->objects, &need_relocs);
-+	ret = i915_gem_execbuffer_reserve(ring, &eb->objects, vm, &need_relocs);
- 	if (ret)
- 		goto err;
- 
- 	/* The objects are in their final locations, apply the relocations. */
- 	if (need_relocs)
--		ret = i915_gem_execbuffer_relocate(eb);
-+		ret = i915_gem_execbuffer_relocate(eb, vm);
- 	if (ret) {
- 		if (ret == -EFAULT) {
- 			ret = i915_gem_execbuffer_relocate_slow(dev, args, file, ring,
--								eb, exec);
-+								eb, exec, vm);
- 			BUG_ON(!mutex_is_locked(&dev->struct_mutex));
- 		}
- 		if (ret)
-@@ -1063,7 +1079,8 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
- 			goto err;
- 	}
- 
--	exec_start = i915_gem_obj_ggtt_offset(batch_obj) + args->batch_start_offset;
-+	exec_start = i915_gem_obj_offset(batch_obj, vm) +
-+		args->batch_start_offset;
- 	exec_len = args->batch_len;
- 	if (cliprects) {
- 		for (i = 0; i < args->num_cliprects; i++) {
-@@ -1088,7 +1105,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
- 
- 	trace_i915_gem_ring_dispatch(ring, intel_ring_get_seqno(ring), flags);
- 
--	i915_gem_execbuffer_move_to_active(&eb->objects, ring);
-+	i915_gem_execbuffer_move_to_active(&eb->objects, vm, ring);
- 	i915_gem_execbuffer_retire_commands(dev, file, ring, batch_obj);
- 
- err:
-@@ -1109,6 +1126,7 @@ int
- i915_gem_execbuffer(struct drm_device *dev, void *data,
- 		    struct drm_file *file)
- {
-+	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct drm_i915_gem_execbuffer *args = data;
- 	struct drm_i915_gem_execbuffer2 exec2;
- 	struct drm_i915_gem_exec_object *exec_list = NULL;
-@@ -1164,7 +1182,8 @@ i915_gem_execbuffer(struct drm_device *dev, void *data,
- 	exec2.flags = I915_EXEC_RENDER;
- 	i915_execbuffer2_set_context_id(exec2, 0);
- 
--	ret = i915_gem_do_execbuffer(dev, data, file, &exec2, exec2_list);
-+	ret = i915_gem_do_execbuffer(dev, data, file, &exec2, exec2_list,
-+				     &dev_priv->gtt.base);
- 	if (!ret) {
- 		/* Copy the new buffer offsets back to the user's exec list. */
- 		for (i = 0; i < args->buffer_count; i++)
-@@ -1190,6 +1209,7 @@ int
- i915_gem_execbuffer2(struct drm_device *dev, void *data,
- 		     struct drm_file *file)
- {
-+	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct drm_i915_gem_execbuffer2 *args = data;
- 	struct drm_i915_gem_exec_object2 *exec2_list = NULL;
- 	int ret;
-@@ -1220,7 +1240,8 @@ i915_gem_execbuffer2(struct drm_device *dev, void *data,
- 		return -EFAULT;
- 	}
- 
--	ret = i915_gem_do_execbuffer(dev, data, file, args, exec2_list);
-+	ret = i915_gem_do_execbuffer(dev, data, file, args, exec2_list,
-+				     &dev_priv->gtt.base);
- 	if (!ret) {
- 		/* Copy the new buffer offsets back to the user's exec list. */
- 		ret = copy_to_user(to_user_ptr(args->buffers_ptr),
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0580-drm-i915-make-caching-operate-on-all-address-spaces.patch b/patches.baytrail/0580-drm-i915-make-caching-operate-on-all-address-spaces.patch
deleted file mode 100644
index b17fd23415048..0000000000000
--- a/patches.baytrail/0580-drm-i915-make-caching-operate-on-all-address-spaces.patch
+++ /dev/null
@@ -1,77 +0,0 @@
-From 65fa56208d00a95516844c70b9a6f5ee00446823 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Wed, 31 Jul 2013 17:00:03 -0700
-Subject: drm/i915: make caching operate on all address spaces
-
-For now, objects will maintain the same cache levels amongst all address
-spaces. This is to limit the risk of bugs, as playing with cacheability
-in the different domains can be very error prone.
-
-In the future, it may be optimal to allow setting domains per VMA (ie.
-an object bound into an address space).
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 3089c6f239d7d2c4cb2dd5c353e8984cf79af1d7)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem.c | 20 ++++++++++++--------
- 1 file changed, 12 insertions(+), 8 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index d2d1d58ff3d0..fd8fc1b8a28e 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -3313,7 +3313,7 @@ int i915_gem_object_set_cache_level(struct drm_i915_gem_object *obj,
- {
- 	struct drm_device *dev = obj->base.dev;
- 	drm_i915_private_t *dev_priv = dev->dev_private;
--	struct i915_vma *vma = i915_gem_obj_to_vma(obj, &dev_priv->gtt.base);
-+	struct i915_vma *vma;
- 	int ret;
- 
- 	if (obj->cache_level == cache_level)
-@@ -3324,13 +3324,17 @@ int i915_gem_object_set_cache_level(struct drm_i915_gem_object *obj,
- 		return -EBUSY;
- 	}
- 
--	if (vma && !i915_gem_valid_gtt_space(dev, &vma->node, cache_level)) {
--		ret = i915_gem_object_unbind(obj);
--		if (ret)
--			return ret;
-+	list_for_each_entry(vma, &obj->vma_list, vma_link) {
-+		if (!i915_gem_valid_gtt_space(dev, &vma->node, cache_level)) {
-+			ret = i915_gem_object_unbind(obj);
-+			if (ret)
-+				return ret;
-+
-+			break;
-+		}
- 	}
- 
--	if (i915_gem_obj_ggtt_bound(obj)) {
-+	if (i915_gem_obj_bound_any(obj)) {
- 		ret = i915_gem_object_finish_gpu(obj);
- 		if (ret)
- 			return ret;
-@@ -3352,8 +3356,6 @@ int i915_gem_object_set_cache_level(struct drm_i915_gem_object *obj,
- 		if (obj->has_aliasing_ppgtt_mapping)
- 			i915_ppgtt_bind_object(dev_priv->mm.aliasing_ppgtt,
- 					       obj, cache_level);
--
--		i915_gem_obj_to_vma(obj, &dev_priv->gtt.base)->node.color = cache_level;
- 	}
- 
- 	if (cache_level == I915_CACHE_NONE) {
-@@ -3379,6 +3381,8 @@ int i915_gem_object_set_cache_level(struct drm_i915_gem_object *obj,
- 						    old_write_domain);
- 	}
- 
-+	list_for_each_entry(vma, &obj->vma_list, vma_link)
-+		vma->node.color = cache_level;
- 	obj->cache_level = cache_level;
- 	i915_gem_verify_gtt(dev);
- 	return 0;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0581-drm-i915-BUG_ON-put_pages-later.patch b/patches.baytrail/0581-drm-i915-BUG_ON-put_pages-later.patch
deleted file mode 100644
index bd5a043510689..0000000000000
--- a/patches.baytrail/0581-drm-i915-BUG_ON-put_pages-later.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From c89b8524afc1a3badf10bcd2192e200f434c2fa4 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Wed, 31 Jul 2013 17:00:04 -0700
-Subject: drm/i915: BUG_ON put_pages later
-
-With multiple VMs, the eviction code benefits from being able to blindly
-put pages without needing to know if there are any entities still
-holding on to those pages. As such it's preferable to return the -EBUSY
-before the BUG.
-
-Eviction code is the only user for now, but overall it makes sense
-anyway, IMO.
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 3e12302705a961cfe86d52155b4a8cbb34214748)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index fd8fc1b8a28e..17b17170b348 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -1662,11 +1662,11 @@ i915_gem_object_put_pages(struct drm_i915_gem_object *obj)
- 	if (obj->pages == NULL)
- 		return 0;
- 
--	BUG_ON(i915_gem_obj_ggtt_bound(obj));
--
- 	if (obj->pages_pin_count)
- 		return -EBUSY;
- 
-+	BUG_ON(i915_gem_obj_ggtt_bound(obj));
-+
- 	/* ->put_pages might need to allocate memory for the bit17 swizzle
- 	 * array, hence protect them from being reaped by removing them from gtt
- 	 * lists early. */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0582-drm-i915-make-reset-hangcheck-code-VM-aware.patch b/patches.baytrail/0582-drm-i915-make-reset-hangcheck-code-VM-aware.patch
deleted file mode 100644
index f26d5531db2c8..0000000000000
--- a/patches.baytrail/0582-drm-i915-make-reset-hangcheck-code-VM-aware.patch
+++ /dev/null
@@ -1,98 +0,0 @@
-From bc22ce70e3fdd9236e9aa84480a91bacce7cc367 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Wed, 31 Jul 2013 17:00:05 -0700
-Subject: drm/i915: make reset&hangcheck code VM aware
-
-Hangcheck, and some of the recent reset code for guilty batches need to
-know which address space the object was in at the time of a hangcheck.
-This is because we use offsets in the (PP|G)GTT to determine this
-information, and those offsets can differ depending on which VM they are
-bound into.
-
-Since we still only have 1 VM ever, this code shouldn't yet have any
-impact.
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit d1ccbb5d711ba4994eb36c4aac84e0269b5365fe)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem.c | 30 +++++++++++++++++++++++-------
- 1 file changed, 23 insertions(+), 7 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index 17b17170b348..bd6eb646d541 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -2113,10 +2113,11 @@ i915_gem_request_remove_from_client(struct drm_i915_gem_request *request)
- 	spin_unlock(&file_priv->mm.lock);
- }
- 
--static bool i915_head_inside_object(u32 acthd, struct drm_i915_gem_object *obj)
-+static bool i915_head_inside_object(u32 acthd, struct drm_i915_gem_object *obj,
-+				    struct i915_address_space *vm)
- {
--	if (acthd >= i915_gem_obj_ggtt_offset(obj) &&
--	    acthd < i915_gem_obj_ggtt_offset(obj) + obj->base.size)
-+	if (acthd >= i915_gem_obj_offset(obj, vm) &&
-+	    acthd < i915_gem_obj_offset(obj, vm) + obj->base.size)
- 		return true;
- 
- 	return false;
-@@ -2139,6 +2140,17 @@ static bool i915_head_inside_request(const u32 acthd_unmasked,
- 	return false;
- }
- 
-+static struct i915_address_space *
-+request_to_vm(struct drm_i915_gem_request *request)
-+{
-+	struct drm_i915_private *dev_priv = request->ring->dev->dev_private;
-+	struct i915_address_space *vm;
-+
-+	vm = &dev_priv->gtt.base;
-+
-+	return vm;
-+}
-+
- static bool i915_request_guilty(struct drm_i915_gem_request *request,
- 				const u32 acthd, bool *inside)
- {
-@@ -2146,9 +2158,9 @@ static bool i915_request_guilty(struct drm_i915_gem_request *request,
- 	 * pointing inside the ring, matches the batch_obj address range.
- 	 * However this is extremely unlikely.
- 	 */
--
- 	if (request->batch_obj) {
--		if (i915_head_inside_object(acthd, request->batch_obj)) {
-+		if (i915_head_inside_object(acthd, request->batch_obj,
-+					    request_to_vm(request))) {
- 			*inside = true;
- 			return true;
- 		}
-@@ -2168,17 +2180,21 @@ static void i915_set_reset_status(struct intel_ring_buffer *ring,
- {
- 	struct i915_ctx_hang_stats *hs = NULL;
- 	bool inside, guilty;
-+	unsigned long offset = 0;
- 
- 	/* Innocent until proven guilty */
- 	guilty = false;
- 
-+	if (request->batch_obj)
-+		offset = i915_gem_obj_offset(request->batch_obj,
-+					     request_to_vm(request));
-+
- 	if (ring->hangcheck.action != wait &&
- 	    i915_request_guilty(request, acthd, &inside)) {
- 		DRM_ERROR("%s hung %s bo (0x%lx ctx %d) at 0x%x\n",
- 			  ring->name,
- 			  inside ? "inside" : "flushing",
--			  request->batch_obj ?
--			  i915_gem_obj_ggtt_offset(request->batch_obj) : 0,
-+			  offset,
- 			  request->ctx ? request->ctx->id : 0,
- 			  acthd);
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0583-drm-i915-Add-ILK-support-to-intel_read_wm_latency.patch b/patches.baytrail/0583-drm-i915-Add-ILK-support-to-intel_read_wm_latency.patch
deleted file mode 100644
index 5ab06e6620b7f..0000000000000
--- a/patches.baytrail/0583-drm-i915-Add-ILK-support-to-intel_read_wm_latency.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-From 7d8cdee45c7c79cef8c022bc1fc12bc1b7144336 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Thu, 1 Aug 2013 16:18:49 +0300
-Subject: drm/i915: Add ILK support to intel_read_wm_latency
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-ILK has a slightly different way to read out the watermark
-latency values. On ILK the LP0 latenciy values are in fact
-not stored in any register, and instead we must use fixed
-values.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 3a88d0ac809a7fff315b2404559d90d8e74c716c)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 7 +++++++
- 1 file changed, 7 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index af4ca44bbad2..568511ffb87f 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2372,6 +2372,13 @@ static void intel_read_wm_latency(struct drm_device *dev, uint16_t wm[5])
- 		wm[1] = (sskpd >> SSKPD_WM1_SHIFT) & SSKPD_WM_MASK;
- 		wm[2] = (sskpd >> SSKPD_WM2_SHIFT) & SSKPD_WM_MASK;
- 		wm[3] = (sskpd >> SSKPD_WM3_SHIFT) & SSKPD_WM_MASK;
-+	} else if (INTEL_INFO(dev)->gen >= 5) {
-+		uint32_t mltr = I915_READ(MLTR_ILK);
-+
-+		/* ILK primary LP0 latency is 700 ns */
-+		wm[0] = 7;
-+		wm[1] = (mltr >> MLTR_WM1_SHIFT) & ILK_SRLT_MASK;
-+		wm[2] = (mltr >> MLTR_WM2_SHIFT) & ILK_SRLT_MASK;
- 	}
- }
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0584-drm-i915-Store-the-watermark-latency-values-in-dev_p.patch b/patches.baytrail/0584-drm-i915-Store-the-watermark-latency-values-in-dev_p.patch
deleted file mode 100644
index 3ac061e3194dc..0000000000000
--- a/patches.baytrail/0584-drm-i915-Store-the-watermark-latency-values-in-dev_p.patch
+++ /dev/null
@@ -1,169 +0,0 @@
-From a99efa21bd1147e3170bf705f9081d440d83397a Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Thu, 1 Aug 2013 16:18:50 +0300
-Subject: drm/i915: Store the watermark latency values in dev_priv
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Rather than having to read the latency values out every time, just
-store them in dev_priv.
-
-On ILK and IVB there is a difference between some of the latency
-values for different planes, so store the latency values for each
-plane type separately, and apply the necesary fixups during init.
-
-v2: Fix some checkpatch complaints
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 53615a5e129534fa161e882fc3c1c4f269166b76)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h | 14 ++++++++++
- drivers/gpu/drm/i915/intel_pm.c | 62 +++++++++++++++++++++++++++++++++++------
- 2 files changed, 67 insertions(+), 9 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 356970c9368a..ec7692cb2726 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1216,6 +1216,20 @@ typedef struct drm_i915_private {
- 
- 	struct i915_suspend_saved_registers regfile;
- 
-+	struct {
-+		/*
-+		 * Raw watermark latency values:
-+		 * in 0.1us units for WM0,
-+		 * in 0.5us units for WM1+.
-+		 */
-+		/* primary */
-+		uint16_t pri_latency[5];
-+		/* sprite */
-+		uint16_t spr_latency[5];
-+		/* cursor */
-+		uint16_t cur_latency[5];
-+	} wm;
-+
- 	/* Old dri1 support infrastructure, beware the dragons ya fools entering
- 	 * here! */
- 	struct i915_dri1_state dri1;
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 568511ffb87f..306f4dc46a6f 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2382,6 +2382,39 @@ static void intel_read_wm_latency(struct drm_device *dev, uint16_t wm[5])
- 	}
- }
- 
-+static void intel_fixup_spr_wm_latency(struct drm_device *dev, uint16_t wm[5])
-+{
-+	/* ILK sprite LP0 latency is 1300 ns */
-+	if (INTEL_INFO(dev)->gen == 5)
-+		wm[0] = 13;
-+}
-+
-+static void intel_fixup_cur_wm_latency(struct drm_device *dev, uint16_t wm[5])
-+{
-+	/* ILK cursor LP0 latency is 1300 ns */
-+	if (INTEL_INFO(dev)->gen == 5)
-+		wm[0] = 13;
-+
-+	/* WaDoubleCursorLP3Latency:ivb */
-+	if (IS_IVYBRIDGE(dev))
-+		wm[3] *= 2;
-+}
-+
-+static void intel_setup_wm_latency(struct drm_device *dev)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+
-+	intel_read_wm_latency(dev, dev_priv->wm.pri_latency);
-+
-+	memcpy(dev_priv->wm.spr_latency, dev_priv->wm.pri_latency,
-+	       sizeof(dev_priv->wm.pri_latency));
-+	memcpy(dev_priv->wm.cur_latency, dev_priv->wm.pri_latency,
-+	       sizeof(dev_priv->wm.pri_latency));
-+
-+	intel_fixup_spr_wm_latency(dev, dev_priv->wm.spr_latency);
-+	intel_fixup_cur_wm_latency(dev, dev_priv->wm.cur_latency);
-+}
-+
- static void hsw_compute_wm_parameters(struct drm_device *dev,
- 				      struct hsw_pipe_wm_parameters *params,
- 				      struct hsw_wm_maximums *lp_max_1_2,
-@@ -2627,16 +2660,17 @@ static void haswell_update_wm(struct drm_device *dev)
- 	struct hsw_wm_maximums lp_max_1_2, lp_max_5_6;
- 	struct hsw_pipe_wm_parameters params[3];
- 	struct hsw_wm_values results_1_2, results_5_6, *best_results;
--	uint16_t wm[5] = {};
- 	enum hsw_data_buf_partitioning partitioning;
- 
--	intel_read_wm_latency(dev, wm);
- 	hsw_compute_wm_parameters(dev, params, &lp_max_1_2, &lp_max_5_6);
- 
--	hsw_compute_wm_results(dev, params, wm, &lp_max_1_2, &results_1_2);
-+	hsw_compute_wm_results(dev, params,
-+			       dev_priv->wm.pri_latency,
-+			       &lp_max_1_2, &results_1_2);
- 	if (lp_max_1_2.pri != lp_max_5_6.pri) {
--		hsw_compute_wm_results(dev, params, wm, &lp_max_5_6,
--				       &results_5_6);
-+		hsw_compute_wm_results(dev, params,
-+				       dev_priv->wm.pri_latency,
-+				       &lp_max_5_6, &results_5_6);
- 		best_results = hsw_find_best_result(&results_1_2, &results_5_6);
- 	} else {
- 		best_results = &results_1_2;
-@@ -5247,8 +5281,12 @@ void intel_init_pm(struct drm_device *dev)
- 
- 	/* For FIFO watermark updates */
- 	if (HAS_PCH_SPLIT(dev)) {
-+		intel_setup_wm_latency(dev);
-+
- 		if (IS_GEN5(dev)) {
--			if (I915_READ(MLTR_ILK) & ILK_SRLT_MASK)
-+			if (dev_priv->wm.pri_latency[1] &&
-+			    dev_priv->wm.spr_latency[1] &&
-+			    dev_priv->wm.cur_latency[1])
- 				dev_priv->display.update_wm = ironlake_update_wm;
- 			else {
- 				DRM_DEBUG_KMS("Failed to get proper latency. "
-@@ -5257,7 +5295,9 @@ void intel_init_pm(struct drm_device *dev)
- 			}
- 			dev_priv->display.init_clock_gating = ironlake_init_clock_gating;
- 		} else if (IS_GEN6(dev)) {
--			if (SNB_READ_WM0_LATENCY()) {
-+			if (dev_priv->wm.pri_latency[0] &&
-+			    dev_priv->wm.spr_latency[0] &&
-+			    dev_priv->wm.cur_latency[0]) {
- 				dev_priv->display.update_wm = sandybridge_update_wm;
- 				dev_priv->display.update_sprite_wm = sandybridge_update_sprite_wm;
- 			} else {
-@@ -5267,7 +5307,9 @@ void intel_init_pm(struct drm_device *dev)
- 			}
- 			dev_priv->display.init_clock_gating = gen6_init_clock_gating;
- 		} else if (IS_IVYBRIDGE(dev)) {
--			if (SNB_READ_WM0_LATENCY()) {
-+			if (dev_priv->wm.pri_latency[0] &&
-+			    dev_priv->wm.spr_latency[0] &&
-+			    dev_priv->wm.cur_latency[0]) {
- 				dev_priv->display.update_wm = ivybridge_update_wm;
- 				dev_priv->display.update_sprite_wm = sandybridge_update_sprite_wm;
- 			} else {
-@@ -5277,7 +5319,9 @@ void intel_init_pm(struct drm_device *dev)
- 			}
- 			dev_priv->display.init_clock_gating = ivybridge_init_clock_gating;
- 		} else if (IS_HASWELL(dev)) {
--			if (I915_READ64(MCH_SSKPD)) {
-+			if (dev_priv->wm.pri_latency[0] &&
-+			    dev_priv->wm.spr_latency[0] &&
-+			    dev_priv->wm.cur_latency[0]) {
- 				dev_priv->display.update_wm = haswell_update_wm;
- 				dev_priv->display.update_sprite_wm =
- 					haswell_update_sprite_wm;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0585-drm-i915-Use-the-stored-cursor-and-plane-latencies-p.patch b/patches.baytrail/0585-drm-i915-Use-the-stored-cursor-and-plane-latencies-p.patch
deleted file mode 100644
index 329d5798b4fc7..0000000000000
--- a/patches.baytrail/0585-drm-i915-Use-the-stored-cursor-and-plane-latencies-p.patch
+++ /dev/null
@@ -1,122 +0,0 @@
-From 1c68768406c569198fc0c08e316a13561487f999 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Thu, 1 Aug 2013 16:18:51 +0300
-Subject: drm/i915: Use the stored cursor and plane latencies properly
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Rather than pass around the plane latencies, just grab them from
-dev_priv nearer to where they're needed. Do the same for cursor
-latencies.
-
-v2: Add some comments about latency units
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 5b77da33c11b72d703382a93c402544186c7721e)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 36 +++++++++++++++++++++---------------
- 1 file changed, 21 insertions(+), 15 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 306f4dc46a6f..2839bdb25b98 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2270,7 +2270,8 @@ static uint32_t ilk_compute_fbc_wm(struct hsw_pipe_wm_parameters *params,
- 			  params->pri_bytes_per_pixel);
- }
- 
--static bool hsw_compute_lp_wm(uint32_t mem_value, struct hsw_wm_maximums *max,
-+static bool hsw_compute_lp_wm(struct drm_i915_private *dev_priv,
-+			      int level, struct hsw_wm_maximums *max,
- 			      struct hsw_pipe_wm_parameters *params,
- 			      struct hsw_lp_wm_result *result)
- {
-@@ -2279,10 +2280,14 @@ static bool hsw_compute_lp_wm(uint32_t mem_value, struct hsw_wm_maximums *max,
- 
- 	for (pipe = PIPE_A; pipe <= PIPE_C; pipe++) {
- 		struct hsw_pipe_wm_parameters *p = &params[pipe];
--
--		pri_val[pipe] = ilk_compute_pri_wm(p, mem_value, true);
--		spr_val[pipe] = ilk_compute_spr_wm(p, mem_value);
--		cur_val[pipe] = ilk_compute_cur_wm(p, mem_value);
-+		/* WM1+ latency values stored in 0.5us units */
-+		uint16_t pri_latency = dev_priv->wm.pri_latency[level] * 5;
-+		uint16_t spr_latency = dev_priv->wm.spr_latency[level] * 5;
-+		uint16_t cur_latency = dev_priv->wm.cur_latency[level] * 5;
-+
-+		pri_val[pipe] = ilk_compute_pri_wm(p, pri_latency, true);
-+		spr_val[pipe] = ilk_compute_spr_wm(p, spr_latency);
-+		cur_val[pipe] = ilk_compute_cur_wm(p, cur_latency);
- 		fbc_val[pipe] = ilk_compute_fbc_wm(p, pri_val[pipe]);
- 	}
- 
-@@ -2305,14 +2310,18 @@ static bool hsw_compute_lp_wm(uint32_t mem_value, struct hsw_wm_maximums *max,
- }
- 
- static uint32_t hsw_compute_wm_pipe(struct drm_i915_private *dev_priv,
--				    uint32_t mem_value, enum pipe pipe,
-+				    enum pipe pipe,
- 				    struct hsw_pipe_wm_parameters *params)
- {
- 	uint32_t pri_val, cur_val, spr_val;
-+	/* WM0 latency values stored in 0.1us units */
-+	uint16_t pri_latency = dev_priv->wm.pri_latency[0];
-+	uint16_t spr_latency = dev_priv->wm.spr_latency[0];
-+	uint16_t cur_latency = dev_priv->wm.cur_latency[0];
- 
--	pri_val = ilk_compute_pri_wm(params, mem_value, false);
--	spr_val = ilk_compute_spr_wm(params, mem_value);
--	cur_val = ilk_compute_cur_wm(params, mem_value);
-+	pri_val = ilk_compute_pri_wm(params, pri_latency, false);
-+	spr_val = ilk_compute_spr_wm(params, spr_latency);
-+	cur_val = ilk_compute_cur_wm(params, cur_latency);
- 
- 	WARN(pri_val > 127,
- 	     "Primary WM error, mode not supported for pipe %c\n",
-@@ -2478,7 +2487,6 @@ static void hsw_compute_wm_parameters(struct drm_device *dev,
- 
- static void hsw_compute_wm_results(struct drm_device *dev,
- 				   struct hsw_pipe_wm_parameters *params,
--				   uint16_t *wm,
- 				   struct hsw_wm_maximums *lp_maximums,
- 				   struct hsw_wm_values *results)
- {
-@@ -2489,7 +2497,8 @@ static void hsw_compute_wm_results(struct drm_device *dev,
- 	int level, max_level, wm_lp;
- 
- 	for (level = 1; level <= 4; level++)
--		if (!hsw_compute_lp_wm(wm[level] * 5, lp_maximums, params,
-+		if (!hsw_compute_lp_wm(dev_priv, level,
-+				       lp_maximums, params,
- 				       &lp_results[level - 1]))
- 			break;
- 	max_level = level - 1;
-@@ -2521,8 +2530,7 @@ static void hsw_compute_wm_results(struct drm_device *dev,
- 	}
- 
- 	for_each_pipe(pipe)
--		results->wm_pipe[pipe] = hsw_compute_wm_pipe(dev_priv, wm[0],
--							     pipe,
-+		results->wm_pipe[pipe] = hsw_compute_wm_pipe(dev_priv, pipe,
- 							     &params[pipe]);
- 
- 	for_each_pipe(pipe) {
-@@ -2665,11 +2673,9 @@ static void haswell_update_wm(struct drm_device *dev)
- 	hsw_compute_wm_parameters(dev, params, &lp_max_1_2, &lp_max_5_6);
- 
- 	hsw_compute_wm_results(dev, params,
--			       dev_priv->wm.pri_latency,
- 			       &lp_max_1_2, &results_1_2);
- 	if (lp_max_1_2.pri != lp_max_5_6.pri) {
- 		hsw_compute_wm_results(dev, params,
--				       dev_priv->wm.pri_latency,
- 				       &lp_max_5_6, &results_5_6);
- 		best_results = hsw_find_best_result(&results_1_2, &results_5_6);
- 	} else {
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0586-drm-i915-Print-the-watermark-latencies-during-init.patch b/patches.baytrail/0586-drm-i915-Print-the-watermark-latencies-during-init.patch
deleted file mode 100644
index 9e2412fe62ad2..0000000000000
--- a/patches.baytrail/0586-drm-i915-Print-the-watermark-latencies-during-init.patch
+++ /dev/null
@@ -1,86 +0,0 @@
-From 3015ca6aea97ff0ddcf6e072a32c4724d4b61825 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Thu, 1 Aug 2013 16:18:52 +0300
-Subject: drm/i915: Print the watermark latencies during init
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Seeing the watermark latency values in dmesg might help sometimes.
-
-v2: Use DRM_ERROR() when expected latency values are missing
-
-Note: We might hit the DRM_ERROR added in this patch and apparently
-there's not much we can do about that. But I think it'd be interesting
-to figure out whether that actually happens in the real world, so I
-didn't apply a s/DRM_ERROR/DRM_DEBUG_KMS/ bikeshed while applying.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-[danvet: Add note about new error dmesg output.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 26ec971e302c53b44cc5627ffe209a7d33199e28)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 37 +++++++++++++++++++++++++++++++++++++
- 1 file changed, 37 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 2839bdb25b98..76bd4de232e1 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2409,6 +2409,39 @@ static void intel_fixup_cur_wm_latency(struct drm_device *dev, uint16_t wm[5])
- 		wm[3] *= 2;
- }
- 
-+static void intel_print_wm_latency(struct drm_device *dev,
-+				   const char *name,
-+				   const uint16_t wm[5])
-+{
-+	int level, max_level;
-+
-+	/* how many WM levels are we expecting */
-+	if (IS_HASWELL(dev))
-+		max_level = 4;
-+	else if (INTEL_INFO(dev)->gen >= 6)
-+		max_level = 3;
-+	else
-+		max_level = 2;
-+
-+	for (level = 0; level <= max_level; level++) {
-+		unsigned int latency = wm[level];
-+
-+		if (latency == 0) {
-+			DRM_ERROR("%s WM%d latency not provided\n",
-+				  name, level);
-+			continue;
-+		}
-+
-+		/* WM1+ latency values in 0.5us units */
-+		if (level > 0)
-+			latency *= 5;
-+
-+		DRM_DEBUG_KMS("%s WM%d latency %u (%u.%u usec)\n",
-+			      name, level, wm[level],
-+			      latency / 10, latency % 10);
-+	}
-+}
-+
- static void intel_setup_wm_latency(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
-@@ -2422,6 +2455,10 @@ static void intel_setup_wm_latency(struct drm_device *dev)
- 
- 	intel_fixup_spr_wm_latency(dev, dev_priv->wm.spr_latency);
- 	intel_fixup_cur_wm_latency(dev, dev_priv->wm.cur_latency);
-+
-+	intel_print_wm_latency(dev, "Primary", dev_priv->wm.pri_latency);
-+	intel_print_wm_latency(dev, "Sprite", dev_priv->wm.spr_latency);
-+	intel_print_wm_latency(dev, "Cursor", dev_priv->wm.cur_latency);
- }
- 
- static void hsw_compute_wm_parameters(struct drm_device *dev,
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0587-drm-i915-Disable-specific-watermark-levels-when-late.patch b/patches.baytrail/0587-drm-i915-Disable-specific-watermark-levels-when-late.patch
deleted file mode 100644
index 658d7ecf3bf6e..0000000000000
--- a/patches.baytrail/0587-drm-i915-Disable-specific-watermark-levels-when-late.patch
+++ /dev/null
@@ -1,53 +0,0 @@
-From 31c3a7f61f43a4cf229e4f6168c8cc70c6ecfef9 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Thu, 1 Aug 2013 16:18:53 +0300
-Subject: drm/i915: Disable specific watermark levels when latency is zero
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Return UINT_MAX for the calculated WM level if the latency is zero.
-This will lead to marking the WM level as disabled.
-
-I'm not sure if latency==0 should mean that we want to disable the
-level. But that's the implication I got from the fact that we don't
-even enable the watermark code of the SSKDP register is 0.
-
-v2: Use WARN() to scare people
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 3312ba65caa23cf1210cc578755babc394769843)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 6 ++++++
- 1 file changed, 6 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 76bd4de232e1..42f541671236 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2131,6 +2131,9 @@ static uint32_t ilk_wm_method1(uint32_t pixel_rate, uint8_t bytes_per_pixel,
- {
- 	uint64_t ret;
- 
-+	if (WARN(latency == 0, "Latency value missing\n"))
-+		return UINT_MAX;
-+
- 	ret = (uint64_t) pixel_rate * bytes_per_pixel * latency;
- 	ret = DIV_ROUND_UP_ULL(ret, 64 * 10000) + 2;
- 
-@@ -2143,6 +2146,9 @@ static uint32_t ilk_wm_method2(uint32_t pixel_rate, uint32_t pipe_htotal,
- {
- 	uint32_t ret;
- 
-+	if (WARN(latency == 0, "Latency value missing\n"))
-+		return UINT_MAX;
-+
- 	ret = (latency * pixel_rate) / (pipe_htotal * 10000);
- 	ret = (ret + 1) * horiz_pixels * bytes_per_pixel;
- 	ret = DIV_ROUND_UP(ret, 64) + 2;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0588-drm-i915-Use-the-watermark-latency-values-from-dev_p.patch b/patches.baytrail/0588-drm-i915-Use-the-watermark-latency-values-from-dev_p.patch
deleted file mode 100644
index 760887cb46b69..0000000000000
--- a/patches.baytrail/0588-drm-i915-Use-the-watermark-latency-values-from-dev_p.patch
+++ /dev/null
@@ -1,283 +0,0 @@
-From 12cd878fcf1ecfd90c34df36a7a69a3037da4577 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Thu, 1 Aug 2013 16:18:54 +0300
-Subject: drm/i915: Use the watermark latency values from dev_priv for
- ILK/SNB/IVB too
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Adjust the current ILK/SNB/IVB watermark codepaths to use the
-pre-populated latency values from dev_priv instead of reading
-them out from the registers every time.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit b0aea5dca064176a626dc2a83727c60ace31ee6d)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_reg.h |    9 ------
- drivers/gpu/drm/i915/intel_pm.c |   57 ++++++++++++++++++----------------------
- 2 files changed, 27 insertions(+), 39 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -3208,9 +3208,6 @@
- #define  MLTR_WM2_SHIFT		8
- /* the unit of memory self-refresh latency time is 0.5us */
- #define  ILK_SRLT_MASK		0x3f
--#define ILK_LATENCY(shift)	(I915_READ(MLTR_ILK) >> (shift) & ILK_SRLT_MASK)
--#define ILK_READ_WM1_LATENCY()	ILK_LATENCY(MLTR_WM1_SHIFT)
--#define ILK_READ_WM2_LATENCY()	ILK_LATENCY(MLTR_WM2_SHIFT)
- 
- /* define the fifo size on Ironlake */
- #define ILK_DISPLAY_FIFO	128
-@@ -3257,12 +3254,6 @@
- #define SSKPD_WM2_SHIFT		16
- #define SSKPD_WM3_SHIFT		24
- 
--#define SNB_LATENCY(shift)	(I915_READ(MCHBAR_MIRROR_BASE_SNB + SSKPD) >> (shift) & SSKPD_WM_MASK)
--#define SNB_READ_WM0_LATENCY()		SNB_LATENCY(SSKPD_WM0_SHIFT)
--#define SNB_READ_WM1_LATENCY()		SNB_LATENCY(SSKPD_WM1_SHIFT)
--#define SNB_READ_WM2_LATENCY()		SNB_LATENCY(SSKPD_WM2_SHIFT)
--#define SNB_READ_WM3_LATENCY()		SNB_LATENCY(SSKPD_WM3_SHIFT)
--
- /*
-  * The two pipe frame counter registers are not synchronized, so
-  * reading a stable value is somewhat tricky. The following code
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -1680,9 +1680,6 @@ static void i830_update_wm(struct drm_de
- 	I915_WRITE(FW_BLC, fwater_lo);
- }
- 
--#define ILK_LP0_PLANE_LATENCY		700
--#define ILK_LP0_CURSOR_LATENCY		1300
--
- /*
-  * Check the wm result.
-  *
-@@ -1797,9 +1794,9 @@ static void ironlake_update_wm(struct dr
- 	enabled = 0;
- 	if (g4x_compute_wm0(dev, PIPE_A,
- 			    &ironlake_display_wm_info,
--			    ILK_LP0_PLANE_LATENCY,
-+			    dev_priv->wm.pri_latency[0] * 100,
- 			    &ironlake_cursor_wm_info,
--			    ILK_LP0_CURSOR_LATENCY,
-+			    dev_priv->wm.cur_latency[0] * 100,
- 			    &plane_wm, &cursor_wm)) {
- 		I915_WRITE(WM0_PIPEA_ILK,
- 			   (plane_wm << WM0_PIPE_PLANE_SHIFT) | cursor_wm);
-@@ -1811,9 +1808,9 @@ static void ironlake_update_wm(struct dr
- 
- 	if (g4x_compute_wm0(dev, PIPE_B,
- 			    &ironlake_display_wm_info,
--			    ILK_LP0_PLANE_LATENCY,
-+			    dev_priv->wm.pri_latency[0] * 100,
- 			    &ironlake_cursor_wm_info,
--			    ILK_LP0_CURSOR_LATENCY,
-+			    dev_priv->wm.cur_latency[0] * 100,
- 			    &plane_wm, &cursor_wm)) {
- 		I915_WRITE(WM0_PIPEB_ILK,
- 			   (plane_wm << WM0_PIPE_PLANE_SHIFT) | cursor_wm);
-@@ -1837,7 +1834,7 @@ static void ironlake_update_wm(struct dr
- 
- 	/* WM1 */
- 	if (!ironlake_compute_srwm(dev, 1, enabled,
--				   ILK_READ_WM1_LATENCY() * 500,
-+				   dev_priv->wm.pri_latency[1] * 500,
- 				   &ironlake_display_srwm_info,
- 				   &ironlake_cursor_srwm_info,
- 				   &fbc_wm, &plane_wm, &cursor_wm))
-@@ -1845,14 +1842,14 @@ static void ironlake_update_wm(struct dr
- 
- 	I915_WRITE(WM1_LP_ILK,
- 		   WM1_LP_SR_EN |
--		   (ILK_READ_WM1_LATENCY() << WM1_LP_LATENCY_SHIFT) |
-+		   (dev_priv->wm.pri_latency[1] << WM1_LP_LATENCY_SHIFT) |
- 		   (fbc_wm << WM1_LP_FBC_SHIFT) |
- 		   (plane_wm << WM1_LP_SR_SHIFT) |
- 		   cursor_wm);
- 
- 	/* WM2 */
- 	if (!ironlake_compute_srwm(dev, 2, enabled,
--				   ILK_READ_WM2_LATENCY() * 500,
-+				   dev_priv->wm.pri_latency[2] * 500,
- 				   &ironlake_display_srwm_info,
- 				   &ironlake_cursor_srwm_info,
- 				   &fbc_wm, &plane_wm, &cursor_wm))
-@@ -1860,7 +1857,7 @@ static void ironlake_update_wm(struct dr
- 
- 	I915_WRITE(WM2_LP_ILK,
- 		   WM2_LP_EN |
--		   (ILK_READ_WM2_LATENCY() << WM1_LP_LATENCY_SHIFT) |
-+		   (dev_priv->wm.pri_latency[2] << WM1_LP_LATENCY_SHIFT) |
- 		   (fbc_wm << WM1_LP_FBC_SHIFT) |
- 		   (plane_wm << WM1_LP_SR_SHIFT) |
- 		   cursor_wm);
-@@ -1874,7 +1871,7 @@ static void ironlake_update_wm(struct dr
- static void sandybridge_update_wm(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
--	int latency = SNB_READ_WM0_LATENCY() * 100;	/* In unit 0.1us */
-+	int latency = dev_priv->wm.pri_latency[0] * 100;	/* In unit 0.1us */
- 	u32 val;
- 	int fbc_wm, plane_wm, cursor_wm;
- 	unsigned int enabled;
-@@ -1929,7 +1926,7 @@ static void sandybridge_update_wm(struct
- 
- 	/* WM1 */
- 	if (!ironlake_compute_srwm(dev, 1, enabled,
--				   SNB_READ_WM1_LATENCY() * 500,
-+				   dev_priv->wm.pri_latency[1] * 500,
- 				   &sandybridge_display_srwm_info,
- 				   &sandybridge_cursor_srwm_info,
- 				   &fbc_wm, &plane_wm, &cursor_wm))
-@@ -1937,14 +1934,14 @@ static void sandybridge_update_wm(struct
- 
- 	I915_WRITE(WM1_LP_ILK,
- 		   WM1_LP_SR_EN |
--		   (SNB_READ_WM1_LATENCY() << WM1_LP_LATENCY_SHIFT) |
-+		   (dev_priv->wm.pri_latency[1] << WM1_LP_LATENCY_SHIFT) |
- 		   (fbc_wm << WM1_LP_FBC_SHIFT) |
- 		   (plane_wm << WM1_LP_SR_SHIFT) |
- 		   cursor_wm);
- 
- 	/* WM2 */
- 	if (!ironlake_compute_srwm(dev, 2, enabled,
--				   SNB_READ_WM2_LATENCY() * 500,
-+				   dev_priv->wm.pri_latency[2] * 500,
- 				   &sandybridge_display_srwm_info,
- 				   &sandybridge_cursor_srwm_info,
- 				   &fbc_wm, &plane_wm, &cursor_wm))
-@@ -1952,14 +1949,14 @@ static void sandybridge_update_wm(struct
- 
- 	I915_WRITE(WM2_LP_ILK,
- 		   WM2_LP_EN |
--		   (SNB_READ_WM2_LATENCY() << WM1_LP_LATENCY_SHIFT) |
-+		   (dev_priv->wm.pri_latency[2] << WM1_LP_LATENCY_SHIFT) |
- 		   (fbc_wm << WM1_LP_FBC_SHIFT) |
- 		   (plane_wm << WM1_LP_SR_SHIFT) |
- 		   cursor_wm);
- 
- 	/* WM3 */
- 	if (!ironlake_compute_srwm(dev, 3, enabled,
--				   SNB_READ_WM3_LATENCY() * 500,
-+				   dev_priv->wm.pri_latency[3] * 500,
- 				   &sandybridge_display_srwm_info,
- 				   &sandybridge_cursor_srwm_info,
- 				   &fbc_wm, &plane_wm, &cursor_wm))
-@@ -1967,7 +1964,7 @@ static void sandybridge_update_wm(struct
- 
- 	I915_WRITE(WM3_LP_ILK,
- 		   WM3_LP_EN |
--		   (SNB_READ_WM3_LATENCY() << WM1_LP_LATENCY_SHIFT) |
-+		   (dev_priv->wm.pri_latency[3] << WM1_LP_LATENCY_SHIFT) |
- 		   (fbc_wm << WM1_LP_FBC_SHIFT) |
- 		   (plane_wm << WM1_LP_SR_SHIFT) |
- 		   cursor_wm);
-@@ -1976,7 +1973,7 @@ static void sandybridge_update_wm(struct
- static void ivybridge_update_wm(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
--	int latency = SNB_READ_WM0_LATENCY() * 100;	/* In unit 0.1us */
-+	int latency = dev_priv->wm.pri_latency[0] * 100;	/* In unit 0.1us */
- 	u32 val;
- 	int fbc_wm, plane_wm, cursor_wm;
- 	int ignore_fbc_wm, ignore_plane_wm, ignore_cursor_wm;
-@@ -2046,7 +2043,7 @@ static void ivybridge_update_wm(struct d
- 
- 	/* WM1 */
- 	if (!ironlake_compute_srwm(dev, 1, enabled,
--				   SNB_READ_WM1_LATENCY() * 500,
-+				   dev_priv->wm.pri_latency[1] * 500,
- 				   &sandybridge_display_srwm_info,
- 				   &sandybridge_cursor_srwm_info,
- 				   &fbc_wm, &plane_wm, &cursor_wm))
-@@ -2054,14 +2051,14 @@ static void ivybridge_update_wm(struct d
- 
- 	I915_WRITE(WM1_LP_ILK,
- 		   WM1_LP_SR_EN |
--		   (SNB_READ_WM1_LATENCY() << WM1_LP_LATENCY_SHIFT) |
-+		   (dev_priv->wm.pri_latency[1] << WM1_LP_LATENCY_SHIFT) |
- 		   (fbc_wm << WM1_LP_FBC_SHIFT) |
- 		   (plane_wm << WM1_LP_SR_SHIFT) |
- 		   cursor_wm);
- 
- 	/* WM2 */
- 	if (!ironlake_compute_srwm(dev, 2, enabled,
--				   SNB_READ_WM2_LATENCY() * 500,
-+				   dev_priv->wm.pri_latency[2] * 500,
- 				   &sandybridge_display_srwm_info,
- 				   &sandybridge_cursor_srwm_info,
- 				   &fbc_wm, &plane_wm, &cursor_wm))
-@@ -2069,19 +2066,19 @@ static void ivybridge_update_wm(struct d
- 
- 	I915_WRITE(WM2_LP_ILK,
- 		   WM2_LP_EN |
--		   (SNB_READ_WM2_LATENCY() << WM1_LP_LATENCY_SHIFT) |
-+		   (dev_priv->wm.pri_latency[2] << WM1_LP_LATENCY_SHIFT) |
- 		   (fbc_wm << WM1_LP_FBC_SHIFT) |
- 		   (plane_wm << WM1_LP_SR_SHIFT) |
- 		   cursor_wm);
- 
- 	/* WM3, note we have to correct the cursor latency */
- 	if (!ironlake_compute_srwm(dev, 3, enabled,
--				   SNB_READ_WM3_LATENCY() * 500,
-+				   dev_priv->wm.pri_latency[3] * 500,
- 				   &sandybridge_display_srwm_info,
- 				   &sandybridge_cursor_srwm_info,
- 				   &fbc_wm, &plane_wm, &ignore_cursor_wm) ||
- 	    !ironlake_compute_srwm(dev, 3, enabled,
--				   2 * SNB_READ_WM3_LATENCY() * 500,
-+				   dev_priv->wm.cur_latency[3] * 500,
- 				   &sandybridge_display_srwm_info,
- 				   &sandybridge_cursor_srwm_info,
- 				   &ignore_fbc_wm, &ignore_plane_wm, &cursor_wm))
-@@ -2089,7 +2086,7 @@ static void ivybridge_update_wm(struct d
- 
- 	I915_WRITE(WM3_LP_ILK,
- 		   WM3_LP_EN |
--		   (SNB_READ_WM3_LATENCY() << WM1_LP_LATENCY_SHIFT) |
-+		   (dev_priv->wm.pri_latency[3] << WM1_LP_LATENCY_SHIFT) |
- 		   (fbc_wm << WM1_LP_FBC_SHIFT) |
- 		   (plane_wm << WM1_LP_SR_SHIFT) |
- 		   cursor_wm);
-@@ -2833,7 +2830,7 @@ static void sandybridge_update_sprite_wm
- 					 bool enable, bool scaled)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
--	int latency = SNB_READ_WM0_LATENCY() * 100;	/* In unit 0.1us */
-+	int latency = dev_priv->wm.spr_latency[0] * 100;	/* In unit 0.1us */
- 	u32 val;
- 	int sprite_wm, reg;
- 	int ret;
-@@ -2873,7 +2870,7 @@ static void sandybridge_update_sprite_wm
- 	ret = sandybridge_compute_sprite_srwm(dev, pipe, sprite_width,
- 					      pixel_size,
- 					      &sandybridge_display_srwm_info,
--					      SNB_READ_WM1_LATENCY() * 500,
-+					      dev_priv->wm.spr_latency[1] * 500,
- 					      &sprite_wm);
- 	if (!ret) {
- 		DRM_DEBUG_KMS("failed to compute sprite lp1 wm on pipe %c\n",
-@@ -2889,7 +2886,7 @@ static void sandybridge_update_sprite_wm
- 	ret = sandybridge_compute_sprite_srwm(dev, pipe, sprite_width,
- 					      pixel_size,
- 					      &sandybridge_display_srwm_info,
--					      SNB_READ_WM2_LATENCY() * 500,
-+					      dev_priv->wm.spr_latency[2] * 500,
- 					      &sprite_wm);
- 	if (!ret) {
- 		DRM_DEBUG_KMS("failed to compute sprite lp2 wm on pipe %c\n",
-@@ -2901,7 +2898,7 @@ static void sandybridge_update_sprite_wm
- 	ret = sandybridge_compute_sprite_srwm(dev, pipe, sprite_width,
- 					      pixel_size,
- 					      &sandybridge_display_srwm_info,
--					      SNB_READ_WM3_LATENCY() * 500,
-+					      dev_priv->wm.spr_latency[3] * 500,
- 					      &sprite_wm);
- 	if (!ret) {
- 		DRM_DEBUG_KMS("failed to compute sprite lp3 wm on pipe %c\n",
diff --git a/patches.baytrail/0589-drm-i915-Add-comments-about-units-of-latency-values.patch b/patches.baytrail/0589-drm-i915-Add-comments-about-units-of-latency-values.patch
deleted file mode 100644
index f0fdb3a00835e..0000000000000
--- a/patches.baytrail/0589-drm-i915-Add-comments-about-units-of-latency-values.patch
+++ /dev/null
@@ -1,79 +0,0 @@
-From e0f086d4869ed927b4eb22ac0bc4e385944e7cf7 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Thu, 1 Aug 2013 16:18:55 +0300
-Subject: drm/i915: Add comments about units of latency values
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-All the ILK+ WM compute functions take the latency values in 0.1us
-units. Add a few comments to remind people about that.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 37126462a4feadeb3ff08c4b308a28e4db8c83a7)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 17 ++++++++++++++---
- 1 file changed, 14 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 0254e620ba05..9b8c90ea81ff 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2123,6 +2123,7 @@ static uint32_t ilk_pipe_pixel_rate(struct drm_device *dev,
- 	return pixel_rate;
- }
- 
-+/* latency must be in 0.1us units. */
- static uint32_t ilk_wm_method1(uint32_t pixel_rate, uint8_t bytes_per_pixel,
- 			       uint32_t latency)
- {
-@@ -2137,6 +2138,7 @@ static uint32_t ilk_wm_method1(uint32_t pixel_rate, uint8_t bytes_per_pixel,
- 	return ret;
- }
- 
-+/* latency must be in 0.1us units. */
- static uint32_t ilk_wm_method2(uint32_t pixel_rate, uint32_t pipe_htotal,
- 			       uint32_t horiz_pixels, uint8_t bytes_per_pixel,
- 			       uint32_t latency)
-@@ -2200,7 +2202,10 @@ enum hsw_data_buf_partitioning {
- 	HSW_DATA_BUF_PART_5_6,
- };
- 
--/* For both WM_PIPE and WM_LP. */
-+/*
-+ * For both WM_PIPE and WM_LP.
-+ * mem_value must be in 0.1us units.
-+ */
- static uint32_t ilk_compute_pri_wm(struct hsw_pipe_wm_parameters *params,
- 				   uint32_t mem_value,
- 				   bool is_lp)
-@@ -2227,7 +2232,10 @@ static uint32_t ilk_compute_pri_wm(struct hsw_pipe_wm_parameters *params,
- 	return min(method1, method2);
- }
- 
--/* For both WM_PIPE and WM_LP. */
-+/*
-+ * For both WM_PIPE and WM_LP.
-+ * mem_value must be in 0.1us units.
-+ */
- static uint32_t ilk_compute_spr_wm(struct hsw_pipe_wm_parameters *params,
- 				   uint32_t mem_value)
- {
-@@ -2247,7 +2255,10 @@ static uint32_t ilk_compute_spr_wm(struct hsw_pipe_wm_parameters *params,
- 	return min(method1, method2);
- }
- 
--/* For both WM_PIPE and WM_LP. */
-+/*
-+ * For both WM_PIPE and WM_LP.
-+ * mem_value must be in 0.1us units.
-+ */
- static uint32_t ilk_compute_cur_wm(struct hsw_pipe_wm_parameters *params,
- 				   uint32_t mem_value)
- {
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0590-drm-i915-eliminate-dead-domain-clearing-on-reset.patch b/patches.baytrail/0590-drm-i915-eliminate-dead-domain-clearing-on-reset.patch
deleted file mode 100644
index e74ed26a00f5d..0000000000000
--- a/patches.baytrail/0590-drm-i915-eliminate-dead-domain-clearing-on-reset.patch
+++ /dev/null
@@ -1,49 +0,0 @@
-From 28811bb29b8e2c215f9ba040f747993046ff9855 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Mon, 5 Aug 2013 09:46:44 -0700
-Subject: drm/i915: eliminate dead domain clearing on reset
-
-The code itself is no longer accurate without updating once we have
-multiple address space since clearing the domains of every object
-requires scanning the inactive list for all VMs.
-
-"This code is dead. Just remove it rather than port it to vma." - Chris
-Wilson
-
-Recommended-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 637efacf8fcf112a188dd005c816e2b0f39894f0)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem.c | 8 --------
- 1 file changed, 8 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index bd6eb646d541..d31e15dd173c 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -2285,20 +2285,12 @@ void i915_gem_restore_fences(struct drm_device *dev)
- void i915_gem_reset(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
--	struct i915_address_space *vm = &dev_priv->gtt.base;
--	struct drm_i915_gem_object *obj;
- 	struct intel_ring_buffer *ring;
- 	int i;
- 
- 	for_each_ring(ring, dev_priv, i)
- 		i915_gem_reset_ring_lists(dev_priv, ring);
- 
--	/* Move everything out of the GPU domains to ensure we do any
--	 * necessary invalidation upon reuse.
--	 */
--	list_for_each_entry(obj, &vm->inactive_list, mm_list)
--		obj->base.read_domains &= ~I915_GEM_GPU_DOMAINS;
--
- 	i915_gem_restore_fences(dev);
- }
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0591-drm-i915-silence-useless-messages-about-DDI-buffer-t.patch b/patches.baytrail/0591-drm-i915-silence-useless-messages-about-DDI-buffer-t.patch
deleted file mode 100644
index ffd2686847d8f..0000000000000
--- a/patches.baytrail/0591-drm-i915-silence-useless-messages-about-DDI-buffer-t.patch
+++ /dev/null
@@ -1,53 +0,0 @@
-From 8e9f9bd7cdd932b4094226fca46bbf7bf21bfc17 Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Mon, 5 Aug 2013 17:25:55 -0300
-Subject: drm/i915: silence useless messages about DDI buffer translation
-
-These messages are not really useful since it's very easy to check
-which mode is used for each port: The values programmed are based on
-the port type, then assigned to the ddi_translations variable.
-Currently we use DP mode for ports A-D and FDI mode for port E.
-
-Also, when we add the code to enable/disable PC8+,
-intel_prepare_ddi_buffers will be called more often and will eat your
-dmesg buffers.
-
-While at it, fix the coding style of the "for" statement above.
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-[danvet: Pimp commit message with Paulo's more detailed explanation of
-how the ddi translation buffer settings are computed, to answer a
-question from Chris.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit f72d19f069f8efaa535aacc719d23d469b0d9f18)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_ddi.c | 11 ++---------
- 1 file changed, 2 insertions(+), 9 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
-index b361c0862373..b6281d9e4d62 100644
---- a/drivers/gpu/drm/i915/intel_ddi.c
-+++ b/drivers/gpu/drm/i915/intel_ddi.c
-@@ -94,15 +94,8 @@ static void intel_prepare_ddi_buffers(struct drm_device *dev, enum port port,
- 		hsw_ddi_translations_fdi :
- 		hsw_ddi_translations_dp);
- 
--	DRM_DEBUG_DRIVER("Initializing DDI buffers for port %c in %s mode\n",
--			port_name(port),
--			use_fdi_mode ? "FDI" : "DP");
--
--	WARN((use_fdi_mode && (port != PORT_E)),
--		"Programming port %c in FDI mode, this probably will not work.\n",
--		port_name(port));
--
--	for (i=0, reg=DDI_BUF_TRANS(port); i < ARRAY_SIZE(hsw_ddi_translations_fdi); i++) {
-+	for (i = 0, reg = DDI_BUF_TRANS(port);
-+	     i < ARRAY_SIZE(hsw_ddi_translations_fdi); i++) {
- 		I915_WRITE(reg, ddi_translations[i]);
- 		reg += 4;
- 	}
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0592-drm-i915-remove-use_fdi_mode-argument-from-intel_pre.patch b/patches.baytrail/0592-drm-i915-remove-use_fdi_mode-argument-from-intel_pre.patch
deleted file mode 100644
index 99ff1a3d0487e..0000000000000
--- a/patches.baytrail/0592-drm-i915-remove-use_fdi_mode-argument-from-intel_pre.patch
+++ /dev/null
@@ -1,59 +0,0 @@
-From 9c2921cb2b4222577217ddc2175a8ff80d3b7c54 Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Mon, 5 Aug 2013 17:25:56 -0300
-Subject: drm/i915: remove use_fdi_mode argument from intel_prepare_ddi_buffers
-
-We set the mode based on the port, and we already pass the port as an
-argument.
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit ad8d270c21aa2f57f0cd578b1737f65c44c34b80)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_ddi.c | 17 +++++------------
- 1 file changed, 5 insertions(+), 12 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
-index b6281d9e4d62..b8c096b4a1de 100644
---- a/drivers/gpu/drm/i915/intel_ddi.c
-+++ b/drivers/gpu/drm/i915/intel_ddi.c
-@@ -84,15 +84,14 @@ static enum port intel_ddi_get_encoder_port(struct intel_encoder *intel_encoder)
-  * in either FDI or DP modes only, as HDMI connections will work with both
-  * of those
-  */
--static void intel_prepare_ddi_buffers(struct drm_device *dev, enum port port,
--				      bool use_fdi_mode)
-+static void intel_prepare_ddi_buffers(struct drm_device *dev, enum port port)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	u32 reg;
- 	int i;
--	const u32 *ddi_translations = ((use_fdi_mode) ?
-+	const u32 *ddi_translations = (port == PORT_E) ?
- 		hsw_ddi_translations_fdi :
--		hsw_ddi_translations_dp);
-+		hsw_ddi_translations_dp;
- 
- 	for (i = 0, reg = DDI_BUF_TRANS(port);
- 	     i < ARRAY_SIZE(hsw_ddi_translations_fdi); i++) {
-@@ -111,14 +110,8 @@ void intel_prepare_ddi(struct drm_device *dev)
- 	if (!HAS_DDI(dev))
- 		return;
- 
--	for (port = PORT_A; port < PORT_E; port++)
--		intel_prepare_ddi_buffers(dev, port, false);
--
--	/* DDI E is the suggested one to work in FDI mode, so program is as such
--	 * by default. It will have to be re-programmed in case a digital DP
--	 * output will be detected on it
--	 */
--	intel_prepare_ddi_buffers(dev, PORT_E, true);
-+	for (port = PORT_A; port <= PORT_E; port++)
-+		intel_prepare_ddi_buffers(dev, port);
- }
- 
- static const long hsw_ddi_buf_ctl_values[] = {
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0593-drm-i915-Rename-I915_CACHE_MLC_LLC-to-L3_LLC-for-Ivy.patch b/patches.baytrail/0593-drm-i915-Rename-I915_CACHE_MLC_LLC-to-L3_LLC-for-Ivy.patch
deleted file mode 100644
index f5001fd65be5a..0000000000000
--- a/patches.baytrail/0593-drm-i915-Rename-I915_CACHE_MLC_LLC-to-L3_LLC-for-Ivy.patch
+++ /dev/null
@@ -1,151 +0,0 @@
-From 627c36ead437f9760b319a3df8c8cda70cd9d741 Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Tue, 6 Aug 2013 13:17:02 +0100
-Subject: drm/i915: Rename I915_CACHE_MLC_LLC to L3_LLC for Ivybridge
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-MLC_LLC was never validated for Sandybridge and was superseded by a new
-level of cacheing for the GPU in Ivybridge. Update our names to be
-consistent with usage, and in the process stop setting the unwanted bit
-on Sandybridge.
-
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-[danvet: s/BUG/WARN_ON(1) bikeshed.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 350ec881d966453bdcf1d3299071e90da4e507b4)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h         |  7 +++++--
- drivers/gpu/drm/i915/i915_gem_context.c |  2 +-
- drivers/gpu/drm/i915/i915_gem_gtt.c     | 37 ++++++++++++++++++++++++++-------
- drivers/gpu/drm/i915/i915_gpu_error.c   |  4 ++--
- 4 files changed, 38 insertions(+), 12 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index ec7692cb2726..9ff09a287671 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -449,8 +449,11 @@ struct intel_device_info {
- 
- enum i915_cache_level {
- 	I915_CACHE_NONE = 0,
--	I915_CACHE_LLC,
--	I915_CACHE_LLC_MLC, /* gen6+, in docs at least! */
-+	I915_CACHE_LLC, /* also used for snoopable memory on non-LLC */
-+	I915_CACHE_L3_LLC, /* gen7+, L3 sits between the domain specifc
-+			      caches, eg sampler/render caches, and the
-+			      large Last-Level-Cache. LLC is coherent with
-+			      the CPU, but L3 is only visible to the GPU. */
- };
- 
- typedef uint32_t gen6_gtt_pte_t;
-diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
-index d1cb28cbc71e..7273a729a039 100644
---- a/drivers/gpu/drm/i915/i915_gem_context.c
-+++ b/drivers/gpu/drm/i915/i915_gem_context.c
-@@ -155,7 +155,7 @@ create_hw_context(struct drm_device *dev,
- 
- 	if (INTEL_INFO(dev)->gen >= 7) {
- 		ret = i915_gem_object_set_cache_level(ctx->obj,
--						      I915_CACHE_LLC_MLC);
-+						      I915_CACHE_L3_LLC);
- 		/* Failure shouldn't ever happen this early */
- 		if (WARN_ON(ret))
- 			goto err_out;
-diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
-index f38cc696be7f..24fb989593f0 100644
---- a/drivers/gpu/drm/i915/i915_gem_gtt.c
-+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
-@@ -43,7 +43,7 @@
- #define GEN6_PTE_UNCACHED		(1 << 1)
- #define HSW_PTE_UNCACHED		(0)
- #define GEN6_PTE_CACHE_LLC		(2 << 1)
--#define GEN6_PTE_CACHE_LLC_MLC		(3 << 1)
-+#define GEN7_PTE_CACHE_L3_LLC		(3 << 1)
- #define GEN6_PTE_ADDR_ENCODE(addr)	GEN6_GTT_ADDR_ENCODE(addr)
- #define HSW_PTE_ADDR_ENCODE(addr)	HSW_GTT_ADDR_ENCODE(addr)
- 
-@@ -56,15 +56,36 @@
- #define HSW_WB_LLC_AGE0			HSW_CACHEABILITY_CONTROL(0x3)
- #define HSW_WB_ELLC_LLC_AGE0		HSW_CACHEABILITY_CONTROL(0xb)
- 
--static gen6_gtt_pte_t gen6_pte_encode(dma_addr_t addr,
--				      enum i915_cache_level level)
-+static gen6_gtt_pte_t snb_pte_encode(dma_addr_t addr,
-+				     enum i915_cache_level level)
- {
- 	gen6_gtt_pte_t pte = GEN6_PTE_VALID;
- 	pte |= GEN6_PTE_ADDR_ENCODE(addr);
- 
- 	switch (level) {
--	case I915_CACHE_LLC_MLC:
--		pte |= GEN6_PTE_CACHE_LLC_MLC;
-+	case I915_CACHE_L3_LLC:
-+	case I915_CACHE_LLC:
-+		pte |= GEN6_PTE_CACHE_LLC;
-+		break;
-+	case I915_CACHE_NONE:
-+		pte |= GEN6_PTE_UNCACHED;
-+		break;
-+	default:
-+		WARN_ON(1);
-+	}
-+
-+	return pte;
-+}
-+
-+static gen6_gtt_pte_t ivb_pte_encode(dma_addr_t addr,
-+				     enum i915_cache_level level)
-+{
-+	gen6_gtt_pte_t pte = GEN6_PTE_VALID;
-+	pte |= GEN6_PTE_ADDR_ENCODE(addr);
-+
-+	switch (level) {
-+	case I915_CACHE_L3_LLC:
-+		pte |= GEN7_PTE_CACHE_L3_LLC;
- 		break;
- 	case I915_CACHE_LLC:
- 		pte |= GEN6_PTE_CACHE_LLC;
-@@ -73,7 +94,7 @@ static gen6_gtt_pte_t gen6_pte_encode(dma_addr_t addr,
- 		pte |= GEN6_PTE_UNCACHED;
- 		break;
- 	default:
--		BUG();
-+		WARN_ON(1);
- 	}
- 
- 	return pte;
-@@ -890,8 +911,10 @@ int i915_gem_gtt_init(struct drm_device *dev)
- 			gtt->base.pte_encode = hsw_pte_encode;
- 		else if (IS_VALLEYVIEW(dev))
- 			gtt->base.pte_encode = byt_pte_encode;
-+		else if (INTEL_INFO(dev)->gen >= 7)
-+			gtt->base.pte_encode = ivb_pte_encode;
- 		else
--			gtt->base.pte_encode = gen6_pte_encode;
-+			gtt->base.pte_encode = snb_pte_encode;
- 	}
- 
- 	ret = gtt->gtt_probe(dev, &gtt->base.total, &gtt->stolen_size,
-diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
-index d970d84da65f..8091485e7e88 100644
---- a/drivers/gpu/drm/i915/i915_gpu_error.c
-+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
-@@ -938,8 +938,8 @@ const char *i915_cache_level_str(int type)
- {
- 	switch (type) {
- 	case I915_CACHE_NONE: return " uncached";
--	case I915_CACHE_LLC: return " snooped (LLC)";
--	case I915_CACHE_LLC_MLC: return " snooped (LLC+MLC)";
-+	case I915_CACHE_LLC: return " snooped or LLC";
-+	case I915_CACHE_L3_LLC: return " L3+LLC";
- 	default: return "";
- 	}
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0594-drm-i915-Export-intel_framebuffer_fini.patch b/patches.baytrail/0594-drm-i915-Export-intel_framebuffer_fini.patch
deleted file mode 100644
index 1bdd7d6a494bc..0000000000000
--- a/patches.baytrail/0594-drm-i915-Export-intel_framebuffer_fini.patch
+++ /dev/null
@@ -1,101 +0,0 @@
-From 05aae3a8db54dfa8c154b6a97ea60e766d806e74 Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Tue, 6 Aug 2013 17:43:07 +0100
-Subject: drm/i915: Export intel_framebuffer_fini
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Rather than open-code the teardown of a framebuffer, export the routine
-from intel_display.c. This then make intel_fbdev symmetric in its use of
-the common intel_framebuffer routines to initialise and clean up the
-struct intel_framebuffer. (And new features need only be added in one
-location!)
-
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit ddfe15677d9c47f2491e401cd773b45e1aac74bf)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 10 +++++++---
- drivers/gpu/drm/i915/intel_drv.h     |  1 +
- drivers/gpu/drm/i915/intel_fb.c      | 15 +++++----------
- 3 files changed, 13 insertions(+), 13 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index bd3591af3395..a5aee8993283 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -9408,13 +9408,17 @@ static void intel_setup_outputs(struct drm_device *dev)
- 	drm_helper_move_panel_connectors_to_head(dev);
- }
- 
-+void intel_framebuffer_fini(struct intel_framebuffer *fb)
-+{
-+	drm_framebuffer_cleanup(&fb->base);
-+	drm_gem_object_unreference_unlocked(&fb->obj->base);
-+}
-+
- static void intel_user_framebuffer_destroy(struct drm_framebuffer *fb)
- {
- 	struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
- 
--	drm_framebuffer_cleanup(fb);
--	drm_gem_object_unreference_unlocked(&intel_fb->obj->base);
--
-+	intel_framebuffer_fini(intel_fb);
- 	kfree(intel_fb);
- }
- 
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index ed33976c194b..54e389de9f42 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -720,6 +720,7 @@ extern int intel_framebuffer_init(struct drm_device *dev,
- 				  struct intel_framebuffer *ifb,
- 				  struct drm_mode_fb_cmd2 *mode_cmd,
- 				  struct drm_i915_gem_object *obj);
-+extern void intel_framebuffer_fini(struct intel_framebuffer *fb);
- extern int intel_fbdev_init(struct drm_device *dev);
- extern void intel_fbdev_initial_config(struct drm_device *dev);
- extern void intel_fbdev_fini(struct drm_device *dev);
-diff --git a/drivers/gpu/drm/i915/intel_fb.c b/drivers/gpu/drm/i915/intel_fb.c
-index f3c97e05b0d8..bc2100007b21 100644
---- a/drivers/gpu/drm/i915/intel_fb.c
-+++ b/drivers/gpu/drm/i915/intel_fb.c
-@@ -193,26 +193,21 @@ static struct drm_fb_helper_funcs intel_fb_helper_funcs = {
- static void intel_fbdev_destroy(struct drm_device *dev,
- 				struct intel_fbdev *ifbdev)
- {
--	struct fb_info *info;
--	struct intel_framebuffer *ifb = &ifbdev->ifb;
--
- 	if (ifbdev->helper.fbdev) {
--		info = ifbdev->helper.fbdev;
-+		struct fb_info *info = ifbdev->helper.fbdev;
-+
- 		unregister_framebuffer(info);
- 		iounmap(info->screen_base);
- 		if (info->cmap.len)
- 			fb_dealloc_cmap(&info->cmap);
-+
- 		framebuffer_release(info);
- 	}
- 
- 	drm_fb_helper_fini(&ifbdev->helper);
- 
--	drm_framebuffer_unregister_private(&ifb->base);
--	drm_framebuffer_cleanup(&ifb->base);
--	if (ifb->obj) {
--		drm_gem_object_unreference_unlocked(&ifb->obj->base);
--		ifb->obj = NULL;
--	}
-+	drm_framebuffer_unregister_private(&ifbdev->ifb.base);
-+	intel_framebuffer_fini(&ifbdev->ifb);
- }
- 
- int intel_fbdev_init(struct drm_device *dev)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0595-drm-i915-Improve-VMA-comments.patch b/patches.baytrail/0595-drm-i915-Improve-VMA-comments.patch
deleted file mode 100644
index 1bffe2e4e84cf..0000000000000
--- a/patches.baytrail/0595-drm-i915-Improve-VMA-comments.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From 57cbd5293aac8908748ed96c2fd6b624aeaf3963 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Wed, 31 Jul 2013 17:00:08 -0700
-Subject: drm/i915: Improve VMA comments
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 0b02e798ffec99b51f2fe931ceb61ca0d22d2a70)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h | 7 ++++++-
- 1 file changed, 6 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 9ff09a287671..62ec760782f5 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -545,7 +545,12 @@ struct i915_hw_ppgtt {
- 	int (*enable)(struct drm_device *dev);
- };
- 
--/* To make things as simple as possible (ie. no refcounting), a VMA's lifetime
-+/**
-+ * A VMA represents a GEM BO that is bound into an address space. Therefore, a
-+ * VMA's presence cannot be guaranteed before binding, or after unbinding the
-+ * object into/from the address space.
-+ *
-+ * To make things as simple as possible (ie. no refcounting), a VMA's lifetime
-  * will always be <= an objects lifetime. So object refcounting should cover us.
-  */
- struct i915_vma {
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0596-drm-gem-create-drm_gem_dumb_destroy.patch b/patches.baytrail/0596-drm-gem-create-drm_gem_dumb_destroy.patch
deleted file mode 100644
index db964ac123212..0000000000000
--- a/patches.baytrail/0596-drm-gem-create-drm_gem_dumb_destroy.patch
+++ /dev/null
@@ -1,688 +0,0 @@
-From 97a39ea0ac420e99b5201704f0df265e191da03e Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Tue, 16 Jul 2013 09:12:04 +0200
-Subject: drm/gem: create drm_gem_dumb_destroy
-
-All the gem based kms drivers really want the same function to
-destroy a dumb framebuffer backing storage object.
-
-So give it to them and roll it out in all drivers.
-
-This still leaves the option open for kms drivers which don't use GEM
-for backing storage, but it does decently simplify matters for gem
-drivers.
-
-Acked-by: Inki Dae <inki.dae@samsung.com>
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Cc: Intel Graphics Development <intel-gfx@lists.freedesktop.org>
-Cc: Ben Skeggs <skeggsb@gmail.com>
-Reviwed-by: Rob Clark <robdclark@gmail.com>
-Cc: Alex Deucher <alexdeucher@gmail.com>
-Acked-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit 43387b37fa2d0f368142b8fa8c9440da92e5381b)
-Signed-off-by: James Ausmus <james.ausmus@intel.com>
-
-Conflicts:
-	drivers/gpu/drm/exynos/exynos_drm_gem.c
-	(context changes)
-	drivers/gpu/drm/rcar-du/rcar_du_drv.c
-	(we don't have this driver in our tree)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/ast/ast_drv.c             |    2 +-
- drivers/gpu/drm/ast/ast_drv.h             |    3 ---
- drivers/gpu/drm/ast/ast_main.c            |    7 -------
- drivers/gpu/drm/cirrus/cirrus_drv.c       |    2 +-
- drivers/gpu/drm/cirrus/cirrus_drv.h       |    3 ---
- drivers/gpu/drm/cirrus/cirrus_main.c      |    7 -------
- drivers/gpu/drm/drm_gem.c                 |   14 ++++++++++++++
- drivers/gpu/drm/drm_gem_cma_helper.c      |   10 ----------
- drivers/gpu/drm/exynos/exynos_drm_drv.c   |    2 +-
- drivers/gpu/drm/exynos/exynos_drm_gem.c   |   22 ----------------------
- drivers/gpu/drm/exynos/exynos_drm_gem.h   |    9 ---------
- drivers/gpu/drm/gma500/gem.c              |   17 -----------------
- drivers/gpu/drm/gma500/psb_drv.c          |    2 +-
- drivers/gpu/drm/gma500/psb_drv.h          |    2 --
- drivers/gpu/drm/i915/i915_drv.c           |    2 +-
- drivers/gpu/drm/i915/i915_drv.h           |    2 --
- drivers/gpu/drm/i915/i915_gem.c           |    7 -------
- drivers/gpu/drm/mgag200/mgag200_drv.c     |    2 +-
- drivers/gpu/drm/mgag200/mgag200_drv.h     |    3 ---
- drivers/gpu/drm/mgag200/mgag200_main.c    |    7 -------
- drivers/gpu/drm/nouveau/nouveau_display.c |    7 -------
- drivers/gpu/drm/nouveau/nouveau_display.h |    2 --
- drivers/gpu/drm/nouveau/nouveau_drm.c     |    2 +-
- drivers/gpu/drm/omapdrm/omap_drv.c        |    2 +-
- drivers/gpu/drm/omapdrm/omap_drv.h        |    2 --
- drivers/gpu/drm/omapdrm/omap_gem.c        |   15 ---------------
- drivers/gpu/drm/qxl/qxl_drv.c             |    2 +-
- drivers/gpu/drm/qxl/qxl_drv.h             |    3 ---
- drivers/gpu/drm/qxl/qxl_dumb.c            |    7 -------
- drivers/gpu/drm/radeon/radeon.h           |    3 ---
- drivers/gpu/drm/radeon/radeon_drv.c       |    5 +----
- drivers/gpu/drm/radeon/radeon_gem.c       |    7 -------
- drivers/gpu/drm/shmobile/shmob_drm_drv.c  |    2 +-
- drivers/gpu/drm/tilcdc/tilcdc_drv.c       |    2 +-
- drivers/gpu/drm/udl/udl_drv.c             |    2 +-
- drivers/gpu/drm/udl/udl_drv.h             |    2 --
- drivers/gpu/drm/udl/udl_gem.c             |    6 ------
- drivers/gpu/host1x/drm/drm.c              |    2 +-
- drivers/gpu/host1x/drm/gem.c              |    6 ------
- drivers/gpu/host1x/drm/gem.h              |    2 --
- drivers/staging/imx-drm/imx-drm-core.c    |    2 +-
- include/drm/drmP.h                        |    3 +++
- include/drm/drm_gem_cma_helper.h          |    8 --------
- 43 files changed, 32 insertions(+), 187 deletions(-)
-
---- a/drivers/gpu/drm/ast/ast_drv.c
-+++ b/drivers/gpu/drm/ast/ast_drv.c
-@@ -216,7 +216,7 @@ static struct drm_driver driver = {
- 	.gem_free_object = ast_gem_free_object,
- 	.dumb_create = ast_dumb_create,
- 	.dumb_map_offset = ast_dumb_mmap_offset,
--	.dumb_destroy = ast_dumb_destroy,
-+	.dumb_destroy = drm_gem_dumb_destroy,
- 
- };
- 
---- a/drivers/gpu/drm/ast/ast_drv.h
-+++ b/drivers/gpu/drm/ast/ast_drv.h
-@@ -322,9 +322,6 @@ ast_bo(struct ttm_buffer_object *bo)
- extern int ast_dumb_create(struct drm_file *file,
- 			   struct drm_device *dev,
- 			   struct drm_mode_create_dumb *args);
--extern int ast_dumb_destroy(struct drm_file *file,
--			    struct drm_device *dev,
--			    uint32_t handle);
- 
- extern int ast_gem_init_object(struct drm_gem_object *obj);
- extern void ast_gem_free_object(struct drm_gem_object *obj);
---- a/drivers/gpu/drm/ast/ast_main.c
-+++ b/drivers/gpu/drm/ast/ast_main.c
-@@ -449,13 +449,6 @@ int ast_dumb_create(struct drm_file *fil
- 	return 0;
- }
- 
--int ast_dumb_destroy(struct drm_file *file,
--		     struct drm_device *dev,
--		     uint32_t handle)
--{
--	return drm_gem_handle_delete(file, handle);
--}
--
- int ast_gem_init_object(struct drm_gem_object *obj)
- {
- 	BUG();
---- a/drivers/gpu/drm/cirrus/cirrus_drv.c
-+++ b/drivers/gpu/drm/cirrus/cirrus_drv.c
-@@ -102,7 +102,7 @@ static struct drm_driver driver = {
- 	.gem_free_object = cirrus_gem_free_object,
- 	.dumb_create = cirrus_dumb_create,
- 	.dumb_map_offset = cirrus_dumb_mmap_offset,
--	.dumb_destroy = cirrus_dumb_destroy,
-+	.dumb_destroy = drm_gem_dumb_destroy,
- };
- 
- static struct pci_driver cirrus_pci_driver = {
---- a/drivers/gpu/drm/cirrus/cirrus_drv.h
-+++ b/drivers/gpu/drm/cirrus/cirrus_drv.h
-@@ -203,9 +203,6 @@ int cirrus_gem_create(struct drm_device
- int cirrus_dumb_create(struct drm_file *file,
- 		    struct drm_device *dev,
- 		       struct drm_mode_create_dumb *args);
--int cirrus_dumb_destroy(struct drm_file *file,
--		     struct drm_device *dev,
--			uint32_t handle);
- 
- int cirrus_framebuffer_init(struct drm_device *dev,
- 			   struct cirrus_framebuffer *gfb,
---- a/drivers/gpu/drm/cirrus/cirrus_main.c
-+++ b/drivers/gpu/drm/cirrus/cirrus_main.c
-@@ -255,13 +255,6 @@ int cirrus_dumb_create(struct drm_file *
- 	return 0;
- }
- 
--int cirrus_dumb_destroy(struct drm_file *file,
--		     struct drm_device *dev,
--		     uint32_t handle)
--{
--	return drm_gem_handle_delete(file, handle);
--}
--
- int cirrus_gem_init_object(struct drm_gem_object *obj)
- {
- 	BUG();
---- a/drivers/gpu/drm/drm_gem.c
-+++ b/drivers/gpu/drm/drm_gem.c
-@@ -244,6 +244,20 @@ drm_gem_handle_delete(struct drm_file *f
- EXPORT_SYMBOL(drm_gem_handle_delete);
- 
- /**
-+ * drm_gem_dumb_destroy - dumb fb callback helper for gem based drivers
-+ *
-+ * This implements the ->dumb_destroy kms driver callback for drivers which use
-+ * gem to manage their backing storage.
-+ */
-+int drm_gem_dumb_destroy(struct drm_file *file,
-+			 struct drm_device *dev,
-+			 uint32_t handle)
-+{
-+	return drm_gem_handle_delete(file, handle);
-+}
-+EXPORT_SYMBOL(drm_gem_dumb_destroy);
-+
-+/**
-  * Create a handle for this object. This adds a handle reference
-  * to the object, which includes a regular reference count. Callers
-  * will likely want to dereference the object afterwards.
---- a/drivers/gpu/drm/drm_gem_cma_helper.c
-+++ b/drivers/gpu/drm/drm_gem_cma_helper.c
-@@ -284,16 +284,6 @@ int drm_gem_cma_mmap(struct file *filp,
- }
- EXPORT_SYMBOL_GPL(drm_gem_cma_mmap);
- 
--/*
-- * drm_gem_cma_dumb_destroy - (struct drm_driver)->dumb_destroy callback function
-- */
--int drm_gem_cma_dumb_destroy(struct drm_file *file_priv,
--		struct drm_device *drm, unsigned int handle)
--{
--	return drm_gem_handle_delete(file_priv, handle);
--}
--EXPORT_SYMBOL_GPL(drm_gem_cma_dumb_destroy);
--
- #ifdef CONFIG_DEBUG_FS
- void drm_gem_cma_describe(struct drm_gem_cma_object *cma_obj, struct seq_file *m)
- {
---- a/drivers/gpu/drm/exynos/exynos_drm_drv.c
-+++ b/drivers/gpu/drm/exynos/exynos_drm_drv.c
-@@ -276,7 +276,7 @@ static struct drm_driver exynos_drm_driv
- 	.gem_vm_ops		= &exynos_drm_gem_vm_ops,
- 	.dumb_create		= exynos_drm_gem_dumb_create,
- 	.dumb_map_offset	= exynos_drm_gem_dumb_map_offset,
--	.dumb_destroy		= exynos_drm_gem_dumb_destroy,
-+	.dumb_destroy		= drm_gem_dumb_destroy,
- 	.prime_handle_to_fd	= drm_gem_prime_handle_to_fd,
- 	.prime_fd_to_handle	= drm_gem_prime_fd_to_handle,
- 	.gem_prime_export	= exynos_dmabuf_prime_export,
---- a/drivers/gpu/drm/exynos/exynos_drm_gem.c
-+++ b/drivers/gpu/drm/exynos/exynos_drm_gem.c
-@@ -735,28 +735,6 @@ unlock:
- 	return ret;
- }
- 
--int exynos_drm_gem_dumb_destroy(struct drm_file *file_priv,
--				struct drm_device *dev,
--				unsigned int handle)
--{
--	int ret;
--
--	DRM_DEBUG_KMS("%s\n", __FILE__);
--
--	/*
--	 * obj->refcount and obj->handle_count are decreased and
--	 * if both them are 0 then exynos_drm_gem_free_object()
--	 * would be called by callback to release resources.
--	 */
--	ret = drm_gem_handle_delete(file_priv, handle);
--	if (ret < 0) {
--		DRM_ERROR("failed to delete drm_gem_handle.\n");
--		return ret;
--	}
--
--	return 0;
--}
--
- int exynos_drm_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
- {
- 	struct drm_gem_object *obj = vma->vm_private_data;
---- a/drivers/gpu/drm/exynos/exynos_drm_gem.h
-+++ b/drivers/gpu/drm/exynos/exynos_drm_gem.h
-@@ -151,15 +151,6 @@ int exynos_drm_gem_dumb_map_offset(struc
- 				   struct drm_device *dev, uint32_t handle,
- 				   uint64_t *offset);
- 
--/*
-- * destroy memory region allocated.
-- *	- a gem handle and physical memory region pointed by a gem object
-- *	would be released by drm_gem_handle_delete().
-- */
--int exynos_drm_gem_dumb_destroy(struct drm_file *file_priv,
--				struct drm_device *dev,
--				unsigned int handle);
--
- /* page fault handler and mmap fault address(virtual) to physical memory. */
- int exynos_drm_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf);
- 
---- a/drivers/gpu/drm/gma500/gem.c
-+++ b/drivers/gpu/drm/gma500/gem.c
-@@ -162,23 +162,6 @@ int psb_gem_dumb_create(struct drm_file
- }
- 
- /**
-- *	psb_gem_dumb_destroy	-	destroy a dumb buffer
-- *	@file: client file
-- *	@dev: our DRM device
-- *	@handle: the object handle
-- *
-- *	Destroy a handle that was created via psb_gem_dumb_create, at least
-- *	we hope it was created that way. i915 seems to assume the caller
-- *	does the checking but that might be worth review ! FIXME
-- */
--int psb_gem_dumb_destroy(struct drm_file *file, struct drm_device *dev,
--			uint32_t handle)
--{
--	/* No special work needed, drop the reference and see what falls out */
--	return drm_gem_handle_delete(file, handle);
--}
--
--/**
-  *	psb_gem_fault		-	pagefault handler for GEM objects
-  *	@vma: the VMA of the GEM object
-  *	@vmf: fault detail
---- a/drivers/gpu/drm/gma500/psb_drv.c
-+++ b/drivers/gpu/drm/gma500/psb_drv.c
-@@ -652,7 +652,7 @@ static struct drm_driver driver = {
- 	.gem_vm_ops = &psb_gem_vm_ops,
- 	.dumb_create = psb_gem_dumb_create,
- 	.dumb_map_offset = psb_gem_dumb_map_gtt,
--	.dumb_destroy = psb_gem_dumb_destroy,
-+	.dumb_destroy = drm_gem_dumb_destroy,
- 	.fops = &psb_gem_fops,
- 	.name = DRIVER_NAME,
- 	.desc = DRIVER_DESC,
---- a/drivers/gpu/drm/gma500/psb_drv.h
-+++ b/drivers/gpu/drm/gma500/psb_drv.h
-@@ -838,8 +838,6 @@ extern int psb_gem_get_aperture(struct d
- 			struct drm_file *file);
- extern int psb_gem_dumb_create(struct drm_file *file, struct drm_device *dev,
- 			struct drm_mode_create_dumb *args);
--extern int psb_gem_dumb_destroy(struct drm_file *file, struct drm_device *dev,
--			uint32_t handle);
- extern int psb_gem_dumb_map_gtt(struct drm_file *file, struct drm_device *dev,
- 			uint32_t handle, uint64_t *offset);
- extern int psb_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf);
---- a/drivers/gpu/drm/i915/i915_drv.c
-+++ b/drivers/gpu/drm/i915/i915_drv.c
-@@ -1038,7 +1038,7 @@ static struct drm_driver driver = {
- 
- 	.dumb_create = i915_gem_dumb_create,
- 	.dumb_map_offset = i915_gem_mmap_gtt,
--	.dumb_destroy = i915_gem_dumb_destroy,
-+	.dumb_destroy = drm_gem_dumb_destroy,
- 	.ioctls = i915_ioctls,
- 	.fops = &i915_driver_fops,
- 	.name = DRIVER_NAME,
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1775,8 +1775,6 @@ int i915_gem_dumb_create(struct drm_file
- 			 struct drm_mode_create_dumb *args);
- int i915_gem_mmap_gtt(struct drm_file *file_priv, struct drm_device *dev,
- 		      uint32_t handle, uint64_t *offset);
--int i915_gem_dumb_destroy(struct drm_file *file_priv, struct drm_device *dev,
--			  uint32_t handle);
- /**
-  * Returns true if seq1 is later than seq2.
-  */
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -245,13 +245,6 @@ i915_gem_dumb_create(struct drm_file *fi
- 			       args->size, &args->handle);
- }
- 
--int i915_gem_dumb_destroy(struct drm_file *file,
--			  struct drm_device *dev,
--			  uint32_t handle)
--{
--	return drm_gem_handle_delete(file, handle);
--}
--
- /**
-  * Creates a new mm object and returns a handle to it.
-  */
---- a/drivers/gpu/drm/mgag200/mgag200_drv.c
-+++ b/drivers/gpu/drm/mgag200/mgag200_drv.c
-@@ -104,7 +104,7 @@ static struct drm_driver driver = {
- 	.gem_free_object = mgag200_gem_free_object,
- 	.dumb_create = mgag200_dumb_create,
- 	.dumb_map_offset = mgag200_dumb_mmap_offset,
--	.dumb_destroy = mgag200_dumb_destroy,
-+	.dumb_destroy = drm_gem_dumb_destroy,
- };
- 
- static struct pci_driver mgag200_pci_driver = {
---- a/drivers/gpu/drm/mgag200/mgag200_drv.h
-+++ b/drivers/gpu/drm/mgag200/mgag200_drv.h
-@@ -248,9 +248,6 @@ int mgag200_gem_init_object(struct drm_g
- int mgag200_dumb_create(struct drm_file *file,
- 			struct drm_device *dev,
- 			struct drm_mode_create_dumb *args);
--int mgag200_dumb_destroy(struct drm_file *file,
--			 struct drm_device *dev,
--			 uint32_t handle);
- void mgag200_gem_free_object(struct drm_gem_object *obj);
- int
- mgag200_dumb_mmap_offset(struct drm_file *file,
---- a/drivers/gpu/drm/mgag200/mgag200_main.c
-+++ b/drivers/gpu/drm/mgag200/mgag200_main.c
-@@ -291,13 +291,6 @@ int mgag200_dumb_create(struct drm_file
- 	return 0;
- }
- 
--int mgag200_dumb_destroy(struct drm_file *file,
--		     struct drm_device *dev,
--		     uint32_t handle)
--{
--	return drm_gem_handle_delete(file, handle);
--}
--
- int mgag200_gem_init_object(struct drm_gem_object *obj)
- {
- 	BUG();
---- a/drivers/gpu/drm/nouveau/nouveau_display.c
-+++ b/drivers/gpu/drm/nouveau/nouveau_display.c
-@@ -689,13 +689,6 @@ nouveau_display_dumb_create(struct drm_f
- }
- 
- int
--nouveau_display_dumb_destroy(struct drm_file *file_priv, struct drm_device *dev,
--			     uint32_t handle)
--{
--	return drm_gem_handle_delete(file_priv, handle);
--}
--
--int
- nouveau_display_dumb_map_offset(struct drm_file *file_priv,
- 				struct drm_device *dev,
- 				uint32_t handle, uint64_t *poffset)
---- a/drivers/gpu/drm/nouveau/nouveau_display.h
-+++ b/drivers/gpu/drm/nouveau/nouveau_display.h
-@@ -68,8 +68,6 @@ int  nouveau_display_dumb_create(struct
- 				 struct drm_mode_create_dumb *args);
- int  nouveau_display_dumb_map_offset(struct drm_file *, struct drm_device *,
- 				     u32 handle, u64 *offset);
--int  nouveau_display_dumb_destroy(struct drm_file *, struct drm_device *,
--				  u32 handle);
- 
- void nouveau_hdmi_mode_set(struct drm_encoder *, struct drm_display_mode *);
- 
---- a/drivers/gpu/drm/nouveau/nouveau_drm.c
-+++ b/drivers/gpu/drm/nouveau/nouveau_drm.c
-@@ -714,7 +714,7 @@ driver = {
- 
- 	.dumb_create = nouveau_display_dumb_create,
- 	.dumb_map_offset = nouveau_display_dumb_map_offset,
--	.dumb_destroy = nouveau_display_dumb_destroy,
-+	.dumb_destroy = drm_gem_dumb_destroy,
- 
- 	.name = DRIVER_NAME,
- 	.desc = DRIVER_DESC,
---- a/drivers/gpu/drm/omapdrm/omap_drv.c
-+++ b/drivers/gpu/drm/omapdrm/omap_drv.c
-@@ -618,7 +618,7 @@ static struct drm_driver omap_drm_driver
- 		.gem_vm_ops = &omap_gem_vm_ops,
- 		.dumb_create = omap_gem_dumb_create,
- 		.dumb_map_offset = omap_gem_dumb_map_offset,
--		.dumb_destroy = omap_gem_dumb_destroy,
-+		.dumb_destroy = drm_gem_dumb_destroy,
- 		.ioctls = ioctls,
- 		.num_ioctls = DRM_OMAP_NUM_IOCTLS,
- 		.fops = &omapdriver_fops,
---- a/drivers/gpu/drm/omapdrm/omap_drv.h
-+++ b/drivers/gpu/drm/omapdrm/omap_drv.h
-@@ -224,8 +224,6 @@ int omap_gem_init_object(struct drm_gem_
- void *omap_gem_vaddr(struct drm_gem_object *obj);
- int omap_gem_dumb_map_offset(struct drm_file *file, struct drm_device *dev,
- 		uint32_t handle, uint64_t *offset);
--int omap_gem_dumb_destroy(struct drm_file *file, struct drm_device *dev,
--		uint32_t handle);
- int omap_gem_dumb_create(struct drm_file *file, struct drm_device *dev,
- 		struct drm_mode_create_dumb *args);
- int omap_gem_mmap(struct file *filp, struct vm_area_struct *vma);
---- a/drivers/gpu/drm/omapdrm/omap_gem.c
-+++ b/drivers/gpu/drm/omapdrm/omap_gem.c
-@@ -629,21 +629,6 @@ int omap_gem_dumb_create(struct drm_file
- }
- 
- /**
-- * omap_gem_dumb_destroy	-	destroy a dumb buffer
-- * @file: client file
-- * @dev: our DRM device
-- * @handle: the object handle
-- *
-- * Destroy a handle that was created via omap_gem_dumb_create.
-- */
--int omap_gem_dumb_destroy(struct drm_file *file, struct drm_device *dev,
--		uint32_t handle)
--{
--	/* No special work needed, drop the reference and see what falls out */
--	return drm_gem_handle_delete(file, handle);
--}
--
--/**
-  * omap_gem_dumb_map	-	buffer mapping for dumb interface
-  * @file: our drm client file
-  * @dev: drm device
---- a/drivers/gpu/drm/qxl/qxl_drv.c
-+++ b/drivers/gpu/drm/qxl/qxl_drv.c
-@@ -99,7 +99,7 @@ static struct drm_driver qxl_driver = {
- 
- 	.dumb_create = qxl_mode_dumb_create,
- 	.dumb_map_offset = qxl_mode_dumb_mmap,
--	.dumb_destroy = qxl_mode_dumb_destroy,
-+	.dumb_destroy = drm_gem_dumb_destroy,
- #if defined(CONFIG_DEBUG_FS)
- 	.debugfs_init = qxl_debugfs_init,
- 	.debugfs_cleanup = qxl_debugfs_takedown,
---- a/drivers/gpu/drm/qxl/qxl_drv.h
-+++ b/drivers/gpu/drm/qxl/qxl_drv.h
-@@ -409,9 +409,6 @@ int qxl_bo_kmap(struct qxl_bo *bo, void
- int qxl_mode_dumb_create(struct drm_file *file_priv,
- 			 struct drm_device *dev,
- 			 struct drm_mode_create_dumb *args);
--int qxl_mode_dumb_destroy(struct drm_file *file_priv,
--			  struct drm_device *dev,
--			  uint32_t handle);
- int qxl_mode_dumb_mmap(struct drm_file *filp,
- 		       struct drm_device *dev,
- 		       uint32_t handle, uint64_t *offset_p);
---- a/drivers/gpu/drm/qxl/qxl_dumb.c
-+++ b/drivers/gpu/drm/qxl/qxl_dumb.c
-@@ -68,13 +68,6 @@ int qxl_mode_dumb_create(struct drm_file
- 	return 0;
- }
- 
--int qxl_mode_dumb_destroy(struct drm_file *file_priv,
--			     struct drm_device *dev,
--			     uint32_t handle)
--{
--	return drm_gem_handle_delete(file_priv, handle);
--}
--
- int qxl_mode_dumb_mmap(struct drm_file *file_priv,
- 		       struct drm_device *dev,
- 		       uint32_t handle, uint64_t *offset_p)
---- a/drivers/gpu/drm/radeon/radeon.h
-+++ b/drivers/gpu/drm/radeon/radeon.h
-@@ -444,9 +444,6 @@ int radeon_mode_dumb_create(struct drm_f
- int radeon_mode_dumb_mmap(struct drm_file *filp,
- 			  struct drm_device *dev,
- 			  uint32_t handle, uint64_t *offset_p);
--int radeon_mode_dumb_destroy(struct drm_file *file_priv,
--			     struct drm_device *dev,
--			     uint32_t handle);
- 
- /*
-  * Semaphores.
---- a/drivers/gpu/drm/radeon/radeon_drv.c
-+++ b/drivers/gpu/drm/radeon/radeon_drv.c
-@@ -119,9 +119,6 @@ int radeon_mode_dumb_mmap(struct drm_fil
- int radeon_mode_dumb_create(struct drm_file *file_priv,
- 			    struct drm_device *dev,
- 			    struct drm_mode_create_dumb *args);
--int radeon_mode_dumb_destroy(struct drm_file *file_priv,
--			     struct drm_device *dev,
--			     uint32_t handle);
- struct sg_table *radeon_gem_prime_get_sg_table(struct drm_gem_object *obj);
- struct drm_gem_object *radeon_gem_prime_import_sg_table(struct drm_device *dev,
- 							size_t size,
-@@ -414,7 +411,7 @@ static struct drm_driver kms_driver = {
- 	.dma_ioctl = radeon_dma_ioctl_kms,
- 	.dumb_create = radeon_mode_dumb_create,
- 	.dumb_map_offset = radeon_mode_dumb_mmap,
--	.dumb_destroy = radeon_mode_dumb_destroy,
-+	.dumb_destroy = drm_gem_dumb_destroy,
- 	.fops = &radeon_driver_kms_fops,
- 
- 	.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
---- a/drivers/gpu/drm/radeon/radeon_gem.c
-+++ b/drivers/gpu/drm/radeon/radeon_gem.c
-@@ -570,13 +570,6 @@ int radeon_mode_dumb_create(struct drm_f
- 	return 0;
- }
- 
--int radeon_mode_dumb_destroy(struct drm_file *file_priv,
--			     struct drm_device *dev,
--			     uint32_t handle)
--{
--	return drm_gem_handle_delete(file_priv, handle);
--}
--
- #if defined(CONFIG_DEBUG_FS)
- static int radeon_debugfs_gem_info(struct seq_file *m, void *data)
- {
---- a/drivers/gpu/drm/shmobile/shmob_drm_drv.c
-+++ b/drivers/gpu/drm/shmobile/shmob_drm_drv.c
-@@ -285,7 +285,7 @@ static struct drm_driver shmob_drm_drive
- 	.gem_vm_ops		= &drm_gem_cma_vm_ops,
- 	.dumb_create		= drm_gem_cma_dumb_create,
- 	.dumb_map_offset	= drm_gem_cma_dumb_map_offset,
--	.dumb_destroy		= drm_gem_cma_dumb_destroy,
-+	.dumb_destroy		= drm_gem_dumb_destroy,
- 	.fops			= &shmob_drm_fops,
- 	.name			= "shmob-drm",
- 	.desc			= "Renesas SH Mobile DRM",
---- a/drivers/gpu/drm/tilcdc/tilcdc_drv.c
-+++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
-@@ -490,7 +490,7 @@ static struct drm_driver tilcdc_driver =
- 	.gem_vm_ops         = &drm_gem_cma_vm_ops,
- 	.dumb_create        = drm_gem_cma_dumb_create,
- 	.dumb_map_offset    = drm_gem_cma_dumb_map_offset,
--	.dumb_destroy       = drm_gem_cma_dumb_destroy,
-+	.dumb_destroy       = drm_gem_dumb_destroy,
- #ifdef CONFIG_DEBUG_FS
- 	.debugfs_init       = tilcdc_debugfs_init,
- 	.debugfs_cleanup    = tilcdc_debugfs_cleanup,
---- a/drivers/gpu/drm/udl/udl_drv.c
-+++ b/drivers/gpu/drm/udl/udl_drv.c
-@@ -84,7 +84,7 @@ static struct drm_driver driver = {
- 
- 	.dumb_create = udl_dumb_create,
- 	.dumb_map_offset = udl_gem_mmap,
--	.dumb_destroy = udl_dumb_destroy,
-+	.dumb_destroy = drm_gem_dumb_destroy,
- 	.fops = &udl_driver_fops,
- 
- 	.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
---- a/drivers/gpu/drm/udl/udl_drv.h
-+++ b/drivers/gpu/drm/udl/udl_drv.h
-@@ -114,8 +114,6 @@ int udl_dumb_create(struct drm_file *fil
- 		    struct drm_mode_create_dumb *args);
- int udl_gem_mmap(struct drm_file *file_priv, struct drm_device *dev,
- 		 uint32_t handle, uint64_t *offset);
--int udl_dumb_destroy(struct drm_file *file_priv, struct drm_device *dev,
--		     uint32_t handle);
- 
- int udl_gem_init_object(struct drm_gem_object *obj);
- void udl_gem_free_object(struct drm_gem_object *gem_obj);
---- a/drivers/gpu/drm/udl/udl_gem.c
-+++ b/drivers/gpu/drm/udl/udl_gem.c
-@@ -66,12 +66,6 @@ int udl_dumb_create(struct drm_file *fil
- 			      args->size, &args->handle);
- }
- 
--int udl_dumb_destroy(struct drm_file *file, struct drm_device *dev,
--		     uint32_t handle)
--{
--	return drm_gem_handle_delete(file, handle);
--}
--
- int udl_drm_gem_mmap(struct file *filp, struct vm_area_struct *vma)
- {
- 	int ret;
---- a/drivers/gpu/host1x/drm/drm.c
-+++ b/drivers/gpu/host1x/drm/drm.c
-@@ -625,7 +625,7 @@ struct drm_driver tegra_drm_driver = {
- 	.gem_vm_ops = &tegra_bo_vm_ops,
- 	.dumb_create = tegra_bo_dumb_create,
- 	.dumb_map_offset = tegra_bo_dumb_map_offset,
--	.dumb_destroy = tegra_bo_dumb_destroy,
-+	.dumb_destroy = drm_gem_dumb_destroy,
- 
- 	.ioctls = tegra_drm_ioctls,
- 	.num_ioctls = ARRAY_SIZE(tegra_drm_ioctls),
---- a/drivers/gpu/host1x/drm/gem.c
-+++ b/drivers/gpu/host1x/drm/gem.c
-@@ -261,9 +261,3 @@ int tegra_drm_mmap(struct file *file, st
- 
- 	return ret;
- }
--
--int tegra_bo_dumb_destroy(struct drm_file *file, struct drm_device *drm,
--			  unsigned int handle)
--{
--	return drm_gem_handle_delete(file, handle);
--}
---- a/drivers/gpu/host1x/drm/gem.h
-+++ b/drivers/gpu/host1x/drm/gem.h
-@@ -49,8 +49,6 @@ int tegra_bo_dumb_create(struct drm_file
- 			 struct drm_mode_create_dumb *args);
- int tegra_bo_dumb_map_offset(struct drm_file *file, struct drm_device *drm,
- 			     uint32_t handle, uint64_t *offset);
--int tegra_bo_dumb_destroy(struct drm_file *file, struct drm_device *drm,
--			  unsigned int handle);
- 
- int tegra_drm_mmap(struct file *file, struct vm_area_struct *vma);
- 
---- a/drivers/staging/imx-drm/imx-drm-core.c
-+++ b/drivers/staging/imx-drm/imx-drm-core.c
-@@ -801,7 +801,7 @@ static struct drm_driver imx_drm_driver
- 	.gem_vm_ops		= &drm_gem_cma_vm_ops,
- 	.dumb_create		= drm_gem_cma_dumb_create,
- 	.dumb_map_offset	= drm_gem_cma_dumb_map_offset,
--	.dumb_destroy		= drm_gem_cma_dumb_destroy,
-+	.dumb_destroy		= drm_gem_dumb_destroy,
- 
- 	.get_vblank_counter	= drm_vblank_count,
- 	.enable_vblank		= imx_drm_enable_vblank,
---- a/include/drm/drmP.h
-+++ b/include/drm/drmP.h
-@@ -1589,6 +1589,9 @@ extern int drm_prime_sg_to_page_addr_arr
- extern struct sg_table *drm_prime_pages_to_sg(struct page **pages, int nr_pages);
- extern void drm_prime_gem_destroy(struct drm_gem_object *obj, struct sg_table *sg);
- 
-+int drm_gem_dumb_destroy(struct drm_file *file,
-+			 struct drm_device *dev,
-+			 uint32_t handle);
- 
- void drm_prime_init_file_private(struct drm_prime_file_private *prime_fpriv);
- void drm_prime_destroy_file_private(struct drm_prime_file_private *prime_fpriv);
---- a/include/drm/drm_gem_cma_helper.h
-+++ b/include/drm/drm_gem_cma_helper.h
-@@ -30,14 +30,6 @@ int drm_gem_cma_dumb_map_offset(struct d
- /* set vm_flags and we can change the vm attribute to other one at here. */
- int drm_gem_cma_mmap(struct file *filp, struct vm_area_struct *vma);
- 
--/*
-- * destroy memory region allocated.
-- *	- a gem handle and physical memory region pointed by a gem object
-- *	would be released by drm_gem_handle_delete().
-- */
--int drm_gem_cma_dumb_destroy(struct drm_file *file_priv,
--		struct drm_device *drm, unsigned int handle);
--
- /* allocate physical memory. */
- struct drm_gem_cma_object *drm_gem_cma_create(struct drm_device *drm,
- 		unsigned int size);
diff --git a/patches.baytrail/0597-drm-mm-add-best_match-flag-to-drm_mm_insert_node.patch b/patches.baytrail/0597-drm-mm-add-best_match-flag-to-drm_mm_insert_node.patch
deleted file mode 100644
index aef83e12e832c..0000000000000
--- a/patches.baytrail/0597-drm-mm-add-best_match-flag-to-drm_mm_insert_node.patch
+++ /dev/null
@@ -1,383 +0,0 @@
-From e14dfda46c77534376ee238386424a17b3986b12 Mon Sep 17 00:00:00 2001
-From: David Herrmann <dh.herrmann@gmail.com>
-Date: Sat, 27 Jul 2013 13:36:27 +0200
-Subject: drm/mm: add "best_match" flag to drm_mm_insert_node()
-
-Add a "best_match" flag similar to the drm_mm_search_*() helpers so we
-can convert TTM to use them in follow up patches. We can also inline the
-non-generic helpers and move them into the header to allow compile-time
-optimizations.
-
-To make calls to drm_mm_{search,insert}_node() more readable, this
-converts the boolean argument to a flagset. There are pending patches that
-add additional flags for top-down allocators and more.
-
-v2:
- - use flag parameter instead of boolean "best_match"
- - convert *_search_free() helpers to also use flags argument
-
-Signed-off-by: David Herrmann <dh.herrmann@gmail.com>
-Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit 31e5d7c67bd492fd0b2988440e21e31809c7c9af)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_mm.c               | 37 ++++++++---------------
- drivers/gpu/drm/drm_vma_manager.c      |  4 +--
- drivers/gpu/drm/i915/i915_gem.c        |  3 +-
- drivers/gpu/drm/i915/i915_gem_stolen.c | 12 +++++---
- drivers/gpu/drm/sis/sis_mm.c           |  6 ++--
- drivers/gpu/drm/ttm/ttm_bo_manager.c   |  3 +-
- drivers/gpu/drm/via/via_mm.c           |  4 +--
- include/drm/drm_mm.h                   | 54 ++++++++++++++++++++++------------
- 8 files changed, 68 insertions(+), 55 deletions(-)
-
-diff --git a/drivers/gpu/drm/drm_mm.c b/drivers/gpu/drm/drm_mm.c
-index 2f6b06b5a617..83ad98b2737d 100644
---- a/drivers/gpu/drm/drm_mm.c
-+++ b/drivers/gpu/drm/drm_mm.c
-@@ -212,12 +212,13 @@ EXPORT_SYMBOL(drm_mm_get_block_generic);
-  */
- int drm_mm_insert_node_generic(struct drm_mm *mm, struct drm_mm_node *node,
- 			       unsigned long size, unsigned alignment,
--			       unsigned long color)
-+			       unsigned long color,
-+			       enum drm_mm_search_flags flags)
- {
- 	struct drm_mm_node *hole_node;
- 
- 	hole_node = drm_mm_search_free_generic(mm, size, alignment,
--					       color, 0);
-+					       color, flags);
- 	if (!hole_node)
- 		return -ENOSPC;
- 
-@@ -226,13 +227,6 @@ int drm_mm_insert_node_generic(struct drm_mm *mm, struct drm_mm_node *node,
- }
- EXPORT_SYMBOL(drm_mm_insert_node_generic);
- 
--int drm_mm_insert_node(struct drm_mm *mm, struct drm_mm_node *node,
--		       unsigned long size, unsigned alignment)
--{
--	return drm_mm_insert_node_generic(mm, node, size, alignment, 0);
--}
--EXPORT_SYMBOL(drm_mm_insert_node);
--
- static void drm_mm_insert_helper_range(struct drm_mm_node *hole_node,
- 				       struct drm_mm_node *node,
- 				       unsigned long size, unsigned alignment,
-@@ -313,13 +307,14 @@ EXPORT_SYMBOL(drm_mm_get_block_range_generic);
-  */
- int drm_mm_insert_node_in_range_generic(struct drm_mm *mm, struct drm_mm_node *node,
- 					unsigned long size, unsigned alignment, unsigned long color,
--					unsigned long start, unsigned long end)
-+					unsigned long start, unsigned long end,
-+					enum drm_mm_search_flags flags)
- {
- 	struct drm_mm_node *hole_node;
- 
- 	hole_node = drm_mm_search_free_in_range_generic(mm,
- 							size, alignment, color,
--							start, end, 0);
-+							start, end, flags);
- 	if (!hole_node)
- 		return -ENOSPC;
- 
-@@ -330,14 +325,6 @@ int drm_mm_insert_node_in_range_generic(struct drm_mm *mm, struct drm_mm_node *n
- }
- EXPORT_SYMBOL(drm_mm_insert_node_in_range_generic);
- 
--int drm_mm_insert_node_in_range(struct drm_mm *mm, struct drm_mm_node *node,
--				unsigned long size, unsigned alignment,
--				unsigned long start, unsigned long end)
--{
--	return drm_mm_insert_node_in_range_generic(mm, node, size, alignment, 0, start, end);
--}
--EXPORT_SYMBOL(drm_mm_insert_node_in_range);
--
- /**
-  * Remove a memory node from the allocator.
-  */
-@@ -413,7 +400,7 @@ struct drm_mm_node *drm_mm_search_free_generic(const struct drm_mm *mm,
- 					       unsigned long size,
- 					       unsigned alignment,
- 					       unsigned long color,
--					       bool best_match)
-+					       enum drm_mm_search_flags flags)
- {
- 	struct drm_mm_node *entry;
- 	struct drm_mm_node *best;
-@@ -436,7 +423,7 @@ struct drm_mm_node *drm_mm_search_free_generic(const struct drm_mm *mm,
- 		if (!check_free_hole(adj_start, adj_end, size, alignment))
- 			continue;
- 
--		if (!best_match)
-+		if (!(flags & DRM_MM_SEARCH_BEST))
- 			return entry;
- 
- 		if (entry->size < best_size) {
-@@ -455,7 +442,7 @@ struct drm_mm_node *drm_mm_search_free_in_range_generic(const struct drm_mm *mm,
- 							unsigned long color,
- 							unsigned long start,
- 							unsigned long end,
--							bool best_match)
-+							enum drm_mm_search_flags flags)
- {
- 	struct drm_mm_node *entry;
- 	struct drm_mm_node *best;
-@@ -483,7 +470,7 @@ struct drm_mm_node *drm_mm_search_free_in_range_generic(const struct drm_mm *mm,
- 		if (!check_free_hole(adj_start, adj_end, size, alignment))
- 			continue;
- 
--		if (!best_match)
-+		if (!(flags & DRM_MM_SEARCH_BEST))
- 			return entry;
- 
- 		if (entry->size < best_size) {
-@@ -629,8 +616,8 @@ EXPORT_SYMBOL(drm_mm_scan_add_block);
-  * corrupted.
-  *
-  * When the scan list is empty, the selected memory nodes can be freed. An
-- * immediately following drm_mm_search_free with best_match = 0 will then return
-- * the just freed block (because its at the top of the free_stack list).
-+ * immediately following drm_mm_search_free with !DRM_MM_SEARCH_BEST will then
-+ * return the just freed block (because its at the top of the free_stack list).
-  *
-  * Returns one if this block should be evicted, zero otherwise. Will always
-  * return zero when no hole has been found.
-diff --git a/drivers/gpu/drm/drm_vma_manager.c b/drivers/gpu/drm/drm_vma_manager.c
-index b966cea95f11..3837481d5607 100644
---- a/drivers/gpu/drm/drm_vma_manager.c
-+++ b/drivers/gpu/drm/drm_vma_manager.c
-@@ -241,8 +241,8 @@ int drm_vma_offset_add(struct drm_vma_offset_manager *mgr,
- 		goto out_unlock;
- 	}
- 
--	ret = drm_mm_insert_node_generic(&mgr->vm_addr_space_mm,
--					 &node->vm_node, pages, 0, 0);
-+	ret = drm_mm_insert_node(&mgr->vm_addr_space_mm, &node->vm_node,
-+				 pages, 0, DRM_MM_SEARCH_DEFAULT);
- 	if (ret)
- 		goto out_unlock;
- 
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index 967fe650fa8b..deb0a0fcf2b4 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -3124,7 +3124,8 @@ search_free:
- 	ret = drm_mm_insert_node_in_range_generic(&dev_priv->gtt.base.mm,
- 						  &vma->node,
- 						  size, alignment,
--						  obj->cache_level, 0, gtt_max);
-+						  obj->cache_level, 0, gtt_max,
-+						  DRM_MM_SEARCH_DEFAULT);
- 	if (ret) {
- 		ret = i915_gem_evict_something(dev, size, alignment,
- 					       obj->cache_level,
-diff --git a/drivers/gpu/drm/i915/i915_gem_stolen.c b/drivers/gpu/drm/i915/i915_gem_stolen.c
-index 5531643136f5..03bb991e0267 100644
---- a/drivers/gpu/drm/i915/i915_gem_stolen.c
-+++ b/drivers/gpu/drm/i915/i915_gem_stolen.c
-@@ -97,10 +97,12 @@ static int i915_setup_compression(struct drm_device *dev, int size)
- 
- 	/* Try to over-allocate to reduce reallocations and fragmentation */
- 	compressed_fb = drm_mm_search_free(&dev_priv->mm.stolen,
--					   size <<= 1, 4096, 0);
-+					   size <<= 1, 4096,
-+					   DRM_MM_SEARCH_DEFAULT);
- 	if (!compressed_fb)
- 		compressed_fb = drm_mm_search_free(&dev_priv->mm.stolen,
--						   size >>= 1, 4096, 0);
-+						   size >>= 1, 4096,
-+						   DRM_MM_SEARCH_DEFAULT);
- 	if (compressed_fb)
- 		compressed_fb = drm_mm_get_block(compressed_fb, size, 4096);
- 	if (!compressed_fb)
-@@ -112,7 +114,8 @@ static int i915_setup_compression(struct drm_device *dev, int size)
- 		I915_WRITE(DPFC_CB_BASE, compressed_fb->start);
- 	} else {
- 		compressed_llb = drm_mm_search_free(&dev_priv->mm.stolen,
--						    4096, 4096, 0);
-+						    4096, 4096,
-+						    DRM_MM_SEARCH_DEFAULT);
- 		if (compressed_llb)
- 			compressed_llb = drm_mm_get_block(compressed_llb,
- 							  4096, 4096);
-@@ -310,7 +313,8 @@ i915_gem_object_create_stolen(struct drm_device *dev, u32 size)
- 	if (size == 0)
- 		return NULL;
- 
--	stolen = drm_mm_search_free(&dev_priv->mm.stolen, size, 4096, 0);
-+	stolen = drm_mm_search_free(&dev_priv->mm.stolen, size, 4096,
-+				    DRM_MM_SEARCH_DEFAULT);
- 	if (stolen)
- 		stolen = drm_mm_get_block(stolen, size, 4096);
- 	if (stolen == NULL)
-diff --git a/drivers/gpu/drm/sis/sis_mm.c b/drivers/gpu/drm/sis/sis_mm.c
-index 9a43d98e5003..23a234985941 100644
---- a/drivers/gpu/drm/sis/sis_mm.c
-+++ b/drivers/gpu/drm/sis/sis_mm.c
-@@ -109,7 +109,8 @@ static int sis_drm_alloc(struct drm_device *dev, struct drm_file *file,
- 	if (pool == AGP_TYPE) {
- 		retval = drm_mm_insert_node(&dev_priv->agp_mm,
- 					    &item->mm_node,
--					    mem->size, 0);
-+					    mem->size, 0,
-+					    DRM_MM_SEARCH_DEFAULT);
- 		offset = item->mm_node.start;
- 	} else {
- #if defined(CONFIG_FB_SIS) || defined(CONFIG_FB_SIS_MODULE)
-@@ -121,7 +122,8 @@ static int sis_drm_alloc(struct drm_device *dev, struct drm_file *file,
- #else
- 		retval = drm_mm_insert_node(&dev_priv->vram_mm,
- 					    &item->mm_node,
--					    mem->size, 0);
-+					    mem->size, 0,
-+					    DRM_MM_SEARCH_DEFAULT);
- 		offset = item->mm_node.start;
- #endif
- 	}
-diff --git a/drivers/gpu/drm/ttm/ttm_bo_manager.c b/drivers/gpu/drm/ttm/ttm_bo_manager.c
-index e4367f91472a..e4be29efba6b 100644
---- a/drivers/gpu/drm/ttm/ttm_bo_manager.c
-+++ b/drivers/gpu/drm/ttm/ttm_bo_manager.c
-@@ -69,7 +69,8 @@ static int ttm_bo_man_get_node(struct ttm_mem_type_manager *man,
- 		spin_lock(&rman->lock);
- 		node = drm_mm_search_free_in_range(mm,
- 					mem->num_pages, mem->page_alignment,
--					placement->fpfn, lpfn, 1);
-+					placement->fpfn, lpfn,
-+					DRM_MM_SEARCH_BEST);
- 		if (unlikely(node == NULL)) {
- 			spin_unlock(&rman->lock);
- 			return 0;
-diff --git a/drivers/gpu/drm/via/via_mm.c b/drivers/gpu/drm/via/via_mm.c
-index 0ab93ff09873..7e3ad87c366c 100644
---- a/drivers/gpu/drm/via/via_mm.c
-+++ b/drivers/gpu/drm/via/via_mm.c
-@@ -140,11 +140,11 @@ int via_mem_alloc(struct drm_device *dev, void *data,
- 	if (mem->type == VIA_MEM_AGP)
- 		retval = drm_mm_insert_node(&dev_priv->agp_mm,
- 					    &item->mm_node,
--					    tmpSize, 0);
-+					    tmpSize, 0, DRM_MM_SEARCH_DEFAULT);
- 	else
- 		retval = drm_mm_insert_node(&dev_priv->vram_mm,
- 					    &item->mm_node,
--					    tmpSize, 0);
-+					    tmpSize, 0, DRM_MM_SEARCH_DEFAULT);
- 	if (retval)
- 		goto fail_alloc;
- 
-diff --git a/include/drm/drm_mm.h b/include/drm/drm_mm.h
-index e3aceb350001..aebbe3d5b280 100644
---- a/include/drm/drm_mm.h
-+++ b/include/drm/drm_mm.h
-@@ -41,6 +41,11 @@
- #include <linux/seq_file.h>
- #endif
- 
-+enum drm_mm_search_flags {
-+	DRM_MM_SEARCH_DEFAULT =		0,
-+	DRM_MM_SEARCH_BEST =		1 << 0,
-+};
-+
- struct drm_mm_node {
- 	struct list_head node_list;
- 	struct list_head hole_stack;
-@@ -197,28 +202,41 @@ static inline struct drm_mm_node *drm_mm_get_block_atomic_range(
- 						start, end, 1);
- }
- 
--extern int drm_mm_insert_node(struct drm_mm *mm,
--			      struct drm_mm_node *node,
--			      unsigned long size,
--			      unsigned alignment);
--extern int drm_mm_insert_node_in_range(struct drm_mm *mm,
--				       struct drm_mm_node *node,
--				       unsigned long size,
--				       unsigned alignment,
--				       unsigned long start,
--				       unsigned long end);
- extern int drm_mm_insert_node_generic(struct drm_mm *mm,
- 				      struct drm_mm_node *node,
- 				      unsigned long size,
- 				      unsigned alignment,
--				      unsigned long color);
-+				      unsigned long color,
-+				      enum drm_mm_search_flags flags);
-+static inline int drm_mm_insert_node(struct drm_mm *mm,
-+				     struct drm_mm_node *node,
-+				     unsigned long size,
-+				     unsigned alignment,
-+				     enum drm_mm_search_flags flags)
-+{
-+	return drm_mm_insert_node_generic(mm, node, size, alignment, 0, flags);
-+}
-+
- extern int drm_mm_insert_node_in_range_generic(struct drm_mm *mm,
- 				       struct drm_mm_node *node,
- 				       unsigned long size,
- 				       unsigned alignment,
- 				       unsigned long color,
- 				       unsigned long start,
--				       unsigned long end);
-+				       unsigned long end,
-+				       enum drm_mm_search_flags flags);
-+static inline int drm_mm_insert_node_in_range(struct drm_mm *mm,
-+					      struct drm_mm_node *node,
-+					      unsigned long size,
-+					      unsigned alignment,
-+					      unsigned long start,
-+					      unsigned long end,
-+					      enum drm_mm_search_flags flags)
-+{
-+	return drm_mm_insert_node_in_range_generic(mm, node, size, alignment,
-+						   0, start, end, flags);
-+}
-+
- extern void drm_mm_put_block(struct drm_mm_node *cur);
- extern void drm_mm_remove_node(struct drm_mm_node *node);
- extern void drm_mm_replace_node(struct drm_mm_node *old, struct drm_mm_node *new);
-@@ -226,7 +244,7 @@ extern struct drm_mm_node *drm_mm_search_free_generic(const struct drm_mm *mm,
- 						      unsigned long size,
- 						      unsigned alignment,
- 						      unsigned long color,
--						      bool best_match);
-+						      enum drm_mm_search_flags flags);
- extern struct drm_mm_node *drm_mm_search_free_in_range_generic(
- 						const struct drm_mm *mm,
- 						unsigned long size,
-@@ -234,13 +252,13 @@ extern struct drm_mm_node *drm_mm_search_free_in_range_generic(
- 						unsigned long color,
- 						unsigned long start,
- 						unsigned long end,
--						bool best_match);
-+						enum drm_mm_search_flags flags);
- static inline struct drm_mm_node *drm_mm_search_free(const struct drm_mm *mm,
- 						     unsigned long size,
- 						     unsigned alignment,
--						     bool best_match)
-+						     enum drm_mm_search_flags flags)
- {
--	return drm_mm_search_free_generic(mm,size, alignment, 0, best_match);
-+	return drm_mm_search_free_generic(mm,size, alignment, 0, flags);
- }
- static inline  struct drm_mm_node *drm_mm_search_free_in_range(
- 						const struct drm_mm *mm,
-@@ -248,10 +266,10 @@ static inline  struct drm_mm_node *drm_mm_search_free_in_range(
- 						unsigned alignment,
- 						unsigned long start,
- 						unsigned long end,
--						bool best_match)
-+						enum drm_mm_search_flags flags)
- {
- 	return drm_mm_search_free_in_range_generic(mm, size, alignment, 0,
--						   start, end, best_match);
-+						   start, end, flags);
- }
- static inline struct drm_mm_node *drm_mm_search_free_color(const struct drm_mm *mm,
- 							   unsigned long size,
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0598-drm-const-ify-ioctls-table-v2.patch b/patches.baytrail/0598-drm-const-ify-ioctls-table-v2.patch
deleted file mode 100644
index 552984aade0f5..0000000000000
--- a/patches.baytrail/0598-drm-const-ify-ioctls-table-v2.patch
+++ /dev/null
@@ -1,377 +0,0 @@
-From f027e2cb678fa555f8356f5a0f0e332afe0894d1 Mon Sep 17 00:00:00 2001
-From: Rob Clark <robdclark@gmail.com>
-Date: Fri, 2 Aug 2013 13:27:49 -0400
-Subject: drm: const'ify ioctls table (v2)
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Because, there is no reason for it not to be const.
-
-v1: original
-v2: fix compile break in vmwgfx, and couple related cleanups suggested
-    by Ville Syrjälä
-
-Signed-off-by: Rob Clark <robdclark@gmail.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit baa7094355a10b432bbccacb925da4bdac861c8d)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/exynos/exynos_drm_drv.c |    4 ++--
- drivers/gpu/drm/gma500/psb_drv.c        |    2 +-
- drivers/gpu/drm/i810/i810_dma.c         |    2 +-
- drivers/gpu/drm/i810/i810_drv.h         |    2 +-
- drivers/gpu/drm/i915/i915_dma.c         |    2 +-
- drivers/gpu/drm/i915/i915_drv.h         |    2 +-
- drivers/gpu/drm/mga/mga_drv.h           |    2 +-
- drivers/gpu/drm/mga/mga_state.c         |    2 +-
- drivers/gpu/drm/nouveau/nouveau_drm.c   |    5 ++---
- drivers/gpu/drm/omapdrm/omap_drv.c      |    2 +-
- drivers/gpu/drm/qxl/qxl_drv.h           |    2 +-
- drivers/gpu/drm/qxl/qxl_ioctl.c         |    2 +-
- drivers/gpu/drm/r128/r128_drv.h         |    2 +-
- drivers/gpu/drm/r128/r128_state.c       |    2 +-
- drivers/gpu/drm/radeon/radeon_drv.c     |    2 +-
- drivers/gpu/drm/radeon/radeon_kms.c     |    2 +-
- drivers/gpu/drm/savage/savage_bci.c     |    2 +-
- drivers/gpu/drm/savage/savage_drv.h     |    2 +-
- drivers/gpu/drm/sis/sis_drv.h           |    2 +-
- drivers/gpu/drm/sis/sis_mm.c            |    2 +-
- drivers/gpu/drm/via/via_dma.c           |    2 +-
- drivers/gpu/drm/via/via_drv.h           |    2 +-
- drivers/gpu/drm/vmwgfx/vmwgfx_drv.c     |    4 ++--
- drivers/gpu/host1x/drm/drm.c            |    2 +-
- drivers/staging/imx-drm/imx-drm-core.c  |    2 +-
- include/drm/drmP.h                      |    2 +-
- 26 files changed, 29 insertions(+), 30 deletions(-)
-
---- a/drivers/gpu/drm/exynos/exynos_drm_drv.c
-+++ b/drivers/gpu/drm/exynos/exynos_drm_drv.c
-@@ -218,7 +218,7 @@ static const struct vm_operations_struct
- 	.close = drm_gem_vm_close,
- };
- 
--static struct drm_ioctl_desc exynos_ioctls[] = {
-+static const struct drm_ioctl_desc exynos_ioctls[] = {
- 	DRM_IOCTL_DEF_DRV(EXYNOS_GEM_CREATE, exynos_drm_gem_create_ioctl,
- 			DRM_UNLOCKED | DRM_AUTH),
- 	DRM_IOCTL_DEF_DRV(EXYNOS_GEM_MAP_OFFSET,
-@@ -282,6 +282,7 @@ static struct drm_driver exynos_drm_driv
- 	.gem_prime_export	= exynos_dmabuf_prime_export,
- 	.gem_prime_import	= exynos_dmabuf_prime_import,
- 	.ioctls			= exynos_ioctls,
-+	.num_ioctls		= ARRAY_SIZE(exynos_ioctls),
- 	.fops			= &exynos_drm_driver_fops,
- 	.name	= DRIVER_NAME,
- 	.desc	= DRIVER_DESC,
-@@ -295,7 +296,6 @@ static int exynos_drm_platform_probe(str
- 	DRM_DEBUG_DRIVER("%s\n", __FILE__);
- 
- 	pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
--	exynos_drm_driver.num_ioctls = DRM_ARRAY_SIZE(exynos_ioctls);
- 
- 	return drm_platform_init(&exynos_drm_driver, pdev);
- }
---- a/drivers/gpu/drm/gma500/psb_drv.c
-+++ b/drivers/gpu/drm/gma500/psb_drv.c
-@@ -131,7 +131,7 @@ static int psb_gamma_ioctl(struct drm_de
- static int psb_dpst_bl_ioctl(struct drm_device *dev, void *data,
- 			     struct drm_file *file_priv);
- 
--static struct drm_ioctl_desc psb_ioctls[] = {
-+static const struct drm_ioctl_desc psb_ioctls[] = {
- 	DRM_IOCTL_DEF_DRV(GMA_ADB, psb_adb_ioctl, DRM_AUTH),
- 	DRM_IOCTL_DEF_DRV(GMA_MODE_OPERATION, psb_mode_operation_ioctl,
- 		      DRM_AUTH),
---- a/drivers/gpu/drm/i810/i810_dma.c
-+++ b/drivers/gpu/drm/i810/i810_dma.c
-@@ -1241,7 +1241,7 @@ int i810_driver_dma_quiescent(struct drm
- 	return 0;
- }
- 
--struct drm_ioctl_desc i810_ioctls[] = {
-+const struct drm_ioctl_desc i810_ioctls[] = {
- 	DRM_IOCTL_DEF_DRV(I810_INIT, i810_dma_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED),
- 	DRM_IOCTL_DEF_DRV(I810_VERTEX, i810_dma_vertex, DRM_AUTH|DRM_UNLOCKED),
- 	DRM_IOCTL_DEF_DRV(I810_CLEAR, i810_clear_bufs, DRM_AUTH|DRM_UNLOCKED),
---- a/drivers/gpu/drm/i810/i810_drv.h
-+++ b/drivers/gpu/drm/i810/i810_drv.h
-@@ -125,7 +125,7 @@ extern void i810_driver_preclose(struct
- extern int i810_driver_device_is_agp(struct drm_device *dev);
- 
- extern long i810_ioctl(struct file *file, unsigned int cmd, unsigned long arg);
--extern struct drm_ioctl_desc i810_ioctls[];
-+extern const struct drm_ioctl_desc i810_ioctls[];
- extern int i810_max_ioctl;
- 
- #define I810_BASE(reg)		((unsigned long) \
---- a/drivers/gpu/drm/i915/i915_dma.c
-+++ b/drivers/gpu/drm/i915/i915_dma.c
-@@ -1844,7 +1844,7 @@ void i915_driver_postclose(struct drm_de
- 	kfree(file_priv);
- }
- 
--struct drm_ioctl_desc i915_ioctls[] = {
-+const struct drm_ioctl_desc i915_ioctls[] = {
- 	DRM_IOCTL_DEF_DRV(I915_INIT, i915_dma_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- 	DRM_IOCTL_DEF_DRV(I915_FLUSH, i915_flush_ioctl, DRM_AUTH),
- 	DRM_IOCTL_DEF_DRV(I915_FLIP, i915_flip_bufs, DRM_AUTH),
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1595,7 +1595,7 @@ struct drm_i915_file_private {
- #define INTEL_RC6p_ENABLE			(1<<1)
- #define INTEL_RC6pp_ENABLE			(1<<2)
- 
--extern struct drm_ioctl_desc i915_ioctls[];
-+extern const struct drm_ioctl_desc i915_ioctls[];
- extern int i915_max_ioctl;
- extern unsigned int i915_fbpercrtc __always_unused;
- extern int i915_panel_ignore_lid __read_mostly;
---- a/drivers/gpu/drm/mga/mga_drv.h
-+++ b/drivers/gpu/drm/mga/mga_drv.h
-@@ -149,7 +149,7 @@ typedef struct drm_mga_private {
- 	unsigned int agp_size;
- } drm_mga_private_t;
- 
--extern struct drm_ioctl_desc mga_ioctls[];
-+extern const struct drm_ioctl_desc mga_ioctls[];
- extern int mga_max_ioctl;
- 
- 				/* mga_dma.c */
---- a/drivers/gpu/drm/mga/mga_state.c
-+++ b/drivers/gpu/drm/mga/mga_state.c
-@@ -1083,7 +1083,7 @@ file_priv)
- 	return 0;
- }
- 
--struct drm_ioctl_desc mga_ioctls[] = {
-+const struct drm_ioctl_desc mga_ioctls[] = {
- 	DRM_IOCTL_DEF_DRV(MGA_INIT, mga_dma_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- 	DRM_IOCTL_DEF_DRV(MGA_FLUSH, mga_dma_flush, DRM_AUTH),
- 	DRM_IOCTL_DEF_DRV(MGA_RESET, mga_dma_reset, DRM_AUTH),
---- a/drivers/gpu/drm/nouveau/nouveau_drm.c
-+++ b/drivers/gpu/drm/nouveau/nouveau_drm.c
-@@ -640,7 +640,7 @@ nouveau_drm_postclose(struct drm_device
- 	nouveau_cli_destroy(cli);
- }
- 
--static struct drm_ioctl_desc
-+static const struct drm_ioctl_desc
- nouveau_ioctls[] = {
- 	DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_UNLOCKED|DRM_AUTH),
- 	DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_UNLOCKED|DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
-@@ -695,6 +695,7 @@ driver = {
- 	.disable_vblank = nouveau_drm_vblank_disable,
- 
- 	.ioctls = nouveau_ioctls,
-+	.num_ioctls = ARRAY_SIZE(nouveau_ioctls),
- 	.fops = &nouveau_driver_fops,
- 
- 	.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
-@@ -764,8 +765,6 @@ nouveau_drm_pci_driver = {
- static int __init
- nouveau_drm_init(void)
- {
--	driver.num_ioctls = ARRAY_SIZE(nouveau_ioctls);
--
- 	if (nouveau_modeset == -1) {
- #ifdef CONFIG_VGA_CONSOLE
- 		if (vgacon_text_force())
---- a/drivers/gpu/drm/omapdrm/omap_drv.c
-+++ b/drivers/gpu/drm/omapdrm/omap_drv.c
-@@ -404,7 +404,7 @@ static int ioctl_gem_info(struct drm_dev
- 	return ret;
- }
- 
--static struct drm_ioctl_desc ioctls[DRM_COMMAND_END - DRM_COMMAND_BASE] = {
-+static const struct drm_ioctl_desc ioctls[DRM_COMMAND_END - DRM_COMMAND_BASE] = {
- 	DRM_IOCTL_DEF_DRV(OMAP_GET_PARAM, ioctl_get_param, DRM_UNLOCKED|DRM_AUTH),
- 	DRM_IOCTL_DEF_DRV(OMAP_SET_PARAM, ioctl_set_param, DRM_UNLOCKED|DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- 	DRM_IOCTL_DEF_DRV(OMAP_GEM_NEW, ioctl_gem_new, DRM_UNLOCKED|DRM_AUTH),
---- a/drivers/gpu/drm/qxl/qxl_drv.h
-+++ b/drivers/gpu/drm/qxl/qxl_drv.h
-@@ -319,7 +319,7 @@ struct qxl_device {
- /* forward declaration for QXL_INFO_IO */
- void qxl_io_log(struct qxl_device *qdev, const char *fmt, ...);
- 
--extern struct drm_ioctl_desc qxl_ioctls[];
-+extern const struct drm_ioctl_desc qxl_ioctls[];
- extern int qxl_max_ioctl;
- 
- int qxl_driver_load(struct drm_device *dev, unsigned long flags);
---- a/drivers/gpu/drm/qxl/qxl_ioctl.c
-+++ b/drivers/gpu/drm/qxl/qxl_ioctl.c
-@@ -396,7 +396,7 @@ static int qxl_alloc_surf_ioctl(struct d
- 	return ret;
- }
- 
--struct drm_ioctl_desc qxl_ioctls[] = {
-+const struct drm_ioctl_desc qxl_ioctls[] = {
- 	DRM_IOCTL_DEF_DRV(QXL_ALLOC, qxl_alloc_ioctl, DRM_AUTH|DRM_UNLOCKED),
- 
- 	DRM_IOCTL_DEF_DRV(QXL_MAP, qxl_map_ioctl, DRM_AUTH|DRM_UNLOCKED),
---- a/drivers/gpu/drm/r128/r128_drv.h
-+++ b/drivers/gpu/drm/r128/r128_drv.h
-@@ -131,7 +131,7 @@ typedef struct drm_r128_buf_priv {
- 	drm_r128_freelist_t *list_entry;
- } drm_r128_buf_priv_t;
- 
--extern struct drm_ioctl_desc r128_ioctls[];
-+extern const struct drm_ioctl_desc r128_ioctls[];
- extern int r128_max_ioctl;
- 
- 				/* r128_cce.c */
---- a/drivers/gpu/drm/r128/r128_state.c
-+++ b/drivers/gpu/drm/r128/r128_state.c
-@@ -1643,7 +1643,7 @@ void r128_driver_lastclose(struct drm_de
- 	r128_do_cleanup_cce(dev);
- }
- 
--struct drm_ioctl_desc r128_ioctls[] = {
-+const struct drm_ioctl_desc r128_ioctls[] = {
- 	DRM_IOCTL_DEF_DRV(R128_INIT, r128_cce_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- 	DRM_IOCTL_DEF_DRV(R128_CCE_START, r128_cce_start, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- 	DRM_IOCTL_DEF_DRV(R128_CCE_STOP, r128_cce_stop, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
---- a/drivers/gpu/drm/radeon/radeon_drv.c
-+++ b/drivers/gpu/drm/radeon/radeon_drv.c
-@@ -110,7 +110,7 @@ void radeon_gem_object_close(struct drm_
- 				struct drm_file *file_priv);
- extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc,
- 				      int *vpos, int *hpos);
--extern struct drm_ioctl_desc radeon_ioctls_kms[];
-+extern const struct drm_ioctl_desc radeon_ioctls_kms[];
- extern int radeon_max_kms_ioctl;
- int radeon_mmap(struct file *filp, struct vm_area_struct *vma);
- int radeon_mode_dumb_mmap(struct drm_file *filp,
---- a/drivers/gpu/drm/radeon/radeon_kms.c
-+++ b/drivers/gpu/drm/radeon/radeon_kms.c
-@@ -716,7 +716,7 @@ KMS_INVALID_IOCTL(radeon_surface_alloc_k
- KMS_INVALID_IOCTL(radeon_surface_free_kms)
- 
- 
--struct drm_ioctl_desc radeon_ioctls_kms[] = {
-+const struct drm_ioctl_desc radeon_ioctls_kms[] = {
- 	DRM_IOCTL_DEF_DRV(RADEON_CP_INIT, radeon_cp_init_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- 	DRM_IOCTL_DEF_DRV(RADEON_CP_START, radeon_cp_start_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- 	DRM_IOCTL_DEF_DRV(RADEON_CP_STOP, radeon_cp_stop_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
---- a/drivers/gpu/drm/savage/savage_bci.c
-+++ b/drivers/gpu/drm/savage/savage_bci.c
-@@ -1085,7 +1085,7 @@ void savage_reclaim_buffers(struct drm_d
- 		drm_idlelock_release(&file_priv->master->lock);
- }
- 
--struct drm_ioctl_desc savage_ioctls[] = {
-+const struct drm_ioctl_desc savage_ioctls[] = {
- 	DRM_IOCTL_DEF_DRV(SAVAGE_BCI_INIT, savage_bci_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- 	DRM_IOCTL_DEF_DRV(SAVAGE_BCI_CMDBUF, savage_bci_cmdbuf, DRM_AUTH),
- 	DRM_IOCTL_DEF_DRV(SAVAGE_BCI_EVENT_EMIT, savage_bci_event_emit, DRM_AUTH),
---- a/drivers/gpu/drm/savage/savage_drv.h
-+++ b/drivers/gpu/drm/savage/savage_drv.h
-@@ -104,7 +104,7 @@ enum savage_family {
- 	S3_LAST
- };
- 
--extern struct drm_ioctl_desc savage_ioctls[];
-+extern const struct drm_ioctl_desc savage_ioctls[];
- extern int savage_max_ioctl;
- 
- #define S3_SAVAGE3D_SERIES(chip)  ((chip>=S3_SAVAGE3D) && (chip<=S3_SAVAGE_MX))
---- a/drivers/gpu/drm/sis/sis_drv.h
-+++ b/drivers/gpu/drm/sis/sis_drv.h
-@@ -70,7 +70,7 @@ extern void sis_reclaim_buffers_locked(s
- 				       struct drm_file *file_priv);
- extern void sis_lastclose(struct drm_device *dev);
- 
--extern struct drm_ioctl_desc sis_ioctls[];
-+extern const struct drm_ioctl_desc sis_ioctls[];
- extern int sis_max_ioctl;
- 
- #endif
---- a/drivers/gpu/drm/sis/sis_mm.c
-+++ b/drivers/gpu/drm/sis/sis_mm.c
-@@ -350,7 +350,7 @@ void sis_reclaim_buffers_locked(struct d
- 	return;
- }
- 
--struct drm_ioctl_desc sis_ioctls[] = {
-+const struct drm_ioctl_desc sis_ioctls[] = {
- 	DRM_IOCTL_DEF_DRV(SIS_FB_ALLOC, sis_fb_alloc, DRM_AUTH),
- 	DRM_IOCTL_DEF_DRV(SIS_FB_FREE, sis_drm_free, DRM_AUTH),
- 	DRM_IOCTL_DEF_DRV(SIS_AGP_INIT, sis_ioctl_agp_init, DRM_AUTH | DRM_MASTER | DRM_ROOT_ONLY),
---- a/drivers/gpu/drm/via/via_dma.c
-+++ b/drivers/gpu/drm/via/via_dma.c
-@@ -720,7 +720,7 @@ static int via_cmdbuf_size(struct drm_de
- 	return ret;
- }
- 
--struct drm_ioctl_desc via_ioctls[] = {
-+const struct drm_ioctl_desc via_ioctls[] = {
- 	DRM_IOCTL_DEF_DRV(VIA_ALLOCMEM, via_mem_alloc, DRM_AUTH),
- 	DRM_IOCTL_DEF_DRV(VIA_FREEMEM, via_mem_free, DRM_AUTH),
- 	DRM_IOCTL_DEF_DRV(VIA_AGP_INIT, via_agp_init, DRM_AUTH|DRM_MASTER),
---- a/drivers/gpu/drm/via/via_drv.h
-+++ b/drivers/gpu/drm/via/via_drv.h
-@@ -114,7 +114,7 @@ enum via_family {
- #define VIA_READ8(reg)		DRM_READ8(VIA_BASE, reg)
- #define VIA_WRITE8(reg, val)	DRM_WRITE8(VIA_BASE, reg, val)
- 
--extern struct drm_ioctl_desc via_ioctls[];
-+extern const struct drm_ioctl_desc via_ioctls[];
- extern int via_max_ioctl;
- 
- extern int via_fb_init(struct drm_device *dev, void *data, struct drm_file *file_priv);
---- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
-+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
-@@ -124,7 +124,7 @@
-  * Ioctl definitions.
-  */
- 
--static struct drm_ioctl_desc vmw_ioctls[] = {
-+static const struct drm_ioctl_desc vmw_ioctls[] = {
- 	VMW_IOCTL_DEF(VMW_GET_PARAM, vmw_getparam_ioctl,
- 		      DRM_AUTH | DRM_UNLOCKED),
- 	VMW_IOCTL_DEF(VMW_ALLOC_DMABUF, vmw_dmabuf_alloc_ioctl,
-@@ -792,7 +792,7 @@ static long vmw_unlocked_ioctl(struct fi
- 
- 	if ((nr >= DRM_COMMAND_BASE) && (nr < DRM_COMMAND_END)
- 	    && (nr < DRM_COMMAND_BASE + dev->driver->num_ioctls)) {
--		struct drm_ioctl_desc *ioctl =
-+		const struct drm_ioctl_desc *ioctl =
- 		    &vmw_ioctls[nr - DRM_COMMAND_BASE];
- 
- 		if (unlikely(ioctl->cmd_drv != cmd)) {
---- a/drivers/gpu/host1x/drm/drm.c
-+++ b/drivers/gpu/host1x/drm/drm.c
-@@ -479,7 +479,7 @@ static int tegra_submit(struct drm_devic
- }
- #endif
- 
--static struct drm_ioctl_desc tegra_drm_ioctls[] = {
-+static const struct drm_ioctl_desc tegra_drm_ioctls[] = {
- #ifdef CONFIG_DRM_TEGRA_STAGING
- 	DRM_IOCTL_DEF_DRV(TEGRA_GEM_CREATE, tegra_gem_create, DRM_UNLOCKED | DRM_AUTH),
- 	DRM_IOCTL_DEF_DRV(TEGRA_GEM_MMAP, tegra_gem_mmap, DRM_UNLOCKED),
---- a/drivers/staging/imx-drm/imx-drm-core.c
-+++ b/drivers/staging/imx-drm/imx-drm-core.c
-@@ -787,7 +787,7 @@ int imx_drm_remove_connector(struct imx_
- }
- EXPORT_SYMBOL_GPL(imx_drm_remove_connector);
- 
--static struct drm_ioctl_desc imx_drm_ioctls[] = {
-+static const struct drm_ioctl_desc imx_drm_ioctls[] = {
- 	/* none so far */
- };
- 
---- a/include/drm/drmP.h
-+++ b/include/drm/drmP.h
-@@ -965,7 +965,7 @@ struct drm_driver {
- 
- 	u32 driver_features;
- 	int dev_priv_size;
--	struct drm_ioctl_desc *ioctls;
-+	const struct drm_ioctl_desc *ioctls;
- 	int num_ioctls;
- 	const struct file_operations *fops;
- 	union {
diff --git a/patches.baytrail/0599-drm-i915-pre-alloc-instead-of-drm_mm-search-get_bloc.patch b/patches.baytrail/0599-drm-i915-pre-alloc-instead-of-drm_mm-search-get_bloc.patch
deleted file mode 100644
index 387e840248a94..0000000000000
--- a/patches.baytrail/0599-drm-i915-pre-alloc-instead-of-drm_mm-search-get_bloc.patch
+++ /dev/null
@@ -1,176 +0,0 @@
-From ab3af9e47229f8921603280b54935a0c53823997 Mon Sep 17 00:00:00 2001
-From: David Herrmann <dh.herrmann@gmail.com>
-Date: Sat, 27 Jul 2013 16:21:27 +0200
-Subject: drm/i915: pre-alloc instead of drm_mm search/get_block
-
-i915 is the last user of the weird search+get_block drm_mm API. Convert it
-to an explicit kmalloc()+insert_node(). This drops the last user of the
-node-cache in drm_mm. We can remove it now in a follow-up patch.
-
-v2:
- - simplify error path in i915_setup_compression()
-v3:
- - simplify error path even more
-
-Cc: Chris Wilson <chris@chris-wilson.co.uk>
-Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Signed-off-by: David Herrmann <dh.herrmann@gmail.com>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit 06e78edff18195f8e416e6961fea7d88118a5c63)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem_stolen.c | 78 ++++++++++++++++++++--------------
- 1 file changed, 47 insertions(+), 31 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem_stolen.c b/drivers/gpu/drm/i915/i915_gem_stolen.c
-index 03bb991e0267..0d0a3b179075 100644
---- a/drivers/gpu/drm/i915/i915_gem_stolen.c
-+++ b/drivers/gpu/drm/i915/i915_gem_stolen.c
-@@ -94,34 +94,36 @@ static int i915_setup_compression(struct drm_device *dev, int size)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct drm_mm_node *compressed_fb, *uninitialized_var(compressed_llb);
-+	int ret;
- 
--	/* Try to over-allocate to reduce reallocations and fragmentation */
--	compressed_fb = drm_mm_search_free(&dev_priv->mm.stolen,
--					   size <<= 1, 4096,
--					   DRM_MM_SEARCH_DEFAULT);
--	if (!compressed_fb)
--		compressed_fb = drm_mm_search_free(&dev_priv->mm.stolen,
--						   size >>= 1, 4096,
--						   DRM_MM_SEARCH_DEFAULT);
--	if (compressed_fb)
--		compressed_fb = drm_mm_get_block(compressed_fb, size, 4096);
-+	compressed_fb = kzalloc(sizeof(*compressed_fb), GFP_KERNEL);
- 	if (!compressed_fb)
--		goto err;
-+		goto err_llb;
-+
-+	/* Try to over-allocate to reduce reallocations and fragmentation */
-+	ret = drm_mm_insert_node(&dev_priv->mm.stolen, compressed_fb,
-+				 size <<= 1, 4096, DRM_MM_SEARCH_DEFAULT);
-+	if (ret)
-+		ret = drm_mm_insert_node(&dev_priv->mm.stolen, compressed_fb,
-+					 size >>= 1, 4096,
-+					 DRM_MM_SEARCH_DEFAULT);
-+	if (ret)
-+		goto err_llb;
- 
- 	if (HAS_PCH_SPLIT(dev))
- 		I915_WRITE(ILK_DPFC_CB_BASE, compressed_fb->start);
- 	else if (IS_GM45(dev)) {
- 		I915_WRITE(DPFC_CB_BASE, compressed_fb->start);
- 	} else {
--		compressed_llb = drm_mm_search_free(&dev_priv->mm.stolen,
--						    4096, 4096,
--						    DRM_MM_SEARCH_DEFAULT);
--		if (compressed_llb)
--			compressed_llb = drm_mm_get_block(compressed_llb,
--							  4096, 4096);
-+		compressed_llb = kzalloc(sizeof(*compressed_llb), GFP_KERNEL);
- 		if (!compressed_llb)
- 			goto err_fb;
- 
-+		ret = drm_mm_insert_node(&dev_priv->mm.stolen, compressed_llb,
-+					 4096, 4096, DRM_MM_SEARCH_DEFAULT);
-+		if (ret)
-+			goto err_fb;
-+
- 		dev_priv->fbc.compressed_llb = compressed_llb;
- 
- 		I915_WRITE(FBC_CFB_BASE,
-@@ -139,8 +141,10 @@ static int i915_setup_compression(struct drm_device *dev, int size)
- 	return 0;
- 
- err_fb:
--	drm_mm_put_block(compressed_fb);
--err:
-+	kfree(compressed_llb);
-+	drm_mm_remove_node(compressed_fb);
-+err_llb:
-+	kfree(compressed_fb);
- 	pr_info_once("drm: not enough stolen space for compressed buffer (need %d more bytes), disabling. Hint: you may be able to increase stolen memory size in the BIOS to avoid this.\n", size);
- 	return -ENOSPC;
- }
-@@ -168,11 +172,15 @@ void i915_gem_stolen_cleanup_compression(struct drm_device *dev)
- 	if (dev_priv->fbc.size == 0)
- 		return;
- 
--	if (dev_priv->fbc.compressed_fb)
--		drm_mm_put_block(dev_priv->fbc.compressed_fb);
-+	if (dev_priv->fbc.compressed_fb) {
-+		drm_mm_remove_node(dev_priv->fbc.compressed_fb);
-+		kfree(dev_priv->fbc.compressed_fb);
-+	}
- 
--	if (dev_priv->fbc.compressed_llb)
--		drm_mm_put_block(dev_priv->fbc.compressed_llb);
-+	if (dev_priv->fbc.compressed_llb) {
-+		drm_mm_remove_node(dev_priv->fbc.compressed_llb);
-+		kfree(dev_priv->fbc.compressed_llb);
-+	}
- 
- 	dev_priv->fbc.size = 0;
- }
-@@ -305,6 +313,7 @@ i915_gem_object_create_stolen(struct drm_device *dev, u32 size)
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct drm_i915_gem_object *obj;
- 	struct drm_mm_node *stolen;
-+	int ret;
- 
- 	if (!drm_mm_initialized(&dev_priv->mm.stolen))
- 		return NULL;
-@@ -313,18 +322,23 @@ i915_gem_object_create_stolen(struct drm_device *dev, u32 size)
- 	if (size == 0)
- 		return NULL;
- 
--	stolen = drm_mm_search_free(&dev_priv->mm.stolen, size, 4096,
--				    DRM_MM_SEARCH_DEFAULT);
--	if (stolen)
--		stolen = drm_mm_get_block(stolen, size, 4096);
--	if (stolen == NULL)
-+	stolen = kzalloc(sizeof(*stolen), GFP_KERNEL);
-+	if (!stolen)
- 		return NULL;
- 
-+	ret = drm_mm_insert_node(&dev_priv->mm.stolen, stolen, size,
-+				 4096, DRM_MM_SEARCH_DEFAULT);
-+	if (ret) {
-+		kfree(stolen);
-+		return NULL;
-+	}
-+
- 	obj = _i915_gem_object_create_stolen(dev, stolen);
- 	if (obj)
- 		return obj;
- 
--	drm_mm_put_block(stolen);
-+	drm_mm_remove_node(stolen);
-+	kfree(stolen);
- 	return NULL;
- }
- 
-@@ -370,7 +384,8 @@ i915_gem_object_create_stolen_for_preallocated(struct drm_device *dev,
- 	obj = _i915_gem_object_create_stolen(dev, stolen);
- 	if (obj == NULL) {
- 		DRM_DEBUG_KMS("failed to allocate stolen object\n");
--		drm_mm_put_block(stolen);
-+		drm_mm_remove_node(stolen);
-+		kfree(stolen);
- 		return NULL;
- 	}
- 
-@@ -417,7 +432,8 @@ void
- i915_gem_object_release_stolen(struct drm_i915_gem_object *obj)
- {
- 	if (obj->stolen) {
--		drm_mm_put_block(obj->stolen);
-+		drm_mm_remove_node(obj->stolen);
-+		kfree(obj->stolen);
- 		obj->stolen = NULL;
- 	}
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0600-Re-create-dirty-merge-32c913e.patch b/patches.baytrail/0600-Re-create-dirty-merge-32c913e.patch
deleted file mode 100644
index a998078be9768..0000000000000
--- a/patches.baytrail/0600-Re-create-dirty-merge-32c913e.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From 38ca57a9cd5d6555f2c1981cd3974203350f2dbc Mon Sep 17 00:00:00 2001
-From: James Ausmus <james.ausmus@intel.com>
-Date: Thu, 10 Oct 2013 19:05:12 -0700
-Subject: Re-create dirty merge 32c913e
-
-Fix code up to post-merge state after 32c913e4369ce7bd1d16a9b6983f7b8975c13f5a
-("Merge tag 'drm-intel-next-2013-07-26-fixed' of
-git://people.freedesktop.org/~danvet/drm-intel into drm-next")
-
-Signed-off-by: James Ausmus <james.ausmus@intel.com>
-(cherry picked from
- https://chromium.googlesource.com/chromiumos/third_party/kernel-next
- chromeos-3.10, 3a0d8e0095892f31c9cdde50b147ea606bb541b7)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem_stolen.c | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem_stolen.c b/drivers/gpu/drm/i915/i915_gem_stolen.c
-index 0d0a3b179075..ba4dabca83c2 100644
---- a/drivers/gpu/drm/i915/i915_gem_stolen.c
-+++ b/drivers/gpu/drm/i915/i915_gem_stolen.c
-@@ -423,7 +423,8 @@ i915_gem_object_create_stolen_for_preallocated(struct drm_device *dev,
- 	return obj;
- 
- err_out:
--	drm_mm_put_block(stolen);
-+	drm_mm_remove_node(stolen);
-+	kfree(stolen);
- 	drm_gem_object_unreference(&obj->base);
- 	return NULL;
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0601-drm-i915-Rework-__i915_gem_shrink.patch b/patches.baytrail/0601-drm-i915-Rework-__i915_gem_shrink.patch
deleted file mode 100644
index b8bc6021d7c93..0000000000000
--- a/patches.baytrail/0601-drm-i915-Rework-__i915_gem_shrink.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From df1f9168b19ff78f1e4272c506cb4edbce0916fa Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Wed, 31 Jul 2013 17:00:01 -0700
-Subject: drm/i915: Rework __i915_gem_shrink
-
-In order to do this for all VMs, it's convenient to rework the logic a
-bit. This should have no functional impact.
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 80dcfdbd68b094f21f7ce222fb8039123f5b4cbe)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem.c | 11 ++++++++---
- 1 file changed, 8 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index deb0a0fcf2b4..6fa05c47ea4b 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -1694,9 +1694,14 @@ __i915_gem_shrink(struct drm_i915_private *dev_priv, long target,
- 	}
- 
- 	list_for_each_entry_safe(obj, next, &vm->inactive_list, mm_list) {
--		if ((i915_gem_object_is_purgeable(obj) || !purgeable_only) &&
--		    i915_gem_object_unbind(obj) == 0 &&
--		    i915_gem_object_put_pages(obj) == 0) {
-+
-+		if (!i915_gem_object_is_purgeable(obj) && purgeable_only)
-+			continue;
-+
-+		if (i915_gem_object_unbind(obj))
-+			continue;
-+
-+		if (!i915_gem_object_put_pages(obj)) {
- 			count += obj->base.size >> PAGE_SHIFT;
- 			if (count >= target)
- 				return count;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0602-drm-i915-plumb-VM-into-bind-unbind-code.patch b/patches.baytrail/0602-drm-i915-plumb-VM-into-bind-unbind-code.patch
deleted file mode 100644
index 04218ac2a8c4b..0000000000000
--- a/patches.baytrail/0602-drm-i915-plumb-VM-into-bind-unbind-code.patch
+++ /dev/null
@@ -1,530 +0,0 @@
-From 663c990c6ca1129872b76a6f7ec8d22ceee8fd81 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Wed, 31 Jul 2013 17:00:10 -0700
-Subject: drm/i915: plumb VM into bind/unbind code
-
-As alluded to in several patches, and it will be reiterated later... A
-VMA is an abstraction for a GEM BO bound into an address space.
-Therefore it stands to reason, that the existing bind, and unbind are
-the ones which will be the most impacted. This patch implements this,
-and updates all callers which weren't already updated in the series
-(because it was too messy).
-
-This patch represents the bulk of an earlier, larger patch. I've pulled
-out a bunch of things by the request of Daniel. The history is preserved
-for posterity with the email convention of ">" One big change from the
-original patch aside from a bunch of cropping is I've created an
-i915_vma_unbind() function. That is because we always have the VMA
-anyway, and doing an extra lookup is useful. There is a caveat, we
-retain an i915_gem_object_ggtt_unbind, for the global cases which might
-not talk in VMAs.
-
-> drm/i915: plumb VM into object operations
->
-> This patch was formerly known as:
-> "drm/i915: Create VMAs (part 3) - plumbing"
->
-> This patch adds a VM argument, bind/unbind, and the object
-> offset/size/color getters/setters. It preserves the old ggtt helper
-> functions because things still need, and will continue to need them.
->
-> Some code will still need to be ported over after this.
->
-> v2: Fix purge to pick an object and unbind all vmas
-> This was doable because of the global bound list change.
->
-> v3: With the commit to actually pin/unpin pages in place, there is no
-> longer a need to check if unbind succeeded before calling put_pages().
-> Make put_pages only BUG() after checking pin count.
->
-> v4: Rebased on top of the new hangcheck work by Mika
-> plumbed eb_destroy also
-> Many checkpatch related fixes
->
-> v5: Very large rebase
->
-> v6:
-> Change BUG_ON to WARN_ON (Daniel)
-> Rename vm to ggtt in preallocate stolen, since it is always ggtt when
-> dealing with stolen memory. (Daniel)
-> list_for_each will short-circuit already (Daniel)
-> remove superflous space (Daniel)
-> Use per object list of vmas (Daniel)
-> Make obj_bound_any() use obj_bound for each vm (Ben)
-> s/bind_to_gtt/bind_to_vm/ (Ben)
->
-> Fixed up the inactive shrinker. As Daniel noticed the code could
-> potentially count the same object multiple times. While it's not
-> possible in the current case, since 1 object can only ever be bound into
-> 1 address space thus far - we may as well try to get something more
-> future proof in place now. With a prep patch before this to switch over
-> to using the bound list + inactive check, we're now able to carry that
-> forward for every address space an object is bound into.
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-[danvet: Rebase on top of the loss of "drm/i915: Cleanup more of VMA
-in destroy".]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 07fe0b12800d4752d729d4122c01f41f80a5ba5a)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_debugfs.c        |   2 +-
- drivers/gpu/drm/i915/i915_drv.h            |   3 +-
- drivers/gpu/drm/i915/i915_gem.c            | 134 +++++++++++++++++++----------
- drivers/gpu/drm/i915/i915_gem_evict.c      |   4 +-
- drivers/gpu/drm/i915/i915_gem_execbuffer.c |   2 +-
- drivers/gpu/drm/i915/i915_gem_tiling.c     |   9 +-
- drivers/gpu/drm/i915/i915_trace.h          |  37 ++++----
- 7 files changed, 120 insertions(+), 71 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
-index 748af58b0cea..d2935b4fd695 100644
---- a/drivers/gpu/drm/i915/i915_debugfs.c
-+++ b/drivers/gpu/drm/i915/i915_debugfs.c
-@@ -1800,7 +1800,7 @@ i915_drop_caches_set(void *data, u64 val)
- 			if (obj->pin_count)
- 				continue;
- 
--			ret = i915_gem_object_unbind(obj);
-+			ret = i915_gem_object_ggtt_unbind(obj);
- 			if (ret)
- 				goto unlock;
- 		}
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 2468d3aec9af..6e8e6950cb8c 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1738,7 +1738,8 @@ int __must_check i915_gem_object_pin(struct drm_i915_gem_object *obj,
- 				     bool map_and_fenceable,
- 				     bool nonblocking);
- void i915_gem_object_unpin(struct drm_i915_gem_object *obj);
--int __must_check i915_gem_object_unbind(struct drm_i915_gem_object *obj);
-+int __must_check i915_vma_unbind(struct i915_vma *vma);
-+int __must_check i915_gem_object_ggtt_unbind(struct drm_i915_gem_object *obj);
- int i915_gem_object_put_pages(struct drm_i915_gem_object *obj);
- void i915_gem_release_mmap(struct drm_i915_gem_object *obj);
- void i915_gem_lastclose(struct drm_device *dev);
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index 6fa05c47ea4b..6f7b1b47d210 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -39,10 +39,12 @@
- 
- static void i915_gem_object_flush_gtt_write_domain(struct drm_i915_gem_object *obj);
- static void i915_gem_object_flush_cpu_write_domain(struct drm_i915_gem_object *obj);
--static __must_check int i915_gem_object_bind_to_gtt(struct drm_i915_gem_object *obj,
--						    unsigned alignment,
--						    bool map_and_fenceable,
--						    bool nonblocking);
-+static __must_check int
-+i915_gem_object_bind_to_vm(struct drm_i915_gem_object *obj,
-+			   struct i915_address_space *vm,
-+			   unsigned alignment,
-+			   bool map_and_fenceable,
-+			   bool nonblocking);
- static int i915_gem_phys_pwrite(struct drm_device *dev,
- 				struct drm_i915_gem_object *obj,
- 				struct drm_i915_gem_pwrite *args,
-@@ -1679,7 +1681,6 @@ __i915_gem_shrink(struct drm_i915_private *dev_priv, long target,
- 		  bool purgeable_only)
- {
- 	struct drm_i915_gem_object *obj, *next;
--	struct i915_address_space *vm = &dev_priv->gtt.base;
- 	long count = 0;
- 
- 	list_for_each_entry_safe(obj, next,
-@@ -1693,13 +1694,16 @@ __i915_gem_shrink(struct drm_i915_private *dev_priv, long target,
- 		}
- 	}
- 
--	list_for_each_entry_safe(obj, next, &vm->inactive_list, mm_list) {
-+	list_for_each_entry_safe(obj, next, &dev_priv->mm.bound_list,
-+				 global_list) {
-+		struct i915_vma *vma, *v;
- 
- 		if (!i915_gem_object_is_purgeable(obj) && purgeable_only)
- 			continue;
- 
--		if (i915_gem_object_unbind(obj))
--			continue;
-+		list_for_each_entry_safe(vma, v, &obj->vma_list, vma_link)
-+			if (i915_vma_unbind(vma))
-+				break;
- 
- 		if (!i915_gem_object_put_pages(obj)) {
- 			count += obj->base.size >> PAGE_SHIFT;
-@@ -2583,17 +2587,13 @@ static void i915_gem_object_finish_gtt(struct drm_i915_gem_object *obj)
- 					    old_write_domain);
- }
- 
--/**
-- * Unbinds an object from the GTT aperture.
-- */
--int
--i915_gem_object_unbind(struct drm_i915_gem_object *obj)
-+int i915_vma_unbind(struct i915_vma *vma)
- {
-+	struct drm_i915_gem_object *obj = vma->obj;
- 	drm_i915_private_t *dev_priv = obj->base.dev->dev_private;
--	struct i915_vma *vma;
- 	int ret;
- 
--	if (!i915_gem_obj_ggtt_bound(obj))
-+	if (list_empty(&vma->vma_link))
- 		return 0;
- 
- 	if (obj->pin_count)
-@@ -2616,7 +2616,7 @@ i915_gem_object_unbind(struct drm_i915_gem_object *obj)
- 	if (ret)
- 		return ret;
- 
--	trace_i915_gem_object_unbind(obj);
-+	trace_i915_vma_unbind(vma);
- 
- 	if (obj->has_global_gtt_mapping)
- 		i915_gem_gtt_unbind_object(obj);
-@@ -2631,7 +2631,6 @@ i915_gem_object_unbind(struct drm_i915_gem_object *obj)
- 	/* Avoid an unnecessary call to unbind on rebind. */
- 	obj->map_and_fenceable = true;
- 
--	vma = i915_gem_obj_to_vma(obj, &dev_priv->gtt.base);
- 	list_del(&vma->vma_link);
- 	drm_mm_remove_node(&vma->node);
- 	i915_gem_vma_destroy(vma);
-@@ -2646,6 +2645,26 @@ i915_gem_object_unbind(struct drm_i915_gem_object *obj)
- 	return 0;
- }
- 
-+/**
-+ * Unbinds an object from the global GTT aperture.
-+ */
-+int
-+i915_gem_object_ggtt_unbind(struct drm_i915_gem_object *obj)
-+{
-+	struct drm_i915_private *dev_priv = obj->base.dev->dev_private;
-+	struct i915_address_space *ggtt = &dev_priv->gtt.base;
-+
-+	if (!i915_gem_obj_ggtt_bound(obj));
-+		return 0;
-+
-+	if (obj->pin_count)
-+		return -EBUSY;
-+
-+	BUG_ON(obj->pages == NULL);
-+
-+	return i915_vma_unbind(i915_gem_obj_to_vma(obj, ggtt));
-+}
-+
- int i915_gpu_idle(struct drm_device *dev)
- {
- 	drm_i915_private_t *dev_priv = dev->dev_private;
-@@ -3063,18 +3082,18 @@ static void i915_gem_verify_gtt(struct drm_device *dev)
-  * Finds free space in the GTT aperture and binds the object there.
-  */
- static int
--i915_gem_object_bind_to_gtt(struct drm_i915_gem_object *obj,
--			    unsigned alignment,
--			    bool map_and_fenceable,
--			    bool nonblocking)
-+i915_gem_object_bind_to_vm(struct drm_i915_gem_object *obj,
-+			   struct i915_address_space *vm,
-+			   unsigned alignment,
-+			   bool map_and_fenceable,
-+			   bool nonblocking)
- {
- 	struct drm_device *dev = obj->base.dev;
- 	drm_i915_private_t *dev_priv = dev->dev_private;
--	struct i915_address_space *vm = &dev_priv->gtt.base;
- 	u32 size, fence_size, fence_alignment, unfenced_alignment;
- 	bool mappable, fenceable;
--	size_t gtt_max = map_and_fenceable ?
--		dev_priv->gtt.mappable_end : dev_priv->gtt.base.total;
-+	size_t gtt_max =
-+		map_and_fenceable ? dev_priv->gtt.mappable_end : vm->total;
- 	struct i915_vma *vma;
- 	int ret;
- 
-@@ -3119,15 +3138,18 @@ i915_gem_object_bind_to_gtt(struct drm_i915_gem_object *obj,
- 
- 	i915_gem_object_pin_pages(obj);
- 
--	vma = i915_gem_vma_create(obj, &dev_priv->gtt.base);
-+	/* FIXME: For now we only ever use 1 VMA per object */
-+	BUG_ON(!i915_is_ggtt(vm));
-+	WARN_ON(!list_empty(&obj->vma_list));
-+
-+	vma = i915_gem_vma_create(obj, vm);
- 	if (IS_ERR(vma)) {
- 		ret = PTR_ERR(vma);
- 		goto err_unpin;
- 	}
- 
- search_free:
--	ret = drm_mm_insert_node_in_range_generic(&dev_priv->gtt.base.mm,
--						  &vma->node,
-+	ret = drm_mm_insert_node_in_range_generic(&vm->mm, &vma->node,
- 						  size, alignment,
- 						  obj->cache_level, 0, gtt_max,
- 						  DRM_MM_SEARCH_DEFAULT);
-@@ -3153,18 +3175,25 @@ search_free:
- 
- 	list_move_tail(&obj->global_list, &dev_priv->mm.bound_list);
- 	list_add_tail(&obj->mm_list, &vm->inactive_list);
--	list_add(&vma->vma_link, &obj->vma_list);
-+
-+	/* Keep GGTT vmas first to make debug easier */
-+	if (i915_is_ggtt(vm))
-+		list_add(&vma->vma_link, &obj->vma_list);
-+	else
-+		list_add_tail(&vma->vma_link, &obj->vma_list);
- 
- 	fenceable =
-+		i915_is_ggtt(vm) &&
- 		i915_gem_obj_ggtt_size(obj) == fence_size &&
- 		(i915_gem_obj_ggtt_offset(obj) & (fence_alignment - 1)) == 0;
- 
--	mappable = i915_gem_obj_ggtt_offset(obj) + obj->base.size <=
--		dev_priv->gtt.mappable_end;
-+	mappable =
-+		i915_is_ggtt(vm) &&
-+		vma->node.start + obj->base.size <= dev_priv->gtt.mappable_end;
- 
- 	obj->map_and_fenceable = mappable && fenceable;
- 
--	trace_i915_gem_object_bind(obj, map_and_fenceable);
-+	trace_i915_vma_bind(vma, map_and_fenceable);
- 	i915_gem_verify_gtt(dev);
- 	return 0;
- 
-@@ -3333,7 +3362,7 @@ int i915_gem_object_set_cache_level(struct drm_i915_gem_object *obj,
- 
- 	list_for_each_entry(vma, &obj->vma_list, vma_link) {
- 		if (!i915_gem_valid_gtt_space(dev, &vma->node, cache_level)) {
--			ret = i915_gem_object_unbind(obj);
-+			ret = i915_vma_unbind(vma);
- 			if (ret)
- 				return ret;
- 
-@@ -3641,33 +3670,39 @@ i915_gem_object_pin(struct drm_i915_gem_object *obj,
- 		    bool map_and_fenceable,
- 		    bool nonblocking)
- {
-+	struct i915_vma *vma;
- 	int ret;
- 
- 	if (WARN_ON(obj->pin_count == DRM_I915_GEM_OBJECT_MAX_PIN_COUNT))
- 		return -EBUSY;
- 
--	if (i915_gem_obj_ggtt_bound(obj)) {
--		if ((alignment && i915_gem_obj_ggtt_offset(obj) & (alignment - 1)) ||
-+	WARN_ON(map_and_fenceable && !i915_is_ggtt(vm));
-+
-+	vma = i915_gem_obj_to_vma(obj, vm);
-+
-+	if (vma) {
-+		if ((alignment &&
-+		     vma->node.start & (alignment - 1)) ||
- 		    (map_and_fenceable && !obj->map_and_fenceable)) {
- 			WARN(obj->pin_count,
- 			     "bo is already pinned with incorrect alignment:"
- 			     " offset=%lx, req.alignment=%x, req.map_and_fenceable=%d,"
- 			     " obj->map_and_fenceable=%d\n",
--			     i915_gem_obj_ggtt_offset(obj), alignment,
-+			     i915_gem_obj_offset(obj, vm), alignment,
- 			     map_and_fenceable,
- 			     obj->map_and_fenceable);
--			ret = i915_gem_object_unbind(obj);
-+			ret = i915_vma_unbind(vma);
- 			if (ret)
- 				return ret;
- 		}
- 	}
- 
--	if (!i915_gem_obj_ggtt_bound(obj)) {
-+	if (!i915_gem_obj_bound(obj, vm)) {
- 		struct drm_i915_private *dev_priv = obj->base.dev->dev_private;
- 
--		ret = i915_gem_object_bind_to_gtt(obj, alignment,
--						  map_and_fenceable,
--						  nonblocking);
-+		ret = i915_gem_object_bind_to_vm(obj, vm, alignment,
-+						 map_and_fenceable,
-+						 nonblocking);
- 		if (ret)
- 			return ret;
- 
-@@ -3963,6 +3998,7 @@ void i915_gem_free_object(struct drm_gem_object *gem_obj)
- 	struct drm_i915_gem_object *obj = to_intel_bo(gem_obj);
- 	struct drm_device *dev = obj->base.dev;
- 	drm_i915_private_t *dev_priv = dev->dev_private;
-+	struct i915_vma *vma, *next;
- 
- 	trace_i915_gem_object_destroy(obj);
- 
-@@ -3970,15 +4006,21 @@ void i915_gem_free_object(struct drm_gem_object *gem_obj)
- 		i915_gem_detach_phys_object(dev, obj);
- 
- 	obj->pin_count = 0;
--	if (WARN_ON(i915_gem_object_unbind(obj) == -ERESTARTSYS)) {
--		bool was_interruptible;
-+	/* NB: 0 or 1 elements */
-+	WARN_ON(!list_empty(&obj->vma_list) &&
-+		!list_is_singular(&obj->vma_list));
-+	list_for_each_entry_safe(vma, next, &obj->vma_list, vma_link) {
-+		int ret = i915_vma_unbind(vma);
-+		if (WARN_ON(ret == -ERESTARTSYS)) {
-+			bool was_interruptible;
- 
--		was_interruptible = dev_priv->mm.interruptible;
--		dev_priv->mm.interruptible = false;
-+			was_interruptible = dev_priv->mm.interruptible;
-+			dev_priv->mm.interruptible = false;
- 
--		WARN_ON(i915_gem_object_unbind(obj));
-+			WARN_ON(i915_vma_unbind(vma));
- 
--		dev_priv->mm.interruptible = was_interruptible;
-+			dev_priv->mm.interruptible = was_interruptible;
-+		}
- 	}
- 
- 	/* Stolen objects don't hold a ref, but do hold pin count. Fix that up
-diff --git a/drivers/gpu/drm/i915/i915_gem_evict.c b/drivers/gpu/drm/i915/i915_gem_evict.c
-index 33d85a4447a6..9205a4179b7e 100644
---- a/drivers/gpu/drm/i915/i915_gem_evict.c
-+++ b/drivers/gpu/drm/i915/i915_gem_evict.c
-@@ -147,7 +147,7 @@ found:
- 				       struct drm_i915_gem_object,
- 				       exec_list);
- 		if (ret == 0)
--			ret = i915_gem_object_unbind(obj);
-+			ret = i915_gem_object_ggtt_unbind(obj);
- 
- 		list_del_init(&obj->exec_list);
- 		drm_gem_object_unreference(&obj->base);
-@@ -185,7 +185,7 @@ i915_gem_evict_everything(struct drm_device *dev)
- 	/* Having flushed everything, unbind() should never raise an error */
- 	list_for_each_entry_safe(obj, next, &vm->inactive_list, mm_list)
- 		if (obj->pin_count == 0)
--			WARN_ON(i915_gem_object_unbind(obj));
-+			WARN_ON(i915_gem_object_ggtt_unbind(obj));
- 
- 	return 0;
- }
-diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-index 9939d2ef3ea9..17be2e4bae6b 100644
---- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-@@ -556,7 +556,7 @@ i915_gem_execbuffer_reserve(struct intel_ring_buffer *ring,
- 			if ((entry->alignment &&
- 			     obj_offset & (entry->alignment - 1)) ||
- 			    (need_mappable && !obj->map_and_fenceable))
--				ret = i915_gem_object_unbind(obj);
-+				ret = i915_vma_unbind(i915_gem_obj_to_vma(obj, vm));
- 			else
- 				ret = i915_gem_execbuffer_reserve_object(obj, ring, vm, need_relocs);
- 			if (ret)
-diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c
-index 92a8d279ca39..032e9ef9c896 100644
---- a/drivers/gpu/drm/i915/i915_gem_tiling.c
-+++ b/drivers/gpu/drm/i915/i915_gem_tiling.c
-@@ -360,17 +360,18 @@ i915_gem_set_tiling(struct drm_device *dev, void *data,
- 
- 		obj->map_and_fenceable =
- 			!i915_gem_obj_ggtt_bound(obj) ||
--			(i915_gem_obj_ggtt_offset(obj) + obj->base.size <= dev_priv->gtt.mappable_end &&
-+			(i915_gem_obj_ggtt_offset(obj) +
-+			 obj->base.size <= dev_priv->gtt.mappable_end &&
- 			 i915_gem_object_fence_ok(obj, args->tiling_mode));
- 
- 		/* Rebind if we need a change of alignment */
- 		if (!obj->map_and_fenceable) {
--			u32 unfenced_alignment =
-+			u32 unfenced_align =
- 				i915_gem_get_gtt_alignment(dev, obj->base.size,
- 							    args->tiling_mode,
- 							    false);
--			if (i915_gem_obj_ggtt_offset(obj) & (unfenced_alignment - 1))
--				ret = i915_gem_object_unbind(obj);
-+			if (i915_gem_obj_ggtt_offset(obj) & (unfenced_align - 1))
-+				ret = i915_gem_object_ggtt_unbind(obj);
- 		}
- 
- 		if (ret == 0) {
-diff --git a/drivers/gpu/drm/i915/i915_trace.h b/drivers/gpu/drm/i915/i915_trace.h
-index 2933e2ffeaa4..e2c5ee6f6194 100644
---- a/drivers/gpu/drm/i915/i915_trace.h
-+++ b/drivers/gpu/drm/i915/i915_trace.h
-@@ -33,47 +33,52 @@ TRACE_EVENT(i915_gem_object_create,
- 	    TP_printk("obj=%p, size=%u", __entry->obj, __entry->size)
- );
- 
--TRACE_EVENT(i915_gem_object_bind,
--	    TP_PROTO(struct drm_i915_gem_object *obj, bool mappable),
--	    TP_ARGS(obj, mappable),
-+TRACE_EVENT(i915_vma_bind,
-+	    TP_PROTO(struct i915_vma *vma, bool mappable),
-+	    TP_ARGS(vma, mappable),
- 
- 	    TP_STRUCT__entry(
- 			     __field(struct drm_i915_gem_object *, obj)
-+			     __field(struct i915_address_space *, vm)
- 			     __field(u32, offset)
- 			     __field(u32, size)
- 			     __field(bool, mappable)
- 			     ),
- 
- 	    TP_fast_assign(
--			   __entry->obj = obj;
--			   __entry->offset = i915_gem_obj_ggtt_offset(obj);
--			   __entry->size = i915_gem_obj_ggtt_size(obj);
-+			   __entry->obj = vma->obj;
-+			   __entry->vm = vma->vm;
-+			   __entry->offset = vma->node.start;
-+			   __entry->size = vma->node.size;
- 			   __entry->mappable = mappable;
- 			   ),
- 
--	    TP_printk("obj=%p, offset=%08x size=%x%s",
-+	    TP_printk("obj=%p, offset=%08x size=%x%s vm=%p",
- 		      __entry->obj, __entry->offset, __entry->size,
--		      __entry->mappable ? ", mappable" : "")
-+		      __entry->mappable ? ", mappable" : "",
-+		      __entry->vm)
- );
- 
--TRACE_EVENT(i915_gem_object_unbind,
--	    TP_PROTO(struct drm_i915_gem_object *obj),
--	    TP_ARGS(obj),
-+TRACE_EVENT(i915_vma_unbind,
-+	    TP_PROTO(struct i915_vma *vma),
-+	    TP_ARGS(vma),
- 
- 	    TP_STRUCT__entry(
- 			     __field(struct drm_i915_gem_object *, obj)
-+			     __field(struct i915_address_space *, vm)
- 			     __field(u32, offset)
- 			     __field(u32, size)
- 			     ),
- 
- 	    TP_fast_assign(
--			   __entry->obj = obj;
--			   __entry->offset = i915_gem_obj_ggtt_offset(obj);
--			   __entry->size = i915_gem_obj_ggtt_size(obj);
-+			   __entry->obj = vma->obj;
-+			   __entry->vm = vma->vm;
-+			   __entry->offset = vma->node.start;
-+			   __entry->size = vma->node.size;
- 			   ),
- 
--	    TP_printk("obj=%p, offset=%08x size=%x",
--		      __entry->obj, __entry->offset, __entry->size)
-+	    TP_printk("obj=%p, offset=%08x size=%x vm=%p",
-+		      __entry->obj, __entry->offset, __entry->size, __entry->vm)
- );
- 
- TRACE_EVENT(i915_gem_object_change_domain,
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0603-drm-i915-Use-new-bind-unbind-in-eviction-code.patch b/patches.baytrail/0603-drm-i915-Use-new-bind-unbind-in-eviction-code.patch
deleted file mode 100644
index 630452217e056..0000000000000
--- a/patches.baytrail/0603-drm-i915-Use-new-bind-unbind-in-eviction-code.patch
+++ /dev/null
@@ -1,184 +0,0 @@
-From 01eecc95b0a5eb792a22b0f533f1099c2eb33fd9 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Wed, 31 Jul 2013 17:00:11 -0700
-Subject: drm/i915: Use new bind/unbind in eviction code
-
-Eviction code, like the rest of the converted code needs to be aware of
-the address space for which it is evicting (or the everything case, all
-addresses). With the updated bind/unbind interfaces of the last patch,
-we can now safely move the eviction code over.
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit f6cd1f15d345688cb95cc195aaf8b375f7de8cf6)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h       |  4 ++-
- drivers/gpu/drm/i915/i915_gem.c       |  2 +-
- drivers/gpu/drm/i915/i915_gem_evict.c | 53 +++++++++++++++++++----------------
- 3 files changed, 33 insertions(+), 26 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 6e8e6950cb8c..49a2e336a7b5 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1982,7 +1982,9 @@ static inline void i915_gem_chipset_flush(struct drm_device *dev)
- 
- 
- /* i915_gem_evict.c */
--int __must_check i915_gem_evict_something(struct drm_device *dev, int min_size,
-+int __must_check i915_gem_evict_something(struct drm_device *dev,
-+					  struct i915_address_space *vm,
-+					  int min_size,
- 					  unsigned alignment,
- 					  unsigned cache_level,
- 					  bool mappable,
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index 6f7b1b47d210..8a21ee7f7903 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -3154,7 +3154,7 @@ search_free:
- 						  obj->cache_level, 0, gtt_max,
- 						  DRM_MM_SEARCH_DEFAULT);
- 	if (ret) {
--		ret = i915_gem_evict_something(dev, size, alignment,
-+		ret = i915_gem_evict_something(dev, vm, size, alignment,
- 					       obj->cache_level,
- 					       map_and_fenceable,
- 					       nonblocking);
-diff --git a/drivers/gpu/drm/i915/i915_gem_evict.c b/drivers/gpu/drm/i915/i915_gem_evict.c
-index 9205a4179b7e..61bf5e20e5e0 100644
---- a/drivers/gpu/drm/i915/i915_gem_evict.c
-+++ b/drivers/gpu/drm/i915/i915_gem_evict.c
-@@ -32,26 +32,21 @@
- #include "i915_trace.h"
- 
- static bool
--mark_free(struct drm_i915_gem_object *obj, struct list_head *unwind)
-+mark_free(struct i915_vma *vma, struct list_head *unwind)
- {
--	struct drm_device *dev = obj->base.dev;
--	struct drm_i915_private *dev_priv = dev->dev_private;
--	struct i915_vma *vma = i915_gem_obj_to_vma(obj, &dev_priv->gtt.base);
--
--	if (obj->pin_count)
-+	if (vma->obj->pin_count)
- 		return false;
- 
--	list_add(&obj->exec_list, unwind);
-+	list_add(&vma->obj->exec_list, unwind);
- 	return drm_mm_scan_add_block(&vma->node);
- }
- 
- int
--i915_gem_evict_something(struct drm_device *dev, int min_size,
--			 unsigned alignment, unsigned cache_level,
-+i915_gem_evict_something(struct drm_device *dev, struct i915_address_space *vm,
-+			 int min_size, unsigned alignment, unsigned cache_level,
- 			 bool mappable, bool nonblocking)
- {
- 	drm_i915_private_t *dev_priv = dev->dev_private;
--	struct i915_address_space *vm = &dev_priv->gtt.base;
- 	struct list_head eviction_list, unwind_list;
- 	struct i915_vma *vma;
- 	struct drm_i915_gem_object *obj;
-@@ -83,16 +78,18 @@ i915_gem_evict_something(struct drm_device *dev, int min_size,
- 	 */
- 
- 	INIT_LIST_HEAD(&unwind_list);
--	if (mappable)
-+	if (mappable) {
-+		BUG_ON(!i915_is_ggtt(vm));
- 		drm_mm_init_scan_with_range(&vm->mm, min_size,
- 					    alignment, cache_level, 0,
- 					    dev_priv->gtt.mappable_end);
--	else
-+	} else
- 		drm_mm_init_scan(&vm->mm, min_size, alignment, cache_level);
- 
- 	/* First see if there is a large enough contiguous idle region... */
- 	list_for_each_entry(obj, &vm->inactive_list, mm_list) {
--		if (mark_free(obj, &unwind_list))
-+		struct i915_vma *vma = i915_gem_obj_to_vma(obj, vm);
-+		if (mark_free(vma, &unwind_list))
- 			goto found;
- 	}
- 
-@@ -101,7 +98,8 @@ i915_gem_evict_something(struct drm_device *dev, int min_size,
- 
- 	/* Now merge in the soon-to-be-expired objects... */
- 	list_for_each_entry(obj, &vm->active_list, mm_list) {
--		if (mark_free(obj, &unwind_list))
-+		struct i915_vma *vma = i915_gem_obj_to_vma(obj, vm);
-+		if (mark_free(vma, &unwind_list))
- 			goto found;
- 	}
- 
-@@ -111,7 +109,7 @@ none:
- 		obj = list_first_entry(&unwind_list,
- 				       struct drm_i915_gem_object,
- 				       exec_list);
--		vma = i915_gem_obj_to_vma(obj, &dev_priv->gtt.base);
-+		vma = i915_gem_obj_to_vma(obj, vm);
- 		ret = drm_mm_scan_remove_block(&vma->node);
- 		BUG_ON(ret);
- 
-@@ -132,7 +130,7 @@ found:
- 		obj = list_first_entry(&unwind_list,
- 				       struct drm_i915_gem_object,
- 				       exec_list);
--		vma = i915_gem_obj_to_vma(obj, &dev_priv->gtt.base);
-+		vma = i915_gem_obj_to_vma(obj, vm);
- 		if (drm_mm_scan_remove_block(&vma->node)) {
- 			list_move(&obj->exec_list, &eviction_list);
- 			drm_gem_object_reference(&obj->base);
-@@ -147,7 +145,7 @@ found:
- 				       struct drm_i915_gem_object,
- 				       exec_list);
- 		if (ret == 0)
--			ret = i915_gem_object_ggtt_unbind(obj);
-+			ret = i915_vma_unbind(i915_gem_obj_to_vma(obj, vm));
- 
- 		list_del_init(&obj->exec_list);
- 		drm_gem_object_unreference(&obj->base);
-@@ -160,13 +158,18 @@ int
- i915_gem_evict_everything(struct drm_device *dev)
- {
- 	drm_i915_private_t *dev_priv = dev->dev_private;
--	struct i915_address_space *vm = &dev_priv->gtt.base;
-+	struct i915_address_space *vm;
- 	struct drm_i915_gem_object *obj, *next;
--	bool lists_empty;
-+	bool lists_empty = true;
- 	int ret;
- 
--	lists_empty = (list_empty(&vm->inactive_list) &&
--		       list_empty(&vm->active_list));
-+	list_for_each_entry(vm, &dev_priv->vm_list, global_link) {
-+		lists_empty = (list_empty(&vm->inactive_list) &&
-+			       list_empty(&vm->active_list));
-+		if (!lists_empty)
-+			lists_empty = false;
-+	}
-+
- 	if (lists_empty)
- 		return -ENOSPC;
- 
-@@ -183,9 +186,11 @@ i915_gem_evict_everything(struct drm_device *dev)
- 	i915_gem_retire_requests(dev);
- 
- 	/* Having flushed everything, unbind() should never raise an error */
--	list_for_each_entry_safe(obj, next, &vm->inactive_list, mm_list)
--		if (obj->pin_count == 0)
--			WARN_ON(i915_gem_object_ggtt_unbind(obj));
-+	list_for_each_entry(vm, &dev_priv->vm_list, global_link) {
-+		list_for_each_entry_safe(obj, next, &vm->inactive_list, mm_list)
-+			if (obj->pin_count == 0)
-+				WARN_ON(i915_vma_unbind(i915_gem_obj_to_vma(obj, vm)));
-+	}
- 
- 	return 0;
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0604-drm-i915-turn-bound_ggtt-checks-to-bound_any.patch b/patches.baytrail/0604-drm-i915-turn-bound_ggtt-checks-to-bound_any.patch
deleted file mode 100644
index a2fe920ba3085..0000000000000
--- a/patches.baytrail/0604-drm-i915-turn-bound_ggtt-checks-to-bound_any.patch
+++ /dev/null
@@ -1,109 +0,0 @@
-From 94fe280df819c4414b59832e63584dff43d3e7fc Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Wed, 31 Jul 2013 17:00:12 -0700
-Subject: drm/i915: turn bound_ggtt checks to bound_any
-
-In some places, we want to know if an object is bound in any address
-space, and not just the global GTT. This often applies when there is a
-single global resource (object, pages, etc.)
-
-function                             |      reason
---------------------------------------------------
-i915_gem_object_is_inactive          | global object
-i915_gem_object_put_pages            | object's pages
-915_gem_object_unpin                 | global object
-i915_gem_execbuffer_unreserve_object | temporary until we plumb vma
-pread/pwrite                         | see the note below
-
-Note: set_to_gtt_domain in pwrite/pread is abused as a wait_rendering
-call - but that once only worked if the object is bound. We really
-should replace this with a plain wait_rendering call, which would have
-the upside that in pread it would be clearer that we actually only
-wait for oustanding gpu writes.
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-[danvet: Explain the set_to_gtt_domain in pwrite/pread and volunteer
-Ben to replace those with wait_rendering calls.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 9843877d10700d6b64b615e0e8724fc9f6ff6268)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem.c            | 12 ++++++------
- drivers/gpu/drm/i915/i915_gem_execbuffer.c |  2 +-
- 2 files changed, 7 insertions(+), 7 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index 8a21ee7f7903..9150804dffc0 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -142,7 +142,7 @@ int i915_mutex_lock_interruptible(struct drm_device *dev)
- static inline bool
- i915_gem_object_is_inactive(struct drm_i915_gem_object *obj)
- {
--	return i915_gem_obj_ggtt_bound(obj) && !obj->active;
-+	return i915_gem_obj_bound_any(obj) && !obj->active;
- }
- 
- int
-@@ -416,7 +416,7 @@ i915_gem_shmem_pread(struct drm_device *dev,
- 		 * anyway again before the next pread happens. */
- 		if (obj->cache_level == I915_CACHE_NONE)
- 			needs_clflush = 1;
--		if (i915_gem_obj_ggtt_bound(obj)) {
-+		if (i915_gem_obj_bound_any(obj)) {
- 			ret = i915_gem_object_set_to_gtt_domain(obj, false);
- 			if (ret)
- 				return ret;
-@@ -733,7 +733,7 @@ i915_gem_shmem_pwrite(struct drm_device *dev,
- 		 * right away and we therefore have to clflush anyway. */
- 		if (obj->cache_level == I915_CACHE_NONE)
- 			needs_clflush_after = 1;
--		if (i915_gem_obj_ggtt_bound(obj)) {
-+		if (i915_gem_obj_bound_any(obj)) {
- 			ret = i915_gem_object_set_to_gtt_domain(obj, true);
- 			if (ret)
- 				return ret;
-@@ -1660,7 +1660,7 @@ i915_gem_object_put_pages(struct drm_i915_gem_object *obj)
- 	if (obj->pages_pin_count)
- 		return -EBUSY;
- 
--	BUG_ON(i915_gem_obj_ggtt_bound(obj));
-+	BUG_ON(i915_gem_obj_bound_any(obj));
- 
- 	/* ->put_pages might need to allocate memory for the bit17 swizzle
- 	 * array, hence protect them from being reaped by removing them from gtt
-@@ -3299,7 +3299,7 @@ i915_gem_object_set_to_gtt_domain(struct drm_i915_gem_object *obj, bool write)
- 	int ret;
- 
- 	/* Not valid to be called on unbound objects. */
--	if (!i915_gem_obj_ggtt_bound(obj))
-+	if (!i915_gem_obj_bound_any(obj))
- 		return -EINVAL;
- 
- 	if (obj->base.write_domain == I915_GEM_DOMAIN_GTT)
-@@ -3723,7 +3723,7 @@ void
- i915_gem_object_unpin(struct drm_i915_gem_object *obj)
- {
- 	BUG_ON(obj->pin_count == 0);
--	BUG_ON(!i915_gem_obj_ggtt_bound(obj));
-+	BUG_ON(!i915_gem_obj_bound_any(obj));
- 
- 	if (--obj->pin_count == 0)
- 		obj->pin_mappable = false;
-diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-index 17be2e4bae6b..aa3fa9425cae 100644
---- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-@@ -466,7 +466,7 @@ i915_gem_execbuffer_unreserve_object(struct drm_i915_gem_object *obj)
- {
- 	struct drm_i915_gem_exec_object2 *entry;
- 
--	if (!i915_gem_obj_ggtt_bound(obj))
-+	if (!i915_gem_obj_bound_any(obj))
- 		return;
- 
- 	entry = obj->exec_entry;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0605-video-hdmi-Introduce-a-generic-hdmi_infoframe-union.patch b/patches.baytrail/0605-video-hdmi-Introduce-a-generic-hdmi_infoframe-union.patch
deleted file mode 100644
index da6f5bfc478d1..0000000000000
--- a/patches.baytrail/0605-video-hdmi-Introduce-a-generic-hdmi_infoframe-union.patch
+++ /dev/null
@@ -1,117 +0,0 @@
-From 0e4425f28f2d06748f566f13b086bbf639c00c66 Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Tue, 6 Aug 2013 20:32:14 +0100
-Subject: video/hdmi: Introduce a generic hdmi_infoframe union
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-And a way to pack hdmi_infoframe generically.
-
-Cc: Thierry Reding <thierry.reding@avionic-design.de>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Acked-by: Dave Airlie <airlied@gmail.com>
-Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 72b098964d3c3fb030dcac2d4c869c9851a0d17a)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/video/hdmi.c | 43 +++++++++++++++++++++++++++++++++++++++++++
- include/linux/hdmi.h | 17 +++++++++++++++++
- 2 files changed, 60 insertions(+)
-
-diff --git a/drivers/video/hdmi.c b/drivers/video/hdmi.c
-index 40178338b619..89054d82c0e1 100644
---- a/drivers/video/hdmi.c
-+++ b/drivers/video/hdmi.c
-@@ -22,6 +22,7 @@
-  */
- 
- #include <linux/bitops.h>
-+#include <linux/bug.h>
- #include <linux/errno.h>
- #include <linux/export.h>
- #include <linux/hdmi.h>
-@@ -321,3 +322,45 @@ ssize_t hdmi_vendor_infoframe_pack(struct hdmi_vendor_infoframe *frame,
- 	return length;
- }
- EXPORT_SYMBOL(hdmi_vendor_infoframe_pack);
-+
-+/**
-+ * hdmi_infoframe_pack() - write a HDMI infoframe to binary buffer
-+ * @frame: HDMI infoframe
-+ * @buffer: destination buffer
-+ * @size: size of buffer
-+ *
-+ * Packs the information contained in the @frame structure into a binary
-+ * representation that can be written into the corresponding controller
-+ * registers. Also computes the checksum as required by section 5.3.5 of
-+ * the HDMI 1.4 specification.
-+ *
-+ * Returns the number of bytes packed into the binary buffer or a negative
-+ * error code on failure.
-+ */
-+ssize_t
-+hdmi_infoframe_pack(union hdmi_infoframe *frame, void *buffer, size_t size)
-+{
-+	ssize_t length;
-+
-+	switch (frame->any.type) {
-+	case HDMI_INFOFRAME_TYPE_AVI:
-+		length = hdmi_avi_infoframe_pack(&frame->avi, buffer, size);
-+		break;
-+	case HDMI_INFOFRAME_TYPE_SPD:
-+		length = hdmi_spd_infoframe_pack(&frame->spd, buffer, size);
-+		break;
-+	case HDMI_INFOFRAME_TYPE_AUDIO:
-+		length = hdmi_audio_infoframe_pack(&frame->audio, buffer, size);
-+		break;
-+	case HDMI_INFOFRAME_TYPE_VENDOR:
-+		length = hdmi_vendor_infoframe_pack(&frame->vendor,
-+						    buffer, size);
-+		break;
-+	default:
-+		WARN(1, "Bad infoframe type %d\n", frame->any.type);
-+		length = -EINVAL;
-+	}
-+
-+	return length;
-+}
-+EXPORT_SYMBOL(hdmi_infoframe_pack);
-diff --git a/include/linux/hdmi.h b/include/linux/hdmi.h
-index 3b589440ecfe..0f3f82eadef7 100644
---- a/include/linux/hdmi.h
-+++ b/include/linux/hdmi.h
-@@ -23,6 +23,12 @@ enum hdmi_infoframe_type {
- #define HDMI_SPD_INFOFRAME_SIZE    25
- #define HDMI_AUDIO_INFOFRAME_SIZE  10
- 
-+struct hdmi_any_infoframe {
-+	enum hdmi_infoframe_type type;
-+	unsigned char version;
-+	unsigned char length;
-+};
-+
- enum hdmi_colorspace {
- 	HDMI_COLORSPACE_RGB,
- 	HDMI_COLORSPACE_YUV422,
-@@ -228,4 +234,15 @@ struct hdmi_vendor_infoframe {
- ssize_t hdmi_vendor_infoframe_pack(struct hdmi_vendor_infoframe *frame,
- 				   void *buffer, size_t size);
- 
-+union hdmi_infoframe {
-+	struct hdmi_any_infoframe any;
-+	struct hdmi_avi_infoframe avi;
-+	struct hdmi_spd_infoframe spd;
-+	struct hdmi_vendor_infoframe vendor;
-+	struct hdmi_audio_infoframe audio;
-+};
-+
-+ssize_t
-+hdmi_infoframe_pack(union hdmi_infoframe *frame, void *buffer, size_t size);
-+
- #endif /* _DRM_HDMI_H */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0606-video-hdmi-Add-a-macro-to-return-the-size-of-a-full-.patch b/patches.baytrail/0606-video-hdmi-Add-a-macro-to-return-the-size-of-a-full-.patch
deleted file mode 100644
index 38302776b933e..0000000000000
--- a/patches.baytrail/0606-video-hdmi-Add-a-macro-to-return-the-size-of-a-full-.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From cc8238049bdc063a0ce0b6dde68e1e9687107cb4 Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Tue, 6 Aug 2013 20:32:15 +0100
-Subject: video/hdmi: Add a macro to return the size of a full infoframe
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Cc: Thierry Reding <thierry.reding@avionic-design.de>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Acked-by: Dave Airlie <airlied@gmail.com>
-Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 61177b0e12ba162d5de206914e8703d8eb90ad19)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- include/linux/hdmi.h | 3 +++
- 1 file changed, 3 insertions(+)
-
-diff --git a/include/linux/hdmi.h b/include/linux/hdmi.h
-index 0f3f82eadef7..bc6743e76e37 100644
---- a/include/linux/hdmi.h
-+++ b/include/linux/hdmi.h
-@@ -23,6 +23,9 @@ enum hdmi_infoframe_type {
- #define HDMI_SPD_INFOFRAME_SIZE    25
- #define HDMI_AUDIO_INFOFRAME_SIZE  10
- 
-+#define HDMI_INFOFRAME_SIZE(type)	\
-+	(HDMI_INFOFRAME_HEADER_SIZE + HDMI_ ## type ## _INFOFRAME_SIZE)
-+
- struct hdmi_any_infoframe {
- 	enum hdmi_infoframe_type type;
- 	unsigned char version;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0607-video-hdmi-Don-t-let-the-user-of-this-API-create-inv.patch b/patches.baytrail/0607-video-hdmi-Don-t-let-the-user-of-this-API-create-inv.patch
deleted file mode 100644
index e0fa2f2315c4b..0000000000000
--- a/patches.baytrail/0607-video-hdmi-Don-t-let-the-user-of-this-API-create-inv.patch
+++ /dev/null
@@ -1,66 +0,0 @@
-From 67d51500875d57f0b9ccef39aafedcaf43a1f33c Mon Sep 17 00:00:00 2001
-From: "Lespiau, Damien" <damien.lespiau@intel.com>
-Date: Mon, 19 Aug 2013 16:58:56 +0100
-Subject: video/hdmi: Don't let the user of this API create invalid infoframes
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-To set the active aspect ratio value in the AVI infoframe today, you not
-only have to set the active_aspect field, but also the active_info_valid
-bit. Out of the 1 user of this API, we had 100% misuse, forgetting the
-_valid bit. This was fixed in:
-
-  Author: Damien Lespiau <damien.lespiau@intel.com>
-  Date:   Tue Aug 6 20:32:17 2013 +0100
-
-      drm: Don't generate invalid AVI infoframes for CEA modes
-
-We can do better and derive the _valid bit from the user wanting to set
-the active aspect ratio.
-
-v2: Fix multi-lines comment style (Thierry Reding)
-
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Thierry Reding <treding@nvidia.com>
-Signed-off-by: Dave Airlie <airlied@gmail.com>
-(cherry picked from commit a5ad3dcf358475dfc5ccf11e28d3822fc3c8e5fe)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/video/hdmi.c | 6 +++++-
- include/linux/hdmi.h | 1 -
- 2 files changed, 5 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/video/hdmi.c b/drivers/video/hdmi.c
-index 89054d82c0e1..995daec1ca7b 100644
---- a/drivers/video/hdmi.c
-+++ b/drivers/video/hdmi.c
-@@ -96,7 +96,11 @@ ssize_t hdmi_avi_infoframe_pack(struct hdmi_avi_infoframe *frame, void *buffer,
- 
- 	ptr[0] = ((frame->colorspace & 0x3) << 5) | (frame->scan_mode & 0x3);
- 
--	if (frame->active_info_valid)
-+	/*
-+	 * Data byte 1, bit 4 has to be set if we provide the active format
-+	 * aspect ratio
-+	 */
-+	if (frame->active_aspect & 0xf)
- 		ptr[0] |= BIT(4);
- 
- 	if (frame->horizontal_bar_valid)
-diff --git a/include/linux/hdmi.h b/include/linux/hdmi.h
-index bc6743e76e37..931474c60b71 100644
---- a/include/linux/hdmi.h
-+++ b/include/linux/hdmi.h
-@@ -109,7 +109,6 @@ struct hdmi_avi_infoframe {
- 	unsigned char version;
- 	unsigned char length;
- 	enum hdmi_colorspace colorspace;
--	bool active_info_valid;
- 	bool horizontal_bar_valid;
- 	bool vertical_bar_valid;
- 	enum hdmi_scan_mode scan_mode;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0608-video-hdmi-Derive-the-bar-data-valid-bit-from-the-ba.patch b/patches.baytrail/0608-video-hdmi-Derive-the-bar-data-valid-bit-from-the-ba.patch
deleted file mode 100644
index 711d1d0ba012e..0000000000000
--- a/patches.baytrail/0608-video-hdmi-Derive-the-bar-data-valid-bit-from-the-ba.patch
+++ /dev/null
@@ -1,62 +0,0 @@
-From c9b8c9c70dace339ee2f0a67423ebb824f6be71e Mon Sep 17 00:00:00 2001
-From: "Lespiau, Damien" <damien.lespiau@intel.com>
-Date: Mon, 19 Aug 2013 16:58:57 +0100
-Subject: video/hdmi: Derive the bar data valid bit from the bar data fields
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Just like:
-
-  Author: Damien Lespiau <damien.lespiau@intel.com>
-  Date:   Mon Aug 12 11:53:24 2013 +0100
-
-      video/hdmi: Don't let the user of this API create invalid infoframes
-
-But this time for the horizontal/vertical bar data present bits.
-
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Thierry Reding <treding@nvidia.com>
-Signed-off-by: Dave Airlie <airlied@gmail.com>
-(cherry picked from commit 974e0701c5251de879624d166890fbd0ee9fc429)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/video/hdmi.c | 5 +++--
- include/linux/hdmi.h | 2 --
- 2 files changed, 3 insertions(+), 4 deletions(-)
-
-diff --git a/drivers/video/hdmi.c b/drivers/video/hdmi.c
-index 995daec1ca7b..060337b393db 100644
---- a/drivers/video/hdmi.c
-+++ b/drivers/video/hdmi.c
-@@ -103,10 +103,11 @@ ssize_t hdmi_avi_infoframe_pack(struct hdmi_avi_infoframe *frame, void *buffer,
- 	if (frame->active_aspect & 0xf)
- 		ptr[0] |= BIT(4);
- 
--	if (frame->horizontal_bar_valid)
-+	/* Bit 3 and 2 indicate if we transmit horizontal/vertical bar data */
-+	if (frame->top_bar || frame->bottom_bar)
- 		ptr[0] |= BIT(3);
- 
--	if (frame->vertical_bar_valid)
-+	if (frame->left_bar || frame->right_bar)
- 		ptr[0] |= BIT(2);
- 
- 	ptr[1] = ((frame->colorimetry & 0x3) << 6) |
-diff --git a/include/linux/hdmi.h b/include/linux/hdmi.h
-index 931474c60b71..b98340b82e05 100644
---- a/include/linux/hdmi.h
-+++ b/include/linux/hdmi.h
-@@ -109,8 +109,6 @@ struct hdmi_avi_infoframe {
- 	unsigned char version;
- 	unsigned char length;
- 	enum hdmi_colorspace colorspace;
--	bool horizontal_bar_valid;
--	bool vertical_bar_valid;
- 	enum hdmi_scan_mode scan_mode;
- 	enum hdmi_colorimetry colorimetry;
- 	enum hdmi_picture_aspect picture_aspect;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0609-video-hdmi-Introduce-helpers-for-the-HDMI-vendor-spe.patch b/patches.baytrail/0609-video-hdmi-Introduce-helpers-for-the-HDMI-vendor-spe.patch
deleted file mode 100644
index d359b8fe6c604..0000000000000
--- a/patches.baytrail/0609-video-hdmi-Introduce-helpers-for-the-HDMI-vendor-spe.patch
+++ /dev/null
@@ -1,176 +0,0 @@
-From 64e96dc8bf364ec5c71bef620b170964fc29173a Mon Sep 17 00:00:00 2001
-From: "Lespiau, Damien" <damien.lespiau@intel.com>
-Date: Mon, 19 Aug 2013 16:58:58 +0100
-Subject: video/hdmi: Introduce helpers for the HDMI vendor specific infoframe
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Provide the same programming model than the other infoframe types.
-
-The generic _pack() function can't handle those yet as we need to move
-the vendor OUI in the generic hdmi_vendor_infoframe structure to know
-which kind of vendor infoframe we are dealing with.
-
-v2: Fix the value of Side-by-side (half), hmdi typo, pack 3D_Ext_Data
-    (Ville Syrjälä)
-v3: Future proof the sending of 3D_Ext_Data (Ville Syrjälä), Fix
-    multi-lines comment style (Thierry Reding)
-
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Thierry Reding <treding@nvidia.com>
-Signed-off-by: Dave Airlie <airlied@gmail.com>
-(cherry picked from commit 7d27becb3532d881378846e72864031977be511a)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/video/hdmi.c | 90 ++++++++++++++++++++++++++++++++++++++++++++++++++++
- include/linux/hdmi.h | 26 +++++++++++++++
- 2 files changed, 116 insertions(+)
-
-diff --git a/drivers/video/hdmi.c b/drivers/video/hdmi.c
-index 060337b393db..82c663a8961e 100644
---- a/drivers/video/hdmi.c
-+++ b/drivers/video/hdmi.c
-@@ -288,6 +288,96 @@ ssize_t hdmi_audio_infoframe_pack(struct hdmi_audio_infoframe *frame,
- EXPORT_SYMBOL(hdmi_audio_infoframe_pack);
- 
- /**
-+ * hdmi_hdmi_infoframe_init() - initialize an HDMI vendor infoframe
-+ * @frame: HDMI vendor infoframe
-+ *
-+ * Returns 0 on success or a negative error code on failure.
-+ */
-+int hdmi_hdmi_infoframe_init(struct hdmi_hdmi_infoframe *frame)
-+{
-+	memset(frame, 0, sizeof(*frame));
-+
-+	frame->type = HDMI_INFOFRAME_TYPE_VENDOR;
-+	frame->version = 1;
-+
-+	/*
-+	 * 0 is a valid value for s3d_struct, so we use a special "not set"
-+	 * value
-+	 */
-+	frame->s3d_struct = HDMI_3D_STRUCTURE_INVALID;
-+
-+	return 0;
-+}
-+EXPORT_SYMBOL(hdmi_hdmi_infoframe_init);
-+
-+/**
-+ * hdmi_hdmi_infoframe_pack() - write a HDMI vendor infoframe to binary buffer
-+ * @frame: HDMI infoframe
-+ * @buffer: destination buffer
-+ * @size: size of buffer
-+ *
-+ * Packs the information contained in the @frame structure into a binary
-+ * representation that can be written into the corresponding controller
-+ * registers. Also computes the checksum as required by section 5.3.5 of
-+ * the HDMI 1.4 specification.
-+ *
-+ * Returns the number of bytes packed into the binary buffer or a negative
-+ * error code on failure.
-+ */
-+ssize_t hdmi_hdmi_infoframe_pack(struct hdmi_hdmi_infoframe *frame,
-+				 void *buffer, size_t size)
-+{
-+	u8 *ptr = buffer;
-+	size_t length;
-+
-+	/* empty info frame */
-+	if (frame->vic == 0 && frame->s3d_struct == HDMI_3D_STRUCTURE_INVALID)
-+		return -EINVAL;
-+
-+	/* only one of those can be supplied */
-+	if (frame->vic != 0 && frame->s3d_struct != HDMI_3D_STRUCTURE_INVALID)
-+		return -EINVAL;
-+
-+	/* for side by side (half) we also need to provide 3D_Ext_Data */
-+	if (frame->s3d_struct >= HDMI_3D_STRUCTURE_SIDE_BY_SIDE_HALF)
-+		frame->length = 6;
-+	else
-+		frame->length = 5;
-+
-+	length = HDMI_INFOFRAME_HEADER_SIZE + frame->length;
-+
-+	if (size < length)
-+		return -ENOSPC;
-+
-+	memset(buffer, 0, size);
-+
-+	ptr[0] = frame->type;
-+	ptr[1] = frame->version;
-+	ptr[2] = frame->length;
-+	ptr[3] = 0; /* checksum */
-+
-+	/* HDMI OUI */
-+	ptr[4] = 0x03;
-+	ptr[5] = 0x0c;
-+	ptr[6] = 0x00;
-+
-+	if (frame->vic) {
-+		ptr[7] = 0x1 << 5;	/* video format */
-+		ptr[8] = frame->vic;
-+	} else {
-+		ptr[7] = 0x2 << 5;	/* video format */
-+		ptr[8] = (frame->s3d_struct & 0xf) << 4;
-+		if (frame->s3d_struct >= HDMI_3D_STRUCTURE_SIDE_BY_SIDE_HALF)
-+			ptr[9] = (frame->s3d_ext_data & 0xf) << 4;
-+	}
-+
-+	hdmi_infoframe_checksum(buffer, length);
-+
-+	return length;
-+}
-+EXPORT_SYMBOL(hdmi_hdmi_infoframe_pack);
-+
-+/**
-  * hdmi_vendor_infoframe_pack() - write a HDMI vendor infoframe to binary
-  *                                buffer
-  * @frame: HDMI vendor infoframe
-diff --git a/include/linux/hdmi.h b/include/linux/hdmi.h
-index b98340b82e05..e733252c2b5d 100644
---- a/include/linux/hdmi.h
-+++ b/include/linux/hdmi.h
-@@ -234,11 +234,37 @@ struct hdmi_vendor_infoframe {
- ssize_t hdmi_vendor_infoframe_pack(struct hdmi_vendor_infoframe *frame,
- 				   void *buffer, size_t size);
- 
-+enum hdmi_3d_structure {
-+	HDMI_3D_STRUCTURE_INVALID = -1,
-+	HDMI_3D_STRUCTURE_FRAME_PACKING = 0,
-+	HDMI_3D_STRUCTURE_FIELD_ALTERNATIVE,
-+	HDMI_3D_STRUCTURE_LINE_ALTERNATIVE,
-+	HDMI_3D_STRUCTURE_SIDE_BY_SIDE_FULL,
-+	HDMI_3D_STRUCTURE_L_DEPTH,
-+	HDMI_3D_STRUCTURE_L_DEPTH_GFX_GFX_DEPTH,
-+	HDMI_3D_STRUCTURE_TOP_AND_BOTTOM,
-+	HDMI_3D_STRUCTURE_SIDE_BY_SIDE_HALF = 8,
-+};
-+
-+struct hdmi_hdmi_infoframe {
-+	enum hdmi_infoframe_type type;
-+	unsigned char version;
-+	unsigned char length;
-+	u8 vic;
-+	enum hdmi_3d_structure s3d_struct;
-+	unsigned int s3d_ext_data;
-+};
-+
-+int hdmi_hdmi_infoframe_init(struct hdmi_hdmi_infoframe *frame);
-+ssize_t hdmi_hdmi_infoframe_pack(struct hdmi_hdmi_infoframe *frame,
-+				 void *buffer, size_t size);
-+
- union hdmi_infoframe {
- 	struct hdmi_any_infoframe any;
- 	struct hdmi_avi_infoframe avi;
- 	struct hdmi_spd_infoframe spd;
- 	struct hdmi_vendor_infoframe vendor;
-+	struct hdmi_hdmi_infoframe hdmi;
- 	struct hdmi_audio_infoframe audio;
- };
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0610-drm-edid-Move-HDMI_IDENTIFIER-to-hdmi.h.patch b/patches.baytrail/0610-drm-edid-Move-HDMI_IDENTIFIER-to-hdmi.h.patch
deleted file mode 100644
index b4c34bebe9a9c..0000000000000
--- a/patches.baytrail/0610-drm-edid-Move-HDMI_IDENTIFIER-to-hdmi.h.patch
+++ /dev/null
@@ -1,47 +0,0 @@
-From 505b8dc01bed63c31636a7eb0b3981ff9d9caf7e Mon Sep 17 00:00:00 2001
-From: "Lespiau, Damien" <damien.lespiau@intel.com>
-Date: Mon, 19 Aug 2013 16:59:00 +0100
-Subject: drm/edid: Move HDMI_IDENTIFIER to hdmi.h
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-We'll need the HDMI OUI for the HDMI vendor infoframe data, so let's
-move the DRM one to hdmi.h, might as well use the hdmi header to store
-some hdmi defines.
-
-(Note that, in fact, infoframes are part of the CEA-861 standard, and
-only the HDMI vendor specific infoframe is special to HDMI, but
-details..)
-
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Thierry Reding <treding@nvidia.com>
-Signed-off-by: Dave Airlie <airlied@gmail.com>
-(cherry picked from commit c782d2e73d1e69c863d03945907bc7fbc879a778)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_edid.c |    1 -
- include/linux/hdmi.h       |    1 +
- 2 files changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/gpu/drm/drm_edid.c
-+++ b/drivers/gpu/drm/drm_edid.c
-@@ -2292,7 +2292,6 @@ add_detailed_modes(struct drm_connector
- 	return closure.modes;
- }
- 
--#define HDMI_IDENTIFIER 0x000C03
- #define AUDIO_BLOCK	0x01
- #define VIDEO_BLOCK     0x02
- #define VENDOR_BLOCK    0x03
---- a/include/linux/hdmi.h
-+++ b/include/linux/hdmi.h
-@@ -18,6 +18,7 @@ enum hdmi_infoframe_type {
- 	HDMI_INFOFRAME_TYPE_AUDIO = 0x84,
- };
- 
-+#define HDMI_IDENTIFIER 0x000c03
- #define HDMI_INFOFRAME_HEADER_SIZE  4
- #define HDMI_AVI_INFOFRAME_SIZE    13
- #define HDMI_SPD_INFOFRAME_SIZE    25
diff --git a/patches.baytrail/0611-video-hdmi-Hook-the-HDMI-vendor-infoframe-with-the-g.patch b/patches.baytrail/0611-video-hdmi-Hook-the-HDMI-vendor-infoframe-with-the-g.patch
deleted file mode 100644
index 837fd87af39a2..0000000000000
--- a/patches.baytrail/0611-video-hdmi-Hook-the-HDMI-vendor-infoframe-with-the-g.patch
+++ /dev/null
@@ -1,163 +0,0 @@
-From 487dd947e265f3dcc64edfba87022b7d325f16aa Mon Sep 17 00:00:00 2001
-From: "Lespiau, Damien" <damien.lespiau@intel.com>
-Date: Mon, 19 Aug 2013 16:59:01 +0100
-Subject: video/hdmi: Hook the HDMI vendor infoframe with the generic _pack()
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-With this last bit, hdmi_infoframe_pack() is now able to pack any
-infoframe we support.
-
-At the same time, because it's impractical to make two commits out of
-this, we get rid of the version that encourages the open coding of the
-vendor infoframe packing. We can do so because the only user of this API
-has been ported in:
-
-  Author: Damien Lespiau <damien.lespiau@intel.com>
-  Date:   Mon Aug 12 18:08:37 2013 +0100
-
-      gpu: host1x: Port the HDMI vendor infoframe code the common helpers
-
-v2: Change oui to be an unsigned int (Ville Syrjälä)
-
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Thierry Reding <treding@nvidia.com>
-Signed-off-by: Dave Airlie <airlied@gmail.com>
-(cherry picked from commit af3e95b40720cdf301eb85387c0a3dc4067cc551)
-Signed-off-by: James Ausmus <james.ausmus@intel.com>
-
-Conflicts:
-	drivers/video/hdmi.c
-	(context changes)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/video/hdmi.c | 46 ++++++++++------------------------------------
- include/linux/hdmi.h | 24 ++++++++++++------------
- 2 files changed, 22 insertions(+), 48 deletions(-)
-
-diff --git a/drivers/video/hdmi.c b/drivers/video/hdmi.c
-index 82c663a8961e..4d79791e6ebc 100644
---- a/drivers/video/hdmi.c
-+++ b/drivers/video/hdmi.c
-@@ -300,6 +300,8 @@ int hdmi_hdmi_infoframe_init(struct hdmi_hdmi_infoframe *frame)
- 	frame->type = HDMI_INFOFRAME_TYPE_VENDOR;
- 	frame->version = 1;
- 
-+	frame->oui = HDMI_IDENTIFIER;
-+
- 	/*
- 	 * 0 is a valid value for s3d_struct, so we use a special "not set"
- 	 * value
-@@ -377,46 +379,18 @@ ssize_t hdmi_hdmi_infoframe_pack(struct hdmi_hdmi_infoframe *frame,
- }
- EXPORT_SYMBOL(hdmi_hdmi_infoframe_pack);
- 
--/**
-- * hdmi_vendor_infoframe_pack() - write a HDMI vendor infoframe to binary
-- *                                buffer
-- * @frame: HDMI vendor infoframe
-- * @buffer: destination buffer
-- * @size: size of buffer
-- *
-- * Packs the information contained in the @frame structure into a binary
-- * representation that can be written into the corresponding controller
-- * registers. Also computes the checksum as required by section 5.3.5 of
-- * the HDMI 1.4 specification.
-- *
-- * Returns the number of bytes packed into the binary buffer or a negative
-- * error code on failure.
-+/*
-+ * hdmi_vendor_infoframe_pack() - write a vendor infoframe to binary buffer
-  */
--ssize_t hdmi_vendor_infoframe_pack(struct hdmi_vendor_infoframe *frame,
--				   void *buffer, size_t size)
-+static ssize_t hdmi_vendor_infoframe_pack(union hdmi_vendor_infoframe *frame,
-+					  void *buffer, size_t size)
- {
--	u8 *ptr = buffer;
--	size_t length;
--
--	length = HDMI_INFOFRAME_HEADER_SIZE + frame->length;
--
--	if (size < length)
--		return -ENOSPC;
--
--	memset(buffer, 0, length);
--
--	ptr[0] = frame->type;
--	ptr[1] = frame->version;
--	ptr[2] = frame->length;
--	ptr[3] = 0; /* checksum */
--
--	memcpy(&ptr[HDMI_INFOFRAME_HEADER_SIZE], frame->data, frame->length);
--
--	hdmi_infoframe_checksum(buffer, length);
-+	/* we only know about HDMI vendor infoframes */
-+	if (frame->any.oui != HDMI_IDENTIFIER)
-+		return -EINVAL;
- 
--	return length;
-+	return hdmi_hdmi_infoframe_pack(&frame->hdmi, buffer, size);
- }
--EXPORT_SYMBOL(hdmi_vendor_infoframe_pack);
- 
- /**
-  * hdmi_infoframe_pack() - write a HDMI infoframe to binary buffer
-diff --git a/include/linux/hdmi.h b/include/linux/hdmi.h
-index 37e0cd755284..e24d850a8ee6 100644
---- a/include/linux/hdmi.h
-+++ b/include/linux/hdmi.h
-@@ -225,16 +225,6 @@ int hdmi_audio_infoframe_init(struct hdmi_audio_infoframe *frame);
- ssize_t hdmi_audio_infoframe_pack(struct hdmi_audio_infoframe *frame,
- 				  void *buffer, size_t size);
- 
--struct hdmi_vendor_infoframe {
--	enum hdmi_infoframe_type type;
--	unsigned char version;
--	unsigned char length;
--	u8 data[27];
--};
--
--ssize_t hdmi_vendor_infoframe_pack(struct hdmi_vendor_infoframe *frame,
--				   void *buffer, size_t size);
--
- enum hdmi_3d_structure {
- 	HDMI_3D_STRUCTURE_INVALID = -1,
- 	HDMI_3D_STRUCTURE_FRAME_PACKING = 0,
-@@ -251,6 +241,7 @@ struct hdmi_hdmi_infoframe {
- 	enum hdmi_infoframe_type type;
- 	unsigned char version;
- 	unsigned char length;
-+	unsigned int oui;
- 	u8 vic;
- 	enum hdmi_3d_structure s3d_struct;
- 	unsigned int s3d_ext_data;
-@@ -260,12 +251,21 @@ int hdmi_hdmi_infoframe_init(struct hdmi_hdmi_infoframe *frame);
- ssize_t hdmi_hdmi_infoframe_pack(struct hdmi_hdmi_infoframe *frame,
- 				 void *buffer, size_t size);
- 
-+union hdmi_vendor_infoframe {
-+	struct {
-+		enum hdmi_infoframe_type type;
-+		unsigned char version;
-+		unsigned char length;
-+		unsigned int oui;
-+	} any;
-+	struct hdmi_hdmi_infoframe hdmi;
-+};
-+
- union hdmi_infoframe {
- 	struct hdmi_any_infoframe any;
- 	struct hdmi_avi_infoframe avi;
- 	struct hdmi_spd_infoframe spd;
--	struct hdmi_vendor_infoframe vendor;
--	struct hdmi_hdmi_infoframe hdmi;
-+	union hdmi_vendor_infoframe vendor;
- 	struct hdmi_audio_infoframe audio;
- };
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0612-video-hdmi-Use-hdmi_vendor_infoframe-for-the-HDMI-sp.patch b/patches.baytrail/0612-video-hdmi-Use-hdmi_vendor_infoframe-for-the-HDMI-sp.patch
deleted file mode 100644
index a457d3328e744..0000000000000
--- a/patches.baytrail/0612-video-hdmi-Use-hdmi_vendor_infoframe-for-the-HDMI-sp.patch
+++ /dev/null
@@ -1,185 +0,0 @@
-From bcb29d1b90c9e5781d56e22fbe2e62d825070531 Mon Sep 17 00:00:00 2001
-From: "Lespiau, Damien" <damien.lespiau@intel.com>
-Date: Mon, 19 Aug 2013 16:59:02 +0100
-Subject: video/hdmi: Use hdmi_vendor_infoframe for the HDMI specific infoframe
-
-We just got rid of the version of hdmi_vendor_infoframe that had a byte
-array for anyone to poke at. It's now time to shuffle around the naming
-of hdmi_hdmi_infoframe to make hdmi_vendor_infoframe become the HDMI
-vendor specific structure.
-
-Cc: Thierry Reding <thierry.reding@gmail.com>
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Reviewed-by: Thierry Reding <treding@nvidia.com>
-Signed-off-by: Dave Airlie <airlied@gmail.com>
-(cherry picked from commit ae84b900b009589a7017a1f8f060edd7de501642)
-Signed-off-by: James Ausmus <james.ausmus@intel.com>
-
-Conflicts:
-	drivers/gpu/host1x/drm/hdmi.c
-	(context changes)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/host1x/drm/hdmi.c | 20 ++------------------
- drivers/video/hdmi.c          | 25 +++++++++++++------------
- include/linux/hdmi.h          | 15 ++++++++-------
- 3 files changed, 23 insertions(+), 37 deletions(-)
-
-diff --git a/drivers/gpu/host1x/drm/hdmi.c b/drivers/gpu/host1x/drm/hdmi.c
-index 01097da09f7f..52e3c9641a0f 100644
---- a/drivers/gpu/host1x/drm/hdmi.c
-+++ b/drivers/gpu/host1x/drm/hdmi.c
-@@ -551,24 +551,8 @@ static void tegra_hdmi_setup_stereo_infoframe(struct tegra_hdmi *hdmi)
- 		return;
- 	}
- 
--	memset(&frame, 0, sizeof(frame));
--
--	frame.type = HDMI_INFOFRAME_TYPE_VENDOR;
--	frame.version = 0x01;
--	frame.length = 6;
--
--	frame.data[0] = 0x03; /* regid0 */
--	frame.data[1] = 0x0c; /* regid1 */
--	frame.data[2] = 0x00; /* regid2 */
--	frame.data[3] = 0x02 << 5; /* video format */
--
--	/* TODO: 74 MHz limit? */
--	if (1) {
--		frame.data[4] = 0x00 << 4; /* 3D structure */
--	} else {
--		frame.data[4] = 0x08 << 4; /* 3D structure */
--		frame.data[5] = 0x00 << 4; /* 3D ext. data */
--	}
-+	hdmi_vendor_infoframe_init(&frame);
-+	frame.s3d_struct = HDMI_3D_STRUCTURE_FRAME_PACKING;
- 
- 	err = hdmi_vendor_infoframe_pack(&frame, buffer, sizeof(buffer));
- 	if (err < 0) {
-diff --git a/drivers/video/hdmi.c b/drivers/video/hdmi.c
-index 4d79791e6ebc..e22ea8b16a1d 100644
---- a/drivers/video/hdmi.c
-+++ b/drivers/video/hdmi.c
-@@ -288,12 +288,12 @@ ssize_t hdmi_audio_infoframe_pack(struct hdmi_audio_infoframe *frame,
- EXPORT_SYMBOL(hdmi_audio_infoframe_pack);
- 
- /**
-- * hdmi_hdmi_infoframe_init() - initialize an HDMI vendor infoframe
-+ * hdmi_vendor_infoframe_init() - initialize an HDMI vendor infoframe
-  * @frame: HDMI vendor infoframe
-  *
-  * Returns 0 on success or a negative error code on failure.
-  */
--int hdmi_hdmi_infoframe_init(struct hdmi_hdmi_infoframe *frame)
-+int hdmi_vendor_infoframe_init(struct hdmi_vendor_infoframe *frame)
- {
- 	memset(frame, 0, sizeof(*frame));
- 
-@@ -310,10 +310,10 @@ int hdmi_hdmi_infoframe_init(struct hdmi_hdmi_infoframe *frame)
- 
- 	return 0;
- }
--EXPORT_SYMBOL(hdmi_hdmi_infoframe_init);
-+EXPORT_SYMBOL(hdmi_vendor_infoframe_init);
- 
- /**
-- * hdmi_hdmi_infoframe_pack() - write a HDMI vendor infoframe to binary buffer
-+ * hdmi_vendor_infoframe_pack() - write a HDMI vendor infoframe to binary buffer
-  * @frame: HDMI infoframe
-  * @buffer: destination buffer
-  * @size: size of buffer
-@@ -326,7 +326,7 @@ EXPORT_SYMBOL(hdmi_hdmi_infoframe_init);
-  * Returns the number of bytes packed into the binary buffer or a negative
-  * error code on failure.
-  */
--ssize_t hdmi_hdmi_infoframe_pack(struct hdmi_hdmi_infoframe *frame,
-+ssize_t hdmi_vendor_infoframe_pack(struct hdmi_vendor_infoframe *frame,
- 				 void *buffer, size_t size)
- {
- 	u8 *ptr = buffer;
-@@ -377,19 +377,20 @@ ssize_t hdmi_hdmi_infoframe_pack(struct hdmi_hdmi_infoframe *frame,
- 
- 	return length;
- }
--EXPORT_SYMBOL(hdmi_hdmi_infoframe_pack);
-+EXPORT_SYMBOL(hdmi_vendor_infoframe_pack);
- 
- /*
-- * hdmi_vendor_infoframe_pack() - write a vendor infoframe to binary buffer
-+ * hdmi_vendor_any_infoframe_pack() - write a vendor infoframe to binary buffer
-  */
--static ssize_t hdmi_vendor_infoframe_pack(union hdmi_vendor_infoframe *frame,
--					  void *buffer, size_t size)
-+static ssize_t
-+hdmi_vendor_any_infoframe_pack(union hdmi_vendor_any_infoframe *frame,
-+			   void *buffer, size_t size)
- {
- 	/* we only know about HDMI vendor infoframes */
- 	if (frame->any.oui != HDMI_IDENTIFIER)
- 		return -EINVAL;
- 
--	return hdmi_hdmi_infoframe_pack(&frame->hdmi, buffer, size);
-+	return hdmi_vendor_infoframe_pack(&frame->hdmi, buffer, size);
- }
- 
- /**
-@@ -422,8 +423,8 @@ hdmi_infoframe_pack(union hdmi_infoframe *frame, void *buffer, size_t size)
- 		length = hdmi_audio_infoframe_pack(&frame->audio, buffer, size);
- 		break;
- 	case HDMI_INFOFRAME_TYPE_VENDOR:
--		length = hdmi_vendor_infoframe_pack(&frame->vendor,
--						    buffer, size);
-+		length = hdmi_vendor_any_infoframe_pack(&frame->vendor,
-+							buffer, size);
- 		break;
- 	default:
- 		WARN(1, "Bad infoframe type %d\n", frame->any.type);
-diff --git a/include/linux/hdmi.h b/include/linux/hdmi.h
-index e24d850a8ee6..d4ae12c7931b 100644
---- a/include/linux/hdmi.h
-+++ b/include/linux/hdmi.h
-@@ -237,7 +237,8 @@ enum hdmi_3d_structure {
- 	HDMI_3D_STRUCTURE_SIDE_BY_SIDE_HALF = 8,
- };
- 
--struct hdmi_hdmi_infoframe {
-+
-+struct hdmi_vendor_infoframe {
- 	enum hdmi_infoframe_type type;
- 	unsigned char version;
- 	unsigned char length;
-@@ -247,25 +248,25 @@ struct hdmi_hdmi_infoframe {
- 	unsigned int s3d_ext_data;
- };
- 
--int hdmi_hdmi_infoframe_init(struct hdmi_hdmi_infoframe *frame);
--ssize_t hdmi_hdmi_infoframe_pack(struct hdmi_hdmi_infoframe *frame,
--				 void *buffer, size_t size);
-+int hdmi_vendor_infoframe_init(struct hdmi_vendor_infoframe *frame);
-+ssize_t hdmi_vendor_infoframe_pack(struct hdmi_vendor_infoframe *frame,
-+				   void *buffer, size_t size);
- 
--union hdmi_vendor_infoframe {
-+union hdmi_vendor_any_infoframe {
- 	struct {
- 		enum hdmi_infoframe_type type;
- 		unsigned char version;
- 		unsigned char length;
- 		unsigned int oui;
- 	} any;
--	struct hdmi_hdmi_infoframe hdmi;
-+	struct hdmi_vendor_infoframe hdmi;
- };
- 
- union hdmi_infoframe {
- 	struct hdmi_any_infoframe any;
- 	struct hdmi_avi_infoframe avi;
- 	struct hdmi_spd_infoframe spd;
--	union hdmi_vendor_infoframe vendor;
-+	union hdmi_vendor_any_infoframe vendor;
- 	struct hdmi_audio_infoframe audio;
- };
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0613-drm-edid-Fix-add_cea_modes-style-issues.patch b/patches.baytrail/0613-drm-edid-Fix-add_cea_modes-style-issues.patch
deleted file mode 100644
index 636d214f5850d..0000000000000
--- a/patches.baytrail/0613-drm-edid-Fix-add_cea_modes-style-issues.patch
+++ /dev/null
@@ -1,61 +0,0 @@
-From 95438688202ec84a3f666a24fa8a8f3a0400c489 Mon Sep 17 00:00:00 2001
-From: "Lespiau, Damien" <damien.lespiau@intel.com>
-Date: Mon, 19 Aug 2013 16:58:53 +0100
-Subject: drm/edid: Fix add_cea_modes() style issues
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-A few styles issues have crept in here, fix them before touching this
-code again.
-
-v2: constify arguments that can be (Ville Syrjälä)
-v3: constify, but better (Ville Syrjälä)
-
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Thierry Reding <treding@nvidia.com>
-Signed-off-by: Dave Airlie <airlied@gmail.com>
-(cherry picked from commit 13ac3f5593cf0964cdb239864829e57cc6981dac)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_edid.c |   12 +++++++-----
- 1 file changed, 7 insertions(+), 5 deletions(-)
-
---- a/drivers/gpu/drm/drm_edid.c
-+++ b/drivers/gpu/drm/drm_edid.c
-@@ -2373,10 +2373,11 @@ EXPORT_SYMBOL(drm_match_cea_mode);
- 
- 
- static int
--do_cea_modes (struct drm_connector *connector, u8 *db, u8 len)
-+do_cea_modes(struct drm_connector *connector, const u8 *db, u8 len)
- {
- 	struct drm_device *dev = connector->dev;
--	u8 * mode, cea_mode;
-+	const u8 *mode;
-+	u8 cea_mode;
- 	int modes = 0;
- 
- 	for (mode = db; mode < db + len; mode++) {
-@@ -2433,8 +2434,9 @@ cea_db_offsets(const u8 *cea, int *start
- static int
- add_cea_modes(struct drm_connector *connector, struct edid *edid)
- {
--	u8 * cea = drm_find_cea_extension(edid);
--	u8 * db, dbl;
-+	const u8 *cea = drm_find_cea_extension(edid);
-+	const u8 *db;
-+	u8 dbl;
- 	int modes = 0;
- 
- 	if (cea && cea_revision(cea) >= 3) {
-@@ -2448,7 +2450,7 @@ add_cea_modes(struct drm_connector *conn
- 			dbl = cea_db_payload_len(db);
- 
- 			if (cea_db_tag(db) == VIDEO_BLOCK)
--				modes += do_cea_modes (connector, db+1, dbl);
-+				modes += do_cea_modes(connector, db + 1, dbl);
- 		}
- 	}
- 
diff --git a/patches.baytrail/0614-drm-edid-Parse-the-HDMI-CEA-block-and-look-for-4k-mo.patch b/patches.baytrail/0614-drm-edid-Parse-the-HDMI-CEA-block-and-look-for-4k-mo.patch
deleted file mode 100644
index 8dfa3a79ec2ca..0000000000000
--- a/patches.baytrail/0614-drm-edid-Parse-the-HDMI-CEA-block-and-look-for-4k-mo.patch
+++ /dev/null
@@ -1,194 +0,0 @@
-From af2a7255606a2ff9e909bf24d5c28379b37f313f Mon Sep 17 00:00:00 2001
-From: "Lespiau, Damien" <damien.lespiau@intel.com>
-Date: Mon, 19 Aug 2013 16:58:54 +0100
-Subject: drm/edid: Parse the HDMI CEA block and look for 4k modes
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-HDMI 1.4 adds 4 "4k x 2k" modes in the the CEA vendor specific block.
-
-With this commit, we now parse this block and expose the 4k modes that
-we find there.
-
-v2: Fix the "4096x2160" string (nice catch!), add comments about
-    do_hdmi_vsdb_modes() arguments and make it clearer that offset is
-    relative to the end of the required fields of the HDMI VSDB
-    (Ville Syrjälä)
-
-v3: Fix 'Unknow' typo (Simon Farnsworth)
-
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Tested-by: Cancan Feng <cancan.feng@intel.com>
-Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67030
-Reviewed-by: Simon Farnsworth <simon.farnsworth@onelan.co.uk>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Thierry Reding <treding@nvidia.com>
-Signed-off-by: Dave Airlie <airlied@gmail.com>
-(cherry picked from commit 7ebe1963a063daf30f95752c35244c5d49550aa9)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_edid.c |  124 +++++++++++++++++++++++++++++++++++++++------
- 1 file changed, 109 insertions(+), 15 deletions(-)
-
---- a/drivers/gpu/drm/drm_edid.c
-+++ b/drivers/gpu/drm/drm_edid.c
-@@ -939,6 +939,36 @@ static const struct drm_display_mode edi
- 	 .vrefresh = 100, },
- };
- 
-+/*
-+ * HDMI 1.4 4k modes.
-+ */
-+static const struct drm_display_mode edid_4k_modes[] = {
-+	/* 1 - 3840x2160@30Hz */
-+	{ DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
-+		   3840, 4016, 4104, 4400, 0,
-+		   2160, 2168, 2178, 2250, 0,
-+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
-+	  .vrefresh = 30, },
-+	/* 2 - 3840x2160@25Hz */
-+	{ DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
-+		   3840, 4896, 4984, 5280, 0,
-+		   2160, 2168, 2178, 2250, 0,
-+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
-+	  .vrefresh = 25, },
-+	/* 3 - 3840x2160@24Hz */
-+	{ DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
-+		   3840, 5116, 5204, 5500, 0,
-+		   2160, 2168, 2178, 2250, 0,
-+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
-+	  .vrefresh = 24, },
-+	/* 4 - 4096x2160@24Hz (SMPTE) */
-+	{ DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 297000,
-+		   4096, 5116, 5204, 5500, 0,
-+		   2160, 2168, 2178, 2250, 0,
-+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
-+	  .vrefresh = 24, },
-+};
-+
- /*** DDC fetch and block validation ***/
- 
- static const u8 edid_header[] = {
-@@ -2397,6 +2427,68 @@ do_cea_modes(struct drm_connector *conne
- 	return modes;
- }
- 
-+/*
-+ * do_hdmi_vsdb_modes - Parse the HDMI Vendor Specific data block
-+ * @connector: connector corresponding to the HDMI sink
-+ * @db: start of the CEA vendor specific block
-+ * @len: length of the CEA block payload, ie. one can access up to db[len]
-+ *
-+ * Parses the HDMI VSDB looking for modes to add to @connector.
-+ */
-+static int
-+do_hdmi_vsdb_modes(struct drm_connector *connector, const u8 *db, u8 len)
-+{
-+	struct drm_device *dev = connector->dev;
-+	int modes = 0, offset = 0, i;
-+	u8 vic_len;
-+
-+	if (len < 8)
-+		goto out;
-+
-+	/* no HDMI_Video_Present */
-+	if (!(db[8] & (1 << 5)))
-+		goto out;
-+
-+	/* Latency_Fields_Present */
-+	if (db[8] & (1 << 7))
-+		offset += 2;
-+
-+	/* I_Latency_Fields_Present */
-+	if (db[8] & (1 << 6))
-+		offset += 2;
-+
-+	/* the declared length is not long enough for the 2 first bytes
-+	 * of additional video format capabilities */
-+	offset += 2;
-+	if (len < (8 + offset))
-+		goto out;
-+
-+	vic_len = db[8 + offset] >> 5;
-+
-+	for (i = 0; i < vic_len && len >= (9 + offset + i); i++) {
-+		struct drm_display_mode *newmode;
-+		u8 vic;
-+
-+		vic = db[9 + offset + i];
-+
-+		vic--; /* VICs start at 1 */
-+		if (vic >= ARRAY_SIZE(edid_4k_modes)) {
-+			DRM_ERROR("Unknown HDMI VIC: %d\n", vic);
-+			continue;
-+		}
-+
-+		newmode = drm_mode_duplicate(dev, &edid_4k_modes[vic]);
-+		if (!newmode)
-+			continue;
-+
-+		drm_mode_probed_add(connector, newmode);
-+		modes++;
-+	}
-+
-+out:
-+	return modes;
-+}
-+
- static int
- cea_db_payload_len(const u8 *db)
- {
-@@ -2428,6 +2520,21 @@ cea_db_offsets(const u8 *cea, int *start
- 	return 0;
- }
- 
-+static bool cea_db_is_hdmi_vsdb(const u8 *db)
-+{
-+	int hdmi_id;
-+
-+	if (cea_db_tag(db) != VENDOR_BLOCK)
-+		return false;
-+
-+	if (cea_db_payload_len(db) < 5)
-+		return false;
-+
-+	hdmi_id = db[1] | (db[2] << 8) | (db[3] << 16);
-+
-+	return hdmi_id == HDMI_IDENTIFIER;
-+}
-+
- #define for_each_cea_db(cea, i, start, end) \
- 	for ((i) = (start); (i) < (end) && (i) + cea_db_payload_len(&(cea)[(i)]) < (end); (i) += cea_db_payload_len(&(cea)[(i)]) + 1)
- 
-@@ -2451,6 +2558,8 @@ add_cea_modes(struct drm_connector *conn
- 
- 			if (cea_db_tag(db) == VIDEO_BLOCK)
- 				modes += do_cea_modes(connector, db + 1, dbl);
-+			else if (cea_db_is_hdmi_vsdb(db))
-+				modes += do_hdmi_vsdb_modes(connector, db, dbl);
- 		}
- 	}
- 
-@@ -2503,21 +2612,6 @@ monitor_name(struct detailed_timing *t,
- 		*(u8 **)data = t->data.other_data.data.str.str;
- }
- 
--static bool cea_db_is_hdmi_vsdb(const u8 *db)
--{
--	int hdmi_id;
--
--	if (cea_db_tag(db) != VENDOR_BLOCK)
--		return false;
--
--	if (cea_db_payload_len(db) < 5)
--		return false;
--
--	hdmi_id = db[1] | (db[2] << 8) | (db[3] << 16);
--
--	return hdmi_id == HDMI_IDENTIFIER;
--}
--
- /**
-  * drm_edid_to_eld - build ELD from EDID
-  * @connector: connector corresponding to the HDMI/DP sink
diff --git a/patches.baytrail/0615-video-hdmi-Rename-HDMI_IDENTIFIER-to-HDMI_IEEE_OUI.patch b/patches.baytrail/0615-video-hdmi-Rename-HDMI_IDENTIFIER-to-HDMI_IEEE_OUI.patch
deleted file mode 100644
index 41bcb14f2abb8..0000000000000
--- a/patches.baytrail/0615-video-hdmi-Rename-HDMI_IDENTIFIER-to-HDMI_IEEE_OUI.patch
+++ /dev/null
@@ -1,64 +0,0 @@
-From 49a8ccfeed52f250d9e48f9e9b9c32343835bdcd Mon Sep 17 00:00:00 2001
-From: "Lespiau, Damien" <damien.lespiau@intel.com>
-Date: Mon, 19 Aug 2013 16:59:05 +0100
-Subject: video/hdmi: Rename HDMI_IDENTIFIER to HDMI_IEEE_OUI
-
-HDMI_IDENTIFIER was felt too generic, rename it to what it is, the IEEE
-OUI corresponding to HDMI Licensing, LLC.
-
-http://standards.ieee.org/develop/regauth/oui/oui.txt
-
-Cc: Thierry Reding <thierry.reding@gmail.com>
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Reviewed-by: Thierry Reding <treding@nvidia.com>
-Signed-off-by: Dave Airlie <airlied@gmail.com>
-(cherry picked from commit 6cb3b7f1c013fd4bea41e16ee557bcb2f1561787)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_edid.c |    2 +-
- drivers/video/hdmi.c       |    4 ++--
- include/linux/hdmi.h       |    2 +-
- 3 files changed, 4 insertions(+), 4 deletions(-)
-
---- a/drivers/gpu/drm/drm_edid.c
-+++ b/drivers/gpu/drm/drm_edid.c
-@@ -2532,7 +2532,7 @@ static bool cea_db_is_hdmi_vsdb(const u8
- 
- 	hdmi_id = db[1] | (db[2] << 8) | (db[3] << 16);
- 
--	return hdmi_id == HDMI_IDENTIFIER;
-+	return hdmi_id == HDMI_IEEE_OUI;
- }
- 
- #define for_each_cea_db(cea, i, start, end) \
---- a/drivers/video/hdmi.c
-+++ b/drivers/video/hdmi.c
-@@ -300,7 +300,7 @@ int hdmi_vendor_infoframe_init(struct hd
- 	frame->type = HDMI_INFOFRAME_TYPE_VENDOR;
- 	frame->version = 1;
- 
--	frame->oui = HDMI_IDENTIFIER;
-+	frame->oui = HDMI_IEEE_OUI;
- 
- 	/*
- 	 * 0 is a valid value for s3d_struct, so we use a special "not set"
-@@ -387,7 +387,7 @@ hdmi_vendor_any_infoframe_pack(union hdm
- 			   void *buffer, size_t size)
- {
- 	/* we only know about HDMI vendor infoframes */
--	if (frame->any.oui != HDMI_IDENTIFIER)
-+	if (frame->any.oui != HDMI_IEEE_OUI)
- 		return -EINVAL;
- 
- 	return hdmi_vendor_infoframe_pack(&frame->hdmi, buffer, size);
---- a/include/linux/hdmi.h
-+++ b/include/linux/hdmi.h
-@@ -18,7 +18,7 @@ enum hdmi_infoframe_type {
- 	HDMI_INFOFRAME_TYPE_AUDIO = 0x84,
- };
- 
--#define HDMI_IDENTIFIER 0x000c03
-+#define HDMI_IEEE_OUI 0x000c03
- #define HDMI_INFOFRAME_HEADER_SIZE  4
- #define HDMI_AVI_INFOFRAME_SIZE    13
- #define HDMI_SPD_INFOFRAME_SIZE    25
diff --git a/patches.baytrail/0616-drm-i915-hdmi-Change-the-write_infoframe-vfunc-to-ta.patch b/patches.baytrail/0616-drm-i915-hdmi-Change-the-write_infoframe-vfunc-to-ta.patch
deleted file mode 100644
index f3e1864251d0f..0000000000000
--- a/patches.baytrail/0616-drm-i915-hdmi-Change-the-write_infoframe-vfunc-to-ta.patch
+++ /dev/null
@@ -1,337 +0,0 @@
-From de4eccc5978c9b1d3173011e7bb6754ad7ddc9ca Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Tue, 6 Aug 2013 20:32:18 +0100
-Subject: drm/i915/hdmi: Change the write_infoframe vfunc to take a buffer and
- a type
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-First step in the move to the shared infoframe infrastructure, let's
-move the different infoframe helpers and the write_infoframe() vfunc to
-a type (enum hdmi_infoframe_type) and a buffer + len instead of using
-our struct dip_infoframe.
-
-v2: constify the infoframe pointer and don't mix signs (Ville Syrjälä)
-
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni at intel.com>
-Signed-off-by: Thierry Reding <thierry.reding at avionic-design.de>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 178f736ab96637bc17bcf00c3b58af0137e880e0)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_drv.h  |   4 +-
- drivers/gpu/drm/i915/intel_hdmi.c | 106 ++++++++++++++++++++------------------
- 2 files changed, 59 insertions(+), 51 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index 54e389de9f42..712e29e27c14 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -26,6 +26,7 @@
- #define __INTEL_DRV_H__
- 
- #include <linux/i2c.h>
-+#include <linux/hdmi.h>
- #include <drm/i915_drm.h>
- #include "i915_drv.h"
- #include <drm/drm_crtc.h>
-@@ -464,7 +465,8 @@ struct intel_hdmi {
- 	enum hdmi_force_audio force_audio;
- 	bool rgb_quant_range_selectable;
- 	void (*write_infoframe)(struct drm_encoder *encoder,
--				struct dip_infoframe *frame);
-+				enum hdmi_infoframe_type type,
-+				const uint8_t *frame, ssize_t len);
- 	void (*set_infoframes)(struct drm_encoder *encoder,
- 			       struct drm_display_mode *adjusted_mode);
- };
-diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
-index 0b3750f11a97..594c103136c4 100644
---- a/drivers/gpu/drm/i915/intel_hdmi.c
-+++ b/drivers/gpu/drm/i915/intel_hdmi.c
-@@ -29,6 +29,7 @@
- #include <linux/i2c.h>
- #include <linux/slab.h>
- #include <linux/delay.h>
-+#include <linux/hdmi.h>
- #include <drm/drmP.h>
- #include <drm/drm_crtc.h>
- #include <drm/drm_edid.h>
-@@ -81,74 +82,75 @@ void intel_dip_infoframe_csum(struct dip_infoframe *frame)
- 	frame->checksum = 0x100 - sum;
- }
- 
--static u32 g4x_infoframe_index(struct dip_infoframe *frame)
-+static u32 g4x_infoframe_index(enum hdmi_infoframe_type type)
- {
--	switch (frame->type) {
--	case DIP_TYPE_AVI:
-+	switch (type) {
-+	case HDMI_INFOFRAME_TYPE_AVI:
- 		return VIDEO_DIP_SELECT_AVI;
--	case DIP_TYPE_SPD:
-+	case HDMI_INFOFRAME_TYPE_SPD:
- 		return VIDEO_DIP_SELECT_SPD;
- 	default:
--		DRM_DEBUG_DRIVER("unknown info frame type %d\n", frame->type);
-+		DRM_DEBUG_DRIVER("unknown info frame type %d\n", type);
- 		return 0;
- 	}
- }
- 
--static u32 g4x_infoframe_enable(struct dip_infoframe *frame)
-+static u32 g4x_infoframe_enable(enum hdmi_infoframe_type type)
- {
--	switch (frame->type) {
--	case DIP_TYPE_AVI:
-+	switch (type) {
-+	case HDMI_INFOFRAME_TYPE_AVI:
- 		return VIDEO_DIP_ENABLE_AVI;
--	case DIP_TYPE_SPD:
-+	case HDMI_INFOFRAME_TYPE_SPD:
- 		return VIDEO_DIP_ENABLE_SPD;
- 	default:
--		DRM_DEBUG_DRIVER("unknown info frame type %d\n", frame->type);
-+		DRM_DEBUG_DRIVER("unknown info frame type %d\n", type);
- 		return 0;
- 	}
- }
- 
--static u32 hsw_infoframe_enable(struct dip_infoframe *frame)
-+static u32 hsw_infoframe_enable(enum hdmi_infoframe_type type)
- {
--	switch (frame->type) {
--	case DIP_TYPE_AVI:
-+	switch (type) {
-+	case HDMI_INFOFRAME_TYPE_AVI:
- 		return VIDEO_DIP_ENABLE_AVI_HSW;
--	case DIP_TYPE_SPD:
-+	case HDMI_INFOFRAME_TYPE_SPD:
- 		return VIDEO_DIP_ENABLE_SPD_HSW;
- 	default:
--		DRM_DEBUG_DRIVER("unknown info frame type %d\n", frame->type);
-+		DRM_DEBUG_DRIVER("unknown info frame type %d\n", type);
- 		return 0;
- 	}
- }
- 
--static u32 hsw_infoframe_data_reg(struct dip_infoframe *frame,
-+static u32 hsw_infoframe_data_reg(enum hdmi_infoframe_type type,
- 				  enum transcoder cpu_transcoder)
- {
--	switch (frame->type) {
--	case DIP_TYPE_AVI:
-+	switch (type) {
-+	case HDMI_INFOFRAME_TYPE_AVI:
- 		return HSW_TVIDEO_DIP_AVI_DATA(cpu_transcoder);
--	case DIP_TYPE_SPD:
-+	case HDMI_INFOFRAME_TYPE_SPD:
- 		return HSW_TVIDEO_DIP_SPD_DATA(cpu_transcoder);
- 	default:
--		DRM_DEBUG_DRIVER("unknown info frame type %d\n", frame->type);
-+		DRM_DEBUG_DRIVER("unknown info frame type %d\n", type);
- 		return 0;
- 	}
- }
- 
- static void g4x_write_infoframe(struct drm_encoder *encoder,
--				struct dip_infoframe *frame)
-+				enum hdmi_infoframe_type type,
-+				const uint8_t *frame, ssize_t len)
- {
- 	uint32_t *data = (uint32_t *)frame;
- 	struct drm_device *dev = encoder->dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	u32 val = I915_READ(VIDEO_DIP_CTL);
--	unsigned i, len = DIP_HEADER_SIZE + frame->len;
-+	int i;
- 
- 	WARN(!(val & VIDEO_DIP_ENABLE), "Writing DIP with CTL reg disabled\n");
- 
- 	val &= ~(VIDEO_DIP_SELECT_MASK | 0xf); /* clear DIP data offset */
--	val |= g4x_infoframe_index(frame);
-+	val |= g4x_infoframe_index(type);
- 
--	val &= ~g4x_infoframe_enable(frame);
-+	val &= ~g4x_infoframe_enable(type);
- 
- 	I915_WRITE(VIDEO_DIP_CTL, val);
- 
-@@ -162,7 +164,7 @@ static void g4x_write_infoframe(struct drm_encoder *encoder,
- 		I915_WRITE(VIDEO_DIP_DATA, 0);
- 	mmiowb();
- 
--	val |= g4x_infoframe_enable(frame);
-+	val |= g4x_infoframe_enable(type);
- 	val &= ~VIDEO_DIP_FREQ_MASK;
- 	val |= VIDEO_DIP_FREQ_VSYNC;
- 
-@@ -171,22 +173,22 @@ static void g4x_write_infoframe(struct drm_encoder *encoder,
- }
- 
- static void ibx_write_infoframe(struct drm_encoder *encoder,
--				struct dip_infoframe *frame)
-+				enum hdmi_infoframe_type type,
-+				const uint8_t *frame, ssize_t len)
- {
- 	uint32_t *data = (uint32_t *)frame;
- 	struct drm_device *dev = encoder->dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
--	int reg = TVIDEO_DIP_CTL(intel_crtc->pipe);
--	unsigned i, len = DIP_HEADER_SIZE + frame->len;
-+	int i, reg = TVIDEO_DIP_CTL(intel_crtc->pipe);
- 	u32 val = I915_READ(reg);
- 
- 	WARN(!(val & VIDEO_DIP_ENABLE), "Writing DIP with CTL reg disabled\n");
- 
- 	val &= ~(VIDEO_DIP_SELECT_MASK | 0xf); /* clear DIP data offset */
--	val |= g4x_infoframe_index(frame);
-+	val |= g4x_infoframe_index(type);
- 
--	val &= ~g4x_infoframe_enable(frame);
-+	val &= ~g4x_infoframe_enable(type);
- 
- 	I915_WRITE(reg, val);
- 
-@@ -200,7 +202,7 @@ static void ibx_write_infoframe(struct drm_encoder *encoder,
- 		I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), 0);
- 	mmiowb();
- 
--	val |= g4x_infoframe_enable(frame);
-+	val |= g4x_infoframe_enable(type);
- 	val &= ~VIDEO_DIP_FREQ_MASK;
- 	val |= VIDEO_DIP_FREQ_VSYNC;
- 
-@@ -209,25 +211,25 @@ static void ibx_write_infoframe(struct drm_encoder *encoder,
- }
- 
- static void cpt_write_infoframe(struct drm_encoder *encoder,
--				struct dip_infoframe *frame)
-+				enum hdmi_infoframe_type type,
-+				const uint8_t *frame, ssize_t len)
- {
- 	uint32_t *data = (uint32_t *)frame;
- 	struct drm_device *dev = encoder->dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
--	int reg = TVIDEO_DIP_CTL(intel_crtc->pipe);
--	unsigned i, len = DIP_HEADER_SIZE + frame->len;
-+	int i, reg = TVIDEO_DIP_CTL(intel_crtc->pipe);
- 	u32 val = I915_READ(reg);
- 
- 	WARN(!(val & VIDEO_DIP_ENABLE), "Writing DIP with CTL reg disabled\n");
- 
- 	val &= ~(VIDEO_DIP_SELECT_MASK | 0xf); /* clear DIP data offset */
--	val |= g4x_infoframe_index(frame);
-+	val |= g4x_infoframe_index(type);
- 
- 	/* The DIP control register spec says that we need to update the AVI
- 	 * infoframe without clearing its enable bit */
--	if (frame->type != DIP_TYPE_AVI)
--		val &= ~g4x_infoframe_enable(frame);
-+	if (type != HDMI_INFOFRAME_TYPE_AVI)
-+		val &= ~g4x_infoframe_enable(type);
- 
- 	I915_WRITE(reg, val);
- 
-@@ -241,7 +243,7 @@ static void cpt_write_infoframe(struct drm_encoder *encoder,
- 		I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), 0);
- 	mmiowb();
- 
--	val |= g4x_infoframe_enable(frame);
-+	val |= g4x_infoframe_enable(type);
- 	val &= ~VIDEO_DIP_FREQ_MASK;
- 	val |= VIDEO_DIP_FREQ_VSYNC;
- 
-@@ -250,22 +252,22 @@ static void cpt_write_infoframe(struct drm_encoder *encoder,
- }
- 
- static void vlv_write_infoframe(struct drm_encoder *encoder,
--				     struct dip_infoframe *frame)
-+				enum hdmi_infoframe_type type,
-+				const uint8_t *frame, ssize_t len)
- {
- 	uint32_t *data = (uint32_t *)frame;
- 	struct drm_device *dev = encoder->dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
--	int reg = VLV_TVIDEO_DIP_CTL(intel_crtc->pipe);
--	unsigned i, len = DIP_HEADER_SIZE + frame->len;
-+	int i, reg = VLV_TVIDEO_DIP_CTL(intel_crtc->pipe);
- 	u32 val = I915_READ(reg);
- 
- 	WARN(!(val & VIDEO_DIP_ENABLE), "Writing DIP with CTL reg disabled\n");
- 
- 	val &= ~(VIDEO_DIP_SELECT_MASK | 0xf); /* clear DIP data offset */
--	val |= g4x_infoframe_index(frame);
-+	val |= g4x_infoframe_index(type);
- 
--	val &= ~g4x_infoframe_enable(frame);
-+	val &= ~g4x_infoframe_enable(type);
- 
- 	I915_WRITE(reg, val);
- 
-@@ -279,7 +281,7 @@ static void vlv_write_infoframe(struct drm_encoder *encoder,
- 		I915_WRITE(VLV_TVIDEO_DIP_DATA(intel_crtc->pipe), 0);
- 	mmiowb();
- 
--	val |= g4x_infoframe_enable(frame);
-+	val |= g4x_infoframe_enable(type);
- 	val &= ~VIDEO_DIP_FREQ_MASK;
- 	val |= VIDEO_DIP_FREQ_VSYNC;
- 
-@@ -288,21 +290,24 @@ static void vlv_write_infoframe(struct drm_encoder *encoder,
- }
- 
- static void hsw_write_infoframe(struct drm_encoder *encoder,
--				struct dip_infoframe *frame)
-+				enum hdmi_infoframe_type type,
-+				const uint8_t *frame, ssize_t len)
- {
- 	uint32_t *data = (uint32_t *)frame;
- 	struct drm_device *dev = encoder->dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
- 	u32 ctl_reg = HSW_TVIDEO_DIP_CTL(intel_crtc->config.cpu_transcoder);
--	u32 data_reg = hsw_infoframe_data_reg(frame, intel_crtc->config.cpu_transcoder);
--	unsigned int i, len = DIP_HEADER_SIZE + frame->len;
-+	u32 data_reg;
-+	int i;
- 	u32 val = I915_READ(ctl_reg);
- 
-+	data_reg = hsw_infoframe_data_reg(type,
-+					  intel_crtc->config.cpu_transcoder);
- 	if (data_reg == 0)
- 		return;
- 
--	val &= ~hsw_infoframe_enable(frame);
-+	val &= ~hsw_infoframe_enable(type);
- 	I915_WRITE(ctl_reg, val);
- 
- 	mmiowb();
-@@ -315,7 +320,7 @@ static void hsw_write_infoframe(struct drm_encoder *encoder,
- 		I915_WRITE(data_reg + i, 0);
- 	mmiowb();
- 
--	val |= hsw_infoframe_enable(frame);
-+	val |= hsw_infoframe_enable(type);
- 	I915_WRITE(ctl_reg, val);
- 	POSTING_READ(ctl_reg);
- }
-@@ -326,7 +331,8 @@ static void intel_set_infoframe(struct drm_encoder *encoder,
- 	struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
- 
- 	intel_dip_infoframe_csum(frame);
--	intel_hdmi->write_infoframe(encoder, frame);
-+	intel_hdmi->write_infoframe(encoder, frame->type, (uint8_t *)frame,
-+				    DIP_HEADER_SIZE + frame->len);
- }
- 
- static void intel_hdmi_set_avi_infoframe(struct drm_encoder *encoder,
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0617-drm-i915-hdmi-Port-the-infoframe-code-to-the-common-.patch b/patches.baytrail/0617-drm-i915-hdmi-Port-the-infoframe-code-to-the-common-.patch
deleted file mode 100644
index 1f784f4a329cf..0000000000000
--- a/patches.baytrail/0617-drm-i915-hdmi-Port-the-infoframe-code-to-the-common-.patch
+++ /dev/null
@@ -1,147 +0,0 @@
-From f039cc6278d031d4ee9a7aead0d48469b5bc99fd Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Tue, 6 Aug 2013 20:32:19 +0100
-Subject: drm/i915/hdmi: Port the infoframe code to the common hdmi helpers
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Let's use the drivers/video/hmdi.c and drm infoframe helpers to build
-our infoframes.
-
-v2: Simplify the logic to compute the buffer size. We can just take the
-maximum infoframe size rounded to 32, which happens to be what the
-hardware let us write anyway.
-
-v3: Remove unnecessary memset() (Ville Syrjälä)
-
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 5adaea799c1c2c00a1ffe995255af25717029b65)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_hdmi.c | 82 +++++++++++++++++++++++++++------------
- 1 file changed, 58 insertions(+), 24 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
-index 594c103136c4..118715389651 100644
---- a/drivers/gpu/drm/i915/intel_hdmi.c
-+++ b/drivers/gpu/drm/i915/intel_hdmi.c
-@@ -325,14 +325,43 @@ static void hsw_write_infoframe(struct drm_encoder *encoder,
- 	POSTING_READ(ctl_reg);
- }
- 
-+/*
-+ * The data we write to the DIP data buffer registers is 1 byte bigger than the
-+ * HDMI infoframe size because of an ECC/reserved byte at position 3 (starting
-+ * at 0). It's also a byte used by DisplayPort so the same DIP registers can be
-+ * used for both technologies.
-+ *
-+ * DW0: Reserved/ECC/DP | HB2 | HB1 | HB0
-+ * DW1:       DB3       | DB2 | DB1 | DB0
-+ * DW2:       DB7       | DB6 | DB5 | DB4
-+ * DW3: ...
-+ *
-+ * (HB is Header Byte, DB is Data Byte)
-+ *
-+ * The hdmi pack() functions don't know about that hardware specific hole so we
-+ * trick them by giving an offset into the buffer and moving back the header
-+ * bytes by one.
-+ */
- static void intel_set_infoframe(struct drm_encoder *encoder,
--				struct dip_infoframe *frame)
-+				union hdmi_infoframe *frame)
- {
- 	struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
-+	uint8_t buffer[VIDEO_DIP_DATA_SIZE];
-+	ssize_t len;
- 
--	intel_dip_infoframe_csum(frame);
--	intel_hdmi->write_infoframe(encoder, frame->type, (uint8_t *)frame,
--				    DIP_HEADER_SIZE + frame->len);
-+	/* see comment above for the reason for this offset */
-+	len = hdmi_infoframe_pack(frame, buffer + 1, sizeof(buffer) - 1);
-+	if (len < 0)
-+		return;
-+
-+	/* Insert the 'hole' (see big comment above) at position 3 */
-+	buffer[0] = buffer[1];
-+	buffer[1] = buffer[2];
-+	buffer[2] = buffer[3];
-+	buffer[3] = 0;
-+	len++;
-+
-+	intel_hdmi->write_infoframe(encoder, frame->any.type, buffer, len);
- }
- 
- static void intel_hdmi_set_avi_infoframe(struct drm_encoder *encoder,
-@@ -340,40 +369,45 @@ static void intel_hdmi_set_avi_infoframe(struct drm_encoder *encoder,
- {
- 	struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
- 	struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
--	struct dip_infoframe avi_if = {
--		.type = DIP_TYPE_AVI,
--		.ver = DIP_VERSION_AVI,
--		.len = DIP_LEN_AVI,
--	};
-+	union hdmi_infoframe frame;
-+	int ret;
-+
-+	ret = drm_hdmi_avi_infoframe_from_display_mode(&frame.avi,
-+						       adjusted_mode);
-+	if (ret < 0) {
-+		DRM_ERROR("couldn't fill AVI infoframe\n");
-+		return;
-+	}
- 
- 	if (adjusted_mode->flags & DRM_MODE_FLAG_DBLCLK)
--		avi_if.body.avi.YQ_CN_PR |= DIP_AVI_PR_2;
-+		frame.avi.pixel_repeat = 1;
- 
- 	if (intel_hdmi->rgb_quant_range_selectable) {
- 		if (intel_crtc->config.limited_color_range)
--			avi_if.body.avi.ITC_EC_Q_SC |= DIP_AVI_RGB_QUANT_RANGE_LIMITED;
-+			frame.avi.quantization_range =
-+				HDMI_QUANTIZATION_RANGE_LIMITED;
- 		else
--			avi_if.body.avi.ITC_EC_Q_SC |= DIP_AVI_RGB_QUANT_RANGE_FULL;
-+			frame.avi.quantization_range =
-+				HDMI_QUANTIZATION_RANGE_FULL;
- 	}
- 
--	avi_if.body.avi.VIC = drm_match_cea_mode(adjusted_mode);
--
--	intel_set_infoframe(encoder, &avi_if);
-+	intel_set_infoframe(encoder, &frame);
- }
- 
- static void intel_hdmi_set_spd_infoframe(struct drm_encoder *encoder)
- {
--	struct dip_infoframe spd_if;
-+	union hdmi_infoframe frame;
-+	int ret;
-+
-+	ret = hdmi_spd_infoframe_init(&frame.spd, "Intel", "Integrated gfx");
-+	if (ret < 0) {
-+		DRM_ERROR("couldn't fill SPD infoframe\n");
-+		return;
-+	}
- 
--	memset(&spd_if, 0, sizeof(spd_if));
--	spd_if.type = DIP_TYPE_SPD;
--	spd_if.ver = DIP_VERSION_SPD;
--	spd_if.len = DIP_LEN_SPD;
--	strcpy(spd_if.body.spd.vn, "Intel");
--	strcpy(spd_if.body.spd.pd, "Integrated gfx");
--	spd_if.body.spd.sdi = DIP_SPD_PC;
-+	frame.spd.sdi = HDMI_SPD_SDI_PC;
- 
--	intel_set_infoframe(encoder, &spd_if);
-+	intel_set_infoframe(encoder, &frame);
- }
- 
- static void g4x_set_infoframes(struct drm_encoder *encoder,
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0618-drm-i915-sdvo-Port-the-infoframe-code-to-the-shared-.patch b/patches.baytrail/0618-drm-i915-sdvo-Port-the-infoframe-code-to-the-shared-.patch
deleted file mode 100644
index b6b918e2ac9ff..0000000000000
--- a/patches.baytrail/0618-drm-i915-sdvo-Port-the-infoframe-code-to-the-shared-.patch
+++ /dev/null
@@ -1,77 +0,0 @@
-From 946cb86257b3e587b6f60de2684a7425c92122c9 Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Tue, 6 Aug 2013 20:32:20 +0100
-Subject: drm/i915/sdvo: Port the infoframe code to the shared infrastructure
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni at intel.com>
-Signed-off-by: Thierry Reding <thierry.reding at avionic-design.de>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 15dcd3502160a46acf11e5cb5e80e9d90a6f9f60)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_sdvo.c | 38 ++++++++++++++++++++------------------
- 1 file changed, 20 insertions(+), 18 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
-index 47423f31f82b..02f220b4e4a1 100644
---- a/drivers/gpu/drm/i915/intel_sdvo.c
-+++ b/drivers/gpu/drm/i915/intel_sdvo.c
-@@ -963,30 +963,32 @@ static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo,
- static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo,
- 					 const struct drm_display_mode *adjusted_mode)
- {
--	struct dip_infoframe avi_if = {
--		.type = DIP_TYPE_AVI,
--		.ver = DIP_VERSION_AVI,
--		.len = DIP_LEN_AVI,
--	};
--	uint8_t sdvo_data[4 + sizeof(avi_if.body.avi)];
--	struct intel_crtc *intel_crtc = to_intel_crtc(intel_sdvo->base.base.crtc);
-+	uint8_t sdvo_data[HDMI_INFOFRAME_SIZE(AVI)];
-+	struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
-+	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
-+	union hdmi_infoframe frame;
-+	int ret;
-+	ssize_t len;
-+
-+	ret = drm_hdmi_avi_infoframe_from_display_mode(&frame.avi,
-+						       adjusted_mode);
-+	if (ret < 0) {
-+		DRM_ERROR("couldn't fill AVI infoframe\n");
-+		return false;
-+	}
- 
- 	if (intel_sdvo->rgb_quant_range_selectable) {
- 		if (intel_crtc->config.limited_color_range)
--			avi_if.body.avi.ITC_EC_Q_SC |= DIP_AVI_RGB_QUANT_RANGE_LIMITED;
-+			frame.avi.quantization_range =
-+				HDMI_QUANTIZATION_RANGE_LIMITED;
- 		else
--			avi_if.body.avi.ITC_EC_Q_SC |= DIP_AVI_RGB_QUANT_RANGE_FULL;
-+			frame.avi.quantization_range =
-+				HDMI_QUANTIZATION_RANGE_FULL;
- 	}
- 
--	avi_if.body.avi.VIC = drm_match_cea_mode(adjusted_mode);
--
--	intel_dip_infoframe_csum(&avi_if);
--
--	/* sdvo spec says that the ecc is handled by the hw, and it looks like
--	 * we must not send the ecc field, either. */
--	memcpy(sdvo_data, &avi_if, 3);
--	sdvo_data[3] = avi_if.checksum;
--	memcpy(&sdvo_data[4], &avi_if.body, sizeof(avi_if.body.avi));
-+	len = hdmi_infoframe_pack(&frame, sdvo_data, sizeof(sdvo_data));
-+	if (len < 0)
-+		return false;
- 
- 	return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
- 					  SDVO_HBUF_TX_VSYNC,
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0619-drm-i915-Remove-the-now-obsolete-infoframe-definitio.patch b/patches.baytrail/0619-drm-i915-Remove-the-now-obsolete-infoframe-definitio.patch
deleted file mode 100644
index 98fecd43150a0..0000000000000
--- a/patches.baytrail/0619-drm-i915-Remove-the-now-obsolete-infoframe-definitio.patch
+++ /dev/null
@@ -1,129 +0,0 @@
-From aefa93abf9e54139f90f784acc3264e4a94ad836 Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Tue, 6 Aug 2013 20:32:21 +0100
-Subject: drm/i915: Remove the now obsolete infoframe definitions
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-All the HDMI infoframe code has been ported to use video/hdmi.c, so it's
-time to say bye bye to this code.
-
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit c5022bb9ff2a606839ede18ccf268444d3f99729)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_drv.h  | 61 ---------------------------------------
- drivers/gpu/drm/i915/intel_hdmi.c | 15 ----------
- 2 files changed, 76 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index 712e29e27c14..7df662bab280 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -395,66 +395,6 @@ struct cxsr_latency {
- #define to_intel_framebuffer(x) container_of(x, struct intel_framebuffer, base)
- #define to_intel_plane(x) container_of(x, struct intel_plane, base)
- 
--#define DIP_HEADER_SIZE	5
--
--#define DIP_TYPE_AVI    0x82
--#define DIP_VERSION_AVI 0x2
--#define DIP_LEN_AVI     13
--#define DIP_AVI_PR_1    0
--#define DIP_AVI_PR_2    1
--#define DIP_AVI_RGB_QUANT_RANGE_DEFAULT	(0 << 2)
--#define DIP_AVI_RGB_QUANT_RANGE_LIMITED	(1 << 2)
--#define DIP_AVI_RGB_QUANT_RANGE_FULL	(2 << 2)
--
--#define DIP_TYPE_SPD	0x83
--#define DIP_VERSION_SPD	0x1
--#define DIP_LEN_SPD	25
--#define DIP_SPD_UNKNOWN	0
--#define DIP_SPD_DSTB	0x1
--#define DIP_SPD_DVDP	0x2
--#define DIP_SPD_DVHS	0x3
--#define DIP_SPD_HDDVR	0x4
--#define DIP_SPD_DVC	0x5
--#define DIP_SPD_DSC	0x6
--#define DIP_SPD_VCD	0x7
--#define DIP_SPD_GAME	0x8
--#define DIP_SPD_PC	0x9
--#define DIP_SPD_BD	0xa
--#define DIP_SPD_SCD	0xb
--
--struct dip_infoframe {
--	uint8_t type;		/* HB0 */
--	uint8_t ver;		/* HB1 */
--	uint8_t len;		/* HB2 - body len, not including checksum */
--	uint8_t ecc;		/* Header ECC */
--	uint8_t checksum;	/* PB0 */
--	union {
--		struct {
--			/* PB1 - Y 6:5, A 4:4, B 3:2, S 1:0 */
--			uint8_t Y_A_B_S;
--			/* PB2 - C 7:6, M 5:4, R 3:0 */
--			uint8_t C_M_R;
--			/* PB3 - ITC 7:7, EC 6:4, Q 3:2, SC 1:0 */
--			uint8_t ITC_EC_Q_SC;
--			/* PB4 - VIC 6:0 */
--			uint8_t VIC;
--			/* PB5 - YQ 7:6, CN 5:4, PR 3:0 */
--			uint8_t YQ_CN_PR;
--			/* PB6 to PB13 */
--			uint16_t top_bar_end;
--			uint16_t bottom_bar_start;
--			uint16_t left_bar_end;
--			uint16_t right_bar_start;
--		} __attribute__ ((packed)) avi;
--		struct {
--			uint8_t vn[8];
--			uint8_t pd[16];
--			uint8_t sdi;
--		} __attribute__ ((packed)) spd;
--		uint8_t payload[27];
--	} __attribute__ ((packed)) body;
--} __attribute__((packed));
--
- struct intel_hdmi {
- 	u32 hdmi_reg;
- 	int ddc_bus;
-@@ -568,7 +508,6 @@ extern void intel_hdmi_init_connector(struct intel_digital_port *intel_dig_port,
- extern struct intel_hdmi *enc_to_intel_hdmi(struct drm_encoder *encoder);
- extern bool intel_hdmi_compute_config(struct intel_encoder *encoder,
- 				      struct intel_crtc_config *pipe_config);
--extern void intel_dip_infoframe_csum(struct dip_infoframe *avi_if);
- extern bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg,
- 			    bool is_sdvob);
- extern void intel_dvo_init(struct drm_device *dev);
-diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
-index 118715389651..ba742b8e16dc 100644
---- a/drivers/gpu/drm/i915/intel_hdmi.c
-+++ b/drivers/gpu/drm/i915/intel_hdmi.c
-@@ -67,21 +67,6 @@ static struct intel_hdmi *intel_attached_hdmi(struct drm_connector *connector)
- 	return enc_to_intel_hdmi(&intel_attached_encoder(connector)->base);
- }
- 
--void intel_dip_infoframe_csum(struct dip_infoframe *frame)
--{
--	uint8_t *data = (uint8_t *)frame;
--	uint8_t sum = 0;
--	unsigned i;
--
--	frame->checksum = 0;
--	frame->ecc = 0;
--
--	for (i = 0; i < frame->len + DIP_HEADER_SIZE; i++)
--		sum += data[i];
--
--	frame->checksum = 0x100 - sum;
--}
--
- static u32 g4x_infoframe_index(enum hdmi_infoframe_type type)
- {
- 	switch (type) {
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0620-drm-Handle-the-DBLCLK-flag-in-the-common-infoframe-h.patch b/patches.baytrail/0620-drm-Handle-the-DBLCLK-flag-in-the-common-infoframe-h.patch
deleted file mode 100644
index e01c518ffe790..0000000000000
--- a/patches.baytrail/0620-drm-Handle-the-DBLCLK-flag-in-the-common-infoframe-h.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From 6c5054eea7ccaa2e1f33ae0ac26061e4f8766d32 Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Tue, 6 Aug 2013 20:32:22 +0100
-Subject: drm: Handle the DBLCLK flag in the common infoframe helper
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Acked-by: Dave Airlie <airlied@gmail.com>
-Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit bf02db99384929a12eff0cf1205b4547e41e881b)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_edid.c        |    3 +++
- drivers/gpu/drm/i915/intel_hdmi.c |    3 ---
- 2 files changed, 3 insertions(+), 3 deletions(-)
-
---- a/drivers/gpu/drm/drm_edid.c
-+++ b/drivers/gpu/drm/drm_edid.c
-@@ -3131,6 +3131,9 @@ drm_hdmi_avi_infoframe_from_display_mode
- 	if (err < 0)
- 		return err;
- 
-+	if (mode->flags & DRM_MODE_FLAG_DBLCLK)
-+		frame->pixel_repeat = 1;
-+
- 	frame->video_code = drm_match_cea_mode(mode);
- 	if (!frame->video_code)
- 		return 0;
---- a/drivers/gpu/drm/i915/intel_hdmi.c
-+++ b/drivers/gpu/drm/i915/intel_hdmi.c
-@@ -364,9 +364,6 @@ static void intel_hdmi_set_avi_infoframe
- 		return;
- 	}
- 
--	if (adjusted_mode->flags & DRM_MODE_FLAG_DBLCLK)
--		frame.avi.pixel_repeat = 1;
--
- 	if (intel_hdmi->rgb_quant_range_selectable) {
- 		if (intel_crtc->config.limited_color_range)
- 			frame.avi.quantization_range =
diff --git a/patches.baytrail/0621-drm-i915-hmdi-Rename-set_infoframe-to-write_infofram.patch b/patches.baytrail/0621-drm-i915-hmdi-Rename-set_infoframe-to-write_infofram.patch
deleted file mode 100644
index 93f424aabb999..0000000000000
--- a/patches.baytrail/0621-drm-i915-hmdi-Rename-set_infoframe-to-write_infofram.patch
+++ /dev/null
@@ -1,59 +0,0 @@
-From 4440d555afb8b86124f45d58dca776671953be16 Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Tue, 6 Aug 2013 20:32:24 +0100
-Subject: drm/i915/hmdi: Rename set_infoframe() to write_infoframe()
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-set_frame() wraps the write_frame() vfunc. Be consistent and name the
-wrapping function like the vfunc being called.
-
-It's doubly confusing as we also have a set_infoframes() vfunc and
-set_infoframe() doesn't wrap it.
-
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 9198ee5b9048418849ad96fe37eaff8cd56aaf43)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_hdmi.c | 8 ++++----
- 1 file changed, 4 insertions(+), 4 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
-index 0a4a81447a03..dd4fa35e0a85 100644
---- a/drivers/gpu/drm/i915/intel_hdmi.c
-+++ b/drivers/gpu/drm/i915/intel_hdmi.c
-@@ -327,8 +327,8 @@ static void hsw_write_infoframe(struct drm_encoder *encoder,
-  * trick them by giving an offset into the buffer and moving back the header
-  * bytes by one.
-  */
--static void intel_set_infoframe(struct drm_encoder *encoder,
--				union hdmi_infoframe *frame)
-+static void intel_write_infoframe(struct drm_encoder *encoder,
-+				  union hdmi_infoframe *frame)
- {
- 	struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
- 	uint8_t buffer[VIDEO_DIP_DATA_SIZE];
-@@ -373,7 +373,7 @@ static void intel_hdmi_set_avi_infoframe(struct drm_encoder *encoder,
- 				HDMI_QUANTIZATION_RANGE_FULL;
- 	}
- 
--	intel_set_infoframe(encoder, &frame);
-+	intel_write_infoframe(encoder, &frame);
- }
- 
- static void intel_hdmi_set_spd_infoframe(struct drm_encoder *encoder)
-@@ -389,7 +389,7 @@ static void intel_hdmi_set_spd_infoframe(struct drm_encoder *encoder)
- 
- 	frame.spd.sdi = HDMI_SPD_SDI_PC;
- 
--	intel_set_infoframe(encoder, &frame);
-+	intel_write_infoframe(encoder, &frame);
- }
- 
- static void g4x_set_infoframes(struct drm_encoder *encoder,
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0622-drm-i915-Use-enabled-instead-of-enable-consistently-.patch b/patches.baytrail/0622-drm-i915-Use-enabled-instead-of-enable-consistently-.patch
deleted file mode 100644
index 627c8beab16b9..0000000000000
--- a/patches.baytrail/0622-drm-i915-Use-enabled-instead-of-enable-consistently-.patch
+++ /dev/null
@@ -1,63 +0,0 @@
-From 519adbb6b119ef0b4a2c3de448c5c703ba2326e6 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Tue, 6 Aug 2013 22:24:00 +0300
-Subject: drm/i915: Use 'enabled' instead of 'enable' consistently in sprite WM
- code
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Let's be consistent and always call our variables 'enabled' insted of
-the occasional 'enable'.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-[danvet: Spelling fix in the commit message, spotted by Chris.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 39db4a4d7f9b2809141e5bc0e06f7a5b7daeb356)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 8 ++++----
- 1 file changed, 4 insertions(+), 4 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 9b8c90ea81ff..fe0c2af4031b 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2838,7 +2838,7 @@ sandybridge_compute_sprite_srwm(struct drm_device *dev, int plane,
- 
- static void sandybridge_update_sprite_wm(struct drm_device *dev, int pipe,
- 					 uint32_t sprite_width, int pixel_size,
--					 bool enable, bool scaled)
-+					 bool enabled, bool scaled)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	int latency = dev_priv->wm.spr_latency[0] * 100;	/* In unit 0.1us */
-@@ -2846,7 +2846,7 @@ static void sandybridge_update_sprite_wm(struct drm_device *dev, int pipe,
- 	int sprite_wm, reg;
- 	int ret;
- 
--	if (!enable)
-+	if (!enabled)
- 		return;
- 
- 	switch (pipe) {
-@@ -2961,13 +2961,13 @@ void intel_update_watermarks(struct drm_device *dev)
- 
- void intel_update_sprite_watermarks(struct drm_device *dev, int pipe,
- 				    uint32_t sprite_width, int pixel_size,
--				    bool enable, bool scaled)
-+				    bool enabled, bool scaled)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 
- 	if (dev_priv->display.update_sprite_wm)
- 		dev_priv->display.update_sprite_wm(dev, pipe, sprite_width,
--						   pixel_size, enable, scaled);
-+						   pixel_size, enabled, scaled);
- }
- 
- static struct drm_i915_gem_object *
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0623-drm-i915-Split-watermark-level-computation-from-the-.patch b/patches.baytrail/0623-drm-i915-Split-watermark-level-computation-from-the-.patch
deleted file mode 100644
index 2d120507734b3..0000000000000
--- a/patches.baytrail/0623-drm-i915-Split-watermark-level-computation-from-the-.patch
+++ /dev/null
@@ -1,105 +0,0 @@
-From faa184f6d173ef8f7f96efc11b478b64e49d2775 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Tue, 6 Aug 2013 22:24:02 +0300
-Subject: drm/i915: Split watermark level computation from the code
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Refactor the watermarks computation for one level to a separate
-function. This function will now set the ->enable flag to true,
-even if the watermark level wasn't actually checked yet. In the
-future we will delay the checking so we must consider all unchecked
-watermarks as possibly valid.
-
-v2: Preserve comment about latency units
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 6f5ddd170453ff44aed1b6efe53ff872295ef538)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 51 +++++++++++++++++++++++++++--------------
- 1 file changed, 34 insertions(+), 17 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index fe0c2af4031b..0d9f56fced55 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2284,31 +2284,45 @@ static uint32_t ilk_compute_fbc_wm(struct hsw_pipe_wm_parameters *params,
- 			  params->pri_bytes_per_pixel);
- }
- 
-+static void ilk_compute_wm_level(struct drm_i915_private *dev_priv,
-+				 int level,
-+				 struct hsw_pipe_wm_parameters *p,
-+				 struct hsw_lp_wm_result *result)
-+{
-+	uint16_t pri_latency = dev_priv->wm.pri_latency[level];
-+	uint16_t spr_latency = dev_priv->wm.spr_latency[level];
-+	uint16_t cur_latency = dev_priv->wm.cur_latency[level];
-+
-+	/* WM1+ latency values stored in 0.5us units */
-+	if (level > 0) {
-+		pri_latency *= 5;
-+		spr_latency *= 5;
-+		cur_latency *= 5;
-+	}
-+
-+	result->pri_val = ilk_compute_pri_wm(p, pri_latency, level);
-+	result->spr_val = ilk_compute_spr_wm(p, spr_latency);
-+	result->cur_val = ilk_compute_cur_wm(p, cur_latency);
-+	result->fbc_val = ilk_compute_fbc_wm(p, result->pri_val);
-+	result->enable = true;
-+}
-+
- static bool hsw_compute_lp_wm(struct drm_i915_private *dev_priv,
- 			      int level, struct hsw_wm_maximums *max,
- 			      struct hsw_pipe_wm_parameters *params,
- 			      struct hsw_lp_wm_result *result)
- {
- 	enum pipe pipe;
--	uint32_t pri_val[3], spr_val[3], cur_val[3], fbc_val[3];
--
--	for (pipe = PIPE_A; pipe <= PIPE_C; pipe++) {
--		struct hsw_pipe_wm_parameters *p = &params[pipe];
--		/* WM1+ latency values stored in 0.5us units */
--		uint16_t pri_latency = dev_priv->wm.pri_latency[level] * 5;
--		uint16_t spr_latency = dev_priv->wm.spr_latency[level] * 5;
--		uint16_t cur_latency = dev_priv->wm.cur_latency[level] * 5;
-+	struct hsw_lp_wm_result res[3];
- 
--		pri_val[pipe] = ilk_compute_pri_wm(p, pri_latency, true);
--		spr_val[pipe] = ilk_compute_spr_wm(p, spr_latency);
--		cur_val[pipe] = ilk_compute_cur_wm(p, cur_latency);
--		fbc_val[pipe] = ilk_compute_fbc_wm(p, pri_val[pipe]);
--	}
-+	for (pipe = PIPE_A; pipe <= PIPE_C; pipe++)
-+		ilk_compute_wm_level(dev_priv, level, &params[pipe], &res[pipe]);
- 
--	result->pri_val = max3(pri_val[0], pri_val[1], pri_val[2]);
--	result->spr_val = max3(spr_val[0], spr_val[1], spr_val[2]);
--	result->cur_val = max3(cur_val[0], cur_val[1], cur_val[2]);
--	result->fbc_val = max3(fbc_val[0], fbc_val[1], fbc_val[2]);
-+	result->pri_val = max3(res[0].pri_val, res[1].pri_val, res[2].pri_val);
-+	result->spr_val = max3(res[0].spr_val, res[1].spr_val, res[2].spr_val);
-+	result->cur_val = max3(res[0].cur_val, res[1].cur_val, res[2].cur_val);
-+	result->fbc_val = max3(res[0].fbc_val, res[1].fbc_val, res[2].fbc_val);
-+	result->enable = true;
- 
- 	if (result->fbc_val > max->fbc) {
- 		result->fbc_enable = false;
-@@ -2317,6 +2331,9 @@ static bool hsw_compute_lp_wm(struct drm_i915_private *dev_priv,
- 		result->fbc_enable = true;
- 	}
- 
-+	if (!result->enable)
-+		return false;
-+
- 	result->enable = result->pri_val <= max->pri &&
- 			 result->spr_val <= max->spr &&
- 			 result->cur_val <= max->cur;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0624-drm-i915-Kill-fbc_enable-from-hsw_lp_wm_results.patch b/patches.baytrail/0624-drm-i915-Kill-fbc_enable-from-hsw_lp_wm_results.patch
deleted file mode 100644
index 224ae1e945d1f..0000000000000
--- a/patches.baytrail/0624-drm-i915-Kill-fbc_enable-from-hsw_lp_wm_results.patch
+++ /dev/null
@@ -1,63 +0,0 @@
-From 1d07fa059a6628eefd9ad57261cd1d67237385ab Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Tue, 6 Aug 2013 22:24:03 +0300
-Subject: drm/i915: Kill fbc_enable from hsw_lp_wm_results
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-We don't need to store the FBC WM enabled status in each watermark
-level. We anyway have to reduce it down to a single boolean, so just
-delay checking the FBC WM limit until we're computing the final
-value.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 71fff20ff1bb790f4defe0c880e028581ffab420)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 12 ++----------
- 1 file changed, 2 insertions(+), 10 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 0d9f56fced55..58426cff7d09 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2182,7 +2182,6 @@ struct hsw_wm_maximums {
- 
- struct hsw_lp_wm_result {
- 	bool enable;
--	bool fbc_enable;
- 	uint32_t pri_val;
- 	uint32_t spr_val;
- 	uint32_t cur_val;
-@@ -2324,13 +2323,6 @@ static bool hsw_compute_lp_wm(struct drm_i915_private *dev_priv,
- 	result->fbc_val = max3(res[0].fbc_val, res[1].fbc_val, res[2].fbc_val);
- 	result->enable = true;
- 
--	if (result->fbc_val > max->fbc) {
--		result->fbc_enable = false;
--		result->fbc_val = 0;
--	} else {
--		result->fbc_enable = true;
--	}
--
- 	if (!result->enable)
- 		return false;
- 
-@@ -2575,9 +2567,9 @@ static void hsw_compute_wm_results(struct drm_device *dev,
- 	 * a WM level. */
- 	results->enable_fbc_wm = true;
- 	for (level = 1; level <= max_level; level++) {
--		if (!lp_results[level - 1].fbc_enable) {
-+		if (!lp_results[level - 1].fbc_val > lp_maximums->fbc) {
- 			results->enable_fbc_wm = false;
--			break;
-+			lp_results[level - 1].fbc_val = 0;
- 		}
- 	}
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0625-drm-i915-Rename-hsw_data_buf_partitioning-to-intel_d.patch b/patches.baytrail/0625-drm-i915-Rename-hsw_data_buf_partitioning-to-intel_d.patch
deleted file mode 100644
index 50e6cbdf325cc..0000000000000
--- a/patches.baytrail/0625-drm-i915-Rename-hsw_data_buf_partitioning-to-intel_d.patch
+++ /dev/null
@@ -1,107 +0,0 @@
-From 9a91345c3be8376e216cc551473d7b61d84c1fd8 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Tue, 6 Aug 2013 22:24:04 +0300
-Subject: drm/i915: Rename hsw_data_buf_partitioning to intel_ddb_partitioning
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-We're going to use the 1/2 vs. 5/6 split option already on IVB so the
-HSW name is not proper. Just give it an intel_ prefix and move it to
-i915_drv.h so that we can use it there later.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 77c122bcc448439af7f5fcb2542406b45b606c51)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h |  5 +++++
- drivers/gpu/drm/i915/intel_pm.c | 17 ++++++-----------
- 2 files changed, 11 insertions(+), 11 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 49a2e336a7b5..1a3dc5317eec 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1055,6 +1055,11 @@ struct intel_vbt_data {
- 	struct child_device_config *child_dev;
- };
- 
-+enum intel_ddb_partitioning {
-+	INTEL_DDB_PART_1_2,
-+	INTEL_DDB_PART_5_6, /* IVB+ */
-+};
-+
- typedef struct drm_i915_private {
- 	struct drm_device *dev;
- 	struct kmem_cache *slab;
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 58426cff7d09..a5a995948fa9 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2196,11 +2196,6 @@ struct hsw_wm_values {
- 	bool enable_fbc_wm;
- };
- 
--enum hsw_data_buf_partitioning {
--	HSW_DATA_BUF_PART_1_2,
--	HSW_DATA_BUF_PART_5_6,
--};
--
- /*
-  * For both WM_PIPE and WM_LP.
-  * mem_value must be in 0.1us units.
-@@ -2631,11 +2626,11 @@ static struct hsw_wm_values *hsw_find_best_result(struct hsw_wm_values *r1,
-  */
- static void hsw_write_wm_values(struct drm_i915_private *dev_priv,
- 				struct hsw_wm_values *results,
--				enum hsw_data_buf_partitioning partitioning)
-+				enum intel_ddb_partitioning partitioning)
- {
- 	struct hsw_wm_values previous;
- 	uint32_t val;
--	enum hsw_data_buf_partitioning prev_partitioning;
-+	enum intel_ddb_partitioning prev_partitioning;
- 	bool prev_enable_fbc_wm;
- 
- 	previous.wm_pipe[0] = I915_READ(WM0_PIPEA_ILK);
-@@ -2652,7 +2647,7 @@ static void hsw_write_wm_values(struct drm_i915_private *dev_priv,
- 	previous.wm_linetime[2] = I915_READ(PIPE_WM_LINETIME(PIPE_C));
- 
- 	prev_partitioning = (I915_READ(WM_MISC) & WM_MISC_DATA_PARTITION_5_6) ?
--			    HSW_DATA_BUF_PART_5_6 : HSW_DATA_BUF_PART_1_2;
-+				INTEL_DDB_PART_5_6 : INTEL_DDB_PART_1_2;
- 
- 	prev_enable_fbc_wm = !(I915_READ(DISP_ARB_CTL) & DISP_FBC_WM_DIS);
- 
-@@ -2691,7 +2686,7 @@ static void hsw_write_wm_values(struct drm_i915_private *dev_priv,
- 
- 	if (prev_partitioning != partitioning) {
- 		val = I915_READ(WM_MISC);
--		if (partitioning == HSW_DATA_BUF_PART_1_2)
-+		if (partitioning == INTEL_DDB_PART_1_2)
- 			val &= ~WM_MISC_DATA_PARTITION_5_6;
- 		else
- 			val |= WM_MISC_DATA_PARTITION_5_6;
-@@ -2728,7 +2723,7 @@ static void haswell_update_wm(struct drm_device *dev)
- 	struct hsw_wm_maximums lp_max_1_2, lp_max_5_6;
- 	struct hsw_pipe_wm_parameters params[3];
- 	struct hsw_wm_values results_1_2, results_5_6, *best_results;
--	enum hsw_data_buf_partitioning partitioning;
-+	enum intel_ddb_partitioning partitioning;
- 
- 	hsw_compute_wm_parameters(dev, params, &lp_max_1_2, &lp_max_5_6);
- 
-@@ -2743,7 +2738,7 @@ static void haswell_update_wm(struct drm_device *dev)
- 	}
- 
- 	partitioning = (best_results == &results_1_2) ?
--		       HSW_DATA_BUF_PART_1_2 : HSW_DATA_BUF_PART_5_6;
-+		       INTEL_DDB_PART_1_2 : INTEL_DDB_PART_5_6;
- 
- 	hsw_write_wm_values(dev_priv, best_results, partitioning);
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0626-drm-i915-Silence-a-sparse-warning.patch b/patches.baytrail/0626-drm-i915-Silence-a-sparse-warning.patch
deleted file mode 100644
index bcd63b3dc9d7e..0000000000000
--- a/patches.baytrail/0626-drm-i915-Silence-a-sparse-warning.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From 30a09d0bbb2c2121b6b2e87baef2a9cf1196793c Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Wed, 7 Aug 2013 15:11:52 +0300
-Subject: drm/i915: Silence a sparse warning
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-drivers/gpu/drm/i915/i915_debugfs.c:2136:3: warning: symbol
-'i915_debugfs_files' was not declared. Should it be static?
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 2b4bd0e0658b98341a899d9550169ffa26c32e39)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_debugfs.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
-index d2935b4fd695..5d52a23d5662 100644
---- a/drivers/gpu/drm/i915/i915_debugfs.c
-+++ b/drivers/gpu/drm/i915/i915_debugfs.c
-@@ -2130,7 +2130,7 @@ static struct drm_info_list i915_debugfs_list[] = {
- };
- #define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
- 
--struct i915_debugfs_files {
-+static struct i915_debugfs_files {
- 	const char *name;
- 	const struct file_operations *fops;
- } i915_debugfs_files[] = {
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0627-drm-i915-Fix-up-map-and-fenceable-for-VMA.patch b/patches.baytrail/0627-drm-i915-Fix-up-map-and-fenceable-for-VMA.patch
deleted file mode 100644
index e69d5d53ce44b..0000000000000
--- a/patches.baytrail/0627-drm-i915-Fix-up-map-and-fenceable-for-VMA.patch
+++ /dev/null
@@ -1,57 +0,0 @@
-From e99986d3008081d1762081aba8583fa4cad8cd38 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Wed, 31 Jul 2013 17:00:13 -0700
-Subject: drm/i915: Fix up map and fenceable for VMA
-
-formerly: "drm/i915: Create VMAs (part 3.5) - map and fenceable
-tracking"
-
-The map_and_fenceable tracking is per object. GTT mapping, and fences
-only apply to global GTT. As such,  object operations which are not
-performed on the global GTT should not effect mappable or fenceable
-characteristics.
-
-Functionally, this commit could very well be squashed in to a previous
-patch which updated object operations to take a VM argument.  This
-commit is split out because it's a bit tricky (or at least it was for
-me).
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-[danvet: Drop the bogus hunk in i915_vma_unbind as discussed with
-Ben.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 5cacaac77cfc1130a2d8bf60addb5c6c9c878214)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem.c | 7 +++++--
- 1 file changed, 5 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index 9150804dffc0..103815bedba4 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -2629,7 +2629,8 @@ int i915_vma_unbind(struct i915_vma *vma)
- 
- 	list_del(&obj->mm_list);
- 	/* Avoid an unnecessary call to unbind on rebind. */
--	obj->map_and_fenceable = true;
-+	if (i915_is_ggtt(vma->vm))
-+		obj->map_and_fenceable = true;
- 
- 	list_del(&vma->vma_link);
- 	drm_mm_remove_node(&vma->node);
-@@ -3191,7 +3192,9 @@ search_free:
- 		i915_is_ggtt(vm) &&
- 		vma->node.start + obj->base.size <= dev_priv->gtt.mappable_end;
- 
--	obj->map_and_fenceable = mappable && fenceable;
-+	/* Map and fenceable only changes if the VM is the global GGTT */
-+	if (i915_is_ggtt(vm))
-+		obj->map_and_fenceable = mappable && fenceable;
- 
- 	trace_i915_vma_bind(vma, map_and_fenceable);
- 	i915_gem_verify_gtt(dev);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0628-drm-i915-mm_list-is-per-VMA.patch b/patches.baytrail/0628-drm-i915-mm_list-is-per-VMA.patch
deleted file mode 100644
index 37710aa44e9b7..0000000000000
--- a/patches.baytrail/0628-drm-i915-mm_list-is-per-VMA.patch
+++ /dev/null
@@ -1,437 +0,0 @@
-From 0869c7f57d79bdfd26ecf5847a254bed58413173 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Wed, 31 Jul 2013 17:00:14 -0700
-Subject: drm/i915: mm_list is per VMA
-
-formerly: "drm/i915: Create VMAs (part 5) - move mm_list"
-
-The mm_list is used for the active/inactive LRUs. Since those LRUs are
-per address space, the link should be per VMx .
-
-Because we'll only ever have 1 VMA before this point, it's not incorrect
-to defer this change until this point in the patch series, and doing it
-here makes the change much easier to understand.
-
-Shamelessly manipulated out of Daniel:
-"active/inactive stuff is used by eviction when we run out of address
-space, so needs to be per-vma and per-address space. Bound/unbound otoh
-is used by the shrinker which only cares about the amount of memory used
-and not one bit about in which address space this memory is all used in.
-Of course to actual kick out an object we need to unbind it from every
-address space, but for that we have the per-object list of vmas."
-
-v2: only bump GGTT LRU in i915_gem_object_set_to_gtt_domain (Chris)
-
-v3: Moved earlier in the series
-
-v4: Add dropped message from v3
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-[danvet: Frob patch to apply and use vma->node.size directly as
-discused with Ben. Also drop a needles BUG_ON before move_to_inactive,
-the function itself has the same check.]
-[danvet 2nd: Rebase on top of the lost "drm/i915: Cleanup more of VMA
-in destroy", specifically unlink the vma from the mm_list in
-vma_unbind (to keep it symmetric with bind_to_vm) instead of
-vma_destroy.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit ca191b1313e733e47a9fb37c26b44aa6cdd9b1b1)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_debugfs.c        |   54 ++++++++++++++++++-----------
- drivers/gpu/drm/i915/i915_drv.h            |    5 +-
- drivers/gpu/drm/i915/i915_gem.c            |   28 ++++++++-------
- drivers/gpu/drm/i915/i915_gem_context.c    |    3 +
- drivers/gpu/drm/i915/i915_gem_evict.c      |   14 +++----
- drivers/gpu/drm/i915/i915_gem_execbuffer.c |    2 +
- drivers/gpu/drm/i915/i915_gem_stolen.c     |    2 -
- drivers/gpu/drm/i915/i915_gpu_error.c      |   43 ++++++++++++-----------
- 8 files changed, 89 insertions(+), 62 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_debugfs.c
-+++ b/drivers/gpu/drm/i915/i915_debugfs.c
-@@ -149,7 +149,7 @@ static int i915_gem_object_list_info(str
- 	struct drm_device *dev = node->minor->dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct i915_address_space *vm = &dev_priv->gtt.base;
--	struct drm_i915_gem_object *obj;
-+	struct i915_vma *vma;
- 	size_t total_obj_size, total_gtt_size;
- 	int count, ret;
- 
-@@ -157,6 +157,7 @@ static int i915_gem_object_list_info(str
- 	if (ret)
- 		return ret;
- 
-+	/* FIXME: the user of this interface might want more than just GGTT */
- 	switch (list) {
- 	case ACTIVE_LIST:
- 		seq_puts(m, "Active:\n");
-@@ -172,12 +173,12 @@ static int i915_gem_object_list_info(str
- 	}
- 
- 	total_obj_size = total_gtt_size = count = 0;
--	list_for_each_entry(obj, head, mm_list) {
--		seq_puts(m, "   ");
--		describe_obj(m, obj);
--		seq_putc(m, '\n');
--		total_obj_size += obj->base.size;
--		total_gtt_size += i915_gem_obj_ggtt_size(obj);
-+	list_for_each_entry(vma, head, mm_list) {
-+		seq_printf(m, "   ");
-+		describe_obj(m, vma->obj);
-+		seq_printf(m, "\n");
-+		total_obj_size += vma->obj->base.size;
-+		total_gtt_size += vma->node.size;
- 		count++;
- 	}
- 	mutex_unlock(&dev->struct_mutex);
-@@ -224,7 +225,18 @@ static int per_file_stats(int id, void *
- 	return 0;
- }
- 
--static int i915_gem_object_info(struct seq_file *m, void *data)
-+#define count_vmas(list, member) do { \
-+	list_for_each_entry(vma, list, member) { \
-+		size += i915_gem_obj_ggtt_size(vma->obj); \
-+		++count; \
-+		if (vma->obj->map_and_fenceable) { \
-+			mappable_size += i915_gem_obj_ggtt_size(vma->obj); \
-+			++mappable_count; \
-+		} \
-+	} \
-+} while (0)
-+
-+static int i915_gem_object_info(struct seq_file *m, void* data)
- {
- 	struct drm_info_node *node = (struct drm_info_node *) m->private;
- 	struct drm_device *dev = node->minor->dev;
-@@ -234,6 +246,7 @@ static int i915_gem_object_info(struct s
- 	struct drm_i915_gem_object *obj;
- 	struct i915_address_space *vm = &dev_priv->gtt.base;
- 	struct drm_file *file;
-+	struct i915_vma *vma;
- 	int ret;
- 
- 	ret = mutex_lock_interruptible(&dev->struct_mutex);
-@@ -250,12 +263,12 @@ static int i915_gem_object_info(struct s
- 		   count, mappable_count, size, mappable_size);
- 
- 	size = count = mappable_size = mappable_count = 0;
--	count_objects(&vm->active_list, mm_list);
-+	count_vmas(&vm->active_list, mm_list);
- 	seq_printf(m, "  %u [%u] active objects, %zu [%zu] bytes\n",
- 		   count, mappable_count, size, mappable_size);
- 
- 	size = count = mappable_size = mappable_count = 0;
--	count_objects(&vm->inactive_list, mm_list);
-+	count_vmas(&vm->inactive_list, mm_list);
- 	seq_printf(m, "  %u [%u] inactive objects, %zu [%zu] bytes\n",
- 		   count, mappable_count, size, mappable_size);
- 
-@@ -1774,7 +1787,8 @@ i915_drop_caches_set(void *data, u64 val
- 	struct drm_device *dev = data;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct drm_i915_gem_object *obj, *next;
--	struct i915_address_space *vm = &dev_priv->gtt.base;
-+	struct i915_address_space *vm;
-+	struct i915_vma *vma, *x;
- 	int ret;
- 
- 	DRM_DEBUG_DRIVER("Dropping caches: 0x%08llx\n", val);
-@@ -1795,14 +1809,16 @@ i915_drop_caches_set(void *data, u64 val
- 		i915_gem_retire_requests(dev);
- 
- 	if (val & DROP_BOUND) {
--		list_for_each_entry_safe(obj, next, &vm->inactive_list,
--					 mm_list) {
--			if (obj->pin_count)
--				continue;
--
--			ret = i915_gem_object_ggtt_unbind(obj);
--			if (ret)
--				goto unlock;
-+		list_for_each_entry(vm, &dev_priv->vm_list, global_link) {
-+			list_for_each_entry_safe(vma, x, &vm->inactive_list,
-+						 mm_list) {
-+				if (vma->obj->pin_count)
-+					continue;
-+
-+				ret = i915_vma_unbind(vma);
-+				if (ret)
-+					goto unlock;
-+			}
- 		}
- 	}
- 
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -558,6 +558,9 @@ struct i915_vma {
- 	struct drm_i915_gem_object *obj;
- 	struct i915_address_space *vm;
- 
-+	/** This object's place on the active/inactive lists */
-+	struct list_head mm_list;
-+
- 	struct list_head vma_link; /* Link in the object's VMA list */
- };
- 
-@@ -1299,9 +1302,7 @@ struct drm_i915_gem_object {
- 	struct drm_mm_node *stolen;
- 	struct list_head global_list;
- 
--	/** This object's place on the active/inactive lists */
- 	struct list_head ring_list;
--	struct list_head mm_list;
- 	/** This object's place in the batchbuffer or on the eviction list */
- 	struct list_head exec_list;
- 
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -1873,7 +1873,6 @@ i915_gem_object_move_to_active(struct dr
- {
- 	struct drm_device *dev = obj->base.dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
--	struct i915_address_space *vm = &dev_priv->gtt.base;
- 	u32 seqno = intel_ring_get_seqno(ring);
- 
- 	BUG_ON(ring == NULL);
-@@ -1889,8 +1888,6 @@ i915_gem_object_move_to_active(struct dr
- 		obj->active = 1;
- 	}
- 
--	/* Move from whatever list we were on to the tail of execution. */
--	list_move_tail(&obj->mm_list, &vm->active_list);
- 	list_move_tail(&obj->ring_list, &ring->active_list);
- 
- 	obj->last_read_seqno = seqno;
-@@ -1912,14 +1909,14 @@ i915_gem_object_move_to_active(struct dr
- static void
- i915_gem_object_move_to_inactive(struct drm_i915_gem_object *obj)
- {
--	struct drm_device *dev = obj->base.dev;
--	struct drm_i915_private *dev_priv = dev->dev_private;
--	struct i915_address_space *vm = &dev_priv->gtt.base;
-+	struct drm_i915_private *dev_priv = obj->base.dev->dev_private;
-+	struct i915_address_space *ggtt_vm = &dev_priv->gtt.base;
-+	struct i915_vma *vma = i915_gem_obj_to_vma(obj, ggtt_vm);
- 
- 	BUG_ON(obj->base.write_domain & ~I915_GEM_GPU_DOMAINS);
- 	BUG_ON(!obj->active);
- 
--	list_move_tail(&obj->mm_list, &vm->inactive_list);
-+	list_move_tail(&vma->mm_list, &ggtt_vm->inactive_list);
- 
- 	list_del_init(&obj->ring_list);
- 	obj->ring = NULL;
-@@ -2627,7 +2624,7 @@ int i915_vma_unbind(struct i915_vma *vma
- 	i915_gem_gtt_finish_object(obj);
- 	i915_gem_object_unpin_pages(obj);
- 
--	list_del(&obj->mm_list);
-+	list_del(&vma->mm_list);
- 	/* Avoid an unnecessary call to unbind on rebind. */
- 	if (i915_is_ggtt(vma->vm))
- 		obj->map_and_fenceable = true;
-@@ -3175,7 +3172,7 @@ search_free:
- 		goto err_remove_node;
- 
- 	list_move_tail(&obj->global_list, &dev_priv->mm.bound_list);
--	list_add_tail(&obj->mm_list, &vm->inactive_list);
-+	list_add_tail(&vma->mm_list, &vm->inactive_list);
- 
- 	/* Keep GGTT vmas first to make debug easier */
- 	if (i915_is_ggtt(vm))
-@@ -3340,9 +3337,14 @@ i915_gem_object_set_to_gtt_domain(struct
- 					    old_write_domain);
- 
- 	/* And bump the LRU for this access */
--	if (i915_gem_object_is_inactive(obj))
--		list_move_tail(&obj->mm_list,
--			       &dev_priv->gtt.base.inactive_list);
-+	if (i915_gem_object_is_inactive(obj)) {
-+		struct i915_vma *vma = i915_gem_obj_to_vma(obj,
-+							   &dev_priv->gtt.base);
-+		if (vma)
-+			list_move_tail(&vma->mm_list,
-+				       &dev_priv->gtt.base.inactive_list);
-+
-+	}
- 
- 	return 0;
- }
-@@ -3915,7 +3917,6 @@ unlock:
- void i915_gem_object_init(struct drm_i915_gem_object *obj,
- 			  const struct drm_i915_gem_object_ops *ops)
- {
--	INIT_LIST_HEAD(&obj->mm_list);
- 	INIT_LIST_HEAD(&obj->global_list);
- 	INIT_LIST_HEAD(&obj->ring_list);
- 	INIT_LIST_HEAD(&obj->exec_list);
-@@ -4057,6 +4058,7 @@ struct i915_vma *i915_gem_vma_create(str
- 		return ERR_PTR(-ENOMEM);
- 
- 	INIT_LIST_HEAD(&vma->vma_link);
-+	INIT_LIST_HEAD(&vma->mm_list);
- 	vma->vm = vm;
- 	vma->obj = obj;
- 
---- a/drivers/gpu/drm/i915/i915_gem_context.c
-+++ b/drivers/gpu/drm/i915/i915_gem_context.c
-@@ -434,7 +434,10 @@ static int do_switch(struct i915_hw_cont
- 	 * MI_SET_CONTEXT instead of when the next seqno has completed.
- 	 */
- 	if (from != NULL) {
-+		struct drm_i915_private *dev_priv = from->obj->base.dev->dev_private;
-+		struct i915_address_space *ggtt = &dev_priv->gtt.base;
- 		from->obj->base.read_domains = I915_GEM_DOMAIN_INSTRUCTION;
-+		list_move_tail(&i915_gem_obj_to_vma(from->obj, ggtt)->mm_list, &ggtt->active_list);
- 		i915_gem_object_move_to_active(from->obj, ring);
- 		/* As long as MI_SET_CONTEXT is serializing, ie. it flushes the
- 		 * whole damn pipeline, we don't need to explicitly mark the
---- a/drivers/gpu/drm/i915/i915_gem_evict.c
-+++ b/drivers/gpu/drm/i915/i915_gem_evict.c
-@@ -87,8 +87,7 @@ i915_gem_evict_something(struct drm_devi
- 		drm_mm_init_scan(&vm->mm, min_size, alignment, cache_level);
- 
- 	/* First see if there is a large enough contiguous idle region... */
--	list_for_each_entry(obj, &vm->inactive_list, mm_list) {
--		struct i915_vma *vma = i915_gem_obj_to_vma(obj, vm);
-+	list_for_each_entry(vma, &vm->inactive_list, mm_list) {
- 		if (mark_free(vma, &unwind_list))
- 			goto found;
- 	}
-@@ -97,8 +96,7 @@ i915_gem_evict_something(struct drm_devi
- 		goto none;
- 
- 	/* Now merge in the soon-to-be-expired objects... */
--	list_for_each_entry(obj, &vm->active_list, mm_list) {
--		struct i915_vma *vma = i915_gem_obj_to_vma(obj, vm);
-+	list_for_each_entry(vma, &vm->active_list, mm_list) {
- 		if (mark_free(vma, &unwind_list))
- 			goto found;
- 	}
-@@ -159,7 +157,7 @@ i915_gem_evict_everything(struct drm_dev
- {
- 	drm_i915_private_t *dev_priv = dev->dev_private;
- 	struct i915_address_space *vm;
--	struct drm_i915_gem_object *obj, *next;
-+	struct i915_vma *vma, *next;
- 	bool lists_empty = true;
- 	int ret;
- 
-@@ -187,9 +185,9 @@ i915_gem_evict_everything(struct drm_dev
- 
- 	/* Having flushed everything, unbind() should never raise an error */
- 	list_for_each_entry(vm, &dev_priv->vm_list, global_link) {
--		list_for_each_entry_safe(obj, next, &vm->inactive_list, mm_list)
--			if (obj->pin_count == 0)
--				WARN_ON(i915_vma_unbind(i915_gem_obj_to_vma(obj, vm)));
-+		list_for_each_entry_safe(vma, next, &vm->inactive_list, mm_list)
-+			if (vma->obj->pin_count == 0)
-+				WARN_ON(i915_vma_unbind(vma));
- 	}
- 
- 	return 0;
---- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-@@ -801,6 +801,8 @@ i915_gem_execbuffer_move_to_active(struc
- 		obj->base.read_domains = obj->base.pending_read_domains;
- 		obj->fenced_gpu_access = obj->pending_fenced_gpu_access;
- 
-+		/* FIXME: This lookup gets fixed later <-- danvet */
-+		list_move_tail(&i915_gem_obj_to_vma(obj, vm)->mm_list, &vm->active_list);
- 		i915_gem_object_move_to_active(obj, ring);
- 		if (obj->base.write_domain) {
- 			obj->dirty = 1;
---- a/drivers/gpu/drm/i915/i915_gem_stolen.c
-+++ b/drivers/gpu/drm/i915/i915_gem_stolen.c
-@@ -418,7 +418,7 @@ i915_gem_object_create_stolen_for_preall
- 	obj->has_global_gtt_mapping = 1;
- 
- 	list_add_tail(&obj->global_list, &dev_priv->mm.bound_list);
--	list_add_tail(&obj->mm_list, &ggtt->inactive_list);
-+	list_add_tail(&vma->mm_list, &ggtt->inactive_list);
- 
- 	return obj;
- 
---- a/drivers/gpu/drm/i915/i915_gpu_error.c
-+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
-@@ -556,11 +556,11 @@ static void capture_bo(struct drm_i915_e
- static u32 capture_active_bo(struct drm_i915_error_buffer *err,
- 			     int count, struct list_head *head)
- {
--	struct drm_i915_gem_object *obj;
-+	struct i915_vma *vma;
- 	int i = 0;
- 
--	list_for_each_entry(obj, head, mm_list) {
--		capture_bo(err++, obj);
-+	list_for_each_entry(vma, head, mm_list) {
-+		capture_bo(err++, vma->obj);
- 		if (++i == count)
- 			break;
- 	}
-@@ -622,7 +622,8 @@ static struct drm_i915_error_object *
- i915_error_first_batchbuffer(struct drm_i915_private *dev_priv,
- 			     struct intel_ring_buffer *ring)
- {
--	struct i915_address_space *vm = &dev_priv->gtt.base;
-+	struct i915_address_space *vm;
-+	struct i915_vma *vma;
- 	struct drm_i915_gem_object *obj;
- 	u32 seqno;
- 
-@@ -642,20 +643,23 @@ i915_error_first_batchbuffer(struct drm_
- 	}
- 
- 	seqno = ring->get_seqno(ring, false);
--	list_for_each_entry(obj, &vm->active_list, mm_list) {
--		if (obj->ring != ring)
--			continue;
--
--		if (i915_seqno_passed(seqno, obj->last_read_seqno))
--			continue;
--
--		if ((obj->base.read_domains & I915_GEM_DOMAIN_COMMAND) == 0)
--			continue;
--
--		/* We need to copy these to an anonymous buffer as the simplest
--		 * method to avoid being overwritten by userspace.
--		 */
--		return i915_error_object_create(dev_priv, obj);
-+	list_for_each_entry(vm, &dev_priv->vm_list, global_link) {
-+		list_for_each_entry(vma, &vm->active_list, mm_list) {
-+			obj = vma->obj;
-+			if (obj->ring != ring)
-+				continue;
-+
-+			if (i915_seqno_passed(seqno, obj->last_read_seqno))
-+				continue;
-+
-+			if ((obj->base.read_domains & I915_GEM_DOMAIN_COMMAND) == 0)
-+				continue;
-+
-+			/* We need to copy these to an anonymous buffer as the simplest
-+			 * method to avoid being overwritten by userspace.
-+			 */
-+			return i915_error_object_create(dev_priv, obj);
-+		}
- 	}
- 
- 	return NULL;
-@@ -775,11 +779,12 @@ static void i915_gem_capture_buffers(str
- 				     struct drm_i915_error_state *error)
- {
- 	struct i915_address_space *vm = &dev_priv->gtt.base;
-+	struct i915_vma *vma;
- 	struct drm_i915_gem_object *obj;
- 	int i;
- 
- 	i = 0;
--	list_for_each_entry(obj, &vm->active_list, mm_list)
-+	list_for_each_entry(vma, &vm->active_list, mm_list)
- 		i++;
- 	error->active_bo_count = i;
- 	list_for_each_entry(obj, &dev_priv->mm.bound_list, global_list)
diff --git a/patches.baytrail/0629-drm-i915-Update-error-capture-for-VMs.patch b/patches.baytrail/0629-drm-i915-Update-error-capture-for-VMs.patch
deleted file mode 100644
index c0177494e55b1..0000000000000
--- a/patches.baytrail/0629-drm-i915-Update-error-capture-for-VMs.patch
+++ /dev/null
@@ -1,163 +0,0 @@
-From 902bf4191131a3dcc66c457b027115a5886c322c Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Wed, 31 Jul 2013 17:00:15 -0700
-Subject: drm/i915: Update error capture for VMs
-
-formerly: "drm/i915: Create VMAs (part 4) - Error capture"
-
-Since the active/inactive lists are per VM, we need to modify the error
-capture code to be aware of this, and also extend it to capture the
-buffers from all the VMs. For now all the code assumes only 1 VM, but it
-will become more generic over the next few patches.
-
-NOTE: If the number of VMs in a real world system grows significantly
-we'll have to focus on only capturing the guilty VM, or else it's likely
-there won't be enough space for error capture.
-
-v2: Squashed in the "part 6" which had dependencies on the mm_list
-change. Since I've moved the mm_list change to an earlier point in the
-series, we were able to accomplish it here and now.
-
-v3: Rebased over new error capture
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 95f5301dd880da2dea2c9a9c29750064536d426a)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h       |  4 +-
- drivers/gpu/drm/i915/i915_gpu_error.c | 76 ++++++++++++++++++++++++-----------
- 2 files changed, 55 insertions(+), 25 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index cd5d4f591e2d..62d85e2fb90d 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -323,8 +323,8 @@ struct drm_i915_error_state {
- 		u32 purgeable:1;
- 		s32 ring:4;
- 		u32 cache_level:2;
--	} *active_bo, *pinned_bo;
--	u32 active_bo_count, pinned_bo_count;
-+	} **active_bo, **pinned_bo;
-+	u32 *active_bo_count, *pinned_bo_count;
- 	struct intel_overlay_error_state *overlay;
- 	struct intel_display_error_state *display;
- };
-diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
-index fad48b2bb870..60393cb9a7c7 100644
---- a/drivers/gpu/drm/i915/i915_gpu_error.c
-+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
-@@ -304,13 +304,13 @@ int i915_error_state_to_str(struct drm_i915_error_state_buf *m,
- 
- 	if (error->active_bo)
- 		print_error_buffers(m, "Active",
--				    error->active_bo,
--				    error->active_bo_count);
-+				    error->active_bo[0],
-+				    error->active_bo_count[0]);
- 
- 	if (error->pinned_bo)
- 		print_error_buffers(m, "Pinned",
--				    error->pinned_bo,
--				    error->pinned_bo_count);
-+				    error->pinned_bo[0],
-+				    error->pinned_bo_count[0]);
- 
- 	for (i = 0; i < ARRAY_SIZE(error->ring); i++) {
- 		struct drm_i915_error_object *obj;
-@@ -775,42 +775,72 @@ static void i915_gem_record_rings(struct drm_device *dev,
- 	}
- }
- 
--static void i915_gem_capture_buffers(struct drm_i915_private *dev_priv,
--				     struct drm_i915_error_state *error)
-+/* FIXME: Since pin count/bound list is global, we duplicate what we capture per
-+ * VM.
-+ */
-+static void i915_gem_capture_vm(struct drm_i915_private *dev_priv,
-+				struct drm_i915_error_state *error,
-+				struct i915_address_space *vm,
-+				const int ndx)
- {
--	struct i915_address_space *vm = &dev_priv->gtt.base;
--	struct i915_vma *vma;
-+	struct drm_i915_error_buffer *active_bo = NULL, *pinned_bo = NULL;
- 	struct drm_i915_gem_object *obj;
-+	struct i915_vma *vma;
- 	int i;
- 
- 	i = 0;
- 	list_for_each_entry(vma, &vm->active_list, mm_list)
- 		i++;
--	error->active_bo_count = i;
-+	error->active_bo_count[ndx] = i;
- 	list_for_each_entry(obj, &dev_priv->mm.bound_list, global_list)
- 		if (obj->pin_count)
- 			i++;
--	error->pinned_bo_count = i - error->active_bo_count;
-+	error->pinned_bo_count[ndx] = i - error->active_bo_count[ndx];
- 
- 	if (i) {
--		error->active_bo = kmalloc(sizeof(*error->active_bo)*i,
--					   GFP_ATOMIC);
--		if (error->active_bo)
--			error->pinned_bo =
--				error->active_bo + error->active_bo_count;
-+		active_bo = kmalloc(sizeof(*active_bo)*i, GFP_ATOMIC);
-+		if (active_bo)
-+			pinned_bo = active_bo + error->active_bo_count[ndx];
- 	}
- 
--	if (error->active_bo)
--		error->active_bo_count =
--			capture_active_bo(error->active_bo,
--					  error->active_bo_count,
-+	if (active_bo)
-+		error->active_bo_count[ndx] =
-+			capture_active_bo(active_bo,
-+					  error->active_bo_count[ndx],
- 					  &vm->active_list);
- 
--	if (error->pinned_bo)
--		error->pinned_bo_count =
--			capture_pinned_bo(error->pinned_bo,
--					  error->pinned_bo_count,
-+	if (pinned_bo)
-+		error->pinned_bo_count[ndx] =
-+			capture_pinned_bo(pinned_bo,
-+					  error->pinned_bo_count[ndx],
- 					  &dev_priv->mm.bound_list);
-+	error->active_bo[ndx] = active_bo;
-+	error->pinned_bo[ndx] = pinned_bo;
-+}
-+
-+static void i915_gem_capture_buffers(struct drm_i915_private *dev_priv,
-+				     struct drm_i915_error_state *error)
-+{
-+	struct i915_address_space *vm;
-+	int cnt = 0, i = 0;
-+
-+	list_for_each_entry(vm, &dev_priv->vm_list, global_link)
-+		cnt++;
-+
-+	if (WARN(cnt > 1, "Multiple VMs not yet supported\n"))
-+		cnt = 1;
-+
-+	vm = &dev_priv->gtt.base;
-+
-+	error->active_bo = kcalloc(cnt, sizeof(*error->active_bo), GFP_ATOMIC);
-+	error->pinned_bo = kcalloc(cnt, sizeof(*error->pinned_bo), GFP_ATOMIC);
-+	error->active_bo_count = kcalloc(cnt, sizeof(*error->active_bo_count),
-+					 GFP_ATOMIC);
-+	error->pinned_bo_count = kcalloc(cnt, sizeof(*error->pinned_bo_count),
-+					 GFP_ATOMIC);
-+
-+	list_for_each_entry(vm, &dev_priv->vm_list, global_link)
-+		i915_gem_capture_vm(dev_priv, error, vm, i++);
- }
- 
- /**
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0630-drm-i915-Add-vma-to-list-at-creation.patch b/patches.baytrail/0630-drm-i915-Add-vma-to-list-at-creation.patch
deleted file mode 100644
index 9407806e81898..0000000000000
--- a/patches.baytrail/0630-drm-i915-Add-vma-to-list-at-creation.patch
+++ /dev/null
@@ -1,83 +0,0 @@
-From a80026de891d226283f110661672af760bfffb58 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Wed, 31 Jul 2013 17:00:16 -0700
-Subject: drm/i915: Add vma to list at creation
-
-With the current code there shouldn't be a distinction - however with an
-upcoming change we intend to allocate a vma much earlier, before it's
-actually bound anywhere.
-
-To do this we have to check node allocation as well for the _bound()
-check.
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-[danvet: move list_del(&vma->vma_link) from vma_unbind to vma_destroy,
-again fallout from the loss of "rm/i915: Cleanup more of VMA in
-destroy".]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-fixup for drm/i915: Add vma to list at creation
-
-(cherry picked from commit 8b9c2b9411dd55617442f8151fb6fb2849c72f7e)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem.c | 16 ++++++++--------
- 1 file changed, 8 insertions(+), 8 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index 093781a28080..f7ab763d6d76 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -2629,7 +2629,6 @@ int i915_vma_unbind(struct i915_vma *vma)
- 	if (i915_is_ggtt(vma->vm))
- 		obj->map_and_fenceable = true;
- 
--	list_del(&vma->vma_link);
- 	drm_mm_remove_node(&vma->node);
- 	i915_gem_vma_destroy(vma);
- 
-@@ -3174,12 +3173,6 @@ search_free:
- 	list_move_tail(&obj->global_list, &dev_priv->mm.bound_list);
- 	list_add_tail(&vma->mm_list, &vm->inactive_list);
- 
--	/* Keep GGTT vmas first to make debug easier */
--	if (i915_is_ggtt(vm))
--		list_add(&vma->vma_link, &obj->vma_list);
--	else
--		list_add_tail(&vma->vma_link, &obj->vma_list);
--
- 	fenceable =
- 		i915_is_ggtt(vm) &&
- 		i915_gem_obj_ggtt_size(obj) == fence_size &&
-@@ -4062,12 +4055,19 @@ struct i915_vma *i915_gem_vma_create(struct drm_i915_gem_object *obj,
- 	vma->vm = vm;
- 	vma->obj = obj;
- 
-+	/* Keep GGTT vmas first to make debug easier */
-+	if (i915_is_ggtt(vm))
-+		list_add(&vma->vma_link, &obj->vma_list);
-+	else
-+		list_add_tail(&vma->vma_link, &obj->vma_list);
-+
- 	return vma;
- }
- 
- void i915_gem_vma_destroy(struct i915_vma *vma)
- {
- 	WARN_ON(vma->node.allocated);
-+	list_del(&vma->vma_link);
- 	kfree(vma);
- }
- 
-@@ -4755,7 +4755,7 @@ bool i915_gem_obj_bound(struct drm_i915_gem_object *o,
- 	struct i915_vma *vma;
- 
- 	list_for_each_entry(vma, &o->vma_list, vma_link)
--		if (vma->vm == vm)
-+		if (vma->vm == vm && drm_mm_node_allocated(&vma->node))
- 			return true;
- 
- 	return false;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0631-drm-i915-Pull-watermark-level-validity-check-out.patch b/patches.baytrail/0631-drm-i915-Pull-watermark-level-validity-check-out.patch
deleted file mode 100644
index 4a972909fd62c..0000000000000
--- a/patches.baytrail/0631-drm-i915-Pull-watermark-level-validity-check-out.patch
+++ /dev/null
@@ -1,101 +0,0 @@
-From 46999a5faf8aaa5ea1dcaa81f7cb8b9799780a2f Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Wed, 7 Aug 2013 13:24:47 +0300
-Subject: drm/i915: Pull watermark level validity check out
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Refactor the code a bit to split the watermark level validity check into
-a separate function.
-
-Also add hack there that allows us to use it even for LP0 watermarks.
-ATM we don't pre-compute/check the LP0 watermarks, so we just have to
-clamp them to the maximum and hope things work out.
-
-v2: Add some debug prints when we exceed max WM0
-    Kill pointless ret = false' assignment.
-    Include the check for the already disabled 'result' which
-    got shuffled around when the patchs got reorderd
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit a9786a119d2cd0f43d5554bddda71a5fd6ee39ff)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 51 +++++++++++++++++++++++++++++++++++------
- 1 file changed, 44 insertions(+), 7 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index a5a995948fa9..1dd8f30e5427 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2278,6 +2278,49 @@ static uint32_t ilk_compute_fbc_wm(struct hsw_pipe_wm_parameters *params,
- 			  params->pri_bytes_per_pixel);
- }
- 
-+static bool ilk_check_wm(int level,
-+			 const struct hsw_wm_maximums *max,
-+			 struct hsw_lp_wm_result *result)
-+{
-+	bool ret;
-+
-+	/* already determined to be invalid? */
-+	if (!result->enable)
-+		return false;
-+
-+	result->enable = result->pri_val <= max->pri &&
-+			 result->spr_val <= max->spr &&
-+			 result->cur_val <= max->cur;
-+
-+	ret = result->enable;
-+
-+	/*
-+	 * HACK until we can pre-compute everything,
-+	 * and thus fail gracefully if LP0 watermarks
-+	 * are exceeded...
-+	 */
-+	if (level == 0 && !result->enable) {
-+		if (result->pri_val > max->pri)
-+			DRM_DEBUG_KMS("Primary WM%d too large %u (max %u)\n",
-+				      level, result->pri_val, max->pri);
-+		if (result->spr_val > max->spr)
-+			DRM_DEBUG_KMS("Sprite WM%d too large %u (max %u)\n",
-+				      level, result->spr_val, max->spr);
-+		if (result->cur_val > max->cur)
-+			DRM_DEBUG_KMS("Cursor WM%d too large %u (max %u)\n",
-+				      level, result->cur_val, max->cur);
-+
-+		result->pri_val = min_t(uint32_t, result->pri_val, max->pri);
-+		result->spr_val = min_t(uint32_t, result->spr_val, max->spr);
-+		result->cur_val = min_t(uint32_t, result->cur_val, max->cur);
-+		result->enable = true;
-+	}
-+
-+	DRM_DEBUG_KMS("WM%d: %sabled\n", level, result->enable ? "en" : "dis");
-+
-+	return ret;
-+}
-+
- static void ilk_compute_wm_level(struct drm_i915_private *dev_priv,
- 				 int level,
- 				 struct hsw_pipe_wm_parameters *p,
-@@ -2318,13 +2361,7 @@ static bool hsw_compute_lp_wm(struct drm_i915_private *dev_priv,
- 	result->fbc_val = max3(res[0].fbc_val, res[1].fbc_val, res[2].fbc_val);
- 	result->enable = true;
- 
--	if (!result->enable)
--		return false;
--
--	result->enable = result->pri_val <= max->pri &&
--			 result->spr_val <= max->spr &&
--			 result->cur_val <= max->cur;
--	return result->enable;
-+	return ilk_check_wm(level, max, result);
- }
- 
- static uint32_t hsw_compute_wm_pipe(struct drm_i915_private *dev_priv,
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0632-drm-i915-Rename-hsw_lp_wm_result-to-intel_wm_level.patch b/patches.baytrail/0632-drm-i915-Rename-hsw_lp_wm_result-to-intel_wm_level.patch
deleted file mode 100644
index 735d2a5deee60..0000000000000
--- a/patches.baytrail/0632-drm-i915-Rename-hsw_lp_wm_result-to-intel_wm_level.patch
+++ /dev/null
@@ -1,111 +0,0 @@
-From 3b49ab5a553f5befcacc07e7f929829daa15fdfb Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Tue, 6 Aug 2013 22:24:05 +0300
-Subject: drm/i915: Rename hsw_lp_wm_result to intel_wm_level
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Let's call hsw_lp_wm_result intel_wm_level from now on and move it to
-i915_drv.h for later use.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 1fd527cc34ed44efa4f59c01ad920479f728b707)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h |  8 ++++++++
- drivers/gpu/drm/i915/intel_pm.c | 20 ++++++--------------
- 2 files changed, 14 insertions(+), 14 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 62d85e2fb90d..3a435fede3c4 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1063,6 +1063,14 @@ enum intel_ddb_partitioning {
- 	INTEL_DDB_PART_5_6, /* IVB+ */
- };
- 
-+struct intel_wm_level {
-+	bool enable;
-+	uint32_t pri_val;
-+	uint32_t spr_val;
-+	uint32_t cur_val;
-+	uint32_t fbc_val;
-+};
-+
- typedef struct drm_i915_private {
- 	struct drm_device *dev;
- 	struct kmem_cache *slab;
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 1dd8f30e5427..d10d4c717b4a 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2180,14 +2180,6 @@ struct hsw_wm_maximums {
- 	uint16_t fbc;
- };
- 
--struct hsw_lp_wm_result {
--	bool enable;
--	uint32_t pri_val;
--	uint32_t spr_val;
--	uint32_t cur_val;
--	uint32_t fbc_val;
--};
--
- struct hsw_wm_values {
- 	uint32_t wm_pipe[3];
- 	uint32_t wm_lp[3];
-@@ -2280,7 +2272,7 @@ static uint32_t ilk_compute_fbc_wm(struct hsw_pipe_wm_parameters *params,
- 
- static bool ilk_check_wm(int level,
- 			 const struct hsw_wm_maximums *max,
--			 struct hsw_lp_wm_result *result)
-+			 struct intel_wm_level *result)
- {
- 	bool ret;
- 
-@@ -2324,7 +2316,7 @@ static bool ilk_check_wm(int level,
- static void ilk_compute_wm_level(struct drm_i915_private *dev_priv,
- 				 int level,
- 				 struct hsw_pipe_wm_parameters *p,
--				 struct hsw_lp_wm_result *result)
-+				 struct intel_wm_level *result)
- {
- 	uint16_t pri_latency = dev_priv->wm.pri_latency[level];
- 	uint16_t spr_latency = dev_priv->wm.spr_latency[level];
-@@ -2347,10 +2339,10 @@ static void ilk_compute_wm_level(struct drm_i915_private *dev_priv,
- static bool hsw_compute_lp_wm(struct drm_i915_private *dev_priv,
- 			      int level, struct hsw_wm_maximums *max,
- 			      struct hsw_pipe_wm_parameters *params,
--			      struct hsw_lp_wm_result *result)
-+			      struct intel_wm_level *result)
- {
- 	enum pipe pipe;
--	struct hsw_lp_wm_result res[3];
-+	struct intel_wm_level res[3];
- 
- 	for (pipe = PIPE_A; pipe <= PIPE_C; pipe++)
- 		ilk_compute_wm_level(dev_priv, level, &params[pipe], &res[pipe]);
-@@ -2584,7 +2576,7 @@ static void hsw_compute_wm_results(struct drm_device *dev,
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct drm_crtc *crtc;
--	struct hsw_lp_wm_result lp_results[4] = {};
-+	struct intel_wm_level lp_results[4] = {};
- 	enum pipe pipe;
- 	int level, max_level, wm_lp;
- 
-@@ -2607,7 +2599,7 @@ static void hsw_compute_wm_results(struct drm_device *dev,
- 
- 	memset(results, 0, sizeof(*results));
- 	for (wm_lp = 1; wm_lp <= 3; wm_lp++) {
--		const struct hsw_lp_wm_result *r;
-+		const struct intel_wm_level *r;
- 
- 		level = (max_level == 4 && wm_lp > 1) ? wm_lp + 1 : wm_lp;
- 		if (level > max_level)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0633-drm-i915-Calculate-max-watermark-levels-for-ILK.patch b/patches.baytrail/0633-drm-i915-Calculate-max-watermark-levels-for-ILK.patch
deleted file mode 100644
index ed3cbb95c4145..0000000000000
--- a/patches.baytrail/0633-drm-i915-Calculate-max-watermark-levels-for-ILK.patch
+++ /dev/null
@@ -1,165 +0,0 @@
-From de594f8178a74406d1b7947e8adeb574821c7925 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Wed, 7 Aug 2013 13:28:19 +0300
-Subject: drm/i915: Calculate max watermark levels for ILK+
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-There are quite a few variables we need to take into account to
-determine the maximum watermark levels, so it feels a bit cleaner
-to calculate those rather than just have a bunch of what look like
-magic numbers.
-
-v2: s/pipes_active/num_pipes_active
-    s/othwewise/otherwise
-
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 158ae64f820939473012dacfc0ae1ec782b45b60)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 119 ++++++++++++++++++++++++++++++++++++----
- 1 file changed, 107 insertions(+), 12 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index d10d4c717b4a..5daa32a4e864 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2270,6 +2270,104 @@ static uint32_t ilk_compute_fbc_wm(struct hsw_pipe_wm_parameters *params,
- 			  params->pri_bytes_per_pixel);
- }
- 
-+static unsigned int ilk_display_fifo_size(const struct drm_device *dev)
-+{
-+	if (INTEL_INFO(dev)->gen >= 7)
-+		return 768;
-+	else
-+		return 512;
-+}
-+
-+/* Calculate the maximum primary/sprite plane watermark */
-+static unsigned int ilk_plane_wm_max(const struct drm_device *dev,
-+				     int level,
-+				     unsigned int num_pipes_active,
-+				     bool sprite_enabled,
-+				     enum intel_ddb_partitioning ddb_partitioning,
-+				     bool is_sprite)
-+{
-+	unsigned int fifo_size = ilk_display_fifo_size(dev);
-+	unsigned int max;
-+
-+	/* if sprites aren't enabled, sprites get nothing */
-+	if (is_sprite && !sprite_enabled)
-+		return 0;
-+
-+	/* HSW allows LP1+ watermarks even with multiple pipes */
-+	if (level == 0 || num_pipes_active > 1) {
-+		fifo_size /= INTEL_INFO(dev)->num_pipes;
-+
-+		/*
-+		 * For some reason the non self refresh
-+		 * FIFO size is only half of the self
-+		 * refresh FIFO size on ILK/SNB.
-+		 */
-+		if (INTEL_INFO(dev)->gen <= 6)
-+			fifo_size /= 2;
-+	}
-+
-+	if (sprite_enabled) {
-+		/* level 0 is always calculated with 1:1 split */
-+		if (level > 0 && ddb_partitioning == INTEL_DDB_PART_5_6) {
-+			if (is_sprite)
-+				fifo_size *= 5;
-+			fifo_size /= 6;
-+		} else {
-+			fifo_size /= 2;
-+		}
-+	}
-+
-+	/* clamp to max that the registers can hold */
-+	if (INTEL_INFO(dev)->gen >= 7)
-+		/* IVB/HSW primary/sprite plane watermarks */
-+		max = level == 0 ? 127 : 1023;
-+	else if (!is_sprite)
-+		/* ILK/SNB primary plane watermarks */
-+		max = level == 0 ? 127 : 511;
-+	else
-+		/* ILK/SNB sprite plane watermarks */
-+		max = level == 0 ? 63 : 255;
-+
-+	return min(fifo_size, max);
-+}
-+
-+/* Calculate the maximum cursor plane watermark */
-+static unsigned int ilk_cursor_wm_max(const struct drm_device *dev,
-+				      int level, unsigned int num_pipes_active)
-+{
-+	/* HSW LP1+ watermarks w/ multiple pipes */
-+	if (level > 0 && num_pipes_active > 1)
-+		return 64;
-+
-+	/* otherwise just report max that registers can hold */
-+	if (INTEL_INFO(dev)->gen >= 7)
-+		return level == 0 ? 63 : 255;
-+	else
-+		return level == 0 ? 31 : 63;
-+}
-+
-+/* Calculate the maximum FBC watermark */
-+static unsigned int ilk_fbc_wm_max(void)
-+{
-+	/* max that registers can hold */
-+	return 15;
-+}
-+
-+static void ilk_wm_max(struct drm_device *dev,
-+		       int level,
-+		       unsigned int num_pipes_active,
-+		       bool sprite_enabled,
-+		       enum intel_ddb_partitioning ddb_partitioning,
-+		       struct hsw_wm_maximums *max)
-+{
-+	max->pri = ilk_plane_wm_max(dev, level, num_pipes_active,
-+				    sprite_enabled, ddb_partitioning, false);
-+	max->spr = ilk_plane_wm_max(dev, level, num_pipes_active,
-+				    sprite_enabled, ddb_partitioning, true);
-+	max->cur = ilk_cursor_wm_max(dev, level, num_pipes_active);
-+	max->fbc = ilk_fbc_wm_max();
-+}
-+
- static bool ilk_check_wm(int level,
- 			 const struct hsw_wm_maximums *max,
- 			 struct intel_wm_level *result)
-@@ -2555,18 +2653,15 @@ static void hsw_compute_wm_parameters(struct drm_device *dev,
- 			sprites_enabled++;
- 	}
- 
--	if (pipes_active > 1) {
--		lp_max_1_2->pri = lp_max_5_6->pri = sprites_enabled ? 128 : 256;
--		lp_max_1_2->spr = lp_max_5_6->spr = 128;
--		lp_max_1_2->cur = lp_max_5_6->cur = 64;
--	} else {
--		lp_max_1_2->pri = sprites_enabled ? 384 : 768;
--		lp_max_5_6->pri = sprites_enabled ? 128 : 768;
--		lp_max_1_2->spr = 384;
--		lp_max_5_6->spr = 640;
--		lp_max_1_2->cur = lp_max_5_6->cur = 255;
--	}
--	lp_max_1_2->fbc = lp_max_5_6->fbc = 15;
-+	ilk_wm_max(dev, 1, pipes_active, sprites_enabled,
-+		   INTEL_DDB_PART_1_2, lp_max_1_2);
-+
-+	/* 5/6 split only in single pipe config on IVB+ */
-+	if (INTEL_INFO(dev)->gen >= 7 && pipes_active <= 1)
-+		ilk_wm_max(dev, 1, pipes_active, sprites_enabled,
-+			   INTEL_DDB_PART_5_6, lp_max_5_6);
-+	else
-+		*lp_max_5_6 = *lp_max_1_2;
- }
- 
- static void hsw_compute_wm_results(struct drm_device *dev,
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0634-drm-i915-Pull-some-watermarks-state-into-a-separate-.patch b/patches.baytrail/0634-drm-i915-Pull-some-watermarks-state-into-a-separate-.patch
deleted file mode 100644
index 48515f5ffe55a..0000000000000
--- a/patches.baytrail/0634-drm-i915-Pull-some-watermarks-state-into-a-separate-.patch
+++ /dev/null
@@ -1,158 +0,0 @@
-From 597fa348a3b9cfd91e27b6dde4ac40ea4a01fde7 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Wed, 7 Aug 2013 13:29:12 +0300
-Subject: drm/i915: Pull some watermarks state into a separate structure
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-There is a bunch of global state that needs to be considered when
-checking watermarks for validity. Move most of that to a new
-structure intel_wm_config, to avoid having to pass around so
-many variables.
-
-One notable thing left out is the DDB partitioning information,
-since we often anyway need to check the same watermarks against
-both 1/2 and 5/6 DDB partitioning layouts.
-
-v2: s/pipes_active/num_pipes_active
-
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 240264f49edbe02eb96b472ae1c518cc413f9d01)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 48 +++++++++++++++++++++--------------------
- 1 file changed, 25 insertions(+), 23 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 5daa32a4e864..9d087be556ff 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2188,6 +2188,14 @@ struct hsw_wm_values {
- 	bool enable_fbc_wm;
- };
- 
-+/* used in computing the new watermarks state */
-+struct intel_wm_config {
-+	unsigned int num_pipes_active;
-+	bool sprites_enabled;
-+	bool sprites_scaled;
-+	bool fbc_wm_enabled;
-+};
-+
- /*
-  * For both WM_PIPE and WM_LP.
-  * mem_value must be in 0.1us units.
-@@ -2281,8 +2289,7 @@ static unsigned int ilk_display_fifo_size(const struct drm_device *dev)
- /* Calculate the maximum primary/sprite plane watermark */
- static unsigned int ilk_plane_wm_max(const struct drm_device *dev,
- 				     int level,
--				     unsigned int num_pipes_active,
--				     bool sprite_enabled,
-+				     const struct intel_wm_config *config,
- 				     enum intel_ddb_partitioning ddb_partitioning,
- 				     bool is_sprite)
- {
-@@ -2290,11 +2297,11 @@ static unsigned int ilk_plane_wm_max(const struct drm_device *dev,
- 	unsigned int max;
- 
- 	/* if sprites aren't enabled, sprites get nothing */
--	if (is_sprite && !sprite_enabled)
-+	if (is_sprite && !config->sprites_enabled)
- 		return 0;
- 
- 	/* HSW allows LP1+ watermarks even with multiple pipes */
--	if (level == 0 || num_pipes_active > 1) {
-+	if (level == 0 || config->num_pipes_active > 1) {
- 		fifo_size /= INTEL_INFO(dev)->num_pipes;
- 
- 		/*
-@@ -2306,7 +2313,7 @@ static unsigned int ilk_plane_wm_max(const struct drm_device *dev,
- 			fifo_size /= 2;
- 	}
- 
--	if (sprite_enabled) {
-+	if (config->sprites_enabled) {
- 		/* level 0 is always calculated with 1:1 split */
- 		if (level > 0 && ddb_partitioning == INTEL_DDB_PART_5_6) {
- 			if (is_sprite)
-@@ -2333,10 +2340,11 @@ static unsigned int ilk_plane_wm_max(const struct drm_device *dev,
- 
- /* Calculate the maximum cursor plane watermark */
- static unsigned int ilk_cursor_wm_max(const struct drm_device *dev,
--				      int level, unsigned int num_pipes_active)
-+				      int level,
-+				      const struct intel_wm_config *config)
- {
- 	/* HSW LP1+ watermarks w/ multiple pipes */
--	if (level > 0 && num_pipes_active > 1)
-+	if (level > 0 && config->num_pipes_active > 1)
- 		return 64;
- 
- 	/* otherwise just report max that registers can hold */
-@@ -2355,16 +2363,13 @@ static unsigned int ilk_fbc_wm_max(void)
- 
- static void ilk_wm_max(struct drm_device *dev,
- 		       int level,
--		       unsigned int num_pipes_active,
--		       bool sprite_enabled,
-+		       const struct intel_wm_config *config,
- 		       enum intel_ddb_partitioning ddb_partitioning,
- 		       struct hsw_wm_maximums *max)
- {
--	max->pri = ilk_plane_wm_max(dev, level, num_pipes_active,
--				    sprite_enabled, ddb_partitioning, false);
--	max->spr = ilk_plane_wm_max(dev, level, num_pipes_active,
--				    sprite_enabled, ddb_partitioning, true);
--	max->cur = ilk_cursor_wm_max(dev, level, num_pipes_active);
-+	max->pri = ilk_plane_wm_max(dev, level, config, ddb_partitioning, false);
-+	max->spr = ilk_plane_wm_max(dev, level, config, ddb_partitioning, true);
-+	max->cur = ilk_cursor_wm_max(dev, level, config);
- 	max->fbc = ilk_fbc_wm_max();
- }
- 
-@@ -2614,7 +2619,7 @@ static void hsw_compute_wm_parameters(struct drm_device *dev,
- 	struct drm_crtc *crtc;
- 	struct drm_plane *plane;
- 	enum pipe pipe;
--	int pipes_active = 0, sprites_enabled = 0;
-+	struct intel_wm_config config = {};
- 
- 	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
- 		struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
-@@ -2627,7 +2632,7 @@ static void hsw_compute_wm_parameters(struct drm_device *dev,
- 		if (!p->active)
- 			continue;
- 
--		pipes_active++;
-+		config.num_pipes_active++;
- 
- 		p->pipe_htotal = intel_crtc->config.adjusted_mode.htotal;
- 		p->pixel_rate = ilk_pipe_pixel_rate(dev, crtc);
-@@ -2649,17 +2654,14 @@ static void hsw_compute_wm_parameters(struct drm_device *dev,
- 		p->spr_bytes_per_pixel = intel_plane->wm.bytes_per_pixel;
- 		p->spr_horiz_pixels = intel_plane->wm.horiz_pixels;
- 
--		if (p->sprite_enabled)
--			sprites_enabled++;
-+		config.sprites_enabled |= p->sprite_enabled;
- 	}
- 
--	ilk_wm_max(dev, 1, pipes_active, sprites_enabled,
--		   INTEL_DDB_PART_1_2, lp_max_1_2);
-+	ilk_wm_max(dev, 1, &config, INTEL_DDB_PART_1_2, lp_max_1_2);
- 
- 	/* 5/6 split only in single pipe config on IVB+ */
--	if (INTEL_INFO(dev)->gen >= 7 && pipes_active <= 1)
--		ilk_wm_max(dev, 1, pipes_active, sprites_enabled,
--			   INTEL_DDB_PART_5_6, lp_max_5_6);
-+	if (INTEL_INFO(dev)->gen >= 7 && config.num_pipes_active <= 1)
-+		ilk_wm_max(dev, 1, &config, INTEL_DDB_PART_5_6, lp_max_5_6);
- 	else
- 		*lp_max_5_6 = *lp_max_1_2;
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0635-drm-i915-Split-plane-watermark-parameters-into-a-sep.patch b/patches.baytrail/0635-drm-i915-Split-plane-watermark-parameters-into-a-sep.patch
deleted file mode 100644
index 154fef1efa934..0000000000000
--- a/patches.baytrail/0635-drm-i915-Split-plane-watermark-parameters-into-a-sep.patch
+++ /dev/null
@@ -1,198 +0,0 @@
-From d3f4fbc6a1e2c82b0ff410f3c2484e379a358735 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Wed, 7 Aug 2013 13:29:50 +0300
-Subject: drm/i915: Split plane watermark parameters into a separate struct
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Give a name to the plane watermark related data we have currently
-stored under intel_plane->wm.
-
-We also observe that this data is more or less the same that we have
-in the hsw_pipe_wm_parameters structure, so use it there as well.
-
-v2: Make pahole happier
-
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit c35426d2bc25b242ee2a9a7a1d62634be1e86bb0)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_drv.h | 14 +++++-----
- drivers/gpu/drm/i915/intel_pm.c  | 57 +++++++++++++++++++---------------------
- 2 files changed, 35 insertions(+), 36 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index 7df662bab280..3ea8e5fe4407 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -331,6 +331,13 @@ struct intel_crtc {
- 	bool pch_fifo_underrun_disabled;
- };
- 
-+struct intel_plane_wm_parameters {
-+	uint32_t horiz_pixels;
-+	uint8_t bytes_per_pixel;
-+	bool enabled;
-+	bool scaled;
-+};
-+
- struct intel_plane {
- 	struct drm_plane base;
- 	int plane;
-@@ -349,12 +356,7 @@ struct intel_plane {
- 	 * as the other pieces of the struct may not reflect the values we want
- 	 * for the watermark calculations. Currently only Haswell uses this.
- 	 */
--	struct {
--		bool enabled;
--		bool scaled;
--		uint8_t bytes_per_pixel;
--		uint32_t horiz_pixels;
--	} wm;
-+	struct intel_plane_wm_parameters wm;
- 
- 	void (*update_plane)(struct drm_plane *plane,
- 			     struct drm_framebuffer *fb,
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 9d087be556ff..af030e815f79 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2162,15 +2162,11 @@ static uint32_t ilk_wm_fbc(uint32_t pri_val, uint32_t horiz_pixels,
- 
- struct hsw_pipe_wm_parameters {
- 	bool active;
--	bool sprite_enabled;
--	uint8_t pri_bytes_per_pixel;
--	uint8_t spr_bytes_per_pixel;
--	uint8_t cur_bytes_per_pixel;
--	uint32_t pri_horiz_pixels;
--	uint32_t spr_horiz_pixels;
--	uint32_t cur_horiz_pixels;
- 	uint32_t pipe_htotal;
- 	uint32_t pixel_rate;
-+	struct intel_plane_wm_parameters pri;
-+	struct intel_plane_wm_parameters spr;
-+	struct intel_plane_wm_parameters cur;
- };
- 
- struct hsw_wm_maximums {
-@@ -2206,12 +2202,11 @@ static uint32_t ilk_compute_pri_wm(struct hsw_pipe_wm_parameters *params,
- {
- 	uint32_t method1, method2;
- 
--	/* TODO: for now, assume the primary plane is always enabled. */
--	if (!params->active)
-+	if (!params->active || !params->pri.enabled)
- 		return 0;
- 
- 	method1 = ilk_wm_method1(params->pixel_rate,
--				 params->pri_bytes_per_pixel,
-+				 params->pri.bytes_per_pixel,
- 				 mem_value);
- 
- 	if (!is_lp)
-@@ -2219,8 +2214,8 @@ static uint32_t ilk_compute_pri_wm(struct hsw_pipe_wm_parameters *params,
- 
- 	method2 = ilk_wm_method2(params->pixel_rate,
- 				 params->pipe_htotal,
--				 params->pri_horiz_pixels,
--				 params->pri_bytes_per_pixel,
-+				 params->pri.horiz_pixels,
-+				 params->pri.bytes_per_pixel,
- 				 mem_value);
- 
- 	return min(method1, method2);
-@@ -2235,16 +2230,16 @@ static uint32_t ilk_compute_spr_wm(struct hsw_pipe_wm_parameters *params,
- {
- 	uint32_t method1, method2;
- 
--	if (!params->active || !params->sprite_enabled)
-+	if (!params->active || !params->spr.enabled)
- 		return 0;
- 
- 	method1 = ilk_wm_method1(params->pixel_rate,
--				 params->spr_bytes_per_pixel,
-+				 params->spr.bytes_per_pixel,
- 				 mem_value);
- 	method2 = ilk_wm_method2(params->pixel_rate,
- 				 params->pipe_htotal,
--				 params->spr_horiz_pixels,
--				 params->spr_bytes_per_pixel,
-+				 params->spr.horiz_pixels,
-+				 params->spr.bytes_per_pixel,
- 				 mem_value);
- 	return min(method1, method2);
- }
-@@ -2256,13 +2251,13 @@ static uint32_t ilk_compute_spr_wm(struct hsw_pipe_wm_parameters *params,
- static uint32_t ilk_compute_cur_wm(struct hsw_pipe_wm_parameters *params,
- 				   uint32_t mem_value)
- {
--	if (!params->active)
-+	if (!params->active || !params->cur.enabled)
- 		return 0;
- 
- 	return ilk_wm_method2(params->pixel_rate,
- 			      params->pipe_htotal,
--			      params->cur_horiz_pixels,
--			      params->cur_bytes_per_pixel,
-+			      params->cur.horiz_pixels,
-+			      params->cur.bytes_per_pixel,
- 			      mem_value);
- }
- 
-@@ -2270,12 +2265,12 @@ static uint32_t ilk_compute_cur_wm(struct hsw_pipe_wm_parameters *params,
- static uint32_t ilk_compute_fbc_wm(struct hsw_pipe_wm_parameters *params,
- 				   uint32_t pri_val)
- {
--	if (!params->active)
-+	if (!params->active || !params->pri.enabled)
- 		return 0;
- 
- 	return ilk_wm_fbc(pri_val,
--			  params->pri_horiz_pixels,
--			  params->pri_bytes_per_pixel);
-+			  params->pri.horiz_pixels,
-+			  params->pri.bytes_per_pixel);
- }
- 
- static unsigned int ilk_display_fifo_size(const struct drm_device *dev)
-@@ -2636,11 +2631,14 @@ static void hsw_compute_wm_parameters(struct drm_device *dev,
- 
- 		p->pipe_htotal = intel_crtc->config.adjusted_mode.htotal;
- 		p->pixel_rate = ilk_pipe_pixel_rate(dev, crtc);
--		p->pri_bytes_per_pixel = crtc->fb->bits_per_pixel / 8;
--		p->cur_bytes_per_pixel = 4;
--		p->pri_horiz_pixels =
-+		p->pri.bytes_per_pixel = crtc->fb->bits_per_pixel / 8;
-+		p->cur.bytes_per_pixel = 4;
-+		p->pri.horiz_pixels =
- 			intel_crtc->config.requested_mode.hdisplay;
--		p->cur_horiz_pixels = 64;
-+		p->cur.horiz_pixels = 64;
-+		/* TODO: for now, assume primary and cursor planes are always enabled. */
-+		p->pri.enabled = true;
-+		p->cur.enabled = true;
- 	}
- 
- 	list_for_each_entry(plane, &dev->mode_config.plane_list, head) {
-@@ -2650,11 +2648,10 @@ static void hsw_compute_wm_parameters(struct drm_device *dev,
- 		pipe = intel_plane->pipe;
- 		p = &params[pipe];
- 
--		p->sprite_enabled = intel_plane->wm.enabled;
--		p->spr_bytes_per_pixel = intel_plane->wm.bytes_per_pixel;
--		p->spr_horiz_pixels = intel_plane->wm.horiz_pixels;
-+		p->spr = intel_plane->wm;
- 
--		config.sprites_enabled |= p->sprite_enabled;
-+		config.sprites_enabled |= p->spr.enabled;
-+		config.sprites_scaled |= p->spr.scaled;
- 	}
- 
- 	ilk_wm_max(dev, 1, &config, INTEL_DDB_PART_1_2, lp_max_1_2);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0636-drm-i915-Pass-crtc-to-our-update-disable_plane-hooks.patch b/patches.baytrail/0636-drm-i915-Pass-crtc-to-our-update-disable_plane-hooks.patch
deleted file mode 100644
index 3c6b4c4dd93c1..0000000000000
--- a/patches.baytrail/0636-drm-i915-Pass-crtc-to-our-update-disable_plane-hooks.patch
+++ /dev/null
@@ -1,129 +0,0 @@
-From 1cd47328d11a8251ba3f835299d8ffff49975c5b Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Tue, 6 Aug 2013 22:24:09 +0300
-Subject: drm/i915: Pass crtc to our update/disable_plane hooks
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-We're going to want to know which CRTC we're dealing with, so pass it
-down to the update/disable_plane hooks.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit b39d53f624d50d1588933e0ab17f19a5f2da5d94)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_drv.h    |  4 +++-
- drivers/gpu/drm/i915/intel_sprite.c | 21 ++++++++++++---------
- 2 files changed, 15 insertions(+), 10 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index 3ea8e5fe4407..da394f354453 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -359,13 +359,15 @@ struct intel_plane {
- 	struct intel_plane_wm_parameters wm;
- 
- 	void (*update_plane)(struct drm_plane *plane,
-+			     struct drm_crtc *crtc,
- 			     struct drm_framebuffer *fb,
- 			     struct drm_i915_gem_object *obj,
- 			     int crtc_x, int crtc_y,
- 			     unsigned int crtc_w, unsigned int crtc_h,
- 			     uint32_t x, uint32_t y,
- 			     uint32_t src_w, uint32_t src_h);
--	void (*disable_plane)(struct drm_plane *plane);
-+	void (*disable_plane)(struct drm_plane *plane,
-+			      struct drm_crtc *crtc);
- 	int (*update_colorkey)(struct drm_plane *plane,
- 			       struct drm_intel_sprite_colorkey *key);
- 	void (*get_colorkey)(struct drm_plane *plane,
-diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
-index 5a36afb6ea03..d4e0592e3389 100644
---- a/drivers/gpu/drm/i915/intel_sprite.c
-+++ b/drivers/gpu/drm/i915/intel_sprite.c
-@@ -38,7 +38,8 @@
- #include "i915_drv.h"
- 
- static void
--vlv_update_plane(struct drm_plane *dplane, struct drm_framebuffer *fb,
-+vlv_update_plane(struct drm_plane *dplane, struct drm_crtc *crtc,
-+		 struct drm_framebuffer *fb,
- 		 struct drm_i915_gem_object *obj, int crtc_x, int crtc_y,
- 		 unsigned int crtc_w, unsigned int crtc_h,
- 		 uint32_t x, uint32_t y,
-@@ -140,7 +141,7 @@ vlv_update_plane(struct drm_plane *dplane, struct drm_framebuffer *fb,
- }
- 
- static void
--vlv_disable_plane(struct drm_plane *dplane)
-+vlv_disable_plane(struct drm_plane *dplane, struct drm_crtc *crtc)
- {
- 	struct drm_device *dev = dplane->dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
-@@ -207,7 +208,8 @@ vlv_get_colorkey(struct drm_plane *dplane,
- }
- 
- static void
--ivb_update_plane(struct drm_plane *plane, struct drm_framebuffer *fb,
-+ivb_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
-+		 struct drm_framebuffer *fb,
- 		 struct drm_i915_gem_object *obj, int crtc_x, int crtc_y,
- 		 unsigned int crtc_w, unsigned int crtc_h,
- 		 uint32_t x, uint32_t y,
-@@ -320,7 +322,7 @@ ivb_update_plane(struct drm_plane *plane, struct drm_framebuffer *fb,
- }
- 
- static void
--ivb_disable_plane(struct drm_plane *plane)
-+ivb_disable_plane(struct drm_plane *plane, struct drm_crtc *crtc)
- {
- 	struct drm_device *dev = plane->dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
-@@ -400,7 +402,8 @@ ivb_get_colorkey(struct drm_plane *plane, struct drm_intel_sprite_colorkey *key)
- }
- 
- static void
--ilk_update_plane(struct drm_plane *plane, struct drm_framebuffer *fb,
-+ilk_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
-+		 struct drm_framebuffer *fb,
- 		 struct drm_i915_gem_object *obj, int crtc_x, int crtc_y,
- 		 unsigned int crtc_w, unsigned int crtc_h,
- 		 uint32_t x, uint32_t y,
-@@ -488,7 +491,7 @@ ilk_update_plane(struct drm_plane *plane, struct drm_framebuffer *fb,
- }
- 
- static void
--ilk_disable_plane(struct drm_plane *plane)
-+ilk_disable_plane(struct drm_plane *plane, struct drm_crtc *crtc)
- {
- 	struct drm_device *dev = plane->dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
-@@ -823,11 +826,11 @@ intel_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
- 		intel_enable_primary(crtc);
- 
- 	if (visible)
--		intel_plane->update_plane(plane, fb, obj,
-+		intel_plane->update_plane(plane, crtc, fb, obj,
- 					  crtc_x, crtc_y, crtc_w, crtc_h,
- 					  src_x, src_y, src_w, src_h);
- 	else
--		intel_plane->disable_plane(plane);
-+		intel_plane->disable_plane(plane, crtc);
- 
- 	if (disable_primary)
- 		intel_disable_primary(crtc);
-@@ -862,7 +865,7 @@ intel_disable_plane(struct drm_plane *plane)
- 
- 	if (plane->crtc)
- 		intel_enable_primary(plane->crtc);
--	intel_plane->disable_plane(plane);
-+	intel_plane->disable_plane(plane, plane->crtc);
- 
- 	if (!intel_plane->obj)
- 		goto out;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0637-drm-i915-Don-t-try-to-disable-plane-if-it-s-already-.patch b/patches.baytrail/0637-drm-i915-Don-t-try-to-disable-plane-if-it-s-already-.patch
deleted file mode 100644
index 3eb0e70885174..0000000000000
--- a/patches.baytrail/0637-drm-i915-Don-t-try-to-disable-plane-if-it-s-already-.patch
+++ /dev/null
@@ -1,47 +0,0 @@
-From 01a08550189848bcad9464822a2737ea3b9ce325 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Wed, 7 Aug 2013 13:30:23 +0300
-Subject: drm/i915: Don't try to disable plane if it's already disabled
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Check plane->fb in intel_disable_plane() to determine if the plane
-is already disabled.
-
-If the plane has an fb, then it must also have a crtc, so we can drop
-the plane->crtc check and just call intel_enable_primary() directly.
-
-v2: WARN and bail if the plane doesn't have a crtc when it should
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 88a94a58a07267d979cc168c3e511b99f4164951)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_sprite.c | 9 +++++++--
- 1 file changed, 7 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
-index d4e0592e3389..0a174d7e5854 100644
---- a/drivers/gpu/drm/i915/intel_sprite.c
-+++ b/drivers/gpu/drm/i915/intel_sprite.c
-@@ -863,8 +863,13 @@ intel_disable_plane(struct drm_plane *plane)
- 	struct intel_plane *intel_plane = to_intel_plane(plane);
- 	int ret = 0;
- 
--	if (plane->crtc)
--		intel_enable_primary(plane->crtc);
-+	if (!plane->fb)
-+		return 0;
-+
-+	if (WARN_ON(!plane->crtc))
-+		return -EINVAL;
-+
-+	intel_enable_primary(plane->crtc);
- 	intel_plane->disable_plane(plane, plane->crtc);
- 
- 	if (!intel_plane->obj)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0638-drm-i915-Pass-plane-and-crtc-to-intel_update_sprite_.patch b/patches.baytrail/0638-drm-i915-Pass-plane-and-crtc-to-intel_update_sprite_.patch
deleted file mode 100644
index 670d7116f0460..0000000000000
--- a/patches.baytrail/0638-drm-i915-Pass-plane-and-crtc-to-intel_update_sprite_.patch
+++ /dev/null
@@ -1,169 +0,0 @@
-From dd4fa098eccdeff148695ac550df7507cbdd44d6 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Tue, 6 Aug 2013 22:24:11 +0300
-Subject: drm/i915: Pass plane and crtc to intel_update_sprite_watermarks
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-We're going to want to know the crtc in the watermark code to avoid
-doing more work than we have to. We should also pass the plane we're
-disabling so that we know where to stick our watermark parameters
-without having to go look the plane up.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit adf3d35e4aced032f0449c6d69b0a90fea14692f)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h     |  3 ++-
- drivers/gpu/drm/i915/intel_drv.h    |  3 ++-
- drivers/gpu/drm/i915/intel_pm.c     | 34 ++++++++++++++++------------------
- drivers/gpu/drm/i915/intel_sprite.c |  8 ++++----
- 4 files changed, 24 insertions(+), 24 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 3a435fede3c4..7863c8ac867c 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -359,7 +359,8 @@ struct drm_i915_display_funcs {
- 			  struct dpll *match_clock,
- 			  struct dpll *best_clock);
- 	void (*update_wm)(struct drm_device *dev);
--	void (*update_sprite_wm)(struct drm_device *dev, int pipe,
-+	void (*update_sprite_wm)(struct drm_plane *plane,
-+				 struct drm_crtc *crtc,
- 				 uint32_t sprite_width, int pixel_size,
- 				 bool enable, bool scaled);
- 	void (*modeset_global_resources)(struct drm_device *dev);
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index da394f354453..caf8b8dfe17a 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -716,7 +716,8 @@ extern void intel_ddi_init(struct drm_device *dev, enum port port);
- 
- /* For use by IVB LP watermark workaround in intel_sprite.c */
- extern void intel_update_watermarks(struct drm_device *dev);
--extern void intel_update_sprite_watermarks(struct drm_device *dev, int pipe,
-+extern void intel_update_sprite_watermarks(struct drm_plane *plane,
-+					   struct drm_crtc *crtc,
- 					   uint32_t sprite_width, int pixel_size,
- 					   bool enabled, bool scaled);
- 
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index af030e815f79..96234c6d982d 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2866,25 +2866,19 @@ static void haswell_update_wm(struct drm_device *dev)
- 	hsw_write_wm_values(dev_priv, best_results, partitioning);
- }
- 
--static void haswell_update_sprite_wm(struct drm_device *dev, int pipe,
-+static void haswell_update_sprite_wm(struct drm_plane *plane,
-+				     struct drm_crtc *crtc,
- 				     uint32_t sprite_width, int pixel_size,
- 				     bool enabled, bool scaled)
- {
--	struct drm_plane *plane;
--
--	list_for_each_entry(plane, &dev->mode_config.plane_list, head) {
--		struct intel_plane *intel_plane = to_intel_plane(plane);
-+	struct intel_plane *intel_plane = to_intel_plane(plane);
- 
--		if (intel_plane->pipe == pipe) {
--			intel_plane->wm.enabled = enabled;
--			intel_plane->wm.scaled = scaled;
--			intel_plane->wm.horiz_pixels = sprite_width;
--			intel_plane->wm.bytes_per_pixel = pixel_size;
--			break;
--		}
--	}
-+	intel_plane->wm.enabled = enabled;
-+	intel_plane->wm.scaled = scaled;
-+	intel_plane->wm.horiz_pixels = sprite_width;
-+	intel_plane->wm.bytes_per_pixel = pixel_size;
- 
--	haswell_update_wm(dev);
-+	haswell_update_wm(plane->dev);
- }
- 
- static bool
-@@ -2963,11 +2957,14 @@ sandybridge_compute_sprite_srwm(struct drm_device *dev, int plane,
- 	return *sprite_wm > 0x3ff ? false : true;
- }
- 
--static void sandybridge_update_sprite_wm(struct drm_device *dev, int pipe,
-+static void sandybridge_update_sprite_wm(struct drm_plane *plane,
-+					 struct drm_crtc *crtc,
- 					 uint32_t sprite_width, int pixel_size,
- 					 bool enabled, bool scaled)
- {
-+	struct drm_device *dev = plane->dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
-+	int pipe = to_intel_plane(plane)->pipe;
- 	int latency = dev_priv->wm.spr_latency[0] * 100;	/* In unit 0.1us */
- 	u32 val;
- 	int sprite_wm, reg;
-@@ -3086,14 +3083,15 @@ void intel_update_watermarks(struct drm_device *dev)
- 		dev_priv->display.update_wm(dev);
- }
- 
--void intel_update_sprite_watermarks(struct drm_device *dev, int pipe,
-+void intel_update_sprite_watermarks(struct drm_plane *plane,
-+				    struct drm_crtc *crtc,
- 				    uint32_t sprite_width, int pixel_size,
- 				    bool enabled, bool scaled)
- {
--	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct drm_i915_private *dev_priv = plane->dev->dev_private;
- 
- 	if (dev_priv->display.update_sprite_wm)
--		dev_priv->display.update_sprite_wm(dev, pipe, sprite_width,
-+		dev_priv->display.update_sprite_wm(plane, crtc, sprite_width,
- 						   pixel_size, enabled, scaled);
- }
- 
-diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
-index 0a174d7e5854..05742f7d7006 100644
---- a/drivers/gpu/drm/i915/intel_sprite.c
-+++ b/drivers/gpu/drm/i915/intel_sprite.c
-@@ -109,7 +109,7 @@ vlv_update_plane(struct drm_plane *dplane, struct drm_crtc *crtc,
- 
- 	sprctl |= SP_ENABLE;
- 
--	intel_update_sprite_watermarks(dev, pipe, src_w, pixel_size, true,
-+	intel_update_sprite_watermarks(dplane, crtc, src_w, pixel_size, true,
- 				       src_w != crtc_w || src_h != crtc_h);
- 
- 	/* Sizes are 0 based */
-@@ -265,7 +265,7 @@ ivb_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
- 	if (IS_HASWELL(dev))
- 		sprctl |= SPRITE_PIPE_CSC_ENABLE;
- 
--	intel_update_sprite_watermarks(dev, pipe, src_w, pixel_size, true,
-+	intel_update_sprite_watermarks(plane, crtc, src_w, pixel_size, true,
- 				       src_w != crtc_w || src_h != crtc_h);
- 
- 	/* Sizes are 0 based */
-@@ -340,7 +340,7 @@ ivb_disable_plane(struct drm_plane *plane, struct drm_crtc *crtc)
- 
- 	dev_priv->sprite_scaling_enabled &= ~(1 << pipe);
- 
--	intel_update_sprite_watermarks(dev, pipe, 0, 0, false, false);
-+	intel_update_sprite_watermarks(plane, crtc, 0, 0, false, false);
- 
- 	/* potentially re-enable LP watermarks */
- 	if (scaling_was_enabled && !dev_priv->sprite_scaling_enabled)
-@@ -455,7 +455,7 @@ ilk_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
- 		dvscntr |= DVS_TRICKLE_FEED_DISABLE; /* must disable */
- 	dvscntr |= DVS_ENABLE;
- 
--	intel_update_sprite_watermarks(dev, pipe, src_w, pixel_size, true,
-+	intel_update_sprite_watermarks(plane, crtc, src_w, pixel_size, true,
- 				       src_w != crtc_w || src_h != crtc_h);
- 
- 	/* Sizes are 0 based */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0639-drm-i915-Always-call-intel_update_sprite_watermarks-.patch b/patches.baytrail/0639-drm-i915-Always-call-intel_update_sprite_watermarks-.patch
deleted file mode 100644
index b7d87071bdd72..0000000000000
--- a/patches.baytrail/0639-drm-i915-Always-call-intel_update_sprite_watermarks-.patch
+++ /dev/null
@@ -1,46 +0,0 @@
-From 09276fb9b6f222f6b47a216e0f2bb4676ea921f9 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Tue, 6 Aug 2013 22:24:12 +0300
-Subject: drm/i915: Always call intel_update_sprite_watermarks() when disabling
- a plane
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-ILK and VLV codepaths didn't update sprite watermarks when disabling a
-sprite. Make them do that.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit a95fd8cae06dadf4a3eb88c9c130e86c5b0c1723)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_sprite.c | 4 ++++
- 1 file changed, 4 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
-index 05742f7d7006..78b621cdd108 100644
---- a/drivers/gpu/drm/i915/intel_sprite.c
-+++ b/drivers/gpu/drm/i915/intel_sprite.c
-@@ -154,6 +154,8 @@ vlv_disable_plane(struct drm_plane *dplane, struct drm_crtc *crtc)
- 	/* Activate double buffered register update */
- 	I915_MODIFY_DISPBASE(SPSURF(pipe, plane), 0);
- 	POSTING_READ(SPSURF(pipe, plane));
-+
-+	intel_update_sprite_watermarks(dplane, crtc, 0, 0, false, false);
- }
- 
- static int
-@@ -504,6 +506,8 @@ ilk_disable_plane(struct drm_plane *plane, struct drm_crtc *crtc)
- 	/* Flush double buffered register updates */
- 	I915_MODIFY_DISPBASE(DVSSURF(pipe), 0);
- 	POSTING_READ(DVSSURF(pipe));
-+
-+	intel_update_sprite_watermarks(plane, crtc, 0, 0, false, false);
- }
- 
- static void
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0640-drm-i915-List-objects-allocated-from-stolen-memory-i.patch b/patches.baytrail/0640-drm-i915-List-objects-allocated-from-stolen-memory-i.patch
deleted file mode 100644
index 24579f7411e47..0000000000000
--- a/patches.baytrail/0640-drm-i915-List-objects-allocated-from-stolen-memory-i.patch
+++ /dev/null
@@ -1,107 +0,0 @@
-From b9bcc1d5c871705fc6a6f2a68424946f32cc5117 Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Wed, 7 Aug 2013 18:30:54 +0100
-Subject: drm/i915: List objects allocated from stolen memory in debugfs
-
-I was curious as to what objects were currently allocated from stolen
-memory, and so exported it from debugfs.
-
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 6d2b888569d366beb4be72cacfde41adee2c25e1)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_debugfs.c | 63 +++++++++++++++++++++++++++++++++++++
- 1 file changed, 63 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
-index a1f4c91fb112..1a87cc9fd899 100644
---- a/drivers/gpu/drm/i915/i915_debugfs.c
-+++ b/drivers/gpu/drm/i915/i915_debugfs.c
-@@ -30,6 +30,7 @@
- #include <linux/debugfs.h>
- #include <linux/slab.h>
- #include <linux/export.h>
-+#include <linux/list_sort.h>
- #include <drm/drmP.h>
- #include "intel_drv.h"
- #include "intel_ringbuffer.h"
-@@ -188,6 +189,67 @@ static int i915_gem_object_list_info(struct seq_file *m, void *data)
- 	return 0;
- }
- 
-+static int obj_rank_by_stolen(void *priv,
-+			      struct list_head *A, struct list_head *B)
-+{
-+	struct drm_i915_gem_object *a =
-+		container_of(A, struct drm_i915_gem_object, exec_list);
-+	struct drm_i915_gem_object *b =
-+		container_of(B, struct drm_i915_gem_object, exec_list);
-+
-+	return a->stolen->start - b->stolen->start;
-+}
-+
-+static int i915_gem_stolen_list_info(struct seq_file *m, void *data)
-+{
-+	struct drm_info_node *node = (struct drm_info_node *) m->private;
-+	struct drm_device *dev = node->minor->dev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct drm_i915_gem_object *obj;
-+	size_t total_obj_size, total_gtt_size;
-+	LIST_HEAD(stolen);
-+	int count, ret;
-+
-+	ret = mutex_lock_interruptible(&dev->struct_mutex);
-+	if (ret)
-+		return ret;
-+
-+	total_obj_size = total_gtt_size = count = 0;
-+	list_for_each_entry(obj, &dev_priv->mm.bound_list, global_list) {
-+		if (obj->stolen == NULL)
-+			continue;
-+
-+		list_add(&obj->exec_list, &stolen);
-+
-+		total_obj_size += obj->base.size;
-+		total_gtt_size += i915_gem_obj_ggtt_size(obj);
-+		count++;
-+	}
-+	list_for_each_entry(obj, &dev_priv->mm.unbound_list, global_list) {
-+		if (obj->stolen == NULL)
-+			continue;
-+
-+		list_add(&obj->exec_list, &stolen);
-+
-+		total_obj_size += obj->base.size;
-+		count++;
-+	}
-+	list_sort(NULL, &stolen, obj_rank_by_stolen);
-+	seq_puts(m, "Stolen:\n");
-+	while (!list_empty(&stolen)) {
-+		obj = list_first_entry(&stolen, typeof(*obj), exec_list);
-+		seq_puts(m, "   ");
-+		describe_obj(m, obj);
-+		seq_putc(m, '\n');
-+		list_del_init(&obj->exec_list);
-+	}
-+	mutex_unlock(&dev->struct_mutex);
-+
-+	seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n",
-+		   count, total_obj_size, total_gtt_size);
-+	return 0;
-+}
-+
- #define count_objects(list, member) do { \
- 	list_for_each_entry(obj, list, member) { \
- 		size += i915_gem_obj_ggtt_size(obj); \
-@@ -2114,6 +2176,7 @@ static struct drm_info_list i915_debugfs_list[] = {
- 	{"i915_gem_pinned", i915_gem_gtt_info, 0, (void *) PINNED_LIST},
- 	{"i915_gem_active", i915_gem_object_list_info, 0, (void *) ACTIVE_LIST},
- 	{"i915_gem_inactive", i915_gem_object_list_info, 0, (void *) INACTIVE_LIST},
-+	{"i915_gem_stolen", i915_gem_stolen_list_info },
- 	{"i915_gem_pageflip", i915_gem_pageflip_info, 0},
- 	{"i915_gem_request", i915_gem_request_info, 0},
- 	{"i915_gem_seqno", i915_gem_seqno_info, 0},
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0641-drm-i915-Remove-stale-prototypes.patch b/patches.baytrail/0641-drm-i915-Remove-stale-prototypes.patch
deleted file mode 100644
index 9a9243e225b46..0000000000000
--- a/patches.baytrail/0641-drm-i915-Remove-stale-prototypes.patch
+++ /dev/null
@@ -1,74 +0,0 @@
-From 4e26423e203774a1791ee523143d516fdfab7d5f Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Thu, 8 Aug 2013 22:28:53 +0100
-Subject: drm/i915: Remove stale prototypes
-
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit a2367166fb200528d6fd43859e917e80ee034e16)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h  | 8 --------
- drivers/gpu/drm/i915/intel_drv.h | 2 --
- 2 files changed, 10 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 7863c8ac867c..db5492382d7c 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1677,7 +1677,6 @@ extern void intel_pm_init(struct drm_device *dev);
- extern void intel_uncore_sanitize(struct drm_device *dev);
- extern void intel_uncore_early_sanitize(struct drm_device *dev);
- extern void intel_uncore_init(struct drm_device *dev);
--extern void intel_uncore_reset(struct drm_device *dev);
- extern void intel_uncore_clear_errors(struct drm_device *dev);
- extern void intel_uncore_check_errors(struct drm_device *dev);
- 
-@@ -1843,9 +1842,6 @@ static inline bool i915_terminally_wedged(struct i915_gpu_error *error)
- 
- void i915_gem_reset(struct drm_device *dev);
- void i915_gem_clflush_object(struct drm_i915_gem_object *obj);
--int __must_check i915_gem_object_set_domain(struct drm_i915_gem_object *obj,
--					    uint32_t read_domains,
--					    uint32_t write_domain);
- int __must_check i915_gem_object_finish_gpu(struct drm_i915_gem_object *obj);
- int __must_check i915_gem_init(struct drm_device *dev);
- int __must_check i915_gem_init_hw(struct drm_device *dev);
-@@ -2034,8 +2030,6 @@ void i915_gem_object_do_bit_17_swizzle(struct drm_i915_gem_object *obj);
- void i915_gem_object_save_bit_17_swizzle(struct drm_i915_gem_object *obj);
- 
- /* i915_gem_debug.c */
--void i915_gem_dump_object(struct drm_i915_gem_object *obj, int len,
--			  const char *where, uint32_t mark);
- #if WATCH_LISTS
- int i915_verify_lists(struct drm_device *dev);
- #else
-@@ -2043,8 +2037,6 @@ int i915_verify_lists(struct drm_device *dev);
- #endif
- void i915_gem_object_check_coherency(struct drm_i915_gem_object *obj,
- 				     int handle);
--void i915_gem_dump_object(struct drm_i915_gem_object *obj, int len,
--			  const char *where, uint32_t mark);
- 
- /* i915_debugfs.c */
- int i915_debugfs_init(struct drm_minor *minor);
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index caf8b8dfe17a..d516c63fc94d 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -649,12 +649,10 @@ extern bool intel_get_load_detect_pipe(struct drm_connector *connector,
- extern void intel_release_load_detect_pipe(struct drm_connector *connector,
- 					   struct intel_load_detect_pipe *old);
- 
--extern void intelfb_restore(void);
- extern void intel_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
- 				    u16 blue, int regno);
- extern void intel_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
- 				    u16 *blue, int regno);
--extern void intel_enable_clock_gating(struct drm_device *dev);
- 
- extern int intel_pin_and_fence_fb_obj(struct drm_device *dev,
- 				      struct drm_i915_gem_object *obj,
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0642-drm-i915-Remove-i915_gem_object_check_coherency.patch b/patches.baytrail/0642-drm-i915-Remove-i915_gem_object_check_coherency.patch
deleted file mode 100644
index 147eeaab75ac3..0000000000000
--- a/patches.baytrail/0642-drm-i915-Remove-i915_gem_object_check_coherency.patch
+++ /dev/null
@@ -1,125 +0,0 @@
-From 80212281be26f4b8cd9941dca6a0526a177a9b0a Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Thu, 8 Aug 2013 22:28:54 +0100
-Subject: drm/i915: Remove i915_gem_object_check_coherency()
-
-This code was dead since:
-
-  commit 432e58edc9de1d9c3d6a7b444b3c455b8f209a7d
-  Author: Chris Wilson <chris@chris-wilson.co.uk>
-  Date:   Thu Nov 25 19:32:06 2010 +0000
-
-      drm/i915: Avoid allocation for execbuffer object list
-
-so just put it to rest for good.
-
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit ac44bfac5b591c5f9b28b43f8e8ed08e9abf7f95)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h       |  3 --
- drivers/gpu/drm/i915/i915_gem_debug.c | 69 -----------------------------------
- 2 files changed, 72 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index db5492382d7c..0be923ef08c6 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -201,7 +201,6 @@ struct intel_ddi_plls {
- #define DRIVER_MINOR		6
- #define DRIVER_PATCHLEVEL	0
- 
--#define WATCH_COHERENCY	0
- #define WATCH_LISTS	0
- #define WATCH_GTT	0
- 
-@@ -2035,8 +2034,6 @@ int i915_verify_lists(struct drm_device *dev);
- #else
- #define i915_verify_lists(dev) 0
- #endif
--void i915_gem_object_check_coherency(struct drm_i915_gem_object *obj,
--				     int handle);
- 
- /* i915_debugfs.c */
- int i915_debugfs_init(struct drm_minor *minor);
-diff --git a/drivers/gpu/drm/i915/i915_gem_debug.c b/drivers/gpu/drm/i915/i915_gem_debug.c
-index bf945a39fbb1..bcdbafc6c985 100644
---- a/drivers/gpu/drm/i915/i915_gem_debug.c
-+++ b/drivers/gpu/drm/i915/i915_gem_debug.c
-@@ -116,72 +116,3 @@ i915_verify_lists(struct drm_device *dev)
- 	return warned = err;
- }
- #endif /* WATCH_INACTIVE */
--
--#if WATCH_COHERENCY
--void
--i915_gem_object_check_coherency(struct drm_i915_gem_object *obj, int handle)
--{
--	struct drm_device *dev = obj->base.dev;
--	int page;
--	uint32_t *gtt_mapping;
--	uint32_t *backing_map = NULL;
--	int bad_count = 0;
--
--	DRM_INFO("%s: checking coherency of object %p@0x%08x (%d, %zdkb):\n",
--		 __func__, obj, obj->gtt_offset, handle,
--		 obj->size / 1024);
--
--	gtt_mapping = ioremap(dev_priv->mm.gtt_base_addr + obj->gtt_offset,
--			      obj->base.size);
--	if (gtt_mapping == NULL) {
--		DRM_ERROR("failed to map GTT space\n");
--		return;
--	}
--
--	for (page = 0; page < obj->size / PAGE_SIZE; page++) {
--		int i;
--
--		backing_map = kmap_atomic(obj->pages[page]);
--
--		if (backing_map == NULL) {
--			DRM_ERROR("failed to map backing page\n");
--			goto out;
--		}
--
--		for (i = 0; i < PAGE_SIZE / 4; i++) {
--			uint32_t cpuval = backing_map[i];
--			uint32_t gttval = readl(gtt_mapping +
--						page * 1024 + i);
--
--			if (cpuval != gttval) {
--				DRM_INFO("incoherent CPU vs GPU at 0x%08x: "
--					 "0x%08x vs 0x%08x\n",
--					 (int)(obj->gtt_offset +
--					       page * PAGE_SIZE + i * 4),
--					 cpuval, gttval);
--				if (bad_count++ >= 8) {
--					DRM_INFO("...\n");
--					goto out;
--				}
--			}
--		}
--		kunmap_atomic(backing_map);
--		backing_map = NULL;
--	}
--
-- out:
--	if (backing_map != NULL)
--		kunmap_atomic(backing_map);
--	iounmap(gtt_mapping);
--
--	/* give syslog time to catch up */
--	msleep(1);
--
--	/* Directly flush the object, since we just loaded values with the CPU
--	 * from the backing pages and we don't want to disturb the cache
--	 * management that we're trying to observe.
--	 */
--
--	i915_gem_clflush_object(obj);
--}
--#endif
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0643-drm-i915-Fix-endif-comment.patch b/patches.baytrail/0643-drm-i915-Fix-endif-comment.patch
deleted file mode 100644
index d9341e1c9c547..0000000000000
--- a/patches.baytrail/0643-drm-i915-Fix-endif-comment.patch
+++ /dev/null
@@ -1,28 +0,0 @@
-From fe0f62608afa936f281a6b73366e5b90c8404916 Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Thu, 8 Aug 2013 22:28:55 +0100
-Subject: drm/i915: Fix #endif comment
-
-Did you say OCD?
-
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit c55651b39a1fad0a6f07692971249eb54febfd73)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem_debug.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem_debug.c b/drivers/gpu/drm/i915/i915_gem_debug.c
-index bcdbafc6c985..775d506b3208 100644
---- a/drivers/gpu/drm/i915/i915_gem_debug.c
-+++ b/drivers/gpu/drm/i915/i915_gem_debug.c
-@@ -115,4 +115,4 @@ i915_verify_lists(struct drm_device *dev)
- 
- 	return warned = err;
- }
--#endif /* WATCH_INACTIVE */
-+#endif /* WATCH_LIST */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0644-drm-i915-Make-i915_hangcheck_elapsed-static.patch b/patches.baytrail/0644-drm-i915-Make-i915_hangcheck_elapsed-static.patch
deleted file mode 100644
index 4e156b8c16039..0000000000000
--- a/patches.baytrail/0644-drm-i915-Make-i915_hangcheck_elapsed-static.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From 67de679e26d2e85b2507dc41a7d292063b1697e2 Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Thu, 8 Aug 2013 22:28:56 +0100
-Subject: drm/i915: Make i915_hangcheck_elapsed() static
-
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit a658b5d20de78435a971f26d56a765fb40f88e16)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h | 1 -
- drivers/gpu/drm/i915/i915_irq.c | 2 +-
- 2 files changed, 1 insertion(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 0be923ef08c6..6141253c8fda 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1665,7 +1665,6 @@ extern void intel_console_resume(struct work_struct *work);
- 
- /* i915_irq.c */
- void i915_queue_hangcheck(struct drm_device *dev);
--void i915_hangcheck_elapsed(unsigned long data);
- void i915_handle_error(struct drm_device *dev, bool wedged);
- 
- extern void intel_irq_init(struct drm_device *dev);
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index 97f60282d397..076091e92eea 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -1915,7 +1915,7 @@ ring_stuck(struct intel_ring_buffer *ring, u32 acthd)
-  * we kick the ring. If we see no progress on three subsequent calls
-  * we assume chip is wedged and try to fix it by resetting the chip.
-  */
--void i915_hangcheck_elapsed(unsigned long data)
-+static void i915_hangcheck_elapsed(unsigned long data)
- {
- 	struct drm_device *dev = (struct drm_device *)data;
- 	drm_i915_private_t *dev_priv = dev->dev_private;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0645-drm-i915-Make-intel_encoder_dpms-static.patch b/patches.baytrail/0645-drm-i915-Make-intel_encoder_dpms-static.patch
deleted file mode 100644
index aa45dadaada99..0000000000000
--- a/patches.baytrail/0645-drm-i915-Make-intel_encoder_dpms-static.patch
+++ /dev/null
@@ -1,48 +0,0 @@
-From 41b90a64e68e108407854ee96fae00f3fb36dd69 Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Thu, 8 Aug 2013 22:28:57 +0100
-Subject: drm/i915: Make intel_encoder_dpms() static
-
-And also fix a small typo in the intel_encoder_dpms() comment.
-
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 9237329d83b04cfc7d9fc4608e9db84f32280dc4)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 4 ++--
- drivers/gpu/drm/i915/intel_drv.h     | 1 -
- 2 files changed, 2 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index a5aee8993283..109a995150f9 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -3889,10 +3889,10 @@ void intel_encoder_destroy(struct drm_encoder *encoder)
- 	kfree(intel_encoder);
- }
- 
--/* Simple dpms helper for encodres with just one connector, no cloning and only
-+/* Simple dpms helper for encoders with just one connector, no cloning and only
-  * one kind of off state. It clamps all !ON modes to fully OFF and changes the
-  * state of the entire output pipe. */
--void intel_encoder_dpms(struct intel_encoder *encoder, int mode)
-+static void intel_encoder_dpms(struct intel_encoder *encoder, int mode)
- {
- 	if (mode == DRM_MODE_DPMS_ON) {
- 		encoder->connectors_active = true;
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index d516c63fc94d..09c919658735 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -583,7 +583,6 @@ extern void intel_crtc_restore_mode(struct drm_crtc *crtc);
- extern void intel_crtc_load_lut(struct drm_crtc *crtc);
- extern void intel_crtc_update_dpms(struct drm_crtc *crtc);
- extern void intel_encoder_destroy(struct drm_encoder *encoder);
--extern void intel_encoder_dpms(struct intel_encoder *encoder, int mode);
- extern void intel_connector_dpms(struct drm_connector *, int mode);
- extern bool intel_connector_get_hw_state(struct intel_connector *connector);
- extern void intel_modeset_check_state(struct drm_device *dev);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0646-drm-i915-Remove-intel_modeset_disable.patch b/patches.baytrail/0646-drm-i915-Remove-intel_modeset_disable.patch
deleted file mode 100644
index d190dd9809c0a..0000000000000
--- a/patches.baytrail/0646-drm-i915-Remove-intel_modeset_disable.patch
+++ /dev/null
@@ -1,52 +0,0 @@
-From 6887dd8d7e46a2128312a07b5234dafa8fda7699 Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Thu, 8 Aug 2013 22:28:58 +0100
-Subject: drm/i915: Remove intel_modeset_disable()
-
-Caught by the dead code police!
-
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 1414f6c0497acc9ca73f492d1cf2a2b87bed950b)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 10 ----------
- drivers/gpu/drm/i915/intel_drv.h     |  1 -
- 2 files changed, 11 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 109a995150f9..e22728959c7b 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -3871,16 +3871,6 @@ static void intel_crtc_disable(struct drm_crtc *crtc)
- 	}
- }
- 
--void intel_modeset_disable(struct drm_device *dev)
--{
--	struct drm_crtc *crtc;
--
--	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
--		if (crtc->enabled)
--			intel_crtc_disable(crtc);
--	}
--}
--
- void intel_encoder_destroy(struct drm_encoder *encoder)
- {
- 	struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index 09c919658735..a70a0d04a0e5 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -578,7 +578,6 @@ struct intel_set_config {
- 
- extern int intel_set_mode(struct drm_crtc *crtc, struct drm_display_mode *mode,
- 			  int x, int y, struct drm_framebuffer *old_fb);
--extern void intel_modeset_disable(struct drm_device *dev);
- extern void intel_crtc_restore_mode(struct drm_crtc *crtc);
- extern void intel_crtc_load_lut(struct drm_crtc *crtc);
- extern void intel_crtc_update_dpms(struct drm_crtc *crtc);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0647-drm-i915-Make-intel_set_mode-static.patch b/patches.baytrail/0647-drm-i915-Make-intel_set_mode-static.patch
deleted file mode 100644
index c3364a9f9b9ca..0000000000000
--- a/patches.baytrail/0647-drm-i915-Make-intel_set_mode-static.patch
+++ /dev/null
@@ -1,58 +0,0 @@
-From fb66b215d891d72b13330f7abae5aff71650a532 Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Thu, 8 Aug 2013 22:28:59 +0100
-Subject: drm/i915: Make intel_set_mode() static
-
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit e7457a9a333a95e51dd77515eea326a181f968bc)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 10 +++++++---
- drivers/gpu/drm/i915/intel_drv.h     |  2 --
- 2 files changed, 7 insertions(+), 5 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index e22728959c7b..77f8ff1a4284 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -50,6 +50,10 @@ static void i9xx_crtc_clock_get(struct intel_crtc *crtc,
- static void ironlake_crtc_clock_get(struct intel_crtc *crtc,
- 				    struct intel_crtc_config *pipe_config);
- 
-+static int intel_set_mode(struct drm_crtc *crtc, struct drm_display_mode *mode,
-+			  int x, int y, struct drm_framebuffer *old_fb);
-+
-+
- typedef struct {
- 	int	min, max;
- } intel_range_t;
-@@ -8738,9 +8742,9 @@ out:
- 	return ret;
- }
- 
--int intel_set_mode(struct drm_crtc *crtc,
--		     struct drm_display_mode *mode,
--		     int x, int y, struct drm_framebuffer *fb)
-+static int intel_set_mode(struct drm_crtc *crtc,
-+			  struct drm_display_mode *mode,
-+			  int x, int y, struct drm_framebuffer *fb)
- {
- 	int ret;
- 
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index a70a0d04a0e5..01455aa8b8bb 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -576,8 +576,6 @@ struct intel_set_config {
- 	bool mode_changed;
- };
- 
--extern int intel_set_mode(struct drm_crtc *crtc, struct drm_display_mode *mode,
--			  int x, int y, struct drm_framebuffer *old_fb);
- extern void intel_crtc_restore_mode(struct drm_crtc *crtc);
- extern void intel_crtc_load_lut(struct drm_crtc *crtc);
- extern void intel_crtc_update_dpms(struct drm_crtc *crtc);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0648-drm-i915-unbreak-i915_gem_object_ggtt_unbind.patch b/patches.baytrail/0648-drm-i915-unbreak-i915_gem_object_ggtt_unbind.patch
deleted file mode 100644
index 76fa708feacee..0000000000000
--- a/patches.baytrail/0648-drm-i915-unbreak-i915_gem_object_ggtt_unbind.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From 594af4885f16dd82028d68adfa59af208d1395ee Mon Sep 17 00:00:00 2001
-From: Dan Carpenter <dan.carpenter@oracle.com>
-Date: Fri, 9 Aug 2013 12:44:11 +0300
-Subject: drm/i915: unbreak i915_gem_object_ggtt_unbind()
-
-There is an extra semi-colon here so we just leak and never unbind
-anything.
-
-This regression has been introduced in
-
-commit 07fe0b12800d4752d729d4122c01f41f80a5ba5a
-Author: Ben Widawsky <ben@bwidawsk.net>
-Date:   Wed Jul 31 17:00:10 2013 -0700
-
-    drm/i915: plumb VM into bind/unbind code
-
-Cc: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 58e73e15708856540056050ae0798c322e43af18)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index f7ab763d6d76..498ef8a7bbc7 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -2651,7 +2651,7 @@ i915_gem_object_ggtt_unbind(struct drm_i915_gem_object *obj)
- 	struct drm_i915_private *dev_priv = obj->base.dev->dev_private;
- 	struct i915_address_space *ggtt = &dev_priv->gtt.base;
- 
--	if (!i915_gem_obj_ggtt_bound(obj));
-+	if (!i915_gem_obj_ggtt_bound(obj))
- 		return 0;
- 
- 	if (obj->pin_count)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0649-drm-i915-fix-a-limit-check-in-hsw_compute_wm_results.patch b/patches.baytrail/0649-drm-i915-fix-a-limit-check-in-hsw_compute_wm_results.patch
deleted file mode 100644
index dc0a3387cec44..0000000000000
--- a/patches.baytrail/0649-drm-i915-fix-a-limit-check-in-hsw_compute_wm_results.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From 8abb0f7511ce40ed1296dbb583f2163357f1624f Mon Sep 17 00:00:00 2001
-From: Dan Carpenter <dan.carpenter@oracle.com>
-Date: Fri, 9 Aug 2013 13:07:31 +0300
-Subject: drm/i915: fix a limit check in hsw_compute_wm_results()
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The '!' here was not intended.  Since '!' has higher precedence than
-compare, it means the check is never true.
-
-This regression was introduced in
-
-commit 71fff20ff1bb790f4defe0c880e028581ffab420
-Author: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Date:   Tue Aug 6 22:24:03 2013 +0300
-
-    drm/i915: Kill fbc_enable from hsw_lp_wm_results
-
-Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 16e54061ecc81df66e80ce96b3f91ae56065ed9e)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 96234c6d982d..0f5eb217c707 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2685,7 +2685,7 @@ static void hsw_compute_wm_results(struct drm_device *dev,
- 	 * a WM level. */
- 	results->enable_fbc_wm = true;
- 	for (level = 1; level <= max_level; level++) {
--		if (!lp_results[level - 1].fbc_val > lp_maximums->fbc) {
-+		if (lp_results[level - 1].fbc_val > lp_maximums->fbc) {
- 			results->enable_fbc_wm = false;
- 			lp_results[level - 1].fbc_val = 0;
- 		}
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0650-drm-i915-expose-HDMI-connectors-on-port-C-on-BYT.patch b/patches.baytrail/0650-drm-i915-expose-HDMI-connectors-on-port-C-on-BYT.patch
deleted file mode 100644
index 9075ab3745478..0000000000000
--- a/patches.baytrail/0650-drm-i915-expose-HDMI-connectors-on-port-C-on-BYT.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From ced60c747ad2e5997adfbf2ce9a763b0ef36004c Mon Sep 17 00:00:00 2001
-From: Jesse Barnes <jbarnes@virtuousgeek.org>
-Date: Fri, 9 Aug 2013 09:34:35 -0700
-Subject: drm/i915: expose HDMI connectors on port C on BYT
-
-Ryan noticed that on his board, HDMI was wired up to port C but not
-exposed by the kernel, which had only expected DP on that port.  Fix
-that up by enumerating both ports if possible.
-
-Tested-by: "Matsumura, Ryan" <ryan.matsumura@intel.com>
-Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-[danvet: Fix up the whitespace fail. Tsk.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 6f6005a52b79c2b2e3d58d8ab63791c378ebf82c)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 9 +++++++--
- 1 file changed, 7 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 77f8ff1a4284..ee85aeab5667 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -9341,8 +9341,13 @@ static void intel_setup_outputs(struct drm_device *dev)
- 			intel_dp_init(dev, PCH_DP_D, PORT_D);
- 	} else if (IS_VALLEYVIEW(dev)) {
- 		/* Check for built-in panel first. Shares lanes with HDMI on SDVOC */
--		if (I915_READ(VLV_DISPLAY_BASE + DP_C) & DP_DETECTED)
--			intel_dp_init(dev, VLV_DISPLAY_BASE + DP_C, PORT_C);
-+		if (I915_READ(VLV_DISPLAY_BASE + GEN4_HDMIC) & SDVO_DETECTED) {
-+			intel_hdmi_init(dev, VLV_DISPLAY_BASE + GEN4_HDMIC,
-+					PORT_C);
-+			if (I915_READ(VLV_DISPLAY_BASE + DP_C) & DP_DETECTED)
-+				intel_dp_init(dev, VLV_DISPLAY_BASE + DP_C,
-+					      PORT_C);
-+		}
- 
- 		if (I915_READ(VLV_DISPLAY_BASE + GEN4_HDMIB) & SDVO_DETECTED) {
- 			intel_hdmi_init(dev, VLV_DISPLAY_BASE + GEN4_HDMIB,
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0651-drm-i915-Fix-FB-WM-for-HSW.patch b/patches.baytrail/0651-drm-i915-Fix-FB-WM-for-HSW.patch
deleted file mode 100644
index 7959bb80f5283..0000000000000
--- a/patches.baytrail/0651-drm-i915-Fix-FB-WM-for-HSW.patch
+++ /dev/null
@@ -1,45 +0,0 @@
-From bb7e32d588b7a57137b805adba274d7c845ee138 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Fri, 9 Aug 2013 18:02:09 +0300
-Subject: drm/i915: Fix FB WM for HSW
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Due to a misplaced memset(), we never actually enabled the FBC WM on HSW.
-Move the memset() to happen a bit earlier, so that it won't clobber
-results->enable_fbc_wm.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 5c536613d8ebda3da0448550d0a997651a6048e2)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 0f5eb217c707..4800bab89df1 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2681,6 +2681,8 @@ static void hsw_compute_wm_results(struct drm_device *dev,
- 			break;
- 	max_level = level - 1;
- 
-+	memset(results, 0, sizeof(*results));
-+
- 	/* The spec says it is preferred to disable FBC WMs instead of disabling
- 	 * a WM level. */
- 	results->enable_fbc_wm = true;
-@@ -2691,7 +2693,6 @@ static void hsw_compute_wm_results(struct drm_device *dev,
- 		}
- 	}
- 
--	memset(results, 0, sizeof(*results));
- 	for (wm_lp = 1; wm_lp <= 3; wm_lp++) {
- 		const struct intel_wm_level *r;
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0652-drm-i915-Update-rules-for-reading-cache-lines-throug.patch b/patches.baytrail/0652-drm-i915-Update-rules-for-reading-cache-lines-throug.patch
deleted file mode 100644
index 84d1103a1245b..0000000000000
--- a/patches.baytrail/0652-drm-i915-Update-rules-for-reading-cache-lines-throug.patch
+++ /dev/null
@@ -1,96 +0,0 @@
-From 3b20739e9d8e9b0341710449bb63a7090b7c8729 Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Thu, 8 Aug 2013 14:41:03 +0100
-Subject: drm/i915: Update rules for reading cache lines through the LLC
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The LLC is a fun device. The cache is a distinct functional block within
-the SA that arbitrates access from both the CPU and GPU cores. As such
-all writes to memory land first in the LLC before further action is
-taken. For example, an uncached write from either the CPU or GPU will
-then proceed to memory and evict the cacheline from the LLC. This means that
-a read from the LLC always returns the correct information even if the PTE
-bit in the GPU differs from the PAT bit in the CPU. For the older
-snooping architecture on non-LLC, the fundamental principle still holds
-except that some coordination is required between the CPU and GPU to
-explicitly perform the snooping (which is handled by our request
-tracking).
-
-The upshot of this is that we know that we can issue a read from either
-LLC devices or snoopable memory and trust the contents of the cache -
-i.e. we can forgo a clflush before a read in these circumstances.
-Writing to memory from the CPU is a little more tricky as we have to
-consider that the scanout does not read from the CPU cache at all, but
-from main memory. So we have to currently treat all requests to write to
-uncached memory as having to be flushed to main memory for coherency
-with all consumers.
-
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit c76ce038e31a2b30bc3dd816f0aefaf685097a0a)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem.c | 22 ++++++++++++++--------
- 1 file changed, 14 insertions(+), 8 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index 498ef8a7bbc7..50200b5e501b 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -62,6 +62,12 @@ static long i915_gem_purge(struct drm_i915_private *dev_priv, long target);
- static void i915_gem_shrink_all(struct drm_i915_private *dev_priv);
- static void i915_gem_object_truncate(struct drm_i915_gem_object *obj);
- 
-+static bool cpu_cache_is_coherent(struct drm_device *dev,
-+				  enum i915_cache_level level)
-+{
-+	return HAS_LLC(dev) || level != I915_CACHE_NONE;
-+}
-+
- static inline void i915_gem_object_fence_lost(struct drm_i915_gem_object *obj)
- {
- 	if (obj->tiling_mode)
-@@ -414,8 +420,7 @@ i915_gem_shmem_pread(struct drm_device *dev,
- 		 * read domain and manually flush cachelines (if required). This
- 		 * optimizes for the case when the gpu will dirty the data
- 		 * anyway again before the next pread happens. */
--		if (obj->cache_level == I915_CACHE_NONE)
--			needs_clflush = 1;
-+		needs_clflush = !cpu_cache_is_coherent(dev, obj->cache_level);
- 		if (i915_gem_obj_bound_any(obj)) {
- 			ret = i915_gem_object_set_to_gtt_domain(obj, false);
- 			if (ret)
-@@ -739,11 +744,11 @@ i915_gem_shmem_pwrite(struct drm_device *dev,
- 				return ret;
- 		}
- 	}
--	/* Same trick applies for invalidate partially written cachelines before
--	 * writing.  */
--	if (!(obj->base.read_domains & I915_GEM_DOMAIN_CPU)
--	    && obj->cache_level == I915_CACHE_NONE)
--		needs_clflush_before = 1;
-+	/* Same trick applies to invalidate partially written cachelines read
-+	 * before writing. */
-+	if ((obj->base.read_domains & I915_GEM_DOMAIN_CPU) == 0)
-+		needs_clflush_before =
-+			!cpu_cache_is_coherent(dev, obj->cache_level);
- 
- 	ret = i915_gem_object_get_pages(obj);
- 	if (ret)
-@@ -3585,7 +3590,8 @@ i915_gem_object_set_to_cpu_domain(struct drm_i915_gem_object *obj, bool write)
- 
- 	/* Flush the CPU cache if it's still invalid. */
- 	if ((obj->base.read_domains & I915_GEM_DOMAIN_CPU) == 0) {
--		i915_gem_clflush_object(obj);
-+		if (!cpu_cache_is_coherent(obj->base.dev, obj->cache_level))
-+			i915_gem_clflush_object(obj);
- 
- 		obj->base.read_domains |= I915_GEM_DOMAIN_CPU;
- 	}
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0653-drm-i915-Track-when-an-object-is-pinned-for-use-by-t.patch b/patches.baytrail/0653-drm-i915-Track-when-an-object-is-pinned-for-use-by-t.patch
deleted file mode 100644
index c790e05a93d5c..0000000000000
--- a/patches.baytrail/0653-drm-i915-Track-when-an-object-is-pinned-for-use-by-t.patch
+++ /dev/null
@@ -1,180 +0,0 @@
-From 45b9d676a89b2f6c778f8ba0cc54e5a24925c613 Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Fri, 9 Aug 2013 12:25:09 +0100
-Subject: drm/i915: Track when an object is pinned for use by the display
- engine
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The display engine has unique coherency rules such that it requires
-special handling to ensure that all writes to cursors, scanouts and
-sprites are clflushed. This patch introduces the infrastructure to
-simply track when an object is being accessed by the display engine.
-
-v2: Explain the is_pin_display() magic as the sources for obj->pin_count
-and their individual rules is not obvious. (Ville)
-
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit cc98b413c197c4c6a62b1e469e9d05e613571af5)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_debugfs.c  |  2 ++
- drivers/gpu/drm/i915/i915_drv.h      |  2 ++
- drivers/gpu/drm/i915/i915_gem.c      | 36 ++++++++++++++++++++++++++++++++++--
- drivers/gpu/drm/i915/intel_display.c |  8 ++++----
- 4 files changed, 42 insertions(+), 6 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
-index 1a87cc9fd899..eb87865c20d4 100644
---- a/drivers/gpu/drm/i915/i915_debugfs.c
-+++ b/drivers/gpu/drm/i915/i915_debugfs.c
-@@ -117,6 +117,8 @@ describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj)
- 		seq_printf(m, " (name: %d)", obj->base.name);
- 	if (obj->pin_count)
- 		seq_printf(m, " (pinned x %d)", obj->pin_count);
-+	if (obj->pin_display)
-+		seq_printf(m, " (display)");
- 	if (obj->fence_reg != I915_FENCE_REG_NONE)
- 		seq_printf(m, " (fence: %d)", obj->fence_reg);
- 	list_for_each_entry(vma, &obj->vma_list, vma_link) {
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 6141253c8fda..cbb35a09ad7d 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1377,6 +1377,7 @@ struct drm_i915_gem_object {
- 	 */
- 	unsigned int fault_mappable:1;
- 	unsigned int pin_mappable:1;
-+	unsigned int pin_display:1;
- 
- 	/*
- 	 * Is the GPU currently using a fence to access this buffer,
-@@ -1866,6 +1867,7 @@ int __must_check
- i915_gem_object_pin_to_display_plane(struct drm_i915_gem_object *obj,
- 				     u32 alignment,
- 				     struct intel_ring_buffer *pipelined);
-+void i915_gem_object_unpin_from_display_plane(struct drm_i915_gem_object *obj);
- int i915_gem_attach_phys_object(struct drm_device *dev,
- 				struct drm_i915_gem_object *obj,
- 				int id,
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index 50200b5e501b..46f007cd7f87 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -3489,6 +3489,22 @@ unlock:
- 	return ret;
- }
- 
-+static bool is_pin_display(struct drm_i915_gem_object *obj)
-+{
-+	/* There are 3 sources that pin objects:
-+	 *   1. The display engine (scanouts, sprites, cursors);
-+	 *   2. Reservations for execbuffer;
-+	 *   3. The user.
-+	 *
-+	 * We can ignore reservations as we hold the struct_mutex and
-+	 * are only called outside of the reservation path.  The user
-+	 * can only increment pin_count once, and so if after
-+	 * subtracting the potential reference by the user, any pin_count
-+	 * remains, it must be due to another use by the display engine.
-+	 */
-+	return obj->pin_count - !!obj->user_pin_count;
-+}
-+
- /*
-  * Prepare buffer for display plane (scanout, cursors, etc).
-  * Can be called from an uninterruptible phase (modesetting) and allows
-@@ -3508,6 +3524,11 @@ i915_gem_object_pin_to_display_plane(struct drm_i915_gem_object *obj,
- 			return ret;
- 	}
- 
-+	/* Mark the pin_display early so that we account for the
-+	 * display coherency whilst setting up the cache domains.
-+	 */
-+	obj->pin_display = true;
-+
- 	/* The display engine is not coherent with the LLC cache on gen6.  As
- 	 * a result, we make sure that the pinning that is about to occur is
- 	 * done with uncached PTEs. This is lowest common denominator for all
-@@ -3519,7 +3540,7 @@ i915_gem_object_pin_to_display_plane(struct drm_i915_gem_object *obj,
- 	 */
- 	ret = i915_gem_object_set_cache_level(obj, I915_CACHE_NONE);
- 	if (ret)
--		return ret;
-+		goto err_unpin_display;
- 
- 	/* As the user may map the buffer once pinned in the display plane
- 	 * (e.g. libkms for the bootup splash), we have to ensure that we
-@@ -3527,7 +3548,7 @@ i915_gem_object_pin_to_display_plane(struct drm_i915_gem_object *obj,
- 	 */
- 	ret = i915_gem_obj_ggtt_pin(obj, alignment, true, false);
- 	if (ret)
--		return ret;
-+		goto err_unpin_display;
- 
- 	i915_gem_object_flush_cpu_write_domain(obj);
- 
-@@ -3545,6 +3566,17 @@ i915_gem_object_pin_to_display_plane(struct drm_i915_gem_object *obj,
- 					    old_write_domain);
- 
- 	return 0;
-+
-+err_unpin_display:
-+	obj->pin_display = is_pin_display(obj);
-+	return ret;
-+}
-+
-+void
-+i915_gem_object_unpin_from_display_plane(struct drm_i915_gem_object *obj)
-+{
-+	i915_gem_object_unpin(obj);
-+	obj->pin_display = is_pin_display(obj);
- }
- 
- int
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index ee85aeab5667..65bc851f5f91 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -1877,7 +1877,7 @@ intel_pin_and_fence_fb_obj(struct drm_device *dev,
- 	return 0;
- 
- err_unpin:
--	i915_gem_object_unpin(obj);
-+	i915_gem_object_unpin_from_display_plane(obj);
- err_interruptible:
- 	dev_priv->mm.interruptible = true;
- 	return ret;
-@@ -1886,7 +1886,7 @@ err_interruptible:
- void intel_unpin_fb_obj(struct drm_i915_gem_object *obj)
- {
- 	i915_gem_object_unpin_fence(obj);
--	i915_gem_object_unpin(obj);
-+	i915_gem_object_unpin_from_display_plane(obj);
- }
- 
- /* Computes the linear offset to the base tile and adjusts x, y. bytes per pixel
-@@ -6763,7 +6763,7 @@ static int intel_crtc_cursor_set(struct drm_crtc *crtc,
- 			if (intel_crtc->cursor_bo != obj)
- 				i915_gem_detach_phys_object(dev, intel_crtc->cursor_bo);
- 		} else
--			i915_gem_object_unpin(intel_crtc->cursor_bo);
-+			i915_gem_object_unpin_from_display_plane(intel_crtc->cursor_bo);
- 		drm_gem_object_unreference(&intel_crtc->cursor_bo->base);
- 	}
- 
-@@ -6778,7 +6778,7 @@ static int intel_crtc_cursor_set(struct drm_crtc *crtc,
- 
- 	return 0;
- fail_unpin:
--	i915_gem_object_unpin(obj);
-+	i915_gem_object_unpin_from_display_plane(obj);
- fail_locked:
- 	mutex_unlock(&dev->struct_mutex);
- fail:
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0654-drm-i915-Update-rules-for-writing-through-the-LLC-wi.patch b/patches.baytrail/0654-drm-i915-Update-rules-for-writing-through-the-LLC-wi.patch
deleted file mode 100644
index cd1848e4c3ced..0000000000000
--- a/patches.baytrail/0654-drm-i915-Update-rules-for-writing-through-the-LLC-wi.patch
+++ /dev/null
@@ -1,265 +0,0 @@
-From 52ae6dfe428aa66fb70c6771ec325f7c64a2ea91 Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Fri, 9 Aug 2013 12:26:45 +0100
-Subject: drm/i915: Update rules for writing through the LLC with the cpu
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-As mentioned in the previous commit, reads and writes from both the CPU
-and GPU go through the LLC. This gives us coherency between the CPU and
-GPU irrespective of the attribute settings either device sets. We can
-use to avoid having to clflush even uncached memory.
-
-Except for the scanout.
-
-The scanout resides within another functional block that does not use
-the LLC but reads directly from main memory. So in order to maintain
-coherency with the scanout, writes to uncached memory must be flushed.
-In order to optimize writes elsewhere, we start tracking whether an
-framebuffer is attached to an object.
-
-v2: Use pin_display tracking rather than fb_count (to ensure we flush
-cursors as well etc) and only force the clflush along explicit writes to
-the scanout paths (i.e. pin_to_display_plane and pwrite into scanout).
-
-v3: Force the flush after hitting the slowpath in pwrite, as after
-dropping the lock the object's cache domain may be invalidated. (Ville)
-
-Based on a patch by Ville Syrjälä.
-
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 2c22569bba8af6c2976d5f9479fe54a53a39966b)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h            |  2 +-
- drivers/gpu/drm/i915/i915_gem.c            | 58 ++++++++++++++++--------------
- drivers/gpu/drm/i915/i915_gem_execbuffer.c |  2 +-
- drivers/gpu/drm/i915/i915_gem_gtt.c        |  2 +-
- 4 files changed, 35 insertions(+), 29 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index cbb35a09ad7d..d25f9f712b6f 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1840,7 +1840,7 @@ static inline bool i915_terminally_wedged(struct i915_gpu_error *error)
- }
- 
- void i915_gem_reset(struct drm_device *dev);
--void i915_gem_clflush_object(struct drm_i915_gem_object *obj);
-+void i915_gem_clflush_object(struct drm_i915_gem_object *obj, bool force);
- int __must_check i915_gem_object_finish_gpu(struct drm_i915_gem_object *obj);
- int __must_check i915_gem_init(struct drm_device *dev);
- int __must_check i915_gem_init_hw(struct drm_device *dev);
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index 46f007cd7f87..ce4a8c4e42ac 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -38,7 +38,8 @@
- #include <linux/dma-buf.h>
- 
- static void i915_gem_object_flush_gtt_write_domain(struct drm_i915_gem_object *obj);
--static void i915_gem_object_flush_cpu_write_domain(struct drm_i915_gem_object *obj);
-+static void i915_gem_object_flush_cpu_write_domain(struct drm_i915_gem_object *obj,
-+						   bool force);
- static __must_check int
- i915_gem_object_bind_to_vm(struct drm_i915_gem_object *obj,
- 			   struct i915_address_space *vm,
-@@ -68,6 +69,14 @@ static bool cpu_cache_is_coherent(struct drm_device *dev,
- 	return HAS_LLC(dev) || level != I915_CACHE_NONE;
- }
- 
-+static bool cpu_write_needs_clflush(struct drm_i915_gem_object *obj)
-+{
-+	if (!cpu_cache_is_coherent(obj->base.dev, obj->cache_level))
-+		return true;
-+
-+	return obj->pin_display;
-+}
-+
- static inline void i915_gem_object_fence_lost(struct drm_i915_gem_object *obj)
- {
- 	if (obj->tiling_mode)
-@@ -736,8 +745,7 @@ i915_gem_shmem_pwrite(struct drm_device *dev,
- 		 * write domain and manually flush cachelines (if required). This
- 		 * optimizes for the case when the gpu will use the data
- 		 * right away and we therefore have to clflush anyway. */
--		if (obj->cache_level == I915_CACHE_NONE)
--			needs_clflush_after = 1;
-+		needs_clflush_after = cpu_write_needs_clflush(obj);
- 		if (i915_gem_obj_bound_any(obj)) {
- 			ret = i915_gem_object_set_to_gtt_domain(obj, true);
- 			if (ret)
-@@ -827,7 +835,7 @@ out:
- 		 */
- 		if (!needs_clflush_after &&
- 		    obj->base.write_domain != I915_GEM_DOMAIN_CPU) {
--			i915_gem_clflush_object(obj);
-+			i915_gem_clflush_object(obj, obj->pin_display);
- 			i915_gem_chipset_flush(dev);
- 		}
- 	}
-@@ -905,9 +913,9 @@ i915_gem_pwrite_ioctl(struct drm_device *dev, void *data,
- 		goto out;
- 	}
- 
--	if (obj->cache_level == I915_CACHE_NONE &&
--	    obj->tiling_mode == I915_TILING_NONE &&
--	    obj->base.write_domain != I915_GEM_DOMAIN_CPU) {
-+	if (obj->tiling_mode == I915_TILING_NONE &&
-+	    obj->base.write_domain != I915_GEM_DOMAIN_CPU &&
-+	    cpu_write_needs_clflush(obj)) {
- 		ret = i915_gem_gtt_pwrite_fast(dev, obj, args, file);
- 		/* Note that the gtt paths might fail with non-page-backed user
- 		 * pointers (e.g. gtt mappings when moving data between
-@@ -1256,8 +1264,8 @@ i915_gem_sw_finish_ioctl(struct drm_device *dev, void *data,
- 	}
- 
- 	/* Pinned buffers may be scanout, so flush the cache */
--	if (obj->pin_count)
--		i915_gem_object_flush_cpu_write_domain(obj);
-+	if (obj->pin_display)
-+		i915_gem_object_flush_cpu_write_domain(obj, true);
- 
- 	drm_gem_object_unreference(&obj->base);
- unlock:
-@@ -1627,7 +1635,7 @@ i915_gem_object_put_pages_gtt(struct drm_i915_gem_object *obj)
- 		 * hope for the best.
- 		 */
- 		WARN_ON(ret != -EIO);
--		i915_gem_clflush_object(obj);
-+		i915_gem_clflush_object(obj, true);
- 		obj->base.read_domains = obj->base.write_domain = I915_GEM_DOMAIN_CPU;
- 	}
- 
-@@ -3205,7 +3213,8 @@ err_unpin:
- }
- 
- void
--i915_gem_clflush_object(struct drm_i915_gem_object *obj)
-+i915_gem_clflush_object(struct drm_i915_gem_object *obj,
-+			bool force)
- {
- 	/* If we don't have a page list set up, then we're not pinned
- 	 * to GPU, and we can ignore the cache flush because it'll happen
-@@ -3229,7 +3238,7 @@ i915_gem_clflush_object(struct drm_i915_gem_object *obj)
- 	 * snooping behaviour occurs naturally as the result of our domain
- 	 * tracking.
- 	 */
--	if (obj->cache_level != I915_CACHE_NONE)
-+	if (!force && cpu_cache_is_coherent(obj->base.dev, obj->cache_level))
- 		return;
- 
- 	trace_i915_gem_object_clflush(obj);
-@@ -3266,14 +3275,15 @@ i915_gem_object_flush_gtt_write_domain(struct drm_i915_gem_object *obj)
- 
- /** Flushes the CPU write domain for the object if it's dirty. */
- static void
--i915_gem_object_flush_cpu_write_domain(struct drm_i915_gem_object *obj)
-+i915_gem_object_flush_cpu_write_domain(struct drm_i915_gem_object *obj,
-+				       bool force)
- {
- 	uint32_t old_write_domain;
- 
- 	if (obj->base.write_domain != I915_GEM_DOMAIN_CPU)
- 		return;
- 
--	i915_gem_clflush_object(obj);
-+	i915_gem_clflush_object(obj, force);
- 	i915_gem_chipset_flush(obj->base.dev);
- 	old_write_domain = obj->base.write_domain;
- 	obj->base.write_domain = 0;
-@@ -3307,7 +3317,7 @@ i915_gem_object_set_to_gtt_domain(struct drm_i915_gem_object *obj, bool write)
- 	if (ret)
- 		return ret;
- 
--	i915_gem_object_flush_cpu_write_domain(obj);
-+	i915_gem_object_flush_cpu_write_domain(obj, false);
- 
- 	/* Serialise direct access to this object with the barriers for
- 	 * coherent writes from the GPU, by effectively invalidating the
-@@ -3397,7 +3407,11 @@ int i915_gem_object_set_cache_level(struct drm_i915_gem_object *obj,
- 					       obj, cache_level);
- 	}
- 
--	if (cache_level == I915_CACHE_NONE) {
-+	list_for_each_entry(vma, &obj->vma_list, vma_link)
-+		vma->node.color = cache_level;
-+	obj->cache_level = cache_level;
-+
-+	if (cpu_write_needs_clflush(obj)) {
- 		u32 old_read_domains, old_write_domain;
- 
- 		/* If we're coming from LLC cached, then we haven't
-@@ -3420,9 +3434,6 @@ int i915_gem_object_set_cache_level(struct drm_i915_gem_object *obj,
- 						    old_write_domain);
- 	}
- 
--	list_for_each_entry(vma, &obj->vma_list, vma_link)
--		vma->node.color = cache_level;
--	obj->cache_level = cache_level;
- 	i915_gem_verify_gtt(dev);
- 	return 0;
- }
-@@ -3550,7 +3561,7 @@ i915_gem_object_pin_to_display_plane(struct drm_i915_gem_object *obj,
- 	if (ret)
- 		goto err_unpin_display;
- 
--	i915_gem_object_flush_cpu_write_domain(obj);
-+	i915_gem_object_flush_cpu_write_domain(obj, true);
- 
- 	old_write_domain = obj->base.write_domain;
- 	old_read_domains = obj->base.read_domains;
-@@ -3622,8 +3633,7 @@ i915_gem_object_set_to_cpu_domain(struct drm_i915_gem_object *obj, bool write)
- 
- 	/* Flush the CPU cache if it's still invalid. */
- 	if ((obj->base.read_domains & I915_GEM_DOMAIN_CPU) == 0) {
--		if (!cpu_cache_is_coherent(obj->base.dev, obj->cache_level))
--			i915_gem_clflush_object(obj);
-+		i915_gem_clflush_object(obj, false);
- 
- 		obj->base.read_domains |= I915_GEM_DOMAIN_CPU;
- 	}
-@@ -3805,10 +3815,6 @@ i915_gem_pin_ioctl(struct drm_device *dev, void *data,
- 	obj->user_pin_count++;
- 	obj->pin_filp = file;
- 
--	/* XXX - flush the CPU caches for pinned objects
--	 * as the X server doesn't manage domains yet
--	 */
--	i915_gem_object_flush_cpu_write_domain(obj);
- 	args->offset = i915_gem_obj_ggtt_offset(obj);
- out:
- 	drm_gem_object_unreference(&obj->base);
-diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-index 8ccc29ac9629..e999578a021c 100644
---- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-@@ -716,7 +716,7 @@ i915_gem_execbuffer_move_to_gpu(struct intel_ring_buffer *ring,
- 			return ret;
- 
- 		if (obj->base.write_domain & I915_GEM_DOMAIN_CPU)
--			i915_gem_clflush_object(obj);
-+			i915_gem_clflush_object(obj, false);
- 
- 		flush_domains |= obj->base.write_domain;
- 	}
-diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
-index 24fb989593f0..c9420c280cf0 100644
---- a/drivers/gpu/drm/i915/i915_gem_gtt.c
-+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
-@@ -487,7 +487,7 @@ void i915_gem_restore_gtt_mappings(struct drm_device *dev)
- 				       dev_priv->gtt.base.total / PAGE_SIZE);
- 
- 	list_for_each_entry(obj, &dev_priv->mm.bound_list, global_list) {
--		i915_gem_clflush_object(obj);
-+		i915_gem_clflush_object(obj, obj->pin_display);
- 		i915_gem_gtt_bind_object(obj, obj->cache_level);
- 	}
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0655-drm-i915-Allow-the-GPU-to-cache-stolen-memory.patch b/patches.baytrail/0655-drm-i915-Allow-the-GPU-to-cache-stolen-memory.patch
deleted file mode 100644
index 98653844afec9..0000000000000
--- a/patches.baytrail/0655-drm-i915-Allow-the-GPU-to-cache-stolen-memory.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-From bb6729beb868d5d75aac9998fc3fa8e4f32aa337 Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Thu, 8 Aug 2013 14:41:06 +0100
-Subject: drm/i915: Allow the GPU to cache stolen memory
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-As a corollary to reviewing the interaction between LLC and our cache
-domains, the GPU PTE bits are independent of the CPU PAT bits. As such
-we can set the cache level on stolen memory based on how we wish the GPU
-to cache accesses to it. So we are free to set the same default cache
-levels as for normal bo, i.e. enable LLC cacheing by default where
-appropriate.
-
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit d46f1c3f1372e3a72fab97c60480aa4a1084387f)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem_stolen.c | 5 ++---
- 1 file changed, 2 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem_stolen.c b/drivers/gpu/drm/i915/i915_gem_stolen.c
-index 8912f489f53a..8b03327f74b9 100644
---- a/drivers/gpu/drm/i915/i915_gem_stolen.c
-+++ b/drivers/gpu/drm/i915/i915_gem_stolen.c
-@@ -296,9 +296,8 @@ _i915_gem_object_create_stolen(struct drm_device *dev,
- 	i915_gem_object_pin_pages(obj);
- 	obj->stolen = stolen;
- 
--	obj->base.write_domain = I915_GEM_DOMAIN_GTT;
--	obj->base.read_domains = I915_GEM_DOMAIN_GTT;
--	obj->cache_level = I915_CACHE_NONE;
-+	obj->base.read_domains = I915_GEM_DOMAIN_CPU | I915_GEM_DOMAIN_GTT;
-+	obj->cache_level = HAS_LLC(dev) ? I915_CACHE_LLC : I915_CACHE_NONE;
- 
- 	return obj;
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0656-drm-kill-dev-context_wait.patch b/patches.baytrail/0656-drm-kill-dev-context_wait.patch
deleted file mode 100644
index abd9465fba331..0000000000000
--- a/patches.baytrail/0656-drm-kill-dev-context_wait.patch
+++ /dev/null
@@ -1,57 +0,0 @@
-From 94034b5c8b3b11fae675984f2a23795a8bebd9ad Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Wed, 10 Jul 2013 14:11:36 +0200
-Subject: drm: kill dev->context_wait
-
-No one ever waits on this waitqueue, so the wake_up call is wasted.
-Remove it all.
-
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Signed-off-by: Dave Airlie <airlied@gmail.com>
-(cherry picked from commit 3dadef6c96c8aa6e67f83b30504256a0605ee4d6)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_context.c | 1 -
- drivers/gpu/drm/drm_fops.c    | 1 -
- include/drm/drmP.h            | 1 -
- 3 files changed, 3 deletions(-)
-
-diff --git a/drivers/gpu/drm/drm_context.c b/drivers/gpu/drm/drm_context.c
-index 725968d38976..06dd419f6dfe 100644
---- a/drivers/gpu/drm/drm_context.c
-+++ b/drivers/gpu/drm/drm_context.c
-@@ -261,7 +261,6 @@ static int drm_context_switch_complete(struct drm_device *dev,
- 	   when the kernel holds the lock, release
- 	   that lock here. */
- 	clear_bit(0, &dev->context_flag);
--	wake_up(&dev->context_wait);
- 
- 	return 0;
- }
-diff --git a/drivers/gpu/drm/drm_fops.c b/drivers/gpu/drm/drm_fops.c
-index 429e07d0b0f1..23857605a987 100644
---- a/drivers/gpu/drm/drm_fops.c
-+++ b/drivers/gpu/drm/drm_fops.c
-@@ -81,7 +81,6 @@ static int drm_setup(struct drm_device * dev)
- 	dev->last_context = 0;
- 	dev->last_switch = 0;
- 	dev->last_checked = 0;
--	init_waitqueue_head(&dev->context_wait);
- 	dev->if_version = 0;
- 
- 	dev->ctx_start = 0;
-diff --git a/include/drm/drmP.h b/include/drm/drmP.h
-index 70de499fa3b7..45ab45426cdb 100644
---- a/include/drm/drmP.h
-+++ b/include/drm/drmP.h
-@@ -1132,7 +1132,6 @@ struct drm_device {
- 	__volatile__ long context_flag;	/**< Context swapping flag */
- 	__volatile__ long interrupt_flag; /**< Interruption handler flag */
- 	__volatile__ long dma_flag;	/**< DMA dispatch flag */
--	wait_queue_head_t context_wait;	/**< Processes waiting on ctx switch */
- 	int last_checked;		/**< Last context checked for DMA */
- 	int last_context;		/**< Last current context */
- 	unsigned long last_switch;	/**< jiffies at last context switch */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0657-drm-remove-dev-last_switch.patch b/patches.baytrail/0657-drm-remove-dev-last_switch.patch
deleted file mode 100644
index 9071ffde337ed..0000000000000
--- a/patches.baytrail/0657-drm-remove-dev-last_switch.patch
+++ /dev/null
@@ -1,57 +0,0 @@
-From 9b650bcf3ced86b0c94fabd20741a0997412de04 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Wed, 10 Jul 2013 14:11:37 +0200
-Subject: drm: remove dev->last_switch
-
-Only ever assigned in the context code for real, with no readers
-anywhere. Remove it.
-
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Signed-off-by: Dave Airlie <airlied@gmail.com>
-(cherry picked from commit a17800c70129d5976a52c42f04a16a0f1d9df4b2)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_context.c | 1 -
- drivers/gpu/drm/drm_fops.c    | 1 -
- include/drm/drmP.h            | 1 -
- 3 files changed, 3 deletions(-)
-
-diff --git a/drivers/gpu/drm/drm_context.c b/drivers/gpu/drm/drm_context.c
-index 06dd419f6dfe..2857fa2f9191 100644
---- a/drivers/gpu/drm/drm_context.c
-+++ b/drivers/gpu/drm/drm_context.c
-@@ -251,7 +251,6 @@ static int drm_context_switch_complete(struct drm_device *dev,
- 				       struct drm_file *file_priv, int new)
- {
- 	dev->last_context = new;	/* PRE/POST: This is the _only_ writer. */
--	dev->last_switch = jiffies;
- 
- 	if (!_DRM_LOCK_IS_HELD(file_priv->master->lock.hw_lock->lock)) {
- 		DRM_ERROR("Lock isn't held after context switch\n");
-diff --git a/drivers/gpu/drm/drm_fops.c b/drivers/gpu/drm/drm_fops.c
-index 23857605a987..68d0be794d5d 100644
---- a/drivers/gpu/drm/drm_fops.c
-+++ b/drivers/gpu/drm/drm_fops.c
-@@ -79,7 +79,6 @@ static int drm_setup(struct drm_device * dev)
- 	dev->interrupt_flag = 0;
- 	dev->dma_flag = 0;
- 	dev->last_context = 0;
--	dev->last_switch = 0;
- 	dev->last_checked = 0;
- 	dev->if_version = 0;
- 
-diff --git a/include/drm/drmP.h b/include/drm/drmP.h
-index 45ab45426cdb..9aa0445edb1f 100644
---- a/include/drm/drmP.h
-+++ b/include/drm/drmP.h
-@@ -1134,7 +1134,6 @@ struct drm_device {
- 	__volatile__ long dma_flag;	/**< DMA dispatch flag */
- 	int last_checked;		/**< Last context checked for DMA */
- 	int last_context;		/**< Last current context */
--	unsigned long last_switch;	/**< jiffies at last context switch */
- 	/*@} */
- 
- 	struct work_struct work;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0658-drm-kill-dev-interrupt_flag-and-dev-dma_flag.patch b/patches.baytrail/0658-drm-kill-dev-interrupt_flag-and-dev-dma_flag.patch
deleted file mode 100644
index e8815b5cd4f3f..0000000000000
--- a/patches.baytrail/0658-drm-kill-dev-interrupt_flag-and-dev-dma_flag.patch
+++ /dev/null
@@ -1,45 +0,0 @@
-From 3313d28301f1fbe0d4726b54c4c356124cdd3631 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Wed, 10 Jul 2013 14:11:38 +0200
-Subject: drm: kill dev->interrupt_flag and dev->dma_flag
-
-Completely unused, so just remove them.
-
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Signed-off-by: Dave Airlie <airlied@gmail.com>
-(cherry picked from commit c78d7531031cb6d163e7450bda563c267beef777)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_fops.c | 2 --
- include/drm/drmP.h         | 2 --
- 2 files changed, 4 deletions(-)
-
-diff --git a/drivers/gpu/drm/drm_fops.c b/drivers/gpu/drm/drm_fops.c
-index 68d0be794d5d..2f3b6fcaec0b 100644
---- a/drivers/gpu/drm/drm_fops.c
-+++ b/drivers/gpu/drm/drm_fops.c
-@@ -76,8 +76,6 @@ static int drm_setup(struct drm_device * dev)
- 	dev->sigdata.lock = NULL;
- 
- 	dev->context_flag = 0;
--	dev->interrupt_flag = 0;
--	dev->dma_flag = 0;
- 	dev->last_context = 0;
- 	dev->last_checked = 0;
- 	dev->if_version = 0;
-diff --git a/include/drm/drmP.h b/include/drm/drmP.h
-index 9aa0445edb1f..bc802174f3e5 100644
---- a/include/drm/drmP.h
-+++ b/include/drm/drmP.h
-@@ -1130,8 +1130,6 @@ struct drm_device {
- 	/*@{ */
- 	int irq_enabled;		/**< True if irq handler is enabled */
- 	__volatile__ long context_flag;	/**< Context swapping flag */
--	__volatile__ long interrupt_flag; /**< Interruption handler flag */
--	__volatile__ long dma_flag;	/**< DMA dispatch flag */
- 	int last_checked;		/**< Last context checked for DMA */
- 	int last_context;		/**< Last current context */
- 	/*@} */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0659-drm-kill-dev-ctx_start-and-dev-lck_start.patch b/patches.baytrail/0659-drm-kill-dev-ctx_start-and-dev-lck_start.patch
deleted file mode 100644
index 3f38180f391b9..0000000000000
--- a/patches.baytrail/0659-drm-kill-dev-ctx_start-and-dev-lck_start.patch
+++ /dev/null
@@ -1,46 +0,0 @@
-From b0f54798edd95f9d1ed472bd5496ac424dce6ff4 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Wed, 10 Jul 2013 14:11:39 +0200
-Subject: drm: kill dev->ctx_start and dev->lck_start
-
-Again completely unused, so just remove it.
-
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Signed-off-by: Dave Airlie <airlied@gmail.com>
-(cherry picked from commit c7e00b6d6a08772fac43b0fcea7fb48e6a1fe390)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_fops.c | 3 ---
- include/drm/drmP.h         | 2 --
- 2 files changed, 5 deletions(-)
-
-diff --git a/drivers/gpu/drm/drm_fops.c b/drivers/gpu/drm/drm_fops.c
-index 2f3b6fcaec0b..cdda3951ff03 100644
---- a/drivers/gpu/drm/drm_fops.c
-+++ b/drivers/gpu/drm/drm_fops.c
-@@ -80,9 +80,6 @@ static int drm_setup(struct drm_device * dev)
- 	dev->last_checked = 0;
- 	dev->if_version = 0;
- 
--	dev->ctx_start = 0;
--	dev->lck_start = 0;
--
- 	dev->buf_async = NULL;
- 	init_waitqueue_head(&dev->buf_readers);
- 	init_waitqueue_head(&dev->buf_writers);
-diff --git a/include/drm/drmP.h b/include/drm/drmP.h
-index bc802174f3e5..952478cd3ec3 100644
---- a/include/drm/drmP.h
-+++ b/include/drm/drmP.h
-@@ -1169,8 +1169,6 @@ struct drm_device {
- 	spinlock_t event_lock;
- 
- 	/*@} */
--	cycles_t ctx_start;
--	cycles_t lck_start;
- 
- 	struct fasync_struct *buf_async;/**< Processes waiting for SIGIO */
- 	wait_queue_head_t buf_readers;	/**< Processes waiting to read */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0660-drm-kill-dev-buf_readers-and-dev-buf_writers.patch b/patches.baytrail/0660-drm-kill-dev-buf_readers-and-dev-buf_writers.patch
deleted file mode 100644
index e0810f9601336..0000000000000
--- a/patches.baytrail/0660-drm-kill-dev-buf_readers-and-dev-buf_writers.patch
+++ /dev/null
@@ -1,45 +0,0 @@
-From 1e9073ae96ede82e475d14bc90023b1a0055ee94 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Wed, 10 Jul 2013 14:11:41 +0200
-Subject: drm: kill dev->buf_readers and dev->buf_writers
-
-Again totally unused, so just remove them.
-
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Signed-off-by: Dave Airlie <airlied@gmail.com>
-(cherry picked from commit 494f38e4e0c5ffca110e361cd3391f25313b52c7)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_fops.c | 2 --
- include/drm/drmP.h         | 2 --
- 2 files changed, 4 deletions(-)
-
-diff --git a/drivers/gpu/drm/drm_fops.c b/drivers/gpu/drm/drm_fops.c
-index cdda3951ff03..2f86ccb86dfc 100644
---- a/drivers/gpu/drm/drm_fops.c
-+++ b/drivers/gpu/drm/drm_fops.c
-@@ -81,8 +81,6 @@ static int drm_setup(struct drm_device * dev)
- 	dev->if_version = 0;
- 
- 	dev->buf_async = NULL;
--	init_waitqueue_head(&dev->buf_readers);
--	init_waitqueue_head(&dev->buf_writers);
- 
- 	DRM_DEBUG("\n");
- 
-diff --git a/include/drm/drmP.h b/include/drm/drmP.h
-index 952478cd3ec3..a47fec92c6ca 100644
---- a/include/drm/drmP.h
-+++ b/include/drm/drmP.h
-@@ -1171,8 +1171,6 @@ struct drm_device {
- 	/*@} */
- 
- 	struct fasync_struct *buf_async;/**< Processes waiting for SIGIO */
--	wait_queue_head_t buf_readers;	/**< Processes waiting to read */
--	wait_queue_head_t buf_writers;	/**< Processes waiting to ctx switch */
- 
- 	struct drm_agp_head *agp;	/**< AGP data */
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0661-drm-rip-out-dev-last_checked.patch b/patches.baytrail/0661-drm-rip-out-dev-last_checked.patch
deleted file mode 100644
index 6145522f3fc54..0000000000000
--- a/patches.baytrail/0661-drm-rip-out-dev-last_checked.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-From b3382b844bdb6a30e466f30cc1bb09770aa5a33d Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Wed, 10 Jul 2013 17:51:10 +0200
-Subject: drm: rip out dev->last_checked
-
-Only ever re-cleared in drm_setup, otherwise completely unused.
-
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Signed-off-by: Dave Airlie <airlied@gmail.com>
-(cherry picked from commit 23367ff49065505e4a255dba2117f654ca26063f)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_fops.c | 1 -
- include/drm/drmP.h         | 1 -
- 2 files changed, 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/drm_fops.c b/drivers/gpu/drm/drm_fops.c
-index 2f86ccb86dfc..8b3eac08b48d 100644
---- a/drivers/gpu/drm/drm_fops.c
-+++ b/drivers/gpu/drm/drm_fops.c
-@@ -77,7 +77,6 @@ static int drm_setup(struct drm_device * dev)
- 
- 	dev->context_flag = 0;
- 	dev->last_context = 0;
--	dev->last_checked = 0;
- 	dev->if_version = 0;
- 
- 	dev->buf_async = NULL;
-diff --git a/include/drm/drmP.h b/include/drm/drmP.h
-index a47fec92c6ca..f8ad91bc0f94 100644
---- a/include/drm/drmP.h
-+++ b/include/drm/drmP.h
-@@ -1130,7 +1130,6 @@ struct drm_device {
- 	/*@{ */
- 	int irq_enabled;		/**< True if irq handler is enabled */
- 	__volatile__ long context_flag;	/**< Context swapping flag */
--	int last_checked;		/**< Last context checked for DMA */
- 	int last_context;		/**< Last current context */
- 	/*@} */
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0662-drm-remove-FASYNC-support.patch b/patches.baytrail/0662-drm-remove-FASYNC-support.patch
deleted file mode 100644
index 241e4871b3708..0000000000000
--- a/patches.baytrail/0662-drm-remove-FASYNC-support.patch
+++ /dev/null
@@ -1,444 +0,0 @@
-From 6da1d503e7426a88139cb8f6e8b6fb1a412a036a Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 8 Aug 2013 15:41:23 +0200
-Subject: drm: remove FASYNC support
-
-So I've stumbled over drm_fasync and wondered what it does. Digging
-that up is quite a story.
-
-First I've had to read up on what this does and ended up being rather
-bewildered why peopled loved signals so much back in the days that
-they've created SIGIO just for that ...
-
-Then I wondered how this ever works, and what that strange "No-op."
-comment right above it should mean. After all calling the core fasync
-helper is pretty obviously not a noop. After reading through the
-kernels FASYNC implementation I've noticed that signals are only sent
-out to the processes attached with FASYNC by calling kill_fasync.
-
-No merged drm driver has ever done that.
-
-After more digging I've found out that the only driver that ever used
-this is the so called GAMMA driver. I've frankly never heard of such a
-gpu brand ever before. Now FASYNC seems to not have been the only bad
-thing with that driver, since Dave Airlie removed it from the drm
-driver with prejudice:
-
-commit 1430163b4bbf7b00367ea1066c1c5fe85dbeefed
-Author: Dave Airlie <airlied@linux.ie>
-Date:   Sun Aug 29 12:04:35 2004 +0000
-
-    Drop GAMMA DRM from a great height ...
-
-Long story short, the drm fasync support seems to be doing absolutely
-nothing. And the only user of it was never merged into the upstream
-kernel. And we don't need any fops->fasync callback since the fcntl
-implementation in the kernel already implements the noop case
-correctly.
-
-So stop this particular cargo-cult and rip it all out.
-
-v2: Kill drm_fasync assignments in rcar (newly added) and imx drivers
-(somehow I've missed that one in staging). Also drop the reference in
-the drm DocBook. ARM compile-fail reported by Rob Clark.
-
-v3: Move the removal of dev->buf_asnyc assignment in drm_setup to this
-patch here.
-
-v4: Actually git add ... tsk.
-
-Cc: Dave Airlie <airlied@linux.ie>
-Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Cc: Rob Clark <robdclark@gmail.com>
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Reviewed-by: David Herrmann <dh.herrmann@gmail.com>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit b0e898ac555e96e7863a5ee95d70f3625f1db5e2)
-Signed-off-by: James Ausmus <james.ausmus@intel.com>
-
-Conflicts:
-	drivers/gpu/drm/rcar-du/rcar_du_drv.c
-	(driver not in this tree)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- Documentation/DocBook/drm.tmpl           |  1 -
- drivers/gpu/drm/ast/ast_drv.c            |  1 -
- drivers/gpu/drm/cirrus/cirrus_drv.c      |  1 -
- drivers/gpu/drm/drm_fops.c               | 14 --------------
- drivers/gpu/drm/gma500/psb_drv.c         |  1 -
- drivers/gpu/drm/i810/i810_dma.c          |  1 -
- drivers/gpu/drm/i810/i810_drv.c          |  1 -
- drivers/gpu/drm/i915/i915_drv.c          |  1 -
- drivers/gpu/drm/mga/mga_drv.c            |  1 -
- drivers/gpu/drm/mgag200/mgag200_drv.c    |  1 -
- drivers/gpu/drm/nouveau/nouveau_drm.c    |  1 -
- drivers/gpu/drm/omapdrm/omap_drv.c       |  1 -
- drivers/gpu/drm/qxl/qxl_drv.c            |  1 -
- drivers/gpu/drm/r128/r128_drv.c          |  1 -
- drivers/gpu/drm/radeon/radeon_drv.c      |  2 --
- drivers/gpu/drm/savage/savage_drv.c      |  1 -
- drivers/gpu/drm/shmobile/shmob_drm_drv.c |  1 -
- drivers/gpu/drm/sis/sis_drv.c            |  1 -
- drivers/gpu/drm/tdfx/tdfx_drv.c          |  1 -
- drivers/gpu/drm/tilcdc/tilcdc_drv.c      |  1 -
- drivers/gpu/drm/udl/udl_drv.c            |  1 -
- drivers/gpu/drm/via/via_drv.c            |  1 -
- drivers/gpu/drm/vmwgfx/vmwgfx_drv.c      |  1 -
- drivers/gpu/host1x/drm/drm.c             |  1 -
- drivers/staging/imx-drm/imx-drm-core.c   |  1 -
- include/drm/drmP.h                       |  3 ---
- 26 files changed, 42 deletions(-)
-
-diff --git a/Documentation/DocBook/drm.tmpl b/Documentation/DocBook/drm.tmpl
-index ba664d7c5a89..da1e28263002 100644
---- a/Documentation/DocBook/drm.tmpl
-+++ b/Documentation/DocBook/drm.tmpl
-@@ -2339,7 +2339,6 @@ void (*postclose) (struct drm_device *, struct drm_file *);</synopsis>
- 	<programlisting>
- 	.poll = drm_poll,
- 	.read = drm_read,
--	.fasync = drm_fasync,
- 	.llseek = no_llseek,
- 	</programlisting>
-       </para>
-diff --git a/drivers/gpu/drm/ast/ast_drv.c b/drivers/gpu/drm/ast/ast_drv.c
-index a144fb044852..60f1ce3998c3 100644
---- a/drivers/gpu/drm/ast/ast_drv.c
-+++ b/drivers/gpu/drm/ast/ast_drv.c
-@@ -190,7 +190,6 @@ static const struct file_operations ast_fops = {
- 	.unlocked_ioctl = drm_ioctl,
- 	.mmap = ast_mmap,
- 	.poll = drm_poll,
--	.fasync = drm_fasync,
- #ifdef CONFIG_COMPAT
- 	.compat_ioctl = drm_compat_ioctl,
- #endif
-diff --git a/drivers/gpu/drm/cirrus/cirrus_drv.c b/drivers/gpu/drm/cirrus/cirrus_drv.c
-index d35d99c15f84..dd9c908ab3fc 100644
---- a/drivers/gpu/drm/cirrus/cirrus_drv.c
-+++ b/drivers/gpu/drm/cirrus/cirrus_drv.c
-@@ -85,7 +85,6 @@ static const struct file_operations cirrus_driver_fops = {
- #ifdef CONFIG_COMPAT
- 	.compat_ioctl = drm_compat_ioctl,
- #endif
--	.fasync = drm_fasync,
- };
- static struct drm_driver driver = {
- 	.driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_USE_MTRR,
-diff --git a/drivers/gpu/drm/drm_fops.c b/drivers/gpu/drm/drm_fops.c
-index 8b3eac08b48d..88e80c37f568 100644
---- a/drivers/gpu/drm/drm_fops.c
-+++ b/drivers/gpu/drm/drm_fops.c
-@@ -79,8 +79,6 @@ static int drm_setup(struct drm_device * dev)
- 	dev->last_context = 0;
- 	dev->if_version = 0;
- 
--	dev->buf_async = NULL;
--
- 	DRM_DEBUG("\n");
- 
- 	/*
-@@ -363,18 +361,6 @@ static int drm_open_helper(struct inode *inode, struct file *filp,
- 	return ret;
- }
- 
--/** No-op. */
--int drm_fasync(int fd, struct file *filp, int on)
--{
--	struct drm_file *priv = filp->private_data;
--	struct drm_device *dev = priv->minor->dev;
--
--	DRM_DEBUG("fd = %d, device = 0x%lx\n", fd,
--		  (long)old_encode_dev(priv->minor->device));
--	return fasync_helper(fd, filp, on, &dev->buf_async);
--}
--EXPORT_SYMBOL(drm_fasync);
--
- static void drm_master_release(struct drm_device *dev, struct file *filp)
- {
- 	struct drm_file *file_priv = filp->private_data;
-diff --git a/drivers/gpu/drm/gma500/psb_drv.c b/drivers/gpu/drm/gma500/psb_drv.c
-index d13c2fc848bc..99b5293972c6 100644
---- a/drivers/gpu/drm/gma500/psb_drv.c
-+++ b/drivers/gpu/drm/gma500/psb_drv.c
-@@ -622,7 +622,6 @@ static const struct file_operations psb_gem_fops = {
- 	.unlocked_ioctl = psb_unlocked_ioctl,
- 	.mmap = drm_gem_mmap,
- 	.poll = drm_poll,
--	.fasync = drm_fasync,
- 	.read = drm_read,
- };
- 
-diff --git a/drivers/gpu/drm/i810/i810_dma.c b/drivers/gpu/drm/i810/i810_dma.c
-index 926ac7d48381..7f8b7a469ff8 100644
---- a/drivers/gpu/drm/i810/i810_dma.c
-+++ b/drivers/gpu/drm/i810/i810_dma.c
-@@ -113,7 +113,6 @@ static const struct file_operations i810_buffer_fops = {
- 	.release = drm_release,
- 	.unlocked_ioctl = drm_ioctl,
- 	.mmap = i810_mmap_buffers,
--	.fasync = drm_fasync,
- #ifdef CONFIG_COMPAT
- 	.compat_ioctl = drm_compat_ioctl,
- #endif
-diff --git a/drivers/gpu/drm/i810/i810_drv.c b/drivers/gpu/drm/i810/i810_drv.c
-index 2e91fc3580b4..d85c05b4877d 100644
---- a/drivers/gpu/drm/i810/i810_drv.c
-+++ b/drivers/gpu/drm/i810/i810_drv.c
-@@ -49,7 +49,6 @@ static const struct file_operations i810_driver_fops = {
- 	.unlocked_ioctl = drm_ioctl,
- 	.mmap = drm_mmap,
- 	.poll = drm_poll,
--	.fasync = drm_fasync,
- #ifdef CONFIG_COMPAT
- 	.compat_ioctl = drm_compat_ioctl,
- #endif
-diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
-index 13457e3e9cad..9411a745adaf 100644
---- a/drivers/gpu/drm/i915/i915_drv.c
-+++ b/drivers/gpu/drm/i915/i915_drv.c
-@@ -994,7 +994,6 @@ static const struct file_operations i915_driver_fops = {
- 	.unlocked_ioctl = drm_ioctl,
- 	.mmap = drm_gem_mmap,
- 	.poll = drm_poll,
--	.fasync = drm_fasync,
- 	.read = drm_read,
- #ifdef CONFIG_COMPAT
- 	.compat_ioctl = i915_compat_ioctl,
-diff --git a/drivers/gpu/drm/mga/mga_drv.c b/drivers/gpu/drm/mga/mga_drv.c
-index 17d0a637e4fb..fe71e1e44e48 100644
---- a/drivers/gpu/drm/mga/mga_drv.c
-+++ b/drivers/gpu/drm/mga/mga_drv.c
-@@ -50,7 +50,6 @@ static const struct file_operations mga_driver_fops = {
- 	.unlocked_ioctl = drm_ioctl,
- 	.mmap = drm_mmap,
- 	.poll = drm_poll,
--	.fasync = drm_fasync,
- #ifdef CONFIG_COMPAT
- 	.compat_ioctl = mga_compat_ioctl,
- #endif
-diff --git a/drivers/gpu/drm/mgag200/mgag200_drv.c b/drivers/gpu/drm/mgag200/mgag200_drv.c
-index bd9196478735..b570127ae3b2 100644
---- a/drivers/gpu/drm/mgag200/mgag200_drv.c
-+++ b/drivers/gpu/drm/mgag200/mgag200_drv.c
-@@ -81,7 +81,6 @@ static const struct file_operations mgag200_driver_fops = {
- 	.unlocked_ioctl = drm_ioctl,
- 	.mmap = mgag200_mmap,
- 	.poll = drm_poll,
--	.fasync = drm_fasync,
- #ifdef CONFIG_COMPAT
- 	.compat_ioctl = drm_compat_ioctl,
- #endif
-diff --git a/drivers/gpu/drm/nouveau/nouveau_drm.c b/drivers/gpu/drm/nouveau/nouveau_drm.c
-index 421815b1ef93..375ccf75fd73 100644
---- a/drivers/gpu/drm/nouveau/nouveau_drm.c
-+++ b/drivers/gpu/drm/nouveau/nouveau_drm.c
-@@ -664,7 +664,6 @@ nouveau_driver_fops = {
- 	.unlocked_ioctl = drm_ioctl,
- 	.mmap = nouveau_ttm_mmap,
- 	.poll = drm_poll,
--	.fasync = drm_fasync,
- 	.read = drm_read,
- #if defined(CONFIG_COMPAT)
- 	.compat_ioctl = nouveau_compat_ioctl,
-diff --git a/drivers/gpu/drm/omapdrm/omap_drv.c b/drivers/gpu/drm/omapdrm/omap_drv.c
-index f69f9f6785e8..04b94dc38e2c 100644
---- a/drivers/gpu/drm/omapdrm/omap_drv.c
-+++ b/drivers/gpu/drm/omapdrm/omap_drv.c
-@@ -583,7 +583,6 @@ static const struct file_operations omapdriver_fops = {
- 		.release = drm_release,
- 		.mmap = omap_gem_mmap,
- 		.poll = drm_poll,
--		.fasync = drm_fasync,
- 		.read = drm_read,
- 		.llseek = noop_llseek,
- };
-diff --git a/drivers/gpu/drm/qxl/qxl_drv.c b/drivers/gpu/drm/qxl/qxl_drv.c
-index 60cb159c4f7d..c0302c5a397c 100644
---- a/drivers/gpu/drm/qxl/qxl_drv.c
-+++ b/drivers/gpu/drm/qxl/qxl_drv.c
-@@ -86,7 +86,6 @@ static const struct file_operations qxl_fops = {
- 	.release = drm_release,
- 	.unlocked_ioctl = drm_ioctl,
- 	.poll = drm_poll,
--	.fasync = drm_fasync,
- 	.mmap = qxl_mmap,
- };
- 
-diff --git a/drivers/gpu/drm/r128/r128_drv.c b/drivers/gpu/drm/r128/r128_drv.c
-index 472c38fe123f..c2338cbc56ad 100644
---- a/drivers/gpu/drm/r128/r128_drv.c
-+++ b/drivers/gpu/drm/r128/r128_drv.c
-@@ -48,7 +48,6 @@ static const struct file_operations r128_driver_fops = {
- 	.unlocked_ioctl = drm_ioctl,
- 	.mmap = drm_mmap,
- 	.poll = drm_poll,
--	.fasync = drm_fasync,
- #ifdef CONFIG_COMPAT
- 	.compat_ioctl = r128_compat_ioctl,
- #endif
-diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c
-index cb84df3114a6..3c5f6420319e 100644
---- a/drivers/gpu/drm/radeon/radeon_drv.c
-+++ b/drivers/gpu/drm/radeon/radeon_drv.c
-@@ -259,7 +259,6 @@ static const struct file_operations radeon_driver_old_fops = {
- 	.unlocked_ioctl = drm_ioctl,
- 	.mmap = drm_mmap,
- 	.poll = drm_poll,
--	.fasync = drm_fasync,
- 	.read = drm_read,
- #ifdef CONFIG_COMPAT
- 	.compat_ioctl = radeon_compat_ioctl,
-@@ -368,7 +367,6 @@ static const struct file_operations radeon_driver_kms_fops = {
- 	.unlocked_ioctl = drm_ioctl,
- 	.mmap = radeon_mmap,
- 	.poll = drm_poll,
--	.fasync = drm_fasync,
- 	.read = drm_read,
- #ifdef CONFIG_COMPAT
- 	.compat_ioctl = radeon_kms_compat_ioctl,
-diff --git a/drivers/gpu/drm/savage/savage_drv.c b/drivers/gpu/drm/savage/savage_drv.c
-index 71b2081e7835..9135c8bd6fbc 100644
---- a/drivers/gpu/drm/savage/savage_drv.c
-+++ b/drivers/gpu/drm/savage/savage_drv.c
-@@ -42,7 +42,6 @@ static const struct file_operations savage_driver_fops = {
- 	.unlocked_ioctl = drm_ioctl,
- 	.mmap = drm_mmap,
- 	.poll = drm_poll,
--	.fasync = drm_fasync,
- #ifdef CONFIG_COMPAT
- 	.compat_ioctl = drm_compat_ioctl,
- #endif
-diff --git a/drivers/gpu/drm/shmobile/shmob_drm_drv.c b/drivers/gpu/drm/shmobile/shmob_drm_drv.c
-index 946bd28bf5da..6ae63613cfe1 100644
---- a/drivers/gpu/drm/shmobile/shmob_drm_drv.c
-+++ b/drivers/gpu/drm/shmobile/shmob_drm_drv.c
-@@ -267,7 +267,6 @@ static const struct file_operations shmob_drm_fops = {
- #endif
- 	.poll		= drm_poll,
- 	.read		= drm_read,
--	.fasync		= drm_fasync,
- 	.llseek		= no_llseek,
- 	.mmap		= drm_gem_cma_mmap,
- };
-diff --git a/drivers/gpu/drm/sis/sis_drv.c b/drivers/gpu/drm/sis/sis_drv.c
-index 5a5325e6b759..b88b2d302105 100644
---- a/drivers/gpu/drm/sis/sis_drv.c
-+++ b/drivers/gpu/drm/sis/sis_drv.c
-@@ -72,7 +72,6 @@ static const struct file_operations sis_driver_fops = {
- 	.unlocked_ioctl = drm_ioctl,
- 	.mmap = drm_mmap,
- 	.poll = drm_poll,
--	.fasync = drm_fasync,
- #ifdef CONFIG_COMPAT
- 	.compat_ioctl = drm_compat_ioctl,
- #endif
-diff --git a/drivers/gpu/drm/tdfx/tdfx_drv.c b/drivers/gpu/drm/tdfx/tdfx_drv.c
-index ddfa743459d0..951ec13e4e5c 100644
---- a/drivers/gpu/drm/tdfx/tdfx_drv.c
-+++ b/drivers/gpu/drm/tdfx/tdfx_drv.c
-@@ -48,7 +48,6 @@ static const struct file_operations tdfx_driver_fops = {
- 	.unlocked_ioctl = drm_ioctl,
- 	.mmap = drm_mmap,
- 	.poll = drm_poll,
--	.fasync = drm_fasync,
- #ifdef CONFIG_COMPAT
- 	.compat_ioctl = drm_compat_ioctl,
- #endif
-diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.c b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
-index bba8daf9230c..cf4f0237a053 100644
---- a/drivers/gpu/drm/tilcdc/tilcdc_drv.c
-+++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.c
-@@ -468,7 +468,6 @@ static const struct file_operations fops = {
- #endif
- 	.poll               = drm_poll,
- 	.read               = drm_read,
--	.fasync             = drm_fasync,
- 	.llseek             = no_llseek,
- 	.mmap               = drm_gem_cma_mmap,
- };
-diff --git a/drivers/gpu/drm/udl/udl_drv.c b/drivers/gpu/drm/udl/udl_drv.c
-index bb0af58c769a..7650dc0d78ce 100644
---- a/drivers/gpu/drm/udl/udl_drv.c
-+++ b/drivers/gpu/drm/udl/udl_drv.c
-@@ -65,7 +65,6 @@ static const struct file_operations udl_driver_fops = {
- 	.read = drm_read,
- 	.unlocked_ioctl	= drm_ioctl,
- 	.release = drm_release,
--	.fasync = drm_fasync,
- #ifdef CONFIG_COMPAT
- 	.compat_ioctl = drm_compat_ioctl,
- #endif
-diff --git a/drivers/gpu/drm/via/via_drv.c b/drivers/gpu/drm/via/via_drv.c
-index f4ae20327941..448799968a06 100644
---- a/drivers/gpu/drm/via/via_drv.c
-+++ b/drivers/gpu/drm/via/via_drv.c
-@@ -64,7 +64,6 @@ static const struct file_operations via_driver_fops = {
- 	.unlocked_ioctl = drm_ioctl,
- 	.mmap = drm_mmap,
- 	.poll = drm_poll,
--	.fasync = drm_fasync,
- #ifdef CONFIG_COMPAT
- 	.compat_ioctl = drm_compat_ioctl,
- #endif
-diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
-index 46ebf7312dc9..6993713588e3 100644
---- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
-+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
-@@ -1129,7 +1129,6 @@ static const struct file_operations vmwgfx_driver_fops = {
- 	.mmap = vmw_mmap,
- 	.poll = vmw_fops_poll,
- 	.read = vmw_fops_read,
--	.fasync = drm_fasync,
- #if defined(CONFIG_COMPAT)
- 	.compat_ioctl = drm_compat_ioctl,
- #endif
-diff --git a/drivers/gpu/host1x/drm/drm.c b/drivers/gpu/host1x/drm/drm.c
-index c114080d0d58..26dc190fd4fe 100644
---- a/drivers/gpu/host1x/drm/drm.c
-+++ b/drivers/gpu/host1x/drm/drm.c
-@@ -500,7 +500,6 @@ static const struct file_operations tegra_drm_fops = {
- 	.unlocked_ioctl = drm_ioctl,
- 	.mmap = tegra_drm_mmap,
- 	.poll = drm_poll,
--	.fasync = drm_fasync,
- 	.read = drm_read,
- #ifdef CONFIG_COMPAT
- 	.compat_ioctl = drm_compat_ioctl,
-diff --git a/drivers/staging/imx-drm/imx-drm-core.c b/drivers/staging/imx-drm/imx-drm-core.c
-index f2a07af5cd5e..33eb04e79dfe 100644
---- a/drivers/staging/imx-drm/imx-drm-core.c
-+++ b/drivers/staging/imx-drm/imx-drm-core.c
-@@ -207,7 +207,6 @@ static const struct file_operations imx_drm_driver_fops = {
- 	.unlocked_ioctl = drm_ioctl,
- 	.mmap = drm_gem_cma_mmap,
- 	.poll = drm_poll,
--	.fasync = drm_fasync,
- 	.read = drm_read,
- 	.llseek = noop_llseek,
- };
-diff --git a/include/drm/drmP.h b/include/drm/drmP.h
-index f8ad91bc0f94..7c1570d815aa 100644
---- a/include/drm/drmP.h
-+++ b/include/drm/drmP.h
-@@ -1169,8 +1169,6 @@ struct drm_device {
- 
- 	/*@} */
- 
--	struct fasync_struct *buf_async;/**< Processes waiting for SIGIO */
--
- 	struct drm_agp_head *agp;	/**< AGP data */
- 
- 	struct device *dev;             /**< Device structure */
-@@ -1306,7 +1304,6 @@ extern int drm_lastclose(struct drm_device *dev);
- extern struct mutex drm_global_mutex;
- extern int drm_open(struct inode *inode, struct file *filp);
- extern int drm_stub_open(struct inode *inode, struct file *filp);
--extern int drm_fasync(int fd, struct file *filp, int on);
- extern ssize_t drm_read(struct file *filp, char __user *buffer,
- 			size_t count, loff_t *offset);
- extern int drm_release(struct inode *inode, struct file *filp);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0663-drm-use-common-drm_gem_dmabuf_release-in-i915-exynos.patch b/patches.baytrail/0663-drm-use-common-drm_gem_dmabuf_release-in-i915-exynos.patch
deleted file mode 100644
index 5b0c349bae40f..0000000000000
--- a/patches.baytrail/0663-drm-use-common-drm_gem_dmabuf_release-in-i915-exynos.patch
+++ /dev/null
@@ -1,139 +0,0 @@
-From 36de0db4d8b9b47670a0fea0cd232d2adca312c0 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 15 Aug 2013 00:02:30 +0200
-Subject: drm: use common drm_gem_dmabuf_release in i915/exynos drivers
-
-Note that this is slightly tricky since both drivers store their
-native objects in dma_buf->priv. But both also embed the base
-drm_gem_object at the first position, so the implicit cast is ok.
-
-To use the release helper we need to export it, too.
-
-Cc: Inki Dae <inki.dae@samsung.com>
-Cc: Intel Graphics Development <intel-gfx@lists.freedesktop.org>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit c1d6798d20eed38b842eee01813ca6c48630d563)
-Signed-off-by: James Ausmus <james.ausmus@intel.com>
-
-Conflicts:
-	drivers/gpu/drm/exynos/exynos_drm_dmabuf.c
-	(context changes)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_prime.c                |  3 ++-
- drivers/gpu/drm/exynos/exynos_drm_dmabuf.c | 25 +------------------------
- drivers/gpu/drm/i915/i915_gem_dmabuf.c     | 13 +------------
- include/drm/drmP.h                         |  1 +
- 4 files changed, 5 insertions(+), 37 deletions(-)
-
-diff --git a/drivers/gpu/drm/drm_prime.c b/drivers/gpu/drm/drm_prime.c
-index 5b7b9110254b..330df93ad2d2 100644
---- a/drivers/gpu/drm/drm_prime.c
-+++ b/drivers/gpu/drm/drm_prime.c
-@@ -89,7 +89,7 @@ static void drm_gem_unmap_dma_buf(struct dma_buf_attachment *attach,
- 	kfree(sgt);
- }
- 
--static void drm_gem_dmabuf_release(struct dma_buf *dma_buf)
-+void drm_gem_dmabuf_release(struct dma_buf *dma_buf)
- {
- 	struct drm_gem_object *obj = dma_buf->priv;
- 
-@@ -99,6 +99,7 @@ static void drm_gem_dmabuf_release(struct dma_buf *dma_buf)
- 		drm_gem_object_unreference_unlocked(obj);
- 	}
- }
-+EXPORT_SYMBOL(drm_gem_dmabuf_release);
- 
- static void *drm_gem_dmabuf_vmap(struct dma_buf *dma_buf)
- {
-diff --git a/drivers/gpu/drm/exynos/exynos_drm_dmabuf.c b/drivers/gpu/drm/exynos/exynos_drm_dmabuf.c
-index ff7f2a886a34..ec722e228c82 100644
---- a/drivers/gpu/drm/exynos/exynos_drm_dmabuf.c
-+++ b/drivers/gpu/drm/exynos/exynos_drm_dmabuf.c
-@@ -129,29 +129,6 @@ static void exynos_gem_unmap_dma_buf(struct dma_buf_attachment *attach,
- 	/* Nothing to do. */
- }
- 
--static void exynos_dmabuf_release(struct dma_buf *dmabuf)
--{
--	struct exynos_drm_gem_obj *exynos_gem_obj = dmabuf->priv;
--
--	DRM_DEBUG_PRIME("%s\n", __FILE__);
--
--	/*
--	 * exynos_dmabuf_release() call means that file object's
--	 * f_count is 0 and it calls drm_gem_object_handle_unreference()
--	 * to drop the references that these values had been increased
--	 * at drm_prime_handle_to_fd()
--	 */
--	if (exynos_gem_obj->base.export_dma_buf == dmabuf) {
--		exynos_gem_obj->base.export_dma_buf = NULL;
--
--		/*
--		 * drop this gem object refcount to release allocated buffer
--		 * and resources.
--		 */
--		drm_gem_object_unreference_unlocked(&exynos_gem_obj->base);
--	}
--}
--
- static void *exynos_gem_dmabuf_kmap_atomic(struct dma_buf *dma_buf,
- 						unsigned long page_num)
- {
-@@ -197,7 +174,7 @@ static struct dma_buf_ops exynos_dmabuf_ops = {
- 	.kunmap			= exynos_gem_dmabuf_kunmap,
- 	.kunmap_atomic		= exynos_gem_dmabuf_kunmap_atomic,
- 	.mmap			= exynos_gem_dmabuf_mmap,
--	.release		= exynos_dmabuf_release,
-+	.release		= drm_gem_dmabuf_release,
- };
- 
- struct dma_buf *exynos_dmabuf_prime_export(struct drm_device *drm_dev,
-diff --git a/drivers/gpu/drm/i915/i915_gem_dmabuf.c b/drivers/gpu/drm/i915/i915_gem_dmabuf.c
-index 6ed7275d0900..f7e1682ddb8b 100644
---- a/drivers/gpu/drm/i915/i915_gem_dmabuf.c
-+++ b/drivers/gpu/drm/i915/i915_gem_dmabuf.c
-@@ -98,17 +98,6 @@ static void i915_gem_unmap_dma_buf(struct dma_buf_attachment *attachment,
- 	mutex_unlock(&obj->base.dev->struct_mutex);
- }
- 
--static void i915_gem_dmabuf_release(struct dma_buf *dma_buf)
--{
--	struct drm_i915_gem_object *obj = dma_buf->priv;
--
--	if (obj->base.export_dma_buf == dma_buf) {
--		/* drop the reference on the export fd holds */
--		obj->base.export_dma_buf = NULL;
--		drm_gem_object_unreference_unlocked(&obj->base);
--	}
--}
--
- static void *i915_gem_dmabuf_vmap(struct dma_buf *dma_buf)
- {
- 	struct drm_i915_gem_object *obj = dma_buf->priv;
-@@ -219,7 +208,7 @@ static int i915_gem_begin_cpu_access(struct dma_buf *dma_buf, size_t start, size
- static const struct dma_buf_ops i915_dmabuf_ops =  {
- 	.map_dma_buf = i915_gem_map_dma_buf,
- 	.unmap_dma_buf = i915_gem_unmap_dma_buf,
--	.release = i915_gem_dmabuf_release,
-+	.release = drm_gem_dmabuf_release,
- 	.kmap = i915_gem_dmabuf_kmap,
- 	.kmap_atomic = i915_gem_dmabuf_kmap_atomic,
- 	.kunmap = i915_gem_dmabuf_kunmap,
-diff --git a/include/drm/drmP.h b/include/drm/drmP.h
-index 7c1570d815aa..0c4bad10e928 100644
---- a/include/drm/drmP.h
-+++ b/include/drm/drmP.h
-@@ -1566,6 +1566,7 @@ extern struct drm_gem_object *drm_gem_prime_import(struct drm_device *dev,
- 		struct dma_buf *dma_buf);
- extern int drm_gem_prime_fd_to_handle(struct drm_device *dev,
- 		struct drm_file *file_priv, int prime_fd, uint32_t *handle);
-+extern void drm_gem_dmabuf_release(struct dma_buf *dma_buf);
- 
- extern int drm_prime_handle_to_fd_ioctl(struct drm_device *dev, void *data,
- 					struct drm_file *file_priv);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0664-drm-Update-drm_addmap-and-drm_mmap-to-use-PAT-WC-ins.patch b/patches.baytrail/0664-drm-Update-drm_addmap-and-drm_mmap-to-use-PAT-WC-ins.patch
deleted file mode 100644
index 7bd850a7340aa..0000000000000
--- a/patches.baytrail/0664-drm-Update-drm_addmap-and-drm_mmap-to-use-PAT-WC-ins.patch
+++ /dev/null
@@ -1,127 +0,0 @@
-From c538b99d426c9871a35edb9dafeb1cf9b5918003 Mon Sep 17 00:00:00 2001
-From: Andy Lutomirski <luto@amacapital.net>
-Date: Mon, 13 May 2013 23:58:42 +0000
-Subject: drm: Update drm_addmap and drm_mmap to use PAT WC instead of MTRRs
-
-Previously, DRM_FRAME_BUFFER mappings, as well as DRM_REGISTERS
-mappings with DRM_WRITE_COMBINING set, resulted in an unconditional
-MTRR being added but the actual mappings being created as UC-.
-
-Now these mappings have the MTRR added only if needed, but they will
-be mapped with pgprot_writecombine.
-
-The non-WC DRM_REGISTERS case now uses pgprot_noncached instead of
-hardcoding the bit twiddling.
-
-The DRM_AGP case is unchanged for now.
-
-[airlied: fix ppc build]
-Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Signed-off-by: Andy Lutomirski <luto@amacapital.net>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-
-(cherry picked from commit ff47eaf24d01b5753e4964b10c606e0d711b143e)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_bufs.c | 17 +++++++++--------
- drivers/gpu/drm/drm_vm.c   | 25 ++++++++++++-------------
- 2 files changed, 21 insertions(+), 21 deletions(-)
-
-diff --git a/drivers/gpu/drm/drm_bufs.c b/drivers/gpu/drm/drm_bufs.c
-index 0128147265f3..0190fce20078 100644
---- a/drivers/gpu/drm/drm_bufs.c
-+++ b/drivers/gpu/drm/drm_bufs.c
-@@ -210,12 +210,16 @@ static int drm_addmap_core(struct drm_device * dev, resource_size_t offset,
- 		if (drm_core_has_MTRR(dev)) {
- 			if (map->type == _DRM_FRAME_BUFFER ||
- 			    (map->flags & _DRM_WRITE_COMBINING)) {
--				map->mtrr = mtrr_add(map->offset, map->size,
--						     MTRR_TYPE_WRCOMB, 1);
-+				map->mtrr =
-+					arch_phys_wc_add(map->offset, map->size);
- 			}
- 		}
- 		if (map->type == _DRM_REGISTERS) {
--			map->handle = ioremap(map->offset, map->size);
-+			if (map->flags & _DRM_WRITE_COMBINING)
-+				map->handle = ioremap_wc(map->offset,
-+							 map->size);
-+			else
-+				map->handle = ioremap(map->offset, map->size);
- 			if (!map->handle) {
- 				kfree(map);
- 				return -ENOMEM;
-@@ -451,11 +455,8 @@ int drm_rmmap_locked(struct drm_device *dev, struct drm_local_map *map)
- 		iounmap(map->handle);
- 		/* FALLTHROUGH */
- 	case _DRM_FRAME_BUFFER:
--		if (drm_core_has_MTRR(dev) && map->mtrr >= 0) {
--			int retcode;
--			retcode = mtrr_del(map->mtrr, map->offset, map->size);
--			DRM_DEBUG("mtrr_del=%d\n", retcode);
--		}
-+		if (drm_core_has_MTRR(dev))
-+			arch_phys_wc_del(map->mtrr);
- 		break;
- 	case _DRM_SHM:
- 		vfree(map->handle);
-diff --git a/drivers/gpu/drm/drm_vm.c b/drivers/gpu/drm/drm_vm.c
-index 1d4f7c9fe661..43e7825d3717 100644
---- a/drivers/gpu/drm/drm_vm.c
-+++ b/drivers/gpu/drm/drm_vm.c
-@@ -43,18 +43,22 @@
- static void drm_vm_open(struct vm_area_struct *vma);
- static void drm_vm_close(struct vm_area_struct *vma);
- 
--static pgprot_t drm_io_prot(uint32_t map_type, struct vm_area_struct *vma)
-+static pgprot_t drm_io_prot(struct drm_local_map *map,
-+			    struct vm_area_struct *vma)
- {
- 	pgprot_t tmp = vm_get_page_prot(vma->vm_flags);
- 
- #if defined(__i386__) || defined(__x86_64__)
--	if (boot_cpu_data.x86 > 3 && map_type != _DRM_AGP) {
--		pgprot_val(tmp) |= _PAGE_PCD;
--		pgprot_val(tmp) &= ~_PAGE_PWT;
-+	if (map->type != _DRM_AGP) {
-+		if (map->type == _DRM_FRAME_BUFFER ||
-+		    map->flags & _DRM_WRITE_COMBINING)
-+			tmp = pgprot_writecombine(tmp);
-+		else
-+			tmp = pgprot_noncached(tmp);
- 	}
- #elif defined(__powerpc__)
- 	pgprot_val(tmp) |= _PAGE_NO_CACHE;
--	if (map_type == _DRM_REGISTERS)
-+	if (map->type == _DRM_REGISTERS)
- 		pgprot_val(tmp) |= _PAGE_GUARDED;
- #elif defined(__ia64__)
- 	if (efi_range_is_wc(vma->vm_start, vma->vm_end -
-@@ -250,13 +254,8 @@ static void drm_vm_shm_close(struct vm_area_struct *vma)
- 			switch (map->type) {
- 			case _DRM_REGISTERS:
- 			case _DRM_FRAME_BUFFER:
--				if (drm_core_has_MTRR(dev) && map->mtrr >= 0) {
--					int retcode;
--					retcode = mtrr_del(map->mtrr,
--							   map->offset,
--							   map->size);
--					DRM_DEBUG("mtrr_del = %d\n", retcode);
--				}
-+				if (drm_core_has_MTRR(dev))
-+					arch_phys_wc_del(map->mtrr);
- 				iounmap(map->handle);
- 				break;
- 			case _DRM_SHM:
-@@ -618,7 +617,7 @@ int drm_mmap_locked(struct file *filp, struct vm_area_struct *vma)
- 	case _DRM_REGISTERS:
- 		offset = drm_core_get_reg_ofs(dev);
- 		vma->vm_flags |= VM_IO;	/* not in core dump */
--		vma->vm_page_prot = drm_io_prot(map->type, vma);
-+		vma->vm_page_prot = drm_io_prot(map, vma);
- 		if (io_remap_pfn_range(vma, vma->vm_start,
- 				       (map->offset + offset) >> PAGE_SHIFT,
- 				       vma->vm_end - vma->vm_start,
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0665-drm-agpgart-Use-pgprot_writecombine-for-AGP-maps-and.patch b/patches.baytrail/0665-drm-agpgart-Use-pgprot_writecombine-for-AGP-maps-and.patch
deleted file mode 100644
index b8504029c7b87..0000000000000
--- a/patches.baytrail/0665-drm-agpgart-Use-pgprot_writecombine-for-AGP-maps-and.patch
+++ /dev/null
@@ -1,124 +0,0 @@
-From 0befbca168c6420ed27682d74ca4768fd15b0128 Mon Sep 17 00:00:00 2001
-From: Andy Lutomirski <luto@amacapital.net>
-Date: Mon, 13 May 2013 23:58:43 +0000
-Subject: drm, agpgart: Use pgprot_writecombine for AGP maps and make the MTRR
- optional
-
-I'm not sure I understand the intent of the previous behavior.  mmap
-on /dev/agpgart and DRM_AGP maps had no cache flags set, so they
-would be fully cacheable.  But the DRM code (most of the time) would
-add a write-combining MTRR that would change the effective memory
-type to WC.
-
-The new behavior just requests WC explicitly for all AGP maps.
-
-If there is any code out there that expects cacheable access to the
-AGP aperture (because the drm driver doesn't request an MTRR or
-because it's using /dev/agpgart directly), then it will now end up
-with a UC or WC mapping, depending on the architecture and PAT
-availability.  But cacheable access to the aperture seems like it's
-asking for trouble, because, AIUI, the aperture is an alias of RAM.
-
-Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Signed-off-by: Andy Lutomirski <luto@amacapital.net>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit f435046d38af631920b299455db9e95dfc06d055)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/char/agp/frontend.c |  8 +++++---
- drivers/gpu/drm/drm_pci.c   |  8 ++++----
- drivers/gpu/drm/drm_stub.c  | 10 ++--------
- drivers/gpu/drm/drm_vm.c    | 11 ++++-------
- 4 files changed, 15 insertions(+), 22 deletions(-)
-
-diff --git a/drivers/char/agp/frontend.c b/drivers/char/agp/frontend.c
-index 2e044338753c..1b192395a90c 100644
---- a/drivers/char/agp/frontend.c
-+++ b/drivers/char/agp/frontend.c
-@@ -603,7 +603,8 @@ static int agp_mmap(struct file *file, struct vm_area_struct *vma)
- 			vma->vm_ops = kerninfo.vm_ops;
- 		} else if (io_remap_pfn_range(vma, vma->vm_start,
- 				(kerninfo.aper_base + offset) >> PAGE_SHIFT,
--					    size, vma->vm_page_prot)) {
-+				size,
-+				pgprot_writecombine(vma->vm_page_prot))) {
- 			goto out_again;
- 		}
- 		mutex_unlock(&(agp_fe.agp_mutex));
-@@ -618,8 +619,9 @@ static int agp_mmap(struct file *file, struct vm_area_struct *vma)
- 		if (kerninfo.vm_ops) {
- 			vma->vm_ops = kerninfo.vm_ops;
- 		} else if (io_remap_pfn_range(vma, vma->vm_start,
--					    kerninfo.aper_base >> PAGE_SHIFT,
--					    size, vma->vm_page_prot)) {
-+				kerninfo.aper_base >> PAGE_SHIFT,
-+				size,
-+				pgprot_writecombine(vma->vm_page_prot))) {
- 			goto out_again;
- 		}
- 		mutex_unlock(&(agp_fe.agp_mutex));
-diff --git a/drivers/gpu/drm/drm_pci.c b/drivers/gpu/drm/drm_pci.c
-index 14194b6ef644..80c0b2b29801 100644
---- a/drivers/gpu/drm/drm_pci.c
-+++ b/drivers/gpu/drm/drm_pci.c
-@@ -278,10 +278,10 @@ static int drm_pci_agp_init(struct drm_device *dev)
- 		}
- 		if (drm_core_has_MTRR(dev)) {
- 			if (dev->agp)
--				dev->agp->agp_mtrr =
--					mtrr_add(dev->agp->agp_info.aper_base,
--						 dev->agp->agp_info.aper_size *
--						 1024 * 1024, MTRR_TYPE_WRCOMB, 1);
-+				dev->agp->agp_mtrr = arch_phys_wc_add(
-+					dev->agp->agp_info.aper_base,
-+					dev->agp->agp_info.aper_size *
-+					1024 * 1024);
- 		}
- 	}
- 	return 0;
-diff --git a/drivers/gpu/drm/drm_stub.c b/drivers/gpu/drm/drm_stub.c
-index 16f3ec579b3b..577786ce9fbc 100644
---- a/drivers/gpu/drm/drm_stub.c
-+++ b/drivers/gpu/drm/drm_stub.c
-@@ -451,14 +451,8 @@ void drm_put_dev(struct drm_device *dev)
- 
- 	drm_lastclose(dev);
- 
--	if (drm_core_has_MTRR(dev) && drm_core_has_AGP(dev) &&
--	    dev->agp && dev->agp->agp_mtrr >= 0) {
--		int retval;
--		retval = mtrr_del(dev->agp->agp_mtrr,
--				  dev->agp->agp_info.aper_base,
--				  dev->agp->agp_info.aper_size * 1024 * 1024);
--		DRM_DEBUG("mtrr_del=%d\n", retval);
--	}
-+	if (drm_core_has_MTRR(dev) && drm_core_has_AGP(dev) && dev->agp)
-+		arch_phys_wc_del(dev->agp->agp_mtrr);
- 
- 	if (dev->driver->unload)
- 		dev->driver->unload(dev);
-diff --git a/drivers/gpu/drm/drm_vm.c b/drivers/gpu/drm/drm_vm.c
-index 43e7825d3717..1575694ccaca 100644
---- a/drivers/gpu/drm/drm_vm.c
-+++ b/drivers/gpu/drm/drm_vm.c
-@@ -49,13 +49,10 @@ static pgprot_t drm_io_prot(struct drm_local_map *map,
- 	pgprot_t tmp = vm_get_page_prot(vma->vm_flags);
- 
- #if defined(__i386__) || defined(__x86_64__)
--	if (map->type != _DRM_AGP) {
--		if (map->type == _DRM_FRAME_BUFFER ||
--		    map->flags & _DRM_WRITE_COMBINING)
--			tmp = pgprot_writecombine(tmp);
--		else
--			tmp = pgprot_noncached(tmp);
--	}
-+	if (map->type == _DRM_REGISTERS && !(map->flags & _DRM_WRITE_COMBINING))
-+		tmp = pgprot_noncached(tmp);
-+	else
-+		tmp = pgprot_writecombine(tmp);
- #elif defined(__powerpc__)
- 	pgprot_val(tmp) |= _PAGE_NO_CACHE;
- 	if (map->type == _DRM_REGISTERS)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0666-drm-agp-move-AGP-cleanup-paths-to-drm_agpsupport.c.patch b/patches.baytrail/0666-drm-agp-move-AGP-cleanup-paths-to-drm_agpsupport.c.patch
deleted file mode 100644
index 19d208a8072c4..0000000000000
--- a/patches.baytrail/0666-drm-agp-move-AGP-cleanup-paths-to-drm_agpsupport.c.patch
+++ /dev/null
@@ -1,193 +0,0 @@
-From 01442c7bcb90339b0abab3caffce62909f3aab2d Mon Sep 17 00:00:00 2001
-From: David Herrmann <dh.herrmann@gmail.com>
-Date: Sat, 27 Jul 2013 16:37:00 +0200
-Subject: drm/agp: move AGP cleanup paths to drm_agpsupport.c
-
-Introduce two new helpers, drm_agp_clear() and drm_agp_destroy() which
-clear all AGP mappings and destroy the AGP head. This allows to reduce the
-AGP code in core DRM and move it all to drm_agpsupport.c.
-
-Signed-off-by: David Herrmann <dh.herrmann@gmail.com>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit 28ec711cd427f8b61f73712a43b8100ba8ca933b)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_agpsupport.c | 51 ++++++++++++++++++++++++++++++++++++++++
- drivers/gpu/drm/drm_drv.c        | 21 +----------------
- drivers/gpu/drm/drm_pci.c        | 12 ++++++++++
- drivers/gpu/drm/drm_stub.c       |  9 ++-----
- include/drm/drmP.h               |  3 +++
- 5 files changed, 69 insertions(+), 27 deletions(-)
-
-diff --git a/drivers/gpu/drm/drm_agpsupport.c b/drivers/gpu/drm/drm_agpsupport.c
-index 3d8fed179797..e301d653d97e 100644
---- a/drivers/gpu/drm/drm_agpsupport.c
-+++ b/drivers/gpu/drm/drm_agpsupport.c
-@@ -424,6 +424,57 @@ struct drm_agp_head *drm_agp_init(struct drm_device *dev)
- }
- 
- /**
-+ * drm_agp_clear - Clear AGP resource list
-+ * @dev: DRM device
-+ *
-+ * Iterate over all AGP resources and remove them. But keep the AGP head
-+ * intact so it can still be used. It is safe to call this if AGP is disabled or
-+ * was already removed.
-+ *
-+ * If DRIVER_MODESET is active, nothing is done to protect the modesetting
-+ * resources from getting destroyed. Drivers are responsible of cleaning them up
-+ * during device shutdown.
-+ */
-+void drm_agp_clear(struct drm_device *dev)
-+{
-+	struct drm_agp_mem *entry, *tempe;
-+
-+	if (!drm_core_has_AGP(dev) || !dev->agp)
-+		return;
-+	if (drm_core_check_feature(dev, DRIVER_MODESET))
-+		return;
-+
-+	list_for_each_entry_safe(entry, tempe, &dev->agp->memory, head) {
-+		if (entry->bound)
-+			drm_unbind_agp(entry->memory);
-+		drm_free_agp(entry->memory, entry->pages);
-+		kfree(entry);
-+	}
-+	INIT_LIST_HEAD(&dev->agp->memory);
-+
-+	if (dev->agp->acquired)
-+		drm_agp_release(dev);
-+
-+	dev->agp->acquired = 0;
-+	dev->agp->enabled = 0;
-+}
-+
-+/**
-+ * drm_agp_destroy - Destroy AGP head
-+ * @dev: DRM device
-+ *
-+ * Destroy resources that were previously allocated via drm_agp_initp. Caller
-+ * must ensure to clean up all AGP resources before calling this. See
-+ * drm_agp_clear().
-+ *
-+ * Call this to destroy AGP heads allocated via drm_agp_init().
-+ */
-+void drm_agp_destroy(struct drm_agp_head *agp)
-+{
-+	kfree(agp);
-+}
-+
-+/**
-  * Binds a collection of pages into AGP memory at the given offset, returning
-  * the AGP memory structure containing them.
-  *
-diff --git a/drivers/gpu/drm/drm_drv.c b/drivers/gpu/drm/drm_drv.c
-index 2ab782cb38a2..2994cd7513e9 100644
---- a/drivers/gpu/drm/drm_drv.c
-+++ b/drivers/gpu/drm/drm_drv.c
-@@ -194,27 +194,8 @@ int drm_lastclose(struct drm_device * dev)
- 
- 	mutex_lock(&dev->struct_mutex);
- 
--	/* Clear AGP information */
--	if (drm_core_has_AGP(dev) && dev->agp &&
--			!drm_core_check_feature(dev, DRIVER_MODESET)) {
--		struct drm_agp_mem *entry, *tempe;
--
--		/* Remove AGP resources, but leave dev->agp
--		   intact until drv_cleanup is called. */
--		list_for_each_entry_safe(entry, tempe, &dev->agp->memory, head) {
--			if (entry->bound)
--				drm_unbind_agp(entry->memory);
--			drm_free_agp(entry->memory, entry->pages);
--			kfree(entry);
--		}
--		INIT_LIST_HEAD(&dev->agp->memory);
--
--		if (dev->agp->acquired)
--			drm_agp_release(dev);
-+	drm_agp_clear(dev);
- 
--		dev->agp->acquired = 0;
--		dev->agp->enabled = 0;
--	}
- 	if (drm_core_check_feature(dev, DRIVER_SG) && dev->sg &&
- 	    !drm_core_check_feature(dev, DRIVER_MODESET)) {
- 		drm_sg_cleanup(dev->sg);
-diff --git a/drivers/gpu/drm/drm_pci.c b/drivers/gpu/drm/drm_pci.c
-index 80c0b2b29801..382e5bd699c6 100644
---- a/drivers/gpu/drm/drm_pci.c
-+++ b/drivers/gpu/drm/drm_pci.c
-@@ -287,6 +287,17 @@ static int drm_pci_agp_init(struct drm_device *dev)
- 	return 0;
- }
- 
-+static void drm_pci_agp_destroy(struct drm_device *dev)
-+{
-+	if (drm_core_has_AGP(dev) && dev->agp) {
-+		if (drm_core_has_MTRR(dev))
-+			arch_phys_wc_del(dev->agp->agp_mtrr);
-+		drm_agp_clear(dev);
-+		drm_agp_destroy(dev->agp);
-+		dev->agp = NULL;
-+	}
-+}
-+
- static struct drm_bus drm_pci_bus = {
- 	.bus_type = DRIVER_BUS_PCI,
- 	.get_irq = drm_pci_get_irq,
-@@ -295,6 +306,7 @@ static struct drm_bus drm_pci_bus = {
- 	.set_unique = drm_pci_set_unique,
- 	.irq_by_busid = drm_pci_irq_by_busid,
- 	.agp_init = drm_pci_agp_init,
-+	.agp_destroy = drm_pci_agp_destroy,
- };
- 
- /**
-diff --git a/drivers/gpu/drm/drm_stub.c b/drivers/gpu/drm/drm_stub.c
-index 577786ce9fbc..31442a45dae0 100644
---- a/drivers/gpu/drm/drm_stub.c
-+++ b/drivers/gpu/drm/drm_stub.c
-@@ -451,16 +451,11 @@ void drm_put_dev(struct drm_device *dev)
- 
- 	drm_lastclose(dev);
- 
--	if (drm_core_has_MTRR(dev) && drm_core_has_AGP(dev) && dev->agp)
--		arch_phys_wc_del(dev->agp->agp_mtrr);
--
- 	if (dev->driver->unload)
- 		dev->driver->unload(dev);
- 
--	if (drm_core_has_AGP(dev) && dev->agp) {
--		kfree(dev->agp);
--		dev->agp = NULL;
--	}
-+	if (dev->driver->bus->agp_destroy)
-+		dev->driver->bus->agp_destroy(dev);
- 
- 	drm_vblank_cleanup(dev);
- 
-diff --git a/include/drm/drmP.h b/include/drm/drmP.h
-index 0c4bad10e928..bcaf5575c79c 100644
---- a/include/drm/drmP.h
-+++ b/include/drm/drmP.h
-@@ -739,6 +739,7 @@ struct drm_bus {
- 	int (*irq_by_busid)(struct drm_device *dev, struct drm_irq_busid *p);
- 	/* hooks that are for PCI */
- 	int (*agp_init)(struct drm_device *dev);
-+	void (*agp_destroy)(struct drm_device *dev);
- 
- };
- 
-@@ -1482,6 +1483,8 @@ extern int drm_modeset_ctl(struct drm_device *dev, void *data,
- 
- 				/* AGP/GART support (drm_agpsupport.h) */
- extern struct drm_agp_head *drm_agp_init(struct drm_device *dev);
-+extern void drm_agp_destroy(struct drm_agp_head *agp);
-+extern void drm_agp_clear(struct drm_device *dev);
- extern int drm_agp_acquire(struct drm_device *dev);
- extern int drm_agp_acquire_ioctl(struct drm_device *dev, void *data,
- 				 struct drm_file *file_priv);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0667-drm-ast-cirrus-mgag200-nouveau-savage-vmwgfx-Remove-.patch b/patches.baytrail/0667-drm-ast-cirrus-mgag200-nouveau-savage-vmwgfx-Remove-.patch
deleted file mode 100644
index 7688ca7be63cf..0000000000000
--- a/patches.baytrail/0667-drm-ast-cirrus-mgag200-nouveau-savage-vmwgfx-Remove-.patch
+++ /dev/null
@@ -1,336 +0,0 @@
-From 8b57825903c47ff203da91e9b36dcd94d669f5df Mon Sep 17 00:00:00 2001
-From: Andy Lutomirski <luto@amacapital.net>
-Date: Mon, 13 May 2013 23:58:41 +0000
-Subject: drm (ast, cirrus, mgag200, nouveau, savage, vmwgfx): Remove
- drm_mtrr_{add, del}
-
-This replaces drm_mtrr_{add,del} with arch_phys_wc_{add,del}.  The
-interface is simplified (because the base and size parameters to
-drm_mtrr_del never did anything), and it no longer adds MTRRs on
-systems that don't need them.
-
-Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Signed-off-by: Andy Lutomirski <luto@amacapital.net>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit 247d36d75128ba1f63702e0e6185d9a7a23ee5cb)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/ast/ast_ttm.c         | 13 +++--------
- drivers/gpu/drm/cirrus/cirrus_ttm.c   | 15 ++++--------
- drivers/gpu/drm/mgag200/mgag200_ttm.c | 14 ++++--------
- drivers/gpu/drm/nouveau/nouveau_ttm.c | 13 ++++-------
- drivers/gpu/drm/savage/savage_bci.c   | 43 ++++++++++++-----------------------
- drivers/gpu/drm/savage/savage_drv.h   |  5 +---
- drivers/gpu/drm/vmwgfx/vmwgfx_drv.c   | 10 ++++----
- include/drm/drmP.h                    | 29 -----------------------
- 8 files changed, 35 insertions(+), 107 deletions(-)
-
-diff --git a/drivers/gpu/drm/ast/ast_ttm.c b/drivers/gpu/drm/ast/ast_ttm.c
-index d5902e21d4a3..18acdf40c97c 100644
---- a/drivers/gpu/drm/ast/ast_ttm.c
-+++ b/drivers/gpu/drm/ast/ast_ttm.c
-@@ -271,26 +271,19 @@ int ast_mm_init(struct ast_private *ast)
- 		return ret;
- 	}
- 
--	ast->fb_mtrr = drm_mtrr_add(pci_resource_start(dev->pdev, 0),
--				    pci_resource_len(dev->pdev, 0),
--				    DRM_MTRR_WC);
-+	ast->fb_mtrr = arch_phys_wc_add(pci_resource_start(dev->pdev, 0),
-+					pci_resource_len(dev->pdev, 0));
- 
- 	return 0;
- }
- 
- void ast_mm_fini(struct ast_private *ast)
- {
--	struct drm_device *dev = ast->dev;
- 	ttm_bo_device_release(&ast->ttm.bdev);
- 
- 	ast_ttm_global_release(ast);
- 
--	if (ast->fb_mtrr >= 0) {
--		drm_mtrr_del(ast->fb_mtrr,
--			     pci_resource_start(dev->pdev, 0),
--			     pci_resource_len(dev->pdev, 0), DRM_MTRR_WC);
--		ast->fb_mtrr = -1;
--	}
-+	arch_phys_wc_del(ast->fb_mtrr);
- }
- 
- void ast_ttm_placement(struct ast_bo *bo, int domain)
-diff --git a/drivers/gpu/drm/cirrus/cirrus_ttm.c b/drivers/gpu/drm/cirrus/cirrus_ttm.c
-index c18faff82651..2c62eb44d377 100644
---- a/drivers/gpu/drm/cirrus/cirrus_ttm.c
-+++ b/drivers/gpu/drm/cirrus/cirrus_ttm.c
-@@ -271,9 +271,8 @@ int cirrus_mm_init(struct cirrus_device *cirrus)
- 		return ret;
- 	}
- 
--	cirrus->fb_mtrr = drm_mtrr_add(pci_resource_start(dev->pdev, 0),
--				    pci_resource_len(dev->pdev, 0),
--				    DRM_MTRR_WC);
-+	cirrus->fb_mtrr = arch_phys_wc_add(pci_resource_start(dev->pdev, 0),
-+					   pci_resource_len(dev->pdev, 0));
- 
- 	cirrus->mm_inited = true;
- 	return 0;
-@@ -281,8 +280,6 @@ int cirrus_mm_init(struct cirrus_device *cirrus)
- 
- void cirrus_mm_fini(struct cirrus_device *cirrus)
- {
--	struct drm_device *dev = cirrus->dev;
--
- 	if (!cirrus->mm_inited)
- 		return;
- 
-@@ -290,12 +287,8 @@ void cirrus_mm_fini(struct cirrus_device *cirrus)
- 
- 	cirrus_ttm_global_release(cirrus);
- 
--	if (cirrus->fb_mtrr >= 0) {
--		drm_mtrr_del(cirrus->fb_mtrr,
--			     pci_resource_start(dev->pdev, 0),
--			     pci_resource_len(dev->pdev, 0), DRM_MTRR_WC);
--		cirrus->fb_mtrr = -1;
--	}
-+	arch_phys_wc_del(cirrus->fb_mtrr);
-+	cirrus->fb_mtrr = 0;
- }
- 
- void cirrus_ttm_placement(struct cirrus_bo *bo, int domain)
-diff --git a/drivers/gpu/drm/mgag200/mgag200_ttm.c b/drivers/gpu/drm/mgag200/mgag200_ttm.c
-index d2cb32f3c05b..6be84f047882 100644
---- a/drivers/gpu/drm/mgag200/mgag200_ttm.c
-+++ b/drivers/gpu/drm/mgag200/mgag200_ttm.c
-@@ -270,26 +270,20 @@ int mgag200_mm_init(struct mga_device *mdev)
- 		return ret;
- 	}
- 
--	mdev->fb_mtrr = drm_mtrr_add(pci_resource_start(dev->pdev, 0),
--				    pci_resource_len(dev->pdev, 0),
--				    DRM_MTRR_WC);
-+	mdev->fb_mtrr = arch_phys_wc_add(pci_resource_start(dev->pdev, 0),
-+					 pci_resource_len(dev->pdev, 0));
- 
- 	return 0;
- }
- 
- void mgag200_mm_fini(struct mga_device *mdev)
- {
--	struct drm_device *dev = mdev->dev;
- 	ttm_bo_device_release(&mdev->ttm.bdev);
- 
- 	mgag200_ttm_global_release(mdev);
- 
--	if (mdev->fb_mtrr >= 0) {
--		drm_mtrr_del(mdev->fb_mtrr,
--			     pci_resource_start(dev->pdev, 0),
--			     pci_resource_len(dev->pdev, 0), DRM_MTRR_WC);
--		mdev->fb_mtrr = -1;
--	}
-+	arch_phys_wc_del(mdev->fb_mtrr);
-+	mdev->fb_mtrr = 0;
- }
- 
- void mgag200_ttm_placement(struct mgag200_bo *bo, int domain)
-diff --git a/drivers/gpu/drm/nouveau/nouveau_ttm.c b/drivers/gpu/drm/nouveau/nouveau_ttm.c
-index f19a15a3bc03..3da985eb38cc 100644
---- a/drivers/gpu/drm/nouveau/nouveau_ttm.c
-+++ b/drivers/gpu/drm/nouveau/nouveau_ttm.c
-@@ -396,9 +396,8 @@ nouveau_ttm_init(struct nouveau_drm *drm)
- 		return ret;
- 	}
- 
--	drm->ttm.mtrr = drm_mtrr_add(pci_resource_start(dev->pdev, 1),
--				     pci_resource_len(dev->pdev, 1),
--				     DRM_MTRR_WC);
-+	drm->ttm.mtrr = arch_phys_wc_add(pci_resource_start(dev->pdev, 1),
-+					 pci_resource_len(dev->pdev, 1));
- 
- 	/* GART init */
- 	if (drm->agp.stat != ENABLED) {
-@@ -433,10 +432,6 @@ nouveau_ttm_fini(struct nouveau_drm *drm)
- 
- 	nouveau_ttm_global_release(drm);
- 
--	if (drm->ttm.mtrr >= 0) {
--		drm_mtrr_del(drm->ttm.mtrr,
--			     pci_resource_start(drm->dev->pdev, 1),
--			     pci_resource_len(drm->dev->pdev, 1), DRM_MTRR_WC);
--		drm->ttm.mtrr = -1;
--	}
-+	arch_phys_wc_del(drm->ttm.mtrr);
-+	drm->ttm.mtrr = 0;
- }
-diff --git a/drivers/gpu/drm/savage/savage_bci.c b/drivers/gpu/drm/savage/savage_bci.c
-index ce3a7d42ee43..b17d0710871a 100644
---- a/drivers/gpu/drm/savage/savage_bci.c
-+++ b/drivers/gpu/drm/savage/savage_bci.c
-@@ -570,9 +570,6 @@ int savage_driver_firstopen(struct drm_device *dev)
- 	unsigned int fb_rsrc, aper_rsrc;
- 	int ret = 0;
- 
--	dev_priv->mtrr[0].handle = -1;
--	dev_priv->mtrr[1].handle = -1;
--	dev_priv->mtrr[2].handle = -1;
- 	if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) {
- 		fb_rsrc = 0;
- 		fb_base = pci_resource_start(dev->pdev, 0);
-@@ -584,21 +581,14 @@ int savage_driver_firstopen(struct drm_device *dev)
- 		if (pci_resource_len(dev->pdev, 0) == 0x08000000) {
- 			/* Don't make MMIO write-cobining! We need 3
- 			 * MTRRs. */
--			dev_priv->mtrr[0].base = fb_base;
--			dev_priv->mtrr[0].size = 0x01000000;
--			dev_priv->mtrr[0].handle =
--			    drm_mtrr_add(dev_priv->mtrr[0].base,
--				         dev_priv->mtrr[0].size, DRM_MTRR_WC);
--			dev_priv->mtrr[1].base = fb_base + 0x02000000;
--			dev_priv->mtrr[1].size = 0x02000000;
--			dev_priv->mtrr[1].handle =
--			    drm_mtrr_add(dev_priv->mtrr[1].base,
--					 dev_priv->mtrr[1].size, DRM_MTRR_WC);
--			dev_priv->mtrr[2].base = fb_base + 0x04000000;
--			dev_priv->mtrr[2].size = 0x04000000;
--			dev_priv->mtrr[2].handle =
--			    drm_mtrr_add(dev_priv->mtrr[2].base,
--					 dev_priv->mtrr[2].size, DRM_MTRR_WC);
-+			dev_priv->mtrr_handles[0] =
-+				arch_phys_wc_add(fb_base, 0x01000000);
-+			dev_priv->mtrr_handles[1] =
-+				arch_phys_wc_add(fb_base + 0x02000000,
-+						 0x02000000);
-+			dev_priv->mtrr_handles[2] =
-+				arch_phys_wc_add(fb_base + 0x04000000,
-+						0x04000000);
- 		} else {
- 			DRM_ERROR("strange pci_resource_len %08llx\n",
- 				  (unsigned long long)
-@@ -616,11 +606,9 @@ int savage_driver_firstopen(struct drm_device *dev)
- 		if (pci_resource_len(dev->pdev, 1) == 0x08000000) {
- 			/* Can use one MTRR to cover both fb and
- 			 * aperture. */
--			dev_priv->mtrr[0].base = fb_base;
--			dev_priv->mtrr[0].size = 0x08000000;
--			dev_priv->mtrr[0].handle =
--			    drm_mtrr_add(dev_priv->mtrr[0].base,
--					 dev_priv->mtrr[0].size, DRM_MTRR_WC);
-+			dev_priv->mtrr_handles[0] =
-+				arch_phys_wc_add(fb_base,
-+						 0x08000000);
- 		} else {
- 			DRM_ERROR("strange pci_resource_len %08llx\n",
- 				  (unsigned long long)
-@@ -660,11 +648,10 @@ void savage_driver_lastclose(struct drm_device *dev)
- 	drm_savage_private_t *dev_priv = dev->dev_private;
- 	int i;
- 
--	for (i = 0; i < 3; ++i)
--		if (dev_priv->mtrr[i].handle >= 0)
--			drm_mtrr_del(dev_priv->mtrr[i].handle,
--				 dev_priv->mtrr[i].base,
--				 dev_priv->mtrr[i].size, DRM_MTRR_WC);
-+	for (i = 0; i < 3; ++i) {
-+		arch_phys_wc_del(dev_priv->mtrr_handles[i]);
-+		dev_priv->mtrr_handles[i] = 0;
-+	}
- }
- 
- int savage_driver_unload(struct drm_device *dev)
-diff --git a/drivers/gpu/drm/savage/savage_drv.h b/drivers/gpu/drm/savage/savage_drv.h
-index 5f55b21ea22d..335f8fcf1041 100644
---- a/drivers/gpu/drm/savage/savage_drv.h
-+++ b/drivers/gpu/drm/savage/savage_drv.h
-@@ -160,10 +160,7 @@ typedef struct drm_savage_private {
- 	drm_local_map_t *cmd_dma;
- 	drm_local_map_t fake_dma;
- 
--	struct {
--		int handle;
--		unsigned long base, size;
--	} mtrr[3];
-+	int mtrr_handles[3];
- 
- 	/* BCI and status-related stuff */
- 	volatile uint32_t *status_ptr, *bci_ptr;
-diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
-index 6993713588e3..a2990b8a9e5e 100644
---- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
-+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
-@@ -565,8 +565,8 @@ static int vmw_driver_load(struct drm_device *dev, unsigned long chipset)
- 		dev_priv->has_gmr = false;
- 	}
- 
--	dev_priv->mmio_mtrr = drm_mtrr_add(dev_priv->mmio_start,
--					   dev_priv->mmio_size, DRM_MTRR_WC);
-+	dev_priv->mmio_mtrr = arch_phys_wc_add(dev_priv->mmio_start,
-+					       dev_priv->mmio_size);
- 
- 	dev_priv->mmio_virt = ioremap_wc(dev_priv->mmio_start,
- 					 dev_priv->mmio_size);
-@@ -664,8 +664,7 @@ out_no_device:
- out_err4:
- 	iounmap(dev_priv->mmio_virt);
- out_err3:
--	drm_mtrr_del(dev_priv->mmio_mtrr, dev_priv->mmio_start,
--		     dev_priv->mmio_size, DRM_MTRR_WC);
-+	arch_phys_wc_del(dev_priv->mmio_mtrr);
- 	if (dev_priv->has_gmr)
- 		(void) ttm_bo_clean_mm(&dev_priv->bdev, VMW_PL_GMR);
- 	(void)ttm_bo_clean_mm(&dev_priv->bdev, TTM_PL_VRAM);
-@@ -709,8 +708,7 @@ static int vmw_driver_unload(struct drm_device *dev)
- 
- 	ttm_object_device_release(&dev_priv->tdev);
- 	iounmap(dev_priv->mmio_virt);
--	drm_mtrr_del(dev_priv->mmio_mtrr, dev_priv->mmio_start,
--		     dev_priv->mmio_size, DRM_MTRR_WC);
-+	arch_phys_wc_del(dev_priv->mmio_mtrr);
- 	if (dev_priv->has_gmr)
- 		(void)ttm_bo_clean_mm(&dev_priv->bdev, VMW_PL_GMR);
- 	(void)ttm_bo_clean_mm(&dev_priv->bdev, TTM_PL_VRAM);
-diff --git a/include/drm/drmP.h b/include/drm/drmP.h
-index bcaf5575c79c..dcd590728e9b 100644
---- a/include/drm/drmP.h
-+++ b/include/drm/drmP.h
-@@ -1239,37 +1239,8 @@ static inline int drm_core_has_MTRR(struct drm_device *dev)
- {
- 	return drm_core_check_feature(dev, DRIVER_USE_MTRR);
- }
--
--#define DRM_MTRR_WC		MTRR_TYPE_WRCOMB
--
--static inline int drm_mtrr_add(unsigned long offset, unsigned long size,
--			       unsigned int flags)
--{
--	return mtrr_add(offset, size, flags, 1);
--}
--
--static inline int drm_mtrr_del(int handle, unsigned long offset,
--			       unsigned long size, unsigned int flags)
--{
--	return mtrr_del(handle, offset, size);
--}
--
- #else
- #define drm_core_has_MTRR(dev) (0)
--
--#define DRM_MTRR_WC		0
--
--static inline int drm_mtrr_add(unsigned long offset, unsigned long size,
--			       unsigned int flags)
--{
--	return 0;
--}
--
--static inline int drm_mtrr_del(int handle, unsigned long offset,
--			       unsigned long size, unsigned int flags)
--{
--	return 0;
--}
- #endif
- 
- static inline void drm_device_set_unplugged(struct drm_device *dev)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0668-drm-Remove-mtrr_add-and-mtrr_del-fallback-hack-for-n.patch b/patches.baytrail/0668-drm-Remove-mtrr_add-and-mtrr_del-fallback-hack-for-n.patch
deleted file mode 100644
index bf6cd97219c45..0000000000000
--- a/patches.baytrail/0668-drm-Remove-mtrr_add-and-mtrr_del-fallback-hack-for-n.patch
+++ /dev/null
@@ -1,69 +0,0 @@
-From dfcf59ef1f50a127b41c653648d96aa8c8154e48 Mon Sep 17 00:00:00 2001
-From: Andy Lutomirski <luto@amacapital.net>
-Date: Mon, 13 May 2013 23:58:47 +0000
-Subject: drm: Remove mtrr_add and mtrr_del fallback hack for non-MTRR systems
-
-There are no users left in drivers/gpu.
-
-Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Signed-off-by: Andy Lutomirski <luto@amacapital.net>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit 03dae7c567d24c49e826a033df45802ac9d1d6c8)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- include/drm/drmP.h         |  5 +----
- include/drm/drm_os_linux.h | 16 ----------------
- 2 files changed, 1 insertion(+), 20 deletions(-)
-
-diff --git a/include/drm/drmP.h b/include/drm/drmP.h
-index dcd590728e9b..78dc6a19a427 100644
---- a/include/drm/drmP.h
-+++ b/include/drm/drmP.h
-@@ -55,16 +55,13 @@
- #include <linux/mm.h>
- #include <linux/cdev.h>
- #include <linux/mutex.h>
-+#include <linux/io.h>
- #include <linux/slab.h>
- #if defined(__alpha__) || defined(__powerpc__)
- #include <asm/pgtable.h>	/* For pte_wrprotect */
- #endif
--#include <asm/io.h>
- #include <asm/mman.h>
- #include <asm/uaccess.h>
--#ifdef CONFIG_MTRR
--#include <asm/mtrr.h>
--#endif
- #if defined(CONFIG_AGP) || defined(CONFIG_AGP_MODULE)
- #include <linux/types.h>
- #include <linux/agp_backend.h>
-diff --git a/include/drm/drm_os_linux.h b/include/drm/drm_os_linux.h
-index 675ddf4b441f..815fafc6b4ad 100644
---- a/include/drm/drm_os_linux.h
-+++ b/include/drm/drm_os_linux.h
-@@ -65,22 +65,6 @@ struct no_agp_kern {
- #define DRM_AGP_KERN            struct no_agp_kern
- #endif
- 
--#if !(__OS_HAS_MTRR)
--static __inline__ int mtrr_add(unsigned long base, unsigned long size,
--			       unsigned int type, char increment)
--{
--	return -ENODEV;
--}
--
--static __inline__ int mtrr_del(int reg, unsigned long base, unsigned long size)
--{
--	return -ENODEV;
--}
--
--#define MTRR_TYPE_WRCOMB     1
--
--#endif
--
- /** Other copying of data to kernel space */
- #define DRM_COPY_FROM_USER(arg1, arg2, arg3)		\
- 	copy_from_user(arg1, arg2, arg3)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0669-drm-provide-agp-dummies-for-CONFIG_AGP-n.patch b/patches.baytrail/0669-drm-provide-agp-dummies-for-CONFIG_AGP-n.patch
deleted file mode 100644
index a9c70b61ceecb..0000000000000
--- a/patches.baytrail/0669-drm-provide-agp-dummies-for-CONFIG_AGP-n.patch
+++ /dev/null
@@ -1,318 +0,0 @@
-From 6eaeb90874d8c28265c6cb2c5984928098a416c9 Mon Sep 17 00:00:00 2001
-From: David Herrmann <dh.herrmann@gmail.com>
-Date: Thu, 8 Aug 2013 22:19:12 +0200
-Subject: drm: provide agp dummies for CONFIG_AGP=n
-
-We currently rely on gcc dead-code elimination so the drm_agp_* helpers
-are not called if drm_core_has_AGP() is false. That's ugly as hell so
-provide "static inline" dummies for the case that AGP is disabled.
-
-Fixes a build-regression introduced by:
-
-  commit 28ec711cd427f8b61f73712a43b8100ba8ca933b
-  Author: David Herrmann <dh.herrmann@gmail.com>
-  Date:   Sat Jul 27 16:37:00 2013 +0200
-
-      drm/agp: move AGP cleanup paths to drm_agpsupport.c
-
-v2: switch #ifdef -> #if (spotted by Stephen)
-
-Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Cc: Daniel Vetter <daniel@ffwll.ch>
-Tested-by: Stephen Warren <swarren@nvidia.com>
-Signed-off-by: David Herrmann <dh.herrmann@gmail.com>
-Signed-off-by: Dave Airlie <airlied@gmail.com>
-(cherry picked from commit 00fd78e5279aec3aa504307ff2db892d3efb555d)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- include/drm/drmP.h           |  49 +----------
- include/drm/drm_agpsupport.h | 194 +++++++++++++++++++++++++++++++++++++++++++
- 2 files changed, 196 insertions(+), 47 deletions(-)
- create mode 100644 include/drm/drm_agpsupport.h
-
-diff --git a/include/drm/drmP.h b/include/drm/drmP.h
-index 78dc6a19a427..39e12a6356f9 100644
---- a/include/drm/drmP.h
-+++ b/include/drm/drmP.h
-@@ -62,10 +62,8 @@
- #endif
- #include <asm/mman.h>
- #include <asm/uaccess.h>
--#if defined(CONFIG_AGP) || defined(CONFIG_AGP_MODULE)
- #include <linux/types.h>
- #include <linux/agp_backend.h>
--#endif
- #include <linux/workqueue.h>
- #include <linux/poll.h>
- #include <asm/pgalloc.h>
-@@ -1221,16 +1219,6 @@ static inline int drm_dev_to_irq(struct drm_device *dev)
- 	return dev->driver->bus->get_irq(dev);
- }
- 
--
--#if __OS_HAS_AGP
--static inline int drm_core_has_AGP(struct drm_device *dev)
--{
--	return drm_core_check_feature(dev, DRIVER_USE_AGP);
--}
--#else
--#define drm_core_has_AGP(dev) (0)
--#endif
--
- #if __OS_HAS_MTRR
- static inline int drm_core_has_MTRR(struct drm_device *dev)
- {
-@@ -1286,14 +1274,6 @@ extern unsigned int drm_poll(struct file *filp, struct poll_table_struct *wait);
- 
- 				/* Memory management support (drm_memory.h) */
- #include <drm/drm_memory.h>
--extern void drm_free_agp(DRM_AGP_MEM * handle, int pages);
--extern int drm_bind_agp(DRM_AGP_MEM * handle, unsigned int start);
--extern DRM_AGP_MEM *drm_agp_bind_pages(struct drm_device *dev,
--				       struct page **pages,
--				       unsigned long num_pages,
--				       uint32_t gtt_offset,
--				       uint32_t type);
--extern int drm_unbind_agp(DRM_AGP_MEM * handle);
- 
- 				/* Misc. IOCTL support (drm_ioctl.h) */
- extern int drm_irq_by_busid(struct drm_device *dev, void *data,
-@@ -1450,33 +1430,8 @@ extern int drm_modeset_ctl(struct drm_device *dev, void *data,
- 			   struct drm_file *file_priv);
- 
- 				/* AGP/GART support (drm_agpsupport.h) */
--extern struct drm_agp_head *drm_agp_init(struct drm_device *dev);
--extern void drm_agp_destroy(struct drm_agp_head *agp);
--extern void drm_agp_clear(struct drm_device *dev);
--extern int drm_agp_acquire(struct drm_device *dev);
--extern int drm_agp_acquire_ioctl(struct drm_device *dev, void *data,
--				 struct drm_file *file_priv);
--extern int drm_agp_release(struct drm_device *dev);
--extern int drm_agp_release_ioctl(struct drm_device *dev, void *data,
--				 struct drm_file *file_priv);
--extern int drm_agp_enable(struct drm_device *dev, struct drm_agp_mode mode);
--extern int drm_agp_enable_ioctl(struct drm_device *dev, void *data,
--				struct drm_file *file_priv);
--extern int drm_agp_info(struct drm_device *dev, struct drm_agp_info *info);
--extern int drm_agp_info_ioctl(struct drm_device *dev, void *data,
--			struct drm_file *file_priv);
--extern int drm_agp_alloc(struct drm_device *dev, struct drm_agp_buffer *request);
--extern int drm_agp_alloc_ioctl(struct drm_device *dev, void *data,
--			 struct drm_file *file_priv);
--extern int drm_agp_free(struct drm_device *dev, struct drm_agp_buffer *request);
--extern int drm_agp_free_ioctl(struct drm_device *dev, void *data,
--			struct drm_file *file_priv);
--extern int drm_agp_unbind(struct drm_device *dev, struct drm_agp_binding *request);
--extern int drm_agp_unbind_ioctl(struct drm_device *dev, void *data,
--			  struct drm_file *file_priv);
--extern int drm_agp_bind(struct drm_device *dev, struct drm_agp_binding *request);
--extern int drm_agp_bind_ioctl(struct drm_device *dev, void *data,
--			struct drm_file *file_priv);
-+
-+#include <drm/drm_agpsupport.h>
- 
- 				/* Stub support (drm_stub.h) */
- extern int drm_setmaster_ioctl(struct drm_device *dev, void *data,
-diff --git a/include/drm/drm_agpsupport.h b/include/drm/drm_agpsupport.h
-new file mode 100644
-index 000000000000..a184eeee9c96
---- /dev/null
-+++ b/include/drm/drm_agpsupport.h
-@@ -0,0 +1,194 @@
-+#ifndef _DRM_AGPSUPPORT_H_
-+#define _DRM_AGPSUPPORT_H_
-+
-+#include <linux/kernel.h>
-+#include <linux/mm.h>
-+#include <linux/mutex.h>
-+#include <linux/types.h>
-+#include <linux/agp_backend.h>
-+#include <drm/drmP.h>
-+
-+#if __OS_HAS_AGP
-+
-+void drm_free_agp(DRM_AGP_MEM * handle, int pages);
-+int drm_bind_agp(DRM_AGP_MEM * handle, unsigned int start);
-+int drm_unbind_agp(DRM_AGP_MEM * handle);
-+DRM_AGP_MEM *drm_agp_bind_pages(struct drm_device *dev,
-+				struct page **pages,
-+				unsigned long num_pages,
-+				uint32_t gtt_offset,
-+				uint32_t type);
-+
-+struct drm_agp_head *drm_agp_init(struct drm_device *dev);
-+void drm_agp_destroy(struct drm_agp_head *agp);
-+void drm_agp_clear(struct drm_device *dev);
-+int drm_agp_acquire(struct drm_device *dev);
-+int drm_agp_acquire_ioctl(struct drm_device *dev, void *data,
-+			  struct drm_file *file_priv);
-+int drm_agp_release(struct drm_device *dev);
-+int drm_agp_release_ioctl(struct drm_device *dev, void *data,
-+			  struct drm_file *file_priv);
-+int drm_agp_enable(struct drm_device *dev, struct drm_agp_mode mode);
-+int drm_agp_enable_ioctl(struct drm_device *dev, void *data,
-+			 struct drm_file *file_priv);
-+int drm_agp_info(struct drm_device *dev, struct drm_agp_info *info);
-+int drm_agp_info_ioctl(struct drm_device *dev, void *data,
-+		       struct drm_file *file_priv);
-+int drm_agp_alloc(struct drm_device *dev, struct drm_agp_buffer *request);
-+int drm_agp_alloc_ioctl(struct drm_device *dev, void *data,
-+			struct drm_file *file_priv);
-+int drm_agp_free(struct drm_device *dev, struct drm_agp_buffer *request);
-+int drm_agp_free_ioctl(struct drm_device *dev, void *data,
-+		       struct drm_file *file_priv);
-+int drm_agp_unbind(struct drm_device *dev, struct drm_agp_binding *request);
-+int drm_agp_unbind_ioctl(struct drm_device *dev, void *data,
-+			 struct drm_file *file_priv);
-+int drm_agp_bind(struct drm_device *dev, struct drm_agp_binding *request);
-+int drm_agp_bind_ioctl(struct drm_device *dev, void *data,
-+		       struct drm_file *file_priv);
-+
-+static inline int drm_core_has_AGP(struct drm_device *dev)
-+{
-+	return drm_core_check_feature(dev, DRIVER_USE_AGP);
-+}
-+
-+#else /* __OS_HAS_AGP */
-+
-+static inline void drm_free_agp(DRM_AGP_MEM * handle, int pages)
-+{
-+}
-+
-+static inline int drm_bind_agp(DRM_AGP_MEM * handle, unsigned int start)
-+{
-+	return -ENODEV;
-+}
-+
-+static inline int drm_unbind_agp(DRM_AGP_MEM * handle)
-+{
-+	return -ENODEV;
-+}
-+
-+static inline DRM_AGP_MEM *drm_agp_bind_pages(struct drm_device *dev,
-+					      struct page **pages,
-+					      unsigned long num_pages,
-+					      uint32_t gtt_offset,
-+					      uint32_t type)
-+{
-+	return NULL;
-+}
-+
-+static inline struct drm_agp_head *drm_agp_init(struct drm_device *dev)
-+{
-+	return NULL;
-+}
-+
-+static inline void drm_agp_destroy(struct drm_agp_head *agp)
-+{
-+}
-+
-+static inline void drm_agp_clear(struct drm_device *dev)
-+{
-+}
-+
-+static inline int drm_agp_acquire(struct drm_device *dev)
-+{
-+	return -ENODEV;
-+}
-+
-+static inline int drm_agp_acquire_ioctl(struct drm_device *dev, void *data,
-+					struct drm_file *file_priv)
-+{
-+	return -ENODEV;
-+}
-+
-+static inline int drm_agp_release(struct drm_device *dev)
-+{
-+	return -ENODEV;
-+}
-+
-+static inline int drm_agp_release_ioctl(struct drm_device *dev, void *data,
-+					struct drm_file *file_priv)
-+{
-+	return -ENODEV;
-+}
-+
-+static inline int drm_agp_enable(struct drm_device *dev,
-+				 struct drm_agp_mode mode)
-+{
-+	return -ENODEV;
-+}
-+
-+static inline int drm_agp_enable_ioctl(struct drm_device *dev, void *data,
-+				       struct drm_file *file_priv)
-+{
-+	return -ENODEV;
-+}
-+
-+static inline int drm_agp_info(struct drm_device *dev,
-+			       struct drm_agp_info *info)
-+{
-+	return -ENODEV;
-+}
-+
-+static inline int drm_agp_info_ioctl(struct drm_device *dev, void *data,
-+				     struct drm_file *file_priv)
-+{
-+	return -ENODEV;
-+}
-+
-+static inline int drm_agp_alloc(struct drm_device *dev,
-+				struct drm_agp_buffer *request)
-+{
-+	return -ENODEV;
-+}
-+
-+static inline int drm_agp_alloc_ioctl(struct drm_device *dev, void *data,
-+				      struct drm_file *file_priv)
-+{
-+	return -ENODEV;
-+}
-+
-+static inline int drm_agp_free(struct drm_device *dev,
-+			       struct drm_agp_buffer *request)
-+{
-+	return -ENODEV;
-+}
-+
-+static inline int drm_agp_free_ioctl(struct drm_device *dev, void *data,
-+				     struct drm_file *file_priv)
-+{
-+	return -ENODEV;
-+}
-+
-+static inline int drm_agp_unbind(struct drm_device *dev,
-+				 struct drm_agp_binding *request)
-+{
-+	return -ENODEV;
-+}
-+
-+static inline int drm_agp_unbind_ioctl(struct drm_device *dev, void *data,
-+				       struct drm_file *file_priv)
-+{
-+	return -ENODEV;
-+}
-+
-+static inline int drm_agp_bind(struct drm_device *dev,
-+			       struct drm_agp_binding *request)
-+{
-+	return -ENODEV;
-+}
-+
-+static inline int drm_agp_bind_ioctl(struct drm_device *dev, void *data,
-+				     struct drm_file *file_priv)
-+{
-+	return -ENODEV;
-+}
-+
-+static inline int drm_core_has_AGP(struct drm_device *dev)
-+{
-+	return 0;
-+}
-+
-+#endif /* __OS_HAS_AGP */
-+
-+#endif /* _DRM_AGPSUPPORT_H_ */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0670-drm-rip-out-drm_core_has_MTRR-checks.patch b/patches.baytrail/0670-drm-rip-out-drm_core_has_MTRR-checks.patch
deleted file mode 100644
index 0d5b3a0025046..0000000000000
--- a/patches.baytrail/0670-drm-rip-out-drm_core_has_MTRR-checks.patch
+++ /dev/null
@@ -1,391 +0,0 @@
-From b74cfabd1583f180802014ce2fb94acf37f21a95 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 8 Aug 2013 15:41:27 +0200
-Subject: drm: rip out drm_core_has_MTRR checks
-
-The new arch_phys_wc_add/del functions do the right thing both with
-and without MTRR support in the kernel. So we can drop these
-additional checks.
-
-David Herrmann suggest to also kill the DRIVER_USE_MTRR flag since
-it's now unused, which spurred me to do a bit a better audit of the
-affected drivers. David helped a lot in that. Quoting our mail
-discussion:
-
-On Wed, Jul 10, 2013 at 5:41 PM, David Herrmann <dh.herrmann@gmail.com> wrote:
-> On Wed, Jul 10, 2013 at 5:22 PM, Daniel Vetter <daniel.vetter@ffwll.ch> wrote:
->> On Wed, Jul 10, 2013 at 3:51 PM, David Herrmann <dh.herrmann@gmail.com> wrote:
->>>> -#if __OS_HAS_MTRR
->>>> -static inline int drm_core_has_MTRR(struct drm_device *dev)
->>>> -{
->>>> -       return drm_core_check_feature(dev, DRIVER_USE_MTRR);
->>>> -}
->>>> -#else
->>>> -#define drm_core_has_MTRR(dev) (0)
->>>> -#endif
->>>> -
->>>
->>> That was the last user of DRIVER_USE_MTRR (apart from drivers setting
->>> it in .driver_features). Any reason to keep it around?
->>
->> Yeah, I guess we could rip things out. Which will also force me to
->> properly audit drivers for the eventual behaviour change this could
->> entail (in case there's an x86 driver which did not ask for an mtrr,
->> but iirc there isn't).
->
-> david@david-mb ~/dev/kernel/linux $ for i in drivers/gpu/drm/* ; do if
-> test -d "$i" ; then if ! grep -q USE_MTRR -r $i ; then echo $i ; fi ;
-> fi ; done
-> drivers/gpu/drm/exynos
-> drivers/gpu/drm/gma500
-> drivers/gpu/drm/i2c
-> drivers/gpu/drm/nouveau
-> drivers/gpu/drm/omapdrm
-> drivers/gpu/drm/qxl
-> drivers/gpu/drm/rcar-du
-> drivers/gpu/drm/shmobile
-> drivers/gpu/drm/tilcdc
-> drivers/gpu/drm/ttm
-> drivers/gpu/drm/udl
-> drivers/gpu/drm/vmwgfx
-> david@david-mb ~/dev/kernel/linux $
->
-> So for x86 gma500,nouveau,qxl,udl,vmwgfx don't set DRIVER_USE_MTRR.
-> But I cannot tell whether they break if we call arch_phys_wc_add/del,
-> anyway. At least nouveau seemed to work here, but it doesn't use AGP
-> or drm_bufs, I guess.
-
-Cool, thanks a lot for stitching together the list of drivers to look
-at. So for real KMS drivers it's the drives responsibility to add an
-mtrr if it needs one. nouvea, radeon, mgag200, i915 and vmwgfx do that
-already. Somehow the savage driver also ends up doing that, I have no
-idea why.
-
-Note that gma500 as a pure KMS driver doesn't need MTRR setup since
-the platforms that it supports all support PAT. So no MTRRs needed to
-get wc iomappings.
-
-The mtrr support in the drm core is all for legacy mappings of garts,
-framebuffers and registers. All legacy drivers set the USE_MTRR flag,
-so we're good there.
-
-All in all I think we can really just ditch this
-
-/endquote
-
-v2: Also kill DRIVER_USE_MTRR as suggested by David Herrmann
-
-v3: Rebase on top of David Herrmann's agp setup/cleanup changes.
-
-Cc: David Herrmann <dh.herrmann@gmail.com>
-Cc: Andy Lutomirski <luto@amacapital.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Acked-by: Andy Lutomirski <luto@amacapital.net>
-Reviewed-by: David Herrmann <dh.herrmann@gmail.com>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit 281856477cdaba70032af502ee7192fe7aa54f69)
-Signed-off-by: James Ausmus <james.ausmus@intel.com>
-
-Conflicts:
-	drivers/gpu/drm/radeon/radeon_drv.c
-	(context changes)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/ast/ast_drv.c         |  2 +-
- drivers/gpu/drm/cirrus/cirrus_drv.c   |  2 +-
- drivers/gpu/drm/drm_bufs.c            | 13 +++++--------
- drivers/gpu/drm/drm_pci.c             | 14 ++++++--------
- drivers/gpu/drm/drm_vm.c              |  3 +--
- drivers/gpu/drm/i810/i810_drv.c       |  2 +-
- drivers/gpu/drm/i915/i915_drv.c       |  2 +-
- drivers/gpu/drm/mga/mga_drv.c         |  2 +-
- drivers/gpu/drm/mgag200/mgag200_drv.c |  2 +-
- drivers/gpu/drm/r128/r128_drv.c       |  2 +-
- drivers/gpu/drm/radeon/radeon_drv.c   |  4 ++--
- drivers/gpu/drm/savage/savage_drv.c   |  2 +-
- drivers/gpu/drm/sis/sis_drv.c         |  2 +-
- drivers/gpu/drm/tdfx/tdfx_drv.c       |  1 -
- drivers/gpu/drm/via/via_drv.c         |  2 +-
- include/drm/drmP.h                    | 11 -----------
- 16 files changed, 24 insertions(+), 42 deletions(-)
-
-diff --git a/drivers/gpu/drm/ast/ast_drv.c b/drivers/gpu/drm/ast/ast_drv.c
-index 60f1ce3998c3..32e270dc714e 100644
---- a/drivers/gpu/drm/ast/ast_drv.c
-+++ b/drivers/gpu/drm/ast/ast_drv.c
-@@ -197,7 +197,7 @@ static const struct file_operations ast_fops = {
- };
- 
- static struct drm_driver driver = {
--	.driver_features = DRIVER_USE_MTRR | DRIVER_MODESET | DRIVER_GEM,
-+	.driver_features = DRIVER_MODESET | DRIVER_GEM,
- 	.dev_priv_size = 0,
- 
- 	.load = ast_driver_load,
-diff --git a/drivers/gpu/drm/cirrus/cirrus_drv.c b/drivers/gpu/drm/cirrus/cirrus_drv.c
-index dd9c908ab3fc..138364d91782 100644
---- a/drivers/gpu/drm/cirrus/cirrus_drv.c
-+++ b/drivers/gpu/drm/cirrus/cirrus_drv.c
-@@ -87,7 +87,7 @@ static const struct file_operations cirrus_driver_fops = {
- #endif
- };
- static struct drm_driver driver = {
--	.driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_USE_MTRR,
-+	.driver_features = DRIVER_MODESET | DRIVER_GEM,
- 	.load = cirrus_driver_load,
- 	.unload = cirrus_driver_unload,
- 	.fops = &cirrus_driver_fops,
-diff --git a/drivers/gpu/drm/drm_bufs.c b/drivers/gpu/drm/drm_bufs.c
-index 0190fce20078..7b7b93ed0fef 100644
---- a/drivers/gpu/drm/drm_bufs.c
-+++ b/drivers/gpu/drm/drm_bufs.c
-@@ -207,12 +207,10 @@ static int drm_addmap_core(struct drm_device * dev, resource_size_t offset,
- 			return 0;
- 		}
- 
--		if (drm_core_has_MTRR(dev)) {
--			if (map->type == _DRM_FRAME_BUFFER ||
--			    (map->flags & _DRM_WRITE_COMBINING)) {
--				map->mtrr =
--					arch_phys_wc_add(map->offset, map->size);
--			}
-+		if (map->type == _DRM_FRAME_BUFFER ||
-+		    (map->flags & _DRM_WRITE_COMBINING)) {
-+			map->mtrr =
-+				arch_phys_wc_add(map->offset, map->size);
- 		}
- 		if (map->type == _DRM_REGISTERS) {
- 			if (map->flags & _DRM_WRITE_COMBINING)
-@@ -455,8 +453,7 @@ int drm_rmmap_locked(struct drm_device *dev, struct drm_local_map *map)
- 		iounmap(map->handle);
- 		/* FALLTHROUGH */
- 	case _DRM_FRAME_BUFFER:
--		if (drm_core_has_MTRR(dev))
--			arch_phys_wc_del(map->mtrr);
-+		arch_phys_wc_del(map->mtrr);
- 		break;
- 	case _DRM_SHM:
- 		vfree(map->handle);
-diff --git a/drivers/gpu/drm/drm_pci.c b/drivers/gpu/drm/drm_pci.c
-index 382e5bd699c6..83fb3dba1b25 100644
---- a/drivers/gpu/drm/drm_pci.c
-+++ b/drivers/gpu/drm/drm_pci.c
-@@ -276,12 +276,11 @@ static int drm_pci_agp_init(struct drm_device *dev)
- 			DRM_ERROR("Cannot initialize the agpgart module.\n");
- 			return -EINVAL;
- 		}
--		if (drm_core_has_MTRR(dev)) {
--			if (dev->agp)
--				dev->agp->agp_mtrr = arch_phys_wc_add(
--					dev->agp->agp_info.aper_base,
--					dev->agp->agp_info.aper_size *
--					1024 * 1024);
-+		if (dev->agp) {
-+			dev->agp->agp_mtrr = arch_phys_wc_add(
-+				dev->agp->agp_info.aper_base,
-+				dev->agp->agp_info.aper_size *
-+				1024 * 1024);
- 		}
- 	}
- 	return 0;
-@@ -290,8 +289,7 @@ static int drm_pci_agp_init(struct drm_device *dev)
- static void drm_pci_agp_destroy(struct drm_device *dev)
- {
- 	if (drm_core_has_AGP(dev) && dev->agp) {
--		if (drm_core_has_MTRR(dev))
--			arch_phys_wc_del(dev->agp->agp_mtrr);
-+		arch_phys_wc_del(dev->agp->agp_mtrr);
- 		drm_agp_clear(dev);
- 		drm_agp_destroy(dev->agp);
- 		dev->agp = NULL;
-diff --git a/drivers/gpu/drm/drm_vm.c b/drivers/gpu/drm/drm_vm.c
-index 1575694ccaca..f8bc9fdd3575 100644
---- a/drivers/gpu/drm/drm_vm.c
-+++ b/drivers/gpu/drm/drm_vm.c
-@@ -251,8 +251,7 @@ static void drm_vm_shm_close(struct vm_area_struct *vma)
- 			switch (map->type) {
- 			case _DRM_REGISTERS:
- 			case _DRM_FRAME_BUFFER:
--				if (drm_core_has_MTRR(dev))
--					arch_phys_wc_del(map->mtrr);
-+				arch_phys_wc_del(map->mtrr);
- 				iounmap(map->handle);
- 				break;
- 			case _DRM_SHM:
-diff --git a/drivers/gpu/drm/i810/i810_drv.c b/drivers/gpu/drm/i810/i810_drv.c
-index d85c05b4877d..d8180d22cedd 100644
---- a/drivers/gpu/drm/i810/i810_drv.c
-+++ b/drivers/gpu/drm/i810/i810_drv.c
-@@ -57,7 +57,7 @@ static const struct file_operations i810_driver_fops = {
- 
- static struct drm_driver driver = {
- 	.driver_features =
--	    DRIVER_USE_AGP | DRIVER_REQUIRE_AGP | DRIVER_USE_MTRR |
-+	    DRIVER_USE_AGP | DRIVER_REQUIRE_AGP |
- 	    DRIVER_HAVE_DMA,
- 	.dev_priv_size = sizeof(drm_i810_buf_priv_t),
- 	.load = i810_driver_load,
-diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
-index 9411a745adaf..eec47bd00353 100644
---- a/drivers/gpu/drm/i915/i915_drv.c
-+++ b/drivers/gpu/drm/i915/i915_drv.c
-@@ -1006,7 +1006,7 @@ static struct drm_driver driver = {
- 	 * deal with them for Intel hardware.
- 	 */
- 	.driver_features =
--	    DRIVER_USE_AGP | DRIVER_REQUIRE_AGP | /* DRIVER_USE_MTRR |*/
-+	    DRIVER_USE_AGP | DRIVER_REQUIRE_AGP |
- 	    DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM | DRIVER_PRIME,
- 	.load = i915_driver_load,
- 	.unload = i915_driver_unload,
-diff --git a/drivers/gpu/drm/mga/mga_drv.c b/drivers/gpu/drm/mga/mga_drv.c
-index fe71e1e44e48..6b1a87c8aac5 100644
---- a/drivers/gpu/drm/mga/mga_drv.c
-+++ b/drivers/gpu/drm/mga/mga_drv.c
-@@ -58,7 +58,7 @@ static const struct file_operations mga_driver_fops = {
- 
- static struct drm_driver driver = {
- 	.driver_features =
--	    DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA |
-+	    DRIVER_USE_AGP | DRIVER_PCI_DMA |
- 	    DRIVER_HAVE_DMA | DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED,
- 	.dev_priv_size = sizeof(drm_mga_buf_priv_t),
- 	.load = mga_driver_load,
-diff --git a/drivers/gpu/drm/mgag200/mgag200_drv.c b/drivers/gpu/drm/mgag200/mgag200_drv.c
-index b570127ae3b2..fcce7b2f8011 100644
---- a/drivers/gpu/drm/mgag200/mgag200_drv.c
-+++ b/drivers/gpu/drm/mgag200/mgag200_drv.c
-@@ -88,7 +88,7 @@ static const struct file_operations mgag200_driver_fops = {
- };
- 
- static struct drm_driver driver = {
--	.driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_USE_MTRR,
-+	.driver_features = DRIVER_GEM | DRIVER_MODESET,
- 	.load = mgag200_driver_load,
- 	.unload = mgag200_driver_unload,
- 	.fops = &mgag200_driver_fops,
-diff --git a/drivers/gpu/drm/r128/r128_drv.c b/drivers/gpu/drm/r128/r128_drv.c
-index c2338cbc56ad..5bd307cd8da1 100644
---- a/drivers/gpu/drm/r128/r128_drv.c
-+++ b/drivers/gpu/drm/r128/r128_drv.c
-@@ -56,7 +56,7 @@ static const struct file_operations r128_driver_fops = {
- 
- static struct drm_driver driver = {
- 	.driver_features =
--	    DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG |
-+	    DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |
- 	    DRIVER_HAVE_DMA | DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED,
- 	.dev_priv_size = sizeof(drm_r128_buf_priv_t),
- 	.load = r128_driver_load,
-diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c
-index 3c5f6420319e..6d26fb2c0a83 100644
---- a/drivers/gpu/drm/radeon/radeon_drv.c
-+++ b/drivers/gpu/drm/radeon/radeon_drv.c
-@@ -268,7 +268,7 @@ static const struct file_operations radeon_driver_old_fops = {
- 
- static struct drm_driver driver_old = {
- 	.driver_features =
--	    DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG |
-+	    DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |
- 	    DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED,
- 	.dev_priv_size = sizeof(drm_radeon_buf_priv_t),
- 	.load = radeon_driver_load,
-@@ -375,7 +375,7 @@ static const struct file_operations radeon_driver_kms_fops = {
- 
- static struct drm_driver kms_driver = {
- 	.driver_features =
--	    DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG |
-+	    DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |
- 	    DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED | DRIVER_GEM |
- 	    DRIVER_PRIME,
- 	.dev_priv_size = 0,
-diff --git a/drivers/gpu/drm/savage/savage_drv.c b/drivers/gpu/drm/savage/savage_drv.c
-index 9135c8bd6fbc..3c030216e888 100644
---- a/drivers/gpu/drm/savage/savage_drv.c
-+++ b/drivers/gpu/drm/savage/savage_drv.c
-@@ -50,7 +50,7 @@ static const struct file_operations savage_driver_fops = {
- 
- static struct drm_driver driver = {
- 	.driver_features =
--	    DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_HAVE_DMA | DRIVER_PCI_DMA,
-+	    DRIVER_USE_AGP | DRIVER_HAVE_DMA | DRIVER_PCI_DMA,
- 	.dev_priv_size = sizeof(drm_savage_buf_priv_t),
- 	.load = savage_driver_load,
- 	.firstopen = savage_driver_firstopen,
-diff --git a/drivers/gpu/drm/sis/sis_drv.c b/drivers/gpu/drm/sis/sis_drv.c
-index b88b2d302105..4383b74a3aa4 100644
---- a/drivers/gpu/drm/sis/sis_drv.c
-+++ b/drivers/gpu/drm/sis/sis_drv.c
-@@ -102,7 +102,7 @@ void sis_driver_postclose(struct drm_device *dev, struct drm_file *file)
- }
- 
- static struct drm_driver driver = {
--	.driver_features = DRIVER_USE_AGP | DRIVER_USE_MTRR,
-+	.driver_features = DRIVER_USE_AGP,
- 	.load = sis_driver_load,
- 	.unload = sis_driver_unload,
- 	.open = sis_driver_open,
-diff --git a/drivers/gpu/drm/tdfx/tdfx_drv.c b/drivers/gpu/drm/tdfx/tdfx_drv.c
-index 951ec13e4e5c..3492ca5c46d3 100644
---- a/drivers/gpu/drm/tdfx/tdfx_drv.c
-+++ b/drivers/gpu/drm/tdfx/tdfx_drv.c
-@@ -55,7 +55,6 @@ static const struct file_operations tdfx_driver_fops = {
- };
- 
- static struct drm_driver driver = {
--	.driver_features = DRIVER_USE_MTRR,
- 	.fops = &tdfx_driver_fops,
- 	.name = DRIVER_NAME,
- 	.desc = DRIVER_DESC,
-diff --git a/drivers/gpu/drm/via/via_drv.c b/drivers/gpu/drm/via/via_drv.c
-index 448799968a06..92684a9b7e34 100644
---- a/drivers/gpu/drm/via/via_drv.c
-+++ b/drivers/gpu/drm/via/via_drv.c
-@@ -72,7 +72,7 @@ static const struct file_operations via_driver_fops = {
- 
- static struct drm_driver driver = {
- 	.driver_features =
--	    DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_HAVE_IRQ |
-+	    DRIVER_USE_AGP | DRIVER_HAVE_IRQ |
- 	    DRIVER_IRQ_SHARED,
- 	.load = via_driver_load,
- 	.unload = via_driver_unload,
-diff --git a/include/drm/drmP.h b/include/drm/drmP.h
-index 39e12a6356f9..f65eaddd4844 100644
---- a/include/drm/drmP.h
-+++ b/include/drm/drmP.h
-@@ -74,7 +74,6 @@
- #include <linux/idr.h>
- 
- #define __OS_HAS_AGP (defined(CONFIG_AGP) || (defined(CONFIG_AGP_MODULE) && defined(MODULE)))
--#define __OS_HAS_MTRR (defined(CONFIG_MTRR))
- 
- struct module;
- 
-@@ -139,7 +138,6 @@ int drm_err(const char *func, const char *format, ...);
- /* driver capabilities and requirements mask */
- #define DRIVER_USE_AGP     0x1
- #define DRIVER_REQUIRE_AGP 0x2
--#define DRIVER_USE_MTRR    0x4
- #define DRIVER_PCI_DMA     0x8
- #define DRIVER_SG          0x10
- #define DRIVER_HAVE_DMA    0x20
-@@ -1219,15 +1217,6 @@ static inline int drm_dev_to_irq(struct drm_device *dev)
- 	return dev->driver->bus->get_irq(dev);
- }
- 
--#if __OS_HAS_MTRR
--static inline int drm_core_has_MTRR(struct drm_device *dev)
--{
--	return drm_core_check_feature(dev, DRIVER_USE_MTRR);
--}
--#else
--#define drm_core_has_MTRR(dev) (0)
--#endif
--
- static inline void drm_device_set_unplugged(struct drm_device *dev)
- {
- 	smp_wmb();
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0671-drm-i915-Only-do-a-chipset-flush-after-a-clflush.patch b/patches.baytrail/0671-drm-i915-Only-do-a-chipset-flush-after-a-clflush.patch
deleted file mode 100644
index 76b57024cab3c..0000000000000
--- a/patches.baytrail/0671-drm-i915-Only-do-a-chipset-flush-after-a-clflush.patch
+++ /dev/null
@@ -1,136 +0,0 @@
-From d61196c0ca69ba7a0f374b32c53b7b07c6c6cdba Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Thu, 8 Aug 2013 14:41:09 +0100
-Subject: drm/i915: Only do a chipset flush after a clflush
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Now that we skip clflushes more often, return a boolean indicating
-whether the clflush was actually performed, and only if it was do the
-chipset flush. (Though on most of the architectures where the clflush will
-be skipped, the chipset flush is a no-op!)
-
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 000433b67e46771a7c08f78574943855a98c53ec)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h            |  2 +-
- drivers/gpu/drm/i915/i915_gem.c            | 20 +++++++++++---------
- drivers/gpu/drm/i915/i915_gem_execbuffer.c |  5 +++--
- 3 files changed, 15 insertions(+), 12 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index d25f9f712b6f..cccd6084b236 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1840,7 +1840,7 @@ static inline bool i915_terminally_wedged(struct i915_gpu_error *error)
- }
- 
- void i915_gem_reset(struct drm_device *dev);
--void i915_gem_clflush_object(struct drm_i915_gem_object *obj, bool force);
-+bool i915_gem_clflush_object(struct drm_i915_gem_object *obj, bool force);
- int __must_check i915_gem_object_finish_gpu(struct drm_i915_gem_object *obj);
- int __must_check i915_gem_init(struct drm_device *dev);
- int __must_check i915_gem_init_hw(struct drm_device *dev);
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index ce4a8c4e42ac..f7f3cba75b57 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -835,8 +835,8 @@ out:
- 		 */
- 		if (!needs_clflush_after &&
- 		    obj->base.write_domain != I915_GEM_DOMAIN_CPU) {
--			i915_gem_clflush_object(obj, obj->pin_display);
--			i915_gem_chipset_flush(dev);
-+			if (i915_gem_clflush_object(obj, obj->pin_display))
-+				i915_gem_chipset_flush(dev);
- 		}
- 	}
- 
-@@ -3212,7 +3212,7 @@ err_unpin:
- 	return ret;
- }
- 
--void
-+bool
- i915_gem_clflush_object(struct drm_i915_gem_object *obj,
- 			bool force)
- {
-@@ -3221,14 +3221,14 @@ i915_gem_clflush_object(struct drm_i915_gem_object *obj,
- 	 * again at bind time.
- 	 */
- 	if (obj->pages == NULL)
--		return;
-+		return false;
- 
- 	/*
- 	 * Stolen memory is always coherent with the GPU as it is explicitly
- 	 * marked as wc by the system, or the system is cache-coherent.
- 	 */
- 	if (obj->stolen)
--		return;
-+		return false;
- 
- 	/* If the GPU is snooping the contents of the CPU cache,
- 	 * we do not need to manually clear the CPU cache lines.  However,
-@@ -3239,11 +3239,12 @@ i915_gem_clflush_object(struct drm_i915_gem_object *obj,
- 	 * tracking.
- 	 */
- 	if (!force && cpu_cache_is_coherent(obj->base.dev, obj->cache_level))
--		return;
-+		return false;
- 
- 	trace_i915_gem_object_clflush(obj);
--
- 	drm_clflush_sg(obj->pages);
-+
-+	return true;
- }
- 
- /** Flushes the GTT write domain for the object if it's dirty. */
-@@ -3283,8 +3284,9 @@ i915_gem_object_flush_cpu_write_domain(struct drm_i915_gem_object *obj,
- 	if (obj->base.write_domain != I915_GEM_DOMAIN_CPU)
- 		return;
- 
--	i915_gem_clflush_object(obj, force);
--	i915_gem_chipset_flush(obj->base.dev);
-+	if (i915_gem_clflush_object(obj, force))
-+		i915_gem_chipset_flush(obj->base.dev);
-+
- 	old_write_domain = obj->base.write_domain;
- 	obj->base.write_domain = 0;
- 
-diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-index e999578a021c..7dcf78cf6781 100644
---- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-@@ -708,6 +708,7 @@ i915_gem_execbuffer_move_to_gpu(struct intel_ring_buffer *ring,
- {
- 	struct drm_i915_gem_object *obj;
- 	uint32_t flush_domains = 0;
-+	bool flush_chipset = false;
- 	int ret;
- 
- 	list_for_each_entry(obj, objects, exec_list) {
-@@ -716,12 +717,12 @@ i915_gem_execbuffer_move_to_gpu(struct intel_ring_buffer *ring,
- 			return ret;
- 
- 		if (obj->base.write_domain & I915_GEM_DOMAIN_CPU)
--			i915_gem_clflush_object(obj, false);
-+			flush_chipset |= i915_gem_clflush_object(obj, false);
- 
- 		flush_domains |= obj->base.write_domain;
- 	}
- 
--	if (flush_domains & I915_GEM_DOMAIN_CPU)
-+	if (flush_chipset)
- 		i915_gem_chipset_flush(ring->dev);
- 
- 	if (flush_domains & I915_GEM_DOMAIN_GTT)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0672-drm-i915-WARN_ON-failed-map_and_fenceable.patch b/patches.baytrail/0672-drm-i915-WARN_ON-failed-map_and_fenceable.patch
deleted file mode 100644
index b12631514ace1..0000000000000
--- a/patches.baytrail/0672-drm-i915-WARN_ON-failed-map_and_fenceable.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From 53dda2c1621a455ee5622e6beb24f1f821ce7eb6 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <benjamin.widawsky@intel.com>
-Date: Fri, 9 Aug 2013 22:12:12 -0700
-Subject: drm/i915: WARN_ON failed map_and_fenceable
-
-I just noticed in our code we don't really check the assertion, and
-given some of the code I am changing in this area, I feel a WARN is very
-nice to have.
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-[danvet: s/&/&&/ to fix typo on the check.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 7ace7ef2f5d20632240196fa3e5d5c74cf2c1508)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem.c | 2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index f7f3cba75b57..b6f01ef1d174 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -3199,6 +3199,8 @@ search_free:
- 	if (i915_is_ggtt(vm))
- 		obj->map_and_fenceable = mappable && fenceable;
- 
-+	WARN_ON(map_and_fenceable && !obj->map_and_fenceable);
-+
- 	trace_i915_vma_bind(vma, map_and_fenceable);
- 	i915_gem_verify_gtt(dev);
- 	return 0;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0673-i915-Fix-SDVO-potentially-turning-off-randomly.patch b/patches.baytrail/0673-i915-Fix-SDVO-potentially-turning-off-randomly.patch
deleted file mode 100644
index 03f177ac5455e..0000000000000
--- a/patches.baytrail/0673-i915-Fix-SDVO-potentially-turning-off-randomly.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From 1a089b1bf0b130982ed7edad12ec360280ef78c2 Mon Sep 17 00:00:00 2001
-From: Guillaume Clement <gclement@baobob.org>
-Date: Sat, 10 Aug 2013 21:57:57 +0200
-Subject: i915: Fix SDVO potentially turning off randomly
-
-Some Poulsbo cards seem to incorrectly report
-SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED instead of
-SDVO_CMD_STATUS_PENDING, which causes the display to be turned off.
-
-This could also happen to i915.
-
-Signed-off-by: Guillaume Clement <gclement@baobob.org>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 1ad87e72b54cf3b698c002f0a31ac34d6b407f0b)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_sdvo.c | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
-index 02f220b4e4a1..317e058fb3cf 100644
---- a/drivers/gpu/drm/i915/intel_sdvo.c
-+++ b/drivers/gpu/drm/i915/intel_sdvo.c
-@@ -538,7 +538,8 @@ static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
- 				  &status))
- 		goto log_fail;
- 
--	while (status == SDVO_CMD_STATUS_PENDING && --retry) {
-+	while ((status == SDVO_CMD_STATUS_PENDING ||
-+			status == SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED) && --retry) {
- 		if (retry < 10)
- 			msleep(15);
- 		else
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0674-drm-i915-remove-unused-leftover-variable-irq_receive.patch b/patches.baytrail/0674-drm-i915-remove-unused-leftover-variable-irq_receive.patch
deleted file mode 100644
index ce32d06524409..0000000000000
--- a/patches.baytrail/0674-drm-i915-remove-unused-leftover-variable-irq_receive.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From 00f4d77457e9f6a74d6ef733bbaecd86c79b0642 Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Sun, 11 Aug 2013 12:44:26 +0300
-Subject: drm/i915: remove unused leftover variable irq_received
-
-It's been there since i8xx_irq_handler() was added in
-commit c2798b19bac2538393fc932bfbe59807a4734b3e
-Author: Chris Wilson <chris@chris-wilson.co.uk>
-Date:   Sun Apr 22 21:13:57 2012 +0100
-
-    drm/i915: i8xx interrupt handler
-
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit c8b5018b22bc03941fbc6dcf7bea5e8344a8f3da)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 2 --
- 1 file changed, 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index 076091e92eea..96430a360b89 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -2449,7 +2449,6 @@ static irqreturn_t i8xx_irq_handler(int irq, void *arg)
- 	u16 iir, new_iir;
- 	u32 pipe_stats[2];
- 	unsigned long irqflags;
--	int irq_received;
- 	int pipe;
- 	u16 flip_mask =
- 		I915_DISPLAY_PLANE_A_FLIP_PENDING_INTERRUPT |
-@@ -2483,7 +2482,6 @@ static irqreturn_t i8xx_irq_handler(int irq, void *arg)
- 					DRM_DEBUG_DRIVER("pipe %c underrun\n",
- 							 pipe_name(pipe));
- 				I915_WRITE(reg, pipe_stats[pipe]);
--				irq_received = 1;
- 			}
- 		}
- 		spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0675-drm-i915-give-more-distinctive-names-to-ring-hangche.patch b/patches.baytrail/0675-drm-i915-give-more-distinctive-names-to-ring-hangche.patch
deleted file mode 100644
index a4ac24077f1d6..0000000000000
--- a/patches.baytrail/0675-drm-i915-give-more-distinctive-names-to-ring-hangche.patch
+++ /dev/null
@@ -1,121 +0,0 @@
-From ef643f5bc7a26658f51a4be1eb29d27ec05c1a31 Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Sun, 11 Aug 2013 12:44:01 +0300
-Subject: drm/i915: give more distinctive names to ring hangcheck action enums
-
-The short lowercase names are bound to collide. The default warnings
-don't even warn about shadowing.
-
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit f2f4d82faf85d2e53a2ba00a831a9f7f80b7e6e7)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem.c         |  2 +-
- drivers/gpu/drm/i915/i915_irq.c         | 22 +++++++++++-----------
- drivers/gpu/drm/i915/intel_ringbuffer.h |  7 ++++++-
- 3 files changed, 18 insertions(+), 13 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index b6f01ef1d174..66136cd88ed5 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -2201,7 +2201,7 @@ static void i915_set_reset_status(struct intel_ring_buffer *ring,
- 		offset = i915_gem_obj_offset(request->batch_obj,
- 					     request_to_vm(request));
- 
--	if (ring->hangcheck.action != wait &&
-+	if (ring->hangcheck.action != HANGCHECK_WAIT &&
- 	    i915_request_guilty(request, acthd, &inside)) {
- 		DRM_ERROR("%s hung %s bo (0x%lx ctx %d) at 0x%x\n",
- 			  ring->name,
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index 96430a360b89..096d50142c11 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -1872,10 +1872,10 @@ ring_stuck(struct intel_ring_buffer *ring, u32 acthd)
- 	u32 tmp;
- 
- 	if (ring->hangcheck.acthd != acthd)
--		return active;
-+		return HANGCHECK_ACTIVE;
- 
- 	if (IS_GEN2(dev))
--		return hung;
-+		return HANGCHECK_HUNG;
- 
- 	/* Is the chip hanging on a WAIT_FOR_EVENT?
- 	 * If so we can simply poke the RB_WAIT bit
-@@ -1887,24 +1887,24 @@ ring_stuck(struct intel_ring_buffer *ring, u32 acthd)
- 		DRM_ERROR("Kicking stuck wait on %s\n",
- 			  ring->name);
- 		I915_WRITE_CTL(ring, tmp);
--		return kick;
-+		return HANGCHECK_KICK;
- 	}
- 
- 	if (INTEL_INFO(dev)->gen >= 6 && tmp & RING_WAIT_SEMAPHORE) {
- 		switch (semaphore_passed(ring)) {
- 		default:
--			return hung;
-+			return HANGCHECK_HUNG;
- 		case 1:
- 			DRM_ERROR("Kicking stuck semaphore on %s\n",
- 				  ring->name);
- 			I915_WRITE_CTL(ring, tmp);
--			return kick;
-+			return HANGCHECK_KICK;
- 		case 0:
--			return wait;
-+			return HANGCHECK_WAIT;
- 		}
- 	}
- 
--	return hung;
-+	return HANGCHECK_HUNG;
- }
- 
- /**
-@@ -1972,16 +1972,16 @@ static void i915_hangcheck_elapsed(unsigned long data)
- 								    acthd);
- 
- 				switch (ring->hangcheck.action) {
--				case wait:
-+				case HANGCHECK_WAIT:
- 					score = 0;
- 					break;
--				case active:
-+				case HANGCHECK_ACTIVE:
- 					score = BUSY;
- 					break;
--				case kick:
-+				case HANGCHECK_KICK:
- 					score = KICK;
- 					break;
--				case hung:
-+				case HANGCHECK_HUNG:
- 					score = HUNG;
- 					stuck[i] = true;
- 					break;
-diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
-index 6e38256d41e1..5e6be842d225 100644
---- a/drivers/gpu/drm/i915/intel_ringbuffer.h
-+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
-@@ -37,7 +37,12 @@ struct  intel_hw_status_page {
- #define I915_READ_SYNC_0(ring) I915_READ(RING_SYNC_0((ring)->mmio_base))
- #define I915_READ_SYNC_1(ring) I915_READ(RING_SYNC_1((ring)->mmio_base))
- 
--enum intel_ring_hangcheck_action { wait, active, kick, hung };
-+enum intel_ring_hangcheck_action {
-+	HANGCHECK_WAIT,
-+	HANGCHECK_ACTIVE,
-+	HANGCHECK_KICK,
-+	HANGCHECK_HUNG,
-+};
- 
- struct intel_ring_hangcheck {
- 	bool deadlock;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0676-drm-i915-drop-unnecessary-local-variable-to-suppress.patch b/patches.baytrail/0676-drm-i915-drop-unnecessary-local-variable-to-suppress.patch
deleted file mode 100644
index 0f456f2263167..0000000000000
--- a/patches.baytrail/0676-drm-i915-drop-unnecessary-local-variable-to-suppress.patch
+++ /dev/null
@@ -1,66 +0,0 @@
-From 946ff50b24654a2a633cb5566248a7f0620d6924 Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Sun, 11 Aug 2013 12:44:02 +0300
-Subject: drm/i915: drop unnecessary local variable to suppress build warning
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Although I could not reproduce this (different compiler version,
-perhaps), reportedly we get:
-
-drivers/gpu/drm/i915/i915_irq.c:1943:27: warning: ‘score’ may be used
-uninitialized in this function [-Wuninitialized]
-
-Drop the 'score' variable altogether as it's not really needed.
-
-Reported-by: Kees Cook <keescook@chromium.org>
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit ea04cb31d506ac3f4fc3cefb1c50eb4f35ab37fd)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 10 +++-------
- 1 file changed, 3 insertions(+), 7 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index 096d50142c11..36cf7073690e 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -1951,8 +1951,6 @@ static void i915_hangcheck_elapsed(unsigned long data)
- 				} else
- 					busy = false;
- 			} else {
--				int score;
--
- 				/* We always increment the hangcheck score
- 				 * if the ring is busy and still processing
- 				 * the same request, so that no single request
-@@ -1973,20 +1971,18 @@ static void i915_hangcheck_elapsed(unsigned long data)
- 
- 				switch (ring->hangcheck.action) {
- 				case HANGCHECK_WAIT:
--					score = 0;
- 					break;
- 				case HANGCHECK_ACTIVE:
--					score = BUSY;
-+					ring->hangcheck.score += BUSY;
- 					break;
- 				case HANGCHECK_KICK:
--					score = KICK;
-+					ring->hangcheck.score += KICK;
- 					break;
- 				case HANGCHECK_HUNG:
--					score = HUNG;
-+					ring->hangcheck.score += HUNG;
- 					stuck[i] = true;
- 					break;
- 				}
--				ring->hangcheck.score += score;
- 			}
- 		} else {
- 			/* Gradually reduce the count so that we catch DoS
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0677-drm-i915-reserve-I915_CACHING_DISPLAY-and-document-c.patch b/patches.baytrail/0677-drm-i915-reserve-I915_CACHING_DISPLAY-and-document-c.patch
deleted file mode 100644
index 705d96ed43558..0000000000000
--- a/patches.baytrail/0677-drm-i915-reserve-I915_CACHING_DISPLAY-and-document-c.patch
+++ /dev/null
@@ -1,66 +0,0 @@
-From 2a102a6ca28b062eddb36b035afd83cf0e3e54e2 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Sat, 10 Aug 2013 14:51:11 +0200
-Subject: drm/i915: reserve I915_CACHING_DISPLAY and document cache modes
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Resolve the catch-22 of igt needing a stable number and patches first
-needing testcases by reserving the interface number up-front.
-
-v2: Improve the spelling a bit.
-
-v3: More spelling fail spotted by Chris.
-
-Requested-by: Chris Wilson <chris@chris-wilson.co.uk>
-Cc: Chris Wilson <chris@chris-wilson.co.uk>
-Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 35c7ab421a13f8327e3fd627c6ebafb1c13b2e55)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- include/uapi/drm/i915_drm.h | 24 ++++++++++++++++++++++++
- 1 file changed, 24 insertions(+)
-
-diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
-index a1a7b6bd60d8..0bb3e5524382 100644
---- a/include/uapi/drm/i915_drm.h
-+++ b/include/uapi/drm/i915_drm.h
-@@ -768,8 +768,32 @@ struct drm_i915_gem_busy {
- 	__u32 busy;
- };
- 
-+/**
-+ * I915_CACHING_NONE
-+ *
-+ * GPU access is not coherent with cpu caches. Default for machines without an
-+ * LLC.
-+ */
- #define I915_CACHING_NONE		0
-+/**
-+ * I915_CACHING_CACHED
-+ *
-+ * GPU access is coherent with cpu caches and furthermore the data is cached in
-+ * last-level caches shared between cpu cores and the gpu GT. Default on
-+ * machines with HAS_LLC.
-+ */
- #define I915_CACHING_CACHED		1
-+/**
-+ * I915_CACHING_DISPLAY
-+ *
-+ * Special GPU caching mode which is coherent with the scanout engines.
-+ * Transparently falls back to I915_CACHING_NONE on platforms where no special
-+ * cache mode (like write-through or gfdt flushing) is available. The kernel
-+ * automatically sets this mode when using a buffer as a scanout target.
-+ * Userspace can manually set this mode to avoid a costly stall and clflush in
-+ * the hotpath of drawing the first frame.
-+ */
-+#define I915_CACHING_DISPLAY		2
- 
- struct drm_i915_gem_caching {
- 	/**
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0678-drm-i915-Use-Write-Through-cacheing-for-the-display-.patch b/patches.baytrail/0678-drm-i915-Use-Write-Through-cacheing-for-the-display-.patch
deleted file mode 100644
index c51a41b9d7b6a..0000000000000
--- a/patches.baytrail/0678-drm-i915-Use-Write-Through-cacheing-for-the-display-.patch
+++ /dev/null
@@ -1,146 +0,0 @@
-From 1411160277c96987c6e78f079b509ec01dd7daed Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Thu, 8 Aug 2013 14:41:10 +0100
-Subject: drm/i915: Use Write-Through cacheing for the display plane on Iris
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Haswell GT3e has the unique feature of supporting Write-Through cacheing
-of objects within the eLLC/LLC. The purpose of this is to enable the display
-plane to remain coherent whilst objects lie resident in the eLLC/LLC - so
-that we, in theory, get the best of both worlds, perfect display and fast
-access.
-
-However, we still need to be careful as the CPU does not see the WT when
-accessing the cache. In particular, this means that we need to flush the
-cache lines after writing to an object through the CPU, and on
-transitioning from a cached state to WT.
-
-v2: Actually do the clflush on transition to WT, nagging by Ville.
-v3: Flush the CPU cache after writes into WT objects.
-v4: Rease onto LLC updates and report WT as "uncached" for
-get_cache_level_ioctl to remain symmetric with set_cache_level_ioctl.
-
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Cc: Kenneth Graunke <kenneth@whitecape.org>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 651d794fae9b79237aae1c97f8a9d9f3817bd31d)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_dma.c     |    3 +++
- drivers/gpu/drm/i915/i915_drv.h     |    4 +++-
- drivers/gpu/drm/i915/i915_gem.c     |   14 ++++++++++++--
- drivers/gpu/drm/i915/i915_gem_gtt.c |   11 ++++++++++-
- include/uapi/drm/i915_drm.h         |    1 +
- 5 files changed, 29 insertions(+), 4 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_dma.c
-+++ b/drivers/gpu/drm/i915/i915_dma.c
-@@ -984,6 +984,9 @@ static int i915_getparam(struct drm_devi
- 	case I915_PARAM_HAS_LLC:
- 		value = HAS_LLC(dev);
- 		break;
-+	case I915_PARAM_HAS_WT:
-+		value = HAS_WT(dev);
-+		break;
- 	case I915_PARAM_HAS_ALIASING_PPGTT:
- 		value = dev_priv->mm.aliasing_ppgtt ? 1 : 0;
- 		break;
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -454,6 +454,7 @@ enum i915_cache_level {
- 			      caches, eg sampler/render caches, and the
- 			      large Last-Level-Cache. LLC is coherent with
- 			      the CPU, but L3 is only visible to the GPU. */
-+	I915_CACHE_WT, /* hsw:gt3e WriteThrough for scanouts */
- };
- 
- typedef uint32_t gen6_gtt_pte_t;
-@@ -1385,7 +1386,7 @@ struct drm_i915_gem_object {
- 	unsigned int pending_fenced_gpu_access:1;
- 	unsigned int fenced_gpu_access:1;
- 
--	unsigned int cache_level:2;
-+	unsigned int cache_level:3;
- 
- 	unsigned int has_aliasing_ppgtt_mapping:1;
- 	unsigned int has_global_gtt_mapping:1;
-@@ -1530,6 +1531,7 @@ struct drm_i915_file_private {
- #define HAS_BLT(dev)            (INTEL_INFO(dev)->has_blt_ring)
- #define HAS_VEBOX(dev)          (INTEL_INFO(dev)->has_vebox_ring)
- #define HAS_LLC(dev)            (INTEL_INFO(dev)->has_llc)
-+#define HAS_WT(dev)            (IS_HASWELL(dev) && to_i915(dev)->ellc_size)
- #define I915_NEED_GFX_HWS(dev)	(INTEL_INFO(dev)->need_gfx_hws)
- 
- #define HAS_HW_CONTEXTS(dev)	(INTEL_INFO(dev)->gen >= 6)
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -3459,7 +3459,16 @@ int i915_gem_get_caching_ioctl(struct dr
- 		goto unlock;
- 	}
- 
--	args->caching = obj->cache_level != I915_CACHE_NONE;
-+	switch (obj->cache_level) {
-+	case I915_CACHE_LLC:
-+	case I915_CACHE_L3_LLC:
-+		args->caching = I915_CACHING_CACHED;
-+		break;
-+
-+	default:
-+		args->caching = I915_CACHING_NONE;
-+		break;
-+	}
- 
- 	drm_gem_object_unreference(&obj->base);
- unlock:
-@@ -3553,7 +3562,8 @@ i915_gem_object_pin_to_display_plane(str
- 	 * of uncaching, which would allow us to flush all the LLC-cached data
- 	 * with that bit in the PTE to main memory with just one PIPE_CONTROL.
- 	 */
--	ret = i915_gem_object_set_cache_level(obj, I915_CACHE_NONE);
-+	ret = i915_gem_object_set_cache_level(obj,
-+					      HAS_WT(obj->base.dev) ? I915_CACHE_WT : I915_CACHE_NONE);
- 	if (ret)
- 		goto err_unpin_display;
- 
---- a/drivers/gpu/drm/i915/i915_gem_gtt.c
-+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
-@@ -55,6 +55,7 @@
- #define HSW_WB_LLC_AGE3			HSW_CACHEABILITY_CONTROL(0x2)
- #define HSW_WB_LLC_AGE0			HSW_CACHEABILITY_CONTROL(0x3)
- #define HSW_WB_ELLC_LLC_AGE0		HSW_CACHEABILITY_CONTROL(0xb)
-+#define HSW_WT_ELLC_LLC_AGE0		HSW_CACHEABILITY_CONTROL(0x6)
- 
- static gen6_gtt_pte_t snb_pte_encode(dma_addr_t addr,
- 				     enum i915_cache_level level)
-@@ -138,8 +139,16 @@ static gen6_gtt_pte_t iris_pte_encode(dm
- 	gen6_gtt_pte_t pte = GEN6_PTE_VALID;
- 	pte |= HSW_PTE_ADDR_ENCODE(addr);
- 
--	if (level != I915_CACHE_NONE)
-+	switch (level) {
-+	case I915_CACHE_NONE:
-+		break;
-+	case I915_CACHE_WT:
-+		pte |= HSW_WT_ELLC_LLC_AGE0;
-+		break;
-+	default:
- 		pte |= HSW_WB_ELLC_LLC_AGE0;
-+		break;
-+	}
- 
- 	return pte;
- }
---- a/include/uapi/drm/i915_drm.h
-+++ b/include/uapi/drm/i915_drm.h
-@@ -334,6 +334,7 @@ typedef struct drm_i915_irq_wait {
- #define I915_PARAM_HAS_PINNED_BATCHES	 24
- #define I915_PARAM_HAS_EXEC_NO_RELOC	 25
- #define I915_PARAM_HAS_EXEC_HANDLE_LUT   26
-+#define I915_PARAM_HAS_WT     	 	 27
- 
- typedef struct drm_i915_getparam {
- 	int param;
diff --git a/patches.baytrail/0679-drm-i915-Allow-the-user-to-set-bo-into-the-DISPLAY-c.patch b/patches.baytrail/0679-drm-i915-Allow-the-user-to-set-bo-into-the-DISPLAY-c.patch
deleted file mode 100644
index 588ac3328fe16..0000000000000
--- a/patches.baytrail/0679-drm-i915-Allow-the-user-to-set-bo-into-the-DISPLAY-c.patch
+++ /dev/null
@@ -1,55 +0,0 @@
-From 5ec64f92dc305cd6378f496d9dd09825bfe8a248 Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Thu, 8 Aug 2013 14:41:11 +0100
-Subject: drm/i915: Allow the user to set bo into the DISPLAY cache domain
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-This is primarily for the benefit of the create2 ioctl so that the
-caller can avoid the later step of rebinding the bo with new PTE bits.
-After introducing WT (and possibly GFDT) cacheing for display targets,
-not everything in the display is earmarked as UC, and more importantly
-what is is controlled by the kernel.
-
-Note that set_cache_level/get_cache_level for DISPLAY is not necessarily
-idempotent; get_cache_level may return UC for architectures that have no
-special cache domain for the display engine.
-
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 4257d3ba3b87a84adb2f840620cb63512f0bab22)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem.c | 7 +++++++
- 1 file changed, 7 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index 8e41b2c6eb1d..3d9e248bf422 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -3465,6 +3465,10 @@ int i915_gem_get_caching_ioctl(struct drm_device *dev, void *data,
- 		args->caching = I915_CACHING_CACHED;
- 		break;
- 
-+	case I915_CACHE_WT:
-+		args->caching = I915_CACHING_DISPLAY;
-+		break;
-+
- 	default:
- 		args->caching = I915_CACHING_NONE;
- 		break;
-@@ -3491,6 +3495,9 @@ int i915_gem_set_caching_ioctl(struct drm_device *dev, void *data,
- 	case I915_CACHING_CACHED:
- 		level = I915_CACHE_LLC;
- 		break;
-+	case I915_CACHING_DISPLAY:
-+		level = HAS_WT(dev) ? I915_CACHE_WT : I915_CACHE_NONE;
-+		break;
- 	default:
- 		return -EINVAL;
- 	}
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0680-drm-i915-remove-set-but-unused-variables.patch b/patches.baytrail/0680-drm-i915-remove-set-but-unused-variables.patch
deleted file mode 100644
index 9c8a109b742fb..0000000000000
--- a/patches.baytrail/0680-drm-i915-remove-set-but-unused-variables.patch
+++ /dev/null
@@ -1,134 +0,0 @@
-From 814174445820af4198b78ba86f8a2094cefaf441 Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Mon, 12 Aug 2013 14:56:53 -0300
-Subject: drm/i915: remove set but unused variables
-
-Caught by "make W=1 drivers/gpu/drm/i915/".
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit f3f08572fc245bc0cf5f102473ce0f54e693831d)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c |   12 ++----------
- drivers/gpu/drm/i915/intel_dp.c      |    3 ---
- drivers/gpu/drm/i915/intel_hdmi.c    |    2 --
- 3 files changed, 2 insertions(+), 15 deletions(-)
-
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -690,7 +690,7 @@ vlv_find_best_dpll(const intel_limit_t *
- {
- 	u32 p1, p2, m1, m2, vco, bestn, bestm1, bestm2, bestp1, bestp2;
- 	u32 m, n, fastclk;
--	u32 updrate, minupdate, fracbits, p;
-+	u32 updrate, minupdate, p;
- 	unsigned long bestppm, ppm, absppm;
- 	int dotclk, flag;
- 
-@@ -701,7 +701,6 @@ vlv_find_best_dpll(const intel_limit_t *
- 	fastclk = dotclk / (2*100);
- 	updrate = 0;
- 	minupdate = 19200;
--	fracbits = 1;
- 	n = p = p1 = p2 = m = m1 = m2 = vco = bestn = 0;
- 	bestm1 = bestm2 = bestp1 = bestp2 = 0;
- 
-@@ -4419,13 +4418,10 @@ static void vlv_update_pll(struct intel_
- 	int pipe = crtc->pipe;
- 	u32 dpll, mdiv;
- 	u32 bestn, bestm1, bestm2, bestp1, bestp2;
--	bool is_hdmi;
- 	u32 coreclk, reg_val, dpll_md;
- 
- 	mutex_lock(&dev_priv->dpio_lock);
- 
--	is_hdmi = intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_HDMI);
--
- 	bestn = crtc->config.dpll.n;
- 	bestm1 = crtc->config.dpll.m1;
- 	bestm2 = crtc->config.dpll.m2;
-@@ -8900,14 +8896,13 @@ intel_modeset_stage_output_state(struct
- 	struct drm_crtc *new_crtc;
- 	struct intel_connector *connector;
- 	struct intel_encoder *encoder;
--	int count, ro;
-+	int ro;
- 
- 	/* The upper layers ensure that we either disable a crtc or have a list
- 	 * of connectors. For paranoia, double-check this. */
- 	WARN_ON(!set->fb && (set->num_connectors != 0));
- 	WARN_ON(set->fb && (set->num_connectors == 0));
- 
--	count = 0;
- 	list_for_each_entry(connector, &dev->mode_config.connector_list,
- 			    base.head) {
- 		/* Otherwise traverse passed in connector list and get encoders
-@@ -8941,7 +8936,6 @@ intel_modeset_stage_output_state(struct
- 	/* connector->new_encoder is now updated for all connectors. */
- 
- 	/* Update crtc of enabled connectors. */
--	count = 0;
- 	list_for_each_entry(connector, &dev->mode_config.connector_list,
- 			    base.head) {
- 		if (!connector->new_encoder)
-@@ -10303,7 +10297,6 @@ void intel_modeset_cleanup(struct drm_de
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct drm_crtc *crtc;
--	struct intel_crtc *intel_crtc;
- 
- 	/*
- 	 * Interrupts and polling as the first thing to avoid creating havoc.
-@@ -10327,7 +10320,6 @@ void intel_modeset_cleanup(struct drm_de
- 		if (!crtc->fb)
- 			continue;
- 
--		intel_crtc = to_intel_crtc(crtc);
- 		intel_increase_pllclock(crtc);
- 	}
- 
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -2337,7 +2337,6 @@ intel_dp_start_link_train(struct intel_d
- 	struct drm_device *dev = encoder->dev;
- 	int i;
- 	uint8_t voltage;
--	bool clock_recovery = false;
- 	int voltage_tries, loop_tries;
- 	uint32_t DP = intel_dp->DP;
- 
-@@ -2355,7 +2354,6 @@ intel_dp_start_link_train(struct intel_d
- 	voltage = 0xff;
- 	voltage_tries = 0;
- 	loop_tries = 0;
--	clock_recovery = false;
- 	for (;;) {
- 		/* Use intel_dp->train_set[0] to set the voltage and pre emphasis values */
- 		uint8_t	    link_status[DP_LINK_STATUS_SIZE];
-@@ -2376,7 +2374,6 @@ intel_dp_start_link_train(struct intel_d
- 
- 		if (drm_dp_clock_recovery_ok(link_status, intel_dp->lane_count)) {
- 			DRM_DEBUG_KMS("clock recovery OK\n");
--			clock_recovery = true;
- 			break;
- 		}
- 
---- a/drivers/gpu/drm/i915/intel_hdmi.c
-+++ b/drivers/gpu/drm/i915/intel_hdmi.c
-@@ -1245,7 +1245,6 @@ void intel_hdmi_init(struct drm_device *
- {
- 	struct intel_digital_port *intel_dig_port;
- 	struct intel_encoder *intel_encoder;
--	struct drm_encoder *encoder;
- 	struct intel_connector *intel_connector;
- 
- 	intel_dig_port = kzalloc(sizeof(struct intel_digital_port), GFP_KERNEL);
-@@ -1259,7 +1258,6 @@ void intel_hdmi_init(struct drm_device *
- 	}
- 
- 	intel_encoder = &intel_dig_port->base;
--	encoder = &intel_encoder->base;
- 
- 	drm_encoder_init(dev, &intel_encoder->base, &intel_hdmi_enc_funcs,
- 			 DRM_MODE_ENCODER_TMDS);
diff --git a/patches.baytrail/0681-drm-i915-Print-the-changes-required-for-modeset.patch b/patches.baytrail/0681-drm-i915-Print-the-changes-required-for-modeset.patch
deleted file mode 100644
index 1ab5b59cb0996..0000000000000
--- a/patches.baytrail/0681-drm-i915-Print-the-changes-required-for-modeset.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From 69c683376a25fa36ec2bae8ab184df959bccecd7 Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Tue, 13 Aug 2013 18:48:47 +0100
-Subject: drm/i915: Print the changes required for modeset
-
-After computing the stage changes for the set_config, record those in
-the debug log.
-
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit a1d95703b7fa5cbc4abf53f63df51c49cbacc7b6)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 3 +++
- 1 file changed, 3 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 52508e7f2658..63df05ea823e 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -8886,6 +8886,9 @@ intel_set_config_compute_mode_changes(struct drm_mode_set *set,
- 		drm_mode_debug_printmodeline(set->mode);
- 		config->mode_changed = true;
- 	}
-+
-+	DRM_DEBUG_KMS("computed changes for [CRTC:%d], mode_changed=%d, fb_changed=%d\n",
-+			set->crtc->base.id, config->mode_changed, config->fb_changed);
- }
- 
- static int
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0682-drm-i915-print-a-message-when-we-detect-an-early-Has.patch b/patches.baytrail/0682-drm-i915-print-a-message-when-we-detect-an-early-Has.patch
deleted file mode 100644
index cb6936da43335..0000000000000
--- a/patches.baytrail/0682-drm-i915-print-a-message-when-we-detect-an-early-Has.patch
+++ /dev/null
@@ -1,58 +0,0 @@
-From d05d6bca3d792161eecf1bf6985594fb548f4d8e Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Mon, 12 Aug 2013 14:34:08 -0300
-Subject: drm/i915: print a message when we detect an early Haswell SDV
-
-The machines that fall in this category are the SDVs that have a PCI
-ID starting with 0x0C. These are very early pre-production machines
-and may not fully work. Other Haswell SDVs have PCI IDs that match the
-real Haswell machines and we expect them to work better.
-
-Even though they have problems, they still mostly work so I don't see
-a reason to refuse loading our driver. But I do see a reason to reject
-bug reports from these machines, so the message should help the bug
-triagers.
-
-As far as I know, we don't implement some workarounds that are
-specific to these machines and suspend/resume may not work on most of
-them, but besides this, they may work.
-
-Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=61508
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit ed1c9e2cf414e32cb7ea1217b51b39e70fc132d2)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_dma.c |    8 ++++++++
- drivers/gpu/drm/i915/i915_drv.h |    2 ++
- 2 files changed, 10 insertions(+)
-
---- a/drivers/gpu/drm/i915/i915_dma.c
-+++ b/drivers/gpu/drm/i915/i915_dma.c
-@@ -1496,6 +1496,14 @@ int i915_driver_load(struct drm_device *
- 
- 	i915_dump_device_info(dev_priv);
- 
-+	/* Not all pre-production machines fall into this category, only the
-+	 * very first ones. Almost everything should work, except for maybe
-+	 * suspend/resume. And we don't implement workarounds that affect only
-+	 * pre-production machines. */
-+	if (IS_HSW_EARLY_SDV(dev))
-+		DRM_INFO("This is an early pre-production Haswell machine. "
-+			 "It may not be fully functional.\n");
-+
- 	if (i915_get_bridge_dev(dev)) {
- 		ret = -EIO;
- 		goto free_priv;
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1511,6 +1511,8 @@ struct drm_i915_file_private {
- #define IS_VALLEYVIEW(dev)	(INTEL_INFO(dev)->is_valleyview)
- #define IS_HASWELL(dev)	(INTEL_INFO(dev)->is_haswell)
- #define IS_MOBILE(dev)		(INTEL_INFO(dev)->is_mobile)
-+#define IS_HSW_EARLY_SDV(dev)	(IS_HASWELL(dev) && \
-+				 ((dev)->pci_device & 0xFF00) == 0x0C00)
- #define IS_ULT(dev)		(IS_HASWELL(dev) && \
- 				 ((dev)->pci_device & 0xFF00) == 0x0A00)
- 
diff --git a/patches.baytrail/0683-drm-i915-tune-the-RC6-threshold-for-stability.patch b/patches.baytrail/0683-drm-i915-tune-the-RC6-threshold-for-stability.patch
deleted file mode 100644
index f8d6382d7a1bb..0000000000000
--- a/patches.baytrail/0683-drm-i915-tune-the-RC6-threshold-for-stability.patch
+++ /dev/null
@@ -1,56 +0,0 @@
-From a22a07b07d38df6c0f7f62b95098aaa5de2b0587 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?St=C3=A9phane=20Marchesin?= <marcheu@chromium.org>
-Date: Tue, 13 Aug 2013 11:55:17 -0700
-Subject: drm/i915: tune the RC6 threshold for stability
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-It's basically the same deal as the RC6+ issues on ivy bridge
-except this time with RC6 on sandy bridge. Like last time the
-core of the issue is that the timings don't work 100% with our
-voltage regulator. So from time to time, the kernel will print
-a warning message about the GPU not getting out of RC6. In
-particular, I found this fairly easy to reproduce during
-suspend/resume.
-
-Changing the threshold to 125000 instead of 50000 seems to fix
-the issue. The previous patch used 150000 but as it turns out
-this doesn't work everywhere. After getting such a machine, I
-bisected the highest value which works, which is 125000, so here
-it is.
-
-I also measured the idle power usage before/after this patch and
-didn't see a difference on a sandy bridge laptop. On haswell and
-up, it makes a big difference, so we want to keep it at 50k
-there. It also seems like haswell doesn't have the RC6 issues
-that sandy bridge has so the 50k value is fine.
-
-Signed-off-by: Stéphane Marchesin <marcheu@chromium.org>
-Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 351aa5666d02062b52329bcfe4bcf9d1f882fba9)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 5 ++++-
- 1 file changed, 4 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 4800bab89df1..d593c2dd7031 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -3508,7 +3508,10 @@ static void gen6_enable_rps(struct drm_device *dev)
- 
- 	I915_WRITE(GEN6_RC_SLEEP, 0);
- 	I915_WRITE(GEN6_RC1e_THRESHOLD, 1000);
--	I915_WRITE(GEN6_RC6_THRESHOLD, 50000);
-+	if (INTEL_INFO(dev)->gen <= 6 || IS_IVYBRIDGE(dev))
-+		I915_WRITE(GEN6_RC6_THRESHOLD, 125000);
-+	else
-+		I915_WRITE(GEN6_RC6_THRESHOLD, 50000);
- 	I915_WRITE(GEN6_RC6p_THRESHOLD, 150000);
- 	I915_WRITE(GEN6_RC6pp_THRESHOLD, 64000); /* unused */
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0684-drm-i915-Initialize-seqno-for-VECS-too.patch b/patches.baytrail/0684-drm-i915-Initialize-seqno-for-VECS-too.patch
deleted file mode 100644
index bf587ecdadb93..0000000000000
--- a/patches.baytrail/0684-drm-i915-Initialize-seqno-for-VECS-too.patch
+++ /dev/null
@@ -1,47 +0,0 @@
-From 4af7854549457ba7c912431bdcf59b78baa56700 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <benjamin.widawsky@intel.com>
-Date: Mon, 12 Aug 2013 16:53:03 -0700
-Subject: drm/i915: Initialize seqno for VECS too
-
-We require n-1 mailboxes for proper semaphore synchronization. All
-semaphore synchronization code relies on proper values in these
-mailboxes. The fact that we failed to touch the vebox ring by itself
-was unlikely to be an issue since the HW should be initializing the
-values to 0. However the error framework for testing seqno wrap
-introduced by Mika, in addition to the hangcheck via seqno, and
-i915_error_first_batchbuffer() combined caused a nice explosion.
-
-The problem is caused by seqno wrap because the wrap condition is not
-properly setup. The wrap code attempts to set the sync mailboxes all
-to 0, and then set the current seqno to one less than 0. In all cases,
-the vebox mailbox wasn't properly being initialized. This caused a
-wrap to not occur. When hangcheck kicks in with the bogus seqno
-values, the rest just doesn't work. It makes me wonder if we shouldn't
-consider a dumber version of hangcheck...
-
-How we messed this up: VECS support was written before the
-aforementioned other features. Upon VECS being rebased, these facts
-were missed.
-
-Cc: Mika Kuoppala <mika.kuoppala@intel.com>
-Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=65387
-Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67198
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 5020150b3b8d2912466e28572f25b3cc56722aec)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_ringbuffer.c |    2 ++
- 1 file changed, 2 insertions(+)
-
---- a/drivers/gpu/drm/i915/intel_ringbuffer.c
-+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
-@@ -1610,6 +1610,8 @@ void intel_ring_init_seqno(struct intel_
- 	if (INTEL_INFO(ring->dev)->gen >= 6) {
- 		I915_WRITE(RING_SYNC_0(ring->mmio_base), 0);
- 		I915_WRITE(RING_SYNC_1(ring->mmio_base), 0);
-+		if (HAS_VEBOX(ring->dev))
-+			I915_WRITE(RING_SYNC_2(ring->mmio_base), 0);
- 	}
- 
- 	ring->set_seqno(ring, seqno);
diff --git a/patches.baytrail/0685-drm-i915-Get-VECS-semaphore-info-on-error.patch b/patches.baytrail/0685-drm-i915-Get-VECS-semaphore-info-on-error.patch
deleted file mode 100644
index bee59e2fabecf..0000000000000
--- a/patches.baytrail/0685-drm-i915-Get-VECS-semaphore-info-on-error.patch
+++ /dev/null
@@ -1,51 +0,0 @@
-From b794a83e5cfb7b0e210f3d9eb8d65d64d37e0e95 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <benjamin.widawsky@intel.com>
-Date: Mon, 12 Aug 2013 16:53:04 -0700
-Subject: drm/i915: Get VECS semaphore info on error
-
-Ideally we could use for_each_ring with the ring flags as I've done a
-couple times
-(http://lists.freedesktop.org/archives/intel-gfx/2013-June/029450.html).
-Until Daniel merges that patch though, we can just use this.
-
-Cc: Mika Kuoppala <mika.kuoppala@intel.com>
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 4e5aabfd3106cfd68694db416e271996aadf114a)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gpu_error.c | 11 +++++++++++
- 1 file changed, 11 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
-index 60393cb9a7c7..558e568d5b45 100644
---- a/drivers/gpu/drm/i915/i915_gpu_error.c
-+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
-@@ -243,6 +243,11 @@ static void i915_ring_error_state(struct drm_i915_error_state_buf *m,
- 		err_printf(m, "  SYNC_1: 0x%08x [last synced 0x%08x]\n",
- 			   error->semaphore_mboxes[ring][1],
- 			   error->semaphore_seqno[ring][1]);
-+		if (HAS_VEBOX(dev)) {
-+			err_printf(m, "  SYNC_2: 0x%08x [last synced 0x%08x]\n",
-+				   error->semaphore_mboxes[ring][2],
-+				   error->semaphore_seqno[ring][2]);
-+		}
- 	}
- 	err_printf(m, "  seqno: 0x%08x\n", error->seqno[ring]);
- 	err_printf(m, "  waiting: %s\n", yesno(error->waiting[ring]));
-@@ -682,6 +687,12 @@ static void i915_record_ring_state(struct drm_device *dev,
- 		error->semaphore_seqno[ring->id][1] = ring->sync_seqno[1];
- 	}
- 
-+	if (HAS_VEBOX(dev)) {
-+		error->semaphore_mboxes[ring->id][2] =
-+			I915_READ(RING_SYNC_2(ring->mmio_base));
-+		error->semaphore_seqno[ring->id][2] = ring->sync_seqno[2];
-+	}
-+
- 	if (INTEL_INFO(dev)->gen >= 4) {
- 		error->faddr[ring->id] = I915_READ(RING_DMA_FADD(ring->mmio_base));
- 		error->ipeir[ring->id] = I915_READ(RING_IPEIR(ring->mmio_base));
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0686-drm-i915-clarify-error-paths-in-create_stolen_for_pr.patch b/patches.baytrail/0686-drm-i915-clarify-error-paths-in-create_stolen_for_pr.patch
deleted file mode 100644
index d75f2cf47835d..0000000000000
--- a/patches.baytrail/0686-drm-i915-clarify-error-paths-in-create_stolen_for_pr.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-From f9e3aa3b0256cd858bed801e3ff2b2eb3599696e Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Wed, 14 Aug 2013 10:01:32 +0200
-Subject: drm/i915: clarify error paths in create_stolen_for_preallocated
-
-Use the standard inversely ordered goto label stack for everything.
-Spotted while reviewing place where we might need to to call
-vma_destroy but failed to do so.
-
-Cc: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 4a025e26a2979193739f46e391ffc05cf0637d90)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem_stolen.c | 5 +++--
- 1 file changed, 3 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem_stolen.c b/drivers/gpu/drm/i915/i915_gem_stolen.c
-index 8b03327f74b9..9969d10b80f5 100644
---- a/drivers/gpu/drm/i915/i915_gem_stolen.c
-+++ b/drivers/gpu/drm/i915/i915_gem_stolen.c
-@@ -409,8 +409,7 @@ i915_gem_object_create_stolen_for_preallocated(struct drm_device *dev,
- 		ret = drm_mm_reserve_node(&ggtt->mm, &vma->node);
- 		if (ret) {
- 			DRM_DEBUG_KMS("failed to allocate stolen GTT space\n");
--			i915_gem_vma_destroy(vma);
--			goto err_out;
-+			goto err_vma;
- 		}
- 	}
- 
-@@ -421,6 +420,8 @@ i915_gem_object_create_stolen_for_preallocated(struct drm_device *dev,
- 
- 	return obj;
- 
-+err_vma:
-+	i915_gem_vma_destroy(vma);
- err_out:
- 	drm_mm_remove_node(stolen);
- 	kfree(stolen);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0687-drm-i915-Remove-node-only-when-allocated.patch b/patches.baytrail/0687-drm-i915-Remove-node-only-when-allocated.patch
deleted file mode 100644
index ae0fd47230c7a..0000000000000
--- a/patches.baytrail/0687-drm-i915-Remove-node-only-when-allocated.patch
+++ /dev/null
@@ -1,56 +0,0 @@
-From 6db784ea1b660252a389617787720b851f047f97 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <benjamin.widawsky@intel.com>
-Date: Tue, 13 Aug 2013 18:09:06 -0700
-Subject: drm/i915: Remove node only when allocated
-
-VMAs can be created and not bound. One may think of it as lazy cleanup,
-and safely gloss over the conditions which manufacture it. In either
-case, when the object backing the i915 vma is destroyed, we must cleanup
-the vma without stumbling into a bunch of pitfalls that assume the vma
-is bound.
-
-NOTE: I was pretty certain the above condition could only happen when we
-introduced the use of VMAs being looked up at execbuf, and already
-existing. Paulo has hit this though, so I must be missing something. As
-I believe the patch is correct anyway, therefore I won't scratch my head
-too hard.
-
-v2: use goto destroy as a compromise (Chris)
-
-Cc: Chris Wilson <chris@chris-wilson.co.uk>
-Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 433544bd25b06cb6dcdb79b6da8d748a0220898e)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem.c | 5 +++++
- 1 file changed, 5 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index 3d9e248bf422..4a58ead0ba76 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -2606,6 +2606,9 @@ int i915_vma_unbind(struct i915_vma *vma)
- 	if (list_empty(&vma->vma_link))
- 		return 0;
- 
-+	if (!drm_mm_node_allocated(&vma->node))
-+		goto destroy;
-+
- 	if (obj->pin_count)
- 		return -EBUSY;
- 
-@@ -2643,6 +2646,8 @@ int i915_vma_unbind(struct i915_vma *vma)
- 		obj->map_and_fenceable = true;
- 
- 	drm_mm_remove_node(&vma->node);
-+
-+destroy:
- 	i915_gem_vma_destroy(vma);
- 
- 	/* Since the unbound list is global, only move to that list if
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0688-drm-i915-cleanup-map-fence-in-bind.patch b/patches.baytrail/0688-drm-i915-cleanup-map-fence-in-bind.patch
deleted file mode 100644
index a961ee93031b7..0000000000000
--- a/patches.baytrail/0688-drm-i915-cleanup-map-fence-in-bind.patch
+++ /dev/null
@@ -1,67 +0,0 @@
-From 8af30fecb75e77ff67b308c50d66baf278da2dd1 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <benjamin.widawsky@intel.com>
-Date: Tue, 13 Aug 2013 18:09:07 -0700
-Subject: drm/i915: cleanup map&fence in bind
-
-Cleanup the map and fenceable setting during bind to make more sense,
-and not check i915_is_ggtt() 2 unnecessary times
-
-v2: Move the bools into the if block (Chris) - There are ways to tidy
-this function (fence calculations for instance) even further, but they
-are quite invasive, so I am punting on those unless specifically asked.
-
-v3: Add newline between variable declaration and logic (Chris)
-
-Recommended-by: Chris Wilson <chris@chris-wilson.co.uk>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 4bd561b3e8d7d2407cf465cb79c51a1ff1264343)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem.c | 19 +++++++++----------
- 1 file changed, 9 insertions(+), 10 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index 4a58ead0ba76..01cc016e8d52 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -3106,7 +3106,6 @@ i915_gem_object_bind_to_vm(struct drm_i915_gem_object *obj,
- 	struct drm_device *dev = obj->base.dev;
- 	drm_i915_private_t *dev_priv = dev->dev_private;
- 	u32 size, fence_size, fence_alignment, unfenced_alignment;
--	bool mappable, fenceable;
- 	size_t gtt_max =
- 		map_and_fenceable ? dev_priv->gtt.mappable_end : vm->total;
- 	struct i915_vma *vma;
-@@ -3191,18 +3190,18 @@ search_free:
- 	list_move_tail(&obj->global_list, &dev_priv->mm.bound_list);
- 	list_add_tail(&vma->mm_list, &vm->inactive_list);
- 
--	fenceable =
--		i915_is_ggtt(vm) &&
--		i915_gem_obj_ggtt_size(obj) == fence_size &&
--		(i915_gem_obj_ggtt_offset(obj) & (fence_alignment - 1)) == 0;
-+	if (i915_is_ggtt(vm)) {
-+		bool mappable, fenceable;
- 
--	mappable =
--		i915_is_ggtt(vm) &&
--		vma->node.start + obj->base.size <= dev_priv->gtt.mappable_end;
-+		fenceable =
-+			i915_gem_obj_ggtt_size(obj) == fence_size &&
-+			(i915_gem_obj_ggtt_offset(obj) & (fence_alignment - 1)) == 0;
-+
-+		mappable =
-+			vma->node.start + obj->base.size <= dev_priv->gtt.mappable_end;
- 
--	/* Map and fenceable only changes if the VM is the global GGTT */
--	if (i915_is_ggtt(vm))
- 		obj->map_and_fenceable = mappable && fenceable;
-+	}
- 
- 	WARN_ON(map_and_fenceable && !obj->map_and_fenceable);
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0689-drm-i915-use-vma-node-directly-and-rewrap-map-fence-.patch b/patches.baytrail/0689-drm-i915-use-vma-node-directly-and-rewrap-map-fence-.patch
deleted file mode 100644
index 4bd8104a6410a..0000000000000
--- a/patches.baytrail/0689-drm-i915-use-vma-node-directly-and-rewrap-map-fence-.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From 6907fb3c9db9eae28162cc395e740198d6a02627 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Wed, 14 Aug 2013 10:21:23 +0200
-Subject: drm/i915: use vma->node directly and rewrap map&fence in bind
-
-Use () to make for neater alignment of the split lines, too. With this
-we ditch another jump through the obj_gtt_size/offset indirection
-maze.
-
-Cc: Ben Widawsky <benjamin.widawsky@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 49987099e2cfce4eda5d428e2618fd4e93aba597)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem.c | 9 ++++-----
- 1 file changed, 4 insertions(+), 5 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index 01cc016e8d52..31f23bb07201 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -3193,12 +3193,11 @@ search_free:
- 	if (i915_is_ggtt(vm)) {
- 		bool mappable, fenceable;
- 
--		fenceable =
--			i915_gem_obj_ggtt_size(obj) == fence_size &&
--			(i915_gem_obj_ggtt_offset(obj) & (fence_alignment - 1)) == 0;
-+		fenceable = (vma->node.size == fence_size &&
-+			     (vma->node.start & (fence_alignment - 1)) == 0);
- 
--		mappable =
--			vma->node.start + obj->base.size <= dev_priv->gtt.mappable_end;
-+		mappable = (vma->node.start + obj->base.size <=
-+			    dev_priv->gtt.mappable_end);
- 
- 		obj->map_and_fenceable = mappable && fenceable;
- 	}
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0690-drm-i915-Drop-the-overzealous-warning-from-i915_gem_.patch b/patches.baytrail/0690-drm-i915-Drop-the-overzealous-warning-from-i915_gem_.patch
deleted file mode 100644
index b0fec2624d3be..0000000000000
--- a/patches.baytrail/0690-drm-i915-Drop-the-overzealous-warning-from-i915_gem_.patch
+++ /dev/null
@@ -1,58 +0,0 @@
-From 18e912c84426986f63aca7736536bf41a11e29f1 Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Mon, 12 Aug 2013 11:46:17 +0100
-Subject: drm/i915: Drop the overzealous warning from i915_gem_set_cache_level
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-By our earlier reckoning, move from a snooped/llc setting to an uncached
-setting, leaves the CPU cache in a consistent state irrespective of our
-domain tracking - so we can forgo the warning about the lack of
-invalidation. Similarly for any writes posted to the snooped CPU domain,
-we know will be safely clflushed to the uncached PTEs after forcing the
-domain change.
-
-This WARN started to pop up with
-
-commit d46f1c3f1372e3a72fab97c60480aa4a1084387f
-Author:     Chris Wilson <chris@chris-wilson.co.uk>
-AuthorDate: Thu Aug 8 14:41:06 2013 +0100
-
-    drm/i915: Allow the GPU to cache stolen memory
-
-Ville brought up a scenario where the interaction of a set_caching
-ioctl call from userspace on a scanout buffer (i.e. obj->pin_display
-is set) resulted in the code getting confused and not properly
-flushing stale cpu cachelines. Luckily we already prevent this by
-rejecting caching changes when obj->pin_count is set.
-
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=68040
-Tested-by: cancan,feng <cancan.feng@intel.com>
-[danvet: Add buglink, bisect result and explain why Ville's scenario
-is already taken care of.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 4b6d846e9a20ac8c9dd641d0ea875c28f331e241)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem.c | 1 -
- 1 file changed, 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index 31f23bb07201..c6baa3c5d7b3 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -3428,7 +3428,6 @@ int i915_gem_object_set_cache_level(struct drm_i915_gem_object *obj,
- 		 * Just set it to the CPU cache for now.
- 		 */
- 		WARN_ON(obj->base.write_domain & ~I915_GEM_DOMAIN_CPU);
--		WARN_ON(obj->base.read_domains & ~I915_GEM_DOMAIN_CPU);
- 
- 		old_read_domains = obj->base.read_domains;
- 		old_write_domain = obj->base.write_domain;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0691-drm-i915-check-the-power-well-when-redisabling-VGA.patch b/patches.baytrail/0691-drm-i915-check-the-power-well-when-redisabling-VGA.patch
deleted file mode 100644
index faab53f60bad4..0000000000000
--- a/patches.baytrail/0691-drm-i915-check-the-power-well-when-redisabling-VGA.patch
+++ /dev/null
@@ -1,58 +0,0 @@
-From df7446535e93e9feb311b7cc7d746bdfa6da70f6 Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Fri, 2 Aug 2013 16:22:24 -0300
-Subject: drm/i915: check the power well when redisabling VGA
-
-If the power well is disabled VGA is guaranteed to be disabled.
-
-This fixes unclaimed register messages that happen on suspend/resume.
-
-v2: Check the actual hw power well state instead of our own tracking
-to make sure VGA is _really_ off (in case the BIOS/KVMr has just its
-own request bit set). Requested by Ville.
-
-Note: Ville suggested whether it wouldn't be better to just enable the
-power well over a slightly longer time in our resume code, since we
-already do that. I tend to agree, but there's also the modeset force
-code in the lid notifier which _also_ eventually calls redisable_vga.
-We shouldn't ever need this on somewhat modern hw (everything with
-opregion essentially) but the code to bail out isn't there. Hence
-stick with this simple approach here for now.
-
-Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67517
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-[danvet: Summarize the discussion around the resume sequence and lid
-notifier a bit.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 8dc8a27c9733a41cda84e8c70da8313e1d54c4ae)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 11 +++++++++++
- 1 file changed, 11 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 63df05ea823e..8f4dceef5480 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -10110,6 +10110,17 @@ void i915_redisable_vga(struct drm_device *dev)
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	u32 vga_reg = i915_vgacntrl_reg(dev);
- 
-+	/* This function can be called both from intel_modeset_setup_hw_state or
-+	 * at a very early point in our resume sequence, where the power well
-+	 * structures are not yet restored. Since this function is at a very
-+	 * paranoid "someone might have enabled VGA while we were not looking"
-+	 * level, just check if the power well is enabled instead of trying to
-+	 * follow the "don't touch the power well if we don't need it" policy
-+	 * the rest of the driver uses. */
-+	if (HAS_POWER_WELL(dev) &&
-+	    (I915_READ(HSW_PWR_WELL_DRIVER) & HSW_PWR_WELL_STATE) == 0)
-+		return;
-+
- 	if (I915_READ(vga_reg) != VGA_DISP_DISABLE) {
- 		DRM_DEBUG_KMS("Something enabled VGA plane, disabling it\n");
- 		i915_disable_vga(dev);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0692-drm-i915-clarify-Haswell-power-well-bit-names.patch b/patches.baytrail/0692-drm-i915-clarify-Haswell-power-well-bit-names.patch
deleted file mode 100644
index 23b6318469ec5..0000000000000
--- a/patches.baytrail/0692-drm-i915-clarify-Haswell-power-well-bit-names.patch
+++ /dev/null
@@ -1,87 +0,0 @@
-From fb9af3e5e1e180bff20e6ad653a50547e4d5e0e4 Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Fri, 2 Aug 2013 16:22:25 -0300
-Subject: drm/i915: clarify Haswell power well bit names
-
-Whenever I need to work with the HSW_PWER_WELL_* register bits I have
-to look at the documentation to find out which bit is to request the
-power well and which one shows its current state. Rename the bits so I
-won't need to look the docs every time.
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 6aedd1f539f51b7b0c3d6be0088c3541f9d2c294)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_reg.h      |    4 ++--
- drivers/gpu/drm/i915/intel_display.c |    2 +-
- drivers/gpu/drm/i915/intel_pm.c      |   13 +++++++------
- 3 files changed, 10 insertions(+), 9 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -4837,8 +4837,8 @@
- #define HSW_PWR_WELL_DRIVER			0x45404 /* CTL2 */
- #define HSW_PWR_WELL_KVMR			0x45408 /* CTL3 */
- #define HSW_PWR_WELL_DEBUG			0x4540C /* CTL4 */
--#define   HSW_PWR_WELL_ENABLE			(1<<31)
--#define   HSW_PWR_WELL_STATE			(1<<30)
-+#define   HSW_PWR_WELL_ENABLE_REQUEST		(1<<31)
-+#define   HSW_PWR_WELL_STATE_ENABLED		(1<<30)
- #define HSW_PWR_WELL_CTL5			0x45410
- #define   HSW_PWR_WELL_ENABLE_SINGLE_STEP	(1<<31)
- #define   HSW_PWR_WELL_PWR_GATE_OVERRIDE	(1<<20)
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -10118,7 +10118,7 @@ void i915_redisable_vga(struct drm_devic
- 	 * follow the "don't touch the power well if we don't need it" policy
- 	 * the rest of the driver uses. */
- 	if (HAS_POWER_WELL(dev) &&
--	    (I915_READ(HSW_PWR_WELL_DRIVER) & HSW_PWR_WELL_STATE) == 0)
-+	    (I915_READ(HSW_PWR_WELL_DRIVER) & HSW_PWR_WELL_STATE_ENABLED) == 0)
- 		return;
- 
- 	if (I915_READ(vga_reg) != VGA_DISP_DISABLE) {
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -5285,7 +5285,7 @@ bool intel_display_power_enabled(struct
- 	case POWER_DOMAIN_TRANSCODER_B:
- 	case POWER_DOMAIN_TRANSCODER_C:
- 		return I915_READ(HSW_PWR_WELL_DRIVER) ==
--		       (HSW_PWR_WELL_ENABLE | HSW_PWR_WELL_STATE);
-+		     (HSW_PWR_WELL_ENABLE_REQUEST | HSW_PWR_WELL_STATE_ENABLED);
- 	default:
- 		BUG();
- 	}
-@@ -5298,17 +5298,18 @@ static void __intel_set_power_well(struc
- 	uint32_t tmp;
- 
- 	tmp = I915_READ(HSW_PWR_WELL_DRIVER);
--	is_enabled = tmp & HSW_PWR_WELL_STATE;
--	enable_requested = tmp & HSW_PWR_WELL_ENABLE;
-+	is_enabled = tmp & HSW_PWR_WELL_STATE_ENABLED;
-+	enable_requested = tmp & HSW_PWR_WELL_ENABLE_REQUEST;
- 
- 	if (enable) {
- 		if (!enable_requested)
--			I915_WRITE(HSW_PWR_WELL_DRIVER, HSW_PWR_WELL_ENABLE);
-+			I915_WRITE(HSW_PWR_WELL_DRIVER,
-+				   HSW_PWR_WELL_ENABLE_REQUEST);
- 
- 		if (!is_enabled) {
- 			DRM_DEBUG_KMS("Enabling power well\n");
- 			if (wait_for((I915_READ(HSW_PWR_WELL_DRIVER) &
--				      HSW_PWR_WELL_STATE), 20))
-+				      HSW_PWR_WELL_STATE_ENABLED), 20))
- 				DRM_ERROR("Timeout enabling power well\n");
- 		}
- 	} else {
-@@ -5428,7 +5429,7 @@ void intel_init_power_well(struct drm_de
- 
- 	/* We're taking over the BIOS, so clear any requests made by it since
- 	 * the driver is in charge now. */
--	if (I915_READ(HSW_PWR_WELL_BIOS) & HSW_PWR_WELL_ENABLE)
-+	if (I915_READ(HSW_PWR_WELL_BIOS) & HSW_PWR_WELL_ENABLE_REQUEST)
- 		I915_WRITE(HSW_PWR_WELL_BIOS, 0);
- }
- 
diff --git a/patches.baytrail/0693-drm-i915-Only-unmask-required-PM-interrupts.patch b/patches.baytrail/0693-drm-i915-Only-unmask-required-PM-interrupts.patch
deleted file mode 100644
index 7f50493fb0d3b..0000000000000
--- a/patches.baytrail/0693-drm-i915-Only-unmask-required-PM-interrupts.patch
+++ /dev/null
@@ -1,46 +0,0 @@
-From efe7db1c227423bf920c9a49b4f99f1eaae97937 Mon Sep 17 00:00:00 2001
-From: Vinit Azad <vinit.azad@intel.com>
-Date: Wed, 14 Aug 2013 13:34:33 -0700
-Subject: drm/i915: Only unmask required PM interrupts
-
-Un-masking all PM interrupts causes hardware to generate
-interrupts regardless of whether the interrupts are enabled
-on the DE side. Since turbo only need up/down threshold and
-rc6 timeout interrupt, mask all other interrupts bits to avoid
-unnecessary overhead/wake up.
-
-Note that our interrupt handler isn't being fired since we do set the
-IER bits properly (IIR bits aren't set). The overhead isn't because
-our driver is reacting to these interrupts, but because hardware keeps
-generating internal messages when PMINTRMSK doesn't mask out the
-up/down EI interrupts (which happen periodically).
-
-Signed-off-by: Vinit Azad <vinit.azad@intel.com>
-[danvet: Add follow-up explanation of the precise effects from Vinit
-as a note to the commit message.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit fd547d25a8ac3f390fee4a689de86a64e3d65fe1)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index d82d70588d11..21f4c958bbfe 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -3453,8 +3453,8 @@ static void gen6_enable_rps_interrupts(struct drm_device *dev)
- 	I915_WRITE(GEN6_PMIMR, I915_READ(GEN6_PMIMR) & ~GEN6_PM_RPS_EVENTS);
- 	I915_WRITE(GEN6_PMIIR, GEN6_PM_RPS_EVENTS);
- 	spin_unlock_irq(&dev_priv->irq_lock);
--	/* unmask all PM interrupts */
--	I915_WRITE(GEN6_PMINTRMSK, 0);
-+	/* only unmask PM interrupts we need. Mask all others. */
-+	I915_WRITE(GEN6_PMINTRMSK, ~GEN6_PM_RPS_EVENTS);
- }
- 
- static void gen6_enable_rps(struct drm_device *dev)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0694-drm-i915-explicit-store-base-gem-object-in-dma_buf-p.patch b/patches.baytrail/0694-drm-i915-explicit-store-base-gem-object-in-dma_buf-p.patch
deleted file mode 100644
index a62d090ee6561..0000000000000
--- a/patches.baytrail/0694-drm-i915-explicit-store-base-gem-object-in-dma_buf-p.patch
+++ /dev/null
@@ -1,96 +0,0 @@
-From dd7c8b3a3ca14b05de35905b74d25f01cf06ac54 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 8 Aug 2013 09:10:38 +0200
-Subject: drm/i915: explicit store base gem object in dma_buf->priv
-
-Makes it more obviously correct what tricks we play by reusing the drm
-prime release helper.
-
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 608806a549c656c925eeb253cbed768535f26e41)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem_dmabuf.c | 21 ++++++++++++---------
- 1 file changed, 12 insertions(+), 9 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem_dmabuf.c b/drivers/gpu/drm/i915/i915_gem_dmabuf.c
-index f7e1682ddb8b..e918b05fcbdd 100644
---- a/drivers/gpu/drm/i915/i915_gem_dmabuf.c
-+++ b/drivers/gpu/drm/i915/i915_gem_dmabuf.c
-@@ -27,10 +27,15 @@
- #include "i915_drv.h"
- #include <linux/dma-buf.h>
- 
-+static struct drm_i915_gem_object *dma_buf_to_obj(struct dma_buf *buf)
-+{
-+	return to_intel_bo(buf->priv);
-+}
-+
- static struct sg_table *i915_gem_map_dma_buf(struct dma_buf_attachment *attachment,
- 					     enum dma_data_direction dir)
- {
--	struct drm_i915_gem_object *obj = attachment->dmabuf->priv;
-+	struct drm_i915_gem_object *obj = dma_buf_to_obj(attachment->dmabuf);
- 	struct sg_table *st;
- 	struct scatterlist *src, *dst;
- 	int ret, i;
-@@ -85,7 +90,7 @@ static void i915_gem_unmap_dma_buf(struct dma_buf_attachment *attachment,
- 				   struct sg_table *sg,
- 				   enum dma_data_direction dir)
- {
--	struct drm_i915_gem_object *obj = attachment->dmabuf->priv;
-+	struct drm_i915_gem_object *obj = dma_buf_to_obj(attachment->dmabuf);
- 
- 	mutex_lock(&obj->base.dev->struct_mutex);
- 
-@@ -100,7 +105,7 @@ static void i915_gem_unmap_dma_buf(struct dma_buf_attachment *attachment,
- 
- static void *i915_gem_dmabuf_vmap(struct dma_buf *dma_buf)
- {
--	struct drm_i915_gem_object *obj = dma_buf->priv;
-+	struct drm_i915_gem_object *obj = dma_buf_to_obj(dma_buf);
- 	struct drm_device *dev = obj->base.dev;
- 	struct sg_page_iter sg_iter;
- 	struct page **pages;
-@@ -148,7 +153,7 @@ error:
- 
- static void i915_gem_dmabuf_vunmap(struct dma_buf *dma_buf, void *vaddr)
- {
--	struct drm_i915_gem_object *obj = dma_buf->priv;
-+	struct drm_i915_gem_object *obj = dma_buf_to_obj(dma_buf);
- 	struct drm_device *dev = obj->base.dev;
- 	int ret;
- 
-@@ -191,7 +196,7 @@ static int i915_gem_dmabuf_mmap(struct dma_buf *dma_buf, struct vm_area_struct *
- 
- static int i915_gem_begin_cpu_access(struct dma_buf *dma_buf, size_t start, size_t length, enum dma_data_direction direction)
- {
--	struct drm_i915_gem_object *obj = dma_buf->priv;
-+	struct drm_i915_gem_object *obj = dma_buf_to_obj(dma_buf);
- 	struct drm_device *dev = obj->base.dev;
- 	int ret;
- 	bool write = (direction == DMA_BIDIRECTIONAL || direction == DMA_TO_DEVICE);
-@@ -222,9 +227,7 @@ static const struct dma_buf_ops i915_dmabuf_ops =  {
- struct dma_buf *i915_gem_prime_export(struct drm_device *dev,
- 				      struct drm_gem_object *gem_obj, int flags)
- {
--	struct drm_i915_gem_object *obj = to_intel_bo(gem_obj);
--
--	return dma_buf_export(obj, &i915_dmabuf_ops, obj->base.size, flags);
-+	return dma_buf_export(gem_obj, &i915_dmabuf_ops, gem_obj->size, flags);
- }
- 
- static int i915_gem_object_get_pages_dmabuf(struct drm_i915_gem_object *obj)
-@@ -261,7 +264,7 @@ struct drm_gem_object *i915_gem_prime_import(struct drm_device *dev,
- 
- 	/* is this one of own objects? */
- 	if (dma_buf->ops == &i915_dmabuf_ops) {
--		obj = dma_buf->priv;
-+		obj = dma_buf_to_obj(dma_buf);
- 		/* is it from our device? */
- 		if (obj->base.dev == dev) {
- 			/*
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0695-drm-i915-enable-the-power-well-before-module-unload.patch b/patches.baytrail/0695-drm-i915-enable-the-power-well-before-module-unload.patch
deleted file mode 100644
index 5323666140c17..0000000000000
--- a/patches.baytrail/0695-drm-i915-enable-the-power-well-before-module-unload.patch
+++ /dev/null
@@ -1,51 +0,0 @@
-From eeb26a49896e9fd80098af7ae380518af425022a Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Wed, 14 Aug 2013 14:40:37 -0300
-Subject: drm/i915: enable the power well before module unload
-
-Our driver initialization doesn't seem to be ready to load when the
-power well is disabled: we hit a few "Unclaimed register" messages. So
-do just like we already do for the suspend/resume path: enable the
-power well before unloading.
-
-At some point we'll want to be able to survive suspend/resume and
-load/unload with the power well disabled, but for now let's just fix
-the regression.
-
-Regression introduced by the following commit:
-
-commit bf51d5e2cda5d36d98e4b46ac7fca9461e512c41
-Author: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date:   Wed Jul 3 17:12:13 2013 -0300
-    drm/i915: switch disable_power_well default value to 1
-
-Bug can be reproduced by running the "module_reload" script from
-intel-gpu-tools.
-
-Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67813
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 79f8dea13391f8220470997f9a5213ab5aa9f1c7)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_dma.c |    7 ++++++-
- 1 file changed, 6 insertions(+), 1 deletion(-)
-
---- a/drivers/gpu/drm/i915/i915_dma.c
-+++ b/drivers/gpu/drm/i915/i915_dma.c
-@@ -1697,8 +1697,13 @@ int i915_driver_unload(struct drm_device
- 
- 	intel_gpu_ips_teardown();
- 
--	if (HAS_POWER_WELL(dev))
-+	if (HAS_POWER_WELL(dev)) {
-+		/* The i915.ko module is still not prepared to be loaded when
-+		 * the power well is not enabled, so just enable it in case
-+		 * we're going to unload/reload. */
-+		intel_set_power_well(dev, true);
- 		i915_remove_power_well(dev);
-+	}
- 
- 	i915_teardown_sysfs(dev);
- 
diff --git a/patches.baytrail/0696-i915-Add-a-Kconfig-option-to-turn-on-i915.preliminar.patch b/patches.baytrail/0696-i915-Add-a-Kconfig-option-to-turn-on-i915.preliminar.patch
deleted file mode 100644
index a2b57b9ff1058..0000000000000
--- a/patches.baytrail/0696-i915-Add-a-Kconfig-option-to-turn-on-i915.preliminar.patch
+++ /dev/null
@@ -1,65 +0,0 @@
-From 21c5bc9f7206d0e29c74757164e5107968dcd91e Mon Sep 17 00:00:00 2001
-From: Josh Triplett <josh@joshtriplett.org>
-Date: Tue, 13 Aug 2013 16:23:17 -0700
-Subject: i915: Add a Kconfig option to turn on i915.preliminary_hw_support by
- default
-
-When building kernels for a preliminary hardware target, having to add a
-kernel command-line option can prove inconvenient.  Add a Kconfig option
-that changes the default of this option to 1.
-
-Signed-off-by: Josh Triplett <josh@joshtriplett.org>
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-[danvet: Pimp the Kconfig help text a bit as suggested by Damien in
-his 2nd review.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 99486b8e6140da7721c932e708a6c17dc1dd970a)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/Kconfig         | 11 +++++++++++
- drivers/gpu/drm/i915/i915_drv.c |  4 ++--
- 2 files changed, 13 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
-index b16c50ee769c..d979cec588c8 100644
---- a/drivers/gpu/drm/Kconfig
-+++ b/drivers/gpu/drm/Kconfig
-@@ -167,6 +167,17 @@ config DRM_I915_KMS
- 	  the driver to bind to PCI devices, which precludes loading things
- 	  like intelfb.
- 
-+config DRM_I915_PRELIMINARY_HW_SUPPORT
-+	bool "Enable preliminary support for prerelease Intel hardware by default"
-+	depends on DRM_I915
-+	help
-+	  Choose this option if you have prerelease Intel hardware and want the
-+	  i915 driver to support it by default.  You can enable such support at
-+	  runtime with the module option i915.preliminary_hw_support=1; this
-+	  option changes the default for that module option.
-+
-+	  If in doubt, say "N".
-+
- config DRM_MGA
- 	tristate "Matrox g200/g400"
- 	depends on DRM && PCI
-diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
-index eec47bd00353..a9c8f18e26fc 100644
---- a/drivers/gpu/drm/i915/i915_drv.c
-+++ b/drivers/gpu/drm/i915/i915_drv.c
-@@ -122,10 +122,10 @@ int i915_enable_psr __read_mostly = 0;
- module_param_named(enable_psr, i915_enable_psr, int, 0600);
- MODULE_PARM_DESC(enable_psr, "Enable PSR (default: false)");
- 
--unsigned int i915_preliminary_hw_support __read_mostly = 0;
-+unsigned int i915_preliminary_hw_support __read_mostly = IS_ENABLED(CONFIG_DRM_I915_PRELIMINARY_HW_SUPPORT);
- module_param_named(preliminary_hw_support, i915_preliminary_hw_support, int, 0600);
- MODULE_PARM_DESC(preliminary_hw_support,
--		"Enable preliminary hardware support. (default: false)");
-+		"Enable preliminary hardware support.");
- 
- int i915_disable_power_well __read_mostly = 1;
- module_param_named(disable_power_well, i915_disable_power_well, int, 0600);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0697-drm-i915-s-obj-exec_list-obj-obj_exec_link-in-debugf.patch b/patches.baytrail/0697-drm-i915-s-obj-exec_list-obj-obj_exec_link-in-debugf.patch
deleted file mode 100644
index 2338df9b9cb05..0000000000000
--- a/patches.baytrail/0697-drm-i915-s-obj-exec_list-obj-obj_exec_link-in-debugf.patch
+++ /dev/null
@@ -1,98 +0,0 @@
-From 9467ced15de2abc07bf100c21bd6e53e97e7fd7a Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Wed, 14 Aug 2013 11:38:33 +0200
-Subject: drm/i915: s/obj->exec_list/obj->obj_exec_link in debugfs
-
-To convert the execbuf code over to use vmas natively we need to
-shuffle the exec_list a bit. This patch here just prepares things with
-the debugfs code, which also uses the old exec_list list_head, newly
-called obj_exec_link.
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-[danvet: Split out from Ben's big patch.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit b25cb2f8828aca6204d9c93d4d677f27e3ae9fa6)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_debugfs.c | 12 ++++++------
- drivers/gpu/drm/i915/i915_drv.h     |  2 ++
- drivers/gpu/drm/i915/i915_gem.c     |  1 +
- 3 files changed, 9 insertions(+), 6 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
-index eb87865c20d4..4785d8c14654 100644
---- a/drivers/gpu/drm/i915/i915_debugfs.c
-+++ b/drivers/gpu/drm/i915/i915_debugfs.c
-@@ -195,9 +195,9 @@ static int obj_rank_by_stolen(void *priv,
- 			      struct list_head *A, struct list_head *B)
- {
- 	struct drm_i915_gem_object *a =
--		container_of(A, struct drm_i915_gem_object, exec_list);
-+		container_of(A, struct drm_i915_gem_object, obj_exec_link);
- 	struct drm_i915_gem_object *b =
--		container_of(B, struct drm_i915_gem_object, exec_list);
-+		container_of(B, struct drm_i915_gem_object, obj_exec_link);
- 
- 	return a->stolen->start - b->stolen->start;
- }
-@@ -221,7 +221,7 @@ static int i915_gem_stolen_list_info(struct seq_file *m, void *data)
- 		if (obj->stolen == NULL)
- 			continue;
- 
--		list_add(&obj->exec_list, &stolen);
-+		list_add(&obj->obj_exec_link, &stolen);
- 
- 		total_obj_size += obj->base.size;
- 		total_gtt_size += i915_gem_obj_ggtt_size(obj);
-@@ -231,7 +231,7 @@ static int i915_gem_stolen_list_info(struct seq_file *m, void *data)
- 		if (obj->stolen == NULL)
- 			continue;
- 
--		list_add(&obj->exec_list, &stolen);
-+		list_add(&obj->obj_exec_link, &stolen);
- 
- 		total_obj_size += obj->base.size;
- 		count++;
-@@ -239,11 +239,11 @@ static int i915_gem_stolen_list_info(struct seq_file *m, void *data)
- 	list_sort(NULL, &stolen, obj_rank_by_stolen);
- 	seq_puts(m, "Stolen:\n");
- 	while (!list_empty(&stolen)) {
--		obj = list_first_entry(&stolen, typeof(*obj), exec_list);
-+		obj = list_first_entry(&stolen, typeof(*obj), obj_exec_link);
- 		seq_puts(m, "   ");
- 		describe_obj(m, obj);
- 		seq_putc(m, '\n');
--		list_del_init(&obj->exec_list);
-+		list_del_init(&obj->obj_exec_link);
- 	}
- 	mutex_unlock(&dev->struct_mutex);
- 
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 3fc432437524..315e530c6488 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1312,6 +1312,8 @@ struct drm_i915_gem_object {
- 	struct list_head global_list;
- 
- 	struct list_head ring_list;
-+	/** Used in execbuf to temporarily hold a ref */
-+	struct list_head obj_exec_link;
- 	/** This object's place in the batchbuffer or on the eviction list */
- 	struct list_head exec_list;
- 
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index c6baa3c5d7b3..6223a71a640a 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -3980,6 +3980,7 @@ void i915_gem_object_init(struct drm_i915_gem_object *obj,
- 	INIT_LIST_HEAD(&obj->global_list);
- 	INIT_LIST_HEAD(&obj->ring_list);
- 	INIT_LIST_HEAD(&obj->exec_list);
-+	INIT_LIST_HEAD(&obj->obj_exec_link);
- 	INIT_LIST_HEAD(&obj->vma_list);
- 
- 	obj->ops = ops;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0698-drm-i915-Switch-eviction-code-to-use-vmas.patch b/patches.baytrail/0698-drm-i915-Switch-eviction-code-to-use-vmas.patch
deleted file mode 100644
index d2c3e22bca2af..0000000000000
--- a/patches.baytrail/0698-drm-i915-Switch-eviction-code-to-use-vmas.patch
+++ /dev/null
@@ -1,132 +0,0 @@
-From 2398fcd316955ec37343d396ebfc068b6f699ed5 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Wed, 14 Aug 2013 11:38:34 +0200
-Subject: drm/i915: Switch eviction code to use vmas
-
-The execbuf wants to do relocations usings vmas, so we need a
-vma->exec_list. The eviction code also uses the old obj execbuf list
-for it's own book-keeping, but would really prefer to deal in vmas
-only. So switch it over to the new list.
-
-Again this is just a prep patch for the big execbuf vma conversion.
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-[danvet: Split out from Ben's big execbuf vma patch.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 82a55ad1a0585e4e01a47f72fe81fb5a2d2c0fb1)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h       |  4 ++++
- drivers/gpu/drm/i915/i915_gem.c       |  1 +
- drivers/gpu/drm/i915/i915_gem_evict.c | 31 ++++++++++++++-----------------
- 3 files changed, 19 insertions(+), 17 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 315e530c6488..3f1f65865d3c 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -563,6 +563,10 @@ struct i915_vma {
- 	struct list_head mm_list;
- 
- 	struct list_head vma_link; /* Link in the object's VMA list */
-+
-+	/** This vma's place in the batchbuffer or on the eviction list */
-+	struct list_head exec_list;
-+
- };
- 
- struct i915_ctx_hang_stats {
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index 6223a71a640a..10e3c536f911 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -4120,6 +4120,7 @@ struct i915_vma *i915_gem_vma_create(struct drm_i915_gem_object *obj,
- 
- 	INIT_LIST_HEAD(&vma->vma_link);
- 	INIT_LIST_HEAD(&vma->mm_list);
-+	INIT_LIST_HEAD(&vma->exec_list);
- 	vma->vm = vm;
- 	vma->obj = obj;
- 
-diff --git a/drivers/gpu/drm/i915/i915_gem_evict.c b/drivers/gpu/drm/i915/i915_gem_evict.c
-index 425939b7d343..87875884770c 100644
---- a/drivers/gpu/drm/i915/i915_gem_evict.c
-+++ b/drivers/gpu/drm/i915/i915_gem_evict.c
-@@ -37,7 +37,7 @@ mark_free(struct i915_vma *vma, struct list_head *unwind)
- 	if (vma->obj->pin_count)
- 		return false;
- 
--	list_add(&vma->obj->exec_list, unwind);
-+	list_add(&vma->exec_list, unwind);
- 	return drm_mm_scan_add_block(&vma->node);
- }
- 
-@@ -49,7 +49,6 @@ i915_gem_evict_something(struct drm_device *dev, struct i915_address_space *vm,
- 	drm_i915_private_t *dev_priv = dev->dev_private;
- 	struct list_head eviction_list, unwind_list;
- 	struct i915_vma *vma;
--	struct drm_i915_gem_object *obj;
- 	int ret = 0;
- 
- 	trace_i915_gem_evict(dev, min_size, alignment, mappable);
-@@ -104,14 +103,13 @@ i915_gem_evict_something(struct drm_device *dev, struct i915_address_space *vm,
- none:
- 	/* Nothing found, clean up and bail out! */
- 	while (!list_empty(&unwind_list)) {
--		obj = list_first_entry(&unwind_list,
--				       struct drm_i915_gem_object,
-+		vma = list_first_entry(&unwind_list,
-+				       struct i915_vma,
- 				       exec_list);
--		vma = i915_gem_obj_to_vma(obj, vm);
- 		ret = drm_mm_scan_remove_block(&vma->node);
- 		BUG_ON(ret);
- 
--		list_del_init(&obj->exec_list);
-+		list_del_init(&vma->exec_list);
- 	}
- 
- 	/* We expect the caller to unpin, evict all and try again, or give up.
-@@ -125,28 +123,27 @@ found:
- 	 * temporary list. */
- 	INIT_LIST_HEAD(&eviction_list);
- 	while (!list_empty(&unwind_list)) {
--		obj = list_first_entry(&unwind_list,
--				       struct drm_i915_gem_object,
-+		vma = list_first_entry(&unwind_list,
-+				       struct i915_vma,
- 				       exec_list);
--		vma = i915_gem_obj_to_vma(obj, vm);
- 		if (drm_mm_scan_remove_block(&vma->node)) {
--			list_move(&obj->exec_list, &eviction_list);
--			drm_gem_object_reference(&obj->base);
-+			list_move(&vma->exec_list, &eviction_list);
-+			drm_gem_object_reference(&vma->obj->base);
- 			continue;
- 		}
--		list_del_init(&obj->exec_list);
-+		list_del_init(&vma->exec_list);
- 	}
- 
- 	/* Unbinding will emit any required flushes */
- 	while (!list_empty(&eviction_list)) {
--		obj = list_first_entry(&eviction_list,
--				       struct drm_i915_gem_object,
-+		vma = list_first_entry(&eviction_list,
-+				       struct i915_vma,
- 				       exec_list);
- 		if (ret == 0)
--			ret = i915_vma_unbind(i915_gem_obj_to_vma(obj, vm));
-+			ret = i915_vma_unbind(vma);
- 
--		list_del_init(&obj->exec_list);
--		drm_gem_object_unreference(&obj->base);
-+		list_del_init(&vma->exec_list);
-+		drm_gem_object_unreference(&vma->obj->base);
- 	}
- 
- 	return ret;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0699-drm-i915-prepare-bind_to_vm-for-preallocated-vma.patch b/patches.baytrail/0699-drm-i915-prepare-bind_to_vm-for-preallocated-vma.patch
deleted file mode 100644
index ac7da2cd3b781..0000000000000
--- a/patches.baytrail/0699-drm-i915-prepare-bind_to_vm-for-preallocated-vma.patch
+++ /dev/null
@@ -1,93 +0,0 @@
-From 35d850faa406c7663ed2b2d137dcca25b8dd4d8c Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Wed, 14 Aug 2013 11:38:35 +0200
-Subject: drm/i915: prepare bind_to_vm for preallocated vma
-
-In the new execbuf code we want to track buffers using the vmas even
-before they're all properly mapped. Which means that bind_to_vm needs
-to deal with buffers which have preallocated vmas which aren't yet
-bound.
-
-This patch implements this prep work and adjusts our WARN/BUG checks.
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-[danvet: Split out from Ben's big execbuf patch. Also move one BUG
-back to its original place to deflate the diff a notch.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit accfef2e5a8f713bfa0c06696b5e10754686dc72)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h |  3 +++
- drivers/gpu/drm/i915/i915_gem.c | 23 +++++++++++++++++------
- 2 files changed, 20 insertions(+), 6 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 3f1f65865d3c..2b503d58dcd3 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1913,6 +1913,9 @@ unsigned long i915_gem_obj_size(struct drm_i915_gem_object *o,
- 				struct i915_address_space *vm);
- struct i915_vma *i915_gem_obj_to_vma(struct drm_i915_gem_object *obj,
- 				     struct i915_address_space *vm);
-+struct i915_vma *
-+i915_gem_obj_lookup_or_create_vma(struct drm_i915_gem_object *obj,
-+				  struct i915_address_space *vm);
- /* Some GGTT VM helpers */
- #define obj_to_ggtt(obj) \
- 	(&((struct drm_i915_private *)(obj)->base.dev->dev_private)->gtt.base)
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index 10e3c536f911..199107e734fb 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -3111,9 +3111,6 @@ i915_gem_object_bind_to_vm(struct drm_i915_gem_object *obj,
- 	struct i915_vma *vma;
- 	int ret;
- 
--	if (WARN_ON(!list_empty(&obj->vma_list)))
--		return -EBUSY;
--
- 	fence_size = i915_gem_get_gtt_size(dev,
- 					   obj->base.size,
- 					   obj->tiling_mode);
-@@ -3152,16 +3149,17 @@ i915_gem_object_bind_to_vm(struct drm_i915_gem_object *obj,
- 
- 	i915_gem_object_pin_pages(obj);
- 
--	/* FIXME: For now we only ever use 1 VMA per object */
- 	BUG_ON(!i915_is_ggtt(vm));
--	WARN_ON(!list_empty(&obj->vma_list));
- 
--	vma = i915_gem_vma_create(obj, vm);
-+	vma = i915_gem_obj_lookup_or_create_vma(obj, vm);
- 	if (IS_ERR(vma)) {
- 		ret = PTR_ERR(vma);
- 		goto err_unpin;
- 	}
- 
-+	/* For now we only ever use 1 vma per object */
-+	WARN_ON(!list_is_singular(&obj->vma_list));
-+
- search_free:
- 	ret = drm_mm_insert_node_in_range_generic(&vm->mm, &vma->node,
- 						  size, alignment,
-@@ -4870,3 +4868,16 @@ struct i915_vma *i915_gem_obj_to_vma(struct drm_i915_gem_object *obj,
- 
- 	return NULL;
- }
-+
-+struct i915_vma *
-+i915_gem_obj_lookup_or_create_vma(struct drm_i915_gem_object *obj,
-+				  struct i915_address_space *vm)
-+{
-+	struct i915_vma *vma;
-+
-+	vma = i915_gem_obj_to_vma(obj, vm);
-+	if (!vma)
-+		vma = i915_gem_vma_create(obj, vm);
-+
-+	return vma;
-+}
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0700-drm-i915-vma-Correct-use-after-free-in-eviction.patch b/patches.baytrail/0700-drm-i915-vma-Correct-use-after-free-in-eviction.patch
deleted file mode 100644
index bbdad48d9ec2e..0000000000000
--- a/patches.baytrail/0700-drm-i915-vma-Correct-use-after-free-in-eviction.patch
+++ /dev/null
@@ -1,101 +0,0 @@
-From 0ad450007d58cee44cdeae115f9e7b84c79fa220 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <benjamin.widawsky@intel.com>
-Date: Fri, 16 Aug 2013 13:29:33 -0700
-Subject: drm/i915/vma: Correct use after free in eviction
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The vma will [possibly] be destroyed during unbind in eviction.
-Immediately after this, we try to delete the list entry.
-
-Chris and Ville did the debug on this before I woke up, I just get to
-take credit for the fix :p
-
-For future reference the Oops that Mika reported:
-
-[  403.472448] BUG: unable to handle kernel paging request at 6b6b6b6b
-[  403.472473] IP: [<c12c1500>] __list_del_entry+0x20/0xe0
-[  403.472514] *pdpt = 000000002e89c001 *pde = 0000000000000000
-[  403.472556] Oops: 0000 [#1] SMP
-[  403.472582] Modules linked in: mxm_wmi snd_hda_codec_hdmi snd_hda_codec_realtek snd_hda_intel snd_hda_codec snd_hwdep snd_pcm snd_seq_midi snd_rawmidi psmouse snd_seq_midi_event snd_seq serio_raw snd_timer snd_seq_device snd soundcore snd_page_alloc wmi bnep rfcomm bluetooth mac_hid parport_pc ppdev lp parport usbhid dm_crypt firewire_ohci firewire_core crc_itu_t i915 drm_kms_helper e1000e ptp drm i2c_algo_bit pps_core xhci_hcd video
-[  403.472895] CPU: 2 PID: 1940 Comm: Xorg Not tainted 3.11.0-rc2+ #827
-[  403.472938] Hardware name:                  /DZ77BH-55K, BIOS BHZ7710H.86A.0070.2012.0416.2117 04/16/2012
-[  403.473002] task: ec866c00 ti: ee6a2000 task.ti: ee6a2000
-[  403.473039] EIP: 0060:[<c12c1500>] EFLAGS: 00013202 CPU: 2
-[  403.473078] EIP is at __list_del_entry+0x20/0xe0
-[  403.473109] EAX: f016d9bc EBX: f016d9bc ECX: 6b6b6b6b EDX: 6b6b6b6b
-[  403.473151] ESI: 00000000 EDI: ee6a3c90 EBP: ee6a3c60 ESP: ee6a3c48
-[  403.473193]  DS: 007b ES: 007b FS: 00d8 GS: 00e0 SS: 0068
-[  403.473230] CR0: 80050033 CR2: 6b6b6b6b CR3: 2ec43000 CR4: 001407f0
-[  403.473271] Stack:
-[  403.473285]  f63b2ff0 f61f98c0 f61f8000 f016d9bc 00000000 f016d9bc ee6a3cac f8519a4a
-[  403.473347]  00000000 00000000 10000000 f61f8000 0100a000 10000000 00000001 008ca000
-[  403.473410]  f64ee840 f61f98c0 f016d9bc f016dcec ee6a3c98 ee6a3c98 f61f98c0 dcc58f00
-[  403.473472] Call Trace:
-[  403.473509]  [<f8519a4a>] i915_gem_evict_something+0x17a/0x2d0 [i915]
-[  403.473567]  [<f8516ed1>] i915_gem_object_pin+0x271/0x660 [i915]
-[  403.473622]  [<f851c740>] ? i915_ggtt_clear_range+0x20/0x20 [i915]
-[  403.473676]  [<f8517afa>] i915_gem_object_pin_to_display_plane+0xda/0x190 [i915]
-[  403.473742]  [<f852d9fa>] intel_pin_and_fence_fb_obj+0xba/0x140 [i915]
-[  403.473800]  [<f852db40>] intel_gen7_queue_flip+0x30/0x1c0 [i915]
-[  403.473856]  [<f85337b0>] intel_crtc_page_flip+0x1a0/0x320 [i915]
-[  403.473911]  [<f847b549>] ? drm_framebuffer_reference+0x39/0x80 [drm]
-[  403.473965]  [<f847f9fb>] drm_mode_page_flip_ioctl+0x28b/0x320 [drm]
-[  403.474018]  [<f846fec8>] drm_ioctl+0x4b8/0x560 [drm]
-[  403.474064]  [<f847f770>] ? drm_mode_gamma_get_ioctl+0xd0/0xd0 [drm]
-[  403.474113]  [<c1140f8a>] ? do_sync_read+0x6a/0xa0
-[  403.474154]  [<f846fa10>] ? drm_copy_field+0x80/0x80 [drm]
-[  403.474193]  [<c115134c>] do_vfs_ioctl+0x7c/0x5b0
-[  403.474228]  [<c1141d2f>] ? vfs_read+0xef/0x160
-[  403.474263]  [<c108dcbb>] ? ktime_get_ts+0x4b/0x120
-[  403.474298]  [<c1151917>] SyS_ioctl+0x97/0xa0
-[  403.474330]  [<c1590bc1>] sysenter_do_call+0x12/0x22
-[  403.474364] Code: 55 f4 8b 45 f8 e9 75 ff ff ff 90 55 89 e5 53 83 ec 14 8b 08 8b 50 04 81 f9 00 01 10 00 74 24 81 fa 00 02 20 00 0f 84 8e 00 00 00 <8b> 1a 39 d8 75 62 8b 59 04 39 d8 75 35 89 51 04 89 0a 83 c4 14
-[  403.474566] EIP: [<c12c1500>] __list_del_entry+0x20/0xe0 SS:ESP 0068:ee6a3c48
-[  403.476513] CR2: 000000006b6b6b6b
-
-v2: Missed the drm_object_unreference use after free (Ville)
-Daniel Vetter <daniel@ffwll.ch> writes:
-
-Reported-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Cc: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-[danvet: Add the Oops from Mika to the commit message.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 8637b407cf1740c52a01b9fc0cf506f31e225151)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem_evict.c | 7 +++++--
- 1 file changed, 5 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem_evict.c b/drivers/gpu/drm/i915/i915_gem_evict.c
-index 87875884770c..91b700155850 100644
---- a/drivers/gpu/drm/i915/i915_gem_evict.c
-+++ b/drivers/gpu/drm/i915/i915_gem_evict.c
-@@ -136,14 +136,17 @@ found:
- 
- 	/* Unbinding will emit any required flushes */
- 	while (!list_empty(&eviction_list)) {
-+		struct drm_gem_object *obj;
- 		vma = list_first_entry(&eviction_list,
- 				       struct i915_vma,
- 				       exec_list);
-+
-+		obj =  &vma->obj->base;
-+		list_del_init(&vma->exec_list);
- 		if (ret == 0)
- 			ret = i915_vma_unbind(vma);
- 
--		list_del_init(&vma->exec_list);
--		drm_gem_object_unreference(&vma->obj->base);
-+		drm_gem_object_unreference(obj);
- 	}
- 
- 	return ret;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0701-drm-i915-make-IVB-FDI-training-match-spec-v3.patch b/patches.baytrail/0701-drm-i915-make-IVB-FDI-training-match-spec-v3.patch
deleted file mode 100644
index 07d467ed7c830..0000000000000
--- a/patches.baytrail/0701-drm-i915-make-IVB-FDI-training-match-spec-v3.patch
+++ /dev/null
@@ -1,210 +0,0 @@
-From c765f4ea9dd19fc714e5dc8187b9272b1e6087f4 Mon Sep 17 00:00:00 2001
-From: Jesse Barnes <jbarnes@virtuousgeek.org>
-Date: Mon, 19 Aug 2013 11:04:55 -0700
-Subject: drm/i915: make IVB FDI training match spec v3
-
-The existing code was trying different vswing and preemphasis settings
-in the wrong place, and wasn't trying them enough.  So add a loop to
-walk through them, properly disabling FDI TX and RX in between if a
-failure is detected.
-
-v2: remove unneeded reg writes, add delays around bit lock checks (Jesse)
-v3: fix TX and RX disable per spec (Paulo)
-    fix delays per spec (Paulo)
-    make RX symbol lock check match TX bit lock check (Paulo)
-
-Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=51983
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 139ccd3fb12b3d17a773d2d61140f955a47fa470)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 142 ++++++++++++++++++-----------------
- 1 file changed, 72 insertions(+), 70 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index cec940eb0147..0426c92a4c18 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -2597,7 +2597,7 @@ static void ivb_manual_fdi_link_train(struct drm_crtc *crtc)
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
- 	int pipe = intel_crtc->pipe;
--	u32 reg, temp, i;
-+	u32 reg, temp, i, j;
- 
- 	/* Train 1: umask FDI RX Interrupt symbol_lock and bit_lock bit
- 	   for train result */
-@@ -2613,97 +2613,99 @@ static void ivb_manual_fdi_link_train(struct drm_crtc *crtc)
- 	DRM_DEBUG_KMS("FDI_RX_IIR before link train 0x%x\n",
- 		      I915_READ(FDI_RX_IIR(pipe)));
- 
--	/* enable CPU FDI TX and PCH FDI RX */
--	reg = FDI_TX_CTL(pipe);
--	temp = I915_READ(reg);
--	temp &= ~FDI_DP_PORT_WIDTH_MASK;
--	temp |= FDI_DP_PORT_WIDTH(intel_crtc->config.fdi_lanes);
--	temp &= ~(FDI_LINK_TRAIN_AUTO | FDI_LINK_TRAIN_NONE_IVB);
--	temp |= FDI_LINK_TRAIN_PATTERN_1_IVB;
--	temp &= ~FDI_LINK_TRAIN_VOL_EMP_MASK;
--	temp |= FDI_LINK_TRAIN_400MV_0DB_SNB_B;
--	temp |= FDI_COMPOSITE_SYNC;
--	I915_WRITE(reg, temp | FDI_TX_ENABLE);
--
--	I915_WRITE(FDI_RX_MISC(pipe),
--		   FDI_RX_TP1_TO_TP2_48 | FDI_RX_FDI_DELAY_90);
--
--	reg = FDI_RX_CTL(pipe);
--	temp = I915_READ(reg);
--	temp &= ~FDI_LINK_TRAIN_AUTO;
--	temp &= ~FDI_LINK_TRAIN_PATTERN_MASK_CPT;
--	temp |= FDI_LINK_TRAIN_PATTERN_1_CPT;
--	temp |= FDI_COMPOSITE_SYNC;
--	I915_WRITE(reg, temp | FDI_RX_ENABLE);
-+	/* Try each vswing and preemphasis setting twice before moving on */
-+	for (j = 0; j < ARRAY_SIZE(snb_b_fdi_train_param) * 2; j++) {
-+		/* disable first in case we need to retry */
-+		reg = FDI_TX_CTL(pipe);
-+		temp = I915_READ(reg);
-+		temp &= ~(FDI_LINK_TRAIN_AUTO | FDI_LINK_TRAIN_NONE_IVB);
-+		temp &= ~FDI_TX_ENABLE;
-+		I915_WRITE(reg, temp);
- 
--	POSTING_READ(reg);
--	udelay(150);
-+		reg = FDI_RX_CTL(pipe);
-+		temp = I915_READ(reg);
-+		temp &= ~FDI_LINK_TRAIN_AUTO;
-+		temp &= ~FDI_LINK_TRAIN_PATTERN_MASK_CPT;
-+		temp &= ~FDI_RX_ENABLE;
-+		I915_WRITE(reg, temp);
- 
--	for (i = 0; i < 4; i++) {
-+		/* enable CPU FDI TX and PCH FDI RX */
- 		reg = FDI_TX_CTL(pipe);
- 		temp = I915_READ(reg);
-+		temp &= ~FDI_DP_PORT_WIDTH_MASK;
-+		temp |= FDI_DP_PORT_WIDTH(intel_crtc->config.fdi_lanes);
-+		temp |= FDI_LINK_TRAIN_PATTERN_1_IVB;
- 		temp &= ~FDI_LINK_TRAIN_VOL_EMP_MASK;
--		temp |= snb_b_fdi_train_param[i];
--		I915_WRITE(reg, temp);
-+		temp |= snb_b_fdi_train_param[j/2];
-+		temp |= FDI_COMPOSITE_SYNC;
-+		I915_WRITE(reg, temp | FDI_TX_ENABLE);
- 
--		POSTING_READ(reg);
--		udelay(500);
-+		I915_WRITE(FDI_RX_MISC(pipe),
-+			   FDI_RX_TP1_TO_TP2_48 | FDI_RX_FDI_DELAY_90);
- 
--		reg = FDI_RX_IIR(pipe);
-+		reg = FDI_RX_CTL(pipe);
- 		temp = I915_READ(reg);
--		DRM_DEBUG_KMS("FDI_RX_IIR 0x%x\n", temp);
--
--		if (temp & FDI_RX_BIT_LOCK ||
--		    (I915_READ(reg) & FDI_RX_BIT_LOCK)) {
--			I915_WRITE(reg, temp | FDI_RX_BIT_LOCK);
--			DRM_DEBUG_KMS("FDI train 1 done, level %i.\n", i);
--			break;
--		}
--	}
--	if (i == 4)
--		DRM_ERROR("FDI train 1 fail!\n");
-+		temp |= FDI_LINK_TRAIN_PATTERN_1_CPT;
-+		temp |= FDI_COMPOSITE_SYNC;
-+		I915_WRITE(reg, temp | FDI_RX_ENABLE);
- 
--	/* Train 2 */
--	reg = FDI_TX_CTL(pipe);
--	temp = I915_READ(reg);
--	temp &= ~FDI_LINK_TRAIN_NONE_IVB;
--	temp |= FDI_LINK_TRAIN_PATTERN_2_IVB;
--	temp &= ~FDI_LINK_TRAIN_VOL_EMP_MASK;
--	temp |= FDI_LINK_TRAIN_400MV_0DB_SNB_B;
--	I915_WRITE(reg, temp);
-+		POSTING_READ(reg);
-+		udelay(1); /* should be 0.5us */
- 
--	reg = FDI_RX_CTL(pipe);
--	temp = I915_READ(reg);
--	temp &= ~FDI_LINK_TRAIN_PATTERN_MASK_CPT;
--	temp |= FDI_LINK_TRAIN_PATTERN_2_CPT;
--	I915_WRITE(reg, temp);
-+		for (i = 0; i < 4; i++) {
-+			reg = FDI_RX_IIR(pipe);
-+			temp = I915_READ(reg);
-+			DRM_DEBUG_KMS("FDI_RX_IIR 0x%x\n", temp);
- 
--	POSTING_READ(reg);
--	udelay(150);
-+			if (temp & FDI_RX_BIT_LOCK ||
-+			    (I915_READ(reg) & FDI_RX_BIT_LOCK)) {
-+				I915_WRITE(reg, temp | FDI_RX_BIT_LOCK);
-+				DRM_DEBUG_KMS("FDI train 1 done, level %i.\n",
-+					      i);
-+				break;
-+			}
-+			udelay(1); /* should be 0.5us */
-+		}
-+		if (i == 4) {
-+			DRM_DEBUG_KMS("FDI train 1 fail on vswing %d\n", j / 2);
-+			continue;
-+		}
- 
--	for (i = 0; i < 4; i++) {
-+		/* Train 2 */
- 		reg = FDI_TX_CTL(pipe);
- 		temp = I915_READ(reg);
--		temp &= ~FDI_LINK_TRAIN_VOL_EMP_MASK;
--		temp |= snb_b_fdi_train_param[i];
-+		temp &= ~FDI_LINK_TRAIN_NONE_IVB;
-+		temp |= FDI_LINK_TRAIN_PATTERN_2_IVB;
-+		I915_WRITE(reg, temp);
-+
-+		reg = FDI_RX_CTL(pipe);
-+		temp = I915_READ(reg);
-+		temp &= ~FDI_LINK_TRAIN_PATTERN_MASK_CPT;
-+		temp |= FDI_LINK_TRAIN_PATTERN_2_CPT;
- 		I915_WRITE(reg, temp);
- 
- 		POSTING_READ(reg);
--		udelay(500);
-+		udelay(2); /* should be 1.5us */
- 
--		reg = FDI_RX_IIR(pipe);
--		temp = I915_READ(reg);
--		DRM_DEBUG_KMS("FDI_RX_IIR 0x%x\n", temp);
-+		for (i = 0; i < 4; i++) {
-+			reg = FDI_RX_IIR(pipe);
-+			temp = I915_READ(reg);
-+			DRM_DEBUG_KMS("FDI_RX_IIR 0x%x\n", temp);
- 
--		if (temp & FDI_RX_SYMBOL_LOCK) {
--			I915_WRITE(reg, temp | FDI_RX_SYMBOL_LOCK);
--			DRM_DEBUG_KMS("FDI train 2 done, level %i.\n", i);
--			break;
-+			if (temp & FDI_RX_SYMBOL_LOCK ||
-+			    (I915_READ(reg) & FDI_RX_SYMBOL_LOCK)) {
-+				I915_WRITE(reg, temp | FDI_RX_SYMBOL_LOCK);
-+				DRM_DEBUG_KMS("FDI train 2 done, level %i.\n",
-+					      i);
-+				goto train_done;
-+			}
-+			udelay(2); /* should be 1.5us */
- 		}
-+		if (i == 4)
-+			DRM_DEBUG_KMS("FDI train 2 fail on vswing %d\n", j / 2);
- 	}
--	if (i == 4)
--		DRM_ERROR("FDI train 2 fail!\n");
- 
-+train_done:
- 	DRM_DEBUG_KMS("FDI train done.\n");
- }
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0702-drm-i915-Remove-DSPARB_HWCONTROL.patch b/patches.baytrail/0702-drm-i915-Remove-DSPARB_HWCONTROL.patch
deleted file mode 100644
index b7efcd3ac7453..0000000000000
--- a/patches.baytrail/0702-drm-i915-Remove-DSPARB_HWCONTROL.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 68defbb9192bd9475be4610b394c6470df179b31 Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Mon, 19 Aug 2013 19:32:00 +0100
-Subject: drm/i915: Remove DSPARB_HWCONTROL()
-
-This define hasn't been used since:
-
-  commit 652c393a3368af84359da37c45afc35a91144960
-  Author: Jesse Barnes <jbarnes@virtuousgeek.org>
-  Date:   Mon Aug 17 13:31:43 2009 -0700
-
-      drm/i915: add dynamic clock frequency control
-
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 8254860096df085d633207d4d68550bb2ca29f17)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h | 2 --
- 1 file changed, 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 2b503d58dcd3..db709ee266ab 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1562,8 +1562,6 @@ struct drm_i915_file_private {
- #define SUPPORTS_EDP(dev)		(IS_IRONLAKE_M(dev))
- #define SUPPORTS_TV(dev)		(INTEL_INFO(dev)->supports_tv)
- #define I915_HAS_HOTPLUG(dev)		 (INTEL_INFO(dev)->has_hotplug)
--/* dsparb controlled by hw only */
--#define DSPARB_HWCONTROL(dev) (IS_G4X(dev) || IS_IRONLAKE(dev))
- 
- #define HAS_FW_BLC(dev) (INTEL_INFO(dev)->gen > 2)
- #define HAS_PIPE_CXSR(dev) (INTEL_INFO(dev)->has_pipe_cxsr)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0703-drm-i915-Remove-HAS_PIPE_CONTROL.patch b/patches.baytrail/0703-drm-i915-Remove-HAS_PIPE_CONTROL.patch
deleted file mode 100644
index eafe8e9be47a1..0000000000000
--- a/patches.baytrail/0703-drm-i915-Remove-HAS_PIPE_CONTROL.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 22bfdf7afe5adf9298b289e8a91322a17f179526 Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Mon, 19 Aug 2013 19:32:01 +0100
-Subject: drm/i915: Remove HAS_PIPE_CONTROL()
-
-The code using this was removed in:
-
-  commit 88f23b8fa3e6357c423af24ec31c661fc12f884b
-  Author: Chris Wilson <chris@chris-wilson.co.uk>
-  Date:   Sun Dec 5 15:08:31 2010 +0000
-
-      drm/i915: Avoid using PIPE_CONTROL on Ironlake
-
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit fdaa930bee14abe5ed1d1aead5bc6a9a5660ccbf)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h | 2 --
- 1 file changed, 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index db709ee266ab..28ac24916e17 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1569,8 +1569,6 @@ struct drm_i915_file_private {
- 
- #define HAS_IPS(dev)		(IS_ULT(dev))
- 
--#define HAS_PIPE_CONTROL(dev) (INTEL_INFO(dev)->gen >= 5)
--
- #define HAS_DDI(dev)		(INTEL_INFO(dev)->has_ddi)
- #define HAS_POWER_WELL(dev)	(IS_HASWELL(dev))
- #define HAS_FPGA_DBG_UNCLAIMED(dev)	(INTEL_INFO(dev)->has_fpga_dbg)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0704-drm-Remove-IS_IRONLAKE_D.patch b/patches.baytrail/0704-drm-Remove-IS_IRONLAKE_D.patch
deleted file mode 100644
index 310ecf81689e9..0000000000000
--- a/patches.baytrail/0704-drm-Remove-IS_IRONLAKE_D.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From 96dcf53403726417b635b2c26f638b6238763909 Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Mon, 19 Aug 2013 19:32:02 +0100
-Subject: drm: Remove IS_IRONLAKE_D()
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-This define hasn't been used since:
-
-  commit cfdf1fa23f4074c9f8766dc67a928bbf680b1ac9
-  Author: Kristian Høgsberg <krh@bitplanet.net>
-  Date:   Wed Dec 16 15:16:16 2009 -0500
-
-      drm/i915: Implement IS_* macros using static tables
-
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 3abdb33410d8b130437613a2fe3d5bf667ca34da)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h | 1 -
- 1 file changed, 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 28ac24916e17..0a613128cd6e 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1505,7 +1505,6 @@ struct drm_i915_file_private {
- #define IS_PINEVIEW_M(dev)	((dev)->pci_device == 0xa011)
- #define IS_PINEVIEW(dev)	(INTEL_INFO(dev)->is_pineview)
- #define IS_G33(dev)		(INTEL_INFO(dev)->is_g33)
--#define IS_IRONLAKE_D(dev)	((dev)->pci_device == 0x0042)
- #define IS_IRONLAKE_M(dev)	((dev)->pci_device == 0x0046)
- #define IS_IVYBRIDGE(dev)	(INTEL_INFO(dev)->is_ivybridge)
- #define IS_IVB_GT1(dev)		((dev)->pci_device == 0x0156 || \
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0705-drm-i915-Remove-I915_READ_-NOPID-SYNC_0-SYNC_1.patch b/patches.baytrail/0705-drm-i915-Remove-I915_READ_-NOPID-SYNC_0-SYNC_1.patch
deleted file mode 100644
index ccab81db65d15..0000000000000
--- a/patches.baytrail/0705-drm-i915-Remove-I915_READ_-NOPID-SYNC_0-SYNC_1.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From 96fe1bdd81984a0279f84d1eb6f280cdfda029c3 Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Mon, 19 Aug 2013 19:32:03 +0100
-Subject: drm/i915: Remove I915_READ_{NOPID, SYNC_0, SYNC_1})()
-
-The code directly uses the registers and ring->mmio_base.
-
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit e3ce7633ba38a97c2203ab60f381ce1642940328)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_ringbuffer.h | 4 ----
- 1 file changed, 4 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
-index 5e6be842d225..432ad5311ba6 100644
---- a/drivers/gpu/drm/i915/intel_ringbuffer.h
-+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
-@@ -33,10 +33,6 @@ struct  intel_hw_status_page {
- #define I915_READ_IMR(ring) I915_READ(RING_IMR((ring)->mmio_base))
- #define I915_WRITE_IMR(ring, val) I915_WRITE(RING_IMR((ring)->mmio_base), val)
- 
--#define I915_READ_NOPID(ring) I915_READ(RING_NOPID((ring)->mmio_base))
--#define I915_READ_SYNC_0(ring) I915_READ(RING_SYNC_0((ring)->mmio_base))
--#define I915_READ_SYNC_1(ring) I915_READ(RING_SYNC_1((ring)->mmio_base))
--
- enum intel_ring_hangcheck_action {
- 	HANGCHECK_WAIT,
- 	HANGCHECK_ACTIVE,
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0706-drm-i915-Expose-energy-counter-on-SNB-through-debugf.patch b/patches.baytrail/0706-drm-i915-Expose-energy-counter-on-SNB-through-debugf.patch
deleted file mode 100644
index b8bdf384c0288..0000000000000
--- a/patches.baytrail/0706-drm-i915-Expose-energy-counter-on-SNB-through-debugf.patch
+++ /dev/null
@@ -1,103 +0,0 @@
-From 2df657b0da4e04ffbc20468b888434b765e72c7f Mon Sep 17 00:00:00 2001
-From: Jesse Barnes <jbarnes@virtuousgeek.org>
-Date: Tue, 20 Aug 2013 10:29:23 +0100
-Subject: drm/i915: Expose energy counter on SNB+ through debugfs
-
-On SNB and IVB, there's an MSR (also exposed through MCHBAR) we can use
-to read out the amount of energy used over time.  Expose this in sysfs
-to make it easy to do power comparisons with different configurations.
-
-If the platform supports it, the file will show up under the
-drm/card0/power subdirectory of the PCI device in sysfs as gt_energy_uJ.
-The value in the file is a running total of energy (in microjoules)
-consumed by the graphics device.
-
-v2: move to sysfs (Ben, Daniel)
-    expose a simple value (Chris)
-    drop unrelated hunk (Ben)
-
-Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-
-v3: by Ben
-Tied it into existing rc6  sysfs entries and named that a more generic
-"power attrs." Fixed rebase conflicts.
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-
-v4: Since RAPL is a real driver that already exists to serve power
-monitoring, place our entry in debugfs. This gives me a fallback
-location for systems that do not expose it otherwise.
-
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit ec013e7f491cceef0e87190a3c6b132ce49f7ce4)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_debugfs.c | 23 +++++++++++++++++++++++
- drivers/gpu/drm/i915/i915_reg.h     |  2 ++
- 2 files changed, 25 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
-index 4785d8c14654..236d97e51c3a 100644
---- a/drivers/gpu/drm/i915/i915_debugfs.c
-+++ b/drivers/gpu/drm/i915/i915_debugfs.c
-@@ -31,6 +31,7 @@
- #include <linux/slab.h>
- #include <linux/export.h>
- #include <linux/list_sort.h>
-+#include <asm/msr-index.h>
- #include <drm/drmP.h>
- #include "intel_drv.h"
- #include "intel_ringbuffer.h"
-@@ -1769,6 +1770,27 @@ static int i915_edp_psr_status(struct seq_file *m, void *data)
- 	return 0;
- }
- 
-+static int i915_energy_uJ(struct seq_file *m, void *data)
-+{
-+	struct drm_info_node *node = m->private;
-+	struct drm_device *dev = node->minor->dev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	u64 power;
-+	u32 units;
-+
-+	if (INTEL_INFO(dev)->gen < 6)
-+		return -ENODEV;
-+
-+	rdmsrl(MSR_RAPL_POWER_UNIT, power);
-+	power = (power & 0x1f00) >> 8;
-+	units = 1000000 / (1 << power); /* convert to uJ */
-+	power = I915_READ(MCH_SECP_NRG_STTS);
-+	power *= units;
-+
-+	seq_printf(m, "%llu", (long long unsigned)power);
-+	return 0;
-+}
-+
- static int
- i915_wedged_get(void *data, u64 *val)
- {
-@@ -2208,6 +2230,7 @@ static struct drm_info_list i915_debugfs_list[] = {
- 	{"i915_dpio", i915_dpio_info, 0},
- 	{"i915_llc", i915_llc, 0},
- 	{"i915_edp_psr_status", i915_edp_psr_status, 0},
-+	{"i915_energy_uJ", i915_energy_uJ, 0},
- };
- #define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
- 
-diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
-index 019fd1f9d286..711f0658c5c4 100644
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -1449,6 +1449,8 @@
- #define   MCH_SSKPD_WM0_MASK		0x3f
- #define   MCH_SSKPD_WM0_VAL		0xc
- 
-+#define MCH_SECP_NRG_STTS		(MCHBAR_MIRROR_BASE_SNB + 0x592c)
-+
- /* Clocking configuration register */
- #define CLKCFG			0x10c00
- #define CLKCFG_FSB_400					(5 << 0)	/* hrawclk 100 */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0707-drm-i915-add-the-FCLK-case-to-intel_ddi_get_cdclk_fr.patch b/patches.baytrail/0707-drm-i915-add-the-FCLK-case-to-intel_ddi_get_cdclk_fr.patch
deleted file mode 100644
index d90f160a022e8..0000000000000
--- a/patches.baytrail/0707-drm-i915-add-the-FCLK-case-to-intel_ddi_get_cdclk_fr.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 37a83e5e4eb745dc4181de10a4debd9ee166a51b Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Tue, 6 Aug 2013 18:57:11 -0300
-Subject: drm/i915: add the FCLK case to intel_ddi_get_cdclk_freq
-
-We already have code to disable LCPLL and switch to FCLK, so we need this too.
-We still don't call the code to disable LCPLL, but we'll call it when we add
-support for Package C8+.
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit a40066412cc2ace1c1299e7a4d7a81dc33395b6f)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_ddi.c |    9 ++++++---
- 1 file changed, 6 insertions(+), 3 deletions(-)
-
---- a/drivers/gpu/drm/i915/intel_ddi.c
-+++ b/drivers/gpu/drm/i915/intel_ddi.c
-@@ -1145,10 +1145,13 @@ static void intel_disable_ddi(struct int
- 
- int intel_ddi_get_cdclk_freq(struct drm_i915_private *dev_priv)
- {
--	if (I915_READ(HSW_FUSE_STRAP) & HSW_CDCLK_LIMIT)
-+	uint32_t lcpll = I915_READ(LCPLL_CTL);
-+
-+	if (lcpll & LCPLL_CD_SOURCE_FCLK)
-+		return 800000;
-+	else if (I915_READ(HSW_FUSE_STRAP) & HSW_CDCLK_LIMIT)
- 		return 450000;
--	else if ((I915_READ(LCPLL_CTL) & LCPLL_CLK_FREQ_MASK) ==
--		 LCPLL_CLK_FREQ_450)
-+	else if ((lcpll & LCPLL_CLK_FREQ_MASK) == LCPLL_CLK_FREQ_450)
- 		return 450000;
- 	else if (IS_ULT(dev_priv->dev))
- 		return 337500;
diff --git a/patches.baytrail/0708-drm-i915-wrap-GTIMR-changes.patch b/patches.baytrail/0708-drm-i915-wrap-GTIMR-changes.patch
deleted file mode 100644
index bd43f0fa1315e..0000000000000
--- a/patches.baytrail/0708-drm-i915-wrap-GTIMR-changes.patch
+++ /dev/null
@@ -1,151 +0,0 @@
-From 9d42c74ecac4cca476f9bcf160f40275ffe7ffc2 Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Tue, 6 Aug 2013 18:57:12 -0300
-Subject: drm/i915: wrap GTIMR changes
-
-Just like the functions that touch DEIMR and SDEIMR, but for GTIMR.
-The new functions contain a POSTING_READ(GTIMR) which was not present
-at the 2 callers inside i915_irq.c.
-
-The implementation is based on ibx_display_interrupt_update.
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 43eaea131823c5ca13d03364e61bd15f0b22a0f7)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c         | 34 +++++++++++++++++++++++++++++----
- drivers/gpu/drm/i915/intel_drv.h        |  3 +++
- drivers/gpu/drm/i915/intel_ringbuffer.c | 22 ++++++---------------
- 3 files changed, 39 insertions(+), 20 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index 36cf7073690e..5315161d6e71 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -104,6 +104,34 @@ ironlake_disable_display_irq(drm_i915_private_t *dev_priv, u32 mask)
- 	}
- }
- 
-+/**
-+ * ilk_update_gt_irq - update GTIMR
-+ * @dev_priv: driver private
-+ * @interrupt_mask: mask of interrupt bits to update
-+ * @enabled_irq_mask: mask of interrupt bits to enable
-+ */
-+static void ilk_update_gt_irq(struct drm_i915_private *dev_priv,
-+			      uint32_t interrupt_mask,
-+			      uint32_t enabled_irq_mask)
-+{
-+	assert_spin_locked(&dev_priv->irq_lock);
-+
-+	dev_priv->gt_irq_mask &= ~interrupt_mask;
-+	dev_priv->gt_irq_mask |= (~enabled_irq_mask & interrupt_mask);
-+	I915_WRITE(GTIMR, dev_priv->gt_irq_mask);
-+	POSTING_READ(GTIMR);
-+}
-+
-+void ilk_enable_gt_irq(struct drm_i915_private *dev_priv, uint32_t mask)
-+{
-+	ilk_update_gt_irq(dev_priv, mask, mask);
-+}
-+
-+void ilk_disable_gt_irq(struct drm_i915_private *dev_priv, uint32_t mask)
-+{
-+	ilk_update_gt_irq(dev_priv, mask, 0);
-+}
-+
- static bool ivb_can_enable_err_int(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
-@@ -806,8 +834,7 @@ static void ivybridge_parity_work(struct work_struct *work)
- 	I915_WRITE(GEN7_MISCCPCTL, misccpctl);
- 
- 	spin_lock_irqsave(&dev_priv->irq_lock, flags);
--	dev_priv->gt_irq_mask &= ~GT_RENDER_L3_PARITY_ERROR_INTERRUPT;
--	I915_WRITE(GTIMR, dev_priv->gt_irq_mask);
-+	ilk_enable_gt_irq(dev_priv, GT_RENDER_L3_PARITY_ERROR_INTERRUPT);
- 	spin_unlock_irqrestore(&dev_priv->irq_lock, flags);
- 
- 	mutex_unlock(&dev_priv->dev->struct_mutex);
-@@ -837,8 +864,7 @@ static void ivybridge_parity_error_irq_handler(struct drm_device *dev)
- 		return;
- 
- 	spin_lock(&dev_priv->irq_lock);
--	dev_priv->gt_irq_mask |= GT_RENDER_L3_PARITY_ERROR_INTERRUPT;
--	I915_WRITE(GTIMR, dev_priv->gt_irq_mask);
-+	ilk_disable_gt_irq(dev_priv, GT_RENDER_L3_PARITY_ERROR_INTERRUPT);
- 	spin_unlock(&dev_priv->irq_lock);
- 
- 	queue_work(dev_priv->wq, &dev_priv->l3_parity.error_work);
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index 01455aa8b8bb..a8462064714c 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -778,5 +778,8 @@ extern void intel_edp_psr_update(struct drm_device *dev);
- extern void hsw_disable_lcpll(struct drm_i915_private *dev_priv,
- 			      bool switch_to_fclk, bool allow_power_down);
- extern void hsw_restore_lcpll(struct drm_i915_private *dev_priv);
-+extern void ilk_enable_gt_irq(struct drm_i915_private *dev_priv, uint32_t mask);
-+extern void ilk_disable_gt_irq(struct drm_i915_private *dev_priv,
-+			       uint32_t mask);
- 
- #endif /* __INTEL_DRV_H__ */
-diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
-index a1aa3bc48dcc..c26c90607355 100644
---- a/drivers/gpu/drm/i915/intel_ringbuffer.c
-+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
-@@ -836,11 +836,8 @@ gen5_ring_get_irq(struct intel_ring_buffer *ring)
- 		return false;
- 
- 	spin_lock_irqsave(&dev_priv->irq_lock, flags);
--	if (ring->irq_refcount++ == 0) {
--		dev_priv->gt_irq_mask &= ~ring->irq_enable_mask;
--		I915_WRITE(GTIMR, dev_priv->gt_irq_mask);
--		POSTING_READ(GTIMR);
--	}
-+	if (ring->irq_refcount++ == 0)
-+		ilk_enable_gt_irq(dev_priv, ring->irq_enable_mask);
- 	spin_unlock_irqrestore(&dev_priv->irq_lock, flags);
- 
- 	return true;
-@@ -854,11 +851,8 @@ gen5_ring_put_irq(struct intel_ring_buffer *ring)
- 	unsigned long flags;
- 
- 	spin_lock_irqsave(&dev_priv->irq_lock, flags);
--	if (--ring->irq_refcount == 0) {
--		dev_priv->gt_irq_mask |= ring->irq_enable_mask;
--		I915_WRITE(GTIMR, dev_priv->gt_irq_mask);
--		POSTING_READ(GTIMR);
--	}
-+	if (--ring->irq_refcount == 0)
-+		ilk_disable_gt_irq(dev_priv, ring->irq_enable_mask);
- 	spin_unlock_irqrestore(&dev_priv->irq_lock, flags);
- }
- 
-@@ -1040,9 +1034,7 @@ gen6_ring_get_irq(struct intel_ring_buffer *ring)
- 					 GT_RENDER_L3_PARITY_ERROR_INTERRUPT));
- 		else
- 			I915_WRITE_IMR(ring, ~ring->irq_enable_mask);
--		dev_priv->gt_irq_mask &= ~ring->irq_enable_mask;
--		I915_WRITE(GTIMR, dev_priv->gt_irq_mask);
--		POSTING_READ(GTIMR);
-+		ilk_enable_gt_irq(dev_priv, ring->irq_enable_mask);
- 	}
- 	spin_unlock_irqrestore(&dev_priv->irq_lock, flags);
- 
-@@ -1063,9 +1055,7 @@ gen6_ring_put_irq(struct intel_ring_buffer *ring)
- 				       ~GT_RENDER_L3_PARITY_ERROR_INTERRUPT);
- 		else
- 			I915_WRITE_IMR(ring, ~0);
--		dev_priv->gt_irq_mask |= ring->irq_enable_mask;
--		I915_WRITE(GTIMR, dev_priv->gt_irq_mask);
--		POSTING_READ(GTIMR);
-+		ilk_disable_gt_irq(dev_priv, ring->irq_enable_mask);
- 	}
- 	spin_unlock_irqrestore(&dev_priv->irq_lock, flags);
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0709-drm-i915-wrap-GEN6_PMIMR-changes.patch b/patches.baytrail/0709-drm-i915-wrap-GEN6_PMIMR-changes.patch
deleted file mode 100644
index 33cc03ff64924..0000000000000
--- a/patches.baytrail/0709-drm-i915-wrap-GEN6_PMIMR-changes.patch
+++ /dev/null
@@ -1,164 +0,0 @@
-From 13d18277dc1bf6a7f3eabc886596c860d96ae21f Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Tue, 6 Aug 2013 18:57:13 -0300
-Subject: drm/i915: wrap GEN6_PMIMR changes
-
-Just like we're doing with the other IMR changes.
-
-One of the functional changes is that not every caller was doing the
-POSTING_READ.
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit edbfdb456053d0738e6b06a3827ead4158bfc918)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c         | 47 ++++++++++++++++++++++++++++-----
- drivers/gpu/drm/i915/intel_drv.h        |  3 +++
- drivers/gpu/drm/i915/intel_pm.c         |  2 +-
- drivers/gpu/drm/i915/intel_ringbuffer.c |  8 ++----
- 4 files changed, 46 insertions(+), 14 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index 5315161d6e71..bb4bd21399a1 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -132,6 +132,41 @@ void ilk_disable_gt_irq(struct drm_i915_private *dev_priv, uint32_t mask)
- 	ilk_update_gt_irq(dev_priv, mask, 0);
- }
- 
-+/**
-+  * snb_update_pm_irq - update GEN6_PMIMR
-+  * @dev_priv: driver private
-+  * @interrupt_mask: mask of interrupt bits to update
-+  * @enabled_irq_mask: mask of interrupt bits to enable
-+  */
-+static void snb_update_pm_irq(struct drm_i915_private *dev_priv,
-+			      uint32_t interrupt_mask,
-+			      uint32_t enabled_irq_mask)
-+{
-+	uint32_t pmimr = I915_READ(GEN6_PMIMR);
-+	pmimr &= ~interrupt_mask;
-+	pmimr |= (~enabled_irq_mask & interrupt_mask);
-+
-+	assert_spin_locked(&dev_priv->irq_lock);
-+
-+	I915_WRITE(GEN6_PMIMR, pmimr);
-+	POSTING_READ(GEN6_PMIMR);
-+}
-+
-+void snb_enable_pm_irq(struct drm_i915_private *dev_priv, uint32_t mask)
-+{
-+	snb_update_pm_irq(dev_priv, mask, mask);
-+}
-+
-+void snb_disable_pm_irq(struct drm_i915_private *dev_priv, uint32_t mask)
-+{
-+	snb_update_pm_irq(dev_priv, mask, 0);
-+}
-+
-+static void snb_set_pm_irq(struct drm_i915_private *dev_priv, uint32_t val)
-+{
-+	snb_update_pm_irq(dev_priv, 0xffffffff, ~val);
-+}
-+
- static bool ivb_can_enable_err_int(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
-@@ -739,15 +774,14 @@ static void gen6_pm_rps_work(struct work_struct *work)
- {
- 	drm_i915_private_t *dev_priv = container_of(work, drm_i915_private_t,
- 						    rps.work);
--	u32 pm_iir, pm_imr;
-+	u32 pm_iir;
- 	u8 new_delay;
- 
- 	spin_lock_irq(&dev_priv->irq_lock);
- 	pm_iir = dev_priv->rps.pm_iir;
- 	dev_priv->rps.pm_iir = 0;
--	pm_imr = I915_READ(GEN6_PMIMR);
- 	/* Make sure not to corrupt PMIMR state used by ringbuffer code */
--	I915_WRITE(GEN6_PMIMR, pm_imr & ~GEN6_PM_RPS_EVENTS);
-+	snb_enable_pm_irq(dev_priv, GEN6_PM_RPS_EVENTS);
- 	spin_unlock_irq(&dev_priv->irq_lock);
- 
- 	if ((pm_iir & GEN6_PM_RPS_EVENTS) == 0)
-@@ -921,8 +955,7 @@ static void gen6_rps_irq_handler(struct drm_i915_private *dev_priv,
- 
- 	spin_lock(&dev_priv->irq_lock);
- 	dev_priv->rps.pm_iir |= pm_iir;
--	I915_WRITE(GEN6_PMIMR, dev_priv->rps.pm_iir);
--	POSTING_READ(GEN6_PMIMR);
-+	snb_set_pm_irq(dev_priv, dev_priv->rps.pm_iir);
- 	spin_unlock(&dev_priv->irq_lock);
- 
- 	queue_work(dev_priv->wq, &dev_priv->rps.work);
-@@ -1005,8 +1038,8 @@ static void hsw_pm_irq_handler(struct drm_i915_private *dev_priv,
- 	if (pm_iir & GEN6_PM_RPS_EVENTS) {
- 		spin_lock(&dev_priv->irq_lock);
- 		dev_priv->rps.pm_iir |= pm_iir & GEN6_PM_RPS_EVENTS;
--		I915_WRITE(GEN6_PMIMR, dev_priv->rps.pm_iir);
--		/* never want to mask useful interrupts. (also posting read) */
-+		snb_set_pm_irq(dev_priv, dev_priv->rps.pm_iir);
-+		/* never want to mask useful interrupts. */
- 		WARN_ON(I915_READ_NOTRACE(GEN6_PMIMR) & ~GEN6_PM_RPS_EVENTS);
- 		spin_unlock(&dev_priv->irq_lock);
- 
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index a8462064714c..8222f2426b47 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -781,5 +781,8 @@ extern void hsw_restore_lcpll(struct drm_i915_private *dev_priv);
- extern void ilk_enable_gt_irq(struct drm_i915_private *dev_priv, uint32_t mask);
- extern void ilk_disable_gt_irq(struct drm_i915_private *dev_priv,
- 			       uint32_t mask);
-+extern void snb_enable_pm_irq(struct drm_i915_private *dev_priv, uint32_t mask);
-+extern void snb_disable_pm_irq(struct drm_i915_private *dev_priv,
-+			       uint32_t mask);
- 
- #endif /* __INTEL_DRV_H__ */
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 21f4c958bbfe..8dca2530a8f4 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -3450,7 +3450,7 @@ static void gen6_enable_rps_interrupts(struct drm_device *dev)
- 
- 	spin_lock_irq(&dev_priv->irq_lock);
- 	WARN_ON(dev_priv->rps.pm_iir);
--	I915_WRITE(GEN6_PMIMR, I915_READ(GEN6_PMIMR) & ~GEN6_PM_RPS_EVENTS);
-+	snb_enable_pm_irq(dev_priv, GEN6_PM_RPS_EVENTS);
- 	I915_WRITE(GEN6_PMIIR, GEN6_PM_RPS_EVENTS);
- 	spin_unlock_irq(&dev_priv->irq_lock);
- 	/* only unmask PM interrupts we need. Mask all others. */
-diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
-index c26c90607355..f05cceac5a52 100644
---- a/drivers/gpu/drm/i915/intel_ringbuffer.c
-+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
-@@ -1074,10 +1074,8 @@ hsw_vebox_get_irq(struct intel_ring_buffer *ring)
- 
- 	spin_lock_irqsave(&dev_priv->irq_lock, flags);
- 	if (ring->irq_refcount++ == 0) {
--		u32 pm_imr = I915_READ(GEN6_PMIMR);
- 		I915_WRITE_IMR(ring, ~ring->irq_enable_mask);
--		I915_WRITE(GEN6_PMIMR, pm_imr & ~ring->irq_enable_mask);
--		POSTING_READ(GEN6_PMIMR);
-+		snb_enable_pm_irq(dev_priv, ring->irq_enable_mask);
- 	}
- 	spin_unlock_irqrestore(&dev_priv->irq_lock, flags);
- 
-@@ -1096,10 +1094,8 @@ hsw_vebox_put_irq(struct intel_ring_buffer *ring)
- 
- 	spin_lock_irqsave(&dev_priv->irq_lock, flags);
- 	if (--ring->irq_refcount == 0) {
--		u32 pm_imr = I915_READ(GEN6_PMIMR);
- 		I915_WRITE_IMR(ring, ~0);
--		I915_WRITE(GEN6_PMIMR, pm_imr | ring->irq_enable_mask);
--		POSTING_READ(GEN6_PMIMR);
-+		snb_disable_pm_irq(dev_priv, ring->irq_enable_mask);
- 	}
- 	spin_unlock_irqrestore(&dev_priv->irq_lock, flags);
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0710-drm-i915-don-t-update-GEN6_PMIMR-when-it-s-not-neede.patch b/patches.baytrail/0710-drm-i915-don-t-update-GEN6_PMIMR-when-it-s-not-neede.patch
deleted file mode 100644
index f157781e6df6f..0000000000000
--- a/patches.baytrail/0710-drm-i915-don-t-update-GEN6_PMIMR-when-it-s-not-neede.patch
+++ /dev/null
@@ -1,54 +0,0 @@
-From cf5c5c4e71cbef94065855caf9640ef8998797ef Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Tue, 6 Aug 2013 18:57:14 -0300
-Subject: drm/i915: don't update GEN6_PMIMR when it's not needed
-
-I did some brief tests and the "new_val = pmimr" condition usually
-happens a few times after exiting games.
-
-Note: This is also prep work to track the GEN6_PMIMR register state in
-dev_priv->pm_imr. This happens in the next patch.
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-[danvet: Add note to explain why we want this, as per the discussion
-between Chris and Paulo.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit f52ecbcf8009ef18cda86b30efd837338cd25392)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 14 +++++++++-----
- 1 file changed, 9 insertions(+), 5 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index bb4bd21399a1..d9d3dfae26f7 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -142,14 +142,18 @@ static void snb_update_pm_irq(struct drm_i915_private *dev_priv,
- 			      uint32_t interrupt_mask,
- 			      uint32_t enabled_irq_mask)
- {
--	uint32_t pmimr = I915_READ(GEN6_PMIMR);
--	pmimr &= ~interrupt_mask;
--	pmimr |= (~enabled_irq_mask & interrupt_mask);
-+	uint32_t pmimr, new_val;
- 
- 	assert_spin_locked(&dev_priv->irq_lock);
- 
--	I915_WRITE(GEN6_PMIMR, pmimr);
--	POSTING_READ(GEN6_PMIMR);
-+	pmimr = new_val = I915_READ(GEN6_PMIMR);
-+	new_val &= ~interrupt_mask;
-+	new_val |= (~enabled_irq_mask & interrupt_mask);
-+
-+	if (new_val != pmimr) {
-+		I915_WRITE(GEN6_PMIMR, new_val);
-+		POSTING_READ(GEN6_PMIMR);
-+	}
- }
- 
- void snb_enable_pm_irq(struct drm_i915_private *dev_priv, uint32_t mask)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0711-drm-i915-add-dev_priv-pm_irq_mask.patch b/patches.baytrail/0711-drm-i915-add-dev_priv-pm_irq_mask.patch
deleted file mode 100644
index 274a5d6e16384..0000000000000
--- a/patches.baytrail/0711-drm-i915-add-dev_priv-pm_irq_mask.patch
+++ /dev/null
@@ -1,71 +0,0 @@
-From 5af61ed05db36b63a414a07f1fd4e670f4c9efe8 Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Tue, 6 Aug 2013 18:57:15 -0300
-Subject: drm/i915: add dev_priv->pm_irq_mask
-
-Just like irq_mask and gt_irq_mask, use it to track the status of
-GEN6_PMIMR so we don't need to read it again every time we call
-snb_update_pm_irq.
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 605cd25b1ffa09a2f86b5c4bd120086dd5ea10a7)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h |  1 +
- drivers/gpu/drm/i915/i915_irq.c | 12 +++++++-----
- 2 files changed, 8 insertions(+), 5 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 0a613128cd6e..5cc71ac04beb 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1123,6 +1123,7 @@ typedef struct drm_i915_private {
- 	/** Cached value of IMR to avoid reads in updating the bitfield */
- 	u32 irq_mask;
- 	u32 gt_irq_mask;
-+	u32 pm_irq_mask;
- 
- 	struct work_struct hotplug_work;
- 	bool enable_hotplug_processing;
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index d9d3dfae26f7..b470191a6a7e 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -142,16 +142,17 @@ static void snb_update_pm_irq(struct drm_i915_private *dev_priv,
- 			      uint32_t interrupt_mask,
- 			      uint32_t enabled_irq_mask)
- {
--	uint32_t pmimr, new_val;
-+	uint32_t new_val;
- 
- 	assert_spin_locked(&dev_priv->irq_lock);
- 
--	pmimr = new_val = I915_READ(GEN6_PMIMR);
-+	new_val = dev_priv->pm_irq_mask;
- 	new_val &= ~interrupt_mask;
- 	new_val |= (~enabled_irq_mask & interrupt_mask);
- 
--	if (new_val != pmimr) {
--		I915_WRITE(GEN6_PMIMR, new_val);
-+	if (new_val != dev_priv->pm_irq_mask) {
-+		dev_priv->pm_irq_mask = new_val;
-+		I915_WRITE(GEN6_PMIMR, dev_priv->pm_irq_mask);
- 		POSTING_READ(GEN6_PMIMR);
- 	}
- }
-@@ -2263,8 +2264,9 @@ static void gen5_gt_irq_postinstall(struct drm_device *dev)
- 		if (HAS_VEBOX(dev))
- 			pm_irqs |= PM_VEBOX_USER_INTERRUPT;
- 
-+		dev_priv->pm_irq_mask = 0xffffffff;
- 		I915_WRITE(GEN6_PMIIR, I915_READ(GEN6_PMIIR));
--		I915_WRITE(GEN6_PMIMR, 0xffffffff);
-+		I915_WRITE(GEN6_PMIMR, dev_priv->pm_irq_mask);
- 		I915_WRITE(GEN6_PMIER, pm_irqs);
- 		POSTING_READ(GEN6_PMIER);
- 	}
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0712-drm-i915-don-t-disable-reenable-IVB-error-interrupts.patch b/patches.baytrail/0712-drm-i915-don-t-disable-reenable-IVB-error-interrupts.patch
deleted file mode 100644
index 485fd979febca..0000000000000
--- a/patches.baytrail/0712-drm-i915-don-t-disable-reenable-IVB-error-interrupts.patch
+++ /dev/null
@@ -1,56 +0,0 @@
-From 7648296b694658587a30921e68808c4b1be40f5e Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Tue, 6 Aug 2013 18:57:16 -0300
-Subject: drm/i915: don't disable/reenable IVB error interrupts when not needed
-
-If the error interrupts are already disabled, don't disable and
-reenable them. This is going to be needed when we're in PC8+, where
-all the interrupts are disabled so we won't risk re-enabling
-DE_ERR_INT_IVB.
-
-v2: Use dev_priv->irq_mask (Chris)
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 333a820416ccb0e24974b6ebe7d447c0c28c7b76)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 7 +++++--
- 1 file changed, 5 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index b470191a6a7e..eeced610821c 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -1373,6 +1373,7 @@ static irqreturn_t ironlake_irq_handler(int irq, void *arg)
- 	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
- 	u32 de_iir, gt_iir, de_ier, sde_ier = 0;
- 	irqreturn_t ret = IRQ_NONE;
-+	bool err_int_reenable = false;
- 
- 	atomic_inc(&dev_priv->irq_received);
- 
-@@ -1401,7 +1402,9 @@ static irqreturn_t ironlake_irq_handler(int irq, void *arg)
- 	 * handler. */
- 	if (IS_HASWELL(dev)) {
- 		spin_lock(&dev_priv->irq_lock);
--		ironlake_disable_display_irq(dev_priv, DE_ERR_INT_IVB);
-+		err_int_reenable = ~dev_priv->irq_mask & DE_ERR_INT_IVB;
-+		if (err_int_reenable)
-+			ironlake_disable_display_irq(dev_priv, DE_ERR_INT_IVB);
- 		spin_unlock(&dev_priv->irq_lock);
- 	}
- 
-@@ -1437,7 +1440,7 @@ static irqreturn_t ironlake_irq_handler(int irq, void *arg)
- 		}
- 	}
- 
--	if (IS_HASWELL(dev)) {
-+	if (err_int_reenable) {
- 		spin_lock(&dev_priv->irq_lock);
- 		if (ivb_can_enable_err_int(dev))
- 			ironlake_enable_display_irq(dev_priv, DE_ERR_INT_IVB);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0713-drm-i915-don-t-queue-PM-events-we-won-t-process.patch b/patches.baytrail/0713-drm-i915-don-t-queue-PM-events-we-won-t-process.patch
deleted file mode 100644
index 57ae4a6228a21..0000000000000
--- a/patches.baytrail/0713-drm-i915-don-t-queue-PM-events-we-won-t-process.patch
+++ /dev/null
@@ -1,71 +0,0 @@
-From 60fdf55ca4a9c2de2428dc58213927a5bfa29ff8 Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Thu, 15 Aug 2013 11:50:01 -0300
-Subject: drm/i915: don't queue PM events we won't process
-
-On SNB/IVB/VLV we only call gen6_rps_irq_handler if one of the IIR
-bits set is part of GEN6_PM_RPS_EVENTS, but at gen6_rps_irq_handler we
-add all the enabled IIR bits to the work queue, not only the ones that
-are part of GEN6_PM_RPS_EVENTS. But then gen6_pm_rps_work only
-processes GEN6_PM_RPS_EVENTS, so it's useless to add anything that's
-not GEN6_PM_RPS_EVENTS to the work queue.
-
-As a bonus, gen6_rps_irq_handler looks more similar to
-hsw_pm_irq_handler, so we may be able to merge them in the future.
-
-v2: - Add a WARN in case we queued something we're not going to
-      process.
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Ben Widawsky <ben@bwidawsk.net> (v1)
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 60611c137641af41895828cfc74f5be64ed69b49)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 9 ++++++---
- 1 file changed, 6 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index eeced610821c..b04130e7bff2 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -789,6 +789,9 @@ static void gen6_pm_rps_work(struct work_struct *work)
- 	snb_enable_pm_irq(dev_priv, GEN6_PM_RPS_EVENTS);
- 	spin_unlock_irq(&dev_priv->irq_lock);
- 
-+	/* Make sure we didn't queue anything we're not going to process. */
-+	WARN_ON(pm_iir & ~GEN6_PM_RPS_EVENTS);
-+
- 	if ((pm_iir & GEN6_PM_RPS_EVENTS) == 0)
- 		return;
- 
-@@ -959,7 +962,7 @@ static void gen6_rps_irq_handler(struct drm_i915_private *dev_priv,
- 	 */
- 
- 	spin_lock(&dev_priv->irq_lock);
--	dev_priv->rps.pm_iir |= pm_iir;
-+	dev_priv->rps.pm_iir |= pm_iir & GEN6_PM_RPS_EVENTS;
- 	snb_set_pm_irq(dev_priv, dev_priv->rps.pm_iir);
- 	spin_unlock(&dev_priv->irq_lock);
- 
-@@ -1128,7 +1131,7 @@ static irqreturn_t valleyview_irq_handler(int irq, void *arg)
- 		if (pipe_stats[0] & PIPE_GMBUS_INTERRUPT_STATUS)
- 			gmbus_irq_handler(dev);
- 
--		if (pm_iir & GEN6_PM_RPS_EVENTS)
-+		if (pm_iir)
- 			gen6_rps_irq_handler(dev_priv, pm_iir);
- 
- 		I915_WRITE(GTIIR, gt_iir);
-@@ -1433,7 +1436,7 @@ static irqreturn_t ironlake_irq_handler(int irq, void *arg)
- 		if (pm_iir) {
- 			if (IS_HASWELL(dev))
- 				hsw_pm_irq_handler(dev_priv, pm_iir);
--			else if (pm_iir & GEN6_PM_RPS_EVENTS)
-+			else
- 				gen6_rps_irq_handler(dev_priv, pm_iir);
- 			I915_WRITE(GEN6_PMIIR, pm_iir);
- 			ret = IRQ_HANDLED;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0714-drm-i915-fix-how-we-mask-PMIMR-when-adding-work-to-t.patch b/patches.baytrail/0714-drm-i915-fix-how-we-mask-PMIMR-when-adding-work-to-t.patch
deleted file mode 100644
index 11f9309b01988..0000000000000
--- a/patches.baytrail/0714-drm-i915-fix-how-we-mask-PMIMR-when-adding-work-to-t.patch
+++ /dev/null
@@ -1,100 +0,0 @@
-From 4609be6ede808afa10b534d13b88efd09aa17e63 Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Fri, 9 Aug 2013 17:04:36 -0300
-Subject: drm/i915: fix how we mask PMIMR when adding work to the queue
-
-It seems we've been doing this ever since we started processing the
-RPS events on a work queue, on commit "drm/i915: move gen6 rps
-handling to workqueue", 4912d04193733a825216b926ffd290fada88ab07.
-
-The problem is: when we add work to the queue, instead of just masking
-the bits we queued and leaving all the others on their current state,
-we mask the bits we queued and unmask all the others. This basically
-means we'll be unmasking a bunch of interrupts we're not going to
-process. And if you look at gen6_pm_rps_work, we unmask back only
-GEN6_PM_RPS_EVENTS, which means the bits we unmasked when adding work
-to the queue will remain unmasked after we process the queue.
-
-Notice that even though we unmask those unrelated interrupts, we never
-enable them on IER, so they don't fire our interrupt handler, they
-just stay there on IIR waiting to be cleared when something else
-triggers the interrupt handler.
-
-So this patch does what seems to make more sense: mask only the bits
-we add to the queue, without unmasking anything else, and so we'll
-unmask them after we process the queue.
-
-As a side effect we also have to remove that WARN, because it is not
-only making sure we don't mask useful interrupts, it is also making
-sure we do unmask useless interrupts! That piece of code should not be
-responsible for knowing which bits should be unmasked, so just don't
-assert anything, and trust that snb_disable_pm_irq should be doing the
-right thing.
-
-With i915.enable_pc8=1 I was getting ocasional "GEN6_PMIIR is not 0"
-error messages due to the fact that we unmask those unrelated
-interrupts but don't enable them.
-
-Note: if bugs start bisecting to this patch, then it probably means
-someone was relying on the fact that we unmask everything by accident,
-then we should fix gen5_gt_irq_postinstall or whoever needs the
-accidentally unmasked interrupts. Or maybe I was just wrong and we
-need to revert this patch :)
-
-Note: This started to be a more real issue with the addition of the
-VEBOX support since now we do enable more than just the minimal set of
-RPS interrupts in the IER register. Which means after the first rps
-interrupt has happened we will never mask the VEBOX user interrupts
-again and so will blow through cpu time needlessly when running video
-workloads.
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
-[danvet: Add note that this started to matter with VEBOX much more.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 4d3b3d5fd7d42a522a6c444388826bb23264db9f)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 11 ++---------
- 1 file changed, 2 insertions(+), 9 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index b04130e7bff2..aaad8c639a3a 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -167,11 +167,6 @@ void snb_disable_pm_irq(struct drm_i915_private *dev_priv, uint32_t mask)
- 	snb_update_pm_irq(dev_priv, mask, 0);
- }
- 
--static void snb_set_pm_irq(struct drm_i915_private *dev_priv, uint32_t val)
--{
--	snb_update_pm_irq(dev_priv, 0xffffffff, ~val);
--}
--
- static bool ivb_can_enable_err_int(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
-@@ -963,7 +958,7 @@ static void gen6_rps_irq_handler(struct drm_i915_private *dev_priv,
- 
- 	spin_lock(&dev_priv->irq_lock);
- 	dev_priv->rps.pm_iir |= pm_iir & GEN6_PM_RPS_EVENTS;
--	snb_set_pm_irq(dev_priv, dev_priv->rps.pm_iir);
-+	snb_disable_pm_irq(dev_priv, pm_iir & GEN6_PM_RPS_EVENTS);
- 	spin_unlock(&dev_priv->irq_lock);
- 
- 	queue_work(dev_priv->wq, &dev_priv->rps.work);
-@@ -1046,9 +1041,7 @@ static void hsw_pm_irq_handler(struct drm_i915_private *dev_priv,
- 	if (pm_iir & GEN6_PM_RPS_EVENTS) {
- 		spin_lock(&dev_priv->irq_lock);
- 		dev_priv->rps.pm_iir |= pm_iir & GEN6_PM_RPS_EVENTS;
--		snb_set_pm_irq(dev_priv, dev_priv->rps.pm_iir);
--		/* never want to mask useful interrupts. */
--		WARN_ON(I915_READ_NOTRACE(GEN6_PMIMR) & ~GEN6_PM_RPS_EVENTS);
-+		snb_disable_pm_irq(dev_priv, pm_iir & GEN6_PM_RPS_EVENTS);
- 		spin_unlock(&dev_priv->irq_lock);
- 
- 		queue_work(dev_priv->wq, &dev_priv->rps.work);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0715-drm-i915-merge-HSW-and-SNB-PM-irq-handlers.patch b/patches.baytrail/0715-drm-i915-merge-HSW-and-SNB-PM-irq-handlers.patch
deleted file mode 100644
index 5ea60eaae1227..0000000000000
--- a/patches.baytrail/0715-drm-i915-merge-HSW-and-SNB-PM-irq-handlers.patch
+++ /dev/null
@@ -1,108 +0,0 @@
-From b7db2611a077dc0f1b04fe1d4c3f30bb0280286d Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Thu, 15 Aug 2013 11:51:32 -0300
-Subject: drm/i915: merge HSW and SNB PM irq handlers
-
-Because hsw_pm_irq_handler does exactly what gen6_rps_irq_handler does
-and also processes the 2 additional VEBOX bits. So merge those
-functions and wrap the VEBOX bits on a HAS_VEBOX check. This
-check isn't really necessary since the bits are reserved on
-SNB/IVB/VLV, but it's a good documentation on who uses them.
-
-v2: - Change IS_HASWELL check to HAS_VEBOX
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 1403c0d4d46f2eed2ab13b89561c853988ad7513)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 50 ++++++++++-------------------------------
- 1 file changed, 12 insertions(+), 38 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index aaad8c639a3a..9e2ea5b16233 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -942,28 +942,6 @@ static void snb_gt_irq_handler(struct drm_device *dev,
- 		ivybridge_parity_error_irq_handler(dev);
- }
- 
--/* Legacy way of handling PM interrupts */
--static void gen6_rps_irq_handler(struct drm_i915_private *dev_priv,
--				 u32 pm_iir)
--{
--	/*
--	 * IIR bits should never already be set because IMR should
--	 * prevent an interrupt from being shown in IIR. The warning
--	 * displays a case where we've unsafely cleared
--	 * dev_priv->rps.pm_iir. Although missing an interrupt of the same
--	 * type is not a problem, it displays a problem in the logic.
--	 *
--	 * The mask bit in IMR is cleared by dev_priv->rps.work.
--	 */
--
--	spin_lock(&dev_priv->irq_lock);
--	dev_priv->rps.pm_iir |= pm_iir & GEN6_PM_RPS_EVENTS;
--	snb_disable_pm_irq(dev_priv, pm_iir & GEN6_PM_RPS_EVENTS);
--	spin_unlock(&dev_priv->irq_lock);
--
--	queue_work(dev_priv->wq, &dev_priv->rps.work);
--}
--
- #define HPD_STORM_DETECT_PERIOD 1000
- #define HPD_STORM_THRESHOLD 5
- 
-@@ -1030,13 +1008,10 @@ static void dp_aux_irq_handler(struct drm_device *dev)
- 	wake_up_all(&dev_priv->gmbus_wait_queue);
- }
- 
--/* Unlike gen6_rps_irq_handler() from which this function is originally derived,
-- * we must be able to deal with other PM interrupts. This is complicated because
-- * of the way in which we use the masks to defer the RPS work (which for
-- * posterity is necessary because of forcewake).
-- */
--static void hsw_pm_irq_handler(struct drm_i915_private *dev_priv,
--			       u32 pm_iir)
-+/* The RPS events need forcewake, so we add them to a work queue and mask their
-+ * IMR bits until the work is done. Other interrupts can be processed without
-+ * the work queue. */
-+static void gen6_rps_irq_handler(struct drm_i915_private *dev_priv, u32 pm_iir)
- {
- 	if (pm_iir & GEN6_PM_RPS_EVENTS) {
- 		spin_lock(&dev_priv->irq_lock);
-@@ -1047,12 +1022,14 @@ static void hsw_pm_irq_handler(struct drm_i915_private *dev_priv,
- 		queue_work(dev_priv->wq, &dev_priv->rps.work);
- 	}
- 
--	if (pm_iir & PM_VEBOX_USER_INTERRUPT)
--		notify_ring(dev_priv->dev, &dev_priv->ring[VECS]);
-+	if (HAS_VEBOX(dev_priv->dev)) {
-+		if (pm_iir & PM_VEBOX_USER_INTERRUPT)
-+			notify_ring(dev_priv->dev, &dev_priv->ring[VECS]);
- 
--	if (pm_iir & PM_VEBOX_CS_ERROR_INTERRUPT) {
--		DRM_ERROR("VEBOX CS error interrupt 0x%08x\n", pm_iir);
--		i915_handle_error(dev_priv->dev, false);
-+		if (pm_iir & PM_VEBOX_CS_ERROR_INTERRUPT) {
-+			DRM_ERROR("VEBOX CS error interrupt 0x%08x\n", pm_iir);
-+			i915_handle_error(dev_priv->dev, false);
-+		}
- 	}
- }
- 
-@@ -1427,10 +1404,7 @@ static irqreturn_t ironlake_irq_handler(int irq, void *arg)
- 	if (INTEL_INFO(dev)->gen >= 6) {
- 		u32 pm_iir = I915_READ(GEN6_PMIIR);
- 		if (pm_iir) {
--			if (IS_HASWELL(dev))
--				hsw_pm_irq_handler(dev_priv, pm_iir);
--			else
--				gen6_rps_irq_handler(dev_priv, pm_iir);
-+			gen6_rps_irq_handler(dev_priv, pm_iir);
- 			I915_WRITE(GEN6_PMIIR, pm_iir);
- 			ret = IRQ_HANDLED;
- 		}
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0716-drm-i915-Cleaning-up-the-relocate-entry-function.patch b/patches.baytrail/0716-drm-i915-Cleaning-up-the-relocate-entry-function.patch
deleted file mode 100644
index 1576ea12c44b4..0000000000000
--- a/patches.baytrail/0716-drm-i915-Cleaning-up-the-relocate-entry-function.patch
+++ /dev/null
@@ -1,126 +0,0 @@
-From 007d5b7c201dc874a00ec1217e37e8aac4b55d30 Mon Sep 17 00:00:00 2001
-From: Rafael Barbalho <rafael.barbalho@intel.com>
-Date: Wed, 21 Aug 2013 17:10:51 +0100
-Subject: drm/i915: Cleaning up the relocate entry function
-
-As the relocate entry function was getting a bit too big I've moved
-the code that used to use either the cpu or the gtt to for the
-relocation into two separate functions.
-
-Signed-off-by: Rafael Barbalho <rafael.barbalho@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 5032d871f7d300aee10c309ea004eb4f851553fe)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem_execbuffer.c | 88 ++++++++++++++++++------------
- 1 file changed, 54 insertions(+), 34 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-index 7dcf78cf6781..792c52a235ee 100644
---- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-@@ -172,6 +172,56 @@ static inline int use_cpu_reloc(struct drm_i915_gem_object *obj)
- }
- 
- static int
-+relocate_entry_cpu(struct drm_i915_gem_object *obj,
-+		   struct drm_i915_gem_relocation_entry *reloc)
-+{
-+	uint32_t page_offset = offset_in_page(reloc->offset);
-+	char *vaddr;
-+	int ret = -EINVAL;
-+
-+	ret = i915_gem_object_set_to_cpu_domain(obj, 1);
-+	if (ret)
-+		return ret;
-+
-+	vaddr = kmap_atomic(i915_gem_object_get_page(obj,
-+				reloc->offset >> PAGE_SHIFT));
-+	*(uint32_t *)(vaddr + page_offset) = reloc->delta;
-+	kunmap_atomic(vaddr);
-+
-+	return 0;
-+}
-+
-+static int
-+relocate_entry_gtt(struct drm_i915_gem_object *obj,
-+		   struct drm_i915_gem_relocation_entry *reloc)
-+{
-+	struct drm_device *dev = obj->base.dev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	uint32_t __iomem *reloc_entry;
-+	void __iomem *reloc_page;
-+	int ret = -EINVAL;
-+
-+	ret = i915_gem_object_set_to_gtt_domain(obj, true);
-+	if (ret)
-+		return ret;
-+
-+	ret = i915_gem_object_put_fence(obj);
-+	if (ret)
-+		return ret;
-+
-+	/* Map the page containing the relocation we're going to perform.  */
-+	reloc->offset += i915_gem_obj_ggtt_offset(obj);
-+	reloc_page = io_mapping_map_atomic_wc(dev_priv->gtt.mappable,
-+			reloc->offset & PAGE_MASK);
-+	reloc_entry = (uint32_t __iomem *)
-+		(reloc_page + offset_in_page(reloc->offset));
-+	iowrite32(reloc->delta, reloc_entry);
-+	io_mapping_unmap_atomic(reloc_page);
-+
-+	return 0;
-+}
-+
-+static int
- i915_gem_execbuffer_relocate_entry(struct drm_i915_gem_object *obj,
- 				   struct eb_objects *eb,
- 				   struct drm_i915_gem_relocation_entry *reloc,
-@@ -255,40 +305,10 @@ i915_gem_execbuffer_relocate_entry(struct drm_i915_gem_object *obj,
- 		return -EFAULT;
- 
- 	reloc->delta += target_offset;
--	if (use_cpu_reloc(obj)) {
--		uint32_t page_offset = offset_in_page(reloc->offset);
--		char *vaddr;
--
--		ret = i915_gem_object_set_to_cpu_domain(obj, 1);
--		if (ret)
--			return ret;
--
--		vaddr = kmap_atomic(i915_gem_object_get_page(obj,
--							     reloc->offset >> PAGE_SHIFT));
--		*(uint32_t *)(vaddr + page_offset) = reloc->delta;
--		kunmap_atomic(vaddr);
--	} else {
--		struct drm_i915_private *dev_priv = dev->dev_private;
--		uint32_t __iomem *reloc_entry;
--		void __iomem *reloc_page;
--
--		ret = i915_gem_object_set_to_gtt_domain(obj, true);
--		if (ret)
--			return ret;
--
--		ret = i915_gem_object_put_fence(obj);
--		if (ret)
--			return ret;
--
--		/* Map the page containing the relocation we're going to perform.  */
--		reloc->offset += i915_gem_obj_ggtt_offset(obj);
--		reloc_page = io_mapping_map_atomic_wc(dev_priv->gtt.mappable,
--						      reloc->offset & PAGE_MASK);
--		reloc_entry = (uint32_t __iomem *)
--			(reloc_page + offset_in_page(reloc->offset));
--		iowrite32(reloc->delta, reloc_entry);
--		io_mapping_unmap_atomic(reloc_page);
--	}
-+	if (use_cpu_reloc(obj))
-+		ret = relocate_entry_cpu(obj, reloc);
-+	else
-+		ret = relocate_entry_gtt(obj, reloc);
- 
- 	/* and update the user's relocation entry */
- 	reloc->presumed_offset = target_offset;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0717-drm-i915-drop-WaMbcDriverBootEnable-workaround.patch b/patches.baytrail/0717-drm-i915-drop-WaMbcDriverBootEnable-workaround.patch
deleted file mode 100644
index a85d55b2c4584..0000000000000
--- a/patches.baytrail/0717-drm-i915-drop-WaMbcDriverBootEnable-workaround.patch
+++ /dev/null
@@ -1,93 +0,0 @@
-From b8b71bdccc8c0409799da9ecaca9d04339f17170 Mon Sep 17 00:00:00 2001
-From: Jesse Barnes <jbarnes@virtuousgeek.org>
-Date: Wed, 21 Aug 2013 08:08:55 -0700
-Subject: drm/i915: drop WaMbcDriverBootEnable workaround
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Turns out the BIOS will do this for us as needed, and if we try to do it
-again we risk hangs or other bad behavior.
-
-Note that this seems to break libva on ChromeOS after resumes (but
-strangely _not_ after booting up).
-
-This essentially reverts
-
-commit b4ae3f22d238617ca11610b29fde16cf8c0bc6e0
-Author: Jesse Barnes <jbarnes@virtuousgeek.org>
-Date:   Thu Jun 14 11:04:48 2012 -0700
-
-    drm/i915: load boot context at driver init time
-
-and
-
-commit b3bf076697a68a8577f4a5f7407de0bb2b3b56ac
-Author: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date:   Tue Nov 20 13:27:44 2012 -0200
-
-    drm/i915: implement WaMbcDriverBootEnable on Haswell
-
-Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Reported-and-Tested-by: Stéphane Marchesin <marcheu@chromium.org>
-[danvet: Add note about impact and regression citation.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 3414caf63421762e57b26aa999e5187b42ee1606)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 17 -----------------
- 1 file changed, 17 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 8dca2530a8f4..178da3ec31b4 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -4864,10 +4864,6 @@ static void gen6_init_clock_gating(struct drm_device *dev)
- 		   ILK_DPARBUNIT_CLOCK_GATE_ENABLE  |
- 		   ILK_DPFDUNIT_CLOCK_GATE_ENABLE);
- 
--	/* WaMbcDriverBootEnable:snb */
--	I915_WRITE(GEN6_MBCTL, I915_READ(GEN6_MBCTL) |
--		   GEN6_MBCTL_ENABLE_BOOT_FETCH);
--
- 	g4x_disable_trickle_feed(dev);
- 
- 	/* The default value should be 0x200 according to docs, but the two
-@@ -4963,10 +4959,6 @@ static void haswell_init_clock_gating(struct drm_device *dev)
- 	I915_WRITE(CACHE_MODE_1,
- 		   _MASKED_BIT_ENABLE(PIXEL_SUBSPAN_COLLECT_OPT_DISABLE));
- 
--	/* WaMbcDriverBootEnable:hsw */
--	I915_WRITE(GEN6_MBCTL, I915_READ(GEN6_MBCTL) |
--		   GEN6_MBCTL_ENABLE_BOOT_FETCH);
--
- 	/* WaSwitchSolVfFArbitrationPriority:hsw */
- 	I915_WRITE(GAM_ECOCHK, I915_READ(GAM_ECOCHK) | HSW_ECOCHK_ARB_PRIO_SOL);
- 
-@@ -5050,10 +5042,6 @@ static void ivybridge_init_clock_gating(struct drm_device *dev)
- 
- 	g4x_disable_trickle_feed(dev);
- 
--	/* WaMbcDriverBootEnable:ivb */
--	I915_WRITE(GEN6_MBCTL, I915_READ(GEN6_MBCTL) |
--		   GEN6_MBCTL_ENABLE_BOOT_FETCH);
--
- 	/* WaVSRefCountFullforceMissDisable:ivb */
- 	gen7_setup_fixed_func_scheduler(dev_priv);
- 
-@@ -5113,11 +5101,6 @@ static void valleyview_init_clock_gating(struct drm_device *dev)
- 		   I915_READ(GEN7_SQ_CHICKEN_MBCUNIT_CONFIG) |
- 		   GEN7_SQ_CHICKEN_MBCUNIT_SQINTMOB);
- 
--	/* WaMbcDriverBootEnable:vlv */
--	I915_WRITE(GEN6_MBCTL, I915_READ(GEN6_MBCTL) |
--		   GEN6_MBCTL_ENABLE_BOOT_FETCH);
--
--
- 	/* According to the BSpec vol1g, bit 12 (RCPBUNIT) clock
- 	 * gating disable must be set.  Failure to set it results in
- 	 * flickering pixels due to Z write ordering failures after
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0718-drm-i915-grab-force_wake-when-restoring-LCPLL.patch b/patches.baytrail/0718-drm-i915-grab-force_wake-when-restoring-LCPLL.patch
deleted file mode 100644
index 78d27d63bea75..0000000000000
--- a/patches.baytrail/0718-drm-i915-grab-force_wake-when-restoring-LCPLL.patch
+++ /dev/null
@@ -1,53 +0,0 @@
-From 3dd012f943c1fde747737e4792da2c9a8721ad79 Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Mon, 19 Aug 2013 13:18:07 -0300
-Subject: drm/i915: grab force_wake when restoring LCPLL
-
-If LCPLL is disabled, there's a chance we might be in package C8 state
-or deeper, and we'll get a hard hang when restoring LCPLL (also, a red
-led lights up on my motherboard). So grab the force_wake, which will
-get us out of RC6 and, as a consequence, out of PC8+ (since we need
-RC6 to get into PC8+).
-
-Note: Discussions with hw designers are still ongoing what exactly
-goes boom here. But I think we can go ahead and just merge this little
-hack for now until it's clear what we actually need.
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-[danvet: Add small note about the current state of the discussion
-around this hack.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 215733fadb87709e91b3a622d786865292c9ab11)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 6 ++++++
- 1 file changed, 6 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 0426c92a4c18..d46f554c2a9e 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -6033,6 +6033,10 @@ void hsw_restore_lcpll(struct drm_i915_private *dev_priv)
- 		    LCPLL_POWER_DOWN_ALLOW)) == LCPLL_PLL_LOCK)
- 		return;
- 
-+	/* Make sure we're not on PC8 state before disabling PC8, otherwise
-+	 * we'll hang the machine! */
-+	dev_priv->uncore.funcs.force_wake_get(dev_priv);
-+
- 	if (val & LCPLL_POWER_DOWN_ALLOW) {
- 		val &= ~LCPLL_POWER_DOWN_ALLOW;
- 		I915_WRITE(LCPLL_CTL, val);
-@@ -6060,6 +6064,8 @@ void hsw_restore_lcpll(struct drm_i915_private *dev_priv)
- 					LCPLL_CD_SOURCE_FCLK_DONE) == 0, 1))
- 			DRM_ERROR("Switching back to LCPLL failed\n");
- 	}
-+
-+	dev_priv->uncore.funcs.force_wake_put(dev_priv);
- }
- 
- static void haswell_modeset_global_resources(struct drm_device *dev)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0719-drm-i915-fix-SDEIMR-assertion-when-disabling-LCPLL.patch b/patches.baytrail/0719-drm-i915-fix-SDEIMR-assertion-when-disabling-LCPLL.patch
deleted file mode 100644
index 4efabef6dcc5b..0000000000000
--- a/patches.baytrail/0719-drm-i915-fix-SDEIMR-assertion-when-disabling-LCPLL.patch
+++ /dev/null
@@ -1,48 +0,0 @@
-From 4221861eb8c2f5921f7455ac93a0f67843983265 Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Mon, 19 Aug 2013 13:18:08 -0300
-Subject: drm/i915: fix SDEIMR assertion when disabling LCPLL
-
-This was causing WARNs in one machine, so instead of trying to guess
-exactly which hotplug bits should exist, just do the test on the
-non-HPD bits. We don't care about the state of the hotplug bits, we
-just care about the others, that need to be 1.
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit bd633a7c1ca0663ba10426a0a6aeda0257cbe804)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 8 ++------
- 1 file changed, 2 insertions(+), 6 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index d46f554c2a9e..29e43b2cf908 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -5932,11 +5932,7 @@ static void assert_can_disable_lcpll(struct drm_i915_private *dev_priv)
- 	struct intel_ddi_plls *plls = &dev_priv->ddi_plls;
- 	struct intel_crtc *crtc;
- 	unsigned long irqflags;
--	uint32_t val, pch_hpd_mask;
--
--	pch_hpd_mask = SDE_PORTB_HOTPLUG_CPT | SDE_PORTC_HOTPLUG_CPT;
--	if (!(dev_priv->pch_id == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE))
--		pch_hpd_mask |= SDE_PORTD_HOTPLUG_CPT | SDE_CRT_HOTPLUG_CPT;
-+	uint32_t val;
- 
- 	list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head)
- 		WARN(crtc->base.enabled, "CRTC for pipe %c enabled\n",
-@@ -5962,7 +5958,7 @@ static void assert_can_disable_lcpll(struct drm_i915_private *dev_priv)
- 	WARN((val & ~DE_PCH_EVENT_IVB) != val,
- 	     "Unexpected DEIMR bits enabled: 0x%x\n", val);
- 	val = I915_READ(SDEIMR);
--	WARN((val & ~pch_hpd_mask) != val,
-+	WARN((val | SDE_HOTPLUG_MASK_CPT) != 0xffffffff,
- 	     "Unexpected SDEIMR bits enabled: 0x%x\n", val);
- 	spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0720-drm-i915-allow-package-C8-states-on-Haswell-disabled.patch b/patches.baytrail/0720-drm-i915-allow-package-C8-states-on-Haswell-disabled.patch
deleted file mode 100644
index bc3d4f02a7265..0000000000000
--- a/patches.baytrail/0720-drm-i915-allow-package-C8-states-on-Haswell-disabled.patch
+++ /dev/null
@@ -1,654 +0,0 @@
-From 8a15d0a7767762e5901533b37c17bd2fa126617b Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Mon, 19 Aug 2013 13:18:09 -0300
-Subject: drm/i915: allow package C8+ states on Haswell (disabled)
-
-This patch allows PC8+ states on Haswell. These states can only be
-reached when all the display outputs are disabled, and they allow some
-more power savings.
-
-The fact that the graphics device is allowing PC8+ doesn't mean that
-the machine will actually enter PC8+: all the other devices also need
-to allow PC8+.
-
-For now this option is disabled by default. You need i915.allow_pc8=1
-if you want it.
-
-This patch adds a big comment inside i915_drv.h explaining how it
-works and how it tracks things. Read it.
-
-v2: (this is not really v2, many previous versions were already sent,
-     but they had different names)
-    - Use the new functions to enable/disable GTIMR and GEN6_PMIMR
-    - Rename almost all variables and functions to names suggested by
-      Chris
-    - More WARNs on the IRQ handling code
-    - Also disable PC8 when there's GPU work to do (thanks to Ben for
-      the help on this), so apps can run caster
-    - Enable PC8 on a delayed work function that is delayed for 5
-      seconds. This makes sure we only enable PC8+ if we're really
-      idle
-    - Make sure we're not in PC8+ when suspending
-v3: - WARN if IRQs are disabled on __wait_seqno
-    - Replace some DRM_ERRORs with WARNs
-    - Fix calls to restore GT and PM interrupts
-    - Use intel_mark_busy instead of intel_ring_advance to disable PC8
-v4: - Use the force_wake, Luke!
-v5: - Remove the "IIR is not zero" WARNs
-    - Move the force_wake chunk to its own patch
-    - Only restore what's missing from RC6, not everything
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit c67a470b1db781c54be07a87217cff35a91f564e)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_dma.c      |   10 ++
- drivers/gpu/drm/i915/i915_drv.c      |   11 ++
- drivers/gpu/drm/i915/i915_drv.h      |   72 ++++++++++++++
- drivers/gpu/drm/i915/i915_gem.c      |    2 
- drivers/gpu/drm/i915/i915_irq.c      |  101 ++++++++++++++++++++
- drivers/gpu/drm/i915/intel_display.c |  170 ++++++++++++++++++++++++++++++++++-
- drivers/gpu/drm/i915/intel_dp.c      |    3 
- drivers/gpu/drm/i915/intel_drv.h     |    8 +
- drivers/gpu/drm/i915/intel_i2c.c     |    2 
- drivers/gpu/drm/i915/intel_pm.c      |   13 ++
- 10 files changed, 390 insertions(+), 2 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_dma.c
-+++ b/drivers/gpu/drm/i915/i915_dma.c
-@@ -1494,6 +1494,14 @@ int i915_driver_load(struct drm_device *
- 	mutex_init(&dev_priv->rps.hw_lock);
- 	mutex_init(&dev_priv->modeset_restore_lock);
- 
-+	mutex_init(&dev_priv->pc8.lock);
-+	dev_priv->pc8.requirements_met = false;
-+	dev_priv->pc8.gpu_idle = false;
-+	dev_priv->pc8.irqs_disabled = false;
-+	dev_priv->pc8.enabled = false;
-+	dev_priv->pc8.disable_count = 2; /* requirements_met + gpu_idle */
-+	INIT_DELAYED_WORK(&dev_priv->pc8.enable_work, hsw_enable_pc8_work);
-+
- 	i915_dump_device_info(dev_priv);
- 
- 	/* Not all pre-production machines fall into this category, only the
-@@ -1749,6 +1757,8 @@ int i915_driver_unload(struct drm_device
- 	cancel_work_sync(&dev_priv->gpu_error.work);
- 	i915_destroy_error_state(dev);
- 
-+	cancel_delayed_work_sync(&dev_priv->pc8.enable_work);
-+
- 	if (dev->pdev->msi_enabled)
- 		pci_disable_msi(dev->pdev);
- 
---- a/drivers/gpu/drm/i915/i915_drv.c
-+++ b/drivers/gpu/drm/i915/i915_drv.c
-@@ -141,6 +141,10 @@ module_param_named(fastboot, i915_fastbo
- MODULE_PARM_DESC(fastboot, "Try to skip unnecessary mode sets at boot time "
- 		 "(default: false)");
- 
-+int i915_enable_pc8 __read_mostly = 0;
-+module_param_named(enable_pc8, i915_enable_pc8, int, 0600);
-+MODULE_PARM_DESC(enable_pc8, "Enable support for low power package C states (PC8+) (default: false)");
-+
- bool i915_prefault_disable __read_mostly;
- module_param_named(prefault_disable, i915_prefault_disable, bool, 0600);
- MODULE_PARM_DESC(prefault_disable,
-@@ -557,6 +561,9 @@ static int i915_drm_freeze(struct drm_de
- 	dev_priv->modeset_restore = MODESET_SUSPENDED;
- 	mutex_unlock(&dev_priv->modeset_restore_lock);
- 
-+	/* We do a lot of poking in a lot of registers, make sure they work
-+	 * properly. */
-+	hsw_disable_package_c8(dev_priv);
- 	intel_set_power_well(dev, true);
- 
- 	drm_kms_helper_poll_disable(dev);
-@@ -713,6 +720,10 @@ static int __i915_drm_thaw(struct drm_de
- 		schedule_work(&dev_priv->console_resume_work);
- 	}
- 
-+	/* Undo what we did at i915_drm_freeze so the refcount goes back to the
-+	 * expected level. */
-+	hsw_enable_package_c8(dev_priv);
-+
- 	mutex_lock(&dev_priv->modeset_restore_lock);
- 	dev_priv->modeset_restore = MODESET_DONE;
- 	mutex_unlock(&dev_priv->modeset_restore_lock);
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1076,6 +1076,75 @@ struct intel_wm_level {
- 	uint32_t fbc_val;
- };
- 
-+/*
-+ * This struct tracks the state needed for the Package C8+ feature.
-+ *
-+ * Package states C8 and deeper are really deep PC states that can only be
-+ * reached when all the devices on the system allow it, so even if the graphics
-+ * device allows PC8+, it doesn't mean the system will actually get to these
-+ * states.
-+ *
-+ * Our driver only allows PC8+ when all the outputs are disabled, the power well
-+ * is disabled and the GPU is idle. When these conditions are met, we manually
-+ * do the other conditions: disable the interrupts, clocks and switch LCPLL
-+ * refclk to Fclk.
-+ *
-+ * When we really reach PC8 or deeper states (not just when we allow it) we lose
-+ * the state of some registers, so when we come back from PC8+ we need to
-+ * restore this state. We don't get into PC8+ if we're not in RC6, so we don't
-+ * need to take care of the registers kept by RC6.
-+ *
-+ * The interrupt disabling is part of the requirements. We can only leave the
-+ * PCH HPD interrupts enabled. If we're in PC8+ and we get another interrupt we
-+ * can lock the machine.
-+ *
-+ * Ideally every piece of our code that needs PC8+ disabled would call
-+ * hsw_disable_package_c8, which would increment disable_count and prevent the
-+ * system from reaching PC8+. But we don't have a symmetric way to do this for
-+ * everything, so we have the requirements_met and gpu_idle variables. When we
-+ * switch requirements_met or gpu_idle to true we decrease disable_count, and
-+ * increase it in the opposite case. The requirements_met variable is true when
-+ * all the CRTCs, encoders and the power well are disabled. The gpu_idle
-+ * variable is true when the GPU is idle.
-+ *
-+ * In addition to everything, we only actually enable PC8+ if disable_count
-+ * stays at zero for at least some seconds. This is implemented with the
-+ * enable_work variable. We do this so we don't enable/disable PC8 dozens of
-+ * consecutive times when all screens are disabled and some background app
-+ * queries the state of our connectors, or we have some application constantly
-+ * waking up to use the GPU. Only after the enable_work function actually
-+ * enables PC8+ the "enable" variable will become true, which means that it can
-+ * be false even if disable_count is 0.
-+ *
-+ * The irqs_disabled variable becomes true exactly after we disable the IRQs and
-+ * goes back to false exactly before we reenable the IRQs. We use this variable
-+ * to check if someone is trying to enable/disable IRQs while they're supposed
-+ * to be disabled. This shouldn't happen and we'll print some error messages in
-+ * case it happens, but if it actually happens we'll also update the variables
-+ * inside struct regsave so when we restore the IRQs they will contain the
-+ * latest expected values.
-+ *
-+ * For more, read "Display Sequences for Package C8" on our documentation.
-+ */
-+struct i915_package_c8 {
-+	bool requirements_met;
-+	bool gpu_idle;
-+	bool irqs_disabled;
-+	/* Only true after the delayed work task actually enables it. */
-+	bool enabled;
-+	int disable_count;
-+	struct mutex lock;
-+	struct delayed_work enable_work;
-+
-+	struct {
-+		uint32_t deimr;
-+		uint32_t sdeimr;
-+		uint32_t gtimr;
-+		uint32_t gtier;
-+		uint32_t gen6_pmimr;
-+	} regsave;
-+};
-+
- typedef struct drm_i915_private {
- 	struct drm_device *dev;
- 	struct kmem_cache *slab;
-@@ -1260,6 +1329,8 @@ typedef struct drm_i915_private {
- 		uint16_t cur_latency[5];
- 	} wm;
- 
-+	struct i915_package_c8 pc8;
-+
- 	/* Old dri1 support infrastructure, beware the dragons ya fools entering
- 	 * here! */
- 	struct i915_dri1_state dri1;
-@@ -1635,6 +1706,7 @@ extern unsigned int i915_preliminary_hw_
- extern int i915_disable_power_well __read_mostly;
- extern int i915_enable_ips __read_mostly;
- extern bool i915_fastboot __read_mostly;
-+extern int i915_enable_pc8 __read_mostly;
- extern bool i915_prefault_disable __read_mostly;
- 
- extern int i915_suspend(struct drm_device *dev, pm_message_t state);
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -999,6 +999,8 @@ static int __wait_seqno(struct intel_rin
- 	bool wait_forever = true;
- 	int ret;
- 
-+	WARN(dev_priv->pc8.irqs_disabled, "IRQs disabled\n");
-+
- 	if (i915_seqno_passed(ring->get_seqno(ring, true), seqno))
- 		return 0;
- 
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -85,6 +85,12 @@ ironlake_enable_display_irq(drm_i915_pri
- {
- 	assert_spin_locked(&dev_priv->irq_lock);
- 
-+	if (dev_priv->pc8.irqs_disabled) {
-+		WARN(1, "IRQs disabled\n");
-+		dev_priv->pc8.regsave.deimr &= ~mask;
-+		return;
-+	}
-+
- 	if ((dev_priv->irq_mask & mask) != 0) {
- 		dev_priv->irq_mask &= ~mask;
- 		I915_WRITE(DEIMR, dev_priv->irq_mask);
-@@ -97,6 +103,12 @@ ironlake_disable_display_irq(drm_i915_pr
- {
- 	assert_spin_locked(&dev_priv->irq_lock);
- 
-+	if (dev_priv->pc8.irqs_disabled) {
-+		WARN(1, "IRQs disabled\n");
-+		dev_priv->pc8.regsave.deimr |= mask;
-+		return;
-+	}
-+
- 	if ((dev_priv->irq_mask & mask) != mask) {
- 		dev_priv->irq_mask |= mask;
- 		I915_WRITE(DEIMR, dev_priv->irq_mask);
-@@ -116,6 +128,14 @@ static void ilk_update_gt_irq(struct drm
- {
- 	assert_spin_locked(&dev_priv->irq_lock);
- 
-+	if (dev_priv->pc8.irqs_disabled) {
-+		WARN(1, "IRQs disabled\n");
-+		dev_priv->pc8.regsave.gtimr &= ~interrupt_mask;
-+		dev_priv->pc8.regsave.gtimr |= (~enabled_irq_mask &
-+						interrupt_mask);
-+		return;
-+	}
-+
- 	dev_priv->gt_irq_mask &= ~interrupt_mask;
- 	dev_priv->gt_irq_mask |= (~enabled_irq_mask & interrupt_mask);
- 	I915_WRITE(GTIMR, dev_priv->gt_irq_mask);
-@@ -146,6 +166,14 @@ static void snb_update_pm_irq(struct drm
- 
- 	assert_spin_locked(&dev_priv->irq_lock);
- 
-+	if (dev_priv->pc8.irqs_disabled) {
-+		WARN(1, "IRQs disabled\n");
-+		dev_priv->pc8.regsave.gen6_pmimr &= ~interrupt_mask;
-+		dev_priv->pc8.regsave.gen6_pmimr |= (~enabled_irq_mask &
-+						     interrupt_mask);
-+		return;
-+	}
-+
- 	new_val = dev_priv->pm_irq_mask;
- 	new_val &= ~interrupt_mask;
- 	new_val |= (~enabled_irq_mask & interrupt_mask);
-@@ -257,6 +285,15 @@ static void ibx_display_interrupt_update
- 
- 	assert_spin_locked(&dev_priv->irq_lock);
- 
-+	if (dev_priv->pc8.irqs_disabled &&
-+	    (interrupt_mask & SDE_HOTPLUG_MASK_CPT)) {
-+		WARN(1, "IRQs disabled\n");
-+		dev_priv->pc8.regsave.sdeimr &= ~interrupt_mask;
-+		dev_priv->pc8.regsave.sdeimr |= (~enabled_irq_mask &
-+						 interrupt_mask);
-+		return;
-+	}
-+
- 	I915_WRITE(SDEIMR, sdeimr);
- 	POSTING_READ(SDEIMR);
- }
-@@ -3159,3 +3196,67 @@ void intel_hpd_init(struct drm_device *d
- 		dev_priv->display.hpd_irq_setup(dev);
- 	spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
- }
-+
-+/* Disable interrupts so we can allow Package C8+. */
-+void hsw_pc8_disable_interrupts(struct drm_device *dev)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	unsigned long irqflags;
-+
-+	spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
-+
-+	dev_priv->pc8.regsave.deimr = I915_READ(DEIMR);
-+	dev_priv->pc8.regsave.sdeimr = I915_READ(SDEIMR);
-+	dev_priv->pc8.regsave.gtimr = I915_READ(GTIMR);
-+	dev_priv->pc8.regsave.gtier = I915_READ(GTIER);
-+	dev_priv->pc8.regsave.gen6_pmimr = I915_READ(GEN6_PMIMR);
-+
-+	ironlake_disable_display_irq(dev_priv, ~DE_PCH_EVENT_IVB);
-+	ibx_disable_display_interrupt(dev_priv, ~SDE_HOTPLUG_MASK_CPT);
-+	ilk_disable_gt_irq(dev_priv, 0xffffffff);
-+	snb_disable_pm_irq(dev_priv, 0xffffffff);
-+
-+	dev_priv->pc8.irqs_disabled = true;
-+
-+	spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
-+}
-+
-+/* Restore interrupts so we can recover from Package C8+. */
-+void hsw_pc8_restore_interrupts(struct drm_device *dev)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	unsigned long irqflags;
-+	uint32_t val, expected;
-+
-+	spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
-+
-+	val = I915_READ(DEIMR);
-+	expected = ~DE_PCH_EVENT_IVB;
-+	WARN(val != expected, "DEIMR is 0x%08x, not 0x%08x\n", val, expected);
-+
-+	val = I915_READ(SDEIMR) & ~SDE_HOTPLUG_MASK_CPT;
-+	expected = ~SDE_HOTPLUG_MASK_CPT;
-+	WARN(val != expected, "SDEIMR non-HPD bits are 0x%08x, not 0x%08x\n",
-+	     val, expected);
-+
-+	val = I915_READ(GTIMR);
-+	expected = 0xffffffff;
-+	WARN(val != expected, "GTIMR is 0x%08x, not 0x%08x\n", val, expected);
-+
-+	val = I915_READ(GEN6_PMIMR);
-+	expected = 0xffffffff;
-+	WARN(val != expected, "GEN6_PMIMR is 0x%08x, not 0x%08x\n", val,
-+	     expected);
-+
-+	dev_priv->pc8.irqs_disabled = false;
-+
-+	ironlake_enable_display_irq(dev_priv, ~dev_priv->pc8.regsave.deimr);
-+	ibx_enable_display_interrupt(dev_priv,
-+				     ~dev_priv->pc8.regsave.sdeimr &
-+				     ~SDE_HOTPLUG_MASK_CPT);
-+	ilk_enable_gt_irq(dev_priv, ~dev_priv->pc8.regsave.gtimr);
-+	snb_enable_pm_irq(dev_priv, ~dev_priv->pc8.regsave.gen6_pmimr);
-+	I915_WRITE(GTIER, dev_priv->pc8.regsave.gtier);
-+
-+	spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
-+}
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -6064,6 +6064,166 @@ void hsw_restore_lcpll(struct drm_i915_p
- 	dev_priv->uncore.funcs.force_wake_put(dev_priv);
- }
- 
-+void hsw_enable_pc8_work(struct work_struct *__work)
-+{
-+	struct drm_i915_private *dev_priv =
-+		container_of(to_delayed_work(__work), struct drm_i915_private,
-+			     pc8.enable_work);
-+	struct drm_device *dev = dev_priv->dev;
-+	uint32_t val;
-+
-+	if (dev_priv->pc8.enabled)
-+		return;
-+
-+	DRM_DEBUG_KMS("Enabling package C8+\n");
-+
-+	dev_priv->pc8.enabled = true;
-+
-+	if (dev_priv->pch_id == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE) {
-+		val = I915_READ(SOUTH_DSPCLK_GATE_D);
-+		val &= ~PCH_LP_PARTITION_LEVEL_DISABLE;
-+		I915_WRITE(SOUTH_DSPCLK_GATE_D, val);
-+	}
-+
-+	lpt_disable_clkout_dp(dev);
-+	hsw_pc8_disable_interrupts(dev);
-+	hsw_disable_lcpll(dev_priv, true, true);
-+}
-+
-+static void __hsw_enable_package_c8(struct drm_i915_private *dev_priv)
-+{
-+	WARN_ON(!mutex_is_locked(&dev_priv->pc8.lock));
-+	WARN(dev_priv->pc8.disable_count < 1,
-+	     "pc8.disable_count: %d\n", dev_priv->pc8.disable_count);
-+
-+	dev_priv->pc8.disable_count--;
-+	if (dev_priv->pc8.disable_count != 0)
-+		return;
-+
-+	schedule_delayed_work(&dev_priv->pc8.enable_work,
-+			      msecs_to_jiffies(5 * 1000));
-+}
-+
-+static void __hsw_disable_package_c8(struct drm_i915_private *dev_priv)
-+{
-+	struct drm_device *dev = dev_priv->dev;
-+	uint32_t val;
-+
-+	WARN_ON(!mutex_is_locked(&dev_priv->pc8.lock));
-+	WARN(dev_priv->pc8.disable_count < 0,
-+	     "pc8.disable_count: %d\n", dev_priv->pc8.disable_count);
-+
-+	dev_priv->pc8.disable_count++;
-+	if (dev_priv->pc8.disable_count != 1)
-+		return;
-+
-+	cancel_delayed_work_sync(&dev_priv->pc8.enable_work);
-+	if (!dev_priv->pc8.enabled)
-+		return;
-+
-+	DRM_DEBUG_KMS("Disabling package C8+\n");
-+
-+	hsw_restore_lcpll(dev_priv);
-+	hsw_pc8_restore_interrupts(dev);
-+	lpt_init_pch_refclk(dev);
-+
-+	if (dev_priv->pch_id == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE) {
-+		val = I915_READ(SOUTH_DSPCLK_GATE_D);
-+		val |= PCH_LP_PARTITION_LEVEL_DISABLE;
-+		I915_WRITE(SOUTH_DSPCLK_GATE_D, val);
-+	}
-+
-+	intel_prepare_ddi(dev);
-+	i915_gem_init_swizzling(dev);
-+	mutex_lock(&dev_priv->rps.hw_lock);
-+	gen6_update_ring_freq(dev);
-+	mutex_unlock(&dev_priv->rps.hw_lock);
-+	dev_priv->pc8.enabled = false;
-+}
-+
-+void hsw_enable_package_c8(struct drm_i915_private *dev_priv)
-+{
-+	mutex_lock(&dev_priv->pc8.lock);
-+	__hsw_enable_package_c8(dev_priv);
-+	mutex_unlock(&dev_priv->pc8.lock);
-+}
-+
-+void hsw_disable_package_c8(struct drm_i915_private *dev_priv)
-+{
-+	mutex_lock(&dev_priv->pc8.lock);
-+	__hsw_disable_package_c8(dev_priv);
-+	mutex_unlock(&dev_priv->pc8.lock);
-+}
-+
-+static bool hsw_can_enable_package_c8(struct drm_i915_private *dev_priv)
-+{
-+	struct drm_device *dev = dev_priv->dev;
-+	struct intel_crtc *crtc;
-+	uint32_t val;
-+
-+	list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head)
-+		if (crtc->base.enabled)
-+			return false;
-+
-+	/* This case is still possible since we have the i915.disable_power_well
-+	 * parameter and also the KVMr or something else might be requesting the
-+	 * power well. */
-+	val = I915_READ(HSW_PWR_WELL_DRIVER);
-+	if (val != 0) {
-+		DRM_DEBUG_KMS("Not enabling PC8: power well on\n");
-+		return false;
-+	}
-+
-+	return true;
-+}
-+
-+/* Since we're called from modeset_global_resources there's no way to
-+ * symmetrically increase and decrease the refcount, so we use
-+ * dev_priv->pc8.requirements_met to track whether we already have the refcount
-+ * or not.
-+ */
-+static void hsw_update_package_c8(struct drm_device *dev)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	bool allow;
-+
-+	if (!i915_enable_pc8)
-+		return;
-+
-+	mutex_lock(&dev_priv->pc8.lock);
-+
-+	allow = hsw_can_enable_package_c8(dev_priv);
-+
-+	if (allow == dev_priv->pc8.requirements_met)
-+		goto done;
-+
-+	dev_priv->pc8.requirements_met = allow;
-+
-+	if (allow)
-+		__hsw_enable_package_c8(dev_priv);
-+	else
-+		__hsw_disable_package_c8(dev_priv);
-+
-+done:
-+	mutex_unlock(&dev_priv->pc8.lock);
-+}
-+
-+static void hsw_package_c8_gpu_idle(struct drm_i915_private *dev_priv)
-+{
-+	if (!dev_priv->pc8.gpu_idle) {
-+		dev_priv->pc8.gpu_idle = true;
-+		hsw_enable_package_c8(dev_priv);
-+	}
-+}
-+
-+static void hsw_package_c8_gpu_busy(struct drm_i915_private *dev_priv)
-+{
-+	if (dev_priv->pc8.gpu_idle) {
-+		dev_priv->pc8.gpu_idle = false;
-+		hsw_disable_package_c8(dev_priv);
-+	}
-+}
-+
- static void haswell_modeset_global_resources(struct drm_device *dev)
- {
- 	bool enable = false;
-@@ -6079,6 +6239,8 @@ static void haswell_modeset_global_resou
- 	}
- 
- 	intel_set_power_well(dev, enable);
-+
-+	hsw_update_package_c8(dev);
- }
- 
- static int haswell_crtc_mode_set(struct drm_crtc *crtc,
-@@ -7314,13 +7476,19 @@ static void intel_decrease_pllclock(stru
- 
- void intel_mark_busy(struct drm_device *dev)
- {
--	i915_update_gfx_val(dev->dev_private);
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+
-+	hsw_package_c8_gpu_busy(dev_priv);
-+	i915_update_gfx_val(dev_priv);
- }
- 
- void intel_mark_idle(struct drm_device *dev)
- {
-+	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct drm_crtc *crtc;
- 
-+	hsw_package_c8_gpu_idle(dev_priv);
-+
- 	if (!i915_powersave)
- 		return;
- 
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -344,6 +344,8 @@ intel_dp_aux_ch(struct intel_dp *intel_d
- 	else
- 		precharge = 5;
- 
-+	intel_aux_display_runtime_get(dev_priv);
-+
- 	/* Try to wait for any previous AUX channel activity */
- 	for (try = 0; try < 3; try++) {
- 		status = I915_READ_NOTRACE(ch_ctl);
-@@ -434,6 +436,7 @@ intel_dp_aux_ch(struct intel_dp *intel_d
- 	ret = recv_bytes;
- out:
- 	pm_qos_update_request(&dev_priv->pm_qos, PM_QOS_DEFAULT_VALUE);
-+	intel_aux_display_runtime_put(dev_priv);
- 
- 	return ret;
- }
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -745,6 +745,7 @@ extern void intel_set_power_well(struct
- extern void intel_enable_gt_powersave(struct drm_device *dev);
- extern void intel_disable_gt_powersave(struct drm_device *dev);
- extern void ironlake_teardown_rc6(struct drm_device *dev);
-+void gen6_update_ring_freq(struct drm_device *dev);
- 
- extern bool intel_ddi_get_hw_state(struct intel_encoder *encoder,
- 				   enum pipe *pipe);
-@@ -784,5 +785,12 @@ extern void ilk_disable_gt_irq(struct dr
- extern void snb_enable_pm_irq(struct drm_i915_private *dev_priv, uint32_t mask);
- extern void snb_disable_pm_irq(struct drm_i915_private *dev_priv,
- 			       uint32_t mask);
-+extern void hsw_enable_pc8_work(struct work_struct *__work);
-+extern void hsw_enable_package_c8(struct drm_i915_private *dev_priv);
-+extern void hsw_disable_package_c8(struct drm_i915_private *dev_priv);
-+extern void hsw_pc8_disable_interrupts(struct drm_device *dev);
-+extern void hsw_pc8_restore_interrupts(struct drm_device *dev);
-+extern void intel_aux_display_runtime_get(struct drm_i915_private *dev_priv);
-+extern void intel_aux_display_runtime_put(struct drm_i915_private *dev_priv);
- 
- #endif /* __INTEL_DRV_H__ */
---- a/drivers/gpu/drm/i915/intel_i2c.c
-+++ b/drivers/gpu/drm/i915/intel_i2c.c
-@@ -398,6 +398,7 @@ gmbus_xfer(struct i2c_adapter *adapter,
- 	int i, reg_offset;
- 	int ret = 0;
- 
-+	intel_aux_display_runtime_get(dev_priv);
- 	mutex_lock(&dev_priv->gmbus_mutex);
- 
- 	if (bus->force_bit) {
-@@ -497,6 +498,7 @@ timeout:
- 
- out:
- 	mutex_unlock(&dev_priv->gmbus_mutex);
-+	intel_aux_display_runtime_put(dev_priv);
- 	return ret;
- }
- 
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -3607,7 +3607,7 @@ static void gen6_enable_rps(struct drm_d
- 	gen6_gt_force_wake_put(dev_priv);
- }
- 
--static void gen6_update_ring_freq(struct drm_device *dev)
-+void gen6_update_ring_freq(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	int min_freq = 15;
-@@ -5416,6 +5416,17 @@ void intel_init_power_well(struct drm_de
- 		I915_WRITE(HSW_PWR_WELL_BIOS, 0);
- }
- 
-+/* Disables PC8 so we can use the GMBUS and DP AUX interrupts. */
-+void intel_aux_display_runtime_get(struct drm_i915_private *dev_priv)
-+{
-+	hsw_disable_package_c8(dev_priv);
-+}
-+
-+void intel_aux_display_runtime_put(struct drm_i915_private *dev_priv)
-+{
-+	hsw_enable_package_c8(dev_priv);
-+}
-+
- /* Set up chip specific power management-related functions */
- void intel_init_pm(struct drm_device *dev)
- {
diff --git a/patches.baytrail/0721-drm-i915-add-i915_pc8_status-debugfs-file.patch b/patches.baytrail/0721-drm-i915-add-i915_pc8_status-debugfs-file.patch
deleted file mode 100644
index a9f5d86207e5e..0000000000000
--- a/patches.baytrail/0721-drm-i915-add-i915_pc8_status-debugfs-file.patch
+++ /dev/null
@@ -1,65 +0,0 @@
-From 05f863c6fb1796559ab08845fe67556e31340067 Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Mon, 19 Aug 2013 13:18:10 -0300
-Subject: drm/i915: add i915_pc8_status debugfs file
-
-Make it print the value of the variables on the PC8 struct.
-
-v2: Update to recent renames and add the new fields.
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 371db66add2ef701abd3f4295c4cd6bbc24cd5ca)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_debugfs.c | 26 ++++++++++++++++++++++++++
- 1 file changed, 26 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
-index 236d97e51c3a..39df30e7d9af 100644
---- a/drivers/gpu/drm/i915/i915_debugfs.c
-+++ b/drivers/gpu/drm/i915/i915_debugfs.c
-@@ -1788,6 +1788,31 @@ static int i915_energy_uJ(struct seq_file *m, void *data)
- 	power *= units;
- 
- 	seq_printf(m, "%llu", (long long unsigned)power);
-+
-+	return 0;
-+}
-+
-+static int i915_pc8_status(struct seq_file *m, void *unused)
-+{
-+	struct drm_info_node *node = (struct drm_info_node *) m->private;
-+	struct drm_device *dev = node->minor->dev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+
-+	if (!IS_HASWELL(dev)) {
-+		seq_puts(m, "not supported\n");
-+		return 0;
-+	}
-+
-+	mutex_lock(&dev_priv->pc8.lock);
-+	seq_printf(m, "Requirements met: %s\n",
-+		   yesno(dev_priv->pc8.requirements_met));
-+	seq_printf(m, "GPU idle: %s\n", yesno(dev_priv->pc8.gpu_idle));
-+	seq_printf(m, "Disable count: %d\n", dev_priv->pc8.disable_count);
-+	seq_printf(m, "IRQs disabled: %s\n",
-+		   yesno(dev_priv->pc8.irqs_disabled));
-+	seq_printf(m, "Enabled: %s\n", yesno(dev_priv->pc8.enabled));
-+	mutex_unlock(&dev_priv->pc8.lock);
-+
- 	return 0;
- }
- 
-@@ -2231,6 +2256,7 @@ static struct drm_info_list i915_debugfs_list[] = {
- 	{"i915_llc", i915_llc, 0},
- 	{"i915_edp_psr_status", i915_edp_psr_status, 0},
- 	{"i915_energy_uJ", i915_energy_uJ, 0},
-+	{"i915_pc8_status", i915_pc8_status, 0},
- };
- #define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0722-drm-i915-add-i915.pc8_timeout-function.patch b/patches.baytrail/0722-drm-i915-add-i915.pc8_timeout-function.patch
deleted file mode 100644
index adae78075fe77..0000000000000
--- a/patches.baytrail/0722-drm-i915-add-i915.pc8_timeout-function.patch
+++ /dev/null
@@ -1,84 +0,0 @@
-From 7b750380f5da4eb0cc683840208a8d22a035c549 Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Mon, 19 Aug 2013 13:18:11 -0300
-Subject: drm/i915: add i915.pc8_timeout function
-
-We currently only enter PC8+ after all its required conditions are
-met, there's no rendering, and we stay like that for at least 5
-seconds.
-
-I chose "5 seconds" because this value is conservative and won't make
-us enter/leave PC8+ thousands of times after the screen is off: some
-desktop environments have applications that wake up and do rendering
-every 1-3 seconds, even when the screen is off and the machine is
-completely idle.
-
-But when I was testing my PC8+ patches I set the default value to
-100ms so I could use the bad-behaving desktop environments to
-stress-test my patches. I also thought it would be a good idea to ask
-our power management team to test different values, but I'm pretty
-sure they would ask me for an easy way to change the timeout. So to
-help these 2 cases I decided to create an option that would make it
-easier to change the default value. I also expect people making
-specific products that use our driver could try to find the perfect
-timeout for them.
-
-Anyway, fixing the bad-behaving applications will always lead to
-better power savings than just changing the timeout value: you need to
-stop waking the Kernel, not quickly put it back to sleep again after
-you wake it for nothing. Bad sleep leads to bad mood!
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 900587453219f6090a1e28db1bb790aa64820131)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.c      | 4 ++++
- drivers/gpu/drm/i915/i915_drv.h      | 1 +
- drivers/gpu/drm/i915/intel_display.c | 2 +-
- 3 files changed, 6 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
-index f19736208214..ad28a72cf373 100644
---- a/drivers/gpu/drm/i915/i915_drv.c
-+++ b/drivers/gpu/drm/i915/i915_drv.c
-@@ -145,6 +145,10 @@ int i915_enable_pc8 __read_mostly = 0;
- module_param_named(enable_pc8, i915_enable_pc8, int, 0600);
- MODULE_PARM_DESC(enable_pc8, "Enable support for low power package C states (PC8+) (default: false)");
- 
-+int i915_pc8_timeout __read_mostly = 5000;
-+module_param_named(pc8_timeout, i915_pc8_timeout, int, 0600);
-+MODULE_PARM_DESC(pc8_timeout, "Number of msecs of idleness required to enter PC8+ (default: 5000)");
-+
- bool i915_prefault_disable __read_mostly;
- module_param_named(prefault_disable, i915_prefault_disable, bool, 0600);
- MODULE_PARM_DESC(prefault_disable,
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 85a352860a83..8ee15b471854 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1707,6 +1707,7 @@ extern int i915_disable_power_well __read_mostly;
- extern int i915_enable_ips __read_mostly;
- extern bool i915_fastboot __read_mostly;
- extern int i915_enable_pc8 __read_mostly;
-+extern int i915_pc8_timeout __read_mostly;
- extern bool i915_prefault_disable __read_mostly;
- 
- extern int i915_suspend(struct drm_device *dev, pm_message_t state);
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 6cf35357afad..7453d6f82631 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -6101,7 +6101,7 @@ static void __hsw_enable_package_c8(struct drm_i915_private *dev_priv)
- 		return;
- 
- 	schedule_delayed_work(&dev_priv->pc8.enable_work,
--			      msecs_to_jiffies(5 * 1000));
-+			      msecs_to_jiffies(i915_pc8_timeout));
- }
- 
- static void __hsw_disable_package_c8(struct drm_i915_private *dev_priv)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0723-drm-i915-enable-Package-C8-by-default.patch b/patches.baytrail/0723-drm-i915-enable-Package-C8-by-default.patch
deleted file mode 100644
index b23a169d42142..0000000000000
--- a/patches.baytrail/0723-drm-i915-enable-Package-C8-by-default.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 903952164d72be4d06d2184fe2596aa4dcc25122 Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Mon, 19 Aug 2013 13:18:12 -0300
-Subject: drm/i915: enable Package C8+ by default
-
-This should be working, so enable it by default. Also easy to revert.
-
-v2: Rebase, s/allow/enable/.
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit e27e9708c45879f16fb824a2da94cd65e150a0c8)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
-index ad28a72cf373..735dd5625e9e 100644
---- a/drivers/gpu/drm/i915/i915_drv.c
-+++ b/drivers/gpu/drm/i915/i915_drv.c
-@@ -141,9 +141,9 @@ module_param_named(fastboot, i915_fastboot, bool, 0600);
- MODULE_PARM_DESC(fastboot, "Try to skip unnecessary mode sets at boot time "
- 		 "(default: false)");
- 
--int i915_enable_pc8 __read_mostly = 0;
-+int i915_enable_pc8 __read_mostly = 1;
- module_param_named(enable_pc8, i915_enable_pc8, int, 0600);
--MODULE_PARM_DESC(enable_pc8, "Enable support for low power package C states (PC8+) (default: false)");
-+MODULE_PARM_DESC(enable_pc8, "Enable support for low power package C states (PC8+) (default: true)");
- 
- int i915_pc8_timeout __read_mostly = 5000;
- module_param_named(pc8_timeout, i915_pc8_timeout, int, 0600);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0724-drm-i915-Use-POSTING_READ-in-lcpll-code.patch b/patches.baytrail/0724-drm-i915-Use-POSTING_READ-in-lcpll-code.patch
deleted file mode 100644
index 88aafe79a4a2c..0000000000000
--- a/patches.baytrail/0724-drm-i915-Use-POSTING_READ-in-lcpll-code.patch
+++ /dev/null
@@ -1,46 +0,0 @@
-From c0ead2313b0c1357569b715fc6088f73a6f6d611 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Wed, 21 Aug 2013 23:38:08 +0200
-Subject: drm/i915: Use POSTING_READ in lcpll code
-
-If we don't use the return value of a mmio read our coding style is to
-use the POSTING_READ macro. This avoids cluttering the mmio traces.
-
-While at it add the missing posting read in the lcpll enable function
-that Paulo spotted.
-
-v2: Drop the _NOTRACE changes, tracing such wait_for loops in the modeset
-code might actually be rather useful!
-
-Cc: Paulo Zanoni <przanoni@gmail.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 35d8f2eb259e2d32c4bb67e9733ba0cba031f64f)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 7453d6f82631..58da4ddc3e16 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -6036,13 +6036,14 @@ void hsw_restore_lcpll(struct drm_i915_private *dev_priv)
- 	if (val & LCPLL_POWER_DOWN_ALLOW) {
- 		val &= ~LCPLL_POWER_DOWN_ALLOW;
- 		I915_WRITE(LCPLL_CTL, val);
-+		POSTING_READ(LCPLL_CTL);
- 	}
- 
- 	val = I915_READ(D_COMP);
- 	val |= D_COMP_COMP_FORCE;
- 	val &= ~D_COMP_COMP_DISABLE;
- 	I915_WRITE(D_COMP, val);
--	I915_READ(D_COMP);
-+	POSTING_READ(D_COMP);
- 
- 	val = I915_READ(LCPLL_CTL);
- 	val &= ~LCPLL_PLL_DISABLE;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0725-drm-i915-Fix-context-size-calculation-on-SNB-IVB-VLV.patch b/patches.baytrail/0725-drm-i915-Fix-context-size-calculation-on-SNB-IVB-VLV.patch
deleted file mode 100644
index 0f20181b49319..0000000000000
--- a/patches.baytrail/0725-drm-i915-Fix-context-size-calculation-on-SNB-IVB-VLV.patch
+++ /dev/null
@@ -1,78 +0,0 @@
-From c3cf69ab684bc7b0db033ec54b8e15daa29e991a Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Thu, 22 Aug 2013 19:23:13 +0300
-Subject: drm/i915: Fix context size calculation on SNB/IVB/VLV
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-All the different context sizes reported in the CXT_SIZE register
-aren't meant to be simply added together.
-
-While BSpec is somewhat unclear on the topic of the actual context
-size, empirical tests have now revealed the truth. So let's add a
-big fat comment to remind people how it all works.
-
-As a result of correctly interpreting CXT_SIZE, the IVB context
-size is reduced from three pages to two, while SNB context size
-remains at two pages.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Acked-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit e8016055335687b90e7cd5bbfa30e0c269417f34)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_reg.h | 23 +++++++++++++++--------
- 1 file changed, 15 insertions(+), 8 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
-index 711f0658c5c4..8e51ecf2a6f9 100644
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -1707,15 +1707,26 @@
-  */
- #define CCID			0x2180
- #define   CCID_EN		(1<<0)
-+/*
-+ * Notes on SNB/IVB/VLV context size:
-+ * - Power context is saved elsewhere (LLC or stolen)
-+ * - Ring/execlist context is saved on SNB, not on IVB
-+ * - Extended context size already includes render context size
-+ * - We always need to follow the extended context size.
-+ *   SNB BSpec has comments indicating that we should use the
-+ *   render context size instead if execlists are disabled, but
-+ *   based on empirical testing that's just nonsense.
-+ * - Pipelined/VF state is saved on SNB/IVB respectively
-+ * - GT1 size just indicates how much of render context
-+ *   doesn't need saving on GT1
-+ */
- #define CXT_SIZE		0x21a0
- #define GEN6_CXT_POWER_SIZE(cxt_reg)	((cxt_reg >> 24) & 0x3f)
- #define GEN6_CXT_RING_SIZE(cxt_reg)	((cxt_reg >> 18) & 0x3f)
- #define GEN6_CXT_RENDER_SIZE(cxt_reg)	((cxt_reg >> 12) & 0x3f)
- #define GEN6_CXT_EXTENDED_SIZE(cxt_reg)	((cxt_reg >> 6) & 0x3f)
- #define GEN6_CXT_PIPELINE_SIZE(cxt_reg)	((cxt_reg >> 0) & 0x3f)
--#define GEN6_CXT_TOTAL_SIZE(cxt_reg)	(GEN6_CXT_POWER_SIZE(cxt_reg) + \
--					GEN6_CXT_RING_SIZE(cxt_reg) + \
--					GEN6_CXT_RENDER_SIZE(cxt_reg) + \
-+#define GEN6_CXT_TOTAL_SIZE(cxt_reg)	(GEN6_CXT_RING_SIZE(cxt_reg) + \
- 					GEN6_CXT_EXTENDED_SIZE(cxt_reg) + \
- 					GEN6_CXT_PIPELINE_SIZE(cxt_reg))
- #define GEN7_CXT_SIZE		0x21a8
-@@ -1725,11 +1736,7 @@
- #define GEN7_CXT_EXTENDED_SIZE(ctx_reg)	((ctx_reg >> 9) & 0x7f)
- #define GEN7_CXT_GT1_SIZE(ctx_reg)	((ctx_reg >> 6) & 0x7)
- #define GEN7_CXT_VFSTATE_SIZE(ctx_reg)	((ctx_reg >> 0) & 0x3f)
--#define GEN7_CXT_TOTAL_SIZE(ctx_reg)	(GEN7_CXT_POWER_SIZE(ctx_reg) + \
--					 GEN7_CXT_RING_SIZE(ctx_reg) + \
--					 GEN7_CXT_RENDER_SIZE(ctx_reg) + \
--					 GEN7_CXT_EXTENDED_SIZE(ctx_reg) + \
--					 GEN7_CXT_GT1_SIZE(ctx_reg) + \
-+#define GEN7_CXT_TOTAL_SIZE(ctx_reg)	(GEN7_CXT_EXTENDED_SIZE(ctx_reg) + \
- 					 GEN7_CXT_VFSTATE_SIZE(ctx_reg))
- /* Haswell does have the CXT_SIZE register however it does not appear to be
-  * valid. Now, docs explain in dwords what is in the context object. The full
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0726-drm-i915-Print-seqnos-as-unsigned-in-debugfs.patch b/patches.baytrail/0726-drm-i915-Print-seqnos-as-unsigned-in-debugfs.patch
deleted file mode 100644
index 8c5171b50052e..0000000000000
--- a/patches.baytrail/0726-drm-i915-Print-seqnos-as-unsigned-in-debugfs.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From d1a73b7b43b6ac07c8a64c3c98a520a03ed9e541 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Thu, 22 Aug 2013 19:21:30 +0300
-Subject: drm/i915: Print seqnos as unsigned in debugfs
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-I don't like seeing signed seqnos. Make them unsigned.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit fb1ae911f4e58c2cf28fcd48b59f54d17283da07)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_debugfs.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
-index 39df30e7d9af..55ab9246e1b9 100644
---- a/drivers/gpu/drm/i915/i915_debugfs.c
-+++ b/drivers/gpu/drm/i915/i915_debugfs.c
-@@ -100,7 +100,7 @@ static void
- describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj)
- {
- 	struct i915_vma *vma;
--	seq_printf(m, "%pK: %s%s%s %8zdKiB %02x %02x %d %d %d%s%s%s",
-+	seq_printf(m, "%pK: %s%s%s %8zdKiB %02x %02x %u %u %u%s%s%s",
- 		   &obj->base,
- 		   get_pin_flag(obj),
- 		   get_tiling_flag(obj),
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0727-gpu-vga_switcheroo-add-driver-control-power-feature..patch b/patches.baytrail/0727-gpu-vga_switcheroo-add-driver-control-power-feature..patch
deleted file mode 100644
index ed01c7aeb6432..0000000000000
--- a/patches.baytrail/0727-gpu-vga_switcheroo-add-driver-control-power-feature..patch
+++ /dev/null
@@ -1,346 +0,0 @@
-From 8b8040b69f7c13d44347e614bc29ca404411c7e8 Mon Sep 17 00:00:00 2001
-From: Dave Airlie <airlied@dhcp-40-90.bne.redhat.com>
-Date: Mon, 10 Sep 2012 12:28:36 +1000
-Subject: gpu/vga_switcheroo: add driver control power feature. (v3)
-
-For optimus and powerxpress muxless we really want the GPU
-driver deciding when to power up/down the GPU, not userspace.
-
-This adds the ability for a driver to dynamically power up/down
-the GPU and remove the switcheroo from controlling it, the
-switcheroo reports the dynamic state to userspace also.
-
-It also adds 2 power domains, one for machine where the power
-switch is controlled outside the GPU D3 state, so the powerdown
-ordering is done correctly, and the second for the hdmi audio
-device to make sure it can resume for PCI config space accesses.
-
-v1.1: fix build with switcheroo off
-
-v2: add power domain support for radeon and v1 nvidia dsms
-v2.1: fix typo in off case
-
-v3: add audio power domain for hdmi audio + misc audio fixes
-
-v4: use PCI_SLOT macro, drop power reference on hdmi audio resume
-failure also.
-
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit 0d69704ae348c03bc216b01e32a0e9a2372be419)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_dma.c        |    2 
- drivers/gpu/drm/nouveau/nouveau_vga.c  |    2 
- drivers/gpu/drm/radeon/radeon_device.c |    2 
- drivers/gpu/vga/vga_switcheroo.c       |  147 +++++++++++++++++++++++++++++++--
- include/linux/vga_switcheroo.h         |   13 ++
- 5 files changed, 156 insertions(+), 10 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_dma.c
-+++ b/drivers/gpu/drm/i915/i915_dma.c
-@@ -1304,7 +1304,7 @@ static int i915_load_modeset_init(struct
- 
- 	intel_register_dsm_handler();
- 
--	ret = vga_switcheroo_register_client(dev->pdev, &i915_switcheroo_ops);
-+	ret = vga_switcheroo_register_client(dev->pdev, &i915_switcheroo_ops, false);
- 	if (ret)
- 		goto cleanup_vga_client;
- 
---- a/drivers/gpu/drm/nouveau/nouveau_vga.c
-+++ b/drivers/gpu/drm/nouveau/nouveau_vga.c
-@@ -79,7 +79,7 @@ nouveau_vga_init(struct nouveau_drm *drm
- {
- 	struct drm_device *dev = drm->dev;
- 	vga_client_register(dev->pdev, dev, NULL, nouveau_vga_set_decode);
--	vga_switcheroo_register_client(dev->pdev, &nouveau_switcheroo_ops);
-+	vga_switcheroo_register_client(dev->pdev, &nouveau_switcheroo_ops, false);
- }
- 
- void
---- a/drivers/gpu/drm/radeon/radeon_device.c
-+++ b/drivers/gpu/drm/radeon/radeon_device.c
-@@ -1169,7 +1169,7 @@ int radeon_device_init(struct radeon_dev
- 	/* this will fail for cards that aren't VGA class devices, just
- 	 * ignore it */
- 	vga_client_register(rdev->pdev, rdev, NULL, radeon_vga_set_decode);
--	vga_switcheroo_register_client(rdev->pdev, &radeon_switcheroo_ops);
-+	vga_switcheroo_register_client(rdev->pdev, &radeon_switcheroo_ops, false);
- 
- 	r = radeon_init(rdev);
- 	if (r)
---- a/drivers/gpu/vga/vga_switcheroo.c
-+++ b/drivers/gpu/vga/vga_switcheroo.c
-@@ -27,6 +27,7 @@
- #include <linux/pci.h>
- #include <linux/console.h>
- #include <linux/vga_switcheroo.h>
-+#include <linux/pm_runtime.h>
- 
- #include <linux/vgaarb.h>
- 
-@@ -37,6 +38,7 @@ struct vga_switcheroo_client {
- 	const struct vga_switcheroo_client_ops *ops;
- 	int id;
- 	bool active;
-+	bool driver_power_control;
- 	struct list_head list;
- };
- 
-@@ -132,7 +134,7 @@ EXPORT_SYMBOL(vga_switcheroo_unregister_
- 
- static int register_client(struct pci_dev *pdev,
- 			   const struct vga_switcheroo_client_ops *ops,
--			   int id, bool active)
-+			   int id, bool active, bool driver_power_control)
- {
- 	struct vga_switcheroo_client *client;
- 
-@@ -145,6 +147,7 @@ static int register_client(struct pci_de
- 	client->ops = ops;
- 	client->id = id;
- 	client->active = active;
-+	client->driver_power_control = driver_power_control;
- 
- 	mutex_lock(&vgasr_mutex);
- 	list_add_tail(&client->list, &vgasr_priv.clients);
-@@ -160,10 +163,11 @@ static int register_client(struct pci_de
- }
- 
- int vga_switcheroo_register_client(struct pci_dev *pdev,
--				   const struct vga_switcheroo_client_ops *ops)
-+				   const struct vga_switcheroo_client_ops *ops,
-+				   bool driver_power_control)
- {
- 	return register_client(pdev, ops, -1,
--			       pdev == vga_default_device());
-+			       pdev == vga_default_device(), driver_power_control);
- }
- EXPORT_SYMBOL(vga_switcheroo_register_client);
- 
-@@ -171,7 +175,7 @@ int vga_switcheroo_register_audio_client
- 					 const struct vga_switcheroo_client_ops *ops,
- 					 int id, bool active)
- {
--	return register_client(pdev, ops, id | ID_BIT_AUDIO, active);
-+	return register_client(pdev, ops, id | ID_BIT_AUDIO, active, false);
- }
- EXPORT_SYMBOL(vga_switcheroo_register_audio_client);
- 
-@@ -258,10 +262,11 @@ static int vga_switcheroo_show(struct se
- 	int i = 0;
- 	mutex_lock(&vgasr_mutex);
- 	list_for_each_entry(client, &vgasr_priv.clients, list) {
--		seq_printf(m, "%d:%s%s:%c:%s:%s\n", i,
-+		seq_printf(m, "%d:%s%s:%c:%s%s:%s\n", i,
- 			   client_id(client) == VGA_SWITCHEROO_DIS ? "DIS" : "IGD",
- 			   client_is_vga(client) ? "" : "-Audio",
- 			   client->active ? '+' : ' ',
-+			   client->driver_power_control ? "Dyn" : "",
- 			   client->pwr_state ? "Pwr" : "Off",
- 			   pci_name(client->pdev));
- 		i++;
-@@ -277,6 +282,8 @@ static int vga_switcheroo_debugfs_open(s
- 
- static int vga_switchon(struct vga_switcheroo_client *client)
- {
-+	if (client->driver_power_control)
-+		return 0;
- 	if (vgasr_priv.handler->power_state)
- 		vgasr_priv.handler->power_state(client->id, VGA_SWITCHEROO_ON);
- 	/* call the driver callback to turn on device */
-@@ -287,6 +294,8 @@ static int vga_switchon(struct vga_switc
- 
- static int vga_switchoff(struct vga_switcheroo_client *client)
- {
-+	if (client->driver_power_control)
-+		return 0;
- 	/* call the driver callback to turn off device */
- 	client->ops->set_gpu_state(client->pdev, VGA_SWITCHEROO_OFF);
- 	if (vgasr_priv.handler->power_state)
-@@ -402,6 +411,8 @@ vga_switcheroo_debugfs_write(struct file
- 		list_for_each_entry(client, &vgasr_priv.clients, list) {
- 			if (client->active || client_is_audio(client))
- 				continue;
-+			if (client->driver_power_control)
-+				continue;
- 			set_audio_state(client->id, VGA_SWITCHEROO_OFF);
- 			if (client->pwr_state == VGA_SWITCHEROO_ON)
- 				vga_switchoff(client);
-@@ -413,6 +424,8 @@ vga_switcheroo_debugfs_write(struct file
- 		list_for_each_entry(client, &vgasr_priv.clients, list) {
- 			if (client->active || client_is_audio(client))
- 				continue;
-+			if (client->driver_power_control)
-+				continue;
- 			if (client->pwr_state == VGA_SWITCHEROO_OFF)
- 				vga_switchon(client);
- 			set_audio_state(client->id, VGA_SWITCHEROO_ON);
-@@ -565,3 +578,127 @@ err:
- 	return err;
- }
- EXPORT_SYMBOL(vga_switcheroo_process_delayed_switch);
-+
-+static void vga_switcheroo_power_switch(struct pci_dev *pdev, enum vga_switcheroo_state state)
-+{
-+	struct vga_switcheroo_client *client;
-+
-+	if (!vgasr_priv.handler->power_state)
-+		return;
-+
-+	client = find_client_from_pci(&vgasr_priv.clients, pdev);
-+	if (!client)
-+		return;
-+
-+	if (!client->driver_power_control)
-+		return;
-+
-+	vgasr_priv.handler->power_state(client->id, state);
-+}
-+
-+/* force a PCI device to a certain state - mainly to turn off audio clients */
-+
-+void vga_switcheroo_set_dynamic_switch(struct pci_dev *pdev, enum vga_switcheroo_state dynamic)
-+{
-+	struct vga_switcheroo_client *client;
-+
-+	client = find_client_from_pci(&vgasr_priv.clients, pdev);
-+	if (!client)
-+		return;
-+
-+	if (!client->driver_power_control)
-+		return;
-+
-+	client->pwr_state = dynamic;
-+	set_audio_state(client->id, dynamic);
-+}
-+EXPORT_SYMBOL(vga_switcheroo_set_dynamic_switch);
-+
-+/* switcheroo power domain */
-+static int vga_switcheroo_runtime_suspend(struct device *dev)
-+{
-+	struct pci_dev *pdev = to_pci_dev(dev);
-+	int ret;
-+
-+	ret = dev->bus->pm->runtime_suspend(dev);
-+	if (ret)
-+		return ret;
-+
-+	vga_switcheroo_power_switch(pdev, VGA_SWITCHEROO_OFF);
-+	return 0;
-+}
-+
-+static int vga_switcheroo_runtime_resume(struct device *dev)
-+{
-+	struct pci_dev *pdev = to_pci_dev(dev);
-+	int ret;
-+
-+	vga_switcheroo_power_switch(pdev, VGA_SWITCHEROO_ON);
-+	ret = dev->bus->pm->runtime_resume(dev);
-+	if (ret)
-+		return ret;
-+
-+	return 0;
-+}
-+
-+/* this version is for the case where the power switch is separate
-+   to the device being powered down. */
-+int vga_switcheroo_init_domain_pm_ops(struct device *dev, struct dev_pm_domain *domain)
-+{
-+	/* copy over all the bus versions */
-+	if (dev->bus && dev->bus->pm) {
-+		domain->ops = *dev->bus->pm;
-+		domain->ops.runtime_suspend = vga_switcheroo_runtime_suspend;
-+		domain->ops.runtime_resume = vga_switcheroo_runtime_resume;
-+
-+		dev->pm_domain = domain;
-+		return 0;
-+	}
-+	dev->pm_domain = NULL;
-+	return -EINVAL;
-+}
-+EXPORT_SYMBOL(vga_switcheroo_init_domain_pm_ops);
-+
-+static int vga_switcheroo_runtime_resume_hdmi_audio(struct device *dev)
-+{
-+	struct pci_dev *pdev = to_pci_dev(dev);
-+	int ret;
-+	struct vga_switcheroo_client *client, *found = NULL;
-+
-+	/* we need to check if we have to switch back on the video
-+	   device so the audio device can come back */
-+	list_for_each_entry(client, &vgasr_priv.clients, list) {
-+		if (PCI_SLOT(client->pdev->devfn) == PCI_SLOT(pdev->devfn) && client_is_vga(client)) {
-+			found = client;
-+			ret = pm_runtime_get_sync(&client->pdev->dev);
-+			if (ret) {
-+				if (ret != 1)
-+					return ret;
-+			}
-+			break;
-+		}
-+	}
-+	ret = dev->bus->pm->runtime_resume(dev);
-+
-+	/* put the reference for the gpu */
-+	if (found) {
-+		pm_runtime_mark_last_busy(&found->pdev->dev);
-+		pm_runtime_put_autosuspend(&found->pdev->dev);
-+	}
-+	return ret;
-+}
-+
-+int vga_switcheroo_init_domain_pm_optimus_hdmi_audio(struct device *dev, struct dev_pm_domain *domain)
-+{
-+	/* copy over all the bus versions */
-+	if (dev->bus && dev->bus->pm) {
-+		domain->ops = *dev->bus->pm;
-+		domain->ops.runtime_resume = vga_switcheroo_runtime_resume_hdmi_audio;
-+
-+		dev->pm_domain = domain;
-+		return 0;
-+	}
-+	dev->pm_domain = NULL;
-+	return -EINVAL;
-+}
-+EXPORT_SYMBOL(vga_switcheroo_init_domain_pm_optimus_hdmi_audio);
---- a/include/linux/vga_switcheroo.h
-+++ b/include/linux/vga_switcheroo.h
-@@ -45,7 +45,8 @@ struct vga_switcheroo_client_ops {
- #if defined(CONFIG_VGA_SWITCHEROO)
- void vga_switcheroo_unregister_client(struct pci_dev *dev);
- int vga_switcheroo_register_client(struct pci_dev *dev,
--				   const struct vga_switcheroo_client_ops *ops);
-+				   const struct vga_switcheroo_client_ops *ops,
-+				   bool driver_power_control);
- int vga_switcheroo_register_audio_client(struct pci_dev *pdev,
- 					 const struct vga_switcheroo_client_ops *ops,
- 					 int id, bool active);
-@@ -60,11 +61,15 @@ int vga_switcheroo_process_delayed_switc
- 
- int vga_switcheroo_get_client_state(struct pci_dev *dev);
- 
-+void vga_switcheroo_set_dynamic_switch(struct pci_dev *pdev, enum vga_switcheroo_state dynamic);
-+
-+int vga_switcheroo_init_domain_pm_ops(struct device *dev, struct dev_pm_domain *domain);
-+int vga_switcheroo_init_domain_pm_optimus_hdmi_audio(struct device *dev, struct dev_pm_domain *domain);
- #else
- 
- static inline void vga_switcheroo_unregister_client(struct pci_dev *dev) {}
- static inline int vga_switcheroo_register_client(struct pci_dev *dev,
--		const struct vga_switcheroo_client_ops *ops) { return 0; }
-+		const struct vga_switcheroo_client_ops *ops, bool driver_power_control) { return 0; }
- static inline void vga_switcheroo_client_fb_set(struct pci_dev *dev, struct fb_info *info) {}
- static inline int vga_switcheroo_register_handler(struct vga_switcheroo_handler *handler) { return 0; }
- static inline int vga_switcheroo_register_audio_client(struct pci_dev *pdev,
-@@ -74,6 +79,10 @@ static inline void vga_switcheroo_unregi
- static inline int vga_switcheroo_process_delayed_switch(void) { return 0; }
- static inline int vga_switcheroo_get_client_state(struct pci_dev *dev) { return VGA_SWITCHEROO_ON; }
- 
-+static inline void vga_switcheroo_set_dynamic_switch(struct pci_dev *pdev, enum vga_switcheroo_state dynamic) {}
-+
-+static inline int vga_switcheroo_init_domain_pm_ops(struct device *dev, struct dev_pm_domain *domain) { return -EINVAL; }
-+static inline int vga_switcheroo_init_domain_pm_optimus_hdmi_audio(struct device *dev, struct dev_pm_domain *domain) { return -EINVAL; }
- 
- #endif
- #endif /* _LINUX_VGA_SWITCHEROO_H_ */
diff --git a/patches.baytrail/0728-drm-edid-Add-both-60Hz-and-59.94Hz-CEA-modes-to-conn.patch b/patches.baytrail/0728-drm-edid-Add-both-60Hz-and-59.94Hz-CEA-modes-to-conn.patch
deleted file mode 100644
index 6c7dd4d93a960..0000000000000
--- a/patches.baytrail/0728-drm-edid-Add-both-60Hz-and-59.94Hz-CEA-modes-to-conn.patch
+++ /dev/null
@@ -1,166 +0,0 @@
-From 37b6d52b6a180c5434345df1d3bfb7d83a44e652 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Fri, 31 May 2013 15:23:41 +0300
-Subject: drm/edid: Add both 60Hz and 59.94Hz CEA modes to connector's mode
- list
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Having both modes can be beneficial for video playback cases. If you can
-match the video framerate exactly, and the audio and video clocks come
-from the same source, you should be able to avoid dropped/repeated
-frames without expensive operations such as resampling the audio to
-match video output rate.
-
-Rather than add both variants based on the CEA extension short video
-descriptors in do_cea_modes(), add only one variant there. Once all
-the EDID has been fully probed, do a loop over the entire probed mode
-list, during which we add the other variants for all modes that match
-CEA modes. This allows us to match modes that didn't come via the CEA
-short video descriptors. For example one Samsung TV here doesn't have
-the 640x480-60 mode as a SVD, but instead it's specified via a detailed
-timing descriptor.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit e6e792092e816bea0797995c886fb057c91d4546)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_edid.c |  102 ++++++++++++++++++++++++++++++++++++++-------
- 1 file changed, 88 insertions(+), 14 deletions(-)
-
---- a/drivers/gpu/drm/drm_edid.c
-+++ b/drivers/gpu/drm/drm_edid.c
-@@ -2358,6 +2358,31 @@ u8 *drm_find_cea_extension(struct edid *
- }
- EXPORT_SYMBOL(drm_find_cea_extension);
- 
-+/*
-+ * Calculate the alternate clock for the CEA mode
-+ * (60Hz vs. 59.94Hz etc.)
-+ */
-+static unsigned int
-+cea_mode_alternate_clock(const struct drm_display_mode *cea_mode)
-+{
-+	unsigned int clock = cea_mode->clock;
-+
-+	if (cea_mode->vrefresh % 6 != 0)
-+		return clock;
-+
-+	/*
-+	 * edid_cea_modes contains the 59.94Hz
-+	 * variant for 240 and 480 line modes,
-+	 * and the 60Hz variant otherwise.
-+	 */
-+	if (cea_mode->vdisplay == 240 || cea_mode->vdisplay == 480)
-+		clock = clock * 1001 / 1000;
-+	else
-+		clock = DIV_ROUND_UP(clock * 1000, 1001);
-+
-+	return clock;
-+}
-+
- /**
-  * drm_match_cea_mode - look for a CEA mode matching given mode
-  * @to_match: display mode
-@@ -2376,21 +2401,9 @@ u8 drm_match_cea_mode(const struct drm_d
- 		const struct drm_display_mode *cea_mode = &edid_cea_modes[mode];
- 		unsigned int clock1, clock2;
- 
--		clock1 = clock2 = cea_mode->clock;
--
- 		/* Check both 60Hz and 59.94Hz */
--		if (cea_mode->vrefresh % 6 == 0) {
--			/*
--			 * edid_cea_modes contains the 59.94Hz
--			 * variant for 240 and 480 line modes,
--			 * and the 60Hz variant otherwise.
--			 */
--			if (cea_mode->vdisplay == 240 ||
--			    cea_mode->vdisplay == 480)
--				clock1 = clock1 * 1001 / 1000;
--			else
--				clock2 = DIV_ROUND_UP(clock2 * 1000, 1001);
--		}
-+		clock1 = cea_mode->clock;
-+		clock2 = cea_mode_alternate_clock(cea_mode);
- 
- 		if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) ||
- 		     KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) &&
-@@ -2401,6 +2414,66 @@ u8 drm_match_cea_mode(const struct drm_d
- }
- EXPORT_SYMBOL(drm_match_cea_mode);
- 
-+static int
-+add_alternate_cea_modes(struct drm_connector *connector, struct edid *edid)
-+{
-+	struct drm_device *dev = connector->dev;
-+	struct drm_display_mode *mode, *tmp;
-+	LIST_HEAD(list);
-+	int modes = 0;
-+
-+	/* Don't add CEA modes if the CEA extension block is missing */
-+	if (!drm_find_cea_extension(edid))
-+		return 0;
-+
-+	/*
-+	 * Go through all probed modes and create a new mode
-+	 * with the alternate clock for certain CEA modes.
-+	 */
-+	list_for_each_entry(mode, &connector->probed_modes, head) {
-+		const struct drm_display_mode *cea_mode;
-+		struct drm_display_mode *newmode;
-+		u8 cea_mode_idx = drm_match_cea_mode(mode) - 1;
-+		unsigned int clock1, clock2;
-+
-+		if (cea_mode_idx >= ARRAY_SIZE(edid_cea_modes))
-+			continue;
-+
-+		cea_mode = &edid_cea_modes[cea_mode_idx];
-+
-+		clock1 = cea_mode->clock;
-+		clock2 = cea_mode_alternate_clock(cea_mode);
-+
-+		if (clock1 == clock2)
-+			continue;
-+
-+		if (mode->clock != clock1 && mode->clock != clock2)
-+			continue;
-+
-+		newmode = drm_mode_duplicate(dev, cea_mode);
-+		if (!newmode)
-+			continue;
-+
-+		/*
-+		 * The current mode could be either variant. Make
-+		 * sure to pick the "other" clock for the new mode.
-+		 */
-+		if (mode->clock != clock1)
-+			newmode->clock = clock1;
-+		else
-+			newmode->clock = clock2;
-+
-+		list_add_tail(&newmode->head, &list);
-+	}
-+
-+	list_for_each_entry_safe(mode, tmp, &list, head) {
-+		list_del(&mode->head);
-+		drm_mode_probed_add(connector, mode);
-+		modes++;
-+	}
-+
-+	return modes;
-+}
- 
- static int
- do_cea_modes(struct drm_connector *connector, const u8 *db, u8 len)
-@@ -3049,6 +3122,7 @@ int drm_add_edid_modes(struct drm_connec
- 	if (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF)
- 		num_modes += add_inferred_modes(connector, edid);
- 	num_modes += add_cea_modes(connector, edid);
-+	num_modes += add_alternate_cea_modes(connector, edid);
- 
- 	if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75))
- 		edid_fixup_preferred(connector, quirks);
diff --git a/patches.baytrail/0729-drm-Add-support-for-alternate-clocks-of-4k-modes.patch b/patches.baytrail/0729-drm-Add-support-for-alternate-clocks-of-4k-modes.patch
deleted file mode 100644
index 239fa2b20fd3a..0000000000000
--- a/patches.baytrail/0729-drm-Add-support-for-alternate-clocks-of-4k-modes.patch
+++ /dev/null
@@ -1,112 +0,0 @@
-From e2715a7aafa472744a6162f5fe7dbcfbca549d66 Mon Sep 17 00:00:00 2001
-From: "Lespiau, Damien" <damien.lespiau@intel.com>
-Date: Mon, 19 Aug 2013 16:58:55 +0100
-Subject: drm: Add support for alternate clocks of 4k modes
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-v2: Fix hmdi typo (Simon Farnsworth, Ville Syrjälä)
-
-Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Simon Farnsworth <simon.farnsworth@onelan.co.uk>
-Reviewed-by: Thierry Reding <treding@nvidia.com>
-Signed-off-by: Dave Airlie <airlied@gmail.com>
-(cherry picked from commit 3f2f653378112c1453c0d83c81746a9225e4bc75)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_edid.c |   68 +++++++++++++++++++++++++++++++++++++++++----
- 1 file changed, 62 insertions(+), 6 deletions(-)
-
---- a/drivers/gpu/drm/drm_edid.c
-+++ b/drivers/gpu/drm/drm_edid.c
-@@ -2414,6 +2414,54 @@ u8 drm_match_cea_mode(const struct drm_d
- }
- EXPORT_SYMBOL(drm_match_cea_mode);
- 
-+/*
-+ * Calculate the alternate clock for HDMI modes (those from the HDMI vendor
-+ * specific block).
-+ *
-+ * It's almost like cea_mode_alternate_clock(), we just need to add an
-+ * exception for the VIC 4 mode (4096x2160@24Hz): no alternate clock for this
-+ * one.
-+ */
-+static unsigned int
-+hdmi_mode_alternate_clock(const struct drm_display_mode *hdmi_mode)
-+{
-+	if (hdmi_mode->vdisplay == 4096 && hdmi_mode->hdisplay == 2160)
-+		return hdmi_mode->clock;
-+
-+	return cea_mode_alternate_clock(hdmi_mode);
-+}
-+
-+/*
-+ * drm_match_hdmi_mode - look for a HDMI mode matching given mode
-+ * @to_match: display mode
-+ *
-+ * An HDMI mode is one defined in the HDMI vendor specific block.
-+ *
-+ * Returns the HDMI Video ID (VIC) of the mode or 0 if it isn't one.
-+ */
-+static u8 drm_match_hdmi_mode(const struct drm_display_mode *to_match)
-+{
-+	u8 mode;
-+
-+	if (!to_match->clock)
-+		return 0;
-+
-+	for (mode = 0; mode < ARRAY_SIZE(edid_4k_modes); mode++) {
-+		const struct drm_display_mode *hdmi_mode = &edid_4k_modes[mode];
-+		unsigned int clock1, clock2;
-+
-+		/* Make sure to also match alternate clocks */
-+		clock1 = hdmi_mode->clock;
-+		clock2 = hdmi_mode_alternate_clock(hdmi_mode);
-+
-+		if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) ||
-+		     KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) &&
-+		    drm_mode_equal_no_clocks(to_match, hdmi_mode))
-+			return mode + 1;
-+	}
-+	return 0;
-+}
-+
- static int
- add_alternate_cea_modes(struct drm_connector *connector, struct edid *edid)
- {
-@@ -2431,18 +2479,26 @@ add_alternate_cea_modes(struct drm_conne
- 	 * with the alternate clock for certain CEA modes.
- 	 */
- 	list_for_each_entry(mode, &connector->probed_modes, head) {
--		const struct drm_display_mode *cea_mode;
-+		const struct drm_display_mode *cea_mode = NULL;
- 		struct drm_display_mode *newmode;
--		u8 cea_mode_idx = drm_match_cea_mode(mode) - 1;
-+		u8 mode_idx = drm_match_cea_mode(mode) - 1;
- 		unsigned int clock1, clock2;
- 
--		if (cea_mode_idx >= ARRAY_SIZE(edid_cea_modes))
--			continue;
-+		if (mode_idx < ARRAY_SIZE(edid_cea_modes)) {
-+			cea_mode = &edid_cea_modes[mode_idx];
-+			clock2 = cea_mode_alternate_clock(cea_mode);
-+		} else {
-+			mode_idx = drm_match_hdmi_mode(mode) - 1;
-+			if (mode_idx < ARRAY_SIZE(edid_4k_modes)) {
-+				cea_mode = &edid_4k_modes[mode_idx];
-+				clock2 = hdmi_mode_alternate_clock(cea_mode);
-+			}
-+		}
- 
--		cea_mode = &edid_cea_modes[cea_mode_idx];
-+		if (!cea_mode)
-+			continue;
- 
- 		clock1 = cea_mode->clock;
--		clock2 = cea_mode_alternate_clock(cea_mode);
- 
- 		if (clock1 == clock2)
- 			continue;
diff --git a/patches.baytrail/0730-drm-Make-drm_match_cea_mode-return-the-underlying-2D.patch b/patches.baytrail/0730-drm-Make-drm_match_cea_mode-return-the-underlying-2D.patch
deleted file mode 100644
index 817d1bacb1e17..0000000000000
--- a/patches.baytrail/0730-drm-Make-drm_match_cea_mode-return-the-underlying-2D.patch
+++ /dev/null
@@ -1,110 +0,0 @@
-From c0910899d5419b491aa0cefd7504777042eeef19 Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Wed, 25 Sep 2013 16:45:27 +0100
-Subject: drm: Make drm_match_cea_mode() return the underlying 2D VIC for 3d
- modes
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-When scanning out a stereo mode, the AVI infoframe vic field has to be
-the underlyng 2D VIC. Before that commit, we weren't matching the CEA
-mode because of the extra stereo flag and then were setting the VIC
-field in the AVI infoframe to 0.
-
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Acked-by: Dave Airlie <airlied@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit f2ecf2e3bc01868f244fc6ba9cf8fe5d8446db5b)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_edid.c  |    4 ++--
- drivers/gpu/drm/drm_modes.c |   18 ++++++++++++------
- include/drm/drm_crtc.h      |    2 +-
- 3 files changed, 15 insertions(+), 9 deletions(-)
-
---- a/drivers/gpu/drm/drm_edid.c
-+++ b/drivers/gpu/drm/drm_edid.c
-@@ -2407,7 +2407,7 @@ u8 drm_match_cea_mode(const struct drm_d
- 
- 		if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) ||
- 		     KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) &&
--		    drm_mode_equal_no_clocks(to_match, cea_mode))
-+		    drm_mode_equal_no_clocks_no_stereo(to_match, cea_mode))
- 			return mode + 1;
- 	}
- 	return 0;
-@@ -2456,7 +2456,7 @@ static u8 drm_match_hdmi_mode(const stru
- 
- 		if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) ||
- 		     KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) &&
--		    drm_mode_equal_no_clocks(to_match, hdmi_mode))
-+		    drm_mode_equal_no_clocks_no_stereo(to_match, hdmi_mode))
- 			return mode + 1;
- 	}
- 	return 0;
---- a/drivers/gpu/drm/drm_modes.c
-+++ b/drivers/gpu/drm/drm_modes.c
-@@ -848,12 +848,16 @@ bool drm_mode_equal(const struct drm_dis
- 	} else if (mode1->clock != mode2->clock)
- 		return false;
- 
--	return drm_mode_equal_no_clocks(mode1, mode2);
-+	if ((mode1->flags & DRM_MODE_FLAG_3D_MASK) !=
-+	    (mode2->flags & DRM_MODE_FLAG_3D_MASK))
-+		return false;
-+
-+	return drm_mode_equal_no_clocks_no_stereo(mode1, mode2);
- }
- EXPORT_SYMBOL(drm_mode_equal);
- 
- /**
-- * drm_mode_equal_no_clocks - test modes for equality
-+ * drm_mode_equal_no_clocks_no_stereo - test modes for equality
-  * @mode1: first mode
-  * @mode2: second mode
-  *
-@@ -861,12 +865,13 @@ EXPORT_SYMBOL(drm_mode_equal);
-  * None.
-  *
-  * Check to see if @mode1 and @mode2 are equivalent, but
-- * don't check the pixel clocks.
-+ * don't check the pixel clocks nor the stereo layout.
-  *
-  * RETURNS:
-  * True if the modes are equal, false otherwise.
-  */
--bool drm_mode_equal_no_clocks(const struct drm_display_mode *mode1, const struct drm_display_mode *mode2)
-+bool drm_mode_equal_no_clocks_no_stereo(const struct drm_display_mode *mode1,
-+					const struct drm_display_mode *mode2)
- {
- 	if (mode1->hdisplay == mode2->hdisplay &&
- 	    mode1->hsync_start == mode2->hsync_start &&
-@@ -878,12 +883,13 @@ bool drm_mode_equal_no_clocks(const stru
- 	    mode1->vsync_end == mode2->vsync_end &&
- 	    mode1->vtotal == mode2->vtotal &&
- 	    mode1->vscan == mode2->vscan &&
--	    mode1->flags == mode2->flags)
-+	    (mode1->flags & ~DRM_MODE_FLAG_3D_MASK) ==
-+	     (mode2->flags & ~DRM_MODE_FLAG_3D_MASK))
- 		return true;
- 
- 	return false;
- }
--EXPORT_SYMBOL(drm_mode_equal_no_clocks);
-+EXPORT_SYMBOL(drm_mode_equal_no_clocks_no_stereo);
- 
- /**
-  * drm_mode_validate_size - make sure modes adhere to size constraints
---- a/include/drm/drm_crtc.h
-+++ b/include/drm/drm_crtc.h
-@@ -920,7 +920,7 @@ extern void drm_mode_config_reset(struct
- extern void drm_mode_config_cleanup(struct drm_device *dev);
- extern void drm_mode_set_name(struct drm_display_mode *mode);
- extern bool drm_mode_equal(const struct drm_display_mode *mode1, const struct drm_display_mode *mode2);
--extern bool drm_mode_equal_no_clocks(const struct drm_display_mode *mode1, const struct drm_display_mode *mode2);
-+extern bool drm_mode_equal_no_clocks_no_stereo(const struct drm_display_mode *mode1, const struct drm_display_mode *mode2);
- extern int drm_mode_width(const struct drm_display_mode *mode);
- extern int drm_mode_height(const struct drm_display_mode *mode);
- 
diff --git a/patches.baytrail/0731-drm-Add-a-helper-to-forge-HDMI-vendor-infoframes.patch b/patches.baytrail/0731-drm-Add-a-helper-to-forge-HDMI-vendor-infoframes.patch
deleted file mode 100644
index 9b48b1a1d9dfd..0000000000000
--- a/patches.baytrail/0731-drm-Add-a-helper-to-forge-HDMI-vendor-infoframes.patch
+++ /dev/null
@@ -1,86 +0,0 @@
-From 72c90e7927c6dd7b5b95f32ab1b496d2392b5bf7 Mon Sep 17 00:00:00 2001
-From: "Lespiau, Damien" <damien.lespiau@intel.com>
-Date: Mon, 19 Aug 2013 16:59:03 +0100
-Subject: drm: Add a helper to forge HDMI vendor infoframes
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-This can then be used by DRM drivers to setup their vendor infoframes.
-
-v2: Fix hmdi typo (Simon Farnsworth)
-v3: Adapt to the hdmi_vendor_infoframe rename
-
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Reviewed-by: Simon Farnsworth <simon.farnsworth@onelan.co.uk>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Thierry Reding <treding@nvidia.com>
-Signed-off-by: Dave Airlie <airlied@gmail.com>
-(cherry picked from commit 83dd000865eaaeb0799bf5e6d12f8d8cdb740e91)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_edid.c |   36 ++++++++++++++++++++++++++++++++++++
- include/drm/drm_edid.h     |    4 ++++
- 2 files changed, 40 insertions(+)
-
---- a/drivers/gpu/drm/drm_edid.c
-+++ b/drivers/gpu/drm/drm_edid.c
-@@ -3274,3 +3274,39 @@ drm_hdmi_avi_infoframe_from_display_mode
- 	return 0;
- }
- EXPORT_SYMBOL(drm_hdmi_avi_infoframe_from_display_mode);
-+
-+/**
-+ * drm_hdmi_vendor_infoframe_from_display_mode() - fill an HDMI infoframe with
-+ * data from a DRM display mode
-+ * @frame: HDMI vendor infoframe
-+ * @mode: DRM display mode
-+ *
-+ * Note that there's is a need to send HDMI vendor infoframes only when using a
-+ * 4k or stereoscopic 3D mode. So when giving any other mode as input this
-+ * function will return -EINVAL, error that can be safely ignored.
-+ *
-+ * Returns 0 on success or a negative error code on failure.
-+ */
-+int
-+drm_hdmi_vendor_infoframe_from_display_mode(struct hdmi_vendor_infoframe *frame,
-+					    const struct drm_display_mode *mode)
-+{
-+	int err;
-+	u8 vic;
-+
-+	if (!frame || !mode)
-+		return -EINVAL;
-+
-+	vic = drm_match_hdmi_mode(mode);
-+	if (!vic)
-+		return -EINVAL;
-+
-+	err = hdmi_vendor_infoframe_init(frame);
-+	if (err < 0)
-+		return err;
-+
-+	frame->vic = vic;
-+
-+	return 0;
-+}
-+EXPORT_SYMBOL(drm_hdmi_vendor_infoframe_from_display_mode);
---- a/include/drm/drm_edid.h
-+++ b/include/drm/drm_edid.h
-@@ -256,6 +256,7 @@ struct drm_encoder;
- struct drm_connector;
- struct drm_display_mode;
- struct hdmi_avi_infoframe;
-+struct hdmi_vendor_infoframe;
- 
- void drm_edid_to_eld(struct drm_connector *connector, struct edid *edid);
- int drm_edid_to_sad(struct edid *edid, struct cea_sad **sads);
-@@ -268,5 +269,8 @@ int drm_load_edid_firmware(struct drm_co
- int
- drm_hdmi_avi_infoframe_from_display_mode(struct hdmi_avi_infoframe *frame,
- 					 const struct drm_display_mode *mode);
-+int
-+drm_hdmi_vendor_infoframe_from_display_mode(struct hdmi_vendor_infoframe *frame,
-+					    const struct drm_display_mode *mode);
- 
- #endif /* __DRM_EDID_H__ */
diff --git a/patches.baytrail/0732-drm-Add-HDMI-stereo-3D-flags-to-struct-drm_mode_mode.patch b/patches.baytrail/0732-drm-Add-HDMI-stereo-3D-flags-to-struct-drm_mode_mode.patch
deleted file mode 100644
index fbb5d7d8e10e6..0000000000000
--- a/patches.baytrail/0732-drm-Add-HDMI-stereo-3D-flags-to-struct-drm_mode_mode.patch
+++ /dev/null
@@ -1,101 +0,0 @@
-From e50c807fd4bc10bb9aa712884d618eb7e04832fb Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Wed, 25 Sep 2013 16:45:21 +0100
-Subject: drm: Add HDMI stereo 3D flags to struct drm_mode_modeinfo
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-HDMI 1.4a defines a few layouts that we'd like to expose. This commits
-add new modeinfo flags that can be used to list the supported stereo
-layouts (when querying the list of modes) and to set a given stereo 3D
-mode (when setting a mode).
-
-v2: Add a drm_mode_is_stereo() helper
-
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Acked-by: Dave Airlie <airlied@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 4aa17cf0d889cfc984b68a78ae02070cef21bb6b)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- include/drm/drm_crtc.h      | 14 ++++++++++++++
- include/uapi/drm/drm_mode.h | 36 ++++++++++++++++++++++--------------
- 2 files changed, 36 insertions(+), 14 deletions(-)
-
-diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h
-index c2f130e584c3..f96e7ff0035b 100644
---- a/include/drm/drm_crtc.h
-+++ b/include/drm/drm_crtc.h
-@@ -179,6 +179,20 @@ struct drm_display_mode {
- 	int hsync;		/* in kHz */
- };
- 
-+#define DRM_MODE_FLAG_3D_MASK	(DRM_MODE_FLAG_3D_FRAME_PACKING		| \
-+				 DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE	| \
-+				 DRM_MODE_FLAG_3D_LINE_ALTERNATIVE	| \
-+				 DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL	| \
-+				 DRM_MODE_FLAG_3D_L_DEPTH		| \
-+				 DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH | \
-+				 DRM_MODE_FLAG_3D_TOP_AND_BOTTOM	| \
-+				 DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF)
-+
-+static inline bool drm_mode_is_stereo(const struct drm_display_mode *mode)
-+{
-+	return mode->flags & DRM_MODE_FLAG_3D_MASK;
-+}
-+
- enum drm_connector_status {
- 	connector_status_connected = 1,
- 	connector_status_disconnected = 2,
-diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h
-index cc2e00eac2f1..acc75bac67f1 100644
---- a/include/uapi/drm/drm_mode.h
-+++ b/include/uapi/drm/drm_mode.h
-@@ -44,20 +44,28 @@
- 
- /* Video mode flags */
- /* bit compatible with the xorg definitions. */
--#define DRM_MODE_FLAG_PHSYNC	(1<<0)
--#define DRM_MODE_FLAG_NHSYNC	(1<<1)
--#define DRM_MODE_FLAG_PVSYNC	(1<<2)
--#define DRM_MODE_FLAG_NVSYNC	(1<<3)
--#define DRM_MODE_FLAG_INTERLACE	(1<<4)
--#define DRM_MODE_FLAG_DBLSCAN	(1<<5)
--#define DRM_MODE_FLAG_CSYNC	(1<<6)
--#define DRM_MODE_FLAG_PCSYNC	(1<<7)
--#define DRM_MODE_FLAG_NCSYNC	(1<<8)
--#define DRM_MODE_FLAG_HSKEW	(1<<9) /* hskew provided */
--#define DRM_MODE_FLAG_BCAST	(1<<10)
--#define DRM_MODE_FLAG_PIXMUX	(1<<11)
--#define DRM_MODE_FLAG_DBLCLK	(1<<12)
--#define DRM_MODE_FLAG_CLKDIV2	(1<<13)
-+#define DRM_MODE_FLAG_PHSYNC			(1<<0)
-+#define DRM_MODE_FLAG_NHSYNC			(1<<1)
-+#define DRM_MODE_FLAG_PVSYNC			(1<<2)
-+#define DRM_MODE_FLAG_NVSYNC			(1<<3)
-+#define DRM_MODE_FLAG_INTERLACE			(1<<4)
-+#define DRM_MODE_FLAG_DBLSCAN			(1<<5)
-+#define DRM_MODE_FLAG_CSYNC			(1<<6)
-+#define DRM_MODE_FLAG_PCSYNC			(1<<7)
-+#define DRM_MODE_FLAG_NCSYNC			(1<<8)
-+#define DRM_MODE_FLAG_HSKEW			(1<<9) /* hskew provided */
-+#define DRM_MODE_FLAG_BCAST			(1<<10)
-+#define DRM_MODE_FLAG_PIXMUX			(1<<11)
-+#define DRM_MODE_FLAG_DBLCLK			(1<<12)
-+#define DRM_MODE_FLAG_CLKDIV2			(1<<13)
-+#define DRM_MODE_FLAG_3D_FRAME_PACKING		(1<<14)
-+#define DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE	(1<<15)
-+#define DRM_MODE_FLAG_3D_LINE_ALTERNATIVE	(1<<16)
-+#define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL	(1<<17)
-+#define DRM_MODE_FLAG_3D_L_DEPTH		(1<<18)
-+#define DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH	(1<<19)
-+#define DRM_MODE_FLAG_3D_TOP_AND_BOTTOM		(1<<20)
-+#define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF	(1<<21)
- 
- /* DPMS flags */
- /* bit compatible with the xorg definitions. */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0733-drm-edid-Expose-mandatory-stereo-modes-for-HDMI-sink.patch b/patches.baytrail/0733-drm-edid-Expose-mandatory-stereo-modes-for-HDMI-sink.patch
deleted file mode 100644
index 8fe0d0f00cdc1..0000000000000
--- a/patches.baytrail/0733-drm-edid-Expose-mandatory-stereo-modes-for-HDMI-sink.patch
+++ /dev/null
@@ -1,180 +0,0 @@
-From e1d29de699eecba1881efaa77805b0da587c189f Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Wed, 25 Sep 2013 16:45:23 +0100
-Subject: drm/edid: Expose mandatory stereo modes for HDMI sinks
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-For now, let's just look at the 3D_present flag of the CEA HDMI vendor
-block to detect if the sink supports a small list of then mandatory 3D
-formats.
-
-See the HDMI 1.4a 3D extraction for detail:
-  http://www.hdmi.org/manufacturer/specification.aspx
-
-v2: Rename freq to vrefresh, make the mandatory structure a bit more
-    compact, fix some white space issues and add a couple of const
-    (Ville Syrjälä)
-
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Acked-by: Dave Airlie <airlied@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit c858cfcae6dd3829e8708a48d009c2f676b79d4d)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_edid.c |  110 ++++++++++++++++++++++++++++++++++++++++++---
- 1 file changed, 103 insertions(+), 7 deletions(-)
-
---- a/drivers/gpu/drm/drm_edid.c
-+++ b/drivers/gpu/drm/drm_edid.c
-@@ -2556,13 +2556,95 @@ do_cea_modes(struct drm_connector *conne
- 	return modes;
- }
- 
-+struct stereo_mandatory_mode {
-+	int width, height, vrefresh;
-+	unsigned int flags;
-+};
-+
-+static const struct stereo_mandatory_mode stereo_mandatory_modes[] = {
-+	{ 1920, 1080, 24,
-+	  DRM_MODE_FLAG_3D_TOP_AND_BOTTOM | DRM_MODE_FLAG_3D_FRAME_PACKING },
-+	{ 1920, 1080, 50,
-+	  DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF },
-+	{ 1920, 1080, 60,
-+	  DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF },
-+	{ 1280, 720,  50,
-+	  DRM_MODE_FLAG_3D_TOP_AND_BOTTOM | DRM_MODE_FLAG_3D_FRAME_PACKING },
-+	{ 1280, 720,  60,
-+	  DRM_MODE_FLAG_3D_TOP_AND_BOTTOM | DRM_MODE_FLAG_3D_FRAME_PACKING }
-+};
-+
-+static bool
-+stereo_match_mandatory(const struct drm_display_mode *mode,
-+		       const struct stereo_mandatory_mode *stereo_mode)
-+{
-+	unsigned int interlaced = mode->flags & DRM_MODE_FLAG_INTERLACE;
-+
-+	return mode->hdisplay == stereo_mode->width &&
-+	       mode->vdisplay == stereo_mode->height &&
-+	       interlaced == (stereo_mode->flags & DRM_MODE_FLAG_INTERLACE) &&
-+	       drm_mode_vrefresh(mode) == stereo_mode->vrefresh;
-+}
-+
-+static const struct stereo_mandatory_mode *
-+hdmi_find_stereo_mandatory_mode(const struct drm_display_mode *mode)
-+{
-+	int i;
-+
-+	for (i = 0; i < ARRAY_SIZE(stereo_mandatory_modes); i++)
-+		if (stereo_match_mandatory(mode, &stereo_mandatory_modes[i]))
-+			return &stereo_mandatory_modes[i];
-+
-+	return NULL;
-+}
-+
-+static int add_hdmi_mandatory_stereo_modes(struct drm_connector *connector)
-+{
-+	struct drm_device *dev = connector->dev;
-+	const struct drm_display_mode *mode;
-+	struct list_head stereo_modes;
-+	int modes = 0;
-+
-+	INIT_LIST_HEAD(&stereo_modes);
-+
-+	list_for_each_entry(mode, &connector->probed_modes, head) {
-+		const struct stereo_mandatory_mode *mandatory;
-+		u32 stereo_layouts, layout;
-+
-+		mandatory = hdmi_find_stereo_mandatory_mode(mode);
-+		if (!mandatory)
-+			continue;
-+
-+		stereo_layouts = mandatory->flags & DRM_MODE_FLAG_3D_MASK;
-+		do {
-+			struct drm_display_mode *new_mode;
-+
-+			layout = 1 << (ffs(stereo_layouts) - 1);
-+			stereo_layouts &= ~layout;
-+
-+			new_mode = drm_mode_duplicate(dev, mode);
-+			if (!new_mode)
-+				continue;
-+
-+			new_mode->flags |= layout;
-+			list_add_tail(&new_mode->head, &stereo_modes);
-+			modes++;
-+		} while (stereo_layouts);
-+	}
-+
-+	list_splice_tail(&stereo_modes, &connector->probed_modes);
-+
-+	return modes;
-+}
-+
- /*
-  * do_hdmi_vsdb_modes - Parse the HDMI Vendor Specific data block
-  * @connector: connector corresponding to the HDMI sink
-  * @db: start of the CEA vendor specific block
-  * @len: length of the CEA block payload, ie. one can access up to db[len]
-  *
-- * Parses the HDMI VSDB looking for modes to add to @connector.
-+ * Parses the HDMI VSDB looking for modes to add to @connector. This function
-+ * also adds the stereo 3d modes when applicable.
-  */
- static int
- do_hdmi_vsdb_modes(struct drm_connector *connector, const u8 *db, u8 len)
-@@ -2588,10 +2670,15 @@ do_hdmi_vsdb_modes(struct drm_connector
- 
- 	/* the declared length is not long enough for the 2 first bytes
- 	 * of additional video format capabilities */
--	offset += 2;
--	if (len < (8 + offset))
-+	if (len < (8 + offset + 2))
- 		goto out;
- 
-+	/* 3D_Present */
-+	offset++;
-+	if (db[8 + offset] & (1 << 7))
-+		modes += add_hdmi_mandatory_stereo_modes(connector);
-+
-+	offset++;
- 	vic_len = db[8 + offset] >> 5;
- 
- 	for (i = 0; i < vic_len && len >= (9 + offset + i); i++) {
-@@ -2671,8 +2758,8 @@ static int
- add_cea_modes(struct drm_connector *connector, struct edid *edid)
- {
- 	const u8 *cea = drm_find_cea_extension(edid);
--	const u8 *db;
--	u8 dbl;
-+	const u8 *db, *hdmi = NULL;
-+	u8 dbl, hdmi_len;
- 	int modes = 0;
- 
- 	if (cea && cea_revision(cea) >= 3) {
-@@ -2687,11 +2774,20 @@ add_cea_modes(struct drm_connector *conn
- 
- 			if (cea_db_tag(db) == VIDEO_BLOCK)
- 				modes += do_cea_modes(connector, db + 1, dbl);
--			else if (cea_db_is_hdmi_vsdb(db))
--				modes += do_hdmi_vsdb_modes(connector, db, dbl);
-+			else if (cea_db_is_hdmi_vsdb(db)) {
-+				hdmi = db;
-+				hdmi_len = dbl;
-+			}
- 		}
- 	}
- 
-+	/*
-+	 * We parse the HDMI VSDB after having added the cea modes as we will
-+	 * be patching their flags when the sink supports stereo 3D.
-+	 */
-+	if (hdmi)
-+		modes += do_hdmi_vsdb_modes(connector, hdmi, hdmi_len);
-+
- 	return modes;
- }
- 
diff --git a/patches.baytrail/0734-drm-Extract-add_hdmi_mode-out-of-do_hdmi_vsdb_modes.patch b/patches.baytrail/0734-drm-Extract-add_hdmi_mode-out-of-do_hdmi_vsdb_modes.patch
deleted file mode 100644
index 084e801f3bc90..0000000000000
--- a/patches.baytrail/0734-drm-Extract-add_hdmi_mode-out-of-do_hdmi_vsdb_modes.patch
+++ /dev/null
@@ -1,87 +0,0 @@
-From 882c8bf1162976bec507fc41d2ad1b2a112f075c Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Wed, 25 Sep 2013 16:45:24 +0100
-Subject: drm: Extract add_hdmi_mode() out of do_hdmi_vsdb_modes()
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-So we respect a nice design of having similar functions at the same
-level, in this case:
-
-do_hdmi_vsdb_modes()
-  - add_hdmi_mandatory_stereo_modes()
-  - add_hdmi_mode()
-
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Acked-by: Dave Airlie <airlied@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 1deee8d76724b478240f1bba5affe017e4f9bfa3)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_edid.c |   36 +++++++++++++++++++++---------------
- 1 file changed, 21 insertions(+), 15 deletions(-)
-
---- a/drivers/gpu/drm/drm_edid.c
-+++ b/drivers/gpu/drm/drm_edid.c
-@@ -2637,6 +2637,26 @@ static int add_hdmi_mandatory_stereo_mod
- 	return modes;
- }
- 
-+static int add_hdmi_mode(struct drm_connector *connector, u8 vic)
-+{
-+	struct drm_device *dev = connector->dev;
-+	struct drm_display_mode *newmode;
-+
-+	vic--; /* VICs start at 1 */
-+	if (vic >= ARRAY_SIZE(edid_4k_modes)) {
-+		DRM_ERROR("Unknown HDMI VIC: %d\n", vic);
-+		return 0;
-+	}
-+
-+	newmode = drm_mode_duplicate(dev, &edid_4k_modes[vic]);
-+	if (!newmode)
-+		return 0;
-+
-+	drm_mode_probed_add(connector, newmode);
-+
-+	return 1;
-+}
-+
- /*
-  * do_hdmi_vsdb_modes - Parse the HDMI Vendor Specific data block
-  * @connector: connector corresponding to the HDMI sink
-@@ -2649,7 +2669,6 @@ static int add_hdmi_mandatory_stereo_mod
- static int
- do_hdmi_vsdb_modes(struct drm_connector *connector, const u8 *db, u8 len)
- {
--	struct drm_device *dev = connector->dev;
- 	int modes = 0, offset = 0, i;
- 	u8 vic_len;
- 
-@@ -2682,23 +2701,10 @@ do_hdmi_vsdb_modes(struct drm_connector
- 	vic_len = db[8 + offset] >> 5;
- 
- 	for (i = 0; i < vic_len && len >= (9 + offset + i); i++) {
--		struct drm_display_mode *newmode;
- 		u8 vic;
- 
- 		vic = db[9 + offset + i];
--
--		vic--; /* VICs start at 1 */
--		if (vic >= ARRAY_SIZE(edid_4k_modes)) {
--			DRM_ERROR("Unknown HDMI VIC: %d\n", vic);
--			continue;
--		}
--
--		newmode = drm_mode_duplicate(dev, &edid_4k_modes[vic]);
--		if (!newmode)
--			continue;
--
--		drm_mode_probed_add(connector, newmode);
--		modes++;
-+		modes += add_hdmi_mode(connector, vic);
- 	}
- 
- out:
diff --git a/patches.baytrail/0735-drm-Code-stereo-layouts-as-an-enum-rather-than-a-bit.patch b/patches.baytrail/0735-drm-Code-stereo-layouts-as-an-enum-rather-than-a-bit.patch
deleted file mode 100644
index 6dfde746e063e..0000000000000
--- a/patches.baytrail/0735-drm-Code-stereo-layouts-as-an-enum-rather-than-a-bit.patch
+++ /dev/null
@@ -1,164 +0,0 @@
-From 875ef39de7745758b997b8ba2dca6cb3ae9a8720 Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Fri, 27 Sep 2013 12:11:48 +0100
-Subject: drm: Code stereo layouts as an enum rather than a bit field
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-This allows us to use fewer bits in the mode structure, leaving room for
-future work while allowing more stereo layouts types than we could have
-ever dreamt of.
-
-I also exposed the previously private DRM_MODE_FLAG_3D_MASK to set in
-stone that we are using 5 bits for the stereo layout enum, reserving 32
-values.
-
-Even with that reservation, we gain 3 bits from the previous encoding.
-
-The code adding the mandatory stereo modes needeed to be adapted as it was
-relying or being able to or stereo layouts together.
-
-Suggested-by: Daniel Vetter <daniel@ffwll.ch>
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit f7e121b76469624459152542c1b809a1ebc835fe)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_edid.c  |   47 ++++++++++++++------------------------------
- include/drm/drm_crtc.h      |    9 --------
- include/uapi/drm/drm_mode.h |   19 ++++++++++-------
- 3 files changed, 26 insertions(+), 49 deletions(-)
-
---- a/drivers/gpu/drm/drm_edid.c
-+++ b/drivers/gpu/drm/drm_edid.c
-@@ -2562,16 +2562,16 @@ struct stereo_mandatory_mode {
- };
- 
- static const struct stereo_mandatory_mode stereo_mandatory_modes[] = {
--	{ 1920, 1080, 24,
--	  DRM_MODE_FLAG_3D_TOP_AND_BOTTOM | DRM_MODE_FLAG_3D_FRAME_PACKING },
-+	{ 1920, 1080, 24, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM },
-+	{ 1920, 1080, 24, DRM_MODE_FLAG_3D_FRAME_PACKING },
- 	{ 1920, 1080, 50,
- 	  DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF },
- 	{ 1920, 1080, 60,
- 	  DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF },
--	{ 1280, 720,  50,
--	  DRM_MODE_FLAG_3D_TOP_AND_BOTTOM | DRM_MODE_FLAG_3D_FRAME_PACKING },
--	{ 1280, 720,  60,
--	  DRM_MODE_FLAG_3D_TOP_AND_BOTTOM | DRM_MODE_FLAG_3D_FRAME_PACKING }
-+	{ 1280, 720,  50, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM },
-+	{ 1280, 720,  50, DRM_MODE_FLAG_3D_FRAME_PACKING },
-+	{ 1280, 720,  60, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM },
-+	{ 1280, 720,  60, DRM_MODE_FLAG_3D_FRAME_PACKING }
- };
- 
- static bool
-@@ -2586,50 +2586,33 @@ stereo_match_mandatory(const struct drm_
- 	       drm_mode_vrefresh(mode) == stereo_mode->vrefresh;
- }
- 
--static const struct stereo_mandatory_mode *
--hdmi_find_stereo_mandatory_mode(const struct drm_display_mode *mode)
--{
--	int i;
--
--	for (i = 0; i < ARRAY_SIZE(stereo_mandatory_modes); i++)
--		if (stereo_match_mandatory(mode, &stereo_mandatory_modes[i]))
--			return &stereo_mandatory_modes[i];
--
--	return NULL;
--}
--
- static int add_hdmi_mandatory_stereo_modes(struct drm_connector *connector)
- {
- 	struct drm_device *dev = connector->dev;
- 	const struct drm_display_mode *mode;
- 	struct list_head stereo_modes;
--	int modes = 0;
-+	int modes = 0, i;
- 
- 	INIT_LIST_HEAD(&stereo_modes);
- 
- 	list_for_each_entry(mode, &connector->probed_modes, head) {
--		const struct stereo_mandatory_mode *mandatory;
--		u32 stereo_layouts, layout;
--
--		mandatory = hdmi_find_stereo_mandatory_mode(mode);
--		if (!mandatory)
--			continue;
--
--		stereo_layouts = mandatory->flags & DRM_MODE_FLAG_3D_MASK;
--		do {
-+		for (i = 0; i < ARRAY_SIZE(stereo_mandatory_modes); i++) {
-+			const struct stereo_mandatory_mode *mandatory;
- 			struct drm_display_mode *new_mode;
- 
--			layout = 1 << (ffs(stereo_layouts) - 1);
--			stereo_layouts &= ~layout;
-+			if (!stereo_match_mandatory(mode,
-+						    &stereo_mandatory_modes[i]))
-+				continue;
- 
-+			mandatory = &stereo_mandatory_modes[i];
- 			new_mode = drm_mode_duplicate(dev, mode);
- 			if (!new_mode)
- 				continue;
- 
--			new_mode->flags |= layout;
-+			new_mode->flags |= mandatory->flags;
- 			list_add_tail(&new_mode->head, &stereo_modes);
- 			modes++;
--		} while (stereo_layouts);
-+		}
- 	}
- 
- 	list_splice_tail(&stereo_modes, &connector->probed_modes);
---- a/include/drm/drm_crtc.h
-+++ b/include/drm/drm_crtc.h
-@@ -179,15 +179,6 @@ struct drm_display_mode {
- 	int hsync;		/* in kHz */
- };
- 
--#define DRM_MODE_FLAG_3D_MASK	(DRM_MODE_FLAG_3D_FRAME_PACKING		| \
--				 DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE	| \
--				 DRM_MODE_FLAG_3D_LINE_ALTERNATIVE	| \
--				 DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL	| \
--				 DRM_MODE_FLAG_3D_L_DEPTH		| \
--				 DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH | \
--				 DRM_MODE_FLAG_3D_TOP_AND_BOTTOM	| \
--				 DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF)
--
- static inline bool drm_mode_is_stereo(const struct drm_display_mode *mode)
- {
- 	return mode->flags & DRM_MODE_FLAG_3D_MASK;
---- a/include/uapi/drm/drm_mode.h
-+++ b/include/uapi/drm/drm_mode.h
-@@ -58,14 +58,17 @@
- #define DRM_MODE_FLAG_PIXMUX			(1<<11)
- #define DRM_MODE_FLAG_DBLCLK			(1<<12)
- #define DRM_MODE_FLAG_CLKDIV2			(1<<13)
--#define DRM_MODE_FLAG_3D_FRAME_PACKING		(1<<14)
--#define DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE	(1<<15)
--#define DRM_MODE_FLAG_3D_LINE_ALTERNATIVE	(1<<16)
--#define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL	(1<<17)
--#define DRM_MODE_FLAG_3D_L_DEPTH		(1<<18)
--#define DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH	(1<<19)
--#define DRM_MODE_FLAG_3D_TOP_AND_BOTTOM		(1<<20)
--#define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF	(1<<21)
-+#define DRM_MODE_FLAG_3D_MASK			(0x1f<<14)
-+#define  DRM_MODE_FLAG_3D_NONE			(0<<14)
-+#define  DRM_MODE_FLAG_3D_FRAME_PACKING		(1<<14)
-+#define  DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE	(2<<14)
-+#define  DRM_MODE_FLAG_3D_LINE_ALTERNATIVE	(3<<14)
-+#define  DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL	(4<<14)
-+#define  DRM_MODE_FLAG_3D_L_DEPTH		(5<<14)
-+#define  DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH	(6<<14)
-+#define  DRM_MODE_FLAG_3D_TOP_AND_BOTTOM	(7<<14)
-+#define  DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF	(8<<14)
-+
- 
- /* DPMS flags */
- /* bit compatible with the xorg definitions. */
diff --git a/patches.baytrail/0736-drm-Set-the-relevant-infoframe-field-when-scanning-o.patch b/patches.baytrail/0736-drm-Set-the-relevant-infoframe-field-when-scanning-o.patch
deleted file mode 100644
index 81cca3b1614cc..0000000000000
--- a/patches.baytrail/0736-drm-Set-the-relevant-infoframe-field-when-scanning-o.patch
+++ /dev/null
@@ -1,91 +0,0 @@
-From c3548aa81d870cadc6a9328acbccc4d2fb2c3005 Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Wed, 25 Sep 2013 16:45:26 +0100
-Subject: drm: Set the relevant infoframe field when scanning out a 3D mode
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-When scanning out a 3D mode on HDMI, we need to send an HDMI infoframe
-with the corresponding layout to the sink.
-
-v2: Make s3d_structure_from_display_mode() less subtle (Ville Syrjälä)
-
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Acked-by: Dave Airlie <airlied@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 4eed4a0a4ac31830b4c328739cabb69721584bfc)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_edid.c |   40 ++++++++++++++++++++++++++++++++++++++--
- 1 file changed, 38 insertions(+), 2 deletions(-)
-
---- a/drivers/gpu/drm/drm_edid.c
-+++ b/drivers/gpu/drm/drm_edid.c
-@@ -3360,6 +3360,33 @@ drm_hdmi_avi_infoframe_from_display_mode
- }
- EXPORT_SYMBOL(drm_hdmi_avi_infoframe_from_display_mode);
- 
-+static enum hdmi_3d_structure
-+s3d_structure_from_display_mode(const struct drm_display_mode *mode)
-+{
-+	u32 layout = mode->flags & DRM_MODE_FLAG_3D_MASK;
-+
-+	switch (layout) {
-+	case DRM_MODE_FLAG_3D_FRAME_PACKING:
-+		return HDMI_3D_STRUCTURE_FRAME_PACKING;
-+	case DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE:
-+		return HDMI_3D_STRUCTURE_FIELD_ALTERNATIVE;
-+	case DRM_MODE_FLAG_3D_LINE_ALTERNATIVE:
-+		return HDMI_3D_STRUCTURE_LINE_ALTERNATIVE;
-+	case DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL:
-+		return HDMI_3D_STRUCTURE_SIDE_BY_SIDE_FULL;
-+	case DRM_MODE_FLAG_3D_L_DEPTH:
-+		return HDMI_3D_STRUCTURE_L_DEPTH;
-+	case DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH:
-+		return HDMI_3D_STRUCTURE_L_DEPTH_GFX_GFX_DEPTH;
-+	case DRM_MODE_FLAG_3D_TOP_AND_BOTTOM:
-+		return HDMI_3D_STRUCTURE_TOP_AND_BOTTOM;
-+	case DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF:
-+		return HDMI_3D_STRUCTURE_SIDE_BY_SIDE_HALF;
-+	default:
-+		return HDMI_3D_STRUCTURE_INVALID;
-+	}
-+}
-+
- /**
-  * drm_hdmi_vendor_infoframe_from_display_mode() - fill an HDMI infoframe with
-  * data from a DRM display mode
-@@ -3377,20 +3404,29 @@ drm_hdmi_vendor_infoframe_from_display_m
- 					    const struct drm_display_mode *mode)
- {
- 	int err;
-+	u32 s3d_flags;
- 	u8 vic;
- 
- 	if (!frame || !mode)
- 		return -EINVAL;
- 
- 	vic = drm_match_hdmi_mode(mode);
--	if (!vic)
-+	s3d_flags = mode->flags & DRM_MODE_FLAG_3D_MASK;
-+
-+	if (!vic && !s3d_flags)
-+		return -EINVAL;
-+
-+	if (vic && s3d_flags)
- 		return -EINVAL;
- 
- 	err = hdmi_vendor_infoframe_init(frame);
- 	if (err < 0)
- 		return err;
- 
--	frame->vic = vic;
-+	if (vic)
-+		frame->vic = vic;
-+	else
-+		frame->s3d_struct = s3d_structure_from_display_mode(mode);
- 
- 	return 0;
- }
diff --git a/patches.baytrail/0737-drm-i915-hdmi-Write-HDMI-vendor-specific-infoframes.patch b/patches.baytrail/0737-drm-i915-hdmi-Write-HDMI-vendor-specific-infoframes.patch
deleted file mode 100644
index 3c676a838a2f1..0000000000000
--- a/patches.baytrail/0737-drm-i915-hdmi-Write-HDMI-vendor-specific-infoframes.patch
+++ /dev/null
@@ -1,133 +0,0 @@
-From 8c51d5617e620c11e9067180b810740b35905828 Mon Sep 17 00:00:00 2001
-From: "Lespiau, Damien" <damien.lespiau@intel.com>
-Date: Mon, 19 Aug 2013 16:59:04 +0100
-Subject: drm/i915/hdmi: Write HDMI vendor specific infoframes
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-With all the common infoframe bits now in place, we can finally write
-the vendor specific infoframes in our driver.
-
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Thierry Reding <treding@nvidia.com>
-Signed-off-by: Dave Airlie <airlied@gmail.com>
-(cherry picked from commit c8bb75afff8eaed89476a00f733c666e1b44115b)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_reg.h   |    2 ++
- drivers/gpu/drm/i915/intel_hdmi.c |   28 ++++++++++++++++++++++++++++
- 2 files changed, 30 insertions(+)
-
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -4172,6 +4172,8 @@
- 	 _TRANSCODER(trans, HSW_VIDEO_DIP_CTL_A, HSW_VIDEO_DIP_CTL_B)
- #define HSW_TVIDEO_DIP_AVI_DATA(trans) \
- 	 _TRANSCODER(trans, HSW_VIDEO_DIP_AVI_DATA_A, HSW_VIDEO_DIP_AVI_DATA_B)
-+#define HSW_TVIDEO_DIP_VS_DATA(trans) \
-+	 _TRANSCODER(trans, HSW_VIDEO_DIP_VS_DATA_A, HSW_VIDEO_DIP_VS_DATA_B)
- #define HSW_TVIDEO_DIP_SPD_DATA(trans) \
- 	 _TRANSCODER(trans, HSW_VIDEO_DIP_SPD_DATA_A, HSW_VIDEO_DIP_SPD_DATA_B)
- #define HSW_TVIDEO_DIP_GCP(trans) \
---- a/drivers/gpu/drm/i915/intel_hdmi.c
-+++ b/drivers/gpu/drm/i915/intel_hdmi.c
-@@ -74,6 +74,8 @@ static u32 g4x_infoframe_index(enum hdmi
- 		return VIDEO_DIP_SELECT_AVI;
- 	case HDMI_INFOFRAME_TYPE_SPD:
- 		return VIDEO_DIP_SELECT_SPD;
-+	case HDMI_INFOFRAME_TYPE_VENDOR:
-+		return VIDEO_DIP_SELECT_VENDOR;
- 	default:
- 		DRM_DEBUG_DRIVER("unknown info frame type %d\n", type);
- 		return 0;
-@@ -87,6 +89,8 @@ static u32 g4x_infoframe_enable(enum hdm
- 		return VIDEO_DIP_ENABLE_AVI;
- 	case HDMI_INFOFRAME_TYPE_SPD:
- 		return VIDEO_DIP_ENABLE_SPD;
-+	case HDMI_INFOFRAME_TYPE_VENDOR:
-+		return VIDEO_DIP_ENABLE_VENDOR;
- 	default:
- 		DRM_DEBUG_DRIVER("unknown info frame type %d\n", type);
- 		return 0;
-@@ -100,6 +104,8 @@ static u32 hsw_infoframe_enable(enum hdm
- 		return VIDEO_DIP_ENABLE_AVI_HSW;
- 	case HDMI_INFOFRAME_TYPE_SPD:
- 		return VIDEO_DIP_ENABLE_SPD_HSW;
-+	case HDMI_INFOFRAME_TYPE_VENDOR:
-+		return VIDEO_DIP_ENABLE_VS_HSW;
- 	default:
- 		DRM_DEBUG_DRIVER("unknown info frame type %d\n", type);
- 		return 0;
-@@ -114,6 +120,8 @@ static u32 hsw_infoframe_data_reg(enum h
- 		return HSW_TVIDEO_DIP_AVI_DATA(cpu_transcoder);
- 	case HDMI_INFOFRAME_TYPE_SPD:
- 		return HSW_TVIDEO_DIP_SPD_DATA(cpu_transcoder);
-+	case HDMI_INFOFRAME_TYPE_VENDOR:
-+		return HSW_TVIDEO_DIP_VS_DATA(cpu_transcoder);
- 	default:
- 		DRM_DEBUG_DRIVER("unknown info frame type %d\n", type);
- 		return 0;
-@@ -392,6 +400,21 @@ static void intel_hdmi_set_spd_infoframe
- 	intel_write_infoframe(encoder, &frame);
- }
- 
-+static void
-+intel_hdmi_set_hdmi_infoframe(struct drm_encoder *encoder,
-+			      struct drm_display_mode *adjusted_mode)
-+{
-+	union hdmi_infoframe frame;
-+	int ret;
-+
-+	ret = drm_hdmi_vendor_infoframe_from_display_mode(&frame.vendor.hdmi,
-+							  adjusted_mode);
-+	if (ret < 0)
-+		return;
-+
-+	intel_write_infoframe(encoder, &frame);
-+}
-+
- static void g4x_set_infoframes(struct drm_encoder *encoder,
- 			       struct drm_display_mode *adjusted_mode)
- {
-@@ -454,6 +477,7 @@ static void g4x_set_infoframes(struct dr
- 
- 	intel_hdmi_set_avi_infoframe(encoder, adjusted_mode);
- 	intel_hdmi_set_spd_infoframe(encoder);
-+	intel_hdmi_set_hdmi_infoframe(encoder, adjusted_mode);
- }
- 
- static void ibx_set_infoframes(struct drm_encoder *encoder,
-@@ -515,6 +539,7 @@ static void ibx_set_infoframes(struct dr
- 
- 	intel_hdmi_set_avi_infoframe(encoder, adjusted_mode);
- 	intel_hdmi_set_spd_infoframe(encoder);
-+	intel_hdmi_set_hdmi_infoframe(encoder, adjusted_mode);
- }
- 
- static void cpt_set_infoframes(struct drm_encoder *encoder,
-@@ -550,6 +575,7 @@ static void cpt_set_infoframes(struct dr
- 
- 	intel_hdmi_set_avi_infoframe(encoder, adjusted_mode);
- 	intel_hdmi_set_spd_infoframe(encoder);
-+	intel_hdmi_set_hdmi_infoframe(encoder, adjusted_mode);
- }
- 
- static void vlv_set_infoframes(struct drm_encoder *encoder,
-@@ -584,6 +610,7 @@ static void vlv_set_infoframes(struct dr
- 
- 	intel_hdmi_set_avi_infoframe(encoder, adjusted_mode);
- 	intel_hdmi_set_spd_infoframe(encoder);
-+	intel_hdmi_set_hdmi_infoframe(encoder, adjusted_mode);
- }
- 
- static void hsw_set_infoframes(struct drm_encoder *encoder,
-@@ -611,6 +638,7 @@ static void hsw_set_infoframes(struct dr
- 
- 	intel_hdmi_set_avi_infoframe(encoder, adjusted_mode);
- 	intel_hdmi_set_spd_infoframe(encoder);
-+	intel_hdmi_set_hdmi_infoframe(encoder, adjusted_mode);
- }
- 
- static void intel_hdmi_mode_set(struct intel_encoder *encoder)
diff --git a/patches.baytrail/0738-drm-Pass-page-flip-ioctl-flags-to-driver.patch b/patches.baytrail/0738-drm-Pass-page-flip-ioctl-flags-to-driver.patch
deleted file mode 100644
index b5e8028b38e9d..0000000000000
--- a/patches.baytrail/0738-drm-Pass-page-flip-ioctl-flags-to-driver.patch
+++ /dev/null
@@ -1,304 +0,0 @@
-From 32487c1ae57e369b4475b8581b3b754869786b2e Mon Sep 17 00:00:00 2001
-From: Keith Packard <keithp@keithp.com>
-Date: Mon, 22 Jul 2013 18:49:58 -0700
-Subject: drm: Pass page flip ioctl flags to driver
-
-This lets drivers see the flags requested by the application
-
-[airlied: fixup for rcar/imx/msm]
-
-Signed-off-by: Keith Packard <keithp@keithp.com>
-Signed-off-by: Dave Airlie <airlied@gmail.com>
-(cherry picked from commit ed8d19756e80ec63003a93aa4d70406e6ba61522)
-Signed-off-by: James Ausmus <james.ausmus@intel.com>
-
-Conflicts:
-	drivers/gpu/drm/msm/mdp4/mdp4_crtc.c
-	drivers/gpu/drm/rcar-du/rcar_du_crtc.c
-	(drivers don't exist in this tree)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_crtc.c                |  2 +-
- drivers/gpu/drm/exynos/exynos_drm_crtc.c  |  5 +++--
- drivers/gpu/drm/i915/i915_drv.h           |  3 ++-
- drivers/gpu/drm/i915/intel_display.c      | 23 +++++++++++++++--------
- drivers/gpu/drm/nouveau/nouveau_display.c |  3 ++-
- drivers/gpu/drm/nouveau/nouveau_display.h |  3 ++-
- drivers/gpu/drm/omapdrm/omap_crtc.c       |  3 ++-
- drivers/gpu/drm/radeon/radeon_display.c   |  3 ++-
- drivers/gpu/drm/shmobile/shmob_drm_crtc.c |  3 ++-
- drivers/gpu/drm/tilcdc/tilcdc_crtc.c      |  3 ++-
- drivers/gpu/drm/vmwgfx/vmwgfx_kms.c       |  3 ++-
- drivers/gpu/drm/vmwgfx/vmwgfx_kms.h       |  3 ++-
- drivers/staging/imx-drm/ipuv3-crtc.c      |  3 ++-
- include/drm/drm_crtc.h                    |  3 ++-
- 14 files changed, 41 insertions(+), 22 deletions(-)
-
-diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
-index f4831510d38a..a014cb1ebcaf 100644
---- a/drivers/gpu/drm/drm_crtc.c
-+++ b/drivers/gpu/drm/drm_crtc.c
-@@ -3521,7 +3521,7 @@ int drm_mode_page_flip_ioctl(struct drm_device *dev,
- 	}
- 
- 	old_fb = crtc->fb;
--	ret = crtc->funcs->page_flip(crtc, fb, e);
-+	ret = crtc->funcs->page_flip(crtc, fb, e, page_flip->flags);
- 	if (ret) {
- 		if (page_flip->flags & DRM_MODE_PAGE_FLIP_EVENT) {
- 			spin_lock_irqsave(&dev->event_lock, flags);
-diff --git a/drivers/gpu/drm/exynos/exynos_drm_crtc.c b/drivers/gpu/drm/exynos/exynos_drm_crtc.c
-index c200e4d71e3d..0b3dff8e69c1 100644
---- a/drivers/gpu/drm/exynos/exynos_drm_crtc.c
-+++ b/drivers/gpu/drm/exynos/exynos_drm_crtc.c
-@@ -197,8 +197,9 @@ static struct drm_crtc_helper_funcs exynos_crtc_helper_funcs = {
- };
- 
- static int exynos_drm_crtc_page_flip(struct drm_crtc *crtc,
--				      struct drm_framebuffer *fb,
--				      struct drm_pending_vblank_event *event)
-+				     struct drm_framebuffer *fb,
-+				     struct drm_pending_vblank_event *event,
-+				     uint32_t page_flip_flags)
- {
- 	struct drm_device *dev = crtc->dev;
- 	struct exynos_drm_private *dev_priv = dev->dev_private;
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 8ee15b471854..52a3785a3fdf 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -380,7 +380,8 @@ struct drm_i915_display_funcs {
- 	void (*init_clock_gating)(struct drm_device *dev);
- 	int (*queue_flip)(struct drm_device *dev, struct drm_crtc *crtc,
- 			  struct drm_framebuffer *fb,
--			  struct drm_i915_gem_object *obj);
-+			  struct drm_i915_gem_object *obj,
-+			  uint32_t flags);
- 	int (*update_plane)(struct drm_crtc *crtc, struct drm_framebuffer *fb,
- 			    int x, int y);
- 	void (*hpd_irq_setup)(struct drm_device *dev);
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 58da4ddc3e16..2ed6214010c6 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -7654,7 +7654,8 @@ inline static void intel_mark_page_flip_active(struct intel_crtc *intel_crtc)
- static int intel_gen2_queue_flip(struct drm_device *dev,
- 				 struct drm_crtc *crtc,
- 				 struct drm_framebuffer *fb,
--				 struct drm_i915_gem_object *obj)
-+				 struct drm_i915_gem_object *obj,
-+				 uint32_t flags)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
-@@ -7698,7 +7699,8 @@ err:
- static int intel_gen3_queue_flip(struct drm_device *dev,
- 				 struct drm_crtc *crtc,
- 				 struct drm_framebuffer *fb,
--				 struct drm_i915_gem_object *obj)
-+				 struct drm_i915_gem_object *obj,
-+				 uint32_t flags)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
-@@ -7739,7 +7741,8 @@ err:
- static int intel_gen4_queue_flip(struct drm_device *dev,
- 				 struct drm_crtc *crtc,
- 				 struct drm_framebuffer *fb,
--				 struct drm_i915_gem_object *obj)
-+				 struct drm_i915_gem_object *obj,
-+				 uint32_t flags)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
-@@ -7787,7 +7790,8 @@ err:
- static int intel_gen6_queue_flip(struct drm_device *dev,
- 				 struct drm_crtc *crtc,
- 				 struct drm_framebuffer *fb,
--				 struct drm_i915_gem_object *obj)
-+				 struct drm_i915_gem_object *obj,
-+				 uint32_t flags)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
-@@ -7837,7 +7841,8 @@ err:
- static int intel_gen7_queue_flip(struct drm_device *dev,
- 				 struct drm_crtc *crtc,
- 				 struct drm_framebuffer *fb,
--				 struct drm_i915_gem_object *obj)
-+				 struct drm_i915_gem_object *obj,
-+				 uint32_t flags)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
-@@ -7887,14 +7892,16 @@ err:
- static int intel_default_queue_flip(struct drm_device *dev,
- 				    struct drm_crtc *crtc,
- 				    struct drm_framebuffer *fb,
--				    struct drm_i915_gem_object *obj)
-+				    struct drm_i915_gem_object *obj,
-+				    uint32_t flags)
- {
- 	return -ENODEV;
- }
- 
- static int intel_crtc_page_flip(struct drm_crtc *crtc,
- 				struct drm_framebuffer *fb,
--				struct drm_pending_vblank_event *event)
-+				struct drm_pending_vblank_event *event,
-+				uint32_t page_flip_flags)
- {
- 	struct drm_device *dev = crtc->dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
-@@ -7964,7 +7971,7 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
- 	atomic_inc(&intel_crtc->unpin_work_count);
- 	intel_crtc->reset_counter = atomic_read(&dev_priv->gpu_error.reset_counter);
- 
--	ret = dev_priv->display.queue_flip(dev, crtc, fb, obj);
-+	ret = dev_priv->display.queue_flip(dev, crtc, fb, obj, page_flip_flags);
- 	if (ret)
- 		goto cleanup_pending;
- 
-diff --git a/drivers/gpu/drm/nouveau/nouveau_display.c b/drivers/gpu/drm/nouveau/nouveau_display.c
-index 05ae27277543..dbd5a2a12e09 100644
---- a/drivers/gpu/drm/nouveau/nouveau_display.c
-+++ b/drivers/gpu/drm/nouveau/nouveau_display.c
-@@ -554,7 +554,8 @@ fail:
- 
- int
- nouveau_crtc_page_flip(struct drm_crtc *crtc, struct drm_framebuffer *fb,
--		       struct drm_pending_vblank_event *event)
-+		       struct drm_pending_vblank_event *event,
-+		       uint32_t page_flip_flags)
- {
- 	struct drm_device *dev = crtc->dev;
- 	struct nouveau_drm *drm = nouveau_drm(dev);
-diff --git a/drivers/gpu/drm/nouveau/nouveau_display.h b/drivers/gpu/drm/nouveau/nouveau_display.h
-index 185e74132a6d..3238594855d3 100644
---- a/drivers/gpu/drm/nouveau/nouveau_display.h
-+++ b/drivers/gpu/drm/nouveau/nouveau_display.h
-@@ -60,7 +60,8 @@ int  nouveau_display_suspend(struct drm_device *dev);
- void nouveau_display_resume(struct drm_device *dev);
- 
- int  nouveau_crtc_page_flip(struct drm_crtc *crtc, struct drm_framebuffer *fb,
--			    struct drm_pending_vblank_event *event);
-+			    struct drm_pending_vblank_event *event,
-+			    uint32_t page_flip_flags);
- int  nouveau_finish_page_flip(struct nouveau_channel *,
- 			      struct nouveau_page_flip_state *);
- 
-diff --git a/drivers/gpu/drm/omapdrm/omap_crtc.c b/drivers/gpu/drm/omapdrm/omap_crtc.c
-index 79b200aee18a..09f6bd923456 100644
---- a/drivers/gpu/drm/omapdrm/omap_crtc.c
-+++ b/drivers/gpu/drm/omapdrm/omap_crtc.c
-@@ -308,7 +308,8 @@ static void page_flip_cb(void *arg)
- 
- static int omap_crtc_page_flip_locked(struct drm_crtc *crtc,
- 		 struct drm_framebuffer *fb,
--		 struct drm_pending_vblank_event *event)
-+		 struct drm_pending_vblank_event *event,
-+		 uint32_t page_flip_flags)
- {
- 	struct drm_device *dev = crtc->dev;
- 	struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
-diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c
-index eb18bb7af1cc..bb46f75c1a27 100644
---- a/drivers/gpu/drm/radeon/radeon_display.c
-+++ b/drivers/gpu/drm/radeon/radeon_display.c
-@@ -339,7 +339,8 @@ void radeon_crtc_handle_flip(struct radeon_device *rdev, int crtc_id)
- 
- static int radeon_crtc_page_flip(struct drm_crtc *crtc,
- 				 struct drm_framebuffer *fb,
--				 struct drm_pending_vblank_event *event)
-+				 struct drm_pending_vblank_event *event,
-+				 uint32_t page_flip_flags)
- {
- 	struct drm_device *dev = crtc->dev;
- 	struct radeon_device *rdev = dev->dev_private;
-diff --git a/drivers/gpu/drm/shmobile/shmob_drm_crtc.c b/drivers/gpu/drm/shmobile/shmob_drm_crtc.c
-index 99e2034e49cc..54bad98e9477 100644
---- a/drivers/gpu/drm/shmobile/shmob_drm_crtc.c
-+++ b/drivers/gpu/drm/shmobile/shmob_drm_crtc.c
-@@ -465,7 +465,8 @@ void shmob_drm_crtc_finish_page_flip(struct shmob_drm_crtc *scrtc)
- 
- static int shmob_drm_crtc_page_flip(struct drm_crtc *crtc,
- 				    struct drm_framebuffer *fb,
--				    struct drm_pending_vblank_event *event)
-+				    struct drm_pending_vblank_event *event,
-+				    uint32_t page_flip_flags)
- {
- 	struct shmob_drm_crtc *scrtc = to_shmob_crtc(crtc);
- 	struct drm_device *dev = scrtc->crtc.dev;
-diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
-index 5dd3c7d031d5..274c4b64aebb 100644
---- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
-+++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
-@@ -153,7 +153,8 @@ static void tilcdc_crtc_destroy(struct drm_crtc *crtc)
- 
- static int tilcdc_crtc_page_flip(struct drm_crtc *crtc,
- 		struct drm_framebuffer *fb,
--		struct drm_pending_vblank_event *event)
-+		struct drm_pending_vblank_event *event,
-+		uint32_t page_flip_flags)
- {
- 	struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc);
- 	struct drm_device *dev = crtc->dev;
-diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
-index 3e3c7ab33ca2..5705179407c7 100644
---- a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
-+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
-@@ -1705,7 +1705,8 @@ int vmw_du_update_layout(struct vmw_private *dev_priv, unsigned num,
- 
- int vmw_du_page_flip(struct drm_crtc *crtc,
- 		     struct drm_framebuffer *fb,
--		     struct drm_pending_vblank_event *event)
-+		     struct drm_pending_vblank_event *event,
-+		     uint32_t page_flip_flags)
- {
- 	struct vmw_private *dev_priv = vmw_priv(crtc->dev);
- 	struct drm_framebuffer *old_fb = crtc->fb;
-diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.h b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.h
-index 6fa89c9d6214..8d038c36bd57 100644
---- a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.h
-+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.h
-@@ -123,7 +123,8 @@ struct vmw_display_unit {
- void vmw_display_unit_cleanup(struct vmw_display_unit *du);
- int vmw_du_page_flip(struct drm_crtc *crtc,
- 		     struct drm_framebuffer *fb,
--		     struct drm_pending_vblank_event *event);
-+		     struct drm_pending_vblank_event *event,
-+		     uint32_t page_flip_flags);
- void vmw_du_crtc_save(struct drm_crtc *crtc);
- void vmw_du_crtc_restore(struct drm_crtc *crtc);
- void vmw_du_crtc_gamma_set(struct drm_crtc *crtc,
-diff --git a/drivers/staging/imx-drm/ipuv3-crtc.c b/drivers/staging/imx-drm/ipuv3-crtc.c
-index ff5c63350932..467c49cf9fc2 100644
---- a/drivers/staging/imx-drm/ipuv3-crtc.c
-+++ b/drivers/staging/imx-drm/ipuv3-crtc.c
-@@ -134,7 +134,8 @@ static void ipu_crtc_dpms(struct drm_crtc *crtc, int mode)
- 
- static int ipu_page_flip(struct drm_crtc *crtc,
- 		struct drm_framebuffer *fb,
--		struct drm_pending_vblank_event *event)
-+		struct drm_pending_vblank_event *event,
-+		uint32_t page_flip_flags)
- {
- 	struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
- 	int ret;
-diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h
-index b228321549fa..7a2d68f946c6 100644
---- a/include/drm/drm_crtc.h
-+++ b/include/drm/drm_crtc.h
-@@ -365,7 +365,8 @@ struct drm_crtc_funcs {
- 	 */
- 	int (*page_flip)(struct drm_crtc *crtc,
- 			 struct drm_framebuffer *fb,
--			 struct drm_pending_vblank_event *event);
-+			 struct drm_pending_vblank_event *event,
-+			 uint32_t flags);
- 
- 	int (*set_property)(struct drm_crtc *crtc,
- 			    struct drm_property *property, uint64_t val);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0739-drm-implement-experimental-render-nodes.patch b/patches.baytrail/0739-drm-implement-experimental-render-nodes.patch
deleted file mode 100644
index 5d4dc7949d015..0000000000000
--- a/patches.baytrail/0739-drm-implement-experimental-render-nodes.patch
+++ /dev/null
@@ -1,408 +0,0 @@
-From cf6d66e6543ba38ff6d62af743b1f0155ddb15f9 Mon Sep 17 00:00:00 2001
-From: David Herrmann <dh.herrmann@gmail.com>
-Date: Sun, 25 Aug 2013 18:29:00 +0200
-Subject: drm: implement experimental render nodes
-
-Render nodes provide an API for userspace to use non-privileged GPU
-commands without any running DRM-Master. It is useful for offscreen
-rendering, GPGPU clients, and normal render clients which do not perform
-modesetting.
-
-Compared to legacy clients, render clients no longer need any
-authentication to perform client ioctls. Instead, user-space controls
-render/client access to GPUs via filesystem access-modes on the
-render-node. Once a render-node was opened, a client has full access to
-the client/render operations on the GPU. However, no modesetting or ioctls
-that affect global state are allowed on render nodes.
-
-To prevent privilege-escalation, drivers must explicitly state that they
-support render nodes. They must mark their render-only ioctls as
-DRM_RENDER_ALLOW so render clients can use them. Furthermore, they must
-support clients without any attached master.
-
-If filesystem access-modes are not enough for fine-grained access control
-to render nodes (very unlikely, considering the versaitlity of FS-ACLs),
-you may still fall-back to fd-passing from server to client (which allows
-arbitrary access-control). However, note that revoking access is
-currently impossible and unlikely to get implemented.
-
-Note: Render clients no longer have any associated DRM-Master as they are
-supposed to be independent of any server state. DRM core highly depends on
-file_priv->master to be non-NULL for modesetting/ctx/etc. commands.
-Therefore, drivers must be very careful to not require DRM-Master if they
-support DRIVER_RENDER.
-
-So far render-nodes are protected by "drm_rnodes". As long as this
-module-parameter is not set to 1, a driver will not create render nodes.
-This allows us to experiment with the API a bit before we stabilize it.
-
-v2: drop insecure GEM_FLINK to force use of dmabuf
-
-Signed-off-by: David Herrmann <dh.herrmann@gmail.com>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit 1793126fcebd7c18834f95d43b55e387a8803aa8)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- Documentation/DocBook/drm.tmpl | 69 ++++++++++++++++++++++++++++++++++++++++++
- drivers/gpu/drm/drm_drv.c      | 13 ++++----
- drivers/gpu/drm/drm_fops.c     | 14 ++++-----
- drivers/gpu/drm/drm_pci.c      |  9 ++++++
- drivers/gpu/drm/drm_platform.c |  9 ++++++
- drivers/gpu/drm/drm_stub.c     | 10 ++++++
- drivers/gpu/drm/drm_usb.c      |  9 ++++++
- include/drm/drmP.h             |  9 ++++++
- 8 files changed, 129 insertions(+), 13 deletions(-)
-
-diff --git a/Documentation/DocBook/drm.tmpl b/Documentation/DocBook/drm.tmpl
-index da1e28263002..d31fafbed4dc 100644
---- a/Documentation/DocBook/drm.tmpl
-+++ b/Documentation/DocBook/drm.tmpl
-@@ -233,6 +233,12 @@
-               Driver implements DRM PRIME buffer sharing.
-             </para></listitem>
-           </varlistentry>
-+          <varlistentry>
-+            <term>DRIVER_RENDER</term>
-+            <listitem><para>
-+              Driver supports dedicated render nodes.
-+            </para></listitem>
-+          </varlistentry>
-         </variablelist>
-       </sect3>
-       <sect3>
-@@ -2497,6 +2503,69 @@ int (*resume) (struct drm_device *);</synopsis>
-       info, since man pages should cover the rest.
-     </para>
- 
-+  <!-- External: render nodes -->
-+
-+    <sect1>
-+      <title>Render nodes</title>
-+      <para>
-+        DRM core provides multiple character-devices for user-space to use.
-+        Depending on which device is opened, user-space can perform a different
-+        set of operations (mainly ioctls). The primary node is always created
-+        and called <term>card&lt;num&gt;</term>. Additionally, a currently
-+        unused control node, called <term>controlD&lt;num&gt;</term> is also
-+        created. The primary node provides all legacy operations and
-+        historically was the only interface used by userspace. With KMS, the
-+        control node was introduced. However, the planned KMS control interface
-+        has never been written and so the control node stays unused to date.
-+      </para>
-+      <para>
-+        With the increased use of offscreen renderers and GPGPU applications,
-+        clients no longer require running compositors or graphics servers to
-+        make use of a GPU. But the DRM API required unprivileged clients to
-+        authenticate to a DRM-Master prior to getting GPU access. To avoid this
-+        step and to grant clients GPU access without authenticating, render
-+        nodes were introduced. Render nodes solely serve render clients, that
-+        is, no modesetting or privileged ioctls can be issued on render nodes.
-+        Only non-global rendering commands are allowed. If a driver supports
-+        render nodes, it must advertise it via the <term>DRIVER_RENDER</term>
-+        DRM driver capability. If not supported, the primary node must be used
-+        for render clients together with the legacy drmAuth authentication
-+        procedure.
-+      </para>
-+      <para>
-+        If a driver advertises render node support, DRM core will create a
-+        separate render node called <term>renderD&lt;num&gt;</term>. There will
-+        be one render node per device. No ioctls except  PRIME-related ioctls
-+        will be allowed on this node. Especially <term>GEM_OPEN</term> will be
-+        explicitly prohibited. Render nodes are designed to avoid the
-+        buffer-leaks, which occur if clients guess the flink names or mmap
-+        offsets on the legacy interface. Additionally to this basic interface,
-+        drivers must mark their driver-dependent render-only ioctls as
-+        <term>DRM_RENDER_ALLOW</term> so render clients can use them. Driver
-+        authors must be careful not to allow any privileged ioctls on render
-+        nodes.
-+      </para>
-+      <para>
-+        With render nodes, user-space can now control access to the render node
-+        via basic file-system access-modes. A running graphics server which
-+        authenticates clients on the privileged primary/legacy node is no longer
-+        required. Instead, a client can open the render node and is immediately
-+        granted GPU access. Communication between clients (or servers) is done
-+        via PRIME. FLINK from render node to legacy node is not supported. New
-+        clients must not use the insecure FLINK interface.
-+      </para>
-+      <para>
-+        Besides dropping all modeset/global ioctls, render nodes also drop the
-+        DRM-Master concept. There is no reason to associate render clients with
-+        a DRM-Master as they are independent of any graphics server. Besides,
-+        they must work without any running master, anyway.
-+        Drivers must be able to run without a master object if they support
-+        render nodes. If, on the other hand, a driver requires shared state
-+        between clients which is visible to user-space and accessible beyond
-+        open-file boundaries, they cannot support render nodes.
-+      </para>
-+    </sect1>
-+
-   <!-- External: vblank handling -->
- 
-     <sect1>
-diff --git a/drivers/gpu/drm/drm_drv.c b/drivers/gpu/drm/drm_drv.c
-index 2994cd7513e9..b1f0a0bf77cb 100644
---- a/drivers/gpu/drm/drm_drv.c
-+++ b/drivers/gpu/drm/drm_drv.c
-@@ -68,7 +68,7 @@ static const struct drm_ioctl_desc drm_ioctls[] = {
- 	DRM_IOCTL_DEF(DRM_IOCTL_GET_MAP, drm_getmap, DRM_UNLOCKED),
- 	DRM_IOCTL_DEF(DRM_IOCTL_GET_CLIENT, drm_getclient, DRM_UNLOCKED),
- 	DRM_IOCTL_DEF(DRM_IOCTL_GET_STATS, drm_getstats, DRM_UNLOCKED),
--	DRM_IOCTL_DEF(DRM_IOCTL_GET_CAP, drm_getcap, DRM_UNLOCKED),
-+	DRM_IOCTL_DEF(DRM_IOCTL_GET_CAP, drm_getcap, DRM_UNLOCKED|DRM_RENDER_ALLOW),
- 	DRM_IOCTL_DEF(DRM_IOCTL_SET_VERSION, drm_setversion, DRM_MASTER),
- 
- 	DRM_IOCTL_DEF(DRM_IOCTL_SET_UNIQUE, drm_setunique, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
-@@ -131,14 +131,14 @@ static const struct drm_ioctl_desc drm_ioctls[] = {
- 
- 	DRM_IOCTL_DEF(DRM_IOCTL_UPDATE_DRAW, drm_noop, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- 
--	DRM_IOCTL_DEF(DRM_IOCTL_GEM_CLOSE, drm_gem_close_ioctl, DRM_UNLOCKED),
-+	DRM_IOCTL_DEF(DRM_IOCTL_GEM_CLOSE, drm_gem_close_ioctl, DRM_UNLOCKED|DRM_RENDER_ALLOW),
- 	DRM_IOCTL_DEF(DRM_IOCTL_GEM_FLINK, drm_gem_flink_ioctl, DRM_AUTH|DRM_UNLOCKED),
- 	DRM_IOCTL_DEF(DRM_IOCTL_GEM_OPEN, drm_gem_open_ioctl, DRM_AUTH|DRM_UNLOCKED),
- 
- 	DRM_IOCTL_DEF(DRM_IOCTL_MODE_GETRESOURCES, drm_mode_getresources, DRM_CONTROL_ALLOW|DRM_UNLOCKED),
- 
--	DRM_IOCTL_DEF(DRM_IOCTL_PRIME_HANDLE_TO_FD, drm_prime_handle_to_fd_ioctl, DRM_AUTH|DRM_UNLOCKED),
--	DRM_IOCTL_DEF(DRM_IOCTL_PRIME_FD_TO_HANDLE, drm_prime_fd_to_handle_ioctl, DRM_AUTH|DRM_UNLOCKED),
-+	DRM_IOCTL_DEF(DRM_IOCTL_PRIME_HANDLE_TO_FD, drm_prime_handle_to_fd_ioctl, DRM_AUTH|DRM_UNLOCKED|DRM_RENDER_ALLOW),
-+	DRM_IOCTL_DEF(DRM_IOCTL_PRIME_FD_TO_HANDLE, drm_prime_fd_to_handle_ioctl, DRM_AUTH|DRM_UNLOCKED|DRM_RENDER_ALLOW),
- 
- 	DRM_IOCTL_DEF(DRM_IOCTL_MODE_GETPLANERESOURCES, drm_mode_getplane_res, DRM_CONTROL_ALLOW|DRM_UNLOCKED),
- 	DRM_IOCTL_DEF(DRM_IOCTL_MODE_GETCRTC, drm_mode_getcrtc, DRM_CONTROL_ALLOW|DRM_UNLOCKED),
-@@ -415,9 +415,10 @@ long drm_ioctl(struct file *filp,
- 		DRM_DEBUG("no function\n");
- 		retcode = -EINVAL;
- 	} else if (((ioctl->flags & DRM_ROOT_ONLY) && !capable(CAP_SYS_ADMIN)) ||
--		   ((ioctl->flags & DRM_AUTH) && !file_priv->authenticated) ||
-+		   ((ioctl->flags & DRM_AUTH) && !drm_is_render_client(file_priv) && !file_priv->authenticated) ||
- 		   ((ioctl->flags & DRM_MASTER) && !file_priv->is_master) ||
--		   (!(ioctl->flags & DRM_CONTROL_ALLOW) && (file_priv->minor->type == DRM_MINOR_CONTROL))) {
-+		   (!(ioctl->flags & DRM_CONTROL_ALLOW) && (file_priv->minor->type == DRM_MINOR_CONTROL)) ||
-+		   (!(ioctl->flags & DRM_RENDER_ALLOW) && drm_is_render_client(file_priv))) {
- 		retcode = -EACCES;
- 	} else {
- 		if (cmd & (IOC_IN | IOC_OUT)) {
-diff --git a/drivers/gpu/drm/drm_fops.c b/drivers/gpu/drm/drm_fops.c
-index 88e80c37f568..a4e4f32ec1e3 100644
---- a/drivers/gpu/drm/drm_fops.c
-+++ b/drivers/gpu/drm/drm_fops.c
-@@ -283,10 +283,10 @@ static int drm_open_helper(struct inode *inode, struct file *filp,
- 			goto out_free;
- 	}
- 
--
--	/* if there is no current master make this fd it */
-+	/* if there is no current master make this fd it, but do not create
-+	 * any master object for render clients */
- 	mutex_lock(&dev->struct_mutex);
--	if (!priv->minor->master) {
-+	if (!priv->minor->master && !drm_is_render_client(priv)) {
- 		/* create a new master */
- 		priv->minor->master = drm_master_create(priv->minor);
- 		if (!priv->minor->master) {
-@@ -324,12 +324,11 @@ static int drm_open_helper(struct inode *inode, struct file *filp,
- 				goto out_free;
- 			}
- 		}
--		mutex_unlock(&dev->struct_mutex);
--	} else {
-+	} else if (!drm_is_render_client(priv)) {
- 		/* get a reference to the master */
- 		priv->master = drm_master_get(priv->minor->master);
--		mutex_unlock(&dev->struct_mutex);
- 	}
-+	mutex_unlock(&dev->struct_mutex);
- 
- 	mutex_lock(&dev->struct_mutex);
- 	list_add(&priv->lhead, &dev->filelist);
-@@ -508,7 +507,8 @@ int drm_release(struct inode *inode, struct file *filp)
- 	iput(container_of(dev->dev_mapping, struct inode, i_data));
- 
- 	/* drop the reference held my the file priv */
--	drm_master_put(&file_priv->master);
-+	if (file_priv->master)
-+		drm_master_put(&file_priv->master);
- 	file_priv->is_master = 0;
- 	list_del(&file_priv->lhead);
- 	mutex_unlock(&dev->struct_mutex);
-diff --git a/drivers/gpu/drm/drm_pci.c b/drivers/gpu/drm/drm_pci.c
-index 83fb3dba1b25..564075586a60 100644
---- a/drivers/gpu/drm/drm_pci.c
-+++ b/drivers/gpu/drm/drm_pci.c
-@@ -358,6 +358,12 @@ int drm_get_pci_dev(struct pci_dev *pdev, const struct pci_device_id *ent,
- 			goto err_g2;
- 	}
- 
-+	if (drm_core_check_feature(dev, DRIVER_RENDER) && drm_rnodes) {
-+		ret = drm_get_minor(dev, &dev->render, DRM_MINOR_RENDER);
-+		if (ret)
-+			goto err_g21;
-+	}
-+
- 	if ((ret = drm_get_minor(dev, &dev->primary, DRM_MINOR_LEGACY)))
- 		goto err_g3;
- 
-@@ -387,6 +393,9 @@ int drm_get_pci_dev(struct pci_dev *pdev, const struct pci_device_id *ent,
- err_g4:
- 	drm_put_minor(&dev->primary);
- err_g3:
-+	if (dev->render)
-+		drm_put_minor(&dev->render);
-+err_g21:
- 	if (drm_core_check_feature(dev, DRIVER_MODESET))
- 		drm_put_minor(&dev->control);
- err_g2:
-diff --git a/drivers/gpu/drm/drm_platform.c b/drivers/gpu/drm/drm_platform.c
-index b8a282ea8751..53ae674dee85 100644
---- a/drivers/gpu/drm/drm_platform.c
-+++ b/drivers/gpu/drm/drm_platform.c
-@@ -69,6 +69,12 @@ int drm_get_platform_dev(struct platform_device *platdev,
- 			goto err_g1;
- 	}
- 
-+	if (drm_core_check_feature(dev, DRIVER_RENDER) && drm_rnodes) {
-+		ret = drm_get_minor(dev, &dev->render, DRM_MINOR_RENDER);
-+		if (ret)
-+			goto err_g11;
-+	}
-+
- 	ret = drm_get_minor(dev, &dev->primary, DRM_MINOR_LEGACY);
- 	if (ret)
- 		goto err_g2;
-@@ -100,6 +106,9 @@ int drm_get_platform_dev(struct platform_device *platdev,
- err_g3:
- 	drm_put_minor(&dev->primary);
- err_g2:
-+	if (dev->render)
-+		drm_put_minor(&dev->render);
-+err_g11:
- 	if (drm_core_check_feature(dev, DRIVER_MODESET))
- 		drm_put_minor(&dev->control);
- err_g1:
-diff --git a/drivers/gpu/drm/drm_stub.c b/drivers/gpu/drm/drm_stub.c
-index 31442a45dae0..d9c90b11e443 100644
---- a/drivers/gpu/drm/drm_stub.c
-+++ b/drivers/gpu/drm/drm_stub.c
-@@ -40,6 +40,9 @@
- unsigned int drm_debug = 0;	/* 1 to enable debug output */
- EXPORT_SYMBOL(drm_debug);
- 
-+unsigned int drm_rnodes = 0;	/* 1 to enable experimental render nodes API */
-+EXPORT_SYMBOL(drm_rnodes);
-+
- unsigned int drm_vblank_offdelay = 5000;    /* Default to 5000 msecs. */
- EXPORT_SYMBOL(drm_vblank_offdelay);
- 
-@@ -56,11 +59,13 @@ MODULE_AUTHOR(CORE_AUTHOR);
- MODULE_DESCRIPTION(CORE_DESC);
- MODULE_LICENSE("GPL and additional rights");
- MODULE_PARM_DESC(debug, "Enable debug output");
-+MODULE_PARM_DESC(rnodes, "Enable experimental render nodes API");
- MODULE_PARM_DESC(vblankoffdelay, "Delay until vblank irq auto-disable [msecs]");
- MODULE_PARM_DESC(timestamp_precision_usec, "Max. error on timestamps [usecs]");
- MODULE_PARM_DESC(timestamp_monotonic, "Use monotonic timestamps");
- 
- module_param_named(debug, drm_debug, int, 0600);
-+module_param_named(rnodes, drm_rnodes, int, 0600);
- module_param_named(vblankoffdelay, drm_vblank_offdelay, int, 0600);
- module_param_named(timestamp_precision_usec, drm_timestamp_precision, int, 0600);
- module_param_named(timestamp_monotonic, drm_timestamp_monotonic, int, 0600);
-@@ -468,6 +473,9 @@ void drm_put_dev(struct drm_device *dev)
- 	if (drm_core_check_feature(dev, DRIVER_MODESET))
- 		drm_put_minor(&dev->control);
- 
-+	if (dev->render)
-+		drm_put_minor(&dev->render);
-+
- 	if (driver->driver_features & DRIVER_GEM)
- 		drm_gem_destroy(dev);
- 
-@@ -484,6 +492,8 @@ void drm_unplug_dev(struct drm_device *dev)
- 	/* for a USB device */
- 	if (drm_core_check_feature(dev, DRIVER_MODESET))
- 		drm_unplug_minor(dev->control);
-+	if (dev->render)
-+		drm_unplug_minor(dev->render);
- 	drm_unplug_minor(dev->primary);
- 
- 	mutex_lock(&drm_global_mutex);
-diff --git a/drivers/gpu/drm/drm_usb.c b/drivers/gpu/drm/drm_usb.c
-index 34a156f0c336..87664723b9ce 100644
---- a/drivers/gpu/drm/drm_usb.c
-+++ b/drivers/gpu/drm/drm_usb.c
-@@ -33,6 +33,12 @@ int drm_get_usb_dev(struct usb_interface *interface,
- 	if (ret)
- 		goto err_g1;
- 
-+	if (drm_core_check_feature(dev, DRIVER_RENDER) && drm_rnodes) {
-+		ret = drm_get_minor(dev, &dev->render, DRM_MINOR_RENDER);
-+		if (ret)
-+			goto err_g11;
-+	}
-+
- 	ret = drm_get_minor(dev, &dev->primary, DRM_MINOR_LEGACY);
- 	if (ret)
- 		goto err_g2;
-@@ -62,6 +68,9 @@ int drm_get_usb_dev(struct usb_interface *interface,
- err_g3:
- 	drm_put_minor(&dev->primary);
- err_g2:
-+	if (dev->render)
-+		drm_put_minor(&dev->render);
-+err_g11:
- 	drm_put_minor(&dev->control);
- err_g1:
- 	kfree(dev);
-diff --git a/include/drm/drmP.h b/include/drm/drmP.h
-index f65eaddd4844..adb4c330b086 100644
---- a/include/drm/drmP.h
-+++ b/include/drm/drmP.h
-@@ -150,6 +150,7 @@ int drm_err(const char *func, const char *format, ...);
- #define DRIVER_GEM         0x1000
- #define DRIVER_MODESET     0x2000
- #define DRIVER_PRIME       0x4000
-+#define DRIVER_RENDER      0x8000
- 
- #define DRIVER_BUS_PCI 0x1
- #define DRIVER_BUS_PLATFORM 0x2
-@@ -304,6 +305,7 @@ typedef int drm_ioctl_compat_t(struct file *filp, unsigned int cmd,
- #define DRM_ROOT_ONLY	0x4
- #define DRM_CONTROL_ALLOW 0x8
- #define DRM_UNLOCKED	0x10
-+#define DRM_RENDER_ALLOW 0x20
- 
- struct drm_ioctl_desc {
- 	unsigned int cmd;
-@@ -1189,6 +1191,7 @@ struct drm_device {
- 	unsigned int agp_buffer_token;
- 	struct drm_minor *control;		/**< Control node for card */
- 	struct drm_minor *primary;		/**< render type primary screen head */
-+	struct drm_minor *render;		/**< render node for card */
- 
-         struct drm_mode_config mode_config;	/**< Current mode config */
- 
-@@ -1235,6 +1238,11 @@ static inline bool drm_modeset_is_locked(struct drm_device *dev)
- 	return mutex_is_locked(&dev->mode_config.mutex);
- }
- 
-+static inline bool drm_is_render_client(struct drm_file *file_priv)
-+{
-+	return file_priv->minor->type == DRM_MINOR_RENDER;
-+}
-+
- /******************************************************************/
- /** \name Internal function definitions */
- /*@{*/
-@@ -1435,6 +1443,7 @@ extern void drm_put_dev(struct drm_device *dev);
- extern int drm_put_minor(struct drm_minor **minor);
- extern void drm_unplug_dev(struct drm_device *dev);
- extern unsigned int drm_debug;
-+extern unsigned int drm_rnodes;
- 
- extern unsigned int drm_vblank_offdelay;
- extern unsigned int drm_timestamp_precision;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0740-drm-i915-Support-render-nodes.patch b/patches.baytrail/0740-drm-i915-Support-render-nodes.patch
deleted file mode 100644
index c0e1647d5e9ab..0000000000000
--- a/patches.baytrail/0740-drm-i915-Support-render-nodes.patch
+++ /dev/null
@@ -1,103 +0,0 @@
-From d9594201b0019c6fee90ceb4eabcc05977ca1f5d Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Kristian=20H=C3=B8gsberg?= <krh@bitplanet.net>
-Date: Sun, 25 Aug 2013 18:29:01 +0200
-Subject: drm/i915: Support render nodes
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Enable support for drm render nodes for i915 by flagging the ioctls that
-are safe and just needed for rendering.
-
-v2: mark reg_read, set_caching and get_caching (ickle, danvet)
-
-Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
-Signed-off-by: David Herrmann <dh.herrmann@gmail.com>
-Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit 10ba50129ab0bdbc0ee712e50913d1c8db88c5f0)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_dma.c |   42 ++++++++++++++++++++--------------------
- drivers/gpu/drm/i915/i915_drv.c |    3 +-
- 2 files changed, 23 insertions(+), 22 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_dma.c
-+++ b/drivers/gpu/drm/i915/i915_dma.c
-@@ -1877,7 +1877,7 @@ const struct drm_ioctl_desc i915_ioctls[
- 	DRM_IOCTL_DEF_DRV(I915_BATCHBUFFER, i915_batchbuffer, DRM_AUTH),
- 	DRM_IOCTL_DEF_DRV(I915_IRQ_EMIT, i915_irq_emit, DRM_AUTH),
- 	DRM_IOCTL_DEF_DRV(I915_IRQ_WAIT, i915_irq_wait, DRM_AUTH),
--	DRM_IOCTL_DEF_DRV(I915_GETPARAM, i915_getparam, DRM_AUTH),
-+	DRM_IOCTL_DEF_DRV(I915_GETPARAM, i915_getparam, DRM_AUTH|DRM_RENDER_ALLOW),
- 	DRM_IOCTL_DEF_DRV(I915_SETPARAM, i915_setparam, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- 	DRM_IOCTL_DEF_DRV(I915_ALLOC, drm_noop, DRM_AUTH),
- 	DRM_IOCTL_DEF_DRV(I915_FREE, drm_noop, DRM_AUTH),
-@@ -1890,35 +1890,35 @@ const struct drm_ioctl_desc i915_ioctls[
- 	DRM_IOCTL_DEF_DRV(I915_HWS_ADDR, i915_set_status_page, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- 	DRM_IOCTL_DEF_DRV(I915_GEM_INIT, i915_gem_init_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED),
- 	DRM_IOCTL_DEF_DRV(I915_GEM_EXECBUFFER, i915_gem_execbuffer, DRM_AUTH|DRM_UNLOCKED),
--	DRM_IOCTL_DEF_DRV(I915_GEM_EXECBUFFER2, i915_gem_execbuffer2, DRM_AUTH|DRM_UNLOCKED),
-+	DRM_IOCTL_DEF_DRV(I915_GEM_EXECBUFFER2, i915_gem_execbuffer2, DRM_AUTH|DRM_UNLOCKED|DRM_RENDER_ALLOW),
- 	DRM_IOCTL_DEF_DRV(I915_GEM_PIN, i915_gem_pin_ioctl, DRM_AUTH|DRM_ROOT_ONLY|DRM_UNLOCKED),
- 	DRM_IOCTL_DEF_DRV(I915_GEM_UNPIN, i915_gem_unpin_ioctl, DRM_AUTH|DRM_ROOT_ONLY|DRM_UNLOCKED),
--	DRM_IOCTL_DEF_DRV(I915_GEM_BUSY, i915_gem_busy_ioctl, DRM_AUTH|DRM_UNLOCKED),
--	DRM_IOCTL_DEF_DRV(I915_GEM_SET_CACHING, i915_gem_set_caching_ioctl, DRM_UNLOCKED),
--	DRM_IOCTL_DEF_DRV(I915_GEM_GET_CACHING, i915_gem_get_caching_ioctl, DRM_UNLOCKED),
--	DRM_IOCTL_DEF_DRV(I915_GEM_THROTTLE, i915_gem_throttle_ioctl, DRM_AUTH|DRM_UNLOCKED),
-+	DRM_IOCTL_DEF_DRV(I915_GEM_BUSY, i915_gem_busy_ioctl, DRM_AUTH|DRM_UNLOCKED|DRM_RENDER_ALLOW),
-+	DRM_IOCTL_DEF_DRV(I915_GEM_SET_CACHING, i915_gem_set_caching_ioctl, DRM_UNLOCKED|DRM_RENDER_ALLOW),
-+	DRM_IOCTL_DEF_DRV(I915_GEM_GET_CACHING, i915_gem_get_caching_ioctl, DRM_UNLOCKED|DRM_RENDER_ALLOW),
-+	DRM_IOCTL_DEF_DRV(I915_GEM_THROTTLE, i915_gem_throttle_ioctl, DRM_AUTH|DRM_UNLOCKED|DRM_RENDER_ALLOW),
- 	DRM_IOCTL_DEF_DRV(I915_GEM_ENTERVT, i915_gem_entervt_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED),
- 	DRM_IOCTL_DEF_DRV(I915_GEM_LEAVEVT, i915_gem_leavevt_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED),
--	DRM_IOCTL_DEF_DRV(I915_GEM_CREATE, i915_gem_create_ioctl, DRM_UNLOCKED),
--	DRM_IOCTL_DEF_DRV(I915_GEM_PREAD, i915_gem_pread_ioctl, DRM_UNLOCKED),
--	DRM_IOCTL_DEF_DRV(I915_GEM_PWRITE, i915_gem_pwrite_ioctl, DRM_UNLOCKED),
--	DRM_IOCTL_DEF_DRV(I915_GEM_MMAP, i915_gem_mmap_ioctl, DRM_UNLOCKED),
--	DRM_IOCTL_DEF_DRV(I915_GEM_MMAP_GTT, i915_gem_mmap_gtt_ioctl, DRM_UNLOCKED),
--	DRM_IOCTL_DEF_DRV(I915_GEM_SET_DOMAIN, i915_gem_set_domain_ioctl, DRM_UNLOCKED),
--	DRM_IOCTL_DEF_DRV(I915_GEM_SW_FINISH, i915_gem_sw_finish_ioctl, DRM_UNLOCKED),
--	DRM_IOCTL_DEF_DRV(I915_GEM_SET_TILING, i915_gem_set_tiling, DRM_UNLOCKED),
--	DRM_IOCTL_DEF_DRV(I915_GEM_GET_TILING, i915_gem_get_tiling, DRM_UNLOCKED),
--	DRM_IOCTL_DEF_DRV(I915_GEM_GET_APERTURE, i915_gem_get_aperture_ioctl, DRM_UNLOCKED),
-+	DRM_IOCTL_DEF_DRV(I915_GEM_CREATE, i915_gem_create_ioctl, DRM_UNLOCKED|DRM_RENDER_ALLOW),
-+	DRM_IOCTL_DEF_DRV(I915_GEM_PREAD, i915_gem_pread_ioctl, DRM_UNLOCKED|DRM_RENDER_ALLOW),
-+	DRM_IOCTL_DEF_DRV(I915_GEM_PWRITE, i915_gem_pwrite_ioctl, DRM_UNLOCKED|DRM_RENDER_ALLOW),
-+	DRM_IOCTL_DEF_DRV(I915_GEM_MMAP, i915_gem_mmap_ioctl, DRM_UNLOCKED|DRM_RENDER_ALLOW),
-+	DRM_IOCTL_DEF_DRV(I915_GEM_MMAP_GTT, i915_gem_mmap_gtt_ioctl, DRM_UNLOCKED|DRM_RENDER_ALLOW),
-+	DRM_IOCTL_DEF_DRV(I915_GEM_SET_DOMAIN, i915_gem_set_domain_ioctl, DRM_UNLOCKED|DRM_RENDER_ALLOW),
-+	DRM_IOCTL_DEF_DRV(I915_GEM_SW_FINISH, i915_gem_sw_finish_ioctl, DRM_UNLOCKED|DRM_RENDER_ALLOW),
-+	DRM_IOCTL_DEF_DRV(I915_GEM_SET_TILING, i915_gem_set_tiling, DRM_UNLOCKED|DRM_RENDER_ALLOW),
-+	DRM_IOCTL_DEF_DRV(I915_GEM_GET_TILING, i915_gem_get_tiling, DRM_UNLOCKED|DRM_RENDER_ALLOW),
-+	DRM_IOCTL_DEF_DRV(I915_GEM_GET_APERTURE, i915_gem_get_aperture_ioctl, DRM_UNLOCKED|DRM_RENDER_ALLOW),
- 	DRM_IOCTL_DEF_DRV(I915_GET_PIPE_FROM_CRTC_ID, intel_get_pipe_from_crtc_id, DRM_UNLOCKED),
--	DRM_IOCTL_DEF_DRV(I915_GEM_MADVISE, i915_gem_madvise_ioctl, DRM_UNLOCKED),
-+	DRM_IOCTL_DEF_DRV(I915_GEM_MADVISE, i915_gem_madvise_ioctl, DRM_UNLOCKED|DRM_RENDER_ALLOW),
- 	DRM_IOCTL_DEF_DRV(I915_OVERLAY_PUT_IMAGE, intel_overlay_put_image, DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED),
- 	DRM_IOCTL_DEF_DRV(I915_OVERLAY_ATTRS, intel_overlay_attrs, DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED),
- 	DRM_IOCTL_DEF_DRV(I915_SET_SPRITE_COLORKEY, intel_sprite_set_colorkey, DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED),
- 	DRM_IOCTL_DEF_DRV(I915_GET_SPRITE_COLORKEY, intel_sprite_get_colorkey, DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED),
--	DRM_IOCTL_DEF_DRV(I915_GEM_WAIT, i915_gem_wait_ioctl, DRM_AUTH|DRM_UNLOCKED),
--	DRM_IOCTL_DEF_DRV(I915_GEM_CONTEXT_CREATE, i915_gem_context_create_ioctl, DRM_UNLOCKED),
--	DRM_IOCTL_DEF_DRV(I915_GEM_CONTEXT_DESTROY, i915_gem_context_destroy_ioctl, DRM_UNLOCKED),
--	DRM_IOCTL_DEF_DRV(I915_REG_READ, i915_reg_read_ioctl, DRM_UNLOCKED),
-+	DRM_IOCTL_DEF_DRV(I915_GEM_WAIT, i915_gem_wait_ioctl, DRM_AUTH|DRM_UNLOCKED|DRM_RENDER_ALLOW),
-+	DRM_IOCTL_DEF_DRV(I915_GEM_CONTEXT_CREATE, i915_gem_context_create_ioctl, DRM_UNLOCKED|DRM_RENDER_ALLOW),
-+	DRM_IOCTL_DEF_DRV(I915_GEM_CONTEXT_DESTROY, i915_gem_context_destroy_ioctl, DRM_UNLOCKED|DRM_RENDER_ALLOW),
-+	DRM_IOCTL_DEF_DRV(I915_REG_READ, i915_reg_read_ioctl, DRM_UNLOCKED|DRM_RENDER_ALLOW),
- };
- 
- int i915_max_ioctl = DRM_ARRAY_SIZE(i915_ioctls);
---- a/drivers/gpu/drm/i915/i915_drv.c
-+++ b/drivers/gpu/drm/i915/i915_drv.c
-@@ -1022,7 +1022,8 @@ static struct drm_driver driver = {
- 	 */
- 	.driver_features =
- 	    DRIVER_USE_AGP | DRIVER_REQUIRE_AGP |
--	    DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM | DRIVER_PRIME,
-+	    DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM | DRIVER_PRIME |
-+	    DRIVER_RENDER,
- 	.load = i915_driver_load,
- 	.unload = i915_driver_unload,
- 	.open = i915_driver_open,
diff --git a/patches.baytrail/0741-drm-i915-Don-t-mask-EI-UP-interrupt-on-IVB-SNB.patch b/patches.baytrail/0741-drm-i915-Don-t-mask-EI-UP-interrupt-on-IVB-SNB.patch
deleted file mode 100644
index aded221e6da98..0000000000000
--- a/patches.baytrail/0741-drm-i915-Don-t-mask-EI-UP-interrupt-on-IVB-SNB.patch
+++ /dev/null
@@ -1,72 +0,0 @@
-From 174fb53dddc9f0348751ce4f2022b0c9b24d5e5d Mon Sep 17 00:00:00 2001
-From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
-Date: Thu, 22 Aug 2013 21:09:00 +0300
-Subject: drm/i915: Don't mask EI UP interrupt on IVB|SNB
-
-Submitting a batchbuffer which simulates a gpu
-hang by doing MI_BATCH_BUFFER_START into itself,
-to test hangcheck, started to hard hang the whole box
-(IVB). Bisecting lead to this commit:
-
-commit 664b422c2966cd39b8f67e8d53a566ea8c877cd6
-Author: Vinit Azad <vinit.azad@intel.com>
-Date:   Wed Aug 14 13:34:33 2013 -0700
-
-    drm/i915: Only unmask required PM interrupts
-
-Experimenting with the mask register showed that
-unmasking EI UP will prevent the hard hang in IVB and SNB.
-HSW doesn't hang with EI UP masked.
-
-Considering we are just disabling interrupts that aren't even
-delivered to driver, this change is more likely to paper over some
-weirdness in gpu's internal state machine. But until better
-explanation can be found, let's trade little bit of power
-for stability on these architectures.
-
-v2: - Unmask EI_EXPIRED directly in I915_WRITE (Vinit)
-v3: - Only unmask on SNB and IVB
-
-Cc: Vinit Azad <vinit.azad@intel.com>
-Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Acked-by: Vinit Azad <vinit.azad@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit a9c1f90c8e1792127f8348c1cc2565b79b2ef20a)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 12 +++++++++++-
- 1 file changed, 11 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 46056820d1d2..6b1d00389952 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -3447,14 +3447,24 @@ int intel_enable_rc6(const struct drm_device *dev)
- static void gen6_enable_rps_interrupts(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
-+	u32 enabled_intrs;
- 
- 	spin_lock_irq(&dev_priv->irq_lock);
- 	WARN_ON(dev_priv->rps.pm_iir);
- 	snb_enable_pm_irq(dev_priv, GEN6_PM_RPS_EVENTS);
- 	I915_WRITE(GEN6_PMIIR, GEN6_PM_RPS_EVENTS);
- 	spin_unlock_irq(&dev_priv->irq_lock);
-+
- 	/* only unmask PM interrupts we need. Mask all others. */
--	I915_WRITE(GEN6_PMINTRMSK, ~GEN6_PM_RPS_EVENTS);
-+	enabled_intrs = GEN6_PM_RPS_EVENTS;
-+
-+	/* IVB and SNB hard hangs on looping batchbuffer
-+	 * if GEN6_PM_UP_EI_EXPIRED is masked.
-+	 */
-+	if (INTEL_INFO(dev)->gen <= 7 && !IS_HASWELL(dev))
-+		enabled_intrs |= GEN6_PM_RP_UP_EI_EXPIRED;
-+
-+	I915_WRITE(GEN6_PMINTRMSK, ~enabled_intrs);
- }
- 
- static void gen6_enable_rps(struct drm_device *dev)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0742-drm-i915-sanitize-forcewake-registers-on-reset.patch b/patches.baytrail/0742-drm-i915-sanitize-forcewake-registers-on-reset.patch
deleted file mode 100644
index 5f7c182e709c9..0000000000000
--- a/patches.baytrail/0742-drm-i915-sanitize-forcewake-registers-on-reset.patch
+++ /dev/null
@@ -1,60 +0,0 @@
-From 8a90bc85114de48f9ac89480394179a6397ff7b4 Mon Sep 17 00:00:00 2001
-From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
-Date: Fri, 23 Aug 2013 16:52:30 +0300
-Subject: drm/i915: sanitize forcewake registers on reset
-
-In reset we try to restore the forcewake state to
-pre reset state, using forcewake_count. The reset
-doesn't seem to clear the forcewake bits so we
-get warn on forcewake ack register not clearing.
-
-Use same mechanism as intel_uncore_sanitize() does
-when loading driver to reset the forcewake bits, right
-after the chip has been reset.
-
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 521198a2e7095c8c7daa8d7d3a76a110c346be6f)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_uncore.c | 9 ++++++++-
- 1 file changed, 8 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
-index 8f5bc869c023..8649f1c36b00 100644
---- a/drivers/gpu/drm/i915/intel_uncore.c
-+++ b/drivers/gpu/drm/i915/intel_uncore.c
-@@ -261,7 +261,7 @@ void intel_uncore_init(struct drm_device *dev)
- 	}
- }
- 
--void intel_uncore_sanitize(struct drm_device *dev)
-+static void intel_uncore_forcewake_reset(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 
-@@ -272,6 +272,11 @@ void intel_uncore_sanitize(struct drm_device *dev)
- 		if (IS_IVYBRIDGE(dev) || IS_HASWELL(dev))
- 			__gen6_gt_force_wake_mt_reset(dev_priv);
- 	}
-+}
-+
-+void intel_uncore_sanitize(struct drm_device *dev)
-+{
-+	intel_uncore_forcewake_reset(dev);
- 
- 	/* BIOS often leaves RC6 enabled, but disable it for hw init */
- 	intel_disable_gt_powersave(dev);
-@@ -549,6 +554,8 @@ static int gen6_do_reset(struct drm_device *dev)
- 	/* Spin waiting for the device to ack the reset request */
- 	ret = wait_for((__raw_i915_read32(dev_priv, GEN6_GDRST) & GEN6_GRDOM_FULL) == 0, 500);
- 
-+	intel_uncore_forcewake_reset(dev);
-+
- 	/* If reset with a user forcewake, try to restore, otherwise turn it off */
- 	if (dev_priv->uncore.forcewake_count)
- 		dev_priv->uncore.funcs.force_wake_get(dev_priv);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0743-drm-i915-Adjust-available-RPS-information-through-sy.patch b/patches.baytrail/0743-drm-i915-Adjust-available-RPS-information-through-sy.patch
deleted file mode 100644
index 3c18f7df9e5ed..0000000000000
--- a/patches.baytrail/0743-drm-i915-Adjust-available-RPS-information-through-sy.patch
+++ /dev/null
@@ -1,98 +0,0 @@
-From d288060e0119bb349ee3590833de9d0a9ba0a121 Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Mon, 26 Aug 2013 16:18:54 +0100
-Subject: drm/i915: Adjust available RPS information through sysfs for vlv
-
-Valleyview has its own render power state implementation with different
-capability knobs - it has no RP0,RP1,RPn but rather RPe.
-
-Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67734
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Tested-by: kobe.qin@intel.com
-Reviewed-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 97e4eed7dc532e20208b0bdf7ad1136569da2f35)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_sysfs.c | 36 +++++++++++++++++++++++++++++++-----
- 1 file changed, 31 insertions(+), 5 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c
-index a777e7f3b0df..c8c4112de110 100644
---- a/drivers/gpu/drm/i915/i915_sysfs.c
-+++ b/drivers/gpu/drm/i915/i915_sysfs.c
-@@ -224,6 +224,18 @@ static ssize_t gt_cur_freq_mhz_show(struct device *kdev,
- 	return snprintf(buf, PAGE_SIZE, "%d\n", ret);
- }
- 
-+static ssize_t vlv_rpe_freq_mhz_show(struct device *kdev,
-+				     struct device_attribute *attr, char *buf)
-+{
-+	struct drm_minor *minor = container_of(kdev, struct drm_minor, kdev);
-+	struct drm_device *dev = minor->dev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+
-+	return snprintf(buf, PAGE_SIZE, "%d\n",
-+			vlv_gpu_freq(dev_priv->mem_freq,
-+				     dev_priv->rps.rpe_delay));
-+}
-+
- static ssize_t gt_max_freq_mhz_show(struct device *kdev, struct device_attribute *attr, char *buf)
- {
- 	struct drm_minor *minor = container_of(kdev, struct drm_minor, kdev);
-@@ -366,6 +378,7 @@ static DEVICE_ATTR(gt_cur_freq_mhz, S_IRUGO, gt_cur_freq_mhz_show, NULL);
- static DEVICE_ATTR(gt_max_freq_mhz, S_IRUGO | S_IWUSR, gt_max_freq_mhz_show, gt_max_freq_mhz_store);
- static DEVICE_ATTR(gt_min_freq_mhz, S_IRUGO | S_IWUSR, gt_min_freq_mhz_show, gt_min_freq_mhz_store);
- 
-+static DEVICE_ATTR(vlv_rpe_freq_mhz, S_IRUGO, vlv_rpe_freq_mhz_show, NULL);
- 
- static ssize_t gt_rp_mhz_show(struct device *kdev, struct device_attribute *attr, char *buf);
- static DEVICE_ATTR(gt_RP0_freq_mhz, S_IRUGO, gt_rp_mhz_show, NULL);
-@@ -409,6 +422,14 @@ static const struct attribute *gen6_attrs[] = {
- 	NULL,
- };
- 
-+static const struct attribute *vlv_attrs[] = {
-+	&dev_attr_gt_cur_freq_mhz.attr,
-+	&dev_attr_gt_max_freq_mhz.attr,
-+	&dev_attr_gt_min_freq_mhz.attr,
-+	&dev_attr_vlv_rpe_freq_mhz.attr,
-+	NULL,
-+};
-+
- static ssize_t error_state_read(struct file *filp, struct kobject *kobj,
- 				struct bin_attribute *attr, char *buf,
- 				loff_t off, size_t count)
-@@ -492,11 +513,13 @@ void i915_setup_sysfs(struct drm_device *dev)
- 			DRM_ERROR("l3 parity sysfs setup failed\n");
- 	}
- 
--	if (INTEL_INFO(dev)->gen >= 6) {
-+	ret = 0;
-+	if (IS_VALLEYVIEW(dev))
-+		ret = sysfs_create_files(&dev->primary->kdev.kobj, vlv_attrs);
-+	else if (INTEL_INFO(dev)->gen >= 6)
- 		ret = sysfs_create_files(&dev->primary->kdev.kobj, gen6_attrs);
--		if (ret)
--			DRM_ERROR("gen6 sysfs setup failed\n");
--	}
-+	if (ret)
-+		DRM_ERROR("RPS sysfs setup failed\n");
- 
- 	ret = sysfs_create_bin_file(&dev->primary->kdev.kobj,
- 				    &error_state_attr);
-@@ -507,7 +530,10 @@ void i915_setup_sysfs(struct drm_device *dev)
- void i915_teardown_sysfs(struct drm_device *dev)
- {
- 	sysfs_remove_bin_file(&dev->primary->kdev.kobj, &error_state_attr);
--	sysfs_remove_files(&dev->primary->kdev.kobj, gen6_attrs);
-+	if (IS_VALLEYVIEW(dev))
-+		sysfs_remove_files(&dev->primary->kdev.kobj, vlv_attrs);
-+	else
-+		sysfs_remove_files(&dev->primary->kdev.kobj, gen6_attrs);
- 	device_remove_bin_file(&dev->primary->kdev,  &dpf_attrs);
- #ifdef CONFIG_PM
- 	sysfs_unmerge_group(&dev->primary->kdev.kobj, &rc6_attr_group);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0744-drm-i915-Apply-the-force-detect-VGA-w-a-to-Valleyvie.patch b/patches.baytrail/0744-drm-i915-Apply-the-force-detect-VGA-w-a-to-Valleyvie.patch
deleted file mode 100644
index fbbbeca70cf55..0000000000000
--- a/patches.baytrail/0744-drm-i915-Apply-the-force-detect-VGA-w-a-to-Valleyvie.patch
+++ /dev/null
@@ -1,38 +0,0 @@
-From 42ec6e38ed7569d4ba3bcd99e2b8897addbefcb9 Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Mon, 26 Aug 2013 19:51:06 -0300
-Subject: drm/i915: Apply the force-detect VGA w/a to Valleyview
-
-It appears that Valleyview shares its VGA encoder with more recent
-siblings and requires the same forced detection cycle after a hardware
-reset before we can rely on hotplugging.
-
-Reported-and-tested-by: kobeqin <kobe.qin@intel.com>
-Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67733
-Tested-by: kobeqin <kobe.qin@intel.com>
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-[danvet: Check for gen >= 5 insted, acked by Chris.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 10603caacf599297c7da0c4f4db440d015b8131a)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_crt.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
-index b5a3875f22c7..ea9022ef15d5 100644
---- a/drivers/gpu/drm/i915/intel_crt.c
-+++ b/drivers/gpu/drm/i915/intel_crt.c
-@@ -688,7 +688,7 @@ static void intel_crt_reset(struct drm_connector *connector)
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct intel_crt *crt = intel_attached_crt(connector);
- 
--	if (HAS_PCH_SPLIT(dev)) {
-+	if (INTEL_INFO(dev)->gen >= 5) {
- 		u32 adpa;
- 
- 		adpa = I915_READ(crt->adpa_reg);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0745-drm-i915-Report-requested-frequency-alongside-curren.patch b/patches.baytrail/0745-drm-i915-Report-requested-frequency-alongside-curren.patch
deleted file mode 100644
index 09cc4c02e1a3c..0000000000000
--- a/patches.baytrail/0745-drm-i915-Report-requested-frequency-alongside-curren.patch
+++ /dev/null
@@ -1,57 +0,0 @@
-From c14d45427f665322a45ba6ca9f1cd414b2cc6932 Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Mon, 26 Aug 2013 19:51:01 -0300
-Subject: drm/i915: Report requested frequency alongside current frequency in
- debugfs
-
-It can be useful to compare at times the current vs requested frequency
-of the GPU, so provide the contents of RPNSWREQ alonside CAGF.
-
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 8e8c06cd34dbd68d36b0c561b8850478ddc5fb84)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_debugfs.c | 11 ++++++++++-
- 1 file changed, 10 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
-index 55ab9246e1b9..a6f4cb5af185 100644
---- a/drivers/gpu/drm/i915/i915_debugfs.c
-+++ b/drivers/gpu/drm/i915/i915_debugfs.c
-@@ -857,7 +857,7 @@ static int i915_cur_delayinfo(struct seq_file *m, void *unused)
- 		u32 gt_perf_status = I915_READ(GEN6_GT_PERF_STATUS);
- 		u32 rp_state_limits = I915_READ(GEN6_RP_STATE_LIMITS);
- 		u32 rp_state_cap = I915_READ(GEN6_RP_STATE_CAP);
--		u32 rpstat, cagf;
-+		u32 rpstat, cagf, reqf;
- 		u32 rpupei, rpcurup, rpprevup;
- 		u32 rpdownei, rpcurdown, rpprevdown;
- 		int max_freq;
-@@ -869,6 +869,14 @@ static int i915_cur_delayinfo(struct seq_file *m, void *unused)
- 
- 		gen6_gt_force_wake_get(dev_priv);
- 
-+		reqf = I915_READ(GEN6_RPNSWREQ);
-+		reqf &= ~GEN6_TURBO_DISABLE;
-+		if (IS_HASWELL(dev))
-+			reqf >>= 24;
-+		else
-+			reqf >>= 25;
-+		reqf *= GT_FREQUENCY_MULTIPLIER;
-+
- 		rpstat = I915_READ(GEN6_RPSTAT1);
- 		rpupei = I915_READ(GEN6_RP_CUR_UP_EI);
- 		rpcurup = I915_READ(GEN6_RP_CUR_UP);
-@@ -893,6 +901,7 @@ static int i915_cur_delayinfo(struct seq_file *m, void *unused)
- 			   gt_perf_status & 0xff);
- 		seq_printf(m, "Render p-state limit: %d\n",
- 			   rp_state_limits & 0xff);
-+		seq_printf(m, "RPNSWREQ: %dMHz\n", reqf);
- 		seq_printf(m, "CAGF: %dMHz\n", cagf);
- 		seq_printf(m, "RP CUR UP EI: %dus\n", rpupei &
- 			   GEN6_CURICONT_MASK);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0746-drm-i915-tune-down-hangcheck-noise.patch b/patches.baytrail/0746-drm-i915-tune-down-hangcheck-noise.patch
deleted file mode 100644
index 761d7566d6f27..0000000000000
--- a/patches.baytrail/0746-drm-i915-tune-down-hangcheck-noise.patch
+++ /dev/null
@@ -1,45 +0,0 @@
-From e734e113b6e30ba4c48c1a52a31ebda26aa4ae30 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Wed, 28 Aug 2013 10:57:59 +0200
-Subject: drm/i915: tune down hangcheck noise
-
-We already have a big splashing *ERROR* for all the relevant cases of
-hangs, so this one here is redudant. And it results in an unclean
-dmesg when running with simulated hangs. Regression has been
-introduced in
-
-commit 05407ff889ceebe383aa5907219f86582ef96b72
-Author: Mika Kuoppala <mika.kuoppala@linux.intel.com>
-Date:   Thu May 30 09:04:29 2013 +0300
-
-    drm/i915: detect hang using per ring hangcheck_score
-
-Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
-Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=68641
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit b8d88d1d40c18d42e3fedc289832e28d14bc1f00)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 6 +++---
- 1 file changed, 3 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index 0eac036fb833..4c137d6ea761 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -2073,9 +2073,9 @@ static void i915_hangcheck_elapsed(unsigned long data)
- 
- 	for_each_ring(ring, dev_priv, i) {
- 		if (ring->hangcheck.score > FIRE) {
--			DRM_ERROR("%s on %s\n",
--				  stuck[i] ? "stuck" : "no progress",
--				  ring->name);
-+			DRM_INFO("%s on %s\n",
-+				 stuck[i] ? "stuck" : "no progress",
-+				 ring->name);
- 			rings_hung++;
- 		}
- 	}
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0747-drm-i915-fix-lvds-dp-panel-fitter-setting.patch b/patches.baytrail/0747-drm-i915-fix-lvds-dp-panel-fitter-setting.patch
deleted file mode 100644
index f46298890b8ef..0000000000000
--- a/patches.baytrail/0747-drm-i915-fix-lvds-dp-panel-fitter-setting.patch
+++ /dev/null
@@ -1,53 +0,0 @@
-From f778f35845f34a99bce7fedab0cfd8dedc3728fa Mon Sep 17 00:00:00 2001
-From: Imre Deak <imre.deak@intel.com>
-Date: Tue, 27 Aug 2013 12:24:09 +0300
-Subject: drm/i915: fix lvds/dp panel fitter setting
-
-If need to enable the panel fitter, the crtc timings have to be
-programmed according to the panel's native (fixed) mode. This isn't the
-case atm, since after the encoder changes adjusted_mode to fixed
-mode the crtc_* timing fields of adjusted_mode will stay at their original
-non-native values that the user passed in. This results in a corrupted
-output.
-
-One exception is when we have a second pass of computing encoder configs
-due to bandwidth limitation, since then we'll set adjusted_mode.crtc_*
-fields to the fixed mode values set in the first pass; so in this case
-things will work out.
-
-Fix this by updating the adjusted_mode.crtc_* fields when we set the
-fixed panel mode.
-
-This regression has been introduced in
-
-commit 135c81b8c3c9a70d7b55758c9c2a247a4abb7b64
-Author: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date:   Sun Jul 21 21:37:09 2013 +0200
-
-    drm/i915: clean up crtc timings computation
-
-Signed-off-by: Imre Deak <imre.deak@intel.com>
-Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit a52690e445637dda7f71878965d64d9b6a15a2b7)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_panel.c | 2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
-index a43c33bc4a35..913cb9d7fd32 100644
---- a/drivers/gpu/drm/i915/intel_panel.c
-+++ b/drivers/gpu/drm/i915/intel_panel.c
-@@ -50,6 +50,8 @@ intel_fixed_panel_mode(struct drm_display_mode *fixed_mode,
- 	adjusted_mode->vtotal = fixed_mode->vtotal;
- 
- 	adjusted_mode->clock = fixed_mode->clock;
-+
-+	drm_mode_set_crtcinfo(adjusted_mode, 0);
- }
- 
- /* adjusted_mode has been preset to be the panel's fixed mode */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0748-drm-i915-Embed-the-ring-private-within-the-struct-in.patch b/patches.baytrail/0748-drm-i915-Embed-the-ring-private-within-the-struct-in.patch
deleted file mode 100644
index 2794875692324..0000000000000
--- a/patches.baytrail/0748-drm-i915-Embed-the-ring-private-within-the-struct-in.patch
+++ /dev/null
@@ -1,266 +0,0 @@
-From 2320eff2d3605eb807173d17c6877f2c615911b2 Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Mon, 26 Aug 2013 20:58:11 +0100
-Subject: drm/i915: Embed the ring->private within the struct intel_ring_buffer
-
-We now have more devices using ring->private than not, and they all want
-the same structure. Worse, I would like to use a scratch page from
-outside of intel_ringbuffer.c and so for convenience would like to reuse
-ring->private. Embed the object into the struct intel_ringbuffer so that
-we can keep the code clean.
-
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 0d1aacac36530fce058d7a0db3da7befd5765417)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gpu_error.c   |    2 
- drivers/gpu/drm/i915/intel_ringbuffer.c |   99 +++++++++-----------------------
- drivers/gpu/drm/i915/intel_ringbuffer.h |    6 +
- 3 files changed, 35 insertions(+), 72 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_gpu_error.c
-+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
-@@ -641,7 +641,7 @@ i915_error_first_batchbuffer(struct drm_
- 		if (WARN_ON(ring->id != RCS))
- 			return NULL;
- 
--		obj = ring->private;
-+		obj = ring->scratch.obj;
- 		if (acthd >= i915_gem_obj_ggtt_offset(obj) &&
- 		    acthd < i915_gem_obj_ggtt_offset(obj) + obj->base.size)
- 			return i915_error_object_create(dev_priv, obj);
---- a/drivers/gpu/drm/i915/intel_ringbuffer.c
-+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
-@@ -33,16 +33,6 @@
- #include "i915_trace.h"
- #include "intel_drv.h"
- 
--/*
-- * 965+ support PIPE_CONTROL commands, which provide finer grained control
-- * over cache flushing.
-- */
--struct pipe_control {
--	struct drm_i915_gem_object *obj;
--	volatile u32 *cpu_page;
--	u32 gtt_offset;
--};
--
- static inline int ring_space(struct intel_ring_buffer *ring)
- {
- 	int space = (ring->head & HEAD_ADDR) - (ring->tail + I915_RING_FREE_SPACE);
-@@ -175,8 +165,7 @@ gen4_render_ring_flush(struct intel_ring
- static int
- intel_emit_post_sync_nonzero_flush(struct intel_ring_buffer *ring)
- {
--	struct pipe_control *pc = ring->private;
--	u32 scratch_addr = pc->gtt_offset + 128;
-+	u32 scratch_addr = ring->scratch.gtt_offset + 128;
- 	int ret;
- 
- 
-@@ -213,8 +202,7 @@ gen6_render_ring_flush(struct intel_ring
-                          u32 invalidate_domains, u32 flush_domains)
- {
- 	u32 flags = 0;
--	struct pipe_control *pc = ring->private;
--	u32 scratch_addr = pc->gtt_offset + 128;
-+	u32 scratch_addr = ring->scratch.gtt_offset + 128;
- 	int ret;
- 
- 	/* Force SNB workarounds for PIPE_CONTROL flushes */
-@@ -306,8 +294,7 @@ gen7_render_ring_flush(struct intel_ring
- 		       u32 invalidate_domains, u32 flush_domains)
- {
- 	u32 flags = 0;
--	struct pipe_control *pc = ring->private;
--	u32 scratch_addr = pc->gtt_offset + 128;
-+	u32 scratch_addr = ring->scratch.gtt_offset + 128;
- 	int ret;
- 
- 	/*
-@@ -481,68 +468,43 @@ out:
- static int
- init_pipe_control(struct intel_ring_buffer *ring)
- {
--	struct pipe_control *pc;
--	struct drm_i915_gem_object *obj;
- 	int ret;
- 
--	if (ring->private)
-+	if (ring->scratch.obj)
- 		return 0;
- 
--	pc = kmalloc(sizeof(*pc), GFP_KERNEL);
--	if (!pc)
--		return -ENOMEM;
--
--	obj = i915_gem_alloc_object(ring->dev, 4096);
--	if (obj == NULL) {
-+	ring->scratch.obj = i915_gem_alloc_object(ring->dev, 4096);
-+	if (ring->scratch.obj == NULL) {
- 		DRM_ERROR("Failed to allocate seqno page\n");
- 		ret = -ENOMEM;
- 		goto err;
- 	}
- 
--	i915_gem_object_set_cache_level(obj, I915_CACHE_LLC);
-+	i915_gem_object_set_cache_level(ring->scratch.obj, I915_CACHE_LLC);
- 
--	ret = i915_gem_obj_ggtt_pin(obj, 4096, true, false);
-+	ret = i915_gem_obj_ggtt_pin(ring->scratch.obj, 4096, true, false);
- 	if (ret)
- 		goto err_unref;
- 
--	pc->gtt_offset = i915_gem_obj_ggtt_offset(obj);
--	pc->cpu_page = kmap(sg_page(obj->pages->sgl));
--	if (pc->cpu_page == NULL) {
-+	ring->scratch.gtt_offset = i915_gem_obj_ggtt_offset(ring->scratch.obj);
-+	ring->scratch.cpu_page = kmap(sg_page(ring->scratch.obj->pages->sgl));
-+	if (ring->scratch.cpu_page == NULL) {
- 		ret = -ENOMEM;
- 		goto err_unpin;
- 	}
- 
- 	DRM_DEBUG_DRIVER("%s pipe control offset: 0x%08x\n",
--			 ring->name, pc->gtt_offset);
--
--	pc->obj = obj;
--	ring->private = pc;
-+			 ring->name, ring->scratch.gtt_offset);
- 	return 0;
- 
- err_unpin:
--	i915_gem_object_unpin(obj);
-+	i915_gem_object_unpin(ring->scratch.obj);
- err_unref:
--	drm_gem_object_unreference(&obj->base);
-+	drm_gem_object_unreference(&ring->scratch.obj->base);
- err:
--	kfree(pc);
- 	return ret;
- }
- 
--static void
--cleanup_pipe_control(struct intel_ring_buffer *ring)
--{
--	struct pipe_control *pc = ring->private;
--	struct drm_i915_gem_object *obj;
--
--	obj = pc->obj;
--
--	kunmap(sg_page(obj->pages->sgl));
--	i915_gem_object_unpin(obj);
--	drm_gem_object_unreference(&obj->base);
--
--	kfree(pc);
--}
--
- static int init_render_ring(struct intel_ring_buffer *ring)
- {
- 	struct drm_device *dev = ring->dev;
-@@ -607,16 +569,16 @@ static void render_ring_cleanup(struct i
- {
- 	struct drm_device *dev = ring->dev;
- 
--	if (!ring->private)
-+	if (ring->scratch.obj == NULL)
- 		return;
- 
--	if (HAS_BROKEN_CS_TLB(dev))
--		drm_gem_object_unreference(to_gem_object(ring->private));
--
--	if (INTEL_INFO(dev)->gen >= 5)
--		cleanup_pipe_control(ring);
-+	if (INTEL_INFO(dev)->gen >= 5) {
-+		kunmap(sg_page(ring->scratch.obj->pages->sgl));
-+		i915_gem_object_unpin(ring->scratch.obj);
-+	}
- 
--	ring->private = NULL;
-+	drm_gem_object_unreference(&ring->scratch.obj->base);
-+	ring->scratch.obj = NULL;
- }
- 
- static void
-@@ -742,8 +704,7 @@ do {									\
- static int
- pc_render_add_request(struct intel_ring_buffer *ring)
- {
--	struct pipe_control *pc = ring->private;
--	u32 scratch_addr = pc->gtt_offset + 128;
-+	u32 scratch_addr = ring->scratch.gtt_offset + 128;
- 	int ret;
- 
- 	/* For Ironlake, MI_USER_INTERRUPT was deprecated and apparently
-@@ -761,7 +722,7 @@ pc_render_add_request(struct intel_ring_
- 	intel_ring_emit(ring, GFX_OP_PIPE_CONTROL(4) | PIPE_CONTROL_QW_WRITE |
- 			PIPE_CONTROL_WRITE_FLUSH |
- 			PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE);
--	intel_ring_emit(ring, pc->gtt_offset | PIPE_CONTROL_GLOBAL_GTT);
-+	intel_ring_emit(ring, ring->scratch.gtt_offset | PIPE_CONTROL_GLOBAL_GTT);
- 	intel_ring_emit(ring, ring->outstanding_lazy_request);
- 	intel_ring_emit(ring, 0);
- 	PIPE_CONTROL_FLUSH(ring, scratch_addr);
-@@ -780,7 +741,7 @@ pc_render_add_request(struct intel_ring_
- 			PIPE_CONTROL_WRITE_FLUSH |
- 			PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE |
- 			PIPE_CONTROL_NOTIFY);
--	intel_ring_emit(ring, pc->gtt_offset | PIPE_CONTROL_GLOBAL_GTT);
-+	intel_ring_emit(ring, ring->scratch.gtt_offset | PIPE_CONTROL_GLOBAL_GTT);
- 	intel_ring_emit(ring, ring->outstanding_lazy_request);
- 	intel_ring_emit(ring, 0);
- 	intel_ring_advance(ring);
-@@ -814,15 +775,13 @@ ring_set_seqno(struct intel_ring_buffer
- static u32
- pc_render_get_seqno(struct intel_ring_buffer *ring, bool lazy_coherency)
- {
--	struct pipe_control *pc = ring->private;
--	return pc->cpu_page[0];
-+	return ring->scratch.cpu_page[0];
- }
- 
- static void
- pc_render_set_seqno(struct intel_ring_buffer *ring, u32 seqno)
- {
--	struct pipe_control *pc = ring->private;
--	pc->cpu_page[0] = seqno;
-+	ring->scratch.cpu_page[0] = seqno;
- }
- 
- static bool
-@@ -1141,8 +1100,7 @@ i830_dispatch_execbuffer(struct intel_ri
- 		intel_ring_emit(ring, MI_NOOP);
- 		intel_ring_advance(ring);
- 	} else {
--		struct drm_i915_gem_object *obj = ring->private;
--		u32 cs_offset = i915_gem_obj_ggtt_offset(obj);
-+		u32 cs_offset = ring->scratch.gtt_offset;
- 
- 		if (len > I830_BATCH_LIMIT)
- 			return -ENOSPC;
-@@ -1839,7 +1797,8 @@ int intel_init_render_ring_buffer(struct
- 			return ret;
- 		}
- 
--		ring->private = obj;
-+		ring->scratch.obj = obj;
-+		ring->scratch.gtt_offset = i915_gem_obj_ggtt_offset(obj);
- 	}
- 
- 	return intel_init_ring_buffer(dev, ring);
---- a/drivers/gpu/drm/i915/intel_ringbuffer.h
-+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
-@@ -155,7 +155,11 @@ struct  intel_ring_buffer {
- 
- 	struct intel_ring_hangcheck hangcheck;
- 
--	void *private;
-+	struct {
-+		struct drm_i915_gem_object *obj;
-+		u32 gtt_offset;
-+		volatile u32 *cpu_page;
-+	} scratch;
- };
- 
- static inline bool
diff --git a/patches.baytrail/0749-drm-i915-Use-RCS-flips-on-Ivybridge.patch b/patches.baytrail/0749-drm-i915-Use-RCS-flips-on-Ivybridge.patch
deleted file mode 100644
index 7bd57916de94b..0000000000000
--- a/patches.baytrail/0749-drm-i915-Use-RCS-flips-on-Ivybridge.patch
+++ /dev/null
@@ -1,139 +0,0 @@
-From d23382f3305731e890eb4b2f8a6f8297b7b3d2f9 Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Mon, 26 Aug 2013 20:58:12 +0100
-Subject: drm/i915: Use RCS flips on Ivybridge+
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-RCS flips do work on Iybridge+ so long as we can unmask the messages
-through DERRMR. However, there are quite a few workarounds mentioned
-regarding unmasking more than one event or triggering more than one
-message through DERRMR. Those workarounds in principle prevent us from
-performing pipelined flips (and asynchronous flips across multiple
-planes) and equally apply to the "known good" BCS ring. Given that it
-already appears to work, and also appears to work with unmasking all 3
-planes at once (and queuing flips across multiple planes), be brave.
-
-Bugzlla: https://bugs.freedesktop.org/show_bug.cgi?id=67600
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Lightly-tested-by: Stephane Marchesin <marchesin@icps.u-strasbg.fr>
-Cc: Stephane Marchesin <marchesin@icps.u-strasbg.fr>
-Cc: Ben Widawsky <ben@bwidawsk.net>
-Tested-by: Stéphane Marchesin <marcheu@chromium.org>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit ffe74d75502e3a9b0791240b5562bcbecc6ab8dc)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_reg.h      | 18 ++++++++++++++++
- drivers/gpu/drm/i915/intel_display.c | 40 ++++++++++++++++++++++++++++--------
- 2 files changed, 49 insertions(+), 9 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
-index b6a58f720f9a..b2fa2a4c4454 100644
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -245,6 +245,7 @@
-  *   address/value pairs. Don't overdue it, though, x <= 2^4 must hold!
-  */
- #define MI_LOAD_REGISTER_IMM(x)	MI_INSTR(0x22, 2*x-1)
-+#define MI_STORE_REGISTER_MEM(x) MI_INSTR(0x24, 2*x-1)
- #define MI_FLUSH_DW		MI_INSTR(0x26, 1) /* for GEN6 */
- #define   MI_FLUSH_DW_STORE_INDEX	(1<<21)
- #define   MI_INVALIDATE_TLB		(1<<18)
-@@ -693,6 +694,23 @@
- #define   FPGA_DBG_RM_NOCLAIM	(1<<31)
- 
- #define DERRMR		0x44050
-+#define   DERRMR_PIPEA_SCANLINE		(1<<0)
-+#define   DERRMR_PIPEA_PRI_FLIP_DONE	(1<<1)
-+#define   DERRMR_PIPEA_SPR_FLIP_DONE	(1<<2)
-+#define   DERRMR_PIPEA_VBLANK		(1<<3)
-+#define   DERRMR_PIPEA_HBLANK		(1<<5)
-+#define   DERRMR_PIPEB_SCANLINE 	(1<<8)
-+#define   DERRMR_PIPEB_PRI_FLIP_DONE	(1<<9)
-+#define   DERRMR_PIPEB_SPR_FLIP_DONE	(1<<10)
-+#define   DERRMR_PIPEB_VBLANK		(1<<11)
-+#define   DERRMR_PIPEB_HBLANK		(1<<13)
-+/* Note that PIPEC is not a simple translation of PIPEA/PIPEB */
-+#define   DERRMR_PIPEC_SCANLINE		(1<<14)
-+#define   DERRMR_PIPEC_PRI_FLIP_DONE	(1<<15)
-+#define   DERRMR_PIPEC_SPR_FLIP_DONE	(1<<20)
-+#define   DERRMR_PIPEC_VBLANK		(1<<21)
-+#define   DERRMR_PIPEC_HBLANK		(1<<22)
-+
- 
- /* GM45+ chicken bits -- debug workaround bits that may be required
-  * for various sorts of correct behavior.  The top 16 bits of each are
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 2ed6214010c6..b27738d0b49d 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -7832,12 +7832,6 @@ err:
- 	return ret;
- }
- 
--/*
-- * On gen7 we currently use the blit ring because (in early silicon at least)
-- * the render ring doesn't give us interrpts for page flip completion, which
-- * means clients will hang after the first flip is queued.  Fortunately the
-- * blit ring generates interrupts properly, so use it instead.
-- */
- static int intel_gen7_queue_flip(struct drm_device *dev,
- 				 struct drm_crtc *crtc,
- 				 struct drm_framebuffer *fb,
-@@ -7846,9 +7840,13 @@ static int intel_gen7_queue_flip(struct drm_device *dev,
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
--	struct intel_ring_buffer *ring = &dev_priv->ring[BCS];
-+	struct intel_ring_buffer *ring;
- 	uint32_t plane_bit = 0;
--	int ret;
-+	int len, ret;
-+
-+	ring = obj->ring;
-+	if (ring == NULL || ring->id != RCS)
-+		ring = &dev_priv->ring[BCS];
- 
- 	ret = intel_pin_and_fence_fb_obj(dev, obj, ring);
- 	if (ret)
-@@ -7870,10 +7868,34 @@ static int intel_gen7_queue_flip(struct drm_device *dev,
- 		goto err_unpin;
- 	}
- 
--	ret = intel_ring_begin(ring, 4);
-+	len = 4;
-+	if (ring->id == RCS)
-+		len += 6;
-+
-+	ret = intel_ring_begin(ring, len);
- 	if (ret)
- 		goto err_unpin;
- 
-+	/* Unmask the flip-done completion message. Note that the bspec says that
-+	 * we should do this for both the BCS and RCS, and that we must not unmask
-+	 * more than one flip event at any time (or ensure that one flip message
-+	 * can be sent by waiting for flip-done prior to queueing new flips).
-+	 * Experimentation says that BCS works despite DERRMR masking all
-+	 * flip-done completion events and that unmasking all planes at once
-+	 * for the RCS also doesn't appear to drop events. Setting the DERRMR
-+	 * to zero does lead to lockups within MI_DISPLAY_FLIP.
-+	 */
-+	if (ring->id == RCS) {
-+		intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1));
-+		intel_ring_emit(ring, DERRMR);
-+		intel_ring_emit(ring, ~(DERRMR_PIPEA_PRI_FLIP_DONE |
-+					DERRMR_PIPEB_PRI_FLIP_DONE |
-+					DERRMR_PIPEC_PRI_FLIP_DONE));
-+		intel_ring_emit(ring, MI_STORE_REGISTER_MEM(1));
-+		intel_ring_emit(ring, DERRMR);
-+		intel_ring_emit(ring, ring->scratch.gtt_offset + 256);
-+	}
-+
- 	intel_ring_emit(ring, MI_DISPLAY_FLIP_I915 | plane_bit);
- 	intel_ring_emit(ring, (fb->pitches[0] | obj->tiling_mode));
- 	intel_ring_emit(ring, i915_gem_obj_ggtt_offset(obj) + intel_crtc->dspaddr_offset);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0750-i915_gem-Convert-kmem_cache_alloc-.GFP_ZERO-to-kmem_.patch b/patches.baytrail/0750-i915_gem-Convert-kmem_cache_alloc-.GFP_ZERO-to-kmem_.patch
deleted file mode 100644
index 180daa16ffd4a..0000000000000
--- a/patches.baytrail/0750-i915_gem-Convert-kmem_cache_alloc-.GFP_ZERO-to-kmem_.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From 82e887441d15ff185652ee7a16f3f589559fb052 Mon Sep 17 00:00:00 2001
-From: Joe Perches <joe@perches.com>
-Date: Thu, 29 Aug 2013 13:11:07 -0700
-Subject: i915_gem: Convert kmem_cache_alloc(...GFP_ZERO) to kmem_cache_zalloc
-
-The helper exists, might as well use it instead of __GFP_ZERO.
-
-Signed-off-by: Joe Perches <joe@perches.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit fac15c108248e8d592fb8f4cbcf26d98b3485526)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index 2d1cb10d846f..61313054fce6 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -212,7 +212,7 @@ i915_gem_get_aperture_ioctl(struct drm_device *dev, void *data,
- void *i915_gem_object_alloc(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
--	return kmem_cache_alloc(dev_priv->slab, GFP_KERNEL | __GFP_ZERO);
-+	return kmem_cache_zalloc(dev_priv->slab, GFP_KERNEL);
- }
- 
- void i915_gem_object_free(struct drm_i915_gem_object *obj)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0751-drm-i915-split-PCI-IDs-out-into-i915_drm.h-v4.patch b/patches.baytrail/0751-drm-i915-split-PCI-IDs-out-into-i915_drm.h-v4.patch
deleted file mode 100644
index 7f39724fc31e2..0000000000000
--- a/patches.baytrail/0751-drm-i915-split-PCI-IDs-out-into-i915_drm.h-v4.patch
+++ /dev/null
@@ -1,444 +0,0 @@
-From 8fcdd52b91ace48187d374503504329730e76bbd Mon Sep 17 00:00:00 2001
-From: Jesse Barnes <jbarnes@virtuousgeek.org>
-Date: Fri, 26 Jul 2013 13:32:51 -0700
-Subject: drm/i915: split PCI IDs out into i915_drm.h v4
-
-For use by userspace (at some point in the future) and other kernel code.
-
-v2: move PCI IDs to uabi (Chris)
-    move PCI IDs to drm/ (Dave)
-v3: fixup Quanta detection - needs to come first (Daniel)
-v4: fix up PCI match structure init for easier use by userspace (Chris)
-
-Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit a0a1807544fe59b42d3760ee912ea4c6741298f5)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.c | 164 +++++++------------------------
- include/drm/i915_drm.h          |   2 +
- include/drm/i915_pciids.h       | 211 ++++++++++++++++++++++++++++++++++++++++
- 3 files changed, 247 insertions(+), 130 deletions(-)
- create mode 100644 include/drm/i915_pciids.h
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
-index ccb28ead3501..69d8ed5416c3 100644
---- a/drivers/gpu/drm/i915/i915_drv.c
-+++ b/drivers/gpu/drm/i915/i915_drv.c
-@@ -157,25 +157,6 @@ MODULE_PARM_DESC(prefault_disable,
- static struct drm_driver driver;
- extern int intel_agp_enabled;
- 
--#define INTEL_VGA_DEVICE(id, info) {		\
--	.class = PCI_BASE_CLASS_DISPLAY << 16,	\
--	.class_mask = 0xff0000,			\
--	.vendor = 0x8086,			\
--	.device = id,				\
--	.subvendor = PCI_ANY_ID,		\
--	.subdevice = PCI_ANY_ID,		\
--	.driver_data = (unsigned long) info }
--
--#define INTEL_QUANTA_VGA_DEVICE(info) {		\
--	.class = PCI_BASE_CLASS_DISPLAY << 16,	\
--	.class_mask = 0xff0000,			\
--	.vendor = 0x8086,			\
--	.device = 0x16a,			\
--	.subvendor = 0x152d,			\
--	.subdevice = 0x8990,			\
--	.driver_data = (unsigned long) info }
--
--
- static const struct intel_device_info intel_i830_info = {
- 	.gen = 2, .is_mobile = 1, .cursor_needs_physical = 1, .num_pipes = 2,
- 	.has_overlay = 1, .overlay_needs_physical = 1,
-@@ -350,118 +331,41 @@ static const struct intel_device_info intel_haswell_m_info = {
- 	.has_vebox_ring = 1,
- };
- 
-+/*
-+ * Make sure any device matches here are from most specific to most
-+ * general.  For example, since the Quanta match is based on the subsystem
-+ * and subvendor IDs, we need it to come before the more general IVB
-+ * PCI ID matches, otherwise we'll use the wrong info struct above.
-+ */
-+#define INTEL_PCI_IDS \
-+	INTEL_I830_IDS(&intel_i830_info),	\
-+	INTEL_I845G_IDS(&intel_845g_info),	\
-+	INTEL_I85X_IDS(&intel_i85x_info),	\
-+	INTEL_I865G_IDS(&intel_i865g_info),	\
-+	INTEL_I915G_IDS(&intel_i915g_info),	\
-+	INTEL_I915GM_IDS(&intel_i915gm_info),	\
-+	INTEL_I945G_IDS(&intel_i945g_info),	\
-+	INTEL_I945GM_IDS(&intel_i945gm_info),	\
-+	INTEL_I965G_IDS(&intel_i965g_info),	\
-+	INTEL_G33_IDS(&intel_g33_info),		\
-+	INTEL_I965GM_IDS(&intel_i965gm_info),	\
-+	INTEL_GM45_IDS(&intel_gm45_info), 	\
-+	INTEL_G45_IDS(&intel_g45_info), 	\
-+	INTEL_PINEVIEW_IDS(&intel_pineview_info),	\
-+	INTEL_IRONLAKE_D_IDS(&intel_ironlake_d_info),	\
-+	INTEL_IRONLAKE_M_IDS(&intel_ironlake_m_info),	\
-+	INTEL_SNB_D_IDS(&intel_sandybridge_d_info),	\
-+	INTEL_SNB_M_IDS(&intel_sandybridge_m_info),	\
-+	INTEL_IVB_Q_IDS(&intel_ivybridge_q_info), /* must be first IVB */ \
-+	INTEL_IVB_M_IDS(&intel_ivybridge_m_info),	\
-+	INTEL_IVB_D_IDS(&intel_ivybridge_d_info),	\
-+	INTEL_HSW_D_IDS(&intel_haswell_d_info), \
-+	INTEL_HSW_M_IDS(&intel_haswell_m_info), \
-+	INTEL_VLV_M_IDS(&intel_valleyview_m_info),	\
-+	INTEL_VLV_D_IDS(&intel_valleyview_d_info)
-+
- static const struct pci_device_id pciidlist[] = {		/* aka */
--	INTEL_VGA_DEVICE(0x3577, &intel_i830_info),		/* I830_M */
--	INTEL_VGA_DEVICE(0x2562, &intel_845g_info),		/* 845_G */
--	INTEL_VGA_DEVICE(0x3582, &intel_i85x_info),		/* I855_GM */
--	INTEL_VGA_DEVICE(0x358e, &intel_i85x_info),
--	INTEL_VGA_DEVICE(0x2572, &intel_i865g_info),		/* I865_G */
--	INTEL_VGA_DEVICE(0x2582, &intel_i915g_info),		/* I915_G */
--	INTEL_VGA_DEVICE(0x258a, &intel_i915g_info),		/* E7221_G */
--	INTEL_VGA_DEVICE(0x2592, &intel_i915gm_info),		/* I915_GM */
--	INTEL_VGA_DEVICE(0x2772, &intel_i945g_info),		/* I945_G */
--	INTEL_VGA_DEVICE(0x27a2, &intel_i945gm_info),		/* I945_GM */
--	INTEL_VGA_DEVICE(0x27ae, &intel_i945gm_info),		/* I945_GME */
--	INTEL_VGA_DEVICE(0x2972, &intel_i965g_info),		/* I946_GZ */
--	INTEL_VGA_DEVICE(0x2982, &intel_i965g_info),		/* G35_G */
--	INTEL_VGA_DEVICE(0x2992, &intel_i965g_info),		/* I965_Q */
--	INTEL_VGA_DEVICE(0x29a2, &intel_i965g_info),		/* I965_G */
--	INTEL_VGA_DEVICE(0x29b2, &intel_g33_info),		/* Q35_G */
--	INTEL_VGA_DEVICE(0x29c2, &intel_g33_info),		/* G33_G */
--	INTEL_VGA_DEVICE(0x29d2, &intel_g33_info),		/* Q33_G */
--	INTEL_VGA_DEVICE(0x2a02, &intel_i965gm_info),		/* I965_GM */
--	INTEL_VGA_DEVICE(0x2a12, &intel_i965gm_info),		/* I965_GME */
--	INTEL_VGA_DEVICE(0x2a42, &intel_gm45_info),		/* GM45_G */
--	INTEL_VGA_DEVICE(0x2e02, &intel_g45_info),		/* IGD_E_G */
--	INTEL_VGA_DEVICE(0x2e12, &intel_g45_info),		/* Q45_G */
--	INTEL_VGA_DEVICE(0x2e22, &intel_g45_info),		/* G45_G */
--	INTEL_VGA_DEVICE(0x2e32, &intel_g45_info),		/* G41_G */
--	INTEL_VGA_DEVICE(0x2e42, &intel_g45_info),		/* B43_G */
--	INTEL_VGA_DEVICE(0x2e92, &intel_g45_info),		/* B43_G.1 */
--	INTEL_VGA_DEVICE(0xa001, &intel_pineview_info),
--	INTEL_VGA_DEVICE(0xa011, &intel_pineview_info),
--	INTEL_VGA_DEVICE(0x0042, &intel_ironlake_d_info),
--	INTEL_VGA_DEVICE(0x0046, &intel_ironlake_m_info),
--	INTEL_VGA_DEVICE(0x0102, &intel_sandybridge_d_info),
--	INTEL_VGA_DEVICE(0x0112, &intel_sandybridge_d_info),
--	INTEL_VGA_DEVICE(0x0122, &intel_sandybridge_d_info),
--	INTEL_VGA_DEVICE(0x0106, &intel_sandybridge_m_info),
--	INTEL_VGA_DEVICE(0x0116, &intel_sandybridge_m_info),
--	INTEL_VGA_DEVICE(0x0126, &intel_sandybridge_m_info),
--	INTEL_VGA_DEVICE(0x010A, &intel_sandybridge_d_info),
--	INTEL_VGA_DEVICE(0x0156, &intel_ivybridge_m_info), /* GT1 mobile */
--	INTEL_VGA_DEVICE(0x0166, &intel_ivybridge_m_info), /* GT2 mobile */
--	INTEL_VGA_DEVICE(0x0152, &intel_ivybridge_d_info), /* GT1 desktop */
--	INTEL_VGA_DEVICE(0x0162, &intel_ivybridge_d_info), /* GT2 desktop */
--	INTEL_VGA_DEVICE(0x015a, &intel_ivybridge_d_info), /* GT1 server */
--	INTEL_QUANTA_VGA_DEVICE(&intel_ivybridge_q_info), /* Quanta transcode */
--	INTEL_VGA_DEVICE(0x016a, &intel_ivybridge_d_info), /* GT2 server */
--	INTEL_VGA_DEVICE(0x0402, &intel_haswell_d_info), /* GT1 desktop */
--	INTEL_VGA_DEVICE(0x0412, &intel_haswell_d_info), /* GT2 desktop */
--	INTEL_VGA_DEVICE(0x0422, &intel_haswell_d_info), /* GT3 desktop */
--	INTEL_VGA_DEVICE(0x040a, &intel_haswell_d_info), /* GT1 server */
--	INTEL_VGA_DEVICE(0x041a, &intel_haswell_d_info), /* GT2 server */
--	INTEL_VGA_DEVICE(0x042a, &intel_haswell_d_info), /* GT3 server */
--	INTEL_VGA_DEVICE(0x0406, &intel_haswell_m_info), /* GT1 mobile */
--	INTEL_VGA_DEVICE(0x0416, &intel_haswell_m_info), /* GT2 mobile */
--	INTEL_VGA_DEVICE(0x0426, &intel_haswell_m_info), /* GT2 mobile */
--	INTEL_VGA_DEVICE(0x040B, &intel_haswell_d_info), /* GT1 reserved */
--	INTEL_VGA_DEVICE(0x041B, &intel_haswell_d_info), /* GT2 reserved */
--	INTEL_VGA_DEVICE(0x042B, &intel_haswell_d_info), /* GT3 reserved */
--	INTEL_VGA_DEVICE(0x040E, &intel_haswell_d_info), /* GT1 reserved */
--	INTEL_VGA_DEVICE(0x041E, &intel_haswell_d_info), /* GT2 reserved */
--	INTEL_VGA_DEVICE(0x042E, &intel_haswell_d_info), /* GT3 reserved */
--	INTEL_VGA_DEVICE(0x0C02, &intel_haswell_d_info), /* SDV GT1 desktop */
--	INTEL_VGA_DEVICE(0x0C12, &intel_haswell_d_info), /* SDV GT2 desktop */
--	INTEL_VGA_DEVICE(0x0C22, &intel_haswell_d_info), /* SDV GT3 desktop */
--	INTEL_VGA_DEVICE(0x0C0A, &intel_haswell_d_info), /* SDV GT1 server */
--	INTEL_VGA_DEVICE(0x0C1A, &intel_haswell_d_info), /* SDV GT2 server */
--	INTEL_VGA_DEVICE(0x0C2A, &intel_haswell_d_info), /* SDV GT3 server */
--	INTEL_VGA_DEVICE(0x0C06, &intel_haswell_m_info), /* SDV GT1 mobile */
--	INTEL_VGA_DEVICE(0x0C16, &intel_haswell_m_info), /* SDV GT2 mobile */
--	INTEL_VGA_DEVICE(0x0C26, &intel_haswell_m_info), /* SDV GT3 mobile */
--	INTEL_VGA_DEVICE(0x0C0B, &intel_haswell_d_info), /* SDV GT1 reserved */
--	INTEL_VGA_DEVICE(0x0C1B, &intel_haswell_d_info), /* SDV GT2 reserved */
--	INTEL_VGA_DEVICE(0x0C2B, &intel_haswell_d_info), /* SDV GT3 reserved */
--	INTEL_VGA_DEVICE(0x0C0E, &intel_haswell_d_info), /* SDV GT1 reserved */
--	INTEL_VGA_DEVICE(0x0C1E, &intel_haswell_d_info), /* SDV GT2 reserved */
--	INTEL_VGA_DEVICE(0x0C2E, &intel_haswell_d_info), /* SDV GT3 reserved */
--	INTEL_VGA_DEVICE(0x0A02, &intel_haswell_d_info), /* ULT GT1 desktop */
--	INTEL_VGA_DEVICE(0x0A12, &intel_haswell_d_info), /* ULT GT2 desktop */
--	INTEL_VGA_DEVICE(0x0A22, &intel_haswell_d_info), /* ULT GT3 desktop */
--	INTEL_VGA_DEVICE(0x0A0A, &intel_haswell_d_info), /* ULT GT1 server */
--	INTEL_VGA_DEVICE(0x0A1A, &intel_haswell_d_info), /* ULT GT2 server */
--	INTEL_VGA_DEVICE(0x0A2A, &intel_haswell_d_info), /* ULT GT3 server */
--	INTEL_VGA_DEVICE(0x0A06, &intel_haswell_m_info), /* ULT GT1 mobile */
--	INTEL_VGA_DEVICE(0x0A16, &intel_haswell_m_info), /* ULT GT2 mobile */
--	INTEL_VGA_DEVICE(0x0A26, &intel_haswell_m_info), /* ULT GT3 mobile */
--	INTEL_VGA_DEVICE(0x0A0B, &intel_haswell_d_info), /* ULT GT1 reserved */
--	INTEL_VGA_DEVICE(0x0A1B, &intel_haswell_d_info), /* ULT GT2 reserved */
--	INTEL_VGA_DEVICE(0x0A2B, &intel_haswell_d_info), /* ULT GT3 reserved */
--	INTEL_VGA_DEVICE(0x0A0E, &intel_haswell_m_info), /* ULT GT1 reserved */
--	INTEL_VGA_DEVICE(0x0A1E, &intel_haswell_m_info), /* ULT GT2 reserved */
--	INTEL_VGA_DEVICE(0x0A2E, &intel_haswell_m_info), /* ULT GT3 reserved */
--	INTEL_VGA_DEVICE(0x0D02, &intel_haswell_d_info), /* CRW GT1 desktop */
--	INTEL_VGA_DEVICE(0x0D12, &intel_haswell_d_info), /* CRW GT2 desktop */
--	INTEL_VGA_DEVICE(0x0D22, &intel_haswell_d_info), /* CRW GT3 desktop */
--	INTEL_VGA_DEVICE(0x0D0A, &intel_haswell_d_info), /* CRW GT1 server */
--	INTEL_VGA_DEVICE(0x0D1A, &intel_haswell_d_info), /* CRW GT2 server */
--	INTEL_VGA_DEVICE(0x0D2A, &intel_haswell_d_info), /* CRW GT3 server */
--	INTEL_VGA_DEVICE(0x0D06, &intel_haswell_m_info), /* CRW GT1 mobile */
--	INTEL_VGA_DEVICE(0x0D16, &intel_haswell_m_info), /* CRW GT2 mobile */
--	INTEL_VGA_DEVICE(0x0D26, &intel_haswell_m_info), /* CRW GT3 mobile */
--	INTEL_VGA_DEVICE(0x0D0B, &intel_haswell_d_info), /* CRW GT1 reserved */
--	INTEL_VGA_DEVICE(0x0D1B, &intel_haswell_d_info), /* CRW GT2 reserved */
--	INTEL_VGA_DEVICE(0x0D2B, &intel_haswell_d_info), /* CRW GT3 reserved */
--	INTEL_VGA_DEVICE(0x0D0E, &intel_haswell_d_info), /* CRW GT1 reserved */
--	INTEL_VGA_DEVICE(0x0D1E, &intel_haswell_d_info), /* CRW GT2 reserved */
--	INTEL_VGA_DEVICE(0x0D2E, &intel_haswell_d_info), /* CRW GT3 reserved */
--	INTEL_VGA_DEVICE(0x0f30, &intel_valleyview_m_info),
--	INTEL_VGA_DEVICE(0x0f31, &intel_valleyview_m_info),
--	INTEL_VGA_DEVICE(0x0f32, &intel_valleyview_m_info),
--	INTEL_VGA_DEVICE(0x0f33, &intel_valleyview_m_info),
--	INTEL_VGA_DEVICE(0x0157, &intel_valleyview_m_info),
--	INTEL_VGA_DEVICE(0x0155, &intel_valleyview_d_info),
-+	INTEL_PCI_IDS,
- 	{0, 0, 0}
- };
- 
-diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h
-index 63d609d8a3f6..7276a72710e2 100644
---- a/include/drm/i915_drm.h
-+++ b/include/drm/i915_drm.h
-@@ -26,6 +26,7 @@
- #ifndef _I915_DRM_H_
- #define _I915_DRM_H_
- 
-+#include <drm/i915_pciids.h>
- #include <uapi/drm/i915_drm.h>
- 
- /* For use by IPS driver */
-@@ -34,4 +35,5 @@ extern bool i915_gpu_raise(void);
- extern bool i915_gpu_lower(void);
- extern bool i915_gpu_busy(void);
- extern bool i915_gpu_turbo_disable(void);
-+
- #endif				/* _I915_DRM_H_ */
-diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
-new file mode 100644
-index 000000000000..8a10f5c354e6
---- /dev/null
-+++ b/include/drm/i915_pciids.h
-@@ -0,0 +1,211 @@
-+/*
-+ * Copyright 2013 Intel Corporation
-+ * All Rights Reserved.
-+ *
-+ * Permission is hereby granted, free of charge, to any person obtaining a
-+ * copy of this software and associated documentation files (the
-+ * "Software"), to deal in the Software without restriction, including
-+ * without limitation the rights to use, copy, modify, merge, publish,
-+ * distribute, sub license, and/or sell copies of the Software, and to
-+ * permit persons to whom the Software is furnished to do so, subject to
-+ * the following conditions:
-+ *
-+ * The above copyright notice and this permission notice (including the
-+ * next paragraph) shall be included in all copies or substantial portions
-+ * of the Software.
-+ *
-+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
-+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
-+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
-+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
-+ * DEALINGS IN THE SOFTWARE.
-+ */
-+#ifndef _I915_PCIIDS_H
-+#define _I915_PCIIDS_H
-+
-+/*
-+ * A pci_device_id struct {
-+ *	__u32 vendor, device;
-+ *      __u32 subvendor, subdevice;
-+ *	__u32 class, class_mask;
-+ *	kernel_ulong_t driver_data;
-+ * };
-+ * Don't use C99 here because "class" is reserved and we want to
-+ * give userspace flexibility.
-+ */
-+#define INTEL_VGA_DEVICE(id, info) {		\
-+	0x8086,	id,				\
-+	~0, ~0,					\
-+	0x030000, 0xff0000,			\
-+	(unsigned long) info }
-+
-+#define INTEL_QUANTA_VGA_DEVICE(info) {		\
-+	0x8086,	0x16a,				\
-+	0x152d,	0x8990,				\
-+	0x030000, 0xff0000,			\
-+	(unsigned long) info }
-+
-+#define INTEL_I830_IDS(info)				\
-+	INTEL_VGA_DEVICE(0x3577, info)
-+
-+#define INTEL_I845G_IDS(info)				\
-+	INTEL_VGA_DEVICE(0x2562, info)
-+
-+#define INTEL_I85X_IDS(info)				\
-+	INTEL_VGA_DEVICE(0x3582, info), /* I855_GM */ \
-+	INTEL_VGA_DEVICE(0x358e, info)
-+
-+#define INTEL_I865G_IDS(info)				\
-+	INTEL_VGA_DEVICE(0x2572, info) /* I865_G */
-+
-+#define INTEL_I915G_IDS(info)				\
-+	INTEL_VGA_DEVICE(0x2582, info), /* I915_G */ \
-+	INTEL_VGA_DEVICE(0x258a, info)  /* E7221_G */
-+
-+#define INTEL_I915GM_IDS(info)				\
-+	INTEL_VGA_DEVICE(0x2592, info) /* I915_GM */
-+
-+#define INTEL_I945G_IDS(info)				\
-+	INTEL_VGA_DEVICE(0x2772, info) /* I945_G */
-+
-+#define INTEL_I945GM_IDS(info)				\
-+	INTEL_VGA_DEVICE(0x27a2, info), /* I945_GM */ \
-+	INTEL_VGA_DEVICE(0x27ae, info)  /* I945_GME */
-+
-+#define INTEL_I965G_IDS(info)				\
-+	INTEL_VGA_DEVICE(0x2972, info), /* I946_GZ */	\
-+	INTEL_VGA_DEVICE(0x2982, info),	/* G35_G */	\
-+	INTEL_VGA_DEVICE(0x2992, info),	/* I965_Q */	\
-+	INTEL_VGA_DEVICE(0x29a2, info)	/* I965_G */
-+
-+#define INTEL_G33_IDS(info)				\
-+	INTEL_VGA_DEVICE(0x29b2, info), /* Q35_G */ \
-+	INTEL_VGA_DEVICE(0x29c2, info),	/* G33_G */ \
-+	INTEL_VGA_DEVICE(0x29d2, info)	/* Q33_G */
-+
-+#define INTEL_I965GM_IDS(info)				\
-+	INTEL_VGA_DEVICE(0x2a02, info),	/* I965_GM */ \
-+	INTEL_VGA_DEVICE(0x2a12, info)  /* I965_GME */
-+
-+#define INTEL_GM45_IDS(info)				\
-+	INTEL_VGA_DEVICE(0x2a42, info) /* GM45_G */
-+
-+#define INTEL_G45_IDS(info)				\
-+	INTEL_VGA_DEVICE(0x2e02, info), /* IGD_E_G */ \
-+	INTEL_VGA_DEVICE(0x2e12, info), /* Q45_G */ \
-+	INTEL_VGA_DEVICE(0x2e22, info), /* G45_G */ \
-+	INTEL_VGA_DEVICE(0x2e32, info), /* G41_G */ \
-+	INTEL_VGA_DEVICE(0x2e42, info), /* B43_G */ \
-+	INTEL_VGA_DEVICE(0x2e92, info)	/* B43_G.1 */
-+
-+#define INTEL_PINEVIEW_IDS(info)			\
-+	INTEL_VGA_DEVICE(0xa001, info),			\
-+	INTEL_VGA_DEVICE(0xa011, info)
-+
-+#define INTEL_IRONLAKE_D_IDS(info) \
-+	INTEL_VGA_DEVICE(0x0042, info)
-+
-+#define INTEL_IRONLAKE_M_IDS(info) \
-+	INTEL_VGA_DEVICE(0x0046, info)
-+
-+#define INTEL_SNB_D_IDS(info) \
-+	INTEL_VGA_DEVICE(0x0102, info), \
-+	INTEL_VGA_DEVICE(0x0112, info), \
-+	INTEL_VGA_DEVICE(0x0122, info), \
-+	INTEL_VGA_DEVICE(0x010A, info)
-+
-+#define INTEL_SNB_M_IDS(info) \
-+	INTEL_VGA_DEVICE(0x0106, info), \
-+	INTEL_VGA_DEVICE(0x0116, info), \
-+	INTEL_VGA_DEVICE(0x0126, info)
-+
-+#define INTEL_IVB_M_IDS(info) \
-+	INTEL_VGA_DEVICE(0x0156, info), /* GT1 mobile */ \
-+	INTEL_VGA_DEVICE(0x0166, info)  /* GT2 mobile */
-+
-+#define INTEL_IVB_D_IDS(info) \
-+	INTEL_VGA_DEVICE(0x0152, info), /* GT1 desktop */ \
-+	INTEL_VGA_DEVICE(0x0162, info), /* GT2 desktop */ \
-+	INTEL_VGA_DEVICE(0x015a, info), /* GT1 server */ \
-+	INTEL_VGA_DEVICE(0x016a, info)  /* GT2 server */
-+
-+#define INTEL_IVB_Q_IDS(info) \
-+	INTEL_QUANTA_VGA_DEVICE(info) /* Quanta transcode */
-+
-+#define INTEL_HSW_D_IDS(info) \
-+	INTEL_VGA_DEVICE(0x0402, info), /* GT1 desktop */ \
-+	INTEL_VGA_DEVICE(0x0412, info), /* GT2 desktop */ \
-+	INTEL_VGA_DEVICE(0x0422, info), /* GT3 desktop */ \
-+	INTEL_VGA_DEVICE(0x040a, info), /* GT1 server */ \
-+	INTEL_VGA_DEVICE(0x041a, info), /* GT2 server */ \
-+	INTEL_VGA_DEVICE(0x042a, info), /* GT3 server */ \
-+	INTEL_VGA_DEVICE(0x040B, info), /* GT1 reserved */ \
-+	INTEL_VGA_DEVICE(0x041B, info), /* GT2 reserved */ \
-+	INTEL_VGA_DEVICE(0x042B, info), /* GT3 reserved */ \
-+	INTEL_VGA_DEVICE(0x040E, info), /* GT1 reserved */ \
-+	INTEL_VGA_DEVICE(0x041E, info), /* GT2 reserved */ \
-+	INTEL_VGA_DEVICE(0x042E, info), /* GT3 reserved */ \
-+	INTEL_VGA_DEVICE(0x0C02, info), /* SDV GT1 desktop */ \
-+	INTEL_VGA_DEVICE(0x0C12, info), /* SDV GT2 desktop */ \
-+	INTEL_VGA_DEVICE(0x0C22, info), /* SDV GT3 desktop */ \
-+	INTEL_VGA_DEVICE(0x0C0A, info), /* SDV GT1 server */ \
-+	INTEL_VGA_DEVICE(0x0C1A, info), /* SDV GT2 server */ \
-+	INTEL_VGA_DEVICE(0x0C2A, info), /* SDV GT3 server */ \
-+	INTEL_VGA_DEVICE(0x0C0B, info), /* SDV GT1 reserved */ \
-+	INTEL_VGA_DEVICE(0x0C1B, info), /* SDV GT2 reserved */ \
-+	INTEL_VGA_DEVICE(0x0C2B, info), /* SDV GT3 reserved */ \
-+	INTEL_VGA_DEVICE(0x0C0E, info), /* SDV GT1 reserved */ \
-+	INTEL_VGA_DEVICE(0x0C1E, info), /* SDV GT2 reserved */ \
-+	INTEL_VGA_DEVICE(0x0C2E, info), /* SDV GT3 reserved */ \
-+	INTEL_VGA_DEVICE(0x0A02, info), /* ULT GT1 desktop */ \
-+	INTEL_VGA_DEVICE(0x0A12, info), /* ULT GT2 desktop */ \
-+	INTEL_VGA_DEVICE(0x0A22, info), /* ULT GT3 desktop */ \
-+	INTEL_VGA_DEVICE(0x0A0A, info), /* ULT GT1 server */ \
-+	INTEL_VGA_DEVICE(0x0A1A, info), /* ULT GT2 server */ \
-+	INTEL_VGA_DEVICE(0x0A2A, info), /* ULT GT3 server */ \
-+	INTEL_VGA_DEVICE(0x0A0B, info), /* ULT GT1 reserved */ \
-+	INTEL_VGA_DEVICE(0x0A1B, info), /* ULT GT2 reserved */ \
-+	INTEL_VGA_DEVICE(0x0A2B, info), /* ULT GT3 reserved */ \
-+	INTEL_VGA_DEVICE(0x0D02, info), /* CRW GT1 desktop */ \
-+	INTEL_VGA_DEVICE(0x0D12, info), /* CRW GT2 desktop */ \
-+	INTEL_VGA_DEVICE(0x0D22, info), /* CRW GT3 desktop */ \
-+	INTEL_VGA_DEVICE(0x0D0A, info), /* CRW GT1 server */ \
-+	INTEL_VGA_DEVICE(0x0D1A, info), /* CRW GT2 server */ \
-+	INTEL_VGA_DEVICE(0x0D2A, info), /* CRW GT3 server */ \
-+	INTEL_VGA_DEVICE(0x0D0B, info), /* CRW GT1 reserved */ \
-+	INTEL_VGA_DEVICE(0x0D1B, info), /* CRW GT2 reserved */ \
-+	INTEL_VGA_DEVICE(0x0D2B, info), /* CRW GT3 reserved */ \
-+	INTEL_VGA_DEVICE(0x0D0E, info), /* CRW GT1 reserved */ \
-+	INTEL_VGA_DEVICE(0x0D1E, info), /* CRW GT2 reserved */ \
-+	INTEL_VGA_DEVICE(0x0D2E, info)  /* CRW GT3 reserved */ \
-+
-+#define INTEL_HSW_M_IDS(info) \
-+	INTEL_VGA_DEVICE(0x0406, info), /* GT1 mobile */ \
-+	INTEL_VGA_DEVICE(0x0416, info), /* GT2 mobile */ \
-+	INTEL_VGA_DEVICE(0x0426, info), /* GT2 mobile */ \
-+	INTEL_VGA_DEVICE(0x0C06, info), /* SDV GT1 mobile */ \
-+	INTEL_VGA_DEVICE(0x0C16, info), /* SDV GT2 mobile */ \
-+	INTEL_VGA_DEVICE(0x0C26, info), /* SDV GT3 mobile */ \
-+	INTEL_VGA_DEVICE(0x0A06, info), /* ULT GT1 mobile */ \
-+	INTEL_VGA_DEVICE(0x0A16, info), /* ULT GT2 mobile */ \
-+	INTEL_VGA_DEVICE(0x0A26, info), /* ULT GT3 mobile */ \
-+	INTEL_VGA_DEVICE(0x0A0E, info), /* ULT GT1 reserved */ \
-+	INTEL_VGA_DEVICE(0x0A1E, info), /* ULT GT2 reserved */ \
-+	INTEL_VGA_DEVICE(0x0A2E, info), /* ULT GT3 reserved */ \
-+	INTEL_VGA_DEVICE(0x0D06, info), /* CRW GT1 mobile */ \
-+	INTEL_VGA_DEVICE(0x0D16, info), /* CRW GT2 mobile */ \
-+	INTEL_VGA_DEVICE(0x0D26, info)  /* CRW GT3 mobile */
-+
-+#define INTEL_VLV_M_IDS(info) \
-+	INTEL_VGA_DEVICE(0x0f30, info), \
-+	INTEL_VGA_DEVICE(0x0f31, info), \
-+	INTEL_VGA_DEVICE(0x0f32, info), \
-+	INTEL_VGA_DEVICE(0x0f33, info), \
-+	INTEL_VGA_DEVICE(0x0157, info)
-+
-+#define INTEL_VLV_D_IDS(info) \
-+	INTEL_VGA_DEVICE(0x0155, info)
-+
-+#endif /* _I915_PCIIDS_H */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0752-x86-add-early-quirk-for-reserving-Intel-graphics-sto.patch b/patches.baytrail/0752-x86-add-early-quirk-for-reserving-Intel-graphics-sto.patch
deleted file mode 100644
index cfdd2567ba3d6..0000000000000
--- a/patches.baytrail/0752-x86-add-early-quirk-for-reserving-Intel-graphics-sto.patch
+++ /dev/null
@@ -1,285 +0,0 @@
-From a6a880cb0762203b853d8620e47b05dbc7d528fc Mon Sep 17 00:00:00 2001
-From: Jesse Barnes <jbarnes@virtuousgeek.org>
-Date: Fri, 26 Jul 2013 13:32:52 -0700
-Subject: x86: add early quirk for reserving Intel graphics stolen memory v5
-
-Systems with Intel graphics controllers set aside memory exclusively for
-gfx driver use.  This memory is not always marked in the E820 as
-reserved or as RAM, and so is subject to overlap from E820 manipulation
-later in the boot process.  On some systems, MMIO space is allocated on
-top, despite the efforts of the "RAM buffer" approach, which simply
-rounds memory boundaries up to 64M to try to catch space that may decode
-as RAM and so is not suitable for MMIO.
-
-v2: use read_pci_config for 32 bit reads instead of adding a new one
-    (Chris)
-    add gen6 stolen size function (Chris)
-v3: use a function pointer (Chris)
-    drop gen2 bits (Daniel)
-v4: call e820_sanitize_map after adding the region
-v5: fixup comments (Peter)
-    simplify loop (Chris)
-
-Acked-by: Ingo Molnar <mingo@kernel.org>
-Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Acked-by: H. Peter Anvin <hpa@zytor.com>
-Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=66726
-Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=66844
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 814c5f1f52a4beb3710317022acd6ad34fc0b6b9)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- arch/x86/kernel/early-quirks.c  | 154 ++++++++++++++++++++++++++++++++++++++++
- drivers/gpu/drm/i915/i915_reg.h |  15 ----
- include/drm/i915_drm.h          |  32 +++++++++
- 3 files changed, 186 insertions(+), 15 deletions(-)
-
-diff --git a/arch/x86/kernel/early-quirks.c b/arch/x86/kernel/early-quirks.c
-index 63bdb29b2549..b3cd3ebae077 100644
---- a/arch/x86/kernel/early-quirks.c
-+++ b/arch/x86/kernel/early-quirks.c
-@@ -12,6 +12,7 @@
- #include <linux/pci.h>
- #include <linux/acpi.h>
- #include <linux/pci_ids.h>
-+#include <drm/i915_drm.h>
- #include <asm/pci-direct.h>
- #include <asm/dma.h>
- #include <asm/io_apic.h>
-@@ -216,6 +217,157 @@ static void __init intel_remapping_check(int num, int slot, int func)
- 
- }
- 
-+/*
-+ * Systems with Intel graphics controllers set aside memory exclusively
-+ * for gfx driver use.  This memory is not marked in the E820 as reserved
-+ * or as RAM, and so is subject to overlap from E820 manipulation later
-+ * in the boot process.  On some systems, MMIO space is allocated on top,
-+ * despite the efforts of the "RAM buffer" approach, which simply rounds
-+ * memory boundaries up to 64M to try to catch space that may decode
-+ * as RAM and so is not suitable for MMIO.
-+ *
-+ * And yes, so far on current devices the base addr is always under 4G.
-+ */
-+static u32 __init intel_stolen_base(int num, int slot, int func)
-+{
-+	u32 base;
-+
-+	/*
-+	 * For the PCI IDs in this quirk, the stolen base is always
-+	 * in 0x5c, aka the BDSM register (yes that's really what
-+	 * it's called).
-+	 */
-+	base = read_pci_config(num, slot, func, 0x5c);
-+	base &= ~((1<<20) - 1);
-+
-+	return base;
-+}
-+
-+#define KB(x)	((x) * 1024)
-+#define MB(x)	(KB (KB (x)))
-+#define GB(x)	(MB (KB (x)))
-+
-+static size_t __init gen3_stolen_size(int num, int slot, int func)
-+{
-+	size_t stolen_size;
-+	u16 gmch_ctrl;
-+
-+	gmch_ctrl = read_pci_config_16(0, 0, 0, I830_GMCH_CTRL);
-+
-+	switch (gmch_ctrl & I855_GMCH_GMS_MASK) {
-+	case I855_GMCH_GMS_STOLEN_1M:
-+		stolen_size = MB(1);
-+		break;
-+	case I855_GMCH_GMS_STOLEN_4M:
-+		stolen_size = MB(4);
-+		break;
-+	case I855_GMCH_GMS_STOLEN_8M:
-+		stolen_size = MB(8);
-+		break;
-+	case I855_GMCH_GMS_STOLEN_16M:
-+		stolen_size = MB(16);
-+		break;
-+	case I855_GMCH_GMS_STOLEN_32M:
-+		stolen_size = MB(32);
-+		break;
-+	case I915_GMCH_GMS_STOLEN_48M:
-+		stolen_size = MB(48);
-+		break;
-+	case I915_GMCH_GMS_STOLEN_64M:
-+		stolen_size = MB(64);
-+		break;
-+	case G33_GMCH_GMS_STOLEN_128M:
-+		stolen_size = MB(128);
-+		break;
-+	case G33_GMCH_GMS_STOLEN_256M:
-+		stolen_size = MB(256);
-+		break;
-+	case INTEL_GMCH_GMS_STOLEN_96M:
-+		stolen_size = MB(96);
-+		break;
-+	case INTEL_GMCH_GMS_STOLEN_160M:
-+		stolen_size = MB(160);
-+		break;
-+	case INTEL_GMCH_GMS_STOLEN_224M:
-+		stolen_size = MB(224);
-+		break;
-+	case INTEL_GMCH_GMS_STOLEN_352M:
-+		stolen_size = MB(352);
-+		break;
-+	default:
-+		stolen_size = 0;
-+		break;
-+	}
-+
-+	return stolen_size;
-+}
-+
-+static size_t __init gen6_stolen_size(int num, int slot, int func)
-+{
-+	u16 gmch_ctrl;
-+
-+	gmch_ctrl = read_pci_config_16(num, slot, func, SNB_GMCH_CTRL);
-+	gmch_ctrl >>= SNB_GMCH_GMS_SHIFT;
-+	gmch_ctrl &= SNB_GMCH_GMS_MASK;
-+
-+	return gmch_ctrl << 25; /* 32 MB units */
-+}
-+
-+typedef size_t (*stolen_size_fn)(int num, int slot, int func);
-+
-+static struct pci_device_id intel_stolen_ids[] __initdata = {
-+	INTEL_I915G_IDS(gen3_stolen_size),
-+	INTEL_I915GM_IDS(gen3_stolen_size),
-+	INTEL_I945G_IDS(gen3_stolen_size),
-+	INTEL_I945GM_IDS(gen3_stolen_size),
-+	INTEL_VLV_M_IDS(gen3_stolen_size),
-+	INTEL_VLV_D_IDS(gen3_stolen_size),
-+	INTEL_PINEVIEW_IDS(gen3_stolen_size),
-+	INTEL_I965G_IDS(gen3_stolen_size),
-+	INTEL_G33_IDS(gen3_stolen_size),
-+	INTEL_I965GM_IDS(gen3_stolen_size),
-+	INTEL_GM45_IDS(gen3_stolen_size),
-+	INTEL_G45_IDS(gen3_stolen_size),
-+	INTEL_IRONLAKE_D_IDS(gen3_stolen_size),
-+	INTEL_IRONLAKE_M_IDS(gen3_stolen_size),
-+	INTEL_SNB_D_IDS(gen6_stolen_size),
-+	INTEL_SNB_M_IDS(gen6_stolen_size),
-+	INTEL_IVB_M_IDS(gen6_stolen_size),
-+	INTEL_IVB_D_IDS(gen6_stolen_size),
-+	INTEL_HSW_D_IDS(gen6_stolen_size),
-+	INTEL_HSW_M_IDS(gen6_stolen_size),
-+};
-+
-+static void __init intel_graphics_stolen(int num, int slot, int func)
-+{
-+	size_t size;
-+	int i;
-+	u32 start;
-+	u16 device, subvendor, subdevice;
-+
-+	device = read_pci_config_16(num, slot, func, PCI_DEVICE_ID);
-+	subvendor = read_pci_config_16(num, slot, func,
-+				       PCI_SUBSYSTEM_VENDOR_ID);
-+	subdevice = read_pci_config_16(num, slot, func, PCI_SUBSYSTEM_ID);
-+
-+	for (i = 0; i < ARRAY_SIZE(intel_stolen_ids); i++) {
-+		if (intel_stolen_ids[i].device == device) {
-+			stolen_size_fn stolen_size =
-+				(stolen_size_fn)intel_stolen_ids[i].driver_data;
-+			size = stolen_size(num, slot, func);
-+			start = intel_stolen_base(num, slot, func);
-+			if (size && start) {
-+				/* Mark this space as reserved */
-+				e820_add_region(start, size, E820_RESERVED);
-+				sanitize_e820_map(e820.map,
-+						  ARRAY_SIZE(e820.map),
-+						  &e820.nr_map);
-+			}
-+			return;
-+		}
-+	}
-+}
-+
- #define QFLAG_APPLY_ONCE 	0x1
- #define QFLAG_APPLIED		0x2
- #define QFLAG_DONE		(QFLAG_APPLY_ONCE|QFLAG_APPLIED)
-@@ -251,6 +403,8 @@ static struct chipset early_qrk[] __initdata = {
- 	  PCI_BASE_CLASS_BRIDGE, 0, intel_remapping_check },
- 	{ PCI_VENDOR_ID_INTEL, 0x3406, PCI_CLASS_BRIDGE_HOST,
- 	  PCI_BASE_CLASS_BRIDGE, 0, intel_remapping_check },
-+	{ PCI_VENDOR_ID_INTEL, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA, PCI_ANY_ID,
-+	  QFLAG_APPLY_ONCE, intel_graphics_stolen },
- 	{}
- };
- 
-diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
-index b2fa2a4c4454..dcc58ea157fe 100644
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -33,21 +33,6 @@
- #define _MASKED_BIT_ENABLE(a) (((a) << 16) | (a))
- #define _MASKED_BIT_DISABLE(a) ((a) << 16)
- 
--/*
-- * The Bridge device's PCI config space has information about the
-- * fb aperture size and the amount of pre-reserved memory.
-- * This is all handled in the intel-gtt.ko module. i915.ko only
-- * cares about the vga bit for the vga rbiter.
-- */
--#define INTEL_GMCH_CTRL		0x52
--#define INTEL_GMCH_VGA_DISABLE  (1 << 1)
--#define SNB_GMCH_CTRL		0x50
--#define    SNB_GMCH_GGMS_SHIFT	8 /* GTT Graphics Memory Size */
--#define    SNB_GMCH_GGMS_MASK	0x3
--#define    SNB_GMCH_GMS_SHIFT   3 /* Graphics Mode Select */
--#define    SNB_GMCH_GMS_MASK    0x1f
--
--
- /* PCI config space */
- 
- #define HPLLCC	0xc0 /* 855 only */
-diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h
-index 7276a72710e2..3abfa6ea226e 100644
---- a/include/drm/i915_drm.h
-+++ b/include/drm/i915_drm.h
-@@ -36,4 +36,36 @@ extern bool i915_gpu_lower(void);
- extern bool i915_gpu_busy(void);
- extern bool i915_gpu_turbo_disable(void);
- 
-+/*
-+ * The Bridge device's PCI config space has information about the
-+ * fb aperture size and the amount of pre-reserved memory.
-+ * This is all handled in the intel-gtt.ko module. i915.ko only
-+ * cares about the vga bit for the vga rbiter.
-+ */
-+#define INTEL_GMCH_CTRL		0x52
-+#define INTEL_GMCH_VGA_DISABLE  (1 << 1)
-+#define SNB_GMCH_CTRL		0x50
-+#define    SNB_GMCH_GGMS_SHIFT	8 /* GTT Graphics Memory Size */
-+#define    SNB_GMCH_GGMS_MASK	0x3
-+#define    SNB_GMCH_GMS_SHIFT   3 /* Graphics Mode Select */
-+#define    SNB_GMCH_GMS_MASK    0x1f
-+
-+#define I830_GMCH_CTRL			0x52
-+
-+#define I855_GMCH_GMS_MASK		0xF0
-+#define I855_GMCH_GMS_STOLEN_0M		0x0
-+#define I855_GMCH_GMS_STOLEN_1M		(0x1 << 4)
-+#define I855_GMCH_GMS_STOLEN_4M		(0x2 << 4)
-+#define I855_GMCH_GMS_STOLEN_8M		(0x3 << 4)
-+#define I855_GMCH_GMS_STOLEN_16M	(0x4 << 4)
-+#define I855_GMCH_GMS_STOLEN_32M	(0x5 << 4)
-+#define I915_GMCH_GMS_STOLEN_48M	(0x6 << 4)
-+#define I915_GMCH_GMS_STOLEN_64M	(0x7 << 4)
-+#define G33_GMCH_GMS_STOLEN_128M	(0x8 << 4)
-+#define G33_GMCH_GMS_STOLEN_256M	(0x9 << 4)
-+#define INTEL_GMCH_GMS_STOLEN_96M	(0xa << 4)
-+#define INTEL_GMCH_GMS_STOLEN_160M	(0xb << 4)
-+#define INTEL_GMCH_GMS_STOLEN_224M	(0xc << 4)
-+#define INTEL_GMCH_GMS_STOLEN_352M	(0xd << 4)
-+
- #endif				/* _I915_DRM_H_ */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0753-drm-i915-enable-trickle-feed-on-Haswell.patch b/patches.baytrail/0753-drm-i915-enable-trickle-feed-on-Haswell.patch
deleted file mode 100644
index 266cf4eb880f7..0000000000000
--- a/patches.baytrail/0753-drm-i915-enable-trickle-feed-on-Haswell.patch
+++ /dev/null
@@ -1,91 +0,0 @@
-From 72c858663ac200d764a873bcbfce8eae135d2e77 Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Fri, 23 Aug 2013 19:51:28 -0300
-Subject: drm/i915: enable trickle feed on Haswell
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-We shouldn't disable the trickle feed bits on Haswell. Our
-documentation explicitly says the trickle feed bits of PRI_CTL and
-CUR_CTL should not be programmed to 1, and the hardware engineer also
-asked us to not program the SPR_CTL field to 1. Leaving the bits as 1
-could cause underflows.
-
-Reported-by: Arthur Runyan <arthur.j.runyan@intel.com>
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 1f5d76dbb636c73912c9ff1c90ff46dd2273f098)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_reg.h      |    1 +
- drivers/gpu/drm/i915/intel_display.c |   10 +++++++---
- drivers/gpu/drm/i915/intel_pm.c      |    2 --
- drivers/gpu/drm/i915/intel_sprite.c  |    7 +++++--
- 4 files changed, 13 insertions(+), 7 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -3317,6 +3317,7 @@
- #define   MCURSOR_PIPE_A	0x00
- #define   MCURSOR_PIPE_B	(1 << 28)
- #define   MCURSOR_GAMMA_ENABLE  (1 << 26)
-+#define   CURSOR_TRICKLE_FEED_DISABLE	(1 << 14)
- #define _CURABASE		(dev_priv->info->display_mmio_offset + 0x70084)
- #define _CURAPOS		(dev_priv->info->display_mmio_offset + 0x70088)
- #define   CURSOR_POS_MASK       0x007FF
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -2077,8 +2077,10 @@ static int ironlake_update_plane(struct
- 	else
- 		dspcntr &= ~DISPPLANE_TILED;
- 
--	/* must disable */
--	dspcntr |= DISPPLANE_TRICKLE_FEED_DISABLE;
-+	if (IS_HASWELL(dev))
-+		dspcntr &= ~DISPPLANE_TRICKLE_FEED_DISABLE;
-+	else
-+		dspcntr |= DISPPLANE_TRICKLE_FEED_DISABLE;
- 
- 	I915_WRITE(reg, dspcntr);
- 
-@@ -6764,8 +6766,10 @@ static void ivb_update_cursor(struct drm
- 			cntl &= ~(CURSOR_MODE | MCURSOR_GAMMA_ENABLE);
- 			cntl |= CURSOR_MODE_DISABLE;
- 		}
--		if (IS_HASWELL(dev))
-+		if (IS_HASWELL(dev)) {
- 			cntl |= CURSOR_PIPE_CSC_ENABLE;
-+			cntl &= ~CURSOR_TRICKLE_FEED_DISABLE;
-+		}
- 		I915_WRITE(CURCNTR_IVB(pipe), cntl);
- 
- 		intel_crtc->cursor_visible = visible;
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -4960,8 +4960,6 @@ static void haswell_init_clock_gating(st
- 			I915_READ(GEN7_SQ_CHICKEN_MBCUNIT_CONFIG) |
- 			GEN7_SQ_CHICKEN_MBCUNIT_SQINTMOB);
- 
--	g4x_disable_trickle_feed(dev);
--
- 	/* WaVSRefCountFullforceMissDisable:hsw */
- 	gen7_setup_fixed_func_scheduler(dev_priv);
- 
---- a/drivers/gpu/drm/i915/intel_sprite.c
-+++ b/drivers/gpu/drm/i915/intel_sprite.c
-@@ -260,8 +260,11 @@ ivb_update_plane(struct drm_plane *plane
- 	if (obj->tiling_mode != I915_TILING_NONE)
- 		sprctl |= SPRITE_TILED;
- 
--	/* must disable */
--	sprctl |= SPRITE_TRICKLE_FEED_DISABLE;
-+	if (IS_HASWELL(dev))
-+		sprctl &= ~SPRITE_TRICKLE_FEED_DISABLE;
-+	else
-+		sprctl |= SPRITE_TRICKLE_FEED_DISABLE;
-+
- 	sprctl |= SPRITE_ENABLE;
- 
- 	if (IS_HASWELL(dev))
diff --git a/patches.baytrail/0754-drm-i915-Pin-pages-whilst-mapping-the-dma-buf.patch b/patches.baytrail/0754-drm-i915-Pin-pages-whilst-mapping-the-dma-buf.patch
deleted file mode 100644
index 71ef8b2580cbb..0000000000000
--- a/patches.baytrail/0754-drm-i915-Pin-pages-whilst-mapping-the-dma-buf.patch
+++ /dev/null
@@ -1,94 +0,0 @@
-From 91886177feb405d8735efd14df9ba7cf0e4098bc Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Mon, 26 Aug 2013 19:50:55 -0300
-Subject: drm/i915: Pin pages whilst mapping the dma-buf
-
-As we attempt to kmalloc after calling get_pages, there is a possibility
-that the shrinker may reap the pages we just acquired. To prevent this
-we need to increment the pages_pin_count early, so rearrange the code
-and error paths to make it so.
-
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 5cfacdedb1a94efd29faeaab53f939554a3f5943)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem_dmabuf.c | 41 ++++++++++++++++++----------------
- 1 file changed, 22 insertions(+), 19 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem_dmabuf.c b/drivers/gpu/drm/i915/i915_gem_dmabuf.c
-index e918b05fcbdd..7d5752fda5f1 100644
---- a/drivers/gpu/drm/i915/i915_gem_dmabuf.c
-+++ b/drivers/gpu/drm/i915/i915_gem_dmabuf.c
-@@ -42,27 +42,24 @@ static struct sg_table *i915_gem_map_dma_buf(struct dma_buf_attachment *attachme
- 
- 	ret = i915_mutex_lock_interruptible(obj->base.dev);
- 	if (ret)
--		return ERR_PTR(ret);
-+		goto err;
- 
- 	ret = i915_gem_object_get_pages(obj);
--	if (ret) {
--		st = ERR_PTR(ret);
--		goto out;
--	}
-+	if (ret)
-+		goto err_unlock;
-+
-+	i915_gem_object_pin_pages(obj);
- 
- 	/* Copy sg so that we make an independent mapping */
- 	st = kmalloc(sizeof(struct sg_table), GFP_KERNEL);
- 	if (st == NULL) {
--		st = ERR_PTR(-ENOMEM);
--		goto out;
-+		ret = -ENOMEM;
-+		goto err_unpin;
- 	}
- 
- 	ret = sg_alloc_table(st, obj->pages->nents, GFP_KERNEL);
--	if (ret) {
--		kfree(st);
--		st = ERR_PTR(ret);
--		goto out;
--	}
-+	if (ret)
-+		goto err_free;
- 
- 	src = obj->pages->sgl;
- 	dst = st->sgl;
-@@ -73,17 +70,23 @@ static struct sg_table *i915_gem_map_dma_buf(struct dma_buf_attachment *attachme
- 	}
- 
- 	if (!dma_map_sg(attachment->dev, st->sgl, st->nents, dir)) {
--		sg_free_table(st);
--		kfree(st);
--		st = ERR_PTR(-ENOMEM);
--		goto out;
-+		ret =-ENOMEM;
-+		goto err_free_sg;
- 	}
- 
--	i915_gem_object_pin_pages(obj);
--
--out:
- 	mutex_unlock(&obj->base.dev->struct_mutex);
- 	return st;
-+
-+err_free_sg:
-+	sg_free_table(st);
-+err_free:
-+	kfree(st);
-+err_unpin:
-+	i915_gem_object_unpin_pages(obj);
-+err_unlock:
-+	mutex_unlock(&obj->base.dev->struct_mutex);
-+err:
-+	return ERR_PTR(ret);
- }
- 
- static void i915_gem_unmap_dma_buf(struct dma_buf_attachment *attachment,
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0755-i915-Update-VGA-arbiter-support-for-newer-devices.patch b/patches.baytrail/0755-i915-Update-VGA-arbiter-support-for-newer-devices.patch
deleted file mode 100644
index 197fb261bed16..0000000000000
--- a/patches.baytrail/0755-i915-Update-VGA-arbiter-support-for-newer-devices.patch
+++ /dev/null
@@ -1,128 +0,0 @@
-From d849169ef2bbffbee90e550acd987086548fbc6f Mon Sep 17 00:00:00 2001
-From: Alex Williamson <alex.williamson@redhat.com>
-Date: Wed, 28 Aug 2013 09:39:08 -0600
-Subject: i915: Update VGA arbiter support for newer devices
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-This is intended to add VGA arbiter support for Intel HD graphics on
-Core processors.  The old GMCH registers no longer exist, so even
-though it appears that i915 participates in VGA arbitration, it doesn't
-work.  On Intel HD graphics we already attempt to disable VGA regions
-of the device.  This makes registering as a VGA client unnecessary since
-we don't intend to operate differently depending on how many VGA devices
-are present.  We can disable VGA memory regions by clearing the memory
-enable bit in the VGA MSR.  That only leaves VGA IO, which we update
-the VGA arbiter to know that we don't participate in VGA memory
-arbitration.  We also add a hook on unload to re-enable memory and
-reinstate VGA memory arbitration.
-
-v3: Use explicit LEGACY_IO | LEGACY_MEM when restoring rather than
-    LEGACY_MASK, per Ville's comments.
-
-v2: I915_READ/WRITE accessors don't work in i915_disable_vga, use inb/outb
-    directly.  Also, on the driver unbind VGA enable path, acquire legacy
-    IO to re-enable VGA memory.  Correct comment.
-
-Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-[danvet: Add patch changelog. Also squash in a fixup to have a dummy
-static inline for vga_set_legacy_decoding for CONFIG_VGA_ARB=n as
-reported by the 0-day kernel build bot.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-fixup 2
-
-(cherry picked from commit 81b5c7bc8de3e6f63419139c2fc91bf81dea8a7d)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_dma.c      |    9 ++++++---
- drivers/gpu/drm/i915/intel_display.c |   25 +++++++++++++++++++++++++
- include/linux/vgaarb.h               |    7 +++++++
- 3 files changed, 38 insertions(+), 3 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_dma.c
-+++ b/drivers/gpu/drm/i915/i915_dma.c
-@@ -1298,9 +1298,12 @@ static int i915_load_modeset_init(struct
- 	 * then we do not take part in VGA arbitration and the
- 	 * vga_client_register() fails with -ENODEV.
- 	 */
--	ret = vga_client_register(dev->pdev, dev, NULL, i915_vga_set_decode);
--	if (ret && ret != -ENODEV)
--		goto out;
-+	if (!HAS_PCH_SPLIT(dev)) {
-+		ret = vga_client_register(dev->pdev, dev, NULL,
-+					  i915_vga_set_decode);
-+		if (ret && ret != -ENODEV)
-+			goto out;
-+	}
- 
- 	intel_register_dsm_handler();
- 
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -10045,6 +10045,15 @@ static void i915_disable_vga(struct drm_
- 	outb(SR01, VGA_SR_INDEX);
- 	sr1 = inb(VGA_SR_DATA);
- 	outb(sr1 | 1<<5, VGA_SR_DATA);
-+
-+	/* Disable VGA memory on Intel HD */
-+	if (HAS_PCH_SPLIT(dev)) {
-+		outb(inb(VGA_MSR_READ) & ~VGA_MSR_MEM_EN, VGA_MSR_WRITE);
-+		vga_set_legacy_decoding(dev->pdev, VGA_RSRC_LEGACY_IO |
-+						   VGA_RSRC_NORMAL_IO |
-+						   VGA_RSRC_NORMAL_MEM);
-+	}
-+
- 	vga_put(dev->pdev, VGA_RSRC_LEGACY_IO);
- 	udelay(300);
- 
-@@ -10052,6 +10061,20 @@ static void i915_disable_vga(struct drm_
- 	POSTING_READ(vga_reg);
- }
- 
-+static void i915_enable_vga(struct drm_device *dev)
-+{
-+	/* Enable VGA memory on Intel HD */
-+	if (HAS_PCH_SPLIT(dev)) {
-+		vga_get_uninterruptible(dev->pdev, VGA_RSRC_LEGACY_IO);
-+		outb(inb(VGA_MSR_READ) | VGA_MSR_MEM_EN, VGA_MSR_WRITE);
-+		vga_set_legacy_decoding(dev->pdev, VGA_RSRC_LEGACY_IO |
-+						   VGA_RSRC_LEGACY_MEM |
-+						   VGA_RSRC_NORMAL_IO |
-+						   VGA_RSRC_NORMAL_MEM);
-+		vga_put(dev->pdev, VGA_RSRC_LEGACY_IO);
-+	}
-+}
-+
- void intel_modeset_init_hw(struct drm_device *dev)
- {
- 	intel_init_power_well(dev);
-@@ -10545,6 +10568,8 @@ void intel_modeset_cleanup(struct drm_de
- 
- 	intel_disable_fbc(dev);
- 
-+	i915_enable_vga(dev);
-+
- 	intel_disable_gt_powersave(dev);
- 
- 	ironlake_teardown_rc6(dev);
---- a/include/linux/vgaarb.h
-+++ b/include/linux/vgaarb.h
-@@ -65,8 +65,15 @@ struct pci_dev;
-  *     out of the arbitration process (and can be safe to take
-  *     interrupts at any time.
-  */
-+#if defined(CONFIG_VGA_ARB)
- extern void vga_set_legacy_decoding(struct pci_dev *pdev,
- 				    unsigned int decodes);
-+#else
-+static inline void vga_set_legacy_decoding(struct pci_dev *pdev,
-+					   unsigned int decodes)
-+{
-+}
-+#endif
- 
- /**
-  *     vga_get         - acquire & locks VGA resources
diff --git a/patches.baytrail/0756-drm-i915-Don-t-call-sg_free_table-if-sg_alloc_table-.patch b/patches.baytrail/0756-drm-i915-Don-t-call-sg_free_table-if-sg_alloc_table-.patch
deleted file mode 100644
index 719c6bf07880f..0000000000000
--- a/patches.baytrail/0756-drm-i915-Don-t-call-sg_free_table-if-sg_alloc_table-.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From 710dd08d2f6c863d3d70a340b3e61010799daa89 Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Fri, 30 Aug 2013 15:39:26 +0100
-Subject: drm/i915: Don't call sg_free_table() if sg_alloc_table() fails
-
-One needs to call __sg_free_table() if __sg_alloc_table() fails, but
-sg_alloc_table() does that for us already.
-
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Reviewd-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit d2933a5b8f8f11cbdf9d2e44f0c7c7abeeb64e6b)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem.c | 1 -
- 1 file changed, 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index 61313054fce6..f21a0c36a40b 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -1774,7 +1774,6 @@ i915_gem_object_get_pages_gtt(struct drm_i915_gem_object *obj)
- 
- 	page_count = obj->base.size / PAGE_SIZE;
- 	if (sg_alloc_table(st, page_count, GFP_KERNEL)) {
--		sg_free_table(st);
- 		kfree(st);
- 		return -ENOMEM;
- 	}
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0757-drm-i915-Fix-pipe-config-warnings-when-dealing-with-.patch b/patches.baytrail/0757-drm-i915-Fix-pipe-config-warnings-when-dealing-with-.patch
deleted file mode 100644
index d4e96babb6198..0000000000000
--- a/patches.baytrail/0757-drm-i915-Fix-pipe-config-warnings-when-dealing-with-.patch
+++ /dev/null
@@ -1,98 +0,0 @@
-From 8b440bc751d5c535ea74818380676ef054245102 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Mon, 2 Sep 2013 21:13:39 +0300
-Subject: drm/i915: Fix pipe config warnings when dealing with LVDS fixed mode
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-intel_fixed_panel_mode() overwrote the adjusted_mode with the fixed mode
-only partially. Notably it forgot to copy over the sync flags. The LVDS code however programmed the hardware with the sync flags from fixed mode, and then later the pipe config comparison obviously failed as we
-filled out the adjusted_mode in get_config from the real registers.
-
-Just call drm_mode_copy() in intel_fixed_panel_mode() to copy over the
-whole thing, and then just use adjusted_mode in the LVDS code to figure
-out which sync settings the hardware needs.
-
-Also constify the fixed_mode argument to intel_fixed_panel_mode().
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 4c6df4b4ca1b26f4532d403b544f649a1c801fd1)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_drv.h   |  2 +-
- drivers/gpu/drm/i915/intel_lvds.c  |  8 ++++----
- drivers/gpu/drm/i915/intel_panel.c | 14 ++------------
- 3 files changed, 7 insertions(+), 17 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index 176080822a74..dbfe5f7bb3de 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -551,7 +551,7 @@ extern int intel_panel_init(struct intel_panel *panel,
- 			    struct drm_display_mode *fixed_mode);
- extern void intel_panel_fini(struct intel_panel *panel);
- 
--extern void intel_fixed_panel_mode(struct drm_display_mode *fixed_mode,
-+extern void intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode,
- 				   struct drm_display_mode *adjusted_mode);
- extern void intel_pch_panel_fitting(struct intel_crtc *crtc,
- 				    struct intel_crtc_config *pipe_config,
-diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
-index acaaafc75502..b8af94a5be39 100644
---- a/drivers/gpu/drm/i915/intel_lvds.c
-+++ b/drivers/gpu/drm/i915/intel_lvds.c
-@@ -128,8 +128,8 @@ static void intel_pre_enable_lvds(struct intel_encoder *encoder)
- 	struct drm_device *dev = encoder->base.dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
--	struct drm_display_mode *fixed_mode =
--		lvds_encoder->attached_connector->base.panel.fixed_mode;
-+	const struct drm_display_mode *adjusted_mode =
-+		&crtc->config.adjusted_mode;
- 	int pipe = crtc->pipe;
- 	u32 temp;
- 
-@@ -183,9 +183,9 @@ static void intel_pre_enable_lvds(struct intel_encoder *encoder)
- 			temp &= ~LVDS_ENABLE_DITHER;
- 	}
- 	temp &= ~(LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY);
--	if (fixed_mode->flags & DRM_MODE_FLAG_NHSYNC)
-+	if (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC)
- 		temp |= LVDS_HSYNC_POLARITY;
--	if (fixed_mode->flags & DRM_MODE_FLAG_NVSYNC)
-+	if (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC)
- 		temp |= LVDS_VSYNC_POLARITY;
- 
- 	I915_WRITE(lvds_encoder->reg, temp);
-diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
-index 913cb9d7fd32..42114ecbae0e 100644
---- a/drivers/gpu/drm/i915/intel_panel.c
-+++ b/drivers/gpu/drm/i915/intel_panel.c
-@@ -36,20 +36,10 @@
- #define PCI_LBPC 0xf4 /* legacy/combination backlight modes */
- 
- void
--intel_fixed_panel_mode(struct drm_display_mode *fixed_mode,
-+intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode,
- 		       struct drm_display_mode *adjusted_mode)
- {
--	adjusted_mode->hdisplay = fixed_mode->hdisplay;
--	adjusted_mode->hsync_start = fixed_mode->hsync_start;
--	adjusted_mode->hsync_end = fixed_mode->hsync_end;
--	adjusted_mode->htotal = fixed_mode->htotal;
--
--	adjusted_mode->vdisplay = fixed_mode->vdisplay;
--	adjusted_mode->vsync_start = fixed_mode->vsync_start;
--	adjusted_mode->vsync_end = fixed_mode->vsync_end;
--	adjusted_mode->vtotal = fixed_mode->vtotal;
--
--	adjusted_mode->clock = fixed_mode->clock;
-+	drm_mode_copy(adjusted_mode, fixed_mode);
- 
- 	drm_mode_set_crtcinfo(adjusted_mode, 0);
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0758-drm-i915-fix-up-the-relocate_entry-refactoring.patch b/patches.baytrail/0758-drm-i915-fix-up-the-relocate_entry-refactoring.patch
deleted file mode 100644
index 999c138456c07..0000000000000
--- a/patches.baytrail/0758-drm-i915-fix-up-the-relocate_entry-refactoring.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From ecb19c85701f90c3830e6a09905b667b7b7f0a4f Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Mon, 2 Sep 2013 20:56:23 +0200
-Subject: drm/i915: fix up the relocate_entry refactoring
-
-Somehow we've lost the error handling in the patch split-up between
-the internal and external patch. This regression has been introduced
-in
-
-commit 5032d871f7d300aee10c309ea004eb4f851553fe
-Author: Rafael Barbalho <rafael.barbalho@intel.com>
-Date:   Wed Aug 21 17:10:51 2013 +0100
-
-    drm/i915: Cleaning up the relocate entry function
-
-This bug is exercised by igt/gem_reloc_vs_gpu/interruptible.
-
-Cc: Rafael Barbalho <rafael.barbalho@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit d4d36014ca37e6fa8271b0690e678b76456faa01)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem_execbuffer.c | 3 +++
- 1 file changed, 3 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-index 792c52a235ee..bf345777ae9f 100644
---- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-@@ -310,6 +310,9 @@ i915_gem_execbuffer_relocate_entry(struct drm_i915_gem_object *obj,
- 	else
- 		ret = relocate_entry_gtt(obj, reloc);
- 
-+	if (ret)
-+		return ret;
-+
- 	/* and update the user's relocation entry */
- 	reloc->presumed_offset = target_offset;
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0759-drm-i915-fix-hpd-work-vs.-flush_work-in-the-pageflip.patch b/patches.baytrail/0759-drm-i915-fix-hpd-work-vs.-flush_work-in-the-pageflip.patch
deleted file mode 100644
index 8acb9bafc0262..0000000000000
--- a/patches.baytrail/0759-drm-i915-fix-hpd-work-vs.-flush_work-in-the-pageflip.patch
+++ /dev/null
@@ -1,92 +0,0 @@
-From b9e38537f8f9e07abdf9e5f1a266e1d6c1d83b9c Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Mon, 2 Sep 2013 16:22:25 +0200
-Subject: drm/i915: fix hpd work vs. flush_work in the pageflip code deadlock
-
-Historically we've run our own driver hotplug handling in our own
-work-queue, which then launched the drm core hotplug handling in the
-system workqueue. This is important since we flush our own driver
-workqueue in the pageflip code while hodling modeset locks, and only
-the drm hotplug code grabbed these locks. But with
-
-commit 69787f7da6b2adc4054357a661aaa1701a9ca76f
-Author: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date:   Tue Oct 23 18:23:34 2012 +0000
-
-    drm: run the hpd irq event code directly
-
-this was changed and now we could deadlock in our flip handler if
-there's a hotplug work blocking the progress of the crucial unpin
-works. So this broke the careful deadlock avoidance implemented in
-
-commit b4a98e57fc27854b5938fc8b08b68e5e68b91e1f
-Author: Chris Wilson <chris@chris-wilson.co.uk>
-Date:   Thu Nov 1 09:26:26 2012 +0000
-
-    drm/i915: Flush outstanding unpin tasks before pageflipping
-
-Since the rule thus far has been that work items on our own workqueue
-may never grab modeset locks simply restore that rule again.
-
-v2: Add a comment to the declaration of dev_priv->wq to warn readers
-about the tricky implications of using it. Suggested by Chris Wilson.
-
-Cc: Chris Wilson <chris@chris-wilson.co.uk>
-Cc: Stuart Abercrombie <sabercrombie@chromium.org>
-Reported-by: Stuart Abercrombie <sabercrombie@chromium.org>
-References: http://permalink.gmane.org/gmane.comp.freedesktop.xorg.drivers.intel/26239
-Cc: stable@vger.kernel.org
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-[danvet: Squash in a comment at the place where we schedule the work.
-Requested after-the-fact by Chris on irc since the hpd work isn't the
-only place we botch this.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 645416f5adc87c8fae44289cdba7562f3ade8f5c)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h | 7 +++++++
- drivers/gpu/drm/i915/i915_irq.c | 9 +++++++--
- 2 files changed, 14 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 52a3785a3fdf..35874b3a86dc 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1236,6 +1236,13 @@ typedef struct drm_i915_private {
- 
- 	unsigned int fsb_freq, mem_freq, is_ddr3;
- 
-+	/**
-+	 * wq - Driver workqueue for GEM.
-+	 *
-+	 * NOTE: Work items scheduled here are not allowed to grab any modeset
-+	 * locks, for otherwise the flushing done in the pageflip code will
-+	 * result in deadlocks.
-+	 */
- 	struct workqueue_struct *wq;
- 
- 	/* Display functions */
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index 4c137d6ea761..4b91228fd9bd 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -1027,8 +1027,13 @@ static inline void intel_hpd_irq_handler(struct drm_device *dev,
- 		dev_priv->display.hpd_irq_setup(dev);
- 	spin_unlock(&dev_priv->irq_lock);
- 
--	queue_work(dev_priv->wq,
--		   &dev_priv->hotplug_work);
-+	/*
-+	 * Our hotplug handler can grab modeset locks (by calling down into the
-+	 * fb helpers). Hence it must not be run on our own dev-priv->wq work
-+	 * queue for otherwise the flush_work in the pageflip code will
-+	 * deadlock.
-+	 */
-+	schedule_work(&dev_priv->hotplug_work);
- }
- 
- static void gmbus_irq_handler(struct drm_device *dev)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0760-drm-i915-handle-sdvo-input-pixel-multiplier-correctl.patch b/patches.baytrail/0760-drm-i915-handle-sdvo-input-pixel-multiplier-correctl.patch
deleted file mode 100644
index 7e1a35d3b06a7..0000000000000
--- a/patches.baytrail/0760-drm-i915-handle-sdvo-input-pixel-multiplier-correctl.patch
+++ /dev/null
@@ -1,92 +0,0 @@
-From 7742ef3f3c05272aa9016765c8ddb36429ff4a88 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Tue, 3 Sep 2013 20:40:36 +0200
-Subject: drm/i915: handle sdvo input pixel multiplier correctly again
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The sdvo input timing needs to be the actual mode, the sdvo
-encoder automatically adjusts for the need of pixel doubling or
-quadrupling. This was lost in pipe config conversion of the
-pixel multiplier in
-
-commit 6cc5f341b5830541a1b6945435ca90c69b1b8b21
-Author: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date:   Wed Mar 27 00:44:53 2013 +0100
-
-    drm/i915: add pipe_config->pixel_multiplier
-
-While at it ditch the intel_ prefix from the crtc in
-intel_sdvo_mode_set.
-
-Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
-Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit eeb4793779060e0ae27fc8a85b8dac2ab3620934)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_sdvo.c | 17 +++++++++--------
- 1 file changed, 9 insertions(+), 8 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
-index 317e058fb3cf..85037b9d4934 100644
---- a/drivers/gpu/drm/i915/intel_sdvo.c
-+++ b/drivers/gpu/drm/i915/intel_sdvo.c
-@@ -1151,11 +1151,10 @@ static void intel_sdvo_mode_set(struct intel_encoder *intel_encoder)
- {
- 	struct drm_device *dev = intel_encoder->base.dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
--	struct drm_crtc *crtc = intel_encoder->base.crtc;
--	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
-+	struct intel_crtc *crtc = to_intel_crtc(intel_encoder->base.crtc);
- 	struct drm_display_mode *adjusted_mode =
--		&intel_crtc->config.adjusted_mode;
--	struct drm_display_mode *mode = &intel_crtc->config.requested_mode;
-+		&crtc->config.adjusted_mode;
-+	struct drm_display_mode *mode = &crtc->config.requested_mode;
- 	struct intel_sdvo *intel_sdvo = to_sdvo(intel_encoder);
- 	u32 sdvox;
- 	struct intel_sdvo_in_out_map in_out;
-@@ -1213,13 +1212,15 @@ static void intel_sdvo_mode_set(struct intel_encoder *intel_encoder)
- 	 * adjusted_mode.
- 	 */
- 	intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
-+	input_dtd.part1.clock /= crtc->config.pixel_multiplier;
-+
- 	if (intel_sdvo->is_tv || intel_sdvo->is_lvds)
- 		input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags;
- 	if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd))
- 		DRM_INFO("Setting input timings on %s failed\n",
- 			 SDVO_NAME(intel_sdvo));
- 
--	switch (intel_crtc->config.pixel_multiplier) {
-+	switch (crtc->config.pixel_multiplier) {
- 	default:
- 		WARN(1, "unknown pixel mutlipler specified\n");
- 	case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
-@@ -1252,9 +1253,9 @@ static void intel_sdvo_mode_set(struct intel_encoder *intel_encoder)
- 	}
- 
- 	if (INTEL_PCH_TYPE(dev) >= PCH_CPT)
--		sdvox |= SDVO_PIPE_SEL_CPT(intel_crtc->pipe);
-+		sdvox |= SDVO_PIPE_SEL_CPT(crtc->pipe);
- 	else
--		sdvox |= SDVO_PIPE_SEL(intel_crtc->pipe);
-+		sdvox |= SDVO_PIPE_SEL(crtc->pipe);
- 
- 	if (intel_sdvo->has_hdmi_audio)
- 		sdvox |= SDVO_AUDIO_ENABLE;
-@@ -1264,7 +1265,7 @@ static void intel_sdvo_mode_set(struct intel_encoder *intel_encoder)
- 	} else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
- 		/* done in crtc_mode_set as it lives inside the dpll register */
- 	} else {
--		sdvox |= (intel_crtc->config.pixel_multiplier - 1)
-+		sdvox |= (crtc->config.pixel_multiplier - 1)
- 			<< SDVO_PORT_MULTIPLY_SHIFT;
- 	}
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0761-drm-i915-fix-i9xx_crtc_clock_get-for-multiplied-pixe.patch b/patches.baytrail/0761-drm-i915-fix-i9xx_crtc_clock_get-for-multiplied-pixe.patch
deleted file mode 100644
index 5970f949984d2..0000000000000
--- a/patches.baytrail/0761-drm-i915-fix-i9xx_crtc_clock_get-for-multiplied-pixe.patch
+++ /dev/null
@@ -1,50 +0,0 @@
-From f0e96ae2b5b6c9cec49a6e0e4de85d286e90cf9a Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Tue, 3 Sep 2013 20:40:37 +0200
-Subject: drm/i915: fix i9xx_crtc_clock_get for multiplied pixels
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The dpll actually runs at the port clock so we don't need
-to multiply it again with the pixel multiplier to get the
-adjusted_mode.clock. This is in contrast to the ironlake
-pixel clock readout code which uses the fdi dotclock: That
-one does _not_ run with multiplied pixels.
-
-This issue goes back to the original clock readout code added
-in
-
-commit f1f644dc66cbaf5a4c7dcde683361536b41885b9
-Author: Jesse Barnes <jbarnes@virtuousgeek.org>
-Date:   Thu Jun 27 00:39:25 2013 +0300
-
-    drm/i915: get mode clock when reading the pipe config v9
-
-Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
-Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit a2dc53e7dc4d22f20aecdfa10f85004de442e4d0)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 3 +--
- 1 file changed, 1 insertion(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 369fdb452125..403580f53764 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -7317,8 +7317,7 @@ static void i9xx_crtc_clock_get(struct intel_crtc *crtc,
- 		}
- 	}
- 
--	pipe_config->adjusted_mode.clock = clock.dot *
--		pipe_config->pixel_multiplier;
-+	pipe_config->adjusted_mode.clock = clock.dot;
- }
- 
- static void ironlake_crtc_clock_get(struct intel_crtc *crtc,
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0762-drm-i915-Convert-execbuf-code-to-use-vmas.patch b/patches.baytrail/0762-drm-i915-Convert-execbuf-code-to-use-vmas.patch
deleted file mode 100644
index 55e50eae5a808..0000000000000
--- a/patches.baytrail/0762-drm-i915-Convert-execbuf-code-to-use-vmas.patch
+++ /dev/null
@@ -1,790 +0,0 @@
-From 5d48ef03d16356e15cae49456706339d40e973d4 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Wed, 14 Aug 2013 11:38:36 +0200
-Subject: drm/i915: Convert execbuf code to use vmas
-
-In order to transition more of our code over to using a VMA instead of
-an <OBJ, VM> pair - we must have the vma accessible at execbuf time. Up
-until now, we've only had a VMA when actually binding an object.
-
-The previous patch helped handle the distinction on bound vs. unbound.
-This patch will help us catch leaks, and other issues before we actually
-shuffle a bunch of stuff around.
-
-This attempts to convert all the execbuf code to speak in vmas. Since
-the execbuf code is very self contained it was a nice isolated
-conversion.
-
-The meat of the code is about turning eb_objects into eb_vma, and then
-wiring up the rest of the code to use vmas instead of obj, vm pairs.
-
-Unfortunately, to do this, we must move the exec_list link from the obj
-structure. This list is reused in the eviction code, so we must also
-modify the eviction code to make this work.
-
-WARNING: This patch makes an already hotly profiled path slower. The cost is
-unavoidable. In reply to this mail, I will attach the extra data.
-
-v2: Release table lock early, and two a 2 phase vma lookup to avoid
-having to use a GFP_ATOMIC. (Chris)
-
-v3: s/obj_exec_list/obj_exec_link/
-Updates to address
-commit 6d2b888569d366beb4be72cacfde41adee2c25e1
-Author: Chris Wilson <chris@chris-wilson.co.uk>
-Date:   Wed Aug 7 18:30:54 2013 +0100
-
-    drm/i915: List objects allocated from stolen memory in debugfs
-
-v4: Use obj = vma->obj for neatness in some places (Chris)
-need_reloc_mappable() should return false if ppgtt (Chris)
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-[danvet: Split out prep patches. Also remove a FIXME comment which is
-now taken care of.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 27173f1f95db5e74ceb35fe9a2f2f348ea11bac9)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h            |  16 +-
- drivers/gpu/drm/i915/i915_gem.c            |   1 -
- drivers/gpu/drm/i915/i915_gem_execbuffer.c | 320 ++++++++++++++++-------------
- 3 files changed, 183 insertions(+), 154 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 35874b3a86dc..b6494b24098d 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -568,6 +568,13 @@ struct i915_vma {
- 	/** This vma's place in the batchbuffer or on the eviction list */
- 	struct list_head exec_list;
- 
-+	/**
-+	 * Used for performing relocations during execbuffer insertion.
-+	 */
-+	struct hlist_node exec_node;
-+	unsigned long exec_handle;
-+	struct drm_i915_gem_exec_object2 *exec_entry;
-+
- };
- 
- struct i915_ctx_hang_stats {
-@@ -1398,8 +1405,6 @@ struct drm_i915_gem_object {
- 	struct list_head ring_list;
- 	/** Used in execbuf to temporarily hold a ref */
- 	struct list_head obj_exec_link;
--	/** This object's place in the batchbuffer or on the eviction list */
--	struct list_head exec_list;
- 
- 	/**
- 	 * This is set if the object is on the active lists (has pending
-@@ -1485,13 +1490,6 @@ struct drm_i915_gem_object {
- 	void *dma_buf_vmapping;
- 	int vmapping_count;
- 
--	/**
--	 * Used for performing relocations during execbuffer insertion.
--	 */
--	struct hlist_node exec_node;
--	unsigned long exec_handle;
--	struct drm_i915_gem_exec_object2 *exec_entry;
--
- 	struct intel_ring_buffer *ring;
- 
- 	/** Breadcrumb of last rendering to the buffer. */
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index f21a0c36a40b..c4c56f98d6e6 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -3978,7 +3978,6 @@ void i915_gem_object_init(struct drm_i915_gem_object *obj,
- {
- 	INIT_LIST_HEAD(&obj->global_list);
- 	INIT_LIST_HEAD(&obj->ring_list);
--	INIT_LIST_HEAD(&obj->exec_list);
- 	INIT_LIST_HEAD(&obj->obj_exec_link);
- 	INIT_LIST_HEAD(&obj->vma_list);
- 
-diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-index bf345777ae9f..5dcfd4f59f87 100644
---- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-@@ -33,24 +33,24 @@
- #include "intel_drv.h"
- #include <linux/dma_remapping.h>
- 
--struct eb_objects {
--	struct list_head objects;
-+struct eb_vmas {
-+	struct list_head vmas;
- 	int and;
- 	union {
--		struct drm_i915_gem_object *lut[0];
-+		struct i915_vma *lut[0];
- 		struct hlist_head buckets[0];
- 	};
- };
- 
--static struct eb_objects *
--eb_create(struct drm_i915_gem_execbuffer2 *args)
-+static struct eb_vmas *
-+eb_create(struct drm_i915_gem_execbuffer2 *args, struct i915_address_space *vm)
- {
--	struct eb_objects *eb = NULL;
-+	struct eb_vmas *eb = NULL;
- 
- 	if (args->flags & I915_EXEC_HANDLE_LUT) {
- 		int size = args->buffer_count;
--		size *= sizeof(struct drm_i915_gem_object *);
--		size += sizeof(struct eb_objects);
-+		size *= sizeof(struct i915_vma *);
-+		size += sizeof(struct eb_vmas);
- 		eb = kmalloc(size, GFP_TEMPORARY | __GFP_NOWARN | __GFP_NORETRY);
- 	}
- 
-@@ -61,7 +61,7 @@ eb_create(struct drm_i915_gem_execbuffer2 *args)
- 		while (count > 2*size)
- 			count >>= 1;
- 		eb = kzalloc(count*sizeof(struct hlist_head) +
--			     sizeof(struct eb_objects),
-+			     sizeof(struct eb_vmas),
- 			     GFP_TEMPORARY);
- 		if (eb == NULL)
- 			return eb;
-@@ -70,64 +70,97 @@ eb_create(struct drm_i915_gem_execbuffer2 *args)
- 	} else
- 		eb->and = -args->buffer_count;
- 
--	INIT_LIST_HEAD(&eb->objects);
-+	INIT_LIST_HEAD(&eb->vmas);
- 	return eb;
- }
- 
- static void
--eb_reset(struct eb_objects *eb)
-+eb_reset(struct eb_vmas *eb)
- {
- 	if (eb->and >= 0)
- 		memset(eb->buckets, 0, (eb->and+1)*sizeof(struct hlist_head));
- }
- 
- static int
--eb_lookup_objects(struct eb_objects *eb,
--		  struct drm_i915_gem_exec_object2 *exec,
--		  const struct drm_i915_gem_execbuffer2 *args,
--		  struct drm_file *file)
-+eb_lookup_vmas(struct eb_vmas *eb,
-+	       struct drm_i915_gem_exec_object2 *exec,
-+	       const struct drm_i915_gem_execbuffer2 *args,
-+	       struct i915_address_space *vm,
-+	       struct drm_file *file)
- {
--	int i;
-+	struct drm_i915_gem_object *obj;
-+	struct list_head objects;
-+	int i, ret = 0;
- 
-+	INIT_LIST_HEAD(&objects);
- 	spin_lock(&file->table_lock);
-+	/* Grab a reference to the object and release the lock so we can lookup
-+	 * or create the VMA without using GFP_ATOMIC */
- 	for (i = 0; i < args->buffer_count; i++) {
--		struct drm_i915_gem_object *obj;
--
- 		obj = to_intel_bo(idr_find(&file->object_idr, exec[i].handle));
- 		if (obj == NULL) {
- 			spin_unlock(&file->table_lock);
- 			DRM_DEBUG("Invalid object handle %d at index %d\n",
- 				   exec[i].handle, i);
--			return -ENOENT;
-+			ret = -ENOENT;
-+			goto out;
- 		}
- 
--		if (!list_empty(&obj->exec_list)) {
-+		if (!list_empty(&obj->obj_exec_link)) {
- 			spin_unlock(&file->table_lock);
- 			DRM_DEBUG("Object %p [handle %d, index %d] appears more than once in object list\n",
- 				   obj, exec[i].handle, i);
--			return -EINVAL;
-+			ret = -EINVAL;
-+			goto out;
- 		}
- 
- 		drm_gem_object_reference(&obj->base);
--		list_add_tail(&obj->exec_list, &eb->objects);
-+		list_add_tail(&obj->obj_exec_link, &objects);
-+	}
-+	spin_unlock(&file->table_lock);
- 
--		obj->exec_entry = &exec[i];
-+	i = 0;
-+	list_for_each_entry(obj, &objects, obj_exec_link) {
-+		struct i915_vma *vma;
-+
-+		vma = i915_gem_obj_lookup_or_create_vma(obj, vm);
-+		if (IS_ERR(vma)) {
-+			/* XXX: We don't need an error path fro vma because if
-+			 * the vma was created just for this execbuf, object
-+			 * unreference should kill it off.*/
-+			DRM_DEBUG("Failed to lookup VMA\n");
-+			ret = PTR_ERR(vma);
-+			goto out;
-+		}
-+
-+		list_add_tail(&vma->exec_list, &eb->vmas);
-+
-+		vma->exec_entry = &exec[i];
- 		if (eb->and < 0) {
--			eb->lut[i] = obj;
-+			eb->lut[i] = vma;
- 		} else {
- 			uint32_t handle = args->flags & I915_EXEC_HANDLE_LUT ? i : exec[i].handle;
--			obj->exec_handle = handle;
--			hlist_add_head(&obj->exec_node,
-+			vma->exec_handle = handle;
-+			hlist_add_head(&vma->exec_node,
- 				       &eb->buckets[handle & eb->and]);
- 		}
-+		++i;
- 	}
--	spin_unlock(&file->table_lock);
- 
--	return 0;
-+
-+out:
-+	while (!list_empty(&objects)) {
-+		obj = list_first_entry(&objects,
-+				       struct drm_i915_gem_object,
-+				       obj_exec_link);
-+		list_del_init(&obj->obj_exec_link);
-+		if (ret)
-+			drm_gem_object_unreference(&obj->base);
-+	}
-+	return ret;
- }
- 
--static struct drm_i915_gem_object *
--eb_get_object(struct eb_objects *eb, unsigned long handle)
-+static struct i915_vma *eb_get_vma(struct eb_vmas *eb, unsigned long handle)
- {
- 	if (eb->and < 0) {
- 		if (handle >= -eb->and)
-@@ -139,27 +172,25 @@ eb_get_object(struct eb_objects *eb, unsigned long handle)
- 
- 		head = &eb->buckets[handle & eb->and];
- 		hlist_for_each(node, head) {
--			struct drm_i915_gem_object *obj;
-+			struct i915_vma *vma;
- 
--			obj = hlist_entry(node, struct drm_i915_gem_object, exec_node);
--			if (obj->exec_handle == handle)
--				return obj;
-+			vma = hlist_entry(node, struct i915_vma, exec_node);
-+			if (vma->exec_handle == handle)
-+				return vma;
- 		}
- 		return NULL;
- 	}
- }
- 
--static void
--eb_destroy(struct eb_objects *eb)
--{
--	while (!list_empty(&eb->objects)) {
--		struct drm_i915_gem_object *obj;
-+static void eb_destroy(struct eb_vmas *eb) {
-+	while (!list_empty(&eb->vmas)) {
-+		struct i915_vma *vma;
- 
--		obj = list_first_entry(&eb->objects,
--				       struct drm_i915_gem_object,
-+		vma = list_first_entry(&eb->vmas,
-+				       struct i915_vma,
- 				       exec_list);
--		list_del_init(&obj->exec_list);
--		drm_gem_object_unreference(&obj->base);
-+		list_del_init(&vma->exec_list);
-+		drm_gem_object_unreference(&vma->obj->base);
- 	}
- 	kfree(eb);
- }
-@@ -223,22 +254,24 @@ relocate_entry_gtt(struct drm_i915_gem_object *obj,
- 
- static int
- i915_gem_execbuffer_relocate_entry(struct drm_i915_gem_object *obj,
--				   struct eb_objects *eb,
-+				   struct eb_vmas *eb,
- 				   struct drm_i915_gem_relocation_entry *reloc,
- 				   struct i915_address_space *vm)
- {
- 	struct drm_device *dev = obj->base.dev;
- 	struct drm_gem_object *target_obj;
- 	struct drm_i915_gem_object *target_i915_obj;
-+	struct i915_vma *target_vma;
- 	uint32_t target_offset;
- 	int ret = -EINVAL;
- 
- 	/* we've already hold a reference to all valid objects */
--	target_obj = &eb_get_object(eb, reloc->target_handle)->base;
--	if (unlikely(target_obj == NULL))
-+	target_vma = eb_get_vma(eb, reloc->target_handle);
-+	if (unlikely(target_vma == NULL))
- 		return -ENOENT;
-+	target_i915_obj = target_vma->obj;
-+	target_obj = &target_vma->obj->base;
- 
--	target_i915_obj = to_intel_bo(target_obj);
- 	target_offset = i915_gem_obj_ggtt_offset(target_i915_obj);
- 
- 	/* Sandybridge PPGTT errata: We need a global gtt mapping for MI and
-@@ -320,14 +353,13 @@ i915_gem_execbuffer_relocate_entry(struct drm_i915_gem_object *obj,
- }
- 
- static int
--i915_gem_execbuffer_relocate_object(struct drm_i915_gem_object *obj,
--				    struct eb_objects *eb,
--				    struct i915_address_space *vm)
-+i915_gem_execbuffer_relocate_vma(struct i915_vma *vma,
-+				 struct eb_vmas *eb)
- {
- #define N_RELOC(x) ((x) / sizeof(struct drm_i915_gem_relocation_entry))
- 	struct drm_i915_gem_relocation_entry stack_reloc[N_RELOC(512)];
- 	struct drm_i915_gem_relocation_entry __user *user_relocs;
--	struct drm_i915_gem_exec_object2 *entry = obj->exec_entry;
-+	struct drm_i915_gem_exec_object2 *entry = vma->exec_entry;
- 	int remain, ret;
- 
- 	user_relocs = to_user_ptr(entry->relocs_ptr);
-@@ -346,8 +378,8 @@ i915_gem_execbuffer_relocate_object(struct drm_i915_gem_object *obj,
- 		do {
- 			u64 offset = r->presumed_offset;
- 
--			ret = i915_gem_execbuffer_relocate_entry(obj, eb, r,
--								 vm);
-+			ret = i915_gem_execbuffer_relocate_entry(vma->obj, eb, r,
-+								 vma->vm);
- 			if (ret)
- 				return ret;
- 
-@@ -368,17 +400,16 @@ i915_gem_execbuffer_relocate_object(struct drm_i915_gem_object *obj,
- }
- 
- static int
--i915_gem_execbuffer_relocate_object_slow(struct drm_i915_gem_object *obj,
--					 struct eb_objects *eb,
--					 struct drm_i915_gem_relocation_entry *relocs,
--					 struct i915_address_space *vm)
-+i915_gem_execbuffer_relocate_vma_slow(struct i915_vma *vma,
-+				      struct eb_vmas *eb,
-+				      struct drm_i915_gem_relocation_entry *relocs)
- {
--	const struct drm_i915_gem_exec_object2 *entry = obj->exec_entry;
-+	const struct drm_i915_gem_exec_object2 *entry = vma->exec_entry;
- 	int i, ret;
- 
- 	for (i = 0; i < entry->relocation_count; i++) {
--		ret = i915_gem_execbuffer_relocate_entry(obj, eb, &relocs[i],
--							 vm);
-+		ret = i915_gem_execbuffer_relocate_entry(vma->obj, eb, &relocs[i],
-+							 vma->vm);
- 		if (ret)
- 			return ret;
- 	}
-@@ -387,10 +418,10 @@ i915_gem_execbuffer_relocate_object_slow(struct drm_i915_gem_object *obj,
- }
- 
- static int
--i915_gem_execbuffer_relocate(struct eb_objects *eb,
-+i915_gem_execbuffer_relocate(struct eb_vmas *eb,
- 			     struct i915_address_space *vm)
- {
--	struct drm_i915_gem_object *obj;
-+	struct i915_vma *vma;
- 	int ret = 0;
- 
- 	/* This is the fast path and we cannot handle a pagefault whilst
-@@ -401,8 +432,8 @@ i915_gem_execbuffer_relocate(struct eb_objects *eb,
- 	 * lockdep complains vehemently.
- 	 */
- 	pagefault_disable();
--	list_for_each_entry(obj, &eb->objects, exec_list) {
--		ret = i915_gem_execbuffer_relocate_object(obj, eb, vm);
-+	list_for_each_entry(vma, &eb->vmas, exec_list) {
-+		ret = i915_gem_execbuffer_relocate_vma(vma, eb);
- 		if (ret)
- 			break;
- 	}
-@@ -415,31 +446,32 @@ i915_gem_execbuffer_relocate(struct eb_objects *eb,
- #define  __EXEC_OBJECT_HAS_FENCE (1<<30)
- 
- static int
--need_reloc_mappable(struct drm_i915_gem_object *obj)
-+need_reloc_mappable(struct i915_vma *vma)
- {
--	struct drm_i915_gem_exec_object2 *entry = obj->exec_entry;
--	return entry->relocation_count && !use_cpu_reloc(obj);
-+	struct drm_i915_gem_exec_object2 *entry = vma->exec_entry;
-+	return entry->relocation_count && !use_cpu_reloc(vma->obj) &&
-+		i915_is_ggtt(vma->vm);
- }
- 
- static int
--i915_gem_execbuffer_reserve_object(struct drm_i915_gem_object *obj,
--				   struct intel_ring_buffer *ring,
--				   struct i915_address_space *vm,
--				   bool *need_reloc)
-+i915_gem_execbuffer_reserve_vma(struct i915_vma *vma,
-+				struct intel_ring_buffer *ring,
-+				bool *need_reloc)
- {
--	struct drm_i915_private *dev_priv = obj->base.dev->dev_private;
--	struct drm_i915_gem_exec_object2 *entry = obj->exec_entry;
-+	struct drm_i915_private *dev_priv = ring->dev->dev_private;
-+	struct drm_i915_gem_exec_object2 *entry = vma->exec_entry;
- 	bool has_fenced_gpu_access = INTEL_INFO(ring->dev)->gen < 4;
- 	bool need_fence, need_mappable;
-+	struct drm_i915_gem_object *obj = vma->obj;
- 	int ret;
- 
- 	need_fence =
- 		has_fenced_gpu_access &&
- 		entry->flags & EXEC_OBJECT_NEEDS_FENCE &&
- 		obj->tiling_mode != I915_TILING_NONE;
--	need_mappable = need_fence || need_reloc_mappable(obj);
-+	need_mappable = need_fence || need_reloc_mappable(vma);
- 
--	ret = i915_gem_object_pin(obj, vm, entry->alignment, need_mappable,
-+	ret = i915_gem_object_pin(obj, vma->vm, entry->alignment, need_mappable,
- 				  false);
- 	if (ret)
- 		return ret;
-@@ -467,8 +499,8 @@ i915_gem_execbuffer_reserve_object(struct drm_i915_gem_object *obj,
- 		obj->has_aliasing_ppgtt_mapping = 1;
- 	}
- 
--	if (entry->offset != i915_gem_obj_offset(obj, vm)) {
--		entry->offset = i915_gem_obj_offset(obj, vm);
-+	if (entry->offset != vma->node.start) {
-+		entry->offset = vma->node.start;
- 		*need_reloc = true;
- 	}
- 
-@@ -485,14 +517,15 @@ i915_gem_execbuffer_reserve_object(struct drm_i915_gem_object *obj,
- }
- 
- static void
--i915_gem_execbuffer_unreserve_object(struct drm_i915_gem_object *obj)
-+i915_gem_execbuffer_unreserve_vma(struct i915_vma *vma)
- {
- 	struct drm_i915_gem_exec_object2 *entry;
-+	struct drm_i915_gem_object *obj = vma->obj;
- 
--	if (!i915_gem_obj_bound_any(obj))
-+	if (!drm_mm_node_allocated(&vma->node))
- 		return;
- 
--	entry = obj->exec_entry;
-+	entry = vma->exec_entry;
- 
- 	if (entry->flags & __EXEC_OBJECT_HAS_FENCE)
- 		i915_gem_object_unpin_fence(obj);
-@@ -505,41 +538,40 @@ i915_gem_execbuffer_unreserve_object(struct drm_i915_gem_object *obj)
- 
- static int
- i915_gem_execbuffer_reserve(struct intel_ring_buffer *ring,
--			    struct list_head *objects,
--			    struct i915_address_space *vm,
-+			    struct list_head *vmas,
- 			    bool *need_relocs)
- {
- 	struct drm_i915_gem_object *obj;
--	struct list_head ordered_objects;
-+	struct i915_vma *vma;
-+	struct list_head ordered_vmas;
- 	bool has_fenced_gpu_access = INTEL_INFO(ring->dev)->gen < 4;
- 	int retry;
- 
--	INIT_LIST_HEAD(&ordered_objects);
--	while (!list_empty(objects)) {
-+	INIT_LIST_HEAD(&ordered_vmas);
-+	while (!list_empty(vmas)) {
- 		struct drm_i915_gem_exec_object2 *entry;
- 		bool need_fence, need_mappable;
- 
--		obj = list_first_entry(objects,
--				       struct drm_i915_gem_object,
--				       exec_list);
--		entry = obj->exec_entry;
-+		vma = list_first_entry(vmas, struct i915_vma, exec_list);
-+		obj = vma->obj;
-+		entry = vma->exec_entry;
- 
- 		need_fence =
- 			has_fenced_gpu_access &&
- 			entry->flags & EXEC_OBJECT_NEEDS_FENCE &&
- 			obj->tiling_mode != I915_TILING_NONE;
--		need_mappable = need_fence || need_reloc_mappable(obj);
-+		need_mappable = need_fence || need_reloc_mappable(vma);
- 
- 		if (need_mappable)
--			list_move(&obj->exec_list, &ordered_objects);
-+			list_move(&vma->exec_list, &ordered_vmas);
- 		else
--			list_move_tail(&obj->exec_list, &ordered_objects);
-+			list_move_tail(&vma->exec_list, &ordered_vmas);
- 
- 		obj->base.pending_read_domains = I915_GEM_GPU_DOMAINS & ~I915_GEM_DOMAIN_COMMAND;
- 		obj->base.pending_write_domain = 0;
- 		obj->pending_fenced_gpu_access = false;
- 	}
--	list_splice(&ordered_objects, objects);
-+	list_splice(&ordered_vmas, vmas);
- 
- 	/* Attempt to pin all of the buffers into the GTT.
- 	 * This is done in 3 phases:
-@@ -558,47 +590,47 @@ i915_gem_execbuffer_reserve(struct intel_ring_buffer *ring,
- 		int ret = 0;
- 
- 		/* Unbind any ill-fitting objects or pin. */
--		list_for_each_entry(obj, objects, exec_list) {
--			struct drm_i915_gem_exec_object2 *entry = obj->exec_entry;
-+		list_for_each_entry(vma, vmas, exec_list) {
-+			struct drm_i915_gem_exec_object2 *entry = vma->exec_entry;
- 			bool need_fence, need_mappable;
--			u32 obj_offset;
- 
--			if (!i915_gem_obj_bound(obj, vm))
-+			obj = vma->obj;
-+
-+			if (!drm_mm_node_allocated(&vma->node))
- 				continue;
- 
--			obj_offset = i915_gem_obj_offset(obj, vm);
- 			need_fence =
- 				has_fenced_gpu_access &&
- 				entry->flags & EXEC_OBJECT_NEEDS_FENCE &&
- 				obj->tiling_mode != I915_TILING_NONE;
--			need_mappable = need_fence || need_reloc_mappable(obj);
-+			need_mappable = need_fence || need_reloc_mappable(vma);
- 
- 			WARN_ON((need_mappable || need_fence) &&
--				!i915_is_ggtt(vm));
-+			       !i915_is_ggtt(vma->vm));
- 
- 			if ((entry->alignment &&
--			     obj_offset & (entry->alignment - 1)) ||
-+			     vma->node.start & (entry->alignment - 1)) ||
- 			    (need_mappable && !obj->map_and_fenceable))
--				ret = i915_vma_unbind(i915_gem_obj_to_vma(obj, vm));
-+				ret = i915_vma_unbind(vma);
- 			else
--				ret = i915_gem_execbuffer_reserve_object(obj, ring, vm, need_relocs);
-+				ret = i915_gem_execbuffer_reserve_vma(vma, ring, need_relocs);
- 			if (ret)
- 				goto err;
- 		}
- 
- 		/* Bind fresh objects */
--		list_for_each_entry(obj, objects, exec_list) {
--			if (i915_gem_obj_bound(obj, vm))
-+		list_for_each_entry(vma, vmas, exec_list) {
-+			if (drm_mm_node_allocated(&vma->node))
- 				continue;
- 
--			ret = i915_gem_execbuffer_reserve_object(obj, ring, vm, need_relocs);
-+			ret = i915_gem_execbuffer_reserve_vma(vma, ring, need_relocs);
- 			if (ret)
- 				goto err;
- 		}
- 
- err:		/* Decrement pin count for bound objects */
--		list_for_each_entry(obj, objects, exec_list)
--			i915_gem_execbuffer_unreserve_object(obj);
-+		list_for_each_entry(vma, vmas, exec_list)
-+			i915_gem_execbuffer_unreserve_vma(vma);
- 
- 		if (ret != -ENOSPC || retry++)
- 			return ret;
-@@ -614,24 +646,27 @@ i915_gem_execbuffer_relocate_slow(struct drm_device *dev,
- 				  struct drm_i915_gem_execbuffer2 *args,
- 				  struct drm_file *file,
- 				  struct intel_ring_buffer *ring,
--				  struct eb_objects *eb,
--				  struct drm_i915_gem_exec_object2 *exec,
--				  struct i915_address_space *vm)
-+				  struct eb_vmas *eb,
-+				  struct drm_i915_gem_exec_object2 *exec)
- {
- 	struct drm_i915_gem_relocation_entry *reloc;
--	struct drm_i915_gem_object *obj;
-+	struct i915_address_space *vm;
-+	struct i915_vma *vma;
- 	bool need_relocs;
- 	int *reloc_offset;
- 	int i, total, ret;
- 	int count = args->buffer_count;
- 
-+	if (WARN_ON(list_empty(&eb->vmas)))
-+		return 0;
-+
-+	vm = list_first_entry(&eb->vmas, struct i915_vma, exec_list)->vm;
-+
- 	/* We may process another execbuffer during the unlock... */
--	while (!list_empty(&eb->objects)) {
--		obj = list_first_entry(&eb->objects,
--				       struct drm_i915_gem_object,
--				       exec_list);
--		list_del_init(&obj->exec_list);
--		drm_gem_object_unreference(&obj->base);
-+	while (!list_empty(&eb->vmas)) {
-+		vma = list_first_entry(&eb->vmas, struct i915_vma, exec_list);
-+		list_del_init(&vma->exec_list);
-+		drm_gem_object_unreference(&vma->obj->base);
- 	}
- 
- 	mutex_unlock(&dev->struct_mutex);
-@@ -695,20 +730,19 @@ i915_gem_execbuffer_relocate_slow(struct drm_device *dev,
- 
- 	/* reacquire the objects */
- 	eb_reset(eb);
--	ret = eb_lookup_objects(eb, exec, args, file);
-+	ret = eb_lookup_vmas(eb, exec, args, vm, file);
- 	if (ret)
- 		goto err;
- 
- 	need_relocs = (args->flags & I915_EXEC_NO_RELOC) == 0;
--	ret = i915_gem_execbuffer_reserve(ring, &eb->objects, vm, &need_relocs);
-+	ret = i915_gem_execbuffer_reserve(ring, &eb->vmas, &need_relocs);
- 	if (ret)
- 		goto err;
- 
--	list_for_each_entry(obj, &eb->objects, exec_list) {
--		int offset = obj->exec_entry - exec;
--		ret = i915_gem_execbuffer_relocate_object_slow(obj, eb,
--							       reloc + reloc_offset[offset],
--							       vm);
-+	list_for_each_entry(vma, &eb->vmas, exec_list) {
-+		int offset = vma->exec_entry - exec;
-+		ret = i915_gem_execbuffer_relocate_vma_slow(vma, eb,
-+							    reloc + reloc_offset[offset]);
- 		if (ret)
- 			goto err;
- 	}
-@@ -727,14 +761,15 @@ err:
- 
- static int
- i915_gem_execbuffer_move_to_gpu(struct intel_ring_buffer *ring,
--				struct list_head *objects)
-+				struct list_head *vmas)
- {
--	struct drm_i915_gem_object *obj;
-+	struct i915_vma *vma;
- 	uint32_t flush_domains = 0;
- 	bool flush_chipset = false;
- 	int ret;
- 
--	list_for_each_entry(obj, objects, exec_list) {
-+	list_for_each_entry(vma, vmas, exec_list) {
-+		struct drm_i915_gem_object *obj = vma->obj;
- 		ret = i915_gem_object_sync(obj, ring);
- 		if (ret)
- 			return ret;
-@@ -809,13 +844,13 @@ validate_exec_list(struct drm_i915_gem_exec_object2 *exec,
- }
- 
- static void
--i915_gem_execbuffer_move_to_active(struct list_head *objects,
--				   struct i915_address_space *vm,
-+i915_gem_execbuffer_move_to_active(struct list_head *vmas,
- 				   struct intel_ring_buffer *ring)
- {
--	struct drm_i915_gem_object *obj;
-+	struct i915_vma *vma;
- 
--	list_for_each_entry(obj, objects, exec_list) {
-+	list_for_each_entry(vma, vmas, exec_list) {
-+		struct drm_i915_gem_object *obj = vma->obj;
- 		u32 old_read = obj->base.read_domains;
- 		u32 old_write = obj->base.write_domain;
- 
-@@ -825,8 +860,7 @@ i915_gem_execbuffer_move_to_active(struct list_head *objects,
- 		obj->base.read_domains = obj->base.pending_read_domains;
- 		obj->fenced_gpu_access = obj->pending_fenced_gpu_access;
- 
--		/* FIXME: This lookup gets fixed later <-- danvet */
--		list_move_tail(&i915_gem_obj_to_vma(obj, vm)->mm_list, &vm->active_list);
-+		list_move_tail(&vma->mm_list, &vma->vm->active_list);
- 		i915_gem_object_move_to_active(obj, ring);
- 		if (obj->base.write_domain) {
- 			obj->dirty = 1;
-@@ -885,7 +919,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
- 		       struct i915_address_space *vm)
- {
- 	drm_i915_private_t *dev_priv = dev->dev_private;
--	struct eb_objects *eb;
-+	struct eb_vmas *eb;
- 	struct drm_i915_gem_object *batch_obj;
- 	struct drm_clip_rect *cliprects = NULL;
- 	struct intel_ring_buffer *ring;
-@@ -1025,7 +1059,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
- 		goto pre_mutex_err;
- 	}
- 
--	eb = eb_create(args);
-+	eb = eb_create(args, vm);
- 	if (eb == NULL) {
- 		mutex_unlock(&dev->struct_mutex);
- 		ret = -ENOMEM;
-@@ -1033,18 +1067,16 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
- 	}
- 
- 	/* Look up object handles */
--	ret = eb_lookup_objects(eb, exec, args, file);
-+	ret = eb_lookup_vmas(eb, exec, args, vm, file);
- 	if (ret)
- 		goto err;
- 
- 	/* take note of the batch buffer before we might reorder the lists */
--	batch_obj = list_entry(eb->objects.prev,
--			       struct drm_i915_gem_object,
--			       exec_list);
-+	batch_obj = list_entry(eb->vmas.prev, struct i915_vma, exec_list)->obj;
- 
- 	/* Move the objects en-masse into the GTT, evicting if necessary. */
- 	need_relocs = (args->flags & I915_EXEC_NO_RELOC) == 0;
--	ret = i915_gem_execbuffer_reserve(ring, &eb->objects, vm, &need_relocs);
-+	ret = i915_gem_execbuffer_reserve(ring, &eb->vmas, &need_relocs);
- 	if (ret)
- 		goto err;
- 
-@@ -1054,7 +1086,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
- 	if (ret) {
- 		if (ret == -EFAULT) {
- 			ret = i915_gem_execbuffer_relocate_slow(dev, args, file, ring,
--								eb, exec, vm);
-+								eb, exec);
- 			BUG_ON(!mutex_is_locked(&dev->struct_mutex));
- 		}
- 		if (ret)
-@@ -1076,7 +1108,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
- 	if (flags & I915_DISPATCH_SECURE && !batch_obj->has_global_gtt_mapping)
- 		i915_gem_gtt_bind_object(batch_obj, batch_obj->cache_level);
- 
--	ret = i915_gem_execbuffer_move_to_gpu(ring, &eb->objects);
-+	ret = i915_gem_execbuffer_move_to_gpu(ring, &eb->vmas);
- 	if (ret)
- 		goto err;
- 
-@@ -1131,7 +1163,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
- 
- 	trace_i915_gem_ring_dispatch(ring, intel_ring_get_seqno(ring), flags);
- 
--	i915_gem_execbuffer_move_to_active(&eb->objects, vm, ring);
-+	i915_gem_execbuffer_move_to_active(&eb->vmas, ring);
- 	i915_gem_execbuffer_retire_commands(dev, file, ring, batch_obj);
- 
- err:
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0763-drm-i915-inline-vma_create-into-lookup_or_create_vma.patch b/patches.baytrail/0763-drm-i915-inline-vma_create-into-lookup_or_create_vma.patch
deleted file mode 100644
index e8ac1eca93454..0000000000000
--- a/patches.baytrail/0763-drm-i915-inline-vma_create-into-lookup_or_create_vma.patch
+++ /dev/null
@@ -1,159 +0,0 @@
-From 4f1234ad50faafbb7897a1bb5a7926a74cb1f453 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Wed, 14 Aug 2013 14:14:04 +0200
-Subject: drm/i915: inline vma_create into lookup_or_create_vma
-
-In the execbuf code we don't clean up any vmas which ended up not
-getting bound for code simplicity. To make sure that we don't end up
-creating multiple vma for the same vm kill the somewhat dangerous
-vma_create function and inline it into lookup_or_create.
-
-This is just a safety measure to prevent surprises in the future.
-
-Also update the somewhat confused comment in the execbuf code and
-clarify what kind of magic is going on with a new one.
-
-v2: Keep the function separate as requested by Chris. But give it a __
-prefix for paranoia and move it tighter together with the other vma
-stuff.
-
-Cc: Chris Wilson <chris@chris-wilson.co.uk>
-Cc: Ben Widawsky <ben@bwidawsk.net>
-Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit e656a6cba0febf12a9838882b891e1c5917c7a8b)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h            |  2 --
- drivers/gpu/drm/i915/i915_gem.c            | 50 +++++++++++++++---------------
- drivers/gpu/drm/i915/i915_gem_execbuffer.c | 11 +++++--
- drivers/gpu/drm/i915/i915_gem_stolen.c     |  2 +-
- 4 files changed, 34 insertions(+), 31 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index b6494b24098d..d5cff9718103 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1826,8 +1826,6 @@ void i915_gem_object_init(struct drm_i915_gem_object *obj,
- struct drm_i915_gem_object *i915_gem_alloc_object(struct drm_device *dev,
- 						  size_t size);
- void i915_gem_free_object(struct drm_gem_object *obj);
--struct i915_vma *i915_gem_vma_create(struct drm_i915_gem_object *obj,
--				     struct i915_address_space *vm);
- void i915_gem_vma_destroy(struct i915_vma *vma);
- 
- int __must_check i915_gem_object_pin(struct drm_i915_gem_object *obj,
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index c4c56f98d6e6..6820d0a1231f 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -4109,9 +4109,20 @@ void i915_gem_free_object(struct drm_gem_object *gem_obj)
- 	i915_gem_object_free(obj);
- }
- 
--struct i915_vma *i915_gem_vma_create(struct drm_i915_gem_object *obj,
-+struct i915_vma *i915_gem_obj_to_vma(struct drm_i915_gem_object *obj,
- 				     struct i915_address_space *vm)
- {
-+	struct i915_vma *vma;
-+	list_for_each_entry(vma, &obj->vma_list, vma_link)
-+		if (vma->vm == vm)
-+			return vma;
-+
-+	return NULL;
-+}
-+
-+static struct i915_vma *__i915_gem_vma_create(struct drm_i915_gem_object *obj,
-+					      struct i915_address_space *vm)
-+{
- 	struct i915_vma *vma = kzalloc(sizeof(*vma), GFP_KERNEL);
- 	if (vma == NULL)
- 		return ERR_PTR(-ENOMEM);
-@@ -4131,6 +4142,19 @@ struct i915_vma *i915_gem_vma_create(struct drm_i915_gem_object *obj,
- 	return vma;
- }
- 
-+struct i915_vma *
-+i915_gem_obj_lookup_or_create_vma(struct drm_i915_gem_object *obj,
-+				  struct i915_address_space *vm)
-+{
-+	struct i915_vma *vma;
-+
-+	vma = i915_gem_obj_to_vma(obj, vm);
-+	if (!vma)
-+		vma = __i915_gem_vma_create(obj, vm);
-+
-+	return vma;
-+}
-+
- void i915_gem_vma_destroy(struct i915_vma *vma)
- {
- 	WARN_ON(vma->node.allocated);
-@@ -4857,27 +4881,3 @@ unsigned long i915_gem_obj_size(struct drm_i915_gem_object *o,
- 
- 	return 0;
- }
--
--struct i915_vma *i915_gem_obj_to_vma(struct drm_i915_gem_object *obj,
--				     struct i915_address_space *vm)
--{
--	struct i915_vma *vma;
--	list_for_each_entry(vma, &obj->vma_list, vma_link)
--		if (vma->vm == vm)
--			return vma;
--
--	return NULL;
--}
--
--struct i915_vma *
--i915_gem_obj_lookup_or_create_vma(struct drm_i915_gem_object *obj,
--				  struct i915_address_space *vm)
--{
--	struct i915_vma *vma;
--
--	vma = i915_gem_obj_to_vma(obj, vm);
--	if (!vma)
--		vma = i915_gem_vma_create(obj, vm);
--
--	return vma;
--}
-diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-index 5dcfd4f59f87..93c8b28ff2e1 100644
---- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-@@ -123,11 +123,16 @@ eb_lookup_vmas(struct eb_vmas *eb,
- 	list_for_each_entry(obj, &objects, obj_exec_link) {
- 		struct i915_vma *vma;
- 
-+		/*
-+		 * NOTE: We can leak any vmas created here when something fails
-+		 * later on. But that's no issue since vma_unbind can deal with
-+		 * vmas which are not actually bound. And since only
-+		 * lookup_or_create exists as an interface to get at the vma
-+		 * from the (obj, vm) we don't run the risk of creating
-+		 * duplicated vmas for the same vm.
-+		 */
- 		vma = i915_gem_obj_lookup_or_create_vma(obj, vm);
- 		if (IS_ERR(vma)) {
--			/* XXX: We don't need an error path fro vma because if
--			 * the vma was created just for this execbuf, object
--			 * unreference should kill it off.*/
- 			DRM_DEBUG("Failed to lookup VMA\n");
- 			ret = PTR_ERR(vma);
- 			goto out;
-diff --git a/drivers/gpu/drm/i915/i915_gem_stolen.c b/drivers/gpu/drm/i915/i915_gem_stolen.c
-index 9969d10b80f5..b902f2afc8e2 100644
---- a/drivers/gpu/drm/i915/i915_gem_stolen.c
-+++ b/drivers/gpu/drm/i915/i915_gem_stolen.c
-@@ -392,7 +392,7 @@ i915_gem_object_create_stolen_for_preallocated(struct drm_device *dev,
- 	if (gtt_offset == I915_GTT_OFFSET_NONE)
- 		return obj;
- 
--	vma = i915_gem_vma_create(obj, ggtt);
-+	vma = i915_gem_obj_lookup_or_create_vma(obj, ggtt);
- 	if (IS_ERR(vma)) {
- 		ret = PTR_ERR(vma);
- 		goto err_out;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0764-drm-i915-Don-t-destroy-the-vma-placeholder-during-ex.patch b/patches.baytrail/0764-drm-i915-Don-t-destroy-the-vma-placeholder-during-ex.patch
deleted file mode 100644
index 948332e2c836b..0000000000000
--- a/patches.baytrail/0764-drm-i915-Don-t-destroy-the-vma-placeholder-during-ex.patch
+++ /dev/null
@@ -1,55 +0,0 @@
-From a35424bc1cd91732fb3dae696f5a65fab604ca5e Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Tue, 20 Aug 2013 12:56:40 +0100
-Subject: drm/i915: Don't destroy the vma placeholder during execbuffer
- reservation
-
-The execbuffer handle and exec_link were moved from the object into the
-vma. As the vma may be unbound and destroyed whilst attempting to
-reserve the execbuffer objects (either through a forced unbind to fix up
-a misalignment or through an evict-everything call) we need to prevent
-the free of the i915_vma itself. Otherwise not only is the list of
-objects to reserve corrupt, but we continue to reference stale vma
-entries.
-
-Fixes kernel crash with i-g-t/gem_evict_everything
-
-This regression has been introduced in
-
-commit 04038a515d6eda6dd0857c0ade0b3950d372f4c0
-Author:     Ben Widawsky <ben@bwidawsk.net>
-AuthorDate: Wed Aug 14 11:38:36 2013 +0200
-
-    drm/i915: Convert execbuf code to use vmas
-
-Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
-References: http://www.spinics.net/lists/intel-gfx/msg32038.html
-Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=68298
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Cc: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit aaa0566792dc7ae68deb1959663581ea8c75d311)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem.c | 5 +++++
- 1 file changed, 5 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index 6820d0a1231f..29b7e1c32b84 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -4159,6 +4159,11 @@ void i915_gem_vma_destroy(struct i915_vma *vma)
- {
- 	WARN_ON(vma->node.allocated);
- 	list_del(&vma->vma_link);
-+
-+	/* Keep the vma as a placeholder in the execbuffer reservation lists */
-+	if (!list_empty(&vma->exec_list))
-+		return;
-+
- 	kfree(vma);
- }
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0765-drm-i915-More-vma-fixups-around-unbind-destroy.patch b/patches.baytrail/0765-drm-i915-More-vma-fixups-around-unbind-destroy.patch
deleted file mode 100644
index 0925406eefac3..0000000000000
--- a/patches.baytrail/0765-drm-i915-More-vma-fixups-around-unbind-destroy.patch
+++ /dev/null
@@ -1,162 +0,0 @@
-From 8c7430e0360652b1a96ce2ce29799091ef05e7c3 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Mon, 26 Aug 2013 11:23:47 +0200
-Subject: drm/i915: More vma fixups around unbind/destroy
-
-The important bugfix here is that we must not unlink the vma when
-we keep it around as a placeholder for the execbuf code. Since then we
-won't find it again when execbuf gets interrupt and restarted and
-create a 2nd vma. And since the code as-is isn't fit yet to deal with
-more than one vma, hilarity ensues.
-
-Specifically the dma map/unmap of the sg table isn't adjusted for
-multiple vmas yet and will blow up like this:
-
-BUG: unable to handle kernel NULL pointer dereference at 0000000000000008
-IP: [<ffffffffa008fb37>] i915_gem_gtt_finish_object+0x73/0xc8 [i915]
-PGD 56bb5067 PUD ad3dd067 PMD 0
-Oops: 0000 [#1] SMP
-Modules linked in: tcp_lp ppdev parport_pc lp parport ipv6 dm_mod dcdbas snd_hda_codec_hdmi pcspkr snd_hda_codec_realtek serio_raw i2c_i801 iTCO_wdt iTCO_vendor_support snd_hda_intel snd_hda_codec lpc_ich snd_hwdep mfd_core snd_pcm snd_page_alloc snd_timer snd soundcore acpi_cpufreq i915 video button drm_kms_helper drm mperf freq_table
-CPU: 1 PID: 16650 Comm: fbo-maxsize Not tainted 3.11.0-rc4_nightlytop_d93f59_debug_20130814_+ #6957
-Hardware name: Dell Inc. OptiPlex 9010/03JR84, BIOS A01 05/04/2012
-task: ffff8800563b3f00 ti: ffff88004bdf4000 task.ti: ffff88004bdf4000
-RIP: 0010:[<ffffffffa008fb37>]  [<ffffffffa008fb37>] i915_gem_gtt_finish_object+0x73/0xc8 [i915]
-RSP: 0018:ffff88004bdf5958  EFLAGS: 00010246
-RAX: 0000000000000000 RBX: ffff8801135e0000 RCX: ffff8800ad3bf8e0
-RDX: ffff8800ad3bf8e0 RSI: 0000000000000000 RDI: ffff8801007ee780
-RBP: ffff88004bdf5978 R08: ffff8800ad3bf8e0 R09: 0000000000000000
-R10: ffffffff86ca1810 R11: ffff880036a17101 R12: ffff8801007ee780
-R13: 0000000000018001 R14: ffff880118c4e000 R15: ffff8801007ee780
-FS:  00007f401a0ce740(0000) GS:ffff88011e280000(0000) knlGS:0000000000000000
-CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
-CR2: 0000000000000008 CR3: 000000005635c000 CR4: 00000000001407e0
-Stack:
- ffff8801007ee780 ffff88005c253180 0000000000018000 ffff8801135e0000
- ffff88004bdf59a8 ffffffffa0088e55 0000000000000011 ffff8801007eec00
- 0000000000018000 ffff880036a17101 ffff88004bdf5a08 ffffffffa0089026
-Call Trace:
- [<ffffffffa0088e55>] i915_vma_unbind+0xdf/0x1ab [i915]
- [<ffffffffa0089026>] __i915_gem_shrink+0x105/0x177 [i915]
- [<ffffffffa0089452>] i915_gem_object_get_pages_gtt+0x108/0x309 [i915]
- [<ffffffffa0085ba9>] i915_gem_object_get_pages+0x61/0x90 [i915]
- [<ffffffffa008f22b>] ? gen6_ppgtt_insert_entries+0x103/0x125 [i915]
- [<ffffffffa008a113>] i915_gem_object_pin+0x1fa/0x5df [i915]
- [<ffffffffa008cdfe>] i915_gem_execbuffer_reserve_object.isra.6+0x8d/0x1bc [i915]
- [<ffffffffa008d156>] i915_gem_execbuffer_reserve+0x229/0x367 [i915]
- [<ffffffffa008dbf6>] i915_gem_do_execbuffer.isra.12+0x4dc/0xf3a [i915]
- [<ffffffff810fc823>] ? might_fault+0x40/0x90
- [<ffffffffa008eb89>] i915_gem_execbuffer2+0x187/0x222 [i915]
- [<ffffffffa000971c>] drm_ioctl+0x308/0x442 [drm]
- [<ffffffffa008ea02>] ? i915_gem_execbuffer+0x3ae/0x3ae [i915]
- [<ffffffff817db156>] ? __do_page_fault+0x3dd/0x481
- [<ffffffff8112fdba>] vfs_ioctl+0x26/0x39
- [<ffffffff811306a2>] do_vfs_ioctl+0x40e/0x451
- [<ffffffff817deda7>] ? sysret_check+0x1b/0x56
- [<ffffffff8113073c>] SyS_ioctl+0x57/0x87
- [<ffffffff8135bbfe>] ? trace_hardirqs_on_thunk+0x3a/0x3f
- [<ffffffff817ded82>] system_call_fastpath+0x16/0x1b
-Code: 48 c7 c6 84 30 0e a0 31 c0 e8 d0 e9 f7 ff bf c6 a7 00 00 e8 07 af 2c e1 41 f6 84 24 03 01 00 00 10 75 44 49 8b 84 24 08 01 00 00 <8b> 50 08 48 8b 30 49 8b 86 b0 04 00 00 48 89 c7 48 81 c7 98 00
-RIP  [<ffffffffa008fb37>] i915_gem_gtt_finish_object+0x73/0xc8 [i915]
- RSP <ffff88004bdf5958>
-CR2: 0000000000000008
-
-As a consequence we need to change the "only one vma for now" check in
-vma_unbind - since vma_destroy isn't always called the obj->vma_list
-might not be empty. Instead check that the vma list is singular at the
-beginning of vma_unbind. This is also more symmetric with bind_to_vm.
-
-This fixes the igt/gem_evict_everything|alignment testcases.
-
-v2:
-- Add a paranoid WARN to mark_free in the eviction code to make sure
-  we never try to evict a vma used by the execbuf code right now.
-- Move the check for a temporary execbuf vma into vma_destroy -
-  otherwise the failure path cleanup in bind_to_vm will blow up.
-
-Our first attempting at fixing this was
-
-commit 1be81a2f2cfd8789a627401d470423358fba2d76
-Author: Chris Wilson <chris@chris-wilson.co.uk>
-Date:   Tue Aug 20 12:56:40 2013 +0100
-
-    drm/i915: Don't destroy the vma placeholder during execbuffer reservation
-
-Squash with this when merging!
-
-v3: Improvements suggested in Chris' review:
-- Move the WARN_ON in vma_destroy that checks for vmas with an drm_mm
-  allocation before the early return.
-- Bail out if we hit the WARN in mark_free to hopefully make the
-  kernel survive for long enough to capture it.
-
-Cc: Chris Wilson <chris@chris-wilson.co.uk>
-Cc: Ben Widawsky <ben@bwidawsk.net>
-Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=68298
-Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=68171
-Tested-by: lu hua <huax.lu@intel.com> (v2)
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit b93dab6e9d286ec2cd95b28078afdfa6dd515205)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem.c       | 10 ++++++----
- drivers/gpu/drm/i915/i915_gem_evict.c |  3 +++
- 2 files changed, 9 insertions(+), 4 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index 29b7e1c32b84..d57368d5fc1d 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -2604,6 +2604,9 @@ int i915_vma_unbind(struct i915_vma *vma)
- 	drm_i915_private_t *dev_priv = obj->base.dev->dev_private;
- 	int ret;
- 
-+	/* For now we only ever use 1 vma per object */
-+	WARN_ON(!list_is_singular(&obj->vma_list));
-+
- 	if (list_empty(&vma->vma_link))
- 		return 0;
- 
-@@ -2652,9 +2655,7 @@ destroy:
- 	i915_gem_vma_destroy(vma);
- 
- 	/* Since the unbound list is global, only move to that list if
--	 * no more VMAs exist.
--	 * NB: Until we have real VMAs there will only ever be one */
--	WARN_ON(!list_empty(&obj->vma_list));
-+	 * no more VMAs exist. */
- 	if (list_empty(&obj->vma_list))
- 		list_move_tail(&obj->global_list, &dev_priv->mm.unbound_list);
- 
-@@ -4158,12 +4159,13 @@ i915_gem_obj_lookup_or_create_vma(struct drm_i915_gem_object *obj,
- void i915_gem_vma_destroy(struct i915_vma *vma)
- {
- 	WARN_ON(vma->node.allocated);
--	list_del(&vma->vma_link);
- 
- 	/* Keep the vma as a placeholder in the execbuffer reservation lists */
- 	if (!list_empty(&vma->exec_list))
- 		return;
- 
-+	list_del(&vma->vma_link);
-+
- 	kfree(vma);
- }
- 
-diff --git a/drivers/gpu/drm/i915/i915_gem_evict.c b/drivers/gpu/drm/i915/i915_gem_evict.c
-index 91b700155850..cc8974fbcf31 100644
---- a/drivers/gpu/drm/i915/i915_gem_evict.c
-+++ b/drivers/gpu/drm/i915/i915_gem_evict.c
-@@ -37,6 +37,9 @@ mark_free(struct i915_vma *vma, struct list_head *unwind)
- 	if (vma->obj->pin_count)
- 		return false;
- 
-+	if (WARN_ON(!list_empty(&vma->exec_list)))
-+		return false;
-+
- 	list_add(&vma->exec_list, unwind);
- 	return drm_mm_scan_add_block(&vma->node);
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0766-drm-i915-Always-prefer-CPU-relocations-with-LLC.patch b/patches.baytrail/0766-drm-i915-Always-prefer-CPU-relocations-with-LLC.patch
deleted file mode 100644
index 29e47e9a0d079..0000000000000
--- a/patches.baytrail/0766-drm-i915-Always-prefer-CPU-relocations-with-LLC.patch
+++ /dev/null
@@ -1,49 +0,0 @@
-From 3e771b4b332fef7727f88398f5f14de6e280dee7 Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Mon, 26 Aug 2013 19:51:00 -0300
-Subject: drm/i915: Always prefer CPU relocations with LLC
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-A follow-on to the update of the LLC coherency logic is that we can rely
-on the LLC being coherent with the CS for rewriting batchbuffers
-irrespective of their cache domain. (This should have no effect
-currently as all the batch buffers are expected to be I915_CACHE_LLC and
-so using the cpu relocation path anyway.)
-
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 2cc86b826070cf312d7b0571e383c56d31a1fe5c)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem_execbuffer.c | 5 +++--
- 1 file changed, 3 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-index 93c8b28ff2e1..e519f9f6e5cd 100644
---- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-@@ -202,7 +202,8 @@ static void eb_destroy(struct eb_vmas *eb) {
- 
- static inline int use_cpu_reloc(struct drm_i915_gem_object *obj)
- {
--	return (obj->base.write_domain == I915_GEM_DOMAIN_CPU ||
-+	return (HAS_LLC(obj->base.dev) ||
-+		obj->base.write_domain == I915_GEM_DOMAIN_CPU ||
- 		!obj->map_and_fenceable ||
- 		obj->cache_level != I915_CACHE_NONE);
- }
-@@ -215,7 +216,7 @@ relocate_entry_cpu(struct drm_i915_gem_object *obj,
- 	char *vaddr;
- 	int ret = -EINVAL;
- 
--	ret = i915_gem_object_set_to_cpu_domain(obj, 1);
-+	ret = i915_gem_object_set_to_cpu_domain(obj, true);
- 	if (ret)
- 		return ret;
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0767-drm-i915-add-more-VLV-IOSF-sideband-ports-accessors.patch b/patches.baytrail/0767-drm-i915-add-more-VLV-IOSF-sideband-ports-accessors.patch
deleted file mode 100644
index 351d8fd44eadd..0000000000000
--- a/patches.baytrail/0767-drm-i915-add-more-VLV-IOSF-sideband-ports-accessors.patch
+++ /dev/null
@@ -1,126 +0,0 @@
-From db7934bf88644a03618d2fea1c1d36b995cc3c26 Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Tue, 27 Aug 2013 15:12:14 +0300
-Subject: drm/i915: add more VLV IOSF sideband ports accessors
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-For GPIO NC, CCK, CCU, and GPS CORE.
-
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit e9f882a3f1e4ffabe0730af16d5f6d51737515a5)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h       |  8 +++++
- drivers/gpu/drm/i915/i915_reg.h       |  4 +++
- drivers/gpu/drm/i915/intel_sideband.c | 56 +++++++++++++++++++++++++++++++++++
- 3 files changed, 68 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index d5cff9718103..e2628579dcbe 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -2248,6 +2248,14 @@ int sandybridge_pcode_write(struct drm_i915_private *dev_priv, u8 mbox, u32 val)
- u32 vlv_punit_read(struct drm_i915_private *dev_priv, u8 addr);
- void vlv_punit_write(struct drm_i915_private *dev_priv, u8 addr, u32 val);
- u32 vlv_nc_read(struct drm_i915_private *dev_priv, u8 addr);
-+u32 vlv_gpio_nc_read(struct drm_i915_private *dev_priv, u32 reg);
-+void vlv_gpio_nc_write(struct drm_i915_private *dev_priv, u32 reg, u32 val);
-+u32 vlv_cck_read(struct drm_i915_private *dev_priv, u32 reg);
-+void vlv_cck_write(struct drm_i915_private *dev_priv, u32 reg, u32 val);
-+u32 vlv_ccu_read(struct drm_i915_private *dev_priv, u32 reg);
-+void vlv_ccu_write(struct drm_i915_private *dev_priv, u32 reg, u32 val);
-+u32 vlv_gps_core_read(struct drm_i915_private *dev_priv, u32 reg);
-+void vlv_gps_core_write(struct drm_i915_private *dev_priv, u32 reg, u32 val);
- u32 vlv_dpio_read(struct drm_i915_private *dev_priv, int reg);
- void vlv_dpio_write(struct drm_i915_private *dev_priv, int reg, u32 val);
- u32 intel_sbi_read(struct drm_i915_private *dev_priv, u16 reg,
-diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
-index c159e1a6810f..8f4c8b69ebc1 100644
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -346,6 +346,10 @@
- #define   IOSF_PORT_PUNIT			0x4
- #define   IOSF_PORT_NC				0x11
- #define   IOSF_PORT_DPIO			0x12
-+#define   IOSF_PORT_GPIO_NC			0x13
-+#define   IOSF_PORT_CCK				0x14
-+#define   IOSF_PORT_CCU				0xA9
-+#define   IOSF_PORT_GPS_CORE			0x48
- #define VLV_IOSF_DATA				(VLV_DISPLAY_BASE + 0x2104)
- #define VLV_IOSF_ADDR				(VLV_DISPLAY_BASE + 0x2108)
- 
-diff --git a/drivers/gpu/drm/i915/intel_sideband.c b/drivers/gpu/drm/i915/intel_sideband.c
-index 9a0e6c5ea540..0a4167019769 100644
---- a/drivers/gpu/drm/i915/intel_sideband.c
-+++ b/drivers/gpu/drm/i915/intel_sideband.c
-@@ -101,6 +101,62 @@ u32 vlv_nc_read(struct drm_i915_private *dev_priv, u8 addr)
- 	return val;
- }
- 
-+u32 vlv_gpio_nc_read(struct drm_i915_private *dev_priv, u32 reg)
-+{
-+	u32 val = 0;
-+	vlv_sideband_rw(dev_priv, PCI_DEVFN(2, 0), IOSF_PORT_GPIO_NC,
-+			PUNIT_OPCODE_REG_READ, reg, &val);
-+	return val;
-+}
-+
-+void vlv_gpio_nc_write(struct drm_i915_private *dev_priv, u32 reg, u32 val)
-+{
-+	vlv_sideband_rw(dev_priv, PCI_DEVFN(2, 0), IOSF_PORT_GPIO_NC,
-+			PUNIT_OPCODE_REG_WRITE, reg, &val);
-+}
-+
-+u32 vlv_cck_read(struct drm_i915_private *dev_priv, u32 reg)
-+{
-+	u32 val = 0;
-+	vlv_sideband_rw(dev_priv, PCI_DEVFN(2, 0), IOSF_PORT_CCK,
-+			PUNIT_OPCODE_REG_READ, reg, &val);
-+	return val;
-+}
-+
-+void vlv_cck_write(struct drm_i915_private *dev_priv, u32 reg, u32 val)
-+{
-+	vlv_sideband_rw(dev_priv, PCI_DEVFN(2, 0), IOSF_PORT_CCK,
-+			PUNIT_OPCODE_REG_WRITE, reg, &val);
-+}
-+
-+u32 vlv_ccu_read(struct drm_i915_private *dev_priv, u32 reg)
-+{
-+	u32 val = 0;
-+	vlv_sideband_rw(dev_priv, PCI_DEVFN(2, 0), IOSF_PORT_CCU,
-+			PUNIT_OPCODE_REG_READ, reg, &val);
-+	return val;
-+}
-+
-+void vlv_ccu_write(struct drm_i915_private *dev_priv, u32 reg, u32 val)
-+{
-+	vlv_sideband_rw(dev_priv, PCI_DEVFN(2, 0), IOSF_PORT_CCU,
-+			PUNIT_OPCODE_REG_WRITE, reg, &val);
-+}
-+
-+u32 vlv_gps_core_read(struct drm_i915_private *dev_priv, u32 reg)
-+{
-+	u32 val = 0;
-+	vlv_sideband_rw(dev_priv, PCI_DEVFN(2, 0), IOSF_PORT_GPS_CORE,
-+			PUNIT_OPCODE_REG_READ, reg, &val);
-+	return val;
-+}
-+
-+void vlv_gps_core_write(struct drm_i915_private *dev_priv, u32 reg, u32 val)
-+{
-+	vlv_sideband_rw(dev_priv, PCI_DEVFN(2, 0), IOSF_PORT_GPS_CORE,
-+			PUNIT_OPCODE_REG_WRITE, reg, &val);
-+}
-+
- u32 vlv_dpio_read(struct drm_i915_private *dev_priv, int reg)
- {
- 	u32 val = 0;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0768-drm-i915-add-VLV-pipeconf-bit-definition-for-DSI-PLL.patch b/patches.baytrail/0768-drm-i915-add-VLV-pipeconf-bit-definition-for-DSI-PLL.patch
deleted file mode 100644
index 9bafe87a72b7d..0000000000000
--- a/patches.baytrail/0768-drm-i915-add-VLV-pipeconf-bit-definition-for-DSI-PLL.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From 06e3de15d4903284316cf6ccf24e4afe2a84c66f Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Tue, 27 Aug 2013 15:12:15 +0300
-Subject: drm/i915: add VLV pipeconf bit definition for DSI PLL lock
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-v2: Add comment this is pipe A only (Ville)
-
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit b6ec10b36566c3eb330f4c03c1b00a02c974fd21)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_reg.h |    1 +
- 1 file changed, 1 insertion(+)
-
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -2990,6 +2990,7 @@
- #define   PIPECONF_DISABLE	0
- #define   PIPECONF_DOUBLE_WIDE	(1<<30)
- #define   I965_PIPECONF_ACTIVE	(1<<30)
-+#define   PIPECONF_DSI_PLL_LOCKED	(1<<29) /* vlv & pipe A only */
- #define   PIPECONF_FRAME_START_DELAY_MASK (3<<27)
- #define   PIPECONF_SINGLE_WIDE	0
- #define   PIPECONF_PIPE_UNLOCKED 0
diff --git a/patches.baytrail/0769-drm-Constify-the-pretty-print-functions.patch b/patches.baytrail/0769-drm-Constify-the-pretty-print-functions.patch
deleted file mode 100644
index c11a749d4f907..0000000000000
--- a/patches.baytrail/0769-drm-Constify-the-pretty-print-functions.patch
+++ /dev/null
@@ -1,221 +0,0 @@
-From 4ae68d3144eb021a6475549fb069944eb5806a47 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Fri, 7 Jun 2013 15:43:07 +0000
-Subject: drm: Constify the pretty-print functions
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The structures and strings involved with various pretty-print functions
-aren't meant to be modified, so make them all const. The exception is
-drm_connector_enum_list which does get modified in drm_connector_init().
-
-While at it move the drm_get_connector_status_name() prototype from
-drmP.h to drm_crtc.h where it belongs.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit d20d3174806ef6589cb912a488657d21fcd7ece2)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_crtc.c | 30 +++++++++++++++---------------
- include/drm/drmP.h         |  1 -
- include/drm/drm_crtc.h     | 17 +++++++++--------
- 3 files changed, 24 insertions(+), 24 deletions(-)
-
-diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
-index a014cb1ebcaf..23be1ee46f76 100644
---- a/drivers/gpu/drm/drm_crtc.c
-+++ b/drivers/gpu/drm/drm_crtc.c
-@@ -92,7 +92,7 @@ EXPORT_SYMBOL(drm_warn_on_modeset_not_all_locked);
- 
- /* Avoid boilerplate.  I'm tired of typing. */
- #define DRM_ENUM_NAME_FN(fnname, list)				\
--	char *fnname(int val)					\
-+	const char *fnname(int val)				\
- 	{							\
- 		int i;						\
- 		for (i = 0; i < ARRAY_SIZE(list); i++) {	\
-@@ -105,7 +105,7 @@ EXPORT_SYMBOL(drm_warn_on_modeset_not_all_locked);
- /*
-  * Global properties
-  */
--static struct drm_prop_enum_list drm_dpms_enum_list[] =
-+static const struct drm_prop_enum_list drm_dpms_enum_list[] =
- {	{ DRM_MODE_DPMS_ON, "On" },
- 	{ DRM_MODE_DPMS_STANDBY, "Standby" },
- 	{ DRM_MODE_DPMS_SUSPEND, "Suspend" },
-@@ -117,7 +117,7 @@ DRM_ENUM_NAME_FN(drm_get_dpms_name, drm_dpms_enum_list)
- /*
-  * Optional properties
-  */
--static struct drm_prop_enum_list drm_scaling_mode_enum_list[] =
-+static const struct drm_prop_enum_list drm_scaling_mode_enum_list[] =
- {
- 	{ DRM_MODE_SCALE_NONE, "None" },
- 	{ DRM_MODE_SCALE_FULLSCREEN, "Full" },
-@@ -125,7 +125,7 @@ static struct drm_prop_enum_list drm_scaling_mode_enum_list[] =
- 	{ DRM_MODE_SCALE_ASPECT, "Full aspect" },
- };
- 
--static struct drm_prop_enum_list drm_dithering_mode_enum_list[] =
-+static const struct drm_prop_enum_list drm_dithering_mode_enum_list[] =
- {
- 	{ DRM_MODE_DITHERING_OFF, "Off" },
- 	{ DRM_MODE_DITHERING_ON, "On" },
-@@ -135,7 +135,7 @@ static struct drm_prop_enum_list drm_dithering_mode_enum_list[] =
- /*
-  * Non-global properties, but "required" for certain connectors.
-  */
--static struct drm_prop_enum_list drm_dvi_i_select_enum_list[] =
-+static const struct drm_prop_enum_list drm_dvi_i_select_enum_list[] =
- {
- 	{ DRM_MODE_SUBCONNECTOR_Automatic, "Automatic" }, /* DVI-I and TV-out */
- 	{ DRM_MODE_SUBCONNECTOR_DVID,      "DVI-D"     }, /* DVI-I  */
-@@ -144,7 +144,7 @@ static struct drm_prop_enum_list drm_dvi_i_select_enum_list[] =
- 
- DRM_ENUM_NAME_FN(drm_get_dvi_i_select_name, drm_dvi_i_select_enum_list)
- 
--static struct drm_prop_enum_list drm_dvi_i_subconnector_enum_list[] =
-+static const struct drm_prop_enum_list drm_dvi_i_subconnector_enum_list[] =
- {
- 	{ DRM_MODE_SUBCONNECTOR_Unknown,   "Unknown"   }, /* DVI-I and TV-out */
- 	{ DRM_MODE_SUBCONNECTOR_DVID,      "DVI-D"     }, /* DVI-I  */
-@@ -154,7 +154,7 @@ static struct drm_prop_enum_list drm_dvi_i_subconnector_enum_list[] =
- DRM_ENUM_NAME_FN(drm_get_dvi_i_subconnector_name,
- 		 drm_dvi_i_subconnector_enum_list)
- 
--static struct drm_prop_enum_list drm_tv_select_enum_list[] =
-+static const struct drm_prop_enum_list drm_tv_select_enum_list[] =
- {
- 	{ DRM_MODE_SUBCONNECTOR_Automatic, "Automatic" }, /* DVI-I and TV-out */
- 	{ DRM_MODE_SUBCONNECTOR_Composite, "Composite" }, /* TV-out */
-@@ -165,7 +165,7 @@ static struct drm_prop_enum_list drm_tv_select_enum_list[] =
- 
- DRM_ENUM_NAME_FN(drm_get_tv_select_name, drm_tv_select_enum_list)
- 
--static struct drm_prop_enum_list drm_tv_subconnector_enum_list[] =
-+static const struct drm_prop_enum_list drm_tv_subconnector_enum_list[] =
- {
- 	{ DRM_MODE_SUBCONNECTOR_Unknown,   "Unknown"   }, /* DVI-I and TV-out */
- 	{ DRM_MODE_SUBCONNECTOR_Composite, "Composite" }, /* TV-out */
-@@ -177,7 +177,7 @@ static struct drm_prop_enum_list drm_tv_subconnector_enum_list[] =
- DRM_ENUM_NAME_FN(drm_get_tv_subconnector_name,
- 		 drm_tv_subconnector_enum_list)
- 
--static struct drm_prop_enum_list drm_dirty_info_enum_list[] = {
-+static const struct drm_prop_enum_list drm_dirty_info_enum_list[] = {
- 	{ DRM_MODE_DIRTY_OFF,      "Off"      },
- 	{ DRM_MODE_DIRTY_ON,       "On"       },
- 	{ DRM_MODE_DIRTY_ANNOTATE, "Annotate" },
-@@ -185,7 +185,7 @@ static struct drm_prop_enum_list drm_dirty_info_enum_list[] = {
- 
- struct drm_conn_prop_enum_list {
- 	int type;
--	char *name;
-+	const char *name;
- 	int count;
- };
- 
-@@ -211,7 +211,7 @@ static struct drm_conn_prop_enum_list drm_connector_enum_list[] =
- 	{ DRM_MODE_CONNECTOR_VIRTUAL, "Virtual", 0},
- };
- 
--static struct drm_prop_enum_list drm_encoder_enum_list[] =
-+static const struct drm_prop_enum_list drm_encoder_enum_list[] =
- {	{ DRM_MODE_ENCODER_NONE, "None" },
- 	{ DRM_MODE_ENCODER_DAC, "DAC" },
- 	{ DRM_MODE_ENCODER_TMDS, "TMDS" },
-@@ -220,7 +220,7 @@ static struct drm_prop_enum_list drm_encoder_enum_list[] =
- 	{ DRM_MODE_ENCODER_VIRTUAL, "Virtual" },
- };
- 
--char *drm_get_encoder_name(struct drm_encoder *encoder)
-+const char *drm_get_encoder_name(const struct drm_encoder *encoder)
- {
- 	static char buf[32];
- 
-@@ -231,7 +231,7 @@ char *drm_get_encoder_name(struct drm_encoder *encoder)
- }
- EXPORT_SYMBOL(drm_get_encoder_name);
- 
--char *drm_get_connector_name(struct drm_connector *connector)
-+const char *drm_get_connector_name(const struct drm_connector *connector)
- {
- 	static char buf[32];
- 
-@@ -242,7 +242,7 @@ char *drm_get_connector_name(struct drm_connector *connector)
- }
- EXPORT_SYMBOL(drm_get_connector_name);
- 
--char *drm_get_connector_status_name(enum drm_connector_status status)
-+const char *drm_get_connector_status_name(enum drm_connector_status status)
- {
- 	if (status == connector_status_connected)
- 		return "connected";
-@@ -258,7 +258,7 @@ static char printable_char(int c)
- 	return isascii(c) && isprint(c) ? c : '?';
- }
- 
--char *drm_get_format_name(uint32_t format)
-+const char *drm_get_format_name(uint32_t format)
- {
- 	static char buf[32];
- 
-diff --git a/include/drm/drmP.h b/include/drm/drmP.h
-index adb4c330b086..ea284972a33c 100644
---- a/include/drm/drmP.h
-+++ b/include/drm/drmP.h
-@@ -1545,7 +1545,6 @@ extern void drm_sysfs_destroy(void);
- extern int drm_sysfs_device_add(struct drm_minor *minor);
- extern void drm_sysfs_hotplug_event(struct drm_device *dev);
- extern void drm_sysfs_device_remove(struct drm_minor *minor);
--extern char *drm_get_connector_status_name(enum drm_connector_status status);
- extern int drm_sysfs_connector_add(struct drm_connector *connector);
- extern void drm_sysfs_connector_remove(struct drm_connector *connector);
- 
-diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h
-index 7a2d68f946c6..994b910ed9ce 100644
---- a/include/drm/drm_crtc.h
-+++ b/include/drm/drm_crtc.h
-@@ -903,12 +903,13 @@ extern void drm_plane_cleanup(struct drm_plane *plane);
- 
- extern void drm_encoder_cleanup(struct drm_encoder *encoder);
- 
--extern char *drm_get_connector_name(struct drm_connector *connector);
--extern char *drm_get_dpms_name(int val);
--extern char *drm_get_dvi_i_subconnector_name(int val);
--extern char *drm_get_dvi_i_select_name(int val);
--extern char *drm_get_tv_subconnector_name(int val);
--extern char *drm_get_tv_select_name(int val);
-+extern const char *drm_get_connector_name(const struct drm_connector *connector);
-+extern const char *drm_get_connector_status_name(enum drm_connector_status status);
-+extern const char *drm_get_dpms_name(int val);
-+extern const char *drm_get_dvi_i_subconnector_name(int val);
-+extern const char *drm_get_dvi_i_select_name(int val);
-+extern const char *drm_get_tv_subconnector_name(int val);
-+extern const char *drm_get_tv_select_name(int val);
- extern void drm_fb_release(struct drm_file *file_priv);
- extern int drm_mode_group_init_legacy_group(struct drm_device *dev, struct drm_mode_group *group);
- extern bool drm_probe_ddc(struct i2c_adapter *adapter);
-@@ -1000,7 +1001,7 @@ extern int drm_mode_create_tv_properties(struct drm_device *dev, int num_formats
- extern int drm_mode_create_scaling_mode_property(struct drm_device *dev);
- extern int drm_mode_create_dithering_property(struct drm_device *dev);
- extern int drm_mode_create_dirty_info_property(struct drm_device *dev);
--extern char *drm_get_encoder_name(struct drm_encoder *encoder);
-+extern const char *drm_get_encoder_name(const struct drm_encoder *encoder);
- 
- extern int drm_mode_connector_attach_encoder(struct drm_connector *connector,
- 					     struct drm_encoder *encoder);
-@@ -1100,6 +1101,6 @@ extern int drm_format_num_planes(uint32_t format);
- extern int drm_format_plane_cpp(uint32_t format, int plane);
- extern int drm_format_horz_chroma_subsampling(uint32_t format);
- extern int drm_format_vert_chroma_subsampling(uint32_t format);
--extern char *drm_get_format_name(uint32_t format);
-+extern const char *drm_get_format_name(uint32_t format);
- 
- #endif /* __DRM_CRTC_H__ */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0770-drm-use-ida-to-allocate-connector-ids.patch b/patches.baytrail/0770-drm-use-ida-to-allocate-connector-ids.patch
deleted file mode 100644
index 50ca8a85a12a6..0000000000000
--- a/patches.baytrail/0770-drm-use-ida-to-allocate-connector-ids.patch
+++ /dev/null
@@ -1,166 +0,0 @@
-From fe27353196ffd321891fcbce6b578e03a89016ca Mon Sep 17 00:00:00 2001
-From: Ilia Mirkin <imirkin@alum.mit.edu>
-Date: Wed, 7 Aug 2013 22:34:48 -0400
-Subject: drm: use ida to allocate connector ids
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-This makes it so that reloading a module does not cause all the
-connector ids to change, which are user-visible and sometimes used
-for configuration.
-
-Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit b21e3afe2357c0f49348a5fb61247012bf8262ec)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_crtc.c | 62 ++++++++++++++++++++++++++++++++--------------
- drivers/gpu/drm/drm_drv.c  |  2 ++
- include/drm/drm_crtc.h     |  2 ++
- 3 files changed, 48 insertions(+), 18 deletions(-)
-
-diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
-index 23be1ee46f76..57ad5cbf995d 100644
---- a/drivers/gpu/drm/drm_crtc.c
-+++ b/drivers/gpu/drm/drm_crtc.c
-@@ -186,29 +186,29 @@ static const struct drm_prop_enum_list drm_dirty_info_enum_list[] = {
- struct drm_conn_prop_enum_list {
- 	int type;
- 	const char *name;
--	int count;
-+	struct ida ida;
- };
- 
- /*
-  * Connector and encoder types.
-  */
- static struct drm_conn_prop_enum_list drm_connector_enum_list[] =
--{	{ DRM_MODE_CONNECTOR_Unknown, "Unknown", 0 },
--	{ DRM_MODE_CONNECTOR_VGA, "VGA", 0 },
--	{ DRM_MODE_CONNECTOR_DVII, "DVI-I", 0 },
--	{ DRM_MODE_CONNECTOR_DVID, "DVI-D", 0 },
--	{ DRM_MODE_CONNECTOR_DVIA, "DVI-A", 0 },
--	{ DRM_MODE_CONNECTOR_Composite, "Composite", 0 },
--	{ DRM_MODE_CONNECTOR_SVIDEO, "SVIDEO", 0 },
--	{ DRM_MODE_CONNECTOR_LVDS, "LVDS", 0 },
--	{ DRM_MODE_CONNECTOR_Component, "Component", 0 },
--	{ DRM_MODE_CONNECTOR_9PinDIN, "DIN", 0 },
--	{ DRM_MODE_CONNECTOR_DisplayPort, "DP", 0 },
--	{ DRM_MODE_CONNECTOR_HDMIA, "HDMI-A", 0 },
--	{ DRM_MODE_CONNECTOR_HDMIB, "HDMI-B", 0 },
--	{ DRM_MODE_CONNECTOR_TV, "TV", 0 },
--	{ DRM_MODE_CONNECTOR_eDP, "eDP", 0 },
--	{ DRM_MODE_CONNECTOR_VIRTUAL, "Virtual", 0},
-+{	{ DRM_MODE_CONNECTOR_Unknown, "Unknown" },
-+	{ DRM_MODE_CONNECTOR_VGA, "VGA" },
-+	{ DRM_MODE_CONNECTOR_DVII, "DVI-I" },
-+	{ DRM_MODE_CONNECTOR_DVID, "DVI-D" },
-+	{ DRM_MODE_CONNECTOR_DVIA, "DVI-A" },
-+	{ DRM_MODE_CONNECTOR_Composite, "Composite" },
-+	{ DRM_MODE_CONNECTOR_SVIDEO, "SVIDEO" },
-+	{ DRM_MODE_CONNECTOR_LVDS, "LVDS" },
-+	{ DRM_MODE_CONNECTOR_Component, "Component" },
-+	{ DRM_MODE_CONNECTOR_9PinDIN, "DIN" },
-+	{ DRM_MODE_CONNECTOR_DisplayPort, "DP" },
-+	{ DRM_MODE_CONNECTOR_HDMIA, "HDMI-A" },
-+	{ DRM_MODE_CONNECTOR_HDMIB, "HDMI-B" },
-+	{ DRM_MODE_CONNECTOR_TV, "TV" },
-+	{ DRM_MODE_CONNECTOR_eDP, "eDP" },
-+	{ DRM_MODE_CONNECTOR_VIRTUAL, "Virtual" },
- };
- 
- static const struct drm_prop_enum_list drm_encoder_enum_list[] =
-@@ -220,6 +220,22 @@ static const struct drm_prop_enum_list drm_encoder_enum_list[] =
- 	{ DRM_MODE_ENCODER_VIRTUAL, "Virtual" },
- };
- 
-+void drm_connector_ida_init(void)
-+{
-+	int i;
-+
-+	for (i = 0; i < ARRAY_SIZE(drm_connector_enum_list); i++)
-+		ida_init(&drm_connector_enum_list[i].ida);
-+}
-+
-+void drm_connector_ida_destroy(void)
-+{
-+	int i;
-+
-+	for (i = 0; i < ARRAY_SIZE(drm_connector_enum_list); i++)
-+		ida_destroy(&drm_connector_enum_list[i].ida);
-+}
-+
- const char *drm_get_encoder_name(const struct drm_encoder *encoder)
- {
- 	static char buf[32];
-@@ -718,6 +734,8 @@ int drm_connector_init(struct drm_device *dev,
- 		       int connector_type)
- {
- 	int ret;
-+	struct ida *connector_ida =
-+		&drm_connector_enum_list[connector_type].ida;
- 
- 	drm_modeset_lock_all(dev);
- 
-@@ -730,7 +748,12 @@ int drm_connector_init(struct drm_device *dev,
- 	connector->funcs = funcs;
- 	connector->connector_type = connector_type;
- 	connector->connector_type_id =
--		++drm_connector_enum_list[connector_type].count; /* TODO */
-+		ida_simple_get(connector_ida, 1, 0, GFP_KERNEL);
-+	if (connector->connector_type_id < 0) {
-+		ret = connector->connector_type_id;
-+		drm_mode_object_put(dev, &connector->base);
-+		goto out;
-+	}
- 	INIT_LIST_HEAD(&connector->probed_modes);
- 	INIT_LIST_HEAD(&connector->modes);
- 	connector->edid_blob_ptr = NULL;
-@@ -771,6 +794,9 @@ void drm_connector_cleanup(struct drm_connector *connector)
- 	list_for_each_entry_safe(mode, t, &connector->modes, head)
- 		drm_mode_remove(connector, mode);
- 
-+	ida_remove(&drm_connector_enum_list[connector->connector_type].ida,
-+		   connector->connector_type_id);
-+
- 	drm_mode_object_put(dev, &connector->base);
- 	list_del(&connector->head);
- 	dev->mode_config.num_connector--;
-diff --git a/drivers/gpu/drm/drm_drv.c b/drivers/gpu/drm/drm_drv.c
-index b1f0a0bf77cb..98b158e58538 100644
---- a/drivers/gpu/drm/drm_drv.c
-+++ b/drivers/gpu/drm/drm_drv.c
-@@ -231,6 +231,7 @@ static int __init drm_core_init(void)
- 	int ret = -ENOMEM;
- 
- 	drm_global_init();
-+	drm_connector_ida_init();
- 	idr_init(&drm_minors_idr);
- 
- 	if (register_chrdev(DRM_MAJOR, "drm", &drm_stub_fops))
-@@ -278,6 +279,7 @@ static void __exit drm_core_exit(void)
- 
- 	unregister_chrdev(DRM_MAJOR, "drm");
- 
-+	drm_connector_ida_destroy();
- 	idr_destroy(&drm_minors_idr);
- }
- 
-diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h
-index 994b910ed9ce..1dd883ed93c9 100644
---- a/include/drm/drm_crtc.h
-+++ b/include/drm/drm_crtc.h
-@@ -879,6 +879,8 @@ extern int drm_crtc_init(struct drm_device *dev,
- 			 const struct drm_crtc_funcs *funcs);
- extern void drm_crtc_cleanup(struct drm_crtc *crtc);
- 
-+extern void drm_connector_ida_init(void);
-+extern void drm_connector_ida_destroy(void);
- extern int drm_connector_init(struct drm_device *dev,
- 			      struct drm_connector *connector,
- 			      const struct drm_connector_funcs *funcs,
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0771-drm-add-MIPI-DSI-encoder-and-connector-types.patch b/patches.baytrail/0771-drm-add-MIPI-DSI-encoder-and-connector-types.patch
deleted file mode 100644
index 964fc4e6ac0f2..0000000000000
--- a/patches.baytrail/0771-drm-add-MIPI-DSI-encoder-and-connector-types.patch
+++ /dev/null
@@ -1,63 +0,0 @@
-From 09c226650fe770a7c0f2e14db823e20353b108e1 Mon Sep 17 00:00:00 2001
-From: Shobhit Kumar <shobhit.kumar@intel.com>
-Date: Tue, 27 Aug 2013 15:12:13 +0300
-Subject: drm: add MIPI DSI encoder and connector types
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com>
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Acked-by: Dave Airlie <airlied@gmail.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit b89232732f642bfa24f9e252dd241ddfb40d3817)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_crtc.c  | 2 ++
- include/uapi/drm/drm_mode.h | 2 ++
- 2 files changed, 4 insertions(+)
-
-diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
-index 57ad5cbf995d..589dd6088bb1 100644
---- a/drivers/gpu/drm/drm_crtc.c
-+++ b/drivers/gpu/drm/drm_crtc.c
-@@ -209,6 +209,7 @@ static struct drm_conn_prop_enum_list drm_connector_enum_list[] =
- 	{ DRM_MODE_CONNECTOR_TV, "TV" },
- 	{ DRM_MODE_CONNECTOR_eDP, "eDP" },
- 	{ DRM_MODE_CONNECTOR_VIRTUAL, "Virtual" },
-+	{ DRM_MODE_CONNECTOR_DSI, "DSI" },
- };
- 
- static const struct drm_prop_enum_list drm_encoder_enum_list[] =
-@@ -218,6 +219,7 @@ static const struct drm_prop_enum_list drm_encoder_enum_list[] =
- 	{ DRM_MODE_ENCODER_LVDS, "LVDS" },
- 	{ DRM_MODE_ENCODER_TVDAC, "TV" },
- 	{ DRM_MODE_ENCODER_VIRTUAL, "Virtual" },
-+	{ DRM_MODE_ENCODER_DSI, "DSI" },
- };
- 
- void drm_connector_ida_init(void)
-diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h
-index 82adefbabfa4..10b6db73d8a4 100644
---- a/include/uapi/drm/drm_mode.h
-+++ b/include/uapi/drm/drm_mode.h
-@@ -176,6 +176,7 @@ struct drm_mode_get_plane_res {
- #define DRM_MODE_ENCODER_LVDS	3
- #define DRM_MODE_ENCODER_TVDAC	4
- #define DRM_MODE_ENCODER_VIRTUAL 5
-+#define DRM_MODE_ENCODER_DSI	6
- 
- struct drm_mode_get_encoder {
- 	__u32 encoder_id;
-@@ -214,6 +215,7 @@ struct drm_mode_get_encoder {
- #define DRM_MODE_CONNECTOR_TV		13
- #define DRM_MODE_CONNECTOR_eDP		14
- #define DRM_MODE_CONNECTOR_VIRTUAL      15
-+#define DRM_MODE_CONNECTOR_DSI		16
- 
- struct drm_mode_get_connector {
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0772-drm-i915-add-MIPI-DSI-register-definitions.patch b/patches.baytrail/0772-drm-i915-add-MIPI-DSI-register-definitions.patch
deleted file mode 100644
index 466ca90b22468..0000000000000
--- a/patches.baytrail/0772-drm-i915-add-MIPI-DSI-register-definitions.patch
+++ /dev/null
@@ -1,438 +0,0 @@
-From 4cde04db3bc33f57d4eafe446b74652479aa92c1 Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Tue, 27 Aug 2013 15:12:16 +0300
-Subject: drm/i915: add MIPI DSI register definitions
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Add definitions for VLV MIPI DSI registers.
-
-v2: Small fixes per Ville's review comments.
-
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 3230bf14c14e04d49525d172db53a55e153447a7)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_reg.h |  410 ++++++++++++++++++++++++++++++++++++++++
- 1 file changed, 410 insertions(+)
-
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -5125,4 +5125,414 @@
- #define PIPE_CSC_POSTOFF_ME(pipe) _PIPE(pipe, _PIPE_A_CSC_POSTOFF_ME, _PIPE_B_CSC_POSTOFF_ME)
- #define PIPE_CSC_POSTOFF_LO(pipe) _PIPE(pipe, _PIPE_A_CSC_POSTOFF_LO, _PIPE_B_CSC_POSTOFF_LO)
- 
-+/* VLV MIPI registers */
-+
-+#define _MIPIA_PORT_CTRL			(VLV_DISPLAY_BASE + 0x61190)
-+#define _MIPIB_PORT_CTRL			(VLV_DISPLAY_BASE + 0x61700)
-+#define MIPI_PORT_CTRL(pipe)		_PIPE(pipe, _MIPIA_PORT_CTRL, _MIPIB_PORT_CTRL)
-+#define  DPI_ENABLE					(1 << 31) /* A + B */
-+#define  MIPIA_MIPI4DPHY_DELAY_COUNT_SHIFT		27
-+#define  MIPIA_MIPI4DPHY_DELAY_COUNT_MASK		(0xf << 27)
-+#define  DUAL_LINK_MODE_MASK				(1 << 26)
-+#define  DUAL_LINK_MODE_FRONT_BACK			(0 << 26)
-+#define  DUAL_LINK_MODE_PIXEL_ALTERNATIVE		(1 << 26)
-+#define  DITHERING_ENABLE				(1 << 25) /* A + B */
-+#define  FLOPPED_HSTX					(1 << 23)
-+#define  DE_INVERT					(1 << 19) /* XXX */
-+#define  MIPIA_FLISDSI_DELAY_COUNT_SHIFT		18
-+#define  MIPIA_FLISDSI_DELAY_COUNT_MASK			(0xf << 18)
-+#define  AFE_LATCHOUT					(1 << 17)
-+#define  LP_OUTPUT_HOLD					(1 << 16)
-+#define  MIPIB_FLISDSI_DELAY_COUNT_HIGH_SHIFT		15
-+#define  MIPIB_FLISDSI_DELAY_COUNT_HIGH_MASK		(1 << 15)
-+#define  MIPIB_MIPI4DPHY_DELAY_COUNT_SHIFT		11
-+#define  MIPIB_MIPI4DPHY_DELAY_COUNT_MASK		(0xf << 11)
-+#define  CSB_SHIFT					9
-+#define  CSB_MASK					(3 << 9)
-+#define  CSB_20MHZ					(0 << 9)
-+#define  CSB_10MHZ					(1 << 9)
-+#define  CSB_40MHZ					(2 << 9)
-+#define  BANDGAP_MASK					(1 << 8)
-+#define  BANDGAP_PNW_CIRCUIT				(0 << 8)
-+#define  BANDGAP_LNC_CIRCUIT				(1 << 8)
-+#define  MIPIB_FLISDSI_DELAY_COUNT_LOW_SHIFT		5
-+#define  MIPIB_FLISDSI_DELAY_COUNT_LOW_MASK		(7 << 5)
-+#define  TEARING_EFFECT_DELAY				(1 << 4) /* A + B */
-+#define  TEARING_EFFECT_SHIFT				2 /* A + B */
-+#define  TEARING_EFFECT_MASK				(3 << 2)
-+#define  TEARING_EFFECT_OFF				(0 << 2)
-+#define  TEARING_EFFECT_DSI				(1 << 2)
-+#define  TEARING_EFFECT_GPIO				(2 << 2)
-+#define  LANE_CONFIGURATION_SHIFT			0
-+#define  LANE_CONFIGURATION_MASK			(3 << 0)
-+#define  LANE_CONFIGURATION_4LANE			(0 << 0)
-+#define  LANE_CONFIGURATION_DUAL_LINK_A			(1 << 0)
-+#define  LANE_CONFIGURATION_DUAL_LINK_B			(2 << 0)
-+
-+#define _MIPIA_TEARING_CTRL			(VLV_DISPLAY_BASE + 0x61194)
-+#define _MIPIB_TEARING_CTRL			(VLV_DISPLAY_BASE + 0x61704)
-+#define MIPI_TEARING_CTRL(pipe)		_PIPE(pipe, _MIPIA_TEARING_CTRL, _MIPIB_TEARING_CTRL)
-+#define  TEARING_EFFECT_DELAY_SHIFT			0
-+#define  TEARING_EFFECT_DELAY_MASK			(0xffff << 0)
-+
-+/* XXX: all bits reserved */
-+#define _MIPIA_AUTOPWG				(VLV_DISPLAY_BASE + 0x611a0)
-+
-+/* MIPI DSI Controller and D-PHY registers */
-+
-+#define _MIPIA_DEVICE_READY			(VLV_DISPLAY_BASE + 0xb000)
-+#define _MIPIB_DEVICE_READY			(VLV_DISPLAY_BASE + 0xb800)
-+#define MIPI_DEVICE_READY(pipe)		_PIPE(pipe, _MIPIA_DEVICE_READY, _MIPIB_DEVICE_READY)
-+#define  BUS_POSSESSION					(1 << 3) /* set to give bus to receiver */
-+#define  ULPS_STATE_MASK				(3 << 1)
-+#define  ULPS_STATE_ENTER				(2 << 1)
-+#define  ULPS_STATE_EXIT				(1 << 1)
-+#define  ULPS_STATE_NORMAL_OPERATION			(0 << 1)
-+#define  DEVICE_READY					(1 << 0)
-+
-+#define _MIPIA_INTR_STAT			(VLV_DISPLAY_BASE + 0xb004)
-+#define _MIPIB_INTR_STAT			(VLV_DISPLAY_BASE + 0xb804)
-+#define MIPI_INTR_STAT(pipe)		_PIPE(pipe, _MIPIA_INTR_STAT, _MIPIB_INTR_STAT)
-+#define _MIPIA_INTR_EN				(VLV_DISPLAY_BASE + 0xb008)
-+#define _MIPIB_INTR_EN				(VLV_DISPLAY_BASE + 0xb808)
-+#define MIPI_INTR_EN(pipe)		_PIPE(pipe, _MIPIA_INTR_EN, _MIPIB_INTR_EN)
-+#define  TEARING_EFFECT					(1 << 31)
-+#define  SPL_PKT_SENT_INTERRUPT				(1 << 30)
-+#define  GEN_READ_DATA_AVAIL				(1 << 29)
-+#define  LP_GENERIC_WR_FIFO_FULL			(1 << 28)
-+#define  HS_GENERIC_WR_FIFO_FULL			(1 << 27)
-+#define  RX_PROT_VIOLATION				(1 << 26)
-+#define  RX_INVALID_TX_LENGTH				(1 << 25)
-+#define  ACK_WITH_NO_ERROR				(1 << 24)
-+#define  TURN_AROUND_ACK_TIMEOUT			(1 << 23)
-+#define  LP_RX_TIMEOUT					(1 << 22)
-+#define  HS_TX_TIMEOUT					(1 << 21)
-+#define  DPI_FIFO_UNDERRUN				(1 << 20)
-+#define  LOW_CONTENTION					(1 << 19)
-+#define  HIGH_CONTENTION				(1 << 18)
-+#define  TXDSI_VC_ID_INVALID				(1 << 17)
-+#define  TXDSI_DATA_TYPE_NOT_RECOGNISED			(1 << 16)
-+#define  TXCHECKSUM_ERROR				(1 << 15)
-+#define  TXECC_MULTIBIT_ERROR				(1 << 14)
-+#define  TXECC_SINGLE_BIT_ERROR				(1 << 13)
-+#define  TXFALSE_CONTROL_ERROR				(1 << 12)
-+#define  RXDSI_VC_ID_INVALID				(1 << 11)
-+#define  RXDSI_DATA_TYPE_NOT_REGOGNISED			(1 << 10)
-+#define  RXCHECKSUM_ERROR				(1 << 9)
-+#define  RXECC_MULTIBIT_ERROR				(1 << 8)
-+#define  RXECC_SINGLE_BIT_ERROR				(1 << 7)
-+#define  RXFALSE_CONTROL_ERROR				(1 << 6)
-+#define  RXHS_RECEIVE_TIMEOUT_ERROR			(1 << 5)
-+#define  RX_LP_TX_SYNC_ERROR				(1 << 4)
-+#define  RXEXCAPE_MODE_ENTRY_ERROR			(1 << 3)
-+#define  RXEOT_SYNC_ERROR				(1 << 2)
-+#define  RXSOT_SYNC_ERROR				(1 << 1)
-+#define  RXSOT_ERROR					(1 << 0)
-+
-+#define _MIPIA_DSI_FUNC_PRG			(VLV_DISPLAY_BASE + 0xb00c)
-+#define _MIPIB_DSI_FUNC_PRG			(VLV_DISPLAY_BASE + 0xb80c)
-+#define MIPI_DSI_FUNC_PRG(pipe)		_PIPE(pipe, _MIPIA_DSI_FUNC_PRG, _MIPIB_DSI_FUNC_PRG)
-+#define  CMD_MODE_DATA_WIDTH_MASK			(7 << 13)
-+#define  CMD_MODE_NOT_SUPPORTED				(0 << 13)
-+#define  CMD_MODE_DATA_WIDTH_16_BIT			(1 << 13)
-+#define  CMD_MODE_DATA_WIDTH_9_BIT			(2 << 13)
-+#define  CMD_MODE_DATA_WIDTH_8_BIT			(3 << 13)
-+#define  CMD_MODE_DATA_WIDTH_OPTION1			(4 << 13)
-+#define  CMD_MODE_DATA_WIDTH_OPTION2			(5 << 13)
-+#define  VID_MODE_FORMAT_MASK				(0xf << 7)
-+#define  VID_MODE_NOT_SUPPORTED				(0 << 7)
-+#define  VID_MODE_FORMAT_RGB565				(1 << 7)
-+#define  VID_MODE_FORMAT_RGB666				(2 << 7)
-+#define  VID_MODE_FORMAT_RGB666_LOOSE			(3 << 7)
-+#define  VID_MODE_FORMAT_RGB888				(4 << 7)
-+#define  CMD_MODE_CHANNEL_NUMBER_SHIFT			5
-+#define  CMD_MODE_CHANNEL_NUMBER_MASK			(3 << 5)
-+#define  VID_MODE_CHANNEL_NUMBER_SHIFT			3
-+#define  VID_MODE_CHANNEL_NUMBER_MASK			(3 << 3)
-+#define  DATA_LANES_PRG_REG_SHIFT			0
-+#define  DATA_LANES_PRG_REG_MASK			(7 << 0)
-+
-+#define _MIPIA_HS_TX_TIMEOUT			(VLV_DISPLAY_BASE + 0xb010)
-+#define _MIPIB_HS_TX_TIMEOUT			(VLV_DISPLAY_BASE + 0xb810)
-+#define MIPI_HS_TX_TIMEOUT(pipe)	_PIPE(pipe, _MIPIA_HS_TX_TIMEOUT, _MIPIB_HS_TX_TIMEOUT)
-+#define  HIGH_SPEED_TX_TIMEOUT_COUNTER_MASK		0xffffff
-+
-+#define _MIPIA_LP_RX_TIMEOUT			(VLV_DISPLAY_BASE + 0xb014)
-+#define _MIPIB_LP_RX_TIMEOUT			(VLV_DISPLAY_BASE + 0xb814)
-+#define MIPI_LP_RX_TIMEOUT(pipe)	_PIPE(pipe, _MIPIA_LP_RX_TIMEOUT, _MIPIB_LP_RX_TIMEOUT)
-+#define  LOW_POWER_RX_TIMEOUT_COUNTER_MASK		0xffffff
-+
-+#define _MIPIA_TURN_AROUND_TIMEOUT		(VLV_DISPLAY_BASE + 0xb018)
-+#define _MIPIB_TURN_AROUND_TIMEOUT		(VLV_DISPLAY_BASE + 0xb818)
-+#define MIPI_TURN_AROUND_TIMEOUT(pipe)	_PIPE(pipe, _MIPIA_TURN_AROUND_TIMEOUT, _MIPIB_TURN_AROUND_TIMEOUT)
-+#define  TURN_AROUND_TIMEOUT_MASK			0x3f
-+
-+#define _MIPIA_DEVICE_RESET_TIMER		(VLV_DISPLAY_BASE + 0xb01c)
-+#define _MIPIB_DEVICE_RESET_TIMER		(VLV_DISPLAY_BASE + 0xb81c)
-+#define MIPI_DEVICE_RESET_TIMER(pipe)	_PIPE(pipe, _MIPIA_DEVICE_RESET_TIMER, _MIPIB_DEVICE_RESET_TIMER)
-+#define  DEVICE_RESET_TIMER_MASK			0xffff
-+
-+#define _MIPIA_DPI_RESOLUTION			(VLV_DISPLAY_BASE + 0xb020)
-+#define _MIPIB_DPI_RESOLUTION			(VLV_DISPLAY_BASE + 0xb820)
-+#define MIPI_DPI_RESOLUTION(pipe)	_PIPE(pipe, _MIPIA_DPI_RESOLUTION, _MIPIB_DPI_RESOLUTION)
-+#define  VERTICAL_ADDRESS_SHIFT				16
-+#define  VERTICAL_ADDRESS_MASK				(0xffff << 16)
-+#define  HORIZONTAL_ADDRESS_SHIFT			0
-+#define  HORIZONTAL_ADDRESS_MASK			0xffff
-+
-+#define _MIPIA_DBI_FIFO_THROTTLE		(VLV_DISPLAY_BASE + 0xb024)
-+#define _MIPIB_DBI_FIFO_THROTTLE		(VLV_DISPLAY_BASE + 0xb824)
-+#define MIPI_DBI_FIFO_THROTTLE(pipe)	_PIPE(pipe, _MIPIA_DBI_FIFO_THROTTLE, _MIPIB_DBI_FIFO_THROTTLE)
-+#define  DBI_FIFO_EMPTY_HALF				(0 << 0)
-+#define  DBI_FIFO_EMPTY_QUARTER				(1 << 0)
-+#define  DBI_FIFO_EMPTY_7_LOCATIONS			(2 << 0)
-+
-+/* regs below are bits 15:0 */
-+#define _MIPIA_HSYNC_PADDING_COUNT		(VLV_DISPLAY_BASE + 0xb028)
-+#define _MIPIB_HSYNC_PADDING_COUNT		(VLV_DISPLAY_BASE + 0xb828)
-+#define MIPI_HSYNC_PADDING_COUNT(pipe)	_PIPE(pipe, _MIPIA_HSYNC_PADDING_COUNT, _MIPIB_HSYNC_PADDING_COUNT)
-+
-+#define _MIPIA_HBP_COUNT			(VLV_DISPLAY_BASE + 0xb02c)
-+#define _MIPIB_HBP_COUNT			(VLV_DISPLAY_BASE + 0xb82c)
-+#define MIPI_HBP_COUNT(pipe)		_PIPE(pipe, _MIPIA_HBP_COUNT, _MIPIB_HBP_COUNT)
-+
-+#define _MIPIA_HFP_COUNT			(VLV_DISPLAY_BASE + 0xb030)
-+#define _MIPIB_HFP_COUNT			(VLV_DISPLAY_BASE + 0xb830)
-+#define MIPI_HFP_COUNT(pipe)		_PIPE(pipe, _MIPIA_HFP_COUNT, _MIPIB_HFP_COUNT)
-+
-+#define _MIPIA_HACTIVE_AREA_COUNT		(VLV_DISPLAY_BASE + 0xb034)
-+#define _MIPIB_HACTIVE_AREA_COUNT		(VLV_DISPLAY_BASE + 0xb834)
-+#define MIPI_HACTIVE_AREA_COUNT(pipe)	_PIPE(pipe, _MIPIA_HACTIVE_AREA_COUNT, _MIPIB_HACTIVE_AREA_COUNT)
-+
-+#define _MIPIA_VSYNC_PADDING_COUNT		(VLV_DISPLAY_BASE + 0xb038)
-+#define _MIPIB_VSYNC_PADDING_COUNT		(VLV_DISPLAY_BASE + 0xb838)
-+#define MIPI_VSYNC_PADDING_COUNT(pipe)	_PIPE(pipe, _MIPIA_VSYNC_PADDING_COUNT, _MIPIB_VSYNC_PADDING_COUNT)
-+
-+#define _MIPIA_VBP_COUNT			(VLV_DISPLAY_BASE + 0xb03c)
-+#define _MIPIB_VBP_COUNT			(VLV_DISPLAY_BASE + 0xb83c)
-+#define MIPI_VBP_COUNT(pipe)		_PIPE(pipe, _MIPIA_VBP_COUNT, _MIPIB_VBP_COUNT)
-+
-+#define _MIPIA_VFP_COUNT			(VLV_DISPLAY_BASE + 0xb040)
-+#define _MIPIB_VFP_COUNT			(VLV_DISPLAY_BASE + 0xb840)
-+#define MIPI_VFP_COUNT(pipe)		_PIPE(pipe, _MIPIA_VFP_COUNT, _MIPIB_VFP_COUNT)
-+
-+#define _MIPIA_HIGH_LOW_SWITCH_COUNT		(VLV_DISPLAY_BASE + 0xb044)
-+#define _MIPIB_HIGH_LOW_SWITCH_COUNT		(VLV_DISPLAY_BASE + 0xb844)
-+#define MIPI_HIGH_LOW_SWITCH_COUNT(pipe)	_PIPE(pipe, _MIPIA_HIGH_LOW_SWITCH_COUNT, _MIPIB_HIGH_LOW_SWITCH_COUNT)
-+/* regs above are bits 15:0 */
-+
-+#define _MIPIA_DPI_CONTROL			(VLV_DISPLAY_BASE + 0xb048)
-+#define _MIPIB_DPI_CONTROL			(VLV_DISPLAY_BASE + 0xb848)
-+#define MIPI_DPI_CONTROL(pipe)		_PIPE(pipe, _MIPIA_DPI_CONTROL, _MIPIB_DPI_CONTROL)
-+#define  DPI_LP_MODE					(1 << 6)
-+#define  BACKLIGHT_OFF					(1 << 5)
-+#define  BACKLIGHT_ON					(1 << 4)
-+#define  COLOR_MODE_OFF					(1 << 3)
-+#define  COLOR_MODE_ON					(1 << 2)
-+#define  TURN_ON					(1 << 1)
-+#define  SHUTDOWN					(1 << 0)
-+
-+#define _MIPIA_DPI_DATA				(VLV_DISPLAY_BASE + 0xb04c)
-+#define _MIPIB_DPI_DATA				(VLV_DISPLAY_BASE + 0xb84c)
-+#define MIPI_DPI_DATA(pipe)		_PIPE(pipe, _MIPIA_DPI_DATA, _MIPIB_DPI_DATA)
-+#define  COMMAND_BYTE_SHIFT				0
-+#define  COMMAND_BYTE_MASK				(0x3f << 0)
-+
-+#define _MIPIA_INIT_COUNT			(VLV_DISPLAY_BASE + 0xb050)
-+#define _MIPIB_INIT_COUNT			(VLV_DISPLAY_BASE + 0xb850)
-+#define MIPI_INIT_COUNT(pipe)		_PIPE(pipe, _MIPIA_INIT_COUNT, _MIPIB_INIT_COUNT)
-+#define  MASTER_INIT_TIMER_SHIFT			0
-+#define  MASTER_INIT_TIMER_MASK				(0xffff << 0)
-+
-+#define _MIPIA_MAX_RETURN_PKT_SIZE		(VLV_DISPLAY_BASE + 0xb054)
-+#define _MIPIB_MAX_RETURN_PKT_SIZE		(VLV_DISPLAY_BASE + 0xb854)
-+#define MIPI_MAX_RETURN_PKT_SIZE(pipe)	_PIPE(pipe, _MIPIA_MAX_RETURN_PKT_SIZE, _MIPIB_MAX_RETURN_PKT_SIZE)
-+#define  MAX_RETURN_PKT_SIZE_SHIFT			0
-+#define  MAX_RETURN_PKT_SIZE_MASK			(0x3ff << 0)
-+
-+#define _MIPIA_VIDEO_MODE_FORMAT		(VLV_DISPLAY_BASE + 0xb058)
-+#define _MIPIB_VIDEO_MODE_FORMAT		(VLV_DISPLAY_BASE + 0xb858)
-+#define MIPI_VIDEO_MODE_FORMAT(pipe)	_PIPE(pipe, _MIPIA_VIDEO_MODE_FORMAT, _MIPIB_VIDEO_MODE_FORMAT)
-+#define  RANDOM_DPI_DISPLAY_RESOLUTION			(1 << 4)
-+#define  DISABLE_VIDEO_BTA				(1 << 3)
-+#define  IP_TG_CONFIG					(1 << 2)
-+#define  VIDEO_MODE_NON_BURST_WITH_SYNC_PULSE		(1 << 0)
-+#define  VIDEO_MODE_NON_BURST_WITH_SYNC_EVENTS		(2 << 0)
-+#define  VIDEO_MODE_BURST				(3 << 0)
-+
-+#define _MIPIA_EOT_DISABLE			(VLV_DISPLAY_BASE + 0xb05c)
-+#define _MIPIB_EOT_DISABLE			(VLV_DISPLAY_BASE + 0xb85c)
-+#define MIPI_EOT_DISABLE(pipe)		_PIPE(pipe, _MIPIA_EOT_DISABLE, _MIPIB_EOT_DISABLE)
-+#define  LP_RX_TIMEOUT_ERROR_RECOVERY_DISABLE		(1 << 7)
-+#define  HS_RX_TIMEOUT_ERROR_RECOVERY_DISABLE		(1 << 6)
-+#define  LOW_CONTENTION_RECOVERY_DISABLE		(1 << 5)
-+#define  HIGH_CONTENTION_RECOVERY_DISABLE		(1 << 4)
-+#define  TXDSI_TYPE_NOT_RECOGNISED_ERROR_RECOVERY_DISABLE (1 << 3)
-+#define  TXECC_MULTIBIT_ERROR_RECOVERY_DISABLE		(1 << 2)
-+#define  CLOCKSTOP					(1 << 1)
-+#define  EOT_DISABLE					(1 << 0)
-+
-+#define _MIPIA_LP_BYTECLK			(VLV_DISPLAY_BASE + 0xb060)
-+#define _MIPIB_LP_BYTECLK			(VLV_DISPLAY_BASE + 0xb860)
-+#define MIPI_LP_BYTECLK(pipe)		_PIPE(pipe, _MIPIA_LP_BYTECLK, _MIPIB_LP_BYTECLK)
-+#define  LP_BYTECLK_SHIFT				0
-+#define  LP_BYTECLK_MASK				(0xffff << 0)
-+
-+/* bits 31:0 */
-+#define _MIPIA_LP_GEN_DATA			(VLV_DISPLAY_BASE + 0xb064)
-+#define _MIPIB_LP_GEN_DATA			(VLV_DISPLAY_BASE + 0xb864)
-+#define MIPI_LP_GEN_DATA(pipe)		_PIPE(pipe, _MIPIA_LP_GEN_DATA, _MIPIB_LP_GEN_DATA)
-+
-+/* bits 31:0 */
-+#define _MIPIA_HS_GEN_DATA			(VLV_DISPLAY_BASE + 0xb068)
-+#define _MIPIB_HS_GEN_DATA			(VLV_DISPLAY_BASE + 0xb868)
-+#define MIPI_HS_GEN_DATA(pipe)		_PIPE(pipe, _MIPIA_HS_GEN_DATA, _MIPIB_HS_GEN_DATA)
-+
-+#define _MIPIA_LP_GEN_CTRL			(VLV_DISPLAY_BASE + 0xb06c)
-+#define _MIPIB_LP_GEN_CTRL			(VLV_DISPLAY_BASE + 0xb86c)
-+#define MIPI_LP_GEN_CTRL(pipe)		_PIPE(pipe, _MIPIA_LP_GEN_CTRL, _MIPIB_LP_GEN_CTRL)
-+#define _MIPIA_HS_GEN_CTRL			(VLV_DISPLAY_BASE + 0xb070)
-+#define _MIPIB_HS_GEN_CTRL			(VLV_DISPLAY_BASE + 0xb870)
-+#define MIPI_HS_GEN_CTRL(pipe)		_PIPE(pipe, _MIPIA_HS_GEN_CTRL, _MIPIB_HS_GEN_CTRL)
-+#define  LONG_PACKET_WORD_COUNT_SHIFT			8
-+#define  LONG_PACKET_WORD_COUNT_MASK			(0xffff << 8)
-+#define  SHORT_PACKET_PARAM_SHIFT			8
-+#define  SHORT_PACKET_PARAM_MASK			(0xffff << 8)
-+#define  VIRTUAL_CHANNEL_SHIFT				6
-+#define  VIRTUAL_CHANNEL_MASK				(3 << 6)
-+#define  DATA_TYPE_SHIFT				0
-+#define  DATA_TYPE_MASK					(3f << 0)
-+/* data type values, see include/video/mipi_display.h */
-+
-+#define _MIPIA_GEN_FIFO_STAT			(VLV_DISPLAY_BASE + 0xb074)
-+#define _MIPIB_GEN_FIFO_STAT			(VLV_DISPLAY_BASE + 0xb874)
-+#define MIPI_GEN_FIFO_STAT(pipe)	_PIPE(pipe, _MIPIA_GEN_FIFO_STAT, _MIPIB_GEN_FIFO_STAT)
-+#define  DPI_FIFO_EMPTY					(1 << 28)
-+#define  DBI_FIFO_EMPTY					(1 << 27)
-+#define  LP_CTRL_FIFO_EMPTY				(1 << 26)
-+#define  LP_CTRL_FIFO_HALF_EMPTY			(1 << 25)
-+#define  LP_CTRL_FIFO_FULL				(1 << 24)
-+#define  HS_CTRL_FIFO_EMPTY				(1 << 18)
-+#define  HS_CTRL_FIFO_HALF_EMPTY			(1 << 17)
-+#define  HS_CTRL_FIFO_FULL				(1 << 16)
-+#define  LP_DATA_FIFO_EMPTY				(1 << 10)
-+#define  LP_DATA_FIFO_HALF_EMPTY			(1 << 9)
-+#define  LP_DATA_FIFO_FULL				(1 << 8)
-+#define  HS_DATA_FIFO_EMPTY				(1 << 2)
-+#define  HS_DATA_FIFO_HALF_EMPTY			(1 << 1)
-+#define  HS_DATA_FIFO_FULL				(1 << 0)
-+
-+#define _MIPIA_HS_LS_DBI_ENABLE			(VLV_DISPLAY_BASE + 0xb078)
-+#define _MIPIB_HS_LS_DBI_ENABLE			(VLV_DISPLAY_BASE + 0xb878)
-+#define MIPI_HS_LP_DBI_ENABLE(pipe)	_PIPE(pipe, _MIPIA_HS_LS_DBI_ENABLE, _MIPIB_HS_LS_DBI_ENABLE)
-+#define  DBI_HS_LP_MODE_MASK				(1 << 0)
-+#define  DBI_LP_MODE					(1 << 0)
-+#define  DBI_HS_MODE					(0 << 0)
-+
-+#define _MIPIA_DPHY_PARAM			(VLV_DISPLAY_BASE + 0xb080)
-+#define _MIPIB_DPHY_PARAM			(VLV_DISPLAY_BASE + 0xb880)
-+#define MIPI_DPHY_PARAM(pipe)		_PIPE(pipe, _MIPIA_DPHY_PARAM, _MIPIB_DPHY_PARAM)
-+#define  EXIT_ZERO_COUNT_SHIFT				24
-+#define  EXIT_ZERO_COUNT_MASK				(0x3f << 24)
-+#define  TRAIL_COUNT_SHIFT				16
-+#define  TRAIL_COUNT_MASK				(0x1f << 16)
-+#define  CLK_ZERO_COUNT_SHIFT				8
-+#define  CLK_ZERO_COUNT_MASK				(0xff << 8)
-+#define  PREPARE_COUNT_SHIFT				0
-+#define  PREPARE_COUNT_MASK				(0x3f << 0)
-+
-+/* bits 31:0 */
-+#define _MIPIA_DBI_BW_CTRL			(VLV_DISPLAY_BASE + 0xb084)
-+#define _MIPIB_DBI_BW_CTRL			(VLV_DISPLAY_BASE + 0xb884)
-+#define MIPI_DBI_BW_CTRL(pipe)		_PIPE(pipe, _MIPIA_DBI_BW_CTRL, _MIPIB_DBI_BW_CTRL)
-+
-+#define _MIPIA_CLK_LANE_SWITCH_TIME_CNT		(VLV_DISPLAY_BASE + 0xb088)
-+#define _MIPIB_CLK_LANE_SWITCH_TIME_CNT		(VLV_DISPLAY_BASE + 0xb888)
-+#define MIPI_CLK_LANE_SWITCH_TIME_CNT(pipe)	_PIPE(pipe, _MIPIA_CLK_LANE_SWITCH_TIME_CNT, _MIPIB_CLK_LANE_SWITCH_TIME_CNT)
-+#define  LP_HS_SSW_CNT_SHIFT				16
-+#define  LP_HS_SSW_CNT_MASK				(0xffff << 16)
-+#define  HS_LP_PWR_SW_CNT_SHIFT				0
-+#define  HS_LP_PWR_SW_CNT_MASK				(0xffff << 0)
-+
-+#define _MIPIA_STOP_STATE_STALL			(VLV_DISPLAY_BASE + 0xb08c)
-+#define _MIPIB_STOP_STATE_STALL			(VLV_DISPLAY_BASE + 0xb88c)
-+#define MIPI_STOP_STATE_STALL(pipe)	_PIPE(pipe, _MIPIA_STOP_STATE_STALL, _MIPIB_STOP_STATE_STALL)
-+#define  STOP_STATE_STALL_COUNTER_SHIFT			0
-+#define  STOP_STATE_STALL_COUNTER_MASK			(0xff << 0)
-+
-+#define _MIPIA_INTR_STAT_REG_1			(VLV_DISPLAY_BASE + 0xb090)
-+#define _MIPIB_INTR_STAT_REG_1			(VLV_DISPLAY_BASE + 0xb890)
-+#define MIPI_INTR_STAT_REG_1(pipe)	_PIPE(pipe, _MIPIA_INTR_STAT_REG_1, _MIPIB_INTR_STAT_REG_1)
-+#define _MIPIA_INTR_EN_REG_1			(VLV_DISPLAY_BASE + 0xb094)
-+#define _MIPIB_INTR_EN_REG_1			(VLV_DISPLAY_BASE + 0xb894)
-+#define MIPI_INTR_EN_REG_1(pipe)	_PIPE(pipe, _MIPIA_INTR_EN_REG_1, _MIPIB_INTR_EN_REG_1)
-+#define  RX_CONTENTION_DETECTED				(1 << 0)
-+
-+/* XXX: only pipe A ?!? */
-+#define MIPIA_DBI_TYPEC_CTRL			(VLV_DISPLAY_BASE + 0xb100)
-+#define  DBI_TYPEC_ENABLE				(1 << 31)
-+#define  DBI_TYPEC_WIP					(1 << 30)
-+#define  DBI_TYPEC_OPTION_SHIFT				28
-+#define  DBI_TYPEC_OPTION_MASK				(3 << 28)
-+#define  DBI_TYPEC_FREQ_SHIFT				24
-+#define  DBI_TYPEC_FREQ_MASK				(0xf << 24)
-+#define  DBI_TYPEC_OVERRIDE				(1 << 8)
-+#define  DBI_TYPEC_OVERRIDE_COUNTER_SHIFT		0
-+#define  DBI_TYPEC_OVERRIDE_COUNTER_MASK		(0xff << 0)
-+
-+
-+/* MIPI adapter registers */
-+
-+#define _MIPIA_CTRL				(VLV_DISPLAY_BASE + 0xb104)
-+#define _MIPIB_CTRL				(VLV_DISPLAY_BASE + 0xb904)
-+#define MIPI_CTRL(pipe)			_PIPE(pipe, _MIPIA_CTRL, _MIPIB_CTRL)
-+#define  ESCAPE_CLOCK_DIVIDER_SHIFT			5 /* A only */
-+#define  ESCAPE_CLOCK_DIVIDER_MASK			(3 << 5)
-+#define  ESCAPE_CLOCK_DIVIDER_1				(0 << 5)
-+#define  ESCAPE_CLOCK_DIVIDER_2				(1 << 5)
-+#define  ESCAPE_CLOCK_DIVIDER_4				(2 << 5)
-+#define  READ_REQUEST_PRIORITY_SHIFT			3
-+#define  READ_REQUEST_PRIORITY_MASK			(3 << 3)
-+#define  READ_REQUEST_PRIORITY_LOW			(0 << 3)
-+#define  READ_REQUEST_PRIORITY_HIGH			(3 << 3)
-+#define  RGB_FLIP_TO_BGR				(1 << 2)
-+
-+#define _MIPIA_DATA_ADDRESS			(VLV_DISPLAY_BASE + 0xb108)
-+#define _MIPIB_DATA_ADDRESS			(VLV_DISPLAY_BASE + 0xb908)
-+#define MIPI_DATA_ADDRESS(pipe)		_PIPE(pipe, _MIPIA_DATA_ADDRESS, _MIPIB_DATA_ADDRESS)
-+#define  DATA_MEM_ADDRESS_SHIFT				5
-+#define  DATA_MEM_ADDRESS_MASK				(0x7ffffff << 5)
-+#define  DATA_VALID					(1 << 0)
-+
-+#define _MIPIA_DATA_LENGTH			(VLV_DISPLAY_BASE + 0xb10c)
-+#define _MIPIB_DATA_LENGTH			(VLV_DISPLAY_BASE + 0xb90c)
-+#define MIPI_DATA_LENGTH(pipe)		_PIPE(pipe, _MIPIA_DATA_LENGTH, _MIPIB_DATA_LENGTH)
-+#define  DATA_LENGTH_SHIFT				0
-+#define  DATA_LENGTH_MASK				(0xfffff << 0)
-+
-+#define _MIPIA_COMMAND_ADDRESS			(VLV_DISPLAY_BASE + 0xb110)
-+#define _MIPIB_COMMAND_ADDRESS			(VLV_DISPLAY_BASE + 0xb910)
-+#define MIPI_COMMAND_ADDRESS(pipe)	_PIPE(pipe, _MIPIA_COMMAND_ADDRESS, _MIPIB_COMMAND_ADDRESS)
-+#define  COMMAND_MEM_ADDRESS_SHIFT			5
-+#define  COMMAND_MEM_ADDRESS_MASK			(0x7ffffff << 5)
-+#define  AUTO_PWG_ENABLE				(1 << 2)
-+#define  MEMORY_WRITE_DATA_FROM_PIPE_RENDERING		(1 << 1)
-+#define  COMMAND_VALID					(1 << 0)
-+
-+#define _MIPIA_COMMAND_LENGTH			(VLV_DISPLAY_BASE + 0xb114)
-+#define _MIPIB_COMMAND_LENGTH			(VLV_DISPLAY_BASE + 0xb914)
-+#define MIPI_COMMAND_LENGTH(pipe)	_PIPE(pipe, _MIPIA_COMMAND_LENGTH, _MIPIB_COMMAND_LENGTH)
-+#define  COMMAND_LENGTH_SHIFT(n)			(8 * (n)) /* n: 0...3 */
-+#define  COMMAND_LENGTH_MASK(n)				(0xff << (8 * (n)))
-+
-+#define _MIPIA_READ_DATA_RETURN0		(VLV_DISPLAY_BASE + 0xb118)
-+#define _MIPIB_READ_DATA_RETURN0		(VLV_DISPLAY_BASE + 0xb918)
-+#define MIPI_READ_DATA_RETURN(pipe, n) \
-+	(_PIPE(pipe, _MIPIA_READ_DATA_RETURN0, _MIPIB_READ_DATA_RETURN0) + 4 * (n)) /* n: 0...7 */
-+
-+#define _MIPIA_READ_DATA_VALID			(VLV_DISPLAY_BASE + 0xb138)
-+#define _MIPIB_READ_DATA_VALID			(VLV_DISPLAY_BASE + 0xb938)
-+#define MIPI_READ_DATA_VALID(pipe)	_PIPE(pipe, _MIPIA_READ_DATA_VALID, _MIPIB_READ_DATA_VALID)
-+#define  READ_DATA_VALID(n)				(1 << (n))
-+
- #endif /* _I915_REG_H_ */
diff --git a/patches.baytrail/0773-drm-i915-add-MIPI-DSI-output-type-and-subtypes.patch b/patches.baytrail/0773-drm-i915-add-MIPI-DSI-output-type-and-subtypes.patch
deleted file mode 100644
index 26cbbd6200bc4..0000000000000
--- a/patches.baytrail/0773-drm-i915-add-MIPI-DSI-output-type-and-subtypes.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From 9db1dea327d92cc10800298439a4fef007e587ec Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Tue, 27 Aug 2013 15:12:17 +0300
-Subject: drm/i915: add MIPI DSI output type and subtypes
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 72ffa333418426b46648ac84ad4f015963b025e1)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_drv.h | 6 +++++-
- 1 file changed, 5 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index dbfe5f7bb3de..8e0d54d895be 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -93,13 +93,17 @@
- #define INTEL_OUTPUT_HDMI 6
- #define INTEL_OUTPUT_DISPLAYPORT 7
- #define INTEL_OUTPUT_EDP 8
--#define INTEL_OUTPUT_UNKNOWN 9
-+#define INTEL_OUTPUT_DSI 9
-+#define INTEL_OUTPUT_UNKNOWN 10
- 
- #define INTEL_DVO_CHIP_NONE 0
- #define INTEL_DVO_CHIP_LVDS 1
- #define INTEL_DVO_CHIP_TMDS 2
- #define INTEL_DVO_CHIP_TVOUT 4
- 
-+#define INTEL_DSI_COMMAND_MODE	0
-+#define INTEL_DSI_VIDEO_MODE	1
-+
- struct intel_framebuffer {
- 	struct drm_framebuffer base;
- 	struct drm_i915_gem_object *obj;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0774-drm-i915-add-structs-for-MIPI-DSI-output.patch b/patches.baytrail/0774-drm-i915-add-structs-for-MIPI-DSI-output.patch
deleted file mode 100644
index a6bbc6c699a12..0000000000000
--- a/patches.baytrail/0774-drm-i915-add-structs-for-MIPI-DSI-output.patch
+++ /dev/null
@@ -1,130 +0,0 @@
-From 99efbb3e01856ef6d1cd2e1b072958e9d7d1fd76 Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Tue, 27 Aug 2013 15:12:18 +0300
-Subject: drm/i915: add structs for MIPI DSI output
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The sub-encoder model is copied from DVO.
-
-v2: Add attached_connector to struct intel_dsi.
-
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit f5e11b06eb8a5aa6d4918aca85f88268e131a88e)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_dsi.h | 99 ++++++++++++++++++++++++++++++++++++++++
- 1 file changed, 99 insertions(+)
- create mode 100644 drivers/gpu/drm/i915/intel_dsi.h
-
-diff --git a/drivers/gpu/drm/i915/intel_dsi.h b/drivers/gpu/drm/i915/intel_dsi.h
-new file mode 100644
-index 000000000000..f308269cd87c
---- /dev/null
-+++ b/drivers/gpu/drm/i915/intel_dsi.h
-@@ -0,0 +1,99 @@
-+/*
-+ * Copyright © 2013 Intel Corporation
-+ *
-+ * Permission is hereby granted, free of charge, to any person obtaining a
-+ * copy of this software and associated documentation files (the "Software"),
-+ * to deal in the Software without restriction, including without limitation
-+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
-+ * and/or sell copies of the Software, and to permit persons to whom the
-+ * Software is furnished to do so, subject to the following conditions:
-+ *
-+ * The above copyright notice and this permission notice (including the next
-+ * paragraph) shall be included in all copies or substantial portions of the
-+ * Software.
-+ *
-+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
-+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
-+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
-+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
-+ * DEALINGS IN THE SOFTWARE.
-+ */
-+
-+#ifndef _INTEL_DSI_H
-+#define _INTEL_DSI_H
-+
-+#include <drm/drmP.h>
-+#include <drm/drm_crtc.h>
-+#include "intel_drv.h"
-+
-+struct intel_dsi_device {
-+	unsigned int panel_id;
-+	const char *name;
-+	int type;
-+	const struct intel_dsi_dev_ops *dev_ops;
-+	void *dev_priv;
-+};
-+
-+struct intel_dsi_dev_ops {
-+	bool (*init)(struct intel_dsi_device *dsi);
-+
-+	/* This callback must be able to assume DSI commands can be sent */
-+	void (*enable)(struct intel_dsi_device *dsi);
-+
-+	/* This callback must be able to assume DSI commands can be sent */
-+	void (*disable)(struct intel_dsi_device *dsi);
-+
-+	int (*mode_valid)(struct intel_dsi_device *dsi,
-+			  struct drm_display_mode *mode);
-+
-+	bool (*mode_fixup)(struct intel_dsi_device *dsi,
-+			   const struct drm_display_mode *mode,
-+			   struct drm_display_mode *adjusted_mode);
-+
-+	void (*mode_set)(struct intel_dsi_device *dsi,
-+			 struct drm_display_mode *mode,
-+			 struct drm_display_mode *adjusted_mode);
-+
-+	enum drm_connector_status (*detect)(struct intel_dsi_device *dsi);
-+
-+	bool (*get_hw_state)(struct intel_dsi_device *dev);
-+
-+	struct drm_display_mode *(*get_modes)(struct intel_dsi_device *dsi);
-+
-+	void (*destroy) (struct intel_dsi_device *dsi);
-+};
-+
-+struct intel_dsi {
-+	struct intel_encoder base;
-+
-+	struct intel_dsi_device dev;
-+
-+	struct intel_connector *attached_connector;
-+
-+	/* if true, use HS mode, otherwise LP */
-+	bool hs;
-+
-+	/* virtual channel */
-+	int channel;
-+
-+	/* number of DSI lanes */
-+	unsigned int lane_count;
-+
-+	/* video mode pixel format for MIPI_DSI_FUNC_PRG register */
-+	u32 pixel_format;
-+
-+	/* video mode format for MIPI_VIDEO_MODE_FORMAT register */
-+	u32 video_mode_format;
-+
-+	/* eot for MIPI_EOT_DISABLE register */
-+	u32 eot_disable;
-+};
-+
-+static inline struct intel_dsi *enc_to_intel_dsi(struct drm_encoder *encoder)
-+{
-+	return container_of(encoder, struct intel_dsi, base.base);
-+}
-+
-+#endif /* _INTEL_DSI_H */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0775-drm-i915-add-MIPI-DSI-command-sending-routines.patch b/patches.baytrail/0775-drm-i915-add-MIPI-DSI-command-sending-routines.patch
deleted file mode 100644
index 9af25c9e9b668..0000000000000
--- a/patches.baytrail/0775-drm-i915-add-MIPI-DSI-command-sending-routines.patch
+++ /dev/null
@@ -1,593 +0,0 @@
-From a576567dfb63cb6803f96deee10310e56423a9a8 Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Tue, 27 Aug 2013 15:12:19 +0300
-Subject: drm/i915: add MIPI DSI command sending routines
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-v2: Rebase due to register bit definition change.
-
-v3: Mostly based on Ville's review comments.
- - Use size_t for length all around.
- - Reuse dsi_vc_send_short in dsi_vc_send_long.
- - Remove stale/incorrect comments.
- - Reverse special packet sent interrupt check.
- - Use DSI controller regs for reading, not adapter.
-
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 69c05eb2d8421cbe96c2c66ea6e3223d25928d92)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/Makefile        |   1 +
- drivers/gpu/drm/i915/intel_dsi_cmd.c | 427 +++++++++++++++++++++++++++++++++++
- drivers/gpu/drm/i915/intel_dsi_cmd.h | 109 +++++++++
- 3 files changed, 537 insertions(+)
- create mode 100644 drivers/gpu/drm/i915/intel_dsi_cmd.c
- create mode 100644 drivers/gpu/drm/i915/intel_dsi_cmd.h
-
-diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
-index b8449a84a0dc..8bffd292d1dc 100644
---- a/drivers/gpu/drm/i915/Makefile
-+++ b/drivers/gpu/drm/i915/Makefile
-@@ -21,6 +21,7 @@ i915-y := i915_drv.o i915_dma.o i915_irq.o \
- 	  intel_display.o \
- 	  intel_crt.o \
- 	  intel_lvds.o \
-+	  intel_dsi_cmd.o \
- 	  intel_bios.o \
- 	  intel_ddi.o \
- 	  intel_dp.o \
-diff --git a/drivers/gpu/drm/i915/intel_dsi_cmd.c b/drivers/gpu/drm/i915/intel_dsi_cmd.c
-new file mode 100644
-index 000000000000..86577a0fc620
---- /dev/null
-+++ b/drivers/gpu/drm/i915/intel_dsi_cmd.c
-@@ -0,0 +1,427 @@
-+/*
-+ * Copyright © 2013 Intel Corporation
-+ *
-+ * Permission is hereby granted, free of charge, to any person obtaining a
-+ * copy of this software and associated documentation files (the "Software"),
-+ * to deal in the Software without restriction, including without limitation
-+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
-+ * and/or sell copies of the Software, and to permit persons to whom the
-+ * Software is furnished to do so, subject to the following conditions:
-+ *
-+ * The above copyright notice and this permission notice (including the next
-+ * paragraph) shall be included in all copies or substantial portions of the
-+ * Software.
-+ *
-+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
-+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
-+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
-+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
-+ * DEALINGS IN THE SOFTWARE.
-+ *
-+ * Author: Jani Nikula <jani.nikula@intel.com>
-+ */
-+
-+#include <linux/export.h>
-+#include <drm/drmP.h>
-+#include <drm/drm_crtc.h>
-+#include <video/mipi_display.h>
-+#include "i915_drv.h"
-+#include "intel_drv.h"
-+#include "intel_dsi.h"
-+#include "intel_dsi_cmd.h"
-+
-+/*
-+ * XXX: MIPI_DATA_ADDRESS, MIPI_DATA_LENGTH, MIPI_COMMAND_LENGTH, and
-+ * MIPI_COMMAND_ADDRESS registers.
-+ *
-+ * Apparently these registers provide a MIPI adapter level way to send (lots of)
-+ * commands and data to the receiver, without having to write the commands and
-+ * data to MIPI_{HS,LP}_GEN_{CTRL,DATA} registers word by word.
-+ *
-+ * Presumably for anything other than MIPI_DCS_WRITE_MEMORY_START and
-+ * MIPI_DCS_WRITE_MEMORY_CONTINUE (which are used to update the external
-+ * framebuffer in command mode displays) these are just an optimization that can
-+ * come later.
-+ *
-+ * For memory writes, these should probably be used for performance.
-+ */
-+
-+static void print_stat(struct intel_dsi *intel_dsi)
-+{
-+	struct drm_encoder *encoder = &intel_dsi->base.base;
-+	struct drm_device *dev = encoder->dev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
-+	enum pipe pipe = intel_crtc->pipe;
-+	u32 val;
-+
-+	val = I915_READ(MIPI_INTR_STAT(pipe));
-+
-+#define STAT_BIT(val, bit) (val) & (bit) ? " " #bit : ""
-+	DRM_DEBUG_KMS("MIPI_INTR_STAT(%d) = %08x"
-+		      "%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s"
-+		      "\n", pipe, val,
-+		      STAT_BIT(val, TEARING_EFFECT),
-+		      STAT_BIT(val, SPL_PKT_SENT_INTERRUPT),
-+		      STAT_BIT(val, GEN_READ_DATA_AVAIL),
-+		      STAT_BIT(val, LP_GENERIC_WR_FIFO_FULL),
-+		      STAT_BIT(val, HS_GENERIC_WR_FIFO_FULL),
-+		      STAT_BIT(val, RX_PROT_VIOLATION),
-+		      STAT_BIT(val, RX_INVALID_TX_LENGTH),
-+		      STAT_BIT(val, ACK_WITH_NO_ERROR),
-+		      STAT_BIT(val, TURN_AROUND_ACK_TIMEOUT),
-+		      STAT_BIT(val, LP_RX_TIMEOUT),
-+		      STAT_BIT(val, HS_TX_TIMEOUT),
-+		      STAT_BIT(val, DPI_FIFO_UNDERRUN),
-+		      STAT_BIT(val, LOW_CONTENTION),
-+		      STAT_BIT(val, HIGH_CONTENTION),
-+		      STAT_BIT(val, TXDSI_VC_ID_INVALID),
-+		      STAT_BIT(val, TXDSI_DATA_TYPE_NOT_RECOGNISED),
-+		      STAT_BIT(val, TXCHECKSUM_ERROR),
-+		      STAT_BIT(val, TXECC_MULTIBIT_ERROR),
-+		      STAT_BIT(val, TXECC_SINGLE_BIT_ERROR),
-+		      STAT_BIT(val, TXFALSE_CONTROL_ERROR),
-+		      STAT_BIT(val, RXDSI_VC_ID_INVALID),
-+		      STAT_BIT(val, RXDSI_DATA_TYPE_NOT_REGOGNISED),
-+		      STAT_BIT(val, RXCHECKSUM_ERROR),
-+		      STAT_BIT(val, RXECC_MULTIBIT_ERROR),
-+		      STAT_BIT(val, RXECC_SINGLE_BIT_ERROR),
-+		      STAT_BIT(val, RXFALSE_CONTROL_ERROR),
-+		      STAT_BIT(val, RXHS_RECEIVE_TIMEOUT_ERROR),
-+		      STAT_BIT(val, RX_LP_TX_SYNC_ERROR),
-+		      STAT_BIT(val, RXEXCAPE_MODE_ENTRY_ERROR),
-+		      STAT_BIT(val, RXEOT_SYNC_ERROR),
-+		      STAT_BIT(val, RXSOT_SYNC_ERROR),
-+		      STAT_BIT(val, RXSOT_ERROR));
-+#undef STAT_BIT
-+}
-+
-+enum dsi_type {
-+	DSI_DCS,
-+	DSI_GENERIC,
-+};
-+
-+/* enable or disable command mode hs transmissions */
-+void dsi_hs_mode_enable(struct intel_dsi *intel_dsi, bool enable)
-+{
-+	struct drm_encoder *encoder = &intel_dsi->base.base;
-+	struct drm_device *dev = encoder->dev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
-+	enum pipe pipe = intel_crtc->pipe;
-+	u32 temp;
-+	u32 mask = DBI_FIFO_EMPTY;
-+
-+	if (wait_for((I915_READ(MIPI_GEN_FIFO_STAT(pipe)) & mask) == mask, 50))
-+		DRM_ERROR("Timeout waiting for DBI FIFO empty\n");
-+
-+	temp = I915_READ(MIPI_HS_LP_DBI_ENABLE(pipe));
-+	temp &= DBI_HS_LP_MODE_MASK;
-+	I915_WRITE(MIPI_HS_LP_DBI_ENABLE(pipe), enable ? DBI_HS_MODE : DBI_LP_MODE);
-+
-+	intel_dsi->hs = enable;
-+}
-+
-+static int dsi_vc_send_short(struct intel_dsi *intel_dsi, int channel,
-+			     u8 data_type, u16 data)
-+{
-+	struct drm_encoder *encoder = &intel_dsi->base.base;
-+	struct drm_device *dev = encoder->dev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
-+	enum pipe pipe = intel_crtc->pipe;
-+	u32 ctrl_reg;
-+	u32 ctrl;
-+	u32 mask;
-+
-+	DRM_DEBUG_KMS("channel %d, data_type %d, data %04x\n",
-+		      channel, data_type, data);
-+
-+	if (intel_dsi->hs) {
-+		ctrl_reg = MIPI_HS_GEN_CTRL(pipe);
-+		mask = HS_CTRL_FIFO_FULL;
-+	} else {
-+		ctrl_reg = MIPI_LP_GEN_CTRL(pipe);
-+		mask = LP_CTRL_FIFO_FULL;
-+	}
-+
-+	if (wait_for((I915_READ(MIPI_GEN_FIFO_STAT(pipe)) & mask) == 0, 50)) {
-+		DRM_ERROR("Timeout waiting for HS/LP CTRL FIFO !full\n");
-+		print_stat(intel_dsi);
-+	}
-+
-+	/*
-+	 * Note: This function is also used for long packets, with length passed
-+	 * as data, since SHORT_PACKET_PARAM_SHIFT ==
-+	 * LONG_PACKET_WORD_COUNT_SHIFT.
-+	 */
-+	ctrl = data << SHORT_PACKET_PARAM_SHIFT |
-+		channel << VIRTUAL_CHANNEL_SHIFT |
-+		data_type << DATA_TYPE_SHIFT;
-+
-+	I915_WRITE(ctrl_reg, ctrl);
-+
-+	return 0;
-+}
-+
-+static int dsi_vc_send_long(struct intel_dsi *intel_dsi, int channel,
-+			    u8 data_type, const u8 *data, size_t len)
-+{
-+	struct drm_encoder *encoder = &intel_dsi->base.base;
-+	struct drm_device *dev = encoder->dev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
-+	enum pipe pipe = intel_crtc->pipe;
-+	u32 data_reg;
-+	size_t i, j, n;
-+	u32 mask;
-+
-+	DRM_DEBUG_KMS("channel %d, data_type %d, len %04x\n",
-+		      channel, data_type, len);
-+
-+	if (intel_dsi->hs) {
-+		data_reg = MIPI_HS_GEN_DATA(pipe);
-+		mask = HS_DATA_FIFO_FULL;
-+	} else {
-+		data_reg = MIPI_LP_GEN_DATA(pipe);
-+		mask = LP_DATA_FIFO_FULL;
-+	}
-+
-+	if (wait_for((I915_READ(MIPI_GEN_FIFO_STAT(pipe)) & mask) == 0, 50))
-+		DRM_ERROR("Timeout waiting for HS/LP DATA FIFO !full\n");
-+
-+	for (i = 0; i < len; i += n) {
-+		u32 val = 0;
-+		n = min_t(size_t, len - i, 4);
-+
-+		for (j = 0; j < n; j++)
-+			val |= *data++ << 8 * j;
-+
-+		I915_WRITE(data_reg, val);
-+		/* XXX: check for data fifo full, once that is set, write 4
-+		 * dwords, then wait for not set, then continue. */
-+	}
-+
-+	return dsi_vc_send_short(intel_dsi, channel, data_type, len);
-+}
-+
-+static int dsi_vc_write_common(struct intel_dsi *intel_dsi,
-+			       int channel, const u8 *data, size_t len,
-+			       enum dsi_type type)
-+{
-+	int ret;
-+
-+	if (len == 0) {
-+		BUG_ON(type == DSI_GENERIC);
-+		ret = dsi_vc_send_short(intel_dsi, channel,
-+					MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM,
-+					0);
-+	} else if (len == 1) {
-+		ret = dsi_vc_send_short(intel_dsi, channel,
-+					type == DSI_GENERIC ?
-+					MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM :
-+					MIPI_DSI_DCS_SHORT_WRITE, data[0]);
-+	} else if (len == 2) {
-+		ret = dsi_vc_send_short(intel_dsi, channel,
-+					type == DSI_GENERIC ?
-+					MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM :
-+					MIPI_DSI_DCS_SHORT_WRITE_PARAM,
-+					(data[1] << 8) | data[0]);
-+	} else {
-+		ret = dsi_vc_send_long(intel_dsi, channel,
-+				       type == DSI_GENERIC ?
-+				       MIPI_DSI_GENERIC_LONG_WRITE :
-+				       MIPI_DSI_DCS_LONG_WRITE, data, len);
-+	}
-+
-+	return ret;
-+}
-+
-+int dsi_vc_dcs_write(struct intel_dsi *intel_dsi, int channel,
-+		     const u8 *data, size_t len)
-+{
-+	return dsi_vc_write_common(intel_dsi, channel, data, len, DSI_DCS);
-+}
-+
-+int dsi_vc_generic_write(struct intel_dsi *intel_dsi, int channel,
-+			 const u8 *data, size_t len)
-+{
-+	return dsi_vc_write_common(intel_dsi, channel, data, len, DSI_GENERIC);
-+}
-+
-+static int dsi_vc_dcs_send_read_request(struct intel_dsi *intel_dsi,
-+					int channel, u8 dcs_cmd)
-+{
-+	return dsi_vc_send_short(intel_dsi, channel, MIPI_DSI_DCS_READ,
-+				 dcs_cmd);
-+}
-+
-+static int dsi_vc_generic_send_read_request(struct intel_dsi *intel_dsi,
-+					    int channel, u8 *reqdata,
-+					    size_t reqlen)
-+{
-+	u16 data;
-+	u8 data_type;
-+
-+	switch (reqlen) {
-+	case 0:
-+		data_type = MIPI_DSI_GENERIC_READ_REQUEST_0_PARAM;
-+		data = 0;
-+		break;
-+	case 1:
-+		data_type = MIPI_DSI_GENERIC_READ_REQUEST_1_PARAM;
-+		data = reqdata[0];
-+		break;
-+	case 2:
-+		data_type = MIPI_DSI_GENERIC_READ_REQUEST_2_PARAM;
-+		data = (reqdata[1] << 8) | reqdata[0];
-+		break;
-+	default:
-+		BUG();
-+	}
-+
-+	return dsi_vc_send_short(intel_dsi, channel, data_type, data);
-+}
-+
-+static int dsi_read_data_return(struct intel_dsi *intel_dsi,
-+				u8 *buf, size_t buflen)
-+{
-+	struct drm_encoder *encoder = &intel_dsi->base.base;
-+	struct drm_device *dev = encoder->dev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
-+	enum pipe pipe = intel_crtc->pipe;
-+	size_t i, len = 0;
-+	u32 data_reg, val;
-+
-+	if (intel_dsi->hs) {
-+		data_reg = MIPI_HS_GEN_DATA(pipe);
-+	} else {
-+		data_reg = MIPI_LP_GEN_DATA(pipe);
-+	}
-+
-+	while (len < buflen) {
-+		val = I915_READ(data_reg);
-+		for (i = 0; i < 4 && len < buflen; i++, len++)
-+			buf[len] = val >> 8 * i;
-+	}
-+
-+	return len;
-+}
-+
-+int dsi_vc_dcs_read(struct intel_dsi *intel_dsi, int channel, u8 dcs_cmd,
-+		    u8 *buf, size_t buflen)
-+{
-+	struct drm_encoder *encoder = &intel_dsi->base.base;
-+	struct drm_device *dev = encoder->dev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
-+	enum pipe pipe = intel_crtc->pipe;
-+	u32 mask;
-+	int ret;
-+
-+	/*
-+	 * XXX: should issue multiple read requests and reads if request is
-+	 * longer than MIPI_MAX_RETURN_PKT_SIZE
-+	 */
-+
-+	I915_WRITE(MIPI_INTR_STAT(pipe), GEN_READ_DATA_AVAIL);
-+
-+	ret = dsi_vc_dcs_send_read_request(intel_dsi, channel, dcs_cmd);
-+	if (ret)
-+		return ret;
-+
-+	mask = GEN_READ_DATA_AVAIL;
-+	if (wait_for((I915_READ(MIPI_INTR_STAT(pipe)) & mask) == mask, 50))
-+		DRM_ERROR("Timeout waiting for read data.\n");
-+
-+	ret = dsi_read_data_return(intel_dsi, buf, buflen);
-+	if (ret < 0)
-+		return ret;
-+
-+	if (ret != buflen)
-+		return -EIO;
-+
-+	return 0;
-+}
-+
-+int dsi_vc_generic_read(struct intel_dsi *intel_dsi, int channel,
-+			u8 *reqdata, size_t reqlen, u8 *buf, size_t buflen)
-+{
-+	struct drm_encoder *encoder = &intel_dsi->base.base;
-+	struct drm_device *dev = encoder->dev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
-+	enum pipe pipe = intel_crtc->pipe;
-+	u32 mask;
-+	int ret;
-+
-+	/*
-+	 * XXX: should issue multiple read requests and reads if request is
-+	 * longer than MIPI_MAX_RETURN_PKT_SIZE
-+	 */
-+
-+	I915_WRITE(MIPI_INTR_STAT(pipe), GEN_READ_DATA_AVAIL);
-+
-+	ret = dsi_vc_generic_send_read_request(intel_dsi, channel, reqdata,
-+					       reqlen);
-+	if (ret)
-+		return ret;
-+
-+	mask = GEN_READ_DATA_AVAIL;
-+	if (wait_for((I915_READ(MIPI_INTR_STAT(pipe)) & mask) == mask, 50))
-+		DRM_ERROR("Timeout waiting for read data.\n");
-+
-+	ret = dsi_read_data_return(intel_dsi, buf, buflen);
-+	if (ret < 0)
-+		return ret;
-+
-+	if (ret != buflen)
-+		return -EIO;
-+
-+	return 0;
-+}
-+
-+/*
-+ * send a video mode command
-+ *
-+ * XXX: commands with data in MIPI_DPI_DATA?
-+ */
-+int dpi_send_cmd(struct intel_dsi *intel_dsi, u32 cmd)
-+{
-+	struct drm_encoder *encoder = &intel_dsi->base.base;
-+	struct drm_device *dev = encoder->dev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
-+	enum pipe pipe = intel_crtc->pipe;
-+	u32 mask;
-+
-+	/* XXX: pipe, hs */
-+	if (intel_dsi->hs)
-+		cmd &= ~DPI_LP_MODE;
-+	else
-+		cmd |= DPI_LP_MODE;
-+
-+	/* DPI virtual channel?! */
-+
-+	mask = DPI_FIFO_EMPTY;
-+	if (wait_for((I915_READ(MIPI_GEN_FIFO_STAT(pipe)) & mask) == mask, 50))
-+		DRM_ERROR("Timeout waiting for DPI FIFO empty.\n");
-+
-+	/* clear bit */
-+	I915_WRITE(MIPI_INTR_STAT(pipe), SPL_PKT_SENT_INTERRUPT);
-+
-+	/* XXX: old code skips write if control unchanged */
-+	if (cmd == I915_READ(MIPI_DPI_CONTROL(pipe)))
-+		DRM_ERROR("Same special packet %02x twice in a row.\n", cmd);
-+
-+	I915_WRITE(MIPI_DPI_CONTROL(pipe), cmd);
-+
-+	mask = SPL_PKT_SENT_INTERRUPT;
-+	if (wait_for((I915_READ(MIPI_INTR_STAT(pipe)) & mask) == mask, 100))
-+		DRM_ERROR("Video mode command 0x%08x send failed.\n", cmd);
-+
-+	return 0;
-+}
-diff --git a/drivers/gpu/drm/i915/intel_dsi_cmd.h b/drivers/gpu/drm/i915/intel_dsi_cmd.h
-new file mode 100644
-index 000000000000..714a49aaed65
---- /dev/null
-+++ b/drivers/gpu/drm/i915/intel_dsi_cmd.h
-@@ -0,0 +1,109 @@
-+/*
-+ * Copyright © 2013 Intel Corporation
-+ *
-+ * Permission is hereby granted, free of charge, to any person obtaining a
-+ * copy of this software and associated documentation files (the "Software"),
-+ * to deal in the Software without restriction, including without limitation
-+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
-+ * and/or sell copies of the Software, and to permit persons to whom the
-+ * Software is furnished to do so, subject to the following conditions:
-+ *
-+ * The above copyright notice and this permission notice (including the next
-+ * paragraph) shall be included in all copies or substantial portions of the
-+ * Software.
-+ *
-+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
-+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
-+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
-+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
-+ * DEALINGS IN THE SOFTWARE.
-+ *
-+ * Author: Jani Nikula <jani.nikula@intel.com>
-+ */
-+
-+#ifndef _INTEL_DSI_DSI_H
-+#define _INTEL_DSI_DSI_H
-+
-+#include <drm/drmP.h>
-+#include <drm/drm_crtc.h>
-+#include <video/mipi_display.h>
-+#include "i915_drv.h"
-+#include "intel_drv.h"
-+#include "intel_dsi.h"
-+
-+void dsi_hs_mode_enable(struct intel_dsi *intel_dsi, bool enable);
-+
-+int dsi_vc_dcs_write(struct intel_dsi *intel_dsi, int channel,
-+		     const u8 *data, size_t len);
-+
-+int dsi_vc_generic_write(struct intel_dsi *intel_dsi, int channel,
-+			 const u8 *data, size_t len);
-+
-+int dsi_vc_dcs_read(struct intel_dsi *intel_dsi, int channel, u8 dcs_cmd,
-+		    u8 *buf, size_t buflen);
-+
-+int dsi_vc_generic_read(struct intel_dsi *intel_dsi, int channel,
-+			u8 *reqdata, size_t reqlen, u8 *buf, size_t buflen);
-+
-+int dpi_send_cmd(struct intel_dsi *intel_dsi, u32 cmd);
-+
-+/* XXX: questionable write helpers */
-+static inline int dsi_vc_dcs_write_0(struct intel_dsi *intel_dsi,
-+				     int channel, u8 dcs_cmd)
-+{
-+	return dsi_vc_dcs_write(intel_dsi, channel, &dcs_cmd, 1);
-+}
-+
-+static inline int dsi_vc_dcs_write_1(struct intel_dsi *intel_dsi,
-+				     int channel, u8 dcs_cmd, u8 param)
-+{
-+	u8 buf[2] = { dcs_cmd, param };
-+	return dsi_vc_dcs_write(intel_dsi, channel, buf, 2);
-+}
-+
-+static inline int dsi_vc_generic_write_0(struct intel_dsi *intel_dsi,
-+					 int channel)
-+{
-+	return dsi_vc_generic_write(intel_dsi, channel, NULL, 0);
-+}
-+
-+static inline int dsi_vc_generic_write_1(struct intel_dsi *intel_dsi,
-+					 int channel, u8 param)
-+{
-+	return dsi_vc_generic_write(intel_dsi, channel, &param, 1);
-+}
-+
-+static inline int dsi_vc_generic_write_2(struct intel_dsi *intel_dsi,
-+					 int channel, u8 param1, u8 param2)
-+{
-+	u8 buf[2] = { param1, param2 };
-+	return dsi_vc_generic_write(intel_dsi, channel, buf, 2);
-+}
-+
-+/* XXX: questionable read helpers */
-+static inline int dsi_vc_generic_read_0(struct intel_dsi *intel_dsi,
-+					int channel, u8 *buf, size_t buflen)
-+{
-+	return dsi_vc_generic_read(intel_dsi, channel, NULL, 0, buf, buflen);
-+}
-+
-+static inline int dsi_vc_generic_read_1(struct intel_dsi *intel_dsi,
-+					int channel, u8 param, u8 *buf,
-+					size_t buflen)
-+{
-+	return dsi_vc_generic_read(intel_dsi, channel, &param, 1, buf, buflen);
-+}
-+
-+static inline int dsi_vc_generic_read_2(struct intel_dsi *intel_dsi,
-+					int channel, u8 param1, u8 param2,
-+					u8 *buf, size_t buflen)
-+{
-+	u8 req[2] = { param1, param2 };
-+
-+	return dsi_vc_generic_read(intel_dsi, channel, req, 2, buf, buflen);
-+}
-+
-+
-+#endif /* _INTEL_DSI_DSI_H */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0776-drm-i915-add-basic-MIPI-DSI-output-support.patch b/patches.baytrail/0776-drm-i915-add-basic-MIPI-DSI-output-support.patch
deleted file mode 100644
index 714f62cc6d03a..0000000000000
--- a/patches.baytrail/0776-drm-i915-add-basic-MIPI-DSI-output-support.patch
+++ /dev/null
@@ -1,630 +0,0 @@
-From c81f55f70bd73efb7c8a965818acc079a151bf58 Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Tue, 27 Aug 2013 15:12:20 +0300
-Subject: drm/i915: add basic MIPI DSI output support
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-This does not include any panel specific sub-encoders yet.
-
-v2: Fix fixed mode handling (Daniel)
-
-v3: Mostly based on Ville's review comments.
- - Fix MIPI_HS_TX_TIMEOUT.
- - DPI_ENABLE only for video mode.
- - Drop ULPS usage for now, use DEVICE_READY only.
- - Set MIPI_INIT_COUNT based on txclkesc.
-
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 4e646495c6153f304fe45b6564ee08d4df935bb1)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/Makefile    |   1 +
- drivers/gpu/drm/i915/intel_drv.h |   1 +
- drivers/gpu/drm/i915/intel_dsi.c | 566 +++++++++++++++++++++++++++++++++++++++
- 3 files changed, 568 insertions(+)
- create mode 100644 drivers/gpu/drm/i915/intel_dsi.c
-
-diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
-index 8bffd292d1dc..5864c5ba44b7 100644
---- a/drivers/gpu/drm/i915/Makefile
-+++ b/drivers/gpu/drm/i915/Makefile
-@@ -21,6 +21,7 @@ i915-y := i915_drv.o i915_dma.o i915_irq.o \
- 	  intel_display.o \
- 	  intel_crt.o \
- 	  intel_lvds.o \
-+	  intel_dsi.o \
- 	  intel_dsi_cmd.o \
- 	  intel_bios.o \
- 	  intel_ddi.o \
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index 8e0d54d895be..f5c48d3b3730 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -525,6 +525,7 @@ extern void intel_mark_fb_busy(struct drm_i915_gem_object *obj,
- 			       struct intel_ring_buffer *ring);
- extern void intel_mark_idle(struct drm_device *dev);
- extern void intel_lvds_init(struct drm_device *dev);
-+extern bool intel_dsi_init(struct drm_device *dev);
- extern bool intel_is_dual_link_lvds(struct drm_device *dev);
- extern void intel_dp_init(struct drm_device *dev, int output_reg,
- 			  enum port port);
-diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
-new file mode 100644
-index 000000000000..0dfb28fba47e
---- /dev/null
-+++ b/drivers/gpu/drm/i915/intel_dsi.c
-@@ -0,0 +1,566 @@
-+/*
-+ * Copyright © 2013 Intel Corporation
-+ *
-+ * Permission is hereby granted, free of charge, to any person obtaining a
-+ * copy of this software and associated documentation files (the "Software"),
-+ * to deal in the Software without restriction, including without limitation
-+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
-+ * and/or sell copies of the Software, and to permit persons to whom the
-+ * Software is furnished to do so, subject to the following conditions:
-+ *
-+ * The above copyright notice and this permission notice (including the next
-+ * paragraph) shall be included in all copies or substantial portions of the
-+ * Software.
-+ *
-+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
-+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
-+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
-+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
-+ * DEALINGS IN THE SOFTWARE.
-+ *
-+ * Author: Jani Nikula <jani.nikula@intel.com>
-+ */
-+
-+#include <drm/drmP.h>
-+#include <drm/drm_crtc.h>
-+#include <drm/drm_edid.h>
-+#include <drm/i915_drm.h>
-+#include <linux/slab.h>
-+#include "i915_drv.h"
-+#include "intel_drv.h"
-+#include "intel_dsi.h"
-+#include "intel_dsi_cmd.h"
-+
-+/* the sub-encoders aka panel drivers */
-+static const struct intel_dsi_device intel_dsi_devices[] = {
-+};
-+
-+static struct intel_dsi *intel_attached_dsi(struct drm_connector *connector)
-+{
-+	return container_of(intel_attached_encoder(connector),
-+			    struct intel_dsi, base);
-+}
-+
-+static inline bool is_vid_mode(struct intel_dsi *intel_dsi)
-+{
-+	return intel_dsi->dev.type == INTEL_DSI_VIDEO_MODE;
-+}
-+
-+static inline bool is_cmd_mode(struct intel_dsi *intel_dsi)
-+{
-+	return intel_dsi->dev.type == INTEL_DSI_COMMAND_MODE;
-+}
-+
-+static void intel_dsi_hot_plug(struct intel_encoder *encoder)
-+{
-+	DRM_DEBUG_KMS("\n");
-+}
-+
-+static bool intel_dsi_compute_config(struct intel_encoder *encoder,
-+				     struct intel_crtc_config *config)
-+{
-+	struct intel_dsi *intel_dsi = container_of(encoder, struct intel_dsi,
-+						   base);
-+	struct intel_connector *intel_connector = intel_dsi->attached_connector;
-+	struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode;
-+	struct drm_display_mode *adjusted_mode = &config->adjusted_mode;
-+	struct drm_display_mode *mode = &config->requested_mode;
-+
-+	DRM_DEBUG_KMS("\n");
-+
-+	if (fixed_mode)
-+		intel_fixed_panel_mode(fixed_mode, adjusted_mode);
-+
-+	if (intel_dsi->dev.dev_ops->mode_fixup)
-+		return intel_dsi->dev.dev_ops->mode_fixup(&intel_dsi->dev,
-+							  mode, adjusted_mode);
-+
-+	return true;
-+}
-+
-+static void intel_dsi_pre_pll_enable(struct intel_encoder *encoder)
-+{
-+	DRM_DEBUG_KMS("\n");
-+}
-+
-+static void intel_dsi_pre_enable(struct intel_encoder *encoder)
-+{
-+	DRM_DEBUG_KMS("\n");
-+}
-+
-+static void intel_dsi_enable(struct intel_encoder *encoder)
-+{
-+	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
-+	struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
-+	struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
-+	int pipe = intel_crtc->pipe;
-+	u32 temp;
-+
-+	DRM_DEBUG_KMS("\n");
-+
-+	temp = I915_READ(MIPI_DEVICE_READY(pipe));
-+	if ((temp & DEVICE_READY) == 0) {
-+		temp &= ~ULPS_STATE_MASK;
-+		I915_WRITE(MIPI_DEVICE_READY(pipe), temp | DEVICE_READY);
-+	} else if (temp & ULPS_STATE_MASK) {
-+		temp &= ~ULPS_STATE_MASK;
-+		I915_WRITE(MIPI_DEVICE_READY(pipe), temp | ULPS_STATE_EXIT);
-+		/*
-+		 * We need to ensure that there is a minimum of 1 ms time
-+		 * available before clearing the UPLS exit state.
-+		 */
-+		msleep(2);
-+		I915_WRITE(MIPI_DEVICE_READY(pipe), temp);
-+	}
-+
-+	if (is_cmd_mode(intel_dsi))
-+		I915_WRITE(MIPI_MAX_RETURN_PKT_SIZE(pipe), 8 * 4);
-+
-+	if (is_vid_mode(intel_dsi)) {
-+		msleep(20); /* XXX */
-+		dpi_send_cmd(intel_dsi, TURN_ON);
-+		msleep(100);
-+
-+		/* assert ip_tg_enable signal */
-+		temp = I915_READ(MIPI_PORT_CTRL(pipe));
-+		I915_WRITE(MIPI_PORT_CTRL(pipe), temp | DPI_ENABLE);
-+		POSTING_READ(MIPI_PORT_CTRL(pipe));
-+	}
-+
-+	intel_dsi->dev.dev_ops->enable(&intel_dsi->dev);
-+}
-+
-+static void intel_dsi_disable(struct intel_encoder *encoder)
-+{
-+	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
-+	struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
-+	struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
-+	int pipe = intel_crtc->pipe;
-+	u32 temp;
-+
-+	DRM_DEBUG_KMS("\n");
-+
-+	intel_dsi->dev.dev_ops->disable(&intel_dsi->dev);
-+
-+	if (is_vid_mode(intel_dsi)) {
-+		dpi_send_cmd(intel_dsi, SHUTDOWN);
-+		msleep(10);
-+
-+		/* de-assert ip_tg_enable signal */
-+		temp = I915_READ(MIPI_PORT_CTRL(pipe));
-+		I915_WRITE(MIPI_PORT_CTRL(pipe), temp & ~DPI_ENABLE);
-+		POSTING_READ(MIPI_PORT_CTRL(pipe));
-+
-+		msleep(2);
-+	}
-+
-+	temp = I915_READ(MIPI_DEVICE_READY(pipe));
-+	if (temp & DEVICE_READY) {
-+		temp &= ~DEVICE_READY;
-+		temp &= ~ULPS_STATE_MASK;
-+		I915_WRITE(MIPI_DEVICE_READY(pipe), temp);
-+	}
-+}
-+
-+static void intel_dsi_post_disable(struct intel_encoder *encoder)
-+{
-+	DRM_DEBUG_KMS("\n");
-+}
-+
-+static bool intel_dsi_get_hw_state(struct intel_encoder *encoder,
-+				   enum pipe *pipe)
-+{
-+	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
-+	u32 port, func;
-+	enum pipe p;
-+
-+	DRM_DEBUG_KMS("\n");
-+
-+	/* XXX: this only works for one DSI output */
-+	for (p = PIPE_A; p <= PIPE_B; p++) {
-+		port = I915_READ(MIPI_PORT_CTRL(p));
-+		func = I915_READ(MIPI_DSI_FUNC_PRG(p));
-+
-+		if ((port & DPI_ENABLE) || (func & CMD_MODE_DATA_WIDTH_MASK)) {
-+			if (I915_READ(MIPI_DEVICE_READY(p)) & DEVICE_READY) {
-+				*pipe = p;
-+				return true;
-+			}
-+		}
-+	}
-+
-+	return false;
-+}
-+
-+static void intel_dsi_get_config(struct intel_encoder *encoder,
-+				 struct intel_crtc_config *pipe_config)
-+{
-+	DRM_DEBUG_KMS("\n");
-+
-+	/* XXX: read flags, set to adjusted_mode */
-+}
-+
-+static int intel_dsi_mode_valid(struct drm_connector *connector,
-+				struct drm_display_mode *mode)
-+{
-+	struct intel_connector *intel_connector = to_intel_connector(connector);
-+	struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode;
-+	struct intel_dsi *intel_dsi = intel_attached_dsi(connector);
-+
-+	DRM_DEBUG_KMS("\n");
-+
-+	if (mode->flags & DRM_MODE_FLAG_DBLSCAN) {
-+		DRM_DEBUG_KMS("MODE_NO_DBLESCAN\n");
-+		return MODE_NO_DBLESCAN;
-+	}
-+
-+	if (fixed_mode) {
-+		if (mode->hdisplay > fixed_mode->hdisplay)
-+			return MODE_PANEL;
-+		if (mode->vdisplay > fixed_mode->vdisplay)
-+			return MODE_PANEL;
-+	}
-+
-+	return intel_dsi->dev.dev_ops->mode_valid(&intel_dsi->dev, mode);
-+}
-+
-+/* return txclkesc cycles in terms of divider and duration in us */
-+static u16 txclkesc(u32 divider, unsigned int us)
-+{
-+	switch (divider) {
-+	case ESCAPE_CLOCK_DIVIDER_1:
-+	default:
-+		return 20 * us;
-+	case ESCAPE_CLOCK_DIVIDER_2:
-+		return 10 * us;
-+	case ESCAPE_CLOCK_DIVIDER_4:
-+		return 5 * us;
-+	}
-+}
-+
-+/* return pixels in terms of txbyteclkhs */
-+static u16 txbyteclkhs(u16 pixels, int bpp, int lane_count)
-+{
-+	return DIV_ROUND_UP(DIV_ROUND_UP(pixels * bpp, 8), lane_count);
-+}
-+
-+static void set_dsi_timings(struct drm_encoder *encoder,
-+			    const struct drm_display_mode *mode)
-+{
-+	struct drm_device *dev = encoder->dev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
-+	struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
-+	int pipe = intel_crtc->pipe;
-+	unsigned int bpp = intel_crtc->config.pipe_bpp;
-+	unsigned int lane_count = intel_dsi->lane_count;
-+
-+	u16 hactive, hfp, hsync, hbp, vfp, vsync, vbp;
-+
-+	hactive = mode->hdisplay;
-+	hfp = mode->hsync_start - mode->hdisplay;
-+	hsync = mode->hsync_end - mode->hsync_start;
-+	hbp = mode->htotal - mode->hsync_end;
-+
-+	vfp = mode->vsync_start - mode->vdisplay;
-+	vsync = mode->vsync_end - mode->vsync_start;
-+	vbp = mode->vtotal - mode->vsync_end;
-+
-+	/* horizontal values are in terms of high speed byte clock */
-+	hactive = txbyteclkhs(hactive, bpp, lane_count);
-+	hfp = txbyteclkhs(hfp, bpp, lane_count);
-+	hsync = txbyteclkhs(hsync, bpp, lane_count);
-+	hbp = txbyteclkhs(hbp, bpp, lane_count);
-+
-+	I915_WRITE(MIPI_HACTIVE_AREA_COUNT(pipe), hactive);
-+	I915_WRITE(MIPI_HFP_COUNT(pipe), hfp);
-+
-+	/* meaningful for video mode non-burst sync pulse mode only, can be zero
-+	 * for non-burst sync events and burst modes */
-+	I915_WRITE(MIPI_HSYNC_PADDING_COUNT(pipe), hsync);
-+	I915_WRITE(MIPI_HBP_COUNT(pipe), hbp);
-+
-+	/* vertical values are in terms of lines */
-+	I915_WRITE(MIPI_VFP_COUNT(pipe), vfp);
-+	I915_WRITE(MIPI_VSYNC_PADDING_COUNT(pipe), vsync);
-+	I915_WRITE(MIPI_VBP_COUNT(pipe), vbp);
-+}
-+
-+static void intel_dsi_mode_set(struct intel_encoder *intel_encoder)
-+{
-+	struct drm_encoder *encoder = &intel_encoder->base;
-+	struct drm_device *dev = encoder->dev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
-+	struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
-+	struct drm_display_mode *adjusted_mode =
-+		&intel_crtc->config.adjusted_mode;
-+	int pipe = intel_crtc->pipe;
-+	unsigned int bpp = intel_crtc->config.pipe_bpp;
-+	u32 val, tmp;
-+
-+	DRM_DEBUG_KMS("pipe %d\n", pipe);
-+
-+	/* escape clock divider, 20MHz, shared for A and C. device ready must be
-+	 * off when doing this! txclkesc? */
-+	tmp = I915_READ(MIPI_CTRL(0));
-+	tmp &= ~ESCAPE_CLOCK_DIVIDER_MASK;
-+	I915_WRITE(MIPI_CTRL(0), tmp | ESCAPE_CLOCK_DIVIDER_1);
-+
-+	/* read request priority is per pipe */
-+	tmp = I915_READ(MIPI_CTRL(pipe));
-+	tmp &= ~READ_REQUEST_PRIORITY_MASK;
-+	I915_WRITE(MIPI_CTRL(pipe), tmp | READ_REQUEST_PRIORITY_HIGH);
-+
-+	/* XXX: why here, why like this? handling in irq handler?! */
-+	I915_WRITE(MIPI_INTR_STAT(pipe), 0xffffffff);
-+	I915_WRITE(MIPI_INTR_EN(pipe), 0xffffffff);
-+
-+	I915_WRITE(MIPI_DPHY_PARAM(pipe),
-+		   0x3c << EXIT_ZERO_COUNT_SHIFT |
-+		   0x1f << TRAIL_COUNT_SHIFT |
-+		   0xc5 << CLK_ZERO_COUNT_SHIFT |
-+		   0x1f << PREPARE_COUNT_SHIFT);
-+
-+	I915_WRITE(MIPI_DPI_RESOLUTION(pipe),
-+		   adjusted_mode->vdisplay << VERTICAL_ADDRESS_SHIFT |
-+		   adjusted_mode->hdisplay << HORIZONTAL_ADDRESS_SHIFT);
-+
-+	set_dsi_timings(encoder, adjusted_mode);
-+
-+	val = intel_dsi->lane_count << DATA_LANES_PRG_REG_SHIFT;
-+	if (is_cmd_mode(intel_dsi)) {
-+		val |= intel_dsi->channel << CMD_MODE_CHANNEL_NUMBER_SHIFT;
-+		val |= CMD_MODE_DATA_WIDTH_8_BIT; /* XXX */
-+	} else {
-+		val |= intel_dsi->channel << VID_MODE_CHANNEL_NUMBER_SHIFT;
-+
-+		/* XXX: cross-check bpp vs. pixel format? */
-+		val |= intel_dsi->pixel_format;
-+	}
-+	I915_WRITE(MIPI_DSI_FUNC_PRG(pipe), val);
-+
-+	/* timeouts for recovery. one frame IIUC. if counter expires, EOT and
-+	 * stop state. */
-+
-+	/*
-+	 * In burst mode, value greater than one DPI line Time in byte clock
-+	 * (txbyteclkhs) To timeout this timer 1+ of the above said value is
-+	 * recommended.
-+	 *
-+	 * In non-burst mode, Value greater than one DPI frame time in byte
-+	 * clock(txbyteclkhs) To timeout this timer 1+ of the above said value
-+	 * is recommended.
-+	 *
-+	 * In DBI only mode, value greater than one DBI frame time in byte
-+	 * clock(txbyteclkhs) To timeout this timer 1+ of the above said value
-+	 * is recommended.
-+	 */
-+
-+	if (is_vid_mode(intel_dsi) &&
-+	    intel_dsi->video_mode_format == VIDEO_MODE_BURST) {
-+		I915_WRITE(MIPI_HS_TX_TIMEOUT(pipe),
-+			   txbyteclkhs(adjusted_mode->htotal, bpp,
-+				       intel_dsi->lane_count) + 1);
-+	} else {
-+		I915_WRITE(MIPI_HS_TX_TIMEOUT(pipe),
-+			   txbyteclkhs(adjusted_mode->vtotal *
-+				       adjusted_mode->htotal,
-+				       bpp, intel_dsi->lane_count) + 1);
-+	}
-+	I915_WRITE(MIPI_LP_RX_TIMEOUT(pipe), 8309); /* max */
-+	I915_WRITE(MIPI_TURN_AROUND_TIMEOUT(pipe), 0x14); /* max */
-+	I915_WRITE(MIPI_DEVICE_RESET_TIMER(pipe), 0xffff); /* max */
-+
-+	/* dphy stuff */
-+
-+	/* in terms of low power clock */
-+	I915_WRITE(MIPI_INIT_COUNT(pipe), txclkesc(ESCAPE_CLOCK_DIVIDER_1, 100));
-+
-+	/* recovery disables */
-+	I915_WRITE(MIPI_EOT_DISABLE(pipe), intel_dsi->eot_disable);
-+
-+	/* in terms of txbyteclkhs. actual high to low switch +
-+	 * MIPI_STOP_STATE_STALL * MIPI_LP_BYTECLK.
-+	 *
-+	 * XXX: write MIPI_STOP_STATE_STALL?
-+	 */
-+	I915_WRITE(MIPI_HIGH_LOW_SWITCH_COUNT(pipe), 0x46);
-+
-+	/* XXX: low power clock equivalence in terms of byte clock. the number
-+	 * of byte clocks occupied in one low power clock. based on txbyteclkhs
-+	 * and txclkesc. txclkesc time / txbyteclk time * (105 +
-+	 * MIPI_STOP_STATE_STALL) / 105.???
-+	 */
-+	I915_WRITE(MIPI_LP_BYTECLK(pipe), 4);
-+
-+	/* the bw essential for transmitting 16 long packets containing 252
-+	 * bytes meant for dcs write memory command is programmed in this
-+	 * register in terms of byte clocks. based on dsi transfer rate and the
-+	 * number of lanes configured the time taken to transmit 16 long packets
-+	 * in a dsi stream varies. */
-+	I915_WRITE(MIPI_DBI_BW_CTRL(pipe), 0x820);
-+
-+	I915_WRITE(MIPI_CLK_LANE_SWITCH_TIME_CNT(pipe),
-+		   0xa << LP_HS_SSW_CNT_SHIFT |
-+		   0x14 << HS_LP_PWR_SW_CNT_SHIFT);
-+
-+	if (is_vid_mode(intel_dsi))
-+		I915_WRITE(MIPI_VIDEO_MODE_FORMAT(pipe),
-+			   intel_dsi->video_mode_format);
-+}
-+
-+static enum drm_connector_status
-+intel_dsi_detect(struct drm_connector *connector, bool force)
-+{
-+	struct intel_dsi *intel_dsi = intel_attached_dsi(connector);
-+	DRM_DEBUG_KMS("\n");
-+	return intel_dsi->dev.dev_ops->detect(&intel_dsi->dev);
-+}
-+
-+static int intel_dsi_get_modes(struct drm_connector *connector)
-+{
-+	struct intel_connector *intel_connector = to_intel_connector(connector);
-+	struct drm_display_mode *mode;
-+
-+	DRM_DEBUG_KMS("\n");
-+
-+	if (!intel_connector->panel.fixed_mode) {
-+		DRM_DEBUG_KMS("no fixed mode\n");
-+		return 0;
-+	}
-+
-+	mode = drm_mode_duplicate(connector->dev,
-+				  intel_connector->panel.fixed_mode);
-+	if (!mode) {
-+		DRM_DEBUG_KMS("drm_mode_duplicate failed\n");
-+		return 0;
-+	}
-+
-+	drm_mode_probed_add(connector, mode);
-+	return 1;
-+}
-+
-+static void intel_dsi_destroy(struct drm_connector *connector)
-+{
-+	struct intel_connector *intel_connector = to_intel_connector(connector);
-+
-+	DRM_DEBUG_KMS("\n");
-+	intel_panel_fini(&intel_connector->panel);
-+	drm_sysfs_connector_remove(connector);
-+	drm_connector_cleanup(connector);
-+	kfree(connector);
-+}
-+
-+static const struct drm_encoder_funcs intel_dsi_funcs = {
-+	.destroy = intel_encoder_destroy,
-+};
-+
-+static const struct drm_connector_helper_funcs intel_dsi_connector_helper_funcs = {
-+	.get_modes = intel_dsi_get_modes,
-+	.mode_valid = intel_dsi_mode_valid,
-+	.best_encoder = intel_best_encoder,
-+};
-+
-+static const struct drm_connector_funcs intel_dsi_connector_funcs = {
-+	.dpms = intel_connector_dpms,
-+	.detect = intel_dsi_detect,
-+	.destroy = intel_dsi_destroy,
-+	.fill_modes = drm_helper_probe_single_connector_modes,
-+};
-+
-+bool intel_dsi_init(struct drm_device *dev)
-+{
-+	struct intel_dsi *intel_dsi;
-+	struct intel_encoder *intel_encoder;
-+	struct drm_encoder *encoder;
-+	struct intel_connector *intel_connector;
-+	struct drm_connector *connector;
-+	struct drm_display_mode *fixed_mode = NULL;
-+	const struct intel_dsi_device *dsi;
-+	unsigned int i;
-+
-+	DRM_DEBUG_KMS("\n");
-+
-+	intel_dsi = kzalloc(sizeof(*intel_dsi), GFP_KERNEL);
-+	if (!intel_dsi)
-+		return false;
-+
-+	intel_connector = kzalloc(sizeof(*intel_connector), GFP_KERNEL);
-+	if (!intel_connector) {
-+		kfree(intel_dsi);
-+		return false;
-+	}
-+
-+	intel_encoder = &intel_dsi->base;
-+	encoder = &intel_encoder->base;
-+	intel_dsi->attached_connector = intel_connector;
-+
-+	connector = &intel_connector->base;
-+
-+	drm_encoder_init(dev, encoder, &intel_dsi_funcs, DRM_MODE_ENCODER_DSI);
-+
-+	/* XXX: very likely not all of these are needed */
-+	intel_encoder->hot_plug = intel_dsi_hot_plug;
-+	intel_encoder->compute_config = intel_dsi_compute_config;
-+	intel_encoder->pre_pll_enable = intel_dsi_pre_pll_enable;
-+	intel_encoder->pre_enable = intel_dsi_pre_enable;
-+	intel_encoder->enable = intel_dsi_enable;
-+	intel_encoder->mode_set = intel_dsi_mode_set;
-+	intel_encoder->disable = intel_dsi_disable;
-+	intel_encoder->post_disable = intel_dsi_post_disable;
-+	intel_encoder->get_hw_state = intel_dsi_get_hw_state;
-+	intel_encoder->get_config = intel_dsi_get_config;
-+
-+	intel_connector->get_hw_state = intel_connector_get_hw_state;
-+
-+	for (i = 0; i < ARRAY_SIZE(intel_dsi_devices); i++) {
-+		dsi = &intel_dsi_devices[i];
-+		intel_dsi->dev = *dsi;
-+
-+		if (dsi->dev_ops->init(&intel_dsi->dev))
-+			break;
-+	}
-+
-+	if (i == ARRAY_SIZE(intel_dsi_devices)) {
-+		DRM_DEBUG_KMS("no device found\n");
-+		goto err;
-+	}
-+
-+	intel_encoder->type = INTEL_OUTPUT_DSI;
-+	intel_encoder->crtc_mask = (1 << 0); /* XXX */
-+
-+	intel_encoder->cloneable = false;
-+	drm_connector_init(dev, connector, &intel_dsi_connector_funcs,
-+			   DRM_MODE_CONNECTOR_DSI);
-+
-+	drm_connector_helper_add(connector, &intel_dsi_connector_helper_funcs);
-+
-+	connector->display_info.subpixel_order = SubPixelHorizontalRGB; /*XXX*/
-+	connector->interlace_allowed = false;
-+	connector->doublescan_allowed = false;
-+
-+	intel_connector_attach_encoder(intel_connector, intel_encoder);
-+
-+	drm_sysfs_connector_add(connector);
-+
-+	fixed_mode = dsi->dev_ops->get_modes(&intel_dsi->dev);
-+	if (!fixed_mode) {
-+		DRM_DEBUG_KMS("no fixed mode\n");
-+		goto err;
-+	}
-+
-+	fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
-+	intel_panel_init(&intel_connector->panel, fixed_mode);
-+
-+	return true;
-+
-+err:
-+	drm_encoder_cleanup(&intel_encoder->base);
-+	kfree(intel_dsi);
-+	kfree(intel_connector);
-+
-+	return false;
-+}
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0777-drm-i915-add-VLV-DSI-PLL-Calculations.patch b/patches.baytrail/0777-drm-i915-add-VLV-DSI-PLL-Calculations.patch
deleted file mode 100644
index 2b374debd5ccb..0000000000000
--- a/patches.baytrail/0777-drm-i915-add-VLV-DSI-PLL-Calculations.patch
+++ /dev/null
@@ -1,463 +0,0 @@
-From 84bdf1674c7cd6f2c240e94f369e5ca4cdb14c4c Mon Sep 17 00:00:00 2001
-From: ymohanma <yogesh.mohan.marimuthu@intel.com>
-Date: Tue, 27 Aug 2013 23:40:56 +0300
-Subject: drm/i915: add VLV DSI PLL Calculations
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-v2:
- - Grab dpio_lock mutex in vlv_enable_dsi_pll().
- - Add and call vlv_disable_dsi_pll().
-
-v3: Mostly based on Ville's review comments.
- - Only pipe A has DSI PLL lock bit.
- - Add more of CCK REG bit definitions for DSI PLL.
- - Make tables static.
- - Move clock gating out of the clock calculation functions.
- - DSI PLL LDO power gating.
- - Put alternative MNP from table calc behind #ifdef.
-
-v4: s/CKK/CLK/ in the CCK REG bit definitions (Ville).
-
-Signed-off-by: ymohanma <yogesh.mohan.marimuthu@intel.com>
-Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com>
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit be4fc046bed35f7a50c8d5751abf555933d864ae)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/Makefile        |   1 +
- drivers/gpu/drm/i915/i915_reg.h      |  32 ++++
- drivers/gpu/drm/i915/intel_dsi.c     |   7 +
- drivers/gpu/drm/i915/intel_dsi.h     |   3 +
- drivers/gpu/drm/i915/intel_dsi_pll.c | 317 +++++++++++++++++++++++++++++++++++
- 5 files changed, 360 insertions(+)
- create mode 100644 drivers/gpu/drm/i915/intel_dsi_pll.c
-
-diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
-index 5864c5ba44b7..65e60d26891b 100644
---- a/drivers/gpu/drm/i915/Makefile
-+++ b/drivers/gpu/drm/i915/Makefile
-@@ -23,6 +23,7 @@ i915-y := i915_drv.o i915_dma.o i915_irq.o \
- 	  intel_lvds.o \
- 	  intel_dsi.o \
- 	  intel_dsi_cmd.o \
-+	  intel_dsi_pll.o \
- 	  intel_bios.o \
- 	  intel_ddi.o \
- 	  intel_dp.o \
-diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
-index b26cf9b5b1e4..f626a16a14fa 100644
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -376,6 +376,38 @@
- #define   FB_FMAX_VMIN_FREQ_LO_SHIFT		27
- #define   FB_FMAX_VMIN_FREQ_LO_MASK		0xf8000000
- 
-+/* vlv2 north clock has */
-+#define CCK_REG_DSI_PLL_FUSE			0x44
-+#define CCK_REG_DSI_PLL_CONTROL			0x48
-+#define  DSI_PLL_VCO_EN				(1 << 31)
-+#define  DSI_PLL_LDO_GATE			(1 << 30)
-+#define  DSI_PLL_P1_POST_DIV_SHIFT		17
-+#define  DSI_PLL_P1_POST_DIV_MASK		(0x1ff << 17)
-+#define  DSI_PLL_P2_MUX_DSI0_DIV2		(1 << 13)
-+#define  DSI_PLL_P3_MUX_DSI1_DIV2		(1 << 12)
-+#define  DSI_PLL_MUX_MASK			(3 << 9)
-+#define  DSI_PLL_MUX_DSI0_DSIPLL		(0 << 10)
-+#define  DSI_PLL_MUX_DSI0_CCK			(1 << 10)
-+#define  DSI_PLL_MUX_DSI1_DSIPLL		(0 << 9)
-+#define  DSI_PLL_MUX_DSI1_CCK			(1 << 9)
-+#define  DSI_PLL_CLK_GATE_MASK			(0xf << 5)
-+#define  DSI_PLL_CLK_GATE_DSI0_DSIPLL		(1 << 8)
-+#define  DSI_PLL_CLK_GATE_DSI1_DSIPLL		(1 << 7)
-+#define  DSI_PLL_CLK_GATE_DSI0_CCK		(1 << 6)
-+#define  DSI_PLL_CLK_GATE_DSI1_CCK		(1 << 5)
-+#define  DSI_PLL_LOCK				(1 << 0)
-+#define CCK_REG_DSI_PLL_DIVIDER			0x4c
-+#define  DSI_PLL_LFSR				(1 << 31)
-+#define  DSI_PLL_FRACTION_EN			(1 << 30)
-+#define  DSI_PLL_FRAC_COUNTER_SHIFT		27
-+#define  DSI_PLL_FRAC_COUNTER_MASK		(7 << 27)
-+#define  DSI_PLL_USYNC_CNT_SHIFT		18
-+#define  DSI_PLL_USYNC_CNT_MASK			(0x1ff << 18)
-+#define  DSI_PLL_N1_DIV_SHIFT			16
-+#define  DSI_PLL_N1_DIV_MASK			(3 << 16)
-+#define  DSI_PLL_M1_DIV_SHIFT			0
-+#define  DSI_PLL_M1_DIV_MASK			(0x1ff << 0)
-+
- /*
-  * DPIO - a special bus for various display related registers to hide behind
-  *
-diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
-index 0dfb28fba47e..263c8d2603b6 100644
---- a/drivers/gpu/drm/i915/intel_dsi.c
-+++ b/drivers/gpu/drm/i915/intel_dsi.c
-@@ -83,6 +83,8 @@ static bool intel_dsi_compute_config(struct intel_encoder *encoder,
- static void intel_dsi_pre_pll_enable(struct intel_encoder *encoder)
- {
- 	DRM_DEBUG_KMS("\n");
-+
-+	vlv_enable_dsi_pll(encoder);
- }
- 
- static void intel_dsi_pre_enable(struct intel_encoder *encoder)
-@@ -167,6 +169,8 @@ static void intel_dsi_disable(struct intel_encoder *encoder)
- static void intel_dsi_post_disable(struct intel_encoder *encoder)
- {
- 	DRM_DEBUG_KMS("\n");
-+
-+	vlv_disable_dsi_pll(encoder);
- }
- 
- static bool intel_dsi_get_hw_state(struct intel_encoder *encoder,
-@@ -303,6 +307,9 @@ static void intel_dsi_mode_set(struct intel_encoder *intel_encoder)
- 
- 	DRM_DEBUG_KMS("pipe %d\n", pipe);
- 
-+	/* Update the DSI PLL */
-+	vlv_enable_dsi_pll(intel_encoder);
-+
- 	/* escape clock divider, 20MHz, shared for A and C. device ready must be
- 	 * off when doing this! txclkesc? */
- 	tmp = I915_READ(MIPI_CTRL(0));
-diff --git a/drivers/gpu/drm/i915/intel_dsi.h b/drivers/gpu/drm/i915/intel_dsi.h
-index f308269cd87c..c7765f33d524 100644
---- a/drivers/gpu/drm/i915/intel_dsi.h
-+++ b/drivers/gpu/drm/i915/intel_dsi.h
-@@ -96,4 +96,7 @@ static inline struct intel_dsi *enc_to_intel_dsi(struct drm_encoder *encoder)
- 	return container_of(encoder, struct intel_dsi, base.base);
- }
- 
-+extern void vlv_enable_dsi_pll(struct intel_encoder *encoder);
-+extern void vlv_disable_dsi_pll(struct intel_encoder *encoder);
-+
- #endif /* _INTEL_DSI_H */
-diff --git a/drivers/gpu/drm/i915/intel_dsi_pll.c b/drivers/gpu/drm/i915/intel_dsi_pll.c
-new file mode 100644
-index 000000000000..582f626a99f6
---- /dev/null
-+++ b/drivers/gpu/drm/i915/intel_dsi_pll.c
-@@ -0,0 +1,317 @@
-+/*
-+ * Copyright © 2013 Intel Corporation
-+ *
-+ * Permission is hereby granted, free of charge, to any person obtaining a
-+ * copy of this software and associated documentation files (the "Software"),
-+ * to deal in the Software without restriction, including without limitation
-+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
-+ * and/or sell copies of the Software, and to permit persons to whom the
-+ * Software is furnished to do so, subject to the following conditions:
-+ *
-+ * The above copyright notice and this permission notice (including the next
-+ * paragraph) shall be included in all copies or substantial portions of the
-+ * Software.
-+ *
-+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
-+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
-+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
-+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
-+ * DEALINGS IN THE SOFTWARE.
-+ *
-+ * Authors:
-+ *	Shobhit Kumar <shobhit.kumar@intel.com>
-+ *	Yogesh Mohan Marimuthu <yogesh.mohan.marimuthu@intel.com>
-+ */
-+
-+#include <linux/kernel.h>
-+#include "intel_drv.h"
-+#include "i915_drv.h"
-+#include "intel_dsi.h"
-+
-+#define DSI_HSS_PACKET_SIZE		4
-+#define DSI_HSE_PACKET_SIZE		4
-+#define DSI_HSA_PACKET_EXTRA_SIZE	6
-+#define DSI_HBP_PACKET_EXTRA_SIZE	6
-+#define DSI_HACTIVE_PACKET_EXTRA_SIZE	6
-+#define DSI_HFP_PACKET_EXTRA_SIZE	6
-+#define DSI_EOTP_PACKET_SIZE		4
-+
-+struct dsi_mnp {
-+	u32 dsi_pll_ctrl;
-+	u32 dsi_pll_div;
-+};
-+
-+static const u32 lfsr_converts[] = {
-+	426, 469, 234, 373, 442, 221, 110, 311, 411,		/* 62 - 70 */
-+	461, 486, 243, 377, 188, 350, 175, 343, 427, 213,	/* 71 - 80 */
-+	106, 53, 282, 397, 354, 227, 113, 56, 284, 142,		/* 81 - 90 */
-+	71, 35							/* 91 - 92 */
-+};
-+
-+static u32 dsi_rr_formula(struct drm_display_mode *mode,
-+			  int pixel_format, int video_mode_format,
-+			  int lane_count, bool eotp)
-+{
-+	u32 bpp;
-+	u32 hactive, vactive, hfp, hsync, hbp, vfp, vsync, vbp;
-+	u32 hsync_bytes, hbp_bytes, hactive_bytes, hfp_bytes;
-+	u32 bytes_per_line, bytes_per_frame;
-+	u32 num_frames;
-+	u32 bytes_per_x_frames, bytes_per_x_frames_x_lanes;
-+	u32 dsi_bit_clock_hz;
-+	u32 dsi_clk;
-+
-+	switch (pixel_format) {
-+	default:
-+	case VID_MODE_FORMAT_RGB888:
-+	case VID_MODE_FORMAT_RGB666_LOOSE:
-+		bpp = 24;
-+		break;
-+	case VID_MODE_FORMAT_RGB666:
-+		bpp = 18;
-+		break;
-+	case VID_MODE_FORMAT_RGB565:
-+		bpp = 16;
-+		break;
-+	}
-+
-+	hactive = mode->hdisplay;
-+	vactive = mode->vdisplay;
-+	hfp = mode->hsync_start - mode->hdisplay;
-+	hsync = mode->hsync_end - mode->hsync_start;
-+	hbp = mode->htotal - mode->hsync_end;
-+
-+	vfp = mode->vsync_start - mode->vdisplay;
-+	vsync = mode->vsync_end - mode->vsync_start;
-+	vbp = mode->vtotal - mode->vsync_end;
-+
-+	hsync_bytes = DIV_ROUND_UP(hsync * bpp, 8);
-+	hbp_bytes = DIV_ROUND_UP(hbp * bpp, 8);
-+	hactive_bytes = DIV_ROUND_UP(hactive * bpp, 8);
-+	hfp_bytes = DIV_ROUND_UP(hfp * bpp, 8);
-+
-+	bytes_per_line = DSI_HSS_PACKET_SIZE + hsync_bytes +
-+		DSI_HSA_PACKET_EXTRA_SIZE + DSI_HSE_PACKET_SIZE +
-+		hbp_bytes + DSI_HBP_PACKET_EXTRA_SIZE +
-+		hactive_bytes + DSI_HACTIVE_PACKET_EXTRA_SIZE +
-+		hfp_bytes + DSI_HFP_PACKET_EXTRA_SIZE;
-+
-+	/*
-+	 * XXX: Need to accurately calculate LP to HS transition timeout and add
-+	 * it to bytes_per_line/bytes_per_frame.
-+	 */
-+
-+	if (eotp && video_mode_format == VIDEO_MODE_BURST)
-+		bytes_per_line += DSI_EOTP_PACKET_SIZE;
-+
-+	bytes_per_frame = vsync * bytes_per_line + vbp * bytes_per_line +
-+		vactive * bytes_per_line + vfp * bytes_per_line;
-+
-+	if (eotp &&
-+	    (video_mode_format == VIDEO_MODE_NON_BURST_WITH_SYNC_PULSE ||
-+	     video_mode_format == VIDEO_MODE_NON_BURST_WITH_SYNC_EVENTS))
-+		bytes_per_frame += DSI_EOTP_PACKET_SIZE;
-+
-+	num_frames = drm_mode_vrefresh(mode);
-+	bytes_per_x_frames = num_frames * bytes_per_frame;
-+
-+	bytes_per_x_frames_x_lanes = bytes_per_x_frames / lane_count;
-+
-+	/* the dsi clock is divided by 2 in the hardware to get dsi ddr clock */
-+	dsi_bit_clock_hz = bytes_per_x_frames_x_lanes * 8;
-+	dsi_clk = dsi_bit_clock_hz / (1000 * 1000);
-+
-+	if (eotp && video_mode_format == VIDEO_MODE_BURST)
-+		dsi_clk *= 2;
-+
-+	return dsi_clk;
-+}
-+
-+#ifdef MNP_FROM_TABLE
-+
-+struct dsi_clock_table {
-+	u32 freq;
-+	u8 m;
-+	u8 p;
-+};
-+
-+static const struct dsi_clock_table dsi_clk_tbl[] = {
-+	{300, 72, 6}, {313, 75, 6}, {323, 78, 6}, {333, 80, 6},
-+	{343, 82, 6}, {353, 85, 6}, {363, 87, 6}, {373, 90, 6},
-+	{383, 92, 6}, {390, 78, 5}, {393, 79, 5}, {400, 80, 5},
-+	{401, 80, 5}, {402, 80, 5}, {403, 81, 5}, {404, 81, 5},
-+	{405, 81, 5}, {406, 81, 5}, {407, 81, 5}, {408, 82, 5},
-+	{409, 82, 5}, {410, 82, 5}, {411, 82, 5}, {412, 82, 5},
-+	{413, 83, 5}, {414, 83, 5}, {415, 83, 5}, {416, 83, 5},
-+	{417, 83, 5}, {418, 84, 5}, {419, 84, 5}, {420, 84, 5},
-+	{430, 86, 5}, {440, 88, 5}, {450, 90, 5}, {460, 92, 5},
-+	{470, 75, 4}, {480, 77, 4}, {490, 78, 4}, {500, 80, 4},
-+	{510, 82, 4}, {520, 83, 4}, {530, 85, 4}, {540, 86, 4},
-+	{550, 88, 4}, {560, 90, 4}, {570, 91, 4}, {580, 70, 3},
-+	{590, 71, 3}, {600, 72, 3}, {610, 73, 3}, {620, 74, 3},
-+	{630, 76, 3}, {640, 77, 3}, {650, 78, 3}, {660, 79, 3},
-+	{670, 80, 3}, {680, 82, 3}, {690, 83, 3}, {700, 84, 3},
-+	{710, 85, 3}, {720, 86, 3}, {730, 88, 3}, {740, 89, 3},
-+	{750, 90, 3}, {760, 91, 3}, {770, 92, 3}, {780, 62, 2},
-+	{790, 63, 2}, {800, 64, 2}, {880, 70, 2}, {900, 72, 2},
-+	{1000, 80, 2},		/* dsi clock frequency in Mhz*/
-+};
-+
-+static int dsi_calc_mnp(u32 dsi_clk, struct dsi_mnp *dsi_mnp)
-+{
-+	unsigned int i;
-+	u8 m;
-+	u8 n;
-+	u8 p;
-+	u32 m_seed;
-+
-+	if (dsi_clk < 300 || dsi_clk > 1000)
-+		return -ECHRNG;
-+
-+	for (i = 0; i <= ARRAY_SIZE(dsi_clk_tbl); i++) {
-+		if (dsi_clk_tbl[i].freq > dsi_clk)
-+			break;
-+	}
-+
-+	m = dsi_clk_tbl[i].m;
-+	p = dsi_clk_tbl[i].p;
-+	m_seed = lfsr_converts[m - 62];
-+	n = 1;
-+	dsi_mnp->dsi_pll_ctrl = 1 << (DSI_PLL_P1_POST_DIV_SHIFT + p - 2);
-+	dsi_mnp->dsi_pll_div = (n - 1) << DSI_PLL_N1_DIV_SHIFT |
-+		m_seed << DSI_PLL_M1_DIV_SHIFT;
-+
-+	return 0;
-+}
-+
-+#else
-+
-+static int dsi_calc_mnp(u32 dsi_clk, struct dsi_mnp *dsi_mnp)
-+{
-+	u32 m, n, p;
-+	u32 ref_clk;
-+	u32 error;
-+	u32 tmp_error;
-+	u32 target_dsi_clk;
-+	u32 calc_dsi_clk;
-+	u32 calc_m;
-+	u32 calc_p;
-+	u32 m_seed;
-+
-+	if (dsi_clk < 300 || dsi_clk > 1150) {
-+		DRM_ERROR("DSI CLK Out of Range\n");
-+		return -ECHRNG;
-+	}
-+
-+	ref_clk = 25000;
-+	target_dsi_clk = dsi_clk * 1000;
-+	error = 0xFFFFFFFF;
-+	calc_m = 0;
-+	calc_p = 0;
-+
-+	for (m = 62; m <= 92; m++) {
-+		for (p = 2; p <= 6; p++) {
-+
-+			calc_dsi_clk = (m * ref_clk) / p;
-+			if (calc_dsi_clk >= target_dsi_clk) {
-+				tmp_error = calc_dsi_clk - target_dsi_clk;
-+				if (tmp_error < error) {
-+					error = tmp_error;
-+					calc_m = m;
-+					calc_p = p;
-+				}
-+			}
-+		}
-+	}
-+
-+	m_seed = lfsr_converts[calc_m - 62];
-+	n = 1;
-+	dsi_mnp->dsi_pll_ctrl = 1 << (DSI_PLL_P1_POST_DIV_SHIFT + calc_p - 2);
-+	dsi_mnp->dsi_pll_div = (n - 1) << DSI_PLL_N1_DIV_SHIFT |
-+		m_seed << DSI_PLL_M1_DIV_SHIFT;
-+
-+	return 0;
-+}
-+
-+#endif
-+
-+/*
-+ * XXX: The muxing and gating is hard coded for now. Need to add support for
-+ * sharing PLLs with two DSI outputs.
-+ */
-+static void vlv_configure_dsi_pll(struct intel_encoder *encoder)
-+{
-+	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
-+	struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
-+	struct drm_display_mode *mode = &intel_crtc->config.requested_mode;
-+	struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
-+	int ret;
-+	struct dsi_mnp dsi_mnp;
-+	u32 dsi_clk;
-+
-+	dsi_clk = dsi_rr_formula(mode, intel_dsi->pixel_format,
-+				 intel_dsi->video_mode_format,
-+				 intel_dsi->lane_count, !intel_dsi->eot_disable);
-+
-+	ret = dsi_calc_mnp(dsi_clk, &dsi_mnp);
-+	if (ret) {
-+		DRM_DEBUG_KMS("dsi_calc_mnp failed\n");
-+		return;
-+	}
-+
-+	dsi_mnp.dsi_pll_ctrl |= DSI_PLL_CLK_GATE_DSI0_DSIPLL;
-+
-+	DRM_DEBUG_KMS("dsi pll div %08x, ctrl %08x\n",
-+		      dsi_mnp.dsi_pll_div, dsi_mnp.dsi_pll_ctrl);
-+
-+	vlv_cck_write(dev_priv, CCK_REG_DSI_PLL_CONTROL, 0);
-+	vlv_cck_write(dev_priv, CCK_REG_DSI_PLL_DIVIDER, dsi_mnp.dsi_pll_div);
-+	vlv_cck_write(dev_priv, CCK_REG_DSI_PLL_CONTROL, dsi_mnp.dsi_pll_ctrl);
-+}
-+
-+void vlv_enable_dsi_pll(struct intel_encoder *encoder)
-+{
-+	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
-+	u32 tmp;
-+
-+	DRM_DEBUG_KMS("\n");
-+
-+	mutex_lock(&dev_priv->dpio_lock);
-+
-+	vlv_configure_dsi_pll(encoder);
-+
-+	/* wait at least 0.5 us after ungating before enabling VCO */
-+	usleep_range(1, 10);
-+
-+	tmp = vlv_cck_read(dev_priv, CCK_REG_DSI_PLL_CONTROL);
-+	tmp |= DSI_PLL_VCO_EN;
-+	vlv_cck_write(dev_priv, CCK_REG_DSI_PLL_CONTROL, tmp);
-+
-+	mutex_unlock(&dev_priv->dpio_lock);
-+
-+	if (wait_for(I915_READ(PIPECONF(PIPE_A)) & PIPECONF_DSI_PLL_LOCKED, 20)) {
-+		DRM_ERROR("DSI PLL lock failed\n");
-+		return;
-+	}
-+
-+	DRM_DEBUG_KMS("DSI PLL locked\n");
-+}
-+
-+void vlv_disable_dsi_pll(struct intel_encoder *encoder)
-+{
-+	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
-+	u32 tmp;
-+
-+	DRM_DEBUG_KMS("\n");
-+
-+	mutex_lock(&dev_priv->dpio_lock);
-+
-+	tmp = vlv_cck_read(dev_priv, CCK_REG_DSI_PLL_CONTROL);
-+	tmp &= ~DSI_PLL_VCO_EN;
-+	tmp |= DSI_PLL_LDO_GATE;
-+	vlv_cck_write(dev_priv, CCK_REG_DSI_PLL_CONTROL, tmp);
-+
-+	mutex_unlock(&dev_priv->dpio_lock);
-+}
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0778-drm-i915-fix-PLL-assertions-for-DSI-PLL.patch b/patches.baytrail/0778-drm-i915-fix-PLL-assertions-for-DSI-PLL.patch
deleted file mode 100644
index 73ca59ffd9182..0000000000000
--- a/patches.baytrail/0778-drm-i915-fix-PLL-assertions-for-DSI-PLL.patch
+++ /dev/null
@@ -1,143 +0,0 @@
-From e6109362beeedc21a2711ca877e1d05b3e643097 Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Tue, 27 Aug 2013 15:12:22 +0300
-Subject: drm/i915: fix PLL assertions for DSI PLL
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-For DSI, we need to be asserting DSI PLL, not DPLL.
-
-This is a somewhat stopgap implementation. It's slightly ugly to have to
-pass the dsi parameter to intel_enable_pipe().
-
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 23538ef193038d204b9ed0ef488fb3ba8e0066c2)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 44 +++++++++++++++++++++++++++++-------
- 1 file changed, 36 insertions(+), 8 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 403580f53764..4de2f8114ce0 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -929,6 +929,24 @@ void assert_pll(struct drm_i915_private *dev_priv,
- 	     state_string(state), state_string(cur_state));
- }
- 
-+/* XXX: the dsi pll is shared between MIPI DSI ports */
-+static void assert_dsi_pll(struct drm_i915_private *dev_priv, bool state)
-+{
-+	u32 val;
-+	bool cur_state;
-+
-+	mutex_lock(&dev_priv->dpio_lock);
-+	val = vlv_cck_read(dev_priv, CCK_REG_DSI_PLL_CONTROL);
-+	mutex_unlock(&dev_priv->dpio_lock);
-+
-+	cur_state = val & DSI_PLL_VCO_EN;
-+	WARN(cur_state != state,
-+	     "DSI PLL state assertion failure (expected %s, current %s)\n",
-+	     state_string(state), state_string(cur_state));
-+}
-+#define assert_dsi_pll_enabled(d) assert_dsi_pll(d, true)
-+#define assert_dsi_pll_disabled(d) assert_dsi_pll(d, false)
-+
- struct intel_shared_dpll *
- intel_crtc_to_shared_dpll(struct intel_crtc *crtc)
- {
-@@ -1661,7 +1679,7 @@ static void lpt_disable_pch_transcoder(struct drm_i915_private *dev_priv)
-  * returning.
-  */
- static void intel_enable_pipe(struct drm_i915_private *dev_priv, enum pipe pipe,
--			      bool pch_port)
-+			      bool pch_port, bool dsi)
- {
- 	enum transcoder cpu_transcoder = intel_pipe_to_cpu_transcoder(dev_priv,
- 								      pipe);
-@@ -1683,7 +1701,10 @@ static void intel_enable_pipe(struct drm_i915_private *dev_priv, enum pipe pipe,
- 	 * need the check.
- 	 */
- 	if (!HAS_PCH_SPLIT(dev_priv->dev))
--		assert_pll_enabled(dev_priv, pipe);
-+		if (dsi)
-+			assert_dsi_pll_enabled(dev_priv);
-+		else
-+			assert_pll_enabled(dev_priv, pipe);
- 	else {
- 		if (pch_port) {
- 			/* if driving the PCH, we need FDI enabled */
-@@ -3284,7 +3305,7 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc)
- 	intel_crtc_load_lut(crtc);
- 
- 	intel_enable_pipe(dev_priv, pipe,
--			  intel_crtc->config.has_pch_encoder);
-+			  intel_crtc->config.has_pch_encoder, false);
- 	intel_enable_plane(dev_priv, plane, pipe);
- 	intel_enable_planes(crtc);
- 	intel_crtc_update_cursor(crtc, true);
-@@ -3392,7 +3413,7 @@ static void haswell_crtc_enable(struct drm_crtc *crtc)
- 	intel_ddi_enable_transcoder_func(crtc);
- 
- 	intel_enable_pipe(dev_priv, pipe,
--			  intel_crtc->config.has_pch_encoder);
-+			  intel_crtc->config.has_pch_encoder, false);
- 	intel_enable_plane(dev_priv, plane, pipe);
- 	intel_enable_planes(crtc);
- 	intel_crtc_update_cursor(crtc, true);
-@@ -3650,6 +3671,7 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc)
- 	struct intel_encoder *encoder;
- 	int pipe = intel_crtc->pipe;
- 	int plane = intel_crtc->plane;
-+	bool is_dsi;
- 
- 	WARN_ON(!crtc->enabled);
- 
-@@ -3663,6 +3685,8 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc)
- 		if (encoder->pre_pll_enable)
- 			encoder->pre_pll_enable(encoder);
- 
-+	is_dsi = intel_pipe_has_type(crtc, INTEL_OUTPUT_DSI);
-+
- 	vlv_enable_pll(intel_crtc);
- 
- 	for_each_encoder_on_crtc(dev, crtc, encoder)
-@@ -3673,7 +3697,7 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc)
- 
- 	intel_crtc_load_lut(crtc);
- 
--	intel_enable_pipe(dev_priv, pipe, false);
-+	intel_enable_pipe(dev_priv, pipe, false, is_dsi);
- 	intel_enable_plane(dev_priv, plane, pipe);
- 	intel_enable_planes(crtc);
- 	intel_crtc_update_cursor(crtc, true);
-@@ -3711,7 +3735,7 @@ static void i9xx_crtc_enable(struct drm_crtc *crtc)
- 
- 	intel_crtc_load_lut(crtc);
- 
--	intel_enable_pipe(dev_priv, pipe, false);
-+	intel_enable_pipe(dev_priv, pipe, false, false);
- 	intel_enable_plane(dev_priv, plane, pipe);
- 	intel_enable_planes(crtc);
- 	/* The fixup needs to happen before cursor is enabled */
-@@ -6663,8 +6687,12 @@ void intel_crtc_load_lut(struct drm_crtc *crtc)
- 	if (!crtc->enabled || !intel_crtc->active)
- 		return;
- 
--	if (!HAS_PCH_SPLIT(dev_priv->dev))
--		assert_pll_enabled(dev_priv, pipe);
-+	if (!HAS_PCH_SPLIT(dev_priv->dev)) {
-+		if (intel_pipe_has_type(crtc, INTEL_OUTPUT_DSI))
-+			assert_dsi_pll_enabled(dev_priv);
-+		else
-+			assert_pll_enabled(dev_priv, pipe);
-+	}
- 
- 	/* use legacy palette for Ironlake */
- 	if (HAS_PCH_SPLIT(dev))
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0779-drm-i915-don-t-enable-DPLL-for-DSI.patch b/patches.baytrail/0779-drm-i915-don-t-enable-DPLL-for-DSI.patch
deleted file mode 100644
index 3cd7863da77ac..0000000000000
--- a/patches.baytrail/0779-drm-i915-don-t-enable-DPLL-for-DSI.patch
+++ /dev/null
@@ -1,137 +0,0 @@
-From b132e270c14798976810c9345b3a9e9f722e6a34 Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Tue, 27 Aug 2013 15:12:23 +0300
-Subject: drm/i915: don't enable DPLL for DSI
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-DPLL is not needed for DSI
-
-v2: Rebase due to added DSI PLL assertion patch.
-
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit e9fd1c02aca7a3e00701debaca45ec7bb942050c)
-[dbasehore: Fixed whitespace conflict]
-Signed-off-by: Derek Basehore <dbasehore@chromium.org>
-
-Conflicts:
-	drivers/gpu/drm/i915/intel_display.c
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 50 +++++++++++++++++++++---------------
- 1 file changed, 30 insertions(+), 20 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 4de2f8114ce0..d5ad18356294 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -3687,7 +3687,8 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc)
- 
- 	is_dsi = intel_pipe_has_type(crtc, INTEL_OUTPUT_DSI);
- 
--	vlv_enable_pll(intel_crtc);
-+	if (!is_dsi)
-+		vlv_enable_pll(intel_crtc);
- 
- 	for_each_encoder_on_crtc(dev, crtc, encoder)
- 		if (encoder->pre_enable)
-@@ -3802,7 +3803,8 @@ static void i9xx_crtc_disable(struct drm_crtc *crtc)
- 		if (encoder->post_disable)
- 			encoder->post_disable(encoder);
- 
--	i9xx_disable_pll(dev_priv, pipe);
-+	if (!intel_pipe_has_type(crtc, INTEL_OUTPUT_DSI))
-+		i9xx_disable_pll(dev_priv, pipe);
- 
- 	intel_crtc->active = false;
- 	intel_update_fbc(dev);
-@@ -4870,7 +4872,7 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
- 	intel_clock_t clock, reduced_clock;
- 	u32 dspcntr;
- 	bool ok, has_reduced_clock = false;
--	bool is_lvds = false;
-+	bool is_lvds = false, is_dsi = false;
- 	struct intel_encoder *encoder;
- 	const intel_limit_t *limit;
- 	int ret;
-@@ -4880,6 +4882,9 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
- 		case INTEL_OUTPUT_LVDS:
- 			is_lvds = true;
- 			break;
-+		case INTEL_OUTPUT_DSI:
-+			is_dsi = true;
-+			break;
- 		}
- 
- 		num_connectors++;
-@@ -4887,24 +4892,27 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
- 
- 	refclk = i9xx_get_refclk(crtc, num_connectors);
- 
--	/*
--	 * Returns a set of divisors for the desired target clock with the given
--	 * refclk, or FALSE.  The returned values represent the clock equation:
--	 * reflck * (5 * (m1 + 2) + (m2 + 2)) / (n + 2) / p1 / p2.
--	 */
--	limit = intel_limit(crtc, refclk);
--	ok = dev_priv->display.find_dpll(limit, crtc,
--					 intel_crtc->config.port_clock,
--					 refclk, NULL, &clock);
--	if (!ok && !intel_crtc->config.clock_set) {
--		DRM_ERROR("Couldn't find PLL settings for mode!\n");
--		return -EINVAL;
-+	if (!is_dsi) {
-+		/*
-+		 * Returns a set of divisors for the desired target clock with
-+		 * the given refclk, or FALSE.  The returned values represent
-+		 * the clock equation: reflck * (5 * (m1 + 2) + (m2 + 2)) / (n +
-+		 * 2) / p1 / p2.
-+		 */
-+		limit = intel_limit(crtc, refclk);
-+		ok = dev_priv->display.find_dpll(limit, crtc,
-+						 intel_crtc->config.port_clock,
-+						 refclk, NULL, &clock);
-+		if (!ok && !intel_crtc->config.clock_set) {
-+			DRM_ERROR("Couldn't find PLL settings for mode!\n");
-+			return -EINVAL;
-+		}
- 	}
- 
- 	/* Ensure that the cursor is valid for the new mode before changing... */
- 	intel_crtc_update_cursor(crtc, true);
- 
--	if (is_lvds && dev_priv->lvds_downclock_avail) {
-+	if (!is_dsi && is_lvds && dev_priv->lvds_downclock_avail) {
- 		/*
- 		 * Ensure we match the reduced clock's P to the target clock.
- 		 * If the clocks don't match, we can't switch the display clock
-@@ -4926,16 +4934,18 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
- 		intel_crtc->config.dpll.p2 = clock.p2;
- 	}
- 
--	if (IS_GEN2(dev))
-+	if (IS_GEN2(dev)) {
- 		i8xx_update_pll(intel_crtc,
- 				has_reduced_clock ? &reduced_clock : NULL,
- 				num_connectors);
--	else if (IS_VALLEYVIEW(dev))
--		vlv_update_pll(intel_crtc);
--	else
-+	} else if (IS_VALLEYVIEW(dev)) {
-+		if (!is_dsi)
-+			vlv_update_pll(intel_crtc);
-+	} else {
- 		i9xx_update_pll(intel_crtc,
- 				has_reduced_clock ? &reduced_clock : NULL,
- 				num_connectors);
-+	}
- 
- 	/* Set up the display plane register */
- 	dspcntr = DISPPLANE_GAMMA_ENABLE;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0780-drm-i915-Band-Gap-WA.patch b/patches.baytrail/0780-drm-i915-Band-Gap-WA.patch
deleted file mode 100644
index 24666d3deb763..0000000000000
--- a/patches.baytrail/0780-drm-i915-Band-Gap-WA.patch
+++ /dev/null
@@ -1,89 +0,0 @@
-From 6e84b1679e29d0cf5e80f61370af2d4d506f02ef Mon Sep 17 00:00:00 2001
-From: Shobhit Kumar <shobhit.kumar@intel.com>
-Date: Tue, 27 Aug 2013 15:12:24 +0300
-Subject: drm/i915: Band Gap WA
-
-Note: No one seems to have docs for this, so this patch here is just
-unreviewed black magic :(
-
-Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com>
-Signed-off-by: ymohanma <yogesh.mohan.marimuthu@intel.com>
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-[danvet: Add note about the doc situation.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 4ce8c9a720c566a4ce7b782ddd5df90d66f0ba85)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_dsi.c | 48 ++++++++++++++++++++++++++++++++++++++++
- 1 file changed, 48 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
-index 263c8d2603b6..674fd4989b45 100644
---- a/drivers/gpu/drm/i915/intel_dsi.c
-+++ b/drivers/gpu/drm/i915/intel_dsi.c
-@@ -37,6 +37,51 @@
- static const struct intel_dsi_device intel_dsi_devices[] = {
- };
- 
-+
-+static void vlv_cck_modify(struct drm_i915_private *dev_priv, u32 reg, u32 val,
-+			   u32 mask)
-+{
-+	u32 tmp = vlv_cck_read(dev_priv, reg);
-+	tmp &= ~mask;
-+	tmp |= val;
-+	vlv_cck_write(dev_priv, reg, tmp);
-+}
-+
-+static void band_gap_wa(struct drm_i915_private *dev_priv)
-+{
-+	mutex_lock(&dev_priv->dpio_lock);
-+
-+	/* Enable bandgap fix in GOP driver */
-+	vlv_cck_modify(dev_priv, 0x6D, 0x00010000, 0x00030000);
-+	msleep(20);
-+	vlv_cck_modify(dev_priv, 0x6E, 0x00010000, 0x00030000);
-+	msleep(20);
-+	vlv_cck_modify(dev_priv, 0x6F, 0x00010000, 0x00030000);
-+	msleep(20);
-+	vlv_cck_modify(dev_priv, 0x00, 0x00008000, 0x00008000);
-+	msleep(20);
-+	vlv_cck_modify(dev_priv, 0x00, 0x00000000, 0x00008000);
-+	msleep(20);
-+
-+	/* Turn Display Trunk on */
-+	vlv_cck_modify(dev_priv, 0x6B, 0x00020000, 0x00030000);
-+	msleep(20);
-+
-+	vlv_cck_modify(dev_priv, 0x6C, 0x00020000, 0x00030000);
-+	msleep(20);
-+
-+	vlv_cck_modify(dev_priv, 0x6D, 0x00020000, 0x00030000);
-+	msleep(20);
-+	vlv_cck_modify(dev_priv, 0x6E, 0x00020000, 0x00030000);
-+	msleep(20);
-+	vlv_cck_modify(dev_priv, 0x6F, 0x00020000, 0x00030000);
-+
-+	mutex_unlock(&dev_priv->dpio_lock);
-+
-+	/* Need huge delay, otherwise clock is not stable */
-+	msleep(100);
-+}
-+
- static struct intel_dsi *intel_attached_dsi(struct drm_connector *connector)
- {
- 	return container_of(intel_attached_encoder(connector),
-@@ -310,6 +355,9 @@ static void intel_dsi_mode_set(struct intel_encoder *intel_encoder)
- 	/* Update the DSI PLL */
- 	vlv_enable_dsi_pll(intel_encoder);
- 
-+	/* XXX: Location of the call */
-+	band_gap_wa(dev_priv);
-+
- 	/* escape clock divider, 20MHz, shared for A and C. device ready must be
- 	 * off when doing this! txclkesc? */
- 	tmp = I915_READ(MIPI_CTRL(0));
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0781-drm-i915-Parse-the-MIPI-related-VBT-Block-and-store-.patch b/patches.baytrail/0781-drm-i915-Parse-the-MIPI-related-VBT-Block-and-store-.patch
deleted file mode 100644
index a3b97d78c81c7..0000000000000
--- a/patches.baytrail/0781-drm-i915-Parse-the-MIPI-related-VBT-Block-and-store-.patch
+++ /dev/null
@@ -1,132 +0,0 @@
-From 9f81ba8b1f2cd1be32a3ff69f057041f987a05b6 Mon Sep 17 00:00:00 2001
-From: Shobhit Kumar <shobhit.kumar@intel.com>
-Date: Tue, 27 Aug 2013 15:12:25 +0300
-Subject: drm/i915: Parse the MIPI related VBT Block and store relevant info
-
-Initial parsing of the VBT MIPI block. For now, just store the panel id
-if found.
-
-Note: Again there seems to be no documentation for this piece of lore.
-The doc situation for byt+ is just a bad joke :(
-
-Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com>
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit d17c5443cf445b308a207cf127209f4702791323)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h   |  5 +++++
- drivers/gpu/drm/i915/intel_bios.c | 16 +++++++++++++++
- drivers/gpu/drm/i915/intel_bios.h | 41 +++++++++++++++++++++++++++++++++++++++
- 3 files changed, 62 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index e2628579dcbe..2cf9dabbfe5d 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1065,6 +1065,11 @@ struct intel_vbt_data {
- 	int edp_bpp;
- 	struct edp_power_seq edp_pps;
- 
-+	/* MIPI DSI */
-+	struct {
-+		u16 panel_id;
-+	} dsi;
-+
- 	int crt_ddc_pin;
- 
- 	int child_dev_num;
-diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
-index 53f2bed8bc5f..6668873fb3a8 100644
---- a/drivers/gpu/drm/i915/intel_bios.c
-+++ b/drivers/gpu/drm/i915/intel_bios.c
-@@ -569,6 +569,21 @@ parse_edp(struct drm_i915_private *dev_priv, struct bdb_header *bdb)
- }
- 
- static void
-+parse_mipi(struct drm_i915_private *dev_priv, struct bdb_header *bdb)
-+{
-+	struct bdb_mipi *mipi;
-+
-+	mipi = find_section(bdb, BDB_MIPI);
-+	if (!mipi) {
-+		DRM_DEBUG_KMS("No MIPI BDB found");
-+		return;
-+	}
-+
-+	/* XXX: add more info */
-+	dev_priv->vbt.dsi.panel_id = mipi->panel_id;
-+}
-+
-+static void
- parse_device_mapping(struct drm_i915_private *dev_priv,
- 		       struct bdb_header *bdb)
- {
-@@ -745,6 +760,7 @@ intel_parse_bios(struct drm_device *dev)
- 	parse_device_mapping(dev_priv, bdb);
- 	parse_driver_features(dev_priv, bdb);
- 	parse_edp(dev_priv, bdb);
-+	parse_mipi(dev_priv, bdb);
- 
- 	if (bios)
- 		pci_unmap_rom(pdev, bios);
-diff --git a/drivers/gpu/drm/i915/intel_bios.h b/drivers/gpu/drm/i915/intel_bios.h
-index e088d6f0956a..6e9250eb9c2c 100644
---- a/drivers/gpu/drm/i915/intel_bios.h
-+++ b/drivers/gpu/drm/i915/intel_bios.h
-@@ -104,6 +104,7 @@ struct vbios_data {
- #define BDB_LVDS_LFP_DATA	 42
- #define BDB_LVDS_BACKLIGHT	 43
- #define BDB_LVDS_POWER		 44
-+#define BDB_MIPI		 50
- #define BDB_SKIP		254 /* VBIOS private block, ignore */
- 
- struct bdb_general_features {
-@@ -618,4 +619,44 @@ int intel_parse_bios(struct drm_device *dev);
- #define		PORT_IDPC	8
- #define		PORT_IDPD	9
- 
-+/* MIPI DSI panel info */
-+struct bdb_mipi {
-+	u16 panel_id;
-+	u16 bridge_revision;
-+
-+	/* General params */
-+	u32 dithering:1;
-+	u32 bpp_pixel_format:1;
-+	u32 rsvd1:1;
-+	u32 dphy_valid:1;
-+	u32 resvd2:28;
-+
-+	u16 port_info;
-+	u16 rsvd3:2;
-+	u16 num_lanes:2;
-+	u16 rsvd4:12;
-+
-+	/* DSI config */
-+	u16 virt_ch_num:2;
-+	u16 vtm:2;
-+	u16 rsvd5:12;
-+
-+	u32 dsi_clock;
-+	u32 bridge_ref_clk;
-+	u16 rsvd_pwr;
-+
-+	/* Dphy Params */
-+	u32 prepare_cnt:5;
-+	u32 rsvd6:3;
-+	u32 clk_zero_cnt:8;
-+	u32 trail_cnt:5;
-+	u32 rsvd7:3;
-+	u32 exit_zero_cnt:6;
-+	u32 rsvd8:2;
-+
-+	u32 hl_switch_cnt;
-+	u32 lp_byte_clk;
-+	u32 clk_lane_switch_cnt;
-+} __attribute__((packed));
-+
- #endif /* _I830_BIOS_H_ */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0782-drm-i915-initialize-DSI-output-on-VLV.patch b/patches.baytrail/0782-drm-i915-initialize-DSI-output-on-VLV.patch
deleted file mode 100644
index f0e75baefca23..0000000000000
--- a/patches.baytrail/0782-drm-i915-initialize-DSI-output-on-VLV.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From 06f82e268a748e7c31c2d34a813e326b10b5c95c Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Tue, 27 Aug 2013 15:12:26 +0300
-Subject: drm/i915: initialize DSI output on VLV
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 3cfca973a442460ed64265c110e10100439cb457)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index d5ad18356294..3658a7ae7c41 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -9595,6 +9595,8 @@ static void intel_setup_outputs(struct drm_device *dev)
- 			if (I915_READ(VLV_DISPLAY_BASE + DP_B) & DP_DETECTED)
- 				intel_dp_init(dev, VLV_DISPLAY_BASE + DP_B, PORT_B);
- 		}
-+
-+		intel_dsi_init(dev);
- 	} else if (SUPPORTS_DIGITAL_OUTPUTS(dev)) {
- 		bool found = false;
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0783-drm-i915-dsi-s-size_t-int.patch b/patches.baytrail/0783-drm-i915-dsi-s-size_t-int.patch
deleted file mode 100644
index be492a91de2d5..0000000000000
--- a/patches.baytrail/0783-drm-i915-dsi-s-size_t-int.patch
+++ /dev/null
@@ -1,175 +0,0 @@
-From 5c6489dd28737716cc53a39526970621346d9f31 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Wed, 28 Aug 2013 10:38:49 +0200
-Subject: drm/i915/dsi: s/size_t/int/
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-This fixes a printf warn from gcc:
-
-drivers/gpu/drm/i915/intel_dsi_cmd.c: In function ‘dsi_vc_send_long’:
-drivers/gpu/drm/i915/intel_dsi_cmd.c:181:2: warning: format ‘%x’ expects argument of type ‘unsigned int’, but argument 7 has type ‘size_t’ [-Wformat=]
-
-Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 3e33a8408117088c873ebc4b3ca0e1e440c0b697)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_dsi_cmd.c | 22 +++++++++++-----------
- drivers/gpu/drm/i915/intel_dsi_cmd.h | 14 +++++++-------
- 2 files changed, 18 insertions(+), 18 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_dsi_cmd.c b/drivers/gpu/drm/i915/intel_dsi_cmd.c
-index 86577a0fc620..7c40f981d2c7 100644
---- a/drivers/gpu/drm/i915/intel_dsi_cmd.c
-+++ b/drivers/gpu/drm/i915/intel_dsi_cmd.c
-@@ -167,7 +167,7 @@ static int dsi_vc_send_short(struct intel_dsi *intel_dsi, int channel,
- }
- 
- static int dsi_vc_send_long(struct intel_dsi *intel_dsi, int channel,
--			    u8 data_type, const u8 *data, size_t len)
-+			    u8 data_type, const u8 *data, int len)
- {
- 	struct drm_encoder *encoder = &intel_dsi->base.base;
- 	struct drm_device *dev = encoder->dev;
-@@ -175,7 +175,7 @@ static int dsi_vc_send_long(struct intel_dsi *intel_dsi, int channel,
- 	struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
- 	enum pipe pipe = intel_crtc->pipe;
- 	u32 data_reg;
--	size_t i, j, n;
-+	int i, j, n;
- 	u32 mask;
- 
- 	DRM_DEBUG_KMS("channel %d, data_type %d, len %04x\n",
-@@ -194,7 +194,7 @@ static int dsi_vc_send_long(struct intel_dsi *intel_dsi, int channel,
- 
- 	for (i = 0; i < len; i += n) {
- 		u32 val = 0;
--		n = min_t(size_t, len - i, 4);
-+		n = min_t(int, len - i, 4);
- 
- 		for (j = 0; j < n; j++)
- 			val |= *data++ << 8 * j;
-@@ -208,7 +208,7 @@ static int dsi_vc_send_long(struct intel_dsi *intel_dsi, int channel,
- }
- 
- static int dsi_vc_write_common(struct intel_dsi *intel_dsi,
--			       int channel, const u8 *data, size_t len,
-+			       int channel, const u8 *data, int len,
- 			       enum dsi_type type)
- {
- 	int ret;
-@@ -240,13 +240,13 @@ static int dsi_vc_write_common(struct intel_dsi *intel_dsi,
- }
- 
- int dsi_vc_dcs_write(struct intel_dsi *intel_dsi, int channel,
--		     const u8 *data, size_t len)
-+		     const u8 *data, int len)
- {
- 	return dsi_vc_write_common(intel_dsi, channel, data, len, DSI_DCS);
- }
- 
- int dsi_vc_generic_write(struct intel_dsi *intel_dsi, int channel,
--			 const u8 *data, size_t len)
-+			 const u8 *data, int len)
- {
- 	return dsi_vc_write_common(intel_dsi, channel, data, len, DSI_GENERIC);
- }
-@@ -260,7 +260,7 @@ static int dsi_vc_dcs_send_read_request(struct intel_dsi *intel_dsi,
- 
- static int dsi_vc_generic_send_read_request(struct intel_dsi *intel_dsi,
- 					    int channel, u8 *reqdata,
--					    size_t reqlen)
-+					    int reqlen)
- {
- 	u16 data;
- 	u8 data_type;
-@@ -286,14 +286,14 @@ static int dsi_vc_generic_send_read_request(struct intel_dsi *intel_dsi,
- }
- 
- static int dsi_read_data_return(struct intel_dsi *intel_dsi,
--				u8 *buf, size_t buflen)
-+				u8 *buf, int buflen)
- {
- 	struct drm_encoder *encoder = &intel_dsi->base.base;
- 	struct drm_device *dev = encoder->dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
- 	enum pipe pipe = intel_crtc->pipe;
--	size_t i, len = 0;
-+	int i, len = 0;
- 	u32 data_reg, val;
- 
- 	if (intel_dsi->hs) {
-@@ -312,7 +312,7 @@ static int dsi_read_data_return(struct intel_dsi *intel_dsi,
- }
- 
- int dsi_vc_dcs_read(struct intel_dsi *intel_dsi, int channel, u8 dcs_cmd,
--		    u8 *buf, size_t buflen)
-+		    u8 *buf, int buflen)
- {
- 	struct drm_encoder *encoder = &intel_dsi->base.base;
- 	struct drm_device *dev = encoder->dev;
-@@ -348,7 +348,7 @@ int dsi_vc_dcs_read(struct intel_dsi *intel_dsi, int channel, u8 dcs_cmd,
- }
- 
- int dsi_vc_generic_read(struct intel_dsi *intel_dsi, int channel,
--			u8 *reqdata, size_t reqlen, u8 *buf, size_t buflen)
-+			u8 *reqdata, int reqlen, u8 *buf, int buflen)
- {
- 	struct drm_encoder *encoder = &intel_dsi->base.base;
- 	struct drm_device *dev = encoder->dev;
-diff --git a/drivers/gpu/drm/i915/intel_dsi_cmd.h b/drivers/gpu/drm/i915/intel_dsi_cmd.h
-index 714a49aaed65..54c8a234a2e0 100644
---- a/drivers/gpu/drm/i915/intel_dsi_cmd.h
-+++ b/drivers/gpu/drm/i915/intel_dsi_cmd.h
-@@ -36,16 +36,16 @@
- void dsi_hs_mode_enable(struct intel_dsi *intel_dsi, bool enable);
- 
- int dsi_vc_dcs_write(struct intel_dsi *intel_dsi, int channel,
--		     const u8 *data, size_t len);
-+		     const u8 *data, int len);
- 
- int dsi_vc_generic_write(struct intel_dsi *intel_dsi, int channel,
--			 const u8 *data, size_t len);
-+			 const u8 *data, int len);
- 
- int dsi_vc_dcs_read(struct intel_dsi *intel_dsi, int channel, u8 dcs_cmd,
--		    u8 *buf, size_t buflen);
-+		    u8 *buf, int buflen);
- 
- int dsi_vc_generic_read(struct intel_dsi *intel_dsi, int channel,
--			u8 *reqdata, size_t reqlen, u8 *buf, size_t buflen);
-+			u8 *reqdata, int reqlen, u8 *buf, int buflen);
- 
- int dpi_send_cmd(struct intel_dsi *intel_dsi, u32 cmd);
- 
-@@ -84,21 +84,21 @@ static inline int dsi_vc_generic_write_2(struct intel_dsi *intel_dsi,
- 
- /* XXX: questionable read helpers */
- static inline int dsi_vc_generic_read_0(struct intel_dsi *intel_dsi,
--					int channel, u8 *buf, size_t buflen)
-+					int channel, u8 *buf, int buflen)
- {
- 	return dsi_vc_generic_read(intel_dsi, channel, NULL, 0, buf, buflen);
- }
- 
- static inline int dsi_vc_generic_read_1(struct intel_dsi *intel_dsi,
- 					int channel, u8 param, u8 *buf,
--					size_t buflen)
-+					int buflen)
- {
- 	return dsi_vc_generic_read(intel_dsi, channel, &param, 1, buf, buflen);
- }
- 
- static inline int dsi_vc_generic_read_2(struct intel_dsi *intel_dsi,
- 					int channel, u8 param1, u8 param2,
--					u8 *buf, size_t buflen)
-+					u8 *buf, int buflen)
- {
- 	u8 req[2] = { param1, param2 };
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0784-drm-i915-Report-enabled-slices-on-Haswell-GT3.patch b/patches.baytrail/0784-drm-i915-Report-enabled-slices-on-Haswell-GT3.patch
deleted file mode 100644
index f66e4b1db8606..0000000000000
--- a/patches.baytrail/0784-drm-i915-Report-enabled-slices-on-Haswell-GT3.patch
+++ /dev/null
@@ -1,77 +0,0 @@
-From d052bf6eac12777b408ee1ce28a52d3af056234b Mon Sep 17 00:00:00 2001
-From: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Date: Wed, 28 Aug 2013 16:45:46 -0300
-Subject: drm/i915: Report enabled slices on Haswell GT3
-
-Batchbuffers constructed by userspace can conditionalise their URB
-allocations through the use of the MI_SET_PREDICATE command. This
-command can read the MI_PREDICATE_RESULT_2 register to see how many
-slices are enabled on GT3, and by virtue of the result, scale their
-memory allocations to fit enabled memory.
-
-Of course, this only works if the kernel sets the appropriate bit in the
-register first.
-
-v2: Better commit subject and message by Chris Wilson.
-
-Cc: Chris Wilson <chris@chris-wilson.co.uk>
-Credits-to: Yejun Guo <yejun.guo@intel.com>
-Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 9435373ef8870e0a84b6fec0ad89b952bf3097fa)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h | 2 ++
- drivers/gpu/drm/i915/i915_gem.c | 5 +++++
- drivers/gpu/drm/i915/i915_reg.h | 5 +++++
- 3 files changed, 12 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 2cf9dabbfe5d..e52648927475 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1603,6 +1603,8 @@ struct drm_i915_file_private {
- 				 ((dev)->pci_device & 0xFF00) == 0x0C00)
- #define IS_ULT(dev)		(IS_HASWELL(dev) && \
- 				 ((dev)->pci_device & 0xFF00) == 0x0A00)
-+#define IS_HSW_GT3(dev)		(IS_HASWELL(dev) && \
-+				 ((dev)->pci_device & 0x00F0) == 0x0020)
- 
- /*
-  * The genX designation typically refers to the render engine, so render
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index d57368d5fc1d..2d4b72ab1229 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -4331,6 +4331,11 @@ i915_gem_init_hw(struct drm_device *dev)
- 	if (dev_priv->ellc_size)
- 		I915_WRITE(HSW_IDICR, I915_READ(HSW_IDICR) | IDIHASHMSK(0xf));
- 
-+	if (IS_HSW_GT3(dev))
-+		I915_WRITE(MI_PREDICATE_RESULT_2, LOWER_SLICE_ENABLED);
-+	else
-+		I915_WRITE(MI_PREDICATE_RESULT_2, LOWER_SLICE_DISABLED);
-+
- 	if (HAS_PCH_NOP(dev)) {
- 		u32 temp = I915_READ(GEN7_MSG_CTL);
- 		temp &= ~(WAIT_FOR_PCH_FLR_ACK | WAIT_FOR_PCH_RESET_ACK);
-diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
-index f626a16a14fa..c7f2da36f4a8 100644
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -264,6 +264,11 @@
- #define  MI_SEMAPHORE_SYNC_VVE	    (1<<16) /* VECS wait for VCS  (VEVSYNC) */
- #define  MI_SEMAPHORE_SYNC_RVE	    (2<<16) /* VECS wait for RCS  (VERSYNC) */
- #define  MI_SEMAPHORE_SYNC_INVALID  (3<<16)
-+
-+#define MI_PREDICATE_RESULT_2	(0x2214)
-+#define  LOWER_SLICE_ENABLED	(1<<0)
-+#define  LOWER_SLICE_DISABLED	(0<<0)
-+
- /*
-  * 3D instructions used by the kernel
-  */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0785-drm-i915-Restore-the-preliminary-HW-check.patch b/patches.baytrail/0785-drm-i915-Restore-the-preliminary-HW-check.patch
deleted file mode 100644
index e65ff39270090..0000000000000
--- a/patches.baytrail/0785-drm-i915-Restore-the-preliminary-HW-check.patch
+++ /dev/null
@@ -1,73 +0,0 @@
-From 8c9febdb68d926d96cba2cd55a8afbe8b0b1ac60 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <benjamin.widawsky@intel.com>
-Date: Fri, 23 Aug 2013 16:00:07 -0700
-Subject: drm/i915: Restore the preliminary HW check.
-
-We still maintain code internally that cares about preliminary support.
-Leaving the check here doesn't hurt anyone, and should keep things more
-in line.
-
-This time around, stick the info in the intel_info structure, and also
-change the error from DRM_ERROR->DRM_INFO.
-
-This is a partial revert of:
-commit 590e4df8c82e6c2707ae12ba6672ab6fb9cd4b89
-Author: Jesse Barnes <jbarnes@virtuousgeek.org>
-Date:   Wed May 8 10:45:15 2013 -0700
-
-    drm/i915: VLV support is no longer preliminary
-
-Daniel, I'll provide the fix ups for internal too if/when you merge
-this (if you want).
-
-Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit b833d68599b38187c2b55d750f496aa87d9020bc)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.c | 6 ++++++
- drivers/gpu/drm/i915/i915_drv.h | 2 ++
- 2 files changed, 8 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
-index 69d8ed5416c3..72e2be7a6c80 100644
---- a/drivers/gpu/drm/i915/i915_drv.c
-+++ b/drivers/gpu/drm/i915/i915_drv.c
-@@ -799,6 +799,12 @@ static int i915_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
- 	struct intel_device_info *intel_info =
- 		(struct intel_device_info *) ent->driver_data;
- 
-+	if (IS_PRELIMINARY_HW(intel_info) && !i915_preliminary_hw_support) {
-+		DRM_INFO("This hardware requires preliminary hardware support.\n"
-+			 "See CONFIG_DRM_I915_PRELIMINARY_HW_SUPPORT, and/or modparam preliminary_hw_support\n");
-+		return -ENODEV;
-+	}
-+
- 	/* Only bind to function 0 of the device. Early generations
- 	 * used function 1 as a placeholder for multi-head. This causes
- 	 * us confusion instead, especially on the systems where both
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index e52648927475..c86a7186e772 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -420,6 +420,7 @@ struct intel_uncore {
- 	func(is_ivybridge) sep \
- 	func(is_valleyview) sep \
- 	func(is_haswell) sep \
-+	func(is_preliminary) sep \
- 	func(has_force_wake) sep \
- 	func(has_fbc) sep \
- 	func(has_pipe_cxsr) sep \
-@@ -1605,6 +1606,7 @@ struct drm_i915_file_private {
- 				 ((dev)->pci_device & 0xFF00) == 0x0A00)
- #define IS_HSW_GT3(dev)		(IS_HASWELL(dev) && \
- 				 ((dev)->pci_device & 0x00F0) == 0x0020)
-+#define IS_PRELIMINARY_HW(intel_info) ((intel_info)->is_preliminary)
- 
- /*
-  * The genX designation typically refers to the render engine, so render
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0786-drm-i915-Fix-list-corruption-in-vma_unbind.patch b/patches.baytrail/0786-drm-i915-Fix-list-corruption-in-vma_unbind.patch
deleted file mode 100644
index 0b0339071a72b..0000000000000
--- a/patches.baytrail/0786-drm-i915-Fix-list-corruption-in-vma_unbind.patch
+++ /dev/null
@@ -1,56 +0,0 @@
-From 06302f395eae36e0b654c4b1ba1f9cb9f98ae4d9 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 29 Aug 2013 19:50:31 +0200
-Subject: drm/i915: Fix list corruption in vma_unbind
-
-The saga around the breadcrumb vmas used by execbuf continues ...
-
-This time around we've managed to unconditionally move the object to
-the unbound list on the last vma unbind even though it might never
-have been on either the bound or unbound list. Hilarity ensued.
-
-Chris Wilson tracked this one down but compared to his patches I've
-simply opted to completely separate the unbound case for not-yet bound
-vmas. Otherwise we imo end up with semantically hard to parse checks
-around the list_move_tail(global_list, ...).
-
-Cc: Chris Wilson <chris@chris-wilson.co.uk>
-Cc: Ben Widawsky <ben@bwidawsk.net>
-Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=68462
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 0ff501cbb5d825557da7b9a0226ef031344df87d)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem.c | 8 +++++---
- 1 file changed, 5 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index 2d4b72ab1229..80342c8f02e6 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -2610,8 +2610,11 @@ int i915_vma_unbind(struct i915_vma *vma)
- 	if (list_empty(&vma->vma_link))
- 		return 0;
- 
--	if (!drm_mm_node_allocated(&vma->node))
--		goto destroy;
-+	if (!drm_mm_node_allocated(&vma->node)) {
-+		i915_gem_vma_destroy(vma);
-+
-+		return 0;
-+	}
- 
- 	if (obj->pin_count)
- 		return -EBUSY;
-@@ -2651,7 +2654,6 @@ int i915_vma_unbind(struct i915_vma *vma)
- 
- 	drm_mm_remove_node(&vma->node);
- 
--destroy:
- 	i915_gem_vma_destroy(vma);
- 
- 	/* Since the unbound list is global, only move to that list if
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0787-drm-i915-Do-not-add-an-interrupt-for-a-context-switc.patch b/patches.baytrail/0787-drm-i915-Do-not-add-an-interrupt-for-a-context-switc.patch
deleted file mode 100644
index d2b24788d08e9..0000000000000
--- a/patches.baytrail/0787-drm-i915-Do-not-add-an-interrupt-for-a-context-switc.patch
+++ /dev/null
@@ -1,79 +0,0 @@
-From 5771c8d04f2eb59ec8c6a0900596327ec232bcc4 Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Mon, 26 Aug 2013 19:50:53 -0300
-Subject: drm/i915: Do not add an interrupt for a context switch
-
-We use the request to ensure we hold a reference to the context for the
-duration that it remains in use by the ring. Each request only holds a
-reference to the current context, hence we emit a request after
-switching contexts with the final reference to the old context. However,
-the extra interrupt caused by that request is not useful (no timing
-critical function will wait for the context object), instead the overhead
-of servicing the IRQ shows up in some (lightweight) benchmarks. In order
-to keep the useful property of using the request to manage the context
-lifetime, we want to add a dummy request that is associated with the
-interrupt from the subsequent real request following the batch.
-
-The extra interrupt was added as a side-effect of using
-i915_add_request() in
-
-commit 112522f6789581824903f6f72082b5b841a7f0f9
-Author: Chris Wilson <chris@chris-wilson.co.uk>
-Date:   Thu May 2 16:48:07 2013 +0300
-
-    drm/i915: put context upon switching
-
-v2: Daniel convinced me that the request here was solely for context
-lifetime tracking and that we have the active ref to keep the object
-alive whilst the MI_SET_CONTEXT. So the only concern then is which
-context should get the blame for MI_SET_CONTEXT failing. The old scheme
-added a request for the old context so that any hang upto and including
-the switch away would mark the old context as guilty. Now any hang here
-implicates the new context. However since we have already gone through a
-complete flush with the last context in its last request, and all that
-lies in no-man's-land is an invalidate flush and the MI_SET_CONTEXT, we
-should be safe in not unduly placing blame on the new context.
-
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Cc: Ben Widawsky <ben@bwidawsk.net>
-Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit c0321e2c5acaaff7ed41d46d97cee71ad9238481)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem.c         |    1 -
- drivers/gpu/drm/i915/i915_gem_context.c |   12 +-----------
- 2 files changed, 1 insertion(+), 12 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -2045,7 +2045,6 @@ int __i915_add_request(struct intel_ring
- 	if (request == NULL)
- 		return -ENOMEM;
- 
--
- 	/* Record the position of the start of the request so that
- 	 * should we detect the updated seqno part-way through the
- 	 * GPU processing the request, we never over-estimate the
---- a/drivers/gpu/drm/i915/i915_gem_context.c
-+++ b/drivers/gpu/drm/i915/i915_gem_context.c
-@@ -449,17 +449,7 @@ static int do_switch(struct i915_hw_cont
- 		from->obj->dirty = 1;
- 		BUG_ON(from->obj->ring != ring);
- 
--		ret = i915_add_request(ring, NULL);
--		if (ret) {
--			/* Too late, we've already scheduled a context switch.
--			 * Try to undo the change so that the hw state is
--			 * consistent with out tracking. In case of emergency,
--			 * scream.
--			 */
--			WARN_ON(mi_set_context(ring, from, MI_RESTORE_INHIBIT));
--			return ret;
--		}
--
-+		/* obj is kept alive until the next request by its active ref */
- 		i915_gem_object_unpin(from->obj);
- 		i915_gem_context_unreference(from);
- 	}
diff --git a/patches.baytrail/0788-drm-i915-Rearrange-the-comments-in-i915_add_request.patch b/patches.baytrail/0788-drm-i915-Rearrange-the-comments-in-i915_add_request.patch
deleted file mode 100644
index eb75d44dbd4d4..0000000000000
--- a/patches.baytrail/0788-drm-i915-Rearrange-the-comments-in-i915_add_request.patch
+++ /dev/null
@@ -1,47 +0,0 @@
-From 645fc578d2875cbddc3188618969d0eef6c6a2d7 Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Mon, 26 Aug 2013 19:50:54 -0300
-Subject: drm/i915: Rearrange the comments in i915_add_request()
-
-The comments were a little out-of-sequence with the code, forcing the
-reader to jump around whilst reading. Whilst moving the comments around,
-add one to explain the context reference.
-
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 9a7e0c2a1bff84d20ef02a85898f9c8757d1441c)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem.c | 7 +++++--
- 1 file changed, 5 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index 22be39feadc0..fdeecae058e1 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -2062,8 +2062,6 @@ int __i915_add_request(struct intel_ring_buffer *ring,
- 	request->ring = ring;
- 	request->head = request_start;
- 	request->tail = request_ring_position;
--	request->ctx = ring->last_context;
--	request->batch_obj = obj;
- 
- 	/* Whilst this request exists, batch_obj will be on the
- 	 * active_list, and so will hold the active reference. Only when this
-@@ -2071,7 +2069,12 @@ int __i915_add_request(struct intel_ring_buffer *ring,
- 	 * inactive_list and lose its active reference. Hence we do not need
- 	 * to explicitly hold another reference here.
- 	 */
-+	request->batch_obj = obj;
- 
-+	/* Hold a reference to the current context so that we can inspect
-+	 * it later in case a hangcheck error event fires.
-+	 */
-+	request->ctx = ring->last_context;
- 	if (request->ctx)
- 		i915_gem_context_reference(request->ctx);
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0789-drm-i915-It-s-its.patch b/patches.baytrail/0789-drm-i915-It-s-its.patch
deleted file mode 100644
index c3118fde6c573..0000000000000
--- a/patches.baytrail/0789-drm-i915-It-s-its.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From 7ee7281e0328a862c88af7eab7e294c0c95c1f01 Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Fri, 30 Aug 2013 14:40:26 +0100
-Subject: drm/i915: It's its!
-
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Acked-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 508842a0366253cf99803277dfba837d3decfeeb)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem_context.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
-index b6da70b51aea..26c3fccc9599 100644
---- a/drivers/gpu/drm/i915/i915_gem_context.c
-+++ b/drivers/gpu/drm/i915/i915_gem_context.c
-@@ -73,7 +73,7 @@
-  *
-  * There are two confusing terms used above:
-  *  The "current context" means the context which is currently running on the
-- *  GPU. The GPU has loaded it's state already and has stored away the gtt
-+ *  GPU. The GPU has loaded its state already and has stored away the gtt
-  *  offset of the BO. The GPU is not actively referencing the data at this
-  *  offset, but it will on the next context switch. The only way to avoid this
-  *  is to do a GPU reset.
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0790-drm-i915-add-plumbing-for-SWSCI.patch b/patches.baytrail/0790-drm-i915-add-plumbing-for-SWSCI.patch
deleted file mode 100644
index c4b5c8afb1b9f..0000000000000
--- a/patches.baytrail/0790-drm-i915-add-plumbing-for-SWSCI.patch
+++ /dev/null
@@ -1,294 +0,0 @@
-From 3e7b980437b955b639759b8293f10cb306f29f54 Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Mon, 2 Sep 2013 10:38:59 +0300
-Subject: drm/i915: add plumbing for SWSCI
-
-SWSCI is a driver to bios call interface.
-
-This checks for SWSCI availability and bios requested callbacks, and
-filters out any calls that shouldn't happen. This way the callers don't
-need to do the checks all over the place.
-
-v2: silence some checkpatch nagging
-
-v3: set PCI_SWSCI bit 0 to trigger interrupt (Mengdong Lin)
-
-v4: remove an extra #define (Jesse)
-
-v5: spec says s/w is responsible for clearing PCI_SWSCI bit 0 too
-
-v6: per Paulo's review and more:
- - fix sub-function mask
- - add exit parameter
- - add define for set panel details call
- - return more errors from swsci
- - clean up the supported/requested callbacks bit masks mess
- - use DSLP for timeout
- - fix build for CONFIG_ACPI=n
-
-v7: tiny adjustment of requested vs. supported SBCB callbacks handling (Paulo)
-
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit ebde53c7bc0f1a56b67799c60c47dc89e0875c6a)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h       |   2 +
- drivers/gpu/drm/i915/intel_opregion.c | 199 +++++++++++++++++++++++++++++++++-
- 2 files changed, 198 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index c86a7186e772..1fce8415d9d2 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -225,6 +225,8 @@ struct intel_opregion {
- 	struct opregion_header __iomem *header;
- 	struct opregion_acpi __iomem *acpi;
- 	struct opregion_swsci __iomem *swsci;
-+	u32 swsci_gbda_sub_functions;
-+	u32 swsci_sbcb_sub_functions;
- 	struct opregion_asle __iomem *asle;
- 	void __iomem *vbt;
- 	u32 __iomem *lid_state;
-diff --git a/drivers/gpu/drm/i915/intel_opregion.c b/drivers/gpu/drm/i915/intel_opregion.c
-index cfb8fb68f09c..c45fec5b5521 100644
---- a/drivers/gpu/drm/i915/intel_opregion.c
-+++ b/drivers/gpu/drm/i915/intel_opregion.c
-@@ -36,8 +36,11 @@
- #include "i915_drv.h"
- #include "intel_drv.h"
- 
--#define PCI_ASLE 0xe4
--#define PCI_ASLS 0xfc
-+#define PCI_ASLE		0xe4
-+#define PCI_ASLS		0xfc
-+#define PCI_SWSCI		0xe8
-+#define PCI_SWSCI_SCISEL	(1 << 15)
-+#define PCI_SWSCI_GSSCIE	(1 << 0)
- 
- #define OPREGION_HEADER_OFFSET 0
- #define OPREGION_ACPI_OFFSET   0x100
-@@ -151,6 +154,51 @@ struct opregion_asle {
- 
- #define ASLE_CBLV_VALID         (1<<31)
- 
-+/* Software System Control Interrupt (SWSCI) */
-+#define SWSCI_SCIC_INDICATOR		(1 << 0)
-+#define SWSCI_SCIC_MAIN_FUNCTION_SHIFT	1
-+#define SWSCI_SCIC_MAIN_FUNCTION_MASK	(0xf << 1)
-+#define SWSCI_SCIC_SUB_FUNCTION_SHIFT	8
-+#define SWSCI_SCIC_SUB_FUNCTION_MASK	(0xff << 8)
-+#define SWSCI_SCIC_EXIT_PARAMETER_SHIFT	8
-+#define SWSCI_SCIC_EXIT_PARAMETER_MASK	(0xff << 8)
-+#define SWSCI_SCIC_EXIT_STATUS_SHIFT	5
-+#define SWSCI_SCIC_EXIT_STATUS_MASK	(7 << 5)
-+#define SWSCI_SCIC_EXIT_STATUS_SUCCESS	1
-+
-+#define SWSCI_FUNCTION_CODE(main, sub) \
-+	((main) << SWSCI_SCIC_MAIN_FUNCTION_SHIFT | \
-+	 (sub) << SWSCI_SCIC_SUB_FUNCTION_SHIFT)
-+
-+/* SWSCI: Get BIOS Data (GBDA) */
-+#define SWSCI_GBDA			4
-+#define SWSCI_GBDA_SUPPORTED_CALLS	SWSCI_FUNCTION_CODE(SWSCI_GBDA, 0)
-+#define SWSCI_GBDA_REQUESTED_CALLBACKS	SWSCI_FUNCTION_CODE(SWSCI_GBDA, 1)
-+#define SWSCI_GBDA_BOOT_DISPLAY_PREF	SWSCI_FUNCTION_CODE(SWSCI_GBDA, 4)
-+#define SWSCI_GBDA_PANEL_DETAILS	SWSCI_FUNCTION_CODE(SWSCI_GBDA, 5)
-+#define SWSCI_GBDA_TV_STANDARD		SWSCI_FUNCTION_CODE(SWSCI_GBDA, 6)
-+#define SWSCI_GBDA_INTERNAL_GRAPHICS	SWSCI_FUNCTION_CODE(SWSCI_GBDA, 7)
-+#define SWSCI_GBDA_SPREAD_SPECTRUM	SWSCI_FUNCTION_CODE(SWSCI_GBDA, 10)
-+
-+/* SWSCI: System BIOS Callbacks (SBCB) */
-+#define SWSCI_SBCB			6
-+#define SWSCI_SBCB_SUPPORTED_CALLBACKS	SWSCI_FUNCTION_CODE(SWSCI_SBCB, 0)
-+#define SWSCI_SBCB_INIT_COMPLETION	SWSCI_FUNCTION_CODE(SWSCI_SBCB, 1)
-+#define SWSCI_SBCB_PRE_HIRES_SET_MODE	SWSCI_FUNCTION_CODE(SWSCI_SBCB, 3)
-+#define SWSCI_SBCB_POST_HIRES_SET_MODE	SWSCI_FUNCTION_CODE(SWSCI_SBCB, 4)
-+#define SWSCI_SBCB_DISPLAY_SWITCH	SWSCI_FUNCTION_CODE(SWSCI_SBCB, 5)
-+#define SWSCI_SBCB_SET_TV_FORMAT	SWSCI_FUNCTION_CODE(SWSCI_SBCB, 6)
-+#define SWSCI_SBCB_ADAPTER_POWER_STATE	SWSCI_FUNCTION_CODE(SWSCI_SBCB, 7)
-+#define SWSCI_SBCB_DISPLAY_POWER_STATE	SWSCI_FUNCTION_CODE(SWSCI_SBCB, 8)
-+#define SWSCI_SBCB_SET_BOOT_DISPLAY	SWSCI_FUNCTION_CODE(SWSCI_SBCB, 9)
-+#define SWSCI_SBCB_SET_PANEL_DETAILS	SWSCI_FUNCTION_CODE(SWSCI_SBCB, 10)
-+#define SWSCI_SBCB_SET_INTERNAL_GFX	SWSCI_FUNCTION_CODE(SWSCI_SBCB, 11)
-+#define SWSCI_SBCB_POST_HIRES_TO_DOS_FS	SWSCI_FUNCTION_CODE(SWSCI_SBCB, 16)
-+#define SWSCI_SBCB_SUSPEND_RESUME	SWSCI_FUNCTION_CODE(SWSCI_SBCB, 17)
-+#define SWSCI_SBCB_SET_SPREAD_SPECTRUM	SWSCI_FUNCTION_CODE(SWSCI_SBCB, 18)
-+#define SWSCI_SBCB_POST_VBE_PM		SWSCI_FUNCTION_CODE(SWSCI_SBCB, 19)
-+#define SWSCI_SBCB_ENABLE_DISABLE_AUDIO	SWSCI_FUNCTION_CODE(SWSCI_SBCB, 21)
-+
- #define ACPI_OTHER_OUTPUT (0<<8)
- #define ACPI_VGA_OUTPUT (1<<8)
- #define ACPI_TV_OUTPUT (2<<8)
-@@ -158,6 +206,91 @@ struct opregion_asle {
- #define ACPI_LVDS_OUTPUT (4<<8)
- 
- #ifdef CONFIG_ACPI
-+static int swsci(struct drm_device *dev, u32 function, u32 parm, u32 *parm_out)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct opregion_swsci __iomem *swsci = dev_priv->opregion.swsci;
-+	u32 main_function, sub_function, scic;
-+	u16 pci_swsci;
-+	u32 dslp;
-+
-+	if (!swsci)
-+		return -ENODEV;
-+
-+	main_function = (function & SWSCI_SCIC_MAIN_FUNCTION_MASK) >>
-+		SWSCI_SCIC_MAIN_FUNCTION_SHIFT;
-+	sub_function = (function & SWSCI_SCIC_SUB_FUNCTION_MASK) >>
-+		SWSCI_SCIC_SUB_FUNCTION_SHIFT;
-+
-+	/* Check if we can call the function. See swsci_setup for details. */
-+	if (main_function == SWSCI_SBCB) {
-+		if ((dev_priv->opregion.swsci_sbcb_sub_functions &
-+		     (1 << sub_function)) == 0)
-+			return -EINVAL;
-+	} else if (main_function == SWSCI_GBDA) {
-+		if ((dev_priv->opregion.swsci_gbda_sub_functions &
-+		     (1 << sub_function)) == 0)
-+			return -EINVAL;
-+	}
-+
-+	/* Driver sleep timeout in ms. */
-+	dslp = ioread32(&swsci->dslp);
-+	if (!dslp) {
-+		dslp = 2;
-+	} else if (dslp > 500) {
-+		/* Hey bios, trust must be earned. */
-+		WARN_ONCE(1, "excessive driver sleep timeout (DSPL) %u\n", dslp);
-+		dslp = 500;
-+	}
-+
-+	/* The spec tells us to do this, but we are the only user... */
-+	scic = ioread32(&swsci->scic);
-+	if (scic & SWSCI_SCIC_INDICATOR) {
-+		DRM_DEBUG_DRIVER("SWSCI request already in progress\n");
-+		return -EBUSY;
-+	}
-+
-+	scic = function | SWSCI_SCIC_INDICATOR;
-+
-+	iowrite32(parm, &swsci->parm);
-+	iowrite32(scic, &swsci->scic);
-+
-+	/* Ensure SCI event is selected and event trigger is cleared. */
-+	pci_read_config_word(dev->pdev, PCI_SWSCI, &pci_swsci);
-+	if (!(pci_swsci & PCI_SWSCI_SCISEL) || (pci_swsci & PCI_SWSCI_GSSCIE)) {
-+		pci_swsci |= PCI_SWSCI_SCISEL;
-+		pci_swsci &= ~PCI_SWSCI_GSSCIE;
-+		pci_write_config_word(dev->pdev, PCI_SWSCI, pci_swsci);
-+	}
-+
-+	/* Use event trigger to tell bios to check the mail. */
-+	pci_swsci |= PCI_SWSCI_GSSCIE;
-+	pci_write_config_word(dev->pdev, PCI_SWSCI, pci_swsci);
-+
-+	/* Poll for the result. */
-+#define C (((scic = ioread32(&swsci->scic)) & SWSCI_SCIC_INDICATOR) == 0)
-+	if (wait_for(C, dslp)) {
-+		DRM_DEBUG_DRIVER("SWSCI request timed out\n");
-+		return -ETIMEDOUT;
-+	}
-+
-+	scic = (scic & SWSCI_SCIC_EXIT_STATUS_MASK) >>
-+		SWSCI_SCIC_EXIT_STATUS_SHIFT;
-+
-+	/* Note: scic == 0 is an error! */
-+	if (scic != SWSCI_SCIC_EXIT_STATUS_SUCCESS) {
-+		DRM_DEBUG_DRIVER("SWSCI request error %u\n", scic);
-+		return -EIO;
-+	}
-+
-+	if (parm_out)
-+		*parm_out = ioread32(&swsci->parm);
-+
-+	return 0;
-+
-+#undef C
-+}
-+
- static u32 asle_set_backlight(struct drm_device *dev, u32 bclp)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
-@@ -447,7 +580,66 @@ void intel_opregion_fini(struct drm_device *dev)
- 	opregion->asle = NULL;
- 	opregion->vbt = NULL;
- }
--#endif
-+
-+static void swsci_setup(struct drm_device *dev)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct intel_opregion *opregion = &dev_priv->opregion;
-+	bool requested_callbacks = false;
-+	u32 tmp;
-+
-+	/* Sub-function code 0 is okay, let's allow them. */
-+	opregion->swsci_gbda_sub_functions = 1;
-+	opregion->swsci_sbcb_sub_functions = 1;
-+
-+	/* We use GBDA to ask for supported GBDA calls. */
-+	if (swsci(dev, SWSCI_GBDA_SUPPORTED_CALLS, 0, &tmp) == 0) {
-+		/* make the bits match the sub-function codes */
-+		tmp <<= 1;
-+		opregion->swsci_gbda_sub_functions |= tmp;
-+	}
-+
-+	/*
-+	 * We also use GBDA to ask for _requested_ SBCB callbacks. The driver
-+	 * must not call interfaces that are not specifically requested by the
-+	 * bios.
-+	 */
-+	if (swsci(dev, SWSCI_GBDA_REQUESTED_CALLBACKS, 0, &tmp) == 0) {
-+		/* here, the bits already match sub-function codes */
-+		opregion->swsci_sbcb_sub_functions |= tmp;
-+		requested_callbacks = true;
-+	}
-+
-+	/*
-+	 * But we use SBCB to ask for _supported_ SBCB calls. This does not mean
-+	 * the callback is _requested_. But we still can't call interfaces that
-+	 * are not requested.
-+	 */
-+	if (swsci(dev, SWSCI_SBCB_SUPPORTED_CALLBACKS, 0, &tmp) == 0) {
-+		/* make the bits match the sub-function codes */
-+		u32 low = tmp & 0x7ff;
-+		u32 high = tmp & ~0xfff; /* bit 11 is reserved */
-+		tmp = (high << 4) | (low << 1) | 1;
-+
-+		/* best guess what to do with supported wrt requested */
-+		if (requested_callbacks) {
-+			u32 req = opregion->swsci_sbcb_sub_functions;
-+			if ((req & tmp) != req)
-+				DRM_DEBUG_DRIVER("SWSCI BIOS requested (%08x) SBCB callbacks that are not supported (%08x)\n", req, tmp);
-+			/* XXX: for now, trust the requested callbacks */
-+			/* opregion->swsci_sbcb_sub_functions &= tmp; */
-+		} else {
-+			opregion->swsci_sbcb_sub_functions |= tmp;
-+		}
-+	}
-+
-+	DRM_DEBUG_DRIVER("SWSCI GBDA callbacks %08x, SBCB callbacks %08x\n",
-+			 opregion->swsci_gbda_sub_functions,
-+			 opregion->swsci_sbcb_sub_functions);
-+}
-+#else /* CONFIG_ACPI */
-+static inline void swsci_setup(struct drm_device *dev) {}
-+#endif  /* CONFIG_ACPI */
- 
- int intel_opregion_setup(struct drm_device *dev)
- {
-@@ -490,6 +682,7 @@ int intel_opregion_setup(struct drm_device *dev)
- 	if (mboxes & MBOX_SWSCI) {
- 		DRM_DEBUG_DRIVER("SWSCI supported\n");
- 		opregion->swsci = base + OPREGION_SWSCI_OFFSET;
-+		swsci_setup(dev);
- 	}
- 	if (mboxes & MBOX_ASLE) {
- 		DRM_DEBUG_DRIVER("ASLE supported\n");
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0791-drm-i915-expose-intel_ddi_get_encoder_port.patch b/patches.baytrail/0791-drm-i915-expose-intel_ddi_get_encoder_port.patch
deleted file mode 100644
index 5d76e8edd4a7a..0000000000000
--- a/patches.baytrail/0791-drm-i915-expose-intel_ddi_get_encoder_port.patch
+++ /dev/null
@@ -1,45 +0,0 @@
-From 0d055887c74084a72a5e4b591cdcef73734bf9e8 Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Fri, 30 Aug 2013 19:40:28 +0300
-Subject: drm/i915: expose intel_ddi_get_encoder_port()
-
-In preparation for followup work.
-
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 20f4dbe45950e462aa7c3243f95c0d8bcc369ca0)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_ddi.c | 2 +-
- drivers/gpu/drm/i915/intel_drv.h | 1 +
- 2 files changed, 2 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
-index 63aca49d11a8..060ea5096e52 100644
---- a/drivers/gpu/drm/i915/intel_ddi.c
-+++ b/drivers/gpu/drm/i915/intel_ddi.c
-@@ -58,7 +58,7 @@ static const u32 hsw_ddi_translations_fdi[] = {
- 	0x00FFFFFF, 0x00040006		/* HDMI parameters */
- };
- 
--static enum port intel_ddi_get_encoder_port(struct intel_encoder *intel_encoder)
-+enum port intel_ddi_get_encoder_port(struct intel_encoder *intel_encoder)
- {
- 	struct drm_encoder *encoder = &intel_encoder->base;
- 	int type = intel_encoder->type;
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index f5c48d3b3730..ea97c2347200 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -712,6 +712,7 @@ extern void intel_write_eld(struct drm_encoder *encoder,
- extern void intel_prepare_ddi(struct drm_device *dev);
- extern void hsw_fdi_link_train(struct drm_crtc *crtc);
- extern void intel_ddi_init(struct drm_device *dev, enum port port);
-+extern enum port intel_ddi_get_encoder_port(struct intel_encoder *intel_encoder);
- 
- /* For use by IVB LP watermark workaround in intel_sprite.c */
- extern void intel_update_watermarks(struct drm_device *dev);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0792-drm-i915-add-opregion-function-to-notify-bios-of-enc.patch b/patches.baytrail/0792-drm-i915-add-opregion-function-to-notify-bios-of-enc.patch
deleted file mode 100644
index bacdee1acf883..0000000000000
--- a/patches.baytrail/0792-drm-i915-add-opregion-function-to-notify-bios-of-enc.patch
+++ /dev/null
@@ -1,130 +0,0 @@
-From 24760c655901489f29c38f8abe89614d51efcb54 Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Fri, 30 Aug 2013 19:40:30 +0300
-Subject: drm/i915: add opregion function to notify bios of encoder
- enable/disable
-
-The bios interface seems messy, and it's hard to tell what the bios
-really wants. At first, only add support for DDI based machines (hsw+),
-and see how it turns out.
-
-The spec says to notify prior to power down and after power up. It is
-unclear whether it makes a difference.
-
-v2:
- - squash notification function and callers patches together (Daniel)
- - move callers to haswell_crtc_{enable,disable} (Daniel)
- - rename notification function (Chris)
-
-v3:
- - separate notification function and callers again, as it's not clear
-   whether the display power state notification is the right thing to do
-   after all
-
-v4: per Paulo's review:
- - drop LVDS
- - WARN on unsupported encoder types
-
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 9c4b0a683193a646ea3b0c609a2276ae99a7cee4)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h       |  8 ++++++
- drivers/gpu/drm/i915/intel_opregion.c | 51 +++++++++++++++++++++++++++++++++++
- 2 files changed, 59 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 1fce8415d9d2..3b7368d6d72b 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -2189,15 +2189,23 @@ static inline bool intel_gmbus_is_forced_bit(struct i2c_adapter *adapter)
- extern void intel_i2c_reset(struct drm_device *dev);
- 
- /* intel_opregion.c */
-+struct intel_encoder;
- extern int intel_opregion_setup(struct drm_device *dev);
- #ifdef CONFIG_ACPI
- extern void intel_opregion_init(struct drm_device *dev);
- extern void intel_opregion_fini(struct drm_device *dev);
- extern void intel_opregion_asle_intr(struct drm_device *dev);
-+extern int intel_opregion_notify_encoder(struct intel_encoder *intel_encoder,
-+					 bool enable);
- #else
- static inline void intel_opregion_init(struct drm_device *dev) { return; }
- static inline void intel_opregion_fini(struct drm_device *dev) { return; }
- static inline void intel_opregion_asle_intr(struct drm_device *dev) { return; }
-+static inline int
-+intel_opregion_notify_encoder(struct intel_encoder *intel_encoder, bool enable)
-+{
-+	return 0;
-+}
- #endif
- 
- /* intel_acpi.c */
-diff --git a/drivers/gpu/drm/i915/intel_opregion.c b/drivers/gpu/drm/i915/intel_opregion.c
-index c45fec5b5521..ce1c79eedcb1 100644
---- a/drivers/gpu/drm/i915/intel_opregion.c
-+++ b/drivers/gpu/drm/i915/intel_opregion.c
-@@ -291,6 +291,57 @@ static int swsci(struct drm_device *dev, u32 function, u32 parm, u32 *parm_out)
- #undef C
- }
- 
-+#define DISPLAY_TYPE_CRT			0
-+#define DISPLAY_TYPE_TV				1
-+#define DISPLAY_TYPE_EXTERNAL_FLAT_PANEL	2
-+#define DISPLAY_TYPE_INTERNAL_FLAT_PANEL	3
-+
-+int intel_opregion_notify_encoder(struct intel_encoder *intel_encoder,
-+				  bool enable)
-+{
-+	struct drm_device *dev = intel_encoder->base.dev;
-+	u32 parm = 0;
-+	u32 type = 0;
-+	u32 port;
-+
-+	/* don't care about old stuff for now */
-+	if (!HAS_DDI(dev))
-+		return 0;
-+
-+	port = intel_ddi_get_encoder_port(intel_encoder);
-+	if (port == PORT_E) {
-+		port = 0;
-+	} else {
-+		parm |= 1 << port;
-+		port++;
-+	}
-+
-+	if (!enable)
-+		parm |= 4 << 8;
-+
-+	switch (intel_encoder->type) {
-+	case INTEL_OUTPUT_ANALOG:
-+		type = DISPLAY_TYPE_CRT;
-+		break;
-+	case INTEL_OUTPUT_UNKNOWN:
-+	case INTEL_OUTPUT_DISPLAYPORT:
-+	case INTEL_OUTPUT_HDMI:
-+		type = DISPLAY_TYPE_EXTERNAL_FLAT_PANEL;
-+		break;
-+	case INTEL_OUTPUT_EDP:
-+		type = DISPLAY_TYPE_INTERNAL_FLAT_PANEL;
-+		break;
-+	default:
-+		WARN_ONCE(1, "unsupported intel_encoder type %d\n",
-+			  intel_encoder->type);
-+		return -EINVAL;
-+	}
-+
-+	parm |= type << (16 + port * 3);
-+
-+	return swsci(dev, SWSCI_SBCB_DISPLAY_POWER_STATE, parm, NULL);
-+}
-+
- static u32 asle_set_backlight(struct drm_device *dev, u32 bclp)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0793-drm-i915-add-opregion-function-to-notify-bios-of-ada.patch b/patches.baytrail/0793-drm-i915-add-opregion-function-to-notify-bios-of-ada.patch
deleted file mode 100644
index 3ef4e68bc135f..0000000000000
--- a/patches.baytrail/0793-drm-i915-add-opregion-function-to-notify-bios-of-ada.patch
+++ /dev/null
@@ -1,83 +0,0 @@
-From 4188f7fd56a994bf3a12eeacfe265c2ecc0925b3 Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Fri, 30 Aug 2013 19:40:31 +0300
-Subject: drm/i915: add opregion function to notify bios of adapter power state
-
-Notifying the bios lets it enter power saving states.
-
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit ecbc5cf34068d22cf57bac596809a346576c38a3)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h       |  7 +++++++
- drivers/gpu/drm/i915/intel_opregion.c | 27 +++++++++++++++++++++++++++
- 2 files changed, 34 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 3b7368d6d72b..769c1388a69e 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -2197,6 +2197,8 @@ extern void intel_opregion_fini(struct drm_device *dev);
- extern void intel_opregion_asle_intr(struct drm_device *dev);
- extern int intel_opregion_notify_encoder(struct intel_encoder *intel_encoder,
- 					 bool enable);
-+extern int intel_opregion_notify_adapter(struct drm_device *dev,
-+					 pci_power_t state);
- #else
- static inline void intel_opregion_init(struct drm_device *dev) { return; }
- static inline void intel_opregion_fini(struct drm_device *dev) { return; }
-@@ -2206,6 +2208,11 @@ intel_opregion_notify_encoder(struct intel_encoder *intel_encoder, bool enable)
- {
- 	return 0;
- }
-+static inline int
-+intel_opregion_notify_adapter(struct drm_device *dev, pci_power_t state)
-+{
-+	return 0;
-+}
- #endif
- 
- /* intel_acpi.c */
-diff --git a/drivers/gpu/drm/i915/intel_opregion.c b/drivers/gpu/drm/i915/intel_opregion.c
-index ce1c79eedcb1..2ff74912b656 100644
---- a/drivers/gpu/drm/i915/intel_opregion.c
-+++ b/drivers/gpu/drm/i915/intel_opregion.c
-@@ -342,6 +342,33 @@ int intel_opregion_notify_encoder(struct intel_encoder *intel_encoder,
- 	return swsci(dev, SWSCI_SBCB_DISPLAY_POWER_STATE, parm, NULL);
- }
- 
-+static const struct {
-+	pci_power_t pci_power_state;
-+	u32 parm;
-+} power_state_map[] = {
-+	{ PCI_D0,	0x00 },
-+	{ PCI_D1,	0x01 },
-+	{ PCI_D2,	0x02 },
-+	{ PCI_D3hot,	0x04 },
-+	{ PCI_D3cold,	0x04 },
-+};
-+
-+int intel_opregion_notify_adapter(struct drm_device *dev, pci_power_t state)
-+{
-+	int i;
-+
-+	if (!HAS_DDI(dev))
-+		return 0;
-+
-+	for (i = 0; i < ARRAY_SIZE(power_state_map); i++) {
-+		if (state == power_state_map[i].pci_power_state)
-+			return swsci(dev, SWSCI_SBCB_ADAPTER_POWER_STATE,
-+				     power_state_map[i].parm, NULL);
-+	}
-+
-+	return -EINVAL;
-+}
-+
- static u32 asle_set_backlight(struct drm_device *dev, u32 bclp)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0794-drm-i915-do-display-power-state-notification-on-crtc.patch b/patches.baytrail/0794-drm-i915-do-display-power-state-notification-on-crtc.patch
deleted file mode 100644
index 822683f49acf1..0000000000000
--- a/patches.baytrail/0794-drm-i915-do-display-power-state-notification-on-crtc.patch
+++ /dev/null
@@ -1,48 +0,0 @@
-From 8852fa562133da72a1aa6f96c508b76cd21e2ce3 Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Fri, 30 Aug 2013 19:40:32 +0300
-Subject: drm/i915: do display power state notification on crtc enable/disable
-
-The spec says to notify prior to power down and after power up. It is
-unclear whether it makes a difference.
-
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 8807e55b3a1bf7b159dcefa4504e204df364d4a1)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 8 ++++++--
- 1 file changed, 6 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 3658a7ae7c41..821991c0958f 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -3427,8 +3427,10 @@ static void haswell_crtc_enable(struct drm_crtc *crtc)
- 	intel_update_fbc(dev);
- 	mutex_unlock(&dev->struct_mutex);
- 
--	for_each_encoder_on_crtc(dev, crtc, encoder)
-+	for_each_encoder_on_crtc(dev, crtc, encoder) {
- 		encoder->enable(encoder);
-+		intel_opregion_notify_encoder(encoder, true);
-+	}
- 
- 	/*
- 	 * There seems to be a race in PCH platform hw (at least on some
-@@ -3542,8 +3544,10 @@ static void haswell_crtc_disable(struct drm_crtc *crtc)
- 	if (!intel_crtc->active)
- 		return;
- 
--	for_each_encoder_on_crtc(dev, crtc, encoder)
-+	for_each_encoder_on_crtc(dev, crtc, encoder) {
-+		intel_opregion_notify_encoder(encoder, false);
- 		encoder->disable(encoder);
-+	}
- 
- 	intel_crtc_wait_for_pending_flips(crtc);
- 	drm_vblank_off(dev, pipe);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0795-drm-i915-Modify-DP-set-clock-to-accomodate-more-eDP-.patch b/patches.baytrail/0795-drm-i915-Modify-DP-set-clock-to-accomodate-more-eDP-.patch
deleted file mode 100644
index 69dbd1d8f70d6..0000000000000
--- a/patches.baytrail/0795-drm-i915-Modify-DP-set-clock-to-accomodate-more-eDP-.patch
+++ /dev/null
@@ -1,114 +0,0 @@
-From 233befc7f209f2f850bb17b4aa913c2525ac966f Mon Sep 17 00:00:00 2001
-From: Chon Ming Lee <chon.ming.lee@intel.com>
-Date: Wed, 4 Sep 2013 01:30:37 +0800
-Subject: drm/i915: Modify DP set clock to accomodate more eDP timings v2
-
-eDP 1.4 supports 4-5 extra link rates in additional to current 2 link
-rate.  Create a structure to store the DPLL divisor data to improve
-readability.
-
-v2: Fix the gen4_dpll/pch_dpll initialization to C99
-designated initializers, and use a single loop for all platforms. (Jani and Daniel)
-
-Signed-off-by: Chon Ming Lee <chon.ming.lee@intel.com>
-[danvet: Fix up checkpatch warnings.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 9dd4ffdf3936e9cd85a5c856a192134b23b4b2ac)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_dp.c | 63 +++++++++++++++++++++++------------------
- 1 file changed, 35 insertions(+), 28 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
-index 79c14e298ba6..38d15ad9cde1 100644
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -38,6 +38,25 @@
- 
- #define DP_LINK_CHECK_TIMEOUT	(10 * 1000)
- 
-+struct dp_link_dpll {
-+	int link_bw;
-+	struct dpll dpll;
-+};
-+
-+static const struct dp_link_dpll gen4_dpll[] = {
-+	{ DP_LINK_BW_1_62,
-+		{ .p1 = 2, .p2 = 10, .n = 2, .m1 = 23, .m2 = 8 } },
-+	{ DP_LINK_BW_2_7,
-+		{ .p1 = 1, .p2 = 10, .n = 1, .m1 = 14, .m2 = 2 } }
-+};
-+
-+static const struct dp_link_dpll pch_dpll[] = {
-+	{ DP_LINK_BW_1_62,
-+		{ .p1 = 2, .p2 = 10, .n = 1, .m1 = 12, .m2 = 9 } },
-+	{ DP_LINK_BW_2_7,
-+		{ .p1 = 1, .p2 = 10, .n = 2, .m1 = 14, .m2 = 8 } }
-+};
-+
- /**
-  * is_edp - is the given port attached to an eDP panel (either CPU or PCH)
-  * @intel_dp: DP struct
-@@ -660,42 +679,30 @@ intel_dp_set_clock(struct intel_encoder *encoder,
- 		   struct intel_crtc_config *pipe_config, int link_bw)
- {
- 	struct drm_device *dev = encoder->base.dev;
-+	const struct dp_link_dpll *divisor = NULL;
-+	int i, count = 0;
- 
- 	if (IS_G4X(dev)) {
--		if (link_bw == DP_LINK_BW_1_62) {
--			pipe_config->dpll.p1 = 2;
--			pipe_config->dpll.p2 = 10;
--			pipe_config->dpll.n = 2;
--			pipe_config->dpll.m1 = 23;
--			pipe_config->dpll.m2 = 8;
--		} else {
--			pipe_config->dpll.p1 = 1;
--			pipe_config->dpll.p2 = 10;
--			pipe_config->dpll.n = 1;
--			pipe_config->dpll.m1 = 14;
--			pipe_config->dpll.m2 = 2;
--		}
--		pipe_config->clock_set = true;
-+		divisor = gen4_dpll;
-+		count = ARRAY_SIZE(gen4_dpll);
- 	} else if (IS_HASWELL(dev)) {
- 		/* Haswell has special-purpose DP DDI clocks. */
- 	} else if (HAS_PCH_SPLIT(dev)) {
--		if (link_bw == DP_LINK_BW_1_62) {
--			pipe_config->dpll.n = 1;
--			pipe_config->dpll.p1 = 2;
--			pipe_config->dpll.p2 = 10;
--			pipe_config->dpll.m1 = 12;
--			pipe_config->dpll.m2 = 9;
--		} else {
--			pipe_config->dpll.n = 2;
--			pipe_config->dpll.p1 = 1;
--			pipe_config->dpll.p2 = 10;
--			pipe_config->dpll.m1 = 14;
--			pipe_config->dpll.m2 = 8;
--		}
--		pipe_config->clock_set = true;
-+		divisor = pch_dpll;
-+		count = ARRAY_SIZE(pch_dpll);
- 	} else if (IS_VALLEYVIEW(dev)) {
- 		/* FIXME: Need to figure out optimized DP clocks for vlv. */
- 	}
-+
-+	if (divisor && count) {
-+		for (i = 0; i < count; i++) {
-+			if (link_bw == divisor[i].link_bw) {
-+				pipe_config->dpll = divisor[i].dpll;
-+				pipe_config->clock_set = true;
-+				break;
-+			}
-+		}
-+	}
- }
- 
- bool
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0796-drm-i915-Move-Valleyview-DP-DPLL-divisor-calc-to-int.patch b/patches.baytrail/0796-drm-i915-Move-Valleyview-DP-DPLL-divisor-calc-to-int.patch
deleted file mode 100644
index 3dcb604f3f46a..0000000000000
--- a/patches.baytrail/0796-drm-i915-Move-Valleyview-DP-DPLL-divisor-calc-to-int.patch
+++ /dev/null
@@ -1,107 +0,0 @@
-From ea24a069dbea000aa0d473025a0c7d1dc0b9ce26 Mon Sep 17 00:00:00 2001
-From: Chon Ming Lee <chon.ming.lee@intel.com>
-Date: Wed, 4 Sep 2013 01:30:38 +0800
-Subject: drm/i915: Move Valleyview DP DPLL divisor calc to intel_dp_set_clock
- v2
-
-For DP pll settings, there is only two golden configs.  Instead of
-running through the algorithm to determine it, hardcode the value and get it
-determine in intel_dp_set_clock.
-
-v2: Rework on the intel_limit compiler warning. (Jani)
-
-Signed-off-by: Chon Ming Lee <chon.ming.lee@intel.com>
-[danvet: Fix up checkpatch issues.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 65ce4bf5a15fcd4d15898be47795d0550eb2325c)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 20 +++-----------------
- drivers/gpu/drm/i915/intel_dp.c      | 10 +++++++++-
- 2 files changed, 12 insertions(+), 18 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 821991c0958f..6c6a31a228f4 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -339,19 +339,6 @@ static const intel_limit_t intel_limits_vlv_hdmi = {
- 		.p2_slow = 2, .p2_fast = 20 },
- };
- 
--static const intel_limit_t intel_limits_vlv_dp = {
--	.dot = { .min = 25000, .max = 270000 },
--	.vco = { .min = 4000000, .max = 6000000 },
--	.n = { .min = 1, .max = 7 },
--	.m = { .min = 22, .max = 450 },
--	.m1 = { .min = 2, .max = 3 },
--	.m2 = { .min = 11, .max = 156 },
--	.p = { .min = 10, .max = 30 },
--	.p1 = { .min = 1, .max = 3 },
--	.p2 = { .dot_limit = 270000,
--		.p2_slow = 2, .p2_fast = 20 },
--};
--
- static const intel_limit_t *intel_ironlake_limit(struct drm_crtc *crtc,
- 						int refclk)
- {
-@@ -414,10 +401,8 @@ static const intel_limit_t *intel_limit(struct drm_crtc *crtc, int refclk)
- 	} else if (IS_VALLEYVIEW(dev)) {
- 		if (intel_pipe_has_type(crtc, INTEL_OUTPUT_ANALOG))
- 			limit = &intel_limits_vlv_dac;
--		else if (intel_pipe_has_type(crtc, INTEL_OUTPUT_HDMI))
--			limit = &intel_limits_vlv_hdmi;
- 		else
--			limit = &intel_limits_vlv_dp;
-+			limit = &intel_limits_vlv_hdmi;
- 	} else if (!IS_GEN2(dev)) {
- 		if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS))
- 			limit = &intel_limits_i9xx_lvds;
-@@ -4896,7 +4881,7 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
- 
- 	refclk = i9xx_get_refclk(crtc, num_connectors);
- 
--	if (!is_dsi) {
-+	if (!is_dsi && !intel_crtc->config.clock_set) {
- 		/*
- 		 * Returns a set of divisors for the desired target clock with
- 		 * the given refclk, or FALSE.  The returned values represent
-@@ -4923,6 +4908,7 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
- 		 * by using the FP0/FP1. In such case we will disable the LVDS
- 		 * downclock feature.
- 		*/
-+		limit = intel_limit(crtc, refclk);
- 		has_reduced_clock =
- 			dev_priv->display.find_dpll(limit, crtc,
- 						    dev_priv->lvds_downclock,
-diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
-index 38d15ad9cde1..0dfe1bef88cd 100644
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -57,6 +57,13 @@ static const struct dp_link_dpll pch_dpll[] = {
- 		{ .p1 = 1, .p2 = 10, .n = 2, .m1 = 14, .m2 = 8 } }
- };
- 
-+static const struct dp_link_dpll vlv_dpll[] = {
-+	{ DP_LINK_BW_1_62,
-+		{ .p1 = 3, .p2 = 2, .n = 5, .m1 = 5, .m2 = 3 } },
-+	{ DP_LINK_BW_2_7,
-+		{ .p1 = 2, .p2 = 2, .n = 1, .m1 = 2, .m2 = 27 } }
-+};
-+
- /**
-  * is_edp - is the given port attached to an eDP panel (either CPU or PCH)
-  * @intel_dp: DP struct
-@@ -691,7 +698,8 @@ intel_dp_set_clock(struct intel_encoder *encoder,
- 		divisor = pch_dpll;
- 		count = ARRAY_SIZE(pch_dpll);
- 	} else if (IS_VALLEYVIEW(dev)) {
--		/* FIXME: Need to figure out optimized DP clocks for vlv. */
-+		divisor = vlv_dpll;
-+		count = ARRAY_SIZE(vlv_dpll);
- 	}
- 
- 	if (divisor && count) {
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0797-drm-i915-Kill-IRONLAKE_FDI_FREQ-check.patch b/patches.baytrail/0797-drm-i915-Kill-IRONLAKE_FDI_FREQ-check.patch
deleted file mode 100644
index 5f55813eb173a..0000000000000
--- a/patches.baytrail/0797-drm-i915-Kill-IRONLAKE_FDI_FREQ-check.patch
+++ /dev/null
@@ -1,53 +0,0 @@
-From 21f799eef0c59a65f9e271181a5a821b15a37a44 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Tue, 3 Sep 2013 13:31:38 +0300
-Subject: drm/i915: Kill IRONLAKE_FDI_FREQ check
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-ironlake_fdi_compute_config() already checks that we have enough
-FDI bandwidth. And it doesn't just use a hardcoded value but takes
-into account factors such as the actual FDI frequency, shared FDI
-B/C lanes, etc.
-
-Suggested-by: Daniel Vetter <daniel@ffwll.ch>
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit b315fedf01ac717f1c2a5eaa6959335b6baf7150)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 10 ----------
- 1 file changed, 10 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 6c6a31a228f4..deb3acc52d3c 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -69,9 +69,6 @@ struct intel_limit {
- 	intel_p2_t	    p2;
- };
- 
--/* FDI */
--#define IRONLAKE_FDI_FREQ		2700000 /* in kHz for mode->clock */
--
- int
- intel_pch_rawclk(struct drm_device *dev)
- {
-@@ -4103,13 +4100,6 @@ static int intel_crtc_compute_config(struct intel_crtc *crtc,
- 	struct drm_device *dev = crtc->base.dev;
- 	struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
- 
--	if (HAS_PCH_SPLIT(dev)) {
--		/* FDI link clock is fixed at 2.7G */
--		if (pipe_config->requested_mode.clock * 3
--		    > IRONLAKE_FDI_FREQ * 4)
--			return -EINVAL;
--	}
--
- 	/* Cantiga+ cannot handle modes with a hsync front porch of 0.
- 	 * WaPruneModeWithIncorrectHsyncOffset:ctg,elk,ilk,snb,ivb,vlv,hsw.
- 	 */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0798-drm-i915-Rename-ring-outstanding_lazy_request.patch b/patches.baytrail/0798-drm-i915-Rename-ring-outstanding_lazy_request.patch
deleted file mode 100644
index 9db5923344608..0000000000000
--- a/patches.baytrail/0798-drm-i915-Rename-ring-outstanding_lazy_request.patch
+++ /dev/null
@@ -1,139 +0,0 @@
-From 0102b9e9532563e5fee0cc4efdbf3009801b3bd3 Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Wed, 4 Sep 2013 10:45:51 +0100
-Subject: drm/i915: Rename ring->outstanding_lazy_request
-
-Prior to preallocating an request for lazy emission, rename the existing
-field to make way (and differentiate the seqno from the request struct).
-
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 1823521d2b2fa614e7ad95fdc8a0f59e571f37ce)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem.c         |    4 ++--
- drivers/gpu/drm/i915/intel_ringbuffer.c |   18 +++++++++---------
- drivers/gpu/drm/i915/intel_ringbuffer.h |    6 +++---
- 3 files changed, 14 insertions(+), 14 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -964,7 +964,7 @@ i915_gem_check_olr(struct intel_ring_buf
- 	BUG_ON(!mutex_is_locked(&ring->dev->struct_mutex));
- 
- 	ret = 0;
--	if (seqno == ring->outstanding_lazy_request)
-+	if (seqno == ring->outstanding_lazy_seqno)
- 		ret = i915_add_request(ring, NULL);
- 
- 	return ret;
-@@ -2094,7 +2094,7 @@ int __i915_add_request(struct intel_ring
- 	}
- 
- 	trace_i915_gem_request_add(ring, request->seqno);
--	ring->outstanding_lazy_request = 0;
-+	ring->outstanding_lazy_seqno = 0;
- 
- 	if (!dev_priv->ums.mm_suspended) {
- 		i915_queue_hangcheck(ring->dev);
---- a/drivers/gpu/drm/i915/intel_ringbuffer.c
-+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
-@@ -593,7 +593,7 @@ update_mboxes(struct intel_ring_buffer *
- #define MBOX_UPDATE_DWORDS 4
- 	intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1));
- 	intel_ring_emit(ring, mmio_offset);
--	intel_ring_emit(ring, ring->outstanding_lazy_request);
-+	intel_ring_emit(ring, ring->outstanding_lazy_seqno);
- 	intel_ring_emit(ring, MI_NOOP);
- }
- 
-@@ -629,7 +629,7 @@ gen6_add_request(struct intel_ring_buffe
- 
- 	intel_ring_emit(ring, MI_STORE_DWORD_INDEX);
- 	intel_ring_emit(ring, I915_GEM_HWS_INDEX << MI_STORE_DWORD_INDEX_SHIFT);
--	intel_ring_emit(ring, ring->outstanding_lazy_request);
-+	intel_ring_emit(ring, ring->outstanding_lazy_seqno);
- 	intel_ring_emit(ring, MI_USER_INTERRUPT);
- 	intel_ring_advance(ring);
- 
-@@ -723,7 +723,7 @@ pc_render_add_request(struct intel_ring_
- 			PIPE_CONTROL_WRITE_FLUSH |
- 			PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE);
- 	intel_ring_emit(ring, ring->scratch.gtt_offset | PIPE_CONTROL_GLOBAL_GTT);
--	intel_ring_emit(ring, ring->outstanding_lazy_request);
-+	intel_ring_emit(ring, ring->outstanding_lazy_seqno);
- 	intel_ring_emit(ring, 0);
- 	PIPE_CONTROL_FLUSH(ring, scratch_addr);
- 	scratch_addr += 128; /* write to separate cachelines */
-@@ -742,7 +742,7 @@ pc_render_add_request(struct intel_ring_
- 			PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE |
- 			PIPE_CONTROL_NOTIFY);
- 	intel_ring_emit(ring, ring->scratch.gtt_offset | PIPE_CONTROL_GLOBAL_GTT);
--	intel_ring_emit(ring, ring->outstanding_lazy_request);
-+	intel_ring_emit(ring, ring->outstanding_lazy_seqno);
- 	intel_ring_emit(ring, 0);
- 	intel_ring_advance(ring);
- 
-@@ -963,7 +963,7 @@ i9xx_add_request(struct intel_ring_buffe
- 
- 	intel_ring_emit(ring, MI_STORE_DWORD_INDEX);
- 	intel_ring_emit(ring, I915_GEM_HWS_INDEX << MI_STORE_DWORD_INDEX_SHIFT);
--	intel_ring_emit(ring, ring->outstanding_lazy_request);
-+	intel_ring_emit(ring, ring->outstanding_lazy_seqno);
- 	intel_ring_emit(ring, MI_USER_INTERRUPT);
- 	intel_ring_advance(ring);
- 
-@@ -1475,7 +1475,7 @@ int intel_ring_idle(struct intel_ring_bu
- 	int ret;
- 
- 	/* We need to add any requests required to flush the objects and ring */
--	if (ring->outstanding_lazy_request) {
-+	if (ring->outstanding_lazy_seqno) {
- 		ret = i915_add_request(ring, NULL);
- 		if (ret)
- 			return ret;
-@@ -1495,10 +1495,10 @@ int intel_ring_idle(struct intel_ring_bu
- static int
- intel_ring_alloc_seqno(struct intel_ring_buffer *ring)
- {
--	if (ring->outstanding_lazy_request)
-+	if (ring->outstanding_lazy_seqno)
- 		return 0;
- 
--	return i915_gem_get_seqno(ring->dev, &ring->outstanding_lazy_request);
-+	return i915_gem_get_seqno(ring->dev, &ring->outstanding_lazy_seqno);
- }
- 
- static int __intel_ring_prepare(struct intel_ring_buffer *ring,
-@@ -1549,7 +1549,7 @@ void intel_ring_init_seqno(struct intel_
- {
- 	struct drm_i915_private *dev_priv = ring->dev->dev_private;
- 
--	BUG_ON(ring->outstanding_lazy_request);
-+	BUG_ON(ring->outstanding_lazy_seqno);
- 
- 	if (INTEL_INFO(ring->dev)->gen >= 6) {
- 		I915_WRITE(RING_SYNC_0(ring->mmio_base), 0);
---- a/drivers/gpu/drm/i915/intel_ringbuffer.h
-+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
-@@ -140,7 +140,7 @@ struct  intel_ring_buffer {
- 	/**
- 	 * Do we have some not yet emitted requests outstanding?
- 	 */
--	u32 outstanding_lazy_request;
-+	u32 outstanding_lazy_seqno;
- 	bool gpu_caches_dirty;
- 	bool fbc_dirty;
- 
-@@ -258,8 +258,8 @@ static inline u32 intel_ring_get_tail(st
- 
- static inline u32 intel_ring_get_seqno(struct intel_ring_buffer *ring)
- {
--	BUG_ON(ring->outstanding_lazy_request == 0);
--	return ring->outstanding_lazy_request;
-+	BUG_ON(ring->outstanding_lazy_seqno == 0);
-+	return ring->outstanding_lazy_seqno;
- }
- 
- static inline void i915_trace_irq_get(struct intel_ring_buffer *ring, u32 seqno)
diff --git a/patches.baytrail/0799-drm-i915-Preallocate-the-lazy-request.patch b/patches.baytrail/0799-drm-i915-Preallocate-the-lazy-request.patch
deleted file mode 100644
index f8bb23658bec5..0000000000000
--- a/patches.baytrail/0799-drm-i915-Preallocate-the-lazy-request.patch
+++ /dev/null
@@ -1,94 +0,0 @@
-From 1fa192d4e30a0fad3f3acddcc18c971f17767c5a Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Wed, 4 Sep 2013 10:45:52 +0100
-Subject: drm/i915; Preallocate the lazy request
-
-It is possible for us to be forced to perform an allocation for the lazy
-request whilst running the shrinker. This allocation may fail, leaving
-us unable to reclaim any memory leading to premature OOM. A neat
-solution to the problem is to preallocate the request at the same time
-as acquiring the seqno for the ring transaction. This means that we can
-report ENOMEM prior to touching the rings.
-
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 3c0e234c847318304c12f9e7fffac7e1cf3db3ff)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem.c         |  9 ++++-----
- drivers/gpu/drm/i915/intel_ringbuffer.c | 10 ++++++++++
- drivers/gpu/drm/i915/intel_ringbuffer.h |  1 +
- 3 files changed, 15 insertions(+), 5 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index 858e78886637..399e159016e2 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -2041,8 +2041,8 @@ int __i915_add_request(struct intel_ring_buffer *ring,
- 	if (ret)
- 		return ret;
- 
--	request = kmalloc(sizeof(*request), GFP_KERNEL);
--	if (request == NULL)
-+	request = ring->preallocated_lazy_request;
-+	if (WARN_ON(request == NULL))
- 		return -ENOMEM;
- 
- 	/* Record the position of the start of the request so that
-@@ -2053,10 +2053,8 @@ int __i915_add_request(struct intel_ring_buffer *ring,
- 	request_ring_position = intel_ring_get_tail(ring);
- 
- 	ret = ring->add_request(ring);
--	if (ret) {
--		kfree(request);
-+	if (ret)
- 		return ret;
--	}
- 
- 	request->seqno = intel_ring_get_seqno(ring);
- 	request->ring = ring;
-@@ -2095,6 +2093,7 @@ int __i915_add_request(struct intel_ring_buffer *ring,
- 
- 	trace_i915_gem_request_add(ring, request->seqno);
- 	ring->outstanding_lazy_seqno = 0;
-+	ring->preallocated_lazy_request = NULL;
- 
- 	if (!dev_priv->ums.mm_suspended) {
- 		i915_queue_hangcheck(ring->dev);
-diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
-index a83ff1863a5e..284afaf5d6ff 100644
---- a/drivers/gpu/drm/i915/intel_ringbuffer.c
-+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
-@@ -1498,6 +1498,16 @@ intel_ring_alloc_seqno(struct intel_ring_buffer *ring)
- 	if (ring->outstanding_lazy_seqno)
- 		return 0;
- 
-+	if (ring->preallocated_lazy_request == NULL) {
-+		struct drm_i915_gem_request *request;
-+
-+		request = kmalloc(sizeof(*request), GFP_KERNEL);
-+		if (request == NULL)
-+			return -ENOMEM;
-+
-+		ring->preallocated_lazy_request = request;
-+	}
-+
- 	return i915_gem_get_seqno(ring->dev, &ring->outstanding_lazy_seqno);
- }
- 
-diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
-index c6aa2b3c8c26..ad2dd65c63f8 100644
---- a/drivers/gpu/drm/i915/intel_ringbuffer.h
-+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
-@@ -140,6 +140,7 @@ struct  intel_ring_buffer {
- 	/**
- 	 * Do we have some not yet emitted requests outstanding?
- 	 */
-+	struct drm_i915_gem_request *preallocated_lazy_request;
- 	u32 outstanding_lazy_seqno;
- 	bool gpu_caches_dirty;
- 	bool fbc_dirty;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0800-drm-i915-Hold-an-object-reference-whilst-we-shrink-i.patch b/patches.baytrail/0800-drm-i915-Hold-an-object-reference-whilst-we-shrink-i.patch
deleted file mode 100644
index e14b0fe0dc0ae..0000000000000
--- a/patches.baytrail/0800-drm-i915-Hold-an-object-reference-whilst-we-shrink-i.patch
+++ /dev/null
@@ -1,158 +0,0 @@
-From 07ceea7eeb3262edc75c9b4113a47ed46bbab6d9 Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Wed, 4 Sep 2013 10:45:50 +0100
-Subject: drm/i915: Hold an object reference whilst we shrink it
-
-Whilst running the shrinker, we need to hold a reference as we unbind
-the objects, or else we may end up waiting for and retiring requests,
-which in turn may result in this object being freed.
-
-This is very similar to the eviction code which also has to be very
-careful to keep a reference to its objects as it retires and unbinds
-them.
-
-Another similarity, that Ben pointed out, is that as we may call
-retire-requests, the unbound_list is outside of our control. We must
-only process a single element of that list at a time, that is we can not
-rely on the "safe" next pointer being valid after a call to
-i915_vma_unbind().
-
-  BUG: unable to handle kernel NULL pointer dereference at 0000000000000008
-  IP: [<ffffffffa0082892>] i915_gem_gtt_finish_object+0x68/0xbd [i915]
-  PGD 758d3067 PUD ac0d6067 PMD 0
-  Oops: 0000 [#1] SMP
-  Modules linked in: dm_mod snd_hda_codec_realtek iTCO_wdt iTCO_vendor_support pcspkr snd_hda_intel i2c_i801 snd_hda_codec snd_hwdep snd_pcm snd_page_alloc snd_timer snd lpc_ich mfd_core soundcore battery ac option usb_wwan usbserial uvcvideo videobuf2_vmalloc videobuf2_memops videobuf2_core videodev i915 video button drm_kms_helper drm acpi_cpufreq mperf freq_table
-  CPU: 1 PID: 16835 Comm: fbo-maxsize Not tainted 3.11.0-rc7_nightlytop_8fdad4_20130902_+ #7977
-  task: ffff8800712106d0 ti: ffff880028e4a000 task.ti: ffff880028e4a000
-  RIP: 0010:[<ffffffffa0082892>]  [<ffffffffa0082892>] i915_gem_gtt_finish_object+0x68/0xbd [i915]
-  RSP: 0018:ffff880028e4b9e8  EFLAGS: 00010246
-  RAX: 0000000000000000 RBX: ffff880145734000 RCX: ffff880145735328
-  RDX: ffff8801457353fc RSI: 0000000000000000 RDI: ffff88007597cc00
-  RBP: ffff88007597cc00 R08: 0000000000000001 R09: ffff88014f257f00
-  R10: ffffea0001d65f00 R11: 0000000000bba60b R12: ffff880149e5b000
-  R13: ffff880145734001 R14: ffff88007597ccc8 R15: ffff88007597cc00
-  FS:  00007ff5bc919740(0000) GS:ffff88014f240000(0000) knlGS:0000000000000000
-  CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
-  CR2: 0000000000000008 CR3: 0000000028f4c000 CR4: 00000000001407e0
-  DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000
-  DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400
-  Stack:
-   0000000000000000 ffff88007597cc00 ffff8801440d6840 0000000000000000
-   ffff880145734000 ffffffffa007c854 0000000000000010 ffff88007597c900
-   0000000000018000 00000000004a1201 ffff88007597cc60 ffffffffa007d183
-  Call Trace:
-   [<ffffffffa007c854>] ? i915_vma_unbind+0xe2/0x1d1 [i915]
-   [<ffffffffa007d183>] ? __i915_gem_shrink+0xf1/0x162 [i915]
-   [<ffffffffa007d2ee>] ? i915_gem_object_get_pages_gtt+0xfa/0x303 [i915]
-   [<ffffffffa00795f4>] ? i915_gem_object_get_pages+0x54/0x89 [i915]
-   [<ffffffffa007cbda>] ? i915_gem_object_pin+0x238/0x5ce [i915]
-   [<ffffffff812cba5f>] ? __sg_page_iter_next+0x2b/0x58
-   [<ffffffffa0082056>] ? gen6_ppgtt_insert_entries+0xf2/0x114 [i915]
-   [<ffffffffa007fe4b>] ? i915_gem_execbuffer_reserve_vma.isra.13+0x79/0x18d [i915]
-   [<ffffffffa008017c>] ? i915_gem_execbuffer_reserve+0x21d/0x347 [i915]
-   [<ffffffffa0080bfb>] ? i915_gem_do_execbuffer.isra.17+0x4f3/0xe61 [i915]
-   [<ffffffffa00795f4>] ? i915_gem_object_get_pages+0x54/0x89 [i915]
-   [<ffffffffa007e405>] ? i915_gem_pwrite_ioctl+0x743/0x7a5 [i915]
-   [<ffffffffa0081a46>] ? i915_gem_execbuffer2+0x15e/0x1e4 [i915]
-   [<ffffffffa000e20d>] ? drm_ioctl+0x2a5/0x3c4 [drm]
-   [<ffffffffa00818e8>] ? i915_gem_execbuffer+0x37f/0x37f [i915]
-   [<ffffffff816f64c0>] ? __do_page_fault+0x3ab/0x449
-   [<ffffffff810be3da>] ? do_mmap_pgoff+0x2b2/0x341
-   [<ffffffff810e49be>] ? vfs_ioctl+0x1e/0x31
-   [<ffffffff810e5194>] ? do_vfs_ioctl+0x3ad/0x3ef
-   [<ffffffff810e5224>] ? SyS_ioctl+0x4e/0x7e
-   [<ffffffff816f88d2>] ? system_call_fastpath+0x16/0x1b
-  Code: 52 0c a0 48 c7 c6 22 30 0d a0 31 c0 e8 ef 00 f9 ff bf c6 a7 00 00 e8 90 5d 24 e1 f6 85 13 01 00 00 10 75 44 48 8b 85 18 01 00 00 <8b> 50 08 48 8b 30 49 8b 84 24 88 02 00 00 48 89 c7 48 81 c7 98
-  RIP  [<ffffffffa0082892>] i915_gem_gtt_finish_object+0x68/0xbd [i915]
-  RSP <ffff880028e4b9e8>
-  CR2: 0000000000000008
-
-Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=68171
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Cc: stable@vger.kernel.org
-[danvet: Bikeshed the comments a bit as discussed with Chris.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 57094f82465002fbde1447e2fd850e1179bf6d86)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem.c | 45 +++++++++++++++++++++++++++++++++++------
- 1 file changed, 39 insertions(+), 6 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index 399e159016e2..f0884a949a1f 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -1695,6 +1695,7 @@ static long
- __i915_gem_shrink(struct drm_i915_private *dev_priv, long target,
- 		  bool purgeable_only)
- {
-+	struct list_head still_bound_list;
- 	struct drm_i915_gem_object *obj, *next;
- 	long count = 0;
- 
-@@ -1709,23 +1710,55 @@ __i915_gem_shrink(struct drm_i915_private *dev_priv, long target,
- 		}
- 	}
- 
--	list_for_each_entry_safe(obj, next, &dev_priv->mm.bound_list,
--				 global_list) {
-+	/*
-+	 * As we may completely rewrite the bound list whilst unbinding
-+	 * (due to retiring requests) we have to strictly process only
-+	 * one element of the list at the time, and recheck the list
-+	 * on every iteration.
-+	 */
-+	INIT_LIST_HEAD(&still_bound_list);
-+	while (count < target && !list_empty(&dev_priv->mm.bound_list)) {
- 		struct i915_vma *vma, *v;
- 
-+		obj = list_first_entry(&dev_priv->mm.bound_list,
-+				       typeof(*obj), global_list);
-+		list_move_tail(&obj->global_list, &still_bound_list);
-+
- 		if (!i915_gem_object_is_purgeable(obj) && purgeable_only)
- 			continue;
- 
-+		/*
-+		 * Hold a reference whilst we unbind this object, as we may
-+		 * end up waiting for and retiring requests. This might
-+		 * release the final reference (held by the active list)
-+		 * and result in the object being freed from under us.
-+		 * in this object being freed.
-+		 *
-+		 * Note 1: Shrinking the bound list is special since only active
-+		 * (and hence bound objects) can contain such limbo objects, so
-+		 * we don't need special tricks for shrinking the unbound list.
-+		 * The only other place where we have to be careful with active
-+		 * objects suddenly disappearing due to retiring requests is the
-+		 * eviction code.
-+		 *
-+		 * Note 2: Even though the bound list doesn't hold a reference
-+		 * to the object we can safely grab one here: The final object
-+		 * unreferencing and the bound_list are both protected by the
-+		 * dev->struct_mutex and so we won't ever be able to observe an
-+		 * object on the bound_list with a reference count equals 0.
-+		 */
-+		drm_gem_object_reference(&obj->base);
-+
- 		list_for_each_entry_safe(vma, v, &obj->vma_list, vma_link)
- 			if (i915_vma_unbind(vma))
- 				break;
- 
--		if (!i915_gem_object_put_pages(obj)) {
-+		if (i915_gem_object_put_pages(obj) == 0)
- 			count += obj->base.size >> PAGE_SHIFT;
--			if (count >= target)
--				return count;
--		}
-+
-+		drm_gem_object_unreference(&obj->base);
- 	}
-+	list_splice(&still_bound_list, &dev_priv->mm.bound_list);
- 
- 	return count;
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0801-drm-i915-Skip-stolen-region-initialisation-if-none-i.patch b/patches.baytrail/0801-drm-i915-Skip-stolen-region-initialisation-if-none-i.patch
deleted file mode 100644
index dd7b1c2dd9233..0000000000000
--- a/patches.baytrail/0801-drm-i915-Skip-stolen-region-initialisation-if-none-i.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From 65f2908bfcb0715d7b591307323cf6226842c770 Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Thu, 5 Sep 2013 13:40:25 +0100
-Subject: drm/i915: Skip stolen region initialisation if none is reserved
-
-Paulo reported that if he set the amount of reserved memory to 0, then
-we emitted a warning about a conflict before disabling our use of stolen
-memory. This was introduced with
-
-commit eaba1b8f3379b5d100bd146b9a41d28348bdfd09
-Author: Chris Wilson <chris@chris-wilson.co.uk>
-Date:   Thu Jul 4 12:28:35 2013 +0100
-
-    drm/i915: Verify that our stolen memory doesn't conflict
-
-and is simply fixed by checking for a no reservation first.
-
-Reported-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 6644a4e9422fe19293599d1fef0bd292f4ca72a6)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem_stolen.c | 3 +++
- 1 file changed, 3 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem_stolen.c b/drivers/gpu/drm/i915/i915_gem_stolen.c
-index b902f2afc8e2..d284d892ed94 100644
---- a/drivers/gpu/drm/i915/i915_gem_stolen.c
-+++ b/drivers/gpu/drm/i915/i915_gem_stolen.c
-@@ -201,6 +201,9 @@ int i915_gem_init_stolen(struct drm_device *dev)
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	int bios_reserved = 0;
- 
-+	if (dev_priv->gtt.stolen_size == 0)
-+		return 0;
-+
- 	dev_priv->mm.stolen_base = i915_stolen_to_physical(dev);
- 	if (dev_priv->mm.stolen_base == 0)
- 		return 0;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0802-drm-i915-Add-additional-pipe-parameter-for-vlv_dpio_.patch b/patches.baytrail/0802-drm-i915-Add-additional-pipe-parameter-for-vlv_dpio_.patch
deleted file mode 100644
index e4430a4b889a2..0000000000000
--- a/patches.baytrail/0802-drm-i915-Add-additional-pipe-parameter-for-vlv_dpio_.patch
+++ /dev/null
@@ -1,465 +0,0 @@
-From 85cc5dd21d15321275ab8adc5f06b8d62a875f30 Mon Sep 17 00:00:00 2001
-From: Chon Ming Lee <chon.ming.lee@intel.com>
-Date: Thu, 5 Sep 2013 20:41:49 +0800
-Subject: drm/i915: Add additional pipe parameter for vlv_dpio_read and
- vlv_dpio_write. v2
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The patch doesn't contain functional change, but is to prepare for
-future platform which has different DPIO phy.  The additional pipe
-parameter will use to select which phy to target for.
-
-v2: Update the commit message and add static for the new function.
-(Jani/Ville)
-
-Signed-off-by: Chon Ming Lee <chon.ming.lee@intel.com>
-Reviewed-by: Jani Nikula <jani.nikula@intel.com>
-Acked-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 5e69f97fb39ea660075e6b65a1de33247b53f9d4)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_debugfs.c   | 18 ++++++-------
- drivers/gpu/drm/i915/i915_drv.h       |  4 +--
- drivers/gpu/drm/i915/intel_display.c  | 51 ++++++++++++++++++-----------------
- drivers/gpu/drm/i915/intel_dp.c       | 38 +++++++++++++++-----------
- drivers/gpu/drm/i915/intel_hdmi.c     | 48 ++++++++++++++++++---------------
- drivers/gpu/drm/i915/intel_sideband.c | 18 +++++++++----
- 6 files changed, 99 insertions(+), 78 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
-index a6f4cb5af185..9ac4e3182112 100644
---- a/drivers/gpu/drm/i915/i915_debugfs.c
-+++ b/drivers/gpu/drm/i915/i915_debugfs.c
-@@ -1610,27 +1610,27 @@ static int i915_dpio_info(struct seq_file *m, void *data)
- 	seq_printf(m, "DPIO_CTL: 0x%08x\n", I915_READ(DPIO_CTL));
- 
- 	seq_printf(m, "DPIO_DIV_A: 0x%08x\n",
--		   vlv_dpio_read(dev_priv, _DPIO_DIV_A));
-+		   vlv_dpio_read(dev_priv, PIPE_A, _DPIO_DIV_A));
- 	seq_printf(m, "DPIO_DIV_B: 0x%08x\n",
--		   vlv_dpio_read(dev_priv, _DPIO_DIV_B));
-+		   vlv_dpio_read(dev_priv, PIPE_A, _DPIO_DIV_B));
- 
- 	seq_printf(m, "DPIO_REFSFR_A: 0x%08x\n",
--		   vlv_dpio_read(dev_priv, _DPIO_REFSFR_A));
-+		   vlv_dpio_read(dev_priv, PIPE_A, _DPIO_REFSFR_A));
- 	seq_printf(m, "DPIO_REFSFR_B: 0x%08x\n",
--		   vlv_dpio_read(dev_priv, _DPIO_REFSFR_B));
-+		   vlv_dpio_read(dev_priv, PIPE_A, _DPIO_REFSFR_B));
- 
- 	seq_printf(m, "DPIO_CORE_CLK_A: 0x%08x\n",
--		   vlv_dpio_read(dev_priv, _DPIO_CORE_CLK_A));
-+		   vlv_dpio_read(dev_priv, PIPE_A, _DPIO_CORE_CLK_A));
- 	seq_printf(m, "DPIO_CORE_CLK_B: 0x%08x\n",
--		   vlv_dpio_read(dev_priv, _DPIO_CORE_CLK_B));
-+		   vlv_dpio_read(dev_priv, PIPE_A, _DPIO_CORE_CLK_B));
- 
- 	seq_printf(m, "DPIO_LPF_COEFF_A: 0x%08x\n",
--		   vlv_dpio_read(dev_priv, _DPIO_LPF_COEFF_A));
-+		   vlv_dpio_read(dev_priv, PIPE_A, _DPIO_LPF_COEFF_A));
- 	seq_printf(m, "DPIO_LPF_COEFF_B: 0x%08x\n",
--		   vlv_dpio_read(dev_priv, _DPIO_LPF_COEFF_B));
-+		   vlv_dpio_read(dev_priv, PIPE_A, _DPIO_LPF_COEFF_B));
- 
- 	seq_printf(m, "DPIO_FASTCLK_DISABLE: 0x%08x\n",
--		   vlv_dpio_read(dev_priv, DPIO_FASTCLK_DISABLE));
-+		   vlv_dpio_read(dev_priv, PIPE_A, DPIO_FASTCLK_DISABLE));
- 
- 	mutex_unlock(&dev_priv->dpio_lock);
- 
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 769c1388a69e..e357995a6aad 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -2282,8 +2282,8 @@ u32 vlv_ccu_read(struct drm_i915_private *dev_priv, u32 reg);
- void vlv_ccu_write(struct drm_i915_private *dev_priv, u32 reg, u32 val);
- u32 vlv_gps_core_read(struct drm_i915_private *dev_priv, u32 reg);
- void vlv_gps_core_write(struct drm_i915_private *dev_priv, u32 reg, u32 val);
--u32 vlv_dpio_read(struct drm_i915_private *dev_priv, int reg);
--void vlv_dpio_write(struct drm_i915_private *dev_priv, int reg, u32 val);
-+u32 vlv_dpio_read(struct drm_i915_private *dev_priv, enum pipe pipe, int reg);
-+void vlv_dpio_write(struct drm_i915_private *dev_priv, enum pipe pipe, int reg, u32 val);
- u32 intel_sbi_read(struct drm_i915_private *dev_priv, u16 reg,
- 		   enum intel_sbi_destination destination);
- void intel_sbi_write(struct drm_i915_private *dev_priv, u16 reg, u32 value,
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index deb3acc52d3c..67b5e2799ec4 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -4350,7 +4350,8 @@ static void i9xx_update_pll_dividers(struct intel_crtc *crtc,
- 	}
- }
- 
--static void vlv_pllb_recal_opamp(struct drm_i915_private *dev_priv)
-+static void vlv_pllb_recal_opamp(struct drm_i915_private *dev_priv, enum pipe
-+		pipe)
- {
- 	u32 reg_val;
- 
-@@ -4358,24 +4359,24 @@ static void vlv_pllb_recal_opamp(struct drm_i915_private *dev_priv)
- 	 * PLLB opamp always calibrates to max value of 0x3f, force enable it
- 	 * and set it to a reasonable value instead.
- 	 */
--	reg_val = vlv_dpio_read(dev_priv, DPIO_IREF(1));
-+	reg_val = vlv_dpio_read(dev_priv, pipe, DPIO_IREF(1));
- 	reg_val &= 0xffffff00;
- 	reg_val |= 0x00000030;
--	vlv_dpio_write(dev_priv, DPIO_IREF(1), reg_val);
-+	vlv_dpio_write(dev_priv, pipe, DPIO_IREF(1), reg_val);
- 
--	reg_val = vlv_dpio_read(dev_priv, DPIO_CALIBRATION);
-+	reg_val = vlv_dpio_read(dev_priv, pipe, DPIO_CALIBRATION);
- 	reg_val &= 0x8cffffff;
- 	reg_val = 0x8c000000;
--	vlv_dpio_write(dev_priv, DPIO_CALIBRATION, reg_val);
-+	vlv_dpio_write(dev_priv, pipe, DPIO_CALIBRATION, reg_val);
- 
--	reg_val = vlv_dpio_read(dev_priv, DPIO_IREF(1));
-+	reg_val = vlv_dpio_read(dev_priv, pipe, DPIO_IREF(1));
- 	reg_val &= 0xffffff00;
--	vlv_dpio_write(dev_priv, DPIO_IREF(1), reg_val);
-+	vlv_dpio_write(dev_priv, pipe, DPIO_IREF(1), reg_val);
- 
--	reg_val = vlv_dpio_read(dev_priv, DPIO_CALIBRATION);
-+	reg_val = vlv_dpio_read(dev_priv, pipe, DPIO_CALIBRATION);
- 	reg_val &= 0x00ffffff;
- 	reg_val |= 0xb0000000;
--	vlv_dpio_write(dev_priv, DPIO_CALIBRATION, reg_val);
-+	vlv_dpio_write(dev_priv, pipe, DPIO_CALIBRATION, reg_val);
- }
- 
- static void intel_pch_transcoder_set_m_n(struct intel_crtc *crtc,
-@@ -4441,18 +4442,18 @@ static void vlv_update_pll(struct intel_crtc *crtc)
- 
- 	/* PLL B needs special handling */
- 	if (pipe)
--		vlv_pllb_recal_opamp(dev_priv);
-+		vlv_pllb_recal_opamp(dev_priv, pipe);
- 
- 	/* Set up Tx target for periodic Rcomp update */
--	vlv_dpio_write(dev_priv, DPIO_IREF_BCAST, 0x0100000f);
-+	vlv_dpio_write(dev_priv, pipe, DPIO_IREF_BCAST, 0x0100000f);
- 
- 	/* Disable target IRef on PLL */
--	reg_val = vlv_dpio_read(dev_priv, DPIO_IREF_CTL(pipe));
-+	reg_val = vlv_dpio_read(dev_priv, pipe, DPIO_IREF_CTL(pipe));
- 	reg_val &= 0x00ffffff;
--	vlv_dpio_write(dev_priv, DPIO_IREF_CTL(pipe), reg_val);
-+	vlv_dpio_write(dev_priv, pipe, DPIO_IREF_CTL(pipe), reg_val);
- 
- 	/* Disable fast lock */
--	vlv_dpio_write(dev_priv, DPIO_FASTCLK_DISABLE, 0x610);
-+	vlv_dpio_write(dev_priv, pipe, DPIO_FASTCLK_DISABLE, 0x610);
- 
- 	/* Set idtafcrecal before PLL is enabled */
- 	mdiv = ((bestm1 << DPIO_M1DIV_SHIFT) | (bestm2 & DPIO_M2DIV_MASK));
-@@ -4466,48 +4467,48 @@ static void vlv_update_pll(struct intel_crtc *crtc)
- 	 * Note: don't use the DAC post divider as it seems unstable.
- 	 */
- 	mdiv |= (DPIO_POST_DIV_HDMIDP << DPIO_POST_DIV_SHIFT);
--	vlv_dpio_write(dev_priv, DPIO_DIV(pipe), mdiv);
-+	vlv_dpio_write(dev_priv, pipe, DPIO_DIV(pipe), mdiv);
- 
- 	mdiv |= DPIO_ENABLE_CALIBRATION;
--	vlv_dpio_write(dev_priv, DPIO_DIV(pipe), mdiv);
-+	vlv_dpio_write(dev_priv, pipe, DPIO_DIV(pipe), mdiv);
- 
- 	/* Set HBR and RBR LPF coefficients */
- 	if (crtc->config.port_clock == 162000 ||
- 	    intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_ANALOG) ||
- 	    intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_HDMI))
--		vlv_dpio_write(dev_priv, DPIO_LPF_COEFF(pipe),
-+		vlv_dpio_write(dev_priv, pipe, DPIO_LPF_COEFF(pipe),
- 				 0x009f0003);
- 	else
--		vlv_dpio_write(dev_priv, DPIO_LPF_COEFF(pipe),
-+		vlv_dpio_write(dev_priv, pipe, DPIO_LPF_COEFF(pipe),
- 				 0x00d0000f);
- 
- 	if (intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_EDP) ||
- 	    intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_DISPLAYPORT)) {
- 		/* Use SSC source */
- 		if (!pipe)
--			vlv_dpio_write(dev_priv, DPIO_REFSFR(pipe),
-+			vlv_dpio_write(dev_priv, pipe, DPIO_REFSFR(pipe),
- 					 0x0df40000);
- 		else
--			vlv_dpio_write(dev_priv, DPIO_REFSFR(pipe),
-+			vlv_dpio_write(dev_priv, pipe, DPIO_REFSFR(pipe),
- 					 0x0df70000);
- 	} else { /* HDMI or VGA */
- 		/* Use bend source */
- 		if (!pipe)
--			vlv_dpio_write(dev_priv, DPIO_REFSFR(pipe),
-+			vlv_dpio_write(dev_priv, pipe, DPIO_REFSFR(pipe),
- 					 0x0df70000);
- 		else
--			vlv_dpio_write(dev_priv, DPIO_REFSFR(pipe),
-+			vlv_dpio_write(dev_priv, pipe, DPIO_REFSFR(pipe),
- 					 0x0df40000);
- 	}
- 
--	coreclk = vlv_dpio_read(dev_priv, DPIO_CORE_CLK(pipe));
-+	coreclk = vlv_dpio_read(dev_priv, pipe, DPIO_CORE_CLK(pipe));
- 	coreclk = (coreclk & 0x0000ff00) | 0x01c00000;
- 	if (intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_DISPLAYPORT) ||
- 	    intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_EDP))
- 		coreclk |= 0x01000000;
--	vlv_dpio_write(dev_priv, DPIO_CORE_CLK(pipe), coreclk);
-+	vlv_dpio_write(dev_priv, pipe, DPIO_CORE_CLK(pipe), coreclk);
- 
--	vlv_dpio_write(dev_priv, DPIO_PLL_CML(pipe), 0x87871000);
-+	vlv_dpio_write(dev_priv, pipe, DPIO_PLL_CML(pipe), 0x87871000);
- 
- 	/* Enable DPIO clock input */
- 	dpll = DPLL_EXT_BUFFER_ENABLE_VLV | DPLL_REFA_CLK_ENABLE_VLV |
-diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
-index 0dfe1bef88cd..a210160f7eb1 100644
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -1757,16 +1757,16 @@ static void vlv_pre_enable_dp(struct intel_encoder *encoder)
- 
- 	mutex_lock(&dev_priv->dpio_lock);
- 
--	val = vlv_dpio_read(dev_priv, DPIO_DATA_LANE_A(port));
-+	val = vlv_dpio_read(dev_priv, pipe, DPIO_DATA_LANE_A(port));
- 	val = 0;
- 	if (pipe)
- 		val |= (1<<21);
- 	else
- 		val &= ~(1<<21);
- 	val |= 0x001000c4;
--	vlv_dpio_write(dev_priv, DPIO_DATA_CHANNEL(port), val);
--	vlv_dpio_write(dev_priv, DPIO_PCS_CLOCKBUF0(port), 0x00760018);
--	vlv_dpio_write(dev_priv, DPIO_PCS_CLOCKBUF8(port), 0x00400888);
-+	vlv_dpio_write(dev_priv, pipe, DPIO_DATA_CHANNEL(port), val);
-+	vlv_dpio_write(dev_priv, pipe, DPIO_PCS_CLOCKBUF0(port), 0x00760018);
-+	vlv_dpio_write(dev_priv, pipe, DPIO_PCS_CLOCKBUF8(port), 0x00400888);
- 
- 	mutex_unlock(&dev_priv->dpio_lock);
- 
-@@ -1780,26 +1780,29 @@ static void intel_dp_pre_pll_enable(struct intel_encoder *encoder)
- 	struct intel_digital_port *dport = enc_to_dig_port(&encoder->base);
- 	struct drm_device *dev = encoder->base.dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct intel_crtc *intel_crtc =
-+		to_intel_crtc(encoder->base.crtc);
- 	int port = vlv_dport_to_channel(dport);
-+	int pipe = intel_crtc->pipe;
- 
- 	if (!IS_VALLEYVIEW(dev))
- 		return;
- 
- 	/* Program Tx lane resets to default */
- 	mutex_lock(&dev_priv->dpio_lock);
--	vlv_dpio_write(dev_priv, DPIO_PCS_TX(port),
-+	vlv_dpio_write(dev_priv, pipe, DPIO_PCS_TX(port),
- 			 DPIO_PCS_TX_LANE2_RESET |
- 			 DPIO_PCS_TX_LANE1_RESET);
--	vlv_dpio_write(dev_priv, DPIO_PCS_CLK(port),
-+	vlv_dpio_write(dev_priv, pipe, DPIO_PCS_CLK(port),
- 			 DPIO_PCS_CLK_CRI_RXEB_EIOS_EN |
- 			 DPIO_PCS_CLK_CRI_RXDIGFILTSG_EN |
- 			 (1<<DPIO_PCS_CLK_DATAWIDTH_SHIFT) |
- 				 DPIO_PCS_CLK_SOFT_RESET);
- 
- 	/* Fix up inter-pair skew failure */
--	vlv_dpio_write(dev_priv, DPIO_PCS_STAGGER1(port), 0x00750f00);
--	vlv_dpio_write(dev_priv, DPIO_TX_CTL(port), 0x00001500);
--	vlv_dpio_write(dev_priv, DPIO_TX_LANE(port), 0x40400000);
-+	vlv_dpio_write(dev_priv, pipe, DPIO_PCS_STAGGER1(port), 0x00750f00);
-+	vlv_dpio_write(dev_priv, pipe, DPIO_TX_CTL(port), 0x00001500);
-+	vlv_dpio_write(dev_priv, pipe, DPIO_TX_LANE(port), 0x40400000);
- 	mutex_unlock(&dev_priv->dpio_lock);
- }
- 
-@@ -1934,10 +1937,13 @@ static uint32_t intel_vlv_signal_levels(struct intel_dp *intel_dp)
- 	struct drm_device *dev = intel_dp_to_dev(intel_dp);
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct intel_digital_port *dport = dp_to_dig_port(intel_dp);
-+	struct intel_crtc *intel_crtc =
-+		to_intel_crtc(dport->base.base.crtc);
- 	unsigned long demph_reg_value, preemph_reg_value,
- 		uniqtranscale_reg_value;
- 	uint8_t train_set = intel_dp->train_set[0];
- 	int port = vlv_dport_to_channel(dport);
-+	int pipe = intel_crtc->pipe;
- 
- 	switch (train_set & DP_TRAIN_PRE_EMPHASIS_MASK) {
- 	case DP_TRAIN_PRE_EMPHASIS_0:
-@@ -2013,14 +2019,14 @@ static uint32_t intel_vlv_signal_levels(struct intel_dp *intel_dp)
- 	}
- 
- 	mutex_lock(&dev_priv->dpio_lock);
--	vlv_dpio_write(dev_priv, DPIO_TX_OCALINIT(port), 0x00000000);
--	vlv_dpio_write(dev_priv, DPIO_TX_SWING_CTL4(port), demph_reg_value);
--	vlv_dpio_write(dev_priv, DPIO_TX_SWING_CTL2(port),
-+	vlv_dpio_write(dev_priv, pipe, DPIO_TX_OCALINIT(port), 0x00000000);
-+	vlv_dpio_write(dev_priv, pipe, DPIO_TX_SWING_CTL4(port), demph_reg_value);
-+	vlv_dpio_write(dev_priv, pipe, DPIO_TX_SWING_CTL2(port),
- 			 uniqtranscale_reg_value);
--	vlv_dpio_write(dev_priv, DPIO_TX_SWING_CTL3(port), 0x0C782040);
--	vlv_dpio_write(dev_priv, DPIO_PCS_STAGGER0(port), 0x00030000);
--	vlv_dpio_write(dev_priv, DPIO_PCS_CTL_OVER1(port), preemph_reg_value);
--	vlv_dpio_write(dev_priv, DPIO_TX_OCALINIT(port), 0x80000000);
-+	vlv_dpio_write(dev_priv, pipe, DPIO_TX_SWING_CTL3(port), 0x0C782040);
-+	vlv_dpio_write(dev_priv, pipe, DPIO_PCS_STAGGER0(port), 0x00030000);
-+	vlv_dpio_write(dev_priv, pipe, DPIO_PCS_CTL_OVER1(port), preemph_reg_value);
-+	vlv_dpio_write(dev_priv, pipe, DPIO_TX_OCALINIT(port), 0x80000000);
- 	mutex_unlock(&dev_priv->dpio_lock);
- 
- 	return 0;
-diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
-index 4148cc85bf7f..70c716ed8350 100644
---- a/drivers/gpu/drm/i915/intel_hdmi.c
-+++ b/drivers/gpu/drm/i915/intel_hdmi.c
-@@ -1079,35 +1079,35 @@ static void intel_hdmi_pre_enable(struct intel_encoder *encoder)
- 
- 	/* Enable clock channels for this port */
- 	mutex_lock(&dev_priv->dpio_lock);
--	val = vlv_dpio_read(dev_priv, DPIO_DATA_LANE_A(port));
-+	val = vlv_dpio_read(dev_priv, pipe, DPIO_DATA_LANE_A(port));
- 	val = 0;
- 	if (pipe)
- 		val |= (1<<21);
- 	else
- 		val &= ~(1<<21);
- 	val |= 0x001000c4;
--	vlv_dpio_write(dev_priv, DPIO_DATA_CHANNEL(port), val);
-+	vlv_dpio_write(dev_priv, pipe, DPIO_DATA_CHANNEL(port), val);
- 
- 	/* HDMI 1.0V-2dB */
--	vlv_dpio_write(dev_priv, DPIO_TX_OCALINIT(port), 0);
--	vlv_dpio_write(dev_priv, DPIO_TX_SWING_CTL4(port),
-+	vlv_dpio_write(dev_priv, pipe, DPIO_TX_OCALINIT(port), 0);
-+	vlv_dpio_write(dev_priv, pipe, DPIO_TX_SWING_CTL4(port),
- 			 0x2b245f5f);
--	vlv_dpio_write(dev_priv, DPIO_TX_SWING_CTL2(port),
-+	vlv_dpio_write(dev_priv, pipe, DPIO_TX_SWING_CTL2(port),
- 			 0x5578b83a);
--	vlv_dpio_write(dev_priv, DPIO_TX_SWING_CTL3(port),
-+	vlv_dpio_write(dev_priv, pipe, DPIO_TX_SWING_CTL3(port),
- 			 0x0c782040);
--	vlv_dpio_write(dev_priv, DPIO_TX3_SWING_CTL4(port),
-+	vlv_dpio_write(dev_priv, pipe, DPIO_TX3_SWING_CTL4(port),
- 			 0x2b247878);
--	vlv_dpio_write(dev_priv, DPIO_PCS_STAGGER0(port), 0x00030000);
--	vlv_dpio_write(dev_priv, DPIO_PCS_CTL_OVER1(port),
-+	vlv_dpio_write(dev_priv, pipe, DPIO_PCS_STAGGER0(port), 0x00030000);
-+	vlv_dpio_write(dev_priv, pipe, DPIO_PCS_CTL_OVER1(port),
- 			 0x00002000);
--	vlv_dpio_write(dev_priv, DPIO_TX_OCALINIT(port),
-+	vlv_dpio_write(dev_priv, pipe, DPIO_TX_OCALINIT(port),
- 			 DPIO_TX_OCALINIT_EN);
- 
- 	/* Program lane clock */
--	vlv_dpio_write(dev_priv, DPIO_PCS_CLOCKBUF0(port),
-+	vlv_dpio_write(dev_priv, pipe, DPIO_PCS_CLOCKBUF0(port),
- 			 0x00760018);
--	vlv_dpio_write(dev_priv, DPIO_PCS_CLOCKBUF8(port),
-+	vlv_dpio_write(dev_priv, pipe, DPIO_PCS_CLOCKBUF8(port),
- 			 0x00400888);
- 	mutex_unlock(&dev_priv->dpio_lock);
- 
-@@ -1121,30 +1121,33 @@ static void intel_hdmi_pre_pll_enable(struct intel_encoder *encoder)
- 	struct intel_digital_port *dport = enc_to_dig_port(&encoder->base);
- 	struct drm_device *dev = encoder->base.dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct intel_crtc *intel_crtc =
-+		to_intel_crtc(encoder->base.crtc);
- 	int port = vlv_dport_to_channel(dport);
-+	int pipe = intel_crtc->pipe;
- 
- 	if (!IS_VALLEYVIEW(dev))
- 		return;
- 
- 	/* Program Tx lane resets to default */
- 	mutex_lock(&dev_priv->dpio_lock);
--	vlv_dpio_write(dev_priv, DPIO_PCS_TX(port),
-+	vlv_dpio_write(dev_priv, pipe, DPIO_PCS_TX(port),
- 			 DPIO_PCS_TX_LANE2_RESET |
- 			 DPIO_PCS_TX_LANE1_RESET);
--	vlv_dpio_write(dev_priv, DPIO_PCS_CLK(port),
-+	vlv_dpio_write(dev_priv, pipe, DPIO_PCS_CLK(port),
- 			 DPIO_PCS_CLK_CRI_RXEB_EIOS_EN |
- 			 DPIO_PCS_CLK_CRI_RXDIGFILTSG_EN |
- 			 (1<<DPIO_PCS_CLK_DATAWIDTH_SHIFT) |
- 			 DPIO_PCS_CLK_SOFT_RESET);
- 
- 	/* Fix up inter-pair skew failure */
--	vlv_dpio_write(dev_priv, DPIO_PCS_STAGGER1(port), 0x00750f00);
--	vlv_dpio_write(dev_priv, DPIO_TX_CTL(port), 0x00001500);
--	vlv_dpio_write(dev_priv, DPIO_TX_LANE(port), 0x40400000);
-+	vlv_dpio_write(dev_priv, pipe, DPIO_PCS_STAGGER1(port), 0x00750f00);
-+	vlv_dpio_write(dev_priv, pipe, DPIO_TX_CTL(port), 0x00001500);
-+	vlv_dpio_write(dev_priv, pipe, DPIO_TX_LANE(port), 0x40400000);
- 
--	vlv_dpio_write(dev_priv, DPIO_PCS_CTL_OVER1(port),
-+	vlv_dpio_write(dev_priv, pipe, DPIO_PCS_CTL_OVER1(port),
- 			 0x00002000);
--	vlv_dpio_write(dev_priv, DPIO_TX_OCALINIT(port),
-+	vlv_dpio_write(dev_priv, pipe, DPIO_TX_OCALINIT(port),
- 			 DPIO_TX_OCALINIT_EN);
- 	mutex_unlock(&dev_priv->dpio_lock);
- }
-@@ -1153,12 +1156,15 @@ static void intel_hdmi_post_disable(struct intel_encoder *encoder)
- {
- 	struct intel_digital_port *dport = enc_to_dig_port(&encoder->base);
- 	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
-+	struct intel_crtc *intel_crtc =
-+		to_intel_crtc(encoder->base.crtc);
- 	int port = vlv_dport_to_channel(dport);
-+	int pipe = intel_crtc->pipe;
- 
- 	/* Reset lanes to avoid HDMI flicker (VLV w/a) */
- 	mutex_lock(&dev_priv->dpio_lock);
--	vlv_dpio_write(dev_priv, DPIO_PCS_TX(port), 0x00000000);
--	vlv_dpio_write(dev_priv, DPIO_PCS_CLK(port), 0x00e00060);
-+	vlv_dpio_write(dev_priv, pipe, DPIO_PCS_TX(port), 0x00000000);
-+	vlv_dpio_write(dev_priv, pipe, DPIO_PCS_CLK(port), 0x00e00060);
- 	mutex_unlock(&dev_priv->dpio_lock);
- }
- 
-diff --git a/drivers/gpu/drm/i915/intel_sideband.c b/drivers/gpu/drm/i915/intel_sideband.c
-index 0a4167019769..acd1cfe8b7dd 100644
---- a/drivers/gpu/drm/i915/intel_sideband.c
-+++ b/drivers/gpu/drm/i915/intel_sideband.c
-@@ -157,19 +157,27 @@ void vlv_gps_core_write(struct drm_i915_private *dev_priv, u32 reg, u32 val)
- 			PUNIT_OPCODE_REG_WRITE, reg, &val);
- }
- 
--u32 vlv_dpio_read(struct drm_i915_private *dev_priv, int reg)
-+static u32 vlv_get_phy_port(enum pipe pipe)
-+{
-+	u32 port = IOSF_PORT_DPIO;
-+
-+	WARN_ON ((pipe != PIPE_A) && (pipe != PIPE_B));
-+
-+	return port;
-+}
-+
-+u32 vlv_dpio_read(struct drm_i915_private *dev_priv, enum pipe pipe, int reg)
- {
- 	u32 val = 0;
- 
--	vlv_sideband_rw(dev_priv, DPIO_DEVFN, IOSF_PORT_DPIO,
-+	vlv_sideband_rw(dev_priv, DPIO_DEVFN, vlv_get_phy_port(pipe),
- 			DPIO_OPCODE_REG_READ, reg, &val);
--
- 	return val;
- }
- 
--void vlv_dpio_write(struct drm_i915_private *dev_priv, int reg, u32 val)
-+void vlv_dpio_write(struct drm_i915_private *dev_priv, enum pipe pipe, int reg, u32 val)
- {
--	vlv_sideband_rw(dev_priv, DPIO_DEVFN, IOSF_PORT_DPIO,
-+	vlv_sideband_rw(dev_priv, DPIO_DEVFN, vlv_get_phy_port(pipe),
- 			DPIO_OPCODE_REG_WRITE, reg, &val);
- }
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0803-drm-i915-Remove-unused-mode_fixup-vfunc-of-struct-in.patch b/patches.baytrail/0803-drm-i915-Remove-unused-mode_fixup-vfunc-of-struct-in.patch
deleted file mode 100644
index e879b65e14683..0000000000000
--- a/patches.baytrail/0803-drm-i915-Remove-unused-mode_fixup-vfunc-of-struct-in.patch
+++ /dev/null
@@ -1,73 +0,0 @@
-From 1dba0737677901e73cda830774dbeffddc0f02d5 Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Thu, 5 Sep 2013 18:52:07 +0100
-Subject: drm/i915: Remove unused mode_fixup() vfunc of struct
- intel_dvo_dev_ops
-
-It's totally unused, so remove the last mode_fixup appearance in i915.
-
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit ce1424078bb16d9e06cd00c6f730592ba1aa377f)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/dvo.h        | 11 -----------
- drivers/gpu/drm/i915/intel_dvo.c  |  5 -----
- drivers/gpu/drm/i915/intel_sdvo.c |  3 ---
- 3 files changed, 19 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/dvo.h b/drivers/gpu/drm/i915/dvo.h
-index 33a62ad80100..312163379db9 100644
---- a/drivers/gpu/drm/i915/dvo.h
-+++ b/drivers/gpu/drm/i915/dvo.h
-@@ -77,17 +77,6 @@ struct intel_dvo_dev_ops {
- 			  struct drm_display_mode *mode);
- 
- 	/*
--	 * Callback to adjust the mode to be set in the CRTC.
--	 *
--	 * This allows an output to adjust the clock or even the entire set of
--	 * timings, which is used for panels with fixed timings or for
--	 * buses with clock limitations.
--	 */
--	bool (*mode_fixup)(struct intel_dvo_device *dvo,
--			   const struct drm_display_mode *mode,
--			   struct drm_display_mode *adjusted_mode);
--
--	/*
- 	 * Callback for preparing mode changes on an output
- 	 */
- 	void (*prepare)(struct intel_dvo_device *dvo);
-diff --git a/drivers/gpu/drm/i915/intel_dvo.c b/drivers/gpu/drm/i915/intel_dvo.c
-index 406303b509c1..ef5c12a1deda 100644
---- a/drivers/gpu/drm/i915/intel_dvo.c
-+++ b/drivers/gpu/drm/i915/intel_dvo.c
-@@ -265,11 +265,6 @@ static bool intel_dvo_compute_config(struct intel_encoder *encoder,
- #undef C
- 	}
- 
--	if (intel_dvo->dev.dev_ops->mode_fixup)
--		return intel_dvo->dev.dev_ops->mode_fixup(&intel_dvo->dev,
--							  &pipe_config->requested_mode,
--							  adjusted_mode);
--
- 	return true;
- }
- 
-diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
-index 85037b9d4934..9dc1697f79d3 100644
---- a/drivers/gpu/drm/i915/intel_sdvo.c
-+++ b/drivers/gpu/drm/i915/intel_sdvo.c
-@@ -1208,9 +1208,6 @@ static void intel_sdvo_mode_set(struct intel_encoder *intel_encoder)
- 	    !intel_sdvo_set_tv_format(intel_sdvo))
- 		return;
- 
--	/* We have tried to get input timing in mode_fixup, and filled into
--	 * adjusted_mode.
--	 */
- 	intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
- 	input_dtd.part1.clock /= crtc->config.pixel_multiplier;
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0804-drm-i915-Confine-page-flips-to-BCS-on-Valleyview.patch b/patches.baytrail/0804-drm-i915-Confine-page-flips-to-BCS-on-Valleyview.patch
deleted file mode 100644
index 7b9477ff64c98..0000000000000
--- a/patches.baytrail/0804-drm-i915-Confine-page-flips-to-BCS-on-Valleyview.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-From 6fa0682c7264586f8cca190221b00b2065288f0a Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Wed, 4 Sep 2013 10:54:30 +0100
-Subject: drm/i915: Confine page flips to BCS on Valleyview
-
-Once again we find that Valleyview is ever so subtlety different from
-the rest of its gen7 brethen. In this case, Valleyview has no support
-for pageflipping from the RCS ring.
-
-Fixes a regression from
-
-commit ffe74d75502e3a9b0791240b5562bcbecc6ab8dc
-Author: Chris Wilson <chris@chris-wilson.co.uk>
-Date:   Mon Aug 26 20:58:12 2013 +0100
-
-    drm/i915: Use RCS flips on Ivybridge+
-
-Reported-by: "Lee, Chon Ming" <chon.ming.lee@intel.com>
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=68968
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 1c5fd08520de35c7ac0d70e2ed3c3bb200830447)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 67b5e2799ec4..f68091d2078a 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -7867,7 +7867,7 @@ static int intel_gen7_queue_flip(struct drm_device *dev,
- 	int len, ret;
- 
- 	ring = obj->ring;
--	if (ring == NULL || ring->id != RCS)
-+	if (IS_VALLEYVIEW(dev) || ring == NULL || ring->id != RCS)
- 		ring = &dev_priv->ring[BCS];
- 
- 	ret = intel_pin_and_fence_fb_obj(dev, obj, ring);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0805-drm-i915-try-not-to-lose-backlight-CBLV-precision.patch b/patches.baytrail/0805-drm-i915-try-not-to-lose-backlight-CBLV-precision.patch
deleted file mode 100644
index 71e8ce0e9f7d2..0000000000000
--- a/patches.baytrail/0805-drm-i915-try-not-to-lose-backlight-CBLV-precision.patch
+++ /dev/null
@@ -1,48 +0,0 @@
-From aa130d3668002215a8ac509688c7ea391b62998e Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Fri, 23 Aug 2013 10:50:39 +0300
-Subject: drm/i915: try not to lose backlight CBLV precision
-
-ACPI has _BCM and _BQC methods to set and query the backlight
-brightness, respectively. The ACPI opregion has variables BCLP and CBLV
-to hold the requested and current backlight brightness, respectively.
-
-The BCLP variable has range 0..255 while the others have range
-0..100. This means the _BCM method has to scale the brightness for BCLP,
-and the gfx driver has to scale the requested value back for CBLV. If
-the _BQC method uses the CBLV variable (apparently some implementations
-do, some don't) for current backlight level reporting, there's room for
-rounding errors.
-
-Use DIV_ROUND_UP for scaling back to CBLV to get back to the same values
-that were passed to _BCM, presuming the _BCM simply uses bclp = (in *
-255) / 100 for scaling to BCLP.
-
-Reference: https://gist.github.com/aaronlu/6314920
-Reported-by: Aaron Lu <aaron.lu@intel.com>
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Reviewed-by: Aaron Lu <aaron.lu@intel.com>
-Cc: stable@vger.kernel.org
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit cac6a5ae0118832936eb162ec4cedb30f2422bcc)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_opregion.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_opregion.c b/drivers/gpu/drm/i915/intel_opregion.c
-index 2ff74912b656..c4fb2ae35401 100644
---- a/drivers/gpu/drm/i915/intel_opregion.c
-+++ b/drivers/gpu/drm/i915/intel_opregion.c
-@@ -384,7 +384,7 @@ static u32 asle_set_backlight(struct drm_device *dev, u32 bclp)
- 		return ASLE_BACKLIGHT_FAILED;
- 
- 	intel_panel_set_backlight(dev, bclp, 255);
--	iowrite32((bclp*0x64)/0xff | ASLE_CBLV_VALID, &asle->cblv);
-+	iowrite32(DIV_ROUND_UP(bclp * 100, 255) | ASLE_CBLV_VALID, &asle->cblv);
- 
- 	return 0;
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0806-drm-i915-name-intel-dp-hooks-per-platform.patch b/patches.baytrail/0806-drm-i915-name-intel-dp-hooks-per-platform.patch
deleted file mode 100644
index c033511945bb7..0000000000000
--- a/patches.baytrail/0806-drm-i915-name-intel-dp-hooks-per-platform.patch
+++ /dev/null
@@ -1,76 +0,0 @@
-From 0287a337d790db1b887b28bc97ddbbee14bdccd5 Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Fri, 6 Sep 2013 07:38:29 +0300
-Subject: drm/i915: name intel dp hooks per platform
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-In line with the rest of the code base. No functional changes.
-
-v2: also s/intel_pre_enable_dp/g4x_pre_enable_dp/ for consistency (Ville)
-
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit ecff4f3bafaf4ce814b491f580bdc1221b07a85b)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_dp.c |   18 ++++++++++--------
- 1 file changed, 10 insertions(+), 8 deletions(-)
-
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -1731,11 +1731,16 @@ static void intel_enable_dp(struct intel
- 	ironlake_edp_backlight_on(intel_dp);
- }
- 
-+static void g4x_enable_dp(struct intel_encoder *encoder)
-+{
-+	intel_enable_dp(encoder);
-+}
-+
- static void vlv_enable_dp(struct intel_encoder *encoder)
- {
- }
- 
--static void intel_pre_enable_dp(struct intel_encoder *encoder)
-+static void g4x_pre_enable_dp(struct intel_encoder *encoder)
- {
- 	struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
- 	struct intel_digital_port *dport = dp_to_dig_port(intel_dp);
-@@ -1775,7 +1780,7 @@ static void vlv_pre_enable_dp(struct int
- 	vlv_wait_port_ready(dev_priv, port);
- }
- 
--static void intel_dp_pre_pll_enable(struct intel_encoder *encoder)
-+static void vlv_dp_pre_pll_enable(struct intel_encoder *encoder)
- {
- 	struct intel_digital_port *dport = enc_to_dig_port(&encoder->base);
- 	struct drm_device *dev = encoder->base.dev;
-@@ -1785,9 +1790,6 @@ static void intel_dp_pre_pll_enable(stru
- 	int port = vlv_dport_to_channel(dport);
- 	int pipe = intel_crtc->pipe;
- 
--	if (!IS_VALLEYVIEW(dev))
--		return;
--
- 	/* Program Tx lane resets to default */
- 	mutex_lock(&dev_priv->dpio_lock);
- 	vlv_dpio_write(dev_priv, pipe, DPIO_PCS_TX(port),
-@@ -3576,12 +3578,12 @@ intel_dp_init(struct drm_device *dev, in
- 	intel_encoder->get_hw_state = intel_dp_get_hw_state;
- 	intel_encoder->get_config = intel_dp_get_config;
- 	if (IS_VALLEYVIEW(dev)) {
--		intel_encoder->pre_pll_enable = intel_dp_pre_pll_enable;
-+		intel_encoder->pre_pll_enable = vlv_dp_pre_pll_enable;
- 		intel_encoder->pre_enable = vlv_pre_enable_dp;
- 		intel_encoder->enable = vlv_enable_dp;
- 	} else {
--		intel_encoder->pre_enable = intel_pre_enable_dp;
--		intel_encoder->enable = intel_enable_dp;
-+		intel_encoder->pre_enable = g4x_pre_enable_dp;
-+		intel_encoder->enable = g4x_enable_dp;
- 	}
- 
- 	intel_dig_port->port = port;
diff --git a/patches.baytrail/0807-drm-i915-move-backlight-enable-later-in-vlv-enable-s.patch b/patches.baytrail/0807-drm-i915-move-backlight-enable-later-in-vlv-enable-s.patch
deleted file mode 100644
index b99666d8f1af4..0000000000000
--- a/patches.baytrail/0807-drm-i915-move-backlight-enable-later-in-vlv-enable-s.patch
+++ /dev/null
@@ -1,57 +0,0 @@
-From 4e85b92bd2f3595f5b1644ba24bc87345fdf1bc6 Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Thu, 5 Sep 2013 16:44:45 +0300
-Subject: drm/i915: move backlight enable later in vlv enable sequence
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Follow-up to
-commit 5004945f1d6c0282c0288afa89ad85d7f2bea4d5
-Author: Jani Nikula <jani.nikula@intel.com>
-Date:   Tue Jul 30 12:20:32 2013 +0300
-
-    drm/i915: move encoder->enable callback later in VLV crtc enable
-
-v2: Rebase on the renamed enable hooks, adding clarity (Ville)
-
-Reference: http://mid.gmane.org/CAKMK7uFs9EMvMW8BnS24e5UNm1D7JrfVg3SD5SDFtVEamGfOOg@mail.gmail.com
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 828f5c6e1a34d7234752f11401e4307749c9585b)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_dp.c | 7 ++++++-
- 1 file changed, 6 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
-index 8d0389745aff..e8ee1df1463a 100644
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -1728,16 +1728,21 @@ static void intel_enable_dp(struct intel_encoder *encoder)
- 	ironlake_edp_panel_vdd_off(intel_dp, true);
- 	intel_dp_complete_link_train(intel_dp);
- 	intel_dp_stop_link_train(intel_dp);
--	ironlake_edp_backlight_on(intel_dp);
- }
- 
- static void g4x_enable_dp(struct intel_encoder *encoder)
- {
-+	struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
-+
- 	intel_enable_dp(encoder);
-+	ironlake_edp_backlight_on(intel_dp);
- }
- 
- static void vlv_enable_dp(struct intel_encoder *encoder)
- {
-+	struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
-+
-+	ironlake_edp_backlight_on(intel_dp);
- }
- 
- static void g4x_pre_enable_dp(struct intel_encoder *encoder)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0808-drm-i915-clean-up-power-sequencing-register-port-sel.patch b/patches.baytrail/0808-drm-i915-clean-up-power-sequencing-register-port-sel.patch
deleted file mode 100644
index cbeaf7a0fb7ef..0000000000000
--- a/patches.baytrail/0808-drm-i915-clean-up-power-sequencing-register-port-sel.patch
+++ /dev/null
@@ -1,67 +0,0 @@
-From cd1beaa077995148b7446c206a731fe28e866342 Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Thu, 5 Sep 2013 16:44:46 +0300
-Subject: drm/i915: clean up power sequencing register port select definitions
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Remove duplicates, add VLV specific macros for port B and C.
-
-v2: also add PANEL_PORT_SELECT_DPC_VLV for clarity (Ville)
-
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit a24c144cc92c0cb573677ebb67c2fb946562242e)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_reg.h |    8 ++------
- drivers/gpu/drm/i915/intel_dp.c |    4 ++--
- 2 files changed, 4 insertions(+), 8 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -4453,6 +4453,8 @@
- #define PIPEA_PP_STATUS         (VLV_DISPLAY_BASE + 0x61200)
- #define PIPEA_PP_CONTROL        (VLV_DISPLAY_BASE + 0x61204)
- #define PIPEA_PP_ON_DELAYS      (VLV_DISPLAY_BASE + 0x61208)
-+#define  PANEL_PORT_SELECT_DPB_VLV	(1 << 30)
-+#define  PANEL_PORT_SELECT_DPC_VLV	(2 << 30)
- #define PIPEA_PP_OFF_DELAYS     (VLV_DISPLAY_BASE + 0x6120c)
- #define PIPEA_PP_DIVISOR        (VLV_DISPLAY_BASE + 0x61210)
- 
-@@ -4484,7 +4486,6 @@
- #define  PANEL_PORT_SELECT_MASK	(3 << 30)
- #define  PANEL_PORT_SELECT_LVDS	(0 << 30)
- #define  PANEL_PORT_SELECT_DPA	(1 << 30)
--#define  EDP_PANEL		(1 << 30)
- #define  PANEL_PORT_SELECT_DPC	(2 << 30)
- #define  PANEL_PORT_SELECT_DPD	(3 << 30)
- #define  PANEL_POWER_UP_DELAY_MASK	(0x1fff0000)
-@@ -4493,11 +4494,6 @@
- #define  PANEL_LIGHT_ON_DELAY_SHIFT	0
- 
- #define PCH_PP_OFF_DELAYS	0xc720c
--#define  PANEL_POWER_PORT_SELECT_MASK	(0x3 << 30)
--#define  PANEL_POWER_PORT_LVDS		(0 << 30)
--#define  PANEL_POWER_PORT_DP_A		(1 << 30)
--#define  PANEL_POWER_PORT_DP_C		(2 << 30)
--#define  PANEL_POWER_PORT_DP_D		(3 << 30)
- #define  PANEL_POWER_DOWN_DELAY_MASK	(0x1fff0000)
- #define  PANEL_POWER_DOWN_DELAY_SHIFT	16
- #define  PANEL_LIGHT_OFF_DELAY_MASK	(0x1fff)
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -3315,9 +3315,9 @@ intel_dp_init_panel_power_sequencer_regi
- 		port_sel = I915_READ(pp_on_reg) & 0xc0000000;
- 	} else if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev)) {
- 		if (dp_to_dig_port(intel_dp)->port == PORT_A)
--			port_sel = PANEL_POWER_PORT_DP_A;
-+			port_sel = PANEL_PORT_SELECT_DPA;
- 		else
--			port_sel = PANEL_POWER_PORT_DP_D;
-+			port_sel = PANEL_PORT_SELECT_DPD;
- 	}
- 
- 	pp_on |= port_sel;
diff --git a/patches.baytrail/0809-drm-i915-add-support-for-per-pipe-power-sequencing-o.patch b/patches.baytrail/0809-drm-i915-add-support-for-per-pipe-power-sequencing-o.patch
deleted file mode 100644
index 9e43b0e727948..0000000000000
--- a/patches.baytrail/0809-drm-i915-add-support-for-per-pipe-power-sequencing-o.patch
+++ /dev/null
@@ -1,326 +0,0 @@
-From cd7c5806c015789ce5c74493a195188fa314800a Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Fri, 6 Sep 2013 07:40:05 +0300
-Subject: drm/i915: add support for per-pipe power sequencing on vlv
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-VLV has per-pipe PP registers. Set up power sequencing on mode set. The
-connector init time setup is problematic, since we don't have a pipe at
-that time. Cook up something.
-
-v2:
- - use vlv_power_sequencer_pipe() also in _pp_{ctrl,stat}_reg()
- - use PANEL_PORT_SELECT_DPC_VLV (Ville)
-
-v3: make checkpatch happier
-
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-[danvet: Make checkpatch a bit more happier still ...]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit bf13e81b904a37d94d83dd6c3b53a147719a3ead)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_dp.c |  142 ++++++++++++++++++++++++++++------------
- 1 file changed, 100 insertions(+), 42 deletions(-)
-
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -237,24 +237,77 @@ intel_hrawclk(struct drm_device *dev)
- 	}
- }
- 
-+static void
-+intel_dp_init_panel_power_sequencer(struct drm_device *dev,
-+				    struct intel_dp *intel_dp,
-+				    struct edp_power_seq *out);
-+static void
-+intel_dp_init_panel_power_sequencer_registers(struct drm_device *dev,
-+					      struct intel_dp *intel_dp,
-+					      struct edp_power_seq *out);
-+
-+static enum pipe
-+vlv_power_sequencer_pipe(struct intel_dp *intel_dp)
-+{
-+	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
-+	struct drm_crtc *crtc = intel_dig_port->base.base.crtc;
-+	struct drm_device *dev = intel_dig_port->base.base.dev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	enum port port = intel_dig_port->port;
-+	enum pipe pipe;
-+
-+	/* modeset should have pipe */
-+	if (crtc)
-+		return to_intel_crtc(crtc)->pipe;
-+
-+	/* init time, try to find a pipe with this port selected */
-+	for (pipe = PIPE_A; pipe <= PIPE_B; pipe++) {
-+		u32 port_sel = I915_READ(VLV_PIPE_PP_ON_DELAYS(pipe)) &
-+			PANEL_PORT_SELECT_MASK;
-+		if (port_sel == PANEL_PORT_SELECT_DPB_VLV && port == PORT_B)
-+			return pipe;
-+		if (port_sel == PANEL_PORT_SELECT_DPC_VLV && port == PORT_C)
-+			return pipe;
-+	}
-+
-+	/* shrug */
-+	return PIPE_A;
-+}
-+
-+static u32 _pp_ctrl_reg(struct intel_dp *intel_dp)
-+{
-+	struct drm_device *dev = intel_dp_to_dev(intel_dp);
-+
-+	if (HAS_PCH_SPLIT(dev))
-+		return PCH_PP_CONTROL;
-+	else
-+		return VLV_PIPE_PP_CONTROL(vlv_power_sequencer_pipe(intel_dp));
-+}
-+
-+static u32 _pp_stat_reg(struct intel_dp *intel_dp)
-+{
-+	struct drm_device *dev = intel_dp_to_dev(intel_dp);
-+
-+	if (HAS_PCH_SPLIT(dev))
-+		return PCH_PP_STATUS;
-+	else
-+		return VLV_PIPE_PP_STATUS(vlv_power_sequencer_pipe(intel_dp));
-+}
-+
- static bool ironlake_edp_have_panel_power(struct intel_dp *intel_dp)
- {
- 	struct drm_device *dev = intel_dp_to_dev(intel_dp);
- 	struct drm_i915_private *dev_priv = dev->dev_private;
--	u32 pp_stat_reg;
- 
--	pp_stat_reg = IS_VALLEYVIEW(dev) ? PIPEA_PP_STATUS : PCH_PP_STATUS;
--	return (I915_READ(pp_stat_reg) & PP_ON) != 0;
-+	return (I915_READ(_pp_stat_reg(intel_dp)) & PP_ON) != 0;
- }
- 
- static bool ironlake_edp_have_panel_vdd(struct intel_dp *intel_dp)
- {
- 	struct drm_device *dev = intel_dp_to_dev(intel_dp);
- 	struct drm_i915_private *dev_priv = dev->dev_private;
--	u32 pp_ctrl_reg;
- 
--	pp_ctrl_reg = IS_VALLEYVIEW(dev) ? PIPEA_PP_CONTROL : PCH_PP_CONTROL;
--	return (I915_READ(pp_ctrl_reg) & EDP_FORCE_VDD) != 0;
-+	return (I915_READ(_pp_ctrl_reg(intel_dp)) & EDP_FORCE_VDD) != 0;
- }
- 
- static void
-@@ -262,19 +315,15 @@ intel_dp_check_edp(struct intel_dp *inte
- {
- 	struct drm_device *dev = intel_dp_to_dev(intel_dp);
- 	struct drm_i915_private *dev_priv = dev->dev_private;
--	u32 pp_stat_reg, pp_ctrl_reg;
- 
- 	if (!is_edp(intel_dp))
- 		return;
- 
--	pp_stat_reg = IS_VALLEYVIEW(dev) ? PIPEA_PP_STATUS : PCH_PP_STATUS;
--	pp_ctrl_reg = IS_VALLEYVIEW(dev) ? PIPEA_PP_CONTROL : PCH_PP_CONTROL;
--
- 	if (!ironlake_edp_have_panel_power(intel_dp) && !ironlake_edp_have_panel_vdd(intel_dp)) {
- 		WARN(1, "eDP powered off while attempting aux channel communication.\n");
- 		DRM_DEBUG_KMS("Status 0x%08x Control 0x%08x\n",
--				I915_READ(pp_stat_reg),
--				I915_READ(pp_ctrl_reg));
-+			      I915_READ(_pp_stat_reg(intel_dp)),
-+			      I915_READ(_pp_ctrl_reg(intel_dp)));
- 	}
- }
- 
-@@ -959,8 +1008,8 @@ static void ironlake_wait_panel_status(s
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	u32 pp_stat_reg, pp_ctrl_reg;
- 
--	pp_stat_reg = IS_VALLEYVIEW(dev) ? PIPEA_PP_STATUS : PCH_PP_STATUS;
--	pp_ctrl_reg = IS_VALLEYVIEW(dev) ? PIPEA_PP_CONTROL : PCH_PP_CONTROL;
-+	pp_stat_reg = _pp_stat_reg(intel_dp);
-+	pp_ctrl_reg = _pp_ctrl_reg(intel_dp);
- 
- 	DRM_DEBUG_KMS("mask %08x value %08x status %08x control %08x\n",
- 			mask, value,
-@@ -1002,11 +1051,8 @@ static  u32 ironlake_get_pp_control(stru
- 	struct drm_device *dev = intel_dp_to_dev(intel_dp);
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	u32 control;
--	u32 pp_ctrl_reg;
--
--	pp_ctrl_reg = IS_VALLEYVIEW(dev) ? PIPEA_PP_CONTROL : PCH_PP_CONTROL;
--	control = I915_READ(pp_ctrl_reg);
- 
-+	control = I915_READ(_pp_ctrl_reg(intel_dp));
- 	control &= ~PANEL_UNLOCK_MASK;
- 	control |= PANEL_UNLOCK_REGS;
- 	return control;
-@@ -1039,8 +1085,8 @@ void ironlake_edp_panel_vdd_on(struct in
- 	pp = ironlake_get_pp_control(intel_dp);
- 	pp |= EDP_FORCE_VDD;
- 
--	pp_stat_reg = IS_VALLEYVIEW(dev) ? PIPEA_PP_STATUS : PCH_PP_STATUS;
--	pp_ctrl_reg = IS_VALLEYVIEW(dev) ? PIPEA_PP_CONTROL : PCH_PP_CONTROL;
-+	pp_stat_reg = _pp_stat_reg(intel_dp);
-+	pp_ctrl_reg = _pp_ctrl_reg(intel_dp);
- 
- 	I915_WRITE(pp_ctrl_reg, pp);
- 	POSTING_READ(pp_ctrl_reg);
-@@ -1068,8 +1114,8 @@ static void ironlake_panel_vdd_off_sync(
- 		pp = ironlake_get_pp_control(intel_dp);
- 		pp &= ~EDP_FORCE_VDD;
- 
--		pp_stat_reg = IS_VALLEYVIEW(dev) ? PIPEA_PP_STATUS : PCH_PP_STATUS;
--		pp_ctrl_reg = IS_VALLEYVIEW(dev) ? PIPEA_PP_CONTROL : PCH_PP_CONTROL;
-+		pp_stat_reg = _pp_ctrl_reg(intel_dp);
-+		pp_ctrl_reg = _pp_stat_reg(intel_dp);
- 
- 		I915_WRITE(pp_ctrl_reg, pp);
- 		POSTING_READ(pp_ctrl_reg);
-@@ -1134,20 +1180,19 @@ void ironlake_edp_panel_on(struct intel_
- 
- 	ironlake_wait_panel_power_cycle(intel_dp);
- 
-+	pp_ctrl_reg = _pp_ctrl_reg(intel_dp);
- 	pp = ironlake_get_pp_control(intel_dp);
- 	if (IS_GEN5(dev)) {
- 		/* ILK workaround: disable reset around power sequence */
- 		pp &= ~PANEL_POWER_RESET;
--		I915_WRITE(PCH_PP_CONTROL, pp);
--		POSTING_READ(PCH_PP_CONTROL);
-+		I915_WRITE(pp_ctrl_reg, pp);
-+		POSTING_READ(pp_ctrl_reg);
- 	}
- 
- 	pp |= POWER_TARGET_ON;
- 	if (!IS_GEN5(dev))
- 		pp |= PANEL_POWER_RESET;
- 
--	pp_ctrl_reg = IS_VALLEYVIEW(dev) ? PIPEA_PP_CONTROL : PCH_PP_CONTROL;
--
- 	I915_WRITE(pp_ctrl_reg, pp);
- 	POSTING_READ(pp_ctrl_reg);
- 
-@@ -1155,8 +1200,8 @@ void ironlake_edp_panel_on(struct intel_
- 
- 	if (IS_GEN5(dev)) {
- 		pp |= PANEL_POWER_RESET; /* restore panel reset bit */
--		I915_WRITE(PCH_PP_CONTROL, pp);
--		POSTING_READ(PCH_PP_CONTROL);
-+		I915_WRITE(pp_ctrl_reg, pp);
-+		POSTING_READ(pp_ctrl_reg);
- 	}
- }
- 
-@@ -1179,7 +1224,7 @@ void ironlake_edp_panel_off(struct intel
- 	 * panels get very unhappy and cease to work. */
- 	pp &= ~(POWER_TARGET_ON | EDP_FORCE_VDD | PANEL_POWER_RESET | EDP_BLC_ENABLE);
- 
--	pp_ctrl_reg = IS_VALLEYVIEW(dev) ? PIPEA_PP_CONTROL : PCH_PP_CONTROL;
-+	pp_ctrl_reg = _pp_ctrl_reg(intel_dp);
- 
- 	I915_WRITE(pp_ctrl_reg, pp);
- 	POSTING_READ(pp_ctrl_reg);
-@@ -1212,7 +1257,7 @@ void ironlake_edp_backlight_on(struct in
- 	pp = ironlake_get_pp_control(intel_dp);
- 	pp |= EDP_BLC_ENABLE;
- 
--	pp_ctrl_reg = IS_VALLEYVIEW(dev) ? PIPEA_PP_CONTROL : PCH_PP_CONTROL;
-+	pp_ctrl_reg = _pp_ctrl_reg(intel_dp);
- 
- 	I915_WRITE(pp_ctrl_reg, pp);
- 	POSTING_READ(pp_ctrl_reg);
-@@ -1236,7 +1281,7 @@ void ironlake_edp_backlight_off(struct i
- 	pp = ironlake_get_pp_control(intel_dp);
- 	pp &= ~EDP_BLC_ENABLE;
- 
--	pp_ctrl_reg = IS_VALLEYVIEW(dev) ? PIPEA_PP_CONTROL : PCH_PP_CONTROL;
-+	pp_ctrl_reg = _pp_ctrl_reg(intel_dp);
- 
- 	I915_WRITE(pp_ctrl_reg, pp);
- 	POSTING_READ(pp_ctrl_reg);
-@@ -1763,6 +1808,7 @@ static void vlv_pre_enable_dp(struct int
- 	struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
- 	int port = vlv_dport_to_channel(dport);
- 	int pipe = intel_crtc->pipe;
-+	struct edp_power_seq power_seq;
- 	u32 val;
- 
- 	mutex_lock(&dev_priv->dpio_lock);
-@@ -1780,6 +1826,11 @@ static void vlv_pre_enable_dp(struct int
- 
- 	mutex_unlock(&dev_priv->dpio_lock);
- 
-+	/* init power sequencer on this pipe and port */
-+	intel_dp_init_panel_power_sequencer(dev, intel_dp, &power_seq);
-+	intel_dp_init_panel_power_sequencer_registers(dev, intel_dp,
-+						      &power_seq);
-+
- 	intel_enable_dp(encoder);
- 
- 	vlv_wait_port_ready(dev_priv, port);
-@@ -3188,24 +3239,26 @@ intel_dp_init_panel_power_sequencer(stru
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct edp_power_seq cur, vbt, spec, final;
- 	u32 pp_on, pp_off, pp_div, pp;
--	int pp_control_reg, pp_on_reg, pp_off_reg, pp_div_reg;
-+	int pp_ctrl_reg, pp_on_reg, pp_off_reg, pp_div_reg;
- 
- 	if (HAS_PCH_SPLIT(dev)) {
--		pp_control_reg = PCH_PP_CONTROL;
-+		pp_ctrl_reg = PCH_PP_CONTROL;
- 		pp_on_reg = PCH_PP_ON_DELAYS;
- 		pp_off_reg = PCH_PP_OFF_DELAYS;
- 		pp_div_reg = PCH_PP_DIVISOR;
- 	} else {
--		pp_control_reg = PIPEA_PP_CONTROL;
--		pp_on_reg = PIPEA_PP_ON_DELAYS;
--		pp_off_reg = PIPEA_PP_OFF_DELAYS;
--		pp_div_reg = PIPEA_PP_DIVISOR;
-+		enum pipe pipe = vlv_power_sequencer_pipe(intel_dp);
-+
-+		pp_ctrl_reg = VLV_PIPE_PP_CONTROL(pipe);
-+		pp_on_reg = VLV_PIPE_PP_ON_DELAYS(pipe);
-+		pp_off_reg = VLV_PIPE_PP_OFF_DELAYS(pipe);
-+		pp_div_reg = VLV_PIPE_PP_DIVISOR(pipe);
- 	}
- 
- 	/* Workaround: Need to write PP_CONTROL with the unlock key as
- 	 * the very first thing. */
- 	pp = ironlake_get_pp_control(intel_dp);
--	I915_WRITE(pp_control_reg, pp);
-+	I915_WRITE(pp_ctrl_reg, pp);
- 
- 	pp_on = I915_READ(pp_on_reg);
- 	pp_off = I915_READ(pp_off_reg);
-@@ -3293,9 +3346,11 @@ intel_dp_init_panel_power_sequencer_regi
- 		pp_off_reg = PCH_PP_OFF_DELAYS;
- 		pp_div_reg = PCH_PP_DIVISOR;
- 	} else {
--		pp_on_reg = PIPEA_PP_ON_DELAYS;
--		pp_off_reg = PIPEA_PP_OFF_DELAYS;
--		pp_div_reg = PIPEA_PP_DIVISOR;
-+		enum pipe pipe = vlv_power_sequencer_pipe(intel_dp);
-+
-+		pp_on_reg = VLV_PIPE_PP_ON_DELAYS(pipe);
-+		pp_off_reg = VLV_PIPE_PP_OFF_DELAYS(pipe);
-+		pp_div_reg = VLV_PIPE_PP_DIVISOR(pipe);
- 	}
- 
- 	/* And finally store the new values in the power sequencer. */
-@@ -3312,7 +3367,10 @@ intel_dp_init_panel_power_sequencer_regi
- 	/* Haswell doesn't have any port selection bits for the panel
- 	 * power sequencer any more. */
- 	if (IS_VALLEYVIEW(dev)) {
--		port_sel = I915_READ(pp_on_reg) & 0xc0000000;
-+		if (dp_to_dig_port(intel_dp)->port == PORT_B)
-+			port_sel = PANEL_PORT_SELECT_DPB_VLV;
-+		else
-+			port_sel = PANEL_PORT_SELECT_DPC_VLV;
- 	} else if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev)) {
- 		if (dp_to_dig_port(intel_dp)->port == PORT_A)
- 			port_sel = PANEL_PORT_SELECT_DPA;
diff --git a/patches.baytrail/0810-drm-i915-ban-badly-behaving-contexts.patch b/patches.baytrail/0810-drm-i915-ban-badly-behaving-contexts.patch
deleted file mode 100644
index 985ba842ada47..0000000000000
--- a/patches.baytrail/0810-drm-i915-ban-badly-behaving-contexts.patch
+++ /dev/null
@@ -1,196 +0,0 @@
-From d5661cd841b425e2030ac5ab6dfc7669f5cf8082 Mon Sep 17 00:00:00 2001
-From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
-Date: Fri, 30 Aug 2013 16:19:28 +0300
-Subject: drm/i915: ban badly behaving contexts
-
-Now when we have mechanism in place to track which context
-was guilty of hanging the gpu, it is possible to punish
-for bad behaviour.
-
-If context has recently submitted a faulty batchbuffers guilty of
-gpu hang and submits another batch which hangs gpu in quick
-succession, ban it permanently. If ctx is banned, no more
-batchbuffers will be queued for execution.
-
-There is no need for global wedge machinery anymore and
-it would be unwise to wedge the whole gpu if we have multiple
-hanging batches queued for execution. Instead just ban
-the guilty ones and carry on.
-
-v2: Store guilty ban status bool in gpu_error instead of pointers
-    that might become danling before hang is declared.
-
-v3: Use return value for banned status instead of stashing state
-    into gpu_error (Chris Wilson)
-
-v4: - rebase on top of fixed hang stats api
-    - add define for ban period
-    - rename commit and improve commit msg
-
-v5: - rely context banning instead of wedging the gpu
-    - beautification and fix for ban calculation (Chris)
-
-Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit be62acb4cce1389a28296852737e3917d9cc5b25)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.c            | 29 ++++++++++++-----------------
- drivers/gpu/drm/i915/i915_drv.h            | 11 +++++++++--
- drivers/gpu/drm/i915/i915_gem.c            | 22 ++++++++++++++++++++--
- drivers/gpu/drm/i915/i915_gem_execbuffer.c | 12 ++++++++++++
- 4 files changed, 53 insertions(+), 21 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
-index 72e2be7a6c80..ec690ca40af7 100644
---- a/drivers/gpu/drm/i915/i915_drv.c
-+++ b/drivers/gpu/drm/i915/i915_drv.c
-@@ -719,24 +719,19 @@ int i915_reset(struct drm_device *dev)
- 
- 	simulated = dev_priv->gpu_error.stop_rings != 0;
- 
--	if (!simulated && get_seconds() - dev_priv->gpu_error.last_reset < 5) {
--		DRM_ERROR("GPU hanging too fast, declaring wedged!\n");
--		ret = -ENODEV;
--	} else {
--		ret = intel_gpu_reset(dev);
--
--		/* Also reset the gpu hangman. */
--		if (simulated) {
--			DRM_INFO("Simulated gpu hang, resetting stop_rings\n");
--			dev_priv->gpu_error.stop_rings = 0;
--			if (ret == -ENODEV) {
--				DRM_ERROR("Reset not implemented, but ignoring "
--					  "error for simulated gpu hangs\n");
--				ret = 0;
--			}
--		} else
--			dev_priv->gpu_error.last_reset = get_seconds();
-+	ret = intel_gpu_reset(dev);
-+
-+	/* Also reset the gpu hangman. */
-+	if (simulated) {
-+		DRM_INFO("Simulated gpu hang, resetting stop_rings\n");
-+		dev_priv->gpu_error.stop_rings = 0;
-+		if (ret == -ENODEV) {
-+			DRM_ERROR("Reset not implemented, but ignoring "
-+				  "error for simulated gpu hangs\n");
-+			ret = 0;
-+		}
- 	}
-+
- 	if (ret) {
- 		DRM_ERROR("Failed to reset chip.\n");
- 		mutex_unlock(&dev->struct_mutex);
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index e357995a6aad..c5f0abaa9a22 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -586,6 +586,12 @@ struct i915_ctx_hang_stats {
- 
- 	/* This context had batch active when hang was declared */
- 	unsigned batch_active;
-+
-+	/* Time when this context was last blamed for a GPU reset */
-+	unsigned long guilty_ts;
-+
-+	/* This context is banned to submit more work */
-+	bool banned;
- };
- 
- /* This must match up with the value previously used for execbuf2.rsvd1. */
-@@ -987,6 +993,9 @@ struct i915_gpu_error {
- 	/* For hangcheck timer */
- #define DRM_I915_HANGCHECK_PERIOD 1500 /* in ms */
- #define DRM_I915_HANGCHECK_JIFFIES msecs_to_jiffies(DRM_I915_HANGCHECK_PERIOD)
-+	/* Hang gpu twice in this window and your context gets banned */
-+#define DRM_I915_CTX_BAN_PERIOD DIV_ROUND_UP(8*DRM_I915_HANGCHECK_PERIOD, 1000)
-+
- 	struct timer_list hangcheck_timer;
- 
- 	/* For reset and error_state handling. */
-@@ -995,8 +1004,6 @@ struct i915_gpu_error {
- 	struct drm_i915_error_state *first_error;
- 	struct work_struct work;
- 
--	unsigned long last_reset;
--
- 	/**
- 	 * State variable and reset counter controlling the reset flow
- 	 *
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index f0884a949a1f..ff8817f3eaa6 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -2221,6 +2221,21 @@ static bool i915_request_guilty(struct drm_i915_gem_request *request,
- 	return false;
- }
- 
-+static bool i915_context_is_banned(const struct i915_ctx_hang_stats *hs)
-+{
-+	const unsigned long elapsed = get_seconds() - hs->guilty_ts;
-+
-+	if (hs->banned)
-+		return true;
-+
-+	if (elapsed <= DRM_I915_CTX_BAN_PERIOD) {
-+		DRM_ERROR("context hanging too fast, declaring banned!\n");
-+		return true;
-+	}
-+
-+	return false;
-+}
-+
- static void i915_set_reset_status(struct intel_ring_buffer *ring,
- 				  struct drm_i915_gem_request *request,
- 				  u32 acthd)
-@@ -2257,10 +2272,13 @@ static void i915_set_reset_status(struct intel_ring_buffer *ring,
- 		hs = &request->file_priv->hang_stats;
- 
- 	if (hs) {
--		if (guilty)
-+		if (guilty) {
-+			hs->banned = i915_context_is_banned(hs);
- 			hs->batch_active++;
--		else
-+			hs->guilty_ts = get_seconds();
-+		} else {
- 			hs->batch_pending++;
-+		}
- 	}
- }
- 
-diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-index e519f9f6e5cd..c8a01c141644 100644
---- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-@@ -929,6 +929,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
- 	struct drm_i915_gem_object *batch_obj;
- 	struct drm_clip_rect *cliprects = NULL;
- 	struct intel_ring_buffer *ring;
-+	struct i915_ctx_hang_stats *hs;
- 	u32 ctx_id = i915_execbuffer2_get_context_id(*args);
- 	u32 exec_start, exec_len;
- 	u32 mask, flags;
-@@ -1118,6 +1119,17 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
- 	if (ret)
- 		goto err;
- 
-+	hs = i915_gem_context_get_hang_stats(dev, file, ctx_id);
-+	if (IS_ERR(hs)) {
-+		ret = PTR_ERR(hs);
-+		goto err;
-+	}
-+
-+	if (hs->banned) {
-+		ret = -EIO;
-+		goto err;
-+	}
-+
- 	ret = i915_switch_context(ring, file, ctx_id);
- 	if (ret)
- 		goto err;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0811-drm-i915-include-hangcheck-action-and-score-in-error.patch b/patches.baytrail/0811-drm-i915-include-hangcheck-action-and-score-in-error.patch
deleted file mode 100644
index 9d33741024cc7..0000000000000
--- a/patches.baytrail/0811-drm-i915-include-hangcheck-action-and-score-in-error.patch
+++ /dev/null
@@ -1,132 +0,0 @@
-From ccbcec20855d9d033d5c306306fae1fcde840e39 Mon Sep 17 00:00:00 2001
-From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
-Date: Fri, 6 Sep 2013 16:03:28 +0300
-Subject: drm/i915: include hangcheck action and score in error_state
-
-Score and action reveals what all the rings were doing
-and why hang was declared. Add idle state so that
-we can distinguish between waiting and idle ring.
-
-v2: - add idle as a hangcheck action
-    - consensed hangcheck status to single line (Chris)
-    - mark active explicitly when we are making progress (Chris)
-
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit da66146425c3136943452988afd3d64cd551da58)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h         |  2 ++
- drivers/gpu/drm/i915/i915_gpu_error.c   | 24 ++++++++++++++++++++++++
- drivers/gpu/drm/i915/i915_irq.c         |  5 +++++
- drivers/gpu/drm/i915/intel_ringbuffer.h |  1 +
- 4 files changed, 32 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index c5f0abaa9a22..1fb01b5b819d 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -328,6 +328,8 @@ struct drm_i915_error_state {
- 	u32 *active_bo_count, *pinned_bo_count;
- 	struct intel_overlay_error_state *overlay;
- 	struct intel_display_error_state *display;
-+	int hangcheck_score[I915_NUM_RINGS];
-+	enum intel_ring_hangcheck_action hangcheck_action[I915_NUM_RINGS];
- };
- 
- struct intel_crtc_config;
-diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
-index aba9d7498996..c38d575dc5a6 100644
---- a/drivers/gpu/drm/i915/i915_gpu_error.c
-+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
-@@ -213,6 +213,24 @@ static void print_error_buffers(struct drm_i915_error_state_buf *m,
- 	}
- }
- 
-+static const char *hangcheck_action_to_str(enum intel_ring_hangcheck_action a)
-+{
-+	switch (a) {
-+	case HANGCHECK_IDLE:
-+		return "idle";
-+	case HANGCHECK_WAIT:
-+		return "wait";
-+	case HANGCHECK_ACTIVE:
-+		return "active";
-+	case HANGCHECK_KICK:
-+		return "kick";
-+	case HANGCHECK_HUNG:
-+		return "hung";
-+	}
-+
-+	return "unknown";
-+}
-+
- static void i915_ring_error_state(struct drm_i915_error_state_buf *m,
- 				  struct drm_device *dev,
- 				  struct drm_i915_error_state *error,
-@@ -253,6 +271,9 @@ static void i915_ring_error_state(struct drm_i915_error_state_buf *m,
- 	err_printf(m, "  waiting: %s\n", yesno(error->waiting[ring]));
- 	err_printf(m, "  ring->head: 0x%08x\n", error->cpu_ring_head[ring]);
- 	err_printf(m, "  ring->tail: 0x%08x\n", error->cpu_ring_tail[ring]);
-+	err_printf(m, "  hangcheck: %s [%d]\n",
-+		   hangcheck_action_to_str(error->hangcheck_action[ring]),
-+		   error->hangcheck_score[ring]);
- }
- 
- void i915_error_printf(struct drm_i915_error_state_buf *e, const char *f, ...)
-@@ -718,6 +739,9 @@ static void i915_record_ring_state(struct drm_device *dev,
- 
- 	error->cpu_ring_head[ring->id] = ring->head;
- 	error->cpu_ring_tail[ring->id] = ring->tail;
-+
-+	error->hangcheck_score[ring->id] = ring->hangcheck.score;
-+	error->hangcheck_action[ring->id] = ring->hangcheck.action;
- }
- 
- 
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index 4b91228fd9bd..13d26cf49f03 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -2021,6 +2021,8 @@ static void i915_hangcheck_elapsed(unsigned long data)
- 
- 		if (ring->hangcheck.seqno == seqno) {
- 			if (ring_idle(ring, seqno)) {
-+				ring->hangcheck.action = HANGCHECK_IDLE;
-+
- 				if (waitqueue_active(&ring->irq_queue)) {
- 					/* Issue a wake-up to catch stuck h/w. */
- 					DRM_ERROR("Hangcheck timer elapsed... %s idle\n",
-@@ -2049,6 +2051,7 @@ static void i915_hangcheck_elapsed(unsigned long data)
- 								    acthd);
- 
- 				switch (ring->hangcheck.action) {
-+				case HANGCHECK_IDLE:
- 				case HANGCHECK_WAIT:
- 					break;
- 				case HANGCHECK_ACTIVE:
-@@ -2064,6 +2067,8 @@ static void i915_hangcheck_elapsed(unsigned long data)
- 				}
- 			}
- 		} else {
-+			ring->hangcheck.action = HANGCHECK_ACTIVE;
-+
- 			/* Gradually reduce the count so that we catch DoS
- 			 * attempts across multiple batches.
- 			 */
-diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
-index ad2dd65c63f8..b5aac5702085 100644
---- a/drivers/gpu/drm/i915/intel_ringbuffer.h
-+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
-@@ -34,6 +34,7 @@ struct  intel_hw_status_page {
- #define I915_WRITE_IMR(ring, val) I915_WRITE(RING_IMR((ring)->mmio_base), val)
- 
- enum intel_ring_hangcheck_action {
-+	HANGCHECK_IDLE = 0,
- 	HANGCHECK_WAIT,
- 	HANGCHECK_ACTIVE,
- 	HANGCHECK_KICK,
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0812-drm-i915-Delay-disabling-of-VGA-memory-until-vgacon-.patch b/patches.baytrail/0812-drm-i915-Delay-disabling-of-VGA-memory-until-vgacon-.patch
deleted file mode 100644
index fdf5224a4da28..0000000000000
--- a/patches.baytrail/0812-drm-i915-Delay-disabling-of-VGA-memory-until-vgacon-.patch
+++ /dev/null
@@ -1,136 +0,0 @@
-From 3eee396d8db215999c6243d77632d51e35653496 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Thu, 5 Sep 2013 20:40:52 +0300
-Subject: drm/i915: Delay disabling of VGA memory until vgacon->fbcon handoff
- is done
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-When transitioning away from vgacon the system tries to save the
-current contents of the VGA memory, so that it can be cleanly handed
-off to fbcon (or whatever comes afterwards).
-
-The recent change
-
- commit 81b5c7bc8de3e6f63419139c2fc91bf81dea8a7d
- Author: Alex Williamson <alex.williamson@redhat.com>
- Date:   Wed Aug 28 09:39:08 2013 -0600
-
-    i915: Update VGA arbiter support for newer devices
-
-caused i915 to disable VGA memory decode for the IGD when i915 is
-initializing. Unfortunately that happens before the vgacon->fbcon
-handoff so vgacon_save_screen() will read out all ones from the
-VGA memory.
-
-After the handoff fbcon will inherit the bogus state from vgacon,
-and pre-fills the fb with matching contents. The end result is
-a white rectangle in the top left corner of the screen, the size
-of which matches the now inactive VGA console.
-
-To remedy the situation delay the disabling of VGA memory until
-the vgacon->fbcon handoff has happened.
-
-Also rename i915_enable_vga to i915_enable_vga_mem to make
-the relationship between these functions clearer.
-
-Cc: Alex Williamson <alex.williamson@redhat.com>
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 6e1b4fdad5157bb9e88777d525704aba24389bee)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_dma.c      |    6 ++++++
- drivers/gpu/drm/i915/intel_display.c |   27 ++++++++++++++++-----------
- drivers/gpu/drm/i915/intel_drv.h     |    1 +
- 3 files changed, 23 insertions(+), 11 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_dma.c
-+++ b/drivers/gpu/drm/i915/i915_dma.c
-@@ -1359,6 +1359,12 @@ static int i915_load_modeset_init(struct
- 	 */
- 	intel_fbdev_initial_config(dev);
- 
-+	/*
-+	 * Must do this after fbcon init so that
-+	 * vgacon_save_screen() works during the handover.
-+	 */
-+	i915_disable_vga_mem(dev);
-+
- 	/* Only enable hotplug handling once the fbdev is fully set up. */
- 	dev_priv->enable_hotplug_processing = true;
- 
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -10065,15 +10065,6 @@ static void i915_disable_vga(struct drm_
- 	outb(SR01, VGA_SR_INDEX);
- 	sr1 = inb(VGA_SR_DATA);
- 	outb(sr1 | 1<<5, VGA_SR_DATA);
--
--	/* Disable VGA memory on Intel HD */
--	if (HAS_PCH_SPLIT(dev)) {
--		outb(inb(VGA_MSR_READ) & ~VGA_MSR_MEM_EN, VGA_MSR_WRITE);
--		vga_set_legacy_decoding(dev->pdev, VGA_RSRC_LEGACY_IO |
--						   VGA_RSRC_NORMAL_IO |
--						   VGA_RSRC_NORMAL_MEM);
--	}
--
- 	vga_put(dev->pdev, VGA_RSRC_LEGACY_IO);
- 	udelay(300);
- 
-@@ -10081,7 +10072,7 @@ static void i915_disable_vga(struct drm_
- 	POSTING_READ(vga_reg);
- }
- 
--static void i915_enable_vga(struct drm_device *dev)
-+static void i915_enable_vga_mem(struct drm_device *dev)
- {
- 	/* Enable VGA memory on Intel HD */
- 	if (HAS_PCH_SPLIT(dev)) {
-@@ -10095,6 +10086,19 @@ static void i915_enable_vga(struct drm_d
- 	}
- }
- 
-+void i915_disable_vga_mem(struct drm_device *dev)
-+{
-+	/* Disable VGA memory on Intel HD */
-+	if (HAS_PCH_SPLIT(dev)) {
-+		vga_get_uninterruptible(dev->pdev, VGA_RSRC_LEGACY_IO);
-+		outb(inb(VGA_MSR_READ) & ~VGA_MSR_MEM_EN, VGA_MSR_WRITE);
-+		vga_set_legacy_decoding(dev->pdev, VGA_RSRC_LEGACY_IO |
-+						   VGA_RSRC_NORMAL_IO |
-+						   VGA_RSRC_NORMAL_MEM);
-+		vga_put(dev->pdev, VGA_RSRC_LEGACY_IO);
-+	}
-+}
-+
- void intel_modeset_init_hw(struct drm_device *dev)
- {
- 	intel_init_power_well(dev);
-@@ -10373,6 +10377,7 @@ void i915_redisable_vga(struct drm_devic
- 	if (I915_READ(vga_reg) != VGA_DISP_DISABLE) {
- 		DRM_DEBUG_KMS("Something enabled VGA plane, disabling it\n");
- 		i915_disable_vga(dev);
-+		i915_disable_vga_mem(dev);
- 	}
- }
- 
-@@ -10588,7 +10593,7 @@ void intel_modeset_cleanup(struct drm_de
- 
- 	intel_disable_fbc(dev);
- 
--	i915_enable_vga(dev);
-+	i915_enable_vga_mem(dev);
- 
- 	intel_disable_gt_powersave(dev);
- 
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -798,5 +798,6 @@ extern void hsw_pc8_disable_interrupts(s
- extern void hsw_pc8_restore_interrupts(struct drm_device *dev);
- extern void intel_aux_display_runtime_get(struct drm_i915_private *dev_priv);
- extern void intel_aux_display_runtime_put(struct drm_i915_private *dev_priv);
-+extern void i915_disable_vga_mem(struct drm_device *dev);
- 
- #endif /* __INTEL_DRV_H__ */
diff --git a/patches.baytrail/0813-drm-i915-Track-pfit-enable-state-separately-from-siz.patch b/patches.baytrail/0813-drm-i915-Track-pfit-enable-state-separately-from-siz.patch
deleted file mode 100644
index 5aed0cf3bc34f..0000000000000
--- a/patches.baytrail/0813-drm-i915-Track-pfit-enable-state-separately-from-siz.patch
+++ /dev/null
@@ -1,164 +0,0 @@
-From cd8db09ea1d2c437b5227e22e045f47b13341950 Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Tue, 27 Aug 2013 17:04:17 +0100
-Subject: drm/i915: Track pfit enable state separately from size
-
-Detangle the additional state of whether or not the hw has the pfit
-enabled from whether it has zero size. This allows us to cleanly
-distinguish in the code when we expect the pfit to be enabled (for
-Haswell pc8), and when the BIOS is confused and needs sanitizing.
-
-Reported-by: shui yanwei <yangweix.shui@intel.com>
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=68251
-Tested-by: shui yanwei <yangweix.shui@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit fd4daa9cea025ddf8623db289e79d264e9fa66f6)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_ddi.c     |  2 +-
- drivers/gpu/drm/i915/intel_display.c | 21 +++++++++++++--------
- drivers/gpu/drm/i915/intel_drv.h     |  1 +
- drivers/gpu/drm/i915/intel_panel.c   |  1 +
- drivers/gpu/drm/i915/intel_pm.c      |  6 +++---
- 5 files changed, 19 insertions(+), 12 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
-index 060ea5096e52..ace63bd7afe6 100644
---- a/drivers/gpu/drm/i915/intel_ddi.c
-+++ b/drivers/gpu/drm/i915/intel_ddi.c
-@@ -778,7 +778,7 @@ void intel_ddi_enable_transcoder_func(struct drm_crtc *crtc)
- 			/* Can only use the always-on power well for eDP when
- 			 * not using the panel fitter, and when not using motion
- 			  * blur mitigation (which we don't support). */
--			if (intel_crtc->config.pch_pfit.size)
-+			if (intel_crtc->config.pch_pfit.enabled)
- 				temp |= TRANS_DDI_EDP_INPUT_A_ONOFF;
- 			else
- 				temp |= TRANS_DDI_EDP_INPUT_A_ON;
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 099ad416fcdd..98af7eb372a4 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -2252,7 +2252,7 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
- 		I915_WRITE(PIPESRC(intel_crtc->pipe),
- 			   ((crtc->mode.hdisplay - 1) << 16) |
- 			   (crtc->mode.vdisplay - 1));
--		if (!intel_crtc->config.pch_pfit.size &&
-+		if (!intel_crtc->config.pch_pfit.enabled &&
- 		    (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS) ||
- 		     intel_pipe_has_type(crtc, INTEL_OUTPUT_EDP))) {
- 			I915_WRITE(PF_CTL(intel_crtc->pipe), 0);
-@@ -3206,7 +3206,7 @@ static void ironlake_pfit_enable(struct intel_crtc *crtc)
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	int pipe = crtc->pipe;
- 
--	if (crtc->config.pch_pfit.size) {
-+	if (crtc->config.pch_pfit.enabled) {
- 		/* Force use of hard-coded filter coefficients
- 		 * as some pre-programmed values are broken,
- 		 * e.g. x201.
-@@ -3433,7 +3433,7 @@ static void ironlake_pfit_disable(struct intel_crtc *crtc)
- 
- 	/* To avoid upsetting the power well on haswell only disable the pfit if
- 	 * it's in use. The hw state code will make sure we get this right. */
--	if (crtc->config.pch_pfit.size) {
-+	if (crtc->config.pch_pfit.enabled) {
- 		I915_WRITE(PF_CTL(pipe), 0);
- 		I915_WRITE(PF_WIN_POS(pipe), 0);
- 		I915_WRITE(PF_WIN_SZ(pipe), 0);
-@@ -5874,6 +5874,7 @@ static void ironlake_get_pfit_config(struct intel_crtc *crtc,
- 	tmp = I915_READ(PF_CTL(crtc->pipe));
- 
- 	if (tmp & PF_ENABLE) {
-+		pipe_config->pch_pfit.enabled = true;
- 		pipe_config->pch_pfit.pos = I915_READ(PF_WIN_POS(crtc->pipe));
- 		pipe_config->pch_pfit.size = I915_READ(PF_WIN_SZ(crtc->pipe));
- 
-@@ -6251,7 +6252,7 @@ static void haswell_modeset_global_resources(struct drm_device *dev)
- 		if (!crtc->base.enabled)
- 			continue;
- 
--		if (crtc->pipe != PIPE_A || crtc->config.pch_pfit.size ||
-+		if (crtc->pipe != PIPE_A || crtc->config.pch_pfit.enabled ||
- 		    crtc->config.cpu_transcoder != TRANSCODER_EDP)
- 			enable = true;
- 	}
-@@ -8228,9 +8229,10 @@ static void intel_dump_pipe_config(struct intel_crtc *crtc,
- 		      pipe_config->gmch_pfit.control,
- 		      pipe_config->gmch_pfit.pgm_ratios,
- 		      pipe_config->gmch_pfit.lvds_border_bits);
--	DRM_DEBUG_KMS("pch pfit: pos: 0x%08x, size: 0x%08x\n",
-+	DRM_DEBUG_KMS("pch pfit: pos: 0x%08x, size: 0x%08x, %s\n",
- 		      pipe_config->pch_pfit.pos,
--		      pipe_config->pch_pfit.size);
-+		      pipe_config->pch_pfit.size,
-+		      pipe_config->pch_pfit.enabled ? "enabled" : "disabled");
- 	DRM_DEBUG_KMS("ips: %i\n", pipe_config->ips_enabled);
- }
- 
-@@ -8626,8 +8628,11 @@ intel_pipe_config_compare(struct drm_device *dev,
- 	if (INTEL_INFO(dev)->gen < 4)
- 		PIPE_CONF_CHECK_I(gmch_pfit.pgm_ratios);
- 	PIPE_CONF_CHECK_I(gmch_pfit.lvds_border_bits);
--	PIPE_CONF_CHECK_I(pch_pfit.pos);
--	PIPE_CONF_CHECK_I(pch_pfit.size);
-+	PIPE_CONF_CHECK_I(pch_pfit.enabled);
-+	if (current_config->pch_pfit.enabled) {
-+		PIPE_CONF_CHECK_I(pch_pfit.pos);
-+		PIPE_CONF_CHECK_I(pch_pfit.size);
-+	}
- 
- 	PIPE_CONF_CHECK_I(ips_enabled);
- 
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index 322dbc6b20a2..90cf672c0c69 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -284,6 +284,7 @@ struct intel_crtc_config {
- 	struct {
- 		u32 pos;
- 		u32 size;
-+		bool enabled;
- 	} pch_pfit;
- 
- 	/* FDI configuration, only valid if has_pch_encoder is set. */
-diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
-index 42114ecbae0e..293564a2896a 100644
---- a/drivers/gpu/drm/i915/intel_panel.c
-+++ b/drivers/gpu/drm/i915/intel_panel.c
-@@ -112,6 +112,7 @@ intel_pch_panel_fitting(struct intel_crtc *intel_crtc,
- done:
- 	pipe_config->pch_pfit.pos = (x << 16) | y;
- 	pipe_config->pch_pfit.size = (width << 16) | height;
-+	pipe_config->pch_pfit.enabled = pipe_config->pch_pfit.size != 0;
- }
- 
- static void
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 0c115cc4899f..dd176b7296c1 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2096,16 +2096,16 @@ static uint32_t ilk_pipe_pixel_rate(struct drm_device *dev,
- 				    struct drm_crtc *crtc)
- {
- 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
--	uint32_t pixel_rate, pfit_size;
-+	uint32_t pixel_rate;
- 
- 	pixel_rate = intel_crtc->config.adjusted_mode.clock;
- 
- 	/* We only use IF-ID interlacing. If we ever use PF-ID we'll need to
- 	 * adjust the pixel_rate here. */
- 
--	pfit_size = intel_crtc->config.pch_pfit.size;
--	if (pfit_size) {
-+	if (intel_crtc->config.pch_pfit.enabled) {
- 		uint64_t pipe_w, pipe_h, pfit_w, pfit_h;
-+		uint32_t pfit_size = intel_crtc->config.pch_pfit.size;
- 
- 		pipe_w = intel_crtc->config.requested_mode.hdisplay;
- 		pipe_h = intel_crtc->config.requested_mode.vdisplay;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0814-drm-i915-Use-proper-print-format-for-debug-prints.patch b/patches.baytrail/0814-drm-i915-Use-proper-print-format-for-debug-prints.patch
deleted file mode 100644
index 4df9899161f1a..0000000000000
--- a/patches.baytrail/0814-drm-i915-Use-proper-print-format-for-debug-prints.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From 875968bd8b02876e883aa9e5fbb967b257853299 Mon Sep 17 00:00:00 2001
-From: Takashi Iwai <tiwai@suse.de>
-Date: Tue, 10 Sep 2013 07:30:36 +0200
-Subject: drm/i915: Use proper print format for debug prints
-
-Replace "%8x" with "%08x".
-The hex number should be shown with zero stuffed instead of spaces.
-
-Signed-off-by: Takashi Iwai <tiwai@suse.de>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 7e7cb34f62dbb3471e4b1d3fae12a8b71e2224d9)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 6 +++---
- 1 file changed, 3 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 98af7eb372a4..907b2ecb6595 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -6510,15 +6510,15 @@ static void haswell_write_eld(struct drm_connector *connector,
- 
- 	/* Set ELD valid state */
- 	tmp = I915_READ(aud_cntrl_st2);
--	DRM_DEBUG_DRIVER("HDMI audio: pin eld vld status=0x%8x\n", tmp);
-+	DRM_DEBUG_DRIVER("HDMI audio: pin eld vld status=0x%08x\n", tmp);
- 	tmp |= (AUDIO_ELD_VALID_A << (pipe * 4));
- 	I915_WRITE(aud_cntrl_st2, tmp);
- 	tmp = I915_READ(aud_cntrl_st2);
--	DRM_DEBUG_DRIVER("HDMI audio: eld vld status=0x%8x\n", tmp);
-+	DRM_DEBUG_DRIVER("HDMI audio: eld vld status=0x%08x\n", tmp);
- 
- 	/* Enable HDMI mode */
- 	tmp = I915_READ(aud_config);
--	DRM_DEBUG_DRIVER("HDMI audio: audio conf: 0x%8x\n", tmp);
-+	DRM_DEBUG_DRIVER("HDMI audio: audio conf: 0x%08x\n", tmp);
- 	/* clear N_programing_enable and N_value_index */
- 	tmp &= ~(AUD_CONFIG_N_VALUE_INDEX | AUD_CONFIG_N_PROG_ENABLE);
- 	I915_WRITE(aud_config, tmp);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0815-drm-i915-Pass-crtc-to-intel_update_watermarks.patch b/patches.baytrail/0815-drm-i915-Pass-crtc-to-intel_update_watermarks.patch
deleted file mode 100644
index 2f668a3fbf150..0000000000000
--- a/patches.baytrail/0815-drm-i915-Pass-crtc-to-intel_update_watermarks.patch
+++ /dev/null
@@ -1,319 +0,0 @@
-From 2857d704e3fbdc30aa3af9e5cf1a4168257787f1 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Tue, 10 Sep 2013 11:40:40 +0300
-Subject: drm/i915: Pass crtc to intel_update_watermarks()
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Passing the appropriate crtc to intel_update_watermarks() should help
-in avoiding needless work in the future.
-
-v2: Avoid clash with internal 'crtc' variable in some wm functions
-
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 46ba614c0045b0b5354397010578e8b56d621251)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h      |  2 +-
- drivers/gpu/drm/i915/intel_display.c | 20 +++++++++----------
- drivers/gpu/drm/i915/intel_drv.h     |  2 +-
- drivers/gpu/drm/i915/intel_pm.c      | 38 +++++++++++++++++++++++-------------
- drivers/gpu/drm/i915/intel_sprite.c  |  6 +++---
- 5 files changed, 39 insertions(+), 29 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 1fb01b5b819d..81ba5bbc97fa 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -361,7 +361,7 @@ struct drm_i915_display_funcs {
- 			  int target, int refclk,
- 			  struct dpll *match_clock,
- 			  struct dpll *best_clock);
--	void (*update_wm)(struct drm_device *dev);
-+	void (*update_wm)(struct drm_crtc *crtc);
- 	void (*update_sprite_wm)(struct drm_plane *plane,
- 				 struct drm_crtc *crtc,
- 				 uint32_t sprite_width, int pixel_size,
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 907b2ecb6595..c5123ac68cf9 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -3262,7 +3262,7 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc)
- 	intel_set_cpu_fifo_underrun_reporting(dev, pipe, true);
- 	intel_set_pch_fifo_underrun_reporting(dev, pipe, true);
- 
--	intel_update_watermarks(dev);
-+	intel_update_watermarks(crtc);
- 
- 	for_each_encoder_on_crtc(dev, crtc, encoder)
- 		if (encoder->pre_enable)
-@@ -3372,7 +3372,7 @@ static void haswell_crtc_enable(struct drm_crtc *crtc)
- 	if (intel_crtc->config.has_pch_encoder)
- 		intel_set_pch_fifo_underrun_reporting(dev, TRANSCODER_A, true);
- 
--	intel_update_watermarks(dev);
-+	intel_update_watermarks(crtc);
- 
- 	if (intel_crtc->config.has_pch_encoder)
- 		dev_priv->display.fdi_link_train(crtc);
-@@ -3506,7 +3506,7 @@ static void ironlake_crtc_disable(struct drm_crtc *crtc)
- 	}
- 
- 	intel_crtc->active = false;
--	intel_update_watermarks(dev);
-+	intel_update_watermarks(crtc);
- 
- 	mutex_lock(&dev->struct_mutex);
- 	intel_update_fbc(dev);
-@@ -3565,7 +3565,7 @@ static void haswell_crtc_disable(struct drm_crtc *crtc)
- 	}
- 
- 	intel_crtc->active = false;
--	intel_update_watermarks(dev);
-+	intel_update_watermarks(crtc);
- 
- 	mutex_lock(&dev->struct_mutex);
- 	intel_update_fbc(dev);
-@@ -3665,7 +3665,7 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc)
- 		return;
- 
- 	intel_crtc->active = true;
--	intel_update_watermarks(dev);
-+	intel_update_watermarks(crtc);
- 
- 	for_each_encoder_on_crtc(dev, crtc, encoder)
- 		if (encoder->pre_pll_enable)
-@@ -3710,7 +3710,7 @@ static void i9xx_crtc_enable(struct drm_crtc *crtc)
- 		return;
- 
- 	intel_crtc->active = true;
--	intel_update_watermarks(dev);
-+	intel_update_watermarks(crtc);
- 
- 	for_each_encoder_on_crtc(dev, crtc, encoder)
- 		if (encoder->pre_enable)
-@@ -3794,7 +3794,7 @@ static void i9xx_crtc_disable(struct drm_crtc *crtc)
- 
- 	intel_crtc->active = false;
- 	intel_update_fbc(dev);
--	intel_update_watermarks(dev);
-+	intel_update_watermarks(crtc);
- }
- 
- static void i9xx_crtc_off(struct drm_crtc *crtc)
-@@ -4955,7 +4955,7 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
- 
- 	ret = intel_pipe_set_base(crtc, x, y, fb);
- 
--	intel_update_watermarks(dev);
-+	intel_update_watermarks(crtc);
- 
- 	return ret;
- }
-@@ -5843,7 +5843,7 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
- 
- 	ret = intel_pipe_set_base(crtc, x, y, fb);
- 
--	intel_update_watermarks(dev);
-+	intel_update_watermarks(crtc);
- 
- 	return ret;
- }
-@@ -6300,7 +6300,7 @@ static int haswell_crtc_mode_set(struct drm_crtc *crtc,
- 
- 	ret = intel_pipe_set_base(crtc, x, y, fb);
- 
--	intel_update_watermarks(dev);
-+	intel_update_watermarks(crtc);
- 
- 	return ret;
- }
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index 90cf672c0c69..c61911e19c29 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -716,7 +716,7 @@ extern void intel_ddi_init(struct drm_device *dev, enum port port);
- extern enum port intel_ddi_get_encoder_port(struct intel_encoder *intel_encoder);
- 
- /* For use by IVB LP watermark workaround in intel_sprite.c */
--extern void intel_update_watermarks(struct drm_device *dev);
-+extern void intel_update_watermarks(struct drm_crtc *crtc);
- extern void intel_update_sprite_watermarks(struct drm_plane *plane,
- 					   struct drm_crtc *crtc,
- 					   uint32_t sprite_width, int pixel_size,
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index dd176b7296c1..22ee0e8a3b38 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -1087,8 +1087,9 @@ static struct drm_crtc *single_enabled_crtc(struct drm_device *dev)
- 	return enabled;
- }
- 
--static void pineview_update_wm(struct drm_device *dev)
-+static void pineview_update_wm(struct drm_crtc *unused_crtc)
- {
-+	struct drm_device *dev = unused_crtc->dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct drm_crtc *crtc;
- 	const struct cxsr_latency *latency;
-@@ -1365,8 +1366,9 @@ static void vlv_update_drain_latency(struct drm_device *dev)
- 
- #define single_plane_enabled(mask) is_power_of_2(mask)
- 
--static void valleyview_update_wm(struct drm_device *dev)
-+static void valleyview_update_wm(struct drm_crtc *crtc)
- {
-+	struct drm_device *dev = crtc->dev;
- 	static const int sr_latency_ns = 12000;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	int planea_wm, planeb_wm, cursora_wm, cursorb_wm;
-@@ -1424,8 +1426,9 @@ static void valleyview_update_wm(struct drm_device *dev)
- 		   (cursor_sr << DSPFW_CURSOR_SR_SHIFT));
- }
- 
--static void g4x_update_wm(struct drm_device *dev)
-+static void g4x_update_wm(struct drm_crtc *crtc)
- {
-+	struct drm_device *dev = crtc->dev;
- 	static const int sr_latency_ns = 12000;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	int planea_wm, planeb_wm, cursora_wm, cursorb_wm;
-@@ -1476,8 +1479,9 @@ static void g4x_update_wm(struct drm_device *dev)
- 		   (cursor_sr << DSPFW_CURSOR_SR_SHIFT));
- }
- 
--static void i965_update_wm(struct drm_device *dev)
-+static void i965_update_wm(struct drm_crtc *unused_crtc)
- {
-+	struct drm_device *dev = unused_crtc->dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct drm_crtc *crtc;
- 	int srwm = 1;
-@@ -1541,8 +1545,9 @@ static void i965_update_wm(struct drm_device *dev)
- 	I915_WRITE(DSPFW3, (cursor_sr << DSPFW_CURSOR_SR_SHIFT));
- }
- 
--static void i9xx_update_wm(struct drm_device *dev)
-+static void i9xx_update_wm(struct drm_crtc *unused_crtc)
- {
-+	struct drm_device *dev = unused_crtc->dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	const struct intel_watermark_params *wm_info;
- 	uint32_t fwater_lo;
-@@ -1658,8 +1663,9 @@ static void i9xx_update_wm(struct drm_device *dev)
- 	}
- }
- 
--static void i830_update_wm(struct drm_device *dev)
-+static void i830_update_wm(struct drm_crtc *unused_crtc)
- {
-+	struct drm_device *dev = unused_crtc->dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct drm_crtc *crtc;
- 	uint32_t fwater_lo;
-@@ -1785,8 +1791,9 @@ static bool ironlake_compute_srwm(struct drm_device *dev, int level, int plane,
- 				   display, cursor);
- }
- 
--static void ironlake_update_wm(struct drm_device *dev)
-+static void ironlake_update_wm(struct drm_crtc *crtc)
- {
-+	struct drm_device *dev = crtc->dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	int fbc_wm, plane_wm, cursor_wm;
- 	unsigned int enabled;
-@@ -1868,8 +1875,9 @@ static void ironlake_update_wm(struct drm_device *dev)
- 	 */
- }
- 
--static void sandybridge_update_wm(struct drm_device *dev)
-+static void sandybridge_update_wm(struct drm_crtc *crtc)
- {
-+	struct drm_device *dev = crtc->dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	int latency = dev_priv->wm.pri_latency[0] * 100;	/* In unit 0.1us */
- 	u32 val;
-@@ -1970,8 +1978,9 @@ static void sandybridge_update_wm(struct drm_device *dev)
- 		   cursor_wm);
- }
- 
--static void ivybridge_update_wm(struct drm_device *dev)
-+static void ivybridge_update_wm(struct drm_crtc *crtc)
- {
-+	struct drm_device *dev = crtc->dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	int latency = dev_priv->wm.pri_latency[0] * 100;	/* In unit 0.1us */
- 	u32 val;
-@@ -2841,8 +2850,9 @@ static void hsw_write_wm_values(struct drm_i915_private *dev_priv,
- 		I915_WRITE(WM3_LP_ILK, results->wm_lp[2]);
- }
- 
--static void haswell_update_wm(struct drm_device *dev)
-+static void haswell_update_wm(struct drm_crtc *crtc)
- {
-+	struct drm_device *dev = crtc->dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct hsw_wm_maximums lp_max_1_2, lp_max_5_6;
- 	struct hsw_pipe_wm_parameters params[3];
-@@ -2879,7 +2889,7 @@ static void haswell_update_sprite_wm(struct drm_plane *plane,
- 	intel_plane->wm.horiz_pixels = sprite_width;
- 	intel_plane->wm.bytes_per_pixel = pixel_size;
- 
--	haswell_update_wm(plane->dev);
-+	haswell_update_wm(crtc);
- }
- 
- static bool
-@@ -3076,12 +3086,12 @@ static void sandybridge_update_sprite_wm(struct drm_plane *plane,
-  * We don't use the sprite, so we can ignore that.  And on Crestline we have
-  * to set the non-SR watermarks to 8.
-  */
--void intel_update_watermarks(struct drm_device *dev)
-+void intel_update_watermarks(struct drm_crtc *crtc)
- {
--	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct drm_i915_private *dev_priv = crtc->dev->dev_private;
- 
- 	if (dev_priv->display.update_wm)
--		dev_priv->display.update_wm(dev);
-+		dev_priv->display.update_wm(crtc);
- }
- 
- void intel_update_sprite_watermarks(struct drm_plane *plane,
-diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
-index ad6ec4b39005..d9c7a667553a 100644
---- a/drivers/gpu/drm/i915/intel_sprite.c
-+++ b/drivers/gpu/drm/i915/intel_sprite.c
-@@ -288,7 +288,7 @@ ivb_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
- 		dev_priv->sprite_scaling_enabled |= 1 << pipe;
- 
- 		if (!scaling_was_enabled) {
--			intel_update_watermarks(dev);
-+			intel_update_watermarks(crtc);
- 			intel_wait_for_vblank(dev, pipe);
- 		}
- 		sprscale = SPRITE_SCALE_ENABLE | (src_w << 16) | src_h;
-@@ -323,7 +323,7 @@ ivb_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
- 
- 	/* potentially re-enable LP watermarks */
- 	if (scaling_was_enabled && !dev_priv->sprite_scaling_enabled)
--		intel_update_watermarks(dev);
-+		intel_update_watermarks(crtc);
- }
- 
- static void
-@@ -349,7 +349,7 @@ ivb_disable_plane(struct drm_plane *plane, struct drm_crtc *crtc)
- 
- 	/* potentially re-enable LP watermarks */
- 	if (scaling_was_enabled && !dev_priv->sprite_scaling_enabled)
--		intel_update_watermarks(dev);
-+		intel_update_watermarks(crtc);
- }
- 
- static int
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0816-drm-i915-Call-intel_update_watermarks-in-specific-pl.patch b/patches.baytrail/0816-drm-i915-Call-intel_update_watermarks-in-specific-pl.patch
deleted file mode 100644
index f3fcb839acd68..0000000000000
--- a/patches.baytrail/0816-drm-i915-Call-intel_update_watermarks-in-specific-pl.patch
+++ /dev/null
@@ -1,142 +0,0 @@
-From fc1fb4d1ffe147684f2f49d7c70ad01197a24113 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Tue, 10 Sep 2013 11:39:55 +0300
-Subject: drm/i915: Call intel_update_watermarks() in specific place during
- modeset
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Make the call to intel_update_watermarks() just once or twice during
-modeset. Ideally it should happen independently when each plane gets
-enabled/disabled, but for now it seems better to keep it in central
-place. We can improve things when we get all the planes sorted out
-in a better way.
-
-When enabling set up the watermarks just before the pipe is enabled.
-And when disabling we need to wait until we've marked the crtc as
-inactive, as otherwise intel_crtc_active() would still think the pipe
-is enabled and the computed watermarks would reflect that.
-
-v2: Pimp up the commit message a bit
-
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit f37fcc2a263b3a6d9fb9730e0d828a3f9d15a8b0)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 19 ++++++-------------
- 1 file changed, 6 insertions(+), 13 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index c5123ac68cf9..c3fa87bf0175 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -3262,8 +3262,6 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc)
- 	intel_set_cpu_fifo_underrun_reporting(dev, pipe, true);
- 	intel_set_pch_fifo_underrun_reporting(dev, pipe, true);
- 
--	intel_update_watermarks(crtc);
--
- 	for_each_encoder_on_crtc(dev, crtc, encoder)
- 		if (encoder->pre_enable)
- 			encoder->pre_enable(encoder);
-@@ -3286,6 +3284,7 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc)
- 	 */
- 	intel_crtc_load_lut(crtc);
- 
-+	intel_update_watermarks(crtc);
- 	intel_enable_pipe(dev_priv, pipe,
- 			  intel_crtc->config.has_pch_encoder, false);
- 	intel_enable_plane(dev_priv, plane, pipe);
-@@ -3372,8 +3371,6 @@ static void haswell_crtc_enable(struct drm_crtc *crtc)
- 	if (intel_crtc->config.has_pch_encoder)
- 		intel_set_pch_fifo_underrun_reporting(dev, TRANSCODER_A, true);
- 
--	intel_update_watermarks(crtc);
--
- 	if (intel_crtc->config.has_pch_encoder)
- 		dev_priv->display.fdi_link_train(crtc);
- 
-@@ -3394,6 +3391,7 @@ static void haswell_crtc_enable(struct drm_crtc *crtc)
- 	intel_ddi_set_pipe_settings(crtc);
- 	intel_ddi_enable_transcoder_func(crtc);
- 
-+	intel_update_watermarks(crtc);
- 	intel_enable_pipe(dev_priv, pipe,
- 			  intel_crtc->config.has_pch_encoder, false);
- 	intel_enable_plane(dev_priv, plane, pipe);
-@@ -3665,7 +3663,6 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc)
- 		return;
- 
- 	intel_crtc->active = true;
--	intel_update_watermarks(crtc);
- 
- 	for_each_encoder_on_crtc(dev, crtc, encoder)
- 		if (encoder->pre_pll_enable)
-@@ -3684,6 +3681,7 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc)
- 
- 	intel_crtc_load_lut(crtc);
- 
-+	intel_update_watermarks(crtc);
- 	intel_enable_pipe(dev_priv, pipe, false, is_dsi);
- 	intel_enable_plane(dev_priv, plane, pipe);
- 	intel_enable_planes(crtc);
-@@ -3710,7 +3708,6 @@ static void i9xx_crtc_enable(struct drm_crtc *crtc)
- 		return;
- 
- 	intel_crtc->active = true;
--	intel_update_watermarks(crtc);
- 
- 	for_each_encoder_on_crtc(dev, crtc, encoder)
- 		if (encoder->pre_enable)
-@@ -3722,6 +3719,7 @@ static void i9xx_crtc_enable(struct drm_crtc *crtc)
- 
- 	intel_crtc_load_lut(crtc);
- 
-+	intel_update_watermarks(crtc);
- 	intel_enable_pipe(dev_priv, pipe, false, false);
- 	intel_enable_plane(dev_priv, plane, pipe);
- 	intel_enable_planes(crtc);
-@@ -3793,8 +3791,9 @@ static void i9xx_crtc_disable(struct drm_crtc *crtc)
- 		i9xx_disable_pll(dev_priv, pipe);
- 
- 	intel_crtc->active = false;
--	intel_update_fbc(dev);
- 	intel_update_watermarks(crtc);
-+
-+	intel_update_fbc(dev);
- }
- 
- static void i9xx_crtc_off(struct drm_crtc *crtc)
-@@ -4955,8 +4954,6 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
- 
- 	ret = intel_pipe_set_base(crtc, x, y, fb);
- 
--	intel_update_watermarks(crtc);
--
- 	return ret;
- }
- 
-@@ -5843,8 +5840,6 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
- 
- 	ret = intel_pipe_set_base(crtc, x, y, fb);
- 
--	intel_update_watermarks(crtc);
--
- 	return ret;
- }
- 
-@@ -6300,8 +6295,6 @@ static int haswell_crtc_mode_set(struct drm_crtc *crtc,
- 
- 	ret = intel_pipe_set_base(crtc, x, y, fb);
- 
--	intel_update_watermarks(crtc);
--
- 	return ret;
- }
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0817-drm-i915-Constify-some-watermark-data.patch b/patches.baytrail/0817-drm-i915-Constify-some-watermark-data.patch
deleted file mode 100644
index 999822f497134..0000000000000
--- a/patches.baytrail/0817-drm-i915-Constify-some-watermark-data.patch
+++ /dev/null
@@ -1,103 +0,0 @@
-From 5f64ed228d95234db88f37a9cded69e0c3128568 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Fri, 30 Aug 2013 14:30:23 +0300
-Subject: drm/i915: Constify some watermark data
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-hsw_pipe_wm_parameters and hsw_wm_maximums typically are read only. Make
-them const.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit ac830fe1c3d811db2bef1835b6e0c693bc3b237e)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 20 ++++++++++----------
- 1 file changed, 10 insertions(+), 10 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 22ee0e8a3b38..573122b5c9bd 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2205,7 +2205,7 @@ struct intel_wm_config {
-  * For both WM_PIPE and WM_LP.
-  * mem_value must be in 0.1us units.
-  */
--static uint32_t ilk_compute_pri_wm(struct hsw_pipe_wm_parameters *params,
-+static uint32_t ilk_compute_pri_wm(const struct hsw_pipe_wm_parameters *params,
- 				   uint32_t mem_value,
- 				   bool is_lp)
- {
-@@ -2234,7 +2234,7 @@ static uint32_t ilk_compute_pri_wm(struct hsw_pipe_wm_parameters *params,
-  * For both WM_PIPE and WM_LP.
-  * mem_value must be in 0.1us units.
-  */
--static uint32_t ilk_compute_spr_wm(struct hsw_pipe_wm_parameters *params,
-+static uint32_t ilk_compute_spr_wm(const struct hsw_pipe_wm_parameters *params,
- 				   uint32_t mem_value)
- {
- 	uint32_t method1, method2;
-@@ -2257,7 +2257,7 @@ static uint32_t ilk_compute_spr_wm(struct hsw_pipe_wm_parameters *params,
-  * For both WM_PIPE and WM_LP.
-  * mem_value must be in 0.1us units.
-  */
--static uint32_t ilk_compute_cur_wm(struct hsw_pipe_wm_parameters *params,
-+static uint32_t ilk_compute_cur_wm(const struct hsw_pipe_wm_parameters *params,
- 				   uint32_t mem_value)
- {
- 	if (!params->active || !params->cur.enabled)
-@@ -2271,7 +2271,7 @@ static uint32_t ilk_compute_cur_wm(struct hsw_pipe_wm_parameters *params,
- }
- 
- /* Only for WM_LP. */
--static uint32_t ilk_compute_fbc_wm(struct hsw_pipe_wm_parameters *params,
-+static uint32_t ilk_compute_fbc_wm(const struct hsw_pipe_wm_parameters *params,
- 				   uint32_t pri_val)
- {
- 	if (!params->active || !params->pri.enabled)
-@@ -2422,7 +2422,7 @@ static bool ilk_check_wm(int level,
- 
- static void ilk_compute_wm_level(struct drm_i915_private *dev_priv,
- 				 int level,
--				 struct hsw_pipe_wm_parameters *p,
-+				 const struct hsw_pipe_wm_parameters *p,
- 				 struct intel_wm_level *result)
- {
- 	uint16_t pri_latency = dev_priv->wm.pri_latency[level];
-@@ -2444,8 +2444,8 @@ static void ilk_compute_wm_level(struct drm_i915_private *dev_priv,
- }
- 
- static bool hsw_compute_lp_wm(struct drm_i915_private *dev_priv,
--			      int level, struct hsw_wm_maximums *max,
--			      struct hsw_pipe_wm_parameters *params,
-+			      int level, const struct hsw_wm_maximums *max,
-+			      const struct hsw_pipe_wm_parameters *params,
- 			      struct intel_wm_level *result)
- {
- 	enum pipe pipe;
-@@ -2465,7 +2465,7 @@ static bool hsw_compute_lp_wm(struct drm_i915_private *dev_priv,
- 
- static uint32_t hsw_compute_wm_pipe(struct drm_i915_private *dev_priv,
- 				    enum pipe pipe,
--				    struct hsw_pipe_wm_parameters *params)
-+				    const struct hsw_pipe_wm_parameters *params)
- {
- 	uint32_t pri_val, cur_val, spr_val;
- 	/* WM0 latency values stored in 0.1us units */
-@@ -2673,8 +2673,8 @@ static void hsw_compute_wm_parameters(struct drm_device *dev,
- }
- 
- static void hsw_compute_wm_results(struct drm_device *dev,
--				   struct hsw_pipe_wm_parameters *params,
--				   struct hsw_wm_maximums *lp_maximums,
-+				   const struct hsw_pipe_wm_parameters *params,
-+				   const struct hsw_wm_maximums *lp_maximums,
- 				   struct hsw_wm_values *results)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0818-drm-i915-Use-ilk_compute_wm_level-to-compute-WM_PIPE.patch b/patches.baytrail/0818-drm-i915-Use-ilk_compute_wm_level-to-compute-WM_PIPE.patch
deleted file mode 100644
index 48976b1e5c71f..0000000000000
--- a/patches.baytrail/0818-drm-i915-Use-ilk_compute_wm_level-to-compute-WM_PIPE.patch
+++ /dev/null
@@ -1,90 +0,0 @@
-From 9b239c55bfb7e7f3640f28970e393a26689ece96 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Fri, 30 Aug 2013 14:30:24 +0300
-Subject: drm/i915: Use ilk_compute_wm_level to compute WM_PIPE values
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Unify the code a bit to use ilk_compute_wm_level for all watermark
-levels.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 8de123a5d89f8eaf934737758251fb18b2660231)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 44 ++++++++++++++++++++---------------------
- 1 file changed, 21 insertions(+), 23 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 573122b5c9bd..c1c5ce03e7d6 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2463,33 +2463,31 @@ static bool hsw_compute_lp_wm(struct drm_i915_private *dev_priv,
- 	return ilk_check_wm(level, max, result);
- }
- 
--static uint32_t hsw_compute_wm_pipe(struct drm_i915_private *dev_priv,
--				    enum pipe pipe,
-+
-+static uint32_t hsw_compute_wm_pipe(struct drm_device *dev,
- 				    const struct hsw_pipe_wm_parameters *params)
- {
--	uint32_t pri_val, cur_val, spr_val;
--	/* WM0 latency values stored in 0.1us units */
--	uint16_t pri_latency = dev_priv->wm.pri_latency[0];
--	uint16_t spr_latency = dev_priv->wm.spr_latency[0];
--	uint16_t cur_latency = dev_priv->wm.cur_latency[0];
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct intel_wm_config config = {
-+		.num_pipes_active = 1,
-+		.sprites_enabled = params->spr.enabled,
-+		.sprites_scaled = params->spr.scaled,
-+	};
-+	struct hsw_wm_maximums max;
-+	struct intel_wm_level res;
-+
-+	if (!params->active)
-+		return 0;
-+
-+	ilk_wm_max(dev, 0, &config, INTEL_DDB_PART_1_2, &max);
- 
--	pri_val = ilk_compute_pri_wm(params, pri_latency, false);
--	spr_val = ilk_compute_spr_wm(params, spr_latency);
--	cur_val = ilk_compute_cur_wm(params, cur_latency);
-+	ilk_compute_wm_level(dev_priv, 0, params, &res);
- 
--	WARN(pri_val > 127,
--	     "Primary WM error, mode not supported for pipe %c\n",
--	     pipe_name(pipe));
--	WARN(spr_val > 127,
--	     "Sprite WM error, mode not supported for pipe %c\n",
--	     pipe_name(pipe));
--	WARN(cur_val > 63,
--	     "Cursor WM error, mode not supported for pipe %c\n",
--	     pipe_name(pipe));
-+	ilk_check_wm(0, &max, &res);
- 
--	return (pri_val << WM0_PIPE_PLANE_SHIFT) |
--	       (spr_val << WM0_PIPE_SPRITE_SHIFT) |
--	       cur_val;
-+	return (res.pri_val << WM0_PIPE_PLANE_SHIFT) |
-+	       (res.spr_val << WM0_PIPE_SPRITE_SHIFT) |
-+	       res.cur_val;
- }
- 
- static uint32_t
-@@ -2718,7 +2716,7 @@ static void hsw_compute_wm_results(struct drm_device *dev,
- 	}
- 
- 	for_each_pipe(pipe)
--		results->wm_pipe[pipe] = hsw_compute_wm_pipe(dev_priv, pipe,
-+		results->wm_pipe[pipe] = hsw_compute_wm_pipe(dev,
- 							     &params[pipe]);
- 
- 	for_each_pipe(pipe) {
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0819-drm-i915-Refactor-max-WM-level.patch b/patches.baytrail/0819-drm-i915-Refactor-max-WM-level.patch
deleted file mode 100644
index b5c3b14dda38e..0000000000000
--- a/patches.baytrail/0819-drm-i915-Refactor-max-WM-level.patch
+++ /dev/null
@@ -1,58 +0,0 @@
-From 249abd555d4080ed5487f704077f1d05ca724632 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Fri, 30 Aug 2013 14:30:25 +0300
-Subject: drm/i915: Refactor max WM level
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Pull the expected max WM level determinations out to a separate
-function. Will have another user soon.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit ad0d6dc4859ffb769768b64942b6a110e92acd21)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 19 +++++++++++--------
- 1 file changed, 11 insertions(+), 8 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index c1c5ce03e7d6..2b7f76be01c3 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2561,19 +2561,22 @@ static void intel_fixup_cur_wm_latency(struct drm_device *dev, uint16_t wm[5])
- 		wm[3] *= 2;
- }
- 
--static void intel_print_wm_latency(struct drm_device *dev,
--				   const char *name,
--				   const uint16_t wm[5])
-+static int ilk_wm_max_level(const struct drm_device *dev)
- {
--	int level, max_level;
--
- 	/* how many WM levels are we expecting */
- 	if (IS_HASWELL(dev))
--		max_level = 4;
-+		return 4;
- 	else if (INTEL_INFO(dev)->gen >= 6)
--		max_level = 3;
-+		return 3;
- 	else
--		max_level = 2;
-+		return 2;
-+}
-+
-+static void intel_print_wm_latency(struct drm_device *dev,
-+				   const char *name,
-+				   const uint16_t wm[5])
-+{
-+	int level, max_level = ilk_wm_max_level(dev);
- 
- 	for (level = 0; level <= max_level; level++) {
- 		unsigned int latency = wm[level];
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0820-drm-i915-sdvo-Fully-translate-sync-flags-in-the-dtd-.patch b/patches.baytrail/0820-drm-i915-sdvo-Fully-translate-sync-flags-in-the-dtd-.patch
deleted file mode 100644
index 1daed8041b9f3..0000000000000
--- a/patches.baytrail/0820-drm-i915-sdvo-Fully-translate-sync-flags-in-the-dtd-.patch
+++ /dev/null
@@ -1,45 +0,0 @@
-From 8412c597c77ee6c4a079625efa4aaf565321e3ec Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Tue, 10 Sep 2013 10:02:48 +0200
-Subject: drm/i915/sdvo: Fully translate sync flags in the dtd->mode conversion
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Instead of just a flag bit for each of the positive/negative sync
-modes drm actually uses a separate flag for each ... This upsets the
-modeset checker since the adjusted mode filled out at modeset time
-doesn't match the one reconstructed at check time (since the
-->get_config callback already gets this right).
-
-Reported-by: Knut Petersen <Knut_Petersen@t-online.de>
-Cc: Knut Petersen <Knut_Petersen@t-online.de>
-References: http://www.gossamer-threads.com/lists/linux/kernel/1778688?do=post_view_threaded
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 3cea210f2c7c50e67287207a6548314491f49f31)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_sdvo.c | 4 ++++
- 1 file changed, 4 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
-index 9dc1697f79d3..296c53b0bbc8 100644
---- a/drivers/gpu/drm/i915/intel_sdvo.c
-+++ b/drivers/gpu/drm/i915/intel_sdvo.c
-@@ -866,8 +866,12 @@ static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
- 		mode->flags |= DRM_MODE_FLAG_INTERLACE;
- 	if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
- 		mode->flags |= DRM_MODE_FLAG_PHSYNC;
-+	else
-+		mode->flags |= DRM_MODE_FLAG_NHSYNC;
- 	if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
- 		mode->flags |= DRM_MODE_FLAG_PVSYNC;
-+	else
-+		mode->flags |= DRM_MODE_FLAG_NVSYNC;
- }
- 
- static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0821-drm-i915-Write-RING_TAIL-once-per-request.patch b/patches.baytrail/0821-drm-i915-Write-RING_TAIL-once-per-request.patch
deleted file mode 100644
index 3fcc713320aab..0000000000000
--- a/patches.baytrail/0821-drm-i915-Write-RING_TAIL-once-per-request.patch
+++ /dev/null
@@ -1,186 +0,0 @@
-From 4749f56ea5e3b35118f591153f8814733541fd8c Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Sat, 10 Aug 2013 22:16:32 +0100
-Subject: drm/i915: Write RING_TAIL once per-request
-
-Ignoring the legacy DRI1 code, and a couple of special cases (to be
-discussed later), all access to the ring is mediated through requests.
-The first write to a ring will grab a seqno and mark the ring as having
-an outstanding_lazy_request. Either through explicitly adding a request
-after an execbuffer or through an implicit wait (either by the CPU or by
-a semaphore), that sequence of writes will be terminated with a request.
-So we can ellide all the intervening writes to the tail register and
-send the entire command stream to the GPU at once. This will reduce the
-number of *serialising* writes to the tail register by a factor or 3-5
-times (depending upon architecture and number of workarounds, context
-switches, etc involved). This becomes even more noticeable when the
-register write is overloaded with a number of debugging tools. The
-astute reader will wonder if it is then possible to overflow the ring
-with a single command. It is not. When we start a command sequence to
-the ring, we check for available space and issue a wait in case we have
-not. The ring wait will in this case be forced to flush the outstanding
-register write and then poll the ACTHD for sufficient space to continue.
-
-The exception to the rule where everything is inside a request are a few
-initialisation cases where we may want to write GPU commands via the CS
-before userspace wakes up and page flips.
-
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 092467327c45edbfce6c2bb71ee842bec16b9a60)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_dma.c         |    2 +-
- drivers/gpu/drm/i915/intel_display.c    |   10 +++++-----
- drivers/gpu/drm/i915/intel_ringbuffer.c |   30 ++++++++++++++++--------------
- drivers/gpu/drm/i915/intel_ringbuffer.h |    7 ++++++-
- 4 files changed, 28 insertions(+), 21 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_dma.c
-+++ b/drivers/gpu/drm/i915/i915_dma.c
-@@ -52,7 +52,7 @@
- 	intel_ring_emit(LP_RING(dev_priv), x)
- 
- #define ADVANCE_LP_RING() \
--	intel_ring_advance(LP_RING(dev_priv))
-+	__intel_ring_advance(LP_RING(dev_priv))
- 
- /**
-  * Lock test for when it's just for synchronization of ring access.
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -7703,7 +7703,7 @@ static int intel_gen2_queue_flip(struct
- 	intel_ring_emit(ring, 0); /* aux display base address, unused */
- 
- 	intel_mark_page_flip_active(intel_crtc);
--	intel_ring_advance(ring);
-+	__intel_ring_advance(ring);
- 	return 0;
- 
- err_unpin:
-@@ -7745,7 +7745,7 @@ static int intel_gen3_queue_flip(struct
- 	intel_ring_emit(ring, MI_NOOP);
- 
- 	intel_mark_page_flip_active(intel_crtc);
--	intel_ring_advance(ring);
-+	__intel_ring_advance(ring);
- 	return 0;
- 
- err_unpin:
-@@ -7794,7 +7794,7 @@ static int intel_gen4_queue_flip(struct
- 	intel_ring_emit(ring, pf | pipesrc);
- 
- 	intel_mark_page_flip_active(intel_crtc);
--	intel_ring_advance(ring);
-+	__intel_ring_advance(ring);
- 	return 0;
- 
- err_unpin:
-@@ -7839,7 +7839,7 @@ static int intel_gen6_queue_flip(struct
- 	intel_ring_emit(ring, pf | pipesrc);
- 
- 	intel_mark_page_flip_active(intel_crtc);
--	intel_ring_advance(ring);
-+	__intel_ring_advance(ring);
- 	return 0;
- 
- err_unpin:
-@@ -7918,7 +7918,7 @@ static int intel_gen7_queue_flip(struct
- 	intel_ring_emit(ring, (MI_NOOP));
- 
- 	intel_mark_page_flip_active(intel_crtc);
--	intel_ring_advance(ring);
-+	__intel_ring_advance(ring);
- 	return 0;
- 
- err_unpin:
---- a/drivers/gpu/drm/i915/intel_ringbuffer.c
-+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
-@@ -41,6 +41,16 @@ static inline int ring_space(struct inte
- 	return space;
- }
- 
-+void __intel_ring_advance(struct intel_ring_buffer *ring)
-+{
-+	struct drm_i915_private *dev_priv = ring->dev->dev_private;
-+
-+	ring->tail &= ring->size - 1;
-+	if (dev_priv->gpu_error.stop_rings & intel_ring_flag(ring))
-+		return;
-+	ring->write_tail(ring, ring->tail);
-+}
-+
- static int
- gen2_render_ring_flush(struct intel_ring_buffer *ring,
- 		       u32	invalidate_domains,
-@@ -631,7 +641,7 @@ gen6_add_request(struct intel_ring_buffe
- 	intel_ring_emit(ring, I915_GEM_HWS_INDEX << MI_STORE_DWORD_INDEX_SHIFT);
- 	intel_ring_emit(ring, ring->outstanding_lazy_seqno);
- 	intel_ring_emit(ring, MI_USER_INTERRUPT);
--	intel_ring_advance(ring);
-+	__intel_ring_advance(ring);
- 
- 	return 0;
- }
-@@ -744,7 +754,7 @@ pc_render_add_request(struct intel_ring_
- 	intel_ring_emit(ring, ring->scratch.gtt_offset | PIPE_CONTROL_GLOBAL_GTT);
- 	intel_ring_emit(ring, ring->outstanding_lazy_seqno);
- 	intel_ring_emit(ring, 0);
--	intel_ring_advance(ring);
-+	__intel_ring_advance(ring);
- 
- 	return 0;
- }
-@@ -965,7 +975,7 @@ i9xx_add_request(struct intel_ring_buffe
- 	intel_ring_emit(ring, I915_GEM_HWS_INDEX << MI_STORE_DWORD_INDEX_SHIFT);
- 	intel_ring_emit(ring, ring->outstanding_lazy_seqno);
- 	intel_ring_emit(ring, MI_USER_INTERRUPT);
--	intel_ring_advance(ring);
-+	__intel_ring_advance(ring);
- 
- 	return 0;
- }
-@@ -1414,6 +1424,9 @@ static int ring_wait_for_space(struct in
- 	if (ret != -ENOSPC)
- 		return ret;
- 
-+	/* force the tail write in case we have been skipping them */
-+	__intel_ring_advance(ring);
-+
- 	trace_i915_ring_wait_begin(ring);
- 	/* With GEM the hangcheck timer should kick us out of the loop,
- 	 * leaving it early runs the risk of corrupting GEM state (due
-@@ -1572,17 +1585,6 @@ void intel_ring_init_seqno(struct intel_
- 	ring->hangcheck.seqno = seqno;
- }
- 
--void intel_ring_advance(struct intel_ring_buffer *ring)
--{
--	struct drm_i915_private *dev_priv = ring->dev->dev_private;
--
--	ring->tail &= ring->size - 1;
--	if (dev_priv->gpu_error.stop_rings & intel_ring_flag(ring))
--		return;
--	ring->write_tail(ring, ring->tail);
--}
--
--
- static void gen6_bsd_ring_write_tail(struct intel_ring_buffer *ring,
- 				     u32 value)
- {
---- a/drivers/gpu/drm/i915/intel_ringbuffer.h
-+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
-@@ -239,7 +239,12 @@ static inline void intel_ring_emit(struc
- 	iowrite32(data, ring->virtual_start + ring->tail);
- 	ring->tail += 4;
- }
--void intel_ring_advance(struct intel_ring_buffer *ring);
-+static inline void intel_ring_advance(struct intel_ring_buffer *ring)
-+{
-+	ring->tail &= ring->size - 1;
-+}
-+void __intel_ring_advance(struct intel_ring_buffer *ring);
-+
- int __must_check intel_ring_idle(struct intel_ring_buffer *ring);
- void intel_ring_init_seqno(struct intel_ring_buffer *ring, u32 seqno);
- int intel_ring_flush_all_caches(struct intel_ring_buffer *ring);
diff --git a/patches.baytrail/0822-drm-i915-Remove-the-double-list-iteration-from-bound.patch b/patches.baytrail/0822-drm-i915-Remove-the-double-list-iteration-from-bound.patch
deleted file mode 100644
index 7ebd6c1fe5058..0000000000000
--- a/patches.baytrail/0822-drm-i915-Remove-the-double-list-iteration-from-bound.patch
+++ /dev/null
@@ -1,40 +0,0 @@
-From a851a1a6a7ec920e9ffc4065ff606bb14584b460 Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Tue, 10 Sep 2013 11:27:37 +0100
-Subject: drm/i915: Remove the double-list iteration from bound_any()
-
-The purpose of the function is to find out whether the object is still
-bound in any address space. This can be easily checked by looking at the
-vma currently associated with the object, rather than asking if any of
-the global address spaces have an active vma on the object.
-
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 5a1d5eb020a27759f5cab4d72222d1752bb29453)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem.c | 7 +++----
- 1 file changed, 3 insertions(+), 4 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index ff8817f3eaa6..5b510a3bf3ed 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -4920,11 +4920,10 @@ bool i915_gem_obj_bound(struct drm_i915_gem_object *o,
- 
- bool i915_gem_obj_bound_any(struct drm_i915_gem_object *o)
- {
--	struct drm_i915_private *dev_priv = o->base.dev->dev_private;
--	struct i915_address_space *vm;
-+	struct i915_vma *vma;
- 
--	list_for_each_entry(vm, &dev_priv->vm_list, global_link)
--		if (i915_gem_obj_bound(o, vm))
-+	list_for_each_entry(vma, &o->vma_list, vma_link)
-+		if (drm_mm_node_allocated(&vma->node))
- 			return true;
- 
- 	return false;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0823-drm-i915-Fix-HSW-sync-flags-to-use-pipe-config-adjus.patch b/patches.baytrail/0823-drm-i915-Fix-HSW-sync-flags-to-use-pipe-config-adjus.patch
deleted file mode 100644
index 3a5c1e73fc8b7..0000000000000
--- a/patches.baytrail/0823-drm-i915-Fix-HSW-sync-flags-to-use-pipe-config-adjus.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From 77938d1b4e876b2417c7f68ae4c84c5d84178484 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Tue, 10 Sep 2013 17:03:41 +0300
-Subject: drm/i915: Fix HSW sync flags to use pipe config adjusted_mode
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-intel_ddi_enable_transcoder_func() picked the sync flags from crtc->mode
-instead of the pipe config adjusted_mode. Fix the problem and hopefully
-rid my HSW machine of the remaining pipe config warnings.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit a666283e9061c58fc888ddf1d9fc552123f1f014)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_ddi.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
-index ace63bd7afe6..6082ab2d2541 100644
---- a/drivers/gpu/drm/i915/intel_ddi.c
-+++ b/drivers/gpu/drm/i915/intel_ddi.c
-@@ -767,9 +767,9 @@ void intel_ddi_enable_transcoder_func(struct drm_crtc *crtc)
- 		BUG();
- 	}
- 
--	if (crtc->mode.flags & DRM_MODE_FLAG_PVSYNC)
-+	if (intel_crtc->config.adjusted_mode.flags & DRM_MODE_FLAG_PVSYNC)
- 		temp |= TRANS_DDI_PVSYNC;
--	if (crtc->mode.flags & DRM_MODE_FLAG_PHSYNC)
-+	if (intel_crtc->config.adjusted_mode.flags & DRM_MODE_FLAG_PHSYNC)
- 		temp |= TRANS_DDI_PHSYNC;
- 
- 	if (cpu_transcoder == TRANSCODER_EDP) {
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0824-drm-i915-vlv-re-enable-hotplug-detect-based-probing-.patch b/patches.baytrail/0824-drm-i915-vlv-re-enable-hotplug-detect-based-probing-.patch
deleted file mode 100644
index 98b25cd64d4fa..0000000000000
--- a/patches.baytrail/0824-drm-i915-vlv-re-enable-hotplug-detect-based-probing-.patch
+++ /dev/null
@@ -1,38 +0,0 @@
-From 0791219edf36af1b4bced404eb00f2cd736823ec Mon Sep 17 00:00:00 2001
-From: Jesse Barnes <jbarnes@virtuousgeek.org>
-Date: Tue, 10 Sep 2013 14:54:42 -0700
-Subject: drm/i915/vlv: re-enable hotplug detect based probing on VLV/BYT
-
-Fixed with
-
-commit 10603caacf599297c7da0c4f4db440d015b8131a
-Author: Chris Wilson <chris@chris-wilson.co.uk>
-Date:   Mon Aug 26 19:51:06 2013 -0300
-
-    drm/i915: Apply the force-detect VGA w/a to Valleyview
-
-Signed-off-by: Jesse Barnes <jbarnes@virtuosugeek.org>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 6c4a8962a4a078cacfc8eb5d4bd79f6343b8cd7a)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_crt.c | 3 ---
- 1 file changed, 3 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
-index ea9022ef15d5..f5f89c31d71e 100644
---- a/drivers/gpu/drm/i915/intel_crt.c
-+++ b/drivers/gpu/drm/i915/intel_crt.c
-@@ -349,9 +349,6 @@ static bool valleyview_crt_detect_hotplug(struct drm_connector *connector)
- 
- 	DRM_DEBUG_KMS("valleyview hotplug adpa=0x%x, result %d\n", adpa, ret);
- 
--	/* FIXME: debug force function and remove */
--	ret = true;
--
- 	return ret;
- }
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0825-drm-i915-sdvo-Robustify-the-dtd-drm_mode-conversions.patch b/patches.baytrail/0825-drm-i915-sdvo-Robustify-the-dtd-drm_mode-conversions.patch
deleted file mode 100644
index 4809bf570f8eb..0000000000000
--- a/patches.baytrail/0825-drm-i915-sdvo-Robustify-the-dtd-drm_mode-conversions.patch
+++ /dev/null
@@ -1,142 +0,0 @@
-From 2fa2477b5e4ba07b9eb8c6c58f55d59c9b54d5e8 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Wed, 11 Sep 2013 09:58:49 +0200
-Subject: drm/i915/sdvo: Robustify the dtd<->drm_mode conversions
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-We've failed to properly clear out the flags when converting a dtd to
-a drm mode. For more paranoia just memset the entire structure (and
-drop the now redundant clears).
-
-Also since
-
-commit 135c81b8c3c9a70d7b55758c9c2a247a4abb7b64
-Author: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date:   Sun Jul 21 21:37:09 2013 +0200
-
-    drm/i915: clean up crtc timings computation
-
-we don't update the crtc timings any more properly, so do that again.
-
-v2: Remove more redundant clearing, spotted by Ville.
-
-v3: Actually make it compile. Oops.
-
-v4: Use a temporary structure to fill in the mode and copy it over
-with drm_mode_copy. This will ensure we don't clobber the mode list or
-id. Suggested by Ville.
-
-Cc: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
-Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reported-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-[danvet: Use the = {}; structure clearing instead of memset as
-suggested by Ville.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 1c4a814e35a2fb5500e94ec60370c53a2fb592ac)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_sdvo.c | 63 +++++++++++++++++++++------------------
- 1 file changed, 34 insertions(+), 29 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
-index 296c53b0bbc8..86809b446a99 100644
---- a/drivers/gpu/drm/i915/intel_sdvo.c
-+++ b/drivers/gpu/drm/i915/intel_sdvo.c
-@@ -788,6 +788,8 @@ static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
- 	uint16_t h_sync_offset, v_sync_offset;
- 	int mode_clock;
- 
-+	memset(dtd, 0, sizeof(*dtd));
-+
- 	width = mode->hdisplay;
- 	height = mode->vdisplay;
- 
-@@ -830,48 +832,51 @@ static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
- 	if (mode->flags & DRM_MODE_FLAG_PVSYNC)
- 		dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;
- 
--	dtd->part2.sdvo_flags = 0;
- 	dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
--	dtd->part2.reserved = 0;
- }
- 
--static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
-+static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode *pmode,
- 					 const struct intel_sdvo_dtd *dtd)
- {
--	mode->hdisplay = dtd->part1.h_active;
--	mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
--	mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
--	mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
--	mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
--	mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
--	mode->htotal = mode->hdisplay + dtd->part1.h_blank;
--	mode->htotal += (dtd->part1.h_high & 0xf) << 8;
--
--	mode->vdisplay = dtd->part1.v_active;
--	mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
--	mode->vsync_start = mode->vdisplay;
--	mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
--	mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
--	mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
--	mode->vsync_end = mode->vsync_start +
-+	struct drm_display_mode mode = {};
-+
-+	mode.hdisplay = dtd->part1.h_active;
-+	mode.hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
-+	mode.hsync_start = mode.hdisplay + dtd->part2.h_sync_off;
-+	mode.hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
-+	mode.hsync_end = mode.hsync_start + dtd->part2.h_sync_width;
-+	mode.hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
-+	mode.htotal = mode.hdisplay + dtd->part1.h_blank;
-+	mode.htotal += (dtd->part1.h_high & 0xf) << 8;
-+
-+	mode.vdisplay = dtd->part1.v_active;
-+	mode.vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
-+	mode.vsync_start = mode.vdisplay;
-+	mode.vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
-+	mode.vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
-+	mode.vsync_start += dtd->part2.v_sync_off_high & 0xc0;
-+	mode.vsync_end = mode.vsync_start +
- 		(dtd->part2.v_sync_off_width & 0xf);
--	mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
--	mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
--	mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
-+	mode.vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
-+	mode.vtotal = mode.vdisplay + dtd->part1.v_blank;
-+	mode.vtotal += (dtd->part1.v_high & 0xf) << 8;
- 
--	mode->clock = dtd->part1.clock * 10;
-+	mode.clock = dtd->part1.clock * 10;
- 
--	mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
- 	if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE)
--		mode->flags |= DRM_MODE_FLAG_INTERLACE;
-+		mode.flags |= DRM_MODE_FLAG_INTERLACE;
- 	if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
--		mode->flags |= DRM_MODE_FLAG_PHSYNC;
-+		mode.flags |= DRM_MODE_FLAG_PHSYNC;
- 	else
--		mode->flags |= DRM_MODE_FLAG_NHSYNC;
-+		mode.flags |= DRM_MODE_FLAG_NHSYNC;
- 	if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
--		mode->flags |= DRM_MODE_FLAG_PVSYNC;
-+		mode.flags |= DRM_MODE_FLAG_PVSYNC;
- 	else
--		mode->flags |= DRM_MODE_FLAG_NVSYNC;
-+		mode.flags |= DRM_MODE_FLAG_NVSYNC;
-+
-+	drm_mode_set_crtcinfo(&mode, 0);
-+
-+	drm_mode_copy(pmode, &mode);
- }
- 
- static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0826-drm-i915-dvo-set-crtc-timings-again-for-panel-fixed-.patch b/patches.baytrail/0826-drm-i915-dvo-set-crtc-timings-again-for-panel-fixed-.patch
deleted file mode 100644
index 3ecca1debf4bc..0000000000000
--- a/patches.baytrail/0826-drm-i915-dvo-set-crtc-timings-again-for-panel-fixed-.patch
+++ /dev/null
@@ -1,46 +0,0 @@
-From 402058a5e2c0b9262872581c8e9e71d3c2ada077 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Wed, 11 Sep 2013 09:58:50 +0200
-Subject: drm/i915/dvo: set crtc timings again for panel fixed modes
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Yet another regression due to
-
-commit 135c81b8c3c9a70d7b55758c9c2a247a4abb7b64
-Author: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date:   Sun Jul 21 21:37:09 2013 +0200
-
-    drm/i915: clean up crtc timings computation
-
-I'm starting to wonder whether this was worth it ...
-
-v2: Actually make it compile.
-
-Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
-Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 0d971748d086f3bf2dcf4094dd92d17ee123f669)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_dvo.c | 2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_dvo.c b/drivers/gpu/drm/i915/intel_dvo.c
-index ef5c12a1deda..55cec3871b04 100644
---- a/drivers/gpu/drm/i915/intel_dvo.c
-+++ b/drivers/gpu/drm/i915/intel_dvo.c
-@@ -263,6 +263,8 @@ static bool intel_dvo_compute_config(struct intel_encoder *encoder,
- 		C(vtotal);
- 		C(clock);
- #undef C
-+
-+		drm_mode_set_crtcinfo(adjusted_mode, 0);
- 	}
- 
- 	return true;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0827-drm-i915-Synchronize-pread-pwrite-with-wait_renderin.patch b/patches.baytrail/0827-drm-i915-Synchronize-pread-pwrite-with-wait_renderin.patch
deleted file mode 100644
index 43ab3894a9b15..0000000000000
--- a/patches.baytrail/0827-drm-i915-Synchronize-pread-pwrite-with-wait_renderin.patch
+++ /dev/null
@@ -1,79 +0,0 @@
-From 090eb2d0029ac3652631edebefe87e9ef01c911b Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <benjamin.widawsky@intel.com>
-Date: Wed, 11 Sep 2013 14:57:48 -0700
-Subject: drm/i915: Synchronize pread/pwrite with wait_rendering
-
-lifted from Daniel:
-pread/pwrite isn't about the object's domain at all, but purely about
-synchronizing for outstanding rendering. Replacing the call to
-set_to_gtt_domain with a wait_rendering would imo improve code
-readability. Furthermore we could pimp pread to only block for
-outstanding writes and not for reads.
-
-Since you're not the first one to trip over this: Can I volunteer you
-for a follow-up patch to fix this?
-
-v2: Switch the pwrite patch to use \!read_only. This was a typo in the
-original code. (Chris, Daniel)
-
-Recommended-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-[danvet: Fix up the logic fumble - wait_rendering has a bool readonly
-paramater, set_to_gtt_domain otoh has bool write. Breakage reported by
-Jani Nikula, I've double-checked that igt/gem_concurrent_blt/prw-*
-would have caught this.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 23f54483980cea980af37e436ff4e6701aadce12)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem.c | 19 +++++++++----------
- 1 file changed, 9 insertions(+), 10 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index 5b510a3bf3ed..bc85c48e856f 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -41,6 +41,9 @@ static void i915_gem_object_flush_gtt_write_domain(struct drm_i915_gem_object *o
- static void i915_gem_object_flush_cpu_write_domain(struct drm_i915_gem_object *obj,
- 						   bool force);
- static __must_check int
-+i915_gem_object_wait_rendering(struct drm_i915_gem_object *obj,
-+			       bool readonly);
-+static __must_check int
- i915_gem_object_bind_to_vm(struct drm_i915_gem_object *obj,
- 			   struct i915_address_space *vm,
- 			   unsigned alignment,
-@@ -430,11 +433,9 @@ i915_gem_shmem_pread(struct drm_device *dev,
- 		 * optimizes for the case when the gpu will dirty the data
- 		 * anyway again before the next pread happens. */
- 		needs_clflush = !cpu_cache_is_coherent(dev, obj->cache_level);
--		if (i915_gem_obj_bound_any(obj)) {
--			ret = i915_gem_object_set_to_gtt_domain(obj, false);
--			if (ret)
--				return ret;
--		}
-+		ret = i915_gem_object_wait_rendering(obj, true);
-+		if (ret)
-+			return ret;
- 	}
- 
- 	ret = i915_gem_object_get_pages(obj);
-@@ -746,11 +747,9 @@ i915_gem_shmem_pwrite(struct drm_device *dev,
- 		 * optimizes for the case when the gpu will use the data
- 		 * right away and we therefore have to clflush anyway. */
- 		needs_clflush_after = cpu_write_needs_clflush(obj);
--		if (i915_gem_obj_bound_any(obj)) {
--			ret = i915_gem_object_set_to_gtt_domain(obj, true);
--			if (ret)
--				return ret;
--		}
-+		ret = i915_gem_object_wait_rendering(obj, false);
-+		if (ret)
-+			return ret;
- 	}
- 	/* Same trick applies to invalidate partially written cachelines read
- 	 * before writing. */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0828-drm-i915-Extract-vm-specific-part-of-eviction.patch b/patches.baytrail/0828-drm-i915-Extract-vm-specific-part-of-eviction.patch
deleted file mode 100644
index 76af79d917569..0000000000000
--- a/patches.baytrail/0828-drm-i915-Extract-vm-specific-part-of-eviction.patch
+++ /dev/null
@@ -1,70 +0,0 @@
-From 3ea876f768feca917db94e6d194b7a7d42b0b902 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <benjamin.widawsky@intel.com>
-Date: Wed, 11 Sep 2013 14:57:49 -0700
-Subject: drm/i915: Extract vm specific part of eviction
-
-As we'll see in the next patch, being able to evict for just 1 VM is
-handy.
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 7b7961220f1426aa795a3ded3404470b1c5749b6)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem_evict.c | 28 ++++++++++++++++++++++------
- 1 file changed, 22 insertions(+), 6 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem_evict.c b/drivers/gpu/drm/i915/i915_gem_evict.c
-index cc8974fbcf31..e9033f02f498 100644
---- a/drivers/gpu/drm/i915/i915_gem_evict.c
-+++ b/drivers/gpu/drm/i915/i915_gem_evict.c
-@@ -155,12 +155,31 @@ found:
- 	return ret;
- }
- 
-+static int i915_gem_evict_vm(struct i915_address_space *vm, bool do_idle)
-+{
-+	struct i915_vma *vma, *next;
-+	int ret;
-+
-+	if (do_idle) {
-+		ret = i915_gpu_idle(vm->dev);
-+		if (ret)
-+			return ret;
-+
-+		i915_gem_retire_requests(vm->dev);
-+	}
-+
-+	list_for_each_entry_safe(vma, next, &vm->inactive_list, mm_list)
-+		if (vma->obj->pin_count == 0)
-+			WARN_ON(i915_vma_unbind(vma));
-+
-+	return 0;
-+}
-+
- int
- i915_gem_evict_everything(struct drm_device *dev)
- {
- 	drm_i915_private_t *dev_priv = dev->dev_private;
- 	struct i915_address_space *vm;
--	struct i915_vma *vma, *next;
- 	bool lists_empty = true;
- 	int ret;
- 
-@@ -187,11 +206,8 @@ i915_gem_evict_everything(struct drm_device *dev)
- 	i915_gem_retire_requests(dev);
- 
- 	/* Having flushed everything, unbind() should never raise an error */
--	list_for_each_entry(vm, &dev_priv->vm_list, global_link) {
--		list_for_each_entry_safe(vma, next, &vm->inactive_list, mm_list)
--			if (vma->obj->pin_count == 0)
--				WARN_ON(i915_vma_unbind(vma));
--	}
-+	list_for_each_entry(vm, &dev_priv->vm_list, global_link)
-+		WARN_ON(i915_gem_evict_vm(vm, false));
- 
- 	return 0;
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0829-drm-i915-evict-VM-instead-of-everything.patch b/patches.baytrail/0829-drm-i915-evict-VM-instead-of-everything.patch
deleted file mode 100644
index c461d584d23a8..0000000000000
--- a/patches.baytrail/0829-drm-i915-evict-VM-instead-of-everything.patch
+++ /dev/null
@@ -1,110 +0,0 @@
-From 3cf3b6c062de787809efd706c10569a017cbb202 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <benjamin.widawsky@intel.com>
-Date: Wed, 11 Sep 2013 14:57:50 -0700
-Subject: drm/i915: evict VM instead of everything
-
-When reserving objects during execbuf, it is possible to come across an
-object which will not fit given the current fragmentation of the address
-space. We do not have any defragment in drm_mm, so the strategy is to
-instead evict everything, and reallocate objects.
-
-With the upcoming addition of multiple VMs, there is no point to evict
-everything since doing so is overkill for the specific case mentioned
-above.
-
-Recommended-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-[danvet: One additional s/evict_everything/evict_vm/ to update a
-comment in the code.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 68c8c17f527effba57f4e82efee18a249c6a1b58)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h            |  1 +
- drivers/gpu/drm/i915/i915_gem_evict.c      | 19 +++++++++++++++++--
- drivers/gpu/drm/i915/i915_gem_execbuffer.c |  8 +++++++-
- 3 files changed, 25 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 81ba5bbc97fa..7caf71d52abe 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -2106,6 +2106,7 @@ int __must_check i915_gem_evict_something(struct drm_device *dev,
- 					  unsigned cache_level,
- 					  bool mappable,
- 					  bool nonblock);
-+int i915_gem_evict_vm(struct i915_address_space *vm, bool do_idle);
- int i915_gem_evict_everything(struct drm_device *dev);
- 
- /* i915_gem_stolen.c */
-diff --git a/drivers/gpu/drm/i915/i915_gem_evict.c b/drivers/gpu/drm/i915/i915_gem_evict.c
-index e9033f02f498..3a3981eb3012 100644
---- a/drivers/gpu/drm/i915/i915_gem_evict.c
-+++ b/drivers/gpu/drm/i915/i915_gem_evict.c
-@@ -116,7 +116,7 @@ none:
- 	}
- 
- 	/* We expect the caller to unpin, evict all and try again, or give up.
--	 * So calling i915_gem_evict_everything() is unnecessary.
-+	 * So calling i915_gem_evict_vm() is unnecessary.
- 	 */
- 	return -ENOSPC;
- 
-@@ -155,7 +155,22 @@ found:
- 	return ret;
- }
- 
--static int i915_gem_evict_vm(struct i915_address_space *vm, bool do_idle)
-+/**
-+ * i915_gem_evict_vm - Try to free up VM space
-+ *
-+ * @vm: Address space to evict from
-+ * @do_idle: Boolean directing whether to idle first.
-+ *
-+ * VM eviction is about freeing up virtual address space. If one wants fine
-+ * grained eviction, they should see evict something for more details. In terms
-+ * of freeing up actual system memory, this function may not accomplish the
-+ * desired result. An object may be shared in multiple address space, and this
-+ * function will not assert those objects be freed.
-+ *
-+ * Using do_idle will result in a more complete eviction because it retires, and
-+ * inactivates current BOs.
-+ */
-+int i915_gem_evict_vm(struct i915_address_space *vm, bool do_idle)
- {
- 	struct i915_vma *vma, *next;
- 	int ret;
-diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-index c8a01c141644..ee933572bdc1 100644
---- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-@@ -549,10 +549,16 @@ i915_gem_execbuffer_reserve(struct intel_ring_buffer *ring,
- {
- 	struct drm_i915_gem_object *obj;
- 	struct i915_vma *vma;
-+	struct i915_address_space *vm;
- 	struct list_head ordered_vmas;
- 	bool has_fenced_gpu_access = INTEL_INFO(ring->dev)->gen < 4;
- 	int retry;
- 
-+	if (list_empty(vmas))
-+		return 0;
-+
-+	vm = list_first_entry(vmas, struct i915_vma, exec_list)->vm;
-+
- 	INIT_LIST_HEAD(&ordered_vmas);
- 	while (!list_empty(vmas)) {
- 		struct drm_i915_gem_exec_object2 *entry;
-@@ -641,7 +647,7 @@ err:		/* Decrement pin count for bound objects */
- 		if (ret != -ENOSPC || retry++)
- 			return ret;
- 
--		ret = i915_gem_evict_everything(ring->dev);
-+		ret = i915_gem_evict_vm(vm, true);
- 		if (ret)
- 			return ret;
- 	} while (1);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0830-drm-i915-kill-set_need_resched.patch b/patches.baytrail/0830-drm-i915-kill-set_need_resched.patch
deleted file mode 100644
index 1a4c86c3ad99f..0000000000000
--- a/patches.baytrail/0830-drm-i915-kill-set_need_resched.patch
+++ /dev/null
@@ -1,48 +0,0 @@
-From 7c349470fb8a613d0661c8f5e4e8276db1969f50 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 12 Sep 2013 17:57:28 +0200
-Subject: drm/i915: kill set_need_resched
-
-This is just a remnant from the old days when our reset handling was
-horribly racy, suffered from terribly locking issues and often happily
-live-locked. Those days are now gone so we can drop the hacks and just
-rip the reschedule-point out.
-
-Reported-by: Peter Zijlstra <peterz@infradead.org>
-Cc: Peter Zijlstra <peterz@infradead.org>
-Cc: Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Acked-by: Peter Zijlstra <peterz@infradead.org>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 571c608d06df2d50233263d233a32edab1842865)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem.c | 11 ++++-------
- 1 file changed, 4 insertions(+), 7 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index bc85c48e856f..3d3de6eba1e8 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -1389,14 +1389,11 @@ out:
- 		if (i915_terminally_wedged(&dev_priv->gpu_error))
- 			return VM_FAULT_SIGBUS;
- 	case -EAGAIN:
--		/* Give the error handler a chance to run and move the
--		 * objects off the GPU active list. Next time we service the
--		 * fault, we should be able to transition the page into the
--		 * GTT without touching the GPU (and so avoid further
--		 * EIO/EGAIN). If the GPU is wedged, then there is no issue
--		 * with coherency, just lost writes.
-+		/*
-+		 * EAGAIN means the gpu is hung and we'll wait for the error
-+		 * handler to reset everything when re-faulting in
-+		 * i915_mutex_lock_interruptible.
- 		 */
--		set_need_resched();
- 	case 0:
- 	case -ERESTARTSYS:
- 	case -EINTR:
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0831-drm-i915-move-more-code-to-__i915_drm_thaw.patch b/patches.baytrail/0831-drm-i915-move-more-code-to-__i915_drm_thaw.patch
deleted file mode 100644
index 1c1e7e679f84d..0000000000000
--- a/patches.baytrail/0831-drm-i915-move-more-code-to-__i915_drm_thaw.patch
+++ /dev/null
@@ -1,92 +0,0 @@
-From 64359835da0605917ef6d8b645b7745e4e2d3559 Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Thu, 12 Sep 2013 18:06:43 -0300
-Subject: drm/i915: move more code to __i915_drm_thaw
-
-Both callers had code to sanitize the uncore and restore the GTT
-mappings just before calling __i915_drm_thaw, so Chris suggested I
-should unify the code.
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 9d49c0ef40890064ca552230c2e3ae0e1fb3b617)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.c | 39 ++++++++++++++-------------------------
- 1 file changed, 14 insertions(+), 25 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
-index ec690ca40af7..75e7550064f4 100644
---- a/drivers/gpu/drm/i915/i915_drv.c
-+++ b/drivers/gpu/drm/i915/i915_drv.c
-@@ -576,11 +576,20 @@ static void intel_resume_hotplug(struct drm_device *dev)
- 	drm_helper_hpd_irq_event(dev);
- }
- 
--static int __i915_drm_thaw(struct drm_device *dev)
-+static int __i915_drm_thaw(struct drm_device *dev, bool restore_gtt_mappings)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	int error = 0;
- 
-+	intel_uncore_sanitize(dev);
-+
-+	if (drm_core_check_feature(dev, DRIVER_MODESET) &&
-+	    restore_gtt_mappings) {
-+		mutex_lock(&dev->struct_mutex);
-+		i915_gem_restore_gtt_mappings(dev);
-+		mutex_unlock(&dev->struct_mutex);
-+	}
-+
- 	i915_restore_state(dev);
- 	intel_opregion_setup(dev);
- 
-@@ -640,19 +649,7 @@ static int __i915_drm_thaw(struct drm_device *dev)
- 
- static int i915_drm_thaw(struct drm_device *dev)
- {
--	int error = 0;
--
--	intel_uncore_sanitize(dev);
--
--	if (drm_core_check_feature(dev, DRIVER_MODESET)) {
--		mutex_lock(&dev->struct_mutex);
--		i915_gem_restore_gtt_mappings(dev);
--		mutex_unlock(&dev->struct_mutex);
--	}
--
--	__i915_drm_thaw(dev);
--
--	return error;
-+	return __i915_drm_thaw(dev, true);
- }
- 
- int i915_resume(struct drm_device *dev)
-@@ -668,20 +665,12 @@ int i915_resume(struct drm_device *dev)
- 
- 	pci_set_master(dev->pdev);
- 
--	intel_uncore_sanitize(dev);
--
- 	/*
- 	 * Platforms with opregion should have sane BIOS, older ones (gen3 and
--	 * earlier) need this since the BIOS might clear all our scratch PTEs.
-+	 * earlier) need to restore the GTT mappings since the BIOS might clear
-+	 * all our scratch PTEs.
- 	 */
--	if (drm_core_check_feature(dev, DRIVER_MODESET) &&
--	    !dev_priv->opregion.header) {
--		mutex_lock(&dev->struct_mutex);
--		i915_gem_restore_gtt_mappings(dev);
--		mutex_unlock(&dev->struct_mutex);
--	}
--
--	ret = __i915_drm_thaw(dev);
-+	ret = __i915_drm_thaw(dev, !dev_priv->opregion.header);
- 	if (ret)
- 		return ret;
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0832-drm-i915-don-t-save-restore-LBB-on-Gen5.patch b/patches.baytrail/0832-drm-i915-don-t-save-restore-LBB-on-Gen5.patch
deleted file mode 100644
index af3e645d1a139..0000000000000
--- a/patches.baytrail/0832-drm-i915-don-t-save-restore-LBB-on-Gen5.patch
+++ /dev/null
@@ -1,48 +0,0 @@
-From 638d977a3b2a475c62722ef9cd3b877f348515c4 Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Thu, 12 Sep 2013 13:58:17 -0300
-Subject: drm/i915: don't save/restore LBB on Gen5+
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Because this PCI config register doesn't exist on Gen5+.
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 8e8f8aec2a8deba35af6ba2d3129f0d7bcfd3902)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_suspend.c | 8 ++++++--
- 1 file changed, 6 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
-index 70db618989c4..3538370e3a47 100644
---- a/drivers/gpu/drm/i915/i915_suspend.c
-+++ b/drivers/gpu/drm/i915/i915_suspend.c
-@@ -340,7 +340,9 @@ int i915_save_state(struct drm_device *dev)
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	int i;
- 
--	pci_read_config_byte(dev->pdev, LBB, &dev_priv->regfile.saveLBB);
-+	if (INTEL_INFO(dev)->gen <= 4)
-+		pci_read_config_byte(dev->pdev, LBB,
-+				     &dev_priv->regfile.saveLBB);
- 
- 	mutex_lock(&dev->struct_mutex);
- 
-@@ -390,7 +392,9 @@ int i915_restore_state(struct drm_device *dev)
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	int i;
- 
--	pci_write_config_byte(dev->pdev, LBB, dev_priv->regfile.saveLBB);
-+	if (INTEL_INFO(dev)->gen <= 4)
-+		pci_write_config_byte(dev->pdev, LBB,
-+				      dev_priv->regfile.saveLBB);
- 
- 	mutex_lock(&dev->struct_mutex);
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0833-drm-i915-Don-t-factor-in-pixel-multplier-when-derivi.patch b/patches.baytrail/0833-drm-i915-Don-t-factor-in-pixel-multplier-when-derivi.patch
deleted file mode 100644
index 5a5a003748b21..0000000000000
--- a/patches.baytrail/0833-drm-i915-Don-t-factor-in-pixel-multplier-when-derivi.patch
+++ /dev/null
@@ -1,68 +0,0 @@
-From baaaf995ca207b8dd4135ad93e2d5bd0d6a8d531 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Fri, 6 Sep 2013 23:28:58 +0300
-Subject: drm/i915: Don't factor in pixel multplier when deriving dotclock from
- link clock and M/N values
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-We feed the non-multiplied clock to intel_link_compute_m_n(), so the
-opposite operation should use the same order of operations. So we just
-multiply by pixel_multiplier in the end now.
-
-Reviewed-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 1041a02f35c5f5a6c180a052281e7414d64bb04b)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 15 +++++++--------
- 1 file changed, 7 insertions(+), 8 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 6fb975ea2bee..8b702363cb7a 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -7339,20 +7339,18 @@ static void ironlake_crtc_clock_get(struct intel_crtc *crtc,
- 	struct drm_device *dev = crtc->base.dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	enum transcoder cpu_transcoder = pipe_config->cpu_transcoder;
--	int link_freq, repeat;
-+	int link_freq;
- 	u64 clock;
- 	u32 link_m, link_n;
- 
--	repeat = pipe_config->pixel_multiplier;
--
- 	/*
- 	 * The calculation for the data clock is:
--	 * pixel_clock = ((m/n)*(link_clock * nr_lanes * repeat))/bpp
-+	 * pixel_clock = ((m/n)*(link_clock * nr_lanes))/bpp
- 	 * But we want to avoid losing precison if possible, so:
--	 * pixel_clock = ((m * link_clock * nr_lanes * repeat)/(n*bpp))
-+	 * pixel_clock = ((m * link_clock * nr_lanes)/(n*bpp))
- 	 *
- 	 * and the link clock is simpler:
--	 * link_clock = (m * link_clock * repeat) / n
-+	 * link_clock = (m * link_clock) / n
- 	 */
- 
- 	/*
-@@ -7374,10 +7372,11 @@ static void ironlake_crtc_clock_get(struct intel_crtc *crtc,
- 	if (!link_m || !link_n)
- 		return;
- 
--	clock = ((u64)link_m * (u64)link_freq * (u64)repeat);
-+	clock = ((u64)link_m * (u64)link_freq);
- 	do_div(clock, link_n);
- 
--	pipe_config->adjusted_mode.clock = clock;
-+	pipe_config->adjusted_mode.clock = clock *
-+		pipe_config->pixel_multiplier;
- }
- 
- /** Returns the currently programmed mode of the given pipe. */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0834-drm-i915-Make-adjusted_mode.clock-non-pixel-multipli.patch b/patches.baytrail/0834-drm-i915-Make-adjusted_mode.clock-non-pixel-multipli.patch
deleted file mode 100644
index 80b3cec6983a5..0000000000000
--- a/patches.baytrail/0834-drm-i915-Make-adjusted_mode.clock-non-pixel-multipli.patch
+++ /dev/null
@@ -1,115 +0,0 @@
-From 9341bf32f6d4e8cafdd6c183ca28940424dedb16 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Fri, 6 Sep 2013 23:28:59 +0300
-Subject: drm/i915: Make adjusted_mode.clock non-pixel multiplied
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-It would be easier if adjusted_mode.clock would be the pipe pixel clock,
-and it actually is, except for the cases where pixel_multiplier > 1.
-
-So let's change intel_sdvo to use port_clock as the multiplied clock,
-and then we can leave adjusted_mode.clock as pipe pixel clock.
-
-v2: Improve port_clock documentation
-    Rebased on top of SDVO pixel_multiplier fixes
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 3c52f4eb9335475b7336e2d9f42cd2d41b83fc97)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 7 +++----
- drivers/gpu/drm/i915/intel_drv.h     | 5 ++++-
- drivers/gpu/drm/i915/intel_sdvo.c    | 4 +---
- 3 files changed, 8 insertions(+), 8 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 8b702363cb7a..1264aa52c80a 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -4057,7 +4057,6 @@ retry:
- 	link_bw = intel_fdi_link_freq(dev) * MHz(100)/KHz(1)/10;
- 
- 	fdi_dotclock = adjusted_mode->clock;
--	fdi_dotclock /= pipe_config->pixel_multiplier;
- 
- 	lane = ironlake_get_lanes_required(fdi_dotclock, link_bw,
- 					   pipe_config->pipe_bpp);
-@@ -7375,8 +7374,7 @@ static void ironlake_crtc_clock_get(struct intel_crtc *crtc,
- 	clock = ((u64)link_m * (u64)link_freq);
- 	do_div(clock, link_n);
- 
--	pipe_config->adjusted_mode.clock = clock *
--		pipe_config->pixel_multiplier;
-+	pipe_config->adjusted_mode.clock = clock;
- }
- 
- /** Returns the currently programmed mode of the given pipe. */
-@@ -8322,7 +8320,8 @@ encoder_retry:
- 	/* Set default port clock if not overwritten by the encoder. Needs to be
- 	 * done afterwards in case the encoder adjusts the mode. */
- 	if (!pipe_config->port_clock)
--		pipe_config->port_clock = pipe_config->adjusted_mode.clock;
-+		pipe_config->port_clock = pipe_config->adjusted_mode.clock *
-+			pipe_config->pixel_multiplier;
- 
- 	ret = intel_crtc_compute_config(to_intel_crtc(crtc), pipe_config);
- 	if (ret < 0) {
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index c61911e19c29..c8d334a3c352 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -212,6 +212,8 @@ struct intel_crtc_config {
- 	unsigned long quirks;
- 
- 	struct drm_display_mode requested_mode;
-+	/* Actual pipe timings ie. what we program into the pipe timing
-+	 * registers. adjusted_mode.clock is the pipe pixel clock. */
- 	struct drm_display_mode adjusted_mode;
- 	/* Whether to set up the PCH/FDI. Note that we never allow sharing
- 	 * between pch encoders and cpu encoders. */
-@@ -266,7 +268,8 @@ struct intel_crtc_config {
- 
- 	/*
- 	 * Frequence the dpll for the port should run at. Differs from the
--	 * adjusted dotclock e.g. for DP or 12bpc hdmi mode.
-+	 * adjusted dotclock e.g. for DP or 12bpc hdmi mode. This is also
-+	 * already multiplied by pixel_multiplier.
- 	 */
- 	int port_clock;
- 
-diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
-index 86809b446a99..ebfd5138178f 100644
---- a/drivers/gpu/drm/i915/intel_sdvo.c
-+++ b/drivers/gpu/drm/i915/intel_sdvo.c
-@@ -1068,7 +1068,7 @@ intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo,
- 
- static void i9xx_adjust_sdvo_tv_clock(struct intel_crtc_config *pipe_config)
- {
--	unsigned dotclock = pipe_config->adjusted_mode.clock;
-+	unsigned dotclock = pipe_config->port_clock;
- 	struct dpll *clock = &pipe_config->dpll;
- 
- 	/* SDVO TV has fixed PLL values depend on its clock range,
-@@ -1133,7 +1133,6 @@ static bool intel_sdvo_compute_config(struct intel_encoder *encoder,
- 	 */
- 	pipe_config->pixel_multiplier =
- 		intel_sdvo_get_pixel_multiplier(adjusted_mode);
--	adjusted_mode->clock *= pipe_config->pixel_multiplier;
- 
- 	if (intel_sdvo->color_range_auto) {
- 		/* See CEA-861-E - 5.1 Default Encoding Parameters */
-@@ -1218,7 +1217,6 @@ static void intel_sdvo_mode_set(struct intel_encoder *intel_encoder)
- 		return;
- 
- 	intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
--	input_dtd.part1.clock /= crtc->config.pixel_multiplier;
- 
- 	if (intel_sdvo->is_tv || intel_sdvo->is_lvds)
- 		input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0835-drm-i915-Add-support-for-pipe_bpp-readout.patch b/patches.baytrail/0835-drm-i915-Add-support-for-pipe_bpp-readout.patch
deleted file mode 100644
index 54ab40b018e06..0000000000000
--- a/patches.baytrail/0835-drm-i915-Add-support-for-pipe_bpp-readout.patch
+++ /dev/null
@@ -1,111 +0,0 @@
-From 34d73a403db97e2657d77aa7e77dff107ad4f12b Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Fri, 6 Sep 2013 23:29:00 +0300
-Subject: drm/i915: Add support for pipe_bpp readout
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-On CTG+ read out the pipe bpp setting from hardware and fill it into
-pipe config. Also check it appropriately.
-
-v2: Don't do the pipe_bpp extraction inside the PCH only code block on
-    ILK+.
-    Avoid the PIPECONF read as we already have read it for the
-    PIPECONF_EANBLE check.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 42571aefafb1d330ef84eb29418832f72e7dfb4c)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_ddi.c     |   17 ++++++++++++++++
- drivers/gpu/drm/i915/intel_display.c |   36 +++++++++++++++++++++++++++++++++++
- 2 files changed, 53 insertions(+)
-
---- a/drivers/gpu/drm/i915/intel_ddi.c
-+++ b/drivers/gpu/drm/i915/intel_ddi.c
-@@ -1274,6 +1274,23 @@ static void intel_ddi_get_config(struct
- 		flags |= DRM_MODE_FLAG_NVSYNC;
- 
- 	pipe_config->adjusted_mode.flags |= flags;
-+
-+	switch (temp & TRANS_DDI_BPC_MASK) {
-+	case TRANS_DDI_BPC_6:
-+		pipe_config->pipe_bpp = 18;
-+		break;
-+	case TRANS_DDI_BPC_8:
-+		pipe_config->pipe_bpp = 24;
-+		break;
-+	case TRANS_DDI_BPC_10:
-+		pipe_config->pipe_bpp = 30;
-+		break;
-+	case TRANS_DDI_BPC_12:
-+		pipe_config->pipe_bpp = 36;
-+		break;
-+	default:
-+		break;
-+	}
- }
- 
- static void intel_ddi_destroy(struct drm_encoder *encoder)
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -4997,6 +4997,22 @@ static bool i9xx_get_pipe_config(struct
- 	if (!(tmp & PIPECONF_ENABLE))
- 		return false;
- 
-+	if (IS_G4X(dev) || IS_VALLEYVIEW(dev)) {
-+		switch (tmp & PIPECONF_BPC_MASK) {
-+		case PIPECONF_6BPC:
-+			pipe_config->pipe_bpp = 18;
-+			break;
-+		case PIPECONF_8BPC:
-+			pipe_config->pipe_bpp = 24;
-+			break;
-+		case PIPECONF_10BPC:
-+			pipe_config->pipe_bpp = 30;
-+			break;
-+		default:
-+			break;
-+		}
-+	}
-+
- 	intel_get_pipe_timings(crtc, pipe_config);
- 
- 	i9xx_get_pfit_config(crtc, pipe_config);
-@@ -5896,6 +5912,23 @@ static bool ironlake_get_pipe_config(str
- 	if (!(tmp & PIPECONF_ENABLE))
- 		return false;
- 
-+	switch (tmp & PIPECONF_BPC_MASK) {
-+	case PIPECONF_6BPC:
-+		pipe_config->pipe_bpp = 18;
-+		break;
-+	case PIPECONF_8BPC:
-+		pipe_config->pipe_bpp = 24;
-+		break;
-+	case PIPECONF_10BPC:
-+		pipe_config->pipe_bpp = 30;
-+		break;
-+	case PIPECONF_12BPC:
-+		pipe_config->pipe_bpp = 36;
-+		break;
-+	default:
-+		break;
-+	}
-+
- 	if (I915_READ(PCH_TRANSCONF(crtc->pipe)) & TRANS_ENABLE) {
- 		struct intel_shared_dpll *pll;
- 
-@@ -8633,6 +8666,9 @@ intel_pipe_config_compare(struct drm_dev
- 	PIPE_CONF_CHECK_X(dpll_hw_state.fp0);
- 	PIPE_CONF_CHECK_X(dpll_hw_state.fp1);
- 
-+	if (IS_G4X(dev) || INTEL_INFO(dev)->gen >= 5)
-+		PIPE_CONF_CHECK_I(pipe_bpp);
-+
- #undef PIPE_CONF_CHECK_X
- #undef PIPE_CONF_CHECK_I
- #undef PIPE_CONF_CHECK_FLAGS
diff --git a/patches.baytrail/0836-drm-i915-Add-state-readout-and-checking-for-has_dp_e.patch b/patches.baytrail/0836-drm-i915-Add-state-readout-and-checking-for-has_dp_e.patch
deleted file mode 100644
index ce6101bec5c24..0000000000000
--- a/patches.baytrail/0836-drm-i915-Add-state-readout-and-checking-for-has_dp_e.patch
+++ /dev/null
@@ -1,186 +0,0 @@
-From 4e8019ae07d27058888a16a00cbcbea4df742dd1 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Tue, 10 Sep 2013 17:02:54 +0300
-Subject: drm/i915: Add state readout and checking for has_dp_encoder and
- dp_m_n
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Add functions to read out the CPU and PCH transcoder M/N values,
-and use them to fill out the pipe config dp_m_n information. And
-while at it populate has_dp_encoder too.
-
-Also refactor ironlake_get_fdi_m_n_config() to simply call the new
-intel_cpu_transcoder_get_m_n() function.
-
-v2: Remember the DDI
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit eb14cb747bc53465cbc93e54d9f19f49eed2c0c7)
-Signed-off-by: James Ausmus <james.ausmus@intel.com>
-
-Conflicts:
-	drivers/gpu/drm/i915/intel_drv.h
-	(resolved using rerere from b599c89 ("Merge tag 'v3.12-rc2' into
-	drm-intel-next"))
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_ddi.c     |   14 ++++++
- drivers/gpu/drm/i915/intel_display.c |   76 ++++++++++++++++++++++++++++++-----
- drivers/gpu/drm/i915/intel_dp.c      |    4 +
- drivers/gpu/drm/i915/intel_drv.h     |    2 
- 4 files changed, 86 insertions(+), 10 deletions(-)
-
---- a/drivers/gpu/drm/i915/intel_ddi.c
-+++ b/drivers/gpu/drm/i915/intel_ddi.c
-@@ -1291,6 +1291,20 @@ static void intel_ddi_get_config(struct
- 	default:
- 		break;
- 	}
-+
-+	switch (temp & TRANS_DDI_MODE_SELECT_MASK) {
-+	case TRANS_DDI_MODE_SELECT_HDMI:
-+	case TRANS_DDI_MODE_SELECT_DVI:
-+	case TRANS_DDI_MODE_SELECT_FDI:
-+		break;
-+	case TRANS_DDI_MODE_SELECT_DP_SST:
-+	case TRANS_DDI_MODE_SELECT_DP_MST:
-+		pipe_config->has_dp_encoder = true;
-+		intel_dp_get_m_n(intel_crtc, pipe_config);
-+		break;
-+	default:
-+		break;
-+	}
- }
- 
- static void intel_ddi_destroy(struct drm_encoder *encoder)
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -5858,20 +5858,64 @@ static int ironlake_crtc_mode_set(struct
- 	return ret;
- }
- 
--static void ironlake_get_fdi_m_n_config(struct intel_crtc *crtc,
--					struct intel_crtc_config *pipe_config)
-+static void intel_pch_transcoder_get_m_n(struct intel_crtc *crtc,
-+					 struct intel_link_m_n *m_n)
-+{
-+	struct drm_device *dev = crtc->base.dev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	enum pipe pipe = crtc->pipe;
-+
-+	m_n->link_m = I915_READ(PCH_TRANS_LINK_M1(pipe));
-+	m_n->link_n = I915_READ(PCH_TRANS_LINK_N1(pipe));
-+	m_n->gmch_m = I915_READ(PCH_TRANS_DATA_M1(pipe))
-+		& ~TU_SIZE_MASK;
-+	m_n->gmch_n = I915_READ(PCH_TRANS_DATA_N1(pipe));
-+	m_n->tu = ((I915_READ(PCH_TRANS_DATA_M1(pipe))
-+		    & TU_SIZE_MASK) >> TU_SIZE_SHIFT) + 1;
-+}
-+
-+static void intel_cpu_transcoder_get_m_n(struct intel_crtc *crtc,
-+					 enum transcoder transcoder,
-+					 struct intel_link_m_n *m_n)
- {
- 	struct drm_device *dev = crtc->base.dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
--	enum transcoder transcoder = pipe_config->cpu_transcoder;
-+	enum pipe pipe = crtc->pipe;
-+
-+	if (INTEL_INFO(dev)->gen >= 5) {
-+		m_n->link_m = I915_READ(PIPE_LINK_M1(transcoder));
-+		m_n->link_n = I915_READ(PIPE_LINK_N1(transcoder));
-+		m_n->gmch_m = I915_READ(PIPE_DATA_M1(transcoder))
-+			& ~TU_SIZE_MASK;
-+		m_n->gmch_n = I915_READ(PIPE_DATA_N1(transcoder));
-+		m_n->tu = ((I915_READ(PIPE_DATA_M1(transcoder))
-+			    & TU_SIZE_MASK) >> TU_SIZE_SHIFT) + 1;
-+	} else {
-+		m_n->link_m = I915_READ(PIPE_LINK_M_G4X(pipe));
-+		m_n->link_n = I915_READ(PIPE_LINK_N_G4X(pipe));
-+		m_n->gmch_m = I915_READ(PIPE_DATA_M_G4X(pipe))
-+			& ~TU_SIZE_MASK;
-+		m_n->gmch_n = I915_READ(PIPE_DATA_N_G4X(pipe));
-+		m_n->tu = ((I915_READ(PIPE_DATA_M_G4X(pipe))
-+			    & TU_SIZE_MASK) >> TU_SIZE_SHIFT) + 1;
-+	}
-+}
-+
-+void intel_dp_get_m_n(struct intel_crtc *crtc,
-+		      struct intel_crtc_config *pipe_config)
-+{
-+	if (crtc->config.has_pch_encoder)
-+		intel_pch_transcoder_get_m_n(crtc, &pipe_config->dp_m_n);
-+	else
-+		intel_cpu_transcoder_get_m_n(crtc, pipe_config->cpu_transcoder,
-+					     &pipe_config->dp_m_n);
-+}
- 
--	pipe_config->fdi_m_n.link_m = I915_READ(PIPE_LINK_M1(transcoder));
--	pipe_config->fdi_m_n.link_n = I915_READ(PIPE_LINK_N1(transcoder));
--	pipe_config->fdi_m_n.gmch_m = I915_READ(PIPE_DATA_M1(transcoder))
--					& ~TU_SIZE_MASK;
--	pipe_config->fdi_m_n.gmch_n = I915_READ(PIPE_DATA_N1(transcoder));
--	pipe_config->fdi_m_n.tu = ((I915_READ(PIPE_DATA_M1(transcoder))
--				   & TU_SIZE_MASK) >> TU_SIZE_SHIFT) + 1;
-+static void ironlake_get_fdi_m_n_config(struct intel_crtc *crtc,
-+					struct intel_crtc_config *pipe_config)
-+{
-+	intel_cpu_transcoder_get_m_n(crtc, pipe_config->cpu_transcoder,
-+				     &pipe_config->fdi_m_n);
- }
- 
- static void ironlake_get_pfit_config(struct intel_crtc *crtc,
-@@ -8244,6 +8288,11 @@ static void intel_dump_pipe_config(struc
- 		      pipe_config->fdi_m_n.gmch_m, pipe_config->fdi_m_n.gmch_n,
- 		      pipe_config->fdi_m_n.link_m, pipe_config->fdi_m_n.link_n,
- 		      pipe_config->fdi_m_n.tu);
-+	DRM_DEBUG_KMS("dp: %i, gmch_m: %u, gmch_n: %u, link_m: %u, link_n: %u, tu: %u\n",
-+		      pipe_config->has_dp_encoder,
-+		      pipe_config->dp_m_n.gmch_m, pipe_config->dp_m_n.gmch_n,
-+		      pipe_config->dp_m_n.link_m, pipe_config->dp_m_n.link_n,
-+		      pipe_config->dp_m_n.tu);
- 	DRM_DEBUG_KMS("requested mode:\n");
- 	drm_mode_debug_printmodeline(&pipe_config->requested_mode);
- 	DRM_DEBUG_KMS("adjusted mode:\n");
-@@ -8614,6 +8663,13 @@ intel_pipe_config_compare(struct drm_dev
- 	PIPE_CONF_CHECK_I(fdi_m_n.link_n);
- 	PIPE_CONF_CHECK_I(fdi_m_n.tu);
- 
-+	PIPE_CONF_CHECK_I(has_dp_encoder);
-+	PIPE_CONF_CHECK_I(dp_m_n.gmch_m);
-+	PIPE_CONF_CHECK_I(dp_m_n.gmch_n);
-+	PIPE_CONF_CHECK_I(dp_m_n.link_m);
-+	PIPE_CONF_CHECK_I(dp_m_n.link_n);
-+	PIPE_CONF_CHECK_I(dp_m_n.tu);
-+
- 	PIPE_CONF_CHECK_I(adjusted_mode.crtc_hdisplay);
- 	PIPE_CONF_CHECK_I(adjusted_mode.crtc_htotal);
- 	PIPE_CONF_CHECK_I(adjusted_mode.crtc_hblank_start);
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -1455,6 +1455,10 @@ static void intel_dp_get_config(struct i
- 
- 	pipe_config->adjusted_mode.flags |= flags;
- 
-+	pipe_config->has_dp_encoder = true;
-+
-+	intel_dp_get_m_n(crtc, pipe_config);
-+
- 	if (dp_to_dig_port(intel_dp)->port == PORT_A) {
- 		if ((I915_READ(DP_A) & DP_PLL_FREQ_MASK) == DP_PLL_FREQ_160MHZ)
- 			pipe_config->port_clock = 162000;
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -802,6 +802,8 @@ extern void hsw_pc8_disable_interrupts(s
- extern void hsw_pc8_restore_interrupts(struct drm_device *dev);
- extern void intel_aux_display_runtime_get(struct drm_i915_private *dev_priv);
- extern void intel_aux_display_runtime_put(struct drm_i915_private *dev_priv);
-+extern void intel_dp_get_m_n(struct intel_crtc *crtc,
-+			     struct intel_crtc_config *pipe_config);
- extern void i915_disable_vga_mem(struct drm_device *dev);
- 
- #endif /* __INTEL_DRV_H__ */
diff --git a/patches.baytrail/0837-drm-i915-Make-intel_fuzzy_clock_check-take-in-arbitr.patch b/patches.baytrail/0837-drm-i915-Make-intel_fuzzy_clock_check-take-in-arbitr.patch
deleted file mode 100644
index dd86c80129ea2..0000000000000
--- a/patches.baytrail/0837-drm-i915-Make-intel_fuzzy_clock_check-take-in-arbitr.patch
+++ /dev/null
@@ -1,54 +0,0 @@
-From 2e163ec1b3266cad1b71d8cc981bbeeffcdb6bca Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Fri, 6 Sep 2013 23:29:02 +0300
-Subject: drm/i915: Make intel_fuzzy_clock_check() take in arbitrary clocks
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-We want to do fuzzy clock checks for other things besides
-adjusted_mode.clock, so just pass two two clocks to compare
-to intel_fuzzy_clock_check().
-
-Reviewed-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 3bd26263a9a0c4216d2a44e179265a9a05cda50f)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 11 ++++-------
- 1 file changed, 4 insertions(+), 7 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 49487fc5992f..bb638d8d66f2 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -8590,13 +8590,9 @@ intel_modeset_update_state(struct drm_device *dev, unsigned prepare_pipes)
- 
- }
- 
--static bool intel_fuzzy_clock_check(struct intel_crtc_config *cur,
--				    struct intel_crtc_config *new)
-+static bool intel_fuzzy_clock_check(int clock1, int clock2)
- {
--	int clock1, clock2, diff;
--
--	clock1 = cur->adjusted_mode.clock;
--	clock2 = new->adjusted_mode.clock;
-+	int diff;
- 
- 	if (clock1 == clock2)
- 		return true;
-@@ -8731,7 +8727,8 @@ intel_pipe_config_compare(struct drm_device *dev,
- #undef PIPE_CONF_QUIRK
- 
- 	if (!IS_HASWELL(dev)) {
--		if (!intel_fuzzy_clock_check(current_config, pipe_config)) {
-+		if (!intel_fuzzy_clock_check(current_config->adjusted_mode.clock,
-+					     pipe_config->adjusted_mode.clock)) {
- 			DRM_ERROR("mismatch in clock (expected %d, found %d)\n",
- 				  current_config->adjusted_mode.clock,
- 				  pipe_config->adjusted_mode.clock);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0838-drm-i915-Remove-extra-ring.patch b/patches.baytrail/0838-drm-i915-Remove-extra-ring.patch
deleted file mode 100644
index 8fe25dd8e3c29..0000000000000
--- a/patches.baytrail/0838-drm-i915-Remove-extra-ring.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From 06a9d402bc01467785eadff136c11b7119825e3d Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <benjamin.widawsky@intel.com>
-Date: Thu, 12 Sep 2013 22:28:27 -0700
-Subject: drm/i915: Remove extra "ring"
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Sadly, this isn't the first time we've done this:
-http://lists.freedesktop.org/archives/intel-gfx/2013-June/029065.html
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 472f8acc4daa4c4f8d1cf778010ed63aa2cde95d)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_debugfs.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
-index 9ac4e3182112..1d776243bf55 100644
---- a/drivers/gpu/drm/i915/i915_debugfs.c
-+++ b/drivers/gpu/drm/i915/i915_debugfs.c
-@@ -1462,7 +1462,7 @@ static int i915_context_status(struct seq_file *m, void *unused)
- 
- 	for_each_ring(ring, dev_priv, i) {
- 		if (ring->default_context) {
--			seq_printf(m, "HW default context %s ring ", ring->name);
-+			seq_printf(m, "HW default context %s ", ring->name);
- 			describe_obj(m, ring->default_context->obj);
- 			seq_putc(m, '\n');
- 		}
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0839-drm-i915-Round-l3-parity-reads-down.patch b/patches.baytrail/0839-drm-i915-Round-l3-parity-reads-down.patch
deleted file mode 100644
index c0da9f114b5e8..0000000000000
--- a/patches.baytrail/0839-drm-i915-Round-l3-parity-reads-down.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From 755a13bc2436e3b67931585c49d2bae0ce299d21 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <benjamin.widawsky@intel.com>
-Date: Thu, 12 Sep 2013 22:28:28 -0700
-Subject: drm/i915: Round l3 parity reads down
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-We always read a register for l3 parity reads, and we don't really want
-to ever let userspace trick us into giving back less than the dword.
-
-Writes are okay because we assume everything will be 0 filled, and as
-such, if a user really wants to write less than a dword, let them.
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 1c3dcd1cf66d078bc273275c754000ba0d397ac0)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_sysfs.c | 2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c
-index c8c4112de110..9070f503d332 100644
---- a/drivers/gpu/drm/i915/i915_sysfs.c
-+++ b/drivers/gpu/drm/i915/i915_sysfs.c
-@@ -121,6 +121,8 @@ i915_l3_read(struct file *filp, struct kobject *kobj,
- 	uint32_t misccpctl;
- 	int i, ret;
- 
-+	count = round_down(count, 4);
-+
- 	ret = l3_access_valid(drm_dev, offset);
- 	if (ret)
- 		return ret;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0840-drm-i915-Fix-l3-parity-user-buffer-offset.patch b/patches.baytrail/0840-drm-i915-Fix-l3-parity-user-buffer-offset.patch
deleted file mode 100644
index 187adb2ea2443..0000000000000
--- a/patches.baytrail/0840-drm-i915-Fix-l3-parity-user-buffer-offset.patch
+++ /dev/null
@@ -1,68 +0,0 @@
-From 601025e71ac2ecf33905a0bb5785340c6d29a947 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <benjamin.widawsky@intel.com>
-Date: Thu, 12 Sep 2013 22:28:29 -0700
-Subject: drm/i915: Fix l3 parity user buffer offset
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The buf pointer used during l3_write is just char *, therefore it does
-not require the silly any addition of offset.
-
-v2: Also fix i915_l3_read with a suggested logic from Ville
-
-Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 33618ea5e0e2ccd00331fa169145894b9c5dcffe)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_sysfs.c | 12 ++++++------
- 1 file changed, 6 insertions(+), 6 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c
-index 9070f503d332..d572435cfbe7 100644
---- a/drivers/gpu/drm/i915/i915_sysfs.c
-+++ b/drivers/gpu/drm/i915/i915_sysfs.c
-@@ -127,6 +127,8 @@ i915_l3_read(struct file *filp, struct kobject *kobj,
- 	if (ret)
- 		return ret;
- 
-+	count = min_t(int, GEN7_L3LOG_SIZE-offset, count);
-+
- 	ret = i915_mutex_lock_interruptible(drm_dev);
- 	if (ret)
- 		return ret;
-@@ -134,14 +136,14 @@ i915_l3_read(struct file *filp, struct kobject *kobj,
- 	misccpctl = I915_READ(GEN7_MISCCPCTL);
- 	I915_WRITE(GEN7_MISCCPCTL, misccpctl & ~GEN7_DOP_CLOCK_GATE_ENABLE);
- 
--	for (i = offset; count >= 4 && i < GEN7_L3LOG_SIZE; i += 4, count -= 4)
--		*((uint32_t *)(&buf[i])) = I915_READ(GEN7_L3LOG_BASE + i);
-+	for (i = 0; i < count; i += 4)
-+		*((uint32_t *)(&buf[i])) = I915_READ(GEN7_L3LOG_BASE + offset + i);
- 
- 	I915_WRITE(GEN7_MISCCPCTL, misccpctl);
- 
- 	mutex_unlock(&drm_dev->struct_mutex);
- 
--	return i - offset;
-+	return i;
- }
- 
- static ssize_t
-@@ -186,9 +188,7 @@ i915_l3_write(struct file *filp, struct kobject *kobj,
- 	if (temp)
- 		dev_priv->l3_parity.remap_info = temp;
- 
--	memcpy(dev_priv->l3_parity.remap_info + (offset/4),
--	       buf + (offset/4),
--	       count);
-+	memcpy(dev_priv->l3_parity.remap_info + (offset/4), buf, count);
- 
- 	i915_gem_l3_remap(drm_dev);
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0841-drm-i915-add-asserts-for-cursor-disabled.patch b/patches.baytrail/0841-drm-i915-add-asserts-for-cursor-disabled.patch
deleted file mode 100644
index c00af3749ef35..0000000000000
--- a/patches.baytrail/0841-drm-i915-add-asserts-for-cursor-disabled.patch
+++ /dev/null
@@ -1,81 +0,0 @@
-From 8c752d26ea728855eb65b48c650cdd96bc75a3fd Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Fri, 13 Sep 2013 11:03:08 +0300
-Subject: drm/i915: add asserts for cursor disabled
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The cursor is supposed to be disabled during crtc mode set (disabled by
-ctrc disable). Assert this is the case.
-
-v2: move cursor disabled assert next to plane asserts (Ville)
-
-Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 93ce0ba6985245ba806f0846a9ce42ca7a3184f2)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 23 +++++++++++++++++++++++
- 1 file changed, 23 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index bb638d8d66f2..394e4d3631e7 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -1069,6 +1069,26 @@ static void assert_panel_unlocked(struct drm_i915_private *dev_priv,
- 	     pipe_name(pipe));
- }
- 
-+static void assert_cursor(struct drm_i915_private *dev_priv,
-+			  enum pipe pipe, bool state)
-+{
-+	struct drm_device *dev = dev_priv->dev;
-+	bool cur_state;
-+
-+	if (IS_IVYBRIDGE(dev) || IS_HASWELL(dev))
-+		cur_state = I915_READ(CURCNTR_IVB(pipe)) & CURSOR_MODE;
-+	else if (IS_845G(dev) || IS_I865G(dev))
-+		cur_state = I915_READ(_CURACNTR) & CURSOR_ENABLE;
-+	else
-+		cur_state = I915_READ(CURCNTR(pipe)) & CURSOR_MODE;
-+
-+	WARN(cur_state != state,
-+	     "cursor on pipe %c assertion failure (expected %s, current %s)\n",
-+	     pipe_name(pipe), state_string(state), state_string(cur_state));
-+}
-+#define assert_cursor_enabled(d, p) assert_cursor(d, p, true)
-+#define assert_cursor_disabled(d, p) assert_cursor(d, p, false)
-+
- void assert_pipe(struct drm_i915_private *dev_priv,
- 		 enum pipe pipe, bool state)
- {
-@@ -1670,6 +1690,7 @@ static void intel_enable_pipe(struct drm_i915_private *dev_priv, enum pipe pipe,
- 	u32 val;
- 
- 	assert_planes_disabled(dev_priv, pipe);
-+	assert_cursor_disabled(dev_priv, pipe);
- 	assert_sprites_disabled(dev_priv, pipe);
- 
- 	if (HAS_PCH_LPT(dev_priv->dev))
-@@ -1731,6 +1752,7 @@ static void intel_disable_pipe(struct drm_i915_private *dev_priv,
- 	 * or we might hang the display.
- 	 */
- 	assert_planes_disabled(dev_priv, pipe);
-+	assert_cursor_disabled(dev_priv, pipe);
- 	assert_sprites_disabled(dev_priv, pipe);
- 
- 	/* Don't disable pipe A or pipe A PLLs if needed */
-@@ -3867,6 +3889,7 @@ static void intel_crtc_disable(struct drm_crtc *crtc)
- 	dev_priv->display.off(crtc);
- 
- 	assert_plane_disabled(dev->dev_private, to_intel_crtc(crtc)->plane);
-+	assert_cursor_disabled(dev_priv, to_intel_crtc(crtc)->pipe);
- 	assert_pipe_disabled(dev->dev_private, to_intel_crtc(crtc)->pipe);
- 
- 	if (crtc->fb) {
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0842-drm-i915-clear-opregon-lid_state-after-we-unmap-it.patch b/patches.baytrail/0842-drm-i915-clear-opregon-lid_state-after-we-unmap-it.patch
deleted file mode 100644
index c7ad550176238..0000000000000
--- a/patches.baytrail/0842-drm-i915-clear-opregon-lid_state-after-we-unmap-it.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From e867ff4c910ae723e78a2bf620a4bd727be193b2 Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Thu, 12 Sep 2013 13:58:20 -0300
-Subject: drm/i915: clear opregon->lid_state after we unmap it
-
-We don't seem to be using the pointer after it's unmapped, so this
-patch doesn't fix any bug I can reproduce.
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 794a79a6b00db14c535c951b03820ea5199c82a3)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_opregion.c | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_opregion.c b/drivers/gpu/drm/i915/intel_opregion.c
-index c4fb2ae35401..250d14ad4d11 100644
---- a/drivers/gpu/drm/i915/intel_opregion.c
-+++ b/drivers/gpu/drm/i915/intel_opregion.c
-@@ -657,6 +657,7 @@ void intel_opregion_fini(struct drm_device *dev)
- 	opregion->swsci = NULL;
- 	opregion->asle = NULL;
- 	opregion->vbt = NULL;
-+	opregion->lid_state = NULL;
- }
- 
- static void swsci_setup(struct drm_device *dev)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0843-drm-i915-Add-intel_dotclock_calculate.patch b/patches.baytrail/0843-drm-i915-Add-intel_dotclock_calculate.patch
deleted file mode 100644
index 10de215c877de..0000000000000
--- a/patches.baytrail/0843-drm-i915-Add-intel_dotclock_calculate.patch
+++ /dev/null
@@ -1,121 +0,0 @@
-From 4fafab2b0e025b4339a3b12bfc65e14567ffb399 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Fri, 13 Sep 2013 15:59:11 +0300
-Subject: drm/i915: Add intel_dotclock_calculate()
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Extract the code to calculate the dotclock from the link clock and M/N
-values into a new function from ironlake_crtc_clock_get().
-
-The new function can be used to calculate the dotclock for both FDI and
-DP cases.
-
-Also simplify the code a bit along the way.
-
-v2: Don't forget about non-pch encoders in ironlake_crtc_clock_get()
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 6878da05006feb68efe23a6ae010b1a5df32ca5f)
-Signed-off-by: James Ausmus <james.ausmus@intel.com>
-
-Conflicts:
-	drivers/gpu/drm/i915/intel_drv.h
-	(context changes)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 43 ++++++++++++++++++------------------
- drivers/gpu/drm/i915/intel_drv.h     |  2 ++
- 2 files changed, 24 insertions(+), 21 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 394e4d3631e7..8a5be359508c 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -7432,16 +7432,9 @@ static void i9xx_crtc_clock_get(struct intel_crtc *crtc,
- 	pipe_config->adjusted_mode.clock = clock.dot;
- }
- 
--static void ironlake_crtc_clock_get(struct intel_crtc *crtc,
--				    struct intel_crtc_config *pipe_config)
-+int intel_dotclock_calculate(int link_freq,
-+			     const struct intel_link_m_n *m_n)
- {
--	struct drm_device *dev = crtc->base.dev;
--	struct drm_i915_private *dev_priv = dev->dev_private;
--	enum transcoder cpu_transcoder = pipe_config->cpu_transcoder;
--	int link_freq;
--	u64 clock;
--	u32 link_m, link_n;
--
- 	/*
- 	 * The calculation for the data clock is:
- 	 * pixel_clock = ((m/n)*(link_clock * nr_lanes))/bpp
-@@ -7452,6 +7445,18 @@ static void ironlake_crtc_clock_get(struct intel_crtc *crtc,
- 	 * link_clock = (m * link_clock) / n
- 	 */
- 
-+	if (!m_n->link_n)
-+		return 0;
-+
-+	return div_u64((u64)m_n->link_m * link_freq, m_n->link_n);
-+}
-+
-+static void ironlake_crtc_clock_get(struct intel_crtc *crtc,
-+				    struct intel_crtc_config *pipe_config)
-+{
-+	struct drm_device *dev = crtc->base.dev;
-+	int link_freq;
-+
- 	/*
- 	 * We need to get the FDI or DP link clock here to derive
- 	 * the M/N dividers.
-@@ -7460,21 +7465,17 @@ static void ironlake_crtc_clock_get(struct intel_crtc *crtc,
- 	 * For DP, it's either 1.62GHz or 2.7GHz.
- 	 * We do our calculations in 10*MHz since we don't need much precison.
- 	 */
--	if (pipe_config->has_pch_encoder)
-+	if (pipe_config->has_pch_encoder) {
- 		link_freq = intel_fdi_link_freq(dev) * 10000;
--	else
--		link_freq = pipe_config->port_clock;
- 
--	link_m = I915_READ(PIPE_LINK_M1(cpu_transcoder));
--	link_n = I915_READ(PIPE_LINK_N1(cpu_transcoder));
--
--	if (!link_m || !link_n)
--		return;
--
--	clock = ((u64)link_m * (u64)link_freq);
--	do_div(clock, link_n);
-+		pipe_config->adjusted_mode.clock =
-+			intel_dotclock_calculate(link_freq, &pipe_config->fdi_m_n);
-+	} else {
-+		link_freq = pipe_config->port_clock;
- 
--	pipe_config->adjusted_mode.clock = clock;
-+		pipe_config->adjusted_mode.clock =
-+			intel_dotclock_calculate(link_freq, &pipe_config->dp_m_n);
-+	}
- }
- 
- /** Returns the currently programmed mode of the given pipe. */
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index 09dea5834c1c..494c2fa007fd 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -804,6 +804,8 @@ extern void intel_aux_display_runtime_get(struct drm_i915_private *dev_priv);
- extern void intel_aux_display_runtime_put(struct drm_i915_private *dev_priv);
- extern void intel_dp_get_m_n(struct intel_crtc *crtc,
- 			     struct intel_crtc_config *pipe_config);
-+extern int intel_dotclock_calculate(int link_freq,
-+				    const struct intel_link_m_n *m_n);
- extern void i915_disable_vga_mem(struct drm_device *dev);
- 
- #endif /* __INTEL_DRV_H__ */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0844-drm-i915-Make-i9xx_crtc_clock_get-use-dpll_hw_state.patch b/patches.baytrail/0844-drm-i915-Make-i9xx_crtc_clock_get-use-dpll_hw_state.patch
deleted file mode 100644
index 11c899a10fd4b..0000000000000
--- a/patches.baytrail/0844-drm-i915-Make-i9xx_crtc_clock_get-use-dpll_hw_state.patch
+++ /dev/null
@@ -1,82 +0,0 @@
-From 86e9ff32ded8919799890cdcfe691f7e10ca4afc Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Fri, 13 Sep 2013 16:18:46 +0300
-Subject: drm/i915: Make i9xx_crtc_clock_get() use dpll_hw_state
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-We already extract the DPLL state to pipe_config, so let's make use of
-it in i9xx_crtc_clock_get() and avoid the register reads.
-
-This will also make the function closer to being useable with PCH DPLL
-since the registers for those live in a different address.
-
-Also kill the useless adjusted_mode.clock zeroing. It's already zero at
-this point.
-
-v2: Read out DPLL state in intel_crtc_mode_get()
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 293623f7aa6d175d126135fb58c7a88c9695fd11)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 13 ++++++++-----
- 1 file changed, 8 insertions(+), 5 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 8a5be359508c..e482a3efbac6 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -7353,14 +7353,14 @@ static void i9xx_crtc_clock_get(struct intel_crtc *crtc,
- 	struct drm_device *dev = crtc->base.dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	int pipe = pipe_config->cpu_transcoder;
--	u32 dpll = I915_READ(DPLL(pipe));
-+	u32 dpll = pipe_config->dpll_hw_state.dpll;
- 	u32 fp;
- 	intel_clock_t clock;
- 
- 	if ((dpll & DISPLAY_RATE_SELECT_FPA1) == 0)
--		fp = I915_READ(FP0(pipe));
-+		fp = pipe_config->dpll_hw_state.fp0;
- 	else
--		fp = I915_READ(FP1(pipe));
-+		fp = pipe_config->dpll_hw_state.fp1;
- 
- 	clock.m1 = (fp & FP_M1_DIV_MASK) >> FP_M1_DIV_SHIFT;
- 	if (IS_PINEVIEW(dev)) {
-@@ -7391,7 +7391,6 @@ static void i9xx_crtc_clock_get(struct intel_crtc *crtc,
- 		default:
- 			DRM_DEBUG_KMS("Unknown DPLL mode %08x in programmed "
- 				  "mode\n", (int)(dpll & DPLL_MODE_MASK));
--			pipe_config->adjusted_mode.clock = 0;
- 			return;
- 		}
- 
-@@ -7491,6 +7490,7 @@ struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev,
- 	int hsync = I915_READ(HSYNC(cpu_transcoder));
- 	int vtot = I915_READ(VTOTAL(cpu_transcoder));
- 	int vsync = I915_READ(VSYNC(cpu_transcoder));
-+	enum pipe pipe = intel_crtc->pipe;
- 
- 	mode = kzalloc(sizeof(*mode), GFP_KERNEL);
- 	if (!mode)
-@@ -7503,8 +7503,11 @@ struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev,
- 	 * Note, if LVDS ever uses a non-1 pixel multiplier, we'll need
- 	 * to use a real value here instead.
- 	 */
--	pipe_config.cpu_transcoder = (enum transcoder) intel_crtc->pipe;
-+	pipe_config.cpu_transcoder = (enum transcoder) pipe;
- 	pipe_config.pixel_multiplier = 1;
-+	pipe_config.dpll_hw_state.dpll = I915_READ(DPLL(pipe));
-+	pipe_config.dpll_hw_state.fp0 = I915_READ(FP0(pipe));
-+	pipe_config.dpll_hw_state.fp1 = I915_READ(FP1(pipe));
- 	i9xx_crtc_clock_get(intel_crtc, &pipe_config);
- 
- 	mode->clock = pipe_config.adjusted_mode.clock;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0845-drm-i915-Make-i9xx_crtc_clock_get-work-for-PCH-DPLLs.patch b/patches.baytrail/0845-drm-i915-Make-i9xx_crtc_clock_get-work-for-PCH-DPLLs.patch
deleted file mode 100644
index 9d34216b626c7..0000000000000
--- a/patches.baytrail/0845-drm-i915-Make-i9xx_crtc_clock_get-work-for-PCH-DPLLs.patch
+++ /dev/null
@@ -1,103 +0,0 @@
-From 415b74c97ceaeb282d46c56c34aa1b81840ec9d8 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Mon, 9 Sep 2013 14:06:37 +0300
-Subject: drm/i915: Make i9xx_crtc_clock_get() work for PCH DPLLs
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Add the 120MHz refernce clock case for PCH DPLLs.
-
-Also determine the reference clock frequency more accurately by
-checking for the PLLB_REF_INPUT_SPREADSPECTRUMIN refclk input
-mode. The gen2 code already checked it, but it stil assumed a
-fixed 66MHz refclk. Instead we need to consult the VBT for the
-real value.
-
-v2: Fix refclk for SSC panel case
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit da4a1efab8be1e373c1ad31b14deb4e422dad6cb)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 32 +++++++++++++++++++++-----------
- 1 file changed, 21 insertions(+), 11 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index e482a3efbac6..dfc021de2eed 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -7346,6 +7346,22 @@ void intel_release_load_detect_pipe(struct drm_connector *connector,
- 	mutex_unlock(&crtc->mutex);
- }
- 
-+static int i9xx_pll_refclk(struct drm_device *dev,
-+			   const struct intel_crtc_config *pipe_config)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	u32 dpll = pipe_config->dpll_hw_state.dpll;
-+
-+	if ((dpll & PLL_REF_INPUT_MASK) == PLLB_REF_INPUT_SPREADSPECTRUMIN)
-+		return dev_priv->vbt.lvds_ssc_freq * 1000;
-+	else if (HAS_PCH_SPLIT(dev))
-+		return 120000;
-+	else if (!IS_GEN2(dev))
-+		return 96000;
-+	else
-+		return 48000;
-+}
-+
- /* Returns the clock of the currently programmed mode of the given pipe. */
- static void i9xx_crtc_clock_get(struct intel_crtc *crtc,
- 				struct intel_crtc_config *pipe_config)
-@@ -7356,6 +7372,7 @@ static void i9xx_crtc_clock_get(struct intel_crtc *crtc,
- 	u32 dpll = pipe_config->dpll_hw_state.dpll;
- 	u32 fp;
- 	intel_clock_t clock;
-+	int refclk = i9xx_pll_refclk(dev, pipe_config);
- 
- 	if ((dpll & DISPLAY_RATE_SELECT_FPA1) == 0)
- 		fp = pipe_config->dpll_hw_state.fp0;
-@@ -7395,9 +7412,9 @@ static void i9xx_crtc_clock_get(struct intel_crtc *crtc,
- 		}
- 
- 		if (IS_PINEVIEW(dev))
--			pineview_clock(96000, &clock);
-+			pineview_clock(refclk, &clock);
- 		else
--			i9xx_clock(96000, &clock);
-+			i9xx_clock(refclk, &clock);
- 	} else {
- 		bool is_lvds = (pipe == 1) && (I915_READ(LVDS) & LVDS_PORT_EN);
- 
-@@ -7405,13 +7422,6 @@ static void i9xx_crtc_clock_get(struct intel_crtc *crtc,
- 			clock.p1 = ffs((dpll & DPLL_FPA01_P1_POST_DIV_MASK_I830_LVDS) >>
- 				       DPLL_FPA01_P1_POST_DIV_SHIFT);
- 			clock.p2 = 14;
--
--			if ((dpll & PLL_REF_INPUT_MASK) ==
--			    PLLB_REF_INPUT_SPREADSPECTRUMIN) {
--				/* XXX: might not be 66MHz */
--				i9xx_clock(66000, &clock);
--			} else
--				i9xx_clock(48000, &clock);
- 		} else {
- 			if (dpll & PLL_P1_DIVIDE_BY_TWO)
- 				clock.p1 = 2;
-@@ -7423,9 +7433,9 @@ static void i9xx_crtc_clock_get(struct intel_crtc *crtc,
- 				clock.p2 = 4;
- 			else
- 				clock.p2 = 2;
--
--			i9xx_clock(48000, &clock);
- 		}
-+
-+		i9xx_clock(refclk, &clock);
- 	}
- 
- 	pipe_config->adjusted_mode.clock = clock.dot;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0846-drm-i915-Fix-port_clock-and-adjusted_mode.clock-read.patch b/patches.baytrail/0846-drm-i915-Fix-port_clock-and-adjusted_mode.clock-read.patch
deleted file mode 100644
index 69413e65306c1..0000000000000
--- a/patches.baytrail/0846-drm-i915-Fix-port_clock-and-adjusted_mode.clock-read.patch
+++ /dev/null
@@ -1,389 +0,0 @@
-From f42d14b1fb180274748580f6157fe2c571a3a2c6 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Fri, 13 Sep 2013 16:00:08 +0300
-Subject: drm/i915: Fix port_clock and adjusted_mode.clock readout all over
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Now that adjusted_mode.clock no longer contains the pixel_multiplier, we
-can kill the get_clock() callback and instead do the clock readout
-in get_pipe_config().
-
-Also i9xx_crtc_clock_get() can now extract the frequency of the PCH
-DPLL, so use it to populate port_clock accurately for PCH encoders.
-For DP in port A the encoder is still responsible for filling in
-port_clock. The FDI adjusted_mode.clock extraction is kept in place
-for some extra sanity checking, but we no longer need to pretend it's
-also the port_clock.
-
-In the encoder get_config() functions fill out adjusted_mode.clock
-based on port_clock and other details such as the DP M/N values,
-HDMI 12bpc and SDVO pixel_multiplier. For PCH encoders we will then
-do an extra sanity check to make sure the dotclock we derived from
-the FDI configuratiuon matches the one we derive from port_clock.
-
-DVO doesn't exist on PCH platforms, so it doesn't need to anything
-but assign adjusted_mode.clock=port_clock. And DDI is HSW only, so
-none of the changes apply there.
-
-v2: Use hdmi_reg color format to detect 12bpc HDMI case
-v3: Set adjusted_mode.clock for LVDS too
-v4: Rename ironlake_crtc_clock_get to ironlake_pch_clock_get,
-    eliminate the useless link_freq variable.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 18442d08786472c63a0a80c27f92b033dffc26de)
-Signed-off-by: James Ausmus <james.ausmus@intel.com>
-
-Conflicts:
-	drivers/gpu/drm/i915/intel_drv.h
-	(context changes)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h      |    1 
- drivers/gpu/drm/i915/i915_reg.h      |    1 
- drivers/gpu/drm/i915/intel_crt.c     |    8 +++
- drivers/gpu/drm/i915/intel_display.c |   76 +++++++++++++++++------------------
- drivers/gpu/drm/i915/intel_dp.c      |   11 ++++-
- drivers/gpu/drm/i915/intel_drv.h     |    2 
- drivers/gpu/drm/i915/intel_dvo.c     |    2 
- drivers/gpu/drm/i915/intel_hdmi.c    |   11 +++++
- drivers/gpu/drm/i915/intel_lvds.c    |    8 +++
- drivers/gpu/drm/i915/intel_sdvo.c    |    8 +++
- 10 files changed, 87 insertions(+), 41 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -371,7 +371,6 @@ struct drm_i915_display_funcs {
- 	 * fills out the pipe-config with the hw state. */
- 	bool (*get_pipe_config)(struct intel_crtc *,
- 				struct intel_crtc_config *);
--	void (*get_clock)(struct intel_crtc *, struct intel_crtc_config *);
- 	int (*crtc_mode_set)(struct drm_crtc *crtc,
- 			     int x, int y,
- 			     struct drm_framebuffer *old_fb);
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -2075,6 +2075,7 @@
- 
- /* Gen 4 SDVO/HDMI bits: */
- #define   SDVO_COLOR_FORMAT_8bpc		(0 << 26)
-+#define   SDVO_COLOR_FORMAT_MASK		(7 << 26)
- #define   SDVO_ENCODING_SDVO			(0 << 10)
- #define   SDVO_ENCODING_HDMI			(2 << 10)
- #define   HDMI_MODE_SELECT_HDMI			(1 << 9) /* HDMI only */
---- a/drivers/gpu/drm/i915/intel_crt.c
-+++ b/drivers/gpu/drm/i915/intel_crt.c
-@@ -89,6 +89,7 @@ static void intel_crt_get_config(struct
- 	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
- 	struct intel_crt *crt = intel_encoder_to_crt(encoder);
- 	u32 tmp, flags = 0;
-+	int dotclock;
- 
- 	tmp = I915_READ(crt->adpa_reg);
- 
-@@ -103,6 +104,13 @@ static void intel_crt_get_config(struct
- 		flags |= DRM_MODE_FLAG_NVSYNC;
- 
- 	pipe_config->adjusted_mode.flags |= flags;
-+
-+	dotclock = pipe_config->port_clock;
-+
-+	if (HAS_PCH_SPLIT(dev_priv->dev))
-+		ironlake_check_encoder_dotclock(pipe_config, dotclock);
-+
-+	pipe_config->adjusted_mode.clock = dotclock;
- }
- 
- /* Note: The caller is required to filter out dpms modes not supported by the
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -47,8 +47,8 @@ static void intel_crtc_update_cursor(str
- 
- static void i9xx_crtc_clock_get(struct intel_crtc *crtc,
- 				struct intel_crtc_config *pipe_config);
--static void ironlake_crtc_clock_get(struct intel_crtc *crtc,
--				    struct intel_crtc_config *pipe_config);
-+static void ironlake_pch_clock_get(struct intel_crtc *crtc,
-+				   struct intel_crtc_config *pipe_config);
- 
- static int intel_set_mode(struct drm_crtc *crtc, struct drm_display_mode *mode,
- 			  int x, int y, struct drm_framebuffer *old_fb);
-@@ -5068,6 +5068,8 @@ static bool i9xx_get_pipe_config(struct
- 						     DPLL_PORTB_READY_MASK);
- 	}
- 
-+	i9xx_crtc_clock_get(crtc, pipe_config);
-+
- 	return true;
- }
- 
-@@ -6027,6 +6029,8 @@ static bool ironlake_get_pipe_config(str
- 		pipe_config->pixel_multiplier =
- 			((tmp & PLL_REF_SDVO_HDMI_MULTIPLIER_MASK)
- 			 >> PLL_REF_SDVO_HDMI_MULTIPLIER_SHIFT) + 1;
-+
-+		ironlake_pch_clock_get(crtc, pipe_config);
- 	} else {
- 		pipe_config->pixel_multiplier = 1;
- 	}
-@@ -7438,7 +7442,12 @@ static void i9xx_crtc_clock_get(struct i
- 		i9xx_clock(refclk, &clock);
- 	}
- 
--	pipe_config->adjusted_mode.clock = clock.dot;
-+	/*
-+	 * This value includes pixel_multiplier. We will use
-+	 * port_clock to compute adjusted_mode.clock in the
-+	 * encoder's get_config() function.
-+	 */
-+	pipe_config->port_clock = clock.dot;
- }
- 
- int intel_dotclock_calculate(int link_freq,
-@@ -7460,31 +7469,23 @@ int intel_dotclock_calculate(int link_fr
- 	return div_u64((u64)m_n->link_m * link_freq, m_n->link_n);
- }
- 
--static void ironlake_crtc_clock_get(struct intel_crtc *crtc,
--				    struct intel_crtc_config *pipe_config)
-+static void ironlake_pch_clock_get(struct intel_crtc *crtc,
-+				   struct intel_crtc_config *pipe_config)
- {
- 	struct drm_device *dev = crtc->base.dev;
--	int link_freq;
- 
--	/*
--	 * We need to get the FDI or DP link clock here to derive
--	 * the M/N dividers.
--	 *
--	 * For FDI, we read it from the BIOS or use a fixed 2.7GHz.
--	 * For DP, it's either 1.62GHz or 2.7GHz.
--	 * We do our calculations in 10*MHz since we don't need much precison.
--	 */
--	if (pipe_config->has_pch_encoder) {
--		link_freq = intel_fdi_link_freq(dev) * 10000;
-+	/* read out port_clock from the DPLL */
-+	i9xx_crtc_clock_get(crtc, pipe_config);
- 
--		pipe_config->adjusted_mode.clock =
--			intel_dotclock_calculate(link_freq, &pipe_config->fdi_m_n);
--	} else {
--		link_freq = pipe_config->port_clock;
--
--		pipe_config->adjusted_mode.clock =
--			intel_dotclock_calculate(link_freq, &pipe_config->dp_m_n);
--	}
-+	/*
-+	 * This value does not include pixel_multiplier.
-+	 * We will check that port_clock and adjusted_mode.clock
-+	 * agree once we know their relationship in the encoder's
-+	 * get_config() function.
-+	 */
-+	pipe_config->adjusted_mode.clock =
-+		intel_dotclock_calculate(intel_fdi_link_freq(dev) * 10000,
-+					 &pipe_config->fdi_m_n);
- }
- 
- /** Returns the currently programmed mode of the given pipe. */
-@@ -8904,9 +8905,6 @@ check_crtc_state(struct drm_device *dev)
- 				encoder->get_config(encoder, &pipe_config);
- 		}
- 
--		if (dev_priv->display.get_clock)
--			dev_priv->display.get_clock(crtc, &pipe_config);
--
- 		WARN(crtc->active != active,
- 		     "crtc active state doesn't match with hw state "
- 		     "(expected %i, found %i)\n", crtc->active, active);
-@@ -8981,6 +8979,18 @@ intel_modeset_check_state(struct drm_dev
- 	check_shared_dpll_state(dev);
- }
- 
-+void ironlake_check_encoder_dotclock(const struct intel_crtc_config *pipe_config,
-+				     int dotclock)
-+{
-+	/*
-+	 * FDI already provided one idea for the dotclock.
-+	 * Yell if the encoder disagrees.
-+	 */
-+	WARN(!intel_fuzzy_clock_check(pipe_config->adjusted_mode.clock, dotclock),
-+	     "FDI dotclock and encoder dotclock mismatch, fdi: %i, encoder: %i\n",
-+	     pipe_config->adjusted_mode.clock, dotclock);
-+}
-+
- static int __intel_set_mode(struct drm_crtc *crtc,
- 			    struct drm_display_mode *mode,
- 			    int x, int y, struct drm_framebuffer *fb)
-@@ -9932,7 +9942,6 @@ static void intel_init_display(struct dr
- 		dev_priv->display.update_plane = ironlake_update_plane;
- 	} else if (HAS_PCH_SPLIT(dev)) {
- 		dev_priv->display.get_pipe_config = ironlake_get_pipe_config;
--		dev_priv->display.get_clock = ironlake_crtc_clock_get;
- 		dev_priv->display.crtc_mode_set = ironlake_crtc_mode_set;
- 		dev_priv->display.crtc_enable = ironlake_crtc_enable;
- 		dev_priv->display.crtc_disable = ironlake_crtc_disable;
-@@ -9940,7 +9949,6 @@ static void intel_init_display(struct dr
- 		dev_priv->display.update_plane = ironlake_update_plane;
- 	} else if (IS_VALLEYVIEW(dev)) {
- 		dev_priv->display.get_pipe_config = i9xx_get_pipe_config;
--		dev_priv->display.get_clock = i9xx_crtc_clock_get;
- 		dev_priv->display.crtc_mode_set = i9xx_crtc_mode_set;
- 		dev_priv->display.crtc_enable = valleyview_crtc_enable;
- 		dev_priv->display.crtc_disable = i9xx_crtc_disable;
-@@ -9948,7 +9956,6 @@ static void intel_init_display(struct dr
- 		dev_priv->display.update_plane = i9xx_update_plane;
- 	} else {
- 		dev_priv->display.get_pipe_config = i9xx_get_pipe_config;
--		dev_priv->display.get_clock = i9xx_crtc_clock_get;
- 		dev_priv->display.crtc_mode_set = i9xx_crtc_mode_set;
- 		dev_priv->display.crtc_enable = i9xx_crtc_enable;
- 		dev_priv->display.crtc_disable = i9xx_crtc_disable;
-@@ -10567,15 +10574,6 @@ static void intel_modeset_readout_hw_sta
- 			      pipe);
- 	}
- 
--	list_for_each_entry(crtc, &dev->mode_config.crtc_list,
--			    base.head) {
--		if (!crtc->active)
--			continue;
--		if (dev_priv->display.get_clock)
--			dev_priv->display.get_clock(crtc,
--						    &crtc->config);
--	}
--
- 	list_for_each_entry(connector, &dev->mode_config.connector_list,
- 			    base.head) {
- 		if (connector->get_hw_state(connector)) {
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -1428,6 +1428,7 @@ static void intel_dp_get_config(struct i
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	enum port port = dp_to_dig_port(intel_dp)->port;
- 	struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
-+	int dotclock;
- 
- 	if ((port == PORT_A) || !HAS_PCH_CPT(dev)) {
- 		tmp = I915_READ(intel_dp->output_reg);
-@@ -1459,12 +1460,20 @@ static void intel_dp_get_config(struct i
- 
- 	intel_dp_get_m_n(crtc, pipe_config);
- 
--	if (dp_to_dig_port(intel_dp)->port == PORT_A) {
-+	if (port == PORT_A) {
- 		if ((I915_READ(DP_A) & DP_PLL_FREQ_MASK) == DP_PLL_FREQ_160MHZ)
- 			pipe_config->port_clock = 162000;
- 		else
- 			pipe_config->port_clock = 270000;
- 	}
-+
-+	dotclock = intel_dotclock_calculate(pipe_config->port_clock,
-+					    &pipe_config->dp_m_n);
-+
-+	if (HAS_PCH_SPLIT(dev_priv->dev) && port != PORT_A)
-+		ironlake_check_encoder_dotclock(pipe_config, dotclock);
-+
-+	pipe_config->adjusted_mode.clock = dotclock;
- }
- 
- static bool is_edp_psr(struct intel_dp *intel_dp)
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -806,6 +806,8 @@ extern void intel_dp_get_m_n(struct inte
- 			     struct intel_crtc_config *pipe_config);
- extern int intel_dotclock_calculate(int link_freq,
- 				    const struct intel_link_m_n *m_n);
-+extern void ironlake_check_encoder_dotclock(const struct intel_crtc_config *pipe_config,
-+					    int dotclock);
- extern void i915_disable_vga_mem(struct drm_device *dev);
- 
- #endif /* __INTEL_DRV_H__ */
---- a/drivers/gpu/drm/i915/intel_dvo.c
-+++ b/drivers/gpu/drm/i915/intel_dvo.c
-@@ -153,6 +153,8 @@ static void intel_dvo_get_config(struct
- 		flags |= DRM_MODE_FLAG_NVSYNC;
- 
- 	pipe_config->adjusted_mode.flags |= flags;
-+
-+	pipe_config->adjusted_mode.clock = pipe_config->port_clock;
- }
- 
- static void intel_disable_dvo(struct intel_encoder *encoder)
---- a/drivers/gpu/drm/i915/intel_hdmi.c
-+++ b/drivers/gpu/drm/i915/intel_hdmi.c
-@@ -713,6 +713,7 @@ static void intel_hdmi_get_config(struct
- 	struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base);
- 	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
- 	u32 tmp, flags = 0;
-+	int dotclock;
- 
- 	tmp = I915_READ(intel_hdmi->hdmi_reg);
- 
-@@ -727,6 +728,16 @@ static void intel_hdmi_get_config(struct
- 		flags |= DRM_MODE_FLAG_NVSYNC;
- 
- 	pipe_config->adjusted_mode.flags |= flags;
-+
-+	if ((tmp & SDVO_COLOR_FORMAT_MASK) == HDMI_COLOR_FORMAT_12bpc)
-+		dotclock = pipe_config->port_clock * 2 / 3;
-+	else
-+		dotclock = pipe_config->port_clock;
-+
-+	if (HAS_PCH_SPLIT(dev_priv->dev))
-+		ironlake_check_encoder_dotclock(pipe_config, dotclock);
-+
-+	pipe_config->adjusted_mode.clock = dotclock;
- }
- 
- static void intel_enable_hdmi(struct intel_encoder *encoder)
---- a/drivers/gpu/drm/i915/intel_lvds.c
-+++ b/drivers/gpu/drm/i915/intel_lvds.c
-@@ -92,6 +92,7 @@ static void intel_lvds_get_config(struct
- 	struct drm_device *dev = encoder->base.dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	u32 lvds_reg, tmp, flags = 0;
-+	int dotclock;
- 
- 	if (HAS_PCH_SPLIT(dev))
- 		lvds_reg = PCH_LVDS;
-@@ -116,6 +117,13 @@ static void intel_lvds_get_config(struct
- 
- 		pipe_config->gmch_pfit.control |= tmp & PANEL_8TO6_DITHER_ENABLE;
- 	}
-+
-+	dotclock = pipe_config->port_clock;
-+
-+	if (HAS_PCH_SPLIT(dev_priv->dev))
-+		ironlake_check_encoder_dotclock(pipe_config, dotclock);
-+
-+	pipe_config->adjusted_mode.clock = dotclock;
- }
- 
- /* The LVDS pin pair needs to be on before the DPLLs are enabled.
---- a/drivers/gpu/drm/i915/intel_sdvo.c
-+++ b/drivers/gpu/drm/i915/intel_sdvo.c
-@@ -1325,6 +1325,7 @@ static void intel_sdvo_get_config(struct
- 	struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
- 	struct intel_sdvo_dtd dtd;
- 	int encoder_pixel_multiplier = 0;
-+	int dotclock;
- 	u32 flags = 0, sdvox;
- 	u8 val;
- 	bool ret;
-@@ -1363,6 +1364,13 @@ static void intel_sdvo_get_config(struct
- 			 >> SDVO_PORT_MULTIPLY_SHIFT) + 1;
- 	}
- 
-+	dotclock = pipe_config->port_clock / pipe_config->pixel_multiplier;
-+
-+	if (HAS_PCH_SPLIT(dev))
-+		ironlake_check_encoder_dotclock(pipe_config, dotclock);
-+
-+	pipe_config->adjusted_mode.clock = dotclock;
-+
- 	/* Cross check the port pixel multiplier with the sdvo encoder state. */
- 	if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_CLOCK_RATE_MULT,
- 				 &val, 1)) {
diff --git a/patches.baytrail/0847-drm-i915-Add-PIPE_CONF_CHECK_CLOCK_FUZZY.patch b/patches.baytrail/0847-drm-i915-Add-PIPE_CONF_CHECK_CLOCK_FUZZY.patch
deleted file mode 100644
index 97390c46e7a37..0000000000000
--- a/patches.baytrail/0847-drm-i915-Add-PIPE_CONF_CHECK_CLOCK_FUZZY.patch
+++ /dev/null
@@ -1,71 +0,0 @@
-From 06f77570d2b10715f81d0065a4186429ba9b1885 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Fri, 6 Sep 2013 23:29:07 +0300
-Subject: drm/i915: Add PIPE_CONF_CHECK_CLOCK_FUZZY()
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Add a new pipe config check macro PIPE_CONF_CHECK_CLOCK_FUZZY() to make
-it trivial and error proof to compare clocks in a fuzzy manner.
-
-v2: Drop extra curly braces
-
-Reviewed-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 5e550656d98e82b740d3744ef1df783cdc05386e)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 23 +++++++++++++----------
- 1 file changed, 13 insertions(+), 10 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 0a3cc984ba35..ec22ac7e2d57 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -8684,6 +8684,15 @@ intel_pipe_config_compare(struct drm_device *dev,
- 		return false; \
- 	}
- 
-+#define PIPE_CONF_CHECK_CLOCK_FUZZY(name) \
-+	if (!intel_fuzzy_clock_check(current_config->name, pipe_config->name)) { \
-+		DRM_ERROR("mismatch in " #name " " \
-+			  "(expected %i, found %i)\n", \
-+			  current_config->name, \
-+			  pipe_config->name); \
-+		return false; \
-+	}
-+
- #define PIPE_CONF_QUIRK(quirk)	\
- 	((current_config->quirks | pipe_config->quirks) & (quirk))
- 
-@@ -8759,21 +8768,15 @@ intel_pipe_config_compare(struct drm_device *dev,
- 	if (IS_G4X(dev) || INTEL_INFO(dev)->gen >= 5)
- 		PIPE_CONF_CHECK_I(pipe_bpp);
- 
-+	if (!IS_HASWELL(dev))
-+		PIPE_CONF_CHECK_CLOCK_FUZZY(adjusted_mode.clock);
-+
- #undef PIPE_CONF_CHECK_X
- #undef PIPE_CONF_CHECK_I
- #undef PIPE_CONF_CHECK_FLAGS
-+#undef PIPE_CONF_CHECK_CLOCK_FUZZY
- #undef PIPE_CONF_QUIRK
- 
--	if (!IS_HASWELL(dev)) {
--		if (!intel_fuzzy_clock_check(current_config->adjusted_mode.clock,
--					     pipe_config->adjusted_mode.clock)) {
--			DRM_ERROR("mismatch in clock (expected %d, found %d)\n",
--				  current_config->adjusted_mode.clock,
--				  pipe_config->adjusted_mode.clock);
--			return false;
--		}
--	}
--
- 	return true;
- }
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0848-drm-i915-Add-fuzzy-clock-check-for-port_clock.patch b/patches.baytrail/0848-drm-i915-Add-fuzzy-clock-check-for-port_clock.patch
deleted file mode 100644
index f13b07790820e..0000000000000
--- a/patches.baytrail/0848-drm-i915-Add-fuzzy-clock-check-for-port_clock.patch
+++ /dev/null
@@ -1,48 +0,0 @@
-From c90cbf4e75155cd3610e15f447ddcd02b2dd16d7 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Fri, 6 Sep 2013 23:29:08 +0300
-Subject: drm/i915: Add fuzzy clock check for port_clock
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Check and dump for port_clock.
-
-v2: Also dump port_clock
-
-Reviewed-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit d71b8d4a741596e6b8a68f88a9c9ea522ba1fd68)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 5 ++++-
- 1 file changed, 4 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index ec22ac7e2d57..79574f4f2146 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -8335,6 +8335,7 @@ static void intel_dump_pipe_config(struct intel_crtc *crtc,
- 	drm_mode_debug_printmodeline(&pipe_config->requested_mode);
- 	DRM_DEBUG_KMS("adjusted mode:\n");
- 	drm_mode_debug_printmodeline(&pipe_config->adjusted_mode);
-+	DRM_DEBUG_KMS("port clock: %d\n", pipe_config->port_clock);
- 	DRM_DEBUG_KMS("gmch pfit: control: 0x%08x, ratios: 0x%08x, lvds border: 0x%08x\n",
- 		      pipe_config->gmch_pfit.control,
- 		      pipe_config->gmch_pfit.pgm_ratios,
-@@ -8768,8 +8769,10 @@ intel_pipe_config_compare(struct drm_device *dev,
- 	if (IS_G4X(dev) || INTEL_INFO(dev)->gen >= 5)
- 		PIPE_CONF_CHECK_I(pipe_bpp);
- 
--	if (!IS_HASWELL(dev))
-+	if (!IS_HASWELL(dev)) {
- 		PIPE_CONF_CHECK_CLOCK_FUZZY(adjusted_mode.clock);
-+		PIPE_CONF_CHECK_CLOCK_FUZZY(port_clock);
-+	}
- 
- #undef PIPE_CONF_CHECK_X
- #undef PIPE_CONF_CHECK_I
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0849-drm-i915-Grab-the-pixel-clock-from-adjusted_mode-not.patch b/patches.baytrail/0849-drm-i915-Grab-the-pixel-clock-from-adjusted_mode-not.patch
deleted file mode 100644
index 8aecb71e5d7ff..0000000000000
--- a/patches.baytrail/0849-drm-i915-Grab-the-pixel-clock-from-adjusted_mode-not.patch
+++ /dev/null
@@ -1,40 +0,0 @@
-From d4e8d43624422018c00e583c4e22b7c30845fa2f Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Wed, 4 Sep 2013 18:25:18 +0300
-Subject: drm/i915: Grab the pixel clock from adjusted_mode not requested_mode
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-i9xx_set_pipeconf() attempts to get the current pixel clock from
-requested_mode. requested_mode.clock may be totally bogus, so the
-clock should come from adjusted_mode.
-
-v2: Dropped the intel_compute_config() hunk due to killing of the
-    INTEL_FDI_FREQ check
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit a2b076b6e4890b693fed709f6d68a44f42875a3f)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 79574f4f2146..1be863c5dd88 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -4809,7 +4809,7 @@ static void i9xx_set_pipeconf(struct intel_crtc *intel_crtc)
- 		 * XXX: No double-wide on 915GM pipe B. Is that the only reason for the
- 		 * pipe == 0 check?
- 		 */
--		if (intel_crtc->config.requested_mode.clock >
-+		if (intel_crtc->config.adjusted_mode.clock >
- 		    dev_priv->display.get_display_clock_speed(dev) * 9 / 10)
- 			pipeconf |= PIPECONF_DOUBLE_WIDE;
- 	}
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0850-drm-i915-Use-adjusted_mode-clock-in-lpt_program_iclk.patch b/patches.baytrail/0850-drm-i915-Use-adjusted_mode-clock-in-lpt_program_iclk.patch
deleted file mode 100644
index 5ecc5a8e4c68e..0000000000000
--- a/patches.baytrail/0850-drm-i915-Use-adjusted_mode-clock-in-lpt_program_iclk.patch
+++ /dev/null
@@ -1,69 +0,0 @@
-From 0e48b910ddf9fb7f6ccf029fbe14b0abd03adef7 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Wed, 4 Sep 2013 18:25:19 +0300
-Subject: drm/i915: Use adjusted_mode->clock in lpt_program_iclkip
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-lpt_program_iclkip() wants to know the pixel clock. It should get that
-information from adjusted_mode, not crtc->mode.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 12d7ceed525f124d0cf795ccbb9d581d42c1ed61)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 9 +++++----
- 1 file changed, 5 insertions(+), 4 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 1be863c5dd88..b3d136685ba8 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -2897,6 +2897,7 @@ static void lpt_program_iclkip(struct drm_crtc *crtc)
- {
- 	struct drm_device *dev = crtc->dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
-+	int clock = to_intel_crtc(crtc)->config.adjusted_mode.clock;
- 	u32 divsel, phaseinc, auxdiv, phasedir = 0;
- 	u32 temp;
- 
-@@ -2914,13 +2915,13 @@ static void lpt_program_iclkip(struct drm_crtc *crtc)
- 			SBI_ICLK);
- 
- 	/* 20MHz is a corner case which is out of range for the 7-bit divisor */
--	if (crtc->mode.clock == 20000) {
-+	if (clock == 20000) {
- 		auxdiv = 1;
- 		divsel = 0x41;
- 		phaseinc = 0x20;
- 	} else {
- 		/* The iCLK virtual clock root frequency is in MHz,
--		 * but the crtc->mode.clock in in KHz. To get the divisors,
-+		 * but the adjusted_mode->clock in in KHz. To get the divisors,
- 		 * it is necessary to divide one by another, so we
- 		 * convert the virtual clock precision to KHz here for higher
- 		 * precision.
-@@ -2929,7 +2930,7 @@ static void lpt_program_iclkip(struct drm_crtc *crtc)
- 		u32 iclk_pi_range = 64;
- 		u32 desired_divisor, msb_divisor_value, pi_value;
- 
--		desired_divisor = (iclk_virtual_root_freq / crtc->mode.clock);
-+		desired_divisor = (iclk_virtual_root_freq / clock);
- 		msb_divisor_value = desired_divisor / iclk_pi_range;
- 		pi_value = desired_divisor % iclk_pi_range;
- 
-@@ -2945,7 +2946,7 @@ static void lpt_program_iclkip(struct drm_crtc *crtc)
- 		~SBI_SSCDIVINTPHASE_INCVAL_MASK);
- 
- 	DRM_DEBUG_KMS("iCLKIP clock: found settings for %dKHz refresh rate: auxdiv=%x, divsel=%x, phasedir=%x, phaseinc=%x\n",
--			crtc->mode.clock,
-+			clock,
- 			auxdiv,
- 			divsel,
- 			phasedir,
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0851-drm-i915-Use-adjusted_mode-in-HDMI-12bpc-clock-check.patch b/patches.baytrail/0851-drm-i915-Use-adjusted_mode-in-HDMI-12bpc-clock-check.patch
deleted file mode 100644
index 26c370bd5a795..0000000000000
--- a/patches.baytrail/0851-drm-i915-Use-adjusted_mode-in-HDMI-12bpc-clock-check.patch
+++ /dev/null
@@ -1,38 +0,0 @@
-From 6bc3a1db71dec3e40f0d48ea67aeb9c83e20af9b Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Wed, 4 Sep 2013 18:25:20 +0300
-Subject: drm/i915: Use adjusted_mode in HDMI 12bpc clock check
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The pixel clock should come from adjusted_mode not requested_mode.
-In this case the two should be the same as we don't currently
-overwrite the clock in the case of HDMI. But let's make the code
-safe against such things happening in the future.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit d68e7c3c7f0bf70899d27ca84f35a79e97707f07)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_hdmi.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
-index 17b2d7e948b6..79582f912414 100644
---- a/drivers/gpu/drm/i915/intel_hdmi.c
-+++ b/drivers/gpu/drm/i915/intel_hdmi.c
-@@ -873,7 +873,7 @@ bool intel_hdmi_compute_config(struct intel_encoder *encoder,
- 	struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base);
- 	struct drm_device *dev = encoder->base.dev;
- 	struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
--	int clock_12bpc = pipe_config->requested_mode.clock * 3 / 2;
-+	int clock_12bpc = pipe_config->adjusted_mode.clock * 3 / 2;
- 	int portclock_limit = hdmi_portclock_limit(intel_hdmi);
- 	int desired_bpp;
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0852-drm-i915-Use-adjusted_mode-in-intel_update_fbc.patch b/patches.baytrail/0852-drm-i915-Use-adjusted_mode-in-intel_update_fbc.patch
deleted file mode 100644
index 8b47f566e80dd..0000000000000
--- a/patches.baytrail/0852-drm-i915-Use-adjusted_mode-in-intel_update_fbc.patch
+++ /dev/null
@@ -1,70 +0,0 @@
-From 886a1200ceceac82163d38a546c5aff3dd753d88 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Wed, 4 Sep 2013 18:25:21 +0300
-Subject: drm/i915: Use adjusted_mode in intel_update_fbc()
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Check the mode flags from the adjusted_mode, not user requested mode.
-The hdisplay/vdisplay check actually checkes the primary plane size,
-so those still need to come from the user requested mode.
-
-Extract both modes from pipe config instead of the drm_crtc.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit ef644fdac1709b91a8c7df546c6d597388f17a1b)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 12 ++++++++----
- 1 file changed, 8 insertions(+), 4 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 2b7f76be01c3..086601ae920c 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -458,6 +458,8 @@ void intel_update_fbc(struct drm_device *dev)
- 	struct drm_framebuffer *fb;
- 	struct intel_framebuffer *intel_fb;
- 	struct drm_i915_gem_object *obj;
-+	const struct drm_display_mode *mode;
-+	const struct drm_display_mode *adjusted_mode;
- 	unsigned int max_hdisplay, max_vdisplay;
- 
- 	if (!I915_HAS_FBC(dev)) {
-@@ -502,6 +504,8 @@ void intel_update_fbc(struct drm_device *dev)
- 	fb = crtc->fb;
- 	intel_fb = to_intel_framebuffer(fb);
- 	obj = intel_fb->obj;
-+	mode = &intel_crtc->config.requested_mode;
-+	adjusted_mode = &intel_crtc->config.adjusted_mode;
- 
- 	if (i915_enable_fbc < 0 &&
- 	    INTEL_INFO(dev)->gen <= 7 && !IS_HASWELL(dev)) {
-@@ -514,8 +518,8 @@ void intel_update_fbc(struct drm_device *dev)
- 			DRM_DEBUG_KMS("fbc disabled per module param\n");
- 		goto out_disable;
- 	}
--	if ((crtc->mode.flags & DRM_MODE_FLAG_INTERLACE) ||
--	    (crtc->mode.flags & DRM_MODE_FLAG_DBLSCAN)) {
-+	if ((adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) ||
-+	    (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)) {
- 		if (set_no_fbc_reason(dev_priv, FBC_UNSUPPORTED_MODE))
- 			DRM_DEBUG_KMS("mode incompatible with compression, "
- 				      "disabling\n");
-@@ -529,8 +533,8 @@ void intel_update_fbc(struct drm_device *dev)
- 		max_hdisplay = 2048;
- 		max_vdisplay = 1536;
- 	}
--	if ((crtc->mode.hdisplay > max_hdisplay) ||
--	    (crtc->mode.vdisplay > max_vdisplay)) {
-+	if ((mode->hdisplay > max_hdisplay) ||
-+	    (mode->vdisplay > max_vdisplay)) {
- 		if (set_no_fbc_reason(dev_priv, FBC_MODE_TOO_LARGE))
- 			DRM_DEBUG_KMS("mode too large for compression, disabling\n");
- 		goto out_disable;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0853-drm-i915-Use-adjusted_mode-appropriately-when-comput.patch b/patches.baytrail/0853-drm-i915-Use-adjusted_mode-appropriately-when-comput.patch
deleted file mode 100644
index a9289e7e43b3a..0000000000000
--- a/patches.baytrail/0853-drm-i915-Use-adjusted_mode-appropriately-when-comput.patch
+++ /dev/null
@@ -1,190 +0,0 @@
-From fb00362c683640aa2fe9b90cc3fa5677bb03338b Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Wed, 4 Sep 2013 18:25:22 +0300
-Subject: drm/i915: Use adjusted_mode appropriately when computing watermarks
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Currently most of the watermark code looks at crtc->mode which is the
-user requested mode. The only piece of information there that is
-relevant is hdisplay, the rest must come from adjusted_mode. Convert
-all of the code to use requested_mode and adjusted_mode from
-pipe config appropriately.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 4fe8590a921d0b2e36e542dbfa89a8c5993f5a3f)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 55 ++++++++++++++++++++++++-----------------
- 1 file changed, 33 insertions(+), 22 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 086601ae920c..f9373d54e815 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -1110,7 +1110,7 @@ static void pineview_update_wm(struct drm_crtc *unused_crtc)
- 
- 	crtc = single_enabled_crtc(dev);
- 	if (crtc) {
--		int clock = crtc->mode.clock;
-+		int clock = to_intel_crtc(crtc)->config.adjusted_mode.clock;
- 		int pixel_size = crtc->fb->bits_per_pixel / 8;
- 
- 		/* Display SR */
-@@ -1171,6 +1171,7 @@ static bool g4x_compute_wm0(struct drm_device *dev,
- 			    int *cursor_wm)
- {
- 	struct drm_crtc *crtc;
-+	const struct drm_display_mode *adjusted_mode;
- 	int htotal, hdisplay, clock, pixel_size;
- 	int line_time_us, line_count;
- 	int entries, tlb_miss;
-@@ -1182,9 +1183,10 @@ static bool g4x_compute_wm0(struct drm_device *dev,
- 		return false;
- 	}
- 
--	htotal = crtc->mode.htotal;
--	hdisplay = crtc->mode.hdisplay;
--	clock = crtc->mode.clock;
-+	adjusted_mode = &to_intel_crtc(crtc)->config.adjusted_mode;
-+	clock = adjusted_mode->clock;
-+	htotal = adjusted_mode->htotal;
-+	hdisplay = to_intel_crtc(crtc)->config.requested_mode.hdisplay;
- 	pixel_size = crtc->fb->bits_per_pixel / 8;
- 
- 	/* Use the small buffer method to calculate plane watermark */
-@@ -1255,6 +1257,7 @@ static bool g4x_compute_srwm(struct drm_device *dev,
- 			     int *display_wm, int *cursor_wm)
- {
- 	struct drm_crtc *crtc;
-+	const struct drm_display_mode *adjusted_mode;
- 	int hdisplay, htotal, pixel_size, clock;
- 	unsigned long line_time_us;
- 	int line_count, line_size;
-@@ -1267,9 +1270,10 @@ static bool g4x_compute_srwm(struct drm_device *dev,
- 	}
- 
- 	crtc = intel_get_crtc_for_plane(dev, plane);
--	hdisplay = crtc->mode.hdisplay;
--	htotal = crtc->mode.htotal;
--	clock = crtc->mode.clock;
-+	adjusted_mode = &to_intel_crtc(crtc)->config.adjusted_mode;
-+	clock = adjusted_mode->clock;
-+	htotal = adjusted_mode->htotal;
-+	hdisplay = to_intel_crtc(crtc)->config.requested_mode.hdisplay;
- 	pixel_size = crtc->fb->bits_per_pixel / 8;
- 
- 	line_time_us = (htotal * 1000) / clock;
-@@ -1308,7 +1312,7 @@ static bool vlv_compute_drain_latency(struct drm_device *dev,
- 	if (!intel_crtc_active(crtc))
- 		return false;
- 
--	clock = crtc->mode.clock;	/* VESA DOT Clock */
-+	clock = to_intel_crtc(crtc)->config.adjusted_mode.clock;
- 	pixel_size = crtc->fb->bits_per_pixel / 8;	/* BPP */
- 
- 	entries = (clock / 1000) * pixel_size;
-@@ -1496,9 +1500,11 @@ static void i965_update_wm(struct drm_crtc *unused_crtc)
- 	if (crtc) {
- 		/* self-refresh has much higher latency */
- 		static const int sr_latency_ns = 12000;
--		int clock = crtc->mode.clock;
--		int htotal = crtc->mode.htotal;
--		int hdisplay = crtc->mode.hdisplay;
-+		const struct drm_display_mode *adjusted_mode =
-+			&to_intel_crtc(crtc)->config.adjusted_mode;
-+		int clock = adjusted_mode->clock;
-+		int htotal = adjusted_mode->htotal;
-+		int hdisplay = to_intel_crtc(crtc)->config.requested_mode.hdisplay;
- 		int pixel_size = crtc->fb->bits_per_pixel / 8;
- 		unsigned long line_time_us;
- 		int entries;
-@@ -1575,7 +1581,7 @@ static void i9xx_update_wm(struct drm_crtc *unused_crtc)
- 		if (IS_GEN2(dev))
- 			cpp = 4;
- 
--		planea_wm = intel_calculate_wm(crtc->mode.clock,
-+		planea_wm = intel_calculate_wm(to_intel_crtc(crtc)->config.adjusted_mode.clock,
- 					       wm_info, fifo_size, cpp,
- 					       latency_ns);
- 		enabled = crtc;
-@@ -1589,7 +1595,7 @@ static void i9xx_update_wm(struct drm_crtc *unused_crtc)
- 		if (IS_GEN2(dev))
- 			cpp = 4;
- 
--		planeb_wm = intel_calculate_wm(crtc->mode.clock,
-+		planeb_wm = intel_calculate_wm(to_intel_crtc(crtc)->config.adjusted_mode.clock,
- 					       wm_info, fifo_size, cpp,
- 					       latency_ns);
- 		if (enabled == NULL)
-@@ -1616,9 +1622,11 @@ static void i9xx_update_wm(struct drm_crtc *unused_crtc)
- 	if (HAS_FW_BLC(dev) && enabled) {
- 		/* self-refresh has much higher latency */
- 		static const int sr_latency_ns = 6000;
--		int clock = enabled->mode.clock;
--		int htotal = enabled->mode.htotal;
--		int hdisplay = enabled->mode.hdisplay;
-+		const struct drm_display_mode *adjusted_mode =
-+			&to_intel_crtc(enabled)->config.adjusted_mode;
-+		int clock = adjusted_mode->clock;
-+		int htotal = adjusted_mode->htotal;
-+		int hdisplay = to_intel_crtc(crtc)->config.requested_mode.hdisplay;
- 		int pixel_size = enabled->fb->bits_per_pixel / 8;
- 		unsigned long line_time_us;
- 		int entries;
-@@ -1679,7 +1687,8 @@ static void i830_update_wm(struct drm_crtc *unused_crtc)
- 	if (crtc == NULL)
- 		return;
- 
--	planea_wm = intel_calculate_wm(crtc->mode.clock, &i830_wm_info,
-+	planea_wm = intel_calculate_wm(to_intel_crtc(crtc)->config.adjusted_mode.clock,
-+				       &i830_wm_info,
- 				       dev_priv->display.get_fifo_size(dev, 0),
- 				       4, latency_ns);
- 	fwater_lo = I915_READ(FW_BLC) & ~0xfff;
-@@ -1751,6 +1760,7 @@ static bool ironlake_compute_srwm(struct drm_device *dev, int level, int plane,
- 				  int *fbc_wm, int *display_wm, int *cursor_wm)
- {
- 	struct drm_crtc *crtc;
-+	const struct drm_display_mode *adjusted_mode;
- 	unsigned long line_time_us;
- 	int hdisplay, htotal, pixel_size, clock;
- 	int line_count, line_size;
-@@ -1763,9 +1773,10 @@ static bool ironlake_compute_srwm(struct drm_device *dev, int level, int plane,
- 	}
- 
- 	crtc = intel_get_crtc_for_plane(dev, plane);
--	hdisplay = crtc->mode.hdisplay;
--	htotal = crtc->mode.htotal;
--	clock = crtc->mode.clock;
-+	adjusted_mode = &to_intel_crtc(crtc)->config.adjusted_mode;
-+	clock = adjusted_mode->clock;
-+	htotal = adjusted_mode->htotal;
-+	hdisplay = to_intel_crtc(crtc)->config.requested_mode.hdisplay;
- 	pixel_size = crtc->fb->bits_per_pixel / 8;
- 
- 	line_time_us = (htotal * 1000) / clock;
-@@ -2913,7 +2924,7 @@ sandybridge_compute_sprite_wm(struct drm_device *dev, int plane,
- 		return false;
- 	}
- 
--	clock = crtc->mode.clock;
-+	clock = to_intel_crtc(crtc)->config.adjusted_mode.clock;
- 
- 	/* Use the small buffer method to calculate the sprite watermark */
- 	entries = ((clock * pixel_size / 1000) * display_latency_ns) / 1000;
-@@ -2948,7 +2959,7 @@ sandybridge_compute_sprite_srwm(struct drm_device *dev, int plane,
- 	}
- 
- 	crtc = intel_get_crtc_for_plane(dev, plane);
--	clock = crtc->mode.clock;
-+	clock = to_intel_crtc(crtc)->config.adjusted_mode.clock;
- 	if (!clock) {
- 		*sprite_wm = 0;
- 		return false;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0854-drm-i915-Check-the-clock-from-adjusted-mode-in-intel.patch b/patches.baytrail/0854-drm-i915-Check-the-clock-from-adjusted-mode-in-intel.patch
deleted file mode 100644
index 67dbca414c3de..0000000000000
--- a/patches.baytrail/0854-drm-i915-Check-the-clock-from-adjusted-mode-in-intel.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From 077a14233ada6e436947a488e85b51146d87a139 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Wed, 4 Sep 2013 18:25:23 +0300
-Subject: drm/i915: Check the clock from adjusted mode in intel_crtc_active()
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The clock in crtc->mode doesn't necessarily mean anything. Let's look
-at the clock in adjusted_mode instead.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 4af67d41c8e321fc1341fc9e3f07e7813628084a)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 5 ++++-
- 1 file changed, 4 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index f9373d54e815..fb53207af99b 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -45,10 +45,13 @@
- 
- static bool intel_crtc_active(struct drm_crtc *crtc)
- {
-+	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
-+
- 	/* Be paranoid as we can arrive here with only partial
- 	 * state retrieved from the hardware during setup.
- 	 */
--	return to_intel_crtc(crtc)->active && crtc->fb && crtc->mode.clock;
-+	return intel_crtc->active && crtc->fb &&
-+		intel_crtc->config.adjusted_mode.clock;
- }
- 
- static void i8xx_disable_fbc(struct drm_device *dev)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0855-drm-i915-Use-adjusted_mode-when-checking-conditions-.patch b/patches.baytrail/0855-drm-i915-Use-adjusted_mode-when-checking-conditions-.patch
deleted file mode 100644
index 028de5cd6c090..0000000000000
--- a/patches.baytrail/0855-drm-i915-Use-adjusted_mode-when-checking-conditions-.patch
+++ /dev/null
@@ -1,46 +0,0 @@
-From 93d3dcee1ab04e63dd1425f41497ad5f2a0ddb46 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Wed, 4 Sep 2013 18:25:24 +0300
-Subject: drm/i915: Use adjusted_mode when checking conditions for PSR
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-intel_edp_psr_match_conditions() currently looks at crtc->mode
-when it really needs to look at adjusted_mode. Fix it.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit ca73b4f026751254da5c98ac8c3667b16fb00245)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_dp.c | 5 +++--
- 1 file changed, 3 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
-index 16337f752ecb..a89a6c6f9b23 100644
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -1639,7 +1639,8 @@ static bool intel_edp_psr_match_conditions(struct intel_dp *intel_dp)
- 	}
- 
- 	intel_crtc = to_intel_crtc(crtc);
--	if (!intel_crtc->active || !crtc->fb || !crtc->mode.clock) {
-+	if (!intel_crtc->active || !crtc->fb ||
-+	    !intel_crtc->config.adjusted_mode.clock) {
- 		DRM_DEBUG_KMS("crtc not active for PSR\n");
- 		dev_priv->no_psr_reason = PSR_CRTC_NOT_ACTIVE;
- 		return false;
-@@ -1666,7 +1667,7 @@ static bool intel_edp_psr_match_conditions(struct intel_dp *intel_dp)
- 		return false;
- 	}
- 
--	if (crtc->mode.flags & DRM_MODE_FLAG_INTERLACE) {
-+	if (intel_crtc->config.adjusted_mode.flags & DRM_MODE_FLAG_INTERLACE) {
- 		DRM_DEBUG_KMS("PSR condition failed: Interlaced is Enabled\n");
- 		dev_priv->no_psr_reason = PSR_INTERLACED_ENABLED;
- 		return false;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0856-drm-i915-Make-intel_crtc_active-available-outside-in.patch b/patches.baytrail/0856-drm-i915-Make-intel_crtc_active-available-outside-in.patch
deleted file mode 100644
index 7db018ffe12e8..0000000000000
--- a/patches.baytrail/0856-drm-i915-Make-intel_crtc_active-available-outside-in.patch
+++ /dev/null
@@ -1,107 +0,0 @@
-From d11b6a8053361f44bac83573b64408687944ebb1 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Wed, 4 Sep 2013 18:25:25 +0300
-Subject: drm/i915: Make intel_crtc_active() available outside intel_pm.c
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Move intel_crtc_active() to intel_display.c and make it available
-elsewhere as well.
-
-intel_edp_psr_match_conditions() already has one open coded copy,
-so replace that one with a call to intel_crtc_active().
-
-v2: Copy paste a big comment from danvet's mail explaining
-    when we can ditch the extra checks
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 20ddf6650458d08d42c3c3f8240a0d00a7e9ee97)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 17 +++++++++++++++++
- drivers/gpu/drm/i915/intel_dp.c      |  3 +--
- drivers/gpu/drm/i915/intel_drv.h     |  2 ++
- drivers/gpu/drm/i915/intel_pm.c      | 11 -----------
- 4 files changed, 20 insertions(+), 13 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index b3d136685ba8..aa3b9c6f7a98 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -733,6 +733,23 @@ vlv_find_best_dpll(const intel_limit_t *limit, struct drm_crtc *crtc,
- 	return true;
- }
- 
-+bool intel_crtc_active(struct drm_crtc *crtc)
-+{
-+	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
-+
-+	/* Be paranoid as we can arrive here with only partial
-+	 * state retrieved from the hardware during setup.
-+	 *
-+	 * We can ditch the adjusted_mode.clock check as soon
-+	 * as Haswell has gained clock readout/fastboot support.
-+	 *
-+	 * We can ditch the crtc->fb check as soon as we can
-+	 * properly reconstruct framebuffers.
-+	 */
-+	return intel_crtc->active && crtc->fb &&
-+		intel_crtc->config.adjusted_mode.clock;
-+}
-+
- enum transcoder intel_pipe_to_cpu_transcoder(struct drm_i915_private *dev_priv,
- 					     enum pipe pipe)
- {
-diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
-index a89a6c6f9b23..cbbd36913109 100644
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -1639,8 +1639,7 @@ static bool intel_edp_psr_match_conditions(struct intel_dp *intel_dp)
- 	}
- 
- 	intel_crtc = to_intel_crtc(crtc);
--	if (!intel_crtc->active || !crtc->fb ||
--	    !intel_crtc->config.adjusted_mode.clock) {
-+	if (!intel_crtc_active(crtc)) {
- 		DRM_DEBUG_KMS("crtc not active for PSR\n");
- 		dev_priv->no_psr_reason = PSR_CRTC_NOT_ACTIVE;
- 		return false;
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index 2597027001db..cd7ed03094ee 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -810,4 +810,6 @@ extern void ironlake_check_encoder_dotclock(const struct intel_crtc_config *pipe
- 					    int dotclock);
- extern void i915_disable_vga_mem(struct drm_device *dev);
- 
-+extern bool intel_crtc_active(struct drm_crtc *crtc);
-+
- #endif /* __INTEL_DRV_H__ */
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index fb53207af99b..3ecdfef3b619 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -43,17 +43,6 @@
-  * i915.i915_enable_fbc parameter
-  */
- 
--static bool intel_crtc_active(struct drm_crtc *crtc)
--{
--	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
--
--	/* Be paranoid as we can arrive here with only partial
--	 * state retrieved from the hardware during setup.
--	 */
--	return intel_crtc->active && crtc->fb &&
--		intel_crtc->config.adjusted_mode.clock;
--}
--
- static void i8xx_disable_fbc(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0857-drm-i915-Use-pipe-config-in-sprite-code.patch b/patches.baytrail/0857-drm-i915-Use-pipe-config-in-sprite-code.patch
deleted file mode 100644
index f55ed9f190e84..0000000000000
--- a/patches.baytrail/0857-drm-i915-Use-pipe-config-in-sprite-code.patch
+++ /dev/null
@@ -1,38 +0,0 @@
-From d6feddd6d469a435f70c23ff86e758d99b425340 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Wed, 4 Sep 2013 18:25:26 +0300
-Subject: drm/i915: Use pipe config in sprite code
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Rather than dig up the pipe source size from crtc->mode, use
-intel_crtc->config.requested_mode.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit ba44f7207376e62de8863bc76281141c23103e7b)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_sprite.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
-index d9c7a667553a..ae0e686e6e55 100644
---- a/drivers/gpu/drm/i915/intel_sprite.c
-+++ b/drivers/gpu/drm/i915/intel_sprite.c
-@@ -652,8 +652,8 @@ intel_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
- 		.y2 = crtc_y + crtc_h,
- 	};
- 	const struct drm_rect clip = {
--		.x2 = crtc->mode.hdisplay,
--		.y2 = crtc->mode.vdisplay,
-+		.x2 = intel_crtc->config.requested_mode.hdisplay,
-+		.y2 = intel_crtc->config.requested_mode.vdisplay,
- 	};
- 
- 	intel_fb = to_intel_framebuffer(fb);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0858-drm-i915-Use-adjusted_mode-in-DSI-PLL-calculations.patch b/patches.baytrail/0858-drm-i915-Use-adjusted_mode-in-DSI-PLL-calculations.patch
deleted file mode 100644
index 836b09958df50..0000000000000
--- a/patches.baytrail/0858-drm-i915-Use-adjusted_mode-in-DSI-PLL-calculations.patch
+++ /dev/null
@@ -1,47 +0,0 @@
-From f9c69b1e6d0b1d04d5324ccc53e9427bc27c53d1 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Wed, 4 Sep 2013 18:25:27 +0300
-Subject: drm/i915: Use adjusted_mode in DSI PLL calculations
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-adjusted_mode contains our real timings, not requested_mode. Use the
-correct thing in DSI PLL code.
-
-Also constify adjusted_mode since we don't change it.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit a74821454249d32ba5f63a7de22bd6187be1ebd8)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_dsi_pll.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_dsi_pll.c b/drivers/gpu/drm/i915/intel_dsi_pll.c
-index 582f626a99f6..44279b2ade88 100644
---- a/drivers/gpu/drm/i915/intel_dsi_pll.c
-+++ b/drivers/gpu/drm/i915/intel_dsi_pll.c
-@@ -50,7 +50,7 @@ static const u32 lfsr_converts[] = {
- 	71, 35							/* 91 - 92 */
- };
- 
--static u32 dsi_rr_formula(struct drm_display_mode *mode,
-+static u32 dsi_rr_formula(const struct drm_display_mode *mode,
- 			  int pixel_format, int video_mode_format,
- 			  int lane_count, bool eotp)
- {
-@@ -245,7 +245,7 @@ static void vlv_configure_dsi_pll(struct intel_encoder *encoder)
- {
- 	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
- 	struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
--	struct drm_display_mode *mode = &intel_crtc->config.requested_mode;
-+	const struct drm_display_mode *mode = &intel_crtc->config.adjusted_mode;
- 	struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
- 	int ret;
- 	struct dsi_mnp dsi_mnp;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0859-drm-i915-Add-explicit-pipe-src-size-to-pipe-config.patch b/patches.baytrail/0859-drm-i915-Add-explicit-pipe-src-size-to-pipe-config.patch
deleted file mode 100644
index 7d3ee1cb54376..0000000000000
--- a/patches.baytrail/0859-drm-i915-Add-explicit-pipe-src-size-to-pipe-config.patch
+++ /dev/null
@@ -1,419 +0,0 @@
-From c525c512775142555ddd579122afdfd7e4316e6f Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Wed, 4 Sep 2013 18:25:28 +0300
-Subject: drm/i915: Add explicit pipe src size to pipe config
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Rather that mess about with hdisplay/vdisplay from requested_mode, add
-explicit pipe src size information to pipe config.
-
-Now requested_mode is only really relevant for dvo/sdvo output timings.
-For everything else either adjusted_mode or pipe src size should be
-used.
-
-In many places where we end up using pipe source size, we should
-actually use the primary plane size, but we don't currently store
-that information explicitly. As long as we treat primaries as full
-screen only, we can get away with this. Eventually when we move
-primaries over to drm_plane, we need to fix it all up.
-
-v2: Add a comment to explain what pipe_src_{w,h} are
-    Add a note about primary planes to commit message
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 37327abdfbb4e2d7c9033f450de5e36e401d6efc)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 26 +++++++++++------
- drivers/gpu/drm/i915/intel_drv.h     |  6 ++++
- drivers/gpu/drm/i915/intel_panel.c   | 56 +++++++++++++++++-------------------
- drivers/gpu/drm/i915/intel_pm.c      | 33 ++++++++++-----------
- drivers/gpu/drm/i915/intel_sprite.c  |  4 +--
- 5 files changed, 67 insertions(+), 58 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index aa3b9c6f7a98..6a0242a143dc 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -4692,7 +4692,6 @@ static void intel_set_pipe_timings(struct intel_crtc *intel_crtc)
- 	enum transcoder cpu_transcoder = intel_crtc->config.cpu_transcoder;
- 	struct drm_display_mode *adjusted_mode =
- 		&intel_crtc->config.adjusted_mode;
--	struct drm_display_mode *mode = &intel_crtc->config.requested_mode;
- 	uint32_t vsyncshift, crtc_vtotal, crtc_vblank_end;
- 
- 	/* We need to be careful not to changed the adjusted mode, for otherwise
-@@ -4745,7 +4744,8 @@ static void intel_set_pipe_timings(struct intel_crtc *intel_crtc)
- 	 * always be the user's requested size.
- 	 */
- 	I915_WRITE(PIPESRC(pipe),
--		   ((mode->hdisplay - 1) << 16) | (mode->vdisplay - 1));
-+		   ((intel_crtc->config.pipe_src_w - 1) << 16) |
-+		   (intel_crtc->config.pipe_src_h - 1));
- }
- 
- static void intel_get_pipe_timings(struct intel_crtc *crtc,
-@@ -4783,8 +4783,11 @@ static void intel_get_pipe_timings(struct intel_crtc *crtc,
- 	}
- 
- 	tmp = I915_READ(PIPESRC(crtc->pipe));
--	pipe_config->requested_mode.vdisplay = (tmp & 0xffff) + 1;
--	pipe_config->requested_mode.hdisplay = ((tmp >> 16) & 0xffff) + 1;
-+	pipe_config->pipe_src_h = (tmp & 0xffff) + 1;
-+	pipe_config->pipe_src_w = ((tmp >> 16) & 0xffff) + 1;
-+
-+	pipe_config->requested_mode.vdisplay = pipe_config->pipe_src_h;
-+	pipe_config->requested_mode.hdisplay = pipe_config->pipe_src_w;
- }
- 
- static void intel_crtc_mode_from_pipe_config(struct intel_crtc *intel_crtc,
-@@ -4884,7 +4887,6 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
- 	struct drm_device *dev = crtc->dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
--	struct drm_display_mode *mode = &intel_crtc->config.requested_mode;
- 	int pipe = intel_crtc->pipe;
- 	int plane = intel_crtc->plane;
- 	int refclk, num_connectors = 0;
-@@ -4983,8 +4985,8 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
- 	 * which should always be the user's requested size.
- 	 */
- 	I915_WRITE(DSPSIZE(plane),
--		   ((mode->vdisplay - 1) << 16) |
--		   (mode->hdisplay - 1));
-+		   ((intel_crtc->config.pipe_src_h - 1) << 16) |
-+		   (intel_crtc->config.pipe_src_w - 1));
- 	I915_WRITE(DSPPOS(plane), 0);
- 
- 	i9xx_set_pipeconf(intel_crtc);
-@@ -8354,6 +8356,8 @@ static void intel_dump_pipe_config(struct intel_crtc *crtc,
- 	DRM_DEBUG_KMS("adjusted mode:\n");
- 	drm_mode_debug_printmodeline(&pipe_config->adjusted_mode);
- 	DRM_DEBUG_KMS("port clock: %d\n", pipe_config->port_clock);
-+	DRM_DEBUG_KMS("pipe src size: %dx%d\n",
-+		      pipe_config->pipe_src_w, pipe_config->pipe_src_h);
- 	DRM_DEBUG_KMS("gmch pfit: control: 0x%08x, ratios: 0x%08x, lvds border: 0x%08x\n",
- 		      pipe_config->gmch_pfit.control,
- 		      pipe_config->gmch_pfit.pgm_ratios,
-@@ -8406,6 +8410,10 @@ intel_modeset_pipe_config(struct drm_crtc *crtc,
- 
- 	drm_mode_copy(&pipe_config->adjusted_mode, mode);
- 	drm_mode_copy(&pipe_config->requested_mode, mode);
-+
-+	pipe_config->pipe_src_w = mode->hdisplay;
-+	pipe_config->pipe_src_h = mode->vdisplay;
-+
- 	pipe_config->cpu_transcoder =
- 		(enum transcoder) to_intel_crtc(crtc)->pipe;
- 	pipe_config->shared_dpll = DPLL_ID_PRIVATE;
-@@ -8762,8 +8770,8 @@ intel_pipe_config_compare(struct drm_device *dev,
- 				      DRM_MODE_FLAG_NVSYNC);
- 	}
- 
--	PIPE_CONF_CHECK_I(requested_mode.hdisplay);
--	PIPE_CONF_CHECK_I(requested_mode.vdisplay);
-+	PIPE_CONF_CHECK_I(pipe_src_w);
-+	PIPE_CONF_CHECK_I(pipe_src_h);
- 
- 	PIPE_CONF_CHECK_I(gmch_pfit.control);
- 	/* pfit ratios are autocomputed by the hw on gen4+ */
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index cd7ed03094ee..9a23b988046f 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -215,6 +215,12 @@ struct intel_crtc_config {
- 	/* Actual pipe timings ie. what we program into the pipe timing
- 	 * registers. adjusted_mode.clock is the pipe pixel clock. */
- 	struct drm_display_mode adjusted_mode;
-+
-+	/* Pipe source size (ie. panel fitter input size)
-+	 * All planes will be positioned inside this space,
-+	 * and get clipped at the edges. */
-+	int pipe_src_w, pipe_src_h;
-+
- 	/* Whether to set up the PCH/FDI. Note that we never allow sharing
- 	 * between pch encoders and cpu encoders. */
- 	bool has_pch_encoder;
-diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
-index 293564a2896a..90b87c750695 100644
---- a/drivers/gpu/drm/i915/intel_panel.c
-+++ b/drivers/gpu/drm/i915/intel_panel.c
-@@ -50,23 +50,22 @@ intel_pch_panel_fitting(struct intel_crtc *intel_crtc,
- 			struct intel_crtc_config *pipe_config,
- 			int fitting_mode)
- {
--	struct drm_display_mode *mode, *adjusted_mode;
-+	struct drm_display_mode *adjusted_mode;
- 	int x, y, width, height;
- 
--	mode = &pipe_config->requested_mode;
- 	adjusted_mode = &pipe_config->adjusted_mode;
- 
- 	x = y = width = height = 0;
- 
- 	/* Native modes don't need fitting */
--	if (adjusted_mode->hdisplay == mode->hdisplay &&
--	    adjusted_mode->vdisplay == mode->vdisplay)
-+	if (adjusted_mode->hdisplay == pipe_config->pipe_src_w &&
-+	    adjusted_mode->vdisplay == pipe_config->pipe_src_h)
- 		goto done;
- 
- 	switch (fitting_mode) {
- 	case DRM_MODE_SCALE_CENTER:
--		width = mode->hdisplay;
--		height = mode->vdisplay;
-+		width = pipe_config->pipe_src_w;
-+		height = pipe_config->pipe_src_h;
- 		x = (adjusted_mode->hdisplay - width + 1)/2;
- 		y = (adjusted_mode->vdisplay - height + 1)/2;
- 		break;
-@@ -74,17 +73,17 @@ intel_pch_panel_fitting(struct intel_crtc *intel_crtc,
- 	case DRM_MODE_SCALE_ASPECT:
- 		/* Scale but preserve the aspect ratio */
- 		{
--			u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
--			u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
-+			u32 scaled_width = adjusted_mode->hdisplay * pipe_config->pipe_src_h;
-+			u32 scaled_height = pipe_config->pipe_src_w * adjusted_mode->vdisplay;
- 			if (scaled_width > scaled_height) { /* pillar */
--				width = scaled_height / mode->vdisplay;
-+				width = scaled_height / pipe_config->pipe_src_h;
- 				if (width & 1)
- 					width++;
- 				x = (adjusted_mode->hdisplay - width + 1) / 2;
- 				y = 0;
- 				height = adjusted_mode->vdisplay;
- 			} else if (scaled_width < scaled_height) { /* letter */
--				height = scaled_width / mode->hdisplay;
-+				height = scaled_width / pipe_config->pipe_src_w;
- 				if (height & 1)
- 				    height++;
- 				y = (adjusted_mode->vdisplay - height + 1) / 2;
-@@ -177,14 +176,13 @@ void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
- {
- 	struct drm_device *dev = intel_crtc->base.dev;
- 	u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
--	struct drm_display_mode *mode, *adjusted_mode;
-+	struct drm_display_mode *adjusted_mode;
- 
--	mode = &pipe_config->requested_mode;
- 	adjusted_mode = &pipe_config->adjusted_mode;
- 
- 	/* Native modes don't need fitting */
--	if (adjusted_mode->hdisplay == mode->hdisplay &&
--	    adjusted_mode->vdisplay == mode->vdisplay)
-+	if (adjusted_mode->hdisplay == pipe_config->pipe_src_w &&
-+	    adjusted_mode->vdisplay == pipe_config->pipe_src_h)
- 		goto out;
- 
- 	switch (fitting_mode) {
-@@ -193,16 +191,16 @@ void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
- 		 * For centered modes, we have to calculate border widths &
- 		 * heights and modify the values programmed into the CRTC.
- 		 */
--		centre_horizontally(adjusted_mode, mode->hdisplay);
--		centre_vertically(adjusted_mode, mode->vdisplay);
-+		centre_horizontally(adjusted_mode, pipe_config->pipe_src_w);
-+		centre_vertically(adjusted_mode, pipe_config->pipe_src_h);
- 		border = LVDS_BORDER_ENABLE;
- 		break;
- 	case DRM_MODE_SCALE_ASPECT:
- 		/* Scale but preserve the aspect ratio */
- 		if (INTEL_INFO(dev)->gen >= 4) {
- 			u32 scaled_width = adjusted_mode->hdisplay *
--				mode->vdisplay;
--			u32 scaled_height = mode->hdisplay *
-+				pipe_config->pipe_src_h;
-+			u32 scaled_height = pipe_config->pipe_src_w *
- 				adjusted_mode->vdisplay;
- 
- 			/* 965+ is easy, it does everything in hw */
-@@ -212,12 +210,12 @@ void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
- 			else if (scaled_width < scaled_height)
- 				pfit_control |= PFIT_ENABLE |
- 					PFIT_SCALING_LETTER;
--			else if (adjusted_mode->hdisplay != mode->hdisplay)
-+			else if (adjusted_mode->hdisplay != pipe_config->pipe_src_w)
- 				pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
- 		} else {
- 			u32 scaled_width = adjusted_mode->hdisplay *
--				mode->vdisplay;
--			u32 scaled_height = mode->hdisplay *
-+				pipe_config->pipe_src_h;
-+			u32 scaled_height = pipe_config->pipe_src_w *
- 				adjusted_mode->vdisplay;
- 			/*
- 			 * For earlier chips we have to calculate the scaling
-@@ -227,11 +225,11 @@ void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
- 			if (scaled_width > scaled_height) { /* pillar */
- 				centre_horizontally(adjusted_mode,
- 						    scaled_height /
--						    mode->vdisplay);
-+						    pipe_config->pipe_src_h);
- 
- 				border = LVDS_BORDER_ENABLE;
--				if (mode->vdisplay != adjusted_mode->vdisplay) {
--					u32 bits = panel_fitter_scaling(mode->vdisplay, adjusted_mode->vdisplay);
-+				if (pipe_config->pipe_src_h != adjusted_mode->vdisplay) {
-+					u32 bits = panel_fitter_scaling(pipe_config->pipe_src_h, adjusted_mode->vdisplay);
- 					pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
- 							    bits << PFIT_VERT_SCALE_SHIFT);
- 					pfit_control |= (PFIT_ENABLE |
-@@ -241,11 +239,11 @@ void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
- 			} else if (scaled_width < scaled_height) { /* letter */
- 				centre_vertically(adjusted_mode,
- 						  scaled_width /
--						  mode->hdisplay);
-+						  pipe_config->pipe_src_w);
- 
- 				border = LVDS_BORDER_ENABLE;
--				if (mode->hdisplay != adjusted_mode->hdisplay) {
--					u32 bits = panel_fitter_scaling(mode->hdisplay, adjusted_mode->hdisplay);
-+				if (pipe_config->pipe_src_w != adjusted_mode->hdisplay) {
-+					u32 bits = panel_fitter_scaling(pipe_config->pipe_src_w, adjusted_mode->hdisplay);
- 					pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
- 							    bits << PFIT_VERT_SCALE_SHIFT);
- 					pfit_control |= (PFIT_ENABLE |
-@@ -266,8 +264,8 @@ void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
- 		 * Full scaling, even if it changes the aspect ratio.
- 		 * Fortunately this is all done for us in hw.
- 		 */
--		if (mode->vdisplay != adjusted_mode->vdisplay ||
--		    mode->hdisplay != adjusted_mode->hdisplay) {
-+		if (pipe_config->pipe_src_h != adjusted_mode->vdisplay ||
-+		    pipe_config->pipe_src_w != adjusted_mode->hdisplay) {
- 			pfit_control |= PFIT_ENABLE;
- 			if (INTEL_INFO(dev)->gen >= 4)
- 				pfit_control |= PFIT_SCALING_AUTO;
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 3ecdfef3b619..db12c18e8040 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -450,9 +450,8 @@ void intel_update_fbc(struct drm_device *dev)
- 	struct drm_framebuffer *fb;
- 	struct intel_framebuffer *intel_fb;
- 	struct drm_i915_gem_object *obj;
--	const struct drm_display_mode *mode;
- 	const struct drm_display_mode *adjusted_mode;
--	unsigned int max_hdisplay, max_vdisplay;
-+	unsigned int max_width, max_height;
- 
- 	if (!I915_HAS_FBC(dev)) {
- 		set_no_fbc_reason(dev_priv, FBC_UNSUPPORTED);
-@@ -496,7 +495,6 @@ void intel_update_fbc(struct drm_device *dev)
- 	fb = crtc->fb;
- 	intel_fb = to_intel_framebuffer(fb);
- 	obj = intel_fb->obj;
--	mode = &intel_crtc->config.requested_mode;
- 	adjusted_mode = &intel_crtc->config.adjusted_mode;
- 
- 	if (i915_enable_fbc < 0 &&
-@@ -519,14 +517,14 @@ void intel_update_fbc(struct drm_device *dev)
- 	}
- 
- 	if (IS_G4X(dev) || INTEL_INFO(dev)->gen >= 5) {
--		max_hdisplay = 4096;
--		max_vdisplay = 2048;
-+		max_width = 4096;
-+		max_height = 2048;
- 	} else {
--		max_hdisplay = 2048;
--		max_vdisplay = 1536;
-+		max_width = 2048;
-+		max_height = 1536;
- 	}
--	if ((mode->hdisplay > max_hdisplay) ||
--	    (mode->vdisplay > max_vdisplay)) {
-+	if (intel_crtc->config.pipe_src_w > max_width ||
-+	    intel_crtc->config.pipe_src_h > max_height) {
- 		if (set_no_fbc_reason(dev_priv, FBC_MODE_TOO_LARGE))
- 			DRM_DEBUG_KMS("mode too large for compression, disabling\n");
- 		goto out_disable;
-@@ -1178,7 +1176,7 @@ static bool g4x_compute_wm0(struct drm_device *dev,
- 	adjusted_mode = &to_intel_crtc(crtc)->config.adjusted_mode;
- 	clock = adjusted_mode->clock;
- 	htotal = adjusted_mode->htotal;
--	hdisplay = to_intel_crtc(crtc)->config.requested_mode.hdisplay;
-+	hdisplay = to_intel_crtc(crtc)->config.pipe_src_w;
- 	pixel_size = crtc->fb->bits_per_pixel / 8;
- 
- 	/* Use the small buffer method to calculate plane watermark */
-@@ -1265,7 +1263,7 @@ static bool g4x_compute_srwm(struct drm_device *dev,
- 	adjusted_mode = &to_intel_crtc(crtc)->config.adjusted_mode;
- 	clock = adjusted_mode->clock;
- 	htotal = adjusted_mode->htotal;
--	hdisplay = to_intel_crtc(crtc)->config.requested_mode.hdisplay;
-+	hdisplay = to_intel_crtc(crtc)->config.pipe_src_w;
- 	pixel_size = crtc->fb->bits_per_pixel / 8;
- 
- 	line_time_us = (htotal * 1000) / clock;
-@@ -1496,7 +1494,7 @@ static void i965_update_wm(struct drm_crtc *unused_crtc)
- 			&to_intel_crtc(crtc)->config.adjusted_mode;
- 		int clock = adjusted_mode->clock;
- 		int htotal = adjusted_mode->htotal;
--		int hdisplay = to_intel_crtc(crtc)->config.requested_mode.hdisplay;
-+		int hdisplay = to_intel_crtc(crtc)->config.pipe_src_w;
- 		int pixel_size = crtc->fb->bits_per_pixel / 8;
- 		unsigned long line_time_us;
- 		int entries;
-@@ -1618,7 +1616,7 @@ static void i9xx_update_wm(struct drm_crtc *unused_crtc)
- 			&to_intel_crtc(enabled)->config.adjusted_mode;
- 		int clock = adjusted_mode->clock;
- 		int htotal = adjusted_mode->htotal;
--		int hdisplay = to_intel_crtc(crtc)->config.requested_mode.hdisplay;
-+		int hdisplay = to_intel_crtc(crtc)->config.pipe_src_w;
- 		int pixel_size = enabled->fb->bits_per_pixel / 8;
- 		unsigned long line_time_us;
- 		int entries;
-@@ -1768,7 +1766,7 @@ static bool ironlake_compute_srwm(struct drm_device *dev, int level, int plane,
- 	adjusted_mode = &to_intel_crtc(crtc)->config.adjusted_mode;
- 	clock = adjusted_mode->clock;
- 	htotal = adjusted_mode->htotal;
--	hdisplay = to_intel_crtc(crtc)->config.requested_mode.hdisplay;
-+	hdisplay = to_intel_crtc(crtc)->config.pipe_src_w;
- 	pixel_size = crtc->fb->bits_per_pixel / 8;
- 
- 	line_time_us = (htotal * 1000) / clock;
-@@ -2123,8 +2121,8 @@ static uint32_t ilk_pipe_pixel_rate(struct drm_device *dev,
- 		uint64_t pipe_w, pipe_h, pfit_w, pfit_h;
- 		uint32_t pfit_size = intel_crtc->config.pch_pfit.size;
- 
--		pipe_w = intel_crtc->config.requested_mode.hdisplay;
--		pipe_h = intel_crtc->config.requested_mode.vdisplay;
-+		pipe_w = intel_crtc->config.pipe_src_w;
-+		pipe_h = intel_crtc->config.pipe_src_h;
- 		pfit_w = (pfit_size >> 16) & 0xFFFF;
- 		pfit_h = pfit_size & 0xFFFF;
- 		if (pipe_w < pfit_w)
-@@ -2650,8 +2648,7 @@ static void hsw_compute_wm_parameters(struct drm_device *dev,
- 		p->pixel_rate = ilk_pipe_pixel_rate(dev, crtc);
- 		p->pri.bytes_per_pixel = crtc->fb->bits_per_pixel / 8;
- 		p->cur.bytes_per_pixel = 4;
--		p->pri.horiz_pixels =
--			intel_crtc->config.requested_mode.hdisplay;
-+		p->pri.horiz_pixels = intel_crtc->config.pipe_src_w;
- 		p->cur.horiz_pixels = 64;
- 		/* TODO: for now, assume primary and cursor planes are always enabled. */
- 		p->pri.enabled = true;
-diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
-index ae0e686e6e55..231b289e8e57 100644
---- a/drivers/gpu/drm/i915/intel_sprite.c
-+++ b/drivers/gpu/drm/i915/intel_sprite.c
-@@ -652,8 +652,8 @@ intel_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
- 		.y2 = crtc_y + crtc_h,
- 	};
- 	const struct drm_rect clip = {
--		.x2 = intel_crtc->config.requested_mode.hdisplay,
--		.y2 = intel_crtc->config.requested_mode.vdisplay,
-+		.x2 = intel_crtc->config.pipe_src_w,
-+		.y2 = intel_crtc->config.pipe_src_h,
- 	};
- 
- 	intel_fb = to_intel_framebuffer(fb);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0860-drm-i915-re-layout-intel_panel.c-to-obey-80-char-lim.patch b/patches.baytrail/0860-drm-i915-re-layout-intel_panel.c-to-obey-80-char-lim.patch
deleted file mode 100644
index a9d89eb9aab61..0000000000000
--- a/patches.baytrail/0860-drm-i915-re-layout-intel_panel.c-to-obey-80-char-lim.patch
+++ /dev/null
@@ -1,217 +0,0 @@
-From c8d1e49f65c71ff7ea26672179aa54330b943255 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Mon, 16 Sep 2013 23:43:45 +0200
-Subject: drm/i915: re-layout intel_panel.c to obey 80 char limit
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Especially intel_gmch_panel_fitting was shifting way too much over the
-right edge and also was way too long. So extract two helpers, one for
-gen4+ and one for gen2/3. Now the entire thing is again almost
-readable ...
-
-Spurred by checkpatch freaking out about a Ville's pipeconfig rework
-in intel_panel.c
-
-Otherwise just two lines that needed appropriate breaking.
-
-Not functional change in this patch.
-
-Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Cc: Damien Lespiau <damien.lespiau@intel.com>
-Reviewed-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 9084e7d27671bc463c09ae6f0d6dfeea5f74f041)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_panel.c | 152 +++++++++++++++++++++----------------
- 1 file changed, 88 insertions(+), 64 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
-index 90b87c750695..fdf9cb531684 100644
---- a/drivers/gpu/drm/i915/intel_panel.c
-+++ b/drivers/gpu/drm/i915/intel_panel.c
-@@ -73,8 +73,10 @@ intel_pch_panel_fitting(struct intel_crtc *intel_crtc,
- 	case DRM_MODE_SCALE_ASPECT:
- 		/* Scale but preserve the aspect ratio */
- 		{
--			u32 scaled_width = adjusted_mode->hdisplay * pipe_config->pipe_src_h;
--			u32 scaled_height = pipe_config->pipe_src_w * adjusted_mode->vdisplay;
-+			u32 scaled_width = adjusted_mode->hdisplay
-+				* pipe_config->pipe_src_h;
-+			u32 scaled_height = pipe_config->pipe_src_w
-+				* adjusted_mode->vdisplay;
- 			if (scaled_width > scaled_height) { /* pillar */
- 				width = scaled_height / pipe_config->pipe_src_h;
- 				if (width & 1)
-@@ -170,6 +172,83 @@ static inline u32 panel_fitter_scaling(u32 source, u32 target)
- 	return (FACTOR * ratio + FACTOR/2) / FACTOR;
- }
- 
-+static void i965_scale_aspect(struct intel_crtc_config *pipe_config,
-+			      u32 *pfit_control)
-+{
-+	struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
-+	u32 scaled_width = adjusted_mode->hdisplay *
-+		pipe_config->pipe_src_h;
-+	u32 scaled_height = pipe_config->pipe_src_w *
-+		adjusted_mode->vdisplay;
-+
-+	/* 965+ is easy, it does everything in hw */
-+	if (scaled_width > scaled_height)
-+		*pfit_control |= PFIT_ENABLE |
-+			PFIT_SCALING_PILLAR;
-+	else if (scaled_width < scaled_height)
-+		*pfit_control |= PFIT_ENABLE |
-+			PFIT_SCALING_LETTER;
-+	else if (adjusted_mode->hdisplay != pipe_config->pipe_src_w)
-+		*pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
-+}
-+
-+static void i9xx_scale_aspect(struct intel_crtc_config *pipe_config,
-+			      u32 *pfit_control, u32 *pfit_pgm_ratios,
-+			      u32 *border)
-+{
-+	struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
-+	u32 scaled_width = adjusted_mode->hdisplay *
-+		pipe_config->pipe_src_h;
-+	u32 scaled_height = pipe_config->pipe_src_w *
-+		adjusted_mode->vdisplay;
-+	u32 bits;
-+
-+	/*
-+	 * For earlier chips we have to calculate the scaling
-+	 * ratio by hand and program it into the
-+	 * PFIT_PGM_RATIO register
-+	 */
-+	if (scaled_width > scaled_height) { /* pillar */
-+		centre_horizontally(adjusted_mode,
-+				    scaled_height /
-+				    pipe_config->pipe_src_h);
-+
-+		*border = LVDS_BORDER_ENABLE;
-+		if (pipe_config->pipe_src_h != adjusted_mode->vdisplay) {
-+			bits = panel_fitter_scaling(pipe_config->pipe_src_h,
-+						    adjusted_mode->vdisplay);
-+
-+			*pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
-+					     bits << PFIT_VERT_SCALE_SHIFT);
-+			*pfit_control |= (PFIT_ENABLE |
-+					  VERT_INTERP_BILINEAR |
-+					  HORIZ_INTERP_BILINEAR);
-+		}
-+	} else if (scaled_width < scaled_height) { /* letter */
-+		centre_vertically(adjusted_mode,
-+				  scaled_width /
-+				  pipe_config->pipe_src_w);
-+
-+		*border = LVDS_BORDER_ENABLE;
-+		if (pipe_config->pipe_src_w != adjusted_mode->hdisplay) {
-+			bits = panel_fitter_scaling(pipe_config->pipe_src_w,
-+						    adjusted_mode->hdisplay);
-+
-+			*pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
-+					     bits << PFIT_VERT_SCALE_SHIFT);
-+			*pfit_control |= (PFIT_ENABLE |
-+					  VERT_INTERP_BILINEAR |
-+					  HORIZ_INTERP_BILINEAR);
-+		}
-+	} else {
-+		/* Aspects match, Let hw scale both directions */
-+		*pfit_control |= (PFIT_ENABLE |
-+				  VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
-+				  VERT_INTERP_BILINEAR |
-+				  HORIZ_INTERP_BILINEAR);
-+	}
-+}
-+
- void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
- 			      struct intel_crtc_config *pipe_config,
- 			      int fitting_mode)
-@@ -197,67 +276,11 @@ void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
- 		break;
- 	case DRM_MODE_SCALE_ASPECT:
- 		/* Scale but preserve the aspect ratio */
--		if (INTEL_INFO(dev)->gen >= 4) {
--			u32 scaled_width = adjusted_mode->hdisplay *
--				pipe_config->pipe_src_h;
--			u32 scaled_height = pipe_config->pipe_src_w *
--				adjusted_mode->vdisplay;
--
--			/* 965+ is easy, it does everything in hw */
--			if (scaled_width > scaled_height)
--				pfit_control |= PFIT_ENABLE |
--					PFIT_SCALING_PILLAR;
--			else if (scaled_width < scaled_height)
--				pfit_control |= PFIT_ENABLE |
--					PFIT_SCALING_LETTER;
--			else if (adjusted_mode->hdisplay != pipe_config->pipe_src_w)
--				pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
--		} else {
--			u32 scaled_width = adjusted_mode->hdisplay *
--				pipe_config->pipe_src_h;
--			u32 scaled_height = pipe_config->pipe_src_w *
--				adjusted_mode->vdisplay;
--			/*
--			 * For earlier chips we have to calculate the scaling
--			 * ratio by hand and program it into the
--			 * PFIT_PGM_RATIO register
--			 */
--			if (scaled_width > scaled_height) { /* pillar */
--				centre_horizontally(adjusted_mode,
--						    scaled_height /
--						    pipe_config->pipe_src_h);
--
--				border = LVDS_BORDER_ENABLE;
--				if (pipe_config->pipe_src_h != adjusted_mode->vdisplay) {
--					u32 bits = panel_fitter_scaling(pipe_config->pipe_src_h, adjusted_mode->vdisplay);
--					pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
--							    bits << PFIT_VERT_SCALE_SHIFT);
--					pfit_control |= (PFIT_ENABLE |
--							 VERT_INTERP_BILINEAR |
--							 HORIZ_INTERP_BILINEAR);
--				}
--			} else if (scaled_width < scaled_height) { /* letter */
--				centre_vertically(adjusted_mode,
--						  scaled_width /
--						  pipe_config->pipe_src_w);
--
--				border = LVDS_BORDER_ENABLE;
--				if (pipe_config->pipe_src_w != adjusted_mode->hdisplay) {
--					u32 bits = panel_fitter_scaling(pipe_config->pipe_src_w, adjusted_mode->hdisplay);
--					pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
--							    bits << PFIT_VERT_SCALE_SHIFT);
--					pfit_control |= (PFIT_ENABLE |
--							 VERT_INTERP_BILINEAR |
--							 HORIZ_INTERP_BILINEAR);
--				}
--			} else {
--				/* Aspects match, Let hw scale both directions */
--				pfit_control |= (PFIT_ENABLE |
--						 VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
--						 VERT_INTERP_BILINEAR |
--						 HORIZ_INTERP_BILINEAR);
--			}
--		}
-+		if (INTEL_INFO(dev)->gen >= 4)
-+			i965_scale_aspect(pipe_config, &pfit_control);
-+		else
-+			i9xx_scale_aspect(pipe_config, &pfit_control,
-+					  &pfit_pgm_ratios, &border);
- 		break;
- 	case DRM_MODE_SCALE_FULLSCREEN:
- 		/*
-@@ -439,7 +462,8 @@ static void intel_pch_panel_set_backlight(struct drm_device *dev, u32 level)
- 	I915_WRITE(BLC_PWM_CPU_CTL, val | level);
- }
- 
--static void intel_panel_actually_set_backlight(struct drm_device *dev, u32 level)
-+static void intel_panel_actually_set_backlight(struct drm_device *dev,
-+					       u32 level)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	u32 tmp;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0861-drm-i915-Document-the-inteded-use-of-requested_mode.patch b/patches.baytrail/0861-drm-i915-Document-the-inteded-use-of-requested_mode.patch
deleted file mode 100644
index 6dd57b6af5e2a..0000000000000
--- a/patches.baytrail/0861-drm-i915-Document-the-inteded-use-of-requested_mode.patch
+++ /dev/null
@@ -1,38 +0,0 @@
-From b569d42d51636dc4a21784691e8f998986b1f8b6 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Wed, 4 Sep 2013 18:25:29 +0300
-Subject: drm/i915: Document the inteded use of requested_mode
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Try to clarify the purpose of requested_mode.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 5113bc9b2357bbfe64c8c36bb05dad3eeeabd166)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_drv.h | 5 +++++
- 1 file changed, 5 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index 9a23b988046f..42ad08689cbe 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -211,6 +211,11 @@ struct intel_crtc_config {
- #define PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS (1<<0) /* unreliable sync mode.flags */
- 	unsigned long quirks;
- 
-+	/* User requested mode, only valid as a starting point to
-+	 * compute adjusted_mode, except in the case of (S)DVO where
-+	 * it's also for the output timings of the (S)DVO chip.
-+	 * adjusted_mode will then correspond to the S(DVO) chip's
-+	 * preferred input timings. */
- 	struct drm_display_mode requested_mode;
- 	/* Actual pipe timings ie. what we program into the pipe timing
- 	 * registers. adjusted_mode.clock is the pipe pixel clock. */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0862-drm-i915-Fix-cursor-visibility-check-with-negative-c.patch b/patches.baytrail/0862-drm-i915-Fix-cursor-visibility-check-with-negative-c.patch
deleted file mode 100644
index f1bac529aa8a6..0000000000000
--- a/patches.baytrail/0862-drm-i915-Fix-cursor-visibility-check-with-negative-c.patch
+++ /dev/null
@@ -1,46 +0,0 @@
-From 7b012e3012e293e8e2ddfec8701bd7fb5bcb206c Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Wed, 4 Sep 2013 18:25:30 +0300
-Subject: drm/i915: Fix cursor visibility check with negative coordinates
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-When the cursor x coordinate is exactly -cursor_width, the cursor is
-invisible. And obviously the same holds for the y coordinate and
-cursor_height.
-
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit efc9064e7282aab65b281738089245c229c2df45)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 6a0242a143dc..3c13578573fa 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -6942,7 +6942,7 @@ static void intel_crtc_update_cursor(struct drm_crtc *crtc,
- 		base = 0;
- 
- 	if (x < 0) {
--		if (x + intel_crtc->cursor_width < 0)
-+		if (x + intel_crtc->cursor_width <= 0)
- 			base = 0;
- 
- 		pos |= CURSOR_POS_SIGN << CURSOR_X_SHIFT;
-@@ -6951,7 +6951,7 @@ static void intel_crtc_update_cursor(struct drm_crtc *crtc,
- 	pos |= x << CURSOR_X_SHIFT;
- 
- 	if (y < 0) {
--		if (y + intel_crtc->cursor_height < 0)
-+		if (y + intel_crtc->cursor_height <= 0)
- 			base = 0;
- 
- 		pos |= CURSOR_POS_SIGN << CURSOR_Y_SHIFT;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0863-drm-i915-Fix-cursor-visibility-checks-also-for-the-r.patch b/patches.baytrail/0863-drm-i915-Fix-cursor-visibility-checks-also-for-the-r.patch
deleted file mode 100644
index 9515975c57c1f..0000000000000
--- a/patches.baytrail/0863-drm-i915-Fix-cursor-visibility-checks-also-for-the-r.patch
+++ /dev/null
@@ -1,58 +0,0 @@
-From 7d22af6c1178e84549041afe0441df01a9f62265 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Wed, 4 Sep 2013 18:25:31 +0300
-Subject: drm/i915: Fix cursor visibility checks also for the right/bottom
- screen edges
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-First of all we should not be looking at fb->{width,height} as those do
-not tell us what the actual pipe size is. Second of all we need to use
->= for the comparison.
-
-So fix the comparison, and make use of the new pipe_src_{w,h} to
-determine the real pipe source dimensions.
-
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit d6e4db15ed93e6c3857b904f33ac759d4c66fba9)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 15 ++++++---------
- 1 file changed, 6 insertions(+), 9 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 3c13578573fa..8d523b2d23d5 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -6926,19 +6926,16 @@ static void intel_crtc_update_cursor(struct drm_crtc *crtc,
- 	int pipe = intel_crtc->pipe;
- 	int x = intel_crtc->cursor_x;
- 	int y = intel_crtc->cursor_y;
--	u32 base, pos;
-+	u32 base = 0, pos = 0;
- 	bool visible;
- 
--	pos = 0;
--
--	if (on && crtc->enabled && crtc->fb) {
-+	if (on)
- 		base = intel_crtc->cursor_addr;
--		if (x > (int) crtc->fb->width)
--			base = 0;
- 
--		if (y > (int) crtc->fb->height)
--			base = 0;
--	} else
-+	if (x >= intel_crtc->config.pipe_src_w)
-+		base = 0;
-+
-+	if (y >= intel_crtc->config.pipe_src_h)
- 		base = 0;
- 
- 	if (x < 0) {
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0864-drm-i915-garbage-collect-vlv-refclk-function.patch b/patches.baytrail/0864-drm-i915-garbage-collect-vlv-refclk-function.patch
deleted file mode 100644
index 521e63f745787..0000000000000
--- a/patches.baytrail/0864-drm-i915-garbage-collect-vlv-refclk-function.patch
+++ /dev/null
@@ -1,62 +0,0 @@
-From 1294f26da25b6a94952194e3cfcdd0e5b578f591 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Mon, 16 Sep 2013 11:29:34 +0200
-Subject: drm/i915: garbage-collect vlv refclk function
-
-Simply inline the 100MHz default we're using. Having gunk around that
-has leftover LVDS support on a platform that just doesn't have this
-isn't of any use.
-
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 9a0ea498ecc65b013d00e0b1c38791c4af91de61)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 24 +-----------------------
- 1 file changed, 1 insertion(+), 23 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 8d523b2d23d5..811c2f4e300d 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -4302,28 +4302,6 @@ static inline bool intel_panel_use_ssc(struct drm_i915_private *dev_priv)
- 		&& !(dev_priv->quirks & QUIRK_LVDS_SSC_DISABLE);
- }
- 
--static int vlv_get_refclk(struct drm_crtc *crtc)
--{
--	struct drm_device *dev = crtc->dev;
--	struct drm_i915_private *dev_priv = dev->dev_private;
--	int refclk = 27000; /* for DP & HDMI */
--
--	return 100000; /* only one validated so far */
--
--	if (intel_pipe_has_type(crtc, INTEL_OUTPUT_ANALOG)) {
--		refclk = 96000;
--	} else if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) {
--		if (intel_panel_use_ssc(dev_priv))
--			refclk = 100000;
--		else
--			refclk = 96000;
--	} else if (intel_pipe_has_type(crtc, INTEL_OUTPUT_EDP)) {
--		refclk = 100000;
--	}
--
--	return refclk;
--}
--
- static int i9xx_get_refclk(struct drm_crtc *crtc, int num_connectors)
- {
- 	struct drm_device *dev = crtc->dev;
-@@ -4331,7 +4309,7 @@ static int i9xx_get_refclk(struct drm_crtc *crtc, int num_connectors)
- 	int refclk;
- 
- 	if (IS_VALLEYVIEW(dev)) {
--		refclk = vlv_get_refclk(crtc);
-+		refclk = 100000;
- 	} else if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS) &&
- 	    intel_panel_use_ssc(dev_priv) && num_connectors < 2) {
- 		refclk = dev_priv->vbt.lvds_ssc_freq * 1000;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0865-drm-i915-Move-double-wide-mode-handling-into-pipe_co.patch b/patches.baytrail/0865-drm-i915-Move-double-wide-mode-handling-into-pipe_co.patch
deleted file mode 100644
index c444ce271e8db..0000000000000
--- a/patches.baytrail/0865-drm-i915-Move-double-wide-mode-handling-into-pipe_co.patch
+++ /dev/null
@@ -1,95 +0,0 @@
-From 377d641e08e15b3f43e430ff55ba9be1d863a994 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Wed, 4 Sep 2013 18:30:02 +0300
-Subject: drm/i915: Move double wide mode handling into pipe_config
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Determine the need for double wide mode already in compute_config
-stage as we need that information to figure out if horizontal
-coordinates need to be adjusted.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit cf532bb255920202b6483914b0e19a55f0067729)
-
-[bleung : fixup  for 3.10.17]
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 31 ++++++++++++++++++++-----------
- drivers/gpu/drm/i915/intel_drv.h     |  2 ++
- 2 files changed, 22 insertions(+), 11 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 811c2f4e300d..2c4941cff430 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -4139,6 +4139,23 @@ static int intel_crtc_compute_config(struct intel_crtc *crtc,
- 	struct drm_device *dev = crtc->base.dev;
- 	struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
- 
-+	if (INTEL_INFO(dev)->gen < 4) {
-+		struct drm_i915_private *dev_priv = dev->dev_private;
-+		int clock_limit =
-+			dev_priv->display.get_display_clock_speed(dev);
-+
-+		/*
-+		 * Enable pixel doubling when the dot clock
-+		 * is > 90% of the (display) core speed.
-+		 *
-+		 * XXX: No double-wide on 915GM pipe B. Is that
-+		 * the only reason for the pipe == PIPE_A check?
-+		 */
-+		if (crtc->pipe == PIPE_A &&
-+		    adjusted_mode->clock > clock_limit * 9 / 10)
-+			pipe_config->double_wide = true;
-+	}
-+
- 	/* Cantiga+ cannot handle modes with a hsync front porch of 0.
- 	 * WaPruneModeWithIncorrectHsyncOffset:ctg,elk,ilk,snb,ivb,vlv,hsw.
- 	 */
-@@ -4801,17 +4818,8 @@ static void i9xx_set_pipeconf(struct intel_crtc *intel_crtc)
- 	    I915_READ(PIPECONF(intel_crtc->pipe)) & PIPECONF_ENABLE)
- 		pipeconf |= PIPECONF_ENABLE;
- 
--	if (intel_crtc->pipe == 0 && INTEL_INFO(dev)->gen < 4) {
--		/* Enable pixel doubling when the dot clock is > 90% of the (display)
--		 * core speed.
--		 *
--		 * XXX: No double-wide on 915GM pipe B. Is that the only reason for the
--		 * pipe == 0 check?
--		 */
--		if (intel_crtc->config.adjusted_mode.clock >
--		    dev_priv->display.get_display_clock_speed(dev) * 9 / 10)
--			pipeconf |= PIPECONF_DOUBLE_WIDE;
--	}
-+	if (intel_crtc->config.double_wide)
-+		pipeconf |= PIPECONF_DOUBLE_WIDE;
- 
- 	/* only g4x and later have fancy bpc/dither controls */
- 	if (IS_G4X(dev) || IS_VALLEYVIEW(dev)) {
-@@ -8342,6 +8350,7 @@ static void intel_dump_pipe_config(struct intel_crtc *crtc,
- 		      pipe_config->pch_pfit.size,
- 		      pipe_config->pch_pfit.enabled ? "enabled" : "disabled");
- 	DRM_DEBUG_KMS("ips: %i\n", pipe_config->ips_enabled);
-+	DRM_DEBUG_KMS("double wide: %i\n", pipe_config->double_wide);
- }
- 
- static bool check_encoder_cloning(struct drm_crtc *crtc)
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index 42ad08689cbe..4af6751fcc7e 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -306,6 +306,8 @@ struct intel_crtc_config {
- 	struct intel_link_m_n fdi_m_n;
- 
- 	bool ips_enabled;
-+
-+	bool double_wide;
- };
- 
- struct intel_crtc {
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0866-drm-i915-Add-double_wide-readout-and-checking.patch b/patches.baytrail/0866-drm-i915-Add-double_wide-readout-and-checking.patch
deleted file mode 100644
index da74d85efa4d7..0000000000000
--- a/patches.baytrail/0866-drm-i915-Add-double_wide-readout-and-checking.patch
+++ /dev/null
@@ -1,48 +0,0 @@
-From 99c3ff42ed332bf16717b0bc691c8512bfe96871 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Wed, 4 Sep 2013 18:30:03 +0300
-Subject: drm/i915: Add double_wide readout and checking
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Read the double wide pipe information from hardware in
-i9xx_get_pipe_config(), and check it in intel_pipe_config_compare()
-
-For gen4+ double_wide is always false so the comparison can be done
-on all platforms.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 282740f73a93461645bb87cd62e428aa625619fb)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 5 +++++
- 1 file changed, 5 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 2c4941cff430..7711088beb6b 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -5042,6 +5042,9 @@ static bool i9xx_get_pipe_config(struct intel_crtc *crtc,
- 		}
- 	}
- 
-+	if (INTEL_INFO(dev)->gen < 4)
-+		pipe_config->double_wide = tmp & PIPECONF_DOUBLE_WIDE;
-+
- 	intel_get_pipe_timings(crtc, pipe_config);
- 
- 	i9xx_get_pfit_config(crtc, pipe_config);
-@@ -8770,6 +8773,8 @@ intel_pipe_config_compare(struct drm_device *dev,
- 
- 	PIPE_CONF_CHECK_I(ips_enabled);
- 
-+	PIPE_CONF_CHECK_I(double_wide);
-+
- 	PIPE_CONF_CHECK_I(shared_dpll);
- 	PIPE_CONF_CHECK_X(dpll_hw_state.dpll);
- 	PIPE_CONF_CHECK_X(dpll_hw_state.dpll_md);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0867-drm-i915-Check-pixel-clock-limits-on-pre-gen4.patch b/patches.baytrail/0867-drm-i915-Check-pixel-clock-limits-on-pre-gen4.patch
deleted file mode 100644
index 1899e7bc49ab5..0000000000000
--- a/patches.baytrail/0867-drm-i915-Check-pixel-clock-limits-on-pre-gen4.patch
+++ /dev/null
@@ -1,64 +0,0 @@
-From 1a5e8c3032df430709e2942ffe1466d37fbbfa0c Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Wed, 4 Sep 2013 18:30:04 +0300
-Subject: drm/i915: Check pixel clock limits on pre-gen4
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-We don't want to try to push the hardware beyond it's capabilities,
-so check the pixel clock against the display core clock limit. Do
-it for pre-gen4 for now since that's where we alread have the double
-wide pixel clock limit check.
-
-Let's assume that when double wide mode is enabled the max
-pixel clock limit is also doubled.
-
-FIXME: panel fitter downscaling probably affects the limit on
-non-pch platforms too, so we'd need another version of
-ilk_pipe_pixel_rate() to figure that out.
-
-FIXME: should check the limits on all platforms. Also sprites
-affect the max allowed pixel rate on some platforms, so we need
-to eventually tie all the planes and pipes into one check in
-the future. But we need plane state pre-compute before that can
-happen.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit ad3a44799510e778a6b4bf7999618634bdd6615d)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 8 +++++++-
- 1 file changed, 7 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 7711088beb6b..5aa46477d375 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -4139,6 +4139,7 @@ static int intel_crtc_compute_config(struct intel_crtc *crtc,
- 	struct drm_device *dev = crtc->base.dev;
- 	struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
- 
-+	/* FIXME should check pixel clock limits on all platforms */
- 	if (INTEL_INFO(dev)->gen < 4) {
- 		struct drm_i915_private *dev_priv = dev->dev_private;
- 		int clock_limit =
-@@ -4152,8 +4153,13 @@ static int intel_crtc_compute_config(struct intel_crtc *crtc,
- 		 * the only reason for the pipe == PIPE_A check?
- 		 */
- 		if (crtc->pipe == PIPE_A &&
--		    adjusted_mode->clock > clock_limit * 9 / 10)
-+		    adjusted_mode->clock > clock_limit * 9 / 10) {
-+			clock_limit *= 2;
- 			pipe_config->double_wide = true;
-+		}
-+
-+		if (adjusted_mode->clock > clock_limit * 9 / 10)
-+			return -EINVAL;
- 	}
- 
- 	/* Cantiga+ cannot handle modes with a hsync front porch of 0.
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0868-drm-i915-pipe_src_w-must-be-even-in-LVDS-dual-channe.patch b/patches.baytrail/0868-drm-i915-pipe_src_w-must-be-even-in-LVDS-dual-channe.patch
deleted file mode 100644
index 55b5ab0ec97ed..0000000000000
--- a/patches.baytrail/0868-drm-i915-pipe_src_w-must-be-even-in-LVDS-dual-channe.patch
+++ /dev/null
@@ -1,52 +0,0 @@
-From 7e3ae8c1d923039277ae9580e9c2eba6888080ab Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Wed, 4 Sep 2013 18:30:05 +0300
-Subject: drm/i915: pipe_src_w must be even in LVDS dual channel, DVO ganged,
- and double wide mode
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Pipe horizontal source size must be even when either LVDS dual channel
-mode, DVO ganged mode, or pipe double wide mode is used.
-
-We must round it down since we can never increase the user specified
-viewport size.
-
-The actual error from an odd pipe source width looks like a diagonal
-shift, like you might get from a bad stride.
-
-v2: s/ganaged/ganged/
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 1d1d0e277ee706413e2a3b3c671e3cf29c8d0dd2)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 10 ++++++++++
- 1 file changed, 10 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 5aa46477d375..7681f219d2fb 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -4162,6 +4162,16 @@ static int intel_crtc_compute_config(struct intel_crtc *crtc,
- 			return -EINVAL;
- 	}
- 
-+	/*
-+	 * Pipe horizontal size must be even in:
-+	 * - DVO ganged mode
-+	 * - LVDS dual channel mode
-+	 * - Double wide pipe
-+	 */
-+	if ((intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_LVDS) &&
-+	     intel_is_dual_link_lvds(dev)) || pipe_config->double_wide)
-+		pipe_config->pipe_src_w &= ~1;
-+
- 	/* Cantiga+ cannot handle modes with a hsync front porch of 0.
- 	 * WaPruneModeWithIncorrectHsyncOffset:ctg,elk,ilk,snb,ivb,vlv,hsw.
- 	 */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0869-drm-i915-Fix-up-pipe-vs.-double-wide-confusion.patch b/patches.baytrail/0869-drm-i915-Fix-up-pipe-vs.-double-wide-confusion.patch
deleted file mode 100644
index 66997b86c07ad..0000000000000
--- a/patches.baytrail/0869-drm-i915-Fix-up-pipe-vs.-double-wide-confusion.patch
+++ /dev/null
@@ -1,40 +0,0 @@
-From 9dd76b13fb11febbced5bf6de00cb01004a3b76a Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Wed, 4 Sep 2013 18:30:06 +0300
-Subject: drm/i915: Fix up pipe vs. double wide confusion
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Double wide mode is only available on pipe A, except on GDG where
-pipe B is also double wide capable.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit b397c96b6d6478910cd4263af3124ee07d304e8b)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 6 +++---
- 1 file changed, 3 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 7681f219d2fb..91e2431c0b7e 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -4149,10 +4149,10 @@ static int intel_crtc_compute_config(struct intel_crtc *crtc,
- 		 * Enable pixel doubling when the dot clock
- 		 * is > 90% of the (display) core speed.
- 		 *
--		 * XXX: No double-wide on 915GM pipe B. Is that
--		 * the only reason for the pipe == PIPE_A check?
-+		 * GDG double wide on either pipe,
-+		 * otherwise pipe A only.
- 		 */
--		if (crtc->pipe == PIPE_A &&
-+		if ((crtc->pipe == PIPE_A || IS_I915G(dev)) &&
- 		    adjusted_mode->clock > clock_limit * 9 / 10) {
- 			clock_limit *= 2;
- 			pipe_config->double_wide = true;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0870-drm-i915-Convert-overlay-double-wide-check-over-to-p.patch b/patches.baytrail/0870-drm-i915-Convert-overlay-double-wide-check-over-to-p.patch
deleted file mode 100644
index fff268c920b00..0000000000000
--- a/patches.baytrail/0870-drm-i915-Convert-overlay-double-wide-check-over-to-p.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From f43342bd52f1ea46edc0b4fdf7228fe42bbb7d20 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Wed, 4 Sep 2013 18:30:07 +0300
-Subject: drm/i915: Convert overlay double wide check over to pipe config
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 4926cb76bd8c4fb18066862bf9e00c840db4b3d8)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_overlay.c | 5 +----
- 1 file changed, 1 insertion(+), 4 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c
-index ddfd0aefe0c0..8d6d0a1bf5bf 100644
---- a/drivers/gpu/drm/i915/intel_overlay.c
-+++ b/drivers/gpu/drm/i915/intel_overlay.c
-@@ -821,14 +821,11 @@ int intel_overlay_switch_off(struct intel_overlay *overlay)
- static int check_overlay_possible_on_crtc(struct intel_overlay *overlay,
- 					  struct intel_crtc *crtc)
- {
--	drm_i915_private_t *dev_priv = overlay->dev->dev_private;
--
- 	if (!crtc->active)
- 		return -EINVAL;
- 
- 	/* can't use the overlay with double wide pipe */
--	if (INTEL_INFO(overlay->dev)->gen < 4 &&
--	    (I915_READ(PIPECONF(crtc->pipe)) & (PIPECONF_DOUBLE_WIDE | PIPECONF_ENABLE)) != PIPECONF_ENABLE)
-+	if (crtc->config.double_wide)
- 		return -EINVAL;
- 
- 	return 0;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0871-drm-i915-WARN-is-the-DP-aux-read-or-write-is-too-big.patch b/patches.baytrail/0871-drm-i915-WARN-is-the-DP-aux-read-or-write-is-too-big.patch
deleted file mode 100644
index 59cea39eec14f..0000000000000
--- a/patches.baytrail/0871-drm-i915-WARN-is-the-DP-aux-read-or-write-is-too-big.patch
+++ /dev/null
@@ -1,70 +0,0 @@
-From 007ea8e473ce205c6197fdfc7a64accaf3808315 Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Tue, 17 Sep 2013 11:14:10 -0300
-Subject: drm/i915: WARN is the DP aux read or write is too big
-
-So far we control everything and nothing exceeds the current limits,
-but (i) we never think about these limits when reviewing patches, (ii)
-not all the callers check the return values and (iii) if we ever hit
-any of these messages, we'll have to fix the code that added the bad
-message.
-
-The current limit for these messages is 20 since we only have 5 data
-registers on all the current gens.
-
-The checks inside intel_dp_aux_native_{write,read} are to prevent
-buffer overflows. The check inside intel_dp_aux_ch is to prevent
-writing past our 5 data registers.
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 46a5ae9f82719aa6e3c9c0d344772f475a335161)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_dp.c | 14 ++++++++++++--
- 1 file changed, 12 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
-index cbbd36913109..60d2006fe15d 100644
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -436,6 +436,12 @@ intel_dp_aux_ch(struct intel_dp *intel_dp,
- 		goto out;
- 	}
- 
-+	/* Only 5 data registers! */
-+	if (WARN_ON(send_bytes > 20 || recv_size > 20)) {
-+		ret = -E2BIG;
-+		goto out;
-+	}
-+
- 	while ((aux_clock_divider = get_aux_clock_divider(intel_dp, clock++))) {
- 		/* Must try at least 3 times according to DP spec */
- 		for (try = 0; try < 5; try++) {
-@@ -526,9 +532,10 @@ intel_dp_aux_native_write(struct intel_dp *intel_dp,
- 	int msg_bytes;
- 	uint8_t	ack;
- 
-+	if (WARN_ON(send_bytes > 16))
-+		return -E2BIG;
-+
- 	intel_dp_check_edp(intel_dp);
--	if (send_bytes > 16)
--		return -1;
- 	msg[0] = AUX_NATIVE_WRITE << 4;
- 	msg[1] = address >> 8;
- 	msg[2] = address & 0xff;
-@@ -569,6 +576,9 @@ intel_dp_aux_native_read(struct intel_dp *intel_dp,
- 	uint8_t ack;
- 	int ret;
- 
-+	if (WARN_ON(recv_bytes > 19))
-+		return -E2BIG;
-+
- 	intel_dp_check_edp(intel_dp);
- 	msg[0] = AUX_NATIVE_READ << 4;
- 	msg[1] = address >> 8;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0872-drm-i915-only-report-hpd-connector-status-change-whe.patch b/patches.baytrail/0872-drm-i915-only-report-hpd-connector-status-change-whe.patch
deleted file mode 100644
index 7d216b86b8b56..0000000000000
--- a/patches.baytrail/0872-drm-i915-only-report-hpd-connector-status-change-whe.patch
+++ /dev/null
@@ -1,57 +0,0 @@
-From 387350762324e301af573750674831dbacdedffc Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Tue, 17 Sep 2013 14:26:34 +0300
-Subject: drm/i915: only report hpd connector status change when it actually
- changed
-
-This reduces dmesg noise when there's a glitch on the hpd line, or there
-are more than one connectors on the same hpd line and only one of them
-changes.
-
-While at it, switch to use the friendly status names instead of numbers.
-
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 67c347ff9b056d63e456664cbba189ed6467c039)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 14 ++++++++++----
- 1 file changed, 10 insertions(+), 4 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index 13d26cf49f03..a42f30b9cdba 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -665,7 +665,8 @@ static int i915_get_vblank_timestamp(struct drm_device *dev, int pipe,
- 						     crtc);
- }
- 
--static int intel_hpd_irq_event(struct drm_device *dev, struct drm_connector *connector)
-+static bool intel_hpd_irq_event(struct drm_device *dev,
-+				struct drm_connector *connector)
- {
- 	enum drm_connector_status old_status;
- 
-@@ -673,11 +674,16 @@ static int intel_hpd_irq_event(struct drm_device *dev, struct drm_connector *con
- 	old_status = connector->status;
- 
- 	connector->status = connector->funcs->detect(connector, false);
--	DRM_DEBUG_KMS("[CONNECTOR:%d:%s] status updated from %d to %d\n",
-+	if (old_status == connector->status)
-+		return false;
-+
-+	DRM_DEBUG_KMS("[CONNECTOR:%d:%s] status updated from %s to %s\n",
- 		      connector->base.id,
- 		      drm_get_connector_name(connector),
--		      old_status, connector->status);
--	return (old_status != connector->status);
-+		      drm_get_connector_status_name(old_status),
-+		      drm_get_connector_status_name(connector->status));
-+
-+	return true;
- }
- 
- /*
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0873-drm-i915-check-for-more-ASLC-interrupts.patch b/patches.baytrail/0873-drm-i915-check-for-more-ASLC-interrupts.patch
deleted file mode 100644
index 79d864c83266c..0000000000000
--- a/patches.baytrail/0873-drm-i915-check-for-more-ASLC-interrupts.patch
+++ /dev/null
@@ -1,256 +0,0 @@
-From d9b52376bf721531c0fc7788c0bd10b211821a89 Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Tue, 17 Sep 2013 11:14:11 -0300
-Subject: drm/i915: check for more ASLC interrupts
-
-Sometimes I see the "non asle set request??" message on my Haswell
-machine, so I decided to get the spec and see if some bits are missing
-from the mask. We do have some bits missing from the mask, so this
-patch adds them, and the corresponding code to print "unsupported"
-messages just like we do with the other bits we don't support.
-
-But I still see the "non asle set request??" message on my machine :(
-
-Also use the proper ASLC name to indicate the registers we're talking
-about.
-
-v2: - Properly set the new FAILED bits
-    - Rename the old FAILED bits
-    - Print everything we don't support
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 507c1a454809da54af21091875f883e0364c5378)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_opregion.c | 153 +++++++++++++++++++++++++++-------
- 1 file changed, 121 insertions(+), 32 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_opregion.c b/drivers/gpu/drm/i915/intel_opregion.c
-index 250d14ad4d11..2acf5cae20e4 100644
---- a/drivers/gpu/drm/i915/intel_opregion.c
-+++ b/drivers/gpu/drm/i915/intel_opregion.c
-@@ -110,25 +110,38 @@ struct opregion_asle {
- 	u32 epfm;       /* enabled panel fitting modes */
- 	u8 plut[74];    /* panel LUT and identifier */
- 	u32 pfmb;       /* PWM freq and min brightness */
--	u8 rsvd[102];
-+	u32 cddv;       /* color correction default values */
-+	u32 pcft;       /* power conservation features */
-+	u32 srot;       /* supported rotation angles */
-+	u32 iuer;       /* IUER events */
-+	u8 rsvd[86];
- } __attribute__((packed));
- 
- /* Driver readiness indicator */
- #define ASLE_ARDY_READY		(1 << 0)
- #define ASLE_ARDY_NOT_READY	(0 << 0)
- 
--/* ASLE irq request bits */
--#define ASLE_SET_ALS_ILLUM     (1 << 0)
--#define ASLE_SET_BACKLIGHT     (1 << 1)
--#define ASLE_SET_PFIT          (1 << 2)
--#define ASLE_SET_PWM_FREQ      (1 << 3)
--#define ASLE_REQ_MSK           0xf
--
--/* response bits of ASLE irq request */
--#define ASLE_ALS_ILLUM_FAILED	(1<<10)
--#define ASLE_BACKLIGHT_FAILED	(1<<12)
--#define ASLE_PFIT_FAILED	(1<<14)
--#define ASLE_PWM_FREQ_FAILED	(1<<16)
-+/* ASLE Interrupt Command (ASLC) bits */
-+#define ASLC_SET_ALS_ILLUM		(1 << 0)
-+#define ASLC_SET_BACKLIGHT		(1 << 1)
-+#define ASLC_SET_PFIT			(1 << 2)
-+#define ASLC_SET_PWM_FREQ		(1 << 3)
-+#define ASLC_SUPPORTED_ROTATION_ANGLES	(1 << 4)
-+#define ASLC_BUTTON_ARRAY		(1 << 5)
-+#define ASLC_CONVERTIBLE_INDICATOR	(1 << 6)
-+#define ASLC_DOCKING_INDICATOR		(1 << 7)
-+#define ASLC_ISCT_STATE_CHANGE		(1 << 8)
-+#define ASLC_REQ_MSK			0x1ff
-+/* response bits */
-+#define ASLC_ALS_ILLUM_FAILED		(1 << 10)
-+#define ASLC_BACKLIGHT_FAILED		(1 << 12)
-+#define ASLC_PFIT_FAILED		(1 << 14)
-+#define ASLC_PWM_FREQ_FAILED		(1 << 16)
-+#define ASLC_ROTATION_ANGLES_FAILED	(1 << 18)
-+#define ASLC_BUTTON_ARRAY_FAILED	(1 << 20)
-+#define ASLC_CONVERTIBLE_FAILED		(1 << 22)
-+#define ASLC_DOCKING_FAILED		(1 << 24)
-+#define ASLC_ISCT_STATE_FAILED		(1 << 26)
- 
- /* Technology enabled indicator */
- #define ASLE_TCHE_ALS_EN	(1 << 0)
-@@ -154,6 +167,15 @@ struct opregion_asle {
- 
- #define ASLE_CBLV_VALID         (1<<31)
- 
-+/* IUER */
-+#define ASLE_IUER_DOCKING		(1 << 7)
-+#define ASLE_IUER_CONVERTIBLE		(1 << 6)
-+#define ASLE_IUER_ROTATION_LOCK_BTN	(1 << 4)
-+#define ASLE_IUER_VOLUME_DOWN_BTN	(1 << 3)
-+#define ASLE_IUER_VOLUME_UP_BTN		(1 << 2)
-+#define ASLE_IUER_WINDOWS_BTN		(1 << 1)
-+#define ASLE_IUER_POWER_BTN		(1 << 0)
-+
- /* Software System Control Interrupt (SWSCI) */
- #define SWSCI_SCIC_INDICATOR		(1 << 0)
- #define SWSCI_SCIC_MAIN_FUNCTION_SHIFT	1
-@@ -377,11 +399,11 @@ static u32 asle_set_backlight(struct drm_device *dev, u32 bclp)
- 	DRM_DEBUG_DRIVER("bclp = 0x%08x\n", bclp);
- 
- 	if (!(bclp & ASLE_BCLP_VALID))
--		return ASLE_BACKLIGHT_FAILED;
-+		return ASLC_BACKLIGHT_FAILED;
- 
- 	bclp &= ASLE_BCLP_MSK;
- 	if (bclp > 255)
--		return ASLE_BACKLIGHT_FAILED;
-+		return ASLC_BACKLIGHT_FAILED;
- 
- 	intel_panel_set_backlight(dev, bclp, 255);
- 	iowrite32(DIV_ROUND_UP(bclp * 100, 255) | ASLE_CBLV_VALID, &asle->cblv);
-@@ -394,13 +416,13 @@ static u32 asle_set_als_illum(struct drm_device *dev, u32 alsi)
- 	/* alsi is the current ALS reading in lux. 0 indicates below sensor
- 	   range, 0xffff indicates above sensor range. 1-0xfffe are valid */
- 	DRM_DEBUG_DRIVER("Illum is not supported\n");
--	return ASLE_ALS_ILLUM_FAILED;
-+	return ASLC_ALS_ILLUM_FAILED;
- }
- 
- static u32 asle_set_pwm_freq(struct drm_device *dev, u32 pfmb)
- {
- 	DRM_DEBUG_DRIVER("PWM freq is not supported\n");
--	return ASLE_PWM_FREQ_FAILED;
-+	return ASLC_PWM_FREQ_FAILED;
- }
- 
- static u32 asle_set_pfit(struct drm_device *dev, u32 pfit)
-@@ -408,39 +430,106 @@ static u32 asle_set_pfit(struct drm_device *dev, u32 pfit)
- 	/* Panel fitting is currently controlled by the X code, so this is a
- 	   noop until modesetting support works fully */
- 	DRM_DEBUG_DRIVER("Pfit is not supported\n");
--	return ASLE_PFIT_FAILED;
-+	return ASLC_PFIT_FAILED;
-+}
-+
-+static u32 asle_set_supported_rotation_angles(struct drm_device *dev, u32 srot)
-+{
-+	DRM_DEBUG_DRIVER("SROT is not supported\n");
-+	return ASLC_ROTATION_ANGLES_FAILED;
-+}
-+
-+static u32 asle_set_button_array(struct drm_device *dev, u32 iuer)
-+{
-+	if (!iuer)
-+		DRM_DEBUG_DRIVER("Button array event is not supported (nothing)\n");
-+	if (iuer & ASLE_IUER_ROTATION_LOCK_BTN)
-+		DRM_DEBUG_DRIVER("Button array event is not supported (rotation lock)\n");
-+	if (iuer & ASLE_IUER_VOLUME_DOWN_BTN)
-+		DRM_DEBUG_DRIVER("Button array event is not supported (volume down)\n");
-+	if (iuer & ASLE_IUER_VOLUME_UP_BTN)
-+		DRM_DEBUG_DRIVER("Button array event is not supported (volume up)\n");
-+	if (iuer & ASLE_IUER_WINDOWS_BTN)
-+		DRM_DEBUG_DRIVER("Button array event is not supported (windows)\n");
-+	if (iuer & ASLE_IUER_POWER_BTN)
-+		DRM_DEBUG_DRIVER("Button array event is not supported (power)\n");
-+
-+	return ASLC_BUTTON_ARRAY_FAILED;
-+}
-+
-+static u32 asle_set_convertible(struct drm_device *dev, u32 iuer)
-+{
-+	if (iuer & ASLE_IUER_CONVERTIBLE)
-+		DRM_DEBUG_DRIVER("Convertible is not supported (clamshell)\n");
-+	else
-+		DRM_DEBUG_DRIVER("Convertible is not supported (slate)\n");
-+
-+	return ASLC_CONVERTIBLE_FAILED;
-+}
-+
-+static u32 asle_set_docking(struct drm_device *dev, u32 iuer)
-+{
-+	if (iuer & ASLE_IUER_DOCKING)
-+		DRM_DEBUG_DRIVER("Docking is not supported (docked)\n");
-+	else
-+		DRM_DEBUG_DRIVER("Docking is not supported (undocked)\n");
-+
-+	return ASLC_DOCKING_FAILED;
-+}
-+
-+static u32 asle_isct_state(struct drm_device *dev)
-+{
-+	DRM_DEBUG_DRIVER("ISCT is not supported\n");
-+	return ASLC_ISCT_STATE_FAILED;
- }
- 
- void intel_opregion_asle_intr(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct opregion_asle __iomem *asle = dev_priv->opregion.asle;
--	u32 asle_stat = 0;
--	u32 asle_req;
-+	u32 aslc_stat = 0;
-+	u32 aslc_req;
- 
- 	if (!asle)
- 		return;
- 
--	asle_req = ioread32(&asle->aslc) & ASLE_REQ_MSK;
-+	aslc_req = ioread32(&asle->aslc);
- 
--	if (!asle_req) {
--		DRM_DEBUG_DRIVER("non asle set request??\n");
-+	if (!(aslc_req & ASLC_REQ_MSK)) {
-+		DRM_DEBUG_DRIVER("No request on ASLC interrupt 0x%08x\n",
-+				 aslc_req);
- 		return;
- 	}
- 
--	if (asle_req & ASLE_SET_ALS_ILLUM)
--		asle_stat |= asle_set_als_illum(dev, ioread32(&asle->alsi));
-+	if (aslc_req & ASLC_SET_ALS_ILLUM)
-+		aslc_stat |= asle_set_als_illum(dev, ioread32(&asle->alsi));
-+
-+	if (aslc_req & ASLC_SET_BACKLIGHT)
-+		aslc_stat |= asle_set_backlight(dev, ioread32(&asle->bclp));
-+
-+	if (aslc_req & ASLC_SET_PFIT)
-+		aslc_stat |= asle_set_pfit(dev, ioread32(&asle->pfit));
-+
-+	if (aslc_req & ASLC_SET_PWM_FREQ)
-+		aslc_stat |= asle_set_pwm_freq(dev, ioread32(&asle->pfmb));
-+
-+	if (aslc_req & ASLC_SUPPORTED_ROTATION_ANGLES)
-+		aslc_stat |= asle_set_supported_rotation_angles(dev,
-+							ioread32(&asle->srot));
-+
-+	if (aslc_req & ASLC_BUTTON_ARRAY)
-+		aslc_stat |= asle_set_button_array(dev, ioread32(&asle->iuer));
- 
--	if (asle_req & ASLE_SET_BACKLIGHT)
--		asle_stat |= asle_set_backlight(dev, ioread32(&asle->bclp));
-+	if (aslc_req & ASLC_CONVERTIBLE_INDICATOR)
-+		aslc_stat |= asle_set_convertible(dev, ioread32(&asle->iuer));
- 
--	if (asle_req & ASLE_SET_PFIT)
--		asle_stat |= asle_set_pfit(dev, ioread32(&asle->pfit));
-+	if (aslc_req & ASLC_DOCKING_INDICATOR)
-+		aslc_stat |= asle_set_docking(dev, ioread32(&asle->iuer));
- 
--	if (asle_req & ASLE_SET_PWM_FREQ)
--		asle_stat |= asle_set_pwm_freq(dev, ioread32(&asle->pfmb));
-+	if (aslc_req & ASLC_ISCT_STATE_CHANGE)
-+		aslc_stat |= asle_isct_state(dev);
- 
--	iowrite32(asle_stat, &asle->aslc);
-+	iowrite32(aslc_stat, &asle->aslc);
- }
- 
- #define ACPI_EV_DISPLAY_SWITCH (1<<0)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0874-drm-i915-do-not-update-cursor-in-crtc-mode-set.patch b/patches.baytrail/0874-drm-i915-do-not-update-cursor-in-crtc-mode-set.patch
deleted file mode 100644
index 31637ffbcedc9..0000000000000
--- a/patches.baytrail/0874-drm-i915-do-not-update-cursor-in-crtc-mode-set.patch
+++ /dev/null
@@ -1,74 +0,0 @@
-From c082195c68ea68f9aa91fb4e7af402c988c64d62 Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Tue, 17 Sep 2013 18:33:43 +0300
-Subject: drm/i915: do not update cursor in crtc mode set
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The cursor is disabled before crtc mode set in crtc disable (and we
-assert this is the case), and enabled afterwards in crtc enable. Do not
-update it in crtc mode set.
-
-On HSW enabling a plane on a disabled pipe may hang the entire system.
-And there's no good reason for doing it ever, so just don't.
-
-v2: Add note about HSW hangs - vsyrjala
-
-Cc: stable@vger.kernel.org
-Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Tested-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit cc173961a68034c1171a421f0dbed39edfb60880)
-Signed-off-by: James Ausmus <james.ausmus@intel.com>
-
-Conflicts:
-	drivers/gpu/drm/i915/intel_display.c
-	(resolved using rerere from b599c89 ("Merge tag 'v3.12-rc2' into
-	drm-intel-next"))
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 11 +----------
- 1 file changed, 1 insertion(+), 10 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 91e2431c0b7e..56f333ebb706 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -4932,10 +4932,7 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
- 		}
- 	}
- 
--	/* Ensure that the cursor is valid for the new mode before changing... */
--	intel_crtc_update_cursor(crtc, true);
--
--	if (!is_dsi && is_lvds && dev_priv->lvds_downclock_avail) {
-+	if (is_lvds && dev_priv->lvds_downclock_avail) {
- 		/*
- 		 * Ensure we match the reduced clock's P to the target clock.
- 		 * If the clocks don't match, we can't switch the display clock
-@@ -5845,9 +5842,6 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
- 		intel_crtc->config.dpll.p2 = clock.p2;
- 	}
- 
--	/* Ensure that the cursor is valid for the new mode before changing... */
--	intel_crtc_update_cursor(crtc, true);
--
- 	/* CPU eDP is the only output that doesn't need a PCH PLL of its own. */
- 	if (intel_crtc->config.has_pch_encoder) {
- 		fp = i9xx_dpll_compute_fp(&intel_crtc->config.dpll);
-@@ -6398,9 +6392,6 @@ static int haswell_crtc_mode_set(struct drm_crtc *crtc,
- 	if (!intel_ddi_pll_mode_set(crtc))
- 		return -EINVAL;
- 
--	/* Ensure that the cursor is valid for the new mode before changing... */
--	intel_crtc_update_cursor(crtc, true);
--
- 	if (intel_crtc->config.has_dp_encoder)
- 		intel_dp_set_m_n(intel_crtc);
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0875-drm-i915-Don-t-enable-the-cursor-on-a-disable-pipe.patch b/patches.baytrail/0875-drm-i915-Don-t-enable-the-cursor-on-a-disable-pipe.patch
deleted file mode 100644
index e53344da03824..0000000000000
--- a/patches.baytrail/0875-drm-i915-Don-t-enable-the-cursor-on-a-disable-pipe.patch
+++ /dev/null
@@ -1,52 +0,0 @@
-From d85f5488622fbfcbc38b4b2d4f487d79932f83f7 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Tue, 17 Sep 2013 18:33:44 +0300
-Subject: drm/i915: Don't enable the cursor on a disable pipe
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-On HSW enabling a plane on a disabled pipe may hang the entire system.
-And there's no good reason for doing it ever, so just don't.
-
-v2: Move the crtc active checks to intel_crtc_cursor_{set,move} to
-    avoid confusing people during modeset
-
-Cc: stable@vger.kernel.org
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Tested-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit f2f5f771c5fc0fa252cde3d0d0452dcc785cc17a)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 6 ++++--
- 1 file changed, 4 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 56f333ebb706..1e3c14b5a891 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -7070,7 +7070,8 @@ static int intel_crtc_cursor_set(struct drm_crtc *crtc,
- 	intel_crtc->cursor_width = width;
- 	intel_crtc->cursor_height = height;
- 
--	intel_crtc_update_cursor(crtc, intel_crtc->cursor_bo != NULL);
-+	if (intel_crtc->active)
-+		intel_crtc_update_cursor(crtc, intel_crtc->cursor_bo != NULL);
- 
- 	return 0;
- fail_unpin:
-@@ -7089,7 +7090,8 @@ static int intel_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
- 	intel_crtc->cursor_x = x;
- 	intel_crtc->cursor_y = y;
- 
--	intel_crtc_update_cursor(crtc, intel_crtc->cursor_bo != NULL);
-+	if (intel_crtc->active)
-+		intel_crtc_update_cursor(crtc, intel_crtc->cursor_bo != NULL);
- 
- 	return 0;
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0876-drm-i915-write-D_COMP-using-the-mailbox.patch b/patches.baytrail/0876-drm-i915-write-D_COMP-using-the-mailbox.patch
deleted file mode 100644
index 6b7576a183178..0000000000000
--- a/patches.baytrail/0876-drm-i915-write-D_COMP-using-the-mailbox.patch
+++ /dev/null
@@ -1,70 +0,0 @@
-From 1c2a2f772b86a80ed40f690fb971b8b2d52575c2 Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Tue, 10 Sep 2013 19:36:37 -0300
-Subject: drm/i915: write D_COMP using the mailbox
-
-You can't write it using the MCHBAR mirror, the write will just get
-dropped.
-
-This should make us BSpec-compliant, but there's no real bug I could
-reproduce that is fixed by this patch.
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-[danvet: Fix spelling mistake in the comment that Damien spotted.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 515b239269fb67fd167676d335a56ef0c13e53d5)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_reg.h      |    4 ++++
- drivers/gpu/drm/i915/intel_display.c |   10 ++++++++--
- 2 files changed, 12 insertions(+), 2 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -1441,6 +1441,8 @@
-  * device 0 function 0's pci config register 0x44 or 0x48 and matches it in
-  * every way.  It is not accessible from the CP register read instructions.
-  *
-+ * Starting from Haswell, you can't write registers using the MCHBAR mirror,
-+ * just read.
-  */
- #define MCHBAR_MIRROR_BASE	0x10000
- 
-@@ -4728,6 +4730,8 @@
- #define   GEN6_PCODE_READ_MIN_FREQ_TABLE	0x9
- #define	  GEN6_PCODE_WRITE_RC6VIDS		0x4
- #define	  GEN6_PCODE_READ_RC6VIDS		0x5
-+#define   GEN6_PCODE_READ_D_COMP		0x10
-+#define   GEN6_PCODE_WRITE_D_COMP		0x11
- #define   GEN6_ENCODE_RC6_VID(mv)		(((mv) - 245) / 5)
- #define   GEN6_DECODE_RC6_VID(vids)		(((vids) * 5) + 245)
- #define GEN6_PCODE_DATA				0x138128
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -6135,7 +6135,10 @@ void hsw_disable_lcpll(struct drm_i915_p
- 
- 	val = I915_READ(D_COMP);
- 	val |= D_COMP_COMP_DISABLE;
--	I915_WRITE(D_COMP, val);
-+	mutex_lock(&dev_priv->rps.hw_lock);
-+	if (sandybridge_pcode_write(dev_priv, GEN6_PCODE_WRITE_D_COMP, val))
-+		DRM_ERROR("Failed to disable D_COMP\n");
-+	mutex_unlock(&dev_priv->rps.hw_lock);
- 	POSTING_READ(D_COMP);
- 	ndelay(100);
- 
-@@ -6177,7 +6180,10 @@ void hsw_restore_lcpll(struct drm_i915_p
- 	val = I915_READ(D_COMP);
- 	val |= D_COMP_COMP_FORCE;
- 	val &= ~D_COMP_COMP_DISABLE;
--	I915_WRITE(D_COMP, val);
-+	mutex_lock(&dev_priv->rps.hw_lock);
-+	if (sandybridge_pcode_write(dev_priv, GEN6_PCODE_WRITE_D_COMP, val))
-+		DRM_ERROR("Failed to enable D_COMP\n");
-+	mutex_unlock(&dev_priv->rps.hw_lock);
- 	POSTING_READ(D_COMP);
- 
- 	val = I915_READ(LCPLL_CTL);
diff --git a/patches.baytrail/0877-drm-i915-register-backlight-device-also-when-backlig.patch b/patches.baytrail/0877-drm-i915-register-backlight-device-also-when-backlig.patch
deleted file mode 100644
index 0e9813cf0e942..0000000000000
--- a/patches.baytrail/0877-drm-i915-register-backlight-device-also-when-backlig.patch
+++ /dev/null
@@ -1,40 +0,0 @@
-From 5c2ba60e3199ecb3024e1d9c9df06e5c634b153d Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Wed, 18 Sep 2013 17:19:45 +0300
-Subject: drm/i915: register backlight device also when backlight class is a
- module
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Ville and I were wondering why his laptop was missing the
-intel_backlight sysfs interface. Turns out we never register it when
-CONFIG_BACKLIGHT_CLASS_DEVICE=m. This has been broken ever since the
-i915 native backlight interface was added.
-
-CC: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 912e8b12eedb41c69717deda2b2a08e7292945fc)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_panel.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
-index fdf9cb531684..3bc89a6bc3ee 100644
---- a/drivers/gpu/drm/i915/intel_panel.c
-+++ b/drivers/gpu/drm/i915/intel_panel.c
-@@ -659,7 +659,7 @@ intel_panel_detect(struct drm_device *dev)
- 	}
- }
- 
--#ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
-+#if IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE)
- static int intel_panel_update_status(struct backlight_device *bd)
- {
- 	struct drm_device *dev = bl_get_data(bd);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0878-drm-i915-dump-crtc-timings-from-the-pipe-config.patch b/patches.baytrail/0878-drm-i915-dump-crtc-timings-from-the-pipe-config.patch
deleted file mode 100644
index 8d83992cfac66..0000000000000
--- a/patches.baytrail/0878-drm-i915-dump-crtc-timings-from-the-pipe-config.patch
+++ /dev/null
@@ -1,56 +0,0 @@
-From 8713156a9f074b8717aa695aac4709e197e16cc7 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 19 Sep 2013 14:53:58 +0200
-Subject: drm/i915: dump crtc timings from the pipe config
-
-I always get royally confused how a modeline with all zeros could
-possible pass the paranoid pipe config checker. Until I realize again
-that we only check the crtc timings. So dump the crtc timings for the
-adjusted mode.
-
-This will be even more important for 3D support where the crtc timings
-are markedly different from the input modeline if we have
-frame-by-frame 3d output enabled.
-
-Cc: Damien Lespiau <damien.lespiau@intel.com>
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 644db711d3af6f7b91ce4b7e1a056a84bf34d349)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 12 ++++++++++++
- 1 file changed, 12 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 07f26a9e6957..a45ff17af834 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -8331,6 +8331,17 @@ compute_baseline_pipe_bpp(struct intel_crtc *crtc,
- 	return bpp;
- }
- 
-+static void intel_dump_crtc_timings(const struct drm_display_mode *mode)
-+{
-+	DRM_DEBUG_KMS("crtc timings: %d %d %d %d %d %d %d %d %d, "
-+			"type: 0x%x flags: 0x%x\n",
-+		mode->clock,
-+		mode->crtc_hdisplay, mode->crtc_hsync_start,
-+		mode->crtc_hsync_end, mode->crtc_htotal,
-+		mode->crtc_vdisplay, mode->crtc_vsync_start,
-+		mode->crtc_vsync_end, mode->crtc_vtotal, mode->type, mode->flags);
-+}
-+
- static void intel_dump_pipe_config(struct intel_crtc *crtc,
- 				   struct intel_crtc_config *pipe_config,
- 				   const char *context)
-@@ -8356,6 +8367,7 @@ static void intel_dump_pipe_config(struct intel_crtc *crtc,
- 	drm_mode_debug_printmodeline(&pipe_config->requested_mode);
- 	DRM_DEBUG_KMS("adjusted mode:\n");
- 	drm_mode_debug_printmodeline(&pipe_config->adjusted_mode);
-+	intel_dump_crtc_timings(&pipe_config->adjusted_mode);
- 	DRM_DEBUG_KMS("port clock: %d\n", pipe_config->port_clock);
- 	DRM_DEBUG_KMS("pipe src size: %dx%d\n",
- 		      pipe_config->pipe_src_w, pipe_config->pipe_src_h);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0879-drm-i915-Fix-HSW-parity-test.patch b/patches.baytrail/0879-drm-i915-Fix-HSW-parity-test.patch
deleted file mode 100644
index 1adb9bb8c3733..0000000000000
--- a/patches.baytrail/0879-drm-i915-Fix-HSW-parity-test.patch
+++ /dev/null
@@ -1,63 +0,0 @@
-From 01a1fb5630a87a498aa3d3fe373ef18b762eaef9 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <benjamin.widawsky@intel.com>
-Date: Tue, 17 Sep 2013 21:12:42 -0700
-Subject: drm/i915: Fix HSW parity test
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Haswell changed the log registers to be WO, so we can no longer read
-them to determine the programming (which sucks, see later note). For
-now, simply use the cached value, and hope HW doesn't screw us over.
-
-v2: Simplify the logic to avoid an extra !, remove last, and fix the
-buffer offset which broke along the rebase (Ville)
-
-Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=57441
-CC: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 1c966dd26b2e46a9d089fcb7e36f649000670e64)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_sysfs.c | 14 +++++++++++++-
- 1 file changed, 13 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c
-index d572435cfbe7..71f6de24444e 100644
---- a/drivers/gpu/drm/i915/i915_sysfs.c
-+++ b/drivers/gpu/drm/i915/i915_sysfs.c
-@@ -133,6 +133,17 @@ i915_l3_read(struct file *filp, struct kobject *kobj,
- 	if (ret)
- 		return ret;
- 
-+	if (IS_HASWELL(drm_dev)) {
-+		if (dev_priv->l3_parity.remap_info)
-+			memcpy(buf,
-+			       dev_priv->l3_parity.remap_info + (offset/4),
-+			       count);
-+		else
-+			memset(buf, 0, count);
-+
-+		goto out;
-+	}
-+
- 	misccpctl = I915_READ(GEN7_MISCCPCTL);
- 	I915_WRITE(GEN7_MISCCPCTL, misccpctl & ~GEN7_DOP_CLOCK_GATE_ENABLE);
- 
-@@ -141,9 +152,10 @@ i915_l3_read(struct file *filp, struct kobject *kobj,
- 
- 	I915_WRITE(GEN7_MISCCPCTL, misccpctl);
- 
-+out:
- 	mutex_unlock(&drm_dev->struct_mutex);
- 
--	return i;
-+	return count;
- }
- 
- static ssize_t
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0880-drm-i915-Add-second-slice-l3-remapping.patch b/patches.baytrail/0880-drm-i915-Add-second-slice-l3-remapping.patch
deleted file mode 100644
index 729bbf261a52b..0000000000000
--- a/patches.baytrail/0880-drm-i915-Add-second-slice-l3-remapping.patch
+++ /dev/null
@@ -1,464 +0,0 @@
-From 4c71e663d3eaf3c798e034bdc96e5cb63dd996c9 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <benjamin.widawsky@intel.com>
-Date: Thu, 19 Sep 2013 11:13:41 -0700
-Subject: drm/i915: Add second slice l3 remapping
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Certain HSW SKUs have a second bank of L3. This L3 remapping has a
-separate register set, and interrupt from the first "slice". A slice is
-simply a term to define some subset of the GPU's l3 cache. This patch
-implements both the interrupt handler, and ability to communicate with
-userspace about this second slice.
-
-v2:  Remove redundant check about non-existent slice.
-Change warning about interrupts of unknown slices to WARN_ON_ONCE
-Handle the case where we get 2 slice interrupts concurrently, and switch
-the tracking of interrupts to be non-destructive (all Ville)
-Don't enable/mask the second slice parity interrupt for ivb/vlv (even
-though all docs I can find claim it's rsvd) (Ville + Bryan)
-Keep BYT excluded from L3 parity
-
-v3: Fix the slice = ffs to be decremented by one (found by Ville). When
-I initially did my testing on the series, I was using 1-based slice
-counting, so this code was correct. Not sure why my simpler tests that
-I've been running since then didn't pick it up sooner.
-
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 35a85ac60618521d41cfdb14f3fbfc8ad7329e9e)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h         |    7 +-
- drivers/gpu/drm/i915/i915_gem.c         |   26 ++++-----
- drivers/gpu/drm/i915/i915_irq.c         |   91 ++++++++++++++++++++------------
- drivers/gpu/drm/i915/i915_reg.h         |    7 ++
- drivers/gpu/drm/i915/i915_sysfs.c       |   34 +++++++++--
- drivers/gpu/drm/i915/intel_ringbuffer.c |    7 +-
- include/uapi/drm/i915_drm.h             |    8 +-
- 7 files changed, 118 insertions(+), 62 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -917,9 +917,11 @@ struct i915_ums_state {
- 	int mm_suspended;
- };
- 
-+#define MAX_L3_SLICES 2
- struct intel_l3_parity {
--	u32 *remap_info;
-+	u32 *remap_info[MAX_L3_SLICES];
- 	struct work_struct error_work;
-+	int which_slice;
- };
- 
- struct i915_gem_mm {
-@@ -1686,6 +1688,7 @@ struct drm_i915_file_private {
- #define HAS_FORCE_WAKE(dev) (INTEL_INFO(dev)->has_force_wake)
- 
- #define HAS_L3_GPU_CACHE(dev) (IS_IVYBRIDGE(dev) || IS_HASWELL(dev))
-+#define NUM_L3_SLICES(dev) (IS_HSW_GT3(dev) ? 2 : HAS_L3_GPU_CACHE(dev))
- 
- #define GT_FREQUENCY_MULTIPLIER 50
- 
-@@ -1946,7 +1949,7 @@ bool i915_gem_clflush_object(struct drm_
- int __must_check i915_gem_object_finish_gpu(struct drm_i915_gem_object *obj);
- int __must_check i915_gem_init(struct drm_device *dev);
- int __must_check i915_gem_init_hw(struct drm_device *dev);
--void i915_gem_l3_remap(struct drm_device *dev);
-+void i915_gem_l3_remap(struct drm_device *dev, int slice);
- void i915_gem_init_swizzling(struct drm_device *dev);
- void i915_gem_cleanup_ringbuffer(struct drm_device *dev);
- int __must_check i915_gpu_idle(struct drm_device *dev);
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -4252,16 +4252,15 @@ i915_gem_idle(struct drm_device *dev)
- 	return 0;
- }
- 
--void i915_gem_l3_remap(struct drm_device *dev)
-+void i915_gem_l3_remap(struct drm_device *dev, int slice)
- {
- 	drm_i915_private_t *dev_priv = dev->dev_private;
-+	u32 reg_base = GEN7_L3LOG_BASE + (slice * 0x200);
-+	u32 *remap_info = dev_priv->l3_parity.remap_info[slice];
- 	u32 misccpctl;
- 	int i;
- 
--	if (!HAS_L3_GPU_CACHE(dev))
--		return;
--
--	if (!dev_priv->l3_parity.remap_info)
-+	if (!HAS_L3_GPU_CACHE(dev) || !remap_info)
- 		return;
- 
- 	misccpctl = I915_READ(GEN7_MISCCPCTL);
-@@ -4269,17 +4268,17 @@ void i915_gem_l3_remap(struct drm_device
- 	POSTING_READ(GEN7_MISCCPCTL);
- 
- 	for (i = 0; i < GEN7_L3LOG_SIZE; i += 4) {
--		u32 remap = I915_READ(GEN7_L3LOG_BASE + i);
--		if (remap && remap != dev_priv->l3_parity.remap_info[i/4])
-+		u32 remap = I915_READ(reg_base + i);
-+		if (remap && remap != remap_info[i/4])
- 			DRM_DEBUG("0x%x was already programmed to %x\n",
--				  GEN7_L3LOG_BASE + i, remap);
--		if (remap && !dev_priv->l3_parity.remap_info[i/4])
-+				  reg_base + i, remap);
-+		if (remap && !remap_info[i/4])
- 			DRM_DEBUG_DRIVER("Clearing remapped register\n");
--		I915_WRITE(GEN7_L3LOG_BASE + i, dev_priv->l3_parity.remap_info[i/4]);
-+		I915_WRITE(reg_base + i, remap_info[i/4]);
- 	}
- 
- 	/* Make sure all the writes land before disabling dop clock gating */
--	POSTING_READ(GEN7_L3LOG_BASE);
-+	POSTING_READ(reg_base);
- 
- 	I915_WRITE(GEN7_MISCCPCTL, misccpctl);
- }
-@@ -4373,7 +4372,7 @@ int
- i915_gem_init_hw(struct drm_device *dev)
- {
- 	drm_i915_private_t *dev_priv = dev->dev_private;
--	int ret;
-+	int ret, i;
- 
- 	if (INTEL_INFO(dev)->gen < 6 && !intel_enable_gtt())
- 		return -EIO;
-@@ -4392,7 +4391,8 @@ i915_gem_init_hw(struct drm_device *dev)
- 		I915_WRITE(GEN7_MSG_CTL, temp);
- 	}
- 
--	i915_gem_l3_remap(dev);
-+	for (i = 0; i < NUM_L3_SLICES(dev); i++)
-+		i915_gem_l3_remap(dev, i);
- 
- 	i915_gem_init_swizzling(dev);
- 
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -888,9 +888,10 @@ static void ivybridge_parity_work(struct
- 	drm_i915_private_t *dev_priv = container_of(work, drm_i915_private_t,
- 						    l3_parity.error_work);
- 	u32 error_status, row, bank, subbank;
--	char *parity_event[5];
-+	char *parity_event[6];
- 	uint32_t misccpctl;
- 	unsigned long flags;
-+	uint8_t slice = 0;
- 
- 	/* We must turn off DOP level clock gating to access the L3 registers.
- 	 * In order to prevent a get/put style interface, acquire struct mutex
-@@ -898,45 +899,64 @@ static void ivybridge_parity_work(struct
- 	 */
- 	mutex_lock(&dev_priv->dev->struct_mutex);
- 
-+	/* If we've screwed up tracking, just let the interrupt fire again */
-+	if (WARN_ON(!dev_priv->l3_parity.which_slice))
-+		goto out;
-+
- 	misccpctl = I915_READ(GEN7_MISCCPCTL);
- 	I915_WRITE(GEN7_MISCCPCTL, misccpctl & ~GEN7_DOP_CLOCK_GATE_ENABLE);
- 	POSTING_READ(GEN7_MISCCPCTL);
- 
--	error_status = I915_READ(GEN7_L3CDERRST1);
--	row = GEN7_PARITY_ERROR_ROW(error_status);
--	bank = GEN7_PARITY_ERROR_BANK(error_status);
--	subbank = GEN7_PARITY_ERROR_SUBBANK(error_status);
--
--	I915_WRITE(GEN7_L3CDERRST1, GEN7_PARITY_ERROR_VALID |
--				    GEN7_L3CDERRST1_ENABLE);
--	POSTING_READ(GEN7_L3CDERRST1);
-+	while ((slice = ffs(dev_priv->l3_parity.which_slice)) != 0) {
-+		u32 reg;
- 
--	I915_WRITE(GEN7_MISCCPCTL, misccpctl);
-+		slice--;
-+		if (WARN_ON_ONCE(slice >= NUM_L3_SLICES(dev_priv->dev)))
-+			break;
- 
--	spin_lock_irqsave(&dev_priv->irq_lock, flags);
--	ilk_enable_gt_irq(dev_priv, GT_RENDER_L3_PARITY_ERROR_INTERRUPT);
--	spin_unlock_irqrestore(&dev_priv->irq_lock, flags);
-+		dev_priv->l3_parity.which_slice &= ~(1<<slice);
- 
--	mutex_unlock(&dev_priv->dev->struct_mutex);
-+		reg = GEN7_L3CDERRST1 + (slice * 0x200);
- 
--	parity_event[0] = I915_L3_PARITY_UEVENT "=1";
--	parity_event[1] = kasprintf(GFP_KERNEL, "ROW=%d", row);
--	parity_event[2] = kasprintf(GFP_KERNEL, "BANK=%d", bank);
--	parity_event[3] = kasprintf(GFP_KERNEL, "SUBBANK=%d", subbank);
--	parity_event[4] = NULL;
-+		error_status = I915_READ(reg);
-+		row = GEN7_PARITY_ERROR_ROW(error_status);
-+		bank = GEN7_PARITY_ERROR_BANK(error_status);
-+		subbank = GEN7_PARITY_ERROR_SUBBANK(error_status);
-+
-+		I915_WRITE(reg, GEN7_PARITY_ERROR_VALID | GEN7_L3CDERRST1_ENABLE);
-+		POSTING_READ(reg);
-+
-+		parity_event[0] = I915_L3_PARITY_UEVENT "=1";
-+		parity_event[1] = kasprintf(GFP_KERNEL, "ROW=%d", row);
-+		parity_event[2] = kasprintf(GFP_KERNEL, "BANK=%d", bank);
-+		parity_event[3] = kasprintf(GFP_KERNEL, "SUBBANK=%d", subbank);
-+		parity_event[4] = kasprintf(GFP_KERNEL, "SLICE=%d", slice);
-+		parity_event[5] = NULL;
-+
-+		kobject_uevent_env(&dev_priv->dev->primary->kdev.kobj,
-+				   KOBJ_CHANGE, parity_event);
-+
-+		DRM_DEBUG("Parity error: Slice = %d, Row = %d, Bank = %d, Sub bank = %d.\n",
-+			  slice, row, bank, subbank);
-+
-+		kfree(parity_event[4]);
-+		kfree(parity_event[3]);
-+		kfree(parity_event[2]);
-+		kfree(parity_event[1]);
-+	}
- 
--	kobject_uevent_env(&dev_priv->dev->primary->kdev.kobj,
--			   KOBJ_CHANGE, parity_event);
-+	I915_WRITE(GEN7_MISCCPCTL, misccpctl);
- 
--	DRM_DEBUG("Parity error: Row = %d, Bank = %d, Sub bank = %d.\n",
--		  row, bank, subbank);
-+out:
-+	WARN_ON(dev_priv->l3_parity.which_slice);
-+	spin_lock_irqsave(&dev_priv->irq_lock, flags);
-+	ilk_enable_gt_irq(dev_priv, GT_PARITY_ERROR(dev_priv->dev));
-+	spin_unlock_irqrestore(&dev_priv->irq_lock, flags);
- 
--	kfree(parity_event[3]);
--	kfree(parity_event[2]);
--	kfree(parity_event[1]);
-+	mutex_unlock(&dev_priv->dev->struct_mutex);
- }
- 
--static void ivybridge_parity_error_irq_handler(struct drm_device *dev)
-+static void ivybridge_parity_error_irq_handler(struct drm_device *dev, u32 iir)
- {
- 	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
- 
-@@ -944,9 +964,16 @@ static void ivybridge_parity_error_irq_h
- 		return;
- 
- 	spin_lock(&dev_priv->irq_lock);
--	ilk_disable_gt_irq(dev_priv, GT_RENDER_L3_PARITY_ERROR_INTERRUPT);
-+	ilk_disable_gt_irq(dev_priv, GT_PARITY_ERROR(dev));
- 	spin_unlock(&dev_priv->irq_lock);
- 
-+	iir &= GT_PARITY_ERROR(dev);
-+	if (iir & GT_RENDER_L3_PARITY_ERROR_INTERRUPT_S1)
-+		dev_priv->l3_parity.which_slice |= 1 << 1;
-+
-+	if (iir & GT_RENDER_L3_PARITY_ERROR_INTERRUPT)
-+		dev_priv->l3_parity.which_slice |= 1 << 0;
-+
- 	queue_work(dev_priv->wq, &dev_priv->l3_parity.error_work);
- }
- 
-@@ -981,8 +1008,8 @@ static void snb_gt_irq_handler(struct dr
- 		i915_handle_error(dev, false);
- 	}
- 
--	if (gt_iir & GT_RENDER_L3_PARITY_ERROR_INTERRUPT)
--		ivybridge_parity_error_irq_handler(dev);
-+	if (gt_iir & GT_PARITY_ERROR(dev))
-+		ivybridge_parity_error_irq_handler(dev, gt_iir);
- }
- 
- #define HPD_STORM_DETECT_PERIOD 1000
-@@ -2267,8 +2294,8 @@ static void gen5_gt_irq_postinstall(stru
- 	dev_priv->gt_irq_mask = ~0;
- 	if (HAS_L3_GPU_CACHE(dev)) {
- 		/* L3 parity interrupt is always unmasked. */
--		dev_priv->gt_irq_mask = ~GT_RENDER_L3_PARITY_ERROR_INTERRUPT;
--		gt_irqs |= GT_RENDER_L3_PARITY_ERROR_INTERRUPT;
-+		dev_priv->gt_irq_mask = ~GT_PARITY_ERROR(dev);
-+		gt_irqs |= GT_PARITY_ERROR(dev);
- 	}
- 
- 	gt_irqs |= GT_RENDER_USER_INTERRUPT;
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -927,6 +927,7 @@
- #define GT_BLT_USER_INTERRUPT			(1 << 22)
- #define GT_BSD_CS_ERROR_INTERRUPT		(1 << 15)
- #define GT_BSD_USER_INTERRUPT			(1 << 12)
-+#define GT_RENDER_L3_PARITY_ERROR_INTERRUPT_S1	(1 << 11) /* hsw+; rsvd on snb, ivb, vlv */
- #define GT_RENDER_L3_PARITY_ERROR_INTERRUPT	(1 <<  5) /* !snb */
- #define GT_RENDER_PIPECTL_NOTIFY_INTERRUPT	(1 <<  4)
- #define GT_RENDER_CS_MASTER_ERROR_INTERRUPT	(1 <<  3)
-@@ -937,6 +938,10 @@
- #define PM_VEBOX_CS_ERROR_INTERRUPT		(1 << 12) /* hsw+ */
- #define PM_VEBOX_USER_INTERRUPT			(1 << 10) /* hsw+ */
- 
-+#define GT_PARITY_ERROR(dev) \
-+	(GT_RENDER_L3_PARITY_ERROR_INTERRUPT | \
-+	 IS_HASWELL(dev) ? GT_RENDER_L3_PARITY_ERROR_INTERRUPT_S1 : 0)
-+
- /* These are all the "old" interrupts */
- #define ILK_BSD_USER_INTERRUPT				(1<<5)
- #define I915_PIPE_CONTROL_NOTIFY_INTERRUPT		(1<<18)
-@@ -4751,6 +4756,7 @@
- 
- /* IVYBRIDGE DPF */
- #define GEN7_L3CDERRST1			0xB008 /* L3CD Error Status 1 */
-+#define HSW_L3CDERRST11			0xB208 /* L3CD Error Status register 1 slice 1 */
- #define   GEN7_L3CDERRST1_ROW_MASK	(0x7ff<<14)
- #define   GEN7_PARITY_ERROR_VALID	(1<<13)
- #define   GEN7_L3CDERRST1_BANK_MASK	(3<<11)
-@@ -4764,6 +4770,7 @@
- #define   GEN7_L3CDERRST1_ENABLE	(1<<7)
- 
- #define GEN7_L3LOG_BASE			0xB070
-+#define HSW_L3LOG_BASE_SLICE1		0xB270
- #define GEN7_L3LOG_SIZE			0x80
- 
- #define GEN7_HALF_SLICE_CHICKEN1	0xe100 /* IVB GT1 + VLV */
---- a/drivers/gpu/drm/i915/i915_sysfs.c
-+++ b/drivers/gpu/drm/i915/i915_sysfs.c
-@@ -119,6 +119,7 @@ i915_l3_read(struct file *filp, struct k
- 	struct drm_device *drm_dev = dminor->dev;
- 	struct drm_i915_private *dev_priv = drm_dev->dev_private;
- 	uint32_t misccpctl;
-+	int slice = (int)(uintptr_t)attr->private;
- 	int i, ret;
- 
- 	count = round_down(count, 4);
-@@ -134,9 +135,9 @@ i915_l3_read(struct file *filp, struct k
- 		return ret;
- 
- 	if (IS_HASWELL(drm_dev)) {
--		if (dev_priv->l3_parity.remap_info)
-+		if (dev_priv->l3_parity.remap_info[slice])
- 			memcpy(buf,
--			       dev_priv->l3_parity.remap_info + (offset/4),
-+			       dev_priv->l3_parity.remap_info[slice] + (offset/4),
- 			       count);
- 		else
- 			memset(buf, 0, count);
-@@ -168,6 +169,7 @@ i915_l3_write(struct file *filp, struct
- 	struct drm_device *drm_dev = dminor->dev;
- 	struct drm_i915_private *dev_priv = drm_dev->dev_private;
- 	u32 *temp = NULL; /* Just here to make handling failures easy */
-+	int slice = (int)(uintptr_t)attr->private;
- 	int ret;
- 
- 	ret = l3_access_valid(drm_dev, offset);
-@@ -178,7 +180,7 @@ i915_l3_write(struct file *filp, struct
- 	if (ret)
- 		return ret;
- 
--	if (!dev_priv->l3_parity.remap_info) {
-+	if (!dev_priv->l3_parity.remap_info[slice]) {
- 		temp = kzalloc(GEN7_L3LOG_SIZE, GFP_KERNEL);
- 		if (!temp) {
- 			mutex_unlock(&drm_dev->struct_mutex);
-@@ -198,11 +200,11 @@ i915_l3_write(struct file *filp, struct
- 	 * at this point it is left as a TODO.
- 	*/
- 	if (temp)
--		dev_priv->l3_parity.remap_info = temp;
-+		dev_priv->l3_parity.remap_info[slice] = temp;
- 
--	memcpy(dev_priv->l3_parity.remap_info + (offset/4), buf, count);
-+	memcpy(dev_priv->l3_parity.remap_info[slice] + (offset/4), buf, count);
- 
--	i915_gem_l3_remap(drm_dev);
-+	i915_gem_l3_remap(drm_dev, slice);
- 
- 	mutex_unlock(&drm_dev->struct_mutex);
- 
-@@ -214,7 +216,17 @@ static struct bin_attribute dpf_attrs =
- 	.size = GEN7_L3LOG_SIZE,
- 	.read = i915_l3_read,
- 	.write = i915_l3_write,
--	.mmap = NULL
-+	.mmap = NULL,
-+	.private = (void *)0
-+};
-+
-+static struct bin_attribute dpf_attrs_1 = {
-+	.attr = {.name = "l3_parity_slice_1", .mode = (S_IRUSR | S_IWUSR)},
-+	.size = GEN7_L3LOG_SIZE,
-+	.read = i915_l3_read,
-+	.write = i915_l3_write,
-+	.mmap = NULL,
-+	.private = (void *)1
- };
- 
- static ssize_t gt_cur_freq_mhz_show(struct device *kdev,
-@@ -525,6 +537,13 @@ void i915_setup_sysfs(struct drm_device
- 		ret = device_create_bin_file(&dev->primary->kdev, &dpf_attrs);
- 		if (ret)
- 			DRM_ERROR("l3 parity sysfs setup failed\n");
-+
-+		if (NUM_L3_SLICES(dev) > 1) {
-+			ret = device_create_bin_file(&dev->primary->kdev,
-+						     &dpf_attrs_1);
-+			if (ret)
-+				DRM_ERROR("l3 parity slice 1 setup failed\n");
-+		}
- 	}
- 
- 	ret = 0;
-@@ -548,6 +567,7 @@ void i915_teardown_sysfs(struct drm_devi
- 		sysfs_remove_files(&dev->primary->kdev.kobj, vlv_attrs);
- 	else
- 		sysfs_remove_files(&dev->primary->kdev.kobj, gen6_attrs);
-+	device_remove_bin_file(&dev->primary->kdev,  &dpf_attrs_1);
- 	device_remove_bin_file(&dev->primary->kdev,  &dpf_attrs);
- #ifdef CONFIG_PM
- 	sysfs_unmerge_group(&dev->primary->kdev.kobj, &rc6_attr_group);
---- a/drivers/gpu/drm/i915/intel_ringbuffer.c
-+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
-@@ -570,7 +570,7 @@ static int init_render_ring(struct intel
- 		I915_WRITE(INSTPM, _MASKED_BIT_ENABLE(INSTPM_FORCE_ORDERING));
- 
- 	if (HAS_L3_GPU_CACHE(dev))
--		I915_WRITE_IMR(ring, ~GT_RENDER_L3_PARITY_ERROR_INTERRUPT);
-+		I915_WRITE_IMR(ring, ~GT_PARITY_ERROR(dev));
- 
- 	return ret;
- }
-@@ -1000,7 +1000,7 @@ gen6_ring_get_irq(struct intel_ring_buff
- 		if (HAS_L3_GPU_CACHE(dev) && ring->id == RCS)
- 			I915_WRITE_IMR(ring,
- 				       ~(ring->irq_enable_mask |
--					 GT_RENDER_L3_PARITY_ERROR_INTERRUPT));
-+					 GT_PARITY_ERROR(dev)));
- 		else
- 			I915_WRITE_IMR(ring, ~ring->irq_enable_mask);
- 		ilk_enable_gt_irq(dev_priv, ring->irq_enable_mask);
-@@ -1020,8 +1020,7 @@ gen6_ring_put_irq(struct intel_ring_buff
- 	spin_lock_irqsave(&dev_priv->irq_lock, flags);
- 	if (--ring->irq_refcount == 0) {
- 		if (HAS_L3_GPU_CACHE(dev) && ring->id == RCS)
--			I915_WRITE_IMR(ring,
--				       ~GT_RENDER_L3_PARITY_ERROR_INTERRUPT);
-+			I915_WRITE_IMR(ring, ~GT_PARITY_ERROR(dev));
- 		else
- 			I915_WRITE_IMR(ring, ~0);
- 		ilk_disable_gt_irq(dev_priv, ring->irq_enable_mask);
---- a/include/uapi/drm/i915_drm.h
-+++ b/include/uapi/drm/i915_drm.h
-@@ -38,10 +38,10 @@
-  *
-  * I915_L3_PARITY_UEVENT - Generated when the driver receives a parity mismatch
-  *	event from the gpu l3 cache. Additional information supplied is ROW,
-- *	BANK, SUBBANK of the affected cacheline. Userspace should keep track of
-- *	these events and if a specific cache-line seems to have a persistent
-- *	error remap it with the l3 remapping tool supplied in intel-gpu-tools.
-- *	The value supplied with the event is always 1.
-+ *	BANK, SUBBANK, SLICE of the affected cacheline. Userspace should keep
-+ *	track of these events and if a specific cache-line seems to have a
-+ *	persistent error remap it with the l3 remapping tool supplied in
-+ *	intel-gpu-tools.  The value supplied with the event is always 1.
-  *
-  * I915_ERROR_UEVENT - Generated upon error detection, currently only via
-  *	hangcheck. The error detection event is a good indicator of when things
diff --git a/patches.baytrail/0881-drm-i915-Make-l3-remapping-use-the-ring.patch b/patches.baytrail/0881-drm-i915-Make-l3-remapping-use-the-ring.patch
deleted file mode 100644
index 5cdb883cf903c..0000000000000
--- a/patches.baytrail/0881-drm-i915-Make-l3-remapping-use-the-ring.patch
+++ /dev/null
@@ -1,138 +0,0 @@
-From 3233af408e804840627ed140da63863b0b0f8e38 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <benjamin.widawsky@intel.com>
-Date: Tue, 17 Sep 2013 21:12:44 -0700
-Subject: drm/i915: Make l3 remapping use the ring
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Using LRI for setting the remapping registers allows us to stream l3
-remapping information. This is necessary to handle per context remaps as
-we'll see implemented in an upcoming patch.
-
-Using the ring also means we don't need to frob the DOP clock gating
-bits.
-
-v2: Add comment about lack of worry for concurrent register access
-(Daniel)
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-[danvet: Bikeshed the comment a bit by doing a s/XXX/Note - there's
-nothing to fix.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit c3787e2eac816a597a7f92daa5d0629a85e77d56)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h   |  2 +-
- drivers/gpu/drm/i915/i915_gem.c   | 40 +++++++++++++++++++--------------------
- drivers/gpu/drm/i915/i915_sysfs.c |  3 ++-
- 3 files changed, 23 insertions(+), 22 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index c6e8df737566..0c39805b881e 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1949,7 +1949,7 @@ bool i915_gem_clflush_object(struct drm_i915_gem_object *obj, bool force);
- int __must_check i915_gem_object_finish_gpu(struct drm_i915_gem_object *obj);
- int __must_check i915_gem_init(struct drm_device *dev);
- int __must_check i915_gem_init_hw(struct drm_device *dev);
--void i915_gem_l3_remap(struct drm_device *dev, int slice);
-+int i915_gem_l3_remap(struct intel_ring_buffer *ring, int slice);
- void i915_gem_init_swizzling(struct drm_device *dev);
- void i915_gem_cleanup_ringbuffer(struct drm_device *dev);
- int __must_check i915_gpu_idle(struct drm_device *dev);
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index 66bf75dce783..778b33a5df6c 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -4252,35 +4252,35 @@ i915_gem_idle(struct drm_device *dev)
- 	return 0;
- }
- 
--void i915_gem_l3_remap(struct drm_device *dev, int slice)
-+int i915_gem_l3_remap(struct intel_ring_buffer *ring, int slice)
- {
-+	struct drm_device *dev = ring->dev;
- 	drm_i915_private_t *dev_priv = dev->dev_private;
- 	u32 reg_base = GEN7_L3LOG_BASE + (slice * 0x200);
- 	u32 *remap_info = dev_priv->l3_parity.remap_info[slice];
--	u32 misccpctl;
--	int i;
-+	int i, ret;
- 
- 	if (!HAS_L3_GPU_CACHE(dev) || !remap_info)
--		return;
-+		return 0;
- 
--	misccpctl = I915_READ(GEN7_MISCCPCTL);
--	I915_WRITE(GEN7_MISCCPCTL, misccpctl & ~GEN7_DOP_CLOCK_GATE_ENABLE);
--	POSTING_READ(GEN7_MISCCPCTL);
-+	ret = intel_ring_begin(ring, GEN7_L3LOG_SIZE / 4 * 3);
-+	if (ret)
-+		return ret;
- 
-+	/*
-+	 * Note: We do not worry about the concurrent register cacheline hang
-+	 * here because no other code should access these registers other than
-+	 * at initialization time.
-+	 */
- 	for (i = 0; i < GEN7_L3LOG_SIZE; i += 4) {
--		u32 remap = I915_READ(reg_base + i);
--		if (remap && remap != remap_info[i/4])
--			DRM_DEBUG("0x%x was already programmed to %x\n",
--				  reg_base + i, remap);
--		if (remap && !remap_info[i/4])
--			DRM_DEBUG_DRIVER("Clearing remapped register\n");
--		I915_WRITE(reg_base + i, remap_info[i/4]);
-+		intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1));
-+		intel_ring_emit(ring, reg_base + i);
-+		intel_ring_emit(ring, remap_info[i/4]);
- 	}
- 
--	/* Make sure all the writes land before disabling dop clock gating */
--	POSTING_READ(reg_base);
-+	intel_ring_advance(ring);
- 
--	I915_WRITE(GEN7_MISCCPCTL, misccpctl);
-+	return ret;
- }
- 
- void i915_gem_init_swizzling(struct drm_device *dev)
-@@ -4391,15 +4391,15 @@ i915_gem_init_hw(struct drm_device *dev)
- 		I915_WRITE(GEN7_MSG_CTL, temp);
- 	}
- 
--	for (i = 0; i < NUM_L3_SLICES(dev); i++)
--		i915_gem_l3_remap(dev, i);
--
- 	i915_gem_init_swizzling(dev);
- 
- 	ret = i915_gem_init_rings(dev);
- 	if (ret)
- 		return ret;
- 
-+	for (i = 0; i < NUM_L3_SLICES(dev); i++)
-+		i915_gem_l3_remap(&dev_priv->ring[RCS], i);
-+
- 	/*
- 	 * XXX: There was some w/a described somewhere suggesting loading
- 	 * contexts before PPGTT.
-diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c
-index 3a8bf0c9b5ce..b07bdfb8892d 100644
---- a/drivers/gpu/drm/i915/i915_sysfs.c
-+++ b/drivers/gpu/drm/i915/i915_sysfs.c
-@@ -204,7 +204,8 @@ i915_l3_write(struct file *filp, struct kobject *kobj,
- 
- 	memcpy(dev_priv->l3_parity.remap_info[slice] + (offset/4), buf, count);
- 
--	i915_gem_l3_remap(drm_dev, slice);
-+	if (i915_gem_l3_remap(&dev_priv->ring[RCS], slice))
-+		count = 0;
- 
- 	mutex_unlock(&drm_dev->struct_mutex);
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0882-drm-i915-Keep-a-list-of-all-contexts.patch b/patches.baytrail/0882-drm-i915-Keep-a-list-of-all-contexts.patch
deleted file mode 100644
index 14ccd04e40af1..0000000000000
--- a/patches.baytrail/0882-drm-i915-Keep-a-list-of-all-contexts.patch
+++ /dev/null
@@ -1,128 +0,0 @@
-From e3f8b29a099609a1cc6d673b1cc96b7fa27f5ec3 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <benjamin.widawsky@intel.com>
-Date: Tue, 17 Sep 2013 21:12:45 -0700
-Subject: drm/i915: Keep a list of all contexts
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-I have implemented this patch before without creating a separate list
-(I'm having trouble finding the links, but the messages ids are:
-<1364942743-6041-2-git-send-email-ben@bwidawsk.net>
-<1365118914-15753-9-git-send-email-ben@bwidawsk.net>)
-
-However, the code is much simpler to just use a list and it makes the
-code from the next patch a lot more pretty.
-
-As you'll see in the next patch, the reason for this is to be able to
-specify when a context needs to get L3 remapping. More details there.
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit a33afea5ff6e5b87ac11c87fb60b3704b3ac0fcc)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_debugfs.c     | 15 +++++++++------
- drivers/gpu/drm/i915/i915_drv.h         |  3 +++
- drivers/gpu/drm/i915/i915_gem.c         |  1 +
- drivers/gpu/drm/i915/i915_gem_context.c |  3 +++
- 4 files changed, 16 insertions(+), 6 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
-index 1d776243bf55..ada095023dad 100644
---- a/drivers/gpu/drm/i915/i915_debugfs.c
-+++ b/drivers/gpu/drm/i915/i915_debugfs.c
-@@ -1442,6 +1442,7 @@ static int i915_context_status(struct seq_file *m, void *unused)
- 	struct drm_device *dev = node->minor->dev;
- 	drm_i915_private_t *dev_priv = dev->dev_private;
- 	struct intel_ring_buffer *ring;
-+	struct i915_hw_context *ctx;
- 	int ret, i;
- 
- 	ret = mutex_lock_interruptible(&dev->mode_config.mutex);
-@@ -1460,12 +1461,14 @@ static int i915_context_status(struct seq_file *m, void *unused)
- 		seq_putc(m, '\n');
- 	}
- 
--	for_each_ring(ring, dev_priv, i) {
--		if (ring->default_context) {
--			seq_printf(m, "HW default context %s ", ring->name);
--			describe_obj(m, ring->default_context->obj);
--			seq_putc(m, '\n');
--		}
-+	list_for_each_entry(ctx, &dev_priv->context_list, link) {
-+		seq_puts(m, "HW context ");
-+		for_each_ring(ring, dev_priv, i)
-+			if (ring->default_context == ctx)
-+				seq_printf(m, "(default context %s) ", ring->name);
-+
-+		describe_obj(m, ctx->obj);
-+		seq_putc(m, '\n');
- 	}
- 
- 	mutex_unlock(&dev->mode_config.mutex);
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 0c39805b881e..179592762537 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -605,6 +605,8 @@ struct i915_hw_context {
- 	struct intel_ring_buffer *ring;
- 	struct drm_i915_gem_object *obj;
- 	struct i915_ctx_hang_stats hang_stats;
-+
-+	struct list_head link;
- };
- 
- struct i915_fbc {
-@@ -1343,6 +1345,7 @@ typedef struct drm_i915_private {
- 
- 	bool hw_contexts_disabled;
- 	uint32_t hw_context_size;
-+	struct list_head context_list;
- 
- 	u32 fdi_rx_config;
- 
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index 778b33a5df6c..53f0ad70dd71 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -4571,6 +4571,7 @@ i915_gem_load(struct drm_device *dev)
- 	INIT_LIST_HEAD(&dev_priv->vm_list);
- 	i915_init_vm(dev_priv, &dev_priv->gtt.base);
- 
-+	INIT_LIST_HEAD(&dev_priv->context_list);
- 	INIT_LIST_HEAD(&dev_priv->mm.unbound_list);
- 	INIT_LIST_HEAD(&dev_priv->mm.bound_list);
- 	INIT_LIST_HEAD(&dev_priv->mm.fence_list);
-diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
-index 26c3fccc9599..2bbdce821ac3 100644
---- a/drivers/gpu/drm/i915/i915_gem_context.c
-+++ b/drivers/gpu/drm/i915/i915_gem_context.c
-@@ -129,6 +129,7 @@ void i915_gem_context_free(struct kref *ctx_ref)
- 	struct i915_hw_context *ctx = container_of(ctx_ref,
- 						   typeof(*ctx), ref);
- 
-+	list_del(&ctx->link);
- 	drm_gem_object_unreference(&ctx->obj->base);
- 	kfree(ctx);
- }
-@@ -147,6 +148,7 @@ create_hw_context(struct drm_device *dev,
- 
- 	kref_init(&ctx->ref);
- 	ctx->obj = i915_gem_alloc_object(dev, dev_priv->hw_context_size);
-+	INIT_LIST_HEAD(&ctx->link);
- 	if (ctx->obj == NULL) {
- 		kfree(ctx);
- 		DRM_DEBUG_DRIVER("Context object allocated failed\n");
-@@ -166,6 +168,7 @@ create_hw_context(struct drm_device *dev,
- 	 * assertion in the context switch code.
- 	 */
- 	ctx->ring = &dev_priv->ring[RCS];
-+	list_add_tail(&ctx->link, &dev_priv->context_list);
- 
- 	/* Default context will never have a file_priv */
- 	if (file_priv == NULL)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0883-drm-i915-Do-remaps-for-all-contexts.patch b/patches.baytrail/0883-drm-i915-Do-remaps-for-all-contexts.patch
deleted file mode 100644
index 8377d3df2828b..0000000000000
--- a/patches.baytrail/0883-drm-i915-Do-remaps-for-all-contexts.patch
+++ /dev/null
@@ -1,214 +0,0 @@
-From 8384cdd8b83af2a6b432a2fd4f56459a3c316329 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <benjamin.widawsky@intel.com>
-Date: Wed, 18 Sep 2013 19:03:18 -0700
-Subject: drm/i915: Do remaps for all contexts
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-On both Ivybridge and Haswell, row remapping information is saved and
-restored with context. This means, we never actually properly supported
-the l3 remapping because our sysfs interface is asynchronous (and not
-tied to any context), and the known faulty HW would be reused by the
-next context to run.
-
-Not that due to the asynchronous nature of the sysfs entry, there is no
-point modifying the registers for the existing context. Instead we set a
-flag for all contexts to load the correct remapping information on the
-next run. Interested clients can use debugfs to determine whether or not
-the row has been remapped.
-
-One could propose at this point that we just do the remapping in the
-kernel. I guess since we have to maintain the sysfs interface anyway,
-I'm not sure how useful it is, and I do like keeping the policy in
-userspace; (it wasn't my original decision to make the
-interface the way it is, so I'm not attached).
-
-v2: Force a context switch when we have a remap on the next switch.
-(Ville)
-Don't let userspace use the interface with disabled contexts.
-
-v3: Don't force a context switch, just let it nop
-Improper context slice remap initialization, 1<<1 instead of 1<<i, but I
-rewrote it to avoid a second round of confusion.
-Error print moved to error path (All Ville)
-Added a comment on why the slice remap initialization happens.
-
-CC: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 3ccfd19dea7c5c85aa4b1f929a97a02b026ab356)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_debugfs.c     |    8 ++++++
- drivers/gpu/drm/i915/i915_drv.h         |    1 
- drivers/gpu/drm/i915/i915_gem_context.c |   22 +++++++++++++++----
- drivers/gpu/drm/i915/i915_sysfs.c       |   37 ++++++++++++--------------------
- 4 files changed, 41 insertions(+), 27 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_debugfs.c
-+++ b/drivers/gpu/drm/i915/i915_debugfs.c
-@@ -145,6 +145,13 @@ describe_obj(struct seq_file *m, struct
- 		seq_printf(m, " (%s)", obj->ring->name);
- }
- 
-+static void describe_ctx(struct seq_file *m, struct i915_hw_context *ctx)
-+{
-+	seq_putc(m, ctx->is_initialized ? 'I' : 'i');
-+	seq_putc(m, ctx->remap_slice ? 'R' : 'r');
-+	seq_putc(m, ' ');
-+}
-+
- static int i915_gem_object_list_info(struct seq_file *m, void *data)
- {
- 	struct drm_info_node *node = (struct drm_info_node *) m->private;
-@@ -1463,6 +1470,7 @@ static int i915_context_status(struct se
- 
- 	list_for_each_entry(ctx, &dev_priv->context_list, link) {
- 		seq_puts(m, "HW context ");
-+		describe_ctx(m, ctx);
- 		for_each_ring(ring, dev_priv, i)
- 			if (ring->default_context == ctx)
- 				seq_printf(m, "(default context %s) ", ring->name);
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -601,6 +601,7 @@ struct i915_hw_context {
- 	struct kref ref;
- 	int id;
- 	bool is_initialized;
-+	uint8_t remap_slice;
- 	struct drm_i915_file_private *file_priv;
- 	struct intel_ring_buffer *ring;
- 	struct drm_i915_gem_object *obj;
---- a/drivers/gpu/drm/i915/i915_gem_context.c
-+++ b/drivers/gpu/drm/i915/i915_gem_context.c
-@@ -181,6 +181,10 @@ create_hw_context(struct drm_device *dev
- 
- 	ctx->file_priv = file_priv;
- 	ctx->id = ret;
-+	/* NB: Mark all slices as needing a remap so that when the context first
-+	 * loads it will restore whatever remap state already exists. If there
-+	 * is no remap info, it will be a NOP. */
-+	ctx->remap_slice = (1 << NUM_L3_SLICES(dev)) - 1;
- 
- 	return ctx;
- 
-@@ -394,11 +398,11 @@ static int do_switch(struct i915_hw_cont
- 	struct intel_ring_buffer *ring = to->ring;
- 	struct i915_hw_context *from = ring->last_context;
- 	u32 hw_flags = 0;
--	int ret;
-+	int ret, i;
- 
- 	BUG_ON(from != NULL && from->obj != NULL && from->obj->pin_count == 0);
- 
--	if (from == to)
-+	if (from == to && !to->remap_slice)
- 		return 0;
- 
- 	ret = i915_gem_obj_ggtt_pin(to->obj, CONTEXT_ALIGN, false, false);
-@@ -421,8 +425,6 @@ static int do_switch(struct i915_hw_cont
- 
- 	if (!to->is_initialized || is_default_context(to))
- 		hw_flags |= MI_RESTORE_INHIBIT;
--	else if (WARN_ON_ONCE(from == to)) /* not yet expected */
--		hw_flags |= MI_FORCE_RESTORE;
- 
- 	ret = mi_set_context(ring, to, hw_flags);
- 	if (ret) {
-@@ -430,6 +432,18 @@ static int do_switch(struct i915_hw_cont
- 		return ret;
- 	}
- 
-+	for (i = 0; i < MAX_L3_SLICES; i++) {
-+		if (!(to->remap_slice & (1<<i)))
-+			continue;
-+
-+		ret = i915_gem_l3_remap(ring, i);
-+		/* If it failed, try again next round */
-+		if (ret)
-+			DRM_DEBUG_DRIVER("L3 remapping failed\n");
-+		else
-+			to->remap_slice &= ~(1<<i);
-+	}
-+
- 	/* The backing object for the context is done after switching to the
- 	 * *next* context. Therefore we cannot retire the previous context until
- 	 * the next context has already started running. In fact, the below code
---- a/drivers/gpu/drm/i915/i915_sysfs.c
-+++ b/drivers/gpu/drm/i915/i915_sysfs.c
-@@ -118,9 +118,8 @@ i915_l3_read(struct file *filp, struct k
- 	struct drm_minor *dminor = container_of(dev, struct drm_minor, kdev);
- 	struct drm_device *drm_dev = dminor->dev;
- 	struct drm_i915_private *dev_priv = drm_dev->dev_private;
--	uint32_t misccpctl;
- 	int slice = (int)(uintptr_t)attr->private;
--	int i, ret;
-+	int ret;
- 
- 	count = round_down(count, 4);
- 
-@@ -134,26 +133,13 @@ i915_l3_read(struct file *filp, struct k
- 	if (ret)
- 		return ret;
- 
--	if (IS_HASWELL(drm_dev)) {
--		if (dev_priv->l3_parity.remap_info[slice])
--			memcpy(buf,
--			       dev_priv->l3_parity.remap_info[slice] + (offset/4),
--			       count);
--		else
--			memset(buf, 0, count);
--
--		goto out;
--	}
--
--	misccpctl = I915_READ(GEN7_MISCCPCTL);
--	I915_WRITE(GEN7_MISCCPCTL, misccpctl & ~GEN7_DOP_CLOCK_GATE_ENABLE);
-+	if (dev_priv->l3_parity.remap_info[slice])
-+		memcpy(buf,
-+		       dev_priv->l3_parity.remap_info[slice] + (offset/4),
-+		       count);
-+	else
-+		memset(buf, 0, count);
- 
--	for (i = 0; i < count; i += 4)
--		*((uint32_t *)(&buf[i])) = I915_READ(GEN7_L3LOG_BASE + offset + i);
--
--	I915_WRITE(GEN7_MISCCPCTL, misccpctl);
--
--out:
- 	mutex_unlock(&drm_dev->struct_mutex);
- 
- 	return count;
-@@ -168,6 +154,7 @@ i915_l3_write(struct file *filp, struct
- 	struct drm_minor *dminor = container_of(dev, struct drm_minor, kdev);
- 	struct drm_device *drm_dev = dminor->dev;
- 	struct drm_i915_private *dev_priv = drm_dev->dev_private;
-+	struct i915_hw_context *ctx;
- 	u32 *temp = NULL; /* Just here to make handling failures easy */
- 	int slice = (int)(uintptr_t)attr->private;
- 	int ret;
-@@ -176,6 +163,9 @@ i915_l3_write(struct file *filp, struct
- 	if (ret)
- 		return ret;
- 
-+	if (dev_priv->hw_contexts_disabled)
-+		return -ENXIO;
-+
- 	ret = i915_mutex_lock_interruptible(drm_dev);
- 	if (ret)
- 		return ret;
-@@ -204,8 +194,9 @@ i915_l3_write(struct file *filp, struct
- 
- 	memcpy(dev_priv->l3_parity.remap_info[slice] + (offset/4), buf, count);
- 
--	if (i915_gem_l3_remap(&dev_priv->ring[RCS], slice))
--		count = 0;
-+	/* NB: We defer the remapping until we switch to the context */
-+	list_for_each_entry(ctx, &dev_priv->context_list, link)
-+		ctx->remap_slice |= (1<<slice);
- 
- 	mutex_unlock(&drm_dev->struct_mutex);
- 
diff --git a/patches.baytrail/0884-drm-i915-s-HAS_L3_GPU_CACHE-HAS_L3_DPF.patch b/patches.baytrail/0884-drm-i915-s-HAS_L3_GPU_CACHE-HAS_L3_DPF.patch
deleted file mode 100644
index bc1cb27e9b0e2..0000000000000
--- a/patches.baytrail/0884-drm-i915-s-HAS_L3_GPU_CACHE-HAS_L3_DPF.patch
+++ /dev/null
@@ -1,137 +0,0 @@
-From 884d617f9b4fa01788f4e9e0a2bafac1d0f207c5 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <benjamin.widawsky@intel.com>
-Date: Thu, 19 Sep 2013 11:01:40 -0700
-Subject: drm/i915: s/HAS_L3_GPU_CACHE/HAS_L3_DPF
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-We'd only ever used this define to denote whether or not we have the
-dynamic parity feature (DPF) and never to determine whether or not L3
-exists. Baytrail is a good example of where L3 exists, and not DPF.
-
-This patch provides clarify in the code for future use cases which might
-want to actually query whether or not L3 exists.
-
-v2: Add /* DPF == dynamic parity feature */
-
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 040d2baa6229d50c406340035766c4e99725bf3d)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h         | 5 +++--
- drivers/gpu/drm/i915/i915_gem.c         | 2 +-
- drivers/gpu/drm/i915/i915_irq.c         | 4 ++--
- drivers/gpu/drm/i915/i915_sysfs.c       | 4 ++--
- drivers/gpu/drm/i915/intel_ringbuffer.c | 6 +++---
- 5 files changed, 11 insertions(+), 10 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 015df5264dcc..09a5c829168c 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1691,8 +1691,9 @@ struct drm_i915_file_private {
- 
- #define HAS_FORCE_WAKE(dev) (INTEL_INFO(dev)->has_force_wake)
- 
--#define HAS_L3_GPU_CACHE(dev) (IS_IVYBRIDGE(dev) || IS_HASWELL(dev))
--#define NUM_L3_SLICES(dev) (IS_HSW_GT3(dev) ? 2 : HAS_L3_GPU_CACHE(dev))
-+/* DPF == dynamic parity feature */
-+#define HAS_L3_DPF(dev) (IS_IVYBRIDGE(dev) || IS_HASWELL(dev))
-+#define NUM_L3_SLICES(dev) (IS_HSW_GT3(dev) ? 2 : HAS_L3_DPF(dev))
- 
- #define GT_FREQUENCY_MULTIPLIER 50
- 
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index 53f0ad70dd71..c12f44abb69a 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -4260,7 +4260,7 @@ int i915_gem_l3_remap(struct intel_ring_buffer *ring, int slice)
- 	u32 *remap_info = dev_priv->l3_parity.remap_info[slice];
- 	int i, ret;
- 
--	if (!HAS_L3_GPU_CACHE(dev) || !remap_info)
-+	if (!HAS_L3_DPF(dev) || !remap_info)
- 		return 0;
- 
- 	ret = intel_ring_begin(ring, GEN7_L3LOG_SIZE / 4 * 3);
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index 1c7f6abe0bc5..cfaf434010ae 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -960,7 +960,7 @@ static void ivybridge_parity_error_irq_handler(struct drm_device *dev, u32 iir)
- {
- 	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
- 
--	if (!HAS_L3_GPU_CACHE(dev))
-+	if (!HAS_L3_DPF(dev))
- 		return;
- 
- 	spin_lock(&dev_priv->irq_lock);
-@@ -2292,7 +2292,7 @@ static void gen5_gt_irq_postinstall(struct drm_device *dev)
- 	pm_irqs = gt_irqs = 0;
- 
- 	dev_priv->gt_irq_mask = ~0;
--	if (HAS_L3_GPU_CACHE(dev)) {
-+	if (HAS_L3_DPF(dev)) {
- 		/* L3 parity interrupt is always unmasked. */
- 		dev_priv->gt_irq_mask = ~GT_PARITY_ERROR(dev);
- 		gt_irqs |= GT_PARITY_ERROR(dev);
-diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c
-index deb8787308d6..7b4c79cdb39e 100644
---- a/drivers/gpu/drm/i915/i915_sysfs.c
-+++ b/drivers/gpu/drm/i915/i915_sysfs.c
-@@ -97,7 +97,7 @@ static struct attribute_group rc6_attr_group = {
- 
- static int l3_access_valid(struct drm_device *dev, loff_t offset)
- {
--	if (!HAS_L3_GPU_CACHE(dev))
-+	if (!HAS_L3_DPF(dev))
- 		return -EPERM;
- 
- 	if (offset % 4 != 0)
-@@ -525,7 +525,7 @@ void i915_setup_sysfs(struct drm_device *dev)
- 			DRM_ERROR("RC6 residency sysfs setup failed\n");
- 	}
- #endif
--	if (HAS_L3_GPU_CACHE(dev)) {
-+	if (HAS_L3_DPF(dev)) {
- 		ret = device_create_bin_file(&dev->primary->kdev, &dpf_attrs);
- 		if (ret)
- 			DRM_ERROR("l3 parity sysfs setup failed\n");
-diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
-index 958b7d8fea8b..b67104aaade5 100644
---- a/drivers/gpu/drm/i915/intel_ringbuffer.c
-+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
-@@ -569,7 +569,7 @@ static int init_render_ring(struct intel_ring_buffer *ring)
- 	if (INTEL_INFO(dev)->gen >= 6)
- 		I915_WRITE(INSTPM, _MASKED_BIT_ENABLE(INSTPM_FORCE_ORDERING));
- 
--	if (HAS_L3_GPU_CACHE(dev))
-+	if (HAS_L3_DPF(dev))
- 		I915_WRITE_IMR(ring, ~GT_PARITY_ERROR(dev));
- 
- 	return ret;
-@@ -997,7 +997,7 @@ gen6_ring_get_irq(struct intel_ring_buffer *ring)
- 
- 	spin_lock_irqsave(&dev_priv->irq_lock, flags);
- 	if (ring->irq_refcount++ == 0) {
--		if (HAS_L3_GPU_CACHE(dev) && ring->id == RCS)
-+		if (HAS_L3_DPF(dev) && ring->id == RCS)
- 			I915_WRITE_IMR(ring,
- 				       ~(ring->irq_enable_mask |
- 					 GT_PARITY_ERROR(dev)));
-@@ -1019,7 +1019,7 @@ gen6_ring_put_irq(struct intel_ring_buffer *ring)
- 
- 	spin_lock_irqsave(&dev_priv->irq_lock, flags);
- 	if (--ring->irq_refcount == 0) {
--		if (HAS_L3_GPU_CACHE(dev) && ring->id == RCS)
-+		if (HAS_L3_DPF(dev) && ring->id == RCS)
- 			I915_WRITE_IMR(ring, ~GT_PARITY_ERROR(dev));
- 		else
- 			I915_WRITE_IMR(ring, ~0);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0885-drm-i915-vlv-honor-i915_enable_rc6-boot-param-on-VLV.patch b/patches.baytrail/0885-drm-i915-vlv-honor-i915_enable_rc6-boot-param-on-VLV.patch
deleted file mode 100644
index 9c992442460fd..0000000000000
--- a/patches.baytrail/0885-drm-i915-vlv-honor-i915_enable_rc6-boot-param-on-VLV.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From 50ebf53e44b2a3deb77add013e981e326f090ef5 Mon Sep 17 00:00:00 2001
-From: Jesse Barnes <jbarnes@virtuousgeek.org>
-Date: Thu, 19 Sep 2013 09:33:13 -0700
-Subject: drm/i915/vlv: honor i915_enable_rc6 boot param on VLV
-
-Disabling it isn't really an option on these platforms, but having it
-available for power comparisons is useful.
-
-Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit a2b23fe04e183ef58ed45183e39dbc696f9600b1)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 7 ++++---
- 1 file changed, 4 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index db12c18e8040..ea66372f8851 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -3788,7 +3788,7 @@ static void valleyview_enable_rps(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct intel_ring_buffer *ring;
--	u32 gtfifodbg, val;
-+	u32 gtfifodbg, val, rc6_mode = 0;
- 	int i;
- 
- 	WARN_ON(!mutex_is_locked(&dev_priv->rps.hw_lock));
-@@ -3828,8 +3828,9 @@ static void valleyview_enable_rps(struct drm_device *dev)
- 
- 	/* allows RC6 residency counter to work */
- 	I915_WRITE(0x138104, _MASKED_BIT_ENABLE(0x3));
--	I915_WRITE(GEN6_RC_CONTROL,
--		   GEN7_RC_CTL_TO_MODE);
-+	if (intel_enable_rc6(dev) & INTEL_RC6_ENABLE)
-+		rc6_mode = GEN7_RC_CTL_TO_MODE;
-+	I915_WRITE(GEN6_RC_CONTROL, rc6_mode);
- 
- 	val = vlv_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS);
- 	switch ((val >> 6) & 3) {
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0886-drm-i915-vlv-disable-rc6p-and-rc6pp-residency-report.patch b/patches.baytrail/0886-drm-i915-vlv-disable-rc6p-and-rc6pp-residency-report.patch
deleted file mode 100644
index 904f53a9d15e1..0000000000000
--- a/patches.baytrail/0886-drm-i915-vlv-disable-rc6p-and-rc6pp-residency-report.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From 105f3cc3d97ece3b18f9fdd137b86950b664ca32 Mon Sep 17 00:00:00 2001
-From: Jesse Barnes <jbarnes@virtuousgeek.org>
-Date: Wed, 11 Sep 2013 13:43:20 -0700
-Subject: drm/i915/vlv: disable rc6p and rc6pp residency reporting on BYT
-
-Byt doesn't have rc6p and rc6pp support and even more important the
-the offsets of the residency registers there's something else. So Just
-return a constant 0 to avoid upsetting userspace tools like powertop.
-
-Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-[danvet: Explain a bit in the commit message what's going on.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 5ffd494b8e88250d922db91037b4df676cb679a2)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_sysfs.c | 4 ++++
- 1 file changed, 4 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c
-index 7b4c79cdb39e..176de441002c 100644
---- a/drivers/gpu/drm/i915/i915_sysfs.c
-+++ b/drivers/gpu/drm/i915/i915_sysfs.c
-@@ -65,6 +65,8 @@ show_rc6p_ms(struct device *kdev, struct device_attribute *attr, char *buf)
- {
- 	struct drm_minor *dminor = container_of(kdev, struct drm_minor, kdev);
- 	u32 rc6p_residency = calc_residency(dminor->dev, GEN6_GT_GFX_RC6p);
-+	if (IS_VALLEYVIEW(dminor->dev))
-+		rc6p_residency = 0;
- 	return snprintf(buf, PAGE_SIZE, "%u\n", rc6p_residency);
- }
- 
-@@ -73,6 +75,8 @@ show_rc6pp_ms(struct device *kdev, struct device_attribute *attr, char *buf)
- {
- 	struct drm_minor *dminor = container_of(kdev, struct drm_minor, kdev);
- 	u32 rc6pp_residency = calc_residency(dminor->dev, GEN6_GT_GFX_RC6pp);
-+	if (IS_VALLEYVIEW(dminor->dev))
-+		rc6pp_residency = 0;
- 	return snprintf(buf, PAGE_SIZE, "%u\n", rc6pp_residency);
- }
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0887-drm-i915-don-t-disable-ERR_INT-on-the-IRQ-handler.patch b/patches.baytrail/0887-drm-i915-don-t-disable-ERR_INT-on-the-IRQ-handler.patch
deleted file mode 100644
index 76c937e9025c5..0000000000000
--- a/patches.baytrail/0887-drm-i915-don-t-disable-ERR_INT-on-the-IRQ-handler.patch
+++ /dev/null
@@ -1,84 +0,0 @@
-From cc8ca4b073223cc758d437dd8026a1e7cddd4d6e Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Thu, 19 Sep 2013 17:00:36 -0300
-Subject: drm/i915: don't disable ERR_INT on the IRQ handler
-
-We currently disable the ERR_INT interrupts while running the IRQ
-handler because we fear that if we do an unclaimed register access
-from inside the IRQ handler we'll keep triggering the IRQ handler
-forever.
-
-The problem is that since we always disable the ERR_INT interrupts at
-the IRQ handler, when we get a FIFO underrun we'll always print both
-messages:
-  - "uncleared fifo underrun on pipe A"
-  - "Pipe A FIFO underrun"
-
-Because the "was_enabled" variable from
-ivybridge_set_fifo_underrun_reporting will always be false (since we
-disable ERR int at the IRQ handler!).
-
-Instead of actually fixing ivybridge_set_fifo_underrun_reporting,
-let's just remove the "disable ERR_INT during the IRQ handler" code.
-As far as we know we shouldn't really be triggering ERR_INT interrupts
-from the IRQ handler, so if we ever get stuck in the endless loop of
-interrupts we can git-bisect and revert (and we can even bisect and
-revert this patch in case I'm just wrong). As a bonus, our IRQ handler
-is now simpler and a few nanoseconds faster.
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 6ceeeec04509ac40f91cfc8ffc129e22a136aafe)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 19 -------------------
- 1 file changed, 19 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index cfaf434010ae..b356dc15adda 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -1421,7 +1421,6 @@ static irqreturn_t ironlake_irq_handler(int irq, void *arg)
- 	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
- 	u32 de_iir, gt_iir, de_ier, sde_ier = 0;
- 	irqreturn_t ret = IRQ_NONE;
--	bool err_int_reenable = false;
- 
- 	atomic_inc(&dev_priv->irq_received);
- 
-@@ -1445,17 +1444,6 @@ static irqreturn_t ironlake_irq_handler(int irq, void *arg)
- 		POSTING_READ(SDEIER);
- 	}
- 
--	/* On Haswell, also mask ERR_INT because we don't want to risk
--	 * generating "unclaimed register" interrupts from inside the interrupt
--	 * handler. */
--	if (IS_HASWELL(dev)) {
--		spin_lock(&dev_priv->irq_lock);
--		err_int_reenable = ~dev_priv->irq_mask & DE_ERR_INT_IVB;
--		if (err_int_reenable)
--			ironlake_disable_display_irq(dev_priv, DE_ERR_INT_IVB);
--		spin_unlock(&dev_priv->irq_lock);
--	}
--
- 	gt_iir = I915_READ(GTIIR);
- 	if (gt_iir) {
- 		if (INTEL_INFO(dev)->gen >= 6)
-@@ -1485,13 +1473,6 @@ static irqreturn_t ironlake_irq_handler(int irq, void *arg)
- 		}
- 	}
- 
--	if (err_int_reenable) {
--		spin_lock(&dev_priv->irq_lock);
--		if (ivb_can_enable_err_int(dev))
--			ironlake_enable_display_irq(dev_priv, DE_ERR_INT_IVB);
--		spin_unlock(&dev_priv->irq_lock);
--	}
--
- 	I915_WRITE(DEIER, de_ier);
- 	POSTING_READ(DEIER);
- 	if (!HAS_PCH_NOP(dev)) {
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0888-drm-i915-POSTING_READ-IPS_CTL-before-waiting-for-the.patch b/patches.baytrail/0888-drm-i915-POSTING_READ-IPS_CTL-before-waiting-for-the.patch
deleted file mode 100644
index aec96c2973451..0000000000000
--- a/patches.baytrail/0888-drm-i915-POSTING_READ-IPS_CTL-before-waiting-for-the.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From 0a92d4f634f93efe71b87e21222a37fbd4def66a Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Thu, 19 Sep 2013 17:03:05 -0300
-Subject: drm/i915: POSTING_READ IPS_CTL before waiting for the vblank
-
-Make sure we write to IPS before we actually wait.
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 81c12f6e78c535533e9258bd9476b5d7419d3cce)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index a45ff17af834..5d0b03fbdac7 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -3386,6 +3386,7 @@ static void hsw_disable_ips(struct intel_crtc *crtc)
- 
- 	assert_plane_enabled(dev_priv, crtc->plane);
- 	I915_WRITE(IPS_CTL, 0);
-+	POSTING_READ(IPS_CTL);
- 
- 	/* We need to wait for a vblank before we can disable the plane. */
- 	intel_wait_for_vblank(dev, crtc->pipe);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0889-drm-i915-Change-i915_request-power-well-handling.patch b/patches.baytrail/0889-drm-i915-Change-i915_request-power-well-handling.patch
deleted file mode 100644
index e672303fc49f0..0000000000000
--- a/patches.baytrail/0889-drm-i915-Change-i915_request-power-well-handling.patch
+++ /dev/null
@@ -1,121 +0,0 @@
-From 889ba5ca5398b9bc49ce249affd8217972bf46f3 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Mon, 16 Sep 2013 17:38:27 +0300
-Subject: drm/i915: Change i915_request power well handling
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Reorganize the internal i915_request power well handling to use the
-reference count just like everyone else. This way all we need to do is
-check the reference count and we know whether the power well needs to be
-enabled of disabled.
-
-v2: Split he intel_display_power_{get,put} change to another patch.
-    Add intel_resume_power_well() to make sure we enable the power
-    well on resume
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 9cdb826c1452eeef1dfb5ebe64c27e7fa8616c49)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_drv.h |  1 +
- drivers/gpu/drm/i915/intel_pm.c  | 43 +++++++++++++++++++++++++++++++---------
- 2 files changed, 35 insertions(+), 9 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index 4af6751fcc7e..a75deb8b1d60 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -765,6 +765,7 @@ extern bool intel_display_power_enabled(struct drm_device *dev,
- 					enum intel_display_power_domain domain);
- extern void intel_init_power_well(struct drm_device *dev);
- extern void intel_set_power_well(struct drm_device *dev, bool enable);
-+extern void intel_resume_power_well(struct drm_device *dev);
- extern void intel_enable_gt_powersave(struct drm_device *dev);
- extern void intel_disable_gt_powersave(struct drm_device *dev);
- extern void ironlake_teardown_rc6(struct drm_device *dev);
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index ea66372f8851..a48fc2129bbb 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -5354,8 +5354,7 @@ void i915_request_power_well(void)
- 		return;
- 
- 	spin_lock_irq(&hsw_pwr->lock);
--	if (!hsw_pwr->count++ &&
--			!hsw_pwr->i915_request)
-+	if (!hsw_pwr->count++)
- 		__intel_set_power_well(hsw_pwr->device, true);
- 	spin_unlock_irq(&hsw_pwr->lock);
- }
-@@ -5369,8 +5368,7 @@ void i915_release_power_well(void)
- 
- 	spin_lock_irq(&hsw_pwr->lock);
- 	WARN_ON(!hsw_pwr->count);
--	if (!--hsw_pwr->count &&
--		       !hsw_pwr->i915_request)
-+	if (!--hsw_pwr->count)
- 		__intel_set_power_well(hsw_pwr->device, false);
- 	spin_unlock_irq(&hsw_pwr->lock);
- }
-@@ -5406,15 +5404,41 @@ void intel_set_power_well(struct drm_device *dev, bool enable)
- 		return;
- 
- 	spin_lock_irq(&power_well->lock);
-+
-+	/*
-+	 * This function will only ever contribute one
-+	 * to the power well reference count. i915_request
-+	 * is what tracks whether we have or have not
-+	 * added the one to the reference count.
-+	 */
-+	if (power_well->i915_request == enable)
-+		goto out;
-+
- 	power_well->i915_request = enable;
- 
--	/* only reject "disable" power well request */
--	if (power_well->count && !enable) {
--		spin_unlock_irq(&power_well->lock);
--		return;
-+	if (enable) {
-+		if (!power_well->count++)
-+			__intel_set_power_well(dev, true);
-+	} else {
-+		WARN_ON(!power_well->count);
-+		if (!--power_well->count)
-+			__intel_set_power_well(dev, false);
- 	}
- 
--	__intel_set_power_well(dev, enable);
-+ out:
-+	spin_unlock_irq(&power_well->lock);
-+}
-+
-+void intel_resume_power_well(struct drm_device *dev)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct i915_power_well *power_well = &dev_priv->power_well;
-+
-+	if (!HAS_POWER_WELL(dev))
-+		return;
-+
-+	spin_lock_irq(&power_well->lock);
-+	__intel_set_power_well(dev, power_well->count > 0);
- 	spin_unlock_irq(&power_well->lock);
- }
- 
-@@ -5433,6 +5457,7 @@ void intel_init_power_well(struct drm_device *dev)
- 
- 	/* For now, we need the power well to be always enabled. */
- 	intel_set_power_well(dev, true);
-+	intel_resume_power_well(dev);
- 
- 	/* We're taking over the BIOS, so clear any requests made by it since
- 	 * the driver is in charge now. */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0890-drm-i915-Add-intel_display_power_-get-put-to-request.patch b/patches.baytrail/0890-drm-i915-Add-intel_display_power_-get-put-to-request.patch
deleted file mode 100644
index bb02d38c32af2..0000000000000
--- a/patches.baytrail/0890-drm-i915-Add-intel_display_power_-get-put-to-request.patch
+++ /dev/null
@@ -1,115 +0,0 @@
-From 94ac07fc430e69587f2b796e3e17299ba6cd5393 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Mon, 16 Sep 2013 17:38:28 +0300
-Subject: drm/i915: Add intel_display_power_{get, put} to request power for
- specific domains
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Add APIs to get/put power well references for specific purposes.
-
-v2: Split the i915_request change to another patch
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 6765625e0b677a86dbd533f045ab4e52e2761d79)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_drv.h |  4 +++
- drivers/gpu/drm/i915/intel_pm.c  | 63 ++++++++++++++++++++++++++++++++++++++++
- 2 files changed, 67 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index a75deb8b1d60..3a7ef151f24a 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -763,6 +763,10 @@ extern void i915_remove_power_well(struct drm_device *dev);
- 
- extern bool intel_display_power_enabled(struct drm_device *dev,
- 					enum intel_display_power_domain domain);
-+extern void intel_display_power_get(struct drm_device *dev,
-+				    enum intel_display_power_domain domain);
-+extern void intel_display_power_put(struct drm_device *dev,
-+				    enum intel_display_power_domain domain);
- extern void intel_init_power_well(struct drm_device *dev);
- extern void intel_set_power_well(struct drm_device *dev, bool enable);
- extern void intel_resume_power_well(struct drm_device *dev);
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index a48fc2129bbb..147334dc3956 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -5345,6 +5345,69 @@ static void __intel_set_power_well(struct drm_device *dev, bool enable)
- 	}
- }
- 
-+void intel_display_power_get(struct drm_device *dev,
-+			     enum intel_display_power_domain domain)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct i915_power_well *power_well = &dev_priv->power_well;
-+
-+	if (!HAS_POWER_WELL(dev))
-+		return;
-+
-+	switch (domain) {
-+	case POWER_DOMAIN_PIPE_A:
-+	case POWER_DOMAIN_TRANSCODER_EDP:
-+		return;
-+	case POWER_DOMAIN_PIPE_B:
-+	case POWER_DOMAIN_PIPE_C:
-+	case POWER_DOMAIN_PIPE_A_PANEL_FITTER:
-+	case POWER_DOMAIN_PIPE_B_PANEL_FITTER:
-+	case POWER_DOMAIN_PIPE_C_PANEL_FITTER:
-+	case POWER_DOMAIN_TRANSCODER_A:
-+	case POWER_DOMAIN_TRANSCODER_B:
-+	case POWER_DOMAIN_TRANSCODER_C:
-+		spin_lock_irq(&power_well->lock);
-+		if (!power_well->count++)
-+			__intel_set_power_well(power_well->device, true);
-+		spin_unlock_irq(&power_well->lock);
-+		return;
-+	default:
-+		BUG();
-+	}
-+}
-+
-+void intel_display_power_put(struct drm_device *dev,
-+			     enum intel_display_power_domain domain)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct i915_power_well *power_well = &dev_priv->power_well;
-+
-+	if (!HAS_POWER_WELL(dev))
-+		return;
-+
-+	switch (domain) {
-+	case POWER_DOMAIN_PIPE_A:
-+	case POWER_DOMAIN_TRANSCODER_EDP:
-+		return;
-+	case POWER_DOMAIN_PIPE_B:
-+	case POWER_DOMAIN_PIPE_C:
-+	case POWER_DOMAIN_PIPE_A_PANEL_FITTER:
-+	case POWER_DOMAIN_PIPE_B_PANEL_FITTER:
-+	case POWER_DOMAIN_PIPE_C_PANEL_FITTER:
-+	case POWER_DOMAIN_TRANSCODER_A:
-+	case POWER_DOMAIN_TRANSCODER_B:
-+	case POWER_DOMAIN_TRANSCODER_C:
-+		spin_lock_irq(&power_well->lock);
-+		WARN_ON(!power_well->count);
-+		if (!--power_well->count)
-+			__intel_set_power_well(power_well->device, false);
-+		spin_unlock_irq(&power_well->lock);
-+		return;
-+	default:
-+		BUG();
-+	}
-+}
-+
- static struct i915_power_well *hsw_pwr;
- 
- /* Display audio driver power well request */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0891-drm-i915-Refactor-power-well-refcount-inc-dec-operat.patch b/patches.baytrail/0891-drm-i915-Refactor-power-well-refcount-inc-dec-operat.patch
deleted file mode 100644
index edf44cfffbd3c..0000000000000
--- a/patches.baytrail/0891-drm-i915-Refactor-power-well-refcount-inc-dec-operat.patch
+++ /dev/null
@@ -1,111 +0,0 @@
-From 4b3b48481a74a3bd155f3e45f581a254cfe7a0c0 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Mon, 16 Sep 2013 17:38:29 +0300
-Subject: drm/i915: Refactor power well refcount inc/dec operations
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-We increase/decrease the power well refcount in several places now, and
-all of those places need to do the same thing, so pull that code into
-a few small helper functions.
-
-v2: Rename the funcs to __intel_power_well_{get,put}
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 2d66aef508fc47aa75ed196bc4638636e28d1b42)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 39 +++++++++++++++++++++------------------
- 1 file changed, 21 insertions(+), 18 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 147334dc3956..99f4eadb1af3 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -5345,6 +5345,19 @@ static void __intel_set_power_well(struct drm_device *dev, bool enable)
- 	}
- }
- 
-+static void __intel_power_well_get(struct i915_power_well *power_well)
-+{
-+	if (!power_well->count++)
-+		__intel_set_power_well(power_well->device, true);
-+}
-+
-+static void __intel_power_well_put(struct i915_power_well *power_well)
-+{
-+	WARN_ON(!power_well->count);
-+	if (!--power_well->count)
-+		__intel_set_power_well(power_well->device, false);
-+}
-+
- void intel_display_power_get(struct drm_device *dev,
- 			     enum intel_display_power_domain domain)
- {
-@@ -5367,8 +5380,7 @@ void intel_display_power_get(struct drm_device *dev,
- 	case POWER_DOMAIN_TRANSCODER_B:
- 	case POWER_DOMAIN_TRANSCODER_C:
- 		spin_lock_irq(&power_well->lock);
--		if (!power_well->count++)
--			__intel_set_power_well(power_well->device, true);
-+		__intel_power_well_get(power_well);
- 		spin_unlock_irq(&power_well->lock);
- 		return;
- 	default:
-@@ -5398,9 +5410,7 @@ void intel_display_power_put(struct drm_device *dev,
- 	case POWER_DOMAIN_TRANSCODER_B:
- 	case POWER_DOMAIN_TRANSCODER_C:
- 		spin_lock_irq(&power_well->lock);
--		WARN_ON(!power_well->count);
--		if (!--power_well->count)
--			__intel_set_power_well(power_well->device, false);
-+		__intel_power_well_put(power_well);
- 		spin_unlock_irq(&power_well->lock);
- 		return;
- 	default:
-@@ -5417,8 +5427,7 @@ void i915_request_power_well(void)
- 		return;
- 
- 	spin_lock_irq(&hsw_pwr->lock);
--	if (!hsw_pwr->count++)
--		__intel_set_power_well(hsw_pwr->device, true);
-+	__intel_power_well_get(hsw_pwr);
- 	spin_unlock_irq(&hsw_pwr->lock);
- }
- EXPORT_SYMBOL_GPL(i915_request_power_well);
-@@ -5430,9 +5439,7 @@ void i915_release_power_well(void)
- 		return;
- 
- 	spin_lock_irq(&hsw_pwr->lock);
--	WARN_ON(!hsw_pwr->count);
--	if (!--hsw_pwr->count)
--		__intel_set_power_well(hsw_pwr->device, false);
-+	__intel_power_well_put(hsw_pwr);
- 	spin_unlock_irq(&hsw_pwr->lock);
- }
- EXPORT_SYMBOL_GPL(i915_release_power_well);
-@@ -5479,14 +5486,10 @@ void intel_set_power_well(struct drm_device *dev, bool enable)
- 
- 	power_well->i915_request = enable;
- 
--	if (enable) {
--		if (!power_well->count++)
--			__intel_set_power_well(dev, true);
--	} else {
--		WARN_ON(!power_well->count);
--		if (!--power_well->count)
--			__intel_set_power_well(dev, false);
--	}
-+	if (enable)
-+		__intel_power_well_get(power_well);
-+	else
-+		__intel_power_well_put(power_well);
- 
-  out:
- 	spin_unlock_irq(&power_well->lock);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0892-drm-i915-Add-POWER_DOMAIN_VGA.patch b/patches.baytrail/0892-drm-i915-Add-POWER_DOMAIN_VGA.patch
deleted file mode 100644
index 1698b8e01aea9..0000000000000
--- a/patches.baytrail/0892-drm-i915-Add-POWER_DOMAIN_VGA.patch
+++ /dev/null
@@ -1,64 +0,0 @@
-From ced11233a99f59a6b71e0ce315e80577d28f2f32 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Mon, 16 Sep 2013 17:38:30 +0300
-Subject: drm/i915: Add POWER_DOMAIN_VGA
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-VGA registers/memory live inside the the display power well. Add a power
-domain for VGA.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit cdf8dd7f888bb8b48adf2ae3babc5aad4b1a7a1e)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h | 1 +
- drivers/gpu/drm/i915/intel_pm.c | 3 +++
- 2 files changed, 4 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 09a5c829168c..8c52cbdb76f3 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -99,6 +99,7 @@ enum intel_display_power_domain {
- 	POWER_DOMAIN_TRANSCODER_B,
- 	POWER_DOMAIN_TRANSCODER_C,
- 	POWER_DOMAIN_TRANSCODER_EDP = POWER_DOMAIN_TRANSCODER_A + 0xF,
-+	POWER_DOMAIN_VGA,
- };
- 
- #define POWER_DOMAIN_PIPE(pipe) ((pipe) + POWER_DOMAIN_PIPE_A)
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 99f4eadb1af3..4692f8cb7724 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -5283,6 +5283,7 @@ bool intel_display_power_enabled(struct drm_device *dev,
- 	case POWER_DOMAIN_PIPE_A:
- 	case POWER_DOMAIN_TRANSCODER_EDP:
- 		return true;
-+	case POWER_DOMAIN_VGA:
- 	case POWER_DOMAIN_PIPE_B:
- 	case POWER_DOMAIN_PIPE_C:
- 	case POWER_DOMAIN_PIPE_A_PANEL_FITTER:
-@@ -5371,6 +5372,7 @@ void intel_display_power_get(struct drm_device *dev,
- 	case POWER_DOMAIN_PIPE_A:
- 	case POWER_DOMAIN_TRANSCODER_EDP:
- 		return;
-+	case POWER_DOMAIN_VGA:
- 	case POWER_DOMAIN_PIPE_B:
- 	case POWER_DOMAIN_PIPE_C:
- 	case POWER_DOMAIN_PIPE_A_PANEL_FITTER:
-@@ -5401,6 +5403,7 @@ void intel_display_power_put(struct drm_device *dev,
- 	case POWER_DOMAIN_PIPE_A:
- 	case POWER_DOMAIN_TRANSCODER_EDP:
- 		return;
-+	case POWER_DOMAIN_VGA:
- 	case POWER_DOMAIN_PIPE_B:
- 	case POWER_DOMAIN_PIPE_C:
- 	case POWER_DOMAIN_PIPE_A_PANEL_FITTER:
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0893-drm-i915-Pull-intel_init_power_well-out-of-intel_mod.patch b/patches.baytrail/0893-drm-i915-Pull-intel_init_power_well-out-of-intel_mod.patch
deleted file mode 100644
index 9671c589991f0..0000000000000
--- a/patches.baytrail/0893-drm-i915-Pull-intel_init_power_well-out-of-intel_mod.patch
+++ /dev/null
@@ -1,56 +0,0 @@
-From ac9fc006e731b8aedfd9b0e326a7997970f699da Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Mon, 16 Sep 2013 17:38:31 +0300
-Subject: drm/i915: Pull intel_init_power_well() out of intel_modeset_init_hw()
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The init and resume codepaths want to handel the power well in slightly
-different ways, so pull the power well init out from
-intel_modeset_init_hw() which gets called in both cases.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit d6317290bfd8673d1cf3b6f8a12c72b3297eac36)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_dma.c      |    2 ++
- drivers/gpu/drm/i915/i915_drv.c      |    2 ++
- drivers/gpu/drm/i915/intel_display.c |    2 --
- 3 files changed, 4 insertions(+), 2 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_dma.c
-+++ b/drivers/gpu/drm/i915/i915_dma.c
-@@ -1332,6 +1332,8 @@ static int i915_load_modeset_init(struct
- 
- 	INIT_WORK(&dev_priv->console_resume_work, intel_console_resume);
- 
-+	intel_init_power_well(dev);
-+
- 	intel_modeset_gem_init(dev);
- 
- 	/* Always safe in the mode setting case. */
---- a/drivers/gpu/drm/i915/i915_drv.c
-+++ b/drivers/gpu/drm/i915/i915_drv.c
-@@ -605,6 +605,8 @@ static int __i915_drm_thaw(struct drm_de
- 		/* We need working interrupts for modeset enabling ... */
- 		drm_irq_install(dev);
- 
-+		intel_init_power_well(dev);
-+
- 		intel_modeset_init_hw(dev);
- 
- 		drm_modeset_lock_all(dev);
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -10279,8 +10279,6 @@ void i915_disable_vga_mem(struct drm_dev
- 
- void intel_modeset_init_hw(struct drm_device *dev)
- {
--	intel_init_power_well(dev);
--
- 	intel_prepare_ddi(dev);
- 
- 	intel_init_clock_gating(dev);
diff --git a/patches.baytrail/0894-drm-i915-cleanup-a-min_t-cast.patch b/patches.baytrail/0894-drm-i915-cleanup-a-min_t-cast.patch
deleted file mode 100644
index aa67babb0e11a..0000000000000
--- a/patches.baytrail/0894-drm-i915-cleanup-a-min_t-cast.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From b8e1c80dbcf72d64d52b22ac2296de93d251a02a Mon Sep 17 00:00:00 2001
-From: Dan Carpenter <dan.carpenter@oracle.com>
-Date: Fri, 20 Sep 2013 14:20:18 +0300
-Subject: drm/i915: cleanup a min_t() cast
-
-The lower layers of sysfs will not allow an "offset" of more than
-GEN7_L3LOG_SIZE and also l3_access_valid() caps it a second time.  But
-it's a little easier to audit if we don't have to worry that the
-subtraction will result in negative values.
-
-Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit e5ad4026b9270532bfbc2fcb73cc74fbb46887d1)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_sysfs.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c
-index 176de441002c..44f4c1a6f7b1 100644
---- a/drivers/gpu/drm/i915/i915_sysfs.c
-+++ b/drivers/gpu/drm/i915/i915_sysfs.c
-@@ -131,7 +131,7 @@ i915_l3_read(struct file *filp, struct kobject *kobj,
- 	if (ret)
- 		return ret;
- 
--	count = min_t(int, GEN7_L3LOG_SIZE-offset, count);
-+	count = min_t(size_t, GEN7_L3LOG_SIZE - offset, count);
- 
- 	ret = i915_mutex_lock_interruptible(drm_dev);
- 	if (ret)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0895-drm-i915-assume-all-GM45-Acer-laptops-use-inverted-b.patch b/patches.baytrail/0895-drm-i915-assume-all-GM45-Acer-laptops-use-inverted-b.patch
deleted file mode 100644
index 3b3139ff307a8..0000000000000
--- a/patches.baytrail/0895-drm-i915-assume-all-GM45-Acer-laptops-use-inverted-b.patch
+++ /dev/null
@@ -1,60 +0,0 @@
-From 8a82e83a2daa78f317b5b4f462cbf9884217fdd1 Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Fri, 20 Sep 2013 15:05:30 +0300
-Subject: drm/i915: assume all GM45 Acer laptops use inverted backlight PWM
-
-There is plenty of evidence suggesting all of the GM45 based Acer
-laptops (including their eMachines and Packard Bell brands) use inverted
-backlight PWM. Assume this is really the case, and quirk them all.
-
-The old bugs that were fixed by subsystem device specific quirks:
- * https://bugs.freedesktop.org/show_bug.cgi?id=59628
- * https://bugzilla.kernel.org/show_bug.cgi?id=31522#c35
- * https://bugs.freedesktop.org/show_bug.cgi?id=44156
- * https://bugzilla.kernel.org/show_bug.cgi?id=53881
-
-See also this bug and the plethora of duplicates:
- * https://bugs.launchpad.net/ubuntu/+source/linux/+bug/765438
-
-References: https://bugzilla.kernel.org/show_bug.cgi?id=54171
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit ee1452d7458451a7508e0663553ce88d63958157)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 19 +++++--------------
- 1 file changed, 5 insertions(+), 14 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 951e4b5f7e77..12595a514074 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -10190,20 +10190,11 @@ static struct intel_quirk intel_quirks[] = {
- 	/* Sony Vaio Y cannot use SSC on LVDS */
- 	{ 0x0046, 0x104d, 0x9076, quirk_ssc_force_disable },
- 
--	/* Acer Aspire 5734Z must invert backlight brightness */
--	{ 0x2a42, 0x1025, 0x0459, quirk_invert_brightness },
--
--	/* Acer/eMachines G725 */
--	{ 0x2a42, 0x1025, 0x0210, quirk_invert_brightness },
--
--	/* Acer/eMachines e725 */
--	{ 0x2a42, 0x1025, 0x0212, quirk_invert_brightness },
--
--	/* Acer/Packard Bell NCL20 */
--	{ 0x2a42, 0x1025, 0x034b, quirk_invert_brightness },
--
--	/* Acer Aspire 4736Z */
--	{ 0x2a42, 0x1025, 0x0260, quirk_invert_brightness },
-+	/*
-+	 * All GM45 Acer (and its brands eMachines and Packard Bell) laptops
-+	 * seem to use inverted backlight PWM.
-+	 */
-+	{ 0x2a42, 0x1025, PCI_ANY_ID, quirk_invert_brightness },
- 
- 	/* Dell XPS13 HD Sandy Bridge */
- 	{ 0x0116, 0x1028, 0x052e, quirk_no_pcm_pwm_enable },
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0896-Re-create-dirty-merge-b599c89.patch b/patches.baytrail/0896-Re-create-dirty-merge-b599c89.patch
deleted file mode 100644
index db742bd6b9dc1..0000000000000
--- a/patches.baytrail/0896-Re-create-dirty-merge-b599c89.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From 8c2b4b4a4f761d5d87fe4fab63e98f781a35f60d Mon Sep 17 00:00:00 2001
-From: James Ausmus <james.ausmus@intel.com>
-Date: Thu, 10 Oct 2013 22:35:00 -0700
-Subject: Re-create dirty merge b599c89
-
-Fix code up to (applicable) post-merge state after
-b599c89e8c5cf0c37352e0871be240291f8ce922 ("Merge tag 'v3.12-rc2' into
-drm-intel-next")
-
-Signed-off-by: James Ausmus <james.ausmus@intel.com>
-(cherry picked from
- https://chromium.googlesource.com/chromiumos/third_party/kernel-next
- chromeos-3.10, 29f638bb7b8939c1159e80a0294ff38d7eae0360)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_drv.h | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index 3a7ef151f24a..4b75328462ed 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -826,8 +826,8 @@ extern int intel_dotclock_calculate(int link_freq,
- 				    const struct intel_link_m_n *m_n);
- extern void ironlake_check_encoder_dotclock(const struct intel_crtc_config *pipe_config,
- 					    int dotclock);
--extern void i915_disable_vga_mem(struct drm_device *dev);
- 
- extern bool intel_crtc_active(struct drm_crtc *crtc);
-+extern void i915_disable_vga_mem(struct drm_device *dev);
- 
- #endif /* __INTEL_DRV_H__ */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0897-drm-i915-Use-a-temporary-va_list-for-two-pass-string.patch b/patches.baytrail/0897-drm-i915-Use-a-temporary-va_list-for-two-pass-string.patch
deleted file mode 100644
index 407d96418943a..0000000000000
--- a/patches.baytrail/0897-drm-i915-Use-a-temporary-va_list-for-two-pass-string.patch
+++ /dev/null
@@ -1,60 +0,0 @@
-From 4e6aa8e13891dc80d7396e4a8cff8896b5fed59a Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Fri, 20 Sep 2013 10:20:59 +0100
-Subject: drm/i915: Use a temporary va_list for two-pass string handling
-
-In
-
-commit edc3d8848dc9fe2a470316363dab8ef211d77e01
-Author: Mika Kuoppala <mika.kuoppala@linux.intel.com>
-Date:   Thu May 23 13:55:35 2013 +0300
-
-    drm/i915: avoid big kmallocs on reading error state
-
-we introduce a two-pass mechanism for splitting long strings being
-formatted into the error-state. The first pass finds the length, and the
-second pass emits the right portion of the string into the accumulation
-buffer. Unfortunately we use the same va_list for both passes, resulting
-in the second pass reading garbage off the end of the argument list. As
-the two passes are only used for boundaries between read() calls, the
-corruption is only rarely seen.
-
-This fixes the root cause behind
-
-commit baf27f9b17bf2f369f3865e38c41d2163e8d815d
-Author: Chris Wilson <chris@chris-wilson.co.uk>
-Date:   Sat Jun 29 23:26:50 2013 +0100
-
-    drm/i915: Break up the large vsnprintf() in print_error_buffers()
-
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Cc: Mika Kuoppala <mika.kuoppala@intel.com>
-Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
-Cc: stable@vger.kernel.org
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit e29bb4ebbf000ff9ac081d29784a3331618f012e)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gpu_error.c | 6 ++++--
- 1 file changed, 4 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
-index c38d575dc5a6..7bea61325741 100644
---- a/drivers/gpu/drm/i915/i915_gpu_error.c
-+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
-@@ -143,8 +143,10 @@ static void i915_error_vprintf(struct drm_i915_error_state_buf *e,
- 
- 	/* Seek the first printf which is hits start position */
- 	if (e->pos < e->start) {
--		len = vsnprintf(NULL, 0, f, args);
--		if (!__i915_error_seek(e, len))
-+		va_list tmp;
-+
-+		va_copy(tmp, args);
-+		if (!__i915_error_seek(e, vsnprintf(NULL, 0, f, tmp)))
- 			return;
- 	}
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0898-drm-dp-add-defines-for-downstream-port-types.patch b/patches.baytrail/0898-drm-dp-add-defines-for-downstream-port-types.patch
deleted file mode 100644
index 4343c81e709c3..0000000000000
--- a/patches.baytrail/0898-drm-dp-add-defines-for-downstream-port-types.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From d70c27e58919e031680986461ac187d31aeb5bf5 Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Fri, 27 Sep 2013 14:48:41 +0300
-Subject: drm/dp: add defines for downstream port types
-
-Detailed cap info at address 80h is not available with DPCD ver
-1.0. Whether such devices exist in the wild I don't know, but there
-should be no harm done in having the defines for downstream port 0 in
-address 05h.
-
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Reviewed-by: Todd Previte <tprevite@gmail.com>
-Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit 3d2e423e0f0f0a3de504a6acae858c651599ba25)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- include/drm/drm_dp_helper.h | 8 ++++----
- 1 file changed, 4 insertions(+), 4 deletions(-)
-
-diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
-index ae8dbfb1207c..83da4eb1575b 100644
---- a/include/drm/drm_dp_helper.h
-+++ b/include/drm/drm_dp_helper.h
-@@ -77,10 +77,10 @@
- #define DP_DOWNSTREAMPORT_PRESENT           0x005
- # define DP_DWN_STRM_PORT_PRESENT           (1 << 0)
- # define DP_DWN_STRM_PORT_TYPE_MASK         0x06
--/* 00b = DisplayPort */
--/* 01b = Analog */
--/* 10b = TMDS or HDMI */
--/* 11b = Other */
-+# define DP_DWN_STRM_PORT_TYPE_DP           (0 << 1)
-+# define DP_DWN_STRM_PORT_TYPE_ANALOG       (1 << 1)
-+# define DP_DWN_STRM_PORT_TYPE_TMDS         (2 << 1)
-+# define DP_DWN_STRM_PORT_TYPE_OTHER        (3 << 1)
- # define DP_FORMAT_CONVERSION               (1 << 3)
- # define DP_DETAILED_CAP_INFO_AVAILABLE	    (1 << 4) /* DPI */
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0899-drm-i915-dp-downstream-port-capabilities-are-not-pre.patch b/patches.baytrail/0899-drm-i915-dp-downstream-port-capabilities-are-not-pre.patch
deleted file mode 100644
index 53166c1a7c0b7..0000000000000
--- a/patches.baytrail/0899-drm-i915-dp-downstream-port-capabilities-are-not-pre.patch
+++ /dev/null
@@ -1,67 +0,0 @@
-From ab3fb497e1d4af63bac661e65d6c743d72f8e7aa Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Fri, 27 Sep 2013 14:48:42 +0300
-Subject: drm/i915/dp: downstream port capabilities are not present in DPCD 1.0
-
-We haven't read the downstream port caps for DPCD 1.0, so don't use
-them.
-
-v2: use defines for DPCD 1.0 downstream port types
-
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Reviewed-by: Adam Jackson <ajax@redhat.com>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit c9ff160b169b4db1e562001f08add446c1f469c7)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_dp.c | 20 ++++++++++++++------
- 1 file changed, 14 insertions(+), 6 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
-index 60d2006fe15d..605908df95d8 100644
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -2810,7 +2810,6 @@ static enum drm_connector_status
- intel_dp_detect_dpcd(struct intel_dp *intel_dp)
- {
- 	uint8_t *dpcd = intel_dp->dpcd;
--	bool hpd;
- 	uint8_t type;
- 
- 	if (!intel_dp_get_dpcd(intel_dp))
-@@ -2821,8 +2820,8 @@ intel_dp_detect_dpcd(struct intel_dp *intel_dp)
- 		return connector_status_connected;
- 
- 	/* If we're HPD-aware, SINK_COUNT changes dynamically */
--	hpd = !!(intel_dp->downstream_ports[0] & DP_DS_PORT_HPD);
--	if (hpd) {
-+	if (intel_dp->dpcd[DP_DPCD_REV] >= 0x11 &&
-+	    intel_dp->downstream_ports[0] & DP_DS_PORT_HPD) {
- 		uint8_t reg;
- 		if (!intel_dp_aux_native_read_retry(intel_dp, DP_SINK_COUNT,
- 						    &reg, 1))
-@@ -2836,9 +2835,18 @@ intel_dp_detect_dpcd(struct intel_dp *intel_dp)
- 		return connector_status_connected;
- 
- 	/* Well we tried, say unknown for unreliable port types */
--	type = intel_dp->downstream_ports[0] & DP_DS_PORT_TYPE_MASK;
--	if (type == DP_DS_PORT_TYPE_VGA || type == DP_DS_PORT_TYPE_NON_EDID)
--		return connector_status_unknown;
-+	if (intel_dp->dpcd[DP_DPCD_REV] >= 0x11) {
-+		type = intel_dp->downstream_ports[0] & DP_DS_PORT_TYPE_MASK;
-+		if (type == DP_DS_PORT_TYPE_VGA ||
-+		    type == DP_DS_PORT_TYPE_NON_EDID)
-+			return connector_status_unknown;
-+	} else {
-+		type = intel_dp->dpcd[DP_DOWNSTREAMPORT_PRESENT] &
-+			DP_DWN_STRM_PORT_TYPE_MASK;
-+		if (type == DP_DWN_STRM_PORT_TYPE_ANALOG ||
-+		    type == DP_DWN_STRM_PORT_TYPE_OTHER)
-+			return connector_status_unknown;
-+	}
- 
- 	/* Anything else is out of spec, warn and ignore */
- 	DRM_DEBUG_KMS("Broken DP branch device, ignoring\n");
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0900-drm-i915-use-pointer-k-cmz.-alloc-sizeof-pointer-.-p.patch b/patches.baytrail/0900-drm-i915-use-pointer-k-cmz.-alloc-sizeof-pointer-.-p.patch
deleted file mode 100644
index 8db3eb5a2b34c..0000000000000
--- a/patches.baytrail/0900-drm-i915-use-pointer-k-cmz.-alloc-sizeof-pointer-.-p.patch
+++ /dev/null
@@ -1,313 +0,0 @@
-From 2d69d2e9a74894a32deeeb57a897b65dc622abe4 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 19 Sep 2013 12:18:32 +0200
-Subject: drm/i915: use pointer = k[cmz...]alloc(sizeof(*pointer), ...) pattern
-
-Done while reviewing all our allocations for fubar. Also a few errant
-cases of lacking () for the sizeof operator - just a bit of OCD.
-
-I've left out all the conversions that also should use kcalloc from
-this patch  (it's only 2).
-
-Reviewed-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit b14c5679dd2c87b5bd14c49c5bdd1962be2ab209)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_debugfs.c  |    2 +-
- drivers/gpu/drm/i915/i915_dma.c      |    6 +++---
- drivers/gpu/drm/i915/i915_gem.c      |    2 +-
- drivers/gpu/drm/i915/intel_crt.c     |    2 +-
- drivers/gpu/drm/i915/intel_ddi.c     |    6 +++---
- drivers/gpu/drm/i915/intel_display.c |    2 +-
- drivers/gpu/drm/i915/intel_dp.c      |    4 ++--
- drivers/gpu/drm/i915/intel_dvo.c     |    4 ++--
- drivers/gpu/drm/i915/intel_fb.c      |    2 +-
- drivers/gpu/drm/i915/intel_hdmi.c    |    4 ++--
- drivers/gpu/drm/i915/intel_lvds.c    |    4 ++--
- drivers/gpu/drm/i915/intel_overlay.c |    4 ++--
- drivers/gpu/drm/i915/intel_pm.c      |    2 +-
- drivers/gpu/drm/i915/intel_sdvo.c    |   10 +++++-----
- drivers/gpu/drm/i915/intel_sprite.c  |    2 +-
- drivers/gpu/drm/i915/intel_tv.c      |    4 ++--
- 16 files changed, 30 insertions(+), 30 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_debugfs.c
-+++ b/drivers/gpu/drm/i915/i915_debugfs.c
-@@ -2156,7 +2156,7 @@ drm_add_fake_info_node(struct drm_minor
- {
- 	struct drm_info_node *node;
- 
--	node = kmalloc(sizeof(struct drm_info_node), GFP_KERNEL);
-+	node = kmalloc(sizeof(*node), GFP_KERNEL);
- 	if (node == NULL) {
- 		debugfs_remove(ent);
- 		return -ENOMEM;
---- a/drivers/gpu/drm/i915/i915_dma.c
-+++ b/drivers/gpu/drm/i915/i915_dma.c
-@@ -649,7 +649,7 @@ static int i915_batchbuffer(struct drm_d
- 
- 	if (batch->num_cliprects) {
- 		cliprects = kcalloc(batch->num_cliprects,
--				    sizeof(struct drm_clip_rect),
-+				    sizeof(*cliprects),
- 				    GFP_KERNEL);
- 		if (cliprects == NULL)
- 			return -ENOMEM;
-@@ -711,7 +711,7 @@ static int i915_cmdbuffer(struct drm_dev
- 
- 	if (cmdbuf->num_cliprects) {
- 		cliprects = kcalloc(cmdbuf->num_cliprects,
--				    sizeof(struct drm_clip_rect), GFP_KERNEL);
-+				    sizeof(*cliprects), GFP_KERNEL);
- 		if (cliprects == NULL) {
- 			ret = -ENOMEM;
- 			goto fail_batch_free;
-@@ -1488,7 +1488,7 @@ int i915_driver_load(struct drm_device *
- 	dev->types[8] = _DRM_STAT_SECONDARY;
- 	dev->types[9] = _DRM_STAT_DMA;
- 
--	dev_priv = kzalloc(sizeof(drm_i915_private_t), GFP_KERNEL);
-+	dev_priv = kzalloc(sizeof(*dev_priv), GFP_KERNEL);
- 	if (dev_priv == NULL)
- 		return -ENOMEM;
- 
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -4630,7 +4630,7 @@ static int i915_gem_init_phys_object(str
- 	if (dev_priv->mm.phys_objs[id - 1] || !size)
- 		return 0;
- 
--	phys_obj = kzalloc(sizeof(struct drm_i915_gem_phys_object), GFP_KERNEL);
-+	phys_obj = kzalloc(sizeof(*phys_obj), GFP_KERNEL);
- 	if (!phys_obj)
- 		return -ENOMEM;
- 
---- a/drivers/gpu/drm/i915/intel_crt.c
-+++ b/drivers/gpu/drm/i915/intel_crt.c
-@@ -764,7 +764,7 @@ void intel_crt_init(struct drm_device *d
- 	if (!crt)
- 		return;
- 
--	intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
-+	intel_connector = kzalloc(sizeof(*intel_connector), GFP_KERNEL);
- 	if (!intel_connector) {
- 		kfree(crt);
- 		return;
---- a/drivers/gpu/drm/i915/intel_ddi.c
-+++ b/drivers/gpu/drm/i915/intel_ddi.c
-@@ -1343,11 +1343,11 @@ void intel_ddi_init(struct drm_device *d
- 	struct intel_connector *hdmi_connector = NULL;
- 	struct intel_connector *dp_connector = NULL;
- 
--	intel_dig_port = kzalloc(sizeof(struct intel_digital_port), GFP_KERNEL);
-+	intel_dig_port = kzalloc(sizeof(*intel_dig_port), GFP_KERNEL);
- 	if (!intel_dig_port)
- 		return;
- 
--	dp_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
-+	dp_connector = kzalloc(sizeof(*dp_connector), GFP_KERNEL);
- 	if (!dp_connector) {
- 		kfree(intel_dig_port);
- 		return;
-@@ -1387,7 +1387,7 @@ void intel_ddi_init(struct drm_device *d
- 	}
- 
- 	if (intel_encoder->type != INTEL_OUTPUT_EDP) {
--		hdmi_connector = kzalloc(sizeof(struct intel_connector),
-+		hdmi_connector = kzalloc(sizeof(*hdmi_connector),
- 					 GFP_KERNEL);
- 		if (!hdmi_connector) {
- 			return;
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -8097,7 +8097,7 @@ static int intel_crtc_page_flip(struct d
- 	     fb->pitches[0] != crtc->fb->pitches[0]))
- 		return -EINVAL;
- 
--	work = kzalloc(sizeof *work, GFP_KERNEL);
-+	work = kzalloc(sizeof(*work), GFP_KERNEL);
- 	if (work == NULL)
- 		return -ENOMEM;
- 
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -3649,11 +3649,11 @@ intel_dp_init(struct drm_device *dev, in
- 	struct drm_encoder *encoder;
- 	struct intel_connector *intel_connector;
- 
--	intel_dig_port = kzalloc(sizeof(struct intel_digital_port), GFP_KERNEL);
-+	intel_dig_port = kzalloc(sizeof(*intel_dig_port), GFP_KERNEL);
- 	if (!intel_dig_port)
- 		return;
- 
--	intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
-+	intel_connector = kzalloc(sizeof(*intel_connector), GFP_KERNEL);
- 	if (!intel_connector) {
- 		kfree(intel_dig_port);
- 		return;
---- a/drivers/gpu/drm/i915/intel_dvo.c
-+++ b/drivers/gpu/drm/i915/intel_dvo.c
-@@ -448,11 +448,11 @@ void intel_dvo_init(struct drm_device *d
- 	int i;
- 	int encoder_type = DRM_MODE_ENCODER_NONE;
- 
--	intel_dvo = kzalloc(sizeof(struct intel_dvo), GFP_KERNEL);
-+	intel_dvo = kzalloc(sizeof(*intel_dvo), GFP_KERNEL);
- 	if (!intel_dvo)
- 		return;
- 
--	intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
-+	intel_connector = kzalloc(sizeof(*intel_connector), GFP_KERNEL);
- 	if (!intel_connector) {
- 		kfree(intel_dvo);
- 		return;
---- a/drivers/gpu/drm/i915/intel_fb.c
-+++ b/drivers/gpu/drm/i915/intel_fb.c
-@@ -216,7 +216,7 @@ int intel_fbdev_init(struct drm_device *
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	int ret;
- 
--	ifbdev = kzalloc(sizeof(struct intel_fbdev), GFP_KERNEL);
-+	ifbdev = kzalloc(sizeof(*ifbdev), GFP_KERNEL);
- 	if (!ifbdev)
- 		return -ENOMEM;
- 
---- a/drivers/gpu/drm/i915/intel_hdmi.c
-+++ b/drivers/gpu/drm/i915/intel_hdmi.c
-@@ -1292,11 +1292,11 @@ void intel_hdmi_init(struct drm_device *
- 	struct intel_encoder *intel_encoder;
- 	struct intel_connector *intel_connector;
- 
--	intel_dig_port = kzalloc(sizeof(struct intel_digital_port), GFP_KERNEL);
-+	intel_dig_port = kzalloc(sizeof(*intel_dig_port), GFP_KERNEL);
- 	if (!intel_dig_port)
- 		return;
- 
--	intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
-+	intel_connector = kzalloc(sizeof(*intel_connector), GFP_KERNEL);
- 	if (!intel_connector) {
- 		kfree(intel_dig_port);
- 		return;
---- a/drivers/gpu/drm/i915/intel_lvds.c
-+++ b/drivers/gpu/drm/i915/intel_lvds.c
-@@ -964,11 +964,11 @@ void intel_lvds_init(struct drm_device *
- 		}
- 	}
- 
--	lvds_encoder = kzalloc(sizeof(struct intel_lvds_encoder), GFP_KERNEL);
-+	lvds_encoder = kzalloc(sizeof(*lvds_encoder), GFP_KERNEL);
- 	if (!lvds_encoder)
- 		return;
- 
--	lvds_connector = kzalloc(sizeof(struct intel_lvds_connector), GFP_KERNEL);
-+	lvds_connector = kzalloc(sizeof(*lvds_connector), GFP_KERNEL);
- 	if (!lvds_connector) {
- 		kfree(lvds_encoder);
- 		return;
---- a/drivers/gpu/drm/i915/intel_overlay.c
-+++ b/drivers/gpu/drm/i915/intel_overlay.c
-@@ -1053,7 +1053,7 @@ int intel_overlay_put_image(struct drm_d
- 		return ret;
- 	}
- 
--	params = kmalloc(sizeof(struct put_image_params), GFP_KERNEL);
-+	params = kmalloc(sizeof(*params), GFP_KERNEL);
- 	if (!params)
- 		return -ENOMEM;
- 
-@@ -1320,7 +1320,7 @@ void intel_setup_overlay(struct drm_devi
- 	if (!HAS_OVERLAY(dev))
- 		return;
- 
--	overlay = kzalloc(sizeof(struct intel_overlay), GFP_KERNEL);
-+	overlay = kzalloc(sizeof(*overlay), GFP_KERNEL);
- 	if (!overlay)
- 		return;
- 
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -370,7 +370,7 @@ static void intel_enable_fbc(struct drm_
- 
- 	intel_cancel_fbc_work(dev_priv);
- 
--	work = kzalloc(sizeof *work, GFP_KERNEL);
-+	work = kzalloc(sizeof(*work), GFP_KERNEL);
- 	if (work == NULL) {
- 		DRM_ERROR("Failed to allocate FBC work structure\n");
- 		dev_priv->display.enable_fbc(crtc, interval);
---- a/drivers/gpu/drm/i915/intel_sdvo.c
-+++ b/drivers/gpu/drm/i915/intel_sdvo.c
-@@ -2397,7 +2397,7 @@ intel_sdvo_dvi_init(struct intel_sdvo *i
- 	struct intel_connector *intel_connector;
- 	struct intel_sdvo_connector *intel_sdvo_connector;
- 
--	intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
-+	intel_sdvo_connector = kzalloc(sizeof(*intel_sdvo_connector), GFP_KERNEL);
- 	if (!intel_sdvo_connector)
- 		return false;
- 
-@@ -2445,7 +2445,7 @@ intel_sdvo_tv_init(struct intel_sdvo *in
- 	struct intel_connector *intel_connector;
- 	struct intel_sdvo_connector *intel_sdvo_connector;
- 
--	intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
-+	intel_sdvo_connector = kzalloc(sizeof(*intel_sdvo_connector), GFP_KERNEL);
- 	if (!intel_sdvo_connector)
- 		return false;
- 
-@@ -2482,7 +2482,7 @@ intel_sdvo_analog_init(struct intel_sdvo
- 	struct intel_connector *intel_connector;
- 	struct intel_sdvo_connector *intel_sdvo_connector;
- 
--	intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
-+	intel_sdvo_connector = kzalloc(sizeof(*intel_sdvo_connector), GFP_KERNEL);
- 	if (!intel_sdvo_connector)
- 		return false;
- 
-@@ -2513,7 +2513,7 @@ intel_sdvo_lvds_init(struct intel_sdvo *
- 	struct intel_connector *intel_connector;
- 	struct intel_sdvo_connector *intel_sdvo_connector;
- 
--	intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
-+	intel_sdvo_connector = kzalloc(sizeof(*intel_sdvo_connector), GFP_KERNEL);
- 	if (!intel_sdvo_connector)
- 		return false;
- 
-@@ -2879,7 +2879,7 @@ bool intel_sdvo_init(struct drm_device *
- 	struct intel_encoder *intel_encoder;
- 	struct intel_sdvo *intel_sdvo;
- 	int i;
--	intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
-+	intel_sdvo = kzalloc(sizeof(*intel_sdvo), GFP_KERNEL);
- 	if (!intel_sdvo)
- 		return false;
- 
---- a/drivers/gpu/drm/i915/intel_sprite.c
-+++ b/drivers/gpu/drm/i915/intel_sprite.c
-@@ -1034,7 +1034,7 @@ intel_plane_init(struct drm_device *dev,
- 	if (INTEL_INFO(dev)->gen < 5)
- 		return -ENODEV;
- 
--	intel_plane = kzalloc(sizeof(struct intel_plane), GFP_KERNEL);
-+	intel_plane = kzalloc(sizeof(*intel_plane), GFP_KERNEL);
- 	if (!intel_plane)
- 		return -ENOMEM;
- 
---- a/drivers/gpu/drm/i915/intel_tv.c
-+++ b/drivers/gpu/drm/i915/intel_tv.c
-@@ -1590,12 +1590,12 @@ intel_tv_init(struct drm_device *dev)
- 	    (tv_dac_off & TVDAC_STATE_CHG_EN) != 0)
- 		return;
- 
--	intel_tv = kzalloc(sizeof(struct intel_tv), GFP_KERNEL);
-+	intel_tv = kzalloc(sizeof(*intel_tv), GFP_KERNEL);
- 	if (!intel_tv) {
- 		return;
- 	}
- 
--	intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
-+	intel_connector = kzalloc(sizeof(*intel_connector), GFP_KERNEL);
- 	if (!intel_connector) {
- 		kfree(intel_tv);
- 		return;
diff --git a/patches.baytrail/0901-drm-i915-Use-kcalloc-more.patch b/patches.baytrail/0901-drm-i915-Use-kcalloc-more.patch
deleted file mode 100644
index 5389fb0ef4d54..0000000000000
--- a/patches.baytrail/0901-drm-i915-Use-kcalloc-more.patch
+++ /dev/null
@@ -1,129 +0,0 @@
-From 502a88f5c550fa9b2cf7434eaa6c546c435013f0 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Sat, 21 Sep 2013 00:35:38 +0200
-Subject: drm/i915: Use kcalloc more
-
-No buffer overflows here, but better safe than sorry.
-
-v2:
-- Fixup the sizeof conversion, I've missed the pointer deref (Jani).
-- Drop the redundant GFP_ZERO, kcalloc alreads memsets (Jani).
-- Use kmalloc_array for the execbuf fastpath to avoid the memset
-  (Chris). I've opted to leave all other conversions as-is since they
-  aren't in a fastpath and dealing with cleared memory instead of
-  random garbage is just generally nicer.
-
-Cc: Jani Nikula <jani.nikula@linux.intel.com>
-Cc: Chris Wilson <chris@chris-wilson.co.uk>
-Reviewed-by: Jani Nikula <jani.nikula@intel.com>
-[danvet: Drop the contentious kmalloc_array hunk in execbuf.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit a1e2265332e9344f913811ac6d2b84a506195bd8)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem_execbuffer.c | 3 ++-
- drivers/gpu/drm/i915/i915_gem_gtt.c        | 4 ++--
- drivers/gpu/drm/i915/i915_gem_tiling.c     | 6 +++---
- drivers/gpu/drm/i915/i915_gpu_error.c      | 4 ++--
- drivers/gpu/drm/i915/intel_display.c       | 2 +-
- 5 files changed, 10 insertions(+), 9 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-index ee933572bdc1..b87107e73c05 100644
---- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-@@ -1047,7 +1047,8 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
- 			return -EINVAL;
- 		}
- 
--		cliprects = kmalloc(args->num_cliprects * sizeof(*cliprects),
-+		cliprects = kcalloc(args->num_cliprects,
-+				    sizeof(*cliprects),
- 				    GFP_KERNEL);
- 		if (cliprects == NULL) {
- 			ret = -ENOMEM;
-diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
-index 212f6d8c35ec..e999496532c6 100644
---- a/drivers/gpu/drm/i915/i915_gem_gtt.c
-+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
-@@ -336,7 +336,7 @@ static int gen6_ppgtt_init(struct i915_hw_ppgtt *ppgtt)
- 	ppgtt->base.insert_entries = gen6_ppgtt_insert_entries;
- 	ppgtt->base.cleanup = gen6_ppgtt_cleanup;
- 	ppgtt->base.scratch = dev_priv->gtt.base.scratch;
--	ppgtt->pt_pages = kzalloc(sizeof(struct page *)*ppgtt->num_pd_entries,
-+	ppgtt->pt_pages = kcalloc(ppgtt->num_pd_entries, sizeof(struct page *),
- 				  GFP_KERNEL);
- 	if (!ppgtt->pt_pages)
- 		return -ENOMEM;
-@@ -347,7 +347,7 @@ static int gen6_ppgtt_init(struct i915_hw_ppgtt *ppgtt)
- 			goto err_pt_alloc;
- 	}
- 
--	ppgtt->pt_dma_addr = kzalloc(sizeof(dma_addr_t) *ppgtt->num_pd_entries,
-+	ppgtt->pt_dma_addr = kcalloc(ppgtt->num_pd_entries, sizeof(dma_addr_t),
- 				     GFP_KERNEL);
- 	if (!ppgtt->pt_dma_addr)
- 		goto err_pt_alloc;
-diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c
-index 032e9ef9c896..ac9ebe98f8b0 100644
---- a/drivers/gpu/drm/i915/i915_gem_tiling.c
-+++ b/drivers/gpu/drm/i915/i915_gem_tiling.c
-@@ -393,7 +393,7 @@ i915_gem_set_tiling(struct drm_device *dev, void *data,
- 	/* Try to preallocate memory required to save swizzling on put-pages */
- 	if (i915_gem_object_needs_bit17_swizzle(obj)) {
- 		if (obj->bit_17 == NULL) {
--			obj->bit_17 = kmalloc(BITS_TO_LONGS(obj->base.size >> PAGE_SHIFT) *
-+			obj->bit_17 = kcalloc(BITS_TO_LONGS(obj->base.size >> PAGE_SHIFT),
- 					      sizeof(long), GFP_KERNEL);
- 		}
- 	} else {
-@@ -504,8 +504,8 @@ i915_gem_object_save_bit_17_swizzle(struct drm_i915_gem_object *obj)
- 	int i;
- 
- 	if (obj->bit_17 == NULL) {
--		obj->bit_17 = kmalloc(BITS_TO_LONGS(page_count) *
--					   sizeof(long), GFP_KERNEL);
-+		obj->bit_17 = kcalloc(BITS_TO_LONGS(page_count),
-+				      sizeof(long), GFP_KERNEL);
- 		if (obj->bit_17 == NULL) {
- 			DRM_ERROR("Failed to allocate memory for bit 17 "
- 				  "record\n");
-diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
-index 7bea61325741..c3ff6bd220dc 100644
---- a/drivers/gpu/drm/i915/i915_gpu_error.c
-+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
-@@ -793,7 +793,7 @@ static void i915_gem_record_rings(struct drm_device *dev,
- 
- 		error->ring[i].num_requests = count;
- 		error->ring[i].requests =
--			kmalloc(count*sizeof(struct drm_i915_error_request),
-+			kcalloc(count, sizeof(*error->ring[i].requests),
- 				GFP_ATOMIC);
- 		if (error->ring[i].requests == NULL) {
- 			error->ring[i].num_requests = 0;
-@@ -835,7 +835,7 @@ static void i915_gem_capture_vm(struct drm_i915_private *dev_priv,
- 	error->pinned_bo_count[ndx] = i - error->active_bo_count[ndx];
- 
- 	if (i) {
--		active_bo = kmalloc(sizeof(*active_bo)*i, GFP_ATOMIC);
-+		active_bo = kcalloc(i, sizeof(*active_bo), GFP_ATOMIC);
- 		if (active_bo)
- 			pinned_bo = active_bo + error->active_bo_count[ndx];
- 	}
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index f0b18c342dee..c61a0bd32edd 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -9052,7 +9052,7 @@ static int __intel_set_mode(struct drm_crtc *crtc,
- 	unsigned disable_pipes, prepare_pipes, modeset_pipes;
- 	int ret = 0;
- 
--	saved_mode = kmalloc(2 * sizeof(*saved_mode), GFP_KERNEL);
-+	saved_mode = kcalloc(2, sizeof(*saved_mode), GFP_KERNEL);
- 	if (!saved_mode)
- 		return -ENOMEM;
- 	saved_hwmode = saved_mode + 1;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0902-drm-i915-Ditch-INTELFB_CONN_LIMIT.patch b/patches.baytrail/0902-drm-i915-Ditch-INTELFB_CONN_LIMIT.patch
deleted file mode 100644
index 90eba906313ad..0000000000000
--- a/patches.baytrail/0902-drm-i915-Ditch-INTELFB_CONN_LIMIT.patch
+++ /dev/null
@@ -1,66 +0,0 @@
-From 81e6067e09522f6b3562eeeb794c90e1d027761e Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 19 Sep 2013 14:05:45 +0200
-Subject: drm/i915: Ditch INTELFB_CONN_LIMIT
-
-And the gratious overallocation of crtcs. Seems to go back to the ums
-days of yonder ...
-
-We also still need it to make the fbdev emulation happy, but I don't
-think there's really a need. Especially since the current fbdev
-emulation doesn't actually support cloning.
-
-v2: Use sizeof(*pointer) pattern (Jani).
-
-Cc: Jani Nikula <jani.nikula@linux.intel.com>
-Reviewed-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 955382f3895f644855b56893067b1b23c63893dd)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 2 +-
- drivers/gpu/drm/i915/intel_drv.h     | 1 -
- drivers/gpu/drm/i915/intel_fb.c      | 2 +-
- 3 files changed, 2 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index c61a0bd32edd..3ada4e8ef57a 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -9591,7 +9591,7 @@ static void intel_crtc_init(struct drm_device *dev, int pipe)
- 	struct intel_crtc *intel_crtc;
- 	int i;
- 
--	intel_crtc = kzalloc(sizeof(struct intel_crtc) + (INTELFB_CONN_LIMIT * sizeof(struct drm_connector *)), GFP_KERNEL);
-+	intel_crtc = kzalloc(sizeof(*intel_crtc), GFP_KERNEL);
- 	if (intel_crtc == NULL)
- 		return;
- 
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index 4b75328462ed..fb38ef10ac5d 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -77,7 +77,6 @@
- /* the i915, i945 have a single sDVO i2c bus - which is different */
- #define MAX_OUTPUTS 6
- /* maximum connectors per crtcs in the mode set */
--#define INTELFB_CONN_LIMIT 4
- 
- #define INTEL_I2C_BUS_DVO 1
- #define INTEL_I2C_BUS_SDVO 2
-diff --git a/drivers/gpu/drm/i915/intel_fb.c b/drivers/gpu/drm/i915/intel_fb.c
-index 6aa66aaceaef..7ceb69b9dd61 100644
---- a/drivers/gpu/drm/i915/intel_fb.c
-+++ b/drivers/gpu/drm/i915/intel_fb.c
-@@ -225,7 +225,7 @@ int intel_fbdev_init(struct drm_device *dev)
- 
- 	ret = drm_fb_helper_init(dev, &ifbdev->helper,
- 				 INTEL_INFO(dev)->num_pipes,
--				 INTELFB_CONN_LIMIT);
-+				 4);
- 	if (ret) {
- 		kfree(ifbdev);
- 		return ret;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0903-drm-i915-Use-unsigned-for-overflow-checks-in-execbuf.patch b/patches.baytrail/0903-drm-i915-Use-unsigned-for-overflow-checks-in-execbuf.patch
deleted file mode 100644
index a5f5d8cc6e65e..0000000000000
--- a/patches.baytrail/0903-drm-i915-Use-unsigned-for-overflow-checks-in-execbuf.patch
+++ /dev/null
@@ -1,78 +0,0 @@
-From 8524757506a1f5f552a812de56d4e1811954dcdd Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 19 Sep 2013 14:00:11 +0200
-Subject: drm/i915: Use unsigned for overflow checks in execbuf
-
-There's actually no real risk since we already check for stricter
-constraints earlier (using UINT_MAX / sizeof (struct
-drm_i915_gem_exec_object2) as the limit). But in eb_create we use
-signed integers, which steals a factor of 2. Luckily struct
-drm_i915_gem_exec_object2 for this to not matter.
-
-Still, be consistent and use unsigned integers.
-
-Similar use unsinged integers when checking for overflows in the
-relocation entry processing.
-
-I've also added a new subtests to igt/gem_reloc_overflow to also
-test for overflowing args->buffer_count values.
-
-v2: Give the variables again tighter scope to make it clear that the
-computation is purely local and doesn't leak out to the 2nd block.
-Requested by Chris Wilson.
-
-Cc: Chris Wilson <chris@chris-wilson.co.uk>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit b205ca572159ab9a617fc96e4659bc138064ca8e)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem_execbuffer.c | 12 ++++++------
- 1 file changed, 6 insertions(+), 6 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-index b87107e73c05..da23cfe3902b 100644
---- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-@@ -48,15 +48,15 @@ eb_create(struct drm_i915_gem_execbuffer2 *args, struct i915_address_space *vm)
- 	struct eb_vmas *eb = NULL;
- 
- 	if (args->flags & I915_EXEC_HANDLE_LUT) {
--		int size = args->buffer_count;
-+		unsigned size = args->buffer_count;
- 		size *= sizeof(struct i915_vma *);
- 		size += sizeof(struct eb_vmas);
- 		eb = kmalloc(size, GFP_TEMPORARY | __GFP_NOWARN | __GFP_NORETRY);
- 	}
- 
- 	if (eb == NULL) {
--		int size = args->buffer_count;
--		int count = PAGE_SIZE / sizeof(struct hlist_head) / 2;
-+		unsigned size = args->buffer_count;
-+		unsigned count = PAGE_SIZE / sizeof(struct hlist_head) / 2;
- 		BUILD_BUG_ON_NOT_POWER_OF_2(PAGE_SIZE / sizeof(struct hlist_head));
- 		while (count > 2*size)
- 			count >>= 1;
-@@ -667,7 +667,7 @@ i915_gem_execbuffer_relocate_slow(struct drm_device *dev,
- 	bool need_relocs;
- 	int *reloc_offset;
- 	int i, total, ret;
--	int count = args->buffer_count;
-+	unsigned count = args->buffer_count;
- 
- 	if (WARN_ON(list_empty(&eb->vmas)))
- 		return 0;
-@@ -818,8 +818,8 @@ validate_exec_list(struct drm_i915_gem_exec_object2 *exec,
- 		   int count)
- {
- 	int i;
--	int relocs_total = 0;
--	int relocs_max = INT_MAX / sizeof(struct drm_i915_gem_relocation_entry);
-+	unsigned relocs_total = 0;
-+	unsigned relocs_max = UINT_MAX / sizeof(struct drm_i915_gem_relocation_entry);
- 
- 	for (i = 0; i < count; i++) {
- 		char __user *ptr = to_user_ptr(exec[i].relocs_ptr);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0904-drm-i915-Do-not-unlock-upon-error-in-i915_gem_idle.patch b/patches.baytrail/0904-drm-i915-Do-not-unlock-upon-error-in-i915_gem_idle.patch
deleted file mode 100644
index d6344e93a10f4..0000000000000
--- a/patches.baytrail/0904-drm-i915-Do-not-unlock-upon-error-in-i915_gem_idle.patch
+++ /dev/null
@@ -1,51 +0,0 @@
-From e3a1b5324fe03f4a8e524f33a4294af712fa8a8d Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Fri, 13 Sep 2013 23:57:04 +0100
-Subject: drm/i915: Do not unlock upon error in i915_gem_idle()
-
-We never took the lock ourselves and all callers expect the struct_mutex
-to be locked upon return (be it success or error), thereore dropping the
-lock along the error paths looks to be a vestigial error from
-
-commit db1b76ca6a79c774074ae87bee7afc0825a478f5
-Author: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date:   Tue Jul 9 16:51:37 2013 +0200
-
-    drm/i915: don't frob mm.suspended when not using ums
-
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit f740334775efd30631c556f7654b92dae66df494)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem.c | 9 +++------
- 1 file changed, 3 insertions(+), 6 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index 08bff16a0b72..845072412ea7 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -4225,16 +4225,13 @@ i915_gem_idle(struct drm_device *dev)
- 	drm_i915_private_t *dev_priv = dev->dev_private;
- 	int ret;
- 
--	if (dev_priv->ums.mm_suspended) {
--		mutex_unlock(&dev->struct_mutex);
-+	if (dev_priv->ums.mm_suspended)
- 		return 0;
--	}
- 
- 	ret = i915_gpu_idle(dev);
--	if (ret) {
--		mutex_unlock(&dev->struct_mutex);
-+	if (ret)
- 		return ret;
--	}
-+
- 	i915_gem_retire_requests(dev);
- 
- 	/* Under UMS, be paranoid and evict. */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0905-drm-i915-VBT-s-child_device_config-changes-over-time.patch b/patches.baytrail/0905-drm-i915-VBT-s-child_device_config-changes-over-time.patch
deleted file mode 100644
index f145ba5f293bf..0000000000000
--- a/patches.baytrail/0905-drm-i915-VBT-s-child_device_config-changes-over-time.patch
+++ /dev/null
@@ -1,257 +0,0 @@
-From 996f9c914d9cb3892c52dd229ebfd42f1766af55 Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Wed, 11 Sep 2013 18:02:47 -0300
-Subject: drm/i915: VBT's child_device_config changes over time
-
-We currently treat the child_device_config as a simple struct, but
-this is not correct: new BDB versions change the meaning of some
-offsets, so the struct needs to be adjusted for each version.
-
-Since there are too many changes (today we're in version 170!), making
-a big versioned union would be too complicated, so child_device_config
-is now a union of 3 things: (i) a "raw" byte array that's safe to use
-anywhere; (ii)  an "old" structure that's the one we've been using and
-should be safe to keep in the SDVO and TV code; and (iii) a "common"
-structure that should contain only fields that are common for all the
-known VBT versions.
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 768f69c9fe601af39dfeb377f45909896f201444)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h   |    2 +-
- drivers/gpu/drm/i915/intel_bios.c |   36 ++++++++++++++++++------------------
- drivers/gpu/drm/i915/intel_bios.h |   33 +++++++++++++++++++++++++++++++--
- drivers/gpu/drm/i915/intel_dp.c   |    6 +++---
- drivers/gpu/drm/i915/intel_lvds.c |    3 ++-
- drivers/gpu/drm/i915/intel_tv.c   |    8 ++++----
- 6 files changed, 59 insertions(+), 29 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1090,7 +1090,7 @@ struct intel_vbt_data {
- 	int crt_ddc_pin;
- 
- 	int child_dev_num;
--	struct child_device_config *child_dev;
-+	union child_device_config *child_dev;
- };
- 
- enum intel_ddb_partitioning {
---- a/drivers/gpu/drm/i915/intel_bios.c
-+++ b/drivers/gpu/drm/i915/intel_bios.c
-@@ -389,7 +389,7 @@ parse_sdvo_device_mapping(struct drm_i91
- {
- 	struct sdvo_device_mapping *p_mapping;
- 	struct bdb_general_definitions *p_defs;
--	struct child_device_config *p_child;
-+	union child_device_config *p_child;
- 	int i, child_device_num, count;
- 	u16	block_size;
- 
-@@ -416,36 +416,36 @@ parse_sdvo_device_mapping(struct drm_i91
- 	count = 0;
- 	for (i = 0; i < child_device_num; i++) {
- 		p_child = &(p_defs->devices[i]);
--		if (!p_child->device_type) {
-+		if (!p_child->old.device_type) {
- 			/* skip the device block if device type is invalid */
- 			continue;
- 		}
--		if (p_child->slave_addr != SLAVE_ADDR1 &&
--			p_child->slave_addr != SLAVE_ADDR2) {
-+		if (p_child->old.slave_addr != SLAVE_ADDR1 &&
-+			p_child->old.slave_addr != SLAVE_ADDR2) {
- 			/*
- 			 * If the slave address is neither 0x70 nor 0x72,
- 			 * it is not a SDVO device. Skip it.
- 			 */
- 			continue;
- 		}
--		if (p_child->dvo_port != DEVICE_PORT_DVOB &&
--			p_child->dvo_port != DEVICE_PORT_DVOC) {
-+		if (p_child->old.dvo_port != DEVICE_PORT_DVOB &&
-+			p_child->old.dvo_port != DEVICE_PORT_DVOC) {
- 			/* skip the incorrect SDVO port */
- 			DRM_DEBUG_KMS("Incorrect SDVO port. Skip it\n");
- 			continue;
- 		}
- 		DRM_DEBUG_KMS("the SDVO device with slave addr %2x is found on"
- 				" %s port\n",
--				p_child->slave_addr,
--				(p_child->dvo_port == DEVICE_PORT_DVOB) ?
-+				p_child->old.slave_addr,
-+				(p_child->old.dvo_port == DEVICE_PORT_DVOB) ?
- 					"SDVOB" : "SDVOC");
--		p_mapping = &(dev_priv->sdvo_mappings[p_child->dvo_port - 1]);
-+		p_mapping = &(dev_priv->sdvo_mappings[p_child->old.dvo_port - 1]);
- 		if (!p_mapping->initialized) {
--			p_mapping->dvo_port = p_child->dvo_port;
--			p_mapping->slave_addr = p_child->slave_addr;
--			p_mapping->dvo_wiring = p_child->dvo_wiring;
--			p_mapping->ddc_pin = p_child->ddc_pin;
--			p_mapping->i2c_pin = p_child->i2c_pin;
-+			p_mapping->dvo_port = p_child->old.dvo_port;
-+			p_mapping->slave_addr = p_child->old.slave_addr;
-+			p_mapping->dvo_wiring = p_child->old.dvo_wiring;
-+			p_mapping->ddc_pin = p_child->old.ddc_pin;
-+			p_mapping->i2c_pin = p_child->old.i2c_pin;
- 			p_mapping->initialized = 1;
- 			DRM_DEBUG_KMS("SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n",
- 				      p_mapping->dvo_port,
-@@ -457,7 +457,7 @@ parse_sdvo_device_mapping(struct drm_i91
- 			DRM_DEBUG_KMS("Maybe one SDVO port is shared by "
- 					 "two SDVO device.\n");
- 		}
--		if (p_child->slave2_addr) {
-+		if (p_child->old.slave2_addr) {
- 			/* Maybe this is a SDVO device with multiple inputs */
- 			/* And the mapping info is not added */
- 			DRM_DEBUG_KMS("there exists the slave2_addr. Maybe this"
-@@ -588,7 +588,7 @@ parse_device_mapping(struct drm_i915_pri
- 		       struct bdb_header *bdb)
- {
- 	struct bdb_general_definitions *p_defs;
--	struct child_device_config *p_child, *child_dev_ptr;
-+	union child_device_config *p_child, *child_dev_ptr;
- 	int i, child_device_num, count;
- 	u16	block_size;
- 
-@@ -616,7 +616,7 @@ parse_device_mapping(struct drm_i915_pri
- 	/* get the number of child device that is present */
- 	for (i = 0; i < child_device_num; i++) {
- 		p_child = &(p_defs->devices[i]);
--		if (!p_child->device_type) {
-+		if (!p_child->common.device_type) {
- 			/* skip the device block if device type is invalid */
- 			continue;
- 		}
-@@ -636,7 +636,7 @@ parse_device_mapping(struct drm_i915_pri
- 	count = 0;
- 	for (i = 0; i < child_device_num; i++) {
- 		p_child = &(p_defs->devices[i]);
--		if (!p_child->device_type) {
-+		if (!p_child->common.device_type) {
- 			/* skip the device block if device type is invalid */
- 			continue;
- 		}
---- a/drivers/gpu/drm/i915/intel_bios.h
-+++ b/drivers/gpu/drm/i915/intel_bios.h
-@@ -202,7 +202,10 @@ struct bdb_general_features {
- #define DEVICE_PORT_DVOB	0x01
- #define DEVICE_PORT_DVOC	0x02
- 
--struct child_device_config {
-+/* We used to keep this struct but without any version control. We should avoid
-+ * using it in the future, but it should be safe to keep using it in the old
-+ * code. */
-+struct old_child_dev_config {
- 	u16 handle;
- 	u16 device_type;
- 	u8  device_id[10]; /* ascii string */
-@@ -224,6 +227,32 @@ struct child_device_config {
- 	u8  dvo_function;
- } __attribute__((packed));
- 
-+/* This one contains field offsets that are known to be common for all BDB
-+ * versions. Notice that the meaning of the contents contents may still change,
-+ * but at least the offsets are consistent. */
-+struct common_child_dev_config {
-+	u16 handle;
-+	u16 device_type;
-+	u8 not_common1[12];
-+	u8 dvo_port;
-+	u8 not_common2[2];
-+	u8 ddc_pin;
-+	u16 edid_ptr;
-+} __attribute__((packed));
-+
-+/* This field changes depending on the BDB version, so the most reliable way to
-+ * read it is by checking the BDB version and reading the raw pointer. */
-+union child_device_config {
-+	/* This one is safe to be used anywhere, but the code should still check
-+	 * the BDB version. */
-+	u8 raw[33];
-+	/* This one should only be kept for legacy code. */
-+	struct old_child_dev_config old;
-+	/* This one should also be safe to use anywhere, even without version
-+	 * checks. */
-+	struct common_child_dev_config common;
-+};
-+
- struct bdb_general_definitions {
- 	/* DDC GPIO */
- 	u8 crt_ddc_gmbus_pin;
-@@ -249,7 +278,7 @@ struct bdb_general_definitions {
- 	 * number = (block_size - sizeof(bdb_general_definitions))/
- 	 *	     sizeof(child_device_config);
- 	 */
--	struct child_device_config devices[0];
-+	union child_device_config devices[0];
- } __attribute__((packed));
- 
- struct bdb_lvds_options {
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -3227,7 +3227,7 @@ intel_trans_dp_port_sel(struct drm_crtc
- bool intel_dpd_is_edp(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
--	struct child_device_config *p_child;
-+	union child_device_config *p_child;
- 	int i;
- 
- 	if (!dev_priv->vbt.child_dev_num)
-@@ -3236,8 +3236,8 @@ bool intel_dpd_is_edp(struct drm_device
- 	for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
- 		p_child = dev_priv->vbt.child_dev + i;
- 
--		if (p_child->dvo_port == PORT_IDPD &&
--		    p_child->device_type == DEVICE_TYPE_eDP)
-+		if (p_child->common.dvo_port == PORT_IDPD &&
-+		    p_child->common.device_type == DEVICE_TYPE_eDP)
- 			return true;
- 	}
- 	return false;
---- a/drivers/gpu/drm/i915/intel_lvds.c
-+++ b/drivers/gpu/drm/i915/intel_lvds.c
-@@ -810,7 +810,8 @@ static bool lvds_is_present_in_vbt(struc
- 		return true;
- 
- 	for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
--		struct child_device_config *child = dev_priv->vbt.child_dev + i;
-+		union child_device_config *uchild = dev_priv->vbt.child_dev + i;
-+		struct old_child_dev_config *child = &uchild->old;
- 
- 		/* If the device type is not LFP, continue.
- 		 * We have to check both the new identifiers as well as the
---- a/drivers/gpu/drm/i915/intel_tv.c
-+++ b/drivers/gpu/drm/i915/intel_tv.c
-@@ -1518,7 +1518,7 @@ static const struct drm_encoder_funcs in
- static int tv_is_present_in_vbt(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
--	struct child_device_config *p_child;
-+	union child_device_config *p_child;
- 	int i, ret;
- 
- 	if (!dev_priv->vbt.child_dev_num)
-@@ -1530,13 +1530,13 @@ static int tv_is_present_in_vbt(struct d
- 		/*
- 		 * If the device type is not TV, continue.
- 		 */
--		if (p_child->device_type != DEVICE_TYPE_INT_TV &&
--			p_child->device_type != DEVICE_TYPE_TV)
-+		if (p_child->old.device_type != DEVICE_TYPE_INT_TV &&
-+			p_child->old.device_type != DEVICE_TYPE_TV)
- 			continue;
- 		/* Only when the addin_offset is non-zero, it is regarded
- 		 * as present.
- 		 */
--		if (p_child->addin_offset) {
-+		if (p_child->old.addin_offset) {
- 			ret = 1;
- 			break;
- 		}
diff --git a/patches.baytrail/0906-drm-i915-use-the-HDMI-DDI-buffer-translations-from-V.patch b/patches.baytrail/0906-drm-i915-use-the-HDMI-DDI-buffer-translations-from-V.patch
deleted file mode 100644
index 71578ff82542c..0000000000000
--- a/patches.baytrail/0906-drm-i915-use-the-HDMI-DDI-buffer-translations-from-V.patch
+++ /dev/null
@@ -1,247 +0,0 @@
-From 12d2a77de36195027194674b657edda53ce3cce4 Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Thu, 12 Sep 2013 17:06:24 -0300
-Subject: drm/i915: use the HDMI DDI buffer translations from VBT
-
-We currently use the recommended values from BSpec, but the VBT
-specifies the correct value to use for the hardware we have, so use
-it. We also fall back to the recommended value in case we can't find
-the VBT.
-
-In addition, this code also provides some infrastructure to parse more
-information about the DDI ports. There's a lot more information we
-could extract and use in the future.
-
-v2: - Move some code to init_vbt_defaults.
-v3: - Rebase
-    - Clarify the "DVO Port" matching code
-v4: - Use I915_MAX_PORTS
-    - Change the HAS_DDI checks
-    - Replace DRM_ERROR with DRM_DEBUG_KMS
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 6acab15a7b0d2722924c5d671cb29974791beece)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h   |  6 +++
- drivers/gpu/drm/i915/intel_bios.c | 77 +++++++++++++++++++++++++++++++++++++++
- drivers/gpu/drm/i915/intel_bios.h | 13 +++++++
- drivers/gpu/drm/i915/intel_ddi.c  | 24 +++++++++++-
- 4 files changed, 118 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 9868a66ef59c..2eca286b57ff 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1057,6 +1057,10 @@ enum modeset_restore {
- 	MODESET_SUSPENDED,
- };
- 
-+struct ddi_vbt_port_info {
-+	uint8_t hdmi_level_shift;
-+};
-+
- struct intel_vbt_data {
- 	struct drm_display_mode *lfp_lvds_vbt_mode; /* if any */
- 	struct drm_display_mode *sdvo_lvds_vbt_mode; /* if any */
-@@ -1091,6 +1095,8 @@ struct intel_vbt_data {
- 
- 	int child_dev_num;
- 	union child_device_config *child_dev;
-+
-+	struct ddi_vbt_port_info ddi_port_info[I915_MAX_PORTS];
- };
- 
- enum intel_ddb_partitioning {
-diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
-index 33003b97f1f0..2f434297246e 100644
---- a/drivers/gpu/drm/i915/intel_bios.c
-+++ b/drivers/gpu/drm/i915/intel_bios.c
-@@ -583,6 +583,76 @@ parse_mipi(struct drm_i915_private *dev_priv, struct bdb_header *bdb)
- 	dev_priv->vbt.dsi.panel_id = mipi->panel_id;
- }
- 
-+static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
-+			   struct bdb_header *bdb)
-+{
-+	union child_device_config *it, *child = NULL;
-+	struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port];
-+	uint8_t hdmi_level_shift;
-+	int i, j;
-+	/* Each DDI port can have more than one value on the "DVO Port" field,
-+	 * so look for all the possible values for each port and abort if more
-+	 * than one is found. */
-+	int dvo_ports[][2] = {
-+		{DVO_PORT_HDMIA, DVO_PORT_DPA},
-+		{DVO_PORT_HDMIB, DVO_PORT_DPB},
-+		{DVO_PORT_HDMIC, DVO_PORT_DPC},
-+		{DVO_PORT_HDMID, DVO_PORT_DPD},
-+		{DVO_PORT_CRT, -1 /* Port E can only be DVO_PORT_CRT */ },
-+	};
-+
-+	/* Find the child device to use, abort if more than one found. */
-+	for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
-+		it = dev_priv->vbt.child_dev + i;
-+
-+		for (j = 0; j < 2; j++) {
-+			if (dvo_ports[port][j] == -1)
-+				break;
-+
-+			if (it->common.dvo_port == dvo_ports[port][j]) {
-+				if (child) {
-+					DRM_DEBUG_KMS("More than one child device for port %c in VBT.\n",
-+						      port_name(port));
-+					return;
-+				}
-+				child = it;
-+			}
-+		}
-+	}
-+	if (!child)
-+		return;
-+
-+	if (bdb->version >= 158) {
-+		/* The VBT HDMI level shift values match the table we have. */
-+		hdmi_level_shift = child->raw[7] & 0xF;
-+		if (hdmi_level_shift < 0xC) {
-+			DRM_DEBUG_KMS("VBT HDMI level shift for port %c: %d\n",
-+				      port_name(port),
-+				      hdmi_level_shift);
-+			info->hdmi_level_shift = hdmi_level_shift;
-+		}
-+	}
-+}
-+
-+static void parse_ddi_ports(struct drm_i915_private *dev_priv,
-+			    struct bdb_header *bdb)
-+{
-+	struct drm_device *dev = dev_priv->dev;
-+	enum port port;
-+
-+	if (!HAS_DDI(dev))
-+		return;
-+
-+	if (!dev_priv->vbt.child_dev_num)
-+		return;
-+
-+	if (bdb->version < 155)
-+		return;
-+
-+	for (port = PORT_A; port < I915_MAX_PORTS; port++)
-+		parse_ddi_port(dev_priv, port, bdb);
-+}
-+
- static void
- parse_device_mapping(struct drm_i915_private *dev_priv,
- 		       struct bdb_header *bdb)
-@@ -652,6 +722,7 @@ static void
- init_vbt_defaults(struct drm_i915_private *dev_priv)
- {
- 	struct drm_device *dev = dev_priv->dev;
-+	enum port port;
- 
- 	dev_priv->vbt.crt_ddc_pin = GMBUS_PORT_VGADDC;
- 
-@@ -670,6 +741,11 @@ init_vbt_defaults(struct drm_i915_private *dev_priv)
- 	dev_priv->vbt.lvds_use_ssc = 1;
- 	dev_priv->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(dev, 1);
- 	DRM_DEBUG_KMS("Set default to SSC at %dMHz\n", dev_priv->vbt.lvds_ssc_freq);
-+
-+	for (port = PORT_A; port < I915_MAX_PORTS; port++) {
-+		/* Recommended BSpec default: 800mV 0dB. */
-+		dev_priv->vbt.ddi_port_info[port].hdmi_level_shift = 6;
-+	}
- }
- 
- static int __init intel_no_opregion_vbt_callback(const struct dmi_system_id *id)
-@@ -761,6 +837,7 @@ intel_parse_bios(struct drm_device *dev)
- 	parse_driver_features(dev_priv, bdb);
- 	parse_edp(dev_priv, bdb);
- 	parse_mipi(dev_priv, bdb);
-+	parse_ddi_ports(dev_priv, bdb);
- 
- 	if (bios)
- 		pci_unmap_rom(pdev, bios);
-diff --git a/drivers/gpu/drm/i915/intel_bios.h b/drivers/gpu/drm/i915/intel_bios.h
-index 1da2bf208299..287cc5a21c2e 100644
---- a/drivers/gpu/drm/i915/intel_bios.h
-+++ b/drivers/gpu/drm/i915/intel_bios.h
-@@ -648,6 +648,19 @@ int intel_parse_bios(struct drm_device *dev);
- #define		PORT_IDPC	8
- #define		PORT_IDPD	9
- 
-+/* Possible values for the "DVO Port" field for versions >= 155: */
-+#define DVO_PORT_HDMIA	0
-+#define DVO_PORT_HDMIB	1
-+#define DVO_PORT_HDMIC	2
-+#define DVO_PORT_HDMID	3
-+#define DVO_PORT_LVDS	4
-+#define DVO_PORT_TV	5
-+#define DVO_PORT_CRT	6
-+#define DVO_PORT_DPB	7
-+#define DVO_PORT_DPC	8
-+#define DVO_PORT_DPD	9
-+#define DVO_PORT_DPA	10
-+
- /* MIPI DSI panel info */
- struct bdb_mipi {
- 	u16 panel_id;
-diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
-index 351e21a0be07..963245a104e4 100644
---- a/drivers/gpu/drm/i915/intel_ddi.c
-+++ b/drivers/gpu/drm/i915/intel_ddi.c
-@@ -42,7 +42,6 @@ static const u32 hsw_ddi_translations_dp[] = {
- 	0x80C30FFF, 0x000B0000,
- 	0x00FFFFFF, 0x00040006,
- 	0x80D75FFF, 0x000B0000,
--	0x00FFFFFF, 0x00040006		/* HDMI parameters */
- };
- 
- static const u32 hsw_ddi_translations_fdi[] = {
-@@ -55,7 +54,22 @@ static const u32 hsw_ddi_translations_fdi[] = {
- 	0x00C30FFF, 0x001E0000,
- 	0x00FFFFFF, 0x00060006,
- 	0x00D75FFF, 0x001E0000,
--	0x00FFFFFF, 0x00040006		/* HDMI parameters */
-+};
-+
-+static const u32 hsw_ddi_translations_hdmi[] = {
-+				/* Idx	NT mV diff	T mV diff	db  */
-+	0x00FFFFFF, 0x0006000E, /* 0:	400		400		0   */
-+	0x00E79FFF, 0x000E000C, /* 1:	400		500		2   */
-+	0x00D75FFF, 0x0005000A, /* 2:	400		600		3.5 */
-+	0x00FFFFFF, 0x0005000A, /* 3:	600		600		0   */
-+	0x00E79FFF, 0x001D0007, /* 4:	600		750		2   */
-+	0x00D75FFF, 0x000C0004, /* 5:	600		900		3.5 */
-+	0x00FFFFFF, 0x00040006, /* 6:	800		800		0   */
-+	0x80E79FFF, 0x00030002, /* 7:	800		1000		2   */
-+	0x00FFFFFF, 0x00140005, /* 8:	850		850		0   */
-+	0x00FFFFFF, 0x000C0004, /* 9:	900		900		0   */
-+	0x00FFFFFF, 0x001C0003, /* 10:	950		950		0   */
-+	0x80FFFFFF, 0x00030002, /* 11:	1000		1000		0   */
- };
- 
- enum port intel_ddi_get_encoder_port(struct intel_encoder *intel_encoder)
-@@ -92,12 +106,18 @@ static void intel_prepare_ddi_buffers(struct drm_device *dev, enum port port)
- 	const u32 *ddi_translations = (port == PORT_E) ?
- 		hsw_ddi_translations_fdi :
- 		hsw_ddi_translations_dp;
-+	int hdmi_level = dev_priv->vbt.ddi_port_info[port].hdmi_level_shift;
- 
- 	for (i = 0, reg = DDI_BUF_TRANS(port);
- 	     i < ARRAY_SIZE(hsw_ddi_translations_fdi); i++) {
- 		I915_WRITE(reg, ddi_translations[i]);
- 		reg += 4;
- 	}
-+	/* Entry 9 is for HDMI: */
-+	for (i = 0; i < 2; i++) {
-+		I915_WRITE(reg, hsw_ddi_translations_hdmi[hdmi_level * 2 + i]);
-+		reg += 4;
-+	}
- }
- 
- /* Program DDI buffers translations for DP. By default, program ports A-D in DP
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0907-drm-i915-check-the-DDC-and-AUX-bits-of-the-VBT-on-DD.patch b/patches.baytrail/0907-drm-i915-check-the-DDC-and-AUX-bits-of-the-VBT-on-DD.patch
deleted file mode 100644
index 0b2ce03131288..0000000000000
--- a/patches.baytrail/0907-drm-i915-check-the-DDC-and-AUX-bits-of-the-VBT-on-DD.patch
+++ /dev/null
@@ -1,72 +0,0 @@
-From 7733fc633060f49699fe1317211f8846dd195994 Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Thu, 12 Sep 2013 17:07:55 -0300
-Subject: drm/i915: check the DDC and AUX bits of the VBT on DDI machines
-
-Our code currently assumes that port X will use the DP AUX channel X
-and the DDC pin X. The VBT should tell us how things are mapped, so
-add some WARNs in case we discover our assumptions are wrong (or in
-case the VBT is just wrong, which is also perfectly possible).
-
-Why would someone wire port B to AUX C and DDC D?
-
-v2: Rebase
-v3: Convert WARNs to DRM_DEBUG_KMS
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com> (v1)
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 6bf19e7c548d465efa719838754ec3b63ef078d4)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_bios.c | 27 +++++++++++++++++++++++++++
- 1 file changed, 27 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
-index 2f434297246e..12e4fd18076d 100644
---- a/drivers/gpu/drm/i915/intel_bios.c
-+++ b/drivers/gpu/drm/i915/intel_bios.c
-@@ -590,6 +590,8 @@ static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
- 	struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port];
- 	uint8_t hdmi_level_shift;
- 	int i, j;
-+	bool is_dvi, is_dp;
-+	uint8_t aux_channel;
- 	/* Each DDI port can have more than one value on the "DVO Port" field,
- 	 * so look for all the possible values for each port and abort if more
- 	 * than one is found. */
-@@ -622,6 +624,31 @@ static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
- 	if (!child)
- 		return;
- 
-+	aux_channel = child->raw[25];
-+
-+	is_dvi = child->common.device_type & (1 << 4);
-+	is_dp = child->common.device_type & (1 << 2);
-+
-+	if (is_dvi) {
-+		if (child->common.ddc_pin == 0x05 && port != PORT_B)
-+			DRM_DEBUG_KMS("Unexpected DDC pin for port B\n");
-+		if (child->common.ddc_pin == 0x04 && port != PORT_C)
-+			DRM_DEBUG_KMS("Unexpected DDC pin for port C\n");
-+		if (child->common.ddc_pin == 0x06 && port != PORT_D)
-+			DRM_DEBUG_KMS("Unexpected DDC pin for port D\n");
-+	}
-+
-+	if (is_dp) {
-+		if (aux_channel == 0x40 && port != PORT_A)
-+			DRM_DEBUG_KMS("Unexpected AUX channel for port A\n");
-+		if (aux_channel == 0x10 && port != PORT_B)
-+			DRM_DEBUG_KMS("Unexpected AUX channel for port B\n");
-+		if (aux_channel == 0x20 && port != PORT_C)
-+			DRM_DEBUG_KMS("Unexpected AUX channel for port C\n");
-+		if (aux_channel == 0x30 && port != PORT_D)
-+			DRM_DEBUG_KMS("Unexpected AUX channel for port D\n");
-+	}
-+
- 	if (bdb->version >= 158) {
- 		/* The VBT HDMI level shift values match the table we have. */
- 		hdmi_level_shift = child->raw[7] & 0xF;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0908-drm-i915-add-some-assertions-about-VBT-DDI-port-type.patch b/patches.baytrail/0908-drm-i915-add-some-assertions-about-VBT-DDI-port-type.patch
deleted file mode 100644
index 0002b5baf8692..0000000000000
--- a/patches.baytrail/0908-drm-i915-add-some-assertions-about-VBT-DDI-port-type.patch
+++ /dev/null
@@ -1,78 +0,0 @@
-From 92adb69511d679c79dfc5fc88b61fc5a04bed3b7 Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Thu, 12 Sep 2013 17:10:11 -0300
-Subject: drm/i915: add some assertions about VBT DDI port types
-
-Our code makes a lot of assumptions regarding what each DDI port
-actually supports, and the VBT should tell us what is really happening
-in the hardware. So parse the information provided by the VBT and
-check if any of our assumptions is wrong.
-
-Our driver also has a history of not really trusting the VBT, so a
-WARN here could mean that:
- a) our coding assumptions are wrong
- b) the VBT is wrong
- c) we're incorrectly parsing the VBT
- d) the checks are wrong
-
-But I really hope we won't ever trigger any of those WARNs.
-
-v2: Don't check the redundant "Capabilities" field from byte 24 since
-    it doesn't seem to be used.
-v3: Rebase
-v4: Replace WARN with DRM_DEBUG_KMS
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com> (v2)
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 554d6af50a40125c28e4e1035527a684d2607266)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_bios.c | 24 +++++++++++++++++++++++-
- 1 file changed, 23 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
-index 12e4fd18076d..7ce1c3c2f0f1 100644
---- a/drivers/gpu/drm/i915/intel_bios.c
-+++ b/drivers/gpu/drm/i915/intel_bios.c
-@@ -590,7 +590,7 @@ static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
- 	struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port];
- 	uint8_t hdmi_level_shift;
- 	int i, j;
--	bool is_dvi, is_dp;
-+	bool is_dvi, is_hdmi, is_dp, is_edp, is_crt;
- 	uint8_t aux_channel;
- 	/* Each DDI port can have more than one value on the "DVO Port" field,
- 	 * so look for all the possible values for each port and abort if more
-@@ -628,6 +628,28 @@ static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
- 
- 	is_dvi = child->common.device_type & (1 << 4);
- 	is_dp = child->common.device_type & (1 << 2);
-+	is_crt = child->common.device_type & (1 << 0);
-+	is_hdmi = is_dvi && (child->common.device_type & (1 << 11)) == 0;
-+	is_edp = is_dp && (child->common.device_type & (1 << 12));
-+
-+	DRM_DEBUG_KMS("Port %c VBT info: DP:%d HDMI:%d DVI:%d EDP:%d CRT:%d\n",
-+		      port_name(port), is_dp, is_hdmi, is_dvi, is_edp, is_crt);
-+
-+	if (is_edp && is_dvi)
-+		DRM_DEBUG_KMS("Internal DP port %c is TMDS compatible\n",
-+			      port_name(port));
-+	if (is_crt && port != PORT_E)
-+		DRM_DEBUG_KMS("Port %c is analog\n", port_name(port));
-+	if (is_crt && (is_dvi || is_dp))
-+		DRM_DEBUG_KMS("Analog port %c is also DP or TMDS compatible\n",
-+			      port_name(port));
-+	if (is_dvi && (port == PORT_A || port == PORT_E))
-+		DRM_DEBUG_KMS("Port %c is TMDS compabile\n", port_name(port));
-+	if (!is_dvi && !is_dp && !is_crt)
-+		DRM_DEBUG_KMS("Port %c is not DP/TMDS/CRT compatible\n",
-+			      port_name(port));
-+	if (is_edp && (port == PORT_B || port == PORT_C || port == PORT_E))
-+		DRM_DEBUG_KMS("Port %c is internal DP\n", port_name(port));
- 
- 	if (is_dvi) {
- 		if (child->common.ddc_pin == 0x05 && port != PORT_B)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0909-drm-i915-don-t-init-DP-or-HDMI-when-not-supported-by.patch b/patches.baytrail/0909-drm-i915-don-t-init-DP-or-HDMI-when-not-supported-by.patch
deleted file mode 100644
index 56e5160e55cd5..0000000000000
--- a/patches.baytrail/0909-drm-i915-don-t-init-DP-or-HDMI-when-not-supported-by.patch
+++ /dev/null
@@ -1,114 +0,0 @@
-From 967a46c8ee17a3819d38753be3518862c85b6a87 Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Thu, 12 Sep 2013 17:12:18 -0300
-Subject: drm/i915: don't init DP or HDMI when not supported by DDI port
-
-There's no reason to init a DP connector if the encoder just supports
-HDMI: we'll just waste hundreds and hundreds of cycles trying to do DP
-AUX transactions to detect if there's something there. Same goes for a
-DP connector that doesn't support HDMI, but I'm not sure these
-actually exist.
-
-v2: - Use bit fields
-    - Remove useless identation level
-    - Replace DRM_ERROR with DRM_DEBUG_KMS
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com> (v1)
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 311a20949f047a70935d6591010f42336f5402e7)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h   |    4 ++++
- drivers/gpu/drm/i915/intel_bios.c |   13 ++++++++++++-
- drivers/gpu/drm/i915/intel_ddi.c  |   20 ++++++++++++++++----
- 3 files changed, 32 insertions(+), 5 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1059,6 +1059,10 @@ enum modeset_restore {
- 
- struct ddi_vbt_port_info {
- 	uint8_t hdmi_level_shift;
-+
-+	uint8_t supports_dvi:1;
-+	uint8_t supports_hdmi:1;
-+	uint8_t supports_dp:1;
- };
- 
- struct intel_vbt_data {
---- a/drivers/gpu/drm/i915/intel_bios.c
-+++ b/drivers/gpu/drm/i915/intel_bios.c
-@@ -632,6 +632,10 @@ static void parse_ddi_port(struct drm_i9
- 	is_hdmi = is_dvi && (child->common.device_type & (1 << 11)) == 0;
- 	is_edp = is_dp && (child->common.device_type & (1 << 12));
- 
-+	info->supports_dvi = is_dvi;
-+	info->supports_hdmi = is_hdmi;
-+	info->supports_dp = is_dp;
-+
- 	DRM_DEBUG_KMS("Port %c VBT info: DP:%d HDMI:%d DVI:%d EDP:%d CRT:%d\n",
- 		      port_name(port), is_dp, is_hdmi, is_dvi, is_edp, is_crt);
- 
-@@ -792,8 +796,15 @@ init_vbt_defaults(struct drm_i915_privat
- 	DRM_DEBUG_KMS("Set default to SSC at %dMHz\n", dev_priv->vbt.lvds_ssc_freq);
- 
- 	for (port = PORT_A; port < I915_MAX_PORTS; port++) {
-+		struct ddi_vbt_port_info *info =
-+			&dev_priv->vbt.ddi_port_info[port];
-+
- 		/* Recommended BSpec default: 800mV 0dB. */
--		dev_priv->vbt.ddi_port_info[port].hdmi_level_shift = 6;
-+		info->hdmi_level_shift = 6;
-+
-+		info->supports_dvi = (port != PORT_A && port != PORT_E);
-+		info->supports_hdmi = info->supports_dvi;
-+		info->supports_dp = (port != PORT_E);
- 	}
- }
- 
---- a/drivers/gpu/drm/i915/intel_ddi.c
-+++ b/drivers/gpu/drm/i915/intel_ddi.c
-@@ -1362,6 +1362,17 @@ void intel_ddi_init(struct drm_device *d
- 	struct drm_encoder *encoder;
- 	struct intel_connector *hdmi_connector = NULL;
- 	struct intel_connector *dp_connector = NULL;
-+	bool init_hdmi, init_dp;
-+
-+	init_hdmi = (dev_priv->vbt.ddi_port_info[port].supports_dvi ||
-+		     dev_priv->vbt.ddi_port_info[port].supports_hdmi);
-+	init_dp = dev_priv->vbt.ddi_port_info[port].supports_dp;
-+	if (!init_dp && !init_hdmi) {
-+		DRM_DEBUG_KMS("VBT says port %c is not DVI/HDMI/DP compatible\n",
-+			      port_name(port));
-+		init_hdmi = true;
-+		init_dp = true;
-+	}
- 
- 	intel_dig_port = kzalloc(sizeof(*intel_dig_port), GFP_KERNEL);
- 	if (!intel_dig_port)
-@@ -1399,19 +1410,20 @@ void intel_ddi_init(struct drm_device *d
- 	intel_encoder->cloneable = false;
- 	intel_encoder->hot_plug = intel_ddi_hot_plug;
- 
--	if (!intel_dp_init_connector(intel_dig_port, dp_connector)) {
-+	if (init_dp && !intel_dp_init_connector(intel_dig_port, dp_connector)) {
- 		drm_encoder_cleanup(encoder);
- 		kfree(intel_dig_port);
- 		kfree(dp_connector);
- 		return;
- 	}
- 
--	if (intel_encoder->type != INTEL_OUTPUT_EDP) {
-+	/* In theory we don't need the encoder->type check, but leave it just in
-+	 * case we have some really bad VBTs... */
-+	if (intel_encoder->type != INTEL_OUTPUT_EDP && init_hdmi) {
- 		hdmi_connector = kzalloc(sizeof(*hdmi_connector),
- 					 GFP_KERNEL);
--		if (!hdmi_connector) {
-+		if (!hdmi_connector)
- 			return;
--		}
- 
- 		intel_dig_port->hdmi.hdmi_reg = DDI_BUF_CTL(port);
- 		intel_hdmi_init_connector(intel_dig_port, hdmi_connector);
diff --git a/patches.baytrail/0910-drm-i915-Rip-out-SUPPORTS_EDP.patch b/patches.baytrail/0910-drm-i915-Rip-out-SUPPORTS_EDP.patch
deleted file mode 100644
index 43af06b94bb59..0000000000000
--- a/patches.baytrail/0910-drm-i915-Rip-out-SUPPORTS_EDP.patch
+++ /dev/null
@@ -1,70 +0,0 @@
-From f6fd3d59f578b6c742cd9559add92f31e4583637 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Sat, 21 Sep 2013 00:48:39 +0200
-Subject: drm/i915: Rip out SUPPORTS_EDP
-
-It only controls the setting of the vbt.edp_support variable, which in
-turn only controls one debug output plus can also force-disable the
-lvds output.
-
-Since the value only restricted this logic to mobile ilk there's the
-slight risk that this will break lvds on desktop ilk or on snb/ivb
-platforms. But with the vbt it's better when we know what's going on
-here, so let's rip it out and see what happens.
-
-Cc: Ben Widawsky <benjamin.widawsky@intel.com>
-Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 6fca55b11408f1005a94d44c608cf82bc477cbdb)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h   | 1 -
- drivers/gpu/drm/i915/intel_bios.c | 6 ++----
- 2 files changed, 2 insertions(+), 5 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index b1485a008b04..07de53c40e57 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1672,7 +1672,6 @@ struct drm_i915_file_private {
- #define SUPPORTS_DIGITAL_OUTPUTS(dev)	(!IS_GEN2(dev) && !IS_PINEVIEW(dev))
- #define SUPPORTS_INTEGRATED_HDMI(dev)	(IS_G4X(dev) || IS_GEN5(dev))
- #define SUPPORTS_INTEGRATED_DP(dev)	(IS_G4X(dev) || IS_GEN5(dev))
--#define SUPPORTS_EDP(dev)		(IS_IRONLAKE_M(dev))
- #define SUPPORTS_TV(dev)		(INTEL_INFO(dev)->supports_tv)
- #define I915_HAS_HOTPLUG(dev)		 (INTEL_INFO(dev)->has_hotplug)
- 
-diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
-index 0492b6fff10d..e29bcae1ef81 100644
---- a/drivers/gpu/drm/i915/intel_bios.c
-+++ b/drivers/gpu/drm/i915/intel_bios.c
-@@ -477,15 +477,13 @@ static void
- parse_driver_features(struct drm_i915_private *dev_priv,
- 		       struct bdb_header *bdb)
- {
--	struct drm_device *dev = dev_priv->dev;
- 	struct bdb_driver_features *driver;
- 
- 	driver = find_section(bdb, BDB_DRIVER_FEATURES);
- 	if (!driver)
- 		return;
- 
--	if (SUPPORTS_EDP(dev) &&
--	    driver->lvds_config == BDB_DRIVER_FEATURE_EDP)
-+	if (driver->lvds_config == BDB_DRIVER_FEATURE_EDP)
- 		dev_priv->vbt.edp_support = 1;
- 
- 	if (driver->dual_frequency)
-@@ -501,7 +499,7 @@ parse_edp(struct drm_i915_private *dev_priv, struct bdb_header *bdb)
- 
- 	edp = find_section(bdb, BDB_EDP);
- 	if (!edp) {
--		if (SUPPORTS_EDP(dev_priv->dev) && dev_priv->vbt.edp_support)
-+		if (dev_priv->vbt.edp_support)
- 			DRM_DEBUG_KMS("No eDP BDB found but eDP panel supported.\n");
- 		return;
- 	}
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0911-drm-i915-Fix-unclaimed-register-access-due-to-delaye.patch b/patches.baytrail/0911-drm-i915-Fix-unclaimed-register-access-due-to-delaye.patch
deleted file mode 100644
index 0446bafa74573..0000000000000
--- a/patches.baytrail/0911-drm-i915-Fix-unclaimed-register-access-due-to-delaye.patch
+++ /dev/null
@@ -1,86 +0,0 @@
-From f0b604bc081eb78737212cb27f2c454a9e6928d6 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Fri, 20 Sep 2013 10:14:23 +0300
-Subject: drm/i915: Fix unclaimed register access due to delayed VGA memory
- disable
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-VGA registers live inside the power well on HSW, so in order to write
-the VGA MSR register we need the power well to be on.
-
-We really must write to the register to properly clear the
-VGA_MSR_MEM_EN enable bit, even if all VGA registers get zeroed when
-the power well is down. It seems that the implicit zeroing done by
-the power well is not enough to propagate the VGA_MSR_MEM_EN bit to
-whomever is actually responsible for the memory decode ranges.
-
-If we leave VGA memory decode enabled, and then turn off the power well,
-all VGA memory reads will return zeroes. But if we first disable VGA
-memory deocde and then turn off the power well, VGA memory reads
-return all ones, indicating that the access wasn't claimed by anyone.
-For the vga arbiter to function correctly the IGD must not claim the
-VGA memory accesses.
-
-Previously we were doing the VGA_MSR register access while the power well
-was excplicitly powered up during driver init. But ever since
-
- commit 6e1b4fdad5157bb9e88777d525704aba24389bee
- Author: Ville Syrjälä <ville.syrjala@linux.intel.com>
- Date:   Thu Sep 5 20:40:52 2013 +0300
-
-    drm/i915: Delay disabling of VGA memory until vgacon->fbcon handoff is done
-
-we delay the VGA memory disable until fbcon has initialized, and so
-there's a possibility that the power well got turned off during the
-fbcon modeset. Also vgacon_save_screen() will need the power well to be
-on to be able to read the VGA memory.
-
-So immediately after enabling the power well during init grab a refence
-for VGA purposes, and after all the VGA handling is done, release it.
-
-v2: Add intel_display_power_put() for the num_pipes==0 case
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-[danvet: Fix up the patch wiggle screw-up that I've done and which
-Paulo catched. Also polish spelling in the patch headline.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit ce352550327b394f3072a07c9cd9d27af9276f15)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_dma.c |    8 +++++++-
- 1 file changed, 7 insertions(+), 1 deletion(-)
-
---- a/drivers/gpu/drm/i915/i915_dma.c
-+++ b/drivers/gpu/drm/i915/i915_dma.c
-@@ -1334,13 +1334,18 @@ static int i915_load_modeset_init(struct
- 
- 	intel_init_power_well(dev);
- 
-+	/* Keep VGA alive until i915_disable_vga_mem() */
-+	intel_display_power_get(dev, POWER_DOMAIN_VGA);
-+
- 	intel_modeset_gem_init(dev);
- 
- 	/* Always safe in the mode setting case. */
- 	/* FIXME: do pre/post-mode set stuff in core KMS code */
- 	dev->vblank_disable_allowed = 1;
--	if (INTEL_INFO(dev)->num_pipes == 0)
-+	if (INTEL_INFO(dev)->num_pipes == 0) {
-+		intel_display_power_put(dev, POWER_DOMAIN_VGA);
- 		return 0;
-+	}
- 
- 	ret = intel_fbdev_init(dev);
- 	if (ret)
-@@ -1366,6 +1371,7 @@ static int i915_load_modeset_init(struct
- 	 * vgacon_save_screen() works during the handover.
- 	 */
- 	i915_disable_vga_mem(dev);
-+	intel_display_power_put(dev, POWER_DOMAIN_VGA);
- 
- 	/* Only enable hotplug handling once the fbdev is fully set up. */
- 	dev_priv->enable_hotplug_processing = true;
diff --git a/patches.baytrail/0912-drm-i915-Redisable-VGA-before-the-modeset-on-resume.patch b/patches.baytrail/0912-drm-i915-Redisable-VGA-before-the-modeset-on-resume.patch
deleted file mode 100644
index c1deffb2e62f3..0000000000000
--- a/patches.baytrail/0912-drm-i915-Redisable-VGA-before-the-modeset-on-resume.patch
+++ /dev/null
@@ -1,50 +0,0 @@
-From a65e8f1ff8c97f7203465e4f5d38b03b7ce8e7b3 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Mon, 16 Sep 2013 17:38:33 +0300
-Subject: drm/i915: Redisable VGA before the modeset on resume
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The VGA plane needs to be disabled before we start doing any
-modeset operations on resume.
-
-This should also guarantee that the power well will be enabled
-when we call i915_redisable_vga() since it gets explicitly powered on
-during resume, and will get powered back off during the modeset
-operation if no longer needed.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 7d0bc1ea50e7b3fb1c7a52918611baba8750177d)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 3ada4e8ef57a..4a78809804ff 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -10684,6 +10684,8 @@ void intel_modeset_setup_hw_state(struct drm_device *dev,
- 	}
- 
- 	if (force_restore) {
-+		i915_redisable_vga(dev);
-+
- 		/*
- 		 * We need to use raw interfaces for restoring state to avoid
- 		 * checking (bogus) intermediate states.
-@@ -10697,8 +10699,6 @@ void intel_modeset_setup_hw_state(struct drm_device *dev,
- 		}
- 		list_for_each_entry(plane, &dev->mode_config.plane_list, head)
- 			intel_plane_restore(plane);
--
--		i915_redisable_vga(dev);
- 	} else {
- 		intel_modeset_update_staged_output_state(dev);
- 	}
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0913-drm-i915-Move-power-well-init-earlier-during-driver-.patch b/patches.baytrail/0913-drm-i915-Move-power-well-init-earlier-during-driver-.patch
deleted file mode 100644
index 69ce8a847e9e2..0000000000000
--- a/patches.baytrail/0913-drm-i915-Move-power-well-init-earlier-during-driver-.patch
+++ /dev/null
@@ -1,61 +0,0 @@
-From f957e1bea70dee8fb5605e455bca738d6e3cd898 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Mon, 16 Sep 2013 17:38:34 +0300
-Subject: drm/i915: Move power well init earlier during driver load
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-intel_modeset_init() will already attempt to disable VGA. In order to do
-that, it needs the power well to be on. So move the power well init
-to happen before intel_modeset_init() during driver load.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit a14853206517b0c8102accbc77401805a0dbdb9e)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_dma.c |   15 ++++++++-------
- 1 file changed, 8 insertions(+), 7 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_dma.c
-+++ b/drivers/gpu/drm/i915/i915_dma.c
-@@ -1322,21 +1322,21 @@ static int i915_load_modeset_init(struct
- 	if (ret)
- 		goto cleanup_gem_stolen;
- 
-+	intel_init_power_well(dev);
-+
-+	/* Keep VGA alive until i915_disable_vga_mem() */
-+	intel_display_power_get(dev, POWER_DOMAIN_VGA);
-+
- 	/* Important: The output setup functions called by modeset_init need
- 	 * working irqs for e.g. gmbus and dp aux transfers. */
- 	intel_modeset_init(dev);
- 
- 	ret = i915_gem_init(dev);
- 	if (ret)
--		goto cleanup_irq;
-+		goto cleanup_power;
- 
- 	INIT_WORK(&dev_priv->console_resume_work, intel_console_resume);
- 
--	intel_init_power_well(dev);
--
--	/* Keep VGA alive until i915_disable_vga_mem() */
--	intel_display_power_get(dev, POWER_DOMAIN_VGA);
--
- 	intel_modeset_gem_init(dev);
- 
- 	/* Always safe in the mode setting case. */
-@@ -1387,7 +1387,8 @@ cleanup_gem:
- 	mutex_unlock(&dev->struct_mutex);
- 	i915_gem_cleanup_aliasing_ppgtt(dev);
- 	drm_mm_takedown(&dev_priv->gtt.base.mm);
--cleanup_irq:
-+cleanup_power:
-+	intel_display_power_put(dev, POWER_DOMAIN_VGA);
- 	drm_irq_uninstall(dev);
- cleanup_gem_stolen:
- 	i915_gem_cleanup_stolen(dev);
diff --git a/patches.baytrail/0914-drm-i915-Move-power-well-resume-earlier.patch b/patches.baytrail/0914-drm-i915-Move-power-well-resume-earlier.patch
deleted file mode 100644
index 75b73da5a5e00..0000000000000
--- a/patches.baytrail/0914-drm-i915-Move-power-well-resume-earlier.patch
+++ /dev/null
@@ -1,46 +0,0 @@
-From ccb93711919182bb1f3af62eab7a43b33388820f Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Mon, 16 Sep 2013 17:38:35 +0300
-Subject: drm/i915: Move power well resume earlier
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-i915_restore_state() -> i915_restore_display() will attempt to
-re-disable VGA during resume. So the power well needs to be powered on
-before that.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit ebdcefc6eb209b5197d2f0f73bcc9b0396fdf53e)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
-index 6f385e1e9ed6..827c274a8f20 100644
---- a/drivers/gpu/drm/i915/i915_drv.c
-+++ b/drivers/gpu/drm/i915/i915_drv.c
-@@ -590,6 +590,8 @@ static int __i915_drm_thaw(struct drm_device *dev, bool restore_gtt_mappings)
- 		mutex_unlock(&dev->struct_mutex);
- 	}
- 
-+	intel_init_power_well(dev);
-+
- 	i915_restore_state(dev);
- 	intel_opregion_setup(dev);
- 
-@@ -605,8 +607,6 @@ static int __i915_drm_thaw(struct drm_device *dev, bool restore_gtt_mappings)
- 		/* We need working interrupts for modeset enabling ... */
- 		drm_irq_install(dev);
- 
--		intel_init_power_well(dev);
--
- 		intel_modeset_init_hw(dev);
- 
- 		drm_modeset_lock_all(dev);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0915-drm-i915-Call-intel_uncore_early_sanitize-during-res.patch b/patches.baytrail/0915-drm-i915-Call-intel_uncore_early_sanitize-during-res.patch
deleted file mode 100644
index 6105d410b0c10..0000000000000
--- a/patches.baytrail/0915-drm-i915-Call-intel_uncore_early_sanitize-during-res.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From 6de125fdd41cd5a987dff1c6d7023c3f6325dc62 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Mon, 16 Sep 2013 17:38:36 +0300
-Subject: drm/i915: Call intel_uncore_early_sanitize() during resume
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Call intel_uncore_early_sanitize() first thing during resume to prevent
-stale BIOS leftovers from being reported as unclaimed register access.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit c9f7fbf9ed05eb92d63a2f4afbd76020572a0dbd)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.c | 2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
-index 827c274a8f20..8ebb0d12e912 100644
---- a/drivers/gpu/drm/i915/i915_drv.c
-+++ b/drivers/gpu/drm/i915/i915_drv.c
-@@ -581,6 +581,8 @@ static int __i915_drm_thaw(struct drm_device *dev, bool restore_gtt_mappings)
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	int error = 0;
- 
-+	intel_uncore_early_sanitize(dev);
-+
- 	intel_uncore_sanitize(dev);
- 
- 	if (drm_core_check_feature(dev, DRIVER_MODESET) &&
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0916-drm-i915-Drop-explicit-plane-restoration-during-resu.patch b/patches.baytrail/0916-drm-i915-Drop-explicit-plane-restoration-during-resu.patch
deleted file mode 100644
index b8d179e21a2eb..0000000000000
--- a/patches.baytrail/0916-drm-i915-Drop-explicit-plane-restoration-during-resu.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From dd02637968f57286484f64fae638f1e72dba9731 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Mon, 16 Sep 2013 17:38:37 +0300
-Subject: drm/i915: Drop explicit plane restoration during resume
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-We already restore planes during the modeset operation, so no need to do
-another loop over the planes and try to restore them again.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 2b9966771d3b84da6383e8695350beea3213f848)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 3 ---
- 1 file changed, 3 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 4a78809804ff..55557cee56bd 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -10636,7 +10636,6 @@ void intel_modeset_setup_hw_state(struct drm_device *dev,
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	enum pipe pipe;
--	struct drm_plane *plane;
- 	struct intel_crtc *crtc;
- 	struct intel_encoder *encoder;
- 	int i;
-@@ -10697,8 +10696,6 @@ void intel_modeset_setup_hw_state(struct drm_device *dev,
- 			__intel_set_mode(crtc, &crtc->mode, crtc->x, crtc->y,
- 					 crtc->fb);
- 		}
--		list_for_each_entry(plane, &dev->mode_config.plane_list, head)
--			intel_plane_restore(plane);
- 	} else {
- 		intel_modeset_update_staged_output_state(dev);
- 	}
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0917-drm-i915-dp-read-DPCD-PSR-capability-only-on-eDP.patch b/patches.baytrail/0917-drm-i915-dp-read-DPCD-PSR-capability-only-on-eDP.patch
deleted file mode 100644
index 13b17c1966248..0000000000000
--- a/patches.baytrail/0917-drm-i915-dp-read-DPCD-PSR-capability-only-on-eDP.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-From 960318b8aa569d06f4b2e16f5e52f5ea198b4a7f Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Fri, 20 Sep 2013 16:42:17 +0300
-Subject: drm/i915/dp: read DPCD PSR capability only on eDP
-
-Reduce AUX transactions for non-eDP.
-
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Reviewed-by: Todd Previte <tprevite@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 50003939b5a45df44b3b4bd1ccd46e3c50aa5e65)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_dp.c | 13 ++++++++-----
- 1 file changed, 8 insertions(+), 5 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
-index 1b26c610d21a..93bb87612d73 100644
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -2686,11 +2686,14 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp)
- 
- 	/* Check if the panel supports PSR */
- 	memset(intel_dp->psr_dpcd, 0, sizeof(intel_dp->psr_dpcd));
--	intel_dp_aux_native_read_retry(intel_dp, DP_PSR_SUPPORT,
--				       intel_dp->psr_dpcd,
--				       sizeof(intel_dp->psr_dpcd));
--	if (is_edp_psr(intel_dp))
--		DRM_DEBUG_KMS("Detected EDP PSR Panel.\n");
-+	if (is_edp(intel_dp)) {
-+		intel_dp_aux_native_read_retry(intel_dp, DP_PSR_SUPPORT,
-+					       intel_dp->psr_dpcd,
-+					       sizeof(intel_dp->psr_dpcd));
-+		if (is_edp_psr(intel_dp))
-+			DRM_DEBUG_KMS("Detected EDP PSR Panel.\n");
-+	}
-+
- 	if (!(intel_dp->dpcd[DP_DOWNSTREAMPORT_PRESENT] &
- 	      DP_DWN_STRM_PORT_PRESENT))
- 		return true; /* native DP sink */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0918-drm-i915-Calculate-PSR-register-offsets-from-base-ge.patch b/patches.baytrail/0918-drm-i915-Calculate-PSR-register-offsets-from-base-ge.patch
deleted file mode 100644
index e99a55958b26d..0000000000000
--- a/patches.baytrail/0918-drm-i915-Calculate-PSR-register-offsets-from-base-ge.patch
+++ /dev/null
@@ -1,200 +0,0 @@
-From 6893999cddceef0ab9520dd3fc719d559bf4aca5 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <benjamin.widawsky@intel.com>
-Date: Fri, 20 Sep 2013 09:35:30 -0700
-Subject: drm/i915: Calculate PSR register offsets from base + gen
-
-Future generations will be changing these registers (thanks to design
-for giving us an early heads up). To help abstract, create the
-definition of the base of the register block, and define all registers
-relative to that.
-
-Design has promised to not change the offsets relative to the base.
-
-v2: Also change IS_HASWELL checks to HAS_PSR
-
-CC: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-CC: Intel GFX <intel-gfx@lists.freedesktop.org>
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 18b5992c37560dffc52b84dec7f83738847cf5c7)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_debugfs.c |  9 +++++----
- drivers/gpu/drm/i915/i915_drv.h     |  1 +
- drivers/gpu/drm/i915/i915_reg.h     | 21 +++++++++++----------
- drivers/gpu/drm/i915/intel_dp.c     | 21 +++++++++++----------
- 4 files changed, 28 insertions(+), 24 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
-index 09c93d7989f1..fcfa98844ccc 100644
---- a/drivers/gpu/drm/i915/i915_debugfs.c
-+++ b/drivers/gpu/drm/i915/i915_debugfs.c
-@@ -1668,9 +1668,10 @@ static int i915_edp_psr_status(struct seq_file *m, void *data)
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	u32 psrstat, psrperf;
- 
--	if (!IS_HASWELL(dev)) {
-+	if (!HAS_PSR(dev)) {
- 		seq_puts(m, "PSR not supported on this platform\n");
--	} else if (IS_HASWELL(dev) && I915_READ(EDP_PSR_CTL) & EDP_PSR_ENABLE) {
-+	} else if (HAS_PSR(dev) &&
-+		   I915_READ(EDP_PSR_CTL(dev)) & EDP_PSR_ENABLE) {
- 		seq_puts(m, "PSR enabled\n");
- 	} else {
- 		seq_puts(m, "PSR disabled: ");
-@@ -1712,7 +1713,7 @@ static int i915_edp_psr_status(struct seq_file *m, void *data)
- 		return 0;
- 	}
- 
--	psrstat = I915_READ(EDP_PSR_STATUS_CTL);
-+	psrstat = I915_READ(EDP_PSR_STATUS_CTL(dev));
- 
- 	seq_puts(m, "PSR Current State: ");
- 	switch (psrstat & EDP_PSR_STATUS_STATE_MASK) {
-@@ -1784,7 +1785,7 @@ static int i915_edp_psr_status(struct seq_file *m, void *data)
- 	seq_printf(m, "Idle Count: %u\n",
- 		   psrstat & EDP_PSR_STATUS_IDLE_MASK);
- 
--	psrperf = (I915_READ(EDP_PSR_PERF_CNT)) & EDP_PSR_PERF_CNT_MASK;
-+	psrperf = (I915_READ(EDP_PSR_PERF_CNT(dev))) & EDP_PSR_PERF_CNT_MASK;
- 	seq_printf(m, "Performance Counter: %u\n", psrperf);
- 
- 	return 0;
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 07de53c40e57..bbe889dfc0ff 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1684,6 +1684,7 @@ struct drm_i915_file_private {
- #define HAS_DDI(dev)		(INTEL_INFO(dev)->has_ddi)
- #define HAS_POWER_WELL(dev)	(IS_HASWELL(dev))
- #define HAS_FPGA_DBG_UNCLAIMED(dev)	(INTEL_INFO(dev)->has_fpga_dbg)
-+#define HAS_PSR(dev)		(IS_HASWELL(dev))
- 
- #define INTEL_PCH_DEVICE_ID_MASK		0xff00
- #define INTEL_PCH_IBX_DEVICE_ID_TYPE		0x3b00
-diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
-index c4f9bef6d073..f7ad97572c4d 100644
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -1848,7 +1848,8 @@
- #define VSYNCSHIFT(trans) _TRANSCODER(trans, _VSYNCSHIFT_A, _VSYNCSHIFT_B)
- 
- /* HSW eDP PSR registers */
--#define EDP_PSR_CTL				0x64800
-+#define EDP_PSR_BASE(dev)			0x64800
-+#define EDP_PSR_CTL(dev)			(EDP_PSR_BASE(dev) + 0)
- #define   EDP_PSR_ENABLE			(1<<31)
- #define   EDP_PSR_LINK_DISABLE			(0<<27)
- #define   EDP_PSR_LINK_STANDBY			(1<<27)
-@@ -1871,16 +1872,16 @@
- #define   EDP_PSR_TP1_TIME_0us			(3<<4)
- #define   EDP_PSR_IDLE_FRAME_SHIFT		0
- 
--#define EDP_PSR_AUX_CTL			0x64810
--#define EDP_PSR_AUX_DATA1		0x64814
-+#define EDP_PSR_AUX_CTL(dev)			(EDP_PSR_BASE(dev) + 0x10)
-+#define EDP_PSR_AUX_DATA1(dev)			(EDP_PSR_BASE(dev) + 0x14)
- #define   EDP_PSR_DPCD_COMMAND		0x80060000
--#define EDP_PSR_AUX_DATA2		0x64818
-+#define EDP_PSR_AUX_DATA2(dev)			(EDP_PSR_BASE(dev) + 0x18)
- #define   EDP_PSR_DPCD_NORMAL_OPERATION	(1<<24)
--#define EDP_PSR_AUX_DATA3		0x6481c
--#define EDP_PSR_AUX_DATA4		0x64820
--#define EDP_PSR_AUX_DATA5		0x64824
-+#define EDP_PSR_AUX_DATA3(dev)			(EDP_PSR_BASE(dev) + 0x1c)
-+#define EDP_PSR_AUX_DATA4(dev)			(EDP_PSR_BASE(dev) + 0x20)
-+#define EDP_PSR_AUX_DATA5(dev)			(EDP_PSR_BASE(dev) + 0x24)
- 
--#define EDP_PSR_STATUS_CTL			0x64840
-+#define EDP_PSR_STATUS_CTL(dev)			(EDP_PSR_BASE(dev) + 0x40)
- #define   EDP_PSR_STATUS_STATE_MASK		(7<<29)
- #define   EDP_PSR_STATUS_STATE_IDLE		(0<<29)
- #define   EDP_PSR_STATUS_STATE_SRDONACK		(1<<29)
-@@ -1904,10 +1905,10 @@
- #define   EDP_PSR_STATUS_SENDING_TP1		(1<<4)
- #define   EDP_PSR_STATUS_IDLE_MASK		0xf
- 
--#define EDP_PSR_PERF_CNT		0x64844
-+#define EDP_PSR_PERF_CNT(dev)		(EDP_PSR_BASE(dev) + 0x44)
- #define   EDP_PSR_PERF_CNT_MASK		0xffffff
- 
--#define EDP_PSR_DEBUG_CTL		0x64860
-+#define EDP_PSR_DEBUG_CTL(dev)		(EDP_PSR_BASE(dev) + 0x60)
- #define   EDP_PSR_DEBUG_MASK_LPSP	(1<<27)
- #define   EDP_PSR_DEBUG_MASK_MEMUP	(1<<26)
- #define   EDP_PSR_DEBUG_MASK_HPD	(1<<25)
-diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
-index 93bb87612d73..cf4d2197f9e6 100644
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -1496,10 +1496,10 @@ static bool intel_edp_is_psr_enabled(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 
--	if (!IS_HASWELL(dev))
-+	if (!HAS_PSR(dev))
- 		return false;
- 
--	return I915_READ(EDP_PSR_CTL) & EDP_PSR_ENABLE;
-+	return I915_READ(EDP_PSR_CTL(dev)) & EDP_PSR_ENABLE;
- }
- 
- static void intel_edp_psr_write_vsc(struct intel_dp *intel_dp,
-@@ -1549,7 +1549,7 @@ static void intel_edp_psr_setup(struct intel_dp *intel_dp)
- 	intel_edp_psr_write_vsc(intel_dp, &psr_vsc);
- 
- 	/* Avoid continuous PSR exit by masking memup and hpd */
--	I915_WRITE(EDP_PSR_DEBUG_CTL, EDP_PSR_DEBUG_MASK_MEMUP |
-+	I915_WRITE(EDP_PSR_DEBUG_CTL(dev), EDP_PSR_DEBUG_MASK_MEMUP |
- 		   EDP_PSR_DEBUG_MASK_HPD);
- 
- 	intel_dp->psr_setup_done = true;
-@@ -1574,9 +1574,9 @@ static void intel_edp_psr_enable_sink(struct intel_dp *intel_dp)
- 					    DP_PSR_MAIN_LINK_ACTIVE);
- 
- 	/* Setup AUX registers */
--	I915_WRITE(EDP_PSR_AUX_DATA1, EDP_PSR_DPCD_COMMAND);
--	I915_WRITE(EDP_PSR_AUX_DATA2, EDP_PSR_DPCD_NORMAL_OPERATION);
--	I915_WRITE(EDP_PSR_AUX_CTL,
-+	I915_WRITE(EDP_PSR_AUX_DATA1(dev), EDP_PSR_DPCD_COMMAND);
-+	I915_WRITE(EDP_PSR_AUX_DATA2(dev), EDP_PSR_DPCD_NORMAL_OPERATION);
-+	I915_WRITE(EDP_PSR_AUX_CTL(dev),
- 		   DP_AUX_CH_CTL_TIME_OUT_400us |
- 		   (msg_size << DP_AUX_CH_CTL_MESSAGE_SIZE_SHIFT) |
- 		   (precharge << DP_AUX_CH_CTL_PRECHARGE_2US_SHIFT) |
-@@ -1599,7 +1599,7 @@ static void intel_edp_psr_enable_source(struct intel_dp *intel_dp)
- 	} else
- 		val |= EDP_PSR_LINK_DISABLE;
- 
--	I915_WRITE(EDP_PSR_CTL, val |
-+	I915_WRITE(EDP_PSR_CTL(dev), val |
- 		   EDP_PSR_MIN_LINK_ENTRY_TIME_8_LINES |
- 		   max_sleep_time << EDP_PSR_MAX_SLEEP_TIME_SHIFT |
- 		   idle_frames << EDP_PSR_IDLE_FRAME_SHIFT |
-@@ -1616,7 +1616,7 @@ static bool intel_edp_psr_match_conditions(struct intel_dp *intel_dp)
- 	struct drm_i915_gem_object *obj = to_intel_framebuffer(crtc->fb)->obj;
- 	struct intel_encoder *intel_encoder = &dp_to_dig_port(intel_dp)->base;
- 
--	if (!IS_HASWELL(dev)) {
-+	if (!HAS_PSR(dev)) {
- 		DRM_DEBUG_KMS("PSR not supported on this platform\n");
- 		dev_priv->no_psr_reason = PSR_NO_SOURCE;
- 		return false;
-@@ -1720,10 +1720,11 @@ void intel_edp_psr_disable(struct intel_dp *intel_dp)
- 	if (!intel_edp_is_psr_enabled(dev))
- 		return;
- 
--	I915_WRITE(EDP_PSR_CTL, I915_READ(EDP_PSR_CTL) & ~EDP_PSR_ENABLE);
-+	I915_WRITE(EDP_PSR_CTL(dev),
-+		   I915_READ(EDP_PSR_CTL(dev)) & ~EDP_PSR_ENABLE);
- 
- 	/* Wait till PSR is idle */
--	if (_wait_for((I915_READ(EDP_PSR_STATUS_CTL) &
-+	if (_wait_for((I915_READ(EDP_PSR_STATUS_CTL(dev)) &
- 		       EDP_PSR_STATUS_STATE_MASK) == 0, 2000, 10))
- 		DRM_ERROR("Timed out waiting for PSR Idle State\n");
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0919-drm-i915-Fix-intel_crtc_mode_get-mode-clock.patch b/patches.baytrail/0919-drm-i915-Fix-intel_crtc_mode_get-mode-clock.patch
deleted file mode 100644
index 9e12fec038c05..0000000000000
--- a/patches.baytrail/0919-drm-i915-Fix-intel_crtc_mode_get-mode-clock.patch
+++ /dev/null
@@ -1,46 +0,0 @@
-From 003d074931dfd2facd7667c0b2a3a4afbdbf735b Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Mon, 23 Sep 2013 17:48:20 +0300
-Subject: drm/i915: Fix intel_crtc_mode_get() mode clock
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-i9xx_crtc_clock_get() no longer populates adjusted_mode.clock, so we
-must get the pixel clock from port_clock in intel_crtc_mode_get().
-
-This bug caused Chris's 845g machine to lockup during boot, and it
-was introduced in:
-
- commit 18442d08786472c63a0a80c27f92b033dffc26de
- Author: Ville Syrjälä <ville.syrjala@linux.intel.com>
- Date:   Fri Sep 13 16:00:08 2013 +0300
-
-    drm/i915: Fix port_clock and adjusted_mode.clock readout all over
-
-Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=69713
-Tested-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 773ae0346576a19b6a5e10adb0f63deca603ee00)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 55557cee56bd..2d5eae09673d 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -7543,7 +7543,7 @@ struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev,
- 	pipe_config.dpll_hw_state.fp1 = I915_READ(FP1(pipe));
- 	i9xx_crtc_clock_get(intel_crtc, &pipe_config);
- 
--	mode->clock = pipe_config.adjusted_mode.clock;
-+	mode->clock = pipe_config.port_clock / pipe_config.pixel_multiplier;
- 	mode->hdisplay = (htot & 0xffff) + 1;
- 	mode->htotal = ((htot & 0xffff0000) >> 16) + 1;
- 	mode->hsync_start = (hsync & 0xffff) + 1;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0920-drm-i915-precendence-bug-in-GT_PARITY_ERROR.patch b/patches.baytrail/0920-drm-i915-precendence-bug-in-GT_PARITY_ERROR.patch
deleted file mode 100644
index cef865239fdfd..0000000000000
--- a/patches.baytrail/0920-drm-i915-precendence-bug-in-GT_PARITY_ERROR.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From 4186e9aa172244a2b22368ddf1312aeb0eb7c8c0 Mon Sep 17 00:00:00 2001
-From: Dan Carpenter <dan.carpenter@oracle.com>
-Date: Tue, 24 Sep 2013 10:57:35 +0300
-Subject: drm/i915: precendence bug in GT_PARITY_ERROR()
-
-The | operation has higher precedence than "?:" so the macro always
-returns GT_RENDER_L3_PARITY_ERROR_INTERRUPT_S1.
-
-This regression has been introduce in "drm/i915: Add second slice l3
-remapping".
-
-Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
-Reviewed-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 45f80d53b1fe2f68c6c5b2b4518b67278bcde805)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_reg.h | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
-index f7ad97572c4d..00fda45728d7 100644
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -940,7 +940,7 @@
- 
- #define GT_PARITY_ERROR(dev) \
- 	(GT_RENDER_L3_PARITY_ERROR_INTERRUPT | \
--	 IS_HASWELL(dev) ? GT_RENDER_L3_PARITY_ERROR_INTERRUPT_S1 : 0)
-+	 (IS_HASWELL(dev) ? GT_RENDER_L3_PARITY_ERROR_INTERRUPT_S1 : 0))
- 
- /* These are all the "old" interrupts */
- #define ILK_BSD_USER_INTERRUPT				(1<<5)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0921-drm-i915-Delay-the-release-of-the-forcewake-by-a-jif.patch b/patches.baytrail/0921-drm-i915-Delay-the-release-of-the-forcewake-by-a-jif.patch
deleted file mode 100644
index 16a620c8cfbd2..0000000000000
--- a/patches.baytrail/0921-drm-i915-Delay-the-release-of-the-forcewake-by-a-jif.patch
+++ /dev/null
@@ -1,144 +0,0 @@
-From 697bc71d398efdaf9d95fc77fe60d865d1f374e9 Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Mon, 26 Aug 2013 13:46:09 +0100
-Subject: drm/i915: Delay the release of the forcewake by a jiffie
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Obtaining the forcwake requires expensive and time consuming
-serialisation. And we often try to obtain the forcewake multiple times
-in very quick succession. We can reduce the overhead of these sequences
-by delaying the forcewake release, and so not hammer the hw quite so
-hard.
-
-I was hoping this would help with the spurious
-[drm:__gen6_gt_force_wake_mt_get] *ERROR* Timed out waiting for forcewake old ack to clear.
-found on Haswell. Alas not.
-
-v2: Fix teardown ordering - unmap the regs after turning off forcewake,
-and make sure we do turn off forcewake - both found by Ville.
-
-v3: As we introduce intel_uncore_fini(), use it to make sure everything
-is disabled before we hand back to the BIOS.
-
-Note: I have no claims for improved performance, stablity or power
-comsumption for this patch. We should not be hitting the registers often
-enough for this to improve benchmarks, but given the nature of our hw it
-is likely to improve long term stability.
-
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit aec347ab197ec064d1e98b52717d968521a62929)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_dma.c     |    6 ++++--
- drivers/gpu/drm/i915/i915_drv.h     |    3 +++
- drivers/gpu/drm/i915/intel_uncore.c |   33 +++++++++++++++++++++++++++++++--
- 3 files changed, 38 insertions(+), 4 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_dma.c
-+++ b/drivers/gpu/drm/i915/i915_dma.c
-@@ -1801,8 +1801,6 @@ int i915_driver_unload(struct drm_device
- 	list_del(&dev_priv->gtt.base.global_link);
- 	WARN_ON(!list_empty(&dev_priv->vm_list));
- 	drm_mm_takedown(&dev_priv->gtt.base.mm);
--	if (dev_priv->regs != NULL)
--		pci_iounmap(dev->pdev, dev_priv->regs);
- 
- 	intel_teardown_gmbus(dev);
- 	intel_teardown_mchbar(dev);
-@@ -1812,6 +1810,10 @@ int i915_driver_unload(struct drm_device
- 
- 	dev_priv->gtt.base.cleanup(&dev_priv->gtt.base);
- 
-+	intel_uncore_fini(dev);
-+	if (dev_priv->regs != NULL)
-+		pci_iounmap(dev->pdev, dev_priv->regs);
-+
- 	if (dev_priv->slab)
- 		kmem_cache_destroy(dev_priv->slab);
- 
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -408,6 +408,8 @@ struct intel_uncore {
- 
- 	unsigned fifo_count;
- 	unsigned forcewake_count;
-+
-+	struct delayed_work force_wake_work;
- };
- 
- #define DEV_INFO_FOR_EACH_FLAG(func, sep) \
-@@ -1801,6 +1803,7 @@ extern void intel_uncore_early_sanitize(
- extern void intel_uncore_init(struct drm_device *dev);
- extern void intel_uncore_clear_errors(struct drm_device *dev);
- extern void intel_uncore_check_errors(struct drm_device *dev);
-+extern void intel_uncore_fini(struct drm_device *dev);
- 
- void
- i915_enable_pipestat(drm_i915_private_t *dev_priv, int pipe, u32 mask);
---- a/drivers/gpu/drm/i915/intel_uncore.c
-+++ b/drivers/gpu/drm/i915/intel_uncore.c
-@@ -204,6 +204,18 @@ static void vlv_force_wake_put(struct dr
- 	gen6_gt_check_fifodbg(dev_priv);
- }
- 
-+static void gen6_force_wake_work(struct work_struct *work)
-+{
-+	struct drm_i915_private *dev_priv =
-+		container_of(work, typeof(*dev_priv), uncore.force_wake_work.work);
-+	unsigned long irqflags;
-+
-+	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
-+	if (--dev_priv->uncore.forcewake_count == 0)
-+		dev_priv->uncore.funcs.force_wake_put(dev_priv);
-+	spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
-+}
-+
- void intel_uncore_early_sanitize(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
-@@ -216,6 +228,9 @@ void intel_uncore_init(struct drm_device
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 
-+	INIT_DELAYED_WORK(&dev_priv->uncore.force_wake_work,
-+			  gen6_force_wake_work);
-+
- 	if (IS_VALLEYVIEW(dev)) {
- 		dev_priv->uncore.funcs.force_wake_get = vlv_force_wake_get;
- 		dev_priv->uncore.funcs.force_wake_put = vlv_force_wake_put;
-@@ -261,6 +276,16 @@ void intel_uncore_init(struct drm_device
- 	}
- }
- 
-+void intel_uncore_fini(struct drm_device *dev)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+
-+	flush_delayed_work(&dev_priv->uncore.force_wake_work);
-+
-+	/* Paranoia: make sure we have disabled everything before we exit. */
-+	intel_uncore_sanitize(dev);
-+}
-+
- static void intel_uncore_forcewake_reset(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
-@@ -306,8 +331,12 @@ void gen6_gt_force_wake_put(struct drm_i
- 	unsigned long irqflags;
- 
- 	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
--	if (--dev_priv->uncore.forcewake_count == 0)
--		dev_priv->uncore.funcs.force_wake_put(dev_priv);
-+	if (--dev_priv->uncore.forcewake_count == 0) {
-+		dev_priv->uncore.forcewake_count++;
-+		mod_delayed_work(dev_priv->wq,
-+				 &dev_priv->uncore.force_wake_work,
-+				 1);
-+	}
- 	spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
- }
- 
diff --git a/patches.baytrail/0922-drm-i915-Add-some-debug-spam-for-intialising-SDVO.patch b/patches.baytrail/0922-drm-i915-Add-some-debug-spam-for-intialising-SDVO.patch
deleted file mode 100644
index bcaa401022210..0000000000000
--- a/patches.baytrail/0922-drm-i915-Add-some-debug-spam-for-intialising-SDVO.patch
+++ /dev/null
@@ -1,107 +0,0 @@
-From 8e691c02aca8e399170ba194629629c9f45cb093 Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Tue, 24 Sep 2013 12:55:40 +0100
-Subject: drm/i915: Add some debug spam for intialising SDVO
-
-During SDVO initialisation it would be useful to a have a record of the
-individual devices we try to enable and later probe - in particular to
-be able to see which fail.
-
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 46a3f4a3148684f9210767784a017314876c3274)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_sdvo.c | 20 ++++++++++++++++++--
- 1 file changed, 18 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
-index d8040e8a68b5..606e03279201 100644
---- a/drivers/gpu/drm/i915/intel_sdvo.c
-+++ b/drivers/gpu/drm/i915/intel_sdvo.c
-@@ -539,7 +539,7 @@ static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
- 		goto log_fail;
- 
- 	while ((status == SDVO_CMD_STATUS_PENDING ||
--			status == SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED) && --retry) {
-+		status == SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED) && --retry) {
- 		if (retry < 10)
- 			msleep(15);
- 		else
-@@ -1773,6 +1773,9 @@ static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
- {
- 	struct edid *edid;
- 
-+	DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
-+		      connector->base.id, drm_get_connector_name(connector));
-+
- 	/* set the bus switch and get the modes */
- 	edid = intel_sdvo_get_edid(connector);
- 
-@@ -1868,6 +1871,9 @@ static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
- 	uint32_t reply = 0, format_map = 0;
- 	int i;
- 
-+	DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
-+		      connector->base.id, drm_get_connector_name(connector));
-+
- 	/* Read the list of supported input resolutions for the selected TV
- 	 * format.
- 	 */
-@@ -1902,6 +1908,9 @@ static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
- 	struct drm_i915_private *dev_priv = connector->dev->dev_private;
- 	struct drm_display_mode *newmode;
- 
-+	DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
-+		      connector->base.id, drm_get_connector_name(connector));
-+
- 	/*
- 	 * Fetch modes from VBT. For SDVO prefer the VBT mode since some
- 	 * SDVO->LVDS transcoders can't cope with the EDID mode.
-@@ -1933,7 +1942,6 @@ static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
- 			break;
- 		}
- 	}
--
- }
- 
- static int intel_sdvo_get_modes(struct drm_connector *connector)
-@@ -2397,6 +2405,8 @@ intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
- 	struct intel_connector *intel_connector;
- 	struct intel_sdvo_connector *intel_sdvo_connector;
- 
-+	DRM_DEBUG_KMS("initialising DVI device %d\n", device);
-+
- 	intel_sdvo_connector = kzalloc(sizeof(*intel_sdvo_connector), GFP_KERNEL);
- 	if (!intel_sdvo_connector)
- 		return false;
-@@ -2445,6 +2455,8 @@ intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
- 	struct intel_connector *intel_connector;
- 	struct intel_sdvo_connector *intel_sdvo_connector;
- 
-+	DRM_DEBUG_KMS("initialising TV type %d\n", type);
-+
- 	intel_sdvo_connector = kzalloc(sizeof(*intel_sdvo_connector), GFP_KERNEL);
- 	if (!intel_sdvo_connector)
- 		return false;
-@@ -2482,6 +2494,8 @@ intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
- 	struct intel_connector *intel_connector;
- 	struct intel_sdvo_connector *intel_sdvo_connector;
- 
-+	DRM_DEBUG_KMS("initialising analog device %d\n", device);
-+
- 	intel_sdvo_connector = kzalloc(sizeof(*intel_sdvo_connector), GFP_KERNEL);
- 	if (!intel_sdvo_connector)
- 		return false;
-@@ -2513,6 +2527,8 @@ intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
- 	struct intel_connector *intel_connector;
- 	struct intel_sdvo_connector *intel_sdvo_connector;
- 
-+	DRM_DEBUG_KMS("initialising LVDS device %d\n", device);
-+
- 	intel_sdvo_connector = kzalloc(sizeof(*intel_sdvo_connector), GFP_KERNEL);
- 	if (!intel_sdvo_connector)
- 		return false;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0923-drm-i915-clean-up-and-simplify-i9xx_crtc_mode_set-wr.patch b/patches.baytrail/0923-drm-i915-clean-up-and-simplify-i9xx_crtc_mode_set-wr.patch
deleted file mode 100644
index ad60d3e61bb97..0000000000000
--- a/patches.baytrail/0923-drm-i915-clean-up-and-simplify-i9xx_crtc_mode_set-wr.patch
+++ /dev/null
@@ -1,105 +0,0 @@
-From c60d58d377b6932091e541f0944a38cc0525be27 Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Fri, 13 Sep 2013 11:03:09 +0300
-Subject: drm/i915: clean up and simplify i9xx_crtc_mode_set wrt PLL handling
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Flat out skip anything to do with PLL if we have a DSI encoder (and thus
-DSI PLL). Also skip PLL computation if the encoder has already set
-clocks. This allows for some tidying up of the code, including a
-superfluous call to intel_limit() for LVDS downclock path.
-
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit f2335330ec5cd9c4b189b365560c044fe8556ccf)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 44 ++++++++++++++++++------------------
- 1 file changed, 22 insertions(+), 22 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 2d5eae09673d..dc1f45a2a04a 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -4914,9 +4914,12 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
- 		num_connectors++;
- 	}
- 
--	refclk = i9xx_get_refclk(crtc, num_connectors);
-+	if (is_dsi)
-+		goto skip_dpll;
-+
-+	if (!intel_crtc->config.clock_set) {
-+		refclk = i9xx_get_refclk(crtc, num_connectors);
- 
--	if (!is_dsi && !intel_crtc->config.clock_set) {
- 		/*
- 		 * Returns a set of divisors for the desired target clock with
- 		 * the given refclk, or FALSE.  The returned values represent
-@@ -4927,28 +4930,25 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
- 		ok = dev_priv->display.find_dpll(limit, crtc,
- 						 intel_crtc->config.port_clock,
- 						 refclk, NULL, &clock);
--		if (!ok && !intel_crtc->config.clock_set) {
-+		if (!ok) {
- 			DRM_ERROR("Couldn't find PLL settings for mode!\n");
- 			return -EINVAL;
- 		}
--	}
- 
--	if (is_lvds && dev_priv->lvds_downclock_avail) {
--		/*
--		 * Ensure we match the reduced clock's P to the target clock.
--		 * If the clocks don't match, we can't switch the display clock
--		 * by using the FP0/FP1. In such case we will disable the LVDS
--		 * downclock feature.
--		*/
--		limit = intel_limit(crtc, refclk);
--		has_reduced_clock =
--			dev_priv->display.find_dpll(limit, crtc,
--						    dev_priv->lvds_downclock,
--						    refclk, &clock,
--						    &reduced_clock);
--	}
--	/* Compat-code for transition, will disappear. */
--	if (!intel_crtc->config.clock_set) {
-+		if (is_lvds && dev_priv->lvds_downclock_avail) {
-+			/*
-+			 * Ensure we match the reduced clock's P to the target
-+			 * clock.  If the clocks don't match, we can't switch
-+			 * the display clock by using the FP0/FP1. In such case
-+			 * we will disable the LVDS downclock feature.
-+			 */
-+			has_reduced_clock =
-+				dev_priv->display.find_dpll(limit, crtc,
-+							    dev_priv->lvds_downclock,
-+							    refclk, &clock,
-+							    &reduced_clock);
-+		}
-+		/* Compat-code for transition, will disappear. */
- 		intel_crtc->config.dpll.n = clock.n;
- 		intel_crtc->config.dpll.m1 = clock.m1;
- 		intel_crtc->config.dpll.m2 = clock.m2;
-@@ -4961,14 +4961,14 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
- 				has_reduced_clock ? &reduced_clock : NULL,
- 				num_connectors);
- 	} else if (IS_VALLEYVIEW(dev)) {
--		if (!is_dsi)
--			vlv_update_pll(intel_crtc);
-+		vlv_update_pll(intel_crtc);
- 	} else {
- 		i9xx_update_pll(intel_crtc,
- 				has_reduced_clock ? &reduced_clock : NULL,
- 				num_connectors);
- 	}
- 
-+skip_dpll:
- 	/* Set up the display plane register */
- 	dspcntr = DISPPLANE_GAMMA_ENABLE;
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0924-drm-i915-Add-HSW-CRT-output-readout-support.patch b/patches.baytrail/0924-drm-i915-Add-HSW-CRT-output-readout-support.patch
deleted file mode 100644
index aaae07307356c..0000000000000
--- a/patches.baytrail/0924-drm-i915-Add-HSW-CRT-output-readout-support.patch
+++ /dev/null
@@ -1,120 +0,0 @@
-From 1c1b4ad7f4181331c5f91f2ea857bbe19772e6ae Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Tue, 24 Sep 2013 14:24:05 +0300
-Subject: drm/i915: Add HSW CRT output readout support
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Call intel_ddi_get_config() to get the pipe_bpp settings from
-DDI.
-
-The sync polarity settings from DDI are irrelevant for CRT
-output, so override them with data from the ADPA register.
-
-v2: Extract intel_crt_get_flags()
-
-Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=69691
-Tested-by: Qingshuai Tian <qingshuai.tian@intel.com>
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 6801c18c0a43386bb44712cbc028a7e05adb9f0d)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_crt.c |   34 ++++++++++++++++++++++++++++------
- drivers/gpu/drm/i915/intel_ddi.c |    4 ++--
- drivers/gpu/drm/i915/intel_drv.h |    2 ++
- 3 files changed, 32 insertions(+), 8 deletions(-)
-
---- a/drivers/gpu/drm/i915/intel_crt.c
-+++ b/drivers/gpu/drm/i915/intel_crt.c
-@@ -83,13 +83,11 @@ static bool intel_crt_get_hw_state(struc
- 	return true;
- }
- 
--static void intel_crt_get_config(struct intel_encoder *encoder,
--				 struct intel_crtc_config *pipe_config)
-+static unsigned int intel_crt_get_flags(struct intel_encoder *encoder)
- {
- 	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
- 	struct intel_crt *crt = intel_encoder_to_crt(encoder);
- 	u32 tmp, flags = 0;
--	int dotclock;
- 
- 	tmp = I915_READ(crt->adpa_reg);
- 
-@@ -103,16 +101,37 @@ static void intel_crt_get_config(struct
- 	else
- 		flags |= DRM_MODE_FLAG_NVSYNC;
- 
--	pipe_config->adjusted_mode.flags |= flags;
-+	return flags;
-+}
-+
-+static void intel_crt_get_config(struct intel_encoder *encoder,
-+				 struct intel_crtc_config *pipe_config)
-+{
-+	struct drm_device *dev = encoder->base.dev;
-+	int dotclock;
-+
-+	pipe_config->adjusted_mode.flags |= intel_crt_get_flags(encoder);
- 
- 	dotclock = pipe_config->port_clock;
- 
--	if (HAS_PCH_SPLIT(dev_priv->dev))
-+	if (HAS_PCH_SPLIT(dev))
- 		ironlake_check_encoder_dotclock(pipe_config, dotclock);
- 
- 	pipe_config->adjusted_mode.clock = dotclock;
- }
- 
-+static void hsw_crt_get_config(struct intel_encoder *encoder,
-+			       struct intel_crtc_config *pipe_config)
-+{
-+	intel_ddi_get_config(encoder, pipe_config);
-+
-+	pipe_config->adjusted_mode.flags &= ~(DRM_MODE_FLAG_PHSYNC |
-+					      DRM_MODE_FLAG_NHSYNC |
-+					      DRM_MODE_FLAG_PVSYNC |
-+					      DRM_MODE_FLAG_NVSYNC);
-+	pipe_config->adjusted_mode.flags |= intel_crt_get_flags(encoder);
-+}
-+
- /* Note: The caller is required to filter out dpms modes not supported by the
-  * platform. */
- static void intel_crt_set_dpms(struct intel_encoder *encoder, int mode)
-@@ -804,7 +823,10 @@ void intel_crt_init(struct drm_device *d
- 	crt->base.mode_set = intel_crt_mode_set;
- 	crt->base.disable = intel_disable_crt;
- 	crt->base.enable = intel_enable_crt;
--	crt->base.get_config = intel_crt_get_config;
-+	if (IS_HASWELL(dev))
-+		crt->base.get_config = hsw_crt_get_config;
-+	else
-+		crt->base.get_config = intel_crt_get_config;
- 	if (I915_HAS_HOTPLUG(dev))
- 		crt->base.hpd_pin = HPD_CRT;
- 	if (HAS_DDI(dev))
---- a/drivers/gpu/drm/i915/intel_ddi.c
-+++ b/drivers/gpu/drm/i915/intel_ddi.c
-@@ -1275,8 +1275,8 @@ static void intel_ddi_hot_plug(struct in
- 		intel_dp_check_link_status(intel_dp);
- }
- 
--static void intel_ddi_get_config(struct intel_encoder *encoder,
--				 struct intel_crtc_config *pipe_config)
-+void intel_ddi_get_config(struct intel_encoder *encoder,
-+			  struct intel_crtc_config *pipe_config)
- {
- 	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
- 	struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -828,5 +828,7 @@ extern void ironlake_check_encoder_dotcl
- 
- extern bool intel_crtc_active(struct drm_crtc *crtc);
- extern void i915_disable_vga_mem(struct drm_device *dev);
-+extern void intel_ddi_get_config(struct intel_encoder *encoder,
-+				 struct intel_crtc_config *pipe_config);
- 
- #endif /* __INTEL_DRV_H__ */
diff --git a/patches.baytrail/0925-drm-i915-backlight-combination-mode-bit-is-gen4-only.patch b/patches.baytrail/0925-drm-i915-backlight-combination-mode-bit-is-gen4-only.patch
deleted file mode 100644
index 1590c7b95dcc9..0000000000000
--- a/patches.baytrail/0925-drm-i915-backlight-combination-mode-bit-is-gen4-only.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From b991b00d3a25db3f081d1b8a3216fcf1abf7c519 Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Tue, 24 Sep 2013 16:44:39 +0300
-Subject: drm/i915: backlight combination mode bit is gen4 only
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Not valid for later non-PCH split platforms such as VLV.
-
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit d9c638d5c6fb96770e77637547629a32cb362075)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_panel.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
-index 3bc89a6bc3ee..8f025c694733 100644
---- a/drivers/gpu/drm/i915/intel_panel.c
-+++ b/drivers/gpu/drm/i915/intel_panel.c
-@@ -329,7 +329,7 @@ static int is_backlight_combination_mode(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 
--	if (INTEL_INFO(dev)->gen >= 4)
-+	if (IS_GEN4(dev))
- 		return I915_READ(BLC_PWM_CTL2) & BLM_COMBINATION_MODE;
- 
- 	if (IS_GEN2(dev))
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0926-drm-i915-reorganize-intel_drv.h.patch b/patches.baytrail/0926-drm-i915-reorganize-intel_drv.h.patch
deleted file mode 100644
index c4f12e4da9a78..0000000000000
--- a/patches.baytrail/0926-drm-i915-reorganize-intel_drv.h.patch
+++ /dev/null
@@ -1,532 +0,0 @@
-From 53907dcba324256a20ce8a51050a8c909f01a6b7 Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Tue, 24 Sep 2013 13:52:53 -0300
-Subject: drm/i915: reorganize intel_drv.h
-
-Daniel complained that we keep adding stuff to the bottom of the file,
-so we constantly have conflicts. So reorganize everything and split
-them file-by-file, also sorting the files in alphabetical order. This
-way, patches touching different files will have a smaller chance of
-conflicting. Of course, this commit will conflict with everybody on
-the list :)
-
-Also remove a few useless comments and make some things fit into 80
-lines.
-
-v2: - Conflict with intel_ddi_get_config
-
-Requested-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 5f1aae65cdaecfd23926b5e462e379914d372db9)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_drv.h | 410 ++++++++++++++++++++-------------------
- 1 file changed, 214 insertions(+), 196 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index e7fe5f1f72df..805dc923d2a5 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -514,81 +514,6 @@ struct intel_unpin_work {
- 	bool enable_stall_check;
- };
- 
--int intel_pch_rawclk(struct drm_device *dev);
--
--int intel_connector_update_modes(struct drm_connector *connector,
--				struct edid *edid);
--int intel_ddc_get_modes(struct drm_connector *c, struct i2c_adapter *adapter);
--
--extern void intel_attach_force_audio_property(struct drm_connector *connector);
--extern void intel_attach_broadcast_rgb_property(struct drm_connector *connector);
--
--extern bool intel_pipe_has_type(struct drm_crtc *crtc, int type);
--extern void intel_crt_init(struct drm_device *dev);
--extern void intel_hdmi_init(struct drm_device *dev,
--			    int hdmi_reg, enum port port);
--extern void intel_hdmi_init_connector(struct intel_digital_port *intel_dig_port,
--				      struct intel_connector *intel_connector);
--extern struct intel_hdmi *enc_to_intel_hdmi(struct drm_encoder *encoder);
--extern bool intel_hdmi_compute_config(struct intel_encoder *encoder,
--				      struct intel_crtc_config *pipe_config);
--extern bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg,
--			    bool is_sdvob);
--extern void intel_dvo_init(struct drm_device *dev);
--extern void intel_tv_init(struct drm_device *dev);
--extern void intel_mark_busy(struct drm_device *dev);
--extern void intel_mark_fb_busy(struct drm_i915_gem_object *obj,
--			       struct intel_ring_buffer *ring);
--extern void intel_mark_idle(struct drm_device *dev);
--extern void intel_lvds_init(struct drm_device *dev);
--extern bool intel_dsi_init(struct drm_device *dev);
--extern bool intel_is_dual_link_lvds(struct drm_device *dev);
--extern void intel_dp_init(struct drm_device *dev, int output_reg,
--			  enum port port);
--extern bool intel_dp_init_connector(struct intel_digital_port *intel_dig_port,
--				    struct intel_connector *intel_connector);
--extern void intel_dp_init_link_config(struct intel_dp *intel_dp);
--extern void intel_dp_start_link_train(struct intel_dp *intel_dp);
--extern void intel_dp_complete_link_train(struct intel_dp *intel_dp);
--extern void intel_dp_stop_link_train(struct intel_dp *intel_dp);
--extern void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode);
--extern void intel_dp_encoder_destroy(struct drm_encoder *encoder);
--extern void intel_dp_check_link_status(struct intel_dp *intel_dp);
--extern bool intel_dp_compute_config(struct intel_encoder *encoder,
--				    struct intel_crtc_config *pipe_config);
--extern bool intel_dpd_is_edp(struct drm_device *dev);
--extern void ironlake_edp_backlight_on(struct intel_dp *intel_dp);
--extern void ironlake_edp_backlight_off(struct intel_dp *intel_dp);
--extern void ironlake_edp_panel_on(struct intel_dp *intel_dp);
--extern void ironlake_edp_panel_off(struct intel_dp *intel_dp);
--extern void ironlake_edp_panel_vdd_on(struct intel_dp *intel_dp);
--extern void ironlake_edp_panel_vdd_off(struct intel_dp *intel_dp, bool sync);
--extern int intel_plane_init(struct drm_device *dev, enum pipe pipe, int plane);
--extern void intel_flush_display_plane(struct drm_i915_private *dev_priv,
--				      enum plane plane);
--
--/* intel_panel.c */
--extern int intel_panel_init(struct intel_panel *panel,
--			    struct drm_display_mode *fixed_mode);
--extern void intel_panel_fini(struct intel_panel *panel);
--
--extern void intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode,
--				   struct drm_display_mode *adjusted_mode);
--extern void intel_pch_panel_fitting(struct intel_crtc *crtc,
--				    struct intel_crtc_config *pipe_config,
--				    int fitting_mode);
--extern void intel_gmch_panel_fitting(struct intel_crtc *crtc,
--				     struct intel_crtc_config *pipe_config,
--				     int fitting_mode);
--extern void intel_panel_set_backlight(struct drm_device *dev,
--				      u32 level, u32 max);
--extern int intel_panel_setup_backlight(struct drm_connector *connector);
--extern void intel_panel_enable_backlight(struct drm_device *dev,
--					 enum pipe pipe);
--extern void intel_panel_disable_backlight(struct drm_device *dev);
--extern void intel_panel_destroy_backlight(struct drm_device *dev);
--extern enum drm_connector_status intel_panel_detect(struct drm_device *dev);
--
- struct intel_set_config {
- 	struct drm_encoder **save_connector_encoders;
- 	struct drm_crtc **save_encoder_crtcs;
-@@ -597,18 +522,14 @@ struct intel_set_config {
- 	bool mode_changed;
- };
- 
--extern void intel_crtc_restore_mode(struct drm_crtc *crtc);
--extern void intel_crtc_load_lut(struct drm_crtc *crtc);
--extern void intel_crtc_update_dpms(struct drm_crtc *crtc);
--extern void intel_encoder_destroy(struct drm_encoder *encoder);
--extern void intel_connector_dpms(struct drm_connector *, int mode);
--extern bool intel_connector_get_hw_state(struct intel_connector *connector);
--extern void intel_modeset_check_state(struct drm_device *dev);
--extern void intel_plane_restore(struct drm_plane *plane);
--extern void intel_plane_disable(struct drm_plane *plane);
--
-+struct intel_load_detect_pipe {
-+	struct drm_framebuffer *release_fb;
-+	bool load_detect_temp;
-+	int dpms_mode;
-+};
- 
--static inline struct intel_encoder *intel_attached_encoder(struct drm_connector *connector)
-+static inline struct intel_encoder *
-+intel_attached_encoder(struct drm_connector *connector)
- {
- 	return to_intel_connector(connector)->encoder;
- }
-@@ -636,73 +557,106 @@ hdmi_to_dig_port(struct intel_hdmi *intel_hdmi)
- 	return container_of(intel_hdmi, struct intel_digital_port, hdmi);
- }
- 
-+
-+/* i915_irq.c */
-+extern bool intel_set_cpu_fifo_underrun_reporting(struct drm_device *dev,
-+						  enum pipe pipe,
-+						  bool enable);
-+extern bool intel_set_pch_fifo_underrun_reporting(struct drm_device *dev,
-+						 enum transcoder pch_transcoder,
-+						 bool enable);
-+extern void ilk_enable_gt_irq(struct drm_i915_private *dev_priv, uint32_t mask);
-+extern void ilk_disable_gt_irq(struct drm_i915_private *dev_priv,
-+			       uint32_t mask);
-+extern void snb_enable_pm_irq(struct drm_i915_private *dev_priv, uint32_t mask);
-+extern void snb_disable_pm_irq(struct drm_i915_private *dev_priv,
-+			       uint32_t mask);
-+extern void hsw_pc8_disable_interrupts(struct drm_device *dev);
-+extern void hsw_pc8_restore_interrupts(struct drm_device *dev);
-+
-+
-+/* intel_crt.c */
-+extern void intel_crt_init(struct drm_device *dev);
-+
-+
-+/* intel_ddi.c */
-+extern void intel_prepare_ddi(struct drm_device *dev);
-+extern void hsw_fdi_link_train(struct drm_crtc *crtc);
-+extern void intel_ddi_init(struct drm_device *dev, enum port port);
-+extern enum port
-+intel_ddi_get_encoder_port(struct intel_encoder *intel_encoder);
-+extern bool intel_ddi_get_hw_state(struct intel_encoder *encoder,
-+				   enum pipe *pipe);
-+extern int intel_ddi_get_cdclk_freq(struct drm_i915_private *dev_priv);
-+extern void intel_ddi_pll_init(struct drm_device *dev);
-+extern void intel_ddi_enable_transcoder_func(struct drm_crtc *crtc);
-+extern void intel_ddi_disable_transcoder_func(struct drm_i915_private *dev_priv,
-+					      enum transcoder cpu_transcoder);
-+extern void intel_ddi_enable_pipe_clock(struct intel_crtc *intel_crtc);
-+extern void intel_ddi_disable_pipe_clock(struct intel_crtc *intel_crtc);
-+extern void intel_ddi_setup_hw_pll_state(struct drm_device *dev);
-+extern bool intel_ddi_pll_mode_set(struct drm_crtc *crtc);
-+extern void intel_ddi_put_crtc_pll(struct drm_crtc *crtc);
-+extern void intel_ddi_set_pipe_settings(struct drm_crtc *crtc);
-+extern void intel_ddi_prepare_link_retrain(struct drm_encoder *encoder);
-+extern bool
-+intel_ddi_connector_get_hw_state(struct intel_connector *intel_connector);
-+extern void intel_ddi_fdi_disable(struct drm_crtc *crtc);
-+extern void intel_ddi_get_config(struct intel_encoder *encoder,
-+				 struct intel_crtc_config *pipe_config);
-+
-+
-+/* intel_display.c */
-+int intel_pch_rawclk(struct drm_device *dev);
-+extern bool intel_pipe_has_type(struct drm_crtc *crtc, int type);
-+extern void intel_mark_busy(struct drm_device *dev);
-+extern void intel_mark_fb_busy(struct drm_i915_gem_object *obj,
-+			       struct intel_ring_buffer *ring);
-+extern void intel_mark_idle(struct drm_device *dev);
-+extern void intel_crtc_restore_mode(struct drm_crtc *crtc);
-+extern void intel_crtc_load_lut(struct drm_crtc *crtc);
-+extern void intel_crtc_update_dpms(struct drm_crtc *crtc);
-+extern void intel_encoder_destroy(struct drm_encoder *encoder);
-+extern void intel_connector_dpms(struct drm_connector *, int mode);
-+extern bool intel_connector_get_hw_state(struct intel_connector *connector);
-+extern void intel_modeset_check_state(struct drm_device *dev);
- bool ibx_digital_port_connected(struct drm_i915_private *dev_priv,
- 				struct intel_digital_port *port);
--
- extern void intel_connector_attach_encoder(struct intel_connector *connector,
- 					   struct intel_encoder *encoder);
- extern struct drm_encoder *intel_best_encoder(struct drm_connector *connector);
--
- extern struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev,
- 						    struct drm_crtc *crtc);
- int intel_get_pipe_from_crtc_id(struct drm_device *dev, void *data,
- 				struct drm_file *file_priv);
- extern enum transcoder
--intel_pipe_to_cpu_transcoder(struct drm_i915_private *dev_priv,
--			     enum pipe pipe);
-+intel_pipe_to_cpu_transcoder(struct drm_i915_private *dev_priv, enum pipe pipe);
- extern void intel_wait_for_vblank(struct drm_device *dev, int pipe);
- extern void intel_wait_for_pipe_off(struct drm_device *dev, int pipe);
- extern int ironlake_get_lanes_required(int target_clock, int link_bw, int bpp);
- extern void vlv_wait_port_ready(struct drm_i915_private *dev_priv, int port);
--
--struct intel_load_detect_pipe {
--	struct drm_framebuffer *release_fb;
--	bool load_detect_temp;
--	int dpms_mode;
--};
- extern bool intel_get_load_detect_pipe(struct drm_connector *connector,
- 				       struct drm_display_mode *mode,
- 				       struct intel_load_detect_pipe *old);
- extern void intel_release_load_detect_pipe(struct drm_connector *connector,
- 					   struct intel_load_detect_pipe *old);
--
- extern void intel_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
- 				    u16 blue, int regno);
- extern void intel_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
- 				    u16 *blue, int regno);
--
- extern int intel_pin_and_fence_fb_obj(struct drm_device *dev,
- 				      struct drm_i915_gem_object *obj,
- 				      struct intel_ring_buffer *pipelined);
- extern void intel_unpin_fb_obj(struct drm_i915_gem_object *obj);
--
- extern int intel_framebuffer_init(struct drm_device *dev,
- 				  struct intel_framebuffer *ifb,
- 				  struct drm_mode_fb_cmd2 *mode_cmd,
- 				  struct drm_i915_gem_object *obj);
- extern void intel_framebuffer_fini(struct intel_framebuffer *fb);
--extern int intel_fbdev_init(struct drm_device *dev);
--extern void intel_fbdev_initial_config(struct drm_device *dev);
--extern void intel_fbdev_fini(struct drm_device *dev);
--extern void intel_fbdev_set_suspend(struct drm_device *dev, int state);
- extern void intel_prepare_page_flip(struct drm_device *dev, int plane);
- extern void intel_finish_page_flip(struct drm_device *dev, int pipe);
- extern void intel_finish_page_flip_plane(struct drm_device *dev, int plane);
--
--extern void intel_setup_overlay(struct drm_device *dev);
--extern void intel_cleanup_overlay(struct drm_device *dev);
--extern int intel_overlay_switch_off(struct intel_overlay *overlay);
--extern int intel_overlay_put_image(struct drm_device *dev, void *data,
--				   struct drm_file *file_priv);
--extern int intel_overlay_attrs(struct drm_device *dev, void *data,
--			       struct drm_file *file_priv);
--
--extern void intel_fb_output_poll_changed(struct drm_device *dev);
--extern void intel_fb_restore_mode(struct drm_device *dev);
--
--struct intel_shared_dpll *
--intel_crtc_to_shared_dpll(struct intel_crtc *crtc);
--
-+struct intel_shared_dpll *intel_crtc_to_shared_dpll(struct intel_crtc *crtc);
- void assert_shared_dpll(struct drm_i915_private *dev_priv,
- 			struct intel_shared_dpll *pll,
- 			bool state);
-@@ -720,46 +674,144 @@ extern void assert_pipe(struct drm_i915_private *dev_priv, enum pipe pipe,
- 			bool state);
- #define assert_pipe_enabled(d, p) assert_pipe(d, p, true)
- #define assert_pipe_disabled(d, p) assert_pipe(d, p, false)
--
--extern void intel_init_clock_gating(struct drm_device *dev);
--extern void intel_suspend_hw(struct drm_device *dev);
- extern void intel_write_eld(struct drm_encoder *encoder,
- 			    struct drm_display_mode *mode);
--extern void intel_prepare_ddi(struct drm_device *dev);
--extern void hsw_fdi_link_train(struct drm_crtc *crtc);
--extern void intel_ddi_init(struct drm_device *dev, enum port port);
--extern enum port intel_ddi_get_encoder_port(struct intel_encoder *intel_encoder);
--
--/* For use by IVB LP watermark workaround in intel_sprite.c */
--extern void intel_update_watermarks(struct drm_crtc *crtc);
--extern void intel_update_sprite_watermarks(struct drm_plane *plane,
--					   struct drm_crtc *crtc,
--					   uint32_t sprite_width, int pixel_size,
--					   bool enabled, bool scaled);
--
- extern unsigned long intel_gen4_compute_page_offset(int *x, int *y,
- 						    unsigned int tiling_mode,
- 						    unsigned int bpp,
- 						    unsigned int pitch);
-+extern void intel_display_handle_reset(struct drm_device *dev);
-+extern void hsw_disable_lcpll(struct drm_i915_private *dev_priv,
-+			      bool switch_to_fclk, bool allow_power_down);
-+extern void hsw_restore_lcpll(struct drm_i915_private *dev_priv);
-+extern void hsw_enable_pc8_work(struct work_struct *__work);
-+extern void hsw_enable_package_c8(struct drm_i915_private *dev_priv);
-+extern void hsw_disable_package_c8(struct drm_i915_private *dev_priv);
-+extern void intel_dp_get_m_n(struct intel_crtc *crtc,
-+			     struct intel_crtc_config *pipe_config);
-+extern int intel_dotclock_calculate(int link_freq,
-+				    const struct intel_link_m_n *m_n);
-+extern void
-+ironlake_check_encoder_dotclock(const struct intel_crtc_config *pipe_config,
-+				int dotclock);
-+extern bool intel_crtc_active(struct drm_crtc *crtc);
-+extern void i915_disable_vga_mem(struct drm_device *dev);
- 
--extern int intel_sprite_set_colorkey(struct drm_device *dev, void *data,
--				     struct drm_file *file_priv);
--extern int intel_sprite_get_colorkey(struct drm_device *dev, void *data,
--				     struct drm_file *file_priv);
- 
--/* Power-related functions, located in intel_pm.c */
-+/* intel_dp.c */
-+extern void intel_dp_init(struct drm_device *dev, int output_reg,
-+			  enum port port);
-+extern bool intel_dp_init_connector(struct intel_digital_port *intel_dig_port,
-+				    struct intel_connector *intel_connector);
-+extern void intel_dp_init_link_config(struct intel_dp *intel_dp);
-+extern void intel_dp_start_link_train(struct intel_dp *intel_dp);
-+extern void intel_dp_complete_link_train(struct intel_dp *intel_dp);
-+extern void intel_dp_stop_link_train(struct intel_dp *intel_dp);
-+extern void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode);
-+extern void intel_dp_encoder_destroy(struct drm_encoder *encoder);
-+extern void intel_dp_check_link_status(struct intel_dp *intel_dp);
-+extern bool intel_dp_compute_config(struct intel_encoder *encoder,
-+				    struct intel_crtc_config *pipe_config);
-+extern bool intel_dpd_is_edp(struct drm_device *dev);
-+extern void ironlake_edp_backlight_on(struct intel_dp *intel_dp);
-+extern void ironlake_edp_backlight_off(struct intel_dp *intel_dp);
-+extern void ironlake_edp_panel_on(struct intel_dp *intel_dp);
-+extern void ironlake_edp_panel_off(struct intel_dp *intel_dp);
-+extern void ironlake_edp_panel_vdd_on(struct intel_dp *intel_dp);
-+extern void ironlake_edp_panel_vdd_off(struct intel_dp *intel_dp, bool sync);
-+extern void intel_edp_psr_enable(struct intel_dp *intel_dp);
-+extern void intel_edp_psr_disable(struct intel_dp *intel_dp);
-+extern void intel_edp_psr_update(struct drm_device *dev);
-+
-+
-+/* intel_dsi.c */
-+extern bool intel_dsi_init(struct drm_device *dev);
-+
-+
-+/* intel_dvo.c */
-+extern void intel_dvo_init(struct drm_device *dev);
-+
-+
-+/* intel_fb.c */
-+extern int intel_fbdev_init(struct drm_device *dev);
-+extern void intel_fbdev_initial_config(struct drm_device *dev);
-+extern void intel_fbdev_fini(struct drm_device *dev);
-+extern void intel_fbdev_set_suspend(struct drm_device *dev, int state);
-+extern void intel_fb_output_poll_changed(struct drm_device *dev);
-+extern void intel_fb_restore_mode(struct drm_device *dev);
-+
-+
-+/* intel_hdmi.c */
-+extern void intel_hdmi_init(struct drm_device *dev,
-+			    int hdmi_reg, enum port port);
-+extern void intel_hdmi_init_connector(struct intel_digital_port *intel_dig_port,
-+				      struct intel_connector *intel_connector);
-+extern struct intel_hdmi *enc_to_intel_hdmi(struct drm_encoder *encoder);
-+extern bool intel_hdmi_compute_config(struct intel_encoder *encoder,
-+				      struct intel_crtc_config *pipe_config);
-+
-+
-+/* intel_lvds.c */
-+extern void intel_lvds_init(struct drm_device *dev);
-+extern bool intel_is_dual_link_lvds(struct drm_device *dev);
-+
-+
-+/* intel_modes.c */
-+int intel_connector_update_modes(struct drm_connector *connector,
-+				struct edid *edid);
-+int intel_ddc_get_modes(struct drm_connector *c, struct i2c_adapter *adapter);
-+extern void intel_attach_force_audio_property(struct drm_connector *connector);
-+extern void
-+intel_attach_broadcast_rgb_property(struct drm_connector *connector);
-+
-+
-+/* intel_overlay.c */
-+extern void intel_setup_overlay(struct drm_device *dev);
-+extern void intel_cleanup_overlay(struct drm_device *dev);
-+extern int intel_overlay_switch_off(struct intel_overlay *overlay);
-+extern int intel_overlay_put_image(struct drm_device *dev, void *data,
-+				   struct drm_file *file_priv);
-+extern int intel_overlay_attrs(struct drm_device *dev, void *data,
-+			       struct drm_file *file_priv);
-+
-+
-+/* intel_panel.c */
-+extern int intel_panel_init(struct intel_panel *panel,
-+			    struct drm_display_mode *fixed_mode);
-+extern void intel_panel_fini(struct intel_panel *panel);
-+extern void intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode,
-+				   struct drm_display_mode *adjusted_mode);
-+extern void intel_pch_panel_fitting(struct intel_crtc *crtc,
-+				    struct intel_crtc_config *pipe_config,
-+				    int fitting_mode);
-+extern void intel_gmch_panel_fitting(struct intel_crtc *crtc,
-+				     struct intel_crtc_config *pipe_config,
-+				     int fitting_mode);
-+extern void intel_panel_set_backlight(struct drm_device *dev,
-+				      u32 level, u32 max);
-+extern int intel_panel_setup_backlight(struct drm_connector *connector);
-+extern void intel_panel_enable_backlight(struct drm_device *dev,
-+					 enum pipe pipe);
-+extern void intel_panel_disable_backlight(struct drm_device *dev);
-+extern void intel_panel_destroy_backlight(struct drm_device *dev);
-+extern enum drm_connector_status intel_panel_detect(struct drm_device *dev);
-+
-+
-+/* intel_pm.c */
-+extern void intel_init_clock_gating(struct drm_device *dev);
-+extern void intel_suspend_hw(struct drm_device *dev);
-+extern void intel_update_watermarks(struct drm_crtc *crtc);
-+extern void intel_update_sprite_watermarks(struct drm_plane *plane,
-+					   struct drm_crtc *crtc,
-+					   uint32_t sprite_width, int pixel_size,
-+					   bool enabled, bool scaled);
- extern void intel_init_pm(struct drm_device *dev);
--/* FBC */
- extern bool intel_fbc_enabled(struct drm_device *dev);
- extern void intel_update_fbc(struct drm_device *dev);
--/* IPS */
- extern void intel_gpu_ips_init(struct drm_i915_private *dev_priv);
- extern void intel_gpu_ips_teardown(void);
--
--/* Power well */
- extern int i915_init_power_well(struct drm_device *dev);
- extern void i915_remove_power_well(struct drm_device *dev);
--
- extern bool intel_display_power_enabled(struct drm_device *dev,
- 					enum intel_display_power_domain domain);
- extern void intel_display_power_get(struct drm_device *dev,
-@@ -773,62 +825,28 @@ extern void intel_enable_gt_powersave(struct drm_device *dev);
- extern void intel_disable_gt_powersave(struct drm_device *dev);
- extern void ironlake_teardown_rc6(struct drm_device *dev);
- void gen6_update_ring_freq(struct drm_device *dev);
-+extern void intel_aux_display_runtime_get(struct drm_i915_private *dev_priv);
-+extern void intel_aux_display_runtime_put(struct drm_i915_private *dev_priv);
- 
--extern bool intel_ddi_get_hw_state(struct intel_encoder *encoder,
--				   enum pipe *pipe);
--extern int intel_ddi_get_cdclk_freq(struct drm_i915_private *dev_priv);
--extern void intel_ddi_pll_init(struct drm_device *dev);
--extern void intel_ddi_enable_transcoder_func(struct drm_crtc *crtc);
--extern void intel_ddi_disable_transcoder_func(struct drm_i915_private *dev_priv,
--					      enum transcoder cpu_transcoder);
--extern void intel_ddi_enable_pipe_clock(struct intel_crtc *intel_crtc);
--extern void intel_ddi_disable_pipe_clock(struct intel_crtc *intel_crtc);
--extern void intel_ddi_setup_hw_pll_state(struct drm_device *dev);
--extern bool intel_ddi_pll_mode_set(struct drm_crtc *crtc);
--extern void intel_ddi_put_crtc_pll(struct drm_crtc *crtc);
--extern void intel_ddi_set_pipe_settings(struct drm_crtc *crtc);
--extern void intel_ddi_prepare_link_retrain(struct drm_encoder *encoder);
--extern bool
--intel_ddi_connector_get_hw_state(struct intel_connector *intel_connector);
--extern void intel_ddi_fdi_disable(struct drm_crtc *crtc);
- 
--extern void intel_display_handle_reset(struct drm_device *dev);
--extern bool intel_set_cpu_fifo_underrun_reporting(struct drm_device *dev,
--						  enum pipe pipe,
--						  bool enable);
--extern bool intel_set_pch_fifo_underrun_reporting(struct drm_device *dev,
--						 enum transcoder pch_transcoder,
--						 bool enable);
-+/* intel_sdvo.c */
-+extern bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg,
-+			    bool is_sdvob);
- 
--extern void intel_edp_psr_enable(struct intel_dp *intel_dp);
--extern void intel_edp_psr_disable(struct intel_dp *intel_dp);
--extern void intel_edp_psr_update(struct drm_device *dev);
--extern void hsw_disable_lcpll(struct drm_i915_private *dev_priv,
--			      bool switch_to_fclk, bool allow_power_down);
--extern void hsw_restore_lcpll(struct drm_i915_private *dev_priv);
--extern void ilk_enable_gt_irq(struct drm_i915_private *dev_priv, uint32_t mask);
--extern void ilk_disable_gt_irq(struct drm_i915_private *dev_priv,
--			       uint32_t mask);
--extern void snb_enable_pm_irq(struct drm_i915_private *dev_priv, uint32_t mask);
--extern void snb_disable_pm_irq(struct drm_i915_private *dev_priv,
--			       uint32_t mask);
--extern void hsw_enable_pc8_work(struct work_struct *__work);
--extern void hsw_enable_package_c8(struct drm_i915_private *dev_priv);
--extern void hsw_disable_package_c8(struct drm_i915_private *dev_priv);
--extern void hsw_pc8_disable_interrupts(struct drm_device *dev);
--extern void hsw_pc8_restore_interrupts(struct drm_device *dev);
--extern void intel_aux_display_runtime_get(struct drm_i915_private *dev_priv);
--extern void intel_aux_display_runtime_put(struct drm_i915_private *dev_priv);
--extern void intel_dp_get_m_n(struct intel_crtc *crtc,
--			     struct intel_crtc_config *pipe_config);
--extern int intel_dotclock_calculate(int link_freq,
--				    const struct intel_link_m_n *m_n);
--extern void ironlake_check_encoder_dotclock(const struct intel_crtc_config *pipe_config,
--					    int dotclock);
- 
--extern bool intel_crtc_active(struct drm_crtc *crtc);
--extern void i915_disable_vga_mem(struct drm_device *dev);
--extern void intel_ddi_get_config(struct intel_encoder *encoder,
--				 struct intel_crtc_config *pipe_config);
-+/* intel_sprite.c */
-+extern int intel_plane_init(struct drm_device *dev, enum pipe pipe, int plane);
-+extern void intel_flush_display_plane(struct drm_i915_private *dev_priv,
-+				      enum plane plane);
-+extern void intel_plane_restore(struct drm_plane *plane);
-+extern void intel_plane_disable(struct drm_plane *plane);
-+extern int intel_sprite_set_colorkey(struct drm_device *dev, void *data,
-+				     struct drm_file *file_priv);
-+extern int intel_sprite_get_colorkey(struct drm_device *dev, void *data,
-+				     struct drm_file *file_priv);
-+
-+
-+/* intel_tv.c */
-+extern void intel_tv_init(struct drm_device *dev);
- 
- #endif /* __INTEL_DRV_H__ */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0927-drm-i915-make-intel_pipe_has_type-static.patch b/patches.baytrail/0927-drm-i915-make-intel_pipe_has_type-static.patch
deleted file mode 100644
index 3386ec28c9fe1..0000000000000
--- a/patches.baytrail/0927-drm-i915-make-intel_pipe_has_type-static.patch
+++ /dev/null
@@ -1,88 +0,0 @@
-From d5c5a4b0855c3859e0d703d602e74910c6a06da6 Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Tue, 24 Sep 2013 13:52:54 -0300
-Subject: drm/i915: make intel_pipe_has_type static
-
-Also move it to the top of the file so we can remove the forward
-declaration.
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit e0638cdf2d35a0ad04c3ceb8b61d9be4fde0d45f)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 31 +++++++++++++++----------------
- drivers/gpu/drm/i915/intel_drv.h     |  1 -
- 2 files changed, 15 insertions(+), 17 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index dc1f45a2a04a..9c02b9aa7464 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -41,7 +41,6 @@
- #include <drm/drm_crtc_helper.h>
- #include <linux/dma_remapping.h>
- 
--bool intel_pipe_has_type(struct drm_crtc *crtc, int type);
- static void intel_increase_pllclock(struct drm_crtc *crtc);
- static void intel_crtc_update_cursor(struct drm_crtc *crtc, bool on);
- 
-@@ -336,6 +335,21 @@ static const intel_limit_t intel_limits_vlv_hdmi = {
- 		.p2_slow = 2, .p2_fast = 20 },
- };
- 
-+/**
-+ * Returns whether any output on the specified pipe is of the specified type
-+ */
-+static bool intel_pipe_has_type(struct drm_crtc *crtc, int type)
-+{
-+	struct drm_device *dev = crtc->dev;
-+	struct intel_encoder *encoder;
-+
-+	for_each_encoder_on_crtc(dev, crtc, encoder)
-+		if (encoder->type == type)
-+			return true;
-+
-+	return false;
-+}
-+
- static const intel_limit_t *intel_ironlake_limit(struct drm_crtc *crtc,
- 						int refclk)
- {
-@@ -438,21 +452,6 @@ static void i9xx_clock(int refclk, intel_clock_t *clock)
- 	clock->dot = clock->vco / clock->p;
- }
- 
--/**
-- * Returns whether any output on the specified pipe is of the specified type
-- */
--bool intel_pipe_has_type(struct drm_crtc *crtc, int type)
--{
--	struct drm_device *dev = crtc->dev;
--	struct intel_encoder *encoder;
--
--	for_each_encoder_on_crtc(dev, crtc, encoder)
--		if (encoder->type == type)
--			return true;
--
--	return false;
--}
--
- #define INTELPllInvalid(s)   do { /* DRM_DEBUG(s); */ return false; } while (0)
- /**
-  * Returns whether the given set of divisors are valid for a given refclk with
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index 805dc923d2a5..04117f76e52f 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -608,7 +608,6 @@ extern void intel_ddi_get_config(struct intel_encoder *encoder,
- 
- /* intel_display.c */
- int intel_pch_rawclk(struct drm_device *dev);
--extern bool intel_pipe_has_type(struct drm_crtc *crtc, int type);
- extern void intel_mark_busy(struct drm_device *dev);
- extern void intel_mark_fb_busy(struct drm_i915_gem_object *obj,
- 			       struct intel_ring_buffer *ring);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0928-drm-i915-make-intel_crtc_load_lut-static.patch b/patches.baytrail/0928-drm-i915-make-intel_crtc_load_lut-static.patch
deleted file mode 100644
index 6aae741b5a690..0000000000000
--- a/patches.baytrail/0928-drm-i915-make-intel_crtc_load_lut-static.patch
+++ /dev/null
@@ -1,212 +0,0 @@
-From b6b2aa7cc07060941badd35dd6b446080f6c79ad Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Tue, 24 Sep 2013 13:52:55 -0300
-Subject: drm/i915: make intel_crtc_load_lut static
-
-And move it so it doesn't need a forward declaration.
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit d77e4531bd8135c513bed83dc3a3e3f5540e65e6)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 156 +++++++++++++++++------------------
- drivers/gpu/drm/i915/intel_drv.h     |   1 -
- 2 files changed, 78 insertions(+), 79 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 9c02b9aa7464..74d32887316c 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -3282,6 +3282,84 @@ static void intel_disable_planes(struct drm_crtc *crtc)
- 			intel_plane_disable(&intel_plane->base);
- }
- 
-+static void hsw_enable_ips(struct intel_crtc *crtc)
-+{
-+	struct drm_i915_private *dev_priv = crtc->base.dev->dev_private;
-+
-+	if (!crtc->config.ips_enabled)
-+		return;
-+
-+	/* We can only enable IPS after we enable a plane and wait for a vblank.
-+	 * We guarantee that the plane is enabled by calling intel_enable_ips
-+	 * only after intel_enable_plane. And intel_enable_plane already waits
-+	 * for a vblank, so all we need to do here is to enable the IPS bit. */
-+	assert_plane_enabled(dev_priv, crtc->plane);
-+	I915_WRITE(IPS_CTL, IPS_ENABLE);
-+}
-+
-+static void hsw_disable_ips(struct intel_crtc *crtc)
-+{
-+	struct drm_device *dev = crtc->base.dev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+
-+	if (!crtc->config.ips_enabled)
-+		return;
-+
-+	assert_plane_enabled(dev_priv, crtc->plane);
-+	I915_WRITE(IPS_CTL, 0);
-+	POSTING_READ(IPS_CTL);
-+
-+	/* We need to wait for a vblank before we can disable the plane. */
-+	intel_wait_for_vblank(dev, crtc->pipe);
-+}
-+
-+/** Loads the palette/gamma unit for the CRTC with the prepared values */
-+static void intel_crtc_load_lut(struct drm_crtc *crtc)
-+{
-+	struct drm_device *dev = crtc->dev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
-+	enum pipe pipe = intel_crtc->pipe;
-+	int palreg = PALETTE(pipe);
-+	int i;
-+	bool reenable_ips = false;
-+
-+	/* The clocks have to be on to load the palette. */
-+	if (!crtc->enabled || !intel_crtc->active)
-+		return;
-+
-+	if (!HAS_PCH_SPLIT(dev_priv->dev)) {
-+		if (intel_pipe_has_type(crtc, INTEL_OUTPUT_DSI))
-+			assert_dsi_pll_enabled(dev_priv);
-+		else
-+			assert_pll_enabled(dev_priv, pipe);
-+	}
-+
-+	/* use legacy palette for Ironlake */
-+	if (HAS_PCH_SPLIT(dev))
-+		palreg = LGC_PALETTE(pipe);
-+
-+	/* Workaround : Do not read or write the pipe palette/gamma data while
-+	 * GAMMA_MODE is configured for split gamma and IPS_CTL has IPS enabled.
-+	 */
-+	if (intel_crtc->config.ips_enabled &&
-+	    ((I915_READ(GAMMA_MODE(pipe)) & GAMMA_MODE_MODE_MASK) ==
-+	     GAMMA_MODE_MODE_SPLIT)) {
-+		hsw_disable_ips(intel_crtc);
-+		reenable_ips = true;
-+	}
-+
-+	for (i = 0; i < 256; i++) {
-+		I915_WRITE(palreg + 4 * i,
-+			   (intel_crtc->lut_r[i] << 16) |
-+			   (intel_crtc->lut_g[i] << 8) |
-+			   intel_crtc->lut_b[i]);
-+	}
-+
-+	if (reenable_ips)
-+		hsw_enable_ips(intel_crtc);
-+}
-+
- static void ironlake_crtc_enable(struct drm_crtc *crtc)
- {
- 	struct drm_device *dev = crtc->dev;
-@@ -3360,37 +3438,6 @@ static bool hsw_crtc_supports_ips(struct intel_crtc *crtc)
- 	return HAS_IPS(crtc->base.dev) && crtc->pipe == PIPE_A;
- }
- 
--static void hsw_enable_ips(struct intel_crtc *crtc)
--{
--	struct drm_i915_private *dev_priv = crtc->base.dev->dev_private;
--
--	if (!crtc->config.ips_enabled)
--		return;
--
--	/* We can only enable IPS after we enable a plane and wait for a vblank.
--	 * We guarantee that the plane is enabled by calling intel_enable_ips
--	 * only after intel_enable_plane. And intel_enable_plane already waits
--	 * for a vblank, so all we need to do here is to enable the IPS bit. */
--	assert_plane_enabled(dev_priv, crtc->plane);
--	I915_WRITE(IPS_CTL, IPS_ENABLE);
--}
--
--static void hsw_disable_ips(struct intel_crtc *crtc)
--{
--	struct drm_device *dev = crtc->base.dev;
--	struct drm_i915_private *dev_priv = dev->dev_private;
--
--	if (!crtc->config.ips_enabled)
--		return;
--
--	assert_plane_enabled(dev_priv, crtc->plane);
--	I915_WRITE(IPS_CTL, 0);
--	POSTING_READ(IPS_CTL);
--
--	/* We need to wait for a vblank before we can disable the plane. */
--	intel_wait_for_vblank(dev, crtc->pipe);
--}
--
- static void haswell_crtc_enable(struct drm_crtc *crtc)
- {
- 	struct drm_device *dev = crtc->dev;
-@@ -6782,53 +6829,6 @@ void intel_write_eld(struct drm_encoder *encoder,
- 		dev_priv->display.write_eld(connector, crtc);
- }
- 
--/** Loads the palette/gamma unit for the CRTC with the prepared values */
--void intel_crtc_load_lut(struct drm_crtc *crtc)
--{
--	struct drm_device *dev = crtc->dev;
--	struct drm_i915_private *dev_priv = dev->dev_private;
--	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
--	enum pipe pipe = intel_crtc->pipe;
--	int palreg = PALETTE(pipe);
--	int i;
--	bool reenable_ips = false;
--
--	/* The clocks have to be on to load the palette. */
--	if (!crtc->enabled || !intel_crtc->active)
--		return;
--
--	if (!HAS_PCH_SPLIT(dev_priv->dev)) {
--		if (intel_pipe_has_type(crtc, INTEL_OUTPUT_DSI))
--			assert_dsi_pll_enabled(dev_priv);
--		else
--			assert_pll_enabled(dev_priv, pipe);
--	}
--
--	/* use legacy palette for Ironlake */
--	if (HAS_PCH_SPLIT(dev))
--		palreg = LGC_PALETTE(pipe);
--
--	/* Workaround : Do not read or write the pipe palette/gamma data while
--	 * GAMMA_MODE is configured for split gamma and IPS_CTL has IPS enabled.
--	 */
--	if (intel_crtc->config.ips_enabled &&
--	    ((I915_READ(GAMMA_MODE(pipe)) & GAMMA_MODE_MODE_MASK) ==
--	     GAMMA_MODE_MODE_SPLIT)) {
--		hsw_disable_ips(intel_crtc);
--		reenable_ips = true;
--	}
--
--	for (i = 0; i < 256; i++) {
--		I915_WRITE(palreg + 4 * i,
--			   (intel_crtc->lut_r[i] << 16) |
--			   (intel_crtc->lut_g[i] << 8) |
--			   intel_crtc->lut_b[i]);
--	}
--
--	if (reenable_ips)
--		hsw_enable_ips(intel_crtc);
--}
--
- static void i845_update_cursor(struct drm_crtc *crtc, u32 base)
- {
- 	struct drm_device *dev = crtc->dev;
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index 04117f76e52f..0074d75fcee9 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -613,7 +613,6 @@ extern void intel_mark_fb_busy(struct drm_i915_gem_object *obj,
- 			       struct intel_ring_buffer *ring);
- extern void intel_mark_idle(struct drm_device *dev);
- extern void intel_crtc_restore_mode(struct drm_crtc *crtc);
--extern void intel_crtc_load_lut(struct drm_crtc *crtc);
- extern void intel_crtc_update_dpms(struct drm_crtc *crtc);
- extern void intel_encoder_destroy(struct drm_encoder *encoder);
- extern void intel_connector_dpms(struct drm_connector *, int mode);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0929-drm-i915-make-intel_crtc_fb_gamma_-set-get-static.patch b/patches.baytrail/0929-drm-i915-make-intel_crtc_fb_gamma_-set-get-static.patch
deleted file mode 100644
index 1546ac718f40f..0000000000000
--- a/patches.baytrail/0929-drm-i915-make-intel_crtc_fb_gamma_-set-get-static.patch
+++ /dev/null
@@ -1,99 +0,0 @@
-From a3e1f405d7743be6c26b7114c6d15be2bc269d8b Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Tue, 24 Sep 2013 13:52:56 -0300
-Subject: drm/i915: make intel_crtc_fb_gamma_{set, get} static
-
-By moving them to intel_fb.c.
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 6743768082aa5fed2009d67329c22e6a3bdf0f8d)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 21 ---------------------
- drivers/gpu/drm/i915/intel_drv.h     |  4 ----
- drivers/gpu/drm/i915/intel_fb.c      | 21 +++++++++++++++++++++
- 3 files changed, 21 insertions(+), 25 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 74d32887316c..3710ba65c809 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -7102,27 +7102,6 @@ static int intel_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
- 	return 0;
- }
- 
--/** Sets the color ramps on behalf of RandR */
--void intel_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
--				 u16 blue, int regno)
--{
--	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
--
--	intel_crtc->lut_r[regno] = red >> 8;
--	intel_crtc->lut_g[regno] = green >> 8;
--	intel_crtc->lut_b[regno] = blue >> 8;
--}
--
--void intel_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
--			     u16 *blue, int regno)
--{
--	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
--
--	*red = intel_crtc->lut_r[regno] << 8;
--	*green = intel_crtc->lut_g[regno] << 8;
--	*blue = intel_crtc->lut_b[regno] << 8;
--}
--
- static void intel_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green,
- 				 u16 *blue, uint32_t start, uint32_t size)
- {
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index 0074d75fcee9..5b63cc699a20 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -638,10 +638,6 @@ extern bool intel_get_load_detect_pipe(struct drm_connector *connector,
- 				       struct intel_load_detect_pipe *old);
- extern void intel_release_load_detect_pipe(struct drm_connector *connector,
- 					   struct intel_load_detect_pipe *old);
--extern void intel_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
--				    u16 blue, int regno);
--extern void intel_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
--				    u16 *blue, int regno);
- extern int intel_pin_and_fence_fb_obj(struct drm_device *dev,
- 				      struct drm_i915_gem_object *obj,
- 				      struct intel_ring_buffer *pipelined);
-diff --git a/drivers/gpu/drm/i915/intel_fb.c b/drivers/gpu/drm/i915/intel_fb.c
-index 7ceb69b9dd61..d883b77b1b78 100644
---- a/drivers/gpu/drm/i915/intel_fb.c
-+++ b/drivers/gpu/drm/i915/intel_fb.c
-@@ -184,6 +184,27 @@ out:
- 	return ret;
- }
- 
-+/** Sets the color ramps on behalf of RandR */
-+static void intel_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
-+				    u16 blue, int regno)
-+{
-+	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
-+
-+	intel_crtc->lut_r[regno] = red >> 8;
-+	intel_crtc->lut_g[regno] = green >> 8;
-+	intel_crtc->lut_b[regno] = blue >> 8;
-+}
-+
-+static void intel_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
-+				    u16 *blue, int regno)
-+{
-+	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
-+
-+	*red = intel_crtc->lut_r[regno] << 8;
-+	*green = intel_crtc->lut_g[regno] << 8;
-+	*blue = intel_crtc->lut_b[regno] << 8;
-+}
-+
- static struct drm_fb_helper_funcs intel_fb_helper_funcs = {
- 	.gamma_set = intel_crtc_fb_gamma_set,
- 	.gamma_get = intel_crtc_fb_gamma_get,
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0930-drm-i915-make-hsw_-disable-restore-_lcpll-static.patch b/patches.baytrail/0930-drm-i915-make-hsw_-disable-restore-_lcpll-static.patch
deleted file mode 100644
index 3ef1f2844f150..0000000000000
--- a/patches.baytrail/0930-drm-i915-make-hsw_-disable-restore-_lcpll-static.patch
+++ /dev/null
@@ -1,58 +0,0 @@
-From 3372b70066b7503ef660b186f3bea691c143f011 Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Tue, 24 Sep 2013 13:52:57 -0300
-Subject: drm/i915: make hsw_{disable, restore}_lcpll static
-
-These functions were added before the final PC8 implementation, and
-their callers moved to intel_display.c during the code review.
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 6ff58d537c58cb7332bfc54ff6d6f99e344755f4)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 6 +++---
- drivers/gpu/drm/i915/intel_drv.h     | 3 ---
- 2 files changed, 3 insertions(+), 6 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 3710ba65c809..b7059cebde48 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -6153,8 +6153,8 @@ static void assert_can_disable_lcpll(struct drm_i915_private *dev_priv)
-  * register. Callers should take care of disabling all the display engine
-  * functions, doing the mode unset, fixing interrupts, etc.
-  */
--void hsw_disable_lcpll(struct drm_i915_private *dev_priv,
--		       bool switch_to_fclk, bool allow_power_down)
-+static void hsw_disable_lcpll(struct drm_i915_private *dev_priv,
-+			      bool switch_to_fclk, bool allow_power_down)
- {
- 	uint32_t val;
- 
-@@ -6204,7 +6204,7 @@ void hsw_disable_lcpll(struct drm_i915_private *dev_priv,
-  * Fully restores LCPLL, disallowing power down and switching back to LCPLL
-  * source.
-  */
--void hsw_restore_lcpll(struct drm_i915_private *dev_priv)
-+static void hsw_restore_lcpll(struct drm_i915_private *dev_priv)
- {
- 	uint32_t val;
- 
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index 5b63cc699a20..a92f48176321 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -675,9 +675,6 @@ extern unsigned long intel_gen4_compute_page_offset(int *x, int *y,
- 						    unsigned int bpp,
- 						    unsigned int pitch);
- extern void intel_display_handle_reset(struct drm_device *dev);
--extern void hsw_disable_lcpll(struct drm_i915_private *dev_priv,
--			      bool switch_to_fclk, bool allow_power_down);
--extern void hsw_restore_lcpll(struct drm_i915_private *dev_priv);
- extern void hsw_enable_pc8_work(struct work_struct *__work);
- extern void hsw_enable_package_c8(struct drm_i915_private *dev_priv);
- extern void hsw_disable_package_c8(struct drm_i915_private *dev_priv);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0931-drm-i915-remove-extern-keywords-from-intel_drv.h-fun.patch b/patches.baytrail/0931-drm-i915-remove-extern-keywords-from-intel_drv.h-fun.patch
deleted file mode 100644
index 87c121b4beeea..0000000000000
--- a/patches.baytrail/0931-drm-i915-remove-extern-keywords-from-intel_drv.h-fun.patch
+++ /dev/null
@@ -1,498 +0,0 @@
-From c9da33b0788450f15f632c13a6c5bc5d3c453998 Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Tue, 24 Sep 2013 15:48:31 -0300
-Subject: drm/i915: remove "extern" keywords from intel_drv.h functions
-
-Since I already reorganized the header file, Daniel requested me to
-remove those keywords. It seems "checkpath.pl --strict" also doesn't
-like "extern" on header files.
-
-At least now we're consistent :)
-
-Requested-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 874404252e26518b5c3327a75f9f81670298cc1e)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_drv.h | 398 +++++++++++++++++++--------------------
- 1 file changed, 192 insertions(+), 206 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index a92f48176321..8c3cb3e30527 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -559,97 +559,91 @@ hdmi_to_dig_port(struct intel_hdmi *intel_hdmi)
- 
- 
- /* i915_irq.c */
--extern bool intel_set_cpu_fifo_underrun_reporting(struct drm_device *dev,
--						  enum pipe pipe,
--						  bool enable);
--extern bool intel_set_pch_fifo_underrun_reporting(struct drm_device *dev,
--						 enum transcoder pch_transcoder,
--						 bool enable);
--extern void ilk_enable_gt_irq(struct drm_i915_private *dev_priv, uint32_t mask);
--extern void ilk_disable_gt_irq(struct drm_i915_private *dev_priv,
--			       uint32_t mask);
--extern void snb_enable_pm_irq(struct drm_i915_private *dev_priv, uint32_t mask);
--extern void snb_disable_pm_irq(struct drm_i915_private *dev_priv,
--			       uint32_t mask);
--extern void hsw_pc8_disable_interrupts(struct drm_device *dev);
--extern void hsw_pc8_restore_interrupts(struct drm_device *dev);
-+bool intel_set_cpu_fifo_underrun_reporting(struct drm_device *dev,
-+					   enum pipe pipe, bool enable);
-+bool intel_set_pch_fifo_underrun_reporting(struct drm_device *dev,
-+					   enum transcoder pch_transcoder,
-+					   bool enable);
-+void ilk_enable_gt_irq(struct drm_i915_private *dev_priv, uint32_t mask);
-+void ilk_disable_gt_irq(struct drm_i915_private *dev_priv, uint32_t mask);
-+void snb_enable_pm_irq(struct drm_i915_private *dev_priv, uint32_t mask);
-+void snb_disable_pm_irq(struct drm_i915_private *dev_priv, uint32_t mask);
-+void hsw_pc8_disable_interrupts(struct drm_device *dev);
-+void hsw_pc8_restore_interrupts(struct drm_device *dev);
- 
- 
- /* intel_crt.c */
--extern void intel_crt_init(struct drm_device *dev);
-+void intel_crt_init(struct drm_device *dev);
- 
- 
- /* intel_ddi.c */
--extern void intel_prepare_ddi(struct drm_device *dev);
--extern void hsw_fdi_link_train(struct drm_crtc *crtc);
--extern void intel_ddi_init(struct drm_device *dev, enum port port);
--extern enum port
--intel_ddi_get_encoder_port(struct intel_encoder *intel_encoder);
--extern bool intel_ddi_get_hw_state(struct intel_encoder *encoder,
--				   enum pipe *pipe);
--extern int intel_ddi_get_cdclk_freq(struct drm_i915_private *dev_priv);
--extern void intel_ddi_pll_init(struct drm_device *dev);
--extern void intel_ddi_enable_transcoder_func(struct drm_crtc *crtc);
--extern void intel_ddi_disable_transcoder_func(struct drm_i915_private *dev_priv,
--					      enum transcoder cpu_transcoder);
--extern void intel_ddi_enable_pipe_clock(struct intel_crtc *intel_crtc);
--extern void intel_ddi_disable_pipe_clock(struct intel_crtc *intel_crtc);
--extern void intel_ddi_setup_hw_pll_state(struct drm_device *dev);
--extern bool intel_ddi_pll_mode_set(struct drm_crtc *crtc);
--extern void intel_ddi_put_crtc_pll(struct drm_crtc *crtc);
--extern void intel_ddi_set_pipe_settings(struct drm_crtc *crtc);
--extern void intel_ddi_prepare_link_retrain(struct drm_encoder *encoder);
--extern bool
--intel_ddi_connector_get_hw_state(struct intel_connector *intel_connector);
--extern void intel_ddi_fdi_disable(struct drm_crtc *crtc);
--extern void intel_ddi_get_config(struct intel_encoder *encoder,
--				 struct intel_crtc_config *pipe_config);
-+void intel_prepare_ddi(struct drm_device *dev);
-+void hsw_fdi_link_train(struct drm_crtc *crtc);
-+void intel_ddi_init(struct drm_device *dev, enum port port);
-+enum port intel_ddi_get_encoder_port(struct intel_encoder *intel_encoder);
-+bool intel_ddi_get_hw_state(struct intel_encoder *encoder, enum pipe *pipe);
-+int intel_ddi_get_cdclk_freq(struct drm_i915_private *dev_priv);
-+void intel_ddi_pll_init(struct drm_device *dev);
-+void intel_ddi_enable_transcoder_func(struct drm_crtc *crtc);
-+void intel_ddi_disable_transcoder_func(struct drm_i915_private *dev_priv,
-+				       enum transcoder cpu_transcoder);
-+void intel_ddi_enable_pipe_clock(struct intel_crtc *intel_crtc);
-+void intel_ddi_disable_pipe_clock(struct intel_crtc *intel_crtc);
-+void intel_ddi_setup_hw_pll_state(struct drm_device *dev);
-+bool intel_ddi_pll_mode_set(struct drm_crtc *crtc);
-+void intel_ddi_put_crtc_pll(struct drm_crtc *crtc);
-+void intel_ddi_set_pipe_settings(struct drm_crtc *crtc);
-+void intel_ddi_prepare_link_retrain(struct drm_encoder *encoder);
-+bool intel_ddi_connector_get_hw_state(struct intel_connector *intel_connector);
-+void intel_ddi_fdi_disable(struct drm_crtc *crtc);
-+void intel_ddi_get_config(struct intel_encoder *encoder,
-+			  struct intel_crtc_config *pipe_config);
- 
- 
- /* intel_display.c */
- int intel_pch_rawclk(struct drm_device *dev);
--extern void intel_mark_busy(struct drm_device *dev);
--extern void intel_mark_fb_busy(struct drm_i915_gem_object *obj,
--			       struct intel_ring_buffer *ring);
--extern void intel_mark_idle(struct drm_device *dev);
--extern void intel_crtc_restore_mode(struct drm_crtc *crtc);
--extern void intel_crtc_update_dpms(struct drm_crtc *crtc);
--extern void intel_encoder_destroy(struct drm_encoder *encoder);
--extern void intel_connector_dpms(struct drm_connector *, int mode);
--extern bool intel_connector_get_hw_state(struct intel_connector *connector);
--extern void intel_modeset_check_state(struct drm_device *dev);
-+void intel_mark_busy(struct drm_device *dev);
-+void intel_mark_fb_busy(struct drm_i915_gem_object *obj,
-+			struct intel_ring_buffer *ring);
-+void intel_mark_idle(struct drm_device *dev);
-+void intel_crtc_restore_mode(struct drm_crtc *crtc);
-+void intel_crtc_update_dpms(struct drm_crtc *crtc);
-+void intel_encoder_destroy(struct drm_encoder *encoder);
-+void intel_connector_dpms(struct drm_connector *, int mode);
-+bool intel_connector_get_hw_state(struct intel_connector *connector);
-+void intel_modeset_check_state(struct drm_device *dev);
- bool ibx_digital_port_connected(struct drm_i915_private *dev_priv,
- 				struct intel_digital_port *port);
--extern void intel_connector_attach_encoder(struct intel_connector *connector,
--					   struct intel_encoder *encoder);
--extern struct drm_encoder *intel_best_encoder(struct drm_connector *connector);
--extern struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev,
--						    struct drm_crtc *crtc);
-+void intel_connector_attach_encoder(struct intel_connector *connector,
-+				    struct intel_encoder *encoder);
-+struct drm_encoder *intel_best_encoder(struct drm_connector *connector);
-+struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev,
-+					     struct drm_crtc *crtc);
- int intel_get_pipe_from_crtc_id(struct drm_device *dev, void *data,
- 				struct drm_file *file_priv);
--extern enum transcoder
--intel_pipe_to_cpu_transcoder(struct drm_i915_private *dev_priv, enum pipe pipe);
--extern void intel_wait_for_vblank(struct drm_device *dev, int pipe);
--extern void intel_wait_for_pipe_off(struct drm_device *dev, int pipe);
--extern int ironlake_get_lanes_required(int target_clock, int link_bw, int bpp);
--extern void vlv_wait_port_ready(struct drm_i915_private *dev_priv, int port);
--extern bool intel_get_load_detect_pipe(struct drm_connector *connector,
--				       struct drm_display_mode *mode,
--				       struct intel_load_detect_pipe *old);
--extern void intel_release_load_detect_pipe(struct drm_connector *connector,
--					   struct intel_load_detect_pipe *old);
--extern int intel_pin_and_fence_fb_obj(struct drm_device *dev,
--				      struct drm_i915_gem_object *obj,
--				      struct intel_ring_buffer *pipelined);
--extern void intel_unpin_fb_obj(struct drm_i915_gem_object *obj);
--extern int intel_framebuffer_init(struct drm_device *dev,
--				  struct intel_framebuffer *ifb,
--				  struct drm_mode_fb_cmd2 *mode_cmd,
--				  struct drm_i915_gem_object *obj);
--extern void intel_framebuffer_fini(struct intel_framebuffer *fb);
--extern void intel_prepare_page_flip(struct drm_device *dev, int plane);
--extern void intel_finish_page_flip(struct drm_device *dev, int pipe);
--extern void intel_finish_page_flip_plane(struct drm_device *dev, int plane);
-+enum transcoder intel_pipe_to_cpu_transcoder(struct drm_i915_private *dev_priv,
-+					     enum pipe pipe);
-+void intel_wait_for_vblank(struct drm_device *dev, int pipe);
-+void intel_wait_for_pipe_off(struct drm_device *dev, int pipe);
-+int ironlake_get_lanes_required(int target_clock, int link_bw, int bpp);
-+void vlv_wait_port_ready(struct drm_i915_private *dev_priv, int port);
-+bool intel_get_load_detect_pipe(struct drm_connector *connector,
-+				struct drm_display_mode *mode,
-+				struct intel_load_detect_pipe *old);
-+void intel_release_load_detect_pipe(struct drm_connector *connector,
-+				    struct intel_load_detect_pipe *old);
-+int intel_pin_and_fence_fb_obj(struct drm_device *dev,
-+			       struct drm_i915_gem_object *obj,
-+			       struct intel_ring_buffer *pipelined);
-+void intel_unpin_fb_obj(struct drm_i915_gem_object *obj);
-+int intel_framebuffer_init(struct drm_device *dev,
-+			   struct intel_framebuffer *ifb,
-+			   struct drm_mode_fb_cmd2 *mode_cmd,
-+			   struct drm_i915_gem_object *obj);
-+void intel_framebuffer_fini(struct intel_framebuffer *fb);
-+void intel_prepare_page_flip(struct drm_device *dev, int plane);
-+void intel_finish_page_flip(struct drm_device *dev, int pipe);
-+void intel_finish_page_flip_plane(struct drm_device *dev, int plane);
- struct intel_shared_dpll *intel_crtc_to_shared_dpll(struct intel_crtc *crtc);
- void assert_shared_dpll(struct drm_i915_private *dev_priv,
- 			struct intel_shared_dpll *pll,
-@@ -664,180 +658,172 @@ void assert_fdi_rx_pll(struct drm_i915_private *dev_priv,
- 		       enum pipe pipe, bool state);
- #define assert_fdi_rx_pll_enabled(d, p) assert_fdi_rx_pll(d, p, true)
- #define assert_fdi_rx_pll_disabled(d, p) assert_fdi_rx_pll(d, p, false)
--extern void assert_pipe(struct drm_i915_private *dev_priv, enum pipe pipe,
--			bool state);
-+void assert_pipe(struct drm_i915_private *dev_priv, enum pipe pipe, bool state);
- #define assert_pipe_enabled(d, p) assert_pipe(d, p, true)
- #define assert_pipe_disabled(d, p) assert_pipe(d, p, false)
--extern void intel_write_eld(struct drm_encoder *encoder,
--			    struct drm_display_mode *mode);
--extern unsigned long intel_gen4_compute_page_offset(int *x, int *y,
--						    unsigned int tiling_mode,
--						    unsigned int bpp,
--						    unsigned int pitch);
--extern void intel_display_handle_reset(struct drm_device *dev);
--extern void hsw_enable_pc8_work(struct work_struct *__work);
--extern void hsw_enable_package_c8(struct drm_i915_private *dev_priv);
--extern void hsw_disable_package_c8(struct drm_i915_private *dev_priv);
--extern void intel_dp_get_m_n(struct intel_crtc *crtc,
--			     struct intel_crtc_config *pipe_config);
--extern int intel_dotclock_calculate(int link_freq,
--				    const struct intel_link_m_n *m_n);
--extern void
-+void intel_write_eld(struct drm_encoder *encoder,
-+		     struct drm_display_mode *mode);
-+unsigned long intel_gen4_compute_page_offset(int *x, int *y,
-+					     unsigned int tiling_mode,
-+					     unsigned int bpp,
-+					     unsigned int pitch);
-+void intel_display_handle_reset(struct drm_device *dev);
-+void hsw_enable_pc8_work(struct work_struct *__work);
-+void hsw_enable_package_c8(struct drm_i915_private *dev_priv);
-+void hsw_disable_package_c8(struct drm_i915_private *dev_priv);
-+void intel_dp_get_m_n(struct intel_crtc *crtc,
-+		      struct intel_crtc_config *pipe_config);
-+int intel_dotclock_calculate(int link_freq, const struct intel_link_m_n *m_n);
-+void
- ironlake_check_encoder_dotclock(const struct intel_crtc_config *pipe_config,
- 				int dotclock);
--extern bool intel_crtc_active(struct drm_crtc *crtc);
--extern void i915_disable_vga_mem(struct drm_device *dev);
-+bool intel_crtc_active(struct drm_crtc *crtc);
-+void i915_disable_vga_mem(struct drm_device *dev);
- 
- 
- /* intel_dp.c */
--extern void intel_dp_init(struct drm_device *dev, int output_reg,
--			  enum port port);
--extern bool intel_dp_init_connector(struct intel_digital_port *intel_dig_port,
--				    struct intel_connector *intel_connector);
--extern void intel_dp_init_link_config(struct intel_dp *intel_dp);
--extern void intel_dp_start_link_train(struct intel_dp *intel_dp);
--extern void intel_dp_complete_link_train(struct intel_dp *intel_dp);
--extern void intel_dp_stop_link_train(struct intel_dp *intel_dp);
--extern void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode);
--extern void intel_dp_encoder_destroy(struct drm_encoder *encoder);
--extern void intel_dp_check_link_status(struct intel_dp *intel_dp);
--extern bool intel_dp_compute_config(struct intel_encoder *encoder,
--				    struct intel_crtc_config *pipe_config);
--extern bool intel_dpd_is_edp(struct drm_device *dev);
--extern void ironlake_edp_backlight_on(struct intel_dp *intel_dp);
--extern void ironlake_edp_backlight_off(struct intel_dp *intel_dp);
--extern void ironlake_edp_panel_on(struct intel_dp *intel_dp);
--extern void ironlake_edp_panel_off(struct intel_dp *intel_dp);
--extern void ironlake_edp_panel_vdd_on(struct intel_dp *intel_dp);
--extern void ironlake_edp_panel_vdd_off(struct intel_dp *intel_dp, bool sync);
--extern void intel_edp_psr_enable(struct intel_dp *intel_dp);
--extern void intel_edp_psr_disable(struct intel_dp *intel_dp);
--extern void intel_edp_psr_update(struct drm_device *dev);
-+void intel_dp_init(struct drm_device *dev, int output_reg, enum port port);
-+bool intel_dp_init_connector(struct intel_digital_port *intel_dig_port,
-+			     struct intel_connector *intel_connector);
-+void intel_dp_init_link_config(struct intel_dp *intel_dp);
-+void intel_dp_start_link_train(struct intel_dp *intel_dp);
-+void intel_dp_complete_link_train(struct intel_dp *intel_dp);
-+void intel_dp_stop_link_train(struct intel_dp *intel_dp);
-+void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode);
-+void intel_dp_encoder_destroy(struct drm_encoder *encoder);
-+void intel_dp_check_link_status(struct intel_dp *intel_dp);
-+bool intel_dp_compute_config(struct intel_encoder *encoder,
-+			     struct intel_crtc_config *pipe_config);
-+bool intel_dpd_is_edp(struct drm_device *dev);
-+void ironlake_edp_backlight_on(struct intel_dp *intel_dp);
-+void ironlake_edp_backlight_off(struct intel_dp *intel_dp);
-+void ironlake_edp_panel_on(struct intel_dp *intel_dp);
-+void ironlake_edp_panel_off(struct intel_dp *intel_dp);
-+void ironlake_edp_panel_vdd_on(struct intel_dp *intel_dp);
-+void ironlake_edp_panel_vdd_off(struct intel_dp *intel_dp, bool sync);
-+void intel_edp_psr_enable(struct intel_dp *intel_dp);
-+void intel_edp_psr_disable(struct intel_dp *intel_dp);
-+void intel_edp_psr_update(struct drm_device *dev);
- 
- 
- /* intel_dsi.c */
--extern bool intel_dsi_init(struct drm_device *dev);
-+bool intel_dsi_init(struct drm_device *dev);
- 
- 
- /* intel_dvo.c */
--extern void intel_dvo_init(struct drm_device *dev);
-+void intel_dvo_init(struct drm_device *dev);
- 
- 
- /* intel_fb.c */
--extern int intel_fbdev_init(struct drm_device *dev);
--extern void intel_fbdev_initial_config(struct drm_device *dev);
--extern void intel_fbdev_fini(struct drm_device *dev);
--extern void intel_fbdev_set_suspend(struct drm_device *dev, int state);
--extern void intel_fb_output_poll_changed(struct drm_device *dev);
--extern void intel_fb_restore_mode(struct drm_device *dev);
-+int intel_fbdev_init(struct drm_device *dev);
-+void intel_fbdev_initial_config(struct drm_device *dev);
-+void intel_fbdev_fini(struct drm_device *dev);
-+void intel_fbdev_set_suspend(struct drm_device *dev, int state);
-+void intel_fb_output_poll_changed(struct drm_device *dev);
-+void intel_fb_restore_mode(struct drm_device *dev);
- 
- 
- /* intel_hdmi.c */
--extern void intel_hdmi_init(struct drm_device *dev,
--			    int hdmi_reg, enum port port);
--extern void intel_hdmi_init_connector(struct intel_digital_port *intel_dig_port,
--				      struct intel_connector *intel_connector);
--extern struct intel_hdmi *enc_to_intel_hdmi(struct drm_encoder *encoder);
--extern bool intel_hdmi_compute_config(struct intel_encoder *encoder,
--				      struct intel_crtc_config *pipe_config);
-+void intel_hdmi_init(struct drm_device *dev, int hdmi_reg, enum port port);
-+void intel_hdmi_init_connector(struct intel_digital_port *intel_dig_port,
-+			       struct intel_connector *intel_connector);
-+struct intel_hdmi *enc_to_intel_hdmi(struct drm_encoder *encoder);
-+bool intel_hdmi_compute_config(struct intel_encoder *encoder,
-+			       struct intel_crtc_config *pipe_config);
- 
- 
- /* intel_lvds.c */
--extern void intel_lvds_init(struct drm_device *dev);
--extern bool intel_is_dual_link_lvds(struct drm_device *dev);
-+void intel_lvds_init(struct drm_device *dev);
-+bool intel_is_dual_link_lvds(struct drm_device *dev);
- 
- 
- /* intel_modes.c */
- int intel_connector_update_modes(struct drm_connector *connector,
--				struct edid *edid);
-+				 struct edid *edid);
- int intel_ddc_get_modes(struct drm_connector *c, struct i2c_adapter *adapter);
--extern void intel_attach_force_audio_property(struct drm_connector *connector);
--extern void
--intel_attach_broadcast_rgb_property(struct drm_connector *connector);
-+void intel_attach_force_audio_property(struct drm_connector *connector);
-+void intel_attach_broadcast_rgb_property(struct drm_connector *connector);
- 
- 
- /* intel_overlay.c */
--extern void intel_setup_overlay(struct drm_device *dev);
--extern void intel_cleanup_overlay(struct drm_device *dev);
--extern int intel_overlay_switch_off(struct intel_overlay *overlay);
--extern int intel_overlay_put_image(struct drm_device *dev, void *data,
--				   struct drm_file *file_priv);
--extern int intel_overlay_attrs(struct drm_device *dev, void *data,
--			       struct drm_file *file_priv);
-+void intel_setup_overlay(struct drm_device *dev);
-+void intel_cleanup_overlay(struct drm_device *dev);
-+int intel_overlay_switch_off(struct intel_overlay *overlay);
-+int intel_overlay_put_image(struct drm_device *dev, void *data,
-+			    struct drm_file *file_priv);
-+int intel_overlay_attrs(struct drm_device *dev, void *data,
-+			struct drm_file *file_priv);
- 
- 
- /* intel_panel.c */
--extern int intel_panel_init(struct intel_panel *panel,
--			    struct drm_display_mode *fixed_mode);
--extern void intel_panel_fini(struct intel_panel *panel);
--extern void intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode,
--				   struct drm_display_mode *adjusted_mode);
--extern void intel_pch_panel_fitting(struct intel_crtc *crtc,
--				    struct intel_crtc_config *pipe_config,
--				    int fitting_mode);
--extern void intel_gmch_panel_fitting(struct intel_crtc *crtc,
--				     struct intel_crtc_config *pipe_config,
--				     int fitting_mode);
--extern void intel_panel_set_backlight(struct drm_device *dev,
--				      u32 level, u32 max);
--extern int intel_panel_setup_backlight(struct drm_connector *connector);
--extern void intel_panel_enable_backlight(struct drm_device *dev,
--					 enum pipe pipe);
--extern void intel_panel_disable_backlight(struct drm_device *dev);
--extern void intel_panel_destroy_backlight(struct drm_device *dev);
--extern enum drm_connector_status intel_panel_detect(struct drm_device *dev);
-+int intel_panel_init(struct intel_panel *panel,
-+		     struct drm_display_mode *fixed_mode);
-+void intel_panel_fini(struct intel_panel *panel);
-+void intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode,
-+			    struct drm_display_mode *adjusted_mode);
-+void intel_pch_panel_fitting(struct intel_crtc *crtc,
-+			     struct intel_crtc_config *pipe_config,
-+			     int fitting_mode);
-+void intel_gmch_panel_fitting(struct intel_crtc *crtc,
-+			      struct intel_crtc_config *pipe_config,
-+			      int fitting_mode);
-+void intel_panel_set_backlight(struct drm_device *dev, u32 level, u32 max);
-+int intel_panel_setup_backlight(struct drm_connector *connector);
-+void intel_panel_enable_backlight(struct drm_device *dev, enum pipe pipe);
-+void intel_panel_disable_backlight(struct drm_device *dev);
-+void intel_panel_destroy_backlight(struct drm_device *dev);
-+enum drm_connector_status intel_panel_detect(struct drm_device *dev);
- 
- 
- /* intel_pm.c */
--extern void intel_init_clock_gating(struct drm_device *dev);
--extern void intel_suspend_hw(struct drm_device *dev);
--extern void intel_update_watermarks(struct drm_crtc *crtc);
--extern void intel_update_sprite_watermarks(struct drm_plane *plane,
--					   struct drm_crtc *crtc,
--					   uint32_t sprite_width, int pixel_size,
--					   bool enabled, bool scaled);
--extern void intel_init_pm(struct drm_device *dev);
--extern bool intel_fbc_enabled(struct drm_device *dev);
--extern void intel_update_fbc(struct drm_device *dev);
--extern void intel_gpu_ips_init(struct drm_i915_private *dev_priv);
--extern void intel_gpu_ips_teardown(void);
--extern int i915_init_power_well(struct drm_device *dev);
--extern void i915_remove_power_well(struct drm_device *dev);
--extern bool intel_display_power_enabled(struct drm_device *dev,
--					enum intel_display_power_domain domain);
--extern void intel_display_power_get(struct drm_device *dev,
--				    enum intel_display_power_domain domain);
--extern void intel_display_power_put(struct drm_device *dev,
--				    enum intel_display_power_domain domain);
--extern void intel_init_power_well(struct drm_device *dev);
--extern void intel_set_power_well(struct drm_device *dev, bool enable);
--extern void intel_resume_power_well(struct drm_device *dev);
--extern void intel_enable_gt_powersave(struct drm_device *dev);
--extern void intel_disable_gt_powersave(struct drm_device *dev);
--extern void ironlake_teardown_rc6(struct drm_device *dev);
-+void intel_init_clock_gating(struct drm_device *dev);
-+void intel_suspend_hw(struct drm_device *dev);
-+void intel_update_watermarks(struct drm_crtc *crtc);
-+void intel_update_sprite_watermarks(struct drm_plane *plane,
-+				    struct drm_crtc *crtc,
-+				    uint32_t sprite_width, int pixel_size,
-+				    bool enabled, bool scaled);
-+void intel_init_pm(struct drm_device *dev);
-+bool intel_fbc_enabled(struct drm_device *dev);
-+void intel_update_fbc(struct drm_device *dev);
-+void intel_gpu_ips_init(struct drm_i915_private *dev_priv);
-+void intel_gpu_ips_teardown(void);
-+int i915_init_power_well(struct drm_device *dev);
-+void i915_remove_power_well(struct drm_device *dev);
-+bool intel_display_power_enabled(struct drm_device *dev,
-+				 enum intel_display_power_domain domain);
-+void intel_display_power_get(struct drm_device *dev,
-+			     enum intel_display_power_domain domain);
-+void intel_display_power_put(struct drm_device *dev,
-+			     enum intel_display_power_domain domain);
-+void intel_init_power_well(struct drm_device *dev);
-+void intel_set_power_well(struct drm_device *dev, bool enable);
-+void intel_resume_power_well(struct drm_device *dev);
-+void intel_enable_gt_powersave(struct drm_device *dev);
-+void intel_disable_gt_powersave(struct drm_device *dev);
-+void ironlake_teardown_rc6(struct drm_device *dev);
- void gen6_update_ring_freq(struct drm_device *dev);
--extern void intel_aux_display_runtime_get(struct drm_i915_private *dev_priv);
--extern void intel_aux_display_runtime_put(struct drm_i915_private *dev_priv);
-+void intel_aux_display_runtime_get(struct drm_i915_private *dev_priv);
-+void intel_aux_display_runtime_put(struct drm_i915_private *dev_priv);
- 
- 
- /* intel_sdvo.c */
--extern bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg,
--			    bool is_sdvob);
-+bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob);
- 
- 
- /* intel_sprite.c */
--extern int intel_plane_init(struct drm_device *dev, enum pipe pipe, int plane);
--extern void intel_flush_display_plane(struct drm_i915_private *dev_priv,
--				      enum plane plane);
--extern void intel_plane_restore(struct drm_plane *plane);
--extern void intel_plane_disable(struct drm_plane *plane);
--extern int intel_sprite_set_colorkey(struct drm_device *dev, void *data,
--				     struct drm_file *file_priv);
--extern int intel_sprite_get_colorkey(struct drm_device *dev, void *data,
--				     struct drm_file *file_priv);
-+int intel_plane_init(struct drm_device *dev, enum pipe pipe, int plane);
-+void intel_flush_display_plane(struct drm_i915_private *dev_priv,
-+			       enum plane plane);
-+void intel_plane_restore(struct drm_plane *plane);
-+void intel_plane_disable(struct drm_plane *plane);
-+int intel_sprite_set_colorkey(struct drm_device *dev, void *data,
-+			      struct drm_file *file_priv);
-+int intel_sprite_get_colorkey(struct drm_device *dev, void *data,
-+			      struct drm_file *file_priv);
- 
- 
- /* intel_tv.c */
--extern void intel_tv_init(struct drm_device *dev);
-+void intel_tv_init(struct drm_device *dev);
- 
- #endif /* __INTEL_DRV_H__ */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0932-drm-i915-trace-vm-eviction-instead-of-everything.patch b/patches.baytrail/0932-drm-i915-trace-vm-eviction-instead-of-everything.patch
deleted file mode 100644
index e379b8e78ac21..0000000000000
--- a/patches.baytrail/0932-drm-i915-trace-vm-eviction-instead-of-everything.patch
+++ /dev/null
@@ -1,63 +0,0 @@
-From a82ec52ffab0687959fca5cf36fa275cdbdc8609 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <benjamin.widawsky@intel.com>
-Date: Tue, 24 Sep 2013 09:57:56 -0700
-Subject: drm/i915: trace vm eviction instead of everything
-
-Tracing vm eviction is really the event we care about. For the cases we
-evict everything, we still will get the trace.
-
-v2: Add the drm device to the trace since we might not be the only
-device in the system. (Chris)
-
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit bcccff847d1fdb53c2fae999a7f03facfa399bab)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem_evict.c |  2 ++
- drivers/gpu/drm/i915/i915_trace.h     | 15 +++++++++++++++
- 2 files changed, 17 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem_evict.c b/drivers/gpu/drm/i915/i915_gem_evict.c
-index 3a3981eb3012..b7376533633d 100644
---- a/drivers/gpu/drm/i915/i915_gem_evict.c
-+++ b/drivers/gpu/drm/i915/i915_gem_evict.c
-@@ -175,6 +175,8 @@ int i915_gem_evict_vm(struct i915_address_space *vm, bool do_idle)
- 	struct i915_vma *vma, *next;
- 	int ret;
- 
-+	trace_i915_gem_evict_vm(vm);
-+
- 	if (do_idle) {
- 		ret = i915_gpu_idle(vm->dev);
- 		if (ret)
-diff --git a/drivers/gpu/drm/i915/i915_trace.h b/drivers/gpu/drm/i915/i915_trace.h
-index e2c5ee6f6194..403309bf0452 100644
---- a/drivers/gpu/drm/i915/i915_trace.h
-+++ b/drivers/gpu/drm/i915/i915_trace.h
-@@ -233,6 +233,21 @@ TRACE_EVENT(i915_gem_evict_everything,
- 	    TP_printk("dev=%d", __entry->dev)
- );
- 
-+TRACE_EVENT(i915_gem_evict_vm,
-+	    TP_PROTO(struct i915_address_space *vm),
-+	    TP_ARGS(vm),
-+
-+	    TP_STRUCT__entry(
-+			     __field(struct i915_address_space *, vm)
-+			    ),
-+
-+	    TP_fast_assign(
-+			   __entry->vm = vm;
-+			  ),
-+
-+	    TP_printk("dev=%d, vm=%p", __entry->vm->dev->primary->index, __entry->vm)
-+);
-+
- TRACE_EVENT(i915_gem_ring_dispatch,
- 	    TP_PROTO(struct intel_ring_buffer *ring, u32 seqno, u32 flags),
- 	    TP_ARGS(ring, seqno, flags),
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0933-drm-i915-Provide-a-cheap-ggtt-vma-lookup.patch b/patches.baytrail/0933-drm-i915-Provide-a-cheap-ggtt-vma-lookup.patch
deleted file mode 100644
index 3598c0fef8d53..0000000000000
--- a/patches.baytrail/0933-drm-i915-Provide-a-cheap-ggtt-vma-lookup.patch
+++ /dev/null
@@ -1,86 +0,0 @@
-From 33e5df719f09299b26b5fda38445bc2463231c04 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <benjamin.widawsky@intel.com>
-Date: Tue, 24 Sep 2013 09:57:57 -0700
-Subject: drm/i915: Provide a cheap ggtt vma lookup
-
-"We do fairly often lookup the ggtt vma for an obj." - Chris Wilson. As
-such, provide a function to offer slightly cheaper access to the vma.
-Not performance tested. By my quick estimation it saves at least 3
-pointer dereferences from the existing mechanism.
-
-This patch mostly matches code from Chris in
-<20130911221430.GB7825@nuc-i3427.alporthouse.com>
-
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 5c2abbeab798154166d42fce4f71790caa6dd9bc)
-Signed-off-by: James Ausmus <james.ausmus@intel.com>
-
-Conflicts:
-	drivers/gpu/drm/i915/i915_gem.c
-	(context changes due to not bringing in the shrinker API
-	changes)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h |  4 +++-
- drivers/gpu/drm/i915/i915_gem.c | 17 +++++++++++++++--
- 2 files changed, 18 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 662c0ff0b049..a3d43b25e1d9 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -2030,6 +2030,9 @@ struct i915_vma *i915_gem_obj_to_vma(struct drm_i915_gem_object *obj,
- struct i915_vma *
- i915_gem_obj_lookup_or_create_vma(struct drm_i915_gem_object *obj,
- 				  struct i915_address_space *vm);
-+
-+struct i915_vma *i915_gem_obj_to_ggtt(struct drm_i915_gem_object *obj);
-+
- /* Some GGTT VM helpers */
- #define obj_to_ggtt(obj) \
- 	(&((struct drm_i915_private *)(obj)->base.dev->dev_private)->gtt.base)
-@@ -2066,7 +2069,6 @@ i915_gem_obj_ggtt_pin(struct drm_i915_gem_object *obj,
- 	return i915_gem_object_pin(obj, obj_to_ggtt(obj), alignment,
- 				   map_and_fenceable, nonblocking);
- }
--#undef obj_to_ggtt
- 
- /* i915_gem_context.c */
- void i915_gem_context_init(struct drm_device *dev);
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index 845072412ea7..6b134f08c93e 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -3403,8 +3403,7 @@ i915_gem_object_set_to_gtt_domain(struct drm_i915_gem_object *obj, bool write)
- 
- 	/* And bump the LRU for this access */
- 	if (i915_gem_object_is_inactive(obj)) {
--		struct i915_vma *vma = i915_gem_obj_to_vma(obj,
--							   &dev_priv->gtt.base);
-+		struct i915_vma *vma = i915_gem_obj_to_ggtt(obj);
- 		if (vma)
- 			list_move_tail(&vma->mm_list,
- 				       &dev_priv->gtt.base.inactive_list);
-@@ -4940,3 +4939,17 @@ unsigned long i915_gem_obj_size(struct drm_i915_gem_object *o,
- 
- 	return 0;
- }
-+
-+struct i915_vma *i915_gem_obj_to_ggtt(struct drm_i915_gem_object *obj)
-+{
-+	struct i915_vma *vma;
-+
-+	if (WARN_ON(list_empty(&obj->vma_list)))
-+		return NULL;
-+
-+	vma = list_first_entry(&obj->vma_list, typeof(*vma), vma_link);
-+	if (WARN_ON(vma->vm != obj_to_ggtt(obj)))
-+		return NULL;
-+
-+	return vma;
-+}
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0934-drm-i915-Convert-active-API-to-VMA.patch b/patches.baytrail/0934-drm-i915-Convert-active-API-to-VMA.patch
deleted file mode 100644
index 52d05db5aef83..0000000000000
--- a/patches.baytrail/0934-drm-i915-Convert-active-API-to-VMA.patch
+++ /dev/null
@@ -1,94 +0,0 @@
-From 7066d4b62134a9877bce30591e31ab0978b43f94 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <ben@bwidawsk.net>
-Date: Tue, 24 Sep 2013 09:57:58 -0700
-Subject: drm/i915: Convert active API to VMA
-
-Even though we track object activity and not VMA, because we have the
-active_list be based on the VM, it makes the most sense to use VMAs in
-the APIs.
-
-NOTE: Daniel intends to eventually rip out active/inactive LRUs, but for
-now, leave them be.
-
-v2: Remove leftover hunk from the previous patch which didn't keep
-i915_gem_object_move_to_active. That patch had to rely on the ring to
-get the dev instead of the obj. (Chris)
-
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit e2d05a8b1e4a7f6feae89a59543b1edbece1bda3)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h            |    5 ++---
- drivers/gpu/drm/i915/i915_gem.c            |    9 ++++++++-
- drivers/gpu/drm/i915/i915_gem_context.c    |    5 +----
- drivers/gpu/drm/i915/i915_gem_execbuffer.c |    3 +--
- 4 files changed, 12 insertions(+), 10 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1905,9 +1905,8 @@ static inline void i915_gem_object_unpin
- int __must_check i915_mutex_lock_interruptible(struct drm_device *dev);
- int i915_gem_object_sync(struct drm_i915_gem_object *obj,
- 			 struct intel_ring_buffer *to);
--void i915_gem_object_move_to_active(struct drm_i915_gem_object *obj,
--				    struct intel_ring_buffer *ring);
--
-+void i915_vma_move_to_active(struct i915_vma *vma,
-+			     struct intel_ring_buffer *ring);
- int i915_gem_dumb_create(struct drm_file *file_priv,
- 			 struct drm_device *dev,
- 			 struct drm_mode_create_dumb *args);
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -1910,7 +1910,7 @@ i915_gem_object_get_pages(struct drm_i91
- 	return 0;
- }
- 
--void
-+static void
- i915_gem_object_move_to_active(struct drm_i915_gem_object *obj,
- 			       struct intel_ring_buffer *ring)
- {
-@@ -1949,6 +1949,13 @@ i915_gem_object_move_to_active(struct dr
- 	}
- }
- 
-+void i915_vma_move_to_active(struct i915_vma *vma,
-+			     struct intel_ring_buffer *ring)
-+{
-+	list_move_tail(&vma->mm_list, &vma->vm->active_list);
-+	return i915_gem_object_move_to_active(vma->obj, ring);
-+}
-+
- static void
- i915_gem_object_move_to_inactive(struct drm_i915_gem_object *obj)
- {
---- a/drivers/gpu/drm/i915/i915_gem_context.c
-+++ b/drivers/gpu/drm/i915/i915_gem_context.c
-@@ -451,11 +451,8 @@ static int do_switch(struct i915_hw_cont
- 	 * MI_SET_CONTEXT instead of when the next seqno has completed.
- 	 */
- 	if (from != NULL) {
--		struct drm_i915_private *dev_priv = from->obj->base.dev->dev_private;
--		struct i915_address_space *ggtt = &dev_priv->gtt.base;
- 		from->obj->base.read_domains = I915_GEM_DOMAIN_INSTRUCTION;
--		list_move_tail(&i915_gem_obj_to_vma(from->obj, ggtt)->mm_list, &ggtt->active_list);
--		i915_gem_object_move_to_active(from->obj, ring);
-+		i915_vma_move_to_active(i915_gem_obj_to_ggtt(from->obj), ring);
- 		/* As long as MI_SET_CONTEXT is serializing, ie. it flushes the
- 		 * whole damn pipeline, we don't need to explicitly mark the
- 		 * object dirty. The only exception is that the context must be
---- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
-@@ -872,8 +872,7 @@ i915_gem_execbuffer_move_to_active(struc
- 		obj->base.read_domains = obj->base.pending_read_domains;
- 		obj->fenced_gpu_access = obj->pending_fenced_gpu_access;
- 
--		list_move_tail(&vma->mm_list, &vma->vm->active_list);
--		i915_gem_object_move_to_active(obj, ring);
-+		i915_vma_move_to_active(vma, ring);
- 		if (obj->base.write_domain) {
- 			obj->dirty = 1;
- 			obj->last_write_seqno = intel_ring_get_seqno(ring);
diff --git a/patches.baytrail/0935-drm-i915-Move-the-conditional-seqno-query-into-the-t.patch b/patches.baytrail/0935-drm-i915-Move-the-conditional-seqno-query-into-the-t.patch
deleted file mode 100644
index 209b84e844d5a..0000000000000
--- a/patches.baytrail/0935-drm-i915-Move-the-conditional-seqno-query-into-the-t.patch
+++ /dev/null
@@ -1,71 +0,0 @@
-From 0a422bbee7f0b1a86bdcbe3cc569f104bd0a8258 Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Mon, 23 Sep 2013 17:33:19 -0300
-Subject: drm/i915: Move the conditional seqno query into the tracepoint
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-We only wish to know the value of seqno when emitting the tracepoint, so
-move the query from a parameter to the macro to inside the conditional
-macro body so that the query is only evaluated when required.
-
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 814e9b57c0cb56ef1f56c3099f130a3e5373564e)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c   |  2 +-
- drivers/gpu/drm/i915/i915_trace.h | 21 ++++++++++++++++++---
- 2 files changed, 19 insertions(+), 4 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index b356dc15adda..84b7efc6ee91 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -807,7 +807,7 @@ static void notify_ring(struct drm_device *dev,
- 	if (ring->obj == NULL)
- 		return;
- 
--	trace_i915_gem_request_complete(ring, ring->get_seqno(ring, false));
-+	trace_i915_gem_request_complete(ring);
- 
- 	wake_up_all(&ring->irq_queue);
- 	i915_queue_hangcheck(dev);
-diff --git a/drivers/gpu/drm/i915/i915_trace.h b/drivers/gpu/drm/i915/i915_trace.h
-index 403309bf0452..daa6fdf4d8ba 100644
---- a/drivers/gpu/drm/i915/i915_trace.h
-+++ b/drivers/gpu/drm/i915/i915_trace.h
-@@ -319,9 +319,24 @@ DEFINE_EVENT(i915_gem_request, i915_gem_request_add,
- 	    TP_ARGS(ring, seqno)
- );
- 
--DEFINE_EVENT(i915_gem_request, i915_gem_request_complete,
--	    TP_PROTO(struct intel_ring_buffer *ring, u32 seqno),
--	    TP_ARGS(ring, seqno)
-+TRACE_EVENT(i915_gem_request_complete,
-+	    TP_PROTO(struct intel_ring_buffer *ring),
-+	    TP_ARGS(ring),
-+
-+	    TP_STRUCT__entry(
-+			     __field(u32, dev)
-+			     __field(u32, ring)
-+			     __field(u32, seqno)
-+			     ),
-+
-+	    TP_fast_assign(
-+			   __entry->dev = ring->dev->primary->index;
-+			   __entry->ring = ring->id;
-+			   __entry->seqno = ring->get_seqno(ring, false);
-+			   ),
-+
-+	    TP_printk("dev=%u, ring=%u, seqno=%u",
-+		      __entry->dev, __entry->ring, __entry->seqno)
- );
- 
- DEFINE_EVENT(i915_gem_request, i915_gem_request_retire,
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0936-drm-i915-Fix-VLV-eDP-timing-v2.patch b/patches.baytrail/0936-drm-i915-Fix-VLV-eDP-timing-v2.patch
deleted file mode 100644
index 279ae95836f45..0000000000000
--- a/patches.baytrail/0936-drm-i915-Fix-VLV-eDP-timing-v2.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From 19c9e2dfbd8013a5270a2bd617b7d2ad8204026a Mon Sep 17 00:00:00 2001
-From: Chon Ming Lee <chon.ming.lee@intel.com>
-Date: Wed, 25 Sep 2013 15:47:51 +0800
-Subject: drm/i915: Fix VLV eDP timing v2
-
-Fix the typo in previous commit for DP 1.62 divisor.
-drm/i915: Move Valleyview DP DPLL divisor calc to intel_dp_set_clock v2
-
-v2: sigh, the m1 div is 3.
-
-Reported-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Signed-off-by: Chon Ming Lee <chon.ming.lee@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 58f6e632d5d24f1f510bafccc4c963a06f6a55a8)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_dp.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
-index cf4d2197f9e6..0c98af87eb2e 100644
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -59,7 +59,7 @@ static const struct dp_link_dpll pch_dpll[] = {
- 
- static const struct dp_link_dpll vlv_dpll[] = {
- 	{ DP_LINK_BW_1_62,
--		{ .p1 = 3, .p2 = 2, .n = 5, .m1 = 5, .m2 = 3 } },
-+		{ .p1 = 3, .p2 = 2, .n = 5, .m1 = 3, .m2 = 81 } },
- 	{ DP_LINK_BW_2_7,
- 		{ .p1 = 2, .p2 = 2, .n = 1, .m1 = 2, .m2 = 27 } }
- };
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0937-drm-i915-Show-WT-caching-in-debugfs.patch b/patches.baytrail/0937-drm-i915-Show-WT-caching-in-debugfs.patch
deleted file mode 100644
index 460c69b5309a9..0000000000000
--- a/patches.baytrail/0937-drm-i915-Show-WT-caching-in-debugfs.patch
+++ /dev/null
@@ -1,45 +0,0 @@
-From 4fba07883417697ba339a4968d6b200068e0de2a Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Wed, 25 Sep 2013 10:23:19 +0100
-Subject: drm/i915: Show WT caching in debugfs
-
-Add the missing cache-level to the describe_obj() function for debug and
-error reporting.
-
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit f56383cb9fc8d7165bd7d2136b4c4af98c41177c)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h       | 2 +-
- drivers/gpu/drm/i915/i915_gpu_error.c | 1 +
- 2 files changed, 2 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 7ccb0cd35474..08e96a8c01aa 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -324,7 +324,7 @@ struct drm_i915_error_state {
- 		u32 dirty:1;
- 		u32 purgeable:1;
- 		s32 ring:4;
--		u32 cache_level:2;
-+		u32 cache_level:3;
- 	} **active_bo, **pinned_bo;
- 	u32 *active_bo_count, *pinned_bo_count;
- 	struct intel_overlay_error_state *overlay;
-diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
-index c3ff6bd220dc..0a49b651e510 100644
---- a/drivers/gpu/drm/i915/i915_gpu_error.c
-+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
-@@ -1012,6 +1012,7 @@ const char *i915_cache_level_str(int type)
- 	case I915_CACHE_NONE: return " uncached";
- 	case I915_CACHE_LLC: return " snooped or LLC";
- 	case I915_CACHE_L3_LLC: return " L3+LLC";
-+	case I915_CACHE_WT: return " WT";
- 	default: return "";
- 	}
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0938-drm-i915-Add-a-tracepoint-for-using-a-semaphore.patch b/patches.baytrail/0938-drm-i915-Add-a-tracepoint-for-using-a-semaphore.patch
deleted file mode 100644
index aa6d4403678f9..0000000000000
--- a/patches.baytrail/0938-drm-i915-Add-a-tracepoint-for-using-a-semaphore.patch
+++ /dev/null
@@ -1,78 +0,0 @@
-From 66de565bbbc45052fb0f1ebc2415f6d85eea9188 Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Wed, 25 Sep 2013 11:43:28 +0100
-Subject: drm/i915: Add a tracepoint for using a semaphore
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-So that we can find the callers who introduce a ring stall. A single
-ring stall is not too unwelcome, the right issue becomes when they start
-to interlock and prevent any concurrent work. That, however, is a little
-tricker to detect with a mere tracepoint!
-
-v2: Rebrand it as a ring event, rather than an object event.
-v3: Include the seqno in the tracepoint for posterity or something.
-
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit b52b89da097896ac265d1f875aeb0bfd92a9dd38)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem.c   |  1 +
- drivers/gpu/drm/i915/i915_trace.h | 26 ++++++++++++++++++++++++++
- 2 files changed, 27 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index f6c8b0ed056c..5ff2338b811b 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -2618,6 +2618,7 @@ i915_gem_object_sync(struct drm_i915_gem_object *obj,
- 	if (ret)
- 		return ret;
- 
-+	trace_i915_gem_ring_sync_to(from, to, seqno);
- 	ret = to->sync_to(to, from, seqno);
- 	if (!ret)
- 		/* We use last_read_seqno because sync_to()
-diff --git a/drivers/gpu/drm/i915/i915_trace.h b/drivers/gpu/drm/i915/i915_trace.h
-index daa6fdf4d8ba..6e580c98dede 100644
---- a/drivers/gpu/drm/i915/i915_trace.h
-+++ b/drivers/gpu/drm/i915/i915_trace.h
-@@ -248,6 +248,32 @@ TRACE_EVENT(i915_gem_evict_vm,
- 	    TP_printk("dev=%d, vm=%p", __entry->vm->dev->primary->index, __entry->vm)
- );
- 
-+TRACE_EVENT(i915_gem_ring_sync_to,
-+	    TP_PROTO(struct intel_ring_buffer *from,
-+		     struct intel_ring_buffer *to,
-+		     u32 seqno),
-+	    TP_ARGS(from, to, seqno),
-+
-+	    TP_STRUCT__entry(
-+			     __field(u32, dev)
-+			     __field(u32, sync_from)
-+			     __field(u32, sync_to)
-+			     __field(u32, seqno)
-+			     ),
-+
-+	    TP_fast_assign(
-+			   __entry->dev = from->dev->primary->index;
-+			   __entry->sync_from = from->id;
-+			   __entry->sync_to = to->id;
-+			   __entry->seqno = seqno;
-+			   ),
-+
-+	    TP_printk("dev=%u, sync-from=%u, sync-to=%u, seqno=%u",
-+		      __entry->dev,
-+		      __entry->sync_from, __entry->sync_to,
-+		      __entry->seqno)
-+);
-+
- TRACE_EVENT(i915_gem_ring_dispatch,
- 	    TP_PROTO(struct intel_ring_buffer *ring, u32 seqno, u32 flags),
- 	    TP_ARGS(ring, seqno, flags),
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0939-drm-i915-vlv-add-VLV-specific-clock_get-function-v3.patch b/patches.baytrail/0939-drm-i915-vlv-add-VLV-specific-clock_get-function-v3.patch
deleted file mode 100644
index 248abf7dc897f..0000000000000
--- a/patches.baytrail/0939-drm-i915-vlv-add-VLV-specific-clock_get-function-v3.patch
+++ /dev/null
@@ -1,79 +0,0 @@
-From 3b10296b3cff9088e02445846a795d6cdc1c4640 Mon Sep 17 00:00:00 2001
-From: Jesse Barnes <jbarnes@virtuousgeek.org>
-Date: Fri, 20 Sep 2013 11:29:32 -0700
-Subject: drm/i915/vlv: add VLV specific clock_get function v3
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Calculation is a little different than other platforms.
-
-v2: update to use port_clock instead
-    rebase on top of Ville's changes
-v3: update to new port_clock semantics - don't divide by
-    pixel_multiplier (Ville)
-
-References: https://bugs.freedesktop.org/show_bug.cgi?id=67345
-Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit acbec814a27f233b5ddb88a1bcaa2ac20daf64e0)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 33 ++++++++++++++++++++++++++++++++-
- 1 file changed, 32 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index b7059cebde48..32f8e8b81e67 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -5072,6 +5072,34 @@ static void i9xx_get_pfit_config(struct intel_crtc *crtc,
- 			I915_READ(LVDS) & LVDS_BORDER_ENABLE;
- }
- 
-+static void vlv_crtc_clock_get(struct intel_crtc *crtc,
-+			       struct intel_crtc_config *pipe_config)
-+{
-+	struct drm_device *dev = crtc->base.dev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	int pipe = pipe_config->cpu_transcoder;
-+	intel_clock_t clock;
-+	u32 mdiv;
-+	int refclk = 100000, fastclk, update_rate;
-+
-+	mutex_lock(&dev_priv->dpio_lock);
-+	mdiv = vlv_dpio_read(dev_priv, pipe, DPIO_DIV(pipe));
-+	mutex_unlock(&dev_priv->dpio_lock);
-+
-+	clock.m1 = (mdiv >> DPIO_M1DIV_SHIFT) & 7;
-+	clock.m2 = mdiv & DPIO_M2DIV_MASK;
-+	clock.n = (mdiv >> DPIO_N_SHIFT) & 0xf;
-+	clock.p1 = (mdiv >> DPIO_P1_SHIFT) & 7;
-+	clock.p2 = (mdiv >> DPIO_P2_SHIFT) & 0x1f;
-+
-+	update_rate = refclk / clock.n;
-+	clock.vco = update_rate * clock.m1 * clock.m2;
-+	fastclk = clock.vco / clock.p1 / clock.p2;
-+	clock.dot = (2 * fastclk);
-+
-+	pipe_config->port_clock = clock.dot / 10;
-+}
-+
- static bool i9xx_get_pipe_config(struct intel_crtc *crtc,
- 				 struct intel_crtc_config *pipe_config)
- {
-@@ -5137,7 +5165,10 @@ static bool i9xx_get_pipe_config(struct intel_crtc *crtc,
- 						     DPLL_PORTB_READY_MASK);
- 	}
- 
--	i9xx_crtc_clock_get(crtc, pipe_config);
-+	if (IS_VALLEYVIEW(dev))
-+		vlv_crtc_clock_get(crtc, pipe_config);
-+	else
-+		i9xx_crtc_clock_get(crtc, pipe_config);
- 
- 	return true;
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0940-drm-i915-vlv-fix-up-broken-precision-in-vlv_crtc_clo.patch b/patches.baytrail/0940-drm-i915-vlv-fix-up-broken-precision-in-vlv_crtc_clo.patch
deleted file mode 100644
index 4fb19367855ae..0000000000000
--- a/patches.baytrail/0940-drm-i915-vlv-fix-up-broken-precision-in-vlv_crtc_clo.patch
+++ /dev/null
@@ -1,47 +0,0 @@
-From 883abb10f493df4a0f87562511b67ac835b41b09 Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Wed, 25 Sep 2013 14:24:01 -0700
-Subject: drm/i915/vlv: fix up broken precision in vlv_crtc_clock_get
-
-With some divider values we end up with the wrong result.  So remove the
-intermediates (like Ville suggested in the first place) to get the right
-answer.
-
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 662c6ecbcdca1fe8a5402f6c83d98d242917a043)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 8 +++-----
- 1 file changed, 3 insertions(+), 5 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 32f8e8b81e67..2fc00349479b 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -5080,7 +5080,7 @@ static void vlv_crtc_clock_get(struct intel_crtc *crtc,
- 	int pipe = pipe_config->cpu_transcoder;
- 	intel_clock_t clock;
- 	u32 mdiv;
--	int refclk = 100000, fastclk, update_rate;
-+	int refclk = 100000;
- 
- 	mutex_lock(&dev_priv->dpio_lock);
- 	mdiv = vlv_dpio_read(dev_priv, pipe, DPIO_DIV(pipe));
-@@ -5092,10 +5092,8 @@ static void vlv_crtc_clock_get(struct intel_crtc *crtc,
- 	clock.p1 = (mdiv >> DPIO_P1_SHIFT) & 7;
- 	clock.p2 = (mdiv >> DPIO_P2_SHIFT) & 0x1f;
- 
--	update_rate = refclk / clock.n;
--	clock.vco = update_rate * clock.m1 * clock.m2;
--	fastclk = clock.vco / clock.p1 / clock.p2;
--	clock.dot = (2 * fastclk);
-+	clock.vco = refclk * clock.m1 * clock.m2 / clock.n;
-+	clock.dot = 2 * clock.vco / (clock.p1 * clock.p2);
- 
- 	pipe_config->port_clock = clock.dot / 10;
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0941-drm-Remove-clock_index-from-struct-drm_display_mode.patch b/patches.baytrail/0941-drm-Remove-clock_index-from-struct-drm_display_mode.patch
deleted file mode 100644
index db46110dbe527..0000000000000
--- a/patches.baytrail/0941-drm-Remove-clock_index-from-struct-drm_display_mode.patch
+++ /dev/null
@@ -1,51 +0,0 @@
-From 541fdfad62422f97c2dd1c1e755a9bb9071ca45f Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Wed, 25 Sep 2013 16:45:32 +0100
-Subject: drm: Remove clock_index from struct drm_display_mode
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-This field was only accessed by the nouveau driver, but never set. So
-concluded we can rid of this one.
-
-Acked-by: Ben Skeggs <bskeggs@redhat.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Acked-by: Dave Airlie <airlied@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 99b314a0b37c1f637929db7f20d7e47eb2374c97)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/nouveau/dispnv04/crtc.c | 2 --
- include/drm/drm_crtc.h                  | 1 -
- 2 files changed, 3 deletions(-)
-
-diff --git a/drivers/gpu/drm/nouveau/dispnv04/crtc.c b/drivers/gpu/drm/nouveau/dispnv04/crtc.c
-index 0782bd2f1e04..d8d8a9f1699e 100644
---- a/drivers/gpu/drm/nouveau/dispnv04/crtc.c
-+++ b/drivers/gpu/drm/nouveau/dispnv04/crtc.c
-@@ -325,8 +325,6 @@ nv_crtc_mode_set_vga(struct drm_crtc *crtc, struct drm_display_mode *mode)
- 			regp->MiscOutReg = 0x23;	/* +hsync +vsync */
- 	}
- 
--	regp->MiscOutReg |= (mode->clock_index & 0x03) << 2;
--
- 	/*
- 	 * Time Sequencer
- 	 */
-diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h
-index 1dd883ed93c9..4c4e3925620e 100644
---- a/include/drm/drm_crtc.h
-+++ b/include/drm/drm_crtc.h
-@@ -154,7 +154,6 @@ struct drm_display_mode {
- 	int height_mm;
- 
- 	/* Actual mode we give to hw */
--	int clock_index;
- 	int synth_clock;
- 	int crtc_hdisplay;
- 	int crtc_hblank_start;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0942-drm-Remove-synth_clock-from-struct-drm_display_mode.patch b/patches.baytrail/0942-drm-Remove-synth_clock-from-struct-drm_display_mode.patch
deleted file mode 100644
index 151423dadb851..0000000000000
--- a/patches.baytrail/0942-drm-Remove-synth_clock-from-struct-drm_display_mode.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From 5370db7d9d67f81f445d53c3666d6b45ccb537ec Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Wed, 25 Sep 2013 16:45:33 +0100
-Subject: drm: Remove synth_clock from struct drm_display_mode
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-This field is unused. Garbage collect it.
-
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Acked-by: Dave Airlie <airlied@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 65427b1e94eca5923e0f723d1dd000f47e6d1696)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- include/drm/drm_crtc.h | 1 -
- 1 file changed, 1 deletion(-)
-
-diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h
-index 4c4e3925620e..bfb98d1956ea 100644
---- a/include/drm/drm_crtc.h
-+++ b/include/drm/drm_crtc.h
-@@ -154,7 +154,6 @@ struct drm_display_mode {
- 	int height_mm;
- 
- 	/* Actual mode we give to hw */
--	int synth_clock;
- 	int crtc_hdisplay;
- 	int crtc_hblank_start;
- 	int crtc_hblank_end;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0943-drm-Introduce-a-crtc_clock-for-struct-drm_display_mo.patch b/patches.baytrail/0943-drm-Introduce-a-crtc_clock-for-struct-drm_display_mo.patch
deleted file mode 100644
index e5751069bbe5f..0000000000000
--- a/patches.baytrail/0943-drm-Introduce-a-crtc_clock-for-struct-drm_display_mo.patch
+++ /dev/null
@@ -1,49 +0,0 @@
-From c69a77ab92db8eaaadc8b6e414d39834bc848ea8 Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Wed, 25 Sep 2013 16:45:34 +0100
-Subject: drm: Introduce a crtc_clock for struct drm_display_mode
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Just like the various timings, make it possible to have a clock field
-what we can tweak before giving it to hardware.
-
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Acked-by: Dave Airlie <airlied@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit bde2dcf701db9fa6d010afa8e9254c3d7b0331fb)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_modes.c | 1 +
- include/drm/drm_crtc.h      | 1 +
- 2 files changed, 2 insertions(+)
-
-diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c
-index 1d29b473fe6a..3c708b4aa742 100644
---- a/drivers/gpu/drm/drm_modes.c
-+++ b/drivers/gpu/drm/drm_modes.c
-@@ -738,6 +738,7 @@ void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags)
- 	if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN))
- 		return;
- 
-+	p->crtc_clock = p->clock;
- 	p->crtc_hdisplay = p->hdisplay;
- 	p->crtc_hsync_start = p->hsync_start;
- 	p->crtc_hsync_end = p->hsync_end;
-diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h
-index bfb98d1956ea..0a47e15ccef3 100644
---- a/include/drm/drm_crtc.h
-+++ b/include/drm/drm_crtc.h
-@@ -154,6 +154,7 @@ struct drm_display_mode {
- 	int height_mm;
- 
- 	/* Actual mode we give to hw */
-+	int crtc_clock;		/* in KHz */
- 	int crtc_hdisplay;
- 	int crtc_hblank_start;
- 	int crtc_hblank_end;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0944-drm-i915-Use-crtc_clock-in-intel_dump_crtc_timings.patch b/patches.baytrail/0944-drm-i915-Use-crtc_clock-in-intel_dump_crtc_timings.patch
deleted file mode 100644
index 9dd9e1187fc76..0000000000000
--- a/patches.baytrail/0944-drm-i915-Use-crtc_clock-in-intel_dump_crtc_timings.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 0a95cae5aaed6e26a476c5f55b8daec9abf0cb98 Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Wed, 25 Sep 2013 16:45:36 +0100
-Subject: drm/i915: Use crtc_clock in intel_dump_crtc_timings()
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-We want to dump the parameters given to the hardware, so let's use
-crtc_clock here.
-
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Acked-by: Dave Airlie <airlied@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 1342830c589fca41872b173155bad08b374f7766)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 2fc00349479b..e361cd09a3d2 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -8343,7 +8343,7 @@ static void intel_dump_crtc_timings(const struct drm_display_mode *mode)
- {
- 	DRM_DEBUG_KMS("crtc timings: %d %d %d %d %d %d %d %d %d, "
- 			"type: 0x%x flags: 0x%x\n",
--		mode->clock,
-+		mode->crtc_clock,
- 		mode->crtc_hdisplay, mode->crtc_hsync_start,
- 		mode->crtc_hsync_end, mode->crtc_htotal,
- 		mode->crtc_vdisplay, mode->crtc_vsync_start,
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0945-drm-i915-Use-crtc_clock-with-the-adjusted-mode.patch b/patches.baytrail/0945-drm-i915-Use-crtc_clock-with-the-adjusted-mode.patch
deleted file mode 100644
index 64ca662e43562..0000000000000
--- a/patches.baytrail/0945-drm-i915-Use-crtc_clock-with-the-adjusted-mode.patch
+++ /dev/null
@@ -1,467 +0,0 @@
-From c1310cbe7c8b253fefd1f48d2d5401e5762fd668 Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Wed, 25 Sep 2013 16:45:37 +0100
-Subject: drm/i915: Use crtc_clock with the adjusted mode
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-struct drm_mode_display now has a separate crtc_ version of the clock to
-be used when we're talking about the timings given to the harwadre (was
-far as the mode is concerned).
-
-This commit is really the result of a git grep adjusted_mode.*clock and
-replacing those by adjusted_mode.crtc_clock. No functional change.
-
-v2: Rebased on drm-intel-queued-next
-
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Acked-by: Dave Airlie <airlied@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 241bfc389111ce4c997430e6cd1532a08b16dc6b)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_crt.c     |  2 +-
- drivers/gpu/drm/i915/intel_display.c | 34 +++++++++++++++++-----------------
- drivers/gpu/drm/i915/intel_dp.c      | 11 +++++++----
- drivers/gpu/drm/i915/intel_drv.h     |  2 +-
- drivers/gpu/drm/i915/intel_dvo.c     |  2 +-
- drivers/gpu/drm/i915/intel_hdmi.c    |  6 +++---
- drivers/gpu/drm/i915/intel_lvds.c    |  2 +-
- drivers/gpu/drm/i915/intel_pm.c      | 36 +++++++++++++++++++++++-------------
- drivers/gpu/drm/i915/intel_sdvo.c    |  2 +-
- drivers/gpu/drm/i915/intel_tv.c      |  2 +-
- 10 files changed, 56 insertions(+), 43 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
-index 019c4cea7bb0..0263629332d0 100644
---- a/drivers/gpu/drm/i915/intel_crt.c
-+++ b/drivers/gpu/drm/i915/intel_crt.c
-@@ -117,7 +117,7 @@ static void intel_crt_get_config(struct intel_encoder *encoder,
- 	if (HAS_PCH_SPLIT(dev))
- 		ironlake_check_encoder_dotclock(pipe_config, dotclock);
- 
--	pipe_config->adjusted_mode.clock = dotclock;
-+	pipe_config->adjusted_mode.crtc_clock = dotclock;
- }
- 
- static void hsw_crt_get_config(struct intel_encoder *encoder,
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index e361cd09a3d2..b928db880679 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -739,14 +739,14 @@ bool intel_crtc_active(struct drm_crtc *crtc)
- 	/* Be paranoid as we can arrive here with only partial
- 	 * state retrieved from the hardware during setup.
- 	 *
--	 * We can ditch the adjusted_mode.clock check as soon
-+	 * We can ditch the adjusted_mode.crtc_clock check as soon
- 	 * as Haswell has gained clock readout/fastboot support.
- 	 *
- 	 * We can ditch the crtc->fb check as soon as we can
- 	 * properly reconstruct framebuffers.
- 	 */
- 	return intel_crtc->active && crtc->fb &&
--		intel_crtc->config.adjusted_mode.clock;
-+		intel_crtc->config.adjusted_mode.crtc_clock;
- }
- 
- enum transcoder intel_pipe_to_cpu_transcoder(struct drm_i915_private *dev_priv,
-@@ -2913,7 +2913,7 @@ static void lpt_program_iclkip(struct drm_crtc *crtc)
- {
- 	struct drm_device *dev = crtc->dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
--	int clock = to_intel_crtc(crtc)->config.adjusted_mode.clock;
-+	int clock = to_intel_crtc(crtc)->config.adjusted_mode.crtc_clock;
- 	u32 divsel, phaseinc, auxdiv, phasedir = 0;
- 	u32 temp;
- 
-@@ -2937,8 +2937,8 @@ static void lpt_program_iclkip(struct drm_crtc *crtc)
- 		phaseinc = 0x20;
- 	} else {
- 		/* The iCLK virtual clock root frequency is in MHz,
--		 * but the adjusted_mode->clock in in KHz. To get the divisors,
--		 * it is necessary to divide one by another, so we
-+		 * but the adjusted_mode->crtc_clock in in KHz. To get the
-+		 * divisors, it is necessary to divide one by another, so we
- 		 * convert the virtual clock precision to KHz here for higher
- 		 * precision.
- 		 */
-@@ -4144,7 +4144,7 @@ retry:
- 	 */
- 	link_bw = intel_fdi_link_freq(dev) * MHz(100)/KHz(1)/10;
- 
--	fdi_dotclock = adjusted_mode->clock;
-+	fdi_dotclock = adjusted_mode->crtc_clock;
- 
- 	lane = ironlake_get_lanes_required(fdi_dotclock, link_bw,
- 					   pipe_config->pipe_bpp);
-@@ -4200,12 +4200,12 @@ static int intel_crtc_compute_config(struct intel_crtc *crtc,
- 		 * otherwise pipe A only.
- 		 */
- 		if ((crtc->pipe == PIPE_A || IS_I915G(dev)) &&
--		    adjusted_mode->clock > clock_limit * 9 / 10) {
-+		    adjusted_mode->crtc_clock > clock_limit * 9 / 10) {
- 			clock_limit *= 2;
- 			pipe_config->double_wide = true;
- 		}
- 
--		if (adjusted_mode->clock > clock_limit * 9 / 10)
-+		if (adjusted_mode->crtc_clock > clock_limit * 9 / 10)
- 			return -EINVAL;
- 	}
- 
-@@ -4865,7 +4865,7 @@ static void intel_crtc_mode_from_pipe_config(struct intel_crtc *intel_crtc,
- 
- 	crtc->mode.flags = pipe_config->adjusted_mode.flags;
- 
--	crtc->mode.clock = pipe_config->adjusted_mode.clock;
-+	crtc->mode.clock = pipe_config->adjusted_mode.crtc_clock;
- 	crtc->mode.flags |= pipe_config->adjusted_mode.flags;
- }
- 
-@@ -7473,7 +7473,7 @@ static void i9xx_crtc_clock_get(struct intel_crtc *crtc,
- 
- 	/*
- 	 * This value includes pixel_multiplier. We will use
--	 * port_clock to compute adjusted_mode.clock in the
-+	 * port_clock to compute adjusted_mode.crtc_clock in the
- 	 * encoder's get_config() function.
- 	 */
- 	pipe_config->port_clock = clock.dot;
-@@ -7508,11 +7508,11 @@ static void ironlake_pch_clock_get(struct intel_crtc *crtc,
- 
- 	/*
- 	 * This value does not include pixel_multiplier.
--	 * We will check that port_clock and adjusted_mode.clock
-+	 * We will check that port_clock and adjusted_mode.crtc_clock
- 	 * agree once we know their relationship in the encoder's
- 	 * get_config() function.
- 	 */
--	pipe_config->adjusted_mode.clock =
-+	pipe_config->adjusted_mode.crtc_clock =
- 		intel_dotclock_calculate(intel_fdi_link_freq(dev) * 10000,
- 					 &pipe_config->fdi_m_n);
- }
-@@ -8489,8 +8489,8 @@ encoder_retry:
- 	/* Set default port clock if not overwritten by the encoder. Needs to be
- 	 * done afterwards in case the encoder adjusts the mode. */
- 	if (!pipe_config->port_clock)
--		pipe_config->port_clock = pipe_config->adjusted_mode.clock *
--			pipe_config->pixel_multiplier;
-+		pipe_config->port_clock = pipe_config->adjusted_mode.crtc_clock
-+			* pipe_config->pixel_multiplier;
- 
- 	ret = intel_crtc_compute_config(to_intel_crtc(crtc), pipe_config);
- 	if (ret < 0) {
-@@ -8820,7 +8820,7 @@ intel_pipe_config_compare(struct drm_device *dev,
- 		PIPE_CONF_CHECK_I(pipe_bpp);
- 
- 	if (!IS_HASWELL(dev)) {
--		PIPE_CONF_CHECK_CLOCK_FUZZY(adjusted_mode.clock);
-+		PIPE_CONF_CHECK_CLOCK_FUZZY(adjusted_mode.crtc_clock);
- 		PIPE_CONF_CHECK_CLOCK_FUZZY(port_clock);
- 	}
- 
-@@ -9042,9 +9042,9 @@ void ironlake_check_encoder_dotclock(const struct intel_crtc_config *pipe_config
- 	 * FDI already provided one idea for the dotclock.
- 	 * Yell if the encoder disagrees.
- 	 */
--	WARN(!intel_fuzzy_clock_check(pipe_config->adjusted_mode.clock, dotclock),
-+	WARN(!intel_fuzzy_clock_check(pipe_config->adjusted_mode.crtc_clock, dotclock),
- 	     "FDI dotclock and encoder dotclock mismatch, fdi: %i, encoder: %i\n",
--	     pipe_config->adjusted_mode.clock, dotclock);
-+	     pipe_config->adjusted_mode.crtc_clock, dotclock);
- }
- 
- static int __intel_set_mode(struct drm_crtc *crtc,
-diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
-index 0c98af87eb2e..2f04f0f60fd6 100644
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -811,7 +811,8 @@ intel_dp_compute_config(struct intel_encoder *encoder,
- 
- 	DRM_DEBUG_KMS("DP link computation with max lane count %i "
- 		      "max bw %02x pixel clock %iKHz\n",
--		      max_lane_count, bws[max_clock], adjusted_mode->clock);
-+		      max_lane_count, bws[max_clock],
-+		      adjusted_mode->crtc_clock);
- 
- 	/* Walk through all bpp values. Luckily they're all nicely spaced with 2
- 	 * bpc in between. */
-@@ -823,7 +824,8 @@ intel_dp_compute_config(struct intel_encoder *encoder,
- 	}
- 
- 	for (; bpp >= 6*3; bpp -= 2*3) {
--		mode_rate = intel_dp_link_required(adjusted_mode->clock, bpp);
-+		mode_rate = intel_dp_link_required(adjusted_mode->crtc_clock,
-+						   bpp);
- 
- 		for (clock = 0; clock <= max_clock; clock++) {
- 			for (lane_count = 1; lane_count <= max_lane_count; lane_count <<= 1) {
-@@ -868,7 +870,8 @@ found:
- 		      mode_rate, link_avail);
- 
- 	intel_link_compute_m_n(bpp, lane_count,
--			       adjusted_mode->clock, pipe_config->port_clock,
-+			       adjusted_mode->crtc_clock,
-+			       pipe_config->port_clock,
- 			       &pipe_config->dp_m_n);
- 
- 	intel_dp_set_clock(encoder, pipe_config, intel_dp->link_bw);
-@@ -1483,7 +1486,7 @@ static void intel_dp_get_config(struct intel_encoder *encoder,
- 	if (HAS_PCH_SPLIT(dev_priv->dev) && port != PORT_A)
- 		ironlake_check_encoder_dotclock(pipe_config, dotclock);
- 
--	pipe_config->adjusted_mode.clock = dotclock;
-+	pipe_config->adjusted_mode.crtc_clock = dotclock;
- }
- 
- static bool is_edp_psr(struct intel_dp *intel_dp)
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index 8c3cb3e30527..a17a86ac4e40 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -217,7 +217,7 @@ struct intel_crtc_config {
- 	 * preferred input timings. */
- 	struct drm_display_mode requested_mode;
- 	/* Actual pipe timings ie. what we program into the pipe timing
--	 * registers. adjusted_mode.clock is the pipe pixel clock. */
-+	 * registers. adjusted_mode.crtc_clock is the pipe pixel clock. */
- 	struct drm_display_mode adjusted_mode;
- 
- 	/* Pipe source size (ie. panel fitter input size)
-diff --git a/drivers/gpu/drm/i915/intel_dvo.c b/drivers/gpu/drm/i915/intel_dvo.c
-index 6305433797ac..91287d1d3059 100644
---- a/drivers/gpu/drm/i915/intel_dvo.c
-+++ b/drivers/gpu/drm/i915/intel_dvo.c
-@@ -154,7 +154,7 @@ static void intel_dvo_get_config(struct intel_encoder *encoder,
- 
- 	pipe_config->adjusted_mode.flags |= flags;
- 
--	pipe_config->adjusted_mode.clock = pipe_config->port_clock;
-+	pipe_config->adjusted_mode.crtc_clock = pipe_config->port_clock;
- }
- 
- static void intel_disable_dvo(struct intel_encoder *encoder)
-diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
-index a6310ca444cf..1a57758e5bf8 100644
---- a/drivers/gpu/drm/i915/intel_hdmi.c
-+++ b/drivers/gpu/drm/i915/intel_hdmi.c
-@@ -737,7 +737,7 @@ static void intel_hdmi_get_config(struct intel_encoder *encoder,
- 	if (HAS_PCH_SPLIT(dev_priv->dev))
- 		ironlake_check_encoder_dotclock(pipe_config, dotclock);
- 
--	pipe_config->adjusted_mode.clock = dotclock;
-+	pipe_config->adjusted_mode.crtc_clock = dotclock;
- }
- 
- static void intel_enable_hdmi(struct intel_encoder *encoder)
-@@ -873,7 +873,7 @@ bool intel_hdmi_compute_config(struct intel_encoder *encoder,
- 	struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base);
- 	struct drm_device *dev = encoder->base.dev;
- 	struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
--	int clock_12bpc = pipe_config->adjusted_mode.clock * 3 / 2;
-+	int clock_12bpc = pipe_config->adjusted_mode.crtc_clock * 3 / 2;
- 	int portclock_limit = hdmi_portclock_limit(intel_hdmi);
- 	int desired_bpp;
- 
-@@ -915,7 +915,7 @@ bool intel_hdmi_compute_config(struct intel_encoder *encoder,
- 		pipe_config->pipe_bpp = desired_bpp;
- 	}
- 
--	if (adjusted_mode->clock > portclock_limit) {
-+	if (adjusted_mode->crtc_clock > portclock_limit) {
- 		DRM_DEBUG_KMS("too high HDMI clock, rejecting mode\n");
- 		return false;
- 	}
-diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
-index 33994f2677ff..4986aff3827d 100644
---- a/drivers/gpu/drm/i915/intel_lvds.c
-+++ b/drivers/gpu/drm/i915/intel_lvds.c
-@@ -123,7 +123,7 @@ static void intel_lvds_get_config(struct intel_encoder *encoder,
- 	if (HAS_PCH_SPLIT(dev_priv->dev))
- 		ironlake_check_encoder_dotclock(pipe_config, dotclock);
- 
--	pipe_config->adjusted_mode.clock = dotclock;
-+	pipe_config->adjusted_mode.crtc_clock = dotclock;
- }
- 
- /* The LVDS pin pair needs to be on before the DPLLs are enabled.
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index d27eda661548..2ac1c2fd58bb 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -1100,8 +1100,12 @@ static void pineview_update_wm(struct drm_crtc *unused_crtc)
- 
- 	crtc = single_enabled_crtc(dev);
- 	if (crtc) {
--		int clock = to_intel_crtc(crtc)->config.adjusted_mode.clock;
-+		const struct drm_display_mode *adjusted_mode;
- 		int pixel_size = crtc->fb->bits_per_pixel / 8;
-+		int clock;
-+
-+		adjusted_mode = &to_intel_crtc(crtc)->config.adjusted_mode;
-+		clock = adjusted_mode->crtc_clock;
- 
- 		/* Display SR */
- 		wm = intel_calculate_wm(clock, &pineview_display_wm,
-@@ -1174,7 +1178,7 @@ static bool g4x_compute_wm0(struct drm_device *dev,
- 	}
- 
- 	adjusted_mode = &to_intel_crtc(crtc)->config.adjusted_mode;
--	clock = adjusted_mode->clock;
-+	clock = adjusted_mode->crtc_clock;
- 	htotal = adjusted_mode->htotal;
- 	hdisplay = to_intel_crtc(crtc)->config.pipe_src_w;
- 	pixel_size = crtc->fb->bits_per_pixel / 8;
-@@ -1261,7 +1265,7 @@ static bool g4x_compute_srwm(struct drm_device *dev,
- 
- 	crtc = intel_get_crtc_for_plane(dev, plane);
- 	adjusted_mode = &to_intel_crtc(crtc)->config.adjusted_mode;
--	clock = adjusted_mode->clock;
-+	clock = adjusted_mode->crtc_clock;
- 	htotal = adjusted_mode->htotal;
- 	hdisplay = to_intel_crtc(crtc)->config.pipe_src_w;
- 	pixel_size = crtc->fb->bits_per_pixel / 8;
-@@ -1302,7 +1306,7 @@ static bool vlv_compute_drain_latency(struct drm_device *dev,
- 	if (!intel_crtc_active(crtc))
- 		return false;
- 
--	clock = to_intel_crtc(crtc)->config.adjusted_mode.clock;
-+	clock = to_intel_crtc(crtc)->config.adjusted_mode.crtc_clock;
- 	pixel_size = crtc->fb->bits_per_pixel / 8;	/* BPP */
- 
- 	entries = (clock / 1000) * pixel_size;
-@@ -1492,7 +1496,7 @@ static void i965_update_wm(struct drm_crtc *unused_crtc)
- 		static const int sr_latency_ns = 12000;
- 		const struct drm_display_mode *adjusted_mode =
- 			&to_intel_crtc(crtc)->config.adjusted_mode;
--		int clock = adjusted_mode->clock;
-+		int clock = adjusted_mode->crtc_clock;
- 		int htotal = adjusted_mode->htotal;
- 		int hdisplay = to_intel_crtc(crtc)->config.pipe_src_w;
- 		int pixel_size = crtc->fb->bits_per_pixel / 8;
-@@ -1567,11 +1571,13 @@ static void i9xx_update_wm(struct drm_crtc *unused_crtc)
- 	fifo_size = dev_priv->display.get_fifo_size(dev, 0);
- 	crtc = intel_get_crtc_for_plane(dev, 0);
- 	if (intel_crtc_active(crtc)) {
-+		const struct drm_display_mode *adjusted_mode;
- 		int cpp = crtc->fb->bits_per_pixel / 8;
- 		if (IS_GEN2(dev))
- 			cpp = 4;
- 
--		planea_wm = intel_calculate_wm(to_intel_crtc(crtc)->config.adjusted_mode.clock,
-+		adjusted_mode = &to_intel_crtc(crtc)->config.adjusted_mode;
-+		planea_wm = intel_calculate_wm(adjusted_mode->crtc_clock,
- 					       wm_info, fifo_size, cpp,
- 					       latency_ns);
- 		enabled = crtc;
-@@ -1581,11 +1587,13 @@ static void i9xx_update_wm(struct drm_crtc *unused_crtc)
- 	fifo_size = dev_priv->display.get_fifo_size(dev, 1);
- 	crtc = intel_get_crtc_for_plane(dev, 1);
- 	if (intel_crtc_active(crtc)) {
-+		const struct drm_display_mode *adjusted_mode;
- 		int cpp = crtc->fb->bits_per_pixel / 8;
- 		if (IS_GEN2(dev))
- 			cpp = 4;
- 
--		planeb_wm = intel_calculate_wm(to_intel_crtc(crtc)->config.adjusted_mode.clock,
-+		adjusted_mode = &to_intel_crtc(crtc)->config.adjusted_mode;
-+		planeb_wm = intel_calculate_wm(adjusted_mode->crtc_clock,
- 					       wm_info, fifo_size, cpp,
- 					       latency_ns);
- 		if (enabled == NULL)
-@@ -1614,7 +1622,7 @@ static void i9xx_update_wm(struct drm_crtc *unused_crtc)
- 		static const int sr_latency_ns = 6000;
- 		const struct drm_display_mode *adjusted_mode =
- 			&to_intel_crtc(enabled)->config.adjusted_mode;
--		int clock = adjusted_mode->clock;
-+		int clock = adjusted_mode->crtc_clock;
- 		int htotal = adjusted_mode->htotal;
- 		int hdisplay = to_intel_crtc(crtc)->config.pipe_src_w;
- 		int pixel_size = enabled->fb->bits_per_pixel / 8;
-@@ -1670,6 +1678,7 @@ static void i830_update_wm(struct drm_crtc *unused_crtc)
- 	struct drm_device *dev = unused_crtc->dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct drm_crtc *crtc;
-+	const struct drm_display_mode *adjusted_mode;
- 	uint32_t fwater_lo;
- 	int planea_wm;
- 
-@@ -1677,7 +1686,8 @@ static void i830_update_wm(struct drm_crtc *unused_crtc)
- 	if (crtc == NULL)
- 		return;
- 
--	planea_wm = intel_calculate_wm(to_intel_crtc(crtc)->config.adjusted_mode.clock,
-+	adjusted_mode = &to_intel_crtc(crtc)->config.adjusted_mode;
-+	planea_wm = intel_calculate_wm(adjusted_mode->crtc_clock,
- 				       &i830_wm_info,
- 				       dev_priv->display.get_fifo_size(dev, 0),
- 				       4, latency_ns);
-@@ -1764,7 +1774,7 @@ static bool ironlake_compute_srwm(struct drm_device *dev, int level, int plane,
- 
- 	crtc = intel_get_crtc_for_plane(dev, plane);
- 	adjusted_mode = &to_intel_crtc(crtc)->config.adjusted_mode;
--	clock = adjusted_mode->clock;
-+	clock = adjusted_mode->crtc_clock;
- 	htotal = adjusted_mode->htotal;
- 	hdisplay = to_intel_crtc(crtc)->config.pipe_src_w;
- 	pixel_size = crtc->fb->bits_per_pixel / 8;
-@@ -2112,7 +2122,7 @@ static uint32_t ilk_pipe_pixel_rate(struct drm_device *dev,
- 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
- 	uint32_t pixel_rate;
- 
--	pixel_rate = intel_crtc->config.adjusted_mode.clock;
-+	pixel_rate = intel_crtc->config.adjusted_mode.crtc_clock;
- 
- 	/* We only use IF-ID interlacing. If we ever use PF-ID we'll need to
- 	 * adjust the pixel_rate here. */
-@@ -2913,7 +2923,7 @@ sandybridge_compute_sprite_wm(struct drm_device *dev, int plane,
- 		return false;
- 	}
- 
--	clock = to_intel_crtc(crtc)->config.adjusted_mode.clock;
-+	clock = to_intel_crtc(crtc)->config.adjusted_mode.crtc_clock;
- 
- 	/* Use the small buffer method to calculate the sprite watermark */
- 	entries = ((clock * pixel_size / 1000) * display_latency_ns) / 1000;
-@@ -2948,7 +2958,7 @@ sandybridge_compute_sprite_srwm(struct drm_device *dev, int plane,
- 	}
- 
- 	crtc = intel_get_crtc_for_plane(dev, plane);
--	clock = to_intel_crtc(crtc)->config.adjusted_mode.clock;
-+	clock = to_intel_crtc(crtc)->config.adjusted_mode.crtc_clock;
- 	if (!clock) {
- 		*sprite_wm = 0;
- 		return false;
-diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
-index 606e03279201..5e59d64cfd95 100644
---- a/drivers/gpu/drm/i915/intel_sdvo.c
-+++ b/drivers/gpu/drm/i915/intel_sdvo.c
-@@ -1369,7 +1369,7 @@ static void intel_sdvo_get_config(struct intel_encoder *encoder,
- 	if (HAS_PCH_SPLIT(dev))
- 		ironlake_check_encoder_dotclock(pipe_config, dotclock);
- 
--	pipe_config->adjusted_mode.clock = dotclock;
-+	pipe_config->adjusted_mode.crtc_clock = dotclock;
- 
- 	/* Cross check the port pixel multiplier with the sdvo encoder state. */
- 	if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_CLOCK_RATE_MULT,
-diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c
-index 11c15fbf9e55..75925a1ab351 100644
---- a/drivers/gpu/drm/i915/intel_tv.c
-+++ b/drivers/gpu/drm/i915/intel_tv.c
-@@ -912,7 +912,7 @@ intel_tv_compute_config(struct intel_encoder *encoder,
- 	if (!tv_mode)
- 		return false;
- 
--	pipe_config->adjusted_mode.clock = tv_mode->clock;
-+	pipe_config->adjusted_mode.crtc_clock = tv_mode->clock;
- 	DRM_DEBUG_KMS("forcing bpc to 8 for TV\n");
- 	pipe_config->pipe_bpp = 8*3;
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0946-drm-Implement-timings-adjustments-for-frame-packing.patch b/patches.baytrail/0946-drm-Implement-timings-adjustments-for-frame-packing.patch
deleted file mode 100644
index c199840909822..0000000000000
--- a/patches.baytrail/0946-drm-Implement-timings-adjustments-for-frame-packing.patch
+++ /dev/null
@@ -1,90 +0,0 @@
-From 7c75780594934a32ccd58374a11c287e70e79aa6 Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Wed, 25 Sep 2013 16:45:35 +0100
-Subject: drm: Implement timings adjustments for frame packing
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-When using the frame packing and a single big framebuffer, some hardware
-requires that we do everything like if we were scanning out the big
-buffer itself. Let's instrument drm_mode_set_crtcinfo() to be able to do
-this adjustement if the driver is asking for it.
-
-v2: Use crtc_vtotal and multiply the clock by 2 instead of
-    reconstructing it (Ville Syrjälä)
-
-Suggested-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Acked-by: Dave Airlie <airlied@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 448cce25f408be4c933f88ed8962455a0c16d0f8)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_modes.c | 22 +++++++++++++++++++++-
- include/drm/drm_crtc.h      |  3 ++-
- 2 files changed, 23 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c
-index 3c708b4aa742..e345d87a03b4 100644
---- a/drivers/gpu/drm/drm_modes.c
-+++ b/drivers/gpu/drm/drm_modes.c
-@@ -726,12 +726,18 @@ EXPORT_SYMBOL(drm_mode_vrefresh);
- /**
-  * drm_mode_set_crtcinfo - set CRTC modesetting parameters
-  * @p: mode
-- * @adjust_flags: unused? (FIXME)
-+ * @adjust_flags: a combination of adjustment flags
-  *
-  * LOCKING:
-  * None.
-  *
-  * Setup the CRTC modesetting parameters for @p, adjusting if necessary.
-+ *
-+ * - The CRTC_INTERLACE_HALVE_V flag can be used to halve vertical timings of
-+ *   interlaced modes.
-+ * - The CRTC_STEREO_DOUBLE flag can be used to compute the timings for
-+ *   buffers containing two eyes (only adjust the timings when needed, eg. for
-+ *   "frame packing" or "side by side full").
-  */
- void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags)
- {
-@@ -772,6 +778,20 @@ void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags)
- 		p->crtc_vtotal *= p->vscan;
- 	}
- 
-+	if (adjust_flags & CRTC_STEREO_DOUBLE) {
-+		unsigned int layout = p->flags & DRM_MODE_FLAG_3D_MASK;
-+
-+		switch (layout) {
-+		case DRM_MODE_FLAG_3D_FRAME_PACKING:
-+			p->crtc_clock *= 2;
-+			p->crtc_vdisplay += p->crtc_vtotal;
-+			p->crtc_vsync_start += p->crtc_vtotal;
-+			p->crtc_vsync_end += p->crtc_vtotal;
-+			p->crtc_vtotal += p->crtc_vtotal;
-+			break;
-+		}
-+	}
-+
- 	p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay);
- 	p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal);
- 	p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay);
-diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h
-index 0a47e15ccef3..b79a01507db4 100644
---- a/include/drm/drm_crtc.h
-+++ b/include/drm/drm_crtc.h
-@@ -123,7 +123,8 @@ enum drm_mode_status {
- 	.vscan = (vs), .flags = (f), \
- 	.base.type = DRM_MODE_OBJECT_MODE
- 
--#define CRTC_INTERLACE_HALVE_V 0x1 /* halve V values for interlacing */
-+#define CRTC_INTERLACE_HALVE_V	(1 << 0) /* halve V values for interlacing */
-+#define CRTC_STEREO_DOUBLE	(1 << 1) /* adjust timings for stereo modes */
- 
- struct drm_display_mode {
- 	/* Header */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0947-drm-i915-Ask-the-DRM-core-do-make-stereo-timings-adj.patch b/patches.baytrail/0947-drm-i915-Ask-the-DRM-core-do-make-stereo-timings-adj.patch
deleted file mode 100644
index fcdd87290d9e2..0000000000000
--- a/patches.baytrail/0947-drm-i915-Ask-the-DRM-core-do-make-stereo-timings-adj.patch
+++ /dev/null
@@ -1,40 +0,0 @@
-From b9765722276b27a7b6e55c9080f13d68de0acce8 Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Wed, 25 Sep 2013 16:45:38 +0100
-Subject: drm/i915: Ask the DRM core do make stereo timings adjustements
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-When scanning out big stereo buffers that are actually bigger that their
-natural 2D counterpart, we need to blow up the crtc timings as well.
-
-Not that this is only done for frame packing as this is the only stereo
-mode currently exposed needing this kind of ajdustements.
-
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Acked-by: Dave Airlie <airlied@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 6ce70f5e8a13c1673e2926453ea4313eb97707e0)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index b928db880679..be6446123e0a 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -8468,7 +8468,7 @@ encoder_retry:
- 	pipe_config->pixel_multiplier = 1;
- 
- 	/* Fill in default crtc timings, allow encoders to overwrite them. */
--	drm_mode_set_crtcinfo(&pipe_config->adjusted_mode, 0);
-+	drm_mode_set_crtcinfo(&pipe_config->adjusted_mode, CRTC_STEREO_DOUBLE);
- 
- 	/* Pass our mode to the connectors and the CRTC to give them a chance to
- 	 * adjust it according to limitations or connector properties, and also
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0948-drm-i915-Prefer-crtc_-h-v-display-for-pipe-src-dimen.patch b/patches.baytrail/0948-drm-i915-Prefer-crtc_-h-v-display-for-pipe-src-dimen.patch
deleted file mode 100644
index fd42181c8a041..0000000000000
--- a/patches.baytrail/0948-drm-i915-Prefer-crtc_-h-v-display-for-pipe-src-dimen.patch
+++ /dev/null
@@ -1,52 +0,0 @@
-From 99a6d85292430f6bb6d143b35523cfcd2f9060e8 Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Wed, 25 Sep 2013 16:45:39 +0100
-Subject: drm/i915: Prefer crtc_{h|v}display for pipe src dimensions
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Now that we ask to adjust the crtc timings for stereo modes, the correct
-pipe_src_w and pipe_src_h can be found in crtc_vdisplay and crtc_hdisplay.
-
-v2: Add comment about why pipe_src_w/h need to be set afert
-    set_crtcinfo() (Daniel Vetter)
-
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Acked-by: Dave Airlie <airlied@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 350a10ca7e43f2641ed217f5d248c1ddbadb5da6)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 7 ++++---
- 1 file changed, 4 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index be6446123e0a..6508419fb32a 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -8433,9 +8433,6 @@ intel_modeset_pipe_config(struct drm_crtc *crtc,
- 	drm_mode_copy(&pipe_config->adjusted_mode, mode);
- 	drm_mode_copy(&pipe_config->requested_mode, mode);
- 
--	pipe_config->pipe_src_w = mode->hdisplay;
--	pipe_config->pipe_src_h = mode->vdisplay;
--
- 	pipe_config->cpu_transcoder =
- 		(enum transcoder) to_intel_crtc(crtc)->pipe;
- 	pipe_config->shared_dpll = DPLL_ID_PRIVATE;
-@@ -8470,6 +8467,10 @@ encoder_retry:
- 	/* Fill in default crtc timings, allow encoders to overwrite them. */
- 	drm_mode_set_crtcinfo(&pipe_config->adjusted_mode, CRTC_STEREO_DOUBLE);
- 
-+	/* set_crtcinfo() may have adjusted hdisplay/vdisplay */
-+	pipe_config->pipe_src_w = pipe_config->adjusted_mode.crtc_hdisplay;
-+	pipe_config->pipe_src_h = pipe_config->adjusted_mode.crtc_vdisplay;
-+
- 	/* Pass our mode to the connectors and the CRTC to give them a chance to
- 	 * adjust it according to limitations or connector properties, and also
- 	 * a chance to reject the mode entirely.
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0949-drm-Make-exposing-stereo-modes-a-per-connector-opt-i.patch b/patches.baytrail/0949-drm-Make-exposing-stereo-modes-a-per-connector-opt-i.patch
deleted file mode 100644
index 3297cd55b5cd7..0000000000000
--- a/patches.baytrail/0949-drm-Make-exposing-stereo-modes-a-per-connector-opt-i.patch
+++ /dev/null
@@ -1,80 +0,0 @@
-From 455295419672b76313bf19b5a0c32fd839977df7 Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Wed, 25 Sep 2013 16:45:29 +0100
-Subject: drm: Make exposing stereo modes a per-connector opt-in
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Just like with interlaced or double scan modes, make stereo modes a
-per-connector opt-in to give a chance to driver authors to make it work
-before enabling it.
-
-Suggested-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Acked-by: Dave Airlie <airlied@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 560a067a93520a18a1dd7cf07ebd759a45270855)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_crtc_helper.c | 8 +++++++-
- include/drm/drm_crtc.h            | 2 ++
- 2 files changed, 9 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/drm_crtc_helper.c b/drivers/gpu/drm/drm_crtc_helper.c
-index ed1334e27c33..bdcdbb156d08 100644
---- a/drivers/gpu/drm/drm_crtc_helper.c
-+++ b/drivers/gpu/drm/drm_crtc_helper.c
-@@ -76,7 +76,8 @@ static void drm_mode_validate_flag(struct drm_connector *connector,
- {
- 	struct drm_display_mode *mode;
- 
--	if (flags == (DRM_MODE_FLAG_DBLSCAN | DRM_MODE_FLAG_INTERLACE))
-+	if (flags == (DRM_MODE_FLAG_DBLSCAN | DRM_MODE_FLAG_INTERLACE |
-+		      DRM_MODE_FLAG_3D_MASK))
- 		return;
- 
- 	list_for_each_entry(mode, &connector->modes, head) {
-@@ -86,6 +87,9 @@ static void drm_mode_validate_flag(struct drm_connector *connector,
- 		if ((mode->flags & DRM_MODE_FLAG_DBLSCAN) &&
- 				!(flags & DRM_MODE_FLAG_DBLSCAN))
- 			mode->status = MODE_NO_DBLESCAN;
-+		if ((mode->flags & DRM_MODE_FLAG_3D_MASK) &&
-+				!(flags & DRM_MODE_FLAG_3D_MASK))
-+			mode->status = MODE_NO_STEREO;
- 	}
- 
- 	return;
-@@ -175,6 +179,8 @@ int drm_helper_probe_single_connector_modes(struct drm_connector *connector,
- 		mode_flags |= DRM_MODE_FLAG_INTERLACE;
- 	if (connector->doublescan_allowed)
- 		mode_flags |= DRM_MODE_FLAG_DBLSCAN;
-+	if (connector->stereo_allowed)
-+		mode_flags |= DRM_MODE_FLAG_3D_MASK;
- 	drm_mode_validate_flag(connector, mode_flags);
- 
- 	list_for_each_entry(mode, &connector->modes, head) {
-diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h
-index b79a01507db4..2743dad5fe88 100644
---- a/include/drm/drm_crtc.h
-+++ b/include/drm/drm_crtc.h
-@@ -107,6 +107,7 @@ enum drm_mode_status {
-     MODE_ONE_HEIGHT,    /* only one height is supported */
-     MODE_ONE_SIZE,      /* only one resolution is supported */
-     MODE_NO_REDUCED,    /* monitor doesn't accept reduced blanking */
-+    MODE_NO_STEREO,	/* stereo modes not supported */
-     MODE_UNVERIFIED = -3, /* mode needs to reverified */
-     MODE_BAD = -2,	/* unspecified reason */
-     MODE_ERROR	= -1	/* error condition */
-@@ -593,6 +594,7 @@ struct drm_connector {
- 	int connector_type_id;
- 	bool interlace_allowed;
- 	bool doublescan_allowed;
-+	bool stereo_allowed;
- 	struct list_head modes; /* list of modes on this connector */
- 
- 	enum drm_connector_status status;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0950-drm-i915-Allow-stereo-modes-on-HDMI.patch b/patches.baytrail/0950-drm-i915-Allow-stereo-modes-on-HDMI.patch
deleted file mode 100644
index a68b2dc44a796..0000000000000
--- a/patches.baytrail/0950-drm-i915-Allow-stereo-modes-on-HDMI.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From bc2a5e6528d9456d6dee41146290276aaead3ae1 Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Wed, 25 Sep 2013 16:45:40 +0100
-Subject: drm/i915: Allow stereo modes on HDMI
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Acked-by: Dave Airlie <airlied@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 573e74adbd13dff6a5d88aff4d7b19410fc2cb9a)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_hdmi.c | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
-index 1a57758e5bf8..6004f9c549aa 100644
---- a/drivers/gpu/drm/i915/intel_hdmi.c
-+++ b/drivers/gpu/drm/i915/intel_hdmi.c
-@@ -1228,6 +1228,7 @@ void intel_hdmi_init_connector(struct intel_digital_port *intel_dig_port,
- 
- 	connector->interlace_allowed = 1;
- 	connector->doublescan_allowed = 0;
-+	connector->stereo_allowed = 1;
- 
- 	switch (port) {
- 	case PORT_B:
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0951-drm-i915-vlv-hack-to-init-backlight-regs-if-BIOS-fai.patch b/patches.baytrail/0951-drm-i915-vlv-hack-to-init-backlight-regs-if-BIOS-fai.patch
deleted file mode 100644
index 350bf05a56f7c..0000000000000
--- a/patches.baytrail/0951-drm-i915-vlv-hack-to-init-backlight-regs-if-BIOS-fai.patch
+++ /dev/null
@@ -1,68 +0,0 @@
-From 7e80624e5c36f6b273723429da10b1cded589d94 Mon Sep 17 00:00:00 2001
-From: Jesse Barnes <jbarnes@virtuousgeek.org>
-Date: Wed, 25 Sep 2013 14:04:32 -0700
-Subject: drm/i915/vlv: hack to init backlight regs if BIOS fails to do so v2
-
-Still digging up the actual VBT info for this, but wanted to get this
-out there for testing, or in case others are also bugged by this.
-
-This can happen if you boot with an external display connected.  In that
-case, the attached eDP backlight modulation frequency may not be
-programmed, so we need to use something (in this case the value my BIOS
-normally programs with just the internal display enabled).
-
-v2: fix masking and magic value in read_blc_pwm_ctl (Jani)
-
-Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67732
-Tested-by: shui yangwei <yangweix.shui@intel.com> (v1)
-Reviewed-by: Jani Nikula <jani.nikula@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit afc85b9d9e617e602006d8766d04e0b8ac9c1b74)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_panel.c | 17 +++++++++++++++++
- 1 file changed, 17 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
-index 8f025c694733..54684168de1e 100644
---- a/drivers/gpu/drm/i915/intel_panel.c
-+++ b/drivers/gpu/drm/i915/intel_panel.c
-@@ -372,6 +372,9 @@ static u32 i915_read_blc_pwm_ctl(struct drm_device *dev)
- 				I915_WRITE(BLC_PWM_CTL2,
- 					   dev_priv->regfile.saveBLC_PWM_CTL2);
- 		}
-+
-+		if (IS_VALLEYVIEW(dev) && !val)
-+			val = 0x0f42ffff;
- 	}
- 
- 	return val;
-@@ -629,10 +632,24 @@ set_level:
- 	spin_unlock_irqrestore(&dev_priv->backlight.lock, flags);
- }
- 
-+/* FIXME: use VBT vals to init PWM_CTL and PWM_CTL2 correctly */
-+static void intel_panel_init_backlight_regs(struct drm_device *dev)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+
-+	if (IS_VALLEYVIEW(dev)) {
-+		u32 cur_val = I915_READ(BLC_PWM_CTL) &
-+			BACKLIGHT_DUTY_CYCLE_MASK;
-+		I915_WRITE(BLC_PWM_CTL, (0xf42 << 16) | cur_val);
-+	}
-+}
-+
- static void intel_panel_init_backlight(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 
-+	intel_panel_init_backlight_regs(dev);
-+
- 	dev_priv->backlight.level = intel_panel_get_backlight(dev);
- 	dev_priv->backlight.enabled = dev_priv->backlight.level != 0;
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0952-drm-i915-Program-GMBUS-Frequency-based-on-the-CDCLK-.patch b/patches.baytrail/0952-drm-i915-Program-GMBUS-Frequency-based-on-the-CDCLK-.patch
deleted file mode 100644
index 4759c976d2203..0000000000000
--- a/patches.baytrail/0952-drm-i915-Program-GMBUS-Frequency-based-on-the-CDCLK-.patch
+++ /dev/null
@@ -1,158 +0,0 @@
-From 7d90aef0324df9789299ba23043207c71f867bef Mon Sep 17 00:00:00 2001
-From: Chon Ming Lee <chon.ming.lee@intel.com>
-Date: Fri, 27 Sep 2013 15:31:00 +0800
-Subject: drm/i915: Program GMBUS Frequency based on the CDCLK for VLV.
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-CDCLK is used to generate the gmbus clock.  This is normally done by
-BIOS. Program the value if the BIOS-less system doesn't do it.
-
-v2: Move this to intel_i2c_reset to allow reprogram the gmbus frequency
-during resume. (Daniel)
-
-v3: Change GMBUS_FREQ to GMBUSFREQ_VLV, and use VLV_DISPLAY_BASE.
-(Ville).
-	Remove cdclk_ratio[] table, and calculate the cdclk ratio instead.
-(Ville).
- 	Change the shift then mask for reg read, to mask first, then shift.
-(Ville).
-	Remove the gmbus frequency calculation = cdclk/1.01.  Based on BIOS
-programming, gmbus frequency = cdclk frequency. (Ville)
-	Add get_disp_clk_div, which can use to get cdclk/czclk divide.
-
-v4: Fix the mmio_offset base for CZCLK_CDCLK_FREQ_RATIO, gmbus_freq
-calculation, and duplicate check for gmbus_freq. (Ville)
-
-In VLV, the spec is wrong about 4Mhz reference frequency for GMBUS. It
-should be 1Mhz.
-
-Signed-off-by: Chon Ming Lee <chon.ming.lee@intel.com>
-[danvet: Add the comment Ville suggested. Also appease checkpatch a
-bit.]
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 24eb2d599b6a2bf7761c00e1959898d1d9240cb5)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_reg.h  |  8 +++++
- drivers/gpu/drm/i915/intel_i2c.c | 64 ++++++++++++++++++++++++++++++++++++++++
- 2 files changed, 72 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
-index 00fda45728d7..33bb4750516a 100644
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -382,6 +382,8 @@
- #define   FB_FMAX_VMIN_FREQ_LO_MASK		0xf8000000
- 
- /* vlv2 north clock has */
-+#define CCK_FUSE_REG				0x8
-+#define  CCK_FUSE_HPLL_FREQ_MASK		0x3
- #define CCK_REG_DSI_PLL_FUSE			0x44
- #define CCK_REG_DSI_PLL_CONTROL			0x48
- #define  DSI_PLL_VCO_EN				(1 << 31)
-@@ -1429,6 +1431,12 @@
- 
- #define MI_ARB_VLV		(VLV_DISPLAY_BASE + 0x6504)
- 
-+#define CZCLK_CDCLK_FREQ_RATIO	(VLV_DISPLAY_BASE + 0x6508)
-+#define   CDCLK_FREQ_SHIFT	4
-+#define   CDCLK_FREQ_MASK	(0x1f << CDCLK_FREQ_SHIFT)
-+#define   CZCLK_FREQ_MASK	0xf
-+#define GMBUSFREQ_VLV		(VLV_DISPLAY_BASE + 0x6510)
-+
- /*
-  * Palette regs
-  */
-diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c
-index d1c1e0f7f262..2ca17b14b6c1 100644
---- a/drivers/gpu/drm/i915/intel_i2c.c
-+++ b/drivers/gpu/drm/i915/intel_i2c.c
-@@ -34,6 +34,11 @@
- #include <drm/i915_drm.h>
- #include "i915_drv.h"
- 
-+enum disp_clk {
-+	CDCLK,
-+	CZCLK
-+};
-+
- struct gmbus_port {
- 	const char *name;
- 	int reg;
-@@ -58,10 +63,69 @@ to_intel_gmbus(struct i2c_adapter *i2c)
- 	return container_of(i2c, struct intel_gmbus, adapter);
- }
- 
-+static int get_disp_clk_div(struct drm_i915_private *dev_priv,
-+			    enum disp_clk clk)
-+{
-+	u32 reg_val;
-+	int clk_ratio;
-+
-+	reg_val = I915_READ(CZCLK_CDCLK_FREQ_RATIO);
-+
-+	if (clk == CDCLK)
-+		clk_ratio =
-+			((reg_val & CDCLK_FREQ_MASK) >> CDCLK_FREQ_SHIFT) + 1;
-+	else
-+		clk_ratio = (reg_val & CZCLK_FREQ_MASK) + 1;
-+
-+	return clk_ratio;
-+}
-+
-+static void gmbus_set_freq(struct drm_i915_private *dev_priv)
-+{
-+	int vco_freq[] = { 800, 1600, 2000, 2400 };
-+	int gmbus_freq = 0, cdclk_div, hpll_freq;
-+
-+	BUG_ON(!IS_VALLEYVIEW(dev_priv->dev));
-+
-+	/* Skip setting the gmbus freq if BIOS has already programmed it */
-+	if (I915_READ(GMBUSFREQ_VLV) != 0xA0)
-+		return;
-+
-+	/* Obtain SKU information */
-+	mutex_lock(&dev_priv->dpio_lock);
-+	hpll_freq =
-+		vlv_cck_read(dev_priv, CCK_FUSE_REG) & CCK_FUSE_HPLL_FREQ_MASK;
-+	mutex_unlock(&dev_priv->dpio_lock);
-+
-+	/* Get the CDCLK divide ratio */
-+	cdclk_div = get_disp_clk_div(dev_priv, CDCLK);
-+
-+	/*
-+	 * Program the gmbus_freq based on the cdclk frequency.
-+	 * BSpec erroneously claims we should aim for 4MHz, but
-+	 * in fact 1MHz is the correct frequency.
-+	 */
-+	if (cdclk_div)
-+		gmbus_freq = (vco_freq[hpll_freq] << 1) / cdclk_div;
-+
-+	if (WARN_ON(gmbus_freq == 0))
-+		return;
-+
-+	I915_WRITE(GMBUSFREQ_VLV, gmbus_freq);
-+}
-+
- void
- intel_i2c_reset(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
-+
-+	/*
-+	 * In BIOS-less system, program the correct gmbus frequency
-+	 * before reading edid.
-+	 */
-+	if (IS_VALLEYVIEW(dev))
-+		gmbus_set_freq(dev_priv);
-+
- 	I915_WRITE(dev_priv->gpio_mmio_base + GMBUS0, 0);
- 	I915_WRITE(dev_priv->gpio_mmio_base + GMBUS4, 0);
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0953-drm-i915-Eliminate-one-indent-leel-from-vlv_find_bes.patch b/patches.baytrail/0953-drm-i915-Eliminate-one-indent-leel-from-vlv_find_bes.patch
deleted file mode 100644
index 50e486654f698..0000000000000
--- a/patches.baytrail/0953-drm-i915-Eliminate-one-indent-leel-from-vlv_find_bes.patch
+++ /dev/null
@@ -1,73 +0,0 @@
-From f4ab3140f43b7da0e8d2627f02698ea90a9788eb Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Tue, 24 Sep 2013 21:26:18 +0300
-Subject: drm/i915: Eliminate one indent leel from vlv_find_best_dpll
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Use 'continue' to get rid of one indent level in vlv_find_best_dpll()
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 43b0ac531745c3b7cb523dbd2b3f80a2a97ca675)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 40 +++++++++++++++++++-----------------
- 1 file changed, 21 insertions(+), 19 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 6508419fb32a..65318dbce96b 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -699,25 +699,27 @@ vlv_find_best_dpll(const intel_limit_t *limit, struct drm_crtc *crtc,
- 					       refclk) / (2*refclk));
- 					m = m1 * m2;
- 					vco = updrate * m;
--					if (vco >= limit->vco.min && vco < limit->vco.max) {
--						ppm = 1000000 * ((vco / p) - fastclk) / fastclk;
--						absppm = (ppm > 0) ? ppm : (-ppm);
--						if (absppm < 100 && ((p1 * p2) > (bestp1 * bestp2))) {
--							bestppm = 0;
--							flag = 1;
--						}
--						if (absppm < bestppm - 10) {
--							bestppm = absppm;
--							flag = 1;
--						}
--						if (flag) {
--							bestn = n;
--							bestm1 = m1;
--							bestm2 = m2;
--							bestp1 = p1;
--							bestp2 = p2;
--							flag = 0;
--						}
-+
-+					if (vco < limit->vco.min || vco >= limit->vco.max)
-+						continue;
-+
-+					ppm = 1000000 * ((vco / p) - fastclk) / fastclk;
-+					absppm = (ppm > 0) ? ppm : (-ppm);
-+					if (absppm < 100 && ((p1 * p2) > (bestp1 * bestp2))) {
-+						bestppm = 0;
-+						flag = 1;
-+					}
-+					if (absppm < bestppm - 10) {
-+						bestppm = absppm;
-+						flag = 1;
-+					}
-+					if (flag) {
-+						bestn = n;
-+						bestm1 = m1;
-+						bestm2 = m2;
-+						bestp1 = p1;
-+						bestp2 = p2;
-+						flag = 0;
- 					}
- 				}
- 			}
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0954-drm-i915-Use-DIV_ROUND_CLOSEST.patch b/patches.baytrail/0954-drm-i915-Use-DIV_ROUND_CLOSEST.patch
deleted file mode 100644
index f519111b6c006..0000000000000
--- a/patches.baytrail/0954-drm-i915-Use-DIV_ROUND_CLOSEST.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 15edfce0138aa427db84cf7239083acabb2b0bac Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Tue, 24 Sep 2013 21:26:19 +0300
-Subject: drm/i915: Use DIV_ROUND_CLOSEST()
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-vlv_find_best_dpll() has an open coded DIV_ROUND_CLOSEST(). Replace it
-with the real thing.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 5de56df5c708f5d0d1bb2c156385a6740436affa)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 3 +--
- 1 file changed, 1 insertion(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 65318dbce96b..925d69044878 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -695,8 +695,7 @@ vlv_find_best_dpll(const intel_limit_t *limit, struct drm_crtc *crtc,
- 				p = p1 * p2;
- 				/* based on hardware requirement, prefer bigger m1,m2 values */
- 				for (m1 = limit->m1.min; m1 <= limit->m1.max; m1++) {
--					m2 = (((2*(fastclk * p * n / m1 )) +
--					       refclk) / (2*refclk));
-+					m2 = DIV_ROUND_CLOSEST(fastclk * p * n, refclk * m1);
- 					m = m1 * m2;
- 					vco = updrate * m;
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0955-drm-i915-vlv-use-lower-precision-RC6-counter.patch b/patches.baytrail/0955-drm-i915-vlv-use-lower-precision-RC6-counter.patch
deleted file mode 100644
index 827ac661f1cf8..0000000000000
--- a/patches.baytrail/0955-drm-i915-vlv-use-lower-precision-RC6-counter.patch
+++ /dev/null
@@ -1,46 +0,0 @@
-From 15cc7c2b73919ef4e1e2ea0facd79ec41745de94 Mon Sep 17 00:00:00 2001
-From: Jesse Barnes <jbarnes@virtuousgeek.org>
-Date: Thu, 26 Sep 2013 17:55:57 -0700
-Subject: drm/i915/vlv: use lower precision RC6 counter
-
-And add some reg defines while we're at it.  Since the units of the RC6
-residency counter are actually in CZ clocks, we want to just use the
-high bits or we'll overflow too frequently.
-
-Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 49798eb2fe7240900d0a22a4e8d2b8e2f2ea6684)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_reg.h |    4 ++++
- drivers/gpu/drm/i915/intel_pm.c |    5 ++++-
- 2 files changed, 8 insertions(+), 1 deletion(-)
-
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -4733,6 +4733,10 @@
- 						 GEN6_PM_RP_DOWN_TIMEOUT)
- 
- #define GEN6_GT_GFX_RC6_LOCKED			0x138104
-+#define VLV_COUNTER_CONTROL			0x138104
-+#define   VLV_COUNT_RANGE_HIGH			(1<<15)
-+#define   VLV_MEDIA_RC6_COUNT_EN		(1<<1)
-+#define   VLV_RENDER_RC6_COUNT_EN		(1<<0)
- #define GEN6_GT_GFX_RC6				0x138108
- #define GEN6_GT_GFX_RC6p			0x13810C
- #define GEN6_GT_GFX_RC6pp			0x138110
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -3837,7 +3837,10 @@ static void valleyview_enable_rps(struct
- 	I915_WRITE(GEN6_RC6_THRESHOLD, 0xc350);
- 
- 	/* allows RC6 residency counter to work */
--	I915_WRITE(0x138104, _MASKED_BIT_ENABLE(0x3));
-+	I915_WRITE(VLV_COUNTER_CONTROL,
-+		   _MASKED_BIT_ENABLE(VLV_COUNT_RANGE_HIGH |
-+				      VLV_MEDIA_RC6_COUNT_EN |
-+				      VLV_RENDER_RC6_COUNT_EN));
- 	if (intel_enable_rc6(dev) & INTEL_RC6_ENABLE)
- 		rc6_mode = GEN7_RC_CTL_TO_MODE;
- 	I915_WRITE(GEN6_RC_CONTROL, rc6_mode);
diff --git a/patches.baytrail/0956-drm-i915-vlv-use-correct-units-for-rc6-residency-v2.patch b/patches.baytrail/0956-drm-i915-vlv-use-correct-units-for-rc6-residency-v2.patch
deleted file mode 100644
index a886dae800940..0000000000000
--- a/patches.baytrail/0956-drm-i915-vlv-use-correct-units-for-rc6-residency-v2.patch
+++ /dev/null
@@ -1,76 +0,0 @@
-From fd73061b60fc5090f59305c508cf2cd5d26be834 Mon Sep 17 00:00:00 2001
-From: Jesse Barnes <jbarnes@virtuousgeek.org>
-Date: Thu, 26 Sep 2013 17:55:58 -0700
-Subject: drm/i915/vlv: use correct units for rc6 residency v2
-
-We need to use the clock control reg to figure out how many CZ clks are in
-30ns and use that as the basis for our RC6 residency calculations.
-
-v2: use ULL everywhere for consistency (Chris)
-    factor out bias for clarity (Chris)
-
-References: https://bugs.freedesktop.org/show_bug.cgi?id=69692
-Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit e454a05da623c26544721b159caaacdb6dfe448c)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_reg.h   |  3 +++
- drivers/gpu/drm/i915/i915_sysfs.c | 22 ++++++++++++++++++++--
- 2 files changed, 23 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
-index c15cc749ca2c..96fd2ce6aa02 100644
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -1805,6 +1805,9 @@
-  */
- #define HSW_CXT_TOTAL_SIZE		(17 * PAGE_SIZE)
- 
-+#define VLV_CLK_CTL2			0x101104
-+#define   CLK_CTL2_CZCOUNT_30NS_SHIFT	28
-+
- /*
-  * Overlay regs
-  */
-diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c
-index 44f4c1a6f7b1..8003886361b8 100644
---- a/drivers/gpu/drm/i915/i915_sysfs.c
-+++ b/drivers/gpu/drm/i915/i915_sysfs.c
-@@ -37,12 +37,30 @@ static u32 calc_residency(struct drm_device *dev, const u32 reg)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	u64 raw_time; /* 32b value may overflow during fixed point math */
-+	u64 units = 128ULL, div = 100000ULL, bias = 100ULL;
- 
- 	if (!intel_enable_rc6(dev))
- 		return 0;
- 
--	raw_time = I915_READ(reg) * 128ULL;
--	return DIV_ROUND_UP_ULL(raw_time, 100000);
-+	/* On VLV, residency time is in CZ units rather than 1.28us */
-+	if (IS_VALLEYVIEW(dev)) {
-+		u32 clkctl2;
-+
-+		clkctl2 = I915_READ(VLV_CLK_CTL2) >>
-+			CLK_CTL2_CZCOUNT_30NS_SHIFT;
-+		if (!clkctl2) {
-+			WARN(!clkctl2, "bogus CZ count value");
-+			return 0;
-+		}
-+		units = DIV_ROUND_UP_ULL(30ULL * bias, (u64)clkctl2);
-+		if (I915_READ(VLV_COUNTER_CONTROL) & VLV_COUNT_RANGE_HIGH)
-+			units <<= 8;
-+
-+		div = 1000000ULL * bias;
-+	}
-+
-+	raw_time = I915_READ(reg) * units;
-+	return DIV_ROUND_UP_ULL(raw_time, div);
- }
- 
- static ssize_t
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0957-drm-i915-vlv-reduce-GT-FIFO-error-info-to-a-debug-me.patch b/patches.baytrail/0957-drm-i915-vlv-reduce-GT-FIFO-error-info-to-a-debug-me.patch
deleted file mode 100644
index 5eee77d49f282..0000000000000
--- a/patches.baytrail/0957-drm-i915-vlv-reduce-GT-FIFO-error-info-to-a-debug-me.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From ac80d1e0f902a5efff8105acdfd14fa8c382ca31 Mon Sep 17 00:00:00 2001
-From: Jesse Barnes <jbarnes@virtuousgeek.org>
-Date: Fri, 27 Sep 2013 10:40:54 -0700
-Subject: drm/i915/vlv: reduce GT FIFO error info to a debug message
-
-It indicates a probable BIOS bug, but it appears to be harmless, and
-there's nothing the user can do about it anyway, so reduce to a debug
-msg.  I've filed a bug with the BIOS folks about it anyway, so hopefully
-they'll fix whatever GT SB read they were doing when the GT was off.
-
-References: https://bugs.freedesktop.org/show_bug.cgi?id=69396
-Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit f7d85c1ed1562aaab3ce10714cdd9e68013de7ae)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 102fc498a12f..10054b58ee92 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -3804,7 +3804,8 @@ static void valleyview_enable_rps(struct drm_device *dev)
- 	WARN_ON(!mutex_is_locked(&dev_priv->rps.hw_lock));
- 
- 	if ((gtfifodbg = I915_READ(GTFIFODBG))) {
--		DRM_ERROR("GT fifo had a previous error %x\n", gtfifodbg);
-+		DRM_DEBUG_DRIVER("GT fifo had a previous error %x\n",
-+				 gtfifodbg);
- 		I915_WRITE(GTFIFODBG, gtfifodbg);
- 	}
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0958-drm-i915-dp-retry-i2c-over-aux-seven-times-on-AUX-DE.patch b/patches.baytrail/0958-drm-i915-dp-retry-i2c-over-aux-seven-times-on-AUX-DE.patch
deleted file mode 100644
index a7ee07d193de2..0000000000000
--- a/patches.baytrail/0958-drm-i915-dp-retry-i2c-over-aux-seven-times-on-AUX-DE.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 695e14f0153ab1ea6e3031b60e9af744d4098508 Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Fri, 20 Sep 2013 16:42:14 +0300
-Subject: drm/i915/dp: retry i2c-over-aux seven times on AUX DEFER
-
-Per DP1.2 spec.
-
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Reviewed-by: Todd Previte <tprevite@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 58c67ce9f0a0d9f016cded91b652642e2aca9e07)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_dp.c | 7 ++++++-
- 1 file changed, 6 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
-index 2f04f0f60fd6..85e2aefcad2d 100644
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -654,7 +654,12 @@ intel_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode,
- 		break;
- 	}
- 
--	for (retry = 0; retry < 5; retry++) {
-+	/*
-+	 * DP1.2 sections 2.7.7.1.5.6.1 and 2.7.7.1.6.6.1: A DP Source device is
-+	 * required to retry at least seven times upon receiving AUX_DEFER
-+	 * before giving up the AUX transaction.
-+	 */
-+	for (retry = 0; retry < 7; retry++) {
- 		ret = intel_dp_aux_ch(intel_dp,
- 				      msg, msg_bytes,
- 				      reply, reply_bytes);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0959-drm-i915-dp-do-not-write-DP_TRAINING_PATTERN_SET-all.patch b/patches.baytrail/0959-drm-i915-dp-do-not-write-DP_TRAINING_PATTERN_SET-all.patch
deleted file mode 100644
index f29399e747e5a..0000000000000
--- a/patches.baytrail/0959-drm-i915-dp-do-not-write-DP_TRAINING_PATTERN_SET-all.patch
+++ /dev/null
@@ -1,278 +0,0 @@
-From fc872915031cf16de9e965655fc3c4da58240943 Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Fri, 27 Sep 2013 15:10:44 +0300
-Subject: drm/i915/dp: do not write DP_TRAINING_PATTERN_SET all the time
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Neither the DP spec nor the compliance test spec state or imply that we
-should write the DP_TRAINING_PATTERN_SET at every voltage swing and
-pre-emphasis change. Indeed we probably shouldn't. So don't.
-
-Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=49402
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Smoke-tested-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 70aff66c953054334bf0569696901c13e206ade6)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_dp.c | 129 +++++++++++++++++++++++++++-------------
- 1 file changed, 87 insertions(+), 42 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
-index 85e2aefcad2d..d1ba44294f3a 100644
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -2318,7 +2318,7 @@ intel_dp_set_signal_levels(struct intel_dp *intel_dp, uint32_t *DP)
- 
- static bool
- intel_dp_set_link_train(struct intel_dp *intel_dp,
--			uint32_t dp_reg_value,
-+			uint32_t *DP,
- 			uint8_t dp_train_pat)
- {
- 	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
-@@ -2354,50 +2354,51 @@ intel_dp_set_link_train(struct intel_dp *intel_dp,
- 		I915_WRITE(DP_TP_CTL(port), temp);
- 
- 	} else if (HAS_PCH_CPT(dev) && (IS_GEN7(dev) || port != PORT_A)) {
--		dp_reg_value &= ~DP_LINK_TRAIN_MASK_CPT;
-+		*DP &= ~DP_LINK_TRAIN_MASK_CPT;
- 
- 		switch (dp_train_pat & DP_TRAINING_PATTERN_MASK) {
- 		case DP_TRAINING_PATTERN_DISABLE:
--			dp_reg_value |= DP_LINK_TRAIN_OFF_CPT;
-+			*DP |= DP_LINK_TRAIN_OFF_CPT;
- 			break;
- 		case DP_TRAINING_PATTERN_1:
--			dp_reg_value |= DP_LINK_TRAIN_PAT_1_CPT;
-+			*DP |= DP_LINK_TRAIN_PAT_1_CPT;
- 			break;
- 		case DP_TRAINING_PATTERN_2:
--			dp_reg_value |= DP_LINK_TRAIN_PAT_2_CPT;
-+			*DP |= DP_LINK_TRAIN_PAT_2_CPT;
- 			break;
- 		case DP_TRAINING_PATTERN_3:
- 			DRM_ERROR("DP training pattern 3 not supported\n");
--			dp_reg_value |= DP_LINK_TRAIN_PAT_2_CPT;
-+			*DP |= DP_LINK_TRAIN_PAT_2_CPT;
- 			break;
- 		}
- 
- 	} else {
--		dp_reg_value &= ~DP_LINK_TRAIN_MASK;
-+		*DP &= ~DP_LINK_TRAIN_MASK;
- 
- 		switch (dp_train_pat & DP_TRAINING_PATTERN_MASK) {
- 		case DP_TRAINING_PATTERN_DISABLE:
--			dp_reg_value |= DP_LINK_TRAIN_OFF;
-+			*DP |= DP_LINK_TRAIN_OFF;
- 			break;
- 		case DP_TRAINING_PATTERN_1:
--			dp_reg_value |= DP_LINK_TRAIN_PAT_1;
-+			*DP |= DP_LINK_TRAIN_PAT_1;
- 			break;
- 		case DP_TRAINING_PATTERN_2:
--			dp_reg_value |= DP_LINK_TRAIN_PAT_2;
-+			*DP |= DP_LINK_TRAIN_PAT_2;
- 			break;
- 		case DP_TRAINING_PATTERN_3:
- 			DRM_ERROR("DP training pattern 3 not supported\n");
--			dp_reg_value |= DP_LINK_TRAIN_PAT_2;
-+			*DP |= DP_LINK_TRAIN_PAT_2;
- 			break;
- 		}
- 	}
- 
--	I915_WRITE(intel_dp->output_reg, dp_reg_value);
-+	I915_WRITE(intel_dp->output_reg, *DP);
- 	POSTING_READ(intel_dp->output_reg);
- 
--	intel_dp_aux_native_write_1(intel_dp,
--				    DP_TRAINING_PATTERN_SET,
--				    dp_train_pat);
-+	ret = intel_dp_aux_native_write_1(intel_dp, DP_TRAINING_PATTERN_SET,
-+					  dp_train_pat);
-+	if (ret != 1)
-+		return false;
- 
- 	if ((dp_train_pat & DP_TRAINING_PATTERN_MASK) !=
- 	    DP_TRAINING_PATTERN_DISABLE) {
-@@ -2412,6 +2413,37 @@ intel_dp_set_link_train(struct intel_dp *intel_dp,
- 	return true;
- }
- 
-+static bool
-+intel_dp_reset_link_train(struct intel_dp *intel_dp, uint32_t *DP,
-+			uint8_t dp_train_pat)
-+{
-+	memset(intel_dp->train_set, 0, 4);
-+	intel_dp_set_signal_levels(intel_dp, DP);
-+	return intel_dp_set_link_train(intel_dp, DP, dp_train_pat);
-+}
-+
-+static bool
-+intel_dp_update_link_train(struct intel_dp *intel_dp, uint32_t *DP,
-+			   uint8_t link_status[DP_LINK_STATUS_SIZE])
-+{
-+	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
-+	struct drm_device *dev = intel_dig_port->base.base.dev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	int ret;
-+
-+	intel_get_adjust_train(intel_dp, link_status);
-+	intel_dp_set_signal_levels(intel_dp, DP);
-+
-+	I915_WRITE(intel_dp->output_reg, *DP);
-+	POSTING_READ(intel_dp->output_reg);
-+
-+	ret = intel_dp_aux_native_write(intel_dp, DP_TRAINING_LANE0_SET,
-+					intel_dp->train_set,
-+					intel_dp->lane_count);
-+
-+	return ret == intel_dp->lane_count;
-+}
-+
- static void intel_dp_set_idle_link_train(struct intel_dp *intel_dp)
- {
- 	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
-@@ -2464,21 +2496,19 @@ intel_dp_start_link_train(struct intel_dp *intel_dp)
- 
- 	DP |= DP_PORT_EN;
- 
--	memset(intel_dp->train_set, 0, 4);
-+	/* clock recovery */
-+	if (!intel_dp_reset_link_train(intel_dp, &DP,
-+				       DP_TRAINING_PATTERN_1 |
-+				       DP_LINK_SCRAMBLING_DISABLE)) {
-+		DRM_ERROR("failed to enable link training\n");
-+		return;
-+	}
-+
- 	voltage = 0xff;
- 	voltage_tries = 0;
- 	loop_tries = 0;
- 	for (;;) {
--		/* Use intel_dp->train_set[0] to set the voltage and pre emphasis values */
--		uint8_t	    link_status[DP_LINK_STATUS_SIZE];
--
--		intel_dp_set_signal_levels(intel_dp, &DP);
--
--		/* Set training pattern 1 */
--		if (!intel_dp_set_link_train(intel_dp, DP,
--					     DP_TRAINING_PATTERN_1 |
--					     DP_LINK_SCRAMBLING_DISABLE))
--			break;
-+		uint8_t link_status[DP_LINK_STATUS_SIZE];
- 
- 		drm_dp_link_train_clock_recovery_delay(intel_dp->dpcd);
- 		if (!intel_dp_get_link_status(intel_dp, link_status)) {
-@@ -2501,7 +2531,9 @@ intel_dp_start_link_train(struct intel_dp *intel_dp)
- 				DRM_DEBUG_KMS("too many full retries, give up\n");
- 				break;
- 			}
--			memset(intel_dp->train_set, 0, 4);
-+			intel_dp_reset_link_train(intel_dp, &DP,
-+						  DP_TRAINING_PATTERN_1 |
-+						  DP_LINK_SCRAMBLING_DISABLE);
- 			voltage_tries = 0;
- 			continue;
- 		}
-@@ -2517,8 +2549,11 @@ intel_dp_start_link_train(struct intel_dp *intel_dp)
- 			voltage_tries = 0;
- 		voltage = intel_dp->train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK;
- 
--		/* Compute new intel_dp->train_set as requested by target */
--		intel_get_adjust_train(intel_dp, link_status);
-+		/* Update training set as requested by target */
-+		if (!intel_dp_update_link_train(intel_dp, &DP, link_status)) {
-+			DRM_ERROR("failed to update link training\n");
-+			break;
-+		}
- 	}
- 
- 	intel_dp->DP = DP;
-@@ -2532,11 +2567,18 @@ intel_dp_complete_link_train(struct intel_dp *intel_dp)
- 	uint32_t DP = intel_dp->DP;
- 
- 	/* channel equalization */
-+	if (!intel_dp_set_link_train(intel_dp, &DP,
-+				     DP_TRAINING_PATTERN_2 |
-+				     DP_LINK_SCRAMBLING_DISABLE)) {
-+		DRM_ERROR("failed to start channel equalization\n");
-+		return;
-+	}
-+
- 	tries = 0;
- 	cr_tries = 0;
- 	channel_eq = false;
- 	for (;;) {
--		uint8_t	    link_status[DP_LINK_STATUS_SIZE];
-+		uint8_t link_status[DP_LINK_STATUS_SIZE];
- 
- 		if (cr_tries > 5) {
- 			DRM_ERROR("failed to train DP, aborting\n");
-@@ -2544,21 +2586,18 @@ intel_dp_complete_link_train(struct intel_dp *intel_dp)
- 			break;
- 		}
- 
--		intel_dp_set_signal_levels(intel_dp, &DP);
--
--		/* channel eq pattern */
--		if (!intel_dp_set_link_train(intel_dp, DP,
--					     DP_TRAINING_PATTERN_2 |
--					     DP_LINK_SCRAMBLING_DISABLE))
--			break;
--
- 		drm_dp_link_train_channel_eq_delay(intel_dp->dpcd);
--		if (!intel_dp_get_link_status(intel_dp, link_status))
-+		if (!intel_dp_get_link_status(intel_dp, link_status)) {
-+			DRM_ERROR("failed to get link status\n");
- 			break;
-+		}
- 
- 		/* Make sure clock is still ok */
- 		if (!drm_dp_clock_recovery_ok(link_status, intel_dp->lane_count)) {
- 			intel_dp_start_link_train(intel_dp);
-+			intel_dp_set_link_train(intel_dp, &DP,
-+						DP_TRAINING_PATTERN_2 |
-+						DP_LINK_SCRAMBLING_DISABLE);
- 			cr_tries++;
- 			continue;
- 		}
-@@ -2572,13 +2611,19 @@ intel_dp_complete_link_train(struct intel_dp *intel_dp)
- 		if (tries > 5) {
- 			intel_dp_link_down(intel_dp);
- 			intel_dp_start_link_train(intel_dp);
-+			intel_dp_set_link_train(intel_dp, &DP,
-+						DP_TRAINING_PATTERN_2 |
-+						DP_LINK_SCRAMBLING_DISABLE);
- 			tries = 0;
- 			cr_tries++;
- 			continue;
- 		}
- 
--		/* Compute new intel_dp->train_set as requested by target */
--		intel_get_adjust_train(intel_dp, link_status);
-+		/* Update training set as requested by target */
-+		if (!intel_dp_update_link_train(intel_dp, &DP, link_status)) {
-+			DRM_ERROR("failed to update link training\n");
-+			break;
-+		}
- 		++tries;
- 	}
- 
-@@ -2593,7 +2638,7 @@ intel_dp_complete_link_train(struct intel_dp *intel_dp)
- 
- void intel_dp_stop_link_train(struct intel_dp *intel_dp)
- {
--	intel_dp_set_link_train(intel_dp, intel_dp->DP,
-+	intel_dp_set_link_train(intel_dp, &intel_dp->DP,
- 				DP_TRAINING_PATTERN_DISABLE);
- }
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0960-drm-i915-destroy-connector-sysfs-files-earlier.patch b/patches.baytrail/0960-drm-i915-destroy-connector-sysfs-files-earlier.patch
deleted file mode 100644
index 42d11464b7248..0000000000000
--- a/patches.baytrail/0960-drm-i915-destroy-connector-sysfs-files-earlier.patch
+++ /dev/null
@@ -1,178 +0,0 @@
-From 53a179a27894eaff518f8de54be07dcb47b0c9ff Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Thu, 26 Sep 2013 20:05:59 -0300
-Subject: drm/i915: destroy connector sysfs files earlier
-
-For some reason, every single time I try to run module_reload
-something tries to read the connector sysfs files. This happens
-after we destroy the encoders and before we destroy the connectors, so
-when the sysfs read triggers the connector detect() function,
-intel_conector->encoder points to memory that was already freed.
-
-The bad backtrace is just:
-    [<ffffffff8163ca9a>] dump_stack+0x54/0x74
-    [<ffffffffa00c2c8e>] intel_dp_detect+0x1e/0x4b0 [i915]
-    [<ffffffffa001913d>] status_show+0x3d/0x80 [drm]
-    [<ffffffff813d5340>] dev_attr_show+0x20/0x60
-    [<ffffffff81221f50>] ? sysfs_read_file+0x80/0x1b0
-    [<ffffffff81221f79>] sysfs_read_file+0xa9/0x1b0
-    [<ffffffff811aaf1e>] vfs_read+0x9e/0x170
-    [<ffffffff811aba4c>] SyS_read+0x4c/0xa0
-    [<ffffffff8164e392>] system_call_fastpath+0x16/0x1b
-
-But if you add tons of memory checking debug options to your Kernel
-you'll also see:
- - general protection fault: 0000
- - BUG kmalloc-4096 (Tainted: G      D W   ): Poison overwritten
- - INFO: Allocated in intel_ddi_init+0x65/0x270 [i915]
- - INFO: Freed in intel_dp_encoder_destroy+0x69/0xb0 [i915]
-Among a bunch of other error messages.
-
-So this commit just destroys the sysfs files before both the encoder
-and connectors are freed.
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit d9255d57147e1dbcebdf6670409c2fa0ac3609e6)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_crt.c     |    1 -
- drivers/gpu/drm/i915/intel_display.c |    5 +++++
- drivers/gpu/drm/i915/intel_dp.c      |    1 -
- drivers/gpu/drm/i915/intel_dsi.c     |    1 -
- drivers/gpu/drm/i915/intel_dvo.c     |    1 -
- drivers/gpu/drm/i915/intel_hdmi.c    |    1 -
- drivers/gpu/drm/i915/intel_lvds.c    |    1 -
- drivers/gpu/drm/i915/intel_sdvo.c    |    7 +++++--
- drivers/gpu/drm/i915/intel_tv.c      |    1 -
- 9 files changed, 10 insertions(+), 9 deletions(-)
-
---- a/drivers/gpu/drm/i915/intel_crt.c
-+++ b/drivers/gpu/drm/i915/intel_crt.c
-@@ -677,7 +677,6 @@ intel_crt_detect(struct drm_connector *c
- 
- static void intel_crt_destroy(struct drm_connector *connector)
- {
--	drm_sysfs_connector_remove(connector);
- 	drm_connector_cleanup(connector);
- 	kfree(connector);
- }
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -10729,6 +10729,7 @@ void intel_modeset_cleanup(struct drm_de
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct drm_crtc *crtc;
-+	struct drm_connector *connector;
- 
- 	/*
- 	 * Interrupts and polling as the first thing to avoid creating havoc.
-@@ -10771,6 +10772,10 @@ void intel_modeset_cleanup(struct drm_de
- 	/* destroy backlight, if any, before the connectors */
- 	intel_panel_destroy_backlight(dev);
- 
-+	/* destroy the sysfs files before encoders/connectors */
-+	list_for_each_entry(connector, &dev->mode_config.connector_list, head)
-+		drm_sysfs_connector_remove(connector);
-+
- 	drm_mode_config_cleanup(dev);
- 
- 	intel_cleanup_overlay(dev);
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -3213,7 +3213,6 @@ intel_dp_connector_destroy(struct drm_co
- 	if (connector->connector_type == DRM_MODE_CONNECTOR_eDP)
- 		intel_panel_fini(&intel_connector->panel);
- 
--	drm_sysfs_connector_remove(connector);
- 	drm_connector_cleanup(connector);
- 	kfree(connector);
- }
---- a/drivers/gpu/drm/i915/intel_dsi.c
-+++ b/drivers/gpu/drm/i915/intel_dsi.c
-@@ -504,7 +504,6 @@ static void intel_dsi_destroy(struct drm
- 
- 	DRM_DEBUG_KMS("\n");
- 	intel_panel_fini(&intel_connector->panel);
--	drm_sysfs_connector_remove(connector);
- 	drm_connector_cleanup(connector);
- 	kfree(connector);
- }
---- a/drivers/gpu/drm/i915/intel_dvo.c
-+++ b/drivers/gpu/drm/i915/intel_dvo.c
-@@ -367,7 +367,6 @@ static int intel_dvo_get_modes(struct dr
- 
- static void intel_dvo_destroy(struct drm_connector *connector)
- {
--	drm_sysfs_connector_remove(connector);
- 	drm_connector_cleanup(connector);
- 	kfree(connector);
- }
---- a/drivers/gpu/drm/i915/intel_hdmi.c
-+++ b/drivers/gpu/drm/i915/intel_hdmi.c
-@@ -1181,7 +1181,6 @@ static void intel_hdmi_post_disable(stru
- 
- static void intel_hdmi_destroy(struct drm_connector *connector)
- {
--	drm_sysfs_connector_remove(connector);
- 	drm_connector_cleanup(connector);
- 	kfree(connector);
- }
---- a/drivers/gpu/drm/i915/intel_lvds.c
-+++ b/drivers/gpu/drm/i915/intel_lvds.c
-@@ -474,7 +474,6 @@ static void intel_lvds_destroy(struct dr
- 
- 	intel_panel_fini(&lvds_connector->base.panel);
- 
--	drm_sysfs_connector_remove(connector);
- 	drm_connector_cleanup(connector);
- 	kfree(connector);
- }
---- a/drivers/gpu/drm/i915/intel_sdvo.c
-+++ b/drivers/gpu/drm/i915/intel_sdvo.c
-@@ -2009,7 +2009,6 @@ static void intel_sdvo_destroy(struct dr
- 				     intel_sdvo_connector->tv_format);
- 
- 	intel_sdvo_destroy_enhance_property(connector);
--	drm_sysfs_connector_remove(connector);
- 	drm_connector_cleanup(connector);
- 	kfree(intel_sdvo_connector);
- }
-@@ -2482,6 +2481,7 @@ intel_sdvo_tv_init(struct intel_sdvo *in
- 	return true;
- 
- err:
-+	drm_sysfs_connector_remove(connector);
- 	intel_sdvo_destroy(connector);
- 	return false;
- }
-@@ -2553,6 +2553,7 @@ intel_sdvo_lvds_init(struct intel_sdvo *
- 	return true;
- 
- err:
-+	drm_sysfs_connector_remove(connector);
- 	intel_sdvo_destroy(connector);
- 	return false;
- }
-@@ -2624,8 +2625,10 @@ static void intel_sdvo_output_cleanup(st
- 
- 	list_for_each_entry_safe(connector, tmp,
- 				 &dev->mode_config.connector_list, head) {
--		if (intel_attached_encoder(connector) == &intel_sdvo->base)
-+		if (intel_attached_encoder(connector) == &intel_sdvo->base) {
-+			drm_sysfs_connector_remove(connector);
- 			intel_sdvo_destroy(connector);
-+		}
- 	}
- }
- 
---- a/drivers/gpu/drm/i915/intel_tv.c
-+++ b/drivers/gpu/drm/i915/intel_tv.c
-@@ -1433,7 +1433,6 @@ intel_tv_get_modes(struct drm_connector
- static void
- intel_tv_destroy(struct drm_connector *connector)
- {
--	drm_sysfs_connector_remove(connector);
- 	drm_connector_cleanup(connector);
- 	kfree(connector);
- }
diff --git a/patches.baytrail/0961-drm-i915-Make-intel_resume_power_well-static.patch b/patches.baytrail/0961-drm-i915-Make-intel_resume_power_well-static.patch
deleted file mode 100644
index d9af997a5c00d..0000000000000
--- a/patches.baytrail/0961-drm-i915-Make-intel_resume_power_well-static.patch
+++ /dev/null
@@ -1,46 +0,0 @@
-From 6b58c9f5bb0309648c1169d9109dcf6bf47b18f0 Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Sat, 28 Sep 2013 16:46:56 +0100
-Subject: drm/i915: Make intel_resume_power_well() static
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 5134099089b539e18afb9d06313508317fb35504)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_drv.h | 1 -
- drivers/gpu/drm/i915/intel_pm.c  | 2 +-
- 2 files changed, 1 insertion(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index a17a86ac4e40..e6db0c67e0be 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -798,7 +798,6 @@ void intel_display_power_put(struct drm_device *dev,
- 			     enum intel_display_power_domain domain);
- void intel_init_power_well(struct drm_device *dev);
- void intel_set_power_well(struct drm_device *dev, bool enable);
--void intel_resume_power_well(struct drm_device *dev);
- void intel_enable_gt_powersave(struct drm_device *dev);
- void intel_disable_gt_powersave(struct drm_device *dev);
- void ironlake_teardown_rc6(struct drm_device *dev);
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 10054b58ee92..698257cf6381 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -5512,7 +5512,7 @@ void intel_set_power_well(struct drm_device *dev, bool enable)
- 	spin_unlock_irq(&power_well->lock);
- }
- 
--void intel_resume_power_well(struct drm_device *dev)
-+static void intel_resume_power_well(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct i915_power_well *power_well = &dev_priv->power_well;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0962-drm-i915-fix-typo-s-PatherPoint-PantherPoint.patch b/patches.baytrail/0962-drm-i915-fix-typo-s-PatherPoint-PantherPoint.patch
deleted file mode 100644
index e49561224fb1b..0000000000000
--- a/patches.baytrail/0962-drm-i915-fix-typo-s-PatherPoint-PantherPoint.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From a57f06d5bb9a5b2fcd0b60628a862a288a150532 Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Tue, 1 Oct 2013 12:12:33 +0300
-Subject: drm/i915: fix typo s/PatherPoint/PantherPoint/
-
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 492ab6697c9ff40be43591c8254cbb5b9753b1dc)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
-index 8ebb0d12e912..0fc96586acf3 100644
---- a/drivers/gpu/drm/i915/i915_drv.c
-+++ b/drivers/gpu/drm/i915/i915_drv.c
-@@ -416,7 +416,7 @@ void intel_detect_pch(struct drm_device *dev)
- 			} else if (id == INTEL_PCH_PPT_DEVICE_ID_TYPE) {
- 				/* PantherPoint is CPT compatible */
- 				dev_priv->pch_type = PCH_CPT;
--				DRM_DEBUG_KMS("Found PatherPoint PCH\n");
-+				DRM_DEBUG_KMS("Found PantherPoint PCH\n");
- 				WARN_ON(!(IS_GEN6(dev) || IS_IVYBRIDGE(dev)));
- 			} else if (id == INTEL_PCH_LPT_DEVICE_ID_TYPE) {
- 				dev_priv->pch_type = PCH_LPT;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0963-i915-vlv-untangle-integrated-clock-source-handling-v.patch b/patches.baytrail/0963-i915-vlv-untangle-integrated-clock-source-handling-v.patch
deleted file mode 100644
index bad34f69acf28..0000000000000
--- a/patches.baytrail/0963-i915-vlv-untangle-integrated-clock-source-handling-v.patch
+++ /dev/null
@@ -1,106 +0,0 @@
-From 1c018b872152a5da7a3b6c96d7ac02ebcfedeaeb Mon Sep 17 00:00:00 2001
-From: Jesse Barnes <jbarnes@virtuousgeek.org>
-Date: Tue, 1 Oct 2013 10:41:38 -0700
-Subject: i915/vlv: untangle integrated clock source handling v4
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The global integrated clock source bit resides in DPLL B on VLV, but we
-were treating it as a per-pipe resource.  It needs to be set whenever
-any PLL is active, so pull setting the bit out of vlv_update_pll and
-into vlv_enable_pll.  Also add a vlv_disable_pll to prevent disabling it
-when pipe B shuts down.
-
-I'm guessing on the references here, I expect this to bite any config
-where multiple displays are active or displays are moved from pipe to
-pipe.
-
-v2: re-add bits in vlv_update_pll to keep from confusing the state checker
-v3: use enum pipe checks (Daniel)
-    set CRI clock source early (Ville)
-    consistently set CRI clock source everywhere (Ville)
-v4: drop unnecessary setting of bit in vlv enable pll (Ville)
-
-References: https://bugs.freedesktop.org/show_bug.cgi?id=67245
-References: https://bugs.freedesktop.org/show_bug.cgi?id=69693
-Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-[danvet: s/1/PIPE_B/]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit f60711666bcab6df2c6c91d851e07ed54088453c)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 29 ++++++++++++++++++++++++++---
- 1 file changed, 26 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index c1a51399b9ec..bfa6a96e4e11 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -1466,6 +1466,20 @@ static void i9xx_disable_pll(struct drm_i915_private *dev_priv, enum pipe pipe)
- 	POSTING_READ(DPLL(pipe));
- }
- 
-+static void vlv_disable_pll(struct drm_i915_private *dev_priv, enum pipe pipe)
-+{
-+	u32 val = 0;
-+
-+	/* Make sure the pipe isn't still relying on us */
-+	assert_pipe_disabled(dev_priv, pipe);
-+
-+	/* Leave integrated clock source enabled */
-+	if (pipe == PIPE_B)
-+		val = DPLL_INTEGRATED_CRI_CLK_VLV;
-+	I915_WRITE(DPLL(pipe), val);
-+	POSTING_READ(DPLL(pipe));
-+}
-+
- void vlv_wait_port_ready(struct drm_i915_private *dev_priv, int port)
- {
- 	u32 port_mask;
-@@ -3875,7 +3889,9 @@ static void i9xx_crtc_disable(struct drm_crtc *crtc)
- 		if (encoder->post_disable)
- 			encoder->post_disable(encoder);
- 
--	if (!intel_pipe_has_type(crtc, INTEL_OUTPUT_DSI))
-+	if (IS_VALLEYVIEW(dev) && !intel_pipe_has_type(crtc, INTEL_OUTPUT_DSI))
-+		vlv_disable_pll(dev_priv, pipe);
-+	else if (!IS_VALLEYVIEW(dev))
- 		i9xx_disable_pll(dev_priv, pipe);
- 
- 	intel_crtc->active = false;
-@@ -4611,9 +4627,9 @@ static void vlv_update_pll(struct intel_crtc *crtc)
- 	/* Enable DPIO clock input */
- 	dpll = DPLL_EXT_BUFFER_ENABLE_VLV | DPLL_REFA_CLK_ENABLE_VLV |
- 		DPLL_VGA_MODE_DIS | DPLL_INTEGRATED_CLOCK_VLV;
--	if (pipe)
-+	/* We should never disable this, set it here for state tracking */
-+	if (pipe == PIPE_B)
- 		dpll |= DPLL_INTEGRATED_CRI_CLK_VLV;
--
- 	dpll |= DPLL_VCO_ENABLE;
- 	crtc->config.dpll_hw_state.dpll = dpll;
- 
-@@ -10279,10 +10295,17 @@ void i915_disable_vga_mem(struct drm_device *dev)
- 
- void intel_modeset_init_hw(struct drm_device *dev)
- {
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+
- 	intel_prepare_ddi(dev);
- 
- 	intel_init_clock_gating(dev);
- 
-+	/* Enable the CRI clock source so we can get at the display */
-+	if (IS_VALLEYVIEW(dev))
-+		I915_WRITE(DPLL(PIPE_B), I915_READ(DPLL(PIPE_B)) |
-+			   DPLL_INTEGRATED_CRI_CLK_VLV);
-+
- 	mutex_lock(&dev->struct_mutex);
- 	intel_enable_gt_powersave(dev);
- 	mutex_unlock(&dev->struct_mutex);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0964-drm-i915-Disable-enable-planes-as-the-first-last-thi.patch b/patches.baytrail/0964-drm-i915-Disable-enable-planes-as-the-first-last-thi.patch
deleted file mode 100644
index b3b9272769c1c..0000000000000
--- a/patches.baytrail/0964-drm-i915-Disable-enable-planes-as-the-first-last-thi.patch
+++ /dev/null
@@ -1,156 +0,0 @@
-From ea289dfd1af1783c2055dd204575087f67118724 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Thu, 19 Sep 2013 17:00:37 -0300
-Subject: drm/i915: Disable/enable planes as the first/last thing during
- modeset on HSW
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Refactor the plane enabling/disabling into helper functions and move
-the calls to happen as the first thing during .crtc_disable, and the
-last thing during .crtc_enable.
-
-Those are the two clear points where we are sure that the pipe is
-actually running regardless of the encoder type or hardware
-generation.
-
-v2: Made by Paulo:
-  Remove the code touching everything but the Haswell functions. We
-  need this change on Haswell right now since it fixes a FIFO underrun
-  that we get on pipe A while we enable pipe B (see the workaround
-  notes on the Haswell mode set sequence documentation). We can bring
-  back the code to gens 2-7 later, once they're tested.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit dda9a66a818d32cbf5c4ecd817456fb6a3b39ec1)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 69 +++++++++++++++++++++++-------------
- 1 file changed, 45 insertions(+), 24 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index bfa6a96e4e11..a954c0137b53 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -3453,6 +3453,47 @@ static bool hsw_crtc_supports_ips(struct intel_crtc *crtc)
- 	return HAS_IPS(crtc->base.dev) && crtc->pipe == PIPE_A;
- }
- 
-+static void haswell_crtc_enable_planes(struct drm_crtc *crtc)
-+{
-+	struct drm_device *dev = crtc->dev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
-+	int pipe = intel_crtc->pipe;
-+	int plane = intel_crtc->plane;
-+
-+	intel_enable_plane(dev_priv, plane, pipe);
-+	intel_enable_planes(crtc);
-+	intel_crtc_update_cursor(crtc, true);
-+
-+	hsw_enable_ips(intel_crtc);
-+
-+	mutex_lock(&dev->struct_mutex);
-+	intel_update_fbc(dev);
-+	mutex_unlock(&dev->struct_mutex);
-+}
-+
-+static void haswell_crtc_disable_planes(struct drm_crtc *crtc)
-+{
-+	struct drm_device *dev = crtc->dev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
-+	int pipe = intel_crtc->pipe;
-+	int plane = intel_crtc->plane;
-+
-+	intel_crtc_wait_for_pending_flips(crtc);
-+	drm_vblank_off(dev, pipe);
-+
-+	/* FBC must be disabled before disabling the plane on HSW. */
-+	if (dev_priv->fbc.plane == plane)
-+		intel_disable_fbc(dev);
-+
-+	hsw_disable_ips(intel_crtc);
-+
-+	intel_crtc_update_cursor(crtc, false);
-+	intel_disable_planes(crtc);
-+	intel_disable_plane(dev_priv, plane, pipe);
-+}
-+
- static void haswell_crtc_enable(struct drm_crtc *crtc)
- {
- 	struct drm_device *dev = crtc->dev;
-@@ -3460,7 +3501,6 @@ static void haswell_crtc_enable(struct drm_crtc *crtc)
- 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
- 	struct intel_encoder *encoder;
- 	int pipe = intel_crtc->pipe;
--	int plane = intel_crtc->plane;
- 
- 	WARN_ON(!crtc->enabled);
- 
-@@ -3496,24 +3536,17 @@ static void haswell_crtc_enable(struct drm_crtc *crtc)
- 	intel_update_watermarks(crtc);
- 	intel_enable_pipe(dev_priv, pipe,
- 			  intel_crtc->config.has_pch_encoder, false);
--	intel_enable_plane(dev_priv, plane, pipe);
--	intel_enable_planes(crtc);
--	intel_crtc_update_cursor(crtc, true);
--
--	hsw_enable_ips(intel_crtc);
- 
- 	if (intel_crtc->config.has_pch_encoder)
- 		lpt_pch_enable(crtc);
- 
--	mutex_lock(&dev->struct_mutex);
--	intel_update_fbc(dev);
--	mutex_unlock(&dev->struct_mutex);
--
- 	for_each_encoder_on_crtc(dev, crtc, encoder) {
- 		encoder->enable(encoder);
- 		intel_opregion_notify_encoder(encoder, true);
- 	}
- 
-+	haswell_crtc_enable_planes(crtc);
-+
- 	/*
- 	 * There seems to be a race in PCH platform hw (at least on some
- 	 * outputs) where an enabled pipe still completes any pageflip right
-@@ -3620,30 +3653,18 @@ static void haswell_crtc_disable(struct drm_crtc *crtc)
- 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
- 	struct intel_encoder *encoder;
- 	int pipe = intel_crtc->pipe;
--	int plane = intel_crtc->plane;
- 	enum transcoder cpu_transcoder = intel_crtc->config.cpu_transcoder;
- 
- 	if (!intel_crtc->active)
- 		return;
- 
-+	haswell_crtc_disable_planes(crtc);
-+
- 	for_each_encoder_on_crtc(dev, crtc, encoder) {
- 		intel_opregion_notify_encoder(encoder, false);
- 		encoder->disable(encoder);
- 	}
- 
--	intel_crtc_wait_for_pending_flips(crtc);
--	drm_vblank_off(dev, pipe);
--
--	/* FBC must be disabled before disabling the plane on HSW. */
--	if (dev_priv->fbc.plane == plane)
--		intel_disable_fbc(dev);
--
--	hsw_disable_ips(intel_crtc);
--
--	intel_crtc_update_cursor(crtc, false);
--	intel_disable_planes(crtc);
--	intel_disable_plane(dev_priv, plane, pipe);
--
- 	if (intel_crtc->config.has_pch_encoder)
- 		intel_set_pch_fifo_underrun_reporting(dev, TRANSCODER_A, false);
- 	intel_disable_pipe(dev_priv, pipe);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0965-drm-i915-implement-the-Haswell-mode-set-sequence-wor.patch b/patches.baytrail/0965-drm-i915-implement-the-Haswell-mode-set-sequence-wor.patch
deleted file mode 100644
index eb64d8931109e..0000000000000
--- a/patches.baytrail/0965-drm-i915-implement-the-Haswell-mode-set-sequence-wor.patch
+++ /dev/null
@@ -1,78 +0,0 @@
-From ff9cee101553353772f69b775afc740c1a933e52 Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Fri, 20 Sep 2013 16:21:19 -0300
-Subject: drm/i915: implement the Haswell mode set sequence workaround
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-This workaround is described in the mode set sequence documentation.
-When enabling planes for the second pipe, we need to wait for 2
-vblanks on the first pipe. This should solve "a flash of screen
-corruption if planes are enabled on second/third pipe during the time
-that big FIFO mode is exiting". Watermarks are fun :)
-
-v2: Save indentation levels
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit e4916946b8f28dfe2c79f613cb076a5de58d79c2)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 32 ++++++++++++++++++++++++++++++++
- 1 file changed, 32 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index a954c0137b53..4d2dc0b2b057 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -3494,6 +3494,35 @@ static void haswell_crtc_disable_planes(struct drm_crtc *crtc)
- 	intel_disable_plane(dev_priv, plane, pipe);
- }
- 
-+/*
-+ * This implements the workaround described in the "notes" section of the mode
-+ * set sequence documentation. When going from no pipes or single pipe to
-+ * multiple pipes, and planes are enabled after the pipe, we need to wait at
-+ * least 2 vblanks on the first pipe before enabling planes on the second pipe.
-+ */
-+static void haswell_mode_set_planes_workaround(struct intel_crtc *crtc)
-+{
-+	struct drm_device *dev = crtc->base.dev;
-+	struct intel_crtc *crtc_it, *other_active_crtc = NULL;
-+
-+	/* We want to get the other_active_crtc only if there's only 1 other
-+	 * active crtc. */
-+	list_for_each_entry(crtc_it, &dev->mode_config.crtc_list, base.head) {
-+		if (!crtc_it->active || crtc_it == crtc)
-+			continue;
-+
-+		if (other_active_crtc)
-+			return;
-+
-+		other_active_crtc = crtc_it;
-+	}
-+	if (!other_active_crtc)
-+		return;
-+
-+	intel_wait_for_vblank(dev, other_active_crtc->pipe);
-+	intel_wait_for_vblank(dev, other_active_crtc->pipe);
-+}
-+
- static void haswell_crtc_enable(struct drm_crtc *crtc)
- {
- 	struct drm_device *dev = crtc->dev;
-@@ -3545,6 +3574,9 @@ static void haswell_crtc_enable(struct drm_crtc *crtc)
- 		intel_opregion_notify_encoder(encoder, true);
- 	}
- 
-+	/* If we change the relative order between pipe/planes enabling, we need
-+	 * to change the workaround. */
-+	haswell_mode_set_planes_workaround(intel_crtc);
- 	haswell_crtc_enable_planes(crtc);
- 
- 	/*
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0966-drm-i915-Don-t-populate-pipe_src_-w-h-multiple-times.patch b/patches.baytrail/0966-drm-i915-Don-t-populate-pipe_src_-w-h-multiple-times.patch
deleted file mode 100644
index b0ad63043235b..0000000000000
--- a/patches.baytrail/0966-drm-i915-Don-t-populate-pipe_src_-w-h-multiple-times.patch
+++ /dev/null
@@ -1,60 +0,0 @@
-From bcba0684dc4d19c3cdfb0d090bfa031386e627dc Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Tue, 1 Oct 2013 22:52:14 +0300
-Subject: drm/i915: Don't populate pipe_src_{w,h} multiple times
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-If we ever end up doing the retry loop due to bandwidth constraints, we
-would rewrite pipe_src_{w,n} based on adjusted_mode timings. But by that
-time the encoder may have already replaced the adjusted_mode with a
-fixed panel mode, which would then corrupt pipe_src_{w,h}.
-
-v2: Use requested_mode and slap on a big comment from Daniel
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit e41a56be017c6e2891603c678ef2187c437d4414)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 16 ++++++++++++----
- 1 file changed, 12 insertions(+), 4 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 4d2dc0b2b057..3e2c6a464b91 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -8529,6 +8529,18 @@ intel_modeset_pipe_config(struct drm_crtc *crtc,
- 	if (plane_bpp < 0)
- 		goto fail;
- 
-+	/*
-+	 * Determine the real pipe dimensions. Note that stereo modes can
-+	 * increase the actual pipe size due to the frame doubling and
-+	 * insertion of additional space for blanks between the frame. This
-+	 * is stored in the crtc timings. We use the requested mode to do this
-+	 * computation to clearly distinguish it from the adjusted mode, which
-+	 * can be changed by the connectors in the below retry loop.
-+	 */
-+	drm_mode_set_crtcinfo(&pipe_config->requested_mode, CRTC_STEREO_DOUBLE);
-+	pipe_config->pipe_src_w = pipe_config->requested_mode.crtc_hdisplay;
-+	pipe_config->pipe_src_h = pipe_config->requested_mode.crtc_vdisplay;
-+
- encoder_retry:
- 	/* Ensure the port clock defaults are reset when retrying. */
- 	pipe_config->port_clock = 0;
-@@ -8537,10 +8549,6 @@ encoder_retry:
- 	/* Fill in default crtc timings, allow encoders to overwrite them. */
- 	drm_mode_set_crtcinfo(&pipe_config->adjusted_mode, CRTC_STEREO_DOUBLE);
- 
--	/* set_crtcinfo() may have adjusted hdisplay/vdisplay */
--	pipe_config->pipe_src_w = pipe_config->adjusted_mode.crtc_hdisplay;
--	pipe_config->pipe_src_h = pipe_config->adjusted_mode.crtc_vdisplay;
--
- 	/* Pass our mode to the connectors and the CRTC to give them a chance to
- 	 * adjust it according to limitations or connector properties, and also
- 	 * a chance to reject the mode entirely.
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0967-drm-i915-Clean-up-the-ring-scaling-calculations.patch b/patches.baytrail/0967-drm-i915-Clean-up-the-ring-scaling-calculations.patch
deleted file mode 100644
index f3b679c6a6455..0000000000000
--- a/patches.baytrail/0967-drm-i915-Clean-up-the-ring-scaling-calculations.patch
+++ /dev/null
@@ -1,63 +0,0 @@
-From 77b6547986ad3248c036fa1725e5c647d6908fcb Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <benjamin.widawsky@intel.com>
-Date: Wed, 2 Oct 2013 09:25:02 -0700
-Subject: drm/i915: Clean up the ring scaling calculations
-
-This patch attempts to clean up the ring/IA scaling programming in the
-following ways.
-1. Fix the comment about the DDR frequency. The math is 266MHz, not
-133MHz. Formula was right, docs are wrong.
-
-2. Mask the DCLK register since I don't know how it is defined on future
-platforms.
-
-3. use mult_frac instead of magic math.
-
-This helps for future platform enabling.
-
-v2: Actually use the right patch. The v1 was a mix of things, none of
-which was right. Note that due to rounding, we actually get different
-values (slightly higher) for the effective ring frequency.
-
-v3: Use 1.25 instead of 1.33 as the original code did. (Jesse)
-
-CC: Jesse Barnes <jbarnes@virtuousgeek.org>
-CC: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit f6aca45c060d43db083a5ae34ac6ad3bbefe81da)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 8 ++++----
- 1 file changed, 4 insertions(+), 4 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 698257cf6381..9753bd9591eb 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -3663,9 +3663,9 @@ void gen6_update_ring_freq(struct drm_device *dev)
- 	/* Convert from kHz to MHz */
- 	max_ia_freq /= 1000;
- 
--	min_ring_freq = I915_READ(MCHBAR_MIRROR_BASE_SNB + DCLK);
--	/* convert DDR frequency from units of 133.3MHz to bandwidth */
--	min_ring_freq = (2 * 4 * min_ring_freq + 2) / 3;
-+	min_ring_freq = I915_READ(MCHBAR_MIRROR_BASE_SNB + DCLK) & 0xf;
-+	/* convert DDR frequency from units of 266.6MHz to bandwidth */
-+	min_ring_freq = mult_frac(min_ring_freq, 8, 3);
- 
- 	/*
- 	 * For each potential GPU frequency, load a ring frequency we'd like
-@@ -3678,7 +3678,7 @@ void gen6_update_ring_freq(struct drm_device *dev)
- 		unsigned int ia_freq = 0, ring_freq = 0;
- 
- 		if (IS_HASWELL(dev)) {
--			ring_freq = (gpu_freq * 5 + 3) / 4;
-+			ring_freq = mult_frac(gpu_freq, 5, 4);
- 			ring_freq = max(min_ring_freq, ring_freq);
- 			/* leave ia_freq as the default, chosen by cpufreq */
- 		} else {
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0968-drm-i915-Add-some-missing-steps-to-i915_driver_load-.patch b/patches.baytrail/0968-drm-i915-Add-some-missing-steps-to-i915_driver_load-.patch
deleted file mode 100644
index 225b96cdacf35..0000000000000
--- a/patches.baytrail/0968-drm-i915-Add-some-missing-steps-to-i915_driver_load-.patch
+++ /dev/null
@@ -1,86 +0,0 @@
-From a4c0d0edf62d183a229e2517ddc0a4f8b0cf0985 Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Mon, 23 Sep 2013 17:33:20 -0300
-Subject: drm/i915: Add some missing steps to i915_driver_load error path
-
-We missed adding a few cleanup steps for recent additions.
-
-Reviewer:  Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit cbb47d179fb345c579cd8cd884693903fceed26a)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_dma.c |   19 +++++++++++++++----
- 1 file changed, 15 insertions(+), 4 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_dma.c
-+++ b/drivers/gpu/drm/i915/i915_dma.c
-@@ -1569,7 +1569,7 @@ int i915_driver_load(struct drm_device *
- 
- 	ret = i915_gem_gtt_init(dev);
- 	if (ret)
--		goto put_bridge;
-+		goto out_regs;
- 
- 	if (drm_core_check_feature(dev, DRIVER_MODESET))
- 		i915_kick_out_firmware_fb(dev_priv);
-@@ -1598,7 +1598,7 @@ int i915_driver_load(struct drm_device *
- 				     aperture_size);
- 	if (dev_priv->gtt.mappable == NULL) {
- 		ret = -EIO;
--		goto out_rmmap;
-+		goto out_gtt;
- 	}
- 
- 	dev_priv->gtt.mtrr = arch_phys_wc_add(dev_priv->gtt.mappable_base,
-@@ -1672,7 +1672,7 @@ int i915_driver_load(struct drm_device *
- 		ret = i915_load_modeset_init(dev);
- 		if (ret < 0) {
- 			DRM_ERROR("failed to init modeset\n");
--			goto out_gem_unload;
-+			goto out_power_well;
- 		}
- 	} else {
- 		/* Start out suspended in ums mode. */
-@@ -1692,6 +1692,10 @@ int i915_driver_load(struct drm_device *
- 
- 	return 0;
- 
-+out_power_well:
-+	if (HAS_POWER_WELL(dev))
-+		i915_remove_power_well(dev);
-+	drm_vblank_cleanup(dev);
- out_gem_unload:
- 	if (dev_priv->mm.inactive_shrinker.shrink)
- 		unregister_shrinker(&dev_priv->mm.inactive_shrinker);
-@@ -1706,12 +1710,17 @@ out_gem_unload:
- out_mtrrfree:
- 	arch_phys_wc_del(dev_priv->gtt.mtrr);
- 	io_mapping_free(dev_priv->gtt.mappable);
-+out_gtt:
-+	list_del(&dev_priv->gtt.base.global_link);
-+	drm_mm_takedown(&dev_priv->gtt.base.mm);
- 	dev_priv->gtt.base.cleanup(&dev_priv->gtt.base);
--out_rmmap:
-+out_regs:
- 	pci_iounmap(dev->pdev, dev_priv->regs);
- put_bridge:
- 	pci_dev_put(dev_priv->bridge_dev);
- free_priv:
-+	if (dev_priv->slab)
-+		kmem_cache_destroy(dev_priv->slab);
- 	kfree(dev_priv);
- 	return ret;
- }
-@@ -1802,6 +1811,8 @@ int i915_driver_unload(struct drm_device
- 	WARN_ON(!list_empty(&dev_priv->vm_list));
- 	drm_mm_takedown(&dev_priv->gtt.base.mm);
- 
-+	drm_vblank_cleanup(dev);
-+
- 	intel_teardown_gmbus(dev);
- 	intel_teardown_mchbar(dev);
- 
diff --git a/patches.baytrail/0969-drm-i915-Fix-__wait_seqno-to-use-true-infinite-timeo.patch b/patches.baytrail/0969-drm-i915-Fix-__wait_seqno-to-use-true-infinite-timeo.patch
deleted file mode 100644
index 8a2444167885c..0000000000000
--- a/patches.baytrail/0969-drm-i915-Fix-__wait_seqno-to-use-true-infinite-timeo.patch
+++ /dev/null
@@ -1,349 +0,0 @@
-From 587a17640f431c364afc4d24a2aab6a834f4b276 Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Wed, 25 Sep 2013 17:34:55 +0100
-Subject: drm/i915: Fix __wait_seqno to use true infinite timeouts
-
-When we switched to always using a timeout in conjunction with
-wait_seqno, we lost the ability to detect missed interrupts. Since, we
-have had issues with interrupts on a number of generations, and they are
-required to be delivered in a timely fashion for a smooth UX, it is
-important that we do log errors found in the wild and prevent the
-display stalling for upwards of 1s every time the seqno interrupt is
-missed.
-
-Rather than continue to fix up the timeouts to work around the interface
-impedence in wait_event_*(), open code the combination of
-wait_event[_interruptible][_timeout], and use the exposed timer to
-poll for seqno should we detect a lost interrupt.
-
-v2: In order to satisfy the debug requirement of logging missed
-interrupts with the real world requirments of making machines work even
-if interrupts are hosed, we revert to polling after detecting a missed
-interrupt.
-
-v3: Throw in a debugfs interface to simulate broken hw not reporting
-interrupts.
-
-v4: s/EGAIN/EAGAIN/ (Imre)
-
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Reviewed-by: Imre Deak <imre.deak@intel.com>
-[danvet: Don't use the struct typedef in new code.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit 094f9a54e35500739da185cdb78f2e92fc379458)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_debugfs.c   |  68 ++++++++++++++++++++
- drivers/gpu/drm/i915/i915_drv.h       |   6 ++
- drivers/gpu/drm/i915/i915_gem.c       | 114 ++++++++++++++++++++--------------
- drivers/gpu/drm/i915/i915_gpu_error.c |   1 +
- drivers/gpu/drm/i915/i915_irq.c       |  11 ++--
- 5 files changed, 149 insertions(+), 51 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
-index fcfa98844ccc..bc5c04d5890f 100644
---- a/drivers/gpu/drm/i915/i915_debugfs.c
-+++ b/drivers/gpu/drm/i915/i915_debugfs.c
-@@ -1897,6 +1897,72 @@ DEFINE_SIMPLE_ATTRIBUTE(i915_ring_stop_fops,
- 			i915_ring_stop_get, i915_ring_stop_set,
- 			"0x%08llx\n");
- 
-+static int
-+i915_ring_missed_irq_get(void *data, u64 *val)
-+{
-+	struct drm_device *dev = data;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+
-+	*val = dev_priv->gpu_error.missed_irq_rings;
-+	return 0;
-+}
-+
-+static int
-+i915_ring_missed_irq_set(void *data, u64 val)
-+{
-+	struct drm_device *dev = data;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	int ret;
-+
-+	/* Lock against concurrent debugfs callers */
-+	ret = mutex_lock_interruptible(&dev->struct_mutex);
-+	if (ret)
-+		return ret;
-+	dev_priv->gpu_error.missed_irq_rings = val;
-+	mutex_unlock(&dev->struct_mutex);
-+
-+	return 0;
-+}
-+
-+DEFINE_SIMPLE_ATTRIBUTE(i915_ring_missed_irq_fops,
-+			i915_ring_missed_irq_get, i915_ring_missed_irq_set,
-+			"0x%08llx\n");
-+
-+static int
-+i915_ring_test_irq_get(void *data, u64 *val)
-+{
-+	struct drm_device *dev = data;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+
-+	*val = dev_priv->gpu_error.test_irq_rings;
-+
-+	return 0;
-+}
-+
-+static int
-+i915_ring_test_irq_set(void *data, u64 val)
-+{
-+	struct drm_device *dev = data;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	int ret;
-+
-+	DRM_DEBUG_DRIVER("Masking interrupts on rings 0x%08llx\n", val);
-+
-+	/* Lock against concurrent debugfs callers */
-+	ret = mutex_lock_interruptible(&dev->struct_mutex);
-+	if (ret)
-+		return ret;
-+
-+	dev_priv->gpu_error.test_irq_rings = val;
-+	mutex_unlock(&dev->struct_mutex);
-+
-+	return 0;
-+}
-+
-+DEFINE_SIMPLE_ATTRIBUTE(i915_ring_test_irq_fops,
-+			i915_ring_test_irq_get, i915_ring_test_irq_set,
-+			"0x%08llx\n");
-+
- #define DROP_UNBOUND 0x1
- #define DROP_BOUND 0x2
- #define DROP_RETIRE 0x4
-@@ -2290,6 +2356,8 @@ static struct i915_debugfs_files {
- 	{"i915_min_freq", &i915_min_freq_fops},
- 	{"i915_cache_sharing", &i915_cache_sharing_fops},
- 	{"i915_ring_stop", &i915_ring_stop_fops},
-+	{"i915_ring_missed_irq", &i915_ring_missed_irq_fops},
-+	{"i915_ring_test_irq", &i915_ring_test_irq_fops},
- 	{"i915_gem_drop_caches", &i915_drop_caches_fops},
- 	{"i915_error_state", &i915_error_state_fops},
- 	{"i915_next_seqno", &i915_next_seqno_fops},
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 08e96a8c01aa..79bbcf925e4a 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1013,6 +1013,9 @@ struct i915_gpu_error {
- 	struct drm_i915_error_state *first_error;
- 	struct work_struct work;
- 
-+
-+	unsigned long missed_irq_rings;
-+
- 	/**
- 	 * State variable and reset counter controlling the reset flow
- 	 *
-@@ -1051,6 +1054,9 @@ struct i915_gpu_error {
- 
- 	/* For gpu hang simulation. */
- 	unsigned int stop_rings;
-+
-+	/* For missed irq/seqno simulation. */
-+	unsigned int test_irq_rings;
- };
- 
- enum modeset_restore {
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index 5ff2338b811b..6ee80f4e80ce 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -969,6 +969,17 @@ i915_gem_check_olr(struct intel_ring_buffer *ring, u32 seqno)
- 	return ret;
- }
- 
-+static void fake_irq(unsigned long data)
-+{
-+	wake_up_process((struct task_struct *)data);
-+}
-+
-+static bool missed_irq(struct drm_i915_private *dev_priv,
-+		       struct intel_ring_buffer *ring)
-+{
-+	return test_bit(ring->id, &dev_priv->gpu_error.missed_irq_rings);
-+}
-+
- /**
-  * __wait_seqno - wait until execution of seqno has finished
-  * @ring: the ring expected to report seqno
-@@ -992,10 +1003,9 @@ static int __wait_seqno(struct intel_ring_buffer *ring, u32 seqno,
- 			bool interruptible, struct timespec *timeout)
- {
- 	drm_i915_private_t *dev_priv = ring->dev->dev_private;
--	struct timespec before, now, wait_time={1,0};
--	unsigned long timeout_jiffies;
--	long end;
--	bool wait_forever = true;
-+	struct timespec before, now;
-+	DEFINE_WAIT(wait);
-+	long timeout_jiffies;
- 	int ret;
- 
- 	WARN(dev_priv->pc8.irqs_disabled, "IRQs disabled\n");
-@@ -1003,51 +1013,71 @@ static int __wait_seqno(struct intel_ring_buffer *ring, u32 seqno,
- 	if (i915_seqno_passed(ring->get_seqno(ring, true), seqno))
- 		return 0;
- 
--	trace_i915_gem_request_wait_begin(ring, seqno);
--
--	if (timeout != NULL) {
--		wait_time = *timeout;
--		wait_forever = false;
--	}
--
--	timeout_jiffies = timespec_to_jiffies_timeout(&wait_time);
-+	timeout_jiffies = timeout ? timespec_to_jiffies_timeout(timeout) : 1;
- 
--	if (WARN_ON(!ring->irq_get(ring)))
-+	if (!(dev_priv->gpu_error.test_irq_rings & intel_ring_flag(ring)) &&
-+	    WARN_ON(!ring->irq_get(ring)))
- 		return -ENODEV;
- 
--	/* Record current time in case interrupted by signal, or wedged * */
-+	/* Record current time in case interrupted by signal, or wedged */
-+	trace_i915_gem_request_wait_begin(ring, seqno);
- 	getrawmonotonic(&before);
-+	for (;;) {
-+		struct timer_list timer;
-+		unsigned long expire;
- 
--#define EXIT_COND \
--	(i915_seqno_passed(ring->get_seqno(ring, false), seqno) || \
--	 i915_reset_in_progress(&dev_priv->gpu_error) || \
--	 reset_counter != atomic_read(&dev_priv->gpu_error.reset_counter))
--	do {
--		if (interruptible)
--			end = wait_event_interruptible_timeout(ring->irq_queue,
--							       EXIT_COND,
--							       timeout_jiffies);
--		else
--			end = wait_event_timeout(ring->irq_queue, EXIT_COND,
--						 timeout_jiffies);
-+		prepare_to_wait(&ring->irq_queue, &wait,
-+				interruptible ? TASK_INTERRUPTIBLE : TASK_UNINTERRUPTIBLE);
- 
- 		/* We need to check whether any gpu reset happened in between
- 		 * the caller grabbing the seqno and now ... */
--		if (reset_counter != atomic_read(&dev_priv->gpu_error.reset_counter))
--			end = -EAGAIN;
-+		if (reset_counter != atomic_read(&dev_priv->gpu_error.reset_counter)) {
-+			/* ... but upgrade the -EAGAIN to an -EIO if the gpu
-+			 * is truely gone. */
-+			ret = i915_gem_check_wedge(&dev_priv->gpu_error, interruptible);
-+			if (ret == 0)
-+				ret = -EAGAIN;
-+			break;
-+		}
- 
--		/* ... but upgrade the -EGAIN to an -EIO if the gpu is truely
--		 * gone. */
--		ret = i915_gem_check_wedge(&dev_priv->gpu_error, interruptible);
--		if (ret)
--			end = ret;
--	} while (end == 0 && wait_forever);
-+		if (i915_seqno_passed(ring->get_seqno(ring, false), seqno)) {
-+			ret = 0;
-+			break;
-+		}
-+
-+		if (interruptible && signal_pending(current)) {
-+			ret = -ERESTARTSYS;
-+			break;
-+		}
-+
-+		if (timeout_jiffies <= 0) {
-+			ret = -ETIME;
-+			break;
-+		}
- 
-+		timer.function = NULL;
-+		if (timeout || missed_irq(dev_priv, ring)) {
-+			setup_timer_on_stack(&timer, fake_irq, (unsigned long)current);
-+			expire = jiffies + (missed_irq(dev_priv, ring) ? 1: timeout_jiffies);
-+			mod_timer(&timer, expire);
-+		}
-+
-+		schedule();
-+
-+		if (timeout)
-+			timeout_jiffies = expire - jiffies;
-+
-+		if (timer.function) {
-+			del_singleshot_timer_sync(&timer);
-+			destroy_timer_on_stack(&timer);
-+		}
-+	}
- 	getrawmonotonic(&now);
-+	trace_i915_gem_request_wait_end(ring, seqno);
- 
- 	ring->irq_put(ring);
--	trace_i915_gem_request_wait_end(ring, seqno);
--#undef EXIT_COND
-+
-+	finish_wait(&ring->irq_queue, &wait);
- 
- 	if (timeout) {
- 		struct timespec sleep_time = timespec_sub(now, before);
-@@ -1056,17 +1086,7 @@ static int __wait_seqno(struct intel_ring_buffer *ring, u32 seqno,
- 			set_normalized_timespec(timeout, 0, 0);
- 	}
- 
--	switch (end) {
--	case -EIO:
--	case -EAGAIN: /* Wedged */
--	case -ERESTARTSYS: /* Signal */
--		return (int)end;
--	case 0: /* Timeout */
--		return -ETIME;
--	default: /* Completed */
--		WARN_ON(end < 0); /* We're not aware of other errors */
--		return 0;
--	}
-+	return ret;
- }
- 
- /**
-diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
-index 0a49b651e510..da1022a328e3 100644
---- a/drivers/gpu/drm/i915/i915_gpu_error.c
-+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
-@@ -311,6 +311,7 @@ int i915_error_state_to_str(struct drm_i915_error_state_buf *m,
- 	err_printf(m, "FORCEWAKE: 0x%08x\n", error->forcewake);
- 	err_printf(m, "DERRMR: 0x%08x\n", error->derrmr);
- 	err_printf(m, "CCID: 0x%08x\n", error->ccid);
-+	err_printf(m, "Missed interrupts: 0x%08lx\n", dev_priv->gpu_error.missed_irq_rings);
- 
- 	for (i = 0; i < dev_priv->num_fence_regs; i++)
- 		err_printf(m, "  fence[%d] = %08llx\n", i, error->fence[i]);
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index 84b7efc6ee91..05c05a6a4360 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -2039,10 +2039,13 @@ static void i915_hangcheck_elapsed(unsigned long data)
- 
- 				if (waitqueue_active(&ring->irq_queue)) {
- 					/* Issue a wake-up to catch stuck h/w. */
--					DRM_ERROR("Hangcheck timer elapsed... %s idle\n",
--						  ring->name);
--					wake_up_all(&ring->irq_queue);
--					ring->hangcheck.score += HUNG;
-+					if (!test_and_set_bit(ring->id, &dev_priv->gpu_error.missed_irq_rings)) {
-+						DRM_ERROR("Hangcheck timer elapsed... %s idle\n",
-+							  ring->name);
-+						wake_up_all(&ring->irq_queue);
-+					}
-+					/* Safeguard against driver failure */
-+					ring->hangcheck.score += BUSY;
- 				} else
- 					busy = false;
- 			} else {
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0970-drm-i915-Boost-RPS-frequency-for-CPU-stalls.patch b/patches.baytrail/0970-drm-i915-Boost-RPS-frequency-for-CPU-stalls.patch
deleted file mode 100644
index b1be78ea5cc6d..0000000000000
--- a/patches.baytrail/0970-drm-i915-Boost-RPS-frequency-for-CPU-stalls.patch
+++ /dev/null
@@ -1,554 +0,0 @@
-From cdb746eb29c2c2311e08b7f33d5ff1910e19c7bc Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Wed, 25 Sep 2013 17:34:56 +0100
-Subject: drm/i915: Boost RPS frequency for CPU stalls
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-If we encounter a situation where the CPU blocks waiting for results
-from the GPU, give the GPU a kick to boost its the frequency.
-
-This should work to reduce user interface stalls and to quickly promote
-mesa to high frequencies - but the cost is that our requested frequency
-stalls high (as we do not idle for long enough before rc6 to start
-reducing frequencies, nor are we aggressive at down clocking an
-underused GPU). However, this should be mitigated by rc6 itself powering
-off the GPU when idle, and that energy use is dependent upon the workload
-of the GPU in addition to its frequency (e.g. the math or sampler
-functions only consume power when used). Still, this is likely to
-adversely affect light workloads.
-
-In particular, this nearly eliminates the highly noticeable wake-up lag
-in animations from idle. For example, expose or workspace transitions.
-(However, given the situation where we fail to downclock, our requested
-frequency is almost always the maximum, except for Baytrail where we
-manually downclock upon idling. This often masks the latency of
-upclocking after being idle, so animations are typically smooth - at the
-cost of increased power consumption.)
-
-Stéphane raised the concern that this will punish good applications and
-reward bad applications - but due to the nature of how mesa performs its
-client throttling, I believe all mesa applications will be roughly
-equally affected. To address this concern, and to prevent applications
-like compositors from permanently boosting the RPS state, we ratelimit the
-frequency of the wait-boosts each client recieves.
-
-Unfortunately, this techinique is ineffective with Ironlake - which also
-has dynamic render power states and suffers just as dramatically. For
-Ironlake, the thermal/power headroom is shared with the CPU through
-Intelligent Power Sharing and the intel-ips module. This leaves us with
-no GPU boost frequencies available when coming out of idle, and due to
-hardware limitations we cannot change the arbitration between the CPU and
-GPU quickly enough to be effective.
-
-v2: Limit each client to receiving a single boost for each active period.
-    Tested by QA to only marginally increase power, and to demonstrably
-    increase throughput in games. No latency measurements yet.
-
-v3: Cater for front-buffer rendering with manual throttling.
-
-v4: Tidy up.
-
-v5: Sadly the compositor needs frequent boosts as it may never idle, but
-due to its picking mechanism (using ReadPixels) may require frequent
-waits. Those waits, along with the waits for the vrefresh swap, conspire
-to keep the GPU at low frequencies despite the interactive latency. To
-overcome this we ditch the one-boost-per-active-period and just ratelimit
-the number of wait-boosts each client can receive.
-
-Reported-and-tested-by: Paul Neumann <paul104x@yahoo.de>
-Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=68716
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Cc: Kenneth Graunke <kenneth@whitecape.org>
-Cc: Stéphane Marchesin <stephane.marchesin@gmail.com>
-Cc: Owen Taylor <otaylor@redhat.com>
-Cc: "Meng, Mengmeng" <mengmeng.meng@intel.com>
-Cc: "Zhuang, Lena" <lena.zhuang@intel.com>
-Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-[danvet: No extern for function prototypes in headers.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit b29c19b645287f7062e17d70fa4e9781a01a5d88)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_dma.c      |   16 +---
- drivers/gpu/drm/i915/i915_drv.h      |   19 +++-
- drivers/gpu/drm/i915/i915_gem.c      |  135 ++++++++++++++++++++++++-----------
- drivers/gpu/drm/i915/i915_irq.c      |   11 --
- drivers/gpu/drm/i915/intel_display.c |    3 
- drivers/gpu/drm/i915/intel_drv.h     |    3 
- drivers/gpu/drm/i915/intel_pm.c      |   42 +++++-----
- 7 files changed, 138 insertions(+), 91 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_dma.c
-+++ b/drivers/gpu/drm/i915/i915_dma.c
-@@ -1836,19 +1836,11 @@ int i915_driver_unload(struct drm_device
- 
- int i915_driver_open(struct drm_device *dev, struct drm_file *file)
- {
--	struct drm_i915_file_private *file_priv;
-+	int ret;
- 
--	DRM_DEBUG_DRIVER("\n");
--	file_priv = kzalloc(sizeof(*file_priv), GFP_KERNEL);
--	if (!file_priv)
--		return -ENOMEM;
--
--	file->driver_priv = file_priv;
--
--	spin_lock_init(&file_priv->mm.lock);
--	INIT_LIST_HEAD(&file_priv->mm.request_list);
--
--	idr_init(&file_priv->context_idr);
-+	ret = i915_gem_open(dev, file);
-+	if (ret)
-+		return ret;
- 
- 	return 0;
- }
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -844,9 +844,6 @@ struct intel_gen6_power_mgmt {
- 	struct work_struct work;
- 	u32 pm_iir;
- 
--	/* On vlv we need to manually drop to Vmin with a delayed work. */
--	struct delayed_work vlv_work;
--
- 	/* The below variables an all the rps hw state are protected by
- 	 * dev->struct mutext. */
- 	u8 cur_delay;
-@@ -965,6 +962,15 @@ struct i915_gem_mm {
- 	struct delayed_work retire_work;
- 
- 	/**
-+	 * When we detect an idle GPU, we want to turn on
-+	 * powersaving features. So once we see that there
-+	 * are no more requests outstanding and no more
-+	 * arrive within a small period of time, we fire
-+	 * off the idle_work.
-+	 */
-+	struct delayed_work idle_work;
-+
-+	/**
- 	 * Are we in a non-interruptible section of code like
- 	 * modesetting?
- 	 */
-@@ -1597,13 +1603,17 @@ struct drm_i915_gem_request {
- };
- 
- struct drm_i915_file_private {
-+	struct drm_i915_private *dev_priv;
-+
- 	struct {
- 		spinlock_t lock;
- 		struct list_head request_list;
-+		struct delayed_work idle_work;
- 	} mm;
- 	struct idr context_idr;
- 
- 	struct i915_ctx_hang_stats hang_stats;
-+	atomic_t rps_wait_boost;
- };
- 
- #define INTEL_INFO(dev)	(to_i915(dev)->info)
-@@ -1953,7 +1963,7 @@ i915_gem_object_unpin_fence(struct drm_i
- 	}
- }
- 
--void i915_gem_retire_requests(struct drm_device *dev);
-+bool i915_gem_retire_requests(struct drm_device *dev);
- void i915_gem_retire_requests_ring(struct intel_ring_buffer *ring);
- int __must_check i915_gem_check_wedge(struct i915_gpu_error *error,
- 				      bool interruptible);
-@@ -2004,6 +2014,7 @@ int i915_gem_attach_phys_object(struct d
- void i915_gem_detach_phys_object(struct drm_device *dev,
- 				 struct drm_i915_gem_object *obj);
- void i915_gem_free_all_phys_object(struct drm_device *dev);
-+int i915_gem_open(struct drm_device *dev, struct drm_file *file);
- void i915_gem_release(struct drm_device *dev, struct drm_file *file);
- 
- uint32_t
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -980,6 +980,14 @@ static bool missed_irq(struct drm_i915_p
- 	return test_bit(ring->id, &dev_priv->gpu_error.missed_irq_rings);
- }
- 
-+static bool can_wait_boost(struct drm_i915_file_private *file_priv)
-+{
-+	if (file_priv == NULL)
-+		return true;
-+
-+	return !atomic_xchg(&file_priv->rps_wait_boost, true);
-+}
-+
- /**
-  * __wait_seqno - wait until execution of seqno has finished
-  * @ring: the ring expected to report seqno
-@@ -1000,7 +1008,9 @@ static bool missed_irq(struct drm_i915_p
-  */
- static int __wait_seqno(struct intel_ring_buffer *ring, u32 seqno,
- 			unsigned reset_counter,
--			bool interruptible, struct timespec *timeout)
-+			bool interruptible,
-+			struct timespec *timeout,
-+			struct drm_i915_file_private *file_priv)
- {
- 	drm_i915_private_t *dev_priv = ring->dev->dev_private;
- 	struct timespec before, now;
-@@ -1015,6 +1025,14 @@ static int __wait_seqno(struct intel_rin
- 
- 	timeout_jiffies = timeout ? timespec_to_jiffies_timeout(timeout) : 1;
- 
-+	if (dev_priv->info->gen >= 6 && can_wait_boost(file_priv)) {
-+		gen6_rps_boost(dev_priv);
-+		if (file_priv)
-+			mod_delayed_work(dev_priv->wq,
-+					 &file_priv->mm.idle_work,
-+					 msecs_to_jiffies(100));
-+	}
-+
- 	if (!(dev_priv->gpu_error.test_irq_rings & intel_ring_flag(ring)) &&
- 	    WARN_ON(!ring->irq_get(ring)))
- 		return -ENODEV;
-@@ -1114,7 +1132,7 @@ i915_wait_seqno(struct intel_ring_buffer
- 
- 	return __wait_seqno(ring, seqno,
- 			    atomic_read(&dev_priv->gpu_error.reset_counter),
--			    interruptible, NULL);
-+			    interruptible, NULL, NULL);
- }
- 
- static int
-@@ -1164,6 +1182,7 @@ i915_gem_object_wait_rendering(struct dr
-  */
- static __must_check int
- i915_gem_object_wait_rendering__nonblocking(struct drm_i915_gem_object *obj,
-+					    struct drm_file *file,
- 					    bool readonly)
- {
- 	struct drm_device *dev = obj->base.dev;
-@@ -1190,7 +1209,7 @@ i915_gem_object_wait_rendering__nonblock
- 
- 	reset_counter = atomic_read(&dev_priv->gpu_error.reset_counter);
- 	mutex_unlock(&dev->struct_mutex);
--	ret = __wait_seqno(ring, seqno, reset_counter, true, NULL);
-+	ret = __wait_seqno(ring, seqno, reset_counter, true, NULL, file->driver_priv);
- 	mutex_lock(&dev->struct_mutex);
- 	if (ret)
- 		return ret;
-@@ -1239,7 +1258,7 @@ i915_gem_set_domain_ioctl(struct drm_dev
- 	 * We will repeat the flush holding the lock in the normal manner
- 	 * to catch cases where we are gazumped.
- 	 */
--	ret = i915_gem_object_wait_rendering__nonblocking(obj, !write_domain);
-+	ret = i915_gem_object_wait_rendering__nonblocking(obj, file, !write_domain);
- 	if (ret)
- 		goto unref;
- 
-@@ -2155,6 +2174,7 @@ int __i915_add_request(struct intel_ring
- 		i915_queue_hangcheck(ring->dev);
- 
- 		if (was_empty) {
-+			cancel_delayed_work_sync(&dev_priv->mm.idle_work);
- 			queue_delayed_work(dev_priv->wq,
- 					   &dev_priv->mm.retire_work,
- 					   round_jiffies_up_relative(HZ));
-@@ -2176,10 +2196,8 @@ i915_gem_request_remove_from_client(stru
- 		return;
- 
- 	spin_lock(&file_priv->mm.lock);
--	if (request->file_priv) {
--		list_del(&request->client_list);
--		request->file_priv = NULL;
--	}
-+	list_del(&request->client_list);
-+	request->file_priv = NULL;
- 	spin_unlock(&file_priv->mm.lock);
- }
- 
-@@ -2443,57 +2461,53 @@ i915_gem_retire_requests_ring(struct int
- 	WARN_ON(i915_verify_lists(ring->dev));
- }
- 
--void
-+bool
- i915_gem_retire_requests(struct drm_device *dev)
- {
- 	drm_i915_private_t *dev_priv = dev->dev_private;
- 	struct intel_ring_buffer *ring;
-+	bool idle = true;
- 	int i;
- 
--	for_each_ring(ring, dev_priv, i)
-+	for_each_ring(ring, dev_priv, i) {
- 		i915_gem_retire_requests_ring(ring);
-+		idle &= list_empty(&ring->request_list);
-+	}
-+
-+	if (idle)
-+		mod_delayed_work(dev_priv->wq,
-+				   &dev_priv->mm.idle_work,
-+				   msecs_to_jiffies(100));
-+
-+	return idle;
- }
- 
- static void
- i915_gem_retire_work_handler(struct work_struct *work)
- {
--	drm_i915_private_t *dev_priv;
--	struct drm_device *dev;
--	struct intel_ring_buffer *ring;
-+	struct drm_i915_private *dev_priv =
-+		container_of(work, typeof(*dev_priv), mm.retire_work.work);
-+	struct drm_device *dev = dev_priv->dev;
- 	bool idle;
--	int i;
--
--	dev_priv = container_of(work, drm_i915_private_t,
--				mm.retire_work.work);
--	dev = dev_priv->dev;
- 
- 	/* Come back later if the device is busy... */
--	if (!mutex_trylock(&dev->struct_mutex)) {
--		queue_delayed_work(dev_priv->wq, &dev_priv->mm.retire_work,
--				   round_jiffies_up_relative(HZ));
--		return;
--	}
--
--	i915_gem_retire_requests(dev);
--
--	/* Send a periodic flush down the ring so we don't hold onto GEM
--	 * objects indefinitely.
--	 */
--	idle = true;
--	for_each_ring(ring, dev_priv, i) {
--		if (ring->gpu_caches_dirty)
--			i915_add_request(ring, NULL);
--
--		idle &= list_empty(&ring->request_list);
-+	idle = false;
-+	if (mutex_trylock(&dev->struct_mutex)) {
-+		idle = i915_gem_retire_requests(dev);
-+		mutex_unlock(&dev->struct_mutex);
- 	}
--
--	if (!dev_priv->ums.mm_suspended && !idle)
-+	if (!idle)
- 		queue_delayed_work(dev_priv->wq, &dev_priv->mm.retire_work,
- 				   round_jiffies_up_relative(HZ));
--	if (idle)
--		intel_mark_idle(dev);
-+}
- 
--	mutex_unlock(&dev->struct_mutex);
-+static void
-+i915_gem_idle_work_handler(struct work_struct *work)
-+{
-+	struct drm_i915_private *dev_priv =
-+		container_of(work, typeof(*dev_priv), mm.idle_work.work);
-+
-+	intel_mark_idle(dev_priv->dev);
- }
- 
- /**
-@@ -2591,7 +2605,7 @@ i915_gem_wait_ioctl(struct drm_device *d
- 	reset_counter = atomic_read(&dev_priv->gpu_error.reset_counter);
- 	mutex_unlock(&dev->struct_mutex);
- 
--	ret = __wait_seqno(ring, seqno, reset_counter, true, timeout);
-+	ret = __wait_seqno(ring, seqno, reset_counter, true, timeout, file->driver_priv);
- 	if (timeout)
- 		args->timeout_ns = timespec_to_ns(timeout);
- 	return ret;
-@@ -3802,7 +3816,7 @@ i915_gem_ring_throttle(struct drm_device
- 	if (seqno == 0)
- 		return 0;
- 
--	ret = __wait_seqno(ring, seqno, reset_counter, true, NULL);
-+	ret = __wait_seqno(ring, seqno, reset_counter, true, NULL, NULL);
- 	if (ret == 0)
- 		queue_delayed_work(dev_priv->wq, &dev_priv->mm.retire_work, 0);
- 
-@@ -4272,6 +4286,7 @@ i915_gem_idle(struct drm_device *dev)
- 
- 	/* Cancel the retire work handler, which should be idle now. */
- 	cancel_delayed_work_sync(&dev_priv->mm.retire_work);
-+	cancel_delayed_work_sync(&dev_priv->mm.idle_work);
- 
- 	return 0;
- }
-@@ -4605,6 +4620,8 @@ i915_gem_load(struct drm_device *dev)
- 		INIT_LIST_HEAD(&dev_priv->fence_regs[i].lru_list);
- 	INIT_DELAYED_WORK(&dev_priv->mm.retire_work,
- 			  i915_gem_retire_work_handler);
-+	INIT_DELAYED_WORK(&dev_priv->mm.idle_work,
-+			  i915_gem_idle_work_handler);
- 	init_waitqueue_head(&dev_priv->gpu_error.reset_queue);
- 
- 	/* On GEN3 we really need to make sure the ARB C3 LP bit is set */
-@@ -4828,6 +4845,8 @@ void i915_gem_release(struct drm_device
- {
- 	struct drm_i915_file_private *file_priv = file->driver_priv;
- 
-+	cancel_delayed_work_sync(&file_priv->mm.idle_work);
-+
- 	/* Clean up our request list when the client is going away, so that
- 	 * later retire_requests won't dereference our soon-to-be-gone
- 	 * file_priv.
-@@ -4845,6 +4864,38 @@ void i915_gem_release(struct drm_device
- 	spin_unlock(&file_priv->mm.lock);
- }
- 
-+static void
-+i915_gem_file_idle_work_handler(struct work_struct *work)
-+{
-+	struct drm_i915_file_private *file_priv =
-+		container_of(work, typeof(*file_priv), mm.idle_work.work);
-+
-+	atomic_set(&file_priv->rps_wait_boost, false);
-+}
-+
-+int i915_gem_open(struct drm_device *dev, struct drm_file *file)
-+{
-+	struct drm_i915_file_private *file_priv;
-+
-+	DRM_DEBUG_DRIVER("\n");
-+
-+	file_priv = kzalloc(sizeof(*file_priv), GFP_KERNEL);
-+	if (!file_priv)
-+		return -ENOMEM;
-+
-+	file->driver_priv = file_priv;
-+	file_priv->dev_priv = dev->dev_private;
-+
-+	spin_lock_init(&file_priv->mm.lock);
-+	INIT_LIST_HEAD(&file_priv->mm.request_list);
-+	INIT_DELAYED_WORK(&file_priv->mm.idle_work,
-+			  i915_gem_file_idle_work_handler);
-+
-+	idr_init(&file_priv->context_idr);
-+
-+	return 0;
-+}
-+
- static bool mutex_is_locked_by(struct mutex *mutex, struct task_struct *task)
- {
- 	if (!mutex_is_locked(mutex))
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -859,17 +859,6 @@ static void gen6_pm_rps_work(struct work
- 			gen6_set_rps(dev_priv->dev, new_delay);
- 	}
- 
--	if (IS_VALLEYVIEW(dev_priv->dev)) {
--		/*
--		 * On VLV, when we enter RC6 we may not be at the minimum
--		 * voltage level, so arm a timer to check.  It should only
--		 * fire when there's activity or once after we've entered
--		 * RC6, and then won't be re-armed until the next RPS interrupt.
--		 */
--		mod_delayed_work(dev_priv->wq, &dev_priv->rps.vlv_work,
--				 msecs_to_jiffies(100));
--	}
--
- 	mutex_unlock(&dev_priv->rps.hw_lock);
- }
- 
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -7726,6 +7726,9 @@ void intel_mark_idle(struct drm_device *
- 
- 		intel_decrease_pllclock(crtc);
- 	}
-+
-+	if (dev_priv->info->gen >= 6)
-+		gen6_rps_idle(dev->dev_private);
- }
- 
- void intel_mark_fb_busy(struct drm_i915_gem_object *obj,
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -825,4 +825,7 @@ int intel_sprite_get_colorkey(struct drm
- /* intel_tv.c */
- void intel_tv_init(struct drm_device *dev);
- 
-+void gen6_rps_idle(struct drm_i915_private *dev_priv);
-+void gen6_rps_boost(struct drm_i915_private *dev_priv);
-+
- #endif /* __INTEL_DRV_H__ */
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -3345,6 +3345,26 @@ void gen6_set_rps(struct drm_device *dev
- 	trace_intel_gpu_freq_change(val * 50);
- }
- 
-+void gen6_rps_idle(struct drm_i915_private *dev_priv)
-+{
-+	mutex_lock(&dev_priv->rps.hw_lock);
-+	if (dev_priv->info->is_valleyview)
-+		valleyview_set_rps(dev_priv->dev, dev_priv->rps.min_delay);
-+	else
-+		gen6_set_rps(dev_priv->dev, dev_priv->rps.min_delay);
-+	mutex_unlock(&dev_priv->rps.hw_lock);
-+}
-+
-+void gen6_rps_boost(struct drm_i915_private *dev_priv)
-+{
-+	mutex_lock(&dev_priv->rps.hw_lock);
-+	if (dev_priv->info->is_valleyview)
-+		valleyview_set_rps(dev_priv->dev, dev_priv->rps.max_delay);
-+	else
-+		gen6_set_rps(dev_priv->dev, dev_priv->rps.max_delay);
-+	mutex_unlock(&dev_priv->rps.hw_lock);
-+}
-+
- /*
-  * Wait until the previous freq change has completed,
-  * or the timeout elapsed, and then update our notion
-@@ -3734,24 +3754,6 @@ int valleyview_rps_min_freq(struct drm_i
- 	return vlv_punit_read(dev_priv, PUNIT_REG_GPU_LFM) & 0xff;
- }
- 
--static void vlv_rps_timer_work(struct work_struct *work)
--{
--	drm_i915_private_t *dev_priv = container_of(work, drm_i915_private_t,
--						    rps.vlv_work.work);
--
--	/*
--	 * Timer fired, we must be idle.  Drop to min voltage state.
--	 * Note: we use RPe here since it should match the
--	 * Vmin we were shooting for.  That should give us better
--	 * perf when we come back out of RC6 than if we used the
--	 * min freq available.
--	 */
--	mutex_lock(&dev_priv->rps.hw_lock);
--	if (dev_priv->rps.cur_delay > dev_priv->rps.rpe_delay)
--		valleyview_set_rps(dev_priv->dev, dev_priv->rps.rpe_delay);
--	mutex_unlock(&dev_priv->rps.hw_lock);
--}
--
- static void valleyview_setup_pctx(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
-@@ -3894,8 +3896,6 @@ static void valleyview_enable_rps(struct
- 				      dev_priv->rps.rpe_delay),
- 			 dev_priv->rps.rpe_delay);
- 
--	INIT_DELAYED_WORK(&dev_priv->rps.vlv_work, vlv_rps_timer_work);
--
- 	valleyview_set_rps(dev_priv->dev, dev_priv->rps.rpe_delay);
- 
- 	gen6_enable_rps_interrupts(dev);
-@@ -4635,8 +4635,6 @@ void intel_disable_gt_powersave(struct d
- 	} else if (INTEL_INFO(dev)->gen >= 6) {
- 		cancel_delayed_work_sync(&dev_priv->rps.delayed_resume_work);
- 		cancel_work_sync(&dev_priv->rps.work);
--		if (IS_VALLEYVIEW(dev))
--			cancel_delayed_work_sync(&dev_priv->rps.vlv_work);
- 		mutex_lock(&dev_priv->rps.hw_lock);
- 		if (IS_VALLEYVIEW(dev))
- 			valleyview_disable_rps(dev);
diff --git a/patches.baytrail/0971-drm-i915-Tweak-RPS-thresholds-to-more-aggressively-d.patch b/patches.baytrail/0971-drm-i915-Tweak-RPS-thresholds-to-more-aggressively-d.patch
deleted file mode 100644
index 2431f2f3f6647..0000000000000
--- a/patches.baytrail/0971-drm-i915-Tweak-RPS-thresholds-to-more-aggressively-d.patch
+++ /dev/null
@@ -1,344 +0,0 @@
-From 6183d751fa85ed0330aa0b7f8d3923fbf5c50a75 Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Wed, 25 Sep 2013 17:34:57 +0100
-Subject: drm/i915: Tweak RPS thresholds to more aggressively downclock
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-After applying wait-boost we often find ourselves stuck at higher clocks
-than required. The current threshold value requires the GPU to be
-continuously and completely idle for 313ms before it is dropped by one
-bin. Conversely, we require the GPU to be busy for an average of 90% over
-a 84ms period before we upclock. So the current thresholds almost never
-downclock the GPU, and respond very slowly to sudden demands for more
-power. It is easy to observe that we currently lock into the wrong bin
-and both underperform in benchmarks and consume more power than optimal
-(just by repeating the task and measuring the different results).
-
-An alternative approach, as discussed in the bspec, is to use a
-continuous threshold for upclocking, and an average value for downclocking.
-This is good for quickly detecting and reacting to state changes within a
-frame, however it fails with the common throttling method of waiting
-upon the outstanding frame - at least it is difficult to choose a
-threshold that works well at 15,000fps and at 60fps. So continue to use
-average busy/idle loads to determine frequency change.
-
-v2: Use 3 power zones to keep frequencies low in steady-state mostly
-idle (e.g. scrolling, interactive 2D drawing), and frequencies high
-for demanding games. In between those end-states, we use a
-fast-reclocking algorithm to converge more quickly on the desired bin.
-
-v3: Bug fixes - make sure we reset adj after switching power zones.
-
-v4: Tune - drop the continuous busy thresholds as it prevents us from
-choosing the right frequency for glxgears style swap benchmarks. Instead
-the goal is to be able to find the right clocks irrespective of the
-wait-boost.
-
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Cc: Kenneth Graunke <kenneth@whitecape.org>
-Cc: Stéphane Marchesin <stephane.marchesin@gmail.com>
-Cc: Owen Taylor <otaylor@redhat.com>
-Cc: "Meng, Mengmeng" <mengmeng.meng@intel.com>
-Cc: "Zhuang, Lena" <lena.zhuang@intel.com>
-Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit dd75fdc8c69587c91bd68a6ed7c726b5e70f9399)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h |    5 +
- drivers/gpu/drm/i915/i915_irq.c |   46 +++++++++----
- drivers/gpu/drm/i915/i915_reg.h |    2 
- drivers/gpu/drm/i915/intel_pm.c |  137 ++++++++++++++++++++++++++++++----------
- 4 files changed, 143 insertions(+), 47 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -850,8 +850,13 @@ struct intel_gen6_power_mgmt {
- 	u8 min_delay;
- 	u8 max_delay;
- 	u8 rpe_delay;
-+	u8 rp1_delay;
-+	u8 rp0_delay;
- 	u8 hw_max;
- 
-+	int last_adj;
-+	enum { LOW_POWER, BETWEEN, HIGH_POWER } power;
-+
- 	struct delayed_work delayed_resume_work;
- 
- 	/*
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -818,7 +818,7 @@ static void gen6_pm_rps_work(struct work
- 	drm_i915_private_t *dev_priv = container_of(work, drm_i915_private_t,
- 						    rps.work);
- 	u32 pm_iir;
--	u8 new_delay;
-+	int new_delay, adj;
- 
- 	spin_lock_irq(&dev_priv->irq_lock);
- 	pm_iir = dev_priv->rps.pm_iir;
-@@ -835,29 +835,49 @@ static void gen6_pm_rps_work(struct work
- 
- 	mutex_lock(&dev_priv->rps.hw_lock);
- 
-+	adj = dev_priv->rps.last_adj;
- 	if (pm_iir & GEN6_PM_RP_UP_THRESHOLD) {
--		new_delay = dev_priv->rps.cur_delay + 1;
-+		if (adj > 0)
-+			adj *= 2;
-+		else
-+			adj = 1;
-+		new_delay = dev_priv->rps.cur_delay + adj;
- 
- 		/*
- 		 * For better performance, jump directly
- 		 * to RPe if we're below it.
- 		 */
--		if (IS_VALLEYVIEW(dev_priv->dev) &&
--		    dev_priv->rps.cur_delay < dev_priv->rps.rpe_delay)
-+		if (new_delay < dev_priv->rps.rpe_delay)
-+			new_delay = dev_priv->rps.rpe_delay;
-+	} else if (pm_iir & GEN6_PM_RP_DOWN_TIMEOUT) {
-+		if (dev_priv->rps.cur_delay > dev_priv->rps.rpe_delay)
- 			new_delay = dev_priv->rps.rpe_delay;
--	} else
--		new_delay = dev_priv->rps.cur_delay - 1;
-+		else
-+			new_delay = dev_priv->rps.min_delay;
-+		adj = 0;
-+	} else if (pm_iir & GEN6_PM_RP_DOWN_THRESHOLD) {
-+		if (adj < 0)
-+			adj *= 2;
-+		else
-+			adj = -1;
-+		new_delay = dev_priv->rps.cur_delay + adj;
-+	} else { /* unknown event */
-+		new_delay = dev_priv->rps.cur_delay;
-+	}
- 
- 	/* sysfs frequency interfaces may have snuck in while servicing the
- 	 * interrupt
- 	 */
--	if (new_delay >= dev_priv->rps.min_delay &&
--	    new_delay <= dev_priv->rps.max_delay) {
--		if (IS_VALLEYVIEW(dev_priv->dev))
--			valleyview_set_rps(dev_priv->dev, new_delay);
--		else
--			gen6_set_rps(dev_priv->dev, new_delay);
--	}
-+	if (new_delay < (int)dev_priv->rps.min_delay)
-+		new_delay = dev_priv->rps.min_delay;
-+	if (new_delay > (int)dev_priv->rps.max_delay)
-+		new_delay = dev_priv->rps.max_delay;
-+	dev_priv->rps.last_adj = new_delay - dev_priv->rps.cur_delay;
-+
-+	if (IS_VALLEYVIEW(dev_priv->dev))
-+		valleyview_set_rps(dev_priv->dev, new_delay);
-+	else
-+		gen6_set_rps(dev_priv->dev, new_delay);
- 
- 	mutex_unlock(&dev_priv->rps.hw_lock);
- }
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -4691,7 +4691,7 @@
- #define   GEN6_RP_UP_IDLE_MIN			(0x1<<3)
- #define   GEN6_RP_UP_BUSY_AVG			(0x2<<3)
- #define   GEN6_RP_UP_BUSY_CONT			(0x4<<3)
--#define   GEN7_RP_DOWN_IDLE_AVG			(0x2<<0)
-+#define   GEN6_RP_DOWN_IDLE_AVG			(0x2<<0)
- #define   GEN6_RP_DOWN_IDLE_CONT		(0x1<<0)
- #define GEN6_RP_UP_THRESHOLD			0xA02C
- #define GEN6_RP_DOWN_THRESHOLD			0xA030
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -3312,6 +3312,98 @@ static u32 gen6_rps_limits(struct drm_i9
- 	return limits;
- }
- 
-+static void gen6_set_rps_thresholds(struct drm_i915_private *dev_priv, u8 val)
-+{
-+	int new_power;
-+
-+	new_power = dev_priv->rps.power;
-+	switch (dev_priv->rps.power) {
-+	case LOW_POWER:
-+		if (val > dev_priv->rps.rpe_delay + 1 && val > dev_priv->rps.cur_delay)
-+			new_power = BETWEEN;
-+		break;
-+
-+	case BETWEEN:
-+		if (val <= dev_priv->rps.rpe_delay && val < dev_priv->rps.cur_delay)
-+			new_power = LOW_POWER;
-+		else if (val >= dev_priv->rps.rp0_delay && val > dev_priv->rps.cur_delay)
-+			new_power = HIGH_POWER;
-+		break;
-+
-+	case HIGH_POWER:
-+		if (val < (dev_priv->rps.rp1_delay + dev_priv->rps.rp0_delay) >> 1 && val < dev_priv->rps.cur_delay)
-+			new_power = BETWEEN;
-+		break;
-+	}
-+	/* Max/min bins are special */
-+	if (val == dev_priv->rps.min_delay)
-+		new_power = LOW_POWER;
-+	if (val == dev_priv->rps.max_delay)
-+		new_power = HIGH_POWER;
-+	if (new_power == dev_priv->rps.power)
-+		return;
-+
-+	/* Note the units here are not exactly 1us, but 1280ns. */
-+	switch (new_power) {
-+	case LOW_POWER:
-+		/* Upclock if more than 95% busy over 16ms */
-+		I915_WRITE(GEN6_RP_UP_EI, 12500);
-+		I915_WRITE(GEN6_RP_UP_THRESHOLD, 11800);
-+
-+		/* Downclock if less than 85% busy over 32ms */
-+		I915_WRITE(GEN6_RP_DOWN_EI, 25000);
-+		I915_WRITE(GEN6_RP_DOWN_THRESHOLD, 21250);
-+
-+		I915_WRITE(GEN6_RP_CONTROL,
-+			   GEN6_RP_MEDIA_TURBO |
-+			   GEN6_RP_MEDIA_HW_NORMAL_MODE |
-+			   GEN6_RP_MEDIA_IS_GFX |
-+			   GEN6_RP_ENABLE |
-+			   GEN6_RP_UP_BUSY_AVG |
-+			   GEN6_RP_DOWN_IDLE_AVG);
-+		break;
-+
-+	case BETWEEN:
-+		/* Upclock if more than 90% busy over 13ms */
-+		I915_WRITE(GEN6_RP_UP_EI, 10250);
-+		I915_WRITE(GEN6_RP_UP_THRESHOLD, 9225);
-+
-+		/* Downclock if less than 75% busy over 32ms */
-+		I915_WRITE(GEN6_RP_DOWN_EI, 25000);
-+		I915_WRITE(GEN6_RP_DOWN_THRESHOLD, 18750);
-+
-+		I915_WRITE(GEN6_RP_CONTROL,
-+			   GEN6_RP_MEDIA_TURBO |
-+			   GEN6_RP_MEDIA_HW_NORMAL_MODE |
-+			   GEN6_RP_MEDIA_IS_GFX |
-+			   GEN6_RP_ENABLE |
-+			   GEN6_RP_UP_BUSY_AVG |
-+			   GEN6_RP_DOWN_IDLE_AVG);
-+		break;
-+
-+	case HIGH_POWER:
-+		/* Upclock if more than 85% busy over 10ms */
-+		I915_WRITE(GEN6_RP_UP_EI, 8000);
-+		I915_WRITE(GEN6_RP_UP_THRESHOLD, 6800);
-+
-+		/* Downclock if less than 60% busy over 32ms */
-+		I915_WRITE(GEN6_RP_DOWN_EI, 25000);
-+		I915_WRITE(GEN6_RP_DOWN_THRESHOLD, 15000);
-+
-+		I915_WRITE(GEN6_RP_CONTROL,
-+			   GEN6_RP_MEDIA_TURBO |
-+			   GEN6_RP_MEDIA_HW_NORMAL_MODE |
-+			   GEN6_RP_MEDIA_IS_GFX |
-+			   GEN6_RP_ENABLE |
-+			   GEN6_RP_UP_BUSY_AVG |
-+			   GEN6_RP_DOWN_IDLE_AVG);
-+		break;
-+	}
-+
-+	dev_priv->rps.power = new_power;
-+	dev_priv->rps.last_adj = 0;
-+}
-+
- void gen6_set_rps(struct drm_device *dev, u8 val)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
-@@ -3324,6 +3416,8 @@ void gen6_set_rps(struct drm_device *dev
- 	if (val == dev_priv->rps.cur_delay)
- 		return;
- 
-+	gen6_set_rps_thresholds(dev_priv, val);
-+
- 	if (IS_HASWELL(dev))
- 		I915_WRITE(GEN6_RPNSWREQ,
- 			   HSW_FREQUENCY(val));
-@@ -3352,6 +3446,7 @@ void gen6_rps_idle(struct drm_i915_priva
- 		valleyview_set_rps(dev_priv->dev, dev_priv->rps.min_delay);
- 	else
- 		gen6_set_rps(dev_priv->dev, dev_priv->rps.min_delay);
-+	dev_priv->rps.last_adj = 0;
- 	mutex_unlock(&dev_priv->rps.hw_lock);
- }
- 
-@@ -3362,6 +3457,7 @@ void gen6_rps_boost(struct drm_i915_priv
- 		valleyview_set_rps(dev_priv->dev, dev_priv->rps.max_delay);
- 	else
- 		gen6_set_rps(dev_priv->dev, dev_priv->rps.max_delay);
-+	dev_priv->rps.last_adj = 0;
- 	mutex_unlock(&dev_priv->rps.hw_lock);
- }
- 
-@@ -3546,7 +3642,10 @@ static void gen6_enable_rps(struct drm_d
- 
- 	/* In units of 50MHz */
- 	dev_priv->rps.hw_max = dev_priv->rps.max_delay = rp_state_cap & 0xff;
--	dev_priv->rps.min_delay = (rp_state_cap & 0xff0000) >> 16;
-+	dev_priv->rps.min_delay = (rp_state_cap >> 16) & 0xff;
-+	dev_priv->rps.rp1_delay = (rp_state_cap >>  8) & 0xff;
-+	dev_priv->rps.rp0_delay = (rp_state_cap >>  0) & 0xff;
-+	dev_priv->rps.rpe_delay = dev_priv->rps.rp1_delay;
- 	dev_priv->rps.cur_delay = 0;
- 
- 	/* disable the counters and set deterministic thresholds */
-@@ -3594,38 +3693,9 @@ static void gen6_enable_rps(struct drm_d
- 		   GEN6_RC_CTL_EI_MODE(1) |
- 		   GEN6_RC_CTL_HW_ENABLE);
- 
--	if (IS_HASWELL(dev)) {
--		I915_WRITE(GEN6_RPNSWREQ,
--			   HSW_FREQUENCY(10));
--		I915_WRITE(GEN6_RC_VIDEO_FREQ,
--			   HSW_FREQUENCY(12));
--	} else {
--		I915_WRITE(GEN6_RPNSWREQ,
--			   GEN6_FREQUENCY(10) |
--			   GEN6_OFFSET(0) |
--			   GEN6_AGGRESSIVE_TURBO);
--		I915_WRITE(GEN6_RC_VIDEO_FREQ,
--			   GEN6_FREQUENCY(12));
--	}
--
--	I915_WRITE(GEN6_RP_DOWN_TIMEOUT, 1000000);
--	I915_WRITE(GEN6_RP_INTERRUPT_LIMITS,
--		   dev_priv->rps.max_delay << 24 |
--		   dev_priv->rps.min_delay << 16);
--
--	I915_WRITE(GEN6_RP_UP_THRESHOLD, 59400);
--	I915_WRITE(GEN6_RP_DOWN_THRESHOLD, 245000);
--	I915_WRITE(GEN6_RP_UP_EI, 66000);
--	I915_WRITE(GEN6_RP_DOWN_EI, 350000);
--
-+	/* Power down if completely idle for over 50ms */
-+	I915_WRITE(GEN6_RP_DOWN_TIMEOUT, 50000);
- 	I915_WRITE(GEN6_RP_IDLE_HYSTERSIS, 10);
--	I915_WRITE(GEN6_RP_CONTROL,
--		   GEN6_RP_MEDIA_TURBO |
--		   GEN6_RP_MEDIA_HW_NORMAL_MODE |
--		   GEN6_RP_MEDIA_IS_GFX |
--		   GEN6_RP_ENABLE |
--		   GEN6_RP_UP_BUSY_AVG |
--		   (IS_HASWELL(dev) ? GEN7_RP_DOWN_IDLE_AVG : GEN6_RP_DOWN_IDLE_CONT));
- 
- 	ret = sandybridge_pcode_write(dev_priv, GEN6_PCODE_WRITE_MIN_FREQ_TABLE, 0);
- 	if (!ret) {
-@@ -3641,7 +3711,8 @@ static void gen6_enable_rps(struct drm_d
- 		DRM_DEBUG_DRIVER("Failed to set the min frequency\n");
- 	}
- 
--	gen6_set_rps(dev_priv->dev, (gt_perf_status & 0xff00) >> 8);
-+	dev_priv->rps.power = HIGH_POWER; /* force a reset */
-+	gen6_set_rps(dev_priv->dev, dev_priv->rps.min_delay);
- 
- 	gen6_enable_rps_interrupts(dev);
- 
diff --git a/patches.baytrail/0972-drm-i915-Simplify-PSR-debugfs.patch b/patches.baytrail/0972-drm-i915-Simplify-PSR-debugfs.patch
deleted file mode 100644
index 0e09118296481..0000000000000
--- a/patches.baytrail/0972-drm-i915-Simplify-PSR-debugfs.patch
+++ /dev/null
@@ -1,330 +0,0 @@
-From cb790c162cc21a1f21116736258cd4bf9322e2d6 Mon Sep 17 00:00:00 2001
-From: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Date: Thu, 3 Oct 2013 16:15:06 -0300
-Subject: drm/i915: Simplify PSR debugfs
-
-for igt test case.
-
-v2: remove trailing spaces and fix conflicts
-
-Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-[danvet:
-- make it comipile
-- s/IS_HASWELL/HAS_PSR/]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit a031d709bb90ce72cc016d242e8c1fef65ae9d5c)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_debugfs.c | 129 +++---------------------------------
- drivers/gpu/drm/i915/i915_drv.h     |  16 ++---
- drivers/gpu/drm/i915/intel_dp.c     |  35 +++++-----
- 3 files changed, 30 insertions(+), 150 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
-index bc5c04d5890f..61fd61969e21 100644
---- a/drivers/gpu/drm/i915/i915_debugfs.c
-+++ b/drivers/gpu/drm/i915/i915_debugfs.c
-@@ -1666,127 +1666,20 @@ static int i915_edp_psr_status(struct seq_file *m, void *data)
- 	struct drm_info_node *node = m->private;
- 	struct drm_device *dev = node->minor->dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
--	u32 psrstat, psrperf;
-+	u32 psrperf = 0;
-+	bool enabled = false;
- 
--	if (!HAS_PSR(dev)) {
--		seq_puts(m, "PSR not supported on this platform\n");
--	} else if (HAS_PSR(dev) &&
--		   I915_READ(EDP_PSR_CTL(dev)) & EDP_PSR_ENABLE) {
--		seq_puts(m, "PSR enabled\n");
--	} else {
--		seq_puts(m, "PSR disabled: ");
--		switch (dev_priv->no_psr_reason) {
--		case PSR_NO_SOURCE:
--			seq_puts(m, "not supported on this platform");
--			break;
--		case PSR_NO_SINK:
--			seq_puts(m, "not supported by panel");
--			break;
--		case PSR_MODULE_PARAM:
--			seq_puts(m, "disabled by flag");
--			break;
--		case PSR_CRTC_NOT_ACTIVE:
--			seq_puts(m, "crtc not active");
--			break;
--		case PSR_PWR_WELL_ENABLED:
--			seq_puts(m, "power well enabled");
--			break;
--		case PSR_NOT_TILED:
--			seq_puts(m, "not tiled");
--			break;
--		case PSR_SPRITE_ENABLED:
--			seq_puts(m, "sprite enabled");
--			break;
--		case PSR_S3D_ENABLED:
--			seq_puts(m, "stereo 3d enabled");
--			break;
--		case PSR_INTERLACED_ENABLED:
--			seq_puts(m, "interlaced enabled");
--			break;
--		case PSR_HSW_NOT_DDIA:
--			seq_puts(m, "HSW ties PSR to DDI A (eDP)");
--			break;
--		default:
--			seq_puts(m, "unknown reason");
--		}
--		seq_puts(m, "\n");
--		return 0;
--	}
--
--	psrstat = I915_READ(EDP_PSR_STATUS_CTL(dev));
--
--	seq_puts(m, "PSR Current State: ");
--	switch (psrstat & EDP_PSR_STATUS_STATE_MASK) {
--	case EDP_PSR_STATUS_STATE_IDLE:
--		seq_puts(m, "Reset state\n");
--		break;
--	case EDP_PSR_STATUS_STATE_SRDONACK:
--		seq_puts(m, "Wait for TG/Stream to send on frame of data after SRD conditions are met\n");
--		break;
--	case EDP_PSR_STATUS_STATE_SRDENT:
--		seq_puts(m, "SRD entry\n");
--		break;
--	case EDP_PSR_STATUS_STATE_BUFOFF:
--		seq_puts(m, "Wait for buffer turn off\n");
--		break;
--	case EDP_PSR_STATUS_STATE_BUFON:
--		seq_puts(m, "Wait for buffer turn on\n");
--		break;
--	case EDP_PSR_STATUS_STATE_AUXACK:
--		seq_puts(m, "Wait for AUX to acknowledge on SRD exit\n");
--		break;
--	case EDP_PSR_STATUS_STATE_SRDOFFACK:
--		seq_puts(m, "Wait for TG/Stream to acknowledge the SRD VDM exit\n");
--		break;
--	default:
--		seq_puts(m, "Unknown\n");
--		break;
--	}
--
--	seq_puts(m, "Link Status: ");
--	switch (psrstat & EDP_PSR_STATUS_LINK_MASK) {
--	case EDP_PSR_STATUS_LINK_FULL_OFF:
--		seq_puts(m, "Link is fully off\n");
--		break;
--	case EDP_PSR_STATUS_LINK_FULL_ON:
--		seq_puts(m, "Link is fully on\n");
--		break;
--	case EDP_PSR_STATUS_LINK_STANDBY:
--		seq_puts(m, "Link is in standby\n");
--		break;
--	default:
--		seq_puts(m, "Unknown\n");
--		break;
--	}
--
--	seq_printf(m, "PSR Entry Count: %u\n",
--		   psrstat >> EDP_PSR_STATUS_COUNT_SHIFT &
--		   EDP_PSR_STATUS_COUNT_MASK);
--
--	seq_printf(m, "Max Sleep Timer Counter: %u\n",
--		   psrstat >> EDP_PSR_STATUS_MAX_SLEEP_TIMER_SHIFT &
--		   EDP_PSR_STATUS_MAX_SLEEP_TIMER_MASK);
--
--	seq_printf(m, "Had AUX error: %s\n",
--		   yesno(psrstat & EDP_PSR_STATUS_AUX_ERROR));
--
--	seq_printf(m, "Sending AUX: %s\n",
--		   yesno(psrstat & EDP_PSR_STATUS_AUX_SENDING));
--
--	seq_printf(m, "Sending Idle: %s\n",
--		   yesno(psrstat & EDP_PSR_STATUS_SENDING_IDLE));
--
--	seq_printf(m, "Sending TP2 TP3: %s\n",
--		   yesno(psrstat & EDP_PSR_STATUS_SENDING_TP2_TP3));
--
--	seq_printf(m, "Sending TP1: %s\n",
--		   yesno(psrstat & EDP_PSR_STATUS_SENDING_TP1));
-+	seq_printf(m, "Sink_Support: %s\n", yesno(dev_priv->psr.sink_support));
-+	seq_printf(m, "Source_OK: %s\n", yesno(dev_priv->psr.source_ok));
- 
--	seq_printf(m, "Idle Count: %u\n",
--		   psrstat & EDP_PSR_STATUS_IDLE_MASK);
-+	enabled = HAS_PSR(dev) &&
-+		I915_READ(EDP_PSR_CTL(dev)) & EDP_PSR_ENABLE;
-+	seq_printf(m, "Enabled: %s\n", yesno(enabled));
- 
--	psrperf = (I915_READ(EDP_PSR_PERF_CNT(dev))) & EDP_PSR_PERF_CNT_MASK;
--	seq_printf(m, "Performance Counter: %u\n", psrperf);
-+	if (HAS_PSR(dev))
-+		psrperf = I915_READ(EDP_PSR_PERF_CNT(dev)) &
-+			EDP_PSR_PERF_CNT_MASK;
-+	seq_printf(m, "Performance_Counter: %u\n", psrperf);
- 
- 	return 0;
- }
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 5118ac300c42..ed8653fd97ad 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -644,17 +644,9 @@ struct i915_fbc {
- 	} no_fbc_reason;
- };
- 
--enum no_psr_reason {
--	PSR_NO_SOURCE, /* Not supported on platform */
--	PSR_NO_SINK, /* Not supported by panel */
--	PSR_MODULE_PARAM,
--	PSR_CRTC_NOT_ACTIVE,
--	PSR_PWR_WELL_ENABLED,
--	PSR_NOT_TILED,
--	PSR_SPRITE_ENABLED,
--	PSR_S3D_ENABLED,
--	PSR_INTERLACED_ENABLED,
--	PSR_HSW_NOT_DDIA,
-+struct i915_psr {
-+	bool sink_support;
-+	bool source_ok;
- };
- 
- enum intel_pch {
-@@ -1356,7 +1348,7 @@ typedef struct drm_i915_private {
- 	/* Haswell power well */
- 	struct i915_power_well power_well;
- 
--	enum no_psr_reason no_psr_reason;
-+	struct i915_psr psr;
- 
- 	struct i915_gpu_error gpu_error;
- 
-diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
-index 8dff9b1c919e..5f8a4f2c3c74 100644
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -1494,10 +1494,11 @@ static void intel_dp_get_config(struct intel_encoder *encoder,
- 	pipe_config->adjusted_mode.crtc_clock = dotclock;
- }
- 
--static bool is_edp_psr(struct intel_dp *intel_dp)
-+static bool is_edp_psr(struct drm_device *dev)
- {
--	return is_edp(intel_dp) &&
--		intel_dp->psr_dpcd[0] & DP_PSR_IS_SUPPORTED;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+
-+	return dev_priv->psr.sink_support;
- }
- 
- static bool intel_edp_is_psr_enabled(struct drm_device *dev)
-@@ -1624,42 +1625,33 @@ static bool intel_edp_psr_match_conditions(struct intel_dp *intel_dp)
- 	struct drm_i915_gem_object *obj = to_intel_framebuffer(crtc->fb)->obj;
- 	struct intel_encoder *intel_encoder = &dp_to_dig_port(intel_dp)->base;
- 
-+	dev_priv->psr.source_ok = false;
-+
- 	if (!HAS_PSR(dev)) {
- 		DRM_DEBUG_KMS("PSR not supported on this platform\n");
--		dev_priv->no_psr_reason = PSR_NO_SOURCE;
- 		return false;
- 	}
- 
- 	if ((intel_encoder->type != INTEL_OUTPUT_EDP) ||
- 	    (dig_port->port != PORT_A)) {
- 		DRM_DEBUG_KMS("HSW ties PSR to DDI A (eDP)\n");
--		dev_priv->no_psr_reason = PSR_HSW_NOT_DDIA;
--		return false;
--	}
--
--	if (!is_edp_psr(intel_dp)) {
--		DRM_DEBUG_KMS("PSR not supported by this panel\n");
--		dev_priv->no_psr_reason = PSR_NO_SINK;
- 		return false;
- 	}
- 
- 	if (!i915_enable_psr) {
- 		DRM_DEBUG_KMS("PSR disable by flag\n");
--		dev_priv->no_psr_reason = PSR_MODULE_PARAM;
- 		return false;
- 	}
- 
- 	crtc = dig_port->base.base.crtc;
- 	if (crtc == NULL) {
- 		DRM_DEBUG_KMS("crtc not active for PSR\n");
--		dev_priv->no_psr_reason = PSR_CRTC_NOT_ACTIVE;
- 		return false;
- 	}
- 
- 	intel_crtc = to_intel_crtc(crtc);
- 	if (!intel_crtc_active(crtc)) {
- 		DRM_DEBUG_KMS("crtc not active for PSR\n");
--		dev_priv->no_psr_reason = PSR_CRTC_NOT_ACTIVE;
- 		return false;
- 	}
- 
-@@ -1667,29 +1659,26 @@ static bool intel_edp_psr_match_conditions(struct intel_dp *intel_dp)
- 	if (obj->tiling_mode != I915_TILING_X ||
- 	    obj->fence_reg == I915_FENCE_REG_NONE) {
- 		DRM_DEBUG_KMS("PSR condition failed: fb not tiled or fenced\n");
--		dev_priv->no_psr_reason = PSR_NOT_TILED;
- 		return false;
- 	}
- 
- 	if (I915_READ(SPRCTL(intel_crtc->pipe)) & SPRITE_ENABLE) {
- 		DRM_DEBUG_KMS("PSR condition failed: Sprite is Enabled\n");
--		dev_priv->no_psr_reason = PSR_SPRITE_ENABLED;
- 		return false;
- 	}
- 
- 	if (I915_READ(HSW_STEREO_3D_CTL(intel_crtc->config.cpu_transcoder)) &
- 	    S3D_ENABLE) {
- 		DRM_DEBUG_KMS("PSR condition failed: Stereo 3D is Enabled\n");
--		dev_priv->no_psr_reason = PSR_S3D_ENABLED;
- 		return false;
- 	}
- 
- 	if (intel_crtc->config.adjusted_mode.flags & DRM_MODE_FLAG_INTERLACE) {
- 		DRM_DEBUG_KMS("PSR condition failed: Interlaced is Enabled\n");
--		dev_priv->no_psr_reason = PSR_INTERLACED_ENABLED;
- 		return false;
- 	}
- 
-+	dev_priv->psr.source_ok = true;
- 	return true;
- }
- 
-@@ -1746,7 +1735,7 @@ void intel_edp_psr_update(struct drm_device *dev)
- 		if (encoder->type == INTEL_OUTPUT_EDP) {
- 			intel_dp = enc_to_intel_dp(&encoder->base);
- 
--			if (!is_edp_psr(intel_dp))
-+			if (!is_edp_psr(dev))
- 				return;
- 
- 			if (!intel_edp_psr_match_conditions(intel_dp))
-@@ -2725,6 +2714,10 @@ intel_dp_link_down(struct intel_dp *intel_dp)
- static bool
- intel_dp_get_dpcd(struct intel_dp *intel_dp)
- {
-+	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
-+	struct drm_device *dev = dig_port->base.base.dev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+
- 	char dpcd_hex_dump[sizeof(intel_dp->dpcd) * 3];
- 
- 	if (intel_dp_aux_native_read_retry(intel_dp, 0x000, intel_dp->dpcd,
-@@ -2744,8 +2737,10 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp)
- 		intel_dp_aux_native_read_retry(intel_dp, DP_PSR_SUPPORT,
- 					       intel_dp->psr_dpcd,
- 					       sizeof(intel_dp->psr_dpcd));
--		if (is_edp_psr(intel_dp))
-+		if (intel_dp->psr_dpcd[0] & DP_PSR_IS_SUPPORTED) {
-+			dev_priv->psr.sink_support = true;
- 			DRM_DEBUG_KMS("Detected EDP PSR Panel.\n");
-+		}
- 	}
- 
- 	if (!(intel_dp->dpcd[DP_DOWNSTREAMPORT_PRESENT] &
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0973-drm-i915-vlv-reset-DPIO-on-load-and-resume-v2.patch b/patches.baytrail/0973-drm-i915-vlv-reset-DPIO-on-load-and-resume-v2.patch
deleted file mode 100644
index b7232aff30ff8..0000000000000
--- a/patches.baytrail/0973-drm-i915-vlv-reset-DPIO-on-load-and-resume-v2.patch
+++ /dev/null
@@ -1,83 +0,0 @@
-From f7dd0d95ec4519af288158007adf078b0011d61e Mon Sep 17 00:00:00 2001
-From: Jesse Barnes <jbarnes@virtuousgeek.org>
-Date: Thu, 3 Oct 2013 11:35:46 -0700
-Subject: drm/i915/vlv: reset DPIO on load and resume v2
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-DPIO needs to have common reset de-asserted on soft resets like boot and
-S3.  In some cases, the BIOS will have done this for us, but it should
-be safe to do at runtime as well, as long as we do it when the pipes are
-otherwise off.
-
-v2: update bit name to match docs better (Ville)
-    reset after CRI clock select (Ville)
-
-References: https://bugs.freedesktop.org/show_bug.cgi?id=69166
-Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 40e9cf649a88abea96d5756aa6f86e89cfabde6e)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_reg.h      |  2 +-
- drivers/gpu/drm/i915/intel_display.c | 22 ++++++++++++++++++++++
- 2 files changed, 23 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
-index daaabe788f21..c1017431fa5b 100644
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -430,7 +430,7 @@
- #define  DPIO_MODSEL1			(1<<3) /* if ref clk b == 27 */
- #define  DPIO_MODSEL0			(1<<2) /* if ref clk a == 27 */
- #define  DPIO_SFR_BYPASS		(1<<1)
--#define  DPIO_RESET			(1<<0)
-+#define  DPIO_CMNRST			(1<<0)
- 
- #define _DPIO_TX3_SWING_CTL4_A		0x690
- #define _DPIO_TX3_SWING_CTL4_B		0x2a90
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index b41c1592ffda..a22e8cb59ea7 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -1360,6 +1360,26 @@ static void assert_pch_ports_disabled(struct drm_i915_private *dev_priv,
- 	assert_pch_hdmi_disabled(dev_priv, pipe, PCH_HDMID);
- }
- 
-+static void intel_init_dpio(struct drm_device *dev)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+
-+	if (!IS_VALLEYVIEW(dev))
-+		return;
-+
-+	/*
-+	 * From VLV2A0_DP_eDP_DPIO_driver_vbios_notes_10.docx -
-+	 *  6.	De-assert cmn_reset/side_reset. Same as VLV X0.
-+	 *   a.	GUnit 0x2110 bit[0] set to 1 (def 0)
-+	 *   b.	The other bits such as sfr settings / modesel may all be set
-+	 *      to 0.
-+	 *
-+	 * This should only be done on init and resume from S3 with both
-+	 * PLLs disabled, or we risk losing DPIO and PLL synchronization.
-+	 */
-+	I915_WRITE(DPIO_CTL, I915_READ(DPIO_CTL) | DPIO_CMNRST);
-+}
-+
- static void vlv_enable_pll(struct intel_crtc *crtc)
- {
- 	struct drm_device *dev = crtc->base.dev;
-@@ -10370,6 +10390,8 @@ void intel_modeset_init_hw(struct drm_device *dev)
- 		I915_WRITE(DPLL(PIPE_B), I915_READ(DPLL(PIPE_B)) |
- 			   DPLL_INTEGRATED_CRI_CLK_VLV);
- 
-+	intel_init_dpio(dev);
-+
- 	mutex_lock(&dev->struct_mutex);
- 	intel_enable_gt_powersave(dev);
- 	mutex_unlock(&dev->struct_mutex);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0974-drm-i915-vlv-Turn-off-power-gate-for-BIOS-less-syste.patch b/patches.baytrail/0974-drm-i915-vlv-Turn-off-power-gate-for-BIOS-less-syste.patch
deleted file mode 100644
index b3bb8d8ebb84b..0000000000000
--- a/patches.baytrail/0974-drm-i915-vlv-Turn-off-power-gate-for-BIOS-less-syste.patch
+++ /dev/null
@@ -1,87 +0,0 @@
-From ba264a27ffcb70f731b09eb8994a849f838148a0 Mon Sep 17 00:00:00 2001
-From: Chon Ming Lee <chon.ming.lee@intel.com>
-Date: Thu, 3 Oct 2013 23:16:17 +0800
-Subject: drm/i915/vlv: Turn off power gate for BIOS-less system.
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-During system boot up, by default, the power gate for render, media and
-display well still power gated.  Normally, BIOS will turn off the power
-gate.  In the BIOS-less system, the driver need to turn off the power
-gate very early during driver load.
-
-v2: Move this to intel_uncore_sanitize to allow it to get call during
-resume path. (Daniel)
-v3: Remove redundant write 0 to DPIO_CTL, and use DPIO_RESET instead of
-just 0x1 (Ville)
-    Add turn of power gate for display 2d/render well/media well.
-v4: Remove toggle cmnreset in intel_uncore_sanitize.  Cmnreset should
-toggle after CRI clock source has been selected.  Jesse DPIO reset patch
-which toggle the cmnreset in intel_modeset_init_hw() should handle it.
-(Ville)
-
-Signed-off-by: Chon Ming Lee <chon.ming.lee@intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 02f4c9e02a021c5608dde7ae0607946ab16ae00c)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_reg.h     |  9 +++++++++
- drivers/gpu/drm/i915/intel_uncore.c | 16 ++++++++++++++++
- 2 files changed, 25 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
-index c1017431fa5b..95385023e0ba 100644
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -361,6 +361,15 @@
- #define PUNIT_OPCODE_REG_READ			6
- #define PUNIT_OPCODE_REG_WRITE			7
- 
-+#define PUNIT_REG_PWRGT_CTRL			0x60
-+#define PUNIT_REG_PWRGT_STATUS			0x61
-+#define	  PUNIT_CLK_GATE			1
-+#define	  PUNIT_PWR_RESET			2
-+#define	  PUNIT_PWR_GATE			3
-+#define	  RENDER_PWRGT				(PUNIT_PWR_GATE << 0)
-+#define	  MEDIA_PWRGT				(PUNIT_PWR_GATE << 2)
-+#define	  DISP2D_PWRGT				(PUNIT_PWR_GATE << 6)
-+
- #define PUNIT_REG_GPU_LFM			0xd3
- #define PUNIT_REG_GPU_FREQ_REQ			0xd4
- #define PUNIT_REG_GPU_FREQ_STS			0xd8
-diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
-index f2753d9fb098..288a3a654f06 100644
---- a/drivers/gpu/drm/i915/intel_uncore.c
-+++ b/drivers/gpu/drm/i915/intel_uncore.c
-@@ -301,10 +301,26 @@ static void intel_uncore_forcewake_reset(struct drm_device *dev)
- 
- void intel_uncore_sanitize(struct drm_device *dev)
- {
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	u32 reg_val;
-+
- 	intel_uncore_forcewake_reset(dev);
- 
- 	/* BIOS often leaves RC6 enabled, but disable it for hw init */
- 	intel_disable_gt_powersave(dev);
-+
-+	/* Turn off power gate, require especially for the BIOS less system */
-+	if (IS_VALLEYVIEW(dev)) {
-+
-+		mutex_lock(&dev_priv->rps.hw_lock);
-+		reg_val = vlv_punit_read(dev_priv, PUNIT_REG_PWRGT_STATUS);
-+
-+		if (reg_val & (RENDER_PWRGT | MEDIA_PWRGT | DISP2D_PWRGT))
-+			vlv_punit_write(dev_priv, PUNIT_REG_PWRGT_CTRL, 0x0);
-+
-+		mutex_unlock(&dev_priv->rps.hw_lock);
-+
-+	}
- }
- 
- /*
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0975-drm-i915-Add-a-more-detailed-comment-about-the-set_b.patch b/patches.baytrail/0975-drm-i915-Add-a-more-detailed-comment-about-the-set_b.patch
deleted file mode 100644
index 17f0d47f05195..0000000000000
--- a/patches.baytrail/0975-drm-i915-Add-a-more-detailed-comment-about-the-set_b.patch
+++ /dev/null
@@ -1,45 +0,0 @@
-From a155b12eedc301ffb45470edb517f8acd5704ea3 Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Mon, 30 Sep 2013 14:21:49 +0100
-Subject: drm/i915: Add a more detailed comment about the set_base() fastboot
- hack
-
-Instead of it just being on the mailing list, let's put Jesse's
-explanation next to the code in question.
-
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit bb2043de02ef15901c2a1e6f9349c989dce42615)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 14 +++++++++++++-
- 1 file changed, 13 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index a22e8cb59ea7..29126e09b18c 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -2320,7 +2320,19 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
- 		return ret;
- 	}
- 
--	/* Update pipe size and adjust fitter if needed */
-+	/*
-+	 * Update pipe size and adjust fitter if needed: the reason for this is
-+	 * that in compute_mode_changes we check the native mode (not the pfit
-+	 * mode) to see if we can flip rather than do a full mode set. In the
-+	 * fastboot case, we'll flip, but if we don't update the pipesrc and
-+	 * pfit state, we'll end up with a big fb scanned out into the wrong
-+	 * sized surface.
-+	 *
-+	 * To fix this properly, we need to hoist the checks up into
-+	 * compute_mode_changes (or above), check the actual pfit state and
-+	 * whether the platform allows pfit disable with pipe active, and only
-+	 * then update the pipesrc and pfit state, even on the flip path.
-+	 */
- 	if (i915_fastboot) {
- 		I915_WRITE(PIPESRC(intel_crtc->pipe),
- 			   ((crtc->mode.hdisplay - 1) << 16) |
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0976-drm-i915-Use-adjusted_mode-in-the-fastboot-hack-to-d.patch b/patches.baytrail/0976-drm-i915-Use-adjusted_mode-in-the-fastboot-hack-to-d.patch
deleted file mode 100644
index a4d7670a87474..0000000000000
--- a/patches.baytrail/0976-drm-i915-Use-adjusted_mode-in-the-fastboot-hack-to-d.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From 274118ac2c7e3fc087d19c24a94b690ea90625ca Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Mon, 30 Sep 2013 14:21:50 +0100
-Subject: drm/i915: Use adjusted_mode in the fastboot hack to disable pfit
-
-When booting with i915.fastboot=1, we always take tha code path and end
-up undoing what we're trying to do with adjusted_mode.
-
-Hopefully, as the fastboot hardware readout code is using adjusted_mode
-as well, it should be equivalent.
-
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit d7bf63f2465b3b6335dd66ffbf387768d81a59d5)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 7 +++++--
- 1 file changed, 5 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 29126e09b18c..1759e4c469e6 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -2334,9 +2334,12 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
- 	 * then update the pipesrc and pfit state, even on the flip path.
- 	 */
- 	if (i915_fastboot) {
-+		const struct drm_display_mode *adjusted_mode =
-+			&intel_crtc->config.adjusted_mode;
-+
- 		I915_WRITE(PIPESRC(intel_crtc->pipe),
--			   ((crtc->mode.hdisplay - 1) << 16) |
--			   (crtc->mode.vdisplay - 1));
-+			   ((adjusted_mode->crtc_hdisplay - 1) << 16) |
-+			   (adjusted_mode->crtc_vdisplay - 1));
- 		if (!intel_crtc->config.pch_pfit.enabled &&
- 		    (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS) ||
- 		     intel_pipe_has_type(crtc, INTEL_OUTPUT_EDP))) {
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0977-drm-gem-remove-drm_gem_object_handle_unreference.patch b/patches.baytrail/0977-drm-gem-remove-drm_gem_object_handle_unreference.patch
deleted file mode 100644
index 148a31faeeb0c..0000000000000
--- a/patches.baytrail/0977-drm-gem-remove-drm_gem_object_handle_unreference.patch
+++ /dev/null
@@ -1,48 +0,0 @@
-From b74517d77ad499162ebb235268d6ea85f27c86ab Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Tue, 16 Jul 2013 09:11:56 +0200
-Subject: drm/gem: remove drm_gem_object_handle_unreference
-
-It's unused, everyone is using the _unlocked variant only.
-
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Reviewed-by: Rob Clark <robdclark@gmail.com>
-Signed-off-by: Dave Airlie <airlied@gmail.com>
-(cherry picked from commit da5cbe361c55fe17ef94d2587991997f81f8c4cb)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- include/drm/drmP.h | 18 ------------------
- 1 file changed, 18 deletions(-)
-
-diff --git a/include/drm/drmP.h b/include/drm/drmP.h
-index ea284972a33c..a3e10cde0e6f 100644
---- a/include/drm/drmP.h
-+++ b/include/drm/drmP.h
-@@ -1605,24 +1605,6 @@ drm_gem_object_handle_reference(struct drm_gem_object *obj)
- }
- 
- static inline void
--drm_gem_object_handle_unreference(struct drm_gem_object *obj)
--{
--	if (obj == NULL)
--		return;
--
--	if (atomic_read(&obj->handle_count) == 0)
--		return;
--	/*
--	 * Must bump handle count first as this may be the last
--	 * ref, in which case the object would disappear before we
--	 * checked for a name
--	 */
--	if (atomic_dec_and_test(&obj->handle_count))
--		drm_gem_object_handle_free(obj);
--	drm_gem_object_unreference(obj);
--}
--
--static inline void
- drm_gem_object_handle_unreference_unlocked(struct drm_gem_object *obj)
- {
- 	if (obj == NULL)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0978-drm-gem-move-drm_gem_object_handle_unreference_unloc.patch b/patches.baytrail/0978-drm-gem-move-drm_gem_object_handle_unreference_unloc.patch
deleted file mode 100644
index bf11f5a5c7a87..0000000000000
--- a/patches.baytrail/0978-drm-gem-move-drm_gem_object_handle_unreference_unloc.patch
+++ /dev/null
@@ -1,174 +0,0 @@
-From adaa2893bdb96e1900852d34eefa42ef7686b16e Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 15 Aug 2013 00:02:34 +0200
-Subject: drm/gem: move drm_gem_object_handle_unreference_unlocked into
- drm_gem.c
-
-We have three callers of this function now and it's neither
-performance critical nor really small. So an inline function feels
-like overkill and unecessarily separates the different parts of the
-code.
-
-Since all callers of drm_gem_object_handle_free are now in drm_gem.c
-we can make that static (and remove the unused EXPORT_SYMBOL). To
-avoid a forward declaration move it (and drm_gem_object_free_bug) up a
-bit.
-
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit 36da5908a275d6319c17e758b5bde89b4f573959)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_gem.c | 89 ++++++++++++++++++++++++++++-------------------
- include/drm/drmP.h        | 21 +----------
- 2 files changed, 55 insertions(+), 55 deletions(-)
-
-diff --git a/drivers/gpu/drm/drm_gem.c b/drivers/gpu/drm/drm_gem.c
-index ee9ddc856710..22761edd1fdc 100644
---- a/drivers/gpu/drm/drm_gem.c
-+++ b/drivers/gpu/drm/drm_gem.c
-@@ -201,6 +201,60 @@ drm_gem_remove_prime_handles(struct drm_gem_object *obj, struct drm_file *filp)
- 	}
- }
- 
-+static void drm_gem_object_ref_bug(struct kref *list_kref)
-+{
-+	BUG();
-+}
-+
-+/**
-+ * Called after the last handle to the object has been closed
-+ *
-+ * Removes any name for the object. Note that this must be
-+ * called before drm_gem_object_free or we'll be touching
-+ * freed memory
-+ */
-+static void drm_gem_object_handle_free(struct drm_gem_object *obj)
-+{
-+	struct drm_device *dev = obj->dev;
-+
-+	/* Remove any name for this object */
-+	spin_lock(&dev->object_name_lock);
-+	if (obj->name) {
-+		idr_remove(&dev->object_name_idr, obj->name);
-+		obj->name = 0;
-+		spin_unlock(&dev->object_name_lock);
-+		/*
-+		 * The object name held a reference to this object, drop
-+		 * that now.
-+		*
-+		* This cannot be the last reference, since the handle holds one too.
-+		 */
-+		kref_put(&obj->refcount, drm_gem_object_ref_bug);
-+	} else
-+		spin_unlock(&dev->object_name_lock);
-+
-+}
-+
-+void
-+drm_gem_object_handle_unreference_unlocked(struct drm_gem_object *obj)
-+{
-+	if (obj == NULL)
-+		return;
-+
-+	if (atomic_read(&obj->handle_count) == 0)
-+		return;
-+
-+	/*
-+	* Must bump handle count first as this may be the last
-+	* ref, in which case the object would disappear before we
-+	* checked for a name
-+	*/
-+
-+	if (atomic_dec_and_test(&obj->handle_count))
-+		drm_gem_object_handle_free(obj);
-+	drm_gem_object_unreference_unlocked(obj);
-+}
-+
- /**
-  * Removes the mapping from handle to filp for this object.
-  */
-@@ -533,41 +587,6 @@ drm_gem_object_free(struct kref *kref)
- }
- EXPORT_SYMBOL(drm_gem_object_free);
- 
--static void drm_gem_object_ref_bug(struct kref *list_kref)
--{
--	BUG();
--}
--
--/**
-- * Called after the last handle to the object has been closed
-- *
-- * Removes any name for the object. Note that this must be
-- * called before drm_gem_object_free or we'll be touching
-- * freed memory
-- */
--void drm_gem_object_handle_free(struct drm_gem_object *obj)
--{
--	struct drm_device *dev = obj->dev;
--
--	/* Remove any name for this object */
--	spin_lock(&dev->object_name_lock);
--	if (obj->name) {
--		idr_remove(&dev->object_name_idr, obj->name);
--		obj->name = 0;
--		spin_unlock(&dev->object_name_lock);
--		/*
--		 * The object name held a reference to this object, drop
--		 * that now.
--		*
--		* This cannot be the last reference, since the handle holds one too.
--		 */
--		kref_put(&obj->refcount, drm_gem_object_ref_bug);
--	} else
--		spin_unlock(&dev->object_name_lock);
--
--}
--EXPORT_SYMBOL(drm_gem_object_handle_free);
--
- void drm_gem_vm_open(struct vm_area_struct *vma)
- {
- 	struct drm_gem_object *obj = vma->vm_private_data;
-diff --git a/include/drm/drmP.h b/include/drm/drmP.h
-index a3e10cde0e6f..ee035f8eb161 100644
---- a/include/drm/drmP.h
-+++ b/include/drm/drmP.h
-@@ -1559,7 +1559,6 @@ int drm_gem_object_init(struct drm_device *dev,
- 			struct drm_gem_object *obj, size_t size);
- void drm_gem_private_object_init(struct drm_device *dev,
- 				 struct drm_gem_object *obj, size_t size);
--void drm_gem_object_handle_free(struct drm_gem_object *obj);
- void drm_gem_vm_open(struct vm_area_struct *vma);
- void drm_gem_vm_close(struct vm_area_struct *vma);
- int drm_gem_mmap_obj(struct drm_gem_object *obj, unsigned long obj_size,
-@@ -1604,25 +1603,7 @@ drm_gem_object_handle_reference(struct drm_gem_object *obj)
- 	atomic_inc(&obj->handle_count);
- }
- 
--static inline void
--drm_gem_object_handle_unreference_unlocked(struct drm_gem_object *obj)
--{
--	if (obj == NULL)
--		return;
--
--	if (atomic_read(&obj->handle_count) == 0)
--		return;
--
--	/*
--	* Must bump handle count first as this may be the last
--	* ref, in which case the object would disappear before we
--	* checked for a name
--	*/
--
--	if (atomic_dec_and_test(&obj->handle_count))
--		drm_gem_object_handle_free(obj);
--	drm_gem_object_unreference_unlocked(obj);
--}
-+void drm_gem_object_handle_unreference_unlocked(struct drm_gem_object *obj);
- 
- void drm_gem_free_mmap_offset(struct drm_gem_object *obj);
- int drm_gem_create_mmap_offset(struct drm_gem_object *obj);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0979-drm-gem-remove-bogus-NULL-check-from-drm_gem_object_.patch b/patches.baytrail/0979-drm-gem-remove-bogus-NULL-check-from-drm_gem_object_.patch
deleted file mode 100644
index abf63c1696bd1..0000000000000
--- a/patches.baytrail/0979-drm-gem-remove-bogus-NULL-check-from-drm_gem_object_.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From 57ca4d3e695782c7b0234b4af7db57ed9eeb62af Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 15 Aug 2013 00:02:35 +0200
-Subject: drm/gem: remove bogus NULL check from
- drm_gem_object_handle_unreference_unlocked
-
-Calling this function with a NULL object is simply a bug, so papering
-over a NULL object not a good idea.
-
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit 6bc505b86ae9d4ab45464e3e3c0ab8992d6a5aff)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_gem.c | 3 ---
- 1 file changed, 3 deletions(-)
-
-diff --git a/drivers/gpu/drm/drm_gem.c b/drivers/gpu/drm/drm_gem.c
-index 22761edd1fdc..d2008204ff66 100644
---- a/drivers/gpu/drm/drm_gem.c
-+++ b/drivers/gpu/drm/drm_gem.c
-@@ -238,9 +238,6 @@ static void drm_gem_object_handle_free(struct drm_gem_object *obj)
- void
- drm_gem_object_handle_unreference_unlocked(struct drm_gem_object *obj)
- {
--	if (obj == NULL)
--		return;
--
- 	if (atomic_read(&obj->handle_count) == 0)
- 		return;
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0980-drm-gem-WARN-about-unbalanced-handle-refcounts.patch b/patches.baytrail/0980-drm-gem-WARN-about-unbalanced-handle-refcounts.patch
deleted file mode 100644
index 3082fd4d8e847..0000000000000
--- a/patches.baytrail/0980-drm-gem-WARN-about-unbalanced-handle-refcounts.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From 34042da46d25341229ec9e377512d4bb6a7277c3 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 15 Aug 2013 00:02:36 +0200
-Subject: drm/gem: WARN about unbalanced handle refcounts
-
-Trying to drop a reference we don't have is a pretty serious bug.
-Trying to paper over it is an even worse offense.
-
-So scream into dmesg with a big WARN in case that ever happens.
-
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit 1216f732379151cd581444e385a8266d0b54549d)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_gem.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/drm_gem.c b/drivers/gpu/drm/drm_gem.c
-index d2008204ff66..799c7fb73f15 100644
---- a/drivers/gpu/drm/drm_gem.c
-+++ b/drivers/gpu/drm/drm_gem.c
-@@ -238,7 +238,7 @@ static void drm_gem_object_handle_free(struct drm_gem_object *obj)
- void
- drm_gem_object_handle_unreference_unlocked(struct drm_gem_object *obj)
- {
--	if (atomic_read(&obj->handle_count) == 0)
-+	if (WARN_ON(atomic_read(&obj->handle_count) == 0))
- 		return;
- 
- 	/*
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0981-drm-gem-fix-up-flink-name-create-race.patch b/patches.baytrail/0981-drm-gem-fix-up-flink-name-create-race.patch
deleted file mode 100644
index 298f759b5b4c7..0000000000000
--- a/patches.baytrail/0981-drm-gem-fix-up-flink-name-create-race.patch
+++ /dev/null
@@ -1,224 +0,0 @@
-From a9d94064cfb097e910bbcde028972c8ba1c0eaea Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 15 Aug 2013 00:02:37 +0200
-Subject: drm/gem: fix up flink name create race
-
-This is the 2nd attempt, I've always been a bit dissatisified with the
-tricky nature of the first one:
-
-http://lists.freedesktop.org/archives/dri-devel/2012-July/025451.html
-
-The issue is that the flink ioctl can race with calling gem_close on
-the last gem handle. In that case we'll end up with a zero handle
-count, but an flink name (and it's corresponding reference). Which
-results in a neat space leak.
-
-In my first attempt I've solved this by rechecking the handle count.
-But fundamentally the issue is that ->handle_count isn't your usual
-refcount - it can be resurrected from 0 among other things.
-
-For those special beasts atomic_t often suggest way more ordering that
-it actually guarantees. To prevent being tricked by those hairy
-semantics take the easy way out and simply protect the handle with the
-existing dev->object_name_lock.
-
-With that change implemented it's dead easy to fix the flink vs. gem
-close reace: When we try to create the name we simply have to check
-whether there's still officially a gem handle around and if not refuse
-to create the flink name. Since the handle count decrement and flink
-name destruction is now also protected by that lock the reace is gone
-and we can't ever leak the flink reference again.
-
-Outside of the drm core only the exynos driver looks at the handle
-count, and tbh I have no idea why (it's just for debug dmesg output
-luckily).
-
-I've considered inlining the drm_gem_object_handle_free, but I plan to
-add more name-like things (like the exported dma_buf) to this scheme,
-so it's clearer to leave the handle freeing in its own function.
-
-This is exercised by the new gem_flink_race i-g-t testcase, which on
-my snb leaks gem objects at a rate of roughly 1k objects/s.
-
-v2: Fix up the error path handling in handle_create and make it more
-robust by simply calling object_handle_unreference.
-
-v3: Fix up the handle_unreference logic bug - atomic_dec_and_test
-retursn 1 for 0. Oops.
-
-v4: Squash in inlining of drm_gem_object_handle_reference as suggested
-by Dave Airlie and add a note that we now have a testcase.
-
-Cc: Dave Airlie <airlied@gmail.com>
-Cc: Inki Dae <inki.dae@samsung.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit a8e11d1c435f9d185c9f3b1981b9613a579b9999)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_gem.c               | 31 ++++++++++++++++++++-----------
- drivers/gpu/drm/drm_info.c              |  2 +-
- drivers/gpu/drm/exynos/exynos_drm_gem.c |  2 +-
- include/drm/drmP.h                      | 19 ++++++++++---------
- 4 files changed, 32 insertions(+), 22 deletions(-)
-
-diff --git a/drivers/gpu/drm/drm_gem.c b/drivers/gpu/drm/drm_gem.c
-index 799c7fb73f15..ca08ed73528f 100644
---- a/drivers/gpu/drm/drm_gem.c
-+++ b/drivers/gpu/drm/drm_gem.c
-@@ -154,7 +154,7 @@ void drm_gem_private_object_init(struct drm_device *dev,
- 	obj->filp = NULL;
- 
- 	kref_init(&obj->refcount);
--	atomic_set(&obj->handle_count, 0);
-+	obj->handle_count = 0;
- 	obj->size = size;
- }
- EXPORT_SYMBOL(drm_gem_private_object_init);
-@@ -218,11 +218,9 @@ static void drm_gem_object_handle_free(struct drm_gem_object *obj)
- 	struct drm_device *dev = obj->dev;
- 
- 	/* Remove any name for this object */
--	spin_lock(&dev->object_name_lock);
- 	if (obj->name) {
- 		idr_remove(&dev->object_name_idr, obj->name);
- 		obj->name = 0;
--		spin_unlock(&dev->object_name_lock);
- 		/*
- 		 * The object name held a reference to this object, drop
- 		 * that now.
-@@ -230,15 +228,13 @@ static void drm_gem_object_handle_free(struct drm_gem_object *obj)
- 		* This cannot be the last reference, since the handle holds one too.
- 		 */
- 		kref_put(&obj->refcount, drm_gem_object_ref_bug);
--	} else
--		spin_unlock(&dev->object_name_lock);
--
-+	}
- }
- 
- void
- drm_gem_object_handle_unreference_unlocked(struct drm_gem_object *obj)
- {
--	if (WARN_ON(atomic_read(&obj->handle_count) == 0))
-+	if (WARN_ON(obj->handle_count == 0))
- 		return;
- 
- 	/*
-@@ -247,8 +243,11 @@ drm_gem_object_handle_unreference_unlocked(struct drm_gem_object *obj)
- 	* checked for a name
- 	*/
- 
--	if (atomic_dec_and_test(&obj->handle_count))
-+	spin_lock(&obj->dev->object_name_lock);
-+	if (--obj->handle_count == 0)
- 		drm_gem_object_handle_free(obj);
-+	spin_unlock(&obj->dev->object_name_lock);
-+
- 	drm_gem_object_unreference_unlocked(obj);
- }
- 
-@@ -326,17 +325,21 @@ drm_gem_handle_create(struct drm_file *file_priv,
- 	 * allocation under our spinlock.
- 	 */
- 	idr_preload(GFP_KERNEL);
-+	spin_lock(&dev->object_name_lock);
- 	spin_lock(&file_priv->table_lock);
- 
- 	ret = idr_alloc(&file_priv->object_idr, obj, 1, 0, GFP_NOWAIT);
--
-+	drm_gem_object_reference(obj);
-+	obj->handle_count++;
- 	spin_unlock(&file_priv->table_lock);
-+	spin_unlock(&dev->object_name_lock);
- 	idr_preload_end();
--	if (ret < 0)
-+	if (ret < 0) {
-+		drm_gem_object_handle_unreference_unlocked(obj);
- 		return ret;
-+	}
- 	*handlep = ret;
- 
--	drm_gem_object_handle_reference(obj);
- 
- 	if (dev->driver->gem_open_object) {
- 		ret = dev->driver->gem_open_object(obj, file_priv);
-@@ -454,6 +457,12 @@ drm_gem_flink_ioctl(struct drm_device *dev, void *data,
- 
- 	idr_preload(GFP_KERNEL);
- 	spin_lock(&dev->object_name_lock);
-+	/* prevent races with concurrent gem_close. */
-+	if (obj->handle_count == 0) {
-+		ret = -ENOENT;
-+		goto err;
-+	}
-+
- 	if (!obj->name) {
- 		ret = idr_alloc(&dev->object_name_idr, obj, 1, 0, GFP_NOWAIT);
- 		if (ret < 0)
-diff --git a/drivers/gpu/drm/drm_info.c b/drivers/gpu/drm/drm_info.c
-index d4b20ceda3fb..f4b348c8f333 100644
---- a/drivers/gpu/drm/drm_info.c
-+++ b/drivers/gpu/drm/drm_info.c
-@@ -207,7 +207,7 @@ static int drm_gem_one_name_info(int id, void *ptr, void *data)
- 
- 	seq_printf(m, "%6d %8zd %7d %8d\n",
- 		   obj->name, obj->size,
--		   atomic_read(&obj->handle_count),
-+		   obj->handle_count,
- 		   atomic_read(&obj->refcount.refcount));
- 	return 0;
- }
-diff --git a/drivers/gpu/drm/exynos/exynos_drm_gem.c b/drivers/gpu/drm/exynos/exynos_drm_gem.c
-index e83930fdf6c7..aeb017ac046b 100644
---- a/drivers/gpu/drm/exynos/exynos_drm_gem.c
-+++ b/drivers/gpu/drm/exynos/exynos_drm_gem.c
-@@ -138,7 +138,7 @@ void exynos_drm_gem_destroy(struct exynos_drm_gem_obj *exynos_gem_obj)
- 	obj = &exynos_gem_obj->base;
- 	buf = exynos_gem_obj->buffer;
- 
--	DRM_DEBUG_KMS("handle count = %d\n", atomic_read(&obj->handle_count));
-+	DRM_DEBUG_KMS("handle count = %d\n", obj->handle_count);
- 
- 	/*
- 	 * do not release memory region from exporter.
-diff --git a/include/drm/drmP.h b/include/drm/drmP.h
-index ee035f8eb161..6d9a991fbde7 100644
---- a/include/drm/drmP.h
-+++ b/include/drm/drmP.h
-@@ -631,8 +631,16 @@ struct drm_gem_object {
- 	/** Reference count of this object */
- 	struct kref refcount;
- 
--	/** Handle count of this object. Each handle also holds a reference */
--	atomic_t handle_count; /* number of handles on this object */
-+	/**
-+	 * handle_count - gem file_priv handle count of this object
-+	 *
-+	 * Each handle also holds a reference. Note that when the handle_count
-+	 * drops to 0 any global names (e.g. the id in the flink namespace) will
-+	 * be cleared.
-+	 *
-+	 * Protected by dev->object_name_lock.
-+	 * */
-+	unsigned handle_count;
- 
- 	/** Related drm device */
- 	struct drm_device *dev;
-@@ -1596,13 +1604,6 @@ int drm_gem_handle_create(struct drm_file *file_priv,
- 			  u32 *handlep);
- int drm_gem_handle_delete(struct drm_file *filp, u32 handle);
- 
--static inline void
--drm_gem_object_handle_reference(struct drm_gem_object *obj)
--{
--	drm_gem_object_reference(obj);
--	atomic_inc(&obj->handle_count);
--}
--
- void drm_gem_object_handle_unreference_unlocked(struct drm_gem_object *obj);
- 
- void drm_gem_free_mmap_offset(struct drm_gem_object *obj);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0982-drm-prime-fix-error-path-in-drm_gem_prime_fd_to_hand.patch b/patches.baytrail/0982-drm-prime-fix-error-path-in-drm_gem_prime_fd_to_hand.patch
deleted file mode 100644
index ec39ab79f9b44..0000000000000
--- a/patches.baytrail/0982-drm-prime-fix-error-path-in-drm_gem_prime_fd_to_hand.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From 421160823f6c3ae825bdad6aab391b1db710078a Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 15 Aug 2013 00:02:38 +0200
-Subject: drm/prime: fix error path in drm_gem_prime_fd_to_handle
-
-handle_unreference only clears up the obj->name and the reference,
-but would leave a dangling handle in the idr. The right thing
-to do is to call handle_delete.
-
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit 730c4ff95eb54e5bab39357baddd0aa6da10d4fb)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_prime.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/drm_prime.c b/drivers/gpu/drm/drm_prime.c
-index 330df93ad2d2..01d6ccda7050 100644
---- a/drivers/gpu/drm/drm_prime.c
-+++ b/drivers/gpu/drm/drm_prime.c
-@@ -354,7 +354,7 @@ fail:
- 	/* hmm, if driver attached, we are relying on the free-object path
- 	 * to detach.. which seems ok..
- 	 */
--	drm_gem_object_handle_unreference_unlocked(obj);
-+	drm_gem_handle_delete(file_priv, *handle);
- out_put:
- 	dma_buf_put(dma_buf);
- 	mutex_unlock(&file_priv->prime.lock);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0983-drm-gem-make-drm_gem_object_handle_unreference_unloc.patch b/patches.baytrail/0983-drm-gem-make-drm_gem_object_handle_unreference_unloc.patch
deleted file mode 100644
index e197f9103fee4..0000000000000
--- a/patches.baytrail/0983-drm-gem-make-drm_gem_object_handle_unreference_unloc.patch
+++ /dev/null
@@ -1,46 +0,0 @@
-From af009fbaff2a5771ea2040d82fe85bc37aef9061 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 15 Aug 2013 00:02:39 +0200
-Subject: drm/gem: make drm_gem_object_handle_unreference_unlocked static
-
-No one outside of drm should use this, the official interfaces are
-drm_gem_handle_create and drm_gem_handle_delete. The handle refcounting
-is purely an implementation detail of gem.
-
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit becee2a57fd2b64c53ebef58277fbca895cf8ec1)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_gem.c | 2 +-
- include/drm/drmP.h        | 1 -
- 2 files changed, 1 insertion(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/drm_gem.c b/drivers/gpu/drm/drm_gem.c
-index ca08ed73528f..f8d2e63581e2 100644
---- a/drivers/gpu/drm/drm_gem.c
-+++ b/drivers/gpu/drm/drm_gem.c
-@@ -231,7 +231,7 @@ static void drm_gem_object_handle_free(struct drm_gem_object *obj)
- 	}
- }
- 
--void
-+static void
- drm_gem_object_handle_unreference_unlocked(struct drm_gem_object *obj)
- {
- 	if (WARN_ON(obj->handle_count == 0))
-diff --git a/include/drm/drmP.h b/include/drm/drmP.h
-index 6d9a991fbde7..a2bf60db69f9 100644
---- a/include/drm/drmP.h
-+++ b/include/drm/drmP.h
-@@ -1604,7 +1604,6 @@ int drm_gem_handle_create(struct drm_file *file_priv,
- 			  u32 *handlep);
- int drm_gem_handle_delete(struct drm_file *filp, u32 handle);
- 
--void drm_gem_object_handle_unreference_unlocked(struct drm_gem_object *obj);
- 
- void drm_gem_free_mmap_offset(struct drm_gem_object *obj);
- int drm_gem_create_mmap_offset(struct drm_gem_object *obj);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0984-drm-fix-locking-in-gem-debugfs-procfs-file.patch b/patches.baytrail/0984-drm-fix-locking-in-gem-debugfs-procfs-file.patch
deleted file mode 100644
index a50c0c2532fdc..0000000000000
--- a/patches.baytrail/0984-drm-fix-locking-in-gem-debugfs-procfs-file.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From 9103a2388d21401edcc8070a46315138ef6d002d Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 8 Aug 2013 15:41:33 +0200
-Subject: drm: fix locking in gem debugfs/procfs file
-
-The idr is protected with our spinlock, if we don't hold that nothing
-prevents the gem objects from disappearing from under us.
-
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit 90254ac084a6465e46cdada933bf3a7e9ee90277)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_info.c | 4 ++++
- 1 file changed, 4 insertions(+)
-
-diff --git a/drivers/gpu/drm/drm_info.c b/drivers/gpu/drm/drm_info.c
-index f4b348c8f333..5351e811c421 100644
---- a/drivers/gpu/drm/drm_info.c
-+++ b/drivers/gpu/drm/drm_info.c
-@@ -218,7 +218,11 @@ int drm_gem_name_info(struct seq_file *m, void *data)
- 	struct drm_device *dev = node->minor->dev;
- 
- 	seq_printf(m, "  name     size handles refcount\n");
-+
-+	spin_lock(&dev->object_name_lock);
- 	idr_for_each(&dev->object_name_idr, drm_gem_one_name_info, m);
-+	spin_unlock(&dev->object_name_lock);
-+
- 	return 0;
- }
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0985-drm-gem-switch-dev-object_name_lock-to-a-mutex.patch b/patches.baytrail/0985-drm-gem-switch-dev-object_name_lock-to-a-mutex.patch
deleted file mode 100644
index 2aa73a0a65213..0000000000000
--- a/patches.baytrail/0985-drm-gem-switch-dev-object_name_lock-to-a-mutex.patch
+++ /dev/null
@@ -1,139 +0,0 @@
-From 074b37ef3c0c37561b819c15d7483f154f77efab Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 15 Aug 2013 00:02:44 +0200
-Subject: drm/gem: switch dev->object_name_lock to a mutex
-
-I want to wrap the creation of a dma-buf from a gem object in it,
-so that the obj->export_dma_buf cache can be atomically filled in.
-
-Instead of creating a new mutex just for that variable I've figured
-I can reuse the existing dev->object_name_lock, especially since
-the new semantics will exactly mirror the flink obj->name already
-protected by that lock.
-
-v2: idr_preload/idr_preload_end is now an atomic section, so need to
-move the mutex locking outside.
-
-[airlied: fix up conflict with patch to make debugfs use lock]
-
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit cd4f013f3a4b6a55d484cc2e206dc08e055e5291)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_gem.c  | 18 +++++++++---------
- drivers/gpu/drm/drm_info.c |  4 ++--
- include/drm/drmP.h         |  2 +-
- 3 files changed, 12 insertions(+), 12 deletions(-)
-
-diff --git a/drivers/gpu/drm/drm_gem.c b/drivers/gpu/drm/drm_gem.c
-index f8d2e63581e2..16af10030b42 100644
---- a/drivers/gpu/drm/drm_gem.c
-+++ b/drivers/gpu/drm/drm_gem.c
-@@ -93,7 +93,7 @@ drm_gem_init(struct drm_device *dev)
- {
- 	struct drm_gem_mm *mm;
- 
--	spin_lock_init(&dev->object_name_lock);
-+	mutex_init(&dev->object_name_lock);
- 	idr_init(&dev->object_name_idr);
- 
- 	mm = kzalloc(sizeof(struct drm_gem_mm), GFP_KERNEL);
-@@ -243,10 +243,10 @@ drm_gem_object_handle_unreference_unlocked(struct drm_gem_object *obj)
- 	* checked for a name
- 	*/
- 
--	spin_lock(&obj->dev->object_name_lock);
-+	mutex_lock(&obj->dev->object_name_lock);
- 	if (--obj->handle_count == 0)
- 		drm_gem_object_handle_free(obj);
--	spin_unlock(&obj->dev->object_name_lock);
-+	mutex_unlock(&obj->dev->object_name_lock);
- 
- 	drm_gem_object_unreference_unlocked(obj);
- }
-@@ -324,16 +324,16 @@ drm_gem_handle_create(struct drm_file *file_priv,
- 	 * Get the user-visible handle using idr.  Preload and perform
- 	 * allocation under our spinlock.
- 	 */
-+	mutex_lock(&dev->object_name_lock);
- 	idr_preload(GFP_KERNEL);
--	spin_lock(&dev->object_name_lock);
- 	spin_lock(&file_priv->table_lock);
- 
- 	ret = idr_alloc(&file_priv->object_idr, obj, 1, 0, GFP_NOWAIT);
- 	drm_gem_object_reference(obj);
- 	obj->handle_count++;
- 	spin_unlock(&file_priv->table_lock);
--	spin_unlock(&dev->object_name_lock);
- 	idr_preload_end();
-+	mutex_unlock(&dev->object_name_lock);
- 	if (ret < 0) {
- 		drm_gem_object_handle_unreference_unlocked(obj);
- 		return ret;
-@@ -455,8 +455,8 @@ drm_gem_flink_ioctl(struct drm_device *dev, void *data,
- 	if (obj == NULL)
- 		return -ENOENT;
- 
-+	mutex_lock(&dev->object_name_lock);
- 	idr_preload(GFP_KERNEL);
--	spin_lock(&dev->object_name_lock);
- 	/* prevent races with concurrent gem_close. */
- 	if (obj->handle_count == 0) {
- 		ret = -ENOENT;
-@@ -478,8 +478,8 @@ drm_gem_flink_ioctl(struct drm_device *dev, void *data,
- 	ret = 0;
- 
- err:
--	spin_unlock(&dev->object_name_lock);
- 	idr_preload_end();
-+	mutex_unlock(&dev->object_name_lock);
- 	drm_gem_object_unreference_unlocked(obj);
- 	return ret;
- }
-@@ -502,11 +502,11 @@ drm_gem_open_ioctl(struct drm_device *dev, void *data,
- 	if (!(dev->driver->driver_features & DRIVER_GEM))
- 		return -ENODEV;
- 
--	spin_lock(&dev->object_name_lock);
-+	mutex_lock(&dev->object_name_lock);
- 	obj = idr_find(&dev->object_name_idr, (int) args->name);
- 	if (obj)
- 		drm_gem_object_reference(obj);
--	spin_unlock(&dev->object_name_lock);
-+	mutex_unlock(&dev->object_name_lock);
- 	if (!obj)
- 		return -ENOENT;
- 
-diff --git a/drivers/gpu/drm/drm_info.c b/drivers/gpu/drm/drm_info.c
-index 5351e811c421..53298320080b 100644
---- a/drivers/gpu/drm/drm_info.c
-+++ b/drivers/gpu/drm/drm_info.c
-@@ -219,9 +219,9 @@ int drm_gem_name_info(struct seq_file *m, void *data)
- 
- 	seq_printf(m, "  name     size handles refcount\n");
- 
--	spin_lock(&dev->object_name_lock);
-+	mutex_lock(&dev->object_name_lock);
- 	idr_for_each(&dev->object_name_idr, drm_gem_one_name_info, m);
--	spin_unlock(&dev->object_name_lock);
-+	mutex_unlock(&dev->object_name_lock);
- 
- 	return 0;
- }
-diff --git a/include/drm/drmP.h b/include/drm/drmP.h
-index a2bf60db69f9..52bf270b2d5a 100644
---- a/include/drm/drmP.h
-+++ b/include/drm/drmP.h
-@@ -1205,7 +1205,7 @@ struct drm_device {
- 
- 	/** \name GEM information */
- 	/*@{ */
--	spinlock_t object_name_lock;
-+	struct mutex object_name_lock;
- 	struct idr object_name_idr;
- 	/*@} */
- 	int switch_power_state;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0986-drm-prime-fix-to-put-an-exported-dma_buf-for-adding-.patch b/patches.baytrail/0986-drm-prime-fix-to-put-an-exported-dma_buf-for-adding-.patch
deleted file mode 100644
index 375d19cf86098..0000000000000
--- a/patches.baytrail/0986-drm-prime-fix-to-put-an-exported-dma_buf-for-adding-.patch
+++ /dev/null
@@ -1,48 +0,0 @@
-From faa1e45f388e05945de8176dbc2b59a91c5a71aa Mon Sep 17 00:00:00 2001
-From: YoungJun Cho <yj44.cho@samsung.com>
-Date: Wed, 26 Jun 2013 10:21:40 +0900
-Subject: drm/prime: fix to put an exported dma_buf for adding handle failure
-
-When drm_prime_add_buf_handle() returns failure for an exported
-dma_buf, the dma_buf was already allocated and its refcount was
-increased, so it needs to be put.
-
-Signed-off-by: YoungJun Cho <yj44.cho@samsung.com>
-Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
-Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit 7d8f06ac901300e0b517a263f571531ca27e47b6)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_prime.c | 8 +++++++-
- 1 file changed, 7 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/drm_prime.c b/drivers/gpu/drm/drm_prime.c
-index 01d6ccda7050..37b4a49b9afc 100644
---- a/drivers/gpu/drm/drm_prime.c
-+++ b/drivers/gpu/drm/drm_prime.c
-@@ -236,7 +236,7 @@ int drm_gem_prime_handle_to_fd(struct drm_device *dev,
- 	ret = drm_prime_add_buf_handle(&file_priv->prime,
- 				       obj->export_dma_buf, handle);
- 	if (ret)
--		goto out;
-+		goto fail_put_dmabuf;
- 
- 	*prime_fd = dma_buf_fd(buf, flags);
- 	mutex_unlock(&file_priv->prime.lock);
-@@ -245,6 +245,12 @@ int drm_gem_prime_handle_to_fd(struct drm_device *dev,
- out_have_obj:
- 	get_dma_buf(dmabuf);
- 	*prime_fd = dma_buf_fd(dmabuf, flags);
-+	goto out;
-+
-+fail_put_dmabuf:
-+	/* clear NOT to be checked when releasing dma_buf */
-+	obj->export_dma_buf = NULL;
-+	dma_buf_put(buf);
- out:
- 	drm_gem_object_unreference_unlocked(obj);
- 	mutex_unlock(&file_priv->prime.lock);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0987-drm-prime-add-return-check-for-dma_buf_fd.patch b/patches.baytrail/0987-drm-prime-add-return-check-for-dma_buf_fd.patch
deleted file mode 100644
index 16a364c86cf55..0000000000000
--- a/patches.baytrail/0987-drm-prime-add-return-check-for-dma_buf_fd.patch
+++ /dev/null
@@ -1,93 +0,0 @@
-From fb8137cbbda76579f772f9f26a2fdf9d04f6a53d Mon Sep 17 00:00:00 2001
-From: YoungJun Cho <yj44.cho@samsung.com>
-Date: Wed, 26 Jun 2013 10:21:42 +0900
-Subject: drm/prime: add return check for dma_buf_fd
-
-The dma_buf_fd() can return error when it fails to prepare fd,
-so the dma_buf needs to be put.
-
-Signed-off-by: YoungJun Cho <yj44.cho@samsung.com>
-Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
-Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit da34242e5e0638312130f5bd5d2d277afbc6f806)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_prime.c | 39 ++++++++++++++++++++++++++++-----------
- 1 file changed, 28 insertions(+), 11 deletions(-)
-
-diff --git a/drivers/gpu/drm/drm_prime.c b/drivers/gpu/drm/drm_prime.c
-index 37b4a49b9afc..08212d37d9b5 100644
---- a/drivers/gpu/drm/drm_prime.c
-+++ b/drivers/gpu/drm/drm_prime.c
-@@ -64,6 +64,21 @@ struct drm_prime_member {
- };
- static int drm_prime_add_buf_handle(struct drm_prime_file_private *prime_fpriv, struct dma_buf *dma_buf, uint32_t handle);
- 
-+static void drm_prime_remove_buf_handle_locked(
-+		struct drm_prime_file_private *prime_fpriv,
-+		struct dma_buf *dma_buf)
-+{
-+	struct drm_prime_member *member, *safe;
-+
-+	list_for_each_entry_safe(member, safe, &prime_fpriv->head, entry) {
-+		if (member->dma_buf == dma_buf) {
-+			dma_buf_put(dma_buf);
-+			list_del(&member->entry);
-+			kfree(member);
-+		}
-+	}
-+}
-+
- static struct sg_table *drm_gem_map_dma_buf(struct dma_buf_attachment *attach,
- 		enum dma_data_direction dir)
- {
-@@ -238,15 +253,25 @@ int drm_gem_prime_handle_to_fd(struct drm_device *dev,
- 	if (ret)
- 		goto fail_put_dmabuf;
- 
--	*prime_fd = dma_buf_fd(buf, flags);
-+	ret = dma_buf_fd(buf, flags);
-+	if (ret < 0)
-+		goto fail_rm_handle;
-+
-+	*prime_fd = ret;
- 	mutex_unlock(&file_priv->prime.lock);
- 	return 0;
- 
- out_have_obj:
- 	get_dma_buf(dmabuf);
--	*prime_fd = dma_buf_fd(dmabuf, flags);
-+	ret = dma_buf_fd(dmabuf, flags);
-+	if (ret < 0)
-+		dma_buf_put(dmabuf);
-+	else
-+		*prime_fd = ret;
- 	goto out;
- 
-+fail_rm_handle:
-+	drm_prime_remove_buf_handle_locked(&file_priv->prime, buf);
- fail_put_dmabuf:
- 	/* clear NOT to be checked when releasing dma_buf */
- 	obj->export_dma_buf = NULL;
-@@ -530,16 +555,8 @@ EXPORT_SYMBOL(drm_prime_lookup_buf_handle);
- 
- void drm_prime_remove_buf_handle(struct drm_prime_file_private *prime_fpriv, struct dma_buf *dma_buf)
- {
--	struct drm_prime_member *member, *safe;
--
- 	mutex_lock(&prime_fpriv->lock);
--	list_for_each_entry_safe(member, safe, &prime_fpriv->head, entry) {
--		if (member->dma_buf == dma_buf) {
--			dma_buf_put(dma_buf);
--			list_del(&member->entry);
--			kfree(member);
--		}
--	}
-+	drm_prime_remove_buf_handle_locked(prime_fpriv, dma_buf);
- 	mutex_unlock(&prime_fpriv->lock);
- }
- EXPORT_SYMBOL(drm_prime_remove_buf_handle);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0988-drm-prime-use-proper-pointer-in-drm_gem_prime_handle.patch b/patches.baytrail/0988-drm-prime-use-proper-pointer-in-drm_gem_prime_handle.patch
deleted file mode 100644
index e6ecd8ac6c272..0000000000000
--- a/patches.baytrail/0988-drm-prime-use-proper-pointer-in-drm_gem_prime_handle.patch
+++ /dev/null
@@ -1,75 +0,0 @@
-From 7263c004dde4fe50e5834ad127e68b9b3e8ab08a Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 15 Aug 2013 00:02:41 +0200
-Subject: drm/prime: use proper pointer in drm_gem_prime_handle_to_fd
-
-Part of the function uses the properly-typed dmabuf variable, the
-other an untyped void *buf. Kill the later.
-
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit 4332bf438bbbc31319abed61d2ac6d9932ff980c)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_prime.c | 16 ++++++++--------
- 1 file changed, 8 insertions(+), 8 deletions(-)
-
-diff --git a/drivers/gpu/drm/drm_prime.c b/drivers/gpu/drm/drm_prime.c
-index 08212d37d9b5..f22bf88c9a91 100644
---- a/drivers/gpu/drm/drm_prime.c
-+++ b/drivers/gpu/drm/drm_prime.c
-@@ -215,7 +215,6 @@ int drm_gem_prime_handle_to_fd(struct drm_device *dev,
- 		int *prime_fd)
- {
- 	struct drm_gem_object *obj;
--	void *buf;
- 	int ret = 0;
- 	struct dma_buf *dmabuf;
- 
-@@ -235,15 +234,15 @@ int drm_gem_prime_handle_to_fd(struct drm_device *dev,
- 		goto out_have_obj;
- 	}
- 
--	buf = dev->driver->gem_prime_export(dev, obj, flags);
--	if (IS_ERR(buf)) {
-+	dmabuf = dev->driver->gem_prime_export(dev, obj, flags);
-+	if (IS_ERR(dmabuf)) {
- 		/* normally the created dma-buf takes ownership of the ref,
- 		 * but if that fails then drop the ref
- 		 */
--		ret = PTR_ERR(buf);
-+		ret = PTR_ERR(dmabuf);
- 		goto out;
- 	}
--	obj->export_dma_buf = buf;
-+	obj->export_dma_buf = dmabuf;
- 
- 	/* if we've exported this buffer the cheat and add it to the import list
- 	 * so we get the correct handle back
-@@ -253,7 +252,7 @@ int drm_gem_prime_handle_to_fd(struct drm_device *dev,
- 	if (ret)
- 		goto fail_put_dmabuf;
- 
--	ret = dma_buf_fd(buf, flags);
-+	ret = dma_buf_fd(dmabuf, flags);
- 	if (ret < 0)
- 		goto fail_rm_handle;
- 
-@@ -271,11 +270,12 @@ out_have_obj:
- 	goto out;
- 
- fail_rm_handle:
--	drm_prime_remove_buf_handle_locked(&file_priv->prime, buf);
-+	drm_prime_remove_buf_handle_locked(&file_priv->prime,
-+					   dmabuf);
- fail_put_dmabuf:
- 	/* clear NOT to be checked when releasing dma_buf */
- 	obj->export_dma_buf = NULL;
--	dma_buf_put(buf);
-+	dma_buf_put(dmabuf);
- out:
- 	drm_gem_object_unreference_unlocked(obj);
- 	mutex_unlock(&file_priv->prime.lock);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0989-drm-gem-completely-close-gem_open-vs.-gem_close-race.patch b/patches.baytrail/0989-drm-gem-completely-close-gem_open-vs.-gem_close-race.patch
deleted file mode 100644
index 4c0466d665509..0000000000000
--- a/patches.baytrail/0989-drm-gem-completely-close-gem_open-vs.-gem_close-race.patch
+++ /dev/null
@@ -1,154 +0,0 @@
-From 6ff0698bdbed0ba2ffa6215f7ac3d42a3f0d0a1d Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 15 Aug 2013 00:02:45 +0200
-Subject: drm/gem: completely close gem_open vs. gem_close races
-
-The gem flink name holds a reference onto the object itself, and this
-self-reference would prevent an flink'ed object from every being
-freed. To break that loop we remove the flink name when the last
-userspace handle disappears, i.e. when obj->handle_count reaches 0.
-
-Now in gem_open we drop the dev->object_name_lock between the flink
-name lookup and actually adding the handle. This means a concurrent
-gem_close of the last handle could result in the flink name getting
-reaped right inbetween, i.e.
-
-Thread 1		Thread 2
-gem_open		gem_close
-
-flink -> obj lookup
-			handle_count drops to 0
-			remove flink name
-create_handle
-handle_count++
-
-If someone now flinks this object again, we'll get a new flink name.
-
-We can close this race by removing the lock dropping and making the
-entire lookup+handle_create sequence atomic. Unfortunately to still be
-able to share the handle_create logic this requires a
-handle_create_tail function which drops the lock - we can't hold the
-object_name_lock while calling into a driver's ->gem_open callback.
-
-Note that for flink fixing this race isn't really important, since
-racing gem_open against gem_close is clearly a userspace bug. And no
-matter how the race ends, we won't leak any references.
-
-But with dma-buf where the userspace dma-buf fd itself is refcounted
-this is a valid sequence and hence we should fix it. Therefore this
-patch here is just a warm-up exercise (and for consistency between
-flink buffer sharing and dma-buf buffer sharing with self-imports).
-
-Also note that this extension of the critical section in gem_open
-protected by dev->object_name_lock only works because it's now a
-mutex: A spinlock would conflict with the potential memory allocation
-in idr_preload().
-
-This is exercises by igt/gem_flink_race/flink_name.
-
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit 20228c447846da9399ead53fdbbc8ab69b47788a)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_gem.c | 42 +++++++++++++++++++++++++++++++-----------
- include/drm/drmP.h        |  3 +++
- 2 files changed, 34 insertions(+), 11 deletions(-)
-
-diff --git a/drivers/gpu/drm/drm_gem.c b/drivers/gpu/drm/drm_gem.c
-index 16af10030b42..8064a89ffaaf 100644
---- a/drivers/gpu/drm/drm_gem.c
-+++ b/drivers/gpu/drm/drm_gem.c
-@@ -308,23 +308,26 @@ int drm_gem_dumb_destroy(struct drm_file *file,
- EXPORT_SYMBOL(drm_gem_dumb_destroy);
- 
- /**
-- * Create a handle for this object. This adds a handle reference
-- * to the object, which includes a regular reference count. Callers
-- * will likely want to dereference the object afterwards.
-+ * drm_gem_handle_create_tail - internal functions to create a handle
-+ * 
-+ * This expects the dev->object_name_lock to be held already and will drop it
-+ * before returning. Used to avoid races in establishing new handles when
-+ * importing an object from either an flink name or a dma-buf.
-  */
- int
--drm_gem_handle_create(struct drm_file *file_priv,
--		       struct drm_gem_object *obj,
--		       u32 *handlep)
-+drm_gem_handle_create_tail(struct drm_file *file_priv,
-+			   struct drm_gem_object *obj,
-+			   u32 *handlep)
- {
- 	struct drm_device *dev = obj->dev;
- 	int ret;
- 
-+	WARN_ON(!mutex_is_locked(&dev->object_name_lock));
-+
- 	/*
- 	 * Get the user-visible handle using idr.  Preload and perform
- 	 * allocation under our spinlock.
- 	 */
--	mutex_lock(&dev->object_name_lock);
- 	idr_preload(GFP_KERNEL);
- 	spin_lock(&file_priv->table_lock);
- 
-@@ -351,6 +354,21 @@ drm_gem_handle_create(struct drm_file *file_priv,
- 
- 	return 0;
- }
-+
-+/**
-+ * Create a handle for this object. This adds a handle reference
-+ * to the object, which includes a regular reference count. Callers
-+ * will likely want to dereference the object afterwards.
-+ */
-+int
-+drm_gem_handle_create(struct drm_file *file_priv,
-+		       struct drm_gem_object *obj,
-+		       u32 *handlep)
-+{
-+	mutex_lock(&obj->dev->object_name_lock);
-+
-+	return drm_gem_handle_create_tail(file_priv, obj, handlep);
-+}
- EXPORT_SYMBOL(drm_gem_handle_create);
- 
- 
-@@ -504,13 +522,15 @@ drm_gem_open_ioctl(struct drm_device *dev, void *data,
- 
- 	mutex_lock(&dev->object_name_lock);
- 	obj = idr_find(&dev->object_name_idr, (int) args->name);
--	if (obj)
-+	if (obj) {
- 		drm_gem_object_reference(obj);
--	mutex_unlock(&dev->object_name_lock);
--	if (!obj)
-+	} else {
-+		mutex_unlock(&dev->object_name_lock);
- 		return -ENOENT;
-+	}
- 
--	ret = drm_gem_handle_create(file_priv, obj, &handle);
-+	/* drm_gem_handle_create_tail unlocks dev->object_name_lock. */
-+	ret = drm_gem_handle_create_tail(file_priv, obj, &handle);
- 	drm_gem_object_unreference_unlocked(obj);
- 	if (ret)
- 		return ret;
-diff --git a/include/drm/drmP.h b/include/drm/drmP.h
-index 52bf270b2d5a..e56491784adb 100644
---- a/include/drm/drmP.h
-+++ b/include/drm/drmP.h
-@@ -1599,6 +1599,9 @@ drm_gem_object_unreference_unlocked(struct drm_gem_object *obj)
- 	}
- }
- 
-+int drm_gem_handle_create_tail(struct drm_file *file_priv,
-+			       struct drm_gem_object *obj,
-+			       u32 *handlep);
- int drm_gem_handle_create(struct drm_file *file_priv,
- 			  struct drm_gem_object *obj,
- 			  u32 *handlep);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0990-drm-prime-proper-locking-refcounting-for-obj-dma_buf.patch b/patches.baytrail/0990-drm-prime-proper-locking-refcounting-for-obj-dma_buf.patch
deleted file mode 100644
index 020629a4e5016..0000000000000
--- a/patches.baytrail/0990-drm-prime-proper-locking-refcounting-for-obj-dma_buf.patch
+++ /dev/null
@@ -1,295 +0,0 @@
-From 902e524dc61e38010c1a5acb3a89485d05b18e4f Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 15 Aug 2013 00:02:46 +0200
-Subject: drm/prime: proper locking+refcounting for obj->dma_buf link
-
-The export dma-buf cache is semantically similar to an flink name. So
-semantically it makes sense to treat it the same and remove the name
-(i.e. the dma_buf pointer) and its references when the last gem handle
-disappears.
-
-Again we need to be careful, but double so: Not just could someone
-race and export with a gem close ioctl (so we need to recheck
-obj->handle_count again when assigning the new name), but multiple
-exports can also race against each another. This is prevented by
-holding the dev->object_name_lock across the entire section which
-touches obj->dma_buf.
-
-With the new scheme we also need to reinstate the obj->dma_buf link at
-import time (in case the only reference userspace has held in-between
-was through the dma-buf fd and not through any native gem handle). For
-simplicity we don't check whether it's a native object but
-unconditionally set up that link - with the new scheme of removing the
-obj->dma_buf reference when the last handle disappears we can do that.
-
-To make it clear that this is not just for exported buffers anymore
-als rename it from export_dma_buf to dma_buf.
-
-To make sure that now one can race a fd_to_handle or handle_to_fd with
-gem_close we use the same tricks as in flink of extending the
-dev->object_name_locking critical section. With this change we finally
-have a guaranteed 1:1 relationship (at least for native objects)
-between gem objects and dma-bufs, even accounting for races (which can
-happen since the dma-buf itself holds a reference while in-flight).
-
-This prevent igt/prime_self_import/export-vs-gem_close-race from
-Oopsing the kernel. There is still a leak though since the per-file
-priv dma-buf/handle cache handling is racy. That will be fixed in a
-later patch.
-
-v2: Remove the bogus dma_buf_put from the export_and_register_object
-failure path if we've raced with the handle count dropping to 0.
-
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit 319c933c71f3dbdb2b3274d1634d3494c70efa06)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_fops.c  |  1 +
- drivers/gpu/drm/drm_gem.c   | 24 ++++++++++++++--
- drivers/gpu/drm/drm_prime.c | 70 +++++++++++++++++++++++++++++++++++----------
- include/drm/drmP.h          | 12 ++++++--
- 4 files changed, 87 insertions(+), 20 deletions(-)
-
-diff --git a/drivers/gpu/drm/drm_fops.c b/drivers/gpu/drm/drm_fops.c
-index a4e4f32ec1e3..49bec8a62d89 100644
---- a/drivers/gpu/drm/drm_fops.c
-+++ b/drivers/gpu/drm/drm_fops.c
-@@ -516,6 +516,7 @@ int drm_release(struct inode *inode, struct file *filp)
- 	if (dev->driver->postclose)
- 		dev->driver->postclose(dev, file_priv);
- 
-+
- 	if (drm_core_check_feature(dev, DRIVER_PRIME))
- 		drm_prime_destroy_file_private(&file_priv->prime);
- 
-diff --git a/drivers/gpu/drm/drm_gem.c b/drivers/gpu/drm/drm_gem.c
-index 8064a89ffaaf..070bd8b3009a 100644
---- a/drivers/gpu/drm/drm_gem.c
-+++ b/drivers/gpu/drm/drm_gem.c
-@@ -195,9 +195,14 @@ drm_gem_remove_prime_handles(struct drm_gem_object *obj, struct drm_file *filp)
- 		drm_prime_remove_buf_handle(&filp->prime,
- 				obj->import_attach->dmabuf);
- 	}
--	if (obj->export_dma_buf) {
-+
-+	/*
-+	 * Note: obj->dma_buf can't disappear as long as we still hold a
-+	 * handle reference in obj->handle_count.
-+	 */
-+	if (obj->dma_buf) {
- 		drm_prime_remove_buf_handle(&filp->prime,
--				obj->export_dma_buf);
-+				obj->dma_buf);
- 	}
- }
- 
-@@ -231,6 +236,15 @@ static void drm_gem_object_handle_free(struct drm_gem_object *obj)
- 	}
- }
- 
-+static void drm_gem_object_exported_dma_buf_free(struct drm_gem_object *obj)
-+{
-+	/* Unbreak the reference cycle if we have an exported dma_buf. */
-+	if (obj->dma_buf) {
-+		dma_buf_put(obj->dma_buf);
-+		obj->dma_buf = NULL;
-+	}
-+}
-+
- static void
- drm_gem_object_handle_unreference_unlocked(struct drm_gem_object *obj)
- {
-@@ -244,8 +258,10 @@ drm_gem_object_handle_unreference_unlocked(struct drm_gem_object *obj)
- 	*/
- 
- 	mutex_lock(&obj->dev->object_name_lock);
--	if (--obj->handle_count == 0)
-+	if (--obj->handle_count == 0) {
- 		drm_gem_object_handle_free(obj);
-+		drm_gem_object_exported_dma_buf_free(obj);
-+	}
- 	mutex_unlock(&obj->dev->object_name_lock);
- 
- 	drm_gem_object_unreference_unlocked(obj);
-@@ -589,6 +605,8 @@ drm_gem_release(struct drm_device *dev, struct drm_file *file_private)
- void
- drm_gem_object_release(struct drm_gem_object *obj)
- {
-+	WARN_ON(obj->dma_buf);
-+
- 	if (obj->filp)
- 	    fput(obj->filp);
- }
-diff --git a/drivers/gpu/drm/drm_prime.c b/drivers/gpu/drm/drm_prime.c
-index f22bf88c9a91..5dd44ee41b19 100644
---- a/drivers/gpu/drm/drm_prime.c
-+++ b/drivers/gpu/drm/drm_prime.c
-@@ -108,11 +108,8 @@ void drm_gem_dmabuf_release(struct dma_buf *dma_buf)
- {
- 	struct drm_gem_object *obj = dma_buf->priv;
- 
--	if (obj->export_dma_buf == dma_buf) {
--		/* drop the reference on the export fd holds */
--		obj->export_dma_buf = NULL;
--		drm_gem_object_unreference_unlocked(obj);
--	}
-+	/* drop the reference on the export fd holds */
-+	drm_gem_object_unreference_unlocked(obj);
- }
- EXPORT_SYMBOL(drm_gem_dmabuf_release);
- 
-@@ -210,6 +207,37 @@ struct dma_buf *drm_gem_prime_export(struct drm_device *dev,
- }
- EXPORT_SYMBOL(drm_gem_prime_export);
- 
-+static struct dma_buf *export_and_register_object(struct drm_device *dev,
-+						  struct drm_gem_object *obj,
-+						  uint32_t flags)
-+{
-+	struct dma_buf *dmabuf;
-+
-+	/* prevent races with concurrent gem_close. */
-+	if (obj->handle_count == 0) {
-+		dmabuf = ERR_PTR(-ENOENT);
-+		return dmabuf;
-+	}
-+
-+	dmabuf = dev->driver->gem_prime_export(dev, obj, flags);
-+	if (IS_ERR(dmabuf)) {
-+		/* normally the created dma-buf takes ownership of the ref,
-+		 * but if that fails then drop the ref
-+		 */
-+		return dmabuf;
-+	}
-+
-+	/*
-+	 * Note that callers do not need to clean up the export cache
-+	 * since the check for obj->handle_count guarantees that someone
-+	 * will clean it up.
-+	 */
-+	obj->dma_buf = dmabuf;
-+	get_dma_buf(obj->dma_buf);
-+
-+	return dmabuf;
-+}
-+
- int drm_gem_prime_handle_to_fd(struct drm_device *dev,
- 		struct drm_file *file_priv, uint32_t handle, uint32_t flags,
- 		int *prime_fd)
-@@ -226,15 +254,20 @@ int drm_gem_prime_handle_to_fd(struct drm_device *dev,
- 	/* re-export the original imported object */
- 	if (obj->import_attach) {
- 		dmabuf = obj->import_attach->dmabuf;
-+		get_dma_buf(dmabuf);
- 		goto out_have_obj;
- 	}
- 
--	if (obj->export_dma_buf) {
--		dmabuf = obj->export_dma_buf;
-+	mutex_lock(&dev->object_name_lock);
-+	if (obj->dma_buf) {
-+		get_dma_buf(obj->dma_buf);
-+		dmabuf = obj->dma_buf;
-+		mutex_unlock(&dev->object_name_lock);
- 		goto out_have_obj;
- 	}
- 
--	dmabuf = dev->driver->gem_prime_export(dev, obj, flags);
-+	dmabuf = export_and_register_object(dev, obj, flags);
-+	mutex_unlock(&dev->object_name_lock);
- 	if (IS_ERR(dmabuf)) {
- 		/* normally the created dma-buf takes ownership of the ref,
- 		 * but if that fails then drop the ref
-@@ -242,13 +275,12 @@ int drm_gem_prime_handle_to_fd(struct drm_device *dev,
- 		ret = PTR_ERR(dmabuf);
- 		goto out;
- 	}
--	obj->export_dma_buf = dmabuf;
- 
- 	/* if we've exported this buffer the cheat and add it to the import list
- 	 * so we get the correct handle back
- 	 */
- 	ret = drm_prime_add_buf_handle(&file_priv->prime,
--				       obj->export_dma_buf, handle);
-+				       dmabuf, handle);
- 	if (ret)
- 		goto fail_put_dmabuf;
- 
-@@ -261,7 +293,6 @@ int drm_gem_prime_handle_to_fd(struct drm_device *dev,
- 	return 0;
- 
- out_have_obj:
--	get_dma_buf(dmabuf);
- 	ret = dma_buf_fd(dmabuf, flags);
- 	if (ret < 0)
- 		dma_buf_put(dmabuf);
-@@ -273,8 +304,6 @@ fail_rm_handle:
- 	drm_prime_remove_buf_handle_locked(&file_priv->prime,
- 					   dmabuf);
- fail_put_dmabuf:
--	/* clear NOT to be checked when releasing dma_buf */
--	obj->export_dma_buf = NULL;
- 	dma_buf_put(dmabuf);
- out:
- 	drm_gem_object_unreference_unlocked(obj);
-@@ -359,13 +388,22 @@ int drm_gem_prime_fd_to_handle(struct drm_device *dev,
- 	}
- 
- 	/* never seen this one, need to import */
-+	mutex_lock(&dev->object_name_lock);
- 	obj = dev->driver->gem_prime_import(dev, dma_buf);
- 	if (IS_ERR(obj)) {
- 		ret = PTR_ERR(obj);
--		goto out_put;
-+		goto out_unlock;
-+	}
-+
-+	if (obj->dma_buf) {
-+		WARN_ON(obj->dma_buf != dma_buf);
-+	} else {
-+		obj->dma_buf = dma_buf;
-+		get_dma_buf(dma_buf);
- 	}
- 
--	ret = drm_gem_handle_create(file_priv, obj, handle);
-+	/* drm_gem_handle_create_tail unlocks dev->object_name_lock. */
-+	ret = drm_gem_handle_create_tail(file_priv, obj, handle);
- 	drm_gem_object_unreference_unlocked(obj);
- 	if (ret)
- 		goto out_put;
-@@ -386,6 +424,8 @@ fail:
- 	 * to detach.. which seems ok..
- 	 */
- 	drm_gem_handle_delete(file_priv, *handle);
-+out_unlock:
-+	mutex_lock(&dev->object_name_lock);
- out_put:
- 	dma_buf_put(dma_buf);
- 	mutex_unlock(&file_priv->prime.lock);
-diff --git a/include/drm/drmP.h b/include/drm/drmP.h
-index e56491784adb..4bad54c302f6 100644
---- a/include/drm/drmP.h
-+++ b/include/drm/drmP.h
-@@ -683,8 +683,16 @@ struct drm_gem_object {
- 
- 	void *driver_private;
- 
--	/* dma buf exported from this GEM object */
--	struct dma_buf *export_dma_buf;
-+	/**
-+	 * dma_buf - dma buf associated with this GEM object
-+	 *
-+	 * Pointer to the dma-buf associated with this gem object (either
-+	 * through importing or exporting). We break the resulting reference
-+	 * loop when the last gem handle for this object is released.
-+	 *
-+	 * Protected by obj->object_name_lock
-+	 */
-+	struct dma_buf *dma_buf;
- 
- 	/* dma buf attachment backing this object */
- 	struct dma_buf_attachment *import_attach;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0991-drm-cirrus-remove-unused-driver_private-access.patch b/patches.baytrail/0991-drm-cirrus-remove-unused-driver_private-access.patch
deleted file mode 100644
index d99b9cc0ce049..0000000000000
--- a/patches.baytrail/0991-drm-cirrus-remove-unused-driver_private-access.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 8398b622c193f8ae7b76114299198b99c79322ac Mon Sep 17 00:00:00 2001
-From: David Herrmann <dh.herrmann@gmail.com>
-Date: Wed, 14 Aug 2013 15:07:16 +0200
-Subject: drm/cirrus: remove unused driver_private access
-
-gem_bo->driver_private is never read by cirrus nor DRM core. No need to
-set it. Besides, drm core clears it during setup, anyway.
-
-Signed-off-by: David Herrmann <dh.herrmann@gmail.com>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit 23a9a2e075fa4a8a46575977ed2cc531424a6d2c
-  from ~danvet/drm-intel/drm-intel-next)
-
-[bleung: 3.10 baytrail drm branch merge : pick to fix build break
- because of removed driver_private in gem]
-
-Signed-off-by: Benson Leung <bleung@chromium.org>
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/cirrus/cirrus_ttm.c | 1 -
- 1 file changed, 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/cirrus/cirrus_ttm.c b/drivers/gpu/drm/cirrus/cirrus_ttm.c
-index 2c62eb44d377..18fd437d3e6e 100644
---- a/drivers/gpu/drm/cirrus/cirrus_ttm.c
-+++ b/drivers/gpu/drm/cirrus/cirrus_ttm.c
-@@ -344,7 +344,6 @@ int cirrus_bo_create(struct drm_device *dev, int size, int align,
- 		return ret;
- 	}
- 
--	cirrusbo->gem.driver_private = NULL;
- 	cirrusbo->bo.bdev = &cirrus->ttm.bdev;
- 	cirrusbo->bo.bdev->dev_mapping = dev->dev_mapping;
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0992-drm-edid-add-drm_edid_duplicate.patch b/patches.baytrail/0992-drm-edid-add-drm_edid_duplicate.patch
deleted file mode 100644
index b5fb2ff7145bb..0000000000000
--- a/patches.baytrail/0992-drm-edid-add-drm_edid_duplicate.patch
+++ /dev/null
@@ -1,47 +0,0 @@
-From 13c2c819776a597b79d2d9706823779ddaad8402 Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Fri, 27 Sep 2013 15:08:27 +0300
-Subject: drm/edid: add drm_edid_duplicate
-
-We have some code duplication related to EDID duplication. Add a helper.
-
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit 51f8da5916f85c18b696f74f97970e5a7330147e)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_edid.c |   12 ++++++++++++
- include/drm/drm_crtc.h     |    1 +
- 2 files changed, 13 insertions(+)
-
---- a/drivers/gpu/drm/drm_edid.c
-+++ b/drivers/gpu/drm/drm_edid.c
-@@ -1266,6 +1266,18 @@ struct edid *drm_get_edid(struct drm_con
- }
- EXPORT_SYMBOL(drm_get_edid);
- 
-+/**
-+ * drm_edid_duplicate - duplicate an EDID and the extensions
-+ * @edid: EDID to duplicate
-+ *
-+ * Return duplicate edid or NULL on allocation failure.
-+ */
-+struct edid *drm_edid_duplicate(const struct edid *edid)
-+{
-+	return kmemdup(edid, (edid->extensions + 1) * EDID_LENGTH, GFP_KERNEL);
-+}
-+EXPORT_SYMBOL(drm_edid_duplicate);
-+
- /*** EDID parsing ***/
- 
- /**
---- a/include/drm/drm_crtc.h
-+++ b/include/drm/drm_crtc.h
-@@ -919,6 +919,7 @@ extern int drm_mode_group_init_legacy_gr
- extern bool drm_probe_ddc(struct i2c_adapter *adapter);
- extern struct edid *drm_get_edid(struct drm_connector *connector,
- 				 struct i2c_adapter *adapter);
-+extern struct edid *drm_edid_duplicate(const struct edid *edid);
- extern int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid);
- extern void drm_mode_probed_add(struct drm_connector *connector, struct drm_display_mode *mode);
- extern void drm_mode_remove(struct drm_connector *connector, struct drm_display_mode *mode);
diff --git a/patches.baytrail/0993-drm-i915-dp-use-drm_edid_duplicate.patch b/patches.baytrail/0993-drm-i915-dp-use-drm_edid_duplicate.patch
deleted file mode 100644
index 28200724eda73..0000000000000
--- a/patches.baytrail/0993-drm-i915-dp-use-drm_edid_duplicate.patch
+++ /dev/null
@@ -1,38 +0,0 @@
-From e7c4d122bdcb3abe3fb63c54f783b7a402497573 Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Tue, 1 Oct 2013 10:38:54 +0300
-Subject: drm/i915/dp: use drm_edid_duplicate
-
-v2: duplicate intel_connector->edid, not uninitialized edid (Dave Airlie).
-
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit 55e9edeb57ed9dd9be6773c5230187d701b14a46)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_dp.c |   10 +---------
- 1 file changed, 1 insertion(+), 9 deletions(-)
-
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -2988,19 +2988,11 @@ intel_dp_get_edid(struct drm_connector *
- 
- 	/* use cached edid if we have one */
- 	if (intel_connector->edid) {
--		struct edid *edid;
--		int size;
--
- 		/* invalid edid */
- 		if (IS_ERR(intel_connector->edid))
- 			return NULL;
- 
--		size = (intel_connector->edid->extensions + 1) * EDID_LENGTH;
--		edid = kmemdup(intel_connector->edid, size, GFP_KERNEL);
--		if (!edid)
--			return NULL;
--
--		return edid;
-+		return drm_edid_duplicate(intel_connector->edid);
- 	}
- 
- 	return drm_get_edid(connector, adapter);
diff --git a/patches.baytrail/0994-drm-Make-vblank_disable_allowed-bool.patch b/patches.baytrail/0994-drm-Make-vblank_disable_allowed-bool.patch
deleted file mode 100644
index ab06391da5462..0000000000000
--- a/patches.baytrail/0994-drm-Make-vblank_disable_allowed-bool.patch
+++ /dev/null
@@ -1,134 +0,0 @@
-From c01f64b55cbe6102ec494a4422ce0694d16c1633 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Fri, 4 Oct 2013 14:53:33 +0300
-Subject: drm: Make vblank_disable_allowed bool
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-vblank_disable_allowed is only ever 0 or 1, so make it a bool.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit ba0bf1200ec75722c558c56f58c596ff42a3b494)
-Signed-off-by: James Ausmus <james.ausmus@intel.com>
-
-Conflicts:
-	drivers/gpu/drm/i915/i915_dma.c
-	(used resolution from 967ad7f ("Merge remote-tracking branch
-	'airlied/drm-next' into drm-intel-next"))
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_irq.c                |    5 +++--
- drivers/gpu/drm/exynos/exynos_drm_fimd.c |    4 ++--
- drivers/gpu/drm/exynos/exynos_drm_vidi.c |    4 ++--
- drivers/gpu/drm/gma500/psb_drv.c         |    2 +-
- drivers/gpu/drm/i915/i915_dma.c          |    2 +-
- drivers/staging/imx-drm/imx-drm-core.c   |    4 ++--
- include/drm/drmP.h                       |    2 +-
- 7 files changed, 12 insertions(+), 11 deletions(-)
-
---- a/drivers/gpu/drm/drm_irq.c
-+++ b/drivers/gpu/drm/drm_irq.c
-@@ -271,7 +271,8 @@ int drm_vblank_init(struct drm_device *d
- 		atomic_set(&dev->vblank_refcount[i], 0);
- 	}
- 
--	dev->vblank_disable_allowed = 0;
-+	dev->vblank_disable_allowed = false;
-+
- 	return 0;
- 
- err:
-@@ -1085,7 +1086,7 @@ void drm_vblank_post_modeset(struct drm_
- 
- 	if (dev->vblank_inmodeset[crtc]) {
- 		spin_lock_irqsave(&dev->vbl_lock, irqflags);
--		dev->vblank_disable_allowed = 1;
-+		dev->vblank_disable_allowed = true;
- 		spin_unlock_irqrestore(&dev->vbl_lock, irqflags);
- 
- 		if (dev->vblank_inmodeset[crtc] & 0x2)
---- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
-+++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
-@@ -710,11 +710,11 @@ static int fimd_subdrv_probe(struct drm_
- 	drm_dev->irq_enabled = 1;
- 
- 	/*
--	 * with vblank_disable_allowed = 1, vblank interrupt will be disabled
-+	 * with vblank_disable_allowed = true, vblank interrupt will be disabled
- 	 * by drm timer once a current process gives up ownership of
- 	 * vblank event.(after drm_vblank_put function is called)
- 	 */
--	drm_dev->vblank_disable_allowed = 1;
-+	drm_dev->vblank_disable_allowed = true;
- 
- 	/* attach this sub driver to iommu mapping if supported. */
- 	if (is_drm_iommu_supported(drm_dev))
---- a/drivers/gpu/drm/exynos/exynos_drm_vidi.c
-+++ b/drivers/gpu/drm/exynos/exynos_drm_vidi.c
-@@ -420,11 +420,11 @@ static int vidi_subdrv_probe(struct drm_
- 	drm_dev->irq_enabled = 1;
- 
- 	/*
--	 * with vblank_disable_allowed = 1, vblank interrupt will be disabled
-+	 * with vblank_disable_allowed = true, vblank interrupt will be disabled
- 	 * by drm timer once a current process gives up ownership of
- 	 * vblank event.(after drm_vblank_put function is called)
- 	 */
--	drm_dev->vblank_disable_allowed = 1;
-+	drm_dev->vblank_disable_allowed = true;
- 
- 	return 0;
- }
---- a/drivers/gpu/drm/gma500/psb_drv.c
-+++ b/drivers/gpu/drm/gma500/psb_drv.c
-@@ -359,7 +359,7 @@ static int psb_driver_load(struct drm_de
- 
- 	drm_irq_install(dev);
- 
--	dev->vblank_disable_allowed = 1;
-+	dev->vblank_disable_allowed = true;
- 
- 	dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */
- 
---- a/drivers/gpu/drm/i915/i915_dma.c
-+++ b/drivers/gpu/drm/i915/i915_dma.c
-@@ -1341,7 +1341,7 @@ static int i915_load_modeset_init(struct
- 
- 	/* Always safe in the mode setting case. */
- 	/* FIXME: do pre/post-mode set stuff in core KMS code */
--	dev->vblank_disable_allowed = 1;
-+	dev->vblank_disable_allowed = true;
- 	if (INTEL_INFO(dev)->num_pipes == 0) {
- 		intel_display_power_put(dev, POWER_DOMAIN_VGA);
- 		return 0;
---- a/drivers/staging/imx-drm/imx-drm-core.c
-+++ b/drivers/staging/imx-drm/imx-drm-core.c
-@@ -440,11 +440,11 @@ static int imx_drm_driver_load(struct dr
- 		goto err_init;
- 
- 	/*
--	 * with vblank_disable_allowed = 1, vblank interrupt will be disabled
-+	 * with vblank_disable_allowed = true, vblank interrupt will be disabled
- 	 * by drm timer once a current process gives up ownership of
- 	 * vblank event.(after drm_vblank_put function is called)
- 	 */
--	imxdrm->drm->vblank_disable_allowed = 1;
-+	imxdrm->drm->vblank_disable_allowed = true;
- 
- 	ret = 0;
- 
---- a/include/drm/drmP.h
-+++ b/include/drm/drmP.h
-@@ -1155,7 +1155,7 @@ struct drm_device {
- 	 * Once the modeset ioctl *has* been called though, we can safely
- 	 * disable them when unused.
- 	 */
--	int vblank_disable_allowed;
-+	bool vblank_disable_allowed;
- 
- 	wait_queue_head_t *vbl_queue;   /**< VBLANK wait queue */
- 	atomic_t *_vblank_count;        /**< number of VBLANK interrupts (driver must alloc the right number of counters) */
diff --git a/patches.baytrail/0995-drm-Make-vblank_enabled-bool.patch b/patches.baytrail/0995-drm-Make-vblank_enabled-bool.patch
deleted file mode 100644
index 5ae9dd42b69b4..0000000000000
--- a/patches.baytrail/0995-drm-Make-vblank_enabled-bool.patch
+++ /dev/null
@@ -1,91 +0,0 @@
-From 51c5a567d754fc2177d734100250bbcfa599cf7e Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Fri, 4 Oct 2013 14:53:35 +0300
-Subject: drm: Make vblank_enabled bool
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-vblank_enabled is only ever 0 or 1, so make it a bool.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit bf507d90cf0eecf5495f66f21dbb66e35e9131ae)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_irq.c          | 8 ++++----
- drivers/gpu/drm/omapdrm/omap_irq.c | 2 +-
- include/drm/drmP.h                 | 2 +-
- 3 files changed, 6 insertions(+), 6 deletions(-)
-
-diff --git a/drivers/gpu/drm/drm_irq.c b/drivers/gpu/drm/drm_irq.c
-index 81b4c84449a4..49680a8ab96a 100644
---- a/drivers/gpu/drm/drm_irq.c
-+++ b/drivers/gpu/drm/drm_irq.c
-@@ -115,7 +115,7 @@ static void vblank_disable_and_save(struct drm_device *dev, int crtc)
- 	spin_lock_irqsave(&dev->vblank_time_lock, irqflags);
- 
- 	dev->driver->disable_vblank(dev, crtc);
--	dev->vblank_enabled[crtc] = 0;
-+	dev->vblank_enabled[crtc] = false;
- 
- 	/* No further vblank irq's will be processed after
- 	 * this point. Get current hardware vblank count and
-@@ -235,7 +235,7 @@ int drm_vblank_init(struct drm_device *dev, int num_crtcs)
- 	if (!dev->vblank_refcount)
- 		goto err;
- 
--	dev->vblank_enabled = kcalloc(num_crtcs, sizeof(int), GFP_KERNEL);
-+	dev->vblank_enabled = kcalloc(num_crtcs, sizeof(bool), GFP_KERNEL);
- 	if (!dev->vblank_enabled)
- 		goto err;
- 
-@@ -412,7 +412,7 @@ int drm_irq_uninstall(struct drm_device *dev)
- 		spin_lock_irqsave(&dev->vbl_lock, irqflags);
- 		for (i = 0; i < dev->num_crtcs; i++) {
- 			DRM_WAKEUP(&dev->vbl_queue[i]);
--			dev->vblank_enabled[i] = 0;
-+			dev->vblank_enabled[i] = false;
- 			dev->last_vblank[i] =
- 				dev->driver->get_vblank_counter(dev, i);
- 		}
-@@ -973,7 +973,7 @@ int drm_vblank_get(struct drm_device *dev, int crtc)
- 			if (ret)
- 				atomic_dec(&dev->vblank_refcount[crtc]);
- 			else {
--				dev->vblank_enabled[crtc] = 1;
-+				dev->vblank_enabled[crtc] = true;
- 				drm_update_vblank_count(dev, crtc);
- 			}
- 		}
-diff --git a/drivers/gpu/drm/omapdrm/omap_irq.c b/drivers/gpu/drm/omapdrm/omap_irq.c
-index 9263db117ff8..3cbe92c72fd5 100644
---- a/drivers/gpu/drm/omapdrm/omap_irq.c
-+++ b/drivers/gpu/drm/omapdrm/omap_irq.c
-@@ -308,7 +308,7 @@ int omap_drm_irq_uninstall(struct drm_device *dev)
- 		spin_lock_irqsave(&dev->vbl_lock, irqflags);
- 		for (i = 0; i < dev->num_crtcs; i++) {
- 			DRM_WAKEUP(&dev->vbl_queue[i]);
--			dev->vblank_enabled[i] = 0;
-+			dev->vblank_enabled[i] = false;
- 			dev->last_vblank[i] =
- 				dev->driver->get_vblank_counter(dev, i);
- 		}
-diff --git a/include/drm/drmP.h b/include/drm/drmP.h
-index 227292ae8736..d3b7d2c96d23 100644
---- a/include/drm/drmP.h
-+++ b/include/drm/drmP.h
-@@ -1165,7 +1165,7 @@ struct drm_device {
- 	atomic_t *vblank_refcount;      /* number of users of vblank interruptsper crtc */
- 	u32 *last_vblank;               /* protected by dev->vbl_lock, used */
- 					/* for wraparound handling */
--	int *vblank_enabled;            /* so we don't call enable more than
-+	bool *vblank_enabled;           /* so we don't call enable more than
- 					   once per disable */
- 	int *vblank_inmodeset;          /* Display driver is setting mode */
- 	u32 *last_vblank_wait;		/* Last vblank seqno waited per CRTC */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0996-drm-Make-vblank_inmodeset-unsigned.patch b/patches.baytrail/0996-drm-Make-vblank_inmodeset-unsigned.patch
deleted file mode 100644
index 623ace2c53cb5..0000000000000
--- a/patches.baytrail/0996-drm-Make-vblank_inmodeset-unsigned.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 45bf6f8dabcd523ca29bb3e332a3f18a1fe7a1df Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Fri, 4 Oct 2013 14:53:34 +0300
-Subject: drm: Make vblank_inmodeset unsigned
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-vblank_inmodeset is a bitmask, with only two bits mind you, but better
-make it unsigned anyway.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit 54edf9aec79779f85d49674580b7ccab4d6f3c4a)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- include/drm/drmP.h | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/include/drm/drmP.h b/include/drm/drmP.h
-index d3b7d2c96d23..9caba80b95b0 100644
---- a/include/drm/drmP.h
-+++ b/include/drm/drmP.h
-@@ -1167,7 +1167,7 @@ struct drm_device {
- 					/* for wraparound handling */
- 	bool *vblank_enabled;           /* so we don't call enable more than
- 					   once per disable */
--	int *vblank_inmodeset;          /* Display driver is setting mode */
-+	unsigned int *vblank_inmodeset; /* Display driver is setting mode */
- 	u32 *last_vblank_wait;		/* Last vblank seqno waited per CRTC */
- 	struct timer_list vblank_disable_timer;
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0997-drm-Collect-per-crtc-vblank-stuff-to-a-struct.patch b/patches.baytrail/0997-drm-Collect-per-crtc-vblank-stuff-to-a-struct.patch
deleted file mode 100644
index 9e56e72dd4b5b..0000000000000
--- a/patches.baytrail/0997-drm-Collect-per-crtc-vblank-stuff-to-a-struct.patch
+++ /dev/null
@@ -1,549 +0,0 @@
-From fe70a380aa3818d008cad0962a99701cbbb5e5f8 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Fri, 4 Oct 2013 14:53:36 +0300
-Subject: drm: Collect per-crtc vblank stuff to a struct
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-drm_vblank_init() is too ugly. Make it a bit easier on the eye by
-collecting all the per-crtc vblank counters, timestamps etc. to
-a structure and just allocate an array of those.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit 5380e9293b865d88de04de6e5324726d8c5b53c9)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_info.c         |   6 +-
- drivers/gpu/drm/drm_irq.c          | 138 +++++++++++++------------------------
- drivers/gpu/drm/gma500/psb_irq.c   |  22 +++---
- drivers/gpu/drm/i915/intel_pm.c    |   2 +-
- drivers/gpu/drm/omapdrm/omap_irq.c |   6 +-
- include/drm/drmP.h                 |  26 ++++---
- 6 files changed, 81 insertions(+), 119 deletions(-)
-
-diff --git a/drivers/gpu/drm/drm_info.c b/drivers/gpu/drm/drm_info.c
-index 53298320080b..7d5a152eeb02 100644
---- a/drivers/gpu/drm/drm_info.c
-+++ b/drivers/gpu/drm/drm_info.c
-@@ -163,13 +163,13 @@ int drm_vblank_info(struct seq_file *m, void *data)
- 	mutex_lock(&dev->struct_mutex);
- 	for (crtc = 0; crtc < dev->num_crtcs; crtc++) {
- 		seq_printf(m, "CRTC %d enable:     %d\n",
--			   crtc, atomic_read(&dev->vblank_refcount[crtc]));
-+			   crtc, atomic_read(&dev->vblank[crtc].refcount));
- 		seq_printf(m, "CRTC %d counter:    %d\n",
- 			   crtc, drm_vblank_count(dev, crtc));
- 		seq_printf(m, "CRTC %d last wait:  %d\n",
--			   crtc, dev->last_vblank_wait[crtc]);
-+			   crtc, dev->vblank[crtc].last_wait);
- 		seq_printf(m, "CRTC %d in modeset: %d\n",
--			   crtc, dev->vblank_inmodeset[crtc]);
-+			   crtc, dev->vblank[crtc].inmodeset);
- 	}
- 	mutex_unlock(&dev->struct_mutex);
- 	return 0;
-diff --git a/drivers/gpu/drm/drm_irq.c b/drivers/gpu/drm/drm_irq.c
-index 49680a8ab96a..dea859f20035 100644
---- a/drivers/gpu/drm/drm_irq.c
-+++ b/drivers/gpu/drm/drm_irq.c
-@@ -43,9 +43,8 @@
- #include <linux/export.h>
- 
- /* Access macro for slots in vblank timestamp ringbuffer. */
--#define vblanktimestamp(dev, crtc, count) ( \
--	(dev)->_vblank_time[(crtc) * DRM_VBLANKTIME_RBSIZE + \
--	((count) % DRM_VBLANKTIME_RBSIZE)])
-+#define vblanktimestamp(dev, crtc, count) \
-+	((dev)->vblank[crtc].time[(count) % DRM_VBLANKTIME_RBSIZE])
- 
- /* Retry timestamp calculation up to 3 times to satisfy
-  * drm_timestamp_precision before giving up.
-@@ -89,8 +88,7 @@ int drm_irq_by_busid(struct drm_device *dev, void *data,
-  */
- static void clear_vblank_timestamps(struct drm_device *dev, int crtc)
- {
--	memset(&dev->_vblank_time[crtc * DRM_VBLANKTIME_RBSIZE], 0,
--		DRM_VBLANKTIME_RBSIZE * sizeof(struct timeval));
-+	memset(dev->vblank[crtc].time, 0, sizeof(dev->vblank[crtc].time));
- }
- 
- /*
-@@ -115,7 +113,7 @@ static void vblank_disable_and_save(struct drm_device *dev, int crtc)
- 	spin_lock_irqsave(&dev->vblank_time_lock, irqflags);
- 
- 	dev->driver->disable_vblank(dev, crtc);
--	dev->vblank_enabled[crtc] = false;
-+	dev->vblank[crtc].enabled = false;
- 
- 	/* No further vblank irq's will be processed after
- 	 * this point. Get current hardware vblank count and
-@@ -130,9 +128,9 @@ static void vblank_disable_and_save(struct drm_device *dev, int crtc)
- 	 * delayed gpu counter increment.
- 	 */
- 	do {
--		dev->last_vblank[crtc] = dev->driver->get_vblank_counter(dev, crtc);
-+		dev->vblank[crtc].last = dev->driver->get_vblank_counter(dev, crtc);
- 		vblrc = drm_get_last_vbltimestamp(dev, crtc, &tvblank, 0);
--	} while (dev->last_vblank[crtc] != dev->driver->get_vblank_counter(dev, crtc) && (--count) && vblrc);
-+	} while (dev->vblank[crtc].last != dev->driver->get_vblank_counter(dev, crtc) && (--count) && vblrc);
- 
- 	if (!count)
- 		vblrc = 0;
-@@ -140,7 +138,7 @@ static void vblank_disable_and_save(struct drm_device *dev, int crtc)
- 	/* Compute time difference to stored timestamp of last vblank
- 	 * as updated by last invocation of drm_handle_vblank() in vblank irq.
- 	 */
--	vblcount = atomic_read(&dev->_vblank_count[crtc]);
-+	vblcount = atomic_read(&dev->vblank[crtc].count);
- 	diff_ns = timeval_to_ns(&tvblank) -
- 		  timeval_to_ns(&vblanktimestamp(dev, crtc, vblcount));
- 
-@@ -157,7 +155,7 @@ static void vblank_disable_and_save(struct drm_device *dev, int crtc)
- 	 * hope for the best.
- 	 */
- 	if ((vblrc > 0) && (abs64(diff_ns) > 1000000)) {
--		atomic_inc(&dev->_vblank_count[crtc]);
-+		atomic_inc(&dev->vblank[crtc].count);
- 		smp_mb__after_atomic_inc();
- 	}
- 
-@@ -178,8 +176,8 @@ static void vblank_disable_fn(unsigned long arg)
- 
- 	for (i = 0; i < dev->num_crtcs; i++) {
- 		spin_lock_irqsave(&dev->vbl_lock, irqflags);
--		if (atomic_read(&dev->vblank_refcount[i]) == 0 &&
--		    dev->vblank_enabled[i]) {
-+		if (atomic_read(&dev->vblank[i].refcount) == 0 &&
-+		    dev->vblank[i].enabled) {
- 			DRM_DEBUG("disabling vblank on crtc %d\n", i);
- 			vblank_disable_and_save(dev, i);
- 		}
-@@ -197,14 +195,7 @@ void drm_vblank_cleanup(struct drm_device *dev)
- 
- 	vblank_disable_fn((unsigned long)dev);
- 
--	kfree(dev->vbl_queue);
--	kfree(dev->_vblank_count);
--	kfree(dev->vblank_refcount);
--	kfree(dev->vblank_enabled);
--	kfree(dev->last_vblank);
--	kfree(dev->last_vblank_wait);
--	kfree(dev->vblank_inmodeset);
--	kfree(dev->_vblank_time);
-+	kfree(dev->vblank);
- 
- 	dev->num_crtcs = 0;
- }
-@@ -221,40 +212,12 @@ int drm_vblank_init(struct drm_device *dev, int num_crtcs)
- 
- 	dev->num_crtcs = num_crtcs;
- 
--	dev->vbl_queue = kmalloc(sizeof(wait_queue_head_t) * num_crtcs,
--				 GFP_KERNEL);
--	if (!dev->vbl_queue)
-+	dev->vblank = kcalloc(num_crtcs, sizeof(*dev->vblank), GFP_KERNEL);
-+	if (!dev->vblank)
- 		goto err;
- 
--	dev->_vblank_count = kmalloc(sizeof(atomic_t) * num_crtcs, GFP_KERNEL);
--	if (!dev->_vblank_count)
--		goto err;
--
--	dev->vblank_refcount = kmalloc(sizeof(atomic_t) * num_crtcs,
--				       GFP_KERNEL);
--	if (!dev->vblank_refcount)
--		goto err;
--
--	dev->vblank_enabled = kcalloc(num_crtcs, sizeof(bool), GFP_KERNEL);
--	if (!dev->vblank_enabled)
--		goto err;
--
--	dev->last_vblank = kcalloc(num_crtcs, sizeof(u32), GFP_KERNEL);
--	if (!dev->last_vblank)
--		goto err;
--
--	dev->last_vblank_wait = kcalloc(num_crtcs, sizeof(u32), GFP_KERNEL);
--	if (!dev->last_vblank_wait)
--		goto err;
--
--	dev->vblank_inmodeset = kcalloc(num_crtcs, sizeof(int), GFP_KERNEL);
--	if (!dev->vblank_inmodeset)
--		goto err;
--
--	dev->_vblank_time = kcalloc(num_crtcs * DRM_VBLANKTIME_RBSIZE,
--				    sizeof(struct timeval), GFP_KERNEL);
--	if (!dev->_vblank_time)
--		goto err;
-+	for (i = 0; i < num_crtcs; i++)
-+		init_waitqueue_head(&dev->vblank[i].queue);
- 
- 	DRM_INFO("Supports vblank timestamp caching Rev 1 (10.10.2010).\n");
- 
-@@ -264,13 +227,6 @@ int drm_vblank_init(struct drm_device *dev, int num_crtcs)
- 	else
- 		DRM_INFO("No driver support for vblank timestamp query.\n");
- 
--	/* Zero per-crtc vblank stuff */
--	for (i = 0; i < num_crtcs; i++) {
--		init_waitqueue_head(&dev->vbl_queue[i]);
--		atomic_set(&dev->_vblank_count[i], 0);
--		atomic_set(&dev->vblank_refcount[i], 0);
--	}
--
- 	dev->vblank_disable_allowed = false;
- 
- 	return 0;
-@@ -411,9 +367,9 @@ int drm_irq_uninstall(struct drm_device *dev)
- 	if (dev->num_crtcs) {
- 		spin_lock_irqsave(&dev->vbl_lock, irqflags);
- 		for (i = 0; i < dev->num_crtcs; i++) {
--			DRM_WAKEUP(&dev->vbl_queue[i]);
--			dev->vblank_enabled[i] = false;
--			dev->last_vblank[i] =
-+			DRM_WAKEUP(&dev->vblank[i].queue);
-+			dev->vblank[i].enabled = false;
-+			dev->vblank[i].last =
- 				dev->driver->get_vblank_counter(dev, i);
- 		}
- 		spin_unlock_irqrestore(&dev->vbl_lock, irqflags);
-@@ -796,7 +752,7 @@ EXPORT_SYMBOL(drm_get_last_vbltimestamp);
-  */
- u32 drm_vblank_count(struct drm_device *dev, int crtc)
- {
--	return atomic_read(&dev->_vblank_count[crtc]);
-+	return atomic_read(&dev->vblank[crtc].count);
- }
- EXPORT_SYMBOL(drm_vblank_count);
- 
-@@ -825,10 +781,10 @@ u32 drm_vblank_count_and_time(struct drm_device *dev, int crtc,
- 	 * a seqlock.
- 	 */
- 	do {
--		cur_vblank = atomic_read(&dev->_vblank_count[crtc]);
-+		cur_vblank = atomic_read(&dev->vblank[crtc].count);
- 		*vblanktime = vblanktimestamp(dev, crtc, cur_vblank);
- 		smp_rmb();
--	} while (cur_vblank != atomic_read(&dev->_vblank_count[crtc]));
-+	} while (cur_vblank != atomic_read(&dev->vblank[crtc].count));
- 
- 	return cur_vblank;
- }
-@@ -915,12 +871,12 @@ static void drm_update_vblank_count(struct drm_device *dev, int crtc)
- 	} while (cur_vblank != dev->driver->get_vblank_counter(dev, crtc));
- 
- 	/* Deal with counter wrap */
--	diff = cur_vblank - dev->last_vblank[crtc];
--	if (cur_vblank < dev->last_vblank[crtc]) {
-+	diff = cur_vblank - dev->vblank[crtc].last;
-+	if (cur_vblank < dev->vblank[crtc].last) {
- 		diff += dev->max_vblank_count;
- 
- 		DRM_DEBUG("last_vblank[%d]=0x%x, cur_vblank=0x%x => diff=0x%x\n",
--			  crtc, dev->last_vblank[crtc], cur_vblank, diff);
-+			  crtc, dev->vblank[crtc].last, cur_vblank, diff);
- 	}
- 
- 	DRM_DEBUG("enabling vblank interrupts on crtc %d, missed %d\n",
-@@ -931,12 +887,12 @@ static void drm_update_vblank_count(struct drm_device *dev, int crtc)
- 	 * reinitialize delayed at next vblank interrupt in that case.
- 	 */
- 	if (rc) {
--		tslot = atomic_read(&dev->_vblank_count[crtc]) + diff;
-+		tslot = atomic_read(&dev->vblank[crtc].count) + diff;
- 		vblanktimestamp(dev, crtc, tslot) = t_vblank;
- 	}
- 
- 	smp_mb__before_atomic_inc();
--	atomic_add(diff, &dev->_vblank_count[crtc]);
-+	atomic_add(diff, &dev->vblank[crtc].count);
- 	smp_mb__after_atomic_inc();
- }
- 
-@@ -958,9 +914,9 @@ int drm_vblank_get(struct drm_device *dev, int crtc)
- 
- 	spin_lock_irqsave(&dev->vbl_lock, irqflags);
- 	/* Going from 0->1 means we have to enable interrupts again */
--	if (atomic_add_return(1, &dev->vblank_refcount[crtc]) == 1) {
-+	if (atomic_add_return(1, &dev->vblank[crtc].refcount) == 1) {
- 		spin_lock_irqsave(&dev->vblank_time_lock, irqflags2);
--		if (!dev->vblank_enabled[crtc]) {
-+		if (!dev->vblank[crtc].enabled) {
- 			/* Enable vblank irqs under vblank_time_lock protection.
- 			 * All vblank count & timestamp updates are held off
- 			 * until we are done reinitializing master counter and
-@@ -971,16 +927,16 @@ int drm_vblank_get(struct drm_device *dev, int crtc)
- 			DRM_DEBUG("enabling vblank on crtc %d, ret: %d\n",
- 				  crtc, ret);
- 			if (ret)
--				atomic_dec(&dev->vblank_refcount[crtc]);
-+				atomic_dec(&dev->vblank[crtc].refcount);
- 			else {
--				dev->vblank_enabled[crtc] = true;
-+				dev->vblank[crtc].enabled = true;
- 				drm_update_vblank_count(dev, crtc);
- 			}
- 		}
- 		spin_unlock_irqrestore(&dev->vblank_time_lock, irqflags2);
- 	} else {
--		if (!dev->vblank_enabled[crtc]) {
--			atomic_dec(&dev->vblank_refcount[crtc]);
-+		if (!dev->vblank[crtc].enabled) {
-+			atomic_dec(&dev->vblank[crtc].refcount);
- 			ret = -EINVAL;
- 		}
- 	}
-@@ -1000,10 +956,10 @@ EXPORT_SYMBOL(drm_vblank_get);
-  */
- void drm_vblank_put(struct drm_device *dev, int crtc)
- {
--	BUG_ON(atomic_read(&dev->vblank_refcount[crtc]) == 0);
-+	BUG_ON(atomic_read(&dev->vblank[crtc].refcount) == 0);
- 
- 	/* Last user schedules interrupt disable */
--	if (atomic_dec_and_test(&dev->vblank_refcount[crtc]) &&
-+	if (atomic_dec_and_test(&dev->vblank[crtc].refcount) &&
- 	    (drm_vblank_offdelay > 0))
- 		mod_timer(&dev->vblank_disable_timer,
- 			  jiffies + ((drm_vblank_offdelay * DRM_HZ)/1000));
-@@ -1026,7 +982,7 @@ void drm_vblank_off(struct drm_device *dev, int crtc)
- 
- 	spin_lock_irqsave(&dev->vbl_lock, irqflags);
- 	vblank_disable_and_save(dev, crtc);
--	DRM_WAKEUP(&dev->vbl_queue[crtc]);
-+	DRM_WAKEUP(&dev->vblank[crtc].queue);
- 
- 	/* Send any queued vblank events, lest the natives grow disquiet */
- 	seq = drm_vblank_count_and_time(dev, crtc, &now);
-@@ -1068,10 +1024,10 @@ void drm_vblank_pre_modeset(struct drm_device *dev, int crtc)
- 	 * to avoid corrupting the count if multiple, mismatch calls occur),
- 	 * so that interrupts remain enabled in the interim.
- 	 */
--	if (!dev->vblank_inmodeset[crtc]) {
--		dev->vblank_inmodeset[crtc] = 0x1;
-+	if (!dev->vblank[crtc].inmodeset) {
-+		dev->vblank[crtc].inmodeset = 0x1;
- 		if (drm_vblank_get(dev, crtc) == 0)
--			dev->vblank_inmodeset[crtc] |= 0x2;
-+			dev->vblank[crtc].inmodeset |= 0x2;
- 	}
- }
- EXPORT_SYMBOL(drm_vblank_pre_modeset);
-@@ -1084,15 +1040,15 @@ void drm_vblank_post_modeset(struct drm_device *dev, int crtc)
- 	if (!dev->num_crtcs)
- 		return;
- 
--	if (dev->vblank_inmodeset[crtc]) {
-+	if (dev->vblank[crtc].inmodeset) {
- 		spin_lock_irqsave(&dev->vbl_lock, irqflags);
- 		dev->vblank_disable_allowed = true;
- 		spin_unlock_irqrestore(&dev->vbl_lock, irqflags);
- 
--		if (dev->vblank_inmodeset[crtc] & 0x2)
-+		if (dev->vblank[crtc].inmodeset & 0x2)
- 			drm_vblank_put(dev, crtc);
- 
--		dev->vblank_inmodeset[crtc] = 0;
-+		dev->vblank[crtc].inmodeset = 0;
- 	}
- }
- EXPORT_SYMBOL(drm_vblank_post_modeset);
-@@ -1289,8 +1245,8 @@ int drm_wait_vblank(struct drm_device *dev, void *data,
- 
- 	DRM_DEBUG("waiting on vblank count %d, crtc %d\n",
- 		  vblwait->request.sequence, crtc);
--	dev->last_vblank_wait[crtc] = vblwait->request.sequence;
--	DRM_WAIT_ON(ret, dev->vbl_queue[crtc], 3 * DRM_HZ,
-+	dev->vblank[crtc].last_wait = vblwait->request.sequence;
-+	DRM_WAIT_ON(ret, dev->vblank[crtc].queue, 3 * DRM_HZ,
- 		    (((drm_vblank_count(dev, crtc) -
- 		       vblwait->request.sequence) <= (1 << 23)) ||
- 		     !dev->irq_enabled));
-@@ -1368,7 +1324,7 @@ bool drm_handle_vblank(struct drm_device *dev, int crtc)
- 	spin_lock_irqsave(&dev->vblank_time_lock, irqflags);
- 
- 	/* Vblank irq handling disabled. Nothing to do. */
--	if (!dev->vblank_enabled[crtc]) {
-+	if (!dev->vblank[crtc].enabled) {
- 		spin_unlock_irqrestore(&dev->vblank_time_lock, irqflags);
- 		return false;
- 	}
-@@ -1378,7 +1334,7 @@ bool drm_handle_vblank(struct drm_device *dev, int crtc)
- 	 */
- 
- 	/* Get current timestamp and count. */
--	vblcount = atomic_read(&dev->_vblank_count[crtc]);
-+	vblcount = atomic_read(&dev->vblank[crtc].count);
- 	drm_get_last_vbltimestamp(dev, crtc, &tvblank, DRM_CALLED_FROM_VBLIRQ);
- 
- 	/* Compute time difference to timestamp of last vblank */
-@@ -1402,14 +1358,14 @@ bool drm_handle_vblank(struct drm_device *dev, int crtc)
- 		 * the timestamp computed above.
- 		 */
- 		smp_mb__before_atomic_inc();
--		atomic_inc(&dev->_vblank_count[crtc]);
-+		atomic_inc(&dev->vblank[crtc].count);
- 		smp_mb__after_atomic_inc();
- 	} else {
- 		DRM_DEBUG("crtc %d: Redundant vblirq ignored. diff_ns = %d\n",
- 			  crtc, (int) diff_ns);
- 	}
- 
--	DRM_WAKEUP(&dev->vbl_queue[crtc]);
-+	DRM_WAKEUP(&dev->vblank[crtc].queue);
- 	drm_handle_vblank_events(dev, crtc);
- 
- 	spin_unlock_irqrestore(&dev->vblank_time_lock, irqflags);
-diff --git a/drivers/gpu/drm/gma500/psb_irq.c b/drivers/gpu/drm/gma500/psb_irq.c
-index 029eccf30137..ba4830342d34 100644
---- a/drivers/gpu/drm/gma500/psb_irq.c
-+++ b/drivers/gpu/drm/gma500/psb_irq.c
-@@ -271,15 +271,15 @@ void psb_irq_preinstall(struct drm_device *dev)
- 
- 	if (gma_power_is_on(dev))
- 		PSB_WVDC32(0xFFFFFFFF, PSB_HWSTAM);
--	if (dev->vblank_enabled[0])
-+	if (dev->vblank[0].enabled)
- 		dev_priv->vdc_irq_mask |= _PSB_VSYNC_PIPEA_FLAG;
--	if (dev->vblank_enabled[1])
-+	if (dev->vblank[1].enabled)
- 		dev_priv->vdc_irq_mask |= _PSB_VSYNC_PIPEB_FLAG;
- 
- 	/* FIXME: Handle Medfield irq mask
--	if (dev->vblank_enabled[1])
-+	if (dev->vblank[1].enabled)
- 		dev_priv->vdc_irq_mask |= _MDFLD_PIPEB_EVENT_FLAG;
--	if (dev->vblank_enabled[2])
-+	if (dev->vblank[2].enabled)
- 		dev_priv->vdc_irq_mask |= _MDFLD_PIPEC_EVENT_FLAG;
- 	*/
- 
-@@ -305,17 +305,17 @@ int psb_irq_postinstall(struct drm_device *dev)
- 	PSB_WVDC32(dev_priv->vdc_irq_mask, PSB_INT_ENABLE_R);
- 	PSB_WVDC32(0xFFFFFFFF, PSB_HWSTAM);
- 
--	if (dev->vblank_enabled[0])
-+	if (dev->vblank[0].enabled)
- 		psb_enable_pipestat(dev_priv, 0, PIPE_VBLANK_INTERRUPT_ENABLE);
- 	else
- 		psb_disable_pipestat(dev_priv, 0, PIPE_VBLANK_INTERRUPT_ENABLE);
- 
--	if (dev->vblank_enabled[1])
-+	if (dev->vblank[1].enabled)
- 		psb_enable_pipestat(dev_priv, 1, PIPE_VBLANK_INTERRUPT_ENABLE);
- 	else
- 		psb_disable_pipestat(dev_priv, 1, PIPE_VBLANK_INTERRUPT_ENABLE);
- 
--	if (dev->vblank_enabled[2])
-+	if (dev->vblank[2].enabled)
- 		psb_enable_pipestat(dev_priv, 2, PIPE_VBLANK_INTERRUPT_ENABLE);
- 	else
- 		psb_disable_pipestat(dev_priv, 2, PIPE_VBLANK_INTERRUPT_ENABLE);
-@@ -339,13 +339,13 @@ void psb_irq_uninstall(struct drm_device *dev)
- 
- 	PSB_WVDC32(0xFFFFFFFF, PSB_HWSTAM);
- 
--	if (dev->vblank_enabled[0])
-+	if (dev->vblank[0].enabled)
- 		psb_disable_pipestat(dev_priv, 0, PIPE_VBLANK_INTERRUPT_ENABLE);
- 
--	if (dev->vblank_enabled[1])
-+	if (dev->vblank[1].enabled)
- 		psb_disable_pipestat(dev_priv, 1, PIPE_VBLANK_INTERRUPT_ENABLE);
- 
--	if (dev->vblank_enabled[2])
-+	if (dev->vblank[2].enabled)
- 		psb_disable_pipestat(dev_priv, 2, PIPE_VBLANK_INTERRUPT_ENABLE);
- 
- 	dev_priv->vdc_irq_mask &= _PSB_IRQ_SGX_FLAG |
-@@ -456,7 +456,7 @@ static int psb_vblank_do_wait(struct drm_device *dev,
- {
- 	unsigned int cur_vblank;
- 	int ret = 0;
--	DRM_WAIT_ON(ret, dev->vbl_queue, 3 * DRM_HZ,
-+	DRM_WAIT_ON(ret, dev->vblank.queue, 3 * DRM_HZ,
- 		    (((cur_vblank = atomic_read(counter))
- 		      - *sequence) <= (1 << 23)));
- 	*sequence = cur_vblank;
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index b08a96cd9c94..008ec0bb017f 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -5423,7 +5423,7 @@ static void __intel_set_power_well(struct drm_device *dev, bool enable)
- 			spin_lock_irqsave(&dev->vbl_lock, irqflags);
- 			for_each_pipe(p)
- 				if (p != PIPE_A)
--					dev->last_vblank[p] = 0;
-+					dev->vblank[p].last = 0;
- 			spin_unlock_irqrestore(&dev->vbl_lock, irqflags);
- 		}
- 	}
-diff --git a/drivers/gpu/drm/omapdrm/omap_irq.c b/drivers/gpu/drm/omapdrm/omap_irq.c
-index 3cbe92c72fd5..261b227e4692 100644
---- a/drivers/gpu/drm/omapdrm/omap_irq.c
-+++ b/drivers/gpu/drm/omapdrm/omap_irq.c
-@@ -307,9 +307,9 @@ int omap_drm_irq_uninstall(struct drm_device *dev)
- 	if (dev->num_crtcs) {
- 		spin_lock_irqsave(&dev->vbl_lock, irqflags);
- 		for (i = 0; i < dev->num_crtcs; i++) {
--			DRM_WAKEUP(&dev->vbl_queue[i]);
--			dev->vblank_enabled[i] = false;
--			dev->last_vblank[i] =
-+			DRM_WAKEUP(&dev->vblank[i].queue);
-+			dev->vblank[i].enabled = false;
-+			dev->vblank[i].last =
- 				dev->driver->get_vblank_counter(dev, i);
- 		}
- 		spin_unlock_irqrestore(&dev->vbl_lock, irqflags);
-diff --git a/include/drm/drmP.h b/include/drm/drmP.h
-index 9caba80b95b0..ff93662cfc3e 100644
---- a/include/drm/drmP.h
-+++ b/include/drm/drmP.h
-@@ -1082,6 +1082,19 @@ struct drm_pending_vblank_event {
- 	struct drm_event_vblank event;
- };
- 
-+struct drm_vblank_crtc {
-+	wait_queue_head_t queue;	/**< VBLANK wait queue */
-+	struct timeval time[DRM_VBLANKTIME_RBSIZE];	/**< timestamp of current count */
-+	atomic_t count;			/**< number of VBLANK interrupts */
-+	atomic_t refcount;		/* number of users of vblank interruptsper crtc */
-+	u32 last;			/* protected by dev->vbl_lock, used */
-+					/* for wraparound handling */
-+	u32 last_wait;			/* Last vblank seqno waited per CRTC */
-+	unsigned int inmodeset;		/* Display driver is setting mode */
-+	bool enabled;			/* so we don't call enable more than
-+					   once per disable */
-+};
-+
- /**
-  * DRM device structure. This structure represent a complete card that
-  * may contain multiple heads.
-@@ -1157,18 +1170,11 @@ struct drm_device {
- 	 */
- 	bool vblank_disable_allowed;
- 
--	wait_queue_head_t *vbl_queue;   /**< VBLANK wait queue */
--	atomic_t *_vblank_count;        /**< number of VBLANK interrupts (driver must alloc the right number of counters) */
--	struct timeval *_vblank_time;   /**< timestamp of current vblank_count (drivers must alloc right number of fields) */
-+	/* array of size num_crtcs */
-+	struct drm_vblank_crtc *vblank;
-+
- 	spinlock_t vblank_time_lock;    /**< Protects vblank count and time updates during vblank enable/disable */
- 	spinlock_t vbl_lock;
--	atomic_t *vblank_refcount;      /* number of users of vblank interruptsper crtc */
--	u32 *last_vblank;               /* protected by dev->vbl_lock, used */
--					/* for wraparound handling */
--	bool *vblank_enabled;           /* so we don't call enable more than
--					   once per disable */
--	unsigned int *vblank_inmodeset; /* Display driver is setting mode */
--	u32 *last_vblank_wait;		/* Last vblank seqno waited per CRTC */
- 	struct timer_list vblank_disable_timer;
- 
- 	u32 max_vblank_count;           /**< size of vblank counter register */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0998-drm-Make-irq_enabled-bool.patch b/patches.baytrail/0998-drm-Make-irq_enabled-bool.patch
deleted file mode 100644
index b21555317bae9..0000000000000
--- a/patches.baytrail/0998-drm-Make-irq_enabled-bool.patch
+++ /dev/null
@@ -1,233 +0,0 @@
-From 52b8437877ceb974dfccce65415e3f052ab70a7e Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Fri, 4 Oct 2013 14:53:37 +0300
-Subject: drm: Make irq_enabled bool
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-irq_enabled is only ever 0 or 1, so make it a bool.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit 4423843cde65232c1d553df220e1d133f4a0fa2b)
-Signed-off-by: James Ausmus <james.ausmus@intel.com>
-
-Conflicts:
-	drivers/gpu/host1x/drm/drm.c
-	(context changes)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_irq.c                | 11 ++++++-----
- drivers/gpu/drm/exynos/exynos_drm_fimd.c |  4 ++--
- drivers/gpu/drm/exynos/exynos_drm_vidi.c |  4 ++--
- drivers/gpu/drm/mga/mga_irq.c            |  2 +-
- drivers/gpu/drm/omapdrm/omap_irq.c       | 11 ++++++-----
- drivers/gpu/host1x/drm/drm.c             |  7 +++++++
- drivers/staging/imx-drm/imx-drm-core.c   |  4 ++--
- include/drm/drmP.h                       |  2 +-
- 8 files changed, 27 insertions(+), 18 deletions(-)
-
-diff --git a/drivers/gpu/drm/drm_irq.c b/drivers/gpu/drm/drm_irq.c
-index dea859f20035..f9af048828ea 100644
---- a/drivers/gpu/drm/drm_irq.c
-+++ b/drivers/gpu/drm/drm_irq.c
-@@ -293,7 +293,7 @@ int drm_irq_install(struct drm_device *dev)
- 		mutex_unlock(&dev->struct_mutex);
- 		return -EBUSY;
- 	}
--	dev->irq_enabled = 1;
-+	dev->irq_enabled = true;
- 	mutex_unlock(&dev->struct_mutex);
- 
- 	DRM_DEBUG("irq=%d\n", drm_dev_to_irq(dev));
-@@ -316,7 +316,7 @@ int drm_irq_install(struct drm_device *dev)
- 
- 	if (ret < 0) {
- 		mutex_lock(&dev->struct_mutex);
--		dev->irq_enabled = 0;
-+		dev->irq_enabled = false;
- 		mutex_unlock(&dev->struct_mutex);
- 		return ret;
- 	}
-@@ -330,7 +330,7 @@ int drm_irq_install(struct drm_device *dev)
- 
- 	if (ret < 0) {
- 		mutex_lock(&dev->struct_mutex);
--		dev->irq_enabled = 0;
-+		dev->irq_enabled = false;
- 		mutex_unlock(&dev->struct_mutex);
- 		if (!drm_core_check_feature(dev, DRIVER_MODESET))
- 			vga_client_register(dev->pdev, NULL, NULL, NULL);
-@@ -351,14 +351,15 @@ EXPORT_SYMBOL(drm_irq_install);
- int drm_irq_uninstall(struct drm_device *dev)
- {
- 	unsigned long irqflags;
--	int irq_enabled, i;
-+	bool irq_enabled;
-+	int i;
- 
- 	if (!drm_core_check_feature(dev, DRIVER_HAVE_IRQ))
- 		return -EINVAL;
- 
- 	mutex_lock(&dev->struct_mutex);
- 	irq_enabled = dev->irq_enabled;
--	dev->irq_enabled = 0;
-+	dev->irq_enabled = false;
- 	mutex_unlock(&dev->struct_mutex);
- 
- 	/*
-diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
-index 2cb5b2ad07b3..436883bb4f48 100644
---- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
-+++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
-@@ -701,13 +701,13 @@ static int fimd_subdrv_probe(struct drm_device *drm_dev, struct device *dev)
- 
- 	/*
- 	 * enable drm irq mode.
--	 * - with irq_enabled = 1, we can use the vblank feature.
-+	 * - with irq_enabled = true, we can use the vblank feature.
- 	 *
- 	 * P.S. note that we wouldn't use drm irq handler but
- 	 *	just specific driver own one instead because
- 	 *	drm framework supports only one irq handler.
- 	 */
--	drm_dev->irq_enabled = 1;
-+	drm_dev->irq_enabled = true;
- 
- 	/*
- 	 * with vblank_disable_allowed = true, vblank interrupt will be disabled
-diff --git a/drivers/gpu/drm/exynos/exynos_drm_vidi.c b/drivers/gpu/drm/exynos/exynos_drm_vidi.c
-index 51706119faa0..85392d60833b 100644
---- a/drivers/gpu/drm/exynos/exynos_drm_vidi.c
-+++ b/drivers/gpu/drm/exynos/exynos_drm_vidi.c
-@@ -411,13 +411,13 @@ static int vidi_subdrv_probe(struct drm_device *drm_dev, struct device *dev)
- 
- 	/*
- 	 * enable drm irq mode.
--	 * - with irq_enabled = 1, we can use the vblank feature.
-+	 * - with irq_enabled = true, we can use the vblank feature.
- 	 *
- 	 * P.S. note that we wouldn't use drm irq handler but
- 	 *	just specific driver own one instead because
- 	 *	drm framework supports only one irq handler.
- 	 */
--	drm_dev->irq_enabled = 1;
-+	drm_dev->irq_enabled = true;
- 
- 	/*
- 	 * with vblank_disable_allowed = true, vblank interrupt will be disabled
-diff --git a/drivers/gpu/drm/mga/mga_irq.c b/drivers/gpu/drm/mga/mga_irq.c
-index 598c281def0a..2b0ceb8dc11b 100644
---- a/drivers/gpu/drm/mga/mga_irq.c
-+++ b/drivers/gpu/drm/mga/mga_irq.c
-@@ -169,5 +169,5 @@ void mga_driver_irq_uninstall(struct drm_device *dev)
- 	/* Disable *all* interrupts */
- 	MGA_WRITE(MGA_IEN, 0);
- 
--	dev->irq_enabled = 0;
-+	dev->irq_enabled = false;
- }
-diff --git a/drivers/gpu/drm/omapdrm/omap_irq.c b/drivers/gpu/drm/omapdrm/omap_irq.c
-index 261b227e4692..cb858600185f 100644
---- a/drivers/gpu/drm/omapdrm/omap_irq.c
-+++ b/drivers/gpu/drm/omapdrm/omap_irq.c
-@@ -261,7 +261,7 @@ int omap_drm_irq_install(struct drm_device *dev)
- 		mutex_unlock(&dev->struct_mutex);
- 		return -EBUSY;
- 	}
--	dev->irq_enabled = 1;
-+	dev->irq_enabled = true;
- 	mutex_unlock(&dev->struct_mutex);
- 
- 	/* Before installing handler */
-@@ -272,7 +272,7 @@ int omap_drm_irq_install(struct drm_device *dev)
- 
- 	if (ret < 0) {
- 		mutex_lock(&dev->struct_mutex);
--		dev->irq_enabled = 0;
-+		dev->irq_enabled = false;
- 		mutex_unlock(&dev->struct_mutex);
- 		return ret;
- 	}
-@@ -283,7 +283,7 @@ int omap_drm_irq_install(struct drm_device *dev)
- 
- 	if (ret < 0) {
- 		mutex_lock(&dev->struct_mutex);
--		dev->irq_enabled = 0;
-+		dev->irq_enabled = false;
- 		mutex_unlock(&dev->struct_mutex);
- 		dispc_free_irq(dev);
- 	}
-@@ -294,11 +294,12 @@ int omap_drm_irq_install(struct drm_device *dev)
- int omap_drm_irq_uninstall(struct drm_device *dev)
- {
- 	unsigned long irqflags;
--	int irq_enabled, i;
-+	bool irq_enabled;
-+	int i;
- 
- 	mutex_lock(&dev->struct_mutex);
- 	irq_enabled = dev->irq_enabled;
--	dev->irq_enabled = 0;
-+	dev->irq_enabled = false;
- 	mutex_unlock(&dev->struct_mutex);
- 
- 	/*
-diff --git a/drivers/gpu/host1x/drm/drm.c b/drivers/gpu/host1x/drm/drm.c
-index 26dc190fd4fe..a43c741512b8 100644
---- a/drivers/gpu/host1x/drm/drm.c
-+++ b/drivers/gpu/host1x/drm/drm.c
-@@ -257,6 +257,13 @@ static int tegra_drm_load(struct drm_device *drm, unsigned long flags)
- 	if (err < 0)
- 		return err;
- 
-+	/*
-+	 * We don't use the drm_irq_install() helpers provided by the DRM
-+	 * core, so we need to set this manually in order to allow the
-+	 * DRM_IOCTL_WAIT_VBLANK to operate correctly.
-+	 */
-+	drm->irq_enabled = true;
-+
- 	err = drm_vblank_init(drm, drm->mode_config.num_crtc);
- 	if (err < 0)
- 		return err;
-diff --git a/drivers/staging/imx-drm/imx-drm-core.c b/drivers/staging/imx-drm/imx-drm-core.c
-index 11321147fc0b..f128a8bb77d2 100644
---- a/drivers/staging/imx-drm/imx-drm-core.c
-+++ b/drivers/staging/imx-drm/imx-drm-core.c
-@@ -413,14 +413,14 @@ static int imx_drm_driver_load(struct drm_device *drm, unsigned long flags)
- 
- 	/*
- 	 * enable drm irq mode.
--	 * - with irq_enabled = 1, we can use the vblank feature.
-+	 * - with irq_enabled = true, we can use the vblank feature.
- 	 *
- 	 * P.S. note that we wouldn't use drm irq handler but
- 	 *      just specific driver own one instead because
- 	 *      drm framework supports only one irq handler and
- 	 *      drivers can well take care of their interrupts
- 	 */
--	drm->irq_enabled = 1;
-+	drm->irq_enabled = true;
- 
- 	drm_mode_config_init(drm);
- 	imx_drm_mode_config_init(drm);
-diff --git a/include/drm/drmP.h b/include/drm/drmP.h
-index ff93662cfc3e..4f2b3f343c2e 100644
---- a/include/drm/drmP.h
-+++ b/include/drm/drmP.h
-@@ -1153,7 +1153,7 @@ struct drm_device {
- 
- 	/** \name Context support */
- 	/*@{ */
--	int irq_enabled;		/**< True if irq handler is enabled */
-+	bool irq_enabled;		/**< True if irq handler is enabled */
- 	__volatile__ long context_flag;	/**< Context swapping flag */
- 	int last_context;		/**< Last current context */
- 	/*@} */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/0999-drm-add-drm_dev_alloc-helper.patch b/patches.baytrail/0999-drm-add-drm_dev_alloc-helper.patch
deleted file mode 100644
index 77fa3299202d8..0000000000000
--- a/patches.baytrail/0999-drm-add-drm_dev_alloc-helper.patch
+++ /dev/null
@@ -1,249 +0,0 @@
-From 895a18baf96f3cc05a5a36ca4a70a2a14586e0aa Mon Sep 17 00:00:00 2001
-From: David Herrmann <dh.herrmann@gmail.com>
-Date: Wed, 2 Oct 2013 11:23:34 +0200
-Subject: drm: add drm_dev_alloc() helper
-
-Instead of managing device allocation+initialization in each bus-driver,
-we should do that in a central place. drm_fill_in_dev() already does most
-of it, but also requires the global drm lock for partial AGP device
-registration.
-
-Split both apart so we have a clean device initialization/allocation
-phase, and a registration phase.
-
-Signed-off-by: David Herrmann <dh.herrmann@gmail.com>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit 1bb72532ac260a2d3982b40bdd4c936d779d0d16)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_pci.c      |   4 +-
- drivers/gpu/drm/drm_platform.c |   3 +-
- drivers/gpu/drm/drm_stub.c     | 121 +++++++++++++++++++++++++----------------
- drivers/gpu/drm/drm_usb.c      |   7 +--
- include/drm/drmP.h             |   2 +
- 5 files changed, 80 insertions(+), 57 deletions(-)
-
-diff --git a/drivers/gpu/drm/drm_pci.c b/drivers/gpu/drm/drm_pci.c
-index 564075586a60..efcbc3dbf21a 100644
---- a/drivers/gpu/drm/drm_pci.c
-+++ b/drivers/gpu/drm/drm_pci.c
-@@ -326,7 +326,7 @@ int drm_get_pci_dev(struct pci_dev *pdev, const struct pci_device_id *ent,
- 
- 	DRM_DEBUG("\n");
- 
--	dev = kzalloc(sizeof(*dev), GFP_KERNEL);
-+	dev = drm_dev_alloc(driver, &pdev->dev);
- 	if (!dev)
- 		return -ENOMEM;
- 
-@@ -335,8 +335,6 @@ int drm_get_pci_dev(struct pci_dev *pdev, const struct pci_device_id *ent,
- 		goto err_g1;
- 
- 	dev->pdev = pdev;
--	dev->dev = &pdev->dev;
--
- 	dev->pci_device = pdev->device;
- 	dev->pci_vendor = pdev->vendor;
- 
-diff --git a/drivers/gpu/drm/drm_platform.c b/drivers/gpu/drm/drm_platform.c
-index 53ae674dee85..bcf980c9677d 100644
---- a/drivers/gpu/drm/drm_platform.c
-+++ b/drivers/gpu/drm/drm_platform.c
-@@ -47,12 +47,11 @@ int drm_get_platform_dev(struct platform_device *platdev,
- 
- 	DRM_DEBUG("\n");
- 
--	dev = kzalloc(sizeof(*dev), GFP_KERNEL);
-+	dev = drm_dev_alloc(driver, &platdev->dev);
- 	if (!dev)
- 		return -ENOMEM;
- 
- 	dev->platformdev = platdev;
--	dev->dev = &platdev->dev;
- 
- 	mutex_lock(&drm_global_mutex);
- 
-diff --git a/drivers/gpu/drm/drm_stub.c b/drivers/gpu/drm/drm_stub.c
-index d9c90b11e443..a2becaff63bc 100644
---- a/drivers/gpu/drm/drm_stub.c
-+++ b/drivers/gpu/drm/drm_stub.c
-@@ -261,60 +261,15 @@ int drm_fill_in_dev(struct drm_device *dev,
- {
- 	int retcode;
- 
--	INIT_LIST_HEAD(&dev->filelist);
--	INIT_LIST_HEAD(&dev->ctxlist);
--	INIT_LIST_HEAD(&dev->vmalist);
--	INIT_LIST_HEAD(&dev->maplist);
--	INIT_LIST_HEAD(&dev->vblank_event_list);
--
--	spin_lock_init(&dev->count_lock);
--	spin_lock_init(&dev->event_lock);
--	mutex_init(&dev->struct_mutex);
--	mutex_init(&dev->ctxlist_mutex);
--
--	if (drm_ht_create(&dev->map_hash, 12)) {
--		return -ENOMEM;
--	}
--
--	/* the DRM has 6 basic counters */
--	dev->counters = 6;
--	dev->types[0] = _DRM_STAT_LOCK;
--	dev->types[1] = _DRM_STAT_OPENS;
--	dev->types[2] = _DRM_STAT_CLOSES;
--	dev->types[3] = _DRM_STAT_IOCTLS;
--	dev->types[4] = _DRM_STAT_LOCKS;
--	dev->types[5] = _DRM_STAT_UNLOCKS;
--
--	dev->driver = driver;
--
- 	if (dev->driver->bus->agp_init) {
- 		retcode = dev->driver->bus->agp_init(dev);
--		if (retcode)
--			goto error_out_unreg;
--	}
--
--
--
--	retcode = drm_ctxbitmap_init(dev);
--	if (retcode) {
--		DRM_ERROR("Cannot allocate memory for context bitmap.\n");
--		goto error_out_unreg;
--	}
--
--	if (driver->driver_features & DRIVER_GEM) {
--		retcode = drm_gem_init(dev);
- 		if (retcode) {
--			DRM_ERROR("Cannot initialize graphics execution "
--				  "manager (GEM)\n");
--			goto error_out_unreg;
-+			drm_lastclose(dev);
-+			return retcode;
- 		}
- 	}
- 
- 	return 0;
--
--      error_out_unreg:
--	drm_lastclose(dev);
--	return retcode;
- }
- EXPORT_SYMBOL(drm_fill_in_dev);
- 
-@@ -506,3 +461,75 @@ void drm_unplug_dev(struct drm_device *dev)
- 	mutex_unlock(&drm_global_mutex);
- }
- EXPORT_SYMBOL(drm_unplug_dev);
-+
-+/**
-+ * drm_dev_alloc - Allocate new drm device
-+ * @driver: DRM driver to allocate device for
-+ * @parent: Parent device object
-+ *
-+ * Allocate and initialize a new DRM device. No device registration is done.
-+ *
-+ * RETURNS:
-+ * Pointer to new DRM device, or NULL if out of memory.
-+ */
-+struct drm_device *drm_dev_alloc(struct drm_driver *driver,
-+				 struct device *parent)
-+{
-+	struct drm_device *dev;
-+	int ret;
-+
-+	dev = kzalloc(sizeof(*dev), GFP_KERNEL);
-+	if (!dev)
-+		return NULL;
-+
-+	dev->dev = parent;
-+	dev->driver = driver;
-+
-+	INIT_LIST_HEAD(&dev->filelist);
-+	INIT_LIST_HEAD(&dev->ctxlist);
-+	INIT_LIST_HEAD(&dev->vmalist);
-+	INIT_LIST_HEAD(&dev->maplist);
-+	INIT_LIST_HEAD(&dev->vblank_event_list);
-+
-+	spin_lock_init(&dev->count_lock);
-+	spin_lock_init(&dev->event_lock);
-+	mutex_init(&dev->struct_mutex);
-+	mutex_init(&dev->ctxlist_mutex);
-+
-+	/* the DRM has 6 basic counters */
-+	dev->counters = 6;
-+	dev->types[0] = _DRM_STAT_LOCK;
-+	dev->types[1] = _DRM_STAT_OPENS;
-+	dev->types[2] = _DRM_STAT_CLOSES;
-+	dev->types[3] = _DRM_STAT_IOCTLS;
-+	dev->types[4] = _DRM_STAT_LOCKS;
-+	dev->types[5] = _DRM_STAT_UNLOCKS;
-+
-+	if (drm_ht_create(&dev->map_hash, 12))
-+		goto err_free;
-+
-+	ret = drm_ctxbitmap_init(dev);
-+	if (ret) {
-+		DRM_ERROR("Cannot allocate memory for context bitmap.\n");
-+		goto err_ht;
-+	}
-+
-+	if (driver->driver_features & DRIVER_GEM) {
-+		ret = drm_gem_init(dev);
-+		if (ret) {
-+			DRM_ERROR("Cannot initialize graphics execution manager (GEM)\n");
-+			goto err_ctxbitmap;
-+		}
-+	}
-+
-+	return dev;
-+
-+err_ctxbitmap:
-+	drm_ctxbitmap_cleanup(dev);
-+err_ht:
-+	drm_ht_remove(&dev->map_hash);
-+err_free:
-+	kfree(dev);
-+	return NULL;
-+}
-+EXPORT_SYMBOL(drm_dev_alloc);
-diff --git a/drivers/gpu/drm/drm_usb.c b/drivers/gpu/drm/drm_usb.c
-index 87664723b9ce..34ad8edfe806 100644
---- a/drivers/gpu/drm/drm_usb.c
-+++ b/drivers/gpu/drm/drm_usb.c
-@@ -7,18 +7,15 @@ int drm_get_usb_dev(struct usb_interface *interface,
- 		    struct drm_driver *driver)
- {
- 	struct drm_device *dev;
--	struct usb_device *usbdev;
- 	int ret;
- 
- 	DRM_DEBUG("\n");
- 
--	dev = kzalloc(sizeof(*dev), GFP_KERNEL);
-+	dev = drm_dev_alloc(driver, &interface->dev);
- 	if (!dev)
- 		return -ENOMEM;
- 
--	usbdev = interface_to_usbdev(interface);
--	dev->usbdev = usbdev;
--	dev->dev = &interface->dev;
-+	dev->usbdev = interface_to_usbdev(interface);
- 
- 	mutex_lock(&drm_global_mutex);
- 
-diff --git a/include/drm/drmP.h b/include/drm/drmP.h
-index 4f2b3f343c2e..32019d82882e 100644
---- a/include/drm/drmP.h
-+++ b/include/drm/drmP.h
-@@ -1660,6 +1660,8 @@ static __inline__ void drm_core_dropmap(struct drm_local_map *map)
- extern int drm_fill_in_dev(struct drm_device *dev,
- 			   const struct pci_device_id *ent,
- 			   struct drm_driver *driver);
-+struct drm_device *drm_dev_alloc(struct drm_driver *driver,
-+				 struct device *parent);
- int drm_get_minor(struct drm_device *dev, struct drm_minor **minor, int type);
- /*@}*/
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1000-drm-gma500-Add-IS_CDV-macro.patch b/patches.baytrail/1000-drm-gma500-Add-IS_CDV-macro.patch
deleted file mode 100644
index da614ca9a6fd4..0000000000000
--- a/patches.baytrail/1000-drm-gma500-Add-IS_CDV-macro.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From 4502d00432e84c190c2b7ffa59cc6a1315041d20 Mon Sep 17 00:00:00 2001
-From: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-Date: Wed, 10 Jul 2013 18:02:04 +0200
-Subject: drm/gma500: Add IS_CDV() macro
-
-This macro is needed for Cedarview specific stuff in the generic gma
-functions.
-
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-(cherry picked from commit b8e5ec9f306744e19357580a3cf47452fe64b27a)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/gma500/psb_drv.h | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/drivers/gpu/drm/gma500/psb_drv.h b/drivers/gpu/drm/gma500/psb_drv.h
-index 984cacfcbaf2..5a608c0c2396 100644
---- a/drivers/gpu/drm/gma500/psb_drv.h
-+++ b/drivers/gpu/drm/gma500/psb_drv.h
-@@ -46,6 +46,7 @@ enum {
- #define IS_PSB(dev) (((dev)->pci_device & 0xfffe) == 0x8108)
- #define IS_MRST(dev) (((dev)->pci_device & 0xfffc) == 0x4100)
- #define IS_MFLD(dev) (((dev)->pci_device & 0xfff8) == 0x0130)
-+#define IS_CDV(dev) (((dev)->pci_device & 0xfff0) == 0x0be0)
- 
- /*
-  * Driver definitions
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1001-drm-Remove-pci_vendor-and-pci_device-from-struct-drm.patch b/patches.baytrail/1001-drm-Remove-pci_vendor-and-pci_device-from-struct-drm.patch
deleted file mode 100644
index dade3beabc684..0000000000000
--- a/patches.baytrail/1001-drm-Remove-pci_vendor-and-pci_device-from-struct-drm.patch
+++ /dev/null
@@ -1,335 +0,0 @@
-From 3ff3229bfc038391126a902070fc02dc073cccf6 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Fri, 4 Oct 2013 14:53:40 +0300
-Subject: drm: Remove pci_vendor and pci_device from struct drm_device
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-We can get the PCI vendor and device IDs via dev->pdev. So we can drop
-the duplicated information.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit ffbab09bf939975b62ec233c426bf7df0dd4cea8)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_pci.c                   |    3 --
- drivers/gpu/drm/gma500/psb_drv.h            |    8 +++---
- drivers/gpu/drm/i915/i915_dma.c             |    2 -
- drivers/gpu/drm/i915/i915_drv.h             |   36 ++++++++++++++--------------
- drivers/gpu/drm/i915/i915_gpu_error.c       |    2 -
- drivers/gpu/drm/i915/intel_tv.c             |    2 -
- drivers/gpu/drm/nouveau/dispnv04/arb.c      |    8 +++---
- drivers/gpu/drm/nouveau/dispnv04/dfp.c      |    4 +--
- drivers/gpu/drm/nouveau/dispnv04/disp.h     |    6 ++--
- drivers/gpu/drm/nouveau/dispnv04/hw.c       |    4 +--
- drivers/gpu/drm/nouveau/nouveau_abi16.c     |    4 +--
- drivers/gpu/drm/nouveau/nouveau_bios.c      |    4 +--
- drivers/gpu/drm/nouveau/nouveau_connector.c |    4 +--
- drivers/gpu/drm/radeon/radeon_bios.c        |    6 ++--
- drivers/gpu/drm/radeon/radeon_kms.c         |    2 -
- include/drm/drmP.h                          |    2 -
- 16 files changed, 46 insertions(+), 51 deletions(-)
-
---- a/drivers/gpu/drm/drm_pci.c
-+++ b/drivers/gpu/drm/drm_pci.c
-@@ -335,9 +335,6 @@ int drm_get_pci_dev(struct pci_dev *pdev
- 		goto err_g1;
- 
- 	dev->pdev = pdev;
--	dev->pci_device = pdev->device;
--	dev->pci_vendor = pdev->vendor;
--
- #ifdef __alpha__
- 	dev->hose = pdev->sysdata;
- #endif
---- a/drivers/gpu/drm/gma500/psb_drv.h
-+++ b/drivers/gpu/drm/gma500/psb_drv.h
-@@ -43,10 +43,10 @@ enum {
- 	CHIP_MFLD_0130 = 3,		/* Medfield */
- };
- 
--#define IS_PSB(dev) (((dev)->pci_device & 0xfffe) == 0x8108)
--#define IS_MRST(dev) (((dev)->pci_device & 0xfffc) == 0x4100)
--#define IS_MFLD(dev) (((dev)->pci_device & 0xfff8) == 0x0130)
--#define IS_CDV(dev) (((dev)->pci_device & 0xfff0) == 0x0be0)
-+#define IS_PSB(dev) (((dev)->pdev->device & 0xfffe) == 0x8108)
-+#define IS_MRST(dev) (((dev)->pdev->device & 0xfffc) == 0x4100)
-+#define IS_MFLD(dev) (((dev)->pdev->device & 0xfff8) == 0x0130)
-+#define IS_CDV(dev) (((dev)->pdev->device & 0xfff0) == 0x0be0)
- 
- /*
-  * Driver definitions
---- a/drivers/gpu/drm/i915/i915_dma.c
-+++ b/drivers/gpu/drm/i915/i915_dma.c
-@@ -939,7 +939,7 @@ static int i915_getparam(struct drm_devi
- 		value = READ_BREADCRUMB(dev_priv);
- 		break;
- 	case I915_PARAM_CHIPSET_ID:
--		value = dev->pci_device;
-+		value = dev->pdev->device;
- 		break;
- 	case I915_PARAM_HAS_GEM:
- 		value = 1;
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1615,39 +1615,39 @@ struct drm_i915_file_private {
- 
- #define INTEL_INFO(dev)	(to_i915(dev)->info)
- 
--#define IS_I830(dev)		((dev)->pci_device == 0x3577)
--#define IS_845G(dev)		((dev)->pci_device == 0x2562)
-+#define IS_I830(dev)		((dev)->pdev->device == 0x3577)
-+#define IS_845G(dev)		((dev)->pdev->device == 0x2562)
- #define IS_I85X(dev)		(INTEL_INFO(dev)->is_i85x)
--#define IS_I865G(dev)		((dev)->pci_device == 0x2572)
-+#define IS_I865G(dev)		((dev)->pdev->device == 0x2572)
- #define IS_I915G(dev)		(INTEL_INFO(dev)->is_i915g)
--#define IS_I915GM(dev)		((dev)->pci_device == 0x2592)
--#define IS_I945G(dev)		((dev)->pci_device == 0x2772)
-+#define IS_I915GM(dev)		((dev)->pdev->device == 0x2592)
-+#define IS_I945G(dev)		((dev)->pdev->device == 0x2772)
- #define IS_I945GM(dev)		(INTEL_INFO(dev)->is_i945gm)
- #define IS_BROADWATER(dev)	(INTEL_INFO(dev)->is_broadwater)
- #define IS_CRESTLINE(dev)	(INTEL_INFO(dev)->is_crestline)
--#define IS_GM45(dev)		((dev)->pci_device == 0x2A42)
-+#define IS_GM45(dev)		((dev)->pdev->device == 0x2A42)
- #define IS_G4X(dev)		(INTEL_INFO(dev)->is_g4x)
--#define IS_PINEVIEW_G(dev)	((dev)->pci_device == 0xa001)
--#define IS_PINEVIEW_M(dev)	((dev)->pci_device == 0xa011)
-+#define IS_PINEVIEW_G(dev)	((dev)->pdev->device == 0xa001)
-+#define IS_PINEVIEW_M(dev)	((dev)->pdev->device == 0xa011)
- #define IS_PINEVIEW(dev)	(INTEL_INFO(dev)->is_pineview)
- #define IS_G33(dev)		(INTEL_INFO(dev)->is_g33)
--#define IS_IRONLAKE_M(dev)	((dev)->pci_device == 0x0046)
-+#define IS_IRONLAKE_M(dev)	((dev)->pdev->device == 0x0046)
- #define IS_IVYBRIDGE(dev)	(INTEL_INFO(dev)->is_ivybridge)
--#define IS_IVB_GT1(dev)		((dev)->pci_device == 0x0156 || \
--				 (dev)->pci_device == 0x0152 ||	\
--				 (dev)->pci_device == 0x015a)
--#define IS_SNB_GT1(dev)		((dev)->pci_device == 0x0102 || \
--				 (dev)->pci_device == 0x0106 ||	\
--				 (dev)->pci_device == 0x010A)
-+#define IS_IVB_GT1(dev)		((dev)->pdev->device == 0x0156 || \
-+				 (dev)->pdev->device == 0x0152 || \
-+				 (dev)->pdev->device == 0x015a)
-+#define IS_SNB_GT1(dev)		((dev)->pdev->device == 0x0102 || \
-+				 (dev)->pdev->device == 0x0106 || \
-+				 (dev)->pdev->device == 0x010A)
- #define IS_VALLEYVIEW(dev)	(INTEL_INFO(dev)->is_valleyview)
- #define IS_HASWELL(dev)	(INTEL_INFO(dev)->is_haswell)
- #define IS_MOBILE(dev)		(INTEL_INFO(dev)->is_mobile)
- #define IS_HSW_EARLY_SDV(dev)	(IS_HASWELL(dev) && \
--				 ((dev)->pci_device & 0xFF00) == 0x0C00)
-+				 ((dev)->pdev->device & 0xFF00) == 0x0C00)
- #define IS_ULT(dev)		(IS_HASWELL(dev) && \
--				 ((dev)->pci_device & 0xFF00) == 0x0A00)
-+				 ((dev)->pdev->device & 0xFF00) == 0x0A00)
- #define IS_HSW_GT3(dev)		(IS_HASWELL(dev) && \
--				 ((dev)->pci_device & 0x00F0) == 0x0020)
-+				 ((dev)->pdev->device & 0x00F0) == 0x0020)
- #define IS_PRELIMINARY_HW(intel_info) ((intel_info)->is_preliminary)
- 
- /*
---- a/drivers/gpu/drm/i915/i915_gpu_error.c
-+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
-@@ -304,7 +304,7 @@ int i915_error_state_to_str(struct drm_i
- 	err_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec,
- 		   error->time.tv_usec);
- 	err_printf(m, "Kernel: " UTS_RELEASE "\n");
--	err_printf(m, "PCI ID: 0x%04x\n", dev->pci_device);
-+	err_printf(m, "PCI ID: 0x%04x\n", dev->pdev->device);
- 	err_printf(m, "EIR: 0x%08x\n", error->eir);
- 	err_printf(m, "IER: 0x%08x\n", error->ier);
- 	err_printf(m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er);
---- a/drivers/gpu/drm/i915/intel_tv.c
-+++ b/drivers/gpu/drm/i915/intel_tv.c
-@@ -1044,7 +1044,7 @@ static void intel_tv_mode_set(struct int
- 		tv_mode->dda3_inc << TV_SCDDA3_INC_SHIFT;
- 
- 	/* Enable two fixes for the chips that need them. */
--	if (dev->pci_device < 0x2772)
-+	if (dev->pdev->device < 0x2772)
- 		tv_ctl |= TV_ENC_C0_FIX | TV_ENC_SDP_FIX;
- 
- 	I915_WRITE(TV_H_CTL_1, hctl1);
---- a/drivers/gpu/drm/nouveau/dispnv04/arb.c
-+++ b/drivers/gpu/drm/nouveau/dispnv04/arb.c
-@@ -210,8 +210,8 @@ nv04_update_arb(struct drm_device *dev,
- 	sim_data.nvclk_khz = NVClk;
- 	sim_data.bpp = bpp;
- 	sim_data.two_heads = nv_two_heads(dev);
--	if ((dev->pci_device & 0xffff) == 0x01a0 /*CHIPSET_NFORCE*/ ||
--	    (dev->pci_device & 0xffff) == 0x01f0 /*CHIPSET_NFORCE2*/) {
-+	if ((dev->pdev->device & 0xffff) == 0x01a0 /*CHIPSET_NFORCE*/ ||
-+	    (dev->pdev->device & 0xffff) == 0x01f0 /*CHIPSET_NFORCE2*/) {
- 		uint32_t type;
- 
- 		pci_read_config_dword(pci_get_bus_and_slot(0, 1), 0x7c, &type);
-@@ -256,8 +256,8 @@ nouveau_calc_arb(struct drm_device *dev,
- 
- 	if (nv_device(drm->device)->card_type < NV_20)
- 		nv04_update_arb(dev, vclk, bpp, burst, lwm);
--	else if ((dev->pci_device & 0xfff0) == 0x0240 /*CHIPSET_C51*/ ||
--		 (dev->pci_device & 0xfff0) == 0x03d0 /*CHIPSET_C512*/) {
-+	else if ((dev->pdev->device & 0xfff0) == 0x0240 /*CHIPSET_C51*/ ||
-+		 (dev->pdev->device & 0xfff0) == 0x03d0 /*CHIPSET_C512*/) {
- 		*burst = 128;
- 		*lwm = 0x0480;
- 	} else
---- a/drivers/gpu/drm/nouveau/dispnv04/dfp.c
-+++ b/drivers/gpu/drm/nouveau/dispnv04/dfp.c
-@@ -490,8 +490,8 @@ static void nv04_dfp_update_backlight(st
- 	/* BIOS scripts usually take care of the backlight, thanks
- 	 * Apple for your consistency.
- 	 */
--	if (dev->pci_device == 0x0174 || dev->pci_device == 0x0179 ||
--	    dev->pci_device == 0x0189 || dev->pci_device == 0x0329) {
-+	if (dev->pdev->device == 0x0174 || dev->pdev->device == 0x0179 ||
-+	    dev->pdev->device == 0x0189 || dev->pdev->device == 0x0329) {
- 		if (mode == DRM_MODE_DPMS_ON) {
- 			nv_mask(device, NV_PBUS_DEBUG_DUALHEAD_CTL, 0, 1 << 31);
- 			nv_mask(device, NV_PCRTC_GPIO_EXT, 3, 1);
---- a/drivers/gpu/drm/nouveau/dispnv04/disp.h
-+++ b/drivers/gpu/drm/nouveau/dispnv04/disp.h
-@@ -126,7 +126,7 @@ static inline bool
- nv_two_heads(struct drm_device *dev)
- {
- 	struct nouveau_drm *drm = nouveau_drm(dev);
--	const int impl = dev->pci_device & 0x0ff0;
-+	const int impl = dev->pdev->device & 0x0ff0;
- 
- 	if (nv_device(drm->device)->card_type >= NV_10 && impl != 0x0100 &&
- 	    impl != 0x0150 && impl != 0x01a0 && impl != 0x0200)
-@@ -138,14 +138,14 @@ nv_two_heads(struct drm_device *dev)
- static inline bool
- nv_gf4_disp_arch(struct drm_device *dev)
- {
--	return nv_two_heads(dev) && (dev->pci_device & 0x0ff0) != 0x0110;
-+	return nv_two_heads(dev) && (dev->pdev->device & 0x0ff0) != 0x0110;
- }
- 
- static inline bool
- nv_two_reg_pll(struct drm_device *dev)
- {
- 	struct nouveau_drm *drm = nouveau_drm(dev);
--	const int impl = dev->pci_device & 0x0ff0;
-+	const int impl = dev->pdev->device & 0x0ff0;
- 
- 	if (impl == 0x0310 || impl == 0x0340 || nv_device(drm->device)->card_type >= NV_40)
- 		return true;
---- a/drivers/gpu/drm/nouveau/dispnv04/hw.c
-+++ b/drivers/gpu/drm/nouveau/dispnv04/hw.c
-@@ -220,7 +220,7 @@ nouveau_hw_get_clock(struct drm_device *
- 	int ret;
- 
- 	if (plltype == PLL_MEMORY &&
--	    (dev->pci_device & 0x0ff0) == CHIPSET_NFORCE) {
-+	    (dev->pdev->device & 0x0ff0) == CHIPSET_NFORCE) {
- 		uint32_t mpllP;
- 
- 		pci_read_config_dword(pci_get_bus_and_slot(0, 3), 0x6c, &mpllP);
-@@ -230,7 +230,7 @@ nouveau_hw_get_clock(struct drm_device *
- 		return 400000 / mpllP;
- 	} else
- 	if (plltype == PLL_MEMORY &&
--	    (dev->pci_device & 0xff0) == CHIPSET_NFORCE2) {
-+	    (dev->pdev->device & 0xff0) == CHIPSET_NFORCE2) {
- 		uint32_t clock;
- 
- 		pci_read_config_dword(pci_get_bus_and_slot(0, 5), 0x4c, &clock);
---- a/drivers/gpu/drm/nouveau/nouveau_abi16.c
-+++ b/drivers/gpu/drm/nouveau/nouveau_abi16.c
-@@ -177,10 +177,10 @@ nouveau_abi16_ioctl_getparam(ABI16_IOCTL
- 		getparam->value = device->chipset;
- 		break;
- 	case NOUVEAU_GETPARAM_PCI_VENDOR:
--		getparam->value = dev->pci_vendor;
-+		getparam->value = dev->pdev->vendor;
- 		break;
- 	case NOUVEAU_GETPARAM_PCI_DEVICE:
--		getparam->value = dev->pci_device;
-+		getparam->value = dev->pdev->device;
- 		break;
- 	case NOUVEAU_GETPARAM_BUS_TYPE:
- 		if (drm_pci_device_is_agp(dev))
---- a/drivers/gpu/drm/nouveau/nouveau_bios.c
-+++ b/drivers/gpu/drm/nouveau/nouveau_bios.c
-@@ -127,8 +127,8 @@ static int call_lvds_manufacturer_script
- #ifdef __powerpc__
- 	/* Powerbook specific quirks */
- 	if (script == LVDS_RESET &&
--	    (dev->pci_device == 0x0179 || dev->pci_device == 0x0189 ||
--	     dev->pci_device == 0x0329))
-+	    (dev->pdev->device == 0x0179 || dev->pdev->device == 0x0189 ||
-+	     dev->pdev->device == 0x0329))
- 		nv_write_tmds(dev, dcbent->or, 0, 0x02, 0x72);
- #endif
- 
---- a/drivers/gpu/drm/nouveau/nouveau_connector.c
-+++ b/drivers/gpu/drm/nouveau/nouveau_connector.c
-@@ -213,8 +213,8 @@ nouveau_connector_set_encoder(struct drm
- 		connector->doublescan_allowed = true;
- 		if (nv_device(drm->device)->card_type == NV_20 ||
- 		   (nv_device(drm->device)->card_type == NV_10 &&
--		    (dev->pci_device & 0x0ff0) != 0x0100 &&
--		    (dev->pci_device & 0x0ff0) != 0x0150))
-+		    (dev->pdev->device & 0x0ff0) != 0x0100 &&
-+		    (dev->pdev->device & 0x0ff0) != 0x0150))
- 			/* HW is broken */
- 			connector->interlace_allowed = false;
- 		else
---- a/drivers/gpu/drm/radeon/radeon_bios.c
-+++ b/drivers/gpu/drm/radeon/radeon_bios.c
-@@ -499,7 +499,7 @@ static bool legacy_read_disabled_bios(st
- 	crtc_ext_cntl = RREG32(RADEON_CRTC_EXT_CNTL);
- 	fp2_gen_cntl = 0;
- 
--	if (rdev->ddev->pci_device == PCI_DEVICE_ID_ATI_RADEON_QY) {
-+	if (rdev->ddev->pdev->device == PCI_DEVICE_ID_ATI_RADEON_QY) {
- 		fp2_gen_cntl = RREG32(RADEON_FP2_GEN_CNTL);
- 	}
- 
-@@ -536,7 +536,7 @@ static bool legacy_read_disabled_bios(st
- 		(RADEON_CRTC_SYNC_TRISTAT |
- 		 RADEON_CRTC_DISPLAY_DIS)));
- 
--	if (rdev->ddev->pci_device == PCI_DEVICE_ID_ATI_RADEON_QY) {
-+	if (rdev->ddev->pdev->device == PCI_DEVICE_ID_ATI_RADEON_QY) {
- 		WREG32(RADEON_FP2_GEN_CNTL, (fp2_gen_cntl & ~RADEON_FP2_ON));
- 	}
- 
-@@ -554,7 +554,7 @@ static bool legacy_read_disabled_bios(st
- 		WREG32(RADEON_CRTC2_GEN_CNTL, crtc2_gen_cntl);
- 	}
- 	WREG32(RADEON_CRTC_EXT_CNTL, crtc_ext_cntl);
--	if (rdev->ddev->pci_device == PCI_DEVICE_ID_ATI_RADEON_QY) {
-+	if (rdev->ddev->pdev->device == PCI_DEVICE_ID_ATI_RADEON_QY) {
- 		WREG32(RADEON_FP2_GEN_CNTL, fp2_gen_cntl);
- 	}
- 	return r;
---- a/drivers/gpu/drm/radeon/radeon_kms.c
-+++ b/drivers/gpu/drm/radeon/radeon_kms.c
-@@ -191,7 +191,7 @@ int radeon_info_ioctl(struct drm_device
- 
- 	switch (info->request) {
- 	case RADEON_INFO_DEVICE_ID:
--		*value = dev->pci_device;
-+		*value = dev->pdev->device;
- 		break;
- 	case RADEON_INFO_NUM_GB_PIPES:
- 		*value = rdev->num_gb_pipes;
---- a/include/drm/drmP.h
-+++ b/include/drm/drmP.h
-@@ -1191,8 +1191,6 @@ struct drm_device {
- 
- 	struct device *dev;             /**< Device structure */
- 	struct pci_dev *pdev;		/**< PCI device structure */
--	int pci_vendor;			/**< PCI vendor id */
--	int pci_device;			/**< PCI device id */
- #ifdef __alpha__
- 	struct pci_controller *hose;
- #endif
diff --git a/patches.baytrail/1002-drm-fold-in-drm_sg_alloc-into-the-ioctl.patch b/patches.baytrail/1002-drm-fold-in-drm_sg_alloc-into-the-ioctl.patch
deleted file mode 100644
index fddfc96aa0b02..0000000000000
--- a/patches.baytrail/1002-drm-fold-in-drm_sg_alloc-into-the-ioctl.patch
+++ /dev/null
@@ -1,80 +0,0 @@
-From a88826045dfc9a7fe93e2edb0332d277538c8083 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Wed, 10 Jul 2013 14:11:50 +0200
-Subject: drm: fold in drm_sg_alloc into the ioctl
-
-There's no other caller from driver code, so we can fold this in.
-
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Signed-off-by: Dave Airlie <airlied@gmail.com>
-(cherry picked from commit 1d8d29cf2a9956ec5ea2395232a8121577a6cfee)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_drv.c     |  2 +-
- drivers/gpu/drm/drm_scatter.c | 13 +++----------
- include/drm/drmP.h            |  3 +--
- 3 files changed, 5 insertions(+), 13 deletions(-)
-
-diff --git a/drivers/gpu/drm/drm_drv.c b/drivers/gpu/drm/drm_drv.c
-index 98b158e58538..9f571b8ade38 100644
---- a/drivers/gpu/drm/drm_drv.c
-+++ b/drivers/gpu/drm/drm_drv.c
-@@ -122,7 +122,7 @@ static const struct drm_ioctl_desc drm_ioctls[] = {
- 	DRM_IOCTL_DEF(DRM_IOCTL_AGP_UNBIND, drm_agp_unbind_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- #endif
- 
--	DRM_IOCTL_DEF(DRM_IOCTL_SG_ALLOC, drm_sg_alloc_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
-+	DRM_IOCTL_DEF(DRM_IOCTL_SG_ALLOC, drm_sg_alloc, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- 	DRM_IOCTL_DEF(DRM_IOCTL_SG_FREE, drm_sg_free, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
- 
- 	DRM_IOCTL_DEF(DRM_IOCTL_WAIT_VBLANK, drm_wait_vblank, DRM_UNLOCKED),
-diff --git a/drivers/gpu/drm/drm_scatter.c b/drivers/gpu/drm/drm_scatter.c
-index d87f60bbc330..a4a076ff1757 100644
---- a/drivers/gpu/drm/drm_scatter.c
-+++ b/drivers/gpu/drm/drm_scatter.c
-@@ -70,8 +70,10 @@ void drm_sg_cleanup(struct drm_sg_mem * entry)
- # define ScatterHandle(x) (unsigned int)(x)
- #endif
- 
--int drm_sg_alloc(struct drm_device *dev, struct drm_scatter_gather * request)
-+int drm_sg_alloc(struct drm_device *dev, void *data,
-+		 struct drm_file *file_priv)
- {
-+	struct drm_scatter_gather *request = data;
- 	struct drm_sg_mem *entry;
- 	unsigned long pages, i, j;
- 
-@@ -181,15 +183,6 @@ int drm_sg_alloc(struct drm_device *dev, struct drm_scatter_gather * request)
- 	return -ENOMEM;
- }
- 
--int drm_sg_alloc_ioctl(struct drm_device *dev, void *data,
--		       struct drm_file *file_priv)
--{
--	struct drm_scatter_gather *request = data;
--
--	return drm_sg_alloc(dev, request);
--
--}
--
- int drm_sg_free(struct drm_device *dev, void *data,
- 		struct drm_file *file_priv)
- {
-diff --git a/include/drm/drmP.h b/include/drm/drmP.h
-index 6b091e5ba4e5..afa0b34c90ad 100644
---- a/include/drm/drmP.h
-+++ b/include/drm/drmP.h
-@@ -1541,9 +1541,8 @@ extern int drm_vma_info(struct seq_file *m, void *data);
- 
- 				/* Scatter Gather Support (drm_scatter.h) */
- extern void drm_sg_cleanup(struct drm_sg_mem * entry);
--extern int drm_sg_alloc_ioctl(struct drm_device *dev, void *data,
-+extern int drm_sg_alloc(struct drm_device *dev, void *data,
- 			struct drm_file *file_priv);
--extern int drm_sg_alloc(struct drm_device *dev, struct drm_scatter_gather * request);
- extern int drm_sg_free(struct drm_device *dev, void *data,
- 		       struct drm_file *file_priv);
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1003-drm-hide-legacy-sg-cleanup-better-from-common-code.patch b/patches.baytrail/1003-drm-hide-legacy-sg-cleanup-better-from-common-code.patch
deleted file mode 100644
index 9353884baced6..0000000000000
--- a/patches.baytrail/1003-drm-hide-legacy-sg-cleanup-better-from-common-code.patch
+++ /dev/null
@@ -1,82 +0,0 @@
-From c1de56f94579ce9aa93c273b1438ff20735c1a7d Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 8 Aug 2013 15:41:17 +0200
-Subject: drm: hide legacy sg cleanup better from common code
-
-I've decided that some clear markers for what's legacy dri1/non-gem
-code is useful. I've opted to use the drm_legacy prefix and then hide
-all the checks in that function for better readability in the common
-code.
-
-Reviewed-by: Eric Anholt <eric@anholt.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit 3d914e8357256e7e92d1b7dd2dda9cf94e39c4e8)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_drv.c     |  6 +-----
- drivers/gpu/drm/drm_scatter.c | 10 +++++++++-
- include/drm/drmP.h            |  2 +-
- 3 files changed, 11 insertions(+), 7 deletions(-)
-
-diff --git a/drivers/gpu/drm/drm_drv.c b/drivers/gpu/drm/drm_drv.c
-index 9f571b8ade38..45a2ea10b1c9 100644
---- a/drivers/gpu/drm/drm_drv.c
-+++ b/drivers/gpu/drm/drm_drv.c
-@@ -196,11 +196,7 @@ int drm_lastclose(struct drm_device * dev)
- 
- 	drm_agp_clear(dev);
- 
--	if (drm_core_check_feature(dev, DRIVER_SG) && dev->sg &&
--	    !drm_core_check_feature(dev, DRIVER_MODESET)) {
--		drm_sg_cleanup(dev->sg);
--		dev->sg = NULL;
--	}
-+	drm_legacy_sg_cleanup(dev);
- 
- 	/* Clear vma list (only built for debugging) */
- 	list_for_each_entry_safe(vma, vma_temp, &dev->vmalist, head) {
-diff --git a/drivers/gpu/drm/drm_scatter.c b/drivers/gpu/drm/drm_scatter.c
-index a4a076ff1757..dd8a6480065c 100644
---- a/drivers/gpu/drm/drm_scatter.c
-+++ b/drivers/gpu/drm/drm_scatter.c
-@@ -46,7 +46,7 @@ static inline void *drm_vmalloc_dma(unsigned long size)
- #endif
- }
- 
--void drm_sg_cleanup(struct drm_sg_mem * entry)
-+static void drm_sg_cleanup(struct drm_sg_mem * entry)
- {
- 	struct page *page;
- 	int i;
-@@ -64,6 +64,14 @@ void drm_sg_cleanup(struct drm_sg_mem * entry)
- 	kfree(entry);
- }
- 
-+void drm_legacy_sg_cleanup(struct drm_device *dev)
-+{
-+	if (drm_core_check_feature(dev, DRIVER_SG) && dev->sg &&
-+	    !drm_core_check_feature(dev, DRIVER_MODESET)) {
-+		drm_sg_cleanup(dev->sg);
-+		dev->sg = NULL;
-+	}
-+}
- #ifdef _LP64
- # define ScatterHandle(x) (unsigned int)((x >> 32) + (x & ((1L << 32) - 1)))
- #else
-diff --git a/include/drm/drmP.h b/include/drm/drmP.h
-index afa0b34c90ad..4b76bd8dfc32 100644
---- a/include/drm/drmP.h
-+++ b/include/drm/drmP.h
-@@ -1540,7 +1540,7 @@ extern int drm_vma_info(struct seq_file *m, void *data);
- #endif
- 
- 				/* Scatter Gather Support (drm_scatter.h) */
--extern void drm_sg_cleanup(struct drm_sg_mem * entry);
-+extern void drm_legacy_sg_cleanup(struct drm_device *dev);
- extern int drm_sg_alloc(struct drm_device *dev, void *data,
- 			struct drm_file *file_priv);
- extern int drm_sg_free(struct drm_device *dev, void *data,
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1004-drm-mark-dma-setup-teardown-as-legacy-systems.patch b/patches.baytrail/1004-drm-mark-dma-setup-teardown-as-legacy-systems.patch
deleted file mode 100644
index eba6358e6523e..0000000000000
--- a/patches.baytrail/1004-drm-mark-dma-setup-teardown-as-legacy-systems.patch
+++ /dev/null
@@ -1,118 +0,0 @@
-From 8d8e3896a74c7aa9a428e768adcab586e16705d0 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 8 Aug 2013 15:41:19 +0200
-Subject: drm: mark dma setup/teardown as legacy systems
-
-And hide the checks a bit better. This was already disallowed for
-modesetting drivers, so no functinal change here.
-
-Reviewed-by: Eric Anholt <eric@anholt.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit e2e99a8206bcce6f2d3d72ff8be42859f98dbcda)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_dma.c  | 17 +++++++++++++++--
- drivers/gpu/drm/drm_drv.c  |  4 +---
- drivers/gpu/drm/drm_fops.c | 12 +++---------
- include/drm/drmP.h         |  4 ++--
- 4 files changed, 21 insertions(+), 16 deletions(-)
-
-diff --git a/drivers/gpu/drm/drm_dma.c b/drivers/gpu/drm/drm_dma.c
-index 495b5fd2787c..8a140a953754 100644
---- a/drivers/gpu/drm/drm_dma.c
-+++ b/drivers/gpu/drm/drm_dma.c
-@@ -44,10 +44,18 @@
-  *
-  * Allocate and initialize a drm_device_dma structure.
-  */
--int drm_dma_setup(struct drm_device *dev)
-+int drm_legacy_dma_setup(struct drm_device *dev)
- {
- 	int i;
- 
-+	if (!drm_core_check_feature(dev, DRIVER_HAVE_DMA) ||
-+	    drm_core_check_feature(dev, DRIVER_MODESET)) {
-+		return 0;
-+	}
-+
-+	dev->buf_use = 0;
-+	atomic_set(&dev->buf_alloc, 0);
-+
- 	dev->dma = kzalloc(sizeof(*dev->dma), GFP_KERNEL);
- 	if (!dev->dma)
- 		return -ENOMEM;
-@@ -66,11 +74,16 @@ int drm_dma_setup(struct drm_device *dev)
-  * Free all pages associated with DMA buffers, the buffers and pages lists, and
-  * finally the drm_device::dma structure itself.
-  */
--void drm_dma_takedown(struct drm_device *dev)
-+void drm_legacy_dma_takedown(struct drm_device *dev)
- {
- 	struct drm_device_dma *dma = dev->dma;
- 	int i, j;
- 
-+	if (!drm_core_check_feature(dev, DRIVER_HAVE_DMA) ||
-+	    drm_core_check_feature(dev, DRIVER_MODESET)) {
-+		return;
-+	}
-+
- 	if (!dma)
- 		return;
- 
-diff --git a/drivers/gpu/drm/drm_drv.c b/drivers/gpu/drm/drm_drv.c
-index 45a2ea10b1c9..c89aecb181a8 100644
---- a/drivers/gpu/drm/drm_drv.c
-+++ b/drivers/gpu/drm/drm_drv.c
-@@ -204,9 +204,7 @@ int drm_lastclose(struct drm_device * dev)
- 		kfree(vma);
- 	}
- 
--	if (drm_core_check_feature(dev, DRIVER_HAVE_DMA) &&
--	    !drm_core_check_feature(dev, DRIVER_MODESET))
--		drm_dma_takedown(dev);
-+	drm_legacy_dma_takedown(dev);
- 
- 	dev->dev_mapping = NULL;
- 	mutex_unlock(&dev->struct_mutex);
-diff --git a/drivers/gpu/drm/drm_fops.c b/drivers/gpu/drm/drm_fops.c
-index 49bec8a62d89..0aff5f2542d2 100644
---- a/drivers/gpu/drm/drm_fops.c
-+++ b/drivers/gpu/drm/drm_fops.c
-@@ -60,15 +60,9 @@ static int drm_setup(struct drm_device * dev)
- 	atomic_set(&dev->ioctl_count, 0);
- 	atomic_set(&dev->vma_count, 0);
- 
--	if (drm_core_check_feature(dev, DRIVER_HAVE_DMA) &&
--	    !drm_core_check_feature(dev, DRIVER_MODESET)) {
--		dev->buf_use = 0;
--		atomic_set(&dev->buf_alloc, 0);
--
--		i = drm_dma_setup(dev);
--		if (i < 0)
--			return i;
--	}
-+	i = drm_legacy_dma_setup(dev);
-+	if (i < 0)
-+		return i;
- 
- 	for (i = 0; i < ARRAY_SIZE(dev->counts); i++)
- 		atomic_set(&dev->counts[i], 0);
-diff --git a/include/drm/drmP.h b/include/drm/drmP.h
-index 4b76bd8dfc32..4dfa1dad9a37 100644
---- a/include/drm/drmP.h
-+++ b/include/drm/drmP.h
-@@ -1390,8 +1390,8 @@ extern int drm_mapbufs(struct drm_device *dev, void *data,
- extern int drm_order(unsigned long size);
- 
- 				/* DMA support (drm_dma.h) */
--extern int drm_dma_setup(struct drm_device *dev);
--extern void drm_dma_takedown(struct drm_device *dev);
-+extern int drm_legacy_dma_setup(struct drm_device *dev);
-+extern void drm_legacy_dma_takedown(struct drm_device *dev);
- extern void drm_free_buffer(struct drm_device *dev, struct drm_buf * buf);
- extern void drm_core_reclaim_buffers(struct drm_device *dev,
- 				     struct drm_file *filp);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1005-drm-move-dev-data-clearing-from-drm_setup-to-lastclo.patch b/patches.baytrail/1005-drm-move-dev-data-clearing-from-drm_setup-to-lastclo.patch
deleted file mode 100644
index 6947a6d8383c2..0000000000000
--- a/patches.baytrail/1005-drm-move-dev-data-clearing-from-drm_setup-to-lastclo.patch
+++ /dev/null
@@ -1,120 +0,0 @@
-From 09daeeb11d01cb7654d52cdd161b5efeb6113f6c Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 8 Aug 2013 15:41:35 +0200
-Subject: drm: move dev data clearing from drm_setup to lastclose
-
-We kzalloc this structure, and for real kms devices we should never
-loose track of things really.
-
-But ums/legacy drivers rely on the drm core to clean up a bit of cruft
-between lastclose and firstopen (i.e. when X is being restarted), so
-keep this around. But give it a clear drm_legacy_ prefix and
-conditionalize the code on !DRIVER_MODESET.
-
-Cc: David Herrmann <dh.herrmann@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Reviewed-by: David Herrmann <dh.herrmann@gmail.com>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit f336ab76008f66f6153573d1479aeed388d7b08a)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_drv.c  | 27 +++++++++++++++++++++++++++
- drivers/gpu/drm/drm_fops.c | 27 +++------------------------
- 2 files changed, 30 insertions(+), 24 deletions(-)
-
-diff --git a/drivers/gpu/drm/drm_drv.c b/drivers/gpu/drm/drm_drv.c
-index c89aecb181a8..79c808ad4643 100644
---- a/drivers/gpu/drm/drm_drv.c
-+++ b/drivers/gpu/drm/drm_drv.c
-@@ -171,6 +171,31 @@ static const struct drm_ioctl_desc drm_ioctls[] = {
- #define DRM_CORE_IOCTL_COUNT	ARRAY_SIZE( drm_ioctls )
- 
- /**
-+ * drm_legacy_dev_reinit
-+ *
-+ * Reinitializes a legacy/ums drm device in it's lastclose function.
-+ */
-+static void drm_legacy_dev_reinit(struct drm_device *dev)
-+{
-+	int i;
-+
-+	if (drm_core_check_feature(dev, DRIVER_MODESET))
-+		return;
-+
-+	atomic_set(&dev->ioctl_count, 0);
-+	atomic_set(&dev->vma_count, 0);
-+
-+	for (i = 0; i < ARRAY_SIZE(dev->counts); i++)
-+		atomic_set(&dev->counts[i], 0);
-+
-+	dev->sigdata.lock = NULL;
-+
-+	dev->context_flag = 0;
-+	dev->last_context = 0;
-+	dev->if_version = 0;
-+}
-+
-+/**
-  * Take down the DRM device.
-  *
-  * \param dev DRM device structure.
-@@ -209,6 +234,8 @@ int drm_lastclose(struct drm_device * dev)
- 	dev->dev_mapping = NULL;
- 	mutex_unlock(&dev->struct_mutex);
- 
-+	drm_legacy_dev_reinit(dev);
-+
- 	DRM_DEBUG("lastclose completed\n");
- 	return 0;
- }
-diff --git a/drivers/gpu/drm/drm_fops.c b/drivers/gpu/drm/drm_fops.c
-index 0aff5f2542d2..375dcfae0cf4 100644
---- a/drivers/gpu/drm/drm_fops.c
-+++ b/drivers/gpu/drm/drm_fops.c
-@@ -48,7 +48,6 @@ static int drm_open_helper(struct inode *inode, struct file *filp,
- 
- static int drm_setup(struct drm_device * dev)
- {
--	int i;
- 	int ret;
- 
- 	if (dev->driver->firstopen) {
-@@ -57,32 +56,12 @@ static int drm_setup(struct drm_device * dev)
- 			return ret;
- 	}
- 
--	atomic_set(&dev->ioctl_count, 0);
--	atomic_set(&dev->vma_count, 0);
--
--	i = drm_legacy_dma_setup(dev);
--	if (i < 0)
--		return i;
--
--	for (i = 0; i < ARRAY_SIZE(dev->counts); i++)
--		atomic_set(&dev->counts[i], 0);
--
--	dev->sigdata.lock = NULL;
-+	ret = drm_legacy_dma_setup(dev);
-+	if (ret < 0)
-+		return ret;
- 
--	dev->context_flag = 0;
--	dev->last_context = 0;
--	dev->if_version = 0;
- 
- 	DRM_DEBUG("\n");
--
--	/*
--	 * The kernel's context could be created here, but is now created
--	 * in drm_dma_enqueue.  This is more resource-efficient for
--	 * hardware that does not do DMA, but may mean that
--	 * drm_select_queue fails between the time the interrupt is
--	 * initialized and the time the queues are initialized.
--	 */
--
- 	return 0;
- }
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1006-drm-move-drm_lastclose-to-drm_fops.c.patch b/patches.baytrail/1006-drm-move-drm_lastclose-to-drm_fops.c.patch
deleted file mode 100644
index a953599ada90a..0000000000000
--- a/patches.baytrail/1006-drm-move-drm_lastclose-to-drm_fops.c.patch
+++ /dev/null
@@ -1,189 +0,0 @@
-From 136013f82bb95616de30f186d9ad35b09dd82144 Mon Sep 17 00:00:00 2001
-From: David Herrmann <dh.herrmann@gmail.com>
-Date: Wed, 2 Oct 2013 11:23:36 +0200
-Subject: drm: move drm_lastclose() to drm_fops.c
-
-Try to keep all functions that handle DRM file_operations in drm_fops.c
-so internal helpers can be marked static later.
-
-This makes the split between the 3 core files more obvious:
- - drm_stub.c: DRM device allocation/destruction and management
- - drm_fops.c: DRM file_operations (except for ioctl)
- - drm_drv.c: Global DRM init + ioctl handling
-Well, ioctl handling is still spread throughout hundreds of source files,
-but at least the others are clearly defined this way.
-
-Signed-off-by: David Herrmann <dh.herrmann@gmail.com>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit 1c8887dd01d97781471c9a876e3a4e804bb33f31)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_drv.c  | 70 ----------------------------------------------
- drivers/gpu/drm/drm_fops.c | 70 ++++++++++++++++++++++++++++++++++++++++++++++
- 2 files changed, 70 insertions(+), 70 deletions(-)
-
-diff --git a/drivers/gpu/drm/drm_drv.c b/drivers/gpu/drm/drm_drv.c
-index 79c808ad4643..d08762962dc0 100644
---- a/drivers/gpu/drm/drm_drv.c
-+++ b/drivers/gpu/drm/drm_drv.c
-@@ -170,76 +170,6 @@ static const struct drm_ioctl_desc drm_ioctls[] = {
- 
- #define DRM_CORE_IOCTL_COUNT	ARRAY_SIZE( drm_ioctls )
- 
--/**
-- * drm_legacy_dev_reinit
-- *
-- * Reinitializes a legacy/ums drm device in it's lastclose function.
-- */
--static void drm_legacy_dev_reinit(struct drm_device *dev)
--{
--	int i;
--
--	if (drm_core_check_feature(dev, DRIVER_MODESET))
--		return;
--
--	atomic_set(&dev->ioctl_count, 0);
--	atomic_set(&dev->vma_count, 0);
--
--	for (i = 0; i < ARRAY_SIZE(dev->counts); i++)
--		atomic_set(&dev->counts[i], 0);
--
--	dev->sigdata.lock = NULL;
--
--	dev->context_flag = 0;
--	dev->last_context = 0;
--	dev->if_version = 0;
--}
--
--/**
-- * Take down the DRM device.
-- *
-- * \param dev DRM device structure.
-- *
-- * Frees every resource in \p dev.
-- *
-- * \sa drm_device
-- */
--int drm_lastclose(struct drm_device * dev)
--{
--	struct drm_vma_entry *vma, *vma_temp;
--
--	DRM_DEBUG("\n");
--
--	if (dev->driver->lastclose)
--		dev->driver->lastclose(dev);
--	DRM_DEBUG("driver lastclose completed\n");
--
--	if (dev->irq_enabled && !drm_core_check_feature(dev, DRIVER_MODESET))
--		drm_irq_uninstall(dev);
--
--	mutex_lock(&dev->struct_mutex);
--
--	drm_agp_clear(dev);
--
--	drm_legacy_sg_cleanup(dev);
--
--	/* Clear vma list (only built for debugging) */
--	list_for_each_entry_safe(vma, vma_temp, &dev->vmalist, head) {
--		list_del(&vma->head);
--		kfree(vma);
--	}
--
--	drm_legacy_dma_takedown(dev);
--
--	dev->dev_mapping = NULL;
--	mutex_unlock(&dev->struct_mutex);
--
--	drm_legacy_dev_reinit(dev);
--
--	DRM_DEBUG("lastclose completed\n");
--	return 0;
--}
--
- /** File operations structure */
- static const struct file_operations drm_stub_fops = {
- 	.owner = THIS_MODULE,
-diff --git a/drivers/gpu/drm/drm_fops.c b/drivers/gpu/drm/drm_fops.c
-index 375dcfae0cf4..0bfbbe1506c8 100644
---- a/drivers/gpu/drm/drm_fops.c
-+++ b/drivers/gpu/drm/drm_fops.c
-@@ -370,6 +370,76 @@ static void drm_events_release(struct drm_file *file_priv)
- }
- 
- /**
-+ * drm_legacy_dev_reinit
-+ *
-+ * Reinitializes a legacy/ums drm device in it's lastclose function.
-+ */
-+static void drm_legacy_dev_reinit(struct drm_device *dev)
-+{
-+	int i;
-+
-+	if (drm_core_check_feature(dev, DRIVER_MODESET))
-+		return;
-+
-+	atomic_set(&dev->ioctl_count, 0);
-+	atomic_set(&dev->vma_count, 0);
-+
-+	for (i = 0; i < ARRAY_SIZE(dev->counts); i++)
-+		atomic_set(&dev->counts[i], 0);
-+
-+	dev->sigdata.lock = NULL;
-+
-+	dev->context_flag = 0;
-+	dev->last_context = 0;
-+	dev->if_version = 0;
-+}
-+
-+/**
-+ * Take down the DRM device.
-+ *
-+ * \param dev DRM device structure.
-+ *
-+ * Frees every resource in \p dev.
-+ *
-+ * \sa drm_device
-+ */
-+int drm_lastclose(struct drm_device * dev)
-+{
-+	struct drm_vma_entry *vma, *vma_temp;
-+
-+	DRM_DEBUG("\n");
-+
-+	if (dev->driver->lastclose)
-+		dev->driver->lastclose(dev);
-+	DRM_DEBUG("driver lastclose completed\n");
-+
-+	if (dev->irq_enabled && !drm_core_check_feature(dev, DRIVER_MODESET))
-+		drm_irq_uninstall(dev);
-+
-+	mutex_lock(&dev->struct_mutex);
-+
-+	drm_agp_clear(dev);
-+
-+	drm_legacy_sg_cleanup(dev);
-+
-+	/* Clear vma list (only built for debugging) */
-+	list_for_each_entry_safe(vma, vma_temp, &dev->vmalist, head) {
-+		list_del(&vma->head);
-+		kfree(vma);
-+	}
-+
-+	drm_legacy_dma_takedown(dev);
-+
-+	dev->dev_mapping = NULL;
-+	mutex_unlock(&dev->struct_mutex);
-+
-+	drm_legacy_dev_reinit(dev);
-+
-+	DRM_DEBUG("lastclose completed\n");
-+	return 0;
-+}
-+
-+/**
-  * Release file.
-  *
-  * \param inode device inode
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1007-drm-no-op-out-GET_STATS-ioctl.patch b/patches.baytrail/1007-drm-no-op-out-GET_STATS-ioctl.patch
deleted file mode 100644
index 192513a625e3c..0000000000000
--- a/patches.baytrail/1007-drm-no-op-out-GET_STATS-ioctl.patch
+++ /dev/null
@@ -1,59 +0,0 @@
-From d4f1e8ab1a773e1b6e4cf0841a1fa671c8b3b60c Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Thu, 8 Aug 2013 15:41:32 +0200
-Subject: drm: no-op out GET_STATS ioctl
-
-Again only used by a tests in libdrm and by dristat. Nowadays we have
-much better tracing tools to get detailed insights into what a drm
-driver is doing. And for a simple "does it work" kind of question that
-these stats could answer we have plenty of dmesg debug log spew.
-
-So I don't see any use for this stat gathering complexity at all.
-
-To be able to gradually drop things start with ripping out the
-interfaces to it, here the ioctl.
-
-To prevent dristat from eating its own stack garbage we can't use the
-drm_noop ioctl though, since we need to clear the return data with a
-memset.
-
-Cc: Eric Anholt <eric@anholt.net>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Reviewed-by: Eric Anholt <eric@anholt.net>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit d79cdc8312689b39c6d83718c1c196af4b3cd18c)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_ioctl.c | 13 +------------
- 1 file changed, 1 insertion(+), 12 deletions(-)
-
-diff --git a/drivers/gpu/drm/drm_ioctl.c b/drivers/gpu/drm/drm_ioctl.c
-index e77bd8b57df2..49fd720b0c17 100644
---- a/drivers/gpu/drm/drm_ioctl.c
-+++ b/drivers/gpu/drm/drm_ioctl.c
-@@ -243,21 +243,10 @@ int drm_getstats(struct drm_device *dev, void *data,
- 		 struct drm_file *file_priv)
- {
- 	struct drm_stats *stats = data;
--	int i;
- 
-+	/* Clear stats to prevent userspace from eating its stack garbage. */
- 	memset(stats, 0, sizeof(*stats));
- 
--	for (i = 0; i < dev->counters; i++) {
--		if (dev->types[i] == _DRM_STAT_LOCK)
--			stats->data[i].value =
--			    (file_priv->master->lock.hw_lock ? file_priv->master->lock.hw_lock->lock : 0);
--		else
--			stats->data[i].value = atomic_read(&dev->counts[i]);
--		stats->data[i].type = dev->types[i];
--	}
--
--	stats->count = dev->counters;
--
- 	return 0;
- }
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1008-drm-Kill-drm-perf-counter-leftovers.patch b/patches.baytrail/1008-drm-Kill-drm-perf-counter-leftovers.patch
deleted file mode 100644
index 9d05abdeb8b89..0000000000000
--- a/patches.baytrail/1008-drm-Kill-drm-perf-counter-leftovers.patch
+++ /dev/null
@@ -1,204 +0,0 @@
-From 0e712111704800a164a309f55ac04922218e7f45 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Fri, 4 Oct 2013 14:53:41 +0300
-Subject: drm: Kill drm perf counter leftovers
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The user of these counters was killed in
-
- commit d79cdc8312689b39c6d83718c1c196af4b3cd18c
- Author: Daniel Vetter <daniel.vetter@ffwll.ch>
- Date:   Thu Aug 8 15:41:32 2013 +0200
-
-    drm: no-op out GET_STATS ioctl
-
-so clean up the leftovers as well.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit 0111be42186fc5461b9e9d579014c70869ab3152)
-Signed-off-by: James Ausmus <james.ausmus@intel.com>
-
-Conflicts:
-	drivers/gpu/drm/i915/i915_dma.c
-	(resolution from 967ad7f ("Merge remote-tracking branch
-	'airlied/drm-next' into drm-intel-next")
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_drv.c       |    1 -
- drivers/gpu/drm/drm_fops.c      |    7 -------
- drivers/gpu/drm/drm_lock.c      |    3 ---
- drivers/gpu/drm/drm_stub.c      |    9 ---------
- drivers/gpu/drm/i810/i810_dma.c |   11 -----------
- drivers/gpu/drm/i915/i915_dma.c |    7 -------
- drivers/gpu/drm/mga/mga_dma.c   |    5 -----
- include/drm/drmP.h              |    7 -------
- 8 files changed, 50 deletions(-)
-
---- a/drivers/gpu/drm/drm_drv.c
-+++ b/drivers/gpu/drm/drm_drv.c
-@@ -323,7 +323,6 @@ long drm_ioctl(struct file *filp,
- 		return -ENODEV;
- 
- 	atomic_inc(&dev->ioctl_count);
--	atomic_inc(&dev->counts[_DRM_STAT_IOCTLS]);
- 	++file_priv->ioctl_count;
- 
- 	if ((nr >= DRM_CORE_IOCTL_COUNT) &&
---- a/drivers/gpu/drm/drm_fops.c
-+++ b/drivers/gpu/drm/drm_fops.c
-@@ -112,7 +112,6 @@ int drm_open(struct inode *inode, struct
- 	retcode = drm_open_helper(inode, filp, dev);
- 	if (retcode)
- 		goto err_undo;
--	atomic_inc(&dev->counts[_DRM_STAT_OPENS]);
- 	if (need_setup) {
- 		retcode = drm_setup(dev);
- 		if (retcode)
-@@ -376,17 +375,12 @@ static void drm_events_release(struct dr
-  */
- static void drm_legacy_dev_reinit(struct drm_device *dev)
- {
--	int i;
--
- 	if (drm_core_check_feature(dev, DRIVER_MODESET))
- 		return;
- 
- 	atomic_set(&dev->ioctl_count, 0);
- 	atomic_set(&dev->vma_count, 0);
- 
--	for (i = 0; i < ARRAY_SIZE(dev->counts); i++)
--		atomic_set(&dev->counts[i], 0);
--
- 	dev->sigdata.lock = NULL;
- 
- 	dev->context_flag = 0;
-@@ -570,7 +564,6 @@ int drm_release(struct inode *inode, str
- 	 * End inline drm_release
- 	 */
- 
--	atomic_inc(&dev->counts[_DRM_STAT_CLOSES]);
- 	if (!--dev->open_count) {
- 		if (atomic_read(&dev->ioctl_count)) {
- 			DRM_ERROR("Device busy: %d\n",
---- a/drivers/gpu/drm/drm_lock.c
-+++ b/drivers/gpu/drm/drm_lock.c
-@@ -86,7 +86,6 @@ int drm_lock(struct drm_device *dev, voi
- 		if (drm_lock_take(&master->lock, lock->context)) {
- 			master->lock.file_priv = file_priv;
- 			master->lock.lock_time = jiffies;
--			atomic_inc(&dev->counts[_DRM_STAT_LOCKS]);
- 			break;	/* Got lock */
- 		}
- 
-@@ -157,8 +156,6 @@ int drm_unlock(struct drm_device *dev, v
- 		return -EINVAL;
- 	}
- 
--	atomic_inc(&dev->counts[_DRM_STAT_UNLOCKS]);
--
- 	if (drm_lock_free(&master->lock, lock->context)) {
- 		/* FIXME: Should really bail out here. */
- 	}
---- a/drivers/gpu/drm/drm_stub.c
-+++ b/drivers/gpu/drm/drm_stub.c
-@@ -496,15 +496,6 @@ struct drm_device *drm_dev_alloc(struct
- 	mutex_init(&dev->struct_mutex);
- 	mutex_init(&dev->ctxlist_mutex);
- 
--	/* the DRM has 6 basic counters */
--	dev->counters = 6;
--	dev->types[0] = _DRM_STAT_LOCK;
--	dev->types[1] = _DRM_STAT_OPENS;
--	dev->types[2] = _DRM_STAT_CLOSES;
--	dev->types[3] = _DRM_STAT_IOCTLS;
--	dev->types[4] = _DRM_STAT_LOCKS;
--	dev->types[5] = _DRM_STAT_UNLOCKS;
--
- 	if (drm_ht_create(&dev->map_hash, 12))
- 		goto err_free;
- 
---- a/drivers/gpu/drm/i810/i810_dma.c
-+++ b/drivers/gpu/drm/i810/i810_dma.c
-@@ -944,8 +944,6 @@ static int i810_dma_vertex(struct drm_de
- 				 dma->buflist[vertex->idx],
- 				 vertex->discard, vertex->used);
- 
--	atomic_add(vertex->used, &dev->counts[_DRM_STAT_SECONDARY]);
--	atomic_inc(&dev->counts[_DRM_STAT_DMA]);
- 	sarea_priv->last_enqueue = dev_priv->counter - 1;
- 	sarea_priv->last_dispatch = (int)hw_status[5];
- 
-@@ -1105,8 +1103,6 @@ static int i810_dma_mc(struct drm_device
- 	i810_dma_dispatch_mc(dev, dma->buflist[mc->idx], mc->used,
- 			     mc->last_render);
- 
--	atomic_add(mc->used, &dev->counts[_DRM_STAT_SECONDARY]);
--	atomic_inc(&dev->counts[_DRM_STAT_DMA]);
- 	sarea_priv->last_enqueue = dev_priv->counter - 1;
- 	sarea_priv->last_dispatch = (int)hw_status[5];
- 
-@@ -1197,13 +1193,6 @@ static int i810_flip_bufs(struct drm_dev
- 
- int i810_driver_load(struct drm_device *dev, unsigned long flags)
- {
--	/* i810 has 4 more counters */
--	dev->counters += 4;
--	dev->types[6] = _DRM_STAT_IRQ;
--	dev->types[7] = _DRM_STAT_PRIMARY;
--	dev->types[8] = _DRM_STAT_SECONDARY;
--	dev->types[9] = _DRM_STAT_DMA;
--
- 	pci_set_master(dev->pdev);
- 
- 	return 0;
---- a/drivers/gpu/drm/i915/i915_dma.c
-+++ b/drivers/gpu/drm/i915/i915_dma.c
-@@ -1488,13 +1488,6 @@ int i915_driver_load(struct drm_device *
- 	if (info->gen >= 6 && !drm_core_check_feature(dev, DRIVER_MODESET))
- 		return -ENODEV;
- 
--	/* i915 has 4 more counters */
--	dev->counters += 4;
--	dev->types[6] = _DRM_STAT_IRQ;
--	dev->types[7] = _DRM_STAT_PRIMARY;
--	dev->types[8] = _DRM_STAT_SECONDARY;
--	dev->types[9] = _DRM_STAT_DMA;
--
- 	dev_priv = kzalloc(sizeof(*dev_priv), GFP_KERNEL);
- 	if (dev_priv == NULL)
- 		return -ENOMEM;
---- a/drivers/gpu/drm/mga/mga_dma.c
-+++ b/drivers/gpu/drm/mga/mga_dma.c
-@@ -406,11 +406,6 @@ int mga_driver_load(struct drm_device *d
- 	dev_priv->mmio_base = pci_resource_start(dev->pdev, 1);
- 	dev_priv->mmio_size = pci_resource_len(dev->pdev, 1);
- 
--	dev->counters += 3;
--	dev->types[6] = _DRM_STAT_IRQ;
--	dev->types[7] = _DRM_STAT_PRIMARY;
--	dev->types[8] = _DRM_STAT_SECONDARY;
--
- 	ret = drm_vblank_init(dev, 1);
- 
- 	if (ret) {
---- a/include/drm/drmP.h
-+++ b/include/drm/drmP.h
-@@ -1119,13 +1119,6 @@ struct drm_device {
- 	atomic_t buf_alloc;		/**< Buffer allocation in progress */
- 	/*@} */
- 
--	/** \name Performance counters */
--	/*@{ */
--	unsigned long counters;
--	enum drm_stat_type types[15];
--	atomic_t counts[15];
--	/*@} */
--
- 	struct list_head filelist;
- 
- 	/** \name Memory management */
diff --git a/patches.baytrail/1009-drm-dp-add-helper-for-checking-DP_ENHANCED_FRAME_CAP.patch b/patches.baytrail/1009-drm-dp-add-helper-for-checking-DP_ENHANCED_FRAME_CAP.patch
deleted file mode 100644
index 395b2a251f9d4..0000000000000
--- a/patches.baytrail/1009-drm-dp-add-helper-for-checking-DP_ENHANCED_FRAME_CAP.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 50be7bdc9f105e2f23d349f98abc2ff598a5a795 Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Fri, 4 Oct 2013 15:08:08 +0300
-Subject: drm/dp: add helper for checking DP_ENHANCED_FRAME_CAP in DPCD
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit 58704e6a5478a96ca0e549ce6605332aab815eea)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- include/drm/drm_dp_helper.h | 7 +++++++
- 1 file changed, 7 insertions(+)
-
-diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
-index 83da4eb1575b..e32042fb2b63 100644
---- a/include/drm/drm_dp_helper.h
-+++ b/include/drm/drm_dp_helper.h
-@@ -390,4 +390,11 @@ drm_dp_max_lane_count(u8 dpcd[DP_RECEIVER_CAP_SIZE])
- 	return dpcd[DP_MAX_LANE_COUNT] & DP_MAX_LANE_COUNT_MASK;
- }
- 
-+static inline bool
-+drm_dp_enhanced_frame_cap(const u8 dpcd[DP_RECEIVER_CAP_SIZE])
-+{
-+	return dpcd[DP_DPCD_REV] >= 0x11 &&
-+		(dpcd[DP_MAX_LANE_COUNT] & DP_ENHANCED_FRAME_CAP);
-+}
-+
- #endif /* _DRM_DP_HELPER_H_ */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1010-drm-i915-dp-get-rid-of-intel_dp-link_configuration.patch b/patches.baytrail/1010-drm-i915-dp-get-rid-of-intel_dp-link_configuration.patch
deleted file mode 100644
index c3087e52d1b4d..0000000000000
--- a/patches.baytrail/1010-drm-i915-dp-get-rid-of-intel_dp-link_configuration.patch
+++ /dev/null
@@ -1,151 +0,0 @@
-From 6e1059fbb4ca0d53058c77d140a3a674d5c7b22c Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Fri, 4 Oct 2013 15:08:10 +0300
-Subject: drm/i915/dp: get rid of intel_dp->link_configuration
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-It's not really needed, rather just adds another place to hold
-intermediate values that could go wrong, and it's not clear that the
-training pattern set or training lane set should be written at this
-point at all.
-
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit 6aba5b6cf098ba305fc31b23cc14114a16768d22)
-Signed-off-by: James Ausmus <james.ausmus@intel.com>
-
-Conflicts:
-	drivers/gpu/drm/i915/intel_drv.h
-	(used rerere from 967ad7f ("Merge remote-tracking branch
-	'airlied/drm-next' into drm-intel-next"))
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_ddi.c |    5 +----
- drivers/gpu/drm/i915/intel_dp.c  |   34 ++++++++++++----------------------
- drivers/gpu/drm/i915/intel_drv.h |    3 ---
- 3 files changed, 13 insertions(+), 29 deletions(-)
-
---- a/drivers/gpu/drm/i915/intel_ddi.c
-+++ b/drivers/gpu/drm/i915/intel_ddi.c
-@@ -316,9 +316,6 @@ static void intel_ddi_mode_set(struct in
- 			DRM_DEBUG_DRIVER("DP audio: write eld information\n");
- 			intel_write_eld(&encoder->base, adjusted_mode);
- 		}
--
--		intel_dp_init_link_config(intel_dp);
--
- 	} else if (type == INTEL_OUTPUT_HDMI) {
- 		struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base);
- 
-@@ -1228,7 +1225,7 @@ void intel_ddi_prepare_link_retrain(stru
- 
- 	val = DP_TP_CTL_ENABLE | DP_TP_CTL_MODE_SST |
- 	      DP_TP_CTL_LINK_TRAIN_PAT1 | DP_TP_CTL_SCRAMBLE_DISABLE;
--	if (intel_dp->link_configuration[1] & DP_LANE_COUNT_ENHANCED_FRAME_EN)
-+	if (drm_dp_enhanced_frame_cap(intel_dp->dpcd))
- 		val |= DP_TP_CTL_ENHANCED_FRAME_ENABLE;
- 	I915_WRITE(DP_TP_CTL(port), val);
- 	POSTING_READ(DP_TP_CTL(port));
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -884,21 +884,6 @@ found:
- 	return true;
- }
- 
--void intel_dp_init_link_config(struct intel_dp *intel_dp)
--{
--	memset(intel_dp->link_configuration, 0, DP_LINK_CONFIGURATION_SIZE);
--	intel_dp->link_configuration[0] = intel_dp->link_bw;
--	intel_dp->link_configuration[1] = intel_dp->lane_count;
--	intel_dp->link_configuration[8] = DP_SET_ANSI_8B10B;
--	/*
--	 * Check for DPCD version > 1.1 and enhanced framing support
--	 */
--	if (intel_dp->dpcd[DP_DPCD_REV] >= 0x11 &&
--	    (intel_dp->dpcd[DP_MAX_LANE_COUNT] & DP_ENHANCED_FRAME_CAP)) {
--		intel_dp->link_configuration[1] |= DP_LANE_COUNT_ENHANCED_FRAME_EN;
--	}
--}
--
- static void ironlake_set_pll_cpu_edp(struct intel_dp *intel_dp)
- {
- 	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
-@@ -971,8 +956,6 @@ static void intel_dp_mode_set(struct int
- 		intel_write_eld(&encoder->base, adjusted_mode);
- 	}
- 
--	intel_dp_init_link_config(intel_dp);
--
- 	/* Split out the IBX/CPU vs CPT settings */
- 
- 	if (port == PORT_A && IS_GEN7(dev) && !IS_VALLEYVIEW(dev)) {
-@@ -982,7 +965,7 @@ static void intel_dp_mode_set(struct int
- 			intel_dp->DP |= DP_SYNC_VS_HIGH;
- 		intel_dp->DP |= DP_LINK_TRAIN_OFF_CPT;
- 
--		if (intel_dp->link_configuration[1] & DP_LANE_COUNT_ENHANCED_FRAME_EN)
-+		if (drm_dp_enhanced_frame_cap(intel_dp->dpcd))
- 			intel_dp->DP |= DP_ENHANCED_FRAMING;
- 
- 		intel_dp->DP |= crtc->pipe << 29;
-@@ -996,7 +979,7 @@ static void intel_dp_mode_set(struct int
- 			intel_dp->DP |= DP_SYNC_VS_HIGH;
- 		intel_dp->DP |= DP_LINK_TRAIN_OFF;
- 
--		if (intel_dp->link_configuration[1] & DP_LANE_COUNT_ENHANCED_FRAME_EN)
-+		if (drm_dp_enhanced_frame_cap(intel_dp->dpcd))
- 			intel_dp->DP |= DP_ENHANCED_FRAMING;
- 
- 		if (crtc->pipe == 1)
-@@ -2474,14 +2457,21 @@ intel_dp_start_link_train(struct intel_d
- 	uint8_t voltage;
- 	int voltage_tries, loop_tries;
- 	uint32_t DP = intel_dp->DP;
-+	uint8_t link_config[2];
- 
- 	if (HAS_DDI(dev))
- 		intel_ddi_prepare_link_retrain(encoder);
- 
- 	/* Write the link configuration data */
--	intel_dp_aux_native_write(intel_dp, DP_LINK_BW_SET,
--				  intel_dp->link_configuration,
--				  DP_LINK_CONFIGURATION_SIZE);
-+	link_config[0] = intel_dp->link_bw;
-+	link_config[1] = intel_dp->lane_count;
-+	if (drm_dp_enhanced_frame_cap(intel_dp->dpcd))
-+		link_config[1] |= DP_LANE_COUNT_ENHANCED_FRAME_EN;
-+	intel_dp_aux_native_write(intel_dp, DP_LINK_BW_SET, link_config, 2);
-+
-+	link_config[0] = 0;
-+	link_config[1] = DP_SET_ANSI_8B10B;
-+	intel_dp_aux_native_write(intel_dp, DP_DOWNSPREAD_CTRL, link_config, 2);
- 
- 	DP |= DP_PORT_EN;
- 
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -436,13 +436,11 @@ struct intel_hdmi {
- };
- 
- #define DP_MAX_DOWNSTREAM_PORTS		0x10
--#define DP_LINK_CONFIGURATION_SIZE	9
- 
- struct intel_dp {
- 	uint32_t output_reg;
- 	uint32_t aux_ch_ctl_reg;
- 	uint32_t DP;
--	uint8_t  link_configuration[DP_LINK_CONFIGURATION_SIZE];
- 	bool has_audio;
- 	enum hdmi_force_audio force_audio;
- 	uint32_t color_range;
-@@ -685,7 +683,6 @@ void i915_disable_vga_mem(struct drm_dev
- void intel_dp_init(struct drm_device *dev, int output_reg, enum port port);
- bool intel_dp_init_connector(struct intel_digital_port *intel_dig_port,
- 			     struct intel_connector *intel_connector);
--void intel_dp_init_link_config(struct intel_dp *intel_dp);
- void intel_dp_start_link_train(struct intel_dp *intel_dp);
- void intel_dp_complete_link_train(struct intel_dp *intel_dp);
- void intel_dp_stop_link_train(struct intel_dp *intel_dp);
diff --git a/patches.baytrail/1011-drm-i915-Call-io_schedule-whilst-whilsting-for-the-G.patch b/patches.baytrail/1011-drm-i915-Call-io_schedule-whilst-whilsting-for-the-G.patch
deleted file mode 100644
index e8013491ad246..0000000000000
--- a/patches.baytrail/1011-drm-i915-Call-io_schedule-whilst-whilsting-for-the-G.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From e45a72a6784120b42294fd8a65a30c2915333172 Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Fri, 4 Oct 2013 09:58:46 +0100
-Subject: drm/i915: Call io_schedule() whilst whilsting for the GPU
-
-Since we are waiting upon IO completion, inform the kernel through use
-of the io_schedule() call rather than the regular schedule(). This
-should allow the kernel to make better decisions regarding scheduling
-and power management.
-
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 5035c275af811b93dec5df6d064e0b2319cf59c8)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index 052280840f99..45571dac0a64 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -1080,7 +1080,7 @@ static int __wait_seqno(struct intel_ring_buffer *ring, u32 seqno,
- 			mod_timer(&timer, expire);
- 		}
- 
--		schedule();
-+		io_schedule();
- 
- 		if (timeout)
- 			timeout_jiffies = expire - jiffies;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1012-drm-i915-Remove-yet-another-unused-define.patch b/patches.baytrail/1012-drm-i915-Remove-yet-another-unused-define.patch
deleted file mode 100644
index 570814110bc5a..0000000000000
--- a/patches.baytrail/1012-drm-i915-Remove-yet-another-unused-define.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From ed27be1717a51467192956b19cede0a872194111 Mon Sep 17 00:00:00 2001
-From: Damien Lespiau <damien.lespiau@intel.com>
-Date: Fri, 4 Oct 2013 12:27:00 +0100
-Subject: drm/i915: Remove yet another unused define
-
-Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 389246f9c1a96c2db3b72006fd862a3af45fa663)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_debugfs.c | 3 ---
- 1 file changed, 3 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
-index 61fd61969e21..5fd6a5db6eb5 100644
---- a/drivers/gpu/drm/i915/i915_debugfs.c
-+++ b/drivers/gpu/drm/i915/i915_debugfs.c
-@@ -38,9 +38,6 @@
- #include <drm/i915_drm.h>
- #include "i915_drv.h"
- 
--#define DRM_I915_RING_DEBUG 1
--
--
- #if defined(CONFIG_DEBUG_FS)
- 
- enum {
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1013-drm-i915-dp-use-sizeof-for-memset-instead-of-magic-v.patch b/patches.baytrail/1013-drm-i915-dp-use-sizeof-for-memset-instead-of-magic-v.patch
deleted file mode 100644
index dce924ac51671..0000000000000
--- a/patches.baytrail/1013-drm-i915-dp-use-sizeof-for-memset-instead-of-magic-v.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From 947ed9ccd6e39061b800d25b95d1a32ac7ca33df Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Fri, 4 Oct 2013 15:08:47 +0300
-Subject: drm/i915/dp: use sizeof for memset instead of magic value
-
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 953d22e870e2f15963976c77985b263afcceafc9)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_dp.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
-index 4f52ec75b39f..d9090d0340c7 100644
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -2389,7 +2389,7 @@ static bool
- intel_dp_reset_link_train(struct intel_dp *intel_dp, uint32_t *DP,
- 			uint8_t dp_train_pat)
- {
--	memset(intel_dp->train_set, 0, 4);
-+	memset(intel_dp->train_set, 0, sizeof(intel_dp->train_set));
- 	intel_dp_set_signal_levels(intel_dp, DP);
- 	return intel_dp_set_link_train(intel_dp, DP, dp_train_pat);
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1014-drm-i915-Make-vlv_find_best_dpll-ppm-calculation-saf.patch b/patches.baytrail/1014-drm-i915-Make-vlv_find_best_dpll-ppm-calculation-saf.patch
deleted file mode 100644
index 6a65325a3bffb..0000000000000
--- a/patches.baytrail/1014-drm-i915-Make-vlv_find_best_dpll-ppm-calculation-saf.patch
+++ /dev/null
@@ -1,71 +0,0 @@
-From ce094de5b4d0ce7a33f290b33f504c3ef92c575f Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Tue, 24 Sep 2013 21:26:20 +0300
-Subject: drm/i915: Make vlv_find_best_dpll() ppm calculation safe
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Use div_u64() to make the ppm calculation in vlv_find_best_dpll() safe
-against interger overflows.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 69e4f900be175fd80fe69221a329c8993b16925b)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 16 ++++++++--------
- 1 file changed, 8 insertions(+), 8 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 1759e4c469e6..5b95e2a42caa 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -672,13 +672,11 @@ vlv_find_best_dpll(const intel_limit_t *limit, struct drm_crtc *crtc,
- 	u32 p1, p2, m1, m2, vco, bestn, bestm1, bestm2, bestp1, bestp2;
- 	u32 m, n, fastclk;
- 	u32 updrate, minupdate, p;
--	unsigned long bestppm, ppm, absppm;
-+	unsigned int bestppm = 1000000;
- 	int dotclk, flag;
- 
- 	flag = 0;
- 	dotclk = target * 1000;
--	bestppm = 1000000;
--	ppm = absppm = 0;
- 	fastclk = dotclk / (2*100);
- 	updrate = 0;
- 	minupdate = 19200;
-@@ -695,6 +693,8 @@ vlv_find_best_dpll(const intel_limit_t *limit, struct drm_crtc *crtc,
- 				p = p1 * p2;
- 				/* based on hardware requirement, prefer bigger m1,m2 values */
- 				for (m1 = limit->m1.min; m1 <= limit->m1.max; m1++) {
-+					unsigned int ppm, diff;
-+
- 					m2 = DIV_ROUND_CLOSEST(fastclk * p * n, refclk * m1);
- 					m = m1 * m2;
- 					vco = updrate * m;
-@@ -702,14 +702,14 @@ vlv_find_best_dpll(const intel_limit_t *limit, struct drm_crtc *crtc,
- 					if (vco < limit->vco.min || vco >= limit->vco.max)
- 						continue;
- 
--					ppm = 1000000 * ((vco / p) - fastclk) / fastclk;
--					absppm = (ppm > 0) ? ppm : (-ppm);
--					if (absppm < 100 && ((p1 * p2) > (bestp1 * bestp2))) {
-+					diff = abs(vco / p - fastclk);
-+					ppm = div_u64(1000000ULL * diff, fastclk);
-+					if (ppm < 100 && ((p1 * p2) > (bestp1 * bestp2))) {
- 						bestppm = 0;
- 						flag = 1;
- 					}
--					if (absppm < bestppm - 10) {
--						bestppm = absppm;
-+					if (ppm < bestppm - 10) {
-+						bestppm = ppm;
- 						flag = 1;
- 					}
- 					if (flag) {
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1015-drm-i915-Don-t-underflow-bestppm.patch b/patches.baytrail/1015-drm-i915-Don-t-underflow-bestppm.patch
deleted file mode 100644
index 6cd8a0b176ff9..0000000000000
--- a/patches.baytrail/1015-drm-i915-Don-t-underflow-bestppm.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From db0beb72c7a444d0c252b8294907c398ba96da77 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Tue, 24 Sep 2013 21:26:21 +0300
-Subject: drm/i915: Don't underflow bestppm
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-We do 'bestppm - 10' in vlv_find_best_dpll() but never check whether
-that might underflow. Add such a check.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit c686122c638838ce7113aeb22e4f1c50446de6eb)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 5b95e2a42caa..60aa0121d7b8 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -708,7 +708,7 @@ vlv_find_best_dpll(const intel_limit_t *limit, struct drm_crtc *crtc,
- 						bestppm = 0;
- 						flag = 1;
- 					}
--					if (ppm < bestppm - 10) {
-+					if (bestppm >= 10 && ppm < bestppm - 10) {
- 						bestppm = ppm;
- 						flag = 1;
- 					}
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1016-drm-i915-Rewrite-vlv_find_best_dpll.patch b/patches.baytrail/1016-drm-i915-Rewrite-vlv_find_best_dpll.patch
deleted file mode 100644
index fb358c71a83ae..0000000000000
--- a/patches.baytrail/1016-drm-i915-Rewrite-vlv_find_best_dpll.patch
+++ /dev/null
@@ -1,140 +0,0 @@
-From 842136d35ee243af59e692aeaa95d1a3d79b9a9e Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Fri, 27 Sep 2013 16:54:19 +0300
-Subject: drm/i915: Rewrite vlv_find_best_dpll()
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Rewrite vlv_find_best_dpll() to use intel_clock_t rather than
-an army of local variables.
-
-Also extract the code to calculate the derived values into
-vlv_clock().
-
-v2: Split up the earlier fixes, extract vlv_clock()
-v3: Initialize best_clock
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 6b4bf1c4952a65fae6b4043054b146642f031f19)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 74 ++++++++++++++++--------------------
- 1 file changed, 33 insertions(+), 41 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 60aa0121d7b8..4b5ffb5b9288 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -335,6 +335,14 @@ static const intel_limit_t intel_limits_vlv_hdmi = {
- 		.p2_slow = 2, .p2_fast = 20 },
- };
- 
-+static void vlv_clock(int refclk, intel_clock_t *clock)
-+{
-+	clock->m = clock->m1 * clock->m2;
-+	clock->p = clock->p1 * clock->p2;
-+	clock->vco = refclk * clock->m / clock->n;
-+	clock->dot = clock->vco / clock->p;
-+}
-+
- /**
-  * Returns whether any output on the specified pipe is of the specified type
-  */
-@@ -669,66 +677,50 @@ vlv_find_best_dpll(const intel_limit_t *limit, struct drm_crtc *crtc,
- 		   int target, int refclk, intel_clock_t *match_clock,
- 		   intel_clock_t *best_clock)
- {
--	u32 p1, p2, m1, m2, vco, bestn, bestm1, bestm2, bestp1, bestp2;
--	u32 m, n, fastclk;
--	u32 updrate, minupdate, p;
-+	intel_clock_t clock;
-+	u32 minupdate = 19200;
- 	unsigned int bestppm = 1000000;
--	int dotclk, flag;
- 
--	flag = 0;
--	dotclk = target * 1000;
--	fastclk = dotclk / (2*100);
--	updrate = 0;
--	minupdate = 19200;
--	n = p = p1 = p2 = m = m1 = m2 = vco = bestn = 0;
--	bestm1 = bestm2 = bestp1 = bestp2 = 0;
-+	target *= 5; /* fast clock */
-+
-+	memset(best_clock, 0, sizeof(*best_clock));
- 
- 	/* based on hardware requirement, prefer smaller n to precision */
--	for (n = limit->n.min; n <= ((refclk) / minupdate); n++) {
--		updrate = refclk / n;
--		for (p1 = limit->p1.max; p1 > limit->p1.min; p1--) {
--			for (p2 = limit->p2.p2_fast+1; p2 > 0; p2--) {
--				if (p2 > 10)
--					p2 = p2 - 1;
--				p = p1 * p2;
-+	for (clock.n = limit->n.min; clock.n <= ((refclk) / minupdate); clock.n++) {
-+		for (clock.p1 = limit->p1.max; clock.p1 > limit->p1.min; clock.p1--) {
-+			for (clock.p2 = limit->p2.p2_fast+1; clock.p2 > 0; clock.p2--) {
-+				if (clock.p2 > 10)
-+					clock.p2--;
-+				clock.p = clock.p1 * clock.p2;
- 				/* based on hardware requirement, prefer bigger m1,m2 values */
--				for (m1 = limit->m1.min; m1 <= limit->m1.max; m1++) {
-+				for (clock.m1 = limit->m1.min; clock.m1 <= limit->m1.max; clock.m1++) {
- 					unsigned int ppm, diff;
- 
--					m2 = DIV_ROUND_CLOSEST(fastclk * p * n, refclk * m1);
--					m = m1 * m2;
--					vco = updrate * m;
-+					clock.m2 = DIV_ROUND_CLOSEST(target * clock.p * clock.n,
-+								     refclk * clock.m1);
-+
-+					vlv_clock(refclk, &clock);
- 
--					if (vco < limit->vco.min || vco >= limit->vco.max)
-+					if (clock.vco < limit->vco.min ||
-+					    clock.vco >= limit->vco.max)
- 						continue;
- 
--					diff = abs(vco / p - fastclk);
--					ppm = div_u64(1000000ULL * diff, fastclk);
--					if (ppm < 100 && ((p1 * p2) > (bestp1 * bestp2))) {
-+					diff = abs(clock.dot - target);
-+					ppm = div_u64(1000000ULL * diff, target);
-+
-+					if (ppm < 100 && clock.p > best_clock->p) {
- 						bestppm = 0;
--						flag = 1;
-+						*best_clock = clock;
- 					}
-+
- 					if (bestppm >= 10 && ppm < bestppm - 10) {
- 						bestppm = ppm;
--						flag = 1;
--					}
--					if (flag) {
--						bestn = n;
--						bestm1 = m1;
--						bestm2 = m2;
--						bestp1 = p1;
--						bestp2 = p2;
--						flag = 0;
-+						*best_clock = clock;
- 					}
- 				}
- 			}
- 		}
- 	}
--	best_clock->n = bestn;
--	best_clock->m1 = bestm1;
--	best_clock->m2 = bestm2;
--	best_clock->p1 = bestp1;
--	best_clock->p2 = bestp2;
- 
- 	return true;
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1017-drm-i915-De-magic-the-VLV-p2-divider-step-size.patch b/patches.baytrail/1017-drm-i915-De-magic-the-VLV-p2-divider-step-size.patch
deleted file mode 100644
index dcd312e9b30f2..0000000000000
--- a/patches.baytrail/1017-drm-i915-De-magic-the-VLV-p2-divider-step-size.patch
+++ /dev/null
@@ -1,40 +0,0 @@
-From 8daf1084bd88cef62334e50140f8dc620dbc73b8 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Tue, 24 Sep 2013 21:26:23 +0300
-Subject: drm/i915: De-magic the VLV p2 divider step size
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The p2 divider on VLV needs to be even when it's > 10. The current code
-to make that happen is rather weird. Just make the step size adjustement
-in the for loop decrement step.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit c1a9ae43885246df7a35c790960d7a703b2841d4)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 5 ++---
- 1 file changed, 2 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 4b5ffb5b9288..e83406697d67 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -688,9 +688,8 @@ vlv_find_best_dpll(const intel_limit_t *limit, struct drm_crtc *crtc,
- 	/* based on hardware requirement, prefer smaller n to precision */
- 	for (clock.n = limit->n.min; clock.n <= ((refclk) / minupdate); clock.n++) {
- 		for (clock.p1 = limit->p1.max; clock.p1 > limit->p1.min; clock.p1--) {
--			for (clock.p2 = limit->p2.p2_fast+1; clock.p2 > 0; clock.p2--) {
--				if (clock.p2 > 10)
--					clock.p2--;
-+			for (clock.p2 = limit->p2.p2_fast; clock.p2 > 0;
-+			     clock.p2 -= clock.p2 > 10 ? 2 : 1) {
- 				clock.p = clock.p1 * clock.p2;
- 				/* based on hardware requirement, prefer bigger m1,m2 values */
- 				for (clock.m1 = limit->m1.min; clock.m1 <= limit->m1.max; clock.m1++) {
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1018-drm-i915-Make-sure-we-respect-n.max-on-VLV.patch b/patches.baytrail/1018-drm-i915-Make-sure-we-respect-n.max-on-VLV.patch
deleted file mode 100644
index 38982f0fdbd00..0000000000000
--- a/patches.baytrail/1018-drm-i915-Make-sure-we-respect-n.max-on-VLV.patch
+++ /dev/null
@@ -1,53 +0,0 @@
-From 395bcfd8e7a5d775dc5e54303a91c2f32b4fb6ae Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Tue, 24 Sep 2013 21:26:24 +0300
-Subject: drm/i915: Make sure we respect n.max on VLV
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-We limit the maximum n divider value in order to make sure the PLL's
-reference inout is at least 19.2 MHz. I assume that is done to satisfy
-some hardware requirement.
-
-However we never check whether that calculated limit is below the
-maximum supoorted N divider value (7). In practice that is always true
-since we only support 100 MHz reference clock, but making the code
-safe against higher reference clocks seems like a reasoanble thing to
-do.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 27e639bf024a0706015dbb348eb32619a9bb9329)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 5 +++--
- 1 file changed, 3 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index e83406697d67..740a9bc2dd0a 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -678,15 +678,16 @@ vlv_find_best_dpll(const intel_limit_t *limit, struct drm_crtc *crtc,
- 		   intel_clock_t *best_clock)
- {
- 	intel_clock_t clock;
--	u32 minupdate = 19200;
- 	unsigned int bestppm = 1000000;
-+	/* min update 19.2 MHz */
-+	int max_n = min(limit->n.max, refclk / 19200);
- 
- 	target *= 5; /* fast clock */
- 
- 	memset(best_clock, 0, sizeof(*best_clock));
- 
- 	/* based on hardware requirement, prefer smaller n to precision */
--	for (clock.n = limit->n.min; clock.n <= ((refclk) / minupdate); clock.n++) {
-+	for (clock.n = limit->n.min; clock.n <= max_n; clock.n++) {
- 		for (clock.p1 = limit->p1.max; clock.p1 > limit->p1.min; clock.p1--) {
- 			for (clock.p2 = limit->p2.p2_fast; clock.p2 > 0;
- 			     clock.p2 -= clock.p2 > 10 ? 2 : 1) {
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1019-drm-i915-Clarify-VLV-PLL-p1-limits.patch b/patches.baytrail/1019-drm-i915-Clarify-VLV-PLL-p1-limits.patch
deleted file mode 100644
index a7f25805cde2c..0000000000000
--- a/patches.baytrail/1019-drm-i915-Clarify-VLV-PLL-p1-limits.patch
+++ /dev/null
@@ -1,60 +0,0 @@
-From 07cc5bf492f63dbaf70e53e0db71a301b13b68de Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Tue, 24 Sep 2013 21:26:25 +0300
-Subject: drm/i915: Clarify VLV PLL p1 limits
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-For some reason there's a sort of off by one issue with the p1 divider.
-The actual p1 limits according to
-VLV2_DPLL_mphy_hsdpll_frequency_table_ww6_rev1p1.xlsm is 2-3, so we should
-just say that instead of saying 1-3 and avoiding the 1 via the choice of
-comparison operator.
-
-I don't know why we're using different p1 limits for intel_limits_vlv_dac
-and intel_limits_vlv_hdmi, but let's preserve that for now.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 811bbf05447b17db2fb13387da9b7d553438d5c6)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 6 +++---
- 1 file changed, 3 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 740a9bc2dd0a..3be97e72e569 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -317,7 +317,7 @@ static const intel_limit_t intel_limits_vlv_dac = {
- 	.m1 = { .min = 2, .max = 3 },
- 	.m2 = { .min = 11, .max = 156 },
- 	.p = { .min = 10, .max = 30 },
--	.p1 = { .min = 1, .max = 3 },
-+	.p1 = { .min = 2, .max = 3 },
- 	.p2 = { .dot_limit = 270000,
- 		.p2_slow = 2, .p2_fast = 20 },
- };
-@@ -330,7 +330,7 @@ static const intel_limit_t intel_limits_vlv_hdmi = {
- 	.m1 = { .min = 2, .max = 3 },
- 	.m2 = { .min = 11, .max = 156 },
- 	.p = { .min = 10, .max = 30 },
--	.p1 = { .min = 2, .max = 3 },
-+	.p1 = { .min = 3, .max = 3 },
- 	.p2 = { .dot_limit = 270000,
- 		.p2_slow = 2, .p2_fast = 20 },
- };
-@@ -688,7 +688,7 @@ vlv_find_best_dpll(const intel_limit_t *limit, struct drm_crtc *crtc,
- 
- 	/* based on hardware requirement, prefer smaller n to precision */
- 	for (clock.n = limit->n.min; clock.n <= max_n; clock.n++) {
--		for (clock.p1 = limit->p1.max; clock.p1 > limit->p1.min; clock.p1--) {
-+		for (clock.p1 = limit->p1.max; clock.p1 >= limit->p1.min; clock.p1--) {
- 			for (clock.p2 = limit->p2.p2_fast; clock.p2 > 0;
- 			     clock.p2 -= clock.p2 > 10 ? 2 : 1) {
- 				clock.p = clock.p1 * clock.p2;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1020-drm-i915-Allow-p1-divider-2-on-VLV.patch b/patches.baytrail/1020-drm-i915-Allow-p1-divider-2-on-VLV.patch
deleted file mode 100644
index 7a047882359cf..0000000000000
--- a/patches.baytrail/1020-drm-i915-Allow-p1-divider-2-on-VLV.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From 2f979a8219cd28406c302eee81d73ca43a9b4f58 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Tue, 24 Sep 2013 21:26:26 +0300
-Subject: drm/i915: Allow p1 divider 2 on VLV
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-According to VLV2_DPLL_mphy_hsdpll_frequency_table_ww6_rev1p1.xlsm p1
-can be 2-3 always.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit b99ab66301f384766b8e37abe52719c65a7da140)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 3be97e72e569..25c7cb72dca4 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -330,7 +330,7 @@ static const intel_limit_t intel_limits_vlv_hdmi = {
- 	.m1 = { .min = 2, .max = 3 },
- 	.m2 = { .min = 11, .max = 156 },
- 	.p = { .min = 10, .max = 30 },
--	.p1 = { .min = 3, .max = 3 },
-+	.p1 = { .min = 2, .max = 3 },
- 	.p2 = { .dot_limit = 270000,
- 		.p2_slow = 2, .p2_fast = 20 },
- };
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1021-drm-i915-Respect-p2-divider-minimum-limit-on-VLV.patch b/patches.baytrail/1021-drm-i915-Respect-p2-divider-minimum-limit-on-VLV.patch
deleted file mode 100644
index 8fb33b26888c8..0000000000000
--- a/patches.baytrail/1021-drm-i915-Respect-p2-divider-minimum-limit-on-VLV.patch
+++ /dev/null
@@ -1,54 +0,0 @@
-From e119649fc16016ebb7fda0e30852e07bbd60649d Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Tue, 24 Sep 2013 21:26:27 +0300
-Subject: drm/i915: Respect p2 divider minimum limit on VLV
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-VLV2_DPLL_mphy_hsdpll_frequency_table_ww6_rev1p1.xlsm tells us that the
-minimum p2 divider is 2. Use that limit on the code.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 889059d8f0eff8d179d98c3fee64a27d7ff6312f)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 6 +++---
- 1 file changed, 3 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 25c7cb72dca4..13054b94f4e0 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -319,7 +319,7 @@ static const intel_limit_t intel_limits_vlv_dac = {
- 	.p = { .min = 10, .max = 30 },
- 	.p1 = { .min = 2, .max = 3 },
- 	.p2 = { .dot_limit = 270000,
--		.p2_slow = 2, .p2_fast = 20 },
-+		.p2_slow = 2, .p2_fast = 20 }, /* slow=min, fast=max */
- };
- 
- static const intel_limit_t intel_limits_vlv_hdmi = {
-@@ -332,7 +332,7 @@ static const intel_limit_t intel_limits_vlv_hdmi = {
- 	.p = { .min = 10, .max = 30 },
- 	.p1 = { .min = 2, .max = 3 },
- 	.p2 = { .dot_limit = 270000,
--		.p2_slow = 2, .p2_fast = 20 },
-+		.p2_slow = 2, .p2_fast = 20 }, /* slow=min, fast=max */
- };
- 
- static void vlv_clock(int refclk, intel_clock_t *clock)
-@@ -689,7 +689,7 @@ vlv_find_best_dpll(const intel_limit_t *limit, struct drm_crtc *crtc,
- 	/* based on hardware requirement, prefer smaller n to precision */
- 	for (clock.n = limit->n.min; clock.n <= max_n; clock.n++) {
- 		for (clock.p1 = limit->p1.max; clock.p1 >= limit->p1.min; clock.p1--) {
--			for (clock.p2 = limit->p2.p2_fast; clock.p2 > 0;
-+			for (clock.p2 = limit->p2.p2_fast; clock.p2 >= limit->p2.p2_slow;
- 			     clock.p2 -= clock.p2 > 10 ? 2 : 1) {
- 				clock.p = clock.p1 * clock.p2;
- 				/* based on hardware requirement, prefer bigger m1,m2 values */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1022-drm-i915-Remove-the-unused-p-and-m-limits-for-VLV.patch b/patches.baytrail/1022-drm-i915-Remove-the-unused-p-and-m-limits-for-VLV.patch
deleted file mode 100644
index 7ba433352a265..0000000000000
--- a/patches.baytrail/1022-drm-i915-Remove-the-unused-p-and-m-limits-for-VLV.patch
+++ /dev/null
@@ -1,52 +0,0 @@
-From bdcf8f93afaf236ebd80357b2be649542a5d0c51 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Tue, 24 Sep 2013 21:26:28 +0300
-Subject: drm/i915: Remove the unused p and m limits for VLV
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-We never check the p and m limits (which according to comments are
-based on someone's guesswork), so just remove them.
-
-VLV2_DPLL_mphy_hsdpll_frequency_table_ww6_rev1p1.xlsm has no p and m
-limits listed.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 41504046e95fe9c2ca3753a3adc562c1df910b11)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 4 ----
- 1 file changed, 4 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 13054b94f4e0..3a6c876323a4 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -313,10 +313,8 @@ static const intel_limit_t intel_limits_vlv_dac = {
- 	.dot = { .min = 25000, .max = 270000 },
- 	.vco = { .min = 4000000, .max = 6000000 },
- 	.n = { .min = 1, .max = 7 },
--	.m = { .min = 22, .max = 450 }, /* guess */
- 	.m1 = { .min = 2, .max = 3 },
- 	.m2 = { .min = 11, .max = 156 },
--	.p = { .min = 10, .max = 30 },
- 	.p1 = { .min = 2, .max = 3 },
- 	.p2 = { .dot_limit = 270000,
- 		.p2_slow = 2, .p2_fast = 20 }, /* slow=min, fast=max */
-@@ -326,10 +324,8 @@ static const intel_limit_t intel_limits_vlv_hdmi = {
- 	.dot = { .min = 25000, .max = 270000 },
- 	.vco = { .min = 4000000, .max = 6000000 },
- 	.n = { .min = 1, .max = 7 },
--	.m = { .min = 60, .max = 300 }, /* guess */
- 	.m1 = { .min = 2, .max = 3 },
- 	.m2 = { .min = 11, .max = 156 },
--	.p = { .min = 10, .max = 30 },
- 	.p1 = { .min = 2, .max = 3 },
- 	.p2 = { .dot_limit = 270000,
- 		.p2_slow = 2, .p2_fast = 20 }, /* slow=min, fast=max */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1023-drm-i915-Remove-unused-dot_limit-from-VLV-PLL-limits.patch b/patches.baytrail/1023-drm-i915-Remove-unused-dot_limit-from-VLV-PLL-limits.patch
deleted file mode 100644
index e403a32651443..0000000000000
--- a/patches.baytrail/1023-drm-i915-Remove-unused-dot_limit-from-VLV-PLL-limits.patch
+++ /dev/null
@@ -1,46 +0,0 @@
-From 29731b0fdfece5a575cb5f11cf65c534ead34ec6 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Tue, 24 Sep 2013 21:26:29 +0300
-Subject: drm/i915: Remove unused dot_limit from VLV PLL limits
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-We don't use .dot_limit for anything on VLV, so don't populate it.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 5fdc9c49f676cc9224df0830a26f7f993ada2517)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 6 ++----
- 1 file changed, 2 insertions(+), 4 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 3a6c876323a4..0a993962fd44 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -316,8 +316,7 @@ static const intel_limit_t intel_limits_vlv_dac = {
- 	.m1 = { .min = 2, .max = 3 },
- 	.m2 = { .min = 11, .max = 156 },
- 	.p1 = { .min = 2, .max = 3 },
--	.p2 = { .dot_limit = 270000,
--		.p2_slow = 2, .p2_fast = 20 }, /* slow=min, fast=max */
-+	.p2 = { .p2_slow = 2, .p2_fast = 20 }, /* slow=min, fast=max */
- };
- 
- static const intel_limit_t intel_limits_vlv_hdmi = {
-@@ -327,8 +326,7 @@ static const intel_limit_t intel_limits_vlv_hdmi = {
- 	.m1 = { .min = 2, .max = 3 },
- 	.m2 = { .min = 11, .max = 156 },
- 	.p1 = { .min = 2, .max = 3 },
--	.p2 = { .dot_limit = 270000,
--		.p2_slow = 2, .p2_fast = 20 }, /* slow=min, fast=max */
-+	.p2 = { .p2_slow = 2, .p2_fast = 20 }, /* slow=min, fast=max */
- };
- 
- static void vlv_clock(int refclk, intel_clock_t *clock)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1024-drm-i915-intel_limits_vlv_dac-and-intel_limits_vlv_h.patch b/patches.baytrail/1024-drm-i915-intel_limits_vlv_dac-and-intel_limits_vlv_h.patch
deleted file mode 100644
index 0984d027511bf..0000000000000
--- a/patches.baytrail/1024-drm-i915-intel_limits_vlv_dac-and-intel_limits_vlv_h.patch
+++ /dev/null
@@ -1,58 +0,0 @@
-From fc6b0a504a857060d0d10195cfdf492a5343b974 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Tue, 24 Sep 2013 21:26:30 +0300
-Subject: drm/i915: intel_limits_vlv_dac and intel_limits_vlv_hdmi are the same
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-After aligning the p1 divider limits, and removing the unused p and m
-limits, intel_limits_vlv_dac and intel_limits_vlv_hdmi are identical.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit dc730512be540c7e438f1411e11662edbd8638ae)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 17 ++---------------
- 1 file changed, 2 insertions(+), 15 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 0a993962fd44..ed05713b54b7 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -309,17 +309,7 @@ static const intel_limit_t intel_limits_ironlake_dual_lvds_100m = {
- 		.p2_slow = 7, .p2_fast = 7 },
- };
- 
--static const intel_limit_t intel_limits_vlv_dac = {
--	.dot = { .min = 25000, .max = 270000 },
--	.vco = { .min = 4000000, .max = 6000000 },
--	.n = { .min = 1, .max = 7 },
--	.m1 = { .min = 2, .max = 3 },
--	.m2 = { .min = 11, .max = 156 },
--	.p1 = { .min = 2, .max = 3 },
--	.p2 = { .p2_slow = 2, .p2_fast = 20 }, /* slow=min, fast=max */
--};
--
--static const intel_limit_t intel_limits_vlv_hdmi = {
-+static const intel_limit_t intel_limits_vlv = {
- 	.dot = { .min = 25000, .max = 270000 },
- 	.vco = { .min = 4000000, .max = 6000000 },
- 	.n = { .min = 1, .max = 7 },
-@@ -412,10 +402,7 @@ static const intel_limit_t *intel_limit(struct drm_crtc *crtc, int refclk)
- 		else
- 			limit = &intel_limits_pineview_sdvo;
- 	} else if (IS_VALLEYVIEW(dev)) {
--		if (intel_pipe_has_type(crtc, INTEL_OUTPUT_ANALOG))
--			limit = &intel_limits_vlv_dac;
--		else
--			limit = &intel_limits_vlv_hdmi;
-+		limit = &intel_limits_vlv;
- 	} else if (!IS_GEN2(dev)) {
- 		if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS))
- 			limit = &intel_limits_i9xx_lvds;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1025-drm-i915-Don-t-lie-about-findind-suitable-PLL-settin.patch b/patches.baytrail/1025-drm-i915-Don-t-lie-about-findind-suitable-PLL-settin.patch
deleted file mode 100644
index 1d3322b1631ff..0000000000000
--- a/patches.baytrail/1025-drm-i915-Don-t-lie-about-findind-suitable-PLL-settin.patch
+++ /dev/null
@@ -1,57 +0,0 @@
-From b9b0cd5eed925a46ed8e4a952cd7fe47c8788e90 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Tue, 24 Sep 2013 21:26:31 +0300
-Subject: drm/i915: Don't lie about findind suitable PLL settings on VLV
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-If vlv_find_best_dpll() couldn't find suitable PLL settings,
-just say so instead of lying to caller.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 49e497ef43e06dbf65e0a3637bcaedb31ce17d34)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 5 ++++-
- 1 file changed, 4 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index ed05713b54b7..bda31bf68a8f 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -662,6 +662,7 @@ vlv_find_best_dpll(const intel_limit_t *limit, struct drm_crtc *crtc,
- 	unsigned int bestppm = 1000000;
- 	/* min update 19.2 MHz */
- 	int max_n = min(limit->n.max, refclk / 19200);
-+	bool found = false;
- 
- 	target *= 5; /* fast clock */
- 
-@@ -692,18 +693,20 @@ vlv_find_best_dpll(const intel_limit_t *limit, struct drm_crtc *crtc,
- 					if (ppm < 100 && clock.p > best_clock->p) {
- 						bestppm = 0;
- 						*best_clock = clock;
-+						found = true;
- 					}
- 
- 					if (bestppm >= 10 && ppm < bestppm - 10) {
- 						bestppm = ppm;
- 						*best_clock = clock;
-+						found = true;
- 					}
- 				}
- 			}
- 		}
- 	}
- 
--	return true;
-+	return found;
- }
- 
- bool intel_crtc_active(struct drm_crtc *crtc)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1026-drm-i915-Use-intel_PLL_is_valid-in-vlv_find_best_dpl.patch b/patches.baytrail/1026-drm-i915-Use-intel_PLL_is_valid-in-vlv_find_best_dpl.patch
deleted file mode 100644
index 8f6753c78a3d3..0000000000000
--- a/patches.baytrail/1026-drm-i915-Use-intel_PLL_is_valid-in-vlv_find_best_dpl.patch
+++ /dev/null
@@ -1,110 +0,0 @@
-From 013d73bf75e2649d209a31e5ef9eacd3758274d4 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Fri, 27 Sep 2013 16:55:49 +0300
-Subject: drm/i915: Use intel_PLL_is_valid() in vlv_find_best_dpll()
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Everyone else uses intel_PLL_is_valid(), so make VLV use it as well.
-
-We don't have any special p and m limits on VLV, so skip those tests,
-and we also need to skip the m1<=m2 test line PNV.
-
-Reorganize the function a bit to move the n check alongside the rest of
-the test for the non-derived dividers, and check the derived values
-afterwards.
-
-Note that this changes vlv_find_best_dpll() in two ways:
-- The .vco comparison is now >max instead of >=max, and since we round
-  down when calculating that stuff, we may now allow frequencies slightly
-  above the max as we do on other platforms. The previous method
-  disallowed exactly max and anything above it.
-- We now check the .dot frequency against the data rate limits, which we
-  didn't do before.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit f01b796283e0fb2aa70b7cceb7067340f8ec6626)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 35 ++++++++++++++++++++++++-----------
- 1 file changed, 24 insertions(+), 11 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index bda31bf68a8f..1610f9668866 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -310,7 +310,13 @@ static const intel_limit_t intel_limits_ironlake_dual_lvds_100m = {
- };
- 
- static const intel_limit_t intel_limits_vlv = {
--	.dot = { .min = 25000, .max = 270000 },
-+	 /*
-+	  * These are the data rate limits (measured in fast clocks)
-+	  * since those are the strictest limits we have. The fast
-+	  * clock and actual rate limits are more relaxed, so checking
-+	  * them would make no difference.
-+	  */
-+	.dot = { .min = 25000 * 5, .max = 270000 * 5 },
- 	.vco = { .min = 4000000, .max = 6000000 },
- 	.n = { .min = 1, .max = 7 },
- 	.m1 = { .min = 2, .max = 3 },
-@@ -451,20 +457,26 @@ static bool intel_PLL_is_valid(struct drm_device *dev,
- 			       const intel_limit_t *limit,
- 			       const intel_clock_t *clock)
- {
-+	if (clock->n   < limit->n.min   || limit->n.max   < clock->n)
-+		INTELPllInvalid("n out of range\n");
- 	if (clock->p1  < limit->p1.min  || limit->p1.max  < clock->p1)
- 		INTELPllInvalid("p1 out of range\n");
--	if (clock->p   < limit->p.min   || limit->p.max   < clock->p)
--		INTELPllInvalid("p out of range\n");
- 	if (clock->m2  < limit->m2.min  || limit->m2.max  < clock->m2)
- 		INTELPllInvalid("m2 out of range\n");
- 	if (clock->m1  < limit->m1.min  || limit->m1.max  < clock->m1)
- 		INTELPllInvalid("m1 out of range\n");
--	if (clock->m1 <= clock->m2 && !IS_PINEVIEW(dev))
--		INTELPllInvalid("m1 <= m2\n");
--	if (clock->m   < limit->m.min   || limit->m.max   < clock->m)
--		INTELPllInvalid("m out of range\n");
--	if (clock->n   < limit->n.min   || limit->n.max   < clock->n)
--		INTELPllInvalid("n out of range\n");
-+
-+	if (!IS_PINEVIEW(dev) && !IS_VALLEYVIEW(dev))
-+		if (clock->m1 <= clock->m2)
-+			INTELPllInvalid("m1 <= m2\n");
-+
-+	if (!IS_VALLEYVIEW(dev)) {
-+		if (clock->p < limit->p.min || limit->p.max < clock->p)
-+			INTELPllInvalid("p out of range\n");
-+		if (clock->m < limit->m.min || limit->m.max < clock->m)
-+			INTELPllInvalid("m out of range\n");
-+	}
-+
- 	if (clock->vco < limit->vco.min || limit->vco.max < clock->vco)
- 		INTELPllInvalid("vco out of range\n");
- 	/* XXX: We may need to be checking "Dot clock" depending on the multiplier,
-@@ -658,6 +670,7 @@ vlv_find_best_dpll(const intel_limit_t *limit, struct drm_crtc *crtc,
- 		   int target, int refclk, intel_clock_t *match_clock,
- 		   intel_clock_t *best_clock)
- {
-+	struct drm_device *dev = crtc->dev;
- 	intel_clock_t clock;
- 	unsigned int bestppm = 1000000;
- 	/* min update 19.2 MHz */
-@@ -683,8 +696,8 @@ vlv_find_best_dpll(const intel_limit_t *limit, struct drm_crtc *crtc,
- 
- 					vlv_clock(refclk, &clock);
- 
--					if (clock.vco < limit->vco.min ||
--					    clock.vco >= limit->vco.max)
-+					if (!intel_PLL_is_valid(dev, limit,
-+								&clock))
- 						continue;
- 
- 					diff = abs(clock.dot - target);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1027-drm-i915-Fix-VGA_DISP_DISABLE-check.patch b/patches.baytrail/1027-drm-i915-Fix-VGA_DISP_DISABLE-check.patch
deleted file mode 100644
index 3d9e2ca0c7e2a..0000000000000
--- a/patches.baytrail/1027-drm-i915-Fix-VGA_DISP_DISABLE-check.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From fb88fbe4eac9862e5e257d6a4c32d6c44af2f3e3 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Fri, 4 Oct 2013 20:32:25 +0300
-Subject: drm/i915: Fix VGA_DISP_DISABLE check
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The VGACNTRL register contains a bunch of other stuff besides
-the VGA_DISP_DISABLE bit. When we write the register we always set those
-other bits to zero, so normally the current check would work.
-
-However on HSW disabling and re-enabling the power well will reset the
-VGACNTRL register to its default value, which has several of the other
-bits set as well.
-
-So only look at the VGA_DISP_DISABLE bit when checking whether the VGA
-plane needs re-disabling.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit e1553faa904f3f8bdd734ee1404ce39c652bc9c6)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 1610f9668866..bb2e9bcb43d5 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -10663,7 +10663,7 @@ void i915_redisable_vga(struct drm_device *dev)
- 	    (I915_READ(HSW_PWR_WELL_DRIVER) & HSW_PWR_WELL_STATE_ENABLED) == 0)
- 		return;
- 
--	if (I915_READ(vga_reg) != VGA_DISP_DISABLE) {
-+	if (!(I915_READ(vga_reg) & VGA_DISP_DISABLE)) {
- 		DRM_DEBUG_KMS("Something enabled VGA plane, disabling it\n");
- 		i915_disable_vga(dev);
- 		i915_disable_vga_mem(dev);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1028-drm-i915-dp-promote-clock-recovery-failures-to-DRM_E.patch b/patches.baytrail/1028-drm-i915-dp-promote-clock-recovery-failures-to-DRM_E.patch
deleted file mode 100644
index c5d54cc84b4e7..0000000000000
--- a/patches.baytrail/1028-drm-i915-dp-promote-clock-recovery-failures-to-DRM_E.patch
+++ /dev/null
@@ -1,46 +0,0 @@
-From 21dea0f708d1d224ac38ba42310c90e30f6cb75b Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Sat, 5 Oct 2013 16:13:56 +0300
-Subject: drm/i915/dp: promote clock recovery failures to DRM_ERROR
-
-If channel equalization succeeds, there's no indication something went
-wrong in clock recovery (unless debug is enabled). We should shout about
-the failures and fix them instead of hiding them under the carpet.
-
-This has allowed bugs like [1] stay dormant for a long time.
-
-[1] https://bugs.freedesktop.org/show_bug.cgi?id=70117
-
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 3def84b34c80518cd0375440dde8ce690795b369)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_dp.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
-index d9090d0340c7..377014783e74 100644
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -2507,7 +2507,7 @@ intel_dp_start_link_train(struct intel_dp *intel_dp)
- 		if (i == intel_dp->lane_count) {
- 			++loop_tries;
- 			if (loop_tries == 5) {
--				DRM_DEBUG_KMS("too many full retries, give up\n");
-+				DRM_ERROR("too many full retries, give up\n");
- 				break;
- 			}
- 			intel_dp_reset_link_train(intel_dp, &DP,
-@@ -2521,7 +2521,7 @@ intel_dp_start_link_train(struct intel_dp *intel_dp)
- 		if ((intel_dp->train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK) == voltage) {
- 			++voltage_tries;
- 			if (voltage_tries == 5) {
--				DRM_DEBUG_KMS("too many voltage retries, give up\n");
-+				DRM_ERROR("too many voltage retries, give up\n");
- 				break;
- 			}
- 		} else
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1029-drm-i915-Set-primary_disabled-in-intel_-enable-disab.patch b/patches.baytrail/1029-drm-i915-Set-primary_disabled-in-intel_-enable-disab.patch
deleted file mode 100644
index 4c1e2753c0cdc..0000000000000
--- a/patches.baytrail/1029-drm-i915-Set-primary_disabled-in-intel_-enable-disab.patch
+++ /dev/null
@@ -1,65 +0,0 @@
-From d1664f699e83517aabe348c710bc539814bad58a Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Tue, 1 Oct 2013 18:02:10 +0300
-Subject: drm/i915: Set primary_disabled in intel_{enable, disable}_plane
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-If the primary gets marked as disabled while the pipe is off for
-instance, we should still re-enable it when the pipe is turned on,
-unless the sprite covers it fully also in that configuration.
-Unfortunately we do the plane visibility checks only in the sprite code,
-which is executed after the primary enabling when turning the pipe off.
-
-Ideally we should compute the plane visibility before touching the
-hardware at all, but for now just set the primary_disabld flag
-in intel_{enable,disable}_plane.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 939c2fe8bdb0fbf163dc8555a08c5ca863babd89)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 8 ++++++++
- 1 file changed, 8 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index bb2e9bcb43d5..c6a333af6f47 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -1832,12 +1832,16 @@ void intel_flush_display_plane(struct drm_i915_private *dev_priv,
- static void intel_enable_plane(struct drm_i915_private *dev_priv,
- 			       enum plane plane, enum pipe pipe)
- {
-+	struct intel_crtc *intel_crtc =
-+		to_intel_crtc(dev_priv->pipe_to_crtc_mapping[pipe]);
- 	int reg;
- 	u32 val;
- 
- 	/* If the pipe isn't enabled, we can't pump pixels and may hang */
- 	assert_pipe_enabled(dev_priv, pipe);
- 
-+	intel_crtc->primary_disabled = false;
-+
- 	reg = DSPCNTR(plane);
- 	val = I915_READ(reg);
- 	if (val & DISPLAY_PLANE_ENABLE)
-@@ -1859,9 +1863,13 @@ static void intel_enable_plane(struct drm_i915_private *dev_priv,
- static void intel_disable_plane(struct drm_i915_private *dev_priv,
- 				enum plane plane, enum pipe pipe)
- {
-+	struct intel_crtc *intel_crtc =
-+		to_intel_crtc(dev_priv->pipe_to_crtc_mapping[pipe]);
- 	int reg;
- 	u32 val;
- 
-+	intel_crtc->primary_disabled = true;
-+
- 	reg = DSPCNTR(plane);
- 	val = I915_READ(reg);
- 	if ((val & DISPLAY_PLANE_ENABLE) == 0)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1030-drm-i915-Allow-sprites-to-be-configured-on-a-disable.patch b/patches.baytrail/1030-drm-i915-Allow-sprites-to-be-configured-on-a-disable.patch
deleted file mode 100644
index c2743929e443d..0000000000000
--- a/patches.baytrail/1030-drm-i915-Allow-sprites-to-be-configured-on-a-disable.patch
+++ /dev/null
@@ -1,162 +0,0 @@
-From ce84a4f6e8c54379bdbb31d3c4a8e5889773be04 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Tue, 1 Oct 2013 18:02:11 +0300
-Subject: drm/i915: Allow sprites to be configured on a disabled pipe
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-We allow cursors to be set up when the pipe is disabled. Do the same for
-sprites as well.
-
-We need to be somewhat careful with the primary disable logic as we
-don't want to accidentally enable the primary plane on a disabled pipe.
-
-v2: Skip primary enable/disable and plane registers
-    writes on disabled pipe
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 03c5b25f6efd8190dab133eeecf1c0dae307dea8)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_sprite.c | 65 ++++++++++++++++++-------------------
- 1 file changed, 32 insertions(+), 33 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
-index cae10bc746d0..9161a1db8dff 100644
---- a/drivers/gpu/drm/i915/intel_sprite.c
-+++ b/drivers/gpu/drm/i915/intel_sprite.c
-@@ -623,14 +623,10 @@ intel_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
- 		   uint32_t src_w, uint32_t src_h)
- {
- 	struct drm_device *dev = plane->dev;
--	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
- 	struct intel_plane *intel_plane = to_intel_plane(plane);
- 	struct intel_framebuffer *intel_fb;
- 	struct drm_i915_gem_object *obj, *old_obj;
--	int pipe = intel_plane->pipe;
--	enum transcoder cpu_transcoder = intel_pipe_to_cpu_transcoder(dev_priv,
--								      pipe);
- 	int ret = 0;
- 	bool disable_primary = false;
- 	bool visible;
-@@ -652,8 +648,8 @@ intel_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
- 		.y2 = crtc_y + crtc_h,
- 	};
- 	const struct drm_rect clip = {
--		.x2 = intel_crtc->config.pipe_src_w,
--		.y2 = intel_crtc->config.pipe_src_h,
-+		.x2 = intel_crtc->active ? intel_crtc->config.pipe_src_w : 0,
-+		.y2 = intel_crtc->active ? intel_crtc->config.pipe_src_h : 0,
- 	};
- 
- 	intel_fb = to_intel_framebuffer(fb);
-@@ -670,12 +666,6 @@ intel_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
- 	intel_plane->src_w = src_w;
- 	intel_plane->src_h = src_h;
- 
--	/* Pipe must be running... */
--	if (!(I915_READ(PIPECONF(cpu_transcoder)) & PIPECONF_ENABLE)) {
--		DRM_DEBUG_KMS("Pipe disabled\n");
--		return -EINVAL;
--	}
--
- 	/* Don't modify another pipe's plane */
- 	if (intel_plane->pipe != intel_crtc->pipe) {
- 		DRM_DEBUG_KMS("Wrong plane <-> crtc mapping\n");
-@@ -810,7 +800,7 @@ intel_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
- 	 * we can disable the primary and save power.
- 	 */
- 	disable_primary = drm_rect_equals(&dst, &clip);
--	WARN_ON(disable_primary && !visible);
-+	WARN_ON(disable_primary && !visible && intel_crtc->active);
- 
- 	mutex_lock(&dev->struct_mutex);
- 
-@@ -825,22 +815,24 @@ intel_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
- 
- 	intel_plane->obj = obj;
- 
--	/*
--	 * Be sure to re-enable the primary before the sprite is no longer
--	 * covering it fully.
--	 */
--	if (!disable_primary)
--		intel_enable_primary(crtc);
--
--	if (visible)
--		intel_plane->update_plane(plane, crtc, fb, obj,
--					  crtc_x, crtc_y, crtc_w, crtc_h,
--					  src_x, src_y, src_w, src_h);
--	else
--		intel_plane->disable_plane(plane, crtc);
--
--	if (disable_primary)
--		intel_disable_primary(crtc);
-+	if (intel_crtc->active) {
-+		/*
-+		 * Be sure to re-enable the primary before the sprite is no longer
-+		 * covering it fully.
-+		 */
-+		if (!disable_primary)
-+			intel_enable_primary(crtc);
-+
-+		if (visible)
-+			intel_plane->update_plane(plane, crtc, fb, obj,
-+						  crtc_x, crtc_y, crtc_w, crtc_h,
-+						  src_x, src_y, src_w, src_h);
-+		else
-+			intel_plane->disable_plane(plane, crtc);
-+
-+		if (disable_primary)
-+			intel_disable_primary(crtc);
-+	}
- 
- 	/* Unpin old obj after new one is active to avoid ugliness */
- 	if (old_obj) {
-@@ -852,7 +844,8 @@ intel_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
- 		 */
- 		if (old_obj != obj) {
- 			mutex_unlock(&dev->struct_mutex);
--			intel_wait_for_vblank(dev, to_intel_crtc(crtc)->pipe);
-+			if (intel_crtc->active)
-+				intel_wait_for_vblank(dev, to_intel_crtc(crtc)->pipe);
- 			mutex_lock(&dev->struct_mutex);
- 		}
- 		intel_unpin_fb_obj(old_obj);
-@@ -868,6 +861,7 @@ intel_disable_plane(struct drm_plane *plane)
- {
- 	struct drm_device *dev = plane->dev;
- 	struct intel_plane *intel_plane = to_intel_plane(plane);
-+	struct intel_crtc *intel_crtc;
- 	int ret = 0;
- 
- 	if (!plane->fb)
-@@ -876,13 +870,18 @@ intel_disable_plane(struct drm_plane *plane)
- 	if (WARN_ON(!plane->crtc))
- 		return -EINVAL;
- 
--	intel_enable_primary(plane->crtc);
--	intel_plane->disable_plane(plane, plane->crtc);
-+	intel_crtc = to_intel_crtc(plane->crtc);
-+
-+	if (intel_crtc->active) {
-+		intel_enable_primary(plane->crtc);
-+		intel_plane->disable_plane(plane, plane->crtc);
-+	}
- 
- 	if (!intel_plane->obj)
- 		goto out;
- 
--	intel_wait_for_vblank(dev, intel_plane->pipe);
-+	if (intel_crtc->active)
-+		intel_wait_for_vblank(dev, intel_plane->pipe);
- 
- 	mutex_lock(&dev->struct_mutex);
- 	intel_unpin_fb_obj(intel_plane->obj);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1031-drm-i915-Reduce-the-time-we-hold-struct-mutex-in-spr.patch b/patches.baytrail/1031-drm-i915-Reduce-the-time-we-hold-struct-mutex-in-spr.patch
deleted file mode 100644
index 79c3ca08dbd20..0000000000000
--- a/patches.baytrail/1031-drm-i915-Reduce-the-time-we-hold-struct-mutex-in-spr.patch
+++ /dev/null
@@ -1,111 +0,0 @@
-From 56b4c9979b4f7a0fc9be258944b33f22210cde8b Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Tue, 1 Oct 2013 18:02:12 +0300
-Subject: drm/i915: Reduce the time we hold struct mutex in sprite update_plane
- code
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-We used to call the entire intel specific update_plane hook while
-holding struct_mutex. Actually we only need to hold struct_mutex while
-pinning/unpinning the obj. The plane state itself is protected by the
-kms locks, and as the object is pinned we can dig out the offset and
-tiling information from it without fearing that it would change
-underneath us.
-
-So now we don't need to drop and reacquire the lock around the
-wait_for_vblank. Also we will need another wait_for_vblank in the IVB
-specific update_plane hook, and this way we don't need to worry about
-struct_mutex there either.
-
-Also move the intel_plane->obj=NULL assignment outside strut_mutex in
-disable_plane to make it clear that it's not protected by struct_mutex.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 82284b6becdbef6d8cd3fb43e8698510833a5129)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_sprite.c | 29 ++++++++++++++++++-----------
- 1 file changed, 18 insertions(+), 11 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
-index 9161a1db8dff..b859f944b53b 100644
---- a/drivers/gpu/drm/i915/intel_sprite.c
-+++ b/drivers/gpu/drm/i915/intel_sprite.c
-@@ -525,7 +525,10 @@ intel_enable_primary(struct drm_crtc *crtc)
- 		return;
- 
- 	intel_crtc->primary_disabled = false;
-+
-+	mutex_lock(&dev->struct_mutex);
- 	intel_update_fbc(dev);
-+	mutex_unlock(&dev->struct_mutex);
- 
- 	I915_WRITE(reg, I915_READ(reg) | DISPLAY_PLANE_ENABLE);
- }
-@@ -544,7 +547,10 @@ intel_disable_primary(struct drm_crtc *crtc)
- 	I915_WRITE(reg, I915_READ(reg) & ~DISPLAY_PLANE_ENABLE);
- 
- 	intel_crtc->primary_disabled = true;
-+
-+	mutex_lock(&dev->struct_mutex);
- 	intel_update_fbc(dev);
-+	mutex_unlock(&dev->struct_mutex);
- }
- 
- static int
-@@ -810,8 +816,11 @@ intel_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
- 	 * the sprite planes only require 128KiB alignment and 32 PTE padding.
- 	 */
- 	ret = intel_pin_and_fence_fb_obj(dev, obj, NULL);
-+
-+	mutex_unlock(&dev->struct_mutex);
-+
- 	if (ret)
--		goto out_unlock;
-+		return ret;
- 
- 	intel_plane->obj = obj;
- 
-@@ -842,18 +851,15 @@ intel_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
- 		 * wait for vblank to avoid ugliness, we only need to
- 		 * do the pin & ref bookkeeping.
- 		 */
--		if (old_obj != obj) {
--			mutex_unlock(&dev->struct_mutex);
--			if (intel_crtc->active)
--				intel_wait_for_vblank(dev, to_intel_crtc(crtc)->pipe);
--			mutex_lock(&dev->struct_mutex);
--		}
-+		if (old_obj != obj && intel_crtc->active)
-+			intel_wait_for_vblank(dev, to_intel_crtc(crtc)->pipe);
-+
-+		mutex_lock(&dev->struct_mutex);
- 		intel_unpin_fb_obj(old_obj);
-+		mutex_unlock(&dev->struct_mutex);
- 	}
- 
--out_unlock:
--	mutex_unlock(&dev->struct_mutex);
--	return ret;
-+	return 0;
- }
- 
- static int
-@@ -885,8 +891,9 @@ intel_disable_plane(struct drm_plane *plane)
- 
- 	mutex_lock(&dev->struct_mutex);
- 	intel_unpin_fb_obj(intel_plane->obj);
--	intel_plane->obj = NULL;
- 	mutex_unlock(&dev->struct_mutex);
-+
-+	intel_plane->obj = NULL;
- out:
- 
- 	return ret;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1032-drm-i915-Kill-a-goto-from-sprite-disable-code.patch b/patches.baytrail/1032-drm-i915-Kill-a-goto-from-sprite-disable-code.patch
deleted file mode 100644
index e30e81793cf70..0000000000000
--- a/patches.baytrail/1032-drm-i915-Kill-a-goto-from-sprite-disable-code.patch
+++ /dev/null
@@ -1,65 +0,0 @@
-From c313dd5f97c90836b20c027a3f161aee5f524deb Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Tue, 1 Oct 2013 18:02:13 +0300
-Subject: drm/i915: Kill a goto from sprite disable code
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Let's not use goto when a simple if suffices. This is not error handling
-code or anything, so the goto looks out of place.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 5f3fb46bbd643ddacde33fd5fe6f4db4ca963312)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_sprite.c | 21 +++++++++------------
- 1 file changed, 9 insertions(+), 12 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
-index b859f944b53b..b5e30b16a9cc 100644
---- a/drivers/gpu/drm/i915/intel_sprite.c
-+++ b/drivers/gpu/drm/i915/intel_sprite.c
-@@ -868,7 +868,6 @@ intel_disable_plane(struct drm_plane *plane)
- 	struct drm_device *dev = plane->dev;
- 	struct intel_plane *intel_plane = to_intel_plane(plane);
- 	struct intel_crtc *intel_crtc;
--	int ret = 0;
- 
- 	if (!plane->fb)
- 		return 0;
-@@ -883,20 +882,18 @@ intel_disable_plane(struct drm_plane *plane)
- 		intel_plane->disable_plane(plane, plane->crtc);
- 	}
- 
--	if (!intel_plane->obj)
--		goto out;
--
--	if (intel_crtc->active)
--		intel_wait_for_vblank(dev, intel_plane->pipe);
-+	if (intel_plane->obj) {
-+		if (intel_crtc->active)
-+			intel_wait_for_vblank(dev, intel_plane->pipe);
- 
--	mutex_lock(&dev->struct_mutex);
--	intel_unpin_fb_obj(intel_plane->obj);
--	mutex_unlock(&dev->struct_mutex);
-+		mutex_lock(&dev->struct_mutex);
-+		intel_unpin_fb_obj(intel_plane->obj);
-+		mutex_unlock(&dev->struct_mutex);
- 
--	intel_plane->obj = NULL;
--out:
-+		intel_plane->obj = NULL;
-+	}
- 
--	return ret;
-+	return 0;
- }
- 
- static void intel_destroy_plane(struct drm_plane *plane)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1033-drm-i915-Do-a-bit-of-cleanup-in-the-sprite-code.patch b/patches.baytrail/1033-drm-i915-Do-a-bit-of-cleanup-in-the-sprite-code.patch
deleted file mode 100644
index f81dab72bc6f3..0000000000000
--- a/patches.baytrail/1033-drm-i915-Do-a-bit-of-cleanup-in-the-sprite-code.patch
+++ /dev/null
@@ -1,63 +0,0 @@
-From 0336a660415fcfc3a55494cb9a3a7b906793f006 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Tue, 1 Oct 2013 18:02:14 +0300
-Subject: drm/i915: Do a bit of cleanup in the sprite code
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Move the variable initialization to where the variables are declared,
-and kill a pointless to_intel_crtc() cast when we already have the
-casted pointer.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 2afd9efd23437e2534a1caa6f8be4e70fd0d51c4)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_sprite.c | 14 +++++---------
- 1 file changed, 5 insertions(+), 9 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
-index b5e30b16a9cc..549243a795fa 100644
---- a/drivers/gpu/drm/i915/intel_sprite.c
-+++ b/drivers/gpu/drm/i915/intel_sprite.c
-@@ -631,9 +631,10 @@ intel_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
- 	struct drm_device *dev = plane->dev;
- 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
- 	struct intel_plane *intel_plane = to_intel_plane(plane);
--	struct intel_framebuffer *intel_fb;
--	struct drm_i915_gem_object *obj, *old_obj;
--	int ret = 0;
-+	struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
-+	struct drm_i915_gem_object *obj = intel_fb->obj;
-+	struct drm_i915_gem_object *old_obj = intel_plane->obj;
-+	int ret;
- 	bool disable_primary = false;
- 	bool visible;
- 	int hscale, vscale;
-@@ -658,11 +659,6 @@ intel_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
- 		.y2 = intel_crtc->active ? intel_crtc->config.pipe_src_h : 0,
- 	};
- 
--	intel_fb = to_intel_framebuffer(fb);
--	obj = intel_fb->obj;
--
--	old_obj = intel_plane->obj;
--
- 	intel_plane->crtc_x = crtc_x;
- 	intel_plane->crtc_y = crtc_y;
- 	intel_plane->crtc_w = crtc_w;
-@@ -852,7 +848,7 @@ intel_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
- 		 * do the pin & ref bookkeeping.
- 		 */
- 		if (old_obj != obj && intel_crtc->active)
--			intel_wait_for_vblank(dev, to_intel_crtc(crtc)->pipe);
-+			intel_wait_for_vblank(dev, intel_crtc->pipe);
- 
- 		mutex_lock(&dev->struct_mutex);
- 		intel_unpin_fb_obj(old_obj);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1034-drm-i915-Save-user-requested-plane-coordinates-only-.patch b/patches.baytrail/1034-drm-i915-Save-user-requested-plane-coordinates-only-.patch
deleted file mode 100644
index 5b5f9880c13e5..0000000000000
--- a/patches.baytrail/1034-drm-i915-Save-user-requested-plane-coordinates-only-.patch
+++ /dev/null
@@ -1,74 +0,0 @@
-From 796056d01118653d21dec5a6ccd01017c40d16c1 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Tue, 1 Oct 2013 18:02:15 +0300
-Subject: drm/i915: Save user requested plane coordinates only on success
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-If the setplane operation fails, we shouldn't save the user's requested
-plane coordinates. Since we adjust the coordinates during the clipping
-process, make a copy of the originals, and once the operation has
-succeeded save them for later reuse when the plane gets re-enabled.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 098ebd6b7e3ed53bdb0a368b7c2bae29f3914c88)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_sprite.c | 31 ++++++++++++++++++++++---------
- 1 file changed, 22 insertions(+), 9 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
-index 549243a795fa..276c3a6a9168 100644
---- a/drivers/gpu/drm/i915/intel_sprite.c
-+++ b/drivers/gpu/drm/i915/intel_sprite.c
-@@ -658,15 +658,20 @@ intel_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
- 		.x2 = intel_crtc->active ? intel_crtc->config.pipe_src_w : 0,
- 		.y2 = intel_crtc->active ? intel_crtc->config.pipe_src_h : 0,
- 	};
--
--	intel_plane->crtc_x = crtc_x;
--	intel_plane->crtc_y = crtc_y;
--	intel_plane->crtc_w = crtc_w;
--	intel_plane->crtc_h = crtc_h;
--	intel_plane->src_x = src_x;
--	intel_plane->src_y = src_y;
--	intel_plane->src_w = src_w;
--	intel_plane->src_h = src_h;
-+	const struct {
-+		int crtc_x, crtc_y;
-+		unsigned int crtc_w, crtc_h;
-+		uint32_t src_x, src_y, src_w, src_h;
-+	} orig = {
-+		.crtc_x = crtc_x,
-+		.crtc_y = crtc_y,
-+		.crtc_w = crtc_w,
-+		.crtc_h = crtc_h,
-+		.src_x = src_x,
-+		.src_y = src_y,
-+		.src_w = src_w,
-+		.src_h = src_h,
-+	};
- 
- 	/* Don't modify another pipe's plane */
- 	if (intel_plane->pipe != intel_crtc->pipe) {
-@@ -818,6 +823,14 @@ intel_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
- 	if (ret)
- 		return ret;
- 
-+	intel_plane->crtc_x = orig.crtc_x;
-+	intel_plane->crtc_y = orig.crtc_y;
-+	intel_plane->crtc_w = orig.crtc_w;
-+	intel_plane->crtc_h = orig.crtc_h;
-+	intel_plane->src_x = orig.src_x;
-+	intel_plane->src_y = orig.src_y;
-+	intel_plane->src_w = orig.src_w;
-+	intel_plane->src_h = orig.src_h;
- 	intel_plane->obj = obj;
- 
- 	if (intel_crtc->active) {
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1035-drm-i915-Do-the-fbc-vs.-primary-plane-enable-disable.patch b/patches.baytrail/1035-drm-i915-Do-the-fbc-vs.-primary-plane-enable-disable.patch
deleted file mode 100644
index 92e89eb925eb5..0000000000000
--- a/patches.baytrail/1035-drm-i915-Do-the-fbc-vs.-primary-plane-enable-disable.patch
+++ /dev/null
@@ -1,64 +0,0 @@
-From fff7e472289e7208befd73d38b46f587d7f0641b Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Tue, 1 Oct 2013 18:02:16 +0300
-Subject: drm/i915: Do the fbc vs. primary plane enable/disable in the right
- order
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Disable fbc before disabling the primary plane, and enable fbc after
-the primary plane has been enabled again.
-
-Also use intel_disable_fbc() to disable FBC to avoid the pointless
-overhead of intel_update_fbc(), and especially avoid having to clean
-up and set up the stolen mem compressed buffer again.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit abae50ed12b6f556afce0febb41639f0ede28fb9)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_sprite.c | 11 ++++++-----
- 1 file changed, 6 insertions(+), 5 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
-index 276c3a6a9168..d19146992f34 100644
---- a/drivers/gpu/drm/i915/intel_sprite.c
-+++ b/drivers/gpu/drm/i915/intel_sprite.c
-@@ -526,11 +526,11 @@ intel_enable_primary(struct drm_crtc *crtc)
- 
- 	intel_crtc->primary_disabled = false;
- 
-+	I915_WRITE(reg, I915_READ(reg) | DISPLAY_PLANE_ENABLE);
-+
- 	mutex_lock(&dev->struct_mutex);
- 	intel_update_fbc(dev);
- 	mutex_unlock(&dev->struct_mutex);
--
--	I915_WRITE(reg, I915_READ(reg) | DISPLAY_PLANE_ENABLE);
- }
- 
- static void
-@@ -544,13 +544,14 @@ intel_disable_primary(struct drm_crtc *crtc)
- 	if (intel_crtc->primary_disabled)
- 		return;
- 
--	I915_WRITE(reg, I915_READ(reg) & ~DISPLAY_PLANE_ENABLE);
--
- 	intel_crtc->primary_disabled = true;
- 
- 	mutex_lock(&dev->struct_mutex);
--	intel_update_fbc(dev);
-+	if (dev_priv->fbc.plane == intel_crtc->plane)
-+		intel_disable_fbc(dev);
- 	mutex_unlock(&dev->struct_mutex);
-+
-+	I915_WRITE(reg, I915_READ(reg) & ~DISPLAY_PLANE_ENABLE);
- }
- 
- static int
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1036-drm-i915-Enable-disable-IPS-when-primary-is-enabled-.patch b/patches.baytrail/1036-drm-i915-Enable-disable-IPS-when-primary-is-enabled-.patch
deleted file mode 100644
index 61c9136261c1a..0000000000000
--- a/patches.baytrail/1036-drm-i915-Enable-disable-IPS-when-primary-is-enabled-.patch
+++ /dev/null
@@ -1,101 +0,0 @@
-From 3b361daf732cc80b2125e6e9cbe88f8597fe32a5 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Tue, 1 Oct 2013 18:02:17 +0300
-Subject: drm/i915: Enable/disable IPS when primary is enabled/disabled
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-IPS should be OK as long as one plane is enabled on the pipe, but
-it does seem to cause problems when going between primary only and
-sprite only.
-
-This needs more investigations, but for now just disable IPS whenever
-the primary plane is disabled.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 20bc86739b835da21476ea0bf7381f6aab03be64)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c |  4 ++--
- drivers/gpu/drm/i915/intel_drv.h     |  2 ++
- drivers/gpu/drm/i915/intel_sprite.c  | 19 +++++++++++++++++++
- 3 files changed, 23 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index c6a333af6f47..64d59973a5b5 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -3329,7 +3329,7 @@ static void intel_disable_planes(struct drm_crtc *crtc)
- 			intel_plane_disable(&intel_plane->base);
- }
- 
--static void hsw_enable_ips(struct intel_crtc *crtc)
-+void hsw_enable_ips(struct intel_crtc *crtc)
- {
- 	struct drm_i915_private *dev_priv = crtc->base.dev->dev_private;
- 
-@@ -3344,7 +3344,7 @@ static void hsw_enable_ips(struct intel_crtc *crtc)
- 	I915_WRITE(IPS_CTL, IPS_ENABLE);
- }
- 
--static void hsw_disable_ips(struct intel_crtc *crtc)
-+void hsw_disable_ips(struct intel_crtc *crtc)
- {
- 	struct drm_device *dev = crtc->base.dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index eaf0003ddfd9..55c8bc4b7d9f 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -677,6 +677,8 @@ ironlake_check_encoder_dotclock(const struct intel_crtc_config *pipe_config,
- 				int dotclock);
- bool intel_crtc_active(struct drm_crtc *crtc);
- void i915_disable_vga_mem(struct drm_device *dev);
-+void hsw_enable_ips(struct intel_crtc *crtc);
-+void hsw_disable_ips(struct intel_crtc *crtc);
- 
- 
- /* intel_dp.c */
-diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
-index d19146992f34..76d0e2f5c4aa 100644
---- a/drivers/gpu/drm/i915/intel_sprite.c
-+++ b/drivers/gpu/drm/i915/intel_sprite.c
-@@ -528,6 +528,17 @@ intel_enable_primary(struct drm_crtc *crtc)
- 
- 	I915_WRITE(reg, I915_READ(reg) | DISPLAY_PLANE_ENABLE);
- 
-+	/*
-+	 * FIXME IPS should be fine as long as one plane is
-+	 * enabled, but in practice it seems to have problems
-+	 * when going from primary only to sprite only and vice
-+	 * versa.
-+	 */
-+	if (intel_crtc->config.ips_enabled) {
-+		intel_wait_for_vblank(dev, intel_crtc->pipe);
-+		hsw_enable_ips(intel_crtc);
-+	}
-+
- 	mutex_lock(&dev->struct_mutex);
- 	intel_update_fbc(dev);
- 	mutex_unlock(&dev->struct_mutex);
-@@ -551,6 +562,14 @@ intel_disable_primary(struct drm_crtc *crtc)
- 		intel_disable_fbc(dev);
- 	mutex_unlock(&dev->struct_mutex);
- 
-+	/*
-+	 * FIXME IPS should be fine as long as one plane is
-+	 * enabled, but in practice it seems to have problems
-+	 * when going from primary only to sprite only and vice
-+	 * versa.
-+	 */
-+	hsw_disable_ips(intel_crtc);
-+
- 	I915_WRITE(reg, I915_READ(reg) & ~DISPLAY_PLANE_ENABLE);
- }
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1037-drm-i915-Rename-intel_flush_display_plane-to-intel_f.patch b/patches.baytrail/1037-drm-i915-Rename-intel_flush_display_plane-to-intel_f.patch
deleted file mode 100644
index fa901346ae3e1..0000000000000
--- a/patches.baytrail/1037-drm-i915-Rename-intel_flush_display_plane-to-intel_f.patch
+++ /dev/null
@@ -1,121 +0,0 @@
-From 84287533b70ca75d5880afb5b78a84aa8925ff5b Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Tue, 1 Oct 2013 18:02:18 +0300
-Subject: drm/i915: Rename intel_flush_display_plane to
- intel_flush_primary_plane
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The intel_flush_primary_plane name actually tells us which plane
-we're talking about.
-
-Also reorganize the internals a bit and add a missing POSTING_READ()
-to make sure the hardware has seen the changes by the time we
-return from the function.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 1dba99f495fb2b8712d83f53a769a7393ea127d3)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 16 ++++++++--------
- drivers/gpu/drm/i915/intel_drv.h     |  2 +-
- drivers/gpu/drm/i915/intel_pm.c      |  2 +-
- drivers/gpu/drm/i915/intel_tv.c      |  4 ++--
- 4 files changed, 12 insertions(+), 12 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 64d59973a5b5..d7191dabd55a 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -1812,13 +1812,13 @@ static void intel_disable_pipe(struct drm_i915_private *dev_priv,
-  * Plane regs are double buffered, going from enabled->disabled needs a
-  * trigger in order to latch.  The display address reg provides this.
-  */
--void intel_flush_display_plane(struct drm_i915_private *dev_priv,
--				      enum plane plane)
-+void intel_flush_primary_plane(struct drm_i915_private *dev_priv,
-+			       enum plane plane)
- {
--	if (dev_priv->info->gen >= 4)
--		I915_WRITE(DSPSURF(plane), I915_READ(DSPSURF(plane)));
--	else
--		I915_WRITE(DSPADDR(plane), I915_READ(DSPADDR(plane)));
-+	u32 reg = dev_priv->info->gen >= 4 ? DSPSURF(plane) : DSPADDR(plane);
-+
-+	I915_WRITE(reg, I915_READ(reg));
-+	POSTING_READ(reg);
- }
- 
- /**
-@@ -1848,7 +1848,7 @@ static void intel_enable_plane(struct drm_i915_private *dev_priv,
- 		return;
- 
- 	I915_WRITE(reg, val | DISPLAY_PLANE_ENABLE);
--	intel_flush_display_plane(dev_priv, plane);
-+	intel_flush_primary_plane(dev_priv, plane);
- 	intel_wait_for_vblank(dev_priv->dev, pipe);
- }
- 
-@@ -1876,7 +1876,7 @@ static void intel_disable_plane(struct drm_i915_private *dev_priv,
- 		return;
- 
- 	I915_WRITE(reg, val & ~DISPLAY_PLANE_ENABLE);
--	intel_flush_display_plane(dev_priv, plane);
-+	intel_flush_primary_plane(dev_priv, plane);
- 	intel_wait_for_vblank(dev_priv->dev, pipe);
- }
- 
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index 55c8bc4b7d9f..dea20ce65e59 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -811,7 +811,7 @@ bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob);
- 
- /* intel_sprite.c */
- int intel_plane_init(struct drm_device *dev, enum pipe pipe, int plane);
--void intel_flush_display_plane(struct drm_i915_private *dev_priv,
-+void intel_flush_primary_plane(struct drm_i915_private *dev_priv,
- 			       enum plane plane);
- void intel_plane_restore(struct drm_plane *plane);
- void intel_plane_disable(struct drm_plane *plane);
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 008ec0bb017f..da24825acc84 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -4773,7 +4773,7 @@ static void g4x_disable_trickle_feed(struct drm_device *dev)
- 		I915_WRITE(DSPCNTR(pipe),
- 			   I915_READ(DSPCNTR(pipe)) |
- 			   DISPPLANE_TRICKLE_FEED_DISABLE);
--		intel_flush_display_plane(dev_priv, pipe);
-+		intel_flush_primary_plane(dev_priv, pipe);
- 	}
- }
- 
-diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c
-index d61aec23a523..18c406246a2d 100644
---- a/drivers/gpu/drm/i915/intel_tv.c
-+++ b/drivers/gpu/drm/i915/intel_tv.c
-@@ -1094,7 +1094,7 @@ static void intel_tv_mode_set(struct intel_encoder *encoder)
- 		unsigned int xsize, ysize;
- 		/* Pipe must be off here */
- 		I915_WRITE(dspcntr_reg, dspcntr & ~DISPLAY_PLANE_ENABLE);
--		intel_flush_display_plane(dev_priv, intel_crtc->plane);
-+		intel_flush_primary_plane(dev_priv, intel_crtc->plane);
- 
- 		/* Wait for vblank for the disable to take effect */
- 		if (IS_GEN2(dev))
-@@ -1123,7 +1123,7 @@ static void intel_tv_mode_set(struct intel_encoder *encoder)
- 
- 		I915_WRITE(pipeconf_reg, pipeconf);
- 		I915_WRITE(dspcntr_reg, dspcntr);
--		intel_flush_display_plane(dev_priv, intel_crtc->plane);
-+		intel_flush_primary_plane(dev_priv, intel_crtc->plane);
- 	}
- 
- 	j = 0;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1038-drm-i915-Rename-intel_-enable-disable-_plane-to-inte.patch b/patches.baytrail/1038-drm-i915-Rename-intel_-enable-disable-_plane-to-inte.patch
deleted file mode 100644
index 719c06290b245..0000000000000
--- a/patches.baytrail/1038-drm-i915-Rename-intel_-enable-disable-_plane-to-inte.patch
+++ /dev/null
@@ -1,131 +0,0 @@
-From 10cf8fb21c3296a385a25b294ce6cf2a438f531f Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Tue, 1 Oct 2013 18:02:19 +0300
-Subject: drm/i915: Rename intel_{enable, disable}_plane to intel_{enable,
- disable}_primary_plane
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The new names make it clearer which plane we're talking about.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-[danvet: Resolve small conflict with the haswell_crtc_disable_planes
-extraction.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit d1de00efcb4992da3936a4b0300b8b9b244080cd)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 26 +++++++++++++-------------
- 1 file changed, 13 insertions(+), 13 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index d7191dabd55a..8ee9d9e4e3f5 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -1822,15 +1822,15 @@ void intel_flush_primary_plane(struct drm_i915_private *dev_priv,
- }
- 
- /**
-- * intel_enable_plane - enable a display plane on a given pipe
-+ * intel_enable_primary_plane - enable the primary plane on a given pipe
-  * @dev_priv: i915 private structure
-  * @plane: plane to enable
-  * @pipe: pipe being fed
-  *
-  * Enable @plane on @pipe, making sure that @pipe is running first.
-  */
--static void intel_enable_plane(struct drm_i915_private *dev_priv,
--			       enum plane plane, enum pipe pipe)
-+static void intel_enable_primary_plane(struct drm_i915_private *dev_priv,
-+				       enum plane plane, enum pipe pipe)
- {
- 	struct intel_crtc *intel_crtc =
- 		to_intel_crtc(dev_priv->pipe_to_crtc_mapping[pipe]);
-@@ -1853,15 +1853,15 @@ static void intel_enable_plane(struct drm_i915_private *dev_priv,
- }
- 
- /**
-- * intel_disable_plane - disable a display plane
-+ * intel_disable_primary_plane - disable the primary plane
-  * @dev_priv: i915 private structure
-  * @plane: plane to disable
-  * @pipe: pipe consuming the data
-  *
-  * Disable @plane; should be an independent operation.
-  */
--static void intel_disable_plane(struct drm_i915_private *dev_priv,
--				enum plane plane, enum pipe pipe)
-+static void intel_disable_primary_plane(struct drm_i915_private *dev_priv,
-+					enum plane plane, enum pipe pipe)
- {
- 	struct intel_crtc *intel_crtc =
- 		to_intel_crtc(dev_priv->pipe_to_crtc_mapping[pipe]);
-@@ -3451,7 +3451,7 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc)
- 	intel_update_watermarks(crtc);
- 	intel_enable_pipe(dev_priv, pipe,
- 			  intel_crtc->config.has_pch_encoder, false);
--	intel_enable_plane(dev_priv, plane, pipe);
-+	intel_enable_primary_plane(dev_priv, plane, pipe);
- 	intel_enable_planes(crtc);
- 	intel_crtc_update_cursor(crtc, true);
- 
-@@ -3493,7 +3493,7 @@ static void haswell_crtc_enable_planes(struct drm_crtc *crtc)
- 	int pipe = intel_crtc->pipe;
- 	int plane = intel_crtc->plane;
- 
--	intel_enable_plane(dev_priv, plane, pipe);
-+	intel_enable_primary_plane(dev_priv, plane, pipe);
- 	intel_enable_planes(crtc);
- 	intel_crtc_update_cursor(crtc, true);
- 
-@@ -3523,7 +3523,7 @@ static void haswell_crtc_disable_planes(struct drm_crtc *crtc)
- 
- 	intel_crtc_update_cursor(crtc, false);
- 	intel_disable_planes(crtc);
--	intel_disable_plane(dev_priv, plane, pipe);
-+	intel_disable_primary_plane(dev_priv, plane, pipe);
- }
- 
- /*
-@@ -3662,7 +3662,7 @@ static void ironlake_crtc_disable(struct drm_crtc *crtc)
- 
- 	intel_crtc_update_cursor(crtc, false);
- 	intel_disable_planes(crtc);
--	intel_disable_plane(dev_priv, plane, pipe);
-+	intel_disable_primary_plane(dev_priv, plane, pipe);
- 
- 	if (intel_crtc->config.has_pch_encoder)
- 		intel_set_pch_fifo_underrun_reporting(dev, pipe, false);
-@@ -3870,7 +3870,7 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc)
- 
- 	intel_update_watermarks(crtc);
- 	intel_enable_pipe(dev_priv, pipe, false, is_dsi);
--	intel_enable_plane(dev_priv, plane, pipe);
-+	intel_enable_primary_plane(dev_priv, plane, pipe);
- 	intel_enable_planes(crtc);
- 	intel_crtc_update_cursor(crtc, true);
- 
-@@ -3908,7 +3908,7 @@ static void i9xx_crtc_enable(struct drm_crtc *crtc)
- 
- 	intel_update_watermarks(crtc);
- 	intel_enable_pipe(dev_priv, pipe, false, false);
--	intel_enable_plane(dev_priv, plane, pipe);
-+	intel_enable_primary_plane(dev_priv, plane, pipe);
- 	intel_enable_planes(crtc);
- 	/* The fixup needs to happen before cursor is enabled */
- 	if (IS_G4X(dev))
-@@ -3964,7 +3964,7 @@ static void i9xx_crtc_disable(struct drm_crtc *crtc)
- 	intel_crtc_dpms_overlay(intel_crtc, false);
- 	intel_crtc_update_cursor(crtc, false);
- 	intel_disable_planes(crtc);
--	intel_disable_plane(dev_priv, plane, pipe);
-+	intel_disable_primary_plane(dev_priv, plane, pipe);
- 
- 	intel_disable_pipe(dev_priv, pipe);
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1039-drm-i915-WARN-if-primary-plane-state-doesn-t-match-e.patch b/patches.baytrail/1039-drm-i915-WARN-if-primary-plane-state-doesn-t-match-e.patch
deleted file mode 100644
index 1f94ef74c9066..0000000000000
--- a/patches.baytrail/1039-drm-i915-WARN-if-primary-plane-state-doesn-t-match-e.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From d076f05348c10f762221a7c780fd8fefb6cfa8c1 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Tue, 1 Oct 2013 18:02:20 +0300
-Subject: drm/i915: WARN if primary plane state doesn't match expectations
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 0037f71c4b7fc0cc70714c5a076f54f348c04dea)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 4 ++++
- 1 file changed, 4 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 8ee9d9e4e3f5..0091107cc975 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -1840,6 +1840,8 @@ static void intel_enable_primary_plane(struct drm_i915_private *dev_priv,
- 	/* If the pipe isn't enabled, we can't pump pixels and may hang */
- 	assert_pipe_enabled(dev_priv, pipe);
- 
-+	WARN(!intel_crtc->primary_disabled, "Primary plane already enabled\n");
-+
- 	intel_crtc->primary_disabled = false;
- 
- 	reg = DSPCNTR(plane);
-@@ -1868,6 +1870,8 @@ static void intel_disable_primary_plane(struct drm_i915_private *dev_priv,
- 	int reg;
- 	u32 val;
- 
-+	WARN(intel_crtc->primary_disabled, "Primary plane already disabled\n");
-+
- 	intel_crtc->primary_disabled = true;
- 
- 	reg = DSPCNTR(plane);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1040-drm-i915-Flush-primary-plane-changes-in-sprite-code.patch b/patches.baytrail/1040-drm-i915-Flush-primary-plane-changes-in-sprite-code.patch
deleted file mode 100644
index 9044675d0c567..0000000000000
--- a/patches.baytrail/1040-drm-i915-Flush-primary-plane-changes-in-sprite-code.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-From 5bebae6523fd44f62688483c254fc380a0804000 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Tue, 1 Oct 2013 18:02:21 +0300
-Subject: drm/i915: Flush primary plane changes in sprite code
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Flush the primary plane changes when enabling/disabling the primary
-plane in response to sprite visibility.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 0fc9f5996340a637665ccb4faa69aab498dc4067)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_sprite.c | 2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
-index 76d0e2f5c4aa..e001d2c35c39 100644
---- a/drivers/gpu/drm/i915/intel_sprite.c
-+++ b/drivers/gpu/drm/i915/intel_sprite.c
-@@ -527,6 +527,7 @@ intel_enable_primary(struct drm_crtc *crtc)
- 	intel_crtc->primary_disabled = false;
- 
- 	I915_WRITE(reg, I915_READ(reg) | DISPLAY_PLANE_ENABLE);
-+	intel_flush_primary_plane(dev_priv, intel_crtc->plane);
- 
- 	/*
- 	 * FIXME IPS should be fine as long as one plane is
-@@ -571,6 +572,7 @@ intel_disable_primary(struct drm_crtc *crtc)
- 	hsw_disable_ips(intel_crtc);
- 
- 	I915_WRITE(reg, I915_READ(reg) & ~DISPLAY_PLANE_ENABLE);
-+	intel_flush_primary_plane(dev_priv, intel_crtc->plane);
- }
- 
- static int
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1041-drm-i915-Use-the-real-cpu-max-frequency-for-ring-sca.patch b/patches.baytrail/1041-drm-i915-Use-the-real-cpu-max-frequency-for-ring-sca.patch
deleted file mode 100644
index 1a2d15c85804b..0000000000000
--- a/patches.baytrail/1041-drm-i915-Use-the-real-cpu-max-frequency-for-ring-sca.patch
+++ /dev/null
@@ -1,76 +0,0 @@
-From 3a62dcb211c6d9b852ed10c03f503e2ce8e7811d Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <benjamin.widawsky@intel.com>
-Date: Mon, 7 Oct 2013 17:15:48 -0300
-Subject: drm/i915: Use the real cpu max frequency for ring scaling
-
-The policy's max frequency is not equal to the CPU's max frequency. The
-ring frequency is derived from the CPU frequency, and not the policy
-frequency.
-
-One example of how this may differ through sysfs. If the sysfs max
-frequency is modified, that will be used for the max ring frequency
-calculation.
-(/sys/devices/system/cpu/cpu0/cpufreq/scaling_max_freq). As far as I
-know, no current governor uses anything but max as the default, but in
-theory, they could. Similarly distributions might set policy as part of
-their init process.
-
-It's ideal to use the real frequency because when we're currently scaled
-up on the GPU. In this case we likely want to race to idle, and using a
-less than max ring frequency is non-optimal for this situation.
-
-AFAIK, this patch should have no impact on a majority of people.
-
-This behavior hasn't been changed since it was first introduced:
-commit 23b2f8bb92feb83127679c53633def32d3108e70
-Author: Jesse Barnes <jbarnes@virtuousgeek.org>
-Date:   Tue Jun 28 13:04:16 2011 -0700
-
-    drm/i915: load a ring frequency scaling table v3
-
-CC: Jesse Barnes <jbarnes@virtuousgeek.org>
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit eda796422aeb23a155b92ddc89cd70b9beffbad6)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 17 +++++++++++------
- 1 file changed, 11 insertions(+), 6 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index da24825acc84..9534e72fdbcb 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -3740,16 +3740,21 @@ void gen6_update_ring_freq(struct drm_device *dev)
- 	unsigned int gpu_freq;
- 	unsigned int max_ia_freq, min_ring_freq;
- 	int scaling_factor = 180;
-+	struct cpufreq_policy *policy;
- 
- 	WARN_ON(!mutex_is_locked(&dev_priv->rps.hw_lock));
- 
--	max_ia_freq = cpufreq_quick_get_max(0);
--	/*
--	 * Default to measured freq if none found, PCU will ensure we don't go
--	 * over
--	 */
--	if (!max_ia_freq)
-+	policy = cpufreq_cpu_get(0);
-+	if (policy) {
-+		max_ia_freq = policy->cpuinfo.max_freq;
-+		cpufreq_cpu_put(policy);
-+	} else {
-+		/*
-+		 * Default to measured freq if none found, PCU will ensure we
-+		 * don't go over
-+		 */
- 		max_ia_freq = tsc_khz;
-+	}
- 
- 	/* Convert from kHz to MHz */
- 	max_ia_freq /= 1000;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1042-drm-i915-Undo-the-PIPEA-quirk-for-i845.patch b/patches.baytrail/1042-drm-i915-Undo-the-PIPEA-quirk-for-i845.patch
deleted file mode 100644
index 5bc8661fb83fd..0000000000000
--- a/patches.baytrail/1042-drm-i915-Undo-the-PIPEA-quirk-for-i845.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From 65f31a5f57ba3ec407d6a3202c2c018e561d0ed1 Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Tue, 8 Oct 2013 11:16:59 +0100
-Subject: drm/i915: Undo the PIPEA quirk for i845
-
-The PIPEA quirk is specifically for the issue with the PIPEB PLL on
-830gm being slaved to the PIPEA PLL, and so to use PIPEB requires PIPEA
-running. i845 doesn't even have the second PLL or pipe, and enabling
-the quirk results in a blank DVO LVDS.
-
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit a4945f9522d27e1e6d64a02ad055e83768cb0896)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 3 +--
- 1 file changed, 1 insertion(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 0091107cc975..3bd2dc39cfc0 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -10305,8 +10305,7 @@ static struct intel_quirk intel_quirks[] = {
- 	/* ThinkPad T60 needs pipe A force quirk (bug #16494) */
- 	{ 0x2782, 0x17aa, 0x201a, quirk_pipea_force },
- 
--	/* 830/845 need to leave pipe A & dpll A up */
--	{ 0x2562, PCI_ANY_ID, PCI_ANY_ID, quirk_pipea_force },
-+	/* 830 needs to leave pipe A & dpll A up */
- 	{ 0x3577, PCI_ANY_ID, PCI_ANY_ID, quirk_pipea_force },
- 
- 	/* Lenovo U160 cannot use SSC on LVDS */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1043-drm-i915-check-that-the-i965g-gm-4G-limit-is-really-.patch b/patches.baytrail/1043-drm-i915-check-that-the-i965g-gm-4G-limit-is-really-.patch
deleted file mode 100644
index f2bdf4d1fb12e..0000000000000
--- a/patches.baytrail/1043-drm-i915-check-that-the-i965g-gm-4G-limit-is-really-.patch
+++ /dev/null
@@ -1,38 +0,0 @@
-From 1aee589fb9eed16d6457035bcdce2b21938ec9c9 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Mon, 7 Oct 2013 17:15:45 -0300
-Subject: drm/i915: check that the i965g/gm 4G limit is really obeyed
-
-In truly crazy circumstances shmem might give us the wrong type of
-page. So be a bit paranoid and double check this.
-
-Reviewer: Damien Lespiau <damien.lespiau@intel.com>
-Cc: Rob Clark <robdclark@gmail.com>
-References: http://lkml.org/lkml/2011/7/11/238
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 3bbbe706e8e6dac36ae893dc23bdb378dd4f4413)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gem.c | 3 +++
- 1 file changed, 3 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
-index 45571dac0a64..729e5c383370 100644
---- a/drivers/gpu/drm/i915/i915_gem.c
-+++ b/drivers/gpu/drm/i915/i915_gem.c
-@@ -1896,6 +1896,9 @@ i915_gem_object_get_pages_gtt(struct drm_i915_gem_object *obj)
- 			sg->length += PAGE_SIZE;
- 		}
- 		last_pfn = page_to_pfn(page);
-+
-+		/* Check that the i965g/gm workaround works. */
-+		WARN_ON((gfp & __GFP_DMA32) && (last_pfn >= 0x00100000UL));
- 	}
- #ifdef CONFIG_SWIOTLB
- 	if (!swiotlb_nr_tbl())
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1044-drm-i915-rip-out-gen2-reset-code.patch b/patches.baytrail/1044-drm-i915-rip-out-gen2-reset-code.patch
deleted file mode 100644
index 0e11f986a8827..0000000000000
--- a/patches.baytrail/1044-drm-i915-rip-out-gen2-reset-code.patch
+++ /dev/null
@@ -1,73 +0,0 @@
-From ebd5dc93ad4fc7b06a65758ca38ff533855cbf21 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Tue, 8 Oct 2013 12:25:41 +0200
-Subject: drm/i915: rip out gen2 reset code
-
-At least on my i830M here it reliably results in hard system hangs
-nowadays. This is much worse than falling back to software rendering,
-so I think we should simply rip this out.
-
-After all we don't have any gpu reset for gen3 either, and there are a
-lot more of those still around.
-
-Cc: Chris Wilson <chris@chris-wilson.co.uk>
-Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit e252d07aff961f8553822cda621490d9aeef8a06)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_uncore.c | 31 -------------------------------
- 1 file changed, 31 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
-index 288a3a654f06..bfc1a65fcd90 100644
---- a/drivers/gpu/drm/i915/intel_uncore.c
-+++ b/drivers/gpu/drm/i915/intel_uncore.c
-@@ -490,36 +490,6 @@ int i915_reg_read_ioctl(struct drm_device *dev,
- 	return 0;
- }
- 
--static int i8xx_do_reset(struct drm_device *dev)
--{
--	struct drm_i915_private *dev_priv = dev->dev_private;
--
--	if (IS_I85X(dev))
--		return -ENODEV;
--
--	I915_WRITE(D_STATE, I915_READ(D_STATE) | DSTATE_GFX_RESET_I830);
--	POSTING_READ(D_STATE);
--
--	if (IS_I830(dev) || IS_845G(dev)) {
--		I915_WRITE(DEBUG_RESET_I830,
--			   DEBUG_RESET_DISPLAY |
--			   DEBUG_RESET_RENDER |
--			   DEBUG_RESET_FULL);
--		POSTING_READ(DEBUG_RESET_I830);
--		msleep(1);
--
--		I915_WRITE(DEBUG_RESET_I830, 0);
--		POSTING_READ(DEBUG_RESET_I830);
--	}
--
--	msleep(1);
--
--	I915_WRITE(D_STATE, I915_READ(D_STATE) & ~DSTATE_GFX_RESET_I830);
--	POSTING_READ(D_STATE);
--
--	return 0;
--}
--
- static int i965_reset_complete(struct drm_device *dev)
- {
- 	u8 gdrst;
-@@ -621,7 +591,6 @@ int intel_gpu_reset(struct drm_device *dev)
- 	case 6: return gen6_do_reset(dev);
- 	case 5: return ironlake_do_reset(dev);
- 	case 4: return i965_do_reset(dev);
--	case 2: return i8xx_do_reset(dev);
- 	default: return -ENODEV;
- 	}
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1045-drm-i915-Prevent-using-uninitialized-MMIO-funcs.patch b/patches.baytrail/1045-drm-i915-Prevent-using-uninitialized-MMIO-funcs.patch
deleted file mode 100644
index 82f12029acd96..0000000000000
--- a/patches.baytrail/1045-drm-i915-Prevent-using-uninitialized-MMIO-funcs.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From f8c90237dd96b86d6bdba3de6496993241a6501c Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <benjamin.widawsky@intel.com>
-Date: Fri, 4 Oct 2013 21:22:49 -0700
-Subject: drm/i915: Prevent using uninitialized MMIO funcs
-
-For upcoming patches which will have GEN specific MMIO functions, we'll
-need to initialize the uncore data structure earlier than we do today.
-
-If we do not do this, the following will be problematic:
-
-intel_uncore_sanitize
-	intel_disable_gt_powersave
-		gen6_disable_rps
-			I915_WRITE(GEN6_RC_CONTROL, 0); <--- MMIO
-intel_uncore_init // initializes MMIO
-
-By initializing the function pointers first, we should be safe.
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 78511f2a6fc6960c8917d9655fffb687822a0225)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_dma.c |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/gpu/drm/i915/i915_dma.c
-+++ b/drivers/gpu/drm/i915/i915_dma.c
-@@ -1622,8 +1622,8 @@ int i915_driver_load(struct drm_device *
- 
- 	intel_irq_init(dev);
- 	intel_pm_init(dev);
--	intel_uncore_sanitize(dev);
- 	intel_uncore_init(dev);
-+	intel_uncore_sanitize(dev);
- 
- 	/* Try to make sure MCHBAR is enabled before poking at it */
- 	intel_setup_mchbar(dev);
diff --git a/patches.baytrail/1046-drm-i915-Move-edram-detection-early_sanitize.patch b/patches.baytrail/1046-drm-i915-Move-edram-detection-early_sanitize.patch
deleted file mode 100644
index 4bf6a21a4f830..0000000000000
--- a/patches.baytrail/1046-drm-i915-Move-edram-detection-early_sanitize.patch
+++ /dev/null
@@ -1,58 +0,0 @@
-From 6d173a8b0d4c035f2e8397ccd879f3072ba87a90 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <benjamin.widawsky@intel.com>
-Date: Fri, 4 Oct 2013 21:22:50 -0700
-Subject: drm/i915: Move edram detection early_sanitize
-
-In order to be able to have virtual functions for the MMIO, we need to
-use the raw access function. To keep things simple, just move this to
-our early_sanitize code in uncore.
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 18ce39943eb82e457e4c46dc86b1975d79b30aa7)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_dma.c     |   10 ----------
- drivers/gpu/drm/i915/intel_uncore.c |   11 +++++++++++
- 2 files changed, 11 insertions(+), 10 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_dma.c
-+++ b/drivers/gpu/drm/i915/i915_dma.c
-@@ -1550,16 +1550,6 @@ int i915_driver_load(struct drm_device *
- 
- 	intel_uncore_early_sanitize(dev);
- 
--	if (IS_HASWELL(dev) && (I915_READ(HSW_EDRAM_PRESENT) == 1)) {
--		/* The docs do not explain exactly how the calculation can be
--		 * made. It is somewhat guessable, but for now, it's always
--		 * 128MB.
--		 * NB: We can't write IDICR yet because we do not have gt funcs
--		 * set up */
--		dev_priv->ellc_size = 128;
--		DRM_INFO("Found %zuMB of eLLC\n", dev_priv->ellc_size);
--	}
--
- 	ret = i915_gem_gtt_init(dev);
- 	if (ret)
- 		goto out_regs;
---- a/drivers/gpu/drm/i915/intel_uncore.c
-+++ b/drivers/gpu/drm/i915/intel_uncore.c
-@@ -222,6 +222,17 @@ void intel_uncore_early_sanitize(struct
- 
- 	if (HAS_FPGA_DBG_UNCLAIMED(dev))
- 		__raw_i915_write32(dev_priv, FPGA_DBG, FPGA_DBG_RM_NOCLAIM);
-+
-+	if (IS_HASWELL(dev) &&
-+	    (__raw_i915_read32(dev_priv, HSW_EDRAM_PRESENT) == 1)) {
-+		/* The docs do not explain exactly how the calculation can be
-+		 * made. It is somewhat guessable, but for now, it's always
-+		 * 128MB.
-+		 * NB: We can't write IDICR yet because we do not have gt funcs
-+		 * set up */
-+		dev_priv->ellc_size = 128;
-+		DRM_INFO("Found %zuMB of eLLC\n", dev_priv->ellc_size);
-+	}
- }
- 
- void intel_uncore_init(struct drm_device *dev)
diff --git a/patches.baytrail/1047-drm-i915-Create-MMIO-virtual-functions.patch b/patches.baytrail/1047-drm-i915-Create-MMIO-virtual-functions.patch
deleted file mode 100644
index 95e8123d754d6..0000000000000
--- a/patches.baytrail/1047-drm-i915-Create-MMIO-virtual-functions.patch
+++ /dev/null
@@ -1,282 +0,0 @@
-From 0c434f5c6b95fd4ee48e3eef0f976a0035fc7337 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <benjamin.widawsky@intel.com>
-Date: Fri, 4 Oct 2013 21:22:51 -0700
-Subject: drm/i915: Create MMIO virtual functions
-
-In preparation for having per GEN MMIO functions, create, and start
-using MMIO functions in our uncore data structure. This simply makes the
-transition easier by allowing us to just plug in the per GEN stuff
-later.
-
-For simplicity, I moved the intel_uncore_init() function down since
-those rely on static functions defined lower in the file. This is most
-of the churn in this patch.
-
-I made one unrelated change here by using off_t datatype for the offset
-of the register to write. I like the clarity that this brings to the
-code. If I did it as a separate patch, I am pretty certain it would get
-bikeshedded to oblivion.
-
-Requested-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 0b27448141bbe9da34a2fdf965dcba6f0f1b75c5)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h     |  60 ++++++++--------
- drivers/gpu/drm/i915/intel_uncore.c | 139 +++++++++++++++++++-----------------
- 2 files changed, 104 insertions(+), 95 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 2792540fa5af..58b9e4770df7 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -399,6 +399,20 @@ struct drm_i915_display_funcs {
- struct intel_uncore_funcs {
- 	void (*force_wake_get)(struct drm_i915_private *dev_priv);
- 	void (*force_wake_put)(struct drm_i915_private *dev_priv);
-+
-+	uint8_t  (*mmio_readb)(struct drm_i915_private *dev_priv, off_t offset, bool trace);
-+	uint16_t (*mmio_readw)(struct drm_i915_private *dev_priv, off_t offset, bool trace);
-+	uint32_t (*mmio_readl)(struct drm_i915_private *dev_priv, off_t offset, bool trace);
-+	uint64_t (*mmio_readq)(struct drm_i915_private *dev_priv, off_t offset, bool trace);
-+
-+	void (*mmio_writeb)(struct drm_i915_private *dev_priv, off_t offset,
-+				uint8_t val, bool trace);
-+	void (*mmio_writew)(struct drm_i915_private *dev_priv, off_t offset,
-+				uint16_t val, bool trace);
-+	void (*mmio_writel)(struct drm_i915_private *dev_priv, off_t offset,
-+				uint32_t val, bool trace);
-+	void (*mmio_writeq)(struct drm_i915_private *dev_priv, off_t offset,
-+				uint64_t val, bool trace);
- };
- 
- struct intel_uncore {
-@@ -2338,37 +2352,21 @@ void intel_sbi_write(struct drm_i915_private *dev_priv, u16 reg, u32 value,
- int vlv_gpu_freq(int ddr_freq, int val);
- int vlv_freq_opcode(int ddr_freq, int val);
- 
--#define __i915_read(x) \
--	u##x i915_read##x(struct drm_i915_private *dev_priv, u32 reg, bool trace);
--__i915_read(8)
--__i915_read(16)
--__i915_read(32)
--__i915_read(64)
--#undef __i915_read
--
--#define __i915_write(x) \
--	void i915_write##x(struct drm_i915_private *dev_priv, u32 reg, u##x val, bool trace);
--__i915_write(8)
--__i915_write(16)
--__i915_write(32)
--__i915_write(64)
--#undef __i915_write
--
--#define I915_READ8(reg)		i915_read8(dev_priv, (reg), true)
--#define I915_WRITE8(reg, val)	i915_write8(dev_priv, (reg), (val), true)
--
--#define I915_READ16(reg)	i915_read16(dev_priv, (reg), true)
--#define I915_WRITE16(reg, val)	i915_write16(dev_priv, (reg), (val), true)
--#define I915_READ16_NOTRACE(reg)	i915_read16(dev_priv, (reg), false)
--#define I915_WRITE16_NOTRACE(reg, val)	i915_write16(dev_priv, (reg), (val), false)
--
--#define I915_READ(reg)		i915_read32(dev_priv, (reg), true)
--#define I915_WRITE(reg, val)	i915_write32(dev_priv, (reg), (val), true)
--#define I915_READ_NOTRACE(reg)		i915_read32(dev_priv, (reg), false)
--#define I915_WRITE_NOTRACE(reg, val)	i915_write32(dev_priv, (reg), (val), false)
--
--#define I915_WRITE64(reg, val)	i915_write64(dev_priv, (reg), (val), true)
--#define I915_READ64(reg)	i915_read64(dev_priv, (reg), true)
-+#define I915_READ8(reg)		dev_priv->uncore.funcs.mmio_readb(dev_priv, (reg), true)
-+#define I915_WRITE8(reg, val)	dev_priv->uncore.funcs.mmio_writeb(dev_priv, (reg), (val), true)
-+
-+#define I915_READ16(reg)	dev_priv->uncore.funcs.mmio_readw(dev_priv, (reg), true)
-+#define I915_WRITE16(reg, val)	dev_priv->uncore.funcs.mmio_writew(dev_priv, (reg), (val), true)
-+#define I915_READ16_NOTRACE(reg)	dev_priv->uncore.funcs.mmio_readw(dev_priv, (reg), false)
-+#define I915_WRITE16_NOTRACE(reg, val)	dev_priv->uncore.funcs.mmio_writew(dev_priv, (reg), (val), false)
-+
-+#define I915_READ(reg)		dev_priv->uncore.funcs.mmio_readl(dev_priv, (reg), true)
-+#define I915_WRITE(reg, val)	dev_priv->uncore.funcs.mmio_writel(dev_priv, (reg), (val), true)
-+#define I915_READ_NOTRACE(reg)		dev_priv->uncore.funcs.mmio_readl(dev_priv, (reg), false)
-+#define I915_WRITE_NOTRACE(reg, val)	dev_priv->uncore.funcs.mmio_writel(dev_priv, (reg), (val), false)
-+
-+#define I915_WRITE64(reg, val)	dev_priv->uncore.funcs.mmio_writeq(dev_priv, (reg), (val), true)
-+#define I915_READ64(reg)	dev_priv->uncore.funcs.mmio_readq(dev_priv, (reg), true)
- 
- #define POSTING_READ(reg)	(void)I915_READ_NOTRACE(reg)
- #define POSTING_READ16(reg)	(void)I915_READ16_NOTRACE(reg)
-diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
-index 2d16590d5478..8d032aeedc41 100644
---- a/drivers/gpu/drm/i915/intel_uncore.c
-+++ b/drivers/gpu/drm/i915/intel_uncore.c
-@@ -235,68 +235,6 @@ void intel_uncore_early_sanitize(struct drm_device *dev)
- 	}
- }
- 
--void intel_uncore_init(struct drm_device *dev)
--{
--	struct drm_i915_private *dev_priv = dev->dev_private;
--
--	INIT_DELAYED_WORK(&dev_priv->uncore.force_wake_work,
--			  gen6_force_wake_work);
--
--	if (IS_VALLEYVIEW(dev)) {
--		dev_priv->uncore.funcs.force_wake_get = vlv_force_wake_get;
--		dev_priv->uncore.funcs.force_wake_put = vlv_force_wake_put;
--	} else if (IS_HASWELL(dev)) {
--		dev_priv->uncore.funcs.force_wake_get = __gen6_gt_force_wake_mt_get;
--		dev_priv->uncore.funcs.force_wake_put = __gen6_gt_force_wake_mt_put;
--	} else if (IS_IVYBRIDGE(dev)) {
--		u32 ecobus;
--
--		/* IVB configs may use multi-threaded forcewake */
--
--		/* A small trick here - if the bios hasn't configured
--		 * MT forcewake, and if the device is in RC6, then
--		 * force_wake_mt_get will not wake the device and the
--		 * ECOBUS read will return zero. Which will be
--		 * (correctly) interpreted by the test below as MT
--		 * forcewake being disabled.
--		 */
--		mutex_lock(&dev->struct_mutex);
--		__gen6_gt_force_wake_mt_get(dev_priv);
--		ecobus = __raw_i915_read32(dev_priv, ECOBUS);
--		__gen6_gt_force_wake_mt_put(dev_priv);
--		mutex_unlock(&dev->struct_mutex);
--
--		if (ecobus & FORCEWAKE_MT_ENABLE) {
--			dev_priv->uncore.funcs.force_wake_get =
--				__gen6_gt_force_wake_mt_get;
--			dev_priv->uncore.funcs.force_wake_put =
--				__gen6_gt_force_wake_mt_put;
--		} else {
--			DRM_INFO("No MT forcewake available on Ivybridge, this can result in issues\n");
--			DRM_INFO("when using vblank-synced partial screen updates.\n");
--			dev_priv->uncore.funcs.force_wake_get =
--				__gen6_gt_force_wake_get;
--			dev_priv->uncore.funcs.force_wake_put =
--				__gen6_gt_force_wake_put;
--		}
--	} else if (IS_GEN6(dev)) {
--		dev_priv->uncore.funcs.force_wake_get =
--			__gen6_gt_force_wake_get;
--		dev_priv->uncore.funcs.force_wake_put =
--			__gen6_gt_force_wake_put;
--	}
--}
--
--void intel_uncore_fini(struct drm_device *dev)
--{
--	struct drm_i915_private *dev_priv = dev->dev_private;
--
--	flush_delayed_work(&dev_priv->uncore.force_wake_work);
--
--	/* Paranoia: make sure we have disabled everything before we exit. */
--	intel_uncore_sanitize(dev);
--}
--
- static void intel_uncore_forcewake_reset(struct drm_device *dev)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
-@@ -404,7 +342,8 @@ hsw_unclaimed_reg_check(struct drm_i915_private *dev_priv, u32 reg)
- }
- 
- #define __i915_read(x) \
--u##x i915_read##x(struct drm_i915_private *dev_priv, u32 reg, bool trace) { \
-+static u##x \
-+i915_read##x(struct drm_i915_private *dev_priv, off_t reg, bool trace) { \
- 	unsigned long irqflags; \
- 	u##x val = 0; \
- 	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags); \
-@@ -431,7 +370,8 @@ __i915_read(64)
- #undef __i915_read
- 
- #define __i915_write(x) \
--void i915_write##x(struct drm_i915_private *dev_priv, u32 reg, u##x val, bool trace) { \
-+static void \
-+i915_write##x(struct drm_i915_private *dev_priv, off_t reg, u##x val, bool trace) { \
- 	unsigned long irqflags; \
- 	u32 __fifo_ret = 0; \
- 	trace_i915_reg_rw(true, reg, val, sizeof(val), trace); \
-@@ -455,6 +395,77 @@ __i915_write(32)
- __i915_write(64)
- #undef __i915_write
- 
-+void intel_uncore_init(struct drm_device *dev)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+
-+	INIT_DELAYED_WORK(&dev_priv->uncore.force_wake_work,
-+			  gen6_force_wake_work);
-+
-+	if (IS_VALLEYVIEW(dev)) {
-+		dev_priv->uncore.funcs.force_wake_get = vlv_force_wake_get;
-+		dev_priv->uncore.funcs.force_wake_put = vlv_force_wake_put;
-+	} else if (IS_HASWELL(dev)) {
-+		dev_priv->uncore.funcs.force_wake_get = __gen6_gt_force_wake_mt_get;
-+		dev_priv->uncore.funcs.force_wake_put = __gen6_gt_force_wake_mt_put;
-+	} else if (IS_IVYBRIDGE(dev)) {
-+		u32 ecobus;
-+
-+		/* IVB configs may use multi-threaded forcewake */
-+
-+		/* A small trick here - if the bios hasn't configured
-+		 * MT forcewake, and if the device is in RC6, then
-+		 * force_wake_mt_get will not wake the device and the
-+		 * ECOBUS read will return zero. Which will be
-+		 * (correctly) interpreted by the test below as MT
-+		 * forcewake being disabled.
-+		 */
-+		mutex_lock(&dev->struct_mutex);
-+		__gen6_gt_force_wake_mt_get(dev_priv);
-+		ecobus = __raw_i915_read32(dev_priv, ECOBUS);
-+		__gen6_gt_force_wake_mt_put(dev_priv);
-+		mutex_unlock(&dev->struct_mutex);
-+
-+		if (ecobus & FORCEWAKE_MT_ENABLE) {
-+			dev_priv->uncore.funcs.force_wake_get =
-+				__gen6_gt_force_wake_mt_get;
-+			dev_priv->uncore.funcs.force_wake_put =
-+				__gen6_gt_force_wake_mt_put;
-+		} else {
-+			DRM_INFO("No MT forcewake available on Ivybridge, this can result in issues\n");
-+			DRM_INFO("when using vblank-synced partial screen updates.\n");
-+			dev_priv->uncore.funcs.force_wake_get =
-+				__gen6_gt_force_wake_get;
-+			dev_priv->uncore.funcs.force_wake_put =
-+				__gen6_gt_force_wake_put;
-+		}
-+	} else if (IS_GEN6(dev)) {
-+		dev_priv->uncore.funcs.force_wake_get =
-+			__gen6_gt_force_wake_get;
-+		dev_priv->uncore.funcs.force_wake_put =
-+			__gen6_gt_force_wake_put;
-+	}
-+
-+	dev_priv->uncore.funcs.mmio_readb  = i915_read8;
-+	dev_priv->uncore.funcs.mmio_readw  = i915_read16;
-+	dev_priv->uncore.funcs.mmio_readl  = i915_read32;
-+	dev_priv->uncore.funcs.mmio_readq  = i915_read64;
-+	dev_priv->uncore.funcs.mmio_writeb = i915_write8;
-+	dev_priv->uncore.funcs.mmio_writew = i915_write16;
-+	dev_priv->uncore.funcs.mmio_writel = i915_write32;
-+	dev_priv->uncore.funcs.mmio_writeq = i915_write64;
-+}
-+
-+void intel_uncore_fini(struct drm_device *dev)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+
-+	flush_delayed_work(&dev_priv->uncore.force_wake_work);
-+
-+	/* Paranoia: make sure we have disabled everything before we exit. */
-+	intel_uncore_sanitize(dev);
-+}
-+
- static const struct register_whitelist {
- 	uint64_t offset;
- 	uint32_t size;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1048-drm-i915-Extract-common-MMIO-lines.patch b/patches.baytrail/1048-drm-i915-Extract-common-MMIO-lines.patch
deleted file mode 100644
index a65c19f657e9e..0000000000000
--- a/patches.baytrail/1048-drm-i915-Extract-common-MMIO-lines.patch
+++ /dev/null
@@ -1,92 +0,0 @@
-From 86f9bcb543df3fdb925d1f61f77ae17a916aa59f Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <benjamin.widawsky@intel.com>
-Date: Fri, 4 Oct 2013 21:24:53 -0700
-Subject: drm/i915: Extract common MMIO lines
-
-Just to make the churn and code duplication in upcoming patches a bit
-less, turn code which is common to all GEN MMIO functions into a macro.
-
-v2: Fix typo in subject
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 5d738795968dfa8f034e5f0d30f65d362c450455)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_uncore.c | 30 +++++++++++++++++++++---------
- 1 file changed, 21 insertions(+), 9 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
-index 8d032aeedc41..b8b659714a31 100644
---- a/drivers/gpu/drm/i915/intel_uncore.c
-+++ b/drivers/gpu/drm/i915/intel_uncore.c
-@@ -341,12 +341,20 @@ hsw_unclaimed_reg_check(struct drm_i915_private *dev_priv, u32 reg)
- 	}
- }
- 
-+#define REG_READ_HEADER(x) \
-+	unsigned long irqflags; \
-+	u##x val = 0; \
-+	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags)
-+
-+#define REG_READ_FOOTER \
-+	spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags); \
-+	trace_i915_reg_rw(false, reg, val, sizeof(val), trace); \
-+	return val
-+
- #define __i915_read(x) \
- static u##x \
- i915_read##x(struct drm_i915_private *dev_priv, off_t reg, bool trace) { \
--	unsigned long irqflags; \
--	u##x val = 0; \
--	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags); \
-+	REG_READ_HEADER(x); \
- 	if (dev_priv->info->gen == 5) \
- 		ilk_dummy_write(dev_priv); \
- 	if (NEEDS_FORCE_WAKE((dev_priv), (reg))) { \
-@@ -358,9 +366,7 @@ i915_read##x(struct drm_i915_private *dev_priv, off_t reg, bool trace) { \
- 	} else { \
- 		val = __raw_i915_read##x(dev_priv, reg); \
- 	} \
--	spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags); \
--	trace_i915_reg_rw(false, reg, val, sizeof(val), trace); \
--	return val; \
-+	REG_READ_FOOTER; \
- }
- 
- __i915_read(8)
-@@ -368,14 +374,19 @@ __i915_read(16)
- __i915_read(32)
- __i915_read(64)
- #undef __i915_read
-+#undef REG_READ_FOOTER
-+#undef REG_READ_HEADER
-+
-+#define REG_WRITE_HEADER \
-+	unsigned long irqflags; \
-+	trace_i915_reg_rw(true, reg, val, sizeof(val), trace); \
-+	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags)
- 
- #define __i915_write(x) \
- static void \
- i915_write##x(struct drm_i915_private *dev_priv, off_t reg, u##x val, bool trace) { \
--	unsigned long irqflags; \
- 	u32 __fifo_ret = 0; \
--	trace_i915_reg_rw(true, reg, val, sizeof(val), trace); \
--	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags); \
-+	REG_WRITE_HEADER; \
- 	if (NEEDS_FORCE_WAKE((dev_priv), (reg))) { \
- 		__fifo_ret = __gen6_gt_wait_for_fifo(dev_priv); \
- 	} \
-@@ -394,6 +405,7 @@ __i915_write(16)
- __i915_write(32)
- __i915_write(64)
- #undef __i915_write
-+#undef REG_WRITE_HEADER
- 
- void intel_uncore_init(struct drm_device *dev)
- {
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1049-drm-i915-Create-GEN-specific-read-MMIO.patch b/patches.baytrail/1049-drm-i915-Create-GEN-specific-read-MMIO.patch
deleted file mode 100644
index 077700efb757a..0000000000000
--- a/patches.baytrail/1049-drm-i915-Create-GEN-specific-read-MMIO.patch
+++ /dev/null
@@ -1,132 +0,0 @@
-From cd4778bb642bfc93aec3d26b030de16b9603f654 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <benjamin.widawsky@intel.com>
-Date: Fri, 4 Oct 2013 21:22:53 -0700
-Subject: drm/i915: Create GEN specific read MMIO
-
-Extracting the MMIO read functionality makes per gen handling a bit
-simpler, and the overall function a lot easier to read. The increasing
-complexity of reads doesn't get too bad as the generation number
-increases:
-
-gen[2-4]: Nothing special
-gen5: ILK dummy write workaround
-gen6+: forcewake shenanigans
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 3967018ed67f9480b2f47f8908b44b66bdbd40b5)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_uncore.c | 72 ++++++++++++++++++++++++++++++-------
- 1 file changed, 59 insertions(+), 13 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
-index b8b659714a31..d1b32c848a44 100644
---- a/drivers/gpu/drm/i915/intel_uncore.c
-+++ b/drivers/gpu/drm/i915/intel_uncore.c
-@@ -351,12 +351,27 @@ hsw_unclaimed_reg_check(struct drm_i915_private *dev_priv, u32 reg)
- 	trace_i915_reg_rw(false, reg, val, sizeof(val), trace); \
- 	return val
- 
--#define __i915_read(x) \
-+#define __gen4_read(x) \
- static u##x \
--i915_read##x(struct drm_i915_private *dev_priv, off_t reg, bool trace) { \
-+gen4_read##x(struct drm_i915_private *dev_priv, off_t reg, bool trace) { \
-+	REG_READ_HEADER(x); \
-+	val = __raw_i915_read##x(dev_priv, reg); \
-+	REG_READ_FOOTER; \
-+}
-+
-+#define __gen5_read(x) \
-+static u##x \
-+gen5_read##x(struct drm_i915_private *dev_priv, off_t reg, bool trace) { \
-+	REG_READ_HEADER(x); \
-+	ilk_dummy_write(dev_priv); \
-+	val = __raw_i915_read##x(dev_priv, reg); \
-+	REG_READ_FOOTER; \
-+}
-+
-+#define __gen6_read(x) \
-+static u##x \
-+gen6_read##x(struct drm_i915_private *dev_priv, off_t reg, bool trace) { \
- 	REG_READ_HEADER(x); \
--	if (dev_priv->info->gen == 5) \
--		ilk_dummy_write(dev_priv); \
- 	if (NEEDS_FORCE_WAKE((dev_priv), (reg))) { \
- 		if (dev_priv->uncore.forcewake_count == 0) \
- 			dev_priv->uncore.funcs.force_wake_get(dev_priv); \
-@@ -369,11 +384,22 @@ i915_read##x(struct drm_i915_private *dev_priv, off_t reg, bool trace) { \
- 	REG_READ_FOOTER; \
- }
- 
--__i915_read(8)
--__i915_read(16)
--__i915_read(32)
--__i915_read(64)
--#undef __i915_read
-+__gen6_read(8)
-+__gen6_read(16)
-+__gen6_read(32)
-+__gen6_read(64)
-+__gen5_read(8)
-+__gen5_read(16)
-+__gen5_read(32)
-+__gen5_read(64)
-+__gen4_read(8)
-+__gen4_read(16)
-+__gen4_read(32)
-+__gen4_read(64)
-+
-+#undef __gen6_read
-+#undef __gen5_read
-+#undef __gen4_read
- #undef REG_READ_FOOTER
- #undef REG_READ_HEADER
- 
-@@ -400,6 +426,7 @@ i915_write##x(struct drm_i915_private *dev_priv, off_t reg, u##x val, bool trace
- 	hsw_unclaimed_reg_check(dev_priv, reg); \
- 	spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags); \
- }
-+
- __i915_write(8)
- __i915_write(16)
- __i915_write(32)
-@@ -458,10 +485,29 @@ void intel_uncore_init(struct drm_device *dev)
- 			__gen6_gt_force_wake_put;
- 	}
- 
--	dev_priv->uncore.funcs.mmio_readb  = i915_read8;
--	dev_priv->uncore.funcs.mmio_readw  = i915_read16;
--	dev_priv->uncore.funcs.mmio_readl  = i915_read32;
--	dev_priv->uncore.funcs.mmio_readq  = i915_read64;
-+	switch (INTEL_INFO(dev)->gen) {
-+	case 7:
-+	case 6:
-+		dev_priv->uncore.funcs.mmio_readb  = gen6_read8;
-+		dev_priv->uncore.funcs.mmio_readw  = gen6_read16;
-+		dev_priv->uncore.funcs.mmio_readl  = gen6_read32;
-+		dev_priv->uncore.funcs.mmio_readq  = gen6_read64;
-+		break;
-+	case 5:
-+		dev_priv->uncore.funcs.mmio_readb  = gen5_read8;
-+		dev_priv->uncore.funcs.mmio_readw  = gen5_read16;
-+		dev_priv->uncore.funcs.mmio_readl  = gen5_read32;
-+		dev_priv->uncore.funcs.mmio_readq  = gen5_read64;
-+		break;
-+	case 4:
-+	case 3:
-+	case 2:
-+		dev_priv->uncore.funcs.mmio_readb  = gen4_read8;
-+		dev_priv->uncore.funcs.mmio_readw  = gen4_read16;
-+		dev_priv->uncore.funcs.mmio_readl  = gen4_read32;
-+		dev_priv->uncore.funcs.mmio_readq  = gen4_read64;
-+		break;
-+	}
- 	dev_priv->uncore.funcs.mmio_writeb = i915_write8;
- 	dev_priv->uncore.funcs.mmio_writew = i915_write16;
- 	dev_priv->uncore.funcs.mmio_writel = i915_write32;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1050-drm-i915-Create-GEN-specific-write-MMIO.patch b/patches.baytrail/1050-drm-i915-Create-GEN-specific-write-MMIO.patch
deleted file mode 100644
index 33a50d159ca3f..0000000000000
--- a/patches.baytrail/1050-drm-i915-Create-GEN-specific-write-MMIO.patch
+++ /dev/null
@@ -1,168 +0,0 @@
-From f35601d6006a9159cbda4bcf95184079dc82656e Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <benjamin.widawsky@intel.com>
-Date: Fri, 4 Oct 2013 21:22:54 -0700
-Subject: drm/i915: Create GEN specific write MMIO
-
-Similar to the previous patch which implemented GEN specific reads; this
-patch does the same for writes. Writes have a bit of adding complexity
-due to the FPGA_DBG feature of HSW plus:
-
-gen[2-4]: nothing special
-gen5: ILK dummy write
-gen[6-7]: forcewake shenanigans
-gen[HSW}: forcewake shenanigans + FPGA_DBG
-
-I was a bit torn about whether or not to combine 6-HSW as one function,
-since the FPGA_DBG is cleanly separated, and it wouldn't make the 6-7
-MMIO too messy. In the end, I chose the clearest possible solution which
-splits out HSW.
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 4032ef4315475dd9605d6cde461168fb85d776ea)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_uncore.c | 87 +++++++++++++++++++++++++++++++------
- 1 file changed, 74 insertions(+), 13 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
-index d1b32c848a44..7e8dcbeb0cac 100644
---- a/drivers/gpu/drm/i915/intel_uncore.c
-+++ b/drivers/gpu/drm/i915/intel_uncore.c
-@@ -408,16 +408,46 @@ __gen4_read(64)
- 	trace_i915_reg_rw(true, reg, val, sizeof(val), trace); \
- 	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags)
- 
--#define __i915_write(x) \
-+#define __gen4_write(x) \
- static void \
--i915_write##x(struct drm_i915_private *dev_priv, off_t reg, u##x val, bool trace) { \
-+gen4_write##x(struct drm_i915_private *dev_priv, off_t reg, u##x val, bool trace) { \
-+	REG_WRITE_HEADER; \
-+	__raw_i915_write##x(dev_priv, reg, val); \
-+	spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags); \
-+}
-+
-+#define __gen5_write(x) \
-+static void \
-+gen5_write##x(struct drm_i915_private *dev_priv, off_t reg, u##x val, bool trace) { \
-+	REG_WRITE_HEADER; \
-+	ilk_dummy_write(dev_priv); \
-+	__raw_i915_write##x(dev_priv, reg, val); \
-+	spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags); \
-+}
-+
-+#define __gen6_write(x) \
-+static void \
-+gen6_write##x(struct drm_i915_private *dev_priv, off_t reg, u##x val, bool trace) { \
-+	u32 __fifo_ret = 0; \
-+	REG_WRITE_HEADER; \
-+	if (NEEDS_FORCE_WAKE((dev_priv), (reg))) { \
-+		__fifo_ret = __gen6_gt_wait_for_fifo(dev_priv); \
-+	} \
-+	__raw_i915_write##x(dev_priv, reg, val); \
-+	if (unlikely(__fifo_ret)) { \
-+		gen6_gt_check_fifodbg(dev_priv); \
-+	} \
-+	spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags); \
-+}
-+
-+#define __hsw_write(x) \
-+static void \
-+hsw_write##x(struct drm_i915_private *dev_priv, off_t reg, u##x val, bool trace) { \
- 	u32 __fifo_ret = 0; \
- 	REG_WRITE_HEADER; \
- 	if (NEEDS_FORCE_WAKE((dev_priv), (reg))) { \
- 		__fifo_ret = __gen6_gt_wait_for_fifo(dev_priv); \
- 	} \
--	if (dev_priv->info->gen == 5) \
--		ilk_dummy_write(dev_priv); \
- 	hsw_unclaimed_reg_clear(dev_priv, reg); \
- 	__raw_i915_write##x(dev_priv, reg, val); \
- 	if (unlikely(__fifo_ret)) { \
-@@ -427,11 +457,27 @@ i915_write##x(struct drm_i915_private *dev_priv, off_t reg, u##x val, bool trace
- 	spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags); \
- }
- 
--__i915_write(8)
--__i915_write(16)
--__i915_write(32)
--__i915_write(64)
--#undef __i915_write
-+__hsw_write(8)
-+__hsw_write(16)
-+__hsw_write(32)
-+__hsw_write(64)
-+__gen6_write(8)
-+__gen6_write(16)
-+__gen6_write(32)
-+__gen6_write(64)
-+__gen5_write(8)
-+__gen5_write(16)
-+__gen5_write(32)
-+__gen5_write(64)
-+__gen4_write(8)
-+__gen4_write(16)
-+__gen4_write(32)
-+__gen4_write(64)
-+
-+#undef __hsw_write
-+#undef __gen6_write
-+#undef __gen5_write
-+#undef __gen4_write
- #undef REG_WRITE_HEADER
- 
- void intel_uncore_init(struct drm_device *dev)
-@@ -488,12 +534,27 @@ void intel_uncore_init(struct drm_device *dev)
- 	switch (INTEL_INFO(dev)->gen) {
- 	case 7:
- 	case 6:
-+		if (IS_HASWELL(dev)) {
-+			dev_priv->uncore.funcs.mmio_writeb  = hsw_write8;
-+			dev_priv->uncore.funcs.mmio_writew  = hsw_write16;
-+			dev_priv->uncore.funcs.mmio_writel  = hsw_write32;
-+			dev_priv->uncore.funcs.mmio_writeq  = hsw_write64;
-+		} else {
-+			dev_priv->uncore.funcs.mmio_writeb  = gen6_write8;
-+			dev_priv->uncore.funcs.mmio_writew  = gen6_write16;
-+			dev_priv->uncore.funcs.mmio_writel  = gen6_write32;
-+			dev_priv->uncore.funcs.mmio_writeq  = gen6_write64;
-+		}
- 		dev_priv->uncore.funcs.mmio_readb  = gen6_read8;
- 		dev_priv->uncore.funcs.mmio_readw  = gen6_read16;
- 		dev_priv->uncore.funcs.mmio_readl  = gen6_read32;
- 		dev_priv->uncore.funcs.mmio_readq  = gen6_read64;
- 		break;
- 	case 5:
-+		dev_priv->uncore.funcs.mmio_writeb  = gen5_write8;
-+		dev_priv->uncore.funcs.mmio_writew  = gen5_write16;
-+		dev_priv->uncore.funcs.mmio_writel  = gen5_write32;
-+		dev_priv->uncore.funcs.mmio_writeq  = gen5_write64;
- 		dev_priv->uncore.funcs.mmio_readb  = gen5_read8;
- 		dev_priv->uncore.funcs.mmio_readw  = gen5_read16;
- 		dev_priv->uncore.funcs.mmio_readl  = gen5_read32;
-@@ -502,16 +563,16 @@ void intel_uncore_init(struct drm_device *dev)
- 	case 4:
- 	case 3:
- 	case 2:
-+		dev_priv->uncore.funcs.mmio_writeb  = gen4_write8;
-+		dev_priv->uncore.funcs.mmio_writew  = gen4_write16;
-+		dev_priv->uncore.funcs.mmio_writel  = gen4_write32;
-+		dev_priv->uncore.funcs.mmio_writeq  = gen4_write64;
- 		dev_priv->uncore.funcs.mmio_readb  = gen4_read8;
- 		dev_priv->uncore.funcs.mmio_readw  = gen4_read16;
- 		dev_priv->uncore.funcs.mmio_readl  = gen4_read32;
- 		dev_priv->uncore.funcs.mmio_readq  = gen4_read64;
- 		break;
- 	}
--	dev_priv->uncore.funcs.mmio_writeb = i915_write8;
--	dev_priv->uncore.funcs.mmio_writew = i915_write16;
--	dev_priv->uncore.funcs.mmio_writel = i915_write32;
--	dev_priv->uncore.funcs.mmio_writeq = i915_write64;
- }
- 
- void intel_uncore_fini(struct drm_device *dev)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1051-drm-i915-Remove-gen-specific-checks-in-MMIO.patch b/patches.baytrail/1051-drm-i915-Remove-gen-specific-checks-in-MMIO.patch
deleted file mode 100644
index 5b346c6ee75f4..0000000000000
--- a/patches.baytrail/1051-drm-i915-Remove-gen-specific-checks-in-MMIO.patch
+++ /dev/null
@@ -1,158 +0,0 @@
-From 9231ea09c8f070e4a59a85c69b8f8eb2d94584c3 Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <benjamin.widawsky@intel.com>
-Date: Sat, 5 Oct 2013 17:57:11 -0700
-Subject: drm/i915: Remove gen specific checks in MMIO
-
-Now that MMIO has been split up into gen specific functions it is
-obvious when HAS_FPGA_DBG_UNCLAIMED, HAS_FORCE_WAKE are needed. As such,
-we can remove this extraneous condition.
-
-As a result of this, as well as previously existing function pointers
-for forcewake, we no longer need the has_force_wake member in the device
-specific data structure.
-
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit ab484f8fd62c97fc52dbb380d8b7cf3ff77b1e70)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.c         |  5 +----
- drivers/gpu/drm/i915/i915_drv.h         |  3 ---
- drivers/gpu/drm/i915/intel_ringbuffer.c |  6 ++----
- drivers/gpu/drm/i915/intel_uncore.c     | 16 +++++++++-------
- 4 files changed, 12 insertions(+), 18 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
-index 0fc96586acf3..8ac8e8161233 100644
---- a/drivers/gpu/drm/i915/i915_drv.c
-+++ b/drivers/gpu/drm/i915/i915_drv.c
-@@ -257,7 +257,6 @@ static const struct intel_device_info intel_sandybridge_d_info = {
- 	.has_bsd_ring = 1,
- 	.has_blt_ring = 1,
- 	.has_llc = 1,
--	.has_force_wake = 1,
- };
- 
- static const struct intel_device_info intel_sandybridge_m_info = {
-@@ -267,7 +266,6 @@ static const struct intel_device_info intel_sandybridge_m_info = {
- 	.has_bsd_ring = 1,
- 	.has_blt_ring = 1,
- 	.has_llc = 1,
--	.has_force_wake = 1,
- };
- 
- #define GEN7_FEATURES  \
-@@ -275,8 +273,7 @@ static const struct intel_device_info intel_sandybridge_m_info = {
- 	.need_gfx_hws = 1, .has_hotplug = 1, \
- 	.has_bsd_ring = 1, \
- 	.has_blt_ring = 1, \
--	.has_llc = 1, \
--	.has_force_wake = 1
-+	.has_llc = 1
- 
- static const struct intel_device_info intel_ivybridge_d_info = {
- 	GEN7_FEATURES,
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 58b9e4770df7..0c1f8a4e3734 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -441,7 +441,6 @@ struct intel_uncore {
- 	func(is_valleyview) sep \
- 	func(is_haswell) sep \
- 	func(is_preliminary) sep \
--	func(has_force_wake) sep \
- 	func(has_fbc) sep \
- 	func(has_pipe_cxsr) sep \
- 	func(has_hotplug) sep \
-@@ -1729,8 +1728,6 @@ struct drm_i915_file_private {
- #define HAS_PCH_NOP(dev) (INTEL_PCH_TYPE(dev) == PCH_NOP)
- #define HAS_PCH_SPLIT(dev) (INTEL_PCH_TYPE(dev) != PCH_NONE)
- 
--#define HAS_FORCE_WAKE(dev) (INTEL_INFO(dev)->has_force_wake)
--
- /* DPF == dynamic parity feature */
- #define HAS_L3_DPF(dev) (IS_IVYBRIDGE(dev) || IS_HASWELL(dev))
- #define NUM_L3_SLICES(dev) (IS_HSW_GT3(dev) ? 2 : HAS_L3_DPF(dev))
-diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
-index b67104aaade5..4e108fc3c340 100644
---- a/drivers/gpu/drm/i915/intel_ringbuffer.c
-+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
-@@ -395,8 +395,7 @@ static int init_ring_common(struct intel_ring_buffer *ring)
- 	int ret = 0;
- 	u32 head;
- 
--	if (HAS_FORCE_WAKE(dev))
--		gen6_gt_force_wake_get(dev_priv);
-+	gen6_gt_force_wake_get(dev_priv);
- 
- 	if (I915_NEED_GFX_HWS(dev))
- 		intel_ring_setup_status_page(ring);
-@@ -469,8 +468,7 @@ static int init_ring_common(struct intel_ring_buffer *ring)
- 	memset(&ring->hangcheck, 0, sizeof(ring->hangcheck));
- 
- out:
--	if (HAS_FORCE_WAKE(dev))
--		gen6_gt_force_wake_put(dev_priv);
-+	gen6_gt_force_wake_put(dev_priv);
- 
- 	return ret;
- }
-diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
-index 7e8dcbeb0cac..f6fae35c568e 100644
---- a/drivers/gpu/drm/i915/intel_uncore.c
-+++ b/drivers/gpu/drm/i915/intel_uncore.c
-@@ -282,6 +282,9 @@ void gen6_gt_force_wake_get(struct drm_i915_private *dev_priv)
- {
- 	unsigned long irqflags;
- 
-+	if (!dev_priv->uncore.funcs.force_wake_get)
-+		return;
-+
- 	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
- 	if (dev_priv->uncore.forcewake_count++ == 0)
- 		dev_priv->uncore.funcs.force_wake_get(dev_priv);
-@@ -295,6 +298,9 @@ void gen6_gt_force_wake_put(struct drm_i915_private *dev_priv)
- {
- 	unsigned long irqflags;
- 
-+	if (!dev_priv->uncore.funcs.force_wake_put)
-+		return;
-+
- 	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
- 	if (--dev_priv->uncore.forcewake_count == 0) {
- 		dev_priv->uncore.forcewake_count++;
-@@ -307,9 +313,7 @@ void gen6_gt_force_wake_put(struct drm_i915_private *dev_priv)
- 
- /* We give fast paths for the really cool registers */
- #define NEEDS_FORCE_WAKE(dev_priv, reg) \
--	((HAS_FORCE_WAKE((dev_priv)->dev)) && \
--	 ((reg) < 0x40000) &&            \
--	 ((reg) != FORCEWAKE))
-+	 ((reg) < 0x40000 && (reg) != FORCEWAKE)
- 
- static void
- ilk_dummy_write(struct drm_i915_private *dev_priv)
-@@ -323,8 +327,7 @@ ilk_dummy_write(struct drm_i915_private *dev_priv)
- static void
- hsw_unclaimed_reg_clear(struct drm_i915_private *dev_priv, u32 reg)
- {
--	if (HAS_FPGA_DBG_UNCLAIMED(dev_priv->dev) &&
--	    (__raw_i915_read32(dev_priv, FPGA_DBG) & FPGA_DBG_RM_NOCLAIM)) {
-+	if (__raw_i915_read32(dev_priv, FPGA_DBG) & FPGA_DBG_RM_NOCLAIM) {
- 		DRM_ERROR("Unknown unclaimed register before writing to %x\n",
- 			  reg);
- 		__raw_i915_write32(dev_priv, FPGA_DBG, FPGA_DBG_RM_NOCLAIM);
-@@ -334,8 +337,7 @@ hsw_unclaimed_reg_clear(struct drm_i915_private *dev_priv, u32 reg)
- static void
- hsw_unclaimed_reg_check(struct drm_i915_private *dev_priv, u32 reg)
- {
--	if (HAS_FPGA_DBG_UNCLAIMED(dev_priv->dev) &&
--	    (__raw_i915_read32(dev_priv, FPGA_DBG) & FPGA_DBG_RM_NOCLAIM)) {
-+	if (__raw_i915_read32(dev_priv, FPGA_DBG) & FPGA_DBG_RM_NOCLAIM) {
- 		DRM_ERROR("Unclaimed write to %x\n", reg);
- 		__raw_i915_write32(dev_priv, FPGA_DBG, FPGA_DBG_RM_NOCLAIM);
- 	}
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1052-drm-i915-Keep-intel_drv.h-tidy.patch b/patches.baytrail/1052-drm-i915-Keep-intel_drv.h-tidy.patch
deleted file mode 100644
index ffdbee65860e0..0000000000000
--- a/patches.baytrail/1052-drm-i915-Keep-intel_drv.h-tidy.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From 4db4ddef68497295e271a011431ba714689cb762 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Tue, 8 Oct 2013 19:39:29 +0200
-Subject: drm/i915: Keep intel_drv.h tidy
-
-Something already got misplaced (although it's from a patch from
-before Paulo's cleanup). Move it to the right spot.
-
-v2: Remove the line to keep a neat block, requested by Paulo.
-
-Reported-by: Paulo Zanoni <przanoni@gmail.com>
-Cc: Paulo Zanoni <przanoni@gmail.com>
-Reviewed-by: Paulo Zanoni <przanoni@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 076e29f225bb7a5d97fa95b78b8dca61599b4198)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_drv.h | 5 ++---
- 1 file changed, 2 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index dea20ce65e59..ce80289de69e 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -801,6 +801,8 @@ void intel_enable_gt_powersave(struct drm_device *dev);
- void intel_disable_gt_powersave(struct drm_device *dev);
- void ironlake_teardown_rc6(struct drm_device *dev);
- void gen6_update_ring_freq(struct drm_device *dev);
-+void gen6_rps_idle(struct drm_i915_private *dev_priv);
-+void gen6_rps_boost(struct drm_i915_private *dev_priv);
- void intel_aux_display_runtime_get(struct drm_i915_private *dev_priv);
- void intel_aux_display_runtime_put(struct drm_i915_private *dev_priv);
- 
-@@ -824,7 +826,4 @@ int intel_sprite_get_colorkey(struct drm_device *dev, void *data,
- /* intel_tv.c */
- void intel_tv_init(struct drm_device *dev);
- 
--void gen6_rps_idle(struct drm_i915_private *dev_priv);
--void gen6_rps_boost(struct drm_i915_private *dev_priv);
--
- #endif /* __INTEL_DRV_H__ */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1053-drm-i915-wait-for-IPS_ENABLE-when-enabling-IPS.patch b/patches.baytrail/1053-drm-i915-wait-for-IPS_ENABLE-when-enabling-IPS.patch
deleted file mode 100644
index a3255ec965858..0000000000000
--- a/patches.baytrail/1053-drm-i915-wait-for-IPS_ENABLE-when-enabling-IPS.patch
+++ /dev/null
@@ -1,51 +0,0 @@
-From 57f85874d565b7a4fe62c748c033e91a91743a11 Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Thu, 19 Sep 2013 17:03:06 -0300
-Subject: drm/i915: wait for IPS_ENABLE when enabling IPS
-
-At the end of haswell_crtc_enable we have an intel_wait_for_vblank
-with a big comment, and the message suggests it's a workaround for
-something we don't really understand. So I removed that wait and
-started getting HW state readout error messages saying that the IPS
-state is not what we expected.
-
-I investigated and concluded that after you write IPS_ENABLE to
-IPS_CTL, the bit will only actually become 1 on the next vblank. So
-add code to wait for the IPS_ENABLE bit. We don't really need this
-wait right now due to the wait I already mentioned, but at least this
-one has a reason to be there, while the other one is just to
-workaround some problem: we may remove it in the future.
-
-The wait also acts as a POSTING_READ which we missed.
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 5ade2c2f5813733f23bbb2f21e8ba5c3f8474a2b)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 8 ++++++++
- 1 file changed, 8 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 3bd2dc39cfc0..6418b8aa95a9 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -3346,6 +3346,14 @@ void hsw_enable_ips(struct intel_crtc *crtc)
- 	 * for a vblank, so all we need to do here is to enable the IPS bit. */
- 	assert_plane_enabled(dev_priv, crtc->plane);
- 	I915_WRITE(IPS_CTL, IPS_ENABLE);
-+
-+	/* The bit only becomes 1 in the next vblank, so this wait here is
-+	 * essentially intel_wait_for_vblank. If we don't have this and don't
-+	 * wait for vblanks until the end of crtc_enable, then the HW state
-+	 * readout code will complain that the expected IPS_CTL value is not the
-+	 * one we read. */
-+	if (wait_for(I915_READ_NOTRACE(IPS_CTL) & IPS_ENABLE, 50))
-+		DRM_ERROR("Timed out waiting for IPS enable\n");
- }
- 
- void hsw_disable_ips(struct intel_crtc *crtc)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1054-drm-i915-Do-PCH-and-uncore-init-earlier.patch b/patches.baytrail/1054-drm-i915-Do-PCH-and-uncore-init-earlier.patch
deleted file mode 100644
index e8b382266ef6f..0000000000000
--- a/patches.baytrail/1054-drm-i915-Do-PCH-and-uncore-init-earlier.patch
+++ /dev/null
@@ -1,57 +0,0 @@
-From d532f0c3d2819f96e207929700f269c64a3e795f Mon Sep 17 00:00:00 2001
-From: Ben Widawsky <benjamin.widawsky@intel.com>
-Date: Tue, 8 Oct 2013 16:31:03 -0700
-Subject: drm/i915: Do PCH and uncore init earlier
-
-For future platforms we'll need to initialize our MMIO function pointers
-even earlier. Specifically, we'll need to be able to have register
-reads/writes at GTT initialization (in i915_gem_gtt_init). Similarly,
-these platforms also have MMIO differences based on the PCH id, so
-while moving stuff around, also move the PCH initialization.
-
-CC: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-[danvet: Mention the function where we need register access.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit c3d685a7a5cd9f18865a717468d2b02092dcefdd)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_dma.c |   10 ++++++----
- 1 file changed, 6 insertions(+), 4 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_dma.c
-+++ b/drivers/gpu/drm/i915/i915_dma.c
-@@ -1550,6 +1550,11 @@ int i915_driver_load(struct drm_device *
- 
- 	intel_uncore_early_sanitize(dev);
- 
-+	/* This must be called before any calls to HAS_PCH_* */
-+	intel_detect_pch(dev);
-+
-+	intel_uncore_init(dev);
-+
- 	ret = i915_gem_gtt_init(dev);
- 	if (ret)
- 		goto out_regs;
-@@ -1607,12 +1612,8 @@ int i915_driver_load(struct drm_device *
- 		goto out_mtrrfree;
- 	}
- 
--	/* This must be called before any calls to HAS_PCH_* */
--	intel_detect_pch(dev);
--
- 	intel_irq_init(dev);
- 	intel_pm_init(dev);
--	intel_uncore_init(dev);
- 	intel_uncore_sanitize(dev);
- 
- 	/* Try to make sure MCHBAR is enabled before poking at it */
-@@ -1698,6 +1699,7 @@ out_gtt:
- 	drm_mm_takedown(&dev_priv->gtt.base.mm);
- 	dev_priv->gtt.base.cleanup(&dev_priv->gtt.base);
- out_regs:
-+	intel_uncore_fini(dev);
- 	pci_iounmap(dev->pdev, dev_priv->regs);
- put_bridge:
- 	pci_dev_put(dev_priv->bridge_dev);
diff --git a/patches.baytrail/1055-drm-i915-dp-update-training-set-in-a-burst-write-wit.patch b/patches.baytrail/1055-drm-i915-dp-update-training-set-in-a-burst-write-wit.patch
deleted file mode 100644
index c833ed6a5496d..0000000000000
--- a/patches.baytrail/1055-drm-i915-dp-update-training-set-in-a-burst-write-wit.patch
+++ /dev/null
@@ -1,73 +0,0 @@
-From 7ee3a44dffd9918e9d2792fd3f2d063218b7442f Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Fri, 4 Oct 2013 15:08:48 +0300
-Subject: drm/i915/dp: update training set in a burst write with training
- pattern set
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The DP spec allows this, and requires it when full link training is
-started with non-minimum voltage swing and/or non-zero pre-emphasis.
-
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 2cdfe6c8efb9d7dab577d610b6cdab198482cec1)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_dp.c | 28 ++++++++++++++--------------
- 1 file changed, 14 insertions(+), 14 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
-index 377014783e74..bee09e16725c 100644
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -2297,7 +2297,8 @@ intel_dp_set_link_train(struct intel_dp *intel_dp,
- 	struct drm_device *dev = intel_dig_port->base.base.dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	enum port port = intel_dig_port->port;
--	int ret;
-+	uint8_t buf[sizeof(intel_dp->train_set) + 1];
-+	int ret, len;
- 
- 	if (HAS_DDI(dev)) {
- 		uint32_t temp = I915_READ(DP_TP_CTL(port));
-@@ -2367,22 +2368,21 @@ intel_dp_set_link_train(struct intel_dp *intel_dp,
- 	I915_WRITE(intel_dp->output_reg, *DP);
- 	POSTING_READ(intel_dp->output_reg);
- 
--	ret = intel_dp_aux_native_write_1(intel_dp, DP_TRAINING_PATTERN_SET,
--					  dp_train_pat);
--	if (ret != 1)
--		return false;
--
--	if ((dp_train_pat & DP_TRAINING_PATTERN_MASK) !=
-+	buf[0] = dp_train_pat;
-+	if ((dp_train_pat & DP_TRAINING_PATTERN_MASK) ==
- 	    DP_TRAINING_PATTERN_DISABLE) {
--		ret = intel_dp_aux_native_write(intel_dp,
--						DP_TRAINING_LANE0_SET,
--						intel_dp->train_set,
--						intel_dp->lane_count);
--		if (ret != intel_dp->lane_count)
--			return false;
-+		/* don't write DP_TRAINING_LANEx_SET on disable */
-+		len = 1;
-+	} else {
-+		/* DP_TRAINING_LANEx_SET follow DP_TRAINING_PATTERN_SET */
-+		memcpy(buf + 1, intel_dp->train_set, intel_dp->lane_count);
-+		len = intel_dp->lane_count + 1;
- 	}
- 
--	return true;
-+	ret = intel_dp_aux_native_write(intel_dp, DP_TRAINING_PATTERN_SET,
-+					buf, len);
-+
-+	return ret == len;
- }
- 
- static bool
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1056-drm-i915-don-t-leak-dp_connector-at-intel_ddi_init.patch b/patches.baytrail/1056-drm-i915-don-t-leak-dp_connector-at-intel_ddi_init.patch
deleted file mode 100644
index 4331bc7994123..0000000000000
--- a/patches.baytrail/1056-drm-i915-don-t-leak-dp_connector-at-intel_ddi_init.patch
+++ /dev/null
@@ -1,120 +0,0 @@
-From 05461ea49e36f0158a4985672f5d4f56cb2c26b9 Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Wed, 9 Oct 2013 13:52:36 -0300
-Subject: drm/i915: don't leak dp_connector at intel_ddi_init
-
-Regression introduced by:
-    commit 311a20949f047a70935d6591010f42336f5402e7
-    Author: Paulo Zanoni <paulo.r.zanoni@intel.com>
-        drm/i915: don't init DP or HDMI when not supported by DDI port
-
-Since the commit above it is possible to have a DDI encoder that has
-the HDMI connector but not the DP connector (in case the port doesn't
-support DP). In this case, we must properly free the DP connector.
-
-We just leak this once, so it's not a big deal.
-
-Reported by kmemleak.
-
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 4a28ae58c0abad2d45a45db21e86c7166b2b4462)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_ddi.c |   62 ++++++++++++++++++++++++++-------------
- 1 file changed, 42 insertions(+), 20 deletions(-)
-
---- a/drivers/gpu/drm/i915/intel_ddi.c
-+++ b/drivers/gpu/drm/i915/intel_ddi.c
-@@ -1351,6 +1351,41 @@ static const struct drm_encoder_funcs in
- 	.destroy = intel_ddi_destroy,
- };
- 
-+static struct intel_connector *
-+intel_ddi_init_dp_connector(struct intel_digital_port *intel_dig_port)
-+{
-+	struct intel_connector *connector;
-+	enum port port = intel_dig_port->port;
-+
-+	connector = kzalloc(sizeof(*connector), GFP_KERNEL);
-+	if (!connector)
-+		return NULL;
-+
-+	intel_dig_port->dp.output_reg = DDI_BUF_CTL(port);
-+	if (!intel_dp_init_connector(intel_dig_port, connector)) {
-+		kfree(connector);
-+		return NULL;
-+	}
-+
-+	return connector;
-+}
-+
-+static struct intel_connector *
-+intel_ddi_init_hdmi_connector(struct intel_digital_port *intel_dig_port)
-+{
-+	struct intel_connector *connector;
-+	enum port port = intel_dig_port->port;
-+
-+	connector = kzalloc(sizeof(*connector), GFP_KERNEL);
-+	if (!connector)
-+		return NULL;
-+
-+	intel_dig_port->hdmi.hdmi_reg = DDI_BUF_CTL(port);
-+	intel_hdmi_init_connector(intel_dig_port, connector);
-+
-+	return connector;
-+}
-+
- void intel_ddi_init(struct drm_device *dev, enum port port)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
-@@ -1375,12 +1410,6 @@ void intel_ddi_init(struct drm_device *d
- 	if (!intel_dig_port)
- 		return;
- 
--	dp_connector = kzalloc(sizeof(*dp_connector), GFP_KERNEL);
--	if (!dp_connector) {
--		kfree(intel_dig_port);
--		return;
--	}
--
- 	intel_encoder = &intel_dig_port->base;
- 	encoder = &intel_encoder->base;
- 
-@@ -1400,29 +1429,22 @@ void intel_ddi_init(struct drm_device *d
- 	intel_dig_port->saved_port_bits = I915_READ(DDI_BUF_CTL(port)) &
- 					  (DDI_BUF_PORT_REVERSAL |
- 					   DDI_A_4_LANES);
--	intel_dig_port->dp.output_reg = DDI_BUF_CTL(port);
- 
- 	intel_encoder->type = INTEL_OUTPUT_UNKNOWN;
- 	intel_encoder->crtc_mask =  (1 << 0) | (1 << 1) | (1 << 2);
- 	intel_encoder->cloneable = false;
- 	intel_encoder->hot_plug = intel_ddi_hot_plug;
- 
--	if (init_dp && !intel_dp_init_connector(intel_dig_port, dp_connector)) {
--		drm_encoder_cleanup(encoder);
--		kfree(intel_dig_port);
--		kfree(dp_connector);
--		return;
--	}
-+	if (init_dp)
-+		dp_connector = intel_ddi_init_dp_connector(intel_dig_port);
- 
- 	/* In theory we don't need the encoder->type check, but leave it just in
- 	 * case we have some really bad VBTs... */
--	if (intel_encoder->type != INTEL_OUTPUT_EDP && init_hdmi) {
--		hdmi_connector = kzalloc(sizeof(*hdmi_connector),
--					 GFP_KERNEL);
--		if (!hdmi_connector)
--			return;
-+	if (intel_encoder->type != INTEL_OUTPUT_EDP && init_hdmi)
-+		hdmi_connector = intel_ddi_init_hdmi_connector(intel_dig_port);
- 
--		intel_dig_port->hdmi.hdmi_reg = DDI_BUF_CTL(port);
--		intel_hdmi_init_connector(intel_dig_port, hdmi_connector);
-+	if (!dp_connector && !hdmi_connector) {
-+		drm_encoder_cleanup(encoder);
-+		kfree(intel_dig_port);
- 	}
- }
diff --git a/patches.baytrail/1057-drm-i915-Populate-primary_disabled-in-intel_modeset_.patch b/patches.baytrail/1057-drm-i915-Populate-primary_disabled-in-intel_modeset_.patch
deleted file mode 100644
index d3f82abdb75d1..0000000000000
--- a/patches.baytrail/1057-drm-i915-Populate-primary_disabled-in-intel_modeset_.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From 786bc7accde8725dbfdb438ef2d90f94c69e0b8a Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Wed, 9 Oct 2013 17:24:57 +0300
-Subject: drm/i915: Populate primary_disabled in
- intel_modeset_readout_hw_state()
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Make sure our primary_disabled matches our expectations after driver
-init.
-
-Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=70270
-Tested-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Tested-by: shui yangwei <yangweix.shui@intel.com>
-Reviewed-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit e5b611fd4493d09eb5164f5244ac0a5325346895)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 6418b8aa95a9..bae0a6ab2f27 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -10706,6 +10706,7 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev)
- 								 &crtc->config);
- 
- 		crtc->base.enabled = crtc->active;
-+		crtc->primary_disabled = !crtc->active;
- 
- 		DRM_DEBUG_KMS("[CRTC:%d] hw state readout: %s\n",
- 			      crtc->base.base.id,
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1058-drm-i915-Rename-primary_disabled-to-primary_enabled.patch b/patches.baytrail/1058-drm-i915-Rename-primary_disabled-to-primary_enabled.patch
deleted file mode 100644
index f6bfe1737c94c..0000000000000
--- a/patches.baytrail/1058-drm-i915-Rename-primary_disabled-to-primary_enabled.patch
+++ /dev/null
@@ -1,118 +0,0 @@
-From 04d2d395137801b9ed76fe5c92ac2791986f9fb7 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Wed, 9 Oct 2013 17:24:58 +0300
-Subject: drm/i915: Rename primary_disabled to primary_enabled
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Let's try to avoid these confusing negated booleans.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 4c445e0ebc648ee42c0d21713b8f76597854d47a)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 10 +++++-----
- drivers/gpu/drm/i915/intel_drv.h     |  2 +-
- drivers/gpu/drm/i915/intel_pm.c      |  2 +-
- drivers/gpu/drm/i915/intel_sprite.c  |  8 ++++----
- 4 files changed, 11 insertions(+), 11 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index bae0a6ab2f27..2d27f753fac9 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -1840,9 +1840,9 @@ static void intel_enable_primary_plane(struct drm_i915_private *dev_priv,
- 	/* If the pipe isn't enabled, we can't pump pixels and may hang */
- 	assert_pipe_enabled(dev_priv, pipe);
- 
--	WARN(!intel_crtc->primary_disabled, "Primary plane already enabled\n");
-+	WARN(intel_crtc->primary_enabled, "Primary plane already enabled\n");
- 
--	intel_crtc->primary_disabled = false;
-+	intel_crtc->primary_enabled = true;
- 
- 	reg = DSPCNTR(plane);
- 	val = I915_READ(reg);
-@@ -1870,9 +1870,9 @@ static void intel_disable_primary_plane(struct drm_i915_private *dev_priv,
- 	int reg;
- 	u32 val;
- 
--	WARN(intel_crtc->primary_disabled, "Primary plane already disabled\n");
-+	WARN(!intel_crtc->primary_enabled, "Primary plane already disabled\n");
- 
--	intel_crtc->primary_disabled = true;
-+	intel_crtc->primary_enabled = false;
- 
- 	reg = DSPCNTR(plane);
- 	val = I915_READ(reg);
-@@ -10706,7 +10706,7 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev)
- 								 &crtc->config);
- 
- 		crtc->base.enabled = crtc->active;
--		crtc->primary_disabled = !crtc->active;
-+		crtc->primary_enabled = crtc->active;
- 
- 		DRM_DEBUG_KMS("[CRTC:%d] hw state readout: %s\n",
- 			      crtc->base.base.id,
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index ce80289de69e..b497a96af082 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -321,7 +321,7 @@ struct intel_crtc {
- 	 */
- 	bool active;
- 	bool eld_vld;
--	bool primary_disabled; /* is the crtc obscured by a plane? */
-+	bool primary_enabled; /* is the primary plane (partially) visible? */
- 	bool lowfreq_avail;
- 	struct intel_overlay *overlay;
- 	struct intel_unpin_work *unpin_work;
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 9534e72fdbcb..c91087a542ec 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -475,7 +475,7 @@ void intel_update_fbc(struct drm_device *dev)
- 	 */
- 	list_for_each_entry(tmp_crtc, &dev->mode_config.crtc_list, head) {
- 		if (intel_crtc_active(tmp_crtc) &&
--		    !to_intel_crtc(tmp_crtc)->primary_disabled) {
-+		    to_intel_crtc(tmp_crtc)->primary_enabled) {
- 			if (crtc) {
- 				if (set_no_fbc_reason(dev_priv, FBC_MULTIPLE_PIPES))
- 					DRM_DEBUG_KMS("more than one pipe active, disabling compression\n");
-diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
-index e001d2c35c39..8afaad6bcc48 100644
---- a/drivers/gpu/drm/i915/intel_sprite.c
-+++ b/drivers/gpu/drm/i915/intel_sprite.c
-@@ -521,10 +521,10 @@ intel_enable_primary(struct drm_crtc *crtc)
- 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
- 	int reg = DSPCNTR(intel_crtc->plane);
- 
--	if (!intel_crtc->primary_disabled)
-+	if (intel_crtc->primary_enabled)
- 		return;
- 
--	intel_crtc->primary_disabled = false;
-+	intel_crtc->primary_enabled = true;
- 
- 	I915_WRITE(reg, I915_READ(reg) | DISPLAY_PLANE_ENABLE);
- 	intel_flush_primary_plane(dev_priv, intel_crtc->plane);
-@@ -553,10 +553,10 @@ intel_disable_primary(struct drm_crtc *crtc)
- 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
- 	int reg = DSPCNTR(intel_crtc->plane);
- 
--	if (intel_crtc->primary_disabled)
-+	if (!intel_crtc->primary_enabled)
- 		return;
- 
--	intel_crtc->primary_disabled = true;
-+	intel_crtc->primary_enabled = false;
- 
- 	mutex_lock(&dev->struct_mutex);
- 	if (dev_priv->fbc.plane == intel_crtc->plane)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1059-drm-i915-Capture-the-initial-error-state-when-kickin.patch b/patches.baytrail/1059-drm-i915-Capture-the-initial-error-state-when-kickin.patch
deleted file mode 100644
index 7ce194a6ab2a0..0000000000000
--- a/patches.baytrail/1059-drm-i915-Capture-the-initial-error-state-when-kickin.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-From 05c1ad4a1ffc45a2435aa76fea45fe6529e8ad96 Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Thu, 10 Oct 2013 09:37:19 +0100
-Subject: drm/i915: Capture the initial error-state when kicking stuck rings
-
-We lost the ability to capture the first error for a stuck ring in the
-recent hangcheck robustification. Whilst both error states are
-interesting (why does the GPU not recover is also essential to debug),
-our primary goal is to fix the initial hang and so we need to capture
-the first error state upon taking hangcheck action.
-
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 09e14bf3ba4b72be4d57d99e3620beae4fb1ecd8)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index 418ad642c742..36279202ddc0 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -1988,6 +1988,7 @@ ring_stuck(struct intel_ring_buffer *ring, u32 acthd)
- 	if (tmp & RING_WAIT) {
- 		DRM_ERROR("Kicking stuck wait on %s\n",
- 			  ring->name);
-+		i915_handle_error(dev, false);
- 		I915_WRITE_CTL(ring, tmp);
- 		return HANGCHECK_KICK;
- 	}
-@@ -1999,6 +2000,7 @@ ring_stuck(struct intel_ring_buffer *ring, u32 acthd)
- 		case 1:
- 			DRM_ERROR("Kicking stuck semaphore on %s\n",
- 				  ring->name);
-+			i915_handle_error(dev, false);
- 			I915_WRITE_CTL(ring, tmp);
- 			return HANGCHECK_KICK;
- 		case 0:
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1060-drm-i915-Finish-enabling-rps-before-use-by-sysfs-or-.patch b/patches.baytrail/1060-drm-i915-Finish-enabling-rps-before-use-by-sysfs-or-.patch
deleted file mode 100644
index a198fc7819445..0000000000000
--- a/patches.baytrail/1060-drm-i915-Finish-enabling-rps-before-use-by-sysfs-or-.patch
+++ /dev/null
@@ -1,136 +0,0 @@
-From d6c21fb4d76bd344d63f5a23dedae69a48ecde91 Mon Sep 17 00:00:00 2001
-From: Tom O'Rourke <Tom.O'Rourke@intel.com>
-Date: Mon, 16 Sep 2013 14:56:43 -0700
-Subject: drm/i915: Finish enabling rps before use by sysfs or debugfs
-
-Enabling rps (turbo setup) was put in a work queue because it may
-take quite awhile.  This change flushes the work queue to initialize
-rps values before use by sysfs or debugfs.  Specifically,
-rps.delayed_resume_work is flushed before using rps.hw_max,
-rps.max_delay, rps.min_delay, or rps.cur_delay.
-
-This change fixes a problem in sysfs where show functions using
-uninitialized values show incorrect values and store functions
-using uninitialized values in range checks incorrectly fail to
-store valid input values.  This change also addresses similar use
-before initialized problems in debugfs.
-
-Signed-off-by: Tom O'Rourke <Tom.O'Rourke@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 5c9669cee534cbb834d51aae115267f5e561b622)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_debugfs.c | 12 ++++++++++++
- drivers/gpu/drm/i915/i915_sysfs.c   | 10 ++++++++++
- 2 files changed, 22 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
-index 5fd6a5db6eb5..a569597125db 100644
---- a/drivers/gpu/drm/i915/i915_debugfs.c
-+++ b/drivers/gpu/drm/i915/i915_debugfs.c
-@@ -847,6 +847,8 @@ static int i915_cur_delayinfo(struct seq_file *m, void *unused)
- 	drm_i915_private_t *dev_priv = dev->dev_private;
- 	int ret;
- 
-+	flush_delayed_work(&dev_priv->rps.delayed_resume_work);
-+
- 	if (IS_GEN5(dev)) {
- 		u16 rgvswctl = I915_READ16(MEMSWCTL);
- 		u16 rgvstat = I915_READ16(MEMSTAT_ILK);
-@@ -1325,6 +1327,8 @@ static int i915_ring_freq_table(struct seq_file *m, void *unused)
- 		return 0;
- 	}
- 
-+	flush_delayed_work(&dev_priv->rps.delayed_resume_work);
-+
- 	ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
- 	if (ret)
- 		return ret;
-@@ -1940,6 +1944,8 @@ i915_max_freq_get(void *data, u64 *val)
- 	if (!(IS_GEN6(dev) || IS_GEN7(dev)))
- 		return -ENODEV;
- 
-+	flush_delayed_work(&dev_priv->rps.delayed_resume_work);
-+
- 	ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
- 	if (ret)
- 		return ret;
-@@ -1964,6 +1970,8 @@ i915_max_freq_set(void *data, u64 val)
- 	if (!(IS_GEN6(dev) || IS_GEN7(dev)))
- 		return -ENODEV;
- 
-+	flush_delayed_work(&dev_priv->rps.delayed_resume_work);
-+
- 	DRM_DEBUG_DRIVER("Manually setting max freq to %llu\n", val);
- 
- 	ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
-@@ -2002,6 +2010,8 @@ i915_min_freq_get(void *data, u64 *val)
- 	if (!(IS_GEN6(dev) || IS_GEN7(dev)))
- 		return -ENODEV;
- 
-+	flush_delayed_work(&dev_priv->rps.delayed_resume_work);
-+
- 	ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
- 	if (ret)
- 		return ret;
-@@ -2026,6 +2036,8 @@ i915_min_freq_set(void *data, u64 val)
- 	if (!(IS_GEN6(dev) || IS_GEN7(dev)))
- 		return -ENODEV;
- 
-+	flush_delayed_work(&dev_priv->rps.delayed_resume_work);
-+
- 	DRM_DEBUG_DRIVER("Manually setting min freq to %llu\n", val);
- 
- 	ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
-diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c
-index 8003886361b8..9ff1e4d96909 100644
---- a/drivers/gpu/drm/i915/i915_sysfs.c
-+++ b/drivers/gpu/drm/i915/i915_sysfs.c
-@@ -251,6 +251,8 @@ static ssize_t gt_cur_freq_mhz_show(struct device *kdev,
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	int ret;
- 
-+	flush_delayed_work(&dev_priv->rps.delayed_resume_work);
-+
- 	mutex_lock(&dev_priv->rps.hw_lock);
- 	if (IS_VALLEYVIEW(dev_priv->dev)) {
- 		u32 freq;
-@@ -283,6 +285,8 @@ static ssize_t gt_max_freq_mhz_show(struct device *kdev, struct device_attribute
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	int ret;
- 
-+	flush_delayed_work(&dev_priv->rps.delayed_resume_work);
-+
- 	mutex_lock(&dev_priv->rps.hw_lock);
- 	if (IS_VALLEYVIEW(dev_priv->dev))
- 		ret = vlv_gpu_freq(dev_priv->mem_freq, dev_priv->rps.max_delay);
-@@ -307,6 +311,8 @@ static ssize_t gt_max_freq_mhz_store(struct device *kdev,
- 	if (ret)
- 		return ret;
- 
-+	flush_delayed_work(&dev_priv->rps.delayed_resume_work);
-+
- 	mutex_lock(&dev_priv->rps.hw_lock);
- 
- 	if (IS_VALLEYVIEW(dev_priv->dev)) {
-@@ -355,6 +361,8 @@ static ssize_t gt_min_freq_mhz_show(struct device *kdev, struct device_attribute
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	int ret;
- 
-+	flush_delayed_work(&dev_priv->rps.delayed_resume_work);
-+
- 	mutex_lock(&dev_priv->rps.hw_lock);
- 	if (IS_VALLEYVIEW(dev_priv->dev))
- 		ret = vlv_gpu_freq(dev_priv->mem_freq, dev_priv->rps.min_delay);
-@@ -379,6 +387,8 @@ static ssize_t gt_min_freq_mhz_store(struct device *kdev,
- 	if (ret)
- 		return ret;
- 
-+	flush_delayed_work(&dev_priv->rps.delayed_resume_work);
-+
- 	mutex_lock(&dev_priv->rps.hw_lock);
- 
- 	if (IS_VALLEYVIEW(dev)) {
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1061-drm-i915-Educate-users-in-dmesg-about-reporting-gpu-.patch b/patches.baytrail/1061-drm-i915-Educate-users-in-dmesg-about-reporting-gpu-.patch
deleted file mode 100644
index dc8a0c4fff807..0000000000000
--- a/patches.baytrail/1061-drm-i915-Educate-users-in-dmesg-about-reporting-gpu-.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From 47ff2a2d8646fa49f3ab84d7aa09130b163d8bd1 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Wed, 9 Oct 2013 19:22:22 +0200
-Subject: drm/i915: Educate users in dmesg about reporting gpu hangs
-
-Untangling me-too reports that actually aren't is really messy. And we
-need to make sure the blame is put where it should be right from the
-start ;-)
-
-v2: Improve the wording from Ben's suggestions.
-
-Cc: Ben Widawsky <ben@bwidawsk.net>
-Acked-by: Ben Widawsky <ben@bwidawsk.net>
-[danvet: Frob the message as suggested by Paulo on irc.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-
-(cherry picked from commit f468980171fa6293917a8b59bfec71c6616e06c9)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_gpu_error.c | 8 ++++++--
- 1 file changed, 6 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
-index 915c8ca08969..5dde81026471 100644
---- a/drivers/gpu/drm/i915/i915_gpu_error.c
-+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
-@@ -910,8 +910,12 @@ void i915_capture_error_state(struct drm_device *dev)
- 		return;
- 	}
- 
--	DRM_INFO("capturing error event; look for more information in "
--		 "/sys/class/drm/card%d/error\n", dev->primary->index);
-+	DRM_INFO("GPU crash dump saved to /sys/class/drm/card%d/error\n",
-+		 dev->primary->index);
-+	DRM_INFO("GPU hangs can indicate a bug anywhere in the entire gfx stack, including userspace.\n");
-+	DRM_INFO("Please file a _new_ bug report on bugs.freedesktop.org against DRI -> DRM/Intel\n");
-+	DRM_INFO("drm/i915 developers can then reassign to the right component if it's not a kernel issue.\n");
-+	DRM_INFO("The gpu crash dump is required to analyze gpu hangs, so please always attach it.\n");
- 
- 	kref_init(&error->ref);
- 	error->eir = I915_READ(EIR);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1062-drm-i915-tell-the-user-KMS-is-required-for-gen6.patch b/patches.baytrail/1062-drm-i915-tell-the-user-KMS-is-required-for-gen6.patch
deleted file mode 100644
index 1318ab1d09f8b..0000000000000
--- a/patches.baytrail/1062-drm-i915-tell-the-user-KMS-is-required-for-gen6.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From 4e2818d2675e13f5f531e009758cb6ca60de61a6 Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Thu, 10 Oct 2013 15:25:37 +0300
-Subject: drm/i915: tell the user KMS is required for gen6+
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Educate the users why i915 won't load on gen6+ and nomodeset.
-
-Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=61671
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit e147accbd19f55489dabdcc4dc3551cc3e3f2553)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_dma.c |    5 ++++-
- 1 file changed, 4 insertions(+), 1 deletion(-)
-
---- a/drivers/gpu/drm/i915/i915_dma.c
-+++ b/drivers/gpu/drm/i915/i915_dma.c
-@@ -1485,8 +1485,11 @@ int i915_driver_load(struct drm_device *
- 	info = (struct intel_device_info *) flags;
- 
- 	/* Refuse to load on gen6+ without kms enabled. */
--	if (info->gen >= 6 && !drm_core_check_feature(dev, DRIVER_MODESET))
-+	if (info->gen >= 6 && !drm_core_check_feature(dev, DRIVER_MODESET)) {
-+		DRM_INFO("Your hardware requires kernel modesetting (KMS)\n");
-+		DRM_INFO("See CONFIG_DRM_I915_KMS, nomodeset, and i915.modeset parameters\n");
- 		return -ENODEV;
-+	}
- 
- 	dev_priv = kzalloc(sizeof(*dev_priv), GFP_KERNEL);
- 	if (dev_priv == NULL)
diff --git a/patches.baytrail/1063-drm-i915-Avoid-tweaking-RPS-before-it-is-enabled.patch b/patches.baytrail/1063-drm-i915-Avoid-tweaking-RPS-before-it-is-enabled.patch
deleted file mode 100644
index 2ddf0fbb121e3..0000000000000
--- a/patches.baytrail/1063-drm-i915-Avoid-tweaking-RPS-before-it-is-enabled.patch
+++ /dev/null
@@ -1,96 +0,0 @@
-From e78b82e60828107c050bd8f04cbf68590cc50dcd Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Thu, 10 Oct 2013 21:58:50 +0100
-Subject: drm/i915: Avoid tweaking RPS before it is enabled
-
-As we delay the initial RPS enabling (upon boot and after resume), there
-is a chance that we may start to render and trigger RPS boosts before we
-set up the punit. Any changes we make could result in inconsistent
-hardware state, with a danger of causing undefined behaviour. However,
-as the boosting is a optional tweak to RPS, we can simply ignore it
-whilst RPS is not yet enabled.
-
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
-Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
-Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit c0951f0c97bc1528262a92b193fed7942cc6c54c)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h |  1 +
- drivers/gpu/drm/i915/intel_pm.c | 26 ++++++++++++++++----------
- 2 files changed, 17 insertions(+), 10 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 0c1f8a4e3734..bdedebed44dd 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -862,6 +862,7 @@ struct intel_gen6_power_mgmt {
- 	int last_adj;
- 	enum { LOW_POWER, BETWEEN, HIGH_POWER } power;
- 
-+	bool enabled;
- 	struct delayed_work delayed_resume_work;
- 
- 	/*
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index c91087a542ec..ca3dd566974a 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -3442,22 +3442,26 @@ void gen6_set_rps(struct drm_device *dev, u8 val)
- void gen6_rps_idle(struct drm_i915_private *dev_priv)
- {
- 	mutex_lock(&dev_priv->rps.hw_lock);
--	if (dev_priv->info->is_valleyview)
--		valleyview_set_rps(dev_priv->dev, dev_priv->rps.min_delay);
--	else
--		gen6_set_rps(dev_priv->dev, dev_priv->rps.min_delay);
--	dev_priv->rps.last_adj = 0;
-+	if (dev_priv->rps.enabled) {
-+		if (dev_priv->info->is_valleyview)
-+			valleyview_set_rps(dev_priv->dev, dev_priv->rps.min_delay);
-+		else
-+			gen6_set_rps(dev_priv->dev, dev_priv->rps.min_delay);
-+		dev_priv->rps.last_adj = 0;
-+	}
- 	mutex_unlock(&dev_priv->rps.hw_lock);
- }
- 
- void gen6_rps_boost(struct drm_i915_private *dev_priv)
- {
- 	mutex_lock(&dev_priv->rps.hw_lock);
--	if (dev_priv->info->is_valleyview)
--		valleyview_set_rps(dev_priv->dev, dev_priv->rps.max_delay);
--	else
--		gen6_set_rps(dev_priv->dev, dev_priv->rps.max_delay);
--	dev_priv->rps.last_adj = 0;
-+	if (dev_priv->rps.enabled) {
-+		if (dev_priv->info->is_valleyview)
-+			valleyview_set_rps(dev_priv->dev, dev_priv->rps.max_delay);
-+		else
-+			gen6_set_rps(dev_priv->dev, dev_priv->rps.max_delay);
-+		dev_priv->rps.last_adj = 0;
-+	}
- 	mutex_unlock(&dev_priv->rps.hw_lock);
- }
- 
-@@ -4716,6 +4720,7 @@ void intel_disable_gt_powersave(struct drm_device *dev)
- 			valleyview_disable_rps(dev);
- 		else
- 			gen6_disable_rps(dev);
-+		dev_priv->rps.enabled = false;
- 		mutex_unlock(&dev_priv->rps.hw_lock);
- 	}
- }
-@@ -4735,6 +4740,7 @@ static void intel_gen6_powersave_work(struct work_struct *work)
- 		gen6_enable_rps(dev);
- 		gen6_update_ring_freq(dev);
- 	}
-+	dev_priv->rps.enabled = true;
- 	mutex_unlock(&dev_priv->rps.hw_lock);
- }
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1064-drm-i915-increase-the-SWSCI-DSLP-default-timeout-to-.patch b/patches.baytrail/1064-drm-i915-increase-the-SWSCI-DSLP-default-timeout-to-.patch
deleted file mode 100644
index 1cb706ff98f4b..0000000000000
--- a/patches.baytrail/1064-drm-i915-increase-the-SWSCI-DSLP-default-timeout-to-.patch
+++ /dev/null
@@ -1,48 +0,0 @@
-From 684bd44cb76867b67f01db2b4685f91aaf36733e Mon Sep 17 00:00:00 2001
-From: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Date: Wed, 9 Oct 2013 16:39:57 -0300
-Subject: drm/i915: increase the SWSCI DSLP default timeout to 50ms
-
-The spec says the default timeout should be 2ms, but on my machine
-this doesn't seem to be enough. Sometimes it works, sometimes I get
-these messages when booting:
-  - SWSCI request timed out
-  - SWSCI request already in progress
-
-And my guess is that the "already in progress" message is because the
-first one is still happening.
-
-I did some experiments on my machine (that has CONFIG_HZ=1000) and the
-wait_for function usually takes 4-6 jiffies to finish, but I've seen
-up to 9. So increase the timeout to 50ms. We only expect to wait for
-the actual amount of time the operation takes, so even a huge timeout
-shouldn't delay us more than what the hardware actually requires.
-
-Cc: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Reviewed-by: Jani Nikula <jani.nikula@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 4994aa8cc10177f620b096738be52eee8a181a9a)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_opregion.c | 4 +++-
- 1 file changed, 3 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_opregion.c b/drivers/gpu/drm/i915/intel_opregion.c
-index 2acf5cae20e4..904464023c8f 100644
---- a/drivers/gpu/drm/i915/intel_opregion.c
-+++ b/drivers/gpu/drm/i915/intel_opregion.c
-@@ -258,7 +258,9 @@ static int swsci(struct drm_device *dev, u32 function, u32 parm, u32 *parm_out)
- 	/* Driver sleep timeout in ms. */
- 	dslp = ioread32(&swsci->dslp);
- 	if (!dslp) {
--		dslp = 2;
-+		/* The spec says 2ms should be the default, but it's too small
-+		 * for some machines. */
-+		dslp = 50;
- 	} else if (dslp > 500) {
- 		/* Hey bios, trust must be earned. */
- 		WARN_ONCE(1, "excessive driver sleep timeout (DSPL) %u\n", dslp);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1065-drm-i915-Fix-pipe-off-timeout-handling-for-pre-gen4.patch b/patches.baytrail/1065-drm-i915-Fix-pipe-off-timeout-handling-for-pre-gen4.patch
deleted file mode 100644
index df6576c85a15f..0000000000000
--- a/patches.baytrail/1065-drm-i915-Fix-pipe-off-timeout-handling-for-pre-gen4.patch
+++ /dev/null
@@ -1,83 +0,0 @@
-From 023fc0dc1589ca6348756b30a93015a47b0bb9e8 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Fri, 11 Oct 2013 14:21:31 +0300
-Subject: drm/i915: Fix pipe off timeout handling for pre-gen4
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The current pre-gen4 pipe off code might break out of the loop
-due to the timeout, but then the fail to print the warning.
-
-Refactor the code a bit to use wait_for() to avoid the problem,
-and that we also re-check the condition after the timeout has
-expired.
-
-v2: Use wait_for()
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit fbf49ea21bd4f2ed88d678f7fc8b34a7dd0a7460)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 35 ++++++++++++++++++++---------------
- 1 file changed, 20 insertions(+), 15 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 2d27f753fac9..575c154dbd2a 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -800,6 +800,25 @@ void intel_wait_for_vblank(struct drm_device *dev, int pipe)
- 		DRM_DEBUG_KMS("vblank wait timed out\n");
- }
- 
-+static bool pipe_dsl_stopped(struct drm_device *dev, enum pipe pipe)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	u32 reg = PIPEDSL(pipe);
-+	u32 line1, line2;
-+	u32 line_mask;
-+
-+	if (IS_GEN2(dev))
-+		line_mask = DSL_LINEMASK_GEN2;
-+	else
-+		line_mask = DSL_LINEMASK_GEN3;
-+
-+	line1 = I915_READ(reg) & line_mask;
-+	mdelay(5);
-+	line2 = I915_READ(reg) & line_mask;
-+
-+	return line1 == line2;
-+}
-+
- /*
-  * intel_wait_for_pipe_off - wait for pipe to turn off
-  * @dev: drm device
-@@ -831,22 +850,8 @@ void intel_wait_for_pipe_off(struct drm_device *dev, int pipe)
- 			     100))
- 			WARN(1, "pipe_off wait timed out\n");
- 	} else {
--		u32 last_line, line_mask;
--		int reg = PIPEDSL(pipe);
--		unsigned long timeout = jiffies + msecs_to_jiffies(100);
--
--		if (IS_GEN2(dev))
--			line_mask = DSL_LINEMASK_GEN2;
--		else
--			line_mask = DSL_LINEMASK_GEN3;
--
- 		/* Wait for the display line to settle */
--		do {
--			last_line = I915_READ(reg) & line_mask;
--			mdelay(5);
--		} while (((I915_READ(reg) & line_mask) != last_line) &&
--			 time_after(timeout, jiffies));
--		if (time_after(jiffies, timeout))
-+		if (wait_for(pipe_dsl_stopped(dev, pipe), 100))
- 			WARN(1, "pipe_off wait timed out\n");
- 	}
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1066-drm-i915-don-t-save-restore-CACHE_MODE_0-on-gen7.patch b/patches.baytrail/1066-drm-i915-don-t-save-restore-CACHE_MODE_0-on-gen7.patch
deleted file mode 100644
index 03cbedf96f95f..0000000000000
--- a/patches.baytrail/1066-drm-i915-don-t-save-restore-CACHE_MODE_0-on-gen7.patch
+++ /dev/null
@@ -1,45 +0,0 @@
-From fdc8d0de91f1b8406f0d7904cc838c9f9b647ec0 Mon Sep 17 00:00:00 2001
-From: Jesse Barnes <jbarnes@virtuousgeek.org>
-Date: Fri, 11 Oct 2013 12:09:29 -0700
-Subject: drm/i915: don't save/restore CACHE_MODE_0 on gen7+
-
-On gen7+, CACHE_MODE_0 moved, so we're clobbering some other reg rather
-than restoring CACHE_MODE_0.  Don't do that.
-
-Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit e8cde23b4607e19bd079a8173393a0d16aadfe31)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_suspend.c | 7 +++++--
- 1 file changed, 5 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
-index 3538370e3a47..a088f1f46bdb 100644
---- a/drivers/gpu/drm/i915/i915_suspend.c
-+++ b/drivers/gpu/drm/i915/i915_suspend.c
-@@ -369,7 +369,8 @@ int i915_save_state(struct drm_device *dev)
- 	intel_disable_gt_powersave(dev);
- 
- 	/* Cache mode state */
--	dev_priv->regfile.saveCACHE_MODE_0 = I915_READ(CACHE_MODE_0);
-+	if (INTEL_INFO(dev)->gen < 7)
-+		dev_priv->regfile.saveCACHE_MODE_0 = I915_READ(CACHE_MODE_0);
- 
- 	/* Memory Arbitration state */
- 	dev_priv->regfile.saveMI_ARB_STATE = I915_READ(MI_ARB_STATE);
-@@ -418,7 +419,9 @@ int i915_restore_state(struct drm_device *dev)
- 	}
- 
- 	/* Cache mode state */
--	I915_WRITE(CACHE_MODE_0, dev_priv->regfile.saveCACHE_MODE_0 | 0xffff0000);
-+	if (INTEL_INFO(dev)->gen < 7)
-+		I915_WRITE(CACHE_MODE_0, dev_priv->regfile.saveCACHE_MODE_0 |
-+			   0xffff0000);
- 
- 	/* Memory arbitration state */
- 	I915_WRITE(MI_ARB_STATE, dev_priv->regfile.saveMI_ARB_STATE | 0xffff0000);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1067-drm-i915-vlv-add-doc-names-to-sideband-file.patch b/patches.baytrail/1067-drm-i915-vlv-add-doc-names-to-sideband-file.patch
deleted file mode 100644
index 653fc342446c9..0000000000000
--- a/patches.baytrail/1067-drm-i915-vlv-add-doc-names-to-sideband-file.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From 367dfba29437da89315d9657e250f8de4372edc1 Mon Sep 17 00:00:00 2001
-From: Jesse Barnes <jbarnes@virtuousgeek.org>
-Date: Fri, 11 Oct 2013 12:09:30 -0700
-Subject: drm/i915/vlv: add doc names to sideband file
-
-So digging out the right ones is a little easier.
-
-Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit d8228d0d51fcd6f14c5a96319539dce14508bf19)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_sideband.c | 5 ++++-
- 1 file changed, 4 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_sideband.c b/drivers/gpu/drm/i915/intel_sideband.c
-index acd1cfe8b7dd..9944d8135e87 100644
---- a/drivers/gpu/drm/i915/intel_sideband.c
-+++ b/drivers/gpu/drm/i915/intel_sideband.c
-@@ -25,7 +25,10 @@
- #include "i915_drv.h"
- #include "intel_drv.h"
- 
--/* IOSF sideband */
-+/*
-+ * IOSF sideband, see VLV2_SidebandMsg_HAS.docx and
-+ * VLV_VLV2_PUNIT_HAS_0.8.docx
-+ */
- static int vlv_sideband_rw(struct drm_i915_private *dev_priv, u32 devfn,
- 			   u32 port, u32 opcode, u32 addr, u32 *val)
- {
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1068-drm-i915-Fix-VLV-frame-counter-registers.patch b/patches.baytrail/1068-drm-i915-Fix-VLV-frame-counter-registers.patch
deleted file mode 100644
index f697dc75a276c..0000000000000
--- a/patches.baytrail/1068-drm-i915-Fix-VLV-frame-counter-registers.patch
+++ /dev/null
@@ -1,62 +0,0 @@
-From 5d0025184a57d122a881733e9a0cc1884543d681 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Fri, 11 Oct 2013 22:24:41 +0300
-Subject: drm/i915: Fix VLV frame counter registers
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Supposedly VLV uses the CTG+ style frame counter registers instead of
-the old gen3/4 style. Add the magic offset to the correct registers.
-
-We should already be taking the correct codepaths for
-.get_vblank_counter() and .get_scanout_position().
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 25a2e2d0f35e3297c7c8c6daf12d35fca7a51e44)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_reg.h |   16 ++++++++--------
- 1 file changed, 8 insertions(+), 8 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -3352,17 +3352,17 @@
-  *  } while (high1 != high2);
-  *  frame = (high1 << 8) | low1;
-  */
--#define _PIPEAFRAMEHIGH          (dev_priv->info->display_mmio_offset + 0x70040)
-+#define _PIPEAFRAMEHIGH          0x70040
- #define   PIPE_FRAME_HIGH_MASK    0x0000ffff
- #define   PIPE_FRAME_HIGH_SHIFT   0
--#define _PIPEAFRAMEPIXEL         (dev_priv->info->display_mmio_offset + 0x70044)
-+#define _PIPEAFRAMEPIXEL         0x70044
- #define   PIPE_FRAME_LOW_MASK     0xff000000
- #define   PIPE_FRAME_LOW_SHIFT    24
- #define   PIPE_PIXEL_MASK         0x00ffffff
- #define   PIPE_PIXEL_SHIFT        0
- /* GM45+ just has to be different */
--#define _PIPEA_FRMCOUNT_GM45	0x70040
--#define _PIPEA_FLIPCOUNT_GM45	0x70044
-+#define _PIPEA_FRMCOUNT_GM45	(dev_priv->info->display_mmio_offset + 0x70040)
-+#define _PIPEA_FLIPCOUNT_GM45	(dev_priv->info->display_mmio_offset + 0x70044)
- #define PIPE_FRMCOUNT_GM45(pipe) _PIPE(pipe, _PIPEA_FRMCOUNT_GM45, _PIPEB_FRMCOUNT_GM45)
- 
- /* Cursor A & B regs */
-@@ -3493,10 +3493,10 @@
- #define _PIPEBDSL		(dev_priv->info->display_mmio_offset + 0x71000)
- #define _PIPEBCONF		(dev_priv->info->display_mmio_offset + 0x71008)
- #define _PIPEBSTAT		(dev_priv->info->display_mmio_offset + 0x71024)
--#define _PIPEBFRAMEHIGH		(dev_priv->info->display_mmio_offset + 0x71040)
--#define _PIPEBFRAMEPIXEL	(dev_priv->info->display_mmio_offset + 0x71044)
--#define _PIPEB_FRMCOUNT_GM45	0x71040
--#define _PIPEB_FLIPCOUNT_GM45	0x71044
-+#define _PIPEBFRAMEHIGH		0x71040
-+#define _PIPEBFRAMEPIXEL	0x71044
-+#define _PIPEB_FRMCOUNT_GM45	(dev_priv->info->display_mmio_offset + 0x71040)
-+#define _PIPEB_FLIPCOUNT_GM45	(dev_priv->info->display_mmio_offset + 0x71044)
- 
- 
- /* Display B control */
diff --git a/patches.baytrail/1069-drm-nouveau-always-select-ACPI_VIDEO-if-ACPI-is-enab.patch b/patches.baytrail/1069-drm-nouveau-always-select-ACPI_VIDEO-if-ACPI-is-enab.patch
deleted file mode 100644
index daaf1aca27988..0000000000000
--- a/patches.baytrail/1069-drm-nouveau-always-select-ACPI_VIDEO-if-ACPI-is-enab.patch
+++ /dev/null
@@ -1,52 +0,0 @@
-From 9131893a8b75d782a1ab0049708b37b9f77f3c50 Mon Sep 17 00:00:00 2001
-From: Maarten Lankhorst <m.b.lankhorst@gmail.com>
-Date: Thu, 27 Jun 2013 13:38:23 +0200
-Subject: drm/nouveau: always select ACPI_VIDEO if ACPI is enabled.
-
-Having nouveau builtin would still allow ACPI_VIDEO to be used as external module
-if some of the deps for acpi_video have not been met, which would result in a linking
-failure. Solve this by selecting all dependencies as well.
-
-Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
-Acked-by: Ben Skeggs <bskeggs@redhat.com>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit 1107276c8a05ad6de9e2f12fb75e9f0c3f2c7764)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/Kconfig         | 1 +
- drivers/gpu/drm/nouveau/Kconfig | 7 +++++++
- 2 files changed, 8 insertions(+)
-
-diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
-index d979cec588c8..9fb09af14d25 100644
---- a/drivers/gpu/drm/Kconfig
-+++ b/drivers/gpu/drm/Kconfig
-@@ -139,6 +139,7 @@ config DRM_I915
- 	select BACKLIGHT_CLASS_DEVICE if ACPI
- 	select VIDEO_OUTPUT_CONTROL if ACPI
- 	select INPUT if ACPI
-+	select THERMAL if ACPI
- 	select ACPI_VIDEO if ACPI
- 	select ACPI_BUTTON if ACPI
- 	help
-diff --git a/drivers/gpu/drm/nouveau/Kconfig b/drivers/gpu/drm/nouveau/Kconfig
-index a7ff6d5a34b9..ff80f12480ea 100644
---- a/drivers/gpu/drm/nouveau/Kconfig
-+++ b/drivers/gpu/drm/nouveau/Kconfig
-@@ -15,6 +15,13 @@ config DRM_NOUVEAU
- 	select ACPI_WMI if ACPI && X86
- 	select MXM_WMI if ACPI && X86
- 	select POWER_SUPPLY
-+	# Similar to i915, we need to select ACPI_VIDEO and it's dependencies
-+	select BACKLIGHT_LCD_SUPPORT if ACPI && X86
-+	select BACKLIGHT_CLASS_DEVICE if ACPI && X86
-+	select VIDEO_OUTPUT_CONTROL if ACPI && X86
-+	select INPUT if ACPI && X86
-+	select THERMAL if ACPI && X86
-+	select ACPI_VIDEO if ACPI && X86
- 	help
- 	  Choose this option for open-source nVidia support.
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1070-drm-Add-separate-Kconfig-option-for-fbdev-helpers.patch b/patches.baytrail/1070-drm-Add-separate-Kconfig-option-for-fbdev-helpers.patch
deleted file mode 100644
index 4a5bdf40e80a7..0000000000000
--- a/patches.baytrail/1070-drm-Add-separate-Kconfig-option-for-fbdev-helpers.patch
+++ /dev/null
@@ -1,305 +0,0 @@
-From dc80e147e8acce8bd6855e236abb556169feffa2 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Tue, 8 Oct 2013 17:44:47 +0200
-Subject: drm: Add separate Kconfig option for fbdev helpers
-
-For drivers which might want to disable fbdev legacy support.
-
-Select the new option in all drivers for now, so this shouldn't result
-in any change. Drivers need some work anyway to make fbdev support
-optional (if they have it implemented, that is), so the recommended
-way to expose this is by adding per-driver options. At least as long
-as most drivers don't support disabling the fbdev support.
-
-v2: Update for new drm drivers msm and rcar-du. Note that Rob's msm
-driver can already take advantage of this, which allows us to build
-msm without any fbdev depencies in the kernel!
-
-v3: Move the MODULE_* stuff from the fbdev helper file to
-drm_crtc_helper.c.
-
-Cc: David Herrmann <dh.herrmann@gmail.com>
-Cc: Rob Clark <robdclark@gmail.com>
-Reviewed-by: Rob Clark <robdclark@gmail.com>
-Acked-by: Dave Airlie <airlied@linux.ie>
-Reviewed-by: Chon Ming Lee <chon.ming.lee@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 92b6f89f6b85f433ddac1f4a9eb0962dc96380fe)
-Signed-off-by: James Ausmus <james.ausmus@intel.com>
-
-Conflicts:
-	drivers/gpu/drm/msm/Kconfig
-	drivers/gpu/drm/rcar-du/Kconfig
-	(drivers not in this tree)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/Kconfig           | 11 ++++++++++-
- drivers/gpu/drm/Makefile          |  3 ++-
- drivers/gpu/drm/ast/Kconfig       |  1 +
- drivers/gpu/drm/cirrus/Kconfig    |  1 +
- drivers/gpu/drm/drm_crtc_helper.c |  4 ++++
- drivers/gpu/drm/drm_fb_helper.c   |  4 ----
- drivers/gpu/drm/exynos/Kconfig    |  1 +
- drivers/gpu/drm/gma500/Kconfig    |  1 +
- drivers/gpu/drm/mgag200/Kconfig   |  1 +
- drivers/gpu/drm/nouveau/Kconfig   |  1 +
- drivers/gpu/drm/omapdrm/Kconfig   |  1 +
- drivers/gpu/drm/qxl/Kconfig       |  1 +
- drivers/gpu/drm/shmobile/Kconfig  |  1 +
- drivers/gpu/drm/tilcdc/Kconfig    |  1 +
- drivers/gpu/drm/udl/Kconfig       |  1 +
- drivers/gpu/host1x/drm/Kconfig    |  1 +
- drivers/staging/imx-drm/Kconfig   |  1 +
- 17 files changed, 29 insertions(+), 6 deletions(-)
-
-diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
-index 9fb09af14d25..8847e1e90533 100644
---- a/drivers/gpu/drm/Kconfig
-+++ b/drivers/gpu/drm/Kconfig
-@@ -29,11 +29,17 @@ config DRM_USB
- config DRM_KMS_HELPER
- 	tristate
- 	depends on DRM
-+	help
-+	  CRTC helpers for KMS drivers.
-+
-+config DRM_KMS_FB_HELPER
-+	bool
-+	depends on DRM_KMS_HELPER
- 	select FB
- 	select FRAMEBUFFER_CONSOLE if !EXPERT
- 	select FRAMEBUFFER_CONSOLE_DETECT_PRIMARY if FRAMEBUFFER_CONSOLE
- 	help
--	  FB and CRTC helpers for KMS drivers.
-+	  FBDEV helpers for KMS drivers.
- 
- config DRM_LOAD_EDID_FIRMWARE
- 	bool "Allow to specify an EDID data set instead of probing for it"
-@@ -64,6 +70,7 @@ config DRM_GEM_CMA_HELPER
- config DRM_KMS_CMA_HELPER
- 	bool
- 	select DRM_GEM_CMA_HELPER
-+	select DRM_KMS_FB_HELPER
- 	select FB_SYS_FILLRECT
- 	select FB_SYS_COPYAREA
- 	select FB_SYS_IMAGEBLIT
-@@ -96,6 +103,7 @@ config DRM_RADEON
- 	select FB_CFB_IMAGEBLIT
- 	select FW_LOADER
-         select DRM_KMS_HELPER
-+	select DRM_KMS_FB_HELPER
-         select DRM_TTM
- 	select POWER_SUPPLY
- 	select HWMON
-@@ -130,6 +138,7 @@ config DRM_I915
- 	select SHMEM
- 	select TMPFS
- 	select DRM_KMS_HELPER
-+	select DRM_KMS_FB_HELPER
- 	select FB_CFB_FILLRECT
- 	select FB_CFB_COPYAREA
- 	select FB_CFB_IMAGEBLIT
-diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
-index d7115ad6f20d..79a2dd86e90b 100644
---- a/drivers/gpu/drm/Makefile
-+++ b/drivers/gpu/drm/Makefile
-@@ -21,8 +21,9 @@ drm-$(CONFIG_PCI) += ati_pcigart.o
- 
- drm-usb-y   := drm_usb.o
- 
--drm_kms_helper-y := drm_fb_helper.o drm_crtc_helper.o drm_dp_helper.o
-+drm_kms_helper-y := drm_crtc_helper.o drm_dp_helper.o
- drm_kms_helper-$(CONFIG_DRM_LOAD_EDID_FIRMWARE) += drm_edid_load.o
-+drm_kms_helper-$(CONFIG_DRM_KMS_FB_HELPER) += drm_fb_helper.o
- drm_kms_helper-$(CONFIG_DRM_KMS_CMA_HELPER) += drm_fb_cma_helper.o
- 
- obj-$(CONFIG_DRM_KMS_HELPER) += drm_kms_helper.o
-diff --git a/drivers/gpu/drm/ast/Kconfig b/drivers/gpu/drm/ast/Kconfig
-index da4a51eae824..8a784c460c89 100644
---- a/drivers/gpu/drm/ast/Kconfig
-+++ b/drivers/gpu/drm/ast/Kconfig
-@@ -6,6 +6,7 @@ config DRM_AST
- 	select FB_SYS_FILLRECT
- 	select FB_SYS_IMAGEBLIT
- 	select DRM_KMS_HELPER
-+	select DRM_KMS_FB_HELPER
- 	select DRM_TTM
- 	help
- 	 Say yes for experimental AST GPU driver. Do not enable
-diff --git a/drivers/gpu/drm/cirrus/Kconfig b/drivers/gpu/drm/cirrus/Kconfig
-index bf67b22723f9..9864559e5fb9 100644
---- a/drivers/gpu/drm/cirrus/Kconfig
-+++ b/drivers/gpu/drm/cirrus/Kconfig
-@@ -5,6 +5,7 @@ config DRM_CIRRUS_QEMU
- 	select FB_SYS_COPYAREA
- 	select FB_SYS_IMAGEBLIT
- 	select DRM_KMS_HELPER
-+	select DRM_KMS_FB_HELPER
- 	select DRM_TTM
- 	help
- 	 This is a KMS driver for emulated cirrus device in qemu.
-diff --git a/drivers/gpu/drm/drm_crtc_helper.c b/drivers/gpu/drm/drm_crtc_helper.c
-index bdcdbb156d08..914f53775c8f 100644
---- a/drivers/gpu/drm/drm_crtc_helper.c
-+++ b/drivers/gpu/drm/drm_crtc_helper.c
-@@ -39,6 +39,10 @@
- #include <drm/drm_fb_helper.h>
- #include <drm/drm_edid.h>
- 
-+MODULE_AUTHOR("David Airlie, Jesse Barnes");
-+MODULE_DESCRIPTION("DRM KMS helper");
-+MODULE_LICENSE("GPL and additional rights");
-+
- /**
-  * drm_helper_move_panel_connectors_to_head() - move panels to the front in the
-  * 						connector list
-diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c
-index b78cbe74dadf..bee177e8b2cf 100644
---- a/drivers/gpu/drm/drm_fb_helper.c
-+++ b/drivers/gpu/drm/drm_fb_helper.c
-@@ -39,10 +39,6 @@
- #include <drm/drm_fb_helper.h>
- #include <drm/drm_crtc_helper.h>
- 
--MODULE_AUTHOR("David Airlie, Jesse Barnes");
--MODULE_DESCRIPTION("DRM KMS helper");
--MODULE_LICENSE("GPL and additional rights");
--
- static LIST_HEAD(kernel_fb_helper_list);
- 
- /**
-diff --git a/drivers/gpu/drm/exynos/Kconfig b/drivers/gpu/drm/exynos/Kconfig
-index 772c62a6e2ac..83743e66d15f 100644
---- a/drivers/gpu/drm/exynos/Kconfig
-+++ b/drivers/gpu/drm/exynos/Kconfig
-@@ -2,6 +2,7 @@ config DRM_EXYNOS
- 	tristate "DRM Support for Samsung SoC EXYNOS Series"
- 	depends on DRM && (PLAT_SAMSUNG || ARCH_MULTIPLATFORM)
- 	select DRM_KMS_HELPER
-+	select DRM_KMS_FB_HELPER
- 	select FB_CFB_FILLRECT
- 	select FB_CFB_COPYAREA
- 	select FB_CFB_IMAGEBLIT
-diff --git a/drivers/gpu/drm/gma500/Kconfig b/drivers/gpu/drm/gma500/Kconfig
-index 1f6e2dfaaeae..508cf99a292d 100644
---- a/drivers/gpu/drm/gma500/Kconfig
-+++ b/drivers/gpu/drm/gma500/Kconfig
-@@ -5,6 +5,7 @@ config DRM_GMA500
- 	select FB_CFB_FILLRECT
- 	select FB_CFB_IMAGEBLIT
- 	select DRM_KMS_HELPER
-+	select DRM_KMS_FB_HELPER
- 	select DRM_TTM
- 	# GMA500 depends on ACPI_VIDEO when ACPI is enabled, just like i915
- 	select ACPI_VIDEO if ACPI
-diff --git a/drivers/gpu/drm/mgag200/Kconfig b/drivers/gpu/drm/mgag200/Kconfig
-index b487cdec5ee7..3a1c5fbae54a 100644
---- a/drivers/gpu/drm/mgag200/Kconfig
-+++ b/drivers/gpu/drm/mgag200/Kconfig
-@@ -5,6 +5,7 @@ config DRM_MGAG200
- 	select FB_SYS_COPYAREA
- 	select FB_SYS_IMAGEBLIT
- 	select DRM_KMS_HELPER
-+	select DRM_KMS_FB_HELPER
- 	select DRM_TTM
- 	help
- 	 This is a KMS driver for the MGA G200 server chips, it
-diff --git a/drivers/gpu/drm/nouveau/Kconfig b/drivers/gpu/drm/nouveau/Kconfig
-index ff80f12480ea..7cf787d697b1 100644
---- a/drivers/gpu/drm/nouveau/Kconfig
-+++ b/drivers/gpu/drm/nouveau/Kconfig
-@@ -3,6 +3,7 @@ config DRM_NOUVEAU
- 	depends on DRM && PCI
-         select FW_LOADER
- 	select DRM_KMS_HELPER
-+	select DRM_KMS_FB_HELPER
- 	select DRM_TTM
- 	select FB_CFB_FILLRECT
- 	select FB_CFB_COPYAREA
-diff --git a/drivers/gpu/drm/omapdrm/Kconfig b/drivers/gpu/drm/omapdrm/Kconfig
-index 09f65dc3d2c8..32b2eaa4de59 100644
---- a/drivers/gpu/drm/omapdrm/Kconfig
-+++ b/drivers/gpu/drm/omapdrm/Kconfig
-@@ -5,6 +5,7 @@ config DRM_OMAP
- 	depends on ARCH_OMAP2PLUS || ARCH_MULTIPLATFORM
- 	depends on OMAP2_DSS
- 	select DRM_KMS_HELPER
-+	select DRM_KMS_FB_HELPER
- 	select FB_SYS_FILLRECT
- 	select FB_SYS_COPYAREA
- 	select FB_SYS_IMAGEBLIT
-diff --git a/drivers/gpu/drm/qxl/Kconfig b/drivers/gpu/drm/qxl/Kconfig
-index d6c12796023c..037d324bf58f 100644
---- a/drivers/gpu/drm/qxl/Kconfig
-+++ b/drivers/gpu/drm/qxl/Kconfig
-@@ -6,6 +6,7 @@ config DRM_QXL
- 	select FB_SYS_IMAGEBLIT
- 	select FB_DEFERRED_IO
-         select DRM_KMS_HELPER
-+	select DRM_KMS_FB_HELPER
-         select DRM_TTM
- 	help
- 		QXL virtual GPU for Spice virtualization desktop integration. Do not enable this driver unless your distro ships a corresponding X.org QXL driver that can handle kernel modesetting.
-diff --git a/drivers/gpu/drm/shmobile/Kconfig b/drivers/gpu/drm/shmobile/Kconfig
-index 7e7d52b2a2fc..3878d29378eb 100644
---- a/drivers/gpu/drm/shmobile/Kconfig
-+++ b/drivers/gpu/drm/shmobile/Kconfig
-@@ -2,6 +2,7 @@ config DRM_SHMOBILE
- 	tristate "DRM Support for SH Mobile"
- 	depends on DRM && (SUPERH || ARCH_SHMOBILE)
- 	select DRM_KMS_HELPER
-+	select DRM_KMS_FB_HELPER
- 	select DRM_KMS_CMA_HELPER
- 	select DRM_GEM_CMA_HELPER
- 	help
-diff --git a/drivers/gpu/drm/tilcdc/Kconfig b/drivers/gpu/drm/tilcdc/Kconfig
-index 7a4d10106906..7c3ef79fcb37 100644
---- a/drivers/gpu/drm/tilcdc/Kconfig
-+++ b/drivers/gpu/drm/tilcdc/Kconfig
-@@ -2,6 +2,7 @@ config DRM_TILCDC
- 	tristate "DRM Support for TI LCDC Display Controller"
- 	depends on DRM && OF && ARM
- 	select DRM_KMS_HELPER
-+	select DRM_KMS_FB_HELPER
- 	select DRM_KMS_CMA_HELPER
- 	select DRM_GEM_CMA_HELPER
- 	select VIDEOMODE_HELPERS
-diff --git a/drivers/gpu/drm/udl/Kconfig b/drivers/gpu/drm/udl/Kconfig
-index 6222af19f456..f02528686cd5 100644
---- a/drivers/gpu/drm/udl/Kconfig
-+++ b/drivers/gpu/drm/udl/Kconfig
-@@ -8,6 +8,7 @@ config DRM_UDL
- 	select FB_SYS_IMAGEBLIT
- 	select FB_DEFERRED_IO
- 	select DRM_KMS_HELPER
-+        select DRM_KMS_FB_HELPER
- 	help
- 	  This is a KMS driver for the USB displaylink video adapters.
-           Say M/Y to add support for these devices via drm/kms interfaces.
-diff --git a/drivers/gpu/host1x/drm/Kconfig b/drivers/gpu/host1x/drm/Kconfig
-index 69853a4de40a..0f36ddd74e87 100644
---- a/drivers/gpu/host1x/drm/Kconfig
-+++ b/drivers/gpu/host1x/drm/Kconfig
-@@ -2,6 +2,7 @@ config DRM_TEGRA
- 	bool "NVIDIA Tegra DRM"
- 	depends on DRM
- 	select DRM_KMS_HELPER
-+	select DRM_KMS_FB_HELPER
- 	select FB_SYS_FILLRECT
- 	select FB_SYS_COPYAREA
- 	select FB_SYS_IMAGEBLIT
-diff --git a/drivers/staging/imx-drm/Kconfig b/drivers/staging/imx-drm/Kconfig
-index ef699f753186..c3f3b0c502d4 100644
---- a/drivers/staging/imx-drm/Kconfig
-+++ b/drivers/staging/imx-drm/Kconfig
-@@ -1,6 +1,7 @@
- config DRM_IMX
- 	tristate "DRM Support for Freescale i.MX"
- 	select DRM_KMS_HELPER
-+	select DRM_KMS_FB_HELPER
- 	select VIDEOMODE_HELPERS
- 	select DRM_GEM_CMA_HELPER
- 	select DRM_KMS_CMA_HELPER
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1071-drm-i915-Kconfig-option-to-disable-the-legacy-fbdev-.patch b/patches.baytrail/1071-drm-i915-Kconfig-option-to-disable-the-legacy-fbdev-.patch
deleted file mode 100644
index b488772eeea9c..0000000000000
--- a/patches.baytrail/1071-drm-i915-Kconfig-option-to-disable-the-legacy-fbdev-.patch
+++ /dev/null
@@ -1,348 +0,0 @@
-From 466839f127f75f5db73de5e5c01fa1a62a4d950b Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Wed, 9 Oct 2013 09:18:51 +0200
-Subject: drm/i915: Kconfig option to disable the legacy fbdev support
-
-Boots Just Fine (tm)!
-
-The only glitch seems to be that at least on Fedora the boot splash
-gets confused and doesn't display much at all.
-
-And since there's no ugly console flickering anymore in between, the
-flicker while switching between X servers (VT support is still enabled)
-is even more jarring.
-
-Also, I'm unsure whether we don't need to somehow kick out vgacon, now
-that nothing else gets in the way. But stuff seems to work, so I
-don't care. Also everything still works as well with VGA_CONSOLE=n
-
-Also the #ifdef mess needs a bit of a cleanup, follow-up patches will
-do just that.
-
-To keep the Kconfig tidy, extract all the i915 options into its own
-file.
-
-v2:
-- Rebase on top of the preliminary hw support option and the
-  intel_drv.h cleanup.
-- Shut up warnings in i915_debugfs.c
-
-v3: Use the right CONFIG variable, spotted by Chon Ming.
-
-Cc: Lee, Chon Ming <chon.ming.lee@intel.com>
-Cc: David Herrmann <dh.herrmann@gmail.com>
-Reviewed-by: Chon Ming Lee <chon.ming.lee@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 4520f53a159fb81b8c27afe52428a0959aff259c)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/Kconfig              |   60 -------------------------------
- drivers/gpu/drm/i915/Kconfig         |   67 +++++++++++++++++++++++++++++++++++
- drivers/gpu/drm/i915/Makefile        |    3 +
- drivers/gpu/drm/i915/i915_debugfs.c  |    9 ++--
- drivers/gpu/drm/i915/i915_dma.c      |    6 +++
- drivers/gpu/drm/i915/i915_drv.h      |    2 +
- drivers/gpu/drm/i915/intel_display.c |   10 +++++
- drivers/gpu/drm/i915/intel_drv.h     |   36 +++++++++++++++---
- 8 files changed, 122 insertions(+), 71 deletions(-)
- create mode 100644 drivers/gpu/drm/i915/Kconfig
-
---- a/drivers/gpu/drm/Kconfig
-+++ b/drivers/gpu/drm/Kconfig
-@@ -128,65 +128,7 @@ config DRM_I810
- 	  selected, the module will be called i810.  AGP support is required
- 	  for this driver to work.
- 
--config DRM_I915
--	tristate "Intel 8xx/9xx/G3x/G4x/HD Graphics"
--	depends on DRM
--	depends on AGP
--	depends on AGP_INTEL
--	# we need shmfs for the swappable backing store, and in particular
--	# the shmem_readpage() which depends upon tmpfs
--	select SHMEM
--	select TMPFS
--	select DRM_KMS_HELPER
--	select DRM_KMS_FB_HELPER
--	select FB_CFB_FILLRECT
--	select FB_CFB_COPYAREA
--	select FB_CFB_IMAGEBLIT
--	# i915 depends on ACPI_VIDEO when ACPI is enabled
--	# but for select to work, need to select ACPI_VIDEO's dependencies, ick
--	select BACKLIGHT_LCD_SUPPORT if ACPI
--	select BACKLIGHT_CLASS_DEVICE if ACPI
--	select VIDEO_OUTPUT_CONTROL if ACPI
--	select INPUT if ACPI
--	select THERMAL if ACPI
--	select ACPI_VIDEO if ACPI
--	select ACPI_BUTTON if ACPI
--	help
--	  Choose this option if you have a system that has "Intel Graphics
--	  Media Accelerator" or "HD Graphics" integrated graphics,
--	  including 830M, 845G, 852GM, 855GM, 865G, 915G, 945G, 965G,
--	  G35, G41, G43, G45 chipsets and Celeron, Pentium, Core i3,
--	  Core i5, Core i7 as well as Atom CPUs with integrated graphics.
--	  If M is selected, the module will be called i915.  AGP support
--	  is required for this driver to work. This driver is used by
--	  the Intel driver in X.org 6.8 and XFree86 4.4 and above. It
--	  replaces the older i830 module that supported a subset of the
--	  hardware in older X.org releases.
--
--	  Note that the older i810/i815 chipsets require the use of the
--	  i810 driver instead, and the Atom z5xx series has an entirely
--	  different implementation.
--
--config DRM_I915_KMS
--	bool "Enable modesetting on intel by default"
--	depends on DRM_I915
--	help
--	  Choose this option if you want kernel modesetting enabled by default,
--	  and you have a new enough userspace to support this. Running old
--	  userspaces with this enabled will cause pain.  Note that this causes
--	  the driver to bind to PCI devices, which precludes loading things
--	  like intelfb.
--
--config DRM_I915_PRELIMINARY_HW_SUPPORT
--	bool "Enable preliminary support for prerelease Intel hardware by default"
--	depends on DRM_I915
--	help
--	  Choose this option if you have prerelease Intel hardware and want the
--	  i915 driver to support it by default.  You can enable such support at
--	  runtime with the module option i915.preliminary_hw_support=1; this
--	  option changes the default for that module option.
--
--	  If in doubt, say "N".
-+source "drivers/gpu/drm/i915/Kconfig"
- 
- config DRM_MGA
- 	tristate "Matrox g200/g400"
---- /dev/null
-+++ b/drivers/gpu/drm/i915/Kconfig
-@@ -0,0 +1,67 @@
-+config DRM_I915
-+	tristate "Intel 8xx/9xx/G3x/G4x/HD Graphics"
-+	depends on DRM
-+	depends on AGP
-+	depends on AGP_INTEL
-+	# we need shmfs for the swappable backing store, and in particular
-+	# the shmem_readpage() which depends upon tmpfs
-+	select SHMEM
-+	select TMPFS
-+	select DRM_KMS_HELPER
-+	# i915 depends on ACPI_VIDEO when ACPI is enabled
-+	# but for select to work, need to select ACPI_VIDEO's dependencies, ick
-+	select BACKLIGHT_LCD_SUPPORT if ACPI
-+	select BACKLIGHT_CLASS_DEVICE if ACPI
-+	select VIDEO_OUTPUT_CONTROL if ACPI
-+	select INPUT if ACPI
-+	select ACPI_VIDEO if ACPI
-+	select ACPI_BUTTON if ACPI
-+	help
-+	  Choose this option if you have a system that has "Intel Graphics
-+	  Media Accelerator" or "HD Graphics" integrated graphics,
-+	  including 830M, 845G, 852GM, 855GM, 865G, 915G, 945G, 965G,
-+	  G35, G41, G43, G45 chipsets and Celeron, Pentium, Core i3,
-+	  Core i5, Core i7 as well as Atom CPUs with integrated graphics.
-+	  If M is selected, the module will be called i915.  AGP support
-+	  is required for this driver to work. This driver is used by
-+	  the Intel driver in X.org 6.8 and XFree86 4.4 and above. It
-+	  replaces the older i830 module that supported a subset of the
-+	  hardware in older X.org releases.
-+
-+	  Note that the older i810/i815 chipsets require the use of the
-+	  i810 driver instead, and the Atom z5xx series has an entirely
-+	  different implementation.
-+
-+config DRM_I915_KMS
-+	bool "Enable modesetting on intel by default"
-+	depends on DRM_I915
-+	help
-+	  Choose this option if you want kernel modesetting enabled by default,
-+	  and you have a new enough userspace to support this. Running old
-+	  userspaces with this enabled will cause pain.  Note that this causes
-+	  the driver to bind to PCI devices, which precludes loading things
-+	  like intelfb.
-+
-+config DRM_I915_FBDEV
-+	bool "Enable legacy fbdev support for the modesettting intel driver"
-+	depends on DRM_I915
-+	select DRM_KMS_FB_HELPER
-+	select FB_CFB_FILLRECT
-+	select FB_CFB_COPYAREA
-+	select FB_CFB_IMAGEBLIT
-+	default y
-+	help
-+	  Choose this option if you have a need for the legacy fbdev
-+	  support. Note that this support also provide the linux console
-+	  support on top of the intel modesetting driver.
-+
-+config DRM_I915_PRELIMINARY_HW_SUPPORT
-+	bool "Enable preliminary support for prerelease Intel hardware by default"
-+	depends on DRM_I915
-+	help
-+	  Choose this option if you have prerelease Intel hardware and want the
-+	  i915 driver to support it by default.  You can enable such support at
-+	  runtime with the module option i915.preliminary_hw_support=1; this
-+	  option changes the default for that module option.
-+
-+	  If in doubt, say "N".
---- a/drivers/gpu/drm/i915/Makefile
-+++ b/drivers/gpu/drm/i915/Makefile
-@@ -33,7 +33,6 @@ i915-y := i915_drv.o i915_dma.o i915_irq
- 	  intel_panel.o \
- 	  intel_pm.o \
- 	  intel_i2c.o \
--	  intel_fb.o \
- 	  intel_tv.o \
- 	  intel_dvo.o \
- 	  intel_ringbuffer.o \
-@@ -54,6 +53,8 @@ i915-$(CONFIG_COMPAT)   += i915_ioc32.o
- 
- i915-$(CONFIG_ACPI)	+= intel_acpi.o
- 
-+i915-$(CONFIG_DRM_I915_FBDEV) += intel_fb.o
-+
- obj-$(CONFIG_DRM_I915)  += i915.o
- 
- CFLAGS_i915_trace_points.o := -I$(src)
---- a/drivers/gpu/drm/i915/i915_debugfs.c
-+++ b/drivers/gpu/drm/i915/i915_debugfs.c
-@@ -1403,12 +1403,12 @@ static int i915_gem_framebuffer_info(str
- {
- 	struct drm_info_node *node = (struct drm_info_node *) m->private;
- 	struct drm_device *dev = node->minor->dev;
--	drm_i915_private_t *dev_priv = dev->dev_private;
--	struct intel_fbdev *ifbdev;
-+	struct intel_fbdev *ifbdev = NULL;
- 	struct intel_framebuffer *fb;
--	int ret;
- 
--	ret = mutex_lock_interruptible(&dev->mode_config.mutex);
-+#ifdef CONFIG_DRM_I915_FBDEV
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	int ret = mutex_lock_interruptible(&dev->mode_config.mutex);
- 	if (ret)
- 		return ret;
- 
-@@ -1424,6 +1424,7 @@ static int i915_gem_framebuffer_info(str
- 	describe_obj(m, fb->obj);
- 	seq_putc(m, '\n');
- 	mutex_unlock(&dev->mode_config.mutex);
-+#endif
- 
- 	mutex_lock(&dev->mode_config.fb_lock);
- 	list_for_each_entry(fb, &dev->mode_config.fb_list, base.head) {
---- a/drivers/gpu/drm/i915/i915_dma.c
-+++ b/drivers/gpu/drm/i915/i915_dma.c
-@@ -1424,6 +1424,7 @@ void i915_master_destroy(struct drm_devi
- 	master->driver_priv = NULL;
- }
- 
-+#ifdef CONFIG_DRM_I915_FBDEV
- static void i915_kick_out_firmware_fb(struct drm_i915_private *dev_priv)
- {
- 	struct apertures_struct *ap;
-@@ -1444,6 +1445,11 @@ static void i915_kick_out_firmware_fb(st
- 
- 	kfree(ap);
- }
-+#else
-+static void i915_kick_out_firmware_fb(struct drm_i915_private *dev_priv)
-+{
-+}
-+#endif
- 
- static void i915_dump_device_info(struct drm_i915_private *dev_priv)
- {
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1368,8 +1368,10 @@ typedef struct drm_i915_private {
- 
- 	struct drm_i915_gem_object *vlv_pctx;
- 
-+#ifdef CONFIG_DRM_I915_FBDEV
- 	/* list of fbdev register on this device */
- 	struct intel_fbdev *fbdev;
-+#endif
- 
- 	/*
- 	 * The console may be contended at resume, but we don't
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -7335,6 +7335,7 @@ static struct drm_framebuffer *
- mode_fits_in_fbdev(struct drm_device *dev,
- 		   struct drm_display_mode *mode)
- {
-+#ifdef CONFIG_DRM_I915_FBDEV
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct drm_i915_gem_object *obj;
- 	struct drm_framebuffer *fb;
-@@ -7355,6 +7356,9 @@ mode_fits_in_fbdev(struct drm_device *de
- 		return NULL;
- 
- 	return fb;
-+#else
-+	return NULL;
-+#endif
- }
- 
- bool intel_get_load_detect_pipe(struct drm_connector *connector,
-@@ -10101,6 +10105,12 @@ intel_user_framebuffer_create(struct drm
- 	return intel_framebuffer_create(dev, mode_cmd, obj);
- }
- 
-+#ifndef CONFIG_DRM_I915_FBDEV
-+static inline void intel_fb_output_poll_changed(struct drm_device *dev)
-+{
-+}
-+#endif
-+
- static const struct drm_mode_config_funcs intel_mode_funcs = {
- 	.fb_create = intel_user_framebuffer_create,
- 	.output_poll_changed = intel_fb_output_poll_changed,
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -713,14 +713,36 @@ bool intel_dsi_init(struct drm_device *d
- void intel_dvo_init(struct drm_device *dev);
- 
- 
--/* intel_fb.c */
--int intel_fbdev_init(struct drm_device *dev);
--void intel_fbdev_initial_config(struct drm_device *dev);
--void intel_fbdev_fini(struct drm_device *dev);
--void intel_fbdev_set_suspend(struct drm_device *dev, int state);
--void intel_fb_output_poll_changed(struct drm_device *dev);
--void intel_fb_restore_mode(struct drm_device *dev);
-+/* legacy fbdev emulation in intel_fb.c */
-+#ifdef CONFIG_DRM_I915_FBDEV
-+extern int intel_fbdev_init(struct drm_device *dev);
-+extern void intel_fbdev_initial_config(struct drm_device *dev);
-+extern void intel_fbdev_fini(struct drm_device *dev);
-+extern void intel_fbdev_set_suspend(struct drm_device *dev, int state);
-+extern void intel_fb_output_poll_changed(struct drm_device *dev);
-+extern void intel_fb_restore_mode(struct drm_device *dev);
-+#else
-+static inline int intel_fbdev_init(struct drm_device *dev)
-+{
-+	return 0;
-+}
- 
-+static inline void intel_fbdev_initial_config(struct drm_device *dev)
-+{
-+}
-+
-+static inline void intel_fbdev_fini(struct drm_device *dev)
-+{
-+}
-+
-+static inline void intel_fbdev_set_suspend(struct drm_device *dev, int state)
-+{
-+}
-+
-+static inline void intel_fb_restore_mode(struct drm_device *dev)
-+{
-+}
-+#endif
- 
- /* intel_hdmi.c */
- void intel_hdmi_init(struct drm_device *dev, int hdmi_reg, enum port port);
diff --git a/patches.baytrail/1072-drm-i915-rename-intel_fb.c-to-intel_fbdev.c.patch b/patches.baytrail/1072-drm-i915-rename-intel_fb.c-to-intel_fbdev.c.patch
deleted file mode 100644
index 6d22cf978f453..0000000000000
--- a/patches.baytrail/1072-drm-i915-rename-intel_fb.c-to-intel_fbdev.c.patch
+++ /dev/null
@@ -1,747 +0,0 @@
-From af442c6b82d7bc0c8140691aa42ab43dd5b4abd8 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Tue, 8 Oct 2013 17:44:49 +0200
-Subject: drm/i915: rename intel_fb.c to intel_fbdev.c
-
-This file is all about the legacy fbdev support. If we want to extract
-framebuffer functions, we better put those into a separate file.
-
-Also rename functions accordingly, only two have used the intel_fb_
-prefix anyway.
-
-Reviewed-by: Chon Ming Lee <chon.ming.lee@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 0632fef669912a63c99c8ce4c2ca10c6ea04f0df)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/Makefile        |    2 
- drivers/gpu/drm/i915/i915_dma.c      |    2 
- drivers/gpu/drm/i915/intel_display.c |    4 
- drivers/gpu/drm/i915/intel_drv.h     |    8 
- drivers/gpu/drm/i915/intel_fb.c      |  323 -----------------------------------
- drivers/gpu/drm/i915/intel_fbdev.c   |  323 +++++++++++++++++++++++++++++++++++
- 6 files changed, 331 insertions(+), 331 deletions(-)
- rename drivers/gpu/drm/i915/{intel_fb.c => intel_fbdev.c} (98%)
-
---- a/drivers/gpu/drm/i915/Makefile
-+++ b/drivers/gpu/drm/i915/Makefile
-@@ -53,7 +53,7 @@ i915-$(CONFIG_COMPAT)   += i915_ioc32.o
- 
- i915-$(CONFIG_ACPI)	+= intel_acpi.o
- 
--i915-$(CONFIG_DRM_I915_FBDEV) += intel_fb.o
-+i915-$(CONFIG_DRM_I915_FBDEV) += intel_fbdev.o
- 
- obj-$(CONFIG_DRM_I915)  += i915.o
- 
---- a/drivers/gpu/drm/i915/i915_dma.c
-+++ b/drivers/gpu/drm/i915/i915_dma.c
-@@ -1862,7 +1862,7 @@ void i915_driver_lastclose(struct drm_de
- 		return;
- 
- 	if (drm_core_check_feature(dev, DRIVER_MODESET)) {
--		intel_fb_restore_mode(dev);
-+		intel_fbdev_restore_mode(dev);
- 		vga_switcheroo_process_delayed_switch();
- 		return;
- 	}
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -10106,14 +10106,14 @@ intel_user_framebuffer_create(struct drm
- }
- 
- #ifndef CONFIG_DRM_I915_FBDEV
--static inline void intel_fb_output_poll_changed(struct drm_device *dev)
-+static inline void intel_fbdev_output_poll_changed(struct drm_device *dev)
- {
- }
- #endif
- 
- static const struct drm_mode_config_funcs intel_mode_funcs = {
- 	.fb_create = intel_user_framebuffer_create,
--	.output_poll_changed = intel_fb_output_poll_changed,
-+	.output_poll_changed = intel_fbdev_output_poll_changed,
- };
- 
- /* Set up chip specific display functions */
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -713,14 +713,14 @@ bool intel_dsi_init(struct drm_device *d
- void intel_dvo_init(struct drm_device *dev);
- 
- 
--/* legacy fbdev emulation in intel_fb.c */
-+/* legacy fbdev emulation in intel_fbdev.c */
- #ifdef CONFIG_DRM_I915_FBDEV
- extern int intel_fbdev_init(struct drm_device *dev);
- extern void intel_fbdev_initial_config(struct drm_device *dev);
- extern void intel_fbdev_fini(struct drm_device *dev);
- extern void intel_fbdev_set_suspend(struct drm_device *dev, int state);
--extern void intel_fb_output_poll_changed(struct drm_device *dev);
--extern void intel_fb_restore_mode(struct drm_device *dev);
-+extern void intel_fbdev_output_poll_changed(struct drm_device *dev);
-+extern void intel_fbdev_restore_mode(struct drm_device *dev);
- #else
- static inline int intel_fbdev_init(struct drm_device *dev)
- {
-@@ -739,7 +739,7 @@ static inline void intel_fbdev_set_suspe
- {
- }
- 
--static inline void intel_fb_restore_mode(struct drm_device *dev)
-+static inline void intel_fbdev_restore_mode(struct drm_device *dev)
- {
- }
- #endif
---- a/drivers/gpu/drm/i915/intel_fb.c
-+++ /dev/null
-@@ -1,323 +0,0 @@
--/*
-- * Copyright © 2007 David Airlie
-- *
-- * Permission is hereby granted, free of charge, to any person obtaining a
-- * copy of this software and associated documentation files (the "Software"),
-- * to deal in the Software without restriction, including without limitation
-- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
-- * and/or sell copies of the Software, and to permit persons to whom the
-- * Software is furnished to do so, subject to the following conditions:
-- *
-- * The above copyright notice and this permission notice (including the next
-- * paragraph) shall be included in all copies or substantial portions of the
-- * Software.
-- *
-- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
-- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
-- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
-- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
-- * DEALINGS IN THE SOFTWARE.
-- *
-- * Authors:
-- *     David Airlie
-- */
--
--#include <linux/module.h>
--#include <linux/kernel.h>
--#include <linux/errno.h>
--#include <linux/string.h>
--#include <linux/mm.h>
--#include <linux/tty.h>
--#include <linux/sysrq.h>
--#include <linux/delay.h>
--#include <linux/fb.h>
--#include <linux/init.h>
--#include <linux/vga_switcheroo.h>
--
--#include <drm/drmP.h>
--#include <drm/drm_crtc.h>
--#include <drm/drm_fb_helper.h>
--#include "intel_drv.h"
--#include <drm/i915_drm.h>
--#include "i915_drv.h"
--
--static struct fb_ops intelfb_ops = {
--	.owner = THIS_MODULE,
--	.fb_check_var = drm_fb_helper_check_var,
--	.fb_set_par = drm_fb_helper_set_par,
--	.fb_fillrect = cfb_fillrect,
--	.fb_copyarea = cfb_copyarea,
--	.fb_imageblit = cfb_imageblit,
--	.fb_pan_display = drm_fb_helper_pan_display,
--	.fb_blank = drm_fb_helper_blank,
--	.fb_setcmap = drm_fb_helper_setcmap,
--	.fb_debug_enter = drm_fb_helper_debug_enter,
--	.fb_debug_leave = drm_fb_helper_debug_leave,
--};
--
--static int intelfb_create(struct drm_fb_helper *helper,
--			  struct drm_fb_helper_surface_size *sizes)
--{
--	struct intel_fbdev *ifbdev =
--		container_of(helper, struct intel_fbdev, helper);
--	struct drm_device *dev = helper->dev;
--	struct drm_i915_private *dev_priv = dev->dev_private;
--	struct fb_info *info;
--	struct drm_framebuffer *fb;
--	struct drm_mode_fb_cmd2 mode_cmd = {};
--	struct drm_i915_gem_object *obj;
--	struct device *device = &dev->pdev->dev;
--	int size, ret;
--
--	/* we don't do packed 24bpp */
--	if (sizes->surface_bpp == 24)
--		sizes->surface_bpp = 32;
--
--	mode_cmd.width = sizes->surface_width;
--	mode_cmd.height = sizes->surface_height;
--
--	mode_cmd.pitches[0] = ALIGN(mode_cmd.width * ((sizes->surface_bpp + 7) /
--						      8), 64);
--	mode_cmd.pixel_format = drm_mode_legacy_fb_format(sizes->surface_bpp,
--							  sizes->surface_depth);
--
--	size = mode_cmd.pitches[0] * mode_cmd.height;
--	size = ALIGN(size, PAGE_SIZE);
--	obj = i915_gem_object_create_stolen(dev, size);
--	if (obj == NULL)
--		obj = i915_gem_alloc_object(dev, size);
--	if (!obj) {
--		DRM_ERROR("failed to allocate framebuffer\n");
--		ret = -ENOMEM;
--		goto out;
--	}
--
--	mutex_lock(&dev->struct_mutex);
--
--	/* Flush everything out, we'll be doing GTT only from now on */
--	ret = intel_pin_and_fence_fb_obj(dev, obj, NULL);
--	if (ret) {
--		DRM_ERROR("failed to pin fb: %d\n", ret);
--		goto out_unref;
--	}
--
--	info = framebuffer_alloc(0, device);
--	if (!info) {
--		ret = -ENOMEM;
--		goto out_unpin;
--	}
--
--	info->par = helper;
--
--	ret = intel_framebuffer_init(dev, &ifbdev->ifb, &mode_cmd, obj);
--	if (ret)
--		goto out_unpin;
--
--	fb = &ifbdev->ifb.base;
--
--	ifbdev->helper.fb = fb;
--	ifbdev->helper.fbdev = info;
--
--	strcpy(info->fix.id, "inteldrmfb");
--
--	info->flags = FBINFO_DEFAULT | FBINFO_CAN_FORCE_OUTPUT;
--	info->fbops = &intelfb_ops;
--
--	ret = fb_alloc_cmap(&info->cmap, 256, 0);
--	if (ret) {
--		ret = -ENOMEM;
--		goto out_unpin;
--	}
--	/* setup aperture base/size for vesafb takeover */
--	info->apertures = alloc_apertures(1);
--	if (!info->apertures) {
--		ret = -ENOMEM;
--		goto out_unpin;
--	}
--	info->apertures->ranges[0].base = dev->mode_config.fb_base;
--	info->apertures->ranges[0].size = dev_priv->gtt.mappable_end;
--
--	info->fix.smem_start = dev->mode_config.fb_base + i915_gem_obj_ggtt_offset(obj);
--	info->fix.smem_len = size;
--
--	info->screen_base =
--		ioremap_wc(dev_priv->gtt.mappable_base + i915_gem_obj_ggtt_offset(obj),
--			   size);
--	if (!info->screen_base) {
--		ret = -ENOSPC;
--		goto out_unpin;
--	}
--	info->screen_size = size;
--
--	/* This driver doesn't need a VT switch to restore the mode on resume */
--	info->skip_vt_switch = true;
--
--	drm_fb_helper_fill_fix(info, fb->pitches[0], fb->depth);
--	drm_fb_helper_fill_var(info, &ifbdev->helper, sizes->fb_width, sizes->fb_height);
--
--	/* If the object is shmemfs backed, it will have given us zeroed pages.
--	 * If the object is stolen however, it will be full of whatever
--	 * garbage was left in there.
--	 */
--	if (ifbdev->ifb.obj->stolen)
--		memset_io(info->screen_base, 0, info->screen_size);
--
--	/* Use default scratch pixmap (info->pixmap.flags = FB_PIXMAP_SYSTEM) */
--
--	DRM_DEBUG_KMS("allocated %dx%d fb: 0x%08lx, bo %p\n",
--		      fb->width, fb->height,
--		      i915_gem_obj_ggtt_offset(obj), obj);
--
--
--	mutex_unlock(&dev->struct_mutex);
--	vga_switcheroo_client_fb_set(dev->pdev, info);
--	return 0;
--
--out_unpin:
--	i915_gem_object_unpin(obj);
--out_unref:
--	drm_gem_object_unreference(&obj->base);
--	mutex_unlock(&dev->struct_mutex);
--out:
--	return ret;
--}
--
--/** Sets the color ramps on behalf of RandR */
--static void intel_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
--				    u16 blue, int regno)
--{
--	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
--
--	intel_crtc->lut_r[regno] = red >> 8;
--	intel_crtc->lut_g[regno] = green >> 8;
--	intel_crtc->lut_b[regno] = blue >> 8;
--}
--
--static void intel_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
--				    u16 *blue, int regno)
--{
--	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
--
--	*red = intel_crtc->lut_r[regno] << 8;
--	*green = intel_crtc->lut_g[regno] << 8;
--	*blue = intel_crtc->lut_b[regno] << 8;
--}
--
--static struct drm_fb_helper_funcs intel_fb_helper_funcs = {
--	.gamma_set = intel_crtc_fb_gamma_set,
--	.gamma_get = intel_crtc_fb_gamma_get,
--	.fb_probe = intelfb_create,
--};
--
--static void intel_fbdev_destroy(struct drm_device *dev,
--				struct intel_fbdev *ifbdev)
--{
--	if (ifbdev->helper.fbdev) {
--		struct fb_info *info = ifbdev->helper.fbdev;
--
--		unregister_framebuffer(info);
--		iounmap(info->screen_base);
--		if (info->cmap.len)
--			fb_dealloc_cmap(&info->cmap);
--
--		framebuffer_release(info);
--	}
--
--	drm_fb_helper_fini(&ifbdev->helper);
--
--	drm_framebuffer_unregister_private(&ifbdev->ifb.base);
--	intel_framebuffer_fini(&ifbdev->ifb);
--}
--
--int intel_fbdev_init(struct drm_device *dev)
--{
--	struct intel_fbdev *ifbdev;
--	struct drm_i915_private *dev_priv = dev->dev_private;
--	int ret;
--
--	ifbdev = kzalloc(sizeof(*ifbdev), GFP_KERNEL);
--	if (!ifbdev)
--		return -ENOMEM;
--
--	dev_priv->fbdev = ifbdev;
--	ifbdev->helper.funcs = &intel_fb_helper_funcs;
--
--	ret = drm_fb_helper_init(dev, &ifbdev->helper,
--				 INTEL_INFO(dev)->num_pipes,
--				 4);
--	if (ret) {
--		kfree(ifbdev);
--		return ret;
--	}
--
--	drm_fb_helper_single_add_all_connectors(&ifbdev->helper);
--
--	return 0;
--}
--
--void intel_fbdev_initial_config(struct drm_device *dev)
--{
--	struct drm_i915_private *dev_priv = dev->dev_private;
--
--	/* Due to peculiar init order wrt to hpd handling this is separate. */
--	drm_fb_helper_initial_config(&dev_priv->fbdev->helper, 32);
--}
--
--void intel_fbdev_fini(struct drm_device *dev)
--{
--	struct drm_i915_private *dev_priv = dev->dev_private;
--	if (!dev_priv->fbdev)
--		return;
--
--	intel_fbdev_destroy(dev, dev_priv->fbdev);
--	kfree(dev_priv->fbdev);
--	dev_priv->fbdev = NULL;
--}
--
--void intel_fbdev_set_suspend(struct drm_device *dev, int state)
--{
--	struct drm_i915_private *dev_priv = dev->dev_private;
--	struct intel_fbdev *ifbdev = dev_priv->fbdev;
--	struct fb_info *info;
--
--	if (!ifbdev)
--		return;
--
--	info = ifbdev->helper.fbdev;
--
--	/* On resume from hibernation: If the object is shmemfs backed, it has
--	 * been restored from swap. If the object is stolen however, it will be
--	 * full of whatever garbage was left in there.
--	 */
--	if (state == FBINFO_STATE_RUNNING && ifbdev->ifb.obj->stolen)
--		memset_io(info->screen_base, 0, info->screen_size);
--
--	fb_set_suspend(info, state);
--}
--
--MODULE_LICENSE("GPL and additional rights");
--
--void intel_fb_output_poll_changed(struct drm_device *dev)
--{
--	struct drm_i915_private *dev_priv = dev->dev_private;
--	drm_fb_helper_hotplug_event(&dev_priv->fbdev->helper);
--}
--
--void intel_fb_restore_mode(struct drm_device *dev)
--{
--	int ret;
--	struct drm_i915_private *dev_priv = dev->dev_private;
--
--	if (INTEL_INFO(dev)->num_pipes == 0)
--		return;
--
--	drm_modeset_lock_all(dev);
--
--	ret = drm_fb_helper_restore_fbdev_mode(&dev_priv->fbdev->helper);
--	if (ret)
--		DRM_DEBUG("failed to restore crtc mode\n");
--
--	drm_modeset_unlock_all(dev);
--}
---- /dev/null
-+++ b/drivers/gpu/drm/i915/intel_fbdev.c
-@@ -0,0 +1,323 @@
-+/*
-+ * Copyright © 2007 David Airlie
-+ *
-+ * Permission is hereby granted, free of charge, to any person obtaining a
-+ * copy of this software and associated documentation files (the "Software"),
-+ * to deal in the Software without restriction, including without limitation
-+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
-+ * and/or sell copies of the Software, and to permit persons to whom the
-+ * Software is furnished to do so, subject to the following conditions:
-+ *
-+ * The above copyright notice and this permission notice (including the next
-+ * paragraph) shall be included in all copies or substantial portions of the
-+ * Software.
-+ *
-+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
-+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
-+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
-+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
-+ * DEALINGS IN THE SOFTWARE.
-+ *
-+ * Authors:
-+ *     David Airlie
-+ */
-+
-+#include <linux/module.h>
-+#include <linux/kernel.h>
-+#include <linux/errno.h>
-+#include <linux/string.h>
-+#include <linux/mm.h>
-+#include <linux/tty.h>
-+#include <linux/sysrq.h>
-+#include <linux/delay.h>
-+#include <linux/fb.h>
-+#include <linux/init.h>
-+#include <linux/vga_switcheroo.h>
-+
-+#include <drm/drmP.h>
-+#include <drm/drm_crtc.h>
-+#include <drm/drm_fb_helper.h>
-+#include "intel_drv.h"
-+#include <drm/i915_drm.h>
-+#include "i915_drv.h"
-+
-+static struct fb_ops intelfb_ops = {
-+	.owner = THIS_MODULE,
-+	.fb_check_var = drm_fb_helper_check_var,
-+	.fb_set_par = drm_fb_helper_set_par,
-+	.fb_fillrect = cfb_fillrect,
-+	.fb_copyarea = cfb_copyarea,
-+	.fb_imageblit = cfb_imageblit,
-+	.fb_pan_display = drm_fb_helper_pan_display,
-+	.fb_blank = drm_fb_helper_blank,
-+	.fb_setcmap = drm_fb_helper_setcmap,
-+	.fb_debug_enter = drm_fb_helper_debug_enter,
-+	.fb_debug_leave = drm_fb_helper_debug_leave,
-+};
-+
-+static int intelfb_create(struct drm_fb_helper *helper,
-+			  struct drm_fb_helper_surface_size *sizes)
-+{
-+	struct intel_fbdev *ifbdev =
-+		container_of(helper, struct intel_fbdev, helper);
-+	struct drm_device *dev = helper->dev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct fb_info *info;
-+	struct drm_framebuffer *fb;
-+	struct drm_mode_fb_cmd2 mode_cmd = {};
-+	struct drm_i915_gem_object *obj;
-+	struct device *device = &dev->pdev->dev;
-+	int size, ret;
-+
-+	/* we don't do packed 24bpp */
-+	if (sizes->surface_bpp == 24)
-+		sizes->surface_bpp = 32;
-+
-+	mode_cmd.width = sizes->surface_width;
-+	mode_cmd.height = sizes->surface_height;
-+
-+	mode_cmd.pitches[0] = ALIGN(mode_cmd.width * ((sizes->surface_bpp + 7) /
-+						      8), 64);
-+	mode_cmd.pixel_format = drm_mode_legacy_fb_format(sizes->surface_bpp,
-+							  sizes->surface_depth);
-+
-+	size = mode_cmd.pitches[0] * mode_cmd.height;
-+	size = ALIGN(size, PAGE_SIZE);
-+	obj = i915_gem_object_create_stolen(dev, size);
-+	if (obj == NULL)
-+		obj = i915_gem_alloc_object(dev, size);
-+	if (!obj) {
-+		DRM_ERROR("failed to allocate framebuffer\n");
-+		ret = -ENOMEM;
-+		goto out;
-+	}
-+
-+	mutex_lock(&dev->struct_mutex);
-+
-+	/* Flush everything out, we'll be doing GTT only from now on */
-+	ret = intel_pin_and_fence_fb_obj(dev, obj, NULL);
-+	if (ret) {
-+		DRM_ERROR("failed to pin fb: %d\n", ret);
-+		goto out_unref;
-+	}
-+
-+	info = framebuffer_alloc(0, device);
-+	if (!info) {
-+		ret = -ENOMEM;
-+		goto out_unpin;
-+	}
-+
-+	info->par = helper;
-+
-+	ret = intel_framebuffer_init(dev, &ifbdev->ifb, &mode_cmd, obj);
-+	if (ret)
-+		goto out_unpin;
-+
-+	fb = &ifbdev->ifb.base;
-+
-+	ifbdev->helper.fb = fb;
-+	ifbdev->helper.fbdev = info;
-+
-+	strcpy(info->fix.id, "inteldrmfb");
-+
-+	info->flags = FBINFO_DEFAULT | FBINFO_CAN_FORCE_OUTPUT;
-+	info->fbops = &intelfb_ops;
-+
-+	ret = fb_alloc_cmap(&info->cmap, 256, 0);
-+	if (ret) {
-+		ret = -ENOMEM;
-+		goto out_unpin;
-+	}
-+	/* setup aperture base/size for vesafb takeover */
-+	info->apertures = alloc_apertures(1);
-+	if (!info->apertures) {
-+		ret = -ENOMEM;
-+		goto out_unpin;
-+	}
-+	info->apertures->ranges[0].base = dev->mode_config.fb_base;
-+	info->apertures->ranges[0].size = dev_priv->gtt.mappable_end;
-+
-+	info->fix.smem_start = dev->mode_config.fb_base + i915_gem_obj_ggtt_offset(obj);
-+	info->fix.smem_len = size;
-+
-+	info->screen_base =
-+		ioremap_wc(dev_priv->gtt.mappable_base + i915_gem_obj_ggtt_offset(obj),
-+			   size);
-+	if (!info->screen_base) {
-+		ret = -ENOSPC;
-+		goto out_unpin;
-+	}
-+	info->screen_size = size;
-+
-+	/* This driver doesn't need a VT switch to restore the mode on resume */
-+	info->skip_vt_switch = true;
-+
-+	drm_fb_helper_fill_fix(info, fb->pitches[0], fb->depth);
-+	drm_fb_helper_fill_var(info, &ifbdev->helper, sizes->fb_width, sizes->fb_height);
-+
-+	/* If the object is shmemfs backed, it will have given us zeroed pages.
-+	 * If the object is stolen however, it will be full of whatever
-+	 * garbage was left in there.
-+	 */
-+	if (ifbdev->ifb.obj->stolen)
-+		memset_io(info->screen_base, 0, info->screen_size);
-+
-+	/* Use default scratch pixmap (info->pixmap.flags = FB_PIXMAP_SYSTEM) */
-+
-+	DRM_DEBUG_KMS("allocated %dx%d fb: 0x%08lx, bo %p\n",
-+		      fb->width, fb->height,
-+		      i915_gem_obj_ggtt_offset(obj), obj);
-+
-+
-+	mutex_unlock(&dev->struct_mutex);
-+	vga_switcheroo_client_fb_set(dev->pdev, info);
-+	return 0;
-+
-+out_unpin:
-+	i915_gem_object_unpin(obj);
-+out_unref:
-+	drm_gem_object_unreference(&obj->base);
-+	mutex_unlock(&dev->struct_mutex);
-+out:
-+	return ret;
-+}
-+
-+/** Sets the color ramps on behalf of RandR */
-+static void intel_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
-+				    u16 blue, int regno)
-+{
-+	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
-+
-+	intel_crtc->lut_r[regno] = red >> 8;
-+	intel_crtc->lut_g[regno] = green >> 8;
-+	intel_crtc->lut_b[regno] = blue >> 8;
-+}
-+
-+static void intel_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
-+				    u16 *blue, int regno)
-+{
-+	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
-+
-+	*red = intel_crtc->lut_r[regno] << 8;
-+	*green = intel_crtc->lut_g[regno] << 8;
-+	*blue = intel_crtc->lut_b[regno] << 8;
-+}
-+
-+static struct drm_fb_helper_funcs intel_fb_helper_funcs = {
-+	.gamma_set = intel_crtc_fb_gamma_set,
-+	.gamma_get = intel_crtc_fb_gamma_get,
-+	.fb_probe = intelfb_create,
-+};
-+
-+static void intel_fbdev_destroy(struct drm_device *dev,
-+				struct intel_fbdev *ifbdev)
-+{
-+	if (ifbdev->helper.fbdev) {
-+		struct fb_info *info = ifbdev->helper.fbdev;
-+
-+		unregister_framebuffer(info);
-+		iounmap(info->screen_base);
-+		if (info->cmap.len)
-+			fb_dealloc_cmap(&info->cmap);
-+
-+		framebuffer_release(info);
-+	}
-+
-+	drm_fb_helper_fini(&ifbdev->helper);
-+
-+	drm_framebuffer_unregister_private(&ifbdev->ifb.base);
-+	intel_framebuffer_fini(&ifbdev->ifb);
-+}
-+
-+int intel_fbdev_init(struct drm_device *dev)
-+{
-+	struct intel_fbdev *ifbdev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	int ret;
-+
-+	ifbdev = kzalloc(sizeof(*ifbdev), GFP_KERNEL);
-+	if (!ifbdev)
-+		return -ENOMEM;
-+
-+	dev_priv->fbdev = ifbdev;
-+	ifbdev->helper.funcs = &intel_fb_helper_funcs;
-+
-+	ret = drm_fb_helper_init(dev, &ifbdev->helper,
-+				 INTEL_INFO(dev)->num_pipes,
-+				 4);
-+	if (ret) {
-+		kfree(ifbdev);
-+		return ret;
-+	}
-+
-+	drm_fb_helper_single_add_all_connectors(&ifbdev->helper);
-+
-+	return 0;
-+}
-+
-+void intel_fbdev_initial_config(struct drm_device *dev)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+
-+	/* Due to peculiar init order wrt to hpd handling this is separate. */
-+	drm_fb_helper_initial_config(&dev_priv->fbdev->helper, 32);
-+}
-+
-+void intel_fbdev_fini(struct drm_device *dev)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	if (!dev_priv->fbdev)
-+		return;
-+
-+	intel_fbdev_destroy(dev, dev_priv->fbdev);
-+	kfree(dev_priv->fbdev);
-+	dev_priv->fbdev = NULL;
-+}
-+
-+void intel_fbdev_set_suspend(struct drm_device *dev, int state)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct intel_fbdev *ifbdev = dev_priv->fbdev;
-+	struct fb_info *info;
-+
-+	if (!ifbdev)
-+		return;
-+
-+	info = ifbdev->helper.fbdev;
-+
-+	/* On resume from hibernation: If the object is shmemfs backed, it has
-+	 * been restored from swap. If the object is stolen however, it will be
-+	 * full of whatever garbage was left in there.
-+	 */
-+	if (state == FBINFO_STATE_RUNNING && ifbdev->ifb.obj->stolen)
-+		memset_io(info->screen_base, 0, info->screen_size);
-+
-+	fb_set_suspend(info, state);
-+}
-+
-+MODULE_LICENSE("GPL and additional rights");
-+
-+void intel_fbdev_output_poll_changed(struct drm_device *dev)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	drm_fb_helper_hotplug_event(&dev_priv->fbdev->helper);
-+}
-+
-+void intel_fbdev_restore_mode(struct drm_device *dev)
-+{
-+	int ret;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+
-+	if (INTEL_INFO(dev)->num_pipes == 0)
-+		return;
-+
-+	drm_modeset_lock_all(dev);
-+
-+	ret = drm_fb_helper_restore_fbdev_mode(&dev_priv->fbdev->helper);
-+	if (ret)
-+		DRM_DEBUG("failed to restore crtc mode\n");
-+
-+	drm_modeset_unlock_all(dev);
-+}
diff --git a/patches.baytrail/1073-drm-i915-Fix-pre-CTG-vblank-counter.patch b/patches.baytrail/1073-drm-i915-Fix-pre-CTG-vblank-counter.patch
deleted file mode 100644
index eff07aabb5649..0000000000000
--- a/patches.baytrail/1073-drm-i915-Fix-pre-CTG-vblank-counter.patch
+++ /dev/null
@@ -1,109 +0,0 @@
-From b48f9c9e051f2629ce67a21d6c8bb67bbd627674 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Wed, 25 Sep 2013 19:55:26 +0300
-Subject: drm/i915: Fix pre-CTG vblank counter
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The old style frame counter increments at the start of active video.
-However for i915_get_vblank_counter() we want a counter that increments
-at the start of vblank.
-
-Fortunately the low frame counter register also contains the pixel
-counter for the current frame. We can can compare that against the
-vblank start pixel count to determine if we need to increment the
-frame counter by 1 to get the correct answer.
-
-Also reorganize the function pointer assignments in intel_irq_init() a
-bit to avoid confusing people.
-
-Cc: Mario Kleiner <mario.kleiner@tuebingen.mpg.de>
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Mario Kleiner <mario.kleiner@tuebingen.mpg.de>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 391f75e2bf13f105d9e4a120736ccdd8e3bc638b)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 36 +++++++++++++++++++++++++++++++-----
- 1 file changed, 31 insertions(+), 5 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index 36279202ddc0..1f91e1a8bfd1 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -526,7 +526,7 @@ static u32 i915_get_vblank_counter(struct drm_device *dev, int pipe)
- 	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
- 	unsigned long high_frame;
- 	unsigned long low_frame;
--	u32 high1, high2, low;
-+	u32 high1, high2, low, pixel, vbl_start;
- 
- 	if (!i915_pipe_enabled(dev, pipe)) {
- 		DRM_DEBUG_DRIVER("trying to get vblank count for disabled "
-@@ -534,6 +534,24 @@ static u32 i915_get_vblank_counter(struct drm_device *dev, int pipe)
- 		return 0;
- 	}
- 
-+	if (drm_core_check_feature(dev, DRIVER_MODESET)) {
-+		struct intel_crtc *intel_crtc =
-+			to_intel_crtc(dev_priv->pipe_to_crtc_mapping[pipe]);
-+		const struct drm_display_mode *mode =
-+			&intel_crtc->config.adjusted_mode;
-+
-+		vbl_start = mode->crtc_vblank_start * mode->crtc_htotal;
-+	} else {
-+		enum transcoder cpu_transcoder =
-+			intel_pipe_to_cpu_transcoder(dev_priv, pipe);
-+		u32 htotal;
-+
-+		htotal = ((I915_READ(HTOTAL(cpu_transcoder)) >> 16) & 0x1fff) + 1;
-+		vbl_start = (I915_READ(VBLANK(cpu_transcoder)) & 0x1fff) + 1;
-+
-+		vbl_start *= htotal;
-+	}
-+
- 	high_frame = PIPEFRAME(pipe);
- 	low_frame = PIPEFRAMEPIXEL(pipe);
- 
-@@ -544,13 +562,20 @@ static u32 i915_get_vblank_counter(struct drm_device *dev, int pipe)
- 	 */
- 	do {
- 		high1 = I915_READ(high_frame) & PIPE_FRAME_HIGH_MASK;
--		low   = I915_READ(low_frame)  & PIPE_FRAME_LOW_MASK;
-+		low   = I915_READ(low_frame);
- 		high2 = I915_READ(high_frame) & PIPE_FRAME_HIGH_MASK;
- 	} while (high1 != high2);
- 
- 	high1 >>= PIPE_FRAME_HIGH_SHIFT;
-+	pixel = low & PIPE_PIXEL_MASK;
- 	low >>= PIPE_FRAME_LOW_SHIFT;
--	return (high1 << 8) | low;
-+
-+	/*
-+	 * The frame counter increments at beginning of active.
-+	 * Cook up a vblank counter by also checking the pixel
-+	 * counter against vblank start.
-+	 */
-+	return ((high1 << 8) | low) + (pixel >= vbl_start);
- }
- 
- static u32 gm45_get_vblank_counter(struct drm_device *dev, int pipe)
-@@ -3155,11 +3180,12 @@ void intel_irq_init(struct drm_device *dev)
- 
- 	pm_qos_add_request(&dev_priv->pm_qos, PM_QOS_CPU_DMA_LATENCY, PM_QOS_DEFAULT_VALUE);
- 
--	dev->driver->get_vblank_counter = i915_get_vblank_counter;
--	dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */
- 	if (IS_G4X(dev) || INTEL_INFO(dev)->gen >= 5) {
- 		dev->max_vblank_count = 0xffffffff; /* full 32 bit counter */
- 		dev->driver->get_vblank_counter = gm45_get_vblank_counter;
-+	} else {
-+		dev->driver->get_vblank_counter = i915_get_vblank_counter;
-+		dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */
- 	}
- 
- 	if (drm_core_check_feature(dev, DRIVER_MODESET))
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1074-drm-i915-Add-breadcrumbs-for-why-the-backlight-is-be.patch b/patches.baytrail/1074-drm-i915-Add-breadcrumbs-for-why-the-backlight-is-be.patch
deleted file mode 100644
index dbe5a11176ef5..0000000000000
--- a/patches.baytrail/1074-drm-i915-Add-breadcrumbs-for-why-the-backlight-is-be.patch
+++ /dev/null
@@ -1,57 +0,0 @@
-From 3707f94eb0499b0b4492ea61b3a93b8f80d34496 Mon Sep 17 00:00:00 2001
-From: Chris Wilson <chris@chris-wilson.co.uk>
-Date: Sun, 13 Oct 2013 12:56:31 +0100
-Subject: drm/i915: Add breadcrumbs for why the backlight is being set
-
-At the moment we have 3 paths that lead to actually_set_backlight(),
-from modesetting, ACPI/OpRegion requests and our very own
-intel_backlight interface, and we have no way of distinguishing them in
-the debug log. So add a debug breadcrumb to explain the source of the
-backlight changes.
-
-Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 540b5d02766863c561afe9f9d56ce0425022a731)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_opregion.c | 1 +
- drivers/gpu/drm/i915/intel_panel.c    | 4 ++++
- 2 files changed, 5 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/intel_opregion.c b/drivers/gpu/drm/i915/intel_opregion.c
-index 904464023c8f..b82050c96f3e 100644
---- a/drivers/gpu/drm/i915/intel_opregion.c
-+++ b/drivers/gpu/drm/i915/intel_opregion.c
-@@ -407,6 +407,7 @@ static u32 asle_set_backlight(struct drm_device *dev, u32 bclp)
- 	if (bclp > 255)
- 		return ASLC_BACKLIGHT_FAILED;
- 
-+	DRM_DEBUG_KMS("updating opregion backlight %d/255\n", bclp);
- 	intel_panel_set_backlight(dev, bclp, 255);
- 	iowrite32(DIV_ROUND_UP(bclp * 100, 255) | ASLE_CBLV_VALID, &asle->cblv);
- 
-diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
-index 54684168de1e..1f2996031ad9 100644
---- a/drivers/gpu/drm/i915/intel_panel.c
-+++ b/drivers/gpu/drm/i915/intel_panel.c
-@@ -574,6 +574,8 @@ void intel_panel_enable_backlight(struct drm_device *dev,
- 		intel_pipe_to_cpu_transcoder(dev_priv, pipe);
- 	unsigned long flags;
- 
-+	DRM_DEBUG_KMS("pipe=%d\n", pipe);
-+
- 	spin_lock_irqsave(&dev_priv->backlight.lock, flags);
- 
- 	if (dev_priv->backlight.level == 0) {
-@@ -680,6 +682,8 @@ intel_panel_detect(struct drm_device *dev)
- static int intel_panel_update_status(struct backlight_device *bd)
- {
- 	struct drm_device *dev = bl_get_data(bd);
-+	DRM_DEBUG_KMS("updating intel_backlight, brightness=%d/%d\n",
-+		      bd->props.brightness, bd->props.max_brightness);
- 	intel_panel_set_backlight(dev, bd->props.brightness,
- 				  bd->props.max_brightness);
- 	return 0;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1075-drm-i915-Use-DIV_ROUND_CLOSEST-to-calculate-dot-vco.patch b/patches.baytrail/1075-drm-i915-Use-DIV_ROUND_CLOSEST-to-calculate-dot-vco.patch
deleted file mode 100644
index 10f5bc059493b..0000000000000
--- a/patches.baytrail/1075-drm-i915-Use-DIV_ROUND_CLOSEST-to-calculate-dot-vco.patch
+++ /dev/null
@@ -1,60 +0,0 @@
-From f663ca0720a1c16536b78181f95962160e7bdedb Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Mon, 14 Oct 2013 14:50:30 +0300
-Subject: drm/i915: Use DIV_ROUND_CLOSEST() to calculate dot/vco
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Rounding down when calculating the dot/vco frequencies doesn't make much
-sense. Round to closest should give slightly nicer answers.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit fb03ac0106bcc1d5576f1e94161e41a2ef4da1f3)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 12 ++++++------
- 1 file changed, 6 insertions(+), 6 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 548b1c914a1f..32cd88cb8580 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -329,8 +329,8 @@ static void vlv_clock(int refclk, intel_clock_t *clock)
- {
- 	clock->m = clock->m1 * clock->m2;
- 	clock->p = clock->p1 * clock->p2;
--	clock->vco = refclk * clock->m / clock->n;
--	clock->dot = clock->vco / clock->p;
-+	clock->vco = DIV_ROUND_CLOSEST(refclk * clock->m, clock->n);
-+	clock->dot = DIV_ROUND_CLOSEST(clock->vco, clock->p);
- }
- 
- /**
-@@ -430,8 +430,8 @@ static void pineview_clock(int refclk, intel_clock_t *clock)
- {
- 	clock->m = clock->m2 + 2;
- 	clock->p = clock->p1 * clock->p2;
--	clock->vco = refclk * clock->m / clock->n;
--	clock->dot = clock->vco / clock->p;
-+	clock->vco = DIV_ROUND_CLOSEST(refclk * clock->m, clock->n);
-+	clock->dot = DIV_ROUND_CLOSEST(clock->vco, clock->p);
- }
- 
- static uint32_t i9xx_dpll_compute_m(struct dpll *dpll)
-@@ -443,8 +443,8 @@ static void i9xx_clock(int refclk, intel_clock_t *clock)
- {
- 	clock->m = i9xx_dpll_compute_m(clock);
- 	clock->p = clock->p1 * clock->p2;
--	clock->vco = refclk * clock->m / (clock->n + 2);
--	clock->dot = clock->vco / clock->p;
-+	clock->vco = DIV_ROUND_CLOSEST(refclk * clock->m, clock->n + 2);
-+	clock->dot = DIV_ROUND_CLOSEST(clock->vco, clock->p);
- }
- 
- #define INTELPllInvalid(s)   do { /* DRM_DEBUG(s); */ return false; } while (0)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1076-drm-i915-Use-vlv_clock-in-vlv_crtc_clock_get.patch b/patches.baytrail/1076-drm-i915-Use-vlv_clock-in-vlv_crtc_clock_get.patch
deleted file mode 100644
index 9dd3f41735c4d..0000000000000
--- a/patches.baytrail/1076-drm-i915-Use-vlv_clock-in-vlv_crtc_clock_get.patch
+++ /dev/null
@@ -1,40 +0,0 @@
-From 17b99107159758042d73cbbdb5bc4dd844570ee4 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Mon, 14 Oct 2013 14:50:31 +0300
-Subject: drm/i915: Use vlv_clock() in vlv_crtc_clock_get()
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Avoid some code duplication.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit f646628b9f40cbd1c13a0eb190901c6a78395be6)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c | 6 +++---
- 1 file changed, 3 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index 32cd88cb8580..fb210b0774af 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -5211,10 +5211,10 @@ static void vlv_crtc_clock_get(struct intel_crtc *crtc,
- 	clock.p1 = (mdiv >> DPIO_P1_SHIFT) & 7;
- 	clock.p2 = (mdiv >> DPIO_P2_SHIFT) & 0x1f;
- 
--	clock.vco = refclk * clock.m1 * clock.m2 / clock.n;
--	clock.dot = 2 * clock.vco / (clock.p1 * clock.p2);
-+	vlv_clock(refclk, &clock);
- 
--	pipe_config->port_clock = clock.dot / 10;
-+	/* clock.dot is the fast clock */
-+	pipe_config->port_clock = clock.dot / 5;
- }
- 
- static bool i9xx_get_pipe_config(struct intel_crtc *crtc,
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1077-drm-i915-Skip-register-reads-in-i915_get_crtc_scanou.patch b/patches.baytrail/1077-drm-i915-Skip-register-reads-in-i915_get_crtc_scanou.patch
deleted file mode 100644
index e52513aaa19c4..0000000000000
--- a/patches.baytrail/1077-drm-i915-Skip-register-reads-in-i915_get_crtc_scanou.patch
+++ /dev/null
@@ -1,122 +0,0 @@
-From 15ea6096dea84393e5346a7355ef4aa1a3dc2468 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Mon, 23 Sep 2013 14:48:50 +0300
-Subject: drm/i915: Skip register reads in i915_get_crtc_scanoutpos()
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-We have all the information we need in the mode structure, so going and
-reading it from the hardware is pointless, and slower.
-
-We never populated ->get_vblank_timestamp() in the UMS case, and as that
-is the only way we'd ever call ->get_scanout_position(), we can
-completely ignore UMS in i915_get_crtc_scanoutpos().
-
-Also reorganize intel_irq_init() a bit to clarify the KMS vs. UMS
-situation.
-
-v2: Drop UMS code
-
-Cc: Mario Kleiner <mario.kleiner@tuebingen.mpg.de>
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: mario.kleiner.de@gmail.com
-Tested-by: mario.kleiner.de@gmail.com
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit c2baf4b7097cb66e7ee3c2fa0f585d386dab6300)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 43 ++++++++++++++++-------------------------
- 1 file changed, 17 insertions(+), 26 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index 1f91e1a8bfd1..cc35d52f0166 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -595,24 +595,29 @@ static u32 gm45_get_vblank_counter(struct drm_device *dev, int pipe)
- static int i915_get_crtc_scanoutpos(struct drm_device *dev, int pipe,
- 			     int *vpos, int *hpos)
- {
--	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
--	u32 vbl = 0, position = 0;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct drm_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe];
-+	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
-+	const struct drm_display_mode *mode = &intel_crtc->config.adjusted_mode;
-+	u32 position;
- 	int vbl_start, vbl_end, htotal, vtotal;
- 	bool in_vbl = true;
- 	int ret = 0;
--	enum transcoder cpu_transcoder = intel_pipe_to_cpu_transcoder(dev_priv,
--								      pipe);
- 
--	if (!i915_pipe_enabled(dev, pipe)) {
-+	if (!intel_crtc->active) {
- 		DRM_DEBUG_DRIVER("trying to get scanoutpos for disabled "
- 				 "pipe %c\n", pipe_name(pipe));
- 		return 0;
- 	}
- 
--	/* Get vtotal. */
--	vtotal = 1 + ((I915_READ(VTOTAL(cpu_transcoder)) >> 16) & 0x1fff);
-+	htotal = mode->crtc_htotal;
-+	vtotal = mode->crtc_vtotal;
-+	vbl_start = mode->crtc_vblank_start;
-+	vbl_end = mode->crtc_vblank_end;
- 
--	if (INTEL_INFO(dev)->gen >= 4) {
-+	ret |= DRM_SCANOUTPOS_VALID | DRM_SCANOUTPOS_ACCURATE;
-+
-+	if (IS_G4X(dev) || INTEL_INFO(dev)->gen >= 5) {
- 		/* No obvious pixelcount register. Only query vertical
- 		 * scanout position from Display scan line register.
- 		 */
-@@ -630,29 +635,16 @@ static int i915_get_crtc_scanoutpos(struct drm_device *dev, int pipe,
- 		 */
- 		position = (I915_READ(PIPEFRAMEPIXEL(pipe)) & PIPE_PIXEL_MASK) >> PIPE_PIXEL_SHIFT;
- 
--		htotal = 1 + ((I915_READ(HTOTAL(cpu_transcoder)) >> 16) & 0x1fff);
- 		*vpos = position / htotal;
- 		*hpos = position - (*vpos * htotal);
- 	}
- 
--	/* Query vblank area. */
--	vbl = I915_READ(VBLANK(cpu_transcoder));
--
--	/* Test position against vblank region. */
--	vbl_start = vbl & 0x1fff;
--	vbl_end = (vbl >> 16) & 0x1fff;
--
--	if ((*vpos < vbl_start) || (*vpos > vbl_end))
--		in_vbl = false;
-+	in_vbl = *vpos >= vbl_start && *vpos < vbl_end;
- 
- 	/* Inside "upper part" of vblank area? Apply corrective offset: */
- 	if (in_vbl && (*vpos >= vbl_start))
- 		*vpos = *vpos - vtotal;
- 
--	/* Readouts valid? */
--	if (vbl > 0)
--		ret |= DRM_SCANOUTPOS_VALID | DRM_SCANOUTPOS_ACCURATE;
--
- 	/* In vblank? */
- 	if (in_vbl)
- 		ret |= DRM_SCANOUTPOS_INVBL;
-@@ -3188,11 +3180,10 @@ void intel_irq_init(struct drm_device *dev)
- 		dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */
- 	}
- 
--	if (drm_core_check_feature(dev, DRIVER_MODESET))
-+	if (drm_core_check_feature(dev, DRIVER_MODESET)) {
- 		dev->driver->get_vblank_timestamp = i915_get_vblank_timestamp;
--	else
--		dev->driver->get_vblank_timestamp = NULL;
--	dev->driver->get_scanout_position = i915_get_crtc_scanoutpos;
-+		dev->driver->get_scanout_position = i915_get_crtc_scanoutpos;
-+	}
- 
- 	if (IS_VALLEYVIEW(dev)) {
- 		dev->driver->irq_handler = valleyview_irq_handler;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1078-drm-i915-Fix-scanoutpos-calculations.patch b/patches.baytrail/1078-drm-i915-Fix-scanoutpos-calculations.patch
deleted file mode 100644
index 7c97b0a666a3d..0000000000000
--- a/patches.baytrail/1078-drm-i915-Fix-scanoutpos-calculations.patch
+++ /dev/null
@@ -1,106 +0,0 @@
-From 29aa390c3c262376a3396bc0f6649065641ad98f Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Fri, 11 Oct 2013 19:10:32 +0300
-Subject: drm/i915: Fix scanoutpos calculations
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The reported scanout position must be relative to the end of vblank.
-Currently we manage to fumble that in a few ways.
-
-First we don't consider the case when vtotal != vbl_end. While that
-isn't very common (happens maybe only w/ old panel fitting hardware),
-we can fix it easily enough.
-
-The second issue is that on pre-CTG hardware we convert the pixel count
-to horizontal/vertical components at the very beginning, and then forget
-to adjust the horizontal component to be relative to vbl_end. So instead
-we should keep our numbers in the pixel count domain while we're
-adjusting the position to be relative to vbl_end. Then when we do the
-conversion in the end, both vertical _and_ horizontal components will
-come out correct.
-
-v2: Change position to int from u32 to avoid sign issues
-
-Cc: Mario Kleiner <mario.kleiner@tuebingen.mpg.de>
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: mario.kleiner.de@gmail.com
-Tested-by: mario.kleiner.de@gmail.com
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 3aa18df8f22f24ab6ccd4155cb34ef6bff2f2a1c)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 39 +++++++++++++++++++++++++--------------
- 1 file changed, 25 insertions(+), 14 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index cc35d52f0166..a923dea245ac 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -599,7 +599,7 @@ static int i915_get_crtc_scanoutpos(struct drm_device *dev, int pipe,
- 	struct drm_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe];
- 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
- 	const struct drm_display_mode *mode = &intel_crtc->config.adjusted_mode;
--	u32 position;
-+	int position;
- 	int vbl_start, vbl_end, htotal, vtotal;
- 	bool in_vbl = true;
- 	int ret = 0;
-@@ -621,13 +621,7 @@ static int i915_get_crtc_scanoutpos(struct drm_device *dev, int pipe,
- 		/* No obvious pixelcount register. Only query vertical
- 		 * scanout position from Display scan line register.
- 		 */
--		position = I915_READ(PIPEDSL(pipe));
--
--		/* Decode into vertical scanout position. Don't have
--		 * horizontal scanout position.
--		 */
--		*vpos = position & 0x1fff;
--		*hpos = 0;
-+		position = I915_READ(PIPEDSL(pipe)) & 0x1fff;
- 	} else {
- 		/* Have access to pixelcount since start of frame.
- 		 * We can split this into vertical and horizontal
-@@ -635,15 +629,32 @@ static int i915_get_crtc_scanoutpos(struct drm_device *dev, int pipe,
- 		 */
- 		position = (I915_READ(PIPEFRAMEPIXEL(pipe)) & PIPE_PIXEL_MASK) >> PIPE_PIXEL_SHIFT;
- 
--		*vpos = position / htotal;
--		*hpos = position - (*vpos * htotal);
-+		/* convert to pixel counts */
-+		vbl_start *= htotal;
-+		vbl_end *= htotal;
-+		vtotal *= htotal;
- 	}
- 
--	in_vbl = *vpos >= vbl_start && *vpos < vbl_end;
-+	in_vbl = position >= vbl_start && position < vbl_end;
-+
-+	/*
-+	 * While in vblank, position will be negative
-+	 * counting up towards 0 at vbl_end. And outside
-+	 * vblank, position will be positive counting
-+	 * up since vbl_end.
-+	 */
-+	if (position >= vbl_start)
-+		position -= vbl_end;
-+	else
-+		position += vtotal - vbl_end;
- 
--	/* Inside "upper part" of vblank area? Apply corrective offset: */
--	if (in_vbl && (*vpos >= vbl_start))
--		*vpos = *vpos - vtotal;
-+	if (IS_G4X(dev) || INTEL_INFO(dev)->gen >= 5) {
-+		*vpos = position;
-+		*hpos = 0;
-+	} else {
-+		*vpos = position / htotal;
-+		*hpos = position - (*vpos * htotal);
-+	}
- 
- 	/* In vblank? */
- 	if (in_vbl)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1079-drm-i915-Improve-the-accuracy-of-get_scanout_pos-on-.patch b/patches.baytrail/1079-drm-i915-Improve-the-accuracy-of-get_scanout_pos-on-.patch
deleted file mode 100644
index 203ebb29d9fd0..0000000000000
--- a/patches.baytrail/1079-drm-i915-Improve-the-accuracy-of-get_scanout_pos-on-.patch
+++ /dev/null
@@ -1,100 +0,0 @@
-From c58bf6e808cf561f250f1bec86a8c704dfa4dc19 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Mon, 23 Sep 2013 13:02:07 +0300
-Subject: drm/i915: Improve the accuracy of get_scanout_pos on CTG+
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The DSL register increments at the start of horizontal sync, so it
-manages to miss the entire active portion of the current line.
-
-Improve the get_scanoutpos accuracy a bit when the scanout position is
-close to the start or end of vblank. We can do that by double checking
-the DSL value against the vblank status bit from ISR.
-
-Cc: Mario Kleiner <mario.kleiner@tuebingen.mpg.de>
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: mario.kleiner.de@gmail.com
-Tested-by: mario.kleiner.de@gmail.com
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 54ddcbd26a677524d4bcd9f2a9539e6d743592d8)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 53 +++++++++++++++++++++++++++++++++++++++++
- 1 file changed, 53 insertions(+)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index a923dea245ac..dfa5c68c2763 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -592,6 +592,47 @@ static u32 gm45_get_vblank_counter(struct drm_device *dev, int pipe)
- 	return I915_READ(reg);
- }
- 
-+static bool g4x_pipe_in_vblank(struct drm_device *dev, enum pipe pipe)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	uint32_t status;
-+
-+	if (IS_VALLEYVIEW(dev)) {
-+		status = pipe == PIPE_A ?
-+			I915_DISPLAY_PIPE_A_VBLANK_INTERRUPT :
-+			I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT;
-+
-+		return I915_READ(VLV_ISR) & status;
-+	} else if (IS_G4X(dev)) {
-+		status = pipe == PIPE_A ?
-+			I915_DISPLAY_PIPE_A_VBLANK_INTERRUPT :
-+			I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT;
-+
-+		return I915_READ(ISR) & status;
-+	} else if (INTEL_INFO(dev)->gen < 7) {
-+		status = pipe == PIPE_A ?
-+			DE_PIPEA_VBLANK :
-+			DE_PIPEB_VBLANK;
-+
-+		return I915_READ(DEISR) & status;
-+	} else {
-+		switch (pipe) {
-+		default:
-+		case PIPE_A:
-+			status = DE_PIPEA_VBLANK_IVB;
-+			break;
-+		case PIPE_B:
-+			status = DE_PIPEB_VBLANK_IVB;
-+			break;
-+		case PIPE_C:
-+			status = DE_PIPEC_VBLANK_IVB;
-+			break;
-+		}
-+
-+		return I915_READ(DEISR) & status;
-+	}
-+}
-+
- static int i915_get_crtc_scanoutpos(struct drm_device *dev, int pipe,
- 			     int *vpos, int *hpos)
- {
-@@ -622,6 +663,18 @@ static int i915_get_crtc_scanoutpos(struct drm_device *dev, int pipe,
- 		 * scanout position from Display scan line register.
- 		 */
- 		position = I915_READ(PIPEDSL(pipe)) & 0x1fff;
-+
-+		/*
-+		 * The scanline counter increments at the leading edge
-+		 * of hsync, ie. it completely misses the active portion
-+		 * of the line. Fix up the counter at both edges of vblank
-+		 * to get a more accurate picture whether we're in vblank
-+		 * or not.
-+		 */
-+		in_vbl = g4x_pipe_in_vblank(dev, pipe);
-+		if ((in_vbl && position == vbl_start - 1) ||
-+		    (!in_vbl && position == vbl_end - 1))
-+			position = (position + 1) % vtotal;
- 	} else {
- 		/* Have access to pixelcount since start of frame.
- 		 * We can split this into vertical and horizontal
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1080-drm-i915-Fix-gen2-scanout-position-readout.patch b/patches.baytrail/1080-drm-i915-Fix-gen2-scanout-position-readout.patch
deleted file mode 100644
index 19e5ea7009e15..0000000000000
--- a/patches.baytrail/1080-drm-i915-Fix-gen2-scanout-position-readout.patch
+++ /dev/null
@@ -1,86 +0,0 @@
-From 0a627e7008591b303e4c8cc26e3a202f07c80d28 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Fri, 11 Oct 2013 21:52:43 +0300
-Subject: drm/i915: Fix gen2 scanout position readout
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Gen2 doesn't have the pixelcount register that gen3 and gen4 have.
-Instead we must use the scanline counter like we do for ctg+.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 7c06b08a3073de570f6f0261dae6247cce98f2ab)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 21 +++++++++++++++------
- 1 file changed, 15 insertions(+), 6 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index dfa5c68c2763..a7174ac7c5e6 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -592,7 +592,7 @@ static u32 gm45_get_vblank_counter(struct drm_device *dev, int pipe)
- 	return I915_READ(reg);
- }
- 
--static bool g4x_pipe_in_vblank(struct drm_device *dev, enum pipe pipe)
-+static bool intel_pipe_in_vblank(struct drm_device *dev, enum pipe pipe)
- {
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	uint32_t status;
-@@ -603,7 +603,13 @@ static bool g4x_pipe_in_vblank(struct drm_device *dev, enum pipe pipe)
- 			I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT;
- 
- 		return I915_READ(VLV_ISR) & status;
--	} else if (IS_G4X(dev)) {
-+	} else if (IS_GEN2(dev)) {
-+		status = pipe == PIPE_A ?
-+			I915_DISPLAY_PIPE_A_VBLANK_INTERRUPT :
-+			I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT;
-+
-+		return I915_READ16(ISR) & status;
-+	} else if (INTEL_INFO(dev)->gen < 5) {
- 		status = pipe == PIPE_A ?
- 			I915_DISPLAY_PIPE_A_VBLANK_INTERRUPT :
- 			I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT;
-@@ -658,11 +664,14 @@ static int i915_get_crtc_scanoutpos(struct drm_device *dev, int pipe,
- 
- 	ret |= DRM_SCANOUTPOS_VALID | DRM_SCANOUTPOS_ACCURATE;
- 
--	if (IS_G4X(dev) || INTEL_INFO(dev)->gen >= 5) {
-+	if (IS_GEN2(dev) || IS_G4X(dev) || INTEL_INFO(dev)->gen >= 5) {
- 		/* No obvious pixelcount register. Only query vertical
- 		 * scanout position from Display scan line register.
- 		 */
--		position = I915_READ(PIPEDSL(pipe)) & 0x1fff;
-+		if (IS_GEN2(dev))
-+			position = I915_READ(PIPEDSL(pipe)) & DSL_LINEMASK_GEN2;
-+		else
-+			position = I915_READ(PIPEDSL(pipe)) & DSL_LINEMASK_GEN3;
- 
- 		/*
- 		 * The scanline counter increments at the leading edge
-@@ -671,7 +680,7 @@ static int i915_get_crtc_scanoutpos(struct drm_device *dev, int pipe,
- 		 * to get a more accurate picture whether we're in vblank
- 		 * or not.
- 		 */
--		in_vbl = g4x_pipe_in_vblank(dev, pipe);
-+		in_vbl = intel_pipe_in_vblank(dev, pipe);
- 		if ((in_vbl && position == vbl_start - 1) ||
- 		    (!in_vbl && position == vbl_end - 1))
- 			position = (position + 1) % vtotal;
-@@ -701,7 +710,7 @@ static int i915_get_crtc_scanoutpos(struct drm_device *dev, int pipe,
- 	else
- 		position += vtotal - vbl_end;
- 
--	if (IS_G4X(dev) || INTEL_INFO(dev)->gen >= 5) {
-+	if (IS_GEN2(dev) || IS_G4X(dev) || INTEL_INFO(dev)->gen >= 5) {
- 		*vpos = position;
- 		*hpos = 0;
- 	} else {
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1081-drm-i915-Don-t-pretend-that-gen2-has-a-hardware-fram.patch b/patches.baytrail/1081-drm-i915-Don-t-pretend-that-gen2-has-a-hardware-fram.patch
deleted file mode 100644
index b4446e3396614..0000000000000
--- a/patches.baytrail/1081-drm-i915-Don-t-pretend-that-gen2-has-a-hardware-fram.patch
+++ /dev/null
@@ -1,53 +0,0 @@
-From 158771632e60ac5dd6d91ae6d583504f6ebe5171 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Fri, 11 Oct 2013 21:52:44 +0300
-Subject: drm/i915: Don't pretend that gen2 has a hardware frame counter
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Gen2 doesn't have a hardware frame counter that can be read out. Just
-provide a stub .get_vblank_counter() that always returns 0 instead of
-trying to read non-existing registers.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 4cdb83ec9a72f741c75e20c8e412c505fc037f5f)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_irq.c | 11 ++++++++++-
- 1 file changed, 10 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
-index a7174ac7c5e6..26753b6ac0a1 100644
---- a/drivers/gpu/drm/i915/i915_irq.c
-+++ b/drivers/gpu/drm/i915/i915_irq.c
-@@ -518,6 +518,12 @@ i915_pipe_enabled(struct drm_device *dev, int pipe)
- 	}
- }
- 
-+static u32 i8xx_get_vblank_counter(struct drm_device *dev, int pipe)
-+{
-+	/* Gen2 doesn't have a hardware frame counter */
-+	return 0;
-+}
-+
- /* Called from drm generic code, passed a 'crtc', which
-  * we use as a pipe index
-  */
-@@ -3245,7 +3251,10 @@ void intel_irq_init(struct drm_device *dev)
- 
- 	pm_qos_add_request(&dev_priv->pm_qos, PM_QOS_CPU_DMA_LATENCY, PM_QOS_DEFAULT_VALUE);
- 
--	if (IS_G4X(dev) || INTEL_INFO(dev)->gen >= 5) {
-+	if (IS_GEN2(dev)) {
-+		dev->max_vblank_count = 0;
-+		dev->driver->get_vblank_counter = i8xx_get_vblank_counter;
-+	} else if (IS_G4X(dev) || INTEL_INFO(dev)->gen >= 5) {
- 		dev->max_vblank_count = 0xffffffff; /* full 32 bit counter */
- 		dev->driver->get_vblank_counter = gm45_get_vblank_counter;
- 	} else {
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1082-drm-dp-constify-DP-DPCD-helpers.patch b/patches.baytrail/1082-drm-dp-constify-DP-DPCD-helpers.patch
deleted file mode 100644
index 359dee834863f..0000000000000
--- a/patches.baytrail/1082-drm-dp-constify-DP-DPCD-helpers.patch
+++ /dev/null
@@ -1,144 +0,0 @@
-From 0798873fba81a17b493af725ddcbd8ec8e2f7a99 Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Fri, 27 Sep 2013 19:01:01 +0300
-Subject: drm/dp: constify DP DPCD helpers
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-None of the DP DPCD helpers need to modify the DPCD.
-
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit 0aec288130713cf7bcf97c929ac5fab6a8e00e44)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/drm_dp_helper.c | 16 ++++++++--------
- include/drm/drm_dp_helper.h     | 16 ++++++++--------
- 2 files changed, 16 insertions(+), 16 deletions(-)
-
-diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
-index 89e196627160..9e978aae8972 100644
---- a/drivers/gpu/drm/drm_dp_helper.c
-+++ b/drivers/gpu/drm/drm_dp_helper.c
-@@ -228,12 +228,12 @@ i2c_dp_aux_add_bus(struct i2c_adapter *adapter)
- EXPORT_SYMBOL(i2c_dp_aux_add_bus);
- 
- /* Helpers for DP link training */
--static u8 dp_link_status(u8 link_status[DP_LINK_STATUS_SIZE], int r)
-+static u8 dp_link_status(const u8 link_status[DP_LINK_STATUS_SIZE], int r)
- {
- 	return link_status[r - DP_LANE0_1_STATUS];
- }
- 
--static u8 dp_get_lane_status(u8 link_status[DP_LINK_STATUS_SIZE],
-+static u8 dp_get_lane_status(const u8 link_status[DP_LINK_STATUS_SIZE],
- 			     int lane)
- {
- 	int i = DP_LANE0_1_STATUS + (lane >> 1);
-@@ -242,7 +242,7 @@ static u8 dp_get_lane_status(u8 link_status[DP_LINK_STATUS_SIZE],
- 	return (l >> s) & 0xf;
- }
- 
--bool drm_dp_channel_eq_ok(u8 link_status[DP_LINK_STATUS_SIZE],
-+bool drm_dp_channel_eq_ok(const u8 link_status[DP_LINK_STATUS_SIZE],
- 			  int lane_count)
- {
- 	u8 lane_align;
-@@ -262,7 +262,7 @@ bool drm_dp_channel_eq_ok(u8 link_status[DP_LINK_STATUS_SIZE],
- }
- EXPORT_SYMBOL(drm_dp_channel_eq_ok);
- 
--bool drm_dp_clock_recovery_ok(u8 link_status[DP_LINK_STATUS_SIZE],
-+bool drm_dp_clock_recovery_ok(const u8 link_status[DP_LINK_STATUS_SIZE],
- 			      int lane_count)
- {
- 	int lane;
-@@ -277,7 +277,7 @@ bool drm_dp_clock_recovery_ok(u8 link_status[DP_LINK_STATUS_SIZE],
- }
- EXPORT_SYMBOL(drm_dp_clock_recovery_ok);
- 
--u8 drm_dp_get_adjust_request_voltage(u8 link_status[DP_LINK_STATUS_SIZE],
-+u8 drm_dp_get_adjust_request_voltage(const u8 link_status[DP_LINK_STATUS_SIZE],
- 				     int lane)
- {
- 	int i = DP_ADJUST_REQUEST_LANE0_1 + (lane >> 1);
-@@ -290,7 +290,7 @@ u8 drm_dp_get_adjust_request_voltage(u8 link_status[DP_LINK_STATUS_SIZE],
- }
- EXPORT_SYMBOL(drm_dp_get_adjust_request_voltage);
- 
--u8 drm_dp_get_adjust_request_pre_emphasis(u8 link_status[DP_LINK_STATUS_SIZE],
-+u8 drm_dp_get_adjust_request_pre_emphasis(const u8 link_status[DP_LINK_STATUS_SIZE],
- 					  int lane)
- {
- 	int i = DP_ADJUST_REQUEST_LANE0_1 + (lane >> 1);
-@@ -303,7 +303,7 @@ u8 drm_dp_get_adjust_request_pre_emphasis(u8 link_status[DP_LINK_STATUS_SIZE],
- }
- EXPORT_SYMBOL(drm_dp_get_adjust_request_pre_emphasis);
- 
--void drm_dp_link_train_clock_recovery_delay(u8 dpcd[DP_RECEIVER_CAP_SIZE]) {
-+void drm_dp_link_train_clock_recovery_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) {
- 	if (dpcd[DP_TRAINING_AUX_RD_INTERVAL] == 0)
- 		udelay(100);
- 	else
-@@ -311,7 +311,7 @@ void drm_dp_link_train_clock_recovery_delay(u8 dpcd[DP_RECEIVER_CAP_SIZE]) {
- }
- EXPORT_SYMBOL(drm_dp_link_train_clock_recovery_delay);
- 
--void drm_dp_link_train_channel_eq_delay(u8 dpcd[DP_RECEIVER_CAP_SIZE]) {
-+void drm_dp_link_train_channel_eq_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) {
- 	if (dpcd[DP_TRAINING_AUX_RD_INTERVAL] == 0)
- 		udelay(400);
- 	else
-diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
-index e32042fb2b63..a92c3754e3bb 100644
---- a/include/drm/drm_dp_helper.h
-+++ b/include/drm/drm_dp_helper.h
-@@ -333,20 +333,20 @@ i2c_dp_aux_add_bus(struct i2c_adapter *adapter);
- 
- 
- #define DP_LINK_STATUS_SIZE	   6
--bool drm_dp_channel_eq_ok(u8 link_status[DP_LINK_STATUS_SIZE],
-+bool drm_dp_channel_eq_ok(const u8 link_status[DP_LINK_STATUS_SIZE],
- 			  int lane_count);
--bool drm_dp_clock_recovery_ok(u8 link_status[DP_LINK_STATUS_SIZE],
-+bool drm_dp_clock_recovery_ok(const u8 link_status[DP_LINK_STATUS_SIZE],
- 			      int lane_count);
--u8 drm_dp_get_adjust_request_voltage(u8 link_status[DP_LINK_STATUS_SIZE],
-+u8 drm_dp_get_adjust_request_voltage(const u8 link_status[DP_LINK_STATUS_SIZE],
- 				     int lane);
--u8 drm_dp_get_adjust_request_pre_emphasis(u8 link_status[DP_LINK_STATUS_SIZE],
-+u8 drm_dp_get_adjust_request_pre_emphasis(const u8 link_status[DP_LINK_STATUS_SIZE],
- 					  int lane);
- 
- #define DP_RECEIVER_CAP_SIZE		0xf
- #define EDP_PSR_RECEIVER_CAP_SIZE	2
- 
--void drm_dp_link_train_clock_recovery_delay(u8 dpcd[DP_RECEIVER_CAP_SIZE]);
--void drm_dp_link_train_channel_eq_delay(u8 dpcd[DP_RECEIVER_CAP_SIZE]);
-+void drm_dp_link_train_clock_recovery_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]);
-+void drm_dp_link_train_channel_eq_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]);
- 
- u8 drm_dp_link_rate_to_bw_code(int link_rate);
- int drm_dp_bw_code_to_link_rate(u8 link_bw);
-@@ -379,13 +379,13 @@ struct edp_vsc_psr {
- #define EDP_VSC_PSR_CRC_VALUES_VALID	(1<<2)
- 
- static inline int
--drm_dp_max_link_rate(u8 dpcd[DP_RECEIVER_CAP_SIZE])
-+drm_dp_max_link_rate(const u8 dpcd[DP_RECEIVER_CAP_SIZE])
- {
- 	return drm_dp_bw_code_to_link_rate(dpcd[DP_MAX_LINK_RATE]);
- }
- 
- static inline u8
--drm_dp_max_lane_count(u8 dpcd[DP_RECEIVER_CAP_SIZE])
-+drm_dp_max_lane_count(const u8 dpcd[DP_RECEIVER_CAP_SIZE])
- {
- 	return dpcd[DP_MAX_LANE_COUNT] & DP_MAX_LANE_COUNT_MASK;
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1083-drm-i915-dp-constify-link_status.patch b/patches.baytrail/1083-drm-i915-dp-constify-link_status.patch
deleted file mode 100644
index f1c2d4028adcc..0000000000000
--- a/patches.baytrail/1083-drm-i915-dp-constify-link_status.patch
+++ /dev/null
@@ -1,51 +0,0 @@
-From 636ce17ff4b0f4b81d2f5f9ad5327027fd786f99 Mon Sep 17 00:00:00 2001
-From: Jani Nikula <jani.nikula@intel.com>
-Date: Tue, 15 Oct 2013 09:36:08 +0300
-Subject: drm/i915/dp: constify link_status
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Follow-up to
-commit 0aec288130713cf7bcf97c929ac5fab6a8e00e44
-Author: Jani Nikula <jani.nikula@intel.com>
-Date:   Fri Sep 27 19:01:01 2013 +0300
-
-    drm/dp: constify DP DPCD helpers
-
-Requested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 0301b3ac38708003a46f5b8ece1103ba6dc23f7c)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_dp.c | 5 +++--
- 1 file changed, 3 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
-index bee09e16725c..7ee9210e6133 100644
---- a/drivers/gpu/drm/i915/intel_dp.c
-+++ b/drivers/gpu/drm/i915/intel_dp.c
-@@ -2095,7 +2095,8 @@ static uint32_t intel_vlv_signal_levels(struct intel_dp *intel_dp)
- }
- 
- static void
--intel_get_adjust_train(struct intel_dp *intel_dp, uint8_t link_status[DP_LINK_STATUS_SIZE])
-+intel_get_adjust_train(struct intel_dp *intel_dp,
-+		       const uint8_t link_status[DP_LINK_STATUS_SIZE])
- {
- 	uint8_t v = 0;
- 	uint8_t p = 0;
-@@ -2396,7 +2397,7 @@ intel_dp_reset_link_train(struct intel_dp *intel_dp, uint32_t *DP,
- 
- static bool
- intel_dp_update_link_train(struct intel_dp *intel_dp, uint32_t *DP,
--			   uint8_t link_status[DP_LINK_STATUS_SIZE])
-+			   const uint8_t link_status[DP_LINK_STATUS_SIZE])
- {
- 	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
- 	struct drm_device *dev = intel_dig_port->base.base.dev;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1084-drm-i915-Add-intel_pipe_wm-and-prepare-for-watermark.patch b/patches.baytrail/1084-drm-i915-Add-intel_pipe_wm-and-prepare-for-watermark.patch
deleted file mode 100644
index 1360216c52f36..0000000000000
--- a/patches.baytrail/1084-drm-i915-Add-intel_pipe_wm-and-prepare-for-watermark.patch
+++ /dev/null
@@ -1,301 +0,0 @@
-From 0440e19feaf7fe4089c06fceec03f2c9ee1ae3fe Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Wed, 9 Oct 2013 19:17:55 +0300
-Subject: drm/i915: Add intel_pipe_wm and prepare for watermark pre-compute
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Introduce a new struct intel_pipe_wm which contains all the
-watermarks for a single pipe. Use it to unify the LP0 and LP1+
-watermark computations so that we can just iterate through the
-watermark levels neatly and call ilk_compute_wm_level() for each.
-
-Also add another tool ilk_wm_merge() that merges the LP1+ watermarks
-from all pipes. For that, embed one intel_pipe_wm inside intel_crtc that
-contains the currently valid watermarks for each pipe.
-
-This is mainly preparatory work for pre-computing the watermarks for
-each pipe and merging them at a later time. For now the merging still
-happens immediately.
-
-v2: Add some comments about level 0 DDB split and intel_wm_config
-    Add WARN_ON for level 0 being disabled
-    s/lp_wm/merged
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 0b2ae6d72e445b58ae39cfa6ec0b8d3f53ff7a6f)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_drv.h |  12 +++
- drivers/gpu/drm/i915/intel_pm.c  | 192 +++++++++++++++++++++++----------------
- 2 files changed, 128 insertions(+), 76 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index 189257df7a0f..5d5d34911a7e 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -309,6 +309,12 @@ struct intel_crtc_config {
- 	bool double_wide;
- };
- 
-+struct intel_pipe_wm {
-+	struct intel_wm_level wm[5];
-+	uint32_t linetime;
-+	bool fbc_wm_enabled;
-+};
-+
- struct intel_crtc {
- 	struct drm_crtc base;
- 	enum pipe pipe;
-@@ -349,6 +355,12 @@ struct intel_crtc {
- 	/* Access to these should be protected by dev_priv->irq_lock. */
- 	bool cpu_fifo_underrun_disabled;
- 	bool pch_fifo_underrun_disabled;
-+
-+	/* per-pipe watermark state */
-+	struct {
-+		/* watermarks currently being used  */
-+		struct intel_pipe_wm active;
-+	} wm;
- };
- 
- struct intel_plane_wm_parameters {
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index ca3dd566974a..3e1b50359afb 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2458,53 +2458,6 @@ static void ilk_compute_wm_level(struct drm_i915_private *dev_priv,
- 	result->enable = true;
- }
- 
--static bool hsw_compute_lp_wm(struct drm_i915_private *dev_priv,
--			      int level, const struct hsw_wm_maximums *max,
--			      const struct hsw_pipe_wm_parameters *params,
--			      struct intel_wm_level *result)
--{
--	enum pipe pipe;
--	struct intel_wm_level res[3];
--
--	for (pipe = PIPE_A; pipe <= PIPE_C; pipe++)
--		ilk_compute_wm_level(dev_priv, level, &params[pipe], &res[pipe]);
--
--	result->pri_val = max3(res[0].pri_val, res[1].pri_val, res[2].pri_val);
--	result->spr_val = max3(res[0].spr_val, res[1].spr_val, res[2].spr_val);
--	result->cur_val = max3(res[0].cur_val, res[1].cur_val, res[2].cur_val);
--	result->fbc_val = max3(res[0].fbc_val, res[1].fbc_val, res[2].fbc_val);
--	result->enable = true;
--
--	return ilk_check_wm(level, max, result);
--}
--
--
--static uint32_t hsw_compute_wm_pipe(struct drm_device *dev,
--				    const struct hsw_pipe_wm_parameters *params)
--{
--	struct drm_i915_private *dev_priv = dev->dev_private;
--	struct intel_wm_config config = {
--		.num_pipes_active = 1,
--		.sprites_enabled = params->spr.enabled,
--		.sprites_scaled = params->spr.scaled,
--	};
--	struct hsw_wm_maximums max;
--	struct intel_wm_level res;
--
--	if (!params->active)
--		return 0;
--
--	ilk_wm_max(dev, 0, &config, INTEL_DDB_PART_1_2, &max);
--
--	ilk_compute_wm_level(dev_priv, 0, params, &res);
--
--	ilk_check_wm(0, &max, &res);
--
--	return (res.pri_val << WM0_PIPE_PLANE_SHIFT) |
--	       (res.spr_val << WM0_PIPE_SPRITE_SHIFT) |
--	       res.cur_val;
--}
--
- static uint32_t
- hsw_compute_linetime_wm(struct drm_device *dev, struct drm_crtc *crtc)
- {
-@@ -2687,44 +2640,123 @@ static void hsw_compute_wm_parameters(struct drm_device *dev,
- 		*lp_max_5_6 = *lp_max_1_2;
- }
- 
-+/* Compute new watermarks for the pipe */
-+static bool intel_compute_pipe_wm(struct drm_crtc *crtc,
-+				  const struct hsw_pipe_wm_parameters *params,
-+				  struct intel_pipe_wm *pipe_wm)
-+{
-+	struct drm_device *dev = crtc->dev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	int level, max_level = ilk_wm_max_level(dev);
-+	/* LP0 watermark maximums depend on this pipe alone */
-+	struct intel_wm_config config = {
-+		.num_pipes_active = 1,
-+		.sprites_enabled = params->spr.enabled,
-+		.sprites_scaled = params->spr.scaled,
-+	};
-+	struct hsw_wm_maximums max;
-+
-+	memset(pipe_wm, 0, sizeof(*pipe_wm));
-+
-+	/* LP0 watermarks always use 1/2 DDB partitioning */
-+	ilk_wm_max(dev, 0, &config, INTEL_DDB_PART_1_2, &max);
-+
-+	for (level = 0; level <= max_level; level++)
-+		ilk_compute_wm_level(dev_priv, level, params,
-+				     &pipe_wm->wm[level]);
-+
-+	pipe_wm->linetime = hsw_compute_linetime_wm(dev, crtc);
-+
-+	/* At least LP0 must be valid */
-+	return ilk_check_wm(0, &max, &pipe_wm->wm[0]);
-+}
-+
-+/*
-+ * Merge the watermarks from all active pipes for a specific level.
-+ */
-+static void ilk_merge_wm_level(struct drm_device *dev,
-+			       int level,
-+			       struct intel_wm_level *ret_wm)
-+{
-+	const struct intel_crtc *intel_crtc;
-+
-+	list_for_each_entry(intel_crtc, &dev->mode_config.crtc_list, base.head) {
-+		const struct intel_wm_level *wm =
-+			&intel_crtc->wm.active.wm[level];
-+
-+		if (!wm->enable)
-+			return;
-+
-+		ret_wm->pri_val = max(ret_wm->pri_val, wm->pri_val);
-+		ret_wm->spr_val = max(ret_wm->spr_val, wm->spr_val);
-+		ret_wm->cur_val = max(ret_wm->cur_val, wm->cur_val);
-+		ret_wm->fbc_val = max(ret_wm->fbc_val, wm->fbc_val);
-+	}
-+
-+	ret_wm->enable = true;
-+}
-+
-+/*
-+ * Merge all low power watermarks for all active pipes.
-+ */
-+static void ilk_wm_merge(struct drm_device *dev,
-+			 const struct hsw_wm_maximums *max,
-+			 struct intel_pipe_wm *merged)
-+{
-+	int level, max_level = ilk_wm_max_level(dev);
-+
-+	merged->fbc_wm_enabled = true;
-+
-+	/* merge each WM1+ level */
-+	for (level = 1; level <= max_level; level++) {
-+		struct intel_wm_level *wm = &merged->wm[level];
-+
-+		ilk_merge_wm_level(dev, level, wm);
-+
-+		if (!ilk_check_wm(level, max, wm))
-+			break;
-+
-+		/*
-+		 * The spec says it is preferred to disable
-+		 * FBC WMs instead of disabling a WM level.
-+		 */
-+		if (wm->fbc_val > max->fbc) {
-+			merged->fbc_wm_enabled = false;
-+			wm->fbc_val = 0;
-+		}
-+	}
-+}
-+
- static void hsw_compute_wm_results(struct drm_device *dev,
- 				   const struct hsw_pipe_wm_parameters *params,
- 				   const struct hsw_wm_maximums *lp_maximums,
- 				   struct hsw_wm_values *results)
- {
--	struct drm_i915_private *dev_priv = dev->dev_private;
--	struct drm_crtc *crtc;
--	struct intel_wm_level lp_results[4] = {};
--	enum pipe pipe;
--	int level, max_level, wm_lp;
-+	struct intel_crtc *intel_crtc;
-+	int level, wm_lp;
-+	struct intel_pipe_wm merged = {};
- 
--	for (level = 1; level <= 4; level++)
--		if (!hsw_compute_lp_wm(dev_priv, level,
--				       lp_maximums, params,
--				       &lp_results[level - 1]))
--			break;
--	max_level = level - 1;
-+	list_for_each_entry(intel_crtc, &dev->mode_config.crtc_list, base.head)
-+		intel_compute_pipe_wm(&intel_crtc->base,
-+				      &params[intel_crtc->pipe],
-+				      &intel_crtc->wm.active);
-+
-+	ilk_wm_merge(dev, lp_maximums, &merged);
- 
- 	memset(results, 0, sizeof(*results));
- 
--	/* The spec says it is preferred to disable FBC WMs instead of disabling
--	 * a WM level. */
--	results->enable_fbc_wm = true;
--	for (level = 1; level <= max_level; level++) {
--		if (lp_results[level - 1].fbc_val > lp_maximums->fbc) {
--			results->enable_fbc_wm = false;
--			lp_results[level - 1].fbc_val = 0;
--		}
--	}
-+	results->enable_fbc_wm = merged.fbc_wm_enabled;
- 
-+	/* LP1+ register values */
- 	for (wm_lp = 1; wm_lp <= 3; wm_lp++) {
- 		const struct intel_wm_level *r;
- 
--		level = (max_level == 4 && wm_lp > 1) ? wm_lp + 1 : wm_lp;
--		if (level > max_level)
-+		level = wm_lp + (wm_lp >= 2 && merged.wm[4].enable);
-+
-+		r = &merged.wm[level];
-+		if (!r->enable)
- 			break;
- 
--		r = &lp_results[level - 1];
- 		results->wm_lp[wm_lp - 1] = HSW_WM_LP_VAL(level * 2,
- 							  r->fbc_val,
- 							  r->pri_val,
-@@ -2732,13 +2764,21 @@ static void hsw_compute_wm_results(struct drm_device *dev,
- 		results->wm_lp_spr[wm_lp - 1] = r->spr_val;
- 	}
- 
--	for_each_pipe(pipe)
--		results->wm_pipe[pipe] = hsw_compute_wm_pipe(dev,
--							     &params[pipe]);
-+	/* LP0 register values */
-+	list_for_each_entry(intel_crtc, &dev->mode_config.crtc_list, base.head) {
-+		enum pipe pipe = intel_crtc->pipe;
-+		const struct intel_wm_level *r =
-+			&intel_crtc->wm.active.wm[0];
- 
--	for_each_pipe(pipe) {
--		crtc = dev_priv->pipe_to_crtc_mapping[pipe];
--		results->wm_linetime[pipe] = hsw_compute_linetime_wm(dev, crtc);
-+		if (WARN_ON(!r->enable))
-+			continue;
-+
-+		results->wm_linetime[pipe] = intel_crtc->wm.active.linetime;
-+
-+		results->wm_pipe[pipe] =
-+			(r->pri_val << WM0_PIPE_PLANE_SHIFT) |
-+			(r->spr_val << WM0_PIPE_SPRITE_SHIFT) |
-+			r->cur_val;
- 	}
- }
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1085-drm-i915-Don-t-re-compute-pipe-watermarks-except-for.patch b/patches.baytrail/1085-drm-i915-Don-t-re-compute-pipe-watermarks-except-for.patch
deleted file mode 100644
index 206ef0506e123..0000000000000
--- a/patches.baytrail/1085-drm-i915-Don-t-re-compute-pipe-watermarks-except-for.patch
+++ /dev/null
@@ -1,158 +0,0 @@
-From 5611ee032b46b387c465fc8109e6637a343b3613 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Wed, 9 Oct 2013 19:17:56 +0300
-Subject: drm/i915: Don't re-compute pipe watermarks except for the affected
- pipe
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-No point in re-computing the watermarks for all pipes, when only one
-pipe has changed. The watermarks stored under intel_crtc.wm.active are
-still valid for the other pipes. We just need to redo the merging.
-
-We can also skip the merge/update procedure completely if the new
-watermarks for the affected pipe come out unchanged.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 7c4a395ff8f441acb7876281c6777624e6410349)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 67 +++++++++++++++++------------------------
- 1 file changed, 28 insertions(+), 39 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 3e1b50359afb..3699f1d574c5 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2584,29 +2584,19 @@ static void intel_setup_wm_latency(struct drm_device *dev)
- 	intel_print_wm_latency(dev, "Cursor", dev_priv->wm.cur_latency);
- }
- 
--static void hsw_compute_wm_parameters(struct drm_device *dev,
--				      struct hsw_pipe_wm_parameters *params,
-+static void hsw_compute_wm_parameters(struct drm_crtc *crtc,
-+				      struct hsw_pipe_wm_parameters *p,
- 				      struct hsw_wm_maximums *lp_max_1_2,
- 				      struct hsw_wm_maximums *lp_max_5_6)
- {
--	struct drm_crtc *crtc;
--	struct drm_plane *plane;
--	enum pipe pipe;
-+	struct drm_device *dev = crtc->dev;
-+	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
-+	enum pipe pipe = intel_crtc->pipe;
- 	struct intel_wm_config config = {};
-+	struct drm_plane *plane;
- 
--	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
--		struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
--		struct hsw_pipe_wm_parameters *p;
--
--		pipe = intel_crtc->pipe;
--		p = &params[pipe];
--
--		p->active = intel_crtc_active(crtc);
--		if (!p->active)
--			continue;
--
--		config.num_pipes_active++;
--
-+	p->active = intel_crtc_active(crtc);
-+	if (p->active) {
- 		p->pipe_htotal = intel_crtc->config.adjusted_mode.htotal;
- 		p->pixel_rate = ilk_pipe_pixel_rate(dev, crtc);
- 		p->pri.bytes_per_pixel = crtc->fb->bits_per_pixel / 8;
-@@ -2618,17 +2608,17 @@ static void hsw_compute_wm_parameters(struct drm_device *dev,
- 		p->cur.enabled = true;
- 	}
- 
-+	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head)
-+		config.num_pipes_active += intel_crtc_active(crtc);
-+
- 	list_for_each_entry(plane, &dev->mode_config.plane_list, head) {
- 		struct intel_plane *intel_plane = to_intel_plane(plane);
--		struct hsw_pipe_wm_parameters *p;
--
--		pipe = intel_plane->pipe;
--		p = &params[pipe];
- 
--		p->spr = intel_plane->wm;
-+		if (intel_plane->pipe == pipe)
-+			p->spr = intel_plane->wm;
- 
--		config.sprites_enabled |= p->spr.enabled;
--		config.sprites_scaled |= p->spr.scaled;
-+		config.sprites_enabled |= intel_plane->wm.enabled;
-+		config.sprites_scaled |= intel_plane->wm.scaled;
- 	}
- 
- 	ilk_wm_max(dev, 1, &config, INTEL_DDB_PART_1_2, lp_max_1_2);
-@@ -2656,8 +2646,6 @@ static bool intel_compute_pipe_wm(struct drm_crtc *crtc,
- 	};
- 	struct hsw_wm_maximums max;
- 
--	memset(pipe_wm, 0, sizeof(*pipe_wm));
--
- 	/* LP0 watermarks always use 1/2 DDB partitioning */
- 	ilk_wm_max(dev, 0, &config, INTEL_DDB_PART_1_2, &max);
- 
-@@ -2728,7 +2716,6 @@ static void ilk_wm_merge(struct drm_device *dev,
- }
- 
- static void hsw_compute_wm_results(struct drm_device *dev,
--				   const struct hsw_pipe_wm_parameters *params,
- 				   const struct hsw_wm_maximums *lp_maximums,
- 				   struct hsw_wm_values *results)
- {
-@@ -2736,11 +2723,6 @@ static void hsw_compute_wm_results(struct drm_device *dev,
- 	int level, wm_lp;
- 	struct intel_pipe_wm merged = {};
- 
--	list_for_each_entry(intel_crtc, &dev->mode_config.crtc_list, base.head)
--		intel_compute_pipe_wm(&intel_crtc->base,
--				      &params[intel_crtc->pipe],
--				      &intel_crtc->wm.active);
--
- 	ilk_wm_merge(dev, lp_maximums, &merged);
- 
- 	memset(results, 0, sizeof(*results));
-@@ -2907,20 +2889,27 @@ static void hsw_write_wm_values(struct drm_i915_private *dev_priv,
- 
- static void haswell_update_wm(struct drm_crtc *crtc)
- {
-+	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
- 	struct drm_device *dev = crtc->dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct hsw_wm_maximums lp_max_1_2, lp_max_5_6;
--	struct hsw_pipe_wm_parameters params[3];
-+	struct hsw_pipe_wm_parameters params = {};
- 	struct hsw_wm_values results_1_2, results_5_6, *best_results;
- 	enum intel_ddb_partitioning partitioning;
-+	struct intel_pipe_wm pipe_wm = {};
-+
-+	hsw_compute_wm_parameters(crtc, &params, &lp_max_1_2, &lp_max_5_6);
-+
-+	intel_compute_pipe_wm(crtc, &params, &pipe_wm);
-+
-+	if (!memcmp(&intel_crtc->wm.active, &pipe_wm, sizeof(pipe_wm)))
-+		return;
- 
--	hsw_compute_wm_parameters(dev, params, &lp_max_1_2, &lp_max_5_6);
-+	intel_crtc->wm.active = pipe_wm;
- 
--	hsw_compute_wm_results(dev, params,
--			       &lp_max_1_2, &results_1_2);
-+	hsw_compute_wm_results(dev, &lp_max_1_2, &results_1_2);
- 	if (lp_max_1_2.pri != lp_max_5_6.pri) {
--		hsw_compute_wm_results(dev, params,
--				       &lp_max_5_6, &results_5_6);
-+		hsw_compute_wm_results(dev, &lp_max_5_6, &results_5_6);
- 		best_results = hsw_find_best_result(&results_1_2, &results_5_6);
- 	} else {
- 		best_results = &results_1_2;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1086-drm-i915-Move-LP1-watermark-merging-out-from-hsw_com.patch b/patches.baytrail/1086-drm-i915-Move-LP1-watermark-merging-out-from-hsw_com.patch
deleted file mode 100644
index e9532d200e5de..0000000000000
--- a/patches.baytrail/1086-drm-i915-Move-LP1-watermark-merging-out-from-hsw_com.patch
+++ /dev/null
@@ -1,82 +0,0 @@
-From 6ba819b40f7d1e34a19093a03a29c5822a2fb25d Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Wed, 9 Oct 2013 19:17:57 +0300
-Subject: drm/i915: Move LP1+ watermark merging out from
- hsw_compute_wm_results()
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-I want to convert hsw_find_best_result() to use intel_pipe_wm, so we
-need to move the merging to happen outside hsw_compute_wm_results().
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 0362c7816c8ad5d838ecd93f5526c1c725a1a8fd)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 19 ++++++++++---------
- 1 file changed, 10 insertions(+), 9 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 3699f1d574c5..71524ae0f07a 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2716,26 +2716,23 @@ static void ilk_wm_merge(struct drm_device *dev,
- }
- 
- static void hsw_compute_wm_results(struct drm_device *dev,
--				   const struct hsw_wm_maximums *lp_maximums,
-+				   const struct intel_pipe_wm *merged,
- 				   struct hsw_wm_values *results)
- {
- 	struct intel_crtc *intel_crtc;
- 	int level, wm_lp;
--	struct intel_pipe_wm merged = {};
--
--	ilk_wm_merge(dev, lp_maximums, &merged);
- 
- 	memset(results, 0, sizeof(*results));
- 
--	results->enable_fbc_wm = merged.fbc_wm_enabled;
-+	results->enable_fbc_wm = merged->fbc_wm_enabled;
- 
- 	/* LP1+ register values */
- 	for (wm_lp = 1; wm_lp <= 3; wm_lp++) {
- 		const struct intel_wm_level *r;
- 
--		level = wm_lp + (wm_lp >= 2 && merged.wm[4].enable);
-+		level = wm_lp + (wm_lp >= 2 && merged->wm[4].enable);
- 
--		r = &merged.wm[level];
-+		r = &merged->wm[level];
- 		if (!r->enable)
- 			break;
- 
-@@ -2897,6 +2894,7 @@ static void haswell_update_wm(struct drm_crtc *crtc)
- 	struct hsw_wm_values results_1_2, results_5_6, *best_results;
- 	enum intel_ddb_partitioning partitioning;
- 	struct intel_pipe_wm pipe_wm = {};
-+	struct intel_pipe_wm lp_wm_1_2 = {}, lp_wm_5_6 = {};
- 
- 	hsw_compute_wm_parameters(crtc, &params, &lp_max_1_2, &lp_max_5_6);
- 
-@@ -2907,9 +2905,12 @@ static void haswell_update_wm(struct drm_crtc *crtc)
- 
- 	intel_crtc->wm.active = pipe_wm;
- 
--	hsw_compute_wm_results(dev, &lp_max_1_2, &results_1_2);
-+	ilk_wm_merge(dev, &lp_max_1_2, &lp_wm_1_2);
-+	ilk_wm_merge(dev, &lp_max_5_6, &lp_wm_5_6);
-+
-+	hsw_compute_wm_results(dev, &lp_wm_1_2, &results_1_2);
- 	if (lp_max_1_2.pri != lp_max_5_6.pri) {
--		hsw_compute_wm_results(dev, &lp_max_5_6, &results_5_6);
-+		hsw_compute_wm_results(dev, &lp_wm_5_6, &results_5_6);
- 		best_results = hsw_find_best_result(&results_1_2, &results_5_6);
- 	} else {
- 		best_results = &results_1_2;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1087-drm-i915-Use-intel_pipe_wm-in-hsw_find_best_results.patch b/patches.baytrail/1087-drm-i915-Use-intel_pipe_wm-in-hsw_find_best_results.patch
deleted file mode 100644
index c6b4c3fa85053..0000000000000
--- a/patches.baytrail/1087-drm-i915-Use-intel_pipe_wm-in-hsw_find_best_results.patch
+++ /dev/null
@@ -1,116 +0,0 @@
-From 211438c6cd2087bff928d72d97673f1d93459b4b Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Wed, 9 Oct 2013 19:17:58 +0300
-Subject: drm/i915: Use intel_pipe_wm in hsw_find_best_results
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Let's try to keep using the intermediate intel_pipe_wm representation
-for as long as possible. It avoids subtle knowledge about the
-internals of the hardware registers when trying to choose the
-best watermark configuration.
-
-While at it replace the memset() w/ zero initialization.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 198a1e9b1822099f60945a6c46b1f59727347817)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 42 ++++++++++++++++++++---------------------
- 1 file changed, 21 insertions(+), 21 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 71524ae0f07a..91147722ee75 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2722,8 +2722,6 @@ static void hsw_compute_wm_results(struct drm_device *dev,
- 	struct intel_crtc *intel_crtc;
- 	int level, wm_lp;
- 
--	memset(results, 0, sizeof(*results));
--
- 	results->enable_fbc_wm = merged->fbc_wm_enabled;
- 
- 	/* LP1+ register values */
-@@ -2763,24 +2761,26 @@ static void hsw_compute_wm_results(struct drm_device *dev,
- 
- /* Find the result with the highest level enabled. Check for enable_fbc_wm in
-  * case both are at the same level. Prefer r1 in case they're the same. */
--static struct hsw_wm_values *hsw_find_best_result(struct hsw_wm_values *r1,
--						  struct hsw_wm_values *r2)
-+static struct intel_pipe_wm *hsw_find_best_result(struct drm_device *dev,
-+						  struct intel_pipe_wm *r1,
-+						  struct intel_pipe_wm *r2)
- {
--	int i, val_r1 = 0, val_r2 = 0;
-+	int level, max_level = ilk_wm_max_level(dev);
-+	int level1 = 0, level2 = 0;
- 
--	for (i = 0; i < 3; i++) {
--		if (r1->wm_lp[i] & WM3_LP_EN)
--			val_r1 = r1->wm_lp[i] & WM1_LP_LATENCY_MASK;
--		if (r2->wm_lp[i] & WM3_LP_EN)
--			val_r2 = r2->wm_lp[i] & WM1_LP_LATENCY_MASK;
-+	for (level = 1; level <= max_level; level++) {
-+		if (r1->wm[level].enable)
-+			level1 = level;
-+		if (r2->wm[level].enable)
-+			level2 = level;
- 	}
- 
--	if (val_r1 == val_r2) {
--		if (r2->enable_fbc_wm && !r1->enable_fbc_wm)
-+	if (level1 == level2) {
-+		if (r2->fbc_wm_enabled && !r1->fbc_wm_enabled)
- 			return r2;
- 		else
- 			return r1;
--	} else if (val_r1 > val_r2) {
-+	} else if (level1 > level2) {
- 		return r1;
- 	} else {
- 		return r2;
-@@ -2891,10 +2891,10 @@ static void haswell_update_wm(struct drm_crtc *crtc)
- 	struct drm_i915_private *dev_priv = dev->dev_private;
- 	struct hsw_wm_maximums lp_max_1_2, lp_max_5_6;
- 	struct hsw_pipe_wm_parameters params = {};
--	struct hsw_wm_values results_1_2, results_5_6, *best_results;
-+	struct hsw_wm_values results = {};
- 	enum intel_ddb_partitioning partitioning;
- 	struct intel_pipe_wm pipe_wm = {};
--	struct intel_pipe_wm lp_wm_1_2 = {}, lp_wm_5_6 = {};
-+	struct intel_pipe_wm lp_wm_1_2 = {}, lp_wm_5_6 = {}, *best_lp_wm;
- 
- 	hsw_compute_wm_parameters(crtc, &params, &lp_max_1_2, &lp_max_5_6);
- 
-@@ -2908,18 +2908,18 @@ static void haswell_update_wm(struct drm_crtc *crtc)
- 	ilk_wm_merge(dev, &lp_max_1_2, &lp_wm_1_2);
- 	ilk_wm_merge(dev, &lp_max_5_6, &lp_wm_5_6);
- 
--	hsw_compute_wm_results(dev, &lp_wm_1_2, &results_1_2);
- 	if (lp_max_1_2.pri != lp_max_5_6.pri) {
--		hsw_compute_wm_results(dev, &lp_wm_5_6, &results_5_6);
--		best_results = hsw_find_best_result(&results_1_2, &results_5_6);
-+		best_lp_wm = hsw_find_best_result(dev, &lp_wm_1_2, &lp_wm_5_6);
- 	} else {
--		best_results = &results_1_2;
-+		best_lp_wm = &lp_wm_1_2;
- 	}
- 
--	partitioning = (best_results == &results_1_2) ?
-+	hsw_compute_wm_results(dev, best_lp_wm, &results);
-+
-+	partitioning = (best_lp_wm == &lp_wm_1_2) ?
- 		       INTEL_DDB_PART_1_2 : INTEL_DDB_PART_5_6;
- 
--	hsw_write_wm_values(dev_priv, best_results, partitioning);
-+	hsw_write_wm_values(dev_priv, &results, partitioning);
- }
- 
- static void haswell_update_sprite_wm(struct drm_plane *plane,
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1088-drm-i915-Move-some-computations-out-from-hsw_compute.patch b/patches.baytrail/1088-drm-i915-Move-some-computations-out-from-hsw_compute.patch
deleted file mode 100644
index cdaadd35b790c..0000000000000
--- a/patches.baytrail/1088-drm-i915-Move-some-computations-out-from-hsw_compute.patch
+++ /dev/null
@@ -1,112 +0,0 @@
-From 3d8e845656bcd88277c9b4bb6d08eb1cb539ac52 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Wed, 9 Oct 2013 19:17:59 +0300
-Subject: drm/i915: Move some computations out from hsw_compute_wm_parameters()
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Move the watermark max computations into haswell_update_wm(). This
-allows keeping the 1/2 vs. 5/6 split code in one place, and avoid having
-to pass around so many things. We also save a bit of stack space by only
-requiring one copy of struct hsw_wm_maximums.
-
-Also move the intel_wm_config out from hsw_compute_wm_parameters() and
-pass it it. We'll have some need for it in haswell_update_wm() later.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit a485bfb8d0d70ba24662aab5e00b2914c646220b)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 33 ++++++++++++++-------------------
- 1 file changed, 14 insertions(+), 19 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 91147722ee75..3d3f1134f16b 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2586,13 +2586,11 @@ static void intel_setup_wm_latency(struct drm_device *dev)
- 
- static void hsw_compute_wm_parameters(struct drm_crtc *crtc,
- 				      struct hsw_pipe_wm_parameters *p,
--				      struct hsw_wm_maximums *lp_max_1_2,
--				      struct hsw_wm_maximums *lp_max_5_6)
-+				      struct intel_wm_config *config)
- {
- 	struct drm_device *dev = crtc->dev;
- 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
- 	enum pipe pipe = intel_crtc->pipe;
--	struct intel_wm_config config = {};
- 	struct drm_plane *plane;
- 
- 	p->active = intel_crtc_active(crtc);
-@@ -2609,7 +2607,7 @@ static void hsw_compute_wm_parameters(struct drm_crtc *crtc,
- 	}
- 
- 	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head)
--		config.num_pipes_active += intel_crtc_active(crtc);
-+		config->num_pipes_active += intel_crtc_active(crtc);
- 
- 	list_for_each_entry(plane, &dev->mode_config.plane_list, head) {
- 		struct intel_plane *intel_plane = to_intel_plane(plane);
-@@ -2617,17 +2615,9 @@ static void hsw_compute_wm_parameters(struct drm_crtc *crtc,
- 		if (intel_plane->pipe == pipe)
- 			p->spr = intel_plane->wm;
- 
--		config.sprites_enabled |= intel_plane->wm.enabled;
--		config.sprites_scaled |= intel_plane->wm.scaled;
-+		config->sprites_enabled |= intel_plane->wm.enabled;
-+		config->sprites_scaled |= intel_plane->wm.scaled;
- 	}
--
--	ilk_wm_max(dev, 1, &config, INTEL_DDB_PART_1_2, lp_max_1_2);
--
--	/* 5/6 split only in single pipe config on IVB+ */
--	if (INTEL_INFO(dev)->gen >= 7 && config.num_pipes_active <= 1)
--		ilk_wm_max(dev, 1, &config, INTEL_DDB_PART_5_6, lp_max_5_6);
--	else
--		*lp_max_5_6 = *lp_max_1_2;
- }
- 
- /* Compute new watermarks for the pipe */
-@@ -2889,14 +2879,15 @@ static void haswell_update_wm(struct drm_crtc *crtc)
- 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
- 	struct drm_device *dev = crtc->dev;
- 	struct drm_i915_private *dev_priv = dev->dev_private;
--	struct hsw_wm_maximums lp_max_1_2, lp_max_5_6;
-+	struct hsw_wm_maximums max;
- 	struct hsw_pipe_wm_parameters params = {};
- 	struct hsw_wm_values results = {};
- 	enum intel_ddb_partitioning partitioning;
- 	struct intel_pipe_wm pipe_wm = {};
- 	struct intel_pipe_wm lp_wm_1_2 = {}, lp_wm_5_6 = {}, *best_lp_wm;
-+	struct intel_wm_config config = {};
- 
--	hsw_compute_wm_parameters(crtc, &params, &lp_max_1_2, &lp_max_5_6);
-+	hsw_compute_wm_parameters(crtc, &params, &config);
- 
- 	intel_compute_pipe_wm(crtc, &params, &pipe_wm);
- 
-@@ -2905,10 +2896,14 @@ static void haswell_update_wm(struct drm_crtc *crtc)
- 
- 	intel_crtc->wm.active = pipe_wm;
- 
--	ilk_wm_merge(dev, &lp_max_1_2, &lp_wm_1_2);
--	ilk_wm_merge(dev, &lp_max_5_6, &lp_wm_5_6);
-+	ilk_wm_max(dev, 1, &config, INTEL_DDB_PART_1_2, &max);
-+	ilk_wm_merge(dev, &max, &lp_wm_1_2);
-+
-+	/* 5/6 split only in single pipe config on IVB+ */
-+	if (INTEL_INFO(dev)->gen >= 7 && config.num_pipes_active <= 1) {
-+		ilk_wm_max(dev, 1, &config, INTEL_DDB_PART_5_6, &max);
-+		ilk_wm_merge(dev, &max, &lp_wm_5_6);
- 
--	if (lp_max_1_2.pri != lp_max_5_6.pri) {
- 		best_lp_wm = hsw_find_best_result(dev, &lp_wm_1_2, &lp_wm_5_6);
- 	} else {
- 		best_lp_wm = &lp_wm_1_2;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1089-drm-i915-Check-5-6-DDB-split-only-when-sprites-are-e.patch b/patches.baytrail/1089-drm-i915-Check-5-6-DDB-split-only-when-sprites-are-e.patch
deleted file mode 100644
index fcfde549a75bf..0000000000000
--- a/patches.baytrail/1089-drm-i915-Check-5-6-DDB-split-only-when-sprites-are-e.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 94d0c30536b48fac23d85544adbd4d0563ca8b5c Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Fri, 11 Oct 2013 15:26:26 +0300
-Subject: drm/i915: Check 5/6 DDB split only when sprites are enabled
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Using the 5/6 DDB split make sense only when sprites are enabled.
-So check that before we waste any cycles computing the merged
-watermarks with the 5/6 DDB split.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit a5db6b62577b14a9fbe639af0aba9ec7ae85ae3e)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 3d3f1134f16b..a5503cd7a1c8 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2900,7 +2900,7 @@ static void haswell_update_wm(struct drm_crtc *crtc)
- 	ilk_wm_merge(dev, &max, &lp_wm_1_2);
- 
- 	/* 5/6 split only in single pipe config on IVB+ */
--	if (INTEL_INFO(dev)->gen >= 7 && config.num_pipes_active <= 1) {
-+	if (INTEL_INFO(dev)->gen >= 7 && config.num_pipes_active == 1) {
- 		ilk_wm_max(dev, 1, &config, INTEL_DDB_PART_5_6, &max);
- 		ilk_wm_merge(dev, &max, &lp_wm_5_6);
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1090-drm-i915-Refactor-wm_lp-to-level-calculation.patch b/patches.baytrail/1090-drm-i915-Refactor-wm_lp-to-level-calculation.patch
deleted file mode 100644
index cf845cff3e3fa..0000000000000
--- a/patches.baytrail/1090-drm-i915-Refactor-wm_lp-to-level-calculation.patch
+++ /dev/null
@@ -1,50 +0,0 @@
-From 421520e5b2e019c414d64e66dfeafa1dc51d1670 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Wed, 9 Oct 2013 19:18:01 +0300
-Subject: drm/i915: Refactor wm_lp to level calculation
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-On HSW the LP1,LP2,LP3 levels are either 1,2,3 or 1,3,4. We make the
-conversion from LPn to to the level at one point current. Later we're
-going to do it in a few places, so move it to a separate function.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit b380ca3caa821150fddab0052dcce624d18e88ee)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 8 +++++++-
- 1 file changed, 7 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index a5503cd7a1c8..9f33e37f8a2d 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2705,6 +2705,12 @@ static void ilk_wm_merge(struct drm_device *dev,
- 	}
- }
- 
-+static int ilk_wm_lp_to_level(int wm_lp, const struct intel_pipe_wm *pipe_wm)
-+{
-+	/* LP1,LP2,LP3 levels are either 1,2,3 or 1,3,4 */
-+	return wm_lp + (wm_lp >= 2 && pipe_wm->wm[4].enable);
-+}
-+
- static void hsw_compute_wm_results(struct drm_device *dev,
- 				   const struct intel_pipe_wm *merged,
- 				   struct hsw_wm_values *results)
-@@ -2718,7 +2724,7 @@ static void hsw_compute_wm_results(struct drm_device *dev,
- 	for (wm_lp = 1; wm_lp <= 3; wm_lp++) {
- 		const struct intel_wm_level *r;
- 
--		level = wm_lp + (wm_lp >= 2 && merged->wm[4].enable);
-+		level = ilk_wm_lp_to_level(wm_lp, merged);
- 
- 		r = &merged->wm[level];
- 		if (!r->enable)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1091-drm-i915-Kill-fbc_wm_enabled-from-intel_wm_config.patch b/patches.baytrail/1091-drm-i915-Kill-fbc_wm_enabled-from-intel_wm_config.patch
deleted file mode 100644
index 646daff15ec5e..0000000000000
--- a/patches.baytrail/1091-drm-i915-Kill-fbc_wm_enabled-from-intel_wm_config.patch
+++ /dev/null
@@ -1,40 +0,0 @@
-From 3e21035218b09e6fd08b9ceff1048c7a580cb315 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Wed, 9 Oct 2013 19:18:02 +0300
-Subject: drm/i915: Kill fbc_wm_enabled from intel_wm_config
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The fbc_wm_enabled member in intel_wm_config is useless for the time
-being. The original idea for it was that we'd pre-compute it and so
-that the WM merging process could know whether it needs to worry
-about FBC watermarks at all.
-
-But we don't have a convenient way to pre-check for the possibility
-of FBC being used. intel_update_fbc() should be split up for that.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 7eaa4d56107dac87946f3b45faf37bc831f8de83)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 1 -
- 1 file changed, 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 9f33e37f8a2d..abea03c1e480 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2213,7 +2213,6 @@ struct intel_wm_config {
- 	unsigned int num_pipes_active;
- 	bool sprites_enabled;
- 	bool sprites_scaled;
--	bool fbc_wm_enabled;
- };
- 
- /*
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1092-drm-i915-Store-current-watermark-state-in-dev_priv-w.patch b/patches.baytrail/1092-drm-i915-Store-current-watermark-state-in-dev_priv-w.patch
deleted file mode 100644
index 12dd5f48b4691..0000000000000
--- a/patches.baytrail/1092-drm-i915-Store-current-watermark-state-in-dev_priv-w.patch
+++ /dev/null
@@ -1,185 +0,0 @@
-From 5216f57bc87126c102d8817c53f74559412dd72d Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Wed, 9 Oct 2013 19:18:03 +0300
-Subject: drm/i915: Store current watermark state in dev_priv->wm
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-To make it easier to check what watermark updates are actually
-necessary, keep copies of the relevant bits that match the current
-hardware state.
-
-Also add DDB partitioning into hsw_wm_values as that's another piece
-of state we want to track.
-
-We don't read out the hardware state on init yet, so we can't really
-start using this yet, but it will be used later.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-[danvet: Paulo asked for a comment around the memcmp to say that we
-depend upon zero-initializing the entire structures due to padding.
-But a later patch in this series removes the memcmp again. So this is
-ok as-is.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 609cedef6a9d5d90574903c71e81bd1c1f311f06)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_drv.h | 12 +++++++++++
- drivers/gpu/drm/i915/intel_pm.c | 46 ++++++++++++++---------------------------
- 2 files changed, 27 insertions(+), 31 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
-index 6ef70e23de9c..fc7e4db7c037 100644
---- a/drivers/gpu/drm/i915/i915_drv.h
-+++ b/drivers/gpu/drm/i915/i915_drv.h
-@@ -1141,6 +1141,15 @@ struct intel_wm_level {
- 	uint32_t fbc_val;
- };
- 
-+struct hsw_wm_values {
-+	uint32_t wm_pipe[3];
-+	uint32_t wm_lp[3];
-+	uint32_t wm_lp_spr[3];
-+	uint32_t wm_linetime[3];
-+	bool enable_fbc_wm;
-+	enum intel_ddb_partitioning partitioning;
-+};
-+
- /*
-  * This struct tracks the state needed for the Package C8+ feature.
-  *
-@@ -1402,6 +1411,9 @@ typedef struct drm_i915_private {
- 		uint16_t spr_latency[5];
- 		/* cursor */
- 		uint16_t cur_latency[5];
-+
-+		/* current hardware state */
-+		struct hsw_wm_values hw;
- 	} wm;
- 
- 	struct i915_package_c8 pc8;
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index abea03c1e480..6d3d5f62dd6b 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2200,14 +2200,6 @@ struct hsw_wm_maximums {
- 	uint16_t fbc;
- };
- 
--struct hsw_wm_values {
--	uint32_t wm_pipe[3];
--	uint32_t wm_lp[3];
--	uint32_t wm_lp_spr[3];
--	uint32_t wm_linetime[3];
--	bool enable_fbc_wm;
--};
--
- /* used in computing the new watermarks state */
- struct intel_wm_config {
- 	unsigned int num_pipes_active;
-@@ -2712,12 +2704,14 @@ static int ilk_wm_lp_to_level(int wm_lp, const struct intel_pipe_wm *pipe_wm)
- 
- static void hsw_compute_wm_results(struct drm_device *dev,
- 				   const struct intel_pipe_wm *merged,
-+				   enum intel_ddb_partitioning partitioning,
- 				   struct hsw_wm_values *results)
- {
- 	struct intel_crtc *intel_crtc;
- 	int level, wm_lp;
- 
- 	results->enable_fbc_wm = merged->fbc_wm_enabled;
-+	results->partitioning = partitioning;
- 
- 	/* LP1+ register values */
- 	for (wm_lp = 1; wm_lp <= 3; wm_lp++) {
-@@ -2787,13 +2781,10 @@ static struct intel_pipe_wm *hsw_find_best_result(struct drm_device *dev,
-  * causes WMs to be re-evaluated, expending some power.
-  */
- static void hsw_write_wm_values(struct drm_i915_private *dev_priv,
--				struct hsw_wm_values *results,
--				enum intel_ddb_partitioning partitioning)
-+				struct hsw_wm_values *results)
- {
- 	struct hsw_wm_values previous;
- 	uint32_t val;
--	enum intel_ddb_partitioning prev_partitioning;
--	bool prev_enable_fbc_wm;
- 
- 	previous.wm_pipe[0] = I915_READ(WM0_PIPEA_ILK);
- 	previous.wm_pipe[1] = I915_READ(WM0_PIPEB_ILK);
-@@ -2808,21 +2799,12 @@ static void hsw_write_wm_values(struct drm_i915_private *dev_priv,
- 	previous.wm_linetime[1] = I915_READ(PIPE_WM_LINETIME(PIPE_B));
- 	previous.wm_linetime[2] = I915_READ(PIPE_WM_LINETIME(PIPE_C));
- 
--	prev_partitioning = (I915_READ(WM_MISC) & WM_MISC_DATA_PARTITION_5_6) ?
-+	previous.partitioning = (I915_READ(WM_MISC) & WM_MISC_DATA_PARTITION_5_6) ?
- 				INTEL_DDB_PART_5_6 : INTEL_DDB_PART_1_2;
- 
--	prev_enable_fbc_wm = !(I915_READ(DISP_ARB_CTL) & DISP_FBC_WM_DIS);
--
--	if (memcmp(results->wm_pipe, previous.wm_pipe,
--		   sizeof(results->wm_pipe)) == 0 &&
--	    memcmp(results->wm_lp, previous.wm_lp,
--		   sizeof(results->wm_lp)) == 0 &&
--	    memcmp(results->wm_lp_spr, previous.wm_lp_spr,
--		   sizeof(results->wm_lp_spr)) == 0 &&
--	    memcmp(results->wm_linetime, previous.wm_linetime,
--		   sizeof(results->wm_linetime)) == 0 &&
--	    partitioning == prev_partitioning &&
--	    results->enable_fbc_wm == prev_enable_fbc_wm)
-+	previous.enable_fbc_wm = !(I915_READ(DISP_ARB_CTL) & DISP_FBC_WM_DIS);
-+
-+	if (memcmp(results, &previous, sizeof(*results)) == 0)
- 		return;
- 
- 	if (previous.wm_lp[2] != 0)
-@@ -2846,16 +2828,16 @@ static void hsw_write_wm_values(struct drm_i915_private *dev_priv,
- 	if (previous.wm_linetime[2] != results->wm_linetime[2])
- 		I915_WRITE(PIPE_WM_LINETIME(PIPE_C), results->wm_linetime[2]);
- 
--	if (prev_partitioning != partitioning) {
-+	if (previous.partitioning != results->partitioning) {
- 		val = I915_READ(WM_MISC);
--		if (partitioning == INTEL_DDB_PART_1_2)
-+		if (results->partitioning == INTEL_DDB_PART_1_2)
- 			val &= ~WM_MISC_DATA_PARTITION_5_6;
- 		else
- 			val |= WM_MISC_DATA_PARTITION_5_6;
- 		I915_WRITE(WM_MISC, val);
- 	}
- 
--	if (prev_enable_fbc_wm != results->enable_fbc_wm) {
-+	if (previous.enable_fbc_wm != results->enable_fbc_wm) {
- 		val = I915_READ(DISP_ARB_CTL);
- 		if (results->enable_fbc_wm)
- 			val &= ~DISP_FBC_WM_DIS;
-@@ -2877,6 +2859,8 @@ static void hsw_write_wm_values(struct drm_i915_private *dev_priv,
- 		I915_WRITE(WM2_LP_ILK, results->wm_lp[1]);
- 	if (results->wm_lp[2] != 0)
- 		I915_WRITE(WM3_LP_ILK, results->wm_lp[2]);
-+
-+	dev_priv->wm.hw = *results;
- }
- 
- static void haswell_update_wm(struct drm_crtc *crtc)
-@@ -2914,12 +2898,12 @@ static void haswell_update_wm(struct drm_crtc *crtc)
- 		best_lp_wm = &lp_wm_1_2;
- 	}
- 
--	hsw_compute_wm_results(dev, best_lp_wm, &results);
--
- 	partitioning = (best_lp_wm == &lp_wm_1_2) ?
- 		       INTEL_DDB_PART_1_2 : INTEL_DDB_PART_5_6;
- 
--	hsw_write_wm_values(dev_priv, &results, partitioning);
-+	hsw_compute_wm_results(dev, best_lp_wm, partitioning, &results);
-+
-+	hsw_write_wm_values(dev_priv, &results);
- }
- 
- static void haswell_update_sprite_wm(struct drm_plane *plane,
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1093-drm-i915-Improve-watermark-dirtyness-checks.patch b/patches.baytrail/1093-drm-i915-Improve-watermark-dirtyness-checks.patch
deleted file mode 100644
index db4f912ea5765..0000000000000
--- a/patches.baytrail/1093-drm-i915-Improve-watermark-dirtyness-checks.patch
+++ /dev/null
@@ -1,188 +0,0 @@
-From 9d0bbc505e364fc11a175cba1bb15bd1c6e6a10a Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Fri, 11 Oct 2013 19:39:52 +0300
-Subject: drm/i915: Improve watermark dirtyness checks
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Currently hsw_write_vm_values() may write to certain watermark
-registers needlessly. For instance if only, say, LP3 changes,
-the current code will again disable all LP1+ watermarks even
-though only LP3 needs to be reconfigured.
-
-Add an easy to read function that will compute the dirtyness of the
-watermarks, and use that information to further optimize the watermark
-programming.
-
-v2: Disable LP1+ watermarks around changing LP0 watermarks for Paulo
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 49a687c471396d063bb3d3cf04d62568efe7ec5e)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 98 +++++++++++++++++++++++++++++++++--------
- 1 file changed, 80 insertions(+), 18 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 6d3d5f62dd6b..6d0c3d0e80fd 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2776,6 +2776,66 @@ static struct intel_pipe_wm *hsw_find_best_result(struct drm_device *dev,
- 	}
- }
- 
-+/* dirty bits used to track which watermarks need changes */
-+#define WM_DIRTY_PIPE(pipe) (1 << (pipe))
-+#define WM_DIRTY_LINETIME(pipe) (1 << (8 + (pipe)))
-+#define WM_DIRTY_LP(wm_lp) (1 << (15 + (wm_lp)))
-+#define WM_DIRTY_LP_ALL (WM_DIRTY_LP(1) | WM_DIRTY_LP(2) | WM_DIRTY_LP(3))
-+#define WM_DIRTY_FBC (1 << 24)
-+#define WM_DIRTY_DDB (1 << 25)
-+
-+static unsigned int ilk_compute_wm_dirty(struct drm_device *dev,
-+					 const struct hsw_wm_values *old,
-+					 const struct hsw_wm_values *new)
-+{
-+	unsigned int dirty = 0;
-+	enum pipe pipe;
-+	int wm_lp;
-+
-+	for_each_pipe(pipe) {
-+		if (old->wm_linetime[pipe] != new->wm_linetime[pipe]) {
-+			dirty |= WM_DIRTY_LINETIME(pipe);
-+			/* Must disable LP1+ watermarks too */
-+			dirty |= WM_DIRTY_LP_ALL;
-+		}
-+
-+		if (old->wm_pipe[pipe] != new->wm_pipe[pipe]) {
-+			dirty |= WM_DIRTY_PIPE(pipe);
-+			/* Must disable LP1+ watermarks too */
-+			dirty |= WM_DIRTY_LP_ALL;
-+		}
-+	}
-+
-+	if (old->enable_fbc_wm != new->enable_fbc_wm) {
-+		dirty |= WM_DIRTY_FBC;
-+		/* Must disable LP1+ watermarks too */
-+		dirty |= WM_DIRTY_LP_ALL;
-+	}
-+
-+	if (old->partitioning != new->partitioning) {
-+		dirty |= WM_DIRTY_DDB;
-+		/* Must disable LP1+ watermarks too */
-+		dirty |= WM_DIRTY_LP_ALL;
-+	}
-+
-+	/* LP1+ watermarks already deemed dirty, no need to continue */
-+	if (dirty & WM_DIRTY_LP_ALL)
-+		return dirty;
-+
-+	/* Find the lowest numbered LP1+ watermark in need of an update... */
-+	for (wm_lp = 1; wm_lp <= 3; wm_lp++) {
-+		if (old->wm_lp[wm_lp - 1] != new->wm_lp[wm_lp - 1] ||
-+		    old->wm_lp_spr[wm_lp - 1] != new->wm_lp_spr[wm_lp - 1])
-+			break;
-+	}
-+
-+	/* ...and mark it and all higher numbered LP1+ watermarks as dirty */
-+	for (; wm_lp <= 3; wm_lp++)
-+		dirty |= WM_DIRTY_LP(wm_lp);
-+
-+	return dirty;
-+}
-+
- /*
-  * The spec says we shouldn't write when we don't need, because every write
-  * causes WMs to be re-evaluated, expending some power.
-@@ -2784,6 +2844,7 @@ static void hsw_write_wm_values(struct drm_i915_private *dev_priv,
- 				struct hsw_wm_values *results)
- {
- 	struct hsw_wm_values previous;
-+	unsigned int dirty;
- 	uint32_t val;
- 
- 	previous.wm_pipe[0] = I915_READ(WM0_PIPEA_ILK);
-@@ -2804,31 +2865,32 @@ static void hsw_write_wm_values(struct drm_i915_private *dev_priv,
- 
- 	previous.enable_fbc_wm = !(I915_READ(DISP_ARB_CTL) & DISP_FBC_WM_DIS);
- 
--	if (memcmp(results, &previous, sizeof(*results)) == 0)
-+	dirty = ilk_compute_wm_dirty(dev_priv->dev, &previous, results);
-+	if (!dirty)
- 		return;
- 
--	if (previous.wm_lp[2] != 0)
-+	if (dirty & WM_DIRTY_LP(3) && previous.wm_lp[2] != 0)
- 		I915_WRITE(WM3_LP_ILK, 0);
--	if (previous.wm_lp[1] != 0)
-+	if (dirty & WM_DIRTY_LP(2) && previous.wm_lp[1] != 0)
- 		I915_WRITE(WM2_LP_ILK, 0);
--	if (previous.wm_lp[0] != 0)
-+	if (dirty & WM_DIRTY_LP(1) && previous.wm_lp[0] != 0)
- 		I915_WRITE(WM1_LP_ILK, 0);
- 
--	if (previous.wm_pipe[0] != results->wm_pipe[0])
-+	if (dirty & WM_DIRTY_PIPE(PIPE_A))
- 		I915_WRITE(WM0_PIPEA_ILK, results->wm_pipe[0]);
--	if (previous.wm_pipe[1] != results->wm_pipe[1])
-+	if (dirty & WM_DIRTY_PIPE(PIPE_B))
- 		I915_WRITE(WM0_PIPEB_ILK, results->wm_pipe[1]);
--	if (previous.wm_pipe[2] != results->wm_pipe[2])
-+	if (dirty & WM_DIRTY_PIPE(PIPE_C))
- 		I915_WRITE(WM0_PIPEC_IVB, results->wm_pipe[2]);
- 
--	if (previous.wm_linetime[0] != results->wm_linetime[0])
-+	if (dirty & WM_DIRTY_LINETIME(PIPE_A))
- 		I915_WRITE(PIPE_WM_LINETIME(PIPE_A), results->wm_linetime[0]);
--	if (previous.wm_linetime[1] != results->wm_linetime[1])
-+	if (dirty & WM_DIRTY_LINETIME(PIPE_B))
- 		I915_WRITE(PIPE_WM_LINETIME(PIPE_B), results->wm_linetime[1]);
--	if (previous.wm_linetime[2] != results->wm_linetime[2])
-+	if (dirty & WM_DIRTY_LINETIME(PIPE_C))
- 		I915_WRITE(PIPE_WM_LINETIME(PIPE_C), results->wm_linetime[2]);
- 
--	if (previous.partitioning != results->partitioning) {
-+	if (dirty & WM_DIRTY_DDB) {
- 		val = I915_READ(WM_MISC);
- 		if (results->partitioning == INTEL_DDB_PART_1_2)
- 			val &= ~WM_MISC_DATA_PARTITION_5_6;
-@@ -2837,7 +2899,7 @@ static void hsw_write_wm_values(struct drm_i915_private *dev_priv,
- 		I915_WRITE(WM_MISC, val);
- 	}
- 
--	if (previous.enable_fbc_wm != results->enable_fbc_wm) {
-+	if (dirty & WM_DIRTY_FBC) {
- 		val = I915_READ(DISP_ARB_CTL);
- 		if (results->enable_fbc_wm)
- 			val &= ~DISP_FBC_WM_DIS;
-@@ -2846,18 +2908,18 @@ static void hsw_write_wm_values(struct drm_i915_private *dev_priv,
- 		I915_WRITE(DISP_ARB_CTL, val);
- 	}
- 
--	if (previous.wm_lp_spr[0] != results->wm_lp_spr[0])
-+	if (dirty & WM_DIRTY_LP(1) && previous.wm_lp_spr[0] != results->wm_lp_spr[0])
- 		I915_WRITE(WM1S_LP_ILK, results->wm_lp_spr[0]);
--	if (previous.wm_lp_spr[1] != results->wm_lp_spr[1])
-+	if (dirty & WM_DIRTY_LP(2) && previous.wm_lp_spr[1] != results->wm_lp_spr[1])
- 		I915_WRITE(WM2S_LP_IVB, results->wm_lp_spr[1]);
--	if (previous.wm_lp_spr[2] != results->wm_lp_spr[2])
-+	if (dirty & WM_DIRTY_LP(3) && previous.wm_lp_spr[2] != results->wm_lp_spr[2])
- 		I915_WRITE(WM3S_LP_IVB, results->wm_lp_spr[2]);
- 
--	if (results->wm_lp[0] != 0)
-+	if (dirty & WM_DIRTY_LP(1) && results->wm_lp[0] != 0)
- 		I915_WRITE(WM1_LP_ILK, results->wm_lp[0]);
--	if (results->wm_lp[1] != 0)
-+	if (dirty & WM_DIRTY_LP(2) && results->wm_lp[1] != 0)
- 		I915_WRITE(WM2_LP_ILK, results->wm_lp[1]);
--	if (results->wm_lp[2] != 0)
-+	if (dirty & WM_DIRTY_LP(3) && results->wm_lp[2] != 0)
- 		I915_WRITE(WM3_LP_ILK, results->wm_lp[2]);
- 
- 	dev_priv->wm.hw = *results;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1094-drm-i915-Init-HSW-watermark-tracking-in-intel_modese.patch b/patches.baytrail/1094-drm-i915-Init-HSW-watermark-tracking-in-intel_modese.patch
deleted file mode 100644
index 71e363bd358f0..0000000000000
--- a/patches.baytrail/1094-drm-i915-Init-HSW-watermark-tracking-in-intel_modese.patch
+++ /dev/null
@@ -1,197 +0,0 @@
-From 182d2d49dfd287ec0dd8402803462565881367ea Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Mon, 14 Oct 2013 14:55:24 +0300
-Subject: drm/i915: Init HSW watermark tracking in
- intel_modeset_setup_hw_state()
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Fill out the HSW watermark s/w tracking structures with the current
-hardware state in intel_modeset_setup_hw_state(). This allows us to skip
-the HW state readback during watermark programming and just use the values
-we keep around in dev_priv->wm. Reduces the overhead of the watermark
-programming quite a bit.
-
-v2: s/init_wm/wm_get_hw_state
-    Remove stale comment about sprites
-    Make DDB partitioning readout safer
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-[danvet: Fix whitespace fail.]
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 243e6a44b9ca5aa3c9ce47459a53e03b1dc7e665)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_display.c |   3 ++
- drivers/gpu/drm/i915/intel_drv.h     |   1 +
- drivers/gpu/drm/i915/intel_pm.c      | 102 ++++++++++++++++++++++++++---------
- 3 files changed, 80 insertions(+), 26 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
-index fb210b0774af..ccccd5bb8543 100644
---- a/drivers/gpu/drm/i915/intel_display.c
-+++ b/drivers/gpu/drm/i915/intel_display.c
-@@ -10839,6 +10839,9 @@ void intel_modeset_setup_hw_state(struct drm_device *dev,
- 		pll->on = false;
- 	}
- 
-+	if (IS_HASWELL(dev))
-+		ilk_wm_get_hw_state(dev);
-+
- 	if (force_restore) {
- 		i915_redisable_vga(dev);
- 
-diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
-index 5d5d34911a7e..e33f387d4185 100644
---- a/drivers/gpu/drm/i915/intel_drv.h
-+++ b/drivers/gpu/drm/i915/intel_drv.h
-@@ -839,6 +839,7 @@ void gen6_rps_idle(struct drm_i915_private *dev_priv);
- void gen6_rps_boost(struct drm_i915_private *dev_priv);
- void intel_aux_display_runtime_get(struct drm_i915_private *dev_priv);
- void intel_aux_display_runtime_put(struct drm_i915_private *dev_priv);
-+void ilk_wm_get_hw_state(struct drm_device *dev);
- 
- 
- /* intel_sdvo.c */
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 6d0c3d0e80fd..77ee14fa007b 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2843,37 +2843,19 @@ static unsigned int ilk_compute_wm_dirty(struct drm_device *dev,
- static void hsw_write_wm_values(struct drm_i915_private *dev_priv,
- 				struct hsw_wm_values *results)
- {
--	struct hsw_wm_values previous;
-+	struct hsw_wm_values *previous = &dev_priv->wm.hw;
- 	unsigned int dirty;
- 	uint32_t val;
- 
--	previous.wm_pipe[0] = I915_READ(WM0_PIPEA_ILK);
--	previous.wm_pipe[1] = I915_READ(WM0_PIPEB_ILK);
--	previous.wm_pipe[2] = I915_READ(WM0_PIPEC_IVB);
--	previous.wm_lp[0] = I915_READ(WM1_LP_ILK);
--	previous.wm_lp[1] = I915_READ(WM2_LP_ILK);
--	previous.wm_lp[2] = I915_READ(WM3_LP_ILK);
--	previous.wm_lp_spr[0] = I915_READ(WM1S_LP_ILK);
--	previous.wm_lp_spr[1] = I915_READ(WM2S_LP_IVB);
--	previous.wm_lp_spr[2] = I915_READ(WM3S_LP_IVB);
--	previous.wm_linetime[0] = I915_READ(PIPE_WM_LINETIME(PIPE_A));
--	previous.wm_linetime[1] = I915_READ(PIPE_WM_LINETIME(PIPE_B));
--	previous.wm_linetime[2] = I915_READ(PIPE_WM_LINETIME(PIPE_C));
--
--	previous.partitioning = (I915_READ(WM_MISC) & WM_MISC_DATA_PARTITION_5_6) ?
--				INTEL_DDB_PART_5_6 : INTEL_DDB_PART_1_2;
--
--	previous.enable_fbc_wm = !(I915_READ(DISP_ARB_CTL) & DISP_FBC_WM_DIS);
--
--	dirty = ilk_compute_wm_dirty(dev_priv->dev, &previous, results);
-+	dirty = ilk_compute_wm_dirty(dev_priv->dev, previous, results);
- 	if (!dirty)
- 		return;
- 
--	if (dirty & WM_DIRTY_LP(3) && previous.wm_lp[2] != 0)
-+	if (dirty & WM_DIRTY_LP(3) && previous->wm_lp[2] != 0)
- 		I915_WRITE(WM3_LP_ILK, 0);
--	if (dirty & WM_DIRTY_LP(2) && previous.wm_lp[1] != 0)
-+	if (dirty & WM_DIRTY_LP(2) && previous->wm_lp[1] != 0)
- 		I915_WRITE(WM2_LP_ILK, 0);
--	if (dirty & WM_DIRTY_LP(1) && previous.wm_lp[0] != 0)
-+	if (dirty & WM_DIRTY_LP(1) && previous->wm_lp[0] != 0)
- 		I915_WRITE(WM1_LP_ILK, 0);
- 
- 	if (dirty & WM_DIRTY_PIPE(PIPE_A))
-@@ -2908,11 +2890,11 @@ static void hsw_write_wm_values(struct drm_i915_private *dev_priv,
- 		I915_WRITE(DISP_ARB_CTL, val);
- 	}
- 
--	if (dirty & WM_DIRTY_LP(1) && previous.wm_lp_spr[0] != results->wm_lp_spr[0])
-+	if (dirty & WM_DIRTY_LP(1) && previous->wm_lp_spr[0] != results->wm_lp_spr[0])
- 		I915_WRITE(WM1S_LP_ILK, results->wm_lp_spr[0]);
--	if (dirty & WM_DIRTY_LP(2) && previous.wm_lp_spr[1] != results->wm_lp_spr[1])
-+	if (dirty & WM_DIRTY_LP(2) && previous->wm_lp_spr[1] != results->wm_lp_spr[1])
- 		I915_WRITE(WM2S_LP_IVB, results->wm_lp_spr[1]);
--	if (dirty & WM_DIRTY_LP(3) && previous.wm_lp_spr[2] != results->wm_lp_spr[2])
-+	if (dirty & WM_DIRTY_LP(3) && previous->wm_lp_spr[2] != results->wm_lp_spr[2])
- 		I915_WRITE(WM3S_LP_IVB, results->wm_lp_spr[2]);
- 
- 	if (dirty & WM_DIRTY_LP(1) && results->wm_lp[0] != 0)
-@@ -3145,6 +3127,74 @@ static void sandybridge_update_sprite_wm(struct drm_plane *plane,
- 	I915_WRITE(WM3S_LP_IVB, sprite_wm);
- }
- 
-+static void ilk_pipe_wm_get_hw_state(struct drm_crtc *crtc)
-+{
-+	struct drm_device *dev = crtc->dev;
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct hsw_wm_values *hw = &dev_priv->wm.hw;
-+	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
-+	struct intel_pipe_wm *active = &intel_crtc->wm.active;
-+	enum pipe pipe = intel_crtc->pipe;
-+	static const unsigned int wm0_pipe_reg[] = {
-+		[PIPE_A] = WM0_PIPEA_ILK,
-+		[PIPE_B] = WM0_PIPEB_ILK,
-+		[PIPE_C] = WM0_PIPEC_IVB,
-+	};
-+
-+	hw->wm_pipe[pipe] = I915_READ(wm0_pipe_reg[pipe]);
-+	hw->wm_linetime[pipe] = I915_READ(PIPE_WM_LINETIME(pipe));
-+
-+	if (intel_crtc_active(crtc)) {
-+		u32 tmp = hw->wm_pipe[pipe];
-+
-+		/*
-+		 * For active pipes LP0 watermark is marked as
-+		 * enabled, and LP1+ watermaks as disabled since
-+		 * we can't really reverse compute them in case
-+		 * multiple pipes are active.
-+		 */
-+		active->wm[0].enable = true;
-+		active->wm[0].pri_val = (tmp & WM0_PIPE_PLANE_MASK) >> WM0_PIPE_PLANE_SHIFT;
-+		active->wm[0].spr_val = (tmp & WM0_PIPE_SPRITE_MASK) >> WM0_PIPE_SPRITE_SHIFT;
-+		active->wm[0].cur_val = tmp & WM0_PIPE_CURSOR_MASK;
-+		active->linetime = hw->wm_linetime[pipe];
-+	} else {
-+		int level, max_level = ilk_wm_max_level(dev);
-+
-+		/*
-+		 * For inactive pipes, all watermark levels
-+		 * should be marked as enabled but zeroed,
-+		 * which is what we'd compute them to.
-+		 */
-+		for (level = 0; level <= max_level; level++)
-+			active->wm[level].enable = true;
-+	}
-+}
-+
-+void ilk_wm_get_hw_state(struct drm_device *dev)
-+{
-+	struct drm_i915_private *dev_priv = dev->dev_private;
-+	struct hsw_wm_values *hw = &dev_priv->wm.hw;
-+	struct drm_crtc *crtc;
-+
-+	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head)
-+		ilk_pipe_wm_get_hw_state(crtc);
-+
-+	hw->wm_lp[0] = I915_READ(WM1_LP_ILK);
-+	hw->wm_lp[1] = I915_READ(WM2_LP_ILK);
-+	hw->wm_lp[2] = I915_READ(WM3_LP_ILK);
-+
-+	hw->wm_lp_spr[0] = I915_READ(WM1S_LP_ILK);
-+	hw->wm_lp_spr[1] = I915_READ(WM2S_LP_IVB);
-+	hw->wm_lp_spr[2] = I915_READ(WM3S_LP_IVB);
-+
-+	hw->partitioning = (I915_READ(WM_MISC) & WM_MISC_DATA_PARTITION_5_6) ?
-+		INTEL_DDB_PART_5_6 : INTEL_DDB_PART_1_2;
-+
-+	hw->enable_fbc_wm =
-+		!(I915_READ(DISP_ARB_CTL) & DISP_FBC_WM_DIS);
-+}
-+
- /**
-  * intel_update_watermarks - update FIFO watermark values based on current modes
-  *
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1095-drm-i915-Remove-a-somewhat-silly-debug-print-from-wa.patch b/patches.baytrail/1095-drm-i915-Remove-a-somewhat-silly-debug-print-from-wa.patch
deleted file mode 100644
index f551ec188e467..0000000000000
--- a/patches.baytrail/1095-drm-i915-Remove-a-somewhat-silly-debug-print-from-wa.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From ea56462065c6ac50fc595b3950a1e10bbc76fd85 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Wed, 9 Oct 2013 19:18:06 +0300
-Subject: drm/i915: Remove a somewhat silly debug print from watermark code
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-This debug print just adds overhead to the watermark merging process,
-and doesn't really give enough information to be useful. Just kill
-and let's add something much better a bit later.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit dcaf13f7924b86b201f163fd71aad31a5a64fd71)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 2 --
- 1 file changed, 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 77ee14fa007b..63b3f5e4b258 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2421,8 +2421,6 @@ static bool ilk_check_wm(int level,
- 		result->enable = true;
- 	}
- 
--	DRM_DEBUG_KMS("WM%d: %sabled\n", level, result->enable ? "en" : "dis");
--
- 	return ret;
- }
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1096-drm-i915-Adjust-watermark-register-masks.patch b/patches.baytrail/1096-drm-i915-Adjust-watermark-register-masks.patch
deleted file mode 100644
index c7e904e629457..0000000000000
--- a/patches.baytrail/1096-drm-i915-Adjust-watermark-register-masks.patch
+++ /dev/null
@@ -1,53 +0,0 @@
-From 872e241a37a72f443dfc1b52df00ea35a995839d Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Wed, 9 Oct 2013 19:18:07 +0300
-Subject: drm/i915: Adjust watermark register masks
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-We want to be able to use the masks to decode the register contents
-regardless of the hardware generation. So just expand the masks to
-cover all available bits, even if those are reserved on some
-generations.
-
-v2: Don't extend WM1_LP_SR_MASK so far, for the *future*
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 1996d624403483aa8b4192f39584b0d9421ed6a9)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/i915_reg.h |   10 +++++-----
- 1 file changed, 5 insertions(+), 5 deletions(-)
-
---- a/drivers/gpu/drm/i915/i915_reg.h
-+++ b/drivers/gpu/drm/i915/i915_reg.h
-@@ -3255,11 +3255,11 @@
- 
- /* define the Watermark register on Ironlake */
- #define WM0_PIPEA_ILK		0x45100
--#define  WM0_PIPE_PLANE_MASK	(0x7f<<16)
-+#define  WM0_PIPE_PLANE_MASK	(0xffff<<16)
- #define  WM0_PIPE_PLANE_SHIFT	16
--#define  WM0_PIPE_SPRITE_MASK	(0x3f<<8)
-+#define  WM0_PIPE_SPRITE_MASK	(0xff<<8)
- #define  WM0_PIPE_SPRITE_SHIFT	8
--#define  WM0_PIPE_CURSOR_MASK	(0x1f)
-+#define  WM0_PIPE_CURSOR_MASK	(0xff)
- 
- #define WM0_PIPEB_ILK		0x45104
- #define WM0_PIPEC_IVB		0x45200
-@@ -3269,9 +3269,9 @@
- #define  WM1_LP_LATENCY_MASK	(0x7f<<24)
- #define  WM1_LP_FBC_MASK	(0xf<<20)
- #define  WM1_LP_FBC_SHIFT	20
--#define  WM1_LP_SR_MASK		(0x1ff<<8)
-+#define  WM1_LP_SR_MASK		(0x7ff<<8)
- #define  WM1_LP_SR_SHIFT	8
--#define  WM1_LP_CURSOR_MASK	(0x3f)
-+#define  WM1_LP_CURSOR_MASK	(0xff)
- #define WM2_LP_ILK		0x4510c
- #define  WM2_LP_EN		(1<<31)
- #define WM3_LP_ILK		0x45110
diff --git a/patches.baytrail/1097-drm-i915-Rename-ilk_wm_max-to-ilk_compute_wm_maximum.patch b/patches.baytrail/1097-drm-i915-Rename-ilk_wm_max-to-ilk_compute_wm_maximum.patch
deleted file mode 100644
index 3a8517a007779..0000000000000
--- a/patches.baytrail/1097-drm-i915-Rename-ilk_wm_max-to-ilk_compute_wm_maximum.patch
+++ /dev/null
@@ -1,67 +0,0 @@
-From 7ed5e50b1f3a52ab49157b818c6f35ba47ab8126 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Wed, 9 Oct 2013 19:18:09 +0300
-Subject: drm/i915: Rename ilk_wm_max to ilk_compute_wm_maximums
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Makes the intention more clear.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit 34982fe1303b7e4f24fb8a0a238ebffc8135af84)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 16 ++++++++--------
- 1 file changed, 8 insertions(+), 8 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 63b3f5e4b258..493a31334158 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2371,11 +2371,11 @@ static unsigned int ilk_fbc_wm_max(void)
- 	return 15;
- }
- 
--static void ilk_wm_max(struct drm_device *dev,
--		       int level,
--		       const struct intel_wm_config *config,
--		       enum intel_ddb_partitioning ddb_partitioning,
--		       struct hsw_wm_maximums *max)
-+static void ilk_compute_wm_maximums(struct drm_device *dev,
-+				    int level,
-+				    const struct intel_wm_config *config,
-+				    enum intel_ddb_partitioning ddb_partitioning,
-+				    struct hsw_wm_maximums *max)
- {
- 	max->pri = ilk_plane_wm_max(dev, level, config, ddb_partitioning, false);
- 	max->spr = ilk_plane_wm_max(dev, level, config, ddb_partitioning, true);
-@@ -2626,7 +2626,7 @@ static bool intel_compute_pipe_wm(struct drm_crtc *crtc,
- 	struct hsw_wm_maximums max;
- 
- 	/* LP0 watermarks always use 1/2 DDB partitioning */
--	ilk_wm_max(dev, 0, &config, INTEL_DDB_PART_1_2, &max);
-+	ilk_compute_wm_maximums(dev, 0, &config, INTEL_DDB_PART_1_2, &max);
- 
- 	for (level = 0; level <= max_level; level++)
- 		ilk_compute_wm_level(dev_priv, level, params,
-@@ -2927,12 +2927,12 @@ static void haswell_update_wm(struct drm_crtc *crtc)
- 
- 	intel_crtc->wm.active = pipe_wm;
- 
--	ilk_wm_max(dev, 1, &config, INTEL_DDB_PART_1_2, &max);
-+	ilk_compute_wm_maximums(dev, 1, &config, INTEL_DDB_PART_1_2, &max);
- 	ilk_wm_merge(dev, &max, &lp_wm_1_2);
- 
- 	/* 5/6 split only in single pipe config on IVB+ */
- 	if (INTEL_INFO(dev)->gen >= 7 && config.num_pipes_active == 1) {
--		ilk_wm_max(dev, 1, &config, INTEL_DDB_PART_5_6, &max);
-+		ilk_compute_wm_maximums(dev, 1, &config, INTEL_DDB_PART_5_6, &max);
- 		ilk_wm_merge(dev, &max, &lp_wm_5_6);
- 
- 		best_lp_wm = hsw_find_best_result(dev, &lp_wm_1_2, &lp_wm_5_6);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1098-drm-i915-Rename-ilk_check_wm-to-ilk_validate_wm_leve.patch b/patches.baytrail/1098-drm-i915-Rename-ilk_check_wm-to-ilk_validate_wm_leve.patch
deleted file mode 100644
index e4b1bca023e06..0000000000000
--- a/patches.baytrail/1098-drm-i915-Rename-ilk_check_wm-to-ilk_validate_wm_leve.patch
+++ /dev/null
@@ -1,57 +0,0 @@
-From 8989ff2c24e195f59005c81ca8550bff7f2108e7 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Wed, 9 Oct 2013 19:18:10 +0300
-Subject: drm/i915: Rename ilk_check_wm to ilk_validate_wm_level
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Makes the behaviour of the function more clear.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit d9395655b92bc80c33cb6fbacbefb9ebf16403d4)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 10 +++++-----
- 1 file changed, 5 insertions(+), 5 deletions(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index 493a31334158..cdd78f69a28b 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2383,9 +2383,9 @@ static void ilk_compute_wm_maximums(struct drm_device *dev,
- 	max->fbc = ilk_fbc_wm_max();
- }
- 
--static bool ilk_check_wm(int level,
--			 const struct hsw_wm_maximums *max,
--			 struct intel_wm_level *result)
-+static bool ilk_validate_wm_level(int level,
-+				  const struct hsw_wm_maximums *max,
-+				  struct intel_wm_level *result)
- {
- 	bool ret;
- 
-@@ -2635,7 +2635,7 @@ static bool intel_compute_pipe_wm(struct drm_crtc *crtc,
- 	pipe_wm->linetime = hsw_compute_linetime_wm(dev, crtc);
- 
- 	/* At least LP0 must be valid */
--	return ilk_check_wm(0, &max, &pipe_wm->wm[0]);
-+	return ilk_validate_wm_level(0, &max, &pipe_wm->wm[0]);
- }
- 
- /*
-@@ -2680,7 +2680,7 @@ static void ilk_wm_merge(struct drm_device *dev,
- 
- 		ilk_merge_wm_level(dev, level, wm);
- 
--		if (!ilk_check_wm(level, max, wm))
-+		if (!ilk_validate_wm_level(level, max, wm))
- 			break;
- 
- 		/*
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1099-drm-i915-Check-5-6-DDB-split-only-when-sprites-are-e.patch b/patches.baytrail/1099-drm-i915-Check-5-6-DDB-split-only-when-sprites-are-e.patch
deleted file mode 100644
index 6073f79efe737..0000000000000
--- a/patches.baytrail/1099-drm-i915-Check-5-6-DDB-split-only-when-sprites-are-e.patch
+++ /dev/null
@@ -1,38 +0,0 @@
-From e0eb5c27f3837fb948ae280c8239cf8d2197d52a Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrjala@linux.intel.com>
-Date: Fri, 11 Oct 2013 15:26:26 +0300
-Subject: drm/i915: Check 5/6 DDB split only when sprites are enabled
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Using the 5/6 DDB split make sense only when sprites are enabled.
-So check that before we waste any cycles computing the merged
-watermarks with the 5/6 DDB split.
-
-Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
-Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-(cherry picked from commit ec98c8d1ffdc87c54ec0896db45db5b7bd22eca9)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/i915/intel_pm.c | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
-index cdd78f69a28b..8064ff927bcc 100644
---- a/drivers/gpu/drm/i915/intel_pm.c
-+++ b/drivers/gpu/drm/i915/intel_pm.c
-@@ -2931,7 +2931,8 @@ static void haswell_update_wm(struct drm_crtc *crtc)
- 	ilk_wm_merge(dev, &max, &lp_wm_1_2);
- 
- 	/* 5/6 split only in single pipe config on IVB+ */
--	if (INTEL_INFO(dev)->gen >= 7 && config.num_pipes_active == 1) {
-+	if (INTEL_INFO(dev)->gen >= 7 &&
-+	    config.num_pipes_active == 1 && config.sprites_enabled) {
- 		ilk_compute_wm_maximums(dev, 1, &config, INTEL_DDB_PART_5_6, &max);
- 		ilk_wm_merge(dev, &max, &lp_wm_5_6);
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1100-imx-drm-imx-tve-Let-device-core-handle-pinctrl.patch b/patches.baytrail/1100-imx-drm-imx-tve-Let-device-core-handle-pinctrl.patch
deleted file mode 100644
index c2ee49372f226..0000000000000
--- a/patches.baytrail/1100-imx-drm-imx-tve-Let-device-core-handle-pinctrl.patch
+++ /dev/null
@@ -1,50 +0,0 @@
-From c0d23e8fc92737a782af4971ae7f96942d2c3481 Mon Sep 17 00:00:00 2001
-From: Fabio Estevam <fabio.estevam@freescale.com>
-Date: Tue, 21 May 2013 11:24:45 -0300
-Subject: imx-drm: imx-tve: Let device core handle pinctrl
-
-Since commit ab78029 (drivers/pinctrl: grab default handles from device core)
-we can rely on device core for handling pinctrl, so remove
-devm_pinctrl_get_select_default() from the driver.
-
-Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
-Acked-by: Shawn Guo <shawn.guo@linaro.org>
-Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 15f29f7f5b59429f81ff295939d30c36e69f9b2c)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/staging/imx-drm/imx-tve.c | 10 ----------
- 1 file changed, 10 deletions(-)
-
-diff --git a/drivers/staging/imx-drm/imx-tve.c b/drivers/staging/imx-drm/imx-tve.c
-index 03892de9bd7e..42f141eb183d 100644
---- a/drivers/staging/imx-drm/imx-tve.c
-+++ b/drivers/staging/imx-drm/imx-tve.c
-@@ -22,7 +22,6 @@
- #include <linux/clk-provider.h>
- #include <linux/module.h>
- #include <linux/of_i2c.h>
--#include <linux/pinctrl/consumer.h>
- #include <linux/regmap.h>
- #include <linux/regulator/consumer.h>
- #include <linux/spinlock.h>
-@@ -610,15 +609,6 @@ static int imx_tve_probe(struct platform_device *pdev)
- 	}
- 
- 	if (tve->mode == TVE_MODE_VGA) {
--		struct pinctrl *pinctrl;
--
--		pinctrl = devm_pinctrl_get_select_default(&pdev->dev);
--		if (IS_ERR(pinctrl)) {
--			ret = PTR_ERR(pinctrl);
--			dev_warn(&pdev->dev, "failed to setup pinctrl: %d", ret);
--			return ret;
--		}
--
- 		ret = of_property_read_u32(np, "fsl,hsync-pin", &tve->hsync_pin);
- 		if (ret < 0) {
- 			dev_err(&pdev->dev, "failed to get vsync pin\n");
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1101-i2c-stu300-device-tree-support.patch b/patches.baytrail/1101-i2c-stu300-device-tree-support.patch
deleted file mode 100644
index 55379d5b34ad9..0000000000000
--- a/patches.baytrail/1101-i2c-stu300-device-tree-support.patch
+++ /dev/null
@@ -1,91 +0,0 @@
-From f04e8e1eb51d8b423f88d45fe354678c8d77ba26 Mon Sep 17 00:00:00 2001
-From: Linus Walleij <linus.walleij@linaro.org>
-Date: Thu, 11 Apr 2013 14:59:47 +0200
-Subject: i2c: stu300: device tree support
-
-This adds device tree support for the ST DDC I2C driver known
-as "stu300" in the kernel tree.
-
-Reviewed-by: Wolfram Sang <wsa@the-dreams.de>
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-(cherry picked from commit 8c58d891576c726bb8217842e955827ba8bb405a)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- Documentation/devicetree/bindings/i2c/i2c-st-ddci2c.txt | 15 +++++++++++++++
- drivers/i2c/busses/i2c-stu300.c                         | 12 ++++++++++++
- 2 files changed, 27 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/i2c/i2c-st-ddci2c.txt
-
-diff --git a/Documentation/devicetree/bindings/i2c/i2c-st-ddci2c.txt b/Documentation/devicetree/bindings/i2c/i2c-st-ddci2c.txt
-new file mode 100644
-index 000000000000..bd81a482634f
---- /dev/null
-+++ b/Documentation/devicetree/bindings/i2c/i2c-st-ddci2c.txt
-@@ -0,0 +1,15 @@
-+ST Microelectronics DDC I2C
-+
-+Required properties :
-+- compatible : Must be "st,ddci2c"
-+- reg: physical base address of the controller and length of memory mapped
-+     region.
-+- interrupts: interrupt number to the cpu.
-+- #address-cells = <1>;
-+- #size-cells = <0>;
-+
-+Optional properties:
-+- Child nodes conforming to i2c bus binding
-+
-+Examples :
-+
-diff --git a/drivers/i2c/busses/i2c-stu300.c b/drivers/i2c/busses/i2c-stu300.c
-index 0a6f941133f6..1beaa05a3d2c 100644
---- a/drivers/i2c/busses/i2c-stu300.c
-+++ b/drivers/i2c/busses/i2c-stu300.c
-@@ -17,6 +17,7 @@
- #include <linux/clk.h>
- #include <linux/io.h>
- #include <linux/slab.h>
-+#include <linux/of_i2c.h>
- 
- /* the name of this kernel module */
- #define NAME "stu300"
-@@ -923,6 +924,7 @@ stu300_probe(struct platform_device *pdev)
- 	adap->nr = bus_nr;
- 	adap->algo = &stu300_algo;
- 	adap->dev.parent = &pdev->dev;
-+	adap->dev.of_node = pdev->dev.of_node;
- 	i2c_set_adapdata(adap, dev);
- 
- 	/* i2c device drivers may be active on return from add_adapter() */
-@@ -934,6 +936,10 @@ stu300_probe(struct platform_device *pdev)
- 	}
- 
- 	platform_set_drvdata(pdev, dev);
-+	dev_info(&pdev->dev, "ST DDC I2C @ %p, irq %d\n",
-+		 dev->virtbase, dev->irq);
-+	of_i2c_register_devices(adap);
-+
- 	return 0;
- }
- 
-@@ -978,11 +984,17 @@ stu300_remove(struct platform_device *pdev)
- 	return 0;
- }
- 
-+static const struct of_device_id stu300_dt_match[] = {
-+	{ .compatible = "st,ddci2c" },
-+	{},
-+};
-+
- static struct platform_driver stu300_i2c_driver = {
- 	.driver = {
- 		.name	= NAME,
- 		.owner	= THIS_MODULE,
- 		.pm	= STU300_I2C_PM,
-+		.of_match_table = stu300_dt_match,
- 	},
- 	.remove		= __exit_p(stu300_remove),
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1102-i2c-stu300-do-not-request-a-specific-clock-name.patch b/patches.baytrail/1102-i2c-stu300-do-not-request-a-specific-clock-name.patch
deleted file mode 100644
index 61b0011bb70a8..0000000000000
--- a/patches.baytrail/1102-i2c-stu300-do-not-request-a-specific-clock-name.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From b8203579dcfc6cc4d871463182b9730bf52d9ff9 Mon Sep 17 00:00:00 2001
-From: Linus Walleij <linus.walleij@linaro.org>
-Date: Thu, 23 May 2013 15:26:29 +0200
-Subject: i2c: stu300: do not request a specific clock name
-
-We have used the default clock associated with the block
-for a long time, only heuristics in the clock system has
-made this work anyway. This needs to be done away with as
-we start probing this driver and its clocks exclusively
-from the device tree.
-
-Acked-by: Wolfram Sang <wsa@the-dreams.de>
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-(cherry picked from commit 2165f836c8f7036491fae41e9bc327a3cdf2fea3)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/i2c/busses/i2c-stu300.c | 4 +---
- 1 file changed, 1 insertion(+), 3 deletions(-)
-
-diff --git a/drivers/i2c/busses/i2c-stu300.c b/drivers/i2c/busses/i2c-stu300.c
-index 1beaa05a3d2c..d1a6b204af00 100644
---- a/drivers/i2c/busses/i2c-stu300.c
-+++ b/drivers/i2c/busses/i2c-stu300.c
-@@ -868,7 +868,6 @@ stu300_probe(struct platform_device *pdev)
- 	struct resource *res;
- 	int bus_nr;
- 	int ret = 0;
--	char clk_name[] = "I2C0";
- 
- 	dev = devm_kzalloc(&pdev->dev, sizeof(struct stu300_dev), GFP_KERNEL);
- 	if (!dev) {
-@@ -877,8 +876,7 @@ stu300_probe(struct platform_device *pdev)
- 	}
- 
- 	bus_nr = pdev->id;
--	clk_name[3] += (char)bus_nr;
--	dev->clk = devm_clk_get(&pdev->dev, clk_name);
-+	dev->clk = devm_clk_get(&pdev->dev, NULL);
- 	if (IS_ERR(dev->clk)) {
- 		dev_err(&pdev->dev, "could not retrieve i2c bus clock\n");
- 		return PTR_ERR(dev->clk);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1103-pinctrl-add-pin-list-based-GPIO-ranges.patch b/patches.baytrail/1103-pinctrl-add-pin-list-based-GPIO-ranges.patch
deleted file mode 100644
index 32dd6e443141e..0000000000000
--- a/patches.baytrail/1103-pinctrl-add-pin-list-based-GPIO-ranges.patch
+++ /dev/null
@@ -1,141 +0,0 @@
-From 05ed27b017d1fc79a1a5b9354816ac52a28b0345 Mon Sep 17 00:00:00 2001
-From: Christian Ruppert <christian.ruppert@abilis.com>
-Date: Thu, 13 Jun 2013 14:55:31 +0200
-Subject: pinctrl: add pin list based GPIO ranges
-
-Traditionally, GPIO ranges are based on consecutive ranges of both GPIO
-and pin numbers. This patch allows for GPIO ranges with arbitrary lists
-of pin numbers.
-
-Signed-off-by: Christian Ruppert <christian.ruppert@abilis.com>
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-(cherry picked from commit c8587eeef8fc219e806e868c6f0c7170c769efab)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/pinctrl/core.c          |   59 +++++++++++++++++++++++++++++++++-------
- include/linux/pinctrl/pinctrl.h |    4 ++
- 2 files changed, 52 insertions(+), 11 deletions(-)
-
---- a/drivers/pinctrl/core.c
-+++ b/drivers/pinctrl/core.c
-@@ -280,6 +280,29 @@ static int pinctrl_register_pins(struct
- }
- 
- /**
-+ * gpio_to_pin() - GPIO range GPIO number to pin number translation
-+ * @range: GPIO range used for the translation
-+ * @gpio: gpio pin to translate to a pin number
-+ *
-+ * Finds the pin number for a given GPIO using the specified GPIO range
-+ * as a base for translation. The distinction between linear GPIO ranges
-+ * and pin list based GPIO ranges is managed correctly by this function.
-+ *
-+ * This function assumes the gpio is part of the specified GPIO range, use
-+ * only after making sure this is the case (e.g. by calling it on the
-+ * result of successful pinctrl_get_device_gpio_range calls)!
-+ */
-+static inline int gpio_to_pin(struct pinctrl_gpio_range *range,
-+				unsigned int gpio)
-+{
-+	unsigned int offset = gpio - range->base;
-+	if (range->pins)
-+		return range->pins[offset];
-+	else
-+		return range->pin_base + offset;
-+}
-+
-+/**
-  * pinctrl_match_gpio_range() - check if a certain GPIO pin is in range
-  * @pctldev: pin controller device to check
-  * @gpio: gpio pin to check taken from the global GPIO pin space
-@@ -444,8 +467,14 @@ pinctrl_find_gpio_range_from_pin(struct
- 	/* Loop over the ranges */
- 	list_for_each_entry(range, &pctldev->gpio_ranges, node) {
- 		/* Check if we're in the valid range */
--		if (pin >= range->pin_base &&
--		    pin < range->pin_base + range->npins) {
-+		if (range->pins) {
-+			int a;
-+			for (a = 0; a < range->npins; a++) {
-+				if (range->pins[a] == pin)
-+					return range;
-+			}
-+		} else if (pin >= range->pin_base &&
-+			   pin < range->pin_base + range->npins) {
- 			mutex_unlock(&pctldev->mutex);
- 			return range;
- 		}
-@@ -528,7 +557,7 @@ int pinctrl_request_gpio(unsigned gpio)
- 	}
- 
- 	/* Convert to the pin controllers number space */
--	pin = gpio - range->base + range->pin_base;
-+	pin = gpio_to_pin(range, gpio);
- 
- 	ret = pinmux_request_gpio(pctldev, range, pin, gpio);
- 
-@@ -562,7 +591,7 @@ void pinctrl_free_gpio(unsigned gpio)
- 	mutex_lock(&pctldev->mutex);
- 
- 	/* Convert to the pin controllers number space */
--	pin = gpio - range->base + range->pin_base;
-+	pin = gpio_to_pin(range, gpio);
- 
- 	pinmux_free_gpio(pctldev, pin, range);
- 
-@@ -589,7 +618,7 @@ static int pinctrl_gpio_direction(unsign
- 	mutex_lock(&pctldev->mutex);
- 
- 	/* Convert to the pin controllers number space */
--	pin = gpio - range->base + range->pin_base;
-+	pin = gpio_to_pin(range, gpio);
- 	ret = pinmux_gpio_direction(pctldev, range, pin, input);
- 
- 	mutex_unlock(&pctldev->mutex);
-@@ -1298,11 +1327,21 @@ static int pinctrl_gpioranges_show(struc
- 
- 	/* Loop over the ranges */
- 	list_for_each_entry(range, &pctldev->gpio_ranges, node) {
--		seq_printf(s, "%u: %s GPIOS [%u - %u] PINS [%u - %u]\n",
--			   range->id, range->name,
--			   range->base, (range->base + range->npins - 1),
--			   range->pin_base,
--			   (range->pin_base + range->npins - 1));
-+		if (range->pins) {
-+			int a;
-+			seq_printf(s, "%u: %s GPIOS [%u - %u] PINS {",
-+				range->id, range->name,
-+				range->base, (range->base + range->npins - 1));
-+			for (a = 0; a < range->npins - 1; a++)
-+				seq_printf(s, "%u, ", range->pins[a]);
-+			seq_printf(s, "%u}\n", range->pins[a]);
-+		}
-+		else
-+			seq_printf(s, "%u: %s GPIOS [%u - %u] PINS [%u - %u]\n",
-+				range->id, range->name,
-+				range->base, (range->base + range->npins - 1),
-+				range->pin_base,
-+				(range->pin_base + range->npins - 1));
- 	}
- 
- 	mutex_unlock(&pctldev->mutex);
---- a/include/linux/pinctrl/pinctrl.h
-+++ b/include/linux/pinctrl/pinctrl.h
-@@ -49,7 +49,8 @@ struct pinctrl_pin_desc {
-  * @name: a name for the chip in this range
-  * @id: an ID number for the chip in this range
-  * @base: base offset of the GPIO range
-- * @pin_base: base pin number of the GPIO range
-+ * @pin_base: base pin number of the GPIO range if pins != NULL
-+ * @pins: enumeration of pins in GPIO range or NULL
-  * @npins: number of pins in the GPIO range, including the base number
-  * @gc: an optional pointer to a gpio_chip
-  */
-@@ -59,6 +60,7 @@ struct pinctrl_gpio_range {
- 	unsigned int id;
- 	unsigned int base;
- 	unsigned int pin_base;
-+	unsigned const *pins;
- 	unsigned int npins;
- 	struct gpio_chip *gc;
- };
diff --git a/patches.baytrail/1104-pinctrl-add-Intel-BayTrail-GPIO-pinctrl-support.patch b/patches.baytrail/1104-pinctrl-add-Intel-BayTrail-GPIO-pinctrl-support.patch
deleted file mode 100644
index fac1fed103908..0000000000000
--- a/patches.baytrail/1104-pinctrl-add-Intel-BayTrail-GPIO-pinctrl-support.patch
+++ /dev/null
@@ -1,611 +0,0 @@
-From 174fb708f0a488887c2ef6bd94496dd1d8cac175 Mon Sep 17 00:00:00 2001
-From: Mathias Nyman <mathias.nyman@linux.intel.com>
-Date: Tue, 18 Jun 2013 14:33:02 +0300
-Subject: pinctrl: add Intel BayTrail GPIO/pinctrl support
-
-Add support for gpio on Intel BayTrail platforms. BayTrail supports 3 banks
-of gpios called SCORE, NCORE ans SUS with 102, 28 and 44 gpio pins.
-Supports gpio interrupts and ACPI gpio events
-
-Pins may be muxed to alternate function instead of gpio by firmware.
-This driver does not touch the pin muxing and expect firmare
-to set pin muxing and pullup/down properties properly.
-
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-(cherry picked from commit a5d811bbf1c6df86cfe23948059ea614554b9f19)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/pinctrl/Kconfig            |  12 +
- drivers/pinctrl/Makefile           |   1 +
- drivers/pinctrl/pinctrl-baytrail.c | 543 +++++++++++++++++++++++++++++++++++++
- 3 files changed, 556 insertions(+)
- create mode 100644 drivers/pinctrl/pinctrl-baytrail.c
-
-diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
-index 8f6692438149..d49cce921ae5 100644
---- a/drivers/pinctrl/Kconfig
-+++ b/drivers/pinctrl/Kconfig
-@@ -58,6 +58,18 @@ config PINCTRL_AT91
- 	help
- 	  Say Y here to enable the at91 pinctrl driver
- 
-+config PINCTRL_BAYTRAIL
-+	bool "Intel Baytrail GPIO pin control"
-+	depends on GPIOLIB && ACPI && X86
-+        select IRQ_DOMAIN
-+	help
-+	  driver for memory mapped GPIO functionality on Intel Baytrail
-+	  platforms. Supports 3 banks with 102, 28 and 44 gpios.
-+	  Most pins are usually muxed to some other functionality by firmware,
-+	  so only a small amount is available for gpio use.
-+
-+	  Requires ACPI device enumeration code to set up a platform device.
-+
- config PINCTRL_BCM2835
- 	bool
- 	select PINMUX
-diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
-index 9bdaeb8785ce..80f523924097 100644
---- a/drivers/pinctrl/Makefile
-+++ b/drivers/pinctrl/Makefile
-@@ -16,6 +16,7 @@ obj-$(CONFIG_PINCTRL_AB9540)	+= pinctrl-ab9540.o
- obj-$(CONFIG_PINCTRL_AB8505)	+= pinctrl-ab8505.o
- obj-$(CONFIG_PINCTRL_AT91)	+= pinctrl-at91.o
- obj-$(CONFIG_PINCTRL_BCM2835)	+= pinctrl-bcm2835.o
-+obj-$(CONFIG_PINCTRL_BAYTRAIL)	+= pinctrl-baytrail.o
- obj-$(CONFIG_PINCTRL_IMX)	+= pinctrl-imx.o
- obj-$(CONFIG_PINCTRL_IMX35)	+= pinctrl-imx35.o
- obj-$(CONFIG_PINCTRL_IMX51)	+= pinctrl-imx51.o
-diff --git a/drivers/pinctrl/pinctrl-baytrail.c b/drivers/pinctrl/pinctrl-baytrail.c
-new file mode 100644
-index 000000000000..e9d735dcebfb
---- /dev/null
-+++ b/drivers/pinctrl/pinctrl-baytrail.c
-@@ -0,0 +1,543 @@
-+/*
-+ * Pinctrl GPIO driver for Intel Baytrail
-+ * Copyright (c) 2012-2013, Intel Corporation.
-+ *
-+ * Author: Mathias Nyman <mathias.nyman@linux.intel.com>
-+ *
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms and conditions of the GNU General Public License,
-+ * version 2, as published by the Free Software Foundation.
-+ *
-+ * This program is distributed in the hope it will be useful, but WITHOUT
-+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
-+ * more details.
-+ *
-+ * You should have received a copy of the GNU General Public License along with
-+ * this program; if not, write to the Free Software Foundation, Inc.,
-+ * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
-+ *
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/module.h>
-+#include <linux/init.h>
-+#include <linux/types.h>
-+#include <linux/bitops.h>
-+#include <linux/interrupt.h>
-+#include <linux/irq.h>
-+#include <linux/gpio.h>
-+#include <linux/irqdomain.h>
-+#include <linux/acpi.h>
-+#include <linux/acpi_gpio.h>
-+#include <linux/platform_device.h>
-+#include <linux/seq_file.h>
-+#include <linux/io.h>
-+#include <linux/pm_runtime.h>
-+#include <linux/pinctrl/pinctrl.h>
-+
-+/* memory mapped register offsets */
-+#define BYT_CONF0_REG		0x000
-+#define BYT_CONF1_REG		0x004
-+#define BYT_VAL_REG		0x008
-+#define BYT_DFT_REG		0x00c
-+#define BYT_INT_STAT_REG	0x800
-+
-+/* BYT_CONF0_REG register bits */
-+#define BYT_TRIG_NEG		BIT(26)
-+#define BYT_TRIG_POS		BIT(25)
-+#define BYT_TRIG_LVL		BIT(24)
-+#define BYT_PIN_MUX		0x07
-+
-+/* BYT_VAL_REG register bits */
-+#define BYT_INPUT_EN		BIT(2)  /* 0: input enabled (active low)*/
-+#define BYT_OUTPUT_EN		BIT(1)  /* 0: output enabled (active low)*/
-+#define BYT_LEVEL		BIT(0)
-+
-+#define BYT_DIR_MASK		(BIT(1) | BIT(2))
-+#define BYT_TRIG_MASK		(BIT(26) | BIT(25) | BIT(24))
-+
-+#define BYT_NGPIO_SCORE		102
-+#define BYT_NGPIO_NCORE		28
-+#define BYT_NGPIO_SUS		44
-+
-+/*
-+ * Baytrail gpio controller consist of three separate sub-controllers called
-+ * SCORE, NCORE and SUS. The sub-controllers are identified by their acpi UID.
-+ *
-+ * GPIO numbering is _not_ ordered meaning that gpio # 0 in ACPI namespace does
-+ * _not_ correspond to the first gpio register at controller's gpio base.
-+ * There is no logic or pattern in mapping gpio numbers to registers (pads) so
-+ * each sub-controller needs to have its own mapping table
-+ */
-+
-+/* score_pins[gpio_nr] = pad_nr */
-+
-+static unsigned const score_pins[BYT_NGPIO_SCORE] = {
-+	85, 89, 93, 96, 99, 102, 98, 101, 34, 37,
-+	36, 38, 39, 35, 40, 84, 62, 61, 64, 59,
-+	54, 56, 60, 55, 63, 57, 51, 50, 53, 47,
-+	52, 49, 48, 43, 46, 41, 45, 42, 58, 44,
-+	95, 105, 70, 68, 67, 66, 69, 71, 65, 72,
-+	86, 90, 88, 92, 103, 77, 79, 83, 78, 81,
-+	80, 82, 13, 12, 15, 14, 17, 18, 19, 16,
-+	2, 1, 0, 4, 6, 7, 9, 8, 33, 32,
-+	31, 30, 29, 27, 25, 28, 26, 23, 21, 20,
-+	24, 22, 5, 3, 10, 11, 106, 87, 91, 104,
-+	97, 100,
-+};
-+
-+static unsigned const ncore_pins[BYT_NGPIO_NCORE] = {
-+	19, 18, 17, 20, 21, 22, 24, 25, 23, 16,
-+	14, 15, 12, 26, 27, 1, 4, 8, 11, 0,
-+	3, 6, 10, 13, 2, 5, 9, 7,
-+};
-+
-+static unsigned const sus_pins[BYT_NGPIO_SUS] = {
-+	29, 33, 30, 31, 32, 34, 36, 35, 38, 37,
-+	18, 7, 11, 20, 17, 1, 8, 10, 19, 12,
-+	0, 2, 23, 39, 28, 27, 22, 21, 24, 25,
-+	26, 51, 56, 54, 49, 55, 48, 57, 50, 58,
-+	52, 53, 59, 40,
-+};
-+
-+static struct pinctrl_gpio_range byt_ranges[] = {
-+	{
-+		.name = "1", /* match with acpi _UID in probe */
-+		.npins = BYT_NGPIO_SCORE,
-+		.pins = score_pins,
-+	},
-+	{
-+		.name = "2",
-+		.npins = BYT_NGPIO_NCORE,
-+		.pins = ncore_pins,
-+	},
-+	{
-+		.name = "3",
-+		.npins = BYT_NGPIO_SUS,
-+		.pins = sus_pins,
-+	},
-+	{
-+	},
-+};
-+
-+struct byt_gpio {
-+	struct gpio_chip		chip;
-+	struct irq_domain		*domain;
-+	struct platform_device		*pdev;
-+	spinlock_t			lock;
-+	void __iomem			*reg_base;
-+	struct pinctrl_gpio_range	*range;
-+};
-+
-+static void __iomem *byt_gpio_reg(struct gpio_chip *chip, unsigned offset,
-+				 int reg)
-+{
-+	struct byt_gpio *vg = container_of(chip, struct byt_gpio, chip);
-+	u32 reg_offset;
-+	void __iomem *ptr;
-+
-+	if (reg == BYT_INT_STAT_REG)
-+		reg_offset = (offset / 32) * 4;
-+	else
-+		reg_offset = vg->range->pins[offset] * 16;
-+
-+	ptr = (void __iomem *) (vg->reg_base + reg_offset + reg);
-+	return ptr;
-+}
-+
-+static int byt_gpio_request(struct gpio_chip *chip, unsigned offset)
-+{
-+	struct byt_gpio *vg = container_of(chip, struct byt_gpio, chip);
-+
-+	pm_runtime_get(&vg->pdev->dev);
-+
-+	return 0;
-+}
-+
-+static void byt_gpio_free(struct gpio_chip *chip, unsigned offset)
-+{
-+	struct byt_gpio *vg = container_of(chip, struct byt_gpio, chip);
-+	void __iomem *reg = byt_gpio_reg(&vg->chip, offset, BYT_CONF0_REG);
-+	u32 value;
-+
-+	/* clear interrupt triggering */
-+	value = readl(reg);
-+	value &= ~(BYT_TRIG_POS | BYT_TRIG_NEG | BYT_TRIG_LVL);
-+	writel(value, reg);
-+
-+	pm_runtime_put(&vg->pdev->dev);
-+}
-+
-+static int byt_irq_type(struct irq_data *d, unsigned type)
-+{
-+	struct byt_gpio *vg = irq_data_get_irq_chip_data(d);
-+	u32 offset = irqd_to_hwirq(d);
-+	u32 value;
-+	unsigned long flags;
-+	void __iomem *reg = byt_gpio_reg(&vg->chip, offset, BYT_CONF0_REG);
-+
-+	if (offset >= vg->chip.ngpio)
-+		return -EINVAL;
-+
-+	spin_lock_irqsave(&vg->lock, flags);
-+	value = readl(reg);
-+
-+	/* For level trigges the BYT_TRIG_POS and BYT_TRIG_NEG bits
-+	 * are used to indicate high and low level triggering
-+	 */
-+	value &= ~(BYT_TRIG_POS | BYT_TRIG_NEG | BYT_TRIG_LVL);
-+
-+	switch (type) {
-+	case IRQ_TYPE_LEVEL_HIGH:
-+		value |= BYT_TRIG_LVL;
-+	case IRQ_TYPE_EDGE_RISING:
-+		value |= BYT_TRIG_POS;
-+		break;
-+	case IRQ_TYPE_LEVEL_LOW:
-+		value |= BYT_TRIG_LVL;
-+	case IRQ_TYPE_EDGE_FALLING:
-+		value |= BYT_TRIG_NEG;
-+		break;
-+	case IRQ_TYPE_EDGE_BOTH:
-+		value |= (BYT_TRIG_NEG | BYT_TRIG_POS);
-+		break;
-+	}
-+	writel(value, reg);
-+
-+	spin_unlock_irqrestore(&vg->lock, flags);
-+
-+	return 0;
-+}
-+
-+static int byt_gpio_get(struct gpio_chip *chip, unsigned offset)
-+{
-+	void __iomem *reg = byt_gpio_reg(chip, offset, BYT_VAL_REG);
-+	return readl(reg) & BYT_LEVEL;
-+}
-+
-+static void byt_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
-+{
-+	struct byt_gpio *vg = container_of(chip, struct byt_gpio, chip);
-+	void __iomem *reg = byt_gpio_reg(chip, offset, BYT_VAL_REG);
-+	unsigned long flags;
-+	u32 old_val;
-+
-+	spin_lock_irqsave(&vg->lock, flags);
-+
-+	old_val = readl(reg);
-+
-+	if (value)
-+		writel(old_val | BYT_LEVEL, reg);
-+	else
-+		writel(old_val & ~BYT_LEVEL, reg);
-+
-+	spin_unlock_irqrestore(&vg->lock, flags);
-+}
-+
-+static int byt_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
-+{
-+	struct byt_gpio *vg = container_of(chip, struct byt_gpio, chip);
-+	void __iomem *reg = byt_gpio_reg(chip, offset, BYT_VAL_REG);
-+	unsigned long flags;
-+	u32 value;
-+
-+	spin_lock_irqsave(&vg->lock, flags);
-+
-+	value = readl(reg) | BYT_DIR_MASK;
-+	value = value & (~BYT_INPUT_EN); /* active low */
-+	writel(value, reg);
-+
-+	spin_unlock_irqrestore(&vg->lock, flags);
-+
-+	return 0;
-+}
-+
-+static int byt_gpio_direction_output(struct gpio_chip *chip,
-+				     unsigned gpio, int value)
-+{
-+	struct byt_gpio *vg = container_of(chip, struct byt_gpio, chip);
-+	void __iomem *reg = byt_gpio_reg(chip, gpio, BYT_VAL_REG);
-+	unsigned long flags;
-+	u32 reg_val;
-+
-+	spin_lock_irqsave(&vg->lock, flags);
-+
-+	reg_val = readl(reg) | (BYT_DIR_MASK | !!value);
-+	reg_val &= ~(BYT_OUTPUT_EN | !value);
-+	writel(reg_val, reg);
-+
-+	spin_unlock_irqrestore(&vg->lock, flags);
-+
-+	return 0;
-+}
-+
-+static void byt_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
-+{
-+	struct byt_gpio *vg = container_of(chip, struct byt_gpio, chip);
-+	int i;
-+	unsigned long flags;
-+	u32 conf0, val, offs;
-+
-+	spin_lock_irqsave(&vg->lock, flags);
-+
-+	for (i = 0; i < vg->chip.ngpio; i++) {
-+		offs = vg->range->pins[i] * 16;
-+		conf0 = readl(vg->reg_base + offs + BYT_CONF0_REG);
-+		val = readl(vg->reg_base + offs + BYT_VAL_REG);
-+
-+		seq_printf(s,
-+			   " gpio-%-3d %s %s %s pad-%-3d offset:0x%03x mux:%d %s%s%s\n",
-+			   i,
-+			   val & BYT_INPUT_EN ? "  " : "in",
-+			   val & BYT_OUTPUT_EN ? "   " : "out",
-+			   val & BYT_LEVEL ? "hi" : "lo",
-+			   vg->range->pins[i], offs,
-+			   conf0 & 0x7,
-+			   conf0 & BYT_TRIG_NEG ? "fall " : "",
-+			   conf0 & BYT_TRIG_POS ? "rise " : "",
-+			   conf0 & BYT_TRIG_LVL ? "lvl " : "");
-+	}
-+	spin_unlock_irqrestore(&vg->lock, flags);
-+}
-+
-+static int byt_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
-+{
-+	struct byt_gpio *vg = container_of(chip, struct byt_gpio, chip);
-+	return irq_create_mapping(vg->domain, offset);
-+}
-+
-+static void byt_gpio_irq_handler(unsigned irq, struct irq_desc *desc)
-+{
-+	struct irq_data *data = irq_desc_get_irq_data(desc);
-+	struct byt_gpio *vg = irq_data_get_irq_handler_data(data);
-+	struct irq_chip *chip = irq_data_get_irq_chip(data);
-+	u32 base, pin, mask;
-+	void __iomem *reg;
-+	u32 pending;
-+	unsigned virq;
-+	int looplimit = 0;
-+
-+	/* check from GPIO controller which pin triggered the interrupt */
-+	for (base = 0; base < vg->chip.ngpio; base += 32) {
-+
-+		reg = byt_gpio_reg(&vg->chip, base, BYT_INT_STAT_REG);
-+
-+		while ((pending = readl(reg))) {
-+			pin = __ffs(pending);
-+			mask = BIT(pin);
-+			/* Clear before handling so we can't lose an edge */
-+			writel(mask, reg);
-+
-+			virq = irq_find_mapping(vg->domain, base + pin);
-+			generic_handle_irq(virq);
-+
-+			/* In case bios or user sets triggering incorretly a pin
-+			 * might remain in "interrupt triggered" state.
-+			 */
-+			if (looplimit++ > 32) {
-+				dev_err(&vg->pdev->dev,
-+					"Gpio %d interrupt flood, disabling\n",
-+					base + pin);
-+
-+				reg = byt_gpio_reg(&vg->chip, base + pin,
-+						   BYT_CONF0_REG);
-+				mask = readl(reg);
-+				mask &= ~(BYT_TRIG_NEG | BYT_TRIG_POS |
-+					  BYT_TRIG_LVL);
-+				writel(mask, reg);
-+				mask = readl(reg); /* flush */
-+				break;
-+			}
-+		}
-+	}
-+	chip->irq_eoi(data);
-+}
-+
-+static void byt_irq_unmask(struct irq_data *d)
-+{
-+}
-+
-+static void byt_irq_mask(struct irq_data *d)
-+{
-+}
-+
-+static struct irq_chip byt_irqchip = {
-+	.name = "BYT-GPIO",
-+	.irq_mask = byt_irq_mask,
-+	.irq_unmask = byt_irq_unmask,
-+	.irq_set_type = byt_irq_type,
-+};
-+
-+static void byt_gpio_irq_init_hw(struct byt_gpio *vg)
-+{
-+	void __iomem *reg;
-+	u32 base, value;
-+
-+	/* clear interrupt status trigger registers */
-+	for (base = 0; base < vg->chip.ngpio; base += 32) {
-+		reg = byt_gpio_reg(&vg->chip, base, BYT_INT_STAT_REG);
-+		writel(0xffffffff, reg);
-+		/* make sure trigger bits are cleared, if not then a pin
-+		   might be misconfigured in bios */
-+		value = readl(reg);
-+		if (value)
-+			dev_err(&vg->pdev->dev,
-+				"GPIO interrupt error, pins misconfigured\n");
-+	}
-+}
-+
-+static int byt_gpio_irq_map(struct irq_domain *d, unsigned int virq,
-+			    irq_hw_number_t hw)
-+{
-+	struct byt_gpio *vg = d->host_data;
-+
-+	irq_set_chip_and_handler_name(virq, &byt_irqchip, handle_simple_irq,
-+				      "demux");
-+	irq_set_chip_data(virq, vg);
-+	irq_set_irq_type(virq, IRQ_TYPE_NONE);
-+
-+	return 0;
-+}
-+
-+static const struct irq_domain_ops byt_gpio_irq_ops = {
-+	.map = byt_gpio_irq_map,
-+};
-+
-+static int byt_gpio_probe(struct platform_device *pdev)
-+{
-+	struct byt_gpio *vg;
-+	struct gpio_chip *gc;
-+	struct resource *mem_rc, *irq_rc;
-+	struct device *dev = &pdev->dev;
-+	struct acpi_device *acpi_dev;
-+	struct pinctrl_gpio_range *range;
-+	acpi_handle handle = ACPI_HANDLE(dev);
-+	unsigned hwirq;
-+	int ret;
-+
-+	if (acpi_bus_get_device(handle, &acpi_dev))
-+		return -ENODEV;
-+
-+	vg = devm_kzalloc(dev, sizeof(struct byt_gpio), GFP_KERNEL);
-+	if (!vg) {
-+		dev_err(&pdev->dev, "can't allocate byt_gpio chip data\n");
-+		return -ENOMEM;
-+	}
-+
-+	for (range = byt_ranges; range->name; range++) {
-+		if (!strcmp(acpi_dev->pnp.unique_id, range->name)) {
-+			vg->chip.ngpio = range->npins;
-+			vg->range = range;
-+			break;
-+		}
-+	}
-+
-+	if (!vg->chip.ngpio || !vg->range)
-+		return -ENODEV;
-+
-+	vg->pdev = pdev;
-+	platform_set_drvdata(pdev, vg);
-+
-+	mem_rc = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+	vg->reg_base = devm_ioremap_resource(dev, mem_rc);
-+	if (IS_ERR(vg->reg_base))
-+		return PTR_ERR(vg->reg_base);
-+
-+	spin_lock_init(&vg->lock);
-+
-+	gc = &vg->chip;
-+	gc->label = dev_name(&pdev->dev);
-+	gc->owner = THIS_MODULE;
-+	gc->request = byt_gpio_request;
-+	gc->free = byt_gpio_free;
-+	gc->direction_input = byt_gpio_direction_input;
-+	gc->direction_output = byt_gpio_direction_output;
-+	gc->get = byt_gpio_get;
-+	gc->set = byt_gpio_set;
-+	gc->dbg_show = byt_gpio_dbg_show;
-+	gc->base = -1;
-+	gc->can_sleep = 0;
-+	gc->dev = dev;
-+
-+	ret = gpiochip_add(gc);
-+	if (ret) {
-+		dev_err(&pdev->dev, "failed adding byt-gpio chip\n");
-+		return ret;
-+	}
-+
-+	/* set up interrupts  */
-+	irq_rc = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
-+	if (irq_rc && irq_rc->start) {
-+		hwirq = irq_rc->start;
-+		gc->to_irq = byt_gpio_to_irq;
-+
-+		vg->domain = irq_domain_add_linear(NULL, gc->ngpio,
-+						   &byt_gpio_irq_ops, vg);
-+		if (!vg->domain)
-+			return -ENXIO;
-+
-+		byt_gpio_irq_init_hw(vg);
-+
-+		irq_set_handler_data(hwirq, vg);
-+		irq_set_chained_handler(hwirq, byt_gpio_irq_handler);
-+
-+		/* Register interrupt handlers for gpio signaled acpi events */
-+		acpi_gpiochip_request_interrupts(gc);
-+	}
-+
-+	pm_runtime_enable(dev);
-+
-+	return 0;
-+}
-+
-+static int byt_gpio_runtime_suspend(struct device *dev)
-+{
-+	return 0;
-+}
-+
-+static int byt_gpio_runtime_resume(struct device *dev)
-+{
-+	return 0;
-+}
-+
-+static const struct dev_pm_ops byt_gpio_pm_ops = {
-+	.runtime_suspend = byt_gpio_runtime_suspend,
-+	.runtime_resume = byt_gpio_runtime_resume,
-+};
-+
-+static const struct acpi_device_id byt_gpio_acpi_match[] = {
-+	{ "INT33B2", 0 },
-+	{ }
-+};
-+MODULE_DEVICE_TABLE(acpi, byt_gpio_acpi_match);
-+
-+static int byt_gpio_remove(struct platform_device *pdev)
-+{
-+	struct byt_gpio *vg = platform_get_drvdata(pdev);
-+	int err;
-+	pm_runtime_disable(&pdev->dev);
-+	err = gpiochip_remove(&vg->chip);
-+	if (err)
-+		dev_warn(&pdev->dev, "failed to remove gpio_chip.\n");
-+
-+	return 0;
-+}
-+
-+static struct platform_driver byt_gpio_driver = {
-+	.probe          = byt_gpio_probe,
-+	.remove         = byt_gpio_remove,
-+	.driver         = {
-+		.name   = "byt_gpio",
-+		.owner  = THIS_MODULE,
-+		.pm	= &byt_gpio_pm_ops,
-+		.acpi_match_table = ACPI_PTR(byt_gpio_acpi_match),
-+	},
-+};
-+
-+static int __init byt_gpio_init(void)
-+{
-+	return platform_driver_register(&byt_gpio_driver);
-+}
-+
-+subsys_initcall(byt_gpio_init);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1105-spi-pxa2xx-fix-compile-warning-in-pxa2xx_spi_acpi_ge.patch b/patches.baytrail/1105-spi-pxa2xx-fix-compile-warning-in-pxa2xx_spi_acpi_ge.patch
deleted file mode 100644
index 8fa6243dfe0ef..0000000000000
--- a/patches.baytrail/1105-spi-pxa2xx-fix-compile-warning-in-pxa2xx_spi_acpi_ge.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-From 7bb1d5b2f3a638eba39a97d6599c98f0ecb04495 Mon Sep 17 00:00:00 2001
-From: Mika Westerberg <mika.westerberg@linux.intel.com>
-Date: Mon, 13 May 2013 13:45:09 +0300
-Subject: spi/pxa2xx: fix compile warning in pxa2xx_spi_acpi_get_pdata()
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Commit cbfd6a21b6f (spi/pxa2xx: Convert to devm_ioremap_resource())
-converted the driver to use devm_ioremap_resource(). However it causes
-following warning to be emitted:
-
-drivers/spi/spi-pxa2xx.c: In function ‘pxa2xx_spi_acpi_get_pdata’:
-drivers/spi/spi-pxa2xx.c:1094:3: warning: return makes pointer from integer without a cast [enabled by default]
-
-Fix this by returning NULL as it was done previously (error printing is
-already done by devm_ioremap_resource()).
-
-Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
-Cc: Sachin Kamat <sachin.kamat@linaro.org>
-Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
-(cherry picked from commit 6dc81f6fc0eaf0714bc6e959f8769705f41fd708)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/spi/spi-pxa2xx.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c
-index 48b396fced0a..c26735ec15b9 100644
---- a/drivers/spi/spi-pxa2xx.c
-+++ b/drivers/spi/spi-pxa2xx.c
-@@ -1091,7 +1091,7 @@ pxa2xx_spi_acpi_get_pdata(struct platform_device *pdev)
- 	ssp->phys_base = res->start;
- 	ssp->mmio_base = devm_ioremap_resource(&pdev->dev, res);
- 	if (IS_ERR(ssp->mmio_base))
--		return PTR_ERR(ssp->mmio_base);
-+		return NULL;
- 
- 	ssp->clk = devm_clk_get(&pdev->dev, NULL);
- 	ssp->irq = platform_get_irq(pdev, 0);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1106-spi-pxa2xx-convert-to-dma_request_slave_channel_comp.patch b/patches.baytrail/1106-spi-pxa2xx-convert-to-dma_request_slave_channel_comp.patch
deleted file mode 100644
index bada499f3f5ab..0000000000000
--- a/patches.baytrail/1106-spi-pxa2xx-convert-to-dma_request_slave_channel_comp.patch
+++ /dev/null
@@ -1,118 +0,0 @@
-From 50fef689bcf05080c672ffdf30c05e491afcf8b0 Mon Sep 17 00:00:00 2001
-From: Mika Westerberg <mika.westerberg@linux.intel.com>
-Date: Mon, 13 May 2013 13:45:10 +0300
-Subject: spi/pxa2xx: convert to dma_request_slave_channel_compat()
-
-Now that we have these nice DMA API helper functions we can take advantage
-of those instead of open-coding the channel/request line extraction from
-ACPI. Use the _compat version which still allows passing the
-channel/request line from platform data.
-
-Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
-Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
-(cherry picked from commit cddb339badb03dd96a5272195eec17e7899df154)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/spi/spi-pxa2xx-dma.c | 11 ++++++-----
- drivers/spi/spi-pxa2xx.c     | 34 ++--------------------------------
- 2 files changed, 8 insertions(+), 37 deletions(-)
-
-diff --git a/drivers/spi/spi-pxa2xx-dma.c b/drivers/spi/spi-pxa2xx-dma.c
-index 6427600b5bbe..3c0b55125f1e 100644
---- a/drivers/spi/spi-pxa2xx-dma.c
-+++ b/drivers/spi/spi-pxa2xx-dma.c
-@@ -327,22 +327,23 @@ void pxa2xx_spi_dma_start(struct driver_data *drv_data)
- int pxa2xx_spi_dma_setup(struct driver_data *drv_data)
- {
- 	struct pxa2xx_spi_master *pdata = drv_data->master_info;
-+	struct device *dev = &drv_data->pdev->dev;
- 	dma_cap_mask_t mask;
- 
- 	dma_cap_zero(mask);
- 	dma_cap_set(DMA_SLAVE, mask);
- 
--	drv_data->dummy = devm_kzalloc(&drv_data->pdev->dev, SZ_2K, GFP_KERNEL);
-+	drv_data->dummy = devm_kzalloc(dev, SZ_2K, GFP_KERNEL);
- 	if (!drv_data->dummy)
- 		return -ENOMEM;
- 
--	drv_data->tx_chan = dma_request_channel(mask, pxa2xx_spi_dma_filter,
--						pdata);
-+	drv_data->tx_chan = dma_request_slave_channel_compat(mask,
-+				pxa2xx_spi_dma_filter, pdata, dev, "tx");
- 	if (!drv_data->tx_chan)
- 		return -ENODEV;
- 
--	drv_data->rx_chan = dma_request_channel(mask, pxa2xx_spi_dma_filter,
--						pdata);
-+	drv_data->rx_chan = dma_request_slave_channel_compat(mask,
-+				pxa2xx_spi_dma_filter, pdata, dev, "rx");
- 	if (!drv_data->rx_chan) {
- 		dma_release_channel(drv_data->tx_chan);
- 		drv_data->tx_chan = NULL;
-diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c
-index c26735ec15b9..d4f1a2f44553 100644
---- a/drivers/spi/spi-pxa2xx.c
-+++ b/drivers/spi/spi-pxa2xx.c
-@@ -1040,32 +1040,10 @@ static void cleanup(struct spi_device *spi)
- }
- 
- #ifdef CONFIG_ACPI
--static int pxa2xx_spi_acpi_add_dma(struct acpi_resource *res, void *data)
--{
--	struct pxa2xx_spi_master *pdata = data;
--
--	if (res->type == ACPI_RESOURCE_TYPE_FIXED_DMA) {
--		const struct acpi_resource_fixed_dma *dma;
--
--		dma = &res->data.fixed_dma;
--		if (pdata->tx_slave_id < 0) {
--			pdata->tx_slave_id = dma->request_lines;
--			pdata->tx_chan_id = dma->channels;
--		} else if (pdata->rx_slave_id < 0) {
--			pdata->rx_slave_id = dma->request_lines;
--			pdata->rx_chan_id = dma->channels;
--		}
--	}
--
--	/* Tell the ACPI core to skip this resource */
--	return 1;
--}
--
- static struct pxa2xx_spi_master *
- pxa2xx_spi_acpi_get_pdata(struct platform_device *pdev)
- {
- 	struct pxa2xx_spi_master *pdata;
--	struct list_head resource_list;
- 	struct acpi_device *adev;
- 	struct ssp_device *ssp;
- 	struct resource *res;
-@@ -1103,15 +1081,7 @@ pxa2xx_spi_acpi_get_pdata(struct platform_device *pdev)
- 		ssp->port_id = devid;
- 
- 	pdata->num_chipselect = 1;
--	pdata->rx_slave_id = -1;
--	pdata->tx_slave_id = -1;
--
--	INIT_LIST_HEAD(&resource_list);
--	acpi_dev_get_resources(adev, &resource_list, pxa2xx_spi_acpi_add_dma,
--			       pdata);
--	acpi_dev_free_resource_list(&resource_list);
--
--	pdata->enable_dma = pdata->rx_slave_id >= 0 && pdata->tx_slave_id >= 0;
-+	pdata->enable_dma = true;
- 
- 	return pdata;
- }
-@@ -1214,7 +1184,7 @@ static int pxa2xx_spi_probe(struct platform_device *pdev)
- 	if (platform_info->enable_dma) {
- 		status = pxa2xx_spi_dma_setup(drv_data);
- 		if (status) {
--			dev_warn(dev, "failed to setup DMA, using PIO\n");
-+			dev_dbg(dev, "no DMA channels available, using PIO\n");
- 			platform_info->enable_dma = false;
- 		}
- 	}
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1107-spi-pxa2xx-add-Intel-BayTrail-ACPI-ID.patch b/patches.baytrail/1107-spi-pxa2xx-add-Intel-BayTrail-ACPI-ID.patch
deleted file mode 100644
index 1c0ef3fdb3161..0000000000000
--- a/patches.baytrail/1107-spi-pxa2xx-add-Intel-BayTrail-ACPI-ID.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From 804ae7bf1b26198d9471d77028fb3db714720f5b Mon Sep 17 00:00:00 2001
-From: Mika Westerberg <mika.westerberg@linux.intel.com>
-Date: Mon, 13 May 2013 13:45:11 +0300
-Subject: spi/pxa2xx: add Intel BayTrail ACPI ID
-
-Intel BayTrail has one general purpose SPI controller that is compatible
-with Intel Low Power Subsystem SPI. The controller is enumerated from ACPI
-namespace with ACPI ID 80860F0E.
-
-Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
-Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
-(cherry picked from commit 4b30f2a1218220c295b01af6f219ab0477064a74)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/spi/spi-pxa2xx.c | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c
-index d4f1a2f44553..97e23c9fb732 100644
---- a/drivers/spi/spi-pxa2xx.c
-+++ b/drivers/spi/spi-pxa2xx.c
-@@ -1089,6 +1089,7 @@ pxa2xx_spi_acpi_get_pdata(struct platform_device *pdev)
- static struct acpi_device_id pxa2xx_spi_acpi_match[] = {
- 	{ "INT33C0", 0 },
- 	{ "INT33C1", 0 },
-+	{ "80860F0E", 0 },
- 	{ },
- };
- MODULE_DEVICE_TABLE(acpi, pxa2xx_spi_acpi_match);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1108-ACPI-LPSS-add-support-for-Intel-BayTrail.patch b/patches.baytrail/1108-ACPI-LPSS-add-support-for-Intel-BayTrail.patch
deleted file mode 100644
index 28483f7bc652b..0000000000000
--- a/patches.baytrail/1108-ACPI-LPSS-add-support-for-Intel-BayTrail.patch
+++ /dev/null
@@ -1,185 +0,0 @@
-From 905fb80893330a2576f1b959aae064e0c42dea7a Mon Sep 17 00:00:00 2001
-From: Mika Westerberg <mika.westerberg@linux.intel.com>
-Date: Mon, 13 May 2013 12:42:44 +0000
-Subject: ACPI / LPSS: add support for Intel BayTrail
-
-Intel BayTrail has almost the same Low Power Subsystem than Lynxpoint with
-few differences. Peripherals are clocked with different speeds (typically
-lower) and the clock is not always gated. To support this we add
-possibility to share a common fixed rate clock and make clock gating
-optional.
-
-Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
-Acked-by: Mike Turquette <mturquette@linaro.org>
-Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
-(cherry picked from commit f627217064dbef1eef53ceb01edb9c94203991e0)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/acpi/acpi_lpss.c  | 88 +++++++++++++++++++++++++++++++++++++++++++----
- drivers/clk/x86/clk-lpt.c |  4 +--
- 2 files changed, 82 insertions(+), 10 deletions(-)
-
-diff --git a/drivers/acpi/acpi_lpss.c b/drivers/acpi/acpi_lpss.c
-index 7c451cb26254..3a8167c99ba9 100644
---- a/drivers/acpi/acpi_lpss.c
-+++ b/drivers/acpi/acpi_lpss.c
-@@ -33,11 +33,19 @@ ACPI_MODULE_NAME("acpi_lpss");
- #define LPSS_SW_LTR			0x10
- #define LPSS_AUTO_LTR			0x14
- 
-+struct lpss_shared_clock {
-+	const char *name;
-+	unsigned long rate;
-+	struct clk *clk;
-+};
-+
- struct lpss_device_desc {
- 	bool clk_required;
- 	const char *clkdev_name;
- 	bool ltr_required;
- 	unsigned int prv_offset;
-+	bool clk_gate;
-+	struct lpss_shared_clock *shared_clock;
- };
- 
- static struct lpss_device_desc lpss_dma_desc = {
-@@ -56,6 +64,7 @@ static struct lpss_device_desc lpt_dev_desc = {
- 	.clk_required = true,
- 	.prv_offset = 0x800,
- 	.ltr_required = true,
-+	.clk_gate = true,
- };
- 
- static struct lpss_device_desc lpt_sdio_dev_desc = {
-@@ -63,6 +72,45 @@ static struct lpss_device_desc lpt_sdio_dev_desc = {
- 	.ltr_required = true,
- };
- 
-+static struct lpss_shared_clock uart_clock = {
-+	.name = "uart_clk",
-+	.rate = 44236800,
-+};
-+
-+static struct lpss_device_desc byt_uart_dev_desc = {
-+	.clk_required = true,
-+	.prv_offset = 0x800,
-+	.clk_gate = true,
-+	.shared_clock = &uart_clock,
-+};
-+
-+static struct lpss_shared_clock spi_clock = {
-+	.name = "spi_clk",
-+	.rate = 50000000,
-+};
-+
-+static struct lpss_device_desc byt_spi_dev_desc = {
-+	.clk_required = true,
-+	.prv_offset = 0x400,
-+	.clk_gate = true,
-+	.shared_clock = &spi_clock,
-+};
-+
-+static struct lpss_device_desc byt_sdio_dev_desc = {
-+	.clk_required = true,
-+};
-+
-+static struct lpss_shared_clock i2c_clock = {
-+	.name = "i2c_clk",
-+	.rate = 100000000,
-+};
-+
-+static struct lpss_device_desc byt_i2c_dev_desc = {
-+	.clk_required = true,
-+	.prv_offset = 0x800,
-+	.shared_clock = &i2c_clock,
-+};
-+
- static const struct acpi_device_id acpi_lpss_device_ids[] = {
- 	/* Generic LPSS devices */
- 	{ "INTL9C60", (unsigned long)&lpss_dma_desc },
-@@ -77,6 +125,13 @@ static const struct acpi_device_id acpi_lpss_device_ids[] = {
- 	{ "INT33C6", (unsigned long)&lpt_sdio_dev_desc },
- 	{ "INT33C7", },
- 
-+	/* BayTrail LPSS devices */
-+	{ "80860F0A", (unsigned long)&byt_uart_dev_desc },
-+	{ "80860F0E", (unsigned long)&byt_spi_dev_desc },
-+	{ "80860F14", (unsigned long)&byt_sdio_dev_desc },
-+	{ "80860F41", (unsigned long)&byt_i2c_dev_desc },
-+	{ "INT33B2", },
-+
- 	{ }
- };
- 
-@@ -98,7 +153,10 @@ static int register_device_clock(struct acpi_device *adev,
- 				 struct lpss_private_data *pdata)
- {
- 	const struct lpss_device_desc *dev_desc = pdata->dev_desc;
-+	struct lpss_shared_clock *shared_clock = dev_desc->shared_clock;
-+	struct clk *clk = ERR_PTR(-ENODEV);
- 	struct lpss_clk_data *clk_data;
-+	const char *parent;
- 
- 	if (!lpss_clk_dev)
- 		lpt_register_clock_device();
-@@ -117,14 +175,30 @@ static int register_device_clock(struct acpi_device *adev,
- 	    || pdata->mmio_size < dev_desc->prv_offset + LPSS_CLK_SIZE)
- 		return -ENODATA;
- 
--	pdata->clk = clk_register_gate(NULL, dev_name(&adev->dev),
--				       clk_data->name, 0,
--				       pdata->mmio_base + dev_desc->prv_offset,
--				       0, 0, NULL);
--	if (IS_ERR(pdata->clk))
--		return PTR_ERR(pdata->clk);
-+	parent = clk_data->name;
-+
-+	if (shared_clock) {
-+		clk = shared_clock->clk;
-+		if (!clk) {
-+			clk = clk_register_fixed_rate(NULL, shared_clock->name,
-+						      "lpss_clk", 0,
-+						      shared_clock->rate);
-+			shared_clock->clk = clk;
-+		}
-+		parent = shared_clock->name;
-+	}
-+
-+	if (dev_desc->clk_gate) {
-+		clk = clk_register_gate(NULL, dev_name(&adev->dev), parent, 0,
-+					pdata->mmio_base + dev_desc->prv_offset,
-+					0, 0, NULL);
-+		pdata->clk = clk;
-+	}
-+
-+	if (IS_ERR(clk))
-+		return PTR_ERR(clk);
- 
--	clk_register_clkdev(pdata->clk, NULL, dev_name(&adev->dev));
-+	clk_register_clkdev(clk, NULL, dev_name(&adev->dev));
- 	return 0;
- }
- 
-diff --git a/drivers/clk/x86/clk-lpt.c b/drivers/clk/x86/clk-lpt.c
-index 4f45eee9e33b..812f83f8b0c6 100644
---- a/drivers/clk/x86/clk-lpt.c
-+++ b/drivers/clk/x86/clk-lpt.c
-@@ -1,5 +1,5 @@
- /*
-- * Intel Lynxpoint LPSS clocks.
-+ * Intel Low Power Subsystem clocks.
-  *
-  * Copyright (C) 2013, Intel Corporation
-  * Authors: Mika Westerberg <mika.westerberg@linux.intel.com>
-@@ -18,8 +18,6 @@
- #include <linux/platform_data/clk-lpss.h>
- #include <linux/platform_device.h>
- 
--#define PRV_CLOCK_PARAMS 0x800
--
- static int lpt_clk_probe(struct platform_device *pdev)
- {
- 	struct lpss_clk_data *drvdata;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1109-ACPI-LPSS-mask-the-UART-TX-completion-interrupt.patch b/patches.baytrail/1109-ACPI-LPSS-mask-the-UART-TX-completion-interrupt.patch
deleted file mode 100644
index c2a35a0a009af..0000000000000
--- a/patches.baytrail/1109-ACPI-LPSS-mask-the-UART-TX-completion-interrupt.patch
+++ /dev/null
@@ -1,126 +0,0 @@
-From 196bcfdf4c6f897aeb47b8d364bd24550b4c90b7 Mon Sep 17 00:00:00 2001
-From: Heikki Krogerus <heikki.krogerus@linux.intel.com>
-Date: Mon, 17 Jun 2013 13:25:46 +0300
-Subject: ACPI / LPSS: mask the UART TX completion interrupt
-
-Intel LPSS provides an extra TX byte counter and an extra TX
-completion interrupt for some of its bus controllers.  However,
-there is no use for the extra UART interrupt and it has to be
-masked out during initialization.
-
-Otherwise, if the firmware does not mask the interrupt and
-the driver does not clear it, it may cause an interrupt flood
-freezing the board to happen.
-
-Add code masking that problematic interrupt to the ACPI LPSS driver.
-
-[rjw: Changelog]
-Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
-Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
-(cherry picked from commit 06d8641504726322fca54400bbac982bd44f9a27)
-
-Conflicts:
-
-	drivers/acpi/acpi_lpss.c
-
-Account for 3.10 backport:
-b9e95fc ACPI / LPSS: Power up LPSS devices during enumeration
-
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/acpi/acpi_lpss.c | 30 ++++++++++++++++++++++++++++--
- 1 file changed, 28 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/acpi/acpi_lpss.c b/drivers/acpi/acpi_lpss.c
-index 3a8167c99ba9..b3f36a8ce006 100644
---- a/drivers/acpi/acpi_lpss.c
-+++ b/drivers/acpi/acpi_lpss.c
-@@ -32,6 +32,8 @@ ACPI_MODULE_NAME("acpi_lpss");
- #define LPSS_GENERAL_LTR_MODE_SW	BIT(2)
- #define LPSS_SW_LTR			0x10
- #define LPSS_AUTO_LTR			0x14
-+#define LPSS_TX_INT			0x20
-+#define LPSS_TX_INT_MASK		BIT(1)
- 
- struct lpss_shared_clock {
- 	const char *name;
-@@ -39,6 +41,8 @@ struct lpss_shared_clock {
- 	struct clk *clk;
- };
- 
-+struct lpss_private_data;
-+
- struct lpss_device_desc {
- 	bool clk_required;
- 	const char *clkdev_name;
-@@ -46,6 +50,7 @@ struct lpss_device_desc {
- 	unsigned int prv_offset;
- 	bool clk_gate;
- 	struct lpss_shared_clock *shared_clock;
-+	void (*setup)(struct lpss_private_data *pdata);
- };
- 
- static struct lpss_device_desc lpss_dma_desc = {
-@@ -60,6 +65,15 @@ struct lpss_private_data {
- 	const struct lpss_device_desc *dev_desc;
- };
- 
-+static void lpss_uart_setup(struct lpss_private_data *pdata)
-+{
-+	unsigned int tx_int_offset = pdata->dev_desc->prv_offset + LPSS_TX_INT;
-+	u32 reg;
-+
-+	reg = readl(pdata->mmio_base + tx_int_offset);
-+	writel(reg | LPSS_TX_INT_MASK, pdata->mmio_base + tx_int_offset);
-+}
-+
- static struct lpss_device_desc lpt_dev_desc = {
- 	.clk_required = true,
- 	.prv_offset = 0x800,
-@@ -67,6 +81,14 @@ static struct lpss_device_desc lpt_dev_desc = {
- 	.clk_gate = true,
- };
- 
-+static struct lpss_device_desc lpt_uart_dev_desc = {
-+	.clk_required = true,
-+	.prv_offset = 0x800,
-+	.ltr_required = true,
-+	.clk_gate = true,
-+	.setup = lpss_uart_setup,
-+};
-+
- static struct lpss_device_desc lpt_sdio_dev_desc = {
- 	.prv_offset = 0x1000,
- 	.ltr_required = true,
-@@ -82,6 +104,7 @@ static struct lpss_device_desc byt_uart_dev_desc = {
- 	.prv_offset = 0x800,
- 	.clk_gate = true,
- 	.shared_clock = &uart_clock,
-+	.setup = lpss_uart_setup,
- };
- 
- static struct lpss_shared_clock spi_clock = {
-@@ -120,8 +143,8 @@ static const struct acpi_device_id acpi_lpss_device_ids[] = {
- 	{ "INT33C1", (unsigned long)&lpt_dev_desc },
- 	{ "INT33C2", (unsigned long)&lpt_dev_desc },
- 	{ "INT33C3", (unsigned long)&lpt_dev_desc },
--	{ "INT33C4", (unsigned long)&lpt_dev_desc },
--	{ "INT33C5", (unsigned long)&lpt_dev_desc },
-+	{ "INT33C4", (unsigned long)&lpt_uart_dev_desc },
-+	{ "INT33C5", (unsigned long)&lpt_uart_dev_desc },
- 	{ "INT33C6", (unsigned long)&lpt_sdio_dev_desc },
- 	{ "INT33C7", },
- 
-@@ -257,6 +280,9 @@ static int acpi_lpss_create_device(struct acpi_device *adev,
- 		goto err_out;
- 	}
- 
-+	if (dev_desc->setup)
-+		dev_desc->setup(pdata);
-+
- 	adev->driver_data = pdata;
- 	ret = acpi_create_platform_device(adev, id);
- 	if (ret > 0)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1110-ACPI-LPSS-override-SDIO-private-register-space-size-.patch b/patches.baytrail/1110-ACPI-LPSS-override-SDIO-private-register-space-size-.patch
deleted file mode 100644
index 81805a5bd1429..0000000000000
--- a/patches.baytrail/1110-ACPI-LPSS-override-SDIO-private-register-space-size-.patch
+++ /dev/null
@@ -1,61 +0,0 @@
-From 949e5dd3fdd0056eaf25e09d6e21497aa296c109 Mon Sep 17 00:00:00 2001
-From: Mika Westerberg <mika.westerberg@linux.intel.com>
-Date: Tue, 18 Jun 2013 16:51:35 +0300
-Subject: ACPI / LPSS: override SDIO private register space size from ACPI
- tables
-
-The SDIO device in Lynxpoint has its LTR registers reserved for a
-WiFi device (a child of the SDIO device) in the ACPI namespace even
-though those registers physically belong to the SDIO device itself.
-In order to be able to access the SDIO LTR registers from the ACPI
-LPSS driver for diagnostic purposes we need to use a size override
-for the SDIO private register space.
-
-Add a possibility to override the size of the private register space
-of an LPSS device provided by the ACPI tables in the ACPI LPSS driver
-and set the correct size for the SDIO device in there.
-
-[rjw: Changelog]
-Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
-Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
-(cherry picked from commit 958c4eb2aa325099ea1f54c7354e381e3d79f3ae)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/acpi/acpi_lpss.c | 7 ++++++-
- 1 file changed, 6 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/acpi/acpi_lpss.c b/drivers/acpi/acpi_lpss.c
-index b3f36a8ce006..fb78bb9ad8f6 100644
---- a/drivers/acpi/acpi_lpss.c
-+++ b/drivers/acpi/acpi_lpss.c
-@@ -48,6 +48,7 @@ struct lpss_device_desc {
- 	const char *clkdev_name;
- 	bool ltr_required;
- 	unsigned int prv_offset;
-+	size_t prv_size_override;
- 	bool clk_gate;
- 	struct lpss_shared_clock *shared_clock;
- 	void (*setup)(struct lpss_private_data *pdata);
-@@ -91,6 +92,7 @@ static struct lpss_device_desc lpt_uart_dev_desc = {
- 
- static struct lpss_device_desc lpt_sdio_dev_desc = {
- 	.prv_offset = 0x1000,
-+	.prv_size_override = 0x1018,
- 	.ltr_required = true,
- };
- 
-@@ -249,7 +251,10 @@ static int acpi_lpss_create_device(struct acpi_device *adev,
- 
- 	list_for_each_entry(rentry, &resource_list, node)
- 		if (resource_type(&rentry->res) == IORESOURCE_MEM) {
--			pdata->mmio_size = resource_size(&rentry->res);
-+			if (dev_desc->prv_size_override)
-+				pdata->mmio_size = dev_desc->prv_size_override;
-+			else
-+				pdata->mmio_size = resource_size(&rentry->res);
- 			pdata->mmio_base = ioremap(rentry->res.start,
- 						   pdata->mmio_size);
- 			break;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1111-ALSA-hda-add-PCI-IDs-for-Intel-BayTrail.patch b/patches.baytrail/1111-ALSA-hda-add-PCI-IDs-for-Intel-BayTrail.patch
deleted file mode 100644
index 19b6ab4c99c12..0000000000000
--- a/patches.baytrail/1111-ALSA-hda-add-PCI-IDs-for-Intel-BayTrail.patch
+++ /dev/null
@@ -1,28 +0,0 @@
-From da0ebff09b9fa9cef0b893ed498ca1788eabe775 Mon Sep 17 00:00:00 2001
-From: "Chew, Chiau Ee" <chiau.ee.chew@intel.com>
-Date: Thu, 16 May 2013 15:36:12 +0800
-Subject: ALSA: hda - add PCI IDs for Intel BayTrail
-
-Add HD Audio Device PCI ID for the Intel BayTrail platform.
-
-Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
-Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
-Signed-off-by: Takashi Iwai <tiwai@suse.de>
-(cherry picked from commit e44007e0f97fdae45b73cf61e9962493ddcc6114)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- sound/pci/hda/hda_intel.c |    3 +++
- 1 file changed, 3 insertions(+)
-
---- a/sound/pci/hda/hda_intel.c
-+++ b/sound/pci/hda/hda_intel.c
-@@ -3883,6 +3883,9 @@ static DEFINE_PCI_DEVICE_TABLE(azx_ids)
- 	/* Oaktrail */
- 	{ PCI_DEVICE(0x8086, 0x080a),
- 	  .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_NOPM },
-+	/* BayTrail */
-+	{ PCI_DEVICE(0x8086, 0x0f04),
-+	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM },
- 	/* ICH */
- 	{ PCI_DEVICE(0x8086, 0x2668),
- 	  .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
diff --git a/patches.baytrail/1112-ASoC-fsl-add-imx-wm8962-machine-driver.patch b/patches.baytrail/1112-ASoC-fsl-add-imx-wm8962-machine-driver.patch
deleted file mode 100644
index 4867cf7cd0bc1..0000000000000
--- a/patches.baytrail/1112-ASoC-fsl-add-imx-wm8962-machine-driver.patch
+++ /dev/null
@@ -1,446 +0,0 @@
-From 9979fca0f104684ffd1707680bb049ee8f3cee4a Mon Sep 17 00:00:00 2001
-From: Nicolin Chen <nicoleotsuka@gmail.com>
-Date: Tue, 11 Jun 2013 02:43:30 +0800
-Subject: ASoC: fsl: add imx-wm8962 machine driver
-
-This is the initial imx-wm8962 device-tree-only machine driver working with
-fsl_ssi driver. More features can be added on top of it later.
-
-Signed-off-by: Nicolin Chen <b42378@freescale.com>
-Signed-off-by: Mark Brown <broonie@linaro.org>
-(cherry picked from commit 8de2ae2a7f1fd71dc56d6b014029f93093e9c5d5)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- .../devicetree/bindings/sound/imx-audio-wm8962.txt |  46 +++
- sound/soc/fsl/Kconfig                              |  12 +
- sound/soc/fsl/Makefile                             |   2 +
- sound/soc/fsl/imx-wm8962.c                         | 323 +++++++++++++++++++++
- 4 files changed, 383 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/sound/imx-audio-wm8962.txt
- create mode 100644 sound/soc/fsl/imx-wm8962.c
-
-diff --git a/Documentation/devicetree/bindings/sound/imx-audio-wm8962.txt b/Documentation/devicetree/bindings/sound/imx-audio-wm8962.txt
-new file mode 100644
-index 000000000000..f49450a87890
---- /dev/null
-+++ b/Documentation/devicetree/bindings/sound/imx-audio-wm8962.txt
-@@ -0,0 +1,46 @@
-+Freescale i.MX audio complex with WM8962 codec
-+
-+Required properties:
-+- compatible : "fsl,imx-audio-wm8962"
-+- model : The user-visible name of this sound complex
-+- ssi-controller : The phandle of the i.MX SSI controller
-+- audio-codec : The phandle of the WM8962 audio codec
-+- audio-routing : A list of the connections between audio components.
-+  Each entry is a pair of strings, the first being the connection's sink,
-+  the second being the connection's source. Valid names could be power
-+  supplies, WM8962 pins, and the jacks on the board:
-+
-+  Power supplies:
-+   * Mic Bias
-+
-+  Board connectors:
-+   * Mic Jack
-+   * Headphone Jack
-+   * Ext Spk
-+
-+- mux-int-port : The internal port of the i.MX audio muxer (AUDMUX)
-+- mux-ext-port : The external port of the i.MX audio muxer
-+
-+Note: The AUDMUX port numbering should start at 1, which is consistent with
-+hardware manual.
-+
-+Example:
-+
-+sound {
-+	compatible = "fsl,imx6q-sabresd-wm8962",
-+		     "fsl,imx-audio-wm8962";
-+	model = "wm8962-audio";
-+	ssi-controller = <&ssi2>;
-+	audio-codec = <&codec>;
-+		audio-routing =
-+		"Headphone Jack", "HPOUTL",
-+		"Headphone Jack", "HPOUTR",
-+		"Ext Spk", "SPKOUTL",
-+		"Ext Spk", "SPKOUTR",
-+		"MICBIAS", "AMIC",
-+		"IN3R", "MICBIAS",
-+		"DMIC", "MICBIAS",
-+		"DMICDAT", "DMIC";
-+	mux-int-port = <2>;
-+	mux-ext-port = <3>;
-+};
-diff --git a/sound/soc/fsl/Kconfig b/sound/soc/fsl/Kconfig
-index 3843a18d4e56..174dd91fa9c3 100644
---- a/sound/soc/fsl/Kconfig
-+++ b/sound/soc/fsl/Kconfig
-@@ -173,6 +173,18 @@ config SND_SOC_EUKREA_TLV320
- 	  Enable I2S based access to the TLV320AIC23B codec attached
- 	  to the SSI interface
- 
-+config SND_SOC_IMX_WM8962
-+	tristate "SoC Audio support for i.MX boards with wm8962"
-+	depends on OF && I2C
-+	select SND_SOC_WM8962
-+	select SND_SOC_IMX_PCM_DMA
-+	select SND_SOC_IMX_AUDMUX
-+	select SND_SOC_FSL_SSI
-+	select SND_SOC_FSL_UTILS
-+	help
-+	  Say Y if you want to add support for SoC audio on an i.MX board with
-+	  a wm8962 codec.
-+
- config SND_SOC_IMX_SGTL5000
- 	tristate "SoC Audio support for i.MX boards with sgtl5000"
- 	depends on OF && I2C
-diff --git a/sound/soc/fsl/Makefile b/sound/soc/fsl/Makefile
-index afd34794db53..4588480e7ae0 100644
---- a/sound/soc/fsl/Makefile
-+++ b/sound/soc/fsl/Makefile
-@@ -49,6 +49,7 @@ snd-soc-phycore-ac97-objs := phycore-ac97.o
- snd-soc-mx27vis-aic32x4-objs := mx27vis-aic32x4.o
- snd-soc-wm1133-ev1-objs := wm1133-ev1.o
- snd-soc-imx-sgtl5000-objs := imx-sgtl5000.o
-+snd-soc-imx-wm8962-objs := imx-wm8962.o
- snd-soc-imx-mc13783-objs := imx-mc13783.o
- 
- obj-$(CONFIG_SND_SOC_EUKREA_TLV320) += snd-soc-eukrea-tlv320.o
-@@ -56,4 +57,5 @@ obj-$(CONFIG_SND_SOC_PHYCORE_AC97) += snd-soc-phycore-ac97.o
- obj-$(CONFIG_SND_SOC_MX27VIS_AIC32X4) += snd-soc-mx27vis-aic32x4.o
- obj-$(CONFIG_SND_MXC_SOC_WM1133_EV1) += snd-soc-wm1133-ev1.o
- obj-$(CONFIG_SND_SOC_IMX_SGTL5000) += snd-soc-imx-sgtl5000.o
-+obj-$(CONFIG_SND_SOC_IMX_WM8962) += snd-soc-imx-wm8962.o
- obj-$(CONFIG_SND_SOC_IMX_MC13783) += snd-soc-imx-mc13783.o
-diff --git a/sound/soc/fsl/imx-wm8962.c b/sound/soc/fsl/imx-wm8962.c
-new file mode 100644
-index 000000000000..52a36a90f4f4
---- /dev/null
-+++ b/sound/soc/fsl/imx-wm8962.c
-@@ -0,0 +1,323 @@
-+/*
-+ * Copyright 2013 Freescale Semiconductor, Inc.
-+ *
-+ * Based on imx-sgtl5000.c
-+ * Copyright 2012 Freescale Semiconductor, Inc.
-+ * Copyright 2012 Linaro Ltd.
-+ *
-+ * The code contained herein is licensed under the GNU General Public
-+ * License. You may obtain a copy of the GNU General Public License
-+ * Version 2 or later at the following locations:
-+ *
-+ * http://www.opensource.org/licenses/gpl-license.html
-+ * http://www.gnu.org/copyleft/gpl.html
-+ */
-+
-+#include <linux/module.h>
-+#include <linux/of_platform.h>
-+#include <linux/of_i2c.h>
-+#include <linux/slab.h>
-+#include <linux/clk.h>
-+#include <sound/soc.h>
-+#include <sound/pcm_params.h>
-+#include <sound/soc-dapm.h>
-+#include <linux/pinctrl/consumer.h>
-+
-+#include "../codecs/wm8962.h"
-+#include "imx-audmux.h"
-+
-+#define DAI_NAME_SIZE	32
-+
-+struct imx_wm8962_data {
-+	struct snd_soc_dai_link dai;
-+	struct snd_soc_card card;
-+	char codec_dai_name[DAI_NAME_SIZE];
-+	char platform_name[DAI_NAME_SIZE];
-+	struct clk *codec_clk;
-+	unsigned int clk_frequency;
-+};
-+
-+struct imx_priv {
-+	struct platform_device *pdev;
-+};
-+static struct imx_priv card_priv;
-+
-+static const struct snd_soc_dapm_widget imx_wm8962_dapm_widgets[] = {
-+	SND_SOC_DAPM_HP("Headphone Jack", NULL),
-+	SND_SOC_DAPM_SPK("Ext Spk", NULL),
-+	SND_SOC_DAPM_MIC("AMIC", NULL),
-+	SND_SOC_DAPM_MIC("DMIC", NULL),
-+};
-+
-+static int sample_rate = 44100;
-+static snd_pcm_format_t sample_format = SNDRV_PCM_FORMAT_S16_LE;
-+
-+static int imx_hifi_hw_params(struct snd_pcm_substream *substream,
-+		struct snd_pcm_hw_params *params)
-+{
-+	sample_rate = params_rate(params);
-+	sample_format = params_format(params);
-+
-+	return 0;
-+}
-+
-+static struct snd_soc_ops imx_hifi_ops = {
-+	.hw_params = imx_hifi_hw_params,
-+};
-+
-+static int imx_wm8962_set_bias_level(struct snd_soc_card *card,
-+					struct snd_soc_dapm_context *dapm,
-+					enum snd_soc_bias_level level)
-+{
-+	struct snd_soc_dai *codec_dai = card->rtd[0].codec_dai;
-+	struct imx_priv *priv = &card_priv;
-+	struct imx_wm8962_data *data = platform_get_drvdata(priv->pdev);
-+	struct device *dev = &priv->pdev->dev;
-+	unsigned int pll_out;
-+	int ret;
-+
-+	if (dapm->dev != codec_dai->dev)
-+		return 0;
-+
-+	switch (level) {
-+	case SND_SOC_BIAS_PREPARE:
-+		if (dapm->bias_level == SND_SOC_BIAS_STANDBY) {
-+			if (sample_format == SNDRV_PCM_FORMAT_S24_LE)
-+				pll_out = sample_rate * 384;
-+			else
-+				pll_out = sample_rate * 256;
-+
-+			ret = snd_soc_dai_set_pll(codec_dai, WM8962_FLL,
-+					WM8962_FLL_MCLK, data->clk_frequency,
-+					pll_out);
-+			if (ret < 0) {
-+				dev_err(dev, "failed to start FLL: %d\n", ret);
-+				return ret;
-+			}
-+
-+			ret = snd_soc_dai_set_sysclk(codec_dai,
-+					WM8962_SYSCLK_FLL, pll_out,
-+					SND_SOC_CLOCK_IN);
-+			if (ret < 0) {
-+				dev_err(dev, "failed to set SYSCLK: %d\n", ret);
-+				return ret;
-+			}
-+		}
-+		break;
-+
-+	case SND_SOC_BIAS_STANDBY:
-+		if (dapm->bias_level == SND_SOC_BIAS_PREPARE) {
-+			ret = snd_soc_dai_set_sysclk(codec_dai,
-+					WM8962_SYSCLK_MCLK, data->clk_frequency,
-+					SND_SOC_CLOCK_IN);
-+			if (ret < 0) {
-+				dev_err(dev,
-+					"failed to switch away from FLL: %d\n",
-+					ret);
-+				return ret;
-+			}
-+
-+			ret = snd_soc_dai_set_pll(codec_dai, WM8962_FLL,
-+					0, 0, 0);
-+			if (ret < 0) {
-+				dev_err(dev, "failed to stop FLL: %d\n", ret);
-+				return ret;
-+			}
-+		}
-+		break;
-+
-+	default:
-+		break;
-+	}
-+
-+	dapm->bias_level = level;
-+
-+	return 0;
-+}
-+
-+static int imx_wm8962_late_probe(struct snd_soc_card *card)
-+{
-+	struct snd_soc_dai *codec_dai = card->rtd[0].codec_dai;
-+	struct imx_priv *priv = &card_priv;
-+	struct imx_wm8962_data *data = platform_get_drvdata(priv->pdev);
-+	struct device *dev = &priv->pdev->dev;
-+	int ret;
-+
-+	ret = snd_soc_dai_set_sysclk(codec_dai, WM8962_SYSCLK_MCLK,
-+			data->clk_frequency, SND_SOC_CLOCK_IN);
-+	if (ret < 0)
-+		dev_err(dev, "failed to set sysclk in %s\n", __func__);
-+
-+	return ret;
-+}
-+
-+static int imx_wm8962_probe(struct platform_device *pdev)
-+{
-+	struct device_node *np = pdev->dev.of_node;
-+	struct device_node *ssi_np, *codec_np;
-+	struct platform_device *ssi_pdev;
-+	struct imx_priv *priv = &card_priv;
-+	struct i2c_client *codec_dev;
-+	struct imx_wm8962_data *data;
-+	int int_port, ext_port;
-+	int ret;
-+
-+	priv->pdev = pdev;
-+
-+	ret = of_property_read_u32(np, "mux-int-port", &int_port);
-+	if (ret) {
-+		dev_err(&pdev->dev, "mux-int-port missing or invalid\n");
-+		return ret;
-+	}
-+	ret = of_property_read_u32(np, "mux-ext-port", &ext_port);
-+	if (ret) {
-+		dev_err(&pdev->dev, "mux-ext-port missing or invalid\n");
-+		return ret;
-+	}
-+
-+	/*
-+	 * The port numbering in the hardware manual starts at 1, while
-+	 * the audmux API expects it starts at 0.
-+	 */
-+	int_port--;
-+	ext_port--;
-+	ret = imx_audmux_v2_configure_port(int_port,
-+			IMX_AUDMUX_V2_PTCR_SYN |
-+			IMX_AUDMUX_V2_PTCR_TFSEL(ext_port) |
-+			IMX_AUDMUX_V2_PTCR_TCSEL(ext_port) |
-+			IMX_AUDMUX_V2_PTCR_TFSDIR |
-+			IMX_AUDMUX_V2_PTCR_TCLKDIR,
-+			IMX_AUDMUX_V2_PDCR_RXDSEL(ext_port));
-+	if (ret) {
-+		dev_err(&pdev->dev, "audmux internal port setup failed\n");
-+		return ret;
-+	}
-+	imx_audmux_v2_configure_port(ext_port,
-+			IMX_AUDMUX_V2_PTCR_SYN,
-+			IMX_AUDMUX_V2_PDCR_RXDSEL(int_port));
-+	if (ret) {
-+		dev_err(&pdev->dev, "audmux external port setup failed\n");
-+		return ret;
-+	}
-+
-+	ssi_np = of_parse_phandle(pdev->dev.of_node, "ssi-controller", 0);
-+	codec_np = of_parse_phandle(pdev->dev.of_node, "audio-codec", 0);
-+	if (!ssi_np || !codec_np) {
-+		dev_err(&pdev->dev, "phandle missing or invalid\n");
-+		ret = -EINVAL;
-+		goto fail;
-+	}
-+
-+	ssi_pdev = of_find_device_by_node(ssi_np);
-+	if (!ssi_pdev) {
-+		dev_err(&pdev->dev, "failed to find SSI platform device\n");
-+		ret = -EINVAL;
-+		goto fail;
-+	}
-+	codec_dev = of_find_i2c_device_by_node(codec_np);
-+	if (!codec_dev || !codec_dev->driver) {
-+		dev_err(&pdev->dev, "failed to find codec platform device\n");
-+		return -EINVAL;
-+	}
-+
-+	data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
-+	if (!data) {
-+		ret = -ENOMEM;
-+		goto fail;
-+	}
-+
-+	data->codec_clk = devm_clk_get(&codec_dev->dev, NULL);
-+	if (IS_ERR(data->codec_clk)) {
-+		ret = PTR_ERR(data->codec_clk);
-+		dev_err(&codec_dev->dev, "failed to get codec clk: %d\n", ret);
-+		goto fail;
-+	}
-+
-+	data->clk_frequency = clk_get_rate(data->codec_clk);
-+	ret = clk_prepare_enable(data->codec_clk);
-+	if (ret) {
-+		dev_err(&codec_dev->dev, "failed to enable codec clk: %d\n", ret);
-+		goto fail;
-+	}
-+
-+	data->dai.name = "HiFi";
-+	data->dai.stream_name = "HiFi";
-+	data->dai.codec_dai_name = "wm8962";
-+	data->dai.codec_of_node = codec_np;
-+	data->dai.cpu_dai_name = dev_name(&ssi_pdev->dev);
-+	data->dai.platform_of_node = ssi_np;
-+	data->dai.ops = &imx_hifi_ops;
-+	data->dai.dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF |
-+			    SND_SOC_DAIFMT_CBM_CFM;
-+
-+	data->card.dev = &pdev->dev;
-+	ret = snd_soc_of_parse_card_name(&data->card, "model");
-+	if (ret)
-+		goto clk_fail;
-+	ret = snd_soc_of_parse_audio_routing(&data->card, "audio-routing");
-+	if (ret)
-+		goto clk_fail;
-+	data->card.num_links = 1;
-+	data->card.dai_link = &data->dai;
-+	data->card.dapm_widgets = imx_wm8962_dapm_widgets;
-+	data->card.num_dapm_widgets = ARRAY_SIZE(imx_wm8962_dapm_widgets);
-+
-+	data->card.late_probe = imx_wm8962_late_probe;
-+	data->card.set_bias_level = imx_wm8962_set_bias_level;
-+
-+	ret = snd_soc_register_card(&data->card);
-+	if (ret) {
-+		dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n", ret);
-+		goto clk_fail;
-+	}
-+
-+	platform_set_drvdata(pdev, data);
-+	of_node_put(ssi_np);
-+	of_node_put(codec_np);
-+
-+	return 0;
-+
-+clk_fail:
-+	if (!IS_ERR(data->codec_clk))
-+		clk_disable_unprepare(data->codec_clk);
-+fail:
-+	if (ssi_np)
-+		of_node_put(ssi_np);
-+	if (codec_np)
-+		of_node_put(codec_np);
-+
-+	return ret;
-+}
-+
-+static int imx_wm8962_remove(struct platform_device *pdev)
-+{
-+	struct imx_wm8962_data *data = platform_get_drvdata(pdev);
-+
-+	if (!IS_ERR(data->codec_clk))
-+		clk_disable_unprepare(data->codec_clk);
-+	snd_soc_unregister_card(&data->card);
-+
-+	return 0;
-+}
-+
-+static const struct of_device_id imx_wm8962_dt_ids[] = {
-+	{ .compatible = "fsl,imx-audio-wm8962", },
-+	{ /* sentinel */ }
-+};
-+MODULE_DEVICE_TABLE(of, imx_wm8962_dt_ids);
-+
-+static struct platform_driver imx_wm8962_driver = {
-+	.driver = {
-+		.name = "imx-wm8962",
-+		.owner = THIS_MODULE,
-+		.of_match_table = imx_wm8962_dt_ids,
-+	},
-+	.probe = imx_wm8962_probe,
-+	.remove = imx_wm8962_remove,
-+};
-+module_platform_driver(imx_wm8962_driver);
-+
-+MODULE_AUTHOR("Freescale Semiconductor, Inc.");
-+MODULE_DESCRIPTION("Freescale i.MX WM8962 ASoC machine driver");
-+MODULE_LICENSE("GPL v2");
-+MODULE_ALIAS("platform:imx-wm8962");
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1113-I2C-mv64xxx-use-return-value-from-mv64xxx_i2c_map_re.patch b/patches.baytrail/1113-I2C-mv64xxx-use-return-value-from-mv64xxx_i2c_map_re.patch
deleted file mode 100644
index 7add029beb04c..0000000000000
--- a/patches.baytrail/1113-I2C-mv64xxx-use-return-value-from-mv64xxx_i2c_map_re.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 4a261b5fc63d9ed1d5ce6dc6c8fb62ab21462d47 Mon Sep 17 00:00:00 2001
-From: Russell King <rmk+kernel@arm.linux.org.uk>
-Date: Thu, 16 May 2013 10:32:08 +0000
-Subject: I2C: mv64xxx: use return value from mv64xxx_i2c_map_regs()
-
-mv64xxx_i2c_map_regs() already returns an error code, so lets
-propagate that to mv64xxx_i2c_probe()'s caller.
-
-Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-Acked-by: Mark A. Greer <mgreer@animalcreek.com>
-Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-(cherry picked from commit d5ac456144413950d2d32ec4f22542e45be13cd7)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/i2c/busses/i2c-mv64xxx.c | 5 ++---
- 1 file changed, 2 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/i2c/busses/i2c-mv64xxx.c b/drivers/i2c/busses/i2c-mv64xxx.c
-index 1a3abd6a0bfc..940a190b1a53 100644
---- a/drivers/i2c/busses/i2c-mv64xxx.c
-+++ b/drivers/i2c/busses/i2c-mv64xxx.c
-@@ -619,10 +619,9 @@ mv64xxx_i2c_probe(struct platform_device *pd)
- 	if (!drv_data)
- 		return -ENOMEM;
- 
--	if (mv64xxx_i2c_map_regs(pd, drv_data)) {
--		rc = -ENODEV;
-+	rc = mv64xxx_i2c_map_regs(pd, drv_data);
-+	if (rc)
- 		goto exit_kfree;
--	}
- 
- 	strlcpy(drv_data->adapter.name, MV64XXX_I2C_CTLR_NAME " adapter",
- 		sizeof(drv_data->adapter.name));
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1114-I2C-mv64xxx-use-devm_ioremap_resource.patch b/patches.baytrail/1114-I2C-mv64xxx-use-devm_ioremap_resource.patch
deleted file mode 100644
index 020e4c4ddb48d..0000000000000
--- a/patches.baytrail/1114-I2C-mv64xxx-use-devm_ioremap_resource.patch
+++ /dev/null
@@ -1,114 +0,0 @@
-From 18c44d3c7c7540526246394f10e754e31feded65 Mon Sep 17 00:00:00 2001
-From: Russell King <rmk+kernel@arm.linux.org.uk>
-Date: Thu, 16 May 2013 21:33:09 +0100
-Subject: I2C: mv64xxx: use devm_ioremap_resource()
-
-Eliminate reg_base_p and reg_size, mv64xxx_i2c_unmap_regs() and an
-unchecked ioremap() return from this driver by using the devm_*
-API for requesting and ioremapping resources.
-
-Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-Acked-by: Mark A. Greer <mgreer@animalcreek.com>
-Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-(cherry picked from commit 16874b0709c7c78489de1f502edd33acad2918e8)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/i2c/busses/i2c-mv64xxx.c | 46 ++++++----------------------------------
- 1 file changed, 6 insertions(+), 40 deletions(-)
-
-diff --git a/drivers/i2c/busses/i2c-mv64xxx.c b/drivers/i2c/busses/i2c-mv64xxx.c
-index 940a190b1a53..54b8cf6b6dd0 100644
---- a/drivers/i2c/busses/i2c-mv64xxx.c
-+++ b/drivers/i2c/busses/i2c-mv64xxx.c
-@@ -92,8 +92,6 @@ struct mv64xxx_i2c_data {
- 	u32			aborting;
- 	u32			cntl_bits;
- 	void __iomem		*reg_base;
--	u32			reg_base_p;
--	u32			reg_size;
- 	u32			addr1;
- 	u32			addr2;
- 	u32			bytes_left;
-@@ -495,40 +493,6 @@ static const struct i2c_algorithm mv64xxx_i2c_algo = {
-  *
-  *****************************************************************************
-  */
--static int
--mv64xxx_i2c_map_regs(struct platform_device *pd,
--	struct mv64xxx_i2c_data *drv_data)
--{
--	int size;
--	struct resource	*r = platform_get_resource(pd, IORESOURCE_MEM, 0);
--
--	if (!r)
--		return -ENODEV;
--
--	size = resource_size(r);
--
--	if (!request_mem_region(r->start, size, drv_data->adapter.name))
--		return -EBUSY;
--
--	drv_data->reg_base = ioremap(r->start, size);
--	drv_data->reg_base_p = r->start;
--	drv_data->reg_size = size;
--
--	return 0;
--}
--
--static void
--mv64xxx_i2c_unmap_regs(struct mv64xxx_i2c_data *drv_data)
--{
--	if (drv_data->reg_base) {
--		iounmap(drv_data->reg_base);
--		release_mem_region(drv_data->reg_base_p, drv_data->reg_size);
--	}
--
--	drv_data->reg_base = NULL;
--	drv_data->reg_base_p = 0;
--}
--
- #ifdef CONFIG_OF
- static int
- mv64xxx_calc_freq(const int tclk, const int n, const int m)
-@@ -610,6 +574,7 @@ mv64xxx_i2c_probe(struct platform_device *pd)
- {
- 	struct mv64xxx_i2c_data		*drv_data;
- 	struct mv64xxx_i2c_pdata	*pdata = pd->dev.platform_data;
-+	struct resource	*r;
- 	int	rc;
- 
- 	if ((!pdata && !pd->dev.of_node))
-@@ -619,9 +584,12 @@ mv64xxx_i2c_probe(struct platform_device *pd)
- 	if (!drv_data)
- 		return -ENOMEM;
- 
--	rc = mv64xxx_i2c_map_regs(pd, drv_data);
--	if (rc)
-+	r = platform_get_resource(pd, IORESOURCE_MEM, 0);
-+	drv_data->reg_base = devm_ioremap_resource(&pd->dev, r);
-+	if (IS_ERR(drv_data->reg_base)) {
-+		rc = PTR_ERR(drv_data->reg_base);
- 		goto exit_kfree;
-+	}
- 
- 	strlcpy(drv_data->adapter.name, MV64XXX_I2C_CTLR_NAME " adapter",
- 		sizeof(drv_data->adapter.name));
-@@ -690,7 +658,6 @@ mv64xxx_i2c_probe(struct platform_device *pd)
- 		clk_unprepare(drv_data->clk);
- 	}
- #endif
--		mv64xxx_i2c_unmap_regs(drv_data);
- 	exit_kfree:
- 		kfree(drv_data);
- 	return rc;
-@@ -703,7 +670,6 @@ mv64xxx_i2c_remove(struct platform_device *dev)
- 
- 	i2c_del_adapter(&drv_data->adapter);
- 	free_irq(drv_data->irq, drv_data);
--	mv64xxx_i2c_unmap_regs(drv_data);
- #if defined(CONFIG_HAVE_CLK)
- 	/* Not all platforms have a clk */
- 	if (!IS_ERR(drv_data->clk)) {
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1115-I2C-mv64xxx-use-devm_clk_get-to-avoid-missing-clk_pu.patch b/patches.baytrail/1115-I2C-mv64xxx-use-devm_clk_get-to-avoid-missing-clk_pu.patch
deleted file mode 100644
index 82704445c1f2b..0000000000000
--- a/patches.baytrail/1115-I2C-mv64xxx-use-devm_clk_get-to-avoid-missing-clk_pu.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From 24075d9e4fa83ca4af2d03d29eef430236054cf6 Mon Sep 17 00:00:00 2001
-From: Russell King <rmk+kernel@arm.linux.org.uk>
-Date: Thu, 16 May 2013 21:34:10 +0100
-Subject: I2C: mv64xxx: use devm_clk_get() to avoid missing clk_put()
-
-This driver forgets to use clk_put().  Rather than adding clk_put(),
-lets instead use devm_clk_get() to obtain this clock so that it's
-automatically handled on cleanup.
-
-Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-Acked-by: Mark A. Greer <mgreer@animalcreek.com>
-Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-(cherry picked from commit 4c5c95f53b5cb5666906242a63d4d2c4fd0a0be8)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/i2c/busses/i2c-mv64xxx.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/i2c/busses/i2c-mv64xxx.c b/drivers/i2c/busses/i2c-mv64xxx.c
-index 54b8cf6b6dd0..25e64c445e61 100644
---- a/drivers/i2c/busses/i2c-mv64xxx.c
-+++ b/drivers/i2c/busses/i2c-mv64xxx.c
-@@ -599,7 +599,7 @@ mv64xxx_i2c_probe(struct platform_device *pd)
- 
- #if defined(CONFIG_HAVE_CLK)
- 	/* Not all platforms have a clk */
--	drv_data->clk = clk_get(&pd->dev, NULL);
-+	drv_data->clk = devm_clk_get(&pd->dev, NULL);
- 	if (!IS_ERR(drv_data->clk)) {
- 		clk_prepare(drv_data->clk);
- 		clk_enable(drv_data->clk);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1116-I2C-mv64xxx-use-devm_kzalloc.patch b/patches.baytrail/1116-I2C-mv64xxx-use-devm_kzalloc.patch
deleted file mode 100644
index 2b50e27398bd1..0000000000000
--- a/patches.baytrail/1116-I2C-mv64xxx-use-devm_kzalloc.patch
+++ /dev/null
@@ -1,98 +0,0 @@
-From 44e34cab9974fda7084d5b992fc7f1abfb0b9009 Mon Sep 17 00:00:00 2001
-From: Russell King <rmk+kernel@arm.linux.org.uk>
-Date: Thu, 16 May 2013 21:35:10 +0100
-Subject: I2C: mv64xxx: use devm_kzalloc()
-
-As we're changing to using devm_* APIs to fix various problems
-in this driver, lets also do devm_kzalloc() while we're here too.
-
-Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-Acked-by: Mark A. Greer <mgreer@animalcreek.com>
-Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-(cherry picked from commit 2c911103040faad9d092a72b9f4503f92154c1dc)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/i2c/busses/i2c-mv64xxx.c | 24 ++++++++++--------------
- 1 file changed, 10 insertions(+), 14 deletions(-)
-
-diff --git a/drivers/i2c/busses/i2c-mv64xxx.c b/drivers/i2c/busses/i2c-mv64xxx.c
-index 25e64c445e61..640b49df2ddd 100644
---- a/drivers/i2c/busses/i2c-mv64xxx.c
-+++ b/drivers/i2c/busses/i2c-mv64xxx.c
-@@ -580,16 +580,15 @@ mv64xxx_i2c_probe(struct platform_device *pd)
- 	if ((!pdata && !pd->dev.of_node))
- 		return -ENODEV;
- 
--	drv_data = kzalloc(sizeof(struct mv64xxx_i2c_data), GFP_KERNEL);
-+	drv_data = devm_kzalloc(&pd->dev, sizeof(struct mv64xxx_i2c_data),
-+				GFP_KERNEL);
- 	if (!drv_data)
- 		return -ENOMEM;
- 
- 	r = platform_get_resource(pd, IORESOURCE_MEM, 0);
- 	drv_data->reg_base = devm_ioremap_resource(&pd->dev, r);
--	if (IS_ERR(drv_data->reg_base)) {
--		rc = PTR_ERR(drv_data->reg_base);
--		goto exit_kfree;
--	}
-+	if (IS_ERR(drv_data->reg_base))
-+		return PTR_ERR(drv_data->reg_base);
- 
- 	strlcpy(drv_data->adapter.name, MV64XXX_I2C_CTLR_NAME " adapter",
- 		sizeof(drv_data->adapter.name));
-@@ -613,11 +612,11 @@ mv64xxx_i2c_probe(struct platform_device *pd)
- 	} else if (pd->dev.of_node) {
- 		rc = mv64xxx_of_config(drv_data, pd->dev.of_node);
- 		if (rc)
--			goto exit_unmap_regs;
-+			goto exit_clk;
- 	}
- 	if (drv_data->irq < 0) {
- 		rc = -ENXIO;
--		goto exit_unmap_regs;
-+		goto exit_clk;
- 	}
- 
- 	drv_data->adapter.dev.parent = &pd->dev;
-@@ -637,7 +636,7 @@ mv64xxx_i2c_probe(struct platform_device *pd)
- 			"mv64xxx: Can't register intr handler irq: %d\n",
- 			drv_data->irq);
- 		rc = -EINVAL;
--		goto exit_unmap_regs;
-+		goto exit_clk;
- 	} else if ((rc = i2c_add_numbered_adapter(&drv_data->adapter)) != 0) {
- 		dev_err(&drv_data->adapter.dev,
- 			"mv64xxx: Can't add i2c adapter, rc: %d\n", -rc);
-@@ -648,9 +647,9 @@ mv64xxx_i2c_probe(struct platform_device *pd)
- 
- 	return 0;
- 
--	exit_free_irq:
--		free_irq(drv_data->irq, drv_data);
--	exit_unmap_regs:
-+exit_free_irq:
-+	free_irq(drv_data->irq, drv_data);
-+exit_clk:
- #if defined(CONFIG_HAVE_CLK)
- 	/* Not all platforms have a clk */
- 	if (!IS_ERR(drv_data->clk)) {
-@@ -658,8 +657,6 @@ mv64xxx_i2c_probe(struct platform_device *pd)
- 		clk_unprepare(drv_data->clk);
- 	}
- #endif
--	exit_kfree:
--		kfree(drv_data);
- 	return rc;
- }
- 
-@@ -677,7 +674,6 @@ mv64xxx_i2c_remove(struct platform_device *dev)
- 		clk_unprepare(drv_data->clk);
- 	}
- #endif
--	kfree(drv_data);
- 
- 	return 0;
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1117-I2C-mv64xxx-fix-error-handling-for-request_irq.patch b/patches.baytrail/1117-I2C-mv64xxx-fix-error-handling-for-request_irq.patch
deleted file mode 100644
index 548ba05b5e7cb..0000000000000
--- a/patches.baytrail/1117-I2C-mv64xxx-fix-error-handling-for-request_irq.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From d687c00f68eb36cbd5d24b06681409c87fa75df9 Mon Sep 17 00:00:00 2001
-From: Russell King <rmk+kernel@arm.linux.org.uk>
-Date: Thu, 16 May 2013 21:36:11 +0100
-Subject: I2C: mv64xxx: fix error handling for request_irq()
-
-Propagate the error code from request_irq() rather than ignoring it
-entirely.
-
-Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-Acked-by: Mark A. Greer <mgreer@animalcreek.com>
-Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-(cherry picked from commit 0c195afb8741c32974266ba7c964481ba418b4b5)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/i2c/busses/i2c-mv64xxx.c | 10 +++++-----
- 1 file changed, 5 insertions(+), 5 deletions(-)
-
-diff --git a/drivers/i2c/busses/i2c-mv64xxx.c b/drivers/i2c/busses/i2c-mv64xxx.c
-index 640b49df2ddd..4b45c7363501 100644
---- a/drivers/i2c/busses/i2c-mv64xxx.c
-+++ b/drivers/i2c/busses/i2c-mv64xxx.c
-@@ -630,12 +630,12 @@ mv64xxx_i2c_probe(struct platform_device *pd)
- 
- 	mv64xxx_i2c_hw_init(drv_data);
- 
--	if (request_irq(drv_data->irq, mv64xxx_i2c_intr, 0,
--			MV64XXX_I2C_CTLR_NAME, drv_data)) {
-+	rc = request_irq(drv_data->irq, mv64xxx_i2c_intr, 0,
-+			 MV64XXX_I2C_CTLR_NAME, drv_data);
-+	if (rc) {
- 		dev_err(&drv_data->adapter.dev,
--			"mv64xxx: Can't register intr handler irq: %d\n",
--			drv_data->irq);
--		rc = -EINVAL;
-+			"mv64xxx: Can't register intr handler irq%d: %d\n",
-+			drv_data->irq, rc);
- 		goto exit_clk;
- 	} else if ((rc = i2c_add_numbered_adapter(&drv_data->adapter)) != 0) {
- 		dev_err(&drv_data->adapter.dev,
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1118-I2C-mv64xxx-remove-I2C_M_NOSTART-code.patch b/patches.baytrail/1118-I2C-mv64xxx-remove-I2C_M_NOSTART-code.patch
deleted file mode 100644
index a97125596ef04..0000000000000
--- a/patches.baytrail/1118-I2C-mv64xxx-remove-I2C_M_NOSTART-code.patch
+++ /dev/null
@@ -1,61 +0,0 @@
-From 73134a0a348af0575ed388efe272d27eeccc43f4 Mon Sep 17 00:00:00 2001
-From: Russell King <rmk+kernel@arm.linux.org.uk>
-Date: Thu, 16 May 2013 21:37:11 +0100
-Subject: I2C: mv64xxx: remove I2C_M_NOSTART code
-
-As this driver does not advertise protocol mangling support
-(I2C_FUNC_PROTOCOL_MANGLING is not set), having code to act on
-I2C_M_NOSTART is illogical, and in any case isn't supportable on
-anything but the first message - which makes no sense.  Remove
-the I2C_M_NOSTART code.
-
-Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-Acked-by: Mark A. Greer <mgreer@animalcreek.com>
-Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-(cherry picked from commit aa6bce5319a54c050af26e095287472854abccfd)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/i2c/busses/i2c-mv64xxx.c | 26 +++++---------------------
- 1 file changed, 5 insertions(+), 21 deletions(-)
-
-diff --git a/drivers/i2c/busses/i2c-mv64xxx.c b/drivers/i2c/busses/i2c-mv64xxx.c
-index 4b45c7363501..f11cb25c3295 100644
---- a/drivers/i2c/busses/i2c-mv64xxx.c
-+++ b/drivers/i2c/busses/i2c-mv64xxx.c
-@@ -419,28 +419,12 @@ mv64xxx_i2c_execute_msg(struct mv64xxx_i2c_data *drv_data, struct i2c_msg *msg,
- 	spin_lock_irqsave(&drv_data->lock, flags);
- 	mv64xxx_i2c_prepare_for_io(drv_data, msg);
- 
--	if (unlikely(msg->flags & I2C_M_NOSTART)) { /* Skip start/addr phases */
--		if (drv_data->msg->flags & I2C_M_RD) {
--			/* No action to do, wait for slave to send a byte */
--			drv_data->action = MV64XXX_I2C_ACTION_CONTINUE;
--			drv_data->state =
--				MV64XXX_I2C_STATE_WAITING_FOR_SLAVE_DATA;
--		} else {
--			drv_data->action = MV64XXX_I2C_ACTION_SEND_DATA;
--			drv_data->state =
--				MV64XXX_I2C_STATE_WAITING_FOR_SLAVE_ACK;
--			drv_data->bytes_left--;
--		}
-+	if (is_first) {
-+		drv_data->action = MV64XXX_I2C_ACTION_SEND_START;
-+		drv_data->state = MV64XXX_I2C_STATE_WAITING_FOR_START_COND;
- 	} else {
--		if (is_first) {
--			drv_data->action = MV64XXX_I2C_ACTION_SEND_START;
--			drv_data->state =
--				MV64XXX_I2C_STATE_WAITING_FOR_START_COND;
--		} else {
--			drv_data->action = MV64XXX_I2C_ACTION_SEND_ADDR_1;
--			drv_data->state =
--				MV64XXX_I2C_STATE_WAITING_FOR_ADDR_1_ACK;
--		}
-+		drv_data->action = MV64XXX_I2C_ACTION_SEND_ADDR_1;
-+		drv_data->state = MV64XXX_I2C_STATE_WAITING_FOR_ADDR_1_ACK;
- 	}
- 
- 	drv_data->send_stop = is_last;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1119-I2C-mv64xxx-move-mv64xxx_i2c_prepare_for_io.patch b/patches.baytrail/1119-I2C-mv64xxx-move-mv64xxx_i2c_prepare_for_io.patch
deleted file mode 100644
index 9cdc0cf0bbe58..0000000000000
--- a/patches.baytrail/1119-I2C-mv64xxx-move-mv64xxx_i2c_prepare_for_io.patch
+++ /dev/null
@@ -1,90 +0,0 @@
-From b3072f2955077f556b312697f7d6a8e0c602215a Mon Sep 17 00:00:00 2001
-From: Russell King <rmk+kernel@arm.linux.org.uk>
-Date: Thu, 16 May 2013 21:38:11 +0100
-Subject: I2C: mv64xxx: move mv64xxx_i2c_prepare_for_io()
-
-Move mv64xxx_i2c_prepare_for_io() higher up in the driver to avoid a
-future forward declaration for this function.
-
-Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-Acked-by: Mark A. Greer <mgreer@animalcreek.com>
-Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-(cherry picked from commit 3420afbc06058c9c13f7d69cf48b9d5429db6bd9)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/i2c/busses/i2c-mv64xxx.c | 52 ++++++++++++++++++++--------------------
- 1 file changed, 26 insertions(+), 26 deletions(-)
-
-diff --git a/drivers/i2c/busses/i2c-mv64xxx.c b/drivers/i2c/busses/i2c-mv64xxx.c
-index f11cb25c3295..bb37e14f3fbd 100644
---- a/drivers/i2c/busses/i2c-mv64xxx.c
-+++ b/drivers/i2c/busses/i2c-mv64xxx.c
-@@ -110,6 +110,32 @@ struct mv64xxx_i2c_data {
- 	struct i2c_adapter	adapter;
- };
- 
-+static void
-+mv64xxx_i2c_prepare_for_io(struct mv64xxx_i2c_data *drv_data,
-+	struct i2c_msg *msg)
-+{
-+	u32	dir = 0;
-+
-+	drv_data->msg = msg;
-+	drv_data->byte_posn = 0;
-+	drv_data->bytes_left = msg->len;
-+	drv_data->aborting = 0;
-+	drv_data->rc = 0;
-+	drv_data->cntl_bits = MV64XXX_I2C_REG_CONTROL_ACK |
-+		MV64XXX_I2C_REG_CONTROL_INTEN | MV64XXX_I2C_REG_CONTROL_TWSIEN;
-+
-+	if (msg->flags & I2C_M_RD)
-+		dir = 1;
-+
-+	if (msg->flags & I2C_M_TEN) {
-+		drv_data->addr1 = 0xf0 | (((u32)msg->addr & 0x300) >> 7) | dir;
-+		drv_data->addr2 = (u32)msg->addr & 0xff;
-+	} else {
-+		drv_data->addr1 = ((u32)msg->addr & 0x7f) << 1 | dir;
-+		drv_data->addr2 = 0;
-+	}
-+}
-+
- /*
-  *****************************************************************************
-  *
-@@ -347,32 +373,6 @@ mv64xxx_i2c_intr(int irq, void *dev_id)
-  *****************************************************************************
-  */
- static void
--mv64xxx_i2c_prepare_for_io(struct mv64xxx_i2c_data *drv_data,
--	struct i2c_msg *msg)
--{
--	u32	dir = 0;
--
--	drv_data->msg = msg;
--	drv_data->byte_posn = 0;
--	drv_data->bytes_left = msg->len;
--	drv_data->aborting = 0;
--	drv_data->rc = 0;
--	drv_data->cntl_bits = MV64XXX_I2C_REG_CONTROL_ACK |
--		MV64XXX_I2C_REG_CONTROL_INTEN | MV64XXX_I2C_REG_CONTROL_TWSIEN;
--
--	if (msg->flags & I2C_M_RD)
--		dir = 1;
--
--	if (msg->flags & I2C_M_TEN) {
--		drv_data->addr1 = 0xf0 | (((u32)msg->addr & 0x300) >> 7) | dir;
--		drv_data->addr2 = (u32)msg->addr & 0xff;
--	} else {
--		drv_data->addr1 = ((u32)msg->addr & 0x7f) << 1 | dir;
--		drv_data->addr2 = 0;
--	}
--}
--
--static void
- mv64xxx_i2c_wait_for_completion(struct mv64xxx_i2c_data *drv_data)
- {
- 	long		time_left;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1120-I2C-mv64xxx-fix-race-between-FSM-interrupt-and-proce.patch b/patches.baytrail/1120-I2C-mv64xxx-fix-race-between-FSM-interrupt-and-proce.patch
deleted file mode 100644
index 5a925b1bbac4a..0000000000000
--- a/patches.baytrail/1120-I2C-mv64xxx-fix-race-between-FSM-interrupt-and-proce.patch
+++ /dev/null
@@ -1,144 +0,0 @@
-From 938307206080d66951175289c2a17c03c9efa593 Mon Sep 17 00:00:00 2001
-From: Russell King <rmk+kernel@arm.linux.org.uk>
-Date: Thu, 16 May 2013 21:39:12 +0100
-Subject: I2C: mv64xxx: fix race between FSM/interrupt and process context
-
-Asking for a multi-part message to be handled by this driver is racy; it
-has been observed that the following sequence is possible with this
-driver:
-
-	- send start
-	- send address + write
-	- send data
-	- send (repeated) start
-	- send address + write
-	- send (repeated) start
-	- send address + read
-	- unrecoverable bus hang (except by system reset)
-
-The problem is that the interrupt handling sees the next event after the
-first repeated start is sent - the IFLG bit is set in the register even
-though INTEN is disabled.
-
-Let's fix this by moving all of the message processing into interrupt
-context, rather than having it partly in IRQ and partly in process
-context.  This allows us to move immediately to the next message in the
-interrupt handler and get on with the transfer, rather than incuring a
-couple of scheduling switches to get the next message.
-
-Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-Acked-by: Mark A. Greer <mgreer@animalcreek.com>
-Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-(cherry picked from commit 4243fa0bad551b8c8d4ff7104e8fd557ae848845)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/i2c/busses/i2c-mv64xxx.c | 54 +++++++++++++++++++++++++---------------
- 1 file changed, 34 insertions(+), 20 deletions(-)
-
-diff --git a/drivers/i2c/busses/i2c-mv64xxx.c b/drivers/i2c/busses/i2c-mv64xxx.c
-index bb37e14f3fbd..6356439454ee 100644
---- a/drivers/i2c/busses/i2c-mv64xxx.c
-+++ b/drivers/i2c/busses/i2c-mv64xxx.c
-@@ -86,6 +86,8 @@ enum {
- };
- 
- struct mv64xxx_i2c_data {
-+	struct i2c_msg		*msgs;
-+	int			num_msgs;
- 	int			irq;
- 	u32			state;
- 	u32			action;
-@@ -194,7 +196,7 @@ mv64xxx_i2c_fsm(struct mv64xxx_i2c_data *drv_data, u32 status)
- 		if ((drv_data->bytes_left == 0)
- 				|| (drv_data->aborting
- 					&& (drv_data->byte_posn != 0))) {
--			if (drv_data->send_stop) {
-+			if (drv_data->send_stop || drv_data->aborting) {
- 				drv_data->action = MV64XXX_I2C_ACTION_SEND_STOP;
- 				drv_data->state = MV64XXX_I2C_STATE_IDLE;
- 			} else {
-@@ -271,12 +273,25 @@ mv64xxx_i2c_do_action(struct mv64xxx_i2c_data *drv_data)
- {
- 	switch(drv_data->action) {
- 	case MV64XXX_I2C_ACTION_SEND_RESTART:
-+		/* We should only get here if we have further messages */
-+		BUG_ON(drv_data->num_msgs == 0);
-+
- 		drv_data->cntl_bits |= MV64XXX_I2C_REG_CONTROL_START;
--		drv_data->cntl_bits &= ~MV64XXX_I2C_REG_CONTROL_INTEN;
- 		writel(drv_data->cntl_bits,
- 			drv_data->reg_base + MV64XXX_I2C_REG_CONTROL);
--		drv_data->block = 0;
--		wake_up(&drv_data->waitq);
-+
-+		drv_data->msgs++;
-+		drv_data->num_msgs--;
-+
-+		/* Setup for the next message */
-+		mv64xxx_i2c_prepare_for_io(drv_data, drv_data->msgs);
-+
-+		/*
-+		 * We're never at the start of the message here, and by this
-+		 * time it's already too late to do any protocol mangling.
-+		 * Thankfully, do not advertise support for that feature.
-+		 */
-+		drv_data->send_stop = drv_data->num_msgs == 1;
- 		break;
- 
- 	case MV64XXX_I2C_ACTION_CONTINUE:
-@@ -412,20 +427,15 @@ mv64xxx_i2c_wait_for_completion(struct mv64xxx_i2c_data *drv_data)
- 
- static int
- mv64xxx_i2c_execute_msg(struct mv64xxx_i2c_data *drv_data, struct i2c_msg *msg,
--				int is_first, int is_last)
-+				int is_last)
- {
- 	unsigned long	flags;
- 
- 	spin_lock_irqsave(&drv_data->lock, flags);
- 	mv64xxx_i2c_prepare_for_io(drv_data, msg);
- 
--	if (is_first) {
--		drv_data->action = MV64XXX_I2C_ACTION_SEND_START;
--		drv_data->state = MV64XXX_I2C_STATE_WAITING_FOR_START_COND;
--	} else {
--		drv_data->action = MV64XXX_I2C_ACTION_SEND_ADDR_1;
--		drv_data->state = MV64XXX_I2C_STATE_WAITING_FOR_ADDR_1_ACK;
--	}
-+	drv_data->action = MV64XXX_I2C_ACTION_SEND_START;
-+	drv_data->state = MV64XXX_I2C_STATE_WAITING_FOR_START_COND;
- 
- 	drv_data->send_stop = is_last;
- 	drv_data->block = 1;
-@@ -453,16 +463,20 @@ static int
- mv64xxx_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
- {
- 	struct mv64xxx_i2c_data *drv_data = i2c_get_adapdata(adap);
--	int	i, rc;
-+	int rc, ret = num;
- 
--	for (i = 0; i < num; i++) {
--		rc = mv64xxx_i2c_execute_msg(drv_data, &msgs[i],
--						i == 0, i + 1 == num);
--		if (rc < 0)
--			return rc;
--	}
-+	BUG_ON(drv_data->msgs != NULL);
-+	drv_data->msgs = msgs;
-+	drv_data->num_msgs = num;
-+
-+	rc = mv64xxx_i2c_execute_msg(drv_data, &msgs[0], num == 1);
-+	if (rc < 0)
-+		ret = rc;
-+
-+	drv_data->num_msgs = 0;
-+	drv_data->msgs = NULL;
- 
--	return num;
-+	return ret;
- }
- 
- static const struct i2c_algorithm mv64xxx_i2c_algo = {
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1121-i2c-imx-Let-device-core-handle-pinctrl.patch b/patches.baytrail/1121-i2c-imx-Let-device-core-handle-pinctrl.patch
deleted file mode 100644
index 46b374eecb029..0000000000000
--- a/patches.baytrail/1121-i2c-imx-Let-device-core-handle-pinctrl.patch
+++ /dev/null
@@ -1,54 +0,0 @@
-From 036e7008d84f9cfe02379c771e6005029c419349 Mon Sep 17 00:00:00 2001
-From: Fabio Estevam <fabio.estevam@freescale.com>
-Date: Mon, 6 May 2013 15:05:50 -0300
-Subject: i2c: imx: Let device core handle pinctrl
-
-Since commit ab78029 (drivers/pinctrl: grab default handles from device core),
-we can rely on device core for handling pinctrl.
-
-So remove devm_pinctrl_get_select_default() from the driver.
-
-Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
-Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-(cherry picked from commit 76b1f723c4f54c2ab05307da3cc5c39e421b029b)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/i2c/busses/i2c-imx.c | 8 --------
- 1 file changed, 8 deletions(-)
-
-diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c
-index 82f20c60bb7b..8c7526ca912e 100644
---- a/drivers/i2c/busses/i2c-imx.c
-+++ b/drivers/i2c/busses/i2c-imx.c
-@@ -51,7 +51,6 @@
- #include <linux/of.h>
- #include <linux/of_device.h>
- #include <linux/of_i2c.h>
--#include <linux/pinctrl/consumer.h>
- #include <linux/platform_data/i2c-imx.h>
- 
- /** Defines ********************************************************************
-@@ -493,7 +492,6 @@ static int __init i2c_imx_probe(struct platform_device *pdev)
- 	struct imx_i2c_struct *i2c_imx;
- 	struct resource *res;
- 	struct imxi2c_platform_data *pdata = pdev->dev.platform_data;
--	struct pinctrl *pinctrl;
- 	void __iomem *base;
- 	int irq, ret;
- 	u32 bitrate;
-@@ -535,12 +533,6 @@ static int __init i2c_imx_probe(struct platform_device *pdev)
- 	i2c_imx->adapter.dev.of_node	= pdev->dev.of_node;
- 	i2c_imx->base			= base;
- 
--	pinctrl = devm_pinctrl_get_select_default(&pdev->dev);
--	if (IS_ERR(pinctrl)) {
--		dev_err(&pdev->dev, "can't get/select pinctrl\n");
--		return PTR_ERR(pinctrl);
--	}
--
- 	/* Get I2C clock */
- 	i2c_imx->clk = devm_clk_get(&pdev->dev, NULL);
- 	if (IS_ERR(i2c_imx->clk)) {
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1122-i2c-designware-prevent-signals-from-aborting-I2C-tra.patch b/patches.baytrail/1122-i2c-designware-prevent-signals-from-aborting-I2C-tra.patch
deleted file mode 100644
index 483c1a645b014..0000000000000
--- a/patches.baytrail/1122-i2c-designware-prevent-signals-from-aborting-I2C-tra.patch
+++ /dev/null
@@ -1,48 +0,0 @@
-From 9bd8f143d9d7000fc36aa14fd4062db80cefb0f3 Mon Sep 17 00:00:00 2001
-From: Mika Westerberg <mika.westerberg@linux.intel.com>
-Date: Wed, 22 May 2013 13:03:11 +0300
-Subject: i2c: designware: prevent signals from aborting I2C transfers
-
-If a process receives signal while it is waiting for I2C transfer to
-complete, an error is returned to the caller and the transfer is aborted.
-This can cause the driver to fail subsequent transfers. Also according to
-commit d295a86eab2 (i2c: mv64xxx: work around signals causing I2C
-transactions to be aborted) I2C drivers aren't supposed to abort
-transactions on signals.
-
-To prevent this switch to use wait_for_completion_timeout() instead of
-wait_for_completion_interruptible_timeout() in the designware I2C driver.
-
-Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
-Reviewed-by: Christian Ruppert <christian.ruppert@abilis.com>
-Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-(cherry picked from commit e42dba569fceca5d59a88571370785e9ce9775b8)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/i2c/busses/i2c-designware-core.c | 5 ++---
- 1 file changed, 2 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/i2c/busses/i2c-designware-core.c b/drivers/i2c/busses/i2c-designware-core.c
-index c41ca6354fc5..db20a2841b75 100644
---- a/drivers/i2c/busses/i2c-designware-core.c
-+++ b/drivers/i2c/busses/i2c-designware-core.c
-@@ -580,14 +580,13 @@ i2c_dw_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
- 	i2c_dw_xfer_init(dev);
- 
- 	/* wait for tx to complete */
--	ret = wait_for_completion_interruptible_timeout(&dev->cmd_complete, HZ);
-+	ret = wait_for_completion_timeout(&dev->cmd_complete, HZ);
- 	if (ret == 0) {
- 		dev_err(dev->dev, "controller timed out\n");
- 		i2c_dw_init(dev);
- 		ret = -ETIMEDOUT;
- 		goto done;
--	} else if (ret < 0)
--		goto done;
-+	}
- 
- 	if (dev->msg_err) {
- 		ret = dev->msg_err;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1123-drivers-i2c-busses-don-t-check-resource-with-devm_io.patch b/patches.baytrail/1123-drivers-i2c-busses-don-t-check-resource-with-devm_io.patch
deleted file mode 100644
index 4921e23ef0a2f..0000000000000
--- a/patches.baytrail/1123-drivers-i2c-busses-don-t-check-resource-with-devm_io.patch
+++ /dev/null
@@ -1,135 +0,0 @@
-From dd8de6b969acdbda36dbf4e3eec3e79163542daa Mon Sep 17 00:00:00 2001
-From: Wolfram Sang <wsa@the-dreams.de>
-Date: Fri, 10 May 2013 10:16:54 +0200
-Subject: drivers/i2c/busses: don't check resource with devm_ioremap_resource
-
-devm_ioremap_resource does sanity checks on the given resource. No need to
-duplicate this in the driver.
-
-Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-(cherry picked from commit 3cc2d009bc210516c61536273b304c4f6ccd797c)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/i2c/busses/i2c-davinci.c            |    8 +-------
- drivers/i2c/busses/i2c-designware-platdrv.c |    8 +-------
- drivers/i2c/busses/i2c-imx.c                |    6 +-----
- drivers/i2c/busses/i2c-omap.c               |    8 +-------
- drivers/i2c/busses/i2c-rcar.c               |    7 +------
- 5 files changed, 5 insertions(+), 32 deletions(-)
-
---- a/drivers/i2c/busses/i2c-davinci.c
-+++ b/drivers/i2c/busses/i2c-davinci.c
-@@ -646,13 +646,6 @@ static int davinci_i2c_probe(struct plat
- 	struct resource *mem, *irq;
- 	int r;
- 
--	/* NOTE: driver uses the static register mapping */
--	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
--	if (!mem) {
--		dev_err(&pdev->dev, "no mem resource?\n");
--		return -ENODEV;
--	}
--
- 	irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
- 	if (!irq) {
- 		dev_err(&pdev->dev, "no irq resource?\n");
-@@ -697,6 +690,7 @@ static int davinci_i2c_probe(struct plat
- 		return -ENODEV;
- 	clk_prepare_enable(dev->clk);
- 
-+	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- 	dev->base = devm_ioremap_resource(&pdev->dev, mem);
- 	if (IS_ERR(dev->base)) {
- 		r = PTR_ERR(dev->base);
---- a/drivers/i2c/busses/i2c-designware-platdrv.c
-+++ b/drivers/i2c/busses/i2c-designware-platdrv.c
-@@ -87,13 +87,6 @@ static int dw_i2c_probe(struct platform_
- 	struct resource *mem;
- 	int irq, r;
- 
--	/* NOTE: driver uses the static register mapping */
--	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
--	if (!mem) {
--		dev_err(&pdev->dev, "no mem resource?\n");
--		return -EINVAL;
--	}
--
- 	irq = platform_get_irq(pdev, 0);
- 	if (irq < 0) {
- 		dev_err(&pdev->dev, "no irq resource?\n");
-@@ -104,6 +97,7 @@ static int dw_i2c_probe(struct platform_
- 	if (!dev)
- 		return -ENOMEM;
- 
-+	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- 	dev->base = devm_ioremap_resource(&pdev->dev, mem);
- 	if (IS_ERR(dev->base))
- 		return PTR_ERR(dev->base);
---- a/drivers/i2c/busses/i2c-imx.c
-+++ b/drivers/i2c/busses/i2c-imx.c
-@@ -498,17 +498,13 @@ static int __init i2c_imx_probe(struct p
- 
- 	dev_dbg(&pdev->dev, "<%s>\n", __func__);
- 
--	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
--	if (!res) {
--		dev_err(&pdev->dev, "can't get device resources\n");
--		return -ENOENT;
--	}
- 	irq = platform_get_irq(pdev, 0);
- 	if (irq < 0) {
- 		dev_err(&pdev->dev, "can't get irq number\n");
- 		return -ENOENT;
- 	}
- 
-+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- 	base = devm_ioremap_resource(&pdev->dev, res);
- 	if (IS_ERR(base))
- 		return PTR_ERR(base);
---- a/drivers/i2c/busses/i2c-omap.c
-+++ b/drivers/i2c/busses/i2c-omap.c
-@@ -1087,13 +1087,6 @@ omap_i2c_probe(struct platform_device *p
- 	u32 rev;
- 	u16 minor, major, scheme;
- 
--	/* NOTE: driver uses the static register mapping */
--	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
--	if (!mem) {
--		dev_err(&pdev->dev, "no mem resource?\n");
--		return -ENODEV;
--	}
--
- 	irq = platform_get_irq(pdev, 0);
- 	if (irq < 0) {
- 		dev_err(&pdev->dev, "no irq resource?\n");
-@@ -1106,6 +1099,7 @@ omap_i2c_probe(struct platform_device *p
- 		return -ENOMEM;
- 	}
- 
-+	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- 	dev->base = devm_ioremap_resource(&pdev->dev, mem);
- 	if (IS_ERR(dev->base))
- 		return PTR_ERR(dev->base);
---- a/drivers/i2c/busses/i2c-rcar.c
-+++ b/drivers/i2c/busses/i2c-rcar.c
-@@ -658,12 +658,6 @@ static int rcar_i2c_probe(struct platfor
- 	u32 bus_speed;
- 	int ret;
- 
--	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
--	if (!res) {
--		dev_err(dev, "no mmio resources\n");
--		return -ENODEV;
--	}
--
- 	priv = devm_kzalloc(dev, sizeof(struct rcar_i2c_priv), GFP_KERNEL);
- 	if (!priv) {
- 		dev_err(dev, "no mem for private data\n");
-@@ -685,6 +679,7 @@ static int rcar_i2c_probe(struct platfor
- 	if (ret < 0)
- 		return ret;
- 
-+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- 	priv->io = devm_ioremap_resource(dev, res);
- 	if (IS_ERR(priv->io))
- 		return PTR_ERR(priv->io);
diff --git a/patches.baytrail/1124-i2c-designware-fix-race-between-subsequent-xfers.patch b/patches.baytrail/1124-i2c-designware-fix-race-between-subsequent-xfers.patch
deleted file mode 100644
index 32793d8282398..0000000000000
--- a/patches.baytrail/1124-i2c-designware-fix-race-between-subsequent-xfers.patch
+++ /dev/null
@@ -1,62 +0,0 @@
-From 605c0d7db526bd4dd6e8efd0dcddbf35b62bfb9e Mon Sep 17 00:00:00 2001
-From: Christian Ruppert <christian.ruppert@abilis.com>
-Date: Fri, 7 Jun 2013 10:51:23 +0200
-Subject: i2c: designware: fix race between subsequent xfers
-
-The designware block is not always properly disabled in the case of
-transfer errors. Interrupts from aborted transfers might be handled
-after the data structures for the following transfer are initialised but
-before the hardware is set up. This can corrupt the data structures to
-the point that the system is stuck in an infinite interrupt loop (where
-FIFOs are never emptied because dev->msg_read_idx == dev->msgs_num).
-
-This patch cleanly disables the designware-i2c hardware at the end of
-every transfer, be it successful or not.
-
-Signed-off-by: Christian Ruppert <christian.ruppert@abilis.com>
-[wsa: extended the comment]
-Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-(cherry picked from commit 38d7fadef4973bb94e36897fcb6bb6a12fdd10c9)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/i2c/busses/i2c-designware-core.c | 12 ++++++++++--
- 1 file changed, 10 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/i2c/busses/i2c-designware-core.c b/drivers/i2c/busses/i2c-designware-core.c
-index db20a2841b75..3de549436992 100644
---- a/drivers/i2c/busses/i2c-designware-core.c
-+++ b/drivers/i2c/busses/i2c-designware-core.c
-@@ -583,11 +583,21 @@ i2c_dw_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
- 	ret = wait_for_completion_timeout(&dev->cmd_complete, HZ);
- 	if (ret == 0) {
- 		dev_err(dev->dev, "controller timed out\n");
-+		/* i2c_dw_init implicitly disables the adapter */
- 		i2c_dw_init(dev);
- 		ret = -ETIMEDOUT;
- 		goto done;
- 	}
- 
-+	/*
-+	 * We must disable the adapter before unlocking the &dev->lock mutex
-+	 * below. Otherwise the hardware might continue generating interrupts
-+	 * which in turn causes a race condition with the following transfer.
-+	 * Needs some more investigation if the additional interrupts are
-+	 * a hardware bug or this driver doesn't handle them correctly yet.
-+	 */
-+	__i2c_dw_enable(dev, false);
-+
- 	if (dev->msg_err) {
- 		ret = dev->msg_err;
- 		goto done;
-@@ -595,8 +605,6 @@ i2c_dw_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
- 
- 	/* no error */
- 	if (likely(!dev->cmd_err)) {
--		/* Disable the adapter */
--		__i2c_dw_enable(dev, false);
- 		ret = num;
- 		goto done;
- 	}
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1125-i2c-vt8500-Add-support-for-I2C-bus-on-Wondermedia-So.patch b/patches.baytrail/1125-i2c-vt8500-Add-support-for-I2C-bus-on-Wondermedia-So.patch
deleted file mode 100644
index 78146c545343f..0000000000000
--- a/patches.baytrail/1125-i2c-vt8500-Add-support-for-I2C-bus-on-Wondermedia-So.patch
+++ /dev/null
@@ -1,571 +0,0 @@
-From 786e013844fdd89a41d19347a177f9c02e6e6238 Mon Sep 17 00:00:00 2001
-From: Tony Prisk <linux@prisktech.co.nz>
-Date: Sat, 15 Jun 2013 09:52:16 +1200
-Subject: i2c: vt8500: Add support for I2C bus on Wondermedia SoCs
-
-This patch adds support for the I2C bus controllers found on Wondermedia
-8xxx-series SoCs. Only master-mode is supported.
-
-Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
-[wsa: fixed one macro to shift 8 instead of 16]
-Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-(cherry picked from commit 560746eb79d3124a278452c8dd968682b521cc82)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- Documentation/devicetree/bindings/i2c/i2c-vt8500.txt |   24 
- MAINTAINERS                                          |    1 
- drivers/i2c/busses/Kconfig                           |   10 
- drivers/i2c/busses/Makefile                          |    1 
- drivers/i2c/busses/i2c-wmt.c                         |  479 +++++++++++++++++++
- 5 files changed, 515 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/i2c/i2c-vt8500.txt
- create mode 100644 drivers/i2c/busses/i2c-wmt.c
-
---- /dev/null
-+++ b/Documentation/devicetree/bindings/i2c/i2c-vt8500.txt
-@@ -0,0 +1,24 @@
-+* Wondermedia I2C Controller
-+
-+Required properties :
-+
-+ - compatible : should be "wm,wm8505-i2c"
-+ - reg : Offset and length of the register set for the device
-+ - interrupts : <IRQ> where IRQ is the interrupt number
-+ - clocks : phandle to the I2C clock source
-+
-+Optional properties :
-+
-+ - clock-frequency : desired I2C bus clock frequency in Hz.
-+	Valid values are 100000 and 400000.
-+	Default to 100000 if not specified, or invalid value.
-+
-+Example :
-+
-+	i2c_0: i2c@d8280000 {
-+		compatible = "wm,wm8505-i2c";
-+		reg = <0xd8280000 0x1000>;
-+		interrupts = <19>;
-+		clocks = <&clki2c0>;
-+		clock-frequency = <400000>;
-+	};
---- a/MAINTAINERS
-+++ b/MAINTAINERS
-@@ -1285,6 +1285,7 @@ S:	Maintained
- F:	arch/arm/mach-vt8500/
- F:	drivers/clocksource/vt8500_timer.c
- F:	drivers/gpio/gpio-vt8500.c
-+F:	drivers/i2c/busses/i2c-wmt.c
- F:	drivers/mmc/host/wmt-sdmmc.c
- F:	drivers/pwm/pwm-vt8500.c
- F:	drivers/rtc/rtc-vt8500.c
---- a/drivers/i2c/busses/Kconfig
-+++ b/drivers/i2c/busses/Kconfig
-@@ -726,6 +726,16 @@ config I2C_VERSATILE
- 	  This driver can also be built as a module.  If so, the module
- 	  will be called i2c-versatile.
- 
-+config I2C_WMT
-+	tristate "Wondermedia WM8xxx SoC I2C bus support"
-+	depends on ARCH_VT8500
-+	help
-+	  Say yes if you want to support the I2C bus on Wondermedia 8xxx-series
-+	  SoCs.
-+
-+	  This driver can also be built as a module. If so, the module will be
-+	  called i2c-wmt.
-+
- config I2C_OCTEON
- 	tristate "Cavium OCTEON I2C bus support"
- 	depends on CPU_CAVIUM_OCTEON
---- a/drivers/i2c/busses/Makefile
-+++ b/drivers/i2c/busses/Makefile
-@@ -71,6 +71,7 @@ obj-$(CONFIG_I2C_SIRF)		+= i2c-sirf.o
- obj-$(CONFIG_I2C_STU300)	+= i2c-stu300.o
- obj-$(CONFIG_I2C_TEGRA)		+= i2c-tegra.o
- obj-$(CONFIG_I2C_VERSATILE)	+= i2c-versatile.o
-+obj-$(CONFIG_I2C_WMT)		+= i2c-wmt.o
- obj-$(CONFIG_I2C_OCTEON)	+= i2c-octeon.o
- obj-$(CONFIG_I2C_XILINX)	+= i2c-xiic.o
- obj-$(CONFIG_I2C_XLR)		+= i2c-xlr.o
---- /dev/null
-+++ b/drivers/i2c/busses/i2c-wmt.c
-@@ -0,0 +1,479 @@
-+/*
-+ *  Wondermedia I2C Master Mode Driver
-+ *
-+ *  Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
-+ *
-+ *  Derived from GPLv2+ licensed source:
-+ *  - Copyright (C) 2008 WonderMedia Technologies, Inc.
-+ *
-+ *  This program is free software; you can redistribute it and/or modify
-+ *  it under the terms of the GNU General Public License version 2, or
-+ *  (at your option) any later version. as published by the Free Software
-+ *  Foundation
-+ */
-+
-+#include <linux/clk.h>
-+#include <linux/delay.h>
-+#include <linux/err.h>
-+#include <linux/i2c.h>
-+#include <linux/interrupt.h>
-+#include <linux/io.h>
-+#include <linux/module.h>
-+#include <linux/of.h>
-+#include <linux/of_address.h>
-+#include <linux/of_i2c.h>
-+#include <linux/of_irq.h>
-+#include <linux/platform_device.h>
-+
-+#define REG_CR		0x00
-+#define REG_TCR		0x02
-+#define REG_CSR		0x04
-+#define REG_ISR		0x06
-+#define REG_IMR		0x08
-+#define REG_CDR		0x0A
-+#define REG_TR		0x0C
-+#define REG_MCR		0x0E
-+#define REG_SLAVE_CR	0x10
-+#define REG_SLAVE_SR	0x12
-+#define REG_SLAVE_ISR	0x14
-+#define REG_SLAVE_IMR	0x16
-+#define REG_SLAVE_DR	0x18
-+#define REG_SLAVE_TR	0x1A
-+
-+/* REG_CR Bit fields */
-+#define CR_TX_NEXT_ACK		0x0000
-+#define CR_ENABLE		0x0001
-+#define CR_TX_NEXT_NO_ACK	0x0002
-+#define CR_TX_END		0x0004
-+#define CR_CPU_RDY		0x0008
-+#define SLAV_MODE_SEL		0x8000
-+
-+/* REG_TCR Bit fields */
-+#define TCR_STANDARD_MODE	0x0000
-+#define TCR_MASTER_WRITE	0x0000
-+#define TCR_HS_MODE		0x2000
-+#define TCR_MASTER_READ		0x4000
-+#define TCR_FAST_MODE		0x8000
-+#define TCR_SLAVE_ADDR_MASK	0x007F
-+
-+/* REG_ISR Bit fields */
-+#define ISR_NACK_ADDR		0x0001
-+#define ISR_BYTE_END		0x0002
-+#define ISR_SCL_TIMEOUT		0x0004
-+#define ISR_WRITE_ALL		0x0007
-+
-+/* REG_IMR Bit fields */
-+#define IMR_ENABLE_ALL		0x0007
-+
-+/* REG_CSR Bit fields */
-+#define CSR_RCV_NOT_ACK		0x0001
-+#define CSR_RCV_ACK_MASK	0x0001
-+#define CSR_READY_MASK		0x0002
-+
-+/* REG_TR */
-+#define SCL_TIMEOUT(x)		(((x) & 0xFF) << 8)
-+#define TR_STD			0x0064
-+#define TR_HS			0x0019
-+
-+/* REG_MCR */
-+#define MCR_APB_96M		7
-+#define MCR_APB_166M		12
-+
-+#define I2C_MODE_STANDARD	0
-+#define I2C_MODE_FAST		1
-+
-+#define WMT_I2C_TIMEOUT		(msecs_to_jiffies(1000))
-+
-+struct wmt_i2c_dev {
-+	struct i2c_adapter	adapter;
-+	struct completion	complete;
-+	struct device		*dev;
-+	void __iomem		*base;
-+	struct clk		*clk;
-+	int			mode;
-+	int			irq;
-+	u16			cmd_status;
-+};
-+
-+static int wmt_i2c_wait_bus_not_busy(struct wmt_i2c_dev *i2c_dev)
-+{
-+	unsigned long timeout;
-+
-+	timeout = jiffies + WMT_I2C_TIMEOUT;
-+	while (!(readw(i2c_dev->base + REG_CSR) & CSR_READY_MASK)) {
-+		if (time_after(jiffies, timeout)) {
-+			dev_warn(i2c_dev->dev, "timeout waiting for bus ready\n");
-+			return -EBUSY;
-+		}
-+		msleep(20);
-+	}
-+
-+	return 0;
-+}
-+
-+static int wmt_check_status(struct wmt_i2c_dev *i2c_dev)
-+{
-+	int ret = 0;
-+
-+	if (i2c_dev->cmd_status & ISR_NACK_ADDR)
-+		ret = -EIO;
-+
-+	if (i2c_dev->cmd_status & ISR_SCL_TIMEOUT)
-+		ret = -ETIMEDOUT;
-+
-+	return ret;
-+}
-+
-+static int wmt_i2c_write(struct i2c_adapter *adap, struct i2c_msg *pmsg,
-+			 int last)
-+{
-+	struct wmt_i2c_dev *i2c_dev = i2c_get_adapdata(adap);
-+	u16 val, tcr_val;
-+	int ret, wait_result;
-+	int xfer_len = 0;
-+
-+	if (!(pmsg->flags & I2C_M_NOSTART)) {
-+		ret = wmt_i2c_wait_bus_not_busy(i2c_dev);
-+		if (ret < 0)
-+			return ret;
-+	}
-+
-+	if (pmsg->len == 0) {
-+		/*
-+		 * We still need to run through the while (..) once, so
-+		 * start at -1 and break out early from the loop
-+		 */
-+		xfer_len = -1;
-+		writew(0, i2c_dev->base + REG_CDR);
-+	} else {
-+		writew(pmsg->buf[0] & 0xFF, i2c_dev->base + REG_CDR);
-+	}
-+
-+	if (!(pmsg->flags & I2C_M_NOSTART)) {
-+		val = readw(i2c_dev->base + REG_CR);
-+		val &= ~CR_TX_END;
-+		writew(val, i2c_dev->base + REG_CR);
-+
-+		val = readw(i2c_dev->base + REG_CR);
-+		val |= CR_CPU_RDY;
-+		writew(val, i2c_dev->base + REG_CR);
-+	}
-+
-+	INIT_COMPLETION(i2c_dev->complete);
-+
-+	if (i2c_dev->mode == I2C_MODE_STANDARD)
-+		tcr_val = TCR_STANDARD_MODE;
-+	else
-+		tcr_val = TCR_FAST_MODE;
-+
-+	tcr_val |= (TCR_MASTER_WRITE | (pmsg->addr & TCR_SLAVE_ADDR_MASK));
-+
-+	writew(tcr_val, i2c_dev->base + REG_TCR);
-+
-+	if (pmsg->flags & I2C_M_NOSTART) {
-+		val = readw(i2c_dev->base + REG_CR);
-+		val |= CR_CPU_RDY;
-+		writew(val, i2c_dev->base + REG_CR);
-+	}
-+
-+	while (xfer_len < pmsg->len) {
-+		wait_result = wait_for_completion_timeout(&i2c_dev->complete,
-+							  500 * HZ / 1000);
-+
-+		if (wait_result == 0)
-+			return -ETIMEDOUT;
-+
-+		ret = wmt_check_status(i2c_dev);
-+		if (ret)
-+			return ret;
-+
-+		xfer_len++;
-+
-+		val = readw(i2c_dev->base + REG_CSR);
-+		if ((val & CSR_RCV_ACK_MASK) == CSR_RCV_NOT_ACK) {
-+			dev_dbg(i2c_dev->dev, "write RCV NACK error\n");
-+			return -EIO;
-+		}
-+
-+		if (pmsg->len == 0) {
-+			val = CR_TX_END | CR_CPU_RDY | CR_ENABLE;
-+			writew(val, i2c_dev->base + REG_CR);
-+			break;
-+		}
-+
-+		if (xfer_len == pmsg->len) {
-+			if (last != 1)
-+				writew(CR_ENABLE, i2c_dev->base + REG_CR);
-+		} else {
-+			writew(pmsg->buf[xfer_len] & 0xFF, i2c_dev->base +
-+								REG_CDR);
-+			writew(CR_CPU_RDY | CR_ENABLE, i2c_dev->base + REG_CR);
-+		}
-+	}
-+
-+	return 0;
-+}
-+
-+static int wmt_i2c_read(struct i2c_adapter *adap, struct i2c_msg *pmsg,
-+			int last)
-+{
-+	struct wmt_i2c_dev *i2c_dev = i2c_get_adapdata(adap);
-+	u16 val, tcr_val;
-+	int ret, wait_result;
-+	u32 xfer_len = 0;
-+
-+	if (!(pmsg->flags & I2C_M_NOSTART)) {
-+		ret = wmt_i2c_wait_bus_not_busy(i2c_dev);
-+		if (ret < 0)
-+			return ret;
-+	}
-+
-+	val = readw(i2c_dev->base + REG_CR);
-+	val &= ~CR_TX_END;
-+	writew(val, i2c_dev->base + REG_CR);
-+
-+	val = readw(i2c_dev->base + REG_CR);
-+	val &= ~CR_TX_NEXT_NO_ACK;
-+	writew(val, i2c_dev->base + REG_CR);
-+
-+	if (!(pmsg->flags & I2C_M_NOSTART)) {
-+		val = readw(i2c_dev->base + REG_CR);
-+		val |= CR_CPU_RDY;
-+		writew(val, i2c_dev->base + REG_CR);
-+	}
-+
-+	if (pmsg->len == 1) {
-+		val = readw(i2c_dev->base + REG_CR);
-+		val |= CR_TX_NEXT_NO_ACK;
-+		writew(val, i2c_dev->base + REG_CR);
-+	}
-+
-+	INIT_COMPLETION(i2c_dev->complete);
-+
-+	if (i2c_dev->mode == I2C_MODE_STANDARD)
-+		tcr_val = TCR_STANDARD_MODE;
-+	else
-+		tcr_val = TCR_FAST_MODE;
-+
-+	tcr_val |= TCR_MASTER_READ | (pmsg->addr & TCR_SLAVE_ADDR_MASK);
-+
-+	writew(tcr_val, i2c_dev->base + REG_TCR);
-+
-+	if (pmsg->flags & I2C_M_NOSTART) {
-+		val = readw(i2c_dev->base + REG_CR);
-+		val |= CR_CPU_RDY;
-+		writew(val, i2c_dev->base + REG_CR);
-+	}
-+
-+	while (xfer_len < pmsg->len) {
-+		wait_result = wait_for_completion_timeout(&i2c_dev->complete,
-+							  500 * HZ / 1000);
-+
-+		if (!wait_result)
-+			return -ETIMEDOUT;
-+
-+		ret = wmt_check_status(i2c_dev);
-+		if (ret)
-+			return ret;
-+
-+		pmsg->buf[xfer_len] = readw(i2c_dev->base + REG_CDR) >> 8;
-+		xfer_len++;
-+
-+		if (xfer_len == pmsg->len - 1) {
-+			val = readw(i2c_dev->base + REG_CR);
-+			val |= (CR_TX_NEXT_NO_ACK | CR_CPU_RDY);
-+			writew(val, i2c_dev->base + REG_CR);
-+		} else {
-+			val = readw(i2c_dev->base + REG_CR);
-+			val |= CR_CPU_RDY;
-+			writew(val, i2c_dev->base + REG_CR);
-+		}
-+	}
-+
-+	return 0;
-+}
-+
-+static int wmt_i2c_xfer(struct i2c_adapter *adap,
-+			struct i2c_msg msgs[],
-+			int num)
-+{
-+	struct i2c_msg *pmsg;
-+	int i, is_last;
-+	int ret = 0;
-+
-+	for (i = 0; ret >= 0 && i < num; i++) {
-+		is_last = ((i + 1) == num);
-+
-+		pmsg = &msgs[i];
-+		if (pmsg->flags & I2C_M_RD)
-+			ret = wmt_i2c_read(adap, pmsg, is_last);
-+		else
-+			ret = wmt_i2c_write(adap, pmsg, is_last);
-+	}
-+
-+	return (ret < 0) ? ret : i;
-+}
-+
-+static u32 wmt_i2c_func(struct i2c_adapter *adap)
-+{
-+	return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | I2C_FUNC_NOSTART;
-+}
-+
-+static const struct i2c_algorithm wmt_i2c_algo = {
-+	.master_xfer	= wmt_i2c_xfer,
-+	.functionality	= wmt_i2c_func,
-+};
-+
-+static irqreturn_t wmt_i2c_isr(int irq, void *data)
-+{
-+	struct wmt_i2c_dev *i2c_dev = data;
-+
-+	/* save the status and write-clear it */
-+	i2c_dev->cmd_status = readw(i2c_dev->base + REG_ISR);
-+	writew(i2c_dev->cmd_status, i2c_dev->base + REG_ISR);
-+
-+	complete(&i2c_dev->complete);
-+
-+	return IRQ_HANDLED;
-+}
-+
-+static int wmt_i2c_reset_hardware(struct wmt_i2c_dev *i2c_dev)
-+{
-+	int err;
-+
-+	err = clk_prepare_enable(i2c_dev->clk);
-+	if (err) {
-+		dev_err(i2c_dev->dev, "failed to enable clock\n");
-+		return err;
-+	}
-+
-+	err = clk_set_rate(i2c_dev->clk, 20000000);
-+	if (err) {
-+		dev_err(i2c_dev->dev, "failed to set clock = 20Mhz\n");
-+		return err;
-+	}
-+
-+	writew(0, i2c_dev->base + REG_CR);
-+	writew(MCR_APB_166M, i2c_dev->base + REG_MCR);
-+	writew(ISR_WRITE_ALL, i2c_dev->base + REG_ISR);
-+	writew(IMR_ENABLE_ALL, i2c_dev->base + REG_IMR);
-+	writew(CR_ENABLE, i2c_dev->base + REG_CR);
-+	readw(i2c_dev->base + REG_CSR);		/* read clear */
-+	writew(ISR_WRITE_ALL, i2c_dev->base + REG_ISR);
-+
-+	if (i2c_dev->mode == I2C_MODE_STANDARD)
-+		writew(SCL_TIMEOUT(128) | TR_STD, i2c_dev->base + REG_TR);
-+	else
-+		writew(SCL_TIMEOUT(128) | TR_HS, i2c_dev->base + REG_TR);
-+
-+	return 0;
-+}
-+
-+static int wmt_i2c_probe(struct platform_device *pdev)
-+{
-+	struct device_node *np = pdev->dev.of_node;
-+	struct wmt_i2c_dev *i2c_dev;
-+	struct i2c_adapter *adap;
-+	struct resource *res;
-+	int err;
-+	u32 clk_rate;
-+
-+	i2c_dev = devm_kzalloc(&pdev->dev, sizeof(*i2c_dev), GFP_KERNEL);
-+	if (!i2c_dev) {
-+		dev_err(&pdev->dev, "device memory allocation failed\n");
-+		return -ENOMEM;
-+	}
-+
-+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+	i2c_dev->base = devm_ioremap_resource(&pdev->dev, res);
-+	if (IS_ERR(i2c_dev->base))
-+		return PTR_ERR(i2c_dev->base);
-+
-+	i2c_dev->irq = irq_of_parse_and_map(np, 0);
-+	if (!i2c_dev->irq) {
-+		dev_err(&pdev->dev, "irq missing or invalid\n");
-+		return -EINVAL;
-+	}
-+
-+	i2c_dev->clk = of_clk_get(np, 0);
-+	if (IS_ERR(i2c_dev->clk)) {
-+		dev_err(&pdev->dev, "unable to request clock\n");
-+		return PTR_ERR(i2c_dev->clk);
-+	}
-+
-+	i2c_dev->mode = I2C_MODE_STANDARD;
-+	err = of_property_read_u32(np, "clock-frequency", &clk_rate);
-+	if ((!err) && (clk_rate == 400000))
-+		i2c_dev->mode = I2C_MODE_FAST;
-+
-+	i2c_dev->dev = &pdev->dev;
-+
-+	err = devm_request_irq(&pdev->dev, i2c_dev->irq, wmt_i2c_isr, 0,
-+							"i2c", i2c_dev);
-+	if (err) {
-+		dev_err(&pdev->dev, "failed to request irq %i\n", i2c_dev->irq);
-+		return err;
-+	}
-+
-+	adap = &i2c_dev->adapter;
-+	i2c_set_adapdata(adap, i2c_dev);
-+	strlcpy(adap->name, "WMT I2C adapter", sizeof(adap->name));
-+	adap->owner = THIS_MODULE;
-+	adap->algo = &wmt_i2c_algo;
-+	adap->dev.parent = &pdev->dev;
-+	adap->dev.of_node = pdev->dev.of_node;
-+
-+	init_completion(&i2c_dev->complete);
-+
-+	err = wmt_i2c_reset_hardware(i2c_dev);
-+	if (err) {
-+		dev_err(&pdev->dev, "error initializing hardware\n");
-+		return err;
-+	}
-+
-+	err = i2c_add_adapter(adap);
-+	if (err) {
-+		dev_err(&pdev->dev, "failed to add adapter\n");
-+		return err;
-+	}
-+
-+	platform_set_drvdata(pdev, i2c_dev);
-+
-+	of_i2c_register_devices(adap);
-+
-+	return 0;
-+}
-+
-+static int wmt_i2c_remove(struct platform_device *pdev)
-+{
-+	struct wmt_i2c_dev *i2c_dev = platform_get_drvdata(pdev);
-+
-+	/* Disable interrupts, clock and delete adapter */
-+	writew(0, i2c_dev->base + REG_IMR);
-+	clk_disable_unprepare(i2c_dev->clk);
-+	i2c_del_adapter(&i2c_dev->adapter);
-+
-+	return 0;
-+}
-+
-+static struct of_device_id wmt_i2c_dt_ids[] = {
-+	{ .compatible = "wm,wm8505-i2c" },
-+	{ /* Sentinel */ },
-+};
-+
-+static struct platform_driver wmt_i2c_driver = {
-+	.probe		= wmt_i2c_probe,
-+	.remove		= wmt_i2c_remove,
-+	.driver		= {
-+		.name	= "wmt-i2c",
-+		.owner	= THIS_MODULE,
-+		.of_match_table = wmt_i2c_dt_ids,
-+	},
-+};
-+
-+module_platform_driver(wmt_i2c_driver);
-+
-+MODULE_DESCRIPTION("Wondermedia I2C master-mode bus adapter");
-+MODULE_AUTHOR("Tony Prisk <linux@prisktech.co.nz>");
-+MODULE_LICENSE("GPL");
-+MODULE_DEVICE_TABLE(of, wmt_i2c_dt_ids);
diff --git a/patches.baytrail/1126-i2c-mv64xxx-Add-macros-to-access-parts-of-registers.patch b/patches.baytrail/1126-i2c-mv64xxx-Add-macros-to-access-parts-of-registers.patch
deleted file mode 100644
index 95322f0e2ade6..0000000000000
--- a/patches.baytrail/1126-i2c-mv64xxx-Add-macros-to-access-parts-of-registers.patch
+++ /dev/null
@@ -1,54 +0,0 @@
-From fe2a4534764344d689e0e8a858f4171f6a3b9c5a Mon Sep 17 00:00:00 2001
-From: Maxime Ripard <maxime.ripard@free-electrons.com>
-Date: Wed, 12 Jun 2013 18:53:30 +0200
-Subject: i2c: mv64xxx: Add macros to access parts of registers
-
-These macros make it more comprehensive to access to useful masked and
-shifted area of the various registers used.
-
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
-Tested-by: Andrew Lunn <andrew@lunn.ch>
-Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-(cherry picked from commit 683e69b8bb4744a4088c80d05762c4258afe47e1)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/i2c/busses/i2c-mv64xxx.c | 8 ++++++--
- 1 file changed, 6 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/i2c/busses/i2c-mv64xxx.c b/drivers/i2c/busses/i2c-mv64xxx.c
-index 6356439454ee..d70a2fda4a91 100644
---- a/drivers/i2c/busses/i2c-mv64xxx.c
-+++ b/drivers/i2c/busses/i2c-mv64xxx.c
-@@ -33,6 +33,10 @@
- #define	MV64XXX_I2C_REG_EXT_SLAVE_ADDR			0x10
- #define	MV64XXX_I2C_REG_SOFT_RESET			0x1c
- 
-+#define MV64XXX_I2C_ADDR_ADDR(val)			((val & 0x7f) << 1)
-+#define MV64XXX_I2C_BAUD_DIV_N(val)			(val & 0x7)
-+#define MV64XXX_I2C_BAUD_DIV_M(val)			((val & 0xf) << 3)
-+
- #define	MV64XXX_I2C_REG_CONTROL_ACK			0x00000004
- #define	MV64XXX_I2C_REG_CONTROL_IFLG			0x00000008
- #define	MV64XXX_I2C_REG_CONTROL_STOP			0x00000010
-@@ -133,7 +137,7 @@ mv64xxx_i2c_prepare_for_io(struct mv64xxx_i2c_data *drv_data,
- 		drv_data->addr1 = 0xf0 | (((u32)msg->addr & 0x300) >> 7) | dir;
- 		drv_data->addr2 = (u32)msg->addr & 0xff;
- 	} else {
--		drv_data->addr1 = ((u32)msg->addr & 0x7f) << 1 | dir;
-+		drv_data->addr1 = MV64XXX_I2C_ADDR_ADDR((u32)msg->addr) | dir;
- 		drv_data->addr2 = 0;
- 	}
- }
-@@ -151,7 +155,7 @@ static void
- mv64xxx_i2c_hw_init(struct mv64xxx_i2c_data *drv_data)
- {
- 	writel(0, drv_data->reg_base + MV64XXX_I2C_REG_SOFT_RESET);
--	writel((((drv_data->freq_m & 0xf) << 3) | (drv_data->freq_n & 0x7)),
-+	writel(MV64XXX_I2C_BAUD_DIV_M(drv_data->freq_m) | MV64XXX_I2C_BAUD_DIV_N(drv_data->freq_n),
- 		drv_data->reg_base + MV64XXX_I2C_REG_BAUD);
- 	writel(0, drv_data->reg_base + MV64XXX_I2C_REG_SLAVE_ADDR);
- 	writel(0, drv_data->reg_base + MV64XXX_I2C_REG_EXT_SLAVE_ADDR);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1127-i2c-mv64xxx-make-the-registers-offset-configurable.patch b/patches.baytrail/1127-i2c-mv64xxx-make-the-registers-offset-configurable.patch
deleted file mode 100644
index df98df84da438..0000000000000
--- a/patches.baytrail/1127-i2c-mv64xxx-make-the-registers-offset-configurable.patch
+++ /dev/null
@@ -1,275 +0,0 @@
-From 425fa2cced88ba547392b3b174b1d96217785770 Mon Sep 17 00:00:00 2001
-From: Maxime Ripard <maxime.ripard@free-electrons.com>
-Date: Wed, 12 Jun 2013 18:53:31 +0200
-Subject: i2c: mv64xxx: make the registers offset configurable
-
-The Allwinner i2c controller uses the same logic as the Marvell one, but
-with slightly different register offsets.
-
-Introduce a structure that will be passed by either the pdata or
-associated to the compatible strings, and that holds the various
-registers that might be needed.
-
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
-Tested-by: Andrew Lunn <andrew@lunn.ch>
-Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-(cherry picked from commit 004e8ed7cc67f4ba07cba95af269210db11a544c)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/i2c/busses/i2c-mv64xxx.c | 101 ++++++++++++++++++++++++---------------
- 1 file changed, 62 insertions(+), 39 deletions(-)
-
-diff --git a/drivers/i2c/busses/i2c-mv64xxx.c b/drivers/i2c/busses/i2c-mv64xxx.c
-index d70a2fda4a91..7ba9bac18478 100644
---- a/drivers/i2c/busses/i2c-mv64xxx.c
-+++ b/drivers/i2c/busses/i2c-mv64xxx.c
-@@ -19,20 +19,12 @@
- #include <linux/platform_device.h>
- #include <linux/io.h>
- #include <linux/of.h>
-+#include <linux/of_device.h>
- #include <linux/of_irq.h>
- #include <linux/of_i2c.h>
- #include <linux/clk.h>
- #include <linux/err.h>
- 
--/* Register defines */
--#define	MV64XXX_I2C_REG_SLAVE_ADDR			0x00
--#define	MV64XXX_I2C_REG_DATA				0x04
--#define	MV64XXX_I2C_REG_CONTROL				0x08
--#define	MV64XXX_I2C_REG_STATUS				0x0c
--#define	MV64XXX_I2C_REG_BAUD				0x0c
--#define	MV64XXX_I2C_REG_EXT_SLAVE_ADDR			0x10
--#define	MV64XXX_I2C_REG_SOFT_RESET			0x1c
--
- #define MV64XXX_I2C_ADDR_ADDR(val)			((val & 0x7f) << 1)
- #define MV64XXX_I2C_BAUD_DIV_N(val)			(val & 0x7)
- #define MV64XXX_I2C_BAUD_DIV_M(val)			((val & 0xf) << 3)
-@@ -89,6 +81,16 @@ enum {
- 	MV64XXX_I2C_ACTION_SEND_STOP,
- };
- 
-+struct mv64xxx_i2c_regs {
-+	u8	addr;
-+	u8	ext_addr;
-+	u8	data;
-+	u8	control;
-+	u8	status;
-+	u8	clock;
-+	u8	soft_reset;
-+};
-+
- struct mv64xxx_i2c_data {
- 	struct i2c_msg		*msgs;
- 	int			num_msgs;
-@@ -98,6 +100,7 @@ struct mv64xxx_i2c_data {
- 	u32			aborting;
- 	u32			cntl_bits;
- 	void __iomem		*reg_base;
-+	struct mv64xxx_i2c_regs	reg_offsets;
- 	u32			addr1;
- 	u32			addr2;
- 	u32			bytes_left;
-@@ -116,6 +119,16 @@ struct mv64xxx_i2c_data {
- 	struct i2c_adapter	adapter;
- };
- 
-+static struct mv64xxx_i2c_regs mv64xxx_i2c_regs_mv64xxx = {
-+	.addr		= 0x00,
-+	.ext_addr	= 0x10,
-+	.data		= 0x04,
-+	.control	= 0x08,
-+	.status		= 0x0c,
-+	.clock		= 0x0c,
-+	.soft_reset	= 0x1c,
-+};
-+
- static void
- mv64xxx_i2c_prepare_for_io(struct mv64xxx_i2c_data *drv_data,
- 	struct i2c_msg *msg)
-@@ -154,13 +167,13 @@ mv64xxx_i2c_prepare_for_io(struct mv64xxx_i2c_data *drv_data,
- static void
- mv64xxx_i2c_hw_init(struct mv64xxx_i2c_data *drv_data)
- {
--	writel(0, drv_data->reg_base + MV64XXX_I2C_REG_SOFT_RESET);
-+	writel(0, drv_data->reg_base + drv_data->reg_offsets.soft_reset);
- 	writel(MV64XXX_I2C_BAUD_DIV_M(drv_data->freq_m) | MV64XXX_I2C_BAUD_DIV_N(drv_data->freq_n),
--		drv_data->reg_base + MV64XXX_I2C_REG_BAUD);
--	writel(0, drv_data->reg_base + MV64XXX_I2C_REG_SLAVE_ADDR);
--	writel(0, drv_data->reg_base + MV64XXX_I2C_REG_EXT_SLAVE_ADDR);
-+		drv_data->reg_base + drv_data->reg_offsets.clock);
-+	writel(0, drv_data->reg_base + drv_data->reg_offsets.addr);
-+	writel(0, drv_data->reg_base + drv_data->reg_offsets.ext_addr);
- 	writel(MV64XXX_I2C_REG_CONTROL_TWSIEN | MV64XXX_I2C_REG_CONTROL_STOP,
--		drv_data->reg_base + MV64XXX_I2C_REG_CONTROL);
-+		drv_data->reg_base + drv_data->reg_offsets.control);
- 	drv_data->state = MV64XXX_I2C_STATE_IDLE;
- }
- 
-@@ -282,7 +295,7 @@ mv64xxx_i2c_do_action(struct mv64xxx_i2c_data *drv_data)
- 
- 		drv_data->cntl_bits |= MV64XXX_I2C_REG_CONTROL_START;
- 		writel(drv_data->cntl_bits,
--			drv_data->reg_base + MV64XXX_I2C_REG_CONTROL);
-+			drv_data->reg_base + drv_data->reg_offsets.control);
- 
- 		drv_data->msgs++;
- 		drv_data->num_msgs--;
-@@ -300,48 +313,48 @@ mv64xxx_i2c_do_action(struct mv64xxx_i2c_data *drv_data)
- 
- 	case MV64XXX_I2C_ACTION_CONTINUE:
- 		writel(drv_data->cntl_bits,
--			drv_data->reg_base + MV64XXX_I2C_REG_CONTROL);
-+			drv_data->reg_base + drv_data->reg_offsets.control);
- 		break;
- 
- 	case MV64XXX_I2C_ACTION_SEND_START:
- 		writel(drv_data->cntl_bits | MV64XXX_I2C_REG_CONTROL_START,
--			drv_data->reg_base + MV64XXX_I2C_REG_CONTROL);
-+			drv_data->reg_base + drv_data->reg_offsets.control);
- 		break;
- 
- 	case MV64XXX_I2C_ACTION_SEND_ADDR_1:
- 		writel(drv_data->addr1,
--			drv_data->reg_base + MV64XXX_I2C_REG_DATA);
-+			drv_data->reg_base + drv_data->reg_offsets.data);
- 		writel(drv_data->cntl_bits,
--			drv_data->reg_base + MV64XXX_I2C_REG_CONTROL);
-+			drv_data->reg_base + drv_data->reg_offsets.control);
- 		break;
- 
- 	case MV64XXX_I2C_ACTION_SEND_ADDR_2:
- 		writel(drv_data->addr2,
--			drv_data->reg_base + MV64XXX_I2C_REG_DATA);
-+			drv_data->reg_base + drv_data->reg_offsets.data);
- 		writel(drv_data->cntl_bits,
--			drv_data->reg_base + MV64XXX_I2C_REG_CONTROL);
-+			drv_data->reg_base + drv_data->reg_offsets.control);
- 		break;
- 
- 	case MV64XXX_I2C_ACTION_SEND_DATA:
- 		writel(drv_data->msg->buf[drv_data->byte_posn++],
--			drv_data->reg_base + MV64XXX_I2C_REG_DATA);
-+			drv_data->reg_base + drv_data->reg_offsets.data);
- 		writel(drv_data->cntl_bits,
--			drv_data->reg_base + MV64XXX_I2C_REG_CONTROL);
-+			drv_data->reg_base + drv_data->reg_offsets.control);
- 		break;
- 
- 	case MV64XXX_I2C_ACTION_RCV_DATA:
- 		drv_data->msg->buf[drv_data->byte_posn++] =
--			readl(drv_data->reg_base + MV64XXX_I2C_REG_DATA);
-+			readl(drv_data->reg_base + drv_data->reg_offsets.data);
- 		writel(drv_data->cntl_bits,
--			drv_data->reg_base + MV64XXX_I2C_REG_CONTROL);
-+			drv_data->reg_base + drv_data->reg_offsets.control);
- 		break;
- 
- 	case MV64XXX_I2C_ACTION_RCV_DATA_STOP:
- 		drv_data->msg->buf[drv_data->byte_posn++] =
--			readl(drv_data->reg_base + MV64XXX_I2C_REG_DATA);
-+			readl(drv_data->reg_base + drv_data->reg_offsets.data);
- 		drv_data->cntl_bits &= ~MV64XXX_I2C_REG_CONTROL_INTEN;
- 		writel(drv_data->cntl_bits | MV64XXX_I2C_REG_CONTROL_STOP,
--			drv_data->reg_base + MV64XXX_I2C_REG_CONTROL);
-+			drv_data->reg_base + drv_data->reg_offsets.control);
- 		drv_data->block = 0;
- 		wake_up(&drv_data->waitq);
- 		break;
-@@ -356,7 +369,7 @@ mv64xxx_i2c_do_action(struct mv64xxx_i2c_data *drv_data)
- 	case MV64XXX_I2C_ACTION_SEND_STOP:
- 		drv_data->cntl_bits &= ~MV64XXX_I2C_REG_CONTROL_INTEN;
- 		writel(drv_data->cntl_bits | MV64XXX_I2C_REG_CONTROL_STOP,
--			drv_data->reg_base + MV64XXX_I2C_REG_CONTROL);
-+			drv_data->reg_base + drv_data->reg_offsets.control);
- 		drv_data->block = 0;
- 		wake_up(&drv_data->waitq);
- 		break;
-@@ -372,9 +385,9 @@ mv64xxx_i2c_intr(int irq, void *dev_id)
- 	irqreturn_t	rc = IRQ_NONE;
- 
- 	spin_lock_irqsave(&drv_data->lock, flags);
--	while (readl(drv_data->reg_base + MV64XXX_I2C_REG_CONTROL) &
-+	while (readl(drv_data->reg_base + drv_data->reg_offsets.control) &
- 						MV64XXX_I2C_REG_CONTROL_IFLG) {
--		status = readl(drv_data->reg_base + MV64XXX_I2C_REG_STATUS);
-+		status = readl(drv_data->reg_base + drv_data->reg_offsets.status);
- 		mv64xxx_i2c_fsm(drv_data, status);
- 		mv64xxx_i2c_do_action(drv_data);
- 		rc = IRQ_HANDLED;
-@@ -495,6 +508,12 @@ static const struct i2c_algorithm mv64xxx_i2c_algo = {
-  *
-  *****************************************************************************
-  */
-+static const struct of_device_id mv64xxx_i2c_of_match_table[] = {
-+	{ .compatible = "marvell,mv64xxx-i2c", .data = &mv64xxx_i2c_regs_mv64xxx},
-+	{}
-+};
-+MODULE_DEVICE_TABLE(of, mv64xxx_i2c_of_match_table);
-+
- #ifdef CONFIG_OF
- static int
- mv64xxx_calc_freq(const int tclk, const int n, const int m)
-@@ -528,8 +547,10 @@ mv64xxx_find_baud_factors(const u32 req_freq, const u32 tclk, u32 *best_n,
- 
- static int
- mv64xxx_of_config(struct mv64xxx_i2c_data *drv_data,
--		  struct device_node *np)
-+		  struct device *dev)
- {
-+	const struct of_device_id *device;
-+	struct device_node *np = dev->of_node;
- 	u32 bus_freq, tclk;
- 	int rc = 0;
- 
-@@ -558,6 +579,13 @@ mv64xxx_of_config(struct mv64xxx_i2c_data *drv_data,
- 	 * So hard code the value to 1 second.
- 	 */
- 	drv_data->adapter.timeout = HZ;
-+
-+	device = of_match_device(mv64xxx_i2c_of_match_table, dev);
-+	if (!device)
-+		return -ENODEV;
-+
-+	memcpy(&drv_data->reg_offsets, device->data, sizeof(drv_data->reg_offsets));
-+
- out:
- 	return rc;
- #endif
-@@ -565,7 +593,7 @@ out:
- #else /* CONFIG_OF */
- static int
- mv64xxx_of_config(struct mv64xxx_i2c_data *drv_data,
--		  struct device_node *np)
-+		  struct device *dev)
- {
- 	return -ENODEV;
- }
-@@ -611,8 +639,9 @@ mv64xxx_i2c_probe(struct platform_device *pd)
- 		drv_data->freq_n = pdata->freq_n;
- 		drv_data->irq = platform_get_irq(pd, 0);
- 		drv_data->adapter.timeout = msecs_to_jiffies(pdata->timeout);
-+		memcpy(&drv_data->reg_offsets, &mv64xxx_i2c_regs_mv64xxx, sizeof(drv_data->reg_offsets));
- 	} else if (pd->dev.of_node) {
--		rc = mv64xxx_of_config(drv_data, pd->dev.of_node);
-+		rc = mv64xxx_of_config(drv_data, &pd->dev);
- 		if (rc)
- 			goto exit_clk;
- 	}
-@@ -680,12 +709,6 @@ mv64xxx_i2c_remove(struct platform_device *dev)
- 	return 0;
- }
- 
--static const struct of_device_id mv64xxx_i2c_of_match_table[] = {
--	{ .compatible = "marvell,mv64xxx-i2c", },
--	{}
--};
--MODULE_DEVICE_TABLE(of, mv64xxx_i2c_of_match_table);
--
- static struct platform_driver mv64xxx_i2c_driver = {
- 	.probe	= mv64xxx_i2c_probe,
- 	.remove	= mv64xxx_i2c_remove,
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1128-i2c-mv64xxx-Add-Allwinner-sun4i-compatible.patch b/patches.baytrail/1128-i2c-mv64xxx-Add-Allwinner-sun4i-compatible.patch
deleted file mode 100644
index 4f534715cfc83..0000000000000
--- a/patches.baytrail/1128-i2c-mv64xxx-Add-Allwinner-sun4i-compatible.patch
+++ /dev/null
@@ -1,61 +0,0 @@
-From 14bae44ca083db9882fa71852ed8e2767965961d Mon Sep 17 00:00:00 2001
-From: Maxime Ripard <maxime.ripard@free-electrons.com>
-Date: Wed, 12 Jun 2013 18:53:32 +0200
-Subject: i2c: mv64xxx: Add Allwinner sun4i compatible
-
-Add the compatible string for the Allwinner A10 i2c controller and the
-associated register layout.
-
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
-Tested-by: Andrew Lunn <andrew@lunn.ch>
-Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-(cherry picked from commit 3d66ac7d81ac70dfaab8a573f7ad2be94f7d6da3)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/i2c/busses/Kconfig       |    3 ++-
- drivers/i2c/busses/i2c-mv64xxx.c |   11 +++++++++++
- 2 files changed, 13 insertions(+), 1 deletion(-)
-
---- a/drivers/i2c/busses/Kconfig
-+++ b/drivers/i2c/busses/Kconfig
-@@ -509,10 +509,11 @@ config I2C_MPC
- 
- config I2C_MV64XXX
- 	tristate "Marvell mv64xxx I2C Controller"
--	depends on (MV64X60 || PLAT_ORION)
-+	depends on (MV64X60 || PLAT_ORION || ARCH_SUNXI)
- 	help
- 	  If you say yes to this option, support will be included for the
- 	  built-in I2C interface on the Marvell 64xxx line of host bridges.
-+	  This driver is also used for Allwinner SoCs I2C controllers.
- 
- 	  This driver can also be built as a module.  If so, the module
- 	  will be called i2c-mv64xxx.
---- a/drivers/i2c/busses/i2c-mv64xxx.c
-+++ b/drivers/i2c/busses/i2c-mv64xxx.c
-@@ -129,6 +129,16 @@ static struct mv64xxx_i2c_regs mv64xxx_i
- 	.soft_reset	= 0x1c,
- };
- 
-+static struct mv64xxx_i2c_regs mv64xxx_i2c_regs_sun4i = {
-+	.addr		= 0x00,
-+	.ext_addr	= 0x04,
-+	.data		= 0x08,
-+	.control	= 0x0c,
-+	.status		= 0x10,
-+	.clock		= 0x14,
-+	.soft_reset	= 0x18,
-+};
-+
- static void
- mv64xxx_i2c_prepare_for_io(struct mv64xxx_i2c_data *drv_data,
- 	struct i2c_msg *msg)
-@@ -509,6 +519,7 @@ static const struct i2c_algorithm mv64xx
-  *****************************************************************************
-  */
- static const struct of_device_id mv64xxx_i2c_of_match_table[] = {
-+	{ .compatible = "allwinner,sun4i-i2c", .data = &mv64xxx_i2c_regs_sun4i},
- 	{ .compatible = "marvell,mv64xxx-i2c", .data = &mv64xxx_i2c_regs_mv64xxx},
- 	{}
- };
diff --git a/patches.baytrail/1129-i2c-mv64xxx-Fix-transfer-error-code.patch b/patches.baytrail/1129-i2c-mv64xxx-Fix-transfer-error-code.patch
deleted file mode 100644
index 67bf249b277bd..0000000000000
--- a/patches.baytrail/1129-i2c-mv64xxx-Fix-transfer-error-code.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From 2de420949d8d20b074dd1786d6b971e8e348c196 Mon Sep 17 00:00:00 2001
-From: Guenter Roeck <linux@roeck-us.net>
-Date: Wed, 19 Jun 2013 14:53:52 -0700
-Subject: i2c: mv64xxx: Fix transfer error code
-
-The driver returns -ENODEV as error code if it did not get an ACK
-from the device. Per Documentation/i2c/fault-codes, it should
-return -ENXIO.
-
-Signed-off-by: Guenter Roeck <linux@roeck-us.net>
-Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-(cherry picked from commit 6faa3535599a6f9ef367e3fd5c5126207a356a53)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/i2c/busses/i2c-mv64xxx.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/i2c/busses/i2c-mv64xxx.c b/drivers/i2c/busses/i2c-mv64xxx.c
-index 7a0e39b7f928..ed854573b427 100644
---- a/drivers/i2c/busses/i2c-mv64xxx.c
-+++ b/drivers/i2c/busses/i2c-mv64xxx.c
-@@ -280,7 +280,7 @@ mv64xxx_i2c_fsm(struct mv64xxx_i2c_data *drv_data, u32 status)
- 		/* Doesn't seem to be a device at other end */
- 		drv_data->action = MV64XXX_I2C_ACTION_SEND_STOP;
- 		drv_data->state = MV64XXX_I2C_STATE_IDLE;
--		drv_data->rc = -ENODEV;
-+		drv_data->rc = -ENXIO;
- 		break;
- 
- 	default:
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1130-i2c-imx-allow-autoloading-on-dt-ids.patch b/patches.baytrail/1130-i2c-imx-allow-autoloading-on-dt-ids.patch
deleted file mode 100644
index 3a74a1273b166..0000000000000
--- a/patches.baytrail/1130-i2c-imx-allow-autoloading-on-dt-ids.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From 09a4eeb81e84908a10a5b9028e0e58fda129942a Mon Sep 17 00:00:00 2001
-From: "Arnaud Patard \\(Rtp\\)" <arnaud.patard@rtp-net.org>
-Date: Thu, 20 Jun 2013 23:07:06 +0200
-Subject: i2c: imx: allow autoloading on dt ids
-
-Allow udev to autoload the module when booting with device-tree
-
-Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
-Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-(cherry picked from commit 2f641a8bdb1b808b9bf1d0ca7d169d199aaf6ff4)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/i2c/busses/i2c-imx.c | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c
-index 6406aa960f2a..e24279725d36 100644
---- a/drivers/i2c/busses/i2c-imx.c
-+++ b/drivers/i2c/busses/i2c-imx.c
-@@ -147,6 +147,7 @@ static const struct of_device_id i2c_imx_dt_ids[] = {
- 	{ .compatible = "fsl,imx21-i2c", .data = &imx_i2c_devtype[IMX21_I2C], },
- 	{ /* sentinel */ }
- };
-+MODULE_DEVICE_TABLE(of, i2c_imx_dt_ids);
- 
- static inline int is_imx1_i2c(struct imx_i2c_struct *i2c_imx)
- {
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1131-i2c-mv64xxx-Set-bus-frequency-to-100kHz-if-clock-fre.patch b/patches.baytrail/1131-i2c-mv64xxx-Set-bus-frequency-to-100kHz-if-clock-fre.patch
deleted file mode 100644
index f305b88a984e7..0000000000000
--- a/patches.baytrail/1131-i2c-mv64xxx-Set-bus-frequency-to-100kHz-if-clock-fre.patch
+++ /dev/null
@@ -1,60 +0,0 @@
-From 6b52290ae18ec168dd341a3d40291ad8630818c0 Mon Sep 17 00:00:00 2001
-From: Gregory CLEMENT <gregory.clement@free-electrons.com>
-Date: Fri, 21 Jun 2013 15:32:06 +0200
-Subject: i2c: mv64xxx: Set bus frequency to 100kHz if clock-frequency is not
- provided
-
-This commit adds checking whether clock-frequency property acquisition
-has succeeded. If not, the frequency is set to 100kHz by default.
-
-The Device Tree binding documentation is updated accordingly.
-
-Based on the intials patches from Zbigniew Bodek
-
-Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
-Signed-off-by: Zbigniew Bodek <zbb@semihalf.com>
-Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-(cherry picked from commit 4c730a06c19bb83d2fa4308ee4cbb23abc84c9ca)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- Documentation/devicetree/bindings/i2c/i2c-mv64xxx.txt | 6 +++++-
- drivers/i2c/busses/i2c-mv64xxx.c                      | 6 +++++-
- 2 files changed, 10 insertions(+), 2 deletions(-)
-
-diff --git a/Documentation/devicetree/bindings/i2c/i2c-mv64xxx.txt b/Documentation/devicetree/bindings/i2c/i2c-mv64xxx.txt
-index f46d928aa73d..a1ee681942cc 100644
---- a/Documentation/devicetree/bindings/i2c/i2c-mv64xxx.txt
-+++ b/Documentation/devicetree/bindings/i2c/i2c-mv64xxx.txt
-@@ -6,7 +6,11 @@ Required properties :
-  - reg             : Offset and length of the register set for the device
-  - compatible      : Should be "marvell,mv64xxx-i2c"
-  - interrupts      : The interrupt number
-- - clock-frequency : Desired I2C bus clock frequency in Hz.
-+
-+Optional properties :
-+
-+ - clock-frequency : Desired I2C bus clock frequency in Hz. If not set the
-+default frequency is 100kHz
- 
- Examples:
- 
-diff --git a/drivers/i2c/busses/i2c-mv64xxx.c b/drivers/i2c/busses/i2c-mv64xxx.c
-index ed854573b427..b1f42bf40963 100644
---- a/drivers/i2c/busses/i2c-mv64xxx.c
-+++ b/drivers/i2c/busses/i2c-mv64xxx.c
-@@ -578,7 +578,11 @@ mv64xxx_of_config(struct mv64xxx_i2c_data *drv_data,
- 		goto out;
- 	}
- 	tclk = clk_get_rate(drv_data->clk);
--	of_property_read_u32(np, "clock-frequency", &bus_freq);
-+
-+	rc = of_property_read_u32(np, "clock-frequency", &bus_freq);
-+	if (rc)
-+		bus_freq = 100000; /* 100kHz by default */
-+
- 	if (!mv64xxx_find_baud_factors(bus_freq, tclk,
- 				       &drv_data->freq_n, &drv_data->freq_m)) {
- 		rc = -EINVAL;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1132-i2c-designware-make-SDA-hold-time-configurable.patch b/patches.baytrail/1132-i2c-designware-make-SDA-hold-time-configurable.patch
deleted file mode 100644
index 3865986028d62..0000000000000
--- a/patches.baytrail/1132-i2c-designware-make-SDA-hold-time-configurable.patch
+++ /dev/null
@@ -1,187 +0,0 @@
-From 9460d2cc14495907dc50123e631f2021f63dd7a5 Mon Sep 17 00:00:00 2001
-From: Christian Ruppert <christian.ruppert@abilis.com>
-Date: Wed, 26 Jun 2013 10:55:06 +0200
-Subject: i2c-designware: make SDA hold time configurable
-
-This patch makes the SDA hold time configurable through device tree.
-
-Signed-off-by: Christian Ruppert <christian.ruppert@abilis.com>
-Signed-off-by: Pierrick Hascoet <pierrick.hascoet@abilis.com>
-Acked-by: Vineet Gupta <vgupta@synopsys.com> for arch/arc bits
-Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-(cherry picked from commit 9803f868944e879c4623c0d910e81f1ae89ccfb4)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- Documentation/devicetree/bindings/i2c/i2c-designware.txt | 15 +++++++++++++++
- arch/arc/boot/dts/abilis_tb100_dvk.dts                   | 10 +++++-----
- arch/arc/boot/dts/abilis_tb101_dvk.dts                   | 10 +++++-----
- drivers/i2c/busses/i2c-designware-core.c                 | 13 +++++++++++++
- drivers/i2c/busses/i2c-designware-core.h                 |  1 +
- drivers/i2c/busses/i2c-designware-platdrv.c              | 10 ++++++++++
- 6 files changed, 49 insertions(+), 10 deletions(-)
-
-diff --git a/Documentation/devicetree/bindings/i2c/i2c-designware.txt b/Documentation/devicetree/bindings/i2c/i2c-designware.txt
-index e42a2ee233e6..7fd7fa25e9b0 100644
---- a/Documentation/devicetree/bindings/i2c/i2c-designware.txt
-+++ b/Documentation/devicetree/bindings/i2c/i2c-designware.txt
-@@ -10,6 +10,10 @@ Recommended properties :
- 
-  - clock-frequency : desired I2C bus clock frequency in Hz.
- 
-+Optional properties :
-+ - i2c-sda-hold-time-ns : should contain the SDA hold time in nanoseconds.
-+   This option is only supported in hardware blocks version 1.11a or newer.
-+
- Example :
- 
- 	i2c@f0000 {
-@@ -20,3 +24,14 @@ Example :
- 		interrupts = <11>;
- 		clock-frequency = <400000>;
- 	};
-+
-+	i2c@1120000 {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		compatible = "snps,designware-i2c";
-+		reg = <0x1120000 0x1000>;
-+		interrupt-parent = <&ictl>;
-+		interrupts = <12 1>;
-+		clock-frequency = <400000>;
-+		i2c-sda-hold-time-ns = <300>;
-+	};
-diff --git a/arch/arc/boot/dts/abilis_tb100_dvk.dts b/arch/arc/boot/dts/abilis_tb100_dvk.dts
-index 0fa0d4abe795..ebc313a9f5b2 100644
---- a/arch/arc/boot/dts/abilis_tb100_dvk.dts
-+++ b/arch/arc/boot/dts/abilis_tb100_dvk.dts
-@@ -45,19 +45,19 @@
- 		};
- 
- 		i2c0: i2c@FF120000 {
--			sda-hold-time = <432>;
-+			i2c-sda-hold-time-ns = <432>;
- 		};
- 		i2c1: i2c@FF121000 {
--			sda-hold-time = <432>;
-+			i2c-sda-hold-time-ns = <432>;
- 		};
- 		i2c2: i2c@FF122000 {
--			sda-hold-time = <432>;
-+			i2c-sda-hold-time-ns = <432>;
- 		};
- 		i2c3: i2c@FF123000 {
--			sda-hold-time = <432>;
-+			i2c-sda-hold-time-ns = <432>;
- 		};
- 		i2c4: i2c@FF124000 {
--			sda-hold-time = <432>;
-+			i2c-sda-hold-time-ns = <432>;
- 		};
- 
- 		leds {
-diff --git a/arch/arc/boot/dts/abilis_tb101_dvk.dts b/arch/arc/boot/dts/abilis_tb101_dvk.dts
-index a4d80ce283ae..b204657993aa 100644
---- a/arch/arc/boot/dts/abilis_tb101_dvk.dts
-+++ b/arch/arc/boot/dts/abilis_tb101_dvk.dts
-@@ -45,19 +45,19 @@
- 		};
- 
- 		i2c0: i2c@FF120000 {
--			sda-hold-time = <432>;
-+			i2c-sda-hold-time-ns = <432>;
- 		};
- 		i2c1: i2c@FF121000 {
--			sda-hold-time = <432>;
-+			i2c-sda-hold-time-ns = <432>;
- 		};
- 		i2c2: i2c@FF122000 {
--			sda-hold-time = <432>;
-+			i2c-sda-hold-time-ns = <432>;
- 		};
- 		i2c3: i2c@FF123000 {
--			sda-hold-time = <432>;
-+			i2c-sda-hold-time-ns = <432>;
- 		};
- 		i2c4: i2c@FF124000 {
--			sda-hold-time = <432>;
-+			i2c-sda-hold-time-ns = <432>;
- 		};
- 
- 		leds {
-diff --git a/drivers/i2c/busses/i2c-designware-core.c b/drivers/i2c/busses/i2c-designware-core.c
-index 3de549436992..ad46616de29e 100644
---- a/drivers/i2c/busses/i2c-designware-core.c
-+++ b/drivers/i2c/busses/i2c-designware-core.c
-@@ -67,9 +67,12 @@
- #define DW_IC_STATUS		0x70
- #define DW_IC_TXFLR		0x74
- #define DW_IC_RXFLR		0x78
-+#define DW_IC_SDA_HOLD		0x7c
- #define DW_IC_TX_ABRT_SOURCE	0x80
- #define DW_IC_ENABLE_STATUS	0x9c
- #define DW_IC_COMP_PARAM_1	0xf4
-+#define DW_IC_COMP_VERSION	0xf8
-+#define DW_IC_SDA_HOLD_MIN_VERS	0x3131312A
- #define DW_IC_COMP_TYPE		0xfc
- #define DW_IC_COMP_TYPE_VALUE	0x44570140
- 
-@@ -332,6 +335,16 @@ int i2c_dw_init(struct dw_i2c_dev *dev)
- 	dw_writel(dev, lcnt, DW_IC_FS_SCL_LCNT);
- 	dev_dbg(dev->dev, "Fast-mode HCNT:LCNT = %d:%d\n", hcnt, lcnt);
- 
-+	/* Configure SDA Hold Time if required */
-+	if (dev->sda_hold_time) {
-+		reg = dw_readl(dev, DW_IC_COMP_VERSION);
-+		if (reg >= DW_IC_SDA_HOLD_MIN_VERS)
-+			dw_writel(dev, dev->sda_hold_time, DW_IC_SDA_HOLD);
-+		else
-+			dev_warn(dev->dev,
-+				"Hardware too old to adjust SDA hold time.");
-+	}
-+
- 	/* Configure Tx/Rx FIFO threshold levels */
- 	dw_writel(dev, dev->tx_fifo_depth - 1, DW_IC_TX_TL);
- 	dw_writel(dev, 0, DW_IC_RX_TL);
-diff --git a/drivers/i2c/busses/i2c-designware-core.h b/drivers/i2c/busses/i2c-designware-core.h
-index e761ad18dd61..912aa2262866 100644
---- a/drivers/i2c/busses/i2c-designware-core.h
-+++ b/drivers/i2c/busses/i2c-designware-core.h
-@@ -90,6 +90,7 @@ struct dw_i2c_dev {
- 	unsigned int		tx_fifo_depth;
- 	unsigned int		rx_fifo_depth;
- 	int			rx_outstanding;
-+	u32			sda_hold_time;
- };
- 
- #define ACCESS_SWAP		0x00000001
-diff --git a/drivers/i2c/busses/i2c-designware-platdrv.c b/drivers/i2c/busses/i2c-designware-platdrv.c
-index ee46c92d7e3c..def79b5fd4c8 100644
---- a/drivers/i2c/busses/i2c-designware-platdrv.c
-+++ b/drivers/i2c/busses/i2c-designware-platdrv.c
-@@ -34,6 +34,7 @@
- #include <linux/sched.h>
- #include <linux/err.h>
- #include <linux/interrupt.h>
-+#include <linux/of.h>
- #include <linux/of_i2c.h>
- #include <linux/platform_device.h>
- #include <linux/pm.h>
-@@ -115,6 +116,15 @@ static int dw_i2c_probe(struct platform_device *pdev)
- 		return PTR_ERR(dev->clk);
- 	clk_prepare_enable(dev->clk);
- 
-+	if (pdev->dev.of_node) {
-+		u32 ht = 0;
-+		u32 ic_clk = dev->get_clk_rate_khz(dev);
-+
-+		of_property_read_u32(pdev->dev.of_node,
-+					"i2c-sda-hold-time-ns", &ht);
-+		dev->sda_hold_time = ((u64)ic_clk * ht + 500000) / 1000000;
-+	}
-+
- 	dev->functionality =
- 		I2C_FUNC_I2C |
- 		I2C_FUNC_10BIT_ADDR |
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1133-i2c-designware-use-div_u64-to-fix-link.patch b/patches.baytrail/1133-i2c-designware-use-div_u64-to-fix-link.patch
deleted file mode 100644
index c628f08e4ad8d..0000000000000
--- a/patches.baytrail/1133-i2c-designware-use-div_u64-to-fix-link.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From 4c4e8f4bc903ec19a66efe2ea14ddabe7bd55de1 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Vincent=20Stehl=C3=A9?= <vincent.stehle@freescale.com>
-Date: Tue, 2 Jul 2013 11:46:54 +0200
-Subject: i2c-designware: use div_u64 to fix link
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-This fixes the following link error:
-
-  drivers/built-in.o: In function `dw_i2c_probe':
-  of_iommu.c:(.text+0x18c8f0): undefined reference to `__aeabi_uldivmod'
-  make: *** [vmlinux] Error 1
-
-Signed-off-by: Vincent Stehlé <vincent.stehle@freescale.com>
-Tested-by: Kevin Hilman <khilman@linaro.org>
-Reviewed-by: Christian Ruppert <christian.ruppert@abilis.com>
-Acked-by: Arnd Bergmann <arnd@arndb.de>
-Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-(cherry picked from commit 97191d734f6ac028e5e6dcd574378c1544a16c0b)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/i2c/busses/i2c-designware-platdrv.c | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/i2c/busses/i2c-designware-platdrv.c b/drivers/i2c/busses/i2c-designware-platdrv.c
-index def79b5fd4c8..4c5fadabe49d 100644
---- a/drivers/i2c/busses/i2c-designware-platdrv.c
-+++ b/drivers/i2c/busses/i2c-designware-platdrv.c
-@@ -122,7 +122,8 @@ static int dw_i2c_probe(struct platform_device *pdev)
- 
- 		of_property_read_u32(pdev->dev.of_node,
- 					"i2c-sda-hold-time-ns", &ht);
--		dev->sda_hold_time = ((u64)ic_clk * ht + 500000) / 1000000;
-+		dev->sda_hold_time = div_u64((u64)ic_clk * ht + 500000,
-+					     1000000);
- 	}
- 
- 	dev->functionality =
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1134-of-remove-CONFIG_OF_DEVICE.patch b/patches.baytrail/1134-of-remove-CONFIG_OF_DEVICE.patch
deleted file mode 100644
index 1426c6772b778..0000000000000
--- a/patches.baytrail/1134-of-remove-CONFIG_OF_DEVICE.patch
+++ /dev/null
@@ -1,88 +0,0 @@
-From 2889dcb4c9930a6b11435549916b348a2ce429cb Mon Sep 17 00:00:00 2001
-From: Rob Herring <rob.herring@calxeda.com>
-Date: Fri, 19 Apr 2013 17:32:52 -0500
-Subject: of: remove CONFIG_OF_DEVICE
-
-CONFIG_OF_DEVICE is always selected when CONFIG_OF is enabled, so remove
-it and simplify of_platform.h and of_device.h headers. This also fixes
-!OF compiles using of_platform_populate.
-
-Signed-off-by: Rob Herring <rob.herring@calxeda.com>
-Acked-by: Arnd Bergmann <arnd@arndb.de>
-Tested-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
-Signed-off-by: Grant Likely <grant.likely@linaro.org>
-(cherry picked from commit ba166e900b502b74b9425881caa94f94891b0a1f)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/of/Kconfig        | 3 ---
- drivers/of/Makefile       | 3 +--
- include/linux/of_device.h | 6 +++---
- 3 files changed, 4 insertions(+), 8 deletions(-)
-
-diff --git a/drivers/of/Kconfig b/drivers/of/Kconfig
-index d37bfcf5a3a2..80e5c13b930d 100644
---- a/drivers/of/Kconfig
-+++ b/drivers/of/Kconfig
-@@ -48,9 +48,6 @@ config OF_IRQ
- 	def_bool y
- 	depends on !SPARC
- 
--config OF_DEVICE
--	def_bool y
--
- config OF_I2C
- 	def_tristate I2C
- 	depends on I2C
-diff --git a/drivers/of/Makefile b/drivers/of/Makefile
-index e027f444d10c..1f9c0c492ef9 100644
---- a/drivers/of/Makefile
-+++ b/drivers/of/Makefile
-@@ -1,9 +1,8 @@
--obj-y = base.o
-+obj-y = base.o device.o platform.o
- obj-$(CONFIG_OF_FLATTREE) += fdt.o
- obj-$(CONFIG_OF_PROMTREE) += pdt.o
- obj-$(CONFIG_OF_ADDRESS)  += address.o
- obj-$(CONFIG_OF_IRQ)    += irq.o
--obj-$(CONFIG_OF_DEVICE) += device.o platform.o
- obj-$(CONFIG_OF_I2C)	+= of_i2c.o
- obj-$(CONFIG_OF_NET)	+= of_net.o
- obj-$(CONFIG_OF_SELFTEST) += selftest.o
-diff --git a/include/linux/of_device.h b/include/linux/of_device.h
-index 901b7435e890..9d27475feec1 100644
---- a/include/linux/of_device.h
-+++ b/include/linux/of_device.h
-@@ -4,12 +4,12 @@
- #include <linux/platform_device.h>
- #include <linux/of_platform.h> /* temporary until merge */
- 
--#ifdef CONFIG_OF_DEVICE
- #include <linux/of.h>
- #include <linux/mod_devicetable.h>
- 
- struct device;
- 
-+#ifdef CONFIG_OF
- extern const struct of_device_id *of_match_device(
- 	const struct of_device_id *matches, const struct device *dev);
- extern void of_device_make_bus_id(struct device *dev);
-@@ -43,7 +43,7 @@ static inline void of_device_node_put(struct device *dev)
- 	of_node_put(dev->of_node);
- }
- 
--#else /* CONFIG_OF_DEVICE */
-+#else /* CONFIG_OF */
- 
- static inline int of_driver_match_device(struct device *dev,
- 					 struct device_driver *drv)
-@@ -67,6 +67,6 @@ static inline const struct of_device_id *of_match_device(
- {
- 	return NULL;
- }
--#endif /* CONFIG_OF_DEVICE */
-+#endif /* CONFIG_OF */
- 
- #endif /* _LINUX_OF_DEVICE_H */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1135-dw_dmac-remove-inline-marking-of-EXPORT_SYMBOL-funct.patch b/patches.baytrail/1135-dw_dmac-remove-inline-marking-of-EXPORT_SYMBOL-funct.patch
deleted file mode 100644
index db794891c5ca9..0000000000000
--- a/patches.baytrail/1135-dw_dmac-remove-inline-marking-of-EXPORT_SYMBOL-funct.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From 00943cca5c6a423baed013fc93df33780717990d Mon Sep 17 00:00:00 2001
-From: Denis Efremov <yefremov.denis@gmail.com>
-Date: Thu, 9 May 2013 13:19:40 +0400
-Subject: dw_dmac: remove inline marking of EXPORT_SYMBOL functions
-
-EXPORT_SYMBOL and inline directives are contradictory to each other.
-The patch fixes this inconsistency.
-
-Found by Linux Driver Verification project (linuxtesting.org).
-Signed-off-by: Denis Efremov <yefremov.denis@gmail.com>
-Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
-Signed-off-by: Vinod Koul <vinod.koul@intel.com>
-(cherry picked from commit 8004cbb481494c166596b0d469a6c777415e18f6)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/dma/dw_dmac.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/dma/dw_dmac.c b/drivers/dma/dw_dmac.c
-index 2e5deaa82b60..724083d02b34 100644
---- a/drivers/dma/dw_dmac.c
-+++ b/drivers/dma/dw_dmac.c
-@@ -556,14 +556,14 @@ static void dwc_handle_error(struct dw_dma *dw, struct dw_dma_chan *dwc)
- 
- /* --------------------- Cyclic DMA API extensions -------------------- */
- 
--inline dma_addr_t dw_dma_get_src_addr(struct dma_chan *chan)
-+dma_addr_t dw_dma_get_src_addr(struct dma_chan *chan)
- {
- 	struct dw_dma_chan *dwc = to_dw_dma_chan(chan);
- 	return channel_readl(dwc, SAR);
- }
- EXPORT_SYMBOL(dw_dma_get_src_addr);
- 
--inline dma_addr_t dw_dma_get_dst_addr(struct dma_chan *chan)
-+dma_addr_t dw_dma_get_dst_addr(struct dma_chan *chan)
- {
- 	struct dw_dma_chan *dwc = to_dw_dma_chan(chan);
- 	return channel_readl(dwc, DAR);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1136-dw_dmac-don-t-check-resource-with-devm_ioremap_resou.patch b/patches.baytrail/1136-dw_dmac-don-t-check-resource-with-devm_ioremap_resou.patch
deleted file mode 100644
index b1b56a80fa564..0000000000000
--- a/patches.baytrail/1136-dw_dmac-don-t-check-resource-with-devm_ioremap_resou.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From 93f95ebd7991b7ac40f5eba93df83da18ebc333c Mon Sep 17 00:00:00 2001
-From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-Date: Wed, 5 Jun 2013 15:26:43 +0300
-Subject: dw_dmac: don't check resource with devm_ioremap_resource
-
-devm_ioremap_resource does sanity checks on the given resource. No need to
-duplicate this in the driver.
-
-Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
-Acked-by: Arnd Bergmann <arnd@arndb.de>
-Signed-off-by: Vinod Koul <vinod.koul@intel.com>
-(cherry picked from commit 0b95961e03ecee31d6151db79cc0826e702d1e0a)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/dma/dw_dmac.c | 5 +----
- 1 file changed, 1 insertion(+), 4 deletions(-)
-
-diff --git a/drivers/dma/dw_dmac.c b/drivers/dma/dw_dmac.c
-index 724083d02b34..2b65ba614e60 100644
---- a/drivers/dma/dw_dmac.c
-+++ b/drivers/dma/dw_dmac.c
-@@ -1667,14 +1667,11 @@ static int dw_probe(struct platform_device *pdev)
- 	int			err;
- 	int			i;
- 
--	io = platform_get_resource(pdev, IORESOURCE_MEM, 0);
--	if (!io)
--		return -EINVAL;
--
- 	irq = platform_get_irq(pdev, 0);
- 	if (irq < 0)
- 		return irq;
- 
-+	io = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- 	regs = devm_ioremap_resource(&pdev->dev, io);
- 	if (IS_ERR(regs))
- 		return PTR_ERR(regs);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1137-dma-move-dw_dmac-driver-to-an-own-directory.patch b/patches.baytrail/1137-dma-move-dw_dmac-driver-to-an-own-directory.patch
deleted file mode 100644
index a08d341a2087a..0000000000000
--- a/patches.baytrail/1137-dma-move-dw_dmac-driver-to-an-own-directory.patch
+++ /dev/null
@@ -1,4691 +0,0 @@
-From 42c7634a8a3844e9e1a8183fc51b514edd27aed1 Mon Sep 17 00:00:00 2001
-From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-Date: Wed, 5 Jun 2013 15:26:44 +0300
-Subject: dma: move dw_dmac driver to an own directory
-
-The dw_dmac driver is going to be split into multiple files. To make this more
-convenient move it to an own directory.
-
-Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
-Acked-by: Arnd Bergmann <arnd@arndb.de>
-Signed-off-by: Vinod Koul <vinod.koul@intel.com>
-(cherry picked from commit 61a7649620d54a037c612f9a713abe5178cddc65)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- MAINTAINERS                         |  3 +--
- drivers/dma/Kconfig                 | 20 +-------------------
- drivers/dma/Makefile                |  2 +-
- drivers/dma/dw/Kconfig              | 23 +++++++++++++++++++++++
- drivers/dma/dw/Makefile             |  1 +
- drivers/dma/{ => dw}/dw_dmac.c      |  2 +-
- drivers/dma/{ => dw}/dw_dmac_regs.h |  0
- MAINTAINERS                   |    3 
- drivers/dma/Kconfig           |   20 
- drivers/dma/Makefile          |    2 
- drivers/dma/dw/Kconfig        |   23 
- drivers/dma/dw/Makefile       |    1 
- drivers/dma/dw/dw_dmac.c      | 1969 ++++++++++++++++++++++++++++++++++++++++++
- drivers/dma/dw/dw_dmac_regs.h |  311 ++++++
- drivers/dma/dw_dmac.c         | 1969 ------------------------------------------
- drivers/dma/dw_dmac_regs.h    |  311 ------
- 9 files changed, 2307 insertions(+), 2302 deletions(-)
- create mode 100644 drivers/dma/dw/Kconfig
- create mode 100644 drivers/dma/dw/Makefile
- rename drivers/dma/{ => dw}/dw_dmac.c (99%)
- rename drivers/dma/{ => dw}/dw_dmac_regs.h (100%)
-
---- a/MAINTAINERS
-+++ b/MAINTAINERS
-@@ -6998,8 +6998,7 @@ SYNOPSYS DESIGNWARE DMAC DRIVER
- M:	Viresh Kumar <viresh.linux@gmail.com>
- S:	Maintained
- F:	include/linux/dw_dmac.h
--F:	drivers/dma/dw_dmac_regs.h
--F:	drivers/dma/dw_dmac.c
-+F:	drivers/dma/dw/
- 
- SYNOPSYS DESIGNWARE MMC/SD/SDIO DRIVER
- M:	Seungwon Jeon <tgih.jun@samsung.com>
---- a/drivers/dma/Kconfig
-+++ b/drivers/dma/Kconfig
-@@ -79,25 +79,7 @@ config INTEL_IOP_ADMA
- 	help
- 	  Enable support for the Intel(R) IOP Series RAID engines.
- 
--config DW_DMAC
--	tristate "Synopsys DesignWare AHB DMA support"
--	depends on GENERIC_HARDIRQS
--	select DMA_ENGINE
--	default y if CPU_AT32AP7000
--	help
--	  Support the Synopsys DesignWare AHB DMA controller.  This
--	  can be integrated in chips such as the Atmel AT32ap7000.
--
--config DW_DMAC_BIG_ENDIAN_IO
--	bool "Use big endian I/O register access"
--	default y if AVR32
--	depends on DW_DMAC
--	help
--	  Say yes here to use big endian I/O access when reading and writing
--	  to the DMA controller registers. This is needed on some platforms,
--	  like the Atmel AVR32 architecture.
--
--	  If unsure, use the default setting.
-+source "drivers/dma/dw/Kconfig"
- 
- config AT_HDMAC
- 	tristate "Atmel AHB DMA support"
---- a/drivers/dma/Makefile
-+++ b/drivers/dma/Makefile
-@@ -15,7 +15,7 @@ obj-$(CONFIG_FSL_DMA) += fsldma.o
- obj-$(CONFIG_MPC512X_DMA) += mpc512x_dma.o
- obj-$(CONFIG_PPC_BESTCOMM) += bestcomm/
- obj-$(CONFIG_MV_XOR) += mv_xor.o
--obj-$(CONFIG_DW_DMAC) += dw_dmac.o
-+obj-$(CONFIG_DW_DMAC) += dw/
- obj-$(CONFIG_AT_HDMAC) += at_hdmac.o
- obj-$(CONFIG_MX3_IPU) += ipu/
- obj-$(CONFIG_TXX9_DMAC) += txx9dmac.o
---- /dev/null
-+++ b/drivers/dma/dw/Kconfig
-@@ -0,0 +1,23 @@
-+#
-+# DMA engine configuration for dw
-+#
-+
-+config DW_DMAC
-+	tristate "Synopsys DesignWare AHB DMA support"
-+	depends on GENERIC_HARDIRQS
-+	select DMA_ENGINE
-+	default y if CPU_AT32AP7000
-+	help
-+	  Support the Synopsys DesignWare AHB DMA controller. This
-+	  can be integrated in chips such as the Atmel AT32ap7000.
-+
-+config DW_DMAC_BIG_ENDIAN_IO
-+	bool "Use big endian I/O register access"
-+	default y if AVR32
-+	depends on DW_DMAC
-+	help
-+	  Say yes here to use big endian I/O access when reading and writing
-+	  to the DMA controller registers. This is needed on some platforms,
-+	  like the Atmel AVR32 architecture.
-+
-+	  If unsure, use the default setting.
---- /dev/null
-+++ b/drivers/dma/dw/Makefile
-@@ -0,0 +1 @@
-+obj-$(CONFIG_DW_DMAC) += dw_dmac.o
---- /dev/null
-+++ b/drivers/dma/dw/dw_dmac.c
-@@ -0,0 +1,1969 @@
-+/*
-+ * Core driver for the Synopsys DesignWare DMA Controller
-+ *
-+ * Copyright (C) 2007-2008 Atmel Corporation
-+ * Copyright (C) 2010-2011 ST Microelectronics
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+
-+#include <linux/bitops.h>
-+#include <linux/clk.h>
-+#include <linux/delay.h>
-+#include <linux/dmaengine.h>
-+#include <linux/dma-mapping.h>
-+#include <linux/dmapool.h>
-+#include <linux/err.h>
-+#include <linux/init.h>
-+#include <linux/interrupt.h>
-+#include <linux/io.h>
-+#include <linux/of.h>
-+#include <linux/of_dma.h>
-+#include <linux/mm.h>
-+#include <linux/module.h>
-+#include <linux/platform_device.h>
-+#include <linux/slab.h>
-+#include <linux/acpi.h>
-+#include <linux/acpi_dma.h>
-+
-+#include "../dmaengine.h"
-+#include "dw_dmac_regs.h"
-+
-+/*
-+ * This supports the Synopsys "DesignWare AHB Central DMA Controller",
-+ * (DW_ahb_dmac) which is used with various AMBA 2.0 systems (not all
-+ * of which use ARM any more).  See the "Databook" from Synopsys for
-+ * information beyond what licensees probably provide.
-+ *
-+ * The driver has currently been tested only with the Atmel AT32AP7000,
-+ * which does not support descriptor writeback.
-+ */
-+
-+static inline unsigned int dwc_get_dms(struct dw_dma_slave *slave)
-+{
-+	return slave ? slave->dst_master : 0;
-+}
-+
-+static inline unsigned int dwc_get_sms(struct dw_dma_slave *slave)
-+{
-+	return slave ? slave->src_master : 1;
-+}
-+
-+static inline void dwc_set_masters(struct dw_dma_chan *dwc)
-+{
-+	struct dw_dma *dw = to_dw_dma(dwc->chan.device);
-+	struct dw_dma_slave *dws = dwc->chan.private;
-+	unsigned char mmax = dw->nr_masters - 1;
-+
-+	if (dwc->request_line == ~0) {
-+		dwc->src_master = min_t(unsigned char, mmax, dwc_get_sms(dws));
-+		dwc->dst_master = min_t(unsigned char, mmax, dwc_get_dms(dws));
-+	}
-+}
-+
-+#define DWC_DEFAULT_CTLLO(_chan) ({				\
-+		struct dw_dma_chan *_dwc = to_dw_dma_chan(_chan);	\
-+		struct dma_slave_config	*_sconfig = &_dwc->dma_sconfig;	\
-+		bool _is_slave = is_slave_direction(_dwc->direction);	\
-+		u8 _smsize = _is_slave ? _sconfig->src_maxburst :	\
-+			DW_DMA_MSIZE_16;			\
-+		u8 _dmsize = _is_slave ? _sconfig->dst_maxburst :	\
-+			DW_DMA_MSIZE_16;			\
-+								\
-+		(DWC_CTLL_DST_MSIZE(_dmsize)			\
-+		 | DWC_CTLL_SRC_MSIZE(_smsize)			\
-+		 | DWC_CTLL_LLP_D_EN				\
-+		 | DWC_CTLL_LLP_S_EN				\
-+		 | DWC_CTLL_DMS(_dwc->dst_master)		\
-+		 | DWC_CTLL_SMS(_dwc->src_master));		\
-+	})
-+
-+/*
-+ * Number of descriptors to allocate for each channel. This should be
-+ * made configurable somehow; preferably, the clients (at least the
-+ * ones using slave transfers) should be able to give us a hint.
-+ */
-+#define NR_DESCS_PER_CHANNEL	64
-+
-+/*----------------------------------------------------------------------*/
-+
-+static struct device *chan2dev(struct dma_chan *chan)
-+{
-+	return &chan->dev->device;
-+}
-+static struct device *chan2parent(struct dma_chan *chan)
-+{
-+	return chan->dev->device.parent;
-+}
-+
-+static struct dw_desc *dwc_first_active(struct dw_dma_chan *dwc)
-+{
-+	return to_dw_desc(dwc->active_list.next);
-+}
-+
-+static struct dw_desc *dwc_desc_get(struct dw_dma_chan *dwc)
-+{
-+	struct dw_desc *desc, *_desc;
-+	struct dw_desc *ret = NULL;
-+	unsigned int i = 0;
-+	unsigned long flags;
-+
-+	spin_lock_irqsave(&dwc->lock, flags);
-+	list_for_each_entry_safe(desc, _desc, &dwc->free_list, desc_node) {
-+		i++;
-+		if (async_tx_test_ack(&desc->txd)) {
-+			list_del(&desc->desc_node);
-+			ret = desc;
-+			break;
-+		}
-+		dev_dbg(chan2dev(&dwc->chan), "desc %p not ACKed\n", desc);
-+	}
-+	spin_unlock_irqrestore(&dwc->lock, flags);
-+
-+	dev_vdbg(chan2dev(&dwc->chan), "scanned %u descriptors on freelist\n", i);
-+
-+	return ret;
-+}
-+
-+/*
-+ * Move a descriptor, including any children, to the free list.
-+ * `desc' must not be on any lists.
-+ */
-+static void dwc_desc_put(struct dw_dma_chan *dwc, struct dw_desc *desc)
-+{
-+	unsigned long flags;
-+
-+	if (desc) {
-+		struct dw_desc *child;
-+
-+		spin_lock_irqsave(&dwc->lock, flags);
-+		list_for_each_entry(child, &desc->tx_list, desc_node)
-+			dev_vdbg(chan2dev(&dwc->chan),
-+					"moving child desc %p to freelist\n",
-+					child);
-+		list_splice_init(&desc->tx_list, &dwc->free_list);
-+		dev_vdbg(chan2dev(&dwc->chan), "moving desc %p to freelist\n", desc);
-+		list_add(&desc->desc_node, &dwc->free_list);
-+		spin_unlock_irqrestore(&dwc->lock, flags);
-+	}
-+}
-+
-+static void dwc_initialize(struct dw_dma_chan *dwc)
-+{
-+	struct dw_dma *dw = to_dw_dma(dwc->chan.device);
-+	struct dw_dma_slave *dws = dwc->chan.private;
-+	u32 cfghi = DWC_CFGH_FIFO_MODE;
-+	u32 cfglo = DWC_CFGL_CH_PRIOR(dwc->priority);
-+
-+	if (dwc->initialized == true)
-+		return;
-+
-+	if (dws) {
-+		/*
-+		 * We need controller-specific data to set up slave
-+		 * transfers.
-+		 */
-+		BUG_ON(!dws->dma_dev || dws->dma_dev != dw->dma.dev);
-+
-+		cfghi = dws->cfg_hi;
-+		cfglo |= dws->cfg_lo & ~DWC_CFGL_CH_PRIOR_MASK;
-+	} else {
-+		if (dwc->direction == DMA_MEM_TO_DEV)
-+			cfghi = DWC_CFGH_DST_PER(dwc->request_line);
-+		else if (dwc->direction == DMA_DEV_TO_MEM)
-+			cfghi = DWC_CFGH_SRC_PER(dwc->request_line);
-+	}
-+
-+	channel_writel(dwc, CFG_LO, cfglo);
-+	channel_writel(dwc, CFG_HI, cfghi);
-+
-+	/* Enable interrupts */
-+	channel_set_bit(dw, MASK.XFER, dwc->mask);
-+	channel_set_bit(dw, MASK.ERROR, dwc->mask);
-+
-+	dwc->initialized = true;
-+}
-+
-+/*----------------------------------------------------------------------*/
-+
-+static inline unsigned int dwc_fast_fls(unsigned long long v)
-+{
-+	/*
-+	 * We can be a lot more clever here, but this should take care
-+	 * of the most common optimization.
-+	 */
-+	if (!(v & 7))
-+		return 3;
-+	else if (!(v & 3))
-+		return 2;
-+	else if (!(v & 1))
-+		return 1;
-+	return 0;
-+}
-+
-+static inline void dwc_dump_chan_regs(struct dw_dma_chan *dwc)
-+{
-+	dev_err(chan2dev(&dwc->chan),
-+		"  SAR: 0x%x DAR: 0x%x LLP: 0x%x CTL: 0x%x:%08x\n",
-+		channel_readl(dwc, SAR),
-+		channel_readl(dwc, DAR),
-+		channel_readl(dwc, LLP),
-+		channel_readl(dwc, CTL_HI),
-+		channel_readl(dwc, CTL_LO));
-+}
-+
-+static inline void dwc_chan_disable(struct dw_dma *dw, struct dw_dma_chan *dwc)
-+{
-+	channel_clear_bit(dw, CH_EN, dwc->mask);
-+	while (dma_readl(dw, CH_EN) & dwc->mask)
-+		cpu_relax();
-+}
-+
-+/*----------------------------------------------------------------------*/
-+
-+/* Perform single block transfer */
-+static inline void dwc_do_single_block(struct dw_dma_chan *dwc,
-+				       struct dw_desc *desc)
-+{
-+	struct dw_dma	*dw = to_dw_dma(dwc->chan.device);
-+	u32		ctllo;
-+
-+	/* Software emulation of LLP mode relies on interrupts to continue
-+	 * multi block transfer. */
-+	ctllo = desc->lli.ctllo | DWC_CTLL_INT_EN;
-+
-+	channel_writel(dwc, SAR, desc->lli.sar);
-+	channel_writel(dwc, DAR, desc->lli.dar);
-+	channel_writel(dwc, CTL_LO, ctllo);
-+	channel_writel(dwc, CTL_HI, desc->lli.ctlhi);
-+	channel_set_bit(dw, CH_EN, dwc->mask);
-+
-+	/* Move pointer to next descriptor */
-+	dwc->tx_node_active = dwc->tx_node_active->next;
-+}
-+
-+/* Called with dwc->lock held and bh disabled */
-+static void dwc_dostart(struct dw_dma_chan *dwc, struct dw_desc *first)
-+{
-+	struct dw_dma	*dw = to_dw_dma(dwc->chan.device);
-+	unsigned long	was_soft_llp;
-+
-+	/* ASSERT:  channel is idle */
-+	if (dma_readl(dw, CH_EN) & dwc->mask) {
-+		dev_err(chan2dev(&dwc->chan),
-+			"BUG: Attempted to start non-idle channel\n");
-+		dwc_dump_chan_regs(dwc);
-+
-+		/* The tasklet will hopefully advance the queue... */
-+		return;
-+	}
-+
-+	if (dwc->nollp) {
-+		was_soft_llp = test_and_set_bit(DW_DMA_IS_SOFT_LLP,
-+						&dwc->flags);
-+		if (was_soft_llp) {
-+			dev_err(chan2dev(&dwc->chan),
-+				"BUG: Attempted to start new LLP transfer "
-+				"inside ongoing one\n");
-+			return;
-+		}
-+
-+		dwc_initialize(dwc);
-+
-+		dwc->residue = first->total_len;
-+		dwc->tx_node_active = &first->tx_list;
-+
-+		/* Submit first block */
-+		dwc_do_single_block(dwc, first);
-+
-+		return;
-+	}
-+
-+	dwc_initialize(dwc);
-+
-+	channel_writel(dwc, LLP, first->txd.phys);
-+	channel_writel(dwc, CTL_LO,
-+			DWC_CTLL_LLP_D_EN | DWC_CTLL_LLP_S_EN);
-+	channel_writel(dwc, CTL_HI, 0);
-+	channel_set_bit(dw, CH_EN, dwc->mask);
-+}
-+
-+/*----------------------------------------------------------------------*/
-+
-+static void
-+dwc_descriptor_complete(struct dw_dma_chan *dwc, struct dw_desc *desc,
-+		bool callback_required)
-+{
-+	dma_async_tx_callback		callback = NULL;
-+	void				*param = NULL;
-+	struct dma_async_tx_descriptor	*txd = &desc->txd;
-+	struct dw_desc			*child;
-+	unsigned long			flags;
-+
-+	dev_vdbg(chan2dev(&dwc->chan), "descriptor %u complete\n", txd->cookie);
-+
-+	spin_lock_irqsave(&dwc->lock, flags);
-+	dma_cookie_complete(txd);
-+	if (callback_required) {
-+		callback = txd->callback;
-+		param = txd->callback_param;
-+	}
-+
-+	/* async_tx_ack */
-+	list_for_each_entry(child, &desc->tx_list, desc_node)
-+		async_tx_ack(&child->txd);
-+	async_tx_ack(&desc->txd);
-+
-+	list_splice_init(&desc->tx_list, &dwc->free_list);
-+	list_move(&desc->desc_node, &dwc->free_list);
-+
-+	if (!is_slave_direction(dwc->direction)) {
-+		struct device *parent = chan2parent(&dwc->chan);
-+		if (!(txd->flags & DMA_COMPL_SKIP_DEST_UNMAP)) {
-+			if (txd->flags & DMA_COMPL_DEST_UNMAP_SINGLE)
-+				dma_unmap_single(parent, desc->lli.dar,
-+					desc->total_len, DMA_FROM_DEVICE);
-+			else
-+				dma_unmap_page(parent, desc->lli.dar,
-+					desc->total_len, DMA_FROM_DEVICE);
-+		}
-+		if (!(txd->flags & DMA_COMPL_SKIP_SRC_UNMAP)) {
-+			if (txd->flags & DMA_COMPL_SRC_UNMAP_SINGLE)
-+				dma_unmap_single(parent, desc->lli.sar,
-+					desc->total_len, DMA_TO_DEVICE);
-+			else
-+				dma_unmap_page(parent, desc->lli.sar,
-+					desc->total_len, DMA_TO_DEVICE);
-+		}
-+	}
-+
-+	spin_unlock_irqrestore(&dwc->lock, flags);
-+
-+	if (callback)
-+		callback(param);
-+}
-+
-+static void dwc_complete_all(struct dw_dma *dw, struct dw_dma_chan *dwc)
-+{
-+	struct dw_desc *desc, *_desc;
-+	LIST_HEAD(list);
-+	unsigned long flags;
-+
-+	spin_lock_irqsave(&dwc->lock, flags);
-+	if (dma_readl(dw, CH_EN) & dwc->mask) {
-+		dev_err(chan2dev(&dwc->chan),
-+			"BUG: XFER bit set, but channel not idle!\n");
-+
-+		/* Try to continue after resetting the channel... */
-+		dwc_chan_disable(dw, dwc);
-+	}
-+
-+	/*
-+	 * Submit queued descriptors ASAP, i.e. before we go through
-+	 * the completed ones.
-+	 */
-+	list_splice_init(&dwc->active_list, &list);
-+	if (!list_empty(&dwc->queue)) {
-+		list_move(dwc->queue.next, &dwc->active_list);
-+		dwc_dostart(dwc, dwc_first_active(dwc));
-+	}
-+
-+	spin_unlock_irqrestore(&dwc->lock, flags);
-+
-+	list_for_each_entry_safe(desc, _desc, &list, desc_node)
-+		dwc_descriptor_complete(dwc, desc, true);
-+}
-+
-+/* Returns how many bytes were already received from source */
-+static inline u32 dwc_get_sent(struct dw_dma_chan *dwc)
-+{
-+	u32 ctlhi = channel_readl(dwc, CTL_HI);
-+	u32 ctllo = channel_readl(dwc, CTL_LO);
-+
-+	return (ctlhi & DWC_CTLH_BLOCK_TS_MASK) * (1 << (ctllo >> 4 & 7));
-+}
-+
-+static void dwc_scan_descriptors(struct dw_dma *dw, struct dw_dma_chan *dwc)
-+{
-+	dma_addr_t llp;
-+	struct dw_desc *desc, *_desc;
-+	struct dw_desc *child;
-+	u32 status_xfer;
-+	unsigned long flags;
-+
-+	spin_lock_irqsave(&dwc->lock, flags);
-+	llp = channel_readl(dwc, LLP);
-+	status_xfer = dma_readl(dw, RAW.XFER);
-+
-+	if (status_xfer & dwc->mask) {
-+		/* Everything we've submitted is done */
-+		dma_writel(dw, CLEAR.XFER, dwc->mask);
-+
-+		if (test_bit(DW_DMA_IS_SOFT_LLP, &dwc->flags)) {
-+			struct list_head *head, *active = dwc->tx_node_active;
-+
-+			/*
-+			 * We are inside first active descriptor.
-+			 * Otherwise something is really wrong.
-+			 */
-+			desc = dwc_first_active(dwc);
-+
-+			head = &desc->tx_list;
-+			if (active != head) {
-+				/* Update desc to reflect last sent one */
-+				if (active != head->next)
-+					desc = to_dw_desc(active->prev);
-+
-+				dwc->residue -= desc->len;
-+
-+				child = to_dw_desc(active);
-+
-+				/* Submit next block */
-+				dwc_do_single_block(dwc, child);
-+
-+				spin_unlock_irqrestore(&dwc->lock, flags);
-+				return;
-+			}
-+
-+			/* We are done here */
-+			clear_bit(DW_DMA_IS_SOFT_LLP, &dwc->flags);
-+		}
-+
-+		dwc->residue = 0;
-+
-+		spin_unlock_irqrestore(&dwc->lock, flags);
-+
-+		dwc_complete_all(dw, dwc);
-+		return;
-+	}
-+
-+	if (list_empty(&dwc->active_list)) {
-+		dwc->residue = 0;
-+		spin_unlock_irqrestore(&dwc->lock, flags);
-+		return;
-+	}
-+
-+	if (test_bit(DW_DMA_IS_SOFT_LLP, &dwc->flags)) {
-+		dev_vdbg(chan2dev(&dwc->chan), "%s: soft LLP mode\n", __func__);
-+		spin_unlock_irqrestore(&dwc->lock, flags);
-+		return;
-+	}
-+
-+	dev_vdbg(chan2dev(&dwc->chan), "%s: llp=0x%llx\n", __func__,
-+			(unsigned long long)llp);
-+
-+	list_for_each_entry_safe(desc, _desc, &dwc->active_list, desc_node) {
-+		/* Initial residue value */
-+		dwc->residue = desc->total_len;
-+
-+		/* Check first descriptors addr */
-+		if (desc->txd.phys == llp) {
-+			spin_unlock_irqrestore(&dwc->lock, flags);
-+			return;
-+		}
-+
-+		/* Check first descriptors llp */
-+		if (desc->lli.llp == llp) {
-+			/* This one is currently in progress */
-+			dwc->residue -= dwc_get_sent(dwc);
-+			spin_unlock_irqrestore(&dwc->lock, flags);
-+			return;
-+		}
-+
-+		dwc->residue -= desc->len;
-+		list_for_each_entry(child, &desc->tx_list, desc_node) {
-+			if (child->lli.llp == llp) {
-+				/* Currently in progress */
-+				dwc->residue -= dwc_get_sent(dwc);
-+				spin_unlock_irqrestore(&dwc->lock, flags);
-+				return;
-+			}
-+			dwc->residue -= child->len;
-+		}
-+
-+		/*
-+		 * No descriptors so far seem to be in progress, i.e.
-+		 * this one must be done.
-+		 */
-+		spin_unlock_irqrestore(&dwc->lock, flags);
-+		dwc_descriptor_complete(dwc, desc, true);
-+		spin_lock_irqsave(&dwc->lock, flags);
-+	}
-+
-+	dev_err(chan2dev(&dwc->chan),
-+		"BUG: All descriptors done, but channel not idle!\n");
-+
-+	/* Try to continue after resetting the channel... */
-+	dwc_chan_disable(dw, dwc);
-+
-+	if (!list_empty(&dwc->queue)) {
-+		list_move(dwc->queue.next, &dwc->active_list);
-+		dwc_dostart(dwc, dwc_first_active(dwc));
-+	}
-+	spin_unlock_irqrestore(&dwc->lock, flags);
-+}
-+
-+static inline void dwc_dump_lli(struct dw_dma_chan *dwc, struct dw_lli *lli)
-+{
-+	dev_crit(chan2dev(&dwc->chan), "  desc: s0x%x d0x%x l0x%x c0x%x:%x\n",
-+		 lli->sar, lli->dar, lli->llp, lli->ctlhi, lli->ctllo);
-+}
-+
-+static void dwc_handle_error(struct dw_dma *dw, struct dw_dma_chan *dwc)
-+{
-+	struct dw_desc *bad_desc;
-+	struct dw_desc *child;
-+	unsigned long flags;
-+
-+	dwc_scan_descriptors(dw, dwc);
-+
-+	spin_lock_irqsave(&dwc->lock, flags);
-+
-+	/*
-+	 * The descriptor currently at the head of the active list is
-+	 * borked. Since we don't have any way to report errors, we'll
-+	 * just have to scream loudly and try to carry on.
-+	 */
-+	bad_desc = dwc_first_active(dwc);
-+	list_del_init(&bad_desc->desc_node);
-+	list_move(dwc->queue.next, dwc->active_list.prev);
-+
-+	/* Clear the error flag and try to restart the controller */
-+	dma_writel(dw, CLEAR.ERROR, dwc->mask);
-+	if (!list_empty(&dwc->active_list))
-+		dwc_dostart(dwc, dwc_first_active(dwc));
-+
-+	/*
-+	 * WARN may seem harsh, but since this only happens
-+	 * when someone submits a bad physical address in a
-+	 * descriptor, we should consider ourselves lucky that the
-+	 * controller flagged an error instead of scribbling over
-+	 * random memory locations.
-+	 */
-+	dev_WARN(chan2dev(&dwc->chan), "Bad descriptor submitted for DMA!\n"
-+				       "  cookie: %d\n", bad_desc->txd.cookie);
-+	dwc_dump_lli(dwc, &bad_desc->lli);
-+	list_for_each_entry(child, &bad_desc->tx_list, desc_node)
-+		dwc_dump_lli(dwc, &child->lli);
-+
-+	spin_unlock_irqrestore(&dwc->lock, flags);
-+
-+	/* Pretend the descriptor completed successfully */
-+	dwc_descriptor_complete(dwc, bad_desc, true);
-+}
-+
-+/* --------------------- Cyclic DMA API extensions -------------------- */
-+
-+dma_addr_t dw_dma_get_src_addr(struct dma_chan *chan)
-+{
-+	struct dw_dma_chan *dwc = to_dw_dma_chan(chan);
-+	return channel_readl(dwc, SAR);
-+}
-+EXPORT_SYMBOL(dw_dma_get_src_addr);
-+
-+dma_addr_t dw_dma_get_dst_addr(struct dma_chan *chan)
-+{
-+	struct dw_dma_chan *dwc = to_dw_dma_chan(chan);
-+	return channel_readl(dwc, DAR);
-+}
-+EXPORT_SYMBOL(dw_dma_get_dst_addr);
-+
-+/* Called with dwc->lock held and all DMAC interrupts disabled */
-+static void dwc_handle_cyclic(struct dw_dma *dw, struct dw_dma_chan *dwc,
-+		u32 status_err, u32 status_xfer)
-+{
-+	unsigned long flags;
-+
-+	if (dwc->mask) {
-+		void (*callback)(void *param);
-+		void *callback_param;
-+
-+		dev_vdbg(chan2dev(&dwc->chan), "new cyclic period llp 0x%08x\n",
-+				channel_readl(dwc, LLP));
-+
-+		callback = dwc->cdesc->period_callback;
-+		callback_param = dwc->cdesc->period_callback_param;
-+
-+		if (callback)
-+			callback(callback_param);
-+	}
-+
-+	/*
-+	 * Error and transfer complete are highly unlikely, and will most
-+	 * likely be due to a configuration error by the user.
-+	 */
-+	if (unlikely(status_err & dwc->mask) ||
-+			unlikely(status_xfer & dwc->mask)) {
-+		int i;
-+
-+		dev_err(chan2dev(&dwc->chan), "cyclic DMA unexpected %s "
-+				"interrupt, stopping DMA transfer\n",
-+				status_xfer ? "xfer" : "error");
-+
-+		spin_lock_irqsave(&dwc->lock, flags);
-+
-+		dwc_dump_chan_regs(dwc);
-+
-+		dwc_chan_disable(dw, dwc);
-+
-+		/* Make sure DMA does not restart by loading a new list */
-+		channel_writel(dwc, LLP, 0);
-+		channel_writel(dwc, CTL_LO, 0);
-+		channel_writel(dwc, CTL_HI, 0);
-+
-+		dma_writel(dw, CLEAR.ERROR, dwc->mask);
-+		dma_writel(dw, CLEAR.XFER, dwc->mask);
-+
-+		for (i = 0; i < dwc->cdesc->periods; i++)
-+			dwc_dump_lli(dwc, &dwc->cdesc->desc[i]->lli);
-+
-+		spin_unlock_irqrestore(&dwc->lock, flags);
-+	}
-+}
-+
-+/* ------------------------------------------------------------------------- */
-+
-+static void dw_dma_tasklet(unsigned long data)
-+{
-+	struct dw_dma *dw = (struct dw_dma *)data;
-+	struct dw_dma_chan *dwc;
-+	u32 status_xfer;
-+	u32 status_err;
-+	int i;
-+
-+	status_xfer = dma_readl(dw, RAW.XFER);
-+	status_err = dma_readl(dw, RAW.ERROR);
-+
-+	dev_vdbg(dw->dma.dev, "%s: status_err=%x\n", __func__, status_err);
-+
-+	for (i = 0; i < dw->dma.chancnt; i++) {
-+		dwc = &dw->chan[i];
-+		if (test_bit(DW_DMA_IS_CYCLIC, &dwc->flags))
-+			dwc_handle_cyclic(dw, dwc, status_err, status_xfer);
-+		else if (status_err & (1 << i))
-+			dwc_handle_error(dw, dwc);
-+		else if (status_xfer & (1 << i))
-+			dwc_scan_descriptors(dw, dwc);
-+	}
-+
-+	/*
-+	 * Re-enable interrupts.
-+	 */
-+	channel_set_bit(dw, MASK.XFER, dw->all_chan_mask);
-+	channel_set_bit(dw, MASK.ERROR, dw->all_chan_mask);
-+}
-+
-+static irqreturn_t dw_dma_interrupt(int irq, void *dev_id)
-+{
-+	struct dw_dma *dw = dev_id;
-+	u32 status;
-+
-+	dev_vdbg(dw->dma.dev, "%s: status=0x%x\n", __func__,
-+			dma_readl(dw, STATUS_INT));
-+
-+	/*
-+	 * Just disable the interrupts. We'll turn them back on in the
-+	 * softirq handler.
-+	 */
-+	channel_clear_bit(dw, MASK.XFER, dw->all_chan_mask);
-+	channel_clear_bit(dw, MASK.ERROR, dw->all_chan_mask);
-+
-+	status = dma_readl(dw, STATUS_INT);
-+	if (status) {
-+		dev_err(dw->dma.dev,
-+			"BUG: Unexpected interrupts pending: 0x%x\n",
-+			status);
-+
-+		/* Try to recover */
-+		channel_clear_bit(dw, MASK.XFER, (1 << 8) - 1);
-+		channel_clear_bit(dw, MASK.SRC_TRAN, (1 << 8) - 1);
-+		channel_clear_bit(dw, MASK.DST_TRAN, (1 << 8) - 1);
-+		channel_clear_bit(dw, MASK.ERROR, (1 << 8) - 1);
-+	}
-+
-+	tasklet_schedule(&dw->tasklet);
-+
-+	return IRQ_HANDLED;
-+}
-+
-+/*----------------------------------------------------------------------*/
-+
-+static dma_cookie_t dwc_tx_submit(struct dma_async_tx_descriptor *tx)
-+{
-+	struct dw_desc		*desc = txd_to_dw_desc(tx);
-+	struct dw_dma_chan	*dwc = to_dw_dma_chan(tx->chan);
-+	dma_cookie_t		cookie;
-+	unsigned long		flags;
-+
-+	spin_lock_irqsave(&dwc->lock, flags);
-+	cookie = dma_cookie_assign(tx);
-+
-+	/*
-+	 * REVISIT: We should attempt to chain as many descriptors as
-+	 * possible, perhaps even appending to those already submitted
-+	 * for DMA. But this is hard to do in a race-free manner.
-+	 */
-+	if (list_empty(&dwc->active_list)) {
-+		dev_vdbg(chan2dev(tx->chan), "%s: started %u\n", __func__,
-+				desc->txd.cookie);
-+		list_add_tail(&desc->desc_node, &dwc->active_list);
-+		dwc_dostart(dwc, dwc_first_active(dwc));
-+	} else {
-+		dev_vdbg(chan2dev(tx->chan), "%s: queued %u\n", __func__,
-+				desc->txd.cookie);
-+
-+		list_add_tail(&desc->desc_node, &dwc->queue);
-+	}
-+
-+	spin_unlock_irqrestore(&dwc->lock, flags);
-+
-+	return cookie;
-+}
-+
-+static struct dma_async_tx_descriptor *
-+dwc_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dest, dma_addr_t src,
-+		size_t len, unsigned long flags)
-+{
-+	struct dw_dma_chan	*dwc = to_dw_dma_chan(chan);
-+	struct dw_dma		*dw = to_dw_dma(chan->device);
-+	struct dw_desc		*desc;
-+	struct dw_desc		*first;
-+	struct dw_desc		*prev;
-+	size_t			xfer_count;
-+	size_t			offset;
-+	unsigned int		src_width;
-+	unsigned int		dst_width;
-+	unsigned int		data_width;
-+	u32			ctllo;
-+
-+	dev_vdbg(chan2dev(chan),
-+			"%s: d0x%llx s0x%llx l0x%zx f0x%lx\n", __func__,
-+			(unsigned long long)dest, (unsigned long long)src,
-+			len, flags);
-+
-+	if (unlikely(!len)) {
-+		dev_dbg(chan2dev(chan), "%s: length is zero!\n", __func__);
-+		return NULL;
-+	}
-+
-+	dwc->direction = DMA_MEM_TO_MEM;
-+
-+	data_width = min_t(unsigned int, dw->data_width[dwc->src_master],
-+			   dw->data_width[dwc->dst_master]);
-+
-+	src_width = dst_width = min_t(unsigned int, data_width,
-+				      dwc_fast_fls(src | dest | len));
-+
-+	ctllo = DWC_DEFAULT_CTLLO(chan)
-+			| DWC_CTLL_DST_WIDTH(dst_width)
-+			| DWC_CTLL_SRC_WIDTH(src_width)
-+			| DWC_CTLL_DST_INC
-+			| DWC_CTLL_SRC_INC
-+			| DWC_CTLL_FC_M2M;
-+	prev = first = NULL;
-+
-+	for (offset = 0; offset < len; offset += xfer_count << src_width) {
-+		xfer_count = min_t(size_t, (len - offset) >> src_width,
-+					   dwc->block_size);
-+
-+		desc = dwc_desc_get(dwc);
-+		if (!desc)
-+			goto err_desc_get;
-+
-+		desc->lli.sar = src + offset;
-+		desc->lli.dar = dest + offset;
-+		desc->lli.ctllo = ctllo;
-+		desc->lli.ctlhi = xfer_count;
-+		desc->len = xfer_count << src_width;
-+
-+		if (!first) {
-+			first = desc;
-+		} else {
-+			prev->lli.llp = desc->txd.phys;
-+			list_add_tail(&desc->desc_node,
-+					&first->tx_list);
-+		}
-+		prev = desc;
-+	}
-+
-+	if (flags & DMA_PREP_INTERRUPT)
-+		/* Trigger interrupt after last block */
-+		prev->lli.ctllo |= DWC_CTLL_INT_EN;
-+
-+	prev->lli.llp = 0;
-+	first->txd.flags = flags;
-+	first->total_len = len;
-+
-+	return &first->txd;
-+
-+err_desc_get:
-+	dwc_desc_put(dwc, first);
-+	return NULL;
-+}
-+
-+static struct dma_async_tx_descriptor *
-+dwc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
-+		unsigned int sg_len, enum dma_transfer_direction direction,
-+		unsigned long flags, void *context)
-+{
-+	struct dw_dma_chan	*dwc = to_dw_dma_chan(chan);
-+	struct dw_dma		*dw = to_dw_dma(chan->device);
-+	struct dma_slave_config	*sconfig = &dwc->dma_sconfig;
-+	struct dw_desc		*prev;
-+	struct dw_desc		*first;
-+	u32			ctllo;
-+	dma_addr_t		reg;
-+	unsigned int		reg_width;
-+	unsigned int		mem_width;
-+	unsigned int		data_width;
-+	unsigned int		i;
-+	struct scatterlist	*sg;
-+	size_t			total_len = 0;
-+
-+	dev_vdbg(chan2dev(chan), "%s\n", __func__);
-+
-+	if (unlikely(!is_slave_direction(direction) || !sg_len))
-+		return NULL;
-+
-+	dwc->direction = direction;
-+
-+	prev = first = NULL;
-+
-+	switch (direction) {
-+	case DMA_MEM_TO_DEV:
-+		reg_width = __fls(sconfig->dst_addr_width);
-+		reg = sconfig->dst_addr;
-+		ctllo = (DWC_DEFAULT_CTLLO(chan)
-+				| DWC_CTLL_DST_WIDTH(reg_width)
-+				| DWC_CTLL_DST_FIX
-+				| DWC_CTLL_SRC_INC);
-+
-+		ctllo |= sconfig->device_fc ? DWC_CTLL_FC(DW_DMA_FC_P_M2P) :
-+			DWC_CTLL_FC(DW_DMA_FC_D_M2P);
-+
-+		data_width = dw->data_width[dwc->src_master];
-+
-+		for_each_sg(sgl, sg, sg_len, i) {
-+			struct dw_desc	*desc;
-+			u32		len, dlen, mem;
-+
-+			mem = sg_dma_address(sg);
-+			len = sg_dma_len(sg);
-+
-+			mem_width = min_t(unsigned int,
-+					  data_width, dwc_fast_fls(mem | len));
-+
-+slave_sg_todev_fill_desc:
-+			desc = dwc_desc_get(dwc);
-+			if (!desc) {
-+				dev_err(chan2dev(chan),
-+					"not enough descriptors available\n");
-+				goto err_desc_get;
-+			}
-+
-+			desc->lli.sar = mem;
-+			desc->lli.dar = reg;
-+			desc->lli.ctllo = ctllo | DWC_CTLL_SRC_WIDTH(mem_width);
-+			if ((len >> mem_width) > dwc->block_size) {
-+				dlen = dwc->block_size << mem_width;
-+				mem += dlen;
-+				len -= dlen;
-+			} else {
-+				dlen = len;
-+				len = 0;
-+			}
-+
-+			desc->lli.ctlhi = dlen >> mem_width;
-+			desc->len = dlen;
-+
-+			if (!first) {
-+				first = desc;
-+			} else {
-+				prev->lli.llp = desc->txd.phys;
-+				list_add_tail(&desc->desc_node,
-+						&first->tx_list);
-+			}
-+			prev = desc;
-+			total_len += dlen;
-+
-+			if (len)
-+				goto slave_sg_todev_fill_desc;
-+		}
-+		break;
-+	case DMA_DEV_TO_MEM:
-+		reg_width = __fls(sconfig->src_addr_width);
-+		reg = sconfig->src_addr;
-+		ctllo = (DWC_DEFAULT_CTLLO(chan)
-+				| DWC_CTLL_SRC_WIDTH(reg_width)
-+				| DWC_CTLL_DST_INC
-+				| DWC_CTLL_SRC_FIX);
-+
-+		ctllo |= sconfig->device_fc ? DWC_CTLL_FC(DW_DMA_FC_P_P2M) :
-+			DWC_CTLL_FC(DW_DMA_FC_D_P2M);
-+
-+		data_width = dw->data_width[dwc->dst_master];
-+
-+		for_each_sg(sgl, sg, sg_len, i) {
-+			struct dw_desc	*desc;
-+			u32		len, dlen, mem;
-+
-+			mem = sg_dma_address(sg);
-+			len = sg_dma_len(sg);
-+
-+			mem_width = min_t(unsigned int,
-+					  data_width, dwc_fast_fls(mem | len));
-+
-+slave_sg_fromdev_fill_desc:
-+			desc = dwc_desc_get(dwc);
-+			if (!desc) {
-+				dev_err(chan2dev(chan),
-+						"not enough descriptors available\n");
-+				goto err_desc_get;
-+			}
-+
-+			desc->lli.sar = reg;
-+			desc->lli.dar = mem;
-+			desc->lli.ctllo = ctllo | DWC_CTLL_DST_WIDTH(mem_width);
-+			if ((len >> reg_width) > dwc->block_size) {
-+				dlen = dwc->block_size << reg_width;
-+				mem += dlen;
-+				len -= dlen;
-+			} else {
-+				dlen = len;
-+				len = 0;
-+			}
-+			desc->lli.ctlhi = dlen >> reg_width;
-+			desc->len = dlen;
-+
-+			if (!first) {
-+				first = desc;
-+			} else {
-+				prev->lli.llp = desc->txd.phys;
-+				list_add_tail(&desc->desc_node,
-+						&first->tx_list);
-+			}
-+			prev = desc;
-+			total_len += dlen;
-+
-+			if (len)
-+				goto slave_sg_fromdev_fill_desc;
-+		}
-+		break;
-+	default:
-+		return NULL;
-+	}
-+
-+	if (flags & DMA_PREP_INTERRUPT)
-+		/* Trigger interrupt after last block */
-+		prev->lli.ctllo |= DWC_CTLL_INT_EN;
-+
-+	prev->lli.llp = 0;
-+	first->total_len = total_len;
-+
-+	return &first->txd;
-+
-+err_desc_get:
-+	dwc_desc_put(dwc, first);
-+	return NULL;
-+}
-+
-+/*
-+ * Fix sconfig's burst size according to dw_dmac. We need to convert them as:
-+ * 1 -> 0, 4 -> 1, 8 -> 2, 16 -> 3.
-+ *
-+ * NOTE: burst size 2 is not supported by controller.
-+ *
-+ * This can be done by finding least significant bit set: n & (n - 1)
-+ */
-+static inline void convert_burst(u32 *maxburst)
-+{
-+	if (*maxburst > 1)
-+		*maxburst = fls(*maxburst) - 2;
-+	else
-+		*maxburst = 0;
-+}
-+
-+static int
-+set_runtime_config(struct dma_chan *chan, struct dma_slave_config *sconfig)
-+{
-+	struct dw_dma_chan *dwc = to_dw_dma_chan(chan);
-+
-+	/* Check if chan will be configured for slave transfers */
-+	if (!is_slave_direction(sconfig->direction))
-+		return -EINVAL;
-+
-+	memcpy(&dwc->dma_sconfig, sconfig, sizeof(*sconfig));
-+	dwc->direction = sconfig->direction;
-+
-+	/* Take the request line from slave_id member */
-+	if (dwc->request_line == ~0)
-+		dwc->request_line = sconfig->slave_id;
-+
-+	convert_burst(&dwc->dma_sconfig.src_maxburst);
-+	convert_burst(&dwc->dma_sconfig.dst_maxburst);
-+
-+	return 0;
-+}
-+
-+static inline void dwc_chan_pause(struct dw_dma_chan *dwc)
-+{
-+	u32 cfglo = channel_readl(dwc, CFG_LO);
-+	unsigned int count = 20;	/* timeout iterations */
-+
-+	channel_writel(dwc, CFG_LO, cfglo | DWC_CFGL_CH_SUSP);
-+	while (!(channel_readl(dwc, CFG_LO) & DWC_CFGL_FIFO_EMPTY) && count--)
-+		udelay(2);
-+
-+	dwc->paused = true;
-+}
-+
-+static inline void dwc_chan_resume(struct dw_dma_chan *dwc)
-+{
-+	u32 cfglo = channel_readl(dwc, CFG_LO);
-+
-+	channel_writel(dwc, CFG_LO, cfglo & ~DWC_CFGL_CH_SUSP);
-+
-+	dwc->paused = false;
-+}
-+
-+static int dwc_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
-+		       unsigned long arg)
-+{
-+	struct dw_dma_chan	*dwc = to_dw_dma_chan(chan);
-+	struct dw_dma		*dw = to_dw_dma(chan->device);
-+	struct dw_desc		*desc, *_desc;
-+	unsigned long		flags;
-+	LIST_HEAD(list);
-+
-+	if (cmd == DMA_PAUSE) {
-+		spin_lock_irqsave(&dwc->lock, flags);
-+
-+		dwc_chan_pause(dwc);
-+
-+		spin_unlock_irqrestore(&dwc->lock, flags);
-+	} else if (cmd == DMA_RESUME) {
-+		if (!dwc->paused)
-+			return 0;
-+
-+		spin_lock_irqsave(&dwc->lock, flags);
-+
-+		dwc_chan_resume(dwc);
-+
-+		spin_unlock_irqrestore(&dwc->lock, flags);
-+	} else if (cmd == DMA_TERMINATE_ALL) {
-+		spin_lock_irqsave(&dwc->lock, flags);
-+
-+		clear_bit(DW_DMA_IS_SOFT_LLP, &dwc->flags);
-+
-+		dwc_chan_disable(dw, dwc);
-+
-+		dwc_chan_resume(dwc);
-+
-+		/* active_list entries will end up before queued entries */
-+		list_splice_init(&dwc->queue, &list);
-+		list_splice_init(&dwc->active_list, &list);
-+
-+		spin_unlock_irqrestore(&dwc->lock, flags);
-+
-+		/* Flush all pending and queued descriptors */
-+		list_for_each_entry_safe(desc, _desc, &list, desc_node)
-+			dwc_descriptor_complete(dwc, desc, false);
-+	} else if (cmd == DMA_SLAVE_CONFIG) {
-+		return set_runtime_config(chan, (struct dma_slave_config *)arg);
-+	} else {
-+		return -ENXIO;
-+	}
-+
-+	return 0;
-+}
-+
-+static inline u32 dwc_get_residue(struct dw_dma_chan *dwc)
-+{
-+	unsigned long flags;
-+	u32 residue;
-+
-+	spin_lock_irqsave(&dwc->lock, flags);
-+
-+	residue = dwc->residue;
-+	if (test_bit(DW_DMA_IS_SOFT_LLP, &dwc->flags) && residue)
-+		residue -= dwc_get_sent(dwc);
-+
-+	spin_unlock_irqrestore(&dwc->lock, flags);
-+	return residue;
-+}
-+
-+static enum dma_status
-+dwc_tx_status(struct dma_chan *chan,
-+	      dma_cookie_t cookie,
-+	      struct dma_tx_state *txstate)
-+{
-+	struct dw_dma_chan	*dwc = to_dw_dma_chan(chan);
-+	enum dma_status		ret;
-+
-+	ret = dma_cookie_status(chan, cookie, txstate);
-+	if (ret != DMA_SUCCESS) {
-+		dwc_scan_descriptors(to_dw_dma(chan->device), dwc);
-+
-+		ret = dma_cookie_status(chan, cookie, txstate);
-+	}
-+
-+	if (ret != DMA_SUCCESS)
-+		dma_set_residue(txstate, dwc_get_residue(dwc));
-+
-+	if (dwc->paused)
-+		return DMA_PAUSED;
-+
-+	return ret;
-+}
-+
-+static void dwc_issue_pending(struct dma_chan *chan)
-+{
-+	struct dw_dma_chan	*dwc = to_dw_dma_chan(chan);
-+
-+	if (!list_empty(&dwc->queue))
-+		dwc_scan_descriptors(to_dw_dma(chan->device), dwc);
-+}
-+
-+static int dwc_alloc_chan_resources(struct dma_chan *chan)
-+{
-+	struct dw_dma_chan	*dwc = to_dw_dma_chan(chan);
-+	struct dw_dma		*dw = to_dw_dma(chan->device);
-+	struct dw_desc		*desc;
-+	int			i;
-+	unsigned long		flags;
-+
-+	dev_vdbg(chan2dev(chan), "%s\n", __func__);
-+
-+	/* ASSERT:  channel is idle */
-+	if (dma_readl(dw, CH_EN) & dwc->mask) {
-+		dev_dbg(chan2dev(chan), "DMA channel not idle?\n");
-+		return -EIO;
-+	}
-+
-+	dma_cookie_init(chan);
-+
-+	/*
-+	 * NOTE: some controllers may have additional features that we
-+	 * need to initialize here, like "scatter-gather" (which
-+	 * doesn't mean what you think it means), and status writeback.
-+	 */
-+
-+	dwc_set_masters(dwc);
-+
-+	spin_lock_irqsave(&dwc->lock, flags);
-+	i = dwc->descs_allocated;
-+	while (dwc->descs_allocated < NR_DESCS_PER_CHANNEL) {
-+		dma_addr_t phys;
-+
-+		spin_unlock_irqrestore(&dwc->lock, flags);
-+
-+		desc = dma_pool_alloc(dw->desc_pool, GFP_ATOMIC, &phys);
-+		if (!desc)
-+			goto err_desc_alloc;
-+
-+		memset(desc, 0, sizeof(struct dw_desc));
-+
-+		INIT_LIST_HEAD(&desc->tx_list);
-+		dma_async_tx_descriptor_init(&desc->txd, chan);
-+		desc->txd.tx_submit = dwc_tx_submit;
-+		desc->txd.flags = DMA_CTRL_ACK;
-+		desc->txd.phys = phys;
-+
-+		dwc_desc_put(dwc, desc);
-+
-+		spin_lock_irqsave(&dwc->lock, flags);
-+		i = ++dwc->descs_allocated;
-+	}
-+
-+	spin_unlock_irqrestore(&dwc->lock, flags);
-+
-+	dev_dbg(chan2dev(chan), "%s: allocated %d descriptors\n", __func__, i);
-+
-+	return i;
-+
-+err_desc_alloc:
-+	dev_info(chan2dev(chan), "only allocated %d descriptors\n", i);
-+
-+	return i;
-+}
-+
-+static void dwc_free_chan_resources(struct dma_chan *chan)
-+{
-+	struct dw_dma_chan	*dwc = to_dw_dma_chan(chan);
-+	struct dw_dma		*dw = to_dw_dma(chan->device);
-+	struct dw_desc		*desc, *_desc;
-+	unsigned long		flags;
-+	LIST_HEAD(list);
-+
-+	dev_dbg(chan2dev(chan), "%s: descs allocated=%u\n", __func__,
-+			dwc->descs_allocated);
-+
-+	/* ASSERT:  channel is idle */
-+	BUG_ON(!list_empty(&dwc->active_list));
-+	BUG_ON(!list_empty(&dwc->queue));
-+	BUG_ON(dma_readl(to_dw_dma(chan->device), CH_EN) & dwc->mask);
-+
-+	spin_lock_irqsave(&dwc->lock, flags);
-+	list_splice_init(&dwc->free_list, &list);
-+	dwc->descs_allocated = 0;
-+	dwc->initialized = false;
-+	dwc->request_line = ~0;
-+
-+	/* Disable interrupts */
-+	channel_clear_bit(dw, MASK.XFER, dwc->mask);
-+	channel_clear_bit(dw, MASK.ERROR, dwc->mask);
-+
-+	spin_unlock_irqrestore(&dwc->lock, flags);
-+
-+	list_for_each_entry_safe(desc, _desc, &list, desc_node) {
-+		dev_vdbg(chan2dev(chan), "  freeing descriptor %p\n", desc);
-+		dma_pool_free(dw->desc_pool, desc, desc->txd.phys);
-+	}
-+
-+	dev_vdbg(chan2dev(chan), "%s: done\n", __func__);
-+}
-+
-+/*----------------------------------------------------------------------*/
-+
-+struct dw_dma_of_filter_args {
-+	struct dw_dma *dw;
-+	unsigned int req;
-+	unsigned int src;
-+	unsigned int dst;
-+};
-+
-+static bool dw_dma_of_filter(struct dma_chan *chan, void *param)
-+{
-+	struct dw_dma_chan *dwc = to_dw_dma_chan(chan);
-+	struct dw_dma_of_filter_args *fargs = param;
-+
-+	/* Ensure the device matches our channel */
-+        if (chan->device != &fargs->dw->dma)
-+                return false;
-+
-+	dwc->request_line = fargs->req;
-+	dwc->src_master	= fargs->src;
-+	dwc->dst_master	= fargs->dst;
-+
-+	return true;
-+}
-+
-+static struct dma_chan *dw_dma_of_xlate(struct of_phandle_args *dma_spec,
-+					struct of_dma *ofdma)
-+{
-+	struct dw_dma *dw = ofdma->of_dma_data;
-+	struct dw_dma_of_filter_args fargs = {
-+		.dw = dw,
-+	};
-+	dma_cap_mask_t cap;
-+
-+	if (dma_spec->args_count != 3)
-+		return NULL;
-+
-+	fargs.req = dma_spec->args[0];
-+	fargs.src = dma_spec->args[1];
-+	fargs.dst = dma_spec->args[2];
-+
-+	if (WARN_ON(fargs.req >= DW_DMA_MAX_NR_REQUESTS ||
-+		    fargs.src >= dw->nr_masters ||
-+		    fargs.dst >= dw->nr_masters))
-+		return NULL;
-+
-+	dma_cap_zero(cap);
-+	dma_cap_set(DMA_SLAVE, cap);
-+
-+	/* TODO: there should be a simpler way to do this */
-+	return dma_request_channel(cap, dw_dma_of_filter, &fargs);
-+}
-+
-+#ifdef CONFIG_ACPI
-+static bool dw_dma_acpi_filter(struct dma_chan *chan, void *param)
-+{
-+	struct dw_dma_chan *dwc = to_dw_dma_chan(chan);
-+	struct acpi_dma_spec *dma_spec = param;
-+
-+	if (chan->device->dev != dma_spec->dev ||
-+	    chan->chan_id != dma_spec->chan_id)
-+		return false;
-+
-+	dwc->request_line = dma_spec->slave_id;
-+	dwc->src_master = dwc_get_sms(NULL);
-+	dwc->dst_master = dwc_get_dms(NULL);
-+
-+	return true;
-+}
-+
-+static void dw_dma_acpi_controller_register(struct dw_dma *dw)
-+{
-+	struct device *dev = dw->dma.dev;
-+	struct acpi_dma_filter_info *info;
-+	int ret;
-+
-+	info = devm_kzalloc(dev, sizeof(*info), GFP_KERNEL);
-+	if (!info)
-+		return;
-+
-+	dma_cap_zero(info->dma_cap);
-+	dma_cap_set(DMA_SLAVE, info->dma_cap);
-+	info->filter_fn = dw_dma_acpi_filter;
-+
-+	ret = devm_acpi_dma_controller_register(dev, acpi_dma_simple_xlate,
-+						info);
-+	if (ret)
-+		dev_err(dev, "could not register acpi_dma_controller\n");
-+}
-+#else /* !CONFIG_ACPI */
-+static inline void dw_dma_acpi_controller_register(struct dw_dma *dw) {}
-+#endif /* !CONFIG_ACPI */
-+
-+/* --------------------- Cyclic DMA API extensions -------------------- */
-+
-+/**
-+ * dw_dma_cyclic_start - start the cyclic DMA transfer
-+ * @chan: the DMA channel to start
-+ *
-+ * Must be called with soft interrupts disabled. Returns zero on success or
-+ * -errno on failure.
-+ */
-+int dw_dma_cyclic_start(struct dma_chan *chan)
-+{
-+	struct dw_dma_chan	*dwc = to_dw_dma_chan(chan);
-+	struct dw_dma		*dw = to_dw_dma(dwc->chan.device);
-+	unsigned long		flags;
-+
-+	if (!test_bit(DW_DMA_IS_CYCLIC, &dwc->flags)) {
-+		dev_err(chan2dev(&dwc->chan), "missing prep for cyclic DMA\n");
-+		return -ENODEV;
-+	}
-+
-+	spin_lock_irqsave(&dwc->lock, flags);
-+
-+	/* Assert channel is idle */
-+	if (dma_readl(dw, CH_EN) & dwc->mask) {
-+		dev_err(chan2dev(&dwc->chan),
-+			"BUG: Attempted to start non-idle channel\n");
-+		dwc_dump_chan_regs(dwc);
-+		spin_unlock_irqrestore(&dwc->lock, flags);
-+		return -EBUSY;
-+	}
-+
-+	dma_writel(dw, CLEAR.ERROR, dwc->mask);
-+	dma_writel(dw, CLEAR.XFER, dwc->mask);
-+
-+	/* Setup DMAC channel registers */
-+	channel_writel(dwc, LLP, dwc->cdesc->desc[0]->txd.phys);
-+	channel_writel(dwc, CTL_LO, DWC_CTLL_LLP_D_EN | DWC_CTLL_LLP_S_EN);
-+	channel_writel(dwc, CTL_HI, 0);
-+
-+	channel_set_bit(dw, CH_EN, dwc->mask);
-+
-+	spin_unlock_irqrestore(&dwc->lock, flags);
-+
-+	return 0;
-+}
-+EXPORT_SYMBOL(dw_dma_cyclic_start);
-+
-+/**
-+ * dw_dma_cyclic_stop - stop the cyclic DMA transfer
-+ * @chan: the DMA channel to stop
-+ *
-+ * Must be called with soft interrupts disabled.
-+ */
-+void dw_dma_cyclic_stop(struct dma_chan *chan)
-+{
-+	struct dw_dma_chan	*dwc = to_dw_dma_chan(chan);
-+	struct dw_dma		*dw = to_dw_dma(dwc->chan.device);
-+	unsigned long		flags;
-+
-+	spin_lock_irqsave(&dwc->lock, flags);
-+
-+	dwc_chan_disable(dw, dwc);
-+
-+	spin_unlock_irqrestore(&dwc->lock, flags);
-+}
-+EXPORT_SYMBOL(dw_dma_cyclic_stop);
-+
-+/**
-+ * dw_dma_cyclic_prep - prepare the cyclic DMA transfer
-+ * @chan: the DMA channel to prepare
-+ * @buf_addr: physical DMA address where the buffer starts
-+ * @buf_len: total number of bytes for the entire buffer
-+ * @period_len: number of bytes for each period
-+ * @direction: transfer direction, to or from device
-+ *
-+ * Must be called before trying to start the transfer. Returns a valid struct
-+ * dw_cyclic_desc if successful or an ERR_PTR(-errno) if not successful.
-+ */
-+struct dw_cyclic_desc *dw_dma_cyclic_prep(struct dma_chan *chan,
-+		dma_addr_t buf_addr, size_t buf_len, size_t period_len,
-+		enum dma_transfer_direction direction)
-+{
-+	struct dw_dma_chan		*dwc = to_dw_dma_chan(chan);
-+	struct dma_slave_config		*sconfig = &dwc->dma_sconfig;
-+	struct dw_cyclic_desc		*cdesc;
-+	struct dw_cyclic_desc		*retval = NULL;
-+	struct dw_desc			*desc;
-+	struct dw_desc			*last = NULL;
-+	unsigned long			was_cyclic;
-+	unsigned int			reg_width;
-+	unsigned int			periods;
-+	unsigned int			i;
-+	unsigned long			flags;
-+
-+	spin_lock_irqsave(&dwc->lock, flags);
-+	if (dwc->nollp) {
-+		spin_unlock_irqrestore(&dwc->lock, flags);
-+		dev_dbg(chan2dev(&dwc->chan),
-+				"channel doesn't support LLP transfers\n");
-+		return ERR_PTR(-EINVAL);
-+	}
-+
-+	if (!list_empty(&dwc->queue) || !list_empty(&dwc->active_list)) {
-+		spin_unlock_irqrestore(&dwc->lock, flags);
-+		dev_dbg(chan2dev(&dwc->chan),
-+				"queue and/or active list are not empty\n");
-+		return ERR_PTR(-EBUSY);
-+	}
-+
-+	was_cyclic = test_and_set_bit(DW_DMA_IS_CYCLIC, &dwc->flags);
-+	spin_unlock_irqrestore(&dwc->lock, flags);
-+	if (was_cyclic) {
-+		dev_dbg(chan2dev(&dwc->chan),
-+				"channel already prepared for cyclic DMA\n");
-+		return ERR_PTR(-EBUSY);
-+	}
-+
-+	retval = ERR_PTR(-EINVAL);
-+
-+	if (unlikely(!is_slave_direction(direction)))
-+		goto out_err;
-+
-+	dwc->direction = direction;
-+
-+	if (direction == DMA_MEM_TO_DEV)
-+		reg_width = __ffs(sconfig->dst_addr_width);
-+	else
-+		reg_width = __ffs(sconfig->src_addr_width);
-+
-+	periods = buf_len / period_len;
-+
-+	/* Check for too big/unaligned periods and unaligned DMA buffer. */
-+	if (period_len > (dwc->block_size << reg_width))
-+		goto out_err;
-+	if (unlikely(period_len & ((1 << reg_width) - 1)))
-+		goto out_err;
-+	if (unlikely(buf_addr & ((1 << reg_width) - 1)))
-+		goto out_err;
-+
-+	retval = ERR_PTR(-ENOMEM);
-+
-+	if (periods > NR_DESCS_PER_CHANNEL)
-+		goto out_err;
-+
-+	cdesc = kzalloc(sizeof(struct dw_cyclic_desc), GFP_KERNEL);
-+	if (!cdesc)
-+		goto out_err;
-+
-+	cdesc->desc = kzalloc(sizeof(struct dw_desc *) * periods, GFP_KERNEL);
-+	if (!cdesc->desc)
-+		goto out_err_alloc;
-+
-+	for (i = 0; i < periods; i++) {
-+		desc = dwc_desc_get(dwc);
-+		if (!desc)
-+			goto out_err_desc_get;
-+
-+		switch (direction) {
-+		case DMA_MEM_TO_DEV:
-+			desc->lli.dar = sconfig->dst_addr;
-+			desc->lli.sar = buf_addr + (period_len * i);
-+			desc->lli.ctllo = (DWC_DEFAULT_CTLLO(chan)
-+					| DWC_CTLL_DST_WIDTH(reg_width)
-+					| DWC_CTLL_SRC_WIDTH(reg_width)
-+					| DWC_CTLL_DST_FIX
-+					| DWC_CTLL_SRC_INC
-+					| DWC_CTLL_INT_EN);
-+
-+			desc->lli.ctllo |= sconfig->device_fc ?
-+				DWC_CTLL_FC(DW_DMA_FC_P_M2P) :
-+				DWC_CTLL_FC(DW_DMA_FC_D_M2P);
-+
-+			break;
-+		case DMA_DEV_TO_MEM:
-+			desc->lli.dar = buf_addr + (period_len * i);
-+			desc->lli.sar = sconfig->src_addr;
-+			desc->lli.ctllo = (DWC_DEFAULT_CTLLO(chan)
-+					| DWC_CTLL_SRC_WIDTH(reg_width)
-+					| DWC_CTLL_DST_WIDTH(reg_width)
-+					| DWC_CTLL_DST_INC
-+					| DWC_CTLL_SRC_FIX
-+					| DWC_CTLL_INT_EN);
-+
-+			desc->lli.ctllo |= sconfig->device_fc ?
-+				DWC_CTLL_FC(DW_DMA_FC_P_P2M) :
-+				DWC_CTLL_FC(DW_DMA_FC_D_P2M);
-+
-+			break;
-+		default:
-+			break;
-+		}
-+
-+		desc->lli.ctlhi = (period_len >> reg_width);
-+		cdesc->desc[i] = desc;
-+
-+		if (last)
-+			last->lli.llp = desc->txd.phys;
-+
-+		last = desc;
-+	}
-+
-+	/* Let's make a cyclic list */
-+	last->lli.llp = cdesc->desc[0]->txd.phys;
-+
-+	dev_dbg(chan2dev(&dwc->chan), "cyclic prepared buf 0x%llx len %zu "
-+			"period %zu periods %d\n", (unsigned long long)buf_addr,
-+			buf_len, period_len, periods);
-+
-+	cdesc->periods = periods;
-+	dwc->cdesc = cdesc;
-+
-+	return cdesc;
-+
-+out_err_desc_get:
-+	while (i--)
-+		dwc_desc_put(dwc, cdesc->desc[i]);
-+out_err_alloc:
-+	kfree(cdesc);
-+out_err:
-+	clear_bit(DW_DMA_IS_CYCLIC, &dwc->flags);
-+	return (struct dw_cyclic_desc *)retval;
-+}
-+EXPORT_SYMBOL(dw_dma_cyclic_prep);
-+
-+/**
-+ * dw_dma_cyclic_free - free a prepared cyclic DMA transfer
-+ * @chan: the DMA channel to free
-+ */
-+void dw_dma_cyclic_free(struct dma_chan *chan)
-+{
-+	struct dw_dma_chan	*dwc = to_dw_dma_chan(chan);
-+	struct dw_dma		*dw = to_dw_dma(dwc->chan.device);
-+	struct dw_cyclic_desc	*cdesc = dwc->cdesc;
-+	int			i;
-+	unsigned long		flags;
-+
-+	dev_dbg(chan2dev(&dwc->chan), "%s\n", __func__);
-+
-+	if (!cdesc)
-+		return;
-+
-+	spin_lock_irqsave(&dwc->lock, flags);
-+
-+	dwc_chan_disable(dw, dwc);
-+
-+	dma_writel(dw, CLEAR.ERROR, dwc->mask);
-+	dma_writel(dw, CLEAR.XFER, dwc->mask);
-+
-+	spin_unlock_irqrestore(&dwc->lock, flags);
-+
-+	for (i = 0; i < cdesc->periods; i++)
-+		dwc_desc_put(dwc, cdesc->desc[i]);
-+
-+	kfree(cdesc->desc);
-+	kfree(cdesc);
-+
-+	clear_bit(DW_DMA_IS_CYCLIC, &dwc->flags);
-+}
-+EXPORT_SYMBOL(dw_dma_cyclic_free);
-+
-+/*----------------------------------------------------------------------*/
-+
-+static void dw_dma_off(struct dw_dma *dw)
-+{
-+	int i;
-+
-+	dma_writel(dw, CFG, 0);
-+
-+	channel_clear_bit(dw, MASK.XFER, dw->all_chan_mask);
-+	channel_clear_bit(dw, MASK.SRC_TRAN, dw->all_chan_mask);
-+	channel_clear_bit(dw, MASK.DST_TRAN, dw->all_chan_mask);
-+	channel_clear_bit(dw, MASK.ERROR, dw->all_chan_mask);
-+
-+	while (dma_readl(dw, CFG) & DW_CFG_DMA_EN)
-+		cpu_relax();
-+
-+	for (i = 0; i < dw->dma.chancnt; i++)
-+		dw->chan[i].initialized = false;
-+}
-+
-+#ifdef CONFIG_OF
-+static struct dw_dma_platform_data *
-+dw_dma_parse_dt(struct platform_device *pdev)
-+{
-+	struct device_node *np = pdev->dev.of_node;
-+	struct dw_dma_platform_data *pdata;
-+	u32 tmp, arr[4];
-+
-+	if (!np) {
-+		dev_err(&pdev->dev, "Missing DT data\n");
-+		return NULL;
-+	}
-+
-+	pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
-+	if (!pdata)
-+		return NULL;
-+
-+	if (of_property_read_u32(np, "dma-channels", &pdata->nr_channels))
-+		return NULL;
-+
-+	if (of_property_read_bool(np, "is_private"))
-+		pdata->is_private = true;
-+
-+	if (!of_property_read_u32(np, "chan_allocation_order", &tmp))
-+		pdata->chan_allocation_order = (unsigned char)tmp;
-+
-+	if (!of_property_read_u32(np, "chan_priority", &tmp))
-+		pdata->chan_priority = tmp;
-+
-+	if (!of_property_read_u32(np, "block_size", &tmp))
-+		pdata->block_size = tmp;
-+
-+	if (!of_property_read_u32(np, "dma-masters", &tmp)) {
-+		if (tmp > 4)
-+			return NULL;
-+
-+		pdata->nr_masters = tmp;
-+	}
-+
-+	if (!of_property_read_u32_array(np, "data_width", arr,
-+				pdata->nr_masters))
-+		for (tmp = 0; tmp < pdata->nr_masters; tmp++)
-+			pdata->data_width[tmp] = arr[tmp];
-+
-+	return pdata;
-+}
-+#else
-+static inline struct dw_dma_platform_data *
-+dw_dma_parse_dt(struct platform_device *pdev)
-+{
-+	return NULL;
-+}
-+#endif
-+
-+static int dw_probe(struct platform_device *pdev)
-+{
-+	struct dw_dma_platform_data *pdata;
-+	struct resource		*io;
-+	struct dw_dma		*dw;
-+	size_t			size;
-+	void __iomem		*regs;
-+	bool			autocfg;
-+	unsigned int		dw_params;
-+	unsigned int		nr_channels;
-+	unsigned int		max_blk_size = 0;
-+	int			irq;
-+	int			err;
-+	int			i;
-+
-+	irq = platform_get_irq(pdev, 0);
-+	if (irq < 0)
-+		return irq;
-+
-+	io = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+	regs = devm_ioremap_resource(&pdev->dev, io);
-+	if (IS_ERR(regs))
-+		return PTR_ERR(regs);
-+
-+	/* Apply default dma_mask if needed */
-+	if (!pdev->dev.dma_mask) {
-+		pdev->dev.dma_mask = &pdev->dev.coherent_dma_mask;
-+		pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
-+	}
-+
-+	dw_params = dma_read_byaddr(regs, DW_PARAMS);
-+	autocfg = dw_params >> DW_PARAMS_EN & 0x1;
-+
-+	dev_dbg(&pdev->dev, "DW_PARAMS: 0x%08x\n", dw_params);
-+
-+	pdata = dev_get_platdata(&pdev->dev);
-+	if (!pdata)
-+		pdata = dw_dma_parse_dt(pdev);
-+
-+	if (!pdata && autocfg) {
-+		pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
-+		if (!pdata)
-+			return -ENOMEM;
-+
-+		/* Fill platform data with the default values */
-+		pdata->is_private = true;
-+		pdata->chan_allocation_order = CHAN_ALLOCATION_ASCENDING;
-+		pdata->chan_priority = CHAN_PRIORITY_ASCENDING;
-+	} else if (!pdata || pdata->nr_channels > DW_DMA_MAX_NR_CHANNELS)
-+		return -EINVAL;
-+
-+	if (autocfg)
-+		nr_channels = (dw_params >> DW_PARAMS_NR_CHAN & 0x7) + 1;
-+	else
-+		nr_channels = pdata->nr_channels;
-+
-+	size = sizeof(struct dw_dma) + nr_channels * sizeof(struct dw_dma_chan);
-+	dw = devm_kzalloc(&pdev->dev, size, GFP_KERNEL);
-+	if (!dw)
-+		return -ENOMEM;
-+
-+	dw->clk = devm_clk_get(&pdev->dev, "hclk");
-+	if (IS_ERR(dw->clk))
-+		return PTR_ERR(dw->clk);
-+	clk_prepare_enable(dw->clk);
-+
-+	dw->regs = regs;
-+
-+	/* Get hardware configuration parameters */
-+	if (autocfg) {
-+		max_blk_size = dma_readl(dw, MAX_BLK_SIZE);
-+
-+		dw->nr_masters = (dw_params >> DW_PARAMS_NR_MASTER & 3) + 1;
-+		for (i = 0; i < dw->nr_masters; i++) {
-+			dw->data_width[i] =
-+				(dw_params >> DW_PARAMS_DATA_WIDTH(i) & 3) + 2;
-+		}
-+	} else {
-+		dw->nr_masters = pdata->nr_masters;
-+		memcpy(dw->data_width, pdata->data_width, 4);
-+	}
-+
-+	/* Calculate all channel mask before DMA setup */
-+	dw->all_chan_mask = (1 << nr_channels) - 1;
-+
-+	/* Force dma off, just in case */
-+	dw_dma_off(dw);
-+
-+	/* Disable BLOCK interrupts as well */
-+	channel_clear_bit(dw, MASK.BLOCK, dw->all_chan_mask);
-+
-+	err = devm_request_irq(&pdev->dev, irq, dw_dma_interrupt, 0,
-+			       "dw_dmac", dw);
-+	if (err)
-+		return err;
-+
-+	platform_set_drvdata(pdev, dw);
-+
-+	/* Create a pool of consistent memory blocks for hardware descriptors */
-+	dw->desc_pool = dmam_pool_create("dw_dmac_desc_pool", &pdev->dev,
-+					 sizeof(struct dw_desc), 4, 0);
-+	if (!dw->desc_pool) {
-+		dev_err(&pdev->dev, "No memory for descriptors dma pool\n");
-+		return -ENOMEM;
-+	}
-+
-+	tasklet_init(&dw->tasklet, dw_dma_tasklet, (unsigned long)dw);
-+
-+	INIT_LIST_HEAD(&dw->dma.channels);
-+	for (i = 0; i < nr_channels; i++) {
-+		struct dw_dma_chan	*dwc = &dw->chan[i];
-+		int			r = nr_channels - i - 1;
-+
-+		dwc->chan.device = &dw->dma;
-+		dma_cookie_init(&dwc->chan);
-+		if (pdata->chan_allocation_order == CHAN_ALLOCATION_ASCENDING)
-+			list_add_tail(&dwc->chan.device_node,
-+					&dw->dma.channels);
-+		else
-+			list_add(&dwc->chan.device_node, &dw->dma.channels);
-+
-+		/* 7 is highest priority & 0 is lowest. */
-+		if (pdata->chan_priority == CHAN_PRIORITY_ASCENDING)
-+			dwc->priority = r;
-+		else
-+			dwc->priority = i;
-+
-+		dwc->ch_regs = &__dw_regs(dw)->CHAN[i];
-+		spin_lock_init(&dwc->lock);
-+		dwc->mask = 1 << i;
-+
-+		INIT_LIST_HEAD(&dwc->active_list);
-+		INIT_LIST_HEAD(&dwc->queue);
-+		INIT_LIST_HEAD(&dwc->free_list);
-+
-+		channel_clear_bit(dw, CH_EN, dwc->mask);
-+
-+		dwc->direction = DMA_TRANS_NONE;
-+		dwc->request_line = ~0;
-+
-+		/* Hardware configuration */
-+		if (autocfg) {
-+			unsigned int dwc_params;
-+
-+			dwc_params = dma_read_byaddr(regs + r * sizeof(u32),
-+						     DWC_PARAMS);
-+
-+			dev_dbg(&pdev->dev, "DWC_PARAMS[%d]: 0x%08x\n", i,
-+					    dwc_params);
-+
-+			/* Decode maximum block size for given channel. The
-+			 * stored 4 bit value represents blocks from 0x00 for 3
-+			 * up to 0x0a for 4095. */
-+			dwc->block_size =
-+				(4 << ((max_blk_size >> 4 * i) & 0xf)) - 1;
-+			dwc->nollp =
-+				(dwc_params >> DWC_PARAMS_MBLK_EN & 0x1) == 0;
-+		} else {
-+			dwc->block_size = pdata->block_size;
-+
-+			/* Check if channel supports multi block transfer */
-+			channel_writel(dwc, LLP, 0xfffffffc);
-+			dwc->nollp =
-+				(channel_readl(dwc, LLP) & 0xfffffffc) == 0;
-+			channel_writel(dwc, LLP, 0);
-+		}
-+	}
-+
-+	/* Clear all interrupts on all channels. */
-+	dma_writel(dw, CLEAR.XFER, dw->all_chan_mask);
-+	dma_writel(dw, CLEAR.BLOCK, dw->all_chan_mask);
-+	dma_writel(dw, CLEAR.SRC_TRAN, dw->all_chan_mask);
-+	dma_writel(dw, CLEAR.DST_TRAN, dw->all_chan_mask);
-+	dma_writel(dw, CLEAR.ERROR, dw->all_chan_mask);
-+
-+	dma_cap_set(DMA_MEMCPY, dw->dma.cap_mask);
-+	dma_cap_set(DMA_SLAVE, dw->dma.cap_mask);
-+	if (pdata->is_private)
-+		dma_cap_set(DMA_PRIVATE, dw->dma.cap_mask);
-+	dw->dma.dev = &pdev->dev;
-+	dw->dma.device_alloc_chan_resources = dwc_alloc_chan_resources;
-+	dw->dma.device_free_chan_resources = dwc_free_chan_resources;
-+
-+	dw->dma.device_prep_dma_memcpy = dwc_prep_dma_memcpy;
-+
-+	dw->dma.device_prep_slave_sg = dwc_prep_slave_sg;
-+	dw->dma.device_control = dwc_control;
-+
-+	dw->dma.device_tx_status = dwc_tx_status;
-+	dw->dma.device_issue_pending = dwc_issue_pending;
-+
-+	dma_writel(dw, CFG, DW_CFG_DMA_EN);
-+
-+	dev_info(&pdev->dev, "DesignWare DMA Controller, %d channels\n",
-+		 nr_channels);
-+
-+	dma_async_device_register(&dw->dma);
-+
-+	if (pdev->dev.of_node) {
-+		err = of_dma_controller_register(pdev->dev.of_node,
-+						 dw_dma_of_xlate, dw);
-+		if (err)
-+			dev_err(&pdev->dev,
-+				"could not register of_dma_controller\n");
-+	}
-+
-+	if (ACPI_HANDLE(&pdev->dev))
-+		dw_dma_acpi_controller_register(dw);
-+
-+	return 0;
-+}
-+
-+static int dw_remove(struct platform_device *pdev)
-+{
-+	struct dw_dma		*dw = platform_get_drvdata(pdev);
-+	struct dw_dma_chan	*dwc, *_dwc;
-+
-+	if (pdev->dev.of_node)
-+		of_dma_controller_free(pdev->dev.of_node);
-+	dw_dma_off(dw);
-+	dma_async_device_unregister(&dw->dma);
-+
-+	tasklet_kill(&dw->tasklet);
-+
-+	list_for_each_entry_safe(dwc, _dwc, &dw->dma.channels,
-+			chan.device_node) {
-+		list_del(&dwc->chan.device_node);
-+		channel_clear_bit(dw, CH_EN, dwc->mask);
-+	}
-+
-+	return 0;
-+}
-+
-+static void dw_shutdown(struct platform_device *pdev)
-+{
-+	struct dw_dma	*dw = platform_get_drvdata(pdev);
-+
-+	dw_dma_off(dw);
-+	clk_disable_unprepare(dw->clk);
-+}
-+
-+static int dw_suspend_noirq(struct device *dev)
-+{
-+	struct platform_device *pdev = to_platform_device(dev);
-+	struct dw_dma	*dw = platform_get_drvdata(pdev);
-+
-+	dw_dma_off(dw);
-+	clk_disable_unprepare(dw->clk);
-+
-+	return 0;
-+}
-+
-+static int dw_resume_noirq(struct device *dev)
-+{
-+	struct platform_device *pdev = to_platform_device(dev);
-+	struct dw_dma	*dw = platform_get_drvdata(pdev);
-+
-+	clk_prepare_enable(dw->clk);
-+	dma_writel(dw, CFG, DW_CFG_DMA_EN);
-+
-+	return 0;
-+}
-+
-+static const struct dev_pm_ops dw_dev_pm_ops = {
-+	.suspend_noirq = dw_suspend_noirq,
-+	.resume_noirq = dw_resume_noirq,
-+	.freeze_noirq = dw_suspend_noirq,
-+	.thaw_noirq = dw_resume_noirq,
-+	.restore_noirq = dw_resume_noirq,
-+	.poweroff_noirq = dw_suspend_noirq,
-+};
-+
-+#ifdef CONFIG_OF
-+static const struct of_device_id dw_dma_of_id_table[] = {
-+	{ .compatible = "snps,dma-spear1340" },
-+	{}
-+};
-+MODULE_DEVICE_TABLE(of, dw_dma_of_id_table);
-+#endif
-+
-+#ifdef CONFIG_ACPI
-+static const struct acpi_device_id dw_dma_acpi_id_table[] = {
-+	{ "INTL9C60", 0 },
-+	{ }
-+};
-+#endif
-+
-+static struct platform_driver dw_driver = {
-+	.probe		= dw_probe,
-+	.remove		= dw_remove,
-+	.shutdown	= dw_shutdown,
-+	.driver = {
-+		.name	= "dw_dmac",
-+		.pm	= &dw_dev_pm_ops,
-+		.of_match_table = of_match_ptr(dw_dma_of_id_table),
-+		.acpi_match_table = ACPI_PTR(dw_dma_acpi_id_table),
-+	},
-+};
-+
-+static int __init dw_init(void)
-+{
-+	return platform_driver_register(&dw_driver);
-+}
-+subsys_initcall(dw_init);
-+
-+static void __exit dw_exit(void)
-+{
-+	platform_driver_unregister(&dw_driver);
-+}
-+module_exit(dw_exit);
-+
-+MODULE_LICENSE("GPL v2");
-+MODULE_DESCRIPTION("Synopsys DesignWare DMA Controller driver");
-+MODULE_AUTHOR("Haavard Skinnemoen (Atmel)");
-+MODULE_AUTHOR("Viresh Kumar <viresh.linux@gmail.com>");
---- /dev/null
-+++ b/drivers/dma/dw/dw_dmac_regs.h
-@@ -0,0 +1,311 @@
-+/*
-+ * Driver for the Synopsys DesignWare AHB DMA Controller
-+ *
-+ * Copyright (C) 2005-2007 Atmel Corporation
-+ * Copyright (C) 2010-2011 ST Microelectronics
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+
-+#include <linux/dmaengine.h>
-+#include <linux/dw_dmac.h>
-+
-+#define DW_DMA_MAX_NR_CHANNELS	8
-+#define DW_DMA_MAX_NR_REQUESTS	16
-+
-+/* flow controller */
-+enum dw_dma_fc {
-+	DW_DMA_FC_D_M2M,
-+	DW_DMA_FC_D_M2P,
-+	DW_DMA_FC_D_P2M,
-+	DW_DMA_FC_D_P2P,
-+	DW_DMA_FC_P_P2M,
-+	DW_DMA_FC_SP_P2P,
-+	DW_DMA_FC_P_M2P,
-+	DW_DMA_FC_DP_P2P,
-+};
-+
-+/*
-+ * Redefine this macro to handle differences between 32- and 64-bit
-+ * addressing, big vs. little endian, etc.
-+ */
-+#define DW_REG(name)		u32 name; u32 __pad_##name
-+
-+/* Hardware register definitions. */
-+struct dw_dma_chan_regs {
-+	DW_REG(SAR);		/* Source Address Register */
-+	DW_REG(DAR);		/* Destination Address Register */
-+	DW_REG(LLP);		/* Linked List Pointer */
-+	u32	CTL_LO;		/* Control Register Low */
-+	u32	CTL_HI;		/* Control Register High */
-+	DW_REG(SSTAT);
-+	DW_REG(DSTAT);
-+	DW_REG(SSTATAR);
-+	DW_REG(DSTATAR);
-+	u32	CFG_LO;		/* Configuration Register Low */
-+	u32	CFG_HI;		/* Configuration Register High */
-+	DW_REG(SGR);
-+	DW_REG(DSR);
-+};
-+
-+struct dw_dma_irq_regs {
-+	DW_REG(XFER);
-+	DW_REG(BLOCK);
-+	DW_REG(SRC_TRAN);
-+	DW_REG(DST_TRAN);
-+	DW_REG(ERROR);
-+};
-+
-+struct dw_dma_regs {
-+	/* per-channel registers */
-+	struct dw_dma_chan_regs	CHAN[DW_DMA_MAX_NR_CHANNELS];
-+
-+	/* irq handling */
-+	struct dw_dma_irq_regs	RAW;		/* r */
-+	struct dw_dma_irq_regs	STATUS;		/* r (raw & mask) */
-+	struct dw_dma_irq_regs	MASK;		/* rw (set = irq enabled) */
-+	struct dw_dma_irq_regs	CLEAR;		/* w (ack, affects "raw") */
-+
-+	DW_REG(STATUS_INT);			/* r */
-+
-+	/* software handshaking */
-+	DW_REG(REQ_SRC);
-+	DW_REG(REQ_DST);
-+	DW_REG(SGL_REQ_SRC);
-+	DW_REG(SGL_REQ_DST);
-+	DW_REG(LAST_SRC);
-+	DW_REG(LAST_DST);
-+
-+	/* miscellaneous */
-+	DW_REG(CFG);
-+	DW_REG(CH_EN);
-+	DW_REG(ID);
-+	DW_REG(TEST);
-+
-+	/* reserved */
-+	DW_REG(__reserved0);
-+	DW_REG(__reserved1);
-+
-+	/* optional encoded params, 0x3c8..0x3f7 */
-+	u32	__reserved;
-+
-+	/* per-channel configuration registers */
-+	u32	DWC_PARAMS[DW_DMA_MAX_NR_CHANNELS];
-+	u32	MULTI_BLK_TYPE;
-+	u32	MAX_BLK_SIZE;
-+
-+	/* top-level parameters */
-+	u32	DW_PARAMS;
-+};
-+
-+#ifdef CONFIG_DW_DMAC_BIG_ENDIAN_IO
-+#define dma_readl_native ioread32be
-+#define dma_writel_native iowrite32be
-+#else
-+#define dma_readl_native readl
-+#define dma_writel_native writel
-+#endif
-+
-+/* To access the registers in early stage of probe */
-+#define dma_read_byaddr(addr, name) \
-+	dma_readl_native((addr) + offsetof(struct dw_dma_regs, name))
-+
-+/* Bitfields in DW_PARAMS */
-+#define DW_PARAMS_NR_CHAN	8		/* number of channels */
-+#define DW_PARAMS_NR_MASTER	11		/* number of AHB masters */
-+#define DW_PARAMS_DATA_WIDTH(n)	(15 + 2 * (n))
-+#define DW_PARAMS_DATA_WIDTH1	15		/* master 1 data width */
-+#define DW_PARAMS_DATA_WIDTH2	17		/* master 2 data width */
-+#define DW_PARAMS_DATA_WIDTH3	19		/* master 3 data width */
-+#define DW_PARAMS_DATA_WIDTH4	21		/* master 4 data width */
-+#define DW_PARAMS_EN		28		/* encoded parameters */
-+
-+/* Bitfields in DWC_PARAMS */
-+#define DWC_PARAMS_MBLK_EN	11		/* multi block transfer */
-+
-+/* Bitfields in CTL_LO */
-+#define DWC_CTLL_INT_EN		(1 << 0)	/* irqs enabled? */
-+#define DWC_CTLL_DST_WIDTH(n)	((n)<<1)	/* bytes per element */
-+#define DWC_CTLL_SRC_WIDTH(n)	((n)<<4)
-+#define DWC_CTLL_DST_INC	(0<<7)		/* DAR update/not */
-+#define DWC_CTLL_DST_DEC	(1<<7)
-+#define DWC_CTLL_DST_FIX	(2<<7)
-+#define DWC_CTLL_SRC_INC	(0<<7)		/* SAR update/not */
-+#define DWC_CTLL_SRC_DEC	(1<<9)
-+#define DWC_CTLL_SRC_FIX	(2<<9)
-+#define DWC_CTLL_DST_MSIZE(n)	((n)<<11)	/* burst, #elements */
-+#define DWC_CTLL_SRC_MSIZE(n)	((n)<<14)
-+#define DWC_CTLL_S_GATH_EN	(1 << 17)	/* src gather, !FIX */
-+#define DWC_CTLL_D_SCAT_EN	(1 << 18)	/* dst scatter, !FIX */
-+#define DWC_CTLL_FC(n)		((n) << 20)
-+#define DWC_CTLL_FC_M2M		(0 << 20)	/* mem-to-mem */
-+#define DWC_CTLL_FC_M2P		(1 << 20)	/* mem-to-periph */
-+#define DWC_CTLL_FC_P2M		(2 << 20)	/* periph-to-mem */
-+#define DWC_CTLL_FC_P2P		(3 << 20)	/* periph-to-periph */
-+/* plus 4 transfer types for peripheral-as-flow-controller */
-+#define DWC_CTLL_DMS(n)		((n)<<23)	/* dst master select */
-+#define DWC_CTLL_SMS(n)		((n)<<25)	/* src master select */
-+#define DWC_CTLL_LLP_D_EN	(1 << 27)	/* dest block chain */
-+#define DWC_CTLL_LLP_S_EN	(1 << 28)	/* src block chain */
-+
-+/* Bitfields in CTL_HI */
-+#define DWC_CTLH_DONE		0x00001000
-+#define DWC_CTLH_BLOCK_TS_MASK	0x00000fff
-+
-+/* Bitfields in CFG_LO. Platform-configurable bits are in <linux/dw_dmac.h> */
-+#define DWC_CFGL_CH_PRIOR_MASK	(0x7 << 5)	/* priority mask */
-+#define DWC_CFGL_CH_PRIOR(x)	((x) << 5)	/* priority */
-+#define DWC_CFGL_CH_SUSP	(1 << 8)	/* pause xfer */
-+#define DWC_CFGL_FIFO_EMPTY	(1 << 9)	/* pause xfer */
-+#define DWC_CFGL_HS_DST		(1 << 10)	/* handshake w/dst */
-+#define DWC_CFGL_HS_SRC		(1 << 11)	/* handshake w/src */
-+#define DWC_CFGL_MAX_BURST(x)	((x) << 20)
-+#define DWC_CFGL_RELOAD_SAR	(1 << 30)
-+#define DWC_CFGL_RELOAD_DAR	(1 << 31)
-+
-+/* Bitfields in CFG_HI. Platform-configurable bits are in <linux/dw_dmac.h> */
-+#define DWC_CFGH_DS_UPD_EN	(1 << 5)
-+#define DWC_CFGH_SS_UPD_EN	(1 << 6)
-+
-+/* Bitfields in SGR */
-+#define DWC_SGR_SGI(x)		((x) << 0)
-+#define DWC_SGR_SGC(x)		((x) << 20)
-+
-+/* Bitfields in DSR */
-+#define DWC_DSR_DSI(x)		((x) << 0)
-+#define DWC_DSR_DSC(x)		((x) << 20)
-+
-+/* Bitfields in CFG */
-+#define DW_CFG_DMA_EN		(1 << 0)
-+
-+enum dw_dmac_flags {
-+	DW_DMA_IS_CYCLIC = 0,
-+	DW_DMA_IS_SOFT_LLP = 1,
-+};
-+
-+struct dw_dma_chan {
-+	struct dma_chan			chan;
-+	void __iomem			*ch_regs;
-+	u8				mask;
-+	u8				priority;
-+	enum dma_transfer_direction	direction;
-+	bool				paused;
-+	bool				initialized;
-+
-+	/* software emulation of the LLP transfers */
-+	struct list_head	*tx_node_active;
-+
-+	spinlock_t		lock;
-+
-+	/* these other elements are all protected by lock */
-+	unsigned long		flags;
-+	struct list_head	active_list;
-+	struct list_head	queue;
-+	struct list_head	free_list;
-+	u32			residue;
-+	struct dw_cyclic_desc	*cdesc;
-+
-+	unsigned int		descs_allocated;
-+
-+	/* hardware configuration */
-+	unsigned int		block_size;
-+	bool			nollp;
-+
-+	/* custom slave configuration */
-+	unsigned int		request_line;
-+	unsigned char		src_master;
-+	unsigned char		dst_master;
-+
-+	/* configuration passed via DMA_SLAVE_CONFIG */
-+	struct dma_slave_config dma_sconfig;
-+};
-+
-+static inline struct dw_dma_chan_regs __iomem *
-+__dwc_regs(struct dw_dma_chan *dwc)
-+{
-+	return dwc->ch_regs;
-+}
-+
-+#define channel_readl(dwc, name) \
-+	dma_readl_native(&(__dwc_regs(dwc)->name))
-+#define channel_writel(dwc, name, val) \
-+	dma_writel_native((val), &(__dwc_regs(dwc)->name))
-+
-+static inline struct dw_dma_chan *to_dw_dma_chan(struct dma_chan *chan)
-+{
-+	return container_of(chan, struct dw_dma_chan, chan);
-+}
-+
-+struct dw_dma {
-+	struct dma_device	dma;
-+	void __iomem		*regs;
-+	struct dma_pool		*desc_pool;
-+	struct tasklet_struct	tasklet;
-+	struct clk		*clk;
-+
-+	u8			all_chan_mask;
-+
-+	/* hardware configuration */
-+	unsigned char		nr_masters;
-+	unsigned char		data_width[4];
-+
-+	struct dw_dma_chan	chan[0];
-+};
-+
-+static inline struct dw_dma_regs __iomem *__dw_regs(struct dw_dma *dw)
-+{
-+	return dw->regs;
-+}
-+
-+#define dma_readl(dw, name) \
-+	dma_readl_native(&(__dw_regs(dw)->name))
-+#define dma_writel(dw, name, val) \
-+	dma_writel_native((val), &(__dw_regs(dw)->name))
-+
-+#define channel_set_bit(dw, reg, mask) \
-+	dma_writel(dw, reg, ((mask) << 8) | (mask))
-+#define channel_clear_bit(dw, reg, mask) \
-+	dma_writel(dw, reg, ((mask) << 8) | 0)
-+
-+static inline struct dw_dma *to_dw_dma(struct dma_device *ddev)
-+{
-+	return container_of(ddev, struct dw_dma, dma);
-+}
-+
-+/* LLI == Linked List Item; a.k.a. DMA block descriptor */
-+struct dw_lli {
-+	/* values that are not changed by hardware */
-+	u32		sar;
-+	u32		dar;
-+	u32		llp;		/* chain to next lli */
-+	u32		ctllo;
-+	/* values that may get written back: */
-+	u32		ctlhi;
-+	/* sstat and dstat can snapshot peripheral register state.
-+	 * silicon config may discard either or both...
-+	 */
-+	u32		sstat;
-+	u32		dstat;
-+};
-+
-+struct dw_desc {
-+	/* FIRST values the hardware uses */
-+	struct dw_lli			lli;
-+
-+	/* THEN values for driver housekeeping */
-+	struct list_head		desc_node;
-+	struct list_head		tx_list;
-+	struct dma_async_tx_descriptor	txd;
-+	size_t				len;
-+	size_t				total_len;
-+};
-+
-+#define to_dw_desc(h)	list_entry(h, struct dw_desc, desc_node)
-+
-+static inline struct dw_desc *
-+txd_to_dw_desc(struct dma_async_tx_descriptor *txd)
-+{
-+	return container_of(txd, struct dw_desc, txd);
-+}
---- a/drivers/dma/dw_dmac.c
-+++ /dev/null
-@@ -1,1969 +0,0 @@
--/*
-- * Core driver for the Synopsys DesignWare DMA Controller
-- *
-- * Copyright (C) 2007-2008 Atmel Corporation
-- * Copyright (C) 2010-2011 ST Microelectronics
-- *
-- * This program is free software; you can redistribute it and/or modify
-- * it under the terms of the GNU General Public License version 2 as
-- * published by the Free Software Foundation.
-- */
--
--#include <linux/bitops.h>
--#include <linux/clk.h>
--#include <linux/delay.h>
--#include <linux/dmaengine.h>
--#include <linux/dma-mapping.h>
--#include <linux/dmapool.h>
--#include <linux/err.h>
--#include <linux/init.h>
--#include <linux/interrupt.h>
--#include <linux/io.h>
--#include <linux/of.h>
--#include <linux/of_dma.h>
--#include <linux/mm.h>
--#include <linux/module.h>
--#include <linux/platform_device.h>
--#include <linux/slab.h>
--#include <linux/acpi.h>
--#include <linux/acpi_dma.h>
--
--#include "dw_dmac_regs.h"
--#include "dmaengine.h"
--
--/*
-- * This supports the Synopsys "DesignWare AHB Central DMA Controller",
-- * (DW_ahb_dmac) which is used with various AMBA 2.0 systems (not all
-- * of which use ARM any more).  See the "Databook" from Synopsys for
-- * information beyond what licensees probably provide.
-- *
-- * The driver has currently been tested only with the Atmel AT32AP7000,
-- * which does not support descriptor writeback.
-- */
--
--static inline unsigned int dwc_get_dms(struct dw_dma_slave *slave)
--{
--	return slave ? slave->dst_master : 0;
--}
--
--static inline unsigned int dwc_get_sms(struct dw_dma_slave *slave)
--{
--	return slave ? slave->src_master : 1;
--}
--
--static inline void dwc_set_masters(struct dw_dma_chan *dwc)
--{
--	struct dw_dma *dw = to_dw_dma(dwc->chan.device);
--	struct dw_dma_slave *dws = dwc->chan.private;
--	unsigned char mmax = dw->nr_masters - 1;
--
--	if (dwc->request_line == ~0) {
--		dwc->src_master = min_t(unsigned char, mmax, dwc_get_sms(dws));
--		dwc->dst_master = min_t(unsigned char, mmax, dwc_get_dms(dws));
--	}
--}
--
--#define DWC_DEFAULT_CTLLO(_chan) ({				\
--		struct dw_dma_chan *_dwc = to_dw_dma_chan(_chan);	\
--		struct dma_slave_config	*_sconfig = &_dwc->dma_sconfig;	\
--		bool _is_slave = is_slave_direction(_dwc->direction);	\
--		u8 _smsize = _is_slave ? _sconfig->src_maxburst :	\
--			DW_DMA_MSIZE_16;			\
--		u8 _dmsize = _is_slave ? _sconfig->dst_maxburst :	\
--			DW_DMA_MSIZE_16;			\
--								\
--		(DWC_CTLL_DST_MSIZE(_dmsize)			\
--		 | DWC_CTLL_SRC_MSIZE(_smsize)			\
--		 | DWC_CTLL_LLP_D_EN				\
--		 | DWC_CTLL_LLP_S_EN				\
--		 | DWC_CTLL_DMS(_dwc->dst_master)		\
--		 | DWC_CTLL_SMS(_dwc->src_master));		\
--	})
--
--/*
-- * Number of descriptors to allocate for each channel. This should be
-- * made configurable somehow; preferably, the clients (at least the
-- * ones using slave transfers) should be able to give us a hint.
-- */
--#define NR_DESCS_PER_CHANNEL	64
--
--/*----------------------------------------------------------------------*/
--
--static struct device *chan2dev(struct dma_chan *chan)
--{
--	return &chan->dev->device;
--}
--static struct device *chan2parent(struct dma_chan *chan)
--{
--	return chan->dev->device.parent;
--}
--
--static struct dw_desc *dwc_first_active(struct dw_dma_chan *dwc)
--{
--	return to_dw_desc(dwc->active_list.next);
--}
--
--static struct dw_desc *dwc_desc_get(struct dw_dma_chan *dwc)
--{
--	struct dw_desc *desc, *_desc;
--	struct dw_desc *ret = NULL;
--	unsigned int i = 0;
--	unsigned long flags;
--
--	spin_lock_irqsave(&dwc->lock, flags);
--	list_for_each_entry_safe(desc, _desc, &dwc->free_list, desc_node) {
--		i++;
--		if (async_tx_test_ack(&desc->txd)) {
--			list_del(&desc->desc_node);
--			ret = desc;
--			break;
--		}
--		dev_dbg(chan2dev(&dwc->chan), "desc %p not ACKed\n", desc);
--	}
--	spin_unlock_irqrestore(&dwc->lock, flags);
--
--	dev_vdbg(chan2dev(&dwc->chan), "scanned %u descriptors on freelist\n", i);
--
--	return ret;
--}
--
--/*
-- * Move a descriptor, including any children, to the free list.
-- * `desc' must not be on any lists.
-- */
--static void dwc_desc_put(struct dw_dma_chan *dwc, struct dw_desc *desc)
--{
--	unsigned long flags;
--
--	if (desc) {
--		struct dw_desc *child;
--
--		spin_lock_irqsave(&dwc->lock, flags);
--		list_for_each_entry(child, &desc->tx_list, desc_node)
--			dev_vdbg(chan2dev(&dwc->chan),
--					"moving child desc %p to freelist\n",
--					child);
--		list_splice_init(&desc->tx_list, &dwc->free_list);
--		dev_vdbg(chan2dev(&dwc->chan), "moving desc %p to freelist\n", desc);
--		list_add(&desc->desc_node, &dwc->free_list);
--		spin_unlock_irqrestore(&dwc->lock, flags);
--	}
--}
--
--static void dwc_initialize(struct dw_dma_chan *dwc)
--{
--	struct dw_dma *dw = to_dw_dma(dwc->chan.device);
--	struct dw_dma_slave *dws = dwc->chan.private;
--	u32 cfghi = DWC_CFGH_FIFO_MODE;
--	u32 cfglo = DWC_CFGL_CH_PRIOR(dwc->priority);
--
--	if (dwc->initialized == true)
--		return;
--
--	if (dws) {
--		/*
--		 * We need controller-specific data to set up slave
--		 * transfers.
--		 */
--		BUG_ON(!dws->dma_dev || dws->dma_dev != dw->dma.dev);
--
--		cfghi = dws->cfg_hi;
--		cfglo |= dws->cfg_lo & ~DWC_CFGL_CH_PRIOR_MASK;
--	} else {
--		if (dwc->direction == DMA_MEM_TO_DEV)
--			cfghi = DWC_CFGH_DST_PER(dwc->request_line);
--		else if (dwc->direction == DMA_DEV_TO_MEM)
--			cfghi = DWC_CFGH_SRC_PER(dwc->request_line);
--	}
--
--	channel_writel(dwc, CFG_LO, cfglo);
--	channel_writel(dwc, CFG_HI, cfghi);
--
--	/* Enable interrupts */
--	channel_set_bit(dw, MASK.XFER, dwc->mask);
--	channel_set_bit(dw, MASK.ERROR, dwc->mask);
--
--	dwc->initialized = true;
--}
--
--/*----------------------------------------------------------------------*/
--
--static inline unsigned int dwc_fast_fls(unsigned long long v)
--{
--	/*
--	 * We can be a lot more clever here, but this should take care
--	 * of the most common optimization.
--	 */
--	if (!(v & 7))
--		return 3;
--	else if (!(v & 3))
--		return 2;
--	else if (!(v & 1))
--		return 1;
--	return 0;
--}
--
--static inline void dwc_dump_chan_regs(struct dw_dma_chan *dwc)
--{
--	dev_err(chan2dev(&dwc->chan),
--		"  SAR: 0x%x DAR: 0x%x LLP: 0x%x CTL: 0x%x:%08x\n",
--		channel_readl(dwc, SAR),
--		channel_readl(dwc, DAR),
--		channel_readl(dwc, LLP),
--		channel_readl(dwc, CTL_HI),
--		channel_readl(dwc, CTL_LO));
--}
--
--static inline void dwc_chan_disable(struct dw_dma *dw, struct dw_dma_chan *dwc)
--{
--	channel_clear_bit(dw, CH_EN, dwc->mask);
--	while (dma_readl(dw, CH_EN) & dwc->mask)
--		cpu_relax();
--}
--
--/*----------------------------------------------------------------------*/
--
--/* Perform single block transfer */
--static inline void dwc_do_single_block(struct dw_dma_chan *dwc,
--				       struct dw_desc *desc)
--{
--	struct dw_dma	*dw = to_dw_dma(dwc->chan.device);
--	u32		ctllo;
--
--	/* Software emulation of LLP mode relies on interrupts to continue
--	 * multi block transfer. */
--	ctllo = desc->lli.ctllo | DWC_CTLL_INT_EN;
--
--	channel_writel(dwc, SAR, desc->lli.sar);
--	channel_writel(dwc, DAR, desc->lli.dar);
--	channel_writel(dwc, CTL_LO, ctllo);
--	channel_writel(dwc, CTL_HI, desc->lli.ctlhi);
--	channel_set_bit(dw, CH_EN, dwc->mask);
--
--	/* Move pointer to next descriptor */
--	dwc->tx_node_active = dwc->tx_node_active->next;
--}
--
--/* Called with dwc->lock held and bh disabled */
--static void dwc_dostart(struct dw_dma_chan *dwc, struct dw_desc *first)
--{
--	struct dw_dma	*dw = to_dw_dma(dwc->chan.device);
--	unsigned long	was_soft_llp;
--
--	/* ASSERT:  channel is idle */
--	if (dma_readl(dw, CH_EN) & dwc->mask) {
--		dev_err(chan2dev(&dwc->chan),
--			"BUG: Attempted to start non-idle channel\n");
--		dwc_dump_chan_regs(dwc);
--
--		/* The tasklet will hopefully advance the queue... */
--		return;
--	}
--
--	if (dwc->nollp) {
--		was_soft_llp = test_and_set_bit(DW_DMA_IS_SOFT_LLP,
--						&dwc->flags);
--		if (was_soft_llp) {
--			dev_err(chan2dev(&dwc->chan),
--				"BUG: Attempted to start new LLP transfer "
--				"inside ongoing one\n");
--			return;
--		}
--
--		dwc_initialize(dwc);
--
--		dwc->residue = first->total_len;
--		dwc->tx_node_active = &first->tx_list;
--
--		/* Submit first block */
--		dwc_do_single_block(dwc, first);
--
--		return;
--	}
--
--	dwc_initialize(dwc);
--
--	channel_writel(dwc, LLP, first->txd.phys);
--	channel_writel(dwc, CTL_LO,
--			DWC_CTLL_LLP_D_EN | DWC_CTLL_LLP_S_EN);
--	channel_writel(dwc, CTL_HI, 0);
--	channel_set_bit(dw, CH_EN, dwc->mask);
--}
--
--/*----------------------------------------------------------------------*/
--
--static void
--dwc_descriptor_complete(struct dw_dma_chan *dwc, struct dw_desc *desc,
--		bool callback_required)
--{
--	dma_async_tx_callback		callback = NULL;
--	void				*param = NULL;
--	struct dma_async_tx_descriptor	*txd = &desc->txd;
--	struct dw_desc			*child;
--	unsigned long			flags;
--
--	dev_vdbg(chan2dev(&dwc->chan), "descriptor %u complete\n", txd->cookie);
--
--	spin_lock_irqsave(&dwc->lock, flags);
--	dma_cookie_complete(txd);
--	if (callback_required) {
--		callback = txd->callback;
--		param = txd->callback_param;
--	}
--
--	/* async_tx_ack */
--	list_for_each_entry(child, &desc->tx_list, desc_node)
--		async_tx_ack(&child->txd);
--	async_tx_ack(&desc->txd);
--
--	list_splice_init(&desc->tx_list, &dwc->free_list);
--	list_move(&desc->desc_node, &dwc->free_list);
--
--	if (!is_slave_direction(dwc->direction)) {
--		struct device *parent = chan2parent(&dwc->chan);
--		if (!(txd->flags & DMA_COMPL_SKIP_DEST_UNMAP)) {
--			if (txd->flags & DMA_COMPL_DEST_UNMAP_SINGLE)
--				dma_unmap_single(parent, desc->lli.dar,
--					desc->total_len, DMA_FROM_DEVICE);
--			else
--				dma_unmap_page(parent, desc->lli.dar,
--					desc->total_len, DMA_FROM_DEVICE);
--		}
--		if (!(txd->flags & DMA_COMPL_SKIP_SRC_UNMAP)) {
--			if (txd->flags & DMA_COMPL_SRC_UNMAP_SINGLE)
--				dma_unmap_single(parent, desc->lli.sar,
--					desc->total_len, DMA_TO_DEVICE);
--			else
--				dma_unmap_page(parent, desc->lli.sar,
--					desc->total_len, DMA_TO_DEVICE);
--		}
--	}
--
--	spin_unlock_irqrestore(&dwc->lock, flags);
--
--	if (callback)
--		callback(param);
--}
--
--static void dwc_complete_all(struct dw_dma *dw, struct dw_dma_chan *dwc)
--{
--	struct dw_desc *desc, *_desc;
--	LIST_HEAD(list);
--	unsigned long flags;
--
--	spin_lock_irqsave(&dwc->lock, flags);
--	if (dma_readl(dw, CH_EN) & dwc->mask) {
--		dev_err(chan2dev(&dwc->chan),
--			"BUG: XFER bit set, but channel not idle!\n");
--
--		/* Try to continue after resetting the channel... */
--		dwc_chan_disable(dw, dwc);
--	}
--
--	/*
--	 * Submit queued descriptors ASAP, i.e. before we go through
--	 * the completed ones.
--	 */
--	list_splice_init(&dwc->active_list, &list);
--	if (!list_empty(&dwc->queue)) {
--		list_move(dwc->queue.next, &dwc->active_list);
--		dwc_dostart(dwc, dwc_first_active(dwc));
--	}
--
--	spin_unlock_irqrestore(&dwc->lock, flags);
--
--	list_for_each_entry_safe(desc, _desc, &list, desc_node)
--		dwc_descriptor_complete(dwc, desc, true);
--}
--
--/* Returns how many bytes were already received from source */
--static inline u32 dwc_get_sent(struct dw_dma_chan *dwc)
--{
--	u32 ctlhi = channel_readl(dwc, CTL_HI);
--	u32 ctllo = channel_readl(dwc, CTL_LO);
--
--	return (ctlhi & DWC_CTLH_BLOCK_TS_MASK) * (1 << (ctllo >> 4 & 7));
--}
--
--static void dwc_scan_descriptors(struct dw_dma *dw, struct dw_dma_chan *dwc)
--{
--	dma_addr_t llp;
--	struct dw_desc *desc, *_desc;
--	struct dw_desc *child;
--	u32 status_xfer;
--	unsigned long flags;
--
--	spin_lock_irqsave(&dwc->lock, flags);
--	llp = channel_readl(dwc, LLP);
--	status_xfer = dma_readl(dw, RAW.XFER);
--
--	if (status_xfer & dwc->mask) {
--		/* Everything we've submitted is done */
--		dma_writel(dw, CLEAR.XFER, dwc->mask);
--
--		if (test_bit(DW_DMA_IS_SOFT_LLP, &dwc->flags)) {
--			struct list_head *head, *active = dwc->tx_node_active;
--
--			/*
--			 * We are inside first active descriptor.
--			 * Otherwise something is really wrong.
--			 */
--			desc = dwc_first_active(dwc);
--
--			head = &desc->tx_list;
--			if (active != head) {
--				/* Update desc to reflect last sent one */
--				if (active != head->next)
--					desc = to_dw_desc(active->prev);
--
--				dwc->residue -= desc->len;
--
--				child = to_dw_desc(active);
--
--				/* Submit next block */
--				dwc_do_single_block(dwc, child);
--
--				spin_unlock_irqrestore(&dwc->lock, flags);
--				return;
--			}
--
--			/* We are done here */
--			clear_bit(DW_DMA_IS_SOFT_LLP, &dwc->flags);
--		}
--
--		dwc->residue = 0;
--
--		spin_unlock_irqrestore(&dwc->lock, flags);
--
--		dwc_complete_all(dw, dwc);
--		return;
--	}
--
--	if (list_empty(&dwc->active_list)) {
--		dwc->residue = 0;
--		spin_unlock_irqrestore(&dwc->lock, flags);
--		return;
--	}
--
--	if (test_bit(DW_DMA_IS_SOFT_LLP, &dwc->flags)) {
--		dev_vdbg(chan2dev(&dwc->chan), "%s: soft LLP mode\n", __func__);
--		spin_unlock_irqrestore(&dwc->lock, flags);
--		return;
--	}
--
--	dev_vdbg(chan2dev(&dwc->chan), "%s: llp=0x%llx\n", __func__,
--			(unsigned long long)llp);
--
--	list_for_each_entry_safe(desc, _desc, &dwc->active_list, desc_node) {
--		/* Initial residue value */
--		dwc->residue = desc->total_len;
--
--		/* Check first descriptors addr */
--		if (desc->txd.phys == llp) {
--			spin_unlock_irqrestore(&dwc->lock, flags);
--			return;
--		}
--
--		/* Check first descriptors llp */
--		if (desc->lli.llp == llp) {
--			/* This one is currently in progress */
--			dwc->residue -= dwc_get_sent(dwc);
--			spin_unlock_irqrestore(&dwc->lock, flags);
--			return;
--		}
--
--		dwc->residue -= desc->len;
--		list_for_each_entry(child, &desc->tx_list, desc_node) {
--			if (child->lli.llp == llp) {
--				/* Currently in progress */
--				dwc->residue -= dwc_get_sent(dwc);
--				spin_unlock_irqrestore(&dwc->lock, flags);
--				return;
--			}
--			dwc->residue -= child->len;
--		}
--
--		/*
--		 * No descriptors so far seem to be in progress, i.e.
--		 * this one must be done.
--		 */
--		spin_unlock_irqrestore(&dwc->lock, flags);
--		dwc_descriptor_complete(dwc, desc, true);
--		spin_lock_irqsave(&dwc->lock, flags);
--	}
--
--	dev_err(chan2dev(&dwc->chan),
--		"BUG: All descriptors done, but channel not idle!\n");
--
--	/* Try to continue after resetting the channel... */
--	dwc_chan_disable(dw, dwc);
--
--	if (!list_empty(&dwc->queue)) {
--		list_move(dwc->queue.next, &dwc->active_list);
--		dwc_dostart(dwc, dwc_first_active(dwc));
--	}
--	spin_unlock_irqrestore(&dwc->lock, flags);
--}
--
--static inline void dwc_dump_lli(struct dw_dma_chan *dwc, struct dw_lli *lli)
--{
--	dev_crit(chan2dev(&dwc->chan), "  desc: s0x%x d0x%x l0x%x c0x%x:%x\n",
--		 lli->sar, lli->dar, lli->llp, lli->ctlhi, lli->ctllo);
--}
--
--static void dwc_handle_error(struct dw_dma *dw, struct dw_dma_chan *dwc)
--{
--	struct dw_desc *bad_desc;
--	struct dw_desc *child;
--	unsigned long flags;
--
--	dwc_scan_descriptors(dw, dwc);
--
--	spin_lock_irqsave(&dwc->lock, flags);
--
--	/*
--	 * The descriptor currently at the head of the active list is
--	 * borked. Since we don't have any way to report errors, we'll
--	 * just have to scream loudly and try to carry on.
--	 */
--	bad_desc = dwc_first_active(dwc);
--	list_del_init(&bad_desc->desc_node);
--	list_move(dwc->queue.next, dwc->active_list.prev);
--
--	/* Clear the error flag and try to restart the controller */
--	dma_writel(dw, CLEAR.ERROR, dwc->mask);
--	if (!list_empty(&dwc->active_list))
--		dwc_dostart(dwc, dwc_first_active(dwc));
--
--	/*
--	 * WARN may seem harsh, but since this only happens
--	 * when someone submits a bad physical address in a
--	 * descriptor, we should consider ourselves lucky that the
--	 * controller flagged an error instead of scribbling over
--	 * random memory locations.
--	 */
--	dev_WARN(chan2dev(&dwc->chan), "Bad descriptor submitted for DMA!\n"
--				       "  cookie: %d\n", bad_desc->txd.cookie);
--	dwc_dump_lli(dwc, &bad_desc->lli);
--	list_for_each_entry(child, &bad_desc->tx_list, desc_node)
--		dwc_dump_lli(dwc, &child->lli);
--
--	spin_unlock_irqrestore(&dwc->lock, flags);
--
--	/* Pretend the descriptor completed successfully */
--	dwc_descriptor_complete(dwc, bad_desc, true);
--}
--
--/* --------------------- Cyclic DMA API extensions -------------------- */
--
--dma_addr_t dw_dma_get_src_addr(struct dma_chan *chan)
--{
--	struct dw_dma_chan *dwc = to_dw_dma_chan(chan);
--	return channel_readl(dwc, SAR);
--}
--EXPORT_SYMBOL(dw_dma_get_src_addr);
--
--dma_addr_t dw_dma_get_dst_addr(struct dma_chan *chan)
--{
--	struct dw_dma_chan *dwc = to_dw_dma_chan(chan);
--	return channel_readl(dwc, DAR);
--}
--EXPORT_SYMBOL(dw_dma_get_dst_addr);
--
--/* Called with dwc->lock held and all DMAC interrupts disabled */
--static void dwc_handle_cyclic(struct dw_dma *dw, struct dw_dma_chan *dwc,
--		u32 status_err, u32 status_xfer)
--{
--	unsigned long flags;
--
--	if (dwc->mask) {
--		void (*callback)(void *param);
--		void *callback_param;
--
--		dev_vdbg(chan2dev(&dwc->chan), "new cyclic period llp 0x%08x\n",
--				channel_readl(dwc, LLP));
--
--		callback = dwc->cdesc->period_callback;
--		callback_param = dwc->cdesc->period_callback_param;
--
--		if (callback)
--			callback(callback_param);
--	}
--
--	/*
--	 * Error and transfer complete are highly unlikely, and will most
--	 * likely be due to a configuration error by the user.
--	 */
--	if (unlikely(status_err & dwc->mask) ||
--			unlikely(status_xfer & dwc->mask)) {
--		int i;
--
--		dev_err(chan2dev(&dwc->chan), "cyclic DMA unexpected %s "
--				"interrupt, stopping DMA transfer\n",
--				status_xfer ? "xfer" : "error");
--
--		spin_lock_irqsave(&dwc->lock, flags);
--
--		dwc_dump_chan_regs(dwc);
--
--		dwc_chan_disable(dw, dwc);
--
--		/* Make sure DMA does not restart by loading a new list */
--		channel_writel(dwc, LLP, 0);
--		channel_writel(dwc, CTL_LO, 0);
--		channel_writel(dwc, CTL_HI, 0);
--
--		dma_writel(dw, CLEAR.ERROR, dwc->mask);
--		dma_writel(dw, CLEAR.XFER, dwc->mask);
--
--		for (i = 0; i < dwc->cdesc->periods; i++)
--			dwc_dump_lli(dwc, &dwc->cdesc->desc[i]->lli);
--
--		spin_unlock_irqrestore(&dwc->lock, flags);
--	}
--}
--
--/* ------------------------------------------------------------------------- */
--
--static void dw_dma_tasklet(unsigned long data)
--{
--	struct dw_dma *dw = (struct dw_dma *)data;
--	struct dw_dma_chan *dwc;
--	u32 status_xfer;
--	u32 status_err;
--	int i;
--
--	status_xfer = dma_readl(dw, RAW.XFER);
--	status_err = dma_readl(dw, RAW.ERROR);
--
--	dev_vdbg(dw->dma.dev, "%s: status_err=%x\n", __func__, status_err);
--
--	for (i = 0; i < dw->dma.chancnt; i++) {
--		dwc = &dw->chan[i];
--		if (test_bit(DW_DMA_IS_CYCLIC, &dwc->flags))
--			dwc_handle_cyclic(dw, dwc, status_err, status_xfer);
--		else if (status_err & (1 << i))
--			dwc_handle_error(dw, dwc);
--		else if (status_xfer & (1 << i))
--			dwc_scan_descriptors(dw, dwc);
--	}
--
--	/*
--	 * Re-enable interrupts.
--	 */
--	channel_set_bit(dw, MASK.XFER, dw->all_chan_mask);
--	channel_set_bit(dw, MASK.ERROR, dw->all_chan_mask);
--}
--
--static irqreturn_t dw_dma_interrupt(int irq, void *dev_id)
--{
--	struct dw_dma *dw = dev_id;
--	u32 status;
--
--	dev_vdbg(dw->dma.dev, "%s: status=0x%x\n", __func__,
--			dma_readl(dw, STATUS_INT));
--
--	/*
--	 * Just disable the interrupts. We'll turn them back on in the
--	 * softirq handler.
--	 */
--	channel_clear_bit(dw, MASK.XFER, dw->all_chan_mask);
--	channel_clear_bit(dw, MASK.ERROR, dw->all_chan_mask);
--
--	status = dma_readl(dw, STATUS_INT);
--	if (status) {
--		dev_err(dw->dma.dev,
--			"BUG: Unexpected interrupts pending: 0x%x\n",
--			status);
--
--		/* Try to recover */
--		channel_clear_bit(dw, MASK.XFER, (1 << 8) - 1);
--		channel_clear_bit(dw, MASK.SRC_TRAN, (1 << 8) - 1);
--		channel_clear_bit(dw, MASK.DST_TRAN, (1 << 8) - 1);
--		channel_clear_bit(dw, MASK.ERROR, (1 << 8) - 1);
--	}
--
--	tasklet_schedule(&dw->tasklet);
--
--	return IRQ_HANDLED;
--}
--
--/*----------------------------------------------------------------------*/
--
--static dma_cookie_t dwc_tx_submit(struct dma_async_tx_descriptor *tx)
--{
--	struct dw_desc		*desc = txd_to_dw_desc(tx);
--	struct dw_dma_chan	*dwc = to_dw_dma_chan(tx->chan);
--	dma_cookie_t		cookie;
--	unsigned long		flags;
--
--	spin_lock_irqsave(&dwc->lock, flags);
--	cookie = dma_cookie_assign(tx);
--
--	/*
--	 * REVISIT: We should attempt to chain as many descriptors as
--	 * possible, perhaps even appending to those already submitted
--	 * for DMA. But this is hard to do in a race-free manner.
--	 */
--	if (list_empty(&dwc->active_list)) {
--		dev_vdbg(chan2dev(tx->chan), "%s: started %u\n", __func__,
--				desc->txd.cookie);
--		list_add_tail(&desc->desc_node, &dwc->active_list);
--		dwc_dostart(dwc, dwc_first_active(dwc));
--	} else {
--		dev_vdbg(chan2dev(tx->chan), "%s: queued %u\n", __func__,
--				desc->txd.cookie);
--
--		list_add_tail(&desc->desc_node, &dwc->queue);
--	}
--
--	spin_unlock_irqrestore(&dwc->lock, flags);
--
--	return cookie;
--}
--
--static struct dma_async_tx_descriptor *
--dwc_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dest, dma_addr_t src,
--		size_t len, unsigned long flags)
--{
--	struct dw_dma_chan	*dwc = to_dw_dma_chan(chan);
--	struct dw_dma		*dw = to_dw_dma(chan->device);
--	struct dw_desc		*desc;
--	struct dw_desc		*first;
--	struct dw_desc		*prev;
--	size_t			xfer_count;
--	size_t			offset;
--	unsigned int		src_width;
--	unsigned int		dst_width;
--	unsigned int		data_width;
--	u32			ctllo;
--
--	dev_vdbg(chan2dev(chan),
--			"%s: d0x%llx s0x%llx l0x%zx f0x%lx\n", __func__,
--			(unsigned long long)dest, (unsigned long long)src,
--			len, flags);
--
--	if (unlikely(!len)) {
--		dev_dbg(chan2dev(chan), "%s: length is zero!\n", __func__);
--		return NULL;
--	}
--
--	dwc->direction = DMA_MEM_TO_MEM;
--
--	data_width = min_t(unsigned int, dw->data_width[dwc->src_master],
--			   dw->data_width[dwc->dst_master]);
--
--	src_width = dst_width = min_t(unsigned int, data_width,
--				      dwc_fast_fls(src | dest | len));
--
--	ctllo = DWC_DEFAULT_CTLLO(chan)
--			| DWC_CTLL_DST_WIDTH(dst_width)
--			| DWC_CTLL_SRC_WIDTH(src_width)
--			| DWC_CTLL_DST_INC
--			| DWC_CTLL_SRC_INC
--			| DWC_CTLL_FC_M2M;
--	prev = first = NULL;
--
--	for (offset = 0; offset < len; offset += xfer_count << src_width) {
--		xfer_count = min_t(size_t, (len - offset) >> src_width,
--					   dwc->block_size);
--
--		desc = dwc_desc_get(dwc);
--		if (!desc)
--			goto err_desc_get;
--
--		desc->lli.sar = src + offset;
--		desc->lli.dar = dest + offset;
--		desc->lli.ctllo = ctllo;
--		desc->lli.ctlhi = xfer_count;
--		desc->len = xfer_count << src_width;
--
--		if (!first) {
--			first = desc;
--		} else {
--			prev->lli.llp = desc->txd.phys;
--			list_add_tail(&desc->desc_node,
--					&first->tx_list);
--		}
--		prev = desc;
--	}
--
--	if (flags & DMA_PREP_INTERRUPT)
--		/* Trigger interrupt after last block */
--		prev->lli.ctllo |= DWC_CTLL_INT_EN;
--
--	prev->lli.llp = 0;
--	first->txd.flags = flags;
--	first->total_len = len;
--
--	return &first->txd;
--
--err_desc_get:
--	dwc_desc_put(dwc, first);
--	return NULL;
--}
--
--static struct dma_async_tx_descriptor *
--dwc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
--		unsigned int sg_len, enum dma_transfer_direction direction,
--		unsigned long flags, void *context)
--{
--	struct dw_dma_chan	*dwc = to_dw_dma_chan(chan);
--	struct dw_dma		*dw = to_dw_dma(chan->device);
--	struct dma_slave_config	*sconfig = &dwc->dma_sconfig;
--	struct dw_desc		*prev;
--	struct dw_desc		*first;
--	u32			ctllo;
--	dma_addr_t		reg;
--	unsigned int		reg_width;
--	unsigned int		mem_width;
--	unsigned int		data_width;
--	unsigned int		i;
--	struct scatterlist	*sg;
--	size_t			total_len = 0;
--
--	dev_vdbg(chan2dev(chan), "%s\n", __func__);
--
--	if (unlikely(!is_slave_direction(direction) || !sg_len))
--		return NULL;
--
--	dwc->direction = direction;
--
--	prev = first = NULL;
--
--	switch (direction) {
--	case DMA_MEM_TO_DEV:
--		reg_width = __fls(sconfig->dst_addr_width);
--		reg = sconfig->dst_addr;
--		ctllo = (DWC_DEFAULT_CTLLO(chan)
--				| DWC_CTLL_DST_WIDTH(reg_width)
--				| DWC_CTLL_DST_FIX
--				| DWC_CTLL_SRC_INC);
--
--		ctllo |= sconfig->device_fc ? DWC_CTLL_FC(DW_DMA_FC_P_M2P) :
--			DWC_CTLL_FC(DW_DMA_FC_D_M2P);
--
--		data_width = dw->data_width[dwc->src_master];
--
--		for_each_sg(sgl, sg, sg_len, i) {
--			struct dw_desc	*desc;
--			u32		len, dlen, mem;
--
--			mem = sg_dma_address(sg);
--			len = sg_dma_len(sg);
--
--			mem_width = min_t(unsigned int,
--					  data_width, dwc_fast_fls(mem | len));
--
--slave_sg_todev_fill_desc:
--			desc = dwc_desc_get(dwc);
--			if (!desc) {
--				dev_err(chan2dev(chan),
--					"not enough descriptors available\n");
--				goto err_desc_get;
--			}
--
--			desc->lli.sar = mem;
--			desc->lli.dar = reg;
--			desc->lli.ctllo = ctllo | DWC_CTLL_SRC_WIDTH(mem_width);
--			if ((len >> mem_width) > dwc->block_size) {
--				dlen = dwc->block_size << mem_width;
--				mem += dlen;
--				len -= dlen;
--			} else {
--				dlen = len;
--				len = 0;
--			}
--
--			desc->lli.ctlhi = dlen >> mem_width;
--			desc->len = dlen;
--
--			if (!first) {
--				first = desc;
--			} else {
--				prev->lli.llp = desc->txd.phys;
--				list_add_tail(&desc->desc_node,
--						&first->tx_list);
--			}
--			prev = desc;
--			total_len += dlen;
--
--			if (len)
--				goto slave_sg_todev_fill_desc;
--		}
--		break;
--	case DMA_DEV_TO_MEM:
--		reg_width = __fls(sconfig->src_addr_width);
--		reg = sconfig->src_addr;
--		ctllo = (DWC_DEFAULT_CTLLO(chan)
--				| DWC_CTLL_SRC_WIDTH(reg_width)
--				| DWC_CTLL_DST_INC
--				| DWC_CTLL_SRC_FIX);
--
--		ctllo |= sconfig->device_fc ? DWC_CTLL_FC(DW_DMA_FC_P_P2M) :
--			DWC_CTLL_FC(DW_DMA_FC_D_P2M);
--
--		data_width = dw->data_width[dwc->dst_master];
--
--		for_each_sg(sgl, sg, sg_len, i) {
--			struct dw_desc	*desc;
--			u32		len, dlen, mem;
--
--			mem = sg_dma_address(sg);
--			len = sg_dma_len(sg);
--
--			mem_width = min_t(unsigned int,
--					  data_width, dwc_fast_fls(mem | len));
--
--slave_sg_fromdev_fill_desc:
--			desc = dwc_desc_get(dwc);
--			if (!desc) {
--				dev_err(chan2dev(chan),
--						"not enough descriptors available\n");
--				goto err_desc_get;
--			}
--
--			desc->lli.sar = reg;
--			desc->lli.dar = mem;
--			desc->lli.ctllo = ctllo | DWC_CTLL_DST_WIDTH(mem_width);
--			if ((len >> reg_width) > dwc->block_size) {
--				dlen = dwc->block_size << reg_width;
--				mem += dlen;
--				len -= dlen;
--			} else {
--				dlen = len;
--				len = 0;
--			}
--			desc->lli.ctlhi = dlen >> reg_width;
--			desc->len = dlen;
--
--			if (!first) {
--				first = desc;
--			} else {
--				prev->lli.llp = desc->txd.phys;
--				list_add_tail(&desc->desc_node,
--						&first->tx_list);
--			}
--			prev = desc;
--			total_len += dlen;
--
--			if (len)
--				goto slave_sg_fromdev_fill_desc;
--		}
--		break;
--	default:
--		return NULL;
--	}
--
--	if (flags & DMA_PREP_INTERRUPT)
--		/* Trigger interrupt after last block */
--		prev->lli.ctllo |= DWC_CTLL_INT_EN;
--
--	prev->lli.llp = 0;
--	first->total_len = total_len;
--
--	return &first->txd;
--
--err_desc_get:
--	dwc_desc_put(dwc, first);
--	return NULL;
--}
--
--/*
-- * Fix sconfig's burst size according to dw_dmac. We need to convert them as:
-- * 1 -> 0, 4 -> 1, 8 -> 2, 16 -> 3.
-- *
-- * NOTE: burst size 2 is not supported by controller.
-- *
-- * This can be done by finding least significant bit set: n & (n - 1)
-- */
--static inline void convert_burst(u32 *maxburst)
--{
--	if (*maxburst > 1)
--		*maxburst = fls(*maxburst) - 2;
--	else
--		*maxburst = 0;
--}
--
--static int
--set_runtime_config(struct dma_chan *chan, struct dma_slave_config *sconfig)
--{
--	struct dw_dma_chan *dwc = to_dw_dma_chan(chan);
--
--	/* Check if chan will be configured for slave transfers */
--	if (!is_slave_direction(sconfig->direction))
--		return -EINVAL;
--
--	memcpy(&dwc->dma_sconfig, sconfig, sizeof(*sconfig));
--	dwc->direction = sconfig->direction;
--
--	/* Take the request line from slave_id member */
--	if (dwc->request_line == ~0)
--		dwc->request_line = sconfig->slave_id;
--
--	convert_burst(&dwc->dma_sconfig.src_maxburst);
--	convert_burst(&dwc->dma_sconfig.dst_maxburst);
--
--	return 0;
--}
--
--static inline void dwc_chan_pause(struct dw_dma_chan *dwc)
--{
--	u32 cfglo = channel_readl(dwc, CFG_LO);
--	unsigned int count = 20;	/* timeout iterations */
--
--	channel_writel(dwc, CFG_LO, cfglo | DWC_CFGL_CH_SUSP);
--	while (!(channel_readl(dwc, CFG_LO) & DWC_CFGL_FIFO_EMPTY) && count--)
--		udelay(2);
--
--	dwc->paused = true;
--}
--
--static inline void dwc_chan_resume(struct dw_dma_chan *dwc)
--{
--	u32 cfglo = channel_readl(dwc, CFG_LO);
--
--	channel_writel(dwc, CFG_LO, cfglo & ~DWC_CFGL_CH_SUSP);
--
--	dwc->paused = false;
--}
--
--static int dwc_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
--		       unsigned long arg)
--{
--	struct dw_dma_chan	*dwc = to_dw_dma_chan(chan);
--	struct dw_dma		*dw = to_dw_dma(chan->device);
--	struct dw_desc		*desc, *_desc;
--	unsigned long		flags;
--	LIST_HEAD(list);
--
--	if (cmd == DMA_PAUSE) {
--		spin_lock_irqsave(&dwc->lock, flags);
--
--		dwc_chan_pause(dwc);
--
--		spin_unlock_irqrestore(&dwc->lock, flags);
--	} else if (cmd == DMA_RESUME) {
--		if (!dwc->paused)
--			return 0;
--
--		spin_lock_irqsave(&dwc->lock, flags);
--
--		dwc_chan_resume(dwc);
--
--		spin_unlock_irqrestore(&dwc->lock, flags);
--	} else if (cmd == DMA_TERMINATE_ALL) {
--		spin_lock_irqsave(&dwc->lock, flags);
--
--		clear_bit(DW_DMA_IS_SOFT_LLP, &dwc->flags);
--
--		dwc_chan_disable(dw, dwc);
--
--		dwc_chan_resume(dwc);
--
--		/* active_list entries will end up before queued entries */
--		list_splice_init(&dwc->queue, &list);
--		list_splice_init(&dwc->active_list, &list);
--
--		spin_unlock_irqrestore(&dwc->lock, flags);
--
--		/* Flush all pending and queued descriptors */
--		list_for_each_entry_safe(desc, _desc, &list, desc_node)
--			dwc_descriptor_complete(dwc, desc, false);
--	} else if (cmd == DMA_SLAVE_CONFIG) {
--		return set_runtime_config(chan, (struct dma_slave_config *)arg);
--	} else {
--		return -ENXIO;
--	}
--
--	return 0;
--}
--
--static inline u32 dwc_get_residue(struct dw_dma_chan *dwc)
--{
--	unsigned long flags;
--	u32 residue;
--
--	spin_lock_irqsave(&dwc->lock, flags);
--
--	residue = dwc->residue;
--	if (test_bit(DW_DMA_IS_SOFT_LLP, &dwc->flags) && residue)
--		residue -= dwc_get_sent(dwc);
--
--	spin_unlock_irqrestore(&dwc->lock, flags);
--	return residue;
--}
--
--static enum dma_status
--dwc_tx_status(struct dma_chan *chan,
--	      dma_cookie_t cookie,
--	      struct dma_tx_state *txstate)
--{
--	struct dw_dma_chan	*dwc = to_dw_dma_chan(chan);
--	enum dma_status		ret;
--
--	ret = dma_cookie_status(chan, cookie, txstate);
--	if (ret != DMA_SUCCESS) {
--		dwc_scan_descriptors(to_dw_dma(chan->device), dwc);
--
--		ret = dma_cookie_status(chan, cookie, txstate);
--	}
--
--	if (ret != DMA_SUCCESS)
--		dma_set_residue(txstate, dwc_get_residue(dwc));
--
--	if (dwc->paused)
--		return DMA_PAUSED;
--
--	return ret;
--}
--
--static void dwc_issue_pending(struct dma_chan *chan)
--{
--	struct dw_dma_chan	*dwc = to_dw_dma_chan(chan);
--
--	if (!list_empty(&dwc->queue))
--		dwc_scan_descriptors(to_dw_dma(chan->device), dwc);
--}
--
--static int dwc_alloc_chan_resources(struct dma_chan *chan)
--{
--	struct dw_dma_chan	*dwc = to_dw_dma_chan(chan);
--	struct dw_dma		*dw = to_dw_dma(chan->device);
--	struct dw_desc		*desc;
--	int			i;
--	unsigned long		flags;
--
--	dev_vdbg(chan2dev(chan), "%s\n", __func__);
--
--	/* ASSERT:  channel is idle */
--	if (dma_readl(dw, CH_EN) & dwc->mask) {
--		dev_dbg(chan2dev(chan), "DMA channel not idle?\n");
--		return -EIO;
--	}
--
--	dma_cookie_init(chan);
--
--	/*
--	 * NOTE: some controllers may have additional features that we
--	 * need to initialize here, like "scatter-gather" (which
--	 * doesn't mean what you think it means), and status writeback.
--	 */
--
--	dwc_set_masters(dwc);
--
--	spin_lock_irqsave(&dwc->lock, flags);
--	i = dwc->descs_allocated;
--	while (dwc->descs_allocated < NR_DESCS_PER_CHANNEL) {
--		dma_addr_t phys;
--
--		spin_unlock_irqrestore(&dwc->lock, flags);
--
--		desc = dma_pool_alloc(dw->desc_pool, GFP_ATOMIC, &phys);
--		if (!desc)
--			goto err_desc_alloc;
--
--		memset(desc, 0, sizeof(struct dw_desc));
--
--		INIT_LIST_HEAD(&desc->tx_list);
--		dma_async_tx_descriptor_init(&desc->txd, chan);
--		desc->txd.tx_submit = dwc_tx_submit;
--		desc->txd.flags = DMA_CTRL_ACK;
--		desc->txd.phys = phys;
--
--		dwc_desc_put(dwc, desc);
--
--		spin_lock_irqsave(&dwc->lock, flags);
--		i = ++dwc->descs_allocated;
--	}
--
--	spin_unlock_irqrestore(&dwc->lock, flags);
--
--	dev_dbg(chan2dev(chan), "%s: allocated %d descriptors\n", __func__, i);
--
--	return i;
--
--err_desc_alloc:
--	dev_info(chan2dev(chan), "only allocated %d descriptors\n", i);
--
--	return i;
--}
--
--static void dwc_free_chan_resources(struct dma_chan *chan)
--{
--	struct dw_dma_chan	*dwc = to_dw_dma_chan(chan);
--	struct dw_dma		*dw = to_dw_dma(chan->device);
--	struct dw_desc		*desc, *_desc;
--	unsigned long		flags;
--	LIST_HEAD(list);
--
--	dev_dbg(chan2dev(chan), "%s: descs allocated=%u\n", __func__,
--			dwc->descs_allocated);
--
--	/* ASSERT:  channel is idle */
--	BUG_ON(!list_empty(&dwc->active_list));
--	BUG_ON(!list_empty(&dwc->queue));
--	BUG_ON(dma_readl(to_dw_dma(chan->device), CH_EN) & dwc->mask);
--
--	spin_lock_irqsave(&dwc->lock, flags);
--	list_splice_init(&dwc->free_list, &list);
--	dwc->descs_allocated = 0;
--	dwc->initialized = false;
--	dwc->request_line = ~0;
--
--	/* Disable interrupts */
--	channel_clear_bit(dw, MASK.XFER, dwc->mask);
--	channel_clear_bit(dw, MASK.ERROR, dwc->mask);
--
--	spin_unlock_irqrestore(&dwc->lock, flags);
--
--	list_for_each_entry_safe(desc, _desc, &list, desc_node) {
--		dev_vdbg(chan2dev(chan), "  freeing descriptor %p\n", desc);
--		dma_pool_free(dw->desc_pool, desc, desc->txd.phys);
--	}
--
--	dev_vdbg(chan2dev(chan), "%s: done\n", __func__);
--}
--
--/*----------------------------------------------------------------------*/
--
--struct dw_dma_of_filter_args {
--	struct dw_dma *dw;
--	unsigned int req;
--	unsigned int src;
--	unsigned int dst;
--};
--
--static bool dw_dma_of_filter(struct dma_chan *chan, void *param)
--{
--	struct dw_dma_chan *dwc = to_dw_dma_chan(chan);
--	struct dw_dma_of_filter_args *fargs = param;
--
--	/* Ensure the device matches our channel */
--        if (chan->device != &fargs->dw->dma)
--                return false;
--
--	dwc->request_line = fargs->req;
--	dwc->src_master	= fargs->src;
--	dwc->dst_master	= fargs->dst;
--
--	return true;
--}
--
--static struct dma_chan *dw_dma_of_xlate(struct of_phandle_args *dma_spec,
--					struct of_dma *ofdma)
--{
--	struct dw_dma *dw = ofdma->of_dma_data;
--	struct dw_dma_of_filter_args fargs = {
--		.dw = dw,
--	};
--	dma_cap_mask_t cap;
--
--	if (dma_spec->args_count != 3)
--		return NULL;
--
--	fargs.req = dma_spec->args[0];
--	fargs.src = dma_spec->args[1];
--	fargs.dst = dma_spec->args[2];
--
--	if (WARN_ON(fargs.req >= DW_DMA_MAX_NR_REQUESTS ||
--		    fargs.src >= dw->nr_masters ||
--		    fargs.dst >= dw->nr_masters))
--		return NULL;
--
--	dma_cap_zero(cap);
--	dma_cap_set(DMA_SLAVE, cap);
--
--	/* TODO: there should be a simpler way to do this */
--	return dma_request_channel(cap, dw_dma_of_filter, &fargs);
--}
--
--#ifdef CONFIG_ACPI
--static bool dw_dma_acpi_filter(struct dma_chan *chan, void *param)
--{
--	struct dw_dma_chan *dwc = to_dw_dma_chan(chan);
--	struct acpi_dma_spec *dma_spec = param;
--
--	if (chan->device->dev != dma_spec->dev ||
--	    chan->chan_id != dma_spec->chan_id)
--		return false;
--
--	dwc->request_line = dma_spec->slave_id;
--	dwc->src_master = dwc_get_sms(NULL);
--	dwc->dst_master = dwc_get_dms(NULL);
--
--	return true;
--}
--
--static void dw_dma_acpi_controller_register(struct dw_dma *dw)
--{
--	struct device *dev = dw->dma.dev;
--	struct acpi_dma_filter_info *info;
--	int ret;
--
--	info = devm_kzalloc(dev, sizeof(*info), GFP_KERNEL);
--	if (!info)
--		return;
--
--	dma_cap_zero(info->dma_cap);
--	dma_cap_set(DMA_SLAVE, info->dma_cap);
--	info->filter_fn = dw_dma_acpi_filter;
--
--	ret = devm_acpi_dma_controller_register(dev, acpi_dma_simple_xlate,
--						info);
--	if (ret)
--		dev_err(dev, "could not register acpi_dma_controller\n");
--}
--#else /* !CONFIG_ACPI */
--static inline void dw_dma_acpi_controller_register(struct dw_dma *dw) {}
--#endif /* !CONFIG_ACPI */
--
--/* --------------------- Cyclic DMA API extensions -------------------- */
--
--/**
-- * dw_dma_cyclic_start - start the cyclic DMA transfer
-- * @chan: the DMA channel to start
-- *
-- * Must be called with soft interrupts disabled. Returns zero on success or
-- * -errno on failure.
-- */
--int dw_dma_cyclic_start(struct dma_chan *chan)
--{
--	struct dw_dma_chan	*dwc = to_dw_dma_chan(chan);
--	struct dw_dma		*dw = to_dw_dma(dwc->chan.device);
--	unsigned long		flags;
--
--	if (!test_bit(DW_DMA_IS_CYCLIC, &dwc->flags)) {
--		dev_err(chan2dev(&dwc->chan), "missing prep for cyclic DMA\n");
--		return -ENODEV;
--	}
--
--	spin_lock_irqsave(&dwc->lock, flags);
--
--	/* Assert channel is idle */
--	if (dma_readl(dw, CH_EN) & dwc->mask) {
--		dev_err(chan2dev(&dwc->chan),
--			"BUG: Attempted to start non-idle channel\n");
--		dwc_dump_chan_regs(dwc);
--		spin_unlock_irqrestore(&dwc->lock, flags);
--		return -EBUSY;
--	}
--
--	dma_writel(dw, CLEAR.ERROR, dwc->mask);
--	dma_writel(dw, CLEAR.XFER, dwc->mask);
--
--	/* Setup DMAC channel registers */
--	channel_writel(dwc, LLP, dwc->cdesc->desc[0]->txd.phys);
--	channel_writel(dwc, CTL_LO, DWC_CTLL_LLP_D_EN | DWC_CTLL_LLP_S_EN);
--	channel_writel(dwc, CTL_HI, 0);
--
--	channel_set_bit(dw, CH_EN, dwc->mask);
--
--	spin_unlock_irqrestore(&dwc->lock, flags);
--
--	return 0;
--}
--EXPORT_SYMBOL(dw_dma_cyclic_start);
--
--/**
-- * dw_dma_cyclic_stop - stop the cyclic DMA transfer
-- * @chan: the DMA channel to stop
-- *
-- * Must be called with soft interrupts disabled.
-- */
--void dw_dma_cyclic_stop(struct dma_chan *chan)
--{
--	struct dw_dma_chan	*dwc = to_dw_dma_chan(chan);
--	struct dw_dma		*dw = to_dw_dma(dwc->chan.device);
--	unsigned long		flags;
--
--	spin_lock_irqsave(&dwc->lock, flags);
--
--	dwc_chan_disable(dw, dwc);
--
--	spin_unlock_irqrestore(&dwc->lock, flags);
--}
--EXPORT_SYMBOL(dw_dma_cyclic_stop);
--
--/**
-- * dw_dma_cyclic_prep - prepare the cyclic DMA transfer
-- * @chan: the DMA channel to prepare
-- * @buf_addr: physical DMA address where the buffer starts
-- * @buf_len: total number of bytes for the entire buffer
-- * @period_len: number of bytes for each period
-- * @direction: transfer direction, to or from device
-- *
-- * Must be called before trying to start the transfer. Returns a valid struct
-- * dw_cyclic_desc if successful or an ERR_PTR(-errno) if not successful.
-- */
--struct dw_cyclic_desc *dw_dma_cyclic_prep(struct dma_chan *chan,
--		dma_addr_t buf_addr, size_t buf_len, size_t period_len,
--		enum dma_transfer_direction direction)
--{
--	struct dw_dma_chan		*dwc = to_dw_dma_chan(chan);
--	struct dma_slave_config		*sconfig = &dwc->dma_sconfig;
--	struct dw_cyclic_desc		*cdesc;
--	struct dw_cyclic_desc		*retval = NULL;
--	struct dw_desc			*desc;
--	struct dw_desc			*last = NULL;
--	unsigned long			was_cyclic;
--	unsigned int			reg_width;
--	unsigned int			periods;
--	unsigned int			i;
--	unsigned long			flags;
--
--	spin_lock_irqsave(&dwc->lock, flags);
--	if (dwc->nollp) {
--		spin_unlock_irqrestore(&dwc->lock, flags);
--		dev_dbg(chan2dev(&dwc->chan),
--				"channel doesn't support LLP transfers\n");
--		return ERR_PTR(-EINVAL);
--	}
--
--	if (!list_empty(&dwc->queue) || !list_empty(&dwc->active_list)) {
--		spin_unlock_irqrestore(&dwc->lock, flags);
--		dev_dbg(chan2dev(&dwc->chan),
--				"queue and/or active list are not empty\n");
--		return ERR_PTR(-EBUSY);
--	}
--
--	was_cyclic = test_and_set_bit(DW_DMA_IS_CYCLIC, &dwc->flags);
--	spin_unlock_irqrestore(&dwc->lock, flags);
--	if (was_cyclic) {
--		dev_dbg(chan2dev(&dwc->chan),
--				"channel already prepared for cyclic DMA\n");
--		return ERR_PTR(-EBUSY);
--	}
--
--	retval = ERR_PTR(-EINVAL);
--
--	if (unlikely(!is_slave_direction(direction)))
--		goto out_err;
--
--	dwc->direction = direction;
--
--	if (direction == DMA_MEM_TO_DEV)
--		reg_width = __ffs(sconfig->dst_addr_width);
--	else
--		reg_width = __ffs(sconfig->src_addr_width);
--
--	periods = buf_len / period_len;
--
--	/* Check for too big/unaligned periods and unaligned DMA buffer. */
--	if (period_len > (dwc->block_size << reg_width))
--		goto out_err;
--	if (unlikely(period_len & ((1 << reg_width) - 1)))
--		goto out_err;
--	if (unlikely(buf_addr & ((1 << reg_width) - 1)))
--		goto out_err;
--
--	retval = ERR_PTR(-ENOMEM);
--
--	if (periods > NR_DESCS_PER_CHANNEL)
--		goto out_err;
--
--	cdesc = kzalloc(sizeof(struct dw_cyclic_desc), GFP_KERNEL);
--	if (!cdesc)
--		goto out_err;
--
--	cdesc->desc = kzalloc(sizeof(struct dw_desc *) * periods, GFP_KERNEL);
--	if (!cdesc->desc)
--		goto out_err_alloc;
--
--	for (i = 0; i < periods; i++) {
--		desc = dwc_desc_get(dwc);
--		if (!desc)
--			goto out_err_desc_get;
--
--		switch (direction) {
--		case DMA_MEM_TO_DEV:
--			desc->lli.dar = sconfig->dst_addr;
--			desc->lli.sar = buf_addr + (period_len * i);
--			desc->lli.ctllo = (DWC_DEFAULT_CTLLO(chan)
--					| DWC_CTLL_DST_WIDTH(reg_width)
--					| DWC_CTLL_SRC_WIDTH(reg_width)
--					| DWC_CTLL_DST_FIX
--					| DWC_CTLL_SRC_INC
--					| DWC_CTLL_INT_EN);
--
--			desc->lli.ctllo |= sconfig->device_fc ?
--				DWC_CTLL_FC(DW_DMA_FC_P_M2P) :
--				DWC_CTLL_FC(DW_DMA_FC_D_M2P);
--
--			break;
--		case DMA_DEV_TO_MEM:
--			desc->lli.dar = buf_addr + (period_len * i);
--			desc->lli.sar = sconfig->src_addr;
--			desc->lli.ctllo = (DWC_DEFAULT_CTLLO(chan)
--					| DWC_CTLL_SRC_WIDTH(reg_width)
--					| DWC_CTLL_DST_WIDTH(reg_width)
--					| DWC_CTLL_DST_INC
--					| DWC_CTLL_SRC_FIX
--					| DWC_CTLL_INT_EN);
--
--			desc->lli.ctllo |= sconfig->device_fc ?
--				DWC_CTLL_FC(DW_DMA_FC_P_P2M) :
--				DWC_CTLL_FC(DW_DMA_FC_D_P2M);
--
--			break;
--		default:
--			break;
--		}
--
--		desc->lli.ctlhi = (period_len >> reg_width);
--		cdesc->desc[i] = desc;
--
--		if (last)
--			last->lli.llp = desc->txd.phys;
--
--		last = desc;
--	}
--
--	/* Let's make a cyclic list */
--	last->lli.llp = cdesc->desc[0]->txd.phys;
--
--	dev_dbg(chan2dev(&dwc->chan), "cyclic prepared buf 0x%llx len %zu "
--			"period %zu periods %d\n", (unsigned long long)buf_addr,
--			buf_len, period_len, periods);
--
--	cdesc->periods = periods;
--	dwc->cdesc = cdesc;
--
--	return cdesc;
--
--out_err_desc_get:
--	while (i--)
--		dwc_desc_put(dwc, cdesc->desc[i]);
--out_err_alloc:
--	kfree(cdesc);
--out_err:
--	clear_bit(DW_DMA_IS_CYCLIC, &dwc->flags);
--	return (struct dw_cyclic_desc *)retval;
--}
--EXPORT_SYMBOL(dw_dma_cyclic_prep);
--
--/**
-- * dw_dma_cyclic_free - free a prepared cyclic DMA transfer
-- * @chan: the DMA channel to free
-- */
--void dw_dma_cyclic_free(struct dma_chan *chan)
--{
--	struct dw_dma_chan	*dwc = to_dw_dma_chan(chan);
--	struct dw_dma		*dw = to_dw_dma(dwc->chan.device);
--	struct dw_cyclic_desc	*cdesc = dwc->cdesc;
--	int			i;
--	unsigned long		flags;
--
--	dev_dbg(chan2dev(&dwc->chan), "%s\n", __func__);
--
--	if (!cdesc)
--		return;
--
--	spin_lock_irqsave(&dwc->lock, flags);
--
--	dwc_chan_disable(dw, dwc);
--
--	dma_writel(dw, CLEAR.ERROR, dwc->mask);
--	dma_writel(dw, CLEAR.XFER, dwc->mask);
--
--	spin_unlock_irqrestore(&dwc->lock, flags);
--
--	for (i = 0; i < cdesc->periods; i++)
--		dwc_desc_put(dwc, cdesc->desc[i]);
--
--	kfree(cdesc->desc);
--	kfree(cdesc);
--
--	clear_bit(DW_DMA_IS_CYCLIC, &dwc->flags);
--}
--EXPORT_SYMBOL(dw_dma_cyclic_free);
--
--/*----------------------------------------------------------------------*/
--
--static void dw_dma_off(struct dw_dma *dw)
--{
--	int i;
--
--	dma_writel(dw, CFG, 0);
--
--	channel_clear_bit(dw, MASK.XFER, dw->all_chan_mask);
--	channel_clear_bit(dw, MASK.SRC_TRAN, dw->all_chan_mask);
--	channel_clear_bit(dw, MASK.DST_TRAN, dw->all_chan_mask);
--	channel_clear_bit(dw, MASK.ERROR, dw->all_chan_mask);
--
--	while (dma_readl(dw, CFG) & DW_CFG_DMA_EN)
--		cpu_relax();
--
--	for (i = 0; i < dw->dma.chancnt; i++)
--		dw->chan[i].initialized = false;
--}
--
--#ifdef CONFIG_OF
--static struct dw_dma_platform_data *
--dw_dma_parse_dt(struct platform_device *pdev)
--{
--	struct device_node *np = pdev->dev.of_node;
--	struct dw_dma_platform_data *pdata;
--	u32 tmp, arr[4];
--
--	if (!np) {
--		dev_err(&pdev->dev, "Missing DT data\n");
--		return NULL;
--	}
--
--	pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
--	if (!pdata)
--		return NULL;
--
--	if (of_property_read_u32(np, "dma-channels", &pdata->nr_channels))
--		return NULL;
--
--	if (of_property_read_bool(np, "is_private"))
--		pdata->is_private = true;
--
--	if (!of_property_read_u32(np, "chan_allocation_order", &tmp))
--		pdata->chan_allocation_order = (unsigned char)tmp;
--
--	if (!of_property_read_u32(np, "chan_priority", &tmp))
--		pdata->chan_priority = tmp;
--
--	if (!of_property_read_u32(np, "block_size", &tmp))
--		pdata->block_size = tmp;
--
--	if (!of_property_read_u32(np, "dma-masters", &tmp)) {
--		if (tmp > 4)
--			return NULL;
--
--		pdata->nr_masters = tmp;
--	}
--
--	if (!of_property_read_u32_array(np, "data_width", arr,
--				pdata->nr_masters))
--		for (tmp = 0; tmp < pdata->nr_masters; tmp++)
--			pdata->data_width[tmp] = arr[tmp];
--
--	return pdata;
--}
--#else
--static inline struct dw_dma_platform_data *
--dw_dma_parse_dt(struct platform_device *pdev)
--{
--	return NULL;
--}
--#endif
--
--static int dw_probe(struct platform_device *pdev)
--{
--	struct dw_dma_platform_data *pdata;
--	struct resource		*io;
--	struct dw_dma		*dw;
--	size_t			size;
--	void __iomem		*regs;
--	bool			autocfg;
--	unsigned int		dw_params;
--	unsigned int		nr_channels;
--	unsigned int		max_blk_size = 0;
--	int			irq;
--	int			err;
--	int			i;
--
--	irq = platform_get_irq(pdev, 0);
--	if (irq < 0)
--		return irq;
--
--	io = platform_get_resource(pdev, IORESOURCE_MEM, 0);
--	regs = devm_ioremap_resource(&pdev->dev, io);
--	if (IS_ERR(regs))
--		return PTR_ERR(regs);
--
--	/* Apply default dma_mask if needed */
--	if (!pdev->dev.dma_mask) {
--		pdev->dev.dma_mask = &pdev->dev.coherent_dma_mask;
--		pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
--	}
--
--	dw_params = dma_read_byaddr(regs, DW_PARAMS);
--	autocfg = dw_params >> DW_PARAMS_EN & 0x1;
--
--	dev_dbg(&pdev->dev, "DW_PARAMS: 0x%08x\n", dw_params);
--
--	pdata = dev_get_platdata(&pdev->dev);
--	if (!pdata)
--		pdata = dw_dma_parse_dt(pdev);
--
--	if (!pdata && autocfg) {
--		pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
--		if (!pdata)
--			return -ENOMEM;
--
--		/* Fill platform data with the default values */
--		pdata->is_private = true;
--		pdata->chan_allocation_order = CHAN_ALLOCATION_ASCENDING;
--		pdata->chan_priority = CHAN_PRIORITY_ASCENDING;
--	} else if (!pdata || pdata->nr_channels > DW_DMA_MAX_NR_CHANNELS)
--		return -EINVAL;
--
--	if (autocfg)
--		nr_channels = (dw_params >> DW_PARAMS_NR_CHAN & 0x7) + 1;
--	else
--		nr_channels = pdata->nr_channels;
--
--	size = sizeof(struct dw_dma) + nr_channels * sizeof(struct dw_dma_chan);
--	dw = devm_kzalloc(&pdev->dev, size, GFP_KERNEL);
--	if (!dw)
--		return -ENOMEM;
--
--	dw->clk = devm_clk_get(&pdev->dev, "hclk");
--	if (IS_ERR(dw->clk))
--		return PTR_ERR(dw->clk);
--	clk_prepare_enable(dw->clk);
--
--	dw->regs = regs;
--
--	/* Get hardware configuration parameters */
--	if (autocfg) {
--		max_blk_size = dma_readl(dw, MAX_BLK_SIZE);
--
--		dw->nr_masters = (dw_params >> DW_PARAMS_NR_MASTER & 3) + 1;
--		for (i = 0; i < dw->nr_masters; i++) {
--			dw->data_width[i] =
--				(dw_params >> DW_PARAMS_DATA_WIDTH(i) & 3) + 2;
--		}
--	} else {
--		dw->nr_masters = pdata->nr_masters;
--		memcpy(dw->data_width, pdata->data_width, 4);
--	}
--
--	/* Calculate all channel mask before DMA setup */
--	dw->all_chan_mask = (1 << nr_channels) - 1;
--
--	/* Force dma off, just in case */
--	dw_dma_off(dw);
--
--	/* Disable BLOCK interrupts as well */
--	channel_clear_bit(dw, MASK.BLOCK, dw->all_chan_mask);
--
--	err = devm_request_irq(&pdev->dev, irq, dw_dma_interrupt, 0,
--			       "dw_dmac", dw);
--	if (err)
--		return err;
--
--	platform_set_drvdata(pdev, dw);
--
--	/* Create a pool of consistent memory blocks for hardware descriptors */
--	dw->desc_pool = dmam_pool_create("dw_dmac_desc_pool", &pdev->dev,
--					 sizeof(struct dw_desc), 4, 0);
--	if (!dw->desc_pool) {
--		dev_err(&pdev->dev, "No memory for descriptors dma pool\n");
--		return -ENOMEM;
--	}
--
--	tasklet_init(&dw->tasklet, dw_dma_tasklet, (unsigned long)dw);
--
--	INIT_LIST_HEAD(&dw->dma.channels);
--	for (i = 0; i < nr_channels; i++) {
--		struct dw_dma_chan	*dwc = &dw->chan[i];
--		int			r = nr_channels - i - 1;
--
--		dwc->chan.device = &dw->dma;
--		dma_cookie_init(&dwc->chan);
--		if (pdata->chan_allocation_order == CHAN_ALLOCATION_ASCENDING)
--			list_add_tail(&dwc->chan.device_node,
--					&dw->dma.channels);
--		else
--			list_add(&dwc->chan.device_node, &dw->dma.channels);
--
--		/* 7 is highest priority & 0 is lowest. */
--		if (pdata->chan_priority == CHAN_PRIORITY_ASCENDING)
--			dwc->priority = r;
--		else
--			dwc->priority = i;
--
--		dwc->ch_regs = &__dw_regs(dw)->CHAN[i];
--		spin_lock_init(&dwc->lock);
--		dwc->mask = 1 << i;
--
--		INIT_LIST_HEAD(&dwc->active_list);
--		INIT_LIST_HEAD(&dwc->queue);
--		INIT_LIST_HEAD(&dwc->free_list);
--
--		channel_clear_bit(dw, CH_EN, dwc->mask);
--
--		dwc->direction = DMA_TRANS_NONE;
--		dwc->request_line = ~0;
--
--		/* Hardware configuration */
--		if (autocfg) {
--			unsigned int dwc_params;
--
--			dwc_params = dma_read_byaddr(regs + r * sizeof(u32),
--						     DWC_PARAMS);
--
--			dev_dbg(&pdev->dev, "DWC_PARAMS[%d]: 0x%08x\n", i,
--					    dwc_params);
--
--			/* Decode maximum block size for given channel. The
--			 * stored 4 bit value represents blocks from 0x00 for 3
--			 * up to 0x0a for 4095. */
--			dwc->block_size =
--				(4 << ((max_blk_size >> 4 * i) & 0xf)) - 1;
--			dwc->nollp =
--				(dwc_params >> DWC_PARAMS_MBLK_EN & 0x1) == 0;
--		} else {
--			dwc->block_size = pdata->block_size;
--
--			/* Check if channel supports multi block transfer */
--			channel_writel(dwc, LLP, 0xfffffffc);
--			dwc->nollp =
--				(channel_readl(dwc, LLP) & 0xfffffffc) == 0;
--			channel_writel(dwc, LLP, 0);
--		}
--	}
--
--	/* Clear all interrupts on all channels. */
--	dma_writel(dw, CLEAR.XFER, dw->all_chan_mask);
--	dma_writel(dw, CLEAR.BLOCK, dw->all_chan_mask);
--	dma_writel(dw, CLEAR.SRC_TRAN, dw->all_chan_mask);
--	dma_writel(dw, CLEAR.DST_TRAN, dw->all_chan_mask);
--	dma_writel(dw, CLEAR.ERROR, dw->all_chan_mask);
--
--	dma_cap_set(DMA_MEMCPY, dw->dma.cap_mask);
--	dma_cap_set(DMA_SLAVE, dw->dma.cap_mask);
--	if (pdata->is_private)
--		dma_cap_set(DMA_PRIVATE, dw->dma.cap_mask);
--	dw->dma.dev = &pdev->dev;
--	dw->dma.device_alloc_chan_resources = dwc_alloc_chan_resources;
--	dw->dma.device_free_chan_resources = dwc_free_chan_resources;
--
--	dw->dma.device_prep_dma_memcpy = dwc_prep_dma_memcpy;
--
--	dw->dma.device_prep_slave_sg = dwc_prep_slave_sg;
--	dw->dma.device_control = dwc_control;
--
--	dw->dma.device_tx_status = dwc_tx_status;
--	dw->dma.device_issue_pending = dwc_issue_pending;
--
--	dma_writel(dw, CFG, DW_CFG_DMA_EN);
--
--	dev_info(&pdev->dev, "DesignWare DMA Controller, %d channels\n",
--		 nr_channels);
--
--	dma_async_device_register(&dw->dma);
--
--	if (pdev->dev.of_node) {
--		err = of_dma_controller_register(pdev->dev.of_node,
--						 dw_dma_of_xlate, dw);
--		if (err)
--			dev_err(&pdev->dev,
--				"could not register of_dma_controller\n");
--	}
--
--	if (ACPI_HANDLE(&pdev->dev))
--		dw_dma_acpi_controller_register(dw);
--
--	return 0;
--}
--
--static int dw_remove(struct platform_device *pdev)
--{
--	struct dw_dma		*dw = platform_get_drvdata(pdev);
--	struct dw_dma_chan	*dwc, *_dwc;
--
--	if (pdev->dev.of_node)
--		of_dma_controller_free(pdev->dev.of_node);
--	dw_dma_off(dw);
--	dma_async_device_unregister(&dw->dma);
--
--	tasklet_kill(&dw->tasklet);
--
--	list_for_each_entry_safe(dwc, _dwc, &dw->dma.channels,
--			chan.device_node) {
--		list_del(&dwc->chan.device_node);
--		channel_clear_bit(dw, CH_EN, dwc->mask);
--	}
--
--	return 0;
--}
--
--static void dw_shutdown(struct platform_device *pdev)
--{
--	struct dw_dma	*dw = platform_get_drvdata(pdev);
--
--	dw_dma_off(dw);
--	clk_disable_unprepare(dw->clk);
--}
--
--static int dw_suspend_noirq(struct device *dev)
--{
--	struct platform_device *pdev = to_platform_device(dev);
--	struct dw_dma	*dw = platform_get_drvdata(pdev);
--
--	dw_dma_off(dw);
--	clk_disable_unprepare(dw->clk);
--
--	return 0;
--}
--
--static int dw_resume_noirq(struct device *dev)
--{
--	struct platform_device *pdev = to_platform_device(dev);
--	struct dw_dma	*dw = platform_get_drvdata(pdev);
--
--	clk_prepare_enable(dw->clk);
--	dma_writel(dw, CFG, DW_CFG_DMA_EN);
--
--	return 0;
--}
--
--static const struct dev_pm_ops dw_dev_pm_ops = {
--	.suspend_noirq = dw_suspend_noirq,
--	.resume_noirq = dw_resume_noirq,
--	.freeze_noirq = dw_suspend_noirq,
--	.thaw_noirq = dw_resume_noirq,
--	.restore_noirq = dw_resume_noirq,
--	.poweroff_noirq = dw_suspend_noirq,
--};
--
--#ifdef CONFIG_OF
--static const struct of_device_id dw_dma_of_id_table[] = {
--	{ .compatible = "snps,dma-spear1340" },
--	{}
--};
--MODULE_DEVICE_TABLE(of, dw_dma_of_id_table);
--#endif
--
--#ifdef CONFIG_ACPI
--static const struct acpi_device_id dw_dma_acpi_id_table[] = {
--	{ "INTL9C60", 0 },
--	{ }
--};
--#endif
--
--static struct platform_driver dw_driver = {
--	.probe		= dw_probe,
--	.remove		= dw_remove,
--	.shutdown	= dw_shutdown,
--	.driver = {
--		.name	= "dw_dmac",
--		.pm	= &dw_dev_pm_ops,
--		.of_match_table = of_match_ptr(dw_dma_of_id_table),
--		.acpi_match_table = ACPI_PTR(dw_dma_acpi_id_table),
--	},
--};
--
--static int __init dw_init(void)
--{
--	return platform_driver_register(&dw_driver);
--}
--subsys_initcall(dw_init);
--
--static void __exit dw_exit(void)
--{
--	platform_driver_unregister(&dw_driver);
--}
--module_exit(dw_exit);
--
--MODULE_LICENSE("GPL v2");
--MODULE_DESCRIPTION("Synopsys DesignWare DMA Controller driver");
--MODULE_AUTHOR("Haavard Skinnemoen (Atmel)");
--MODULE_AUTHOR("Viresh Kumar <viresh.linux@gmail.com>");
---- a/drivers/dma/dw_dmac_regs.h
-+++ /dev/null
-@@ -1,311 +0,0 @@
--/*
-- * Driver for the Synopsys DesignWare AHB DMA Controller
-- *
-- * Copyright (C) 2005-2007 Atmel Corporation
-- * Copyright (C) 2010-2011 ST Microelectronics
-- *
-- * This program is free software; you can redistribute it and/or modify
-- * it under the terms of the GNU General Public License version 2 as
-- * published by the Free Software Foundation.
-- */
--
--#include <linux/dmaengine.h>
--#include <linux/dw_dmac.h>
--
--#define DW_DMA_MAX_NR_CHANNELS	8
--#define DW_DMA_MAX_NR_REQUESTS	16
--
--/* flow controller */
--enum dw_dma_fc {
--	DW_DMA_FC_D_M2M,
--	DW_DMA_FC_D_M2P,
--	DW_DMA_FC_D_P2M,
--	DW_DMA_FC_D_P2P,
--	DW_DMA_FC_P_P2M,
--	DW_DMA_FC_SP_P2P,
--	DW_DMA_FC_P_M2P,
--	DW_DMA_FC_DP_P2P,
--};
--
--/*
-- * Redefine this macro to handle differences between 32- and 64-bit
-- * addressing, big vs. little endian, etc.
-- */
--#define DW_REG(name)		u32 name; u32 __pad_##name
--
--/* Hardware register definitions. */
--struct dw_dma_chan_regs {
--	DW_REG(SAR);		/* Source Address Register */
--	DW_REG(DAR);		/* Destination Address Register */
--	DW_REG(LLP);		/* Linked List Pointer */
--	u32	CTL_LO;		/* Control Register Low */
--	u32	CTL_HI;		/* Control Register High */
--	DW_REG(SSTAT);
--	DW_REG(DSTAT);
--	DW_REG(SSTATAR);
--	DW_REG(DSTATAR);
--	u32	CFG_LO;		/* Configuration Register Low */
--	u32	CFG_HI;		/* Configuration Register High */
--	DW_REG(SGR);
--	DW_REG(DSR);
--};
--
--struct dw_dma_irq_regs {
--	DW_REG(XFER);
--	DW_REG(BLOCK);
--	DW_REG(SRC_TRAN);
--	DW_REG(DST_TRAN);
--	DW_REG(ERROR);
--};
--
--struct dw_dma_regs {
--	/* per-channel registers */
--	struct dw_dma_chan_regs	CHAN[DW_DMA_MAX_NR_CHANNELS];
--
--	/* irq handling */
--	struct dw_dma_irq_regs	RAW;		/* r */
--	struct dw_dma_irq_regs	STATUS;		/* r (raw & mask) */
--	struct dw_dma_irq_regs	MASK;		/* rw (set = irq enabled) */
--	struct dw_dma_irq_regs	CLEAR;		/* w (ack, affects "raw") */
--
--	DW_REG(STATUS_INT);			/* r */
--
--	/* software handshaking */
--	DW_REG(REQ_SRC);
--	DW_REG(REQ_DST);
--	DW_REG(SGL_REQ_SRC);
--	DW_REG(SGL_REQ_DST);
--	DW_REG(LAST_SRC);
--	DW_REG(LAST_DST);
--
--	/* miscellaneous */
--	DW_REG(CFG);
--	DW_REG(CH_EN);
--	DW_REG(ID);
--	DW_REG(TEST);
--
--	/* reserved */
--	DW_REG(__reserved0);
--	DW_REG(__reserved1);
--
--	/* optional encoded params, 0x3c8..0x3f7 */
--	u32	__reserved;
--
--	/* per-channel configuration registers */
--	u32	DWC_PARAMS[DW_DMA_MAX_NR_CHANNELS];
--	u32	MULTI_BLK_TYPE;
--	u32	MAX_BLK_SIZE;
--
--	/* top-level parameters */
--	u32	DW_PARAMS;
--};
--
--#ifdef CONFIG_DW_DMAC_BIG_ENDIAN_IO
--#define dma_readl_native ioread32be
--#define dma_writel_native iowrite32be
--#else
--#define dma_readl_native readl
--#define dma_writel_native writel
--#endif
--
--/* To access the registers in early stage of probe */
--#define dma_read_byaddr(addr, name) \
--	dma_readl_native((addr) + offsetof(struct dw_dma_regs, name))
--
--/* Bitfields in DW_PARAMS */
--#define DW_PARAMS_NR_CHAN	8		/* number of channels */
--#define DW_PARAMS_NR_MASTER	11		/* number of AHB masters */
--#define DW_PARAMS_DATA_WIDTH(n)	(15 + 2 * (n))
--#define DW_PARAMS_DATA_WIDTH1	15		/* master 1 data width */
--#define DW_PARAMS_DATA_WIDTH2	17		/* master 2 data width */
--#define DW_PARAMS_DATA_WIDTH3	19		/* master 3 data width */
--#define DW_PARAMS_DATA_WIDTH4	21		/* master 4 data width */
--#define DW_PARAMS_EN		28		/* encoded parameters */
--
--/* Bitfields in DWC_PARAMS */
--#define DWC_PARAMS_MBLK_EN	11		/* multi block transfer */
--
--/* Bitfields in CTL_LO */
--#define DWC_CTLL_INT_EN		(1 << 0)	/* irqs enabled? */
--#define DWC_CTLL_DST_WIDTH(n)	((n)<<1)	/* bytes per element */
--#define DWC_CTLL_SRC_WIDTH(n)	((n)<<4)
--#define DWC_CTLL_DST_INC	(0<<7)		/* DAR update/not */
--#define DWC_CTLL_DST_DEC	(1<<7)
--#define DWC_CTLL_DST_FIX	(2<<7)
--#define DWC_CTLL_SRC_INC	(0<<7)		/* SAR update/not */
--#define DWC_CTLL_SRC_DEC	(1<<9)
--#define DWC_CTLL_SRC_FIX	(2<<9)
--#define DWC_CTLL_DST_MSIZE(n)	((n)<<11)	/* burst, #elements */
--#define DWC_CTLL_SRC_MSIZE(n)	((n)<<14)
--#define DWC_CTLL_S_GATH_EN	(1 << 17)	/* src gather, !FIX */
--#define DWC_CTLL_D_SCAT_EN	(1 << 18)	/* dst scatter, !FIX */
--#define DWC_CTLL_FC(n)		((n) << 20)
--#define DWC_CTLL_FC_M2M		(0 << 20)	/* mem-to-mem */
--#define DWC_CTLL_FC_M2P		(1 << 20)	/* mem-to-periph */
--#define DWC_CTLL_FC_P2M		(2 << 20)	/* periph-to-mem */
--#define DWC_CTLL_FC_P2P		(3 << 20)	/* periph-to-periph */
--/* plus 4 transfer types for peripheral-as-flow-controller */
--#define DWC_CTLL_DMS(n)		((n)<<23)	/* dst master select */
--#define DWC_CTLL_SMS(n)		((n)<<25)	/* src master select */
--#define DWC_CTLL_LLP_D_EN	(1 << 27)	/* dest block chain */
--#define DWC_CTLL_LLP_S_EN	(1 << 28)	/* src block chain */
--
--/* Bitfields in CTL_HI */
--#define DWC_CTLH_DONE		0x00001000
--#define DWC_CTLH_BLOCK_TS_MASK	0x00000fff
--
--/* Bitfields in CFG_LO. Platform-configurable bits are in <linux/dw_dmac.h> */
--#define DWC_CFGL_CH_PRIOR_MASK	(0x7 << 5)	/* priority mask */
--#define DWC_CFGL_CH_PRIOR(x)	((x) << 5)	/* priority */
--#define DWC_CFGL_CH_SUSP	(1 << 8)	/* pause xfer */
--#define DWC_CFGL_FIFO_EMPTY	(1 << 9)	/* pause xfer */
--#define DWC_CFGL_HS_DST		(1 << 10)	/* handshake w/dst */
--#define DWC_CFGL_HS_SRC		(1 << 11)	/* handshake w/src */
--#define DWC_CFGL_MAX_BURST(x)	((x) << 20)
--#define DWC_CFGL_RELOAD_SAR	(1 << 30)
--#define DWC_CFGL_RELOAD_DAR	(1 << 31)
--
--/* Bitfields in CFG_HI. Platform-configurable bits are in <linux/dw_dmac.h> */
--#define DWC_CFGH_DS_UPD_EN	(1 << 5)
--#define DWC_CFGH_SS_UPD_EN	(1 << 6)
--
--/* Bitfields in SGR */
--#define DWC_SGR_SGI(x)		((x) << 0)
--#define DWC_SGR_SGC(x)		((x) << 20)
--
--/* Bitfields in DSR */
--#define DWC_DSR_DSI(x)		((x) << 0)
--#define DWC_DSR_DSC(x)		((x) << 20)
--
--/* Bitfields in CFG */
--#define DW_CFG_DMA_EN		(1 << 0)
--
--enum dw_dmac_flags {
--	DW_DMA_IS_CYCLIC = 0,
--	DW_DMA_IS_SOFT_LLP = 1,
--};
--
--struct dw_dma_chan {
--	struct dma_chan			chan;
--	void __iomem			*ch_regs;
--	u8				mask;
--	u8				priority;
--	enum dma_transfer_direction	direction;
--	bool				paused;
--	bool				initialized;
--
--	/* software emulation of the LLP transfers */
--	struct list_head	*tx_node_active;
--
--	spinlock_t		lock;
--
--	/* these other elements are all protected by lock */
--	unsigned long		flags;
--	struct list_head	active_list;
--	struct list_head	queue;
--	struct list_head	free_list;
--	u32			residue;
--	struct dw_cyclic_desc	*cdesc;
--
--	unsigned int		descs_allocated;
--
--	/* hardware configuration */
--	unsigned int		block_size;
--	bool			nollp;
--
--	/* custom slave configuration */
--	unsigned int		request_line;
--	unsigned char		src_master;
--	unsigned char		dst_master;
--
--	/* configuration passed via DMA_SLAVE_CONFIG */
--	struct dma_slave_config dma_sconfig;
--};
--
--static inline struct dw_dma_chan_regs __iomem *
--__dwc_regs(struct dw_dma_chan *dwc)
--{
--	return dwc->ch_regs;
--}
--
--#define channel_readl(dwc, name) \
--	dma_readl_native(&(__dwc_regs(dwc)->name))
--#define channel_writel(dwc, name, val) \
--	dma_writel_native((val), &(__dwc_regs(dwc)->name))
--
--static inline struct dw_dma_chan *to_dw_dma_chan(struct dma_chan *chan)
--{
--	return container_of(chan, struct dw_dma_chan, chan);
--}
--
--struct dw_dma {
--	struct dma_device	dma;
--	void __iomem		*regs;
--	struct dma_pool		*desc_pool;
--	struct tasklet_struct	tasklet;
--	struct clk		*clk;
--
--	u8			all_chan_mask;
--
--	/* hardware configuration */
--	unsigned char		nr_masters;
--	unsigned char		data_width[4];
--
--	struct dw_dma_chan	chan[0];
--};
--
--static inline struct dw_dma_regs __iomem *__dw_regs(struct dw_dma *dw)
--{
--	return dw->regs;
--}
--
--#define dma_readl(dw, name) \
--	dma_readl_native(&(__dw_regs(dw)->name))
--#define dma_writel(dw, name, val) \
--	dma_writel_native((val), &(__dw_regs(dw)->name))
--
--#define channel_set_bit(dw, reg, mask) \
--	dma_writel(dw, reg, ((mask) << 8) | (mask))
--#define channel_clear_bit(dw, reg, mask) \
--	dma_writel(dw, reg, ((mask) << 8) | 0)
--
--static inline struct dw_dma *to_dw_dma(struct dma_device *ddev)
--{
--	return container_of(ddev, struct dw_dma, dma);
--}
--
--/* LLI == Linked List Item; a.k.a. DMA block descriptor */
--struct dw_lli {
--	/* values that are not changed by hardware */
--	u32		sar;
--	u32		dar;
--	u32		llp;		/* chain to next lli */
--	u32		ctllo;
--	/* values that may get written back: */
--	u32		ctlhi;
--	/* sstat and dstat can snapshot peripheral register state.
--	 * silicon config may discard either or both...
--	 */
--	u32		sstat;
--	u32		dstat;
--};
--
--struct dw_desc {
--	/* FIRST values the hardware uses */
--	struct dw_lli			lli;
--
--	/* THEN values for driver housekeeping */
--	struct list_head		desc_node;
--	struct list_head		tx_list;
--	struct dma_async_tx_descriptor	txd;
--	size_t				len;
--	size_t				total_len;
--};
--
--#define to_dw_desc(h)	list_entry(h, struct dw_desc, desc_node)
--
--static inline struct dw_desc *
--txd_to_dw_desc(struct dma_async_tx_descriptor *txd)
--{
--	return container_of(txd, struct dw_desc, txd);
--}
diff --git a/patches.baytrail/1138-dma-dw-split-driver-to-library-part-and-platform-cod.patch b/patches.baytrail/1138-dma-dw-split-driver-to-library-part-and-platform-cod.patch
deleted file mode 100644
index cf6a33e9e8995..0000000000000
--- a/patches.baytrail/1138-dma-dw-split-driver-to-library-part-and-platform-cod.patch
+++ /dev/null
@@ -1,963 +0,0 @@
-From 2490b85a43f040a0da7bbfd2d9a3185b13911c8b Mon Sep 17 00:00:00 2001
-From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-Date: Wed, 5 Jun 2013 15:26:45 +0300
-Subject: dma: dw: split driver to library part and platform code
-
-To simplify the driver development let's split driver to library and platform
-code parts. It helps us to add PCI driver in future.
-
-Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-Acked-by: Arnd Bergmann <arnd@arndb.de>
-Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
-[Fixed compile error and few checkpatch issues]
-Signed-off-by: Vinod Koul <vinod.koul@intel.com>
-(cherry picked from commit 9cade1a46c77dfc96d57a3ea6354e95b2a7fcf61)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/dma/Makefile                      |   2 +-
- drivers/dma/dw/Kconfig                    |   8 +-
- drivers/dma/dw/Makefile                   |   6 +-
- drivers/dma/dw/{dw_dmac.c => core.c}      | 311 ++++-------------------------
- drivers/dma/dw/internal.h                 |  70 +++++++
- drivers/dma/dw/platform.c                 | 317 ++++++++++++++++++++++++++++++
- drivers/dma/dw/{dw_dmac_regs.h => regs.h} |   1 +
- 7 files changed, 436 insertions(+), 279 deletions(-)
- rename drivers/dma/dw/{dw_dmac.c => core.c} (85%)
- create mode 100644 drivers/dma/dw/internal.h
- create mode 100644 drivers/dma/dw/platform.c
- rename drivers/dma/dw/{dw_dmac_regs.h => regs.h} (99%)
-
-diff --git a/drivers/dma/Makefile b/drivers/dma/Makefile
-index ac44ca0d468a..6e2a521fbbe3 100644
---- a/drivers/dma/Makefile
-+++ b/drivers/dma/Makefile
-@@ -15,7 +15,7 @@ obj-$(CONFIG_FSL_DMA) += fsldma.o
- obj-$(CONFIG_MPC512X_DMA) += mpc512x_dma.o
- obj-$(CONFIG_PPC_BESTCOMM) += bestcomm/
- obj-$(CONFIG_MV_XOR) += mv_xor.o
--obj-$(CONFIG_DW_DMAC) += dw/
-+obj-$(CONFIG_DW_DMAC_CORE) += dw/
- obj-$(CONFIG_AT_HDMAC) += at_hdmac.o
- obj-$(CONFIG_MX3_IPU) += ipu/
- obj-$(CONFIG_TXX9_DMAC) += txx9dmac.o
-diff --git a/drivers/dma/dw/Kconfig b/drivers/dma/dw/Kconfig
-index 38a215af5ccc..efd9e02a58eb 100644
---- a/drivers/dma/dw/Kconfig
-+++ b/drivers/dma/dw/Kconfig
-@@ -2,10 +2,14 @@
- # DMA engine configuration for dw
- #
- 
--config DW_DMAC
-+config DW_DMAC_CORE
- 	tristate "Synopsys DesignWare AHB DMA support"
- 	depends on GENERIC_HARDIRQS
- 	select DMA_ENGINE
-+
-+config DW_DMAC
-+	tristate "Synopsys DesignWare AHB DMA platform driver"
-+	select DW_DMAC_CORE
- 	default y if CPU_AT32AP7000
- 	help
- 	  Support the Synopsys DesignWare AHB DMA controller. This
-@@ -14,7 +18,7 @@ config DW_DMAC
- config DW_DMAC_BIG_ENDIAN_IO
- 	bool "Use big endian I/O register access"
- 	default y if AVR32
--	depends on DW_DMAC
-+	depends on DW_DMAC_CORE
- 	help
- 	  Say yes here to use big endian I/O access when reading and writing
- 	  to the DMA controller registers. This is needed on some platforms,
-diff --git a/drivers/dma/dw/Makefile b/drivers/dma/dw/Makefile
-index dd8d9936beef..47f36746c559 100644
---- a/drivers/dma/dw/Makefile
-+++ b/drivers/dma/dw/Makefile
-@@ -1 +1,5 @@
--obj-$(CONFIG_DW_DMAC) += dw_dmac.o
-+obj-$(CONFIG_DW_DMAC_CORE)	+= dw_dmac_core.o
-+dw_dmac_core-objs	:= core.o
-+
-+obj-$(CONFIG_DW_DMAC)		+= dw_dmac.o
-+dw_dmac-objs		:= platform.o
-diff --git a/drivers/dma/dw/dw_dmac.c b/drivers/dma/dw/core.c
-similarity index 85%
-rename from drivers/dma/dw/dw_dmac.c
-rename to drivers/dma/dw/core.c
-index 15f3f4f79c10..eea479c12173 100644
---- a/drivers/dma/dw/dw_dmac.c
-+++ b/drivers/dma/dw/core.c
-@@ -3,6 +3,7 @@
-  *
-  * Copyright (C) 2007-2008 Atmel Corporation
-  * Copyright (C) 2010-2011 ST Microelectronics
-+ * Copyright (C) 2013 Intel Corporation
-  *
-  * This program is free software; you can redistribute it and/or modify
-  * it under the terms of the GNU General Public License version 2 as
-@@ -19,17 +20,12 @@
- #include <linux/init.h>
- #include <linux/interrupt.h>
- #include <linux/io.h>
--#include <linux/of.h>
--#include <linux/of_dma.h>
- #include <linux/mm.h>
- #include <linux/module.h>
--#include <linux/platform_device.h>
- #include <linux/slab.h>
--#include <linux/acpi.h>
--#include <linux/acpi_dma.h>
- 
- #include "../dmaengine.h"
--#include "dw_dmac_regs.h"
-+#include "internal.h"
- 
- /*
-  * This supports the Synopsys "DesignWare AHB Central DMA Controller",
-@@ -41,16 +37,6 @@
-  * which does not support descriptor writeback.
-  */
- 
--static inline unsigned int dwc_get_dms(struct dw_dma_slave *slave)
--{
--	return slave ? slave->dst_master : 0;
--}
--
--static inline unsigned int dwc_get_sms(struct dw_dma_slave *slave)
--{
--	return slave ? slave->src_master : 1;
--}
--
- static inline void dwc_set_masters(struct dw_dma_chan *dwc)
- {
- 	struct dw_dma *dw = to_dw_dma(dwc->chan.device);
-@@ -1225,99 +1211,6 @@ static void dwc_free_chan_resources(struct dma_chan *chan)
- 	dev_vdbg(chan2dev(chan), "%s: done\n", __func__);
- }
- 
--/*----------------------------------------------------------------------*/
--
--struct dw_dma_of_filter_args {
--	struct dw_dma *dw;
--	unsigned int req;
--	unsigned int src;
--	unsigned int dst;
--};
--
--static bool dw_dma_of_filter(struct dma_chan *chan, void *param)
--{
--	struct dw_dma_chan *dwc = to_dw_dma_chan(chan);
--	struct dw_dma_of_filter_args *fargs = param;
--
--	/* Ensure the device matches our channel */
--        if (chan->device != &fargs->dw->dma)
--                return false;
--
--	dwc->request_line = fargs->req;
--	dwc->src_master	= fargs->src;
--	dwc->dst_master	= fargs->dst;
--
--	return true;
--}
--
--static struct dma_chan *dw_dma_of_xlate(struct of_phandle_args *dma_spec,
--					struct of_dma *ofdma)
--{
--	struct dw_dma *dw = ofdma->of_dma_data;
--	struct dw_dma_of_filter_args fargs = {
--		.dw = dw,
--	};
--	dma_cap_mask_t cap;
--
--	if (dma_spec->args_count != 3)
--		return NULL;
--
--	fargs.req = dma_spec->args[0];
--	fargs.src = dma_spec->args[1];
--	fargs.dst = dma_spec->args[2];
--
--	if (WARN_ON(fargs.req >= DW_DMA_MAX_NR_REQUESTS ||
--		    fargs.src >= dw->nr_masters ||
--		    fargs.dst >= dw->nr_masters))
--		return NULL;
--
--	dma_cap_zero(cap);
--	dma_cap_set(DMA_SLAVE, cap);
--
--	/* TODO: there should be a simpler way to do this */
--	return dma_request_channel(cap, dw_dma_of_filter, &fargs);
--}
--
--#ifdef CONFIG_ACPI
--static bool dw_dma_acpi_filter(struct dma_chan *chan, void *param)
--{
--	struct dw_dma_chan *dwc = to_dw_dma_chan(chan);
--	struct acpi_dma_spec *dma_spec = param;
--
--	if (chan->device->dev != dma_spec->dev ||
--	    chan->chan_id != dma_spec->chan_id)
--		return false;
--
--	dwc->request_line = dma_spec->slave_id;
--	dwc->src_master = dwc_get_sms(NULL);
--	dwc->dst_master = dwc_get_dms(NULL);
--
--	return true;
--}
--
--static void dw_dma_acpi_controller_register(struct dw_dma *dw)
--{
--	struct device *dev = dw->dma.dev;
--	struct acpi_dma_filter_info *info;
--	int ret;
--
--	info = devm_kzalloc(dev, sizeof(*info), GFP_KERNEL);
--	if (!info)
--		return;
--
--	dma_cap_zero(info->dma_cap);
--	dma_cap_set(DMA_SLAVE, info->dma_cap);
--	info->filter_fn = dw_dma_acpi_filter;
--
--	ret = devm_acpi_dma_controller_register(dev, acpi_dma_simple_xlate,
--						info);
--	if (ret)
--		dev_err(dev, "could not register acpi_dma_controller\n");
--}
--#else /* !CONFIG_ACPI */
--static inline void dw_dma_acpi_controller_register(struct dw_dma *dw) {}
--#endif /* !CONFIG_ACPI */
--
- /* --------------------- Cyclic DMA API extensions -------------------- */
- 
- /**
-@@ -1598,101 +1491,24 @@ static void dw_dma_off(struct dw_dma *dw)
- 		dw->chan[i].initialized = false;
- }
- 
--#ifdef CONFIG_OF
--static struct dw_dma_platform_data *
--dw_dma_parse_dt(struct platform_device *pdev)
--{
--	struct device_node *np = pdev->dev.of_node;
--	struct dw_dma_platform_data *pdata;
--	u32 tmp, arr[4];
--
--	if (!np) {
--		dev_err(&pdev->dev, "Missing DT data\n");
--		return NULL;
--	}
--
--	pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
--	if (!pdata)
--		return NULL;
--
--	if (of_property_read_u32(np, "dma-channels", &pdata->nr_channels))
--		return NULL;
--
--	if (of_property_read_bool(np, "is_private"))
--		pdata->is_private = true;
--
--	if (!of_property_read_u32(np, "chan_allocation_order", &tmp))
--		pdata->chan_allocation_order = (unsigned char)tmp;
--
--	if (!of_property_read_u32(np, "chan_priority", &tmp))
--		pdata->chan_priority = tmp;
--
--	if (!of_property_read_u32(np, "block_size", &tmp))
--		pdata->block_size = tmp;
--
--	if (!of_property_read_u32(np, "dma-masters", &tmp)) {
--		if (tmp > 4)
--			return NULL;
--
--		pdata->nr_masters = tmp;
--	}
--
--	if (!of_property_read_u32_array(np, "data_width", arr,
--				pdata->nr_masters))
--		for (tmp = 0; tmp < pdata->nr_masters; tmp++)
--			pdata->data_width[tmp] = arr[tmp];
--
--	return pdata;
--}
--#else
--static inline struct dw_dma_platform_data *
--dw_dma_parse_dt(struct platform_device *pdev)
-+int dw_dma_probe(struct dw_dma_chip *chip, struct dw_dma_platform_data *pdata)
- {
--	return NULL;
--}
--#endif
--
--static int dw_probe(struct platform_device *pdev)
--{
--	struct dw_dma_platform_data *pdata;
--	struct resource		*io;
- 	struct dw_dma		*dw;
- 	size_t			size;
--	void __iomem		*regs;
- 	bool			autocfg;
- 	unsigned int		dw_params;
- 	unsigned int		nr_channels;
- 	unsigned int		max_blk_size = 0;
--	int			irq;
- 	int			err;
- 	int			i;
- 
--	irq = platform_get_irq(pdev, 0);
--	if (irq < 0)
--		return irq;
--
--	io = platform_get_resource(pdev, IORESOURCE_MEM, 0);
--	regs = devm_ioremap_resource(&pdev->dev, io);
--	if (IS_ERR(regs))
--		return PTR_ERR(regs);
--
--	/* Apply default dma_mask if needed */
--	if (!pdev->dev.dma_mask) {
--		pdev->dev.dma_mask = &pdev->dev.coherent_dma_mask;
--		pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
--	}
--
--	dw_params = dma_read_byaddr(regs, DW_PARAMS);
-+	dw_params = dma_read_byaddr(chip->regs, DW_PARAMS);
- 	autocfg = dw_params >> DW_PARAMS_EN & 0x1;
- 
--	dev_dbg(&pdev->dev, "DW_PARAMS: 0x%08x\n", dw_params);
--
--	pdata = dev_get_platdata(&pdev->dev);
--	if (!pdata)
--		pdata = dw_dma_parse_dt(pdev);
-+	dev_dbg(chip->dev, "DW_PARAMS: 0x%08x\n", dw_params);
- 
- 	if (!pdata && autocfg) {
--		pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
-+		pdata = devm_kzalloc(chip->dev, sizeof(*pdata), GFP_KERNEL);
- 		if (!pdata)
- 			return -ENOMEM;
- 
-@@ -1709,16 +1525,17 @@ static int dw_probe(struct platform_device *pdev)
- 		nr_channels = pdata->nr_channels;
- 
- 	size = sizeof(struct dw_dma) + nr_channels * sizeof(struct dw_dma_chan);
--	dw = devm_kzalloc(&pdev->dev, size, GFP_KERNEL);
-+	dw = devm_kzalloc(chip->dev, size, GFP_KERNEL);
- 	if (!dw)
- 		return -ENOMEM;
- 
--	dw->clk = devm_clk_get(&pdev->dev, "hclk");
-+	dw->clk = devm_clk_get(chip->dev, "hclk");
- 	if (IS_ERR(dw->clk))
- 		return PTR_ERR(dw->clk);
- 	clk_prepare_enable(dw->clk);
- 
--	dw->regs = regs;
-+	dw->regs = chip->regs;
-+	chip->dw = dw;
- 
- 	/* Get hardware configuration parameters */
- 	if (autocfg) {
-@@ -1743,18 +1560,16 @@ static int dw_probe(struct platform_device *pdev)
- 	/* Disable BLOCK interrupts as well */
- 	channel_clear_bit(dw, MASK.BLOCK, dw->all_chan_mask);
- 
--	err = devm_request_irq(&pdev->dev, irq, dw_dma_interrupt, 0,
-+	err = devm_request_irq(chip->dev, chip->irq, dw_dma_interrupt, 0,
- 			       "dw_dmac", dw);
- 	if (err)
- 		return err;
- 
--	platform_set_drvdata(pdev, dw);
--
- 	/* Create a pool of consistent memory blocks for hardware descriptors */
--	dw->desc_pool = dmam_pool_create("dw_dmac_desc_pool", &pdev->dev,
-+	dw->desc_pool = dmam_pool_create("dw_dmac_desc_pool", chip->dev,
- 					 sizeof(struct dw_desc), 4, 0);
- 	if (!dw->desc_pool) {
--		dev_err(&pdev->dev, "No memory for descriptors dma pool\n");
-+		dev_err(chip->dev, "No memory for descriptors dma pool\n");
- 		return -ENOMEM;
- 	}
- 
-@@ -1795,12 +1610,12 @@ static int dw_probe(struct platform_device *pdev)
- 		/* Hardware configuration */
- 		if (autocfg) {
- 			unsigned int dwc_params;
-+			void __iomem *addr = chip->regs + r * sizeof(u32);
- 
--			dwc_params = dma_read_byaddr(regs + r * sizeof(u32),
--						     DWC_PARAMS);
-+			dwc_params = dma_read_byaddr(addr, DWC_PARAMS);
- 
--			dev_dbg(&pdev->dev, "DWC_PARAMS[%d]: 0x%08x\n", i,
--					    dwc_params);
-+			dev_dbg(chip->dev, "DWC_PARAMS[%d]: 0x%08x\n", i,
-+					   dwc_params);
- 
- 			/* Decode maximum block size for given channel. The
- 			 * stored 4 bit value represents blocks from 0x00 for 3
-@@ -1831,7 +1646,7 @@ static int dw_probe(struct platform_device *pdev)
- 	dma_cap_set(DMA_SLAVE, dw->dma.cap_mask);
- 	if (pdata->is_private)
- 		dma_cap_set(DMA_PRIVATE, dw->dma.cap_mask);
--	dw->dma.dev = &pdev->dev;
-+	dw->dma.dev = chip->dev;
- 	dw->dma.device_alloc_chan_resources = dwc_alloc_chan_resources;
- 	dw->dma.device_free_chan_resources = dwc_free_chan_resources;
- 
-@@ -1845,32 +1660,20 @@ static int dw_probe(struct platform_device *pdev)
- 
- 	dma_writel(dw, CFG, DW_CFG_DMA_EN);
- 
--	dev_info(&pdev->dev, "DesignWare DMA Controller, %d channels\n",
-+	dev_info(chip->dev, "DesignWare DMA Controller, %d channels\n",
- 		 nr_channels);
- 
- 	dma_async_device_register(&dw->dma);
- 
--	if (pdev->dev.of_node) {
--		err = of_dma_controller_register(pdev->dev.of_node,
--						 dw_dma_of_xlate, dw);
--		if (err)
--			dev_err(&pdev->dev,
--				"could not register of_dma_controller\n");
--	}
--
--	if (ACPI_HANDLE(&pdev->dev))
--		dw_dma_acpi_controller_register(dw);
--
- 	return 0;
- }
-+EXPORT_SYMBOL_GPL(dw_dma_probe);
- 
--static int dw_remove(struct platform_device *pdev)
-+int dw_dma_remove(struct dw_dma_chip *chip)
- {
--	struct dw_dma		*dw = platform_get_drvdata(pdev);
-+	struct dw_dma		*dw = chip->dw;
- 	struct dw_dma_chan	*dwc, *_dwc;
- 
--	if (pdev->dev.of_node)
--		of_dma_controller_free(pdev->dev.of_node);
- 	dw_dma_off(dw);
- 	dma_async_device_unregister(&dw->dma);
- 
-@@ -1884,86 +1687,44 @@ static int dw_remove(struct platform_device *pdev)
- 
- 	return 0;
- }
-+EXPORT_SYMBOL_GPL(dw_dma_remove);
- 
--static void dw_shutdown(struct platform_device *pdev)
-+void dw_dma_shutdown(struct dw_dma_chip *chip)
- {
--	struct dw_dma	*dw = platform_get_drvdata(pdev);
-+	struct dw_dma *dw = chip->dw;
- 
- 	dw_dma_off(dw);
- 	clk_disable_unprepare(dw->clk);
- }
-+EXPORT_SYMBOL_GPL(dw_dma_shutdown);
- 
--static int dw_suspend_noirq(struct device *dev)
-+#ifdef CONFIG_PM_SLEEP
-+
-+int dw_dma_suspend(struct dw_dma_chip *chip)
- {
--	struct platform_device *pdev = to_platform_device(dev);
--	struct dw_dma	*dw = platform_get_drvdata(pdev);
-+	struct dw_dma *dw = chip->dw;
- 
- 	dw_dma_off(dw);
- 	clk_disable_unprepare(dw->clk);
- 
- 	return 0;
- }
-+EXPORT_SYMBOL_GPL(dw_dma_suspend);
- 
--static int dw_resume_noirq(struct device *dev)
-+int dw_dma_resume(struct dw_dma_chip *chip)
- {
--	struct platform_device *pdev = to_platform_device(dev);
--	struct dw_dma	*dw = platform_get_drvdata(pdev);
-+	struct dw_dma *dw = chip->dw;
- 
- 	clk_prepare_enable(dw->clk);
- 	dma_writel(dw, CFG, DW_CFG_DMA_EN);
- 
- 	return 0;
- }
-+EXPORT_SYMBOL_GPL(dw_dma_resume);
- 
--static const struct dev_pm_ops dw_dev_pm_ops = {
--	.suspend_noirq = dw_suspend_noirq,
--	.resume_noirq = dw_resume_noirq,
--	.freeze_noirq = dw_suspend_noirq,
--	.thaw_noirq = dw_resume_noirq,
--	.restore_noirq = dw_resume_noirq,
--	.poweroff_noirq = dw_suspend_noirq,
--};
--
--#ifdef CONFIG_OF
--static const struct of_device_id dw_dma_of_id_table[] = {
--	{ .compatible = "snps,dma-spear1340" },
--	{}
--};
--MODULE_DEVICE_TABLE(of, dw_dma_of_id_table);
--#endif
--
--#ifdef CONFIG_ACPI
--static const struct acpi_device_id dw_dma_acpi_id_table[] = {
--	{ "INTL9C60", 0 },
--	{ }
--};
--#endif
--
--static struct platform_driver dw_driver = {
--	.probe		= dw_probe,
--	.remove		= dw_remove,
--	.shutdown	= dw_shutdown,
--	.driver = {
--		.name	= "dw_dmac",
--		.pm	= &dw_dev_pm_ops,
--		.of_match_table = of_match_ptr(dw_dma_of_id_table),
--		.acpi_match_table = ACPI_PTR(dw_dma_acpi_id_table),
--	},
--};
--
--static int __init dw_init(void)
--{
--	return platform_driver_register(&dw_driver);
--}
--subsys_initcall(dw_init);
--
--static void __exit dw_exit(void)
--{
--	platform_driver_unregister(&dw_driver);
--}
--module_exit(dw_exit);
-+#endif /* CONFIG_PM_SLEEP */
- 
- MODULE_LICENSE("GPL v2");
--MODULE_DESCRIPTION("Synopsys DesignWare DMA Controller driver");
-+MODULE_DESCRIPTION("Synopsys DesignWare DMA Controller core driver");
- MODULE_AUTHOR("Haavard Skinnemoen (Atmel)");
- MODULE_AUTHOR("Viresh Kumar <viresh.linux@gmail.com>");
-diff --git a/drivers/dma/dw/internal.h b/drivers/dma/dw/internal.h
-new file mode 100644
-index 000000000000..32667f9e0dda
---- /dev/null
-+++ b/drivers/dma/dw/internal.h
-@@ -0,0 +1,70 @@
-+/*
-+ * Driver for the Synopsys DesignWare DMA Controller
-+ *
-+ * Copyright (C) 2013 Intel Corporation
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+
-+#ifndef _DW_DMAC_INTERNAL_H
-+#define _DW_DMAC_INTERNAL_H
-+
-+#include <linux/device.h>
-+#include <linux/dw_dmac.h>
-+
-+#include "regs.h"
-+
-+/**
-+ * struct dw_dma_chip - representation of DesignWare DMA controller hardware
-+ * @dev:		struct device of the DMA controller
-+ * @irq:		irq line
-+ * @regs:		memory mapped I/O space
-+ * @dw:			struct dw_dma that is filed by dw_dma_probe()
-+ */
-+struct dw_dma_chip {
-+	struct device	*dev;
-+	int		irq;
-+	void __iomem	*regs;
-+	struct dw_dma	*dw;
-+};
-+
-+/* Export to the platform drivers */
-+int dw_dma_probe(struct dw_dma_chip *chip, struct dw_dma_platform_data *pdata);
-+int dw_dma_remove(struct dw_dma_chip *chip);
-+
-+void dw_dma_shutdown(struct dw_dma_chip *chip);
-+
-+#ifdef CONFIG_PM_SLEEP
-+
-+int dw_dma_suspend(struct dw_dma_chip *chip);
-+int dw_dma_resume(struct dw_dma_chip *chip);
-+
-+#endif /* CONFIG_PM_SLEEP */
-+
-+/**
-+ * dwc_get_dms - get destination master
-+ * @slave:	pointer to the custom slave configuration
-+ *
-+ * Returns destination master in the custom slave configuration if defined, or
-+ * default value otherwise.
-+ */
-+static inline unsigned int dwc_get_dms(struct dw_dma_slave *slave)
-+{
-+	return slave ? slave->dst_master : 0;
-+}
-+
-+/**
-+ * dwc_get_sms - get source master
-+ * @slave:	pointer to the custom slave configuration
-+ *
-+ * Returns source master in the custom slave configuration if defined, or
-+ * default value otherwise.
-+ */
-+static inline unsigned int dwc_get_sms(struct dw_dma_slave *slave)
-+{
-+	return slave ? slave->src_master : 1;
-+}
-+
-+#endif /* _DW_DMAC_INTERNAL_H */
-diff --git a/drivers/dma/dw/platform.c b/drivers/dma/dw/platform.c
-new file mode 100644
-index 000000000000..6c9449cffae8
---- /dev/null
-+++ b/drivers/dma/dw/platform.c
-@@ -0,0 +1,317 @@
-+/*
-+ * Platform driver for the Synopsys DesignWare DMA Controller
-+ *
-+ * Copyright (C) 2007-2008 Atmel Corporation
-+ * Copyright (C) 2010-2011 ST Microelectronics
-+ * Copyright (C) 2013 Intel Corporation
-+ *
-+ * Some parts of this driver are derived from the original dw_dmac.
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+
-+#include <linux/module.h>
-+#include <linux/device.h>
-+#include <linux/clk.h>
-+#include <linux/platform_device.h>
-+#include <linux/dmaengine.h>
-+#include <linux/dma-mapping.h>
-+#include <linux/of.h>
-+#include <linux/of_dma.h>
-+#include <linux/acpi.h>
-+#include <linux/acpi_dma.h>
-+
-+#include "internal.h"
-+
-+struct dw_dma_of_filter_args {
-+	struct dw_dma *dw;
-+	unsigned int req;
-+	unsigned int src;
-+	unsigned int dst;
-+};
-+
-+static bool dw_dma_of_filter(struct dma_chan *chan, void *param)
-+{
-+	struct dw_dma_chan *dwc = to_dw_dma_chan(chan);
-+	struct dw_dma_of_filter_args *fargs = param;
-+
-+	/* Ensure the device matches our channel */
-+	if (chan->device != &fargs->dw->dma)
-+		return false;
-+
-+	dwc->request_line = fargs->req;
-+	dwc->src_master	= fargs->src;
-+	dwc->dst_master	= fargs->dst;
-+
-+	return true;
-+}
-+
-+static struct dma_chan *dw_dma_of_xlate(struct of_phandle_args *dma_spec,
-+					struct of_dma *ofdma)
-+{
-+	struct dw_dma *dw = ofdma->of_dma_data;
-+	struct dw_dma_of_filter_args fargs = {
-+		.dw = dw,
-+	};
-+	dma_cap_mask_t cap;
-+
-+	if (dma_spec->args_count != 3)
-+		return NULL;
-+
-+	fargs.req = dma_spec->args[0];
-+	fargs.src = dma_spec->args[1];
-+	fargs.dst = dma_spec->args[2];
-+
-+	if (WARN_ON(fargs.req >= DW_DMA_MAX_NR_REQUESTS ||
-+		    fargs.src >= dw->nr_masters ||
-+		    fargs.dst >= dw->nr_masters))
-+		return NULL;
-+
-+	dma_cap_zero(cap);
-+	dma_cap_set(DMA_SLAVE, cap);
-+
-+	/* TODO: there should be a simpler way to do this */
-+	return dma_request_channel(cap, dw_dma_of_filter, &fargs);
-+}
-+
-+#ifdef CONFIG_ACPI
-+static bool dw_dma_acpi_filter(struct dma_chan *chan, void *param)
-+{
-+	struct dw_dma_chan *dwc = to_dw_dma_chan(chan);
-+	struct acpi_dma_spec *dma_spec = param;
-+
-+	if (chan->device->dev != dma_spec->dev ||
-+	    chan->chan_id != dma_spec->chan_id)
-+		return false;
-+
-+	dwc->request_line = dma_spec->slave_id;
-+	dwc->src_master = dwc_get_sms(NULL);
-+	dwc->dst_master = dwc_get_dms(NULL);
-+
-+	return true;
-+}
-+
-+static void dw_dma_acpi_controller_register(struct dw_dma *dw)
-+{
-+	struct device *dev = dw->dma.dev;
-+	struct acpi_dma_filter_info *info;
-+	int ret;
-+
-+	info = devm_kzalloc(dev, sizeof(*info), GFP_KERNEL);
-+	if (!info)
-+		return;
-+
-+	dma_cap_zero(info->dma_cap);
-+	dma_cap_set(DMA_SLAVE, info->dma_cap);
-+	info->filter_fn = dw_dma_acpi_filter;
-+
-+	ret = devm_acpi_dma_controller_register(dev, acpi_dma_simple_xlate,
-+						info);
-+	if (ret)
-+		dev_err(dev, "could not register acpi_dma_controller\n");
-+}
-+#else /* !CONFIG_ACPI */
-+static inline void dw_dma_acpi_controller_register(struct dw_dma *dw) {}
-+#endif /* !CONFIG_ACPI */
-+
-+#ifdef CONFIG_OF
-+static struct dw_dma_platform_data *
-+dw_dma_parse_dt(struct platform_device *pdev)
-+{
-+	struct device_node *np = pdev->dev.of_node;
-+	struct dw_dma_platform_data *pdata;
-+	u32 tmp, arr[4];
-+
-+	if (!np) {
-+		dev_err(&pdev->dev, "Missing DT data\n");
-+		return NULL;
-+	}
-+
-+	pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
-+	if (!pdata)
-+		return NULL;
-+
-+	if (of_property_read_u32(np, "dma-channels", &pdata->nr_channels))
-+		return NULL;
-+
-+	if (of_property_read_bool(np, "is_private"))
-+		pdata->is_private = true;
-+
-+	if (!of_property_read_u32(np, "chan_allocation_order", &tmp))
-+		pdata->chan_allocation_order = (unsigned char)tmp;
-+
-+	if (!of_property_read_u32(np, "chan_priority", &tmp))
-+		pdata->chan_priority = tmp;
-+
-+	if (!of_property_read_u32(np, "block_size", &tmp))
-+		pdata->block_size = tmp;
-+
-+	if (!of_property_read_u32(np, "dma-masters", &tmp)) {
-+		if (tmp > 4)
-+			return NULL;
-+
-+		pdata->nr_masters = tmp;
-+	}
-+
-+	if (!of_property_read_u32_array(np, "data_width", arr,
-+				pdata->nr_masters))
-+		for (tmp = 0; tmp < pdata->nr_masters; tmp++)
-+			pdata->data_width[tmp] = arr[tmp];
-+
-+	return pdata;
-+}
-+#else
-+static inline struct dw_dma_platform_data *
-+dw_dma_parse_dt(struct platform_device *pdev)
-+{
-+	return NULL;
-+}
-+#endif
-+
-+static int dw_probe(struct platform_device *pdev)
-+{
-+	struct dw_dma_chip *chip;
-+	struct device *dev = &pdev->dev;
-+	struct resource *mem;
-+	struct dw_dma_platform_data *pdata;
-+	int err;
-+
-+	chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL);
-+	if (!chip)
-+		return -ENOMEM;
-+
-+	chip->irq = platform_get_irq(pdev, 0);
-+	if (chip->irq < 0)
-+		return chip->irq;
-+
-+	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+	chip->regs = devm_ioremap_resource(dev, mem);
-+	if (IS_ERR(chip->regs))
-+		return PTR_ERR(chip->regs);
-+
-+	/* Apply default dma_mask if needed */
-+	if (!dev->dma_mask) {
-+		dev->dma_mask = &dev->coherent_dma_mask;
-+		dev->coherent_dma_mask = DMA_BIT_MASK(32);
-+	}
-+
-+	pdata = dev_get_platdata(dev);
-+	if (!pdata)
-+		pdata = dw_dma_parse_dt(pdev);
-+
-+	chip->dev = dev;
-+
-+	err = dw_dma_probe(chip, pdata);
-+	if (err)
-+		return err;
-+
-+	platform_set_drvdata(pdev, chip);
-+
-+	if (pdev->dev.of_node) {
-+		err = of_dma_controller_register(pdev->dev.of_node,
-+						 dw_dma_of_xlate, chip->dw);
-+		if (err)
-+			dev_err(&pdev->dev,
-+				"could not register of_dma_controller\n");
-+	}
-+
-+	if (ACPI_HANDLE(&pdev->dev))
-+		dw_dma_acpi_controller_register(chip->dw);
-+
-+	return 0;
-+}
-+
-+static int dw_remove(struct platform_device *pdev)
-+{
-+	struct dw_dma_chip *chip = platform_get_drvdata(pdev);
-+
-+	if (pdev->dev.of_node)
-+		of_dma_controller_free(pdev->dev.of_node);
-+
-+	return dw_dma_remove(chip);
-+}
-+
-+static void dw_shutdown(struct platform_device *pdev)
-+{
-+	struct dw_dma_chip *chip = platform_get_drvdata(pdev);
-+
-+	dw_dma_shutdown(chip);
-+}
-+
-+#ifdef CONFIG_OF
-+static const struct of_device_id dw_dma_of_id_table[] = {
-+	{ .compatible = "snps,dma-spear1340" },
-+	{}
-+};
-+MODULE_DEVICE_TABLE(of, dw_dma_of_id_table);
-+#endif
-+
-+#ifdef CONFIG_ACPI
-+static const struct acpi_device_id dw_dma_acpi_id_table[] = {
-+	{ "INTL9C60", 0 },
-+	{ }
-+};
-+#endif
-+
-+#ifdef CONFIG_PM_SLEEP
-+
-+static int dw_suspend_noirq(struct device *dev)
-+{
-+	struct platform_device *pdev = to_platform_device(dev);
-+	struct dw_dma_chip *chip = platform_get_drvdata(pdev);
-+
-+	return dw_dma_suspend(chip);
-+}
-+
-+static int dw_resume_noirq(struct device *dev)
-+{
-+	struct platform_device *pdev = to_platform_device(dev);
-+	struct dw_dma_chip *chip = platform_get_drvdata(pdev);
-+
-+	return dw_dma_resume(chip);
-+}
-+
-+#else /* !CONFIG_PM_SLEEP */
-+
-+#define dw_suspend_noirq	NULL
-+#define dw_resume_noirq		NULL
-+
-+#endif /* !CONFIG_PM_SLEEP */
-+
-+static const struct dev_pm_ops dw_dev_pm_ops = {
-+	.suspend_noirq = dw_suspend_noirq,
-+	.resume_noirq = dw_resume_noirq,
-+	.freeze_noirq = dw_suspend_noirq,
-+	.thaw_noirq = dw_resume_noirq,
-+	.restore_noirq = dw_resume_noirq,
-+	.poweroff_noirq = dw_suspend_noirq,
-+};
-+
-+static struct platform_driver dw_driver = {
-+	.probe		= dw_probe,
-+	.remove		= dw_remove,
-+	.shutdown	= dw_shutdown,
-+	.driver = {
-+		.name	= "dw_dmac",
-+		.pm	= &dw_dev_pm_ops,
-+		.of_match_table = of_match_ptr(dw_dma_of_id_table),
-+		.acpi_match_table = ACPI_PTR(dw_dma_acpi_id_table),
-+	},
-+};
-+
-+static int __init dw_init(void)
-+{
-+	return platform_driver_register(&dw_driver);
-+}
-+subsys_initcall(dw_init);
-+
-+static void __exit dw_exit(void)
-+{
-+	platform_driver_unregister(&dw_driver);
-+}
-+module_exit(dw_exit);
-+
-+MODULE_LICENSE("GPL v2");
-+MODULE_DESCRIPTION("Synopsys DesignWare DMA Controller platform driver");
-diff --git a/drivers/dma/dw/dw_dmac_regs.h b/drivers/dma/dw/regs.h
-similarity index 99%
-rename from drivers/dma/dw/dw_dmac_regs.h
-rename to drivers/dma/dw/regs.h
-index 9d417200bd57..07c5a6ecb52b 100644
---- a/drivers/dma/dw/dw_dmac_regs.h
-+++ b/drivers/dma/dw/regs.h
-@@ -9,6 +9,7 @@
-  * published by the Free Software Foundation.
-  */
- 
-+#include <linux/interrupt.h>
- #include <linux/dmaengine.h>
- #include <linux/dw_dmac.h>
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1139-dma-dw-add-PCI-part-of-the-driver.patch b/patches.baytrail/1139-dma-dw-add-PCI-part-of-the-driver.patch
deleted file mode 100644
index 7e62af55e7378..0000000000000
--- a/patches.baytrail/1139-dma-dw-add-PCI-part-of-the-driver.patch
+++ /dev/null
@@ -1,162 +0,0 @@
-From 18f9b55616de3b72884377acefde0a2e9b480d3a Mon Sep 17 00:00:00 2001
-From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-Date: Wed, 5 Jun 2013 15:26:46 +0300
-Subject: dma: dw: add PCI part of the driver
-
-This is the PCI part of the DesignWare DMAC driver. The controller is usually
-used in the Intel hardware such as Intel Medfield.
-
-Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-Acked-by: Arnd Bergmann <arnd@arndb.de>
-Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
-Signed-off-by: Vinod Koul <vinod.koul@intel.com>
-(cherry picked from commit fed42c198b45ece0b37eb25d37cbc4a9959c6522)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/dma/dw/Kconfig  |   9 +++++
- drivers/dma/dw/Makefile |   3 ++
- drivers/dma/dw/pci.c    | 101 ++++++++++++++++++++++++++++++++++++++++++++++++
- 3 files changed, 113 insertions(+)
- create mode 100644 drivers/dma/dw/pci.c
-
-diff --git a/drivers/dma/dw/Kconfig b/drivers/dma/dw/Kconfig
-index efd9e02a58eb..db2b41fab626 100644
---- a/drivers/dma/dw/Kconfig
-+++ b/drivers/dma/dw/Kconfig
-@@ -15,6 +15,15 @@ config DW_DMAC
- 	  Support the Synopsys DesignWare AHB DMA controller. This
- 	  can be integrated in chips such as the Atmel AT32ap7000.
- 
-+config DW_DMAC_PCI
-+	tristate "Synopsys DesignWare AHB DMA PCI driver"
-+	depends on PCI
-+	select DW_DMAC_CORE
-+	help
-+	  Support the Synopsys DesignWare AHB DMA controller on the
-+	  platfroms that enumerate it as a PCI device. For example,
-+	  Intel Medfield has integrated this GPDMA controller.
-+
- config DW_DMAC_BIG_ENDIAN_IO
- 	bool "Use big endian I/O register access"
- 	default y if AVR32
-diff --git a/drivers/dma/dw/Makefile b/drivers/dma/dw/Makefile
-index 47f36746c559..3eebd1ce2c6b 100644
---- a/drivers/dma/dw/Makefile
-+++ b/drivers/dma/dw/Makefile
-@@ -3,3 +3,6 @@ dw_dmac_core-objs	:= core.o
- 
- obj-$(CONFIG_DW_DMAC)		+= dw_dmac.o
- dw_dmac-objs		:= platform.o
-+
-+obj-$(CONFIG_DW_DMAC_PCI)	+= dw_dmac_pci.o
-+dw_dmac_pci-objs	:= pci.o
-diff --git a/drivers/dma/dw/pci.c b/drivers/dma/dw/pci.c
-new file mode 100644
-index 000000000000..e89fc24b8293
---- /dev/null
-+++ b/drivers/dma/dw/pci.c
-@@ -0,0 +1,101 @@
-+/*
-+ * PCI driver for the Synopsys DesignWare DMA Controller
-+ *
-+ * Copyright (C) 2013 Intel Corporation
-+ * Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+
-+#include <linux/module.h>
-+#include <linux/pci.h>
-+#include <linux/device.h>
-+
-+#include "internal.h"
-+
-+static struct dw_dma_platform_data dw_pci_pdata = {
-+	.is_private = 1,
-+	.chan_allocation_order = CHAN_ALLOCATION_ASCENDING,
-+	.chan_priority = CHAN_PRIORITY_ASCENDING,
-+};
-+
-+static int dw_pci_probe(struct pci_dev *pdev, const struct pci_device_id *pid)
-+{
-+	struct dw_dma_chip *chip;
-+	struct dw_dma_platform_data *pdata = (void *)pid->driver_data;
-+	int ret;
-+
-+	ret = pcim_enable_device(pdev);
-+	if (ret)
-+		return ret;
-+
-+	ret = pcim_iomap_regions(pdev, 1 << 0, pci_name(pdev));
-+	if (ret) {
-+		dev_err(&pdev->dev, "I/O memory remapping failed\n");
-+		return ret;
-+	}
-+
-+	pci_set_master(pdev);
-+	pci_try_set_mwi(pdev);
-+
-+	ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
-+	if (ret)
-+		return ret;
-+
-+	ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
-+	if (ret)
-+		return ret;
-+
-+	chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL);
-+	if (!chip)
-+		return -ENOMEM;
-+
-+	chip->dev = &pdev->dev;
-+	chip->regs = pcim_iomap_table(pdev)[0];
-+	chip->irq = pdev->irq;
-+
-+	ret = dw_dma_probe(chip, pdata);
-+	if (ret)
-+		return ret;
-+
-+	pci_set_drvdata(pdev, chip);
-+
-+	return 0;
-+}
-+
-+static void dw_pci_remove(struct pci_dev *pdev)
-+{
-+	struct dw_dma_chip *chip = pci_get_drvdata(pdev);
-+	int ret;
-+
-+	ret = dw_dma_remove(chip);
-+	if (ret)
-+		dev_warn(&pdev->dev, "can't remove device properly: %d\n", ret);
-+}
-+
-+static DEFINE_PCI_DEVICE_TABLE(dw_pci_id_table) = {
-+	/* Medfield */
-+	{ PCI_VDEVICE(INTEL, 0x0827), (kernel_ulong_t)&dw_pci_pdata },
-+	{ PCI_VDEVICE(INTEL, 0x0830), (kernel_ulong_t)&dw_pci_pdata },
-+
-+	/* BayTrail */
-+	{ PCI_VDEVICE(INTEL, 0x0f06), (kernel_ulong_t)&dw_pci_pdata },
-+	{ PCI_VDEVICE(INTEL, 0x0f40), (kernel_ulong_t)&dw_pci_pdata },
-+	{ }
-+};
-+MODULE_DEVICE_TABLE(pci, dw_pci_id_table);
-+
-+static struct pci_driver dw_pci_driver = {
-+	.name		= "dw_dmac_pci",
-+	.id_table	= dw_pci_id_table,
-+	.probe		= dw_pci_probe,
-+	.remove		= dw_pci_remove,
-+};
-+
-+module_pci_driver(dw_pci_driver);
-+
-+MODULE_LICENSE("GPL v2");
-+MODULE_DESCRIPTION("Synopsys DesignWare DMA Controller PCI driver");
-+MODULE_AUTHOR("Andy Shevchenko <andriy.shevchenko@linux.intel.com>");
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1140-dmaengine-dw-select-DW_DMAC_BIG_ENDIAN_IO-automagica.patch b/patches.baytrail/1140-dmaengine-dw-select-DW_DMAC_BIG_ENDIAN_IO-automagica.patch
deleted file mode 100644
index d21e4cf0fa067..0000000000000
--- a/patches.baytrail/1140-dmaengine-dw-select-DW_DMAC_BIG_ENDIAN_IO-automagica.patch
+++ /dev/null
@@ -1,59 +0,0 @@
-From d49a3f8622a5fec0e6f34ad56f8273df70f80828 Mon Sep 17 00:00:00 2001
-From: Vinod Koul <vinod.koul@intel.com>
-Date: Wed, 12 Jun 2013 13:39:57 +0530
-Subject: dmaengine: dw: select DW_DMAC_BIG_ENDIAN_IO automagically
-
-Signed-off-by: Vinod Koul <vinod.koul@intel.com>
-(cherry picked from commit e368b510c01aaf7b2957306836ffdeacc24712a3)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/dma/dw/Kconfig | 11 ++---------
- drivers/dma/dw/regs.h  |  6 ++++++
- 2 files changed, 8 insertions(+), 9 deletions(-)
-
-diff --git a/drivers/dma/dw/Kconfig b/drivers/dma/dw/Kconfig
-index db2b41fab626..dde13248b681 100644
---- a/drivers/dma/dw/Kconfig
-+++ b/drivers/dma/dw/Kconfig
-@@ -10,6 +10,7 @@ config DW_DMAC_CORE
- config DW_DMAC
- 	tristate "Synopsys DesignWare AHB DMA platform driver"
- 	select DW_DMAC_CORE
-+	select DW_DMAC_BIG_ENDIAN_IO if AVR32
- 	default y if CPU_AT32AP7000
- 	help
- 	  Support the Synopsys DesignWare AHB DMA controller. This
-@@ -25,12 +26,4 @@ config DW_DMAC_PCI
- 	  Intel Medfield has integrated this GPDMA controller.
- 
- config DW_DMAC_BIG_ENDIAN_IO
--	bool "Use big endian I/O register access"
--	default y if AVR32
--	depends on DW_DMAC_CORE
--	help
--	  Say yes here to use big endian I/O access when reading and writing
--	  to the DMA controller registers. This is needed on some platforms,
--	  like the Atmel AVR32 architecture.
--
--	  If unsure, use the default setting.
-+	bool
-diff --git a/drivers/dma/dw/regs.h b/drivers/dma/dw/regs.h
-index 07c5a6ecb52b..deb4274f80f4 100644
---- a/drivers/dma/dw/regs.h
-+++ b/drivers/dma/dw/regs.h
-@@ -101,6 +101,12 @@ struct dw_dma_regs {
- 	u32	DW_PARAMS;
- };
- 
-+/*
-+ * Big endian I/O access when reading and writing to the DMA controller
-+ * registers.  This is needed on some platforms, like the Atmel AVR32
-+ * architecture.
-+ */
-+
- #ifdef CONFIG_DW_DMAC_BIG_ENDIAN_IO
- #define dma_readl_native ioread32be
- #define dma_writel_native iowrite32be
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1141-mmc-sdhci-add-ability-to-stay-runtime-resumed-if-the.patch b/patches.baytrail/1141-mmc-sdhci-add-ability-to-stay-runtime-resumed-if-the.patch
deleted file mode 100644
index 450de5f07571a..0000000000000
--- a/patches.baytrail/1141-mmc-sdhci-add-ability-to-stay-runtime-resumed-if-the.patch
+++ /dev/null
@@ -1,125 +0,0 @@
-From 4b0f8468c79aa3783b5943bad36bf299402e9a18 Mon Sep 17 00:00:00 2001
-From: Adrian Hunter <adrian.hunter@intel.com>
-Date: Mon, 6 May 2013 12:17:32 +0300
-Subject: mmc: sdhci: add ability to stay runtime-resumed if the card is
- powered up
-
-If card power is dependent on SD bus power then the host controller
-must not be runtime suspended while the card is powered up.  Add
-the ability to stay runtime-resumed in that case and enable it with a new
-quirk SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON.
-
-Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
-Signed-off-by: Chris Ball <cjb@laptop.org>
-(cherry picked from commit f0710a557cb17746b09234f01073a2cdafe4f4a5)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/mmc/host/sdhci.c  | 35 ++++++++++++++++++++++++++++++++++-
- include/linux/mmc/sdhci.h |  2 ++
- 2 files changed, 36 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
-index 2ea429c27714..c81c2a289dbd 100644
---- a/drivers/mmc/host/sdhci.c
-+++ b/drivers/mmc/host/sdhci.c
-@@ -58,6 +58,8 @@ static void sdhci_enable_preset_value(struct sdhci_host *host, bool enable);
- #ifdef CONFIG_PM_RUNTIME
- static int sdhci_runtime_pm_get(struct sdhci_host *host);
- static int sdhci_runtime_pm_put(struct sdhci_host *host);
-+static void sdhci_runtime_pm_bus_on(struct sdhci_host *host);
-+static void sdhci_runtime_pm_bus_off(struct sdhci_host *host);
- #else
- static inline int sdhci_runtime_pm_get(struct sdhci_host *host)
- {
-@@ -67,6 +69,12 @@ static inline int sdhci_runtime_pm_put(struct sdhci_host *host)
- {
- 	return 0;
- }
-+static void sdhci_runtime_pm_bus_on(struct sdhci_host *host)
-+{
-+}
-+static void sdhci_runtime_pm_bus_off(struct sdhci_host *host)
-+{
-+}
- #endif
- 
- static void sdhci_dumpregs(struct sdhci_host *host)
-@@ -192,8 +200,12 @@ static void sdhci_reset(struct sdhci_host *host, u8 mask)
- 
- 	sdhci_writeb(host, mask, SDHCI_SOFTWARE_RESET);
- 
--	if (mask & SDHCI_RESET_ALL)
-+	if (mask & SDHCI_RESET_ALL) {
- 		host->clock = 0;
-+		/* Reset-all turns off SD Bus Power */
-+		if (host->quirks2 & SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON)
-+			sdhci_runtime_pm_bus_off(host);
-+	}
- 
- 	/* Wait max 100 ms */
- 	timeout = 100;
-@@ -1268,6 +1280,8 @@ static int sdhci_set_power(struct sdhci_host *host, unsigned short power)
- 
- 	if (pwr == 0) {
- 		sdhci_writeb(host, 0, SDHCI_POWER_CONTROL);
-+		if (host->quirks2 & SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON)
-+			sdhci_runtime_pm_bus_off(host);
- 		return 0;
- 	}
- 
-@@ -1289,6 +1303,9 @@ static int sdhci_set_power(struct sdhci_host *host, unsigned short power)
- 
- 	sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL);
- 
-+	if (host->quirks2 & SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON)
-+		sdhci_runtime_pm_bus_on(host);
-+
- 	/*
- 	 * Some controllers need an extra 10ms delay of 10ms before they
- 	 * can apply clock after applying power
-@@ -2625,6 +2642,22 @@ static int sdhci_runtime_pm_put(struct sdhci_host *host)
- 	return pm_runtime_put_autosuspend(host->mmc->parent);
- }
- 
-+static void sdhci_runtime_pm_bus_on(struct sdhci_host *host)
-+{
-+	if (host->runtime_suspended || host->bus_on)
-+		return;
-+	host->bus_on = true;
-+	pm_runtime_get_noresume(host->mmc->parent);
-+}
-+
-+static void sdhci_runtime_pm_bus_off(struct sdhci_host *host)
-+{
-+	if (host->runtime_suspended || !host->bus_on)
-+		return;
-+	host->bus_on = false;
-+	pm_runtime_put_noidle(host->mmc->parent);
-+}
-+
- int sdhci_runtime_suspend_host(struct sdhci_host *host)
- {
- 	unsigned long flags;
-diff --git a/include/linux/mmc/sdhci.h b/include/linux/mmc/sdhci.h
-index b838ffc49e4a..ba35bdb87d99 100644
---- a/include/linux/mmc/sdhci.h
-+++ b/include/linux/mmc/sdhci.h
-@@ -95,6 +95,7 @@ struct sdhci_host {
- /* The system physically doesn't support 1.8v, even if the host does */
- #define SDHCI_QUIRK2_NO_1_8_V				(1<<2)
- #define SDHCI_QUIRK2_PRESET_VALUE_BROKEN		(1<<3)
-+#define SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON		(1<<4)
- 
- 	int irq;		/* Device IRQ */
- 	void __iomem *ioaddr;	/* Mapped address */
-@@ -139,6 +140,7 @@ struct sdhci_host {
- 	u8 pwr;			/* Current voltage */
- 
- 	bool runtime_suspended;	/* Host is runtime suspended */
-+	bool bus_on;		/* Bus power prevents runtime suspend */
- 
- 	struct mmc_request *mrq;	/* Current request */
- 	struct mmc_command *cmd;	/* Current command */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1142-mmc-sdhci-acpi-support-runtime-PM-for-ACPI-HID-80860.patch b/patches.baytrail/1142-mmc-sdhci-acpi-support-runtime-PM-for-ACPI-HID-80860.patch
deleted file mode 100644
index e8e84f06773ec..0000000000000
--- a/patches.baytrail/1142-mmc-sdhci-acpi-support-runtime-PM-for-ACPI-HID-80860.patch
+++ /dev/null
@@ -1,131 +0,0 @@
-From 09d7ab192b331c1be9ffd0e59730b4b2e946fcd6 Mon Sep 17 00:00:00 2001
-From: Adrian Hunter <adrian.hunter@intel.com>
-Date: Mon, 6 May 2013 12:17:33 +0300
-Subject: mmc: sdhci-acpi: support runtime PM for ACPI HID 80860F14 SD cards
-
-Enable runtime PM for ACPI HID 80860F14 SD cards, adding support for
-card detect GPIO.
-
-Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
-Signed-off-by: Chris Ball <cjb@laptop.org>
-(cherry picked from commit a61abe6eebfda1add8cb54e6e10384ea747d68a5)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/mmc/host/sdhci-acpi.c | 64 ++++++++++++++++++++++++++++++++++++++++++-
- 1 file changed, 63 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/mmc/host/sdhci-acpi.c b/drivers/mmc/host/sdhci-acpi.c
-index 706d9cb1a49e..17fcebae26be 100644
---- a/drivers/mmc/host/sdhci-acpi.c
-+++ b/drivers/mmc/host/sdhci-acpi.c
-@@ -31,8 +31,10 @@
- #include <linux/bitops.h>
- #include <linux/types.h>
- #include <linux/err.h>
-+#include <linux/gpio.h>
- #include <linux/interrupt.h>
- #include <linux/acpi.h>
-+#include <linux/acpi_gpio.h>
- #include <linux/pm.h>
- #include <linux/pm_runtime.h>
- 
-@@ -101,6 +103,8 @@ static const struct sdhci_acpi_slot sdhci_acpi_slot_int_sdio = {
- };
- 
- static const struct sdhci_acpi_slot sdhci_acpi_slot_int_sd = {
-+	.flags   = SDHCI_ACPI_SD_CD | SDHCI_ACPI_RUNTIME_PM,
-+	.quirks2 = SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON,
- };
- 
- struct sdhci_acpi_uid_slot {
-@@ -161,6 +165,57 @@ static const struct sdhci_acpi_slot *sdhci_acpi_get_slot(acpi_handle handle,
- 	return slot;
- }
- 
-+#ifdef CONFIG_PM_RUNTIME
-+
-+static irqreturn_t sdhci_acpi_sd_cd(int irq, void *dev_id)
-+{
-+	mmc_detect_change(dev_id, msecs_to_jiffies(200));
-+	return IRQ_HANDLED;
-+}
-+
-+static int sdhci_acpi_add_own_cd(struct device *dev, int gpio,
-+				 struct mmc_host *mmc)
-+{
-+	unsigned long flags;
-+	int err, irq;
-+
-+	if (gpio < 0) {
-+		err = gpio;
-+		goto out;
-+	}
-+
-+	err = devm_gpio_request_one(dev, gpio, GPIOF_DIR_IN, "sd_cd");
-+	if (err)
-+		goto out;
-+
-+	irq = gpio_to_irq(gpio);
-+	if (irq < 0)
-+		goto out_free;
-+
-+	flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING;
-+	err = devm_request_irq(dev, irq, sdhci_acpi_sd_cd, flags, "sd_cd", mmc);
-+	if (err)
-+		goto out_free;
-+
-+	return 0;
-+
-+out_free:
-+	devm_gpio_free(dev, gpio);
-+out:
-+	dev_warn(dev, "failed to setup card detect wake up\n");
-+	return err;
-+}
-+
-+#else
-+
-+static int sdhci_acpi_add_own_cd(struct device *dev, int gpio,
-+				 struct mmc_host *mmc)
-+{
-+	return 0;
-+}
-+
-+#endif
-+
- static int sdhci_acpi_probe(struct platform_device *pdev)
- {
- 	struct device *dev = &pdev->dev;
-@@ -171,7 +226,7 @@ static int sdhci_acpi_probe(struct platform_device *pdev)
- 	struct resource *iomem;
- 	resource_size_t len;
- 	const char *hid;
--	int err;
-+	int err, gpio;
- 
- 	if (acpi_bus_get_device(handle, &device))
- 		return -ENODEV;
-@@ -196,6 +251,8 @@ static int sdhci_acpi_probe(struct platform_device *pdev)
- 	if (IS_ERR(host))
- 		return PTR_ERR(host);
- 
-+	gpio = acpi_get_gpio_by_index(dev, 0, NULL);
-+
- 	c = sdhci_priv(host);
- 	c->host = host;
- 	c->slot = sdhci_acpi_get_slot(handle, hid);
-@@ -251,6 +308,11 @@ static int sdhci_acpi_probe(struct platform_device *pdev)
- 	if (err)
- 		goto err_free;
- 
-+	if (sdhci_acpi_flag(c, SDHCI_ACPI_SD_CD)) {
-+		if (sdhci_acpi_add_own_cd(dev, gpio, host->mmc))
-+			c->use_runtime_pm = false;
-+	}
-+
- 	if (c->use_runtime_pm) {
- 		pm_runtime_set_active(dev);
- 		pm_suspend_ignore_children(dev, 1);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1143-mmc-sdhci-pci-support-runtime-PM-for-BYT-SD-cards.patch b/patches.baytrail/1143-mmc-sdhci-pci-support-runtime-PM-for-BYT-SD-cards.patch
deleted file mode 100644
index b2161cfb204b9..0000000000000
--- a/patches.baytrail/1143-mmc-sdhci-pci-support-runtime-PM-for-BYT-SD-cards.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From 409175c0a6dc5b8b2f6f3ab557b0a0cb29735629 Mon Sep 17 00:00:00 2001
-From: Adrian Hunter <adrian.hunter@intel.com>
-Date: Mon, 6 May 2013 12:17:34 +0300
-Subject: mmc: sdhci-pci: support runtime PM for BYT SD cards
-
-Add support for runtime PM for BYT SD cards.
-
-Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
-Signed-off-by: Chris Ball <cjb@laptop.org>
-(cherry picked from commit 7396e318b497cd46eb156effa5278126582ddde7)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/mmc/host/sdhci-pci.c | 2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/drivers/mmc/host/sdhci-pci.c b/drivers/mmc/host/sdhci-pci.c
-index 701d06d0e1fb..611331a39fe5 100644
---- a/drivers/mmc/host/sdhci-pci.c
-+++ b/drivers/mmc/host/sdhci-pci.c
-@@ -332,6 +332,8 @@ static const struct sdhci_pci_fixes sdhci_intel_byt_sdio = {
- };
- 
- static const struct sdhci_pci_fixes sdhci_intel_byt_sd = {
-+	.quirks2	= SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON,
-+	.allow_runtime_pm = true,
- };
- 
- /* O2Micro extra registers */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1144-mmc-sdhci-acpi-fix-error-return-code-in-sdhci_acpi_a.patch b/patches.baytrail/1144-mmc-sdhci-acpi-fix-error-return-code-in-sdhci_acpi_a.patch
deleted file mode 100644
index 1478998f2ac70..0000000000000
--- a/patches.baytrail/1144-mmc-sdhci-acpi-fix-error-return-code-in-sdhci_acpi_a.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 83b1c9317a907af5048d5c8cea47d89a812e0c7e Mon Sep 17 00:00:00 2001
-From: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
-Date: Tue, 28 May 2013 13:26:25 +0800
-Subject: mmc: sdhci-acpi: fix error return code in sdhci_acpi_add_own_cd()
-
-Fix to return a negative error code in the gpio_to_irq() error
-handling case instead of 0, as done elsewhere in this function.
-
-Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
-Reviewed-by: Jingoo Han <jg1.han@samsung.com>
-Acked-by: Adrian Hunter <adrian.hunter@intel.com>
-Signed-off-by: Chris Ball <cjb@laptop.org>
-(cherry picked from commit 5a0e8074660444010fee40eebcd57aaaf8d44662)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/mmc/host/sdhci-acpi.c | 4 +++-
- 1 file changed, 3 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/mmc/host/sdhci-acpi.c b/drivers/mmc/host/sdhci-acpi.c
-index 17fcebae26be..4b8c7c9901d6 100644
---- a/drivers/mmc/host/sdhci-acpi.c
-+++ b/drivers/mmc/host/sdhci-acpi.c
-@@ -189,8 +189,10 @@ static int sdhci_acpi_add_own_cd(struct device *dev, int gpio,
- 		goto out;
- 
- 	irq = gpio_to_irq(gpio);
--	if (irq < 0)
-+	if (irq < 0) {
-+		err = irq;
- 		goto out_free;
-+	}
- 
- 	flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING;
- 	err = devm_request_irq(dev, irq, sdhci_acpi_sd_cd, flags, "sd_cd", mmc);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1145-mmc-sdhci-pci-add-support-for-eMMC-hardware-reset-fo.patch b/patches.baytrail/1145-mmc-sdhci-pci-add-support-for-eMMC-hardware-reset-fo.patch
deleted file mode 100644
index 2c01a8efde78b..0000000000000
--- a/patches.baytrail/1145-mmc-sdhci-pci-add-support-for-eMMC-hardware-reset-fo.patch
+++ /dev/null
@@ -1,92 +0,0 @@
-From 14b4a4e3eba1d59eeaa84e9b8d0f03094abd52d8 Mon Sep 17 00:00:00 2001
-From: Adrian Hunter <adrian.hunter@intel.com>
-Date: Thu, 13 Jun 2013 11:50:26 +0300
-Subject: mmc: sdhci-pci: add support for eMMC hardware reset for BYT eMMC.
-
-Add support for eMMC hardware reset for BYT eMMC.
-
-Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
-Signed-off-by: Chris Ball <cjb@laptop.org>
-(cherry picked from commit c9faff6cbb3d2b37b3aa356ce455848f91685b24)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/mmc/host/sdhci-pci.c | 32 ++++++++++++++++++++++++++++++--
- 1 file changed, 30 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/mmc/host/sdhci-pci.c b/drivers/mmc/host/sdhci-pci.c
-index 611331a39fe5..e082fac6bc96 100644
---- a/drivers/mmc/host/sdhci-pci.c
-+++ b/drivers/mmc/host/sdhci-pci.c
-@@ -77,6 +77,8 @@ struct sdhci_pci_slot {
- 	int			rst_n_gpio;
- 	int			cd_gpio;
- 	int			cd_irq;
-+
-+	void (*hw_reset)(struct sdhci_host *host);
- };
- 
- struct sdhci_pci_chip {
-@@ -307,10 +309,27 @@ static const struct sdhci_pci_fixes sdhci_intel_pch_sdio = {
- 	.probe_slot	= pch_hc_probe_slot,
- };
- 
-+static void sdhci_pci_int_hw_reset(struct sdhci_host *host)
-+{
-+	u8 reg;
-+
-+	reg = sdhci_readb(host, SDHCI_POWER_CONTROL);
-+	reg |= 0x10;
-+	sdhci_writeb(host, reg, SDHCI_POWER_CONTROL);
-+	/* For eMMC, minimum is 1us but give it 9us for good measure */
-+	udelay(9);
-+	reg &= ~0x10;
-+	sdhci_writeb(host, reg, SDHCI_POWER_CONTROL);
-+	/* For eMMC, minimum is 200us but give it 300us for good measure */
-+	usleep_range(300, 1000);
-+}
-+
- static int byt_emmc_probe_slot(struct sdhci_pci_slot *slot)
- {
--	slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE;
-+	slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE |
-+				 MMC_CAP_HW_RESET;
- 	slot->host->mmc->caps2 |= MMC_CAP2_HC_ERASE_SZ;
-+	slot->hw_reset = sdhci_pci_int_hw_reset;
- 	return 0;
- }
- 
-@@ -1016,7 +1035,7 @@ static int sdhci_pci_bus_width(struct sdhci_host *host, int width)
- 	return 0;
- }
- 
--static void sdhci_pci_hw_reset(struct sdhci_host *host)
-+static void sdhci_pci_gpio_hw_reset(struct sdhci_host *host)
- {
- 	struct sdhci_pci_slot *slot = sdhci_priv(host);
- 	int rst_n_gpio = slot->rst_n_gpio;
-@@ -1031,6 +1050,14 @@ static void sdhci_pci_hw_reset(struct sdhci_host *host)
- 	usleep_range(300, 1000);
- }
- 
-+static void sdhci_pci_hw_reset(struct sdhci_host *host)
-+{
-+	struct sdhci_pci_slot *slot = sdhci_priv(host);
-+
-+	if (slot->hw_reset)
-+		slot->hw_reset(host);
-+}
-+
- static const struct sdhci_ops sdhci_pci_ops = {
- 	.enable_dma	= sdhci_pci_enable_dma,
- 	.platform_bus_width	= sdhci_pci_bus_width,
-@@ -1328,6 +1355,7 @@ static struct sdhci_pci_slot *sdhci_pci_probe_slot(
- 		if (!gpio_request(slot->rst_n_gpio, "eMMC_reset")) {
- 			gpio_direction_output(slot->rst_n_gpio, 1);
- 			slot->host->mmc->caps |= MMC_CAP_HW_RESET;
-+			slot->hw_reset = sdhci_pci_gpio_hw_reset;
- 		} else {
- 			dev_warn(&pdev->dev, "failed to request rst_n_gpio\n");
- 			slot->rst_n_gpio = -EINVAL;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1146-mmc-sdhci-acpi-add-support-for-eMMC-hardware-reset-f.patch b/patches.baytrail/1146-mmc-sdhci-acpi-add-support-for-eMMC-hardware-reset-f.patch
deleted file mode 100644
index 7e2b4d45d0a94..0000000000000
--- a/patches.baytrail/1146-mmc-sdhci-acpi-add-support-for-eMMC-hardware-reset-f.patch
+++ /dev/null
@@ -1,69 +0,0 @@
-From 9f7bf47be1ca0c4e6950181f7b1cc97f36f048c6 Mon Sep 17 00:00:00 2001
-From: Adrian Hunter <adrian.hunter@intel.com>
-Date: Thu, 13 Jun 2013 11:50:27 +0300
-Subject: mmc: sdhci-acpi: add support for eMMC hardware reset for HID 80860F14
-
-Add support for eMMC hardware reset for HID 80860F14.
-
-Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
-Signed-off-by: Chris Ball <cjb@laptop.org>
-(cherry picked from commit b04fa064e72c301e075c2d52c146282f8f464083)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/mmc/host/sdhci-acpi.c | 28 +++++++++++++++++++++++++++-
- 1 file changed, 27 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/mmc/host/sdhci-acpi.c b/drivers/mmc/host/sdhci-acpi.c
-index 4b8c7c9901d6..119568f15bea 100644
---- a/drivers/mmc/host/sdhci-acpi.c
-+++ b/drivers/mmc/host/sdhci-acpi.c
-@@ -37,6 +37,7 @@
- #include <linux/acpi_gpio.h>
- #include <linux/pm.h>
- #include <linux/pm_runtime.h>
-+#include <linux/delay.h>
- 
- #include <linux/mmc/host.h>
- #include <linux/mmc/pm.h>
-@@ -85,12 +86,37 @@ static int sdhci_acpi_enable_dma(struct sdhci_host *host)
- 	return 0;
- }
- 
-+static void sdhci_acpi_int_hw_reset(struct sdhci_host *host)
-+{
-+	u8 reg;
-+
-+	reg = sdhci_readb(host, SDHCI_POWER_CONTROL);
-+	reg |= 0x10;
-+	sdhci_writeb(host, reg, SDHCI_POWER_CONTROL);
-+	/* For eMMC, minimum is 1us but give it 9us for good measure */
-+	udelay(9);
-+	reg &= ~0x10;
-+	sdhci_writeb(host, reg, SDHCI_POWER_CONTROL);
-+	/* For eMMC, minimum is 200us but give it 300us for good measure */
-+	usleep_range(300, 1000);
-+}
-+
- static const struct sdhci_ops sdhci_acpi_ops_dflt = {
- 	.enable_dma = sdhci_acpi_enable_dma,
- };
- 
-+static const struct sdhci_ops sdhci_acpi_ops_int = {
-+	.enable_dma = sdhci_acpi_enable_dma,
-+	.hw_reset   = sdhci_acpi_int_hw_reset,
-+};
-+
-+static const struct sdhci_acpi_chip sdhci_acpi_chip_int = {
-+	.ops = &sdhci_acpi_ops_int,
-+};
-+
- static const struct sdhci_acpi_slot sdhci_acpi_slot_int_emmc = {
--	.caps    = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
-+	.chip    = &sdhci_acpi_chip_int,
-+	.caps    = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE | MMC_CAP_HW_RESET,
- 	.caps2   = MMC_CAP2_HC_ERASE_SZ,
- 	.flags   = SDHCI_ACPI_RUNTIME_PM,
- };
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1147-mmc-sdhci-pci-add-another-device-id.patch b/patches.baytrail/1147-mmc-sdhci-pci-add-another-device-id.patch
deleted file mode 100644
index 07e0a34e3dcca..0000000000000
--- a/patches.baytrail/1147-mmc-sdhci-pci-add-another-device-id.patch
+++ /dev/null
@@ -1,45 +0,0 @@
-From 792d058861cb9273869ba0566ee6a324946ab37f Mon Sep 17 00:00:00 2001
-From: Adrian Hunter <adrian.hunter@intel.com>
-Date: Thu, 20 Jun 2013 12:57:59 +0300
-Subject: mmc: sdhci-pci: add another device id
-
-Add another PCI device id for an eMMC host controller.
-
-Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
-Signed-off-by: Chris Ball <cjb@laptop.org>
-(cherry picked from commit 30d025c0f7234409e8ee1bf22d1729055e640ec6)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/mmc/host/sdhci-pci.c | 9 +++++++++
- 1 file changed, 9 insertions(+)
-
-diff --git a/drivers/mmc/host/sdhci-pci.c b/drivers/mmc/host/sdhci-pci.c
-index e082fac6bc96..d7d6bc8968d2 100644
---- a/drivers/mmc/host/sdhci-pci.c
-+++ b/drivers/mmc/host/sdhci-pci.c
-@@ -36,6 +36,7 @@
- #define PCI_DEVICE_ID_INTEL_BYT_EMMC	0x0f14
- #define PCI_DEVICE_ID_INTEL_BYT_SDIO	0x0f15
- #define PCI_DEVICE_ID_INTEL_BYT_SD	0x0f16
-+#define PCI_DEVICE_ID_INTEL_BYT_EMMC2	0x0f50
- 
- /*
-  * PCI registers
-@@ -931,6 +932,14 @@ static const struct pci_device_id pci_ids[] = {
- 	},
- 
- 	{
-+		.vendor		= PCI_VENDOR_ID_INTEL,
-+		.device		= PCI_DEVICE_ID_INTEL_BYT_EMMC2,
-+		.subvendor	= PCI_ANY_ID,
-+		.subdevice	= PCI_ANY_ID,
-+		.driver_data	= (kernel_ulong_t)&sdhci_intel_byt_emmc,
-+	},
-+
-+	{
- 		.vendor		= PCI_VENDOR_ID_O2,
- 		.device		= PCI_DEVICE_ID_O2_8120,
- 		.subvendor	= PCI_ANY_ID,
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1148-tty-8250_dw-Add-support-for-OCTEON-UARTS.patch b/patches.baytrail/1148-tty-8250_dw-Add-support-for-OCTEON-UARTS.patch
deleted file mode 100644
index dd4e663958100..0000000000000
--- a/patches.baytrail/1148-tty-8250_dw-Add-support-for-OCTEON-UARTS.patch
+++ /dev/null
@@ -1,238 +0,0 @@
-From b86ad34f501f3cb6ebda7d93935749917ab5349c Mon Sep 17 00:00:00 2001
-From: David Daney <david.daney@cavium.com>
-Date: Wed, 19 Jun 2013 20:37:27 +0000
-Subject: tty/8250_dw: Add support for OCTEON UARTS.
-
-A few differences needed by OCTEON:
-
-o These are DWC UARTS, but have USR at a different offset.
-
-o Internal SoC buses require reading back from registers to maintain
-  write ordering.
-
-o 8250 on OCTEON appears with 64-bit wide registers, so when using
-  readb/writeb in big endian mode we have to adjust the membase to hit
-  the proper part of the register.
-
-o No UCV register, so we hard code some properties.
-
-Because OCTEON doesn't have a UCV register, I change where
-dw8250_setup_port(), which reads the UCV, is called by pushing it in
-to the OF and ACPI probe functions, and move unchanged
-dw8250_setup_port() earlier in the file.
-
-Signed-off-by: David Daney <david.daney@cavium.com>
-Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-Cc: Arnd Bergmann <arnd@arndb.de>
-Cc: Heikki Krogerus <heikki.krogerus@linux.intel.com>
-Cc: linux-mips@linux-mips.org
-Cc: Jamie Iles <jamie@jamieiles.com>
-Cc: Jiri Slaby <jslaby@suse.cz>
-Cc: linux-serial@vger.kernel.org
-Cc: linux-kernel@vger.kernel.org
-Patchwork: https://patchwork.linux-mips.org/patch/5516/
-Acked-by: Arnd Bergmann <arnd@arndb.de>
-Reviewed-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
-Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-(cherry picked from commit d5f1af7ece96cf52e0b110c72210ac15c2f65438)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/tty/serial/8250/8250_dw.c | 108 ++++++++++++++++++++++++--------------
- 1 file changed, 69 insertions(+), 39 deletions(-)
-
-diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c
-index d07b6af3a937..76a8daadff47 100644
---- a/drivers/tty/serial/8250/8250_dw.c
-+++ b/drivers/tty/serial/8250/8250_dw.c
-@@ -29,6 +29,8 @@
- #include <linux/clk.h>
- #include <linux/pm_runtime.h>
- 
-+#include <asm/byteorder.h>
-+
- #include "8250.h"
- 
- /* Offsets for the DesignWare specific registers */
-@@ -57,6 +59,7 @@ struct dw8250_data {
- 	int		last_lcr;
- 	int		line;
- 	struct clk	*clk;
-+	u8		usr_reg;
- };
- 
- static void dw8250_serial_out(struct uart_port *p, int offset, int value)
-@@ -77,6 +80,13 @@ static unsigned int dw8250_serial_in(struct uart_port *p, int offset)
- 	return readb(p->membase + offset);
- }
- 
-+/* Read Back (rb) version to ensure register access ording. */
-+static void dw8250_serial_out_rb(struct uart_port *p, int offset, int value)
-+{
-+	dw8250_serial_out(p, offset, value);
-+	dw8250_serial_in(p, UART_LCR);
-+}
-+
- static void dw8250_serial_out32(struct uart_port *p, int offset, int value)
- {
- 	struct dw8250_data *d = p->private_data;
-@@ -104,7 +114,7 @@ static int dw8250_handle_irq(struct uart_port *p)
- 		return 1;
- 	} else if ((iir & UART_IIR_BUSY) == UART_IIR_BUSY) {
- 		/* Clear the USR and write the LCR again. */
--		(void)p->serial_in(p, DW_UART_USR);
-+		(void)p->serial_in(p, d->usr_reg);
- 		p->serial_out(p, UART_LCR, d->last_lcr);
- 
- 		return 1;
-@@ -125,12 +135,60 @@ dw8250_do_pm(struct uart_port *port, unsigned int state, unsigned int old)
- 		pm_runtime_put_sync_suspend(port->dev);
- }
- 
--static int dw8250_probe_of(struct uart_port *p)
-+static void dw8250_setup_port(struct uart_8250_port *up)
-+{
-+	struct uart_port	*p = &up->port;
-+	u32			reg = readl(p->membase + DW_UART_UCV);
-+
-+	/*
-+	 * If the Component Version Register returns zero, we know that
-+	 * ADDITIONAL_FEATURES are not enabled. No need to go any further.
-+	 */
-+	if (!reg)
-+		return;
-+
-+	dev_dbg_ratelimited(p->dev, "Designware UART version %c.%c%c\n",
-+		(reg >> 24) & 0xff, (reg >> 16) & 0xff, (reg >> 8) & 0xff);
-+
-+	reg = readl(p->membase + DW_UART_CPR);
-+	if (!reg)
-+		return;
-+
-+	/* Select the type based on fifo */
-+	if (reg & DW_UART_CPR_FIFO_MODE) {
-+		p->type = PORT_16550A;
-+		p->flags |= UPF_FIXED_TYPE;
-+		p->fifosize = DW_UART_CPR_FIFO_SIZE(reg);
-+		up->tx_loadsz = p->fifosize;
-+		up->capabilities = UART_CAP_FIFO;
-+	}
-+
-+	if (reg & DW_UART_CPR_AFCE_MODE)
-+		up->capabilities |= UART_CAP_AFE;
-+}
-+
-+static int dw8250_probe_of(struct uart_port *p,
-+			   struct dw8250_data *data)
- {
- 	struct device_node	*np = p->dev->of_node;
- 	u32			val;
--
--	if (!of_property_read_u32(np, "reg-io-width", &val)) {
-+	bool has_ucv = true;
-+
-+	if (of_device_is_compatible(np, "cavium,octeon-3860-uart")) {
-+#ifdef __BIG_ENDIAN
-+		/*
-+		 * Low order bits of these 64-bit registers, when
-+		 * accessed as a byte, are 7 bytes further down in the
-+		 * address space in big endian mode.
-+		 */
-+		p->membase += 7;
-+#endif
-+		p->serial_out = dw8250_serial_out_rb;
-+		p->flags = ASYNC_SKIP_TEST | UPF_SHARE_IRQ | UPF_FIXED_TYPE;
-+		p->type = PORT_OCTEON;
-+		data->usr_reg = 0x27;
-+		has_ucv = false;
-+	} else if (!of_property_read_u32(np, "reg-io-width", &val)) {
- 		switch (val) {
- 		case 1:
- 			break;
-@@ -144,6 +202,8 @@ static int dw8250_probe_of(struct uart_port *p)
- 			return -EINVAL;
- 		}
- 	}
-+	if (has_ucv)
-+		dw8250_setup_port(container_of(p, struct uart_8250_port, port));
- 
- 	if (!of_property_read_u32(np, "reg-shift", &val))
- 		p->regshift = val;
-@@ -168,6 +228,8 @@ static int dw8250_probe_acpi(struct uart_8250_port *up)
- 	const struct acpi_device_id *id;
- 	struct uart_port *p = &up->port;
- 
-+	dw8250_setup_port(up);
-+
- 	id = acpi_match_device(p->dev->driver->acpi_match_table, p->dev);
- 	if (!id)
- 		return -ENODEV;
-@@ -196,38 +258,6 @@ static inline int dw8250_probe_acpi(struct uart_8250_port *up)
- }
- #endif /* CONFIG_ACPI */
- 
--static void dw8250_setup_port(struct uart_8250_port *up)
--{
--	struct uart_port	*p = &up->port;
--	u32			reg = readl(p->membase + DW_UART_UCV);
--
--	/*
--	 * If the Component Version Register returns zero, we know that
--	 * ADDITIONAL_FEATURES are not enabled. No need to go any further.
--	 */
--	if (!reg)
--		return;
--
--	dev_dbg_ratelimited(p->dev, "Designware UART version %c.%c%c\n",
--		(reg >> 24) & 0xff, (reg >> 16) & 0xff, (reg >> 8) & 0xff);
--
--	reg = readl(p->membase + DW_UART_CPR);
--	if (!reg)
--		return;
--
--	/* Select the type based on fifo */
--	if (reg & DW_UART_CPR_FIFO_MODE) {
--		p->type = PORT_16550A;
--		p->flags |= UPF_FIXED_TYPE;
--		p->fifosize = DW_UART_CPR_FIFO_SIZE(reg);
--		up->tx_loadsz = p->fifosize;
--		up->capabilities = UART_CAP_FIFO;
--	}
--
--	if (reg & DW_UART_CPR_AFCE_MODE)
--		up->capabilities |= UART_CAP_AFE;
--}
--
- static int dw8250_probe(struct platform_device *pdev)
- {
- 	struct uart_8250_port uart = {};
-@@ -259,6 +289,7 @@ static int dw8250_probe(struct platform_device *pdev)
- 	if (!data)
- 		return -ENOMEM;
- 
-+	data->usr_reg = DW_UART_USR;
- 	data->clk = devm_clk_get(&pdev->dev, NULL);
- 	if (!IS_ERR(data->clk)) {
- 		clk_prepare_enable(data->clk);
-@@ -270,10 +301,8 @@ static int dw8250_probe(struct platform_device *pdev)
- 	uart.port.serial_out = dw8250_serial_out;
- 	uart.port.private_data = data;
- 
--	dw8250_setup_port(&uart);
--
- 	if (pdev->dev.of_node) {
--		err = dw8250_probe_of(&uart.port);
-+		err = dw8250_probe_of(&uart.port, data);
- 		if (err)
- 			return err;
- 	} else if (ACPI_HANDLE(&pdev->dev)) {
-@@ -362,6 +391,7 @@ static const struct dev_pm_ops dw8250_pm_ops = {
- 
- static const struct of_device_id dw8250_of_match[] = {
- 	{ .compatible = "snps,dw-apb-uart" },
-+	{ .compatible = "cavium,octeon-3860-uart" },
- 	{ /* Sentinel */ }
- };
- MODULE_DEVICE_TABLE(of, dw8250_of_match);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1149-i2c-mv64xxx-Document-the-newly-introduced-allwinner-.patch b/patches.baytrail/1149-i2c-mv64xxx-Document-the-newly-introduced-allwinner-.patch
deleted file mode 100644
index 5b8f4d317f355..0000000000000
--- a/patches.baytrail/1149-i2c-mv64xxx-Document-the-newly-introduced-allwinner-.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From 213e3c1615cbdff1c22c1efdb00f5f8e45a2791e Mon Sep 17 00:00:00 2001
-From: Maxime Ripard <maxime.ripard@free-electrons.com>
-Date: Wed, 24 Jul 2013 09:14:35 +0200
-Subject: i2c: mv64xxx: Document the newly introduced allwinner compatible
-
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-(cherry picked from commit f480adaf1b7130ad43760f627b762f771fcfc5f5)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- Documentation/devicetree/bindings/i2c/i2c-mv64xxx.txt | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/Documentation/devicetree/bindings/i2c/i2c-mv64xxx.txt b/Documentation/devicetree/bindings/i2c/i2c-mv64xxx.txt
-index a1ee681942cc..6113f9275f42 100644
---- a/Documentation/devicetree/bindings/i2c/i2c-mv64xxx.txt
-+++ b/Documentation/devicetree/bindings/i2c/i2c-mv64xxx.txt
-@@ -4,7 +4,7 @@
- Required properties :
- 
-  - reg             : Offset and length of the register set for the device
-- - compatible      : Should be "marvell,mv64xxx-i2c"
-+ - compatible      : Should be "marvell,mv64xxx-i2c" or "allwinner,sun4i-i2c"
-  - interrupts      : The interrupt number
- 
- Optional properties :
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1150-spi-pxa2xx-enable-DMA-on-newer-Intel-LPSS-silicon.patch b/patches.baytrail/1150-spi-pxa2xx-enable-DMA-on-newer-Intel-LPSS-silicon.patch
deleted file mode 100644
index a0e5ddac7eb7c..0000000000000
--- a/patches.baytrail/1150-spi-pxa2xx-enable-DMA-on-newer-Intel-LPSS-silicon.patch
+++ /dev/null
@@ -1,48 +0,0 @@
-From 8d8d36c6aa5a14628cdaa270e0af64a5975a4b78 Mon Sep 17 00:00:00 2001
-From: Mika Westerberg <mika.westerberg@linux.intel.com>
-Date: Wed, 3 Jul 2013 13:25:06 +0300
-Subject: spi/pxa2xx: enable DMA on newer Intel LPSS silicon
-
-There is an additional bit in the Intel LPSS SPI private registers that
-needs to be set in order to be able to use DMA with the SPI controller.
-Enable this as well.
-
-Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
-Signed-off-by: Mark Brown <broonie@linaro.org>
-(cherry picked from commit 1de7061253a2742c743f3883f0e73480c9bceee0)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/spi/spi-pxa2xx.c | 9 ++++++++-
- 1 file changed, 8 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c
-index 97e23c9fb732..91969629d864 100644
---- a/drivers/spi/spi-pxa2xx.c
-+++ b/drivers/spi/spi-pxa2xx.c
-@@ -69,6 +69,8 @@ MODULE_ALIAS("platform:pxa2xx-spi");
- #define LPSS_TX_HITHRESH_DFLT	224
- 
- /* Offset from drv_data->lpss_base */
-+#define GENERAL_REG		0x08
-+#define GENERAL_REG_RXTO_HOLDOFF_DISABLE BIT(24)
- #define SSP_REG			0x0c
- #define SPI_CS_CONTROL		0x18
- #define SPI_CS_CONTROL_SW_MODE	BIT(0)
-@@ -142,8 +144,13 @@ detection_done:
- 	__lpss_ssp_write_priv(drv_data, SPI_CS_CONTROL, value);
- 
- 	/* Enable multiblock DMA transfers */
--	if (drv_data->master_info->enable_dma)
-+	if (drv_data->master_info->enable_dma) {
- 		__lpss_ssp_write_priv(drv_data, SSP_REG, 1);
-+
-+		value = __lpss_ssp_read_priv(drv_data, GENERAL_REG);
-+		value |= GENERAL_REG_RXTO_HOLDOFF_DISABLE;
-+		__lpss_ssp_write_priv(drv_data, GENERAL_REG, value);
-+	}
- }
- 
- static void lpss_ssp_cs_control(struct driver_data *drv_data, bool enable)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1151-Intel-xhci-refactor-EHCI-xHCI-port-switching.patch b/patches.baytrail/1151-Intel-xhci-refactor-EHCI-xHCI-port-switching.patch
deleted file mode 100644
index cb96a4bc2032a..0000000000000
--- a/patches.baytrail/1151-Intel-xhci-refactor-EHCI-xHCI-port-switching.patch
+++ /dev/null
@@ -1,211 +0,0 @@
-From bd6c096cb76de484c141f87299dc3984f1c596a3 Mon Sep 17 00:00:00 2001
-From: Mathias Nyman <mathias.nyman@linux.intel.com>
-Date: Tue, 23 Jul 2013 11:35:47 +0300
-Subject: Intel xhci: refactor EHCI/xHCI port switching
-
-Make the Linux xHCI driver automatically try to switchover the EHCI ports to
-xHCI when an Intel xHCI host is detected, and it also finds an Intel EHCI host.
-
-This means we will no longer have to add Intel xHCI hosts to a quirks list when
-the PCI device IDs change.  Simply continuing to add new Intel xHCI PCI device
-IDs to the quirks list is not sustainable.
-
-During suspend ports may be swicthed back to EHCI by BIOS and not properly
-restored to xHCI at resume. Previously both EHCI and xHCI resume functions
-switched ports back to XHCI, but it's enough to do it in xHCI only
-because the hub driver doesn't start running again until after both hosts are resumed.
-
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
-(cherry picked from commit 26b76798e0507429506b93cd49f8c4cfdab06896)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/usb/host/ehci-pci.c   | 42 -------------------------------------
- drivers/usb/host/pci-quirks.c | 48 ++++++++++++++++---------------------------
- drivers/usb/host/pci-quirks.h |  3 +--
- drivers/usb/host/xhci-pci.c   | 14 +++++++------
- 4 files changed, 27 insertions(+), 80 deletions(-)
-
-diff --git a/drivers/usb/host/ehci-pci.c b/drivers/usb/host/ehci-pci.c
-index 8fe401c7d152..854c2ec7b699 100644
---- a/drivers/usb/host/ehci-pci.c
-+++ b/drivers/usb/host/ehci-pci.c
-@@ -315,53 +315,11 @@ done:
-  * Also they depend on separate root hub suspend/resume.
-  */
- 
--static bool usb_is_intel_switchable_ehci(struct pci_dev *pdev)
--{
--	return pdev->class == PCI_CLASS_SERIAL_USB_EHCI &&
--		pdev->vendor == PCI_VENDOR_ID_INTEL &&
--		(pdev->device == 0x1E26 ||
--		 pdev->device == 0x8C2D ||
--		 pdev->device == 0x8C26 ||
--		 pdev->device == 0x9C26);
--}
--
--static void ehci_enable_xhci_companion(void)
--{
--	struct pci_dev		*companion = NULL;
--
--	/* The xHCI and EHCI controllers are not on the same PCI slot */
--	for_each_pci_dev(companion) {
--		if (!usb_is_intel_switchable_xhci(companion))
--			continue;
--		usb_enable_xhci_ports(companion);
--		return;
--	}
--}
--
- static int ehci_pci_resume(struct usb_hcd *hcd, bool hibernated)
- {
- 	struct ehci_hcd		*ehci = hcd_to_ehci(hcd);
- 	struct pci_dev		*pdev = to_pci_dev(hcd->self.controller);
- 
--	/* The BIOS on systems with the Intel Panther Point chipset may or may
--	 * not support xHCI natively.  That means that during system resume, it
--	 * may switch the ports back to EHCI so that users can use their
--	 * keyboard to select a kernel from GRUB after resume from hibernate.
--	 *
--	 * The BIOS is supposed to remember whether the OS had xHCI ports
--	 * enabled before resume, and switch the ports back to xHCI when the
--	 * BIOS/OS semaphore is written, but we all know we can't trust BIOS
--	 * writers.
--	 *
--	 * Unconditionally switch the ports back to xHCI after a system resume.
--	 * We can't tell whether the EHCI or xHCI controller will be resumed
--	 * first, so we have to do the port switchover in both drivers.  Writing
--	 * a '1' to the port switchover registers should have no effect if the
--	 * port was already switched over.
--	 */
--	if (usb_is_intel_switchable_ehci(pdev))
--		ehci_enable_xhci_companion();
--
- 	if (ehci_resume(hcd, hibernated) != 0)
- 		(void) ehci_pci_reinit(ehci, pdev);
- 	return 0;
-diff --git a/drivers/usb/host/pci-quirks.c b/drivers/usb/host/pci-quirks.c
-index 4c338ec03a07..1e25aadb4fd0 100644
---- a/drivers/usb/host/pci-quirks.c
-+++ b/drivers/usb/host/pci-quirks.c
-@@ -722,32 +722,6 @@ static int handshake(void __iomem *ptr, u32 mask, u32 done,
- 	return -ETIMEDOUT;
- }
- 
--#define PCI_DEVICE_ID_INTEL_LYNX_POINT_XHCI	0x8C31
--#define PCI_DEVICE_ID_INTEL_LYNX_POINT_LP_XHCI	0x9C31
--
--bool usb_is_intel_ppt_switchable_xhci(struct pci_dev *pdev)
--{
--	return pdev->class == PCI_CLASS_SERIAL_USB_XHCI &&
--		pdev->vendor == PCI_VENDOR_ID_INTEL &&
--		pdev->device == PCI_DEVICE_ID_INTEL_PANTHERPOINT_XHCI;
--}
--
--/* The Intel Lynx Point chipset also has switchable ports. */
--bool usb_is_intel_lpt_switchable_xhci(struct pci_dev *pdev)
--{
--	return pdev->class == PCI_CLASS_SERIAL_USB_XHCI &&
--		pdev->vendor == PCI_VENDOR_ID_INTEL &&
--		(pdev->device == PCI_DEVICE_ID_INTEL_LYNX_POINT_XHCI ||
--		 pdev->device == PCI_DEVICE_ID_INTEL_LYNX_POINT_LP_XHCI);
--}
--
--bool usb_is_intel_switchable_xhci(struct pci_dev *pdev)
--{
--	return usb_is_intel_ppt_switchable_xhci(pdev) ||
--		usb_is_intel_lpt_switchable_xhci(pdev);
--}
--EXPORT_SYMBOL_GPL(usb_is_intel_switchable_xhci);
--
- /*
-  * Intel's Panther Point chipset has two host controllers (EHCI and xHCI) that
-  * share some number of ports.  These ports can be switched between either
-@@ -766,9 +740,23 @@ EXPORT_SYMBOL_GPL(usb_is_intel_switchable_xhci);
-  * terminations before switching the USB 2.0 wires over, so that USB 3.0
-  * devices connect at SuperSpeed, rather than at USB 2.0 speeds.
-  */
--void usb_enable_xhci_ports(struct pci_dev *xhci_pdev)
-+void usb_enable_intel_xhci_ports(struct pci_dev *xhci_pdev)
- {
- 	u32		ports_available;
-+	bool		ehci_found = false;
-+	struct pci_dev	*companion = NULL;
-+
-+	/* make sure an intel EHCI controller exists */
-+	for_each_pci_dev(companion) {
-+		if (companion->class == PCI_CLASS_SERIAL_USB_EHCI &&
-+		    companion->vendor == PCI_VENDOR_ID_INTEL) {
-+			ehci_found = true;
-+			break;
-+		}
-+	}
-+
-+	if (!ehci_found)
-+		return;
- 
- 	/* Don't switchover the ports if the user hasn't compiled the xHCI
- 	 * driver.  Otherwise they will see "dead" USB ports that don't power
-@@ -827,7 +815,7 @@ void usb_enable_xhci_ports(struct pci_dev *xhci_pdev)
- 	dev_dbg(&xhci_pdev->dev, "USB 2.0 ports that are now switched over "
- 			"to xHCI: 0x%x\n", ports_available);
- }
--EXPORT_SYMBOL_GPL(usb_enable_xhci_ports);
-+EXPORT_SYMBOL_GPL(usb_enable_intel_xhci_ports);
- 
- void usb_disable_xhci_ports(struct pci_dev *xhci_pdev)
- {
-@@ -908,8 +896,8 @@ static void quirk_usb_handoff_xhci(struct pci_dev *pdev)
- 	writel(val, base + ext_cap_offset + XHCI_LEGACY_CONTROL_OFFSET);
- 
- hc_init:
--	if (usb_is_intel_switchable_xhci(pdev))
--		usb_enable_xhci_ports(pdev);
-+	if (pdev->vendor == PCI_VENDOR_ID_INTEL)
-+		usb_enable_intel_xhci_ports(pdev);
- 
- 	op_reg_base = base + XHCI_HC_LENGTH(readl(base));
- 
-diff --git a/drivers/usb/host/pci-quirks.h b/drivers/usb/host/pci-quirks.h
-index 7f69a39163ce..1da0b5bfb7b8 100644
---- a/drivers/usb/host/pci-quirks.h
-+++ b/drivers/usb/host/pci-quirks.h
-@@ -8,8 +8,7 @@ int usb_amd_find_chipset_info(void);
- void usb_amd_dev_put(void);
- void usb_amd_quirk_pll_disable(void);
- void usb_amd_quirk_pll_enable(void);
--bool usb_is_intel_switchable_xhci(struct pci_dev *pdev);
--void usb_enable_xhci_ports(struct pci_dev *xhci_pdev);
-+void usb_enable_intel_xhci_ports(struct pci_dev *xhci_pdev);
- void usb_disable_xhci_ports(struct pci_dev *xhci_pdev);
- #else
- static inline void usb_amd_quirk_pll_disable(void) {}
-diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c
-index 159e3c6d92b9..08335bafc8f7 100644
---- a/drivers/usb/host/xhci-pci.c
-+++ b/drivers/usb/host/xhci-pci.c
-@@ -249,13 +249,15 @@ static int xhci_pci_resume(struct usb_hcd *hcd, bool hibernated)
- 	 * writers.
- 	 *
- 	 * Unconditionally switch the ports back to xHCI after a system resume.
--	 * We can't tell whether the EHCI or xHCI controller will be resumed
--	 * first, so we have to do the port switchover in both drivers.  Writing
--	 * a '1' to the port switchover registers should have no effect if the
--	 * port was already switched over.
-+	 * It should not matter whether the EHCI or xHCI controller is
-+	 * resumed first. It's enough to do the switchover in xHCI because
-+	 * USB core won't notice anything as the hub driver doesn't start
-+	 * running again until after all the devices (including both EHCI and
-+	 * xHCI host controllers) have been resumed.
- 	 */
--	if (usb_is_intel_switchable_xhci(pdev))
--		usb_enable_xhci_ports(pdev);
-+
-+	if (pdev->vendor == PCI_VENDOR_ID_INTEL)
-+		usb_enable_intel_xhci_ports(pdev);
- 
- 	retval = xhci_resume(xhci, hibernated);
- 	return retval;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1152-serial-8250_dw-Report-CTS-asserted-for-auto-flow.patch b/patches.baytrail/1152-serial-8250_dw-Report-CTS-asserted-for-auto-flow.patch
deleted file mode 100644
index e73ba4b6c2ac2..0000000000000
--- a/patches.baytrail/1152-serial-8250_dw-Report-CTS-asserted-for-auto-flow.patch
+++ /dev/null
@@ -1,108 +0,0 @@
-From 79fa298daea67ca0dc2aee83970d2016e87570c7 Mon Sep 17 00:00:00 2001
-From: Tim Kryger <tim.kryger@linaro.org>
-Date: Fri, 16 Aug 2013 13:50:15 -0700
-Subject: serial: 8250_dw: Report CTS asserted for auto flow
-
-When a serial port is configured for RTS/CTS flow control, serial core
-will disable the transmitter if it observes CTS is de-asserted. This is
-perfectly reasonable and appropriate when the UART lacks the ability to
-automatically perform CTS flow control.
-
-However, if the UART hardware can manage flow control automatically, it
-is important that software not get involved.  When the DesignWare UART
-enables 16C750 style auto-RTS/CTS it stops generating interrupts for
-changes in CTS state so software mostly stays out of the way.  However,
-it does report the true state of CTS in the MSR so software may notice
-it is de-asserted and respond by improperly disabling the transmitter.
-Once this happens the transmitter will be blocked forever.
-
-To avoid this situation, we simply lie to the 8250 and serial core by
-reporting that CTS is asserted whenever auto-RTS/CTS mode is enabled.
-
-Signed-off-by: Tim Kryger <tim.kryger@linaro.org>
-Reviewed-by: Matt Porter <matt.porter@linaro.org>
-Reviewed-by: Markus Mayer <markus.mayer@linaro.org>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 33acbb82695f84e9429c1f7fbdeb4588dea12ffa)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/tty/serial/8250/8250_dw.c | 34 ++++++++++++++++++++++++++--------
- 1 file changed, 26 insertions(+), 8 deletions(-)
-
-diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c
-index 76a8daadff47..daf710f5c3fc 100644
---- a/drivers/tty/serial/8250/8250_dw.c
-+++ b/drivers/tty/serial/8250/8250_dw.c
-@@ -57,11 +57,25 @@
- 
- struct dw8250_data {
- 	int		last_lcr;
-+	int		last_mcr;
- 	int		line;
- 	struct clk	*clk;
- 	u8		usr_reg;
- };
- 
-+static inline int dw8250_modify_msr(struct uart_port *p, int offset, int value)
-+{
-+	struct dw8250_data *d = p->private_data;
-+
-+	/* If reading MSR, report CTS asserted when auto-CTS/RTS enabled */
-+	if (offset == UART_MSR && d->last_mcr & UART_MCR_AFE) {
-+		value |= UART_MSR_CTS;
-+		value &= ~UART_MSR_DCTS;
-+	}
-+
-+	return value;
-+}
-+
- static void dw8250_serial_out(struct uart_port *p, int offset, int value)
- {
- 	struct dw8250_data *d = p->private_data;
-@@ -69,15 +83,17 @@ static void dw8250_serial_out(struct uart_port *p, int offset, int value)
- 	if (offset == UART_LCR)
- 		d->last_lcr = value;
- 
--	offset <<= p->regshift;
--	writeb(value, p->membase + offset);
-+	if (offset == UART_MCR)
-+		d->last_mcr = value;
-+
-+	writeb(value, p->membase + (offset << p->regshift));
- }
- 
- static unsigned int dw8250_serial_in(struct uart_port *p, int offset)
- {
--	offset <<= p->regshift;
-+	unsigned int value = readb(p->membase + (offset << p->regshift));
- 
--	return readb(p->membase + offset);
-+	return dw8250_modify_msr(p, offset, value);
- }
- 
- /* Read Back (rb) version to ensure register access ording. */
-@@ -94,15 +110,17 @@ static void dw8250_serial_out32(struct uart_port *p, int offset, int value)
- 	if (offset == UART_LCR)
- 		d->last_lcr = value;
- 
--	offset <<= p->regshift;
--	writel(value, p->membase + offset);
-+	if (offset == UART_MCR)
-+		d->last_mcr = value;
-+
-+	writel(value, p->membase + (offset << p->regshift));
- }
- 
- static unsigned int dw8250_serial_in32(struct uart_port *p, int offset)
- {
--	offset <<= p->regshift;
-+	unsigned int value = readl(p->membase + (offset << p->regshift));
- 
--	return readl(p->membase + offset);
-+	return dw8250_modify_msr(p, offset, value);
- }
- 
- static int dw8250_handle_irq(struct uart_port *p)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1153-pinctrl-baytrail-fix-indentations.patch b/patches.baytrail/1153-pinctrl-baytrail-fix-indentations.patch
deleted file mode 100644
index 4fcae79b1e37d..0000000000000
--- a/patches.baytrail/1153-pinctrl-baytrail-fix-indentations.patch
+++ /dev/null
@@ -1,46 +0,0 @@
-From 8331aa29242c00b5d2f83f0d052177fb2c576169 Mon Sep 17 00:00:00 2001
-From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-Date: Wed, 10 Jul 2013 14:55:36 +0300
-Subject: pinctrl-baytrail: fix indentations
-
-There are two minor issues with indentation in the code. This patch fixes them.
-No functional changes.
-
-Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-(cherry picked from commit ec243320e02ca9e3cb64c0ba774e25db73b32fdb)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/pinctrl/Kconfig            | 2 +-
- drivers/pinctrl/pinctrl-baytrail.c | 1 +
- 2 files changed, 2 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
-index d49cce921ae5..adeb1fed04cc 100644
---- a/drivers/pinctrl/Kconfig
-+++ b/drivers/pinctrl/Kconfig
-@@ -61,7 +61,7 @@ config PINCTRL_AT91
- config PINCTRL_BAYTRAIL
- 	bool "Intel Baytrail GPIO pin control"
- 	depends on GPIOLIB && ACPI && X86
--        select IRQ_DOMAIN
-+	select IRQ_DOMAIN
- 	help
- 	  driver for memory mapped GPIO functionality on Intel Baytrail
- 	  platforms. Supports 3 banks with 102, 28 and 44 gpios.
-diff --git a/drivers/pinctrl/pinctrl-baytrail.c b/drivers/pinctrl/pinctrl-baytrail.c
-index e9d735dcebfb..fccf72eea079 100644
---- a/drivers/pinctrl/pinctrl-baytrail.c
-+++ b/drivers/pinctrl/pinctrl-baytrail.c
-@@ -516,6 +516,7 @@ static int byt_gpio_remove(struct platform_device *pdev)
- {
- 	struct byt_gpio *vg = platform_get_drvdata(pdev);
- 	int err;
-+
- 	pm_runtime_disable(&pdev->dev);
- 	err = gpiochip_remove(&vg->chip);
- 	if (err)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1154-pinctrl-baytrail-change-lvl-to-level.patch b/patches.baytrail/1154-pinctrl-baytrail-change-lvl-to-level.patch
deleted file mode 100644
index 8a0c6208d02af..0000000000000
--- a/patches.baytrail/1154-pinctrl-baytrail-change-lvl-to-level.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From 8464cfca111fa64d0a13208ca09ebffe2ffba6a2 Mon Sep 17 00:00:00 2001
-From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-Date: Wed, 10 Jul 2013 16:42:14 +0300
-Subject: pinctrl-baytrail: change lvl to level
-
-Additionally remove trailing whitespace when print triggering type.
-
-Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-(cherry picked from commit 1583449ef71610cc07df264db34870f79f4bcd12)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/pinctrl/pinctrl-baytrail.c | 6 +++---
- 1 file changed, 3 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/pinctrl/pinctrl-baytrail.c b/drivers/pinctrl/pinctrl-baytrail.c
-index fccf72eea079..f3d305312663 100644
---- a/drivers/pinctrl/pinctrl-baytrail.c
-+++ b/drivers/pinctrl/pinctrl-baytrail.c
-@@ -294,9 +294,9 @@ static void byt_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
- 			   val & BYT_LEVEL ? "hi" : "lo",
- 			   vg->range->pins[i], offs,
- 			   conf0 & 0x7,
--			   conf0 & BYT_TRIG_NEG ? "fall " : "",
--			   conf0 & BYT_TRIG_POS ? "rise " : "",
--			   conf0 & BYT_TRIG_LVL ? "lvl " : "");
-+			   conf0 & BYT_TRIG_NEG ? " fall" : "",
-+			   conf0 & BYT_TRIG_POS ? " rise" : "",
-+			   conf0 & BYT_TRIG_LVL ? " level" : "");
- 	}
- 	spin_unlock_irqrestore(&vg->lock, flags);
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1155-pinctrl-baytrail-remove-redundant-ptr-variable.patch b/patches.baytrail/1155-pinctrl-baytrail-remove-redundant-ptr-variable.patch
deleted file mode 100644
index 16b56d4730315..0000000000000
--- a/patches.baytrail/1155-pinctrl-baytrail-remove-redundant-ptr-variable.patch
+++ /dev/null
@@ -1,40 +0,0 @@
-From ec071effb28fc43951e59dadc140e2fd28625710 Mon Sep 17 00:00:00 2001
-From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-Date: Wed, 10 Jul 2013 14:55:38 +0300
-Subject: pinctrl-baytrail: remove redundant ptr variable
-
-There is no need to have an additional variable in byt_gpio_reg().
-
-Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-(cherry picked from commit 9c5b65579597609844ae248a6e76f614f02e3c42)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/pinctrl/pinctrl-baytrail.c | 4 +---
- 1 file changed, 1 insertion(+), 3 deletions(-)
-
-diff --git a/drivers/pinctrl/pinctrl-baytrail.c b/drivers/pinctrl/pinctrl-baytrail.c
-index f3d305312663..71fa88754718 100644
---- a/drivers/pinctrl/pinctrl-baytrail.c
-+++ b/drivers/pinctrl/pinctrl-baytrail.c
-@@ -135,15 +135,13 @@ static void __iomem *byt_gpio_reg(struct gpio_chip *chip, unsigned offset,
- {
- 	struct byt_gpio *vg = container_of(chip, struct byt_gpio, chip);
- 	u32 reg_offset;
--	void __iomem *ptr;
- 
- 	if (reg == BYT_INT_STAT_REG)
- 		reg_offset = (offset / 32) * 4;
- 	else
- 		reg_offset = vg->range->pins[offset] * 16;
- 
--	ptr = (void __iomem *) (vg->reg_base + reg_offset + reg);
--	return ptr;
-+	return vg->reg_base + reg_offset + reg;
- }
- 
- static int byt_gpio_request(struct gpio_chip *chip, unsigned offset)
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1156-pinctrl-baytrail-introduce-to_byt_gpio-macro.patch b/patches.baytrail/1156-pinctrl-baytrail-introduce-to_byt_gpio-macro.patch
deleted file mode 100644
index 27550066e34f9..0000000000000
--- a/patches.baytrail/1156-pinctrl-baytrail-introduce-to_byt_gpio-macro.patch
+++ /dev/null
@@ -1,100 +0,0 @@
-From 8c0ac1095995d0f91e120e3b1281a10d2d3d38ee Mon Sep 17 00:00:00 2001
-From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-Date: Wed, 10 Jul 2013 14:55:39 +0300
-Subject: pinctrl-baytrail: introduce to_byt_gpio() macro
-
-The introduced macro helps to convert struct gpio_chip to struct byt_gpio.
-
-Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-(cherry picked from commit 17e52464292320d0de260b146605d93326a9014c)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/pinctrl/pinctrl-baytrail.c | 18 ++++++++++--------
- 1 file changed, 10 insertions(+), 8 deletions(-)
-
-diff --git a/drivers/pinctrl/pinctrl-baytrail.c b/drivers/pinctrl/pinctrl-baytrail.c
-index 71fa88754718..3bf7c948b7fc 100644
---- a/drivers/pinctrl/pinctrl-baytrail.c
-+++ b/drivers/pinctrl/pinctrl-baytrail.c
-@@ -130,10 +130,12 @@ struct byt_gpio {
- 	struct pinctrl_gpio_range	*range;
- };
- 
-+#define to_byt_gpio(c)	container_of(c, struct byt_gpio, chip)
-+
- static void __iomem *byt_gpio_reg(struct gpio_chip *chip, unsigned offset,
- 				 int reg)
- {
--	struct byt_gpio *vg = container_of(chip, struct byt_gpio, chip);
-+	struct byt_gpio *vg = to_byt_gpio(chip);
- 	u32 reg_offset;
- 
- 	if (reg == BYT_INT_STAT_REG)
-@@ -146,7 +148,7 @@ static void __iomem *byt_gpio_reg(struct gpio_chip *chip, unsigned offset,
- 
- static int byt_gpio_request(struct gpio_chip *chip, unsigned offset)
- {
--	struct byt_gpio *vg = container_of(chip, struct byt_gpio, chip);
-+	struct byt_gpio *vg = to_byt_gpio(chip);
- 
- 	pm_runtime_get(&vg->pdev->dev);
- 
-@@ -155,7 +157,7 @@ static int byt_gpio_request(struct gpio_chip *chip, unsigned offset)
- 
- static void byt_gpio_free(struct gpio_chip *chip, unsigned offset)
- {
--	struct byt_gpio *vg = container_of(chip, struct byt_gpio, chip);
-+	struct byt_gpio *vg = to_byt_gpio(chip);
- 	void __iomem *reg = byt_gpio_reg(&vg->chip, offset, BYT_CONF0_REG);
- 	u32 value;
- 
-@@ -216,7 +218,7 @@ static int byt_gpio_get(struct gpio_chip *chip, unsigned offset)
- 
- static void byt_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
- {
--	struct byt_gpio *vg = container_of(chip, struct byt_gpio, chip);
-+	struct byt_gpio *vg = to_byt_gpio(chip);
- 	void __iomem *reg = byt_gpio_reg(chip, offset, BYT_VAL_REG);
- 	unsigned long flags;
- 	u32 old_val;
-@@ -235,7 +237,7 @@ static void byt_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
- 
- static int byt_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
- {
--	struct byt_gpio *vg = container_of(chip, struct byt_gpio, chip);
-+	struct byt_gpio *vg = to_byt_gpio(chip);
- 	void __iomem *reg = byt_gpio_reg(chip, offset, BYT_VAL_REG);
- 	unsigned long flags;
- 	u32 value;
-@@ -254,7 +256,7 @@ static int byt_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
- static int byt_gpio_direction_output(struct gpio_chip *chip,
- 				     unsigned gpio, int value)
- {
--	struct byt_gpio *vg = container_of(chip, struct byt_gpio, chip);
-+	struct byt_gpio *vg = to_byt_gpio(chip);
- 	void __iomem *reg = byt_gpio_reg(chip, gpio, BYT_VAL_REG);
- 	unsigned long flags;
- 	u32 reg_val;
-@@ -272,7 +274,7 @@ static int byt_gpio_direction_output(struct gpio_chip *chip,
- 
- static void byt_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
- {
--	struct byt_gpio *vg = container_of(chip, struct byt_gpio, chip);
-+	struct byt_gpio *vg = to_byt_gpio(chip);
- 	int i;
- 	unsigned long flags;
- 	u32 conf0, val, offs;
-@@ -301,7 +303,7 @@ static void byt_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
- 
- static int byt_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
- {
--	struct byt_gpio *vg = container_of(chip, struct byt_gpio, chip);
-+	struct byt_gpio *vg = to_byt_gpio(chip);
- 	return irq_create_mapping(vg->domain, offset);
- }
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1157-pinctrl-baytrail-fix-to-avoid-sparse-warnings.patch b/patches.baytrail/1157-pinctrl-baytrail-fix-to-avoid-sparse-warnings.patch
deleted file mode 100644
index c7704f9728b33..0000000000000
--- a/patches.baytrail/1157-pinctrl-baytrail-fix-to-avoid-sparse-warnings.patch
+++ /dev/null
@@ -1,55 +0,0 @@
-From f026e212d863f8798d12a8420c52616f44dc551f Mon Sep 17 00:00:00 2001
-From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-Date: Wed, 10 Jul 2013 14:55:40 +0300
-Subject: pinctrl-baytrail: fix to avoid sparse warnings
-
-There are couple of sparse warnings we could avoid if we use a bit verbose
-version of the code in byt_gpio_direction_output().
-
-drivers/pinctrl/pinctrl-baytrail.c:266:45: warning: dubious: x | !y
-drivers/pinctrl/pinctrl-baytrail.c:267:36: warning: dubious: x | !y
-
-Additionally simplify a bit the code in byt_gpio_direction_input().
-
-Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-(cherry picked from commit 496940c10278599528cfbde0e05208bf4ef0c7c0)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/pinctrl/pinctrl-baytrail.c | 12 ++++++++----
- 1 file changed, 8 insertions(+), 4 deletions(-)
-
-diff --git a/drivers/pinctrl/pinctrl-baytrail.c b/drivers/pinctrl/pinctrl-baytrail.c
-index 3bf7c948b7fc..2832576d8b12 100644
---- a/drivers/pinctrl/pinctrl-baytrail.c
-+++ b/drivers/pinctrl/pinctrl-baytrail.c
-@@ -245,7 +245,7 @@ static int byt_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
- 	spin_lock_irqsave(&vg->lock, flags);
- 
- 	value = readl(reg) | BYT_DIR_MASK;
--	value = value & (~BYT_INPUT_EN); /* active low */
-+	value &= ~BYT_INPUT_EN;		/* active low */
- 	writel(value, reg);
- 
- 	spin_unlock_irqrestore(&vg->lock, flags);
-@@ -263,9 +263,13 @@ static int byt_gpio_direction_output(struct gpio_chip *chip,
- 
- 	spin_lock_irqsave(&vg->lock, flags);
- 
--	reg_val = readl(reg) | (BYT_DIR_MASK | !!value);
--	reg_val &= ~(BYT_OUTPUT_EN | !value);
--	writel(reg_val, reg);
-+	reg_val = readl(reg) | BYT_DIR_MASK;
-+	reg_val &= ~BYT_OUTPUT_EN;
-+
-+	if (value)
-+		writel(reg_val | BYT_LEVEL, reg);
-+	else
-+		writel(reg_val & ~BYT_LEVEL, reg);
- 
- 	spin_unlock_irqrestore(&vg->lock, flags);
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1158-ASoC-fsl-imx-wm8962-Fix-error-path.patch b/patches.baytrail/1158-ASoC-fsl-imx-wm8962-Fix-error-path.patch
deleted file mode 100644
index f34dd7ea2cb45..0000000000000
--- a/patches.baytrail/1158-ASoC-fsl-imx-wm8962-Fix-error-path.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From a25581012077eae30091d7f5698fe63e0c990552 Mon Sep 17 00:00:00 2001
-From: Fabio Estevam <fabio.estevam@freescale.com>
-Date: Thu, 18 Jul 2013 15:07:48 -0300
-Subject: ASoC: fsl: imx-wm8962: Fix error path
-
-If the 'failed to find codec platform device' error path is executed, it should
-jump to 'fail' label instead of returning an error immediately.
-
-'fail' label will then free the ssi_np and codec_np previously acquired nodes.
-
-Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
-Signed-off-by: Mark Brown <broonie@linaro.org>
-(cherry picked from commit d8a14e302ffeecc312186b8b9b0efc8963cec83b)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- sound/soc/fsl/imx-wm8962.c | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
-diff --git a/sound/soc/fsl/imx-wm8962.c b/sound/soc/fsl/imx-wm8962.c
-index 52a36a90f4f4..1d70e278e915 100644
---- a/sound/soc/fsl/imx-wm8962.c
-+++ b/sound/soc/fsl/imx-wm8962.c
-@@ -217,7 +217,8 @@ static int imx_wm8962_probe(struct platform_device *pdev)
- 	codec_dev = of_find_i2c_device_by_node(codec_np);
- 	if (!codec_dev || !codec_dev->driver) {
- 		dev_err(&pdev->dev, "failed to find codec platform device\n");
--		return -EINVAL;
-+		ret = -EINVAL;
-+		goto fail;
- 	}
- 
- 	data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1159-i2c-designware-Manually-set-RESTART-bit-between-mess.patch b/patches.baytrail/1159-i2c-designware-Manually-set-RESTART-bit-between-mess.patch
deleted file mode 100644
index 1b2d2e385d103..0000000000000
--- a/patches.baytrail/1159-i2c-designware-Manually-set-RESTART-bit-between-mess.patch
+++ /dev/null
@@ -1,62 +0,0 @@
-From b76de9b136ab6f5e6fae14379a6f205bf3af3c9b Mon Sep 17 00:00:00 2001
-From: "Chew, Chiau Ee" <chiau.ee.chew@intel.com>
-Date: Fri, 21 Jun 2013 15:05:28 +0800
-Subject: i2c: designware: Manually set RESTART bit between messages
-
-If both IC_EMPTYFIFO_HOLD_MASTER_EN and IC_RESTART_EN are set to 1, the
-Designware I2C controller doesn't generate RESTART unless user specifically
-requests it by setting RESTART bit in IC_DATA_CMD register.
-
-Since IC_EMPTYFIFO_HOLD_MASTER_EN setting can't be detected from hardware
-register, we must always manually set the restart bit between messages.
-
-Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
-Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-(cherry picked from commit 825642455367e5498da82a8044dd345ac7869c8d)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/i2c/busses/i2c-designware-core.c | 14 ++++++++++++++
- 1 file changed, 14 insertions(+)
-
-diff --git a/drivers/i2c/busses/i2c-designware-core.c b/drivers/i2c/busses/i2c-designware-core.c
-index ad46616de29e..f325ec7abfb1 100644
---- a/drivers/i2c/busses/i2c-designware-core.c
-+++ b/drivers/i2c/busses/i2c-designware-core.c
-@@ -416,6 +416,7 @@ i2c_dw_xfer_msg(struct dw_i2c_dev *dev)
- 	u32 addr = msgs[dev->msg_write_idx].addr;
- 	u32 buf_len = dev->tx_buf_len;
- 	u8 *buf = dev->tx_buf;
-+	bool need_restart = false;
- 
- 	intr_mask = DW_IC_INTR_DEFAULT_MASK;
- 
-@@ -443,6 +444,14 @@ i2c_dw_xfer_msg(struct dw_i2c_dev *dev)
- 			/* new i2c_msg */
- 			buf = msgs[dev->msg_write_idx].buf;
- 			buf_len = msgs[dev->msg_write_idx].len;
-+
-+			/* If both IC_EMPTYFIFO_HOLD_MASTER_EN and
-+			 * IC_RESTART_EN are set, we must manually
-+			 * set restart bit between messages.
-+			 */
-+			if ((dev->master_cfg & DW_IC_CON_RESTART_EN) &&
-+					(dev->msg_write_idx > 0))
-+				need_restart = true;
- 		}
- 
- 		tx_limit = dev->tx_fifo_depth - dw_readl(dev, DW_IC_TXFLR);
-@@ -461,6 +470,11 @@ i2c_dw_xfer_msg(struct dw_i2c_dev *dev)
- 			    buf_len == 1)
- 				cmd |= BIT(9);
- 
-+			if (need_restart) {
-+				cmd |= BIT(10);
-+				need_restart = false;
-+			}
-+
- 			if (msgs[dev->msg_write_idx].flags & I2C_M_RD) {
- 
- 				/* avoid rx buffer overrun */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1160-i2c-designware-add-CONFIG_PM_SLEEP-to-suspend-resume.patch b/patches.baytrail/1160-i2c-designware-add-CONFIG_PM_SLEEP-to-suspend-resume.patch
deleted file mode 100644
index 52e189144de77..0000000000000
--- a/patches.baytrail/1160-i2c-designware-add-CONFIG_PM_SLEEP-to-suspend-resume.patch
+++ /dev/null
@@ -1,60 +0,0 @@
-From e9dab917574c3fe1cb75b8d2077e5c492be285a8 Mon Sep 17 00:00:00 2001
-From: Jingoo Han <jg1.han@samsung.com>
-Date: Mon, 15 Jul 2013 11:28:59 +0900
-Subject: i2c: designware: add CONFIG_PM_SLEEP to suspend/resume functions
-
-Add CONFIG_PM_SLEEP to suspend/resume functions to fix the following
-build warning when CONFIG_PM_SLEEP is not selected. This is because
-sleep PM callbacks defined by SIMPLE_DEV_PM_OPS are only used when
-the CONFIG_PM_SLEEP is enabled.
-
-drivers/i2c/busses/i2c-designware-platdrv.c:211:12: warning: 'dw_i2c_suspend' defined but not used [-Wunused-function]
-drivers/i2c/busses/i2c-designware-platdrv.c:221:12: warning: 'dw_i2c_resume' defined but not used [-Wunused-function]
-
-Signed-off-by: Jingoo Han <jg1.han@samsung.com>
-Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-(cherry picked from commit dfb03fb246dc893743a28d00966b1862ae836f2d)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/i2c/busses/i2c-designware-platdrv.c | 9 ++++++---
- 1 file changed, 6 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/i2c/busses/i2c-designware-platdrv.c b/drivers/i2c/busses/i2c-designware-platdrv.c
-index 4c5fadabe49d..64ffb908641c 100644
---- a/drivers/i2c/busses/i2c-designware-platdrv.c
-+++ b/drivers/i2c/busses/i2c-designware-platdrv.c
-@@ -207,7 +207,7 @@ static const struct of_device_id dw_i2c_of_match[] = {
- MODULE_DEVICE_TABLE(of, dw_i2c_of_match);
- #endif
- 
--#ifdef CONFIG_PM
-+#ifdef CONFIG_PM_SLEEP
- static int dw_i2c_suspend(struct device *dev)
- {
- 	struct platform_device *pdev = to_platform_device(dev);
-@@ -228,9 +228,12 @@ static int dw_i2c_resume(struct device *dev)
- 
- 	return 0;
- }
--#endif
- 
- static SIMPLE_DEV_PM_OPS(dw_i2c_dev_pm_ops, dw_i2c_suspend, dw_i2c_resume);
-+#define DW_I2C_DEV_PM_OPS	(&dw_i2c_dev_pm_ops)
-+#else
-+#define DW_I2C_DEV_PM_OPS	NULL
-+#endif
- 
- /* work with hotplug and coldplug */
- MODULE_ALIAS("platform:i2c_designware");
-@@ -242,7 +245,7 @@ static struct platform_driver dw_i2c_driver = {
- 		.owner	= THIS_MODULE,
- 		.of_match_table = of_match_ptr(dw_i2c_of_match),
- 		.acpi_match_table = ACPI_PTR(dw_i2c_acpi_match),
--		.pm	= &dw_i2c_dev_pm_ops,
-+		.pm	= DW_I2C_DEV_PM_OPS,
- 	},
- };
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1161-i2c-stu300-add-CONFIG_PM_SLEEP-to-suspend-resume-fun.patch b/patches.baytrail/1161-i2c-stu300-add-CONFIG_PM_SLEEP-to-suspend-resume-fun.patch
deleted file mode 100644
index 8c9c7d796395b..0000000000000
--- a/patches.baytrail/1161-i2c-stu300-add-CONFIG_PM_SLEEP-to-suspend-resume-fun.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From f3798c369bd0549797c20dd8230df54bc49ace74 Mon Sep 17 00:00:00 2001
-From: Jingoo Han <jg1.han@samsung.com>
-Date: Mon, 15 Jul 2013 11:29:56 +0900
-Subject: i2c: stu300: add CONFIG_PM_SLEEP to suspend/resume functions
-
-Add CONFIG_PM_SLEEP to suspend/resume functions to fix the following
-build warning when CONFIG_PM_SLEEP is not selected. This is because
-sleep PM callbacks defined by SIMPLE_DEV_PM_OPS are only used when
-the CONFIG_PM_SLEEP is enabled.
-
-drivers/i2c/busses/i2c-stu300.c:945:12: warning: 'stu300_suspend' defined but not used [-Wunused-function]
-drivers/i2c/busses/i2c-stu300.c:954:12: warning: 'stu300_resume' defined but not used [-Wunused-function]
-
-Signed-off-by: Jingoo Han <jg1.han@samsung.com>
-Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-(cherry picked from commit 71f1260e713bc663ade4b200bfff7cfc97bf34a1)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/i2c/busses/i2c-stu300.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/i2c/busses/i2c-stu300.c b/drivers/i2c/busses/i2c-stu300.c
-index d1a6b204af00..3d4d8b6ced4a 100644
---- a/drivers/i2c/busses/i2c-stu300.c
-+++ b/drivers/i2c/busses/i2c-stu300.c
-@@ -941,7 +941,7 @@ stu300_probe(struct platform_device *pdev)
- 	return 0;
- }
- 
--#ifdef CONFIG_PM
-+#ifdef CONFIG_PM_SLEEP
- static int stu300_suspend(struct device *device)
- {
- 	struct stu300_dev *dev = dev_get_drvdata(device);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1162-i2c-imx-use-struct-representing-i2c-clk-div-val-pair.patch b/patches.baytrail/1162-i2c-imx-use-struct-representing-i2c-clk-div-val-pair.patch
deleted file mode 100644
index 03a1b00db44ed..0000000000000
--- a/patches.baytrail/1162-i2c-imx-use-struct-representing-i2c-clk-div-val-pair.patch
+++ /dev/null
@@ -1,85 +0,0 @@
-From 5d27746372023394697872e5869f4e044a8add00 Mon Sep 17 00:00:00 2001
-From: Jingchang Lu <b35083@freescale.com>
-Date: Wed, 7 Aug 2013 17:05:36 +0800
-Subject: i2c: imx: use struct representing i2c clk{div, val} pair
-
-using struct representing the i2c clk{div, val} pair would
-make the i2c_clk_div array more clear.
-
-Signed-off-by: Jingchang Lu <b35083@freescale.com>
-Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de>
-Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-(cherry picked from commit d533f0492b6371025a4f88506c7f1828a7a48e81)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/i2c/busses/i2c-imx.c | 20 +++++++++++++-------
- 1 file changed, 13 insertions(+), 7 deletions(-)
-
-diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c
-index e24279725d36..9167d4332d77 100644
---- a/drivers/i2c/busses/i2c-imx.c
-+++ b/drivers/i2c/busses/i2c-imx.c
-@@ -30,6 +30,8 @@
-  *	Copyright (C) 2007 RightHand Technologies, Inc.
-  *	Copyright (C) 2008 Darius Augulis <darius.augulis at teltonika.lt>
-  *
-+ *	Copyright 2013 Freescale Semiconductor, Inc.
-+ *
-  */
- 
- /** Includes *******************************************************************
-@@ -95,8 +97,12 @@
-  *
-  * Duplicated divider values removed from list
-  */
-+struct imx_i2c_clk_pair {
-+	u16	div;
-+	u16	val;
-+};
- 
--static u16 __initdata i2c_clk_div[50][2] = {
-+static struct imx_i2c_clk_pair __initdata i2c_clk_div[] = {
- 	{ 22,	0x20 }, { 24,	0x21 }, { 26,	0x22 }, { 28,	0x23 },
- 	{ 30,	0x00 },	{ 32,	0x24 }, { 36,	0x25 }, { 40,	0x26 },
- 	{ 42,	0x03 }, { 44,	0x27 },	{ 48,	0x28 }, { 52,	0x05 },
-@@ -274,15 +280,15 @@ static void __init i2c_imx_set_clk(struct imx_i2c_struct *i2c_imx,
- 	/* Divider value calculation */
- 	i2c_clk_rate = clk_get_rate(i2c_imx->clk);
- 	div = (i2c_clk_rate + rate - 1) / rate;
--	if (div < i2c_clk_div[0][0])
-+	if (div < i2c_clk_div[0].div)
- 		i = 0;
--	else if (div > i2c_clk_div[ARRAY_SIZE(i2c_clk_div) - 1][0])
-+	else if (div > i2c_clk_div[ARRAY_SIZE(i2c_clk_div) - 1].div)
- 		i = ARRAY_SIZE(i2c_clk_div) - 1;
- 	else
--		for (i = 0; i2c_clk_div[i][0] < div; i++);
-+		for (i = 0; i2c_clk_div[i].div < div; i++);
- 
- 	/* Store divider value */
--	i2c_imx->ifdr = i2c_clk_div[i][1];
-+	i2c_imx->ifdr = i2c_clk_div[i].val;
- 
- 	/*
- 	 * There dummy delay is calculated.
-@@ -290,7 +296,7 @@ static void __init i2c_imx_set_clk(struct imx_i2c_struct *i2c_imx,
- 	 * This delay is used in I2C bus disable function
- 	 * to fix chip hardware bug.
- 	 */
--	i2c_imx->disable_delay = (500000U * i2c_clk_div[i][0]
-+	i2c_imx->disable_delay = (500000U * i2c_clk_div[i].div
- 		+ (i2c_clk_rate / 2) - 1) / (i2c_clk_rate / 2);
- 
- 	/* dev_dbg() can't be used, because adapter is not yet registered */
-@@ -298,7 +304,7 @@ static void __init i2c_imx_set_clk(struct imx_i2c_struct *i2c_imx,
- 	dev_dbg(&i2c_imx->adapter.dev, "<%s> I2C_CLK=%d, REQ DIV=%d\n",
- 		__func__, i2c_clk_rate, div);
- 	dev_dbg(&i2c_imx->adapter.dev, "<%s> IFDR[IC]=0x%x, REAL DIV=%d\n",
--		__func__, i2c_clk_div[i][1], i2c_clk_div[i][0]);
-+		__func__, i2c_clk_div[i].val, i2c_clk_div[i].div);
- #endif
- }
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1163-i2c-imx-enable-clk-before-write-to-registers.patch b/patches.baytrail/1163-i2c-imx-enable-clk-before-write-to-registers.patch
deleted file mode 100644
index 418d97cd887b4..0000000000000
--- a/patches.baytrail/1163-i2c-imx-enable-clk-before-write-to-registers.patch
+++ /dev/null
@@ -1,45 +0,0 @@
-From d15d909219bd7b6e7923a384015199b060802d5e Mon Sep 17 00:00:00 2001
-From: Jingchang Lu <b35083@freescale.com>
-Date: Wed, 7 Aug 2013 17:05:37 +0800
-Subject: i2c: imx: enable clk before write to registers
-
-The module clk should be enabled before write to
-its register in probe(), and the clk can be disabled
-after.
-
-Signed-off-by: Jingchang Lu <b35083@freescale.com>
-Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de>
-Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-(cherry picked from commit 46f2832b9f66b008fb813fe153f27794412fbc4f)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/i2c/busses/i2c-imx.c | 6 ++++++
- 1 file changed, 6 insertions(+)
-
-diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c
-index 9167d4332d77..7adb35115d95 100644
---- a/drivers/i2c/busses/i2c-imx.c
-+++ b/drivers/i2c/busses/i2c-imx.c
-@@ -543,6 +543,11 @@ static int __init i2c_imx_probe(struct platform_device *pdev)
- 		return PTR_ERR(i2c_imx->clk);
- 	}
- 
-+	ret = clk_prepare_enable(i2c_imx->clk);
-+	if (ret) {
-+		dev_err(&pdev->dev, "can't enable I2C clock\n");
-+		return ret;
-+	}
- 	/* Request IRQ */
- 	ret = devm_request_irq(&pdev->dev, irq, i2c_imx_isr, 0,
- 				pdev->name, i2c_imx);
-@@ -580,6 +585,7 @@ static int __init i2c_imx_probe(struct platform_device *pdev)
- 
- 	/* Set up platform driver data */
- 	platform_set_drvdata(pdev, i2c_imx);
-+	clk_disable_unprepare(i2c_imx->clk);
- 
- 	dev_dbg(&i2c_imx->adapter.dev, "claimed irq %d\n", irq);
- 	dev_dbg(&i2c_imx->adapter.dev, "device resources from 0x%x to 0x%x\n",
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1164-i2c-imx-don-t-change-platform-device-id_entry-direct.patch b/patches.baytrail/1164-i2c-imx-don-t-change-platform-device-id_entry-direct.patch
deleted file mode 100644
index 5c9bcbf34a39f..0000000000000
--- a/patches.baytrail/1164-i2c-imx-don-t-change-platform-device-id_entry-direct.patch
+++ /dev/null
@@ -1,48 +0,0 @@
-From dd3000f590dc1827044bdc1bbbf667e99c296b16 Mon Sep 17 00:00:00 2001
-From: Jingchang Lu <b35083@freescale.com>
-Date: Wed, 7 Aug 2013 17:05:38 +0800
-Subject: i2c: imx: don't change platform device id_entry directly
-
-The id_entry field should be changed by platform driver core,
-driver should prevent changing it derectly. Use local variable
-to save and extract platform_device_id info of the dts devices
-instead.
-
-Signed-off-by: Jingchang Lu <b35083@freescale.com>
-Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de>
-Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-(cherry picked from commit 0fc1347a7fdbcc25204f737998b824fc46662afd)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/i2c/busses/i2c-imx.c | 8 ++++++--
- 1 file changed, 6 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c
-index 7adb35115d95..cbea84bfb0e8 100644
---- a/drivers/i2c/busses/i2c-imx.c
-+++ b/drivers/i2c/busses/i2c-imx.c
-@@ -499,6 +499,7 @@ static int __init i2c_imx_probe(struct platform_device *pdev)
- 	struct imx_i2c_struct *i2c_imx;
- 	struct resource *res;
- 	struct imxi2c_platform_data *pdata = pdev->dev.platform_data;
-+	const struct platform_device_id *imx_id;
- 	void __iomem *base;
- 	int irq, ret;
- 	u32 bitrate;
-@@ -524,8 +525,11 @@ static int __init i2c_imx_probe(struct platform_device *pdev)
- 	}
- 
- 	if (of_id)
--		pdev->id_entry = of_id->data;
--	i2c_imx->devtype = pdev->id_entry->driver_data;
-+		imx_id = of_id->data;
-+	else
-+		imx_id = platform_get_device_id(pdev);
-+
-+	i2c_imx->devtype = imx_id->driver_data;
- 
- 	/* Setup i2c_imx driver structure */
- 	strlcpy(i2c_imx->adapter.name, pdev->name, sizeof(i2c_imx->adapter.name));
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1165-i2c-imx-wrap-registers-read-write-to-inline-function.patch b/patches.baytrail/1165-i2c-imx-wrap-registers-read-write-to-inline-function.patch
deleted file mode 100644
index 8c5fc5fe17723..0000000000000
--- a/patches.baytrail/1165-i2c-imx-wrap-registers-read-write-to-inline-function.patch
+++ /dev/null
@@ -1,252 +0,0 @@
-From 7179e0b2bacc2bec6c1b8f738adbcf8009a87f47 Mon Sep 17 00:00:00 2001
-From: Jingchang Lu <b35083@freescale.com>
-Date: Wed, 7 Aug 2013 17:05:39 +0800
-Subject: i2c: imx: wrap registers read/write to inline function
-
-wrap the readb(), writeb() into inline function calls.
-It would make the driver more clearer to support platform
-with different register offset.
-
-Signed-off-by: Jingchang Lu <b35083@freescale.com>
-Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de>
-Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-(cherry picked from commit 1d5ef2a83e3097408924b5eea8d7750bbde21e45)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/i2c/busses/i2c-imx.c | 80 +++++++++++++++++++++++++-------------------
- 1 file changed, 46 insertions(+), 34 deletions(-)
-
-diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c
-index cbea84bfb0e8..1a3c60854f79 100644
---- a/drivers/i2c/busses/i2c-imx.c
-+++ b/drivers/i2c/busses/i2c-imx.c
-@@ -160,6 +160,18 @@ static inline int is_imx1_i2c(struct imx_i2c_struct *i2c_imx)
- 	return i2c_imx->devtype == IMX1_I2C;
- }
- 
-+static inline void imx_i2c_write_reg(unsigned int val,
-+		struct imx_i2c_struct *i2c_imx, unsigned int reg)
-+{
-+	writeb(val, i2c_imx->base + reg);
-+}
-+
-+static inline unsigned char imx_i2c_read_reg(struct imx_i2c_struct *i2c_imx,
-+		unsigned int reg)
-+{
-+	return readb(i2c_imx->base + reg);
-+}
-+
- /** Functions for IMX I2C adapter driver ***************************************
- *******************************************************************************/
- 
-@@ -171,7 +183,7 @@ static int i2c_imx_bus_busy(struct imx_i2c_struct *i2c_imx, int for_busy)
- 	dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__);
- 
- 	while (1) {
--		temp = readb(i2c_imx->base + IMX_I2C_I2SR);
-+		temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2SR);
- 		if (for_busy && (temp & I2SR_IBB))
- 			break;
- 		if (!for_busy && !(temp & I2SR_IBB))
-@@ -202,7 +214,7 @@ static int i2c_imx_trx_complete(struct imx_i2c_struct *i2c_imx)
- 
- static int i2c_imx_acked(struct imx_i2c_struct *i2c_imx)
- {
--	if (readb(i2c_imx->base + IMX_I2C_I2SR) & I2SR_RXAK) {
-+	if (imx_i2c_read_reg(i2c_imx, IMX_I2C_I2SR) & I2SR_RXAK) {
- 		dev_dbg(&i2c_imx->adapter.dev, "<%s> No ACK\n", __func__);
- 		return -EIO;  /* No ACK */
- 	}
-@@ -219,25 +231,25 @@ static int i2c_imx_start(struct imx_i2c_struct *i2c_imx)
- 	dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__);
- 
- 	clk_prepare_enable(i2c_imx->clk);
--	writeb(i2c_imx->ifdr, i2c_imx->base + IMX_I2C_IFDR);
-+	imx_i2c_write_reg(i2c_imx->ifdr, i2c_imx, IMX_I2C_IFDR);
- 	/* Enable I2C controller */
--	writeb(0, i2c_imx->base + IMX_I2C_I2SR);
--	writeb(I2CR_IEN, i2c_imx->base + IMX_I2C_I2CR);
-+	imx_i2c_write_reg(0, i2c_imx, IMX_I2C_I2SR);
-+	imx_i2c_write_reg(I2CR_IEN, i2c_imx, IMX_I2C_I2CR);
- 
- 	/* Wait controller to be stable */
- 	udelay(50);
- 
- 	/* Start I2C transaction */
--	temp = readb(i2c_imx->base + IMX_I2C_I2CR);
-+	temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR);
- 	temp |= I2CR_MSTA;
--	writeb(temp, i2c_imx->base + IMX_I2C_I2CR);
-+	imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR);
- 	result = i2c_imx_bus_busy(i2c_imx, 1);
- 	if (result)
- 		return result;
- 	i2c_imx->stopped = 0;
- 
- 	temp |= I2CR_IIEN | I2CR_MTX | I2CR_TXAK;
--	writeb(temp, i2c_imx->base + IMX_I2C_I2CR);
-+	imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR);
- 	return result;
- }
- 
-@@ -248,9 +260,9 @@ static void i2c_imx_stop(struct imx_i2c_struct *i2c_imx)
- 	if (!i2c_imx->stopped) {
- 		/* Stop I2C transaction */
- 		dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__);
--		temp = readb(i2c_imx->base + IMX_I2C_I2CR);
-+		temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR);
- 		temp &= ~(I2CR_MSTA | I2CR_MTX);
--		writeb(temp, i2c_imx->base + IMX_I2C_I2CR);
-+		imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR);
- 	}
- 	if (is_imx1_i2c(i2c_imx)) {
- 		/*
-@@ -266,7 +278,7 @@ static void i2c_imx_stop(struct imx_i2c_struct *i2c_imx)
- 	}
- 
- 	/* Disable I2C controller */
--	writeb(0, i2c_imx->base + IMX_I2C_I2CR);
-+	imx_i2c_write_reg(0, i2c_imx, IMX_I2C_I2CR);
- 	clk_disable_unprepare(i2c_imx->clk);
- }
- 
-@@ -313,12 +325,12 @@ static irqreturn_t i2c_imx_isr(int irq, void *dev_id)
- 	struct imx_i2c_struct *i2c_imx = dev_id;
- 	unsigned int temp;
- 
--	temp = readb(i2c_imx->base + IMX_I2C_I2SR);
-+	temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2SR);
- 	if (temp & I2SR_IIF) {
- 		/* save status register */
- 		i2c_imx->i2csr = temp;
- 		temp &= ~I2SR_IIF;
--		writeb(temp, i2c_imx->base + IMX_I2C_I2SR);
-+		imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2SR);
- 		wake_up(&i2c_imx->queue);
- 		return IRQ_HANDLED;
- 	}
-@@ -334,7 +346,7 @@ static int i2c_imx_write(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs)
- 		__func__, msgs->addr << 1);
- 
- 	/* write slave address */
--	writeb(msgs->addr << 1, i2c_imx->base + IMX_I2C_I2DR);
-+	imx_i2c_write_reg(msgs->addr << 1, i2c_imx, IMX_I2C_I2DR);
- 	result = i2c_imx_trx_complete(i2c_imx);
- 	if (result)
- 		return result;
-@@ -348,7 +360,7 @@ static int i2c_imx_write(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs)
- 		dev_dbg(&i2c_imx->adapter.dev,
- 			"<%s> write byte: B%d=0x%X\n",
- 			__func__, i, msgs->buf[i]);
--		writeb(msgs->buf[i], i2c_imx->base + IMX_I2C_I2DR);
-+		imx_i2c_write_reg(msgs->buf[i], i2c_imx, IMX_I2C_I2DR);
- 		result = i2c_imx_trx_complete(i2c_imx);
- 		if (result)
- 			return result;
-@@ -369,7 +381,7 @@ static int i2c_imx_read(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs)
- 		__func__, (msgs->addr << 1) | 0x01);
- 
- 	/* write slave address */
--	writeb((msgs->addr << 1) | 0x01, i2c_imx->base + IMX_I2C_I2DR);
-+	imx_i2c_write_reg((msgs->addr << 1) | 0x01, i2c_imx, IMX_I2C_I2DR);
- 	result = i2c_imx_trx_complete(i2c_imx);
- 	if (result)
- 		return result;
-@@ -380,12 +392,12 @@ static int i2c_imx_read(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs)
- 	dev_dbg(&i2c_imx->adapter.dev, "<%s> setup bus\n", __func__);
- 
- 	/* setup bus to read data */
--	temp = readb(i2c_imx->base + IMX_I2C_I2CR);
-+	temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR);
- 	temp &= ~I2CR_MTX;
- 	if (msgs->len - 1)
- 		temp &= ~I2CR_TXAK;
--	writeb(temp, i2c_imx->base + IMX_I2C_I2CR);
--	readb(i2c_imx->base + IMX_I2C_I2DR); /* dummy read */
-+	imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR);
-+	imx_i2c_read_reg(i2c_imx, IMX_I2C_I2DR); /* dummy read */
- 
- 	dev_dbg(&i2c_imx->adapter.dev, "<%s> read data\n", __func__);
- 
-@@ -399,19 +411,19 @@ static int i2c_imx_read(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs)
- 			   controller from generating another clock cycle */
- 			dev_dbg(&i2c_imx->adapter.dev,
- 				"<%s> clear MSTA\n", __func__);
--			temp = readb(i2c_imx->base + IMX_I2C_I2CR);
-+			temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR);
- 			temp &= ~(I2CR_MSTA | I2CR_MTX);
--			writeb(temp, i2c_imx->base + IMX_I2C_I2CR);
-+			imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR);
- 			i2c_imx_bus_busy(i2c_imx, 0);
- 			i2c_imx->stopped = 1;
- 		} else if (i == (msgs->len - 2)) {
- 			dev_dbg(&i2c_imx->adapter.dev,
- 				"<%s> set TXAK\n", __func__);
--			temp = readb(i2c_imx->base + IMX_I2C_I2CR);
-+			temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR);
- 			temp |= I2CR_TXAK;
--			writeb(temp, i2c_imx->base + IMX_I2C_I2CR);
-+			imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR);
- 		}
--		msgs->buf[i] = readb(i2c_imx->base + IMX_I2C_I2DR);
-+		msgs->buf[i] = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2DR);
- 		dev_dbg(&i2c_imx->adapter.dev,
- 			"<%s> read byte: B%d=0x%X\n",
- 			__func__, i, msgs->buf[i]);
-@@ -438,9 +450,9 @@ static int i2c_imx_xfer(struct i2c_adapter *adapter,
- 		if (i) {
- 			dev_dbg(&i2c_imx->adapter.dev,
- 				"<%s> repeated start\n", __func__);
--			temp = readb(i2c_imx->base + IMX_I2C_I2CR);
-+			temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR);
- 			temp |= I2CR_RSTA;
--			writeb(temp, i2c_imx->base + IMX_I2C_I2CR);
-+			imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR);
- 			result =  i2c_imx_bus_busy(i2c_imx, 1);
- 			if (result)
- 				goto fail0;
-@@ -449,13 +461,13 @@ static int i2c_imx_xfer(struct i2c_adapter *adapter,
- 			"<%s> transfer message: %d\n", __func__, i);
- 		/* write/read data */
- #ifdef CONFIG_I2C_DEBUG_BUS
--		temp = readb(i2c_imx->base + IMX_I2C_I2CR);
-+		temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR);
- 		dev_dbg(&i2c_imx->adapter.dev, "<%s> CONTROL: IEN=%d, IIEN=%d, "
- 			"MSTA=%d, MTX=%d, TXAK=%d, RSTA=%d\n", __func__,
- 			(temp & I2CR_IEN ? 1 : 0), (temp & I2CR_IIEN ? 1 : 0),
- 			(temp & I2CR_MSTA ? 1 : 0), (temp & I2CR_MTX ? 1 : 0),
- 			(temp & I2CR_TXAK ? 1 : 0), (temp & I2CR_RSTA ? 1 : 0));
--		temp = readb(i2c_imx->base + IMX_I2C_I2SR);
-+		temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2SR);
- 		dev_dbg(&i2c_imx->adapter.dev,
- 			"<%s> STATUS: ICF=%d, IAAS=%d, IBB=%d, "
- 			"IAL=%d, SRW=%d, IIF=%d, RXAK=%d\n", __func__,
-@@ -575,8 +587,8 @@ static int __init i2c_imx_probe(struct platform_device *pdev)
- 	i2c_imx_set_clk(i2c_imx, bitrate);
- 
- 	/* Set up chip registers to defaults */
--	writeb(0, i2c_imx->base + IMX_I2C_I2CR);
--	writeb(0, i2c_imx->base + IMX_I2C_I2SR);
-+	imx_i2c_write_reg(0, i2c_imx, IMX_I2C_I2CR);
-+	imx_i2c_write_reg(0, i2c_imx, IMX_I2C_I2SR);
- 
- 	/* Add I2C adapter */
- 	ret = i2c_add_numbered_adapter(&i2c_imx->adapter);
-@@ -612,10 +624,10 @@ static int __exit i2c_imx_remove(struct platform_device *pdev)
- 	i2c_del_adapter(&i2c_imx->adapter);
- 
- 	/* setup chip registers to defaults */
--	writeb(0, i2c_imx->base + IMX_I2C_IADR);
--	writeb(0, i2c_imx->base + IMX_I2C_IFDR);
--	writeb(0, i2c_imx->base + IMX_I2C_I2CR);
--	writeb(0, i2c_imx->base + IMX_I2C_I2SR);
-+	imx_i2c_write_reg(0, i2c_imx, IMX_I2C_IADR);
-+	imx_i2c_write_reg(0, i2c_imx, IMX_I2C_IFDR);
-+	imx_i2c_write_reg(0, i2c_imx, IMX_I2C_I2CR);
-+	imx_i2c_write_reg(0, i2c_imx, IMX_I2C_I2SR);
- 
- 	return 0;
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1166-i2c-imx-change-register-offset-representation.patch b/patches.baytrail/1166-i2c-imx-change-register-offset-representation.patch
deleted file mode 100644
index 556ce4ecf6c73..0000000000000
--- a/patches.baytrail/1166-i2c-imx-change-register-offset-representation.patch
+++ /dev/null
@@ -1,71 +0,0 @@
-From 869468291f76ca9914a6f2d7b1ebd59e0e8dd327 Mon Sep 17 00:00:00 2001
-From: Jingchang Lu <b35083@freescale.com>
-Date: Wed, 7 Aug 2013 17:05:40 +0800
-Subject: i2c: imx: change register offset representation
-
-the I2C register offset may different between SoCs,
-to provid support for all these chips, split the
-register offset into a fixed base address and a
-variable shift value, then the full register offset
-will be calculated by
-reg_off = ( reg_base_addr << reg_shift)
-
-Signed-off-by: Jingchang Lu <b35083@freescale.com>
-Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de>
-Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-(cherry picked from commit 8cc7331ff372b9d03f8b2eb1422052bd99430611)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/i2c/busses/i2c-imx.c | 23 ++++++++++++++++-------
- 1 file changed, 16 insertions(+), 7 deletions(-)
-
-diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c
-index 1a3c60854f79..8a292a95e86a 100644
---- a/drivers/i2c/busses/i2c-imx.c
-+++ b/drivers/i2c/busses/i2c-imx.c
-@@ -64,12 +64,21 @@
- /* Default value */
- #define IMX_I2C_BIT_RATE	100000	/* 100kHz */
- 
--/* IMX I2C registers */
-+/* IMX I2C registers:
-+ * the I2C register offset is different between SoCs,
-+ * to provid support for all these chips, split the
-+ * register offset into a fixed base address and a
-+ * variable shift value, then the full register offset
-+ * will be calculated by
-+ * reg_off = ( reg_base_addr << reg_shift)
-+ */
- #define IMX_I2C_IADR	0x00	/* i2c slave address */
--#define IMX_I2C_IFDR	0x04	/* i2c frequency divider */
--#define IMX_I2C_I2CR	0x08	/* i2c control */
--#define IMX_I2C_I2SR	0x0C	/* i2c status */
--#define IMX_I2C_I2DR	0x10	/* i2c transfer data */
-+#define IMX_I2C_IFDR	0x01	/* i2c frequency divider */
-+#define IMX_I2C_I2CR	0x02	/* i2c control */
-+#define IMX_I2C_I2SR	0x03	/* i2c status */
-+#define IMX_I2C_I2DR	0x04	/* i2c transfer data */
-+
-+#define IMX_I2C_REGSHIFT	2
- 
- /* Bits of IMX I2C registers */
- #define I2SR_RXAK	0x01
-@@ -163,13 +172,13 @@ static inline int is_imx1_i2c(struct imx_i2c_struct *i2c_imx)
- static inline void imx_i2c_write_reg(unsigned int val,
- 		struct imx_i2c_struct *i2c_imx, unsigned int reg)
- {
--	writeb(val, i2c_imx->base + reg);
-+	writeb(val, i2c_imx->base + (reg << IMX_I2C_REGSHIFT));
- }
- 
- static inline unsigned char imx_i2c_read_reg(struct imx_i2c_struct *i2c_imx,
- 		unsigned int reg)
- {
--	return readb(i2c_imx->base + reg);
-+	return readb(i2c_imx->base + (reg << IMX_I2C_REGSHIFT));
- }
- 
- /** Functions for IMX I2C adapter driver ***************************************
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1167-i2c-imx-add-INT-flag-and-IEN-bit-operatation-codes.patch b/patches.baytrail/1167-i2c-imx-add-INT-flag-and-IEN-bit-operatation-codes.patch
deleted file mode 100644
index a235998b77806..0000000000000
--- a/patches.baytrail/1167-i2c-imx-add-INT-flag-and-IEN-bit-operatation-codes.patch
+++ /dev/null
@@ -1,91 +0,0 @@
-From 32e5a2f265ec833add49d2f238969c8e612aa768 Mon Sep 17 00:00:00 2001
-From: Jingchang Lu <b35083@freescale.com>
-Date: Wed, 7 Aug 2013 17:05:41 +0800
-Subject: i2c: imx: add INT flag and IEN bit operatation codes
-
-This add bits operation macro that differ between SoCs.
-Interrupt flags clear operation in I2SR differ between SoCs:
-write zero to clear(w0c) INT flag on i.MX,
-but write one to clear(w1c) INT flag on Vybrid.
-I2C module enable operation in I2CR also differ between SoCs:
-set I2CR_IEN bit enable the module on i.MX,
-but clear I2CR_IEN bit enable the module on Vybrid.
-
-Signed-off-by: Jingchang Lu <b35083@freescale.com>
-Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de>
-Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-(cherry picked from commit 171408c21149dd3fd2ed33f19afe2cd558269253)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/i2c/busses/i2c-imx.c | 27 ++++++++++++++++++++++-----
- 1 file changed, 22 insertions(+), 5 deletions(-)
-
-diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c
-index 8a292a95e86a..dc9f2ec22a29 100644
---- a/drivers/i2c/busses/i2c-imx.c
-+++ b/drivers/i2c/busses/i2c-imx.c
-@@ -95,6 +95,22 @@
- #define I2CR_IIEN	0x40
- #define I2CR_IEN	0x80
- 
-+/* register bits different operating codes definition:
-+ * 1) I2SR: Interrupt flags clear operation differ between SoCs:
-+ * - write zero to clear(w0c) INT flag on i.MX,
-+ * - but write one to clear(w1c) INT flag on Vybrid.
-+ * 2) I2CR: I2C module enable operation also differ between SoCs:
-+ * - set I2CR_IEN bit enable the module on i.MX,
-+ * - but clear I2CR_IEN bit enable the module on Vybrid.
-+ */
-+#define I2SR_CLR_OPCODE_W0C	0x0
-+#define I2SR_CLR_OPCODE_W1C	(I2SR_IAL | I2SR_IIF)
-+#define I2CR_IEN_OPCODE_0	0x0
-+#define I2CR_IEN_OPCODE_1	I2CR_IEN
-+
-+#define IMX_I2SR_CLR_OPCODE	I2SR_CLR_OPCODE_W0C
-+#define IMX_I2CR_IEN_OPCODE	I2CR_IEN_OPCODE_1
-+
- /** Variables ******************************************************************
- *******************************************************************************/
- 
-@@ -242,8 +258,8 @@ static int i2c_imx_start(struct imx_i2c_struct *i2c_imx)
- 	clk_prepare_enable(i2c_imx->clk);
- 	imx_i2c_write_reg(i2c_imx->ifdr, i2c_imx, IMX_I2C_IFDR);
- 	/* Enable I2C controller */
--	imx_i2c_write_reg(0, i2c_imx, IMX_I2C_I2SR);
--	imx_i2c_write_reg(I2CR_IEN, i2c_imx, IMX_I2C_I2CR);
-+	imx_i2c_write_reg(IMX_I2SR_CLR_OPCODE, i2c_imx, IMX_I2C_I2SR);
-+	imx_i2c_write_reg(IMX_I2CR_IEN_OPCODE, i2c_imx, IMX_I2C_I2CR);
- 
- 	/* Wait controller to be stable */
- 	udelay(50);
-@@ -287,7 +303,7 @@ static void i2c_imx_stop(struct imx_i2c_struct *i2c_imx)
- 	}
- 
- 	/* Disable I2C controller */
--	imx_i2c_write_reg(0, i2c_imx, IMX_I2C_I2CR);
-+	imx_i2c_write_reg(IMX_I2CR_IEN_OPCODE ^ I2CR_IEN, i2c_imx, IMX_I2C_I2CR);
- 	clk_disable_unprepare(i2c_imx->clk);
- }
- 
-@@ -339,6 +355,7 @@ static irqreturn_t i2c_imx_isr(int irq, void *dev_id)
- 		/* save status register */
- 		i2c_imx->i2csr = temp;
- 		temp &= ~I2SR_IIF;
-+		temp |= (IMX_I2SR_CLR_OPCODE & I2SR_IIF);
- 		imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2SR);
- 		wake_up(&i2c_imx->queue);
- 		return IRQ_HANDLED;
-@@ -596,8 +613,8 @@ static int __init i2c_imx_probe(struct platform_device *pdev)
- 	i2c_imx_set_clk(i2c_imx, bitrate);
- 
- 	/* Set up chip registers to defaults */
--	imx_i2c_write_reg(0, i2c_imx, IMX_I2C_I2CR);
--	imx_i2c_write_reg(0, i2c_imx, IMX_I2C_I2SR);
-+	imx_i2c_write_reg(IMX_I2CR_IEN_OPCODE ^ I2CR_IEN, i2c_imx, IMX_I2C_I2CR);
-+	imx_i2c_write_reg(IMX_I2SR_CLR_OPCODE, i2c_imx, IMX_I2C_I2SR);
- 
- 	/* Add I2C adapter */
- 	ret = i2c_add_numbered_adapter(&i2c_imx->adapter);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1168-i2c-imx-add-struct-to-hold-more-configurable-quirks.patch b/patches.baytrail/1168-i2c-imx-add-struct-to-hold-more-configurable-quirks.patch
deleted file mode 100644
index c8d945b767c28..0000000000000
--- a/patches.baytrail/1168-i2c-imx-add-struct-to-hold-more-configurable-quirks.patch
+++ /dev/null
@@ -1,216 +0,0 @@
-From 1a8bf9a0b59abd837cf976c65a718366d8cc7da7 Mon Sep 17 00:00:00 2001
-From: Jingchang Lu <b35083@freescale.com>
-Date: Wed, 7 Aug 2013 17:05:42 +0800
-Subject: i2c: imx: add struct to hold more configurable quirks
-
-This add struct imx_i2c_hwdata to hold more quirks data
-which may vary between SoCs, thus the driver can operate
-on more differences to support more SoCs.
-
-Signed-off-by: Jingchang Lu <b35083@freescale.com>
-Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de>
-Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-(cherry picked from commit 4b775022f6fdcfba6d219f46b2606e77a0dc38d9)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/i2c/busses/i2c-imx.c | 77 ++++++++++++++++++++++++++++++--------------
- 1 file changed, 52 insertions(+), 25 deletions(-)
-
-diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c
-index dc9f2ec22a29..ce31196bb5e7 100644
---- a/drivers/i2c/busses/i2c-imx.c
-+++ b/drivers/i2c/busses/i2c-imx.c
-@@ -108,9 +108,6 @@
- #define I2CR_IEN_OPCODE_0	0x0
- #define I2CR_IEN_OPCODE_1	I2CR_IEN
- 
--#define IMX_I2SR_CLR_OPCODE	I2SR_CLR_OPCODE_W0C
--#define IMX_I2CR_IEN_OPCODE	I2CR_IEN_OPCODE_1
--
- /** Variables ******************************************************************
- *******************************************************************************/
- 
-@@ -127,7 +124,7 @@ struct imx_i2c_clk_pair {
- 	u16	val;
- };
- 
--static struct imx_i2c_clk_pair __initdata i2c_clk_div[] = {
-+static struct imx_i2c_clk_pair imx_i2c_clk_div[] = {
- 	{ 22,	0x20 }, { 24,	0x21 }, { 26,	0x22 }, { 28,	0x23 },
- 	{ 30,	0x00 },	{ 32,	0x24 }, { 36,	0x25 }, { 40,	0x26 },
- 	{ 42,	0x03 }, { 44,	0x27 },	{ 48,	0x28 }, { 52,	0x05 },
-@@ -148,6 +145,15 @@ enum imx_i2c_type {
- 	IMX21_I2C,
- };
- 
-+struct imx_i2c_hwdata {
-+	enum imx_i2c_type	devtype;
-+	unsigned		regshift;
-+	struct imx_i2c_clk_pair	*clk_div;
-+	unsigned		ndivs;
-+	unsigned		i2sr_clr_opcode;
-+	unsigned		i2cr_ien_opcode;
-+};
-+
- struct imx_i2c_struct {
- 	struct i2c_adapter	adapter;
- 	struct clk		*clk;
-@@ -157,16 +163,36 @@ struct imx_i2c_struct {
- 	unsigned int 		disable_delay;
- 	int			stopped;
- 	unsigned int		ifdr; /* IMX_I2C_IFDR */
--	enum imx_i2c_type	devtype;
-+	const struct imx_i2c_hwdata	*hwdata;
-+};
-+
-+static const struct imx_i2c_hwdata imx1_i2c_hwdata  = {
-+	.devtype		= IMX1_I2C,
-+	.regshift		= IMX_I2C_REGSHIFT,
-+	.clk_div		= imx_i2c_clk_div,
-+	.ndivs			= ARRAY_SIZE(imx_i2c_clk_div),
-+	.i2sr_clr_opcode	= I2SR_CLR_OPCODE_W0C,
-+	.i2cr_ien_opcode	= I2CR_IEN_OPCODE_1,
-+
-+};
-+
-+static const struct imx_i2c_hwdata imx21_i2c_hwdata  = {
-+	.devtype		= IMX21_I2C,
-+	.regshift		= IMX_I2C_REGSHIFT,
-+	.clk_div		= imx_i2c_clk_div,
-+	.ndivs			= ARRAY_SIZE(imx_i2c_clk_div),
-+	.i2sr_clr_opcode	= I2SR_CLR_OPCODE_W0C,
-+	.i2cr_ien_opcode	= I2CR_IEN_OPCODE_1,
-+
- };
- 
- static struct platform_device_id imx_i2c_devtype[] = {
- 	{
- 		.name = "imx1-i2c",
--		.driver_data = IMX1_I2C,
-+		.driver_data = (kernel_ulong_t)&imx1_i2c_hwdata,
- 	}, {
- 		.name = "imx21-i2c",
--		.driver_data = IMX21_I2C,
-+		.driver_data = (kernel_ulong_t)&imx21_i2c_hwdata,
- 	}, {
- 		/* sentinel */
- 	}
-@@ -174,27 +200,27 @@ static struct platform_device_id imx_i2c_devtype[] = {
- MODULE_DEVICE_TABLE(platform, imx_i2c_devtype);
- 
- static const struct of_device_id i2c_imx_dt_ids[] = {
--	{ .compatible = "fsl,imx1-i2c", .data = &imx_i2c_devtype[IMX1_I2C], },
--	{ .compatible = "fsl,imx21-i2c", .data = &imx_i2c_devtype[IMX21_I2C], },
-+	{ .compatible = "fsl,imx1-i2c", .data = &imx1_i2c_hwdata, },
-+	{ .compatible = "fsl,imx21-i2c", .data = &imx21_i2c_hwdata, },
- 	{ /* sentinel */ }
- };
- MODULE_DEVICE_TABLE(of, i2c_imx_dt_ids);
- 
- static inline int is_imx1_i2c(struct imx_i2c_struct *i2c_imx)
- {
--	return i2c_imx->devtype == IMX1_I2C;
-+	return i2c_imx->hwdata->devtype == IMX1_I2C;
- }
- 
- static inline void imx_i2c_write_reg(unsigned int val,
- 		struct imx_i2c_struct *i2c_imx, unsigned int reg)
- {
--	writeb(val, i2c_imx->base + (reg << IMX_I2C_REGSHIFT));
-+	writeb(val, i2c_imx->base + (reg << i2c_imx->hwdata->regshift));
- }
- 
- static inline unsigned char imx_i2c_read_reg(struct imx_i2c_struct *i2c_imx,
- 		unsigned int reg)
- {
--	return readb(i2c_imx->base + (reg << IMX_I2C_REGSHIFT));
-+	return readb(i2c_imx->base + (reg << i2c_imx->hwdata->regshift));
- }
- 
- /** Functions for IMX I2C adapter driver ***************************************
-@@ -258,8 +284,8 @@ static int i2c_imx_start(struct imx_i2c_struct *i2c_imx)
- 	clk_prepare_enable(i2c_imx->clk);
- 	imx_i2c_write_reg(i2c_imx->ifdr, i2c_imx, IMX_I2C_IFDR);
- 	/* Enable I2C controller */
--	imx_i2c_write_reg(IMX_I2SR_CLR_OPCODE, i2c_imx, IMX_I2C_I2SR);
--	imx_i2c_write_reg(IMX_I2CR_IEN_OPCODE, i2c_imx, IMX_I2C_I2CR);
-+	imx_i2c_write_reg(i2c_imx->hwdata->i2sr_clr_opcode, i2c_imx, IMX_I2C_I2SR);
-+	imx_i2c_write_reg(i2c_imx->hwdata->i2cr_ien_opcode, i2c_imx, IMX_I2C_I2CR);
- 
- 	/* Wait controller to be stable */
- 	udelay(50);
-@@ -303,13 +329,15 @@ static void i2c_imx_stop(struct imx_i2c_struct *i2c_imx)
- 	}
- 
- 	/* Disable I2C controller */
--	imx_i2c_write_reg(IMX_I2CR_IEN_OPCODE ^ I2CR_IEN, i2c_imx, IMX_I2C_I2CR);
-+	temp = i2c_imx->hwdata->i2cr_ien_opcode ^ I2CR_IEN,
-+	imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR);
- 	clk_disable_unprepare(i2c_imx->clk);
- }
- 
- static void __init i2c_imx_set_clk(struct imx_i2c_struct *i2c_imx,
- 							unsigned int rate)
- {
-+	struct imx_i2c_clk_pair *i2c_clk_div = i2c_imx->hwdata->clk_div;
- 	unsigned int i2c_clk_rate;
- 	unsigned int div;
- 	int i;
-@@ -319,8 +347,8 @@ static void __init i2c_imx_set_clk(struct imx_i2c_struct *i2c_imx,
- 	div = (i2c_clk_rate + rate - 1) / rate;
- 	if (div < i2c_clk_div[0].div)
- 		i = 0;
--	else if (div > i2c_clk_div[ARRAY_SIZE(i2c_clk_div) - 1].div)
--		i = ARRAY_SIZE(i2c_clk_div) - 1;
-+	else if (div > i2c_clk_div[i2c_imx->hwdata->ndivs - 1].div)
-+		i = i2c_imx->hwdata->ndivs - 1;
- 	else
- 		for (i = 0; i2c_clk_div[i].div < div; i++);
- 
-@@ -355,7 +383,7 @@ static irqreturn_t i2c_imx_isr(int irq, void *dev_id)
- 		/* save status register */
- 		i2c_imx->i2csr = temp;
- 		temp &= ~I2SR_IIF;
--		temp |= (IMX_I2SR_CLR_OPCODE & I2SR_IIF);
-+		temp |= (i2c_imx->hwdata->i2sr_clr_opcode & I2SR_IIF);
- 		imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2SR);
- 		wake_up(&i2c_imx->queue);
- 		return IRQ_HANDLED;
-@@ -537,7 +565,6 @@ static int __init i2c_imx_probe(struct platform_device *pdev)
- 	struct imx_i2c_struct *i2c_imx;
- 	struct resource *res;
- 	struct imxi2c_platform_data *pdata = pdev->dev.platform_data;
--	const struct platform_device_id *imx_id;
- 	void __iomem *base;
- 	int irq, ret;
- 	u32 bitrate;
-@@ -563,11 +590,10 @@ static int __init i2c_imx_probe(struct platform_device *pdev)
- 	}
- 
- 	if (of_id)
--		imx_id = of_id->data;
-+		i2c_imx->hwdata = of_id->data;
- 	else
--		imx_id = platform_get_device_id(pdev);
--
--	i2c_imx->devtype = imx_id->driver_data;
-+		i2c_imx->hwdata = (struct imx_i2c_hwdata *)
-+				platform_get_device_id(pdev)->driver_data;
- 
- 	/* Setup i2c_imx driver structure */
- 	strlcpy(i2c_imx->adapter.name, pdev->name, sizeof(i2c_imx->adapter.name));
-@@ -613,8 +639,9 @@ static int __init i2c_imx_probe(struct platform_device *pdev)
- 	i2c_imx_set_clk(i2c_imx, bitrate);
- 
- 	/* Set up chip registers to defaults */
--	imx_i2c_write_reg(IMX_I2CR_IEN_OPCODE ^ I2CR_IEN, i2c_imx, IMX_I2C_I2CR);
--	imx_i2c_write_reg(IMX_I2SR_CLR_OPCODE, i2c_imx, IMX_I2C_I2SR);
-+	imx_i2c_write_reg(i2c_imx->hwdata->i2cr_ien_opcode ^ I2CR_IEN,
-+			i2c_imx, IMX_I2C_I2CR);
-+	imx_i2c_write_reg(i2c_imx->hwdata->i2sr_clr_opcode, i2c_imx, IMX_I2C_I2SR);
- 
- 	/* Add I2C adapter */
- 	ret = i2c_add_numbered_adapter(&i2c_imx->adapter);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1169-i2c-imx-Add-Vybrid-VF610-I2C-controller-support.patch b/patches.baytrail/1169-i2c-imx-Add-Vybrid-VF610-I2C-controller-support.patch
deleted file mode 100644
index be4fdd8c0f154..0000000000000
--- a/patches.baytrail/1169-i2c-imx-Add-Vybrid-VF610-I2C-controller-support.patch
+++ /dev/null
@@ -1,88 +0,0 @@
-From ba27a37aafaa504af71b55afed614504f61e5eaf Mon Sep 17 00:00:00 2001
-From: Jingchang Lu <b35083@freescale.com>
-Date: Wed, 7 Aug 2013 17:05:43 +0800
-Subject: i2c: imx: Add Vybrid VF610 I2C controller support
-
-Add Freescale Vybrid VF610 I2C controller support to
-imx I2C driver framework.
-
-Signed-off-by: Jason Jin <Jason.jin@freescale.com>
-Signed-off-by: Jingchang Lu <b35083@freescale.com>
-Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de>
-Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-(cherry picked from commit ad90efae1b9203baeb0f6fd668e6c61c2377bd5f)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/i2c/busses/i2c-imx.c | 32 ++++++++++++++++++++++++++++++++
- 1 file changed, 32 insertions(+)
-
-diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c
-index ce31196bb5e7..9c0f8bda692a 100644
---- a/drivers/i2c/busses/i2c-imx.c
-+++ b/drivers/i2c/busses/i2c-imx.c
-@@ -79,6 +79,7 @@
- #define IMX_I2C_I2DR	0x04	/* i2c transfer data */
- 
- #define IMX_I2C_REGSHIFT	2
-+#define VF610_I2C_REGSHIFT	0
- 
- /* Bits of IMX I2C registers */
- #define I2SR_RXAK	0x01
-@@ -140,9 +141,29 @@ static struct imx_i2c_clk_pair imx_i2c_clk_div[] = {
- 	{ 3072,	0x1E }, { 3840,	0x1F }
- };
- 
-+/* Vybrid VF610 clock divider, register value pairs */
-+static struct imx_i2c_clk_pair vf610_i2c_clk_div[] = {
-+	{ 20,   0x00 }, { 22,   0x01 }, { 24,   0x02 }, { 26,   0x03 },
-+	{ 28,   0x04 }, { 30,   0x05 }, { 32,   0x09 }, { 34,   0x06 },
-+	{ 36,   0x0A }, { 40,   0x07 }, { 44,   0x0C }, { 48,   0x0D },
-+	{ 52,   0x43 }, { 56,   0x0E }, { 60,   0x45 }, { 64,   0x12 },
-+	{ 68,   0x0F }, { 72,   0x13 }, { 80,   0x14 }, { 88,   0x15 },
-+	{ 96,   0x19 }, { 104,  0x16 }, { 112,  0x1A }, { 128,  0x17 },
-+	{ 136,  0x4F }, { 144,  0x1C }, { 160,  0x1D }, { 176,  0x55 },
-+	{ 192,  0x1E }, { 208,  0x56 }, { 224,  0x22 }, { 228,  0x24 },
-+	{ 240,  0x1F }, { 256,  0x23 }, { 288,  0x5C }, { 320,  0x25 },
-+	{ 384,  0x26 }, { 448,  0x2A }, { 480,  0x27 }, { 512,  0x2B },
-+	{ 576,  0x2C }, { 640,  0x2D }, { 768,  0x31 }, { 896,  0x32 },
-+	{ 960,  0x2F }, { 1024, 0x33 }, { 1152, 0x34 }, { 1280, 0x35 },
-+	{ 1536, 0x36 }, { 1792, 0x3A }, { 1920, 0x37 }, { 2048, 0x3B },
-+	{ 2304, 0x3C }, { 2560, 0x3D }, { 3072, 0x3E }, { 3584, 0x7A },
-+	{ 3840, 0x3F }, { 4096, 0x7B }, { 5120, 0x7D }, { 6144, 0x7E },
-+};
-+
- enum imx_i2c_type {
- 	IMX1_I2C,
- 	IMX21_I2C,
-+	VF610_I2C,
- };
- 
- struct imx_i2c_hwdata {
-@@ -186,6 +207,16 @@ static const struct imx_i2c_hwdata imx21_i2c_hwdata  = {
- 
- };
- 
-+static struct imx_i2c_hwdata vf610_i2c_hwdata = {
-+	.devtype		= VF610_I2C,
-+	.regshift		= VF610_I2C_REGSHIFT,
-+	.clk_div		= vf610_i2c_clk_div,
-+	.ndivs			= ARRAY_SIZE(vf610_i2c_clk_div),
-+	.i2sr_clr_opcode	= I2SR_CLR_OPCODE_W1C,
-+	.i2cr_ien_opcode	= I2CR_IEN_OPCODE_0,
-+
-+};
-+
- static struct platform_device_id imx_i2c_devtype[] = {
- 	{
- 		.name = "imx1-i2c",
-@@ -202,6 +233,7 @@ MODULE_DEVICE_TABLE(platform, imx_i2c_devtype);
- static const struct of_device_id i2c_imx_dt_ids[] = {
- 	{ .compatible = "fsl,imx1-i2c", .data = &imx1_i2c_hwdata, },
- 	{ .compatible = "fsl,imx21-i2c", .data = &imx21_i2c_hwdata, },
-+	{ .compatible = "fsl,vf610-i2c", .data = &vf610_i2c_hwdata, },
- 	{ /* sentinel */ }
- };
- MODULE_DEVICE_TABLE(of, i2c_imx_dt_ids);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1170-i2c-use-dev_get_platdata.patch b/patches.baytrail/1170-i2c-use-dev_get_platdata.patch
deleted file mode 100644
index 6337ef344d4fa..0000000000000
--- a/patches.baytrail/1170-i2c-use-dev_get_platdata.patch
+++ /dev/null
@@ -1,372 +0,0 @@
-From bf24625c14f85a207be4040c198cd6ad8ef8435b Mon Sep 17 00:00:00 2001
-From: Jingoo Han <jg1.han@samsung.com>
-Date: Tue, 30 Jul 2013 16:59:33 +0900
-Subject: i2c: use dev_get_platdata()
-
-Use the wrapper function for retrieving the platform data instead of
-accessing dev->platform_data directly.
-
-Signed-off-by: Jingoo Han <jg1.han@samsung.com>
-Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-(cherry picked from commit 6d4028c644edc0a2e4a8c948ebf81e8f2f09726e)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/i2c/busses/i2c-bfin-twi.c          |    9 +++++----
- drivers/i2c/busses/i2c-cbus-gpio.c         |    5 +++--
- drivers/i2c/busses/i2c-davinci.c           |    2 +-
- drivers/i2c/busses/i2c-gpio.c              |    6 +++---
- drivers/i2c/busses/i2c-imx.c               |    2 +-
- drivers/i2c/busses/i2c-mv64xxx.c           |    2 +-
- drivers/i2c/busses/i2c-nomadik.c           |    2 +-
- drivers/i2c/busses/i2c-nuc900.c            |    2 +-
- drivers/i2c/busses/i2c-ocores.c            |    2 +-
- drivers/i2c/busses/i2c-omap.c              |    2 +-
- drivers/i2c/busses/i2c-pca-platform.c      |    2 +-
- drivers/i2c/busses/i2c-powermac.c          |    2 +-
- drivers/i2c/busses/i2c-pxa.c               |    4 ++--
- drivers/i2c/busses/i2c-rcar.c              |    2 +-
- drivers/i2c/busses/i2c-s3c2410.c           |    2 +-
- drivers/i2c/busses/i2c-s6000.c             |    5 +++--
- drivers/i2c/busses/i2c-sh7760.c            |    2 +-
- drivers/i2c/busses/i2c-sh_mobile.c         |    2 +-
- drivers/i2c/busses/i2c-xiic.c              |    2 +-
- drivers/i2c/i2c-smbus.c                    |    2 +-
- drivers/i2c/muxes/i2c-arb-gpio-challenge.c |    2 +-
- drivers/i2c/muxes/i2c-mux-gpio.c           |    8 +++++---
- drivers/i2c/muxes/i2c-mux-pca9541.c        |    2 +-
- drivers/i2c/muxes/i2c-mux-pca954x.c        |    2 +-
- drivers/i2c/muxes/i2c-mux-pinctrl.c        |    2 +-
- 25 files changed, 40 insertions(+), 35 deletions(-)
-
---- a/drivers/i2c/busses/i2c-bfin-twi.c
-+++ b/drivers/i2c/busses/i2c-bfin-twi.c
-@@ -662,8 +662,9 @@ static int i2c_bfin_twi_probe(struct pla
- 	p_adap->timeout = 5 * HZ;
- 	p_adap->retries = 3;
- 
--	rc = peripheral_request_list((unsigned short *)pdev->dev.platform_data,
--					"i2c-bfin-twi");
-+	rc = peripheral_request_list(
-+			(unsigned short *)dev_get_platdata(&pdev->dev),
-+			"i2c-bfin-twi");
- 	if (rc) {
- 		dev_err(&pdev->dev, "Can't setup pin mux!\n");
- 		goto out_error_pin_mux;
-@@ -710,7 +711,7 @@ out_error_add_adapter:
- 	free_irq(iface->irq, iface);
- out_error_req_irq:
- out_error_no_irq:
--	peripheral_free_list((unsigned short *)pdev->dev.platform_data);
-+	peripheral_free_list((unsigned short *)dev_get_platdata(&pdev->dev));
- out_error_pin_mux:
- 	iounmap(iface->regs_base);
- out_error_ioremap:
-@@ -726,7 +727,7 @@ static int i2c_bfin_twi_remove(struct pl
- 
- 	i2c_del_adapter(&(iface->adap));
- 	free_irq(iface->irq, iface);
--	peripheral_free_list((unsigned short *)pdev->dev.platform_data);
-+	peripheral_free_list((unsigned short *)dev_get_platdata(&pdev->dev));
- 	iounmap(iface->regs_base);
- 	kfree(iface);
- 
---- a/drivers/i2c/busses/i2c-cbus-gpio.c
-+++ b/drivers/i2c/busses/i2c-cbus-gpio.c
-@@ -233,8 +233,9 @@ static int cbus_i2c_probe(struct platfor
- 		chost->clk_gpio = of_get_gpio(dnode, 0);
- 		chost->dat_gpio = of_get_gpio(dnode, 1);
- 		chost->sel_gpio = of_get_gpio(dnode, 2);
--	} else if (pdev->dev.platform_data) {
--		struct i2c_cbus_platform_data *pdata = pdev->dev.platform_data;
-+	} else if (dev_get_platdata(&pdev->dev)) {
-+		struct i2c_cbus_platform_data *pdata =
-+			dev_get_platdata(&pdev->dev);
- 		chost->clk_gpio = pdata->clk_gpio;
- 		chost->dat_gpio = pdata->dat_gpio;
- 		chost->sel_gpio = pdata->sel_gpio;
---- a/drivers/i2c/busses/i2c-davinci.c
-+++ b/drivers/i2c/busses/i2c-davinci.c
-@@ -665,7 +665,7 @@ static int davinci_i2c_probe(struct plat
- #endif
- 	dev->dev = &pdev->dev;
- 	dev->irq = irq->start;
--	dev->pdata = dev->dev->platform_data;
-+	dev->pdata = dev_get_platdata(&dev->dev);
- 	platform_set_drvdata(pdev, dev);
- 
- 	if (!dev->pdata && pdev->dev.of_node) {
---- a/drivers/i2c/busses/i2c-gpio.c
-+++ b/drivers/i2c/busses/i2c-gpio.c
-@@ -137,9 +137,9 @@ static int i2c_gpio_probe(struct platfor
- 		if (ret)
- 			return ret;
- 	} else {
--		if (!pdev->dev.platform_data)
-+		if (!dev_get_platdata(&pdev->dev))
- 			return -ENXIO;
--		pdata = pdev->dev.platform_data;
-+		pdata = dev_get_platdata(&pdev->dev);
- 		sda_pin = pdata->sda_pin;
- 		scl_pin = pdata->scl_pin;
- 	}
-@@ -171,7 +171,7 @@ static int i2c_gpio_probe(struct platfor
- 		pdata->scl_pin = scl_pin;
- 		of_i2c_gpio_get_props(pdev->dev.of_node, pdata);
- 	} else {
--		memcpy(pdata, pdev->dev.platform_data, sizeof(*pdata));
-+		memcpy(pdata, dev_get_platdata(&pdev->dev), sizeof(*pdata));
- 	}
- 
- 	if (pdata->sda_is_open_drain) {
---- a/drivers/i2c/busses/i2c-imx.c
-+++ b/drivers/i2c/busses/i2c-imx.c
-@@ -596,7 +596,7 @@ static int __init i2c_imx_probe(struct p
- 							   &pdev->dev);
- 	struct imx_i2c_struct *i2c_imx;
- 	struct resource *res;
--	struct imxi2c_platform_data *pdata = pdev->dev.platform_data;
-+	struct imxi2c_platform_data *pdata = dev_get_platdata(&pdev->dev);
- 	void __iomem *base;
- 	int irq, ret;
- 	u32 bitrate;
---- a/drivers/i2c/busses/i2c-mv64xxx.c
-+++ b/drivers/i2c/busses/i2c-mv64xxx.c
-@@ -618,7 +618,7 @@ static int
- mv64xxx_i2c_probe(struct platform_device *pd)
- {
- 	struct mv64xxx_i2c_data		*drv_data;
--	struct mv64xxx_i2c_pdata	*pdata = pd->dev.platform_data;
-+	struct mv64xxx_i2c_pdata	*pdata = dev_get_platdata(&pd->dev);
- 	struct resource	*r;
- 	int	rc;
- 
---- a/drivers/i2c/busses/i2c-nomadik.c
-+++ b/drivers/i2c/busses/i2c-nomadik.c
-@@ -974,7 +974,7 @@ static atomic_t adapter_id = ATOMIC_INIT
- static int nmk_i2c_probe(struct amba_device *adev, const struct amba_id *id)
- {
- 	int ret = 0;
--	struct nmk_i2c_controller *pdata = adev->dev.platform_data;
-+	struct nmk_i2c_controller *pdata = dev_get_platdata(&adev->dev);
- 	struct device_node *np = adev->dev.of_node;
- 	struct nmk_i2c_dev	*dev;
- 	struct i2c_adapter *adap;
---- a/drivers/i2c/busses/i2c-nuc900.c
-+++ b/drivers/i2c/busses/i2c-nuc900.c
-@@ -525,7 +525,7 @@ static int nuc900_i2c_probe(struct platf
- 	struct resource *res;
- 	int ret;
- 
--	pdata = pdev->dev.platform_data;
-+	pdata = dev_get_platdata(&pdev->dev);
- 	if (!pdata) {
- 		dev_err(&pdev->dev, "no platform data\n");
- 		return -EINVAL;
---- a/drivers/i2c/busses/i2c-ocores.c
-+++ b/drivers/i2c/busses/i2c-ocores.c
-@@ -369,7 +369,7 @@ static int ocores_i2c_probe(struct platf
- 	if (IS_ERR(i2c->base))
- 		return PTR_ERR(i2c->base);
- 
--	pdata = pdev->dev.platform_data;
-+	pdata = dev_get_platdata(&pdev->dev);
- 	if (pdata) {
- 		i2c->reg_shift = pdata->reg_shift;
- 		i2c->reg_io_width = pdata->reg_io_width;
---- a/drivers/i2c/busses/i2c-omap.c
-+++ b/drivers/i2c/busses/i2c-omap.c
-@@ -1079,7 +1079,7 @@ omap_i2c_probe(struct platform_device *p
- 	struct i2c_adapter	*adap;
- 	struct resource		*mem;
- 	const struct omap_i2c_bus_platform_data *pdata =
--		pdev->dev.platform_data;
-+		dev_get_platdata(&pdev->dev);
- 	struct device_node	*node = pdev->dev.of_node;
- 	const struct of_device_id *match;
- 	int irq;
---- a/drivers/i2c/busses/i2c-pca-platform.c
-+++ b/drivers/i2c/busses/i2c-pca-platform.c
-@@ -136,7 +136,7 @@ static int i2c_pca_pf_probe(struct platf
- 	struct i2c_pca_pf_data *i2c;
- 	struct resource *res;
- 	struct i2c_pca9564_pf_platform_data *platform_data =
--				pdev->dev.platform_data;
-+				dev_get_platdata(&pdev->dev);
- 	int ret = 0;
- 	int irq;
- 
---- a/drivers/i2c/busses/i2c-powermac.c
-+++ b/drivers/i2c/busses/i2c-powermac.c
-@@ -398,7 +398,7 @@ static void i2c_powermac_register_device
- 
- static int i2c_powermac_probe(struct platform_device *dev)
- {
--	struct pmac_i2c_bus *bus = dev->dev.platform_data;
-+	struct pmac_i2c_bus *bus = dev_get_platdata(&dev->dev);
- 	struct device_node *parent = NULL;
- 	struct i2c_adapter *adapter;
- 	const char *basename;
---- a/drivers/i2c/busses/i2c-pxa.c
-+++ b/drivers/i2c/busses/i2c-pxa.c
-@@ -1072,7 +1072,7 @@ static int i2c_pxa_probe_pdata(struct pl
- 			       struct pxa_i2c *i2c,
- 			       enum pxa_i2c_types *i2c_types)
- {
--	struct i2c_pxa_platform_data *plat = pdev->dev.platform_data;
-+	struct i2c_pxa_platform_data *plat = dev_get_platdata(&pdev->dev);
- 	const struct platform_device_id *id = platform_get_device_id(pdev);
- 
- 	*i2c_types = id->driver_data;
-@@ -1085,7 +1085,7 @@ static int i2c_pxa_probe_pdata(struct pl
- 
- static int i2c_pxa_probe(struct platform_device *dev)
- {
--	struct i2c_pxa_platform_data *plat = dev->dev.platform_data;
-+	struct i2c_pxa_platform_data *plat = dev_get_platdata(&dev->dev);
- 	enum pxa_i2c_types i2c_type;
- 	struct pxa_i2c *i2c;
- 	struct resource *res = NULL;
---- a/drivers/i2c/busses/i2c-rcar.c
-+++ b/drivers/i2c/busses/i2c-rcar.c
-@@ -650,7 +650,7 @@ MODULE_DEVICE_TABLE(of, rcar_i2c_dt_ids)
- 
- static int rcar_i2c_probe(struct platform_device *pdev)
- {
--	struct i2c_rcar_platform_data *pdata = pdev->dev.platform_data;
-+	struct i2c_rcar_platform_data *pdata = dev_get_platdata(&pdev->dev);
- 	struct rcar_i2c_priv *priv;
- 	struct i2c_adapter *adap;
- 	struct resource *res;
---- a/drivers/i2c/busses/i2c-s3c2410.c
-+++ b/drivers/i2c/busses/i2c-s3c2410.c
-@@ -1033,7 +1033,7 @@ static int s3c24xx_i2c_probe(struct plat
- 	int ret;
- 
- 	if (!pdev->dev.of_node) {
--		pdata = pdev->dev.platform_data;
-+		pdata = dev_get_platdata(&pdev->dev);
- 		if (!pdata) {
- 			dev_err(&pdev->dev, "no platform data\n");
- 			return -EINVAL;
---- a/drivers/i2c/busses/i2c-s6000.c
-+++ b/drivers/i2c/busses/i2c-s6000.c
-@@ -290,8 +290,9 @@ static int s6i2c_probe(struct platform_d
- 
- 	clock = 0;
- 	bus_num = -1;
--	if (dev->dev.platform_data) {
--		struct s6_i2c_platform_data *pdata = dev->dev.platform_data;
-+	if (dev_get_platdata(&dev->dev)) {
-+		struct s6_i2c_platform_data *pdata =
-+			dev_get_platdata(&dev->dev);
- 		bus_num = pdata->bus_num;
- 		clock = pdata->clock;
- 	}
---- a/drivers/i2c/busses/i2c-sh7760.c
-+++ b/drivers/i2c/busses/i2c-sh7760.c
-@@ -437,7 +437,7 @@ static int sh7760_i2c_probe(struct platf
- 	struct cami2c *id;
- 	int ret;
- 
--	pd = pdev->dev.platform_data;
-+	pd = dev_get_platdata(&pdev->dev);
- 	if (!pd) {
- 		dev_err(&pdev->dev, "no platform_data!\n");
- 		ret = -ENODEV;
---- a/drivers/i2c/busses/i2c-sh_mobile.c
-+++ b/drivers/i2c/busses/i2c-sh_mobile.c
-@@ -658,7 +658,7 @@ static int sh_mobile_i2c_hook_irqs(struc
- 
- static int sh_mobile_i2c_probe(struct platform_device *dev)
- {
--	struct i2c_sh_mobile_platform_data *pdata = dev->dev.platform_data;
-+	struct i2c_sh_mobile_platform_data *pdata = dev_get_platdata(&dev->dev);
- 	struct sh_mobile_i2c_data *pd;
- 	struct i2c_adapter *adap;
- 	struct resource *res;
---- a/drivers/i2c/busses/i2c-xiic.c
-+++ b/drivers/i2c/busses/i2c-xiic.c
-@@ -703,7 +703,7 @@ static int xiic_i2c_probe(struct platfor
- 	if (irq < 0)
- 		goto resource_missing;
- 
--	pdata = (struct xiic_i2c_platform_data *) pdev->dev.platform_data;
-+	pdata = (struct xiic_i2c_platform_data *)dev_get_platdata(&pdev->dev);
- 
- 	i2c = kzalloc(sizeof(*i2c), GFP_KERNEL);
- 	if (!i2c)
---- a/drivers/i2c/i2c-smbus.c
-+++ b/drivers/i2c/i2c-smbus.c
-@@ -137,7 +137,7 @@ static irqreturn_t smbalert_irq(int irq,
- static int smbalert_probe(struct i2c_client *ara,
- 			  const struct i2c_device_id *id)
- {
--	struct i2c_smbus_alert_setup *setup = ara->dev.platform_data;
-+	struct i2c_smbus_alert_setup *setup = dev_get_platdata(&ara->dev);
- 	struct i2c_smbus_alert *alert;
- 	struct i2c_adapter *adapter = ara->adapter;
- 	int res;
---- a/drivers/i2c/muxes/i2c-arb-gpio-challenge.c
-+++ b/drivers/i2c/muxes/i2c-arb-gpio-challenge.c
-@@ -131,7 +131,7 @@ static int i2c_arbitrator_probe(struct p
- 		dev_err(dev, "Cannot find device tree node\n");
- 		return -ENODEV;
- 	}
--	if (dev->platform_data) {
-+	if (dev_get_platdata(dev)) {
- 		dev_err(dev, "Platform data is not supported\n");
- 		return -EINVAL;
- 	}
---- a/drivers/i2c/muxes/i2c-mux-gpio.c
-+++ b/drivers/i2c/muxes/i2c-mux-gpio.c
-@@ -148,12 +148,14 @@ static int i2c_mux_gpio_probe(struct pla
- 
- 	platform_set_drvdata(pdev, mux);
- 
--	if (!pdev->dev.platform_data) {
-+	if (!dev_get_platdata(&pdev->dev)) {
- 		ret = i2c_mux_gpio_probe_dt(mux, pdev);
- 		if (ret < 0)
- 			return ret;
--	} else
--		memcpy(&mux->data, pdev->dev.platform_data, sizeof(mux->data));
-+	} else {
-+		memcpy(&mux->data, dev_get_platdata(&pdev->dev),
-+			sizeof(mux->data));
-+	}
- 
- 	/*
- 	 * If a GPIO chip name is provided, the GPIO pin numbers provided are
---- a/drivers/i2c/muxes/i2c-mux-pca9541.c
-+++ b/drivers/i2c/muxes/i2c-mux-pca9541.c
-@@ -324,7 +324,7 @@ static int pca9541_probe(struct i2c_clie
- 			 const struct i2c_device_id *id)
- {
- 	struct i2c_adapter *adap = client->adapter;
--	struct pca954x_platform_data *pdata = client->dev.platform_data;
-+	struct pca954x_platform_data *pdata = dev_get_platdata(&client->dev);
- 	struct pca9541 *data;
- 	int force;
- 	int ret = -ENODEV;
---- a/drivers/i2c/muxes/i2c-mux-pca954x.c
-+++ b/drivers/i2c/muxes/i2c-mux-pca954x.c
-@@ -185,7 +185,7 @@ static int pca954x_probe(struct i2c_clie
- 			 const struct i2c_device_id *id)
- {
- 	struct i2c_adapter *adap = to_i2c_adapter(client->dev.parent);
--	struct pca954x_platform_data *pdata = client->dev.platform_data;
-+	struct pca954x_platform_data *pdata = dev_get_platdata(&client->dev);
- 	int num, force, class;
- 	struct pca954x *data;
- 	int ret = -ENODEV;
---- a/drivers/i2c/muxes/i2c-mux-pinctrl.c
-+++ b/drivers/i2c/muxes/i2c-mux-pinctrl.c
-@@ -145,7 +145,7 @@ static int i2c_mux_pinctrl_probe(struct
- 
- 	mux->dev = &pdev->dev;
- 
--	mux->pdata = pdev->dev.platform_data;
-+	mux->pdata = dev_get_platdata(&pdev->dev);
- 	if (!mux->pdata) {
- 		ret = i2c_mux_pinctrl_parse_dt(mux, pdev);
- 		if (ret < 0)
diff --git a/patches.baytrail/1171-i2c-mv64xxx-Add-I2C-Transaction-Generator-support.patch b/patches.baytrail/1171-i2c-mv64xxx-Add-I2C-Transaction-Generator-support.patch
deleted file mode 100644
index 598e88c3e9100..0000000000000
--- a/patches.baytrail/1171-i2c-mv64xxx-Add-I2C-Transaction-Generator-support.patch
+++ /dev/null
@@ -1,370 +0,0 @@
-From 0fc6ef4f18ff9d06db71534ddd972bb4e2886db0 Mon Sep 17 00:00:00 2001
-From: Gregory CLEMENT <gregory.clement@free-electrons.com>
-Date: Thu, 22 Aug 2013 16:19:05 +0200
-Subject: i2c: mv64xxx: Add I2C Transaction Generator support
-
-The I2C Transaction Generator offloads CPU from managing I2C
-transfer step by step.
-
-This feature is currently only available on Armada XP, so usage of
-this mechanism is activated through device tree.
-
-Based on the work of Piotr Ziecik and rewrote to use the new way of
-handling multiples i2c messages.
-
-Signed-off-by: Piotr Ziecik <kosmo@semihalf.com>
-Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
-Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-(cherry picked from commit 930ab3d403ae43f19d7e6d972139e02c9b8a5ec6)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- .../devicetree/bindings/i2c/i2c-mv64xxx.txt        |  10 ++
- drivers/i2c/busses/i2c-mv64xxx.c                   | 193 +++++++++++++++++++--
- 2 files changed, 192 insertions(+), 11 deletions(-)
-
-diff --git a/Documentation/devicetree/bindings/i2c/i2c-mv64xxx.txt b/Documentation/devicetree/bindings/i2c/i2c-mv64xxx.txt
-index 6113f9275f42..73cdc03cc2bf 100644
---- a/Documentation/devicetree/bindings/i2c/i2c-mv64xxx.txt
-+++ b/Documentation/devicetree/bindings/i2c/i2c-mv64xxx.txt
-@@ -5,6 +5,7 @@ Required properties :
- 
-  - reg             : Offset and length of the register set for the device
-  - compatible      : Should be "marvell,mv64xxx-i2c" or "allwinner,sun4i-i2c"
-+                     or "marvell,mv7230-i2c"
-  - interrupts      : The interrupt number
- 
- Optional properties :
-@@ -20,3 +21,12 @@ Examples:
- 		interrupts = <29>;
- 		clock-frequency = <100000>;
- 	};
-+
-+For the Armada XP:
-+
-+	i2c@11000 {
-+		compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
-+		reg = <0x11000 0x100>;
-+		interrupts = <29>;
-+		clock-frequency = <100000>;
-+	};
-diff --git a/drivers/i2c/busses/i2c-mv64xxx.c b/drivers/i2c/busses/i2c-mv64xxx.c
-index 9cc361d19941..2404c4e0f35c 100644
---- a/drivers/i2c/busses/i2c-mv64xxx.c
-+++ b/drivers/i2c/busses/i2c-mv64xxx.c
-@@ -55,6 +55,32 @@
- #define	MV64XXX_I2C_STATUS_MAST_RD_ADDR_2_NO_ACK	0xe8
- #define	MV64XXX_I2C_STATUS_NO_STATUS			0xf8
- 
-+/* Register defines (I2C bridge) */
-+#define	MV64XXX_I2C_REG_TX_DATA_LO			0xc0
-+#define	MV64XXX_I2C_REG_TX_DATA_HI			0xc4
-+#define	MV64XXX_I2C_REG_RX_DATA_LO			0xc8
-+#define	MV64XXX_I2C_REG_RX_DATA_HI			0xcc
-+#define	MV64XXX_I2C_REG_BRIDGE_CONTROL			0xd0
-+#define	MV64XXX_I2C_REG_BRIDGE_STATUS			0xd4
-+#define	MV64XXX_I2C_REG_BRIDGE_INTR_CAUSE		0xd8
-+#define	MV64XXX_I2C_REG_BRIDGE_INTR_MASK		0xdC
-+#define	MV64XXX_I2C_REG_BRIDGE_TIMING			0xe0
-+
-+/* Bridge Control values */
-+#define	MV64XXX_I2C_BRIDGE_CONTROL_WR			0x00000001
-+#define	MV64XXX_I2C_BRIDGE_CONTROL_RD			0x00000002
-+#define	MV64XXX_I2C_BRIDGE_CONTROL_ADDR_SHIFT		2
-+#define	MV64XXX_I2C_BRIDGE_CONTROL_ADDR_EXT		0x00001000
-+#define	MV64XXX_I2C_BRIDGE_CONTROL_TX_SIZE_SHIFT	13
-+#define	MV64XXX_I2C_BRIDGE_CONTROL_RX_SIZE_SHIFT	16
-+#define	MV64XXX_I2C_BRIDGE_CONTROL_ENABLE		0x00080000
-+
-+/* Bridge Status values */
-+#define	MV64XXX_I2C_BRIDGE_STATUS_ERROR			0x00000001
-+#define	MV64XXX_I2C_STATUS_OFFLOAD_ERROR		0xf0000001
-+#define	MV64XXX_I2C_STATUS_OFFLOAD_OK			0xf0000000
-+
-+
- /* Driver states */
- enum {
- 	MV64XXX_I2C_STATE_INVALID,
-@@ -71,14 +97,17 @@ enum {
- enum {
- 	MV64XXX_I2C_ACTION_INVALID,
- 	MV64XXX_I2C_ACTION_CONTINUE,
-+	MV64XXX_I2C_ACTION_OFFLOAD_SEND_START,
- 	MV64XXX_I2C_ACTION_SEND_START,
- 	MV64XXX_I2C_ACTION_SEND_RESTART,
-+	MV64XXX_I2C_ACTION_OFFLOAD_RESTART,
- 	MV64XXX_I2C_ACTION_SEND_ADDR_1,
- 	MV64XXX_I2C_ACTION_SEND_ADDR_2,
- 	MV64XXX_I2C_ACTION_SEND_DATA,
- 	MV64XXX_I2C_ACTION_RCV_DATA,
- 	MV64XXX_I2C_ACTION_RCV_DATA_STOP,
- 	MV64XXX_I2C_ACTION_SEND_STOP,
-+	MV64XXX_I2C_ACTION_OFFLOAD_SEND_STOP,
- };
- 
- struct mv64xxx_i2c_regs {
-@@ -117,6 +146,7 @@ struct mv64xxx_i2c_data {
- 	spinlock_t		lock;
- 	struct i2c_msg		*msg;
- 	struct i2c_adapter	adapter;
-+	bool			offload_enabled;
- };
- 
- static struct mv64xxx_i2c_regs mv64xxx_i2c_regs_mv64xxx = {
-@@ -165,6 +195,77 @@ mv64xxx_i2c_prepare_for_io(struct mv64xxx_i2c_data *drv_data,
- 	}
- }
- 
-+static int mv64xxx_i2c_offload_msg(struct mv64xxx_i2c_data *drv_data)
-+{
-+	unsigned long data_reg_hi = 0;
-+	unsigned long data_reg_lo = 0;
-+	unsigned long ctrl_reg;
-+	struct i2c_msg *msg = drv_data->msgs;
-+
-+	drv_data->msg = msg;
-+	drv_data->byte_posn = 0;
-+	drv_data->bytes_left = msg->len;
-+	drv_data->aborting = 0;
-+	drv_data->rc = 0;
-+	/* Only regular transactions can be offloaded */
-+	if ((msg->flags & ~(I2C_M_TEN | I2C_M_RD)) != 0)
-+		return -EINVAL;
-+
-+	/* Only 1-8 byte transfers can be offloaded */
-+	if (msg->len < 1 || msg->len > 8)
-+		return -EINVAL;
-+
-+	/* Build transaction */
-+	ctrl_reg = MV64XXX_I2C_BRIDGE_CONTROL_ENABLE |
-+		   (msg->addr << MV64XXX_I2C_BRIDGE_CONTROL_ADDR_SHIFT);
-+
-+	if ((msg->flags & I2C_M_TEN) != 0)
-+		ctrl_reg |=  MV64XXX_I2C_BRIDGE_CONTROL_ADDR_EXT;
-+
-+	if ((msg->flags & I2C_M_RD) == 0) {
-+		u8 local_buf[8] = { 0 };
-+
-+		memcpy(local_buf, msg->buf, msg->len);
-+		data_reg_lo = cpu_to_le32(*((u32 *)local_buf));
-+		data_reg_hi = cpu_to_le32(*((u32 *)(local_buf+4)));
-+
-+		ctrl_reg |= MV64XXX_I2C_BRIDGE_CONTROL_WR |
-+		    (msg->len - 1) << MV64XXX_I2C_BRIDGE_CONTROL_TX_SIZE_SHIFT;
-+
-+		writel_relaxed(data_reg_lo,
-+			drv_data->reg_base + MV64XXX_I2C_REG_TX_DATA_LO);
-+		writel_relaxed(data_reg_hi,
-+			drv_data->reg_base + MV64XXX_I2C_REG_TX_DATA_HI);
-+
-+	} else {
-+		ctrl_reg |= MV64XXX_I2C_BRIDGE_CONTROL_RD |
-+		    (msg->len - 1) << MV64XXX_I2C_BRIDGE_CONTROL_RX_SIZE_SHIFT;
-+	}
-+
-+	/* Execute transaction */
-+	writel(ctrl_reg, drv_data->reg_base + MV64XXX_I2C_REG_BRIDGE_CONTROL);
-+
-+	return 0;
-+}
-+
-+static void
-+mv64xxx_i2c_update_offload_data(struct mv64xxx_i2c_data *drv_data)
-+{
-+	struct i2c_msg *msg = drv_data->msg;
-+
-+	if (msg->flags & I2C_M_RD) {
-+		u32 data_reg_lo = readl(drv_data->reg_base +
-+				MV64XXX_I2C_REG_RX_DATA_LO);
-+		u32 data_reg_hi = readl(drv_data->reg_base +
-+				MV64XXX_I2C_REG_RX_DATA_HI);
-+		u8 local_buf[8] = { 0 };
-+
-+		*((u32 *)local_buf) = le32_to_cpu(data_reg_lo);
-+		*((u32 *)(local_buf+4)) = le32_to_cpu(data_reg_hi);
-+		memcpy(msg->buf, local_buf, msg->len);
-+	}
-+
-+}
- /*
-  *****************************************************************************
-  *
-@@ -177,6 +278,15 @@ mv64xxx_i2c_prepare_for_io(struct mv64xxx_i2c_data *drv_data,
- static void
- mv64xxx_i2c_hw_init(struct mv64xxx_i2c_data *drv_data)
- {
-+	if (drv_data->offload_enabled) {
-+		writel(0, drv_data->reg_base + MV64XXX_I2C_REG_BRIDGE_CONTROL);
-+		writel(0, drv_data->reg_base + MV64XXX_I2C_REG_BRIDGE_TIMING);
-+		writel(0, drv_data->reg_base +
-+			MV64XXX_I2C_REG_BRIDGE_INTR_CAUSE);
-+		writel(0, drv_data->reg_base +
-+			MV64XXX_I2C_REG_BRIDGE_INTR_MASK);
-+	}
-+
- 	writel(0, drv_data->reg_base + drv_data->reg_offsets.soft_reset);
- 	writel(MV64XXX_I2C_BAUD_DIV_M(drv_data->freq_m) | MV64XXX_I2C_BAUD_DIV_N(drv_data->freq_n),
- 		drv_data->reg_base + drv_data->reg_offsets.clock);
-@@ -283,6 +393,16 @@ mv64xxx_i2c_fsm(struct mv64xxx_i2c_data *drv_data, u32 status)
- 		drv_data->rc = -ENXIO;
- 		break;
- 
-+	case MV64XXX_I2C_STATUS_OFFLOAD_OK:
-+		if (drv_data->send_stop || drv_data->aborting) {
-+			drv_data->action = MV64XXX_I2C_ACTION_OFFLOAD_SEND_STOP;
-+			drv_data->state = MV64XXX_I2C_STATE_IDLE;
-+		} else {
-+			drv_data->action = MV64XXX_I2C_ACTION_OFFLOAD_RESTART;
-+			drv_data->state = MV64XXX_I2C_STATE_WAITING_FOR_RESTART;
-+		}
-+		break;
-+
- 	default:
- 		dev_err(&drv_data->adapter.dev,
- 			"mv64xxx_i2c_fsm: Ctlr Error -- state: 0x%x, "
-@@ -299,20 +419,27 @@ static void
- mv64xxx_i2c_do_action(struct mv64xxx_i2c_data *drv_data)
- {
- 	switch(drv_data->action) {
-+	case MV64XXX_I2C_ACTION_OFFLOAD_RESTART:
-+		mv64xxx_i2c_update_offload_data(drv_data);
-+		writel(0, drv_data->reg_base +	MV64XXX_I2C_REG_BRIDGE_CONTROL);
-+		writel(0, drv_data->reg_base +
-+			MV64XXX_I2C_REG_BRIDGE_INTR_CAUSE);
-+		/* FALLTHRU */
- 	case MV64XXX_I2C_ACTION_SEND_RESTART:
- 		/* We should only get here if we have further messages */
- 		BUG_ON(drv_data->num_msgs == 0);
- 
--		drv_data->cntl_bits |= MV64XXX_I2C_REG_CONTROL_START;
--		writel(drv_data->cntl_bits,
--			drv_data->reg_base + drv_data->reg_offsets.control);
--
- 		drv_data->msgs++;
- 		drv_data->num_msgs--;
-+		if (!(drv_data->offload_enabled &&
-+				mv64xxx_i2c_offload_msg(drv_data))) {
-+			drv_data->cntl_bits |= MV64XXX_I2C_REG_CONTROL_START;
-+			writel(drv_data->cntl_bits,
-+			drv_data->reg_base + drv_data->reg_offsets.control);
- 
--		/* Setup for the next message */
--		mv64xxx_i2c_prepare_for_io(drv_data, drv_data->msgs);
--
-+			/* Setup for the next message */
-+			mv64xxx_i2c_prepare_for_io(drv_data, drv_data->msgs);
-+		}
- 		/*
- 		 * We're never at the start of the message here, and by this
- 		 * time it's already too late to do any protocol mangling.
-@@ -326,6 +453,12 @@ mv64xxx_i2c_do_action(struct mv64xxx_i2c_data *drv_data)
- 			drv_data->reg_base + drv_data->reg_offsets.control);
- 		break;
- 
-+	case MV64XXX_I2C_ACTION_OFFLOAD_SEND_START:
-+		if (!mv64xxx_i2c_offload_msg(drv_data))
-+			break;
-+		else
-+			drv_data->action = MV64XXX_I2C_ACTION_SEND_START;
-+		/* FALLTHRU */
- 	case MV64XXX_I2C_ACTION_SEND_START:
- 		writel(drv_data->cntl_bits | MV64XXX_I2C_REG_CONTROL_START,
- 			drv_data->reg_base + drv_data->reg_offsets.control);
-@@ -375,6 +508,7 @@ mv64xxx_i2c_do_action(struct mv64xxx_i2c_data *drv_data)
- 			"mv64xxx_i2c_do_action: Invalid action: %d\n",
- 			drv_data->action);
- 		drv_data->rc = -EIO;
-+
- 		/* FALLTHRU */
- 	case MV64XXX_I2C_ACTION_SEND_STOP:
- 		drv_data->cntl_bits &= ~MV64XXX_I2C_REG_CONTROL_INTEN;
-@@ -383,6 +517,15 @@ mv64xxx_i2c_do_action(struct mv64xxx_i2c_data *drv_data)
- 		drv_data->block = 0;
- 		wake_up(&drv_data->waitq);
- 		break;
-+
-+	case MV64XXX_I2C_ACTION_OFFLOAD_SEND_STOP:
-+		mv64xxx_i2c_update_offload_data(drv_data);
-+		writel(0, drv_data->reg_base +	MV64XXX_I2C_REG_BRIDGE_CONTROL);
-+		writel(0, drv_data->reg_base +
-+			MV64XXX_I2C_REG_BRIDGE_INTR_CAUSE);
-+		drv_data->block = 0;
-+		wake_up(&drv_data->waitq);
-+		break;
- 	}
- }
- 
-@@ -395,6 +538,21 @@ mv64xxx_i2c_intr(int irq, void *dev_id)
- 	irqreturn_t	rc = IRQ_NONE;
- 
- 	spin_lock_irqsave(&drv_data->lock, flags);
-+
-+	if (drv_data->offload_enabled) {
-+		while (readl(drv_data->reg_base +
-+				MV64XXX_I2C_REG_BRIDGE_INTR_CAUSE)) {
-+			int reg_status = readl(drv_data->reg_base +
-+					MV64XXX_I2C_REG_BRIDGE_STATUS);
-+			if (reg_status & MV64XXX_I2C_BRIDGE_STATUS_ERROR)
-+				status = MV64XXX_I2C_STATUS_OFFLOAD_ERROR;
-+			else
-+				status = MV64XXX_I2C_STATUS_OFFLOAD_OK;
-+			mv64xxx_i2c_fsm(drv_data, status);
-+			mv64xxx_i2c_do_action(drv_data);
-+			rc = IRQ_HANDLED;
-+		}
-+	}
- 	while (readl(drv_data->reg_base + drv_data->reg_offsets.control) &
- 						MV64XXX_I2C_REG_CONTROL_IFLG) {
- 		status = readl(drv_data->reg_base + drv_data->reg_offsets.status);
-@@ -459,11 +617,15 @@ mv64xxx_i2c_execute_msg(struct mv64xxx_i2c_data *drv_data, struct i2c_msg *msg,
- 	unsigned long	flags;
- 
- 	spin_lock_irqsave(&drv_data->lock, flags);
--	mv64xxx_i2c_prepare_for_io(drv_data, msg);
--
--	drv_data->action = MV64XXX_I2C_ACTION_SEND_START;
--	drv_data->state = MV64XXX_I2C_STATE_WAITING_FOR_START_COND;
-+	if (drv_data->offload_enabled) {
-+		drv_data->action = MV64XXX_I2C_ACTION_OFFLOAD_SEND_START;
-+		drv_data->state = MV64XXX_I2C_STATE_WAITING_FOR_START_COND;
-+	} else {
-+		mv64xxx_i2c_prepare_for_io(drv_data, msg);
- 
-+		drv_data->action = MV64XXX_I2C_ACTION_SEND_START;
-+		drv_data->state = MV64XXX_I2C_STATE_WAITING_FOR_START_COND;
-+	}
- 	drv_data->send_stop = is_last;
- 	drv_data->block = 1;
- 	mv64xxx_i2c_do_action(drv_data);
-@@ -521,6 +683,7 @@ static const struct i2c_algorithm mv64xxx_i2c_algo = {
- static const struct of_device_id mv64xxx_i2c_of_match_table[] = {
- 	{ .compatible = "allwinner,sun4i-i2c", .data = &mv64xxx_i2c_regs_sun4i},
- 	{ .compatible = "marvell,mv64xxx-i2c", .data = &mv64xxx_i2c_regs_mv64xxx},
-+	{ .compatible = "marvell,mv78230-i2c", .data = &mv64xxx_i2c_regs_mv64xxx},
- 	{}
- };
- MODULE_DEVICE_TABLE(of, mv64xxx_i2c_of_match_table);
-@@ -601,6 +764,13 @@ mv64xxx_of_config(struct mv64xxx_i2c_data *drv_data,
- 
- 	memcpy(&drv_data->reg_offsets, device->data, sizeof(drv_data->reg_offsets));
- 
-+	/*
-+	 * For controllers embedded in new SoCs activate the
-+	 * Transaction Generator support.
-+	 */
-+	if (of_device_is_compatible(np, "marvell,mv78230-i2c"))
-+		drv_data->offload_enabled = true;
-+
- out:
- 	return rc;
- #endif
-@@ -654,6 +824,7 @@ mv64xxx_i2c_probe(struct platform_device *pd)
- 		drv_data->freq_n = pdata->freq_n;
- 		drv_data->irq = platform_get_irq(pd, 0);
- 		drv_data->adapter.timeout = msecs_to_jiffies(pdata->timeout);
-+		drv_data->offload_enabled = false;
- 		memcpy(&drv_data->reg_offsets, &mv64xxx_i2c_regs_mv64xxx, sizeof(drv_data->reg_offsets));
- 	} else if (pd->dev.of_node) {
- 		rc = mv64xxx_of_config(drv_data, &pd->dev);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1172-i2c-mv64xxx-Fix-timing-issue-on-Armada-XP-errata-FE-.patch b/patches.baytrail/1172-i2c-mv64xxx-Fix-timing-issue-on-Armada-XP-errata-FE-.patch
deleted file mode 100644
index 78399a5fc1fe3..0000000000000
--- a/patches.baytrail/1172-i2c-mv64xxx-Fix-timing-issue-on-Armada-XP-errata-FE-.patch
+++ /dev/null
@@ -1,84 +0,0 @@
-From 4911fec28a742d09775675f6788f93647e8ca47a Mon Sep 17 00:00:00 2001
-From: Gregory CLEMENT <gregory.clement@free-electrons.com>
-Date: Thu, 22 Aug 2013 16:19:06 +0200
-Subject: i2c: mv64xxx: Fix timing issue on Armada XP (errata FE-8471889)
-
-All the Armada XP (mv78230, mv78260 and mv78460) have a silicon issue
-in the I2C controller which violate the i2c repeated start
-timing. The I2C standard requires a minimum of 4.7us for the repeated
-start condition whereas the I2C controller of the Armada XP this time
-is 2.9us.
-
-So this patch adds a 5us delay for the start case only if the
-the compatible i2c-mv78230 is set.
-
-Based on the initals patches from Zbigniew Bodek
-
-Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
-Signed-off-by: Zbigniew Bodek <zbb@semihalf.com>
-Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-(cherry picked from commit c1d15b68aab86f1f3b602fa65e7618c0065d46e6)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/i2c/busses/i2c-mv64xxx.c | 15 +++++++++++++--
- 1 file changed, 13 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/i2c/busses/i2c-mv64xxx.c b/drivers/i2c/busses/i2c-mv64xxx.c
-index 2404c4e0f35c..bc60f9ac7c04 100644
---- a/drivers/i2c/busses/i2c-mv64xxx.c
-+++ b/drivers/i2c/busses/i2c-mv64xxx.c
-@@ -24,6 +24,7 @@
- #include <linux/of_i2c.h>
- #include <linux/clk.h>
- #include <linux/err.h>
-+#include <linux/delay.h>
- 
- #define MV64XXX_I2C_ADDR_ADDR(val)			((val & 0x7f) << 1)
- #define MV64XXX_I2C_BAUD_DIV_N(val)			(val & 0x7)
-@@ -147,6 +148,8 @@ struct mv64xxx_i2c_data {
- 	struct i2c_msg		*msg;
- 	struct i2c_adapter	adapter;
- 	bool			offload_enabled;
-+/* 5us delay in order to avoid repeated start timing violation */
-+	bool			errata_delay;
- };
- 
- static struct mv64xxx_i2c_regs mv64xxx_i2c_regs_mv64xxx = {
-@@ -440,6 +443,9 @@ mv64xxx_i2c_do_action(struct mv64xxx_i2c_data *drv_data)
- 			/* Setup for the next message */
- 			mv64xxx_i2c_prepare_for_io(drv_data, drv_data->msgs);
- 		}
-+		if (drv_data->errata_delay)
-+			udelay(5);
-+
- 		/*
- 		 * We're never at the start of the message here, and by this
- 		 * time it's already too late to do any protocol mangling.
-@@ -499,6 +505,9 @@ mv64xxx_i2c_do_action(struct mv64xxx_i2c_data *drv_data)
- 		writel(drv_data->cntl_bits | MV64XXX_I2C_REG_CONTROL_STOP,
- 			drv_data->reg_base + drv_data->reg_offsets.control);
- 		drv_data->block = 0;
-+		if (drv_data->errata_delay)
-+			udelay(5);
-+
- 		wake_up(&drv_data->waitq);
- 		break;
- 
-@@ -766,10 +775,12 @@ mv64xxx_of_config(struct mv64xxx_i2c_data *drv_data,
- 
- 	/*
- 	 * For controllers embedded in new SoCs activate the
--	 * Transaction Generator support.
-+	 * Transaction Generator support and the errata fix.
- 	 */
--	if (of_device_is_compatible(np, "marvell,mv78230-i2c"))
-+	if (of_device_is_compatible(np, "marvell,mv78230-i2c")) {
- 		drv_data->offload_enabled = true;
-+		drv_data->errata_delay = true;
-+	}
- 
- out:
- 	return rc;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1173-i2c-move-OF-helpers-into-the-core.patch b/patches.baytrail/1173-i2c-move-OF-helpers-into-the-core.patch
deleted file mode 100644
index b52ab9c1b0d33..0000000000000
--- a/patches.baytrail/1173-i2c-move-OF-helpers-into-the-core.patch
+++ /dev/null
@@ -1,1102 +0,0 @@
-From 0f181166c72878255ed287ba46d6e62840c5797b Mon Sep 17 00:00:00 2001
-From: Wolfram Sang <wsa@the-dreams.de>
-Date: Thu, 11 Jul 2013 12:56:15 +0100
-Subject: i2c: move OF helpers into the core
-
-I2C of helpers used to live in of_i2c.c but experience (from SPI) shows
-that it is much cleaner to have this in the core. This also removes a
-circular dependency between the helpers and the core, and so we can
-finally register child nodes in the core instead of doing this manually
-in each driver. So, fix the drivers and documentation, too.
-
-Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-(cherry picked from commit 687b81d083c082bc1e853032e3a2a54f8c251d27)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- Documentation/acpi/enumeration.txt              |    1 
- arch/powerpc/platforms/44x/warp.c               |    1 
- drivers/gpu/drm/tilcdc/tilcdc_slave.c           |    1 
- drivers/gpu/drm/tilcdc/tilcdc_tfp410.c          |    1 
- drivers/gpu/host1x/drm/output.c                 |    2 
- drivers/i2c/busses/i2c-at91.c                   |    3 
- drivers/i2c/busses/i2c-cpm.c                    |    6 -
- drivers/i2c/busses/i2c-davinci.c                |    2 
- drivers/i2c/busses/i2c-designware-platdrv.c     |    2 
- drivers/i2c/busses/i2c-gpio.c                   |    3 
- drivers/i2c/busses/i2c-i801.c                   |    2 
- drivers/i2c/busses/i2c-ibm_iic.c                |    4 
- drivers/i2c/busses/i2c-imx.c                    |    3 
- drivers/i2c/busses/i2c-mpc.c                    |    2 
- drivers/i2c/busses/i2c-mv64xxx.c                |    3 
- drivers/i2c/busses/i2c-mxs.c                    |    3 
- drivers/i2c/busses/i2c-nomadik.c                |    3 
- drivers/i2c/busses/i2c-ocores.c                 |    3 
- drivers/i2c/busses/i2c-octeon.c                 |    3 
- drivers/i2c/busses/i2c-omap.c                   |    3 
- drivers/i2c/busses/i2c-pnx.c                    |    3 
- drivers/i2c/busses/i2c-powermac.c               |    9 +
- drivers/i2c/busses/i2c-pxa.c                    |    2 
- drivers/i2c/busses/i2c-s3c2410.c                |    2 
- drivers/i2c/busses/i2c-sh_mobile.c              |    2 
- drivers/i2c/busses/i2c-sirf.c                   |    3 
- drivers/i2c/busses/i2c-stu300.c                 |    2 
- drivers/i2c/busses/i2c-tegra.c                  |    3 
- drivers/i2c/busses/i2c-versatile.c              |    2 
- drivers/i2c/busses/i2c-wmt.c                    |    3 
- drivers/i2c/busses/i2c-xiic.c                   |    3 
- drivers/i2c/i2c-core.c                          |  109 ++++++++++++++++++++++
- drivers/i2c/i2c-mux.c                           |    3 
- drivers/i2c/muxes/i2c-arb-gpio-challenge.c      |    1 
- drivers/i2c/muxes/i2c-mux-gpio.c                |    1 
- drivers/i2c/muxes/i2c-mux-pinctrl.c             |    1 
- drivers/media/platform/exynos4-is/fimc-is-i2c.c |    4 
- drivers/media/platform/exynos4-is/fimc-is.c     |    2 
- drivers/media/platform/exynos4-is/media-dev.c   |    1 
- drivers/of/Kconfig                              |    6 -
- drivers/of/Makefile                             |    1 
- drivers/of/of_i2c.c                             |  114 ------------------------
- drivers/staging/imx-drm/imx-tve.c               |    2 
- include/linux/i2c.h                             |   20 ++++
- include/linux/of_i2c.h                          |   46 ---------
- sound/soc/fsl/imx-sgtl5000.c                    |    2 
- sound/soc/fsl/imx-wm8962.c                      |    2 
- 47 files changed, 138 insertions(+), 262 deletions(-)
- delete mode 100644 drivers/of/of_i2c.c
- delete mode 100644 include/linux/of_i2c.h
-
---- a/Documentation/acpi/enumeration.txt
-+++ b/Documentation/acpi/enumeration.txt
-@@ -238,7 +238,6 @@ An I2C bus (controller) driver does:
- 	if (ret)
- 		/* handle error */
- 
--	of_i2c_register_devices(adapter);
- 	/* Enumerate the slave devices behind this bus via ACPI */
- 	acpi_i2c_register_devices(adapter);
- 
---- a/arch/powerpc/platforms/44x/warp.c
-+++ b/arch/powerpc/platforms/44x/warp.c
-@@ -16,7 +16,6 @@
- #include <linux/interrupt.h>
- #include <linux/delay.h>
- #include <linux/of_gpio.h>
--#include <linux/of_i2c.h>
- #include <linux/slab.h>
- #include <linux/export.h>
- 
---- a/drivers/gpu/drm/tilcdc/tilcdc_slave.c
-+++ b/drivers/gpu/drm/tilcdc/tilcdc_slave.c
-@@ -16,7 +16,6 @@
-  */
- 
- #include <linux/i2c.h>
--#include <linux/of_i2c.h>
- #include <linux/pinctrl/pinmux.h>
- #include <linux/pinctrl/consumer.h>
- #include <drm/drm_encoder_slave.h>
---- a/drivers/gpu/drm/tilcdc/tilcdc_tfp410.c
-+++ b/drivers/gpu/drm/tilcdc/tilcdc_tfp410.c
-@@ -16,7 +16,6 @@
-  */
- 
- #include <linux/i2c.h>
--#include <linux/of_i2c.h>
- #include <linux/gpio.h>
- #include <linux/of_gpio.h>
- #include <linux/pinctrl/pinmux.h>
---- a/drivers/gpu/host1x/drm/output.c
-+++ b/drivers/gpu/host1x/drm/output.c
-@@ -9,7 +9,7 @@
- 
- #include <linux/module.h>
- #include <linux/of_gpio.h>
--#include <linux/of_i2c.h>
-+#include <linux/i2c.h>
- 
- #include "drm.h"
- 
---- a/drivers/i2c/busses/i2c-at91.c
-+++ b/drivers/i2c/busses/i2c-at91.c
-@@ -28,7 +28,6 @@
- #include <linux/module.h>
- #include <linux/of.h>
- #include <linux/of_device.h>
--#include <linux/of_i2c.h>
- #include <linux/platform_device.h>
- #include <linux/slab.h>
- #include <linux/platform_data/dma-atmel.h>
-@@ -775,8 +774,6 @@ static int at91_twi_probe(struct platfor
- 		return rc;
- 	}
- 
--	of_i2c_register_devices(&dev->adapter);
--
- 	dev_info(dev->dev, "AT91 i2c bus driver.\n");
- 	return 0;
- }
---- a/drivers/i2c/busses/i2c-cpm.c
-+++ b/drivers/i2c/busses/i2c-cpm.c
-@@ -42,7 +42,6 @@
- #include <linux/dma-mapping.h>
- #include <linux/of_device.h>
- #include <linux/of_platform.h>
--#include <linux/of_i2c.h>
- #include <sysdev/fsl_soc.h>
- #include <asm/cpm.h>
- 
-@@ -673,11 +672,6 @@ static int cpm_i2c_probe(struct platform
- 	dev_dbg(&ofdev->dev, "hw routines for %s registered.\n",
- 		cpm->adap.name);
- 
--	/*
--	 * register OF I2C devices
--	 */
--	of_i2c_register_devices(&cpm->adap);
--
- 	return 0;
- out_shut:
- 	cpm_i2c_shutdown(cpm);
---- a/drivers/i2c/busses/i2c-davinci.c
-+++ b/drivers/i2c/busses/i2c-davinci.c
-@@ -38,7 +38,6 @@
- #include <linux/slab.h>
- #include <linux/cpufreq.h>
- #include <linux/gpio.h>
--#include <linux/of_i2c.h>
- #include <linux/of_device.h>
- 
- #include <mach/hardware.h>
-@@ -728,7 +727,6 @@ static int davinci_i2c_probe(struct plat
- 		dev_err(&pdev->dev, "failure adding adapter\n");
- 		goto err_unuse_clocks;
- 	}
--	of_i2c_register_devices(adap);
- 
- 	return 0;
- 
---- a/drivers/i2c/busses/i2c-designware-platdrv.c
-+++ b/drivers/i2c/busses/i2c-designware-platdrv.c
-@@ -35,7 +35,6 @@
- #include <linux/err.h>
- #include <linux/interrupt.h>
- #include <linux/of.h>
--#include <linux/of_i2c.h>
- #include <linux/platform_device.h>
- #include <linux/pm.h>
- #include <linux/pm_runtime.h>
-@@ -172,7 +171,6 @@ static int dw_i2c_probe(struct platform_
- 		dev_err(&pdev->dev, "failure adding adapter\n");
- 		return r;
- 	}
--	of_i2c_register_devices(adap);
- 	acpi_i2c_register_devices(adap);
- 
- 	pm_runtime_set_autosuspend_delay(&pdev->dev, 1000);
---- a/drivers/i2c/busses/i2c-gpio.c
-+++ b/drivers/i2c/busses/i2c-gpio.c
-@@ -16,7 +16,6 @@
- #include <linux/platform_device.h>
- #include <linux/gpio.h>
- #include <linux/of_gpio.h>
--#include <linux/of_i2c.h>
- 
- struct i2c_gpio_private_data {
- 	struct i2c_adapter adap;
-@@ -224,8 +223,6 @@ static int i2c_gpio_probe(struct platfor
- 	if (ret)
- 		goto err_add_bus;
- 
--	of_i2c_register_devices(adap);
--
- 	platform_set_drvdata(pdev, priv);
- 
- 	dev_info(&pdev->dev, "using pins %u (SDA) and %u (SCL%s)\n",
---- a/drivers/i2c/busses/i2c-i801.c
-+++ b/drivers/i2c/busses/i2c-i801.c
-@@ -87,7 +87,6 @@
- #include <linux/slab.h>
- #include <linux/wait.h>
- #include <linux/err.h>
--#include <linux/of_i2c.h>
- 
- #if (defined CONFIG_I2C_MUX_GPIO || defined CONFIG_I2C_MUX_GPIO_MODULE) && \
- 		defined CONFIG_DMI
-@@ -1230,7 +1229,6 @@ static int i801_probe(struct pci_dev *de
- 		goto exit_free_irq;
- 	}
- 
--	of_i2c_register_devices(&priv->adapter);
- 	i801_probe_optional_slaves(priv);
- 	/* We ignore errors - multiplexing is optional */
- 	i801_add_mux(priv);
---- a/drivers/i2c/busses/i2c-ibm_iic.c
-+++ b/drivers/i2c/busses/i2c-ibm_iic.c
-@@ -42,7 +42,6 @@
- #include <linux/io.h>
- #include <linux/i2c.h>
- #include <linux/of_platform.h>
--#include <linux/of_i2c.h>
- 
- #include "i2c-ibm_iic.h"
- 
-@@ -759,9 +758,6 @@ static int iic_probe(struct platform_dev
- 	dev_info(&ofdev->dev, "using %s mode\n",
- 		 dev->fast_mode ? "fast (400 kHz)" : "standard (100 kHz)");
- 
--	/* Now register all the child nodes */
--	of_i2c_register_devices(adap);
--
- 	return 0;
- 
- error_cleanup:
---- a/drivers/i2c/busses/i2c-imx.c
-+++ b/drivers/i2c/busses/i2c-imx.c
-@@ -52,7 +52,6 @@
- #include <linux/slab.h>
- #include <linux/of.h>
- #include <linux/of_device.h>
--#include <linux/of_i2c.h>
- #include <linux/platform_data/i2c-imx.h>
- 
- /** Defines ********************************************************************
-@@ -682,8 +681,6 @@ static int __init i2c_imx_probe(struct p
- 		return ret;
- 	}
- 
--	of_i2c_register_devices(&i2c_imx->adapter);
--
- 	/* Set up platform driver data */
- 	platform_set_drvdata(pdev, i2c_imx);
- 	clk_disable_unprepare(i2c_imx->clk);
---- a/drivers/i2c/busses/i2c-mpc.c
-+++ b/drivers/i2c/busses/i2c-mpc.c
-@@ -18,7 +18,6 @@
- #include <linux/sched.h>
- #include <linux/init.h>
- #include <linux/of_platform.h>
--#include <linux/of_i2c.h>
- #include <linux/slab.h>
- 
- #include <linux/io.h>
-@@ -691,7 +690,6 @@ static int fsl_i2c_probe(struct platform
- 		dev_err(i2c->dev, "failed to add adapter\n");
- 		goto fail_add;
- 	}
--	of_i2c_register_devices(&i2c->adap);
- 
- 	return result;
- 
---- a/drivers/i2c/busses/i2c-mv64xxx.c
-+++ b/drivers/i2c/busses/i2c-mv64xxx.c
-@@ -21,7 +21,6 @@
- #include <linux/of.h>
- #include <linux/of_device.h>
- #include <linux/of_irq.h>
--#include <linux/of_i2c.h>
- #include <linux/clk.h>
- #include <linux/err.h>
- #include <linux/delay.h>
-@@ -871,8 +870,6 @@ mv64xxx_i2c_probe(struct platform_device
- 		goto exit_free_irq;
- 	}
- 
--	of_i2c_register_devices(&drv_data->adapter);
--
- 	return 0;
- 
- exit_free_irq:
---- a/drivers/i2c/busses/i2c-mxs.c
-+++ b/drivers/i2c/busses/i2c-mxs.c
-@@ -28,7 +28,6 @@
- #include <linux/stmp_device.h>
- #include <linux/of.h>
- #include <linux/of_device.h>
--#include <linux/of_i2c.h>
- #include <linux/dma-mapping.h>
- #include <linux/dmaengine.h>
- 
-@@ -707,8 +706,6 @@ static int mxs_i2c_probe(struct platform
- 		return err;
- 	}
- 
--	of_i2c_register_devices(adap);
--
- 	return 0;
- }
- 
---- a/drivers/i2c/busses/i2c-nomadik.c
-+++ b/drivers/i2c/busses/i2c-nomadik.c
-@@ -25,7 +25,6 @@
- #include <linux/pm_runtime.h>
- #include <linux/platform_data/i2c-nomadik.h>
- #include <linux/of.h>
--#include <linux/of_i2c.h>
- #include <linux/pinctrl/consumer.h>
- 
- #define DRIVER_NAME "nmk-i2c"
-@@ -1092,8 +1091,6 @@ static int nmk_i2c_probe(struct amba_dev
- 		goto err_add_adap;
- 	}
- 
--	of_i2c_register_devices(adap);
--
- 	pm_runtime_put(&adev->dev);
- 
- 	return 0;
---- a/drivers/i2c/busses/i2c-ocores.c
-+++ b/drivers/i2c/busses/i2c-ocores.c
-@@ -24,7 +24,6 @@
- #include <linux/i2c-ocores.h>
- #include <linux/slab.h>
- #include <linux/io.h>
--#include <linux/of_i2c.h>
- #include <linux/log2.h>
- 
- struct ocores_i2c {
-@@ -435,8 +434,6 @@ static int ocores_i2c_probe(struct platf
- 	if (pdata) {
- 		for (i = 0; i < pdata->num_devices; i++)
- 			i2c_new_device(&i2c->adap, pdata->devices + i);
--	} else {
--		of_i2c_register_devices(&i2c->adap);
- 	}
- 
- 	return 0;
---- a/drivers/i2c/busses/i2c-octeon.c
-+++ b/drivers/i2c/busses/i2c-octeon.c
-@@ -15,7 +15,6 @@
- #include <linux/interrupt.h>
- #include <linux/kernel.h>
- #include <linux/module.h>
--#include <linux/of_i2c.h>
- #include <linux/delay.h>
- #include <linux/sched.h>
- #include <linux/slab.h>
-@@ -599,8 +598,6 @@ static int octeon_i2c_probe(struct platf
- 	}
- 	dev_info(i2c->dev, "version %s\n", DRV_VERSION);
- 
--	of_i2c_register_devices(&i2c->adap);
--
- 	return 0;
- 
- out:
---- a/drivers/i2c/busses/i2c-omap.c
-+++ b/drivers/i2c/busses/i2c-omap.c
-@@ -38,7 +38,6 @@
- #include <linux/clk.h>
- #include <linux/io.h>
- #include <linux/of.h>
--#include <linux/of_i2c.h>
- #include <linux/of_device.h>
- #include <linux/slab.h>
- #include <linux/i2c-omap.h>
-@@ -1245,8 +1244,6 @@ omap_i2c_probe(struct platform_device *p
- 	dev_info(dev->dev, "bus %d rev%d.%d at %d kHz\n", adap->nr,
- 		 major, minor, dev->speed);
- 
--	of_i2c_register_devices(adap);
--
- 	pm_runtime_mark_last_busy(dev->dev);
- 	pm_runtime_put_autosuspend(dev->dev);
- 
---- a/drivers/i2c/busses/i2c-pnx.c
-+++ b/drivers/i2c/busses/i2c-pnx.c
-@@ -23,7 +23,6 @@
- #include <linux/err.h>
- #include <linux/clk.h>
- #include <linux/slab.h>
--#include <linux/of_i2c.h>
- 
- #define I2C_PNX_TIMEOUT_DEFAULT		10 /* msec */
- #define I2C_PNX_SPEED_KHZ_DEFAULT	100
-@@ -741,8 +740,6 @@ static int i2c_pnx_probe(struct platform
- 		goto out_irq;
- 	}
- 
--	of_i2c_register_devices(&alg_data->adapter);
--
- 	dev_dbg(&pdev->dev, "%s: Master at %#8x, irq %d.\n",
- 		alg_data->adapter.name, res->start, alg_data->irq);
- 
---- a/drivers/i2c/busses/i2c-powermac.c
-+++ b/drivers/i2c/busses/i2c-powermac.c
-@@ -440,7 +440,9 @@ static int i2c_powermac_probe(struct pla
- 	adapter->algo = &i2c_powermac_algorithm;
- 	i2c_set_adapdata(adapter, bus);
- 	adapter->dev.parent = &dev->dev;
--	adapter->dev.of_node = dev->dev.of_node;
-+
-+	/* Clear of_node to skip automatic registration of i2c child nodes */
-+	adapter->dev.of_node = NULL;
- 	rc = i2c_add_adapter(adapter);
- 	if (rc) {
- 		printk(KERN_ERR "i2c-powermac: Adapter %s registration "
-@@ -450,9 +452,8 @@ static int i2c_powermac_probe(struct pla
- 
- 	printk(KERN_INFO "PowerMac i2c bus %s registered\n", adapter->name);
- 
--	/* Cannot use of_i2c_register_devices() due to Apple device-tree
--	 * funkyness
--	 */
-+	/* Use custom child registration due to Apple device-tree funkyness */
-+	adapter->dev.of_node = dev->dev.of_node;
- 	i2c_powermac_register_devices(adapter, bus);
- 
- 	return rc;
---- a/drivers/i2c/busses/i2c-pxa.c
-+++ b/drivers/i2c/busses/i2c-pxa.c
-@@ -31,7 +31,6 @@
- #include <linux/i2c-pxa.h>
- #include <linux/of.h>
- #include <linux/of_device.h>
--#include <linux/of_i2c.h>
- #include <linux/platform_device.h>
- #include <linux/err.h>
- #include <linux/clk.h>
-@@ -1185,7 +1184,6 @@ static int i2c_pxa_probe(struct platform
- 		printk(KERN_INFO "I2C: Failed to add bus\n");
- 		goto eadapt;
- 	}
--	of_i2c_register_devices(&i2c->adap);
- 
- 	platform_set_drvdata(dev, i2c);
- 
---- a/drivers/i2c/busses/i2c-s3c2410.c
-+++ b/drivers/i2c/busses/i2c-s3c2410.c
-@@ -36,7 +36,6 @@
- #include <linux/cpufreq.h>
- #include <linux/slab.h>
- #include <linux/io.h>
--#include <linux/of_i2c.h>
- #include <linux/of_gpio.h>
- #include <linux/pinctrl/consumer.h>
- 
-@@ -1154,7 +1153,6 @@ static int s3c24xx_i2c_probe(struct plat
- 		return ret;
- 	}
- 
--	of_i2c_register_devices(&i2c->adap);
- 	platform_set_drvdata(pdev, i2c);
- 
- 	pm_runtime_enable(&pdev->dev);
---- a/drivers/i2c/busses/i2c-sh_mobile.c
-+++ b/drivers/i2c/busses/i2c-sh_mobile.c
-@@ -27,7 +27,6 @@
- #include <linux/platform_device.h>
- #include <linux/interrupt.h>
- #include <linux/i2c.h>
--#include <linux/of_i2c.h>
- #include <linux/err.h>
- #include <linux/pm_runtime.h>
- #include <linux/clk.h>
-@@ -758,7 +757,6 @@ static int sh_mobile_i2c_probe(struct pl
- 		 "I2C adapter %d with bus speed %lu Hz (L/H=%x/%x)\n",
- 		 adap->nr, pd->bus_speed, pd->iccl, pd->icch);
- 
--	of_i2c_register_devices(adap);
- 	return 0;
- 
-  err_all:
---- a/drivers/i2c/busses/i2c-sirf.c
-+++ b/drivers/i2c/busses/i2c-sirf.c
-@@ -12,7 +12,6 @@
- #include <linux/slab.h>
- #include <linux/platform_device.h>
- #include <linux/i2c.h>
--#include <linux/of_i2c.h>
- #include <linux/clk.h>
- #include <linux/err.h>
- #include <linux/io.h>
-@@ -366,8 +365,6 @@ static int i2c_sirfsoc_probe(struct plat
- 
- 	clk_disable(clk);
- 
--	of_i2c_register_devices(adap);
--
- 	dev_info(&pdev->dev, " I2C adapter ready to operate\n");
- 
- 	return 0;
---- a/drivers/i2c/busses/i2c-stu300.c
-+++ b/drivers/i2c/busses/i2c-stu300.c
-@@ -17,7 +17,6 @@
- #include <linux/clk.h>
- #include <linux/io.h>
- #include <linux/slab.h>
--#include <linux/of_i2c.h>
- 
- /* the name of this kernel module */
- #define NAME "stu300"
-@@ -936,7 +935,6 @@ stu300_probe(struct platform_device *pde
- 	platform_set_drvdata(pdev, dev);
- 	dev_info(&pdev->dev, "ST DDC I2C @ %p, irq %d\n",
- 		 dev->virtbase, dev->irq);
--	of_i2c_register_devices(adap);
- 
- 	return 0;
- }
---- a/drivers/i2c/busses/i2c-tegra.c
-+++ b/drivers/i2c/busses/i2c-tegra.c
-@@ -25,7 +25,6 @@
- #include <linux/interrupt.h>
- #include <linux/delay.h>
- #include <linux/slab.h>
--#include <linux/of_i2c.h>
- #include <linux/of_device.h>
- #include <linux/module.h>
- #include <linux/clk/tegra.h>
-@@ -802,8 +801,6 @@ static int tegra_i2c_probe(struct platfo
- 		return ret;
- 	}
- 
--	of_i2c_register_devices(&i2c_dev->adapter);
--
- 	return 0;
- }
- 
---- a/drivers/i2c/busses/i2c-versatile.c
-+++ b/drivers/i2c/busses/i2c-versatile.c
-@@ -16,7 +16,6 @@
- #include <linux/platform_device.h>
- #include <linux/slab.h>
- #include <linux/io.h>
--#include <linux/of_i2c.h>
- 
- #define I2C_CONTROL	0x00
- #define I2C_CONTROLS	0x00
-@@ -108,7 +107,6 @@ static int i2c_versatile_probe(struct pl
- 	ret = i2c_bit_add_numbered_bus(&i2c->adap);
- 	if (ret >= 0) {
- 		platform_set_drvdata(dev, i2c);
--		of_i2c_register_devices(&i2c->adap);
- 		return 0;
- 	}
- 
---- a/drivers/i2c/busses/i2c-wmt.c
-+++ b/drivers/i2c/busses/i2c-wmt.c
-@@ -21,7 +21,6 @@
- #include <linux/module.h>
- #include <linux/of.h>
- #include <linux/of_address.h>
--#include <linux/of_i2c.h>
- #include <linux/of_irq.h>
- #include <linux/platform_device.h>
- 
-@@ -439,8 +438,6 @@ static int wmt_i2c_probe(struct platform
- 
- 	platform_set_drvdata(pdev, i2c_dev);
- 
--	of_i2c_register_devices(adap);
--
- 	return 0;
- }
- 
---- a/drivers/i2c/busses/i2c-xiic.c
-+++ b/drivers/i2c/busses/i2c-xiic.c
-@@ -40,7 +40,6 @@
- #include <linux/i2c-xiic.h>
- #include <linux/io.h>
- #include <linux/slab.h>
--#include <linux/of_i2c.h>
- 
- #define DRIVER_NAME "xiic-i2c"
- 
-@@ -752,8 +751,6 @@ static int xiic_i2c_probe(struct platfor
- 			i2c_new_device(&i2c->adap, pdata->devices + i);
- 	}
- 
--	of_i2c_register_devices(&i2c->adap);
--
- 	return 0;
- 
- add_adapter_failed:
---- a/drivers/i2c/i2c-core.c
-+++ b/drivers/i2c/i2c-core.c
-@@ -23,7 +23,11 @@
-    SMBus 2.0 support by Mark Studebaker <mdsxyz123@yahoo.com> and
-    Jean Delvare <khali@linux-fr.org>
-    Mux support by Rodolfo Giometti <giometti@enneenne.com> and
--   Michael Lawnick <michael.lawnick.ext@nsn.com> */
-+   Michael Lawnick <michael.lawnick.ext@nsn.com>
-+   OF support is copyright (c) 2008 Jochen Friedrich <jochen@scram.de>
-+   (based on a previous patch from Jon Smirl <jonsmirl@gmail.com>) and
-+   (c) 2013  Wolfram Sang <wsa@the-dreams.de>
-+ */
- 
- #include <linux/module.h>
- #include <linux/kernel.h>
-@@ -35,7 +39,9 @@
- #include <linux/init.h>
- #include <linux/idr.h>
- #include <linux/mutex.h>
-+#include <linux/of.h>
- #include <linux/of_device.h>
-+#include <linux/of_irq.h>
- #include <linux/completion.h>
- #include <linux/hardirq.h>
- #include <linux/irqflags.h>
-@@ -954,6 +960,104 @@ static void i2c_scan_static_board_info(s
- 	up_read(&__i2c_board_lock);
- }
- 
-+/* OF support code */
-+
-+#if IS_ENABLED(CONFIG_OF)
-+static void of_i2c_register_devices(struct i2c_adapter *adap)
-+{
-+	void *result;
-+	struct device_node *node;
-+
-+	/* Only register child devices if the adapter has a node pointer set */
-+	if (!adap->dev.of_node)
-+		return;
-+
-+	dev_dbg(&adap->dev, "of_i2c: walking child nodes\n");
-+
-+	for_each_available_child_of_node(adap->dev.of_node, node) {
-+		struct i2c_board_info info = {};
-+		struct dev_archdata dev_ad = {};
-+		const __be32 *addr;
-+		int len;
-+
-+		dev_dbg(&adap->dev, "of_i2c: register %s\n", node->full_name);
-+
-+		if (of_modalias_node(node, info.type, sizeof(info.type)) < 0) {
-+			dev_err(&adap->dev, "of_i2c: modalias failure on %s\n",
-+				node->full_name);
-+			continue;
-+		}
-+
-+		addr = of_get_property(node, "reg", &len);
-+		if (!addr || (len < sizeof(int))) {
-+			dev_err(&adap->dev, "of_i2c: invalid reg on %s\n",
-+				node->full_name);
-+			continue;
-+		}
-+
-+		info.addr = be32_to_cpup(addr);
-+		if (info.addr > (1 << 10) - 1) {
-+			dev_err(&adap->dev, "of_i2c: invalid addr=%x on %s\n",
-+				info.addr, node->full_name);
-+			continue;
-+		}
-+
-+		info.irq = irq_of_parse_and_map(node, 0);
-+		info.of_node = of_node_get(node);
-+		info.archdata = &dev_ad;
-+
-+		if (of_get_property(node, "wakeup-source", NULL))
-+			info.flags |= I2C_CLIENT_WAKE;
-+
-+		request_module("%s%s", I2C_MODULE_PREFIX, info.type);
-+
-+		result = i2c_new_device(adap, &info);
-+		if (result == NULL) {
-+			dev_err(&adap->dev, "of_i2c: Failure registering %s\n",
-+				node->full_name);
-+			of_node_put(node);
-+			irq_dispose_mapping(info.irq);
-+			continue;
-+		}
-+	}
-+}
-+
-+static int of_dev_node_match(struct device *dev, void *data)
-+{
-+	return dev->of_node == data;
-+}
-+
-+/* must call put_device() when done with returned i2c_client device */
-+struct i2c_client *of_find_i2c_device_by_node(struct device_node *node)
-+{
-+	struct device *dev;
-+
-+	dev = bus_find_device(&i2c_bus_type, NULL, node,
-+					 of_dev_node_match);
-+	if (!dev)
-+		return NULL;
-+
-+	return i2c_verify_client(dev);
-+}
-+EXPORT_SYMBOL(of_find_i2c_device_by_node);
-+
-+/* must call put_device() when done with returned i2c_adapter device */
-+struct i2c_adapter *of_find_i2c_adapter_by_node(struct device_node *node)
-+{
-+	struct device *dev;
-+
-+	dev = bus_find_device(&i2c_bus_type, NULL, node,
-+					 of_dev_node_match);
-+	if (!dev)
-+		return NULL;
-+
-+	return i2c_verify_adapter(dev);
-+}
-+EXPORT_SYMBOL(of_find_i2c_adapter_by_node);
-+#else
-+static void of_i2c_register_devices(struct i2c_adapter *adap) { }
-+#endif /* CONFIG_OF */
-+
- static int i2c_do_add_adapter(struct i2c_driver *driver,
- 			      struct i2c_adapter *adap)
- {
-@@ -1058,6 +1162,8 @@ static int i2c_register_adapter(struct i
- 
- exit_recovery:
- 	/* create pre-declared device nodes */
-+	of_i2c_register_devices(adap);
-+
- 	if (adap->nr < __i2c_first_dynamic_bus_num)
- 		i2c_scan_static_board_info(adap);
- 
-@@ -1282,7 +1388,6 @@ void i2c_del_adapter(struct i2c_adapter
- }
- EXPORT_SYMBOL(i2c_del_adapter);
- 
--
- /* ------------------------------------------------------------------------- */
- 
- int i2c_for_each_dev(void *data, int (*fn)(struct device *, void *))
---- a/drivers/i2c/i2c-mux.c
-+++ b/drivers/i2c/i2c-mux.c
-@@ -25,7 +25,6 @@
- #include <linux/i2c.h>
- #include <linux/i2c-mux.h>
- #include <linux/of.h>
--#include <linux/of_i2c.h>
- 
- /* multiplexer per channel data */
- struct i2c_mux_priv {
-@@ -185,8 +184,6 @@ struct i2c_adapter *i2c_add_mux_adapter(
- 	dev_info(&parent->dev, "Added multiplexed i2c bus %d\n",
- 		 i2c_adapter_id(&priv->adap));
- 
--	of_i2c_register_devices(&priv->adap);
--
- 	return &priv->adap;
- }
- EXPORT_SYMBOL_GPL(i2c_add_mux_adapter);
---- a/drivers/i2c/muxes/i2c-arb-gpio-challenge.c
-+++ b/drivers/i2c/muxes/i2c-arb-gpio-challenge.c
-@@ -21,7 +21,6 @@
- #include <linux/i2c-mux.h>
- #include <linux/init.h>
- #include <linux/module.h>
--#include <linux/of_i2c.h>
- #include <linux/of_gpio.h>
- #include <linux/platform_device.h>
- #include <linux/slab.h>
---- a/drivers/i2c/muxes/i2c-mux-gpio.c
-+++ b/drivers/i2c/muxes/i2c-mux-gpio.c
-@@ -16,7 +16,6 @@
- #include <linux/module.h>
- #include <linux/slab.h>
- #include <linux/gpio.h>
--#include <linux/of_i2c.h>
- #include <linux/of_gpio.h>
- 
- struct gpiomux {
---- a/drivers/i2c/muxes/i2c-mux-pinctrl.c
-+++ b/drivers/i2c/muxes/i2c-mux-pinctrl.c
-@@ -20,7 +20,6 @@
- #include <linux/i2c-mux.h>
- #include <linux/init.h>
- #include <linux/module.h>
--#include <linux/of_i2c.h>
- #include <linux/pinctrl/consumer.h>
- #include <linux/i2c-mux-pinctrl.h>
- #include <linux/platform_device.h>
---- a/drivers/media/platform/exynos4-is/fimc-is-i2c.c
-+++ b/drivers/media/platform/exynos4-is/fimc-is-i2c.c
-@@ -12,7 +12,7 @@
- 
- #include <linux/clk.h>
- #include <linux/module.h>
--#include <linux/of_i2c.h>
-+#include <linux/i2c.h>
- #include <linux/platform_device.h>
- #include <linux/pm_runtime.h>
- #include <linux/slab.h>
-@@ -67,8 +67,6 @@ static int fimc_is_i2c_probe(struct plat
- 	pm_runtime_enable(&pdev->dev);
- 	pm_runtime_enable(&i2c_adap->dev);
- 
--	of_i2c_register_devices(i2c_adap);
--
- 	return 0;
- }
- 
---- a/drivers/media/platform/exynos4-is/fimc-is.c
-+++ b/drivers/media/platform/exynos4-is/fimc-is.c
-@@ -21,7 +21,7 @@
- #include <linux/interrupt.h>
- #include <linux/kernel.h>
- #include <linux/module.h>
--#include <linux/of_i2c.h>
-+#include <linux/i2c.h>
- #include <linux/of_irq.h>
- #include <linux/of_address.h>
- #include <linux/of_platform.h>
---- a/drivers/media/platform/exynos4-is/media-dev.c
-+++ b/drivers/media/platform/exynos4-is/media-dev.c
-@@ -20,7 +20,6 @@
- #include <linux/of.h>
- #include <linux/of_platform.h>
- #include <linux/of_device.h>
--#include <linux/of_i2c.h>
- #include <linux/platform_device.h>
- #include <linux/pm_runtime.h>
- #include <linux/types.h>
---- a/drivers/of/Kconfig
-+++ b/drivers/of/Kconfig
-@@ -48,12 +48,6 @@ config OF_IRQ
- 	def_bool y
- 	depends on !SPARC
- 
--config OF_I2C
--	def_tristate I2C
--	depends on I2C
--	help
--	  OpenFirmware I2C accessors
--
- config OF_NET
- 	depends on NETDEVICES
- 	def_bool y
---- a/drivers/of/Makefile
-+++ b/drivers/of/Makefile
-@@ -3,7 +3,6 @@ obj-$(CONFIG_OF_FLATTREE) += fdt.o
- obj-$(CONFIG_OF_PROMTREE) += pdt.o
- obj-$(CONFIG_OF_ADDRESS)  += address.o
- obj-$(CONFIG_OF_IRQ)    += irq.o
--obj-$(CONFIG_OF_I2C)	+= of_i2c.o
- obj-$(CONFIG_OF_NET)	+= of_net.o
- obj-$(CONFIG_OF_SELFTEST) += selftest.o
- obj-$(CONFIG_OF_MDIO)	+= of_mdio.o
---- a/drivers/of/of_i2c.c
-+++ /dev/null
-@@ -1,114 +0,0 @@
--/*
-- * OF helpers for the I2C API
-- *
-- * Copyright (c) 2008 Jochen Friedrich <jochen@scram.de>
-- *
-- * Based on a previous patch from Jon Smirl <jonsmirl@gmail.com>
-- *
-- * This program is free software; you can redistribute it and/or modify
-- * it under the terms of the GNU General Public License as published by
-- * the Free Software Foundation; either version 2 of the License, or
-- * (at your option) any later version.
-- */
--
--#include <linux/i2c.h>
--#include <linux/irq.h>
--#include <linux/of.h>
--#include <linux/of_i2c.h>
--#include <linux/of_irq.h>
--#include <linux/module.h>
--
--void of_i2c_register_devices(struct i2c_adapter *adap)
--{
--	void *result;
--	struct device_node *node;
--
--	/* Only register child devices if the adapter has a node pointer set */
--	if (!adap->dev.of_node)
--		return;
--
--	dev_dbg(&adap->dev, "of_i2c: walking child nodes\n");
--
--	for_each_available_child_of_node(adap->dev.of_node, node) {
--		struct i2c_board_info info = {};
--		struct dev_archdata dev_ad = {};
--		const __be32 *addr;
--		int len;
--
--		dev_dbg(&adap->dev, "of_i2c: register %s\n", node->full_name);
--
--		if (of_modalias_node(node, info.type, sizeof(info.type)) < 0) {
--			dev_err(&adap->dev, "of_i2c: modalias failure on %s\n",
--				node->full_name);
--			continue;
--		}
--
--		addr = of_get_property(node, "reg", &len);
--		if (!addr || (len < sizeof(int))) {
--			dev_err(&adap->dev, "of_i2c: invalid reg on %s\n",
--				node->full_name);
--			continue;
--		}
--
--		info.addr = be32_to_cpup(addr);
--		if (info.addr > (1 << 10) - 1) {
--			dev_err(&adap->dev, "of_i2c: invalid addr=%x on %s\n",
--				info.addr, node->full_name);
--			continue;
--		}
--
--		info.irq = irq_of_parse_and_map(node, 0);
--		info.of_node = of_node_get(node);
--		info.archdata = &dev_ad;
--
--		if (of_get_property(node, "wakeup-source", NULL))
--			info.flags |= I2C_CLIENT_WAKE;
--
--		request_module("%s%s", I2C_MODULE_PREFIX, info.type);
--
--		result = i2c_new_device(adap, &info);
--		if (result == NULL) {
--			dev_err(&adap->dev, "of_i2c: Failure registering %s\n",
--			        node->full_name);
--			of_node_put(node);
--			irq_dispose_mapping(info.irq);
--			continue;
--		}
--	}
--}
--EXPORT_SYMBOL(of_i2c_register_devices);
--
--static int of_dev_node_match(struct device *dev, void *data)
--{
--        return dev->of_node == data;
--}
--
--/* must call put_device() when done with returned i2c_client device */
--struct i2c_client *of_find_i2c_device_by_node(struct device_node *node)
--{
--	struct device *dev;
--
--	dev = bus_find_device(&i2c_bus_type, NULL, node,
--					 of_dev_node_match);
--	if (!dev)
--		return NULL;
--
--	return i2c_verify_client(dev);
--}
--EXPORT_SYMBOL(of_find_i2c_device_by_node);
--
--/* must call put_device() when done with returned i2c_adapter device */
--struct i2c_adapter *of_find_i2c_adapter_by_node(struct device_node *node)
--{
--	struct device *dev;
--
--	dev = bus_find_device(&i2c_bus_type, NULL, node,
--					 of_dev_node_match);
--	if (!dev)
--		return NULL;
--
--	return i2c_verify_adapter(dev);
--}
--EXPORT_SYMBOL(of_find_i2c_adapter_by_node);
--
--MODULE_LICENSE("GPL");
---- a/drivers/staging/imx-drm/imx-tve.c
-+++ b/drivers/staging/imx-drm/imx-tve.c
-@@ -21,7 +21,7 @@
- #include <linux/clk.h>
- #include <linux/clk-provider.h>
- #include <linux/module.h>
--#include <linux/of_i2c.h>
-+#include <linux/i2c.h>
- #include <linux/regmap.h>
- #include <linux/regulator/consumer.h>
- #include <linux/spinlock.h>
---- a/include/linux/i2c.h
-+++ b/include/linux/i2c.h
-@@ -542,6 +542,26 @@ static inline int i2c_adapter_id(struct
- 
- #endif /* I2C */
- 
-+#if IS_ENABLED(CONFIG_OF)
-+/* must call put_device() when done with returned i2c_client device */
-+extern struct i2c_client *of_find_i2c_device_by_node(struct device_node *node);
-+
-+/* must call put_device() when done with returned i2c_adapter device */
-+extern struct i2c_adapter *of_find_i2c_adapter_by_node(struct device_node *node);
-+
-+#else
-+
-+static inline struct i2c_client *of_find_i2c_device_by_node(struct device_node *node)
-+{
-+	return NULL;
-+}
-+
-+static inline struct i2c_adapter *of_find_i2c_adapter_by_node(struct device_node *node)
-+{
-+	return NULL;
-+}
-+#endif /* CONFIG_OF */
-+
- #if IS_ENABLED(CONFIG_ACPI_I2C)
- extern void acpi_i2c_register_devices(struct i2c_adapter *adap);
- #else
---- a/include/linux/of_i2c.h
-+++ /dev/null
-@@ -1,46 +0,0 @@
--/*
-- * Generic I2C API implementation for PowerPC.
-- *
-- * Copyright (c) 2008 Jochen Friedrich <jochen@scram.de>
-- *
-- * This program is free software; you can redistribute it and/or modify
-- * it under the terms of the GNU General Public License as published by
-- * the Free Software Foundation; either version 2 of the License, or
-- * (at your option) any later version.
-- */
--
--#ifndef __LINUX_OF_I2C_H
--#define __LINUX_OF_I2C_H
--
--#if defined(CONFIG_OF_I2C) || defined(CONFIG_OF_I2C_MODULE)
--#include <linux/i2c.h>
--
--extern void of_i2c_register_devices(struct i2c_adapter *adap);
--
--/* must call put_device() when done with returned i2c_client device */
--extern struct i2c_client *of_find_i2c_device_by_node(struct device_node *node);
--
--/* must call put_device() when done with returned i2c_adapter device */
--extern struct i2c_adapter *of_find_i2c_adapter_by_node(
--						struct device_node *node);
--
--#else
--static inline void of_i2c_register_devices(struct i2c_adapter *adap)
--{
--	return;
--}
--
--static inline struct i2c_client *of_find_i2c_device_by_node(struct device_node *node)
--{
--	return NULL;
--}
--
--/* must call put_device() when done with returned i2c_adapter device */
--static inline struct i2c_adapter *of_find_i2c_adapter_by_node(
--						struct device_node *node)
--{
--	return NULL;
--}
--#endif /* CONFIG_OF_I2C */
--
--#endif /* __LINUX_OF_I2C_H */
---- a/sound/soc/fsl/imx-sgtl5000.c
-+++ b/sound/soc/fsl/imx-sgtl5000.c
-@@ -13,7 +13,7 @@
- #include <linux/module.h>
- #include <linux/of.h>
- #include <linux/of_platform.h>
--#include <linux/of_i2c.h>
-+#include <linux/i2c.h>
- #include <linux/clk.h>
- #include <sound/soc.h>
- 
---- a/sound/soc/fsl/imx-wm8962.c
-+++ b/sound/soc/fsl/imx-wm8962.c
-@@ -15,7 +15,7 @@
- 
- #include <linux/module.h>
- #include <linux/of_platform.h>
--#include <linux/of_i2c.h>
-+#include <linux/i2c.h>
- #include <linux/slab.h>
- #include <linux/clk.h>
- #include <sound/soc.h>
diff --git a/patches.baytrail/1174-i2c-move-ACPI-helpers-into-the-core.patch b/patches.baytrail/1174-i2c-move-ACPI-helpers-into-the-core.patch
deleted file mode 100644
index 345461e580bd2..0000000000000
--- a/patches.baytrail/1174-i2c-move-ACPI-helpers-into-the-core.patch
+++ /dev/null
@@ -1,331 +0,0 @@
-From b87badc7394a9d2455f8b5aad64d1c2227f9c3d8 Mon Sep 17 00:00:00 2001
-From: Mika Westerberg <mika.westerberg@linux.intel.com>
-Date: Wed, 21 Aug 2013 17:28:23 +0300
-Subject: i2c: move ACPI helpers into the core
-
-This follows what has already been done for the DeviceTree helpers. Move
-the ACPI helpers from drivers/acpi/acpi_i2c.c to the I2C core and update
-documentation accordingly.
-
-This also solves a problem reported by Jerry Snitselaar that we can't build
-the ACPI I2C helpers as a module.
-
-Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
-Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
-Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-(cherry picked from commit 55e71edb81b2b45273e7b284cce13ff24bde846f)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- Documentation/acpi/enumeration.txt          |  15 +---
- drivers/acpi/Kconfig                        |   6 --
- drivers/acpi/Makefile                       |   1 -
- drivers/acpi/acpi_i2c.c                     | 103 ----------------------------
- drivers/i2c/busses/i2c-designware-platdrv.c |   1 -
- drivers/i2c/i2c-core.c                      |  91 ++++++++++++++++++++++++
- include/linux/i2c.h                         |   6 --
- 7 files changed, 94 insertions(+), 129 deletions(-)
- delete mode 100644 drivers/acpi/acpi_i2c.c
-
-diff --git a/Documentation/acpi/enumeration.txt b/Documentation/acpi/enumeration.txt
-index 958266efcc20..d977778b5e67 100644
---- a/Documentation/acpi/enumeration.txt
-+++ b/Documentation/acpi/enumeration.txt
-@@ -228,18 +228,9 @@ ACPI handle like:
- I2C serial bus support
- ~~~~~~~~~~~~~~~~~~~~~~
- The slaves behind I2C bus controller only need to add the ACPI IDs like
--with the platform and SPI drivers. However the I2C bus controller driver
--needs to call acpi_i2c_register_devices() after it has added the adapter.
--
--An I2C bus (controller) driver does:
--
--	...
--	ret = i2c_add_numbered_adapter(adapter);
--	if (ret)
--		/* handle error */
--
--	/* Enumerate the slave devices behind this bus via ACPI */
--	acpi_i2c_register_devices(adapter);
-+with the platform and SPI drivers. The I2C core automatically enumerates
-+any slave devices behind the controller device once the adapter is
-+registered.
- 
- Below is an example of how to add ACPI support to the existing mpu3050
- input driver:
-diff --git a/drivers/acpi/Kconfig b/drivers/acpi/Kconfig
-index 100bd724f648..4e0162fa5d36 100644
---- a/drivers/acpi/Kconfig
-+++ b/drivers/acpi/Kconfig
-@@ -180,12 +180,6 @@ config ACPI_DOCK
- 	  This driver supports ACPI-controlled docking stations and removable
- 	  drive bays such as the IBM Ultrabay and the Dell Module Bay.
- 
--config ACPI_I2C
--	def_tristate I2C
--	depends on I2C
--	help
--	  ACPI I2C enumeration support.
--
- config ACPI_PROCESSOR
- 	tristate "Processor"
- 	select THERMAL
-diff --git a/drivers/acpi/Makefile b/drivers/acpi/Makefile
-index 97c949abfabb..98694a673fb7 100644
---- a/drivers/acpi/Makefile
-+++ b/drivers/acpi/Makefile
-@@ -72,7 +72,6 @@ obj-$(CONFIG_ACPI_HED)		+= hed.o
- obj-$(CONFIG_ACPI_EC_DEBUGFS)	+= ec_sys.o
- obj-$(CONFIG_ACPI_CUSTOM_METHOD)+= custom_method.o
- obj-$(CONFIG_ACPI_BGRT)		+= bgrt.o
--obj-$(CONFIG_ACPI_I2C)		+= acpi_i2c.o
- 
- # processor has its own "processor." module_param namespace
- processor-y			:= processor_driver.o processor_throttling.o
-diff --git a/drivers/acpi/acpi_i2c.c b/drivers/acpi/acpi_i2c.c
-deleted file mode 100644
-index a82c7626aa9b..000000000000
---- a/drivers/acpi/acpi_i2c.c
-+++ /dev/null
-@@ -1,103 +0,0 @@
--/*
-- * ACPI I2C enumeration support
-- *
-- * Copyright (C) 2012, Intel Corporation
-- * Author: Mika Westerberg <mika.westerberg@linux.intel.com>
-- *
-- * This program is free software; you can redistribute it and/or modify
-- * it under the terms of the GNU General Public License version 2 as
-- * published by the Free Software Foundation.
-- */
--
--#include <linux/acpi.h>
--#include <linux/device.h>
--#include <linux/export.h>
--#include <linux/i2c.h>
--#include <linux/ioport.h>
--
--ACPI_MODULE_NAME("i2c");
--
--static int acpi_i2c_add_resource(struct acpi_resource *ares, void *data)
--{
--	struct i2c_board_info *info = data;
--
--	if (ares->type == ACPI_RESOURCE_TYPE_SERIAL_BUS) {
--		struct acpi_resource_i2c_serialbus *sb;
--
--		sb = &ares->data.i2c_serial_bus;
--		if (sb->type == ACPI_RESOURCE_SERIAL_TYPE_I2C) {
--			info->addr = sb->slave_address;
--			if (sb->access_mode == ACPI_I2C_10BIT_MODE)
--				info->flags |= I2C_CLIENT_TEN;
--		}
--	} else if (info->irq < 0) {
--		struct resource r;
--
--		if (acpi_dev_resource_interrupt(ares, 0, &r))
--			info->irq = r.start;
--	}
--
--	/* Tell the ACPI core to skip this resource */
--	return 1;
--}
--
--static acpi_status acpi_i2c_add_device(acpi_handle handle, u32 level,
--				       void *data, void **return_value)
--{
--	struct i2c_adapter *adapter = data;
--	struct list_head resource_list;
--	struct i2c_board_info info;
--	struct acpi_device *adev;
--	int ret;
--
--	if (acpi_bus_get_device(handle, &adev))
--		return AE_OK;
--	if (acpi_bus_get_status(adev) || !adev->status.present)
--		return AE_OK;
--
--	memset(&info, 0, sizeof(info));
--	info.acpi_node.handle = handle;
--	info.irq = -1;
--
--	INIT_LIST_HEAD(&resource_list);
--	ret = acpi_dev_get_resources(adev, &resource_list,
--				     acpi_i2c_add_resource, &info);
--	acpi_dev_free_resource_list(&resource_list);
--
--	if (ret < 0 || !info.addr)
--		return AE_OK;
--
--	strlcpy(info.type, dev_name(&adev->dev), sizeof(info.type));
--	if (!i2c_new_device(adapter, &info)) {
--		dev_err(&adapter->dev,
--			"failed to add I2C device %s from ACPI\n",
--			dev_name(&adev->dev));
--	}
--
--	return AE_OK;
--}
--
--/**
-- * acpi_i2c_register_devices - enumerate I2C slave devices behind adapter
-- * @adapter: pointer to adapter
-- *
-- * Enumerate all I2C slave devices behind this adapter by walking the ACPI
-- * namespace. When a device is found it will be added to the Linux device
-- * model and bound to the corresponding ACPI handle.
-- */
--void acpi_i2c_register_devices(struct i2c_adapter *adapter)
--{
--	acpi_handle handle;
--	acpi_status status;
--
--	handle = ACPI_HANDLE(adapter->dev.parent);
--	if (!handle)
--		return;
--
--	status = acpi_walk_namespace(ACPI_TYPE_DEVICE, handle, 1,
--				     acpi_i2c_add_device, NULL,
--				     adapter, NULL);
--	if (ACPI_FAILURE(status))
--		dev_warn(&adapter->dev, "failed to enumerate I2C slaves\n");
--}
--EXPORT_SYMBOL_GPL(acpi_i2c_register_devices);
-diff --git a/drivers/i2c/busses/i2c-designware-platdrv.c b/drivers/i2c/busses/i2c-designware-platdrv.c
-index ded77c3bd59c..6e99d9f56dee 100644
---- a/drivers/i2c/busses/i2c-designware-platdrv.c
-+++ b/drivers/i2c/busses/i2c-designware-platdrv.c
-@@ -171,7 +171,6 @@ static int dw_i2c_probe(struct platform_device *pdev)
- 		dev_err(&pdev->dev, "failure adding adapter\n");
- 		return r;
- 	}
--	acpi_i2c_register_devices(adap);
- 
- 	pm_runtime_set_autosuspend_delay(&pdev->dev, 1000);
- 	pm_runtime_use_autosuspend(&pdev->dev);
-diff --git a/drivers/i2c/i2c-core.c b/drivers/i2c/i2c-core.c
-index 18bdc74fc9ea..a4dfba8ecb2a 100644
---- a/drivers/i2c/i2c-core.c
-+++ b/drivers/i2c/i2c-core.c
-@@ -1058,6 +1058,96 @@ EXPORT_SYMBOL(of_find_i2c_adapter_by_node);
- static void of_i2c_register_devices(struct i2c_adapter *adap) { }
- #endif /* CONFIG_OF */
- 
-+/* ACPI support code */
-+
-+#if IS_ENABLED(CONFIG_ACPI)
-+static int acpi_i2c_add_resource(struct acpi_resource *ares, void *data)
-+{
-+	struct i2c_board_info *info = data;
-+
-+	if (ares->type == ACPI_RESOURCE_TYPE_SERIAL_BUS) {
-+		struct acpi_resource_i2c_serialbus *sb;
-+
-+		sb = &ares->data.i2c_serial_bus;
-+		if (sb->type == ACPI_RESOURCE_SERIAL_TYPE_I2C) {
-+			info->addr = sb->slave_address;
-+			if (sb->access_mode == ACPI_I2C_10BIT_MODE)
-+				info->flags |= I2C_CLIENT_TEN;
-+		}
-+	} else if (info->irq < 0) {
-+		struct resource r;
-+
-+		if (acpi_dev_resource_interrupt(ares, 0, &r))
-+			info->irq = r.start;
-+	}
-+
-+	/* Tell the ACPI core to skip this resource */
-+	return 1;
-+}
-+
-+static acpi_status acpi_i2c_add_device(acpi_handle handle, u32 level,
-+				       void *data, void **return_value)
-+{
-+	struct i2c_adapter *adapter = data;
-+	struct list_head resource_list;
-+	struct i2c_board_info info;
-+	struct acpi_device *adev;
-+	int ret;
-+
-+	if (acpi_bus_get_device(handle, &adev))
-+		return AE_OK;
-+	if (acpi_bus_get_status(adev) || !adev->status.present)
-+		return AE_OK;
-+
-+	memset(&info, 0, sizeof(info));
-+	info.acpi_node.handle = handle;
-+	info.irq = -1;
-+
-+	INIT_LIST_HEAD(&resource_list);
-+	ret = acpi_dev_get_resources(adev, &resource_list,
-+				     acpi_i2c_add_resource, &info);
-+	acpi_dev_free_resource_list(&resource_list);
-+
-+	if (ret < 0 || !info.addr)
-+		return AE_OK;
-+
-+	strlcpy(info.type, dev_name(&adev->dev), sizeof(info.type));
-+	if (!i2c_new_device(adapter, &info)) {
-+		dev_err(&adapter->dev,
-+			"failed to add I2C device %s from ACPI\n",
-+			dev_name(&adev->dev));
-+	}
-+
-+	return AE_OK;
-+}
-+
-+/**
-+ * acpi_i2c_register_devices - enumerate I2C slave devices behind adapter
-+ * @adap: pointer to adapter
-+ *
-+ * Enumerate all I2C slave devices behind this adapter by walking the ACPI
-+ * namespace. When a device is found it will be added to the Linux device
-+ * model and bound to the corresponding ACPI handle.
-+ */
-+static void acpi_i2c_register_devices(struct i2c_adapter *adap)
-+{
-+	acpi_handle handle;
-+	acpi_status status;
-+
-+	handle = ACPI_HANDLE(adap->dev.parent);
-+	if (!handle)
-+		return;
-+
-+	status = acpi_walk_namespace(ACPI_TYPE_DEVICE, handle, 1,
-+				     acpi_i2c_add_device, NULL,
-+				     adap, NULL);
-+	if (ACPI_FAILURE(status))
-+		dev_warn(&adap->dev, "failed to enumerate I2C slaves\n");
-+}
-+#else
-+static inline void acpi_i2c_register_devices(struct i2c_adapter *adap) {}
-+#endif /* CONFIG_ACPI */
-+
- static int i2c_do_add_adapter(struct i2c_driver *driver,
- 			      struct i2c_adapter *adap)
- {
-@@ -1163,6 +1253,7 @@ static int i2c_register_adapter(struct i2c_adapter *adap)
- exit_recovery:
- 	/* create pre-declared device nodes */
- 	of_i2c_register_devices(adap);
-+	acpi_i2c_register_devices(adap);
- 
- 	if (adap->nr < __i2c_first_dynamic_bus_num)
- 		i2c_scan_static_board_info(adap);
-diff --git a/include/linux/i2c.h b/include/linux/i2c.h
-index 21891898ced0..7670d9993840 100644
---- a/include/linux/i2c.h
-+++ b/include/linux/i2c.h
-@@ -562,10 +562,4 @@ static inline struct i2c_adapter *of_find_i2c_adapter_by_node(struct device_node
- }
- #endif /* CONFIG_OF */
- 
--#if IS_ENABLED(CONFIG_ACPI_I2C)
--extern void acpi_i2c_register_devices(struct i2c_adapter *adap);
--#else
--static inline void acpi_i2c_register_devices(struct i2c_adapter *adap) {}
--#endif
--
- #endif /* _LINUX_I2C_H */
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1175-i2c-designware-make-HCNT-LCNT-values-configurable.patch b/patches.baytrail/1175-i2c-designware-make-HCNT-LCNT-values-configurable.patch
deleted file mode 100644
index 98b62ca8721e9..0000000000000
--- a/patches.baytrail/1175-i2c-designware-make-HCNT-LCNT-values-configurable.patch
+++ /dev/null
@@ -1,91 +0,0 @@
-From 58495baf39bccc7c828cd71beb3bfcdaf5a4b9de Mon Sep 17 00:00:00 2001
-From: Mika Westerberg <mika.westerberg@linux.intel.com>
-Date: Mon, 19 Aug 2013 15:07:53 +0300
-Subject: i2c: designware: make HCNT/LCNT values configurable
-
-The DesignWare I2C controller has high count (HCNT) and low count (LCNT)
-registers for each of the I2C speed modes (standard and fast). These
-registers are programmed based on the input clock speed in the driver.
-
-The current code calculates these values based on the input clock speed and
-tries hard to meet the I2C bus timing requirements. This could result
-non-optimal values with regarding to the bus speed. For example on Intel
-BayTrail we get bus speed of 315.41kHz which is ~20% slower than we would
-expect (400kHz) in fast mode (even though the timing requirements are met).
-
-This patch makes it possible for the platform code to pass more optimal
-HCNT/LCNT values to the core driver if they are known beforehand. If these
-are not set we use the calculated and more conservative values.
-
-Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
-Acked-by: Shinya Kuribayashi <skuribay@pobox.com>
-Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-(cherry picked from commit defc0b2fb5221bca847a9adb8159b88bc3c93904)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/i2c/busses/i2c-designware-core.c | 11 +++++++++++
- drivers/i2c/busses/i2c-designware-core.h | 12 ++++++++++++
- 2 files changed, 23 insertions(+)
-
-diff --git a/drivers/i2c/busses/i2c-designware-core.c b/drivers/i2c/busses/i2c-designware-core.c
-index f325ec7abfb1..dbecf08399f8 100644
---- a/drivers/i2c/busses/i2c-designware-core.c
-+++ b/drivers/i2c/busses/i2c-designware-core.c
-@@ -317,6 +317,12 @@ int i2c_dw_init(struct dw_i2c_dev *dev)
- 				47,	/* tLOW = 4.7 us */
- 				3,	/* tf = 0.3 us */
- 				0);	/* No offset */
-+
-+	/* Allow platforms to specify the ideal HCNT and LCNT values */
-+	if (dev->ss_hcnt && dev->ss_lcnt) {
-+		hcnt = dev->ss_hcnt;
-+		lcnt = dev->ss_lcnt;
-+	}
- 	dw_writel(dev, hcnt, DW_IC_SS_SCL_HCNT);
- 	dw_writel(dev, lcnt, DW_IC_SS_SCL_LCNT);
- 	dev_dbg(dev->dev, "Standard-mode HCNT:LCNT = %d:%d\n", hcnt, lcnt);
-@@ -331,6 +337,11 @@ int i2c_dw_init(struct dw_i2c_dev *dev)
- 				13,	/* tLOW = 1.3 us */
- 				3,	/* tf = 0.3 us */
- 				0);	/* No offset */
-+
-+	if (dev->fs_hcnt && dev->fs_lcnt) {
-+		hcnt = dev->fs_hcnt;
-+		lcnt = dev->fs_lcnt;
-+	}
- 	dw_writel(dev, hcnt, DW_IC_FS_SCL_HCNT);
- 	dw_writel(dev, lcnt, DW_IC_FS_SCL_LCNT);
- 	dev_dbg(dev->dev, "Fast-mode HCNT:LCNT = %d:%d\n", hcnt, lcnt);
-diff --git a/drivers/i2c/busses/i2c-designware-core.h b/drivers/i2c/busses/i2c-designware-core.h
-index 912aa2262866..e8a756537ed0 100644
---- a/drivers/i2c/busses/i2c-designware-core.h
-+++ b/drivers/i2c/busses/i2c-designware-core.h
-@@ -61,6 +61,14 @@
-  * @tx_fifo_depth: depth of the hardware tx fifo
-  * @rx_fifo_depth: depth of the hardware rx fifo
-  * @rx_outstanding: current master-rx elements in tx fifo
-+ * @ss_hcnt: standard speed HCNT value
-+ * @ss_lcnt: standard speed LCNT value
-+ * @fs_hcnt: fast speed HCNT value
-+ * @fs_lcnt: fast speed LCNT value
-+ *
-+ * HCNT and LCNT parameters can be used if the platform knows more accurate
-+ * values than the one computed based only on the input clock frequency.
-+ * Leave them to be %0 if not used.
-  */
- struct dw_i2c_dev {
- 	struct device		*dev;
-@@ -91,6 +99,10 @@ struct dw_i2c_dev {
- 	unsigned int		rx_fifo_depth;
- 	int			rx_outstanding;
- 	u32			sda_hold_time;
-+	u16			ss_hcnt;
-+	u16			ss_lcnt;
-+	u16			fs_hcnt;
-+	u16			fs_lcnt;
- };
- 
- #define ACCESS_SWAP		0x00000001
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1176-i2c-designware-get-SDA-hold-time-HCNT-and-LCNT-confi.patch b/patches.baytrail/1176-i2c-designware-get-SDA-hold-time-HCNT-and-LCNT-confi.patch
deleted file mode 100644
index 52afbee632d32..0000000000000
--- a/patches.baytrail/1176-i2c-designware-get-SDA-hold-time-HCNT-and-LCNT-confi.patch
+++ /dev/null
@@ -1,79 +0,0 @@
-From ac3fd52e304d075a9a0cca89e892d29cf276bb79 Mon Sep 17 00:00:00 2001
-From: Mika Westerberg <mika.westerberg@linux.intel.com>
-Date: Mon, 19 Aug 2013 15:07:54 +0300
-Subject: i2c: designware: get SDA hold time, HCNT and LCNT configuration from
- ACPI
-
-Some Intel LPSS I2C devices make the SDA hold time and *CNT parameters
-available via SSCN (standard mode) and FMCN (fast mode) ACPI methods.
-
-Implement support for this so that we check whether an ACPI method exists
-and if it does, fill in the SDA hold time and *CNT values to the device
-private structure for core to use.
-
-Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
-Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-(cherry picked from commit 57cd1e3029e5fb4d238ad11fd0d7ad917179fdf2)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/i2c/busses/i2c-designware-platdrv.c | 34 +++++++++++++++++++++++++++++
- 1 file changed, 34 insertions(+)
-
-diff --git a/drivers/i2c/busses/i2c-designware-platdrv.c b/drivers/i2c/busses/i2c-designware-platdrv.c
-index 6e99d9f56dee..4c1b60539a25 100644
---- a/drivers/i2c/busses/i2c-designware-platdrv.c
-+++ b/drivers/i2c/busses/i2c-designware-platdrv.c
-@@ -53,9 +53,33 @@ static u32 i2c_dw_get_clk_rate_khz(struct dw_i2c_dev *dev)
- }
- 
- #ifdef CONFIG_ACPI
-+static void dw_i2c_acpi_params(struct platform_device *pdev, char method[],
-+			       u16 *hcnt, u16 *lcnt, u32 *sda_hold)
-+{
-+	struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER };
-+	acpi_handle handle = ACPI_HANDLE(&pdev->dev);
-+	union acpi_object *obj;
-+
-+	if (ACPI_FAILURE(acpi_evaluate_object(handle, method, NULL, &buf)))
-+		return;
-+
-+	obj = (union acpi_object *)buf.pointer;
-+	if (obj->type == ACPI_TYPE_PACKAGE && obj->package.count == 3) {
-+		const union acpi_object *objs = obj->package.elements;
-+
-+		*hcnt = (u16)objs[0].integer.value;
-+		*lcnt = (u16)objs[1].integer.value;
-+		if (sda_hold)
-+			*sda_hold = (u32)objs[2].integer.value;
-+	}
-+
-+	kfree(buf.pointer);
-+}
-+
- static int dw_i2c_acpi_configure(struct platform_device *pdev)
- {
- 	struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
-+	bool fs_mode = dev->master_cfg & DW_IC_CON_SPEED_FAST;
- 
- 	if (!ACPI_HANDLE(&pdev->dev))
- 		return -ENODEV;
-@@ -63,6 +87,16 @@ static int dw_i2c_acpi_configure(struct platform_device *pdev)
- 	dev->adapter.nr = -1;
- 	dev->tx_fifo_depth = 32;
- 	dev->rx_fifo_depth = 32;
-+
-+	/*
-+	 * Try to get SDA hold time and *CNT values from an ACPI method if
-+	 * it exists for both supported speed modes.
-+	 */
-+	dw_i2c_acpi_params(pdev, "SSCN", &dev->ss_hcnt, &dev->ss_lcnt,
-+			   fs_mode ? NULL : &dev->sda_hold_time);
-+	dw_i2c_acpi_params(pdev, "FMCN", &dev->fs_hcnt, &dev->fs_lcnt,
-+			   fs_mode ? &dev->sda_hold_time : NULL);
-+
- 	return 0;
- }
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1177-dma-dw-append-MODULE_DEVICE_TABLE-for-ACPI-case.patch b/patches.baytrail/1177-dma-dw-append-MODULE_DEVICE_TABLE-for-ACPI-case.patch
deleted file mode 100644
index 2bb11a2d29466..0000000000000
--- a/patches.baytrail/1177-dma-dw-append-MODULE_DEVICE_TABLE-for-ACPI-case.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From dd10584b00b3eb04f9473cb2cc00bc191d414986 Mon Sep 17 00:00:00 2001
-From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-Date: Mon, 15 Jul 2013 15:04:37 +0300
-Subject: dma: dw: append MODULE_DEVICE_TABLE for ACPI case
-
-In rare cases (mostly for the testing purposes) the dw_dmac driver might be
-compiled as a module as well as the other LPSS device drivers (I2C, SPI,
-HSUART). When udev handles the event of the devices appearing the dw_dmac
-module is missing. This patch will fix that.
-
-Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
-Signed-off-by: Vinod Koul <vinod.koul@intel.com>
-(cherry picked from commit be480dcbb598687584e01156479d5476ca51ca9b)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/dma/dw/platform.c | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/drivers/dma/dw/platform.c b/drivers/dma/dw/platform.c
-index 6c9449cffae8..e35d97590311 100644
---- a/drivers/dma/dw/platform.c
-+++ b/drivers/dma/dw/platform.c
-@@ -253,6 +253,7 @@ static const struct acpi_device_id dw_dma_acpi_id_table[] = {
- 	{ "INTL9C60", 0 },
- 	{ }
- };
-+MODULE_DEVICE_TABLE(acpi, dw_dma_acpi_id_table);
- #endif
- 
- #ifdef CONFIG_PM_SLEEP
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1178-dma-dw-improve-comparison-with-0.patch b/patches.baytrail/1178-dma-dw-improve-comparison-with-0.patch
deleted file mode 100644
index dd76cf7dacaee..0000000000000
--- a/patches.baytrail/1178-dma-dw-improve-comparison-with-0.patch
+++ /dev/null
@@ -1,60 +0,0 @@
-From bf44c3c6ccb3133f86897d44c01142444828064d Mon Sep 17 00:00:00 2001
-From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-Date: Mon, 15 Jul 2013 15:04:38 +0300
-Subject: dma: dw: improve comparison with ~0
-
-In general ~0 does not fit some integer types. Let's do a helper to make a
-comparison with that constant properly.
-
-Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
-Signed-off-by: Vinod Koul <vinod.koul@intel.com>
-(cherry picked from commit 78f3c9d2e0e8c695c7379ed1ed53ea8eaf1da8e6)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/dma/dw/core.c | 16 +++++++++++-----
- 1 file changed, 11 insertions(+), 5 deletions(-)
-
-diff --git a/drivers/dma/dw/core.c b/drivers/dma/dw/core.c
-index eea479c12173..1ed9a9c9194a 100644
---- a/drivers/dma/dw/core.c
-+++ b/drivers/dma/dw/core.c
-@@ -37,16 +37,22 @@
-  * which does not support descriptor writeback.
-  */
- 
-+static inline bool is_request_line_unset(struct dw_dma_chan *dwc)
-+{
-+	return dwc->request_line == (typeof(dwc->request_line))~0;
-+}
-+
- static inline void dwc_set_masters(struct dw_dma_chan *dwc)
- {
- 	struct dw_dma *dw = to_dw_dma(dwc->chan.device);
- 	struct dw_dma_slave *dws = dwc->chan.private;
- 	unsigned char mmax = dw->nr_masters - 1;
- 
--	if (dwc->request_line == ~0) {
--		dwc->src_master = min_t(unsigned char, mmax, dwc_get_sms(dws));
--		dwc->dst_master = min_t(unsigned char, mmax, dwc_get_dms(dws));
--	}
-+	if (!is_request_line_unset(dwc))
-+		return;
-+
-+	dwc->src_master = min_t(unsigned char, mmax, dwc_get_sms(dws));
-+	dwc->dst_master = min_t(unsigned char, mmax, dwc_get_dms(dws));
- }
- 
- #define DWC_DEFAULT_CTLLO(_chan) ({				\
-@@ -984,7 +990,7 @@ set_runtime_config(struct dma_chan *chan, struct dma_slave_config *sconfig)
- 	dwc->direction = sconfig->direction;
- 
- 	/* Take the request line from slave_id member */
--	if (dwc->request_line == ~0)
-+	if (is_request_line_unset(dwc))
- 		dwc->request_line = sconfig->slave_id;
- 
- 	convert_burst(&dwc->dma_sconfig.src_maxburst);
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1179-dma-dw-allow-shared-interrupts.patch b/patches.baytrail/1179-dma-dw-allow-shared-interrupts.patch
deleted file mode 100644
index 7b9f28c1cf426..0000000000000
--- a/patches.baytrail/1179-dma-dw-allow-shared-interrupts.patch
+++ /dev/null
@@ -1,52 +0,0 @@
-From fbd58cd179ccd8386c3d1bd7af647173d81c9f59 Mon Sep 17 00:00:00 2001
-From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-Date: Mon, 15 Jul 2013 15:04:39 +0300
-Subject: dma: dw: allow shared interrupts
-
-In the PC world is quite possible that devices are sharing the same interrupt
-line. The patch prepares dw_dmac driver to such cases.
-
-Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
-Signed-off-by: Vinod Koul <vinod.koul@intel.com>
-(cherry picked from commit 3783cef876e0f24e93a11f1a76cc0b3fe7ea8d94)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/dma/dw/core.c | 13 ++++++++-----
- 1 file changed, 8 insertions(+), 5 deletions(-)
-
-diff --git a/drivers/dma/dw/core.c b/drivers/dma/dw/core.c
-index 1ed9a9c9194a..6932645ca1f8 100644
---- a/drivers/dma/dw/core.c
-+++ b/drivers/dma/dw/core.c
-@@ -650,10 +650,13 @@ static void dw_dma_tasklet(unsigned long data)
- static irqreturn_t dw_dma_interrupt(int irq, void *dev_id)
- {
- 	struct dw_dma *dw = dev_id;
--	u32 status;
-+	u32 status = dma_readl(dw, STATUS_INT);
- 
--	dev_vdbg(dw->dma.dev, "%s: status=0x%x\n", __func__,
--			dma_readl(dw, STATUS_INT));
-+	dev_vdbg(dw->dma.dev, "%s: status=0x%x\n", __func__, status);
-+
-+	/* Check if we have any interrupt from the DMAC */
-+	if (!status)
-+		return IRQ_NONE;
- 
- 	/*
- 	 * Just disable the interrupts. We'll turn them back on in the
-@@ -1566,8 +1569,8 @@ int dw_dma_probe(struct dw_dma_chip *chip, struct dw_dma_platform_data *pdata)
- 	/* Disable BLOCK interrupts as well */
- 	channel_clear_bit(dw, MASK.BLOCK, dw->all_chan_mask);
- 
--	err = devm_request_irq(chip->dev, chip->irq, dw_dma_interrupt, 0,
--			       "dw_dmac", dw);
-+	err = devm_request_irq(chip->dev, chip->irq, dw_dma_interrupt,
-+			       IRQF_SHARED, "dw_dmac", dw);
- 	if (err)
- 		return err;
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1180-dma-dw-return-DMA_SUCCESS-immediately-from-device_tx.patch b/patches.baytrail/1180-dma-dw-return-DMA_SUCCESS-immediately-from-device_tx.patch
deleted file mode 100644
index ec2ac3df59c34..0000000000000
--- a/patches.baytrail/1180-dma-dw-return-DMA_SUCCESS-immediately-from-device_tx.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From 3111cd6391841f69d8d2d964bf8391167381a1d4 Mon Sep 17 00:00:00 2001
-From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-Date: Mon, 15 Jul 2013 15:04:40 +0300
-Subject: dma: dw: return DMA_SUCCESS immediately from device_tx_status()
-
-There is no point to go throught the rest of the function if first call to
-dma_cookie_status() returned DMA_SUCCESS.
-
-Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
-Signed-off-by: Vinod Koul <vinod.koul@intel.com>
-(cherry picked from commit 12381dc0c764ecd1703adc6d23c869006223dab8)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/dma/dw/core.c | 8 ++++----
- 1 file changed, 4 insertions(+), 4 deletions(-)
-
-diff --git a/drivers/dma/dw/core.c b/drivers/dma/dw/core.c
-index 6932645ca1f8..5f2ee5ff8fa4 100644
---- a/drivers/dma/dw/core.c
-+++ b/drivers/dma/dw/core.c
-@@ -1098,12 +1098,12 @@ dwc_tx_status(struct dma_chan *chan,
- 	enum dma_status		ret;
- 
- 	ret = dma_cookie_status(chan, cookie, txstate);
--	if (ret != DMA_SUCCESS) {
--		dwc_scan_descriptors(to_dw_dma(chan->device), dwc);
-+	if (ret == DMA_SUCCESS)
-+		return ret;
- 
--		ret = dma_cookie_status(chan, cookie, txstate);
--	}
-+	dwc_scan_descriptors(to_dw_dma(chan->device), dwc);
- 
-+	ret = dma_cookie_status(chan, cookie, txstate);
- 	if (ret != DMA_SUCCESS)
- 		dma_set_residue(txstate, dwc_get_residue(dwc));
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1181-dma-dw-return-DMA_PAUSED-only-if-cookie-status-is-DM.patch b/patches.baytrail/1181-dma-dw-return-DMA_PAUSED-only-if-cookie-status-is-DM.patch
deleted file mode 100644
index c2f96b8ef7b40..0000000000000
--- a/patches.baytrail/1181-dma-dw-return-DMA_PAUSED-only-if-cookie-status-is-DM.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From a83b181758823e015e52b1ee825875ab5371904d Mon Sep 17 00:00:00 2001
-From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-Date: Mon, 15 Jul 2013 15:04:41 +0300
-Subject: dma: dw: return DMA_PAUSED only if cookie status is DMA_IN_PROGRESS
-
-To obey a usual practice let's return DMA_PAUSED status only if
-dma_cookie_status returned DMA_IN_PROGRESS.
-
-Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-Signed-off-by: Vinod Koul <vinod.koul@intel.com>
-(cherry picked from commit effd5cf6fe71f5efaf59917e7090a3a1f3eabee5)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/dma/dw/core.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/dma/dw/core.c b/drivers/dma/dw/core.c
-index 5f2ee5ff8fa4..89eb89f22284 100644
---- a/drivers/dma/dw/core.c
-+++ b/drivers/dma/dw/core.c
-@@ -1107,7 +1107,7 @@ dwc_tx_status(struct dma_chan *chan,
- 	if (ret != DMA_SUCCESS)
- 		dma_set_residue(txstate, dwc_get_residue(dwc));
- 
--	if (dwc->paused)
-+	if (dwc->paused && ret == DMA_IN_PROGRESS)
- 		return DMA_PAUSED;
- 
- 	return ret;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1182-x86-intel-lpss-Add-pin-control-support-to-Intel-low-.patch b/patches.baytrail/1182-x86-intel-lpss-Add-pin-control-support-to-Intel-low-.patch
deleted file mode 100644
index 2b6b1e72b99a8..0000000000000
--- a/patches.baytrail/1182-x86-intel-lpss-Add-pin-control-support-to-Intel-low-.patch
+++ /dev/null
@@ -1,46 +0,0 @@
-From 8ea4c070f29260d8bf2cb6f86bd8c23283c8a8cb Mon Sep 17 00:00:00 2001
-From: Mathias Nyman <mathias.nyman@linux.intel.com>
-Date: Fri, 13 Sep 2013 17:02:29 +0300
-Subject: x86/intel/lpss: Add pin control support to Intel low power subsystem
-
-x86 chips with LPSS (low power subsystem) such as Lynxpoint and
-Baytrail have SoC like peripheral support and controllable pins.
-
-At the moment, Baytrail needs the pinctrl-baytrail driver to let
-peripherals control their gpio resources, but more pincontrol
-functions such as pin muxing and grouping are possible to add
-later.
-
-Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com>
-Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
-Cc: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
-Link: http://lkml.kernel.org/r/1379080949-21734-1-git-send-email-mathias.nyman@linux.intel.com
-Signed-off-by: Ingo Molnar <mingo@kernel.org>
-(cherry picked from commit 0f531431d3de88efb4234d6c0ce22089ec035a38)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- arch/x86/Kconfig | 5 +++--
- 1 file changed, 3 insertions(+), 2 deletions(-)
-
-diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
-index fe120da25625..cd3939ffd9bb 100644
---- a/arch/x86/Kconfig
-+++ b/arch/x86/Kconfig
-@@ -471,11 +471,12 @@ config X86_INTEL_LPSS
- 	bool "Intel Low Power Subsystem Support"
- 	depends on ACPI
- 	select COMMON_CLK
-+	select PINCTRL
- 	---help---
- 	  Select to build support for Intel Low Power Subsystem such as
- 	  found on Intel Lynxpoint PCH. Selecting this option enables
--	  things like clock tree (common clock framework) which are needed
--	  by the LPSS peripheral drivers.
-+	  things like clock tree (common clock framework) and pincontrol
-+	  which are needed by the LPSS peripheral drivers.
- 
- config X86_RDC321X
- 	bool "RDC R-321x SoC"
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1183-i2c-designware-10-bit-addressing-mode-enabling-if-I2.patch b/patches.baytrail/1183-i2c-designware-10-bit-addressing-mode-enabling-if-I2.patch
deleted file mode 100644
index f8f107c6523cb..0000000000000
--- a/patches.baytrail/1183-i2c-designware-10-bit-addressing-mode-enabling-if-I2.patch
+++ /dev/null
@@ -1,80 +0,0 @@
-From b37119cfa1a026a1c3830ede600e44d002b7ab2e Mon Sep 17 00:00:00 2001
-From: "Chew, Chiau Ee" <chiau.ee.chew@intel.com>
-Date: Fri, 27 Sep 2013 02:57:35 +0800
-Subject: i2c: designware: 10-bit addressing mode enabling if
- I2C_DYNAMIC_TAR_UPDATE is set
-
-According to Designware I2C spec, if I2C_DYNAMIC_TAR_UPDATE is set to 1,
-the 10-bit addressing mode is controlled by IC_10BITADDR_MASTER bit of
-IC_TAR register instead of IC_CON register. The IC_10BITADDR_MASTER
-in IC_CON register becomes read-only copy. Since I2C_DYNAMIC_TAR_UPDATE
-value can't be detected from hardware register, so we will always set the
-IC_10BITADDR_MASTER bit in both IC_CON and IC_TAR register whenever 10-bit
-addresing mode is requested by user application.
-
-Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
-Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
-Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-(cherry picked from commit bd63ace4dc4290165bbf3bf546eba50453d0aa9d)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/i2c/busses/i2c-designware-core.c | 26 ++++++++++++++++++++------
- 1 file changed, 20 insertions(+), 6 deletions(-)
-
-diff --git a/drivers/i2c/busses/i2c-designware-core.c b/drivers/i2c/busses/i2c-designware-core.c
-index dbecf08399f8..5888feef1ac5 100644
---- a/drivers/i2c/busses/i2c-designware-core.c
-+++ b/drivers/i2c/busses/i2c-designware-core.c
-@@ -98,6 +98,8 @@
- 
- #define DW_IC_ERR_TX_ABRT	0x1
- 
-+#define DW_IC_TAR_10BITADDR_MASTER BIT(12)
-+
- /*
-  * status codes
-  */
-@@ -388,22 +390,34 @@ static int i2c_dw_wait_bus_not_busy(struct dw_i2c_dev *dev)
- static void i2c_dw_xfer_init(struct dw_i2c_dev *dev)
- {
- 	struct i2c_msg *msgs = dev->msgs;
--	u32 ic_con;
-+	u32 ic_con, ic_tar = 0;
- 
- 	/* Disable the adapter */
- 	__i2c_dw_enable(dev, false);
- 
--	/* set the slave (target) address */
--	dw_writel(dev, msgs[dev->msg_write_idx].addr, DW_IC_TAR);
--
- 	/* if the slave address is ten bit address, enable 10BITADDR */
- 	ic_con = dw_readl(dev, DW_IC_CON);
--	if (msgs[dev->msg_write_idx].flags & I2C_M_TEN)
-+	if (msgs[dev->msg_write_idx].flags & I2C_M_TEN) {
- 		ic_con |= DW_IC_CON_10BITADDR_MASTER;
--	else
-+		/*
-+		 * If I2C_DYNAMIC_TAR_UPDATE is set, the 10-bit addressing
-+		 * mode has to be enabled via bit 12 of IC_TAR register.
-+		 * We set it always as I2C_DYNAMIC_TAR_UPDATE can't be
-+		 * detected from registers.
-+		 */
-+		ic_tar = DW_IC_TAR_10BITADDR_MASTER;
-+	} else {
- 		ic_con &= ~DW_IC_CON_10BITADDR_MASTER;
-+	}
-+
- 	dw_writel(dev, ic_con, DW_IC_CON);
- 
-+	/*
-+	 * Set the slave (target) address and enable 10-bit addressing mode
-+	 * if applicable.
-+	 */
-+	dw_writel(dev, msgs[dev->msg_write_idx].addr | ic_tar, DW_IC_TAR);
-+
- 	/* Enable the adapter */
- 	__i2c_dw_enable(dev, true);
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1184-i2c-i2c-imx-replace-platform_driver_probe-to-support.patch b/patches.baytrail/1184-i2c-i2c-imx-replace-platform_driver_probe-to-support.patch
deleted file mode 100644
index 486c47d54b4c8..0000000000000
--- a/patches.baytrail/1184-i2c-i2c-imx-replace-platform_driver_probe-to-support.patch
+++ /dev/null
@@ -1,75 +0,0 @@
-From 1f79ddbbd72521794155cd79c2e5a41221d75a69 Mon Sep 17 00:00:00 2001
-From: Wolfram Sang <wsa@the-dreams.de>
-Date: Tue, 8 Oct 2013 22:35:34 +0200
-Subject: i2c: i2c-imx: replace platform_driver_probe to support deferred
- probing
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Subsystems like pinctrl and gpio rightfully make use of deferred probing at
-core level. Now, deferred drivers won't be retried if they don't have a .probe
-function specified in the driver struct. Fix this driver to have that, so the
-devices it supports won't get lost in a deferred probe.
-
-Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
-Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-(cherry picked from commit 3611431ce7281a6542d47bd5b2fc2206fed5749f)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/i2c/busses/i2c-imx.c | 11 ++++++-----
- 1 file changed, 6 insertions(+), 5 deletions(-)
-
-diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c
-index ccf46656bdad..1d7efa3169cd 100644
---- a/drivers/i2c/busses/i2c-imx.c
-+++ b/drivers/i2c/busses/i2c-imx.c
-@@ -365,7 +365,7 @@ static void i2c_imx_stop(struct imx_i2c_struct *i2c_imx)
- 	clk_disable_unprepare(i2c_imx->clk);
- }
- 
--static void __init i2c_imx_set_clk(struct imx_i2c_struct *i2c_imx,
-+static void i2c_imx_set_clk(struct imx_i2c_struct *i2c_imx,
- 							unsigned int rate)
- {
- 	struct imx_i2c_clk_pair *i2c_clk_div = i2c_imx->hwdata->clk_div;
-@@ -589,7 +589,7 @@ static struct i2c_algorithm i2c_imx_algo = {
- 	.functionality	= i2c_imx_func,
- };
- 
--static int __init i2c_imx_probe(struct platform_device *pdev)
-+static int i2c_imx_probe(struct platform_device *pdev)
- {
- 	const struct of_device_id *of_id = of_match_device(i2c_imx_dt_ids,
- 							   &pdev->dev);
-@@ -697,7 +697,7 @@ static int __init i2c_imx_probe(struct platform_device *pdev)
- 	return 0;   /* Return OK */
- }
- 
--static int __exit i2c_imx_remove(struct platform_device *pdev)
-+static int i2c_imx_remove(struct platform_device *pdev)
- {
- 	struct imx_i2c_struct *i2c_imx = platform_get_drvdata(pdev);
- 
-@@ -715,7 +715,8 @@ static int __exit i2c_imx_remove(struct platform_device *pdev)
- }
- 
- static struct platform_driver i2c_imx_driver = {
--	.remove		= __exit_p(i2c_imx_remove),
-+	.probe = i2c_imx_probe,
-+	.remove = i2c_imx_remove,
- 	.driver	= {
- 		.name	= DRIVER_NAME,
- 		.owner	= THIS_MODULE,
-@@ -726,7 +727,7 @@ static struct platform_driver i2c_imx_driver = {
- 
- static int __init i2c_adap_imx_init(void)
- {
--	return platform_driver_probe(&i2c_imx_driver, i2c_imx_probe);
-+	return platform_driver_register(&i2c_imx_driver);
- }
- subsys_initcall(i2c_adap_imx_init);
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1185-serial-8250_dw-don-t-limit-DMA-support-to-ACPI.patch b/patches.baytrail/1185-serial-8250_dw-don-t-limit-DMA-support-to-ACPI.patch
deleted file mode 100644
index f3e30c58f76ee..0000000000000
--- a/patches.baytrail/1185-serial-8250_dw-don-t-limit-DMA-support-to-ACPI.patch
+++ /dev/null
@@ -1,72 +0,0 @@
-From bec65954c2918c1a826fc21b29e41b788d2a0f86 Mon Sep 17 00:00:00 2001
-From: Heikki Krogerus <heikki.krogerus@linux.intel.com>
-Date: Thu, 5 Sep 2013 17:34:53 +0300
-Subject: serial: 8250_dw: don't limit DMA support to ACPI
-
-It should be available for DT users as well. This does not
-enable DMA by default except with ACPI. DT users can enable
-DMA based on a property.
-
-Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit fe95855539fd0a0e54412efc596adfe802a5c605)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/tty/serial/8250/8250_dw.c | 20 ++++++++++----------
- 1 file changed, 10 insertions(+), 10 deletions(-)
-
-diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c
-index daf710f5c3fc..d7a405b12600 100644
---- a/drivers/tty/serial/8250/8250_dw.c
-+++ b/drivers/tty/serial/8250/8250_dw.c
-@@ -56,11 +56,12 @@
- 
- 
- struct dw8250_data {
--	int		last_lcr;
--	int		last_mcr;
--	int		line;
--	struct clk	*clk;
--	u8		usr_reg;
-+	u8			usr_reg;
-+	int			last_lcr;
-+	int			last_mcr;
-+	int			line;
-+	struct clk		*clk;
-+	struct uart_8250_dma	dma;
- };
- 
- static inline int dw8250_modify_msr(struct uart_port *p, int offset, int value)
-@@ -241,7 +242,8 @@ static int dw8250_probe_of(struct uart_port *p,
- }
- 
- #ifdef CONFIG_ACPI
--static int dw8250_probe_acpi(struct uart_8250_port *up)
-+static int dw8250_probe_acpi(struct uart_8250_port *up,
-+			     struct dw8250_data *data)
- {
- 	const struct acpi_device_id *id;
- 	struct uart_port *p = &up->port;
-@@ -260,9 +262,7 @@ static int dw8250_probe_acpi(struct uart_8250_port *up)
- 	if (!p->uartclk)
- 		p->uartclk = (unsigned int)id->driver_data;
- 
--	up->dma = devm_kzalloc(p->dev, sizeof(*up->dma), GFP_KERNEL);
--	if (!up->dma)
--		return -ENOMEM;
-+	up->dma = &data->dma;
- 
- 	up->dma->rxconf.src_maxburst = p->fifosize / 4;
- 	up->dma->txconf.dst_maxburst = p->fifosize / 4;
-@@ -324,7 +324,7 @@ static int dw8250_probe(struct platform_device *pdev)
- 		if (err)
- 			return err;
- 	} else if (ACPI_HANDLE(&pdev->dev)) {
--		err = dw8250_probe_acpi(&uart);
-+		err = dw8250_probe_acpi(&uart, data);
- 		if (err)
- 			return err;
- 	} else {
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1186-serial-8250_dw-provide-a-filter-for-DMA-channel-dete.patch b/patches.baytrail/1186-serial-8250_dw-provide-a-filter-for-DMA-channel-dete.patch
deleted file mode 100644
index 956c72bc62f89..0000000000000
--- a/patches.baytrail/1186-serial-8250_dw-provide-a-filter-for-DMA-channel-dete.patch
+++ /dev/null
@@ -1,54 +0,0 @@
-From 1015acd59f4143b31c38d6b91e878e15c02de363 Mon Sep 17 00:00:00 2001
-From: Heikki Krogerus <heikki.krogerus@linux.intel.com>
-Date: Thu, 5 Sep 2013 17:34:54 +0300
-Subject: serial: 8250_dw: provide a filter for DMA channel detection
-
-The channel IDs are set to -1 by default. It will prevent
-dmaengine from trying to provide the first free channel if
-it fails to allocate exclusive channel. This will fix an
-issue with ACPI enumerated UARTs that do not support DMA
-but still end up getting a DMA channel incorrectly.
-
-Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 7fb8c56c7fa0fa11168d3788d4591951bec27f4b)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/tty/serial/8250/8250_dw.c | 14 ++++++++++++++
- 1 file changed, 14 insertions(+)
-
-diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c
-index d7a405b12600..8edf7697fdb2 100644
---- a/drivers/tty/serial/8250/8250_dw.c
-+++ b/drivers/tty/serial/8250/8250_dw.c
-@@ -154,6 +154,14 @@ dw8250_do_pm(struct uart_port *port, unsigned int state, unsigned int old)
- 		pm_runtime_put_sync_suspend(port->dev);
- }
- 
-+static bool dw8250_dma_filter(struct dma_chan *chan, void *param)
-+{
-+	struct dw8250_data *data = param;
-+
-+	return chan->chan_id == data->dma.tx_chan_id ||
-+	       chan->chan_id == data->dma.rx_chan_id;
-+}
-+
- static void dw8250_setup_port(struct uart_8250_port *up)
- {
- 	struct uart_port	*p = &up->port;
-@@ -314,6 +322,12 @@ static int dw8250_probe(struct platform_device *pdev)
- 		uart.port.uartclk = clk_get_rate(data->clk);
- 	}
- 
-+	data->dma.rx_chan_id = -1;
-+	data->dma.tx_chan_id = -1;
-+	data->dma.rx_param = data;
-+	data->dma.tx_param = data;
-+	data->dma.fn = dw8250_dma_filter;
-+
- 	uart.port.iotype = UPIO_MEM;
- 	uart.port.serial_in = dw8250_serial_in;
- 	uart.port.serial_out = dw8250_serial_out;
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1187-serial-8250_dw-fix-broken-function-call.patch b/patches.baytrail/1187-serial-8250_dw-fix-broken-function-call.patch
deleted file mode 100644
index 3586742831d39..0000000000000
--- a/patches.baytrail/1187-serial-8250_dw-fix-broken-function-call.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From dd4d6c1aed59617635c5410735eee656667dff5b Mon Sep 17 00:00:00 2001
-From: Heikki Krogerus <heikki.krogerus@linux.intel.com>
-Date: Fri, 27 Sep 2013 10:21:07 +0300
-Subject: serial: 8250_dw: fix broken function call
-
-The stub for dw8250_probe_acpi() is missing an argument.
-
-Reported-by: kbuild test robot <fengguang.wu@intel.com>
-Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 058555739166561b97313123521574f0a9b2c9d7)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/tty/serial/8250/8250_dw.c | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c
-index 8edf7697fdb2..d04a037d6b6f 100644
---- a/drivers/tty/serial/8250/8250_dw.c
-+++ b/drivers/tty/serial/8250/8250_dw.c
-@@ -278,7 +278,8 @@ static int dw8250_probe_acpi(struct uart_8250_port *up,
- 	return 0;
- }
- #else
--static inline int dw8250_probe_acpi(struct uart_8250_port *up)
-+static inline int dw8250_probe_acpi(struct uart_8250_port *up,
-+				    struct dw8250_data *data)
- {
- 	return -ENODEV;
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1188-ACPI-LPSS-fix-UART-Auto-Flow-Control.patch b/patches.baytrail/1188-ACPI-LPSS-fix-UART-Auto-Flow-Control.patch
deleted file mode 100644
index 081b49568f65d..0000000000000
--- a/patches.baytrail/1188-ACPI-LPSS-fix-UART-Auto-Flow-Control.patch
+++ /dev/null
@@ -1,56 +0,0 @@
-From d9c65fdf2fc84e48d8c7a248ba00515f35e68f46 Mon Sep 17 00:00:00 2001
-From: Heikki Krogerus <heikki.krogerus@linux.intel.com>
-Date: Wed, 9 Oct 2013 09:49:20 +0300
-Subject: ACPI / LPSS: fix UART Auto Flow Control
-
-There is an additional bit in the GENERAL register on newer
-silicon that needs to be set or UART's RTS pin fails to
-reflect the flow control settings in the Modem Control
-Register.
-
-This will fix an issue where the RTS pin of the UART stays
-always at 1.8V, regardless of the register settings.
-
-Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
-Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
-(cherry picked from commit 088f1fd267c7f43b5d87850a0fa0c7e851ecae97)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/acpi/acpi_lpss.c | 12 +++++++++---
- 1 file changed, 9 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/acpi/acpi_lpss.c b/drivers/acpi/acpi_lpss.c
-index fb78bb9ad8f6..d3961014aad7 100644
---- a/drivers/acpi/acpi_lpss.c
-+++ b/drivers/acpi/acpi_lpss.c
-@@ -30,6 +30,7 @@ ACPI_MODULE_NAME("acpi_lpss");
- /* Offsets relative to LPSS_PRIVATE_OFFSET */
- #define LPSS_GENERAL			0x08
- #define LPSS_GENERAL_LTR_MODE_SW	BIT(2)
-+#define LPSS_GENERAL_UART_RTS_OVRD	BIT(3)
- #define LPSS_SW_LTR			0x10
- #define LPSS_AUTO_LTR			0x14
- #define LPSS_TX_INT			0x20
-@@ -68,11 +69,16 @@ struct lpss_private_data {
- 
- static void lpss_uart_setup(struct lpss_private_data *pdata)
- {
--	unsigned int tx_int_offset = pdata->dev_desc->prv_offset + LPSS_TX_INT;
-+	unsigned int offset;
- 	u32 reg;
- 
--	reg = readl(pdata->mmio_base + tx_int_offset);
--	writel(reg | LPSS_TX_INT_MASK, pdata->mmio_base + tx_int_offset);
-+	offset = pdata->dev_desc->prv_offset + LPSS_TX_INT;
-+	reg = readl(pdata->mmio_base + offset);
-+	writel(reg | LPSS_TX_INT_MASK, pdata->mmio_base + offset);
-+
-+	offset = pdata->dev_desc->prv_offset + LPSS_GENERAL;
-+	reg = readl(pdata->mmio_base + offset);
-+	writel(reg | LPSS_GENERAL_UART_RTS_OVRD, pdata->mmio_base + offset);
- }
- 
- static struct lpss_device_desc lpt_dev_desc = {
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1189-ACPI-LPSS-add-ACPI-IDs-for-newer-Intel-PCHs.patch b/patches.baytrail/1189-ACPI-LPSS-add-ACPI-IDs-for-newer-Intel-PCHs.patch
deleted file mode 100644
index 231b6c5f3ba5f..0000000000000
--- a/patches.baytrail/1189-ACPI-LPSS-add-ACPI-IDs-for-newer-Intel-PCHs.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From ddbd1b010e6c39363b90b448c96c21d212a9a2ab Mon Sep 17 00:00:00 2001
-From: Mika Westerberg <mika.westerberg@linux.intel.com>
-Date: Tue, 12 Nov 2013 11:48:19 +0200
-Subject: ACPI / LPSS: add ACPI IDs for newer Intel PCHs
-
-Some recent Intel PCHs with LPSS have different ACPI IDs for the LPSS
-devices, so add these to the list as well.
-
-Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
-Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
-(cherry picked from commit a4d97536a1a20a70a65ded5d445013a3904d5a8d)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/acpi/acpi_lpss.c | 9 +++++++++
- 1 file changed, 9 insertions(+)
-
-diff --git a/drivers/acpi/acpi_lpss.c b/drivers/acpi/acpi_lpss.c
-index d3961014aad7..6745fe137b9e 100644
---- a/drivers/acpi/acpi_lpss.c
-+++ b/drivers/acpi/acpi_lpss.c
-@@ -163,6 +163,15 @@ static const struct acpi_device_id acpi_lpss_device_ids[] = {
- 	{ "80860F41", (unsigned long)&byt_i2c_dev_desc },
- 	{ "INT33B2", },
- 
-+	{ "INT3430", (unsigned long)&lpt_dev_desc },
-+	{ "INT3431", (unsigned long)&lpt_dev_desc },
-+	{ "INT3432", (unsigned long)&lpt_dev_desc },
-+	{ "INT3433", (unsigned long)&lpt_dev_desc },
-+	{ "INT3434", (unsigned long)&lpt_uart_dev_desc },
-+	{ "INT3435", (unsigned long)&lpt_uart_dev_desc },
-+	{ "INT3436", (unsigned long)&lpt_sdio_dev_desc },
-+	{ "INT3437", },
-+
- 	{ }
- };
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1190-spi-pxa2xx-Restore-private-register-bits.patch b/patches.baytrail/1190-spi-pxa2xx-Restore-private-register-bits.patch
deleted file mode 100644
index 9b1fde0fd95fd..0000000000000
--- a/patches.baytrail/1190-spi-pxa2xx-Restore-private-register-bits.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From 0c6289844900ff73daf8d162b442abd4d335df77 Mon Sep 17 00:00:00 2001
-From: "Chew, Chiau Ee" <chiau.ee.chew@intel.com>
-Date: Fri, 29 Nov 2013 02:13:11 +0800
-Subject: spi/pxa2xx: Restore private register bits.
-
-The Intel LPSS SPI private register bits have to be restored
-when system resume from S3 suspend.
-
-Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
-Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
-Signed-off-by: Mark Brown <broonie@linaro.org>
-(cherry picked from commit c50325f7bcb8a3ceaacb9dbc41180b1cbbae7b5e)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/spi/spi-pxa2xx.c | 3 +++
- 1 file changed, 3 insertions(+)
-
-diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c
-index 91969629d864..c5e4dcd105f9 100644
---- a/drivers/spi/spi-pxa2xx.c
-+++ b/drivers/spi/spi-pxa2xx.c
-@@ -1318,6 +1318,9 @@ static int pxa2xx_spi_resume(struct device *dev)
- 	/* Enable the SSP clock */
- 	clk_prepare_enable(ssp->clk);
- 
-+	/* Restore LPSS private register bits */
-+	lpss_ssp_setup(drv_data);
-+
- 	/* Start the queue running */
- 	status = spi_master_resume(drv_data->master);
- 	if (status != 0) {
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1191-ARM-EXYNOS-Select-PINCTRL_EXYNOS-for-exynos4-5-at-ch.patch b/patches.baytrail/1191-ARM-EXYNOS-Select-PINCTRL_EXYNOS-for-exynos4-5-at-ch.patch
deleted file mode 100644
index 7a3e4605a543a..0000000000000
--- a/patches.baytrail/1191-ARM-EXYNOS-Select-PINCTRL_EXYNOS-for-exynos4-5-at-ch.patch
+++ /dev/null
@@ -1,108 +0,0 @@
-From cb1c7e098d1fe8fe8d3a79d6f8c65f18488cecad Mon Sep 17 00:00:00 2001
-From: Doug Anderson <dianders@chromium.org>
-Date: Mon, 10 Jun 2013 18:26:53 +0900
-Subject: ARM: EXYNOS: Select PINCTRL_EXYNOS for exynos4/5 at chip level
-
-Previously if you had MACH_EXYNOS5_DT but not MACH_EXYNOS4_DT you'd be
-missing the pincontrol definitions.  Move PINCTRL selects to the arch
-level since we should be enabling the code for all exynos variants.
-
-Update the PINCTRL descriptions to indicate that PINCTRL_EXYNOS is not
-for exynos5440.  Also add basic dependencies for the PINCTRL_EXYNOS
-kernel config.
-
-Signed-off-by: Doug Anderson <dianders@chromium.org>
-Acked-by: Linus Walleij <linus.walleij@linaro.org>
-Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
-(cherry picked from commit 83978253d0c3e12bf81d4b5f419a0200d5cb19a6)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- arch/arm/mach-exynos/Kconfig |    9 ++++++---
- drivers/pinctrl/Kconfig      |    5 +++--
- 2 files changed, 9 insertions(+), 5 deletions(-)
-
---- a/arch/arm/mach-exynos/Kconfig
-+++ b/arch/arm/mach-exynos/Kconfig
-@@ -17,6 +17,7 @@ config ARCH_EXYNOS4
- 	select HAVE_ARM_SCU if SMP
- 	select HAVE_SMP
- 	select MIGHT_HAVE_CACHE_L2X0
-+	select PINCTRL
- 	help
- 	  Samsung EXYNOS4 SoCs based systems
- 
-@@ -24,6 +25,7 @@ config ARCH_EXYNOS5
- 	bool "SAMSUNG EXYNOS5"
- 	select HAVE_ARM_SCU if SMP
- 	select HAVE_SMP
-+	select PINCTRL
- 	help
- 	  Samsung EXYNOS5 (Cortex-A15) SoC based systems
- 
-@@ -34,6 +36,7 @@ config CPU_EXYNOS4210
- 	default y
- 	depends on ARCH_EXYNOS4
- 	select ARM_CPU_SUSPEND if PM
-+	select PINCTRL_EXYNOS
- 	select PM_GENERIC_DOMAINS
- 	select S5P_PM if PM
- 	select S5P_SLEEP if PM
-@@ -45,6 +48,7 @@ config SOC_EXYNOS4212
- 	bool "SAMSUNG EXYNOS4212"
- 	default y
- 	depends on ARCH_EXYNOS4
-+	select PINCTRL_EXYNOS
- 	select S5P_PM if PM
- 	select S5P_SLEEP if PM
- 	select SAMSUNG_DMADEV
-@@ -55,6 +59,7 @@ config SOC_EXYNOS4412
- 	bool "SAMSUNG EXYNOS4412"
- 	default y
- 	depends on ARCH_EXYNOS4
-+	select PINCTRL_EXYNOS
- 	select SAMSUNG_DMADEV
- 	help
- 	  Enable EXYNOS4412 SoC support
-@@ -63,6 +68,7 @@ config SOC_EXYNOS5250
- 	bool "SAMSUNG EXYNOS5250"
- 	default y
- 	depends on ARCH_EXYNOS5
-+	select PINCTRL_EXYNOS
- 	select PM_GENERIC_DOMAINS if PM
- 	select S5P_PM if PM
- 	select S5P_SLEEP if PM
-@@ -78,7 +84,6 @@ config SOC_EXYNOS5440
- 	select ARCH_HAS_OPP
- 	select HAVE_ARM_ARCH_TIMER
- 	select AUTO_ZRELADDR
--	select PINCTRL
- 	select PINCTRL_EXYNOS5440
- 	select PM_OPP
- 	help
-@@ -413,8 +418,6 @@ config MACH_EXYNOS4_DT
- 	select CLKSRC_SAMSUNG_PWM if CPU_EXYNOS4210
- 	select CPU_EXYNOS4210
- 	select KEYBOARD_SAMSUNG if INPUT_KEYBOARD
--	select PINCTRL
--	select PINCTRL_EXYNOS
- 	select S5P_DEV_MFC
- 	select USE_OF
- 	help
---- a/drivers/pinctrl/Kconfig
-+++ b/drivers/pinctrl/Kconfig
-@@ -219,12 +219,13 @@ config PINCTRL_SAMSUNG
- 	select PINCONF
- 
- config PINCTRL_EXYNOS
--	bool "Pinctrl driver data for Samsung EXYNOS SoCs"
--	depends on OF && GPIOLIB
-+	bool "Pinctrl driver data for Samsung EXYNOS SoCs other than 5440"
-+	depends on OF && GPIOLIB && ARCH_EXYNOS
- 	select PINCTRL_SAMSUNG
- 
- config PINCTRL_EXYNOS5440
- 	bool "Samsung EXYNOS5440 SoC pinctrl driver"
-+	depends on SOC_EXYNOS5440
- 	select PINMUX
- 	select PINCONF
- 
diff --git a/patches.baytrail/1192-radeon-Switch-to-arch_phys_wc_add-and-add-a-missing-.patch b/patches.baytrail/1192-radeon-Switch-to-arch_phys_wc_add-and-add-a-missing-.patch
deleted file mode 100644
index d9659799112a6..0000000000000
--- a/patches.baytrail/1192-radeon-Switch-to-arch_phys_wc_add-and-add-a-missing-.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From 10b47bb6fb59ce70dfc72b44b3010144a30a49ba Mon Sep 17 00:00:00 2001
-From: Andy Lutomirski <luto@amacapital.net>
-Date: Mon, 13 May 2013 23:58:45 +0000
-Subject: radeon: Switch to arch_phys_wc_add and add a missing ..._del
-
-Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Signed-off-by: Andy Lutomirski <luto@amacapital.net>
-Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit 07ebea251d08ae851d501f7402359f053d038862)
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpu/drm/radeon/radeon_object.c | 5 +++--
- 1 file changed, 3 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/radeon/radeon_object.c b/drivers/gpu/drm/radeon/radeon_object.c
-index 1424ccde2377..07af5a95bb62 100644
---- a/drivers/gpu/drm/radeon/radeon_object.c
-+++ b/drivers/gpu/drm/radeon/radeon_object.c
-@@ -322,8 +322,8 @@ int radeon_bo_init(struct radeon_device *rdev)
- {
- 	/* Add an MTRR for the VRAM */
- 	if (!rdev->fastfb_working) {
--		rdev->mc.vram_mtrr = mtrr_add(rdev->mc.aper_base, rdev->mc.aper_size,
--			MTRR_TYPE_WRCOMB, 1);
-+		rdev->mc.vram_mtrr = arch_phys_wc_add(rdev->mc.aper_base,
-+						      rdev->mc.aper_size);
- 	}
- 	DRM_INFO("Detected VRAM RAM=%lluM, BAR=%lluM\n",
- 		rdev->mc.mc_vram_size >> 20,
-@@ -336,6 +336,7 @@ int radeon_bo_init(struct radeon_device *rdev)
- void radeon_bo_fini(struct radeon_device *rdev)
- {
- 	radeon_ttm_fini(rdev);
-+	arch_phys_wc_del(rdev->mc.vram_mtrr);
- }
- 
- void radeon_bo_list_add_object(struct radeon_bo_list *lobj,
--- 
-1.8.5.rc3
-
diff --git a/patches.baytrail/1193-PENDING-mmc-sdhci-pci-Fix-BYT-sd-card-getting-stuck-.patch b/patches.baytrail/1193-PENDING-mmc-sdhci-pci-Fix-BYT-sd-card-getting-stuck-.patch
deleted file mode 100644
index 2093fc7949e1f..0000000000000
--- a/patches.baytrail/1193-PENDING-mmc-sdhci-pci-Fix-BYT-sd-card-getting-stuck-.patch
+++ /dev/null
@@ -1,80 +0,0 @@
-From 8ba911fd25c8f41979533f6911f8221181fcefae Mon Sep 17 00:00:00 2001
-From: Adrian Hunter <adrian.hunter@intel.com>
-Date: Fri, 13 Dec 2013 13:57:34 -0800
-Subject: PENDING: mmc: sdhci-pci: Fix BYT sd card getting stuck in runtime
- suspend
-
-A host controller for a SD card may need a GPIO
-for card detect in order to wake up from runtime
-suspend when a card is inserted.  If that GPIO is
-not configured, then the host controller will not
-wake up.  Fix that for the affected devices by not
-enabling runtime PM unless the GPIO is successfully
-set up.
-
-This affects BYT sd card host controller which had
-runtime PM enabled from v3.11.  For completeness,
-the MFD sd card host controller is flagged also.
-
-Tested on v3.11.10 and v3.12.4 although the patch
-applies with some offsets and fuzz.
-
-Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
-
-From http://marc.info/?l=linux-mmc&m=138676702327057
-Do not apply the following without this patch:
-
-7396e318b497cd46eb156effa5278126582ddde7
-"mmc: sdhci-pci: support runtime PM for BYT SD cards"
-
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/mmc/host/sdhci-pci.c | 11 +++++++++++
- 1 file changed, 11 insertions(+)
-
-diff --git a/drivers/mmc/host/sdhci-pci.c b/drivers/mmc/host/sdhci-pci.c
-index d7d6bc8968d2..33593e7a6457 100644
---- a/drivers/mmc/host/sdhci-pci.c
-+++ b/drivers/mmc/host/sdhci-pci.c
-@@ -59,6 +59,7 @@ struct sdhci_pci_fixes {
- 	unsigned int		quirks;
- 	unsigned int		quirks2;
- 	bool			allow_runtime_pm;
-+	bool			own_cd_for_runtime_pm;
- 
- 	int			(*probe) (struct sdhci_pci_chip *);
- 
-@@ -290,6 +291,7 @@ static const struct sdhci_pci_fixes sdhci_intel_mrst_hc1_hc2 = {
- static const struct sdhci_pci_fixes sdhci_intel_mfd_sd = {
- 	.quirks		= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
- 	.allow_runtime_pm = true,
-+	.own_cd_for_runtime_pm = true,
- };
- 
- static const struct sdhci_pci_fixes sdhci_intel_mfd_sdio = {
-@@ -354,6 +356,7 @@ static const struct sdhci_pci_fixes sdhci_intel_byt_sdio = {
- static const struct sdhci_pci_fixes sdhci_intel_byt_sd = {
- 	.quirks2	= SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON,
- 	.allow_runtime_pm = true,
-+	.own_cd_for_runtime_pm = true,
- };
- 
- /* O2Micro extra registers */
-@@ -1381,6 +1384,14 @@ static struct sdhci_pci_slot *sdhci_pci_probe_slot(
- 
- 	sdhci_pci_add_own_cd(slot);
- 
-+	/*
-+	 * Check if the chip needs a separate GPIO for card detect to wake up
-+	 * from runtime suspend.  If it is not there, don't allow runtime PM.
-+	 * Note sdhci_pci_add_own_cd() sets slot->cd_gpio to -EINVAL on failure.
-+	 */
-+	if (chip->fixes->own_cd_for_runtime_pm && !gpio_is_valid(slot->cd_gpio))
-+		chip->allow_runtime_pm = false;
-+
- 	return slot;
- 
- remove:
--- 
-1.8.5.rc3
-
diff --git a/patches.fixes/0001-drm-remove-FASYNC-support.patch b/patches.fixes/0001-drm-remove-FASYNC-support.patch
deleted file mode 100644
index f1122a3f1c038..0000000000000
--- a/patches.fixes/0001-drm-remove-FASYNC-support.patch
+++ /dev/null
@@ -1,75 +0,0 @@
-From 8ce19085d46b638b8f476acd0c041f4153cbc82b Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Sun, 2 Feb 2014 10:14:51 +0900
-Subject: drm: remove FASYNC support
-
-So I've stumbled over drm_fasync and wondered what it does. Digging
-that up is quite a story.
-
-First I've had to read up on what this does and ended up being rather
-bewildered why peopled loved signals so much back in the days that
-they've created SIGIO just for that ...
-
-Then I wondered how this ever works, and what that strange "No-op."
-comment right above it should mean. After all calling the core fasync
-helper is pretty obviously not a noop. After reading through the
-kernels FASYNC implementation I've noticed that signals are only sent
-out to the processes attached with FASYNC by calling kill_fasync.
-
-No merged drm driver has ever done that.
-
-After more digging I've found out that the only driver that ever used
-this is the so called GAMMA driver. I've frankly never heard of such a
-gpu brand ever before. Now FASYNC seems to not have been the only bad
-thing with that driver, since Dave Airlie removed it from the drm
-driver with prejudice:
-
-commit 1430163b4bbf7b00367ea1066c1c5fe85dbeefed
-Author: Dave Airlie <airlied@linux.ie>
-Date:   Sun Aug 29 12:04:35 2004 +0000
-
-    Drop GAMMA DRM from a great height ...
-
-Long story short, the drm fasync support seems to be doing absolutely
-nothing. And the only user of it was never merged into the upstream
-kernel. And we don't need any fops->fasync callback since the fcntl
-implementation in the kernel already implements the noop case
-correctly.
-
-So stop this particular cargo-cult and rip it all out.
-
-v2: Kill drm_fasync assignments in rcar (newly added) and imx drivers
-(somehow I've missed that one in staging). Also drop the reference in
-the drm DocBook. ARM compile-fail reported by Rob Clark.
-
-v3: Move the removal of dev->buf_asnyc assignment in drm_setup to this
-patch here.
-
-v4: Actually git add ... tsk.
-
-Cc: Dave Airlie <airlied@linux.ie>
-Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Cc: Rob Clark <robdclark@gmail.com>
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Reviewed-by: David Herrmann <dh.herrmann@gmail.com>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit b0e898ac555e96e7863a5ee95d70f3625f1db5e2)
-Signed-off-by: Simon Horman <horms@verge.net.au>
-
-Conflicts:
-	drivers/gpu/drm/drm_fops.c
----
- drivers/gpu/drm/rcar-du/rcar_du_drv.c |    1 -
- 1 file changed, 1 deletion(-)
-
---- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-@@ -148,7 +148,6 @@ static const struct file_operations rcar
- #endif
- 	.poll		= drm_poll,
- 	.read		= drm_read,
--	.fasync		= drm_fasync,
- 	.llseek		= no_llseek,
- 	.mmap		= drm_gem_cma_mmap,
- };
diff --git a/patches.fixes/0002-drm-Pass-page-flip-ioctl-flags-to-driver.patch b/patches.fixes/0002-drm-Pass-page-flip-ioctl-flags-to-driver.patch
deleted file mode 100644
index afd1eb6524e94..0000000000000
--- a/patches.fixes/0002-drm-Pass-page-flip-ioctl-flags-to-driver.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 85a417a308fd9798dfb7929f1abddd16006bf43b Mon Sep 17 00:00:00 2001
-From: Keith Packard <keithp@keithp.com>
-Date: Sun, 2 Feb 2014 10:14:52 +0900
-Subject: drm: Pass page flip ioctl flags to driver
-
-This lets drivers see the flags requested by the application
-
-[airlied: fixup for rcar/imx/msm]
-
-Signed-off-by: Keith Packard <keithp@keithp.com>
-Signed-off-by: Dave Airlie <airlied@gmail.com>
-(cherry picked from commit ed8d19756e80ec63003a93aa4d70406e6ba61522)
-Signed-off-by: Simon Horman <horms@verge.net.au>
-
-Conflicts:
-	drivers/gpu/drm/msm/mdp4/mdp4_crtc.c
----
- drivers/gpu/drm/rcar-du/rcar_du_crtc.c | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
-index 33df7a583143..a9d24e4bf792 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
-@@ -497,7 +497,8 @@ static irqreturn_t rcar_du_crtc_irq(int irq, void *arg)
- 
- static int rcar_du_crtc_page_flip(struct drm_crtc *crtc,
- 				  struct drm_framebuffer *fb,
--				  struct drm_pending_vblank_event *event)
-+				  struct drm_pending_vblank_event *event,
-+				  uint32_t page_flip_flags)
- {
- 	struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);
- 	struct drm_device *dev = rcrtc->crtc.dev;
--- 
-1.8.5.1.163.gd7aced9
-
diff --git a/patches.fixes/0003-drm-gem-create-drm_gem_dumb_destroy.patch b/patches.fixes/0003-drm-gem-create-drm_gem_dumb_destroy.patch
deleted file mode 100644
index 06a2312eff4e8..0000000000000
--- a/patches.fixes/0003-drm-gem-create-drm_gem_dumb_destroy.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-From 5720c96c9efcaecaee29e8876c661049541eefc8 Mon Sep 17 00:00:00 2001
-From: Daniel Vetter <daniel.vetter@ffwll.ch>
-Date: Sun, 2 Feb 2014 10:14:53 +0900
-Subject: drm/gem: create drm_gem_dumb_destroy
-
-All the gem based kms drivers really want the same function to
-destroy a dumb framebuffer backing storage object.
-
-So give it to them and roll it out in all drivers.
-
-This still leaves the option open for kms drivers which don't use GEM
-for backing storage, but it does decently simplify matters for gem
-drivers.
-
-Acked-by: Inki Dae <inki.dae@samsung.com>
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Cc: Intel Graphics Development <intel-gfx@lists.freedesktop.org>
-Cc: Ben Skeggs <skeggsb@gmail.com>
-Reviwed-by: Rob Clark <robdclark@gmail.com>
-Cc: Alex Deucher <alexdeucher@gmail.com>
-Acked-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit 43387b37fa2d0f368142b8fa8c9440da92e5381b)
-Signed-off-by: Simon Horman <horms@verge.net.au>
-
-Conflicts:
-	drivers/gpu/drm/drm_gem.c
----
- drivers/gpu/drm/rcar-du/rcar_du_drv.c |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-@@ -169,7 +169,7 @@ static struct drm_driver rcar_du_driver
- 	.gem_prime_export	= drm_gem_cma_dmabuf_export,
- 	.dumb_create		= rcar_du_dumb_create,
- 	.dumb_map_offset	= drm_gem_cma_dumb_map_offset,
--	.dumb_destroy		= drm_gem_cma_dumb_destroy,
-+	.dumb_destroy		= drm_gem_dumb_destroy,
- 	.fops			= &rcar_du_fops,
- 	.name			= "rcar-du",
- 	.desc			= "Renesas R-Car Display Unit",
diff --git a/patches.fixes/0004-drm-cma-add-low-level-hook-functions-to-use-prime-he.patch b/patches.fixes/0004-drm-cma-add-low-level-hook-functions-to-use-prime-he.patch
deleted file mode 100644
index 12c65df6ed81b..0000000000000
--- a/patches.fixes/0004-drm-cma-add-low-level-hook-functions-to-use-prime-he.patch
+++ /dev/null
@@ -1,119 +0,0 @@
-From 1aec88544f02dc2c28fc34658b8d4b414490d96b Mon Sep 17 00:00:00 2001
-From: Joonyoung Shim <jy0922.shim@samsung.com>
-Date: Sun, 2 Feb 2014 10:14:54 +0900
-Subject: drm/cma: add low-level hook functions to use prime helpers
-
-Instead of using the dma_buf functionality for GEM CMA, we can use prime
-helpers if we can provide low-level hook functions for GEM CMA.
-
-Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit 78467dc5f70fb9bee4a32c0c3714c99b0b5465c7)
-Signed-off-by: Simon Horman <horms@verge.net.au>
----
- drivers/gpu/drm/drm_gem_cma_helper.c |   79 +++++++++++++++++++++++++++++++++++
- include/drm/drm_gem_cma_helper.h     |    9 +++
- 2 files changed, 88 insertions(+)
-
---- a/drivers/gpu/drm/drm_gem_cma_helper.c
-+++ b/drivers/gpu/drm/drm_gem_cma_helper.c
-@@ -586,3 +586,82 @@ error_gem_free:
- 	return ERR_PTR(ret);
- }
- EXPORT_SYMBOL_GPL(drm_gem_cma_dmabuf_import);
-+
-+/* low-level interface prime helpers */
-+struct sg_table *drm_gem_cma_prime_get_sg_table(struct drm_gem_object *obj)
-+{
-+	struct drm_gem_cma_object *cma_obj = to_drm_gem_cma_obj(obj);
-+	struct sg_table *sgt;
-+	int ret;
-+
-+	sgt = kzalloc(sizeof(*sgt), GFP_KERNEL);
-+	if (!sgt)
-+		return NULL;
-+
-+	ret = dma_get_sgtable(obj->dev->dev, sgt, cma_obj->vaddr,
-+			      cma_obj->paddr, obj->size);
-+	if (ret < 0)
-+		goto out;
-+
-+	return sgt;
-+
-+out:
-+	kfree(sgt);
-+	return NULL;
-+}
-+EXPORT_SYMBOL_GPL(drm_gem_cma_prime_get_sg_table);
-+
-+struct drm_gem_object *
-+drm_gem_cma_prime_import_sg_table(struct drm_device *dev, size_t size,
-+				  struct sg_table *sgt)
-+{
-+	struct drm_gem_cma_object *cma_obj;
-+
-+	if (sgt->nents != 1)
-+		return ERR_PTR(-EINVAL);
-+
-+	/* Create a CMA GEM buffer. */
-+	cma_obj = __drm_gem_cma_create(dev, size);
-+	if (IS_ERR(cma_obj))
-+		return ERR_PTR(PTR_ERR(cma_obj));
-+
-+	cma_obj->paddr = sg_dma_address(sgt->sgl);
-+	cma_obj->sgt = sgt;
-+
-+	DRM_DEBUG_PRIME("dma_addr = 0x%x, size = %zu\n", cma_obj->paddr, size);
-+
-+	return &cma_obj->base;
-+}
-+EXPORT_SYMBOL_GPL(drm_gem_cma_prime_import_sg_table);
-+
-+int drm_gem_cma_prime_mmap(struct drm_gem_object *obj,
-+			   struct vm_area_struct *vma)
-+{
-+	struct drm_gem_cma_object *cma_obj;
-+	struct drm_device *dev = obj->dev;
-+	int ret;
-+
-+	mutex_lock(&dev->struct_mutex);
-+	ret = drm_gem_mmap_obj(obj, obj->size, vma);
-+	mutex_unlock(&dev->struct_mutex);
-+	if (ret < 0)
-+		return ret;
-+
-+	cma_obj = to_drm_gem_cma_obj(obj);
-+	return drm_gem_cma_mmap_obj(cma_obj, vma);
-+}
-+EXPORT_SYMBOL_GPL(drm_gem_cma_prime_mmap);
-+
-+void *drm_gem_cma_prime_vmap(struct drm_gem_object *obj)
-+{
-+	struct drm_gem_cma_object *cma_obj = to_drm_gem_cma_obj(obj);
-+
-+	return cma_obj->vaddr;
-+}
-+EXPORT_SYMBOL_GPL(drm_gem_cma_prime_vmap);
-+
-+void drm_gem_cma_prime_vunmap(struct drm_gem_object *obj, void *vaddr)
-+{
-+	/* Nothing to do */
-+}
-+EXPORT_SYMBOL_GPL(drm_gem_cma_prime_vunmap);
---- a/include/drm/drm_gem_cma_helper.h
-+++ b/include/drm/drm_gem_cma_helper.h
-@@ -46,4 +46,13 @@ struct dma_buf *drm_gem_cma_dmabuf_expor
- struct drm_gem_object *drm_gem_cma_dmabuf_import(struct drm_device *drm_dev,
- 						 struct dma_buf *dma_buf);
- 
-+struct sg_table *drm_gem_cma_prime_get_sg_table(struct drm_gem_object *obj);
-+struct drm_gem_object *
-+drm_gem_cma_prime_import_sg_table(struct drm_device *dev, size_t size,
-+				  struct sg_table *sgt);
-+int drm_gem_cma_prime_mmap(struct drm_gem_object *obj,
-+			   struct vm_area_struct *vma);
-+void *drm_gem_cma_prime_vmap(struct drm_gem_object *obj);
-+void drm_gem_cma_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
-+
- #endif /* __DRM_GEM_CMA_HELPER_H__ */
diff --git a/patches.fixes/0005-drm-cma-remove-GEM-CMA-specific-dma_buf-functionalit.patch b/patches.fixes/0005-drm-cma-remove-GEM-CMA-specific-dma_buf-functionalit.patch
deleted file mode 100644
index 3570bb397736d..0000000000000
--- a/patches.fixes/0005-drm-cma-remove-GEM-CMA-specific-dma_buf-functionalit.patch
+++ /dev/null
@@ -1,327 +0,0 @@
-From 16eb9670cdfb37e23ed88f81e0574194bffc786a Mon Sep 17 00:00:00 2001
-From: Joonyoung Shim <jy0922.shim@samsung.com>
-Date: Sun, 2 Feb 2014 10:14:55 +0900
-Subject: drm/cma: remove GEM CMA specific dma_buf functionality
-
-We can use prime helpers instead.
-
-Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit 6d35dea107834eb549c1fba28fea6ec39c81d0ba)
-Signed-off-by: Simon Horman <horms@verge.net.au>
-
-Conflicts:
-	drivers/gpu/drm/drm_gem_cma_helper.c
----
- drivers/gpu/drm/drm_gem_cma_helper.c |  283 -----------------------------------
- include/drm/drm_gem_cma_helper.h     |    6 
- 2 files changed, 289 deletions(-)
-
---- a/drivers/gpu/drm/drm_gem_cma_helper.c
-+++ b/drivers/gpu/drm/drm_gem_cma_helper.c
-@@ -304,289 +304,6 @@ void drm_gem_cma_describe(struct drm_gem
- EXPORT_SYMBOL_GPL(drm_gem_cma_describe);
- #endif
- 
--/* -----------------------------------------------------------------------------
-- * DMA-BUF
-- */
--
--struct drm_gem_cma_dmabuf_attachment {
--	struct sg_table sgt;
--	enum dma_data_direction dir;
--};
--
--static int drm_gem_cma_dmabuf_attach(struct dma_buf *dmabuf, struct device *dev,
--				     struct dma_buf_attachment *attach)
--{
--	struct drm_gem_cma_dmabuf_attachment *cma_attach;
--
--	cma_attach = kzalloc(sizeof(*cma_attach), GFP_KERNEL);
--	if (!cma_attach)
--		return -ENOMEM;
--
--	cma_attach->dir = DMA_NONE;
--	attach->priv = cma_attach;
--
--	return 0;
--}
--
--static void drm_gem_cma_dmabuf_detach(struct dma_buf *dmabuf,
--				      struct dma_buf_attachment *attach)
--{
--	struct drm_gem_cma_dmabuf_attachment *cma_attach = attach->priv;
--	struct sg_table *sgt;
--
--	if (cma_attach == NULL)
--		return;
--
--	sgt = &cma_attach->sgt;
--
--	if (cma_attach->dir != DMA_NONE)
--		dma_unmap_sg(attach->dev, sgt->sgl, sgt->nents,
--				cma_attach->dir);
--
--	sg_free_table(sgt);
--	kfree(cma_attach);
--	attach->priv = NULL;
--}
--
--static struct sg_table *
--drm_gem_cma_dmabuf_map(struct dma_buf_attachment *attach,
--		       enum dma_data_direction dir)
--{
--	struct drm_gem_cma_dmabuf_attachment *cma_attach = attach->priv;
--	struct drm_gem_cma_object *cma_obj = attach->dmabuf->priv;
--	struct drm_device *drm = cma_obj->base.dev;
--	struct scatterlist *rd, *wr;
--	struct sg_table *sgt;
--	unsigned int i;
--	int nents, ret;
--
--	DRM_DEBUG_PRIME("\n");
--
--	if (WARN_ON(dir == DMA_NONE))
--		return ERR_PTR(-EINVAL);
--
--	/* Return the cached mapping when possible. */
--	if (cma_attach->dir == dir)
--		return &cma_attach->sgt;
--
--	/* Two mappings with different directions for the same attachment are
--	 * not allowed.
--	 */
--	if (WARN_ON(cma_attach->dir != DMA_NONE))
--		return ERR_PTR(-EBUSY);
--
--	sgt = &cma_attach->sgt;
--
--	ret = sg_alloc_table(sgt, cma_obj->sgt->orig_nents, GFP_KERNEL);
--	if (ret) {
--		DRM_ERROR("failed to alloc sgt.\n");
--		return ERR_PTR(-ENOMEM);
--	}
--
--	mutex_lock(&drm->struct_mutex);
--
--	rd = cma_obj->sgt->sgl;
--	wr = sgt->sgl;
--	for (i = 0; i < sgt->orig_nents; ++i) {
--		sg_set_page(wr, sg_page(rd), rd->length, rd->offset);
--		rd = sg_next(rd);
--		wr = sg_next(wr);
--	}
--
--	nents = dma_map_sg(attach->dev, sgt->sgl, sgt->orig_nents, dir);
--	if (!nents) {
--		DRM_ERROR("failed to map sgl with iommu.\n");
--		sg_free_table(sgt);
--		sgt = ERR_PTR(-EIO);
--		goto done;
--	}
--
--	cma_attach->dir = dir;
--	attach->priv = cma_attach;
--
--	DRM_DEBUG_PRIME("buffer size = %zu\n", cma_obj->base.size);
--
--done:
--	mutex_unlock(&drm->struct_mutex);
--	return sgt;
--}
--
--static void drm_gem_cma_dmabuf_unmap(struct dma_buf_attachment *attach,
--				     struct sg_table *sgt,
--				     enum dma_data_direction dir)
--{
--	/* Nothing to do. */
--}
--
--static void drm_gem_cma_dmabuf_release(struct dma_buf *dmabuf)
--{
--	struct drm_gem_cma_object *cma_obj = dmabuf->priv;
--
--	DRM_DEBUG_PRIME("%s\n", __FILE__);
--
--	/*
--	 * drm_gem_cma_dmabuf_release() call means that file object's
--	 * f_count is 0 and it calls drm_gem_object_handle_unreference()
--	 * to drop the references that these values had been increased
--	 * at drm_prime_handle_to_fd()
--	 */
--	if (cma_obj->base.export_dma_buf == dmabuf) {
--		cma_obj->base.export_dma_buf = NULL;
--
--		/*
--		 * drop this gem object refcount to release allocated buffer
--		 * and resources.
--		 */
--		drm_gem_object_unreference_unlocked(&cma_obj->base);
--	}
--}
--
--static void *drm_gem_cma_dmabuf_kmap_atomic(struct dma_buf *dmabuf,
--					    unsigned long page_num)
--{
--	/* TODO */
--
--	return NULL;
--}
--
--static void drm_gem_cma_dmabuf_kunmap_atomic(struct dma_buf *dmabuf,
--					     unsigned long page_num, void *addr)
--{
--	/* TODO */
--}
--
--static void *drm_gem_cma_dmabuf_kmap(struct dma_buf *dmabuf,
--				     unsigned long page_num)
--{
--	/* TODO */
--
--	return NULL;
--}
--
--static void drm_gem_cma_dmabuf_kunmap(struct dma_buf *dmabuf,
--				      unsigned long page_num, void *addr)
--{
--	/* TODO */
--}
--
--static int drm_gem_cma_dmabuf_mmap(struct dma_buf *dmabuf,
--				   struct vm_area_struct *vma)
--{
--	struct drm_gem_cma_object *cma_obj = dmabuf->priv;
--	struct drm_gem_object *gem_obj = &cma_obj->base;
--	int ret;
--
--	ret = drm_gem_mmap_obj(gem_obj, gem_obj->size, vma);
--	if (ret < 0)
--		return ret;
--
--	return drm_gem_cma_mmap_obj(cma_obj, vma);
--}
--
--static void *drm_gem_cma_dmabuf_vmap(struct dma_buf *dmabuf)
--{
--	struct drm_gem_cma_object *cma_obj = dmabuf->priv;
--
--	return cma_obj->vaddr;
--}
--
--static struct dma_buf_ops drm_gem_cma_dmabuf_ops = {
--	.attach			= drm_gem_cma_dmabuf_attach,
--	.detach			= drm_gem_cma_dmabuf_detach,
--	.map_dma_buf		= drm_gem_cma_dmabuf_map,
--	.unmap_dma_buf		= drm_gem_cma_dmabuf_unmap,
--	.kmap			= drm_gem_cma_dmabuf_kmap,
--	.kmap_atomic		= drm_gem_cma_dmabuf_kmap_atomic,
--	.kunmap			= drm_gem_cma_dmabuf_kunmap,
--	.kunmap_atomic		= drm_gem_cma_dmabuf_kunmap_atomic,
--	.mmap			= drm_gem_cma_dmabuf_mmap,
--	.vmap			= drm_gem_cma_dmabuf_vmap,
--	.release		= drm_gem_cma_dmabuf_release,
--};
--
--struct dma_buf *drm_gem_cma_dmabuf_export(struct drm_device *drm,
--					  struct drm_gem_object *obj, int flags)
--{
--	struct drm_gem_cma_object *cma_obj = to_drm_gem_cma_obj(obj);
--
--	return dma_buf_export(cma_obj, &drm_gem_cma_dmabuf_ops,
--			      cma_obj->base.size, flags);
--}
--EXPORT_SYMBOL_GPL(drm_gem_cma_dmabuf_export);
--
--struct drm_gem_object *drm_gem_cma_dmabuf_import(struct drm_device *drm,
--						 struct dma_buf *dma_buf)
--{
--	struct drm_gem_cma_object *cma_obj;
--	struct dma_buf_attachment *attach;
--	struct sg_table *sgt;
--	int ret;
--
--	DRM_DEBUG_PRIME("%s\n", __FILE__);
--
--	/* is this one of own objects? */
--	if (dma_buf->ops == &drm_gem_cma_dmabuf_ops) {
--		struct drm_gem_object *obj;
--
--		cma_obj = dma_buf->priv;
--		obj = &cma_obj->base;
--
--		/* is it from our device? */
--		if (obj->dev == drm) {
--			/*
--			 * Importing dmabuf exported from out own gem increases
--			 * refcount on gem itself instead of f_count of dmabuf.
--			 */
--			drm_gem_object_reference(obj);
--			dma_buf_put(dma_buf);
--			return obj;
--		}
--	}
--
--	/* Create a CMA GEM buffer. */
--	cma_obj = __drm_gem_cma_create(drm, dma_buf->size);
--	if (IS_ERR(cma_obj))
--		return ERR_PTR(PTR_ERR(cma_obj));
--
--	/* Attach to the buffer and map it. Make sure the mapping is contiguous
--	 * on the device memory bus, as that's all we support.
--	 */
--	attach = dma_buf_attach(dma_buf, drm->dev);
--	if (IS_ERR(attach)) {
--		ret = -EINVAL;
--		goto error_gem_free;
--	}
--
--	sgt = dma_buf_map_attachment(attach, DMA_BIDIRECTIONAL);
--	if (IS_ERR_OR_NULL(sgt)) {
--		ret = sgt ? PTR_ERR(sgt) : -ENOMEM;
--		goto error_buf_detach;
--	}
--
--	if (sgt->nents != 1) {
--		ret = -EINVAL;
--		goto error_buf_unmap;
--	}
--
--	cma_obj->base.import_attach = attach;
--	cma_obj->paddr = sg_dma_address(sgt->sgl);
--	cma_obj->sgt = sgt;
--
--	DRM_DEBUG_PRIME("dma_addr = 0x%x, size = %zu\n", cma_obj->paddr,
--			dma_buf->size);
--
--	return &cma_obj->base;
--
--error_buf_unmap:
--	dma_buf_unmap_attachment(attach, sgt, DMA_BIDIRECTIONAL);
--error_buf_detach:
--	dma_buf_detach(dma_buf, attach);
--error_gem_free:
--	drm_gem_cma_free_object(&cma_obj->base);
--	return ERR_PTR(ret);
--}
--EXPORT_SYMBOL_GPL(drm_gem_cma_dmabuf_import);
--
- /* low-level interface prime helpers */
- struct sg_table *drm_gem_cma_prime_get_sg_table(struct drm_gem_object *obj)
- {
---- a/include/drm/drm_gem_cma_helper.h
-+++ b/include/drm/drm_gem_cma_helper.h
-@@ -40,12 +40,6 @@ extern const struct vm_operations_struct
- void drm_gem_cma_describe(struct drm_gem_cma_object *obj, struct seq_file *m);
- #endif
- 
--struct dma_buf *drm_gem_cma_dmabuf_export(struct drm_device *drm_dev,
--					  struct drm_gem_object *obj,
--					  int flags);
--struct drm_gem_object *drm_gem_cma_dmabuf_import(struct drm_device *drm_dev,
--						 struct dma_buf *dma_buf);
--
- struct sg_table *drm_gem_cma_prime_get_sg_table(struct drm_gem_object *obj);
- struct drm_gem_object *
- drm_gem_cma_prime_import_sg_table(struct drm_device *dev, size_t size,
diff --git a/patches.fixes/0006-drm-add-mmap-function-to-prime-helpers.patch b/patches.fixes/0006-drm-add-mmap-function-to-prime-helpers.patch
deleted file mode 100644
index 65b82ef81b228..0000000000000
--- a/patches.fixes/0006-drm-add-mmap-function-to-prime-helpers.patch
+++ /dev/null
@@ -1,45 +0,0 @@
-From e1cc9ddba7d43e584a4f0a5cebf984c61d586235 Mon Sep 17 00:00:00 2001
-From: Joonyoung Shim <jy0922.shim@samsung.com>
-Date: Sun, 2 Feb 2014 10:14:56 +0900
-Subject: drm: add mmap function to prime helpers
-
-This adds to call low-level mmap() from prime helpers.
-
-Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit 7c397cd97b8f46659698396b420bd48c3e6703e6)
-Signed-off-by: Simon Horman <horms@verge.net.au>
----
- drivers/gpu/drm/drm_prime.c |    8 +++++++-
- include/drm/drmP.h          |    2 ++
- 2 files changed, 9 insertions(+), 1 deletion(-)
-
---- a/drivers/gpu/drm/drm_prime.c
-+++ b/drivers/gpu/drm/drm_prime.c
-@@ -155,7 +155,13 @@ static void drm_gem_dmabuf_kunmap(struct
- static int drm_gem_dmabuf_mmap(struct dma_buf *dma_buf,
- 		struct vm_area_struct *vma)
- {
--	return -EINVAL;
-+	struct drm_gem_object *obj = dma_buf->priv;
-+	struct drm_device *dev = obj->dev;
-+
-+	if (!dev->driver->gem_prime_mmap)
-+		return -ENOSYS;
-+
-+	return dev->driver->gem_prime_mmap(obj, vma);
- }
- 
- static const struct dma_buf_ops drm_gem_prime_dmabuf_ops =  {
---- a/include/drm/drmP.h
-+++ b/include/drm/drmP.h
-@@ -950,6 +950,8 @@ struct drm_driver {
- 				struct sg_table *sgt);
- 	void *(*gem_prime_vmap)(struct drm_gem_object *obj);
- 	void (*gem_prime_vunmap)(struct drm_gem_object *obj, void *vaddr);
-+	int (*gem_prime_mmap)(struct drm_gem_object *obj,
-+				struct vm_area_struct *vma);
- 
- 	/* vga arb irq handler */
- 	void (*vgaarb_irq)(struct drm_device *dev, bool state);
diff --git a/patches.fixes/0007-drm-rcar-du-Use-the-GEM-PRIME-helpers.patch b/patches.fixes/0007-drm-rcar-du-Use-the-GEM-PRIME-helpers.patch
deleted file mode 100644
index fb81c7c4541c4..0000000000000
--- a/patches.fixes/0007-drm-rcar-du-Use-the-GEM-PRIME-helpers.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From d2481ca579b9e70b402f1a2cb6affc71e7c080b1 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Sun, 2 Feb 2014 10:14:57 +0900
-Subject: drm/rcar-du: Use the GEM PRIME helpers
-
-The GEM CMA PRIME import/export helpers have been removed in favor of
-generic GEM PRIME helpers with GEM CMA low-level operations. Fix the
-driver accordingly.
-
-Reported-by: Mark Brown <broonie@linaro.org>
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Tested-by: Mark Brown <broonie@linaro.org>
-(cherry picked from commit ffb40400762d86a34318160e8f2169b66f01473d)
-Signed-off-by: Simon Horman <horms@verge.net.au>
----
- drivers/gpu/drm/rcar-du/rcar_du_drv.c |    9 +++++++--
- 1 file changed, 7 insertions(+), 2 deletions(-)
-
---- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-@@ -165,8 +165,13 @@ static struct drm_driver rcar_du_driver
- 	.gem_vm_ops		= &drm_gem_cma_vm_ops,
- 	.prime_handle_to_fd	= drm_gem_prime_handle_to_fd,
- 	.prime_fd_to_handle	= drm_gem_prime_fd_to_handle,
--	.gem_prime_import	= drm_gem_cma_dmabuf_import,
--	.gem_prime_export	= drm_gem_cma_dmabuf_export,
-+	.gem_prime_import	= drm_gem_prime_import,
-+	.gem_prime_export	= drm_gem_prime_export,
-+	.gem_prime_get_sg_table	= drm_gem_cma_prime_get_sg_table,
-+	.gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table,
-+	.gem_prime_vmap		= drm_gem_cma_prime_vmap,
-+	.gem_prime_vunmap	= drm_gem_cma_prime_vunmap,
-+	.gem_prime_mmap		= drm_gem_cma_prime_mmap,
- 	.dumb_create		= rcar_du_dumb_create,
- 	.dumb_map_offset	= drm_gem_cma_dumb_map_offset,
- 	.dumb_destroy		= drm_gem_dumb_destroy,
diff --git a/patches.fixes/0008-fb-make-fp_get_options-name-argument-const.patch b/patches.fixes/0008-fb-make-fp_get_options-name-argument-const.patch
deleted file mode 100644
index 3438450a42256..0000000000000
--- a/patches.fixes/0008-fb-make-fp_get_options-name-argument-const.patch
+++ /dev/null
@@ -1,54 +0,0 @@
-From 1d3b7bbf9388e6128739af92de971c7466b38eeb Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Vincent=20Stehl=C3=A9?= <vincent.stehle@freescale.com>
-Date: Sun, 2 Feb 2014 10:14:58 +0900
-Subject: fb: make fp_get_options name argument const
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-drm_get_connector_name now returns a const value, which causes the following
-compilation warning:
-
-  drivers/gpu/drm/drm_fb_helper.c: In function ‘drm_fb_helper_parse_command_line’:
-  drivers/gpu/drm/drm_fb_helper.c:127:3: warning: passing argument 1 of ‘fb_get_options’ discards ‘const’ qualifier from pointer target type [enabled by default]
-  In file included from drivers/gpu/drm/drm_fb_helper.c:35:0:
-  include/linux/fb.h:627:12: note: expected ‘char *’ but argument is of type ‘const char *’
-
-As fb_get_options uses its name argument as read only, make it const. This
-fixes the aforementioned compilation warning.
-
-Signed-off-by: Vincent Stehlé <vincent.stehle@freescale.com>
-Cc: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com>
-Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
-Cc: Dave Airlie <airlied@redhat.com>
-Cc: trivial@kernel.org
-Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
-(cherry picked from commit a66e62ae56307e587e93d7ed4d83ea34c71d2eb9)
-Signed-off-by: Simon Horman <horms@verge.net.au>
----
- drivers/video/fbmem.c |    2 +-
- include/linux/fb.h    |    2 +-
- 2 files changed, 2 insertions(+), 2 deletions(-)
-
---- a/drivers/video/fbmem.c
-+++ b/drivers/video/fbmem.c
-@@ -1881,7 +1881,7 @@ static int ofonly __read_mostly;
-  *
-  * NOTE: Needed to maintain backwards compatibility
-  */
--int fb_get_options(char *name, char **option)
-+int fb_get_options(const char *name, char **option)
- {
- 	char *opt, *options = NULL;
- 	int retval = 0;
---- a/include/linux/fb.h
-+++ b/include/linux/fb.h
-@@ -624,7 +624,7 @@ extern void fb_pad_aligned_buffer(u8 *ds
- extern void fb_set_suspend(struct fb_info *info, int state);
- extern int fb_get_color_depth(struct fb_var_screeninfo *var,
- 			      struct fb_fix_screeninfo *fix);
--extern int fb_get_options(char *name, char **option);
-+extern int fb_get_options(const char *name, char **option);
- extern int fb_new_modelist(struct fb_info *info);
- 
- extern struct fb_info *registered_fb[FB_MAX];
diff --git a/patches.fixes/0009-ARM-shmobile-r7s72100-Genmai-DT-reference-DTS-bits.patch b/patches.fixes/0009-ARM-shmobile-r7s72100-Genmai-DT-reference-DTS-bits.patch
deleted file mode 100644
index cf206662d966b..0000000000000
--- a/patches.fixes/0009-ARM-shmobile-r7s72100-Genmai-DT-reference-DTS-bits.patch
+++ /dev/null
@@ -1,61 +0,0 @@
-From 2bc433de831273d32b15c0f0ed56e2fe602750c9 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Sun, 2 Feb 2014 10:14:59 +0900
-Subject: ARM: shmobile: r7s72100 Genmai DT reference DTS bits
-
-Add the DT bits for r7s72100 Genmai DT reference support.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 495e06d1daff7f59b511c27c95d2601c1d9dad49)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/Makefile                      |    1 
- arch/arm/boot/dts/r7s72100-genmai-reference.dts |   31 ++++++++++++++++++++++++
- 2 files changed, 32 insertions(+)
- create mode 100644 arch/arm/boot/dts/r7s72100-genmai-reference.dts
-
---- a/arch/arm/boot/dts/Makefile
-+++ b/arch/arm/boot/dts/Makefile
-@@ -161,6 +161,7 @@ dtb-$(CONFIG_ARCH_U8500) += snowball.dtb
- 	ccu9540.dtb
- dtb-$(CONFIG_ARCH_SHMOBILE_LEGACY) += emev2-kzm9d.dtb \
- 	r7s72100-genmai.dtb \
-+	r7s72100-genmai-reference.dtb \
- 	r8a7740-armadillo800eva.dtb \
- 	r8a7778-bockw.dtb \
- 	r8a7778-bockw-reference.dtb \
---- /dev/null
-+++ b/arch/arm/boot/dts/r7s72100-genmai-reference.dts
-@@ -0,0 +1,31 @@
-+/*
-+ * Device Tree Source for the Genmai board
-+ *
-+ * Copyright (C) 2013 Renesas Solutions Corp.
-+ *
-+ * This file is licensed under the terms of the GNU General Public License
-+ * version 2.  This program is licensed "as is" without any warranty of any
-+ * kind, whether express or implied.
-+ */
-+
-+/dts-v1/;
-+/include/ "r7s72100.dtsi"
-+
-+/ {
-+	model = "Genmai";
-+	compatible = "renesas,genmai-reference", "renesas,r7s72100";
-+
-+	chosen {
-+		bootargs = "console=ttySC2,115200 ignore_loglevel rw root=/dev/nfs ip=dhcp";
-+	};
-+
-+	memory {
-+		device_type = "memory";
-+		reg = <0x08000000 0x08000000>;
-+	};
-+
-+	lbsc {
-+		#address-cells = <1>;
-+		#size-cells = <1>;
-+	};
-+};
diff --git a/patches.fixes/0010-i2c-mv64xxx-Do-not-use-writel_relaxed.patch b/patches.fixes/0010-i2c-mv64xxx-Do-not-use-writel_relaxed.patch
deleted file mode 100644
index e971ffbbba8fa..0000000000000
--- a/patches.fixes/0010-i2c-mv64xxx-Do-not-use-writel_relaxed.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From 230324471b5993556c4c60097961d4d94c8cedef Mon Sep 17 00:00:00 2001
-From: Thierry Reding <thierry.reding@gmail.com>
-Date: Sun, 2 Feb 2014 10:15:00 +0900
-Subject: i2c: mv64xxx: Do not use writel_relaxed()
-
-The driver is used on PowerPC which don't provide writel_relaxed(). This
-breaks the c2k and prpmc2800 default configurations. To fix the build,
-turn the calls to writel_relaxed() into writel(). The impacts for ARM
-should be minimal.
-
-Signed-off-by: Thierry Reding <treding@nvidia.com>
-Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-(cherry picked from commit 85b3a9356e84f683dd27fe8b73ad15608b4fc2c5)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/i2c/busses/i2c-mv64xxx.c |    4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
---- a/drivers/i2c/busses/i2c-mv64xxx.c
-+++ b/drivers/i2c/busses/i2c-mv64xxx.c
-@@ -234,9 +234,9 @@ static int mv64xxx_i2c_offload_msg(struc
- 		ctrl_reg |= MV64XXX_I2C_BRIDGE_CONTROL_WR |
- 		    (msg->len - 1) << MV64XXX_I2C_BRIDGE_CONTROL_TX_SIZE_SHIFT;
- 
--		writel_relaxed(data_reg_lo,
-+		writel(data_reg_lo,
- 			drv_data->reg_base + MV64XXX_I2C_REG_TX_DATA_LO);
--		writel_relaxed(data_reg_hi,
-+		writel(data_reg_hi,
- 			drv_data->reg_base + MV64XXX_I2C_REG_TX_DATA_HI);
- 
- 	} else {
diff --git a/patches.gma500/0001-drm-gma500-Add-generic-code-for-clock-calculation.patch b/patches.gma500/0001-drm-gma500-Add-generic-code-for-clock-calculation.patch
deleted file mode 100644
index 8886aa1407469..0000000000000
--- a/patches.gma500/0001-drm-gma500-Add-generic-code-for-clock-calculation.patch
+++ /dev/null
@@ -1,305 +0,0 @@
-From 2d4293b849ed3cc2a11dc3751b638ebe004f9cb8 Mon Sep 17 00:00:00 2001
-From: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-Date: Sun, 30 Jun 2013 21:39:00 +0200
-Subject: drm/gma500: Add generic code for clock calculation
-
-This patch aims to unify the bits and pieces that are common (or similar
-enough) for pll clock calculations. Nothing makes use of this code yet
-That will come in later patches.
-
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-(cherry picked from commit 5ea75e0f05d03007369f155c6c67541bc4ec309f)
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
----
- drivers/gpu/drm/gma500/Makefile            |    1 
- drivers/gpu/drm/gma500/gma_display.c       |  143 +++++++++++++++++++++++++++++
- drivers/gpu/drm/gma500/gma_display.h       |   74 +++++++++++++++
- drivers/gpu/drm/gma500/psb_drv.h           |    2 
- drivers/gpu/drm/gma500/psb_intel_display.c |    3 
- drivers/gpu/drm/gma500/psb_intel_drv.h     |    3 
- 6 files changed, 226 insertions(+)
- create mode 100644 drivers/gpu/drm/gma500/gma_display.c
- create mode 100644 drivers/gpu/drm/gma500/gma_display.h
-
---- a/drivers/gpu/drm/gma500/Makefile
-+++ b/drivers/gpu/drm/gma500/Makefile
-@@ -15,6 +15,7 @@ gma500_gfx-y += \
- 	  mmu.o \
- 	  power.o \
- 	  psb_drv.o \
-+	  gma_display.o \
- 	  psb_intel_display.o \
- 	  psb_intel_lvds.o \
- 	  psb_intel_modes.o \
---- /dev/null
-+++ b/drivers/gpu/drm/gma500/gma_display.c
-@@ -0,0 +1,143 @@
-+/*
-+ * Copyright © 2006-2011 Intel Corporation
-+ *
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms and conditions of the GNU General Public License,
-+ * version 2, as published by the Free Software Foundation.
-+ *
-+ * This program is distributed in the hope it will be useful, but WITHOUT
-+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
-+ * more details.
-+ *
-+ * You should have received a copy of the GNU General Public License along with
-+ * this program; if not, write to the Free Software Foundation, Inc.,
-+ * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
-+ *
-+ * Authors:
-+ *	Eric Anholt <eric@anholt.net>
-+ *	Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-+ */
-+
-+#include <drm/drmP.h>
-+#include "gma_display.h"
-+#include "psb_intel_drv.h"
-+#include "psb_intel_reg.h"
-+#include "psb_drv.h"
-+
-+/**
-+ * Returns whether any output on the specified pipe is of the specified type
-+ */
-+bool gma_pipe_has_type(struct drm_crtc *crtc, int type)
-+{
-+	struct drm_device *dev = crtc->dev;
-+	struct drm_mode_config *mode_config = &dev->mode_config;
-+	struct drm_connector *l_entry;
-+
-+	list_for_each_entry(l_entry, &mode_config->connector_list, head) {
-+		if (l_entry->encoder && l_entry->encoder->crtc == crtc) {
-+			struct psb_intel_encoder *psb_intel_encoder =
-+					psb_intel_attached_encoder(l_entry);
-+			if (psb_intel_encoder->type == type)
-+				return true;
-+		}
-+	}
-+
-+	return false;
-+}
-+
-+#define GMA_PLL_INVALID(s) { /* DRM_ERROR(s); */ return false; }
-+
-+bool gma_pll_is_valid(struct drm_crtc *crtc,
-+		      const struct gma_limit_t *limit,
-+		      struct gma_clock_t *clock)
-+{
-+	if (clock->p1 < limit->p1.min || limit->p1.max < clock->p1)
-+		GMA_PLL_INVALID("p1 out of range");
-+	if (clock->p < limit->p.min || limit->p.max < clock->p)
-+		GMA_PLL_INVALID("p out of range");
-+	if (clock->m2 < limit->m2.min || limit->m2.max < clock->m2)
-+		GMA_PLL_INVALID("m2 out of range");
-+	if (clock->m1 < limit->m1.min || limit->m1.max < clock->m1)
-+		GMA_PLL_INVALID("m1 out of range");
-+	/* On CDV m1 is always 0 */
-+	if (clock->m1 <= clock->m2 && clock->m1 != 0)
-+		GMA_PLL_INVALID("m1 <= m2 && m1 != 0");
-+	if (clock->m < limit->m.min || limit->m.max < clock->m)
-+		GMA_PLL_INVALID("m out of range");
-+	if (clock->n < limit->n.min || limit->n.max < clock->n)
-+		GMA_PLL_INVALID("n out of range");
-+	if (clock->vco < limit->vco.min || limit->vco.max < clock->vco)
-+		GMA_PLL_INVALID("vco out of range");
-+	/* XXX: We may need to be checking "Dot clock"
-+	 * depending on the multiplier, connector, etc.,
-+	 * rather than just a single range.
-+	 */
-+	if (clock->dot < limit->dot.min || limit->dot.max < clock->dot)
-+		GMA_PLL_INVALID("dot out of range");
-+
-+	return true;
-+}
-+
-+bool gma_find_best_pll(const struct gma_limit_t *limit,
-+		       struct drm_crtc *crtc, int target, int refclk,
-+		       struct gma_clock_t *best_clock)
-+{
-+	struct drm_device *dev = crtc->dev;
-+	const struct gma_clock_funcs *clock_funcs =
-+					to_psb_intel_crtc(crtc)->clock_funcs;
-+	struct gma_clock_t clock;
-+	int err = target;
-+
-+	if (gma_pipe_has_type(crtc, INTEL_OUTPUT_LVDS) &&
-+	    (REG_READ(LVDS) & LVDS_PORT_EN) != 0) {
-+		/*
-+		 * For LVDS, if the panel is on, just rely on its current
-+		 * settings for dual-channel.  We haven't figured out how to
-+		 * reliably set up different single/dual channel state, if we
-+		 * even can.
-+		 */
-+		if ((REG_READ(LVDS) & LVDS_CLKB_POWER_MASK) ==
-+		    LVDS_CLKB_POWER_UP)
-+			clock.p2 = limit->p2.p2_fast;
-+		else
-+			clock.p2 = limit->p2.p2_slow;
-+	} else {
-+		if (target < limit->p2.dot_limit)
-+			clock.p2 = limit->p2.p2_slow;
-+		else
-+			clock.p2 = limit->p2.p2_fast;
-+	}
-+
-+	memset(best_clock, 0, sizeof(*best_clock));
-+
-+	/* m1 is always 0 on CDV so the outmost loop will run just once */
-+	for (clock.m1 = limit->m1.min; clock.m1 <= limit->m1.max; clock.m1++) {
-+		for (clock.m2 = limit->m2.min;
-+		     (clock.m2 < clock.m1 || clock.m1 == 0) &&
-+		      clock.m2 <= limit->m2.max; clock.m2++) {
-+			for (clock.n = limit->n.min;
-+			     clock.n <= limit->n.max; clock.n++) {
-+				for (clock.p1 = limit->p1.min;
-+				     clock.p1 <= limit->p1.max;
-+				     clock.p1++) {
-+					int this_err;
-+
-+					clock_funcs->clock(refclk, &clock);
-+
-+					if (!clock_funcs->pll_is_valid(crtc,
-+								limit, &clock))
-+						continue;
-+
-+					this_err = abs(clock.dot - target);
-+					if (this_err < err) {
-+						*best_clock = clock;
-+						err = this_err;
-+					}
-+				}
-+			}
-+		}
-+	}
-+
-+	return err != target;
-+}
---- /dev/null
-+++ b/drivers/gpu/drm/gma500/gma_display.h
-@@ -0,0 +1,74 @@
-+/*
-+ * Copyright © 2006-2011 Intel Corporation
-+ *
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms and conditions of the GNU General Public License,
-+ * version 2, as published by the Free Software Foundation.
-+ *
-+ * This program is distributed in the hope it will be useful, but WITHOUT
-+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
-+ * more details.
-+ *
-+ * You should have received a copy of the GNU General Public License along with
-+ * this program; if not, write to the Free Software Foundation, Inc.,
-+ * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
-+ *
-+ * Authors:
-+ *	Eric Anholt <eric@anholt.net>
-+ *	Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-+ */
-+
-+#ifndef _GMA_DISPLAY_H_
-+#define _GMA_DISPLAY_H_
-+
-+struct gma_clock_t {
-+	/* given values */
-+	int n;
-+	int m1, m2;
-+	int p1, p2;
-+	/* derived values */
-+	int dot;
-+	int vco;
-+	int m;
-+	int p;
-+};
-+
-+struct gma_range_t {
-+	int min, max;
-+};
-+
-+struct gma_p2_t {
-+	int dot_limit;
-+	int p2_slow, p2_fast;
-+};
-+
-+struct gma_limit_t {
-+	struct gma_range_t dot, vco, n, m, m1, m2, p, p1;
-+	struct gma_p2_t p2;
-+	bool (*find_pll)(const struct gma_limit_t *, struct drm_crtc *,
-+			 int target, int refclk,
-+			 struct gma_clock_t *best_clock);
-+};
-+
-+struct gma_clock_funcs {
-+	void (*clock)(int refclk, struct gma_clock_t *clock);
-+	const struct gma_limit_t *(*limit)(struct drm_crtc *crtc, int refclk);
-+	bool (*pll_is_valid)(struct drm_crtc *crtc,
-+			     const struct gma_limit_t *limit,
-+			     struct gma_clock_t *clock);
-+};
-+
-+/* Common pipe related functions */
-+extern bool gma_pipe_has_type(struct drm_crtc *crtc, int type);
-+
-+/* Common clock related functions */
-+extern const struct gma_limit_t *gma_limit(struct drm_crtc *crtc, int refclk);
-+extern void gma_clock(int refclk, struct gma_clock_t *clock);
-+extern bool gma_pll_is_valid(struct drm_crtc *crtc,
-+			     const struct gma_limit_t *limit,
-+			     struct gma_clock_t *clock);
-+extern bool gma_find_best_pll(const struct gma_limit_t *limit,
-+			      struct drm_crtc *crtc, int target, int refclk,
-+			      struct gma_clock_t *best_clock);
-+#endif
---- a/drivers/gpu/drm/gma500/psb_drv.h
-+++ b/drivers/gpu/drm/gma500/psb_drv.h
-@@ -27,6 +27,7 @@
- #include <drm/gma_drm.h>
- #include "psb_reg.h"
- #include "psb_intel_drv.h"
-+#include "gma_display.h"
- #include "intel_bios.h"
- #include "gtt.h"
- #include "power.h"
-@@ -676,6 +677,7 @@ struct psb_ops {
- 	/* Sub functions */
- 	struct drm_crtc_helper_funcs const *crtc_helper;
- 	struct drm_crtc_funcs const *crtc_funcs;
-+	const struct gma_clock_funcs *clock_funcs;
- 
- 	/* Setup hooks */
- 	int (*chip_setup)(struct drm_device *dev);
---- a/drivers/gpu/drm/gma500/psb_intel_display.c
-+++ b/drivers/gpu/drm/gma500/psb_intel_display.c
-@@ -1251,6 +1251,9 @@ void psb_intel_crtc_init(struct drm_devi
- 	/* Set the CRTC operations from the chip specific data */
- 	drm_crtc_init(dev, &psb_intel_crtc->base, dev_priv->ops->crtc_funcs);
- 
-+	/* Set the CRTC clock functions from chip specific data */
-+	psb_intel_crtc->clock_funcs = dev_priv->ops->clock_funcs;
-+
- 	drm_mode_crtc_set_gamma_size(&psb_intel_crtc->base, 256);
- 	psb_intel_crtc->pipe = pipe;
- 	psb_intel_crtc->plane = pipe;
---- a/drivers/gpu/drm/gma500/psb_intel_drv.h
-+++ b/drivers/gpu/drm/gma500/psb_intel_drv.h
-@@ -24,6 +24,7 @@
- #include <drm/drm_crtc.h>
- #include <drm/drm_crtc_helper.h>
- #include <linux/gpio.h>
-+#include "gma_display.h"
- 
- /*
-  * Display related stuff
-@@ -188,6 +189,8 @@ struct psb_intel_crtc {
- 
- 	/* Saved Crtc HW states */
- 	struct psb_intel_crtc_state *crtc_state;
-+
-+	const struct gma_clock_funcs *clock_funcs;
- };
- 
- #define to_psb_intel_crtc(x)	\
diff --git a/patches.gma500/0002-drm-gma500-cdv-Make-use-of-the-generic-clock-code.patch b/patches.gma500/0002-drm-gma500-cdv-Make-use-of-the-generic-clock-code.patch
deleted file mode 100644
index b49a29374d0d8..0000000000000
--- a/patches.gma500/0002-drm-gma500-cdv-Make-use-of-the-generic-clock-code.patch
+++ /dev/null
@@ -1,358 +0,0 @@
-From 070e5cc463b922114ea8481ebfaead907198dd70 Mon Sep 17 00:00:00 2001
-From: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-Date: Mon, 1 Jul 2013 01:42:16 +0200
-Subject: drm/gma500/cdv: Make use of the generic clock code
-
-Add chip specific callbacks for the generic and non-generic clock
-calculation code. Also remove as much dupilicated code as possible.
-
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-(cherry picked from commit 2adb29ff61c97982addf702d7da106569e217329)
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
----
- drivers/gpu/drm/gma500/cdv_device.c        |    1 
- drivers/gpu/drm/gma500/cdv_device.h        |    1 
- drivers/gpu/drm/gma500/cdv_intel_display.c |  197 +++++------------------------
- 3 files changed, 36 insertions(+), 163 deletions(-)
-
---- a/drivers/gpu/drm/gma500/cdv_device.c
-+++ b/drivers/gpu/drm/gma500/cdv_device.c
-@@ -641,6 +641,7 @@ const struct psb_ops cdv_chip_ops = {
- 
- 	.crtc_helper = &cdv_intel_helper_funcs,
- 	.crtc_funcs = &cdv_intel_crtc_funcs,
-+	.clock_funcs = &cdv_clock_funcs,
- 
- 	.output_init = cdv_output_init,
- 	.hotplug = cdv_hotplug_event,
---- a/drivers/gpu/drm/gma500/cdv_device.h
-+++ b/drivers/gpu/drm/gma500/cdv_device.h
-@@ -17,6 +17,7 @@
- 
- extern const struct drm_crtc_helper_funcs cdv_intel_helper_funcs;
- extern const struct drm_crtc_funcs cdv_intel_crtc_funcs;
-+extern const struct gma_clock_funcs cdv_clock_funcs;
- extern void cdv_intel_crt_init(struct drm_device *dev,
- 			struct psb_intel_mode_device *mode_dev);
- extern void cdv_intel_lvds_init(struct drm_device *dev,
---- a/drivers/gpu/drm/gma500/cdv_intel_display.c
-+++ b/drivers/gpu/drm/gma500/cdv_intel_display.c
-@@ -30,43 +30,10 @@
- #include "power.h"
- #include "cdv_device.h"
- 
-+static bool cdv_intel_find_dp_pll(const struct gma_limit_t *limit,
-+				  struct drm_crtc *crtc, int target,
-+				  int refclk, struct gma_clock_t *best_clock);
- 
--struct cdv_intel_range_t {
--	int min, max;
--};
--
--struct cdv_intel_p2_t {
--	int dot_limit;
--	int p2_slow, p2_fast;
--};
--
--struct cdv_intel_clock_t {
--	/* given values */
--	int n;
--	int m1, m2;
--	int p1, p2;
--	/* derived values */
--	int dot;
--	int vco;
--	int m;
--	int p;
--};
--
--#define INTEL_P2_NUM		      2
--
--struct cdv_intel_limit_t {
--	struct cdv_intel_range_t dot, vco, n, m, m1, m2, p, p1;
--	struct cdv_intel_p2_t p2;
--	bool (*find_pll)(const struct cdv_intel_limit_t *, struct drm_crtc *,
--			int, int, struct cdv_intel_clock_t *);
--};
--
--static bool cdv_intel_find_best_PLL(const struct cdv_intel_limit_t *limit,
--	struct drm_crtc *crtc, int target, int refclk,
--	struct cdv_intel_clock_t *best_clock);
--static bool cdv_intel_find_dp_pll(const struct cdv_intel_limit_t *limit, struct drm_crtc *crtc, int target,
--				int refclk,
--				struct cdv_intel_clock_t *best_clock);
- 
- #define CDV_LIMIT_SINGLE_LVDS_96	0
- #define CDV_LIMIT_SINGLE_LVDS_100	1
-@@ -75,7 +42,7 @@ static bool cdv_intel_find_dp_pll(const
- #define CDV_LIMIT_DP_27			4
- #define CDV_LIMIT_DP_100		5
- 
--static const struct cdv_intel_limit_t cdv_intel_limits[] = {
-+static const struct gma_limit_t cdv_intel_limits[] = {
- 	{			/* CDV_SINGLE_LVDS_96MHz */
- 	 .dot = {.min = 20000, .max = 115500},
- 	 .vco = {.min = 1800000, .max = 3600000},
-@@ -85,9 +52,8 @@ static const struct cdv_intel_limit_t cd
- 	 .m2 = {.min = 58, .max = 158},
- 	 .p = {.min = 28, .max = 140},
- 	 .p1 = {.min = 2, .max = 10},
--	 .p2 = {.dot_limit = 200000,
--		.p2_slow = 14, .p2_fast = 14},
--		.find_pll = cdv_intel_find_best_PLL,
-+	 .p2 = {.dot_limit = 200000, .p2_slow = 14, .p2_fast = 14},
-+	 .find_pll = gma_find_best_pll,
- 	 },
- 	{			/* CDV_SINGLE_LVDS_100MHz */
- 	 .dot = {.min = 20000, .max = 115500},
-@@ -102,7 +68,7 @@ static const struct cdv_intel_limit_t cd
- 	  * is 80-224Mhz.  Prefer single channel as much as possible.
- 	  */
- 	 .p2 = {.dot_limit = 200000, .p2_slow = 14, .p2_fast = 14},
--	.find_pll = cdv_intel_find_best_PLL,
-+	 .find_pll = gma_find_best_pll,
- 	 },
- 	{			/* CDV_DAC_HDMI_27MHz */
- 	 .dot = {.min = 20000, .max = 400000},
-@@ -114,7 +80,7 @@ static const struct cdv_intel_limit_t cd
- 	 .p = {.min = 5, .max = 90},
- 	 .p1 = {.min = 1, .max = 9},
- 	 .p2 = {.dot_limit = 225000, .p2_slow = 10, .p2_fast = 5},
--	.find_pll = cdv_intel_find_best_PLL,
-+	 .find_pll = gma_find_best_pll,
- 	 },
- 	{			/* CDV_DAC_HDMI_96MHz */
- 	 .dot = {.min = 20000, .max = 400000},
-@@ -126,7 +92,7 @@ static const struct cdv_intel_limit_t cd
- 	 .p = {.min = 5, .max = 100},
- 	 .p1 = {.min = 1, .max = 10},
- 	 .p2 = {.dot_limit = 225000, .p2_slow = 10, .p2_fast = 5},
--	.find_pll = cdv_intel_find_best_PLL,
-+	 .find_pll = gma_find_best_pll,
- 	 },
- 	{			/* CDV_DP_27MHz */
- 	 .dot = {.min = 160000, .max = 272000},
-@@ -255,7 +221,7 @@ void cdv_sb_reset(struct drm_device *dev
-  */
- static int
- cdv_dpll_set_clock_cdv(struct drm_device *dev, struct drm_crtc *crtc,
--			       struct cdv_intel_clock_t *clock, bool is_lvds, u32 ddi_select)
-+		       struct gma_clock_t *clock, bool is_lvds, u32 ddi_select)
- {
- 	struct psb_intel_crtc *psb_crtc = to_psb_intel_crtc(crtc);
- 	int pipe = psb_crtc->pipe;
-@@ -405,31 +371,11 @@ cdv_dpll_set_clock_cdv(struct drm_device
- 	return 0;
- }
- 
--/*
-- * Returns whether any encoder on the specified pipe is of the specified type
-- */
--static bool cdv_intel_pipe_has_type(struct drm_crtc *crtc, int type)
--{
--	struct drm_device *dev = crtc->dev;
--	struct drm_mode_config *mode_config = &dev->mode_config;
--	struct drm_connector *l_entry;
--
--	list_for_each_entry(l_entry, &mode_config->connector_list, head) {
--		if (l_entry->encoder && l_entry->encoder->crtc == crtc) {
--			struct psb_intel_encoder *psb_intel_encoder =
--					psb_intel_attached_encoder(l_entry);
--			if (psb_intel_encoder->type == type)
--				return true;
--		}
--	}
--	return false;
--}
--
--static const struct cdv_intel_limit_t *cdv_intel_limit(struct drm_crtc *crtc,
--							int refclk)
-+static const struct gma_limit_t *cdv_intel_limit(struct drm_crtc *crtc,
-+						 int refclk)
- {
--	const struct cdv_intel_limit_t *limit;
--	if (cdv_intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) {
-+	const struct gma_limit_t *limit;
-+	if (psb_intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) {
- 		/*
- 		 * Now only single-channel LVDS is supported on CDV. If it is
- 		 * incorrect, please add the dual-channel LVDS.
-@@ -454,8 +400,7 @@ static const struct cdv_intel_limit_t *c
- }
- 
- /* m1 is reserved as 0 in CDV, n is a ring counter */
--static void cdv_intel_clock(struct drm_device *dev,
--			int refclk, struct cdv_intel_clock_t *clock)
-+static void cdv_intel_clock(int refclk, struct gma_clock_t *clock)
- {
- 	clock->m = clock->m2 + 2;
- 	clock->p = clock->p1 * clock->p2;
-@@ -463,93 +408,12 @@ static void cdv_intel_clock(struct drm_d
- 	clock->dot = clock->vco / clock->p;
- }
- 
--
--#define INTELPllInvalid(s)   { /* ErrorF (s) */; return false; }
--static bool cdv_intel_PLL_is_valid(struct drm_crtc *crtc,
--				const struct cdv_intel_limit_t *limit,
--			       struct cdv_intel_clock_t *clock)
--{
--	if (clock->p1 < limit->p1.min || limit->p1.max < clock->p1)
--		INTELPllInvalid("p1 out of range\n");
--	if (clock->p < limit->p.min || limit->p.max < clock->p)
--		INTELPllInvalid("p out of range\n");
--	/* unnecessary to check the range of m(m1/M2)/n again */
--	if (clock->vco < limit->vco.min || limit->vco.max < clock->vco)
--		INTELPllInvalid("vco out of range\n");
--	/* XXX: We may need to be checking "Dot clock"
--	 * depending on the multiplier, connector, etc.,
--	 * rather than just a single range.
--	 */
--	if (clock->dot < limit->dot.min || limit->dot.max < clock->dot)
--		INTELPllInvalid("dot out of range\n");
--
--	return true;
--}
--
--static bool cdv_intel_find_best_PLL(const struct cdv_intel_limit_t *limit,
--	struct drm_crtc *crtc, int target, int refclk,
--	struct cdv_intel_clock_t *best_clock)
--{
--	struct drm_device *dev = crtc->dev;
--	struct cdv_intel_clock_t clock;
--	int err = target;
--
--
--	if (cdv_intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS) &&
--	    (REG_READ(LVDS) & LVDS_PORT_EN) != 0) {
--		/*
--		 * For LVDS, if the panel is on, just rely on its current
--		 * settings for dual-channel.  We haven't figured out how to
--		 * reliably set up different single/dual channel state, if we
--		 * even can.
--		 */
--		if ((REG_READ(LVDS) & LVDS_CLKB_POWER_MASK) ==
--		    LVDS_CLKB_POWER_UP)
--			clock.p2 = limit->p2.p2_fast;
--		else
--			clock.p2 = limit->p2.p2_slow;
--	} else {
--		if (target < limit->p2.dot_limit)
--			clock.p2 = limit->p2.p2_slow;
--		else
--			clock.p2 = limit->p2.p2_fast;
--	}
--
--	memset(best_clock, 0, sizeof(*best_clock));
--	clock.m1 = 0;
--	/* m1 is reserved as 0 in CDV, n is a ring counter.
--	   So skip the m1 loop */
--	for (clock.n = limit->n.min; clock.n <= limit->n.max; clock.n++) {
--		for (clock.m2 = limit->m2.min; clock.m2 <= limit->m2.max;
--					     clock.m2++) {
--			for (clock.p1 = limit->p1.min;
--					clock.p1 <= limit->p1.max;
--					clock.p1++) {
--				int this_err;
--
--				cdv_intel_clock(dev, refclk, &clock);
--
--				if (!cdv_intel_PLL_is_valid(crtc,
--								limit, &clock))
--						continue;
--
--				this_err = abs(clock.dot - target);
--				if (this_err < err) {
--					*best_clock = clock;
--					err = this_err;
--				}
--			}
--		}
--	}
--
--	return err != target;
--}
--
--static bool cdv_intel_find_dp_pll(const struct cdv_intel_limit_t *limit, struct drm_crtc *crtc, int target,
--				int refclk,
--				struct cdv_intel_clock_t *best_clock)
-+static bool cdv_intel_find_dp_pll(const struct gma_limit_t *limit,
-+				  struct drm_crtc *crtc, int target,
-+				  int refclk,
-+				  struct gma_clock_t *best_clock)
- {
--	struct cdv_intel_clock_t clock;
-+	struct gma_clock_t clock;
- 	if (refclk == 27000) {
- 		if (target < 200000) {
- 			clock.p1 = 2;
-@@ -584,7 +448,7 @@ static bool cdv_intel_find_dp_pll(const
- 	clock.p = clock.p1 * clock.p2;
- 	clock.vco = (refclk * clock.m) / clock.n;
- 	clock.dot = clock.vco / clock.p;
--	memcpy(best_clock, &clock, sizeof(struct cdv_intel_clock_t));
-+	memcpy(best_clock, &clock, sizeof(struct gma_clock_t));
- 	return true;
- }
- 
-@@ -1035,14 +899,14 @@ static int cdv_intel_crtc_mode_set(struc
- 	int pipe = psb_intel_crtc->pipe;
- 	const struct psb_offset *map = &dev_priv->regmap[pipe];
- 	int refclk;
--	struct cdv_intel_clock_t clock;
-+	struct gma_clock_t clock;
- 	u32 dpll = 0, dspcntr, pipeconf;
- 	bool ok;
- 	bool is_crt = false, is_lvds = false, is_tv = false;
- 	bool is_hdmi = false, is_dp = false;
- 	struct drm_mode_config *mode_config = &dev->mode_config;
- 	struct drm_connector *connector;
--	const struct cdv_intel_limit_t *limit;
-+	const struct gma_limit_t *limit;
- 	u32 ddi_select = 0;
- 	bool is_edp = false;
- 
-@@ -1108,12 +972,13 @@ static int cdv_intel_crtc_mode_set(struc
- 
- 	drm_mode_debug_printmodeline(adjusted_mode);
- 	
--	limit = cdv_intel_limit(crtc, refclk);
-+	limit = psb_intel_crtc->clock_funcs->limit(crtc, refclk);
- 
- 	ok = limit->find_pll(limit, crtc, adjusted_mode->clock, refclk,
- 				 &clock);
- 	if (!ok) {
--		dev_err(dev->dev, "Couldn't find PLL settings for mode!\n");
-+		DRM_ERROR("Couldn't find PLL settings for mode! target: %d, actual: %d",
-+			  adjusted_mode->clock, clock.dot);
- 		return 0;
- 	}
- 
-@@ -1612,7 +1477,7 @@ static int cdv_crtc_set_config(struct dr
- 
- /* FIXME: why are we using this, should it be cdv_ in this tree ? */
- 
--static void i8xx_clock(int refclk, struct cdv_intel_clock_t *clock)
-+static void i8xx_clock(int refclk, struct gma_clock_t *clock)
- {
- 	clock->m = 5 * (clock->m1 + 2) + (clock->m2 + 2);
- 	clock->p = clock->p1 * clock->p2;
-@@ -1630,7 +1495,7 @@ static int cdv_intel_crtc_clock_get(stru
- 	const struct psb_offset *map = &dev_priv->regmap[pipe];
- 	u32 dpll;
- 	u32 fp;
--	struct cdv_intel_clock_t clock;
-+	struct gma_clock_t clock;
- 	bool is_lvds;
- 	struct psb_pipe *p = &dev_priv->regs.pipe[pipe];
- 
-@@ -1788,3 +1653,9 @@ const struct drm_crtc_funcs cdv_intel_cr
- 	.set_config = cdv_crtc_set_config,
- 	.destroy = cdv_intel_crtc_destroy,
- };
-+
-+const struct gma_clock_funcs cdv_clock_funcs = {
-+	.clock = cdv_intel_clock,
-+	.limit = cdv_intel_limit,
-+	.pll_is_valid = gma_pll_is_valid,
-+};
diff --git a/patches.gma500/0003-drm-gma500-Make-use-of-gma_pipe_has_type.patch b/patches.gma500/0003-drm-gma500-Make-use-of-gma_pipe_has_type.patch
deleted file mode 100644
index af8c5324082b3..0000000000000
--- a/patches.gma500/0003-drm-gma500-Make-use-of-gma_pipe_has_type.patch
+++ /dev/null
@@ -1,102 +0,0 @@
-From 1752120eac763847e20e55d68b54f163d61541bc Mon Sep 17 00:00:00 2001
-From: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-Date: Tue, 2 Jul 2013 17:02:22 +0200
-Subject: drm/gma500: Make use of gma_pipe_has_type()
-
-Replace any use of xxx_intel_pipe_has_type() with the generic
-gma_pipe_has_type() function. Poulsbo still use it but that will be
-removed when we rip out psb_intel_pipe_has_type().
-
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-(cherry picked from commit fe477cc1b09ecd957c8c201b4f9c84e9d03621d4)
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
----
- drivers/gpu/drm/gma500/cdv_intel_display.c   |    8 ++++----
- drivers/gpu/drm/gma500/mdfld_intel_display.c |    8 ++++----
- drivers/gpu/drm/gma500/oaktrail_crtc.c       |    6 +++---
- 3 files changed, 11 insertions(+), 11 deletions(-)
-
---- a/drivers/gpu/drm/gma500/cdv_intel_display.c
-+++ b/drivers/gpu/drm/gma500/cdv_intel_display.c
-@@ -26,7 +26,7 @@
- #include "psb_drv.h"
- #include "psb_intel_drv.h"
- #include "psb_intel_reg.h"
--#include "psb_intel_display.h"
-+#include "gma_display.h"
- #include "power.h"
- #include "cdv_device.h"
- 
-@@ -375,7 +375,7 @@ static const struct gma_limit_t *cdv_int
- 						 int refclk)
- {
- 	const struct gma_limit_t *limit;
--	if (psb_intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) {
-+	if (gma_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) {
- 		/*
- 		 * Now only single-channel LVDS is supported on CDV. If it is
- 		 * incorrect, please add the dual-channel LVDS.
-@@ -384,8 +384,8 @@ static const struct gma_limit_t *cdv_int
- 			limit = &cdv_intel_limits[CDV_LIMIT_SINGLE_LVDS_96];
- 		else
- 			limit = &cdv_intel_limits[CDV_LIMIT_SINGLE_LVDS_100];
--	} else if (psb_intel_pipe_has_type(crtc, INTEL_OUTPUT_DISPLAYPORT) ||
--			psb_intel_pipe_has_type(crtc, INTEL_OUTPUT_EDP)) {
-+	} else if (gma_pipe_has_type(crtc, INTEL_OUTPUT_DISPLAYPORT) ||
-+			gma_pipe_has_type(crtc, INTEL_OUTPUT_EDP)) {
- 		if (refclk == 27000)
- 			limit = &cdv_intel_limits[CDV_LIMIT_DP_27];
- 		else
---- a/drivers/gpu/drm/gma500/mdfld_intel_display.c
-+++ b/drivers/gpu/drm/gma500/mdfld_intel_display.c
-@@ -23,7 +23,7 @@
- 
- #include <drm/drmP.h>
- #include "psb_intel_reg.h"
--#include "psb_intel_display.h"
-+#include "gma_display.h"
- #include "framebuffer.h"
- #include "mdfld_output.h"
- #include "mdfld_dsi_output.h"
-@@ -611,8 +611,8 @@ static const struct mrst_limit_t *mdfld_
- 	struct drm_device *dev = crtc->dev;
- 	struct drm_psb_private *dev_priv = dev->dev_private;
- 
--	if (psb_intel_pipe_has_type(crtc, INTEL_OUTPUT_MIPI)
--	    || psb_intel_pipe_has_type(crtc, INTEL_OUTPUT_MIPI2)) {
-+	if (gma_pipe_has_type(crtc, INTEL_OUTPUT_MIPI)
-+	    || gma_pipe_has_type(crtc, INTEL_OUTPUT_MIPI2)) {
- 		if ((ksel == KSEL_CRYSTAL_19) || (ksel == KSEL_BYPASS_19))
- 			limit = &mdfld_limits[MDFLD_LIMT_DSIPLL_19];
- 		else if (ksel == KSEL_BYPASS_25)
-@@ -624,7 +624,7 @@ static const struct mrst_limit_t *mdfld_
- 			 (dev_priv->core_freq == 100 ||
- 				dev_priv->core_freq == 200))
- 			limit = &mdfld_limits[MDFLD_LIMT_DSIPLL_100];
--	} else if (psb_intel_pipe_has_type(crtc, INTEL_OUTPUT_HDMI)) {
-+	} else if (gma_pipe_has_type(crtc, INTEL_OUTPUT_HDMI)) {
- 		if ((ksel == KSEL_CRYSTAL_19) || (ksel == KSEL_BYPASS_19))
- 			limit = &mdfld_limits[MDFLD_LIMT_DPLL_19];
- 		else if (ksel == KSEL_BYPASS_25)
---- a/drivers/gpu/drm/gma500/oaktrail_crtc.c
-+++ b/drivers/gpu/drm/gma500/oaktrail_crtc.c
-@@ -23,7 +23,7 @@
- #include "psb_drv.h"
- #include "psb_intel_drv.h"
- #include "psb_intel_reg.h"
--#include "psb_intel_display.h"
-+#include "gma_display.h"
- #include "power.h"
- 
- struct psb_intel_range_t {
-@@ -88,8 +88,8 @@ static const struct oaktrail_limit_t *oa
- 	struct drm_device *dev = crtc->dev;
- 	struct drm_psb_private *dev_priv = dev->dev_private;
- 
--	if (psb_intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)
--	    || psb_intel_pipe_has_type(crtc, INTEL_OUTPUT_MIPI)) {
-+	if (gma_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)
-+	    || gma_pipe_has_type(crtc, INTEL_OUTPUT_MIPI)) {
- 		switch (dev_priv->core_freq) {
- 		case 100:
- 			limit = &oaktrail_limits[MRST_LIMIT_LVDS_100L];
diff --git a/patches.gma500/0004-drm-gma500-psb-Make-use-of-generic-clock-code.patch b/patches.gma500/0004-drm-gma500-psb-Make-use-of-generic-clock-code.patch
deleted file mode 100644
index bb6c0a6c31cbe..0000000000000
--- a/patches.gma500/0004-drm-gma500-psb-Make-use-of-generic-clock-code.patch
+++ /dev/null
@@ -1,344 +0,0 @@
-From 6ee0194f961ca20c23e0f7034340bcee7b02bc01 Mon Sep 17 00:00:00 2001
-From: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-Date: Tue, 2 Jul 2013 17:07:59 +0200
-Subject: drm/gma500/psb: Make use of generic clock code
-
-Add chip specific callbacks for the generic and non-generic clock
-calculation code. Also remove as much dupilicated code as possible.
-
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-(cherry picked from commit 7f67c06721641df12ed68249218d1c2118517f78)
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
----
- drivers/gpu/drm/gma500/psb_device.c        |    3 
- drivers/gpu/drm/gma500/psb_device.h        |   24 +++
- drivers/gpu/drm/gma500/psb_intel_display.c |  189 +++--------------------------
- drivers/gpu/drm/gma500/psb_intel_display.h |    2 
- 4 files changed, 51 insertions(+), 167 deletions(-)
- create mode 100644 drivers/gpu/drm/gma500/psb_device.h
-
---- a/drivers/gpu/drm/gma500/psb_device.c
-+++ b/drivers/gpu/drm/gma500/psb_device.c
-@@ -25,7 +25,7 @@
- #include "psb_reg.h"
- #include "psb_intel_reg.h"
- #include "intel_bios.h"
--
-+#include "psb_device.h"
- 
- static int psb_output_init(struct drm_device *dev)
- {
-@@ -380,6 +380,7 @@ const struct psb_ops psb_chip_ops = {
- 
- 	.crtc_helper = &psb_intel_helper_funcs,
- 	.crtc_funcs = &psb_intel_crtc_funcs,
-+	.clock_funcs = &psb_clock_funcs,
- 
- 	.output_init = psb_output_init,
- 
---- /dev/null
-+++ b/drivers/gpu/drm/gma500/psb_device.h
-@@ -0,0 +1,24 @@
-+/*
-+ * Copyright © 2013 Patrik Jakobsson
-+ * Copyright © 2011 Intel Corporation
-+ *
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms and conditions of the GNU General Public License,
-+ * version 2, as published by the Free Software Foundation.
-+ *
-+ * This program is distributed in the hope it will be useful, but WITHOUT
-+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
-+ * more details.
-+ *
-+ * You should have received a copy of the GNU General Public License along with
-+ * this program; if not, write to the Free Software Foundation, Inc.,
-+ * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
-+ */
-+
-+#ifndef _PSB_DEVICE_H_
-+#define _PSB_DEVICE_H_
-+
-+extern const struct gma_clock_funcs psb_clock_funcs;
-+
-+#endif
---- a/drivers/gpu/drm/gma500/psb_intel_display.c
-+++ b/drivers/gpu/drm/gma500/psb_intel_display.c
-@@ -26,39 +26,13 @@
- #include "psb_drv.h"
- #include "psb_intel_drv.h"
- #include "psb_intel_reg.h"
--#include "psb_intel_display.h"
-+#include "gma_display.h"
- #include "power.h"
- 
--struct psb_intel_clock_t {
--	/* given values */
--	int n;
--	int m1, m2;
--	int p1, p2;
--	/* derived values */
--	int dot;
--	int vco;
--	int m;
--	int p;
--};
--
--struct psb_intel_range_t {
--	int min, max;
--};
--
--struct psb_intel_p2_t {
--	int dot_limit;
--	int p2_slow, p2_fast;
--};
--
--struct psb_intel_limit_t {
--	struct psb_intel_range_t dot, vco, n, m, m1, m2, p, p1;
--	struct psb_intel_p2_t p2;
--};
--
- #define INTEL_LIMIT_I9XX_SDVO_DAC   0
- #define INTEL_LIMIT_I9XX_LVDS	    1
- 
--static const struct psb_intel_limit_t psb_intel_limits[] = {
-+static const struct gma_limit_t psb_intel_limits[] = {
- 	{			/* INTEL_LIMIT_I9XX_SDVO_DAC */
- 	 .dot = {.min = 20000, .max = 400000},
- 	 .vco = {.min = 1400000, .max = 2800000},
-@@ -68,8 +42,8 @@ static const struct psb_intel_limit_t ps
- 	 .m2 = {.min = 3, .max = 7},
- 	 .p = {.min = 5, .max = 80},
- 	 .p1 = {.min = 1, .max = 8},
--	 .p2 = {.dot_limit = 200000,
--		.p2_slow = 10, .p2_fast = 5},
-+	 .p2 = {.dot_limit = 200000, .p2_slow = 10, .p2_fast = 5},
-+	 .find_pll = gma_find_best_pll,
- 	 },
- 	{			/* INTEL_LIMIT_I9XX_LVDS */
- 	 .dot = {.min = 20000, .max = 400000},
-@@ -83,23 +57,24 @@ static const struct psb_intel_limit_t ps
- 	 /* The single-channel range is 25-112Mhz, and dual-channel
- 	  * is 80-224Mhz.  Prefer single channel as much as possible.
- 	  */
--	 .p2 = {.dot_limit = 112000,
--		.p2_slow = 14, .p2_fast = 7},
-+	 .p2 = {.dot_limit = 112000, .p2_slow = 14, .p2_fast = 7},
-+	 .find_pll = gma_find_best_pll,
- 	 },
- };
- 
--static const struct psb_intel_limit_t *psb_intel_limit(struct drm_crtc *crtc)
-+static const struct gma_limit_t *psb_intel_limit(struct drm_crtc *crtc,
-+						 int refclk)
- {
--	const struct psb_intel_limit_t *limit;
-+	const struct gma_limit_t *limit;
- 
--	if (psb_intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS))
-+	if (gma_pipe_has_type(crtc, INTEL_OUTPUT_LVDS))
- 		limit = &psb_intel_limits[INTEL_LIMIT_I9XX_LVDS];
- 	else
- 		limit = &psb_intel_limits[INTEL_LIMIT_I9XX_SDVO_DAC];
- 	return limit;
- }
- 
--static void psb_intel_clock(int refclk, struct psb_intel_clock_t *clock)
-+static void psb_intel_clock(int refclk, struct gma_clock_t *clock)
- {
- 	clock->m = 5 * (clock->m1 + 2) + (clock->m2 + 2);
- 	clock->p = clock->p1 * clock->p2;
-@@ -107,130 +82,6 @@ static void psb_intel_clock(int refclk,
- 	clock->dot = clock->vco / clock->p;
- }
- 
--/**
-- * Returns whether any output on the specified pipe is of the specified type
-- */
--bool psb_intel_pipe_has_type(struct drm_crtc *crtc, int type)
--{
--	struct drm_device *dev = crtc->dev;
--	struct drm_mode_config *mode_config = &dev->mode_config;
--	struct drm_connector *l_entry;
--
--	list_for_each_entry(l_entry, &mode_config->connector_list, head) {
--		if (l_entry->encoder && l_entry->encoder->crtc == crtc) {
--			struct psb_intel_encoder *psb_intel_encoder =
--					psb_intel_attached_encoder(l_entry);
--			if (psb_intel_encoder->type == type)
--				return true;
--		}
--	}
--	return false;
--}
--
--#define INTELPllInvalid(s)   { /* ErrorF (s) */; return false; }
--/**
-- * Returns whether the given set of divisors are valid for a given refclk with
-- * the given connectors.
-- */
--
--static bool psb_intel_PLL_is_valid(struct drm_crtc *crtc,
--			       struct psb_intel_clock_t *clock)
--{
--	const struct psb_intel_limit_t *limit = psb_intel_limit(crtc);
--
--	if (clock->p1 < limit->p1.min || limit->p1.max < clock->p1)
--		INTELPllInvalid("p1 out of range\n");
--	if (clock->p < limit->p.min || limit->p.max < clock->p)
--		INTELPllInvalid("p out of range\n");
--	if (clock->m2 < limit->m2.min || limit->m2.max < clock->m2)
--		INTELPllInvalid("m2 out of range\n");
--	if (clock->m1 < limit->m1.min || limit->m1.max < clock->m1)
--		INTELPllInvalid("m1 out of range\n");
--	if (clock->m1 <= clock->m2)
--		INTELPllInvalid("m1 <= m2\n");
--	if (clock->m < limit->m.min || limit->m.max < clock->m)
--		INTELPllInvalid("m out of range\n");
--	if (clock->n < limit->n.min || limit->n.max < clock->n)
--		INTELPllInvalid("n out of range\n");
--	if (clock->vco < limit->vco.min || limit->vco.max < clock->vco)
--		INTELPllInvalid("vco out of range\n");
--	/* XXX: We may need to be checking "Dot clock"
--	 * depending on the multiplier, connector, etc.,
--	 * rather than just a single range.
--	 */
--	if (clock->dot < limit->dot.min || limit->dot.max < clock->dot)
--		INTELPllInvalid("dot out of range\n");
--
--	return true;
--}
--
--/**
-- * Returns a set of divisors for the desired target clock with the given
-- * refclk, or FALSE.  The returned values represent the clock equation:
-- * reflck * (5 * (m1 + 2) + (m2 + 2)) / (n + 2) / p1 / p2.
-- */
--static bool psb_intel_find_best_PLL(struct drm_crtc *crtc, int target,
--				int refclk,
--				struct psb_intel_clock_t *best_clock)
--{
--	struct drm_device *dev = crtc->dev;
--	struct psb_intel_clock_t clock;
--	const struct psb_intel_limit_t *limit = psb_intel_limit(crtc);
--	int err = target;
--
--	if (psb_intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS) &&
--	    (REG_READ(LVDS) & LVDS_PORT_EN) != 0) {
--		/*
--		 * For LVDS, if the panel is on, just rely on its current
--		 * settings for dual-channel.  We haven't figured out how to
--		 * reliably set up different single/dual channel state, if we
--		 * even can.
--		 */
--		if ((REG_READ(LVDS) & LVDS_CLKB_POWER_MASK) ==
--		    LVDS_CLKB_POWER_UP)
--			clock.p2 = limit->p2.p2_fast;
--		else
--			clock.p2 = limit->p2.p2_slow;
--	} else {
--		if (target < limit->p2.dot_limit)
--			clock.p2 = limit->p2.p2_slow;
--		else
--			clock.p2 = limit->p2.p2_fast;
--	}
--
--	memset(best_clock, 0, sizeof(*best_clock));
--
--	for (clock.m1 = limit->m1.min; clock.m1 <= limit->m1.max;
--	     clock.m1++) {
--		for (clock.m2 = limit->m2.min;
--		     clock.m2 < clock.m1 && clock.m2 <= limit->m2.max;
--		     clock.m2++) {
--			for (clock.n = limit->n.min;
--			     clock.n <= limit->n.max; clock.n++) {
--				for (clock.p1 = limit->p1.min;
--				     clock.p1 <= limit->p1.max;
--				     clock.p1++) {
--					int this_err;
--
--					psb_intel_clock(refclk, &clock);
--
--					if (!psb_intel_PLL_is_valid
--					    (crtc, &clock))
--						continue;
--
--					this_err = abs(clock.dot - target);
--					if (this_err < err) {
--						*best_clock = clock;
--						err = this_err;
--					}
--				}
--			}
--		}
--	}
--
--	return err != target;
--}
--
- void psb_intel_wait_for_vblank(struct drm_device *dev)
- {
- 	/* Wait for 20ms, i.e. one cycle at 50hz. */
-@@ -484,12 +335,13 @@ static int psb_intel_crtc_mode_set(struc
- 	int pipe = psb_intel_crtc->pipe;
- 	const struct psb_offset *map = &dev_priv->regmap[pipe];
- 	int refclk;
--	struct psb_intel_clock_t clock;
-+	struct gma_clock_t clock;
- 	u32 dpll = 0, fp = 0, dspcntr, pipeconf;
- 	bool ok, is_sdvo = false;
- 	bool is_lvds = false, is_tv = false;
- 	struct drm_mode_config *mode_config = &dev->mode_config;
- 	struct drm_connector *connector;
-+	const struct gma_limit_t *limit;
- 
- 	/* No scan out no play */
- 	if (crtc->fb == NULL) {
-@@ -520,10 +372,13 @@ static int psb_intel_crtc_mode_set(struc
- 
- 	refclk = 96000;
- 
--	ok = psb_intel_find_best_PLL(crtc, adjusted_mode->clock, refclk,
-+	limit = psb_intel_crtc->clock_funcs->limit(crtc, refclk);
-+
-+	ok = limit->find_pll(limit, crtc, adjusted_mode->clock, refclk,
- 				 &clock);
- 	if (!ok) {
--		dev_err(dev->dev, "Couldn't find PLL settings for mode!\n");
-+		DRM_ERROR("Couldn't find PLL settings for mode! target: %d, actual: %d",
-+			  adjusted_mode->clock, clock.dot);
- 		return 0;
- 	}
- 
-@@ -1022,7 +877,7 @@ static int psb_intel_crtc_clock_get(stru
- 	const struct psb_offset *map = &dev_priv->regmap[pipe];
- 	u32 dpll;
- 	u32 fp;
--	struct psb_intel_clock_t clock;
-+	struct gma_clock_t clock;
- 	bool is_lvds;
- 	struct psb_pipe *p = &dev_priv->regs.pipe[pipe];
- 
-@@ -1190,6 +1045,12 @@ const struct drm_crtc_funcs psb_intel_cr
- 	.destroy = psb_intel_crtc_destroy,
- };
- 
-+const struct gma_clock_funcs psb_clock_funcs = {
-+	.clock = psb_intel_clock,
-+	.limit = psb_intel_limit,
-+	.pll_is_valid = gma_pll_is_valid,
-+};
-+
- /*
-  * Set the default value of cursor control and base register
-  * to zero. This is a workaround for h/w defect on Oaktrail
---- a/drivers/gpu/drm/gma500/psb_intel_display.h
-+++ b/drivers/gpu/drm/gma500/psb_intel_display.h
-@@ -20,6 +20,4 @@
- #ifndef _INTEL_DISPLAY_H_
- #define _INTEL_DISPLAY_H_
- 
--bool psb_intel_pipe_has_type(struct drm_crtc *crtc, int type);
--
- #endif
diff --git a/patches.gma500/0005-drm-gma500-Remove-the-unused-psb_intel_display.h.patch b/patches.gma500/0005-drm-gma500-Remove-the-unused-psb_intel_display.h.patch
deleted file mode 100644
index 75352829a1488..0000000000000
--- a/patches.gma500/0005-drm-gma500-Remove-the-unused-psb_intel_display.h.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From bc4141913f69e2b63a2961df2f4c921d3990754e Mon Sep 17 00:00:00 2001
-From: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-Date: Mon, 1 Jul 2013 23:14:58 +0200
-Subject: drm/gma500: Remove the unused psb_intel_display.h
-
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-(cherry picked from commit f0e9d89b9b7f3c4b1d21ca2e0d25e3ebe5d2a1d2)
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
----
- drivers/gpu/drm/gma500/psb_intel_display.h |   23 -----------------------
- 1 file changed, 23 deletions(-)
- delete mode 100644 drivers/gpu/drm/gma500/psb_intel_display.h
-
---- a/drivers/gpu/drm/gma500/psb_intel_display.h
-+++ /dev/null
-@@ -1,23 +0,0 @@
--/* copyright (c) 2008, Intel Corporation
-- *
-- * This program is free software; you can redistribute it and/or modify it
-- * under the terms and conditions of the GNU General Public License,
-- * version 2, as published by the Free Software Foundation.
-- *
-- * This program is distributed in the hope it will be useful, but WITHOUT
-- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
-- * more details.
-- *
-- * You should have received a copy of the GNU General Public License along with
-- * this program; if not, write to the Free Software Foundation, Inc.,
-- * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
-- *
-- * Authors:
-- * Eric Anholt <eric@anholt.net>
-- */
--
--#ifndef _INTEL_DISPLAY_H_
--#define _INTEL_DISPLAY_H_
--
--#endif
diff --git a/patches.gma500/0006-drm-gma500-Add-generic-pipe-crtc-functions.patch b/patches.gma500/0006-drm-gma500-Add-generic-pipe-crtc-functions.patch
deleted file mode 100644
index 76c364500cc94..0000000000000
--- a/patches.gma500/0006-drm-gma500-Add-generic-pipe-crtc-functions.patch
+++ /dev/null
@@ -1,378 +0,0 @@
-From b302ccd0260d27ed03ad8e2c955c5c02408671b6 Mon Sep 17 00:00:00 2001
-From: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-Date: Fri, 5 Jul 2013 16:41:49 +0200
-Subject: drm/gma500: Add generic pipe/crtc functions
-
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-(cherry picked from commit 2eff0b3359c097bbcfe4850dfdf9c94e514ddfee)
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
----
- drivers/gpu/drm/gma500/gma_display.c |  326 +++++++++++++++++++++++++++++++++++
- drivers/gpu/drm/gma500/gma_display.h |   14 +
- 2 files changed, 340 insertions(+)
-
---- a/drivers/gpu/drm/gma500/gma_display.c
-+++ b/drivers/gpu/drm/gma500/gma_display.c
-@@ -24,6 +24,7 @@
- #include "psb_intel_drv.h"
- #include "psb_intel_reg.h"
- #include "psb_drv.h"
-+#include "framebuffer.h"
- 
- /**
-  * Returns whether any output on the specified pipe is of the specified type
-@@ -46,6 +47,331 @@ bool gma_pipe_has_type(struct drm_crtc *
- 	return false;
- }
- 
-+void gma_wait_for_vblank(struct drm_device *dev)
-+{
-+	/* Wait for 20ms, i.e. one cycle at 50hz. */
-+	mdelay(20);
-+}
-+
-+int gma_pipe_set_base(struct drm_crtc *crtc, int x, int y,
-+		      struct drm_framebuffer *old_fb)
-+{
-+	struct drm_device *dev = crtc->dev;
-+	struct drm_psb_private *dev_priv = dev->dev_private;
-+	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
-+	struct psb_framebuffer *psbfb = to_psb_fb(crtc->fb);
-+	int pipe = psb_intel_crtc->pipe;
-+	const struct psb_offset *map = &dev_priv->regmap[pipe];
-+	unsigned long start, offset;
-+	u32 dspcntr;
-+	int ret = 0;
-+
-+	if (!gma_power_begin(dev, true))
-+		return 0;
-+
-+	/* no fb bound */
-+	if (!crtc->fb) {
-+		dev_err(dev->dev, "No FB bound\n");
-+		goto gma_pipe_cleaner;
-+	}
-+
-+	/* We are displaying this buffer, make sure it is actually loaded
-+	   into the GTT */
-+	ret = psb_gtt_pin(psbfb->gtt);
-+	if (ret < 0)
-+		goto gma_pipe_set_base_exit;
-+	start = psbfb->gtt->offset;
-+	offset = y * crtc->fb->pitches[0] + x * (crtc->fb->bits_per_pixel / 8);
-+
-+	REG_WRITE(map->stride, crtc->fb->pitches[0]);
-+
-+	dspcntr = REG_READ(map->cntr);
-+	dspcntr &= ~DISPPLANE_PIXFORMAT_MASK;
-+
-+	switch (crtc->fb->bits_per_pixel) {
-+	case 8:
-+		dspcntr |= DISPPLANE_8BPP;
-+		break;
-+	case 16:
-+		if (crtc->fb->depth == 15)
-+			dspcntr |= DISPPLANE_15_16BPP;
-+		else
-+			dspcntr |= DISPPLANE_16BPP;
-+		break;
-+	case 24:
-+	case 32:
-+		dspcntr |= DISPPLANE_32BPP_NO_ALPHA;
-+		break;
-+	default:
-+		dev_err(dev->dev, "Unknown color depth\n");
-+		ret = -EINVAL;
-+		goto gma_pipe_set_base_exit;
-+	}
-+	REG_WRITE(map->cntr, dspcntr);
-+
-+	dev_dbg(dev->dev,
-+		"Writing base %08lX %08lX %d %d\n", start, offset, x, y);
-+
-+	/* FIXME: Investigate whether this really is the base for psb and why
-+		  the linear offset is named base for the other chips. map->surf
-+		  should be the base and map->linoff the offset for all chips */
-+	if (IS_PSB(dev)) {
-+		REG_WRITE(map->base, offset + start);
-+		REG_READ(map->base);
-+	} else {
-+		REG_WRITE(map->base, offset);
-+		REG_READ(map->base);
-+		REG_WRITE(map->surf, start);
-+		REG_READ(map->surf);
-+	}
-+
-+gma_pipe_cleaner:
-+	/* If there was a previous display we can now unpin it */
-+	if (old_fb)
-+		psb_gtt_unpin(to_psb_fb(old_fb)->gtt);
-+
-+gma_pipe_set_base_exit:
-+	gma_power_end(dev);
-+	return ret;
-+}
-+
-+/* Loads the palette/gamma unit for the CRTC with the prepared values */
-+void gma_crtc_load_lut(struct drm_crtc *crtc)
-+{
-+	struct drm_device *dev = crtc->dev;
-+	struct drm_psb_private *dev_priv = dev->dev_private;
-+	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
-+	const struct psb_offset *map = &dev_priv->regmap[psb_intel_crtc->pipe];
-+	int palreg = map->palette;
-+	int i;
-+
-+	/* The clocks have to be on to load the palette. */
-+	if (!crtc->enabled)
-+		return;
-+
-+	if (gma_power_begin(dev, false)) {
-+		for (i = 0; i < 256; i++) {
-+			REG_WRITE(palreg + 4 * i,
-+				  ((psb_intel_crtc->lut_r[i] +
-+				  psb_intel_crtc->lut_adj[i]) << 16) |
-+				  ((psb_intel_crtc->lut_g[i] +
-+				  psb_intel_crtc->lut_adj[i]) << 8) |
-+				  (psb_intel_crtc->lut_b[i] +
-+				  psb_intel_crtc->lut_adj[i]));
-+		}
-+		gma_power_end(dev);
-+	} else {
-+		for (i = 0; i < 256; i++) {
-+			/* FIXME: Why pipe[0] and not pipe[..._crtc->pipe]? */
-+			dev_priv->regs.pipe[0].palette[i] =
-+				  ((psb_intel_crtc->lut_r[i] +
-+				  psb_intel_crtc->lut_adj[i]) << 16) |
-+				  ((psb_intel_crtc->lut_g[i] +
-+				  psb_intel_crtc->lut_adj[i]) << 8) |
-+				  (psb_intel_crtc->lut_b[i] +
-+				  psb_intel_crtc->lut_adj[i]);
-+		}
-+
-+	}
-+}
-+
-+void gma_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green, u16 *blue,
-+			u32 start, u32 size)
-+{
-+	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
-+	int i;
-+	int end = (start + size > 256) ? 256 : start + size;
-+
-+	for (i = start; i < end; i++) {
-+		psb_intel_crtc->lut_r[i] = red[i] >> 8;
-+		psb_intel_crtc->lut_g[i] = green[i] >> 8;
-+		psb_intel_crtc->lut_b[i] = blue[i] >> 8;
-+	}
-+
-+	gma_crtc_load_lut(crtc);
-+}
-+
-+/**
-+ * Sets the power management mode of the pipe and plane.
-+ *
-+ * This code should probably grow support for turning the cursor off and back
-+ * on appropriately at the same time as we're turning the pipe off/on.
-+ */
-+void gma_crtc_dpms(struct drm_crtc *crtc, int mode)
-+{
-+	struct drm_device *dev = crtc->dev;
-+	struct drm_psb_private *dev_priv = dev->dev_private;
-+	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
-+	int pipe = psb_intel_crtc->pipe;
-+	const struct psb_offset *map = &dev_priv->regmap[pipe];
-+	u32 temp;
-+
-+	/* XXX: When our outputs are all unaware of DPMS modes other than off
-+	 * and on, we should map those modes to DRM_MODE_DPMS_OFF in the CRTC.
-+	 */
-+
-+	/* FIXME: Uncomment this when we move cdv to generic dpms
-+	if (IS_CDV(dev))
-+		cdv_intel_disable_self_refresh(dev);
-+	*/
-+
-+	switch (mode) {
-+	case DRM_MODE_DPMS_ON:
-+	case DRM_MODE_DPMS_STANDBY:
-+	case DRM_MODE_DPMS_SUSPEND:
-+		if (psb_intel_crtc->active)
-+			break;
-+
-+		psb_intel_crtc->active = true;
-+
-+		/* Enable the DPLL */
-+		temp = REG_READ(map->dpll);
-+		if ((temp & DPLL_VCO_ENABLE) == 0) {
-+			REG_WRITE(map->dpll, temp);
-+			REG_READ(map->dpll);
-+			/* Wait for the clocks to stabilize. */
-+			udelay(150);
-+			REG_WRITE(map->dpll, temp | DPLL_VCO_ENABLE);
-+			REG_READ(map->dpll);
-+			/* Wait for the clocks to stabilize. */
-+			udelay(150);
-+			REG_WRITE(map->dpll, temp | DPLL_VCO_ENABLE);
-+			REG_READ(map->dpll);
-+			/* Wait for the clocks to stabilize. */
-+			udelay(150);
-+		}
-+
-+		/* Enable the plane */
-+		temp = REG_READ(map->cntr);
-+		if ((temp & DISPLAY_PLANE_ENABLE) == 0) {
-+			REG_WRITE(map->cntr,
-+				  temp | DISPLAY_PLANE_ENABLE);
-+			/* Flush the plane changes */
-+			REG_WRITE(map->base, REG_READ(map->base));
-+		}
-+
-+		udelay(150);
-+
-+		/* Enable the pipe */
-+		temp = REG_READ(map->conf);
-+		if ((temp & PIPEACONF_ENABLE) == 0)
-+			REG_WRITE(map->conf, temp | PIPEACONF_ENABLE);
-+
-+		temp = REG_READ(map->status);
-+		temp &= ~(0xFFFF);
-+		temp |= PIPE_FIFO_UNDERRUN;
-+		REG_WRITE(map->status, temp);
-+		REG_READ(map->status);
-+
-+		gma_crtc_load_lut(crtc);
-+
-+		/* Give the overlay scaler a chance to enable
-+		 * if it's on this pipe */
-+		/* psb_intel_crtc_dpms_video(crtc, true); TODO */
-+		break;
-+	case DRM_MODE_DPMS_OFF:
-+		if (!psb_intel_crtc->active)
-+			break;
-+
-+		psb_intel_crtc->active = false;
-+
-+		/* Give the overlay scaler a chance to disable
-+		 * if it's on this pipe */
-+		/* psb_intel_crtc_dpms_video(crtc, FALSE); TODO */
-+
-+		/* Disable the VGA plane that we never use */
-+		REG_WRITE(VGACNTRL, VGA_DISP_DISABLE);
-+
-+		/* Turn off vblank interrupts */
-+		drm_vblank_off(dev, pipe);
-+
-+		/* Wait for vblank for the disable to take effect */
-+		gma_wait_for_vblank(dev);
-+
-+		/* Disable plane */
-+		temp = REG_READ(map->cntr);
-+		if ((temp & DISPLAY_PLANE_ENABLE) != 0) {
-+			REG_WRITE(map->cntr,
-+				  temp & ~DISPLAY_PLANE_ENABLE);
-+			/* Flush the plane changes */
-+			REG_WRITE(map->base, REG_READ(map->base));
-+			REG_READ(map->base);
-+		}
-+
-+		/* Disable pipe */
-+		temp = REG_READ(map->conf);
-+		if ((temp & PIPEACONF_ENABLE) != 0) {
-+			REG_WRITE(map->conf, temp & ~PIPEACONF_ENABLE);
-+			REG_READ(map->conf);
-+		}
-+
-+		/* Wait for vblank for the disable to take effect. */
-+		gma_wait_for_vblank(dev);
-+
-+		udelay(150);
-+
-+		/* Disable DPLL */
-+		temp = REG_READ(map->dpll);
-+		if ((temp & DPLL_VCO_ENABLE) != 0) {
-+			REG_WRITE(map->dpll, temp & ~DPLL_VCO_ENABLE);
-+			REG_READ(map->dpll);
-+		}
-+
-+		/* Wait for the clocks to turn off. */
-+		udelay(150);
-+		break;
-+	}
-+
-+	/* FIXME: Uncomment this when we move cdv to generic dpms
-+	if (IS_CDV(dev))
-+		cdv_intel_update_watermark(dev, crtc);
-+	*/
-+
-+	/* Set FIFO watermarks */
-+	REG_WRITE(DSPARB, 0x3F3E);
-+}
-+
-+bool gma_crtc_mode_fixup(struct drm_crtc *crtc,
-+			 const struct drm_display_mode *mode,
-+			 struct drm_display_mode *adjusted_mode)
-+{
-+	return true;
-+}
-+
-+void gma_crtc_prepare(struct drm_crtc *crtc)
-+{
-+	struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private;
-+	crtc_funcs->dpms(crtc, DRM_MODE_DPMS_OFF);
-+}
-+
-+void gma_crtc_commit(struct drm_crtc *crtc)
-+{
-+	struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private;
-+	crtc_funcs->dpms(crtc, DRM_MODE_DPMS_ON);
-+}
-+
-+void gma_crtc_disable(struct drm_crtc *crtc)
-+{
-+	struct gtt_range *gt;
-+	struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private;
-+
-+	crtc_funcs->dpms(crtc, DRM_MODE_DPMS_OFF);
-+
-+	if (crtc->fb) {
-+		gt = to_psb_fb(crtc->fb)->gtt;
-+		psb_gtt_unpin(gt);
-+	}
-+}
-+
-+void gma_crtc_destroy(struct drm_crtc *crtc)
-+{
-+	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
-+
-+	kfree(psb_intel_crtc->crtc_state);
-+	drm_crtc_cleanup(crtc);
-+	kfree(psb_intel_crtc);
-+}
-+
- #define GMA_PLL_INVALID(s) { /* DRM_ERROR(s); */ return false; }
- 
- bool gma_pll_is_valid(struct drm_crtc *crtc,
---- a/drivers/gpu/drm/gma500/gma_display.h
-+++ b/drivers/gpu/drm/gma500/gma_display.h
-@@ -61,6 +61,20 @@ struct gma_clock_funcs {
- 
- /* Common pipe related functions */
- extern bool gma_pipe_has_type(struct drm_crtc *crtc, int type);
-+extern void gma_wait_for_vblank(struct drm_device *dev);
-+extern int gma_pipe_set_base(struct drm_crtc *crtc, int x, int y,
-+			     struct drm_framebuffer *old_fb);
-+extern void gma_crtc_load_lut(struct drm_crtc *crtc);
-+extern void gma_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green,
-+			       u16 *blue, u32 start, u32 size);
-+extern void gma_crtc_dpms(struct drm_crtc *crtc, int mode);
-+extern bool gma_crtc_mode_fixup(struct drm_crtc *crtc,
-+				const struct drm_display_mode *mode,
-+				struct drm_display_mode *adjusted_mode);
-+extern void gma_crtc_prepare(struct drm_crtc *crtc);
-+extern void gma_crtc_commit(struct drm_crtc *crtc);
-+extern void gma_crtc_disable(struct drm_crtc *crtc);
-+extern void gma_crtc_destroy(struct drm_crtc *crtc);
- 
- /* Common clock related functions */
- extern const struct gma_limit_t *gma_limit(struct drm_crtc *crtc, int refclk);
diff --git a/patches.gma500/0007-drm-gma500-cdv-Use-identical-generic-crtc-funcs.patch b/patches.gma500/0007-drm-gma500-cdv-Use-identical-generic-crtc-funcs.patch
deleted file mode 100644
index 7bb685ce22a3d..0000000000000
--- a/patches.gma500/0007-drm-gma500-cdv-Use-identical-generic-crtc-funcs.patch
+++ /dev/null
@@ -1,203 +0,0 @@
-From 18ecae097760c83e2428a2bb93aeabab20df280d Mon Sep 17 00:00:00 2001
-From: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-Date: Tue, 9 Jul 2013 20:03:01 +0200
-Subject: drm/gma500/cdv: Use identical generic crtc funcs
-
-This patch makes cdv use the gma_xxx counterparts that are identical. I
-took them in one sweep as they should not cause any regressions.
-
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-(cherry picked from commit ad3c46eae3f51b34adea55e0625d255b21ec0a15)
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
----
- drivers/gpu/drm/gma500/cdv_device.h        |    9 ---
- drivers/gpu/drm/gma500/cdv_intel_display.c |   74 ++++++-----------------------
- 2 files changed, 16 insertions(+), 67 deletions(-)
-
---- a/drivers/gpu/drm/gma500/cdv_device.h
-+++ b/drivers/gpu/drm/gma500/cdv_device.h
-@@ -26,12 +26,3 @@ extern void cdv_hdmi_init(struct drm_dev
- 			int reg);
- extern struct drm_display_mode *cdv_intel_crtc_mode_get(struct drm_device *dev,
- 					     struct drm_crtc *crtc);
--
--static inline void cdv_intel_wait_for_vblank(struct drm_device *dev)
--{
--	/* Wait for 20ms, i.e. one cycle at 50hz. */
--        /* FIXME: msleep ?? */
--	mdelay(20);
--}
--
--
---- a/drivers/gpu/drm/gma500/cdv_intel_display.c
-+++ b/drivers/gpu/drm/gma500/cdv_intel_display.c
-@@ -595,7 +595,7 @@ static void cdv_intel_disable_self_refre
- 		REG_WRITE(FW_BLC_SELF, (REG_READ(FW_BLC_SELF) & ~FW_BLC_SELF_EN));
- 		REG_READ(FW_BLC_SELF);
- 
--		cdv_intel_wait_for_vblank(dev);
-+		gma_wait_for_vblank(dev);
- 
- 		/* Cedarview workaround to write ovelay plane, which force to leave
- 		 * MAX_FIFO state.
-@@ -603,7 +603,7 @@ static void cdv_intel_disable_self_refre
- 		REG_WRITE(OV_OVADD, 0/*dev_priv->ovl_offset*/);
- 		REG_READ(OV_OVADD);
- 
--		cdv_intel_wait_for_vblank(dev);
-+		gma_wait_for_vblank(dev);
- 	}
- 
- }
-@@ -644,12 +644,12 @@ static void cdv_intel_update_watermark (
- 
- 		REG_WRITE(DSPFW6, 0x10);
- 
--		cdv_intel_wait_for_vblank(dev);
-+		gma_wait_for_vblank(dev);
- 
- 		/* enable self-refresh for single pipe active */
- 		REG_WRITE(FW_BLC_SELF, FW_BLC_SELF_EN);
- 		REG_READ(FW_BLC_SELF);
--		cdv_intel_wait_for_vblank(dev);
-+		gma_wait_for_vblank(dev);
- 
- 	} else {
- 
-@@ -661,7 +661,7 @@ static void cdv_intel_update_watermark (
- 		REG_WRITE(DSPFW5, 0x01010101);
- 		REG_WRITE(DSPFW6, 0x1d0);
- 
--		cdv_intel_wait_for_vblank(dev);
-+		gma_wait_for_vblank(dev);
- 
- 		cdv_intel_disable_self_refresh(dev);
- 	
-@@ -812,7 +812,7 @@ static void cdv_intel_crtc_dpms(struct d
- 
- 		drm_vblank_off(dev, pipe);
- 		/* Wait for vblank for the disable to take effect */
--		cdv_intel_wait_for_vblank(dev);
-+		gma_wait_for_vblank(dev);
- 
- 		/* Next, disable display pipes */
- 		temp = REG_READ(map->conf);
-@@ -822,7 +822,7 @@ static void cdv_intel_crtc_dpms(struct d
- 		}
- 
- 		/* Wait for vblank for the disable to take effect. */
--		cdv_intel_wait_for_vblank(dev);
-+		gma_wait_for_vblank(dev);
- 
- 		udelay(150);
- 
-@@ -851,26 +851,6 @@ static void cdv_intel_crtc_dpms(struct d
- 	REG_WRITE(DSPARB, 0x3F3E);
- }
- 
--static void cdv_intel_crtc_prepare(struct drm_crtc *crtc)
--{
--	struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private;
--	crtc_funcs->dpms(crtc, DRM_MODE_DPMS_OFF);
--}
--
--static void cdv_intel_crtc_commit(struct drm_crtc *crtc)
--{
--	struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private;
--	crtc_funcs->dpms(crtc, DRM_MODE_DPMS_ON);
--}
--
--static bool cdv_intel_crtc_mode_fixup(struct drm_crtc *crtc,
--				  const struct drm_display_mode *mode,
--				  struct drm_display_mode *adjusted_mode)
--{
--	return true;
--}
--
--
- /**
-  * Return the pipe currently connected to the panel fitter,
-  * or -1 if the panel fitter is not present or not in use
-@@ -1129,7 +1109,7 @@ static int cdv_intel_crtc_mode_set(struc
- 	REG_WRITE(map->conf, pipeconf);
- 	REG_READ(map->conf);
- 
--	cdv_intel_wait_for_vblank(dev);
-+	gma_wait_for_vblank(dev);
- 
- 	REG_WRITE(map->cntr, dspcntr);
- 
-@@ -1140,7 +1120,7 @@ static int cdv_intel_crtc_mode_set(struc
- 		crtc_funcs->mode_set_base(crtc, x, y, old_fb);
- 	}
- 
--	cdv_intel_wait_for_vblank(dev);
-+	gma_wait_for_vblank(dev);
- 
- 	return 0;
- }
-@@ -1301,12 +1281,12 @@ static void cdv_intel_crtc_restore(struc
- 	REG_WRITE(map->base, crtc_state->saveDSPBASE);
- 	REG_WRITE(map->conf, crtc_state->savePIPECONF);
- 
--	cdv_intel_wait_for_vblank(dev);
-+	gma_wait_for_vblank(dev);
- 
- 	REG_WRITE(map->cntr, crtc_state->saveDSPCNTR);
- 	REG_WRITE(map->base, crtc_state->saveDSPBASE);
- 
--	cdv_intel_wait_for_vblank(dev);
-+	gma_wait_for_vblank(dev);
- 
- 	paletteReg = map->palette;
- 	for (i = 0; i < 256; ++i)
-@@ -1612,36 +1592,14 @@ struct drm_display_mode *cdv_intel_crtc_
- 	return mode;
- }
- 
--static void cdv_intel_crtc_destroy(struct drm_crtc *crtc)
--{
--	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
--
--	kfree(psb_intel_crtc->crtc_state);
--	drm_crtc_cleanup(crtc);
--	kfree(psb_intel_crtc);
--}
--
--static void cdv_intel_crtc_disable(struct drm_crtc *crtc)
--{
--	struct gtt_range *gt;
--	struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private;
--
--	crtc_funcs->dpms(crtc, DRM_MODE_DPMS_OFF);
--
--	if (crtc->fb) {
--		gt = to_psb_fb(crtc->fb)->gtt;
--		psb_gtt_unpin(gt);
--	}
--}
--
- const struct drm_crtc_helper_funcs cdv_intel_helper_funcs = {
- 	.dpms = cdv_intel_crtc_dpms,
--	.mode_fixup = cdv_intel_crtc_mode_fixup,
-+	.mode_fixup = gma_crtc_mode_fixup,
- 	.mode_set = cdv_intel_crtc_mode_set,
- 	.mode_set_base = cdv_intel_pipe_set_base,
--	.prepare = cdv_intel_crtc_prepare,
--	.commit = cdv_intel_crtc_commit,
--	.disable = cdv_intel_crtc_disable,
-+	.prepare = gma_crtc_prepare,
-+	.commit = gma_crtc_commit,
-+	.disable = gma_crtc_disable,
- };
- 
- const struct drm_crtc_funcs cdv_intel_crtc_funcs = {
-@@ -1651,7 +1609,7 @@ const struct drm_crtc_funcs cdv_intel_cr
- 	.cursor_move = cdv_intel_crtc_cursor_move,
- 	.gamma_set = cdv_intel_crtc_gamma_set,
- 	.set_config = cdv_crtc_set_config,
--	.destroy = cdv_intel_crtc_destroy,
-+	.destroy = gma_crtc_destroy,
- };
- 
- const struct gma_clock_funcs cdv_clock_funcs = {
diff --git a/patches.gma500/0008-drm-gma500-Make-all-chips-use-gma_wait_for_vblank.patch b/patches.gma500/0008-drm-gma500-Make-all-chips-use-gma_wait_for_vblank.patch
deleted file mode 100644
index 6e05f795c741c..0000000000000
--- a/patches.gma500/0008-drm-gma500-Make-all-chips-use-gma_wait_for_vblank.patch
+++ /dev/null
@@ -1,206 +0,0 @@
-From 0fe97c7ececa5575b1f89c811a5a8a8c24cc2e2d Mon Sep 17 00:00:00 2001
-From: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-Date: Wed, 10 Jul 2013 01:20:19 +0200
-Subject: drm/gma500: Make all chips use gma_wait_for_vblank
-
-Also remove the duplicated oaktrail function.
-
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-(cherry picked from commit d1fa08f3bacb6fc9a7642c85a4fa8976a3f1afac)
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
----
- drivers/gpu/drm/gma500/cdv_intel_dp.c        |    3 ++-
- drivers/gpu/drm/gma500/mdfld_intel_display.c |    6 +++---
- drivers/gpu/drm/gma500/oaktrail_crtc.c       |    6 +++---
- drivers/gpu/drm/gma500/oaktrail_hdmi.c       |   12 +++---------
- drivers/gpu/drm/gma500/psb_intel_display.c   |   16 +++++-----------
- drivers/gpu/drm/gma500/psb_intel_drv.h       |    1 -
- drivers/gpu/drm/gma500/psb_intel_sdvo.c      |    2 +-
- 7 files changed, 17 insertions(+), 29 deletions(-)
-
---- a/drivers/gpu/drm/gma500/cdv_intel_dp.c
-+++ b/drivers/gpu/drm/gma500/cdv_intel_dp.c
-@@ -34,6 +34,7 @@
- #include "psb_drv.h"
- #include "psb_intel_drv.h"
- #include "psb_intel_reg.h"
-+#include "gma_display.h"
- #include <drm/drm_dp_helper.h>
- 
- #define _wait_for(COND, MS, W) ({ \
-@@ -1317,7 +1318,7 @@ cdv_intel_dp_start_link_train(struct psb
- 	/* Enable output, wait for it to become active */
- 	REG_WRITE(intel_dp->output_reg, reg);
- 	REG_READ(intel_dp->output_reg);
--	psb_intel_wait_for_vblank(dev);
-+	gma_wait_for_vblank(dev);
- 
- 	DRM_DEBUG_KMS("Link config\n");
- 	/* Write the link configuration data */
---- a/drivers/gpu/drm/gma500/mdfld_intel_display.c
-+++ b/drivers/gpu/drm/gma500/mdfld_intel_display.c
-@@ -65,7 +65,7 @@ void mdfldWaitForPipeDisable(struct drm_
- 	}
- 
- 	/* FIXME JLIU7_PO */
--	psb_intel_wait_for_vblank(dev);
-+	gma_wait_for_vblank(dev);
- 	return;
- 
- 	/* Wait for for the pipe disable to take effect. */
-@@ -93,7 +93,7 @@ void mdfldWaitForPipeEnable(struct drm_d
- 	}
- 
- 	/* FIXME JLIU7_PO */
--	psb_intel_wait_for_vblank(dev);
-+	gma_wait_for_vblank(dev);
- 	return;
- 
- 	/* Wait for for the pipe enable to take effect. */
-@@ -1034,7 +1034,7 @@ static int mdfld_crtc_mode_set(struct dr
- 
- 	/* Wait for for the pipe enable to take effect. */
- 	REG_WRITE(map->cntr, dev_priv->dspcntr[pipe]);
--	psb_intel_wait_for_vblank(dev);
-+	gma_wait_for_vblank(dev);
- 
- mrst_crtc_mode_set_exit:
- 
---- a/drivers/gpu/drm/gma500/oaktrail_crtc.c
-+++ b/drivers/gpu/drm/gma500/oaktrail_crtc.c
-@@ -242,7 +242,7 @@ static void oaktrail_crtc_dpms(struct dr
- 			REG_READ(map->conf);
- 		}
- 		/* Wait for for the pipe disable to take effect. */
--		psb_intel_wait_for_vblank(dev);
-+		gma_wait_for_vblank(dev);
- 
- 		temp = REG_READ(map->dpll);
- 		if ((temp & DPLL_VCO_ENABLE) != 0) {
-@@ -484,10 +484,10 @@ static int oaktrail_crtc_mode_set(struct
- 
- 	REG_WRITE(map->conf, pipeconf);
- 	REG_READ(map->conf);
--	psb_intel_wait_for_vblank(dev);
-+	gma_wait_for_vblank(dev);
- 
- 	REG_WRITE(map->cntr, dspcntr);
--	psb_intel_wait_for_vblank(dev);
-+	gma_wait_for_vblank(dev);
- 
- oaktrail_crtc_mode_set_exit:
- 	gma_power_end(dev);
---- a/drivers/gpu/drm/gma500/oaktrail_hdmi.c
-+++ b/drivers/gpu/drm/gma500/oaktrail_hdmi.c
-@@ -155,12 +155,6 @@ static void oaktrail_hdmi_audio_disable(
- 	HDMI_READ(HDMI_HCR);
- }
- 
--static void wait_for_vblank(struct drm_device *dev)
--{
--	/* Wait for 20ms, i.e. one cycle at 50hz. */
--	mdelay(20);
--}
--
- static unsigned int htotal_calculate(struct drm_display_mode *mode)
- {
- 	u32 htotal, new_crtc_htotal;
-@@ -372,10 +366,10 @@ int oaktrail_crtc_hdmi_mode_set(struct d
- 
- 	REG_WRITE(PCH_PIPEBCONF, pipeconf);
- 	REG_READ(PCH_PIPEBCONF);
--	wait_for_vblank(dev);
-+	gma_wait_for_vblank(dev);
- 
- 	REG_WRITE(dspcntr_reg, dspcntr);
--	wait_for_vblank(dev);
-+	gma_wait_for_vblank(dev);
- 
- 	gma_power_end(dev);
- 
-@@ -459,7 +453,7 @@ void oaktrail_crtc_hdmi_dpms(struct drm_
- 			REG_READ(PCH_PIPEBCONF);
- 		}
- 
--		wait_for_vblank(dev);
-+		gma_wait_for_vblank(dev);
- 
- 		/* Enable plane */
- 		temp = REG_READ(DSPBCNTR);
---- a/drivers/gpu/drm/gma500/psb_intel_display.c
-+++ b/drivers/gpu/drm/gma500/psb_intel_display.c
-@@ -82,12 +82,6 @@ static void psb_intel_clock(int refclk,
- 	clock->dot = clock->vco / clock->p;
- }
- 
--void psb_intel_wait_for_vblank(struct drm_device *dev)
--{
--	/* Wait for 20ms, i.e. one cycle at 50hz. */
--	mdelay(20);
--}
--
- static int psb_intel_pipe_set_base(struct drm_crtc *crtc,
- 			    int x, int y, struct drm_framebuffer *old_fb)
- {
-@@ -244,7 +238,7 @@ static void psb_intel_crtc_dpms(struct d
- 		}
- 
- 		/* Wait for vblank for the disable to take effect. */
--		psb_intel_wait_for_vblank(dev);
-+		gma_wait_for_vblank(dev);
- 
- 		temp = REG_READ(map->dpll);
- 		if ((temp & DPLL_VCO_ENABLE) != 0) {
-@@ -516,14 +510,14 @@ static int psb_intel_crtc_mode_set(struc
- 	REG_WRITE(map->conf, pipeconf);
- 	REG_READ(map->conf);
- 
--	psb_intel_wait_for_vblank(dev);
-+	gma_wait_for_vblank(dev);
- 
- 	REG_WRITE(map->cntr, dspcntr);
- 
- 	/* Flush the plane changes */
- 	crtc_funcs->mode_set_base(crtc, x, y, old_fb);
- 
--	psb_intel_wait_for_vblank(dev);
-+	gma_wait_for_vblank(dev);
- 
- 	return 0;
- }
-@@ -669,12 +663,12 @@ static void psb_intel_crtc_restore(struc
- 	REG_WRITE(map->base, crtc_state->saveDSPBASE);
- 	REG_WRITE(map->conf, crtc_state->savePIPECONF);
- 
--	psb_intel_wait_for_vblank(dev);
-+	gma_wait_for_vblank(dev);
- 
- 	REG_WRITE(map->cntr, crtc_state->saveDSPCNTR);
- 	REG_WRITE(map->base, crtc_state->saveDSPBASE);
- 
--	psb_intel_wait_for_vblank(dev);
-+	gma_wait_for_vblank(dev);
- 
- 	paletteReg = map->palette;
- 	for (i = 0; i < 256; ++i)
---- a/drivers/gpu/drm/gma500/psb_intel_drv.h
-+++ b/drivers/gpu/drm/gma500/psb_intel_drv.h
-@@ -246,7 +246,6 @@ extern struct drm_encoder *psb_intel_bes
- 
- extern struct drm_display_mode *psb_intel_crtc_mode_get(struct drm_device *dev,
- 						    struct drm_crtc *crtc);
--extern void psb_intel_wait_for_vblank(struct drm_device *dev);
- extern int psb_intel_get_pipe_from_crtc_id(struct drm_device *dev, void *data,
- 				struct drm_file *file_priv);
- extern struct drm_crtc *psb_intel_get_crtc_from_pipe(struct drm_device *dev,
---- a/drivers/gpu/drm/gma500/psb_intel_sdvo.c
-+++ b/drivers/gpu/drm/gma500/psb_intel_sdvo.c
-@@ -1121,7 +1121,7 @@ static void psb_intel_sdvo_dpms(struct d
- 		if ((temp & SDVO_ENABLE) == 0)
- 			psb_intel_sdvo_write_sdvox(psb_intel_sdvo, temp | SDVO_ENABLE);
- 		for (i = 0; i < 2; i++)
--			psb_intel_wait_for_vblank(dev);
-+			gma_wait_for_vblank(dev);
- 
- 		status = psb_intel_sdvo_get_trained_inputs(psb_intel_sdvo, &input1, &input2);
- 		/* Warn if the device reported failure to sync.
diff --git a/patches.gma500/0009-drm-gma500-psb-Use-identical-generic-crtc-funcs.patch b/patches.gma500/0009-drm-gma500-psb-Use-identical-generic-crtc-funcs.patch
deleted file mode 100644
index 2eac99c695da6..0000000000000
--- a/patches.gma500/0009-drm-gma500-psb-Use-identical-generic-crtc-funcs.patch
+++ /dev/null
@@ -1,83 +0,0 @@
-From 0e5005151d4edbb5e3ce4f5845f6187405a6d6d3 Mon Sep 17 00:00:00 2001
-From: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-Date: Wed, 10 Jul 2013 17:40:54 +0200
-Subject: drm/gma500/psb: Use identical generic crtc funcs
-
-This patch makes psb use the gma_xxx counterparts that are identical. I
-took them in one sweep as they should not cause any regressions.
-
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-(cherry picked from commit 4855177ed0d94621eaf1c6bec64f16318a8be5fe)
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
----
- drivers/gpu/drm/gma500/psb_intel_display.c |   41 ++---------------------------
- 1 file changed, 4 insertions(+), 37 deletions(-)
-
---- a/drivers/gpu/drm/gma500/psb_intel_display.c
-+++ b/drivers/gpu/drm/gma500/psb_intel_display.c
-@@ -255,18 +255,6 @@ static void psb_intel_crtc_dpms(struct d
- 	REG_WRITE(DSPARB, 0x3F3E);
- }
- 
--static void psb_intel_crtc_prepare(struct drm_crtc *crtc)
--{
--	struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private;
--	crtc_funcs->dpms(crtc, DRM_MODE_DPMS_OFF);
--}
--
--static void psb_intel_crtc_commit(struct drm_crtc *crtc)
--{
--	struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private;
--	crtc_funcs->dpms(crtc, DRM_MODE_DPMS_ON);
--}
--
- void psb_intel_encoder_prepare(struct drm_encoder *encoder)
- {
- 	struct drm_encoder_helper_funcs *encoder_funcs =
-@@ -291,14 +279,6 @@ void psb_intel_encoder_destroy(struct dr
- 	kfree(intel_encoder);
- }
- 
--static bool psb_intel_crtc_mode_fixup(struct drm_crtc *crtc,
--				  const struct drm_display_mode *mode,
--				  struct drm_display_mode *adjusted_mode)
--{
--	return true;
--}
--
--
- /**
-  * Return the pipe currently connected to the panel fitter,
-  * or -1 if the panel fitter is not present or not in use
-@@ -1006,27 +986,14 @@ static void psb_intel_crtc_destroy(struc
- 	kfree(psb_intel_crtc);
- }
- 
--static void psb_intel_crtc_disable(struct drm_crtc *crtc)
--{
--	struct gtt_range *gt;
--	struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private;
--
--	crtc_funcs->dpms(crtc, DRM_MODE_DPMS_OFF);
--
--	if (crtc->fb) {
--		gt = to_psb_fb(crtc->fb)->gtt;
--		psb_gtt_unpin(gt);
--	}
--}
--
- const struct drm_crtc_helper_funcs psb_intel_helper_funcs = {
- 	.dpms = psb_intel_crtc_dpms,
--	.mode_fixup = psb_intel_crtc_mode_fixup,
-+	.mode_fixup = gma_crtc_mode_fixup,
- 	.mode_set = psb_intel_crtc_mode_set,
- 	.mode_set_base = psb_intel_pipe_set_base,
--	.prepare = psb_intel_crtc_prepare,
--	.commit = psb_intel_crtc_commit,
--	.disable = psb_intel_crtc_disable,
-+	.prepare = gma_crtc_prepare,
-+	.commit = gma_crtc_commit,
-+	.disable = gma_crtc_disable,
- };
- 
- const struct drm_crtc_funcs psb_intel_crtc_funcs = {
diff --git a/patches.gma500/0010-drm-gma500-cdv-Convert-to-gma_pipe_set_base.patch b/patches.gma500/0010-drm-gma500-cdv-Convert-to-gma_pipe_set_base.patch
deleted file mode 100644
index b81652eca2e0b..0000000000000
--- a/patches.gma500/0010-drm-gma500-cdv-Convert-to-gma_pipe_set_base.patch
+++ /dev/null
@@ -1,105 +0,0 @@
-From 73ecdc73a813d11daf1db78fb277fefc9470ba8e Mon Sep 17 00:00:00 2001
-From: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-Date: Wed, 10 Jul 2013 17:58:04 +0200
-Subject: drm/gma500/cdv: Convert to gma_pipe_set_base()
-
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-(cherry picked from commit 3c447166536c80209f0dcb300cdffd76686187aa)
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
----
- drivers/gpu/drm/gma500/cdv_intel_display.c |   77 -----------------------------
- 1 file changed, 1 insertion(+), 76 deletions(-)
-
---- a/drivers/gpu/drm/gma500/cdv_intel_display.c
-+++ b/drivers/gpu/drm/gma500/cdv_intel_display.c
-@@ -452,81 +452,6 @@ static bool cdv_intel_find_dp_pll(const
- 	return true;
- }
- 
--static int cdv_intel_pipe_set_base(struct drm_crtc *crtc,
--			    int x, int y, struct drm_framebuffer *old_fb)
--{
--	struct drm_device *dev = crtc->dev;
--	struct drm_psb_private *dev_priv = dev->dev_private;
--	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
--	struct psb_framebuffer *psbfb = to_psb_fb(crtc->fb);
--	int pipe = psb_intel_crtc->pipe;
--	const struct psb_offset *map = &dev_priv->regmap[pipe];
--	unsigned long start, offset;
--	u32 dspcntr;
--	int ret = 0;
--
--	if (!gma_power_begin(dev, true))
--		return 0;
--
--	/* no fb bound */
--	if (!crtc->fb) {
--		dev_err(dev->dev, "No FB bound\n");
--		goto psb_intel_pipe_cleaner;
--	}
--
--
--	/* We are displaying this buffer, make sure it is actually loaded
--	   into the GTT */
--	ret = psb_gtt_pin(psbfb->gtt);
--	if (ret < 0)
--		goto psb_intel_pipe_set_base_exit;
--	start = psbfb->gtt->offset;
--	offset = y * crtc->fb->pitches[0] + x * (crtc->fb->bits_per_pixel / 8);
--
--	REG_WRITE(map->stride, crtc->fb->pitches[0]);
--
--	dspcntr = REG_READ(map->cntr);
--	dspcntr &= ~DISPPLANE_PIXFORMAT_MASK;
--
--	switch (crtc->fb->bits_per_pixel) {
--	case 8:
--		dspcntr |= DISPPLANE_8BPP;
--		break;
--	case 16:
--		if (crtc->fb->depth == 15)
--			dspcntr |= DISPPLANE_15_16BPP;
--		else
--			dspcntr |= DISPPLANE_16BPP;
--		break;
--	case 24:
--	case 32:
--		dspcntr |= DISPPLANE_32BPP_NO_ALPHA;
--		break;
--	default:
--		dev_err(dev->dev, "Unknown color depth\n");
--		ret = -EINVAL;
--		goto psb_intel_pipe_set_base_exit;
--	}
--	REG_WRITE(map->cntr, dspcntr);
--
--	dev_dbg(dev->dev,
--		"Writing base %08lX %08lX %d %d\n", start, offset, x, y);
--
--	REG_WRITE(map->base, offset);
--	REG_READ(map->base);
--	REG_WRITE(map->surf, start);
--	REG_READ(map->surf);
--
--psb_intel_pipe_cleaner:
--	/* If there was a previous display we can now unpin it */
--	if (old_fb)
--		psb_gtt_unpin(to_psb_fb(old_fb)->gtt);
--
--psb_intel_pipe_set_base_exit:
--	gma_power_end(dev);
--	return ret;
--}
--
- #define		FIFO_PIPEA		(1 << 0)
- #define		FIFO_PIPEB		(1 << 1)
- 
-@@ -1596,7 +1521,7 @@ const struct drm_crtc_helper_funcs cdv_i
- 	.dpms = cdv_intel_crtc_dpms,
- 	.mode_fixup = gma_crtc_mode_fixup,
- 	.mode_set = cdv_intel_crtc_mode_set,
--	.mode_set_base = cdv_intel_pipe_set_base,
-+	.mode_set_base = gma_pipe_set_base,
- 	.prepare = gma_crtc_prepare,
- 	.commit = gma_crtc_commit,
- 	.disable = gma_crtc_disable,
diff --git a/patches.gma500/0012-drm-gma500-cdv-Convert-to-gma_crtc_dpms.patch b/patches.gma500/0012-drm-gma500-cdv-Convert-to-gma_crtc_dpms.patch
deleted file mode 100644
index 0c501137be6ee..0000000000000
--- a/patches.gma500/0012-drm-gma500-cdv-Convert-to-gma_crtc_dpms.patch
+++ /dev/null
@@ -1,217 +0,0 @@
-From d95dc0b3ee471019ab0b46b0960781318935bead Mon Sep 17 00:00:00 2001
-From: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-Date: Wed, 10 Jul 2013 18:12:11 +0200
-Subject: drm/gma500/cdv: Convert to gma_crtc_dpms()
-
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-(cherry picked from commit 7ea03f069572fef5701b8be90aed1cfd0b64d76e)
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
----
- drivers/gpu/drm/gma500/cdv_intel_display.c |  137 -----------------------------
- drivers/gpu/drm/gma500/gma_display.c       |    4 
- drivers/gpu/drm/gma500/gma_display.h       |    5 +
- 3 files changed, 8 insertions(+), 138 deletions(-)
-
---- a/drivers/gpu/drm/gma500/cdv_intel_display.c
-+++ b/drivers/gpu/drm/gma500/cdv_intel_display.c
-@@ -512,7 +512,7 @@ static bool is_pipeb_lvds(struct drm_dev
- 	return false;
- }
- 
--static void cdv_intel_disable_self_refresh (struct drm_device *dev)
-+void cdv_intel_disable_self_refresh(struct drm_device *dev)
- {
- 	if (REG_READ(FW_BLC_SELF) & FW_BLC_SELF_EN) {
- 
-@@ -533,7 +533,7 @@ static void cdv_intel_disable_self_refre
- 
- }
- 
--static void cdv_intel_update_watermark (struct drm_device *dev, struct drm_crtc *crtc)
-+void cdv_intel_update_watermark(struct drm_device *dev, struct drm_crtc *crtc)
- {
- 
- 	if (cdv_intel_single_pipe_active(dev)) {
-@@ -646,137 +646,6 @@ static void cdv_intel_crtc_load_lut(stru
- }
- 
- /**
-- * Sets the power management mode of the pipe and plane.
-- *
-- * This code should probably grow support for turning the cursor off and back
-- * on appropriately at the same time as we're turning the pipe off/on.
-- */
--static void cdv_intel_crtc_dpms(struct drm_crtc *crtc, int mode)
--{
--	struct drm_device *dev = crtc->dev;
--	struct drm_psb_private *dev_priv = dev->dev_private;
--	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
--	int pipe = psb_intel_crtc->pipe;
--	const struct psb_offset *map = &dev_priv->regmap[pipe];
--	u32 temp;
--
--	/* XXX: When our outputs are all unaware of DPMS modes other than off
--	 * and on, we should map those modes to DRM_MODE_DPMS_OFF in the CRTC.
--	 */
--	cdv_intel_disable_self_refresh(dev);
--
--	switch (mode) {
--	case DRM_MODE_DPMS_ON:
--	case DRM_MODE_DPMS_STANDBY:
--	case DRM_MODE_DPMS_SUSPEND:
--		if (psb_intel_crtc->active)
--			break;
--
--		psb_intel_crtc->active = true;
--
--		/* Enable the DPLL */
--		temp = REG_READ(map->dpll);
--		if ((temp & DPLL_VCO_ENABLE) == 0) {
--			REG_WRITE(map->dpll, temp);
--			REG_READ(map->dpll);
--			/* Wait for the clocks to stabilize. */
--			udelay(150);
--			REG_WRITE(map->dpll, temp | DPLL_VCO_ENABLE);
--			REG_READ(map->dpll);
--			/* Wait for the clocks to stabilize. */
--			udelay(150);
--			REG_WRITE(map->dpll, temp | DPLL_VCO_ENABLE);
--			REG_READ(map->dpll);
--			/* Wait for the clocks to stabilize. */
--			udelay(150);
--		}
--
--		/* Jim Bish - switch plan and pipe per scott */
--		/* Enable the plane */
--		temp = REG_READ(map->cntr);
--		if ((temp & DISPLAY_PLANE_ENABLE) == 0) {
--			REG_WRITE(map->cntr,
--				  temp | DISPLAY_PLANE_ENABLE);
--			/* Flush the plane changes */
--			REG_WRITE(map->base, REG_READ(map->base));
--		}
--
--		udelay(150);
--
--		/* Enable the pipe */
--		temp = REG_READ(map->conf);
--		if ((temp & PIPEACONF_ENABLE) == 0)
--			REG_WRITE(map->conf, temp | PIPEACONF_ENABLE);
--
--		temp = REG_READ(map->status);
--		temp &= ~(0xFFFF);
--		temp |= PIPE_FIFO_UNDERRUN;
--		REG_WRITE(map->status, temp);
--		REG_READ(map->status);
--
--		cdv_intel_crtc_load_lut(crtc);
--
--		/* Give the overlay scaler a chance to enable
--		 * if it's on this pipe */
--		/* psb_intel_crtc_dpms_video(crtc, true); TODO */
--		break;
--	case DRM_MODE_DPMS_OFF:
--		if (!psb_intel_crtc->active)
--			break;
--
--		psb_intel_crtc->active = false;
--
--		/* Give the overlay scaler a chance to disable
--		 * if it's on this pipe */
--		/* psb_intel_crtc_dpms_video(crtc, FALSE); TODO */
--
--		/* Disable the VGA plane that we never use */
--		REG_WRITE(VGACNTRL, VGA_DISP_DISABLE);
--
--		/* Jim Bish - changed pipe/plane here as well. */
--
--		drm_vblank_off(dev, pipe);
--		/* Wait for vblank for the disable to take effect */
--		gma_wait_for_vblank(dev);
--
--		/* Next, disable display pipes */
--		temp = REG_READ(map->conf);
--		if ((temp & PIPEACONF_ENABLE) != 0) {
--			REG_WRITE(map->conf, temp & ~PIPEACONF_ENABLE);
--			REG_READ(map->conf);
--		}
--
--		/* Wait for vblank for the disable to take effect. */
--		gma_wait_for_vblank(dev);
--
--		udelay(150);
--
--		/* Disable display plane */
--		temp = REG_READ(map->cntr);
--		if ((temp & DISPLAY_PLANE_ENABLE) != 0) {
--			REG_WRITE(map->cntr,
--				  temp & ~DISPLAY_PLANE_ENABLE);
--			/* Flush the plane changes */
--			REG_WRITE(map->base, REG_READ(map->base));
--			REG_READ(map->base);
--		}
--
--		temp = REG_READ(map->dpll);
--		if ((temp & DPLL_VCO_ENABLE) != 0) {
--			REG_WRITE(map->dpll, temp & ~DPLL_VCO_ENABLE);
--			REG_READ(map->dpll);
--		}
--
--		/* Wait for the clocks to turn off. */
--		udelay(150);
--		break;
--	}
--	cdv_intel_update_watermark(dev, crtc);
--	/*Set FIFO Watermarks*/
--	REG_WRITE(DSPARB, 0x3F3E);
--}
--
--/**
-  * Return the pipe currently connected to the panel fitter,
-  * or -1 if the panel fitter is not present or not in use
-  */
-@@ -1518,7 +1387,7 @@ struct drm_display_mode *cdv_intel_crtc_
- }
- 
- const struct drm_crtc_helper_funcs cdv_intel_helper_funcs = {
--	.dpms = cdv_intel_crtc_dpms,
-+	.dpms = gma_crtc_dpms,
- 	.mode_fixup = gma_crtc_mode_fixup,
- 	.mode_set = cdv_intel_crtc_mode_set,
- 	.mode_set_base = gma_pipe_set_base,
---- a/drivers/gpu/drm/gma500/gma_display.c
-+++ b/drivers/gpu/drm/gma500/gma_display.c
-@@ -210,10 +210,8 @@ void gma_crtc_dpms(struct drm_crtc *crtc
- 	 * and on, we should map those modes to DRM_MODE_DPMS_OFF in the CRTC.
- 	 */
- 
--	/* FIXME: Uncomment this when we move cdv to generic dpms
- 	if (IS_CDV(dev))
- 		cdv_intel_disable_self_refresh(dev);
--	*/
- 
- 	switch (mode) {
- 	case DRM_MODE_DPMS_ON:
-@@ -322,10 +320,8 @@ void gma_crtc_dpms(struct drm_crtc *crtc
- 		break;
- 	}
- 
--	/* FIXME: Uncomment this when we move cdv to generic dpms
- 	if (IS_CDV(dev))
- 		cdv_intel_update_watermark(dev, crtc);
--	*/
- 
- 	/* Set FIFO watermarks */
- 	REG_WRITE(DSPARB, 0x3F3E);
---- a/drivers/gpu/drm/gma500/gma_display.h
-+++ b/drivers/gpu/drm/gma500/gma_display.h
-@@ -85,4 +85,9 @@ extern bool gma_pll_is_valid(struct drm_
- extern bool gma_find_best_pll(const struct gma_limit_t *limit,
- 			      struct drm_crtc *crtc, int target, int refclk,
- 			      struct gma_clock_t *best_clock);
-+
-+/* Cedarview specific functions */
-+extern void cdv_intel_disable_self_refresh(struct drm_device *dev);
-+extern void cdv_intel_update_watermark(struct drm_device *dev,
-+				       struct drm_crtc *crtc);
- #endif
diff --git a/patches.gma500/0013-drm-gma500-cdv-Convert-to-generic-gamma-funcs.patch b/patches.gma500/0013-drm-gma500-cdv-Convert-to-generic-gamma-funcs.patch
deleted file mode 100644
index f79c4a086fd54..0000000000000
--- a/patches.gma500/0013-drm-gma500-cdv-Convert-to-generic-gamma-funcs.patch
+++ /dev/null
@@ -1,109 +0,0 @@
-From 329fccc438bcafae6dddc5ab705f9567a4bf7618 Mon Sep 17 00:00:00 2001
-From: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-Date: Wed, 10 Jul 2013 18:23:29 +0200
-Subject: drm/gma500/cdv: Convert to generic gamma funcs
-
-There is a slight difference in how we pick the palette register in the
-generic function but we should be ok as long as psb_intel_crtc->pipe and
-the register map is sane.
-
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-(cherry picked from commit a1f4efe4416dbd8d58486e60752f3a8145aa84c9)
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
----
- drivers/gpu/drm/gma500/cdv_intel_display.c |   70 -----------------------------
- 1 file changed, 1 insertion(+), 69 deletions(-)
-
---- a/drivers/gpu/drm/gma500/cdv_intel_display.c
-+++ b/drivers/gpu/drm/gma500/cdv_intel_display.c
-@@ -593,58 +593,6 @@ void cdv_intel_update_watermark(struct d
- 	}
- }
- 
--/** Loads the palette/gamma unit for the CRTC with the prepared values */
--static void cdv_intel_crtc_load_lut(struct drm_crtc *crtc)
--{
--	struct drm_device *dev = crtc->dev;
--	struct drm_psb_private *dev_priv = dev->dev_private;
--	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
--	int palreg = PALETTE_A;
--	int i;
--
--	/* The clocks have to be on to load the palette. */
--	if (!crtc->enabled)
--		return;
--
--	switch (psb_intel_crtc->pipe) {
--	case 0:
--		break;
--	case 1:
--		palreg = PALETTE_B;
--		break;
--	case 2:
--		palreg = PALETTE_C;
--		break;
--	default:
--		dev_err(dev->dev, "Illegal Pipe Number.\n");
--		return;
--	}
--
--	if (gma_power_begin(dev, false)) {
--		for (i = 0; i < 256; i++) {
--			REG_WRITE(palreg + 4 * i,
--				  ((psb_intel_crtc->lut_r[i] +
--				  psb_intel_crtc->lut_adj[i]) << 16) |
--				  ((psb_intel_crtc->lut_g[i] +
--				  psb_intel_crtc->lut_adj[i]) << 8) |
--				  (psb_intel_crtc->lut_b[i] +
--				  psb_intel_crtc->lut_adj[i]));
--		}
--		gma_power_end(dev);
--	} else {
--		for (i = 0; i < 256; i++) {
--			dev_priv->regs.pipe[0].palette[i] =
--				  ((psb_intel_crtc->lut_r[i] +
--				  psb_intel_crtc->lut_adj[i]) << 16) |
--				  ((psb_intel_crtc->lut_g[i] +
--				  psb_intel_crtc->lut_adj[i]) << 8) |
--				  (psb_intel_crtc->lut_b[i] +
--				  psb_intel_crtc->lut_adj[i]);
--		}
--
--	}
--}
--
- /**
-  * Return the pipe currently connected to the panel fitter,
-  * or -1 if the panel fitter is not present or not in use
-@@ -1213,22 +1161,6 @@ static int cdv_intel_crtc_cursor_move(st
- 	return 0;
- }
- 
--static void cdv_intel_crtc_gamma_set(struct drm_crtc *crtc, u16 *red,
--			 u16 *green, u16 *blue, uint32_t start, uint32_t size)
--{
--	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
--	int i;
--	int end = (start + size > 256) ? 256 : start + size;
--
--	for (i = start; i < end; i++) {
--		psb_intel_crtc->lut_r[i] = red[i] >> 8;
--		psb_intel_crtc->lut_g[i] = green[i] >> 8;
--		psb_intel_crtc->lut_b[i] = blue[i] >> 8;
--	}
--
--	cdv_intel_crtc_load_lut(crtc);
--}
--
- static int cdv_crtc_set_config(struct drm_mode_set *set)
- {
- 	int ret = 0;
-@@ -1401,7 +1333,7 @@ const struct drm_crtc_funcs cdv_intel_cr
- 	.restore = cdv_intel_crtc_restore,
- 	.cursor_set = cdv_intel_crtc_cursor_set,
- 	.cursor_move = cdv_intel_crtc_cursor_move,
--	.gamma_set = cdv_intel_crtc_gamma_set,
-+	.gamma_set = gma_crtc_gamma_set,
- 	.set_config = cdv_crtc_set_config,
- 	.destroy = gma_crtc_destroy,
- };
diff --git a/patches.gma500/0014-drm-gma500-psb-Convert-to-gma_pipe_set_base.patch b/patches.gma500/0014-drm-gma500-psb-Convert-to-gma_pipe_set_base.patch
deleted file mode 100644
index ff7ea81d13ed2..0000000000000
--- a/patches.gma500/0014-drm-gma500-psb-Convert-to-gma_pipe_set_base.patch
+++ /dev/null
@@ -1,101 +0,0 @@
-From c32a0929afce35459829254852f297917996c2a9 Mon Sep 17 00:00:00 2001
-From: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-Date: Wed, 10 Jul 2013 18:37:03 +0200
-Subject: drm/gma500/psb: Convert to gma_pipe_set_base()
-
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-(cherry picked from commit 00b1fe7445d8a3cd81ba564fba5d15dcbe26f23b)
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
----
- drivers/gpu/drm/gma500/psb_intel_display.c |   73 -----------------------------
- 1 file changed, 1 insertion(+), 72 deletions(-)
-
---- a/drivers/gpu/drm/gma500/psb_intel_display.c
-+++ b/drivers/gpu/drm/gma500/psb_intel_display.c
-@@ -82,77 +82,6 @@ static void psb_intel_clock(int refclk,
- 	clock->dot = clock->vco / clock->p;
- }
- 
--static int psb_intel_pipe_set_base(struct drm_crtc *crtc,
--			    int x, int y, struct drm_framebuffer *old_fb)
--{
--	struct drm_device *dev = crtc->dev;
--	struct drm_psb_private *dev_priv = dev->dev_private;
--	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
--	struct psb_framebuffer *psbfb = to_psb_fb(crtc->fb);
--	int pipe = psb_intel_crtc->pipe;
--	const struct psb_offset *map = &dev_priv->regmap[pipe];
--	unsigned long start, offset;
--	u32 dspcntr;
--	int ret = 0;
--
--	if (!gma_power_begin(dev, true))
--		return 0;
--
--	/* no fb bound */
--	if (!crtc->fb) {
--		dev_dbg(dev->dev, "No FB bound\n");
--		goto psb_intel_pipe_cleaner;
--	}
--
--	/* We are displaying this buffer, make sure it is actually loaded
--	   into the GTT */
--	ret = psb_gtt_pin(psbfb->gtt);
--	if (ret < 0)
--		goto psb_intel_pipe_set_base_exit;
--	start = psbfb->gtt->offset;
--
--	offset = y * crtc->fb->pitches[0] + x * (crtc->fb->bits_per_pixel / 8);
--
--	REG_WRITE(map->stride, crtc->fb->pitches[0]);
--
--	dspcntr = REG_READ(map->cntr);
--	dspcntr &= ~DISPPLANE_PIXFORMAT_MASK;
--
--	switch (crtc->fb->bits_per_pixel) {
--	case 8:
--		dspcntr |= DISPPLANE_8BPP;
--		break;
--	case 16:
--		if (crtc->fb->depth == 15)
--			dspcntr |= DISPPLANE_15_16BPP;
--		else
--			dspcntr |= DISPPLANE_16BPP;
--		break;
--	case 24:
--	case 32:
--		dspcntr |= DISPPLANE_32BPP_NO_ALPHA;
--		break;
--	default:
--		dev_err(dev->dev, "Unknown color depth\n");
--		ret = -EINVAL;
--		psb_gtt_unpin(psbfb->gtt);
--		goto psb_intel_pipe_set_base_exit;
--	}
--	REG_WRITE(map->cntr, dspcntr);
--
--	REG_WRITE(map->base, start + offset);
--	REG_READ(map->base);
--
--psb_intel_pipe_cleaner:
--	/* If there was a previous display we can now unpin it */
--	if (old_fb)
--		psb_gtt_unpin(to_psb_fb(old_fb)->gtt);
--
--psb_intel_pipe_set_base_exit:
--	gma_power_end(dev);
--	return ret;
--}
--
- /**
-  * Sets the power management mode of the pipe and plane.
-  *
-@@ -990,7 +919,7 @@ const struct drm_crtc_helper_funcs psb_i
- 	.dpms = psb_intel_crtc_dpms,
- 	.mode_fixup = gma_crtc_mode_fixup,
- 	.mode_set = psb_intel_crtc_mode_set,
--	.mode_set_base = psb_intel_pipe_set_base,
-+	.mode_set_base = gma_pipe_set_base,
- 	.prepare = gma_crtc_prepare,
- 	.commit = gma_crtc_commit,
- 	.disable = gma_crtc_disable,
diff --git a/patches.gma500/0015-drm-gma500-Convert-to-generic-gamma-funcs.patch b/patches.gma500/0015-drm-gma500-Convert-to-generic-gamma-funcs.patch
deleted file mode 100644
index cf586ce6432a8..0000000000000
--- a/patches.gma500/0015-drm-gma500-Convert-to-generic-gamma-funcs.patch
+++ /dev/null
@@ -1,175 +0,0 @@
-From ceb0d7061d50dcb7ed0d06345f9d9d148a7af5c8 Mon Sep 17 00:00:00 2001
-From: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-Date: Wed, 10 Jul 2013 18:39:58 +0200
-Subject: drm/gma500: Convert to generic gamma funcs
-
-This takes care of the remaining chips using the old generic code.
-We don't check if the pipe number is valid but the old code peeked in
-the register map before checking anyways so just ignore it.
-
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-(cherry picked from commit 6443ea1aca56f011432b6ea66ec4cc21a813bb0d)
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
----
- drivers/gpu/drm/gma500/mdfld_intel_display.c |    2 
- drivers/gpu/drm/gma500/oaktrail_crtc.c       |    2 
- drivers/gpu/drm/gma500/oaktrail_hdmi.c       |    2 
- drivers/gpu/drm/gma500/psb_drv.c             |    2 
- drivers/gpu/drm/gma500/psb_intel_display.c   |   70 ---------------------------
- drivers/gpu/drm/gma500/psb_intel_drv.h       |    1 
- 6 files changed, 6 insertions(+), 73 deletions(-)
-
---- a/drivers/gpu/drm/gma500/mdfld_intel_display.c
-+++ b/drivers/gpu/drm/gma500/mdfld_intel_display.c
-@@ -436,7 +436,7 @@ static void mdfld_crtc_dpms(struct drm_c
- 			}
- 		}
- 
--		psb_intel_crtc_load_lut(crtc);
-+		gma_crtc_load_lut(crtc);
- 
- 		/* Give the overlay scaler a chance to enable
- 		   if it's on this pipe */
---- a/drivers/gpu/drm/gma500/oaktrail_crtc.c
-+++ b/drivers/gpu/drm/gma500/oaktrail_crtc.c
-@@ -212,7 +212,7 @@ static void oaktrail_crtc_dpms(struct dr
- 			REG_WRITE(map->base, REG_READ(map->base));
- 		}
- 
--		psb_intel_crtc_load_lut(crtc);
-+		gma_crtc_load_lut(crtc);
- 
- 		/* Give the overlay scaler a chance to enable
- 		   if it's on this pipe */
---- a/drivers/gpu/drm/gma500/oaktrail_hdmi.c
-+++ b/drivers/gpu/drm/gma500/oaktrail_hdmi.c
-@@ -464,7 +464,7 @@ void oaktrail_crtc_hdmi_dpms(struct drm_
- 			REG_READ(DSPBSURF);
- 		}
- 
--		psb_intel_crtc_load_lut(crtc);
-+		gma_crtc_load_lut(crtc);
- 	}
- 
- 	/* DSPARB */
---- a/drivers/gpu/drm/gma500/psb_drv.c
-+++ b/drivers/gpu/drm/gma500/psb_drv.c
-@@ -459,7 +459,7 @@ static int psb_gamma_ioctl(struct drm_de
- 	for (i = 0; i < 256; i++)
- 		psb_intel_crtc->lut_adj[i] = lut_arg->lut[i];
- 
--	psb_intel_crtc_load_lut(crtc);
-+	gma_crtc_load_lut(crtc);
- 
- 	return 0;
- }
---- a/drivers/gpu/drm/gma500/psb_intel_display.c
-+++ b/drivers/gpu/drm/gma500/psb_intel_display.c
-@@ -135,7 +135,7 @@ static void psb_intel_crtc_dpms(struct d
- 			REG_WRITE(map->base, REG_READ(map->base));
- 		}
- 
--		psb_intel_crtc_load_lut(crtc);
-+		gma_crtc_load_lut(crtc);
- 
- 		/* Give the overlay scaler a chance to enable
- 		 * if it's on this pipe */
-@@ -431,54 +431,6 @@ static int psb_intel_crtc_mode_set(struc
- 	return 0;
- }
- 
--/** Loads the palette/gamma unit for the CRTC with the prepared values */
--void psb_intel_crtc_load_lut(struct drm_crtc *crtc)
--{
--	struct drm_device *dev = crtc->dev;
--	struct drm_psb_private *dev_priv = dev->dev_private;
--	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
--	const struct psb_offset *map = &dev_priv->regmap[psb_intel_crtc->pipe];
--	int palreg = map->palette;
--	int i;
--
--	/* The clocks have to be on to load the palette. */
--	if (!crtc->enabled)
--		return;
--
--	switch (psb_intel_crtc->pipe) {
--	case 0:
--	case 1:
--		break;
--	default:
--		dev_err(dev->dev, "Illegal Pipe Number.\n");
--		return;
--	}
--
--	if (gma_power_begin(dev, false)) {
--		for (i = 0; i < 256; i++) {
--			REG_WRITE(palreg + 4 * i,
--				  ((psb_intel_crtc->lut_r[i] +
--				  psb_intel_crtc->lut_adj[i]) << 16) |
--				  ((psb_intel_crtc->lut_g[i] +
--				  psb_intel_crtc->lut_adj[i]) << 8) |
--				  (psb_intel_crtc->lut_b[i] +
--				  psb_intel_crtc->lut_adj[i]));
--		}
--		gma_power_end(dev);
--	} else {
--		for (i = 0; i < 256; i++) {
--			dev_priv->regs.pipe[0].palette[i] =
--				  ((psb_intel_crtc->lut_r[i] +
--				  psb_intel_crtc->lut_adj[i]) << 16) |
--				  ((psb_intel_crtc->lut_g[i] +
--				  psb_intel_crtc->lut_adj[i]) << 8) |
--				  (psb_intel_crtc->lut_b[i] +
--				  psb_intel_crtc->lut_adj[i]);
--		}
--
--	}
--}
--
- /**
-  * Save HW states of giving crtc
-  */
-@@ -737,24 +689,6 @@ static int psb_intel_crtc_cursor_move(st
- 	return 0;
- }
- 
--static void psb_intel_crtc_gamma_set(struct drm_crtc *crtc, u16 *red,
--			 u16 *green, u16 *blue, uint32_t type, uint32_t size)
--{
--	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
--	int i;
--
--	if (size != 256)
--		return;
--
--	for (i = 0; i < 256; i++) {
--		psb_intel_crtc->lut_r[i] = red[i] >> 8;
--		psb_intel_crtc->lut_g[i] = green[i] >> 8;
--		psb_intel_crtc->lut_b[i] = blue[i] >> 8;
--	}
--
--	psb_intel_crtc_load_lut(crtc);
--}
--
- static int psb_crtc_set_config(struct drm_mode_set *set)
- {
- 	int ret;
-@@ -930,7 +864,7 @@ const struct drm_crtc_funcs psb_intel_cr
- 	.restore = psb_intel_crtc_restore,
- 	.cursor_set = psb_intel_crtc_cursor_set,
- 	.cursor_move = psb_intel_crtc_cursor_move,
--	.gamma_set = psb_intel_crtc_gamma_set,
-+	.gamma_set = gma_crtc_gamma_set,
- 	.set_config = psb_crtc_set_config,
- 	.destroy = psb_intel_crtc_destroy,
- };
---- a/drivers/gpu/drm/gma500/psb_intel_drv.h
-+++ b/drivers/gpu/drm/gma500/psb_intel_drv.h
-@@ -226,7 +226,6 @@ extern void oaktrail_dsi_init(struct drm
- extern void mid_dsi_init(struct drm_device *dev,
- 		    struct psb_intel_mode_device *mode_dev, int dsi_num);
- 
--extern void psb_intel_crtc_load_lut(struct drm_crtc *crtc);
- extern void psb_intel_encoder_prepare(struct drm_encoder *encoder);
- extern void psb_intel_encoder_commit(struct drm_encoder *encoder);
- extern void psb_intel_encoder_destroy(struct drm_encoder *encoder);
diff --git a/patches.gma500/0016-drm-gma500-psb-Convert-to-gma_crtc_dpms.patch b/patches.gma500/0016-drm-gma500-psb-Convert-to-gma_crtc_dpms.patch
deleted file mode 100644
index 8c7f677ac0e1b..0000000000000
--- a/patches.gma500/0016-drm-gma500-psb-Convert-to-gma_crtc_dpms.patch
+++ /dev/null
@@ -1,132 +0,0 @@
-From fcf7307e2a8b0bec39a75b341cfc60cc1e4577dc Mon Sep 17 00:00:00 2001
-From: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-Date: Wed, 10 Jul 2013 18:44:25 +0200
-Subject: drm/gma500/psb: Convert to gma_crtc_dpms()
-
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-(cherry picked from commit 42568dd5d3b5bff18d9dbc6f2f2814ed28753ada)
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
----
- drivers/gpu/drm/gma500/psb_intel_display.c |  104 -----------------------------
- 1 file changed, 1 insertion(+), 103 deletions(-)
-
---- a/drivers/gpu/drm/gma500/psb_intel_display.c
-+++ b/drivers/gpu/drm/gma500/psb_intel_display.c
-@@ -82,108 +82,6 @@ static void psb_intel_clock(int refclk,
- 	clock->dot = clock->vco / clock->p;
- }
- 
--/**
-- * Sets the power management mode of the pipe and plane.
-- *
-- * This code should probably grow support for turning the cursor off and back
-- * on appropriately at the same time as we're turning the pipe off/on.
-- */
--static void psb_intel_crtc_dpms(struct drm_crtc *crtc, int mode)
--{
--	struct drm_device *dev = crtc->dev;
--	struct drm_psb_private *dev_priv = dev->dev_private;
--	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
--	int pipe = psb_intel_crtc->pipe;
--	const struct psb_offset *map = &dev_priv->regmap[pipe];
--	u32 temp;
--
--	/* XXX: When our outputs are all unaware of DPMS modes other than off
--	 * and on, we should map those modes to DRM_MODE_DPMS_OFF in the CRTC.
--	 */
--	switch (mode) {
--	case DRM_MODE_DPMS_ON:
--	case DRM_MODE_DPMS_STANDBY:
--	case DRM_MODE_DPMS_SUSPEND:
--		/* Enable the DPLL */
--		temp = REG_READ(map->dpll);
--		if ((temp & DPLL_VCO_ENABLE) == 0) {
--			REG_WRITE(map->dpll, temp);
--			REG_READ(map->dpll);
--			/* Wait for the clocks to stabilize. */
--			udelay(150);
--			REG_WRITE(map->dpll, temp | DPLL_VCO_ENABLE);
--			REG_READ(map->dpll);
--			/* Wait for the clocks to stabilize. */
--			udelay(150);
--			REG_WRITE(map->dpll, temp | DPLL_VCO_ENABLE);
--			REG_READ(map->dpll);
--			/* Wait for the clocks to stabilize. */
--			udelay(150);
--		}
--
--		/* Enable the pipe */
--		temp = REG_READ(map->conf);
--		if ((temp & PIPEACONF_ENABLE) == 0)
--			REG_WRITE(map->conf, temp | PIPEACONF_ENABLE);
--
--		/* Enable the plane */
--		temp = REG_READ(map->cntr);
--		if ((temp & DISPLAY_PLANE_ENABLE) == 0) {
--			REG_WRITE(map->cntr,
--				  temp | DISPLAY_PLANE_ENABLE);
--			/* Flush the plane changes */
--			REG_WRITE(map->base, REG_READ(map->base));
--		}
--
--		gma_crtc_load_lut(crtc);
--
--		/* Give the overlay scaler a chance to enable
--		 * if it's on this pipe */
--		/* psb_intel_crtc_dpms_video(crtc, true); TODO */
--		break;
--	case DRM_MODE_DPMS_OFF:
--		/* Give the overlay scaler a chance to disable
--		 * if it's on this pipe */
--		/* psb_intel_crtc_dpms_video(crtc, FALSE); TODO */
--
--		/* Disable the VGA plane that we never use */
--		REG_WRITE(VGACNTRL, VGA_DISP_DISABLE);
--
--		/* Disable display plane */
--		temp = REG_READ(map->cntr);
--		if ((temp & DISPLAY_PLANE_ENABLE) != 0) {
--			REG_WRITE(map->cntr,
--				  temp & ~DISPLAY_PLANE_ENABLE);
--			/* Flush the plane changes */
--			REG_WRITE(map->base, REG_READ(map->base));
--			REG_READ(map->base);
--		}
--
--		/* Next, disable display pipes */
--		temp = REG_READ(map->conf);
--		if ((temp & PIPEACONF_ENABLE) != 0) {
--			REG_WRITE(map->conf, temp & ~PIPEACONF_ENABLE);
--			REG_READ(map->conf);
--		}
--
--		/* Wait for vblank for the disable to take effect. */
--		gma_wait_for_vblank(dev);
--
--		temp = REG_READ(map->dpll);
--		if ((temp & DPLL_VCO_ENABLE) != 0) {
--			REG_WRITE(map->dpll, temp & ~DPLL_VCO_ENABLE);
--			REG_READ(map->dpll);
--		}
--
--		/* Wait for the clocks to turn off. */
--		udelay(150);
--		break;
--	}
--
--	/*Set FIFO Watermarks*/
--	REG_WRITE(DSPARB, 0x3F3E);
--}
--
- void psb_intel_encoder_prepare(struct drm_encoder *encoder)
- {
- 	struct drm_encoder_helper_funcs *encoder_funcs =
-@@ -850,7 +748,7 @@ static void psb_intel_crtc_destroy(struc
- }
- 
- const struct drm_crtc_helper_funcs psb_intel_helper_funcs = {
--	.dpms = psb_intel_crtc_dpms,
-+	.dpms = gma_crtc_dpms,
- 	.mode_fixup = gma_crtc_mode_fixup,
- 	.mode_set = psb_intel_crtc_mode_set,
- 	.mode_set_base = gma_pipe_set_base,
diff --git a/patches.gma500/0017-drm-gma500-oak-Use-identical-generic-crtc-funcs.patch b/patches.gma500/0017-drm-gma500-oak-Use-identical-generic-crtc-funcs.patch
deleted file mode 100644
index 30fe2b238fc3b..0000000000000
--- a/patches.gma500/0017-drm-gma500-oak-Use-identical-generic-crtc-funcs.patch
+++ /dev/null
@@ -1,59 +0,0 @@
-From 7cdfa3c8fe839e54d1367589f26f4ae40741844e Mon Sep 17 00:00:00 2001
-From: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-Date: Wed, 10 Jul 2013 21:52:19 +0200
-Subject: drm/gma500/oak: Use identical generic crtc funcs
-
-Use the generic gma functions instead of the oaktrail functions where
-they are identical.
-
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-(cherry picked from commit fe5802957f2856b20a408b8933472a27d00e5f77)
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
----
- drivers/gpu/drm/gma500/oaktrail_crtc.c |   25 +++----------------------
- 1 file changed, 3 insertions(+), 22 deletions(-)
-
---- a/drivers/gpu/drm/gma500/oaktrail_crtc.c
-+++ b/drivers/gpu/drm/gma500/oaktrail_crtc.c
-@@ -494,13 +494,6 @@ oaktrail_crtc_mode_set_exit:
- 	return 0;
- }
- 
--static bool oaktrail_crtc_mode_fixup(struct drm_crtc *crtc,
--				  const struct drm_display_mode *mode,
--				  struct drm_display_mode *adjusted_mode)
--{
--	return true;
--}
--
- static int oaktrail_pipe_set_base(struct drm_crtc *crtc,
- 			    int x, int y, struct drm_framebuffer *old_fb)
- {
-@@ -563,24 +556,12 @@ pipe_set_base_exit:
- 	return ret;
- }
- 
--static void oaktrail_crtc_prepare(struct drm_crtc *crtc)
--{
--	struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private;
--	crtc_funcs->dpms(crtc, DRM_MODE_DPMS_OFF);
--}
--
--static void oaktrail_crtc_commit(struct drm_crtc *crtc)
--{
--	struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private;
--	crtc_funcs->dpms(crtc, DRM_MODE_DPMS_ON);
--}
--
- const struct drm_crtc_helper_funcs oaktrail_helper_funcs = {
- 	.dpms = oaktrail_crtc_dpms,
--	.mode_fixup = oaktrail_crtc_mode_fixup,
-+	.mode_fixup = gma_crtc_mode_fixup,
- 	.mode_set = oaktrail_crtc_mode_set,
- 	.mode_set_base = oaktrail_pipe_set_base,
--	.prepare = oaktrail_crtc_prepare,
--	.commit = oaktrail_crtc_commit,
-+	.prepare = gma_crtc_prepare,
-+	.commit = gma_crtc_commit,
- };
- 
diff --git a/patches.gma500/0018-drm-gma500-mdfld-Use-identical-generic-crtc-funcs.patch b/patches.gma500/0018-drm-gma500-mdfld-Use-identical-generic-crtc-funcs.patch
deleted file mode 100644
index 3cda17569f5da..0000000000000
--- a/patches.gma500/0018-drm-gma500-mdfld-Use-identical-generic-crtc-funcs.patch
+++ /dev/null
@@ -1,57 +0,0 @@
-From 5ab56d0a2278d74835f3220d49c1a2fd2df12149 Mon Sep 17 00:00:00 2001
-From: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-Date: Wed, 10 Jul 2013 22:04:20 +0200
-Subject: drm/gma500/mdfld: Use identical generic crtc funcs
-
-Use the generic gma functions instead of the medfield functions where
-they are identical.
-
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-(cherry picked from commit d903b610d3a319933caf6ca52c76933b11434ef6)
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
----
- drivers/gpu/drm/gma500/mdfld_intel_display.c |   25 +++----------------------
- 1 file changed, 3 insertions(+), 22 deletions(-)
-
---- a/drivers/gpu/drm/gma500/mdfld_intel_display.c
-+++ b/drivers/gpu/drm/gma500/mdfld_intel_display.c
-@@ -104,25 +104,6 @@ void mdfldWaitForPipeEnable(struct drm_d
- 	}
- }
- 
--static void psb_intel_crtc_prepare(struct drm_crtc *crtc)
--{
--	struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private;
--	crtc_funcs->dpms(crtc, DRM_MODE_DPMS_OFF);
--}
--
--static void psb_intel_crtc_commit(struct drm_crtc *crtc)
--{
--	struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private;
--	crtc_funcs->dpms(crtc, DRM_MODE_DPMS_ON);
--}
--
--static bool psb_intel_crtc_mode_fixup(struct drm_crtc *crtc,
--				  const struct drm_display_mode *mode,
--				  struct drm_display_mode *adjusted_mode)
--{
--	return true;
--}
--
- /**
-  * Return the pipe currently connected to the panel fitter,
-  * or -1 if the panel fitter is not present or not in use
-@@ -1045,10 +1026,10 @@ mrst_crtc_mode_set_exit:
- 
- const struct drm_crtc_helper_funcs mdfld_helper_funcs = {
- 	.dpms = mdfld_crtc_dpms,
--	.mode_fixup = psb_intel_crtc_mode_fixup,
-+	.mode_fixup = gma_crtc_mode_fixup,
- 	.mode_set = mdfld_crtc_mode_set,
- 	.mode_set_base = mdfld__intel_pipe_set_base,
--	.prepare = psb_intel_crtc_prepare,
--	.commit = psb_intel_crtc_commit,
-+	.prepare = gma_crtc_prepare,
-+	.commit = gma_crtc_commit,
- };
- 
diff --git a/patches.gma500/0019-drm-gma500-psb-Convert-to-generic-crtc-destroy.patch b/patches.gma500/0019-drm-gma500-psb-Convert-to-generic-crtc-destroy.patch
deleted file mode 100644
index 9886ff146f9a1..0000000000000
--- a/patches.gma500/0019-drm-gma500-psb-Convert-to-generic-crtc-destroy.patch
+++ /dev/null
@@ -1,51 +0,0 @@
-From aacea152acdec18af2e058c29ac2314e667123f9 Mon Sep 17 00:00:00 2001
-From: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-Date: Wed, 10 Jul 2013 23:24:22 +0200
-Subject: drm/gma500/psb: Convert to generic crtc->destroy
-
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-(cherry picked from commit b1255b884914920f4086448ec4930e814e97afde)
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
----
- drivers/gpu/drm/gma500/psb_intel_display.c |   23 +----------------------
- 1 file changed, 1 insertion(+), 22 deletions(-)
-
---- a/drivers/gpu/drm/gma500/psb_intel_display.c
-+++ b/drivers/gpu/drm/gma500/psb_intel_display.c
-@@ -726,27 +726,6 @@ struct drm_display_mode *psb_intel_crtc_
- 	return mode;
- }
- 
--static void psb_intel_crtc_destroy(struct drm_crtc *crtc)
--{
--	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
--	struct gtt_range *gt;
--
--	/* Unpin the old GEM object */
--	if (psb_intel_crtc->cursor_obj) {
--		gt = container_of(psb_intel_crtc->cursor_obj,
--						struct gtt_range, gem);
--		psb_gtt_unpin(gt);
--		drm_gem_object_unreference(psb_intel_crtc->cursor_obj);
--		psb_intel_crtc->cursor_obj = NULL;
--	}
--
--	if (psb_intel_crtc->cursor_gt != NULL)
--		psb_gtt_free_range(crtc->dev, psb_intel_crtc->cursor_gt);
--	kfree(psb_intel_crtc->crtc_state);
--	drm_crtc_cleanup(crtc);
--	kfree(psb_intel_crtc);
--}
--
- const struct drm_crtc_helper_funcs psb_intel_helper_funcs = {
- 	.dpms = gma_crtc_dpms,
- 	.mode_fixup = gma_crtc_mode_fixup,
-@@ -764,7 +743,7 @@ const struct drm_crtc_funcs psb_intel_cr
- 	.cursor_move = psb_intel_crtc_cursor_move,
- 	.gamma_set = gma_crtc_gamma_set,
- 	.set_config = psb_crtc_set_config,
--	.destroy = psb_intel_crtc_destroy,
-+	.destroy = gma_crtc_destroy,
- };
- 
- const struct gma_clock_funcs psb_clock_funcs = {
diff --git a/patches.gma500/0020-drm-gma500-Add-generic-cursor-functions.patch b/patches.gma500/0020-drm-gma500-Add-generic-cursor-functions.patch
deleted file mode 100644
index 82b6ab3cf4b62..0000000000000
--- a/patches.gma500/0020-drm-gma500-Add-generic-cursor-functions.patch
+++ /dev/null
@@ -1,187 +0,0 @@
-From 14fe362348e8efcdff8bfeaffae1e37cffe56d95 Mon Sep 17 00:00:00 2001
-From: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-Date: Wed, 10 Jul 2013 23:43:01 +0200
-Subject: drm/gma500: Add generic cursor functions
-
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-(cherry picked from commit 38945be630a5848ffc75f2f9027cbb211dec3982)
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
----
- drivers/gpu/drm/gma500/gma_display.c |  151 +++++++++++++++++++++++++++++++++++
- drivers/gpu/drm/gma500/gma_display.h |    5 +
- 2 files changed, 156 insertions(+)
-
---- a/drivers/gpu/drm/gma500/gma_display.c
-+++ b/drivers/gpu/drm/gma500/gma_display.c
-@@ -327,6 +327,157 @@ void gma_crtc_dpms(struct drm_crtc *crtc
- 	REG_WRITE(DSPARB, 0x3F3E);
- }
- 
-+int gma_crtc_cursor_set(struct drm_crtc *crtc,
-+			struct drm_file *file_priv,
-+			uint32_t handle,
-+			uint32_t width, uint32_t height)
-+{
-+	struct drm_device *dev = crtc->dev;
-+	struct drm_psb_private *dev_priv = dev->dev_private;
-+	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
-+	int pipe = psb_intel_crtc->pipe;
-+	uint32_t control = (pipe == 0) ? CURACNTR : CURBCNTR;
-+	uint32_t base = (pipe == 0) ? CURABASE : CURBBASE;
-+	uint32_t temp;
-+	size_t addr = 0;
-+	struct gtt_range *gt;
-+	struct gtt_range *cursor_gt = psb_intel_crtc->cursor_gt;
-+	struct drm_gem_object *obj;
-+	void *tmp_dst, *tmp_src;
-+	int ret = 0, i, cursor_pages;
-+
-+	/* If we didn't get a handle then turn the cursor off */
-+	if (!handle) {
-+		temp = CURSOR_MODE_DISABLE;
-+
-+		if (gma_power_begin(dev, false)) {
-+			REG_WRITE(control, temp);
-+			REG_WRITE(base, 0);
-+			gma_power_end(dev);
-+		}
-+
-+		/* Unpin the old GEM object */
-+		if (psb_intel_crtc->cursor_obj) {
-+			gt = container_of(psb_intel_crtc->cursor_obj,
-+					  struct gtt_range, gem);
-+			psb_gtt_unpin(gt);
-+			drm_gem_object_unreference(psb_intel_crtc->cursor_obj);
-+			psb_intel_crtc->cursor_obj = NULL;
-+		}
-+
-+		return 0;
-+	}
-+
-+	/* Currently we only support 64x64 cursors */
-+	if (width != 64 || height != 64) {
-+		dev_dbg(dev->dev, "We currently only support 64x64 cursors\n");
-+		return -EINVAL;
-+	}
-+
-+	obj = drm_gem_object_lookup(dev, file_priv, handle);
-+	if (!obj)
-+		return -ENOENT;
-+
-+	if (obj->size < width * height * 4) {
-+		dev_dbg(dev->dev, "Buffer is too small\n");
-+		ret = -ENOMEM;
-+		goto unref_cursor;
-+	}
-+
-+	gt = container_of(obj, struct gtt_range, gem);
-+
-+	/* Pin the memory into the GTT */
-+	ret = psb_gtt_pin(gt);
-+	if (ret) {
-+		dev_err(dev->dev, "Can not pin down handle 0x%x\n", handle);
-+		goto unref_cursor;
-+	}
-+
-+	if (dev_priv->ops->cursor_needs_phys) {
-+		if (cursor_gt == NULL) {
-+			dev_err(dev->dev, "No hardware cursor mem available");
-+			ret = -ENOMEM;
-+			goto unref_cursor;
-+		}
-+
-+		/* Prevent overflow */
-+		if (gt->npage > 4)
-+			cursor_pages = 4;
-+		else
-+			cursor_pages = gt->npage;
-+
-+		/* Copy the cursor to cursor mem */
-+		tmp_dst = dev_priv->vram_addr + cursor_gt->offset;
-+		for (i = 0; i < cursor_pages; i++) {
-+			tmp_src = kmap(gt->pages[i]);
-+			memcpy(tmp_dst, tmp_src, PAGE_SIZE);
-+			kunmap(gt->pages[i]);
-+			tmp_dst += PAGE_SIZE;
-+		}
-+
-+		addr = psb_intel_crtc->cursor_addr;
-+	} else {
-+		addr = gt->offset;
-+		psb_intel_crtc->cursor_addr = addr;
-+	}
-+
-+	temp = 0;
-+	/* set the pipe for the cursor */
-+	temp |= (pipe << 28);
-+	temp |= CURSOR_MODE_64_ARGB_AX | MCURSOR_GAMMA_ENABLE;
-+
-+	if (gma_power_begin(dev, false)) {
-+		REG_WRITE(control, temp);
-+		REG_WRITE(base, addr);
-+		gma_power_end(dev);
-+	}
-+
-+	/* unpin the old bo */
-+	if (psb_intel_crtc->cursor_obj) {
-+		gt = container_of(psb_intel_crtc->cursor_obj,
-+							struct gtt_range, gem);
-+		psb_gtt_unpin(gt);
-+		drm_gem_object_unreference(psb_intel_crtc->cursor_obj);
-+	}
-+
-+	psb_intel_crtc->cursor_obj = obj;
-+	return ret;
-+
-+unref_cursor:
-+	drm_gem_object_unreference(obj);
-+	return ret;
-+}
-+
-+int gma_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
-+{
-+	struct drm_device *dev = crtc->dev;
-+	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
-+	int pipe = psb_intel_crtc->pipe;
-+	uint32_t temp = 0;
-+	uint32_t addr;
-+
-+	if (x < 0) {
-+		temp |= (CURSOR_POS_SIGN << CURSOR_X_SHIFT);
-+		x = -x;
-+	}
-+	if (y < 0) {
-+		temp |= (CURSOR_POS_SIGN << CURSOR_Y_SHIFT);
-+		y = -y;
-+	}
-+
-+	temp |= ((x & CURSOR_POS_MASK) << CURSOR_X_SHIFT);
-+	temp |= ((y & CURSOR_POS_MASK) << CURSOR_Y_SHIFT);
-+
-+	addr = psb_intel_crtc->cursor_addr;
-+
-+	if (gma_power_begin(dev, false)) {
-+		REG_WRITE((pipe == 0) ? CURAPOS : CURBPOS, temp);
-+		REG_WRITE((pipe == 0) ? CURABASE : CURBBASE, addr);
-+		gma_power_end(dev);
-+	}
-+	return 0;
-+}
-+
- bool gma_crtc_mode_fixup(struct drm_crtc *crtc,
- 			 const struct drm_display_mode *mode,
- 			 struct drm_display_mode *adjusted_mode)
---- a/drivers/gpu/drm/gma500/gma_display.h
-+++ b/drivers/gpu/drm/gma500/gma_display.h
-@@ -64,6 +64,11 @@ extern bool gma_pipe_has_type(struct drm
- extern void gma_wait_for_vblank(struct drm_device *dev);
- extern int gma_pipe_set_base(struct drm_crtc *crtc, int x, int y,
- 			     struct drm_framebuffer *old_fb);
-+extern int gma_crtc_cursor_set(struct drm_crtc *crtc,
-+			       struct drm_file *file_priv,
-+			       uint32_t handle,
-+			       uint32_t width, uint32_t height);
-+extern int gma_crtc_cursor_move(struct drm_crtc *crtc, int x, int y);
- extern void gma_crtc_load_lut(struct drm_crtc *crtc);
- extern void gma_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green,
- 			       u16 *blue, u32 start, u32 size);
diff --git a/patches.gma500/0021-drm-gma500-cdv-Convert-to-generic-cursor-funcs.patch b/patches.gma500/0021-drm-gma500-cdv-Convert-to-generic-cursor-funcs.patch
deleted file mode 100644
index 0a115d09f4aa8..0000000000000
--- a/patches.gma500/0021-drm-gma500-cdv-Convert-to-generic-cursor-funcs.patch
+++ /dev/null
@@ -1,158 +0,0 @@
-From 2cf163994682c62ca231b0c6b7c493a5e1514420 Mon Sep 17 00:00:00 2001
-From: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-Date: Wed, 10 Jul 2013 23:46:11 +0200
-Subject: drm/gma500/cdv: Convert to generic cursor funcs
-
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-(cherry picked from commit 04416625f9264d6a2322cb919fa4b5b2bf72b94f)
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
----
- drivers/gpu/drm/gma500/cdv_intel_display.c |  130 -----------------------------
- 1 file changed, 2 insertions(+), 128 deletions(-)
-
---- a/drivers/gpu/drm/gma500/cdv_intel_display.c
-+++ b/drivers/gpu/drm/gma500/cdv_intel_display.c
-@@ -1035,132 +1035,6 @@ static void cdv_intel_crtc_restore(struc
- 		REG_WRITE(paletteReg + (i << 2), crtc_state->savePalette[i]);
- }
- 
--static int cdv_intel_crtc_cursor_set(struct drm_crtc *crtc,
--				 struct drm_file *file_priv,
--				 uint32_t handle,
--				 uint32_t width, uint32_t height)
--{
--	struct drm_device *dev = crtc->dev;
--	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
--	int pipe = psb_intel_crtc->pipe;
--	uint32_t control = (pipe == 0) ? CURACNTR : CURBCNTR;
--	uint32_t base = (pipe == 0) ? CURABASE : CURBBASE;
--	uint32_t temp;
--	size_t addr = 0;
--	struct gtt_range *gt;
--	struct drm_gem_object *obj;
--	int ret = 0;
--
--	/* if we want to turn of the cursor ignore width and height */
--	if (!handle) {
--		/* turn off the cursor */
--		temp = CURSOR_MODE_DISABLE;
--
--		if (gma_power_begin(dev, false)) {
--			REG_WRITE(control, temp);
--			REG_WRITE(base, 0);
--			gma_power_end(dev);
--		}
--
--		/* unpin the old GEM object */
--		if (psb_intel_crtc->cursor_obj) {
--			gt = container_of(psb_intel_crtc->cursor_obj,
--							struct gtt_range, gem);
--			psb_gtt_unpin(gt);
--			drm_gem_object_unreference(psb_intel_crtc->cursor_obj);
--			psb_intel_crtc->cursor_obj = NULL;
--		}
--
--		return 0;
--	}
--
--	/* Currently we only support 64x64 cursors */
--	if (width != 64 || height != 64) {
--		dev_dbg(dev->dev, "we currently only support 64x64 cursors\n");
--		return -EINVAL;
--	}
--
--	obj = drm_gem_object_lookup(dev, file_priv, handle);
--	if (!obj)
--		return -ENOENT;
--
--	if (obj->size < width * height * 4) {
--		dev_dbg(dev->dev, "buffer is to small\n");
--		ret = -ENOMEM;
--		goto unref_cursor;
--	}
--
--	gt = container_of(obj, struct gtt_range, gem);
--
--	/* Pin the memory into the GTT */
--	ret = psb_gtt_pin(gt);
--	if (ret) {
--		dev_err(dev->dev, "Can not pin down handle 0x%x\n", handle);
--		goto unref_cursor;
--	}
--
--	addr = gt->offset;	/* Or resource.start ??? */
--
--	psb_intel_crtc->cursor_addr = addr;
--
--	temp = 0;
--	/* set the pipe for the cursor */
--	temp |= (pipe << 28);
--	temp |= CURSOR_MODE_64_ARGB_AX | MCURSOR_GAMMA_ENABLE;
--
--	if (gma_power_begin(dev, false)) {
--		REG_WRITE(control, temp);
--		REG_WRITE(base, addr);
--		gma_power_end(dev);
--	}
--
--	/* unpin the old GEM object */
--	if (psb_intel_crtc->cursor_obj) {
--		gt = container_of(psb_intel_crtc->cursor_obj,
--							struct gtt_range, gem);
--		psb_gtt_unpin(gt);
--		drm_gem_object_unreference(psb_intel_crtc->cursor_obj);
--	}
--
--	psb_intel_crtc->cursor_obj = obj;
--	return ret;
--
--unref_cursor:
--	drm_gem_object_unreference(obj);
--	return ret;
--}
--
--static int cdv_intel_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
--{
--	struct drm_device *dev = crtc->dev;
--	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
--	int pipe = psb_intel_crtc->pipe;
--	uint32_t temp = 0;
--	uint32_t adder;
--
--
--	if (x < 0) {
--		temp |= (CURSOR_POS_SIGN << CURSOR_X_SHIFT);
--		x = -x;
--	}
--	if (y < 0) {
--		temp |= (CURSOR_POS_SIGN << CURSOR_Y_SHIFT);
--		y = -y;
--	}
--
--	temp |= ((x & CURSOR_POS_MASK) << CURSOR_X_SHIFT);
--	temp |= ((y & CURSOR_POS_MASK) << CURSOR_Y_SHIFT);
--
--	adder = psb_intel_crtc->cursor_addr;
--
--	if (gma_power_begin(dev, false)) {
--		REG_WRITE((pipe == 0) ? CURAPOS : CURBPOS, temp);
--		REG_WRITE((pipe == 0) ? CURABASE : CURBBASE, adder);
--		gma_power_end(dev);
--	}
--	return 0;
--}
--
- static int cdv_crtc_set_config(struct drm_mode_set *set)
- {
- 	int ret = 0;
-@@ -1331,8 +1205,8 @@ const struct drm_crtc_helper_funcs cdv_i
- const struct drm_crtc_funcs cdv_intel_crtc_funcs = {
- 	.save = cdv_intel_crtc_save,
- 	.restore = cdv_intel_crtc_restore,
--	.cursor_set = cdv_intel_crtc_cursor_set,
--	.cursor_move = cdv_intel_crtc_cursor_move,
-+	.cursor_set = gma_crtc_cursor_set,
-+	.cursor_move = gma_crtc_cursor_move,
- 	.gamma_set = gma_crtc_gamma_set,
- 	.set_config = cdv_crtc_set_config,
- 	.destroy = gma_crtc_destroy,
diff --git a/patches.gma500/0022-drm-gma500-psb-Convert-to-generic-cursor-funcs.patch b/patches.gma500/0022-drm-gma500-psb-Convert-to-generic-cursor-funcs.patch
deleted file mode 100644
index 77818f539319e..0000000000000
--- a/patches.gma500/0022-drm-gma500-psb-Convert-to-generic-cursor-funcs.patch
+++ /dev/null
@@ -1,185 +0,0 @@
-From bc3bae59d7c246c37b7b188655eaf53e63aa2ed3 Mon Sep 17 00:00:00 2001
-From: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-Date: Wed, 10 Jul 2013 23:48:13 +0200
-Subject: drm/gma500/psb: Convert to generic cursor funcs
-
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-(cherry picked from commit 561573bf69f71c67e6d807efef91c7cf11637817)
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
----
- drivers/gpu/drm/gma500/psb_intel_display.c |  157 -----------------------------
- 1 file changed, 2 insertions(+), 155 deletions(-)
-
---- a/drivers/gpu/drm/gma500/psb_intel_display.c
-+++ b/drivers/gpu/drm/gma500/psb_intel_display.c
-@@ -434,159 +434,6 @@ static void psb_intel_crtc_restore(struc
- 		REG_WRITE(paletteReg + (i << 2), crtc_state->savePalette[i]);
- }
- 
--static int psb_intel_crtc_cursor_set(struct drm_crtc *crtc,
--				 struct drm_file *file_priv,
--				 uint32_t handle,
--				 uint32_t width, uint32_t height)
--{
--	struct drm_device *dev = crtc->dev;
--	struct drm_psb_private *dev_priv = dev->dev_private;
--	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
--	int pipe = psb_intel_crtc->pipe;
--	uint32_t control = (pipe == 0) ? CURACNTR : CURBCNTR;
--	uint32_t base = (pipe == 0) ? CURABASE : CURBBASE;
--	uint32_t temp;
--	size_t addr = 0;
--	struct gtt_range *gt;
--	struct gtt_range *cursor_gt = psb_intel_crtc->cursor_gt;
--	struct drm_gem_object *obj;
--	void *tmp_dst, *tmp_src;
--	int ret = 0, i, cursor_pages;
--
--	/* if we want to turn of the cursor ignore width and height */
--	if (!handle) {
--		/* turn off the cursor */
--		temp = CURSOR_MODE_DISABLE;
--
--		if (gma_power_begin(dev, false)) {
--			REG_WRITE(control, temp);
--			REG_WRITE(base, 0);
--			gma_power_end(dev);
--		}
--
--		/* Unpin the old GEM object */
--		if (psb_intel_crtc->cursor_obj) {
--			gt = container_of(psb_intel_crtc->cursor_obj,
--							struct gtt_range, gem);
--			psb_gtt_unpin(gt);
--			drm_gem_object_unreference(psb_intel_crtc->cursor_obj);
--			psb_intel_crtc->cursor_obj = NULL;
--		}
--
--		return 0;
--	}
--
--	/* Currently we only support 64x64 cursors */
--	if (width != 64 || height != 64) {
--		dev_dbg(dev->dev, "we currently only support 64x64 cursors\n");
--		return -EINVAL;
--	}
--
--	obj = drm_gem_object_lookup(dev, file_priv, handle);
--	if (!obj)
--		return -ENOENT;
--
--	if (obj->size < width * height * 4) {
--		dev_dbg(dev->dev, "buffer is to small\n");
--		ret = -ENOMEM;
--		goto unref_cursor;
--	}
--
--	gt = container_of(obj, struct gtt_range, gem);
--
--	/* Pin the memory into the GTT */
--	ret = psb_gtt_pin(gt);
--	if (ret) {
--		dev_err(dev->dev, "Can not pin down handle 0x%x\n", handle);
--		goto unref_cursor;
--	}
--
--	if (dev_priv->ops->cursor_needs_phys) {
--		if (cursor_gt == NULL) {
--			dev_err(dev->dev, "No hardware cursor mem available");
--			ret = -ENOMEM;
--			goto unref_cursor;
--		}
--
--		/* Prevent overflow */
--		if (gt->npage > 4)
--			cursor_pages = 4;
--		else
--			cursor_pages = gt->npage;
--
--		/* Copy the cursor to cursor mem */
--		tmp_dst = dev_priv->vram_addr + cursor_gt->offset;
--		for (i = 0; i < cursor_pages; i++) {
--			tmp_src = kmap(gt->pages[i]);
--			memcpy(tmp_dst, tmp_src, PAGE_SIZE);
--			kunmap(gt->pages[i]);
--			tmp_dst += PAGE_SIZE;
--		}
--
--		addr = psb_intel_crtc->cursor_addr;
--	} else {
--		addr = gt->offset;      /* Or resource.start ??? */
--		psb_intel_crtc->cursor_addr = addr;
--	}
--
--	temp = 0;
--	/* set the pipe for the cursor */
--	temp |= (pipe << 28);
--	temp |= CURSOR_MODE_64_ARGB_AX | MCURSOR_GAMMA_ENABLE;
--
--	if (gma_power_begin(dev, false)) {
--		REG_WRITE(control, temp);
--		REG_WRITE(base, addr);
--		gma_power_end(dev);
--	}
--
--	/* unpin the old bo */
--	if (psb_intel_crtc->cursor_obj) {
--		gt = container_of(psb_intel_crtc->cursor_obj,
--							struct gtt_range, gem);
--		psb_gtt_unpin(gt);
--		drm_gem_object_unreference(psb_intel_crtc->cursor_obj);
--	}
--
--	psb_intel_crtc->cursor_obj = obj;
--	return ret;
--
--unref_cursor:
--	drm_gem_object_unreference(obj);
--	return ret;
--}
--
--static int psb_intel_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
--{
--	struct drm_device *dev = crtc->dev;
--	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
--	int pipe = psb_intel_crtc->pipe;
--	uint32_t temp = 0;
--	uint32_t addr;
--
--
--	if (x < 0) {
--		temp |= (CURSOR_POS_SIGN << CURSOR_X_SHIFT);
--		x = -x;
--	}
--	if (y < 0) {
--		temp |= (CURSOR_POS_SIGN << CURSOR_Y_SHIFT);
--		y = -y;
--	}
--
--	temp |= ((x & CURSOR_POS_MASK) << CURSOR_X_SHIFT);
--	temp |= ((y & CURSOR_POS_MASK) << CURSOR_Y_SHIFT);
--
--	addr = psb_intel_crtc->cursor_addr;
--
--	if (gma_power_begin(dev, false)) {
--		REG_WRITE((pipe == 0) ? CURAPOS : CURBPOS, temp);
--		REG_WRITE((pipe == 0) ? CURABASE : CURBBASE, addr);
--		gma_power_end(dev);
--	}
--	return 0;
--}
--
- static int psb_crtc_set_config(struct drm_mode_set *set)
- {
- 	int ret;
-@@ -739,8 +586,8 @@ const struct drm_crtc_helper_funcs psb_i
- const struct drm_crtc_funcs psb_intel_crtc_funcs = {
- 	.save = psb_intel_crtc_save,
- 	.restore = psb_intel_crtc_restore,
--	.cursor_set = psb_intel_crtc_cursor_set,
--	.cursor_move = psb_intel_crtc_cursor_move,
-+	.cursor_set = gma_crtc_cursor_set,
-+	.cursor_move = gma_crtc_cursor_move,
- 	.gamma_set = gma_crtc_gamma_set,
- 	.set_config = psb_crtc_set_config,
- 	.destroy = gma_crtc_destroy,
diff --git a/patches.gma500/0023-drm-gma500-Add-generic-encoder-functions.patch b/patches.gma500/0023-drm-gma500-Add-generic-encoder-functions.patch
deleted file mode 100644
index 769f99591699e..0000000000000
--- a/patches.gma500/0023-drm-gma500-Add-generic-encoder-functions.patch
+++ /dev/null
@@ -1,100 +0,0 @@
-From 5364653ef2e45b444029fe37e390b3f4401e0377 Mon Sep 17 00:00:00 2001
-From: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-Date: Thu, 11 Jul 2013 00:54:45 +0200
-Subject: drm/gma500: Add generic encoder functions
-
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-(cherry picked from commit 593458470191e9226c2530c0e10f8e35604063dc)
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
----
- drivers/gpu/drm/gma500/gma_display.c   |   41 +++++++++++++++++++++++++++++++++
- drivers/gpu/drm/gma500/gma_display.h   |    4 +++
- drivers/gpu/drm/gma500/psb_intel_drv.h |   10 ++++++++
- 3 files changed, 55 insertions(+)
-
---- a/drivers/gpu/drm/gma500/gma_display.c
-+++ b/drivers/gpu/drm/gma500/gma_display.c
-@@ -519,6 +519,47 @@ void gma_crtc_destroy(struct drm_crtc *c
- 	kfree(psb_intel_crtc);
- }
- 
-+void gma_encoder_prepare(struct drm_encoder *encoder)
-+{
-+	struct drm_encoder_helper_funcs *encoder_funcs =
-+	    encoder->helper_private;
-+	/* lvds has its own version of prepare see psb_intel_lvds_prepare */
-+	encoder_funcs->dpms(encoder, DRM_MODE_DPMS_OFF);
-+}
-+
-+void gma_encoder_commit(struct drm_encoder *encoder)
-+{
-+	struct drm_encoder_helper_funcs *encoder_funcs =
-+	    encoder->helper_private;
-+	/* lvds has its own version of commit see psb_intel_lvds_commit */
-+	encoder_funcs->dpms(encoder, DRM_MODE_DPMS_ON);
-+}
-+
-+void gma_encoder_destroy(struct drm_encoder *encoder)
-+{
-+	struct psb_intel_encoder *intel_encoder = to_psb_intel_encoder(encoder);
-+
-+	drm_encoder_cleanup(encoder);
-+	kfree(intel_encoder);
-+}
-+
-+/* Currently there is only a 1:1 mapping of encoders and connectors */
-+struct drm_encoder *gma_best_encoder(struct drm_connector *connector)
-+{
-+	struct psb_intel_encoder *psb_intel_encoder =
-+					psb_intel_attached_encoder(connector);
-+
-+	return &psb_intel_encoder->base;
-+}
-+
-+void gma_connector_attach_encoder(struct psb_intel_connector *connector,
-+				  struct psb_intel_encoder *encoder)
-+{
-+	connector->encoder = encoder;
-+	drm_mode_connector_attach_encoder(&connector->base,
-+					  &encoder->base);
-+}
-+
- #define GMA_PLL_INVALID(s) { /* DRM_ERROR(s); */ return false; }
- 
- bool gma_pll_is_valid(struct drm_crtc *crtc,
---- a/drivers/gpu/drm/gma500/gma_display.h
-+++ b/drivers/gpu/drm/gma500/gma_display.h
-@@ -81,6 +81,10 @@ extern void gma_crtc_commit(struct drm_c
- extern void gma_crtc_disable(struct drm_crtc *crtc);
- extern void gma_crtc_destroy(struct drm_crtc *crtc);
- 
-+extern void gma_encoder_prepare(struct drm_encoder *encoder);
-+extern void gma_encoder_commit(struct drm_encoder *encoder);
-+extern void gma_encoder_destroy(struct drm_encoder *encoder);
-+
- /* Common clock related functions */
- extern const struct gma_limit_t *gma_limit(struct drm_crtc *crtc, int refclk);
- extern void gma_clock(int refclk, struct gma_clock_t *clock);
---- a/drivers/gpu/drm/gma500/psb_intel_drv.h
-+++ b/drivers/gpu/drm/gma500/psb_intel_drv.h
-@@ -230,10 +230,20 @@ extern void psb_intel_encoder_prepare(st
- extern void psb_intel_encoder_commit(struct drm_encoder *encoder);
- extern void psb_intel_encoder_destroy(struct drm_encoder *encoder);
- 
-+extern struct drm_encoder *gma_best_encoder(struct drm_connector *connector);
-+extern void gma_connector_attach_encoder(struct psb_intel_connector *connector,
-+					 struct psb_intel_encoder *encoder);
-+
- static inline struct psb_intel_encoder *psb_intel_attached_encoder(
- 						struct drm_connector *connector)
- {
- 	return to_psb_intel_connector(connector)->encoder;
-+}
-+
-+static inline struct psb_intel_encoder *gma_attached_encoder(
-+						struct drm_connector *connector)
-+{
-+	return to_psb_intel_connector(connector)->encoder;
- }
- 
- extern void psb_intel_connector_attach_encoder(
diff --git a/patches.gma500/0024-drm-gma500-Convert-to-generic-encoder-funcs.patch b/patches.gma500/0024-drm-gma500-Convert-to-generic-encoder-funcs.patch
deleted file mode 100644
index 7f12d6abb70ba..0000000000000
--- a/patches.gma500/0024-drm-gma500-Convert-to-generic-encoder-funcs.patch
+++ /dev/null
@@ -1,640 +0,0 @@
-From 61564510cf3bd2e188071a3ec2fa32c0c09d6208 Mon Sep 17 00:00:00 2001
-From: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-Date: Thu, 11 Jul 2013 01:02:01 +0200
-Subject: drm/gma500: Convert to generic encoder funcs
-
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-(cherry picked from commit c9d4959000c0b11c4265af820434b868c4066e0e)
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
----
- drivers/gpu/drm/gma500/cdv_intel_crt.c       |   13 +++----
- drivers/gpu/drm/gma500/cdv_intel_display.c   |    4 +-
- drivers/gpu/drm/gma500/cdv_intel_dp.c        |   17 +++++----
- drivers/gpu/drm/gma500/cdv_intel_hdmi.c      |   19 +++++-----
- drivers/gpu/drm/gma500/cdv_intel_lvds.c      |    9 ++---
- drivers/gpu/drm/gma500/framebuffer.c         |    2 -
- drivers/gpu/drm/gma500/gma_display.c         |    4 +-
- drivers/gpu/drm/gma500/mdfld_intel_display.c |    2 -
- drivers/gpu/drm/gma500/oaktrail_crtc.c       |    2 -
- drivers/gpu/drm/gma500/oaktrail_hdmi.c       |    9 ++---
- drivers/gpu/drm/gma500/oaktrail_lvds.c       |    3 -
- drivers/gpu/drm/gma500/psb_drv.c             |    2 -
- drivers/gpu/drm/gma500/psb_intel_display.c   |   47 +--------------------------
- drivers/gpu/drm/gma500/psb_intel_drv.h       |   17 ---------
- drivers/gpu/drm/gma500/psb_intel_lvds.c      |   15 ++++----
- drivers/gpu/drm/gma500/psb_intel_sdvo.c      |   17 ++++-----
- 16 files changed, 58 insertions(+), 124 deletions(-)
-
---- a/drivers/gpu/drm/gma500/cdv_intel_crt.c
-+++ b/drivers/gpu/drm/gma500/cdv_intel_crt.c
-@@ -198,7 +198,7 @@ static enum drm_connector_status cdv_int
- static void cdv_intel_crt_destroy(struct drm_connector *connector)
- {
- 	struct psb_intel_encoder *psb_intel_encoder =
--					psb_intel_attached_encoder(connector);
-+					gma_attached_encoder(connector);
- 
- 	psb_intel_i2c_destroy(psb_intel_encoder->ddc_bus);
- 	drm_sysfs_connector_remove(connector);
-@@ -209,7 +209,7 @@ static void cdv_intel_crt_destroy(struct
- static int cdv_intel_crt_get_modes(struct drm_connector *connector)
- {
- 	struct psb_intel_encoder *psb_intel_encoder =
--				psb_intel_attached_encoder(connector);
-+				gma_attached_encoder(connector);
- 	return psb_intel_ddc_get_modes(connector, &psb_intel_encoder->ddc_bus->adapter);
- }
- 
-@@ -227,8 +227,8 @@ static int cdv_intel_crt_set_property(st
- static const struct drm_encoder_helper_funcs cdv_intel_crt_helper_funcs = {
- 	.dpms = cdv_intel_crt_dpms,
- 	.mode_fixup = cdv_intel_crt_mode_fixup,
--	.prepare = psb_intel_encoder_prepare,
--	.commit = psb_intel_encoder_commit,
-+	.prepare = gma_encoder_prepare,
-+	.commit = gma_encoder_commit,
- 	.mode_set = cdv_intel_crt_mode_set,
- };
- 
-@@ -244,7 +244,7 @@ static const struct drm_connector_helper
- 				cdv_intel_crt_connector_helper_funcs = {
- 	.mode_valid = cdv_intel_crt_mode_valid,
- 	.get_modes = cdv_intel_crt_get_modes,
--	.best_encoder = psb_intel_best_encoder,
-+	.best_encoder = gma_best_encoder,
- };
- 
- static void cdv_intel_crt_enc_destroy(struct drm_encoder *encoder)
-@@ -284,8 +284,7 @@ void cdv_intel_crt_init(struct drm_devic
- 	drm_encoder_init(dev, encoder,
- 		&cdv_intel_crt_enc_funcs, DRM_MODE_ENCODER_DAC);
- 
--	psb_intel_connector_attach_encoder(psb_intel_connector,
--					   psb_intel_encoder);
-+	gma_connector_attach_encoder(psb_intel_connector, psb_intel_encoder);
- 
- 	/* Set up the DDC bus. */
- 	i2c_reg = GPIOA;
---- a/drivers/gpu/drm/gma500/cdv_intel_display.c
-+++ b/drivers/gpu/drm/gma500/cdv_intel_display.c
-@@ -499,7 +499,7 @@ static bool is_pipeb_lvds(struct drm_dev
- 
- 	list_for_each_entry(connector, &mode_config->connector_list, head) {
- 		struct psb_intel_encoder *psb_intel_encoder =
--					psb_intel_attached_encoder(connector);
-+					gma_attached_encoder(connector);
- 
- 		if (!connector->encoder
- 		    || connector->encoder->crtc != crtc)
-@@ -634,7 +634,7 @@ static int cdv_intel_crtc_mode_set(struc
- 
- 	list_for_each_entry(connector, &mode_config->connector_list, head) {
- 		struct psb_intel_encoder *psb_intel_encoder =
--					psb_intel_attached_encoder(connector);
-+					gma_attached_encoder(connector);
- 
- 		if (!connector->encoder
- 		    || connector->encoder->crtc != crtc)
---- a/drivers/gpu/drm/gma500/cdv_intel_dp.c
-+++ b/drivers/gpu/drm/gma500/cdv_intel_dp.c
-@@ -315,7 +315,7 @@ static int
- cdv_intel_dp_mode_valid(struct drm_connector *connector,
- 		    struct drm_display_mode *mode)
- {
--	struct psb_intel_encoder *encoder = psb_intel_attached_encoder(connector);
-+	struct psb_intel_encoder *encoder = gma_attached_encoder(connector);
- 	struct cdv_intel_dp *intel_dp = encoder->dev_priv;
- 	int max_link_clock = cdv_intel_dp_link_clock(cdv_intel_dp_max_link_bw(encoder));
- 	int max_lanes = cdv_intel_dp_max_lane_count(encoder);
-@@ -1532,7 +1532,7 @@ cdv_dp_detect(struct psb_intel_encoder *
- static enum drm_connector_status
- cdv_intel_dp_detect(struct drm_connector *connector, bool force)
- {
--	struct psb_intel_encoder *encoder = psb_intel_attached_encoder(connector);
-+	struct psb_intel_encoder *encoder = gma_attached_encoder(connector);
- 	struct cdv_intel_dp *intel_dp = encoder->dev_priv;
- 	enum drm_connector_status status;
- 	struct edid *edid = NULL;
-@@ -1566,7 +1566,8 @@ cdv_intel_dp_detect(struct drm_connector
- 
- static int cdv_intel_dp_get_modes(struct drm_connector *connector)
- {
--	struct psb_intel_encoder *intel_encoder = psb_intel_attached_encoder(connector);
-+	struct psb_intel_encoder *intel_encoder =
-+						gma_attached_encoder(connector);
- 	struct cdv_intel_dp *intel_dp = intel_encoder->dev_priv;
- 	struct edid *edid = NULL;
- 	int ret = 0;
-@@ -1622,7 +1623,7 @@ static int cdv_intel_dp_get_modes(struct
- static bool
- cdv_intel_dp_detect_audio(struct drm_connector *connector)
- {
--	struct psb_intel_encoder *encoder = psb_intel_attached_encoder(connector);
-+	struct psb_intel_encoder *encoder = gma_attached_encoder(connector);
- 	struct cdv_intel_dp *intel_dp = encoder->dev_priv;
- 	struct edid *edid;
- 	bool has_audio = false;
-@@ -1648,7 +1649,7 @@ cdv_intel_dp_set_property(struct drm_con
- 		      uint64_t val)
- {
- 	struct drm_psb_private *dev_priv = connector->dev->dev_private;
--	struct psb_intel_encoder *encoder = psb_intel_attached_encoder(connector);
-+	struct psb_intel_encoder *encoder = gma_attached_encoder(connector);
- 	struct cdv_intel_dp *intel_dp = encoder->dev_priv;
- 	int ret;
- 
-@@ -1702,7 +1703,7 @@ static void
- cdv_intel_dp_destroy(struct drm_connector *connector)
- {
- 	struct psb_intel_encoder *psb_intel_encoder =
--					psb_intel_attached_encoder(connector);
-+						gma_attached_encoder(connector);
- 	struct cdv_intel_dp *intel_dp = psb_intel_encoder->dev_priv;
- 
- 	if (is_edp(psb_intel_encoder)) {
-@@ -1742,7 +1743,7 @@ static const struct drm_connector_funcs
- static const struct drm_connector_helper_funcs cdv_intel_dp_connector_helper_funcs = {
- 	.get_modes = cdv_intel_dp_get_modes,
- 	.mode_valid = cdv_intel_dp_mode_valid,
--	.best_encoder = psb_intel_best_encoder,
-+	.best_encoder = gma_best_encoder,
- };
- 
- static const struct drm_encoder_funcs cdv_intel_dp_enc_funcs = {
-@@ -1828,7 +1829,7 @@ cdv_intel_dp_init(struct drm_device *dev
- 	drm_connector_init(dev, connector, &cdv_intel_dp_connector_funcs, type);
- 	drm_encoder_init(dev, encoder, &cdv_intel_dp_enc_funcs, DRM_MODE_ENCODER_TMDS);
- 
--	psb_intel_connector_attach_encoder(psb_intel_connector, psb_intel_encoder);
-+	gma_connector_attach_encoder(psb_intel_connector, psb_intel_encoder);
- 
- 	if (type == DRM_MODE_CONNECTOR_DisplayPort)
-         	psb_intel_encoder->type = INTEL_OUTPUT_DISPLAYPORT;
---- a/drivers/gpu/drm/gma500/cdv_intel_hdmi.c
-+++ b/drivers/gpu/drm/gma500/cdv_intel_hdmi.c
-@@ -117,7 +117,7 @@ static void cdv_hdmi_save(struct drm_con
- {
- 	struct drm_device *dev = connector->dev;
- 	struct psb_intel_encoder *psb_intel_encoder =
--					psb_intel_attached_encoder(connector);
-+						gma_attached_encoder(connector);
- 	struct mid_intel_hdmi_priv *hdmi_priv = psb_intel_encoder->dev_priv;
- 
- 	hdmi_priv->save_HDMIB = REG_READ(hdmi_priv->hdmi_reg);
-@@ -127,7 +127,7 @@ static void cdv_hdmi_restore(struct drm_
- {
- 	struct drm_device *dev = connector->dev;
- 	struct psb_intel_encoder *psb_intel_encoder =
--					psb_intel_attached_encoder(connector);
-+						gma_attached_encoder(connector);
- 	struct mid_intel_hdmi_priv *hdmi_priv = psb_intel_encoder->dev_priv;
- 
- 	REG_WRITE(hdmi_priv->hdmi_reg, hdmi_priv->save_HDMIB);
-@@ -138,7 +138,7 @@ static enum drm_connector_status cdv_hdm
- 				struct drm_connector *connector, bool force)
- {
- 	struct psb_intel_encoder *psb_intel_encoder =
--					psb_intel_attached_encoder(connector);
-+						gma_attached_encoder(connector);
- 	struct mid_intel_hdmi_priv *hdmi_priv = psb_intel_encoder->dev_priv;
- 	struct edid *edid = NULL;
- 	enum drm_connector_status status = connector_status_disconnected;
-@@ -222,7 +222,7 @@ static int cdv_hdmi_set_property(struct
- static int cdv_hdmi_get_modes(struct drm_connector *connector)
- {
- 	struct psb_intel_encoder *psb_intel_encoder =
--					psb_intel_attached_encoder(connector);
-+						gma_attached_encoder(connector);
- 	struct edid *edid = NULL;
- 	int ret = 0;
- 
-@@ -257,7 +257,7 @@ static int cdv_hdmi_mode_valid(struct dr
- static void cdv_hdmi_destroy(struct drm_connector *connector)
- {
- 	struct psb_intel_encoder *psb_intel_encoder =
--					psb_intel_attached_encoder(connector);
-+						gma_attached_encoder(connector);
- 
- 	if (psb_intel_encoder->i2c_bus)
- 		psb_intel_i2c_destroy(psb_intel_encoder->i2c_bus);
-@@ -269,16 +269,16 @@ static void cdv_hdmi_destroy(struct drm_
- static const struct drm_encoder_helper_funcs cdv_hdmi_helper_funcs = {
- 	.dpms = cdv_hdmi_dpms,
- 	.mode_fixup = cdv_hdmi_mode_fixup,
--	.prepare = psb_intel_encoder_prepare,
-+	.prepare = gma_encoder_prepare,
- 	.mode_set = cdv_hdmi_mode_set,
--	.commit = psb_intel_encoder_commit,
-+	.commit = gma_encoder_commit,
- };
- 
- static const struct drm_connector_helper_funcs
- 					cdv_hdmi_connector_helper_funcs = {
- 	.get_modes = cdv_hdmi_get_modes,
- 	.mode_valid = cdv_hdmi_mode_valid,
--	.best_encoder = psb_intel_best_encoder,
-+	.best_encoder = gma_best_encoder,
- };
- 
- static const struct drm_connector_funcs cdv_hdmi_connector_funcs = {
-@@ -328,8 +328,7 @@ void cdv_hdmi_init(struct drm_device *de
- 	drm_encoder_init(dev, encoder, &psb_intel_lvds_enc_funcs,
- 			 DRM_MODE_ENCODER_TMDS);
- 
--	psb_intel_connector_attach_encoder(psb_intel_connector,
--					   psb_intel_encoder);
-+	gma_connector_attach_encoder(psb_intel_connector, psb_intel_encoder);
- 	psb_intel_encoder->type = INTEL_OUTPUT_HDMI;
- 	hdmi_priv->hdmi_reg = reg;
- 	hdmi_priv->has_hdmi_sink = false;
---- a/drivers/gpu/drm/gma500/cdv_intel_lvds.c
-+++ b/drivers/gpu/drm/gma500/cdv_intel_lvds.c
-@@ -408,7 +408,7 @@ static int cdv_intel_lvds_get_modes(stru
- 	struct drm_device *dev = connector->dev;
- 	struct drm_psb_private *dev_priv = dev->dev_private;
- 	struct psb_intel_encoder *psb_intel_encoder =
--					psb_intel_attached_encoder(connector);
-+						gma_attached_encoder(connector);
- 	struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
- 	int ret;
- 
-@@ -445,7 +445,7 @@ static int cdv_intel_lvds_get_modes(stru
- static void cdv_intel_lvds_destroy(struct drm_connector *connector)
- {
- 	struct psb_intel_encoder *psb_intel_encoder =
--					psb_intel_attached_encoder(connector);
-+						gma_attached_encoder(connector);
- 
- 	if (psb_intel_encoder->i2c_bus)
- 		psb_intel_i2c_destroy(psb_intel_encoder->i2c_bus);
-@@ -529,7 +529,7 @@ static const struct drm_connector_helper
- 				cdv_intel_lvds_connector_helper_funcs = {
- 	.get_modes = cdv_intel_lvds_get_modes,
- 	.mode_valid = cdv_intel_lvds_mode_valid,
--	.best_encoder = psb_intel_best_encoder,
-+	.best_encoder = gma_best_encoder,
- };
- 
- static const struct drm_connector_funcs cdv_intel_lvds_connector_funcs = {
-@@ -659,8 +659,7 @@ void cdv_intel_lvds_init(struct drm_devi
- 			 DRM_MODE_ENCODER_LVDS);
- 
- 
--	psb_intel_connector_attach_encoder(psb_intel_connector,
--					   psb_intel_encoder);
-+	gma_connector_attach_encoder(psb_intel_connector, psb_intel_encoder);
- 	psb_intel_encoder->type = INTEL_OUTPUT_LVDS;
- 
- 	drm_encoder_helper_add(encoder, &cdv_intel_lvds_helper_funcs);
---- a/drivers/gpu/drm/gma500/framebuffer.c
-+++ b/drivers/gpu/drm/gma500/framebuffer.c
-@@ -704,7 +704,7 @@ static void psb_setup_outputs(struct drm
- 	list_for_each_entry(connector, &dev->mode_config.connector_list,
- 			    head) {
- 		struct psb_intel_encoder *psb_intel_encoder =
--			psb_intel_attached_encoder(connector);
-+						gma_attached_encoder(connector);
- 		struct drm_encoder *encoder = &psb_intel_encoder->base;
- 		int crtc_mask = 0, clone_mask = 0;
- 
---- a/drivers/gpu/drm/gma500/gma_display.c
-+++ b/drivers/gpu/drm/gma500/gma_display.c
-@@ -38,7 +38,7 @@ bool gma_pipe_has_type(struct drm_crtc *
- 	list_for_each_entry(l_entry, &mode_config->connector_list, head) {
- 		if (l_entry->encoder && l_entry->encoder->crtc == crtc) {
- 			struct psb_intel_encoder *psb_intel_encoder =
--					psb_intel_attached_encoder(l_entry);
-+						gma_attached_encoder(l_entry);
- 			if (psb_intel_encoder->type == type)
- 				return true;
- 		}
-@@ -547,7 +547,7 @@ void gma_encoder_destroy(struct drm_enco
- struct drm_encoder *gma_best_encoder(struct drm_connector *connector)
- {
- 	struct psb_intel_encoder *psb_intel_encoder =
--					psb_intel_attached_encoder(connector);
-+						gma_attached_encoder(connector);
- 
- 	return &psb_intel_encoder->base;
- }
---- a/drivers/gpu/drm/gma500/mdfld_intel_display.c
-+++ b/drivers/gpu/drm/gma500/mdfld_intel_display.c
-@@ -747,7 +747,7 @@ static int mdfld_crtc_mode_set(struct dr
- 		if (encoder->crtc != crtc)
- 			continue;
- 
--		psb_intel_encoder = psb_intel_attached_encoder(connector);
-+		psb_intel_encoder = gma_attached_encoder(connector);
- 
- 		switch (psb_intel_encoder->type) {
- 		case INTEL_OUTPUT_MIPI:
---- a/drivers/gpu/drm/gma500/oaktrail_crtc.c
-+++ b/drivers/gpu/drm/gma500/oaktrail_crtc.c
-@@ -324,7 +324,7 @@ static int oaktrail_crtc_mode_set(struct
- 		if (!connector->encoder || connector->encoder->crtc != crtc)
- 			continue;
- 
--		psb_intel_encoder = psb_intel_attached_encoder(connector);
-+		psb_intel_encoder = gma_attached_encoder(connector);
- 
- 		switch (psb_intel_encoder->type) {
- 		case INTEL_OUTPUT_LVDS:
---- a/drivers/gpu/drm/gma500/oaktrail_hdmi.c
-+++ b/drivers/gpu/drm/gma500/oaktrail_hdmi.c
-@@ -609,16 +609,16 @@ static void oaktrail_hdmi_destroy(struct
- static const struct drm_encoder_helper_funcs oaktrail_hdmi_helper_funcs = {
- 	.dpms = oaktrail_hdmi_dpms,
- 	.mode_fixup = oaktrail_hdmi_mode_fixup,
--	.prepare = psb_intel_encoder_prepare,
-+	.prepare = gma_encoder_prepare,
- 	.mode_set = oaktrail_hdmi_mode_set,
--	.commit = psb_intel_encoder_commit,
-+	.commit = gma_encoder_commit,
- };
- 
- static const struct drm_connector_helper_funcs
- 					oaktrail_hdmi_connector_helper_funcs = {
- 	.get_modes = oaktrail_hdmi_get_modes,
- 	.mode_valid = oaktrail_hdmi_mode_valid,
--	.best_encoder = psb_intel_best_encoder,
-+	.best_encoder = gma_best_encoder,
- };
- 
- static const struct drm_connector_funcs oaktrail_hdmi_connector_funcs = {
-@@ -663,8 +663,7 @@ void oaktrail_hdmi_init(struct drm_devic
- 			 &oaktrail_hdmi_enc_funcs,
- 			 DRM_MODE_ENCODER_TMDS);
- 
--	psb_intel_connector_attach_encoder(psb_intel_connector,
--					   psb_intel_encoder);
-+	gma_connector_attach_encoder(psb_intel_connector, psb_intel_encoder);
- 
- 	psb_intel_encoder->type = INTEL_OUTPUT_HDMI;
- 	drm_encoder_helper_add(encoder, &oaktrail_hdmi_helper_funcs);
---- a/drivers/gpu/drm/gma500/oaktrail_lvds.c
-+++ b/drivers/gpu/drm/gma500/oaktrail_lvds.c
-@@ -352,8 +352,7 @@ void oaktrail_lvds_init(struct drm_devic
- 	drm_encoder_init(dev, encoder, &psb_intel_lvds_enc_funcs,
- 			 DRM_MODE_ENCODER_LVDS);
- 
--	psb_intel_connector_attach_encoder(psb_intel_connector,
--					   psb_intel_encoder);
-+	gma_connector_attach_encoder(psb_intel_connector, psb_intel_encoder);
- 	psb_intel_encoder->type = INTEL_OUTPUT_LVDS;
- 
- 	drm_encoder_helper_add(encoder, &oaktrail_lvds_helper_funcs);
---- a/drivers/gpu/drm/gma500/psb_drv.c
-+++ b/drivers/gpu/drm/gma500/psb_drv.c
-@@ -372,7 +372,7 @@ static int psb_driver_load(struct drm_de
- 	/* Only add backlight support if we have LVDS output */
- 	list_for_each_entry(connector, &dev->mode_config.connector_list,
- 			    head) {
--		psb_intel_encoder = psb_intel_attached_encoder(connector);
-+		psb_intel_encoder = gma_attached_encoder(connector);
- 
- 		switch (psb_intel_encoder->type) {
- 		case INTEL_OUTPUT_LVDS:
---- a/drivers/gpu/drm/gma500/psb_intel_display.c
-+++ b/drivers/gpu/drm/gma500/psb_intel_display.c
-@@ -82,30 +82,6 @@ static void psb_intel_clock(int refclk,
- 	clock->dot = clock->vco / clock->p;
- }
- 
--void psb_intel_encoder_prepare(struct drm_encoder *encoder)
--{
--	struct drm_encoder_helper_funcs *encoder_funcs =
--	    encoder->helper_private;
--	/* lvds has its own version of prepare see psb_intel_lvds_prepare */
--	encoder_funcs->dpms(encoder, DRM_MODE_DPMS_OFF);
--}
--
--void psb_intel_encoder_commit(struct drm_encoder *encoder)
--{
--	struct drm_encoder_helper_funcs *encoder_funcs =
--	    encoder->helper_private;
--	/* lvds has its own version of commit see psb_intel_lvds_commit */
--	encoder_funcs->dpms(encoder, DRM_MODE_DPMS_ON);
--}
--
--void psb_intel_encoder_destroy(struct drm_encoder *encoder)
--{
--	struct psb_intel_encoder *intel_encoder = to_psb_intel_encoder(encoder);
--
--	drm_encoder_cleanup(encoder);
--	kfree(intel_encoder);
--}
--
- /**
-  * Return the pipe currently connected to the panel fitter,
-  * or -1 if the panel fitter is not present or not in use
-@@ -152,7 +128,7 @@ static int psb_intel_crtc_mode_set(struc
- 
- 	list_for_each_entry(connector, &mode_config->connector_list, head) {
- 		struct psb_intel_encoder *psb_intel_encoder =
--					psb_intel_attached_encoder(connector);
-+						gma_attached_encoder(connector);
- 
- 		if (!connector->encoder
- 		    || connector->encoder->crtc != crtc)
-@@ -752,29 +728,10 @@ int psb_intel_connector_clones(struct dr
- 	list_for_each_entry(connector, &dev->mode_config.connector_list,
- 			    head) {
- 		struct psb_intel_encoder *psb_intel_encoder =
--					psb_intel_attached_encoder(connector);
-+						gma_attached_encoder(connector);
- 		if (type_mask & (1 << psb_intel_encoder->type))
- 			index_mask |= (1 << entry);
- 		entry++;
- 	}
- 	return index_mask;
- }
--
--/* current intel driver doesn't take advantage of encoders
--   always give back the encoder for the connector
--*/
--struct drm_encoder *psb_intel_best_encoder(struct drm_connector *connector)
--{
--	struct psb_intel_encoder *psb_intel_encoder =
--					psb_intel_attached_encoder(connector);
--
--	return &psb_intel_encoder->base;
--}
--
--void psb_intel_connector_attach_encoder(struct psb_intel_connector *connector,
--					struct psb_intel_encoder *encoder)
--{
--	connector->encoder = encoder;
--	drm_mode_connector_attach_encoder(&connector->base,
--					  &encoder->base);
--}
---- a/drivers/gpu/drm/gma500/psb_intel_drv.h
-+++ b/drivers/gpu/drm/gma500/psb_intel_drv.h
-@@ -226,33 +226,16 @@ extern void oaktrail_dsi_init(struct drm
- extern void mid_dsi_init(struct drm_device *dev,
- 		    struct psb_intel_mode_device *mode_dev, int dsi_num);
- 
--extern void psb_intel_encoder_prepare(struct drm_encoder *encoder);
--extern void psb_intel_encoder_commit(struct drm_encoder *encoder);
--extern void psb_intel_encoder_destroy(struct drm_encoder *encoder);
--
- extern struct drm_encoder *gma_best_encoder(struct drm_connector *connector);
- extern void gma_connector_attach_encoder(struct psb_intel_connector *connector,
- 					 struct psb_intel_encoder *encoder);
- 
--static inline struct psb_intel_encoder *psb_intel_attached_encoder(
--						struct drm_connector *connector)
--{
--	return to_psb_intel_connector(connector)->encoder;
--}
--
- static inline struct psb_intel_encoder *gma_attached_encoder(
- 						struct drm_connector *connector)
- {
- 	return to_psb_intel_connector(connector)->encoder;
- }
- 
--extern void psb_intel_connector_attach_encoder(
--					struct psb_intel_connector *connector,
--					struct psb_intel_encoder *encoder);
--
--extern struct drm_encoder *psb_intel_best_encoder(struct drm_connector
--					      *connector);
--
- extern struct drm_display_mode *psb_intel_crtc_mode_get(struct drm_device *dev,
- 						    struct drm_crtc *crtc);
- extern int psb_intel_get_pipe_from_crtc_id(struct drm_device *dev, void *data,
---- a/drivers/gpu/drm/gma500/psb_intel_lvds.c
-+++ b/drivers/gpu/drm/gma500/psb_intel_lvds.c
-@@ -268,7 +268,7 @@ static void psb_intel_lvds_save(struct d
- 	struct drm_psb_private *dev_priv =
- 		(struct drm_psb_private *)dev->dev_private;
- 	struct psb_intel_encoder *psb_intel_encoder =
--					psb_intel_attached_encoder(connector);
-+						gma_attached_encoder(connector);
- 	struct psb_intel_lvds_priv *lvds_priv =
- 		(struct psb_intel_lvds_priv *)psb_intel_encoder->dev_priv;
- 
-@@ -308,7 +308,7 @@ static void psb_intel_lvds_restore(struc
- 	struct drm_device *dev = connector->dev;
- 	u32 pp_status;
- 	struct psb_intel_encoder *psb_intel_encoder =
--					psb_intel_attached_encoder(connector);
-+						gma_attached_encoder(connector);
- 	struct psb_intel_lvds_priv *lvds_priv =
- 		(struct psb_intel_lvds_priv *)psb_intel_encoder->dev_priv;
- 
-@@ -350,7 +350,7 @@ int psb_intel_lvds_mode_valid(struct drm
- {
- 	struct drm_psb_private *dev_priv = connector->dev->dev_private;
- 	struct psb_intel_encoder *psb_intel_encoder =
--					psb_intel_attached_encoder(connector);
-+						gma_attached_encoder(connector);
- 	struct drm_display_mode *fixed_mode =
- 					dev_priv->mode_dev.panel_fixed_mode;
- 
-@@ -526,7 +526,7 @@ static int psb_intel_lvds_get_modes(stru
- 	struct drm_psb_private *dev_priv = dev->dev_private;
- 	struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
- 	struct psb_intel_encoder *psb_intel_encoder =
--					psb_intel_attached_encoder(connector);
-+						gma_attached_encoder(connector);
- 	struct psb_intel_lvds_priv *lvds_priv = psb_intel_encoder->dev_priv;
- 	int ret = 0;
- 
-@@ -565,7 +565,7 @@ static int psb_intel_lvds_get_modes(stru
- void psb_intel_lvds_destroy(struct drm_connector *connector)
- {
- 	struct psb_intel_encoder *psb_intel_encoder =
--					psb_intel_attached_encoder(connector);
-+						gma_attached_encoder(connector);
- 	struct psb_intel_lvds_priv *lvds_priv = psb_intel_encoder->dev_priv;
- 
- 	if (lvds_priv->ddc_bus)
-@@ -656,7 +656,7 @@ const struct drm_connector_helper_funcs
- 				psb_intel_lvds_connector_helper_funcs = {
- 	.get_modes = psb_intel_lvds_get_modes,
- 	.mode_valid = psb_intel_lvds_mode_valid,
--	.best_encoder = psb_intel_best_encoder,
-+	.best_encoder = gma_best_encoder,
- };
- 
- const struct drm_connector_funcs psb_intel_lvds_connector_funcs = {
-@@ -734,8 +734,7 @@ void psb_intel_lvds_init(struct drm_devi
- 			 &psb_intel_lvds_enc_funcs,
- 			 DRM_MODE_ENCODER_LVDS);
- 
--	psb_intel_connector_attach_encoder(psb_intel_connector,
--					   psb_intel_encoder);
-+	gma_connector_attach_encoder(psb_intel_connector, psb_intel_encoder);
- 	psb_intel_encoder->type = INTEL_OUTPUT_LVDS;
- 
- 	drm_encoder_helper_add(encoder, &psb_intel_lvds_helper_funcs);
---- a/drivers/gpu/drm/gma500/psb_intel_sdvo.c
-+++ b/drivers/gpu/drm/gma500/psb_intel_sdvo.c
-@@ -200,7 +200,7 @@ static struct psb_intel_sdvo *to_psb_int
- 
- static struct psb_intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
- {
--	return container_of(psb_intel_attached_encoder(connector),
-+	return container_of(gma_attached_encoder(connector),
- 			    struct psb_intel_sdvo, base);
- }
- 
-@@ -1837,7 +1837,7 @@ static void psb_intel_sdvo_save(struct d
- {
- 	struct drm_device *dev = connector->dev;
- 	struct psb_intel_encoder *psb_intel_encoder =
--					psb_intel_attached_encoder(connector);
-+						gma_attached_encoder(connector);
- 	struct psb_intel_sdvo *sdvo =
- 				to_psb_intel_sdvo(&psb_intel_encoder->base);
- 
-@@ -1847,8 +1847,7 @@ static void psb_intel_sdvo_save(struct d
- static void psb_intel_sdvo_restore(struct drm_connector *connector)
- {
- 	struct drm_device *dev = connector->dev;
--	struct drm_encoder *encoder =
--				&psb_intel_attached_encoder(connector)->base;
-+	struct drm_encoder *encoder = &gma_attached_encoder(connector)->base;
- 	struct psb_intel_sdvo *sdvo = to_psb_intel_sdvo(encoder);
- 	struct drm_crtc *crtc = encoder->crtc;
- 
-@@ -1864,9 +1863,9 @@ static void psb_intel_sdvo_restore(struc
- static const struct drm_encoder_helper_funcs psb_intel_sdvo_helper_funcs = {
- 	.dpms = psb_intel_sdvo_dpms,
- 	.mode_fixup = psb_intel_sdvo_mode_fixup,
--	.prepare = psb_intel_encoder_prepare,
-+	.prepare = gma_encoder_prepare,
- 	.mode_set = psb_intel_sdvo_mode_set,
--	.commit = psb_intel_encoder_commit,
-+	.commit = gma_encoder_commit,
- };
- 
- static const struct drm_connector_funcs psb_intel_sdvo_connector_funcs = {
-@@ -1882,7 +1881,7 @@ static const struct drm_connector_funcs
- static const struct drm_connector_helper_funcs psb_intel_sdvo_connector_helper_funcs = {
- 	.get_modes = psb_intel_sdvo_get_modes,
- 	.mode_valid = psb_intel_sdvo_mode_valid,
--	.best_encoder = psb_intel_best_encoder,
-+	.best_encoder = gma_best_encoder,
- };
- 
- static void psb_intel_sdvo_enc_destroy(struct drm_encoder *encoder)
-@@ -1894,7 +1893,7 @@ static void psb_intel_sdvo_enc_destroy(s
- 				 psb_intel_sdvo->sdvo_lvds_fixed_mode);
- 
- 	i2c_del_adapter(&psb_intel_sdvo->ddc);
--	psb_intel_encoder_destroy(encoder);
-+	gma_encoder_destroy(encoder);
- }
- 
- static const struct drm_encoder_funcs psb_intel_sdvo_enc_funcs = {
-@@ -2055,7 +2054,7 @@ psb_intel_sdvo_connector_init(struct psb
- 	connector->base.base.doublescan_allowed = 0;
- 	connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
- 
--	psb_intel_connector_attach_encoder(&connector->base, &encoder->base);
-+	gma_connector_attach_encoder(&connector->base, &encoder->base);
- 	drm_sysfs_connector_add(&connector->base.base);
- }
- 
diff --git a/patches.gma500/0025-drm-gma500-Add-generic-crtc-save-restore-funcs.patch b/patches.gma500/0025-drm-gma500-Add-generic-crtc-save-restore-funcs.patch
deleted file mode 100644
index 068a95413ae76..0000000000000
--- a/patches.gma500/0025-drm-gma500-Add-generic-crtc-save-restore-funcs.patch
+++ /dev/null
@@ -1,139 +0,0 @@
-From f011afb070431eca1ff447509050ea942c4649e2 Mon Sep 17 00:00:00 2001
-From: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-Date: Fri, 12 Jul 2013 15:30:56 +0200
-Subject: drm/gma500: Add generic crtc save/restore funcs
-
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-(cherry picked from commit 2e775700a297982a3ffbfe72935982b6fb51e015)
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
----
- drivers/gpu/drm/gma500/gma_display.c |  105 +++++++++++++++++++++++++++++++++++
- drivers/gpu/drm/gma500/gma_display.h |    3 +
- 2 files changed, 108 insertions(+)
-
---- a/drivers/gpu/drm/gma500/gma_display.c
-+++ b/drivers/gpu/drm/gma500/gma_display.c
-@@ -519,6 +519,111 @@ void gma_crtc_destroy(struct drm_crtc *c
- 	kfree(psb_intel_crtc);
- }
- 
-+/**
-+ * Save HW states of given crtc
-+ */
-+void gma_crtc_save(struct drm_crtc *crtc)
-+{
-+	struct drm_device *dev = crtc->dev;
-+	struct drm_psb_private *dev_priv = dev->dev_private;
-+	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
-+	struct psb_intel_crtc_state *crtc_state = psb_intel_crtc->crtc_state;
-+	const struct psb_offset *map = &dev_priv->regmap[psb_intel_crtc->pipe];
-+	uint32_t palette_reg;
-+	int i;
-+
-+	if (!crtc_state) {
-+		dev_err(dev->dev, "No CRTC state found\n");
-+		return;
-+	}
-+
-+	crtc_state->saveDSPCNTR = REG_READ(map->cntr);
-+	crtc_state->savePIPECONF = REG_READ(map->conf);
-+	crtc_state->savePIPESRC = REG_READ(map->src);
-+	crtc_state->saveFP0 = REG_READ(map->fp0);
-+	crtc_state->saveFP1 = REG_READ(map->fp1);
-+	crtc_state->saveDPLL = REG_READ(map->dpll);
-+	crtc_state->saveHTOTAL = REG_READ(map->htotal);
-+	crtc_state->saveHBLANK = REG_READ(map->hblank);
-+	crtc_state->saveHSYNC = REG_READ(map->hsync);
-+	crtc_state->saveVTOTAL = REG_READ(map->vtotal);
-+	crtc_state->saveVBLANK = REG_READ(map->vblank);
-+	crtc_state->saveVSYNC = REG_READ(map->vsync);
-+	crtc_state->saveDSPSTRIDE = REG_READ(map->stride);
-+
-+	/* NOTE: DSPSIZE DSPPOS only for psb */
-+	crtc_state->saveDSPSIZE = REG_READ(map->size);
-+	crtc_state->saveDSPPOS = REG_READ(map->pos);
-+
-+	crtc_state->saveDSPBASE = REG_READ(map->base);
-+
-+	palette_reg = map->palette;
-+	for (i = 0; i < 256; ++i)
-+		crtc_state->savePalette[i] = REG_READ(palette_reg + (i << 2));
-+}
-+
-+/**
-+ * Restore HW states of given crtc
-+ */
-+void gma_crtc_restore(struct drm_crtc *crtc)
-+{
-+	struct drm_device *dev = crtc->dev;
-+	struct drm_psb_private *dev_priv = dev->dev_private;
-+	struct psb_intel_crtc *psb_intel_crtc =  to_psb_intel_crtc(crtc);
-+	struct psb_intel_crtc_state *crtc_state = psb_intel_crtc->crtc_state;
-+	const struct psb_offset *map = &dev_priv->regmap[psb_intel_crtc->pipe];
-+	uint32_t palette_reg;
-+	int i;
-+
-+	if (!crtc_state) {
-+		dev_err(dev->dev, "No crtc state\n");
-+		return;
-+	}
-+
-+	if (crtc_state->saveDPLL & DPLL_VCO_ENABLE) {
-+		REG_WRITE(map->dpll,
-+			crtc_state->saveDPLL & ~DPLL_VCO_ENABLE);
-+		REG_READ(map->dpll);
-+		udelay(150);
-+	}
-+
-+	REG_WRITE(map->fp0, crtc_state->saveFP0);
-+	REG_READ(map->fp0);
-+
-+	REG_WRITE(map->fp1, crtc_state->saveFP1);
-+	REG_READ(map->fp1);
-+
-+	REG_WRITE(map->dpll, crtc_state->saveDPLL);
-+	REG_READ(map->dpll);
-+	udelay(150);
-+
-+	REG_WRITE(map->htotal, crtc_state->saveHTOTAL);
-+	REG_WRITE(map->hblank, crtc_state->saveHBLANK);
-+	REG_WRITE(map->hsync, crtc_state->saveHSYNC);
-+	REG_WRITE(map->vtotal, crtc_state->saveVTOTAL);
-+	REG_WRITE(map->vblank, crtc_state->saveVBLANK);
-+	REG_WRITE(map->vsync, crtc_state->saveVSYNC);
-+	REG_WRITE(map->stride, crtc_state->saveDSPSTRIDE);
-+
-+	REG_WRITE(map->size, crtc_state->saveDSPSIZE);
-+	REG_WRITE(map->pos, crtc_state->saveDSPPOS);
-+
-+	REG_WRITE(map->src, crtc_state->savePIPESRC);
-+	REG_WRITE(map->base, crtc_state->saveDSPBASE);
-+	REG_WRITE(map->conf, crtc_state->savePIPECONF);
-+
-+	gma_wait_for_vblank(dev);
-+
-+	REG_WRITE(map->cntr, crtc_state->saveDSPCNTR);
-+	REG_WRITE(map->base, crtc_state->saveDSPBASE);
-+
-+	gma_wait_for_vblank(dev);
-+
-+	palette_reg = map->palette;
-+	for (i = 0; i < 256; ++i)
-+		REG_WRITE(palette_reg + (i << 2), crtc_state->savePalette[i]);
-+}
-+
- void gma_encoder_prepare(struct drm_encoder *encoder)
- {
- 	struct drm_encoder_helper_funcs *encoder_funcs =
---- a/drivers/gpu/drm/gma500/gma_display.h
-+++ b/drivers/gpu/drm/gma500/gma_display.h
-@@ -81,6 +81,9 @@ extern void gma_crtc_commit(struct drm_c
- extern void gma_crtc_disable(struct drm_crtc *crtc);
- extern void gma_crtc_destroy(struct drm_crtc *crtc);
- 
-+extern void gma_crtc_save(struct drm_crtc *crtc);
-+extern void gma_crtc_restore(struct drm_crtc *crtc);
-+
- extern void gma_encoder_prepare(struct drm_encoder *encoder);
- extern void gma_encoder_commit(struct drm_encoder *encoder);
- extern void gma_encoder_destroy(struct drm_encoder *encoder);
diff --git a/patches.gma500/0026-drm-gma500-psb-Convert-to-generic-save-restore.patch b/patches.gma500/0026-drm-gma500-psb-Convert-to-generic-save-restore.patch
deleted file mode 100644
index d9182e40098cc..0000000000000
--- a/patches.gma500/0026-drm-gma500-psb-Convert-to-generic-save-restore.patch
+++ /dev/null
@@ -1,137 +0,0 @@
-From a7e68e965aabd69108700bb922f2a7b70e6cadbe Mon Sep 17 00:00:00 2001
-From: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-Date: Fri, 12 Jul 2013 15:32:18 +0200
-Subject: drm/gma500/psb: Convert to generic save/restore
-
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-(cherry picked from commit 0e5b26ab67bbc3f762444264cdc8be7db12f374c)
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
----
- drivers/gpu/drm/gma500/psb_intel_display.c |  109 -----------------------------
- 1 file changed, 2 insertions(+), 107 deletions(-)
-
---- a/drivers/gpu/drm/gma500/psb_intel_display.c
-+++ b/drivers/gpu/drm/gma500/psb_intel_display.c
-@@ -305,111 +305,6 @@ static int psb_intel_crtc_mode_set(struc
- 	return 0;
- }
- 
--/**
-- * Save HW states of giving crtc
-- */
--static void psb_intel_crtc_save(struct drm_crtc *crtc)
--{
--	struct drm_device *dev = crtc->dev;
--	struct drm_psb_private *dev_priv = dev->dev_private;
--	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
--	struct psb_intel_crtc_state *crtc_state = psb_intel_crtc->crtc_state;
--	const struct psb_offset *map = &dev_priv->regmap[psb_intel_crtc->pipe];
--	uint32_t paletteReg;
--	int i;
--
--	if (!crtc_state) {
--		dev_err(dev->dev, "No CRTC state found\n");
--		return;
--	}
--
--	crtc_state->saveDSPCNTR = REG_READ(map->cntr);
--	crtc_state->savePIPECONF = REG_READ(map->conf);
--	crtc_state->savePIPESRC = REG_READ(map->src);
--	crtc_state->saveFP0 = REG_READ(map->fp0);
--	crtc_state->saveFP1 = REG_READ(map->fp1);
--	crtc_state->saveDPLL = REG_READ(map->dpll);
--	crtc_state->saveHTOTAL = REG_READ(map->htotal);
--	crtc_state->saveHBLANK = REG_READ(map->hblank);
--	crtc_state->saveHSYNC = REG_READ(map->hsync);
--	crtc_state->saveVTOTAL = REG_READ(map->vtotal);
--	crtc_state->saveVBLANK = REG_READ(map->vblank);
--	crtc_state->saveVSYNC = REG_READ(map->vsync);
--	crtc_state->saveDSPSTRIDE = REG_READ(map->stride);
--
--	/*NOTE: DSPSIZE DSPPOS only for psb*/
--	crtc_state->saveDSPSIZE = REG_READ(map->size);
--	crtc_state->saveDSPPOS = REG_READ(map->pos);
--
--	crtc_state->saveDSPBASE = REG_READ(map->base);
--
--	paletteReg = map->palette;
--	for (i = 0; i < 256; ++i)
--		crtc_state->savePalette[i] = REG_READ(paletteReg + (i << 2));
--}
--
--/**
-- * Restore HW states of giving crtc
-- */
--static void psb_intel_crtc_restore(struct drm_crtc *crtc)
--{
--	struct drm_device *dev = crtc->dev;
--	struct drm_psb_private *dev_priv = dev->dev_private;
--	struct psb_intel_crtc *psb_intel_crtc =  to_psb_intel_crtc(crtc);
--	struct psb_intel_crtc_state *crtc_state = psb_intel_crtc->crtc_state;
--	const struct psb_offset *map = &dev_priv->regmap[psb_intel_crtc->pipe];
--	uint32_t paletteReg;
--	int i;
--
--	if (!crtc_state) {
--		dev_err(dev->dev, "No crtc state\n");
--		return;
--	}
--
--	if (crtc_state->saveDPLL & DPLL_VCO_ENABLE) {
--		REG_WRITE(map->dpll,
--			crtc_state->saveDPLL & ~DPLL_VCO_ENABLE);
--		REG_READ(map->dpll);
--		udelay(150);
--	}
--
--	REG_WRITE(map->fp0, crtc_state->saveFP0);
--	REG_READ(map->fp0);
--
--	REG_WRITE(map->fp1, crtc_state->saveFP1);
--	REG_READ(map->fp1);
--
--	REG_WRITE(map->dpll, crtc_state->saveDPLL);
--	REG_READ(map->dpll);
--	udelay(150);
--
--	REG_WRITE(map->htotal, crtc_state->saveHTOTAL);
--	REG_WRITE(map->hblank, crtc_state->saveHBLANK);
--	REG_WRITE(map->hsync, crtc_state->saveHSYNC);
--	REG_WRITE(map->vtotal, crtc_state->saveVTOTAL);
--	REG_WRITE(map->vblank, crtc_state->saveVBLANK);
--	REG_WRITE(map->vsync, crtc_state->saveVSYNC);
--	REG_WRITE(map->stride, crtc_state->saveDSPSTRIDE);
--
--	REG_WRITE(map->size, crtc_state->saveDSPSIZE);
--	REG_WRITE(map->pos, crtc_state->saveDSPPOS);
--
--	REG_WRITE(map->src, crtc_state->savePIPESRC);
--	REG_WRITE(map->base, crtc_state->saveDSPBASE);
--	REG_WRITE(map->conf, crtc_state->savePIPECONF);
--
--	gma_wait_for_vblank(dev);
--
--	REG_WRITE(map->cntr, crtc_state->saveDSPCNTR);
--	REG_WRITE(map->base, crtc_state->saveDSPBASE);
--
--	gma_wait_for_vblank(dev);
--
--	paletteReg = map->palette;
--	for (i = 0; i < 256; ++i)
--		REG_WRITE(paletteReg + (i << 2), crtc_state->savePalette[i]);
--}
--
- static int psb_crtc_set_config(struct drm_mode_set *set)
- {
- 	int ret;
-@@ -560,8 +455,8 @@ const struct drm_crtc_helper_funcs psb_i
- };
- 
- const struct drm_crtc_funcs psb_intel_crtc_funcs = {
--	.save = psb_intel_crtc_save,
--	.restore = psb_intel_crtc_restore,
-+	.save = gma_crtc_save,
-+	.restore = gma_crtc_restore,
- 	.cursor_set = gma_crtc_cursor_set,
- 	.cursor_move = gma_crtc_cursor_move,
- 	.gamma_set = gma_crtc_gamma_set,
diff --git a/patches.gma500/0027-drm-gma500-cdv-Convert-to-generic-save-restore.patch b/patches.gma500/0027-drm-gma500-cdv-Convert-to-generic-save-restore.patch
deleted file mode 100644
index 1902940955e66..0000000000000
--- a/patches.gma500/0027-drm-gma500-cdv-Convert-to-generic-save-restore.patch
+++ /dev/null
@@ -1,200 +0,0 @@
-From c058a962a6bc52772ef623b143c5b4d52d339158 Mon Sep 17 00:00:00 2001
-From: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-Date: Fri, 12 Jul 2013 15:33:47 +0200
-Subject: drm/gma500/cdv: Convert to generic save/restore
-
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-(cherry picked from commit f0ff07b73b9b5be1f725f333d1516d569c697104)
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
----
- drivers/gpu/drm/gma500/cdv_intel_display.c |  172 -----------------------------
- 1 file changed, 2 insertions(+), 170 deletions(-)
-
---- a/drivers/gpu/drm/gma500/cdv_intel_display.c
-+++ b/drivers/gpu/drm/gma500/cdv_intel_display.c
-@@ -867,174 +867,6 @@ static int cdv_intel_crtc_mode_set(struc
- 	return 0;
- }
- 
--
--/**
-- * Save HW states of giving crtc
-- */
--static void cdv_intel_crtc_save(struct drm_crtc *crtc)
--{
--	struct drm_device *dev = crtc->dev;
--	struct drm_psb_private *dev_priv = dev->dev_private;
--	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
--	struct psb_intel_crtc_state *crtc_state = psb_intel_crtc->crtc_state;
--	const struct psb_offset *map = &dev_priv->regmap[psb_intel_crtc->pipe];
--	uint32_t paletteReg;
--	int i;
--
--	if (!crtc_state) {
--		dev_dbg(dev->dev, "No CRTC state found\n");
--		return;
--	}
--
--	crtc_state->saveDSPCNTR = REG_READ(map->cntr);
--	crtc_state->savePIPECONF = REG_READ(map->conf);
--	crtc_state->savePIPESRC = REG_READ(map->src);
--	crtc_state->saveFP0 = REG_READ(map->fp0);
--	crtc_state->saveFP1 = REG_READ(map->fp1);
--	crtc_state->saveDPLL = REG_READ(map->dpll);
--	crtc_state->saveHTOTAL = REG_READ(map->htotal);
--	crtc_state->saveHBLANK = REG_READ(map->hblank);
--	crtc_state->saveHSYNC = REG_READ(map->hsync);
--	crtc_state->saveVTOTAL = REG_READ(map->vtotal);
--	crtc_state->saveVBLANK = REG_READ(map->vblank);
--	crtc_state->saveVSYNC = REG_READ(map->vsync);
--	crtc_state->saveDSPSTRIDE = REG_READ(map->stride);
--
--	/*NOTE: DSPSIZE DSPPOS only for psb*/
--	crtc_state->saveDSPSIZE = REG_READ(map->size);
--	crtc_state->saveDSPPOS = REG_READ(map->pos);
--
--	crtc_state->saveDSPBASE = REG_READ(map->base);
--
--	DRM_DEBUG("(%x %x %x %x %x %x %x %x %x %x %x %x %x %x %x %x)\n",
--			crtc_state->saveDSPCNTR,
--			crtc_state->savePIPECONF,
--			crtc_state->savePIPESRC,
--			crtc_state->saveFP0,
--			crtc_state->saveFP1,
--			crtc_state->saveDPLL,
--			crtc_state->saveHTOTAL,
--			crtc_state->saveHBLANK,
--			crtc_state->saveHSYNC,
--			crtc_state->saveVTOTAL,
--			crtc_state->saveVBLANK,
--			crtc_state->saveVSYNC,
--			crtc_state->saveDSPSTRIDE,
--			crtc_state->saveDSPSIZE,
--			crtc_state->saveDSPPOS,
--			crtc_state->saveDSPBASE
--		);
--
--	paletteReg = map->palette;
--	for (i = 0; i < 256; ++i)
--		crtc_state->savePalette[i] = REG_READ(paletteReg + (i << 2));
--}
--
--/**
-- * Restore HW states of giving crtc
-- */
--static void cdv_intel_crtc_restore(struct drm_crtc *crtc)
--{
--	struct drm_device *dev = crtc->dev;
--	struct drm_psb_private *dev_priv = dev->dev_private;
--	struct psb_intel_crtc *psb_intel_crtc =  to_psb_intel_crtc(crtc);
--	struct psb_intel_crtc_state *crtc_state = psb_intel_crtc->crtc_state;
--	const struct psb_offset *map = &dev_priv->regmap[psb_intel_crtc->pipe];
--	uint32_t paletteReg;
--	int i;
--
--	if (!crtc_state) {
--		dev_dbg(dev->dev, "No crtc state\n");
--		return;
--	}
--
--	DRM_DEBUG(
--		"current:(%x %x %x %x %x %x %x %x %x %x %x %x %x %x %x %x)\n",
--		REG_READ(map->cntr),
--		REG_READ(map->conf),
--		REG_READ(map->src),
--		REG_READ(map->fp0),
--		REG_READ(map->fp1),
--		REG_READ(map->dpll),
--		REG_READ(map->htotal),
--		REG_READ(map->hblank),
--		REG_READ(map->hsync),
--		REG_READ(map->vtotal),
--		REG_READ(map->vblank),
--		REG_READ(map->vsync),
--		REG_READ(map->stride),
--		REG_READ(map->size),
--		REG_READ(map->pos),
--		REG_READ(map->base)
--	);
--
--	DRM_DEBUG(
--		"saved: (%x %x %x %x %x %x %x %x %x %x %x %x %x %x %x %x)\n",
--		crtc_state->saveDSPCNTR,
--		crtc_state->savePIPECONF,
--		crtc_state->savePIPESRC,
--		crtc_state->saveFP0,
--		crtc_state->saveFP1,
--		crtc_state->saveDPLL,
--		crtc_state->saveHTOTAL,
--		crtc_state->saveHBLANK,
--		crtc_state->saveHSYNC,
--		crtc_state->saveVTOTAL,
--		crtc_state->saveVBLANK,
--		crtc_state->saveVSYNC,
--		crtc_state->saveDSPSTRIDE,
--		crtc_state->saveDSPSIZE,
--		crtc_state->saveDSPPOS,
--		crtc_state->saveDSPBASE
--	);
--
--
--	if (crtc_state->saveDPLL & DPLL_VCO_ENABLE) {
--		REG_WRITE(map->dpll,
--				crtc_state->saveDPLL & ~DPLL_VCO_ENABLE);
--		REG_READ(map->dpll);
--		DRM_DEBUG("write dpll: %x\n",
--				REG_READ(map->dpll));
--		udelay(150);
--	}
--
--	REG_WRITE(map->fp0, crtc_state->saveFP0);
--	REG_READ(map->fp0);
--
--	REG_WRITE(map->fp1, crtc_state->saveFP1);
--	REG_READ(map->fp1);
--
--	REG_WRITE(map->dpll, crtc_state->saveDPLL);
--	REG_READ(map->dpll);
--	udelay(150);
--
--	REG_WRITE(map->htotal, crtc_state->saveHTOTAL);
--	REG_WRITE(map->hblank, crtc_state->saveHBLANK);
--	REG_WRITE(map->hsync, crtc_state->saveHSYNC);
--	REG_WRITE(map->vtotal, crtc_state->saveVTOTAL);
--	REG_WRITE(map->vblank, crtc_state->saveVBLANK);
--	REG_WRITE(map->vsync, crtc_state->saveVSYNC);
--	REG_WRITE(map->stride, crtc_state->saveDSPSTRIDE);
--
--	REG_WRITE(map->size, crtc_state->saveDSPSIZE);
--	REG_WRITE(map->pos, crtc_state->saveDSPPOS);
--
--	REG_WRITE(map->src, crtc_state->savePIPESRC);
--	REG_WRITE(map->base, crtc_state->saveDSPBASE);
--	REG_WRITE(map->conf, crtc_state->savePIPECONF);
--
--	gma_wait_for_vblank(dev);
--
--	REG_WRITE(map->cntr, crtc_state->saveDSPCNTR);
--	REG_WRITE(map->base, crtc_state->saveDSPBASE);
--
--	gma_wait_for_vblank(dev);
--
--	paletteReg = map->palette;
--	for (i = 0; i < 256; ++i)
--		REG_WRITE(paletteReg + (i << 2), crtc_state->savePalette[i]);
--}
--
- static int cdv_crtc_set_config(struct drm_mode_set *set)
- {
- 	int ret = 0;
-@@ -1203,8 +1035,8 @@ const struct drm_crtc_helper_funcs cdv_i
- };
- 
- const struct drm_crtc_funcs cdv_intel_crtc_funcs = {
--	.save = cdv_intel_crtc_save,
--	.restore = cdv_intel_crtc_restore,
-+	.save = gma_crtc_save,
-+	.restore = gma_crtc_restore,
- 	.cursor_set = gma_crtc_cursor_set,
- 	.cursor_move = gma_crtc_cursor_move,
- 	.gamma_set = gma_crtc_gamma_set,
diff --git a/patches.gma500/0028-drm-gma500-Add-generic-set_config-function.patch b/patches.gma500/0028-drm-gma500-Add-generic-set_config-function.patch
deleted file mode 100644
index 09c9612ab8f28..0000000000000
--- a/patches.gma500/0028-drm-gma500-Add-generic-set_config-function.patch
+++ /dev/null
@@ -1,57 +0,0 @@
-From 24ebca9495e8d9f8af9b2eedfca5f46c6f178860 Mon Sep 17 00:00:00 2001
-From: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-Date: Fri, 12 Jul 2013 15:38:52 +0200
-Subject: drm/gma500: Add generic set_config() function
-
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-(cherry picked from commit 924cb5ffd81d66cc6461de955f7cb144cb3b7b6d)
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
----
- drivers/gpu/drm/gma500/gma_display.c |   16 ++++++++++++++++
- drivers/gpu/drm/gma500/gma_display.h |    3 +++
- 2 files changed, 19 insertions(+)
-
---- a/drivers/gpu/drm/gma500/gma_display.c
-+++ b/drivers/gpu/drm/gma500/gma_display.c
-@@ -519,6 +519,22 @@ void gma_crtc_destroy(struct drm_crtc *c
- 	kfree(psb_intel_crtc);
- }
- 
-+int gma_crtc_set_config(struct drm_mode_set *set)
-+{
-+	struct drm_device *dev = set->crtc->dev;
-+	struct drm_psb_private *dev_priv = dev->dev_private;
-+	int ret;
-+
-+	if (!dev_priv->rpm_enabled)
-+		return drm_crtc_helper_set_config(set);
-+
-+	pm_runtime_forbid(&dev->pdev->dev);
-+	ret = drm_crtc_helper_set_config(set);
-+	pm_runtime_allow(&dev->pdev->dev);
-+
-+	return ret;
-+}
-+
- /**
-  * Save HW states of given crtc
-  */
---- a/drivers/gpu/drm/gma500/gma_display.h
-+++ b/drivers/gpu/drm/gma500/gma_display.h
-@@ -22,6 +22,8 @@
- #ifndef _GMA_DISPLAY_H_
- #define _GMA_DISPLAY_H_
- 
-+#include <linux/pm_runtime.h>
-+
- struct gma_clock_t {
- 	/* given values */
- 	int n;
-@@ -80,6 +82,7 @@ extern void gma_crtc_prepare(struct drm_
- extern void gma_crtc_commit(struct drm_crtc *crtc);
- extern void gma_crtc_disable(struct drm_crtc *crtc);
- extern void gma_crtc_destroy(struct drm_crtc *crtc);
-+extern int gma_crtc_set_config(struct drm_mode_set *set);
- 
- extern void gma_crtc_save(struct drm_crtc *crtc);
- extern void gma_crtc_restore(struct drm_crtc *crtc);
diff --git a/patches.gma500/0029-drm-gma500-psb-Convert-to-generic-set_config.patch b/patches.gma500/0029-drm-gma500-psb-Convert-to-generic-set_config.patch
deleted file mode 100644
index 3982aa670445d..0000000000000
--- a/patches.gma500/0029-drm-gma500-psb-Convert-to-generic-set_config.patch
+++ /dev/null
@@ -1,53 +0,0 @@
-From 0dae7ec3869d4524c8535ad075317c24d09385b5 Mon Sep 17 00:00:00 2001
-From: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-Date: Fri, 12 Jul 2013 15:41:36 +0200
-Subject: drm/gma500/psb: Convert to generic set_config()
-
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-(cherry picked from commit 43a83027d4705bb6b6506f9467c9c4d3e2a1b504)
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
----
- drivers/gpu/drm/gma500/psb_intel_display.c |   18 +-----------------
- 1 file changed, 1 insertion(+), 17 deletions(-)
-
---- a/drivers/gpu/drm/gma500/psb_intel_display.c
-+++ b/drivers/gpu/drm/gma500/psb_intel_display.c
-@@ -19,7 +19,6 @@
-  */
- 
- #include <linux/i2c.h>
--#include <linux/pm_runtime.h>
- 
- #include <drm/drmP.h>
- #include "framebuffer.h"
-@@ -305,21 +304,6 @@ static int psb_intel_crtc_mode_set(struc
- 	return 0;
- }
- 
--static int psb_crtc_set_config(struct drm_mode_set *set)
--{
--	int ret;
--	struct drm_device *dev = set->crtc->dev;
--	struct drm_psb_private *dev_priv = dev->dev_private;
--
--	if (!dev_priv->rpm_enabled)
--		return drm_crtc_helper_set_config(set);
--
--	pm_runtime_forbid(&dev->pdev->dev);
--	ret = drm_crtc_helper_set_config(set);
--	pm_runtime_allow(&dev->pdev->dev);
--	return ret;
--}
--
- /* Returns the clock of the currently programmed mode of the given pipe. */
- static int psb_intel_crtc_clock_get(struct drm_device *dev,
- 				struct drm_crtc *crtc)
-@@ -460,7 +444,7 @@ const struct drm_crtc_funcs psb_intel_cr
- 	.cursor_set = gma_crtc_cursor_set,
- 	.cursor_move = gma_crtc_cursor_move,
- 	.gamma_set = gma_crtc_gamma_set,
--	.set_config = psb_crtc_set_config,
-+	.set_config = gma_crtc_set_config,
- 	.destroy = gma_crtc_destroy,
- };
- 
diff --git a/patches.gma500/0030-drm-gma500-cdv-Convert-to-generic-set_config.patch b/patches.gma500/0030-drm-gma500-cdv-Convert-to-generic-set_config.patch
deleted file mode 100644
index d8ebf9a5149a9..0000000000000
--- a/patches.gma500/0030-drm-gma500-cdv-Convert-to-generic-set_config.patch
+++ /dev/null
@@ -1,56 +0,0 @@
-From 0a69783bcec380e67781df416dc5bf11184b9ddb Mon Sep 17 00:00:00 2001
-From: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-Date: Fri, 12 Jul 2013 15:43:54 +0200
-Subject: drm/gma500/cdv: Convert to generic set_config()
-
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-(cherry picked from commit c5c81f4e1bc9c8ee1c3637de51ee180efbbf629c)
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
----
- drivers/gpu/drm/gma500/cdv_intel_display.c |   21 +--------------------
- 1 file changed, 1 insertion(+), 20 deletions(-)
-
---- a/drivers/gpu/drm/gma500/cdv_intel_display.c
-+++ b/drivers/gpu/drm/gma500/cdv_intel_display.c
-@@ -19,7 +19,6 @@
-  */
- 
- #include <linux/i2c.h>
--#include <linux/pm_runtime.h>
- 
- #include <drm/drmP.h>
- #include "framebuffer.h"
-@@ -867,24 +866,6 @@ static int cdv_intel_crtc_mode_set(struc
- 	return 0;
- }
- 
--static int cdv_crtc_set_config(struct drm_mode_set *set)
--{
--	int ret = 0;
--	struct drm_device *dev = set->crtc->dev;
--	struct drm_psb_private *dev_priv = dev->dev_private;
--
--	if (!dev_priv->rpm_enabled)
--		return drm_crtc_helper_set_config(set);
--
--	pm_runtime_forbid(&dev->pdev->dev);
--
--	ret = drm_crtc_helper_set_config(set);
--
--	pm_runtime_allow(&dev->pdev->dev);
--
--	return ret;
--}
--
- /** Derive the pixel clock for the given refclk and divisors for 8xx chips. */
- 
- /* FIXME: why are we using this, should it be cdv_ in this tree ? */
-@@ -1040,7 +1021,7 @@ const struct drm_crtc_funcs cdv_intel_cr
- 	.cursor_set = gma_crtc_cursor_set,
- 	.cursor_move = gma_crtc_cursor_move,
- 	.gamma_set = gma_crtc_gamma_set,
--	.set_config = cdv_crtc_set_config,
-+	.set_config = gma_crtc_set_config,
- 	.destroy = gma_crtc_destroy,
- };
- 
diff --git a/patches.gma500/0031-drm-gma500-Rename-psb_intel_crtc-to-gma_crtc.patch b/patches.gma500/0031-drm-gma500-Rename-psb_intel_crtc-to-gma_crtc.patch
deleted file mode 100644
index 599c56e59acb4..0000000000000
--- a/patches.gma500/0031-drm-gma500-Rename-psb_intel_crtc-to-gma_crtc.patch
+++ /dev/null
@@ -1,984 +0,0 @@
-From 32b084d7bbef23ffbc8f9c1d40c7224f345d5c7d Mon Sep 17 00:00:00 2001
-From: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-Date: Mon, 22 Jul 2013 01:31:23 +0200
-Subject: drm/gma500: Rename psb_intel_crtc to gma_crtc
-
-The psb_intel_crtc is generic and should be named appropriately
-
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-(cherry picked from commit 6306865daf0283d1b13adea8be8d1ad4dd0ea1c3)
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
----
- drivers/gpu/drm/gma500/cdv_intel_crt.c       |    7 -
- drivers/gpu/drm/gma500/cdv_intel_display.c   |   28 +++----
- drivers/gpu/drm/gma500/cdv_intel_dp.c        |   10 +-
- drivers/gpu/drm/gma500/cdv_intel_hdmi.c      |    6 -
- drivers/gpu/drm/gma500/cdv_intel_lvds.c      |    8 --
- drivers/gpu/drm/gma500/framebuffer.c         |   16 ++--
- drivers/gpu/drm/gma500/gma_display.c         |  105 +++++++++++++--------------
- drivers/gpu/drm/gma500/mdfld_dsi_output.c    |   15 +--
- drivers/gpu/drm/gma500/mdfld_intel_display.c |   16 ++--
- drivers/gpu/drm/gma500/oaktrail_crtc.c       |   16 ++--
- drivers/gpu/drm/gma500/psb_drv.c             |    6 -
- drivers/gpu/drm/gma500/psb_intel_display.c   |   98 ++++++++++++-------------
- drivers/gpu/drm/gma500/psb_intel_drv.h       |    6 -
- drivers/gpu/drm/gma500/psb_intel_lvds.c      |   10 +-
- drivers/gpu/drm/gma500/psb_intel_sdvo.c      |    4 -
- 15 files changed, 170 insertions(+), 181 deletions(-)
-
---- a/drivers/gpu/drm/gma500/cdv_intel_crt.c
-+++ b/drivers/gpu/drm/gma500/cdv_intel_crt.c
-@@ -95,13 +95,12 @@ static void cdv_intel_crt_mode_set(struc
- 
- 	struct drm_device *dev = encoder->dev;
- 	struct drm_crtc *crtc = encoder->crtc;
--	struct psb_intel_crtc *psb_intel_crtc =
--					to_psb_intel_crtc(crtc);
-+	struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
- 	int dpll_md_reg;
- 	u32 adpa, dpll_md;
- 	u32 adpa_reg;
- 
--	if (psb_intel_crtc->pipe == 0)
-+	if (gma_crtc->pipe == 0)
- 		dpll_md_reg = DPLL_A_MD;
- 	else
- 		dpll_md_reg = DPLL_B_MD;
-@@ -124,7 +123,7 @@ static void cdv_intel_crt_mode_set(struc
- 	if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
- 		adpa |= ADPA_VSYNC_ACTIVE_HIGH;
- 
--	if (psb_intel_crtc->pipe == 0)
-+	if (gma_crtc->pipe == 0)
- 		adpa |= ADPA_PIPE_A_SELECT;
- 	else
- 		adpa |= ADPA_PIPE_B_SELECT;
---- a/drivers/gpu/drm/gma500/cdv_intel_display.c
-+++ b/drivers/gpu/drm/gma500/cdv_intel_display.c
-@@ -222,8 +222,8 @@ static int
- cdv_dpll_set_clock_cdv(struct drm_device *dev, struct drm_crtc *crtc,
- 		       struct gma_clock_t *clock, bool is_lvds, u32 ddi_select)
- {
--	struct psb_intel_crtc *psb_crtc = to_psb_intel_crtc(crtc);
--	int pipe = psb_crtc->pipe;
-+	struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
-+	int pipe = gma_crtc->pipe;
- 	u32 m, n_vco, p;
- 	int ret = 0;
- 	int dpll_reg = (pipe == 0) ? DPLL_A : DPLL_B;
-@@ -458,12 +458,12 @@ static bool cdv_intel_pipe_enabled(struc
- {
- 	struct drm_crtc *crtc;
- 	struct drm_psb_private *dev_priv = dev->dev_private;
--	struct psb_intel_crtc *psb_intel_crtc = NULL;
-+	struct gma_crtc *gma_crtc = NULL;
- 
- 	crtc = dev_priv->pipe_to_crtc_mapping[pipe];
--	psb_intel_crtc = to_psb_intel_crtc(crtc);
-+	gma_crtc = to_gma_crtc(crtc);
- 
--	if (crtc->fb == NULL || !psb_intel_crtc->active)
-+	if (crtc->fb == NULL || !gma_crtc->active)
- 		return false;
- 	return true;
- }
-@@ -489,11 +489,11 @@ static bool cdv_intel_single_pipe_active
- 
- static bool is_pipeb_lvds(struct drm_device *dev, struct drm_crtc *crtc)
- {
--	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
-+	struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
- 	struct drm_mode_config *mode_config = &dev->mode_config;
- 	struct drm_connector *connector;
- 
--	if (psb_intel_crtc->pipe != 1)
-+	if (gma_crtc->pipe != 1)
- 		return false;
- 
- 	list_for_each_entry(connector, &mode_config->connector_list, head) {
-@@ -616,8 +616,8 @@ static int cdv_intel_crtc_mode_set(struc
- {
- 	struct drm_device *dev = crtc->dev;
- 	struct drm_psb_private *dev_priv = dev->dev_private;
--	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
--	int pipe = psb_intel_crtc->pipe;
-+	struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
-+	int pipe = gma_crtc->pipe;
- 	const struct psb_offset *map = &dev_priv->regmap[pipe];
- 	int refclk;
- 	struct gma_clock_t clock;
-@@ -693,7 +693,7 @@ static int cdv_intel_crtc_mode_set(struc
- 
- 	drm_mode_debug_printmodeline(adjusted_mode);
- 	
--	limit = psb_intel_crtc->clock_funcs->limit(crtc, refclk);
-+	limit = gma_crtc->clock_funcs->limit(crtc, refclk);
- 
- 	ok = limit->find_pll(limit, crtc, adjusted_mode->clock, refclk,
- 				 &clock);
-@@ -883,8 +883,8 @@ static int cdv_intel_crtc_clock_get(stru
- 				struct drm_crtc *crtc)
- {
- 	struct drm_psb_private *dev_priv = dev->dev_private;
--	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
--	int pipe = psb_intel_crtc->pipe;
-+	struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
-+	int pipe = gma_crtc->pipe;
- 	const struct psb_offset *map = &dev_priv->regmap[pipe];
- 	u32 dpll;
- 	u32 fp;
-@@ -961,8 +961,8 @@ static int cdv_intel_crtc_clock_get(stru
- struct drm_display_mode *cdv_intel_crtc_mode_get(struct drm_device *dev,
- 					     struct drm_crtc *crtc)
- {
--	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
--	int pipe = psb_intel_crtc->pipe;
-+	struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
-+	int pipe = gma_crtc->pipe;
- 	struct drm_psb_private *dev_priv = dev->dev_private;
- 	struct psb_pipe *p = &dev_priv->regs.pipe[pipe];
- 	const struct psb_offset *map = &dev_priv->regmap[pipe];
---- a/drivers/gpu/drm/gma500/cdv_intel_dp.c
-+++ b/drivers/gpu/drm/gma500/cdv_intel_dp.c
-@@ -793,10 +793,10 @@ cdv_intel_dp_set_m_n(struct drm_crtc *cr
- 	struct drm_psb_private *dev_priv = dev->dev_private;
- 	struct drm_mode_config *mode_config = &dev->mode_config;
- 	struct drm_encoder *encoder;
--	struct psb_intel_crtc *intel_crtc = to_psb_intel_crtc(crtc);
-+	struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
- 	int lane_count = 4, bpp = 24;
- 	struct cdv_intel_dp_m_n m_n;
--	int pipe = intel_crtc->pipe;
-+	int pipe = gma_crtc->pipe;
- 
- 	/*
- 	 * Find the lane count in the intel_encoder private
-@@ -844,7 +844,7 @@ cdv_intel_dp_mode_set(struct drm_encoder
- {
- 	struct psb_intel_encoder *intel_encoder = to_psb_intel_encoder(encoder);
- 	struct drm_crtc *crtc = encoder->crtc;
--	struct psb_intel_crtc *intel_crtc = to_psb_intel_crtc(crtc);
-+	struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
- 	struct cdv_intel_dp *intel_dp = intel_encoder->dev_priv;
- 	struct drm_device *dev = encoder->dev;
- 
-@@ -886,7 +886,7 @@ cdv_intel_dp_mode_set(struct drm_encoder
- 	}
- 
- 	/* CPT DP's pipe select is decided in TRANS_DP_CTL */
--	if (intel_crtc->pipe == 1)
-+	if (gma_crtc->pipe == 1)
- 		intel_dp->DP |= DP_PIPEB_SELECT;
- 
- 	REG_WRITE(intel_dp->output_reg, (intel_dp->DP | DP_PORT_EN));
-@@ -901,7 +901,7 @@ cdv_intel_dp_mode_set(struct drm_encoder
- 		else
- 			pfit_control = 0;
- 
--		pfit_control |= intel_crtc->pipe << PFIT_PIPE_SHIFT;
-+		pfit_control |= gma_crtc->pipe << PFIT_PIPE_SHIFT;
- 
- 		REG_WRITE(PFIT_CONTROL, pfit_control);
- 	}
---- a/drivers/gpu/drm/gma500/cdv_intel_hdmi.c
-+++ b/drivers/gpu/drm/gma500/cdv_intel_hdmi.c
-@@ -68,7 +68,7 @@ static void cdv_hdmi_mode_set(struct drm
- 	struct mid_intel_hdmi_priv *hdmi_priv = psb_intel_encoder->dev_priv;
- 	u32 hdmib;
- 	struct drm_crtc *crtc = encoder->crtc;
--	struct psb_intel_crtc *intel_crtc = to_psb_intel_crtc(crtc);
-+	struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
- 
- 	hdmib = (2 << 10);
- 
-@@ -77,7 +77,7 @@ static void cdv_hdmi_mode_set(struct drm
- 	if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
- 		hdmib |= HDMI_HSYNC_ACTIVE_HIGH;
- 
--	if (intel_crtc->pipe == 1)
-+	if (gma_crtc->pipe == 1)
- 		hdmib |= HDMIB_PIPE_B_SELECT;
- 
- 	if (hdmi_priv->has_hdmi_audio) {
-@@ -167,7 +167,7 @@ static int cdv_hdmi_set_property(struct
- 	struct drm_encoder *encoder = connector->encoder;
- 
- 	if (!strcmp(property->name, "scaling mode") && encoder) {
--		struct psb_intel_crtc *crtc = to_psb_intel_crtc(encoder->crtc);
-+		struct gma_crtc *crtc = to_gma_crtc(encoder->crtc);
- 		bool centre;
- 		uint64_t curValue;
- 
---- a/drivers/gpu/drm/gma500/cdv_intel_lvds.c
-+++ b/drivers/gpu/drm/gma500/cdv_intel_lvds.c
-@@ -356,8 +356,7 @@ static void cdv_intel_lvds_mode_set(stru
- {
- 	struct drm_device *dev = encoder->dev;
- 	struct drm_psb_private *dev_priv = dev->dev_private;
--	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(
--							encoder->crtc);
-+	struct gma_crtc *gma_crtc = to_gma_crtc(encoder->crtc);
- 	u32 pfit_control;
- 
- 	/*
-@@ -379,7 +378,7 @@ static void cdv_intel_lvds_mode_set(stru
- 	else
- 		pfit_control = 0;
- 
--	pfit_control |= psb_intel_crtc->pipe << PFIT_PIPE_SHIFT;
-+	pfit_control |= gma_crtc->pipe << PFIT_PIPE_SHIFT;
- 
- 	if (dev_priv->lvds_dither)
- 		pfit_control |= PANEL_8TO6_DITHER_ENABLE;
-@@ -461,8 +460,7 @@ static int cdv_intel_lvds_set_property(s
- 	struct drm_encoder *encoder = connector->encoder;
- 
- 	if (!strcmp(property->name, "scaling mode") && encoder) {
--		struct psb_intel_crtc *crtc =
--					to_psb_intel_crtc(encoder->crtc);
-+		struct gma_crtc *crtc = to_gma_crtc(encoder->crtc);
- 		uint64_t curValue;
- 
- 		if (!crtc)
---- a/drivers/gpu/drm/gma500/framebuffer.c
-+++ b/drivers/gpu/drm/gma500/framebuffer.c
-@@ -520,21 +520,21 @@ static struct drm_framebuffer *psb_user_
- static void psbfb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
- 							u16 blue, int regno)
- {
--	struct psb_intel_crtc *intel_crtc = to_psb_intel_crtc(crtc);
-+	struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
- 
--	intel_crtc->lut_r[regno] = red >> 8;
--	intel_crtc->lut_g[regno] = green >> 8;
--	intel_crtc->lut_b[regno] = blue >> 8;
-+	gma_crtc->lut_r[regno] = red >> 8;
-+	gma_crtc->lut_g[regno] = green >> 8;
-+	gma_crtc->lut_b[regno] = blue >> 8;
- }
- 
- static void psbfb_gamma_get(struct drm_crtc *crtc, u16 *red,
- 					u16 *green, u16 *blue, int regno)
- {
--	struct psb_intel_crtc *intel_crtc = to_psb_intel_crtc(crtc);
-+	struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
- 
--	*red = intel_crtc->lut_r[regno] << 8;
--	*green = intel_crtc->lut_g[regno] << 8;
--	*blue = intel_crtc->lut_b[regno] << 8;
-+	*red = gma_crtc->lut_r[regno] << 8;
-+	*green = gma_crtc->lut_g[regno] << 8;
-+	*blue = gma_crtc->lut_b[regno] << 8;
- }
- 
- static int psbfb_probe(struct drm_fb_helper *helper,
---- a/drivers/gpu/drm/gma500/gma_display.c
-+++ b/drivers/gpu/drm/gma500/gma_display.c
-@@ -58,9 +58,9 @@ int gma_pipe_set_base(struct drm_crtc *c
- {
- 	struct drm_device *dev = crtc->dev;
- 	struct drm_psb_private *dev_priv = dev->dev_private;
--	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
-+	struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
- 	struct psb_framebuffer *psbfb = to_psb_fb(crtc->fb);
--	int pipe = psb_intel_crtc->pipe;
-+	int pipe = gma_crtc->pipe;
- 	const struct psb_offset *map = &dev_priv->regmap[pipe];
- 	unsigned long start, offset;
- 	u32 dspcntr;
-@@ -140,8 +140,8 @@ void gma_crtc_load_lut(struct drm_crtc *
- {
- 	struct drm_device *dev = crtc->dev;
- 	struct drm_psb_private *dev_priv = dev->dev_private;
--	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
--	const struct psb_offset *map = &dev_priv->regmap[psb_intel_crtc->pipe];
-+	struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
-+	const struct psb_offset *map = &dev_priv->regmap[gma_crtc->pipe];
- 	int palreg = map->palette;
- 	int i;
- 
-@@ -152,24 +152,24 @@ void gma_crtc_load_lut(struct drm_crtc *
- 	if (gma_power_begin(dev, false)) {
- 		for (i = 0; i < 256; i++) {
- 			REG_WRITE(palreg + 4 * i,
--				  ((psb_intel_crtc->lut_r[i] +
--				  psb_intel_crtc->lut_adj[i]) << 16) |
--				  ((psb_intel_crtc->lut_g[i] +
--				  psb_intel_crtc->lut_adj[i]) << 8) |
--				  (psb_intel_crtc->lut_b[i] +
--				  psb_intel_crtc->lut_adj[i]));
-+				  ((gma_crtc->lut_r[i] +
-+				  gma_crtc->lut_adj[i]) << 16) |
-+				  ((gma_crtc->lut_g[i] +
-+				  gma_crtc->lut_adj[i]) << 8) |
-+				  (gma_crtc->lut_b[i] +
-+				  gma_crtc->lut_adj[i]));
- 		}
- 		gma_power_end(dev);
- 	} else {
- 		for (i = 0; i < 256; i++) {
- 			/* FIXME: Why pipe[0] and not pipe[..._crtc->pipe]? */
- 			dev_priv->regs.pipe[0].palette[i] =
--				  ((psb_intel_crtc->lut_r[i] +
--				  psb_intel_crtc->lut_adj[i]) << 16) |
--				  ((psb_intel_crtc->lut_g[i] +
--				  psb_intel_crtc->lut_adj[i]) << 8) |
--				  (psb_intel_crtc->lut_b[i] +
--				  psb_intel_crtc->lut_adj[i]);
-+				  ((gma_crtc->lut_r[i] +
-+				  gma_crtc->lut_adj[i]) << 16) |
-+				  ((gma_crtc->lut_g[i] +
-+				  gma_crtc->lut_adj[i]) << 8) |
-+				  (gma_crtc->lut_b[i] +
-+				  gma_crtc->lut_adj[i]);
- 		}
- 
- 	}
-@@ -178,14 +178,14 @@ void gma_crtc_load_lut(struct drm_crtc *
- void gma_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green, u16 *blue,
- 			u32 start, u32 size)
- {
--	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
-+	struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
- 	int i;
- 	int end = (start + size > 256) ? 256 : start + size;
- 
- 	for (i = start; i < end; i++) {
--		psb_intel_crtc->lut_r[i] = red[i] >> 8;
--		psb_intel_crtc->lut_g[i] = green[i] >> 8;
--		psb_intel_crtc->lut_b[i] = blue[i] >> 8;
-+		gma_crtc->lut_r[i] = red[i] >> 8;
-+		gma_crtc->lut_g[i] = green[i] >> 8;
-+		gma_crtc->lut_b[i] = blue[i] >> 8;
- 	}
- 
- 	gma_crtc_load_lut(crtc);
-@@ -201,8 +201,8 @@ void gma_crtc_dpms(struct drm_crtc *crtc
- {
- 	struct drm_device *dev = crtc->dev;
- 	struct drm_psb_private *dev_priv = dev->dev_private;
--	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
--	int pipe = psb_intel_crtc->pipe;
-+	struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
-+	int pipe = gma_crtc->pipe;
- 	const struct psb_offset *map = &dev_priv->regmap[pipe];
- 	u32 temp;
- 
-@@ -217,10 +217,10 @@ void gma_crtc_dpms(struct drm_crtc *crtc
- 	case DRM_MODE_DPMS_ON:
- 	case DRM_MODE_DPMS_STANDBY:
- 	case DRM_MODE_DPMS_SUSPEND:
--		if (psb_intel_crtc->active)
-+		if (gma_crtc->active)
- 			break;
- 
--		psb_intel_crtc->active = true;
-+		gma_crtc->active = true;
- 
- 		/* Enable the DPLL */
- 		temp = REG_READ(map->dpll);
-@@ -268,10 +268,10 @@ void gma_crtc_dpms(struct drm_crtc *crtc
- 		/* psb_intel_crtc_dpms_video(crtc, true); TODO */
- 		break;
- 	case DRM_MODE_DPMS_OFF:
--		if (!psb_intel_crtc->active)
-+		if (!gma_crtc->active)
- 			break;
- 
--		psb_intel_crtc->active = false;
-+		gma_crtc->active = false;
- 
- 		/* Give the overlay scaler a chance to disable
- 		 * if it's on this pipe */
-@@ -334,14 +334,14 @@ int gma_crtc_cursor_set(struct drm_crtc
- {
- 	struct drm_device *dev = crtc->dev;
- 	struct drm_psb_private *dev_priv = dev->dev_private;
--	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
--	int pipe = psb_intel_crtc->pipe;
-+	struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
-+	int pipe = gma_crtc->pipe;
- 	uint32_t control = (pipe == 0) ? CURACNTR : CURBCNTR;
- 	uint32_t base = (pipe == 0) ? CURABASE : CURBBASE;
- 	uint32_t temp;
- 	size_t addr = 0;
- 	struct gtt_range *gt;
--	struct gtt_range *cursor_gt = psb_intel_crtc->cursor_gt;
-+	struct gtt_range *cursor_gt = gma_crtc->cursor_gt;
- 	struct drm_gem_object *obj;
- 	void *tmp_dst, *tmp_src;
- 	int ret = 0, i, cursor_pages;
-@@ -357,12 +357,12 @@ int gma_crtc_cursor_set(struct drm_crtc
- 		}
- 
- 		/* Unpin the old GEM object */
--		if (psb_intel_crtc->cursor_obj) {
--			gt = container_of(psb_intel_crtc->cursor_obj,
-+		if (gma_crtc->cursor_obj) {
-+			gt = container_of(gma_crtc->cursor_obj,
- 					  struct gtt_range, gem);
- 			psb_gtt_unpin(gt);
--			drm_gem_object_unreference(psb_intel_crtc->cursor_obj);
--			psb_intel_crtc->cursor_obj = NULL;
-+			drm_gem_object_unreference(gma_crtc->cursor_obj);
-+			gma_crtc->cursor_obj = NULL;
- 		}
- 
- 		return 0;
-@@ -415,10 +415,10 @@ int gma_crtc_cursor_set(struct drm_crtc
- 			tmp_dst += PAGE_SIZE;
- 		}
- 
--		addr = psb_intel_crtc->cursor_addr;
-+		addr = gma_crtc->cursor_addr;
- 	} else {
- 		addr = gt->offset;
--		psb_intel_crtc->cursor_addr = addr;
-+		gma_crtc->cursor_addr = addr;
- 	}
- 
- 	temp = 0;
-@@ -433,14 +433,13 @@ int gma_crtc_cursor_set(struct drm_crtc
- 	}
- 
- 	/* unpin the old bo */
--	if (psb_intel_crtc->cursor_obj) {
--		gt = container_of(psb_intel_crtc->cursor_obj,
--							struct gtt_range, gem);
-+	if (gma_crtc->cursor_obj) {
-+		gt = container_of(gma_crtc->cursor_obj, struct gtt_range, gem);
- 		psb_gtt_unpin(gt);
--		drm_gem_object_unreference(psb_intel_crtc->cursor_obj);
-+		drm_gem_object_unreference(gma_crtc->cursor_obj);
- 	}
- 
--	psb_intel_crtc->cursor_obj = obj;
-+	gma_crtc->cursor_obj = obj;
- 	return ret;
- 
- unref_cursor:
-@@ -451,8 +450,8 @@ unref_cursor:
- int gma_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
- {
- 	struct drm_device *dev = crtc->dev;
--	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
--	int pipe = psb_intel_crtc->pipe;
-+	struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
-+	int pipe = gma_crtc->pipe;
- 	uint32_t temp = 0;
- 	uint32_t addr;
- 
-@@ -468,7 +467,7 @@ int gma_crtc_cursor_move(struct drm_crtc
- 	temp |= ((x & CURSOR_POS_MASK) << CURSOR_X_SHIFT);
- 	temp |= ((y & CURSOR_POS_MASK) << CURSOR_Y_SHIFT);
- 
--	addr = psb_intel_crtc->cursor_addr;
-+	addr = gma_crtc->cursor_addr;
- 
- 	if (gma_power_begin(dev, false)) {
- 		REG_WRITE((pipe == 0) ? CURAPOS : CURBPOS, temp);
-@@ -512,11 +511,11 @@ void gma_crtc_disable(struct drm_crtc *c
- 
- void gma_crtc_destroy(struct drm_crtc *crtc)
- {
--	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
-+	struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
- 
--	kfree(psb_intel_crtc->crtc_state);
-+	kfree(gma_crtc->crtc_state);
- 	drm_crtc_cleanup(crtc);
--	kfree(psb_intel_crtc);
-+	kfree(gma_crtc);
- }
- 
- int gma_crtc_set_config(struct drm_mode_set *set)
-@@ -542,9 +541,9 @@ void gma_crtc_save(struct drm_crtc *crtc
- {
- 	struct drm_device *dev = crtc->dev;
- 	struct drm_psb_private *dev_priv = dev->dev_private;
--	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
--	struct psb_intel_crtc_state *crtc_state = psb_intel_crtc->crtc_state;
--	const struct psb_offset *map = &dev_priv->regmap[psb_intel_crtc->pipe];
-+	struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
-+	struct psb_intel_crtc_state *crtc_state = gma_crtc->crtc_state;
-+	const struct psb_offset *map = &dev_priv->regmap[gma_crtc->pipe];
- 	uint32_t palette_reg;
- 	int i;
- 
-@@ -585,9 +584,9 @@ void gma_crtc_restore(struct drm_crtc *c
- {
- 	struct drm_device *dev = crtc->dev;
- 	struct drm_psb_private *dev_priv = dev->dev_private;
--	struct psb_intel_crtc *psb_intel_crtc =  to_psb_intel_crtc(crtc);
--	struct psb_intel_crtc_state *crtc_state = psb_intel_crtc->crtc_state;
--	const struct psb_offset *map = &dev_priv->regmap[psb_intel_crtc->pipe];
-+	struct gma_crtc *gma_crtc =  to_gma_crtc(crtc);
-+	struct psb_intel_crtc_state *crtc_state = gma_crtc->crtc_state;
-+	const struct psb_offset *map = &dev_priv->regmap[gma_crtc->pipe];
- 	uint32_t palette_reg;
- 	int i;
- 
-@@ -720,7 +719,7 @@ bool gma_find_best_pll(const struct gma_
- {
- 	struct drm_device *dev = crtc->dev;
- 	const struct gma_clock_funcs *clock_funcs =
--					to_psb_intel_crtc(crtc)->clock_funcs;
-+						to_gma_crtc(crtc)->clock_funcs;
- 	struct gma_clock_t clock;
- 	int err = target;
- 
---- a/drivers/gpu/drm/gma500/mdfld_dsi_output.c
-+++ b/drivers/gpu/drm/gma500/mdfld_dsi_output.c
-@@ -249,12 +249,11 @@ static int mdfld_dsi_connector_set_prope
- 	struct drm_encoder *encoder = connector->encoder;
- 
- 	if (!strcmp(property->name, "scaling mode") && encoder) {
--		struct psb_intel_crtc *psb_crtc =
--					to_psb_intel_crtc(encoder->crtc);
-+		struct gma_crtc *gma_crtc = to_gma_crtc(encoder->crtc);
- 		bool centerechange;
- 		uint64_t val;
- 
--		if (!psb_crtc)
-+		if (!gma_crtc)
- 			goto set_prop_error;
- 
- 		switch (value) {
-@@ -281,11 +280,11 @@ static int mdfld_dsi_connector_set_prope
- 		centerechange = (val == DRM_MODE_SCALE_NO_SCALE) ||
- 			(value == DRM_MODE_SCALE_NO_SCALE);
- 
--		if (psb_crtc->saved_mode.hdisplay != 0 &&
--		    psb_crtc->saved_mode.vdisplay != 0) {
-+		if (gma_crtc->saved_mode.hdisplay != 0 &&
-+		    gma_crtc->saved_mode.vdisplay != 0) {
- 			if (centerechange) {
- 				if (!drm_crtc_helper_set_mode(encoder->crtc,
--						&psb_crtc->saved_mode,
-+						&gma_crtc->saved_mode,
- 						encoder->crtc->x,
- 						encoder->crtc->y,
- 						encoder->crtc->fb))
-@@ -294,8 +293,8 @@ static int mdfld_dsi_connector_set_prope
- 				struct drm_encoder_helper_funcs *funcs =
- 						encoder->helper_private;
- 				funcs->mode_set(encoder,
--					&psb_crtc->saved_mode,
--					&psb_crtc->saved_adjusted_mode);
-+					&gma_crtc->saved_mode,
-+					&gma_crtc->saved_adjusted_mode);
- 			}
- 		}
- 	} else if (!strcmp(property->name, "backlight") && encoder) {
---- a/drivers/gpu/drm/gma500/mdfld_intel_display.c
-+++ b/drivers/gpu/drm/gma500/mdfld_intel_display.c
-@@ -165,9 +165,9 @@ static int mdfld__intel_pipe_set_base(st
- {
- 	struct drm_device *dev = crtc->dev;
- 	struct drm_psb_private *dev_priv = dev->dev_private;
--	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
-+	struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
- 	struct psb_framebuffer *psbfb = to_psb_fb(crtc->fb);
--	int pipe = psb_intel_crtc->pipe;
-+	int pipe = gma_crtc->pipe;
- 	const struct psb_offset *map = &dev_priv->regmap[pipe];
- 	unsigned long start, offset;
- 	u32 dspcntr;
-@@ -305,8 +305,8 @@ static void mdfld_crtc_dpms(struct drm_c
- {
- 	struct drm_device *dev = crtc->dev;
- 	struct drm_psb_private *dev_priv = dev->dev_private;
--	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
--	int pipe = psb_intel_crtc->pipe;
-+	struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
-+	int pipe = gma_crtc->pipe;
- 	const struct psb_offset *map = &dev_priv->regmap[pipe];
- 	u32 pipeconf = dev_priv->pipeconf[pipe];
- 	u32 temp;
-@@ -669,9 +669,9 @@ static int mdfld_crtc_mode_set(struct dr
- 			      struct drm_framebuffer *old_fb)
- {
- 	struct drm_device *dev = crtc->dev;
--	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
-+	struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
- 	struct drm_psb_private *dev_priv = dev->dev_private;
--	int pipe = psb_intel_crtc->pipe;
-+	int pipe = gma_crtc->pipe;
- 	const struct psb_offset *map = &dev_priv->regmap[pipe];
- 	int refclk = 0;
- 	int clk_n = 0, clk_p2 = 0, clk_byte = 1, clk = 0, m_conv = 0,
-@@ -730,9 +730,9 @@ static int mdfld_crtc_mode_set(struct dr
- 	if (!gma_power_begin(dev, true))
- 		return 0;
- 
--	memcpy(&psb_intel_crtc->saved_mode, mode,
-+	memcpy(&gma_crtc->saved_mode, mode,
- 					sizeof(struct drm_display_mode));
--	memcpy(&psb_intel_crtc->saved_adjusted_mode, adjusted_mode,
-+	memcpy(&gma_crtc->saved_adjusted_mode, adjusted_mode,
- 					sizeof(struct drm_display_mode));
- 
- 	list_for_each_entry(connector, &mode_config->connector_list, head) {
---- a/drivers/gpu/drm/gma500/oaktrail_crtc.c
-+++ b/drivers/gpu/drm/gma500/oaktrail_crtc.c
-@@ -163,8 +163,8 @@ static void oaktrail_crtc_dpms(struct dr
- {
- 	struct drm_device *dev = crtc->dev;
- 	struct drm_psb_private *dev_priv = dev->dev_private;
--	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
--	int pipe = psb_intel_crtc->pipe;
-+	struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
-+	int pipe = gma_crtc->pipe;
- 	const struct psb_offset *map = &dev_priv->regmap[pipe];
- 	u32 temp;
- 
-@@ -292,9 +292,9 @@ static int oaktrail_crtc_mode_set(struct
- 			      struct drm_framebuffer *old_fb)
- {
- 	struct drm_device *dev = crtc->dev;
--	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
-+	struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
- 	struct drm_psb_private *dev_priv = dev->dev_private;
--	int pipe = psb_intel_crtc->pipe;
-+	int pipe = gma_crtc->pipe;
- 	const struct psb_offset *map = &dev_priv->regmap[pipe];
- 	int refclk = 0;
- 	struct oaktrail_clock_t clock;
-@@ -313,10 +313,10 @@ static int oaktrail_crtc_mode_set(struct
- 	if (!gma_power_begin(dev, true))
- 		return 0;
- 
--	memcpy(&psb_intel_crtc->saved_mode,
-+	memcpy(&gma_crtc->saved_mode,
- 		mode,
- 		sizeof(struct drm_display_mode));
--	memcpy(&psb_intel_crtc->saved_adjusted_mode,
-+	memcpy(&gma_crtc->saved_adjusted_mode,
- 		adjusted_mode,
- 		sizeof(struct drm_display_mode));
- 
-@@ -499,9 +499,9 @@ static int oaktrail_pipe_set_base(struct
- {
- 	struct drm_device *dev = crtc->dev;
- 	struct drm_psb_private *dev_priv = dev->dev_private;
--	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
-+	struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
- 	struct psb_framebuffer *psbfb = to_psb_fb(crtc->fb);
--	int pipe = psb_intel_crtc->pipe;
-+	int pipe = gma_crtc->pipe;
- 	const struct psb_offset *map = &dev_priv->regmap[pipe];
- 	unsigned long start, offset;
- 
---- a/drivers/gpu/drm/gma500/psb_drv.c
-+++ b/drivers/gpu/drm/gma500/psb_drv.c
-@@ -441,7 +441,7 @@ static int psb_gamma_ioctl(struct drm_de
- 	struct drm_mode_object *obj;
- 	struct drm_crtc *crtc;
- 	struct drm_connector *connector;
--	struct psb_intel_crtc *psb_intel_crtc;
-+	struct gma_crtc *gma_crtc;
- 	int i = 0;
- 	int32_t obj_id;
- 
-@@ -454,10 +454,10 @@ static int psb_gamma_ioctl(struct drm_de
- 
- 	connector = obj_to_connector(obj);
- 	crtc = connector->encoder->crtc;
--	psb_intel_crtc = to_psb_intel_crtc(crtc);
-+	gma_crtc = to_gma_crtc(crtc);
- 
- 	for (i = 0; i < 256; i++)
--		psb_intel_crtc->lut_adj[i] = lut_arg->lut[i];
-+		gma_crtc->lut_adj[i] = lut_arg->lut[i];
- 
- 	gma_crtc_load_lut(crtc);
- 
---- a/drivers/gpu/drm/gma500/psb_intel_display.c
-+++ b/drivers/gpu/drm/gma500/psb_intel_display.c
-@@ -106,9 +106,9 @@ static int psb_intel_crtc_mode_set(struc
- {
- 	struct drm_device *dev = crtc->dev;
- 	struct drm_psb_private *dev_priv = dev->dev_private;
--	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
-+	struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
- 	struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private;
--	int pipe = psb_intel_crtc->pipe;
-+	int pipe = gma_crtc->pipe;
- 	const struct psb_offset *map = &dev_priv->regmap[pipe];
- 	int refclk;
- 	struct gma_clock_t clock;
-@@ -148,7 +148,7 @@ static int psb_intel_crtc_mode_set(struc
- 
- 	refclk = 96000;
- 
--	limit = psb_intel_crtc->clock_funcs->limit(crtc, refclk);
-+	limit = gma_crtc->clock_funcs->limit(crtc, refclk);
- 
- 	ok = limit->find_pll(limit, crtc, adjusted_mode->clock, refclk,
- 				 &clock);
-@@ -308,9 +308,9 @@ static int psb_intel_crtc_mode_set(struc
- static int psb_intel_crtc_clock_get(struct drm_device *dev,
- 				struct drm_crtc *crtc)
- {
--	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
-+	struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
- 	struct drm_psb_private *dev_priv = dev->dev_private;
--	int pipe = psb_intel_crtc->pipe;
-+	int pipe = gma_crtc->pipe;
- 	const struct psb_offset *map = &dev_priv->regmap[pipe];
- 	u32 dpll;
- 	u32 fp;
-@@ -384,8 +384,8 @@ static int psb_intel_crtc_clock_get(stru
- struct drm_display_mode *psb_intel_crtc_mode_get(struct drm_device *dev,
- 					     struct drm_crtc *crtc)
- {
--	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
--	int pipe = psb_intel_crtc->pipe;
-+	struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
-+	int pipe = gma_crtc->pipe;
- 	struct drm_display_mode *mode;
- 	int htot;
- 	int hsync;
-@@ -459,7 +459,7 @@ const struct gma_clock_funcs psb_clock_f
-  * to zero. This is a workaround for h/w defect on Oaktrail
-  */
- static void psb_intel_cursor_init(struct drm_device *dev,
--				  struct psb_intel_crtc *psb_intel_crtc)
-+				  struct gma_crtc *gma_crtc)
- {
- 	struct drm_psb_private *dev_priv = dev->dev_private;
- 	u32 control[3] = { CURACNTR, CURBCNTR, CURCCNTR };
-@@ -472,91 +472,87 @@ static void psb_intel_cursor_init(struct
- 		 */
- 		cursor_gt = psb_gtt_alloc_range(dev, 4 * PAGE_SIZE, "cursor", 1);
- 		if (!cursor_gt) {
--			psb_intel_crtc->cursor_gt = NULL;
-+			gma_crtc->cursor_gt = NULL;
- 			goto out;
- 		}
--		psb_intel_crtc->cursor_gt = cursor_gt;
--		psb_intel_crtc->cursor_addr = dev_priv->stolen_base +
-+		gma_crtc->cursor_gt = cursor_gt;
-+		gma_crtc->cursor_addr = dev_priv->stolen_base +
- 							cursor_gt->offset;
- 	} else {
--		psb_intel_crtc->cursor_gt = NULL;
-+		gma_crtc->cursor_gt = NULL;
- 	}
- 
- out:
--	REG_WRITE(control[psb_intel_crtc->pipe], 0);
--	REG_WRITE(base[psb_intel_crtc->pipe], 0);
-+	REG_WRITE(control[gma_crtc->pipe], 0);
-+	REG_WRITE(base[gma_crtc->pipe], 0);
- }
- 
- void psb_intel_crtc_init(struct drm_device *dev, int pipe,
- 		     struct psb_intel_mode_device *mode_dev)
- {
- 	struct drm_psb_private *dev_priv = dev->dev_private;
--	struct psb_intel_crtc *psb_intel_crtc;
-+	struct gma_crtc *gma_crtc;
- 	int i;
- 	uint16_t *r_base, *g_base, *b_base;
- 
- 	/* We allocate a extra array of drm_connector pointers
- 	 * for fbdev after the crtc */
--	psb_intel_crtc =
--	    kzalloc(sizeof(struct psb_intel_crtc) +
--		    (INTELFB_CONN_LIMIT * sizeof(struct drm_connector *)),
--		    GFP_KERNEL);
--	if (psb_intel_crtc == NULL)
-+	gma_crtc = kzalloc(sizeof(struct gma_crtc) +
-+			(INTELFB_CONN_LIMIT * sizeof(struct drm_connector *)),
-+			GFP_KERNEL);
-+	if (gma_crtc == NULL)
- 		return;
- 
--	psb_intel_crtc->crtc_state =
-+	gma_crtc->crtc_state =
- 		kzalloc(sizeof(struct psb_intel_crtc_state), GFP_KERNEL);
--	if (!psb_intel_crtc->crtc_state) {
-+	if (!gma_crtc->crtc_state) {
- 		dev_err(dev->dev, "Crtc state error: No memory\n");
--		kfree(psb_intel_crtc);
-+		kfree(gma_crtc);
- 		return;
- 	}
- 
- 	/* Set the CRTC operations from the chip specific data */
--	drm_crtc_init(dev, &psb_intel_crtc->base, dev_priv->ops->crtc_funcs);
-+	drm_crtc_init(dev, &gma_crtc->base, dev_priv->ops->crtc_funcs);
- 
- 	/* Set the CRTC clock functions from chip specific data */
--	psb_intel_crtc->clock_funcs = dev_priv->ops->clock_funcs;
-+	gma_crtc->clock_funcs = dev_priv->ops->clock_funcs;
- 
--	drm_mode_crtc_set_gamma_size(&psb_intel_crtc->base, 256);
--	psb_intel_crtc->pipe = pipe;
--	psb_intel_crtc->plane = pipe;
-+	drm_mode_crtc_set_gamma_size(&gma_crtc->base, 256);
-+	gma_crtc->pipe = pipe;
-+	gma_crtc->plane = pipe;
- 
--	r_base = psb_intel_crtc->base.gamma_store;
-+	r_base = gma_crtc->base.gamma_store;
- 	g_base = r_base + 256;
- 	b_base = g_base + 256;
- 	for (i = 0; i < 256; i++) {
--		psb_intel_crtc->lut_r[i] = i;
--		psb_intel_crtc->lut_g[i] = i;
--		psb_intel_crtc->lut_b[i] = i;
-+		gma_crtc->lut_r[i] = i;
-+		gma_crtc->lut_g[i] = i;
-+		gma_crtc->lut_b[i] = i;
- 		r_base[i] = i << 8;
- 		g_base[i] = i << 8;
- 		b_base[i] = i << 8;
- 
--		psb_intel_crtc->lut_adj[i] = 0;
-+		gma_crtc->lut_adj[i] = 0;
- 	}
- 
--	psb_intel_crtc->mode_dev = mode_dev;
--	psb_intel_crtc->cursor_addr = 0;
-+	gma_crtc->mode_dev = mode_dev;
-+	gma_crtc->cursor_addr = 0;
- 
--	drm_crtc_helper_add(&psb_intel_crtc->base,
-+	drm_crtc_helper_add(&gma_crtc->base,
- 						dev_priv->ops->crtc_helper);
- 
- 	/* Setup the array of drm_connector pointer array */
--	psb_intel_crtc->mode_set.crtc = &psb_intel_crtc->base;
-+	gma_crtc->mode_set.crtc = &gma_crtc->base;
- 	BUG_ON(pipe >= ARRAY_SIZE(dev_priv->plane_to_crtc_mapping) ||
--	       dev_priv->plane_to_crtc_mapping[psb_intel_crtc->plane] != NULL);
--	dev_priv->plane_to_crtc_mapping[psb_intel_crtc->plane] =
--							&psb_intel_crtc->base;
--	dev_priv->pipe_to_crtc_mapping[psb_intel_crtc->pipe] =
--							&psb_intel_crtc->base;
--	psb_intel_crtc->mode_set.connectors =
--	    (struct drm_connector **) (psb_intel_crtc + 1);
--	psb_intel_crtc->mode_set.num_connectors = 0;
--	psb_intel_cursor_init(dev, psb_intel_crtc);
-+	       dev_priv->plane_to_crtc_mapping[gma_crtc->plane] != NULL);
-+	dev_priv->plane_to_crtc_mapping[gma_crtc->plane] = &gma_crtc->base;
-+	dev_priv->pipe_to_crtc_mapping[gma_crtc->pipe] = &gma_crtc->base;
-+	gma_crtc->mode_set.connectors = (struct drm_connector **)(gma_crtc + 1);
-+	gma_crtc->mode_set.num_connectors = 0;
-+	psb_intel_cursor_init(dev, gma_crtc);
- 
- 	/* Set to true so that the pipe is forced off on initial config. */
--	psb_intel_crtc->active = true;
-+	gma_crtc->active = true;
- }
- 
- int psb_intel_get_pipe_from_crtc_id(struct drm_device *dev, void *data,
-@@ -565,7 +561,7 @@ int psb_intel_get_pipe_from_crtc_id(stru
- 	struct drm_psb_private *dev_priv = dev->dev_private;
- 	struct drm_psb_get_pipe_from_crtc_id_arg *pipe_from_crtc_id = data;
- 	struct drm_mode_object *drmmode_obj;
--	struct psb_intel_crtc *crtc;
-+	struct gma_crtc *crtc;
- 
- 	if (!dev_priv) {
- 		dev_err(dev->dev, "called with no initialization\n");
-@@ -580,7 +576,7 @@ int psb_intel_get_pipe_from_crtc_id(stru
- 		return -EINVAL;
- 	}
- 
--	crtc = to_psb_intel_crtc(obj_to_crtc(drmmode_obj));
-+	crtc = to_gma_crtc(obj_to_crtc(drmmode_obj));
- 	pipe_from_crtc_id->pipe = crtc->pipe;
- 
- 	return 0;
-@@ -591,8 +587,8 @@ struct drm_crtc *psb_intel_get_crtc_from
- 	struct drm_crtc *crtc = NULL;
- 
- 	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
--		struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
--		if (psb_intel_crtc->pipe == pipe)
-+		struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
-+		if (gma_crtc->pipe == pipe)
- 			break;
- 	}
- 	return crtc;
---- a/drivers/gpu/drm/gma500/psb_intel_drv.h
-+++ b/drivers/gpu/drm/gma500/psb_intel_drv.h
-@@ -162,7 +162,7 @@ struct psb_intel_crtc_state {
- 	uint32_t savePalette[256];
- };
- 
--struct psb_intel_crtc {
-+struct gma_crtc {
- 	struct drm_crtc base;
- 	int pipe;
- 	int plane;
-@@ -193,8 +193,8 @@ struct psb_intel_crtc {
- 	const struct gma_clock_funcs *clock_funcs;
- };
- 
--#define to_psb_intel_crtc(x)	\
--		container_of(x, struct psb_intel_crtc, base)
-+#define to_gma_crtc(x)	\
-+		container_of(x, struct gma_crtc, base)
- #define to_psb_intel_connector(x) \
- 		container_of(x, struct psb_intel_connector, base)
- #define to_psb_intel_encoder(x)	\
---- a/drivers/gpu/drm/gma500/psb_intel_lvds.c
-+++ b/drivers/gpu/drm/gma500/psb_intel_lvds.c
-@@ -381,8 +381,7 @@ bool psb_intel_lvds_mode_fixup(struct dr
- 	struct drm_device *dev = encoder->dev;
- 	struct drm_psb_private *dev_priv = dev->dev_private;
- 	struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
--	struct psb_intel_crtc *psb_intel_crtc =
--				to_psb_intel_crtc(encoder->crtc);
-+	struct gma_crtc *gma_crtc = to_gma_crtc(encoder->crtc);
- 	struct drm_encoder *tmp_encoder;
- 	struct drm_display_mode *panel_fixed_mode = mode_dev->panel_fixed_mode;
- 	struct psb_intel_encoder *psb_intel_encoder =
-@@ -392,11 +391,11 @@ bool psb_intel_lvds_mode_fixup(struct dr
- 		panel_fixed_mode = mode_dev->panel_fixed_mode2;
- 
- 	/* PSB requires the LVDS is on pipe B, MRST has only one pipe anyway */
--	if (!IS_MRST(dev) && psb_intel_crtc->pipe == 0) {
-+	if (!IS_MRST(dev) && gma_crtc->pipe == 0) {
- 		printk(KERN_ERR "Can't support LVDS on pipe A\n");
- 		return false;
- 	}
--	if (IS_MRST(dev) && psb_intel_crtc->pipe != 0) {
-+	if (IS_MRST(dev) && gma_crtc->pipe != 0) {
- 		printk(KERN_ERR "Must use PIPE A\n");
- 		return false;
- 	}
-@@ -585,8 +584,7 @@ int psb_intel_lvds_set_property(struct d
- 		return -1;
- 
- 	if (!strcmp(property->name, "scaling mode")) {
--		struct psb_intel_crtc *crtc =
--					to_psb_intel_crtc(encoder->crtc);
-+		struct gma_crtc *crtc = to_gma_crtc(encoder->crtc);
- 		uint64_t curval;
- 
- 		if (!crtc)
---- a/drivers/gpu/drm/gma500/psb_intel_sdvo.c
-+++ b/drivers/gpu/drm/gma500/psb_intel_sdvo.c
-@@ -987,7 +987,7 @@ static void psb_intel_sdvo_mode_set(stru
- {
- 	struct drm_device *dev = encoder->dev;
- 	struct drm_crtc *crtc = encoder->crtc;
--	struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc);
-+	struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
- 	struct psb_intel_sdvo *psb_intel_sdvo = to_psb_intel_sdvo(encoder);
- 	u32 sdvox;
- 	struct psb_intel_sdvo_in_out_map in_out;
-@@ -1070,7 +1070,7 @@ static void psb_intel_sdvo_mode_set(stru
- 	}
- 	sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
- 
--	if (psb_intel_crtc->pipe == 1)
-+	if (gma_crtc->pipe == 1)
- 		sdvox |= SDVO_PIPE_B_SELECT;
- 	if (psb_intel_sdvo->has_hdmi_audio)
- 		sdvox |= SDVO_AUDIO_ENABLE;
diff --git a/patches.gma500/0032-drm-gma500-Rename-psb_intel_connector-to-gma_connect.patch b/patches.gma500/0032-drm-gma500-Rename-psb_intel_connector-to-gma_connect.patch
deleted file mode 100644
index 1c9b17e31a235..0000000000000
--- a/patches.gma500/0032-drm-gma500-Rename-psb_intel_connector-to-gma_connect.patch
+++ /dev/null
@@ -1,534 +0,0 @@
-From e58e08ae8483015454b0fe1f6f1d68fd65d34650 Mon Sep 17 00:00:00 2001
-From: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-Date: Mon, 22 Jul 2013 17:05:25 +0200
-Subject: drm/gma500: Rename psb_intel_connector to gma_connector
-
-The psb_intel_connector is generic and should be named appropriately
-
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-(cherry picked from commit a3d5d75f694396aa574c4dadbd6008e2cc9a2bbb)
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
----
- drivers/gpu/drm/gma500/cdv_intel_crt.c     |   14 +++++++-------
- drivers/gpu/drm/gma500/cdv_intel_dp.c      |   16 ++++++++--------
- drivers/gpu/drm/gma500/cdv_intel_hdmi.c    |   12 ++++++------
- drivers/gpu/drm/gma500/cdv_intel_lvds.c    |   12 ++++++------
- drivers/gpu/drm/gma500/framebuffer.c       |    2 +-
- drivers/gpu/drm/gma500/framebuffer.h       |    2 +-
- drivers/gpu/drm/gma500/gma_display.c       |    2 +-
- drivers/gpu/drm/gma500/mdfld_dsi_output.h  |    8 ++++----
- drivers/gpu/drm/gma500/oaktrail_hdmi.c     |   10 +++++-----
- drivers/gpu/drm/gma500/oaktrail_lvds.c     |   12 ++++++------
- drivers/gpu/drm/gma500/psb_intel_display.c |    2 +-
- drivers/gpu/drm/gma500/psb_intel_drv.h     |   10 +++++-----
- drivers/gpu/drm/gma500/psb_intel_lvds.c    |   15 +++++++--------
- drivers/gpu/drm/gma500/psb_intel_sdvo.c    |   12 ++++++------
- 14 files changed, 64 insertions(+), 65 deletions(-)
-
---- a/drivers/gpu/drm/gma500/cdv_intel_crt.c
-+++ b/drivers/gpu/drm/gma500/cdv_intel_crt.c
-@@ -259,7 +259,7 @@ void cdv_intel_crt_init(struct drm_devic
- 			struct psb_intel_mode_device *mode_dev)
- {
- 
--	struct psb_intel_connector *psb_intel_connector;
-+	struct gma_connector *gma_connector;
- 	struct psb_intel_encoder *psb_intel_encoder;
- 	struct drm_connector *connector;
- 	struct drm_encoder *encoder;
-@@ -270,11 +270,11 @@ void cdv_intel_crt_init(struct drm_devic
- 	if (!psb_intel_encoder)
- 		return;
- 
--	psb_intel_connector = kzalloc(sizeof(struct psb_intel_connector), GFP_KERNEL);
--	if (!psb_intel_connector)
-+	gma_connector = kzalloc(sizeof(struct gma_connector), GFP_KERNEL);
-+	if (!gma_connector)
- 		goto failed_connector;
- 
--	connector = &psb_intel_connector->base;
-+	connector = &gma_connector->base;
- 	connector->polled = DRM_CONNECTOR_POLL_HPD;
- 	drm_connector_init(dev, connector,
- 		&cdv_intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
-@@ -283,7 +283,7 @@ void cdv_intel_crt_init(struct drm_devic
- 	drm_encoder_init(dev, encoder,
- 		&cdv_intel_crt_enc_funcs, DRM_MODE_ENCODER_DAC);
- 
--	gma_connector_attach_encoder(psb_intel_connector, psb_intel_encoder);
-+	gma_connector_attach_encoder(gma_connector, psb_intel_encoder);
- 
- 	/* Set up the DDC bus. */
- 	i2c_reg = GPIOA;
-@@ -317,8 +317,8 @@ void cdv_intel_crt_init(struct drm_devic
- 	return;
- failed_ddc:
- 	drm_encoder_cleanup(&psb_intel_encoder->base);
--	drm_connector_cleanup(&psb_intel_connector->base);
--	kfree(psb_intel_connector);
-+	drm_connector_cleanup(&gma_connector->base);
-+	kfree(gma_connector);
- failed_connector:
- 	kfree(psb_intel_encoder);
- 	return;
---- a/drivers/gpu/drm/gma500/cdv_intel_dp.c
-+++ b/drivers/gpu/drm/gma500/cdv_intel_dp.c
-@@ -648,7 +648,7 @@ cdv_intel_dp_i2c_aux_ch(struct i2c_adapt
- }
- 
- static int
--cdv_intel_dp_i2c_init(struct psb_intel_connector *connector, struct psb_intel_encoder *encoder, const char *name)
-+cdv_intel_dp_i2c_init(struct gma_connector *connector, struct psb_intel_encoder *encoder, const char *name)
- {
- 	struct cdv_intel_dp *intel_dp = encoder->dev_priv;
- 	int ret;
-@@ -1803,7 +1803,7 @@ void
- cdv_intel_dp_init(struct drm_device *dev, struct psb_intel_mode_device *mode_dev, int output_reg)
- {
- 	struct psb_intel_encoder *psb_intel_encoder;
--	struct psb_intel_connector *psb_intel_connector;
-+	struct gma_connector *gma_connector;
- 	struct drm_connector *connector;
- 	struct drm_encoder *encoder;
- 	struct cdv_intel_dp *intel_dp;
-@@ -1813,8 +1813,8 @@ cdv_intel_dp_init(struct drm_device *dev
- 	psb_intel_encoder = kzalloc(sizeof(struct psb_intel_encoder), GFP_KERNEL);
- 	if (!psb_intel_encoder)
- 		return;
--        psb_intel_connector = kzalloc(sizeof(struct psb_intel_connector), GFP_KERNEL);
--        if (!psb_intel_connector)
-+        gma_connector = kzalloc(sizeof(struct gma_connector), GFP_KERNEL);
-+        if (!gma_connector)
-                 goto err_connector;
- 	intel_dp = kzalloc(sizeof(struct cdv_intel_dp), GFP_KERNEL);
- 	if (!intel_dp)
-@@ -1823,13 +1823,13 @@ cdv_intel_dp_init(struct drm_device *dev
- 	if ((output_reg == DP_C) && cdv_intel_dpc_is_edp(dev))
- 		type = DRM_MODE_CONNECTOR_eDP;
- 
--	connector = &psb_intel_connector->base;
-+	connector = &gma_connector->base;
- 	encoder = &psb_intel_encoder->base;
- 
- 	drm_connector_init(dev, connector, &cdv_intel_dp_connector_funcs, type);
- 	drm_encoder_init(dev, encoder, &cdv_intel_dp_enc_funcs, DRM_MODE_ENCODER_TMDS);
- 
--	gma_connector_attach_encoder(psb_intel_connector, psb_intel_encoder);
-+	gma_connector_attach_encoder(gma_connector, psb_intel_encoder);
- 
- 	if (type == DRM_MODE_CONNECTOR_DisplayPort)
-         	psb_intel_encoder->type = INTEL_OUTPUT_DISPLAYPORT;
-@@ -1864,7 +1864,7 @@ cdv_intel_dp_init(struct drm_device *dev
- 
- 	cdv_disable_intel_clock_gating(dev);
- 
--	cdv_intel_dp_i2c_init(psb_intel_connector, psb_intel_encoder, name);
-+	cdv_intel_dp_i2c_init(gma_connector, psb_intel_encoder, name);
-         /* FIXME:fail check */
- 	cdv_intel_dp_add_properties(connector);
- 
-@@ -1947,7 +1947,7 @@ cdv_intel_dp_init(struct drm_device *dev
- 	return;
- 
- err_priv:
--	kfree(psb_intel_connector);
-+	kfree(gma_connector);
- err_connector:
- 	kfree(psb_intel_encoder);
- }
---- a/drivers/gpu/drm/gma500/cdv_intel_hdmi.c
-+++ b/drivers/gpu/drm/gma500/cdv_intel_hdmi.c
-@@ -295,7 +295,7 @@ void cdv_hdmi_init(struct drm_device *de
- 			struct psb_intel_mode_device *mode_dev, int reg)
- {
- 	struct psb_intel_encoder *psb_intel_encoder;
--	struct psb_intel_connector *psb_intel_connector;
-+	struct gma_connector *gma_connector;
- 	struct drm_connector *connector;
- 	struct drm_encoder *encoder;
- 	struct mid_intel_hdmi_priv *hdmi_priv;
-@@ -307,10 +307,10 @@ void cdv_hdmi_init(struct drm_device *de
- 	if (!psb_intel_encoder)
- 		return;
- 
--	psb_intel_connector = kzalloc(sizeof(struct psb_intel_connector),
-+	gma_connector = kzalloc(sizeof(struct gma_connector),
- 				      GFP_KERNEL);
- 
--	if (!psb_intel_connector)
-+	if (!gma_connector)
- 		goto err_connector;
- 
- 	hdmi_priv = kzalloc(sizeof(struct mid_intel_hdmi_priv), GFP_KERNEL);
-@@ -318,7 +318,7 @@ void cdv_hdmi_init(struct drm_device *de
- 	if (!hdmi_priv)
- 		goto err_priv;
- 
--	connector = &psb_intel_connector->base;
-+	connector = &gma_connector->base;
- 	connector->polled = DRM_CONNECTOR_POLL_HPD;
- 	encoder = &psb_intel_encoder->base;
- 	drm_connector_init(dev, connector,
-@@ -328,7 +328,7 @@ void cdv_hdmi_init(struct drm_device *de
- 	drm_encoder_init(dev, encoder, &psb_intel_lvds_enc_funcs,
- 			 DRM_MODE_ENCODER_TMDS);
- 
--	gma_connector_attach_encoder(psb_intel_connector, psb_intel_encoder);
-+	gma_connector_attach_encoder(gma_connector, psb_intel_encoder);
- 	psb_intel_encoder->type = INTEL_OUTPUT_HDMI;
- 	hdmi_priv->hdmi_reg = reg;
- 	hdmi_priv->has_hdmi_sink = false;
-@@ -378,7 +378,7 @@ failed_ddc:
- 	drm_encoder_cleanup(encoder);
- 	drm_connector_cleanup(connector);
- err_priv:
--	kfree(psb_intel_connector);
-+	kfree(gma_connector);
- err_connector:
- 	kfree(psb_intel_encoder);
- }
---- a/drivers/gpu/drm/gma500/cdv_intel_lvds.c
-+++ b/drivers/gpu/drm/gma500/cdv_intel_lvds.c
-@@ -611,7 +611,7 @@ void cdv_intel_lvds_init(struct drm_devi
- 		     struct psb_intel_mode_device *mode_dev)
- {
- 	struct psb_intel_encoder *psb_intel_encoder;
--	struct psb_intel_connector *psb_intel_connector;
-+	struct gma_connector *gma_connector;
- 	struct cdv_intel_lvds_priv *lvds_priv;
- 	struct drm_connector *connector;
- 	struct drm_encoder *encoder;
-@@ -633,9 +633,9 @@ void cdv_intel_lvds_init(struct drm_devi
- 	if (!psb_intel_encoder)
- 		return;
- 
--	psb_intel_connector = kzalloc(sizeof(struct psb_intel_connector),
-+	gma_connector = kzalloc(sizeof(struct gma_connector),
- 				      GFP_KERNEL);
--	if (!psb_intel_connector)
-+	if (!gma_connector)
- 		goto failed_connector;
- 
- 	lvds_priv = kzalloc(sizeof(struct cdv_intel_lvds_priv), GFP_KERNEL);
-@@ -644,7 +644,7 @@ void cdv_intel_lvds_init(struct drm_devi
- 
- 	psb_intel_encoder->dev_priv = lvds_priv;
- 
--	connector = &psb_intel_connector->base;
-+	connector = &gma_connector->base;
- 	encoder = &psb_intel_encoder->base;
- 
- 
-@@ -657,7 +657,7 @@ void cdv_intel_lvds_init(struct drm_devi
- 			 DRM_MODE_ENCODER_LVDS);
- 
- 
--	gma_connector_attach_encoder(psb_intel_connector, psb_intel_encoder);
-+	gma_connector_attach_encoder(gma_connector, psb_intel_encoder);
- 	psb_intel_encoder->type = INTEL_OUTPUT_LVDS;
- 
- 	drm_encoder_helper_add(encoder, &cdv_intel_lvds_helper_funcs);
-@@ -791,7 +791,7 @@ failed_blc_i2c:
- 	drm_connector_cleanup(connector);
- 	kfree(lvds_priv);
- failed_lvds_priv:
--	kfree(psb_intel_connector);
-+	kfree(gma_connector);
- failed_connector:
- 	kfree(psb_intel_encoder);
- }
---- a/drivers/gpu/drm/gma500/framebuffer.c
-+++ b/drivers/gpu/drm/gma500/framebuffer.c
-@@ -744,7 +744,7 @@ static void psb_setup_outputs(struct drm
- 		}
- 		encoder->possible_crtcs = crtc_mask;
- 		encoder->possible_clones =
--		    psb_intel_connector_clones(dev, clone_mask);
-+		    gma_connector_clones(dev, clone_mask);
- 	}
- }
- 
---- a/drivers/gpu/drm/gma500/framebuffer.h
-+++ b/drivers/gpu/drm/gma500/framebuffer.h
-@@ -41,7 +41,7 @@ struct psb_fbdev {
- 
- #define to_psb_fb(x) container_of(x, struct psb_framebuffer, base)
- 
--extern int psb_intel_connector_clones(struct drm_device *dev, int type_mask);
-+extern int gma_connector_clones(struct drm_device *dev, int type_mask);
- 
- #endif
- 
---- a/drivers/gpu/drm/gma500/gma_display.c
-+++ b/drivers/gpu/drm/gma500/gma_display.c
-@@ -672,7 +672,7 @@ struct drm_encoder *gma_best_encoder(str
- 	return &psb_intel_encoder->base;
- }
- 
--void gma_connector_attach_encoder(struct psb_intel_connector *connector,
-+void gma_connector_attach_encoder(struct gma_connector *connector,
- 				  struct psb_intel_encoder *encoder)
- {
- 	connector->encoder = encoder;
---- a/drivers/gpu/drm/gma500/mdfld_dsi_output.h
-+++ b/drivers/gpu/drm/gma500/mdfld_dsi_output.h
-@@ -227,7 +227,7 @@ enum {
- #define DSI_DPI_DISABLE_BTA					BIT(3)
- 
- struct mdfld_dsi_connector {
--	struct psb_intel_connector base;
-+	struct gma_connector base;
- 
- 	int pipe;
- 	void *private;
-@@ -269,11 +269,11 @@ struct mdfld_dsi_config {
- static inline struct mdfld_dsi_connector *mdfld_dsi_connector(
- 		struct drm_connector *connector)
- {
--	struct psb_intel_connector *psb_connector;
-+	struct gma_connector *gma_connector;
- 
--	psb_connector = to_psb_intel_connector(connector);
-+	gma_connector = to_gma_connector(connector);
- 
--	return container_of(psb_connector, struct mdfld_dsi_connector, base);
-+	return container_of(gma_connector, struct mdfld_dsi_connector, base);
- }
- 
- static inline struct mdfld_dsi_encoder *mdfld_dsi_encoder(
---- a/drivers/gpu/drm/gma500/oaktrail_hdmi.c
-+++ b/drivers/gpu/drm/gma500/oaktrail_hdmi.c
-@@ -641,7 +641,7 @@ void oaktrail_hdmi_init(struct drm_devic
- 					struct psb_intel_mode_device *mode_dev)
- {
- 	struct psb_intel_encoder *psb_intel_encoder;
--	struct psb_intel_connector *psb_intel_connector;
-+	struct gma_connector *gma_connector;
- 	struct drm_connector *connector;
- 	struct drm_encoder *encoder;
- 
-@@ -649,11 +649,11 @@ void oaktrail_hdmi_init(struct drm_devic
- 	if (!psb_intel_encoder)
- 		return;
- 
--	psb_intel_connector = kzalloc(sizeof(struct psb_intel_connector), GFP_KERNEL);
--	if (!psb_intel_connector)
-+	gma_connector = kzalloc(sizeof(struct gma_connector), GFP_KERNEL);
-+	if (!gma_connector)
- 		goto failed_connector;
- 
--	connector = &psb_intel_connector->base;
-+	connector = &gma_connector->base;
- 	encoder = &psb_intel_encoder->base;
- 	drm_connector_init(dev, connector,
- 			   &oaktrail_hdmi_connector_funcs,
-@@ -663,7 +663,7 @@ void oaktrail_hdmi_init(struct drm_devic
- 			 &oaktrail_hdmi_enc_funcs,
- 			 DRM_MODE_ENCODER_TMDS);
- 
--	gma_connector_attach_encoder(psb_intel_connector, psb_intel_encoder);
-+	gma_connector_attach_encoder(gma_connector, psb_intel_encoder);
- 
- 	psb_intel_encoder->type = INTEL_OUTPUT_HDMI;
- 	drm_encoder_helper_add(encoder, &oaktrail_hdmi_helper_funcs);
---- a/drivers/gpu/drm/gma500/oaktrail_lvds.c
-+++ b/drivers/gpu/drm/gma500/oaktrail_lvds.c
-@@ -326,7 +326,7 @@ void oaktrail_lvds_init(struct drm_devic
- 		    struct psb_intel_mode_device *mode_dev)
- {
- 	struct psb_intel_encoder *psb_intel_encoder;
--	struct psb_intel_connector *psb_intel_connector;
-+	struct gma_connector *gma_connector;
- 	struct drm_connector *connector;
- 	struct drm_encoder *encoder;
- 	struct drm_psb_private *dev_priv = dev->dev_private;
-@@ -338,11 +338,11 @@ void oaktrail_lvds_init(struct drm_devic
- 	if (!psb_intel_encoder)
- 		return;
- 
--	psb_intel_connector = kzalloc(sizeof(struct psb_intel_connector), GFP_KERNEL);
--	if (!psb_intel_connector)
-+	gma_connector = kzalloc(sizeof(struct gma_connector), GFP_KERNEL);
-+	if (!gma_connector)
- 		goto failed_connector;
- 
--	connector = &psb_intel_connector->base;
-+	connector = &gma_connector->base;
- 	encoder = &psb_intel_encoder->base;
- 	dev_priv->is_lvds_on = true;
- 	drm_connector_init(dev, connector,
-@@ -352,7 +352,7 @@ void oaktrail_lvds_init(struct drm_devic
- 	drm_encoder_init(dev, encoder, &psb_intel_lvds_enc_funcs,
- 			 DRM_MODE_ENCODER_LVDS);
- 
--	gma_connector_attach_encoder(psb_intel_connector, psb_intel_encoder);
-+	gma_connector_attach_encoder(gma_connector, psb_intel_encoder);
- 	psb_intel_encoder->type = INTEL_OUTPUT_LVDS;
- 
- 	drm_encoder_helper_add(encoder, &oaktrail_lvds_helper_funcs);
-@@ -440,7 +440,7 @@ failed_find:
- 
- 	drm_encoder_cleanup(encoder);
- 	drm_connector_cleanup(connector);
--	kfree(psb_intel_connector);
-+	kfree(gma_connector);
- failed_connector:
- 	kfree(psb_intel_encoder);
- }
---- a/drivers/gpu/drm/gma500/psb_intel_display.c
-+++ b/drivers/gpu/drm/gma500/psb_intel_display.c
-@@ -594,7 +594,7 @@ struct drm_crtc *psb_intel_get_crtc_from
- 	return crtc;
- }
- 
--int psb_intel_connector_clones(struct drm_device *dev, int type_mask)
-+int gma_connector_clones(struct drm_device *dev, int type_mask)
- {
- 	int index_mask = 0;
- 	struct drm_connector *connector;
---- a/drivers/gpu/drm/gma500/psb_intel_drv.h
-+++ b/drivers/gpu/drm/gma500/psb_intel_drv.h
-@@ -137,7 +137,7 @@ struct psb_intel_encoder {
- 	struct psb_intel_i2c_chan *ddc_bus;
- };
- 
--struct psb_intel_connector {
-+struct gma_connector {
- 	struct drm_connector base;
- 	struct psb_intel_encoder *encoder;
- };
-@@ -195,8 +195,8 @@ struct gma_crtc {
- 
- #define to_gma_crtc(x)	\
- 		container_of(x, struct gma_crtc, base)
--#define to_psb_intel_connector(x) \
--		container_of(x, struct psb_intel_connector, base)
-+#define to_gma_connector(x) \
-+		container_of(x, struct gma_connector, base)
- #define to_psb_intel_encoder(x)	\
- 		container_of(x, struct psb_intel_encoder, base)
- #define to_psb_intel_framebuffer(x)	\
-@@ -227,13 +227,13 @@ extern void mid_dsi_init(struct drm_devi
- 		    struct psb_intel_mode_device *mode_dev, int dsi_num);
- 
- extern struct drm_encoder *gma_best_encoder(struct drm_connector *connector);
--extern void gma_connector_attach_encoder(struct psb_intel_connector *connector,
-+extern void gma_connector_attach_encoder(struct gma_connector *connector,
- 					 struct psb_intel_encoder *encoder);
- 
- static inline struct psb_intel_encoder *gma_attached_encoder(
- 						struct drm_connector *connector)
- {
--	return to_psb_intel_connector(connector)->encoder;
-+	return to_gma_connector(connector)->encoder;
- }
- 
- extern struct drm_display_mode *psb_intel_crtc_mode_get(struct drm_device *dev,
---- a/drivers/gpu/drm/gma500/psb_intel_lvds.c
-+++ b/drivers/gpu/drm/gma500/psb_intel_lvds.c
-@@ -690,7 +690,7 @@ void psb_intel_lvds_init(struct drm_devi
- 			 struct psb_intel_mode_device *mode_dev)
- {
- 	struct psb_intel_encoder *psb_intel_encoder;
--	struct psb_intel_connector *psb_intel_connector;
-+	struct gma_connector *gma_connector;
- 	struct psb_intel_lvds_priv *lvds_priv;
- 	struct drm_connector *connector;
- 	struct drm_encoder *encoder;
-@@ -707,10 +707,9 @@ void psb_intel_lvds_init(struct drm_devi
- 		return;
- 	}
- 
--	psb_intel_connector =
--		kzalloc(sizeof(struct psb_intel_connector), GFP_KERNEL);
--	if (!psb_intel_connector) {
--		dev_err(dev->dev, "psb_intel_connector allocation error\n");
-+	gma_connector = kzalloc(sizeof(struct gma_connector), GFP_KERNEL);
-+	if (!gma_connector) {
-+		dev_err(dev->dev, "gma_connector allocation error\n");
- 		goto failed_encoder;
- 	}
- 
-@@ -722,7 +721,7 @@ void psb_intel_lvds_init(struct drm_devi
- 
- 	psb_intel_encoder->dev_priv = lvds_priv;
- 
--	connector = &psb_intel_connector->base;
-+	connector = &gma_connector->base;
- 	encoder = &psb_intel_encoder->base;
- 	drm_connector_init(dev, connector,
- 			   &psb_intel_lvds_connector_funcs,
-@@ -732,7 +731,7 @@ void psb_intel_lvds_init(struct drm_devi
- 			 &psb_intel_lvds_enc_funcs,
- 			 DRM_MODE_ENCODER_LVDS);
- 
--	gma_connector_attach_encoder(psb_intel_connector, psb_intel_encoder);
-+	gma_connector_attach_encoder(gma_connector, psb_intel_encoder);
- 	psb_intel_encoder->type = INTEL_OUTPUT_LVDS;
- 
- 	drm_encoder_helper_add(encoder, &psb_intel_lvds_helper_funcs);
-@@ -848,7 +847,7 @@ failed_blc_i2c:
- 	drm_encoder_cleanup(encoder);
- 	drm_connector_cleanup(connector);
- failed_connector:
--	kfree(psb_intel_connector);
-+	kfree(gma_connector);
- failed_encoder:
- 	kfree(psb_intel_encoder);
- }
---- a/drivers/gpu/drm/gma500/psb_intel_sdvo.c
-+++ b/drivers/gpu/drm/gma500/psb_intel_sdvo.c
-@@ -140,7 +140,7 @@ struct psb_intel_sdvo {
- };
- 
- struct psb_intel_sdvo_connector {
--	struct psb_intel_connector base;
-+	struct gma_connector base;
- 
- 	/* Mark the type of connector */
- 	uint16_t output_flag;
-@@ -206,7 +206,7 @@ static struct psb_intel_sdvo *intel_atta
- 
- static struct psb_intel_sdvo_connector *to_psb_intel_sdvo_connector(struct drm_connector *connector)
- {
--	return container_of(to_psb_intel_connector(connector), struct psb_intel_sdvo_connector, base);
-+	return container_of(to_gma_connector(connector), struct psb_intel_sdvo_connector, base);
- }
- 
- static bool
-@@ -2074,7 +2074,7 @@ psb_intel_sdvo_dvi_init(struct psb_intel
- {
- 	struct drm_encoder *encoder = &psb_intel_sdvo->base.base;
- 	struct drm_connector *connector;
--	struct psb_intel_connector *intel_connector;
-+	struct gma_connector *intel_connector;
- 	struct psb_intel_sdvo_connector *psb_intel_sdvo_connector;
- 
- 	psb_intel_sdvo_connector = kzalloc(sizeof(struct psb_intel_sdvo_connector), GFP_KERNEL);
-@@ -2114,7 +2114,7 @@ psb_intel_sdvo_tv_init(struct psb_intel_
- {
- 	struct drm_encoder *encoder = &psb_intel_sdvo->base.base;
- 	struct drm_connector *connector;
--	struct psb_intel_connector *intel_connector;
-+	struct gma_connector *intel_connector;
- 	struct psb_intel_sdvo_connector *psb_intel_sdvo_connector;
- 
- 	psb_intel_sdvo_connector = kzalloc(sizeof(struct psb_intel_sdvo_connector), GFP_KERNEL);
-@@ -2153,7 +2153,7 @@ psb_intel_sdvo_analog_init(struct psb_in
- {
- 	struct drm_encoder *encoder = &psb_intel_sdvo->base.base;
- 	struct drm_connector *connector;
--	struct psb_intel_connector *intel_connector;
-+	struct gma_connector *intel_connector;
- 	struct psb_intel_sdvo_connector *psb_intel_sdvo_connector;
- 
- 	psb_intel_sdvo_connector = kzalloc(sizeof(struct psb_intel_sdvo_connector), GFP_KERNEL);
-@@ -2187,7 +2187,7 @@ psb_intel_sdvo_lvds_init(struct psb_inte
- {
- 	struct drm_encoder *encoder = &psb_intel_sdvo->base.base;
- 	struct drm_connector *connector;
--	struct psb_intel_connector *intel_connector;
-+	struct gma_connector *intel_connector;
- 	struct psb_intel_sdvo_connector *psb_intel_sdvo_connector;
- 
- 	psb_intel_sdvo_connector = kzalloc(sizeof(struct psb_intel_sdvo_connector), GFP_KERNEL);
diff --git a/patches.gma500/0033-drm-gma500-Rename-psb_intel_encoder-to-gma_encoder.patch b/patches.gma500/0033-drm-gma500-Rename-psb_intel_encoder-to-gma_encoder.patch
deleted file mode 100644
index 990a7e14427ac..0000000000000
--- a/patches.gma500/0033-drm-gma500-Rename-psb_intel_encoder-to-gma_encoder.patch
+++ /dev/null
@@ -1,1589 +0,0 @@
-From 3113ad31b81b38d96614faaf3e6618ba01840f37 Mon Sep 17 00:00:00 2001
-From: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-Date: Mon, 22 Jul 2013 17:45:26 +0200
-Subject: drm/gma500: Rename psb_intel_encoder to gma_encoder
-
-The psb_intel_encoder is generic and should be named appropriately
-
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-(cherry picked from commit 367e44080e20f77fa7b0f2db83fd6367da59b6c3)
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
----
- drivers/gpu/drm/gma500/cdv_intel_crt.c       |   31 +++---
- drivers/gpu/drm/gma500/cdv_intel_display.c   |   10 +-
- drivers/gpu/drm/gma500/cdv_intel_dp.c        |  130 +++++++++++++--------------
- drivers/gpu/drm/gma500/cdv_intel_hdmi.c      |   66 ++++++-------
- drivers/gpu/drm/gma500/cdv_intel_lvds.c      |   50 ++++------
- drivers/gpu/drm/gma500/framebuffer.c         |    7 -
- drivers/gpu/drm/gma500/gma_display.c         |   13 +-
- drivers/gpu/drm/gma500/mdfld_dsi_output.h    |    8 -
- drivers/gpu/drm/gma500/mdfld_intel_display.c |    8 -
- drivers/gpu/drm/gma500/oaktrail_crtc.c       |    8 -
- drivers/gpu/drm/gma500/oaktrail_hdmi.c       |   14 +-
- drivers/gpu/drm/gma500/oaktrail_lvds.c       |   37 +++----
- drivers/gpu/drm/gma500/psb_drv.c             |    6 -
- drivers/gpu/drm/gma500/psb_intel_display.c   |   10 --
- drivers/gpu/drm/gma500/psb_intel_drv.h       |   14 +-
- drivers/gpu/drm/gma500/psb_intel_lvds.c      |   49 ++++------
- drivers/gpu/drm/gma500/psb_intel_sdvo.c      |   20 +---
- 17 files changed, 226 insertions(+), 255 deletions(-)
-
---- a/drivers/gpu/drm/gma500/cdv_intel_crt.c
-+++ b/drivers/gpu/drm/gma500/cdv_intel_crt.c
-@@ -196,10 +196,9 @@ static enum drm_connector_status cdv_int
- 
- static void cdv_intel_crt_destroy(struct drm_connector *connector)
- {
--	struct psb_intel_encoder *psb_intel_encoder =
--					gma_attached_encoder(connector);
-+	struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
- 
--	psb_intel_i2c_destroy(psb_intel_encoder->ddc_bus);
-+	psb_intel_i2c_destroy(gma_encoder->ddc_bus);
- 	drm_sysfs_connector_remove(connector);
- 	drm_connector_cleanup(connector);
- 	kfree(connector);
-@@ -207,9 +206,9 @@ static void cdv_intel_crt_destroy(struct
- 
- static int cdv_intel_crt_get_modes(struct drm_connector *connector)
- {
--	struct psb_intel_encoder *psb_intel_encoder =
--				gma_attached_encoder(connector);
--	return psb_intel_ddc_get_modes(connector, &psb_intel_encoder->ddc_bus->adapter);
-+	struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
-+	return psb_intel_ddc_get_modes(connector,
-+				       &gma_encoder->ddc_bus->adapter);
- }
- 
- static int cdv_intel_crt_set_property(struct drm_connector *connector,
-@@ -260,14 +259,14 @@ void cdv_intel_crt_init(struct drm_devic
- {
- 
- 	struct gma_connector *gma_connector;
--	struct psb_intel_encoder *psb_intel_encoder;
-+	struct gma_encoder *gma_encoder;
- 	struct drm_connector *connector;
- 	struct drm_encoder *encoder;
- 
- 	u32 i2c_reg;
- 
--	psb_intel_encoder = kzalloc(sizeof(struct psb_intel_encoder), GFP_KERNEL);
--	if (!psb_intel_encoder)
-+	gma_encoder = kzalloc(sizeof(struct gma_encoder), GFP_KERNEL);
-+	if (!gma_encoder)
- 		return;
- 
- 	gma_connector = kzalloc(sizeof(struct gma_connector), GFP_KERNEL);
-@@ -279,11 +278,11 @@ void cdv_intel_crt_init(struct drm_devic
- 	drm_connector_init(dev, connector,
- 		&cdv_intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
- 
--	encoder = &psb_intel_encoder->base;
-+	encoder = &gma_encoder->base;
- 	drm_encoder_init(dev, encoder,
- 		&cdv_intel_crt_enc_funcs, DRM_MODE_ENCODER_DAC);
- 
--	gma_connector_attach_encoder(gma_connector, psb_intel_encoder);
-+	gma_connector_attach_encoder(gma_connector, gma_encoder);
- 
- 	/* Set up the DDC bus. */
- 	i2c_reg = GPIOA;
-@@ -292,15 +291,15 @@ void cdv_intel_crt_init(struct drm_devic
- 	if (dev_priv->crt_ddc_bus != 0)
- 		i2c_reg = dev_priv->crt_ddc_bus;
- 	}*/
--	psb_intel_encoder->ddc_bus = psb_intel_i2c_create(dev,
-+	gma_encoder->ddc_bus = psb_intel_i2c_create(dev,
- 							  i2c_reg, "CRTDDC_A");
--	if (!psb_intel_encoder->ddc_bus) {
-+	if (!gma_encoder->ddc_bus) {
- 		dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration "
- 			   "failed.\n");
- 		goto failed_ddc;
- 	}
- 
--	psb_intel_encoder->type = INTEL_OUTPUT_ANALOG;
-+	gma_encoder->type = INTEL_OUTPUT_ANALOG;
- 	/*
- 	psb_intel_output->clone_mask = (1 << INTEL_ANALOG_CLONE_BIT);
- 	psb_intel_output->crtc_mask = (1 << 0) | (1 << 1);
-@@ -316,10 +315,10 @@ void cdv_intel_crt_init(struct drm_devic
- 
- 	return;
- failed_ddc:
--	drm_encoder_cleanup(&psb_intel_encoder->base);
-+	drm_encoder_cleanup(&gma_encoder->base);
- 	drm_connector_cleanup(&gma_connector->base);
- 	kfree(gma_connector);
- failed_connector:
--	kfree(psb_intel_encoder);
-+	kfree(gma_encoder);
- 	return;
- }
---- a/drivers/gpu/drm/gma500/cdv_intel_display.c
-+++ b/drivers/gpu/drm/gma500/cdv_intel_display.c
-@@ -497,14 +497,14 @@ static bool is_pipeb_lvds(struct drm_dev
- 		return false;
- 
- 	list_for_each_entry(connector, &mode_config->connector_list, head) {
--		struct psb_intel_encoder *psb_intel_encoder =
-+		struct gma_encoder *gma_encoder =
- 					gma_attached_encoder(connector);
- 
- 		if (!connector->encoder
- 		    || connector->encoder->crtc != crtc)
- 			continue;
- 
--		if (psb_intel_encoder->type == INTEL_OUTPUT_LVDS)
-+		if (gma_encoder->type == INTEL_OUTPUT_LVDS)
- 			return true;
- 	}
- 
-@@ -632,15 +632,15 @@ static int cdv_intel_crtc_mode_set(struc
- 	bool is_edp = false;
- 
- 	list_for_each_entry(connector, &mode_config->connector_list, head) {
--		struct psb_intel_encoder *psb_intel_encoder =
-+		struct gma_encoder *gma_encoder =
- 					gma_attached_encoder(connector);
- 
- 		if (!connector->encoder
- 		    || connector->encoder->crtc != crtc)
- 			continue;
- 
--		ddi_select = psb_intel_encoder->ddi_select;
--		switch (psb_intel_encoder->type) {
-+		ddi_select = gma_encoder->ddi_select;
-+		switch (gma_encoder->type) {
- 		case INTEL_OUTPUT_LVDS:
- 			is_lvds = true;
- 			break;
---- a/drivers/gpu/drm/gma500/cdv_intel_dp.c
-+++ b/drivers/gpu/drm/gma500/cdv_intel_dp.c
-@@ -69,7 +69,7 @@ struct cdv_intel_dp {
- 	uint8_t link_bw;
- 	uint8_t lane_count;
- 	uint8_t dpcd[4];
--	struct psb_intel_encoder *encoder;
-+	struct gma_encoder *encoder;
- 	struct i2c_adapter adapter;
- 	struct i2c_algo_dp_aux_data algo;
- 	uint8_t	train_set[4];
-@@ -115,18 +115,18 @@ static uint32_t dp_vswing_premph_table[]
-  * If a CPU or PCH DP output is attached to an eDP panel, this function
-  * will return true, and false otherwise.
-  */
--static bool is_edp(struct psb_intel_encoder *encoder)
-+static bool is_edp(struct gma_encoder *encoder)
- {
- 	return encoder->type == INTEL_OUTPUT_EDP;
- }
- 
- 
--static void cdv_intel_dp_start_link_train(struct psb_intel_encoder *encoder);
--static void cdv_intel_dp_complete_link_train(struct psb_intel_encoder *encoder);
--static void cdv_intel_dp_link_down(struct psb_intel_encoder *encoder);
-+static void cdv_intel_dp_start_link_train(struct gma_encoder *encoder);
-+static void cdv_intel_dp_complete_link_train(struct gma_encoder *encoder);
-+static void cdv_intel_dp_link_down(struct gma_encoder *encoder);
- 
- static int
--cdv_intel_dp_max_lane_count(struct psb_intel_encoder *encoder)
-+cdv_intel_dp_max_lane_count(struct gma_encoder *encoder)
- {
- 	struct cdv_intel_dp *intel_dp = encoder->dev_priv;
- 	int max_lane_count = 4;
-@@ -144,7 +144,7 @@ cdv_intel_dp_max_lane_count(struct psb_i
- }
- 
- static int
--cdv_intel_dp_max_link_bw(struct psb_intel_encoder *encoder)
-+cdv_intel_dp_max_link_bw(struct gma_encoder *encoder)
- {
- 	struct cdv_intel_dp *intel_dp = encoder->dev_priv;
- 	int max_link_bw = intel_dp->dpcd[DP_MAX_LINK_RATE];
-@@ -181,7 +181,7 @@ cdv_intel_dp_max_data_rate(int max_link_
- 	return (max_link_clock * max_lanes * 19) / 20;
- }
- 
--static void cdv_intel_edp_panel_vdd_on(struct psb_intel_encoder *intel_encoder)
-+static void cdv_intel_edp_panel_vdd_on(struct gma_encoder *intel_encoder)
- {
- 	struct drm_device *dev = intel_encoder->base.dev;
- 	struct cdv_intel_dp *intel_dp = intel_encoder->dev_priv;
-@@ -201,7 +201,7 @@ static void cdv_intel_edp_panel_vdd_on(s
- 	msleep(intel_dp->panel_power_up_delay);
- }
- 
--static void cdv_intel_edp_panel_vdd_off(struct psb_intel_encoder *intel_encoder)
-+static void cdv_intel_edp_panel_vdd_off(struct gma_encoder *intel_encoder)
- {
- 	struct drm_device *dev = intel_encoder->base.dev;
- 	u32 pp;
-@@ -216,7 +216,7 @@ static void cdv_intel_edp_panel_vdd_off(
- }
- 
- /* Returns true if the panel was already on when called */
--static bool cdv_intel_edp_panel_on(struct psb_intel_encoder *intel_encoder)
-+static bool cdv_intel_edp_panel_on(struct gma_encoder *intel_encoder)
- {
- 	struct drm_device *dev = intel_encoder->base.dev;
- 	struct cdv_intel_dp *intel_dp = intel_encoder->dev_priv;
-@@ -243,7 +243,7 @@ static bool cdv_intel_edp_panel_on(struc
- 	return false;
- }
- 
--static void cdv_intel_edp_panel_off (struct psb_intel_encoder *intel_encoder)
-+static void cdv_intel_edp_panel_off (struct gma_encoder *intel_encoder)
- {
- 	struct drm_device *dev = intel_encoder->base.dev;
- 	u32 pp, idle_off_mask = PP_ON ;
-@@ -275,7 +275,7 @@ static void cdv_intel_edp_panel_off (str
- 	DRM_DEBUG_KMS("Over\n");
- }
- 
--static void cdv_intel_edp_backlight_on (struct psb_intel_encoder *intel_encoder)
-+static void cdv_intel_edp_backlight_on (struct gma_encoder *intel_encoder)
- {
- 	struct drm_device *dev = intel_encoder->base.dev;
- 	u32 pp;
-@@ -295,7 +295,7 @@ static void cdv_intel_edp_backlight_on (
- 	gma_backlight_enable(dev);
- }
- 
--static void cdv_intel_edp_backlight_off (struct psb_intel_encoder *intel_encoder)
-+static void cdv_intel_edp_backlight_off (struct gma_encoder *intel_encoder)
- {
- 	struct drm_device *dev = intel_encoder->base.dev;
- 	struct cdv_intel_dp *intel_dp = intel_encoder->dev_priv;
-@@ -315,7 +315,7 @@ static int
- cdv_intel_dp_mode_valid(struct drm_connector *connector,
- 		    struct drm_display_mode *mode)
- {
--	struct psb_intel_encoder *encoder = gma_attached_encoder(connector);
-+	struct gma_encoder *encoder = gma_attached_encoder(connector);
- 	struct cdv_intel_dp *intel_dp = encoder->dev_priv;
- 	int max_link_clock = cdv_intel_dp_link_clock(cdv_intel_dp_max_link_bw(encoder));
- 	int max_lanes = cdv_intel_dp_max_lane_count(encoder);
-@@ -371,7 +371,7 @@ unpack_aux(uint32_t src, uint8_t *dst, i
- }
- 
- static int
--cdv_intel_dp_aux_ch(struct psb_intel_encoder *encoder,
-+cdv_intel_dp_aux_ch(struct gma_encoder *encoder,
- 		uint8_t *send, int send_bytes,
- 		uint8_t *recv, int recv_size)
- {
-@@ -473,7 +473,7 @@ cdv_intel_dp_aux_ch(struct psb_intel_enc
- 
- /* Write data to the aux channel in native mode */
- static int
--cdv_intel_dp_aux_native_write(struct psb_intel_encoder *encoder,
-+cdv_intel_dp_aux_native_write(struct gma_encoder *encoder,
- 			  uint16_t address, uint8_t *send, int send_bytes)
- {
- 	int ret;
-@@ -505,7 +505,7 @@ cdv_intel_dp_aux_native_write(struct psb
- 
- /* Write a single byte to the aux channel in native mode */
- static int
--cdv_intel_dp_aux_native_write_1(struct psb_intel_encoder *encoder,
-+cdv_intel_dp_aux_native_write_1(struct gma_encoder *encoder,
- 			    uint16_t address, uint8_t byte)
- {
- 	return cdv_intel_dp_aux_native_write(encoder, address, &byte, 1);
-@@ -513,7 +513,7 @@ cdv_intel_dp_aux_native_write_1(struct p
- 
- /* read bytes from a native aux channel */
- static int
--cdv_intel_dp_aux_native_read(struct psb_intel_encoder *encoder,
-+cdv_intel_dp_aux_native_read(struct gma_encoder *encoder,
- 			 uint16_t address, uint8_t *recv, int recv_bytes)
- {
- 	uint8_t msg[4];
-@@ -558,7 +558,7 @@ cdv_intel_dp_i2c_aux_ch(struct i2c_adapt
- 	struct cdv_intel_dp *intel_dp = container_of(adapter,
- 						struct cdv_intel_dp,
- 						adapter);
--	struct psb_intel_encoder *encoder = intel_dp->encoder;
-+	struct gma_encoder *encoder = intel_dp->encoder;
- 	uint16_t address = algo_data->address;
- 	uint8_t msg[5];
- 	uint8_t reply[2];
-@@ -648,7 +648,8 @@ cdv_intel_dp_i2c_aux_ch(struct i2c_adapt
- }
- 
- static int
--cdv_intel_dp_i2c_init(struct gma_connector *connector, struct psb_intel_encoder *encoder, const char *name)
-+cdv_intel_dp_i2c_init(struct gma_connector *connector,
-+		      struct gma_encoder *encoder, const char *name)
- {
- 	struct cdv_intel_dp *intel_dp = encoder->dev_priv;
- 	int ret;
-@@ -699,7 +700,7 @@ cdv_intel_dp_mode_fixup(struct drm_encod
- 		    struct drm_display_mode *adjusted_mode)
- {
- 	struct drm_psb_private *dev_priv = encoder->dev->dev_private;
--	struct psb_intel_encoder *intel_encoder = to_psb_intel_encoder(encoder);
-+	struct gma_encoder *intel_encoder = to_gma_encoder(encoder);
- 	struct cdv_intel_dp *intel_dp = intel_encoder->dev_priv;
- 	int lane_count, clock;
- 	int max_lane_count = cdv_intel_dp_max_lane_count(intel_encoder);
-@@ -802,13 +803,13 @@ cdv_intel_dp_set_m_n(struct drm_crtc *cr
- 	 * Find the lane count in the intel_encoder private
- 	 */
- 	list_for_each_entry(encoder, &mode_config->encoder_list, head) {
--		struct psb_intel_encoder *intel_encoder;
-+		struct gma_encoder *intel_encoder;
- 		struct cdv_intel_dp *intel_dp;
- 
- 		if (encoder->crtc != crtc)
- 			continue;
- 
--		intel_encoder = to_psb_intel_encoder(encoder);
-+		intel_encoder = to_gma_encoder(encoder);
- 		intel_dp = intel_encoder->dev_priv;
- 		if (intel_encoder->type == INTEL_OUTPUT_DISPLAYPORT) {
- 			lane_count = intel_dp->lane_count;
-@@ -842,7 +843,7 @@ static void
- cdv_intel_dp_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
- 		  struct drm_display_mode *adjusted_mode)
- {
--	struct psb_intel_encoder *intel_encoder = to_psb_intel_encoder(encoder);
-+	struct gma_encoder *intel_encoder = to_gma_encoder(encoder);
- 	struct drm_crtc *crtc = encoder->crtc;
- 	struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
- 	struct cdv_intel_dp *intel_dp = intel_encoder->dev_priv;
-@@ -909,7 +910,7 @@ cdv_intel_dp_mode_set(struct drm_encoder
- 
- 
- /* If the sink supports it, try to set the power state appropriately */
--static void cdv_intel_dp_sink_dpms(struct psb_intel_encoder *encoder, int mode)
-+static void cdv_intel_dp_sink_dpms(struct gma_encoder *encoder, int mode)
- {
- 	struct cdv_intel_dp *intel_dp = encoder->dev_priv;
- 	int ret, i;
-@@ -941,7 +942,7 @@ static void cdv_intel_dp_sink_dpms(struc
- 
- static void cdv_intel_dp_prepare(struct drm_encoder *encoder)
- {
--	struct psb_intel_encoder *intel_encoder = to_psb_intel_encoder(encoder);
-+	struct gma_encoder *intel_encoder = to_gma_encoder(encoder);
- 	int edp = is_edp(intel_encoder);
- 
- 	if (edp) {
-@@ -958,7 +959,7 @@ static void cdv_intel_dp_prepare(struct
- 
- static void cdv_intel_dp_commit(struct drm_encoder *encoder)
- {
--	struct psb_intel_encoder *intel_encoder = to_psb_intel_encoder(encoder);
-+	struct gma_encoder *intel_encoder = to_gma_encoder(encoder);
- 	int edp = is_edp(intel_encoder);
- 
- 	if (edp)
-@@ -972,7 +973,7 @@ static void cdv_intel_dp_commit(struct d
- static void
- cdv_intel_dp_dpms(struct drm_encoder *encoder, int mode)
- {
--	struct psb_intel_encoder *intel_encoder = to_psb_intel_encoder(encoder);
-+	struct gma_encoder *intel_encoder = to_gma_encoder(encoder);
- 	struct cdv_intel_dp *intel_dp = intel_encoder->dev_priv;
- 	struct drm_device *dev = encoder->dev;
- 	uint32_t dp_reg = REG_READ(intel_dp->output_reg);
-@@ -1007,7 +1008,7 @@ cdv_intel_dp_dpms(struct drm_encoder *en
-  * cases where the sink may still be asleep.
-  */
- static bool
--cdv_intel_dp_aux_native_read_retry(struct psb_intel_encoder *encoder, uint16_t address,
-+cdv_intel_dp_aux_native_read_retry(struct gma_encoder *encoder, uint16_t address,
- 			       uint8_t *recv, int recv_bytes)
- {
- 	int ret, i;
-@@ -1032,7 +1033,7 @@ cdv_intel_dp_aux_native_read_retry(struc
-  * link status information
-  */
- static bool
--cdv_intel_dp_get_link_status(struct psb_intel_encoder *encoder)
-+cdv_intel_dp_get_link_status(struct gma_encoder *encoder)
- {
- 	struct cdv_intel_dp *intel_dp = encoder->dev_priv;
- 	return cdv_intel_dp_aux_native_read_retry(encoder,
-@@ -1106,7 +1107,7 @@ cdv_intel_dp_pre_emphasis_max(uint8_t vo
- }
- */
- static void
--cdv_intel_get_adjust_train(struct psb_intel_encoder *encoder)
-+cdv_intel_get_adjust_train(struct gma_encoder *encoder)
- {
- 	struct cdv_intel_dp *intel_dp = encoder->dev_priv;
- 	uint8_t v = 0;
-@@ -1165,7 +1166,7 @@ cdv_intel_clock_recovery_ok(uint8_t link
- 			 DP_LANE_CHANNEL_EQ_DONE|\
- 			 DP_LANE_SYMBOL_LOCKED)
- static bool
--cdv_intel_channel_eq_ok(struct psb_intel_encoder *encoder)
-+cdv_intel_channel_eq_ok(struct gma_encoder *encoder)
- {
- 	struct cdv_intel_dp *intel_dp = encoder->dev_priv;
- 	uint8_t lane_align;
-@@ -1185,7 +1186,7 @@ cdv_intel_channel_eq_ok(struct psb_intel
- }
- 
- static bool
--cdv_intel_dp_set_link_train(struct psb_intel_encoder *encoder,
-+cdv_intel_dp_set_link_train(struct gma_encoder *encoder,
- 			uint32_t dp_reg_value,
- 			uint8_t dp_train_pat)
- {
-@@ -1212,7 +1213,7 @@ cdv_intel_dp_set_link_train(struct psb_i
- 
- 
- static bool
--cdv_intel_dplink_set_level(struct psb_intel_encoder *encoder,
-+cdv_intel_dplink_set_level(struct gma_encoder *encoder,
- 			uint8_t dp_train_pat)
- {
- 	
-@@ -1233,7 +1234,7 @@ cdv_intel_dplink_set_level(struct psb_in
- }
- 
- static void
--cdv_intel_dp_set_vswing_premph(struct psb_intel_encoder *encoder, uint8_t signal_level)
-+cdv_intel_dp_set_vswing_premph(struct gma_encoder *encoder, uint8_t signal_level)
- {
- 	struct drm_device *dev = encoder->base.dev;
- 	struct cdv_intel_dp *intel_dp = encoder->dev_priv;
-@@ -1299,7 +1300,7 @@ cdv_intel_dp_set_vswing_premph(struct ps
- 
- /* Enable corresponding port and start training pattern 1 */
- static void
--cdv_intel_dp_start_link_train(struct psb_intel_encoder *encoder)
-+cdv_intel_dp_start_link_train(struct gma_encoder *encoder)
- {
- 	struct drm_device *dev = encoder->base.dev;
- 	struct cdv_intel_dp *intel_dp = encoder->dev_priv;
-@@ -1393,7 +1394,7 @@ cdv_intel_dp_start_link_train(struct psb
- }
- 
- static void
--cdv_intel_dp_complete_link_train(struct psb_intel_encoder *encoder)
-+cdv_intel_dp_complete_link_train(struct gma_encoder *encoder)
- {
- 	struct drm_device *dev = encoder->base.dev;
- 	struct cdv_intel_dp *intel_dp = encoder->dev_priv;
-@@ -1479,7 +1480,7 @@ cdv_intel_dp_complete_link_train(struct
- }
- 
- static void
--cdv_intel_dp_link_down(struct psb_intel_encoder *encoder)
-+cdv_intel_dp_link_down(struct gma_encoder *encoder)
- {
- 	struct drm_device *dev = encoder->base.dev;
- 	struct cdv_intel_dp *intel_dp = encoder->dev_priv;
-@@ -1503,8 +1504,7 @@ cdv_intel_dp_link_down(struct psb_intel_
- 	REG_READ(intel_dp->output_reg);
- }
- 
--static enum drm_connector_status
--cdv_dp_detect(struct psb_intel_encoder *encoder)
-+static enum drm_connector_status cdv_dp_detect(struct gma_encoder *encoder)
- {
- 	struct cdv_intel_dp *intel_dp = encoder->dev_priv;
- 	enum drm_connector_status status;
-@@ -1532,7 +1532,7 @@ cdv_dp_detect(struct psb_intel_encoder *
- static enum drm_connector_status
- cdv_intel_dp_detect(struct drm_connector *connector, bool force)
- {
--	struct psb_intel_encoder *encoder = gma_attached_encoder(connector);
-+	struct gma_encoder *encoder = gma_attached_encoder(connector);
- 	struct cdv_intel_dp *intel_dp = encoder->dev_priv;
- 	enum drm_connector_status status;
- 	struct edid *edid = NULL;
-@@ -1566,8 +1566,7 @@ cdv_intel_dp_detect(struct drm_connector
- 
- static int cdv_intel_dp_get_modes(struct drm_connector *connector)
- {
--	struct psb_intel_encoder *intel_encoder =
--						gma_attached_encoder(connector);
-+	struct gma_encoder *intel_encoder = gma_attached_encoder(connector);
- 	struct cdv_intel_dp *intel_dp = intel_encoder->dev_priv;
- 	struct edid *edid = NULL;
- 	int ret = 0;
-@@ -1623,7 +1622,7 @@ static int cdv_intel_dp_get_modes(struct
- static bool
- cdv_intel_dp_detect_audio(struct drm_connector *connector)
- {
--	struct psb_intel_encoder *encoder = gma_attached_encoder(connector);
-+	struct gma_encoder *encoder = gma_attached_encoder(connector);
- 	struct cdv_intel_dp *intel_dp = encoder->dev_priv;
- 	struct edid *edid;
- 	bool has_audio = false;
-@@ -1649,7 +1648,7 @@ cdv_intel_dp_set_property(struct drm_con
- 		      uint64_t val)
- {
- 	struct drm_psb_private *dev_priv = connector->dev->dev_private;
--	struct psb_intel_encoder *encoder = gma_attached_encoder(connector);
-+	struct gma_encoder *encoder = gma_attached_encoder(connector);
- 	struct cdv_intel_dp *intel_dp = encoder->dev_priv;
- 	int ret;
- 
-@@ -1702,11 +1701,10 @@ done:
- static void
- cdv_intel_dp_destroy(struct drm_connector *connector)
- {
--	struct psb_intel_encoder *psb_intel_encoder =
--						gma_attached_encoder(connector);
--	struct cdv_intel_dp *intel_dp = psb_intel_encoder->dev_priv;
-+	struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
-+	struct cdv_intel_dp *intel_dp = gma_encoder->dev_priv;
- 
--	if (is_edp(psb_intel_encoder)) {
-+	if (is_edp(gma_encoder)) {
- 	/*	cdv_intel_panel_destroy_backlight(connector->dev); */
- 		if (intel_dp->panel_fixed_mode) {
- 			kfree(intel_dp->panel_fixed_mode);
-@@ -1802,7 +1800,7 @@ static void cdv_disable_intel_clock_gati
- void
- cdv_intel_dp_init(struct drm_device *dev, struct psb_intel_mode_device *mode_dev, int output_reg)
- {
--	struct psb_intel_encoder *psb_intel_encoder;
-+	struct gma_encoder *gma_encoder;
- 	struct gma_connector *gma_connector;
- 	struct drm_connector *connector;
- 	struct drm_encoder *encoder;
-@@ -1810,8 +1808,8 @@ cdv_intel_dp_init(struct drm_device *dev
- 	const char *name = NULL;
- 	int type = DRM_MODE_CONNECTOR_DisplayPort;
- 
--	psb_intel_encoder = kzalloc(sizeof(struct psb_intel_encoder), GFP_KERNEL);
--	if (!psb_intel_encoder)
-+	gma_encoder = kzalloc(sizeof(struct gma_encoder), GFP_KERNEL);
-+	if (!gma_encoder)
- 		return;
-         gma_connector = kzalloc(sizeof(struct gma_connector), GFP_KERNEL);
-         if (!gma_connector)
-@@ -1824,21 +1822,21 @@ cdv_intel_dp_init(struct drm_device *dev
- 		type = DRM_MODE_CONNECTOR_eDP;
- 
- 	connector = &gma_connector->base;
--	encoder = &psb_intel_encoder->base;
-+	encoder = &gma_encoder->base;
- 
- 	drm_connector_init(dev, connector, &cdv_intel_dp_connector_funcs, type);
- 	drm_encoder_init(dev, encoder, &cdv_intel_dp_enc_funcs, DRM_MODE_ENCODER_TMDS);
- 
--	gma_connector_attach_encoder(gma_connector, psb_intel_encoder);
-+	gma_connector_attach_encoder(gma_connector, gma_encoder);
- 
- 	if (type == DRM_MODE_CONNECTOR_DisplayPort)
--        	psb_intel_encoder->type = INTEL_OUTPUT_DISPLAYPORT;
-+		gma_encoder->type = INTEL_OUTPUT_DISPLAYPORT;
-         else
--		psb_intel_encoder->type = INTEL_OUTPUT_EDP;
-+		gma_encoder->type = INTEL_OUTPUT_EDP;
- 
- 
--	psb_intel_encoder->dev_priv=intel_dp;
--	intel_dp->encoder = psb_intel_encoder;
-+	gma_encoder->dev_priv=intel_dp;
-+	intel_dp->encoder = gma_encoder;
- 	intel_dp->output_reg = output_reg;
- 	
- 	drm_encoder_helper_add(encoder, &cdv_intel_dp_helper_funcs);
-@@ -1854,21 +1852,21 @@ cdv_intel_dp_init(struct drm_device *dev
- 	switch (output_reg) {
- 		case DP_B:
- 			name = "DPDDC-B";
--			psb_intel_encoder->ddi_select = (DP_MASK | DDI0_SELECT);
-+			gma_encoder->ddi_select = (DP_MASK | DDI0_SELECT);
- 			break;
- 		case DP_C:
- 			name = "DPDDC-C";
--			psb_intel_encoder->ddi_select = (DP_MASK | DDI1_SELECT);
-+			gma_encoder->ddi_select = (DP_MASK | DDI1_SELECT);
- 			break;
- 	}
- 
- 	cdv_disable_intel_clock_gating(dev);
- 
--	cdv_intel_dp_i2c_init(gma_connector, psb_intel_encoder, name);
-+	cdv_intel_dp_i2c_init(gma_connector, gma_encoder, name);
-         /* FIXME:fail check */
- 	cdv_intel_dp_add_properties(connector);
- 
--	if (is_edp(psb_intel_encoder)) {
-+	if (is_edp(gma_encoder)) {
- 		int ret;
- 		struct edp_power_seq cur;
-                 u32 pp_on, pp_off, pp_div;
-@@ -1922,11 +1920,11 @@ cdv_intel_dp_init(struct drm_device *dev
-                               intel_dp->backlight_on_delay, intel_dp->backlight_off_delay);
- 
- 
--		cdv_intel_edp_panel_vdd_on(psb_intel_encoder);
--		ret = cdv_intel_dp_aux_native_read(psb_intel_encoder, DP_DPCD_REV,
-+		cdv_intel_edp_panel_vdd_on(gma_encoder);
-+		ret = cdv_intel_dp_aux_native_read(gma_encoder, DP_DPCD_REV,
- 					       intel_dp->dpcd,
- 					       sizeof(intel_dp->dpcd));
--		cdv_intel_edp_panel_vdd_off(psb_intel_encoder);
-+		cdv_intel_edp_panel_vdd_off(gma_encoder);
- 		if (ret == 0) {
- 			/* if this fails, presume the device is a ghost */
- 			DRM_INFO("failed to retrieve link info, disabling eDP\n");
-@@ -1949,5 +1947,5 @@ cdv_intel_dp_init(struct drm_device *dev
- err_priv:
- 	kfree(gma_connector);
- err_connector:
--	kfree(psb_intel_encoder);
-+	kfree(gma_encoder);
- }
---- a/drivers/gpu/drm/gma500/cdv_intel_hdmi.c
-+++ b/drivers/gpu/drm/gma500/cdv_intel_hdmi.c
-@@ -64,8 +64,8 @@ static void cdv_hdmi_mode_set(struct drm
- 			struct drm_display_mode *adjusted_mode)
- {
- 	struct drm_device *dev = encoder->dev;
--	struct psb_intel_encoder *psb_intel_encoder = to_psb_intel_encoder(encoder);
--	struct mid_intel_hdmi_priv *hdmi_priv = psb_intel_encoder->dev_priv;
-+	struct gma_encoder *gma_encoder = to_gma_encoder(encoder);
-+	struct mid_intel_hdmi_priv *hdmi_priv = gma_encoder->dev_priv;
- 	u32 hdmib;
- 	struct drm_crtc *crtc = encoder->crtc;
- 	struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
-@@ -99,9 +99,8 @@ static bool cdv_hdmi_mode_fixup(struct d
- static void cdv_hdmi_dpms(struct drm_encoder *encoder, int mode)
- {
- 	struct drm_device *dev = encoder->dev;
--	struct psb_intel_encoder *psb_intel_encoder =
--						to_psb_intel_encoder(encoder);
--	struct mid_intel_hdmi_priv *hdmi_priv = psb_intel_encoder->dev_priv;
-+	struct gma_encoder *gma_encoder = to_gma_encoder(encoder);
-+	struct mid_intel_hdmi_priv *hdmi_priv = gma_encoder->dev_priv;
- 	u32 hdmib;
- 
- 	hdmib = REG_READ(hdmi_priv->hdmi_reg);
-@@ -116,9 +115,8 @@ static void cdv_hdmi_dpms(struct drm_enc
- static void cdv_hdmi_save(struct drm_connector *connector)
- {
- 	struct drm_device *dev = connector->dev;
--	struct psb_intel_encoder *psb_intel_encoder =
--						gma_attached_encoder(connector);
--	struct mid_intel_hdmi_priv *hdmi_priv = psb_intel_encoder->dev_priv;
-+	struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
-+	struct mid_intel_hdmi_priv *hdmi_priv = gma_encoder->dev_priv;
- 
- 	hdmi_priv->save_HDMIB = REG_READ(hdmi_priv->hdmi_reg);
- }
-@@ -126,9 +124,8 @@ static void cdv_hdmi_save(struct drm_con
- static void cdv_hdmi_restore(struct drm_connector *connector)
- {
- 	struct drm_device *dev = connector->dev;
--	struct psb_intel_encoder *psb_intel_encoder =
--						gma_attached_encoder(connector);
--	struct mid_intel_hdmi_priv *hdmi_priv = psb_intel_encoder->dev_priv;
-+	struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
-+	struct mid_intel_hdmi_priv *hdmi_priv = gma_encoder->dev_priv;
- 
- 	REG_WRITE(hdmi_priv->hdmi_reg, hdmi_priv->save_HDMIB);
- 	REG_READ(hdmi_priv->hdmi_reg);
-@@ -137,13 +134,12 @@ static void cdv_hdmi_restore(struct drm_
- static enum drm_connector_status cdv_hdmi_detect(
- 				struct drm_connector *connector, bool force)
- {
--	struct psb_intel_encoder *psb_intel_encoder =
--						gma_attached_encoder(connector);
--	struct mid_intel_hdmi_priv *hdmi_priv = psb_intel_encoder->dev_priv;
-+	struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
-+	struct mid_intel_hdmi_priv *hdmi_priv = gma_encoder->dev_priv;
- 	struct edid *edid = NULL;
- 	enum drm_connector_status status = connector_status_disconnected;
- 
--	edid = drm_get_edid(connector, &psb_intel_encoder->i2c_bus->adapter);
-+	edid = drm_get_edid(connector, &gma_encoder->i2c_bus->adapter);
- 
- 	hdmi_priv->has_hdmi_sink = false;
- 	hdmi_priv->has_hdmi_audio = false;
-@@ -221,12 +217,11 @@ static int cdv_hdmi_set_property(struct
-  */
- static int cdv_hdmi_get_modes(struct drm_connector *connector)
- {
--	struct psb_intel_encoder *psb_intel_encoder =
--						gma_attached_encoder(connector);
-+	struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
- 	struct edid *edid = NULL;
- 	int ret = 0;
- 
--	edid = drm_get_edid(connector, &psb_intel_encoder->i2c_bus->adapter);
-+	edid = drm_get_edid(connector, &gma_encoder->i2c_bus->adapter);
- 	if (edid) {
- 		drm_mode_connector_update_edid_property(connector, edid);
- 		ret = drm_add_edid_modes(connector, edid);
-@@ -256,11 +251,10 @@ static int cdv_hdmi_mode_valid(struct dr
- 
- static void cdv_hdmi_destroy(struct drm_connector *connector)
- {
--	struct psb_intel_encoder *psb_intel_encoder =
--						gma_attached_encoder(connector);
-+	struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
- 
--	if (psb_intel_encoder->i2c_bus)
--		psb_intel_i2c_destroy(psb_intel_encoder->i2c_bus);
-+	if (gma_encoder->i2c_bus)
-+		psb_intel_i2c_destroy(gma_encoder->i2c_bus);
- 	drm_sysfs_connector_remove(connector);
- 	drm_connector_cleanup(connector);
- 	kfree(connector);
-@@ -294,17 +288,16 @@ static const struct drm_connector_funcs
- void cdv_hdmi_init(struct drm_device *dev,
- 			struct psb_intel_mode_device *mode_dev, int reg)
- {
--	struct psb_intel_encoder *psb_intel_encoder;
-+	struct gma_encoder *gma_encoder;
- 	struct gma_connector *gma_connector;
- 	struct drm_connector *connector;
- 	struct drm_encoder *encoder;
- 	struct mid_intel_hdmi_priv *hdmi_priv;
- 	int ddc_bus;
- 
--	psb_intel_encoder = kzalloc(sizeof(struct psb_intel_encoder),
--				    GFP_KERNEL);
-+	gma_encoder = kzalloc(sizeof(struct gma_encoder), GFP_KERNEL);
- 
--	if (!psb_intel_encoder)
-+	if (!gma_encoder)
- 		return;
- 
- 	gma_connector = kzalloc(sizeof(struct gma_connector),
-@@ -320,7 +313,7 @@ void cdv_hdmi_init(struct drm_device *de
- 
- 	connector = &gma_connector->base;
- 	connector->polled = DRM_CONNECTOR_POLL_HPD;
--	encoder = &psb_intel_encoder->base;
-+	encoder = &gma_encoder->base;
- 	drm_connector_init(dev, connector,
- 			   &cdv_hdmi_connector_funcs,
- 			   DRM_MODE_CONNECTOR_DVID);
-@@ -328,11 +321,11 @@ void cdv_hdmi_init(struct drm_device *de
- 	drm_encoder_init(dev, encoder, &psb_intel_lvds_enc_funcs,
- 			 DRM_MODE_ENCODER_TMDS);
- 
--	gma_connector_attach_encoder(gma_connector, psb_intel_encoder);
--	psb_intel_encoder->type = INTEL_OUTPUT_HDMI;
-+	gma_connector_attach_encoder(gma_connector, gma_encoder);
-+	gma_encoder->type = INTEL_OUTPUT_HDMI;
- 	hdmi_priv->hdmi_reg = reg;
- 	hdmi_priv->has_hdmi_sink = false;
--	psb_intel_encoder->dev_priv = hdmi_priv;
-+	gma_encoder->dev_priv = hdmi_priv;
- 
- 	drm_encoder_helper_add(encoder, &cdv_hdmi_helper_funcs);
- 	drm_connector_helper_add(connector,
-@@ -348,11 +341,11 @@ void cdv_hdmi_init(struct drm_device *de
- 	switch (reg) {
- 	case SDVOB:
- 		ddc_bus = GPIOE;
--		psb_intel_encoder->ddi_select = DDI0_SELECT;
-+		gma_encoder->ddi_select = DDI0_SELECT;
- 		break;
- 	case SDVOC:
- 		ddc_bus = GPIOD;
--		psb_intel_encoder->ddi_select = DDI1_SELECT;
-+		gma_encoder->ddi_select = DDI1_SELECT;
- 		break;
- 	default:
- 		DRM_ERROR("unknown reg 0x%x for HDMI\n", reg);
-@@ -360,16 +353,15 @@ void cdv_hdmi_init(struct drm_device *de
- 		break;
- 	}
- 
--	psb_intel_encoder->i2c_bus = psb_intel_i2c_create(dev,
-+	gma_encoder->i2c_bus = psb_intel_i2c_create(dev,
- 				ddc_bus, (reg == SDVOB) ? "HDMIB" : "HDMIC");
- 
--	if (!psb_intel_encoder->i2c_bus) {
-+	if (!gma_encoder->i2c_bus) {
- 		dev_err(dev->dev, "No ddc adapter available!\n");
- 		goto failed_ddc;
- 	}
- 
--	hdmi_priv->hdmi_i2c_adapter =
--				&(psb_intel_encoder->i2c_bus->adapter);
-+	hdmi_priv->hdmi_i2c_adapter = &(gma_encoder->i2c_bus->adapter);
- 	hdmi_priv->dev = dev;
- 	drm_sysfs_connector_add(connector);
- 	return;
-@@ -380,5 +372,5 @@ failed_ddc:
- err_priv:
- 	kfree(gma_connector);
- err_connector:
--	kfree(psb_intel_encoder);
-+	kfree(gma_encoder);
- }
---- a/drivers/gpu/drm/gma500/cdv_intel_lvds.c
-+++ b/drivers/gpu/drm/gma500/cdv_intel_lvds.c
-@@ -406,12 +406,11 @@ static int cdv_intel_lvds_get_modes(stru
- {
- 	struct drm_device *dev = connector->dev;
- 	struct drm_psb_private *dev_priv = dev->dev_private;
--	struct psb_intel_encoder *psb_intel_encoder =
--						gma_attached_encoder(connector);
-+	struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
- 	struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
- 	int ret;
- 
--	ret = psb_intel_ddc_get_modes(connector, &psb_intel_encoder->i2c_bus->adapter);
-+	ret = psb_intel_ddc_get_modes(connector, &gma_encoder->i2c_bus->adapter);
- 
- 	if (ret)
- 		return ret;
-@@ -443,11 +442,10 @@ static int cdv_intel_lvds_get_modes(stru
-  */
- static void cdv_intel_lvds_destroy(struct drm_connector *connector)
- {
--	struct psb_intel_encoder *psb_intel_encoder =
--						gma_attached_encoder(connector);
-+	struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
- 
--	if (psb_intel_encoder->i2c_bus)
--		psb_intel_i2c_destroy(psb_intel_encoder->i2c_bus);
-+	if (gma_encoder->i2c_bus)
-+		psb_intel_i2c_destroy(gma_encoder->i2c_bus);
- 	drm_sysfs_connector_remove(connector);
- 	drm_connector_cleanup(connector);
- 	kfree(connector);
-@@ -610,7 +608,7 @@ static bool lvds_is_present_in_vbt(struc
- void cdv_intel_lvds_init(struct drm_device *dev,
- 		     struct psb_intel_mode_device *mode_dev)
- {
--	struct psb_intel_encoder *psb_intel_encoder;
-+	struct gma_encoder *gma_encoder;
- 	struct gma_connector *gma_connector;
- 	struct cdv_intel_lvds_priv *lvds_priv;
- 	struct drm_connector *connector;
-@@ -628,9 +626,9 @@ void cdv_intel_lvds_init(struct drm_devi
- 		return;
- 	}
- 
--	psb_intel_encoder = kzalloc(sizeof(struct psb_intel_encoder),
-+	gma_encoder = kzalloc(sizeof(struct gma_encoder),
- 				    GFP_KERNEL);
--	if (!psb_intel_encoder)
-+	if (!gma_encoder)
- 		return;
- 
- 	gma_connector = kzalloc(sizeof(struct gma_connector),
-@@ -642,10 +640,10 @@ void cdv_intel_lvds_init(struct drm_devi
- 	if (!lvds_priv)
- 		goto failed_lvds_priv;
- 
--	psb_intel_encoder->dev_priv = lvds_priv;
-+	gma_encoder->dev_priv = lvds_priv;
- 
- 	connector = &gma_connector->base;
--	encoder = &psb_intel_encoder->base;
-+	encoder = &gma_encoder->base;
- 
- 
- 	drm_connector_init(dev, connector,
-@@ -657,8 +655,8 @@ void cdv_intel_lvds_init(struct drm_devi
- 			 DRM_MODE_ENCODER_LVDS);
- 
- 
--	gma_connector_attach_encoder(gma_connector, psb_intel_encoder);
--	psb_intel_encoder->type = INTEL_OUTPUT_LVDS;
-+	gma_connector_attach_encoder(gma_connector, gma_encoder);
-+	gma_encoder->type = INTEL_OUTPUT_LVDS;
- 
- 	drm_encoder_helper_add(encoder, &cdv_intel_lvds_helper_funcs);
- 	drm_connector_helper_add(connector,
-@@ -679,16 +677,16 @@ void cdv_intel_lvds_init(struct drm_devi
- 	 * Set up I2C bus
- 	 * FIXME: distroy i2c_bus when exit
- 	 */
--	psb_intel_encoder->i2c_bus = psb_intel_i2c_create(dev,
-+	gma_encoder->i2c_bus = psb_intel_i2c_create(dev,
- 							 GPIOB,
- 							 "LVDSBLC_B");
--	if (!psb_intel_encoder->i2c_bus) {
-+	if (!gma_encoder->i2c_bus) {
- 		dev_printk(KERN_ERR,
- 			&dev->pdev->dev, "I2C bus registration failed.\n");
- 		goto failed_blc_i2c;
- 	}
--	psb_intel_encoder->i2c_bus->slave_addr = 0x2C;
--	dev_priv->lvds_i2c_bus = psb_intel_encoder->i2c_bus;
-+	gma_encoder->i2c_bus->slave_addr = 0x2C;
-+	dev_priv->lvds_i2c_bus = gma_encoder->i2c_bus;
- 
- 	/*
- 	 * LVDS discovery:
-@@ -701,10 +699,10 @@ void cdv_intel_lvds_init(struct drm_devi
- 	 */
- 
- 	/* Set up the DDC bus. */
--	psb_intel_encoder->ddc_bus = psb_intel_i2c_create(dev,
-+	gma_encoder->ddc_bus = psb_intel_i2c_create(dev,
- 							 GPIOC,
- 							 "LVDSDDC_C");
--	if (!psb_intel_encoder->ddc_bus) {
-+	if (!gma_encoder->ddc_bus) {
- 		dev_printk(KERN_ERR, &dev->pdev->dev,
- 			   "DDC bus registration " "failed.\n");
- 		goto failed_ddc;
-@@ -715,7 +713,7 @@ void cdv_intel_lvds_init(struct drm_devi
- 	 * preferred mode is the right one.
- 	 */
- 	psb_intel_ddc_get_modes(connector,
--				&psb_intel_encoder->ddc_bus->adapter);
-+				&gma_encoder->ddc_bus->adapter);
- 	list_for_each_entry(scan, &connector->probed_modes, head) {
- 		if (scan->type & DRM_MODE_TYPE_PREFERRED) {
- 			mode_dev->panel_fixed_mode =
-@@ -779,12 +777,12 @@ out:
- 
- failed_find:
- 	printk(KERN_ERR "Failed find\n");
--	if (psb_intel_encoder->ddc_bus)
--		psb_intel_i2c_destroy(psb_intel_encoder->ddc_bus);
-+	if (gma_encoder->ddc_bus)
-+		psb_intel_i2c_destroy(gma_encoder->ddc_bus);
- failed_ddc:
- 	printk(KERN_ERR "Failed DDC\n");
--	if (psb_intel_encoder->i2c_bus)
--		psb_intel_i2c_destroy(psb_intel_encoder->i2c_bus);
-+	if (gma_encoder->i2c_bus)
-+		psb_intel_i2c_destroy(gma_encoder->i2c_bus);
- failed_blc_i2c:
- 	printk(KERN_ERR "Failed BLC\n");
- 	drm_encoder_cleanup(encoder);
-@@ -793,5 +791,5 @@ failed_blc_i2c:
- failed_lvds_priv:
- 	kfree(gma_connector);
- failed_connector:
--	kfree(psb_intel_encoder);
-+	kfree(gma_encoder);
- }
---- a/drivers/gpu/drm/gma500/framebuffer.c
-+++ b/drivers/gpu/drm/gma500/framebuffer.c
-@@ -703,13 +703,12 @@ static void psb_setup_outputs(struct drm
- 
- 	list_for_each_entry(connector, &dev->mode_config.connector_list,
- 			    head) {
--		struct psb_intel_encoder *psb_intel_encoder =
--						gma_attached_encoder(connector);
--		struct drm_encoder *encoder = &psb_intel_encoder->base;
-+		struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
-+		struct drm_encoder *encoder = &gma_encoder->base;
- 		int crtc_mask = 0, clone_mask = 0;
- 
- 		/* valid crtcs */
--		switch (psb_intel_encoder->type) {
-+		switch (gma_encoder->type) {
- 		case INTEL_OUTPUT_ANALOG:
- 			crtc_mask = (1 << 0);
- 			clone_mask = (1 << INTEL_OUTPUT_ANALOG);
---- a/drivers/gpu/drm/gma500/gma_display.c
-+++ b/drivers/gpu/drm/gma500/gma_display.c
-@@ -37,9 +37,9 @@ bool gma_pipe_has_type(struct drm_crtc *
- 
- 	list_for_each_entry(l_entry, &mode_config->connector_list, head) {
- 		if (l_entry->encoder && l_entry->encoder->crtc == crtc) {
--			struct psb_intel_encoder *psb_intel_encoder =
-+			struct gma_encoder *gma_encoder =
- 						gma_attached_encoder(l_entry);
--			if (psb_intel_encoder->type == type)
-+			if (gma_encoder->type == type)
- 				return true;
- 		}
- 	}
-@@ -657,7 +657,7 @@ void gma_encoder_commit(struct drm_encod
- 
- void gma_encoder_destroy(struct drm_encoder *encoder)
- {
--	struct psb_intel_encoder *intel_encoder = to_psb_intel_encoder(encoder);
-+	struct gma_encoder *intel_encoder = to_gma_encoder(encoder);
- 
- 	drm_encoder_cleanup(encoder);
- 	kfree(intel_encoder);
-@@ -666,14 +666,13 @@ void gma_encoder_destroy(struct drm_enco
- /* Currently there is only a 1:1 mapping of encoders and connectors */
- struct drm_encoder *gma_best_encoder(struct drm_connector *connector)
- {
--	struct psb_intel_encoder *psb_intel_encoder =
--						gma_attached_encoder(connector);
-+	struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
- 
--	return &psb_intel_encoder->base;
-+	return &gma_encoder->base;
- }
- 
- void gma_connector_attach_encoder(struct gma_connector *connector,
--				  struct psb_intel_encoder *encoder)
-+				  struct gma_encoder *encoder)
- {
- 	connector->encoder = encoder;
- 	drm_mode_connector_attach_encoder(&connector->base,
---- a/drivers/gpu/drm/gma500/mdfld_dsi_output.h
-+++ b/drivers/gpu/drm/gma500/mdfld_dsi_output.h
-@@ -238,7 +238,7 @@ struct mdfld_dsi_connector {
- };
- 
- struct mdfld_dsi_encoder {
--	struct psb_intel_encoder base;
-+	struct gma_encoder base;
- 	void *private;
- };
- 
-@@ -279,11 +279,11 @@ static inline struct mdfld_dsi_connector
- static inline struct mdfld_dsi_encoder *mdfld_dsi_encoder(
- 		struct drm_encoder *encoder)
- {
--	struct psb_intel_encoder *psb_encoder;
-+	struct gma_encoder *gma_encoder;
- 
--	psb_encoder = to_psb_intel_encoder(encoder);
-+	gma_encoder = to_gma_encoder(encoder);
- 
--	return container_of(psb_encoder, struct mdfld_dsi_encoder, base);
-+	return container_of(gma_encoder, struct mdfld_dsi_encoder, base);
- }
- 
- static inline struct mdfld_dsi_config *
---- a/drivers/gpu/drm/gma500/mdfld_intel_display.c
-+++ b/drivers/gpu/drm/gma500/mdfld_intel_display.c
-@@ -681,7 +681,7 @@ static int mdfld_crtc_mode_set(struct dr
- 	u32 dpll = 0, fp = 0;
- 	bool is_mipi = false, is_mipi2 = false, is_hdmi = false;
- 	struct drm_mode_config *mode_config = &dev->mode_config;
--	struct psb_intel_encoder *psb_intel_encoder = NULL;
-+	struct gma_encoder *gma_encoder = NULL;
- 	uint64_t scalingType = DRM_MODE_SCALE_FULLSCREEN;
- 	struct drm_encoder *encoder;
- 	struct drm_connector *connector;
-@@ -747,9 +747,9 @@ static int mdfld_crtc_mode_set(struct dr
- 		if (encoder->crtc != crtc)
- 			continue;
- 
--		psb_intel_encoder = gma_attached_encoder(connector);
-+		gma_encoder = gma_attached_encoder(connector);
- 
--		switch (psb_intel_encoder->type) {
-+		switch (gma_encoder->type) {
- 		case INTEL_OUTPUT_MIPI:
- 			is_mipi = true;
- 			break;
-@@ -800,7 +800,7 @@ static int mdfld_crtc_mode_set(struct dr
- 
- 	REG_WRITE(map->pos, 0);
- 
--	if (psb_intel_encoder)
-+	if (gma_encoder)
- 		drm_object_property_get_value(&connector->base,
- 			dev->mode_config.scaling_mode_property, &scalingType);
- 
---- a/drivers/gpu/drm/gma500/oaktrail_crtc.c
-+++ b/drivers/gpu/drm/gma500/oaktrail_crtc.c
-@@ -303,7 +303,7 @@ static int oaktrail_crtc_mode_set(struct
- 	bool is_lvds = false;
- 	bool is_mipi = false;
- 	struct drm_mode_config *mode_config = &dev->mode_config;
--	struct psb_intel_encoder *psb_intel_encoder = NULL;
-+	struct gma_encoder *gma_encoder = NULL;
- 	uint64_t scalingType = DRM_MODE_SCALE_FULLSCREEN;
- 	struct drm_connector *connector;
- 
-@@ -324,9 +324,9 @@ static int oaktrail_crtc_mode_set(struct
- 		if (!connector->encoder || connector->encoder->crtc != crtc)
- 			continue;
- 
--		psb_intel_encoder = gma_attached_encoder(connector);
-+		gma_encoder = gma_attached_encoder(connector);
- 
--		switch (psb_intel_encoder->type) {
-+		switch (gma_encoder->type) {
- 		case INTEL_OUTPUT_LVDS:
- 			is_lvds = true;
- 			break;
-@@ -350,7 +350,7 @@ static int oaktrail_crtc_mode_set(struct
- 		  ((mode->crtc_hdisplay - 1) << 16) |
- 		  (mode->crtc_vdisplay - 1));
- 
--	if (psb_intel_encoder)
-+	if (gma_encoder)
- 		drm_object_property_get_value(&connector->base,
- 			dev->mode_config.scaling_mode_property, &scalingType);
- 
---- a/drivers/gpu/drm/gma500/oaktrail_hdmi.c
-+++ b/drivers/gpu/drm/gma500/oaktrail_hdmi.c
-@@ -640,13 +640,13 @@ static const struct drm_encoder_funcs oa
- void oaktrail_hdmi_init(struct drm_device *dev,
- 					struct psb_intel_mode_device *mode_dev)
- {
--	struct psb_intel_encoder *psb_intel_encoder;
-+	struct gma_encoder *gma_encoder;
- 	struct gma_connector *gma_connector;
- 	struct drm_connector *connector;
- 	struct drm_encoder *encoder;
- 
--	psb_intel_encoder = kzalloc(sizeof(struct psb_intel_encoder), GFP_KERNEL);
--	if (!psb_intel_encoder)
-+	gma_encoder = kzalloc(sizeof(struct gma_encoder), GFP_KERNEL);
-+	if (!gma_encoder)
- 		return;
- 
- 	gma_connector = kzalloc(sizeof(struct gma_connector), GFP_KERNEL);
-@@ -654,7 +654,7 @@ void oaktrail_hdmi_init(struct drm_devic
- 		goto failed_connector;
- 
- 	connector = &gma_connector->base;
--	encoder = &psb_intel_encoder->base;
-+	encoder = &gma_encoder->base;
- 	drm_connector_init(dev, connector,
- 			   &oaktrail_hdmi_connector_funcs,
- 			   DRM_MODE_CONNECTOR_DVID);
-@@ -663,9 +663,9 @@ void oaktrail_hdmi_init(struct drm_devic
- 			 &oaktrail_hdmi_enc_funcs,
- 			 DRM_MODE_ENCODER_TMDS);
- 
--	gma_connector_attach_encoder(gma_connector, psb_intel_encoder);
-+	gma_connector_attach_encoder(gma_connector, gma_encoder);
- 
--	psb_intel_encoder->type = INTEL_OUTPUT_HDMI;
-+	gma_encoder->type = INTEL_OUTPUT_HDMI;
- 	drm_encoder_helper_add(encoder, &oaktrail_hdmi_helper_funcs);
- 	drm_connector_helper_add(connector, &oaktrail_hdmi_connector_helper_funcs);
- 
-@@ -678,7 +678,7 @@ void oaktrail_hdmi_init(struct drm_devic
- 	return;
- 
- failed_connector:
--	kfree(psb_intel_encoder);
-+	kfree(gma_encoder);
- }
- 
- static DEFINE_PCI_DEVICE_TABLE(hdmi_ids) = {
---- a/drivers/gpu/drm/gma500/oaktrail_lvds.c
-+++ b/drivers/gpu/drm/gma500/oaktrail_lvds.c
-@@ -43,7 +43,7 @@
-  * Sets the power state for the panel.
-  */
- static void oaktrail_lvds_set_power(struct drm_device *dev,
--				struct psb_intel_encoder *psb_intel_encoder,
-+				struct gma_encoder *gma_encoder,
- 				bool on)
- {
- 	u32 pp_status;
-@@ -78,13 +78,12 @@ static void oaktrail_lvds_set_power(stru
- static void oaktrail_lvds_dpms(struct drm_encoder *encoder, int mode)
- {
- 	struct drm_device *dev = encoder->dev;
--	struct psb_intel_encoder *psb_intel_encoder =
--						to_psb_intel_encoder(encoder);
-+	struct gma_encoder *gma_encoder = to_gma_encoder(encoder);
- 
- 	if (mode == DRM_MODE_DPMS_ON)
--		oaktrail_lvds_set_power(dev, psb_intel_encoder, true);
-+		oaktrail_lvds_set_power(dev, gma_encoder, true);
- 	else
--		oaktrail_lvds_set_power(dev, psb_intel_encoder, false);
-+		oaktrail_lvds_set_power(dev, gma_encoder, false);
- 
- 	/* XXX: We never power down the LVDS pairs. */
- }
-@@ -166,8 +165,7 @@ static void oaktrail_lvds_prepare(struct
- {
- 	struct drm_device *dev = encoder->dev;
- 	struct drm_psb_private *dev_priv = dev->dev_private;
--	struct psb_intel_encoder *psb_intel_encoder =
--						to_psb_intel_encoder(encoder);
-+	struct gma_encoder *gma_encoder = to_gma_encoder(encoder);
- 	struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
- 
- 	if (!gma_power_begin(dev, true))
-@@ -176,7 +174,7 @@ static void oaktrail_lvds_prepare(struct
- 	mode_dev->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL);
- 	mode_dev->backlight_duty_cycle = (mode_dev->saveBLC_PWM_CTL &
- 					  BACKLIGHT_DUTY_CYCLE_MASK);
--	oaktrail_lvds_set_power(dev, psb_intel_encoder, false);
-+	oaktrail_lvds_set_power(dev, gma_encoder, false);
- 	gma_power_end(dev);
- }
- 
-@@ -203,14 +201,13 @@ static void oaktrail_lvds_commit(struct
- {
- 	struct drm_device *dev = encoder->dev;
- 	struct drm_psb_private *dev_priv = dev->dev_private;
--	struct psb_intel_encoder *psb_intel_encoder =
--						to_psb_intel_encoder(encoder);
-+	struct gma_encoder *gma_encoder = to_gma_encoder(encoder);
- 	struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
- 
- 	if (mode_dev->backlight_duty_cycle == 0)
- 		mode_dev->backlight_duty_cycle =
- 					oaktrail_lvds_get_max_backlight(dev);
--	oaktrail_lvds_set_power(dev, psb_intel_encoder, true);
-+	oaktrail_lvds_set_power(dev, gma_encoder, true);
- }
- 
- static const struct drm_encoder_helper_funcs oaktrail_lvds_helper_funcs = {
-@@ -325,7 +322,7 @@ static void oaktrail_lvds_get_configurat
- void oaktrail_lvds_init(struct drm_device *dev,
- 		    struct psb_intel_mode_device *mode_dev)
- {
--	struct psb_intel_encoder *psb_intel_encoder;
-+	struct gma_encoder *gma_encoder;
- 	struct gma_connector *gma_connector;
- 	struct drm_connector *connector;
- 	struct drm_encoder *encoder;
-@@ -334,8 +331,8 @@ void oaktrail_lvds_init(struct drm_devic
- 	struct i2c_adapter *i2c_adap;
- 	struct drm_display_mode *scan;	/* *modes, *bios_mode; */
- 
--	psb_intel_encoder = kzalloc(sizeof(struct psb_intel_encoder), GFP_KERNEL);
--	if (!psb_intel_encoder)
-+	gma_encoder = kzalloc(sizeof(struct gma_encoder), GFP_KERNEL);
-+	if (!gma_encoder)
- 		return;
- 
- 	gma_connector = kzalloc(sizeof(struct gma_connector), GFP_KERNEL);
-@@ -343,7 +340,7 @@ void oaktrail_lvds_init(struct drm_devic
- 		goto failed_connector;
- 
- 	connector = &gma_connector->base;
--	encoder = &psb_intel_encoder->base;
-+	encoder = &gma_encoder->base;
- 	dev_priv->is_lvds_on = true;
- 	drm_connector_init(dev, connector,
- 			   &psb_intel_lvds_connector_funcs,
-@@ -352,8 +349,8 @@ void oaktrail_lvds_init(struct drm_devic
- 	drm_encoder_init(dev, encoder, &psb_intel_lvds_enc_funcs,
- 			 DRM_MODE_ENCODER_LVDS);
- 
--	gma_connector_attach_encoder(gma_connector, psb_intel_encoder);
--	psb_intel_encoder->type = INTEL_OUTPUT_LVDS;
-+	gma_connector_attach_encoder(gma_connector, gma_encoder);
-+	gma_encoder->type = INTEL_OUTPUT_LVDS;
- 
- 	drm_encoder_helper_add(encoder, &oaktrail_lvds_helper_funcs);
- 	drm_connector_helper_add(connector,
-@@ -433,8 +430,8 @@ out:
- 
- failed_find:
- 	dev_dbg(dev->dev, "No LVDS modes found, disabling.\n");
--	if (psb_intel_encoder->ddc_bus)
--		psb_intel_i2c_destroy(psb_intel_encoder->ddc_bus);
-+	if (gma_encoder->ddc_bus)
-+		psb_intel_i2c_destroy(gma_encoder->ddc_bus);
- 
- /* failed_ddc: */
- 
-@@ -442,6 +439,6 @@ failed_find:
- 	drm_connector_cleanup(connector);
- 	kfree(gma_connector);
- failed_connector:
--	kfree(psb_intel_encoder);
-+	kfree(gma_encoder);
- }
- 
---- a/drivers/gpu/drm/gma500/psb_drv.c
-+++ b/drivers/gpu/drm/gma500/psb_drv.c
-@@ -270,7 +270,7 @@ static int psb_driver_load(struct drm_de
- 	unsigned long irqflags;
- 	int ret = -ENOMEM;
- 	struct drm_connector *connector;
--	struct psb_intel_encoder *psb_intel_encoder;
-+	struct gma_encoder *gma_encoder;
- 
- 	dev_priv = kzalloc(sizeof(*dev_priv), GFP_KERNEL);
- 	if (dev_priv == NULL)
-@@ -372,9 +372,9 @@ static int psb_driver_load(struct drm_de
- 	/* Only add backlight support if we have LVDS output */
- 	list_for_each_entry(connector, &dev->mode_config.connector_list,
- 			    head) {
--		psb_intel_encoder = gma_attached_encoder(connector);
-+		gma_encoder = gma_attached_encoder(connector);
- 
--		switch (psb_intel_encoder->type) {
-+		switch (gma_encoder->type) {
- 		case INTEL_OUTPUT_LVDS:
- 		case INTEL_OUTPUT_MIPI:
- 			ret = gma_backlight_init(dev);
---- a/drivers/gpu/drm/gma500/psb_intel_display.c
-+++ b/drivers/gpu/drm/gma500/psb_intel_display.c
-@@ -126,14 +126,13 @@ static int psb_intel_crtc_mode_set(struc
- 	}
- 
- 	list_for_each_entry(connector, &mode_config->connector_list, head) {
--		struct psb_intel_encoder *psb_intel_encoder =
--						gma_attached_encoder(connector);
-+		struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
- 
- 		if (!connector->encoder
- 		    || connector->encoder->crtc != crtc)
- 			continue;
- 
--		switch (psb_intel_encoder->type) {
-+		switch (gma_encoder->type) {
- 		case INTEL_OUTPUT_LVDS:
- 			is_lvds = true;
- 			break;
-@@ -602,9 +601,8 @@ int gma_connector_clones(struct drm_devi
- 
- 	list_for_each_entry(connector, &dev->mode_config.connector_list,
- 			    head) {
--		struct psb_intel_encoder *psb_intel_encoder =
--						gma_attached_encoder(connector);
--		if (type_mask & (1 << psb_intel_encoder->type))
-+		struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
-+		if (type_mask & (1 << gma_encoder->type))
- 			index_mask |= (1 << entry);
- 		entry++;
- 	}
---- a/drivers/gpu/drm/gma500/psb_intel_drv.h
-+++ b/drivers/gpu/drm/gma500/psb_intel_drv.h
-@@ -117,11 +117,11 @@ struct psb_intel_i2c_chan {
- 	u8 slave_addr;
- };
- 
--struct psb_intel_encoder {
-+struct gma_encoder {
- 	struct drm_encoder base;
- 	int type;
- 	bool needs_tv_clock;
--	void (*hot_plug)(struct psb_intel_encoder *);
-+	void (*hot_plug)(struct gma_encoder *);
- 	int crtc_mask;
- 	int clone_mask;
- 	u32 ddi_select;	/* Channel info */
-@@ -139,7 +139,7 @@ struct psb_intel_encoder {
- 
- struct gma_connector {
- 	struct drm_connector base;
--	struct psb_intel_encoder *encoder;
-+	struct gma_encoder *encoder;
- };
- 
- struct psb_intel_crtc_state {
-@@ -197,8 +197,8 @@ struct gma_crtc {
- 		container_of(x, struct gma_crtc, base)
- #define to_gma_connector(x) \
- 		container_of(x, struct gma_connector, base)
--#define to_psb_intel_encoder(x)	\
--		container_of(x, struct psb_intel_encoder, base)
-+#define to_gma_encoder(x)	\
-+		container_of(x, struct gma_encoder, base)
- #define to_psb_intel_framebuffer(x)	\
- 		container_of(x, struct psb_intel_framebuffer, base)
- 
-@@ -228,9 +228,9 @@ extern void mid_dsi_init(struct drm_devi
- 
- extern struct drm_encoder *gma_best_encoder(struct drm_connector *connector);
- extern void gma_connector_attach_encoder(struct gma_connector *connector,
--					 struct psb_intel_encoder *encoder);
-+					 struct gma_encoder *encoder);
- 
--static inline struct psb_intel_encoder *gma_attached_encoder(
-+static inline struct gma_encoder *gma_attached_encoder(
- 						struct drm_connector *connector)
- {
- 	return to_gma_connector(connector)->encoder;
---- a/drivers/gpu/drm/gma500/psb_intel_lvds.c
-+++ b/drivers/gpu/drm/gma500/psb_intel_lvds.c
-@@ -267,10 +267,9 @@ static void psb_intel_lvds_save(struct d
- 	struct drm_device *dev = connector->dev;
- 	struct drm_psb_private *dev_priv =
- 		(struct drm_psb_private *)dev->dev_private;
--	struct psb_intel_encoder *psb_intel_encoder =
--						gma_attached_encoder(connector);
-+	struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
- 	struct psb_intel_lvds_priv *lvds_priv =
--		(struct psb_intel_lvds_priv *)psb_intel_encoder->dev_priv;
-+		(struct psb_intel_lvds_priv *)gma_encoder->dev_priv;
- 
- 	lvds_priv->savePP_ON = REG_READ(LVDSPP_ON);
- 	lvds_priv->savePP_OFF = REG_READ(LVDSPP_OFF);
-@@ -307,10 +306,9 @@ static void psb_intel_lvds_restore(struc
- {
- 	struct drm_device *dev = connector->dev;
- 	u32 pp_status;
--	struct psb_intel_encoder *psb_intel_encoder =
--						gma_attached_encoder(connector);
-+	struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
- 	struct psb_intel_lvds_priv *lvds_priv =
--		(struct psb_intel_lvds_priv *)psb_intel_encoder->dev_priv;
-+		(struct psb_intel_lvds_priv *)gma_encoder->dev_priv;
- 
- 	dev_dbg(dev->dev, "(0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x)\n",
- 			lvds_priv->savePP_ON,
-@@ -349,12 +347,11 @@ int psb_intel_lvds_mode_valid(struct drm
- 				 struct drm_display_mode *mode)
- {
- 	struct drm_psb_private *dev_priv = connector->dev->dev_private;
--	struct psb_intel_encoder *psb_intel_encoder =
--						gma_attached_encoder(connector);
-+	struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
- 	struct drm_display_mode *fixed_mode =
- 					dev_priv->mode_dev.panel_fixed_mode;
- 
--	if (psb_intel_encoder->type == INTEL_OUTPUT_MIPI2)
-+	if (gma_encoder->type == INTEL_OUTPUT_MIPI2)
- 		fixed_mode = dev_priv->mode_dev.panel_fixed_mode2;
- 
- 	/* just in case */
-@@ -384,10 +381,9 @@ bool psb_intel_lvds_mode_fixup(struct dr
- 	struct gma_crtc *gma_crtc = to_gma_crtc(encoder->crtc);
- 	struct drm_encoder *tmp_encoder;
- 	struct drm_display_mode *panel_fixed_mode = mode_dev->panel_fixed_mode;
--	struct psb_intel_encoder *psb_intel_encoder =
--						to_psb_intel_encoder(encoder);
-+	struct gma_encoder *gma_encoder = to_gma_encoder(encoder);
- 
--	if (psb_intel_encoder->type == INTEL_OUTPUT_MIPI2)
-+	if (gma_encoder->type == INTEL_OUTPUT_MIPI2)
- 		panel_fixed_mode = mode_dev->panel_fixed_mode2;
- 
- 	/* PSB requires the LVDS is on pipe B, MRST has only one pipe anyway */
-@@ -524,9 +520,8 @@ static int psb_intel_lvds_get_modes(stru
- 	struct drm_device *dev = connector->dev;
- 	struct drm_psb_private *dev_priv = dev->dev_private;
- 	struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
--	struct psb_intel_encoder *psb_intel_encoder =
--						gma_attached_encoder(connector);
--	struct psb_intel_lvds_priv *lvds_priv = psb_intel_encoder->dev_priv;
-+	struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
-+	struct psb_intel_lvds_priv *lvds_priv = gma_encoder->dev_priv;
- 	int ret = 0;
- 
- 	if (!IS_MRST(dev))
-@@ -563,9 +558,8 @@ static int psb_intel_lvds_get_modes(stru
-  */
- void psb_intel_lvds_destroy(struct drm_connector *connector)
- {
--	struct psb_intel_encoder *psb_intel_encoder =
--						gma_attached_encoder(connector);
--	struct psb_intel_lvds_priv *lvds_priv = psb_intel_encoder->dev_priv;
-+	struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
-+	struct psb_intel_lvds_priv *lvds_priv = gma_encoder->dev_priv;
- 
- 	if (lvds_priv->ddc_bus)
- 		psb_intel_i2c_destroy(lvds_priv->ddc_bus);
-@@ -689,7 +683,7 @@ const struct drm_encoder_funcs psb_intel
- void psb_intel_lvds_init(struct drm_device *dev,
- 			 struct psb_intel_mode_device *mode_dev)
- {
--	struct psb_intel_encoder *psb_intel_encoder;
-+	struct gma_encoder *gma_encoder;
- 	struct gma_connector *gma_connector;
- 	struct psb_intel_lvds_priv *lvds_priv;
- 	struct drm_connector *connector;
-@@ -700,10 +694,9 @@ void psb_intel_lvds_init(struct drm_devi
- 	u32 lvds;
- 	int pipe;
- 
--	psb_intel_encoder =
--			kzalloc(sizeof(struct psb_intel_encoder), GFP_KERNEL);
--	if (!psb_intel_encoder) {
--		dev_err(dev->dev, "psb_intel_encoder allocation error\n");
-+	gma_encoder = kzalloc(sizeof(struct gma_encoder), GFP_KERNEL);
-+	if (!gma_encoder) {
-+		dev_err(dev->dev, "gma_encoder allocation error\n");
- 		return;
- 	}
- 
-@@ -719,10 +712,10 @@ void psb_intel_lvds_init(struct drm_devi
- 		goto failed_connector;
- 	}
- 
--	psb_intel_encoder->dev_priv = lvds_priv;
-+	gma_encoder->dev_priv = lvds_priv;
- 
- 	connector = &gma_connector->base;
--	encoder = &psb_intel_encoder->base;
-+	encoder = &gma_encoder->base;
- 	drm_connector_init(dev, connector,
- 			   &psb_intel_lvds_connector_funcs,
- 			   DRM_MODE_CONNECTOR_LVDS);
-@@ -731,8 +724,8 @@ void psb_intel_lvds_init(struct drm_devi
- 			 &psb_intel_lvds_enc_funcs,
- 			 DRM_MODE_ENCODER_LVDS);
- 
--	gma_connector_attach_encoder(gma_connector, psb_intel_encoder);
--	psb_intel_encoder->type = INTEL_OUTPUT_LVDS;
-+	gma_connector_attach_encoder(gma_connector, gma_encoder);
-+	gma_encoder->type = INTEL_OUTPUT_LVDS;
- 
- 	drm_encoder_helper_add(encoder, &psb_intel_lvds_helper_funcs);
- 	drm_connector_helper_add(connector,
-@@ -849,6 +842,6 @@ failed_blc_i2c:
- failed_connector:
- 	kfree(gma_connector);
- failed_encoder:
--	kfree(psb_intel_encoder);
-+	kfree(gma_encoder);
- }
- 
---- a/drivers/gpu/drm/gma500/psb_intel_sdvo.c
-+++ b/drivers/gpu/drm/gma500/psb_intel_sdvo.c
-@@ -65,7 +65,7 @@ static const char *tv_format_names[] = {
- #define TV_FORMAT_NUM  (sizeof(tv_format_names) / sizeof(*tv_format_names))
- 
- struct psb_intel_sdvo {
--	struct psb_intel_encoder base;
-+	struct gma_encoder base;
- 
- 	struct i2c_adapter *i2c;
- 	u8 slave_addr;
-@@ -1836,10 +1836,8 @@ done:
- static void psb_intel_sdvo_save(struct drm_connector *connector)
- {
- 	struct drm_device *dev = connector->dev;
--	struct psb_intel_encoder *psb_intel_encoder =
--						gma_attached_encoder(connector);
--	struct psb_intel_sdvo *sdvo =
--				to_psb_intel_sdvo(&psb_intel_encoder->base);
-+	struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
-+	struct psb_intel_sdvo *sdvo = to_psb_intel_sdvo(&gma_encoder->base);
- 
- 	sdvo->saveSDVO = REG_READ(sdvo->sdvo_reg);
- }
-@@ -2539,7 +2537,7 @@ psb_intel_sdvo_init_ddc_proxy(struct psb
- bool psb_intel_sdvo_init(struct drm_device *dev, int sdvo_reg)
- {
- 	struct drm_psb_private *dev_priv = dev->dev_private;
--	struct psb_intel_encoder *psb_intel_encoder;
-+	struct gma_encoder *gma_encoder;
- 	struct psb_intel_sdvo *psb_intel_sdvo;
- 	int i;
- 
-@@ -2556,9 +2554,9 @@ bool psb_intel_sdvo_init(struct drm_devi
- 	}
- 
- 	/* encoder type will be decided later */
--	psb_intel_encoder = &psb_intel_sdvo->base;
--	psb_intel_encoder->type = INTEL_OUTPUT_SDVO;
--	drm_encoder_init(dev, &psb_intel_encoder->base, &psb_intel_sdvo_enc_funcs, 0);
-+	gma_encoder = &psb_intel_sdvo->base;
-+	gma_encoder->type = INTEL_OUTPUT_SDVO;
-+	drm_encoder_init(dev, &gma_encoder->base, &psb_intel_sdvo_enc_funcs, 0);
- 
- 	/* Read the regs to test if we can talk to the device */
- 	for (i = 0; i < 0x40; i++) {
-@@ -2576,7 +2574,7 @@ bool psb_intel_sdvo_init(struct drm_devi
- 	else
- 		dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS;
- 
--	drm_encoder_helper_add(&psb_intel_encoder->base, &psb_intel_sdvo_helper_funcs);
-+	drm_encoder_helper_add(&gma_encoder->base, &psb_intel_sdvo_helper_funcs);
- 
- 	/* In default case sdvo lvds is false */
- 	if (!psb_intel_sdvo_get_capabilities(psb_intel_sdvo, &psb_intel_sdvo->caps))
-@@ -2619,7 +2617,7 @@ bool psb_intel_sdvo_init(struct drm_devi
- 	return true;
- 
- err:
--	drm_encoder_cleanup(&psb_intel_encoder->base);
-+	drm_encoder_cleanup(&gma_encoder->base);
- 	i2c_del_adapter(&psb_intel_sdvo->ddc);
- 	kfree(psb_intel_sdvo);
- 
diff --git a/patches.gma500/0034-drm-gma500-Add-Minnowboard-to-the-IS_MRST-macro.patch b/patches.gma500/0034-drm-gma500-Add-Minnowboard-to-the-IS_MRST-macro.patch
deleted file mode 100644
index b9bb6d2dd9769..0000000000000
--- a/patches.gma500/0034-drm-gma500-Add-Minnowboard-to-the-IS_MRST-macro.patch
+++ /dev/null
@@ -1,26 +0,0 @@
-From 3721f5e9619b532b1f6ee5adee86ee2872c86704 Mon Sep 17 00:00:00 2001
-From: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-Date: Mon, 16 Sep 2013 17:46:17 +0200
-Subject: drm/gma500: Add Minnowboard to the IS_MRST() macro
-
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-(cherry picked from commit 9d3e2f5304c77c2f4dcb96f03307575b25597b9a)
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-
-Conflicts:
-	drivers/gpu/drm/gma500/psb_drv.h
----
- drivers/gpu/drm/gma500/psb_drv.h |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/gpu/drm/gma500/psb_drv.h
-+++ b/drivers/gpu/drm/gma500/psb_drv.h
-@@ -45,7 +45,7 @@ enum {
- };
- 
- #define IS_PSB(dev) (((dev)->pdev->device & 0xfffe) == 0x8108)
--#define IS_MRST(dev) (((dev)->pdev->device & 0xfffc) == 0x4100)
-+#define IS_MRST(dev) (((dev)->pdev->device & 0xfff0) == 0x4100)
- #define IS_MFLD(dev) (((dev)->pdev->device & 0xfff8) == 0x0130)
- #define IS_CDV(dev) (((dev)->pdev->device & 0xfff0) == 0x0be0)
- 
diff --git a/patches.gma500/0035-drm-gma500-Add-chip-specific-sdvo-masks.patch b/patches.gma500/0035-drm-gma500-Add-chip-specific-sdvo-masks.patch
deleted file mode 100644
index 18aae49d0ad1a..0000000000000
--- a/patches.gma500/0035-drm-gma500-Add-chip-specific-sdvo-masks.patch
+++ /dev/null
@@ -1,67 +0,0 @@
-From f087ce4489b32e493cdb98a5e47ed6c6ba65745f Mon Sep 17 00:00:00 2001
-From: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-Date: Mon, 16 Sep 2013 17:54:54 +0200
-Subject: drm/gma500: Add chip specific sdvo masks
-
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-(cherry picked from commit cf8efd3afeff02fed2e2937ab3006618919bf65a)
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
----
- drivers/gpu/drm/gma500/cdv_device.c      |    1 +
- drivers/gpu/drm/gma500/framebuffer.c     |    2 +-
- drivers/gpu/drm/gma500/oaktrail_device.c |    1 +
- drivers/gpu/drm/gma500/psb_device.c      |    1 +
- drivers/gpu/drm/gma500/psb_drv.h         |    1 +
- 5 files changed, 5 insertions(+), 1 deletion(-)
-
---- a/drivers/gpu/drm/gma500/cdv_device.c
-+++ b/drivers/gpu/drm/gma500/cdv_device.c
-@@ -634,6 +634,7 @@ const struct psb_ops cdv_chip_ops = {
- 	.crtcs = 2,
- 	.hdmi_mask = (1 << 0) | (1 << 1),
- 	.lvds_mask = (1 << 1),
-+	.sdvo_mask = (1 << 0),
- 	.cursor_needs_phys = 0,
- 	.sgx_offset = MRST_SGX_OFFSET,
- 	.chip_setup = cdv_chip_setup,
---- a/drivers/gpu/drm/gma500/framebuffer.c
-+++ b/drivers/gpu/drm/gma500/framebuffer.c
-@@ -714,7 +714,7 @@ static void psb_setup_outputs(struct drm
- 			clone_mask = (1 << INTEL_OUTPUT_ANALOG);
- 			break;
- 		case INTEL_OUTPUT_SDVO:
--			crtc_mask = ((1 << 0) | (1 << 1));
-+			crtc_mask = dev_priv->ops->sdvo_mask;
- 			clone_mask = (1 << INTEL_OUTPUT_SDVO);
- 			break;
- 		case INTEL_OUTPUT_LVDS:
---- a/drivers/gpu/drm/gma500/oaktrail_device.c
-+++ b/drivers/gpu/drm/gma500/oaktrail_device.c
-@@ -546,6 +546,7 @@ const struct psb_ops oaktrail_chip_ops =
- 	.crtcs = 2,
- 	.hdmi_mask = (1 << 1),
- 	.lvds_mask = (1 << 0),
-+	.sdvo_mask = (1 << 1),
- 	.cursor_needs_phys = 0,
- 	.sgx_offset = MRST_SGX_OFFSET,
- 
---- a/drivers/gpu/drm/gma500/psb_device.c
-+++ b/drivers/gpu/drm/gma500/psb_device.c
-@@ -373,6 +373,7 @@ const struct psb_ops psb_chip_ops = {
- 	.crtcs = 2,
- 	.hdmi_mask = (1 << 0),
- 	.lvds_mask = (1 << 1),
-+	.sdvo_mask = (1 << 0),
- 	.cursor_needs_phys = 1,
- 	.sgx_offset = PSB_SGX_OFFSET,
- 	.chip_setup = psb_chip_setup,
---- a/drivers/gpu/drm/gma500/psb_drv.h
-+++ b/drivers/gpu/drm/gma500/psb_drv.h
-@@ -672,6 +672,7 @@ struct psb_ops {
- 	int sgx_offset;		/* Base offset of SGX device */
- 	int hdmi_mask;		/* Mask of HDMI CRTCs */
- 	int lvds_mask;		/* Mask of LVDS CRTCs */
-+	int sdvo_mask;		/* Mask of SDVO CRTCs */
- 	int cursor_needs_phys;  /* If cursor base reg need physical address */
- 
- 	/* Sub functions */
diff --git a/patches.gma500/0036-drm-gma500-Add-support-for-aux-pci-vdc-device.patch b/patches.gma500/0036-drm-gma500-Add-support-for-aux-pci-vdc-device.patch
deleted file mode 100644
index 1f2208b621a68..0000000000000
--- a/patches.gma500/0036-drm-gma500-Add-support-for-aux-pci-vdc-device.patch
+++ /dev/null
@@ -1,135 +0,0 @@
-From d1fb3e7a23996a053ebd6075cc622b27111108f1 Mon Sep 17 00:00:00 2001
-From: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-Date: Mon, 16 Sep 2013 18:02:40 +0200
-Subject: drm/gma500: Add support for aux pci vdc device
-
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-(cherry picked from commit 2657929d4e7c0a4db5456cc2c9a230a68b07813d)
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
----
- drivers/gpu/drm/gma500/psb_drv.c |   32 +++++++++++++++++++++++++++++++-
- drivers/gpu/drm/gma500/psb_drv.h |   21 ++++++++++++++++++++-
- 2 files changed, 51 insertions(+), 2 deletions(-)
-
---- a/drivers/gpu/drm/gma500/psb_drv.c
-+++ b/drivers/gpu/drm/gma500/psb_drv.c
-@@ -251,6 +251,12 @@ static int psb_driver_unload(struct drm_
- 			iounmap(dev_priv->sgx_reg);
- 			dev_priv->sgx_reg = NULL;
- 		}
-+		if (dev_priv->aux_reg) {
-+			iounmap(dev_priv->aux_reg);
-+			dev_priv->aux_reg = NULL;
-+		}
-+		if (dev_priv->aux_pdev)
-+			pci_dev_put(dev_priv->aux_pdev);
- 
- 		/* Destroy VBT data */
- 		psb_intel_destroy_bios(dev);
-@@ -266,7 +272,7 @@ static int psb_driver_unload(struct drm_
- static int psb_driver_load(struct drm_device *dev, unsigned long chipset)
- {
- 	struct drm_psb_private *dev_priv;
--	unsigned long resource_start;
-+	unsigned long resource_start, resource_len;
- 	unsigned long irqflags;
- 	int ret = -ENOMEM;
- 	struct drm_connector *connector;
-@@ -296,6 +302,30 @@ static int psb_driver_load(struct drm_de
- 	if (!dev_priv->sgx_reg)
- 		goto out_err;
- 
-+	if (IS_MRST(dev)) {
-+		dev_priv->aux_pdev = pci_get_bus_and_slot(0, PCI_DEVFN(3, 0));
-+
-+		if (dev_priv->aux_pdev) {
-+			resource_start = pci_resource_start(dev_priv->aux_pdev,
-+							    PSB_AUX_RESOURCE);
-+			resource_len = pci_resource_len(dev_priv->aux_pdev,
-+							PSB_AUX_RESOURCE);
-+			dev_priv->aux_reg = ioremap_nocache(resource_start,
-+							    resource_len);
-+			if (!dev_priv->aux_reg)
-+				goto out_err;
-+
-+			DRM_DEBUG_KMS("Found aux vdc");
-+		} else {
-+			/* Couldn't find the aux vdc so map to primary vdc */
-+			dev_priv->aux_reg = dev_priv->vdc_reg;
-+			DRM_DEBUG_KMS("Couldn't find aux pci device");
-+		}
-+		dev_priv->gmbus_reg = dev_priv->aux_reg;
-+	} else {
-+		dev_priv->gmbus_reg = dev_priv->vdc_reg;
-+	}
-+
- 	psb_intel_opregion_setup(dev);
- 
- 	ret = dev_priv->ops->chip_setup(dev);
---- a/drivers/gpu/drm/gma500/psb_drv.h
-+++ b/drivers/gpu/drm/gma500/psb_drv.h
-@@ -75,6 +75,7 @@ enum {
-  *	PCI resource identifiers
-  */
- #define PSB_MMIO_RESOURCE	 0
-+#define PSB_AUX_RESOURCE	 0
- #define PSB_GATT_RESOURCE	 2
- #define PSB_GTT_RESOURCE	 3
- /*
-@@ -455,6 +456,7 @@ struct psb_ops;
- 
- struct drm_psb_private {
- 	struct drm_device *dev;
-+	struct pci_dev *aux_pdev; /* Currently only used by mrst */
- 	const struct psb_ops *ops;
- 	const struct psb_offset *regmap;
- 	
-@@ -486,6 +488,7 @@ struct drm_psb_private {
- 
- 	uint8_t __iomem *sgx_reg;
- 	uint8_t __iomem *vdc_reg;
-+	uint8_t __iomem *aux_reg; /* Auxillary vdc pipe regs */
- 	uint32_t gatt_free_offset;
- 
- 	/*
-@@ -532,6 +535,7 @@ struct drm_psb_private {
- 
- 	/* gmbus */
- 	struct intel_gmbus *gmbus;
-+	uint8_t __iomem *gmbus_reg;
- 
- 	/* Used by SDVO */
- 	int crt_ddc_pin;
-@@ -927,16 +931,31 @@ static inline uint32_t REGISTER_READ(str
- 	return ioread32(dev_priv->vdc_reg + reg);
- }
- 
-+static inline uint32_t REGISTER_READ_AUX(struct drm_device *dev, uint32_t reg)
-+{
-+	struct drm_psb_private *dev_priv = dev->dev_private;
-+	return ioread32(dev_priv->aux_reg + reg);
-+}
-+
- #define REG_READ(reg)	       REGISTER_READ(dev, (reg))
-+#define REG_READ_AUX(reg)      REGISTER_READ_AUX(dev, (reg))
- 
- static inline void REGISTER_WRITE(struct drm_device *dev, uint32_t reg,
--				      uint32_t val)
-+				  uint32_t val)
- {
- 	struct drm_psb_private *dev_priv = dev->dev_private;
- 	iowrite32((val), dev_priv->vdc_reg + (reg));
- }
- 
-+static inline void REGISTER_WRITE_AUX(struct drm_device *dev, uint32_t reg,
-+				      uint32_t val)
-+{
-+	struct drm_psb_private *dev_priv = dev->dev_private;
-+	iowrite32((val), dev_priv->aux_reg + (reg));
-+}
-+
- #define REG_WRITE(reg, val)	REGISTER_WRITE(dev, (reg), (val))
-+#define REG_WRITE_AUX(reg, val)	REGISTER_WRITE_AUX(dev, (reg), (val))
- 
- static inline void REGISTER_WRITE16(struct drm_device *dev,
- 					uint32_t reg, uint32_t val)
diff --git a/patches.gma500/0037-drm-gma500-Add-aux-device-support-for-gmbus.patch b/patches.gma500/0037-drm-gma500-Add-aux-device-support-for-gmbus.patch
deleted file mode 100644
index ecc102add4ca2..0000000000000
--- a/patches.gma500/0037-drm-gma500-Add-aux-device-support-for-gmbus.patch
+++ /dev/null
@@ -1,251 +0,0 @@
-From 2c4dc642afaf225b91275ec7264510a973c472f7 Mon Sep 17 00:00:00 2001
-From: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-Date: Mon, 16 Sep 2013 18:36:37 +0200
-Subject: drm/gma500: Add aux device support for gmbus
-
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-(cherry picked from commit 86bd4103254adf7f3d32fa5c2578162c9e27b205)
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
----
- drivers/gpu/drm/gma500/intel_gmbus.c |   90 +++++++++++++++++++----------------
- 1 file changed, 49 insertions(+), 41 deletions(-)
-
---- a/drivers/gpu/drm/gma500/intel_gmbus.c
-+++ b/drivers/gpu/drm/gma500/intel_gmbus.c
-@@ -51,6 +51,9 @@
- #define wait_for(COND, MS) _wait_for(COND, MS, 1)
- #define wait_for_atomic(COND, MS) _wait_for(COND, MS, 0)
- 
-+#define GMBUS_REG_READ(reg) ioread32(dev_priv->gmbus_reg + (reg))
-+#define GMBUS_REG_WRITE(reg, val) iowrite32((val), dev_priv->gmbus_reg + (reg))
-+
- /* Intel GPIO access functions */
- 
- #define I2C_RISEFALL_TIME 20
-@@ -71,7 +74,8 @@ struct intel_gpio {
- void
- gma_intel_i2c_reset(struct drm_device *dev)
- {
--	REG_WRITE(GMBUS0, 0);
-+	struct drm_psb_private *dev_priv = dev->dev_private;
-+	GMBUS_REG_WRITE(GMBUS0, 0);
- }
- 
- static void intel_i2c_quirk_set(struct drm_psb_private *dev_priv, bool enable)
-@@ -98,11 +102,10 @@ static void intel_i2c_quirk_set(struct d
- static u32 get_reserved(struct intel_gpio *gpio)
- {
- 	struct drm_psb_private *dev_priv = gpio->dev_priv;
--	struct drm_device *dev = dev_priv->dev;
- 	u32 reserved = 0;
- 
- 	/* On most chips, these bits must be preserved in software. */
--	reserved = REG_READ(gpio->reg) &
-+	reserved = GMBUS_REG_READ(gpio->reg) &
- 				     (GPIO_DATA_PULLUP_DISABLE |
- 				      GPIO_CLOCK_PULLUP_DISABLE);
- 
-@@ -113,29 +116,26 @@ static int get_clock(void *data)
- {
- 	struct intel_gpio *gpio = data;
- 	struct drm_psb_private *dev_priv = gpio->dev_priv;
--	struct drm_device *dev = dev_priv->dev;
- 	u32 reserved = get_reserved(gpio);
--	REG_WRITE(gpio->reg, reserved | GPIO_CLOCK_DIR_MASK);
--	REG_WRITE(gpio->reg, reserved);
--	return (REG_READ(gpio->reg) & GPIO_CLOCK_VAL_IN) != 0;
-+	GMBUS_REG_WRITE(gpio->reg, reserved | GPIO_CLOCK_DIR_MASK);
-+	GMBUS_REG_WRITE(gpio->reg, reserved);
-+	return (GMBUS_REG_READ(gpio->reg) & GPIO_CLOCK_VAL_IN) != 0;
- }
- 
- static int get_data(void *data)
- {
- 	struct intel_gpio *gpio = data;
- 	struct drm_psb_private *dev_priv = gpio->dev_priv;
--	struct drm_device *dev = dev_priv->dev;
- 	u32 reserved = get_reserved(gpio);
--	REG_WRITE(gpio->reg, reserved | GPIO_DATA_DIR_MASK);
--	REG_WRITE(gpio->reg, reserved);
--	return (REG_READ(gpio->reg) & GPIO_DATA_VAL_IN) != 0;
-+	GMBUS_REG_WRITE(gpio->reg, reserved | GPIO_DATA_DIR_MASK);
-+	GMBUS_REG_WRITE(gpio->reg, reserved);
-+	return (GMBUS_REG_READ(gpio->reg) & GPIO_DATA_VAL_IN) != 0;
- }
- 
- static void set_clock(void *data, int state_high)
- {
- 	struct intel_gpio *gpio = data;
- 	struct drm_psb_private *dev_priv = gpio->dev_priv;
--	struct drm_device *dev = dev_priv->dev;
- 	u32 reserved = get_reserved(gpio);
- 	u32 clock_bits;
- 
-@@ -145,15 +145,14 @@ static void set_clock(void *data, int st
- 		clock_bits = GPIO_CLOCK_DIR_OUT | GPIO_CLOCK_DIR_MASK |
- 			GPIO_CLOCK_VAL_MASK;
- 
--	REG_WRITE(gpio->reg, reserved | clock_bits);
--	REG_READ(gpio->reg); /* Posting */
-+	GMBUS_REG_WRITE(gpio->reg, reserved | clock_bits);
-+	GMBUS_REG_READ(gpio->reg); /* Posting */
- }
- 
- static void set_data(void *data, int state_high)
- {
- 	struct intel_gpio *gpio = data;
- 	struct drm_psb_private *dev_priv = gpio->dev_priv;
--	struct drm_device *dev = dev_priv->dev;
- 	u32 reserved = get_reserved(gpio);
- 	u32 data_bits;
- 
-@@ -163,8 +162,8 @@ static void set_data(void *data, int sta
- 		data_bits = GPIO_DATA_DIR_OUT | GPIO_DATA_DIR_MASK |
- 			GPIO_DATA_VAL_MASK;
- 
--	REG_WRITE(gpio->reg, reserved | data_bits);
--	REG_READ(gpio->reg);
-+	GMBUS_REG_WRITE(gpio->reg, reserved | data_bits);
-+	GMBUS_REG_READ(gpio->reg);
- }
- 
- static struct i2c_adapter *
-@@ -251,7 +250,6 @@ gmbus_xfer(struct i2c_adapter *adapter,
- 					       struct intel_gmbus,
- 					       adapter);
- 	struct drm_psb_private *dev_priv = adapter->algo_data;
--	struct drm_device *dev = dev_priv->dev;
- 	int i, reg_offset;
- 
- 	if (bus->force_bit)
-@@ -260,28 +258,30 @@ gmbus_xfer(struct i2c_adapter *adapter,
- 
- 	reg_offset = 0;
- 
--	REG_WRITE(GMBUS0 + reg_offset, bus->reg0);
-+	GMBUS_REG_WRITE(GMBUS0 + reg_offset, bus->reg0);
- 
- 	for (i = 0; i < num; i++) {
- 		u16 len = msgs[i].len;
- 		u8 *buf = msgs[i].buf;
- 
- 		if (msgs[i].flags & I2C_M_RD) {
--			REG_WRITE(GMBUS1 + reg_offset,
--				   GMBUS_CYCLE_WAIT | (i + 1 == num ? GMBUS_CYCLE_STOP : 0) |
--				   (len << GMBUS_BYTE_COUNT_SHIFT) |
--				   (msgs[i].addr << GMBUS_SLAVE_ADDR_SHIFT) |
--				   GMBUS_SLAVE_READ | GMBUS_SW_RDY);
--			REG_READ(GMBUS2+reg_offset);
-+			GMBUS_REG_WRITE(GMBUS1 + reg_offset,
-+					GMBUS_CYCLE_WAIT |
-+					(i + 1 == num ? GMBUS_CYCLE_STOP : 0) |
-+					(len << GMBUS_BYTE_COUNT_SHIFT) |
-+					(msgs[i].addr << GMBUS_SLAVE_ADDR_SHIFT) |
-+					GMBUS_SLAVE_READ | GMBUS_SW_RDY);
-+			GMBUS_REG_READ(GMBUS2+reg_offset);
- 			do {
- 				u32 val, loop = 0;
- 
--				if (wait_for(REG_READ(GMBUS2 + reg_offset) & (GMBUS_SATOER | GMBUS_HW_RDY), 50))
-+				if (wait_for(GMBUS_REG_READ(GMBUS2 + reg_offset) &
-+					     (GMBUS_SATOER | GMBUS_HW_RDY), 50))
- 					goto timeout;
--				if (REG_READ(GMBUS2 + reg_offset) & GMBUS_SATOER)
-+				if (GMBUS_REG_READ(GMBUS2 + reg_offset) & GMBUS_SATOER)
- 					goto clear_err;
- 
--				val = REG_READ(GMBUS3 + reg_offset);
-+				val = GMBUS_REG_READ(GMBUS3 + reg_offset);
- 				do {
- 					*buf++ = val & 0xff;
- 					val >>= 8;
-@@ -295,18 +295,20 @@ gmbus_xfer(struct i2c_adapter *adapter,
- 				val |= *buf++ << (8 * loop);
- 			} while (--len && ++loop < 4);
- 
--			REG_WRITE(GMBUS3 + reg_offset, val);
--			REG_WRITE(GMBUS1 + reg_offset,
-+			GMBUS_REG_WRITE(GMBUS3 + reg_offset, val);
-+			GMBUS_REG_WRITE(GMBUS1 + reg_offset,
- 				   (i + 1 == num ? GMBUS_CYCLE_STOP : GMBUS_CYCLE_WAIT) |
- 				   (msgs[i].len << GMBUS_BYTE_COUNT_SHIFT) |
- 				   (msgs[i].addr << GMBUS_SLAVE_ADDR_SHIFT) |
- 				   GMBUS_SLAVE_WRITE | GMBUS_SW_RDY);
--			REG_READ(GMBUS2+reg_offset);
-+			GMBUS_REG_READ(GMBUS2+reg_offset);
- 
- 			while (len) {
--				if (wait_for(REG_READ(GMBUS2 + reg_offset) & (GMBUS_SATOER | GMBUS_HW_RDY), 50))
-+				if (wait_for(GMBUS_REG_READ(GMBUS2 + reg_offset) &
-+					     (GMBUS_SATOER | GMBUS_HW_RDY), 50))
- 					goto timeout;
--				if (REG_READ(GMBUS2 + reg_offset) & GMBUS_SATOER)
-+				if (GMBUS_REG_READ(GMBUS2 + reg_offset) &
-+				    GMBUS_SATOER)
- 					goto clear_err;
- 
- 				val = loop = 0;
-@@ -314,14 +316,14 @@ gmbus_xfer(struct i2c_adapter *adapter,
- 					val |= *buf++ << (8 * loop);
- 				} while (--len && ++loop < 4);
- 
--				REG_WRITE(GMBUS3 + reg_offset, val);
--				REG_READ(GMBUS2+reg_offset);
-+				GMBUS_REG_WRITE(GMBUS3 + reg_offset, val);
-+				GMBUS_REG_READ(GMBUS2+reg_offset);
- 			}
- 		}
- 
--		if (i + 1 < num && wait_for(REG_READ(GMBUS2 + reg_offset) & (GMBUS_SATOER | GMBUS_HW_WAIT_PHASE), 50))
-+		if (i + 1 < num && wait_for(GMBUS_REG_READ(GMBUS2 + reg_offset) & (GMBUS_SATOER | GMBUS_HW_WAIT_PHASE), 50))
- 			goto timeout;
--		if (REG_READ(GMBUS2 + reg_offset) & GMBUS_SATOER)
-+		if (GMBUS_REG_READ(GMBUS2 + reg_offset) & GMBUS_SATOER)
- 			goto clear_err;
- 	}
- 
-@@ -332,20 +334,20 @@ clear_err:
- 	 * of resetting the GMBUS controller and so clearing the
- 	 * BUS_ERROR raised by the slave's NAK.
- 	 */
--	REG_WRITE(GMBUS1 + reg_offset, GMBUS_SW_CLR_INT);
--	REG_WRITE(GMBUS1 + reg_offset, 0);
-+	GMBUS_REG_WRITE(GMBUS1 + reg_offset, GMBUS_SW_CLR_INT);
-+	GMBUS_REG_WRITE(GMBUS1 + reg_offset, 0);
- 
- done:
- 	/* Mark the GMBUS interface as disabled. We will re-enable it at the
- 	 * start of the next xfer, till then let it sleep.
- 	 */
--	REG_WRITE(GMBUS0 + reg_offset, 0);
-+	GMBUS_REG_WRITE(GMBUS0 + reg_offset, 0);
- 	return i;
- 
- timeout:
- 	DRM_INFO("GMBUS timed out, falling back to bit banging on pin %d [%s]\n",
- 		 bus->reg0 & 0xff, bus->adapter.name);
--	REG_WRITE(GMBUS0 + reg_offset, 0);
-+	GMBUS_REG_WRITE(GMBUS0 + reg_offset, 0);
- 
- 	/* Hardware may not support GMBUS over these pins? Try GPIO bitbanging instead. */
- 	bus->force_bit = intel_gpio_create(dev_priv, bus->reg0 & 0xff);
-@@ -399,6 +401,11 @@ int gma_intel_setup_gmbus(struct drm_dev
- 	if (dev_priv->gmbus == NULL)
- 		return -ENOMEM;
- 
-+	if (IS_MRST(dev))
-+		dev_priv->gmbus_reg = dev_priv->aux_reg;
-+	else
-+		dev_priv->gmbus_reg = dev_priv->vdc_reg;
-+
- 	for (i = 0; i < GMBUS_NUM_PORTS; i++) {
- 		struct intel_gmbus *bus = &dev_priv->gmbus[i];
- 
-@@ -487,6 +494,7 @@ void gma_intel_teardown_gmbus(struct drm
- 		i2c_del_adapter(&bus->adapter);
- 	}
- 
-+	dev_priv->gmbus_reg = NULL; /* iounmap is done in driver_unload */
- 	kfree(dev_priv->gmbus);
- 	dev_priv->gmbus = NULL;
- }
diff --git a/patches.gma500/0038-drm-gma500-mrst-Add-SDVO-clock-calculation.patch b/patches.gma500/0038-drm-gma500-mrst-Add-SDVO-clock-calculation.patch
deleted file mode 100644
index c7013e630485a..0000000000000
--- a/patches.gma500/0038-drm-gma500-mrst-Add-SDVO-clock-calculation.patch
+++ /dev/null
@@ -1,310 +0,0 @@
-From cf71491555e61294cdb3a341db4c7d1af7b2d537 Mon Sep 17 00:00:00 2001
-From: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-Date: Wed, 6 Nov 2013 22:31:18 +0100
-Subject: drm/gma500/mrst: Add SDVO clock calculation
-
-We start off by adding SDVO limits and converting all limits to the
-generic gma_limit_t stuct. Then we separate clock calculations for
-LVDS and SDVO. This will be cleaned up later but keep it simple for now.
-
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-(cherry picked from commit ac6113ebb70d4bc7018db4e73f923653347da743)
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
----
- drivers/gpu/drm/gma500/oaktrail_crtc.c |  175 +++++++++++++++++++++++----------
- 1 file changed, 126 insertions(+), 49 deletions(-)
-
---- a/drivers/gpu/drm/gma500/oaktrail_crtc.c
-+++ b/drivers/gpu/drm/gma500/oaktrail_crtc.c
-@@ -26,24 +26,10 @@
- #include "gma_display.h"
- #include "power.h"
- 
--struct psb_intel_range_t {
--	int min, max;
--};
--
--struct oaktrail_limit_t {
--	struct psb_intel_range_t dot, m, p1;
--};
--
--struct oaktrail_clock_t {
--	/* derived values */
--	int dot;
--	int m;
--	int p1;
--};
--
--#define MRST_LIMIT_LVDS_100L	    0
--#define MRST_LIMIT_LVDS_83	    1
--#define MRST_LIMIT_LVDS_100	    2
-+#define MRST_LIMIT_LVDS_100L	0
-+#define MRST_LIMIT_LVDS_83	1
-+#define MRST_LIMIT_LVDS_100	2
-+#define MRST_LIMIT_SDVO		3
- 
- #define MRST_DOT_MIN		  19750
- #define MRST_DOT_MAX		  120000
-@@ -57,21 +43,40 @@ struct oaktrail_clock_t {
- #define MRST_P1_MAX_0		    7
- #define MRST_P1_MAX_1		    8
- 
--static const struct oaktrail_limit_t oaktrail_limits[] = {
-+static bool mrst_lvds_find_best_pll(const struct gma_limit_t *limit,
-+				    struct drm_crtc *crtc, int target,
-+				    int refclk, struct gma_clock_t *best_clock);
-+
-+static bool mrst_sdvo_find_best_pll(const struct gma_limit_t *limit,
-+				    struct drm_crtc *crtc, int target,
-+				    int refclk, struct gma_clock_t *best_clock);
-+
-+static const struct gma_limit_t mrst_limits[] = {
- 	{			/* MRST_LIMIT_LVDS_100L */
- 	 .dot = {.min = MRST_DOT_MIN, .max = MRST_DOT_MAX},
- 	 .m = {.min = MRST_M_MIN_100L, .max = MRST_M_MAX_100L},
- 	 .p1 = {.min = MRST_P1_MIN, .max = MRST_P1_MAX_1},
-+	 .find_pll = mrst_lvds_find_best_pll,
- 	 },
- 	{			/* MRST_LIMIT_LVDS_83L */
- 	 .dot = {.min = MRST_DOT_MIN, .max = MRST_DOT_MAX},
- 	 .m = {.min = MRST_M_MIN_83, .max = MRST_M_MAX_83},
- 	 .p1 = {.min = MRST_P1_MIN, .max = MRST_P1_MAX_0},
-+	 .find_pll = mrst_lvds_find_best_pll,
- 	 },
- 	{			/* MRST_LIMIT_LVDS_100 */
- 	 .dot = {.min = MRST_DOT_MIN, .max = MRST_DOT_MAX},
- 	 .m = {.min = MRST_M_MIN_100, .max = MRST_M_MAX_100},
- 	 .p1 = {.min = MRST_P1_MIN, .max = MRST_P1_MAX_1},
-+	 .find_pll = mrst_lvds_find_best_pll,
-+	 },
-+	{			/* MRST_LIMIT_SDVO */
-+	 .vco = {.min = 1400000, .max = 2800000},
-+	 .n = {.min = 3, .max = 7},
-+	 .m = {.min = 80, .max = 137},
-+	 .p1 = {.min = 1, .max = 2},
-+	 .p2 = {.dot_limit = 200000, .p2_slow = 10, .p2_fast = 10},
-+	 .find_pll = mrst_sdvo_find_best_pll,
- 	 },
- };
- 
-@@ -82,9 +87,10 @@ static const u32 oaktrail_m_converts[] =
- 	0x12, 0x09, 0x24, 0x32, 0x39, 0x1c,
- };
- 
--static const struct oaktrail_limit_t *oaktrail_limit(struct drm_crtc *crtc)
-+static const struct gma_limit_t *mrst_limit(struct drm_crtc *crtc,
-+					    int refclk)
- {
--	const struct oaktrail_limit_t *limit = NULL;
-+	const struct gma_limit_t *limit = NULL;
- 	struct drm_device *dev = crtc->dev;
- 	struct drm_psb_private *dev_priv = dev->dev_private;
- 
-@@ -92,45 +98,100 @@ static const struct oaktrail_limit_t *oa
- 	    || gma_pipe_has_type(crtc, INTEL_OUTPUT_MIPI)) {
- 		switch (dev_priv->core_freq) {
- 		case 100:
--			limit = &oaktrail_limits[MRST_LIMIT_LVDS_100L];
-+			limit = &mrst_limits[MRST_LIMIT_LVDS_100L];
- 			break;
- 		case 166:
--			limit = &oaktrail_limits[MRST_LIMIT_LVDS_83];
-+			limit = &mrst_limits[MRST_LIMIT_LVDS_83];
- 			break;
- 		case 200:
--			limit = &oaktrail_limits[MRST_LIMIT_LVDS_100];
-+			limit = &mrst_limits[MRST_LIMIT_LVDS_100];
- 			break;
- 		}
-+	} else if (gma_pipe_has_type(crtc, INTEL_OUTPUT_SDVO)) {
-+		limit = &mrst_limits[MRST_LIMIT_SDVO];
- 	} else {
- 		limit = NULL;
--		dev_err(dev->dev, "oaktrail_limit Wrong display type.\n");
-+		dev_err(dev->dev, "mrst_limit Wrong display type.\n");
- 	}
- 
- 	return limit;
- }
- 
- /** Derive the pixel clock for the given refclk and divisors for 8xx chips. */
--static void oaktrail_clock(int refclk, struct oaktrail_clock_t *clock)
-+static void mrst_lvds_clock(int refclk, struct gma_clock_t *clock)
- {
- 	clock->dot = (refclk * clock->m) / (14 * clock->p1);
- }
- 
--static void mrstPrintPll(char *prefix, struct oaktrail_clock_t *clock)
-+static void mrst_print_pll(struct gma_clock_t *clock)
-+{
-+	DRM_DEBUG_DRIVER("dotclock=%d,  m=%d, m1=%d, m2=%d, n=%d, p1=%d, p2=%d\n",
-+			 clock->dot, clock->m, clock->m1, clock->m2, clock->n,
-+			 clock->p1, clock->p2);
-+}
-+
-+static bool mrst_sdvo_find_best_pll(const struct gma_limit_t *limit,
-+				    struct drm_crtc *crtc, int target,
-+				    int refclk, struct gma_clock_t *best_clock)
- {
--	pr_debug("%s: dotclock = %d,  m = %d, p1 = %d.\n",
--	     prefix, clock->dot, clock->m, clock->p1);
-+	struct gma_clock_t clock;
-+	u32 target_vco, actual_freq;
-+	s32 freq_error, min_error = 100000;
-+
-+	memset(best_clock, 0, sizeof(*best_clock));
-+
-+	for (clock.m = limit->m.min; clock.m <= limit->m.max; clock.m++) {
-+		for (clock.n = limit->n.min; clock.n <= limit->n.max;
-+		     clock.n++) {
-+			for (clock.p1 = limit->p1.min;
-+			     clock.p1 <= limit->p1.max; clock.p1++) {
-+				/* p2 value always stored in p2_slow on SDVO */
-+				clock.p = clock.p1 * limit->p2.p2_slow;
-+				target_vco = target * clock.p;
-+
-+				/* VCO will increase at this point so break */
-+				if (target_vco > limit->vco.max)
-+					break;
-+
-+				if (target_vco < limit->vco.min)
-+					continue;
-+
-+				actual_freq = (refclk * clock.m) /
-+					      (clock.n * clock.p);
-+				freq_error = 10000 -
-+					     ((target * 10000) / actual_freq);
-+
-+				if (freq_error < -min_error) {
-+					/* freq_error will start to decrease at
-+					   this point so break */
-+					break;
-+				}
-+
-+				if (freq_error < 0)
-+					freq_error = -freq_error;
-+
-+				if (freq_error < min_error) {
-+					min_error = freq_error;
-+					*best_clock = clock;
-+				}
-+			}
-+		}
-+		if (min_error == 0)
-+			break;
-+	}
-+
-+	return min_error == 0;
- }
- 
- /**
-  * Returns a set of divisors for the desired target clock with the given refclk,
-  * or FALSE.  Divisor values are the actual divisors for
-  */
--static bool
--mrstFindBestPLL(struct drm_crtc *crtc, int target, int refclk,
--		struct oaktrail_clock_t *best_clock)
-+static bool mrst_lvds_find_best_pll(const struct gma_limit_t *limit,
-+				    struct drm_crtc *crtc, int target,
-+				    int refclk, struct gma_clock_t *best_clock)
- {
--	struct oaktrail_clock_t clock;
--	const struct oaktrail_limit_t *limit = oaktrail_limit(crtc);
-+	struct gma_clock_t clock;
- 	int err = target;
- 
- 	memset(best_clock, 0, sizeof(*best_clock));
-@@ -140,7 +201,7 @@ mrstFindBestPLL(struct drm_crtc *crtc, i
- 		     clock.p1++) {
- 			int this_err;
- 
--			oaktrail_clock(refclk, &clock);
-+			mrst_lvds_clock(refclk, &clock);
- 
- 			this_err = abs(clock.dot - target);
- 			if (this_err < err) {
-@@ -149,7 +210,6 @@ mrstFindBestPLL(struct drm_crtc *crtc, i
- 			}
- 		}
- 	}
--	dev_dbg(crtc->dev->dev, "mrstFindBestPLL err = %d.\n", err);
- 	return err != target;
- }
- 
-@@ -297,7 +357,8 @@ static int oaktrail_crtc_mode_set(struct
- 	int pipe = gma_crtc->pipe;
- 	const struct psb_offset *map = &dev_priv->regmap[pipe];
- 	int refclk = 0;
--	struct oaktrail_clock_t clock;
-+	struct gma_clock_t clock;
-+	const struct gma_limit_t *limit;
- 	u32 dpll = 0, fp = 0, dspcntr, pipeconf;
- 	bool ok, is_sdvo = false;
- 	bool is_lvds = false;
-@@ -418,21 +479,30 @@ static int oaktrail_crtc_mode_set(struct
- 	if (is_mipi)
- 		goto oaktrail_crtc_mode_set_exit;
- 
--	refclk = dev_priv->core_freq * 1000;
- 
- 	dpll = 0;		/*BIT16 = 0 for 100MHz reference */
- 
--	ok = mrstFindBestPLL(crtc, adjusted_mode->clock, refclk, &clock);
-+	refclk = is_sdvo ? 96000 : dev_priv->core_freq * 1000;
-+	limit = mrst_limit(crtc, refclk);
-+	ok = limit->find_pll(limit, crtc, adjusted_mode->clock,
-+			     refclk, &clock);
- 
--	if (!ok) {
--		dev_dbg(dev->dev, "mrstFindBestPLL fail in oaktrail_crtc_mode_set.\n");
--	} else {
--		dev_dbg(dev->dev, "oaktrail_crtc_mode_set pixel clock = %d,"
--			 "m = %x, p1 = %x.\n", clock.dot, clock.m,
--			 clock.p1);
-+	if (is_sdvo) {
-+		/* Convert calculated values to register values */
-+		clock.p1 = (1L << (clock.p1 - 1));
-+		clock.m -= 2;
-+		clock.n = (1L << (clock.n - 1));
- 	}
- 
--	fp = oaktrail_m_converts[(clock.m - MRST_M_MIN)] << 8;
-+	if (!ok)
-+		DRM_ERROR("Failed to find proper PLL settings");
-+
-+	mrst_print_pll(&clock);
-+
-+	if (is_sdvo)
-+		fp = clock.n << 16 | clock.m;
-+	else
-+		fp = oaktrail_m_converts[(clock.m - MRST_M_MIN)] << 8;
- 
- 	dpll |= DPLL_VGA_MODE_DIS;
- 
-@@ -456,12 +526,13 @@ static int oaktrail_crtc_mode_set(struct
- 
- 
- 	/* compute bitmask from p1 value */
--	dpll |= (1 << (clock.p1 - 2)) << 17;
-+	if (is_sdvo)
-+		dpll |= clock.p1 << 16; // dpll |= (1 << (clock.p1 - 1)) << 16;
-+	else
-+		dpll |= (1 << (clock.p1 - 2)) << 17;
- 
- 	dpll |= DPLL_VCO_ENABLE;
- 
--	mrstPrintPll("chosen", &clock);
--
- 	if (dpll & DPLL_VCO_ENABLE) {
- 		REG_WRITE(map->fp0, fp);
- 		REG_WRITE(map->dpll, dpll & ~DPLL_VCO_ENABLE);
-@@ -565,3 +636,9 @@ const struct drm_crtc_helper_funcs oaktr
- 	.commit = gma_crtc_commit,
- };
- 
-+/* Not used yet */
-+const struct gma_clock_funcs mrst_clock_funcs = {
-+	.clock = mrst_lvds_clock,
-+	.limit = mrst_limit,
-+	.pll_is_valid = gma_pll_is_valid,
-+};
diff --git a/patches.gma500/0039-drm-gma500-mrst-Add-aux-register-writes-when-program.patch b/patches.gma500/0039-drm-gma500-mrst-Add-aux-register-writes-when-program.patch
deleted file mode 100644
index 21852aeaa222b..0000000000000
--- a/patches.gma500/0039-drm-gma500-mrst-Add-aux-register-writes-when-program.patch
+++ /dev/null
@@ -1,370 +0,0 @@
-From e8321eb5f0641cd1b9d875b4c6c9dba063974c28 Mon Sep 17 00:00:00 2001
-From: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-Date: Thu, 7 Nov 2013 00:14:18 +0100
-Subject: drm/gma500/mrst: Add aux register writes when programming pipe
-
-On SDVO pipes (always Pipe B on mrst) we have to sequentially write the
-aux vdc. We might be able to skip programming the primary vdc in
-some/most places but we don't care about that now.
-
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-(cherry picked from commit b97b8287a39d1fe6f8aa1b83405f669634ff8401)
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
----
- drivers/gpu/drm/gma500/oaktrail_crtc.c |  247 ++++++++++++++++++---------------
- drivers/gpu/drm/gma500/psb_drv.h       |   27 +++
- 2 files changed, 165 insertions(+), 109 deletions(-)
-
---- a/drivers/gpu/drm/gma500/oaktrail_crtc.c
-+++ b/drivers/gpu/drm/gma500/oaktrail_crtc.c
-@@ -227,6 +227,8 @@ static void oaktrail_crtc_dpms(struct dr
- 	int pipe = gma_crtc->pipe;
- 	const struct psb_offset *map = &dev_priv->regmap[pipe];
- 	u32 temp;
-+	int i;
-+	int need_aux = gma_pipe_has_type(crtc, INTEL_OUTPUT_SDVO) ? 1 : 0;
- 
- 	if (pipe == 1) {
- 		oaktrail_crtc_hdmi_dpms(crtc, mode);
-@@ -243,35 +245,45 @@ static void oaktrail_crtc_dpms(struct dr
- 	case DRM_MODE_DPMS_ON:
- 	case DRM_MODE_DPMS_STANDBY:
- 	case DRM_MODE_DPMS_SUSPEND:
--		/* Enable the DPLL */
--		temp = REG_READ(map->dpll);
--		if ((temp & DPLL_VCO_ENABLE) == 0) {
--			REG_WRITE(map->dpll, temp);
--			REG_READ(map->dpll);
--			/* Wait for the clocks to stabilize. */
--			udelay(150);
--			REG_WRITE(map->dpll, temp | DPLL_VCO_ENABLE);
--			REG_READ(map->dpll);
--			/* Wait for the clocks to stabilize. */
--			udelay(150);
--			REG_WRITE(map->dpll, temp | DPLL_VCO_ENABLE);
--			REG_READ(map->dpll);
--			/* Wait for the clocks to stabilize. */
--			udelay(150);
--		}
--		/* Enable the pipe */
--		temp = REG_READ(map->conf);
--		if ((temp & PIPEACONF_ENABLE) == 0)
--			REG_WRITE(map->conf, temp | PIPEACONF_ENABLE);
--		/* Enable the plane */
--		temp = REG_READ(map->cntr);
--		if ((temp & DISPLAY_PLANE_ENABLE) == 0) {
--			REG_WRITE(map->cntr,
--				  temp | DISPLAY_PLANE_ENABLE);
--			/* Flush the plane changes */
--			REG_WRITE(map->base, REG_READ(map->base));
--		}
-+		for (i = 0; i <= need_aux; i++) {
-+			/* Enable the DPLL */
-+			temp = REG_READ_WITH_AUX(map->dpll, i);
-+			if ((temp & DPLL_VCO_ENABLE) == 0) {
-+				REG_WRITE_WITH_AUX(map->dpll, temp, i);
-+				REG_READ_WITH_AUX(map->dpll, i);
-+				/* Wait for the clocks to stabilize. */
-+				udelay(150);
-+				REG_WRITE_WITH_AUX(map->dpll,
-+						   temp | DPLL_VCO_ENABLE, i);
-+				REG_READ_WITH_AUX(map->dpll, i);
-+				/* Wait for the clocks to stabilize. */
-+				udelay(150);
-+				REG_WRITE_WITH_AUX(map->dpll,
-+						   temp | DPLL_VCO_ENABLE, i);
-+				REG_READ_WITH_AUX(map->dpll, i);
-+				/* Wait for the clocks to stabilize. */
-+				udelay(150);
-+			}
-+
-+			/* Enable the pipe */
-+			temp = REG_READ_WITH_AUX(map->conf, i);
-+			if ((temp & PIPEACONF_ENABLE) == 0) {
-+				REG_WRITE_WITH_AUX(map->conf,
-+						   temp | PIPEACONF_ENABLE, i);
-+			}
-+
-+			/* Enable the plane */
-+			temp = REG_READ_WITH_AUX(map->cntr, i);
-+			if ((temp & DISPLAY_PLANE_ENABLE) == 0) {
-+				REG_WRITE_WITH_AUX(map->cntr,
-+						   temp | DISPLAY_PLANE_ENABLE,
-+						   i);
-+				/* Flush the plane changes */
-+				REG_WRITE_WITH_AUX(map->base,
-+					REG_READ_WITH_AUX(map->base, i), i);
-+			}
- 
-+		}
- 		gma_crtc_load_lut(crtc);
- 
- 		/* Give the overlay scaler a chance to enable
-@@ -283,35 +295,40 @@ static void oaktrail_crtc_dpms(struct dr
- 		 * if it's on this pipe */
- 		/* psb_intel_crtc_dpms_video(crtc, FALSE); TODO */
- 
--		/* Disable the VGA plane that we never use */
--		REG_WRITE(VGACNTRL, VGA_DISP_DISABLE);
--		/* Disable display plane */
--		temp = REG_READ(map->cntr);
--		if ((temp & DISPLAY_PLANE_ENABLE) != 0) {
--			REG_WRITE(map->cntr,
--				  temp & ~DISPLAY_PLANE_ENABLE);
--			/* Flush the plane changes */
--			REG_WRITE(map->base, REG_READ(map->base));
--			REG_READ(map->base);
--		}
-+		for (i = 0; i <= need_aux; i++) {
-+			/* Disable the VGA plane that we never use */
-+			REG_WRITE_WITH_AUX(VGACNTRL, VGA_DISP_DISABLE, i);
-+			/* Disable display plane */
-+			temp = REG_READ_WITH_AUX(map->cntr, i);
-+			if ((temp & DISPLAY_PLANE_ENABLE) != 0) {
-+				REG_WRITE_WITH_AUX(map->cntr,
-+					temp & ~DISPLAY_PLANE_ENABLE, i);
-+				/* Flush the plane changes */
-+				REG_WRITE_WITH_AUX(map->base,
-+						   REG_READ(map->base), i);
-+				REG_READ_WITH_AUX(map->base, i);
-+			}
-+
-+			/* Next, disable display pipes */
-+			temp = REG_READ_WITH_AUX(map->conf, i);
-+			if ((temp & PIPEACONF_ENABLE) != 0) {
-+				REG_WRITE_WITH_AUX(map->conf,
-+						   temp & ~PIPEACONF_ENABLE, i);
-+				REG_READ_WITH_AUX(map->conf, i);
-+			}
-+			/* Wait for for the pipe disable to take effect. */
-+			gma_wait_for_vblank(dev);
-+
-+			temp = REG_READ_WITH_AUX(map->dpll, i);
-+			if ((temp & DPLL_VCO_ENABLE) != 0) {
-+				REG_WRITE_WITH_AUX(map->dpll,
-+						   temp & ~DPLL_VCO_ENABLE, i);
-+				REG_READ_WITH_AUX(map->dpll, i);
-+			}
- 
--		/* Next, disable display pipes */
--		temp = REG_READ(map->conf);
--		if ((temp & PIPEACONF_ENABLE) != 0) {
--			REG_WRITE(map->conf, temp & ~PIPEACONF_ENABLE);
--			REG_READ(map->conf);
--		}
--		/* Wait for for the pipe disable to take effect. */
--		gma_wait_for_vblank(dev);
--
--		temp = REG_READ(map->dpll);
--		if ((temp & DPLL_VCO_ENABLE) != 0) {
--			REG_WRITE(map->dpll, temp & ~DPLL_VCO_ENABLE);
--			REG_READ(map->dpll);
-+			/* Wait for the clocks to turn off. */
-+			udelay(150);
- 		}
--
--		/* Wait for the clocks to turn off. */
--		udelay(150);
- 		break;
- 	}
- 
-@@ -367,6 +384,8 @@ static int oaktrail_crtc_mode_set(struct
- 	struct gma_encoder *gma_encoder = NULL;
- 	uint64_t scalingType = DRM_MODE_SCALE_FULLSCREEN;
- 	struct drm_connector *connector;
-+	int i;
-+	int need_aux = gma_pipe_has_type(crtc, INTEL_OUTPUT_SDVO) ? 1 : 0;
- 
- 	if (pipe == 1)
- 		return oaktrail_crtc_hdmi_mode_set(crtc, mode, adjusted_mode, x, y, old_fb);
-@@ -401,15 +420,17 @@ static int oaktrail_crtc_mode_set(struct
- 	}
- 
- 	/* Disable the VGA plane that we never use */
--	REG_WRITE(VGACNTRL, VGA_DISP_DISABLE);
-+	for (i = 0; i <= need_aux; i++)
-+		REG_WRITE_WITH_AUX(VGACNTRL, VGA_DISP_DISABLE, i);
- 
- 	/* Disable the panel fitter if it was on our pipe */
- 	if (oaktrail_panel_fitter_pipe(dev) == pipe)
- 		REG_WRITE(PFIT_CONTROL, 0);
- 
--	REG_WRITE(map->src,
--		  ((mode->crtc_hdisplay - 1) << 16) |
--		  (mode->crtc_vdisplay - 1));
-+	for (i = 0; i <= need_aux; i++) {
-+		REG_WRITE_WITH_AUX(map->src, ((mode->crtc_hdisplay - 1) << 16) |
-+					     (mode->crtc_vdisplay - 1), i);
-+	}
- 
- 	if (gma_encoder)
- 		drm_object_property_get_value(&connector->base,
-@@ -426,35 +447,39 @@ static int oaktrail_crtc_mode_set(struct
- 		offsetY = (adjusted_mode->crtc_vdisplay -
- 			   mode->crtc_vdisplay) / 2;
- 
--		REG_WRITE(map->htotal, (mode->crtc_hdisplay - 1) |
--			((adjusted_mode->crtc_htotal - 1) << 16));
--		REG_WRITE(map->vtotal, (mode->crtc_vdisplay - 1) |
--			((adjusted_mode->crtc_vtotal - 1) << 16));
--		REG_WRITE(map->hblank,
--			(adjusted_mode->crtc_hblank_start - offsetX - 1) |
--			((adjusted_mode->crtc_hblank_end - offsetX - 1) << 16));
--		REG_WRITE(map->hsync,
--			(adjusted_mode->crtc_hsync_start - offsetX - 1) |
--			((adjusted_mode->crtc_hsync_end - offsetX - 1) << 16));
--		REG_WRITE(map->vblank,
--			(adjusted_mode->crtc_vblank_start - offsetY - 1) |
--			((adjusted_mode->crtc_vblank_end - offsetY - 1) << 16));
--		REG_WRITE(map->vsync,
--			(adjusted_mode->crtc_vsync_start - offsetY - 1) |
--			((adjusted_mode->crtc_vsync_end - offsetY - 1) << 16));
-+		for (i = 0; i <= need_aux; i++) {
-+			REG_WRITE_WITH_AUX(map->htotal, (mode->crtc_hdisplay - 1) |
-+				((adjusted_mode->crtc_htotal - 1) << 16), i);
-+			REG_WRITE_WITH_AUX(map->vtotal, (mode->crtc_vdisplay - 1) |
-+				((adjusted_mode->crtc_vtotal - 1) << 16), i);
-+			REG_WRITE_WITH_AUX(map->hblank,
-+				(adjusted_mode->crtc_hblank_start - offsetX - 1) |
-+				((adjusted_mode->crtc_hblank_end - offsetX - 1) << 16), i);
-+			REG_WRITE_WITH_AUX(map->hsync,
-+				(adjusted_mode->crtc_hsync_start - offsetX - 1) |
-+				((adjusted_mode->crtc_hsync_end - offsetX - 1) << 16), i);
-+			REG_WRITE_WITH_AUX(map->vblank,
-+				(adjusted_mode->crtc_vblank_start - offsetY - 1) |
-+				((adjusted_mode->crtc_vblank_end - offsetY - 1) << 16), i);
-+			REG_WRITE_WITH_AUX(map->vsync,
-+				(adjusted_mode->crtc_vsync_start - offsetY - 1) |
-+				((adjusted_mode->crtc_vsync_end - offsetY - 1) << 16), i);
-+		}
- 	} else {
--		REG_WRITE(map->htotal, (adjusted_mode->crtc_hdisplay - 1) |
--			((adjusted_mode->crtc_htotal - 1) << 16));
--		REG_WRITE(map->vtotal, (adjusted_mode->crtc_vdisplay - 1) |
--			((adjusted_mode->crtc_vtotal - 1) << 16));
--		REG_WRITE(map->hblank, (adjusted_mode->crtc_hblank_start - 1) |
--			((adjusted_mode->crtc_hblank_end - 1) << 16));
--		REG_WRITE(map->hsync, (adjusted_mode->crtc_hsync_start - 1) |
--			((adjusted_mode->crtc_hsync_end - 1) << 16));
--		REG_WRITE(map->vblank, (adjusted_mode->crtc_vblank_start - 1) |
--			((adjusted_mode->crtc_vblank_end - 1) << 16));
--		REG_WRITE(map->vsync, (adjusted_mode->crtc_vsync_start - 1) |
--			((adjusted_mode->crtc_vsync_end - 1) << 16));
-+		for (i = 0; i <= need_aux; i++) {
-+			REG_WRITE_WITH_AUX(map->htotal, (adjusted_mode->crtc_hdisplay - 1) |
-+				((adjusted_mode->crtc_htotal - 1) << 16), i);
-+			REG_WRITE_WITH_AUX(map->vtotal, (adjusted_mode->crtc_vdisplay - 1) |
-+				((adjusted_mode->crtc_vtotal - 1) << 16), i);
-+			REG_WRITE_WITH_AUX(map->hblank, (adjusted_mode->crtc_hblank_start - 1) |
-+				((adjusted_mode->crtc_hblank_end - 1) << 16), i);
-+			REG_WRITE_WITH_AUX(map->hsync, (adjusted_mode->crtc_hsync_start - 1) |
-+				((adjusted_mode->crtc_hsync_end - 1) << 16), i);
-+			REG_WRITE_WITH_AUX(map->vblank, (adjusted_mode->crtc_vblank_start - 1) |
-+				((adjusted_mode->crtc_vblank_end - 1) << 16), i);
-+			REG_WRITE_WITH_AUX(map->vsync, (adjusted_mode->crtc_vsync_start - 1) |
-+				((adjusted_mode->crtc_vsync_end - 1) << 16), i);
-+		}
- 	}
- 
- 	/* Flush the plane changes */
-@@ -534,31 +559,35 @@ static int oaktrail_crtc_mode_set(struct
- 	dpll |= DPLL_VCO_ENABLE;
- 
- 	if (dpll & DPLL_VCO_ENABLE) {
--		REG_WRITE(map->fp0, fp);
--		REG_WRITE(map->dpll, dpll & ~DPLL_VCO_ENABLE);
--		REG_READ(map->dpll);
--		/* Check the DPLLA lock bit PIPEACONF[29] */
--		udelay(150);
-+		for (i = 0; i <= need_aux; i++) {
-+			REG_WRITE_WITH_AUX(map->fp0, fp, i);
-+			REG_WRITE_WITH_AUX(map->dpll, dpll & ~DPLL_VCO_ENABLE, i);
-+			REG_READ_WITH_AUX(map->dpll, i);
-+			/* Check the DPLLA lock bit PIPEACONF[29] */
-+			udelay(150);
-+		}
- 	}
- 
--	REG_WRITE(map->fp0, fp);
--	REG_WRITE(map->dpll, dpll);
--	REG_READ(map->dpll);
--	/* Wait for the clocks to stabilize. */
--	udelay(150);
--
--	/* write it again -- the BIOS does, after all */
--	REG_WRITE(map->dpll, dpll);
--	REG_READ(map->dpll);
--	/* Wait for the clocks to stabilize. */
--	udelay(150);
--
--	REG_WRITE(map->conf, pipeconf);
--	REG_READ(map->conf);
--	gma_wait_for_vblank(dev);
-+	for (i = 0; i <= need_aux; i++) {
-+		REG_WRITE_WITH_AUX(map->fp0, fp, i);
-+		REG_WRITE_WITH_AUX(map->dpll, dpll, i);
-+		REG_READ_WITH_AUX(map->dpll, i);
-+		/* Wait for the clocks to stabilize. */
-+		udelay(150);
- 
--	REG_WRITE(map->cntr, dspcntr);
--	gma_wait_for_vblank(dev);
-+		/* write it again -- the BIOS does, after all */
-+		REG_WRITE_WITH_AUX(map->dpll, dpll, i);
-+		REG_READ_WITH_AUX(map->dpll, i);
-+		/* Wait for the clocks to stabilize. */
-+		udelay(150);
-+
-+		REG_WRITE_WITH_AUX(map->conf, pipeconf, i);
-+		REG_READ_WITH_AUX(map->conf, i);
-+		gma_wait_for_vblank(dev);
-+
-+		REG_WRITE_WITH_AUX(map->cntr, dspcntr, i);
-+		gma_wait_for_vblank(dev);
-+	}
- 
- oaktrail_crtc_mode_set_exit:
- 	gma_power_end(dev);
---- a/drivers/gpu/drm/gma500/psb_drv.h
-+++ b/drivers/gpu/drm/gma500/psb_drv.h
-@@ -940,6 +940,22 @@ static inline uint32_t REGISTER_READ_AUX
- #define REG_READ(reg)	       REGISTER_READ(dev, (reg))
- #define REG_READ_AUX(reg)      REGISTER_READ_AUX(dev, (reg))
- 
-+/* Useful for post reads */
-+static inline uint32_t REGISTER_READ_WITH_AUX(struct drm_device *dev,
-+					      uint32_t reg, int aux)
-+{
-+	uint32_t val;
-+
-+	if (aux)
-+		val = REG_READ_AUX(reg);
-+	else
-+		val = REG_READ(reg);
-+
-+	return val;
-+}
-+
-+#define REG_READ_WITH_AUX(reg, aux) REGISTER_READ_WITH_AUX(dev, (reg), (aux))
-+
- static inline void REGISTER_WRITE(struct drm_device *dev, uint32_t reg,
- 				  uint32_t val)
- {
-@@ -957,6 +973,17 @@ static inline void REGISTER_WRITE_AUX(st
- #define REG_WRITE(reg, val)	REGISTER_WRITE(dev, (reg), (val))
- #define REG_WRITE_AUX(reg, val)	REGISTER_WRITE_AUX(dev, (reg), (val))
- 
-+static inline void REGISTER_WRITE_WITH_AUX(struct drm_device *dev, uint32_t reg,
-+				      uint32_t val, int aux)
-+{
-+	if (aux)
-+		REG_WRITE_AUX(reg, val);
-+	else
-+		REG_WRITE(reg, val);
-+}
-+
-+#define REG_WRITE_WITH_AUX(reg, val, aux) REGISTER_WRITE_WITH_AUX(dev, (reg), (val), (aux))
-+
- static inline void REGISTER_WRITE16(struct drm_device *dev,
- 					uint32_t reg, uint32_t val)
- {
diff --git a/patches.gma500/0040-drm-gma500-mrst-Properly-route-oaktrail-hdmi-hooks.patch b/patches.gma500/0040-drm-gma500-mrst-Properly-route-oaktrail-hdmi-hooks.patch
deleted file mode 100644
index 8da83e7de5155..0000000000000
--- a/patches.gma500/0040-drm-gma500-mrst-Properly-route-oaktrail-hdmi-hooks.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From bf579becc39ff67c7ce82109da2f881e9944adc8 Mon Sep 17 00:00:00 2001
-From: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-Date: Thu, 7 Nov 2013 00:22:59 +0100
-Subject: drm/gma500/mrst: Properly route oaktrail hdmi hooks
-
-Since we can have SDVO on Pipe B we better check the output type instead
-of pipe number for Oaktrail HDMI.
-
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-(cherry picked from commit 5aac788323dfdd61a6be31734170d644e5d7cb4f)
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
----
- drivers/gpu/drm/gma500/oaktrail_crtc.c |    4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
---- a/drivers/gpu/drm/gma500/oaktrail_crtc.c
-+++ b/drivers/gpu/drm/gma500/oaktrail_crtc.c
-@@ -230,7 +230,7 @@ static void oaktrail_crtc_dpms(struct dr
- 	int i;
- 	int need_aux = gma_pipe_has_type(crtc, INTEL_OUTPUT_SDVO) ? 1 : 0;
- 
--	if (pipe == 1) {
-+	if (gma_pipe_has_type(crtc, INTEL_OUTPUT_HDMI)) {
- 		oaktrail_crtc_hdmi_dpms(crtc, mode);
- 		return;
- 	}
-@@ -387,7 +387,7 @@ static int oaktrail_crtc_mode_set(struct
- 	int i;
- 	int need_aux = gma_pipe_has_type(crtc, INTEL_OUTPUT_SDVO) ? 1 : 0;
- 
--	if (pipe == 1)
-+	if (gma_pipe_has_type(crtc, INTEL_OUTPUT_HDMI))
- 		return oaktrail_crtc_hdmi_mode_set(crtc, mode, adjusted_mode, x, y, old_fb);
- 
- 	if (!gma_power_begin(dev, true))
diff --git a/patches.gma500/0041-drm-gma500-mrst-Add-aux-register-writes-to-SDVO.patch b/patches.gma500/0041-drm-gma500-mrst-Add-aux-register-writes-to-SDVO.patch
deleted file mode 100644
index 869038464c1f1..0000000000000
--- a/patches.gma500/0041-drm-gma500-mrst-Add-aux-register-writes-to-SDVO.patch
+++ /dev/null
@@ -1,124 +0,0 @@
-From a7e0738a9067d027251134a1830130d98f5ff791 Mon Sep 17 00:00:00 2001
-From: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-Date: Thu, 7 Nov 2013 02:21:07 +0100
-Subject: drm/gma500/mrst: Add aux register writes to SDVO
-
-This turned out to be tricky. Writing to SDVOB on the primary vdc also
-writes to SDVOB on the aux vdc, but reading it back on the primary vdc
-always fails. Basically we never read from the primary vdc since we
-will end up trashing the aux vdc.
-
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-(cherry picked from commit fb8e34d561d58297af06b7350d9fdcafced8e1c5)
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
----
- drivers/gpu/drm/gma500/psb_intel_sdvo.c |   59 ++++++++++++++++++++------------
- 1 file changed, 38 insertions(+), 21 deletions(-)
-
---- a/drivers/gpu/drm/gma500/psb_intel_sdvo.c
-+++ b/drivers/gpu/drm/gma500/psb_intel_sdvo.c
-@@ -228,24 +228,26 @@ static void psb_intel_sdvo_write_sdvox(s
- {
- 	struct drm_device *dev = psb_intel_sdvo->base.base.dev;
- 	u32 bval = val, cval = val;
--	int i;
-+	int i, j;
-+	int need_aux = IS_MRST(dev) ? 1 : 0;
- 
--	if (psb_intel_sdvo->sdvo_reg == SDVOB) {
--		cval = REG_READ(SDVOC);
--	} else {
--		bval = REG_READ(SDVOB);
--	}
--	/*
--	 * Write the registers twice for luck. Sometimes,
--	 * writing them only once doesn't appear to 'stick'.
--	 * The BIOS does this too. Yay, magic
--	 */
--	for (i = 0; i < 2; i++)
--	{
--		REG_WRITE(SDVOB, bval);
--		REG_READ(SDVOB);
--		REG_WRITE(SDVOC, cval);
--		REG_READ(SDVOC);
-+	for (j = 0; j <= need_aux; j++) {
-+		if (psb_intel_sdvo->sdvo_reg == SDVOB)
-+			cval = REG_READ_WITH_AUX(SDVOC, j);
-+		else
-+			bval = REG_READ_WITH_AUX(SDVOB, j);
-+
-+		/*
-+		* Write the registers twice for luck. Sometimes,
-+		* writing them only once doesn't appear to 'stick'.
-+		* The BIOS does this too. Yay, magic
-+		*/
-+		for (i = 0; i < 2; i++) {
-+			REG_WRITE_WITH_AUX(SDVOB, bval, j);
-+			REG_READ_WITH_AUX(SDVOB, j);
-+			REG_WRITE_WITH_AUX(SDVOC, cval, j);
-+			REG_READ_WITH_AUX(SDVOC, j);
-+		}
- 	}
- }
- 
-@@ -994,6 +996,7 @@ static void psb_intel_sdvo_mode_set(stru
- 	struct psb_intel_sdvo_dtd input_dtd;
- 	int pixel_multiplier = psb_intel_mode_get_pixel_multiplier(adjusted_mode);
- 	int rate;
-+	int need_aux = IS_MRST(dev) ? 1 : 0;
- 
- 	if (!mode)
- 		return;
-@@ -1059,7 +1062,11 @@ static void psb_intel_sdvo_mode_set(stru
- 		return;
- 
- 	/* Set the SDVO control regs. */
--	sdvox = REG_READ(psb_intel_sdvo->sdvo_reg);
-+	if (need_aux)
-+		sdvox = REG_READ_AUX(psb_intel_sdvo->sdvo_reg);
-+	else
-+		sdvox = REG_READ(psb_intel_sdvo->sdvo_reg);
-+
- 	switch (psb_intel_sdvo->sdvo_reg) {
- 	case SDVOB:
- 		sdvox &= SDVOB_PRESERVE_MASK;
-@@ -1089,6 +1096,8 @@ static void psb_intel_sdvo_dpms(struct d
- 	struct drm_device *dev = encoder->dev;
- 	struct psb_intel_sdvo *psb_intel_sdvo = to_psb_intel_sdvo(encoder);
- 	u32 temp;
-+	int i;
-+	int need_aux = IS_MRST(dev) ? 1 : 0;
- 
- 	switch (mode) {
- 	case DRM_MODE_DPMS_ON:
-@@ -1107,19 +1116,27 @@ static void psb_intel_sdvo_dpms(struct d
- 			psb_intel_sdvo_set_encoder_power_state(psb_intel_sdvo, mode);
- 
- 		if (mode == DRM_MODE_DPMS_OFF) {
--			temp = REG_READ(psb_intel_sdvo->sdvo_reg);
-+			if (need_aux)
-+				temp = REG_READ_AUX(psb_intel_sdvo->sdvo_reg);
-+			else
-+				temp = REG_READ(psb_intel_sdvo->sdvo_reg);
-+
- 			if ((temp & SDVO_ENABLE) != 0) {
- 				psb_intel_sdvo_write_sdvox(psb_intel_sdvo, temp & ~SDVO_ENABLE);
- 			}
- 		}
- 	} else {
- 		bool input1, input2;
--		int i;
- 		u8 status;
- 
--		temp = REG_READ(psb_intel_sdvo->sdvo_reg);
-+		if (need_aux)
-+			temp = REG_READ_AUX(psb_intel_sdvo->sdvo_reg);
-+		else
-+			temp = REG_READ(psb_intel_sdvo->sdvo_reg);
-+
- 		if ((temp & SDVO_ENABLE) == 0)
- 			psb_intel_sdvo_write_sdvox(psb_intel_sdvo, temp | SDVO_ENABLE);
-+
- 		for (i = 0; i < 2; i++)
- 			gma_wait_for_vblank(dev);
- 
diff --git a/patches.gma500/0042-drm-gma500-mrst-Replace-WMs-and-chickenbits-with-val.patch b/patches.gma500/0042-drm-gma500-mrst-Replace-WMs-and-chickenbits-with-val.patch
deleted file mode 100644
index a856ecac97b07..0000000000000
--- a/patches.gma500/0042-drm-gma500-mrst-Replace-WMs-and-chickenbits-with-val.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From e2a79affcdc3b27fedd04e7a7c1020e0a2c512ac Mon Sep 17 00:00:00 2001
-From: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-Date: Thu, 7 Nov 2013 02:34:12 +0100
-Subject: drm/gma500/mrst: Replace WMs and chickenbits with values from EMGD
-
-For the minnowboard to work the values found in EMGD are required.
-This might break Oaktrail but without hardware to test with I cannot
-really tell (and do not really care).
-
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-(cherry picked from commit 99d754bb46e41cf88f6e5d96dd3c6c3b9c3bddb3)
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
----
- drivers/gpu/drm/gma500/oaktrail_crtc.c |   13 ++++++-------
- 1 file changed, 6 insertions(+), 7 deletions(-)
-
---- a/drivers/gpu/drm/gma500/oaktrail_crtc.c
-+++ b/drivers/gpu/drm/gma500/oaktrail_crtc.c
-@@ -332,16 +332,15 @@ static void oaktrail_crtc_dpms(struct dr
- 		break;
- 	}
- 
--	/*Set FIFO Watermarks*/
--	REG_WRITE(DSPARB, 0x3FFF);
--	REG_WRITE(DSPFW1, 0x3F88080A);
--	REG_WRITE(DSPFW2, 0x0b060808);
-+	/* Set FIFO Watermarks (values taken from EMGD) */
-+	REG_WRITE(DSPARB, 0x3f80);
-+	REG_WRITE(DSPFW1, 0x3f8f0404);
-+	REG_WRITE(DSPFW2, 0x04040f04);
- 	REG_WRITE(DSPFW3, 0x0);
--	REG_WRITE(DSPFW4, 0x08030404);
-+	REG_WRITE(DSPFW4, 0x04040404);
- 	REG_WRITE(DSPFW5, 0x04040404);
- 	REG_WRITE(DSPFW6, 0x78);
--	REG_WRITE(0x70400, REG_READ(0x70400) | 0x4000);
--	/* Must write Bit 14 of the Chicken Bit Register */
-+	REG_WRITE(DSPCHICKENBIT, REG_READ(DSPCHICKENBIT) | 0xc040);
- 
- 	gma_power_end(dev);
- }
diff --git a/patches.gma500/0043-drm-gma500-mrst-Setup-GMBUS-for-oaktrail-mrst.patch b/patches.gma500/0043-drm-gma500-mrst-Setup-GMBUS-for-oaktrail-mrst.patch
deleted file mode 100644
index d53e44684c125..0000000000000
--- a/patches.gma500/0043-drm-gma500-mrst-Setup-GMBUS-for-oaktrail-mrst.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From cff86f3d04f6e9c10cd70cdc288f7d52a66c5395 Mon Sep 17 00:00:00 2001
-From: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-Date: Thu, 7 Nov 2013 03:04:04 +0100
-Subject: drm/gma500/mrst: Setup GMBUS for oaktrail/mrst
-
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-(cherry picked from commit 6528c897966c7d520f18ed4804c31a1f1aa8a3d9)
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
----
- drivers/gpu/drm/gma500/oaktrail_device.c |    2 ++
- 1 file changed, 2 insertions(+)
-
---- a/drivers/gpu/drm/gma500/oaktrail_device.c
-+++ b/drivers/gpu/drm/gma500/oaktrail_device.c
-@@ -526,6 +526,7 @@ static int oaktrail_chip_setup(struct dr
- 		psb_intel_opregion_init(dev);
- 		psb_intel_init_bios(dev);
- 	}
-+	gma_intel_setup_gmbus(dev);
- 	oaktrail_hdmi_setup(dev);
- 	return 0;
- }
-@@ -534,6 +535,7 @@ static void oaktrail_teardown(struct drm
- {
- 	struct drm_psb_private *dev_priv = dev->dev_private;
- 
-+	gma_intel_teardown_gmbus(dev);
- 	oaktrail_hdmi_teardown(dev);
- 	if (!dev_priv->has_gct)
- 		psb_intel_destroy_bios(dev);
diff --git a/patches.gma500/0044-drm-gma500-mrst-Don-t-blindly-guess-a-mode-for-LVDS.patch b/patches.gma500/0044-drm-gma500-mrst-Don-t-blindly-guess-a-mode-for-LVDS.patch
deleted file mode 100644
index 8ac76659f5258..0000000000000
--- a/patches.gma500/0044-drm-gma500-mrst-Don-t-blindly-guess-a-mode-for-LVDS.patch
+++ /dev/null
@@ -1,63 +0,0 @@
-From 07666a317c817b655077cd5a5f07a5fa78442f20 Mon Sep 17 00:00:00 2001
-From: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-Date: Fri, 8 Nov 2013 16:00:33 +0100
-Subject: drm/gma500/mrst: Don't blindly guess a mode for LVDS
-
-Previously we always had something hooked up to LVDS so we tried very
-hard to get a mode. With the Minnowboard this is no longer the case.
-If no mode can be found over DDC or the firmware we just ignore LVDS.
-
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-(cherry picked from commit 49a5d87a894681321d43ed80acb1edf705df0aea)
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
----
- drivers/gpu/drm/gma500/oaktrail_lvds.c |   30 +++---------------------------
- 1 file changed, 3 insertions(+), 27 deletions(-)
-
---- a/drivers/gpu/drm/gma500/oaktrail_lvds.c
-+++ b/drivers/gpu/drm/gma500/oaktrail_lvds.c
-@@ -218,30 +218,6 @@ static const struct drm_encoder_helper_f
- 	.commit = oaktrail_lvds_commit,
- };
- 
--static struct drm_display_mode lvds_configuration_modes[] = {
--	/* hard coded fixed mode for TPO LTPS LPJ040K001A */
--	{ DRM_MODE("800x480",  DRM_MODE_TYPE_DRIVER, 33264, 800, 836,
--		   846, 1056, 0, 480, 489, 491, 525, 0, 0) },
--	/* hard coded fixed mode for LVDS 800x480 */
--	{ DRM_MODE("800x480",  DRM_MODE_TYPE_DRIVER, 30994, 800, 801,
--		   802, 1024, 0, 480, 481, 482, 525, 0, 0) },
--	/* hard coded fixed mode for Samsung 480wsvga LVDS 1024x600@75 */
--	{ DRM_MODE("1024x600", DRM_MODE_TYPE_DRIVER, 53990, 1024, 1072,
--		   1104, 1184, 0, 600, 603, 604, 608, 0, 0) },
--	/* hard coded fixed mode for Samsung 480wsvga LVDS 1024x600@75 */
--	{ DRM_MODE("1024x600", DRM_MODE_TYPE_DRIVER, 53990, 1024, 1104,
--		   1136, 1184, 0, 600, 603, 604, 608, 0, 0) },
--	/* hard coded fixed mode for Sharp wsvga LVDS 1024x600 */
--	{ DRM_MODE("1024x600", DRM_MODE_TYPE_DRIVER, 48885, 1024, 1124,
--		   1204, 1312, 0, 600, 607, 610, 621, 0, 0) },
--	/* hard coded fixed mode for LVDS 1024x768 */
--	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
--		   1184, 1344, 0, 768, 771, 777, 806, 0, 0) },
--	/* hard coded fixed mode for LVDS 1366x768 */
--	{ DRM_MODE("1366x768", DRM_MODE_TYPE_DRIVER, 77500, 1366, 1430,
--		   1558, 1664, 0, 768, 769, 770, 776, 0, 0) },
--};
--
- /* Returns the panel fixed mode from configuration. */
- 
- static void oaktrail_lvds_get_configuration_mode(struct drm_device *dev,
-@@ -303,10 +279,10 @@ static void oaktrail_lvds_get_configurat
- 			mode_dev->panel_fixed_mode =
- 				drm_mode_duplicate(dev,
- 					dev_priv->lfp_lvds_vbt_mode);
--	/* Then guess */
-+
-+	/* If we still got no mode then bail */
- 	if (mode_dev->panel_fixed_mode == NULL)
--		mode_dev->panel_fixed_mode
--			= drm_mode_duplicate(dev, &lvds_configuration_modes[2]);
-+		return;
- 
- 	drm_mode_set_name(mode_dev->panel_fixed_mode);
- 	drm_mode_set_crtcinfo(mode_dev->panel_fixed_mode, 0);
diff --git a/patches.gma500/0045-drm-gma500-mrst-Add-SDVO-to-output-init.patch b/patches.gma500/0045-drm-gma500-mrst-Add-SDVO-to-output-init.patch
deleted file mode 100644
index 0b6b46dd7b3f9..0000000000000
--- a/patches.gma500/0045-drm-gma500-mrst-Add-SDVO-to-output-init.patch
+++ /dev/null
@@ -1,24 +0,0 @@
-From 578aa57b75f388405c91fb612df42c492a1acbe4 Mon Sep 17 00:00:00 2001
-From: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-Date: Fri, 8 Nov 2013 16:14:08 +0100
-Subject: drm/gma500/mrst: Add SDVO to output init
-
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-(cherry picked from commit cd3fdbe853c47c5890d5362363b59504c2e5fb5f)
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
----
- drivers/gpu/drm/gma500/oaktrail_device.c |    3 +++
- 1 file changed, 3 insertions(+)
-
---- a/drivers/gpu/drm/gma500/oaktrail_device.c
-+++ b/drivers/gpu/drm/gma500/oaktrail_device.c
-@@ -40,6 +40,9 @@ static int oaktrail_output_init(struct d
- 		dev_err(dev->dev, "DSI is not supported\n");
- 	if (dev_priv->hdmi_priv)
- 		oaktrail_hdmi_init(dev, &dev_priv->mode_dev);
-+
-+	psb_intel_sdvo_init(dev, SDVOB);
-+
- 	return 0;
- }
- 
diff --git a/patches.gma500/0046-drm-gma500-cdv-Add-and-hook-up-chip-op-for-watermark.patch b/patches.gma500/0046-drm-gma500-cdv-Add-and-hook-up-chip-op-for-watermark.patch
deleted file mode 100644
index 526021aa81bdf..0000000000000
--- a/patches.gma500/0046-drm-gma500-cdv-Add-and-hook-up-chip-op-for-watermark.patch
+++ /dev/null
@@ -1,78 +0,0 @@
-From 1a3369d3d2729108c26a1b3c9d340dcd580b0fbb Mon Sep 17 00:00:00 2001
-From: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-Date: Wed, 14 Aug 2013 19:14:17 +0200
-Subject: drm/gma500/cdv: Add and hook up chip op for watermarks
-
-Add a callback hook to the chip ops struct to allow chips to have their
-specific fifo watermark update function. Currently only cdv actually
-tries to set wms based on crtc configuration but if/when the other chips
-needs it we can attach a callback for them as well.
-
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-(cherry picked from commit 28a8194c12f8c8bb46aecd4cb1f36bac716714c4)
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
----
- drivers/gpu/drm/gma500/cdv_device.c        |    1 +
- drivers/gpu/drm/gma500/cdv_device.h        |    1 +
- drivers/gpu/drm/gma500/cdv_intel_display.c |    2 +-
- drivers/gpu/drm/gma500/gma_display.c       |    2 +-
- drivers/gpu/drm/gma500/gma_display.h       |    2 --
- drivers/gpu/drm/gma500/psb_drv.h           |    1 +
- 6 files changed, 5 insertions(+), 4 deletions(-)
-
---- a/drivers/gpu/drm/gma500/cdv_device.c
-+++ b/drivers/gpu/drm/gma500/cdv_device.c
-@@ -657,4 +657,5 @@ const struct psb_ops cdv_chip_ops = {
- 	.restore_regs = cdv_restore_display_registers,
- 	.power_down = cdv_power_down,
- 	.power_up = cdv_power_up,
-+	.update_wm = cdv_update_wm,
- };
---- a/drivers/gpu/drm/gma500/cdv_device.h
-+++ b/drivers/gpu/drm/gma500/cdv_device.h
-@@ -26,3 +26,4 @@ extern void cdv_hdmi_init(struct drm_dev
- 			int reg);
- extern struct drm_display_mode *cdv_intel_crtc_mode_get(struct drm_device *dev,
- 					     struct drm_crtc *crtc);
-+extern void cdv_update_wm(struct drm_device *dev, struct drm_crtc *crtc);
---- a/drivers/gpu/drm/gma500/cdv_intel_display.c
-+++ b/drivers/gpu/drm/gma500/cdv_intel_display.c
-@@ -532,7 +532,7 @@ void cdv_intel_disable_self_refresh(stru
- 
- }
- 
--void cdv_intel_update_watermark(struct drm_device *dev, struct drm_crtc *crtc)
-+void cdv_update_wm(struct drm_device *dev, struct drm_crtc *crtc)
- {
- 
- 	if (cdv_intel_single_pipe_active(dev)) {
---- a/drivers/gpu/drm/gma500/gma_display.c
-+++ b/drivers/gpu/drm/gma500/gma_display.c
-@@ -321,7 +321,7 @@ void gma_crtc_dpms(struct drm_crtc *crtc
- 	}
- 
- 	if (IS_CDV(dev))
--		cdv_intel_update_watermark(dev, crtc);
-+		dev_priv->ops->update_wm(dev, crtc);
- 
- 	/* Set FIFO watermarks */
- 	REG_WRITE(DSPARB, 0x3F3E);
---- a/drivers/gpu/drm/gma500/gma_display.h
-+++ b/drivers/gpu/drm/gma500/gma_display.h
-@@ -103,6 +103,4 @@ extern bool gma_find_best_pll(const stru
- 
- /* Cedarview specific functions */
- extern void cdv_intel_disable_self_refresh(struct drm_device *dev);
--extern void cdv_intel_update_watermark(struct drm_device *dev,
--				       struct drm_crtc *crtc);
- #endif
---- a/drivers/gpu/drm/gma500/psb_drv.h
-+++ b/drivers/gpu/drm/gma500/psb_drv.h
-@@ -700,6 +700,7 @@ struct psb_ops {
- 	int (*restore_regs)(struct drm_device *dev);
- 	int (*power_up)(struct drm_device *dev);
- 	int (*power_down)(struct drm_device *dev);
-+	void (*update_wm)(struct drm_device *dev, struct drm_crtc *crtc);
- 
- 	void (*lvds_bl_power)(struct drm_device *dev, bool on);
- #ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
diff --git a/patches.gma500/0047-drm-gma500-cdv-Add-and-hook-up-chip-op-for-disabling.patch b/patches.gma500/0047-drm-gma500-cdv-Add-and-hook-up-chip-op-for-disabling.patch
deleted file mode 100644
index 9c608a8b42918..0000000000000
--- a/patches.gma500/0047-drm-gma500-cdv-Add-and-hook-up-chip-op-for-disabling.patch
+++ /dev/null
@@ -1,95 +0,0 @@
-From afe1009ec742ccf5068f9a32eafa5a54080154bd Mon Sep 17 00:00:00 2001
-From: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-Date: Thu, 15 Aug 2013 00:54:44 +0200
-Subject: drm/gma500/cdv: Add and hook up chip op for disabling sr
-
-Add a callback hook to the chip ops struct to allow chips to have their
-specific self-refresh function. Currently only used by cdv.
-
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
-(cherry picked from commit 75346fe9bc4c9b366c760200a665a2c55b789389)
-Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
----
- drivers/gpu/drm/gma500/cdv_device.c        |    1 +
- drivers/gpu/drm/gma500/cdv_device.h        |    1 +
- drivers/gpu/drm/gma500/cdv_intel_display.c |    6 +++---
- drivers/gpu/drm/gma500/gma_display.c       |    2 +-
- drivers/gpu/drm/gma500/gma_display.h       |    3 ---
- drivers/gpu/drm/gma500/psb_drv.h           |    1 +
- 6 files changed, 7 insertions(+), 7 deletions(-)
-
---- a/drivers/gpu/drm/gma500/cdv_device.c
-+++ b/drivers/gpu/drm/gma500/cdv_device.c
-@@ -658,4 +658,5 @@ const struct psb_ops cdv_chip_ops = {
- 	.power_down = cdv_power_down,
- 	.power_up = cdv_power_up,
- 	.update_wm = cdv_update_wm,
-+	.disable_sr = cdv_disable_sr,
- };
---- a/drivers/gpu/drm/gma500/cdv_device.h
-+++ b/drivers/gpu/drm/gma500/cdv_device.h
-@@ -27,3 +27,4 @@ extern void cdv_hdmi_init(struct drm_dev
- extern struct drm_display_mode *cdv_intel_crtc_mode_get(struct drm_device *dev,
- 					     struct drm_crtc *crtc);
- extern void cdv_update_wm(struct drm_device *dev, struct drm_crtc *crtc);
-+extern void cdv_disable_sr(struct drm_device *dev);
---- a/drivers/gpu/drm/gma500/cdv_intel_display.c
-+++ b/drivers/gpu/drm/gma500/cdv_intel_display.c
-@@ -511,7 +511,7 @@ static bool is_pipeb_lvds(struct drm_dev
- 	return false;
- }
- 
--void cdv_intel_disable_self_refresh(struct drm_device *dev)
-+void cdv_disable_sr(struct drm_device *dev)
- {
- 	if (REG_READ(FW_BLC_SELF) & FW_BLC_SELF_EN) {
- 
-@@ -534,6 +534,7 @@ void cdv_intel_disable_self_refresh(stru
- 
- void cdv_update_wm(struct drm_device *dev, struct drm_crtc *crtc)
- {
-+	struct drm_psb_private *dev_priv = dev->dev_private;
- 
- 	if (cdv_intel_single_pipe_active(dev)) {
- 		u32 fw;
-@@ -587,8 +588,7 @@ void cdv_update_wm(struct drm_device *de
- 
- 		gma_wait_for_vblank(dev);
- 
--		cdv_intel_disable_self_refresh(dev);
--	
-+		dev_priv->ops->disable_sr(dev);
- 	}
- }
- 
---- a/drivers/gpu/drm/gma500/gma_display.c
-+++ b/drivers/gpu/drm/gma500/gma_display.c
-@@ -211,7 +211,7 @@ void gma_crtc_dpms(struct drm_crtc *crtc
- 	 */
- 
- 	if (IS_CDV(dev))
--		cdv_intel_disable_self_refresh(dev);
-+		dev_priv->ops->disable_sr(dev);
- 
- 	switch (mode) {
- 	case DRM_MODE_DPMS_ON:
---- a/drivers/gpu/drm/gma500/gma_display.h
-+++ b/drivers/gpu/drm/gma500/gma_display.h
-@@ -100,7 +100,4 @@ extern bool gma_pll_is_valid(struct drm_
- extern bool gma_find_best_pll(const struct gma_limit_t *limit,
- 			      struct drm_crtc *crtc, int target, int refclk,
- 			      struct gma_clock_t *best_clock);
--
--/* Cedarview specific functions */
--extern void cdv_intel_disable_self_refresh(struct drm_device *dev);
- #endif
---- a/drivers/gpu/drm/gma500/psb_drv.h
-+++ b/drivers/gpu/drm/gma500/psb_drv.h
-@@ -701,6 +701,7 @@ struct psb_ops {
- 	int (*power_up)(struct drm_device *dev);
- 	int (*power_down)(struct drm_device *dev);
- 	void (*update_wm)(struct drm_device *dev, struct drm_crtc *crtc);
-+	void (*disable_sr)(struct drm_device *dev);
- 
- 	void (*lvds_bl_power)(struct drm_device *dev, bool on);
- #ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
diff --git a/patches.ltsi/ltsi-makefile-addition.patch b/patches.ltsi/ltsi-makefile-addition.patch
index f8868342562f7..3663d0736eacd 100644
--- a/patches.ltsi/ltsi-makefile-addition.patch
+++ b/patches.ltsi/ltsi-makefile-addition.patch
@@ -17,10 +17,10 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 +++ b/Makefile
 @@ -1,7 +1,7 @@
  VERSION = 3
- PATCHLEVEL = 10
- SUBLEVEL = 31
+ PATCHLEVEL = 14
+ SUBLEVEL = 4
 -EXTRAVERSION =
 +EXTRAVERSION = -ltsi
- NAME = TOSSUG Baby Fish
+ NAME = Shuffling Zombie Juror
  
  # *DOCUMENTATION*
diff --git a/patches.lttng/lttng-2.3.4.patch b/patches.lttng/lttng-2.3.4.patch
index ff56cf5f538ca..a8937f05742a8 100644
--- a/patches.lttng/lttng-2.3.4.patch
+++ b/patches.lttng/lttng-2.3.4.patch
@@ -283,7 +283,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 
 --- a/MAINTAINERS
 +++ b/MAINTAINERS
-@@ -5079,6 +5079,13 @@ T:	git git://github.com/linux-test-proje
+@@ -5418,6 +5418,13 @@ T:	git git://github.com/linux-test-proje
  T:	git git://ltp.git.sourceforge.net/gitroot/ltp/ltp-dev
  S:	Maintained
  
@@ -299,19 +299,19 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  L:	linux-m32r@ml.linux-m32r.org (moderated for non-subscribers)
 --- a/drivers/staging/Kconfig
 +++ b/drivers/staging/Kconfig
-@@ -140,4 +140,6 @@ source "drivers/staging/netlogic/Kconfig
+@@ -146,4 +146,6 @@ source "drivers/staging/dgnc/Kconfig"
  
- source "drivers/staging/dwc2/Kconfig"
+ source "drivers/staging/dgap/Kconfig"
  
 +source "drivers/staging/lttng/Kconfig"
 +
  endif # STAGING
 --- a/drivers/staging/Makefile
 +++ b/drivers/staging/Makefile
-@@ -62,3 +62,4 @@ obj-$(CONFIG_FIREWIRE_SERIAL)	+= fwseria
- obj-$(CONFIG_ZCACHE)		+= zcache/
- obj-$(CONFIG_GOLDFISH)		+= goldfish/
- obj-$(CONFIG_USB_DWC2)		+= dwc2/
+@@ -65,3 +65,4 @@ obj-$(CONFIG_XILLYBUS)		+= xillybus/
+ obj-$(CONFIG_DGNC)			+= dgnc/
+ obj-$(CONFIG_DGAP)			+= dgap/
+ obj-$(CONFIG_MTD_SPINAND_MT29F)	+= mt29f_spinand/
 +obj-$(CONFIG_LTTNG)		+= lttng/
 --- /dev/null
 +++ b/drivers/staging/lttng/Kconfig
diff --git a/patches.minnowboard/0001-gpio-sch-Add-sch_gpio_resume_set_enable.patch b/patches.minnowboard/0001-gpio-sch-Add-sch_gpio_resume_set_enable.patch
deleted file mode 100644
index 3bee0794667dc..0000000000000
--- a/patches.minnowboard/0001-gpio-sch-Add-sch_gpio_resume_set_enable.patch
+++ /dev/null
@@ -1,63 +0,0 @@
-From c018204ed1246c0c2129cc2d48f444d89e926034 Mon Sep 17 00:00:00 2001
-Message-Id: <c018204ed1246c0c2129cc2d48f444d89e926034.1383605156.git.darren@dvhart.com>
-From: Darren Hart <dvhart@linux.intel.com>
-Date: Sat, 18 May 2013 14:45:54 -0700
-Subject: [PATCH 1/4] gpio-sch: Add sch_gpio_resume_set_enable()
-
-Allow for enabling and disabling of the resume well GPIOs. The E6xx Atom
-CPUs multiplex the resume GPIO 2:0 lines with LVDS and individual board
-drivers need to be able to enable or disable the lines appropriately.
-
-Unfortunately, the information regarding if the pins are being used for
-LVDS or GPIO is board specific and may not be available to the gpio-sch
-driver at probe time.
-
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/gpio/gpio-sch.c  |   24 ++++++++++++++++++++++++
- include/linux/gpio-sch.h |    6 ++++++
- 2 files changed, 30 insertions(+)
- create mode 100644 include/linux/gpio-sch.h
-
---- a/drivers/gpio/gpio-sch.c
-+++ b/drivers/gpio/gpio-sch.c
-@@ -41,6 +41,30 @@ static DEFINE_SPINLOCK(gpio_lock);
- 
- static unsigned short gpio_ba;
- 
-+void sch_gpio_resume_set_enable(unsigned gpio_num, int val)
-+{
-+	u8 curr_en;
-+	unsigned short offset, bit;
-+
-+	spin_lock(&gpio_lock);
-+
-+	offset = RGEN + gpio_num / 8;
-+	bit = gpio_num % 8;
-+
-+	curr_en = inb(gpio_ba + offset);
-+
-+	if (val) {
-+		if (!(curr_en & (1 << bit)))
-+			outb(curr_en | (1 << bit), gpio_ba + offset);
-+	} else {
-+		if ((curr_en & (1 << bit)))
-+			outb(curr_en & ~(1 << bit), gpio_ba + offset);
-+	}
-+
-+	spin_unlock(&gpio_lock);
-+}
-+EXPORT_SYMBOL_GPL(sch_gpio_resume_set_enable);
-+
- static int sch_gpio_core_direction_in(struct gpio_chip *gc, unsigned  gpio_num)
- {
- 	u8 curr_dirs;
---- /dev/null
-+++ b/include/linux/gpio-sch.h
-@@ -0,0 +1,6 @@
-+#ifndef _LINUX_GPIO_SCH_
-+#define _LINUX_GPIO_SCH_
-+
-+void sch_gpio_resume_set_enable(unsigned gpio_num, int val);
-+
-+#endif /* _LINUX_GPIO_SCH_ */
diff --git a/patches.minnowboard/0002-minnowboard-Add-base-platform-driver-for-the-MinnowB.patch b/patches.minnowboard/0002-minnowboard-Add-base-platform-driver-for-the-MinnowB.patch
deleted file mode 100644
index 9e824e8465e5b..0000000000000
--- a/patches.minnowboard/0002-minnowboard-Add-base-platform-driver-for-the-MinnowB.patch
+++ /dev/null
@@ -1,353 +0,0 @@
-From de5425c806cb4ca81666097fe70ee39b8a53877a Mon Sep 17 00:00:00 2001
-Message-Id: <de5425c806cb4ca81666097fe70ee39b8a53877a.1383605156.git.darren@dvhart.com>
-In-Reply-To: <c018204ed1246c0c2129cc2d48f444d89e926034.1383605156.git.darren@dvhart.com>
-References: <c018204ed1246c0c2129cc2d48f444d89e926034.1383605156.git.darren@dvhart.com>
-From: Darren Hart <dvhart@linux.intel.com>
-Date: Sat, 18 May 2013 14:45:57 -0700
-Subject: [PATCH 2/4] minnowboard: Add base platform driver for the MinnowBoard
-
-The MinnowBoard (http://www.minnowboard.org) is an Intel Atom (E6xx) plus EG20T
-PCH development board. It uses a few GPIO lines for specific purposes and
-exposes the rest to the user.
-
-Request the dedicated GPIO lines:
-	HWID
-	LVDS_DETECT
-	LED0
-	LED1
-
-Setup platform drivers for the MinnowBoard LEDs using the leds-gpio
-driver. Setup led0 and led1 with heartbeat and mmc0 default triggers
-respectively.
-
-GPIO lines SUS[0-4] are dual purpose, either for LVDS signaling or as
-user GPIO. Determine which via the LVDS_DETECT signal and enable or
-disable them accordingly.
-
-Provide a minimal public interface:
-	minnow_detect()
-	minnow_lvds_detect()
-	minnow_hwid()
-
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/platform/x86/Kconfig            |   20 +++
- drivers/platform/x86/Makefile           |    1 
- drivers/platform/x86/minnowboard-gpio.h |   58 +++++++++++
- drivers/platform/x86/minnowboard.c      |  167 ++++++++++++++++++++++++++++++++
- include/linux/minnowboard.h             |   37 +++++++
- 5 files changed, 283 insertions(+)
- create mode 100644 drivers/platform/x86/minnowboard-gpio.h
- create mode 100644 drivers/platform/x86/minnowboard.c
- create mode 100644 include/linux/minnowboard.h
-
---- a/drivers/platform/x86/Kconfig
-+++ b/drivers/platform/x86/Kconfig
-@@ -15,6 +15,26 @@ menuconfig X86_PLATFORM_DEVICES
- 
- if X86_PLATFORM_DEVICES
- 
-+config MINNOWBOARD
-+	tristate "MinnowBoard GPIO and LVDS support"
-+	depends on LPC_SCH
-+	depends on GPIO_SCH
-+	depends on GPIO_PCH
-+	depends on LEDS_GPIO
-+	default n
-+	---help---
-+	  This driver configures the MinnowBoard fixed functionality GPIO lines.
-+
-+	  It ensures that the E6XX SUS GPIOs muxed with LVDS signals (SUS[0:2])
-+	  are disabled if the LVDS_DETECT signal is asserted.
-+
-+	  If LED_TRIGGER* are enabled, LED0 will use the heartbeat trigger and
-+	  LED1 will use the mmc0 trigger.
-+
-+	  The Minnow Hardware ID is read from the GPIO HWID lines and logged.
-+
-+	  If you have a MinnowBoard, say Y or M here.
-+
- config ACER_WMI
- 	tristate "Acer WMI Laptop Extras"
- 	depends on ACPI
---- a/drivers/platform/x86/Makefile
-+++ b/drivers/platform/x86/Makefile
-@@ -2,6 +2,7 @@
- # Makefile for linux/drivers/platform/x86
- # x86 Platform-Specific Drivers
- #
-+obj-$(CONFIG_MINNOWBOARD)	+= minnowboard.o
- obj-$(CONFIG_ASUS_LAPTOP)	+= asus-laptop.o
- obj-$(CONFIG_ASUS_WMI)		+= asus-wmi.o
- obj-$(CONFIG_ASUS_NB_WMI)	+= asus-nb-wmi.o
---- /dev/null
-+++ b/drivers/platform/x86/minnowboard-gpio.h
-@@ -0,0 +1,58 @@
-+/*
-+ * MinnowBoard Linux platform driver
-+ * Copyright (c) 2013, Intel Corporation.
-+ * All rights reserved.
-+ *
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms and conditions of the GNU General Public License,
-+ * version 2, as published by the Free Software Foundation.
-+ *
-+ * This program is distributed in the hope it will be useful, but WITHOUT
-+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
-+ * more details.
-+ *
-+ * You should have received a copy of the GNU General Public License along with
-+ * this program; if not, write to the Free Software Foundation, Inc.,
-+ * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
-+ *
-+ * Author: Darren Hart <dvhart@linux.intel.com>
-+ */
-+
-+/* MinnowBoard GPIO definitions */
-+#define GPIO_BTN0 0
-+#define GPIO_BTN1 1
-+#define GPIO_BTN2 2
-+#define GPIO_BTN3 3
-+
-+#define GPIO_PROG_VOLTAGE 4
-+
-+/*
-+ * If !LVDS_DETECT, the AUX lines are available as GPIO,
-+ * otherwise they are used for LVDS signals.
-+ */
-+#define GPIO_AUX0 5
-+#define GPIO_AUX1 6
-+#define GPIO_AUX2 7
-+#define GPIO_AUX3 8
-+#define GPIO_AUX4 9
-+
-+#define GPIO_LED0 10
-+#define GPIO_LED1 11
-+
-+#define GPIO_USB_VBUS_DETECT 12
-+
-+#define GPIO_PCH0 244
-+#define GPIO_PCH1 245
-+#define GPIO_PCH2 246
-+#define GPIO_PCH3 247
-+#define GPIO_PCH4 248
-+#define GPIO_PCH5 249
-+#define GPIO_PCH6 250
-+#define GPIO_PCH7 251
-+
-+#define GPIO_HWID0 252
-+#define GPIO_HWID1 253
-+#define GPIO_HWID2 254
-+
-+#define GPIO_LVDS_DETECT 255
---- /dev/null
-+++ b/drivers/platform/x86/minnowboard.c
-@@ -0,0 +1,167 @@
-+/*
-+ * MinnowBoard Linux platform driver
-+ * Copyright (c) 2013, Intel Corporation.
-+ * All rights reserved.
-+ *
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms and conditions of the GNU General Public License,
-+ * version 2, as published by the Free Software Foundation.
-+ *
-+ * This program is distributed in the hope it will be useful, but WITHOUT
-+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
-+ * more details.
-+ *
-+ * You should have received a copy of the GNU General Public License along with
-+ * this program; if not, write to the Free Software Foundation, Inc.,
-+ * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
-+ *
-+ * Author: Darren Hart <dvhart@linux.intel.com>
-+ */
-+
-+#define pr_fmt(fmt) "MinnowBoard: " fmt
-+
-+#include <linux/platform_device.h>
-+#include <linux/module.h>
-+#include <linux/dmi.h>
-+#include <linux/input.h>
-+#include <linux/gpio.h>
-+#include <linux/leds.h>
-+#include <linux/gpio-sch.h>
-+#include <linux/delay.h>
-+#include <linux/minnowboard.h>
-+#include "minnowboard-gpio.h"
-+
-+static int minnow_hwid_val = -1;
-+
-+/* leds-gpio platform device structures */
-+static const struct gpio_led minnow_leds[] = {
-+	{ .name = "minnow_led0", .gpio = GPIO_LED0, .active_low = 0,
-+	  .retain_state_suspended = 1, .default_state = LEDS_GPIO_DEFSTATE_ON,
-+	  .default_trigger = "heartbeat"},
-+	{ .name = "minnow_led1", .gpio = GPIO_LED1, .active_low = 0,
-+	  .retain_state_suspended = 1, .default_state = LEDS_GPIO_DEFSTATE_ON,
-+	  .default_trigger = "mmc0"},
-+};
-+
-+static struct gpio_led_platform_data minnow_leds_platform_data = {
-+	.num_leds = ARRAY_SIZE(minnow_leds),
-+	.leds = (void *) minnow_leds,
-+};
-+
-+static struct platform_device minnow_gpio_leds = {
-+	.name =	"leds-gpio",
-+	.id = -1,
-+	.dev = {
-+		.platform_data = &minnow_leds_platform_data,
-+	},
-+};
-+
-+static struct gpio hwid_gpios[] = {
-+	{ GPIO_HWID0, GPIOF_DIR_IN | GPIOF_EXPORT, "minnow_gpio_hwid0" },
-+	{ GPIO_HWID1, GPIOF_DIR_IN | GPIOF_EXPORT, "minnow_gpio_hwid1" },
-+	{ GPIO_HWID2, GPIOF_DIR_IN | GPIOF_EXPORT, "minnow_gpio_hwid2" },
-+};
-+
-+int minnow_hwid(void)
-+{
-+	/* This should never be called prior to minnow_init_module() */
-+	WARN_ON_ONCE(minnow_hwid_val == -1);
-+	return minnow_hwid_val;
-+}
-+EXPORT_SYMBOL_GPL(minnow_hwid);
-+
-+bool minnow_detect(void)
-+{
-+	const char *cmp;
-+
-+	cmp = dmi_get_system_info(DMI_BOARD_NAME);
-+	if (cmp && strstr(cmp, "MinnowBoard"))
-+		return true;
-+
-+	return false;
-+}
-+EXPORT_SYMBOL_GPL(minnow_detect);
-+
-+bool minnow_lvds_detect(void)
-+{
-+	return !!gpio_get_value(GPIO_LVDS_DETECT);
-+}
-+EXPORT_SYMBOL_GPL(minnow_lvds_detect);
-+
-+
-+static int __init minnow_module_init(void)
-+{
-+	int err, val, i;
-+
-+	err = -ENODEV;
-+	if (!minnow_detect())
-+		goto out;
-+
-+#ifdef MODULE
-+/* Load any implicit dependencies that are not built-in */
-+#ifdef CONFIG_LPC_SCH_MODULE
-+	if (request_module("lpc_sch"))
-+		goto out;
-+#endif
-+#ifdef CONFIG_GPIO_SCH_MODULE
-+	if (request_module("gpio-sch"))
-+		goto out;
-+#endif
-+#ifdef CONFIG_GPIO_PCH_MODULE
-+	if (request_module("gpio-pch"))
-+		goto out;
-+#endif
-+#endif
-+
-+	/* HWID GPIOs */
-+	err = gpio_request_array(hwid_gpios, ARRAY_SIZE(hwid_gpios));
-+	if (err) {
-+		pr_err("Failed to request hwid GPIO lines\n");
-+		goto out;
-+	}
-+	minnow_hwid_val = (!!gpio_get_value(GPIO_HWID0)) |
-+			  (!!gpio_get_value(GPIO_HWID1) << 1) |
-+			  (!!gpio_get_value(GPIO_HWID2) << 2);
-+
-+	pr_info("Hardware ID: %d\n", minnow_hwid_val);
-+
-+	err = gpio_request_one(GPIO_LVDS_DETECT, GPIOF_DIR_IN | GPIOF_EXPORT,
-+			       "minnow_lvds_detect");
-+	if (err) {
-+		pr_err("Failed to request LVDS_DETECT GPIO line (%d)\n",
-+		       GPIO_LVDS_DETECT);
-+		goto out;
-+	}
-+
-+	/* Disable the GPIO lines if LVDS is detected */
-+	val = minnow_lvds_detect() ? 1 : 0;
-+	pr_info("Aux GPIO lines %s\n", val ? "Disabled" : "Enabled");
-+	for (i = 0; i < 5; i++)
-+		sch_gpio_resume_set_enable(i, !val);
-+
-+	/* GPIO LEDs */
-+	err = platform_device_register(&minnow_gpio_leds);
-+	if (err) {
-+		pr_err("Failed to register leds-gpio platform device\n");
-+		goto out_lvds;
-+	}
-+	goto out;
-+
-+ out_lvds:
-+	gpio_free(GPIO_LVDS_DETECT);
-+
-+ out:
-+	return err;
-+}
-+
-+static void __exit minnow_module_exit(void)
-+{
-+	gpio_free(GPIO_LVDS_DETECT);
-+	platform_device_unregister(&minnow_gpio_leds);
-+}
-+
-+module_init(minnow_module_init);
-+module_exit(minnow_module_exit);
-+
-+MODULE_LICENSE("GPL");
---- /dev/null
-+++ b/include/linux/minnowboard.h
-@@ -0,0 +1,37 @@
-+/*
-+ * MinnowBoard Linux platform driver
-+ * Copyright (c) 2013, Intel Corporation.
-+ * All rights reserved.
-+ *
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms and conditions of the GNU General Public License,
-+ * version 2, as published by the Free Software Foundation.
-+ *
-+ * This program is distributed in the hope it will be useful, but WITHOUT
-+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
-+ * more details.
-+ *
-+ * You should have received a copy of the GNU General Public License along with
-+ * this program; if not, write to the Free Software Foundation, Inc.,
-+ * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
-+ *
-+ * Author: Darren Hart <dvhart@linux.intel.com>
-+ */
-+
-+#ifndef _LINUX_MINNOWBOARD_H
-+#define _LINUX_MINNOWBOARD_H
-+
-+#if defined(CONFIG_MINNOWBOARD) || defined(CONFIG_MINNOWBOARD_MODULE)
-+bool minnow_detect(void);
-+bool minnow_lvds_detect(void);
-+int minnow_hwid(void);
-+void minnow_phy_reset(void);
-+#else
-+#define minnow_detect() (false)
-+#define minnow_lvds_detect() (false)
-+#define minnow_hwid() (-1)
-+#define minnow_phy_reset() do { } while (0)
-+#endif /* MINNOWBOARD */
-+
-+#endif /* _LINUX_MINNOWBOARD_H */
diff --git a/patches.minnowboard/0003-minnowboard-gpio-Export-MinnowBoard-expansion-GPIO.patch b/patches.minnowboard/0003-minnowboard-gpio-Export-MinnowBoard-expansion-GPIO.patch
deleted file mode 100644
index 6a1b34d2b51bf..0000000000000
--- a/patches.minnowboard/0003-minnowboard-gpio-Export-MinnowBoard-expansion-GPIO.patch
+++ /dev/null
@@ -1,172 +0,0 @@
-From 5d8dc9ea4644423ea4b8c57495ccf93efc1c51e1 Mon Sep 17 00:00:00 2001
-Message-Id: <5d8dc9ea4644423ea4b8c57495ccf93efc1c51e1.1383605156.git.darren@dvhart.com>
-In-Reply-To: <c018204ed1246c0c2129cc2d48f444d89e926034.1383605156.git.darren@dvhart.com>
-References: <c018204ed1246c0c2129cc2d48f444d89e926034.1383605156.git.darren@dvhart.com>
-From: Darren Hart <dvhart@linux.intel.com>
-Date: Sat, 18 May 2013 14:45:58 -0700
-Subject: [PATCH 3/4] minnowboard-gpio: Export MinnowBoard expansion GPIO
-
-Request and export the user-configurable GPIO lines to sysfs. This provides a
-label readable in /debugfs/gpio and a simple interface for experimenting with
-GPIO on the MinnowBoard.
-
-This is separate from the minnowboard driver to provide users with the
-flexibility to write kernel drivers for their own devices using these GPIO
-lines.
-
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/platform/x86/Kconfig            |   18 +++++
- drivers/platform/x86/Makefile           |    1 
- drivers/platform/x86/minnowboard-gpio.c |  108 ++++++++++++++++++++++++++++++++
- 3 files changed, 127 insertions(+)
- create mode 100644 drivers/platform/x86/minnowboard-gpio.c
-
---- a/drivers/platform/x86/Kconfig
-+++ b/drivers/platform/x86/Kconfig
-@@ -35,6 +35,24 @@ config MINNOWBOARD
- 
- 	  If you have a MinnowBoard, say Y or M here.
- 
-+if MINNOWBOARD
-+config MINNOWBOARD_GPIO
-+	tristate "MinnowBoard Expansion GPIO"
-+	depends on MINNOWBOARD
-+	default n
-+	---help---
-+	  Export the EG20T (gpio-pch) lines on the expansion connector to sysfs
-+	  for easy manipulation from userspace. These will be named
-+	  "minnow_gpio_pch[0-7]". If LVDS is not in use, export the E6XX
-+	  (gpio-sch) lines on the expansion connector to sysfs, these will be
-+	  named "minnow_gpio_aux[0-4]".
-+
-+	  If you have a MinnowBoard, and want to experiment with the GPIO,
-+	  say Y or M here.
-+
-+endif # MINNOWBOARD
-+
-+
- config ACER_WMI
- 	tristate "Acer WMI Laptop Extras"
- 	depends on ACPI
---- a/drivers/platform/x86/Makefile
-+++ b/drivers/platform/x86/Makefile
-@@ -3,6 +3,7 @@
- # x86 Platform-Specific Drivers
- #
- obj-$(CONFIG_MINNOWBOARD)	+= minnowboard.o
-+obj-$(CONFIG_MINNOWBOARD_GPIO)	+= minnowboard-gpio.o
- obj-$(CONFIG_ASUS_LAPTOP)	+= asus-laptop.o
- obj-$(CONFIG_ASUS_WMI)		+= asus-wmi.o
- obj-$(CONFIG_ASUS_NB_WMI)	+= asus-nb-wmi.o
---- /dev/null
-+++ b/drivers/platform/x86/minnowboard-gpio.c
-@@ -0,0 +1,108 @@
-+/*
-+ * MinnowBoard Linux platform driver
-+ * Copyright (c) 2013, Intel Corporation.
-+ * All rights reserved.
-+ *
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms and conditions of the GNU General Public License,
-+ * version 2, as published by the Free Software Foundation.
-+ *
-+ * This program is distributed in the hope it will be useful, but WITHOUT
-+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
-+ * more details.
-+ *
-+ * You should have received a copy of the GNU General Public License along with
-+ * this program; if not, write to the Free Software Foundation, Inc.,
-+ * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
-+ *
-+ * Author: Darren Hart <dvhart@linux.intel.com>
-+ */
-+
-+#include <linux/platform_device.h>
-+#include <linux/module.h>
-+#include <linux/gpio.h>
-+#include <linux/gpio_keys.h>
-+#include <linux/input.h>
-+#include <linux/minnowboard.h>
-+#include "minnowboard-gpio.h"
-+
-+static struct gpio expansion_gpios[] = {
-+	{ GPIO_PCH0, GPIOF_DIR_IN | GPIOF_EXPORT | GPIOF_EXPORT_CHANGEABLE,
-+	  "minnow_gpio_pch0" },
-+	{ GPIO_PCH1, GPIOF_DIR_IN | GPIOF_EXPORT | GPIOF_EXPORT_CHANGEABLE,
-+	  "minnow_gpio_pch1" },
-+	{ GPIO_PCH2, GPIOF_DIR_IN | GPIOF_EXPORT | GPIOF_EXPORT_CHANGEABLE,
-+	  "minnow_gpio_pch2" },
-+	{ GPIO_PCH3, GPIOF_DIR_IN | GPIOF_EXPORT | GPIOF_EXPORT_CHANGEABLE,
-+	  "minnow_gpio_pch3" },
-+	{ GPIO_PCH4, GPIOF_DIR_IN | GPIOF_EXPORT | GPIOF_EXPORT_CHANGEABLE,
-+	  "minnow_gpio_pch4" },
-+	{ GPIO_PCH5, GPIOF_DIR_IN | GPIOF_EXPORT | GPIOF_EXPORT_CHANGEABLE,
-+	  "minnow_gpio_pch5" },
-+	{ GPIO_PCH6, GPIOF_DIR_IN | GPIOF_EXPORT | GPIOF_EXPORT_CHANGEABLE,
-+	  "minnow_gpio_pch6" },
-+	{ GPIO_PCH7, GPIOF_DIR_IN | GPIOF_EXPORT | GPIOF_EXPORT_CHANGEABLE,
-+	  "minnow_gpio_pch7" },
-+};
-+
-+static struct gpio expansion_aux_gpios[] = {
-+	{ GPIO_AUX0, GPIOF_DIR_IN | GPIOF_EXPORT | GPIOF_EXPORT_CHANGEABLE,
-+	  "minnow_gpio_aux0" },
-+	{ GPIO_AUX1, GPIOF_DIR_IN | GPIOF_EXPORT | GPIOF_EXPORT_CHANGEABLE,
-+	  "minnow_gpio_aux1" },
-+	{ GPIO_AUX2, GPIOF_DIR_IN | GPIOF_EXPORT | GPIOF_EXPORT_CHANGEABLE,
-+	  "minnow_gpio_aux2" },
-+	{ GPIO_AUX3, GPIOF_DIR_IN | GPIOF_EXPORT | GPIOF_EXPORT_CHANGEABLE,
-+	  "minnow_gpio_aux3" },
-+	{ GPIO_AUX4, GPIOF_DIR_IN | GPIOF_EXPORT | GPIOF_EXPORT_CHANGEABLE,
-+	  "minnow_gpio_aux4" },
-+};
-+
-+static int __init minnow_gpio_module_init(void)
-+{
-+	int err;
-+
-+	err = -ENODEV;
-+	if (!minnow_detect())
-+		goto out;
-+
-+	/* Auxillary Expansion GPIOs */
-+	if (!minnow_lvds_detect()) {
-+		pr_debug("LVDS_DETECT not asserted, configuring Aux GPIO lines\n");
-+		err = gpio_request_array(expansion_aux_gpios,
-+					 ARRAY_SIZE(expansion_aux_gpios));
-+		if (err) {
-+			pr_err("Failed to request expansion aux GPIO lines\n");
-+			goto out;
-+		}
-+	} else {
-+		pr_debug("LVDS_DETECT asserted, ignoring aux GPIO lines\n");
-+	}
-+
-+	/* Expansion GPIOs */
-+	err = gpio_request_array(expansion_gpios, ARRAY_SIZE(expansion_gpios));
-+	if (err) {
-+		pr_err("Failed to request expansion GPIO lines\n");
-+		if (minnow_lvds_detect())
-+			gpio_free_array(expansion_aux_gpios,
-+					ARRAY_SIZE(expansion_aux_gpios));
-+		goto out;
-+	}
-+
-+ out:
-+	return err;
-+}
-+
-+static void __exit minnow_gpio_module_exit(void)
-+{
-+	if (minnow_lvds_detect())
-+		gpio_free_array(expansion_aux_gpios,
-+				ARRAY_SIZE(expansion_aux_gpios));
-+	gpio_free_array(expansion_gpios, ARRAY_SIZE(expansion_gpios));
-+}
-+
-+module_init(minnow_gpio_module_init);
-+module_exit(minnow_gpio_module_exit);
-+
-+MODULE_LICENSE("GPL");
diff --git a/patches.minnowboard/0004-minnowboard-keys-Bind-MinnowBoard-buttons-to-arrow-k.patch b/patches.minnowboard/0004-minnowboard-keys-Bind-MinnowBoard-buttons-to-arrow-k.patch
deleted file mode 100644
index b328cb19e155e..0000000000000
--- a/patches.minnowboard/0004-minnowboard-keys-Bind-MinnowBoard-buttons-to-arrow-k.patch
+++ /dev/null
@@ -1,162 +0,0 @@
-From f2e8f76ba6fdf47967d6dd0edc3332b0de3f488d Mon Sep 17 00:00:00 2001
-Message-Id: <f2e8f76ba6fdf47967d6dd0edc3332b0de3f488d.1383605156.git.darren@dvhart.com>
-In-Reply-To: <c018204ed1246c0c2129cc2d48f444d89e926034.1383605156.git.darren@dvhart.com>
-References: <c018204ed1246c0c2129cc2d48f444d89e926034.1383605156.git.darren@dvhart.com>
-From: Darren Hart <dvhart@linux.intel.com>
-Date: Sat, 18 May 2013 14:45:59 -0700
-Subject: [PATCH 4/4] minnowboard-keys: Bind MinnowBoard buttons to arrow keys
-
-Configure the four buttons tied to the E6XX GPIO lines on the
-MinnowBoard as keys using the gpio-keys-polled platform driver. From
-left to right, bind them to LEFT, DOWN, UP, RIGHT, similar to the VI
-directional keys.
-
-This is separate from the minnowboard driver to provide users with the
-flexibility to write kernel drivers for their own devices using these GPIO
-lines.
-
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
----
- drivers/platform/x86/Kconfig            |   14 ++++
- drivers/platform/x86/Makefile           |    1 
- drivers/platform/x86/minnowboard-keys.c |  101 ++++++++++++++++++++++++++++++++
- 3 files changed, 116 insertions(+)
- create mode 100644 drivers/platform/x86/minnowboard-keys.c
-
---- a/drivers/platform/x86/Kconfig
-+++ b/drivers/platform/x86/Kconfig
-@@ -50,6 +50,20 @@ config MINNOWBOARD_GPIO
- 	  If you have a MinnowBoard, and want to experiment with the GPIO,
- 	  say Y or M here.
- 
-+config MINNOWBOARD_KEYS
-+	tristate "MinnowBoard GPIO Keys"
-+	depends on MINNOWBOARD
-+	depends on KEYBOARD_GPIO_POLLED
-+	default n
-+	---help---
-+	  Configure the four buttons tied to the E6XX GPIO lines on the
-+	  MinnowBoard as keys using the gpio-keys-polled platform driver. From
-+	  left to right, bind them to LEFT, DOWN, UP, RIGHT, similar to the VI
-+	  directional keys.
-+
-+	  If you have a MinnowBoard and want to use the buttons as arrow keys,
-+	  say Y or M here.
-+
- endif # MINNOWBOARD
- 
- 
---- a/drivers/platform/x86/Makefile
-+++ b/drivers/platform/x86/Makefile
-@@ -4,6 +4,7 @@
- #
- obj-$(CONFIG_MINNOWBOARD)	+= minnowboard.o
- obj-$(CONFIG_MINNOWBOARD_GPIO)	+= minnowboard-gpio.o
-+obj-$(CONFIG_MINNOWBOARD_KEYS)	+= minnowboard-keys.o
- obj-$(CONFIG_ASUS_LAPTOP)	+= asus-laptop.o
- obj-$(CONFIG_ASUS_WMI)		+= asus-wmi.o
- obj-$(CONFIG_ASUS_NB_WMI)	+= asus-nb-wmi.o
---- /dev/null
-+++ b/drivers/platform/x86/minnowboard-keys.c
-@@ -0,0 +1,101 @@
-+/*
-+ * MinnowBoard Linux platform driver
-+ * Copyright (c) 2013, Intel Corporation.
-+ * All rights reserved.
-+ *
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms and conditions of the GNU General Public License,
-+ * version 2, as published by the Free Software Foundation.
-+ *
-+ * This program is distributed in the hope it will be useful, but WITHOUT
-+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
-+ * more details.
-+ *
-+ * You should have received a copy of the GNU General Public License along with
-+ * this program; if not, write to the Free Software Foundation, Inc.,
-+ * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
-+ *
-+ * Author: Darren Hart <dvhart@linux.intel.com>
-+ */
-+
-+#include <linux/platform_device.h>
-+#include <linux/module.h>
-+#include <linux/gpio.h>
-+#include <linux/gpio_keys.h>
-+#include <linux/input.h>
-+#include <linux/minnowboard.h>
-+#include "minnowboard-gpio.h"
-+
-+/* VI-style direction keys seem like as good as anything */
-+#define GPIO_BTN0_KEY KEY_LEFT
-+#define GPIO_BTN1_KEY KEY_DOWN
-+#define GPIO_BTN2_KEY KEY_UP
-+#define GPIO_BTN3_KEY KEY_RIGHT
-+
-+/* Timing in milliseconds */
-+#define GPIO_DEBOUNCE 1
-+#define BUTTON_POLL_INTERVAL 300
-+
-+/* gpio-keys platform device structures */
-+static struct gpio_keys_button minnow_buttons[] = {
-+	{ .code = GPIO_BTN0_KEY, .gpio = GPIO_BTN0, .active_low = 1,
-+	  .desc = "minnow_btn0", .type = EV_KEY, .wakeup = 0,
-+	  .debounce_interval = GPIO_DEBOUNCE, .can_disable = true },
-+	{ .code = GPIO_BTN1_KEY, .gpio = GPIO_BTN1, .active_low = 1,
-+	  .desc = "minnow_btn1", .type = EV_KEY, .wakeup = 0,
-+	  .debounce_interval = GPIO_DEBOUNCE, .can_disable = true },
-+	{ .code = GPIO_BTN2_KEY, .gpio = GPIO_BTN2, .active_low = 1,
-+	  .desc = "minnow_btn2", .type = EV_KEY, .wakeup = 0,
-+	  .debounce_interval = GPIO_DEBOUNCE, .can_disable = true },
-+	{ .code = GPIO_BTN3_KEY, .gpio = GPIO_BTN3, .active_low = 1,
-+	  .desc = "minnow_btn3", .type = EV_KEY, .wakeup = 0,
-+	  .debounce_interval = GPIO_DEBOUNCE, .can_disable = true },
-+};
-+
-+static const struct gpio_keys_platform_data minnow_buttons_platform_data = {
-+	.buttons = minnow_buttons,
-+	.nbuttons = ARRAY_SIZE(minnow_buttons),
-+	.poll_interval = BUTTON_POLL_INTERVAL,
-+	.rep = 1,
-+	.enable = NULL,
-+	.disable = NULL,
-+	.name = "minnow_buttons",
-+};
-+
-+static struct platform_device minnow_gpio_buttons = {
-+	.name = "gpio-keys-polled",
-+	.id = -1,
-+	.dev = {
-+		.platform_data = (void *) &minnow_buttons_platform_data,
-+	},
-+};
-+
-+static int __init minnow_keys_module_init(void)
-+{
-+	int err;
-+
-+	err = -ENODEV;
-+	if (!minnow_detect())
-+		goto out;
-+
-+	/* Export GPIO buttons to sysfs */
-+	err = platform_device_register(&minnow_gpio_buttons);
-+	if (err) {
-+		pr_err("Failed to register gpio-keys-polled platform device\n");
-+		goto out;
-+	}
-+
-+ out:
-+	return err;
-+}
-+
-+static void __exit minnow_keys_module_exit(void)
-+{
-+	platform_device_unregister(&minnow_gpio_buttons);
-+}
-+
-+module_init(minnow_keys_module_init);
-+module_exit(minnow_keys_module_exit);
-+
-+MODULE_LICENSE("GPL");
diff --git a/patches.minnowboard/pch_gbe-add-minnowboard-support.patch b/patches.minnowboard/pch_gbe-add-minnowboard-support.patch
deleted file mode 100644
index 8eeff6c64a227..0000000000000
--- a/patches.minnowboard/pch_gbe-add-minnowboard-support.patch
+++ /dev/null
@@ -1,293 +0,0 @@
-From f1a26fdf5944ff950888ae0017e546690353f85f Mon Sep 17 00:00:00 2001
-From: Darren Hart <dvhart@linux.intel.com>
-Date: Sat, 18 May 2013 14:46:00 -0700
-Subject: pch_gbe: Add MinnowBoard support
-
-From: Darren Hart <dvhart@linux.intel.com>
-
-commit f1a26fdf5944ff950888ae0017e546690353f85f upstream.
-
-The MinnowBoard uses an AR803x PHY with the PCH GBE which requires
-special handling. Use the MinnowBoard PCI Subsystem ID to detect this
-and add a pci_device_id.driver_data structure and functions to handle
-platform setup.
-
-The AR803x does not implement the RGMII 2ns TX clock delay in the trace
-routing nor via strapping. Add a detection method for the board and the
-PHY and enable the TX clock delay via the registers.
-
-This PHY will hibernate without link for 10 seconds. Ensure the PHY is
-awake for probe and then disable hibernation. A future improvement would
-be to convert pch_gbe to using PHYLIB and making sure we can wake the
-PHY at the necessary times rather than permanently disabling it.
-
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
-Cc: "David S. Miller" <davem@davemloft.net>
-Cc: "H. Peter Anvin" <hpa@zytor.com>
-Cc: Peter Waskiewicz <peter.p.waskiewicz.jr@intel.com>
-Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-Cc: Joe Perches <joe@perches.com>
-Cc: netdev@vger.kernel.org
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-
----
- drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe.h      |   15 ++
- drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c |   49 +++++++++
- drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_phy.c  |   97 +++++++++++++++++++
- drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_phy.h  |    1 
- 4 files changed, 162 insertions(+)
-
---- a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe.h
-+++ b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe.h
-@@ -582,6 +582,19 @@ struct pch_gbe_hw_stats {
- };
- 
- /**
-+ * struct pch_gbe_privdata - PCI Device ID driver data
-+ * @phy_tx_clk_delay:		Bool, configure the PHY TX delay in software
-+ * @phy_disable_hibernate:	Bool, disable PHY hibernation
-+ * @platform_init:		Platform initialization callback, called from
-+ *				probe, prior to PHY initialization.
-+ */
-+struct pch_gbe_privdata {
-+	bool phy_tx_clk_delay;
-+	bool phy_disable_hibernate;
-+	int (*platform_init)(struct pci_dev *pdev);
-+};
-+
-+/**
-  * struct pch_gbe_adapter - board specific private data structure
-  * @stats_lock:	Spinlock structure for status
-  * @ethtool_lock:	Spinlock structure for ethtool
-@@ -604,6 +617,7 @@ struct pch_gbe_hw_stats {
-  * @rx_buffer_len:	Receive buffer length
-  * @tx_queue_len:	Transmit queue length
-  * @have_msi:		PCI MSI mode flag
-+ * @pch_gbe_privdata:	PCI Device ID driver_data
-  */
- 
- struct pch_gbe_adapter {
-@@ -631,6 +645,7 @@ struct pch_gbe_adapter {
- 	int hwts_tx_en;
- 	int hwts_rx_en;
- 	struct pci_dev *ptp_pdev;
-+	struct pch_gbe_privdata *pdata;
- };
- 
- #define pch_gbe_hw_to_adapter(hw)	container_of(hw, struct pch_gbe_adapter, hw)
---- a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c
-+++ b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c
-@@ -23,6 +23,7 @@
- #include <linux/module.h>
- #include <linux/net_tstamp.h>
- #include <linux/ptp_classify.h>
-+#include <linux/gpio.h>
- 
- #define DRV_VERSION     "1.01"
- const char pch_driver_version[] = DRV_VERSION;
-@@ -111,6 +112,8 @@ const char pch_driver_version[] = DRV_VE
- #define PTP_L4_MULTICAST_SA "01:00:5e:00:01:81"
- #define PTP_L2_MULTICAST_SA "01:1b:19:00:00:00"
- 
-+#define MINNOW_PHY_RESET_GPIO		13
-+
- static unsigned int copybreak __read_mostly = PCH_GBE_COPYBREAK_DEFAULT;
- 
- static int pch_gbe_mdio_read(struct net_device *netdev, int addr, int reg);
-@@ -2635,6 +2638,9 @@ static int pch_gbe_probe(struct pci_dev
- 	adapter->pdev = pdev;
- 	adapter->hw.back = adapter;
- 	adapter->hw.reg = pcim_iomap_table(pdev)[PCH_GBE_PCI_BAR];
-+	adapter->pdata = (struct pch_gbe_privdata *)pci_id->driver_data;
-+	if (adapter->pdata && adapter->pdata->platform_init)
-+		adapter->pdata->platform_init(pdev);
- 
- 	adapter->ptp_pdev = pci_get_bus_and_slot(adapter->pdev->bus->number,
- 					       PCI_DEVFN(12, 4));
-@@ -2710,6 +2716,10 @@ static int pch_gbe_probe(struct pci_dev
- 
- 	dev_dbg(&pdev->dev, "PCH Network Connection\n");
- 
-+	/* Disable hibernation on certain platforms */
-+	if (adapter->pdata && adapter->pdata->phy_disable_hibernate)
-+		pch_gbe_phy_disable_hibernate(&adapter->hw);
-+
- 	device_set_wakeup_enable(&pdev->dev, 1);
- 	return 0;
- 
-@@ -2720,9 +2730,48 @@ err_free_netdev:
- 	return ret;
- }
- 
-+/* The AR803X PHY on the MinnowBoard requires a physical pin to be toggled to
-+ * ensure it is awake for probe and init. Request the line and reset the PHY.
-+ */
-+static int pch_gbe_minnow_platform_init(struct pci_dev *pdev)
-+{
-+	unsigned long flags = GPIOF_DIR_OUT | GPIOF_INIT_HIGH | GPIOF_EXPORT;
-+	unsigned gpio = MINNOW_PHY_RESET_GPIO;
-+	int ret;
-+
-+	ret = devm_gpio_request_one(&pdev->dev, gpio, flags,
-+				    "minnow_phy_reset");
-+	if (ret) {
-+		dev_err(&pdev->dev,
-+			"ERR: Can't request PHY reset GPIO line '%d'\n", gpio);
-+		return ret;
-+	}
-+
-+	gpio_set_value(gpio, 0);
-+	usleep_range(1250, 1500);
-+	gpio_set_value(gpio, 1);
-+	usleep_range(1250, 1500);
-+
-+	return ret;
-+}
-+
-+static struct pch_gbe_privdata pch_gbe_minnow_privdata = {
-+	.phy_tx_clk_delay = true,
-+	.phy_disable_hibernate = true,
-+	.platform_init = pch_gbe_minnow_platform_init,
-+};
-+
- static DEFINE_PCI_DEVICE_TABLE(pch_gbe_pcidev_id) = {
- 	{.vendor = PCI_VENDOR_ID_INTEL,
- 	 .device = PCI_DEVICE_ID_INTEL_IOH1_GBE,
-+	 .subvendor = PCI_VENDOR_ID_CIRCUITCO,
-+	 .subdevice = PCI_SUBSYSTEM_ID_CIRCUITCO_MINNOWBOARD,
-+	 .class = (PCI_CLASS_NETWORK_ETHERNET << 8),
-+	 .class_mask = (0xFFFF00),
-+	 .driver_data = (kernel_ulong_t)&pch_gbe_minnow_privdata
-+	 },
-+	{.vendor = PCI_VENDOR_ID_INTEL,
-+	 .device = PCI_DEVICE_ID_INTEL_IOH1_GBE,
- 	 .subvendor = PCI_ANY_ID,
- 	 .subdevice = PCI_ANY_ID,
- 	 .class = (PCI_CLASS_NETWORK_ETHERNET << 8),
---- a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_phy.c
-+++ b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_phy.c
-@@ -74,6 +74,15 @@
- #define MII_SR_100X_FD_CAPS      0x4000	/* 100X  Full Duplex Capable */
- #define MII_SR_100T4_CAPS        0x8000	/* 100T4 Capable */
- 
-+/* AR8031 PHY Debug Registers */
-+#define PHY_AR803X_ID           0x00001374
-+#define PHY_AR8031_DBG_OFF      0x1D
-+#define PHY_AR8031_DBG_DAT      0x1E
-+#define PHY_AR8031_SERDES       0x05
-+#define PHY_AR8031_HIBERNATE    0x0B
-+#define PHY_AR8031_SERDES_TX_CLK_DLY   0x0100 /* TX clock delay of 2.0ns */
-+#define PHY_AR8031_PS_HIB_EN           0x8000 /* Hibernate enable */
-+
- /* Phy Id Register (word 2) */
- #define PHY_REVISION_MASK        0x000F
- 
-@@ -249,6 +258,51 @@ inline void pch_gbe_phy_set_rgmii(struct
- }
- 
- /**
-+ * pch_gbe_phy_tx_clk_delay - Setup TX clock delay via the PHY
-+ * @hw:	            Pointer to the HW structure
-+ * Returns
-+ *	0:		Successful.
-+ *	-EINVAL:	Invalid argument.
-+ */
-+static int pch_gbe_phy_tx_clk_delay(struct pch_gbe_hw *hw)
-+{
-+	/* The RGMII interface requires a ~2ns TX clock delay. This is typically
-+	 * done in layout with a longer trace or via PHY strapping, but can also
-+	 * be done via PHY configuration registers.
-+	 */
-+	struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
-+	u16 mii_reg;
-+	int ret = 0;
-+
-+	switch (hw->phy.id) {
-+	case PHY_AR803X_ID:
-+		netdev_dbg(adapter->netdev,
-+			   "Configuring AR803X PHY for 2ns TX clock delay\n");
-+		pch_gbe_phy_read_reg_miic(hw, PHY_AR8031_DBG_OFF, &mii_reg);
-+		ret = pch_gbe_phy_write_reg_miic(hw, PHY_AR8031_DBG_OFF,
-+						 PHY_AR8031_SERDES);
-+		if (ret)
-+			break;
-+
-+		pch_gbe_phy_read_reg_miic(hw, PHY_AR8031_DBG_DAT, &mii_reg);
-+		mii_reg |= PHY_AR8031_SERDES_TX_CLK_DLY;
-+		ret = pch_gbe_phy_write_reg_miic(hw, PHY_AR8031_DBG_DAT,
-+						 mii_reg);
-+		break;
-+	default:
-+		netdev_err(adapter->netdev,
-+			   "Unknown PHY (%x), could not set TX clock delay\n",
-+			   hw->phy.id);
-+		return -EINVAL;
-+	}
-+
-+	if (ret)
-+		netdev_err(adapter->netdev,
-+			   "Could not configure tx clock delay for PHY\n");
-+	return ret;
-+}
-+
-+/**
-  * pch_gbe_phy_init_setting - PHY initial setting
-  * @hw:	            Pointer to the HW structure
-  */
-@@ -278,4 +332,47 @@ void pch_gbe_phy_init_setting(struct pch
- 	mii_reg |= PHYSP_CTRL_ASSERT_CRS_TX;
- 	pch_gbe_phy_write_reg_miic(hw, PHY_PHYSP_CONTROL, mii_reg);
- 
-+	/* Setup a TX clock delay on certain platforms */
-+	if (adapter->pdata && adapter->pdata->phy_tx_clk_delay)
-+		pch_gbe_phy_tx_clk_delay(hw);
-+}
-+
-+/**
-+ * pch_gbe_phy_disable_hibernate - Disable the PHY low power state
-+ * @hw:	            Pointer to the HW structure
-+ * Returns
-+ *	0:		Successful.
-+ *	-EINVAL:	Invalid argument.
-+ */
-+int pch_gbe_phy_disable_hibernate(struct pch_gbe_hw *hw)
-+{
-+	struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
-+	u16 mii_reg;
-+	int ret = 0;
-+
-+	switch (hw->phy.id) {
-+	case PHY_AR803X_ID:
-+		netdev_dbg(adapter->netdev,
-+			   "Disabling hibernation for AR803X PHY\n");
-+		ret = pch_gbe_phy_write_reg_miic(hw, PHY_AR8031_DBG_OFF,
-+						 PHY_AR8031_HIBERNATE);
-+		if (ret)
-+			break;
-+
-+		pch_gbe_phy_read_reg_miic(hw, PHY_AR8031_DBG_DAT, &mii_reg);
-+		mii_reg &= ~PHY_AR8031_PS_HIB_EN;
-+		ret = pch_gbe_phy_write_reg_miic(hw, PHY_AR8031_DBG_DAT,
-+						 mii_reg);
-+		break;
-+	default:
-+		netdev_err(adapter->netdev,
-+			   "Unknown PHY (%x), could not disable hibernation\n",
-+			   hw->phy.id);
-+		return -EINVAL;
-+	}
-+
-+	if (ret)
-+		netdev_err(adapter->netdev,
-+			   "Could not disable PHY hibernation\n");
-+	return ret;
- }
---- a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_phy.h
-+++ b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_phy.h
-@@ -33,5 +33,6 @@ void pch_gbe_phy_power_up(struct pch_gbe
- void pch_gbe_phy_power_down(struct pch_gbe_hw *hw);
- void pch_gbe_phy_set_rgmii(struct pch_gbe_hw *hw);
- void pch_gbe_phy_init_setting(struct pch_gbe_hw *hw);
-+int pch_gbe_phy_disable_hibernate(struct pch_gbe_hw *hw);
- 
- #endif /* _PCH_GBE_PHY_H_ */
diff --git a/patches.minnowboard/pch_gbe-convert-pr_-to-netdev_.patch b/patches.minnowboard/pch_gbe-convert-pr_-to-netdev_.patch
deleted file mode 100644
index 9ff1d7acb4744..0000000000000
--- a/patches.minnowboard/pch_gbe-convert-pr_-to-netdev_.patch
+++ /dev/null
@@ -1,1157 +0,0 @@
-From 453ca931f515161902dbb325d7f39a992c3059ce Mon Sep 17 00:00:00 2001
-From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-Date: Fri, 28 Jun 2013 14:02:53 +0300
-Subject: pch_gbe: convert pr_* to netdev_*
-
-From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-
-commit 453ca931f515161902dbb325d7f39a992c3059ce upstream.
-
-We may use nice macros to prefix our messages with proper device name.
-
-Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-
----
- drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe.h         |    2 
- drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_api.c     |   49 +-
- drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_ethtool.c |    2 
- drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c    |  275 +++++++++-------
- drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_param.c   |   63 ++-
- drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_phy.c     |   23 -
- 6 files changed, 250 insertions(+), 164 deletions(-)
-
---- a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe.h
-+++ b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe.h
-@@ -633,6 +633,8 @@ struct pch_gbe_adapter {
- 	struct pci_dev *ptp_pdev;
- };
- 
-+#define pch_gbe_hw_to_adapter(hw)	container_of(hw, struct pch_gbe_adapter, hw)
-+
- extern const char pch_driver_version[];
- 
- /* pch_gbe_main.c */
---- a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_api.c
-+++ b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_api.c
-@@ -70,7 +70,9 @@ static s32 pch_gbe_plat_init_hw(struct p
- 
- 	ret_val = pch_gbe_phy_get_id(hw);
- 	if (ret_val) {
--		pr_err("pch_gbe_phy_get_id error\n");
-+		struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
-+
-+		netdev_err(adapter->netdev, "pch_gbe_phy_get_id error\n");
- 		return ret_val;
- 	}
- 	pch_gbe_phy_init_setting(hw);
-@@ -115,7 +117,9 @@ static void pch_gbe_plat_init_function_p
- inline s32 pch_gbe_hal_setup_init_funcs(struct pch_gbe_hw *hw)
- {
- 	if (!hw->reg) {
--		pr_err("ERROR: Registers not mapped\n");
-+		struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
-+
-+		netdev_err(adapter->netdev, "ERROR: Registers not mapped\n");
- 		return -ENOSYS;
- 	}
- 	pch_gbe_plat_init_function_pointers(hw);
-@@ -128,10 +132,13 @@ inline s32 pch_gbe_hal_setup_init_funcs(
-  */
- inline void pch_gbe_hal_get_bus_info(struct pch_gbe_hw *hw)
- {
--	if (!hw->func->get_bus_info)
--		pr_err("ERROR: configuration\n");
--	else
--		hw->func->get_bus_info(hw);
-+	if (!hw->func->get_bus_info) {
-+		struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
-+
-+		netdev_err(adapter->netdev, "ERROR: configuration\n");
-+		return;
-+	}
-+	hw->func->get_bus_info(hw);
- }
- 
- /**
-@@ -144,7 +151,9 @@ inline void pch_gbe_hal_get_bus_info(str
- inline s32 pch_gbe_hal_init_hw(struct pch_gbe_hw *hw)
- {
- 	if (!hw->func->init_hw) {
--		pr_err("ERROR: configuration\n");
-+		struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
-+
-+		netdev_err(adapter->netdev, "ERROR: configuration\n");
- 		return -ENOSYS;
- 	}
- 	return hw->func->init_hw(hw);
-@@ -190,10 +199,13 @@ inline s32 pch_gbe_hal_write_phy_reg(str
-  */
- inline void pch_gbe_hal_phy_hw_reset(struct pch_gbe_hw *hw)
- {
--	if (!hw->func->reset_phy)
--		pr_err("ERROR: configuration\n");
--	else
--		hw->func->reset_phy(hw);
-+	if (!hw->func->reset_phy) {
-+		struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
-+
-+		netdev_err(adapter->netdev, "ERROR: configuration\n");
-+		return;
-+	}
-+	hw->func->reset_phy(hw);
- }
- 
- /**
-@@ -202,10 +214,13 @@ inline void pch_gbe_hal_phy_hw_reset(str
-  */
- inline void pch_gbe_hal_phy_sw_reset(struct pch_gbe_hw *hw)
- {
--	if (!hw->func->sw_reset_phy)
--		pr_err("ERROR: configuration\n");
--	else
--		hw->func->sw_reset_phy(hw);
-+	if (!hw->func->sw_reset_phy) {
-+		struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
-+
-+		netdev_err(adapter->netdev, "ERROR: configuration\n");
-+		return;
-+	}
-+	hw->func->sw_reset_phy(hw);
- }
- 
- /**
-@@ -218,7 +233,9 @@ inline void pch_gbe_hal_phy_sw_reset(str
- inline s32 pch_gbe_hal_read_mac_addr(struct pch_gbe_hw *hw)
- {
- 	if (!hw->func->read_mac_addr) {
--		pr_err("ERROR: configuration\n");
-+		struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
-+
-+		netdev_err(adapter->netdev, "ERROR: configuration\n");
- 		return -ENOSYS;
- 	}
- 	return hw->func->read_mac_addr(hw);
---- a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_ethtool.c
-+++ b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_ethtool.c
-@@ -122,7 +122,7 @@ static int pch_gbe_set_settings(struct n
- 	}
- 	ret = mii_ethtool_sset(&adapter->mii, ecmd);
- 	if (ret) {
--		pr_err("Error: mii_ethtool_sset\n");
-+		netdev_err(netdev, "Error: mii_ethtool_sset\n");
- 		return ret;
- 	}
- 	hw->mac.link_speed = speed;
---- a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c
-+++ b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c
-@@ -300,6 +300,7 @@ inline void pch_gbe_mac_load_mac_addr(st
-  */
- s32 pch_gbe_mac_read_mac_addr(struct pch_gbe_hw *hw)
- {
-+	struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
- 	u32  adr1a, adr1b;
- 
- 	adr1a = ioread32(&hw->reg->mac_adr[0].high);
-@@ -312,7 +313,7 @@ s32 pch_gbe_mac_read_mac_addr(struct pch
- 	hw->mac.addr[4] = (u8)(adr1b & 0xFF);
- 	hw->mac.addr[5] = (u8)((adr1b >> 8) & 0xFF);
- 
--	pr_debug("hw->mac.addr : %pM\n", hw->mac.addr);
-+	netdev_dbg(adapter->netdev, "hw->mac.addr : %pM\n", hw->mac.addr);
- 	return 0;
- }
- 
-@@ -324,6 +325,7 @@ s32 pch_gbe_mac_read_mac_addr(struct pch
- static void pch_gbe_wait_clr_bit(void *reg, u32 bit)
- {
- 	u32 tmp;
-+
- 	/* wait busy */
- 	tmp = 1000;
- 	while ((ioread32(reg) & bit) && --tmp)
-@@ -340,9 +342,10 @@ static void pch_gbe_wait_clr_bit(void *r
-  */
- static void pch_gbe_mac_mar_set(struct pch_gbe_hw *hw, u8 * addr, u32 index)
- {
-+	struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
- 	u32 mar_low, mar_high, adrmask;
- 
--	pr_debug("index : 0x%x\n", index);
-+	netdev_dbg(adapter->netdev, "index : 0x%x\n", index);
- 
- 	/*
- 	 * HW expects these in little endian so we reverse the byte order
-@@ -468,10 +471,11 @@ static void pch_gbe_mac_mc_addr_list_upd
-  */
- s32 pch_gbe_mac_force_mac_fc(struct pch_gbe_hw *hw)
- {
-+	struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
- 	struct pch_gbe_mac_info *mac = &hw->mac;
- 	u32 rx_fctrl;
- 
--	pr_debug("mac->fc = %u\n", mac->fc);
-+	netdev_dbg(adapter->netdev, "mac->fc = %u\n", mac->fc);
- 
- 	rx_fctrl = ioread32(&hw->reg->RX_FCTRL);
- 
-@@ -493,14 +497,16 @@ s32 pch_gbe_mac_force_mac_fc(struct pch_
- 		mac->tx_fc_enable = true;
- 		break;
- 	default:
--		pr_err("Flow control param set incorrectly\n");
-+		netdev_err(adapter->netdev,
-+			   "Flow control param set incorrectly\n");
- 		return -EINVAL;
- 	}
- 	if (mac->link_duplex == DUPLEX_HALF)
- 		rx_fctrl &= ~PCH_GBE_FL_CTRL_EN;
- 	iowrite32(rx_fctrl, &hw->reg->RX_FCTRL);
--	pr_debug("RX_FCTRL reg : 0x%08x  mac->tx_fc_enable : %d\n",
--		 ioread32(&hw->reg->RX_FCTRL), mac->tx_fc_enable);
-+	netdev_dbg(adapter->netdev,
-+		   "RX_FCTRL reg : 0x%08x  mac->tx_fc_enable : %d\n",
-+		   ioread32(&hw->reg->RX_FCTRL), mac->tx_fc_enable);
- 	return 0;
- }
- 
-@@ -511,10 +517,11 @@ s32 pch_gbe_mac_force_mac_fc(struct pch_
-  */
- static void pch_gbe_mac_set_wol_event(struct pch_gbe_hw *hw, u32 wu_evt)
- {
-+	struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
- 	u32 addr_mask;
- 
--	pr_debug("wu_evt : 0x%08x  ADDR_MASK reg : 0x%08x\n",
--		 wu_evt, ioread32(&hw->reg->ADDR_MASK));
-+	netdev_dbg(adapter->netdev, "wu_evt : 0x%08x  ADDR_MASK reg : 0x%08x\n",
-+		   wu_evt, ioread32(&hw->reg->ADDR_MASK));
- 
- 	if (wu_evt) {
- 		/* Set Wake-On-Lan address mask */
-@@ -546,6 +553,7 @@ static void pch_gbe_mac_set_wol_event(st
- u16 pch_gbe_mac_ctrl_miim(struct pch_gbe_hw *hw, u32 addr, u32 dir, u32 reg,
- 			u16 data)
- {
-+	struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
- 	u32 data_out = 0;
- 	unsigned int i;
- 	unsigned long flags;
-@@ -558,7 +566,7 @@ u16 pch_gbe_mac_ctrl_miim(struct pch_gbe
- 		udelay(20);
- 	}
- 	if (i == 0) {
--		pr_err("pch-gbe.miim won't go Ready\n");
-+		netdev_err(adapter->netdev, "pch-gbe.miim won't go Ready\n");
- 		spin_unlock_irqrestore(&hw->miim_lock, flags);
- 		return 0;	/* No way to indicate timeout error */
- 	}
-@@ -573,9 +581,9 @@ u16 pch_gbe_mac_ctrl_miim(struct pch_gbe
- 	}
- 	spin_unlock_irqrestore(&hw->miim_lock, flags);
- 
--	pr_debug("PHY %s: reg=%d, data=0x%04X\n",
--		 dir == PCH_GBE_MIIM_OPER_READ ? "READ" : "WRITE", reg,
--		 dir == PCH_GBE_MIIM_OPER_READ ? data_out : data);
-+	netdev_dbg(adapter->netdev, "PHY %s: reg=%d, data=0x%04X\n",
-+		   dir == PCH_GBE_MIIM_OPER_READ ? "READ" : "WRITE", reg,
-+		   dir == PCH_GBE_MIIM_OPER_READ ? data_out : data);
- 	return (u16) data_out;
- }
- 
-@@ -585,6 +593,7 @@ u16 pch_gbe_mac_ctrl_miim(struct pch_gbe
-  */
- static void pch_gbe_mac_set_pause_packet(struct pch_gbe_hw *hw)
- {
-+	struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
- 	unsigned long tmp2, tmp3;
- 
- 	/* Set Pause packet */
-@@ -606,10 +615,13 @@ static void pch_gbe_mac_set_pause_packet
- 	/* Transmit Pause Packet */
- 	iowrite32(PCH_GBE_PS_PKT_RQ, &hw->reg->PAUSE_REQ);
- 
--	pr_debug("PAUSE_PKT1-5 reg : 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n",
--		 ioread32(&hw->reg->PAUSE_PKT1), ioread32(&hw->reg->PAUSE_PKT2),
--		 ioread32(&hw->reg->PAUSE_PKT3), ioread32(&hw->reg->PAUSE_PKT4),
--		 ioread32(&hw->reg->PAUSE_PKT5));
-+	netdev_dbg(adapter->netdev,
-+		   "PAUSE_PKT1-5 reg : 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n",
-+		   ioread32(&hw->reg->PAUSE_PKT1),
-+		   ioread32(&hw->reg->PAUSE_PKT2),
-+		   ioread32(&hw->reg->PAUSE_PKT3),
-+		   ioread32(&hw->reg->PAUSE_PKT4),
-+		   ioread32(&hw->reg->PAUSE_PKT5));
- 
- 	return;
- }
-@@ -669,7 +681,7 @@ static int pch_gbe_init_phy(struct pch_g
- 			break;
- 	}
- 	adapter->hw.phy.addr = adapter->mii.phy_id;
--	pr_debug("phy_addr = %d\n", adapter->mii.phy_id);
-+	netdev_dbg(netdev, "phy_addr = %d\n", adapter->mii.phy_id);
- 	if (addr == 32)
- 		return -EAGAIN;
- 	/* Selected the phy and isolate the rest */
-@@ -758,13 +770,15 @@ void pch_gbe_reinit_locked(struct pch_gb
-  */
- void pch_gbe_reset(struct pch_gbe_adapter *adapter)
- {
-+	struct net_device *netdev = adapter->netdev;
-+
- 	pch_gbe_mac_reset_hw(&adapter->hw);
- 	/* reprogram multicast address register after reset */
--	pch_gbe_set_multi(adapter->netdev);
-+	pch_gbe_set_multi(netdev);
- 	/* Setup the receive address. */
- 	pch_gbe_mac_init_rx_addrs(&adapter->hw, PCH_GBE_MAR_ENTRIES);
- 	if (pch_gbe_hal_init_hw(&adapter->hw))
--		pr_err("Hardware Error\n");
-+		netdev_err(netdev, "Hardware Error\n");
- }
- 
- /**
-@@ -778,7 +792,7 @@ static void pch_gbe_free_irq(struct pch_
- 	free_irq(adapter->pdev->irq, netdev);
- 	if (adapter->have_msi) {
- 		pci_disable_msi(adapter->pdev);
--		pr_debug("call pci_disable_msi\n");
-+		netdev_dbg(netdev, "call pci_disable_msi\n");
- 	}
- }
- 
-@@ -795,7 +809,8 @@ static void pch_gbe_irq_disable(struct p
- 	ioread32(&hw->reg->INT_ST);
- 	synchronize_irq(adapter->pdev->irq);
- 
--	pr_debug("INT_EN reg : 0x%08x\n", ioread32(&hw->reg->INT_EN));
-+	netdev_dbg(adapter->netdev, "INT_EN reg : 0x%08x\n",
-+		   ioread32(&hw->reg->INT_EN));
- }
- 
- /**
-@@ -809,7 +824,8 @@ static void pch_gbe_irq_enable(struct pc
- 	if (likely(atomic_dec_and_test(&adapter->irq_sem)))
- 		iowrite32(PCH_GBE_INT_ENABLE_MASK, &hw->reg->INT_EN);
- 	ioread32(&hw->reg->INT_ST);
--	pr_debug("INT_EN reg : 0x%08x\n", ioread32(&hw->reg->INT_EN));
-+	netdev_dbg(adapter->netdev, "INT_EN reg : 0x%08x\n",
-+		   ioread32(&hw->reg->INT_EN));
- }
- 
- 
-@@ -846,9 +862,9 @@ static void pch_gbe_configure_tx(struct
- 	struct pch_gbe_hw *hw = &adapter->hw;
- 	u32 tdba, tdlen, dctrl;
- 
--	pr_debug("dma addr = 0x%08llx  size = 0x%08x\n",
--		 (unsigned long long)adapter->tx_ring->dma,
--		 adapter->tx_ring->size);
-+	netdev_dbg(adapter->netdev, "dma addr = 0x%08llx  size = 0x%08x\n",
-+		   (unsigned long long)adapter->tx_ring->dma,
-+		   adapter->tx_ring->size);
- 
- 	/* Setup the HW Tx Head and Tail descriptor pointers */
- 	tdba = adapter->tx_ring->dma;
-@@ -894,9 +910,9 @@ static void pch_gbe_configure_rx(struct
- 	struct pch_gbe_hw *hw = &adapter->hw;
- 	u32 rdba, rdlen, rxdma;
- 
--	pr_debug("dma adr = 0x%08llx  size = 0x%08x\n",
--		 (unsigned long long)adapter->rx_ring->dma,
--		 adapter->rx_ring->size);
-+	netdev_dbg(adapter->netdev, "dma adr = 0x%08llx  size = 0x%08x\n",
-+		   (unsigned long long)adapter->rx_ring->dma,
-+		   adapter->rx_ring->size);
- 
- 	pch_gbe_mac_force_mac_fc(hw);
- 
-@@ -907,9 +923,10 @@ static void pch_gbe_configure_rx(struct
- 	rxdma &= ~PCH_GBE_RX_DMA_EN;
- 	iowrite32(rxdma, &hw->reg->DMA_CTRL);
- 
--	pr_debug("MAC_RX_EN reg = 0x%08x  DMA_CTRL reg = 0x%08x\n",
--		 ioread32(&hw->reg->MAC_RX_EN),
--		 ioread32(&hw->reg->DMA_CTRL));
-+	netdev_dbg(adapter->netdev,
-+		   "MAC_RX_EN reg = 0x%08x  DMA_CTRL reg = 0x%08x\n",
-+		   ioread32(&hw->reg->MAC_RX_EN),
-+		   ioread32(&hw->reg->DMA_CTRL));
- 
- 	/* Setup the HW Rx Head and Tail Descriptor Pointers and
- 	 * the Base and Length of the Rx Descriptor Ring */
-@@ -977,7 +994,8 @@ static void pch_gbe_clean_tx_ring(struct
- 		buffer_info = &tx_ring->buffer_info[i];
- 		pch_gbe_unmap_and_free_tx_resource(adapter, buffer_info);
- 	}
--	pr_debug("call pch_gbe_unmap_and_free_tx_resource() %d count\n", i);
-+	netdev_dbg(adapter->netdev,
-+		   "call pch_gbe_unmap_and_free_tx_resource() %d count\n", i);
- 
- 	size = (unsigned long)sizeof(struct pch_gbe_buffer) * tx_ring->count;
- 	memset(tx_ring->buffer_info, 0, size);
-@@ -1009,7 +1027,8 @@ pch_gbe_clean_rx_ring(struct pch_gbe_ada
- 		buffer_info = &rx_ring->buffer_info[i];
- 		pch_gbe_unmap_and_free_rx_resource(adapter, buffer_info);
- 	}
--	pr_debug("call pch_gbe_unmap_and_free_rx_resource() %d count\n", i);
-+	netdev_dbg(adapter->netdev,
-+		   "call pch_gbe_unmap_and_free_rx_resource() %d count\n", i);
- 	size = (unsigned long)sizeof(struct pch_gbe_buffer) * rx_ring->count;
- 	memset(rx_ring->buffer_info, 0, size);
- 
-@@ -1087,7 +1106,7 @@ static void pch_gbe_watchdog(unsigned lo
- 	struct net_device *netdev = adapter->netdev;
- 	struct pch_gbe_hw *hw = &adapter->hw;
- 
--	pr_debug("right now = %ld\n", jiffies);
-+	netdev_dbg(netdev, "right now = %ld\n", jiffies);
- 
- 	pch_gbe_update_stats(adapter);
- 	if ((mii_link_ok(&adapter->mii)) && (!netif_carrier_ok(netdev))) {
-@@ -1095,7 +1114,7 @@ static void pch_gbe_watchdog(unsigned lo
- 		netdev->tx_queue_len = adapter->tx_queue_len;
- 		/* mii library handles link maintenance tasks */
- 		if (mii_ethtool_gset(&adapter->mii, &cmd)) {
--			pr_err("ethtool get setting Error\n");
-+			netdev_err(netdev, "ethtool get setting Error\n");
- 			mod_timer(&adapter->watchdog_timer,
- 				  round_jiffies(jiffies +
- 						PCH_GBE_WATCHDOG_PERIOD));
-@@ -1213,7 +1232,7 @@ static void pch_gbe_tx_queue(struct pch_
- 					  buffer_info->length,
- 					  DMA_TO_DEVICE);
- 	if (dma_mapping_error(&adapter->pdev->dev, buffer_info->dma)) {
--		pr_err("TX DMA map failed\n");
-+		netdev_err(adapter->netdev, "TX DMA map failed\n");
- 		buffer_info->dma = 0;
- 		buffer_info->time_stamp = 0;
- 		tx_ring->next_to_use = ring_num;
-@@ -1333,13 +1352,13 @@ static irqreturn_t pch_gbe_intr(int irq,
- 	/* When request status is no interruption factor */
- 	if (unlikely(!int_st))
- 		return IRQ_NONE;	/* Not our interrupt. End processing. */
--	pr_debug("%s occur int_st = 0x%08x\n", __func__, int_st);
-+	netdev_dbg(netdev, "%s occur int_st = 0x%08x\n", __func__, int_st);
- 	if (int_st & PCH_GBE_INT_RX_FRAME_ERR)
- 		adapter->stats.intr_rx_frame_err_count++;
- 	if (int_st & PCH_GBE_INT_RX_FIFO_ERR)
- 		if (!adapter->rx_stop_flag) {
- 			adapter->stats.intr_rx_fifo_err_count++;
--			pr_debug("Rx fifo over run\n");
-+			netdev_dbg(netdev, "Rx fifo over run\n");
- 			adapter->rx_stop_flag = true;
- 			int_en = ioread32(&hw->reg->INT_EN);
- 			iowrite32((int_en & ~PCH_GBE_INT_RX_FIFO_ERR),
-@@ -1359,7 +1378,7 @@ static irqreturn_t pch_gbe_intr(int irq,
- 	/* When Rx descriptor is empty  */
- 	if ((int_st & PCH_GBE_INT_RX_DSC_EMP)) {
- 		adapter->stats.intr_rx_dsc_empty_count++;
--		pr_debug("Rx descriptor is empty\n");
-+		netdev_dbg(netdev, "Rx descriptor is empty\n");
- 		int_en = ioread32(&hw->reg->INT_EN);
- 		iowrite32((int_en & ~PCH_GBE_INT_RX_DSC_EMP), &hw->reg->INT_EN);
- 		if (hw->mac.tx_fc_enable) {
-@@ -1382,8 +1401,8 @@ static irqreturn_t pch_gbe_intr(int irq,
- 			__napi_schedule(&adapter->napi);
- 		}
- 	}
--	pr_debug("return = 0x%08x  INT_EN reg = 0x%08x\n",
--		 IRQ_HANDLED, ioread32(&hw->reg->INT_EN));
-+	netdev_dbg(netdev, "return = 0x%08x  INT_EN reg = 0x%08x\n",
-+		   IRQ_HANDLED, ioread32(&hw->reg->INT_EN));
- 	return IRQ_HANDLED;
- }
- 
-@@ -1437,9 +1456,10 @@ pch_gbe_alloc_rx_buffers(struct pch_gbe_
- 		rx_desc->buffer_addr = (buffer_info->dma);
- 		rx_desc->gbec_status = DSC_INIT16;
- 
--		pr_debug("i = %d  buffer_info->dma = 0x08%llx  buffer_info->length = 0x%x\n",
--			 i, (unsigned long long)buffer_info->dma,
--			 buffer_info->length);
-+		netdev_dbg(netdev,
-+			   "i = %d  buffer_info->dma = 0x08%llx  buffer_info->length = 0x%x\n",
-+			   i, (unsigned long long)buffer_info->dma,
-+			   buffer_info->length);
- 
- 		if (unlikely(++i == rx_ring->count))
- 			i = 0;
-@@ -1531,12 +1551,13 @@ pch_gbe_clean_tx(struct pch_gbe_adapter
- 	bool cleaned = false;
- 	int unused, thresh;
- 
--	pr_debug("next_to_clean : %d\n", tx_ring->next_to_clean);
-+	netdev_dbg(adapter->netdev, "next_to_clean : %d\n",
-+		   tx_ring->next_to_clean);
- 
- 	i = tx_ring->next_to_clean;
- 	tx_desc = PCH_GBE_TX_DESC(*tx_ring, i);
--	pr_debug("gbec_status:0x%04x  dma_status:0x%04x\n",
--		 tx_desc->gbec_status, tx_desc->dma_status);
-+	netdev_dbg(adapter->netdev, "gbec_status:0x%04x  dma_status:0x%04x\n",
-+		   tx_desc->gbec_status, tx_desc->dma_status);
- 
- 	unused = PCH_GBE_DESC_UNUSED(tx_ring);
- 	thresh = tx_ring->count - PCH_GBE_TX_WEIGHT;
-@@ -1544,8 +1565,10 @@ pch_gbe_clean_tx(struct pch_gbe_adapter
- 	{  /* current marked clean, tx queue filling up, do extra clean */
- 		int j, k;
- 		if (unused < 8) {  /* tx queue nearly full */
--			pr_debug("clean_tx: transmit queue warning (%x,%x) unused=%d\n",
--				tx_ring->next_to_clean,tx_ring->next_to_use,unused);
-+			netdev_dbg(adapter->netdev,
-+				   "clean_tx: transmit queue warning (%x,%x) unused=%d\n",
-+				   tx_ring->next_to_clean, tx_ring->next_to_use,
-+				   unused);
- 		}
- 
- 		/* current marked clean, scan for more that need cleaning. */
-@@ -1557,49 +1580,56 @@ pch_gbe_clean_tx(struct pch_gbe_adapter
- 			if (++k >= tx_ring->count) k = 0;  /*increment, wrap*/
- 		}
- 		if (j < PCH_GBE_TX_WEIGHT) {
--			pr_debug("clean_tx: unused=%d loops=%d found tx_desc[%x,%x:%x].gbec_status=%04x\n",
--				unused,j, i,k, tx_ring->next_to_use, tx_desc->gbec_status);
-+			netdev_dbg(adapter->netdev,
-+				   "clean_tx: unused=%d loops=%d found tx_desc[%x,%x:%x].gbec_status=%04x\n",
-+				   unused, j, i, k, tx_ring->next_to_use,
-+				   tx_desc->gbec_status);
- 			i = k;  /*found one to clean, usu gbec_status==2000.*/
- 		}
- 	}
- 
- 	while ((tx_desc->gbec_status & DSC_INIT16) == 0x0000) {
--		pr_debug("gbec_status:0x%04x\n", tx_desc->gbec_status);
-+		netdev_dbg(adapter->netdev, "gbec_status:0x%04x\n",
-+			   tx_desc->gbec_status);
- 		buffer_info = &tx_ring->buffer_info[i];
- 		skb = buffer_info->skb;
- 		cleaned = true;
- 
- 		if ((tx_desc->gbec_status & PCH_GBE_TXD_GMAC_STAT_ABT)) {
- 			adapter->stats.tx_aborted_errors++;
--			pr_err("Transfer Abort Error\n");
-+			netdev_err(adapter->netdev, "Transfer Abort Error\n");
- 		} else if ((tx_desc->gbec_status & PCH_GBE_TXD_GMAC_STAT_CRSER)
- 			  ) {
- 			adapter->stats.tx_carrier_errors++;
--			pr_err("Transfer Carrier Sense Error\n");
-+			netdev_err(adapter->netdev,
-+				   "Transfer Carrier Sense Error\n");
- 		} else if ((tx_desc->gbec_status & PCH_GBE_TXD_GMAC_STAT_EXCOL)
- 			  ) {
- 			adapter->stats.tx_aborted_errors++;
--			pr_err("Transfer Collision Abort Error\n");
-+			netdev_err(adapter->netdev,
-+				   "Transfer Collision Abort Error\n");
- 		} else if ((tx_desc->gbec_status &
- 			    (PCH_GBE_TXD_GMAC_STAT_SNGCOL |
- 			     PCH_GBE_TXD_GMAC_STAT_MLTCOL))) {
- 			adapter->stats.collisions++;
- 			adapter->stats.tx_packets++;
- 			adapter->stats.tx_bytes += skb->len;
--			pr_debug("Transfer Collision\n");
-+			netdev_dbg(adapter->netdev, "Transfer Collision\n");
- 		} else if ((tx_desc->gbec_status & PCH_GBE_TXD_GMAC_STAT_CMPLT)
- 			  ) {
- 			adapter->stats.tx_packets++;
- 			adapter->stats.tx_bytes += skb->len;
- 		}
- 		if (buffer_info->mapped) {
--			pr_debug("unmap buffer_info->dma : %d\n", i);
-+			netdev_dbg(adapter->netdev,
-+				   "unmap buffer_info->dma : %d\n", i);
- 			dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
- 					 buffer_info->length, DMA_TO_DEVICE);
- 			buffer_info->mapped = false;
- 		}
- 		if (buffer_info->skb) {
--			pr_debug("trim buffer_info->skb : %d\n", i);
-+			netdev_dbg(adapter->netdev,
-+				   "trim buffer_info->skb : %d\n", i);
- 			skb_trim(buffer_info->skb, 0);
- 		}
- 		tx_desc->gbec_status = DSC_INIT16;
-@@ -1613,8 +1643,9 @@ pch_gbe_clean_tx(struct pch_gbe_adapter
- 			break;
- 		}
- 	}
--	pr_debug("called pch_gbe_unmap_and_free_tx_resource() %d count\n",
--		 cleaned_count);
-+	netdev_dbg(adapter->netdev,
-+		   "called pch_gbe_unmap_and_free_tx_resource() %d count\n",
-+		   cleaned_count);
- 	if (cleaned_count > 0)  { /*skip this if nothing cleaned*/
- 		/* Recover from running out of Tx resources in xmit_frame */
- 		spin_lock(&tx_ring->tx_lock);
-@@ -1622,12 +1653,13 @@ pch_gbe_clean_tx(struct pch_gbe_adapter
- 		{
- 			netif_wake_queue(adapter->netdev);
- 			adapter->stats.tx_restart_count++;
--			pr_debug("Tx wake queue\n");
-+			netdev_dbg(adapter->netdev, "Tx wake queue\n");
- 		}
- 
- 		tx_ring->next_to_clean = i;
- 
--		pr_debug("next_to_clean : %d\n", tx_ring->next_to_clean);
-+		netdev_dbg(adapter->netdev, "next_to_clean : %d\n",
-+			   tx_ring->next_to_clean);
- 		spin_unlock(&tx_ring->tx_lock);
- 	}
- 	return cleaned;
-@@ -1684,22 +1716,22 @@ pch_gbe_clean_rx(struct pch_gbe_adapter
- 				   buffer_info->length, DMA_FROM_DEVICE);
- 		buffer_info->mapped = false;
- 
--		pr_debug("RxDecNo = 0x%04x  Status[DMA:0x%02x GBE:0x%04x "
--			 "TCP:0x%08x]  BufInf = 0x%p\n",
--			 i, dma_status, gbec_status, tcp_ip_status,
--			 buffer_info);
-+		netdev_dbg(netdev,
-+			   "RxDecNo = 0x%04x  Status[DMA:0x%02x GBE:0x%04x TCP:0x%08x]  BufInf = 0x%p\n",
-+			   i, dma_status, gbec_status, tcp_ip_status,
-+			   buffer_info);
- 		/* Error check */
- 		if (unlikely(gbec_status & PCH_GBE_RXD_GMAC_STAT_NOTOCTAL)) {
- 			adapter->stats.rx_frame_errors++;
--			pr_err("Receive Not Octal Error\n");
-+			netdev_err(netdev, "Receive Not Octal Error\n");
- 		} else if (unlikely(gbec_status &
- 				PCH_GBE_RXD_GMAC_STAT_NBLERR)) {
- 			adapter->stats.rx_frame_errors++;
--			pr_err("Receive Nibble Error\n");
-+			netdev_err(netdev, "Receive Nibble Error\n");
- 		} else if (unlikely(gbec_status &
- 				PCH_GBE_RXD_GMAC_STAT_CRCERR)) {
- 			adapter->stats.rx_crc_errors++;
--			pr_err("Receive CRC Error\n");
-+			netdev_err(netdev, "Receive CRC Error\n");
- 		} else {
- 			/* get receive length */
- 			/* length convert[-3], length includes FCS length */
-@@ -1730,8 +1762,9 @@ pch_gbe_clean_rx(struct pch_gbe_adapter
- 
- 			napi_gro_receive(&adapter->napi, skb);
- 			(*work_done)++;
--			pr_debug("Receive skb->ip_summed: %d length: %d\n",
--				 skb->ip_summed, length);
-+			netdev_dbg(netdev,
-+				   "Receive skb->ip_summed: %d length: %d\n",
-+				   skb->ip_summed, length);
- 		}
- 		/* return some buffers to hardware, one at a time is too slow */
- 		if (unlikely(cleaned_count >= PCH_GBE_RX_BUFFER_WRITE)) {
-@@ -1787,10 +1820,10 @@ int pch_gbe_setup_tx_resources(struct pc
- 		tx_desc = PCH_GBE_TX_DESC(*tx_ring, desNo);
- 		tx_desc->gbec_status = DSC_INIT16;
- 	}
--	pr_debug("tx_ring->desc = 0x%p  tx_ring->dma = 0x%08llx\n"
--		 "next_to_clean = 0x%08x  next_to_use = 0x%08x\n",
--		 tx_ring->desc, (unsigned long long)tx_ring->dma,
--		 tx_ring->next_to_clean, tx_ring->next_to_use);
-+	netdev_dbg(adapter->netdev,
-+		   "tx_ring->desc = 0x%p  tx_ring->dma = 0x%08llx next_to_clean = 0x%08x  next_to_use = 0x%08x\n",
-+		   tx_ring->desc, (unsigned long long)tx_ring->dma,
-+		   tx_ring->next_to_clean, tx_ring->next_to_use);
- 	return 0;
- }
- 
-@@ -1829,10 +1862,10 @@ int pch_gbe_setup_rx_resources(struct pc
- 		rx_desc = PCH_GBE_RX_DESC(*rx_ring, desNo);
- 		rx_desc->gbec_status = DSC_INIT16;
- 	}
--	pr_debug("rx_ring->desc = 0x%p  rx_ring->dma = 0x%08llx "
--		 "next_to_clean = 0x%08x  next_to_use = 0x%08x\n",
--		 rx_ring->desc, (unsigned long long)rx_ring->dma,
--		 rx_ring->next_to_clean, rx_ring->next_to_use);
-+	netdev_dbg(adapter->netdev,
-+		   "rx_ring->desc = 0x%p  rx_ring->dma = 0x%08llx next_to_clean = 0x%08x  next_to_use = 0x%08x\n",
-+		   rx_ring->desc, (unsigned long long)rx_ring->dma,
-+		   rx_ring->next_to_clean, rx_ring->next_to_use);
- 	return 0;
- }
- 
-@@ -1886,9 +1919,9 @@ static int pch_gbe_request_irq(struct pc
- 	flags = IRQF_SHARED;
- 	adapter->have_msi = false;
- 	err = pci_enable_msi(adapter->pdev);
--	pr_debug("call pci_enable_msi\n");
-+	netdev_dbg(netdev, "call pci_enable_msi\n");
- 	if (err) {
--		pr_debug("call pci_enable_msi - Error: %d\n", err);
-+		netdev_dbg(netdev, "call pci_enable_msi - Error: %d\n", err);
- 	} else {
- 		flags = 0;
- 		adapter->have_msi = true;
-@@ -1896,9 +1929,11 @@ static int pch_gbe_request_irq(struct pc
- 	err = request_irq(adapter->pdev->irq, &pch_gbe_intr,
- 			  flags, netdev->name, netdev);
- 	if (err)
--		pr_err("Unable to allocate interrupt Error: %d\n", err);
--	pr_debug("adapter->have_msi : %d  flags : 0x%04x  return : 0x%04x\n",
--		 adapter->have_msi, flags, err);
-+		netdev_err(netdev, "Unable to allocate interrupt Error: %d\n",
-+			   err);
-+	netdev_dbg(netdev,
-+		   "adapter->have_msi : %d  flags : 0x%04x  return : 0x%04x\n",
-+		   adapter->have_msi, flags, err);
- 	return err;
- }
- 
-@@ -1919,7 +1954,7 @@ int pch_gbe_up(struct pch_gbe_adapter *a
- 
- 	/* Ensure we have a valid MAC */
- 	if (!is_valid_ether_addr(adapter->hw.mac.addr)) {
--		pr_err("Error: Invalid MAC address\n");
-+		netdev_err(netdev, "Error: Invalid MAC address\n");
- 		goto out;
- 	}
- 
-@@ -1933,12 +1968,14 @@ int pch_gbe_up(struct pch_gbe_adapter *a
- 
- 	err = pch_gbe_request_irq(adapter);
- 	if (err) {
--		pr_err("Error: can't bring device up - irq request failed\n");
-+		netdev_err(netdev,
-+			   "Error: can't bring device up - irq request failed\n");
- 		goto out;
- 	}
- 	err = pch_gbe_alloc_rx_buffers_pool(adapter, rx_ring, rx_ring->count);
- 	if (err) {
--		pr_err("Error: can't bring device up - alloc rx buffers pool failed\n");
-+		netdev_err(netdev,
-+			   "Error: can't bring device up - alloc rx buffers pool failed\n");
- 		goto freeirq;
- 	}
- 	pch_gbe_alloc_tx_buffers(adapter, tx_ring);
-@@ -2015,11 +2052,11 @@ static int pch_gbe_sw_init(struct pch_gb
- 
- 	/* Initialize the hardware-specific values */
- 	if (pch_gbe_hal_setup_init_funcs(hw)) {
--		pr_err("Hardware Initialization Failure\n");
-+		netdev_err(netdev, "Hardware Initialization Failure\n");
- 		return -EIO;
- 	}
- 	if (pch_gbe_alloc_queues(adapter)) {
--		pr_err("Unable to allocate memory for queues\n");
-+		netdev_err(netdev, "Unable to allocate memory for queues\n");
- 		return -ENOMEM;
- 	}
- 	spin_lock_init(&adapter->hw.miim_lock);
-@@ -2030,9 +2067,10 @@ static int pch_gbe_sw_init(struct pch_gb
- 
- 	pch_gbe_init_stats(adapter);
- 
--	pr_debug("rx_buffer_len : %d  mac.min_frame_size : %d  mac.max_frame_size : %d\n",
--		 (u32) adapter->rx_buffer_len,
--		 hw->mac.min_frame_size, hw->mac.max_frame_size);
-+	netdev_dbg(netdev,
-+		   "rx_buffer_len : %d  mac.min_frame_size : %d  mac.max_frame_size : %d\n",
-+		   (u32) adapter->rx_buffer_len,
-+		   hw->mac.min_frame_size, hw->mac.max_frame_size);
- 	return 0;
- }
- 
-@@ -2061,7 +2099,7 @@ static int pch_gbe_open(struct net_devic
- 	err = pch_gbe_up(adapter);
- 	if (err)
- 		goto err_up;
--	pr_debug("Success End\n");
-+	netdev_dbg(netdev, "Success End\n");
- 	return 0;
- 
- err_up:
-@@ -2072,7 +2110,7 @@ err_setup_rx:
- 	pch_gbe_free_tx_resources(adapter, adapter->tx_ring);
- err_setup_tx:
- 	pch_gbe_reset(adapter);
--	pr_err("Error End\n");
-+	netdev_err(netdev, "Error End\n");
- 	return err;
- }
- 
-@@ -2116,8 +2154,9 @@ static int pch_gbe_xmit_frame(struct sk_
- 	if (unlikely(!PCH_GBE_DESC_UNUSED(tx_ring))) {
- 		netif_stop_queue(netdev);
- 		spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
--		pr_debug("Return : BUSY  next_to use : 0x%08x  next_to clean : 0x%08x\n",
--			 tx_ring->next_to_use, tx_ring->next_to_clean);
-+		netdev_dbg(netdev,
-+			   "Return : BUSY  next_to use : 0x%08x  next_to clean : 0x%08x\n",
-+			   tx_ring->next_to_use, tx_ring->next_to_clean);
- 		return NETDEV_TX_BUSY;
- 	}
- 
-@@ -2152,7 +2191,7 @@ static void pch_gbe_set_multi(struct net
- 	int i;
- 	int mc_count;
- 
--	pr_debug("netdev->flags : 0x%08x\n", netdev->flags);
-+	netdev_dbg(netdev, "netdev->flags : 0x%08x\n", netdev->flags);
- 
- 	/* Check for Promiscuous and All Multicast modes */
- 	rctl = ioread32(&hw->reg->RX_MODE);
-@@ -2192,7 +2231,8 @@ static void pch_gbe_set_multi(struct net
- 					PCH_GBE_MAR_ENTRIES);
- 	kfree(mta_list);
- 
--	pr_debug("RX_MODE reg(check bit31,30 ADD,MLT) : 0x%08x  netdev->mc_count : 0x%08x\n",
-+	netdev_dbg(netdev,
-+		 "RX_MODE reg(check bit31,30 ADD,MLT) : 0x%08x  netdev->mc_count : 0x%08x\n",
- 		 ioread32(&hw->reg->RX_MODE), mc_count);
- }
- 
-@@ -2218,12 +2258,12 @@ static int pch_gbe_set_mac(struct net_de
- 		pch_gbe_mac_mar_set(&adapter->hw, adapter->hw.mac.addr, 0);
- 		ret_val = 0;
- 	}
--	pr_debug("ret_val : 0x%08x\n", ret_val);
--	pr_debug("dev_addr : %pM\n", netdev->dev_addr);
--	pr_debug("mac_addr : %pM\n", adapter->hw.mac.addr);
--	pr_debug("MAC_ADR1AB reg : 0x%08x 0x%08x\n",
--		 ioread32(&adapter->hw.reg->mac_adr[0].high),
--		 ioread32(&adapter->hw.reg->mac_adr[0].low));
-+	netdev_dbg(netdev, "ret_val : 0x%08x\n", ret_val);
-+	netdev_dbg(netdev, "dev_addr : %pM\n", netdev->dev_addr);
-+	netdev_dbg(netdev, "mac_addr : %pM\n", adapter->hw.mac.addr);
-+	netdev_dbg(netdev, "MAC_ADR1AB reg : 0x%08x 0x%08x\n",
-+		   ioread32(&adapter->hw.reg->mac_adr[0].high),
-+		   ioread32(&adapter->hw.reg->mac_adr[0].low));
- 	return ret_val;
- }
- 
-@@ -2245,7 +2285,7 @@ static int pch_gbe_change_mtu(struct net
- 	max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
- 	if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
- 		(max_frame > PCH_GBE_MAX_JUMBO_FRAME_SIZE)) {
--		pr_err("Invalid MTU setting\n");
-+		netdev_err(netdev, "Invalid MTU setting\n");
- 		return -EINVAL;
- 	}
- 	if (max_frame <= PCH_GBE_FRAME_SIZE_2048)
-@@ -2274,9 +2314,10 @@ static int pch_gbe_change_mtu(struct net
- 		adapter->hw.mac.max_frame_size = max_frame;
- 	}
- 
--	pr_debug("max_frame : %d  rx_buffer_len : %d  mtu : %d  max_frame_size : %d\n",
--		 max_frame, (u32) adapter->rx_buffer_len, netdev->mtu,
--		 adapter->hw.mac.max_frame_size);
-+	netdev_dbg(netdev,
-+		   "max_frame : %d  rx_buffer_len : %d  mtu : %d  max_frame_size : %d\n",
-+		   max_frame, (u32) adapter->rx_buffer_len, netdev->mtu,
-+		   adapter->hw.mac.max_frame_size);
- 	return 0;
- }
- 
-@@ -2317,7 +2358,7 @@ static int pch_gbe_ioctl(struct net_devi
- {
- 	struct pch_gbe_adapter *adapter = netdev_priv(netdev);
- 
--	pr_debug("cmd : 0x%04x\n", cmd);
-+	netdev_dbg(netdev, "cmd : 0x%04x\n", cmd);
- 
- 	if (cmd == SIOCSHWTSTAMP)
- 		return hwtstamp_ioctl(netdev, ifr, cmd);
-@@ -2354,7 +2395,7 @@ static int pch_gbe_napi_poll(struct napi
- 	bool poll_end_flag = false;
- 	bool cleaned = false;
- 
--	pr_debug("budget : %d\n", budget);
-+	netdev_dbg(adapter->netdev, "budget : %d\n", budget);
- 
- 	pch_gbe_clean_rx(adapter, adapter->rx_ring, &work_done, budget);
- 	cleaned = pch_gbe_clean_tx(adapter, adapter->tx_ring);
-@@ -2377,8 +2418,9 @@ static int pch_gbe_napi_poll(struct napi
- 		pch_gbe_enable_dma_rx(&adapter->hw);
- 	}
- 
--	pr_debug("poll_end_flag : %d  work_done : %d  budget : %d\n",
--		 poll_end_flag, work_done, budget);
-+	netdev_dbg(adapter->netdev,
-+		   "poll_end_flag : %d  work_done : %d  budget : %d\n",
-+		   poll_end_flag, work_done, budget);
- 
- 	return work_done;
- }
-@@ -2435,7 +2477,7 @@ static pci_ers_result_t pch_gbe_io_slot_
- 	struct pch_gbe_hw *hw = &adapter->hw;
- 
- 	if (pci_enable_device(pdev)) {
--		pr_err("Cannot re-enable PCI device after reset\n");
-+		netdev_err(netdev, "Cannot re-enable PCI device after reset\n");
- 		return PCI_ERS_RESULT_DISCONNECT;
- 	}
- 	pci_set_master(pdev);
-@@ -2455,7 +2497,8 @@ static void pch_gbe_io_resume(struct pci
- 
- 	if (netif_running(netdev)) {
- 		if (pch_gbe_up(adapter)) {
--			pr_debug("can't bring device back up after reset\n");
-+			netdev_dbg(netdev,
-+				   "can't bring device back up after reset\n");
- 			return;
- 		}
- 	}
-@@ -2509,7 +2552,7 @@ static int pch_gbe_resume(struct device
- 
- 	err = pci_enable_device(pdev);
- 	if (err) {
--		pr_err("Cannot enable PCI device from suspend\n");
-+		netdev_err(netdev, "Cannot enable PCI device from suspend\n");
- 		return err;
- 	}
- 	pci_set_master(pdev);
-@@ -2609,7 +2652,7 @@ static int pch_gbe_probe(struct pci_dev
- 	adapter->ptp_pdev = pci_get_bus_and_slot(adapter->pdev->bus->number,
- 					       PCI_DEVFN(12, 4));
- 	if (ptp_filter_init(ptp_filter, ARRAY_SIZE(ptp_filter))) {
--		pr_err("Bad ptp filter\n");
-+		dev_err(&pdev->dev, "Bad ptp filter\n");
- 		return -EINVAL;
- 	}
- 
---- a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_param.c
-+++ b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_param.c
-@@ -237,16 +237,17 @@ static int pch_gbe_validate_option(int *
- 	case enable_option:
- 		switch (*value) {
- 		case OPTION_ENABLED:
--			pr_debug("%s Enabled\n", opt->name);
-+			netdev_dbg(adapter->netdev, "%s Enabled\n", opt->name);
- 			return 0;
- 		case OPTION_DISABLED:
--			pr_debug("%s Disabled\n", opt->name);
-+			netdev_dbg(adapter->netdev, "%s Disabled\n", opt->name);
- 			return 0;
- 		}
- 		break;
- 	case range_option:
- 		if (*value >= opt->arg.r.min && *value <= opt->arg.r.max) {
--			pr_debug("%s set to %i\n", opt->name, *value);
-+			netdev_dbg(adapter->netdev, "%s set to %i\n",
-+				   opt->name, *value);
- 			return 0;
- 		}
- 		break;
-@@ -258,7 +259,8 @@ static int pch_gbe_validate_option(int *
- 			ent = &opt->arg.l.p[i];
- 			if (*value == ent->i) {
- 				if (ent->str[0] != '\0')
--					pr_debug("%s\n", ent->str);
-+					netdev_dbg(adapter->netdev, "%s\n",
-+						   ent->str);
- 				return 0;
- 			}
- 		}
-@@ -268,8 +270,8 @@ static int pch_gbe_validate_option(int *
- 		BUG();
- 	}
- 
--	pr_debug("Invalid %s value specified (%i) %s\n",
--		 opt->name, *value, opt->err);
-+	netdev_dbg(adapter->netdev, "Invalid %s value specified (%i) %s\n",
-+		   opt->name, *value, opt->err);
- 	*value = opt->def;
- 	return -1;
- }
-@@ -318,7 +320,8 @@ static void pch_gbe_check_copper_options
- 					 .p = an_list} }
- 		};
- 		if (speed || dplx) {
--			pr_debug("AutoNeg specified along with Speed or Duplex, AutoNeg parameter ignored\n");
-+			netdev_dbg(adapter->netdev,
-+				   "AutoNeg specified along with Speed or Duplex, AutoNeg parameter ignored\n");
- 			hw->phy.autoneg_advertised = opt.def;
- 		} else {
- 			int tmp = AutoNeg;
-@@ -332,13 +335,16 @@ static void pch_gbe_check_copper_options
- 	case 0:
- 		hw->mac.autoneg = hw->mac.fc_autoneg = 1;
- 		if ((speed || dplx))
--			pr_debug("Speed and duplex autonegotiation enabled\n");
-+			netdev_dbg(adapter->netdev,
-+				   "Speed and duplex autonegotiation enabled\n");
- 		hw->mac.link_speed = SPEED_10;
- 		hw->mac.link_duplex = DUPLEX_HALF;
- 		break;
- 	case HALF_DUPLEX:
--		pr_debug("Half Duplex specified without Speed\n");
--		pr_debug("Using Autonegotiation at Half Duplex only\n");
-+		netdev_dbg(adapter->netdev,
-+			   "Half Duplex specified without Speed\n");
-+		netdev_dbg(adapter->netdev,
-+			   "Using Autonegotiation at Half Duplex only\n");
- 		hw->mac.autoneg = hw->mac.fc_autoneg = 1;
- 		hw->phy.autoneg_advertised = PHY_ADVERTISE_10_HALF |
- 						PHY_ADVERTISE_100_HALF;
-@@ -346,8 +352,10 @@ static void pch_gbe_check_copper_options
- 		hw->mac.link_duplex = DUPLEX_HALF;
- 		break;
- 	case FULL_DUPLEX:
--		pr_debug("Full Duplex specified without Speed\n");
--		pr_debug("Using Autonegotiation at Full Duplex only\n");
-+		netdev_dbg(adapter->netdev,
-+			   "Full Duplex specified without Speed\n");
-+		netdev_dbg(adapter->netdev,
-+			   "Using Autonegotiation at Full Duplex only\n");
- 		hw->mac.autoneg = hw->mac.fc_autoneg = 1;
- 		hw->phy.autoneg_advertised = PHY_ADVERTISE_10_FULL |
- 						PHY_ADVERTISE_100_FULL |
-@@ -356,8 +364,10 @@ static void pch_gbe_check_copper_options
- 		hw->mac.link_duplex = DUPLEX_FULL;
- 		break;
- 	case SPEED_10:
--		pr_debug("10 Mbps Speed specified without Duplex\n");
--		pr_debug("Using Autonegotiation at 10 Mbps only\n");
-+		netdev_dbg(adapter->netdev,
-+			   "10 Mbps Speed specified without Duplex\n");
-+		netdev_dbg(adapter->netdev,
-+			   "Using Autonegotiation at 10 Mbps only\n");
- 		hw->mac.autoneg = hw->mac.fc_autoneg = 1;
- 		hw->phy.autoneg_advertised = PHY_ADVERTISE_10_HALF |
- 						PHY_ADVERTISE_10_FULL;
-@@ -365,22 +375,24 @@ static void pch_gbe_check_copper_options
- 		hw->mac.link_duplex = DUPLEX_HALF;
- 		break;
- 	case SPEED_10 + HALF_DUPLEX:
--		pr_debug("Forcing to 10 Mbps Half Duplex\n");
-+		netdev_dbg(adapter->netdev, "Forcing to 10 Mbps Half Duplex\n");
- 		hw->mac.autoneg = hw->mac.fc_autoneg = 0;
- 		hw->phy.autoneg_advertised = 0;
- 		hw->mac.link_speed = SPEED_10;
- 		hw->mac.link_duplex = DUPLEX_HALF;
- 		break;
- 	case SPEED_10 + FULL_DUPLEX:
--		pr_debug("Forcing to 10 Mbps Full Duplex\n");
-+		netdev_dbg(adapter->netdev, "Forcing to 10 Mbps Full Duplex\n");
- 		hw->mac.autoneg = hw->mac.fc_autoneg = 0;
- 		hw->phy.autoneg_advertised = 0;
- 		hw->mac.link_speed = SPEED_10;
- 		hw->mac.link_duplex = DUPLEX_FULL;
- 		break;
- 	case SPEED_100:
--		pr_debug("100 Mbps Speed specified without Duplex\n");
--		pr_debug("Using Autonegotiation at 100 Mbps only\n");
-+		netdev_dbg(adapter->netdev,
-+			   "100 Mbps Speed specified without Duplex\n");
-+		netdev_dbg(adapter->netdev,
-+			   "Using Autonegotiation at 100 Mbps only\n");
- 		hw->mac.autoneg = hw->mac.fc_autoneg = 1;
- 		hw->phy.autoneg_advertised = PHY_ADVERTISE_100_HALF |
- 						PHY_ADVERTISE_100_FULL;
-@@ -388,28 +400,33 @@ static void pch_gbe_check_copper_options
- 		hw->mac.link_duplex = DUPLEX_HALF;
- 		break;
- 	case SPEED_100 + HALF_DUPLEX:
--		pr_debug("Forcing to 100 Mbps Half Duplex\n");
-+		netdev_dbg(adapter->netdev,
-+			   "Forcing to 100 Mbps Half Duplex\n");
- 		hw->mac.autoneg = hw->mac.fc_autoneg = 0;
- 		hw->phy.autoneg_advertised = 0;
- 		hw->mac.link_speed = SPEED_100;
- 		hw->mac.link_duplex = DUPLEX_HALF;
- 		break;
- 	case SPEED_100 + FULL_DUPLEX:
--		pr_debug("Forcing to 100 Mbps Full Duplex\n");
-+		netdev_dbg(adapter->netdev,
-+			   "Forcing to 100 Mbps Full Duplex\n");
- 		hw->mac.autoneg = hw->mac.fc_autoneg = 0;
- 		hw->phy.autoneg_advertised = 0;
- 		hw->mac.link_speed = SPEED_100;
- 		hw->mac.link_duplex = DUPLEX_FULL;
- 		break;
- 	case SPEED_1000:
--		pr_debug("1000 Mbps Speed specified without Duplex\n");
-+		netdev_dbg(adapter->netdev,
-+			   "1000 Mbps Speed specified without Duplex\n");
- 		goto full_duplex_only;
- 	case SPEED_1000 + HALF_DUPLEX:
--		pr_debug("Half Duplex is not supported at 1000 Mbps\n");
-+		netdev_dbg(adapter->netdev,
-+			   "Half Duplex is not supported at 1000 Mbps\n");
- 		/* fall through */
- 	case SPEED_1000 + FULL_DUPLEX:
- full_duplex_only:
--		pr_debug("Using Autonegotiation at 1000 Mbps Full Duplex only\n");
-+		netdev_dbg(adapter->netdev,
-+			   "Using Autonegotiation at 1000 Mbps Full Duplex only\n");
- 		hw->mac.autoneg = hw->mac.fc_autoneg = 1;
- 		hw->phy.autoneg_advertised = PHY_ADVERTISE_1000_FULL;
- 		hw->mac.link_speed = SPEED_1000;
---- a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_phy.c
-+++ b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_phy.c
-@@ -97,6 +97,7 @@
-  */
- s32 pch_gbe_phy_get_id(struct pch_gbe_hw *hw)
- {
-+	struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
- 	struct pch_gbe_phy_info *phy = &hw->phy;
- 	s32 ret;
- 	u16 phy_id1;
-@@ -115,8 +116,9 @@ s32 pch_gbe_phy_get_id(struct pch_gbe_hw
- 	phy->id = (u32)phy_id1;
- 	phy->id = ((phy->id << 6) | ((phy_id2 & 0xFC00) >> 10));
- 	phy->revision = (u32) (phy_id2 & 0x000F);
--	pr_debug("phy->id : 0x%08x  phy->revision : 0x%08x\n",
--		 phy->id, phy->revision);
-+	netdev_dbg(adapter->netdev,
-+		   "phy->id : 0x%08x  phy->revision : 0x%08x\n",
-+		   phy->id, phy->revision);
- 	return 0;
- }
- 
-@@ -134,7 +136,10 @@ s32 pch_gbe_phy_read_reg_miic(struct pch
- 	struct pch_gbe_phy_info *phy = &hw->phy;
- 
- 	if (offset > PHY_MAX_REG_ADDRESS) {
--		pr_err("PHY Address %d is out of range\n", offset);
-+		struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
-+
-+		netdev_err(adapter->netdev, "PHY Address %d is out of range\n",
-+			   offset);
- 		return -EINVAL;
- 	}
- 	*data = pch_gbe_mac_ctrl_miim(hw, phy->addr, PCH_GBE_HAL_MIIM_READ,
-@@ -156,7 +161,10 @@ s32 pch_gbe_phy_write_reg_miic(struct pc
- 	struct pch_gbe_phy_info *phy = &hw->phy;
- 
- 	if (offset > PHY_MAX_REG_ADDRESS) {
--		pr_err("PHY Address %d is out of range\n", offset);
-+		struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
-+
-+		netdev_err(adapter->netdev, "PHY Address %d is out of range\n",
-+			   offset);
- 		return -EINVAL;
- 	}
- 	pch_gbe_mac_ctrl_miim(hw, phy->addr, PCH_GBE_HAL_MIIM_WRITE,
-@@ -246,15 +254,14 @@ inline void pch_gbe_phy_set_rgmii(struct
-  */
- void pch_gbe_phy_init_setting(struct pch_gbe_hw *hw)
- {
--	struct pch_gbe_adapter *adapter;
-+	struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
- 	struct ethtool_cmd     cmd = { .cmd = ETHTOOL_GSET };
- 	int ret;
- 	u16 mii_reg;
- 
--	adapter = container_of(hw, struct pch_gbe_adapter, hw);
- 	ret = mii_ethtool_gset(&adapter->mii, &cmd);
- 	if (ret)
--		pr_err("Error: mii_ethtool_gset\n");
-+		netdev_err(adapter->netdev, "Error: mii_ethtool_gset\n");
- 
- 	ethtool_cmd_speed_set(&cmd, hw->mac.link_speed);
- 	cmd.duplex = hw->mac.link_duplex;
-@@ -263,7 +270,7 @@ void pch_gbe_phy_init_setting(struct pch
- 	pch_gbe_phy_write_reg_miic(hw, MII_BMCR, BMCR_RESET);
- 	ret = mii_ethtool_sset(&adapter->mii, &cmd);
- 	if (ret)
--		pr_err("Error: mii_ethtool_sset\n");
-+		netdev_err(adapter->netdev, "Error: mii_ethtool_sset\n");
- 
- 	pch_gbe_phy_sw_reset(hw);
- 
diff --git a/patches.minnowboard/pch_gbe-use-managed-functions-pcim_-and-devm_.patch b/patches.minnowboard/pch_gbe-use-managed-functions-pcim_-and-devm_.patch
deleted file mode 100644
index 90f6a43663196..0000000000000
--- a/patches.minnowboard/pch_gbe-use-managed-functions-pcim_-and-devm_.patch
+++ /dev/null
@@ -1,144 +0,0 @@
-From 29cc436cb90da4cabf404d8ceedc762fc7387b15 Mon Sep 17 00:00:00 2001
-From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-Date: Fri, 28 Jun 2013 14:02:54 +0300
-Subject: pch_gbe: use managed functions pcim_* and devm_*
-
-From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-
-commit 29cc436cb90da4cabf404d8ceedc762fc7387b15 upstream.
-
-This makes the error handling much more simpler than open-coding everything and
-in addition makes the probe function smaller an tidier.
-
-Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-
----
- drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c |   50 +++++--------------
- 1 file changed, 15 insertions(+), 35 deletions(-)
-
---- a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c
-+++ b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c
-@@ -636,15 +636,15 @@ static void pch_gbe_mac_set_pause_packet
-  */
- static int pch_gbe_alloc_queues(struct pch_gbe_adapter *adapter)
- {
--	adapter->tx_ring = kzalloc(sizeof(*adapter->tx_ring), GFP_KERNEL);
-+	adapter->tx_ring = devm_kzalloc(&adapter->pdev->dev,
-+					sizeof(*adapter->tx_ring), GFP_KERNEL);
- 	if (!adapter->tx_ring)
- 		return -ENOMEM;
- 
--	adapter->rx_ring = kzalloc(sizeof(*adapter->rx_ring), GFP_KERNEL);
--	if (!adapter->rx_ring) {
--		kfree(adapter->tx_ring);
-+	adapter->rx_ring = devm_kzalloc(&adapter->pdev->dev,
-+					sizeof(*adapter->rx_ring), GFP_KERNEL);
-+	if (!adapter->rx_ring)
- 		return -ENOMEM;
--	}
- 	return 0;
- }
- 
-@@ -2588,13 +2588,7 @@ static void pch_gbe_remove(struct pci_de
- 
- 	pch_gbe_hal_phy_hw_reset(&adapter->hw);
- 
--	kfree(adapter->tx_ring);
--	kfree(adapter->rx_ring);
--
--	iounmap(adapter->hw.reg);
--	pci_release_regions(pdev);
- 	free_netdev(netdev);
--	pci_disable_device(pdev);
- }
- 
- static int pch_gbe_probe(struct pci_dev *pdev,
-@@ -2604,7 +2598,7 @@ static int pch_gbe_probe(struct pci_dev
- 	struct pch_gbe_adapter *adapter;
- 	int ret;
- 
--	ret = pci_enable_device(pdev);
-+	ret = pcim_enable_device(pdev);
- 	if (ret)
- 		return ret;
- 
-@@ -2617,24 +2611,22 @@ static int pch_gbe_probe(struct pci_dev
- 			if (ret) {
- 				dev_err(&pdev->dev, "ERR: No usable DMA "
- 					"configuration, aborting\n");
--				goto err_disable_device;
-+				return ret;
- 			}
- 		}
- 	}
- 
--	ret = pci_request_regions(pdev, KBUILD_MODNAME);
-+	ret = pcim_iomap_regions(pdev, 1 << PCH_GBE_PCI_BAR, pci_name(pdev));
- 	if (ret) {
- 		dev_err(&pdev->dev,
- 			"ERR: Can't reserve PCI I/O and memory resources\n");
--		goto err_disable_device;
-+		return ret;
- 	}
- 	pci_set_master(pdev);
- 
- 	netdev = alloc_etherdev((int)sizeof(struct pch_gbe_adapter));
--	if (!netdev) {
--		ret = -ENOMEM;
--		goto err_release_pci;
--	}
-+	if (!netdev)
-+		return -ENOMEM;
- 	SET_NETDEV_DEV(netdev, &pdev->dev);
- 
- 	pci_set_drvdata(pdev, netdev);
-@@ -2642,18 +2634,14 @@ static int pch_gbe_probe(struct pci_dev
- 	adapter->netdev = netdev;
- 	adapter->pdev = pdev;
- 	adapter->hw.back = adapter;
--	adapter->hw.reg = pci_iomap(pdev, PCH_GBE_PCI_BAR, 0);
--	if (!adapter->hw.reg) {
--		ret = -EIO;
--		dev_err(&pdev->dev, "Can't ioremap\n");
--		goto err_free_netdev;
--	}
-+	adapter->hw.reg = pcim_iomap_table(pdev)[PCH_GBE_PCI_BAR];
- 
- 	adapter->ptp_pdev = pci_get_bus_and_slot(adapter->pdev->bus->number,
- 					       PCI_DEVFN(12, 4));
- 	if (ptp_filter_init(ptp_filter, ARRAY_SIZE(ptp_filter))) {
- 		dev_err(&pdev->dev, "Bad ptp filter\n");
--		return -EINVAL;
-+		ret = -EINVAL;
-+		goto err_free_netdev;
- 	}
- 
- 	netdev->netdev_ops = &pch_gbe_netdev_ops;
-@@ -2671,7 +2659,7 @@ static int pch_gbe_probe(struct pci_dev
- 	/* setup the private structure */
- 	ret = pch_gbe_sw_init(adapter);
- 	if (ret)
--		goto err_iounmap;
-+		goto err_free_netdev;
- 
- 	/* Initialize PHY */
- 	ret = pch_gbe_init_phy(adapter);
-@@ -2727,16 +2715,8 @@ static int pch_gbe_probe(struct pci_dev
- 
- err_free_adapter:
- 	pch_gbe_hal_phy_hw_reset(&adapter->hw);
--	kfree(adapter->tx_ring);
--	kfree(adapter->rx_ring);
--err_iounmap:
--	iounmap(adapter->hw.reg);
- err_free_netdev:
- 	free_netdev(netdev);
--err_release_pci:
--	pci_release_regions(pdev);
--err_disable_device:
--	pci_disable_device(pdev);
- 	return ret;
- }
- 
diff --git a/patches.minnowboard/pch_gbe-use-pch_gbe_phy_regs_len-instead-of-32.patch b/patches.minnowboard/pch_gbe-use-pch_gbe_phy_regs_len-instead-of-32.patch
deleted file mode 100644
index 62a4d1f017f61..0000000000000
--- a/patches.minnowboard/pch_gbe-use-pch_gbe_phy_regs_len-instead-of-32.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From b04d68ebb04aa2d4ab9392c5353a53c81be7b847 Mon Sep 17 00:00:00 2001
-From: Darren Hart <dvhart@linux.intel.com>
-Date: Sat, 18 May 2013 14:45:55 -0700
-Subject: pch_gbe: Use PCH_GBE_PHY_REGS_LEN instead of 32
-
-From: Darren Hart <dvhart@linux.intel.com>
-
-commit b04d68ebb04aa2d4ab9392c5353a53c81be7b847 upstream.
-
-Avoid using magic numbers when we have perfectly good defines just lying
-around.
-
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
-Cc: "David S. Miller" <davem@davemloft.net>
-Cc: "H. Peter Anvin" <hpa@zytor.com>
-Cc: Peter Waskiewicz <peter.p.waskiewicz.jr@intel.com>
-Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-Cc: netdev@vger.kernel.org
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-
----
- drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c
-+++ b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c
-@@ -682,7 +682,7 @@ static int pch_gbe_init_phy(struct pch_g
- 	}
- 	adapter->hw.phy.addr = adapter->mii.phy_id;
- 	netdev_dbg(netdev, "phy_addr = %d\n", adapter->mii.phy_id);
--	if (addr == 32)
-+	if (addr == PCH_GBE_PHY_REGS_LEN)
- 		return -EAGAIN;
- 	/* Selected the phy and isolate the rest */
- 	for (addr = 0; addr < PCH_GBE_PHY_REGS_LEN; addr++) {
diff --git a/patches.minnowboard/pch_uart-use-dmi-interface-for-board-detection.patch b/patches.minnowboard/pch_uart-use-dmi-interface-for-board-detection.patch
deleted file mode 100644
index 8c33bd7fcb53b..0000000000000
--- a/patches.minnowboard/pch_uart-use-dmi-interface-for-board-detection.patch
+++ /dev/null
@@ -1,107 +0,0 @@
-From 4e3234897fbc4c83286f3cd3105d38b26634812d Mon Sep 17 00:00:00 2001
-From: Darren Hart <dvhart@linux.intel.com>
-Date: Fri, 12 Jul 2013 17:58:05 -0700
-Subject: pch_uart: Use DMI interface for board detection
-
-From: Darren Hart <dvhart@linux.intel.com>
-
-commit 4e3234897fbc4c83286f3cd3105d38b26634812d upstream.
-
-Use the DMI interface rather than manually matching DMI strings.
-
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
-Cc: Michael Brunner <mibru@gmx.de>
-Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-
----
- drivers/tty/serial/pch_uart.c |   71 ++++++++++++++++++++++++++++--------------
- 1 file changed, 49 insertions(+), 22 deletions(-)
-
---- a/drivers/tty/serial/pch_uart.c
-+++ b/drivers/tty/serial/pch_uart.c
-@@ -373,35 +373,62 @@ static const struct file_operations port
- };
- #endif	/* CONFIG_DEBUG_FS */
- 
-+static struct dmi_system_id __initdata pch_uart_dmi_table[] = {
-+	{
-+		.ident = "CM-iTC",
-+		{
-+			DMI_MATCH(DMI_BOARD_NAME, "CM-iTC"),
-+		},
-+		(void *)CMITC_UARTCLK,
-+	},
-+	{
-+		.ident = "FRI2",
-+		{
-+			DMI_MATCH(DMI_BIOS_VERSION, "FRI2"),
-+		},
-+		(void *)FRI2_64_UARTCLK,
-+	},
-+	{
-+		.ident = "Fish River Island II",
-+		{
-+			DMI_MATCH(DMI_PRODUCT_NAME, "Fish River Island II"),
-+		},
-+		(void *)FRI2_48_UARTCLK,
-+	},
-+	{
-+		.ident = "COMe-mTT",
-+		{
-+			DMI_MATCH(DMI_BOARD_NAME, "COMe-mTT"),
-+		},
-+		(void *)NTC1_UARTCLK,
-+	},
-+	{
-+		.ident = "nanoETXexpress-TT",
-+		{
-+			DMI_MATCH(DMI_BOARD_NAME, "nanoETXexpress-TT"),
-+		},
-+		(void *)NTC1_UARTCLK,
-+	},
-+	{
-+		.ident = "MinnowBoard",
-+		{
-+			DMI_MATCH(DMI_BOARD_NAME, "MinnowBoard"),
-+		},
-+		(void *)MINNOW_UARTCLK,
-+	},
-+};
-+
- /* Return UART clock, checking for board specific clocks. */
- static int pch_uart_get_uartclk(void)
- {
--	const char *cmp;
-+	const struct dmi_system_id *d;
- 
- 	if (user_uartclk)
- 		return user_uartclk;
- 
--	cmp = dmi_get_system_info(DMI_BOARD_NAME);
--	if (cmp && strstr(cmp, "CM-iTC"))
--		return CMITC_UARTCLK;
--
--	cmp = dmi_get_system_info(DMI_BIOS_VERSION);
--	if (cmp && strnstr(cmp, "FRI2", 4))
--		return FRI2_64_UARTCLK;
--
--	cmp = dmi_get_system_info(DMI_PRODUCT_NAME);
--	if (cmp && strstr(cmp, "Fish River Island II"))
--		return FRI2_48_UARTCLK;
--
--	/* Kontron COMe-mTT10 (nanoETXexpress-TT) */
--	cmp = dmi_get_system_info(DMI_BOARD_NAME);
--	if (cmp && (strstr(cmp, "COMe-mTT") ||
--		    strstr(cmp, "nanoETXexpress-TT")))
--		return NTC1_UARTCLK;
--
--	cmp = dmi_get_system_info(DMI_BOARD_NAME);
--	if (cmp && strstr(cmp, "MinnowBoard"))
--		return MINNOW_UARTCLK;
-+	d = dmi_first_match(pch_uart_dmi_table);
-+	if (d)
-+		return (int)d->driver_data;
- 
- 	return DEFAULT_UARTCLK;
- }
diff --git a/patches.minnowboard/pci-add-circuitco-vendor-id-and-subsystem-id.patch b/patches.minnowboard/pci-add-circuitco-vendor-id-and-subsystem-id.patch
deleted file mode 100644
index 04ee87538ce51..0000000000000
--- a/patches.minnowboard/pci-add-circuitco-vendor-id-and-subsystem-id.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From 91bbe923d18cfff4286a84e59b9d5b61389c3027 Mon Sep 17 00:00:00 2001
-From: Darren Hart <dvhart@linux.intel.com>
-Date: Tue, 25 Jun 2013 20:08:46 -0600
-Subject: PCI: Add CircuitCo vendor ID and subsystem ID
-
-From: Darren Hart <dvhart@linux.intel.com>
-
-commit 91bbe923d18cfff4286a84e59b9d5b61389c3027 upstream.
-
-Add CircuitCo's newly created VENDOR ID and their first board subsystem
-ID for the MinnowBoard.
-
-[bhelgaas: sort, change DEVICE_ID to SUBSYSTEM_ID]
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
-Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-
----
- include/linux/pci_ids.h |    3 +++
- 1 file changed, 3 insertions(+)
-
---- a/include/linux/pci_ids.h
-+++ b/include/linux/pci_ids.h
-@@ -2478,6 +2478,9 @@
- 
- #define PCI_VENDOR_ID_ASMEDIA		0x1b21
- 
-+#define PCI_VENDOR_ID_CIRCUITCO		0x1cc8
-+#define PCI_SUBSYSTEM_ID_CIRCUITCO_MINNOWBOARD	0x0001
-+
- #define PCI_VENDOR_ID_TEKRAM		0x1de1
- #define PCI_DEVICE_ID_TEKRAM_DC290	0xdc29
- 
diff --git a/patches.minnowboard/serial-pch_uart-fix-compilation-warning.patch b/patches.minnowboard/serial-pch_uart-fix-compilation-warning.patch
deleted file mode 100644
index 3e78a7f6995cc..0000000000000
--- a/patches.minnowboard/serial-pch_uart-fix-compilation-warning.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From 09a5163f5c0eb0944f3a2c219acd75933f74fda2 Mon Sep 17 00:00:00 2001
-From: Luis Henriques <luis.henriques@canonical.com>
-Date: Wed, 14 Aug 2013 23:18:37 +0100
-Subject: serial: pch_uart: fix compilation warning
-
-From: Luis Henriques <luis.henriques@canonical.com>
-
-commit 09a5163f5c0eb0944f3a2c219acd75933f74fda2 upstream.
-
-Function wait_for_xmitr is invoked only on functions that either depend
-on CONFIG_CONSOLE_POLL or CONFIG_SERIAL_PCH_UART_CONSOLE.
-
-This patch fixes the following warning:
-
-drivers/tty/serial/pch_uart.c:1504:13: warning: ‘wait_for_xmitr’ defined but not used [-Wunused-function]
-
-Signed-off-by: Luis Henriques <luis.henriques@canonical.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-
----
- drivers/tty/serial/pch_uart.c |    2 ++
- 1 file changed, 2 insertions(+)
-
---- a/drivers/tty/serial/pch_uart.c
-+++ b/drivers/tty/serial/pch_uart.c
-@@ -1527,6 +1527,7 @@ static int pch_uart_verify_port(struct u
- 	return 0;
- }
- 
-+#if defined(CONFIG_CONSOLE_POLL) || defined(CONFIG_SERIAL_PCH_UART_CONSOLE)
- /*
-  *	Wait for transmitter & holding register to empty
-  */
-@@ -1557,6 +1558,7 @@ static void wait_for_xmitr(struct eg20t_
- 		}
- 	}
- }
-+#endif /* CONFIG_CONSOLE_POLL || CONFIG_SERIAL_PCH_UART_CONSOLE */
- 
- #ifdef CONFIG_CONSOLE_POLL
- /*
diff --git a/patches.minnowboard/serial-pch_uart-fix-signed-ness-and-casting-of-uartclk-related-fields.patch b/patches.minnowboard/serial-pch_uart-fix-signed-ness-and-casting-of-uartclk-related-fields.patch
deleted file mode 100644
index dc62bd60ffdae..0000000000000
--- a/patches.minnowboard/serial-pch_uart-fix-signed-ness-and-casting-of-uartclk-related-fields.patch
+++ /dev/null
@@ -1,86 +0,0 @@
-From e26439ce03f0808f5d797ca33f180fdb8258335a Mon Sep 17 00:00:00 2001
-From: Darren Hart <dvhart@linux.intel.com>
-Date: Mon, 29 Jul 2013 15:15:07 -0700
-Subject: serial: pch_uart: Fix signed-ness and casting of uartclk related fields
-
-From: Darren Hart <dvhart@linux.intel.com>
-
-commit e26439ce03f0808f5d797ca33f180fdb8258335a upstream.
-
-Storing one struct per known board would be overkill. Pre-cast the
-driver_data pointer to an unsigned long to avoid the pointer to int
-compiler warning:
-
-drivers/tty/serial/pch_uart.c:431:10: warning: cast from pointer to
-integer of different size [-Wpointer-to-int-cast]
-
-Unify the signed-ness of the baud and uartclk types throughout the
-driver.
-
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
-Reported-by: kbuild test robot <fengguang.wu@intel.com>
-Cc: Jiri Slaby <jslaby@suse.cz>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-
----
- drivers/tty/serial/pch_uart.c |   13 ++++++-------
- 1 file changed, 6 insertions(+), 7 deletions(-)
-
---- a/drivers/tty/serial/pch_uart.c
-+++ b/drivers/tty/serial/pch_uart.c
-@@ -232,7 +232,7 @@ struct eg20t_port {
- 	unsigned int iobase;
- 	struct pci_dev *pdev;
- 	int fifo_size;
--	int uartclk;
-+	unsigned int uartclk;
- 	int start_tx;
- 	int start_rx;
- 	int tx_empty;
-@@ -419,7 +419,7 @@ static struct dmi_system_id pch_uart_dmi
- };
- 
- /* Return UART clock, checking for board specific clocks. */
--static int pch_uart_get_uartclk(void)
-+static unsigned int pch_uart_get_uartclk(void)
- {
- 	const struct dmi_system_id *d;
- 
-@@ -428,7 +428,7 @@ static int pch_uart_get_uartclk(void)
- 
- 	d = dmi_first_match(pch_uart_dmi_table);
- 	if (d)
--		return (int)d->driver_data;
-+		return (unsigned long)d->driver_data;
- 
- 	return DEFAULT_UARTCLK;
- }
-@@ -449,7 +449,7 @@ static void pch_uart_hal_disable_interru
- 	iowrite8(ier, priv->membase + UART_IER);
- }
- 
--static int pch_uart_hal_set_line(struct eg20t_port *priv, int baud,
-+static int pch_uart_hal_set_line(struct eg20t_port *priv, unsigned int baud,
- 				 unsigned int parity, unsigned int bits,
- 				 unsigned int stb)
- {
-@@ -484,7 +484,7 @@ static int pch_uart_hal_set_line(struct
- 	lcr |= bits;
- 	lcr |= stb;
- 
--	dev_dbg(priv->port.dev, "%s:baud = %d, div = %04x, lcr = %02x (%lu)\n",
-+	dev_dbg(priv->port.dev, "%s:baud = %u, div = %04x, lcr = %02x (%lu)\n",
- 		 __func__, baud, div, lcr, jiffies);
- 	iowrite8(PCH_UART_LCR_DLAB, priv->membase + UART_LCR);
- 	iowrite8(dll, priv->membase + PCH_UART_DLL);
-@@ -1393,9 +1393,8 @@ static void pch_uart_shutdown(struct uar
- static void pch_uart_set_termios(struct uart_port *port,
- 				 struct ktermios *termios, struct ktermios *old)
- {
--	int baud;
- 	int rtn;
--	unsigned int parity, bits, stb;
-+	unsigned int baud, parity, bits, stb;
- 	struct eg20t_port *priv;
- 	unsigned long flags;
- 
diff --git a/patches.minnowboard/serial-pch_uart-remove-__initdata-annotation-from-dmi_table.patch b/patches.minnowboard/serial-pch_uart-remove-__initdata-annotation-from-dmi_table.patch
deleted file mode 100644
index c81ff9142e49f..0000000000000
--- a/patches.minnowboard/serial-pch_uart-remove-__initdata-annotation-from-dmi_table.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 0a09ae98eade956bbc681cb905584effe4a1ed95 Mon Sep 17 00:00:00 2001
-From: Darren Hart <dvhart@linux.intel.com>
-Date: Mon, 29 Jul 2013 09:58:14 -0700
-Subject: serial: pch_uart: Remove __initdata annotation from dmi_table
-
-From: Darren Hart <dvhart@linux.intel.com>
-
-commit 0a09ae98eade956bbc681cb905584effe4a1ed95 upstream.
-
-The dmi_table is best accessed from the probe function, which is not
-an __init function. Drop the __initdata annotation from the dmi_table
-to avoid the section mismatch compiler warnings:
-
-WARNING: drivers/tty/serial/pch_uart.o(.text+0x4871): Section mismatch
-in reference from the function pch_uart_init_port() to the variable
-.init.data:pch_uart_dmi_table
-
-Signed-off-by: Darren Hart <dvhart@linux.intel.com>
-Reported-by: kbuild test robot <fengguang.wu@intel.com>
-Cc: Jiri Slaby <jslaby@suse.cz>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-
----
- drivers/tty/serial/pch_uart.c |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/tty/serial/pch_uart.c
-+++ b/drivers/tty/serial/pch_uart.c
-@@ -373,7 +373,7 @@ static const struct file_operations port
- };
- #endif	/* CONFIG_DEBUG_FS */
- 
--static struct dmi_system_id __initdata pch_uart_dmi_table[] = {
-+static struct dmi_system_id pch_uart_dmi_table[] = {
- 	{
- 		.ident = "CM-iTC",
- 		{
diff --git a/patches.renesas/0001-ASoC-ak4642-Remove-redundant-break.patch b/patches.renesas/0001-ASoC-ak4642-Remove-redundant-break.patch
deleted file mode 100644
index d5590aa4d2b95..0000000000000
--- a/patches.renesas/0001-ASoC-ak4642-Remove-redundant-break.patch
+++ /dev/null
@@ -1,38 +0,0 @@
-From d2f3de6962fd7377d4f6c6cc080b8db33926a679 Mon Sep 17 00:00:00 2001
-From: Sachin Kamat <sachin.kamat@linaro.org>
-Date: Fri, 13 Sep 2013 15:50:50 +0530
-Subject: ASoC: ak4642: Remove redundant break
-
-'break' after return statement is redundant. Remove it.
-
-Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
-Signed-off-by: Mark Brown <broonie@linaro.org>
-(cherry picked from commit 0feb23d1bdf31db903069d3d94892e56b5c11981)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/codecs/ak4642.c | 2 --
- 1 file changed, 2 deletions(-)
-
-diff --git a/sound/soc/codecs/ak4642.c b/sound/soc/codecs/ak4642.c
-index 2d0378709702..21c35ed778cc 100644
---- a/sound/soc/codecs/ak4642.c
-+++ b/sound/soc/codecs/ak4642.c
-@@ -352,7 +352,6 @@ static int ak4642_dai_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
- 	 */
- 	default:
- 		return -EINVAL;
--		break;
- 	}
- 	snd_soc_update_bits(codec, MD_CTL1, DIF_MASK, data);
- 
-@@ -405,7 +404,6 @@ static int ak4642_dai_hw_params(struct snd_pcm_substream *substream,
- 		break;
- 	default:
- 		return -EINVAL;
--		break;
- 	}
- 	snd_soc_update_bits(codec, MD_CTL2, FS_MASK, rate);
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0001-clocksource-sh_cmt-32-bit-control-register-support.patch b/patches.renesas/0001-clocksource-sh_cmt-32-bit-control-register-support.patch
deleted file mode 100644
index 8ad4c20a84af4..0000000000000
--- a/patches.renesas/0001-clocksource-sh_cmt-32-bit-control-register-support.patch
+++ /dev/null
@@ -1,153 +0,0 @@
-From 30c42ab8245b0db4c0251415e318a7f1d4c5ddf6 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Mon, 17 Jun 2013 15:40:52 +0900
-Subject: clocksource: sh_cmt: 32-bit control register support
-
-Add support for CMT hardware with 32-bit control and counter
-registers, as found on r8a73a4 and r8a7790. To use the CMT
-with 32-bit hardware a second I/O memory resource needs to
-point out the CMSTR register and it needs to be 32 bit wide.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Reviewed-by: Daniel Lezcano <daniel.lezcano@linaro.org>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 8874c5e3b92fc23af4fd4da8830f7d4de41d03a0)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/clocksource/sh_cmt.c | 50 +++++++++++++++++++++++++++++++-------------
- 1 file changed, 36 insertions(+), 14 deletions(-)
-
-diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c
-index 08d0c418c94a..0965e9848b3d 100644
---- a/drivers/clocksource/sh_cmt.c
-+++ b/drivers/clocksource/sh_cmt.c
-@@ -37,6 +37,7 @@
- 
- struct sh_cmt_priv {
- 	void __iomem *mapbase;
-+	void __iomem *mapbase_str;
- 	struct clk *clk;
- 	unsigned long width; /* 16 or 32 bit version of hardware block */
- 	unsigned long overflow_bit;
-@@ -79,6 +80,12 @@ struct sh_cmt_priv {
-  * CMCSR 0xffca0060 16-bit
-  * CMCNT 0xffca0064 32-bit
-  * CMCOR 0xffca0068 32-bit
-+ *
-+ * "32-bit counter and 32-bit control" as found on r8a73a4 and r8a7790:
-+ * CMSTR 0xffca0500 32-bit
-+ * CMCSR 0xffca0510 32-bit
-+ * CMCNT 0xffca0514 32-bit
-+ * CMCOR 0xffca0518 32-bit
-  */
- 
- static unsigned long sh_cmt_read16(void __iomem *base, unsigned long offs)
-@@ -109,9 +116,7 @@ static void sh_cmt_write32(void __iomem *base, unsigned long offs,
- 
- static inline unsigned long sh_cmt_read_cmstr(struct sh_cmt_priv *p)
- {
--	struct sh_timer_config *cfg = p->pdev->dev.platform_data;
--
--	return p->read_control(p->mapbase - cfg->channel_offset, 0);
-+	return p->read_control(p->mapbase_str, 0);
- }
- 
- static inline unsigned long sh_cmt_read_cmcsr(struct sh_cmt_priv *p)
-@@ -127,9 +132,7 @@ static inline unsigned long sh_cmt_read_cmcnt(struct sh_cmt_priv *p)
- static inline void sh_cmt_write_cmstr(struct sh_cmt_priv *p,
- 				      unsigned long value)
- {
--	struct sh_timer_config *cfg = p->pdev->dev.platform_data;
--
--	p->write_control(p->mapbase - cfg->channel_offset, 0, value);
-+	p->write_control(p->mapbase_str, 0, value);
- }
- 
- static inline void sh_cmt_write_cmcsr(struct sh_cmt_priv *p,
-@@ -676,7 +679,7 @@ static int sh_cmt_register(struct sh_cmt_priv *p, char *name,
- static int sh_cmt_setup(struct sh_cmt_priv *p, struct platform_device *pdev)
- {
- 	struct sh_timer_config *cfg = pdev->dev.platform_data;
--	struct resource *res;
-+	struct resource *res, *res2;
- 	int irq, ret;
- 	ret = -ENXIO;
- 
-@@ -694,6 +697,9 @@ static int sh_cmt_setup(struct sh_cmt_priv *p, struct platform_device *pdev)
- 		goto err0;
- 	}
- 
-+	/* optional resource for the shared timer start/stop register */
-+	res2 = platform_get_resource(p->pdev, IORESOURCE_MEM, 1);
-+
- 	irq = platform_get_irq(p->pdev, 0);
- 	if (irq < 0) {
- 		dev_err(&p->pdev->dev, "failed to get irq\n");
-@@ -707,6 +713,15 @@ static int sh_cmt_setup(struct sh_cmt_priv *p, struct platform_device *pdev)
- 		goto err0;
- 	}
- 
-+	/* map second resource for CMSTR */
-+	p->mapbase_str = ioremap_nocache(res2 ? res2->start :
-+					 res->start - cfg->channel_offset,
-+					 res2 ? resource_size(res2) : 2);
-+	if (p->mapbase_str == NULL) {
-+		dev_err(&p->pdev->dev, "failed to remap I/O second memory\n");
-+		goto err1;
-+	}
-+
- 	/* request irq using setup_irq() (too early for request_irq()) */
- 	p->irqaction.name = dev_name(&p->pdev->dev);
- 	p->irqaction.handler = sh_cmt_interrupt;
-@@ -719,11 +734,17 @@ static int sh_cmt_setup(struct sh_cmt_priv *p, struct platform_device *pdev)
- 	if (IS_ERR(p->clk)) {
- 		dev_err(&p->pdev->dev, "cannot get clock\n");
- 		ret = PTR_ERR(p->clk);
--		goto err1;
-+		goto err2;
- 	}
- 
--	p->read_control = sh_cmt_read16;
--	p->write_control = sh_cmt_write16;
-+	if (res2 && (resource_size(res2) == 4)) {
-+		/* assume both CMSTR and CMCSR to be 32-bit */
-+		p->read_control = sh_cmt_read32;
-+		p->write_control = sh_cmt_write32;
-+	} else {
-+		p->read_control = sh_cmt_read16;
-+		p->write_control = sh_cmt_write16;
-+	}
- 
- 	if (resource_size(res) == 6) {
- 		p->width = 16;
-@@ -752,22 +773,23 @@ static int sh_cmt_setup(struct sh_cmt_priv *p, struct platform_device *pdev)
- 			      cfg->clocksource_rating);
- 	if (ret) {
- 		dev_err(&p->pdev->dev, "registration failed\n");
--		goto err2;
-+		goto err3;
- 	}
- 	p->cs_enabled = false;
- 
- 	ret = setup_irq(irq, &p->irqaction);
- 	if (ret) {
- 		dev_err(&p->pdev->dev, "failed to request irq %d\n", irq);
--		goto err2;
-+		goto err3;
- 	}
- 
- 	platform_set_drvdata(pdev, p);
- 
- 	return 0;
--err2:
-+err3:
- 	clk_put(p->clk);
--
-+err2:
-+	iounmap(p->mapbase_str);
- err1:
- 	iounmap(p->mapbase);
- err0:
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0001-serial-sh-sci-HSCIF-support.patch b/patches.renesas/0001-serial-sh-sci-HSCIF-support.patch
deleted file mode 100644
index 3e03bd02dea65..0000000000000
--- a/patches.renesas/0001-serial-sh-sci-HSCIF-support.patch
+++ /dev/null
@@ -1,341 +0,0 @@
-From 81c07ee1346e7f7255af5511b715e981da36304e Mon Sep 17 00:00:00 2001
-From: Ulrich Hecht <ulrich.hecht@gmail.com>
-Date: Fri, 31 May 2013 17:57:01 +0200
-Subject: serial: sh-sci: HSCIF support
-
-Adds support for "High Speed Serial Communications Interface with FIFO",
-essentially a SCIF with 128-byte FIFOs and more accurate baud rate
-generator.
-
-Signed-off-by: Ulrich Hecht <ulrich.hecht@gmail.com>
-Acked-by: Paul Mundt <lethal@linux-sh.org>
-Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit f303b364b41d3fc5bf879799128958400b7859aa)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/tty/serial/sh-sci.c      |  102 +++++++++++++++++++++++++++++++++++----
- include/linux/serial_sci.h       |   12 +++-
- include/uapi/linux/serial_core.h |    3 +
- 3 files changed, 106 insertions(+), 11 deletions(-)
-
---- a/drivers/tty/serial/sh-sci.c
-+++ b/drivers/tty/serial/sh-sci.c
-@@ -146,6 +146,7 @@ static struct plat_sci_reg sci_regmap[SC
- 		[SCRFDR]	= sci_reg_invalid,
- 		[SCSPTR]	= sci_reg_invalid,
- 		[SCLSR]		= sci_reg_invalid,
-+		[HSSRR]		= sci_reg_invalid,
- 	},
- 
- 	/*
-@@ -165,6 +166,7 @@ static struct plat_sci_reg sci_regmap[SC
- 		[SCRFDR]	= sci_reg_invalid,
- 		[SCSPTR]	= sci_reg_invalid,
- 		[SCLSR]		= sci_reg_invalid,
-+		[HSSRR]		= sci_reg_invalid,
- 	},
- 
- 	/*
-@@ -183,6 +185,7 @@ static struct plat_sci_reg sci_regmap[SC
- 		[SCRFDR]	= sci_reg_invalid,
- 		[SCSPTR]	= sci_reg_invalid,
- 		[SCLSR]		= sci_reg_invalid,
-+		[HSSRR]		= sci_reg_invalid,
- 	},
- 
- 	/*
-@@ -201,6 +204,7 @@ static struct plat_sci_reg sci_regmap[SC
- 		[SCRFDR]	= { 0x3c, 16 },
- 		[SCSPTR]	= sci_reg_invalid,
- 		[SCLSR]		= sci_reg_invalid,
-+		[HSSRR]		= sci_reg_invalid,
- 	},
- 
- 	/*
-@@ -220,6 +224,7 @@ static struct plat_sci_reg sci_regmap[SC
- 		[SCRFDR]	= sci_reg_invalid,
- 		[SCSPTR]	= { 0x20, 16 },
- 		[SCLSR]		= { 0x24, 16 },
-+		[HSSRR]		= sci_reg_invalid,
- 	},
- 
- 	/*
-@@ -238,6 +243,7 @@ static struct plat_sci_reg sci_regmap[SC
- 		[SCRFDR]	= sci_reg_invalid,
- 		[SCSPTR]	= sci_reg_invalid,
- 		[SCLSR]		= sci_reg_invalid,
-+		[HSSRR]		= sci_reg_invalid,
- 	},
- 
- 	/*
-@@ -256,6 +262,26 @@ static struct plat_sci_reg sci_regmap[SC
- 		[SCRFDR]	= sci_reg_invalid,
- 		[SCSPTR]	= { 0x20, 16 },
- 		[SCLSR]		= { 0x24, 16 },
-+		[HSSRR]		= sci_reg_invalid,
-+	},
-+
-+	/*
-+	 * Common HSCIF definitions.
-+	 */
-+	[SCIx_HSCIF_REGTYPE] = {
-+		[SCSMR]		= { 0x00, 16 },
-+		[SCBRR]		= { 0x04,  8 },
-+		[SCSCR]		= { 0x08, 16 },
-+		[SCxTDR]	= { 0x0c,  8 },
-+		[SCxSR]		= { 0x10, 16 },
-+		[SCxRDR]	= { 0x14,  8 },
-+		[SCFCR]		= { 0x18, 16 },
-+		[SCFDR]		= { 0x1c, 16 },
-+		[SCTFDR]	= sci_reg_invalid,
-+		[SCRFDR]	= sci_reg_invalid,
-+		[SCSPTR]	= { 0x20, 16 },
-+		[SCLSR]		= { 0x24, 16 },
-+		[HSSRR]		= { 0x40, 16 },
- 	},
- 
- 	/*
-@@ -275,6 +301,7 @@ static struct plat_sci_reg sci_regmap[SC
- 		[SCRFDR]	= sci_reg_invalid,
- 		[SCSPTR]	= sci_reg_invalid,
- 		[SCLSR]		= { 0x24, 16 },
-+		[HSSRR]		= sci_reg_invalid,
- 	},
- 
- 	/*
-@@ -294,6 +321,7 @@ static struct plat_sci_reg sci_regmap[SC
- 		[SCRFDR]	= { 0x20, 16 },
- 		[SCSPTR]	= { 0x24, 16 },
- 		[SCLSR]		= { 0x28, 16 },
-+		[HSSRR]		= sci_reg_invalid,
- 	},
- 
- 	/*
-@@ -313,6 +341,7 @@ static struct plat_sci_reg sci_regmap[SC
- 		[SCRFDR]	= sci_reg_invalid,
- 		[SCSPTR]	= sci_reg_invalid,
- 		[SCLSR]		= sci_reg_invalid,
-+		[HSSRR]		= sci_reg_invalid,
- 	},
- };
- 
-@@ -374,6 +403,9 @@ static int sci_probe_regmap(struct plat_
- 		 */
- 		cfg->regtype = SCIx_SH4_SCIF_REGTYPE;
- 		break;
-+	case PORT_HSCIF:
-+		cfg->regtype = SCIx_HSCIF_REGTYPE;
-+		break;
- 	default:
- 		printk(KERN_ERR "Can't probe register map for given port\n");
- 		return -EINVAL;
-@@ -1798,6 +1830,42 @@ static unsigned int sci_scbrr_calc(unsig
- 	return ((freq + 16 * bps) / (32 * bps) - 1);
- }
- 
-+/* calculate sample rate, BRR, and clock select for HSCIF */
-+static void sci_baud_calc_hscif(unsigned int bps, unsigned long freq,
-+				int *brr, unsigned int *srr,
-+				unsigned int *cks)
-+{
-+	int sr, c, br, err;
-+	int min_err = 1000; /* 100% */
-+
-+	/* Find the combination of sample rate and clock select with the
-+	   smallest deviation from the desired baud rate. */
-+	for (sr = 8; sr <= 32; sr++) {
-+		for (c = 0; c <= 3; c++) {
-+			/* integerized formulas from HSCIF documentation */
-+			br = freq / (sr * (1 << (2 * c + 1)) * bps) - 1;
-+			if (br < 0 || br > 255)
-+				continue;
-+			err = freq / ((br + 1) * bps * sr *
-+			      (1 << (2 * c + 1)) / 1000) - 1000;
-+			if (min_err > err) {
-+				min_err = err;
-+				*brr = br;
-+				*srr = sr - 1;
-+				*cks = c;
-+			}
-+		}
-+	}
-+
-+	if (min_err == 1000) {
-+		WARN_ON(1);
-+		/* use defaults */
-+		*brr = 255;
-+		*srr = 15;
-+		*cks = 0;
-+	}
-+}
-+
- static void sci_reset(struct uart_port *port)
- {
- 	struct plat_sci_reg *reg;
-@@ -1821,6 +1889,7 @@ static void sci_set_termios(struct uart_
- 	struct plat_sci_reg *reg;
- 	unsigned int baud, smr_val, max_baud, cks;
- 	int t = -1;
-+	unsigned int srr;
- 
- 	/*
- 	 * earlyprintk comes here early on with port->uartclk set to zero.
-@@ -1833,8 +1902,17 @@ static void sci_set_termios(struct uart_
- 	max_baud = port->uartclk ? port->uartclk / 16 : 115200;
- 
- 	baud = uart_get_baud_rate(port, termios, old, 0, max_baud);
--	if (likely(baud && port->uartclk))
--		t = sci_scbrr_calc(s->cfg->scbrr_algo_id, baud, port->uartclk);
-+	if (likely(baud && port->uartclk)) {
-+		if (s->cfg->scbrr_algo_id == SCBRR_ALGO_6) {
-+			sci_baud_calc_hscif(baud, port->uartclk, &t, &srr,
-+					    &cks);
-+		} else {
-+			t = sci_scbrr_calc(s->cfg->scbrr_algo_id, baud,
-+					   port->uartclk);
-+			for (cks = 0; t >= 256 && cks <= 3; cks++)
-+				t >>= 2;
-+		}
-+	}
- 
- 	sci_port_enable(s);
- 
-@@ -1853,15 +1931,15 @@ static void sci_set_termios(struct uart_
- 
- 	uart_update_timeout(port, termios->c_cflag, baud);
- 
--	for (cks = 0; t >= 256 && cks <= 3; cks++)
--		t >>= 2;
--
- 	dev_dbg(port->dev, "%s: SMR %x, cks %x, t %x, SCSCR %x\n",
- 		__func__, smr_val, cks, t, s->cfg->scscr);
- 
- 	if (t >= 0) {
- 		serial_port_out(port, SCSMR, (smr_val & ~3) | cks);
- 		serial_port_out(port, SCBRR, t);
-+		reg = sci_getreg(port, HSSRR);
-+		if (reg->size)
-+			serial_port_out(port, HSSRR, srr | HSCIF_SRE);
- 		udelay((1000000+(baud-1)) / baud); /* Wait one bit interval */
- 	} else
- 		serial_port_out(port, SCSMR, smr_val);
-@@ -1947,6 +2025,8 @@ static const char *sci_type(struct uart_
- 		return "scifa";
- 	case PORT_SCIFB:
- 		return "scifb";
-+	case PORT_HSCIF:
-+		return "hscif";
- 	}
- 
- 	return NULL;
-@@ -1960,7 +2040,10 @@ static inline unsigned long sci_port_siz
- 	 * from platform resource data at such a time that ports begin to
- 	 * behave more erratically.
- 	 */
--	return 64;
-+	if (port->type == PORT_HSCIF)
-+		return 96;
-+	else
-+		return 64;
- }
- 
- static int sci_remap_port(struct uart_port *port)
-@@ -2085,6 +2168,9 @@ static int sci_init_single(struct platfo
- 	case PORT_SCIFB:
- 		port->fifosize = 256;
- 		break;
-+	case PORT_HSCIF:
-+		port->fifosize = 128;
-+		break;
- 	case PORT_SCIFA:
- 		port->fifosize = 64;
- 		break;
-@@ -2325,7 +2411,7 @@ static inline int sci_probe_earlyprintk(
- #endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */
- 
- static char banner[] __initdata =
--	KERN_INFO "SuperH SCI(F) driver initialized\n";
-+	KERN_INFO "SuperH (H)SCI(F) driver initialized\n";
- 
- static struct uart_driver sci_uart_driver = {
- 	.owner		= THIS_MODULE,
-@@ -2484,4 +2570,4 @@ module_exit(sci_exit);
- MODULE_LICENSE("GPL");
- MODULE_ALIAS("platform:sh-sci");
- MODULE_AUTHOR("Paul Mundt");
--MODULE_DESCRIPTION("SuperH SCI(F) serial driver");
-+MODULE_DESCRIPTION("SuperH (H)SCI(F) serial driver");
---- a/include/linux/serial_sci.h
-+++ b/include/linux/serial_sci.h
-@@ -5,7 +5,7 @@
- #include <linux/sh_dma.h>
- 
- /*
-- * Generic header for SuperH SCI(F) (used by sh/sh64/h8300 and related parts)
-+ * Generic header for SuperH (H)SCI(F) (used by sh/sh64/h8300 and related parts)
-  */
- 
- #define SCIx_NOT_SUPPORTED	(-1)
-@@ -16,6 +16,7 @@ enum {
- 	SCBRR_ALGO_3,		/* (((clk * 2) + 16 * bps) / (16 * bps) - 1) */
- 	SCBRR_ALGO_4,		/* (((clk * 2) + 16 * bps) / (32 * bps) - 1) */
- 	SCBRR_ALGO_5,		/* (((clk * 1000 / 32) / bps) - 1) */
-+	SCBRR_ALGO_6,		/* HSCIF variable sample rate algorithm */
- };
- 
- #define SCSCR_TIE	(1 << 7)
-@@ -37,7 +38,7 @@ enum {
- 
- #define SCI_DEFAULT_ERROR_MASK (SCI_PER | SCI_FER)
- 
--/* SCxSR SCIF */
-+/* SCxSR SCIF, HSCIF */
- #define SCIF_ER    0x0080
- #define SCIF_TEND  0x0040
- #define SCIF_TDFE  0x0020
-@@ -55,6 +56,9 @@ enum {
- #define SCSPTR_SPB2IO	(1 << 1)
- #define SCSPTR_SPB2DT	(1 << 0)
- 
-+/* HSSRR HSCIF */
-+#define HSCIF_SRE	0x8000
-+
- /* Offsets into the sci_port->irqs array */
- enum {
- 	SCIx_ERI_IRQ,
-@@ -90,6 +94,7 @@ enum {
- 	SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
- 	SCIx_SH4_SCIF_FIFODATA_REGTYPE,
- 	SCIx_SH7705_SCIF_REGTYPE,
-+	SCIx_HSCIF_REGTYPE,
- 
- 	SCIx_NR_REGTYPES,
- };
-@@ -115,6 +120,7 @@ enum {
- 	SCSMR, SCBRR, SCSCR, SCxSR,
- 	SCFCR, SCFDR, SCxTDR, SCxRDR,
- 	SCLSR, SCTFDR, SCRFDR, SCSPTR,
-+	HSSRR,
- 
- 	SCIx_NR_REGS,
- };
-@@ -137,7 +143,7 @@ struct plat_sci_port {
- 	unsigned long	mapbase;		/* resource base */
- 	unsigned int	irqs[SCIx_NR_IRQS];	/* ERI, RXI, TXI, BRI */
- 	unsigned int	gpios[SCIx_NR_FNS];	/* SCK, RXD, TXD, CTS, RTS */
--	unsigned int	type;			/* SCI / SCIF / IRDA */
-+	unsigned int	type;			/* SCI / SCIF / IRDA / HSCIF */
- 	upf_t		flags;			/* UPF_* flags */
- 	unsigned long	capabilities;		/* Port features/capabilities */
- 
---- a/include/uapi/linux/serial_core.h
-+++ b/include/uapi/linux/serial_core.h
-@@ -226,4 +226,7 @@
- /* Rocketport EXPRESS/INFINITY */
- #define PORT_RP2	102
- 
-+/* SH-SCI */
-+#define PORT_HSCIF	103
-+
- #endif /* _UAPILINUX_SERIAL_CORE_H */
diff --git a/patches.renesas/0002-emev2-GPIOLIB-Enable-support-for-OF.patch b/patches.renesas/0002-emev2-GPIOLIB-Enable-support-for-OF.patch
deleted file mode 100644
index d02d26ba62aca..0000000000000
--- a/patches.renesas/0002-emev2-GPIOLIB-Enable-support-for-OF.patch
+++ /dev/null
@@ -1,47 +0,0 @@
-From 8fd78e2aaaff6f497d7ff028d334b021a9f97cab Mon Sep 17 00:00:00 2001
-From: Ian Molton <ian.molton@codethink.co.uk>
-Date: Mon, 2 Sep 2013 16:44:55 +0100
-Subject: emev2: GPIOLIB: Enable support for OF
-
-EMEV2 is now a DT platform, however the GPIO driver cannot be used
-from a DT file since it does not fill out the of_node field in its
-gpio_chip structure.
-
-Signed-off-by: Ian Molton <ian.molton@codethink.co.uk>
-Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-(cherry picked from commit b59278548e2383976f7db5fd3389f9116a6f240d)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpio/Kconfig   | 2 +-
- drivers/gpio/gpio-em.c | 1 +
- 2 files changed, 2 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
-index 573c449c49b9..cf35d107fb37 100644
---- a/drivers/gpio/Kconfig
-+++ b/drivers/gpio/Kconfig
-@@ -126,7 +126,7 @@ config GPIO_IT8761E
- 
- config GPIO_EM
- 	tristate "Emma Mobile GPIO"
--	depends on ARM
-+	depends on ARM && OF_GPIO
- 	help
- 	  Say yes here to support GPIO on Renesas Emma Mobile SoCs.
- 
-diff --git a/drivers/gpio/gpio-em.c b/drivers/gpio/gpio-em.c
-index c6e1f086efe8..160d759170a5 100644
---- a/drivers/gpio/gpio-em.c
-+++ b/drivers/gpio/gpio-em.c
-@@ -319,6 +319,7 @@ static int em_gio_probe(struct platform_device *pdev)
- 	}
- 
- 	gpio_chip = &p->gpio_chip;
-+	gpio_chip->of_node = pdev->dev.of_node;
- 	gpio_chip->direction_input = em_gio_direction_input;
- 	gpio_chip->get = em_gio_get;
- 	gpio_chip->direction_output = em_gio_direction_output;
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0002-serial-sh-sci-Initialise-variables-before-access-in-.patch b/patches.renesas/0002-serial-sh-sci-Initialise-variables-before-access-in-.patch
deleted file mode 100644
index 60a0ecf3fd219..0000000000000
--- a/patches.renesas/0002-serial-sh-sci-Initialise-variables-before-access-in-.patch
+++ /dev/null
@@ -1,46 +0,0 @@
-From 6fa4b6ed6e225d83465924edf96967a3be13a056 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Thu, 20 Jun 2013 21:09:45 +0900
-Subject: serial: sh-sci: Initialise variables before access in
- sci_set_termios()
-
-This change addresses two warnings that are flagged by gcc relating to
-potential access to the ssr and cks variables while they are uninitialised.
-
-I have addressed this by initialising the values to
-the defaults present in sci_baud_calc_hscif().
-
-It is my analysis that cks is always initialised if used
-but that without this change ssr may be accessed while uninitialised.
-
-The code altered by this patch was introduced by commit
-f303b364b41d3fc5bf879799128958400b7859aa ("serial: sh-sci: HSCIF support").
-
-Reported-by: Arnd Bergmann <arnd@arndb.de>
-Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit d4759ded3bdf3eb004d583011707fdc21aeda94e)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/tty/serial/sh-sci.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
-index 931d6c3a..7477e0ea 100644
---- a/drivers/tty/serial/sh-sci.c
-+++ b/drivers/tty/serial/sh-sci.c
-@@ -1887,9 +1887,9 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
- {
- 	struct sci_port *s = to_sci_port(port);
- 	struct plat_sci_reg *reg;
--	unsigned int baud, smr_val, max_baud, cks;
-+	unsigned int baud, smr_val, max_baud, cks = 0;
- 	int t = -1;
--	unsigned int srr;
-+	unsigned int srr = 15;
- 
- 	/*
- 	 * earlyprintk comes here early on with port->uartclk set to zero.
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0003-gpio-em-drop-references-to-virtual-IRQ.patch b/patches.renesas/0003-gpio-em-drop-references-to-virtual-IRQ.patch
deleted file mode 100644
index df6b03bec66fb..0000000000000
--- a/patches.renesas/0003-gpio-em-drop-references-to-virtual-IRQ.patch
+++ /dev/null
@@ -1,48 +0,0 @@
-From 50ae1fecdce5adf1642af1400daeb6ae22c91174 Mon Sep 17 00:00:00 2001
-From: Linus Walleij <linus.walleij@linaro.org>
-Date: Fri, 11 Oct 2013 19:21:34 +0200
-Subject: gpio: em: drop references to "virtual" IRQ
-
-Rename the argument "virq" to just "irq", this IRQ isn't any
-more "virtual" than any other Linux IRQ number, we use "hwirq"
-for the actual hw-numbers, "virq" is just bogus.
-
-Cc: Magnus Damm <damm@opensource.se>
-Reviewed-by: Ian Molton <ian.molton@codethink.co.uk>
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-(cherry picked from commit 2d61e3e90798fdedb0a33714a30b241a5d5f2744)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpio/gpio-em.c | 12 ++++++------
- 1 file changed, 6 insertions(+), 6 deletions(-)
-
-diff --git a/drivers/gpio/gpio-em.c b/drivers/gpio/gpio-em.c
-index 160d759170a5..ec190361bf2e 100644
---- a/drivers/gpio/gpio-em.c
-+++ b/drivers/gpio/gpio-em.c
-@@ -232,16 +232,16 @@ static void em_gio_free(struct gpio_chip *chip, unsigned offset)
- 	em_gio_direction_input(chip, offset);
- }
- 
--static int em_gio_irq_domain_map(struct irq_domain *h, unsigned int virq,
--				 irq_hw_number_t hw)
-+static int em_gio_irq_domain_map(struct irq_domain *h, unsigned int irq,
-+				 irq_hw_number_t hwirq)
- {
- 	struct em_gio_priv *p = h->host_data;
- 
--	pr_debug("gio: map hw irq = %d, virq = %d\n", (int)hw, virq);
-+	pr_debug("gio: map hw irq = %d, irq = %d\n", (int)hwirq, irq);
- 
--	irq_set_chip_data(virq, h->host_data);
--	irq_set_chip_and_handler(virq, &p->irq_chip, handle_level_irq);
--	set_irq_flags(virq, IRQF_VALID); /* kill me now */
-+	irq_set_chip_data(irq, h->host_data);
-+	irq_set_chip_and_handler(irq, &p->irq_chip, handle_level_irq);
-+	set_irq_flags(irq, IRQF_VALID); /* kill me now */
- 	return 0;
- }
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0003-gpio-use-dev_get_platdata.patch b/patches.renesas/0003-gpio-use-dev_get_platdata.patch
deleted file mode 100644
index 531c2389ccd5e..0000000000000
--- a/patches.renesas/0003-gpio-use-dev_get_platdata.patch
+++ /dev/null
@@ -1,64 +0,0 @@
-From 2f6ea1b82053fabf20b89d9b44288ad3bf84b35e Mon Sep 17 00:00:00 2001
-From: Jingoo Han <jg1.han@samsung.com>
-Date: Tue, 30 Jul 2013 17:08:05 +0900
-Subject: gpio: use dev_get_platdata()
-
-Use the wrapper function for retrieving the platform data instead of
-accessing dev->platform_data directly.
-
-Signed-off-by: Jingoo Han <jg1.han@samsung.com>
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-(cherry picked from commit e56aee1897fd27631c1cb28e12b0fb8f8f9736f7)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-	drivers/gpio/gpio-74x164.c
-	drivers/gpio/gpio-adp5520.c
-	drivers/gpio/gpio-adp5588.c
-	drivers/gpio/gpio-arizona.c
-	drivers/gpio/gpio-da9052.c
-	drivers/gpio/gpio-da9055.c
-	drivers/gpio/gpio-ich.c
-	drivers/gpio/gpio-janz-ttl.c
-	drivers/gpio/gpio-kempld.c
-	drivers/gpio/gpio-max730x.c
-	drivers/gpio/gpio-max732x.c
-	drivers/gpio/gpio-mc33880.c
-	drivers/gpio/gpio-mcp23s08.c
-	drivers/gpio/gpio-msic.c
-	drivers/gpio/gpio-omap.c
-	drivers/gpio/gpio-pca953x.c
-	drivers/gpio/gpio-pcf857x.c
-	drivers/gpio/gpio-pl061.c
-	drivers/gpio/gpio-rcar.c
-	drivers/gpio/gpio-rdc321x.c
-	drivers/gpio/gpio-sta2x11.c
-	drivers/gpio/gpio-sx150x.c
-	drivers/gpio/gpio-timberdale.c
-	drivers/gpio/gpio-tps65912.c
-	drivers/gpio/gpio-ts5500.c
-	drivers/gpio/gpio-twl4030.c
-	drivers/gpio/gpio-ucb1400.c
-	drivers/gpio/gpio-wm831x.c
-	drivers/gpio/gpio-wm8350.c
-	drivers/gpio/gpio-wm8994.c
----
- drivers/gpio/gpio-em.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/gpio/gpio-em.c b/drivers/gpio/gpio-em.c
-index 5cba855638bf..847987c4f04a 100644
---- a/drivers/gpio/gpio-em.c
-+++ b/drivers/gpio/gpio-em.c
-@@ -237,7 +237,7 @@ static struct irq_domain_ops em_gio_irq_domain_ops = {
- static int em_gio_probe(struct platform_device *pdev)
- {
- 	struct gpio_em_config pdata_dt;
--	struct gpio_em_config *pdata = pdev->dev.platform_data;
-+	struct gpio_em_config *pdata = dev_get_platdata(&pdev->dev);
- 	struct em_gio_priv *p;
- 	struct resource *io[2], *irq[2];
- 	struct gpio_chip *gpio_chip;
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0003-serial-sh-sci-use-dev_get_platdata.patch b/patches.renesas/0003-serial-sh-sci-use-dev_get_platdata.patch
deleted file mode 100644
index 88d6f7a5811ee..0000000000000
--- a/patches.renesas/0003-serial-sh-sci-use-dev_get_platdata.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From e4dc1384aea42fba61c6417f302a9d48dba956dd Mon Sep 17 00:00:00 2001
-From: Jingoo Han <jg1.han@samsung.com>
-Date: Thu, 1 Aug 2013 18:17:45 +0900
-Subject: serial: sh-sci: use dev_get_platdata()
-
-Use the wrapper function for retrieving the platform data instead of
-accessing dev->platform_data directly
-
-Signed-off-by: Jingoo Han <jg1.han@samsung.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 3ba35baa55fa4420f9ea7132d728ed68cfa37d28)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/tty/serial/sh-sci.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
-index 7477e0ea..9d776066 100644
---- a/drivers/tty/serial/sh-sci.c
-+++ b/drivers/tty/serial/sh-sci.c
-@@ -2469,7 +2469,7 @@ static int sci_probe_single(struct platform_device *dev,
- 
- static int sci_probe(struct platform_device *dev)
- {
--	struct plat_sci_port *p = dev->dev.platform_data;
-+	struct plat_sci_port *p = dev_get_platdata(&dev->dev);
- 	struct sci_port *sp = &sci_ports[dev->id];
- 	int ret;
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0004-ata-use-platform_-get-set-_drvdata.patch b/patches.renesas/0004-ata-use-platform_-get-set-_drvdata.patch
deleted file mode 100644
index c8677a7a2e68a..0000000000000
--- a/patches.renesas/0004-ata-use-platform_-get-set-_drvdata.patch
+++ /dev/null
@@ -1,220 +0,0 @@
-From c98f9448263fa3880c3fe926a2306750c407ff84 Mon Sep 17 00:00:00 2001
-From: Jingoo Han <jg1.han@samsung.com>
-Date: Thu, 23 May 2013 19:41:21 +0900
-Subject: ata: use platform_{get,set}_drvdata()
-
-Use the wrapper functions for getting and setting the driver data using
-platform_device instead of using dev_{get,set}_drvdata() with &pdev->dev,
-so we can directly pass a struct platform_device.
-
-Also, unnecessary dev_set_drvdata() is removed, because the driver core
-clears the driver data to NULL after device_release or on probe failure.
-
-Signed-off-by: Jingoo Han <jg1.han@samsung.com>
-Signed-off-by: Tejun Heo <tj@kernel.org>
-(cherry picked from commit d89995db5f238e618389604b848b431da240eb69)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/ata/pata_arasan_cf.c |  2 +-
- drivers/ata/pata_at91.c      |  2 +-
- drivers/ata/pata_bf54x.c     | 10 ++++------
- drivers/ata/pata_imx.c       |  2 +-
- drivers/ata/pata_mpc52xx.c   |  4 ++--
- drivers/ata/pata_pxa.c       |  2 +-
- drivers/ata/sata_fsl.c       | 14 +++++---------
- drivers/ata/sata_rcar.c      |  2 +-
- 8 files changed, 16 insertions(+), 22 deletions(-)
-
-diff --git a/drivers/ata/pata_arasan_cf.c b/drivers/ata/pata_arasan_cf.c
-index 7638121c..848ed325 100644
---- a/drivers/ata/pata_arasan_cf.c
-+++ b/drivers/ata/pata_arasan_cf.c
-@@ -908,7 +908,7 @@ free_clk:
- 
- static int arasan_cf_remove(struct platform_device *pdev)
- {
--	struct ata_host *host = dev_get_drvdata(&pdev->dev);
-+	struct ata_host *host = platform_get_drvdata(pdev);
- 	struct arasan_cf_dev *acdev = host->ports[0]->private_data;
- 
- 	ata_host_detach(host);
-diff --git a/drivers/ata/pata_at91.c b/drivers/ata/pata_at91.c
-index 033f3f4c..5364f97b 100644
---- a/drivers/ata/pata_at91.c
-+++ b/drivers/ata/pata_at91.c
-@@ -422,7 +422,7 @@ err_put:
- 
- static int pata_at91_remove(struct platform_device *pdev)
- {
--	struct ata_host *host = dev_get_drvdata(&pdev->dev);
-+	struct ata_host *host = platform_get_drvdata(pdev);
- 	struct at91_ide_info *info;
- 
- 	if (!host)
-diff --git a/drivers/ata/pata_bf54x.c b/drivers/ata/pata_bf54x.c
-index 8d43510c..ba0d8a29 100644
---- a/drivers/ata/pata_bf54x.c
-+++ b/drivers/ata/pata_bf54x.c
-@@ -1596,7 +1596,7 @@ static int bfin_atapi_probe(struct platform_device *pdev)
- 		return -ENODEV;
- 	}
- 
--	dev_set_drvdata(&pdev->dev, host);
-+	platform_set_drvdata(pdev, host);
- 
- 	return 0;
- }
-@@ -1610,11 +1610,9 @@ static int bfin_atapi_probe(struct platform_device *pdev)
-  */
- static int bfin_atapi_remove(struct platform_device *pdev)
- {
--	struct device *dev = &pdev->dev;
--	struct ata_host *host = dev_get_drvdata(dev);
-+	struct ata_host *host = platform_get_drvdata(pdev);
- 
- 	ata_host_detach(host);
--	dev_set_drvdata(&pdev->dev, NULL);
- 
- 	peripheral_free_list(atapi_io_port);
- 
-@@ -1624,7 +1622,7 @@ static int bfin_atapi_remove(struct platform_device *pdev)
- #ifdef CONFIG_PM
- static int bfin_atapi_suspend(struct platform_device *pdev, pm_message_t state)
- {
--	struct ata_host *host = dev_get_drvdata(&pdev->dev);
-+	struct ata_host *host = platform_get_drvdata(pdev);
- 	if (host)
- 		return ata_host_suspend(host, state);
- 	else
-@@ -1633,7 +1631,7 @@ static int bfin_atapi_suspend(struct platform_device *pdev, pm_message_t state)
- 
- static int bfin_atapi_resume(struct platform_device *pdev)
- {
--	struct ata_host *host = dev_get_drvdata(&pdev->dev);
-+	struct ata_host *host = platform_get_drvdata(pdev);
- 	int ret;
- 
- 	if (host) {
-diff --git a/drivers/ata/pata_imx.c b/drivers/ata/pata_imx.c
-index aa3d166e..4ec7c04b 100644
---- a/drivers/ata/pata_imx.c
-+++ b/drivers/ata/pata_imx.c
-@@ -177,7 +177,7 @@ err:
- 
- static int pata_imx_remove(struct platform_device *pdev)
- {
--	struct ata_host *host = dev_get_drvdata(&pdev->dev);
-+	struct ata_host *host = platform_get_drvdata(pdev);
- 	struct pata_imx_priv *priv = host->private_data;
- 
- 	ata_host_detach(host);
-diff --git a/drivers/ata/pata_mpc52xx.c b/drivers/ata/pata_mpc52xx.c
-index 3a8fb28b..0024ced3 100644
---- a/drivers/ata/pata_mpc52xx.c
-+++ b/drivers/ata/pata_mpc52xx.c
-@@ -825,7 +825,7 @@ mpc52xx_ata_remove(struct platform_device *op)
- static int
- mpc52xx_ata_suspend(struct platform_device *op, pm_message_t state)
- {
--	struct ata_host *host = dev_get_drvdata(&op->dev);
-+	struct ata_host *host = platform_get_drvdata(op);
- 
- 	return ata_host_suspend(host, state);
- }
-@@ -833,7 +833,7 @@ mpc52xx_ata_suspend(struct platform_device *op, pm_message_t state)
- static int
- mpc52xx_ata_resume(struct platform_device *op)
- {
--	struct ata_host *host = dev_get_drvdata(&op->dev);
-+	struct ata_host *host = platform_get_drvdata(op);
- 	struct mpc52xx_ata_priv *priv = host->private_data;
- 	int rv;
- 
-diff --git a/drivers/ata/pata_pxa.c b/drivers/ata/pata_pxa.c
-index b0ac9e0c..942ef94b 100644
---- a/drivers/ata/pata_pxa.c
-+++ b/drivers/ata/pata_pxa.c
-@@ -371,7 +371,7 @@ static int pxa_ata_probe(struct platform_device *pdev)
- 
- static int pxa_ata_remove(struct platform_device *pdev)
- {
--	struct ata_host *host = dev_get_drvdata(&pdev->dev);
-+	struct ata_host *host = platform_get_drvdata(pdev);
- 	struct pata_pxa_data *data = host->ports[0]->private_data;
- 
- 	pxa_free_dma(data->dma_channel);
-diff --git a/drivers/ata/sata_fsl.c b/drivers/ata/sata_fsl.c
-index 8401061b..851bd3f4 100644
---- a/drivers/ata/sata_fsl.c
-+++ b/drivers/ata/sata_fsl.c
-@@ -1533,7 +1533,7 @@ static int sata_fsl_probe(struct platform_device *ofdev)
- 	ata_host_activate(host, irq, sata_fsl_interrupt, SATA_FSL_IRQ_FLAG,
- 			  &sata_fsl_sht);
- 
--	dev_set_drvdata(&ofdev->dev, host);
-+	platform_set_drvdata(ofdev, host);
- 
- 	host_priv->intr_coalescing.show = fsl_sata_intr_coalescing_show;
- 	host_priv->intr_coalescing.store = fsl_sata_intr_coalescing_store;
-@@ -1559,10 +1559,8 @@ static int sata_fsl_probe(struct platform_device *ofdev)
- 
- error_exit_with_cleanup:
- 
--	if (host) {
--		dev_set_drvdata(&ofdev->dev, NULL);
-+	if (host)
- 		ata_host_detach(host);
--	}
- 
- 	if (hcr_base)
- 		iounmap(hcr_base);
-@@ -1573,7 +1571,7 @@ error_exit_with_cleanup:
- 
- static int sata_fsl_remove(struct platform_device *ofdev)
- {
--	struct ata_host *host = dev_get_drvdata(&ofdev->dev);
-+	struct ata_host *host = platform_get_drvdata(ofdev);
- 	struct sata_fsl_host_priv *host_priv = host->private_data;
- 
- 	device_remove_file(&ofdev->dev, &host_priv->intr_coalescing);
-@@ -1581,8 +1579,6 @@ static int sata_fsl_remove(struct platform_device *ofdev)
- 
- 	ata_host_detach(host);
- 
--	dev_set_drvdata(&ofdev->dev, NULL);
--
- 	irq_dispose_mapping(host_priv->irq);
- 	iounmap(host_priv->hcr_base);
- 	kfree(host_priv);
-@@ -1593,13 +1589,13 @@ static int sata_fsl_remove(struct platform_device *ofdev)
- #ifdef CONFIG_PM
- static int sata_fsl_suspend(struct platform_device *op, pm_message_t state)
- {
--	struct ata_host *host = dev_get_drvdata(&op->dev);
-+	struct ata_host *host = platform_get_drvdata(op);
- 	return ata_host_suspend(host, state);
- }
- 
- static int sata_fsl_resume(struct platform_device *op)
- {
--	struct ata_host *host = dev_get_drvdata(&op->dev);
-+	struct ata_host *host = platform_get_drvdata(op);
- 	struct sata_fsl_host_priv *host_priv = host->private_data;
- 	int ret;
- 	void __iomem *hcr_base = host_priv->hcr_base;
-diff --git a/drivers/ata/sata_rcar.c b/drivers/ata/sata_rcar.c
-index 249c8a28..829446af 100644
---- a/drivers/ata/sata_rcar.c
-+++ b/drivers/ata/sata_rcar.c
-@@ -825,7 +825,7 @@ cleanup:
- 
- static int sata_rcar_remove(struct platform_device *pdev)
- {
--	struct ata_host *host = dev_get_drvdata(&pdev->dev);
-+	struct ata_host *host = platform_get_drvdata(pdev);
- 	struct sata_rcar_priv *priv = host->private_data;
- 
- 	ata_host_detach(host);
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0004-gpio-em-Add-pinctrl-support.patch b/patches.renesas/0004-gpio-em-Add-pinctrl-support.patch
deleted file mode 100644
index 7c15d2680fde3..0000000000000
--- a/patches.renesas/0004-gpio-em-Add-pinctrl-support.patch
+++ /dev/null
@@ -1,93 +0,0 @@
-From ccbea9b7d8121cdefb2d5458a67fac8282dd2b95 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Wed, 3 Jul 2013 13:14:32 +0900
-Subject: gpio: em: Add pinctrl support
-
-Register the GPIO pin range, and request and free GPIO pins using the
-pinctrl API. The pctl_name platform data member should be used by
-platform devices to point out which pinctrl device to use.
-
-Follows same style as "dc3465a gpio-rcar: Add pinctrl support",
-by Laurent Pinchart, thanks to him.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-(cherry picked from commit 640efa08cb635ae43d5ceae302b20c2c3f2035e5)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpio/gpio-em.c                | 25 +++++++++++++++++++++++++
- include/linux/platform_data/gpio-em.h |  1 +
- 2 files changed, 26 insertions(+)
-
-diff --git a/drivers/gpio/gpio-em.c b/drivers/gpio/gpio-em.c
-index 847987c4f04a..c6e1f086efe8 100644
---- a/drivers/gpio/gpio-em.c
-+++ b/drivers/gpio/gpio-em.c
-@@ -30,6 +30,7 @@
- #include <linux/gpio.h>
- #include <linux/slab.h>
- #include <linux/module.h>
-+#include <linux/pinctrl/consumer.h>
- #include <linux/platform_data/gpio-em.h>
- 
- struct em_gio_priv {
-@@ -216,6 +217,21 @@ static int em_gio_to_irq(struct gpio_chip *chip, unsigned offset)
- 	return irq_create_mapping(gpio_to_priv(chip)->irq_domain, offset);
- }
- 
-+static int em_gio_request(struct gpio_chip *chip, unsigned offset)
-+{
-+	return pinctrl_request_gpio(chip->base + offset);
-+}
-+
-+static void em_gio_free(struct gpio_chip *chip, unsigned offset)
-+{
-+	pinctrl_free_gpio(chip->base + offset);
-+
-+	/* Set the GPIO as an input to ensure that the next GPIO request won't
-+	* drive the GPIO pin as an output.
-+	*/
-+	em_gio_direction_input(chip, offset);
-+}
-+
- static int em_gio_irq_domain_map(struct irq_domain *h, unsigned int virq,
- 				 irq_hw_number_t hw)
- {
-@@ -308,6 +324,8 @@ static int em_gio_probe(struct platform_device *pdev)
- 	gpio_chip->direction_output = em_gio_direction_output;
- 	gpio_chip->set = em_gio_set;
- 	gpio_chip->to_irq = em_gio_to_irq;
-+	gpio_chip->request = em_gio_request;
-+	gpio_chip->free = em_gio_free;
- 	gpio_chip->label = name;
- 	gpio_chip->owner = THIS_MODULE;
- 	gpio_chip->base = pdata->gpio_base;
-@@ -351,6 +369,13 @@ static int em_gio_probe(struct platform_device *pdev)
- 		dev_err(&pdev->dev, "failed to add GPIO controller\n");
- 		goto err1;
- 	}
-+
-+	if (pdata->pctl_name) {
-+		ret = gpiochip_add_pin_range(gpio_chip, pdata->pctl_name, 0,
-+					     gpio_chip->base, gpio_chip->ngpio);
-+		if (ret < 0)
-+			dev_warn(&pdev->dev, "failed to add pin range\n");
-+	}
- 	return 0;
- 
- err1:
-diff --git a/include/linux/platform_data/gpio-em.h b/include/linux/platform_data/gpio-em.h
-index 573edfb046c4..7c5a519d2dcd 100644
---- a/include/linux/platform_data/gpio-em.h
-+++ b/include/linux/platform_data/gpio-em.h
-@@ -5,6 +5,7 @@ struct gpio_em_config {
- 	unsigned int gpio_base;
- 	unsigned int irq_base;
- 	unsigned int number_of_pins;
-+	const char *pctl_name;
- };
- 
- #endif /* __GPIO_EM_H__ */
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0004-micrel-add-support-for-KSZ8041RNLI.patch b/patches.renesas/0004-micrel-add-support-for-KSZ8041RNLI.patch
deleted file mode 100644
index 964a515431652..0000000000000
--- a/patches.renesas/0004-micrel-add-support-for-KSZ8041RNLI.patch
+++ /dev/null
@@ -1,63 +0,0 @@
-From dd53e322d2810baded275f961ee2ec81a6e7b780 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Tue, 10 Dec 2013 02:20:41 +0300
-Subject: micrel: add support for KSZ8041RNLI
-
-Renesas R-Car development boards use KSZ8041RNLI PHY which for some reason has
-ID of 0x00221537 that is not documented for KSZ8041-family PHYs and does not
-match the  documented ID of  0x0022151x (where 'x' is the revision).  We have
-to add the new #define PHY_ID_* and new ksphy_driver[] entry, almost the same
-as KSZ8041 one, differing only in the 'phy_id' and 'name' fields.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Tested-by: Geert Uytterhoeven <geert@linux-m68k.org>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit 4bd7b5127bd02c12c1cc837a7a0b6ce295eb2505)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/net/phy/micrel.c   | 15 +++++++++++++++
- include/linux/micrel_phy.h |  2 ++
- 2 files changed, 17 insertions(+)
-
-diff --git a/drivers/net/phy/micrel.c b/drivers/net/phy/micrel.c
-index 2510435f34ed..d8766ec4085b 100644
---- a/drivers/net/phy/micrel.c
-+++ b/drivers/net/phy/micrel.c
-@@ -227,6 +227,21 @@ static struct phy_driver ksphy_driver[] = {
- 	.config_intr	= kszphy_config_intr,
- 	.driver		= { .owner = THIS_MODULE,},
- }, {
-+	.phy_id		= PHY_ID_KSZ8041RNLI,
-+	.phy_id_mask	= 0x00fffff0,
-+	.name		= "Micrel KSZ8041RNLI",
-+	.features	= PHY_BASIC_FEATURES |
-+			  SUPPORTED_Pause | SUPPORTED_Asym_Pause,
-+	.flags		= PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
-+	.config_init	= kszphy_config_init,
-+	.config_aneg	= genphy_config_aneg,
-+	.read_status	= genphy_read_status,
-+	.ack_interrupt	= kszphy_ack_interrupt,
-+	.config_intr	= kszphy_config_intr,
-+	.suspend	= genphy_suspend,
-+	.resume		= genphy_resume,
-+	.driver		= { .owner = THIS_MODULE,},
-+}, {
- 	.phy_id		= PHY_ID_KSZ8051,
- 	.phy_id_mask	= 0x00fffff0,
- 	.name		= "Micrel KSZ8051",
-diff --git a/include/linux/micrel_phy.h b/include/linux/micrel_phy.h
-index 8752dbbc6135..6075596f0095 100644
---- a/include/linux/micrel_phy.h
-+++ b/include/linux/micrel_phy.h
-@@ -21,6 +21,8 @@
- #define PHY_ID_KSZ8021		0x00221555
- #define PHY_ID_KSZ8031		0x00221556
- #define PHY_ID_KSZ8041		0x00221510
-+/* undocumented */
-+#define PHY_ID_KSZ8041RNLI	0x00221537
- #define PHY_ID_KSZ8051		0x00221550
- /* same id: ks8001 Rev. A/B, and ks8721 Rev 3. */
- #define PHY_ID_KSZ8001		0x0022161A
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0005-clk-shmobile-Add-R-Car-Gen2-clocks-support.patch b/patches.renesas/0005-clk-shmobile-Add-R-Car-Gen2-clocks-support.patch
deleted file mode 100644
index 4080ee0c0cfe1..0000000000000
--- a/patches.renesas/0005-clk-shmobile-Add-R-Car-Gen2-clocks-support.patch
+++ /dev/null
@@ -1,430 +0,0 @@
-From 6f06d28bccd8a3f5ad2c78919a5525110e68f5a4 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 6 Nov 2013 13:14:19 +0100
-Subject: clk: shmobile: Add R-Car Gen2 clocks support
-
-The R-Car Gen2 SoCs (R8A7790 and R8A7791) have several clocks that are
-too custom to be supported in a generic driver. Those clocks can be
-divided in two categories:
-
-- Fixed rate clocks with multiplier and divisor set according to boot
-  mode configuration
-
-- Custom divider clocks with SoC-specific divider values
-
-This driver supports both.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Kumar Gala <galak@codeaurora.org>
-Signed-off-by: Mike Turquette <mturquette@linaro.org>
-(cherry picked from commit 10cdfe9f327ab8d120cf6957e58c6203e3a53847)
-(Queued by Mike Turquette for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-	drivers/clk/Makefile
----
- .../clock/renesas,rcar-gen2-cpg-clocks.txt         |  32 +++
- drivers/clk/Makefile                               |   1 +
- drivers/clk/shmobile/Makefile                      |   5 +
- drivers/clk/shmobile/clk-rcar-gen2.c               | 298 +++++++++++++++++++++
- include/linux/clk/shmobile.h                       |  19 ++
- 5 files changed, 355 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/clock/renesas,rcar-gen2-cpg-clocks.txt
- create mode 100644 drivers/clk/shmobile/Makefile
- create mode 100644 drivers/clk/shmobile/clk-rcar-gen2.c
- create mode 100644 include/linux/clk/shmobile.h
-
-diff --git a/Documentation/devicetree/bindings/clock/renesas,rcar-gen2-cpg-clocks.txt b/Documentation/devicetree/bindings/clock/renesas,rcar-gen2-cpg-clocks.txt
-new file mode 100644
-index 000000000000..7b41c2fe54db
---- /dev/null
-+++ b/Documentation/devicetree/bindings/clock/renesas,rcar-gen2-cpg-clocks.txt
-@@ -0,0 +1,32 @@
-+* Renesas R-Car Gen2 Clock Pulse Generator (CPG)
-+
-+The CPG generates core clocks for the R-Car Gen2 SoCs. It includes three PLLs
-+and several fixed ratio dividers.
-+
-+Required Properties:
-+
-+  - compatible: Must be one of
-+    - "renesas,r8a7790-cpg-clocks" for the r8a7790 CPG
-+    - "renesas,r8a7791-cpg-clocks" for the r8a7791 CPG
-+    - "renesas,rcar-gen2-cpg-clocks" for the generic R-Car Gen2 CPG
-+
-+  - reg: Base address and length of the memory resource used by the CPG
-+
-+  - clocks: Reference to the parent clock
-+  - #clock-cells: Must be 1
-+  - clock-output-names: The names of the clocks. Supported clocks are "main",
-+    "pll0", "pll1", "pll3", "lb", "qspi", "sdh", "sd0", "sd1" and "z"
-+
-+
-+Example
-+-------
-+
-+	cpg_clocks: cpg_clocks@e6150000 {
-+		compatible = "renesas,r8a7790-cpg-clocks",
-+			     "renesas,rcar-gen2-cpg-clocks";
-+		reg = <0 0xe6150000 0 0x1000>;
-+		clocks = <&extal_clk>;
-+		#clock-cells = <1>;
-+		clock-output-names = "main", "pll0, "pll1", "pll3",
-+				     "lb", "qspi", "sdh", "sd0", "sd1", "z";
-+	};
-diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
-index 137d3e730f86..16a080a3b154 100644
---- a/drivers/clk/Makefile
-+++ b/drivers/clk/Makefile
-@@ -30,6 +30,7 @@ obj-$(CONFIG_ARCH_VT8500)	+= clk-vt8500.o
- obj-$(CONFIG_ARCH_ZYNQ)		+= clk-zynq.o
- obj-$(CONFIG_ARCH_TEGRA)	+= tegra/
- obj-$(CONFIG_PLAT_SAMSUNG)	+= samsung/
-+obj-$(CONFIG_ARCH_SHMOBILE_MULTI)	+= shmobile/
- 
- obj-$(CONFIG_X86)		+= x86/
- 
-diff --git a/drivers/clk/shmobile/Makefile b/drivers/clk/shmobile/Makefile
-new file mode 100644
-index 000000000000..d0a9034a7946
---- /dev/null
-+++ b/drivers/clk/shmobile/Makefile
-@@ -0,0 +1,5 @@
-+obj-$(CONFIG_ARCH_R8A7790)		+= clk-rcar-gen2.o
-+obj-$(CONFIG_ARCH_R8A7791)		+= clk-rcar-gen2.o
-+
-+# for emply built-in.o
-+obj-n	:= dummy
-diff --git a/drivers/clk/shmobile/clk-rcar-gen2.c b/drivers/clk/shmobile/clk-rcar-gen2.c
-new file mode 100644
-index 000000000000..a59ec217a124
---- /dev/null
-+++ b/drivers/clk/shmobile/clk-rcar-gen2.c
-@@ -0,0 +1,298 @@
-+/*
-+ * rcar_gen2 Core CPG Clocks
-+ *
-+ * Copyright (C) 2013  Ideas On Board SPRL
-+ *
-+ * Contact: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; version 2 of the License.
-+ */
-+
-+#include <linux/clk-provider.h>
-+#include <linux/clkdev.h>
-+#include <linux/clk/shmobile.h>
-+#include <linux/init.h>
-+#include <linux/kernel.h>
-+#include <linux/math64.h>
-+#include <linux/of.h>
-+#include <linux/of_address.h>
-+#include <linux/spinlock.h>
-+
-+struct rcar_gen2_cpg {
-+	struct clk_onecell_data data;
-+	spinlock_t lock;
-+	void __iomem *reg;
-+};
-+
-+#define CPG_SDCKCR			0x00000074
-+#define CPG_PLL0CR			0x000000d8
-+#define CPG_FRQCRC			0x000000e0
-+#define CPG_FRQCRC_ZFC_MASK		(0x1f << 8)
-+#define CPG_FRQCRC_ZFC_SHIFT		8
-+
-+/* -----------------------------------------------------------------------------
-+ * Z Clock
-+ *
-+ * Traits of this clock:
-+ * prepare - clk_prepare only ensures that parents are prepared
-+ * enable - clk_enable only ensures that parents are enabled
-+ * rate - rate is adjustable.  clk->rate = parent->rate * mult / 32
-+ * parent - fixed parent.  No clk_set_parent support
-+ */
-+
-+struct cpg_z_clk {
-+	struct clk_hw hw;
-+	void __iomem *reg;
-+};
-+
-+#define to_z_clk(_hw)	container_of(_hw, struct cpg_z_clk, hw)
-+
-+static unsigned long cpg_z_clk_recalc_rate(struct clk_hw *hw,
-+					   unsigned long parent_rate)
-+{
-+	struct cpg_z_clk *zclk = to_z_clk(hw);
-+	unsigned int mult;
-+	unsigned int val;
-+
-+	val = (clk_readl(zclk->reg) & CPG_FRQCRC_ZFC_MASK)
-+	    >> CPG_FRQCRC_ZFC_SHIFT;
-+	mult = 32 - val;
-+
-+	return div_u64((u64)parent_rate * mult, 32);
-+}
-+
-+static long cpg_z_clk_round_rate(struct clk_hw *hw, unsigned long rate,
-+				 unsigned long *parent_rate)
-+{
-+	unsigned long prate  = *parent_rate;
-+	unsigned int mult;
-+
-+	if (!prate)
-+		prate = 1;
-+
-+	mult = div_u64((u64)rate * 32, prate);
-+	mult = clamp(mult, 1U, 32U);
-+
-+	return *parent_rate / 32 * mult;
-+}
-+
-+static int cpg_z_clk_set_rate(struct clk_hw *hw, unsigned long rate,
-+			      unsigned long parent_rate)
-+{
-+	struct cpg_z_clk *zclk = to_z_clk(hw);
-+	unsigned int mult;
-+	u32 val;
-+
-+	mult = div_u64((u64)rate * 32, parent_rate);
-+	mult = clamp(mult, 1U, 32U);
-+
-+	val = clk_readl(zclk->reg);
-+	val &= ~CPG_FRQCRC_ZFC_MASK;
-+	val |= (32 - mult) << CPG_FRQCRC_ZFC_SHIFT;
-+	clk_writel(val, zclk->reg);
-+
-+	return 0;
-+}
-+
-+static const struct clk_ops cpg_z_clk_ops = {
-+	.recalc_rate = cpg_z_clk_recalc_rate,
-+	.round_rate = cpg_z_clk_round_rate,
-+	.set_rate = cpg_z_clk_set_rate,
-+};
-+
-+static struct clk * __init cpg_z_clk_register(struct rcar_gen2_cpg *cpg)
-+{
-+	static const char *parent_name = "pll0";
-+	struct clk_init_data init;
-+	struct cpg_z_clk *zclk;
-+	struct clk *clk;
-+
-+	zclk = kzalloc(sizeof(*zclk), GFP_KERNEL);
-+	if (!zclk)
-+		return ERR_PTR(-ENOMEM);
-+
-+	init.name = "z";
-+	init.ops = &cpg_z_clk_ops;
-+	init.flags = 0;
-+	init.parent_names = &parent_name;
-+	init.num_parents = 1;
-+
-+	zclk->reg = cpg->reg + CPG_FRQCRC;
-+	zclk->hw.init = &init;
-+
-+	clk = clk_register(NULL, &zclk->hw);
-+	if (IS_ERR(clk))
-+		kfree(zclk);
-+
-+	return clk;
-+}
-+
-+/* -----------------------------------------------------------------------------
-+ * CPG Clock Data
-+ */
-+
-+/*
-+ *   MD		EXTAL		PLL0	PLL1	PLL3
-+ * 14 13 19	(MHz)		*1	*1
-+ *---------------------------------------------------
-+ * 0  0  0	15 x 1		x172/2	x208/2	x106
-+ * 0  0  1	15 x 1		x172/2	x208/2	x88
-+ * 0  1  0	20 x 1		x130/2	x156/2	x80
-+ * 0  1  1	20 x 1		x130/2	x156/2	x66
-+ * 1  0  0	26 / 2		x200/2	x240/2	x122
-+ * 1  0  1	26 / 2		x200/2	x240/2	x102
-+ * 1  1  0	30 / 2		x172/2	x208/2	x106
-+ * 1  1  1	30 / 2		x172/2	x208/2	x88
-+ *
-+ * *1 :	Table 7.6 indicates VCO ouput (PLLx = VCO/2)
-+ */
-+#define CPG_PLL_CONFIG_INDEX(md)	((((md) & BIT(14)) >> 12) | \
-+					 (((md) & BIT(13)) >> 12) | \
-+					 (((md) & BIT(19)) >> 19))
-+struct cpg_pll_config {
-+	unsigned int extal_div;
-+	unsigned int pll1_mult;
-+	unsigned int pll3_mult;
-+};
-+
-+static const struct cpg_pll_config cpg_pll_configs[8] __initconst = {
-+	{ 1, 208, 106 }, { 1, 208,  88 }, { 1, 156,  80 }, { 1, 156,  66 },
-+	{ 2, 240, 122 }, { 2, 240, 102 }, { 2, 208, 106 }, { 2, 208,  88 },
-+};
-+
-+/* SDHI divisors */
-+static const struct clk_div_table cpg_sdh_div_table[] = {
-+	{  0,  2 }, {  1,  3 }, {  2,  4 }, {  3,  6 },
-+	{  4,  8 }, {  5, 12 }, {  6, 16 }, {  7, 18 },
-+	{  8, 24 }, { 10, 36 }, { 11, 48 }, {  0,  0 },
-+};
-+
-+static const struct clk_div_table cpg_sd01_div_table[] = {
-+	{  5, 12 }, {  6, 16 }, {  7, 18 }, {  8, 24 },
-+	{ 10, 36 }, { 11, 48 }, { 12, 10 }, {  0,  0 },
-+};
-+
-+/* -----------------------------------------------------------------------------
-+ * Initialization
-+ */
-+
-+static u32 cpg_mode __initdata;
-+
-+static struct clk * __init
-+rcar_gen2_cpg_register_clock(struct device_node *np, struct rcar_gen2_cpg *cpg,
-+			     const struct cpg_pll_config *config,
-+			     const char *name)
-+{
-+	const struct clk_div_table *table = NULL;
-+	const char *parent_name = "main";
-+	unsigned int shift;
-+	unsigned int mult = 1;
-+	unsigned int div = 1;
-+
-+	if (!strcmp(name, "main")) {
-+		parent_name = of_clk_get_parent_name(np, 0);
-+		div = config->extal_div;
-+	} else if (!strcmp(name, "pll0")) {
-+		/* PLL0 is a configurable multiplier clock. Register it as a
-+		 * fixed factor clock for now as there's no generic multiplier
-+		 * clock implementation and we currently have no need to change
-+		 * the multiplier value.
-+		 */
-+		u32 value = clk_readl(cpg->reg + CPG_PLL0CR);
-+		mult = ((value >> 24) & ((1 << 7) - 1)) + 1;
-+	} else if (!strcmp(name, "pll1")) {
-+		mult = config->pll1_mult / 2;
-+	} else if (!strcmp(name, "pll3")) {
-+		mult = config->pll3_mult;
-+	} else if (!strcmp(name, "lb")) {
-+		div = cpg_mode & BIT(18) ? 36 : 24;
-+	} else if (!strcmp(name, "qspi")) {
-+		div = (cpg_mode & (BIT(3) | BIT(2) | BIT(1))) == BIT(2)
-+		    ? 16 : 20;
-+	} else if (!strcmp(name, "sdh")) {
-+		table = cpg_sdh_div_table;
-+		shift = 8;
-+	} else if (!strcmp(name, "sd0")) {
-+		table = cpg_sd01_div_table;
-+		shift = 4;
-+	} else if (!strcmp(name, "sd1")) {
-+		table = cpg_sd01_div_table;
-+		shift = 0;
-+	} else if (!strcmp(name, "z")) {
-+		return cpg_z_clk_register(cpg);
-+	} else {
-+		return ERR_PTR(-EINVAL);
-+	}
-+
-+	if (!table)
-+		return clk_register_fixed_factor(NULL, name, parent_name, 0,
-+						 mult, div);
-+	else
-+		return clk_register_divider_table(NULL, name, parent_name, 0,
-+						 cpg->reg + CPG_SDCKCR, shift,
-+						 4, 0, table, &cpg->lock);
-+}
-+
-+static void __init rcar_gen2_cpg_clocks_init(struct device_node *np)
-+{
-+	const struct cpg_pll_config *config;
-+	struct rcar_gen2_cpg *cpg;
-+	struct clk **clks;
-+	unsigned int i;
-+	int num_clks;
-+
-+	num_clks = of_property_count_strings(np, "clock-output-names");
-+	if (num_clks < 0) {
-+		pr_err("%s: failed to count clocks\n", __func__);
-+		return;
-+	}
-+
-+	cpg = kzalloc(sizeof(*cpg), GFP_KERNEL);
-+	clks = kzalloc(num_clks * sizeof(*clks), GFP_KERNEL);
-+	if (cpg == NULL || clks == NULL) {
-+		/* We're leaking memory on purpose, there's no point in cleaning
-+		 * up as the system won't boot anyway.
-+		 */
-+		pr_err("%s: failed to allocate cpg\n", __func__);
-+		return;
-+	}
-+
-+	spin_lock_init(&cpg->lock);
-+
-+	cpg->data.clks = clks;
-+	cpg->data.clk_num = num_clks;
-+
-+	cpg->reg = of_iomap(np, 0);
-+	if (WARN_ON(cpg->reg == NULL))
-+		return;
-+
-+	config = &cpg_pll_configs[CPG_PLL_CONFIG_INDEX(cpg_mode)];
-+
-+	for (i = 0; i < num_clks; ++i) {
-+		const char *name;
-+		struct clk *clk;
-+
-+		of_property_read_string_index(np, "clock-output-names", i,
-+					      &name);
-+
-+		clk = rcar_gen2_cpg_register_clock(np, cpg, config, name);
-+		if (IS_ERR(clk))
-+			pr_err("%s: failed to register %s %s clock (%ld)\n",
-+			       __func__, np->name, name, PTR_ERR(clk));
-+		else
-+			cpg->data.clks[i] = clk;
-+	}
-+
-+	of_clk_add_provider(np, of_clk_src_onecell_get, &cpg->data);
-+}
-+CLK_OF_DECLARE(rcar_gen2_cpg_clks, "renesas,rcar-gen2-cpg-clocks",
-+	       rcar_gen2_cpg_clocks_init);
-+
-+void __init rcar_gen2_clocks_init(u32 mode)
-+{
-+	cpg_mode = mode;
-+
-+	of_clk_init(NULL);
-+}
-diff --git a/include/linux/clk/shmobile.h b/include/linux/clk/shmobile.h
-new file mode 100644
-index 000000000000..f9bf080a1123
---- /dev/null
-+++ b/include/linux/clk/shmobile.h
-@@ -0,0 +1,19 @@
-+/*
-+ * Copyright 2013 Ideas On Board SPRL
-+ *
-+ * Contact: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ */
-+
-+#ifndef __LINUX_CLK_SHMOBILE_H_
-+#define __LINUX_CLK_SHMOBILE_H_
-+
-+#include <linux/types.h>
-+
-+void rcar_gen2_clocks_init(u32 mode);
-+
-+#endif
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0005-drm-gem-Split-drm_gem_mmap-into-object-search-and-ob.patch b/patches.renesas/0005-drm-gem-Split-drm_gem_mmap-into-object-search-and-ob.patch
deleted file mode 100644
index 54d5bcc112ac3..0000000000000
--- a/patches.renesas/0005-drm-gem-Split-drm_gem_mmap-into-object-search-and-ob.patch
+++ /dev/null
@@ -1,151 +0,0 @@
-From 3b9b9b1ff0826721d264a483f14a618f54b97911 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 16 Apr 2013 14:14:52 +0200
-Subject: drm/gem: Split drm_gem_mmap() into object search and object mapping
-
-The drm_gem_mmap() function first finds the GEM object to be mapped
-based on the fake mmap offset and then maps the object. Split the object
-mapping code into a standalone drm_gem_mmap_obj() function that can be
-used to implement dma-buf mmap() operations.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Reviewed-by: Rob Clark <robdclark@gmail.com>
-(cherry picked from commit 1c5aafa6eee2d5712f774676d407e5ab6dae9a1b)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/drm_gem.c | 83 +++++++++++++++++++++++++++++------------------
- include/drm/drmP.h        |  2 ++
- 2 files changed, 54 insertions(+), 31 deletions(-)
-
-diff --git a/drivers/gpu/drm/drm_gem.c b/drivers/gpu/drm/drm_gem.c
-index 239ef30f4a62..c9d7081acf59 100644
---- a/drivers/gpu/drm/drm_gem.c
-+++ b/drivers/gpu/drm/drm_gem.c
-@@ -640,6 +640,55 @@ void drm_gem_vm_close(struct vm_area_struct *vma)
- }
- EXPORT_SYMBOL(drm_gem_vm_close);
- 
-+/**
-+ * drm_gem_mmap_obj - memory map a GEM object
-+ * @obj: the GEM object to map
-+ * @obj_size: the object size to be mapped, in bytes
-+ * @vma: VMA for the area to be mapped
-+ *
-+ * Set up the VMA to prepare mapping of the GEM object using the gem_vm_ops
-+ * provided by the driver. Depending on their requirements, drivers can either
-+ * provide a fault handler in their gem_vm_ops (in which case any accesses to
-+ * the object will be trapped, to perform migration, GTT binding, surface
-+ * register allocation, or performance monitoring), or mmap the buffer memory
-+ * synchronously after calling drm_gem_mmap_obj.
-+ *
-+ * This function is mainly intended to implement the DMABUF mmap operation, when
-+ * the GEM object is not looked up based on its fake offset. To implement the
-+ * DRM mmap operation, drivers should use the drm_gem_mmap() function.
-+ *
-+ * Return 0 or success or -EINVAL if the object size is smaller than the VMA
-+ * size, or if no gem_vm_ops are provided.
-+ */
-+int drm_gem_mmap_obj(struct drm_gem_object *obj, unsigned long obj_size,
-+		     struct vm_area_struct *vma)
-+{
-+	struct drm_device *dev = obj->dev;
-+
-+	/* Check for valid size. */
-+	if (obj_size < vma->vm_end - vma->vm_start)
-+		return -EINVAL;
-+
-+	if (!dev->driver->gem_vm_ops)
-+		return -EINVAL;
-+
-+	vma->vm_flags |= VM_IO | VM_PFNMAP | VM_DONTEXPAND | VM_DONTDUMP;
-+	vma->vm_ops = dev->driver->gem_vm_ops;
-+	vma->vm_private_data = obj;
-+	vma->vm_page_prot =  pgprot_writecombine(vm_get_page_prot(vma->vm_flags));
-+
-+	/* Take a ref for this mapping of the object, so that the fault
-+	 * handler can dereference the mmap offset's pointer to the object.
-+	 * This reference is cleaned up by the corresponding vm_close
-+	 * (which should happen whether the vma was created by this call, or
-+	 * by a vm_open due to mremap or partial unmap or whatever).
-+	 */
-+	drm_gem_object_reference(obj);
-+
-+	drm_vm_open_locked(dev, vma);
-+	return 0;
-+}
-+EXPORT_SYMBOL(drm_gem_mmap_obj);
- 
- /**
-  * drm_gem_mmap - memory map routine for GEM objects
-@@ -649,11 +698,9 @@ EXPORT_SYMBOL(drm_gem_vm_close);
-  * If a driver supports GEM object mapping, mmap calls on the DRM file
-  * descriptor will end up here.
-  *
-- * If we find the object based on the offset passed in (vma->vm_pgoff will
-+ * Look up the GEM object based on the offset passed in (vma->vm_pgoff will
-  * contain the fake offset we created when the GTT map ioctl was called on
-- * the object), we set up the driver fault handler so that any accesses
-- * to the object can be trapped, to perform migration, GTT binding, surface
-- * register allocation, or performance monitoring.
-+ * the object) and map it with a call to drm_gem_mmap_obj().
-  */
- int drm_gem_mmap(struct file *filp, struct vm_area_struct *vma)
- {
-@@ -661,7 +708,6 @@ int drm_gem_mmap(struct file *filp, struct vm_area_struct *vma)
- 	struct drm_device *dev = priv->minor->dev;
- 	struct drm_gem_mm *mm = dev->mm_private;
- 	struct drm_local_map *map = NULL;
--	struct drm_gem_object *obj;
- 	struct drm_hash_item *hash;
- 	int ret = 0;
- 
-@@ -682,32 +728,7 @@ int drm_gem_mmap(struct file *filp, struct vm_area_struct *vma)
- 		goto out_unlock;
- 	}
- 
--	/* Check for valid size. */
--	if (map->size < vma->vm_end - vma->vm_start) {
--		ret = -EINVAL;
--		goto out_unlock;
--	}
--
--	obj = map->handle;
--	if (!obj->dev->driver->gem_vm_ops) {
--		ret = -EINVAL;
--		goto out_unlock;
--	}
--
--	vma->vm_flags |= VM_IO | VM_PFNMAP | VM_DONTEXPAND | VM_DONTDUMP;
--	vma->vm_ops = obj->dev->driver->gem_vm_ops;
--	vma->vm_private_data = map->handle;
--	vma->vm_page_prot =  pgprot_writecombine(vm_get_page_prot(vma->vm_flags));
--
--	/* Take a ref for this mapping of the object, so that the fault
--	 * handler can dereference the mmap offset's pointer to the object.
--	 * This reference is cleaned up by the corresponding vm_close
--	 * (which should happen whether the vma was created by this call, or
--	 * by a vm_open due to mremap or partial unmap or whatever).
--	 */
--	drm_gem_object_reference(obj);
--
--	drm_vm_open_locked(dev, vma);
-+	ret = drm_gem_mmap_obj(map->handle, map->size, vma);
- 
- out_unlock:
- 	mutex_unlock(&dev->struct_mutex);
-diff --git a/include/drm/drmP.h b/include/drm/drmP.h
-index 63d17ee9eb48..b836d131bb07 100644
---- a/include/drm/drmP.h
-+++ b/include/drm/drmP.h
-@@ -1648,6 +1648,8 @@ int drm_gem_private_object_init(struct drm_device *dev,
- void drm_gem_object_handle_free(struct drm_gem_object *obj);
- void drm_gem_vm_open(struct vm_area_struct *vma);
- void drm_gem_vm_close(struct vm_area_struct *vma);
-+int drm_gem_mmap_obj(struct drm_gem_object *obj, unsigned long obj_size,
-+		     struct vm_area_struct *vma);
- int drm_gem_mmap(struct file *filp, struct vm_area_struct *vma);
- 
- #include <drm/drm_global.h>
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0005-sata_rcar-kill-superfluous-code-in-sata_rcar_bmdma_f.patch b/patches.renesas/0005-sata_rcar-kill-superfluous-code-in-sata_rcar_bmdma_f.patch
deleted file mode 100644
index 97f5616debb26..0000000000000
--- a/patches.renesas/0005-sata_rcar-kill-superfluous-code-in-sata_rcar_bmdma_f.patch
+++ /dev/null
@@ -1,73 +0,0 @@
-From 931a00339a6f0b0cdf5c539d5906b7e0064d7240 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Tue, 28 May 2013 02:43:23 +0400
-Subject: sata_rcar: kill superfluous code in sata_rcar_bmdma_fill_sg()
-
-I've modified sata_rcar_bmdma_fill_sg() to take care of splitting long
-scatter/ gather segments due to the descriptor table transfer counter
-being only 28 bits wide (bit 1 to bit 28) but that was in vain as even
-if 'sata_rcar_sht' specified a correct 'dma_boundary' field, the DMA
-and block layers would have split the S/G segments on the necassary
-boundaries. Since the driver uses ATA_BMDMA_SHT() to initilaize
-'sata_rcar_sht', the boundary is much smaller, only 0xFFFF, so the
-code I've added is even more useless, and it's better to just remove
-it.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: Tejun Heo <tj@kernel.org>
-(cherry picked from commit 333279c82b984f3eac61feff2b76a8b79e3db6c8)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/ata/sata_rcar.c | 24 ++++++------------------
- 1 file changed, 6 insertions(+), 18 deletions(-)
-
-diff --git a/drivers/ata/sata_rcar.c b/drivers/ata/sata_rcar.c
-index 829446af..d39330f6 100644
---- a/drivers/ata/sata_rcar.c
-+++ b/drivers/ata/sata_rcar.c
-@@ -474,11 +474,10 @@ static void sata_rcar_bmdma_fill_sg(struct ata_queued_cmd *qc)
- 	struct ata_port *ap = qc->ap;
- 	struct ata_bmdma_prd *prd = ap->bmdma_prd;
- 	struct scatterlist *sg;
--	unsigned int si, pi;
-+	unsigned int si;
- 
--	pi = 0;
- 	for_each_sg(qc->sg, sg, qc->n_elem, si) {
--		u32 addr, sg_len, len;
-+		u32 addr, sg_len;
- 
- 		/*
- 		 * Note: h/w doesn't support 64-bit, so we unconditionally
-@@ -487,24 +486,13 @@ static void sata_rcar_bmdma_fill_sg(struct ata_queued_cmd *qc)
- 		addr = (u32)sg_dma_address(sg);
- 		sg_len = sg_dma_len(sg);
- 
--		/* H/w transfer count is only 29 bits long, let's be careful */
--		while (sg_len) {
--			len = sg_len;
--			if (len > 0x1ffffffe)
--				len = 0x1ffffffe;
--
--			prd[pi].addr = cpu_to_le32(addr);
--			prd[pi].flags_len = cpu_to_le32(len);
--			VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", pi, addr, len);
--
--			pi++;
--			sg_len -= len;
--			addr += len;
--		}
-+		prd[si].addr = cpu_to_le32(addr);
-+		prd[si].flags_len = cpu_to_le32(sg_len);
-+		VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", si, addr, sg_len);
- 	}
- 
- 	/* end-of-table flag */
--	prd[pi - 1].addr |= cpu_to_le32(SATA_RCAR_DTEND);
-+	prd[si - 1].addr |= cpu_to_le32(SATA_RCAR_DTEND);
- }
- 
- static void sata_rcar_qc_prep(struct ata_queued_cmd *qc)
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0006-clk-shmobile-Add-DIV6-clock-support.patch b/patches.renesas/0006-clk-shmobile-Add-DIV6-clock-support.patch
deleted file mode 100644
index 4ba7bef5f2521..0000000000000
--- a/patches.renesas/0006-clk-shmobile-Add-DIV6-clock-support.patch
+++ /dev/null
@@ -1,263 +0,0 @@
-From 55e5d8655a06f63b403276f337ba3c8a2d22978a Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 17 Oct 2013 23:54:07 +0200
-Subject: clk: shmobile: Add DIV6 clock support
-
-DIV6 clocks are divider gate clocks controlled through a single
-register. The divider is expressed on 6 bits, hence the name, and can
-take values from 1/1 to 1/64.
-
-Those clocks are found on Renesas ARM SoCs.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Mike Turquette <mturquette@linaro.org>
-(cherry picked from commit abe844aa5bb50444ac3e02aed89b431823d6ad56)
-(Queued by Mike Turquette for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- .../bindings/clock/renesas,cpg-div6-clocks.txt     |  28 ++++
- drivers/clk/shmobile/Makefile                      |   1 +
- drivers/clk/shmobile/clk-div6.c                    | 185 +++++++++++++++++++++
- 3 files changed, 214 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/clock/renesas,cpg-div6-clocks.txt
- create mode 100644 drivers/clk/shmobile/clk-div6.c
-
-diff --git a/Documentation/devicetree/bindings/clock/renesas,cpg-div6-clocks.txt b/Documentation/devicetree/bindings/clock/renesas,cpg-div6-clocks.txt
-new file mode 100644
-index 000000000000..952e373178d2
---- /dev/null
-+++ b/Documentation/devicetree/bindings/clock/renesas,cpg-div6-clocks.txt
-@@ -0,0 +1,28 @@
-+* Renesas CPG DIV6 Clock
-+
-+The CPG DIV6 clocks are variable factor clocks provided by the Clock Pulse
-+Generator (CPG). They clock input is divided by a configurable factor from 1
-+to 64.
-+
-+Required Properties:
-+
-+  - compatible: Must be one of the following
-+    - "renesas,r8a7790-div6-clock" for R8A7790 (R-Car H2) DIV6 clocks
-+    - "renesas,r8a7791-div6-clock" for R8A7791 (R-Car M2) DIV6 clocks
-+    - "renesas,cpg-div6-clock" for generic DIV6 clocks
-+  - reg: Base address and length of the memory resource used by the DIV6 clock
-+  - clocks: Reference to the parent clock
-+  - #clock-cells: Must be 0
-+  - clock-output-names: The name of the clock as a free-form string
-+
-+
-+Example
-+-------
-+
-+	sd2_clk: sd2_clk@e6150078 {
-+		compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock";
-+		reg = <0 0xe6150078 0 4>;
-+		clocks = <&pll1_div2_clk>;
-+		#clock-cells = <0>;
-+		clock-output-names = "sd2";
-+	};
-diff --git a/drivers/clk/shmobile/Makefile b/drivers/clk/shmobile/Makefile
-index d0a9034a7946..2e4a1197aa0a 100644
---- a/drivers/clk/shmobile/Makefile
-+++ b/drivers/clk/shmobile/Makefile
-@@ -1,5 +1,6 @@
- obj-$(CONFIG_ARCH_R8A7790)		+= clk-rcar-gen2.o
- obj-$(CONFIG_ARCH_R8A7791)		+= clk-rcar-gen2.o
-+obj-$(CONFIG_ARCH_SHMOBILE_MULTI)	+= clk-div6.o
- 
- # for emply built-in.o
- obj-n	:= dummy
-diff --git a/drivers/clk/shmobile/clk-div6.c b/drivers/clk/shmobile/clk-div6.c
-new file mode 100644
-index 000000000000..aac4756ec52e
---- /dev/null
-+++ b/drivers/clk/shmobile/clk-div6.c
-@@ -0,0 +1,185 @@
-+/*
-+ * r8a7790 Common Clock Framework support
-+ *
-+ * Copyright (C) 2013  Renesas Solutions Corp.
-+ *
-+ * Contact: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; version 2 of the License.
-+ */
-+
-+#include <linux/clk-provider.h>
-+#include <linux/clkdev.h>
-+#include <linux/init.h>
-+#include <linux/io.h>
-+#include <linux/kernel.h>
-+#include <linux/of.h>
-+#include <linux/of_address.h>
-+
-+#define CPG_DIV6_CKSTP		BIT(8)
-+#define CPG_DIV6_DIV(d)		((d) & 0x3f)
-+#define CPG_DIV6_DIV_MASK	0x3f
-+
-+/**
-+ * struct div6_clock - MSTP gating clock
-+ * @hw: handle between common and hardware-specific interfaces
-+ * @reg: IO-remapped register
-+ * @div: divisor value (1-64)
-+ */
-+struct div6_clock {
-+	struct clk_hw hw;
-+	void __iomem *reg;
-+	unsigned int div;
-+};
-+
-+#define to_div6_clock(_hw) container_of(_hw, struct div6_clock, hw)
-+
-+static int cpg_div6_clock_enable(struct clk_hw *hw)
-+{
-+	struct div6_clock *clock = to_div6_clock(hw);
-+
-+	clk_writel(CPG_DIV6_DIV(clock->div - 1), clock->reg);
-+
-+	return 0;
-+}
-+
-+static void cpg_div6_clock_disable(struct clk_hw *hw)
-+{
-+	struct div6_clock *clock = to_div6_clock(hw);
-+
-+	/* DIV6 clocks require the divisor field to be non-zero when stopping
-+	 * the clock.
-+	 */
-+	clk_writel(CPG_DIV6_CKSTP | CPG_DIV6_DIV(CPG_DIV6_DIV_MASK),
-+		   clock->reg);
-+}
-+
-+static int cpg_div6_clock_is_enabled(struct clk_hw *hw)
-+{
-+	struct div6_clock *clock = to_div6_clock(hw);
-+
-+	return !(clk_readl(clock->reg) & CPG_DIV6_CKSTP);
-+}
-+
-+static unsigned long cpg_div6_clock_recalc_rate(struct clk_hw *hw,
-+						unsigned long parent_rate)
-+{
-+	struct div6_clock *clock = to_div6_clock(hw);
-+	unsigned int div = (clk_readl(clock->reg) & CPG_DIV6_DIV_MASK) + 1;
-+
-+	return parent_rate / div;
-+}
-+
-+static unsigned int cpg_div6_clock_calc_div(unsigned long rate,
-+					    unsigned long parent_rate)
-+{
-+	unsigned int div;
-+
-+	div = DIV_ROUND_CLOSEST(parent_rate, rate);
-+	return clamp_t(unsigned int, div, 1, 64);
-+}
-+
-+static long cpg_div6_clock_round_rate(struct clk_hw *hw, unsigned long rate,
-+				      unsigned long *parent_rate)
-+{
-+	unsigned int div = cpg_div6_clock_calc_div(rate, *parent_rate);
-+
-+	return *parent_rate / div;
-+}
-+
-+static int cpg_div6_clock_set_rate(struct clk_hw *hw, unsigned long rate,
-+				   unsigned long parent_rate)
-+{
-+	struct div6_clock *clock = to_div6_clock(hw);
-+	unsigned int div = cpg_div6_clock_calc_div(rate, parent_rate);
-+
-+	clock->div = div;
-+
-+	/* Only program the new divisor if the clock isn't stopped. */
-+	if (!(clk_readl(clock->reg) & CPG_DIV6_CKSTP))
-+		clk_writel(CPG_DIV6_DIV(clock->div - 1), clock->reg);
-+
-+	return 0;
-+}
-+
-+static const struct clk_ops cpg_div6_clock_ops = {
-+	.enable = cpg_div6_clock_enable,
-+	.disable = cpg_div6_clock_disable,
-+	.is_enabled = cpg_div6_clock_is_enabled,
-+	.recalc_rate = cpg_div6_clock_recalc_rate,
-+	.round_rate = cpg_div6_clock_round_rate,
-+	.set_rate = cpg_div6_clock_set_rate,
-+};
-+
-+static void __init cpg_div6_clock_init(struct device_node *np)
-+{
-+	struct clk_init_data init;
-+	struct div6_clock *clock;
-+	const char *parent_name;
-+	const char *name;
-+	struct clk *clk;
-+	int ret;
-+
-+	clock = kzalloc(sizeof(*clock), GFP_KERNEL);
-+	if (!clock) {
-+		pr_err("%s: failed to allocate %s DIV6 clock\n",
-+		       __func__, np->name);
-+		return;
-+	}
-+
-+	/* Remap the clock register and read the divisor. Disabling the
-+	 * clock overwrites the divisor, so we need to cache its value for the
-+	 * enable operation.
-+	 */
-+	clock->reg = of_iomap(np, 0);
-+	if (clock->reg == NULL) {
-+		pr_err("%s: failed to map %s DIV6 clock register\n",
-+		       __func__, np->name);
-+		goto error;
-+	}
-+
-+	clock->div = (clk_readl(clock->reg) & CPG_DIV6_DIV_MASK) + 1;
-+
-+	/* Parse the DT properties. */
-+	ret = of_property_read_string(np, "clock-output-names", &name);
-+	if (ret < 0) {
-+		pr_err("%s: failed to get %s DIV6 clock output name\n",
-+		       __func__, np->name);
-+		goto error;
-+	}
-+
-+	parent_name = of_clk_get_parent_name(np, 0);
-+	if (parent_name == NULL) {
-+		pr_err("%s: failed to get %s DIV6 clock parent name\n",
-+		       __func__, np->name);
-+		goto error;
-+	}
-+
-+	/* Register the clock. */
-+	init.name = name;
-+	init.ops = &cpg_div6_clock_ops;
-+	init.flags = CLK_IS_BASIC;
-+	init.parent_names = &parent_name;
-+	init.num_parents = 1;
-+
-+	clock->hw.init = &init;
-+
-+	clk = clk_register(NULL, &clock->hw);
-+	if (IS_ERR(clk)) {
-+		pr_err("%s: failed to register %s DIV6 clock (%ld)\n",
-+		       __func__, np->name, PTR_ERR(clk));
-+		goto error;
-+	}
-+
-+	of_clk_add_provider(np, of_clk_src_simple_get, clk);
-+
-+	return;
-+
-+error:
-+	if (clock->reg)
-+		iounmap(clock->reg);
-+	kfree(clock);
-+}
-+CLK_OF_DECLARE(cpg_div6_clk, "renesas,cpg-div6-clock", cpg_div6_clock_init);
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0006-drm-GEM-CMA-Split-object-creation-into-object-alloc-.patch b/patches.renesas/0006-drm-GEM-CMA-Split-object-creation-into-object-alloc-.patch
deleted file mode 100644
index d791b7dc83b44..0000000000000
--- a/patches.renesas/0006-drm-GEM-CMA-Split-object-creation-into-object-alloc-.patch
+++ /dev/null
@@ -1,147 +0,0 @@
-From 05cf3547ea572cf46fe55f55d83b887bb9acb97c Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Sun, 17 Feb 2013 01:54:26 +0100
-Subject: drm: GEM CMA: Split object creation into object alloc and DMA memory
- alloc
-
-This allows creating a GEM CMA object without an associated DMA memory
-buffer, and will be used to implement DRM PRIME support.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Reviewed-by: Rob Clark <robdclark@gmail.com>
-(cherry picked from commit a5ed8940d3f99f05d460ce31583182539f07fa0e)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/drm_gem_cma_helper.c | 83 +++++++++++++++++++++---------------
- 1 file changed, 48 insertions(+), 35 deletions(-)
-
-diff --git a/drivers/gpu/drm/drm_gem_cma_helper.c b/drivers/gpu/drm/drm_gem_cma_helper.c
-index 0a7e011509bd..8cce3302b690 100644
---- a/drivers/gpu/drm/drm_gem_cma_helper.c
-+++ b/drivers/gpu/drm/drm_gem_cma_helper.c
-@@ -32,62 +32,73 @@ static unsigned int get_gem_mmap_offset(struct drm_gem_object *obj)
- 	return (unsigned int)obj->map_list.hash.key << PAGE_SHIFT;
- }
- 
--static void drm_gem_cma_buf_destroy(struct drm_device *drm,
--		struct drm_gem_cma_object *cma_obj)
--{
--	dma_free_writecombine(drm->dev, cma_obj->base.size, cma_obj->vaddr,
--			cma_obj->paddr);
--}
--
- /*
-- * drm_gem_cma_create - allocate an object with the given size
-+ * __drm_gem_cma_create - Create a GEM CMA object without allocating memory
-+ * @drm: The drm device
-+ * @size: The GEM object size
-  *
-- * returns a struct drm_gem_cma_object* on success or ERR_PTR values
-- * on failure.
-+ * This function creates and initializes a GEM CMA object of the given size, but
-+ * doesn't allocate any memory to back the object.
-+ *
-+ * Return a struct drm_gem_cma_object* on success or ERR_PTR values on failure.
-  */
--struct drm_gem_cma_object *drm_gem_cma_create(struct drm_device *drm,
--		unsigned int size)
-+static struct drm_gem_cma_object *
-+__drm_gem_cma_create(struct drm_device *drm, unsigned int size)
- {
- 	struct drm_gem_cma_object *cma_obj;
- 	struct drm_gem_object *gem_obj;
- 	int ret;
- 
--	size = round_up(size, PAGE_SIZE);
--
- 	cma_obj = kzalloc(sizeof(*cma_obj), GFP_KERNEL);
- 	if (!cma_obj)
- 		return ERR_PTR(-ENOMEM);
- 
--	cma_obj->vaddr = dma_alloc_writecombine(drm->dev, size,
--			&cma_obj->paddr, GFP_KERNEL | __GFP_NOWARN);
--	if (!cma_obj->vaddr) {
--		dev_err(drm->dev, "failed to allocate buffer with size %d\n", size);
--		ret = -ENOMEM;
--		goto err_dma_alloc;
--	}
--
- 	gem_obj = &cma_obj->base;
- 
- 	ret = drm_gem_object_init(drm, gem_obj, size);
- 	if (ret)
--		goto err_obj_init;
-+		goto error;
- 
- 	ret = drm_gem_create_mmap_offset(gem_obj);
--	if (ret)
--		goto err_create_mmap_offset;
-+	if (ret) {
-+		drm_gem_object_release(gem_obj);
-+		goto error;
-+	}
- 
- 	return cma_obj;
- 
--err_create_mmap_offset:
--	drm_gem_object_release(gem_obj);
-+error:
-+	kfree(cma_obj);
-+	return ERR_PTR(ret);
-+}
- 
--err_obj_init:
--	drm_gem_cma_buf_destroy(drm, cma_obj);
-+/*
-+ * drm_gem_cma_create - allocate an object with the given size
-+ *
-+ * returns a struct drm_gem_cma_object* on success or ERR_PTR values
-+ * on failure.
-+ */
-+struct drm_gem_cma_object *drm_gem_cma_create(struct drm_device *drm,
-+		unsigned int size)
-+{
-+	struct drm_gem_cma_object *cma_obj;
- 
--err_dma_alloc:
--	kfree(cma_obj);
-+	size = round_up(size, PAGE_SIZE);
- 
--	return ERR_PTR(ret);
-+	cma_obj = __drm_gem_cma_create(drm, size);
-+	if (IS_ERR(cma_obj))
-+		return cma_obj;
-+
-+	cma_obj->vaddr = dma_alloc_writecombine(drm->dev, size,
-+			&cma_obj->paddr, GFP_KERNEL | __GFP_NOWARN);
-+	if (!cma_obj->vaddr) {
-+		dev_err(drm->dev, "failed to allocate buffer with size %d\n",
-+			size);
-+		drm_gem_cma_free_object(&cma_obj->base);
-+		return ERR_PTR(-ENOMEM);
-+	}
-+
-+	return cma_obj;
- }
- EXPORT_SYMBOL_GPL(drm_gem_cma_create);
- 
-@@ -143,11 +154,13 @@ void drm_gem_cma_free_object(struct drm_gem_object *gem_obj)
- 	if (gem_obj->map_list.map)
- 		drm_gem_free_mmap_offset(gem_obj);
- 
--	drm_gem_object_release(gem_obj);
--
- 	cma_obj = to_drm_gem_cma_obj(gem_obj);
- 
--	drm_gem_cma_buf_destroy(gem_obj->dev, cma_obj);
-+	if (cma_obj->vaddr)
-+		dma_free_writecombine(gem_obj->dev->dev, cma_obj->base.size,
-+				      cma_obj->vaddr, cma_obj->paddr);
-+
-+	drm_gem_object_release(gem_obj);
- 
- 	kfree(cma_obj);
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0006-sata_rcar-correct-sata_rcar_sht.patch b/patches.renesas/0006-sata_rcar-correct-sata_rcar_sht.patch
deleted file mode 100644
index 8214b8e615fdf..0000000000000
--- a/patches.renesas/0006-sata_rcar-correct-sata_rcar_sht.patch
+++ /dev/null
@@ -1,52 +0,0 @@
-From 1511e50716794cefe67e43635e5c27ad6329311d Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Tue, 28 May 2013 02:45:08 +0400
-Subject: sata_rcar: correct 'sata_rcar_sht'
-
-Using ATA_BMDMA_SHT() to intialize 'sata_rcar_sht' was suboptimal as
-the R-Car descriptor table transfer counter is 28 bits wide (bit 1 to
-bit 28), so that the 'dma_boundary' field of 0xFFFF is just too small,
-as well as the 'sg_tablesize' field of 128.  Use ATA_BASE_SHT() to
-initialize 'sata_rcar_sht' instead and give proper values to the
-'dma_boundary' and 'sg_tablesize' fields explicitly.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: Tejun Heo <tj@kernel.org>
-(cherry picked from commit 8bfbeed58665dbbf63813017712bd0c8e978379e)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/ata/sata_rcar.c | 11 ++++++++++-
- 1 file changed, 10 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/ata/sata_rcar.c b/drivers/ata/sata_rcar.c
-index d39330f6..6626a5bc 100644
---- a/drivers/ata/sata_rcar.c
-+++ b/drivers/ata/sata_rcar.c
-@@ -121,6 +121,8 @@
- /* Descriptor table word 0 bit (when DTA32M = 1) */
- #define SATA_RCAR_DTEND			BIT(0)
- 
-+#define SATA_RCAR_DMA_BOUNDARY		0x1FFFFFFEUL
-+
- struct sata_rcar_priv {
- 	void __iomem *base;
- 	struct clk *clk;
-@@ -576,7 +578,14 @@ static u8 sata_rcar_bmdma_status(struct ata_port *ap)
- }
- 
- static struct scsi_host_template sata_rcar_sht = {
--	ATA_BMDMA_SHT(DRV_NAME),
-+	ATA_BASE_SHT(DRV_NAME),
-+	/*
-+	 * This controller allows transfer chunks up to 512MB which cross 64KB
-+	 * boundaries, therefore the DMA limits are more relaxed than standard
-+	 * ATA SFF.
-+	 */
-+	.sg_tablesize		= ATA_MAX_PRD,
-+	.dma_boundary		= SATA_RCAR_DMA_BOUNDARY,
- };
- 
- static struct ata_port_operations sata_rcar_port_ops = {
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0007-clk-shmobile-Add-MSTP-clock-support.patch b/patches.renesas/0007-clk-shmobile-Add-MSTP-clock-support.patch
deleted file mode 100644
index a38ee9573b349..0000000000000
--- a/patches.renesas/0007-clk-shmobile-Add-MSTP-clock-support.patch
+++ /dev/null
@@ -1,330 +0,0 @@
-From fcd3dca0a33b8b10f5a4af7114504f18374399bd Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 17 Oct 2013 23:54:07 +0200
-Subject: clk: shmobile: Add MSTP clock support
-
-MSTP clocks are gate clocks controlled through a register that handles
-up to 32 clocks. The register is often sparsely populated.
-
-Those clocks are found on Renesas ARM SoCs.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Mike Turquette <mturquette@linaro.org>
-(cherry picked from commit f94859c215b6d977794108a1a9a101239e393c09)
-(Queued by Mike Turquette for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- .../bindings/clock/renesas,cpg-mstp-clocks.txt     |  51 +++++
- drivers/clk/shmobile/Makefile                      |   1 +
- drivers/clk/shmobile/clk-mstp.c                    | 229 +++++++++++++++++++++
- 3 files changed, 281 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt
- create mode 100644 drivers/clk/shmobile/clk-mstp.c
-
-diff --git a/Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt b/Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt
-new file mode 100644
-index 000000000000..a6a352c2771e
---- /dev/null
-+++ b/Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt
-@@ -0,0 +1,51 @@
-+* Renesas CPG Module Stop (MSTP) Clocks
-+
-+The CPG can gate SoC device clocks. The gates are organized in groups of up to
-+32 gates.
-+
-+This device tree binding describes a single 32 gate clocks group per node.
-+Clocks are referenced by user nodes by the MSTP node phandle and the clock
-+index in the group, from 0 to 31.
-+
-+Required Properties:
-+
-+  - compatible: Must be one of the following
-+    - "renesas,r8a7790-mstp-clocks" for R8A7790 (R-Car H2) MSTP gate clocks
-+    - "renesas,r8a7791-mstp-clocks" for R8A7791 (R-Car M2) MSTP gate clocks
-+    - "renesas,cpg-mstp-clock" for generic MSTP gate clocks
-+  - reg: Base address and length of the I/O mapped registers used by the MSTP
-+    clocks. The first register is the clock control register and is mandatory.
-+    The second register is the clock status register and is optional when not
-+    implemented in hardware.
-+  - clocks: Reference to the parent clocks, one per output clock. The parents
-+    must appear in the same order as the output clocks.
-+  - #clock-cells: Must be 1
-+  - clock-output-names: The name of the clocks as free-form strings
-+  - renesas,indices: Indices of the gate clocks into the group (0 to 31)
-+
-+The clocks, clock-output-names and renesas,indices properties contain one
-+entry per gate clock. The MSTP groups are sparsely populated. Unimplemented
-+gate clocks must not be declared.
-+
-+
-+Example
-+-------
-+
-+	#include <dt-bindings/clock/r8a7790-clock.h>
-+
-+	mstp3_clks: mstp3_clks@e615013c {
-+		compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
-+		reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>;
-+		clocks = <&cp_clk>, <&mmc1_clk>, <&sd3_clk>, <&sd2_clk>,
-+			 <&cpg_clocks R8A7790_CLK_SD1>, <&cpg_clocks R8A7790_CLK_SD0>,
-+			 <&mmc0_clk>;
-+		#clock-cells = <1>;
-+		clock-output-names =
-+			"tpu0", "mmcif1", "sdhi3", "sdhi2",
-+			 "sdhi1", "sdhi0", "mmcif0";
-+		renesas,clock-indices = <
-+			R8A7790_CLK_TPU0 R8A7790_CLK_MMCIF1 R8A7790_CLK_SDHI3
-+			R8A7790_CLK_SDHI2 R8A7790_CLK_SDHI1 R8A7790_CLK_SDHI0
-+			R8A7790_CLK_MMCIF0
-+		>;
-+	};
-diff --git a/drivers/clk/shmobile/Makefile b/drivers/clk/shmobile/Makefile
-index 2e4a1197aa0a..706adc6ae70c 100644
---- a/drivers/clk/shmobile/Makefile
-+++ b/drivers/clk/shmobile/Makefile
-@@ -1,6 +1,7 @@
- obj-$(CONFIG_ARCH_R8A7790)		+= clk-rcar-gen2.o
- obj-$(CONFIG_ARCH_R8A7791)		+= clk-rcar-gen2.o
- obj-$(CONFIG_ARCH_SHMOBILE_MULTI)	+= clk-div6.o
-+obj-$(CONFIG_ARCH_SHMOBILE_MULTI)	+= clk-mstp.o
- 
- # for emply built-in.o
- obj-n	:= dummy
-diff --git a/drivers/clk/shmobile/clk-mstp.c b/drivers/clk/shmobile/clk-mstp.c
-new file mode 100644
-index 000000000000..e576b60de20e
---- /dev/null
-+++ b/drivers/clk/shmobile/clk-mstp.c
-@@ -0,0 +1,229 @@
-+/*
-+ * R-Car MSTP clocks
-+ *
-+ * Copyright (C) 2013 Ideas On Board SPRL
-+ *
-+ * Contact: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; version 2 of the License.
-+ */
-+
-+#include <linux/clk-provider.h>
-+#include <linux/clkdev.h>
-+#include <linux/io.h>
-+#include <linux/of.h>
-+#include <linux/of_address.h>
-+#include <linux/spinlock.h>
-+
-+/*
-+ * MSTP clocks. We can't use standard gate clocks as we need to poll on the
-+ * status register when enabling the clock.
-+ */
-+
-+#define MSTP_MAX_CLOCKS		32
-+
-+/**
-+ * struct mstp_clock_group - MSTP gating clocks group
-+ *
-+ * @data: clocks in this group
-+ * @smstpcr: module stop control register
-+ * @mstpsr: module stop status register (optional)
-+ * @lock: protects writes to SMSTPCR
-+ */
-+struct mstp_clock_group {
-+	struct clk_onecell_data data;
-+	void __iomem *smstpcr;
-+	void __iomem *mstpsr;
-+	spinlock_t lock;
-+};
-+
-+/**
-+ * struct mstp_clock - MSTP gating clock
-+ * @hw: handle between common and hardware-specific interfaces
-+ * @bit_index: control bit index
-+ * @group: MSTP clocks group
-+ */
-+struct mstp_clock {
-+	struct clk_hw hw;
-+	u32 bit_index;
-+	struct mstp_clock_group *group;
-+};
-+
-+#define to_mstp_clock(_hw) container_of(_hw, struct mstp_clock, hw)
-+
-+static int cpg_mstp_clock_endisable(struct clk_hw *hw, bool enable)
-+{
-+	struct mstp_clock *clock = to_mstp_clock(hw);
-+	struct mstp_clock_group *group = clock->group;
-+	u32 bitmask = BIT(clock->bit_index);
-+	unsigned long flags;
-+	unsigned int i;
-+	u32 value;
-+
-+	spin_lock_irqsave(&group->lock, flags);
-+
-+	value = clk_readl(group->smstpcr);
-+	if (enable)
-+		value &= ~bitmask;
-+	else
-+		value |= bitmask;
-+	clk_writel(value, group->smstpcr);
-+
-+	spin_unlock_irqrestore(&group->lock, flags);
-+
-+	if (!enable || !group->mstpsr)
-+		return 0;
-+
-+	for (i = 1000; i > 0; --i) {
-+		if (!(clk_readl(group->mstpsr) & bitmask))
-+			break;
-+		cpu_relax();
-+	}
-+
-+	if (!i) {
-+		pr_err("%s: failed to enable %p[%d]\n", __func__,
-+		       group->smstpcr, clock->bit_index);
-+		return -ETIMEDOUT;
-+	}
-+
-+	return 0;
-+}
-+
-+static int cpg_mstp_clock_enable(struct clk_hw *hw)
-+{
-+	return cpg_mstp_clock_endisable(hw, true);
-+}
-+
-+static void cpg_mstp_clock_disable(struct clk_hw *hw)
-+{
-+	cpg_mstp_clock_endisable(hw, false);
-+}
-+
-+static int cpg_mstp_clock_is_enabled(struct clk_hw *hw)
-+{
-+	struct mstp_clock *clock = to_mstp_clock(hw);
-+	struct mstp_clock_group *group = clock->group;
-+	u32 value;
-+
-+	if (group->mstpsr)
-+		value = clk_readl(group->mstpsr);
-+	else
-+		value = clk_readl(group->smstpcr);
-+
-+	return !!(value & BIT(clock->bit_index));
-+}
-+
-+static const struct clk_ops cpg_mstp_clock_ops = {
-+	.enable = cpg_mstp_clock_enable,
-+	.disable = cpg_mstp_clock_disable,
-+	.is_enabled = cpg_mstp_clock_is_enabled,
-+};
-+
-+static struct clk * __init
-+cpg_mstp_clock_register(const char *name, const char *parent_name,
-+			unsigned int index, struct mstp_clock_group *group)
-+{
-+	struct clk_init_data init;
-+	struct mstp_clock *clock;
-+	struct clk *clk;
-+
-+	clock = kzalloc(sizeof(*clock), GFP_KERNEL);
-+	if (!clock) {
-+		pr_err("%s: failed to allocate MSTP clock.\n", __func__);
-+		return ERR_PTR(-ENOMEM);
-+	}
-+
-+	init.name = name;
-+	init.ops = &cpg_mstp_clock_ops;
-+	init.flags = CLK_IS_BASIC;
-+	init.parent_names = &parent_name;
-+	init.num_parents = 1;
-+
-+	clock->bit_index = index;
-+	clock->group = group;
-+	clock->hw.init = &init;
-+
-+	clk = clk_register(NULL, &clock->hw);
-+
-+	if (IS_ERR(clk))
-+		kfree(clock);
-+
-+	return clk;
-+}
-+
-+static void __init cpg_mstp_clocks_init(struct device_node *np)
-+{
-+	struct mstp_clock_group *group;
-+	struct clk **clks;
-+	unsigned int i;
-+
-+	group = kzalloc(sizeof(*group), GFP_KERNEL);
-+	clks = kzalloc(MSTP_MAX_CLOCKS * sizeof(*clks), GFP_KERNEL);
-+	if (group == NULL || clks == NULL) {
-+		kfree(group);
-+		kfree(clks);
-+		pr_err("%s: failed to allocate group\n", __func__);
-+		return;
-+	}
-+
-+	spin_lock_init(&group->lock);
-+	group->data.clks = clks;
-+
-+	group->smstpcr = of_iomap(np, 0);
-+	group->mstpsr = of_iomap(np, 1);
-+
-+	if (group->smstpcr == NULL) {
-+		pr_err("%s: failed to remap SMSTPCR\n", __func__);
-+		kfree(group);
-+		kfree(clks);
-+		return;
-+	}
-+
-+	for (i = 0; i < MSTP_MAX_CLOCKS; ++i) {
-+		const char *parent_name;
-+		const char *name;
-+		u32 clkidx;
-+		int ret;
-+
-+		/* Skip clocks with no name. */
-+		ret = of_property_read_string_index(np, "clock-output-names",
-+						    i, &name);
-+		if (ret < 0 || strlen(name) == 0)
-+			continue;
-+
-+		parent_name = of_clk_get_parent_name(np, i);
-+		ret = of_property_read_u32_index(np, "renesas,clock-indices", i,
-+						 &clkidx);
-+		if (parent_name == NULL || ret < 0)
-+			break;
-+
-+		if (clkidx >= MSTP_MAX_CLOCKS) {
-+			pr_err("%s: invalid clock %s %s index %u)\n",
-+			       __func__, np->name, name, clkidx);
-+			continue;
-+		}
-+
-+		clks[clkidx] = cpg_mstp_clock_register(name, parent_name, i,
-+						       group);
-+		if (!IS_ERR(clks[clkidx])) {
-+			group->data.clk_num = max(group->data.clk_num, clkidx);
-+			/*
-+			 * Register a clkdev to let board code retrieve the
-+			 * clock by name and register aliases for non-DT
-+			 * devices.
-+			 *
-+			 * FIXME: Remove this when all devices that require a
-+			 * clock will be instantiated from DT.
-+			 */
-+			clk_register_clkdev(clks[clkidx], name, NULL);
-+		} else {
-+			pr_err("%s: failed to register %s %s clock (%ld)\n",
-+			       __func__, np->name, name, PTR_ERR(clks[clkidx]));
-+		}
-+	}
-+
-+	of_clk_add_provider(np, of_clk_src_onecell_get, &group->data);
-+}
-+CLK_OF_DECLARE(cpg_mstp_clks, "renesas,cpg-mstp-clocks", cpg_mstp_clocks_init);
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0007-drm-GEM-CMA-Split-object-mapping-into-GEM-mapping-an.patch b/patches.renesas/0007-drm-GEM-CMA-Split-object-mapping-into-GEM-mapping-an.patch
deleted file mode 100644
index 117abb4c92ee7..0000000000000
--- a/patches.renesas/0007-drm-GEM-CMA-Split-object-mapping-into-GEM-mapping-an.patch
+++ /dev/null
@@ -1,65 +0,0 @@
-From 3b60a60a94a9952eefc3676334324139076c3186 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 16 Apr 2013 14:32:34 +0200
-Subject: drm: GEM CMA: Split object mapping into GEM mapping and CMA mapping
-
-The CMA-specific mapping code will be used to implement dma-buf mmap
-support.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Rob Clark <robdclark@gmail.com>
-(cherry picked from commit ebaf9e033e6dc9b584176c1731f4e07360d4d231)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/drm_gem_cma_helper.c | 22 +++++++++++++++-------
- 1 file changed, 15 insertions(+), 7 deletions(-)
-
-diff --git a/drivers/gpu/drm/drm_gem_cma_helper.c b/drivers/gpu/drm/drm_gem_cma_helper.c
-index 8cce3302b690..7a4db4e7a1ea 100644
---- a/drivers/gpu/drm/drm_gem_cma_helper.c
-+++ b/drivers/gpu/drm/drm_gem_cma_helper.c
-@@ -228,13 +228,26 @@ const struct vm_operations_struct drm_gem_cma_vm_ops = {
- };
- EXPORT_SYMBOL_GPL(drm_gem_cma_vm_ops);
- 
-+static int drm_gem_cma_mmap_obj(struct drm_gem_cma_object *cma_obj,
-+				struct vm_area_struct *vma)
-+{
-+	int ret;
-+
-+	ret = remap_pfn_range(vma, vma->vm_start, cma_obj->paddr >> PAGE_SHIFT,
-+			vma->vm_end - vma->vm_start, vma->vm_page_prot);
-+	if (ret)
-+		drm_gem_vm_close(vma);
-+
-+	return ret;
-+}
-+
- /*
-  * drm_gem_cma_mmap - (struct file_operation)->mmap callback function
-  */
- int drm_gem_cma_mmap(struct file *filp, struct vm_area_struct *vma)
- {
--	struct drm_gem_object *gem_obj;
- 	struct drm_gem_cma_object *cma_obj;
-+	struct drm_gem_object *gem_obj;
- 	int ret;
- 
- 	ret = drm_gem_mmap(filp, vma);
-@@ -244,12 +257,7 @@ int drm_gem_cma_mmap(struct file *filp, struct vm_area_struct *vma)
- 	gem_obj = vma->vm_private_data;
- 	cma_obj = to_drm_gem_cma_obj(gem_obj);
- 
--	ret = remap_pfn_range(vma, vma->vm_start, cma_obj->paddr >> PAGE_SHIFT,
--			vma->vm_end - vma->vm_start, vma->vm_page_prot);
--	if (ret)
--		drm_gem_vm_close(vma);
--
--	return ret;
-+	return drm_gem_cma_mmap_obj(cma_obj, vma);
- }
- EXPORT_SYMBOL_GPL(drm_gem_cma_mmap);
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0007-sata_rcar-add-base-local-variable-to-some-functions.patch b/patches.renesas/0007-sata_rcar-add-base-local-variable-to-some-functions.patch
deleted file mode 100644
index d1dc43330dbef..0000000000000
--- a/patches.renesas/0007-sata_rcar-add-base-local-variable-to-some-functions.patch
+++ /dev/null
@@ -1,322 +0,0 @@
-From 6d9c0509b381c8bae9c90fae732850dff45d1cf1 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Tue, 28 May 2013 02:46:41 +0400
-Subject: sata_rcar: add 'base' local variable to some functions
-
-The 'base' field of 'struct sata_rcar_priv' is used very often
-throughout the driver, so it seems worth loading it into a local
-variable if it's used more than once in a function.
-
-While at it, put some unitialized variables after intialized ones for
-aesthetic reasons. :-)
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: Tejun Heo <tj@kernel.org>
-(cherry picked from commit 1b20f6a9adaa4b88d520d279c3d605f65b898625)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-	drivers/ata/sata_rcar.c
----
- drivers/ata/sata_rcar.c | 101 +++++++++++++++++++++++++++---------------------
- 1 file changed, 57 insertions(+), 44 deletions(-)
-
-diff --git a/drivers/ata/sata_rcar.c b/drivers/ata/sata_rcar.c
-index 6626a5bc..b1dd5d82 100644
---- a/drivers/ata/sata_rcar.c
-+++ b/drivers/ata/sata_rcar.c
-@@ -130,41 +130,44 @@ struct sata_rcar_priv {
- 
- static void sata_rcar_phy_initialize(struct sata_rcar_priv *priv)
- {
-+	void __iomem *base = priv->base;
-+
- 	/* idle state */
--	iowrite32(0, priv->base + SATAPHYADDR_REG);
-+	iowrite32(0, base + SATAPHYADDR_REG);
- 	/* reset */
--	iowrite32(SATAPHYRESET_PHYRST, priv->base + SATAPHYRESET_REG);
-+	iowrite32(SATAPHYRESET_PHYRST, base + SATAPHYRESET_REG);
- 	udelay(10);
- 	/* deassert reset */
--	iowrite32(0, priv->base + SATAPHYRESET_REG);
-+	iowrite32(0, base + SATAPHYRESET_REG);
- }
- 
- static void sata_rcar_phy_write(struct sata_rcar_priv *priv, u16 reg, u32 val,
- 				int group)
- {
-+	void __iomem *base = priv->base;
- 	int timeout;
- 
- 	/* deassert reset */
--	iowrite32(0, priv->base + SATAPHYRESET_REG);
-+	iowrite32(0, base + SATAPHYRESET_REG);
- 	/* lane 1 */
--	iowrite32(SATAPHYACCEN_PHYLANE, priv->base + SATAPHYACCEN_REG);
-+	iowrite32(SATAPHYACCEN_PHYLANE, base + SATAPHYACCEN_REG);
- 	/* write phy register value */
--	iowrite32(val, priv->base + SATAPHYWDATA_REG);
-+	iowrite32(val, base + SATAPHYWDATA_REG);
- 	/* set register group */
- 	if (group)
- 		reg |= SATAPHYADDR_PHYRATEMODE;
- 	/* write command */
--	iowrite32(SATAPHYADDR_PHYCMD_WRITE | reg, priv->base + SATAPHYADDR_REG);
-+	iowrite32(SATAPHYADDR_PHYCMD_WRITE | reg, base + SATAPHYADDR_REG);
- 	/* wait for ack */
- 	for (timeout = 0; timeout < 100; timeout++) {
--		val = ioread32(priv->base + SATAPHYACK_REG);
-+		val = ioread32(base + SATAPHYACK_REG);
- 		if (val & SATAPHYACK_PHYACK)
- 			break;
- 	}
- 	if (timeout >= 100)
- 		pr_err("%s timeout\n", __func__);
- 	/* idle state */
--	iowrite32(0, priv->base + SATAPHYADDR_REG);
-+	iowrite32(0, base + SATAPHYADDR_REG);
- }
- 
- static void sata_rcar_freeze(struct ata_port *ap)
-@@ -180,14 +183,15 @@ static void sata_rcar_freeze(struct ata_port *ap)
- static void sata_rcar_thaw(struct ata_port *ap)
- {
- 	struct sata_rcar_priv *priv = ap->host->private_data;
-+	void __iomem *base = priv->base;
- 
- 	/* ack */
--	iowrite32(~SATA_RCAR_INT_MASK, priv->base + SATAINTSTAT_REG);
-+	iowrite32(~SATA_RCAR_INT_MASK, base + SATAINTSTAT_REG);
- 
- 	ata_sff_thaw(ap);
- 
- 	/* unmask */
--	iowrite32(0x7ff & ~SATA_RCAR_INT_MASK, priv->base + SATAINTMASK_REG);
-+	iowrite32(0x7ff & ~SATA_RCAR_INT_MASK, base + SATAINTMASK_REG);
- }
- 
- static void sata_rcar_ioread16_rep(void __iomem *reg, void *buffer, int count)
-@@ -509,15 +513,16 @@ static void sata_rcar_bmdma_setup(struct ata_queued_cmd *qc)
- {
- 	struct ata_port *ap = qc->ap;
- 	unsigned int rw = qc->tf.flags & ATA_TFLAG_WRITE;
--	u32 dmactl;
- 	struct sata_rcar_priv *priv = ap->host->private_data;
-+	void __iomem *base = priv->base;
-+	u32 dmactl;
- 
- 	/* load PRD table addr. */
- 	mb();   /* make sure PRD table writes are visible to controller */
--	iowrite32(ap->bmdma_prd_dma, priv->base + ATAPI_DTB_ADR_REG);
-+	iowrite32(ap->bmdma_prd_dma, base + ATAPI_DTB_ADR_REG);
- 
- 	/* specify data direction, triple-check start bit is clear */
--	dmactl = ioread32(priv->base + ATAPI_CONTROL1_REG);
-+	dmactl = ioread32(base + ATAPI_CONTROL1_REG);
- 	dmactl &= ~(ATAPI_CONTROL1_RW | ATAPI_CONTROL1_STOP);
- 	if (dmactl & ATAPI_CONTROL1_START) {
- 		dmactl &= ~ATAPI_CONTROL1_START;
-@@ -525,7 +530,7 @@ static void sata_rcar_bmdma_setup(struct ata_queued_cmd *qc)
- 	}
- 	if (!rw)
- 		dmactl |= ATAPI_CONTROL1_RW;
--	iowrite32(dmactl, priv->base + ATAPI_CONTROL1_REG);
-+	iowrite32(dmactl, base + ATAPI_CONTROL1_REG);
- 
- 	/* issue r/w command */
- 	ap->ops->sff_exec_command(ap, &qc->tf);
-@@ -534,28 +539,30 @@ static void sata_rcar_bmdma_setup(struct ata_queued_cmd *qc)
- static void sata_rcar_bmdma_start(struct ata_queued_cmd *qc)
- {
- 	struct ata_port *ap = qc->ap;
--	u32 dmactl;
- 	struct sata_rcar_priv *priv = ap->host->private_data;
-+	void __iomem *base = priv->base;
-+	u32 dmactl;
- 
- 	/* start host DMA transaction */
--	dmactl = ioread32(priv->base + ATAPI_CONTROL1_REG);
-+	dmactl = ioread32(base + ATAPI_CONTROL1_REG);
- 	dmactl &= ~ATAPI_CONTROL1_STOP;
- 	dmactl |= ATAPI_CONTROL1_START;
--	iowrite32(dmactl, priv->base + ATAPI_CONTROL1_REG);
-+	iowrite32(dmactl, base + ATAPI_CONTROL1_REG);
- }
- 
- static void sata_rcar_bmdma_stop(struct ata_queued_cmd *qc)
- {
- 	struct ata_port *ap = qc->ap;
- 	struct sata_rcar_priv *priv = ap->host->private_data;
-+	void __iomem *base = priv->base;
- 	u32 dmactl;
- 
- 	/* force termination of DMA transfer if active */
--	dmactl = ioread32(priv->base + ATAPI_CONTROL1_REG);
-+	dmactl = ioread32(base + ATAPI_CONTROL1_REG);
- 	if (dmactl & ATAPI_CONTROL1_START) {
- 		dmactl &= ~ATAPI_CONTROL1_START;
- 		dmactl |= ATAPI_CONTROL1_STOP;
--		iowrite32(dmactl, priv->base + ATAPI_CONTROL1_REG);
-+		iowrite32(dmactl, base + ATAPI_CONTROL1_REG);
- 	}
- 
- 	/* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */
-@@ -565,8 +572,8 @@ static void sata_rcar_bmdma_stop(struct ata_queued_cmd *qc)
- static u8 sata_rcar_bmdma_status(struct ata_port *ap)
- {
- 	struct sata_rcar_priv *priv = ap->host->private_data;
--	u32 status;
- 	u8 host_stat = 0;
-+	u32 status;
- 
- 	status = ioread32(priv->base + ATAPI_STATUS_REG);
- 	if (status & ATAPI_STATUS_DEVINT)
-@@ -665,19 +672,20 @@ static irqreturn_t sata_rcar_interrupt(int irq, void *dev_instance)
- {
- 	struct ata_host *host = dev_instance;
- 	struct sata_rcar_priv *priv = host->private_data;
--	struct ata_port *ap;
-+	void __iomem *base = priv->base;
- 	unsigned int handled = 0;
-+	struct ata_port *ap;
- 	u32 sataintstat;
- 	unsigned long flags;
- 
- 	spin_lock_irqsave(&host->lock, flags);
- 
--	sataintstat = ioread32(priv->base + SATAINTSTAT_REG);
-+	sataintstat = ioread32(base + SATAINTSTAT_REG);
- 	sataintstat &= SATA_RCAR_INT_MASK;
- 	if (!sataintstat)
- 		goto done;
- 	/* ack */
--	iowrite32(~sataintstat & 0x7ff, priv->base + SATAINTSTAT_REG);
-+	iowrite32(~sataintstat & 0x7ff, base + SATAINTSTAT_REG);
- 
- 	ap = host->ports[0];
- 
-@@ -699,15 +707,16 @@ static void sata_rcar_setup_port(struct ata_host *host)
- 	struct ata_port *ap = host->ports[0];
- 	struct ata_ioports *ioaddr = &ap->ioaddr;
- 	struct sata_rcar_priv *priv = host->private_data;
-+	void __iomem *base = priv->base;
- 
- 	ap->ops		= &sata_rcar_port_ops;
- 	ap->pio_mask	= ATA_PIO4;
- 	ap->udma_mask	= ATA_UDMA6;
- 	ap->flags	|= ATA_FLAG_SATA;
- 
--	ioaddr->cmd_addr = priv->base + SDATA_REG;
--	ioaddr->ctl_addr = priv->base + SSDEVCON_REG;
--	ioaddr->scr_addr = priv->base + SCRSSTS_REG;
-+	ioaddr->cmd_addr = base + SDATA_REG;
-+	ioaddr->ctl_addr = base + SSDEVCON_REG;
-+	ioaddr->scr_addr = base + SCRSSTS_REG;
- 	ioaddr->altstatus_addr = ioaddr->ctl_addr;
- 
- 	ioaddr->data_addr	= ioaddr->cmd_addr + (ATA_REG_DATA << 2);
-@@ -725,6 +734,7 @@ static void sata_rcar_setup_port(struct ata_host *host)
- static void sata_rcar_init_controller(struct ata_host *host)
- {
- 	struct sata_rcar_priv *priv = host->private_data;
-+	void __iomem *base = priv->base;
- 	u32 val;
- 
- 	/* reset and setup phy */
-@@ -737,27 +747,27 @@ static void sata_rcar_init_controller(struct ata_host *host)
- 	sata_rcar_phy_write(priv, SATAPCTLR4_REG, 0x28E80000, 0);
- 
- 	/* SATA-IP reset state */
--	val = ioread32(priv->base + ATAPI_CONTROL1_REG);
-+	val = ioread32(base + ATAPI_CONTROL1_REG);
- 	val |= ATAPI_CONTROL1_RESET;
--	iowrite32(val, priv->base + ATAPI_CONTROL1_REG);
-+	iowrite32(val, base + ATAPI_CONTROL1_REG);
- 
- 	/* ISM mode, PRD mode, DTEND flag at bit 0 */
--	val = ioread32(priv->base + ATAPI_CONTROL1_REG);
-+	val = ioread32(base + ATAPI_CONTROL1_REG);
- 	val |= ATAPI_CONTROL1_ISM;
- 	val |= ATAPI_CONTROL1_DESE;
- 	val |= ATAPI_CONTROL1_DTA32M;
--	iowrite32(val, priv->base + ATAPI_CONTROL1_REG);
-+	iowrite32(val, base + ATAPI_CONTROL1_REG);
- 
- 	/* Release the SATA-IP from the reset state */
--	val = ioread32(priv->base + ATAPI_CONTROL1_REG);
-+	val = ioread32(base + ATAPI_CONTROL1_REG);
- 	val &= ~ATAPI_CONTROL1_RESET;
--	iowrite32(val, priv->base + ATAPI_CONTROL1_REG);
-+	iowrite32(val, base + ATAPI_CONTROL1_REG);
- 
- 	/* ack and mask */
--	iowrite32(0, priv->base + SATAINTSTAT_REG);
--	iowrite32(0x7ff, priv->base + SATAINTMASK_REG);
-+	iowrite32(0, base + SATAINTSTAT_REG);
-+	iowrite32(0x7ff, base + SATAINTMASK_REG);
- 	/* enable interrupts */
--	iowrite32(ATAPI_INT_ENABLE_SATAINT, priv->base + ATAPI_INT_ENABLE_REG);
-+	iowrite32(ATAPI_INT_ENABLE_SATAINT, base + ATAPI_INT_ENABLE_REG);
- }
- 
- static int sata_rcar_probe(struct platform_device *pdev)
-@@ -824,14 +834,15 @@ static int sata_rcar_remove(struct platform_device *pdev)
- {
- 	struct ata_host *host = platform_get_drvdata(pdev);
- 	struct sata_rcar_priv *priv = host->private_data;
-+	void __iomem *base = priv->base;
- 
- 	ata_host_detach(host);
- 
- 	/* disable interrupts */
--	iowrite32(0, priv->base + ATAPI_INT_ENABLE_REG);
-+	iowrite32(0, base + ATAPI_INT_ENABLE_REG);
- 	/* ack and mask */
--	iowrite32(0, priv->base + SATAINTSTAT_REG);
--	iowrite32(0x7ff, priv->base + SATAINTMASK_REG);
-+	iowrite32(0, base + SATAINTSTAT_REG);
-+	iowrite32(0x7ff, base + SATAINTMASK_REG);
- 
- 	clk_disable(priv->clk);
- 
-@@ -843,14 +854,15 @@ static int sata_rcar_suspend(struct device *dev)
- {
- 	struct ata_host *host = dev_get_drvdata(dev);
- 	struct sata_rcar_priv *priv = host->private_data;
-+	void __iomem *base = priv->base;
- 	int ret;
- 
- 	ret = ata_host_suspend(host, PMSG_SUSPEND);
- 	if (!ret) {
- 		/* disable interrupts */
--		iowrite32(0, priv->base + ATAPI_INT_ENABLE_REG);
-+		iowrite32(0, base + ATAPI_INT_ENABLE_REG);
- 		/* mask */
--		iowrite32(0x7ff, priv->base + SATAINTMASK_REG);
-+		iowrite32(0x7ff, base + SATAINTMASK_REG);
- 
- 		clk_disable(priv->clk);
- 	}
-@@ -862,14 +874,15 @@ static int sata_rcar_resume(struct device *dev)
- {
- 	struct ata_host *host = dev_get_drvdata(dev);
- 	struct sata_rcar_priv *priv = host->private_data;
-+	void __iomem *base = priv->base;
- 
- 	clk_enable(priv->clk);
- 
- 	/* ack and mask */
--	iowrite32(0, priv->base + SATAINTSTAT_REG);
--	iowrite32(0x7ff, priv->base + SATAINTMASK_REG);
-+	iowrite32(0, base + SATAINTSTAT_REG);
-+	iowrite32(0x7ff, base + SATAINTMASK_REG);
- 	/* enable interrupts */
--	iowrite32(ATAPI_INT_ENABLE_SATAINT, priv->base + ATAPI_INT_ENABLE_REG);
-+	iowrite32(ATAPI_INT_ENABLE_SATAINT, base + ATAPI_INT_ENABLE_REG);
- 
- 	ata_host_resume(host);
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0008-clocksource-sh_cmt-Add-clk_prepare-unprepare-support.patch b/patches.renesas/0008-clocksource-sh_cmt-Add-clk_prepare-unprepare-support.patch
deleted file mode 100644
index a99bc32881a53..0000000000000
--- a/patches.renesas/0008-clocksource-sh_cmt-Add-clk_prepare-unprepare-support.patch
+++ /dev/null
@@ -1,83 +0,0 @@
-From 235b93ab5a6cd4493f53610a12c62cecde1f5771 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Sat, 14 Dec 2013 15:07:32 +0900
-Subject: clocksource: sh_cmt: Add clk_prepare/unprepare support
-
-Prepare the clock at probe time, as there is no other appropriate place
-in the driver where we're allowed to sleep.
-
-Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
-Cc: linux-kernel@vger.kernel.org
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
-(cherry picked from commit 57dee992df244ccce6a6a3a88a43160e285da5d8)
-(Queued by Daniel Lezcano for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/clocksource/sh_cmt.c | 20 ++++++++++++++++----
- 1 file changed, 16 insertions(+), 4 deletions(-)
-
-diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c
-index 0965e9848b3d..940341a185d7 100644
---- a/drivers/clocksource/sh_cmt.c
-+++ b/drivers/clocksource/sh_cmt.c
-@@ -634,12 +634,18 @@ static int sh_cmt_clock_event_next(unsigned long delta,
- 
- static void sh_cmt_clock_event_suspend(struct clock_event_device *ced)
- {
--	pm_genpd_syscore_poweroff(&ced_to_sh_cmt(ced)->pdev->dev);
-+	struct sh_cmt_priv *p = ced_to_sh_cmt(ced);
-+
-+	pm_genpd_syscore_poweroff(&p->pdev->dev);
-+	clk_unprepare(p->clk);
- }
- 
- static void sh_cmt_clock_event_resume(struct clock_event_device *ced)
- {
--	pm_genpd_syscore_poweron(&ced_to_sh_cmt(ced)->pdev->dev);
-+	struct sh_cmt_priv *p = ced_to_sh_cmt(ced);
-+
-+	clk_prepare(p->clk);
-+	pm_genpd_syscore_poweron(&p->pdev->dev);
- }
- 
- static void sh_cmt_register_clockevent(struct sh_cmt_priv *p,
-@@ -737,6 +743,10 @@ static int sh_cmt_setup(struct sh_cmt_priv *p, struct platform_device *pdev)
- 		goto err2;
- 	}
- 
-+	ret = clk_prepare(p->clk);
-+	if (ret < 0)
-+		goto err3;
-+
- 	if (res2 && (resource_size(res2) == 4)) {
- 		/* assume both CMSTR and CMCSR to be 32-bit */
- 		p->read_control = sh_cmt_read32;
-@@ -773,19 +783,21 @@ static int sh_cmt_setup(struct sh_cmt_priv *p, struct platform_device *pdev)
- 			      cfg->clocksource_rating);
- 	if (ret) {
- 		dev_err(&p->pdev->dev, "registration failed\n");
--		goto err3;
-+		goto err4;
- 	}
- 	p->cs_enabled = false;
- 
- 	ret = setup_irq(irq, &p->irqaction);
- 	if (ret) {
- 		dev_err(&p->pdev->dev, "failed to request irq %d\n", irq);
--		goto err3;
-+		goto err4;
- 	}
- 
- 	platform_set_drvdata(pdev, p);
- 
- 	return 0;
-+err4:
-+	clk_unprepare(p->clk);
- err3:
- 	clk_put(p->clk);
- err2:
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0008-drm-GEM-CMA-Add-DRM-PRIME-support.patch b/patches.renesas/0008-drm-GEM-CMA-Add-DRM-PRIME-support.patch
deleted file mode 100644
index dc99dc473d33e..0000000000000
--- a/patches.renesas/0008-drm-GEM-CMA-Add-DRM-PRIME-support.patch
+++ /dev/null
@@ -1,400 +0,0 @@
-From 3ae948b048338c0095f2121faef7f243be9624b3 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Sun, 17 Feb 2013 01:57:30 +0100
-Subject: drm: GEM CMA: Add DRM PRIME support
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Reviewed-by: Rob Clark <robdclark@gmail.com>
-(cherry picked from commit 71d7282a0f1abb488e5be4d154893579624bc683)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/drm_gem_cma_helper.c | 317 ++++++++++++++++++++++++++++++++++-
- include/drm/drm_gem_cma_helper.h     |   9 +
- 2 files changed, 323 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/gpu/drm/drm_gem_cma_helper.c b/drivers/gpu/drm/drm_gem_cma_helper.c
-index 7a4db4e7a1ea..f94fcd752815 100644
---- a/drivers/gpu/drm/drm_gem_cma_helper.c
-+++ b/drivers/gpu/drm/drm_gem_cma_helper.c
-@@ -21,6 +21,7 @@
- #include <linux/slab.h>
- #include <linux/mutex.h>
- #include <linux/export.h>
-+#include <linux/dma-buf.h>
- #include <linux/dma-mapping.h>
- 
- #include <drm/drmP.h>
-@@ -82,6 +83,8 @@ struct drm_gem_cma_object *drm_gem_cma_create(struct drm_device *drm,
- 		unsigned int size)
- {
- 	struct drm_gem_cma_object *cma_obj;
-+	struct sg_table *sgt = NULL;
-+	int ret;
- 
- 	size = round_up(size, PAGE_SIZE);
- 
-@@ -94,11 +97,29 @@ struct drm_gem_cma_object *drm_gem_cma_create(struct drm_device *drm,
- 	if (!cma_obj->vaddr) {
- 		dev_err(drm->dev, "failed to allocate buffer with size %d\n",
- 			size);
--		drm_gem_cma_free_object(&cma_obj->base);
--		return ERR_PTR(-ENOMEM);
-+		ret = -ENOMEM;
-+		goto error;
-+	}
-+
-+	sgt = kzalloc(sizeof(*cma_obj->sgt), GFP_KERNEL);
-+	if (sgt == NULL) {
-+		ret = -ENOMEM;
-+		goto error;
- 	}
- 
-+	ret = dma_get_sgtable(drm->dev, sgt, cma_obj->vaddr,
-+			      cma_obj->paddr, size);
-+	if (ret < 0)
-+		goto error;
-+
-+	cma_obj->sgt = sgt;
-+
- 	return cma_obj;
-+
-+error:
-+	kfree(sgt);
-+	drm_gem_cma_free_object(&cma_obj->base);
-+	return ERR_PTR(ret);
- }
- EXPORT_SYMBOL_GPL(drm_gem_cma_create);
- 
-@@ -156,9 +177,16 @@ void drm_gem_cma_free_object(struct drm_gem_object *gem_obj)
- 
- 	cma_obj = to_drm_gem_cma_obj(gem_obj);
- 
--	if (cma_obj->vaddr)
-+	if (cma_obj->vaddr) {
- 		dma_free_writecombine(gem_obj->dev->dev, cma_obj->base.size,
- 				      cma_obj->vaddr, cma_obj->paddr);
-+		if (cma_obj->sgt) {
-+			sg_free_table(cma_obj->sgt);
-+			kfree(cma_obj->sgt);
-+		}
-+	} else if (gem_obj->import_attach) {
-+		drm_prime_gem_destroy(gem_obj, cma_obj->sgt);
-+	}
- 
- 	drm_gem_object_release(gem_obj);
- 
-@@ -291,3 +319,286 @@ void drm_gem_cma_describe(struct drm_gem_cma_object *cma_obj, struct seq_file *m
- }
- EXPORT_SYMBOL_GPL(drm_gem_cma_describe);
- #endif
-+
-+/* -----------------------------------------------------------------------------
-+ * DMA-BUF
-+ */
-+
-+struct drm_gem_cma_dmabuf_attachment {
-+	struct sg_table sgt;
-+	enum dma_data_direction dir;
-+};
-+
-+static int drm_gem_cma_dmabuf_attach(struct dma_buf *dmabuf, struct device *dev,
-+				     struct dma_buf_attachment *attach)
-+{
-+	struct drm_gem_cma_dmabuf_attachment *cma_attach;
-+
-+	cma_attach = kzalloc(sizeof(*cma_attach), GFP_KERNEL);
-+	if (!cma_attach)
-+		return -ENOMEM;
-+
-+	cma_attach->dir = DMA_NONE;
-+	attach->priv = cma_attach;
-+
-+	return 0;
-+}
-+
-+static void drm_gem_cma_dmabuf_detach(struct dma_buf *dmabuf,
-+				      struct dma_buf_attachment *attach)
-+{
-+	struct drm_gem_cma_dmabuf_attachment *cma_attach = attach->priv;
-+	struct sg_table *sgt;
-+
-+	if (cma_attach == NULL)
-+		return;
-+
-+	sgt = &cma_attach->sgt;
-+
-+	if (cma_attach->dir != DMA_NONE)
-+		dma_unmap_sg(attach->dev, sgt->sgl, sgt->nents,
-+				cma_attach->dir);
-+
-+	sg_free_table(sgt);
-+	kfree(cma_attach);
-+	attach->priv = NULL;
-+}
-+
-+static struct sg_table *
-+drm_gem_cma_dmabuf_map(struct dma_buf_attachment *attach,
-+		       enum dma_data_direction dir)
-+{
-+	struct drm_gem_cma_dmabuf_attachment *cma_attach = attach->priv;
-+	struct drm_gem_cma_object *cma_obj = attach->dmabuf->priv;
-+	struct drm_device *drm = cma_obj->base.dev;
-+	struct scatterlist *rd, *wr;
-+	struct sg_table *sgt;
-+	unsigned int i;
-+	int nents, ret;
-+
-+	DRM_DEBUG_PRIME("\n");
-+
-+	if (WARN_ON(dir == DMA_NONE))
-+		return ERR_PTR(-EINVAL);
-+
-+	/* Return the cached mapping when possible. */
-+	if (cma_attach->dir == dir)
-+		return &cma_attach->sgt;
-+
-+	/* Two mappings with different directions for the same attachment are
-+	 * not allowed.
-+	 */
-+	if (WARN_ON(cma_attach->dir != DMA_NONE))
-+		return ERR_PTR(-EBUSY);
-+
-+	sgt = &cma_attach->sgt;
-+
-+	ret = sg_alloc_table(sgt, cma_obj->sgt->orig_nents, GFP_KERNEL);
-+	if (ret) {
-+		DRM_ERROR("failed to alloc sgt.\n");
-+		return ERR_PTR(-ENOMEM);
-+	}
-+
-+	mutex_lock(&drm->struct_mutex);
-+
-+	rd = cma_obj->sgt->sgl;
-+	wr = sgt->sgl;
-+	for (i = 0; i < sgt->orig_nents; ++i) {
-+		sg_set_page(wr, sg_page(rd), rd->length, rd->offset);
-+		rd = sg_next(rd);
-+		wr = sg_next(wr);
-+	}
-+
-+	nents = dma_map_sg(attach->dev, sgt->sgl, sgt->orig_nents, dir);
-+	if (!nents) {
-+		DRM_ERROR("failed to map sgl with iommu.\n");
-+		sg_free_table(sgt);
-+		sgt = ERR_PTR(-EIO);
-+		goto done;
-+	}
-+
-+	cma_attach->dir = dir;
-+	attach->priv = cma_attach;
-+
-+	DRM_DEBUG_PRIME("buffer size = %zu\n", cma_obj->base.size);
-+
-+done:
-+	mutex_unlock(&drm->struct_mutex);
-+	return sgt;
-+}
-+
-+static void drm_gem_cma_dmabuf_unmap(struct dma_buf_attachment *attach,
-+				     struct sg_table *sgt,
-+				     enum dma_data_direction dir)
-+{
-+	/* Nothing to do. */
-+}
-+
-+static void drm_gem_cma_dmabuf_release(struct dma_buf *dmabuf)
-+{
-+	struct drm_gem_cma_object *cma_obj = dmabuf->priv;
-+
-+	DRM_DEBUG_PRIME("%s\n", __FILE__);
-+
-+	/*
-+	 * drm_gem_cma_dmabuf_release() call means that file object's
-+	 * f_count is 0 and it calls drm_gem_object_handle_unreference()
-+	 * to drop the references that these values had been increased
-+	 * at drm_prime_handle_to_fd()
-+	 */
-+	if (cma_obj->base.export_dma_buf == dmabuf) {
-+		cma_obj->base.export_dma_buf = NULL;
-+
-+		/*
-+		 * drop this gem object refcount to release allocated buffer
-+		 * and resources.
-+		 */
-+		drm_gem_object_unreference_unlocked(&cma_obj->base);
-+	}
-+}
-+
-+static void *drm_gem_cma_dmabuf_kmap_atomic(struct dma_buf *dmabuf,
-+					    unsigned long page_num)
-+{
-+	/* TODO */
-+
-+	return NULL;
-+}
-+
-+static void drm_gem_cma_dmabuf_kunmap_atomic(struct dma_buf *dmabuf,
-+					     unsigned long page_num, void *addr)
-+{
-+	/* TODO */
-+}
-+
-+static void *drm_gem_cma_dmabuf_kmap(struct dma_buf *dmabuf,
-+				     unsigned long page_num)
-+{
-+	/* TODO */
-+
-+	return NULL;
-+}
-+
-+static void drm_gem_cma_dmabuf_kunmap(struct dma_buf *dmabuf,
-+				      unsigned long page_num, void *addr)
-+{
-+	/* TODO */
-+}
-+
-+static int drm_gem_cma_dmabuf_mmap(struct dma_buf *dmabuf,
-+				   struct vm_area_struct *vma)
-+{
-+	struct drm_gem_cma_object *cma_obj = dmabuf->priv;
-+	struct drm_gem_object *gem_obj = &cma_obj->base;
-+	int ret;
-+
-+	ret = drm_gem_mmap_obj(gem_obj, gem_obj->size, vma);
-+	if (ret < 0)
-+		return ret;
-+
-+	return drm_gem_cma_mmap_obj(cma_obj, vma);
-+}
-+
-+static void *drm_gem_cma_dmabuf_vmap(struct dma_buf *dmabuf)
-+{
-+	struct drm_gem_cma_object *cma_obj = dmabuf->priv;
-+
-+	return cma_obj->vaddr;
-+}
-+
-+static struct dma_buf_ops drm_gem_cma_dmabuf_ops = {
-+	.attach			= drm_gem_cma_dmabuf_attach,
-+	.detach			= drm_gem_cma_dmabuf_detach,
-+	.map_dma_buf		= drm_gem_cma_dmabuf_map,
-+	.unmap_dma_buf		= drm_gem_cma_dmabuf_unmap,
-+	.kmap			= drm_gem_cma_dmabuf_kmap,
-+	.kmap_atomic		= drm_gem_cma_dmabuf_kmap_atomic,
-+	.kunmap			= drm_gem_cma_dmabuf_kunmap,
-+	.kunmap_atomic		= drm_gem_cma_dmabuf_kunmap_atomic,
-+	.mmap			= drm_gem_cma_dmabuf_mmap,
-+	.vmap			= drm_gem_cma_dmabuf_vmap,
-+	.release		= drm_gem_cma_dmabuf_release,
-+};
-+
-+struct dma_buf *drm_gem_cma_dmabuf_export(struct drm_device *drm,
-+					  struct drm_gem_object *obj, int flags)
-+{
-+	struct drm_gem_cma_object *cma_obj = to_drm_gem_cma_obj(obj);
-+
-+	return dma_buf_export(cma_obj, &drm_gem_cma_dmabuf_ops,
-+			      cma_obj->base.size, flags);
-+}
-+EXPORT_SYMBOL_GPL(drm_gem_cma_dmabuf_export);
-+
-+struct drm_gem_object *drm_gem_cma_dmabuf_import(struct drm_device *drm,
-+						 struct dma_buf *dma_buf)
-+{
-+	struct drm_gem_cma_object *cma_obj;
-+	struct dma_buf_attachment *attach;
-+	struct sg_table *sgt;
-+	int ret;
-+
-+	DRM_DEBUG_PRIME("%s\n", __FILE__);
-+
-+	/* is this one of own objects? */
-+	if (dma_buf->ops == &drm_gem_cma_dmabuf_ops) {
-+		struct drm_gem_object *obj;
-+
-+		cma_obj = dma_buf->priv;
-+		obj = &cma_obj->base;
-+
-+		/* is it from our device? */
-+		if (obj->dev == drm) {
-+			/*
-+			 * Importing dmabuf exported from out own gem increases
-+			 * refcount on gem itself instead of f_count of dmabuf.
-+			 */
-+			drm_gem_object_reference(obj);
-+			dma_buf_put(dma_buf);
-+			return obj;
-+		}
-+	}
-+
-+	/* Create a CMA GEM buffer. */
-+	cma_obj = __drm_gem_cma_create(drm, dma_buf->size);
-+	if (IS_ERR(cma_obj))
-+		return ERR_PTR(PTR_ERR(cma_obj));
-+
-+	/* Attach to the buffer and map it. Make sure the mapping is contiguous
-+	 * on the device memory bus, as that's all we support.
-+	 */
-+	attach = dma_buf_attach(dma_buf, drm->dev);
-+	if (IS_ERR(attach)) {
-+		ret = -EINVAL;
-+		goto error_gem_free;
-+	}
-+
-+	sgt = dma_buf_map_attachment(attach, DMA_BIDIRECTIONAL);
-+	if (IS_ERR_OR_NULL(sgt)) {
-+		ret = sgt ? PTR_ERR(sgt) : -ENOMEM;
-+		goto error_buf_detach;
-+	}
-+
-+	if (sgt->nents != 1) {
-+		ret = -EINVAL;
-+		goto error_buf_unmap;
-+	}
-+
-+	cma_obj->base.import_attach = attach;
-+	cma_obj->paddr = sg_dma_address(sgt->sgl);
-+	cma_obj->sgt = sgt;
-+
-+	DRM_DEBUG_PRIME("dma_addr = 0x%x, size = %zu\n", cma_obj->paddr,
-+			dma_buf->size);
-+
-+	return &cma_obj->base;
-+
-+error_buf_unmap:
-+	dma_buf_unmap_attachment(attach, sgt, DMA_BIDIRECTIONAL);
-+error_buf_detach:
-+	dma_buf_detach(dma_buf, attach);
-+error_gem_free:
-+	drm_gem_cma_free_object(&cma_obj->base);
-+	return ERR_PTR(ret);
-+}
-+EXPORT_SYMBOL_GPL(drm_gem_cma_dmabuf_import);
-diff --git a/include/drm/drm_gem_cma_helper.h b/include/drm/drm_gem_cma_helper.h
-index 63397ced9254..6e17251e9b28 100644
---- a/include/drm/drm_gem_cma_helper.h
-+++ b/include/drm/drm_gem_cma_helper.h
-@@ -4,6 +4,9 @@
- struct drm_gem_cma_object {
- 	struct drm_gem_object base;
- 	dma_addr_t paddr;
-+	struct sg_table *sgt;
-+
-+	/* For objects with DMA memory allocated by GEM CMA */
- 	void *vaddr;
- };
- 
-@@ -45,4 +48,10 @@ extern const struct vm_operations_struct drm_gem_cma_vm_ops;
- void drm_gem_cma_describe(struct drm_gem_cma_object *obj, struct seq_file *m);
- #endif
- 
-+struct dma_buf *drm_gem_cma_dmabuf_export(struct drm_device *drm_dev,
-+					  struct drm_gem_object *obj,
-+					  int flags);
-+struct drm_gem_object *drm_gem_cma_dmabuf_import(struct drm_device *drm_dev,
-+						 struct dma_buf *dma_buf);
-+
- #endif /* __DRM_GEM_CMA_HELPER_H__ */
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0008-sata_rcar-fix-compilation-warning-in-sata_rcar_thaw.patch b/patches.renesas/0008-sata_rcar-fix-compilation-warning-in-sata_rcar_thaw.patch
deleted file mode 100644
index 6884d593f85e1..0000000000000
--- a/patches.renesas/0008-sata_rcar-fix-compilation-warning-in-sata_rcar_thaw.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From 731282ac0516fea7a9db38cda3a0a2dd7bd491a8 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Mon, 3 Jun 2013 13:16:05 -0700
-Subject: sata_rcar: fix compilation warning in sata_rcar_thaw()
-
-When compiling the driver with gcc 4.8, it gives the following warning:
-
- drivers/ata/sata_rcar.c: In function `sata_rcar_thaw':
- drivers/ata/sata_rcar.c:183:2: warning: large integer implicitly truncated to unsigned type [-Woverflow]
-
-Fix the warning by explicit cast of the 'unsigned long' value to 'u32'.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: Tejun Heo <tj@kernel.org>
-(cherry picked from commit 5ba59b59cb413b9d89f40532bad3529d5185dd3c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-	drivers/ata/sata_rcar.c
----
- drivers/ata/sata_rcar.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/ata/sata_rcar.c b/drivers/ata/sata_rcar.c
-index b1dd5d82..8108eb06 100644
---- a/drivers/ata/sata_rcar.c
-+++ b/drivers/ata/sata_rcar.c
-@@ -186,7 +186,7 @@ static void sata_rcar_thaw(struct ata_port *ap)
- 	void __iomem *base = priv->base;
- 
- 	/* ack */
--	iowrite32(~SATA_RCAR_INT_MASK, base + SATAINTSTAT_REG);
-+	iowrite32(~(u32)SATA_RCAR_INT_MASK, base + SATAINTSTAT_REG);
- 
- 	ata_sff_thaw(ap);
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0009-drivers-ata-sata_rcar.c-simplify-use-of-devm_ioremap.patch b/patches.renesas/0009-drivers-ata-sata_rcar.c-simplify-use-of-devm_ioremap.patch
deleted file mode 100644
index 29079053bf21b..0000000000000
--- a/patches.renesas/0009-drivers-ata-sata_rcar.c-simplify-use-of-devm_ioremap.patch
+++ /dev/null
@@ -1,63 +0,0 @@
-From 7ebdc8dd825f565e287fd37a115dba44ec8c34db Mon Sep 17 00:00:00 2001
-From: Julia Lawall <Julia.Lawall@lip6.fr>
-Date: Wed, 14 Aug 2013 11:11:31 +0200
-Subject: drivers/ata/sata_rcar.c: simplify use of devm_ioremap_resource
-
-Remove unneeded error handling on the result of a call to
-platform_get_resource when the value is passed to devm_ioremap_resource.
-
-Move the call to platform_get_resource adjacent to the call to
-devm_ioremap_resource to make the connection between them more clear.
-
-A simplified version of the semantic patch that makes this change is as
-follows: (http://coccinelle.lip6.fr/)
-
-// <smpl>
-@@
-expression pdev,res,n,e,e1;
-expression ret != 0;
-identifier l;
-@@
-
-- res = platform_get_resource(pdev, IORESOURCE_MEM, n);
-  ... when != res
-- if (res == NULL) { ... \(goto l;\|return ret;\) }
-  ... when != res
-+ res = platform_get_resource(pdev, IORESOURCE_MEM, n);
-  e = devm_ioremap_resource(e1, res);
-// </smpl>
-
-Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
-Signed-off-by: Tejun Heo <tj@kernel.org>
-(cherry picked from commit 4a9b7f9f2704405c05b213f8f51e9f7f1fe02d1a)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/ata/sata_rcar.c | 5 +----
- 1 file changed, 1 insertion(+), 4 deletions(-)
-
-diff --git a/drivers/ata/sata_rcar.c b/drivers/ata/sata_rcar.c
-index 8108eb06..c2d95e9f 100644
---- a/drivers/ata/sata_rcar.c
-+++ b/drivers/ata/sata_rcar.c
-@@ -778,10 +778,6 @@ static int sata_rcar_probe(struct platform_device *pdev)
- 	int irq;
- 	int ret = 0;
- 
--	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
--	if (mem == NULL)
--		return -EINVAL;
--
- 	irq = platform_get_irq(pdev, 0);
- 	if (irq <= 0)
- 		return -EINVAL;
-@@ -807,6 +803,7 @@ static int sata_rcar_probe(struct platform_device *pdev)
- 
- 	host->private_data = priv;
- 
-+	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- 	priv->base = devm_ioremap_resource(&pdev->dev, mem);
- 	if (IS_ERR(priv->base)) {
- 		ret = PTR_ERR(priv->base);
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0009-drm-Renesas-R-Car-Display-Unit-DRM-driver.patch b/patches.renesas/0009-drm-Renesas-R-Car-Display-Unit-DRM-driver.patch
deleted file mode 100644
index c7ac09460c797..0000000000000
--- a/patches.renesas/0009-drm-Renesas-R-Car-Display-Unit-DRM-driver.patch
+++ /dev/null
@@ -1,3019 +0,0 @@
-From 7f3fc5224e7eb0af6074ce3ab54f1bd10e81927a Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 19 Jun 2013 13:54:11 +0200
-Subject: drm: Renesas R-Car Display Unit DRM driver
-
-The R-Car Display Unit (DU) DRM driver supports both superposition
-processors and all eight planes in RGB and YUV formats with alpha
-blending.
-
-Only VGA and LVDS encoders and connectors are currently supported.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit 4bf8e1962f91eed5dbee168d2348983dda0a518f)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/Kconfig                 |   2 +
- drivers/gpu/drm/Makefile                |   1 +
- drivers/gpu/drm/rcar-du/Kconfig         |   9 +
- drivers/gpu/drm/rcar-du/Makefile        |   8 +
- drivers/gpu/drm/rcar-du/rcar_du_crtc.c  | 595 ++++++++++++++++++++++++++++++++
- drivers/gpu/drm/rcar-du/rcar_du_crtc.h  |  50 +++
- drivers/gpu/drm/rcar-du/rcar_du_drv.c   | 325 +++++++++++++++++
- drivers/gpu/drm/rcar-du/rcar_du_drv.h   |  66 ++++
- drivers/gpu/drm/rcar-du/rcar_du_kms.c   | 245 +++++++++++++
- drivers/gpu/drm/rcar-du/rcar_du_kms.h   |  59 ++++
- drivers/gpu/drm/rcar-du/rcar_du_lvds.c  | 216 ++++++++++++
- drivers/gpu/drm/rcar-du/rcar_du_lvds.h  |  24 ++
- drivers/gpu/drm/rcar-du/rcar_du_plane.c | 507 +++++++++++++++++++++++++++
- drivers/gpu/drm/rcar-du/rcar_du_plane.h |  67 ++++
- drivers/gpu/drm/rcar-du/rcar_du_regs.h  | 445 ++++++++++++++++++++++++
- drivers/gpu/drm/rcar-du/rcar_du_vga.c   | 149 ++++++++
- drivers/gpu/drm/rcar-du/rcar_du_vga.h   |  24 ++
- include/linux/platform_data/rcar-du.h   |  54 +++
- 18 files changed, 2846 insertions(+)
- create mode 100644 drivers/gpu/drm/rcar-du/Kconfig
- create mode 100644 drivers/gpu/drm/rcar-du/Makefile
- create mode 100644 drivers/gpu/drm/rcar-du/rcar_du_crtc.c
- create mode 100644 drivers/gpu/drm/rcar-du/rcar_du_crtc.h
- create mode 100644 drivers/gpu/drm/rcar-du/rcar_du_drv.c
- create mode 100644 drivers/gpu/drm/rcar-du/rcar_du_drv.h
- create mode 100644 drivers/gpu/drm/rcar-du/rcar_du_kms.c
- create mode 100644 drivers/gpu/drm/rcar-du/rcar_du_kms.h
- create mode 100644 drivers/gpu/drm/rcar-du/rcar_du_lvds.c
- create mode 100644 drivers/gpu/drm/rcar-du/rcar_du_lvds.h
- create mode 100644 drivers/gpu/drm/rcar-du/rcar_du_plane.c
- create mode 100644 drivers/gpu/drm/rcar-du/rcar_du_plane.h
- create mode 100644 drivers/gpu/drm/rcar-du/rcar_du_regs.h
- create mode 100644 drivers/gpu/drm/rcar-du/rcar_du_vga.c
- create mode 100644 drivers/gpu/drm/rcar-du/rcar_du_vga.h
- create mode 100644 include/linux/platform_data/rcar-du.h
-
-diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
-index b16c50ee769c..71ca63b79a4f 100644
---- a/drivers/gpu/drm/Kconfig
-+++ b/drivers/gpu/drm/Kconfig
-@@ -213,6 +213,8 @@ source "drivers/gpu/drm/mgag200/Kconfig"
- 
- source "drivers/gpu/drm/cirrus/Kconfig"
- 
-+source "drivers/gpu/drm/rcar-du/Kconfig"
-+
- source "drivers/gpu/drm/shmobile/Kconfig"
- 
- source "drivers/gpu/drm/omapdrm/Kconfig"
-diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
-index 1c9f24396002..44de0f316a08 100644
---- a/drivers/gpu/drm/Makefile
-+++ b/drivers/gpu/drm/Makefile
-@@ -48,6 +48,7 @@ obj-$(CONFIG_DRM_EXYNOS) +=exynos/
- obj-$(CONFIG_DRM_GMA500) += gma500/
- obj-$(CONFIG_DRM_UDL) += udl/
- obj-$(CONFIG_DRM_AST) += ast/
-+obj-$(CONFIG_DRM_RCAR_DU) += rcar-du/
- obj-$(CONFIG_DRM_SHMOBILE) +=shmobile/
- obj-$(CONFIG_DRM_OMAP)	+= omapdrm/
- obj-$(CONFIG_DRM_TILCDC)	+= tilcdc/
-diff --git a/drivers/gpu/drm/rcar-du/Kconfig b/drivers/gpu/drm/rcar-du/Kconfig
-new file mode 100644
-index 000000000000..72887df8dd76
---- /dev/null
-+++ b/drivers/gpu/drm/rcar-du/Kconfig
-@@ -0,0 +1,9 @@
-+config DRM_RCAR_DU
-+	tristate "DRM Support for R-Car Display Unit"
-+	depends on DRM && ARM
-+	select DRM_KMS_HELPER
-+	select DRM_KMS_CMA_HELPER
-+	select DRM_GEM_CMA_HELPER
-+	help
-+	  Choose this option if you have an R-Car chipset.
-+	  If M is selected the module will be called rcar-du-drm.
-diff --git a/drivers/gpu/drm/rcar-du/Makefile b/drivers/gpu/drm/rcar-du/Makefile
-new file mode 100644
-index 000000000000..7333c0094015
---- /dev/null
-+++ b/drivers/gpu/drm/rcar-du/Makefile
-@@ -0,0 +1,8 @@
-+rcar-du-drm-y := rcar_du_crtc.o \
-+		 rcar_du_drv.o \
-+		 rcar_du_kms.o \
-+		 rcar_du_lvds.o \
-+		 rcar_du_plane.o \
-+		 rcar_du_vga.o
-+
-+obj-$(CONFIG_DRM_RCAR_DU)	+= rcar-du-drm.o
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
-new file mode 100644
-index 000000000000..24183fb93592
---- /dev/null
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
-@@ -0,0 +1,595 @@
-+/*
-+ * rcar_du_crtc.c  --  R-Car Display Unit CRTCs
-+ *
-+ * Copyright (C) 2013 Renesas Corporation
-+ *
-+ * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ */
-+
-+#include <linux/clk.h>
-+#include <linux/mutex.h>
-+
-+#include <drm/drmP.h>
-+#include <drm/drm_crtc.h>
-+#include <drm/drm_crtc_helper.h>
-+#include <drm/drm_fb_cma_helper.h>
-+#include <drm/drm_gem_cma_helper.h>
-+
-+#include "rcar_du_crtc.h"
-+#include "rcar_du_drv.h"
-+#include "rcar_du_kms.h"
-+#include "rcar_du_lvds.h"
-+#include "rcar_du_plane.h"
-+#include "rcar_du_regs.h"
-+#include "rcar_du_vga.h"
-+
-+#define to_rcar_crtc(c)	container_of(c, struct rcar_du_crtc, crtc)
-+
-+static u32 rcar_du_crtc_read(struct rcar_du_crtc *rcrtc, u32 reg)
-+{
-+	struct rcar_du_device *rcdu = rcrtc->crtc.dev->dev_private;
-+
-+	return rcar_du_read(rcdu, rcrtc->mmio_offset + reg);
-+}
-+
-+static void rcar_du_crtc_write(struct rcar_du_crtc *rcrtc, u32 reg, u32 data)
-+{
-+	struct rcar_du_device *rcdu = rcrtc->crtc.dev->dev_private;
-+
-+	rcar_du_write(rcdu, rcrtc->mmio_offset + reg, data);
-+}
-+
-+static void rcar_du_crtc_clr(struct rcar_du_crtc *rcrtc, u32 reg, u32 clr)
-+{
-+	struct rcar_du_device *rcdu = rcrtc->crtc.dev->dev_private;
-+
-+	rcar_du_write(rcdu, rcrtc->mmio_offset + reg,
-+		      rcar_du_read(rcdu, rcrtc->mmio_offset + reg) & ~clr);
-+}
-+
-+static void rcar_du_crtc_set(struct rcar_du_crtc *rcrtc, u32 reg, u32 set)
-+{
-+	struct rcar_du_device *rcdu = rcrtc->crtc.dev->dev_private;
-+
-+	rcar_du_write(rcdu, rcrtc->mmio_offset + reg,
-+		      rcar_du_read(rcdu, rcrtc->mmio_offset + reg) | set);
-+}
-+
-+static void rcar_du_crtc_clr_set(struct rcar_du_crtc *rcrtc, u32 reg,
-+				 u32 clr, u32 set)
-+{
-+	struct rcar_du_device *rcdu = rcrtc->crtc.dev->dev_private;
-+	u32 value = rcar_du_read(rcdu, rcrtc->mmio_offset + reg);
-+
-+	rcar_du_write(rcdu, rcrtc->mmio_offset + reg, (value & ~clr) | set);
-+}
-+
-+static void rcar_du_crtc_set_display_timing(struct rcar_du_crtc *rcrtc)
-+{
-+	struct drm_crtc *crtc = &rcrtc->crtc;
-+	struct rcar_du_device *rcdu = crtc->dev->dev_private;
-+	const struct drm_display_mode *mode = &crtc->mode;
-+	unsigned long clk;
-+	u32 value;
-+	u32 div;
-+
-+	/* Dot clock */
-+	clk = clk_get_rate(rcdu->clock);
-+	div = DIV_ROUND_CLOSEST(clk, mode->clock * 1000);
-+	div = clamp(div, 1U, 64U) - 1;
-+
-+	rcar_du_write(rcdu, rcrtc->index ? ESCR2 : ESCR,
-+		      ESCR_DCLKSEL_CLKS | div);
-+	rcar_du_write(rcdu, rcrtc->index ? OTAR2 : OTAR, 0);
-+
-+	/* Signal polarities */
-+	value = ((mode->flags & DRM_MODE_FLAG_PVSYNC) ? 0 : DSMR_VSL)
-+	      | ((mode->flags & DRM_MODE_FLAG_PHSYNC) ? 0 : DSMR_HSL)
-+	      | DSMR_DIPM_DE;
-+	rcar_du_crtc_write(rcrtc, DSMR, value);
-+
-+	/* Display timings */
-+	rcar_du_crtc_write(rcrtc, HDSR, mode->htotal - mode->hsync_start - 19);
-+	rcar_du_crtc_write(rcrtc, HDER, mode->htotal - mode->hsync_start +
-+					mode->hdisplay - 19);
-+	rcar_du_crtc_write(rcrtc, HSWR, mode->hsync_end -
-+					mode->hsync_start - 1);
-+	rcar_du_crtc_write(rcrtc, HCR,  mode->htotal - 1);
-+
-+	rcar_du_crtc_write(rcrtc, VDSR, mode->vtotal - mode->vsync_end - 2);
-+	rcar_du_crtc_write(rcrtc, VDER, mode->vtotal - mode->vsync_end +
-+					mode->vdisplay - 2);
-+	rcar_du_crtc_write(rcrtc, VSPR, mode->vtotal - mode->vsync_end +
-+					mode->vsync_start - 1);
-+	rcar_du_crtc_write(rcrtc, VCR,  mode->vtotal - 1);
-+
-+	rcar_du_crtc_write(rcrtc, DESR,  mode->htotal - mode->hsync_start);
-+	rcar_du_crtc_write(rcrtc, DEWR,  mode->hdisplay);
-+}
-+
-+static void rcar_du_crtc_set_routing(struct rcar_du_crtc *rcrtc)
-+{
-+	struct rcar_du_device *rcdu = rcrtc->crtc.dev->dev_private;
-+	u32 dorcr = rcar_du_read(rcdu, DORCR);
-+
-+	dorcr &= ~(DORCR_PG2T | DORCR_DK2S | DORCR_PG2D_MASK);
-+
-+	/* Set the DU1 pins sources. Select CRTC 0 if explicitly requested and
-+	 * CRTC 1 in all other cases to avoid cloning CRTC 0 to DU0 and DU1 by
-+	 * default.
-+	 */
-+	if (rcrtc->outputs & (1 << 1) && rcrtc->index == 0)
-+		dorcr |= DORCR_PG2D_DS1;
-+	else
-+		dorcr |= DORCR_PG2T | DORCR_DK2S | DORCR_PG2D_DS2;
-+
-+	rcar_du_write(rcdu, DORCR, dorcr);
-+}
-+
-+static void __rcar_du_start_stop(struct rcar_du_device *rcdu, bool start)
-+{
-+	rcar_du_write(rcdu, DSYSR,
-+		      (rcar_du_read(rcdu, DSYSR) & ~(DSYSR_DRES | DSYSR_DEN)) |
-+		      (start ? DSYSR_DEN : DSYSR_DRES));
-+}
-+
-+static void rcar_du_start_stop(struct rcar_du_device *rcdu, bool start)
-+{
-+	/* Many of the configuration bits are only updated when the display
-+	 * reset (DRES) bit in DSYSR is set to 1, disabling *both* CRTCs. Some
-+	 * of those bits could be pre-configured, but others (especially the
-+	 * bits related to plane assignment to display timing controllers) need
-+	 * to be modified at runtime.
-+	 *
-+	 * Restart the display controller if a start is requested. Sorry for the
-+	 * flicker. It should be possible to move most of the "DRES-update" bits
-+	 * setup to driver initialization time and minimize the number of cases
-+	 * when the display controller will have to be restarted.
-+	 */
-+	if (start) {
-+		if (rcdu->used_crtcs++ != 0)
-+			__rcar_du_start_stop(rcdu, false);
-+		__rcar_du_start_stop(rcdu, true);
-+	} else {
-+		if (--rcdu->used_crtcs == 0)
-+			__rcar_du_start_stop(rcdu, false);
-+	}
-+}
-+
-+void rcar_du_crtc_route_output(struct drm_crtc *crtc, unsigned int output)
-+{
-+	struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);
-+
-+	/* Store the route from the CRTC output to the DU output. The DU will be
-+	 * configured when starting the CRTC.
-+	 */
-+	rcrtc->outputs |= 1 << output;
-+}
-+
-+void rcar_du_crtc_update_planes(struct drm_crtc *crtc)
-+{
-+	struct rcar_du_device *rcdu = crtc->dev->dev_private;
-+	struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);
-+	struct rcar_du_plane *planes[RCAR_DU_NUM_HW_PLANES];
-+	unsigned int num_planes = 0;
-+	unsigned int prio = 0;
-+	unsigned int i;
-+	u32 dptsr = 0;
-+	u32 dspr = 0;
-+
-+	for (i = 0; i < ARRAY_SIZE(rcdu->planes.planes); ++i) {
-+		struct rcar_du_plane *plane = &rcdu->planes.planes[i];
-+		unsigned int j;
-+
-+		if (plane->crtc != &rcrtc->crtc || !plane->enabled)
-+			continue;
-+
-+		/* Insert the plane in the sorted planes array. */
-+		for (j = num_planes++; j > 0; --j) {
-+			if (planes[j-1]->zpos <= plane->zpos)
-+				break;
-+			planes[j] = planes[j-1];
-+		}
-+
-+		planes[j] = plane;
-+		prio += plane->format->planes * 4;
-+	}
-+
-+	for (i = 0; i < num_planes; ++i) {
-+		struct rcar_du_plane *plane = planes[i];
-+		unsigned int index = plane->hwindex;
-+
-+		prio -= 4;
-+		dspr |= (index + 1) << prio;
-+		dptsr |= DPTSR_PnDK(index) |  DPTSR_PnTS(index);
-+
-+		if (plane->format->planes == 2) {
-+			index = (index + 1) % 8;
-+
-+			prio -= 4;
-+			dspr |= (index + 1) << prio;
-+			dptsr |= DPTSR_PnDK(index) |  DPTSR_PnTS(index);
-+		}
-+	}
-+
-+	/* Select display timing and dot clock generator 2 for planes associated
-+	 * with superposition controller 2.
-+	 */
-+	if (rcrtc->index) {
-+		u32 value = rcar_du_read(rcdu, DPTSR);
-+
-+		/* The DPTSR register is updated when the display controller is
-+		 * stopped. We thus need to restart the DU. Once again, sorry
-+		 * for the flicker. One way to mitigate the issue would be to
-+		 * pre-associate planes with CRTCs (either with a fixed 4/4
-+		 * split, or through a module parameter). Flicker would then
-+		 * occur only if we need to break the pre-association.
-+		 */
-+		if (value != dptsr) {
-+			rcar_du_write(rcdu, DPTSR, dptsr);
-+			if (rcdu->used_crtcs) {
-+				__rcar_du_start_stop(rcdu, false);
-+				__rcar_du_start_stop(rcdu, true);
-+			}
-+		}
-+	}
-+
-+	rcar_du_write(rcdu, rcrtc->index ? DS2PR : DS1PR, dspr);
-+}
-+
-+static void rcar_du_crtc_start(struct rcar_du_crtc *rcrtc)
-+{
-+	struct drm_crtc *crtc = &rcrtc->crtc;
-+	struct rcar_du_device *rcdu = crtc->dev->dev_private;
-+	unsigned int i;
-+
-+	if (rcrtc->started)
-+		return;
-+
-+	if (WARN_ON(rcrtc->plane->format == NULL))
-+		return;
-+
-+	/* Set display off and background to black */
-+	rcar_du_crtc_write(rcrtc, DOOR, DOOR_RGB(0, 0, 0));
-+	rcar_du_crtc_write(rcrtc, BPOR, BPOR_RGB(0, 0, 0));
-+
-+	/* Configure display timings and output routing */
-+	rcar_du_crtc_set_display_timing(rcrtc);
-+	rcar_du_crtc_set_routing(rcrtc);
-+
-+	mutex_lock(&rcdu->planes.lock);
-+	rcrtc->plane->enabled = true;
-+	rcar_du_crtc_update_planes(crtc);
-+	mutex_unlock(&rcdu->planes.lock);
-+
-+	/* Setup planes. */
-+	for (i = 0; i < ARRAY_SIZE(rcdu->planes.planes); ++i) {
-+		struct rcar_du_plane *plane = &rcdu->planes.planes[i];
-+
-+		if (plane->crtc != crtc || !plane->enabled)
-+			continue;
-+
-+		rcar_du_plane_setup(plane);
-+	}
-+
-+	/* Select master sync mode. This enables display operation in master
-+	 * sync mode (with the HSYNC and VSYNC signals configured as outputs and
-+	 * actively driven).
-+	 */
-+	rcar_du_crtc_clr_set(rcrtc, DSYSR, DSYSR_TVM_MASK, DSYSR_TVM_MASTER);
-+
-+	rcar_du_start_stop(rcdu, true);
-+
-+	rcrtc->started = true;
-+}
-+
-+static void rcar_du_crtc_stop(struct rcar_du_crtc *rcrtc)
-+{
-+	struct drm_crtc *crtc = &rcrtc->crtc;
-+	struct rcar_du_device *rcdu = crtc->dev->dev_private;
-+
-+	if (!rcrtc->started)
-+		return;
-+
-+	mutex_lock(&rcdu->planes.lock);
-+	rcrtc->plane->enabled = false;
-+	rcar_du_crtc_update_planes(crtc);
-+	mutex_unlock(&rcdu->planes.lock);
-+
-+	/* Select switch sync mode. This stops display operation and configures
-+	 * the HSYNC and VSYNC signals as inputs.
-+	 */
-+	rcar_du_crtc_clr_set(rcrtc, DSYSR, DSYSR_TVM_MASK, DSYSR_TVM_SWITCH);
-+
-+	rcar_du_start_stop(rcdu, false);
-+
-+	rcrtc->started = false;
-+}
-+
-+void rcar_du_crtc_suspend(struct rcar_du_crtc *rcrtc)
-+{
-+	struct rcar_du_device *rcdu = rcrtc->crtc.dev->dev_private;
-+
-+	rcar_du_crtc_stop(rcrtc);
-+	rcar_du_put(rcdu);
-+}
-+
-+void rcar_du_crtc_resume(struct rcar_du_crtc *rcrtc)
-+{
-+	struct rcar_du_device *rcdu = rcrtc->crtc.dev->dev_private;
-+
-+	if (rcrtc->dpms != DRM_MODE_DPMS_ON)
-+		return;
-+
-+	rcar_du_get(rcdu);
-+	rcar_du_crtc_start(rcrtc);
-+}
-+
-+static void rcar_du_crtc_update_base(struct rcar_du_crtc *rcrtc)
-+{
-+	struct drm_crtc *crtc = &rcrtc->crtc;
-+
-+	rcar_du_plane_compute_base(rcrtc->plane, crtc->fb);
-+	rcar_du_plane_update_base(rcrtc->plane);
-+}
-+
-+static void rcar_du_crtc_dpms(struct drm_crtc *crtc, int mode)
-+{
-+	struct rcar_du_device *rcdu = crtc->dev->dev_private;
-+	struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);
-+
-+	if (rcrtc->dpms == mode)
-+		return;
-+
-+	if (mode == DRM_MODE_DPMS_ON) {
-+		rcar_du_get(rcdu);
-+		rcar_du_crtc_start(rcrtc);
-+	} else {
-+		rcar_du_crtc_stop(rcrtc);
-+		rcar_du_put(rcdu);
-+	}
-+
-+	rcrtc->dpms = mode;
-+}
-+
-+static bool rcar_du_crtc_mode_fixup(struct drm_crtc *crtc,
-+				    const struct drm_display_mode *mode,
-+				    struct drm_display_mode *adjusted_mode)
-+{
-+	/* TODO Fixup modes */
-+	return true;
-+}
-+
-+static void rcar_du_crtc_mode_prepare(struct drm_crtc *crtc)
-+{
-+	struct rcar_du_device *rcdu = crtc->dev->dev_private;
-+	struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);
-+
-+	/* We need to access the hardware during mode set, acquire a reference
-+	 * to the DU.
-+	 */
-+	rcar_du_get(rcdu);
-+
-+	/* Stop the CRTC and release the plane. Force the DPMS mode to off as a
-+	 * result.
-+	 */
-+	rcar_du_crtc_stop(rcrtc);
-+	rcar_du_plane_release(rcrtc->plane);
-+
-+	rcrtc->dpms = DRM_MODE_DPMS_OFF;
-+}
-+
-+static int rcar_du_crtc_mode_set(struct drm_crtc *crtc,
-+				 struct drm_display_mode *mode,
-+				 struct drm_display_mode *adjusted_mode,
-+				 int x, int y,
-+				 struct drm_framebuffer *old_fb)
-+{
-+	struct rcar_du_device *rcdu = crtc->dev->dev_private;
-+	struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);
-+	const struct rcar_du_format_info *format;
-+	int ret;
-+
-+	format = rcar_du_format_info(crtc->fb->pixel_format);
-+	if (format == NULL) {
-+		dev_dbg(rcdu->dev, "mode_set: unsupported format %08x\n",
-+			crtc->fb->pixel_format);
-+		ret = -EINVAL;
-+		goto error;
-+	}
-+
-+	ret = rcar_du_plane_reserve(rcrtc->plane, format);
-+	if (ret < 0)
-+		goto error;
-+
-+	rcrtc->plane->format = format;
-+	rcrtc->plane->pitch = crtc->fb->pitches[0];
-+
-+	rcrtc->plane->src_x = x;
-+	rcrtc->plane->src_y = y;
-+	rcrtc->plane->width = mode->hdisplay;
-+	rcrtc->plane->height = mode->vdisplay;
-+
-+	rcar_du_plane_compute_base(rcrtc->plane, crtc->fb);
-+
-+	rcrtc->outputs = 0;
-+
-+	return 0;
-+
-+error:
-+	/* There's no rollback/abort operation to clean up in case of error. We
-+	 * thus need to release the reference to the DU acquired in prepare()
-+	 * here.
-+	 */
-+	rcar_du_put(rcdu);
-+	return ret;
-+}
-+
-+static void rcar_du_crtc_mode_commit(struct drm_crtc *crtc)
-+{
-+	struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);
-+
-+	/* We're done, restart the CRTC and set the DPMS mode to on. The
-+	 * reference to the DU acquired at prepare() time will thus be released
-+	 * by the DPMS handler (possibly called by the disable() handler).
-+	 */
-+	rcar_du_crtc_start(rcrtc);
-+	rcrtc->dpms = DRM_MODE_DPMS_ON;
-+}
-+
-+static int rcar_du_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
-+				      struct drm_framebuffer *old_fb)
-+{
-+	struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);
-+
-+	rcrtc->plane->src_x = x;
-+	rcrtc->plane->src_y = y;
-+
-+	rcar_du_crtc_update_base(to_rcar_crtc(crtc));
-+
-+	return 0;
-+}
-+
-+static void rcar_du_crtc_disable(struct drm_crtc *crtc)
-+{
-+	struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);
-+
-+	rcar_du_crtc_dpms(crtc, DRM_MODE_DPMS_OFF);
-+	rcar_du_plane_release(rcrtc->plane);
-+}
-+
-+static const struct drm_crtc_helper_funcs crtc_helper_funcs = {
-+	.dpms = rcar_du_crtc_dpms,
-+	.mode_fixup = rcar_du_crtc_mode_fixup,
-+	.prepare = rcar_du_crtc_mode_prepare,
-+	.commit = rcar_du_crtc_mode_commit,
-+	.mode_set = rcar_du_crtc_mode_set,
-+	.mode_set_base = rcar_du_crtc_mode_set_base,
-+	.disable = rcar_du_crtc_disable,
-+};
-+
-+void rcar_du_crtc_cancel_page_flip(struct rcar_du_crtc *rcrtc,
-+				   struct drm_file *file)
-+{
-+	struct drm_pending_vblank_event *event;
-+	struct drm_device *dev = rcrtc->crtc.dev;
-+	unsigned long flags;
-+
-+	/* Destroy the pending vertical blanking event associated with the
-+	 * pending page flip, if any, and disable vertical blanking interrupts.
-+	 */
-+	spin_lock_irqsave(&dev->event_lock, flags);
-+	event = rcrtc->event;
-+	if (event && event->base.file_priv == file) {
-+		rcrtc->event = NULL;
-+		event->base.destroy(&event->base);
-+		drm_vblank_put(dev, rcrtc->index);
-+	}
-+	spin_unlock_irqrestore(&dev->event_lock, flags);
-+}
-+
-+static void rcar_du_crtc_finish_page_flip(struct rcar_du_crtc *rcrtc)
-+{
-+	struct drm_pending_vblank_event *event;
-+	struct drm_device *dev = rcrtc->crtc.dev;
-+	unsigned long flags;
-+
-+	spin_lock_irqsave(&dev->event_lock, flags);
-+	event = rcrtc->event;
-+	rcrtc->event = NULL;
-+	spin_unlock_irqrestore(&dev->event_lock, flags);
-+
-+	if (event == NULL)
-+		return;
-+
-+	spin_lock_irqsave(&dev->event_lock, flags);
-+	drm_send_vblank_event(dev, rcrtc->index, event);
-+	spin_unlock_irqrestore(&dev->event_lock, flags);
-+
-+	drm_vblank_put(dev, rcrtc->index);
-+}
-+
-+static int rcar_du_crtc_page_flip(struct drm_crtc *crtc,
-+				  struct drm_framebuffer *fb,
-+				  struct drm_pending_vblank_event *event)
-+{
-+	struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);
-+	struct drm_device *dev = rcrtc->crtc.dev;
-+	unsigned long flags;
-+
-+	spin_lock_irqsave(&dev->event_lock, flags);
-+	if (rcrtc->event != NULL) {
-+		spin_unlock_irqrestore(&dev->event_lock, flags);
-+		return -EBUSY;
-+	}
-+	spin_unlock_irqrestore(&dev->event_lock, flags);
-+
-+	crtc->fb = fb;
-+	rcar_du_crtc_update_base(rcrtc);
-+
-+	if (event) {
-+		event->pipe = rcrtc->index;
-+		drm_vblank_get(dev, rcrtc->index);
-+		spin_lock_irqsave(&dev->event_lock, flags);
-+		rcrtc->event = event;
-+		spin_unlock_irqrestore(&dev->event_lock, flags);
-+	}
-+
-+	return 0;
-+}
-+
-+static const struct drm_crtc_funcs crtc_funcs = {
-+	.destroy = drm_crtc_cleanup,
-+	.set_config = drm_crtc_helper_set_config,
-+	.page_flip = rcar_du_crtc_page_flip,
-+};
-+
-+int rcar_du_crtc_create(struct rcar_du_device *rcdu, unsigned int index)
-+{
-+	struct rcar_du_crtc *rcrtc = &rcdu->crtcs[index];
-+	struct drm_crtc *crtc = &rcrtc->crtc;
-+	int ret;
-+
-+	rcrtc->mmio_offset = index ? DISP2_REG_OFFSET : 0;
-+	rcrtc->index = index;
-+	rcrtc->dpms = DRM_MODE_DPMS_OFF;
-+	rcrtc->plane = &rcdu->planes.planes[index];
-+
-+	rcrtc->plane->crtc = crtc;
-+
-+	ret = drm_crtc_init(rcdu->ddev, crtc, &crtc_funcs);
-+	if (ret < 0)
-+		return ret;
-+
-+	drm_crtc_helper_add(crtc, &crtc_helper_funcs);
-+
-+	return 0;
-+}
-+
-+void rcar_du_crtc_enable_vblank(struct rcar_du_crtc *rcrtc, bool enable)
-+{
-+	if (enable) {
-+		rcar_du_crtc_write(rcrtc, DSRCR, DSRCR_VBCL);
-+		rcar_du_crtc_set(rcrtc, DIER, DIER_VBE);
-+	} else {
-+		rcar_du_crtc_clr(rcrtc, DIER, DIER_VBE);
-+	}
-+}
-+
-+void rcar_du_crtc_irq(struct rcar_du_crtc *rcrtc)
-+{
-+	u32 status;
-+
-+	status = rcar_du_crtc_read(rcrtc, DSSR);
-+	rcar_du_crtc_write(rcrtc, DSRCR, status & DSRCR_MASK);
-+
-+	if (status & DSSR_VBK) {
-+		drm_handle_vblank(rcrtc->crtc.dev, rcrtc->index);
-+		rcar_du_crtc_finish_page_flip(rcrtc);
-+	}
-+}
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.h b/drivers/gpu/drm/rcar-du/rcar_du_crtc.h
-new file mode 100644
-index 000000000000..2a0365bcbd14
---- /dev/null
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.h
-@@ -0,0 +1,50 @@
-+/*
-+ * rcar_du_crtc.h  --  R-Car Display Unit CRTCs
-+ *
-+ * Copyright (C) 2013 Renesas Corporation
-+ *
-+ * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ */
-+
-+#ifndef __RCAR_DU_CRTC_H__
-+#define __RCAR_DU_CRTC_H__
-+
-+#include <linux/mutex.h>
-+
-+#include <drm/drmP.h>
-+#include <drm/drm_crtc.h>
-+
-+struct rcar_du_device;
-+struct rcar_du_plane;
-+
-+struct rcar_du_crtc {
-+	struct drm_crtc crtc;
-+
-+	unsigned int mmio_offset;
-+	unsigned int index;
-+	bool started;
-+
-+	struct drm_pending_vblank_event *event;
-+	unsigned int outputs;
-+	int dpms;
-+
-+	struct rcar_du_plane *plane;
-+};
-+
-+int rcar_du_crtc_create(struct rcar_du_device *rcdu, unsigned int index);
-+void rcar_du_crtc_enable_vblank(struct rcar_du_crtc *rcrtc, bool enable);
-+void rcar_du_crtc_irq(struct rcar_du_crtc *rcrtc);
-+void rcar_du_crtc_cancel_page_flip(struct rcar_du_crtc *rcrtc,
-+				   struct drm_file *file);
-+void rcar_du_crtc_suspend(struct rcar_du_crtc *rcrtc);
-+void rcar_du_crtc_resume(struct rcar_du_crtc *rcrtc);
-+
-+void rcar_du_crtc_route_output(struct drm_crtc *crtc, unsigned int output);
-+void rcar_du_crtc_update_planes(struct drm_crtc *crtc);
-+
-+#endif /* __RCAR_DU_CRTC_H__ */
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.c b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-new file mode 100644
-index 000000000000..003b34ee38e3
---- /dev/null
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-@@ -0,0 +1,325 @@
-+/*
-+ * rcar_du_drv.c  --  R-Car Display Unit DRM driver
-+ *
-+ * Copyright (C) 2013 Renesas Corporation
-+ *
-+ * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ */
-+
-+#include <linux/clk.h>
-+#include <linux/io.h>
-+#include <linux/mm.h>
-+#include <linux/module.h>
-+#include <linux/platform_device.h>
-+#include <linux/pm.h>
-+#include <linux/slab.h>
-+
-+#include <drm/drmP.h>
-+#include <drm/drm_crtc_helper.h>
-+#include <drm/drm_gem_cma_helper.h>
-+
-+#include "rcar_du_crtc.h"
-+#include "rcar_du_drv.h"
-+#include "rcar_du_kms.h"
-+#include "rcar_du_regs.h"
-+
-+/* -----------------------------------------------------------------------------
-+ * Core device operations
-+ */
-+
-+/*
-+ * rcar_du_get - Acquire a reference to the DU
-+ *
-+ * Acquiring a reference enables the device clock and setup core registers. A
-+ * reference must be held before accessing any hardware registers.
-+ *
-+ * This function must be called with the DRM mode_config lock held.
-+ *
-+ * Return 0 in case of success or a negative error code otherwise.
-+ */
-+int rcar_du_get(struct rcar_du_device *rcdu)
-+{
-+	int ret;
-+
-+	if (rcdu->use_count)
-+		goto done;
-+
-+	/* Enable clocks before accessing the hardware. */
-+	ret = clk_prepare_enable(rcdu->clock);
-+	if (ret < 0)
-+		return ret;
-+
-+	/* Enable extended features */
-+	rcar_du_write(rcdu, DEFR, DEFR_CODE | DEFR_DEFE);
-+	rcar_du_write(rcdu, DEFR2, DEFR2_CODE | DEFR2_DEFE2G);
-+	rcar_du_write(rcdu, DEFR3, DEFR3_CODE | DEFR3_DEFE3);
-+	rcar_du_write(rcdu, DEFR4, DEFR4_CODE);
-+	rcar_du_write(rcdu, DEFR5, DEFR5_CODE | DEFR5_DEFE5);
-+
-+	/* Use DS1PR and DS2PR to configure planes priorities and connects the
-+	 * superposition 0 to DU0 pins. DU1 pins will be configured dynamically.
-+	 */
-+	rcar_du_write(rcdu, DORCR, DORCR_PG1D_DS1 | DORCR_DPRS);
-+
-+done:
-+	rcdu->use_count++;
-+	return 0;
-+}
-+
-+/*
-+ * rcar_du_put - Release a reference to the DU
-+ *
-+ * Releasing the last reference disables the device clock.
-+ *
-+ * This function must be called with the DRM mode_config lock held.
-+ */
-+void rcar_du_put(struct rcar_du_device *rcdu)
-+{
-+	if (--rcdu->use_count)
-+		return;
-+
-+	clk_disable_unprepare(rcdu->clock);
-+}
-+
-+/* -----------------------------------------------------------------------------
-+ * DRM operations
-+ */
-+
-+static int rcar_du_unload(struct drm_device *dev)
-+{
-+	drm_kms_helper_poll_fini(dev);
-+	drm_mode_config_cleanup(dev);
-+	drm_vblank_cleanup(dev);
-+	drm_irq_uninstall(dev);
-+
-+	dev->dev_private = NULL;
-+
-+	return 0;
-+}
-+
-+static int rcar_du_load(struct drm_device *dev, unsigned long flags)
-+{
-+	struct platform_device *pdev = dev->platformdev;
-+	struct rcar_du_platform_data *pdata = pdev->dev.platform_data;
-+	struct rcar_du_device *rcdu;
-+	struct resource *ioarea;
-+	struct resource *mem;
-+	int ret;
-+
-+	if (pdata == NULL) {
-+		dev_err(dev->dev, "no platform data\n");
-+		return -ENODEV;
-+	}
-+
-+	rcdu = devm_kzalloc(&pdev->dev, sizeof(*rcdu), GFP_KERNEL);
-+	if (rcdu == NULL) {
-+		dev_err(dev->dev, "failed to allocate private data\n");
-+		return -ENOMEM;
-+	}
-+
-+	rcdu->dev = &pdev->dev;
-+	rcdu->pdata = pdata;
-+	rcdu->ddev = dev;
-+	dev->dev_private = rcdu;
-+
-+	/* I/O resources and clocks */
-+	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+	if (mem == NULL) {
-+		dev_err(&pdev->dev, "failed to get memory resource\n");
-+		return -EINVAL;
-+	}
-+
-+	ioarea = devm_request_mem_region(&pdev->dev, mem->start,
-+					 resource_size(mem), pdev->name);
-+	if (ioarea == NULL) {
-+		dev_err(&pdev->dev, "failed to request memory region\n");
-+		return -EBUSY;
-+	}
-+
-+	rcdu->mmio = devm_ioremap_nocache(&pdev->dev, ioarea->start,
-+					  resource_size(ioarea));
-+	if (rcdu->mmio == NULL) {
-+		dev_err(&pdev->dev, "failed to remap memory resource\n");
-+		return -ENOMEM;
-+	}
-+
-+	rcdu->clock = devm_clk_get(&pdev->dev, NULL);
-+	if (IS_ERR(rcdu->clock)) {
-+		dev_err(&pdev->dev, "failed to get clock\n");
-+		return -ENOENT;
-+	}
-+
-+	/* DRM/KMS objects */
-+	ret = rcar_du_modeset_init(rcdu);
-+	if (ret < 0) {
-+		dev_err(&pdev->dev, "failed to initialize DRM/KMS\n");
-+		goto done;
-+	}
-+
-+	/* IRQ and vblank handling */
-+	ret = drm_vblank_init(dev, (1 << rcdu->num_crtcs) - 1);
-+	if (ret < 0) {
-+		dev_err(&pdev->dev, "failed to initialize vblank\n");
-+		goto done;
-+	}
-+
-+	ret = drm_irq_install(dev);
-+	if (ret < 0) {
-+		dev_err(&pdev->dev, "failed to install IRQ handler\n");
-+		goto done;
-+	}
-+
-+	platform_set_drvdata(pdev, rcdu);
-+
-+done:
-+	if (ret)
-+		rcar_du_unload(dev);
-+
-+	return ret;
-+}
-+
-+static void rcar_du_preclose(struct drm_device *dev, struct drm_file *file)
-+{
-+	struct rcar_du_device *rcdu = dev->dev_private;
-+	unsigned int i;
-+
-+	for (i = 0; i < ARRAY_SIZE(rcdu->crtcs); ++i)
-+		rcar_du_crtc_cancel_page_flip(&rcdu->crtcs[i], file);
-+}
-+
-+static irqreturn_t rcar_du_irq(int irq, void *arg)
-+{
-+	struct drm_device *dev = arg;
-+	struct rcar_du_device *rcdu = dev->dev_private;
-+	unsigned int i;
-+
-+	for (i = 0; i < ARRAY_SIZE(rcdu->crtcs); ++i)
-+		rcar_du_crtc_irq(&rcdu->crtcs[i]);
-+
-+	return IRQ_HANDLED;
-+}
-+
-+static int rcar_du_enable_vblank(struct drm_device *dev, int crtc)
-+{
-+	struct rcar_du_device *rcdu = dev->dev_private;
-+
-+	rcar_du_crtc_enable_vblank(&rcdu->crtcs[crtc], true);
-+
-+	return 0;
-+}
-+
-+static void rcar_du_disable_vblank(struct drm_device *dev, int crtc)
-+{
-+	struct rcar_du_device *rcdu = dev->dev_private;
-+
-+	rcar_du_crtc_enable_vblank(&rcdu->crtcs[crtc], false);
-+}
-+
-+static const struct file_operations rcar_du_fops = {
-+	.owner		= THIS_MODULE,
-+	.open		= drm_open,
-+	.release	= drm_release,
-+	.unlocked_ioctl	= drm_ioctl,
-+#ifdef CONFIG_COMPAT
-+	.compat_ioctl	= drm_compat_ioctl,
-+#endif
-+	.poll		= drm_poll,
-+	.read		= drm_read,
-+	.fasync		= drm_fasync,
-+	.llseek		= no_llseek,
-+	.mmap		= drm_gem_cma_mmap,
-+};
-+
-+static struct drm_driver rcar_du_driver = {
-+	.driver_features	= DRIVER_HAVE_IRQ | DRIVER_GEM | DRIVER_MODESET
-+				| DRIVER_PRIME,
-+	.load			= rcar_du_load,
-+	.unload			= rcar_du_unload,
-+	.preclose		= rcar_du_preclose,
-+	.irq_handler		= rcar_du_irq,
-+	.get_vblank_counter	= drm_vblank_count,
-+	.enable_vblank		= rcar_du_enable_vblank,
-+	.disable_vblank		= rcar_du_disable_vblank,
-+	.gem_free_object	= drm_gem_cma_free_object,
-+	.gem_vm_ops		= &drm_gem_cma_vm_ops,
-+	.prime_handle_to_fd	= drm_gem_prime_handle_to_fd,
-+	.prime_fd_to_handle	= drm_gem_prime_fd_to_handle,
-+	.gem_prime_import	= drm_gem_cma_dmabuf_import,
-+	.gem_prime_export	= drm_gem_cma_dmabuf_export,
-+	.dumb_create		= drm_gem_cma_dumb_create,
-+	.dumb_map_offset	= drm_gem_cma_dumb_map_offset,
-+	.dumb_destroy		= drm_gem_cma_dumb_destroy,
-+	.fops			= &rcar_du_fops,
-+	.name			= "rcar-du",
-+	.desc			= "Renesas R-Car Display Unit",
-+	.date			= "20130110",
-+	.major			= 1,
-+	.minor			= 0,
-+};
-+
-+/* -----------------------------------------------------------------------------
-+ * Power management
-+ */
-+
-+#if CONFIG_PM_SLEEP
-+static int rcar_du_pm_suspend(struct device *dev)
-+{
-+	struct rcar_du_device *rcdu = dev_get_drvdata(dev);
-+
-+	drm_kms_helper_poll_disable(rcdu->ddev);
-+	/* TODO Suspend the CRTC */
-+
-+	return 0;
-+}
-+
-+static int rcar_du_pm_resume(struct device *dev)
-+{
-+	struct rcar_du_device *rcdu = dev_get_drvdata(dev);
-+
-+	/* TODO Resume the CRTC */
-+
-+	drm_kms_helper_poll_enable(rcdu->ddev);
-+	return 0;
-+}
-+#endif
-+
-+static const struct dev_pm_ops rcar_du_pm_ops = {
-+	SET_SYSTEM_SLEEP_PM_OPS(rcar_du_pm_suspend, rcar_du_pm_resume)
-+};
-+
-+/* -----------------------------------------------------------------------------
-+ * Platform driver
-+ */
-+
-+static int rcar_du_probe(struct platform_device *pdev)
-+{
-+	return drm_platform_init(&rcar_du_driver, pdev);
-+}
-+
-+static int rcar_du_remove(struct platform_device *pdev)
-+{
-+	drm_platform_exit(&rcar_du_driver, pdev);
-+
-+	return 0;
-+}
-+
-+static struct platform_driver rcar_du_platform_driver = {
-+	.probe		= rcar_du_probe,
-+	.remove		= rcar_du_remove,
-+	.driver		= {
-+		.owner	= THIS_MODULE,
-+		.name	= "rcar-du",
-+		.pm	= &rcar_du_pm_ops,
-+	},
-+};
-+
-+module_platform_driver(rcar_du_platform_driver);
-+
-+MODULE_AUTHOR("Laurent Pinchart <laurent.pinchart@ideasonboard.com>");
-+MODULE_DESCRIPTION("Renesas R-Car Display Unit DRM Driver");
-+MODULE_LICENSE("GPL");
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.h b/drivers/gpu/drm/rcar-du/rcar_du_drv.h
-new file mode 100644
-index 000000000000..193cc59d495c
---- /dev/null
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.h
-@@ -0,0 +1,66 @@
-+/*
-+ * rcar_du_drv.h  --  R-Car Display Unit DRM driver
-+ *
-+ * Copyright (C) 2013 Renesas Corporation
-+ *
-+ * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ */
-+
-+#ifndef __RCAR_DU_DRV_H__
-+#define __RCAR_DU_DRV_H__
-+
-+#include <linux/kernel.h>
-+#include <linux/mutex.h>
-+#include <linux/platform_data/rcar-du.h>
-+
-+#include "rcar_du_crtc.h"
-+#include "rcar_du_plane.h"
-+
-+struct clk;
-+struct device;
-+struct drm_device;
-+
-+struct rcar_du_device {
-+	struct device *dev;
-+	const struct rcar_du_platform_data *pdata;
-+
-+	void __iomem *mmio;
-+	struct clk *clock;
-+	unsigned int use_count;
-+
-+	struct drm_device *ddev;
-+
-+	struct rcar_du_crtc crtcs[2];
-+	unsigned int used_crtcs;
-+	unsigned int num_crtcs;
-+
-+	struct {
-+		struct rcar_du_plane planes[RCAR_DU_NUM_SW_PLANES];
-+		unsigned int free;
-+		struct mutex lock;
-+
-+		struct drm_property *alpha;
-+		struct drm_property *colorkey;
-+		struct drm_property *zpos;
-+	} planes;
-+};
-+
-+int rcar_du_get(struct rcar_du_device *rcdu);
-+void rcar_du_put(struct rcar_du_device *rcdu);
-+
-+static inline u32 rcar_du_read(struct rcar_du_device *rcdu, u32 reg)
-+{
-+	return ioread32(rcdu->mmio + reg);
-+}
-+
-+static inline void rcar_du_write(struct rcar_du_device *rcdu, u32 reg, u32 data)
-+{
-+	iowrite32(data, rcdu->mmio + reg);
-+}
-+
-+#endif /* __RCAR_DU_DRV_H__ */
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms.c b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
-new file mode 100644
-index 000000000000..9c63f39658de
---- /dev/null
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
-@@ -0,0 +1,245 @@
-+/*
-+ * rcar_du_kms.c  --  R-Car Display Unit Mode Setting
-+ *
-+ * Copyright (C) 2013 Renesas Corporation
-+ *
-+ * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ */
-+
-+#include <drm/drmP.h>
-+#include <drm/drm_crtc.h>
-+#include <drm/drm_crtc_helper.h>
-+#include <drm/drm_fb_cma_helper.h>
-+#include <drm/drm_gem_cma_helper.h>
-+
-+#include "rcar_du_crtc.h"
-+#include "rcar_du_drv.h"
-+#include "rcar_du_kms.h"
-+#include "rcar_du_lvds.h"
-+#include "rcar_du_regs.h"
-+#include "rcar_du_vga.h"
-+
-+/* -----------------------------------------------------------------------------
-+ * Format helpers
-+ */
-+
-+static const struct rcar_du_format_info rcar_du_format_infos[] = {
-+	{
-+		.fourcc = DRM_FORMAT_RGB565,
-+		.bpp = 16,
-+		.planes = 1,
-+		.pnmr = PnMR_SPIM_TP | PnMR_DDDF_16BPP,
-+		.edf = PnDDCR4_EDF_NONE,
-+	}, {
-+		.fourcc = DRM_FORMAT_ARGB1555,
-+		.bpp = 16,
-+		.planes = 1,
-+		.pnmr = PnMR_SPIM_ALP | PnMR_DDDF_ARGB,
-+		.edf = PnDDCR4_EDF_NONE,
-+	}, {
-+		.fourcc = DRM_FORMAT_XRGB1555,
-+		.bpp = 16,
-+		.planes = 1,
-+		.pnmr = PnMR_SPIM_ALP | PnMR_DDDF_ARGB,
-+		.edf = PnDDCR4_EDF_NONE,
-+	}, {
-+		.fourcc = DRM_FORMAT_XRGB8888,
-+		.bpp = 32,
-+		.planes = 1,
-+		.pnmr = PnMR_SPIM_TP | PnMR_DDDF_16BPP,
-+		.edf = PnDDCR4_EDF_RGB888,
-+	}, {
-+		.fourcc = DRM_FORMAT_ARGB8888,
-+		.bpp = 32,
-+		.planes = 1,
-+		.pnmr = PnMR_SPIM_ALP | PnMR_DDDF_16BPP,
-+		.edf = PnDDCR4_EDF_ARGB8888,
-+	}, {
-+		.fourcc = DRM_FORMAT_UYVY,
-+		.bpp = 16,
-+		.planes = 1,
-+		.pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
-+		.edf = PnDDCR4_EDF_NONE,
-+	}, {
-+		.fourcc = DRM_FORMAT_YUYV,
-+		.bpp = 16,
-+		.planes = 1,
-+		.pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
-+		.edf = PnDDCR4_EDF_NONE,
-+	}, {
-+		.fourcc = DRM_FORMAT_NV12,
-+		.bpp = 12,
-+		.planes = 2,
-+		.pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
-+		.edf = PnDDCR4_EDF_NONE,
-+	}, {
-+		.fourcc = DRM_FORMAT_NV21,
-+		.bpp = 12,
-+		.planes = 2,
-+		.pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
-+		.edf = PnDDCR4_EDF_NONE,
-+	}, {
-+		/* In YUV 4:2:2, only NV16 is supported (NV61 isn't) */
-+		.fourcc = DRM_FORMAT_NV16,
-+		.bpp = 16,
-+		.planes = 2,
-+		.pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
-+		.edf = PnDDCR4_EDF_NONE,
-+	},
-+};
-+
-+const struct rcar_du_format_info *rcar_du_format_info(u32 fourcc)
-+{
-+	unsigned int i;
-+
-+	for (i = 0; i < ARRAY_SIZE(rcar_du_format_infos); ++i) {
-+		if (rcar_du_format_infos[i].fourcc == fourcc)
-+			return &rcar_du_format_infos[i];
-+	}
-+
-+	return NULL;
-+}
-+
-+/* -----------------------------------------------------------------------------
-+ * Common connector and encoder functions
-+ */
-+
-+struct drm_encoder *
-+rcar_du_connector_best_encoder(struct drm_connector *connector)
-+{
-+	struct rcar_du_connector *rcon = to_rcar_connector(connector);
-+
-+	return &rcon->encoder->encoder;
-+}
-+
-+void rcar_du_encoder_mode_prepare(struct drm_encoder *encoder)
-+{
-+}
-+
-+void rcar_du_encoder_mode_set(struct drm_encoder *encoder,
-+			      struct drm_display_mode *mode,
-+			      struct drm_display_mode *adjusted_mode)
-+{
-+	struct rcar_du_encoder *renc = to_rcar_encoder(encoder);
-+
-+	rcar_du_crtc_route_output(encoder->crtc, renc->output);
-+}
-+
-+void rcar_du_encoder_mode_commit(struct drm_encoder *encoder)
-+{
-+}
-+
-+/* -----------------------------------------------------------------------------
-+ * Frame buffer
-+ */
-+
-+static struct drm_framebuffer *
-+rcar_du_fb_create(struct drm_device *dev, struct drm_file *file_priv,
-+		  struct drm_mode_fb_cmd2 *mode_cmd)
-+{
-+	const struct rcar_du_format_info *format;
-+
-+	format = rcar_du_format_info(mode_cmd->pixel_format);
-+	if (format == NULL) {
-+		dev_dbg(dev->dev, "unsupported pixel format %08x\n",
-+			mode_cmd->pixel_format);
-+		return ERR_PTR(-EINVAL);
-+	}
-+
-+	if (mode_cmd->pitches[0] & 15 || mode_cmd->pitches[0] >= 8192) {
-+		dev_dbg(dev->dev, "invalid pitch value %u\n",
-+			mode_cmd->pitches[0]);
-+		return ERR_PTR(-EINVAL);
-+	}
-+
-+	if (format->planes == 2) {
-+		if (mode_cmd->pitches[1] != mode_cmd->pitches[0]) {
-+			dev_dbg(dev->dev,
-+				"luma and chroma pitches do not match\n");
-+			return ERR_PTR(-EINVAL);
-+		}
-+	}
-+
-+	return drm_fb_cma_create(dev, file_priv, mode_cmd);
-+}
-+
-+static const struct drm_mode_config_funcs rcar_du_mode_config_funcs = {
-+	.fb_create = rcar_du_fb_create,
-+};
-+
-+int rcar_du_modeset_init(struct rcar_du_device *rcdu)
-+{
-+	struct drm_device *dev = rcdu->ddev;
-+	struct drm_encoder *encoder;
-+	unsigned int i;
-+	int ret;
-+
-+	drm_mode_config_init(rcdu->ddev);
-+
-+	rcdu->ddev->mode_config.min_width = 0;
-+	rcdu->ddev->mode_config.min_height = 0;
-+	rcdu->ddev->mode_config.max_width = 4095;
-+	rcdu->ddev->mode_config.max_height = 2047;
-+	rcdu->ddev->mode_config.funcs = &rcar_du_mode_config_funcs;
-+
-+	ret = rcar_du_plane_init(rcdu);
-+	if (ret < 0)
-+		return ret;
-+
-+	for (i = 0; i < ARRAY_SIZE(rcdu->crtcs); ++i)
-+		rcar_du_crtc_create(rcdu, i);
-+
-+	rcdu->used_crtcs = 0;
-+	rcdu->num_crtcs = i;
-+
-+	for (i = 0; i < rcdu->pdata->num_encoders; ++i) {
-+		const struct rcar_du_encoder_data *pdata =
-+			&rcdu->pdata->encoders[i];
-+
-+		if (pdata->output >= ARRAY_SIZE(rcdu->crtcs)) {
-+			dev_warn(rcdu->dev,
-+				 "encoder %u references unexisting output %u, skipping\n",
-+				 i, pdata->output);
-+			continue;
-+		}
-+
-+		switch (pdata->encoder) {
-+		case RCAR_DU_ENCODER_VGA:
-+			rcar_du_vga_init(rcdu, &pdata->u.vga, pdata->output);
-+			break;
-+
-+		case RCAR_DU_ENCODER_LVDS:
-+			rcar_du_lvds_init(rcdu, &pdata->u.lvds, pdata->output);
-+			break;
-+
-+		default:
-+			break;
-+		}
-+	}
-+
-+	/* Set the possible CRTCs and possible clones. All encoders can be
-+	 * driven by the CRTC associated with the output they're connected to,
-+	 * as well as by CRTC 0.
-+	 */
-+	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
-+		struct rcar_du_encoder *renc = to_rcar_encoder(encoder);
-+
-+		encoder->possible_crtcs = (1 << 0) | (1 << renc->output);
-+		encoder->possible_clones = 1 << 0;
-+	}
-+
-+	ret = rcar_du_plane_register(rcdu);
-+	if (ret < 0)
-+		return ret;
-+
-+	drm_kms_helper_poll_init(rcdu->ddev);
-+
-+	drm_helper_disable_unused_functions(rcdu->ddev);
-+
-+	return 0;
-+}
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms.h b/drivers/gpu/drm/rcar-du/rcar_du_kms.h
-new file mode 100644
-index 000000000000..e4d8db069a06
---- /dev/null
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_kms.h
-@@ -0,0 +1,59 @@
-+/*
-+ * rcar_du_kms.h  --  R-Car Display Unit Mode Setting
-+ *
-+ * Copyright (C) 2013 Renesas Corporation
-+ *
-+ * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ */
-+
-+#ifndef __RCAR_DU_KMS_H__
-+#define __RCAR_DU_KMS_H__
-+
-+#include <linux/types.h>
-+
-+#include <drm/drm_crtc.h>
-+
-+struct rcar_du_device;
-+
-+struct rcar_du_format_info {
-+	u32 fourcc;
-+	unsigned int bpp;
-+	unsigned int planes;
-+	unsigned int pnmr;
-+	unsigned int edf;
-+};
-+
-+struct rcar_du_encoder {
-+	struct drm_encoder encoder;
-+	unsigned int output;
-+};
-+
-+#define to_rcar_encoder(e) \
-+	container_of(e, struct rcar_du_encoder, encoder)
-+
-+struct rcar_du_connector {
-+	struct drm_connector connector;
-+	struct rcar_du_encoder *encoder;
-+};
-+
-+#define to_rcar_connector(c) \
-+	container_of(c, struct rcar_du_connector, connector)
-+
-+const struct rcar_du_format_info *rcar_du_format_info(u32 fourcc);
-+
-+struct drm_encoder *
-+rcar_du_connector_best_encoder(struct drm_connector *connector);
-+void rcar_du_encoder_mode_prepare(struct drm_encoder *encoder);
-+void rcar_du_encoder_mode_set(struct drm_encoder *encoder,
-+			      struct drm_display_mode *mode,
-+			      struct drm_display_mode *adjusted_mode);
-+void rcar_du_encoder_mode_commit(struct drm_encoder *encoder);
-+
-+int rcar_du_modeset_init(struct rcar_du_device *rcdu);
-+
-+#endif /* __RCAR_DU_KMS_H__ */
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_lvds.c b/drivers/gpu/drm/rcar-du/rcar_du_lvds.c
-new file mode 100644
-index 000000000000..7aefe7267e1d
---- /dev/null
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_lvds.c
-@@ -0,0 +1,216 @@
-+/*
-+ * rcar_du_lvds.c  --  R-Car Display Unit LVDS Encoder and Connector
-+ *
-+ * Copyright (C) 2013 Renesas Corporation
-+ *
-+ * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ */
-+
-+#include <drm/drmP.h>
-+#include <drm/drm_crtc.h>
-+#include <drm/drm_crtc_helper.h>
-+
-+#include "rcar_du_drv.h"
-+#include "rcar_du_kms.h"
-+#include "rcar_du_lvds.h"
-+
-+struct rcar_du_lvds_connector {
-+	struct rcar_du_connector connector;
-+
-+	const struct rcar_du_panel_data *panel;
-+};
-+
-+#define to_rcar_lvds_connector(c) \
-+	container_of(c, struct rcar_du_lvds_connector, connector.connector)
-+
-+/* -----------------------------------------------------------------------------
-+ * Connector
-+ */
-+
-+static int rcar_du_lvds_connector_get_modes(struct drm_connector *connector)
-+{
-+	struct rcar_du_lvds_connector *lvdscon = to_rcar_lvds_connector(connector);
-+	struct drm_display_mode *mode;
-+
-+	mode = drm_mode_create(connector->dev);
-+	if (mode == NULL)
-+		return 0;
-+
-+	mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER;
-+	mode->clock = lvdscon->panel->mode.clock;
-+	mode->hdisplay = lvdscon->panel->mode.hdisplay;
-+	mode->hsync_start = lvdscon->panel->mode.hsync_start;
-+	mode->hsync_end = lvdscon->panel->mode.hsync_end;
-+	mode->htotal = lvdscon->panel->mode.htotal;
-+	mode->vdisplay = lvdscon->panel->mode.vdisplay;
-+	mode->vsync_start = lvdscon->panel->mode.vsync_start;
-+	mode->vsync_end = lvdscon->panel->mode.vsync_end;
-+	mode->vtotal = lvdscon->panel->mode.vtotal;
-+	mode->flags = lvdscon->panel->mode.flags;
-+
-+	drm_mode_set_name(mode);
-+	drm_mode_probed_add(connector, mode);
-+
-+	return 1;
-+}
-+
-+static int rcar_du_lvds_connector_mode_valid(struct drm_connector *connector,
-+					    struct drm_display_mode *mode)
-+{
-+	return MODE_OK;
-+}
-+
-+static const struct drm_connector_helper_funcs connector_helper_funcs = {
-+	.get_modes = rcar_du_lvds_connector_get_modes,
-+	.mode_valid = rcar_du_lvds_connector_mode_valid,
-+	.best_encoder = rcar_du_connector_best_encoder,
-+};
-+
-+static void rcar_du_lvds_connector_destroy(struct drm_connector *connector)
-+{
-+	drm_sysfs_connector_remove(connector);
-+	drm_connector_cleanup(connector);
-+}
-+
-+static enum drm_connector_status
-+rcar_du_lvds_connector_detect(struct drm_connector *connector, bool force)
-+{
-+	return connector_status_connected;
-+}
-+
-+static const struct drm_connector_funcs connector_funcs = {
-+	.dpms = drm_helper_connector_dpms,
-+	.detect = rcar_du_lvds_connector_detect,
-+	.fill_modes = drm_helper_probe_single_connector_modes,
-+	.destroy = rcar_du_lvds_connector_destroy,
-+};
-+
-+static int rcar_du_lvds_connector_init(struct rcar_du_device *rcdu,
-+				       struct rcar_du_encoder *renc,
-+				       const struct rcar_du_panel_data *panel)
-+{
-+	struct rcar_du_lvds_connector *lvdscon;
-+	struct drm_connector *connector;
-+	int ret;
-+
-+	lvdscon = devm_kzalloc(rcdu->dev, sizeof(*lvdscon), GFP_KERNEL);
-+	if (lvdscon == NULL)
-+		return -ENOMEM;
-+
-+	lvdscon->panel = panel;
-+
-+	connector = &lvdscon->connector.connector;
-+	connector->display_info.width_mm = panel->width_mm;
-+	connector->display_info.height_mm = panel->height_mm;
-+
-+	ret = drm_connector_init(rcdu->ddev, connector, &connector_funcs,
-+				 DRM_MODE_CONNECTOR_LVDS);
-+	if (ret < 0)
-+		return ret;
-+
-+	drm_connector_helper_add(connector, &connector_helper_funcs);
-+	ret = drm_sysfs_connector_add(connector);
-+	if (ret < 0)
-+		return ret;
-+
-+	drm_helper_connector_dpms(connector, DRM_MODE_DPMS_OFF);
-+	drm_object_property_set_value(&connector->base,
-+		rcdu->ddev->mode_config.dpms_property, DRM_MODE_DPMS_OFF);
-+
-+	ret = drm_mode_connector_attach_encoder(connector, &renc->encoder);
-+	if (ret < 0)
-+		return ret;
-+
-+	connector->encoder = &renc->encoder;
-+	lvdscon->connector.encoder = renc;
-+
-+	return 0;
-+}
-+
-+/* -----------------------------------------------------------------------------
-+ * Encoder
-+ */
-+
-+static void rcar_du_lvds_encoder_dpms(struct drm_encoder *encoder, int mode)
-+{
-+}
-+
-+static bool rcar_du_lvds_encoder_mode_fixup(struct drm_encoder *encoder,
-+					   const struct drm_display_mode *mode,
-+					   struct drm_display_mode *adjusted_mode)
-+{
-+	const struct drm_display_mode *panel_mode;
-+	struct drm_device *dev = encoder->dev;
-+	struct drm_connector *connector;
-+	bool found = false;
-+
-+	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
-+		if (connector->encoder == encoder) {
-+			found = true;
-+			break;
-+		}
-+	}
-+
-+	if (!found) {
-+		dev_dbg(dev->dev, "mode_fixup: no connector found\n");
-+		return false;
-+	}
-+
-+	if (list_empty(&connector->modes)) {
-+		dev_dbg(dev->dev, "mode_fixup: empty modes list\n");
-+		return false;
-+	}
-+
-+	panel_mode = list_first_entry(&connector->modes,
-+				      struct drm_display_mode, head);
-+
-+	/* We're not allowed to modify the resolution. */
-+	if (mode->hdisplay != panel_mode->hdisplay ||
-+	    mode->vdisplay != panel_mode->vdisplay)
-+		return false;
-+
-+	/* The flat panel mode is fixed, just copy it to the adjusted mode. */
-+	drm_mode_copy(adjusted_mode, panel_mode);
-+
-+	return true;
-+}
-+
-+static const struct drm_encoder_helper_funcs encoder_helper_funcs = {
-+	.dpms = rcar_du_lvds_encoder_dpms,
-+	.mode_fixup = rcar_du_lvds_encoder_mode_fixup,
-+	.prepare = rcar_du_encoder_mode_prepare,
-+	.commit = rcar_du_encoder_mode_commit,
-+	.mode_set = rcar_du_encoder_mode_set,
-+};
-+
-+static const struct drm_encoder_funcs encoder_funcs = {
-+	.destroy = drm_encoder_cleanup,
-+};
-+
-+int rcar_du_lvds_init(struct rcar_du_device *rcdu,
-+		      const struct rcar_du_encoder_lvds_data *data,
-+		      unsigned int output)
-+{
-+	struct rcar_du_encoder *renc;
-+	int ret;
-+
-+	renc = devm_kzalloc(rcdu->dev, sizeof(*renc), GFP_KERNEL);
-+	if (renc == NULL)
-+		return -ENOMEM;
-+
-+	renc->output = output;
-+
-+	ret = drm_encoder_init(rcdu->ddev, &renc->encoder, &encoder_funcs,
-+			       DRM_MODE_ENCODER_LVDS);
-+	if (ret < 0)
-+		return ret;
-+
-+	drm_encoder_helper_add(&renc->encoder, &encoder_helper_funcs);
-+
-+	return rcar_du_lvds_connector_init(rcdu, renc, &data->panel);
-+}
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_lvds.h b/drivers/gpu/drm/rcar-du/rcar_du_lvds.h
-new file mode 100644
-index 000000000000..b47f8328e103
---- /dev/null
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_lvds.h
-@@ -0,0 +1,24 @@
-+/*
-+ * rcar_du_lvds.h  --  R-Car Display Unit LVDS Encoder and Connector
-+ *
-+ * Copyright (C) 2013 Renesas Corporation
-+ *
-+ * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ */
-+
-+#ifndef __RCAR_DU_LVDS_H__
-+#define __RCAR_DU_LVDS_H__
-+
-+struct rcar_du_device;
-+struct rcar_du_encoder_lvds_data;
-+
-+int rcar_du_lvds_init(struct rcar_du_device *rcdu,
-+		      const struct rcar_du_encoder_lvds_data *data,
-+		      unsigned int output);
-+
-+#endif /* __RCAR_DU_LVDS_H__ */
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_plane.c b/drivers/gpu/drm/rcar-du/rcar_du_plane.c
-new file mode 100644
-index 000000000000..a65f81ddf51d
---- /dev/null
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_plane.c
-@@ -0,0 +1,507 @@
-+/*
-+ * rcar_du_plane.c  --  R-Car Display Unit Planes
-+ *
-+ * Copyright (C) 2013 Renesas Corporation
-+ *
-+ * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ */
-+
-+#include <drm/drmP.h>
-+#include <drm/drm_crtc.h>
-+#include <drm/drm_crtc_helper.h>
-+#include <drm/drm_fb_cma_helper.h>
-+#include <drm/drm_gem_cma_helper.h>
-+
-+#include "rcar_du_drv.h"
-+#include "rcar_du_kms.h"
-+#include "rcar_du_plane.h"
-+#include "rcar_du_regs.h"
-+
-+#define RCAR_DU_COLORKEY_NONE		(0 << 24)
-+#define RCAR_DU_COLORKEY_SOURCE		(1 << 24)
-+#define RCAR_DU_COLORKEY_MASK		(1 << 24)
-+
-+struct rcar_du_kms_plane {
-+	struct drm_plane plane;
-+	struct rcar_du_plane *hwplane;
-+};
-+
-+static inline struct rcar_du_plane *to_rcar_plane(struct drm_plane *plane)
-+{
-+	return container_of(plane, struct rcar_du_kms_plane, plane)->hwplane;
-+}
-+
-+static u32 rcar_du_plane_read(struct rcar_du_device *rcdu,
-+			      unsigned int index, u32 reg)
-+{
-+	return rcar_du_read(rcdu, index * PLANE_OFF + reg);
-+}
-+
-+static void rcar_du_plane_write(struct rcar_du_device *rcdu,
-+				unsigned int index, u32 reg, u32 data)
-+{
-+	rcar_du_write(rcdu, index * PLANE_OFF + reg, data);
-+}
-+
-+int rcar_du_plane_reserve(struct rcar_du_plane *plane,
-+			  const struct rcar_du_format_info *format)
-+{
-+	struct rcar_du_device *rcdu = plane->dev;
-+	unsigned int i;
-+	int ret = -EBUSY;
-+
-+	mutex_lock(&rcdu->planes.lock);
-+
-+	for (i = 0; i < ARRAY_SIZE(rcdu->planes.planes); ++i) {
-+		if (!(rcdu->planes.free & (1 << i)))
-+			continue;
-+
-+		if (format->planes == 1 ||
-+		    rcdu->planes.free & (1 << ((i + 1) % 8)))
-+			break;
-+	}
-+
-+	if (i == ARRAY_SIZE(rcdu->planes.planes))
-+		goto done;
-+
-+	rcdu->planes.free &= ~(1 << i);
-+	if (format->planes == 2)
-+		rcdu->planes.free &= ~(1 << ((i + 1) % 8));
-+
-+	plane->hwindex = i;
-+
-+	ret = 0;
-+
-+done:
-+	mutex_unlock(&rcdu->planes.lock);
-+	return ret;
-+}
-+
-+void rcar_du_plane_release(struct rcar_du_plane *plane)
-+{
-+	struct rcar_du_device *rcdu = plane->dev;
-+
-+	if (plane->hwindex == -1)
-+		return;
-+
-+	mutex_lock(&rcdu->planes.lock);
-+	rcdu->planes.free |= 1 << plane->hwindex;
-+	if (plane->format->planes == 2)
-+		rcdu->planes.free |= 1 << ((plane->hwindex + 1) % 8);
-+	mutex_unlock(&rcdu->planes.lock);
-+
-+	plane->hwindex = -1;
-+}
-+
-+void rcar_du_plane_update_base(struct rcar_du_plane *plane)
-+{
-+	struct rcar_du_device *rcdu = plane->dev;
-+	unsigned int index = plane->hwindex;
-+
-+	/* According to the datasheet the Y position is expressed in raster line
-+	 * units. However, 32bpp formats seem to require a doubled Y position
-+	 * value. Similarly, for the second plane, NV12 and NV21 formats seem to
-+	 * require a halved Y position value.
-+	 */
-+	rcar_du_plane_write(rcdu, index, PnSPXR, plane->src_x);
-+	rcar_du_plane_write(rcdu, index, PnSPYR, plane->src_y *
-+			    (plane->format->bpp == 32 ? 2 : 1));
-+	rcar_du_plane_write(rcdu, index, PnDSA0R, plane->dma[0]);
-+
-+	if (plane->format->planes == 2) {
-+		index = (index + 1) % 8;
-+
-+		rcar_du_plane_write(rcdu, index, PnSPXR, plane->src_x);
-+		rcar_du_plane_write(rcdu, index, PnSPYR, plane->src_y *
-+				    (plane->format->bpp == 16 ? 2 : 1) / 2);
-+		rcar_du_plane_write(rcdu, index, PnDSA0R, plane->dma[1]);
-+	}
-+}
-+
-+void rcar_du_plane_compute_base(struct rcar_du_plane *plane,
-+				struct drm_framebuffer *fb)
-+{
-+	struct drm_gem_cma_object *gem;
-+
-+	gem = drm_fb_cma_get_gem_obj(fb, 0);
-+	plane->dma[0] = gem->paddr + fb->offsets[0];
-+
-+	if (plane->format->planes == 2) {
-+		gem = drm_fb_cma_get_gem_obj(fb, 1);
-+		plane->dma[1] = gem->paddr + fb->offsets[1];
-+	}
-+}
-+
-+static void rcar_du_plane_setup_mode(struct rcar_du_plane *plane,
-+				     unsigned int index)
-+{
-+	struct rcar_du_device *rcdu = plane->dev;
-+	u32 colorkey;
-+	u32 pnmr;
-+
-+	/* The PnALPHAR register controls alpha-blending in 16bpp formats
-+	 * (ARGB1555 and XRGB1555).
-+	 *
-+	 * For ARGB, set the alpha value to 0, and enable alpha-blending when
-+	 * the A bit is 0. This maps A=0 to alpha=0 and A=1 to alpha=255.
-+	 *
-+	 * For XRGB, set the alpha value to the plane-wide alpha value and
-+	 * enable alpha-blending regardless of the X bit value.
-+	 */
-+	if (plane->format->fourcc != DRM_FORMAT_XRGB1555)
-+		rcar_du_plane_write(rcdu, index, PnALPHAR, PnALPHAR_ABIT_0);
-+	else
-+		rcar_du_plane_write(rcdu, index, PnALPHAR,
-+				    PnALPHAR_ABIT_X | plane->alpha);
-+
-+	pnmr = PnMR_BM_MD | plane->format->pnmr;
-+
-+	/* Disable color keying when requested. YUV formats have the
-+	 * PnMR_SPIM_TP_OFF bit set in their pnmr field, disabling color keying
-+	 * automatically.
-+	 */
-+	if ((plane->colorkey & RCAR_DU_COLORKEY_MASK) == RCAR_DU_COLORKEY_NONE)
-+		pnmr |= PnMR_SPIM_TP_OFF;
-+
-+	/* For packed YUV formats we need to select the U/V order. */
-+	if (plane->format->fourcc == DRM_FORMAT_YUYV)
-+		pnmr |= PnMR_YCDF_YUYV;
-+
-+	rcar_du_plane_write(rcdu, index, PnMR, pnmr);
-+
-+	switch (plane->format->fourcc) {
-+	case DRM_FORMAT_RGB565:
-+		colorkey = ((plane->colorkey & 0xf80000) >> 8)
-+			 | ((plane->colorkey & 0x00fc00) >> 5)
-+			 | ((plane->colorkey & 0x0000f8) >> 3);
-+		rcar_du_plane_write(rcdu, index, PnTC2R, colorkey);
-+		break;
-+
-+	case DRM_FORMAT_ARGB1555:
-+	case DRM_FORMAT_XRGB1555:
-+		colorkey = ((plane->colorkey & 0xf80000) >> 9)
-+			 | ((plane->colorkey & 0x00f800) >> 6)
-+			 | ((plane->colorkey & 0x0000f8) >> 3);
-+		rcar_du_plane_write(rcdu, index, PnTC2R, colorkey);
-+		break;
-+
-+	case DRM_FORMAT_XRGB8888:
-+	case DRM_FORMAT_ARGB8888:
-+		rcar_du_plane_write(rcdu, index, PnTC3R,
-+				    PnTC3R_CODE | (plane->colorkey & 0xffffff));
-+		break;
-+	}
-+}
-+
-+static void __rcar_du_plane_setup(struct rcar_du_plane *plane,
-+				  unsigned int index)
-+{
-+	struct rcar_du_device *rcdu = plane->dev;
-+	u32 ddcr2 = PnDDCR2_CODE;
-+	u32 ddcr4;
-+	u32 mwr;
-+
-+	/* Data format
-+	 *
-+	 * The data format is selected by the DDDF field in PnMR and the EDF
-+	 * field in DDCR4.
-+	 */
-+	ddcr4 = rcar_du_plane_read(rcdu, index, PnDDCR4);
-+	ddcr4 &= ~PnDDCR4_EDF_MASK;
-+	ddcr4 |= plane->format->edf | PnDDCR4_CODE;
-+
-+	rcar_du_plane_setup_mode(plane, index);
-+
-+	if (plane->format->planes == 2) {
-+		if (plane->hwindex != index) {
-+			if (plane->format->fourcc == DRM_FORMAT_NV12 ||
-+			    plane->format->fourcc == DRM_FORMAT_NV21)
-+				ddcr2 |= PnDDCR2_Y420;
-+
-+			if (plane->format->fourcc == DRM_FORMAT_NV21)
-+				ddcr2 |= PnDDCR2_NV21;
-+
-+			ddcr2 |= PnDDCR2_DIVU;
-+		} else {
-+			ddcr2 |= PnDDCR2_DIVY;
-+		}
-+	}
-+
-+	rcar_du_plane_write(rcdu, index, PnDDCR2, ddcr2);
-+	rcar_du_plane_write(rcdu, index, PnDDCR4, ddcr4);
-+
-+	/* Memory pitch (expressed in pixels) */
-+	if (plane->format->planes == 2)
-+		mwr = plane->pitch;
-+	else
-+		mwr = plane->pitch * 8 / plane->format->bpp;
-+
-+	rcar_du_plane_write(rcdu, index, PnMWR, mwr);
-+
-+	/* Destination position and size */
-+	rcar_du_plane_write(rcdu, index, PnDSXR, plane->width);
-+	rcar_du_plane_write(rcdu, index, PnDSYR, plane->height);
-+	rcar_du_plane_write(rcdu, index, PnDPXR, plane->dst_x);
-+	rcar_du_plane_write(rcdu, index, PnDPYR, plane->dst_y);
-+
-+	/* Wrap-around and blinking, disabled */
-+	rcar_du_plane_write(rcdu, index, PnWASPR, 0);
-+	rcar_du_plane_write(rcdu, index, PnWAMWR, 4095);
-+	rcar_du_plane_write(rcdu, index, PnBTR, 0);
-+	rcar_du_plane_write(rcdu, index, PnMLR, 0);
-+}
-+
-+void rcar_du_plane_setup(struct rcar_du_plane *plane)
-+{
-+	__rcar_du_plane_setup(plane, plane->hwindex);
-+	if (plane->format->planes == 2)
-+		__rcar_du_plane_setup(plane, (plane->hwindex + 1) % 8);
-+
-+	rcar_du_plane_update_base(plane);
-+}
-+
-+static int
-+rcar_du_plane_update(struct drm_plane *plane, struct drm_crtc *crtc,
-+		       struct drm_framebuffer *fb, int crtc_x, int crtc_y,
-+		       unsigned int crtc_w, unsigned int crtc_h,
-+		       uint32_t src_x, uint32_t src_y,
-+		       uint32_t src_w, uint32_t src_h)
-+{
-+	struct rcar_du_plane *rplane = to_rcar_plane(plane);
-+	struct rcar_du_device *rcdu = plane->dev->dev_private;
-+	const struct rcar_du_format_info *format;
-+	unsigned int nplanes;
-+	int ret;
-+
-+	format = rcar_du_format_info(fb->pixel_format);
-+	if (format == NULL) {
-+		dev_dbg(rcdu->dev, "%s: unsupported format %08x\n", __func__,
-+			fb->pixel_format);
-+		return -EINVAL;
-+	}
-+
-+	if (src_w >> 16 != crtc_w || src_h >> 16 != crtc_h) {
-+		dev_dbg(rcdu->dev, "%s: scaling not supported\n", __func__);
-+		return -EINVAL;
-+	}
-+
-+	nplanes = rplane->format ? rplane->format->planes : 0;
-+
-+	/* Reallocate hardware planes if the number of required planes has
-+	 * changed.
-+	 */
-+	if (format->planes != nplanes) {
-+		rcar_du_plane_release(rplane);
-+		ret = rcar_du_plane_reserve(rplane, format);
-+		if (ret < 0)
-+			return ret;
-+	}
-+
-+	rplane->crtc = crtc;
-+	rplane->format = format;
-+	rplane->pitch = fb->pitches[0];
-+
-+	rplane->src_x = src_x >> 16;
-+	rplane->src_y = src_y >> 16;
-+	rplane->dst_x = crtc_x;
-+	rplane->dst_y = crtc_y;
-+	rplane->width = crtc_w;
-+	rplane->height = crtc_h;
-+
-+	rcar_du_plane_compute_base(rplane, fb);
-+	rcar_du_plane_setup(rplane);
-+
-+	mutex_lock(&rcdu->planes.lock);
-+	rplane->enabled = true;
-+	rcar_du_crtc_update_planes(rplane->crtc);
-+	mutex_unlock(&rcdu->planes.lock);
-+
-+	return 0;
-+}
-+
-+static int rcar_du_plane_disable(struct drm_plane *plane)
-+{
-+	struct rcar_du_device *rcdu = plane->dev->dev_private;
-+	struct rcar_du_plane *rplane = to_rcar_plane(plane);
-+
-+	if (!rplane->enabled)
-+		return 0;
-+
-+	mutex_lock(&rcdu->planes.lock);
-+	rplane->enabled = false;
-+	rcar_du_crtc_update_planes(rplane->crtc);
-+	mutex_unlock(&rcdu->planes.lock);
-+
-+	rcar_du_plane_release(rplane);
-+
-+	rplane->crtc = NULL;
-+	rplane->format = NULL;
-+
-+	return 0;
-+}
-+
-+/* Both the .set_property and the .update_plane operations are called with the
-+ * mode_config lock held. There is this no need to explicitly protect access to
-+ * the alpha and colorkey fields and the mode register.
-+ */
-+static void rcar_du_plane_set_alpha(struct rcar_du_plane *plane, u32 alpha)
-+{
-+	if (plane->alpha == alpha)
-+		return;
-+
-+	plane->alpha = alpha;
-+	if (!plane->enabled || plane->format->fourcc != DRM_FORMAT_XRGB1555)
-+		return;
-+
-+	rcar_du_plane_setup_mode(plane, plane->hwindex);
-+}
-+
-+static void rcar_du_plane_set_colorkey(struct rcar_du_plane *plane,
-+				       u32 colorkey)
-+{
-+	if (plane->colorkey == colorkey)
-+		return;
-+
-+	plane->colorkey = colorkey;
-+	if (!plane->enabled)
-+		return;
-+
-+	rcar_du_plane_setup_mode(plane, plane->hwindex);
-+}
-+
-+static void rcar_du_plane_set_zpos(struct rcar_du_plane *plane,
-+				   unsigned int zpos)
-+{
-+	struct rcar_du_device *rcdu = plane->dev;
-+
-+	mutex_lock(&rcdu->planes.lock);
-+	if (plane->zpos == zpos)
-+		goto done;
-+
-+	plane->zpos = zpos;
-+	if (!plane->enabled)
-+		goto done;
-+
-+	rcar_du_crtc_update_planes(plane->crtc);
-+
-+done:
-+	mutex_unlock(&rcdu->planes.lock);
-+}
-+
-+static int rcar_du_plane_set_property(struct drm_plane *plane,
-+				      struct drm_property *property,
-+				      uint64_t value)
-+{
-+	struct rcar_du_device *rcdu = plane->dev->dev_private;
-+	struct rcar_du_plane *rplane = to_rcar_plane(plane);
-+
-+	if (property == rcdu->planes.alpha)
-+		rcar_du_plane_set_alpha(rplane, value);
-+	else if (property == rcdu->planes.colorkey)
-+		rcar_du_plane_set_colorkey(rplane, value);
-+	else if (property == rcdu->planes.zpos)
-+		rcar_du_plane_set_zpos(rplane, value);
-+	else
-+		return -EINVAL;
-+
-+	return 0;
-+}
-+
-+static const struct drm_plane_funcs rcar_du_plane_funcs = {
-+	.update_plane = rcar_du_plane_update,
-+	.disable_plane = rcar_du_plane_disable,
-+	.set_property = rcar_du_plane_set_property,
-+	.destroy = drm_plane_cleanup,
-+};
-+
-+static const uint32_t formats[] = {
-+	DRM_FORMAT_RGB565,
-+	DRM_FORMAT_ARGB1555,
-+	DRM_FORMAT_XRGB1555,
-+	DRM_FORMAT_XRGB8888,
-+	DRM_FORMAT_ARGB8888,
-+	DRM_FORMAT_UYVY,
-+	DRM_FORMAT_YUYV,
-+	DRM_FORMAT_NV12,
-+	DRM_FORMAT_NV21,
-+	DRM_FORMAT_NV16,
-+};
-+
-+int rcar_du_plane_init(struct rcar_du_device *rcdu)
-+{
-+	unsigned int i;
-+
-+	mutex_init(&rcdu->planes.lock);
-+	rcdu->planes.free = 0xff;
-+
-+	rcdu->planes.alpha =
-+		drm_property_create_range(rcdu->ddev, 0, "alpha", 0, 255);
-+	if (rcdu->planes.alpha == NULL)
-+		return -ENOMEM;
-+
-+	/* The color key is expressed as an RGB888 triplet stored in a 32-bit
-+	 * integer in XRGB8888 format. Bit 24 is used as a flag to disable (0)
-+	 * or enable source color keying (1).
-+	 */
-+	rcdu->planes.colorkey =
-+		drm_property_create_range(rcdu->ddev, 0, "colorkey",
-+					  0, 0x01ffffff);
-+	if (rcdu->planes.colorkey == NULL)
-+		return -ENOMEM;
-+
-+	rcdu->planes.zpos =
-+		drm_property_create_range(rcdu->ddev, 0, "zpos", 1, 7);
-+	if (rcdu->planes.zpos == NULL)
-+		return -ENOMEM;
-+
-+	for (i = 0; i < ARRAY_SIZE(rcdu->planes.planes); ++i) {
-+		struct rcar_du_plane *plane = &rcdu->planes.planes[i];
-+
-+		plane->dev = rcdu;
-+		plane->hwindex = -1;
-+		plane->alpha = 255;
-+		plane->colorkey = RCAR_DU_COLORKEY_NONE;
-+		plane->zpos = 0;
-+	}
-+
-+	return 0;
-+}
-+
-+int rcar_du_plane_register(struct rcar_du_device *rcdu)
-+{
-+	unsigned int i;
-+	int ret;
-+
-+	for (i = 0; i < RCAR_DU_NUM_KMS_PLANES; ++i) {
-+		struct rcar_du_kms_plane *plane;
-+
-+		plane = devm_kzalloc(rcdu->dev, sizeof(*plane), GFP_KERNEL);
-+		if (plane == NULL)
-+			return -ENOMEM;
-+
-+		plane->hwplane = &rcdu->planes.planes[i + 2];
-+		plane->hwplane->zpos = 1;
-+
-+		ret = drm_plane_init(rcdu->ddev, &plane->plane,
-+				     (1 << rcdu->num_crtcs) - 1,
-+				     &rcar_du_plane_funcs, formats,
-+				     ARRAY_SIZE(formats), false);
-+		if (ret < 0)
-+			return ret;
-+
-+		drm_object_attach_property(&plane->plane.base,
-+					   rcdu->planes.alpha, 255);
-+		drm_object_attach_property(&plane->plane.base,
-+					   rcdu->planes.colorkey,
-+					   RCAR_DU_COLORKEY_NONE);
-+		drm_object_attach_property(&plane->plane.base,
-+					   rcdu->planes.zpos, 1);
-+	}
-+
-+	return 0;
-+}
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_plane.h b/drivers/gpu/drm/rcar-du/rcar_du_plane.h
-new file mode 100644
-index 000000000000..5397dba2fe57
---- /dev/null
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_plane.h
-@@ -0,0 +1,67 @@
-+/*
-+ * rcar_du_plane.h  --  R-Car Display Unit Planes
-+ *
-+ * Copyright (C) 2013 Renesas Corporation
-+ *
-+ * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ */
-+
-+#ifndef __RCAR_DU_PLANE_H__
-+#define __RCAR_DU_PLANE_H__
-+
-+struct drm_crtc;
-+struct drm_framebuffer;
-+struct rcar_du_device;
-+struct rcar_du_format_info;
-+
-+/* The RCAR DU has 8 hardware planes, shared between KMS planes and CRTCs. As
-+ * using KMS planes requires at least one of the CRTCs being enabled, no more
-+ * than 7 KMS planes can be available. We thus create 7 KMS planes and
-+ * 9 software planes (one for each KMS planes and one for each CRTC).
-+ */
-+
-+#define RCAR_DU_NUM_KMS_PLANES		7
-+#define RCAR_DU_NUM_HW_PLANES		8
-+#define RCAR_DU_NUM_SW_PLANES		9
-+
-+struct rcar_du_plane {
-+	struct rcar_du_device *dev;
-+	struct drm_crtc *crtc;
-+
-+	bool enabled;
-+
-+	int hwindex;		/* 0-based, -1 means unused */
-+	unsigned int alpha;
-+	unsigned int colorkey;
-+	unsigned int zpos;
-+
-+	const struct rcar_du_format_info *format;
-+
-+	unsigned long dma[2];
-+	unsigned int pitch;
-+
-+	unsigned int width;
-+	unsigned int height;
-+
-+	unsigned int src_x;
-+	unsigned int src_y;
-+	unsigned int dst_x;
-+	unsigned int dst_y;
-+};
-+
-+int rcar_du_plane_init(struct rcar_du_device *rcdu);
-+int rcar_du_plane_register(struct rcar_du_device *rcdu);
-+void rcar_du_plane_setup(struct rcar_du_plane *plane);
-+void rcar_du_plane_update_base(struct rcar_du_plane *plane);
-+void rcar_du_plane_compute_base(struct rcar_du_plane *plane,
-+				struct drm_framebuffer *fb);
-+int rcar_du_plane_reserve(struct rcar_du_plane *plane,
-+			  const struct rcar_du_format_info *format);
-+void rcar_du_plane_release(struct rcar_du_plane *plane);
-+
-+#endif /* __RCAR_DU_PLANE_H__ */
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_regs.h b/drivers/gpu/drm/rcar-du/rcar_du_regs.h
-new file mode 100644
-index 000000000000..69f21f19b51c
---- /dev/null
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_regs.h
-@@ -0,0 +1,445 @@
-+/*
-+ * rcar_du_regs.h  --  R-Car Display Unit Registers Definitions
-+ *
-+ * Copyright (C) 2013 Renesas Electronics Corporation
-+ *
-+ * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2
-+ * as published by the Free Software Foundation.
-+ */
-+
-+#ifndef __RCAR_DU_REGS_H__
-+#define __RCAR_DU_REGS_H__
-+
-+#define DISP2_REG_OFFSET	 0x30000
-+
-+/* -----------------------------------------------------------------------------
-+ * Display Control Registers
-+ */
-+
-+#define DSYSR			0x00000	/* display 1 */
-+#define D2SYSR			0x30000	/* display 2 */
-+#define DSYSR_ILTS		(1 << 29)
-+#define DSYSR_DSEC		(1 << 20)
-+#define DSYSR_IUPD		(1 << 16)
-+#define DSYSR_DRES		(1 << 9)
-+#define DSYSR_DEN		(1 << 8)
-+#define DSYSR_TVM_MASTER	(0 << 6)
-+#define DSYSR_TVM_SWITCH	(1 << 6)
-+#define DSYSR_TVM_TVSYNC	(2 << 6)
-+#define DSYSR_TVM_MASK		(3 << 6)
-+#define DSYSR_SCM_INT_NONE	(0 << 4)
-+#define DSYSR_SCM_INT_SYNC	(2 << 4)
-+#define DSYSR_SCM_INT_VIDEO	(3 << 4)
-+
-+#define DSMR			0x00004
-+#define D2SMR			0x30004
-+#define DSMR_VSPM		(1 << 28)
-+#define DSMR_ODPM		(1 << 27)
-+#define DSMR_DIPM_DISP		(0 << 25)
-+#define DSMR_DIPM_CSYNC		(1 << 25)
-+#define DSMR_DIPM_DE		(3 << 25)
-+#define DSMR_DIPM_MASK		(3 << 25)
-+#define DSMR_CSPM		(1 << 24)
-+#define DSMR_DIL		(1 << 19)
-+#define DSMR_VSL		(1 << 18)
-+#define DSMR_HSL		(1 << 17)
-+#define DSMR_DDIS		(1 << 16)
-+#define DSMR_CDEL		(1 << 15)
-+#define DSMR_CDEM_CDE		(0 << 13)
-+#define DSMR_CDEM_LOW		(2 << 13)
-+#define DSMR_CDEM_HIGH		(3 << 13)
-+#define DSMR_CDEM_MASK		(3 << 13)
-+#define DSMR_CDED		(1 << 12)
-+#define DSMR_ODEV		(1 << 8)
-+#define DSMR_CSY_VH_OR		(0 << 6)
-+#define DSMR_CSY_333		(2 << 6)
-+#define DSMR_CSY_222		(3 << 6)
-+#define DSMR_CSY_MASK		(3 << 6)
-+
-+#define DSSR			0x00008
-+#define D2SSR			0x30008
-+#define DSSR_VC1FB_DSA0		(0 << 30)
-+#define DSSR_VC1FB_DSA1		(1 << 30)
-+#define DSSR_VC1FB_DSA2		(2 << 30)
-+#define DSSR_VC1FB_INIT		(3 << 30)
-+#define DSSR_VC1FB_MASK		(3 << 30)
-+#define DSSR_VC0FB_DSA0		(0 << 28)
-+#define DSSR_VC0FB_DSA1		(1 << 28)
-+#define DSSR_VC0FB_DSA2		(2 << 28)
-+#define DSSR_VC0FB_INIT		(3 << 28)
-+#define DSSR_VC0FB_MASK		(3 << 28)
-+#define DSSR_DFB(n)		(1 << ((n)+15))
-+#define DSSR_TVR		(1 << 15)
-+#define DSSR_FRM		(1 << 14)
-+#define DSSR_VBK		(1 << 11)
-+#define DSSR_RINT		(1 << 9)
-+#define DSSR_HBK		(1 << 8)
-+#define DSSR_ADC(n)		(1 << ((n)-1))
-+
-+#define DSRCR			0x0000c
-+#define D2SRCR			0x3000c
-+#define DSRCR_TVCL		(1 << 15)
-+#define DSRCR_FRCL		(1 << 14)
-+#define DSRCR_VBCL		(1 << 11)
-+#define DSRCR_RICL		(1 << 9)
-+#define DSRCR_HBCL		(1 << 8)
-+#define DSRCR_ADCL(n)		(1 << ((n)-1))
-+#define DSRCR_MASK		0x0000cbff
-+
-+#define DIER			0x00010
-+#define D2IER			0x30010
-+#define DIER_TVE		(1 << 15)
-+#define DIER_FRE		(1 << 14)
-+#define DIER_VBE		(1 << 11)
-+#define DIER_RIE		(1 << 9)
-+#define DIER_HBE		(1 << 8)
-+#define DIER_ADCE(n)		(1 << ((n)-1))
-+
-+#define CPCR			0x00014
-+#define CPCR_CP4CE		(1 << 19)
-+#define CPCR_CP3CE		(1 << 18)
-+#define CPCR_CP2CE		(1 << 17)
-+#define CPCR_CP1CE		(1 << 16)
-+
-+#define DPPR			0x00018
-+#define DPPR_DPE(n)		(1 << ((n)*4-1))
-+#define DPPR_DPS(n, p)		(((p)-1) << DPPR_DPS_SHIFT(n))
-+#define DPPR_DPS_SHIFT(n)	(((n)-1)*4)
-+#define DPPR_BPP16		(DPPR_DPE(8) | DPPR_DPS(8, 1))	/* plane1 */
-+#define DPPR_BPP32_P1		(DPPR_DPE(7) | DPPR_DPS(7, 1))
-+#define DPPR_BPP32_P2		(DPPR_DPE(8) | DPPR_DPS(8, 2))
-+#define DPPR_BPP32		(DPPR_BPP32_P1 | DPPR_BPP32_P2)	/* plane1 & 2 */
-+
-+#define DEFR			0x00020
-+#define D2EFR			0x30020
-+#define DEFR_CODE		(0x7773 << 16)
-+#define DEFR_EXSL		(1 << 12)
-+#define DEFR_EXVL		(1 << 11)
-+#define DEFR_EXUP		(1 << 5)
-+#define DEFR_VCUP		(1 << 4)
-+#define DEFR_DEFE		(1 << 0)
-+
-+#define DAPCR			0x00024
-+#define DAPCR_CODE		(0x7773 << 16)
-+#define DAPCR_AP2E		(1 << 4)
-+#define DAPCR_AP1E		(1 << 0)
-+
-+#define DCPCR			0x00028
-+#define DCPCR_CODE		(0x7773 << 16)
-+#define DCPCR_CA2B		(1 << 13)
-+#define DCPCR_CD2F		(1 << 12)
-+#define DCPCR_DC2E		(1 << 8)
-+#define DCPCR_CAB		(1 << 5)
-+#define DCPCR_CDF		(1 << 4)
-+#define DCPCR_DCE		(1 << 0)
-+
-+#define DEFR2			0x00034
-+#define D2EFR2			0x30034
-+#define DEFR2_CODE		(0x7775 << 16)
-+#define DEFR2_DEFE2G		(1 << 0)
-+
-+#define DEFR3			0x00038
-+#define D2EFR3			0x30038
-+#define DEFR3_CODE		(0x7776 << 16)
-+#define DEFR3_EVDA		(1 << 14)
-+#define DEFR3_EVDM_1		(1 << 12)
-+#define DEFR3_EVDM_2		(2 << 12)
-+#define DEFR3_EVDM_3		(3 << 12)
-+#define DEFR3_VMSM2_EMA		(1 << 6)
-+#define DEFR3_VMSM1_ENA		(1 << 4)
-+#define DEFR3_DEFE3		(1 << 0)
-+
-+#define DEFR4			0x0003c
-+#define D2EFR4			0x3003c
-+#define DEFR4_CODE		(0x7777 << 16)
-+#define DEFR4_LRUO		(1 << 5)
-+#define DEFR4_SPCE		(1 << 4)
-+
-+#define DVCSR			0x000d0
-+#define DVCSR_VCnFB2_DSA0(n)	(0 << ((n)*2+16))
-+#define DVCSR_VCnFB2_DSA1(n)	(1 << ((n)*2+16))
-+#define DVCSR_VCnFB2_DSA2(n)	(2 << ((n)*2+16))
-+#define DVCSR_VCnFB2_INIT(n)	(3 << ((n)*2+16))
-+#define DVCSR_VCnFB2_MASK(n)	(3 << ((n)*2+16))
-+#define DVCSR_VCnFB_DSA0(n)	(0 << ((n)*2))
-+#define DVCSR_VCnFB_DSA1(n)	(1 << ((n)*2))
-+#define DVCSR_VCnFB_DSA2(n)	(2 << ((n)*2))
-+#define DVCSR_VCnFB_INIT(n)	(3 << ((n)*2))
-+#define DVCSR_VCnFB_MASK(n)	(3 << ((n)*2))
-+
-+#define DEFR5			0x000e0
-+#define DEFR5_CODE		(0x66 << 24)
-+#define DEFR5_YCRGB2_DIS	(0 << 14)
-+#define DEFR5_YCRGB2_PRI1	(1 << 14)
-+#define DEFR5_YCRGB2_PRI2	(2 << 14)
-+#define DEFR5_YCRGB2_PRI3	(3 << 14)
-+#define DEFR5_YCRGB2_MASK	(3 << 14)
-+#define DEFR5_YCRGB1_DIS	(0 << 12)
-+#define DEFR5_YCRGB1_PRI1	(1 << 12)
-+#define DEFR5_YCRGB1_PRI2	(2 << 12)
-+#define DEFR5_YCRGB1_PRI3	(3 << 12)
-+#define DEFR5_YCRGB1_MASK	(3 << 12)
-+#define DEFR5_DEFE5		(1 << 0)
-+
-+#define DDLTR			0x000e4
-+#define DDLTR_CODE		(0x7766 << 16)
-+#define DDLTR_DLAR2		(1 << 6)
-+#define DDLTR_DLAY2		(1 << 5)
-+#define DDLTR_DLAY1		(1 << 1)
-+
-+#define DEFR6			0x000e8
-+#define DEFR6_CODE		(0x7778 << 16)
-+#define DEFR6_ODPM22_D2SMR	(0 << 10)
-+#define DEFR6_ODPM22_DISP	(2 << 10)
-+#define DEFR6_ODPM22_CDE	(3 << 10)
-+#define DEFR6_ODPM22_MASK	(3 << 10)
-+#define DEFR6_ODPM12_DSMR	(0 << 8)
-+#define DEFR6_ODPM12_DISP	(2 << 8)
-+#define DEFR6_ODPM12_CDE	(3 << 8)
-+#define DEFR6_ODPM12_MASK	(3 << 8)
-+#define DEFR6_TCNE2		(1 << 6)
-+#define DEFR6_MLOS1		(1 << 2)
-+#define DEFR6_DEFAULT		(DEFR6_CODE | DEFR6_TCNE2)
-+
-+/* -----------------------------------------------------------------------------
-+ * Display Timing Generation Registers
-+ */
-+
-+#define HDSR			0x00040
-+#define HDER			0x00044
-+#define VDSR			0x00048
-+#define VDER			0x0004c
-+#define HCR			0x00050
-+#define HSWR			0x00054
-+#define VCR			0x00058
-+#define VSPR			0x0005c
-+#define EQWR			0x00060
-+#define SPWR			0x00064
-+#define CLAMPSR			0x00070
-+#define CLAMPWR			0x00074
-+#define DESR			0x00078
-+#define DEWR			0x0007c
-+
-+/* -----------------------------------------------------------------------------
-+ * Display Attribute Registers
-+ */
-+
-+#define CP1TR			0x00080
-+#define CP2TR			0x00084
-+#define CP3TR			0x00088
-+#define CP4TR			0x0008c
-+
-+#define DOOR			0x00090
-+#define DOOR_RGB(r, g, b)	(((r) << 18) | ((g) << 10) | ((b) << 2))
-+#define CDER			0x00094
-+#define CDER_RGB(r, g, b)	(((r) << 18) | ((g) << 10) | ((b) << 2))
-+#define BPOR			0x00098
-+#define BPOR_RGB(r, g, b)	(((r) << 18) | ((g) << 10) | ((b) << 2))
-+
-+#define RINTOFSR		0x0009c
-+
-+#define DSHPR			0x000c8
-+#define DSHPR_CODE		(0x7776 << 16)
-+#define DSHPR_PRIH		(0xa << 4)
-+#define DSHPR_PRIL_BPP16	(0x8 << 0)
-+#define DSHPR_PRIL_BPP32	(0x9 << 0)
-+
-+/* -----------------------------------------------------------------------------
-+ * Display Plane Registers
-+ */
-+
-+#define PLANE_OFF		0x00100
-+
-+#define PnMR			0x00100 /* plane 1 */
-+#define PnMR_VISL_VIN0		(0 << 26)	/* use Video Input 0 */
-+#define PnMR_VISL_VIN1		(1 << 26)	/* use Video Input 1 */
-+#define PnMR_VISL_VIN2		(2 << 26)	/* use Video Input 2 */
-+#define PnMR_VISL_VIN3		(3 << 26)	/* use Video Input 3 */
-+#define PnMR_YCDF_YUYV		(1 << 20)	/* YUYV format */
-+#define PnMR_TC_R		(0 << 17)	/* Tranparent color is PnTC1R */
-+#define PnMR_TC_CP		(1 << 17)	/* Tranparent color is color palette */
-+#define PnMR_WAE		(1 << 16)	/* Wrap around Enable */
-+#define PnMR_SPIM_TP		(0 << 12)	/* Transparent Color */
-+#define PnMR_SPIM_ALP		(1 << 12)	/* Alpha Blending */
-+#define PnMR_SPIM_EOR		(2 << 12)	/* EOR */
-+#define PnMR_SPIM_TP_OFF	(1 << 14)	/* No Transparent Color */
-+#define PnMR_CPSL_CP1		(0 << 8)	/* Color Palette selected 1 */
-+#define PnMR_CPSL_CP2		(1 << 8)	/* Color Palette selected 2 */
-+#define PnMR_CPSL_CP3		(2 << 8)	/* Color Palette selected 3 */
-+#define PnMR_CPSL_CP4		(3 << 8)	/* Color Palette selected 4 */
-+#define PnMR_DC			(1 << 7)	/* Display Area Change */
-+#define PnMR_BM_MD		(0 << 4)	/* Manual Display Change Mode */
-+#define PnMR_BM_AR		(1 << 4)	/* Auto Rendering Mode */
-+#define PnMR_BM_AD		(2 << 4)	/* Auto Display Change Mode */
-+#define PnMR_BM_VC		(3 << 4)	/* Video Capture Mode */
-+#define PnMR_DDDF_8BPP		(0 << 0)	/* 8bit */
-+#define PnMR_DDDF_16BPP		(1 << 0)	/* 16bit or 32bit */
-+#define PnMR_DDDF_ARGB		(2 << 0)	/* ARGB */
-+#define PnMR_DDDF_YC		(3 << 0)	/* YC */
-+#define PnMR_DDDF_MASK		(3 << 0)
-+
-+#define PnMWR			0x00104
-+
-+#define PnALPHAR		0x00108
-+#define PnALPHAR_ABIT_1		(0 << 12)
-+#define PnALPHAR_ABIT_0		(1 << 12)
-+#define PnALPHAR_ABIT_X		(2 << 12)
-+
-+#define PnDSXR			0x00110
-+#define PnDSYR			0x00114
-+#define PnDPXR			0x00118
-+#define PnDPYR			0x0011c
-+
-+#define PnDSA0R			0x00120
-+#define PnDSA1R			0x00124
-+#define PnDSA2R			0x00128
-+#define PnDSA_MASK		0xfffffff0
-+
-+#define PnSPXR			0x00130
-+#define PnSPYR			0x00134
-+#define PnWASPR			0x00138
-+#define PnWAMWR			0x0013c
-+
-+#define PnBTR			0x00140
-+
-+#define PnTC1R			0x00144
-+#define PnTC2R			0x00148
-+#define PnTC3R			0x0014c
-+#define PnTC3R_CODE		(0x66 << 24)
-+
-+#define PnMLR			0x00150
-+
-+#define PnSWAPR			0x00180
-+#define PnSWAPR_DIGN		(1 << 4)
-+#define PnSWAPR_SPQW		(1 << 3)
-+#define PnSWAPR_SPLW		(1 << 2)
-+#define PnSWAPR_SPWD		(1 << 1)
-+#define PnSWAPR_SPBY		(1 << 0)
-+
-+#define PnDDCR			0x00184
-+#define PnDDCR_CODE		(0x7775 << 16)
-+#define PnDDCR_LRGB1		(1 << 11)
-+#define PnDDCR_LRGB0		(1 << 10)
-+
-+#define PnDDCR2			0x00188
-+#define PnDDCR2_CODE		(0x7776 << 16)
-+#define PnDDCR2_NV21		(1 << 5)
-+#define PnDDCR2_Y420		(1 << 4)
-+#define PnDDCR2_DIVU		(1 << 1)
-+#define PnDDCR2_DIVY		(1 << 0)
-+
-+#define PnDDCR4			0x00190
-+#define PnDDCR4_CODE		(0x7766 << 16)
-+#define PnDDCR4_SDFS_RGB	(0 << 4)
-+#define PnDDCR4_SDFS_YC		(5 << 4)
-+#define PnDDCR4_SDFS_MASK	(7 << 4)
-+#define PnDDCR4_EDF_NONE	(0 << 0)
-+#define PnDDCR4_EDF_ARGB8888	(1 << 0)
-+#define PnDDCR4_EDF_RGB888	(2 << 0)
-+#define PnDDCR4_EDF_RGB666	(3 << 0)
-+#define PnDDCR4_EDF_MASK	(7 << 0)
-+
-+#define APnMR			0x0a100
-+#define APnMR_WAE		(1 << 16)	/* Wrap around Enable */
-+#define APnMR_DC		(1 << 7)	/* Display Area Change */
-+#define APnMR_BM_MD		(0 << 4)	/* Manual Display Change Mode */
-+#define APnMR_BM_AD		(2 << 4)	/* Auto Display Change Mode */
-+
-+#define APnMWR			0x0a104
-+#define APnDSA0R		0x0a120
-+#define APnDSA1R		0x0a124
-+#define APnDSA2R		0x0a128
-+#define APnMLR			0x0a150
-+
-+/* -----------------------------------------------------------------------------
-+ * Display Capture Registers
-+ */
-+
-+#define DCMWR			0x0c104
-+#define DC2MWR			0x0c204
-+#define DCSAR			0x0c120
-+#define DC2SAR			0x0c220
-+#define DCMLR			0x0c150
-+#define DC2MLR			0x0c250
-+
-+/* -----------------------------------------------------------------------------
-+ * Color Palette Registers
-+ */
-+
-+#define CP1_000R		0x01000
-+#define CP1_255R		0x013fc
-+#define CP2_000R		0x02000
-+#define CP2_255R		0x023fc
-+#define CP3_000R		0x03000
-+#define CP3_255R		0x033fc
-+#define CP4_000R		0x04000
-+#define CP4_255R		0x043fc
-+
-+/* -----------------------------------------------------------------------------
-+ * External Synchronization Control Registers
-+ */
-+
-+#define ESCR			0x10000
-+#define ESCR2			0x31000
-+#define ESCR_DCLKOINV		(1 << 25)
-+#define ESCR_DCLKSEL_DCLKIN	(0 << 20)
-+#define ESCR_DCLKSEL_CLKS	(1 << 20)
-+#define ESCR_DCLKSEL_MASK	(1 << 20)
-+#define ESCR_DCLKDIS		(1 << 16)
-+#define ESCR_SYNCSEL_OFF	(0 << 8)
-+#define ESCR_SYNCSEL_EXVSYNC	(2 << 8)
-+#define ESCR_SYNCSEL_EXHSYNC	(3 << 8)
-+#define ESCR_FRQSEL_MASK	(0x3f << 0)
-+
-+#define OTAR			0x10004
-+#define OTAR2			0x31004
-+
-+/* -----------------------------------------------------------------------------
-+ * Dual Display Output Control Registers
-+ */
-+
-+#define DORCR			0x11000
-+#define DORCR_PG2T		(1 << 30)
-+#define DORCR_DK2S		(1 << 28)
-+#define DORCR_PG2D_DS1		(0 << 24)
-+#define DORCR_PG2D_DS2		(1 << 24)
-+#define DORCR_PG2D_FIX0		(2 << 24)
-+#define DORCR_PG2D_DOOR		(3 << 24)
-+#define DORCR_PG2D_MASK		(3 << 24)
-+#define DORCR_DR1D		(1 << 21)
-+#define DORCR_PG1D_DS1		(0 << 16)
-+#define DORCR_PG1D_DS2		(1 << 16)
-+#define DORCR_PG1D_FIX0		(2 << 16)
-+#define DORCR_PG1D_DOOR		(3 << 16)
-+#define DORCR_PG1D_MASK		(3 << 16)
-+#define DORCR_RGPV		(1 << 4)
-+#define DORCR_DPRS		(1 << 0)
-+
-+#define DPTSR			0x11004
-+#define DPTSR_PnDK(n)		(1 << ((n) + 16))
-+#define DPTSR_PnTS(n)		(1 << (n))
-+
-+#define DAPTSR			0x11008
-+#define DAPTSR_APnDK(n)		(1 << ((n) + 16))
-+#define DAPTSR_APnTS(n)		(1 << (n))
-+
-+#define DS1PR			0x11020
-+#define DS2PR			0x11024
-+
-+/* -----------------------------------------------------------------------------
-+ * YC-RGB Conversion Coefficient Registers
-+ */
-+
-+#define YNCR			0x11080
-+#define YNOR			0x11084
-+#define CRNOR			0x11088
-+#define CBNOR			0x1108c
-+#define RCRCR			0x11090
-+#define GCRCR			0x11094
-+#define GCBCR			0x11098
-+#define BCBCR			0x1109c
-+
-+#endif /* __RCAR_DU_REGS_H__ */
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vga.c b/drivers/gpu/drm/rcar-du/rcar_du_vga.c
-new file mode 100644
-index 000000000000..327289ec380d
---- /dev/null
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_vga.c
-@@ -0,0 +1,149 @@
-+/*
-+ * rcar_du_vga.c  --  R-Car Display Unit VGA DAC and Connector
-+ *
-+ * Copyright (C) 2013 Renesas Corporation
-+ *
-+ * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ */
-+
-+#include <drm/drmP.h>
-+#include <drm/drm_crtc.h>
-+#include <drm/drm_crtc_helper.h>
-+
-+#include "rcar_du_drv.h"
-+#include "rcar_du_kms.h"
-+#include "rcar_du_vga.h"
-+
-+/* -----------------------------------------------------------------------------
-+ * Connector
-+ */
-+
-+static int rcar_du_vga_connector_get_modes(struct drm_connector *connector)
-+{
-+	return 0;
-+}
-+
-+static int rcar_du_vga_connector_mode_valid(struct drm_connector *connector,
-+					    struct drm_display_mode *mode)
-+{
-+	return MODE_OK;
-+}
-+
-+static const struct drm_connector_helper_funcs connector_helper_funcs = {
-+	.get_modes = rcar_du_vga_connector_get_modes,
-+	.mode_valid = rcar_du_vga_connector_mode_valid,
-+	.best_encoder = rcar_du_connector_best_encoder,
-+};
-+
-+static void rcar_du_vga_connector_destroy(struct drm_connector *connector)
-+{
-+	drm_sysfs_connector_remove(connector);
-+	drm_connector_cleanup(connector);
-+}
-+
-+static enum drm_connector_status
-+rcar_du_vga_connector_detect(struct drm_connector *connector, bool force)
-+{
-+	return connector_status_unknown;
-+}
-+
-+static const struct drm_connector_funcs connector_funcs = {
-+	.dpms = drm_helper_connector_dpms,
-+	.detect = rcar_du_vga_connector_detect,
-+	.fill_modes = drm_helper_probe_single_connector_modes,
-+	.destroy = rcar_du_vga_connector_destroy,
-+};
-+
-+static int rcar_du_vga_connector_init(struct rcar_du_device *rcdu,
-+				      struct rcar_du_encoder *renc)
-+{
-+	struct rcar_du_connector *rcon;
-+	struct drm_connector *connector;
-+	int ret;
-+
-+	rcon = devm_kzalloc(rcdu->dev, sizeof(*rcon), GFP_KERNEL);
-+	if (rcon == NULL)
-+		return -ENOMEM;
-+
-+	connector = &rcon->connector;
-+	connector->display_info.width_mm = 0;
-+	connector->display_info.height_mm = 0;
-+
-+	ret = drm_connector_init(rcdu->ddev, connector, &connector_funcs,
-+				 DRM_MODE_CONNECTOR_VGA);
-+	if (ret < 0)
-+		return ret;
-+
-+	drm_connector_helper_add(connector, &connector_helper_funcs);
-+	ret = drm_sysfs_connector_add(connector);
-+	if (ret < 0)
-+		return ret;
-+
-+	drm_helper_connector_dpms(connector, DRM_MODE_DPMS_OFF);
-+	drm_object_property_set_value(&connector->base,
-+		rcdu->ddev->mode_config.dpms_property, DRM_MODE_DPMS_OFF);
-+
-+	ret = drm_mode_connector_attach_encoder(connector, &renc->encoder);
-+	if (ret < 0)
-+		return ret;
-+
-+	connector->encoder = &renc->encoder;
-+	rcon->encoder = renc;
-+
-+	return 0;
-+}
-+
-+/* -----------------------------------------------------------------------------
-+ * Encoder
-+ */
-+
-+static void rcar_du_vga_encoder_dpms(struct drm_encoder *encoder, int mode)
-+{
-+}
-+
-+static bool rcar_du_vga_encoder_mode_fixup(struct drm_encoder *encoder,
-+					   const struct drm_display_mode *mode,
-+					   struct drm_display_mode *adjusted_mode)
-+{
-+	return true;
-+}
-+
-+static const struct drm_encoder_helper_funcs encoder_helper_funcs = {
-+	.dpms = rcar_du_vga_encoder_dpms,
-+	.mode_fixup = rcar_du_vga_encoder_mode_fixup,
-+	.prepare = rcar_du_encoder_mode_prepare,
-+	.commit = rcar_du_encoder_mode_commit,
-+	.mode_set = rcar_du_encoder_mode_set,
-+};
-+
-+static const struct drm_encoder_funcs encoder_funcs = {
-+	.destroy = drm_encoder_cleanup,
-+};
-+
-+int rcar_du_vga_init(struct rcar_du_device *rcdu,
-+		     const struct rcar_du_encoder_vga_data *data,
-+		     unsigned int output)
-+{
-+	struct rcar_du_encoder *renc;
-+	int ret;
-+
-+	renc = devm_kzalloc(rcdu->dev, sizeof(*renc), GFP_KERNEL);
-+	if (renc == NULL)
-+		return -ENOMEM;
-+
-+	renc->output = output;
-+
-+	ret = drm_encoder_init(rcdu->ddev, &renc->encoder, &encoder_funcs,
-+			       DRM_MODE_ENCODER_DAC);
-+	if (ret < 0)
-+		return ret;
-+
-+	drm_encoder_helper_add(&renc->encoder, &encoder_helper_funcs);
-+
-+	return rcar_du_vga_connector_init(rcdu, renc);
-+}
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vga.h b/drivers/gpu/drm/rcar-du/rcar_du_vga.h
-new file mode 100644
-index 000000000000..66b4d2d7190d
---- /dev/null
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_vga.h
-@@ -0,0 +1,24 @@
-+/*
-+ * rcar_du_vga.h  --  R-Car Display Unit VGA DAC and Connector
-+ *
-+ * Copyright (C) 2013 Renesas Corporation
-+ *
-+ * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ */
-+
-+#ifndef __RCAR_DU_VGA_H__
-+#define __RCAR_DU_VGA_H__
-+
-+struct rcar_du_device;
-+struct rcar_du_encoder_vga_data;
-+
-+int rcar_du_vga_init(struct rcar_du_device *rcdu,
-+		     const struct rcar_du_encoder_vga_data *data,
-+		     unsigned int output);
-+
-+#endif /* __RCAR_DU_VGA_H__ */
-diff --git a/include/linux/platform_data/rcar-du.h b/include/linux/platform_data/rcar-du.h
-new file mode 100644
-index 000000000000..80587fdbba3e
---- /dev/null
-+++ b/include/linux/platform_data/rcar-du.h
-@@ -0,0 +1,54 @@
-+/*
-+ * rcar_du.h  --  R-Car Display Unit DRM driver
-+ *
-+ * Copyright (C) 2013 Renesas Corporation
-+ *
-+ * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ */
-+
-+#ifndef __RCAR_DU_H__
-+#define __RCAR_DU_H__
-+
-+#include <drm/drm_mode.h>
-+
-+enum rcar_du_encoder_type {
-+	RCAR_DU_ENCODER_UNUSED = 0,
-+	RCAR_DU_ENCODER_VGA,
-+	RCAR_DU_ENCODER_LVDS,
-+};
-+
-+struct rcar_du_panel_data {
-+	unsigned int width_mm;		/* Panel width in mm */
-+	unsigned int height_mm;		/* Panel height in mm */
-+	struct drm_mode_modeinfo mode;
-+};
-+
-+struct rcar_du_encoder_lvds_data {
-+	struct rcar_du_panel_data panel;
-+};
-+
-+struct rcar_du_encoder_vga_data {
-+	/* TODO: Add DDC information for EDID retrieval */
-+};
-+
-+struct rcar_du_encoder_data {
-+	enum rcar_du_encoder_type encoder;
-+	unsigned int output;
-+
-+	union {
-+		struct rcar_du_encoder_lvds_data lvds;
-+		struct rcar_du_encoder_vga_data vga;
-+	} u;
-+};
-+
-+struct rcar_du_platform_data {
-+	struct rcar_du_encoder_data *encoders;
-+	unsigned int num_encoders;
-+};
-+
-+#endif /* __RCAR_DU_H__ */
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0009-gpio-rcar-Support-both-edge-trigger-with-DT.patch b/patches.renesas/0009-gpio-rcar-Support-both-edge-trigger-with-DT.patch
deleted file mode 100644
index bd02a768fe036..0000000000000
--- a/patches.renesas/0009-gpio-rcar-Support-both-edge-trigger-with-DT.patch
+++ /dev/null
@@ -1,128 +0,0 @@
-From 014d3e2a7927a4c67f1a9f1c3112f2d597208b9b Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 29 Nov 2013 14:48:00 +0100
-Subject: gpio: rcar: Support both edge trigger with DT
-
-Some versions of the R-Car GPIO controller support triggering on both
-edges of the input signal. Whether this capability is supported is
-currently specified in platform data. R-Car GPIO devices instantiated
-from the device tree have the capability turned off even when the
-hardware supports it.
-
-To fix this, add DT match data support to the driver, initialize both
-edge trigger support from match data and enable both edge trigger in
-r8a7790 and r8a7791 match data.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-(cherry picked from commit 850dfe17e3c467f50a0b9a527a65831873740c23)
-(Queued by Linus Walleij for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpio/gpio-rcar.c | 56 +++++++++++++++++++++++++++++++++++++-----------
- 1 file changed, 43 insertions(+), 13 deletions(-)
-
-diff --git a/drivers/gpio/gpio-rcar.c b/drivers/gpio/gpio-rcar.c
-index b0238442f737..6bb29c40a763 100644
---- a/drivers/gpio/gpio-rcar.c
-+++ b/drivers/gpio/gpio-rcar.c
-@@ -284,7 +284,34 @@ static struct irq_domain_ops gpio_rcar_irq_domain_ops = {
- 	.map	= gpio_rcar_irq_domain_map,
- };
- 
--static void gpio_rcar_parse_pdata(struct gpio_rcar_priv *p)
-+struct gpio_rcar_info {
-+	bool has_both_edge_trigger;
-+};
-+
-+static const struct of_device_id gpio_rcar_of_table[] = {
-+	{
-+		.compatible = "renesas,gpio-r8a7790",
-+		.data = (void *)&(const struct gpio_rcar_info) {
-+			.has_both_edge_trigger = true,
-+		},
-+	}, {
-+		.compatible = "renesas,gpio-r8a7791",
-+		.data = (void *)&(const struct gpio_rcar_info) {
-+			.has_both_edge_trigger = true,
-+		},
-+	}, {
-+		.compatible = "renesas,gpio-rcar",
-+		.data = (void *)&(const struct gpio_rcar_info) {
-+			.has_both_edge_trigger = false,
-+		},
-+	}, {
-+		/* Terminator */
-+	},
-+};
-+
-+MODULE_DEVICE_TABLE(of, gpio_rcar_of_table);
-+
-+static int gpio_rcar_parse_pdata(struct gpio_rcar_priv *p)
- {
- 	struct gpio_rcar_config *pdata = p->pdev->dev.platform_data;
- 	struct device_node *np = p->pdev->dev.of_node;
-@@ -294,11 +321,21 @@ static void gpio_rcar_parse_pdata(struct gpio_rcar_priv *p)
- 	if (pdata) {
- 		p->config = *pdata;
- 	} else if (IS_ENABLED(CONFIG_OF) && np) {
-+		const struct of_device_id *match;
-+		const struct gpio_rcar_info *info;
-+
-+		match = of_match_node(gpio_rcar_of_table, np);
-+		if (!match)
-+			return -EINVAL;
-+
-+		info = match->data;
-+
- 		ret = of_parse_phandle_with_fixed_args(np, "gpio-ranges", 3, 0,
- 						       &args);
- 		p->config.number_of_pins = ret == 0 ? args.args[2]
- 					 : RCAR_MAX_GPIO_PER_BANK;
- 		p->config.gpio_base = -1;
-+		p->config.has_both_edge_trigger = info->has_both_edge_trigger;
- 	}
- 
- 	if (p->config.number_of_pins == 0 ||
-@@ -308,6 +345,8 @@ static void gpio_rcar_parse_pdata(struct gpio_rcar_priv *p)
- 			 p->config.number_of_pins, RCAR_MAX_GPIO_PER_BANK);
- 		p->config.number_of_pins = RCAR_MAX_GPIO_PER_BANK;
- 	}
-+
-+	return 0;
- }
- 
- static int gpio_rcar_probe(struct platform_device *pdev)
-@@ -330,7 +369,9 @@ static int gpio_rcar_probe(struct platform_device *pdev)
- 	spin_lock_init(&p->lock);
- 
- 	/* Get device configuration from DT node or platform data. */
--	gpio_rcar_parse_pdata(p);
-+	ret = gpio_rcar_parse_pdata(p);
-+	if (ret < 0)
-+		return ret;
- 
- 	platform_set_drvdata(pdev, p);
- 
-@@ -435,17 +476,6 @@ static int gpio_rcar_remove(struct platform_device *pdev)
- 	return 0;
- }
- 
--#ifdef CONFIG_OF
--static const struct of_device_id gpio_rcar_of_table[] = {
--	{
--		.compatible = "renesas,gpio-rcar",
--	},
--	{ },
--};
--
--MODULE_DEVICE_TABLE(of, gpio_rcar_of_table);
--#endif
--
- static struct platform_driver gpio_rcar_device_driver = {
- 	.probe		= gpio_rcar_probe,
- 	.remove		= gpio_rcar_remove,
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0010-drivers-irq-chip-irq-gic-introduce-gic_cpu_if_down.patch b/patches.renesas/0010-drivers-irq-chip-irq-gic-introduce-gic_cpu_if_down.patch
deleted file mode 100644
index 83128427f20ac..0000000000000
--- a/patches.renesas/0010-drivers-irq-chip-irq-gic-introduce-gic_cpu_if_down.patch
+++ /dev/null
@@ -1,67 +0,0 @@
-From 2fb0420dd6b871c2e1c7d7cf19098a8dc1bb8c5b Mon Sep 17 00:00:00 2001
-From: Nicolas Pitre <nicolas.pitre@linaro.org>
-Date: Tue, 19 Mar 2013 23:59:04 -0400
-Subject: drivers: irq-chip: irq-gic: introduce gic_cpu_if_down()
-
-When processors are about to hit low power states, the assertion of
-standbywfi signal, triggered by the wfi instruction, is essential to
-entering low power modes. If an IRQ is pending on the processor at the
-time wfi is issued, the wfi instruction completes and the processor
-restarts execution without asserting the standbywfi signal. Depending
-on the platform power controller HW this behaviour can be acceptable or
-not; if this behaviour must be prevented software should be provided
-with a way to disable the routing of interrupts to the core IRQ pins.
-
-On systems where raw GIC distributor interrupts are connected to the power
-controller as wake-up events (hence the power controller still senses
-IRQs and can wake up cores upon IRQ pending), the GIC CPU interface can
-be disabled on power down, so that the GIC CPU IF output is gated and wfi
-cannot complete, thereby preventing the standbywfi issue.
-
-This patch adds a simple function to the GIC driver that allows to
-disable the GIC CPU IF from power down procedures.
-
-Signed-off-by: Nicolas Pitre <nico@linaro.org>
-Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
-[rewrote commit log]
-
-Signed-off-by: Olof Johansson <olof@lixom.net>
-(cherry picked from commit 10d9eb8a17cfb697967928bde06f3e7e530b03ac)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/irqchip/irq-gic.c       | 6 ++++++
- include/linux/irqchip/arm-gic.h | 1 +
- 2 files changed, 7 insertions(+)
-
-diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
-index 19ceaa60..fe44d3e2 100644
---- a/drivers/irqchip/irq-gic.c
-+++ b/drivers/irqchip/irq-gic.c
-@@ -453,6 +453,12 @@ static void __cpuinit gic_cpu_init(struct gic_chip_data *gic)
- 	writel_relaxed(1, base + GIC_CPU_CTRL);
- }
- 
-+void gic_cpu_if_down(void)
-+{
-+	void __iomem *cpu_base = gic_data_cpu_base(&gic_data[0]);
-+	writel_relaxed(0, cpu_base + GIC_CPU_CTRL);
-+}
-+
- #ifdef CONFIG_CPU_PM
- /*
-  * Saves the GIC distributor registers during suspend or idle.  Must be called
-diff --git a/include/linux/irqchip/arm-gic.h b/include/linux/irqchip/arm-gic.h
-index 3e203eb2..0e5d9ecd 100644
---- a/include/linux/irqchip/arm-gic.h
-+++ b/include/linux/irqchip/arm-gic.h
-@@ -66,6 +66,7 @@ extern struct irq_chip gic_arch_extn;
- void gic_init_bases(unsigned int, int, void __iomem *, void __iomem *,
- 		    u32 offset, struct device_node *);
- void gic_cascade_irq(unsigned int gic_nr, unsigned int irq);
-+void gic_cpu_if_down(void);
- 
- static inline void gic_init(unsigned int nr, int start,
- 			    void __iomem *dist , void __iomem *cpu)
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0010-drm-rcar-du-Don-t-ignore-rcar_du_crtc_create-return-.patch b/patches.renesas/0010-drm-rcar-du-Don-t-ignore-rcar_du_crtc_create-return-.patch
deleted file mode 100644
index 7a94b5ff4d322..0000000000000
--- a/patches.renesas/0010-drm-rcar-du-Don-t-ignore-rcar_du_crtc_create-return-.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From e9adc96a1b1b04e5e7996707d14306313f898f22 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 4 Jul 2013 20:05:50 +0200
-Subject: drm/rcar-du: Don't ignore rcar_du_crtc_create() return value
-
-Handle error cases correctly.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit 3463ff67bc8d049098559adb850299c26b52350d)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/rcar-du/rcar_du_kms.c | 7 +++++--
- 1 file changed, 5 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms.c b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
-index 9c63f39658de..06cacf6532c0 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_kms.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
-@@ -191,8 +191,11 @@ int rcar_du_modeset_init(struct rcar_du_device *rcdu)
- 	if (ret < 0)
- 		return ret;
- 
--	for (i = 0; i < ARRAY_SIZE(rcdu->crtcs); ++i)
--		rcar_du_crtc_create(rcdu, i);
-+	for (i = 0; i < ARRAY_SIZE(rcdu->crtcs); ++i) {
-+		ret = rcar_du_crtc_create(rcdu, i);
-+		if (ret < 0)
-+			return ret;
-+	}
- 
- 	rcdu->used_crtcs = 0;
- 	rcdu->num_crtcs = i;
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0010-gpio-rcar-Use-lazy-disable.patch b/patches.renesas/0010-gpio-rcar-Use-lazy-disable.patch
deleted file mode 100644
index c857deeece33f..0000000000000
--- a/patches.renesas/0010-gpio-rcar-Use-lazy-disable.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From 0ff9af6608e43abe9ba2ed1f6e1fb75a57b0ef5e Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Wed, 20 Nov 2013 09:23:08 +0900
-Subject: gpio: rcar: Use lazy disable
-
-Set the ->irq_enable() and ->irq_disable() methods to NULL
-to enable lazy disable of interrupts. This by itself provides
-some level of optimization, but is mainly enabled as ground
-work for future Suspend-to-RAM wake up support.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-(cherry picked from commit fba968a1e6b84be01e548f4b28b78e0542f3adaa)
-(Queued by Linus Walleij for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpio/gpio-rcar.c | 2 --
- 1 file changed, 2 deletions(-)
-
-diff --git a/drivers/gpio/gpio-rcar.c b/drivers/gpio/gpio-rcar.c
-index 6bb29c40a763..496c58ffac35 100644
---- a/drivers/gpio/gpio-rcar.c
-+++ b/drivers/gpio/gpio-rcar.c
-@@ -410,8 +410,6 @@ static int gpio_rcar_probe(struct platform_device *pdev)
- 	irq_chip->name = name;
- 	irq_chip->irq_mask = gpio_rcar_irq_disable;
- 	irq_chip->irq_unmask = gpio_rcar_irq_enable;
--	irq_chip->irq_enable = gpio_rcar_irq_enable;
--	irq_chip->irq_disable = gpio_rcar_irq_disable;
- 	irq_chip->irq_set_type = gpio_rcar_irq_set_type;
- 	irq_chip->flags	= IRQCHIP_SKIP_SET_WAKE | IRQCHIP_SET_TYPE_MASKED;
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0011-drm-rcar-du-Fix-buffer-pitch-alignment.patch b/patches.renesas/0011-drm-rcar-du-Fix-buffer-pitch-alignment.patch
deleted file mode 100644
index ca43c78565e57..0000000000000
--- a/patches.renesas/0011-drm-rcar-du-Fix-buffer-pitch-alignment.patch
+++ /dev/null
@@ -1,89 +0,0 @@
-From 0bfd4e77e36f620192682f5211edec62dcf7d7c9 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 4 Jul 2013 20:05:51 +0200
-Subject: drm/rcar-du: Fix buffer pitch alignment
-
-The DU requires a 16 pixels pitch alignement. Make sure dumb buffers are
-allocated with the correct pitch, and validate the pitch when creating
-frame buffers.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Dave Airlie <airlied@redhat.com>
-(cherry picked from commit 59e32642d2e8fb170a1e777906dcb13359ea230f)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/rcar-du/rcar_du_drv.c |  2 +-
- drivers/gpu/drm/rcar-du/rcar_du_kms.c | 19 ++++++++++++++++++-
- drivers/gpu/drm/rcar-du/rcar_du_kms.h |  3 +++
- 3 files changed, 22 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.c b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-index 003b34ee38e3..ff82877de876 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-@@ -251,7 +251,7 @@ static struct drm_driver rcar_du_driver = {
- 	.prime_fd_to_handle	= drm_gem_prime_fd_to_handle,
- 	.gem_prime_import	= drm_gem_cma_dmabuf_import,
- 	.gem_prime_export	= drm_gem_cma_dmabuf_export,
--	.dumb_create		= drm_gem_cma_dumb_create,
-+	.dumb_create		= rcar_du_dumb_create,
- 	.dumb_map_offset	= drm_gem_cma_dumb_map_offset,
- 	.dumb_destroy		= drm_gem_cma_dumb_destroy,
- 	.fops			= &rcar_du_fops,
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms.c b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
-index 06cacf6532c0..d30c2e29bee2 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_kms.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
-@@ -138,11 +138,25 @@ void rcar_du_encoder_mode_commit(struct drm_encoder *encoder)
-  * Frame buffer
-  */
- 
-+int rcar_du_dumb_create(struct drm_file *file, struct drm_device *dev,
-+			struct drm_mode_create_dumb *args)
-+{
-+	unsigned int min_pitch = DIV_ROUND_UP(args->width * args->bpp, 8);
-+	unsigned int align;
-+
-+	/* The pitch must be aligned to a 16 pixels boundary. */
-+	align = 16 * args->bpp / 8;
-+	args->pitch = roundup(max(args->pitch, min_pitch), align);
-+
-+	return drm_gem_cma_dumb_create(file, dev, args);
-+}
-+
- static struct drm_framebuffer *
- rcar_du_fb_create(struct drm_device *dev, struct drm_file *file_priv,
- 		  struct drm_mode_fb_cmd2 *mode_cmd)
- {
- 	const struct rcar_du_format_info *format;
-+	unsigned int align;
- 
- 	format = rcar_du_format_info(mode_cmd->pixel_format);
- 	if (format == NULL) {
-@@ -151,7 +165,10 @@ rcar_du_fb_create(struct drm_device *dev, struct drm_file *file_priv,
- 		return ERR_PTR(-EINVAL);
- 	}
- 
--	if (mode_cmd->pitches[0] & 15 || mode_cmd->pitches[0] >= 8192) {
-+	align = 16 * format->bpp / 8;
-+
-+	if (mode_cmd->pitches[0] & (align - 1) ||
-+	    mode_cmd->pitches[0] >= 8192) {
- 		dev_dbg(dev->dev, "invalid pitch value %u\n",
- 			mode_cmd->pitches[0]);
- 		return ERR_PTR(-EINVAL);
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms.h b/drivers/gpu/drm/rcar-du/rcar_du_kms.h
-index e4d8db069a06..dba472263486 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_kms.h
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_kms.h
-@@ -56,4 +56,7 @@ void rcar_du_encoder_mode_commit(struct drm_encoder *encoder);
- 
- int rcar_du_modeset_init(struct rcar_du_device *rcdu);
- 
-+int rcar_du_dumb_create(struct drm_file *file, struct drm_device *dev,
-+			struct drm_mode_create_dumb *args);
-+
- #endif /* __RCAR_DU_KMS_H__ */
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0011-gpio-rcar-Enable-mask-on-suspend.patch b/patches.renesas/0011-gpio-rcar-Enable-mask-on-suspend.patch
deleted file mode 100644
index a5d71c9bd5733..0000000000000
--- a/patches.renesas/0011-gpio-rcar-Enable-mask-on-suspend.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From 2a3e6fb4e0e65a79289c91eed676cc7ea5c2f8f2 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Wed, 20 Nov 2013 09:23:17 +0900
-Subject: gpio: rcar: Enable mask on suspend
-
-Now when lazy interrupt disable has been enabled in the driver
-then extend the code to set IRQCHIP_MASK_ON_SUSPEND which tells
-the core that only IRQs marked as wakeups need to stay enabled
-during Suspend-to-RAM.
-
-Tested on the Lager board with GPIO-keys and Suspend-to-RAM.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-(cherry picked from commit 403961120667bed7161777d33483596edd0b05f2)
-(Queued by Linus Walleij for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpio/gpio-rcar.c | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpio/gpio-rcar.c b/drivers/gpio/gpio-rcar.c
-index 496c58ffac35..9ed792121dd0 100644
---- a/drivers/gpio/gpio-rcar.c
-+++ b/drivers/gpio/gpio-rcar.c
-@@ -411,7 +411,8 @@ static int gpio_rcar_probe(struct platform_device *pdev)
- 	irq_chip->irq_mask = gpio_rcar_irq_disable;
- 	irq_chip->irq_unmask = gpio_rcar_irq_enable;
- 	irq_chip->irq_set_type = gpio_rcar_irq_set_type;
--	irq_chip->flags	= IRQCHIP_SKIP_SET_WAKE | IRQCHIP_SET_TYPE_MASKED;
-+	irq_chip->flags	= IRQCHIP_SKIP_SET_WAKE | IRQCHIP_SET_TYPE_MASKED
-+			 | IRQCHIP_MASK_ON_SUSPEND;
- 
- 	p->irq_domain = irq_domain_add_simple(pdev->dev.of_node,
- 					      p->config.number_of_pins,
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0011-irqchip-renesas-intc-irqpin-DT-binding-for-sense-bit.patch b/patches.renesas/0011-irqchip-renesas-intc-irqpin-DT-binding-for-sense-bit.patch
deleted file mode 100644
index d63187db5a2f7..0000000000000
--- a/patches.renesas/0011-irqchip-renesas-intc-irqpin-DT-binding-for-sense-bit.patch
+++ /dev/null
@@ -1,65 +0,0 @@
-From 0a1f2e30fccc5e556d0fd6e1db06fe62ca5f09b3 Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Thu, 13 Jun 2013 11:23:38 +0200
-Subject: irqchip: renesas-intc-irqpin: DT binding for sense bitfield width
-
-Most Renesas irqpin controllers have 4-bit sense fields, however, some
-have different widths. This patch adds a DT binding to optionally
-specify such non-standard values.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Acked-by: Arnd Bergmann <arnd@arndb.de>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 894db164260c39870ea79e473e1307b4aa5e4257)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- .../bindings/interrupt-controller/renesas,intc-irqpin.txt  | 14 ++++++++++++++
- drivers/irqchip/irq-renesas-intc-irqpin.c                  |  4 ++++
- 2 files changed, 18 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt
-
-diff --git a/Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt b/Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt
-new file mode 100644
-index 00000000..66fcaf5b
---- /dev/null
-+++ b/Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt
-@@ -0,0 +1,14 @@
-+DT bindings for the R-/SH-Mobile irqpin controller
-+
-+Required properties:
-+
-+- compatible: has to be "renesas,intc-irqpin"
-+- #interrupt-cells: has to be <2>: an interrupt index and flags, as defined in
-+  interrupts.txt in this directory
-+
-+Optional properties:
-+
-+- any properties, listed in interrupts.txt, and any standard resource allocation
-+  properties
-+- sense-bitfield-width: width of a single sense bitfield in the SENSE register,
-+  if different from the default 4 bits
-diff --git a/drivers/irqchip/irq-renesas-intc-irqpin.c b/drivers/irqchip/irq-renesas-intc-irqpin.c
-index 5a68e5ac..4aca1b2b 100644
---- a/drivers/irqchip/irq-renesas-intc-irqpin.c
-+++ b/drivers/irqchip/irq-renesas-intc-irqpin.c
-@@ -18,6 +18,7 @@
-  */
- 
- #include <linux/init.h>
-+#include <linux/of.h>
- #include <linux/platform_device.h>
- #include <linux/spinlock.h>
- #include <linux/interrupt.h>
-@@ -349,6 +350,9 @@ static int intc_irqpin_probe(struct platform_device *pdev)
- 	/* deal with driver instance configuration */
- 	if (pdata)
- 		memcpy(&p->config, pdata, sizeof(*pdata));
-+	else
-+		of_property_read_u32(pdev->dev.of_node, "sense-bitfield-width",
-+				     &p->config.sense_bitfield_width);
- 	if (!p->config.sense_bitfield_width)
- 		p->config.sense_bitfield_width = 4; /* default to 4 bits */
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0012-ARM-shmobile-irqpin-add-a-DT-property-to-enable-mask.patch b/patches.renesas/0012-ARM-shmobile-irqpin-add-a-DT-property-to-enable-mask.patch
deleted file mode 100644
index 42ec72a14cf92..0000000000000
--- a/patches.renesas/0012-ARM-shmobile-irqpin-add-a-DT-property-to-enable-mask.patch
+++ /dev/null
@@ -1,54 +0,0 @@
-From 3422f9f5073e5bbd67b6e182af7a839dd9499d23 Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Wed, 19 Jun 2013 07:53:09 +0200
-Subject: ARM: shmobile: irqpin: add a DT property to enable masking on parent
-
-To disable spurious interrupts, that get triggered on certain hardware, the
-irqpin driver masks them on the parent interrupt controller. To specify
-such broken devices a .control_parent parameter can be provided in the
-platform data. In the DT case we need a property, to do the same.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Acked-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit c4fa4946f177ae214523586cd794ac18d34b1430)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- .../bindings/interrupt-controller/renesas,intc-irqpin.txt          | 2 ++
- drivers/irqchip/irq-renesas-intc-irqpin.c                          | 7 +++++--
- 2 files changed, 7 insertions(+), 2 deletions(-)
-
-diff --git a/Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt b/Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt
-index 66fcaf5b..1f8b0c50 100644
---- a/Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt
-+++ b/Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt
-@@ -12,3 +12,5 @@ Optional properties:
-   properties
- - sense-bitfield-width: width of a single sense bitfield in the SENSE register,
-   if different from the default 4 bits
-+- control-parent: disable and enable interrupts on the parent interrupt
-+  controller, needed for some broken implementations
-diff --git a/drivers/irqchip/irq-renesas-intc-irqpin.c b/drivers/irqchip/irq-renesas-intc-irqpin.c
-index 4aca1b2b..82cec63a 100644
---- a/drivers/irqchip/irq-renesas-intc-irqpin.c
-+++ b/drivers/irqchip/irq-renesas-intc-irqpin.c
-@@ -348,11 +348,14 @@ static int intc_irqpin_probe(struct platform_device *pdev)
- 	}
- 
- 	/* deal with driver instance configuration */
--	if (pdata)
-+	if (pdata) {
- 		memcpy(&p->config, pdata, sizeof(*pdata));
--	else
-+	} else {
- 		of_property_read_u32(pdev->dev.of_node, "sense-bitfield-width",
- 				     &p->config.sense_bitfield_width);
-+		p->config.control_parent = of_property_read_bool(pdev->dev.of_node,
-+								 "control-parent");
-+	}
- 	if (!p->config.sense_bitfield_width)
- 		p->config.sense_bitfield_width = 4; /* default to 4 bits */
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0012-drm-rcar-du-Add-missing-alpha-plane-register-definit.patch b/patches.renesas/0012-drm-rcar-du-Add-missing-alpha-plane-register-definit.patch
deleted file mode 100644
index af5b9767a89de..0000000000000
--- a/patches.renesas/0012-drm-rcar-du-Add-missing-alpha-plane-register-definit.patch
+++ /dev/null
@@ -1,47 +0,0 @@
-From d76d7566779648bca1ba9013c7ac13398b530ff6 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Mon, 3 Jun 2013 10:53:48 +0200
-Subject: drm/rcar-du: Add missing alpha plane register definitions
-
-Several alpha plane register definitions are missing, add them.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit 6811b1bea98462e228fef2172c36f1543ac156fe)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/rcar-du/rcar_du_regs.h | 15 +++++++++++++++
- 1 file changed, 15 insertions(+)
-
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_regs.h b/drivers/gpu/drm/rcar-du/rcar_du_regs.h
-index 69f21f19b51c..3aba27ffc065 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_regs.h
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_regs.h
-@@ -349,10 +349,25 @@
- #define APnMR_BM_AD		(2 << 4)	/* Auto Display Change Mode */
- 
- #define APnMWR			0x0a104
-+
-+#define APnDSXR			0x0a110
-+#define APnDSYR			0x0a114
-+#define APnDPXR			0x0a118
-+#define APnDPYR			0x0a11c
-+
- #define APnDSA0R		0x0a120
- #define APnDSA1R		0x0a124
- #define APnDSA2R		0x0a128
-+
-+#define APnSPXR			0x0a130
-+#define APnSPYR			0x0a134
-+#define APnWASPR		0x0a138
-+#define APnWAMWR		0x0a13c
-+
-+#define APnBTR			0x0a140
-+
- #define APnMLR			0x0a150
-+#define APnSWAPR		0x0a180
- 
- /* -----------------------------------------------------------------------------
-  * Display Capture Registers
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0012-gpio-em-Use-lazy-disable.patch b/patches.renesas/0012-gpio-em-Use-lazy-disable.patch
deleted file mode 100644
index f5db66c7a98db..0000000000000
--- a/patches.renesas/0012-gpio-em-Use-lazy-disable.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From 0769eca8f10f41afd316902e85ee52785f96667b Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Wed, 20 Nov 2013 09:23:35 +0900
-Subject: gpio: em: Use lazy disable
-
-Set the ->irq_enable() and ->irq_disable() methods to NULL
-to enable lazy disable of interrupts. This by itself provides
-some level of optimization, but is mainly enabled as ground
-work for future Suspend-to-RAM wake up support.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-(cherry picked from commit 664734c012e6f3a88b2da4c586002cd62a277003)
-(Queued by Linus Walleij for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpio/gpio-em.c | 2 --
- 1 file changed, 2 deletions(-)
-
-diff --git a/drivers/gpio/gpio-em.c b/drivers/gpio/gpio-em.c
-index ec190361bf2e..5b518e784824 100644
---- a/drivers/gpio/gpio-em.c
-+++ b/drivers/gpio/gpio-em.c
-@@ -336,8 +336,6 @@ static int em_gio_probe(struct platform_device *pdev)
- 	irq_chip->name = name;
- 	irq_chip->irq_mask = em_gio_irq_disable;
- 	irq_chip->irq_unmask = em_gio_irq_enable;
--	irq_chip->irq_enable = em_gio_irq_enable;
--	irq_chip->irq_disable = em_gio_irq_disable;
- 	irq_chip->irq_set_type = em_gio_irq_set_type;
- 	irq_chip->flags	= IRQCHIP_SKIP_SET_WAKE;
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0013-drm-rcar-du-Use-devm_ioremap_resource.patch b/patches.renesas/0013-drm-rcar-du-Use-devm_ioremap_resource.patch
deleted file mode 100644
index 07b4113f11ec3..0000000000000
--- a/patches.renesas/0013-drm-rcar-du-Use-devm_ioremap_resource.patch
+++ /dev/null
@@ -1,58 +0,0 @@
-From 5a59fb17be2ec494812e1e477d609c98e1b10e44 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Mon, 17 Jun 2013 02:29:07 +0200
-Subject: drm/rcar-du: Use devm_ioremap_resource()
-
-Replace the devm_request_mem_region() and devm_ioremap_nocache() calls
-with devm_ioremap_resource().
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit d5b6dcc45950bc727f6a02d0ee68c99d0b6052ea)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/rcar-du/rcar_du_drv.c | 22 +++-------------------
- 1 file changed, 3 insertions(+), 19 deletions(-)
-
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.c b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-index ff82877de876..910c1e179036 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-@@ -107,7 +107,6 @@ static int rcar_du_load(struct drm_device *dev, unsigned long flags)
- 	struct platform_device *pdev = dev->platformdev;
- 	struct rcar_du_platform_data *pdata = pdev->dev.platform_data;
- 	struct rcar_du_device *rcdu;
--	struct resource *ioarea;
- 	struct resource *mem;
- 	int ret;
- 
-@@ -129,24 +128,9 @@ static int rcar_du_load(struct drm_device *dev, unsigned long flags)
- 
- 	/* I/O resources and clocks */
- 	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
--	if (mem == NULL) {
--		dev_err(&pdev->dev, "failed to get memory resource\n");
--		return -EINVAL;
--	}
--
--	ioarea = devm_request_mem_region(&pdev->dev, mem->start,
--					 resource_size(mem), pdev->name);
--	if (ioarea == NULL) {
--		dev_err(&pdev->dev, "failed to request memory region\n");
--		return -EBUSY;
--	}
--
--	rcdu->mmio = devm_ioremap_nocache(&pdev->dev, ioarea->start,
--					  resource_size(ioarea));
--	if (rcdu->mmio == NULL) {
--		dev_err(&pdev->dev, "failed to remap memory resource\n");
--		return -ENOMEM;
--	}
-+	rcdu->mmio = devm_ioremap_resource(&pdev->dev, mem);
-+	if (IS_ERR(rcdu->mmio))
-+		return PTR_ERR(rcdu->mmio);
- 
- 	rcdu->clock = devm_clk_get(&pdev->dev, NULL);
- 	if (IS_ERR(rcdu->clock)) {
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0013-gpio-em-Enable-mask-on-suspend.patch b/patches.renesas/0013-gpio-em-Enable-mask-on-suspend.patch
deleted file mode 100644
index 0bb1099e8b256..0000000000000
--- a/patches.renesas/0013-gpio-em-Enable-mask-on-suspend.patch
+++ /dev/null
@@ -1,38 +0,0 @@
-From 6e12a692802ff5fde80410ee2f9949ce3b543a74 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Wed, 20 Nov 2013 09:23:44 +0900
-Subject: gpio: em: Enable mask on suspend
-
-Now when lazy interrupt disable has been enabled in the driver
-then extend the code to set IRQCHIP_MASK_ON_SUSPEND which tells
-the core that only IRQs marked as wakeups need to stay enabled
-during Suspend-to-RAM.
-
-Tested on the KZM9D board with GPIO-keys.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-(cherry picked from commit 03621b60529edfbeb32d199fa754da19574cfefc)
-(Queued by Linus Walleij for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpio/gpio-em.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/gpio/gpio-em.c b/drivers/gpio/gpio-em.c
-index 5b518e784824..d3fc54e0578d 100644
---- a/drivers/gpio/gpio-em.c
-+++ b/drivers/gpio/gpio-em.c
-@@ -337,7 +337,7 @@ static int em_gio_probe(struct platform_device *pdev)
- 	irq_chip->irq_mask = em_gio_irq_disable;
- 	irq_chip->irq_unmask = em_gio_irq_enable;
- 	irq_chip->irq_set_type = em_gio_irq_set_type;
--	irq_chip->flags	= IRQCHIP_SKIP_SET_WAKE;
-+	irq_chip->flags	= IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MASK_ON_SUSPEND;
- 
- 	p->irq_domain = irq_domain_add_simple(pdev->dev.of_node,
- 					      pdata->number_of_pins,
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0014-drm-rcar-du-Add-platform-module-device-table.patch b/patches.renesas/0014-drm-rcar-du-Add-platform-module-device-table.patch
deleted file mode 100644
index 20b60e901fa2c..0000000000000
--- a/patches.renesas/0014-drm-rcar-du-Add-platform-module-device-table.patch
+++ /dev/null
@@ -1,96 +0,0 @@
-From f6b84c4397f9085d223d70b06cdbe8f8d2737b78 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 14 Jun 2013 13:38:33 +0200
-Subject: drm/rcar-du: Add platform module device table
-
-The platform device id driver data field points to a device information
-structure that only contains a (currently empty) features field for now.
-Support for additional model-dependent features will be added later.
-
-Only the R8A7779 variant is currently supported.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit 481d342e3500e71a88cac79a6fab7b62f7203c7c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/rcar-du/rcar_du_drv.c | 13 +++++++++++++
- drivers/gpu/drm/rcar-du/rcar_du_drv.h | 15 +++++++++++++++
- 2 files changed, 28 insertions(+)
-
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.c b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-index 910c1e179036..60836b8d6053 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-@@ -123,6 +123,7 @@ static int rcar_du_load(struct drm_device *dev, unsigned long flags)
- 
- 	rcdu->dev = &pdev->dev;
- 	rcdu->pdata = pdata;
-+	rcdu->info = (struct rcar_du_device_info *)pdev->id_entry->driver_data;
- 	rcdu->ddev = dev;
- 	dev->dev_private = rcdu;
- 
-@@ -292,6 +293,17 @@ static int rcar_du_remove(struct platform_device *pdev)
- 	return 0;
- }
- 
-+static const struct rcar_du_device_info rcar_du_r8a7779_info = {
-+	.features = 0,
-+};
-+
-+static const struct platform_device_id rcar_du_id_table[] = {
-+	{ "rcar-du-r8a7779", (kernel_ulong_t)&rcar_du_r8a7779_info },
-+	{ }
-+};
-+
-+MODULE_DEVICE_TABLE(platform, rcar_du_id_table);
-+
- static struct platform_driver rcar_du_platform_driver = {
- 	.probe		= rcar_du_probe,
- 	.remove		= rcar_du_remove,
-@@ -300,6 +312,7 @@ static struct platform_driver rcar_du_platform_driver = {
- 		.name	= "rcar-du",
- 		.pm	= &rcar_du_pm_ops,
- 	},
-+	.id_table	= rcar_du_id_table,
- };
- 
- module_platform_driver(rcar_du_platform_driver);
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.h b/drivers/gpu/drm/rcar-du/rcar_du_drv.h
-index 193cc59d495c..06dbf4ff139c 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_drv.h
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.h
-@@ -25,9 +25,18 @@ struct clk;
- struct device;
- struct drm_device;
- 
-+/*
-+ * struct rcar_du_device_info - DU model-specific information
-+ * @features: device features (RCAR_DU_FEATURE_*)
-+ */
-+struct rcar_du_device_info {
-+	unsigned int features;
-+};
-+
- struct rcar_du_device {
- 	struct device *dev;
- 	const struct rcar_du_platform_data *pdata;
-+	const struct rcar_du_device_info *info;
- 
- 	void __iomem *mmio;
- 	struct clk *clock;
-@@ -50,6 +59,12 @@ struct rcar_du_device {
- 	} planes;
- };
- 
-+static inline bool rcar_du_has(struct rcar_du_device *rcdu,
-+			       unsigned int feature)
-+{
-+	return rcdu->info->features & feature;
-+}
-+
- int rcar_du_get(struct rcar_du_device *rcdu);
- void rcar_du_put(struct rcar_du_device *rcdu);
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0014-serial-sh-sci-Fix-warnings-due-to-improper-casts-and.patch b/patches.renesas/0014-serial-sh-sci-Fix-warnings-due-to-improper-casts-and.patch
deleted file mode 100644
index 8e5d64a64dedf..0000000000000
--- a/patches.renesas/0014-serial-sh-sci-Fix-warnings-due-to-improper-casts-and.patch
+++ /dev/null
@@ -1,87 +0,0 @@
-From 526e48806d6bac9dd4d85f655f74c6791bc19ffd Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 11 Dec 2013 13:40:31 +0100
-Subject: serial: sh-sci: Fix warnings due to improper casts and printk formats
-
-Use the %zu and %pad printk specifiers to print size_t and dma_addr_t
-variables, and cast pointers to uintptr_t instead of unsigned int where
-applicable. This fixes warnings on platforms where pointers and/or
-dma_addr_t have a different size than int.
-
-Cc: linux-serial@vger.kernel.org
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit e2afca6988c335d2ec7b66f2fadcd63286570bf8)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/tty/serial/sh-sci.c | 19 ++++++++++---------
- 1 file changed, 10 insertions(+), 9 deletions(-)
-
-diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
-index 9d776066b1f6..c9403229c6f8 100644
---- a/drivers/tty/serial/sh-sci.c
-+++ b/drivers/tty/serial/sh-sci.c
-@@ -557,7 +557,7 @@ static inline int sci_rxd_in(struct uart_port *port)
- 		return 1;
- 
- 	/* Cast for ARM damage */
--	return !!__raw_readb((void __iomem *)s->cfg->port_reg);
-+	return !!__raw_readb((void __iomem *)(uintptr_t)s->cfg->port_reg);
- }
- 
- /* ********************************************************************** *
-@@ -1309,7 +1309,7 @@ static int sci_dma_rx_push(struct sci_port *s, size_t count)
- 	}
- 
- 	if (room < count)
--		dev_warn(port->dev, "Rx overrun: dropping %u bytes\n",
-+		dev_warn(port->dev, "Rx overrun: dropping %zu bytes\n",
- 			 count - room);
- 	if (!room)
- 		return room;
-@@ -1442,7 +1442,7 @@ static void work_fn_rx(struct work_struct *work)
- 		int count;
- 
- 		chan->device->device_control(chan, DMA_TERMINATE_ALL, 0);
--		dev_dbg(port->dev, "Read %u bytes with cookie %d\n",
-+		dev_dbg(port->dev, "Read %zu bytes with cookie %d\n",
- 			sh_desc->partial, sh_desc->cookie);
- 
- 		spin_lock_irqsave(&port->lock, flags);
-@@ -1691,16 +1691,17 @@ static void sci_request_dma(struct uart_port *port)
- 		s->chan_tx = chan;
- 		sg_init_table(&s->sg_tx, 1);
- 		/* UART circular tx buffer is an aligned page. */
--		BUG_ON((int)port->state->xmit.buf & ~PAGE_MASK);
-+		BUG_ON((uintptr_t)port->state->xmit.buf & ~PAGE_MASK);
- 		sg_set_page(&s->sg_tx, virt_to_page(port->state->xmit.buf),
--			    UART_XMIT_SIZE, (int)port->state->xmit.buf & ~PAGE_MASK);
-+			    UART_XMIT_SIZE,
-+			    (uintptr_t)port->state->xmit.buf & ~PAGE_MASK);
- 		nent = dma_map_sg(port->dev, &s->sg_tx, 1, DMA_TO_DEVICE);
- 		if (!nent)
- 			sci_tx_dma_release(s, false);
- 		else
--			dev_dbg(port->dev, "%s: mapped %d@%p to %x\n", __func__,
--				sg_dma_len(&s->sg_tx),
--				port->state->xmit.buf, sg_dma_address(&s->sg_tx));
-+			dev_dbg(port->dev, "%s: mapped %d@%p to %pad\n", __func__,
-+				sg_dma_len(&s->sg_tx), port->state->xmit.buf,
-+				&sg_dma_address(&s->sg_tx));
- 
- 		s->sg_len_tx = nent;
- 
-@@ -1740,7 +1741,7 @@ static void sci_request_dma(struct uart_port *port)
- 
- 			sg_init_table(sg, 1);
- 			sg_set_page(sg, virt_to_page(buf[i]), s->buf_len_rx,
--				    (int)buf[i] & ~PAGE_MASK);
-+				    (uintptr_t)buf[i] & ~PAGE_MASK);
- 			sg_dma_address(sg) = dma[i];
- 		}
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0015-clocksource-arch_timer-Make-register-accessors-less-.patch b/patches.renesas/0015-clocksource-arch_timer-Make-register-accessors-less-.patch
deleted file mode 100644
index a0e203beb7c3d..0000000000000
--- a/patches.renesas/0015-clocksource-arch_timer-Make-register-accessors-less-.patch
+++ /dev/null
@@ -1,199 +0,0 @@
-From fe2df0bfc0505cc146d76991f9e2370bd903238a Mon Sep 17 00:00:00 2001
-From: Stephen Boyd <sboyd@codeaurora.org>
-Date: Thu, 18 Jul 2013 16:59:28 -0700
-Subject: clocksource: arch_timer: Make register accessors less error-prone
-
-Using an enum for the register we wish to access allows newer
-compilers to determine if we've forgotten a case in our switch
-statement. This allows us to remove the BUILD_BUG() instances in
-the arm64 port, avoiding problems where optimizations may not
-happen.
-
-To try and force better code generation we're currently marking
-the accessor functions as inline, but newer compilers can ignore
-the inline keyword unless it's marked __always_inline. Luckily on
-arm and arm64 inline is __always_inline, but let's make
-everything __always_inline to be explicit.
-
-Suggested-by: Thomas Gleixner <tglx@linutronix.de>
-Cc: Thomas Gleixner <tglx@linutronix.de>
-Cc: Mark Rutland <mark.rutland@arm.com>
-Cc: Marc Zyngier <Marc.Zyngier@arm.com>
-Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
-Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
-Acked-by: Mark Rutland <mark.rutland@arm.com>
-(cherry picked from commit e09f3cc0184d6b5c3816f921b7ffb67623e5e834)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/include/asm/arch_timer.h    | 14 ++++++--------
- arch/arm64/include/asm/arch_timer.h  | 23 +++++++++--------------
- drivers/clocksource/arm_arch_timer.c |  6 +++---
- include/clocksource/arm_arch_timer.h |  6 ++++--
- 4 files changed, 22 insertions(+), 27 deletions(-)
-
-diff --git a/arch/arm/include/asm/arch_timer.h b/arch/arm/include/asm/arch_timer.h
-index accefe09..aeb93f38 100644
---- a/arch/arm/include/asm/arch_timer.h
-+++ b/arch/arm/include/asm/arch_timer.h
-@@ -17,7 +17,8 @@ int arch_timer_arch_init(void);
-  * nicely work out which register we want, and chuck away the rest of
-  * the code. At least it does so with a recent GCC (4.6.3).
-  */
--static inline void arch_timer_reg_write(const int access, const int reg, u32 val)
-+static __always_inline
-+void arch_timer_reg_write(int access, enum arch_timer_reg reg, u32 val)
- {
- 	if (access == ARCH_TIMER_PHYS_ACCESS) {
- 		switch (reg) {
-@@ -28,9 +29,7 @@ static inline void arch_timer_reg_write(const int access, const int reg, u32 val
- 			asm volatile("mcr p15, 0, %0, c14, c2, 0" : : "r" (val));
- 			break;
- 		}
--	}
--
--	if (access == ARCH_TIMER_VIRT_ACCESS) {
-+	} else if (access == ARCH_TIMER_VIRT_ACCESS) {
- 		switch (reg) {
- 		case ARCH_TIMER_REG_CTRL:
- 			asm volatile("mcr p15, 0, %0, c14, c3, 1" : : "r" (val));
-@@ -44,7 +43,8 @@ static inline void arch_timer_reg_write(const int access, const int reg, u32 val
- 	isb();
- }
- 
--static inline u32 arch_timer_reg_read(const int access, const int reg)
-+static __always_inline
-+u32 arch_timer_reg_read(int access, enum arch_timer_reg reg)
- {
- 	u32 val = 0;
- 
-@@ -57,9 +57,7 @@ static inline u32 arch_timer_reg_read(const int access, const int reg)
- 			asm volatile("mrc p15, 0, %0, c14, c2, 0" : "=r" (val));
- 			break;
- 		}
--	}
--
--	if (access == ARCH_TIMER_VIRT_ACCESS) {
-+	} else if (access == ARCH_TIMER_VIRT_ACCESS) {
- 		switch (reg) {
- 		case ARCH_TIMER_REG_CTRL:
- 			asm volatile("mrc p15, 0, %0, c14, c3, 1" : "=r" (val));
-diff --git a/arch/arm64/include/asm/arch_timer.h b/arch/arm64/include/asm/arch_timer.h
-index d56ed11b..dbca7716 100644
---- a/arch/arm64/include/asm/arch_timer.h
-+++ b/arch/arm64/include/asm/arch_timer.h
-@@ -26,7 +26,13 @@
- 
- #include <clocksource/arm_arch_timer.h>
- 
--static inline void arch_timer_reg_write(int access, int reg, u32 val)
-+/*
-+ * These register accessors are marked inline so the compiler can
-+ * nicely work out which register we want, and chuck away the rest of
-+ * the code.
-+ */
-+static __always_inline
-+void arch_timer_reg_write(int access, enum arch_timer_reg reg, u32 val)
- {
- 	if (access == ARCH_TIMER_PHYS_ACCESS) {
- 		switch (reg) {
-@@ -36,8 +42,6 @@ static inline void arch_timer_reg_write(int access, int reg, u32 val)
- 		case ARCH_TIMER_REG_TVAL:
- 			asm volatile("msr cntp_tval_el0, %0" : : "r" (val));
- 			break;
--		default:
--			BUILD_BUG();
- 		}
- 	} else if (access == ARCH_TIMER_VIRT_ACCESS) {
- 		switch (reg) {
-@@ -47,17 +51,14 @@ static inline void arch_timer_reg_write(int access, int reg, u32 val)
- 		case ARCH_TIMER_REG_TVAL:
- 			asm volatile("msr cntv_tval_el0, %0" : : "r" (val));
- 			break;
--		default:
--			BUILD_BUG();
- 		}
--	} else {
--		BUILD_BUG();
- 	}
- 
- 	isb();
- }
- 
--static inline u32 arch_timer_reg_read(int access, int reg)
-+static __always_inline
-+u32 arch_timer_reg_read(int access, enum arch_timer_reg reg)
- {
- 	u32 val;
- 
-@@ -69,8 +70,6 @@ static inline u32 arch_timer_reg_read(int access, int reg)
- 		case ARCH_TIMER_REG_TVAL:
- 			asm volatile("mrs %0, cntp_tval_el0" : "=r" (val));
- 			break;
--		default:
--			BUILD_BUG();
- 		}
- 	} else if (access == ARCH_TIMER_VIRT_ACCESS) {
- 		switch (reg) {
-@@ -80,11 +79,7 @@ static inline u32 arch_timer_reg_read(int access, int reg)
- 		case ARCH_TIMER_REG_TVAL:
- 			asm volatile("mrs %0, cntv_tval_el0" : "=r" (val));
- 			break;
--		default:
--			BUILD_BUG();
- 		}
--	} else {
--		BUILD_BUG();
- 	}
- 
- 	return val;
-diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c
-index 053d846a..aa070384 100644
---- a/drivers/clocksource/arm_arch_timer.c
-+++ b/drivers/clocksource/arm_arch_timer.c
-@@ -43,7 +43,7 @@ static bool arch_timer_use_virtual = true;
-  * Architected system timer support.
-  */
- 
--static inline irqreturn_t timer_handler(const int access,
-+static __always_inline irqreturn_t timer_handler(const int access,
- 					struct clock_event_device *evt)
- {
- 	unsigned long ctrl;
-@@ -72,7 +72,7 @@ static irqreturn_t arch_timer_handler_phys(int irq, void *dev_id)
- 	return timer_handler(ARCH_TIMER_PHYS_ACCESS, evt);
- }
- 
--static inline void timer_set_mode(const int access, int mode)
-+static __always_inline void timer_set_mode(const int access, int mode)
- {
- 	unsigned long ctrl;
- 	switch (mode) {
-@@ -99,7 +99,7 @@ static void arch_timer_set_mode_phys(enum clock_event_mode mode,
- 	timer_set_mode(ARCH_TIMER_PHYS_ACCESS, mode);
- }
- 
--static inline void set_next_event(const int access, unsigned long evt)
-+static __always_inline void set_next_event(const int access, unsigned long evt)
- {
- 	unsigned long ctrl;
- 	ctrl = arch_timer_reg_read(access, ARCH_TIMER_REG_CTRL);
-diff --git a/include/clocksource/arm_arch_timer.h b/include/clocksource/arm_arch_timer.h
-index c463ce99..f3da817b 100644
---- a/include/clocksource/arm_arch_timer.h
-+++ b/include/clocksource/arm_arch_timer.h
-@@ -23,8 +23,10 @@
- #define ARCH_TIMER_CTRL_IT_MASK		(1 << 1)
- #define ARCH_TIMER_CTRL_IT_STAT		(1 << 2)
- 
--#define ARCH_TIMER_REG_CTRL		0
--#define ARCH_TIMER_REG_TVAL		1
-+enum arch_timer_reg {
-+	ARCH_TIMER_REG_CTRL,
-+	ARCH_TIMER_REG_TVAL,
-+};
- 
- #define ARCH_TIMER_PHYS_ACCESS		0
- #define ARCH_TIMER_VIRT_ACCESS		1
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0015-drm-rcar-du-Support-per-CRTC-clock-and-IRQ.patch b/patches.renesas/0015-drm-rcar-du-Support-per-CRTC-clock-and-IRQ.patch
deleted file mode 100644
index 5baa629550755..0000000000000
--- a/patches.renesas/0015-drm-rcar-du-Support-per-CRTC-clock-and-IRQ.patch
+++ /dev/null
@@ -1,415 +0,0 @@
-From a803274d612a7b0e0abd78e6016954b3e582a8f6 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 14 Jun 2013 14:15:01 +0200
-Subject: drm/rcar-du: Support per-CRTC clock and IRQ
-
-Some of the DU revisions use one clock and IRQ per CRTC instead of one
-clock and IRQ per device. Retrieve the correct clock and register the
-correct IRQ for each CRTC.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit f66ee304ae8990bd31fa639b775a840d6757d746)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/rcar-du/rcar_du_crtc.c | 120 +++++++++++++++++++++++++--------
- drivers/gpu/drm/rcar-du/rcar_du_crtc.h |   2 +-
- drivers/gpu/drm/rcar-du/rcar_du_drv.c  |  52 +++-----------
- drivers/gpu/drm/rcar-du/rcar_du_drv.h  |   3 +-
- 4 files changed, 103 insertions(+), 74 deletions(-)
-
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
-index 24183fb93592..aefc8a0cbcbc 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
-@@ -69,6 +69,30 @@ static void rcar_du_crtc_clr_set(struct rcar_du_crtc *rcrtc, u32 reg,
- 	rcar_du_write(rcdu, rcrtc->mmio_offset + reg, (value & ~clr) | set);
- }
- 
-+static int rcar_du_crtc_get(struct rcar_du_crtc *rcrtc)
-+{
-+	struct rcar_du_device *rcdu = rcrtc->crtc.dev->dev_private;
-+	int ret;
-+
-+	ret = clk_prepare_enable(rcrtc->clock);
-+	if (ret < 0)
-+		return ret;
-+
-+	ret = rcar_du_get(rcdu);
-+	if (ret < 0)
-+		clk_disable_unprepare(rcrtc->clock);
-+
-+	return ret;
-+}
-+
-+static void rcar_du_crtc_put(struct rcar_du_crtc *rcrtc)
-+{
-+	struct rcar_du_device *rcdu = rcrtc->crtc.dev->dev_private;
-+
-+	rcar_du_put(rcdu);
-+	clk_disable_unprepare(rcrtc->clock);
-+}
-+
- static void rcar_du_crtc_set_display_timing(struct rcar_du_crtc *rcrtc)
- {
- 	struct drm_crtc *crtc = &rcrtc->crtc;
-@@ -79,7 +103,7 @@ static void rcar_du_crtc_set_display_timing(struct rcar_du_crtc *rcrtc)
- 	u32 div;
- 
- 	/* Dot clock */
--	clk = clk_get_rate(rcdu->clock);
-+	clk = clk_get_rate(rcrtc->clock);
- 	div = DIV_ROUND_CLOSEST(clk, mode->clock * 1000);
- 	div = clamp(div, 1U, 64U) - 1;
- 
-@@ -313,20 +337,16 @@ static void rcar_du_crtc_stop(struct rcar_du_crtc *rcrtc)
- 
- void rcar_du_crtc_suspend(struct rcar_du_crtc *rcrtc)
- {
--	struct rcar_du_device *rcdu = rcrtc->crtc.dev->dev_private;
--
- 	rcar_du_crtc_stop(rcrtc);
--	rcar_du_put(rcdu);
-+	rcar_du_crtc_put(rcrtc);
- }
- 
- void rcar_du_crtc_resume(struct rcar_du_crtc *rcrtc)
- {
--	struct rcar_du_device *rcdu = rcrtc->crtc.dev->dev_private;
--
- 	if (rcrtc->dpms != DRM_MODE_DPMS_ON)
- 		return;
- 
--	rcar_du_get(rcdu);
-+	rcar_du_crtc_get(rcrtc);
- 	rcar_du_crtc_start(rcrtc);
- }
- 
-@@ -340,18 +360,17 @@ static void rcar_du_crtc_update_base(struct rcar_du_crtc *rcrtc)
- 
- static void rcar_du_crtc_dpms(struct drm_crtc *crtc, int mode)
- {
--	struct rcar_du_device *rcdu = crtc->dev->dev_private;
- 	struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);
- 
- 	if (rcrtc->dpms == mode)
- 		return;
- 
- 	if (mode == DRM_MODE_DPMS_ON) {
--		rcar_du_get(rcdu);
-+		rcar_du_crtc_get(rcrtc);
- 		rcar_du_crtc_start(rcrtc);
- 	} else {
- 		rcar_du_crtc_stop(rcrtc);
--		rcar_du_put(rcdu);
-+		rcar_du_crtc_put(rcrtc);
- 	}
- 
- 	rcrtc->dpms = mode;
-@@ -367,13 +386,12 @@ static bool rcar_du_crtc_mode_fixup(struct drm_crtc *crtc,
- 
- static void rcar_du_crtc_mode_prepare(struct drm_crtc *crtc)
- {
--	struct rcar_du_device *rcdu = crtc->dev->dev_private;
- 	struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);
- 
- 	/* We need to access the hardware during mode set, acquire a reference
--	 * to the DU.
-+	 * to the CRTC.
- 	 */
--	rcar_du_get(rcdu);
-+	rcar_du_crtc_get(rcrtc);
- 
- 	/* Stop the CRTC and release the plane. Force the DPMS mode to off as a
- 	 * result.
-@@ -423,10 +441,10 @@ static int rcar_du_crtc_mode_set(struct drm_crtc *crtc,
- 
- error:
- 	/* There's no rollback/abort operation to clean up in case of error. We
--	 * thus need to release the reference to the DU acquired in prepare()
-+	 * thus need to release the reference to the CRTC acquired in prepare()
- 	 * here.
- 	 */
--	rcar_du_put(rcdu);
-+	rcar_du_crtc_put(rcrtc);
- 	return ret;
- }
- 
-@@ -514,6 +532,24 @@ static void rcar_du_crtc_finish_page_flip(struct rcar_du_crtc *rcrtc)
- 	drm_vblank_put(dev, rcrtc->index);
- }
- 
-+static irqreturn_t rcar_du_crtc_irq(int irq, void *arg)
-+{
-+	struct rcar_du_crtc *rcrtc = arg;
-+	irqreturn_t ret = IRQ_NONE;
-+	u32 status;
-+
-+	status = rcar_du_crtc_read(rcrtc, DSSR);
-+	rcar_du_crtc_write(rcrtc, DSRCR, status & DSRCR_MASK);
-+
-+	if (status & DSSR_VBK) {
-+		drm_handle_vblank(rcrtc->crtc.dev, rcrtc->index);
-+		rcar_du_crtc_finish_page_flip(rcrtc);
-+		ret = IRQ_HANDLED;
-+	}
-+
-+	return ret;
-+}
-+
- static int rcar_du_crtc_page_flip(struct drm_crtc *crtc,
- 				  struct drm_framebuffer *fb,
- 				  struct drm_pending_vblank_event *event)
-@@ -551,10 +587,29 @@ static const struct drm_crtc_funcs crtc_funcs = {
- 
- int rcar_du_crtc_create(struct rcar_du_device *rcdu, unsigned int index)
- {
-+	struct platform_device *pdev = to_platform_device(rcdu->dev);
- 	struct rcar_du_crtc *rcrtc = &rcdu->crtcs[index];
- 	struct drm_crtc *crtc = &rcrtc->crtc;
-+	unsigned int irqflags;
-+	char clk_name[5];
-+	char *name;
-+	int irq;
- 	int ret;
- 
-+	/* Get the CRTC clock. */
-+	if (rcar_du_has(rcdu, RCAR_DU_FEATURE_CRTC_IRQ_CLOCK)) {
-+		sprintf(clk_name, "du.%u", index);
-+		name = clk_name;
-+	} else {
-+		name = NULL;
-+	}
-+
-+	rcrtc->clock = devm_clk_get(rcdu->dev, name);
-+	if (IS_ERR(rcrtc->clock)) {
-+		dev_err(rcdu->dev, "no clock for CRTC %u\n", index);
-+		return PTR_ERR(rcrtc->clock);
-+	}
-+
- 	rcrtc->mmio_offset = index ? DISP2_REG_OFFSET : 0;
- 	rcrtc->index = index;
- 	rcrtc->dpms = DRM_MODE_DPMS_OFF;
-@@ -568,6 +623,28 @@ int rcar_du_crtc_create(struct rcar_du_device *rcdu, unsigned int index)
- 
- 	drm_crtc_helper_add(crtc, &crtc_helper_funcs);
- 
-+	/* Register the interrupt handler. */
-+	if (rcar_du_has(rcdu, RCAR_DU_FEATURE_CRTC_IRQ_CLOCK)) {
-+		irq = platform_get_irq(pdev, index);
-+		irqflags = 0;
-+	} else {
-+		irq = platform_get_irq(pdev, 0);
-+		irqflags = IRQF_SHARED;
-+	}
-+
-+	if (irq < 0) {
-+		dev_err(rcdu->dev, "no IRQ for CRTC %u\n", index);
-+		return ret;
-+	}
-+
-+	ret = devm_request_irq(rcdu->dev, irq, rcar_du_crtc_irq, irqflags,
-+			       dev_name(rcdu->dev), rcrtc);
-+	if (ret < 0) {
-+		dev_err(rcdu->dev,
-+			"failed to register IRQ for CRTC %u\n", index);
-+		return ret;
-+	}
-+
- 	return 0;
- }
- 
-@@ -580,16 +657,3 @@ void rcar_du_crtc_enable_vblank(struct rcar_du_crtc *rcrtc, bool enable)
- 		rcar_du_crtc_clr(rcrtc, DIER, DIER_VBE);
- 	}
- }
--
--void rcar_du_crtc_irq(struct rcar_du_crtc *rcrtc)
--{
--	u32 status;
--
--	status = rcar_du_crtc_read(rcrtc, DSSR);
--	rcar_du_crtc_write(rcrtc, DSRCR, status & DSRCR_MASK);
--
--	if (status & DSSR_VBK) {
--		drm_handle_vblank(rcrtc->crtc.dev, rcrtc->index);
--		rcar_du_crtc_finish_page_flip(rcrtc);
--	}
--}
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.h b/drivers/gpu/drm/rcar-du/rcar_du_crtc.h
-index 2a0365bcbd14..5b69e98a3b92 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.h
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.h
-@@ -25,6 +25,7 @@ struct rcar_du_plane;
- struct rcar_du_crtc {
- 	struct drm_crtc crtc;
- 
-+	struct clk *clock;
- 	unsigned int mmio_offset;
- 	unsigned int index;
- 	bool started;
-@@ -38,7 +39,6 @@ struct rcar_du_crtc {
- 
- int rcar_du_crtc_create(struct rcar_du_device *rcdu, unsigned int index);
- void rcar_du_crtc_enable_vblank(struct rcar_du_crtc *rcrtc, bool enable);
--void rcar_du_crtc_irq(struct rcar_du_crtc *rcrtc);
- void rcar_du_crtc_cancel_page_flip(struct rcar_du_crtc *rcrtc,
- 				   struct drm_file *file);
- void rcar_du_crtc_suspend(struct rcar_du_crtc *rcrtc);
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.c b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-index 60836b8d6053..9b89dbf3fb32 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-@@ -35,8 +35,8 @@
- /*
-  * rcar_du_get - Acquire a reference to the DU
-  *
-- * Acquiring a reference enables the device clock and setup core registers. A
-- * reference must be held before accessing any hardware registers.
-+ * Acquiring the first  reference setups core registers. A reference must be
-+ * held before accessing any hardware registers.
-  *
-  * This function must be called with the DRM mode_config lock held.
-  *
-@@ -44,16 +44,9 @@
-  */
- int rcar_du_get(struct rcar_du_device *rcdu)
- {
--	int ret;
--
- 	if (rcdu->use_count)
- 		goto done;
- 
--	/* Enable clocks before accessing the hardware. */
--	ret = clk_prepare_enable(rcdu->clock);
--	if (ret < 0)
--		return ret;
--
- 	/* Enable extended features */
- 	rcar_du_write(rcdu, DEFR, DEFR_CODE | DEFR_DEFE);
- 	rcar_du_write(rcdu, DEFR2, DEFR2_CODE | DEFR2_DEFE2G);
-@@ -74,16 +67,11 @@ done:
- /*
-  * rcar_du_put - Release a reference to the DU
-  *
-- * Releasing the last reference disables the device clock.
-- *
-  * This function must be called with the DRM mode_config lock held.
-  */
- void rcar_du_put(struct rcar_du_device *rcdu)
- {
--	if (--rcdu->use_count)
--		return;
--
--	clk_disable_unprepare(rcdu->clock);
-+	--rcdu->use_count;
- }
- 
- /* -----------------------------------------------------------------------------
-@@ -95,8 +83,8 @@ static int rcar_du_unload(struct drm_device *dev)
- 	drm_kms_helper_poll_fini(dev);
- 	drm_mode_config_cleanup(dev);
- 	drm_vblank_cleanup(dev);
--	drm_irq_uninstall(dev);
- 
-+	dev->irq_enabled = 0;
- 	dev->dev_private = NULL;
- 
- 	return 0;
-@@ -127,18 +115,12 @@ static int rcar_du_load(struct drm_device *dev, unsigned long flags)
- 	rcdu->ddev = dev;
- 	dev->dev_private = rcdu;
- 
--	/* I/O resources and clocks */
-+	/* I/O resources */
- 	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- 	rcdu->mmio = devm_ioremap_resource(&pdev->dev, mem);
- 	if (IS_ERR(rcdu->mmio))
- 		return PTR_ERR(rcdu->mmio);
- 
--	rcdu->clock = devm_clk_get(&pdev->dev, NULL);
--	if (IS_ERR(rcdu->clock)) {
--		dev_err(&pdev->dev, "failed to get clock\n");
--		return -ENOENT;
--	}
--
- 	/* DRM/KMS objects */
- 	ret = rcar_du_modeset_init(rcdu);
- 	if (ret < 0) {
-@@ -146,18 +128,14 @@ static int rcar_du_load(struct drm_device *dev, unsigned long flags)
- 		goto done;
- 	}
- 
--	/* IRQ and vblank handling */
-+	/* vblank handling */
- 	ret = drm_vblank_init(dev, (1 << rcdu->num_crtcs) - 1);
- 	if (ret < 0) {
- 		dev_err(&pdev->dev, "failed to initialize vblank\n");
- 		goto done;
- 	}
- 
--	ret = drm_irq_install(dev);
--	if (ret < 0) {
--		dev_err(&pdev->dev, "failed to install IRQ handler\n");
--		goto done;
--	}
-+	dev->irq_enabled = 1;
- 
- 	platform_set_drvdata(pdev, rcdu);
- 
-@@ -177,18 +155,6 @@ static void rcar_du_preclose(struct drm_device *dev, struct drm_file *file)
- 		rcar_du_crtc_cancel_page_flip(&rcdu->crtcs[i], file);
- }
- 
--static irqreturn_t rcar_du_irq(int irq, void *arg)
--{
--	struct drm_device *dev = arg;
--	struct rcar_du_device *rcdu = dev->dev_private;
--	unsigned int i;
--
--	for (i = 0; i < ARRAY_SIZE(rcdu->crtcs); ++i)
--		rcar_du_crtc_irq(&rcdu->crtcs[i]);
--
--	return IRQ_HANDLED;
--}
--
- static int rcar_du_enable_vblank(struct drm_device *dev, int crtc)
- {
- 	struct rcar_du_device *rcdu = dev->dev_private;
-@@ -221,12 +187,10 @@ static const struct file_operations rcar_du_fops = {
- };
- 
- static struct drm_driver rcar_du_driver = {
--	.driver_features	= DRIVER_HAVE_IRQ | DRIVER_GEM | DRIVER_MODESET
--				| DRIVER_PRIME,
-+	.driver_features	= DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME,
- 	.load			= rcar_du_load,
- 	.unload			= rcar_du_unload,
- 	.preclose		= rcar_du_preclose,
--	.irq_handler		= rcar_du_irq,
- 	.get_vblank_counter	= drm_vblank_count,
- 	.enable_vblank		= rcar_du_enable_vblank,
- 	.disable_vblank		= rcar_du_disable_vblank,
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.h b/drivers/gpu/drm/rcar-du/rcar_du_drv.h
-index 06dbf4ff139c..7d2320fb948d 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_drv.h
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.h
-@@ -25,6 +25,8 @@ struct clk;
- struct device;
- struct drm_device;
- 
-+#define RCAR_DU_FEATURE_CRTC_IRQ_CLOCK	(1 << 0)	/* Per-CRTC IRQ and clock */
-+
- /*
-  * struct rcar_du_device_info - DU model-specific information
-  * @features: device features (RCAR_DU_FEATURE_*)
-@@ -39,7 +41,6 @@ struct rcar_du_device {
- 	const struct rcar_du_device_info *info;
- 
- 	void __iomem *mmio;
--	struct clk *clock;
- 	unsigned int use_count;
- 
- 	struct drm_device *ddev;
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0015-serial-sh-sci-Don-t-enable-disable-port-from-within-.patch b/patches.renesas/0015-serial-sh-sci-Don-t-enable-disable-port-from-within-.patch
deleted file mode 100644
index c0426b4cf3909..0000000000000
--- a/patches.renesas/0015-serial-sh-sci-Don-t-enable-disable-port-from-within-.patch
+++ /dev/null
@@ -1,68 +0,0 @@
-From 1e05564f43731443b8da38737172c7f9f44f9ef1 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 28 Nov 2013 18:11:45 +0100
-Subject: serial: sh-sci: Don't enable/disable port from within break timer
-
-The break timer accesses hardware registers and thus requires the port
-to be enabled. It currently ensures this by enabling the port at the
-beginning of the timer handler, and disabling it at the end. However,
-the enable/disable operations call the runtime PM sync functions, which
-are not allowed in atomic context. The current situation is thus broken.
-
-This change relies on non-atomic code to enable/disable the port. The
-break timer will only be started from the IRQ handler, which already
-runs with the port enabled. We just need to ensure that the port won't
-be disabled with the timer running, and that's easily done by just
-cancelling the timer in the port disable function.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Magnus Damm <damm@opensource.se>
-Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit caec70381b469d6ed1bd3d0441a19aa6de0bbff3)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/tty/serial/sh-sci.c | 12 ++++++++----
- 1 file changed, 8 insertions(+), 4 deletions(-)
-
-diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
-index c9403229c6f8..5da765922769 100644
---- a/drivers/tty/serial/sh-sci.c
-+++ b/drivers/tty/serial/sh-sci.c
-@@ -431,6 +431,14 @@ static void sci_port_disable(struct sci_port *sci_port)
- 	if (!sci_port->port.dev)
- 		return;
- 
-+	/* Cancel the break timer to ensure that the timer handler will not try
-+	 * to access the hardware with clocks and power disabled. Reset the
-+	 * break flag to make the break debouncing state machine ready for the
-+	 * next break.
-+	 */
-+	del_timer_sync(&sci_port->break_timer);
-+	sci_port->break_flag = 0;
-+
- 	clk_disable(sci_port->fclk);
- 	clk_disable(sci_port->iclk);
- 
-@@ -733,8 +741,6 @@ static void sci_break_timer(unsigned long data)
- {
- 	struct sci_port *port = (struct sci_port *)data;
- 
--	sci_port_enable(port);
--
- 	if (sci_rxd_in(&port->port) == 0) {
- 		port->break_flag = 1;
- 		sci_schedule_break_timer(port);
-@@ -744,8 +750,6 @@ static void sci_break_timer(unsigned long data)
- 		sci_schedule_break_timer(port);
- 	} else
- 		port->break_flag = 0;
--
--	sci_port_disable(port);
- }
- 
- static int sci_handle_errors(struct uart_port *port)
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0016-clocksource-arch_timer-Push-the-read-write-wrappers-.patch b/patches.renesas/0016-clocksource-arch_timer-Push-the-read-write-wrappers-.patch
deleted file mode 100644
index 478a3767bf96d..0000000000000
--- a/patches.renesas/0016-clocksource-arch_timer-Push-the-read-write-wrappers-.patch
+++ /dev/null
@@ -1,173 +0,0 @@
-From fb73a1fc4cbef171ca21c6d66de5abd2a9624752 Mon Sep 17 00:00:00 2001
-From: Stephen Boyd <sboyd@codeaurora.org>
-Date: Thu, 18 Jul 2013 16:59:31 -0700
-Subject: clocksource: arch_timer: Push the read/write wrappers deeper
-
-We're going to introduce support to read and write the memory
-mapped timer registers in the next patch, so push the cp15
-read/write functions one level deeper. This simplifies the next
-patch and makes it clearer what's going on.
-
-Cc: Mark Rutland <mark.rutland@arm.com>
-Cc: Marc Zyngier <Marc.Zyngier@arm.com>
-Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
-Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
-Acked-by: Mark Rutland <mark.rutland@arm.com>
-(cherry picked from commit 60faddf6eb3aba16068032bdcf35e18ace4bfb21)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/include/asm/arch_timer.h    |  4 ++--
- arch/arm64/include/asm/arch_timer.h  |  4 ++--
- drivers/clocksource/arm_arch_timer.c | 46 ++++++++++++++++++++++++------------
- 3 files changed, 35 insertions(+), 19 deletions(-)
-
-diff --git a/arch/arm/include/asm/arch_timer.h b/arch/arm/include/asm/arch_timer.h
-index aeb93f38..55609468 100644
---- a/arch/arm/include/asm/arch_timer.h
-+++ b/arch/arm/include/asm/arch_timer.h
-@@ -18,7 +18,7 @@ int arch_timer_arch_init(void);
-  * the code. At least it does so with a recent GCC (4.6.3).
-  */
- static __always_inline
--void arch_timer_reg_write(int access, enum arch_timer_reg reg, u32 val)
-+void arch_timer_reg_write_cp15(int access, enum arch_timer_reg reg, u32 val)
- {
- 	if (access == ARCH_TIMER_PHYS_ACCESS) {
- 		switch (reg) {
-@@ -44,7 +44,7 @@ void arch_timer_reg_write(int access, enum arch_timer_reg reg, u32 val)
- }
- 
- static __always_inline
--u32 arch_timer_reg_read(int access, enum arch_timer_reg reg)
-+u32 arch_timer_reg_read_cp15(int access, enum arch_timer_reg reg)
- {
- 	u32 val = 0;
- 
-diff --git a/arch/arm64/include/asm/arch_timer.h b/arch/arm64/include/asm/arch_timer.h
-index dbca7716..7181e777 100644
---- a/arch/arm64/include/asm/arch_timer.h
-+++ b/arch/arm64/include/asm/arch_timer.h
-@@ -32,7 +32,7 @@
-  * the code.
-  */
- static __always_inline
--void arch_timer_reg_write(int access, enum arch_timer_reg reg, u32 val)
-+void arch_timer_reg_write_cp15(int access, enum arch_timer_reg reg, u32 val)
- {
- 	if (access == ARCH_TIMER_PHYS_ACCESS) {
- 		switch (reg) {
-@@ -58,7 +58,7 @@ void arch_timer_reg_write(int access, enum arch_timer_reg reg, u32 val)
- }
- 
- static __always_inline
--u32 arch_timer_reg_read(int access, enum arch_timer_reg reg)
-+u32 arch_timer_reg_read_cp15(int access, enum arch_timer_reg reg)
- {
- 	u32 val;
- 
-diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c
-index aa070384..6d9fad9d 100644
---- a/drivers/clocksource/arm_arch_timer.c
-+++ b/drivers/clocksource/arm_arch_timer.c
-@@ -43,14 +43,28 @@ static bool arch_timer_use_virtual = true;
-  * Architected system timer support.
-  */
- 
-+static __always_inline
-+void arch_timer_reg_write(int access, enum arch_timer_reg reg, u32 val,
-+		struct clock_event_device *clk)
-+{
-+	arch_timer_reg_write_cp15(access, reg, val);
-+}
-+
-+static __always_inline
-+u32 arch_timer_reg_read(int access, enum arch_timer_reg reg,
-+		struct clock_event_device *clk)
-+{
-+	return arch_timer_reg_read_cp15(access, reg);
-+}
-+
- static __always_inline irqreturn_t timer_handler(const int access,
- 					struct clock_event_device *evt)
- {
- 	unsigned long ctrl;
--	ctrl = arch_timer_reg_read(access, ARCH_TIMER_REG_CTRL);
-+	ctrl = arch_timer_reg_read(access, ARCH_TIMER_REG_CTRL, evt);
- 	if (ctrl & ARCH_TIMER_CTRL_IT_STAT) {
- 		ctrl |= ARCH_TIMER_CTRL_IT_MASK;
--		arch_timer_reg_write(access, ARCH_TIMER_REG_CTRL, ctrl);
-+		arch_timer_reg_write(access, ARCH_TIMER_REG_CTRL, ctrl, evt);
- 		evt->event_handler(evt);
- 		return IRQ_HANDLED;
- 	}
-@@ -72,15 +86,16 @@ static irqreturn_t arch_timer_handler_phys(int irq, void *dev_id)
- 	return timer_handler(ARCH_TIMER_PHYS_ACCESS, evt);
- }
- 
--static __always_inline void timer_set_mode(const int access, int mode)
-+static __always_inline void timer_set_mode(const int access, int mode,
-+				  struct clock_event_device *clk)
- {
- 	unsigned long ctrl;
- 	switch (mode) {
- 	case CLOCK_EVT_MODE_UNUSED:
- 	case CLOCK_EVT_MODE_SHUTDOWN:
--		ctrl = arch_timer_reg_read(access, ARCH_TIMER_REG_CTRL);
-+		ctrl = arch_timer_reg_read(access, ARCH_TIMER_REG_CTRL, clk);
- 		ctrl &= ~ARCH_TIMER_CTRL_ENABLE;
--		arch_timer_reg_write(access, ARCH_TIMER_REG_CTRL, ctrl);
-+		arch_timer_reg_write(access, ARCH_TIMER_REG_CTRL, ctrl, clk);
- 		break;
- 	default:
- 		break;
-@@ -90,36 +105,37 @@ static __always_inline void timer_set_mode(const int access, int mode)
- static void arch_timer_set_mode_virt(enum clock_event_mode mode,
- 				     struct clock_event_device *clk)
- {
--	timer_set_mode(ARCH_TIMER_VIRT_ACCESS, mode);
-+	timer_set_mode(ARCH_TIMER_VIRT_ACCESS, mode, clk);
- }
- 
- static void arch_timer_set_mode_phys(enum clock_event_mode mode,
- 				     struct clock_event_device *clk)
- {
--	timer_set_mode(ARCH_TIMER_PHYS_ACCESS, mode);
-+	timer_set_mode(ARCH_TIMER_PHYS_ACCESS, mode, clk);
- }
- 
--static __always_inline void set_next_event(const int access, unsigned long evt)
-+static __always_inline void set_next_event(const int access, unsigned long evt,
-+				  struct clock_event_device *clk)
- {
- 	unsigned long ctrl;
--	ctrl = arch_timer_reg_read(access, ARCH_TIMER_REG_CTRL);
-+	ctrl = arch_timer_reg_read(access, ARCH_TIMER_REG_CTRL, clk);
- 	ctrl |= ARCH_TIMER_CTRL_ENABLE;
- 	ctrl &= ~ARCH_TIMER_CTRL_IT_MASK;
--	arch_timer_reg_write(access, ARCH_TIMER_REG_TVAL, evt);
--	arch_timer_reg_write(access, ARCH_TIMER_REG_CTRL, ctrl);
-+	arch_timer_reg_write(access, ARCH_TIMER_REG_TVAL, evt, clk);
-+	arch_timer_reg_write(access, ARCH_TIMER_REG_CTRL, ctrl, clk);
- }
- 
- static int arch_timer_set_next_event_virt(unsigned long evt,
--					  struct clock_event_device *unused)
-+					  struct clock_event_device *clk)
- {
--	set_next_event(ARCH_TIMER_VIRT_ACCESS, evt);
-+	set_next_event(ARCH_TIMER_VIRT_ACCESS, evt, clk);
- 	return 0;
- }
- 
- static int arch_timer_set_next_event_phys(unsigned long evt,
--					  struct clock_event_device *unused)
-+					  struct clock_event_device *clk)
- {
--	set_next_event(ARCH_TIMER_PHYS_ACCESS, evt);
-+	set_next_event(ARCH_TIMER_PHYS_ACCESS, evt, clk);
- 	return 0;
- }
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0016-drm-rcar-du-Clarify-comment-regarding-plane-Y-source.patch b/patches.renesas/0016-drm-rcar-du-Clarify-comment-regarding-plane-Y-source.patch
deleted file mode 100644
index 1c3e46daf2f2e..0000000000000
--- a/patches.renesas/0016-drm-rcar-du-Clarify-comment-regarding-plane-Y-source.patch
+++ /dev/null
@@ -1,38 +0,0 @@
-From 0a99fa36a3f7068d626cda0ae1110af6b642aba2 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 14 Jun 2013 20:54:16 +0200
-Subject: drm/rcar-du: Clarify comment regarding plane Y source coordinate
-
-The R8A7790 DU documentation contains further information regarding the
-plane Y source coordinate. Update the comment accordingly.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit 9e7db06d3ac0ffcd866e5b7114f9a7ba12f7b6ac)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/rcar-du/rcar_du_plane.c | 9 ++++++---
- 1 file changed, 6 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_plane.c b/drivers/gpu/drm/rcar-du/rcar_du_plane.c
-index a65f81ddf51d..38ebd20e4e8d 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_plane.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_plane.c
-@@ -103,9 +103,12 @@ void rcar_du_plane_update_base(struct rcar_du_plane *plane)
- 	struct rcar_du_device *rcdu = plane->dev;
- 	unsigned int index = plane->hwindex;
- 
--	/* According to the datasheet the Y position is expressed in raster line
--	 * units. However, 32bpp formats seem to require a doubled Y position
--	 * value. Similarly, for the second plane, NV12 and NV21 formats seem to
-+	/* The Y position is expressed in raster line units and must be doubled
-+	 * for 32bpp formats, according to the R8A7790 datasheet. No mention of
-+	 * doubling the Y position is found in the R8A7779 datasheet, but the
-+	 * rule seems to apply there as well.
-+	 *
-+	 * Similarly, for the second plane, NV12 and NV21 formats seem to
- 	 * require a halved Y position value.
- 	 */
- 	rcar_du_plane_write(rcdu, index, PnSPXR, plane->src_x);
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0016-serial-sh-sci-Convert-to-clk_prepare-unprepare.patch b/patches.renesas/0016-serial-sh-sci-Convert-to-clk_prepare-unprepare.patch
deleted file mode 100644
index 06b63362955df..0000000000000
--- a/patches.renesas/0016-serial-sh-sci-Convert-to-clk_prepare-unprepare.patch
+++ /dev/null
@@ -1,50 +0,0 @@
-From 9979e8c2d5f004810801996cb05fdebfae6322dd Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 28 Nov 2013 18:11:46 +0100
-Subject: serial: sh-sci: Convert to clk_prepare/unprepare
-
-Turn clk_enable() and clk_disable() calls into clk_prepare_enable() and
-clk_disable_unprepare() to get ready for the migration to the common
-clock framework.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Magnus Damm <damm@opensource.se>
-Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit b016b646e8676858f39ea9be760494b04b9ee0af)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/tty/serial/sh-sci.c | 8 ++++----
- 1 file changed, 4 insertions(+), 4 deletions(-)
-
-diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
-index 5da765922769..7036ed20700c 100644
---- a/drivers/tty/serial/sh-sci.c
-+++ b/drivers/tty/serial/sh-sci.c
-@@ -421,9 +421,9 @@ static void sci_port_enable(struct sci_port *sci_port)
- 
- 	pm_runtime_get_sync(sci_port->port.dev);
- 
--	clk_enable(sci_port->iclk);
-+	clk_prepare_enable(sci_port->iclk);
- 	sci_port->port.uartclk = clk_get_rate(sci_port->iclk);
--	clk_enable(sci_port->fclk);
-+	clk_prepare_enable(sci_port->fclk);
- }
- 
- static void sci_port_disable(struct sci_port *sci_port)
-@@ -439,8 +439,8 @@ static void sci_port_disable(struct sci_port *sci_port)
- 	del_timer_sync(&sci_port->break_timer);
- 	sci_port->break_flag = 0;
- 
--	clk_disable(sci_port->fclk);
--	clk_disable(sci_port->iclk);
-+	clk_disable_unprepare(sci_port->fclk);
-+	clk_disable_unprepare(sci_port->iclk);
- 
- 	pm_runtime_put_sync(sci_port->port.dev);
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0017-clocksource-em_sti-Convert-to-devm_-managed-helpers.patch b/patches.renesas/0017-clocksource-em_sti-Convert-to-devm_-managed-helpers.patch
deleted file mode 100644
index a191a92b2c747..0000000000000
--- a/patches.renesas/0017-clocksource-em_sti-Convert-to-devm_-managed-helpers.patch
+++ /dev/null
@@ -1,106 +0,0 @@
-From 5528ed0bbde900200ce5497878af6a6d308b1098 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 30 Jul 2013 16:24:37 +0200
-Subject: clocksource: em_sti: Convert to devm_* managed helpers
-
-Replace kzalloc, clk_get, ioremap and request_irq by their managed
-counterparts to simplify error paths.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Reviewed-by: Daniel Lezcano <daniel.lezcano@linaro.org>
-(cherry picked from commit 1745e696e174b54e37c057882970e50af1e80a7f)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/clocksource/em_sti.c | 49 +++++++++++++-------------------------------
- 1 file changed, 14 insertions(+), 35 deletions(-)
-
-diff --git a/drivers/clocksource/em_sti.c b/drivers/clocksource/em_sti.c
-index 4329a29a..b9c81b7c 100644
---- a/drivers/clocksource/em_sti.c
-+++ b/drivers/clocksource/em_sti.c
-@@ -315,68 +315,47 @@ static int em_sti_probe(struct platform_device *pdev)
- {
- 	struct em_sti_priv *p;
- 	struct resource *res;
--	int irq, ret;
-+	int irq;
- 
--	p = kzalloc(sizeof(*p), GFP_KERNEL);
-+	p = devm_kzalloc(&pdev->dev, sizeof(*p), GFP_KERNEL);
- 	if (p == NULL) {
- 		dev_err(&pdev->dev, "failed to allocate driver data\n");
--		ret = -ENOMEM;
--		goto err0;
-+		return -ENOMEM;
- 	}
- 
- 	p->pdev = pdev;
- 	platform_set_drvdata(pdev, p);
- 
--	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
--	if (!res) {
--		dev_err(&pdev->dev, "failed to get I/O memory\n");
--		ret = -EINVAL;
--		goto err0;
--	}
--
- 	irq = platform_get_irq(pdev, 0);
- 	if (irq < 0) {
- 		dev_err(&pdev->dev, "failed to get irq\n");
--		ret = -EINVAL;
--		goto err0;
-+		return -EINVAL;
- 	}
- 
- 	/* map memory, let base point to the STI instance */
--	p->base = ioremap_nocache(res->start, resource_size(res));
--	if (p->base == NULL) {
--		dev_err(&pdev->dev, "failed to remap I/O memory\n");
--		ret = -ENXIO;
--		goto err0;
--	}
-+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+	p->base = devm_ioremap_resource(&pdev->dev, res);
-+	if (IS_ERR(p->base))
-+		return PTR_ERR(p->base);
- 
- 	/* get hold of clock */
--	p->clk = clk_get(&pdev->dev, "sclk");
-+	p->clk = devm_clk_get(&pdev->dev, "sclk");
- 	if (IS_ERR(p->clk)) {
- 		dev_err(&pdev->dev, "cannot get clock\n");
--		ret = PTR_ERR(p->clk);
--		goto err1;
-+		return PTR_ERR(p->clk);
- 	}
- 
--	if (request_irq(irq, em_sti_interrupt,
--			IRQF_TIMER | IRQF_IRQPOLL | IRQF_NOBALANCING,
--			dev_name(&pdev->dev), p)) {
-+	if (devm_request_irq(&pdev->dev, irq, em_sti_interrupt,
-+			     IRQF_TIMER | IRQF_IRQPOLL | IRQF_NOBALANCING,
-+			     dev_name(&pdev->dev), p)) {
- 		dev_err(&pdev->dev, "failed to request low IRQ\n");
--		ret = -ENOENT;
--		goto err2;
-+		return -ENOENT;
- 	}
- 
- 	raw_spin_lock_init(&p->lock);
- 	em_sti_register_clockevent(p);
- 	em_sti_register_clocksource(p);
- 	return 0;
--
--err2:
--	clk_put(p->clk);
--err1:
--	iounmap(p->base);
--err0:
--	kfree(p);
--	return ret;
- }
- 
- static int em_sti_remove(struct platform_device *pdev)
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0017-drm-rcar-du-Split-LVDS-encoder-and-connector.patch b/patches.renesas/0017-drm-rcar-du-Split-LVDS-encoder-and-connector.patch
deleted file mode 100644
index b153df55f651c..0000000000000
--- a/patches.renesas/0017-drm-rcar-du-Split-LVDS-encoder-and-connector.patch
+++ /dev/null
@@ -1,337 +0,0 @@
-From 38d9143167e03586eb4a1063740cbe71ebde4856 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Sat, 15 Jun 2013 14:21:51 +0200
-Subject: drm/rcar-du: Split LVDS encoder and connector
-
-This prepares for the encoders rework.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit 56c5dd00f8db27a429647b14c8c309bd5d9c1d15)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/rcar-du/Makefile          |   1 +
- drivers/gpu/drm/rcar-du/rcar_du_lvds.c    | 120 +--------------------------
- drivers/gpu/drm/rcar-du/rcar_du_lvdscon.c | 130 ++++++++++++++++++++++++++++++
- drivers/gpu/drm/rcar-du/rcar_du_lvdscon.h |  25 ++++++
- 4 files changed, 158 insertions(+), 118 deletions(-)
- create mode 100644 drivers/gpu/drm/rcar-du/rcar_du_lvdscon.c
- create mode 100644 drivers/gpu/drm/rcar-du/rcar_du_lvdscon.h
-
-diff --git a/drivers/gpu/drm/rcar-du/Makefile b/drivers/gpu/drm/rcar-du/Makefile
-index 7333c0094015..5def510599b0 100644
---- a/drivers/gpu/drm/rcar-du/Makefile
-+++ b/drivers/gpu/drm/rcar-du/Makefile
-@@ -2,6 +2,7 @@ rcar-du-drm-y := rcar_du_crtc.o \
- 		 rcar_du_drv.o \
- 		 rcar_du_kms.o \
- 		 rcar_du_lvds.o \
-+		 rcar_du_lvdscon.o \
- 		 rcar_du_plane.o \
- 		 rcar_du_vga.o
- 
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_lvds.c b/drivers/gpu/drm/rcar-du/rcar_du_lvds.c
-index 7aefe7267e1d..82e515741f89 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_lvds.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_lvds.c
-@@ -1,5 +1,5 @@
- /*
-- * rcar_du_lvds.c  --  R-Car Display Unit LVDS Encoder and Connector
-+ * rcar_du_lvds.c  --  R-Car Display Unit LVDS Encoder
-  *
-  * Copyright (C) 2013 Renesas Corporation
-  *
-@@ -18,123 +18,7 @@
- #include "rcar_du_drv.h"
- #include "rcar_du_kms.h"
- #include "rcar_du_lvds.h"
--
--struct rcar_du_lvds_connector {
--	struct rcar_du_connector connector;
--
--	const struct rcar_du_panel_data *panel;
--};
--
--#define to_rcar_lvds_connector(c) \
--	container_of(c, struct rcar_du_lvds_connector, connector.connector)
--
--/* -----------------------------------------------------------------------------
-- * Connector
-- */
--
--static int rcar_du_lvds_connector_get_modes(struct drm_connector *connector)
--{
--	struct rcar_du_lvds_connector *lvdscon = to_rcar_lvds_connector(connector);
--	struct drm_display_mode *mode;
--
--	mode = drm_mode_create(connector->dev);
--	if (mode == NULL)
--		return 0;
--
--	mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER;
--	mode->clock = lvdscon->panel->mode.clock;
--	mode->hdisplay = lvdscon->panel->mode.hdisplay;
--	mode->hsync_start = lvdscon->panel->mode.hsync_start;
--	mode->hsync_end = lvdscon->panel->mode.hsync_end;
--	mode->htotal = lvdscon->panel->mode.htotal;
--	mode->vdisplay = lvdscon->panel->mode.vdisplay;
--	mode->vsync_start = lvdscon->panel->mode.vsync_start;
--	mode->vsync_end = lvdscon->panel->mode.vsync_end;
--	mode->vtotal = lvdscon->panel->mode.vtotal;
--	mode->flags = lvdscon->panel->mode.flags;
--
--	drm_mode_set_name(mode);
--	drm_mode_probed_add(connector, mode);
--
--	return 1;
--}
--
--static int rcar_du_lvds_connector_mode_valid(struct drm_connector *connector,
--					    struct drm_display_mode *mode)
--{
--	return MODE_OK;
--}
--
--static const struct drm_connector_helper_funcs connector_helper_funcs = {
--	.get_modes = rcar_du_lvds_connector_get_modes,
--	.mode_valid = rcar_du_lvds_connector_mode_valid,
--	.best_encoder = rcar_du_connector_best_encoder,
--};
--
--static void rcar_du_lvds_connector_destroy(struct drm_connector *connector)
--{
--	drm_sysfs_connector_remove(connector);
--	drm_connector_cleanup(connector);
--}
--
--static enum drm_connector_status
--rcar_du_lvds_connector_detect(struct drm_connector *connector, bool force)
--{
--	return connector_status_connected;
--}
--
--static const struct drm_connector_funcs connector_funcs = {
--	.dpms = drm_helper_connector_dpms,
--	.detect = rcar_du_lvds_connector_detect,
--	.fill_modes = drm_helper_probe_single_connector_modes,
--	.destroy = rcar_du_lvds_connector_destroy,
--};
--
--static int rcar_du_lvds_connector_init(struct rcar_du_device *rcdu,
--				       struct rcar_du_encoder *renc,
--				       const struct rcar_du_panel_data *panel)
--{
--	struct rcar_du_lvds_connector *lvdscon;
--	struct drm_connector *connector;
--	int ret;
--
--	lvdscon = devm_kzalloc(rcdu->dev, sizeof(*lvdscon), GFP_KERNEL);
--	if (lvdscon == NULL)
--		return -ENOMEM;
--
--	lvdscon->panel = panel;
--
--	connector = &lvdscon->connector.connector;
--	connector->display_info.width_mm = panel->width_mm;
--	connector->display_info.height_mm = panel->height_mm;
--
--	ret = drm_connector_init(rcdu->ddev, connector, &connector_funcs,
--				 DRM_MODE_CONNECTOR_LVDS);
--	if (ret < 0)
--		return ret;
--
--	drm_connector_helper_add(connector, &connector_helper_funcs);
--	ret = drm_sysfs_connector_add(connector);
--	if (ret < 0)
--		return ret;
--
--	drm_helper_connector_dpms(connector, DRM_MODE_DPMS_OFF);
--	drm_object_property_set_value(&connector->base,
--		rcdu->ddev->mode_config.dpms_property, DRM_MODE_DPMS_OFF);
--
--	ret = drm_mode_connector_attach_encoder(connector, &renc->encoder);
--	if (ret < 0)
--		return ret;
--
--	connector->encoder = &renc->encoder;
--	lvdscon->connector.encoder = renc;
--
--	return 0;
--}
--
--/* -----------------------------------------------------------------------------
-- * Encoder
-- */
-+#include "rcar_du_lvdscon.h"
- 
- static void rcar_du_lvds_encoder_dpms(struct drm_encoder *encoder, int mode)
- {
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_lvdscon.c b/drivers/gpu/drm/rcar-du/rcar_du_lvdscon.c
-new file mode 100644
-index 000000000000..6cfcc9438c68
---- /dev/null
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_lvdscon.c
-@@ -0,0 +1,130 @@
-+/*
-+ * rcar_du_lvdscon.c  --  R-Car Display Unit LVDS Connector
-+ *
-+ * Copyright (C) 2013 Renesas Corporation
-+ *
-+ * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ */
-+
-+#include <drm/drmP.h>
-+#include <drm/drm_crtc.h>
-+#include <drm/drm_crtc_helper.h>
-+
-+#include "rcar_du_drv.h"
-+#include "rcar_du_kms.h"
-+#include "rcar_du_lvdscon.h"
-+
-+struct rcar_du_lvds_connector {
-+	struct rcar_du_connector connector;
-+
-+	const struct rcar_du_panel_data *panel;
-+};
-+
-+#define to_rcar_lvds_connector(c) \
-+	container_of(c, struct rcar_du_lvds_connector, connector.connector)
-+
-+static int rcar_du_lvds_connector_get_modes(struct drm_connector *connector)
-+{
-+	struct rcar_du_lvds_connector *lvdscon =
-+		to_rcar_lvds_connector(connector);
-+	struct drm_display_mode *mode;
-+
-+	mode = drm_mode_create(connector->dev);
-+	if (mode == NULL)
-+		return 0;
-+
-+	mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER;
-+	mode->clock = lvdscon->panel->mode.clock;
-+	mode->hdisplay = lvdscon->panel->mode.hdisplay;
-+	mode->hsync_start = lvdscon->panel->mode.hsync_start;
-+	mode->hsync_end = lvdscon->panel->mode.hsync_end;
-+	mode->htotal = lvdscon->panel->mode.htotal;
-+	mode->vdisplay = lvdscon->panel->mode.vdisplay;
-+	mode->vsync_start = lvdscon->panel->mode.vsync_start;
-+	mode->vsync_end = lvdscon->panel->mode.vsync_end;
-+	mode->vtotal = lvdscon->panel->mode.vtotal;
-+	mode->flags = lvdscon->panel->mode.flags;
-+
-+	drm_mode_set_name(mode);
-+	drm_mode_probed_add(connector, mode);
-+
-+	return 1;
-+}
-+
-+static int rcar_du_lvds_connector_mode_valid(struct drm_connector *connector,
-+					    struct drm_display_mode *mode)
-+{
-+	return MODE_OK;
-+}
-+
-+static const struct drm_connector_helper_funcs connector_helper_funcs = {
-+	.get_modes = rcar_du_lvds_connector_get_modes,
-+	.mode_valid = rcar_du_lvds_connector_mode_valid,
-+	.best_encoder = rcar_du_connector_best_encoder,
-+};
-+
-+static void rcar_du_lvds_connector_destroy(struct drm_connector *connector)
-+{
-+	drm_sysfs_connector_remove(connector);
-+	drm_connector_cleanup(connector);
-+}
-+
-+static enum drm_connector_status
-+rcar_du_lvds_connector_detect(struct drm_connector *connector, bool force)
-+{
-+	return connector_status_connected;
-+}
-+
-+static const struct drm_connector_funcs connector_funcs = {
-+	.dpms = drm_helper_connector_dpms,
-+	.detect = rcar_du_lvds_connector_detect,
-+	.fill_modes = drm_helper_probe_single_connector_modes,
-+	.destroy = rcar_du_lvds_connector_destroy,
-+};
-+
-+int rcar_du_lvds_connector_init(struct rcar_du_device *rcdu,
-+				struct rcar_du_encoder *renc,
-+				const struct rcar_du_panel_data *panel)
-+{
-+	struct rcar_du_lvds_connector *lvdscon;
-+	struct drm_connector *connector;
-+	int ret;
-+
-+	lvdscon = devm_kzalloc(rcdu->dev, sizeof(*lvdscon), GFP_KERNEL);
-+	if (lvdscon == NULL)
-+		return -ENOMEM;
-+
-+	lvdscon->panel = panel;
-+
-+	connector = &lvdscon->connector.connector;
-+	connector->display_info.width_mm = panel->width_mm;
-+	connector->display_info.height_mm = panel->height_mm;
-+
-+	ret = drm_connector_init(rcdu->ddev, connector, &connector_funcs,
-+				 DRM_MODE_CONNECTOR_LVDS);
-+	if (ret < 0)
-+		return ret;
-+
-+	drm_connector_helper_add(connector, &connector_helper_funcs);
-+	ret = drm_sysfs_connector_add(connector);
-+	if (ret < 0)
-+		return ret;
-+
-+	drm_helper_connector_dpms(connector, DRM_MODE_DPMS_OFF);
-+	drm_object_property_set_value(&connector->base,
-+		rcdu->ddev->mode_config.dpms_property, DRM_MODE_DPMS_OFF);
-+
-+	ret = drm_mode_connector_attach_encoder(connector, &renc->encoder);
-+	if (ret < 0)
-+		return ret;
-+
-+	connector->encoder = &renc->encoder;
-+	lvdscon->connector.encoder = renc;
-+
-+	return 0;
-+}
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_lvdscon.h b/drivers/gpu/drm/rcar-du/rcar_du_lvdscon.h
-new file mode 100644
-index 000000000000..bff8683699ca
---- /dev/null
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_lvdscon.h
-@@ -0,0 +1,25 @@
-+/*
-+ * rcar_du_lvdscon.h  --  R-Car Display Unit LVDS Connector
-+ *
-+ * Copyright (C) 2013 Renesas Corporation
-+ *
-+ * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ */
-+
-+#ifndef __RCAR_DU_LVDSCON_H__
-+#define __RCAR_DU_LVDSCON_H__
-+
-+struct rcar_du_device;
-+struct rcar_du_encoder;
-+struct rcar_du_panel_data;
-+
-+int rcar_du_lvds_connector_init(struct rcar_du_device *rcdu,
-+				struct rcar_du_encoder *renc,
-+				const struct rcar_du_panel_data *panel);
-+
-+#endif /* __RCAR_DU_LVDSCON_H__ */
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0017-serial-sh-sci-Sort-headers-alphabetically.patch b/patches.renesas/0017-serial-sh-sci-Sort-headers-alphabetically.patch
deleted file mode 100644
index eb4d8340a24f1..0000000000000
--- a/patches.renesas/0017-serial-sh-sci-Sort-headers-alphabetically.patch
+++ /dev/null
@@ -1,81 +0,0 @@
-From 8dfa60addb67c80253e2d01449191df75caae62d Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 6 Dec 2013 10:59:10 +0100
-Subject: serial: sh-sci: Sort headers alphabetically
-
-This helps locating duplicates.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 8fb9631c517b862267590e7af93615a6ef03394d)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/tty/serial/sh-sci.c | 42 +++++++++++++++++++++---------------------
- 1 file changed, 21 insertions(+), 21 deletions(-)
-
-diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
-index 7036ed20700c..6e54c440da5e 100644
---- a/drivers/tty/serial/sh-sci.c
-+++ b/drivers/tty/serial/sh-sci.c
-@@ -23,35 +23,35 @@
- 
- #undef DEBUG
- 
--#include <linux/module.h>
-+#include <linux/clk.h>
-+#include <linux/console.h>
-+#include <linux/ctype.h>
-+#include <linux/cpufreq.h>
-+#include <linux/delay.h>
-+#include <linux/dmaengine.h>
-+#include <linux/dma-mapping.h>
-+#include <linux/err.h>
- #include <linux/errno.h>
--#include <linux/sh_dma.h>
--#include <linux/timer.h>
-+#include <linux/gpio.h>
-+#include <linux/init.h>
- #include <linux/interrupt.h>
--#include <linux/tty.h>
--#include <linux/tty_flip.h>
--#include <linux/serial.h>
--#include <linux/major.h>
--#include <linux/string.h>
--#include <linux/sysrq.h>
- #include <linux/ioport.h>
-+#include <linux/major.h>
-+#include <linux/module.h>
- #include <linux/mm.h>
--#include <linux/init.h>
--#include <linux/delay.h>
--#include <linux/console.h>
--#include <linux/platform_device.h>
--#include <linux/serial_sci.h>
- #include <linux/notifier.h>
-+#include <linux/platform_device.h>
- #include <linux/pm_runtime.h>
--#include <linux/cpufreq.h>
--#include <linux/clk.h>
--#include <linux/ctype.h>
--#include <linux/err.h>
--#include <linux/dmaengine.h>
--#include <linux/dma-mapping.h>
- #include <linux/scatterlist.h>
-+#include <linux/serial.h>
-+#include <linux/serial_sci.h>
-+#include <linux/sh_dma.h>
- #include <linux/slab.h>
--#include <linux/gpio.h>
-+#include <linux/string.h>
-+#include <linux/sysrq.h>
-+#include <linux/timer.h>
-+#include <linux/tty.h>
-+#include <linux/tty_flip.h>
- 
- #ifdef CONFIG_SUPERH
- #include <asm/sh_bios.h>
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0018-drm-rcar-du-Split-VGA-encoder-and-connector.patch b/patches.renesas/0018-drm-rcar-du-Split-VGA-encoder-and-connector.patch
deleted file mode 100644
index 9141e3e6d737f..0000000000000
--- a/patches.renesas/0018-drm-rcar-du-Split-VGA-encoder-and-connector.patch
+++ /dev/null
@@ -1,279 +0,0 @@
-From 2c68507e41c5653e86514c5f995ed0f12b00881c Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Sat, 15 Jun 2013 14:21:51 +0200
-Subject: drm/rcar-du: Split VGA encoder and connector
-
-This prepares for the encoders rework.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit 9e8be27233c1e98b06edeb801640b1f96b09e466)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/rcar-du/Makefile         |  3 +-
- drivers/gpu/drm/rcar-du/rcar_du_vga.c    | 86 +----------------------------
- drivers/gpu/drm/rcar-du/rcar_du_vga.h    |  2 +-
- drivers/gpu/drm/rcar-du/rcar_du_vgacon.c | 95 ++++++++++++++++++++++++++++++++
- drivers/gpu/drm/rcar-du/rcar_du_vgacon.h | 23 ++++++++
- 5 files changed, 123 insertions(+), 86 deletions(-)
- create mode 100644 drivers/gpu/drm/rcar-du/rcar_du_vgacon.c
- create mode 100644 drivers/gpu/drm/rcar-du/rcar_du_vgacon.h
-
-diff --git a/drivers/gpu/drm/rcar-du/Makefile b/drivers/gpu/drm/rcar-du/Makefile
-index 5def510599b0..45a8479aed0d 100644
---- a/drivers/gpu/drm/rcar-du/Makefile
-+++ b/drivers/gpu/drm/rcar-du/Makefile
-@@ -4,6 +4,7 @@ rcar-du-drm-y := rcar_du_crtc.o \
- 		 rcar_du_lvds.o \
- 		 rcar_du_lvdscon.o \
- 		 rcar_du_plane.o \
--		 rcar_du_vga.o
-+		 rcar_du_vga.o \
-+		 rcar_du_vgacon.o
- 
- obj-$(CONFIG_DRM_RCAR_DU)	+= rcar-du-drm.o
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vga.c b/drivers/gpu/drm/rcar-du/rcar_du_vga.c
-index 327289ec380d..369ab32d5652 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_vga.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_vga.c
-@@ -1,5 +1,5 @@
- /*
-- * rcar_du_vga.c  --  R-Car Display Unit VGA DAC and Connector
-+ * rcar_du_vga.c  --  R-Car Display Unit VGA DAC
-  *
-  * Copyright (C) 2013 Renesas Corporation
-  *
-@@ -18,89 +18,7 @@
- #include "rcar_du_drv.h"
- #include "rcar_du_kms.h"
- #include "rcar_du_vga.h"
--
--/* -----------------------------------------------------------------------------
-- * Connector
-- */
--
--static int rcar_du_vga_connector_get_modes(struct drm_connector *connector)
--{
--	return 0;
--}
--
--static int rcar_du_vga_connector_mode_valid(struct drm_connector *connector,
--					    struct drm_display_mode *mode)
--{
--	return MODE_OK;
--}
--
--static const struct drm_connector_helper_funcs connector_helper_funcs = {
--	.get_modes = rcar_du_vga_connector_get_modes,
--	.mode_valid = rcar_du_vga_connector_mode_valid,
--	.best_encoder = rcar_du_connector_best_encoder,
--};
--
--static void rcar_du_vga_connector_destroy(struct drm_connector *connector)
--{
--	drm_sysfs_connector_remove(connector);
--	drm_connector_cleanup(connector);
--}
--
--static enum drm_connector_status
--rcar_du_vga_connector_detect(struct drm_connector *connector, bool force)
--{
--	return connector_status_unknown;
--}
--
--static const struct drm_connector_funcs connector_funcs = {
--	.dpms = drm_helper_connector_dpms,
--	.detect = rcar_du_vga_connector_detect,
--	.fill_modes = drm_helper_probe_single_connector_modes,
--	.destroy = rcar_du_vga_connector_destroy,
--};
--
--static int rcar_du_vga_connector_init(struct rcar_du_device *rcdu,
--				      struct rcar_du_encoder *renc)
--{
--	struct rcar_du_connector *rcon;
--	struct drm_connector *connector;
--	int ret;
--
--	rcon = devm_kzalloc(rcdu->dev, sizeof(*rcon), GFP_KERNEL);
--	if (rcon == NULL)
--		return -ENOMEM;
--
--	connector = &rcon->connector;
--	connector->display_info.width_mm = 0;
--	connector->display_info.height_mm = 0;
--
--	ret = drm_connector_init(rcdu->ddev, connector, &connector_funcs,
--				 DRM_MODE_CONNECTOR_VGA);
--	if (ret < 0)
--		return ret;
--
--	drm_connector_helper_add(connector, &connector_helper_funcs);
--	ret = drm_sysfs_connector_add(connector);
--	if (ret < 0)
--		return ret;
--
--	drm_helper_connector_dpms(connector, DRM_MODE_DPMS_OFF);
--	drm_object_property_set_value(&connector->base,
--		rcdu->ddev->mode_config.dpms_property, DRM_MODE_DPMS_OFF);
--
--	ret = drm_mode_connector_attach_encoder(connector, &renc->encoder);
--	if (ret < 0)
--		return ret;
--
--	connector->encoder = &renc->encoder;
--	rcon->encoder = renc;
--
--	return 0;
--}
--
--/* -----------------------------------------------------------------------------
-- * Encoder
-- */
-+#include "rcar_du_vgacon.h"
- 
- static void rcar_du_vga_encoder_dpms(struct drm_encoder *encoder, int mode)
- {
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vga.h b/drivers/gpu/drm/rcar-du/rcar_du_vga.h
-index 66b4d2d7190d..b969b2075b57 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_vga.h
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_vga.h
-@@ -1,5 +1,5 @@
- /*
-- * rcar_du_vga.h  --  R-Car Display Unit VGA DAC and Connector
-+ * rcar_du_vga.h  --  R-Car Display Unit VGA DAC
-  *
-  * Copyright (C) 2013 Renesas Corporation
-  *
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vgacon.c b/drivers/gpu/drm/rcar-du/rcar_du_vgacon.c
-new file mode 100644
-index 000000000000..2ee320333615
---- /dev/null
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_vgacon.c
-@@ -0,0 +1,95 @@
-+/*
-+ * rcar_du_vgacon.c  --  R-Car Display Unit VGA Connector
-+ *
-+ * Copyright (C) 2013 Renesas Corporation
-+ *
-+ * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ */
-+
-+#include <drm/drmP.h>
-+#include <drm/drm_crtc.h>
-+#include <drm/drm_crtc_helper.h>
-+
-+#include "rcar_du_drv.h"
-+#include "rcar_du_kms.h"
-+#include "rcar_du_vgacon.h"
-+
-+static int rcar_du_vga_connector_get_modes(struct drm_connector *connector)
-+{
-+	return 0;
-+}
-+
-+static int rcar_du_vga_connector_mode_valid(struct drm_connector *connector,
-+					    struct drm_display_mode *mode)
-+{
-+	return MODE_OK;
-+}
-+
-+static const struct drm_connector_helper_funcs connector_helper_funcs = {
-+	.get_modes = rcar_du_vga_connector_get_modes,
-+	.mode_valid = rcar_du_vga_connector_mode_valid,
-+	.best_encoder = rcar_du_connector_best_encoder,
-+};
-+
-+static void rcar_du_vga_connector_destroy(struct drm_connector *connector)
-+{
-+	drm_sysfs_connector_remove(connector);
-+	drm_connector_cleanup(connector);
-+}
-+
-+static enum drm_connector_status
-+rcar_du_vga_connector_detect(struct drm_connector *connector, bool force)
-+{
-+	return connector_status_unknown;
-+}
-+
-+static const struct drm_connector_funcs connector_funcs = {
-+	.dpms = drm_helper_connector_dpms,
-+	.detect = rcar_du_vga_connector_detect,
-+	.fill_modes = drm_helper_probe_single_connector_modes,
-+	.destroy = rcar_du_vga_connector_destroy,
-+};
-+
-+int rcar_du_vga_connector_init(struct rcar_du_device *rcdu,
-+			       struct rcar_du_encoder *renc)
-+{
-+	struct rcar_du_connector *rcon;
-+	struct drm_connector *connector;
-+	int ret;
-+
-+	rcon = devm_kzalloc(rcdu->dev, sizeof(*rcon), GFP_KERNEL);
-+	if (rcon == NULL)
-+		return -ENOMEM;
-+
-+	connector = &rcon->connector;
-+	connector->display_info.width_mm = 0;
-+	connector->display_info.height_mm = 0;
-+
-+	ret = drm_connector_init(rcdu->ddev, connector, &connector_funcs,
-+				 DRM_MODE_CONNECTOR_VGA);
-+	if (ret < 0)
-+		return ret;
-+
-+	drm_connector_helper_add(connector, &connector_helper_funcs);
-+	ret = drm_sysfs_connector_add(connector);
-+	if (ret < 0)
-+		return ret;
-+
-+	drm_helper_connector_dpms(connector, DRM_MODE_DPMS_OFF);
-+	drm_object_property_set_value(&connector->base,
-+		rcdu->ddev->mode_config.dpms_property, DRM_MODE_DPMS_OFF);
-+
-+	ret = drm_mode_connector_attach_encoder(connector, &renc->encoder);
-+	if (ret < 0)
-+		return ret;
-+
-+	connector->encoder = &renc->encoder;
-+	rcon->encoder = renc;
-+
-+	return 0;
-+}
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vgacon.h b/drivers/gpu/drm/rcar-du/rcar_du_vgacon.h
-new file mode 100644
-index 000000000000..b12b0cf7f117
---- /dev/null
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_vgacon.h
-@@ -0,0 +1,23 @@
-+/*
-+ * rcar_du_vgacon.h  --  R-Car Display Unit VGA Connector
-+ *
-+ * Copyright (C) 2013 Renesas Corporation
-+ *
-+ * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ */
-+
-+#ifndef __RCAR_DU_VGACON_H__
-+#define __RCAR_DU_VGACON_H__
-+
-+struct rcar_du_device;
-+struct rcar_du_encoder;
-+
-+int rcar_du_vga_connector_init(struct rcar_du_device *rcdu,
-+			       struct rcar_du_encoder *renc);
-+
-+#endif /* __RCAR_DU_VGACON_H__ */
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0018-serial-sh-sci-Remove-baud-rate-calculation-algorithm.patch b/patches.renesas/0018-serial-sh-sci-Remove-baud-rate-calculation-algorithm.patch
deleted file mode 100644
index a729e4c4a0f3c..0000000000000
--- a/patches.renesas/0018-serial-sh-sci-Remove-baud-rate-calculation-algorithm.patch
+++ /dev/null
@@ -1,46 +0,0 @@
-From 3a067cff7d5a858a854df2da304168fb6b4c9284 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 6 Dec 2013 10:59:11 +0100
-Subject: serial: sh-sci: Remove baud rate calculation algorithm 5
-
-The algorithm isn't used, remove it.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 6db201da2522d7dd231982ff7b83916cf4db3e41)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/tty/serial/sh-sci.c | 2 --
- include/linux/serial_sci.h  | 1 -
- 2 files changed, 3 deletions(-)
-
-diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
-index 6e54c440da5e..80a91038c821 100644
---- a/drivers/tty/serial/sh-sci.c
-+++ b/drivers/tty/serial/sh-sci.c
-@@ -1825,8 +1825,6 @@ static unsigned int sci_scbrr_calc(unsigned int algo_id, unsigned int bps,
- 		return (((freq * 2) + 16 * bps) / (16 * bps) - 1);
- 	case SCBRR_ALGO_4:
- 		return (((freq * 2) + 16 * bps) / (32 * bps) - 1);
--	case SCBRR_ALGO_5:
--		return (((freq * 1000 / 32) / bps) - 1);
- 	}
- 
- 	/* Warn, but use a safe default */
-diff --git a/include/linux/serial_sci.h b/include/linux/serial_sci.h
-index d34049712a4d..803068d764fb 100644
---- a/include/linux/serial_sci.h
-+++ b/include/linux/serial_sci.h
-@@ -15,7 +15,6 @@ enum {
- 	SCBRR_ALGO_2,		/* ((clk + 16 * bps) / (32 * bps) - 1) */
- 	SCBRR_ALGO_3,		/* (((clk * 2) + 16 * bps) / (16 * bps) - 1) */
- 	SCBRR_ALGO_4,		/* (((clk * 2) + 16 * bps) / (32 * bps) - 1) */
--	SCBRR_ALGO_5,		/* (((clk * 1000 / 32) / bps) - 1) */
- 	SCBRR_ALGO_6,		/* HSCIF variable sample rate algorithm */
- };
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0019-drm-rcar-du-Merge-LVDS-and-VGA-encoder-code.patch b/patches.renesas/0019-drm-rcar-du-Merge-LVDS-and-VGA-encoder-code.patch
deleted file mode 100644
index 70327d225e26a..0000000000000
--- a/patches.renesas/0019-drm-rcar-du-Merge-LVDS-and-VGA-encoder-code.patch
+++ /dev/null
@@ -1,535 +0,0 @@
-From 29e17e341e43d36de051c0822a6c76a6df749f83 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Sat, 15 Jun 2013 15:02:12 +0200
-Subject: drm/rcar-du: Merge LVDS and VGA encoder code
-
-Create a single rcar_du_encoder structure that implements a KMS encoder.
-The current implementation is straightforward and only configures CRTC
-output routing.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit 6978f123776594b251d26dac9bcdf3ce8e9781c8)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/rcar-du/Makefile                   |  3 +-
- drivers/gpu/drm/rcar-du/rcar_du_crtc.c             |  2 -
- .../rcar-du/{rcar_du_lvds.c => rcar_du_encoder.c}  | 74 ++++++++++++++++++----
- drivers/gpu/drm/rcar-du/rcar_du_encoder.h          | 45 +++++++++++++
- drivers/gpu/drm/rcar-du/rcar_du_kms.c              | 49 ++------------
- drivers/gpu/drm/rcar-du/rcar_du_kms.h              | 29 +--------
- drivers/gpu/drm/rcar-du/rcar_du_lvds.h             | 24 -------
- drivers/gpu/drm/rcar-du/rcar_du_lvdscon.c          |  1 +
- drivers/gpu/drm/rcar-du/rcar_du_vga.c              | 67 --------------------
- drivers/gpu/drm/rcar-du/rcar_du_vga.h              | 24 -------
- drivers/gpu/drm/rcar-du/rcar_du_vgacon.c           |  1 +
- 11 files changed, 118 insertions(+), 201 deletions(-)
- rename drivers/gpu/drm/rcar-du/{rcar_du_lvds.c => rcar_du_encoder.c} (53%)
- create mode 100644 drivers/gpu/drm/rcar-du/rcar_du_encoder.h
- delete mode 100644 drivers/gpu/drm/rcar-du/rcar_du_lvds.h
- delete mode 100644 drivers/gpu/drm/rcar-du/rcar_du_vga.c
- delete mode 100644 drivers/gpu/drm/rcar-du/rcar_du_vga.h
-
-diff --git a/drivers/gpu/drm/rcar-du/Makefile b/drivers/gpu/drm/rcar-du/Makefile
-index 45a8479aed0d..57b0fe1fa66e 100644
---- a/drivers/gpu/drm/rcar-du/Makefile
-+++ b/drivers/gpu/drm/rcar-du/Makefile
-@@ -1,10 +1,9 @@
- rcar-du-drm-y := rcar_du_crtc.o \
- 		 rcar_du_drv.o \
-+		 rcar_du_encoder.o \
- 		 rcar_du_kms.o \
--		 rcar_du_lvds.o \
- 		 rcar_du_lvdscon.o \
- 		 rcar_du_plane.o \
--		 rcar_du_vga.o \
- 		 rcar_du_vgacon.o
- 
- obj-$(CONFIG_DRM_RCAR_DU)	+= rcar-du-drm.o
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
-index aefc8a0cbcbc..03dd7018dde8 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
-@@ -23,10 +23,8 @@
- #include "rcar_du_crtc.h"
- #include "rcar_du_drv.h"
- #include "rcar_du_kms.h"
--#include "rcar_du_lvds.h"
- #include "rcar_du_plane.h"
- #include "rcar_du_regs.h"
--#include "rcar_du_vga.h"
- 
- #define to_rcar_crtc(c)	container_of(c, struct rcar_du_crtc, crtc)
- 
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_lvds.c b/drivers/gpu/drm/rcar-du/rcar_du_encoder.c
-similarity index 53%
-rename from drivers/gpu/drm/rcar-du/rcar_du_lvds.c
-rename to drivers/gpu/drm/rcar-du/rcar_du_encoder.c
-index 82e515741f89..15a56433c80c 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_lvds.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_encoder.c
-@@ -1,5 +1,5 @@
- /*
-- * rcar_du_lvds.c  --  R-Car Display Unit LVDS Encoder
-+ * rcar_du_encoder.c  --  R-Car Display Unit Encoder
-  *
-  * Copyright (C) 2013 Renesas Corporation
-  *
-@@ -16,23 +16,44 @@
- #include <drm/drm_crtc_helper.h>
- 
- #include "rcar_du_drv.h"
-+#include "rcar_du_encoder.h"
- #include "rcar_du_kms.h"
--#include "rcar_du_lvds.h"
- #include "rcar_du_lvdscon.h"
-+#include "rcar_du_vgacon.h"
- 
--static void rcar_du_lvds_encoder_dpms(struct drm_encoder *encoder, int mode)
-+/* -----------------------------------------------------------------------------
-+ * Common connector functions
-+ */
-+
-+struct drm_encoder *
-+rcar_du_connector_best_encoder(struct drm_connector *connector)
- {
-+	struct rcar_du_connector *rcon = to_rcar_connector(connector);
-+
-+	return &rcon->encoder->encoder;
- }
- 
--static bool rcar_du_lvds_encoder_mode_fixup(struct drm_encoder *encoder,
--					   const struct drm_display_mode *mode,
--					   struct drm_display_mode *adjusted_mode)
-+/* -----------------------------------------------------------------------------
-+ * Encoder
-+ */
-+
-+static void rcar_du_encoder_dpms(struct drm_encoder *encoder, int mode)
-+{
-+}
-+
-+static bool rcar_du_encoder_mode_fixup(struct drm_encoder *encoder,
-+				       const struct drm_display_mode *mode,
-+				       struct drm_display_mode *adjusted_mode)
- {
- 	const struct drm_display_mode *panel_mode;
- 	struct drm_device *dev = encoder->dev;
- 	struct drm_connector *connector;
- 	bool found = false;
- 
-+	/* DAC encoders have currently no restriction on the mode. */
-+	if (encoder->encoder_type == DRM_MODE_ENCODER_DAC)
-+		return true;
-+
- 	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
- 		if (connector->encoder == encoder) {
- 			found = true;
-@@ -64,9 +85,26 @@ static bool rcar_du_lvds_encoder_mode_fixup(struct drm_encoder *encoder,
- 	return true;
- }
- 
-+static void rcar_du_encoder_mode_prepare(struct drm_encoder *encoder)
-+{
-+}
-+
-+static void rcar_du_encoder_mode_commit(struct drm_encoder *encoder)
-+{
-+}
-+
-+static void rcar_du_encoder_mode_set(struct drm_encoder *encoder,
-+				     struct drm_display_mode *mode,
-+				     struct drm_display_mode *adjusted_mode)
-+{
-+	struct rcar_du_encoder *renc = to_rcar_encoder(encoder);
-+
-+	rcar_du_crtc_route_output(encoder->crtc, renc->output);
-+}
-+
- static const struct drm_encoder_helper_funcs encoder_helper_funcs = {
--	.dpms = rcar_du_lvds_encoder_dpms,
--	.mode_fixup = rcar_du_lvds_encoder_mode_fixup,
-+	.dpms = rcar_du_encoder_dpms,
-+	.mode_fixup = rcar_du_encoder_mode_fixup,
- 	.prepare = rcar_du_encoder_mode_prepare,
- 	.commit = rcar_du_encoder_mode_commit,
- 	.mode_set = rcar_du_encoder_mode_set,
-@@ -76,9 +114,9 @@ static const struct drm_encoder_funcs encoder_funcs = {
- 	.destroy = drm_encoder_cleanup,
- };
- 
--int rcar_du_lvds_init(struct rcar_du_device *rcdu,
--		      const struct rcar_du_encoder_lvds_data *data,
--		      unsigned int output)
-+int rcar_du_encoder_init(struct rcar_du_device *rcdu,
-+			 enum rcar_du_encoder_type type, unsigned int output,
-+			 const struct rcar_du_encoder_data *data)
- {
- 	struct rcar_du_encoder *renc;
- 	int ret;
-@@ -90,11 +128,21 @@ int rcar_du_lvds_init(struct rcar_du_device *rcdu,
- 	renc->output = output;
- 
- 	ret = drm_encoder_init(rcdu->ddev, &renc->encoder, &encoder_funcs,
--			       DRM_MODE_ENCODER_LVDS);
-+			       type);
- 	if (ret < 0)
- 		return ret;
- 
- 	drm_encoder_helper_add(&renc->encoder, &encoder_helper_funcs);
- 
--	return rcar_du_lvds_connector_init(rcdu, renc, &data->panel);
-+	switch (type) {
-+	case RCAR_DU_ENCODER_LVDS:
-+		return rcar_du_lvds_connector_init(rcdu, renc,
-+						   &data->u.lvds.panel);
-+
-+	case RCAR_DU_ENCODER_VGA:
-+		return rcar_du_vga_connector_init(rcdu, renc);
-+
-+	default:
-+		return -EINVAL;
-+	}
- }
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_encoder.h b/drivers/gpu/drm/rcar-du/rcar_du_encoder.h
-new file mode 100644
-index 000000000000..4f76e16bca88
---- /dev/null
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_encoder.h
-@@ -0,0 +1,45 @@
-+/*
-+ * rcar_du_encoder.h  --  R-Car Display Unit Encoder
-+ *
-+ * Copyright (C) 2013 Renesas Corporation
-+ *
-+ * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ */
-+
-+#ifndef __RCAR_DU_ENCODER_H__
-+#define __RCAR_DU_ENCODER_H__
-+
-+#include <drm/drm_crtc.h>
-+
-+struct rcar_du_device;
-+struct rcar_du_encoder_data;
-+
-+struct rcar_du_encoder {
-+	struct drm_encoder encoder;
-+	unsigned int output;
-+};
-+
-+#define to_rcar_encoder(e) \
-+	container_of(e, struct rcar_du_encoder, encoder)
-+
-+struct rcar_du_connector {
-+	struct drm_connector connector;
-+	struct rcar_du_encoder *encoder;
-+};
-+
-+#define to_rcar_connector(c) \
-+	container_of(c, struct rcar_du_connector, connector)
-+
-+struct drm_encoder *
-+rcar_du_connector_best_encoder(struct drm_connector *connector);
-+
-+int rcar_du_encoder_init(struct rcar_du_device *rcdu,
-+			 enum rcar_du_encoder_type type, unsigned int output,
-+			 const struct rcar_du_encoder_data *data);
-+
-+#endif /* __RCAR_DU_ENCODER_H__ */
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms.c b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
-index d30c2e29bee2..3f8483cc0483 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_kms.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
-@@ -19,10 +19,9 @@
- 
- #include "rcar_du_crtc.h"
- #include "rcar_du_drv.h"
-+#include "rcar_du_encoder.h"
- #include "rcar_du_kms.h"
--#include "rcar_du_lvds.h"
- #include "rcar_du_regs.h"
--#include "rcar_du_vga.h"
- 
- /* -----------------------------------------------------------------------------
-  * Format helpers
-@@ -106,35 +105,6 @@ const struct rcar_du_format_info *rcar_du_format_info(u32 fourcc)
- }
- 
- /* -----------------------------------------------------------------------------
-- * Common connector and encoder functions
-- */
--
--struct drm_encoder *
--rcar_du_connector_best_encoder(struct drm_connector *connector)
--{
--	struct rcar_du_connector *rcon = to_rcar_connector(connector);
--
--	return &rcon->encoder->encoder;
--}
--
--void rcar_du_encoder_mode_prepare(struct drm_encoder *encoder)
--{
--}
--
--void rcar_du_encoder_mode_set(struct drm_encoder *encoder,
--			      struct drm_display_mode *mode,
--			      struct drm_display_mode *adjusted_mode)
--{
--	struct rcar_du_encoder *renc = to_rcar_encoder(encoder);
--
--	rcar_du_crtc_route_output(encoder->crtc, renc->output);
--}
--
--void rcar_du_encoder_mode_commit(struct drm_encoder *encoder)
--{
--}
--
--/* -----------------------------------------------------------------------------
-  * Frame buffer
-  */
- 
-@@ -221,6 +191,9 @@ int rcar_du_modeset_init(struct rcar_du_device *rcdu)
- 		const struct rcar_du_encoder_data *pdata =
- 			&rcdu->pdata->encoders[i];
- 
-+		if (pdata->encoder == RCAR_DU_ENCODER_UNUSED)
-+			continue;
-+
- 		if (pdata->output >= ARRAY_SIZE(rcdu->crtcs)) {
- 			dev_warn(rcdu->dev,
- 				 "encoder %u references unexisting output %u, skipping\n",
-@@ -228,18 +201,8 @@ int rcar_du_modeset_init(struct rcar_du_device *rcdu)
- 			continue;
- 		}
- 
--		switch (pdata->encoder) {
--		case RCAR_DU_ENCODER_VGA:
--			rcar_du_vga_init(rcdu, &pdata->u.vga, pdata->output);
--			break;
--
--		case RCAR_DU_ENCODER_LVDS:
--			rcar_du_lvds_init(rcdu, &pdata->u.lvds, pdata->output);
--			break;
--
--		default:
--			break;
--		}
-+		rcar_du_encoder_init(rcdu, pdata->encoder, pdata->output,
-+				     pdata);
- 	}
- 
- 	/* Set the possible CRTCs and possible clones. All encoders can be
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms.h b/drivers/gpu/drm/rcar-du/rcar_du_kms.h
-index dba472263486..5750e6af5655 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_kms.h
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_kms.h
-@@ -16,8 +16,9 @@
- 
- #include <linux/types.h>
- 
--#include <drm/drm_crtc.h>
--
-+struct drm_file;
-+struct drm_device;
-+struct drm_mode_create_dumb;
- struct rcar_du_device;
- 
- struct rcar_du_format_info {
-@@ -28,32 +29,8 @@ struct rcar_du_format_info {
- 	unsigned int edf;
- };
- 
--struct rcar_du_encoder {
--	struct drm_encoder encoder;
--	unsigned int output;
--};
--
--#define to_rcar_encoder(e) \
--	container_of(e, struct rcar_du_encoder, encoder)
--
--struct rcar_du_connector {
--	struct drm_connector connector;
--	struct rcar_du_encoder *encoder;
--};
--
--#define to_rcar_connector(c) \
--	container_of(c, struct rcar_du_connector, connector)
--
- const struct rcar_du_format_info *rcar_du_format_info(u32 fourcc);
- 
--struct drm_encoder *
--rcar_du_connector_best_encoder(struct drm_connector *connector);
--void rcar_du_encoder_mode_prepare(struct drm_encoder *encoder);
--void rcar_du_encoder_mode_set(struct drm_encoder *encoder,
--			      struct drm_display_mode *mode,
--			      struct drm_display_mode *adjusted_mode);
--void rcar_du_encoder_mode_commit(struct drm_encoder *encoder);
--
- int rcar_du_modeset_init(struct rcar_du_device *rcdu);
- 
- int rcar_du_dumb_create(struct drm_file *file, struct drm_device *dev,
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_lvds.h b/drivers/gpu/drm/rcar-du/rcar_du_lvds.h
-deleted file mode 100644
-index b47f8328e103..000000000000
---- a/drivers/gpu/drm/rcar-du/rcar_du_lvds.h
-+++ /dev/null
-@@ -1,24 +0,0 @@
--/*
-- * rcar_du_lvds.h  --  R-Car Display Unit LVDS Encoder and Connector
-- *
-- * Copyright (C) 2013 Renesas Corporation
-- *
-- * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
-- *
-- * This program is free software; you can redistribute it and/or modify
-- * it under the terms of the GNU General Public License as published by
-- * the Free Software Foundation; either version 2 of the License, or
-- * (at your option) any later version.
-- */
--
--#ifndef __RCAR_DU_LVDS_H__
--#define __RCAR_DU_LVDS_H__
--
--struct rcar_du_device;
--struct rcar_du_encoder_lvds_data;
--
--int rcar_du_lvds_init(struct rcar_du_device *rcdu,
--		      const struct rcar_du_encoder_lvds_data *data,
--		      unsigned int output);
--
--#endif /* __RCAR_DU_LVDS_H__ */
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_lvdscon.c b/drivers/gpu/drm/rcar-du/rcar_du_lvdscon.c
-index 6cfcc9438c68..4f3ba93cd91d 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_lvdscon.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_lvdscon.c
-@@ -16,6 +16,7 @@
- #include <drm/drm_crtc_helper.h>
- 
- #include "rcar_du_drv.h"
-+#include "rcar_du_encoder.h"
- #include "rcar_du_kms.h"
- #include "rcar_du_lvdscon.h"
- 
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vga.c b/drivers/gpu/drm/rcar-du/rcar_du_vga.c
-deleted file mode 100644
-index 369ab32d5652..000000000000
---- a/drivers/gpu/drm/rcar-du/rcar_du_vga.c
-+++ /dev/null
-@@ -1,67 +0,0 @@
--/*
-- * rcar_du_vga.c  --  R-Car Display Unit VGA DAC
-- *
-- * Copyright (C) 2013 Renesas Corporation
-- *
-- * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
-- *
-- * This program is free software; you can redistribute it and/or modify
-- * it under the terms of the GNU General Public License as published by
-- * the Free Software Foundation; either version 2 of the License, or
-- * (at your option) any later version.
-- */
--
--#include <drm/drmP.h>
--#include <drm/drm_crtc.h>
--#include <drm/drm_crtc_helper.h>
--
--#include "rcar_du_drv.h"
--#include "rcar_du_kms.h"
--#include "rcar_du_vga.h"
--#include "rcar_du_vgacon.h"
--
--static void rcar_du_vga_encoder_dpms(struct drm_encoder *encoder, int mode)
--{
--}
--
--static bool rcar_du_vga_encoder_mode_fixup(struct drm_encoder *encoder,
--					   const struct drm_display_mode *mode,
--					   struct drm_display_mode *adjusted_mode)
--{
--	return true;
--}
--
--static const struct drm_encoder_helper_funcs encoder_helper_funcs = {
--	.dpms = rcar_du_vga_encoder_dpms,
--	.mode_fixup = rcar_du_vga_encoder_mode_fixup,
--	.prepare = rcar_du_encoder_mode_prepare,
--	.commit = rcar_du_encoder_mode_commit,
--	.mode_set = rcar_du_encoder_mode_set,
--};
--
--static const struct drm_encoder_funcs encoder_funcs = {
--	.destroy = drm_encoder_cleanup,
--};
--
--int rcar_du_vga_init(struct rcar_du_device *rcdu,
--		     const struct rcar_du_encoder_vga_data *data,
--		     unsigned int output)
--{
--	struct rcar_du_encoder *renc;
--	int ret;
--
--	renc = devm_kzalloc(rcdu->dev, sizeof(*renc), GFP_KERNEL);
--	if (renc == NULL)
--		return -ENOMEM;
--
--	renc->output = output;
--
--	ret = drm_encoder_init(rcdu->ddev, &renc->encoder, &encoder_funcs,
--			       DRM_MODE_ENCODER_DAC);
--	if (ret < 0)
--		return ret;
--
--	drm_encoder_helper_add(&renc->encoder, &encoder_helper_funcs);
--
--	return rcar_du_vga_connector_init(rcdu, renc);
--}
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vga.h b/drivers/gpu/drm/rcar-du/rcar_du_vga.h
-deleted file mode 100644
-index b969b2075b57..000000000000
---- a/drivers/gpu/drm/rcar-du/rcar_du_vga.h
-+++ /dev/null
-@@ -1,24 +0,0 @@
--/*
-- * rcar_du_vga.h  --  R-Car Display Unit VGA DAC
-- *
-- * Copyright (C) 2013 Renesas Corporation
-- *
-- * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
-- *
-- * This program is free software; you can redistribute it and/or modify
-- * it under the terms of the GNU General Public License as published by
-- * the Free Software Foundation; either version 2 of the License, or
-- * (at your option) any later version.
-- */
--
--#ifndef __RCAR_DU_VGA_H__
--#define __RCAR_DU_VGA_H__
--
--struct rcar_du_device;
--struct rcar_du_encoder_vga_data;
--
--int rcar_du_vga_init(struct rcar_du_device *rcdu,
--		     const struct rcar_du_encoder_vga_data *data,
--		     unsigned int output);
--
--#endif /* __RCAR_DU_VGA_H__ */
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vgacon.c b/drivers/gpu/drm/rcar-du/rcar_du_vgacon.c
-index 2ee320333615..36105db9bda1 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_vgacon.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_vgacon.c
-@@ -16,6 +16,7 @@
- #include <drm/drm_crtc_helper.h>
- 
- #include "rcar_du_drv.h"
-+#include "rcar_du_encoder.h"
- #include "rcar_du_kms.h"
- #include "rcar_du_vgacon.h"
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0019-serial-sh-sci-Simplify-baud-rate-calculation-algorit.patch b/patches.renesas/0019-serial-sh-sci-Simplify-baud-rate-calculation-algorit.patch
deleted file mode 100644
index efdff82ddfbbf..0000000000000
--- a/patches.renesas/0019-serial-sh-sci-Simplify-baud-rate-calculation-algorit.patch
+++ /dev/null
@@ -1,63 +0,0 @@
-From 09419333d40b298b7d6eeae4f53de1e00900e756 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 6 Dec 2013 10:59:12 +0100
-Subject: serial: sh-sci: Simplify baud rate calculation algorithms
-
-Rewrite the baud rate register value calculations in easier to read
-forms. The computed value isn't modified.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 6557b1f69ea0961efde7ab33bfe0cb7e3bfed54e)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/tty/serial/sh-sci.c | 8 ++++----
- include/linux/serial_sci.h  | 8 ++++----
- 2 files changed, 8 insertions(+), 8 deletions(-)
-
-diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
-index 80a91038c821..94e878cacd50 100644
---- a/drivers/tty/serial/sh-sci.c
-+++ b/drivers/tty/serial/sh-sci.c
-@@ -1818,13 +1818,13 @@ static unsigned int sci_scbrr_calc(unsigned int algo_id, unsigned int bps,
- {
- 	switch (algo_id) {
- 	case SCBRR_ALGO_1:
--		return ((freq + 16 * bps) / (16 * bps) - 1);
-+		return freq / (16 * bps);
- 	case SCBRR_ALGO_2:
--		return ((freq + 16 * bps) / (32 * bps) - 1);
-+		return DIV_ROUND_CLOSEST(freq, 32 * bps) - 1;
- 	case SCBRR_ALGO_3:
--		return (((freq * 2) + 16 * bps) / (16 * bps) - 1);
-+		return freq / (8 * bps);
- 	case SCBRR_ALGO_4:
--		return (((freq * 2) + 16 * bps) / (32 * bps) - 1);
-+		return DIV_ROUND_CLOSEST(freq, 16 * bps) - 1;
- 	}
- 
- 	/* Warn, but use a safe default */
-diff --git a/include/linux/serial_sci.h b/include/linux/serial_sci.h
-index 803068d764fb..eb787d40df02 100644
---- a/include/linux/serial_sci.h
-+++ b/include/linux/serial_sci.h
-@@ -11,10 +11,10 @@
- #define SCIx_NOT_SUPPORTED	(-1)
- 
- enum {
--	SCBRR_ALGO_1,		/* ((clk + 16 * bps) / (16 * bps) - 1) */
--	SCBRR_ALGO_2,		/* ((clk + 16 * bps) / (32 * bps) - 1) */
--	SCBRR_ALGO_3,		/* (((clk * 2) + 16 * bps) / (16 * bps) - 1) */
--	SCBRR_ALGO_4,		/* (((clk * 2) + 16 * bps) / (32 * bps) - 1) */
-+	SCBRR_ALGO_1,		/* clk / (16 * bps) */
-+	SCBRR_ALGO_2,		/* DIV_ROUND_CLOSEST(clk, 32 * bps) - 1 */
-+	SCBRR_ALGO_3,		/* clk / (8 * bps) */
-+	SCBRR_ALGO_4,		/* DIV_ROUND_CLOSEST(clk, 16 * bps) - 1 */
- 	SCBRR_ALGO_6,		/* HSCIF variable sample rate algorithm */
- };
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0020-drm-rcar-du-Rename-platform-data-fields-to-match-wha.patch b/patches.renesas/0020-drm-rcar-du-Rename-platform-data-fields-to-match-wha.patch
deleted file mode 100644
index 15c64823fce4a..0000000000000
--- a/patches.renesas/0020-drm-rcar-du-Rename-platform-data-fields-to-match-wha.patch
+++ /dev/null
@@ -1,115 +0,0 @@
-From e3dca5eb510aa12130188f1c49e214fe575a0840 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Sun, 16 Jun 2013 16:25:35 +0200
-Subject: drm/rcar-du: Rename platform data fields to match what they describe
-
-The struct rcar_du_encoder_data encoder::field describes the encoder
-type, and the rcar_du_encoder_lvds_data and rcar_du_encoder_vga_data
-structures describe connector properties. Rename them accordingly.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit 9194731c5f9b2664c882a515b3398a29384a6864)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/rcar-du/rcar_du_encoder.c |  2 +-
- drivers/gpu/drm/rcar-du/rcar_du_encoder.h |  3 ++-
- drivers/gpu/drm/rcar-du/rcar_du_kms.c     |  5 ++---
- include/linux/platform_data/rcar-du.h     | 19 +++++++++++++------
- 4 files changed, 18 insertions(+), 11 deletions(-)
-
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_encoder.c b/drivers/gpu/drm/rcar-du/rcar_du_encoder.c
-index 15a56433c80c..0d0375c7ee44 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_encoder.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_encoder.c
-@@ -137,7 +137,7 @@ int rcar_du_encoder_init(struct rcar_du_device *rcdu,
- 	switch (type) {
- 	case RCAR_DU_ENCODER_LVDS:
- 		return rcar_du_lvds_connector_init(rcdu, renc,
--						   &data->u.lvds.panel);
-+						   &data->connector.lvds.panel);
- 
- 	case RCAR_DU_ENCODER_VGA:
- 		return rcar_du_vga_connector_init(rcdu, renc);
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_encoder.h b/drivers/gpu/drm/rcar-du/rcar_du_encoder.h
-index 4f76e16bca88..08cde1293892 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_encoder.h
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_encoder.h
-@@ -14,10 +14,11 @@
- #ifndef __RCAR_DU_ENCODER_H__
- #define __RCAR_DU_ENCODER_H__
- 
-+#include <linux/platform_data/rcar-du.h>
-+
- #include <drm/drm_crtc.h>
- 
- struct rcar_du_device;
--struct rcar_du_encoder_data;
- 
- struct rcar_du_encoder {
- 	struct drm_encoder encoder;
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms.c b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
-index 3f8483cc0483..a8eef167d51a 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_kms.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
-@@ -191,7 +191,7 @@ int rcar_du_modeset_init(struct rcar_du_device *rcdu)
- 		const struct rcar_du_encoder_data *pdata =
- 			&rcdu->pdata->encoders[i];
- 
--		if (pdata->encoder == RCAR_DU_ENCODER_UNUSED)
-+		if (pdata->type == RCAR_DU_ENCODER_UNUSED)
- 			continue;
- 
- 		if (pdata->output >= ARRAY_SIZE(rcdu->crtcs)) {
-@@ -201,8 +201,7 @@ int rcar_du_modeset_init(struct rcar_du_device *rcdu)
- 			continue;
- 		}
- 
--		rcar_du_encoder_init(rcdu, pdata->encoder, pdata->output,
--				     pdata);
-+		rcar_du_encoder_init(rcdu, pdata->type, pdata->output, pdata);
- 	}
- 
- 	/* Set the possible CRTCs and possible clones. All encoders can be
-diff --git a/include/linux/platform_data/rcar-du.h b/include/linux/platform_data/rcar-du.h
-index 80587fdbba3e..64cd8635e6e6 100644
---- a/include/linux/platform_data/rcar-du.h
-+++ b/include/linux/platform_data/rcar-du.h
-@@ -28,22 +28,29 @@ struct rcar_du_panel_data {
- 	struct drm_mode_modeinfo mode;
- };
- 
--struct rcar_du_encoder_lvds_data {
-+struct rcar_du_connector_lvds_data {
- 	struct rcar_du_panel_data panel;
- };
- 
--struct rcar_du_encoder_vga_data {
-+struct rcar_du_connector_vga_data {
- 	/* TODO: Add DDC information for EDID retrieval */
- };
- 
-+/*
-+ * struct rcar_du_encoder_data - Encoder platform data
-+ * @type: the encoder type (RCAR_DU_ENCODER_*)
-+ * @output: the DU output the connector is connected to
-+ * @connector.lvds: platform data for LVDS connectors
-+ * @connector.vga: platform data for VGA connectors
-+ */
- struct rcar_du_encoder_data {
--	enum rcar_du_encoder_type encoder;
-+	enum rcar_du_encoder_type type;
- 	unsigned int output;
- 
- 	union {
--		struct rcar_du_encoder_lvds_data lvds;
--		struct rcar_du_encoder_vga_data vga;
--	} u;
-+		struct rcar_du_connector_lvds_data lvds;
-+		struct rcar_du_connector_vga_data vga;
-+	} connector;
- };
- 
- struct rcar_du_platform_data {
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0020-gpio-rcar-Make-the-platform-data-gpio_base-field-sig.patch b/patches.renesas/0020-gpio-rcar-Make-the-platform-data-gpio_base-field-sig.patch
deleted file mode 100644
index c12101bb3c513..0000000000000
--- a/patches.renesas/0020-gpio-rcar-Make-the-platform-data-gpio_base-field-sig.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From 0d67a462a81051ac61e7df42642a47f25afd8f4f Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Date: Fri, 10 May 2013 16:48:36 +0200
-Subject: gpio-rcar: Make the platform data gpio_base field signed
-
-The gpio_base field is used to specify the desired GPIO base for the
-GPIO controller. The GPIO core can automatically allocate a GPIO number
-range when the base is set to -1. To make this possible, make the field
-signed.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Acked-by: Linus Walleij <linus.walleij@linaro.org>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 36cb0066ffc55fd326c8a21ffe80aaa5bd16021b)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- include/linux/platform_data/gpio-rcar.h | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/include/linux/platform_data/gpio-rcar.h b/include/linux/platform_data/gpio-rcar.h
-index b253f77a..aba7079c 100644
---- a/include/linux/platform_data/gpio-rcar.h
-+++ b/include/linux/platform_data/gpio-rcar.h
-@@ -17,7 +17,7 @@
- #define __GPIO_RCAR_H__
- 
- struct gpio_rcar_config {
--	unsigned int gpio_base;
-+	int gpio_base;
- 	unsigned int irq_base;
- 	unsigned int number_of_pins;
- 	const char *pctl_name;
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0020-serial-sh-sci-Remove-duplicate-interrupt-check-in-ve.patch b/patches.renesas/0020-serial-sh-sci-Remove-duplicate-interrupt-check-in-ve.patch
deleted file mode 100644
index 6a1432a448550..0000000000000
--- a/patches.renesas/0020-serial-sh-sci-Remove-duplicate-interrupt-check-in-ve.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From da08965ac0fcfbb4ceb88a92cd2adabe831bffc0 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 6 Dec 2013 10:59:13 +0100
-Subject: serial: sh-sci: Remove duplicate interrupt check in verify port op
-
-The driver checks if the interrupt number is greater than nr_irqs and
-returns an error in that case. The same check is already performed by
-the caller, remove it.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit b5e17b71c6b2ff284b4018e272e18876ccfa9b2c)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/tty/serial/sh-sci.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
-index 94e878cacd50..fa3a9422b8c7 100644
---- a/drivers/tty/serial/sh-sci.c
-+++ b/drivers/tty/serial/sh-sci.c
-@@ -2120,7 +2120,7 @@ static int sci_verify_port(struct uart_port *port, struct serial_struct *ser)
- {
- 	struct sci_port *s = to_sci_port(port);
- 
--	if (ser->irq != s->cfg->irqs[SCIx_TXI_IRQ] || ser->irq > nr_irqs)
-+	if (ser->irq != s->cfg->irqs[SCIx_TXI_IRQ])
- 		return -EINVAL;
- 	if (ser->baud_base < 2400)
- 		/* No paper tape reader for Mitch.. */
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0021-drm-rcar-du-Create-rcar_du_planes-structure.patch b/patches.renesas/0021-drm-rcar-du-Create-rcar_du_planes-structure.patch
deleted file mode 100644
index c55e2c0b3ecf5..0000000000000
--- a/patches.renesas/0021-drm-rcar-du-Create-rcar_du_planes-structure.patch
+++ /dev/null
@@ -1,83 +0,0 @@
-From 117fb0358a861aaa00e31cca4257a5e092a779e3 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Sun, 16 Jun 2013 21:02:49 +0200
-Subject: drm/rcar-du: Create rcar_du_planes structure
-
-Move the plane-related fields of struct rcar_du_device to their own
-structure.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit ae425b6a77a1118b1b4f594efe4aaa4243bf222b)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/rcar-du/rcar_du_drv.h   | 11 +----------
- drivers/gpu/drm/rcar-du/rcar_du_plane.h | 17 +++++++++++++++--
- 2 files changed, 16 insertions(+), 12 deletions(-)
-
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.h b/drivers/gpu/drm/rcar-du/rcar_du_drv.h
-index 7d2320fb948d..0305c21d71f3 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_drv.h
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.h
-@@ -15,7 +15,6 @@
- #define __RCAR_DU_DRV_H__
- 
- #include <linux/kernel.h>
--#include <linux/mutex.h>
- #include <linux/platform_data/rcar-du.h>
- 
- #include "rcar_du_crtc.h"
-@@ -49,15 +48,7 @@ struct rcar_du_device {
- 	unsigned int used_crtcs;
- 	unsigned int num_crtcs;
- 
--	struct {
--		struct rcar_du_plane planes[RCAR_DU_NUM_SW_PLANES];
--		unsigned int free;
--		struct mutex lock;
--
--		struct drm_property *alpha;
--		struct drm_property *colorkey;
--		struct drm_property *zpos;
--	} planes;
-+	struct rcar_du_planes planes;
- };
- 
- static inline bool rcar_du_has(struct rcar_du_device *rcdu,
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_plane.h b/drivers/gpu/drm/rcar-du/rcar_du_plane.h
-index 5397dba2fe57..5c8488ca019f 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_plane.h
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_plane.h
-@@ -14,8 +14,11 @@
- #ifndef __RCAR_DU_PLANE_H__
- #define __RCAR_DU_PLANE_H__
- 
--struct drm_crtc;
--struct drm_framebuffer;
-+#include <linux/mutex.h>
-+
-+#include <drm/drmP.h>
-+#include <drm/drm_crtc.h>
-+
- struct rcar_du_device;
- struct rcar_du_format_info;
- 
-@@ -54,6 +57,16 @@ struct rcar_du_plane {
- 	unsigned int dst_y;
- };
- 
-+struct rcar_du_planes {
-+	struct rcar_du_plane planes[RCAR_DU_NUM_SW_PLANES];
-+	unsigned int free;
-+	struct mutex lock;
-+
-+	struct drm_property *alpha;
-+	struct drm_property *colorkey;
-+	struct drm_property *zpos;
-+};
-+
- int rcar_du_plane_init(struct rcar_du_device *rcdu);
- int rcar_du_plane_register(struct rcar_du_device *rcdu);
- void rcar_du_plane_setup(struct rcar_du_plane *plane);
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0021-gpio-rcar-Add-support-for-IRQ_TYPE_EDGE_BOTH.patch b/patches.renesas/0021-gpio-rcar-Add-support-for-IRQ_TYPE_EDGE_BOTH.patch
deleted file mode 100644
index f4a86285f3162..0000000000000
--- a/patches.renesas/0021-gpio-rcar-Add-support-for-IRQ_TYPE_EDGE_BOTH.patch
+++ /dev/null
@@ -1,101 +0,0 @@
-From d8d574975de57110e0f08077056d8741fb3c204a Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Fri, 24 May 2013 18:47:24 +0900
-Subject: gpio-rcar: Add support for IRQ_TYPE_EDGE_BOTH
-
-As hardware support for this feature is not universal for all SoCs a flag,
-has_both_edge_trigger, has been added to the platform data of the driver to
-allow this feature to be enabled.
-
-The motivation for this is to allow use of the gpio-keys driver on the
-lager board which is based on the r8a7790 SoC. The V2 of this patch has been
-fully exercised using that driver on that board.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 7e1092b5a264c484001b0cdd1f49bea7884e3366)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpio/gpio-rcar.c                | 26 +++++++++++++++++++++-----
- include/linux/platform_data/gpio-rcar.h |  1 +
- 2 files changed, 22 insertions(+), 5 deletions(-)
-
-diff --git a/drivers/gpio/gpio-rcar.c b/drivers/gpio/gpio-rcar.c
-index 0f3d6473..d173d56d 100644
---- a/drivers/gpio/gpio-rcar.c
-+++ b/drivers/gpio/gpio-rcar.c
-@@ -49,6 +49,7 @@ struct gpio_rcar_priv {
- #define POSNEG 0x20
- #define EDGLEVEL 0x24
- #define FILONOFF 0x28
-+#define BOTHEDGE 0x4c
- 
- static inline u32 gpio_rcar_read(struct gpio_rcar_priv *p, int offs)
- {
-@@ -91,7 +92,8 @@ static void gpio_rcar_irq_enable(struct irq_data *d)
- static void gpio_rcar_config_interrupt_input_mode(struct gpio_rcar_priv *p,
- 						  unsigned int hwirq,
- 						  bool active_high_rising_edge,
--						  bool level_trigger)
-+						  bool level_trigger,
-+						  bool both)
- {
- 	unsigned long flags;
- 
-@@ -108,6 +110,10 @@ static void gpio_rcar_config_interrupt_input_mode(struct gpio_rcar_priv *p,
- 	/* Configure edge or level trigger in EDGLEVEL */
- 	gpio_rcar_modify_bit(p, EDGLEVEL, hwirq, !level_trigger);
- 
-+	/* Select one edge or both edges in BOTHEDGE */
-+	if (p->config.has_both_edge_trigger)
-+		gpio_rcar_modify_bit(p, BOTHEDGE, hwirq, both);
-+
- 	/* Select "Interrupt Input Mode" in IOINTSEL */
- 	gpio_rcar_modify_bit(p, IOINTSEL, hwirq, true);
- 
-@@ -127,16 +133,26 @@ static int gpio_rcar_irq_set_type(struct irq_data *d, unsigned int type)
- 
- 	switch (type & IRQ_TYPE_SENSE_MASK) {
- 	case IRQ_TYPE_LEVEL_HIGH:
--		gpio_rcar_config_interrupt_input_mode(p, hwirq, true, true);
-+		gpio_rcar_config_interrupt_input_mode(p, hwirq, true, true,
-+						      false);
- 		break;
- 	case IRQ_TYPE_LEVEL_LOW:
--		gpio_rcar_config_interrupt_input_mode(p, hwirq, false, true);
-+		gpio_rcar_config_interrupt_input_mode(p, hwirq, false, true,
-+						      false);
- 		break;
- 	case IRQ_TYPE_EDGE_RISING:
--		gpio_rcar_config_interrupt_input_mode(p, hwirq, true, false);
-+		gpio_rcar_config_interrupt_input_mode(p, hwirq, true, false,
-+						      false);
- 		break;
- 	case IRQ_TYPE_EDGE_FALLING:
--		gpio_rcar_config_interrupt_input_mode(p, hwirq, false, false);
-+		gpio_rcar_config_interrupt_input_mode(p, hwirq, false, false,
-+						      false);
-+		break;
-+	case IRQ_TYPE_EDGE_BOTH:
-+		if (!p->config.has_both_edge_trigger)
-+			return -EINVAL;
-+		gpio_rcar_config_interrupt_input_mode(p, hwirq, true, false,
-+						      true);
- 		break;
- 	default:
- 		return -EINVAL;
-diff --git a/include/linux/platform_data/gpio-rcar.h b/include/linux/platform_data/gpio-rcar.h
-index aba7079c..6c0027a3 100644
---- a/include/linux/platform_data/gpio-rcar.h
-+++ b/include/linux/platform_data/gpio-rcar.h
-@@ -21,6 +21,7 @@ struct gpio_rcar_config {
- 	unsigned int irq_base;
- 	unsigned int number_of_pins;
- 	const char *pctl_name;
-+	unsigned has_both_edge_trigger:1;
- };
- 
- #endif /* __GPIO_RCAR_H__ */
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0021-serial-sh-sci-Set-the-UPF_FIXED_PORT-flag.patch b/patches.renesas/0021-serial-sh-sci-Set-the-UPF_FIXED_PORT-flag.patch
deleted file mode 100644
index a56b90a5d6f17..0000000000000
--- a/patches.renesas/0021-serial-sh-sci-Set-the-UPF_FIXED_PORT-flag.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From 1e79414dfbade2f40ce2b9b81656ab3946c0cb2c Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 6 Dec 2013 10:59:14 +0100
-Subject: serial: sh-sci: Set the UPF_FIXED_PORT flag
-
-The base address, IRQ and baud rate generator parent clock rate can't be
-changed by userspace. Mark the port as fixed.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit b6e4a3f18c0d289c7eed652dc0253a7f8fea27e4)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/tty/serial/sh-sci.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
-index fa3a9422b8c7..da91d6f1091d 100644
---- a/drivers/tty/serial/sh-sci.c
-+++ b/drivers/tty/serial/sh-sci.c
-@@ -2248,7 +2248,7 @@ static int sci_init_single(struct platform_device *dev,
- 
- 	port->mapbase		= p->mapbase;
- 	port->type		= p->type;
--	port->flags		= p->flags;
-+	port->flags		= UPF_FIXED_PORT | p->flags;
- 	port->regshift		= p->regshift;
- 
- 	/*
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0022-drm-rcar-du-Rename-rcar_du_plane_-init-register-to-r.patch b/patches.renesas/0022-drm-rcar-du-Rename-rcar_du_plane_-init-register-to-r.patch
deleted file mode 100644
index 663039db40d48..0000000000000
--- a/patches.renesas/0022-drm-rcar-du-Rename-rcar_du_plane_-init-register-to-r.patch
+++ /dev/null
@@ -1,80 +0,0 @@
-From 4133d2bb9eb55443acfe8411ca5f2def731232f1 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Sun, 16 Jun 2013 19:18:31 +0200
-Subject: drm/rcar-du: Rename rcar_du_plane_(init|register) to rcar_du_planes_*
-
-The functions initialize or register all planes, rename them
-accordingly.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit 7fe99fda5f5c52a01b2c966aa68341a0b3d8ab33)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/rcar-du/rcar_du_kms.c   | 4 ++--
- drivers/gpu/drm/rcar-du/rcar_du_plane.c | 4 ++--
- drivers/gpu/drm/rcar-du/rcar_du_plane.h | 5 +++--
- 3 files changed, 7 insertions(+), 6 deletions(-)
-
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms.c b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
-index a8eef167d51a..a1343fbde57a 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_kms.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
-@@ -174,7 +174,7 @@ int rcar_du_modeset_init(struct rcar_du_device *rcdu)
- 	rcdu->ddev->mode_config.max_height = 2047;
- 	rcdu->ddev->mode_config.funcs = &rcar_du_mode_config_funcs;
- 
--	ret = rcar_du_plane_init(rcdu);
-+	ret = rcar_du_planes_init(rcdu);
- 	if (ret < 0)
- 		return ret;
- 
-@@ -215,7 +215,7 @@ int rcar_du_modeset_init(struct rcar_du_device *rcdu)
- 		encoder->possible_clones = 1 << 0;
- 	}
- 
--	ret = rcar_du_plane_register(rcdu);
-+	ret = rcar_du_planes_register(rcdu);
- 	if (ret < 0)
- 		return ret;
- 
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_plane.c b/drivers/gpu/drm/rcar-du/rcar_du_plane.c
-index 38ebd20e4e8d..29f21477ef0e 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_plane.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_plane.c
-@@ -435,7 +435,7 @@ static const uint32_t formats[] = {
- 	DRM_FORMAT_NV16,
- };
- 
--int rcar_du_plane_init(struct rcar_du_device *rcdu)
-+int rcar_du_planes_init(struct rcar_du_device *rcdu)
- {
- 	unsigned int i;
- 
-@@ -475,7 +475,7 @@ int rcar_du_plane_init(struct rcar_du_device *rcdu)
- 	return 0;
- }
- 
--int rcar_du_plane_register(struct rcar_du_device *rcdu)
-+int rcar_du_planes_register(struct rcar_du_device *rcdu)
- {
- 	unsigned int i;
- 	int ret;
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_plane.h b/drivers/gpu/drm/rcar-du/rcar_du_plane.h
-index 5c8488ca019f..bcf6f76f56a0 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_plane.h
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_plane.h
-@@ -67,8 +67,9 @@ struct rcar_du_planes {
- 	struct drm_property *zpos;
- };
- 
--int rcar_du_plane_init(struct rcar_du_device *rcdu);
--int rcar_du_plane_register(struct rcar_du_device *rcdu);
-+int rcar_du_planes_init(struct rcar_du_device *rcdu);
-+int rcar_du_planes_register(struct rcar_du_device *rcdu);
-+
- void rcar_du_plane_setup(struct rcar_du_plane *plane);
- void rcar_du_plane_update_base(struct rcar_du_plane *plane);
- void rcar_du_plane_compute_base(struct rcar_du_plane *plane,
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0022-gpio-rcar-Add-RCAR_GP_PIN-macro.patch b/patches.renesas/0022-gpio-rcar-Add-RCAR_GP_PIN-macro.patch
deleted file mode 100644
index 259dc5ec93de8..0000000000000
--- a/patches.renesas/0022-gpio-rcar-Add-RCAR_GP_PIN-macro.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From 69b2db4a30d95a8c9a2a33dc73f5cc429a706872 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Mon, 8 Apr 2013 11:36:13 +0200
-Subject: gpio-rcar: Add RCAR_GP_PIN macro
-
-Pins are numbered in the R-Car family documentation using a bank number
-and a pin number in the bank. As the Linux pin number space is linear,
-we need to flatten this by multiplying the bank number by 32 and adding
-the pin number. The resulting number bear no directly visible
-relationship  to the documentation, making it error-prone.
-
-Add a RCAR_GP_PIN macro to convert from the documentation pin number
-space to the linear Linux space.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-[horms+renesas@verge.net.au: non-trivial rebase on top of
- "sh-pfc: r8a7779: Don't group USB OVC and PENC pins"]
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-(cherry picked from commit 11df28ab76cd9e98e3e0bbbff8648d0a02509507)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- include/linux/platform_data/gpio-rcar.h | 2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/include/linux/platform_data/gpio-rcar.h b/include/linux/platform_data/gpio-rcar.h
-index 6c0027a3..2d8d6943 100644
---- a/include/linux/platform_data/gpio-rcar.h
-+++ b/include/linux/platform_data/gpio-rcar.h
-@@ -24,4 +24,6 @@ struct gpio_rcar_config {
- 	unsigned has_both_edge_trigger:1;
- };
- 
-+#define RCAR_GP_PIN(bank, pin)		(((bank) * 32) + (pin))
-+
- #endif /* __GPIO_RCAR_H__ */
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0022-serial-sh-sci-Don-t-check-IRQ-in-verify-port-operati.patch b/patches.renesas/0022-serial-sh-sci-Don-t-check-IRQ-in-verify-port-operati.patch
deleted file mode 100644
index ea94bb4dbf1db..0000000000000
--- a/patches.renesas/0022-serial-sh-sci-Don-t-check-IRQ-in-verify-port-operati.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 21133fc7b65edc6f0feab77585c243d079996fff Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 6 Dec 2013 10:59:15 +0100
-Subject: serial: sh-sci: Don't check IRQ in verify port operation
-
-The IRQ number can't be modified by the user as the port is fixed.
-There's no need to check the new IRQ number as it will be ignored by the
-core.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit bc14e00672b563f41a1ac1d421b5c78c94868983)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/tty/serial/sh-sci.c | 4 ----
- 1 file changed, 4 deletions(-)
-
-diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
-index da91d6f1091d..670a8a43c21a 100644
---- a/drivers/tty/serial/sh-sci.c
-+++ b/drivers/tty/serial/sh-sci.c
-@@ -2118,10 +2118,6 @@ static void sci_config_port(struct uart_port *port, int flags)
- 
- static int sci_verify_port(struct uart_port *port, struct serial_struct *ser)
- {
--	struct sci_port *s = to_sci_port(port);
--
--	if (ser->irq != s->cfg->irqs[SCIx_TXI_IRQ])
--		return -EINVAL;
- 	if (ser->baud_base < 2400)
- 		/* No paper tape reader for Mitch.. */
- 		return -EINVAL;
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0023-drm-rcar-du-Introduce-CRTCs-groups.patch b/patches.renesas/0023-drm-rcar-du-Introduce-CRTCs-groups.patch
deleted file mode 100644
index ca56d8965609d..0000000000000
--- a/patches.renesas/0023-drm-rcar-du-Introduce-CRTCs-groups.patch
+++ /dev/null
@@ -1,1098 +0,0 @@
-From 62db4469a68f3aa96132071ada5e265987c7900a Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Sun, 16 Jun 2013 21:01:02 +0200
-Subject: drm/rcar-du: Introduce CRTCs groups
-
-The R8A7779 DU is split in per-CRTC resources (scan-out engine, blending
-unit, timings generator, ...) and device-global resources (start/stop
-control, planes, ...) shared between the two CRTCs.
-
-The R8A7790 introduced a third CRTC with its own set of global resources
-This would be modeled as two separate DU device instances if it wasn't
-for a handful or resources that are shared between the three CRTCs
-(mostly related to input and output routing). For this reason the
-R8A7790 DU must be modeled as a single device with three CRTCs, two sets
-of "semi-global" resources, and a few device-global resources.
-
-Introduce a new rcar_du_group driver-specific object, without any real
-counterpart in the DU documentation, that models those semi-global
-resources.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit cb2025d2509ffab1c426509fd9de3d83e40398b9)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/rcar-du/Makefile        |   1 +
- drivers/gpu/drm/rcar-du/rcar_du_crtc.c  |  92 ++++++-------------
- drivers/gpu/drm/rcar-du/rcar_du_crtc.h  |   5 +-
- drivers/gpu/drm/rcar-du/rcar_du_drv.c   |  46 ----------
- drivers/gpu/drm/rcar-du/rcar_du_drv.h   |  10 +--
- drivers/gpu/drm/rcar-du/rcar_du_group.c | 127 ++++++++++++++++++++++++++
- drivers/gpu/drm/rcar-du/rcar_du_group.h |  47 ++++++++++
- drivers/gpu/drm/rcar-du/rcar_du_kms.c   |  11 ++-
- drivers/gpu/drm/rcar-du/rcar_du_plane.c | 155 ++++++++++++++++----------------
- drivers/gpu/drm/rcar-du/rcar_du_plane.h |   8 +-
- 10 files changed, 299 insertions(+), 203 deletions(-)
- create mode 100644 drivers/gpu/drm/rcar-du/rcar_du_group.c
- create mode 100644 drivers/gpu/drm/rcar-du/rcar_du_group.h
-
-diff --git a/drivers/gpu/drm/rcar-du/Makefile b/drivers/gpu/drm/rcar-du/Makefile
-index 57b0fe1fa66e..b9b5e666fbba 100644
---- a/drivers/gpu/drm/rcar-du/Makefile
-+++ b/drivers/gpu/drm/rcar-du/Makefile
-@@ -1,6 +1,7 @@
- rcar-du-drm-y := rcar_du_crtc.o \
- 		 rcar_du_drv.o \
- 		 rcar_du_encoder.o \
-+		 rcar_du_group.o \
- 		 rcar_du_kms.o \
- 		 rcar_du_lvdscon.o \
- 		 rcar_du_plane.o \
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
-index 03dd7018dde8..7784a3ba7854 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
-@@ -30,21 +30,21 @@
- 
- static u32 rcar_du_crtc_read(struct rcar_du_crtc *rcrtc, u32 reg)
- {
--	struct rcar_du_device *rcdu = rcrtc->crtc.dev->dev_private;
-+	struct rcar_du_device *rcdu = rcrtc->group->dev;
- 
- 	return rcar_du_read(rcdu, rcrtc->mmio_offset + reg);
- }
- 
- static void rcar_du_crtc_write(struct rcar_du_crtc *rcrtc, u32 reg, u32 data)
- {
--	struct rcar_du_device *rcdu = rcrtc->crtc.dev->dev_private;
-+	struct rcar_du_device *rcdu = rcrtc->group->dev;
- 
- 	rcar_du_write(rcdu, rcrtc->mmio_offset + reg, data);
- }
- 
- static void rcar_du_crtc_clr(struct rcar_du_crtc *rcrtc, u32 reg, u32 clr)
- {
--	struct rcar_du_device *rcdu = rcrtc->crtc.dev->dev_private;
-+	struct rcar_du_device *rcdu = rcrtc->group->dev;
- 
- 	rcar_du_write(rcdu, rcrtc->mmio_offset + reg,
- 		      rcar_du_read(rcdu, rcrtc->mmio_offset + reg) & ~clr);
-@@ -52,7 +52,7 @@ static void rcar_du_crtc_clr(struct rcar_du_crtc *rcrtc, u32 reg, u32 clr)
- 
- static void rcar_du_crtc_set(struct rcar_du_crtc *rcrtc, u32 reg, u32 set)
- {
--	struct rcar_du_device *rcdu = rcrtc->crtc.dev->dev_private;
-+	struct rcar_du_device *rcdu = rcrtc->group->dev;
- 
- 	rcar_du_write(rcdu, rcrtc->mmio_offset + reg,
- 		      rcar_du_read(rcdu, rcrtc->mmio_offset + reg) | set);
-@@ -61,7 +61,7 @@ static void rcar_du_crtc_set(struct rcar_du_crtc *rcrtc, u32 reg, u32 set)
- static void rcar_du_crtc_clr_set(struct rcar_du_crtc *rcrtc, u32 reg,
- 				 u32 clr, u32 set)
- {
--	struct rcar_du_device *rcdu = rcrtc->crtc.dev->dev_private;
-+	struct rcar_du_device *rcdu = rcrtc->group->dev;
- 	u32 value = rcar_du_read(rcdu, rcrtc->mmio_offset + reg);
- 
- 	rcar_du_write(rcdu, rcrtc->mmio_offset + reg, (value & ~clr) | set);
-@@ -69,14 +69,13 @@ static void rcar_du_crtc_clr_set(struct rcar_du_crtc *rcrtc, u32 reg,
- 
- static int rcar_du_crtc_get(struct rcar_du_crtc *rcrtc)
- {
--	struct rcar_du_device *rcdu = rcrtc->crtc.dev->dev_private;
- 	int ret;
- 
- 	ret = clk_prepare_enable(rcrtc->clock);
- 	if (ret < 0)
- 		return ret;
- 
--	ret = rcar_du_get(rcdu);
-+	ret = rcar_du_group_get(rcrtc->group);
- 	if (ret < 0)
- 		clk_disable_unprepare(rcrtc->clock);
- 
-@@ -85,17 +84,14 @@ static int rcar_du_crtc_get(struct rcar_du_crtc *rcrtc)
- 
- static void rcar_du_crtc_put(struct rcar_du_crtc *rcrtc)
- {
--	struct rcar_du_device *rcdu = rcrtc->crtc.dev->dev_private;
--
--	rcar_du_put(rcdu);
-+	rcar_du_group_put(rcrtc->group);
- 	clk_disable_unprepare(rcrtc->clock);
- }
- 
- static void rcar_du_crtc_set_display_timing(struct rcar_du_crtc *rcrtc)
- {
--	struct drm_crtc *crtc = &rcrtc->crtc;
--	struct rcar_du_device *rcdu = crtc->dev->dev_private;
--	const struct drm_display_mode *mode = &crtc->mode;
-+	const struct drm_display_mode *mode = &rcrtc->crtc.mode;
-+	struct rcar_du_device *rcdu = rcrtc->group->dev;
- 	unsigned long clk;
- 	u32 value;
- 	u32 div;
-@@ -136,7 +132,7 @@ static void rcar_du_crtc_set_display_timing(struct rcar_du_crtc *rcrtc)
- 
- static void rcar_du_crtc_set_routing(struct rcar_du_crtc *rcrtc)
- {
--	struct rcar_du_device *rcdu = rcrtc->crtc.dev->dev_private;
-+	struct rcar_du_device *rcdu = rcrtc->group->dev;
- 	u32 dorcr = rcar_du_read(rcdu, DORCR);
- 
- 	dorcr &= ~(DORCR_PG2T | DORCR_DK2S | DORCR_PG2D_MASK);
-@@ -153,36 +149,6 @@ static void rcar_du_crtc_set_routing(struct rcar_du_crtc *rcrtc)
- 	rcar_du_write(rcdu, DORCR, dorcr);
- }
- 
--static void __rcar_du_start_stop(struct rcar_du_device *rcdu, bool start)
--{
--	rcar_du_write(rcdu, DSYSR,
--		      (rcar_du_read(rcdu, DSYSR) & ~(DSYSR_DRES | DSYSR_DEN)) |
--		      (start ? DSYSR_DEN : DSYSR_DRES));
--}
--
--static void rcar_du_start_stop(struct rcar_du_device *rcdu, bool start)
--{
--	/* Many of the configuration bits are only updated when the display
--	 * reset (DRES) bit in DSYSR is set to 1, disabling *both* CRTCs. Some
--	 * of those bits could be pre-configured, but others (especially the
--	 * bits related to plane assignment to display timing controllers) need
--	 * to be modified at runtime.
--	 *
--	 * Restart the display controller if a start is requested. Sorry for the
--	 * flicker. It should be possible to move most of the "DRES-update" bits
--	 * setup to driver initialization time and minimize the number of cases
--	 * when the display controller will have to be restarted.
--	 */
--	if (start) {
--		if (rcdu->used_crtcs++ != 0)
--			__rcar_du_start_stop(rcdu, false);
--		__rcar_du_start_stop(rcdu, true);
--	} else {
--		if (--rcdu->used_crtcs == 0)
--			__rcar_du_start_stop(rcdu, false);
--	}
--}
--
- void rcar_du_crtc_route_output(struct drm_crtc *crtc, unsigned int output)
- {
- 	struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);
-@@ -195,8 +161,8 @@ void rcar_du_crtc_route_output(struct drm_crtc *crtc, unsigned int output)
- 
- void rcar_du_crtc_update_planes(struct drm_crtc *crtc)
- {
--	struct rcar_du_device *rcdu = crtc->dev->dev_private;
- 	struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);
-+	struct rcar_du_device *rcdu = rcrtc->group->dev;
- 	struct rcar_du_plane *planes[RCAR_DU_NUM_HW_PLANES];
- 	unsigned int num_planes = 0;
- 	unsigned int prio = 0;
-@@ -204,8 +170,8 @@ void rcar_du_crtc_update_planes(struct drm_crtc *crtc)
- 	u32 dptsr = 0;
- 	u32 dspr = 0;
- 
--	for (i = 0; i < ARRAY_SIZE(rcdu->planes.planes); ++i) {
--		struct rcar_du_plane *plane = &rcdu->planes.planes[i];
-+	for (i = 0; i < ARRAY_SIZE(rcrtc->group->planes.planes); ++i) {
-+		struct rcar_du_plane *plane = &rcrtc->group->planes.planes[i];
- 		unsigned int j;
- 
- 		if (plane->crtc != &rcrtc->crtc || !plane->enabled)
-@@ -254,10 +220,8 @@ void rcar_du_crtc_update_planes(struct drm_crtc *crtc)
- 		 */
- 		if (value != dptsr) {
- 			rcar_du_write(rcdu, DPTSR, dptsr);
--			if (rcdu->used_crtcs) {
--				__rcar_du_start_stop(rcdu, false);
--				__rcar_du_start_stop(rcdu, true);
--			}
-+			if (rcrtc->group->used_crtcs)
-+				rcar_du_group_restart(rcrtc->group);
- 		}
- 	}
- 
-@@ -267,7 +231,6 @@ void rcar_du_crtc_update_planes(struct drm_crtc *crtc)
- static void rcar_du_crtc_start(struct rcar_du_crtc *rcrtc)
- {
- 	struct drm_crtc *crtc = &rcrtc->crtc;
--	struct rcar_du_device *rcdu = crtc->dev->dev_private;
- 	unsigned int i;
- 
- 	if (rcrtc->started)
-@@ -284,14 +247,14 @@ static void rcar_du_crtc_start(struct rcar_du_crtc *rcrtc)
- 	rcar_du_crtc_set_display_timing(rcrtc);
- 	rcar_du_crtc_set_routing(rcrtc);
- 
--	mutex_lock(&rcdu->planes.lock);
-+	mutex_lock(&rcrtc->group->planes.lock);
- 	rcrtc->plane->enabled = true;
- 	rcar_du_crtc_update_planes(crtc);
--	mutex_unlock(&rcdu->planes.lock);
-+	mutex_unlock(&rcrtc->group->planes.lock);
- 
- 	/* Setup planes. */
--	for (i = 0; i < ARRAY_SIZE(rcdu->planes.planes); ++i) {
--		struct rcar_du_plane *plane = &rcdu->planes.planes[i];
-+	for (i = 0; i < ARRAY_SIZE(rcrtc->group->planes.planes); ++i) {
-+		struct rcar_du_plane *plane = &rcrtc->group->planes.planes[i];
- 
- 		if (plane->crtc != crtc || !plane->enabled)
- 			continue;
-@@ -305,7 +268,7 @@ static void rcar_du_crtc_start(struct rcar_du_crtc *rcrtc)
- 	 */
- 	rcar_du_crtc_clr_set(rcrtc, DSYSR, DSYSR_TVM_MASK, DSYSR_TVM_MASTER);
- 
--	rcar_du_start_stop(rcdu, true);
-+	rcar_du_group_start_stop(rcrtc->group, true);
- 
- 	rcrtc->started = true;
- }
-@@ -313,22 +276,21 @@ static void rcar_du_crtc_start(struct rcar_du_crtc *rcrtc)
- static void rcar_du_crtc_stop(struct rcar_du_crtc *rcrtc)
- {
- 	struct drm_crtc *crtc = &rcrtc->crtc;
--	struct rcar_du_device *rcdu = crtc->dev->dev_private;
- 
- 	if (!rcrtc->started)
- 		return;
- 
--	mutex_lock(&rcdu->planes.lock);
-+	mutex_lock(&rcrtc->group->planes.lock);
- 	rcrtc->plane->enabled = false;
- 	rcar_du_crtc_update_planes(crtc);
--	mutex_unlock(&rcdu->planes.lock);
-+	mutex_unlock(&rcrtc->group->planes.lock);
- 
- 	/* Select switch sync mode. This stops display operation and configures
- 	 * the HSYNC and VSYNC signals as inputs.
- 	 */
- 	rcar_du_crtc_clr_set(rcrtc, DSYSR, DSYSR_TVM_MASK, DSYSR_TVM_SWITCH);
- 
--	rcar_du_start_stop(rcdu, false);
-+	rcar_du_group_start_stop(rcrtc->group, false);
- 
- 	rcrtc->started = false;
- }
-@@ -406,8 +368,8 @@ static int rcar_du_crtc_mode_set(struct drm_crtc *crtc,
- 				 int x, int y,
- 				 struct drm_framebuffer *old_fb)
- {
--	struct rcar_du_device *rcdu = crtc->dev->dev_private;
- 	struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);
-+	struct rcar_du_device *rcdu = rcrtc->group->dev;
- 	const struct rcar_du_format_info *format;
- 	int ret;
- 
-@@ -583,8 +545,9 @@ static const struct drm_crtc_funcs crtc_funcs = {
- 	.page_flip = rcar_du_crtc_page_flip,
- };
- 
--int rcar_du_crtc_create(struct rcar_du_device *rcdu, unsigned int index)
-+int rcar_du_crtc_create(struct rcar_du_group *rgrp, unsigned int index)
- {
-+	struct rcar_du_device *rcdu = rgrp->dev;
- 	struct platform_device *pdev = to_platform_device(rcdu->dev);
- 	struct rcar_du_crtc *rcrtc = &rcdu->crtcs[index];
- 	struct drm_crtc *crtc = &rcrtc->crtc;
-@@ -608,10 +571,11 @@ int rcar_du_crtc_create(struct rcar_du_device *rcdu, unsigned int index)
- 		return PTR_ERR(rcrtc->clock);
- 	}
- 
-+	rcrtc->group = rgrp;
- 	rcrtc->mmio_offset = index ? DISP2_REG_OFFSET : 0;
- 	rcrtc->index = index;
- 	rcrtc->dpms = DRM_MODE_DPMS_OFF;
--	rcrtc->plane = &rcdu->planes.planes[index];
-+	rcrtc->plane = &rgrp->planes.planes[index];
- 
- 	rcrtc->plane->crtc = crtc;
- 
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.h b/drivers/gpu/drm/rcar-du/rcar_du_crtc.h
-index 5b69e98a3b92..542a7feceb20 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.h
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.h
-@@ -19,7 +19,7 @@
- #include <drm/drmP.h>
- #include <drm/drm_crtc.h>
- 
--struct rcar_du_device;
-+struct rcar_du_group;
- struct rcar_du_plane;
- 
- struct rcar_du_crtc {
-@@ -34,10 +34,11 @@ struct rcar_du_crtc {
- 	unsigned int outputs;
- 	int dpms;
- 
-+	struct rcar_du_group *group;
- 	struct rcar_du_plane *plane;
- };
- 
--int rcar_du_crtc_create(struct rcar_du_device *rcdu, unsigned int index);
-+int rcar_du_crtc_create(struct rcar_du_group *rgrp, unsigned int index);
- void rcar_du_crtc_enable_vblank(struct rcar_du_crtc *rcrtc, bool enable);
- void rcar_du_crtc_cancel_page_flip(struct rcar_du_crtc *rcrtc,
- 				   struct drm_file *file);
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.c b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-index 9b89dbf3fb32..8600b2b6aea4 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-@@ -29,52 +29,6 @@
- #include "rcar_du_regs.h"
- 
- /* -----------------------------------------------------------------------------
-- * Core device operations
-- */
--
--/*
-- * rcar_du_get - Acquire a reference to the DU
-- *
-- * Acquiring the first  reference setups core registers. A reference must be
-- * held before accessing any hardware registers.
-- *
-- * This function must be called with the DRM mode_config lock held.
-- *
-- * Return 0 in case of success or a negative error code otherwise.
-- */
--int rcar_du_get(struct rcar_du_device *rcdu)
--{
--	if (rcdu->use_count)
--		goto done;
--
--	/* Enable extended features */
--	rcar_du_write(rcdu, DEFR, DEFR_CODE | DEFR_DEFE);
--	rcar_du_write(rcdu, DEFR2, DEFR2_CODE | DEFR2_DEFE2G);
--	rcar_du_write(rcdu, DEFR3, DEFR3_CODE | DEFR3_DEFE3);
--	rcar_du_write(rcdu, DEFR4, DEFR4_CODE);
--	rcar_du_write(rcdu, DEFR5, DEFR5_CODE | DEFR5_DEFE5);
--
--	/* Use DS1PR and DS2PR to configure planes priorities and connects the
--	 * superposition 0 to DU0 pins. DU1 pins will be configured dynamically.
--	 */
--	rcar_du_write(rcdu, DORCR, DORCR_PG1D_DS1 | DORCR_DPRS);
--
--done:
--	rcdu->use_count++;
--	return 0;
--}
--
--/*
-- * rcar_du_put - Release a reference to the DU
-- *
-- * This function must be called with the DRM mode_config lock held.
-- */
--void rcar_du_put(struct rcar_du_device *rcdu)
--{
--	--rcdu->use_count;
--}
--
--/* -----------------------------------------------------------------------------
-  * DRM operations
-  */
- 
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.h b/drivers/gpu/drm/rcar-du/rcar_du_drv.h
-index 0305c21d71f3..5b57a2f9b52a 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_drv.h
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.h
-@@ -18,11 +18,12 @@
- #include <linux/platform_data/rcar-du.h>
- 
- #include "rcar_du_crtc.h"
--#include "rcar_du_plane.h"
-+#include "rcar_du_group.h"
- 
- struct clk;
- struct device;
- struct drm_device;
-+struct rcar_du_device;
- 
- #define RCAR_DU_FEATURE_CRTC_IRQ_CLOCK	(1 << 0)	/* Per-CRTC IRQ and clock */
- 
-@@ -40,15 +41,13 @@ struct rcar_du_device {
- 	const struct rcar_du_device_info *info;
- 
- 	void __iomem *mmio;
--	unsigned int use_count;
- 
- 	struct drm_device *ddev;
- 
- 	struct rcar_du_crtc crtcs[2];
--	unsigned int used_crtcs;
- 	unsigned int num_crtcs;
- 
--	struct rcar_du_planes planes;
-+	struct rcar_du_group group;
- };
- 
- static inline bool rcar_du_has(struct rcar_du_device *rcdu,
-@@ -57,9 +56,6 @@ static inline bool rcar_du_has(struct rcar_du_device *rcdu,
- 	return rcdu->info->features & feature;
- }
- 
--int rcar_du_get(struct rcar_du_device *rcdu);
--void rcar_du_put(struct rcar_du_device *rcdu);
--
- static inline u32 rcar_du_read(struct rcar_du_device *rcdu, u32 reg)
- {
- 	return ioread32(rcdu->mmio + reg);
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_group.c b/drivers/gpu/drm/rcar-du/rcar_du_group.c
-new file mode 100644
-index 000000000000..625b9f446965
---- /dev/null
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_group.c
-@@ -0,0 +1,127 @@
-+/*
-+ * rcar_du_group.c  --  R-Car Display Unit Channels Pair
-+ *
-+ * Copyright (C) 2013 Renesas Corporation
-+ *
-+ * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ */
-+
-+/*
-+ * The R8A7779 DU is split in per-CRTC resources (scan-out engine, blending
-+ * unit, timings generator, ...) and device-global resources (start/stop
-+ * control, planes, ...) shared between the two CRTCs.
-+ *
-+ * The R8A7790 introduced a third CRTC with its own set of global resources.
-+ * This would be modeled as two separate DU device instances if it wasn't for
-+ * a handful or resources that are shared between the three CRTCs (mostly
-+ * related to input and output routing). For this reason the R8A7790 DU must be
-+ * modeled as a single device with three CRTCs, two sets of "semi-global"
-+ * resources, and a few device-global resources.
-+ *
-+ * The rcar_du_group object is a driver specific object, without any real
-+ * counterpart in the DU documentation, that models those semi-global resources.
-+ */
-+
-+#include <linux/io.h>
-+
-+#include "rcar_du_drv.h"
-+#include "rcar_du_group.h"
-+#include "rcar_du_regs.h"
-+
-+static u32 rcar_du_group_read(struct rcar_du_group *rgrp, u32 reg)
-+{
-+	return rcar_du_read(rgrp->dev, rgrp->mmio_offset + reg);
-+}
-+
-+static void rcar_du_group_write(struct rcar_du_group *rgrp, u32 reg, u32 data)
-+{
-+	rcar_du_write(rgrp->dev, rgrp->mmio_offset + reg, data);
-+}
-+
-+static void rcar_du_group_setup(struct rcar_du_group *rgrp)
-+{
-+	/* Enable extended features */
-+	rcar_du_group_write(rgrp, DEFR, DEFR_CODE | DEFR_DEFE);
-+	rcar_du_group_write(rgrp, DEFR2, DEFR2_CODE | DEFR2_DEFE2G);
-+	rcar_du_group_write(rgrp, DEFR3, DEFR3_CODE | DEFR3_DEFE3);
-+	rcar_du_group_write(rgrp, DEFR4, DEFR4_CODE);
-+	rcar_du_group_write(rgrp, DEFR5, DEFR5_CODE | DEFR5_DEFE5);
-+
-+	/* Use DS1PR and DS2PR to configure planes priorities and connects the
-+	 * superposition 0 to DU0 pins. DU1 pins will be configured dynamically.
-+	 */
-+	rcar_du_group_write(rgrp, DORCR, DORCR_PG1D_DS1 | DORCR_DPRS);
-+}
-+
-+/*
-+ * rcar_du_group_get - Acquire a reference to the DU channels group
-+ *
-+ * Acquiring the first reference setups core registers. A reference must be held
-+ * before accessing any hardware registers.
-+ *
-+ * This function must be called with the DRM mode_config lock held.
-+ *
-+ * Return 0 in case of success or a negative error code otherwise.
-+ */
-+int rcar_du_group_get(struct rcar_du_group *rgrp)
-+{
-+	if (rgrp->use_count)
-+		goto done;
-+
-+	rcar_du_group_setup(rgrp);
-+
-+done:
-+	rgrp->use_count++;
-+	return 0;
-+}
-+
-+/*
-+ * rcar_du_group_put - Release a reference to the DU
-+ *
-+ * This function must be called with the DRM mode_config lock held.
-+ */
-+void rcar_du_group_put(struct rcar_du_group *rgrp)
-+{
-+	--rgrp->use_count;
-+}
-+
-+static void __rcar_du_group_start_stop(struct rcar_du_group *rgrp, bool start)
-+{
-+	rcar_du_group_write(rgrp, DSYSR,
-+		(rcar_du_group_read(rgrp, DSYSR) & ~(DSYSR_DRES | DSYSR_DEN)) |
-+		(start ? DSYSR_DEN : DSYSR_DRES));
-+}
-+
-+void rcar_du_group_start_stop(struct rcar_du_group *rgrp, bool start)
-+{
-+	/* Many of the configuration bits are only updated when the display
-+	 * reset (DRES) bit in DSYSR is set to 1, disabling *both* CRTCs. Some
-+	 * of those bits could be pre-configured, but others (especially the
-+	 * bits related to plane assignment to display timing controllers) need
-+	 * to be modified at runtime.
-+	 *
-+	 * Restart the display controller if a start is requested. Sorry for the
-+	 * flicker. It should be possible to move most of the "DRES-update" bits
-+	 * setup to driver initialization time and minimize the number of cases
-+	 * when the display controller will have to be restarted.
-+	 */
-+	if (start) {
-+		if (rgrp->used_crtcs++ != 0)
-+			__rcar_du_group_start_stop(rgrp, false);
-+		__rcar_du_group_start_stop(rgrp, true);
-+	} else {
-+		if (--rgrp->used_crtcs == 0)
-+			__rcar_du_group_start_stop(rgrp, false);
-+	}
-+}
-+
-+void rcar_du_group_restart(struct rcar_du_group *rgrp)
-+{
-+	__rcar_du_group_start_stop(rgrp, false);
-+	__rcar_du_group_start_stop(rgrp, true);
-+}
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_group.h b/drivers/gpu/drm/rcar-du/rcar_du_group.h
-new file mode 100644
-index 000000000000..748331bbb8fe
---- /dev/null
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_group.h
-@@ -0,0 +1,47 @@
-+/*
-+ * rcar_du_group.c  --  R-Car Display Unit Planes and CRTCs Group
-+ *
-+ * Copyright (C) 2013 Renesas Corporation
-+ *
-+ * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ */
-+
-+#ifndef __RCAR_DU_GROUP_H__
-+#define __RCAR_DU_GROUP_H__
-+
-+#include "rcar_du_plane.h"
-+
-+struct rcar_du_device;
-+
-+/*
-+ * struct rcar_du_group - CRTCs and planes group
-+ * @dev: the DU device
-+ * @mmio_offset: registers offset in the device memory map
-+ * @index: group index
-+ * @use_count: number of users of the group (rcar_du_group_(get|put))
-+ * @used_crtcs: number of CRTCs currently in use
-+ * @planes: planes handled by the group
-+ */
-+struct rcar_du_group {
-+	struct rcar_du_device *dev;
-+	unsigned int mmio_offset;
-+	unsigned int index;
-+
-+	unsigned int use_count;
-+	unsigned int used_crtcs;
-+
-+	struct rcar_du_planes planes;
-+};
-+
-+int rcar_du_group_get(struct rcar_du_group *rgrp);
-+void rcar_du_group_put(struct rcar_du_group *rgrp);
-+void rcar_du_group_start_stop(struct rcar_du_group *rgrp, bool start);
-+void rcar_du_group_restart(struct rcar_du_group *rgrp);
-+
-+
-+#endif /* __RCAR_DU_GROUP_H__ */
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms.c b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
-index a1343fbde57a..c32e0f9d4823 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_kms.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
-@@ -174,17 +174,20 @@ int rcar_du_modeset_init(struct rcar_du_device *rcdu)
- 	rcdu->ddev->mode_config.max_height = 2047;
- 	rcdu->ddev->mode_config.funcs = &rcar_du_mode_config_funcs;
- 
--	ret = rcar_du_planes_init(rcdu);
-+	rcdu->group.dev = rcdu;
-+	rcdu->group.index = 0;
-+	rcdu->group.used_crtcs = 0;
-+
-+	ret = rcar_du_planes_init(&rcdu->group);
- 	if (ret < 0)
- 		return ret;
- 
- 	for (i = 0; i < ARRAY_SIZE(rcdu->crtcs); ++i) {
--		ret = rcar_du_crtc_create(rcdu, i);
-+		ret = rcar_du_crtc_create(&rcdu->group, i);
- 		if (ret < 0)
- 			return ret;
- 	}
- 
--	rcdu->used_crtcs = 0;
- 	rcdu->num_crtcs = i;
- 
- 	for (i = 0; i < rcdu->pdata->num_encoders; ++i) {
-@@ -215,7 +218,7 @@ int rcar_du_modeset_init(struct rcar_du_device *rcdu)
- 		encoder->possible_clones = 1 << 0;
- 	}
- 
--	ret = rcar_du_planes_register(rcdu);
-+	ret = rcar_du_planes_register(&rcdu->group);
- 	if (ret < 0)
- 		return ret;
- 
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_plane.c b/drivers/gpu/drm/rcar-du/rcar_du_plane.c
-index 29f21477ef0e..1e9cf7c92f8e 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_plane.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_plane.c
-@@ -36,71 +36,73 @@ static inline struct rcar_du_plane *to_rcar_plane(struct drm_plane *plane)
- 	return container_of(plane, struct rcar_du_kms_plane, plane)->hwplane;
- }
- 
--static u32 rcar_du_plane_read(struct rcar_du_device *rcdu,
-+static u32 rcar_du_plane_read(struct rcar_du_group *rgrp,
- 			      unsigned int index, u32 reg)
- {
--	return rcar_du_read(rcdu, index * PLANE_OFF + reg);
-+	return rcar_du_read(rgrp->dev,
-+			    rgrp->mmio_offset + index * PLANE_OFF + reg);
- }
- 
--static void rcar_du_plane_write(struct rcar_du_device *rcdu,
-+static void rcar_du_plane_write(struct rcar_du_group *rgrp,
- 				unsigned int index, u32 reg, u32 data)
- {
--	rcar_du_write(rcdu, index * PLANE_OFF + reg, data);
-+	rcar_du_write(rgrp->dev, rgrp->mmio_offset + index * PLANE_OFF + reg,
-+		      data);
- }
- 
- int rcar_du_plane_reserve(struct rcar_du_plane *plane,
- 			  const struct rcar_du_format_info *format)
- {
--	struct rcar_du_device *rcdu = plane->dev;
-+	struct rcar_du_group *rgrp = plane->group;
- 	unsigned int i;
- 	int ret = -EBUSY;
- 
--	mutex_lock(&rcdu->planes.lock);
-+	mutex_lock(&rgrp->planes.lock);
- 
--	for (i = 0; i < ARRAY_SIZE(rcdu->planes.planes); ++i) {
--		if (!(rcdu->planes.free & (1 << i)))
-+	for (i = 0; i < ARRAY_SIZE(rgrp->planes.planes); ++i) {
-+		if (!(rgrp->planes.free & (1 << i)))
- 			continue;
- 
- 		if (format->planes == 1 ||
--		    rcdu->planes.free & (1 << ((i + 1) % 8)))
-+		    rgrp->planes.free & (1 << ((i + 1) % 8)))
- 			break;
- 	}
- 
--	if (i == ARRAY_SIZE(rcdu->planes.planes))
-+	if (i == ARRAY_SIZE(rgrp->planes.planes))
- 		goto done;
- 
--	rcdu->planes.free &= ~(1 << i);
-+	rgrp->planes.free &= ~(1 << i);
- 	if (format->planes == 2)
--		rcdu->planes.free &= ~(1 << ((i + 1) % 8));
-+		rgrp->planes.free &= ~(1 << ((i + 1) % 8));
- 
- 	plane->hwindex = i;
- 
- 	ret = 0;
- 
- done:
--	mutex_unlock(&rcdu->planes.lock);
-+	mutex_unlock(&rgrp->planes.lock);
- 	return ret;
- }
- 
- void rcar_du_plane_release(struct rcar_du_plane *plane)
- {
--	struct rcar_du_device *rcdu = plane->dev;
-+	struct rcar_du_group *rgrp = plane->group;
- 
- 	if (plane->hwindex == -1)
- 		return;
- 
--	mutex_lock(&rcdu->planes.lock);
--	rcdu->planes.free |= 1 << plane->hwindex;
-+	mutex_lock(&rgrp->planes.lock);
-+	rgrp->planes.free |= 1 << plane->hwindex;
- 	if (plane->format->planes == 2)
--		rcdu->planes.free |= 1 << ((plane->hwindex + 1) % 8);
--	mutex_unlock(&rcdu->planes.lock);
-+		rgrp->planes.free |= 1 << ((plane->hwindex + 1) % 8);
-+	mutex_unlock(&rgrp->planes.lock);
- 
- 	plane->hwindex = -1;
- }
- 
- void rcar_du_plane_update_base(struct rcar_du_plane *plane)
- {
--	struct rcar_du_device *rcdu = plane->dev;
-+	struct rcar_du_group *rgrp = plane->group;
- 	unsigned int index = plane->hwindex;
- 
- 	/* The Y position is expressed in raster line units and must be doubled
-@@ -111,18 +113,18 @@ void rcar_du_plane_update_base(struct rcar_du_plane *plane)
- 	 * Similarly, for the second plane, NV12 and NV21 formats seem to
- 	 * require a halved Y position value.
- 	 */
--	rcar_du_plane_write(rcdu, index, PnSPXR, plane->src_x);
--	rcar_du_plane_write(rcdu, index, PnSPYR, plane->src_y *
-+	rcar_du_plane_write(rgrp, index, PnSPXR, plane->src_x);
-+	rcar_du_plane_write(rgrp, index, PnSPYR, plane->src_y *
- 			    (plane->format->bpp == 32 ? 2 : 1));
--	rcar_du_plane_write(rcdu, index, PnDSA0R, plane->dma[0]);
-+	rcar_du_plane_write(rgrp, index, PnDSA0R, plane->dma[0]);
- 
- 	if (plane->format->planes == 2) {
- 		index = (index + 1) % 8;
- 
--		rcar_du_plane_write(rcdu, index, PnSPXR, plane->src_x);
--		rcar_du_plane_write(rcdu, index, PnSPYR, plane->src_y *
-+		rcar_du_plane_write(rgrp, index, PnSPXR, plane->src_x);
-+		rcar_du_plane_write(rgrp, index, PnSPYR, plane->src_y *
- 				    (plane->format->bpp == 16 ? 2 : 1) / 2);
--		rcar_du_plane_write(rcdu, index, PnDSA0R, plane->dma[1]);
-+		rcar_du_plane_write(rgrp, index, PnDSA0R, plane->dma[1]);
- 	}
- }
- 
-@@ -143,7 +145,7 @@ void rcar_du_plane_compute_base(struct rcar_du_plane *plane,
- static void rcar_du_plane_setup_mode(struct rcar_du_plane *plane,
- 				     unsigned int index)
- {
--	struct rcar_du_device *rcdu = plane->dev;
-+	struct rcar_du_group *rgrp = plane->group;
- 	u32 colorkey;
- 	u32 pnmr;
- 
-@@ -157,9 +159,9 @@ static void rcar_du_plane_setup_mode(struct rcar_du_plane *plane,
- 	 * enable alpha-blending regardless of the X bit value.
- 	 */
- 	if (plane->format->fourcc != DRM_FORMAT_XRGB1555)
--		rcar_du_plane_write(rcdu, index, PnALPHAR, PnALPHAR_ABIT_0);
-+		rcar_du_plane_write(rgrp, index, PnALPHAR, PnALPHAR_ABIT_0);
- 	else
--		rcar_du_plane_write(rcdu, index, PnALPHAR,
-+		rcar_du_plane_write(rgrp, index, PnALPHAR,
- 				    PnALPHAR_ABIT_X | plane->alpha);
- 
- 	pnmr = PnMR_BM_MD | plane->format->pnmr;
-@@ -175,14 +177,14 @@ static void rcar_du_plane_setup_mode(struct rcar_du_plane *plane,
- 	if (plane->format->fourcc == DRM_FORMAT_YUYV)
- 		pnmr |= PnMR_YCDF_YUYV;
- 
--	rcar_du_plane_write(rcdu, index, PnMR, pnmr);
-+	rcar_du_plane_write(rgrp, index, PnMR, pnmr);
- 
- 	switch (plane->format->fourcc) {
- 	case DRM_FORMAT_RGB565:
- 		colorkey = ((plane->colorkey & 0xf80000) >> 8)
- 			 | ((plane->colorkey & 0x00fc00) >> 5)
- 			 | ((plane->colorkey & 0x0000f8) >> 3);
--		rcar_du_plane_write(rcdu, index, PnTC2R, colorkey);
-+		rcar_du_plane_write(rgrp, index, PnTC2R, colorkey);
- 		break;
- 
- 	case DRM_FORMAT_ARGB1555:
-@@ -190,12 +192,12 @@ static void rcar_du_plane_setup_mode(struct rcar_du_plane *plane,
- 		colorkey = ((plane->colorkey & 0xf80000) >> 9)
- 			 | ((plane->colorkey & 0x00f800) >> 6)
- 			 | ((plane->colorkey & 0x0000f8) >> 3);
--		rcar_du_plane_write(rcdu, index, PnTC2R, colorkey);
-+		rcar_du_plane_write(rgrp, index, PnTC2R, colorkey);
- 		break;
- 
- 	case DRM_FORMAT_XRGB8888:
- 	case DRM_FORMAT_ARGB8888:
--		rcar_du_plane_write(rcdu, index, PnTC3R,
-+		rcar_du_plane_write(rgrp, index, PnTC3R,
- 				    PnTC3R_CODE | (plane->colorkey & 0xffffff));
- 		break;
- 	}
-@@ -204,7 +206,7 @@ static void rcar_du_plane_setup_mode(struct rcar_du_plane *plane,
- static void __rcar_du_plane_setup(struct rcar_du_plane *plane,
- 				  unsigned int index)
- {
--	struct rcar_du_device *rcdu = plane->dev;
-+	struct rcar_du_group *rgrp = plane->group;
- 	u32 ddcr2 = PnDDCR2_CODE;
- 	u32 ddcr4;
- 	u32 mwr;
-@@ -214,7 +216,7 @@ static void __rcar_du_plane_setup(struct rcar_du_plane *plane,
- 	 * The data format is selected by the DDDF field in PnMR and the EDF
- 	 * field in DDCR4.
- 	 */
--	ddcr4 = rcar_du_plane_read(rcdu, index, PnDDCR4);
-+	ddcr4 = rcar_du_plane_read(rgrp, index, PnDDCR4);
- 	ddcr4 &= ~PnDDCR4_EDF_MASK;
- 	ddcr4 |= plane->format->edf | PnDDCR4_CODE;
- 
-@@ -235,8 +237,8 @@ static void __rcar_du_plane_setup(struct rcar_du_plane *plane,
- 		}
- 	}
- 
--	rcar_du_plane_write(rcdu, index, PnDDCR2, ddcr2);
--	rcar_du_plane_write(rcdu, index, PnDDCR4, ddcr4);
-+	rcar_du_plane_write(rgrp, index, PnDDCR2, ddcr2);
-+	rcar_du_plane_write(rgrp, index, PnDDCR4, ddcr4);
- 
- 	/* Memory pitch (expressed in pixels) */
- 	if (plane->format->planes == 2)
-@@ -244,19 +246,19 @@ static void __rcar_du_plane_setup(struct rcar_du_plane *plane,
- 	else
- 		mwr = plane->pitch * 8 / plane->format->bpp;
- 
--	rcar_du_plane_write(rcdu, index, PnMWR, mwr);
-+	rcar_du_plane_write(rgrp, index, PnMWR, mwr);
- 
- 	/* Destination position and size */
--	rcar_du_plane_write(rcdu, index, PnDSXR, plane->width);
--	rcar_du_plane_write(rcdu, index, PnDSYR, plane->height);
--	rcar_du_plane_write(rcdu, index, PnDPXR, plane->dst_x);
--	rcar_du_plane_write(rcdu, index, PnDPYR, plane->dst_y);
-+	rcar_du_plane_write(rgrp, index, PnDSXR, plane->width);
-+	rcar_du_plane_write(rgrp, index, PnDSYR, plane->height);
-+	rcar_du_plane_write(rgrp, index, PnDPXR, plane->dst_x);
-+	rcar_du_plane_write(rgrp, index, PnDPYR, plane->dst_y);
- 
- 	/* Wrap-around and blinking, disabled */
--	rcar_du_plane_write(rcdu, index, PnWASPR, 0);
--	rcar_du_plane_write(rcdu, index, PnWAMWR, 4095);
--	rcar_du_plane_write(rcdu, index, PnBTR, 0);
--	rcar_du_plane_write(rcdu, index, PnMLR, 0);
-+	rcar_du_plane_write(rgrp, index, PnWASPR, 0);
-+	rcar_du_plane_write(rgrp, index, PnWAMWR, 4095);
-+	rcar_du_plane_write(rgrp, index, PnBTR, 0);
-+	rcar_du_plane_write(rgrp, index, PnMLR, 0);
- }
- 
- void rcar_du_plane_setup(struct rcar_du_plane *plane)
-@@ -276,7 +278,7 @@ rcar_du_plane_update(struct drm_plane *plane, struct drm_crtc *crtc,
- 		       uint32_t src_w, uint32_t src_h)
- {
- 	struct rcar_du_plane *rplane = to_rcar_plane(plane);
--	struct rcar_du_device *rcdu = plane->dev->dev_private;
-+	struct rcar_du_device *rcdu = rplane->group->dev;
- 	const struct rcar_du_format_info *format;
- 	unsigned int nplanes;
- 	int ret;
-@@ -319,26 +321,25 @@ rcar_du_plane_update(struct drm_plane *plane, struct drm_crtc *crtc,
- 	rcar_du_plane_compute_base(rplane, fb);
- 	rcar_du_plane_setup(rplane);
- 
--	mutex_lock(&rcdu->planes.lock);
-+	mutex_lock(&rplane->group->planes.lock);
- 	rplane->enabled = true;
- 	rcar_du_crtc_update_planes(rplane->crtc);
--	mutex_unlock(&rcdu->planes.lock);
-+	mutex_unlock(&rplane->group->planes.lock);
- 
- 	return 0;
- }
- 
- static int rcar_du_plane_disable(struct drm_plane *plane)
- {
--	struct rcar_du_device *rcdu = plane->dev->dev_private;
- 	struct rcar_du_plane *rplane = to_rcar_plane(plane);
- 
- 	if (!rplane->enabled)
- 		return 0;
- 
--	mutex_lock(&rcdu->planes.lock);
-+	mutex_lock(&rplane->group->planes.lock);
- 	rplane->enabled = false;
- 	rcar_du_crtc_update_planes(rplane->crtc);
--	mutex_unlock(&rcdu->planes.lock);
-+	mutex_unlock(&rplane->group->planes.lock);
- 
- 	rcar_du_plane_release(rplane);
- 
-@@ -380,9 +381,7 @@ static void rcar_du_plane_set_colorkey(struct rcar_du_plane *plane,
- static void rcar_du_plane_set_zpos(struct rcar_du_plane *plane,
- 				   unsigned int zpos)
- {
--	struct rcar_du_device *rcdu = plane->dev;
--
--	mutex_lock(&rcdu->planes.lock);
-+	mutex_lock(&plane->group->planes.lock);
- 	if (plane->zpos == zpos)
- 		goto done;
- 
-@@ -393,21 +392,21 @@ static void rcar_du_plane_set_zpos(struct rcar_du_plane *plane,
- 	rcar_du_crtc_update_planes(plane->crtc);
- 
- done:
--	mutex_unlock(&rcdu->planes.lock);
-+	mutex_unlock(&plane->group->planes.lock);
- }
- 
- static int rcar_du_plane_set_property(struct drm_plane *plane,
- 				      struct drm_property *property,
- 				      uint64_t value)
- {
--	struct rcar_du_device *rcdu = plane->dev->dev_private;
- 	struct rcar_du_plane *rplane = to_rcar_plane(plane);
-+	struct rcar_du_group *rgrp = rplane->group;
- 
--	if (property == rcdu->planes.alpha)
-+	if (property == rgrp->planes.alpha)
- 		rcar_du_plane_set_alpha(rplane, value);
--	else if (property == rcdu->planes.colorkey)
-+	else if (property == rgrp->planes.colorkey)
- 		rcar_du_plane_set_colorkey(rplane, value);
--	else if (property == rcdu->planes.zpos)
-+	else if (property == rgrp->planes.zpos)
- 		rcar_du_plane_set_zpos(rplane, value);
- 	else
- 		return -EINVAL;
-@@ -435,37 +434,39 @@ static const uint32_t formats[] = {
- 	DRM_FORMAT_NV16,
- };
- 
--int rcar_du_planes_init(struct rcar_du_device *rcdu)
-+int rcar_du_planes_init(struct rcar_du_group *rgrp)
- {
-+	struct rcar_du_planes *planes = &rgrp->planes;
-+	struct rcar_du_device *rcdu = rgrp->dev;
- 	unsigned int i;
- 
--	mutex_init(&rcdu->planes.lock);
--	rcdu->planes.free = 0xff;
-+	mutex_init(&planes->lock);
-+	planes->free = 0xff;
- 
--	rcdu->planes.alpha =
-+	planes->alpha =
- 		drm_property_create_range(rcdu->ddev, 0, "alpha", 0, 255);
--	if (rcdu->planes.alpha == NULL)
-+	if (planes->alpha == NULL)
- 		return -ENOMEM;
- 
- 	/* The color key is expressed as an RGB888 triplet stored in a 32-bit
- 	 * integer in XRGB8888 format. Bit 24 is used as a flag to disable (0)
- 	 * or enable source color keying (1).
- 	 */
--	rcdu->planes.colorkey =
-+	planes->colorkey =
- 		drm_property_create_range(rcdu->ddev, 0, "colorkey",
- 					  0, 0x01ffffff);
--	if (rcdu->planes.colorkey == NULL)
-+	if (planes->colorkey == NULL)
- 		return -ENOMEM;
- 
--	rcdu->planes.zpos =
-+	planes->zpos =
- 		drm_property_create_range(rcdu->ddev, 0, "zpos", 1, 7);
--	if (rcdu->planes.zpos == NULL)
-+	if (planes->zpos == NULL)
- 		return -ENOMEM;
- 
--	for (i = 0; i < ARRAY_SIZE(rcdu->planes.planes); ++i) {
--		struct rcar_du_plane *plane = &rcdu->planes.planes[i];
-+	for (i = 0; i < ARRAY_SIZE(planes->planes); ++i) {
-+		struct rcar_du_plane *plane = &planes->planes[i];
- 
--		plane->dev = rcdu;
-+		plane->group = rgrp;
- 		plane->hwindex = -1;
- 		plane->alpha = 255;
- 		plane->colorkey = RCAR_DU_COLORKEY_NONE;
-@@ -475,8 +476,10 @@ int rcar_du_planes_init(struct rcar_du_device *rcdu)
- 	return 0;
- }
- 
--int rcar_du_planes_register(struct rcar_du_device *rcdu)
-+int rcar_du_planes_register(struct rcar_du_group *rgrp)
- {
-+	struct rcar_du_planes *planes = &rgrp->planes;
-+	struct rcar_du_device *rcdu = rgrp->dev;
- 	unsigned int i;
- 	int ret;
- 
-@@ -487,7 +490,7 @@ int rcar_du_planes_register(struct rcar_du_device *rcdu)
- 		if (plane == NULL)
- 			return -ENOMEM;
- 
--		plane->hwplane = &rcdu->planes.planes[i + 2];
-+		plane->hwplane = &planes->planes[i + 2];
- 		plane->hwplane->zpos = 1;
- 
- 		ret = drm_plane_init(rcdu->ddev, &plane->plane,
-@@ -498,12 +501,12 @@ int rcar_du_planes_register(struct rcar_du_device *rcdu)
- 			return ret;
- 
- 		drm_object_attach_property(&plane->plane.base,
--					   rcdu->planes.alpha, 255);
-+					   planes->alpha, 255);
- 		drm_object_attach_property(&plane->plane.base,
--					   rcdu->planes.colorkey,
-+					   planes->colorkey,
- 					   RCAR_DU_COLORKEY_NONE);
- 		drm_object_attach_property(&plane->plane.base,
--					   rcdu->planes.zpos, 1);
-+					   planes->zpos, 1);
- 	}
- 
- 	return 0;
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_plane.h b/drivers/gpu/drm/rcar-du/rcar_du_plane.h
-index bcf6f76f56a0..f94f9ce84998 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_plane.h
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_plane.h
-@@ -19,8 +19,8 @@
- #include <drm/drmP.h>
- #include <drm/drm_crtc.h>
- 
--struct rcar_du_device;
- struct rcar_du_format_info;
-+struct rcar_du_group;
- 
- /* The RCAR DU has 8 hardware planes, shared between KMS planes and CRTCs. As
-  * using KMS planes requires at least one of the CRTCs being enabled, no more
-@@ -33,7 +33,7 @@ struct rcar_du_format_info;
- #define RCAR_DU_NUM_SW_PLANES		9
- 
- struct rcar_du_plane {
--	struct rcar_du_device *dev;
-+	struct rcar_du_group *group;
- 	struct drm_crtc *crtc;
- 
- 	bool enabled;
-@@ -67,8 +67,8 @@ struct rcar_du_planes {
- 	struct drm_property *zpos;
- };
- 
--int rcar_du_planes_init(struct rcar_du_device *rcdu);
--int rcar_du_planes_register(struct rcar_du_device *rcdu);
-+int rcar_du_planes_init(struct rcar_du_group *rgrp);
-+int rcar_du_planes_register(struct rcar_du_group *rgrp);
- 
- void rcar_du_plane_setup(struct rcar_du_plane *plane);
- void rcar_du_plane_update_base(struct rcar_du_plane *plane);
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0023-gpio-rcar-Add-DT-support.patch b/patches.renesas/0023-gpio-rcar-Add-DT-support.patch
deleted file mode 100644
index 34b8ed9a23753..0000000000000
--- a/patches.renesas/0023-gpio-rcar-Add-DT-support.patch
+++ /dev/null
@@ -1,202 +0,0 @@
-From 9abe3b8c79c9e87f9ab8b8456d50a5c32b609a51 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 21 May 2013 13:40:06 +0200
-Subject: gpio-rcar: Add DT support
-
-Add DT bindings for the gpio-rcar driver and read the device
-configuration from the DT node at probe time if available.
-
-Cc: devicetree-discuss@lists.ozlabs.org
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 159f8a0209aff155af7f6fcdedd4a4484dd19c23)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- .../devicetree/bindings/gpio/renesas,gpio-rcar.txt | 52 +++++++++++++++++
- drivers/gpio/gpio-rcar.c                           | 66 ++++++++++++++++++----
- 2 files changed, 108 insertions(+), 10 deletions(-)
- create mode 100644 Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt
-
-diff --git a/Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt b/Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt
-new file mode 100644
-index 00000000..46d76a00
---- /dev/null
-+++ b/Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt
-@@ -0,0 +1,52 @@
-+* Renesas R-Car GPIO Controller
-+
-+Required Properties:
-+
-+  - compatible: should be one of the following.
-+    - "renesas,gpio-r8a7778": for R8A7778 (R-Mobile M1) compatible GPIO controller.
-+    - "renesas,gpio-r8a7779": for R8A7779 (R-Car H1) compatible GPIO controller.
-+    - "renesas,gpio-r8a7790": for R8A7790 (R-Car H2) compatible GPIO controller.
-+    - "renesas,gpio-rcar": for generic R-Car GPIO controller.
-+
-+  - reg: Base address and length of each memory resource used by the GPIO
-+    controller hardware module.
-+
-+  - interrupt-parent: phandle of the parent interrupt controller.
-+  - interrupts: Interrupt specifier for the controllers interrupt.
-+
-+  - gpio-controller: Marks the device node as a gpio controller.
-+  - #gpio-cells: Should be 2. The first cell is the GPIO number and the second
-+    cell is used to specify optional parameters as bit flags. Only the GPIO
-+    active low flag (bit 0) is currently supported.
-+  - gpio-ranges: Range of pins managed by the GPIO controller as a 4-cells
-+    tuple using the following syntax.
-+
-+    <[phandle of the pin controller node]
-+     0
-+     [index of the first pin]
-+     [number of pins]>
-+
-+Please refer to gpio.txt in this directory for details of the common GPIO
-+bindings used by client devices.
-+
-+Example: R8A7779 (R-Car H1) GPIO controller nodes
-+
-+	gpio0: gpio@ffc40000 {
-+		compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
-+		reg = <0xffc40000 0x2c>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 141 0x4>;
-+		#gpio-cells = <2>;
-+		gpio-controller;
-+		gpio-ranges = <&pfc 0 0 32>;
-+	};
-+	...
-+	gpio6: gpio@ffc46000 {
-+		compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
-+		reg = <0xffc46000 0x2c>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 147 0x4>;
-+		#gpio-cells = <2>;
-+		gpio-controller;
-+		gpio-ranges = <&pfc 0 192 9>;
-+	};
-diff --git a/drivers/gpio/gpio-rcar.c b/drivers/gpio/gpio-rcar.c
-index d173d56d..5a693dd0 100644
---- a/drivers/gpio/gpio-rcar.c
-+++ b/drivers/gpio/gpio-rcar.c
-@@ -51,6 +51,8 @@ struct gpio_rcar_priv {
- #define FILONOFF 0x28
- #define BOTHEDGE 0x4c
- 
-+#define RCAR_MAX_GPIO_PER_BANK		32
-+
- static inline u32 gpio_rcar_read(struct gpio_rcar_priv *p, int offs)
- {
- 	return ioread32(p->base + offs);
-@@ -274,9 +276,39 @@ static struct irq_domain_ops gpio_rcar_irq_domain_ops = {
- 	.map	= gpio_rcar_irq_domain_map,
- };
- 
-+static void gpio_rcar_parse_pdata(struct gpio_rcar_priv *p)
-+{
-+	struct gpio_rcar_config *pdata = p->pdev->dev.platform_data;
-+#ifdef CONFIG_OF
-+	struct device_node *np = p->pdev->dev.of_node;
-+	struct of_phandle_args args;
-+	int ret;
-+#endif
-+
-+	if (pdata)
-+		p->config = *pdata;
-+#ifdef CONFIG_OF
-+	else if (np) {
-+		ret = of_parse_phandle_with_args(np, "gpio-ranges",
-+				"#gpio-range-cells", 0, &args);
-+		p->config.number_of_pins = ret == 0 && args.args_count == 3
-+					 ? args.args[2]
-+					 : RCAR_MAX_GPIO_PER_BANK;
-+		p->config.gpio_base = -1;
-+	}
-+#endif
-+
-+	if (p->config.number_of_pins == 0 ||
-+	    p->config.number_of_pins > RCAR_MAX_GPIO_PER_BANK) {
-+		dev_warn(&p->pdev->dev,
-+			 "Invalid number of gpio lines %u, using %u\n",
-+			 p->config.number_of_pins, RCAR_MAX_GPIO_PER_BANK);
-+		p->config.number_of_pins = RCAR_MAX_GPIO_PER_BANK;
-+	}
-+}
-+
- static int gpio_rcar_probe(struct platform_device *pdev)
- {
--	struct gpio_rcar_config *pdata = pdev->dev.platform_data;
- 	struct gpio_rcar_priv *p;
- 	struct resource *io, *irq;
- 	struct gpio_chip *gpio_chip;
-@@ -291,14 +323,14 @@ static int gpio_rcar_probe(struct platform_device *pdev)
- 		goto err0;
- 	}
- 
--	/* deal with driver instance configuration */
--	if (pdata)
--		p->config = *pdata;
--
- 	p->pdev = pdev;
--	platform_set_drvdata(pdev, p);
- 	spin_lock_init(&p->lock);
- 
-+	/* Get device configuration from DT node or platform data. */
-+	gpio_rcar_parse_pdata(p);
-+
-+	platform_set_drvdata(pdev, p);
-+
- 	io = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- 	irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
- 
-@@ -325,6 +357,7 @@ static int gpio_rcar_probe(struct platform_device *pdev)
- 	gpio_chip->set = gpio_rcar_set;
- 	gpio_chip->to_irq = gpio_rcar_to_irq;
- 	gpio_chip->label = name;
-+	gpio_chip->dev = &pdev->dev;
- 	gpio_chip->owner = THIS_MODULE;
- 	gpio_chip->base = p->config.gpio_base;
- 	gpio_chip->ngpio = p->config.number_of_pins;
-@@ -371,10 +404,12 @@ static int gpio_rcar_probe(struct platform_device *pdev)
- 				 p->config.irq_base, ret);
- 	}
- 
--	ret = gpiochip_add_pin_range(gpio_chip, p->config.pctl_name, 0,
--				     gpio_chip->base, gpio_chip->ngpio);
--	if (ret < 0)
--		dev_warn(&pdev->dev, "failed to add pin range\n");
-+	if (p->config.pctl_name) {
-+		ret = gpiochip_add_pin_range(gpio_chip, p->config.pctl_name, 0,
-+					     gpio_chip->base, gpio_chip->ngpio);
-+		if (ret < 0)
-+			dev_warn(&pdev->dev, "failed to add pin range\n");
-+	}
- 
- 	return 0;
- 
-@@ -397,11 +432,22 @@ static int gpio_rcar_remove(struct platform_device *pdev)
- 	return 0;
- }
- 
-+#ifdef CONFIG_OF
-+static const struct of_device_id gpio_rcar_of_table[] = {
-+	{
-+		.compatible = "renesas,gpio-rcar",
-+	},
-+};
-+
-+MODULE_DEVICE_TABLE(of, gpio_rcar_of_table);
-+#endif
-+
- static struct platform_driver gpio_rcar_device_driver = {
- 	.probe		= gpio_rcar_probe,
- 	.remove		= gpio_rcar_remove,
- 	.driver		= {
- 		.name	= "gpio_rcar",
-+		.of_match_table = of_match_ptr(gpio_rcar_of_table),
- 	}
- };
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0023-serial-sh-sci-Support-resources-passed-through-platf.patch b/patches.renesas/0023-serial-sh-sci-Support-resources-passed-through-platf.patch
deleted file mode 100644
index 2b39b807498b7..0000000000000
--- a/patches.renesas/0023-serial-sh-sci-Support-resources-passed-through-platf.patch
+++ /dev/null
@@ -1,214 +0,0 @@
-From 82f3ae665295959fbc56ce7f5ed8fe848a57683a Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 6 Dec 2013 10:59:16 +0100
-Subject: serial: sh-sci: Support resources passed through platform resources
-
-Memory and IRQ resources are currently passed to the driver through
-platform data. Support passing them through the standard platform
-resources mechanism instead. This deprecates platform data resources.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 1fcc91a607de0bf72d3a6073dfe459f7e9145ac5)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/tty/serial/sh-sci.c | 65 ++++++++++++++++++++++++++++++++++-----------
- include/linux/serial_sci.h  |  8 +++---
- 2 files changed, 53 insertions(+), 20 deletions(-)
-
-diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
-index 670a8a43c21a..613248ccea1b 100644
---- a/drivers/tty/serial/sh-sci.c
-+++ b/drivers/tty/serial/sh-sci.c
-@@ -74,6 +74,7 @@ struct sci_port {
- 	/* Function clock */
- 	struct clk		*fclk;
- 
-+	int			irqs[SCIx_NR_IRQS];
- 	char			*irqstr[SCIx_NR_IRQS];
- 	char			*gpiostr[SCIx_NR_FNS];
- 
-@@ -1079,19 +1080,19 @@ static int sci_request_irq(struct sci_port *port)
- 
- 	for (i = j = 0; i < SCIx_NR_IRQS; i++, j++) {
- 		struct sci_irq_desc *desc;
--		unsigned int irq;
-+		int irq;
- 
- 		if (SCIx_IRQ_IS_MUXED(port)) {
- 			i = SCIx_MUX_IRQ;
- 			irq = up->irq;
- 		} else {
--			irq = port->cfg->irqs[i];
-+			irq = port->irqs[i];
- 
- 			/*
- 			 * Certain port types won't support all of the
- 			 * available interrupt sources.
- 			 */
--			if (unlikely(!irq))
-+			if (unlikely(irq < 0))
- 				continue;
- 		}
- 
-@@ -1116,7 +1117,7 @@ static int sci_request_irq(struct sci_port *port)
- 
- out_noirq:
- 	while (--i >= 0)
--		free_irq(port->cfg->irqs[i], port);
-+		free_irq(port->irqs[i], port);
- 
- out_nomem:
- 	while (--j >= 0)
-@@ -1134,16 +1135,16 @@ static void sci_free_irq(struct sci_port *port)
- 	 * IRQ first.
- 	 */
- 	for (i = 0; i < SCIx_NR_IRQS; i++) {
--		unsigned int irq = port->cfg->irqs[i];
-+		int irq = port->irqs[i];
- 
- 		/*
- 		 * Certain port types won't support all of the available
- 		 * interrupt sources.
- 		 */
--		if (unlikely(!irq))
-+		if (unlikely(irq < 0))
- 			continue;
- 
--		free_irq(port->cfg->irqs[i], port);
-+		free_irq(port->irqs[i], port);
- 		kfree(port->irqstr[i]);
- 
- 		if (SCIx_IRQ_IS_MUXED(port)) {
-@@ -1659,7 +1660,7 @@ static void rx_timer_fn(unsigned long arg)
- 
- 	if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) {
- 		scr &= ~0x4000;
--		enable_irq(s->cfg->irqs[1]);
-+		enable_irq(s->irqs[SCIx_RXI_IRQ]);
- 	}
- 	serial_port_out(port, SCSCR, scr | SCSCR_RIE);
- 	dev_dbg(port->dev, "DMA Rx timed out\n");
-@@ -2150,11 +2151,12 @@ static struct uart_ops sci_uart_ops = {
- };
- 
- static int sci_init_single(struct platform_device *dev,
--				     struct sci_port *sci_port,
--				     unsigned int index,
--				     struct plat_sci_port *p)
-+			   struct sci_port *sci_port, unsigned int index,
-+			   struct plat_sci_port *p, bool early)
- {
- 	struct uart_port *port = &sci_port->port;
-+	const struct resource *res;
-+	unsigned int i;
- 	int ret;
- 
- 	sci_port->cfg	= p;
-@@ -2163,6 +2165,38 @@ static int sci_init_single(struct platform_device *dev,
- 	port->iotype	= UPIO_MEM;
- 	port->line	= index;
- 
-+	if (dev->num_resources) {
-+		/* Device has resources, use them. */
-+		res = platform_get_resource(dev, IORESOURCE_MEM, 0);
-+		if (res == NULL)
-+			return -ENOMEM;
-+
-+		port->mapbase = res->start;
-+
-+		for (i = 0; i < ARRAY_SIZE(sci_port->irqs); ++i)
-+			sci_port->irqs[i] = platform_get_irq(dev, i);
-+
-+		/* The SCI generates several interrupts. They can be muxed
-+		 * together or connected to different interrupt lines. In the
-+		 * muxed case only one interrupt resource is specified. In the
-+		 * non-muxed case three or four interrupt resources are
-+		 * specified, as the BRI interrupt is optional.
-+		 */
-+		if (sci_port->irqs[0] < 0)
-+			return -ENXIO;
-+
-+		if (sci_port->irqs[1] < 0) {
-+			sci_port->irqs[1] = sci_port->irqs[0];
-+			sci_port->irqs[2] = sci_port->irqs[0];
-+			sci_port->irqs[3] = sci_port->irqs[0];
-+		}
-+	} else {
-+		/* No resources, use old-style platform data. */
-+		port->mapbase = p->mapbase;
-+		for (i = 0; i < ARRAY_SIZE(sci_port->irqs); ++i)
-+			sci_port->irqs[i] = p->irqs[i] ? p->irqs[i] : -ENXIO;
-+	}
-+
- 	switch (p->type) {
- 	case PORT_SCIFB:
- 		port->fifosize = 256;
-@@ -2187,7 +2221,7 @@ static int sci_init_single(struct platform_device *dev,
- 			return ret;
- 	}
- 
--	if (dev) {
-+	if (!early) {
- 		sci_port->iclk = clk_get(&dev->dev, "sci_ick");
- 		if (IS_ERR(sci_port->iclk)) {
- 			sci_port->iclk = clk_get(&dev->dev, "peripheral_clk");
-@@ -2242,7 +2276,6 @@ static int sci_init_single(struct platform_device *dev,
- 		p->error_mask |= (1 << p->overrun_bit);
- 	}
- 
--	port->mapbase		= p->mapbase;
- 	port->type		= p->type;
- 	port->flags		= UPF_FIXED_PORT | p->flags;
- 	port->regshift		= p->regshift;
-@@ -2254,7 +2287,7 @@ static int sci_init_single(struct platform_device *dev,
- 	 *
- 	 * For the muxed case there's nothing more to do.
- 	 */
--	port->irq		= p->irqs[SCIx_RXI_IRQ];
-+	port->irq		= sci_port->irqs[SCIx_RXI_IRQ];
- 	port->irqflags		= 0;
- 
- 	port->serial_in		= sci_serial_in;
-@@ -2386,7 +2419,7 @@ static int sci_probe_earlyprintk(struct platform_device *pdev)
- 
- 	early_serial_console.index = pdev->id;
- 
--	sci_init_single(NULL, &sci_ports[pdev->id], pdev->id, cfg);
-+	sci_init_single(pdev, &sci_ports[pdev->id], pdev->id, cfg, true);
- 
- 	serial_console_setup(&early_serial_console, early_serial_buf);
- 
-@@ -2453,7 +2486,7 @@ static int sci_probe_single(struct platform_device *dev,
- 		return -EINVAL;
- 	}
- 
--	ret = sci_init_single(dev, sciport, index, p);
-+	ret = sci_init_single(dev, sciport, index, p, false);
- 	if (ret)
- 		return ret;
- 
-diff --git a/include/linux/serial_sci.h b/include/linux/serial_sci.h
-index eb787d40df02..68cf0bfdf108 100644
---- a/include/linux/serial_sci.h
-+++ b/include/linux/serial_sci.h
-@@ -107,10 +107,10 @@ enum {
- }
- 
- #define SCIx_IRQ_IS_MUXED(port)			\
--	((port)->cfg->irqs[SCIx_ERI_IRQ] ==	\
--	 (port)->cfg->irqs[SCIx_RXI_IRQ]) ||	\
--	((port)->cfg->irqs[SCIx_ERI_IRQ] &&	\
--	 !(port)->cfg->irqs[SCIx_RXI_IRQ])
-+	((port)->irqs[SCIx_ERI_IRQ] ==	\
-+	 (port)->irqs[SCIx_RXI_IRQ]) ||	\
-+	((port)->irqs[SCIx_ERI_IRQ] &&	\
-+	 ((port)->irqs[SCIx_RXI_IRQ] < 0))
- /*
-  * SCI register subset common for all port types.
-  * Not all registers will exist on all parts.
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0024-drm-rcar-du-Use-dynamic-number-of-CRTCs-instead-of-C.patch b/patches.renesas/0024-drm-rcar-du-Use-dynamic-number-of-CRTCs-instead-of-C.patch
deleted file mode 100644
index e92aa17389827..0000000000000
--- a/patches.renesas/0024-drm-rcar-du-Use-dynamic-number-of-CRTCs-instead-of-C.patch
+++ /dev/null
@@ -1,46 +0,0 @@
-From e85b0c6345fe455c7b84e2dffc38c21704e82e3d Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Sun, 16 Jun 2013 22:22:23 +0200
-Subject: drm/rcar-du: Use dynamic number of CRTCs instead of CRTCs array size
-
-The rcar_du_device structure contains a field that stores the number of
-CRTCs, use it instead of the CRTCs array size. This prepares the driver
-to support a variable number of CRTCs.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit 990d07a5a9582f14b4d6d13cde5311d6c694096a)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/rcar-du/rcar_du_drv.c | 2 +-
- drivers/gpu/drm/rcar-du/rcar_du_kms.c | 2 +-
- 2 files changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.c b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-index 8600b2b6aea4..5a68024c8de4 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-@@ -105,7 +105,7 @@ static void rcar_du_preclose(struct drm_device *dev, struct drm_file *file)
- 	struct rcar_du_device *rcdu = dev->dev_private;
- 	unsigned int i;
- 
--	for (i = 0; i < ARRAY_SIZE(rcdu->crtcs); ++i)
-+	for (i = 0; i < rcdu->num_crtcs; ++i)
- 		rcar_du_crtc_cancel_page_flip(&rcdu->crtcs[i], file);
- }
- 
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms.c b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
-index c32e0f9d4823..845bcb384863 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_kms.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
-@@ -197,7 +197,7 @@ int rcar_du_modeset_init(struct rcar_du_device *rcdu)
- 		if (pdata->type == RCAR_DU_ENCODER_UNUSED)
- 			continue;
- 
--		if (pdata->output >= ARRAY_SIZE(rcdu->crtcs)) {
-+		if (pdata->output >= rcdu->num_crtcs) {
- 			dev_warn(rcdu->dev,
- 				 "encoder %u references unexisting output %u, skipping\n",
- 				 i, pdata->output);
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0024-gpio-rcar-Use-OUTDT-when-reading-GPIOs-configured-as.patch b/patches.renesas/0024-gpio-rcar-Use-OUTDT-when-reading-GPIOs-configured-as.patch
deleted file mode 100644
index 3d6ef36825337..0000000000000
--- a/patches.renesas/0024-gpio-rcar-Use-OUTDT-when-reading-GPIOs-configured-as.patch
+++ /dev/null
@@ -1,40 +0,0 @@
-From a7b53103fa83410fea29a7cc4cb1898482d50ccb Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Mon, 17 Jun 2013 08:41:52 +0900
-Subject: gpio-rcar: Use OUTDT when reading GPIOs configured as output
-
-Testing on r8a7790 shows that INDT does not indicate the correct
-pin state when reading a GPIO configured as output, so update
-the gpio_rcar_get() function to handle this case.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-(cherry picked from commit ae9550f635533b1ca5d0b50e24a720426ad237c6)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpio/gpio-rcar.c | 9 ++++++++-
- 1 file changed, 8 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpio/gpio-rcar.c b/drivers/gpio/gpio-rcar.c
-index 5a693dd0..d591ea64 100644
---- a/drivers/gpio/gpio-rcar.c
-+++ b/drivers/gpio/gpio-rcar.c
-@@ -232,7 +232,14 @@ static int gpio_rcar_direction_input(struct gpio_chip *chip, unsigned offset)
- 
- static int gpio_rcar_get(struct gpio_chip *chip, unsigned offset)
- {
--	return (int)(gpio_rcar_read(gpio_to_priv(chip), INDT) & BIT(offset));
-+	u32 bit = BIT(offset);
-+
-+	/* testing on r8a7790 shows that INDT does not show correct pin state
-+	 * when configured as output, so use OUTDT in case of output pins */
-+	if (gpio_rcar_read(gpio_to_priv(chip), INOUTSEL) & bit)
-+		return (int)(gpio_rcar_read(gpio_to_priv(chip), OUTDT) & bit);
-+	else
-+		return (int)(gpio_rcar_read(gpio_to_priv(chip), INDT) & bit);
- }
- 
- static void gpio_rcar_set(struct gpio_chip *chip, unsigned offset, int value)
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0024-serial-sh-sci-Move-overrun_bit-and-error_mask-fields.patch b/patches.renesas/0024-serial-sh-sci-Move-overrun_bit-and-error_mask-fields.patch
deleted file mode 100644
index cfc1144c42083..0000000000000
--- a/patches.renesas/0024-serial-sh-sci-Move-overrun_bit-and-error_mask-fields.patch
+++ /dev/null
@@ -1,142 +0,0 @@
-From 2a6f2ce45c6005e8971a4006a83ce419eab94c5b Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 6 Dec 2013 10:59:17 +0100
-Subject: serial: sh-sci: Move overrun_bit and error_mask fields out of pdata
-
-None of the fields is ever set by board code, and both of them are set
-in the driver at probe time. Move them out of struct plat_sci_port to
-struct sci_port.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 3ae988d97b160c07463b980ccf26ed9226660fef)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/tty/serial/sh-sci.c | 50 +++++++++++++++++++++------------------------
- drivers/tty/serial/sh-sci.h |  2 +-
- include/linux/serial_sci.h  |  3 ---
- 3 files changed, 24 insertions(+), 31 deletions(-)
-
-diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
-index 613248ccea1b..d1c444afc405 100644
---- a/drivers/tty/serial/sh-sci.c
-+++ b/drivers/tty/serial/sh-sci.c
-@@ -64,6 +64,9 @@ struct sci_port {
- 
- 	/* Platform configuration */
- 	struct plat_sci_port	*cfg;
-+	int			overrun_bit;
-+	unsigned int		error_mask;
-+
- 
- 	/* Break timer */
- 	struct timer_list	break_timer;
-@@ -760,19 +763,15 @@ static int sci_handle_errors(struct uart_port *port)
- 	struct tty_port *tport = &port->state->port;
- 	struct sci_port *s = to_sci_port(port);
- 
--	/*
--	 * Handle overruns, if supported.
--	 */
--	if (s->cfg->overrun_bit != SCIx_NOT_SUPPORTED) {
--		if (status & (1 << s->cfg->overrun_bit)) {
--			port->icount.overrun++;
-+	/* Handle overruns */
-+	if (status & (1 << s->overrun_bit)) {
-+		port->icount.overrun++;
- 
--			/* overrun error */
--			if (tty_insert_flip_char(tport, 0, TTY_OVERRUN))
--				copied++;
-+		/* overrun error */
-+		if (tty_insert_flip_char(tport, 0, TTY_OVERRUN))
-+			copied++;
- 
--			dev_notice(port->dev, "overrun error");
--		}
-+		dev_notice(port->dev, "overrun error");
- 	}
- 
- 	if (status & SCxSR_FER(port)) {
-@@ -834,7 +833,7 @@ static int sci_handle_fifo_overrun(struct uart_port *port)
- 	if (!reg->size)
- 		return 0;
- 
--	if ((serial_port_in(port, SCLSR) & (1 << s->cfg->overrun_bit))) {
-+	if ((serial_port_in(port, SCLSR) & (1 << s->overrun_bit))) {
- 		serial_port_out(port, SCLSR, 0);
- 
- 		port->icount.overrun++;
-@@ -2253,28 +2252,25 @@ static int sci_init_single(struct platform_device *dev,
- 	/*
- 	 * Establish some sensible defaults for the error detection.
- 	 */
--	if (!p->error_mask)
--		p->error_mask = (p->type == PORT_SCI) ?
-+	sci_port->error_mask = (p->type == PORT_SCI) ?
- 			SCI_DEFAULT_ERROR_MASK : SCIF_DEFAULT_ERROR_MASK;
- 
- 	/*
- 	 * Establish sensible defaults for the overrun detection, unless
- 	 * the part has explicitly disabled support for it.
- 	 */
--	if (p->overrun_bit != SCIx_NOT_SUPPORTED) {
--		if (p->type == PORT_SCI)
--			p->overrun_bit = 5;
--		else if (p->scbrr_algo_id == SCBRR_ALGO_4)
--			p->overrun_bit = 9;
--		else
--			p->overrun_bit = 0;
-+	if (p->type == PORT_SCI)
-+		sci_port->overrun_bit = 5;
-+	else if (p->scbrr_algo_id == SCBRR_ALGO_4)
-+		sci_port->overrun_bit = 9;
-+	else
-+		sci_port->overrun_bit = 0;
- 
--		/*
--		 * Make the error mask inclusive of overrun detection, if
--		 * supported.
--		 */
--		p->error_mask |= (1 << p->overrun_bit);
--	}
-+	/*
-+	 * Make the error mask inclusive of overrun detection, if
-+	 * supported.
-+	 */
-+	sci_port->error_mask |= 1 << sci_port->overrun_bit;
- 
- 	port->type		= p->type;
- 	port->flags		= UPF_FIXED_PORT | p->flags;
-diff --git a/drivers/tty/serial/sh-sci.h b/drivers/tty/serial/sh-sci.h
-index 5aca7364634c..d5db81a0a430 100644
---- a/drivers/tty/serial/sh-sci.h
-+++ b/drivers/tty/serial/sh-sci.h
-@@ -9,7 +9,7 @@
- #define SCxSR_PER(port)		(((port)->type == PORT_SCI) ? SCI_PER    : SCIF_PER)
- #define SCxSR_BRK(port)		(((port)->type == PORT_SCI) ? 0x00       : SCIF_BRK)
- 
--#define SCxSR_ERRORS(port)	(to_sci_port(port)->cfg->error_mask)
-+#define SCxSR_ERRORS(port)	(to_sci_port(port)->error_mask)
- 
- #if defined(CONFIG_CPU_SUBTYPE_SH7705) || \
-     defined(CONFIG_CPU_SUBTYPE_SH7720) || \
-diff --git a/include/linux/serial_sci.h b/include/linux/serial_sci.h
-index 68cf0bfdf108..c1770a6966c1 100644
---- a/include/linux/serial_sci.h
-+++ b/include/linux/serial_sci.h
-@@ -152,9 +152,6 @@ struct plat_sci_port {
- 	/*
- 	 * Platform overrides if necessary, defaults otherwise.
- 	 */
--	int		overrun_bit;
--	unsigned int	error_mask;
--
- 	int		port_reg;
- 	unsigned char	regshift;
- 	unsigned char	regtype;
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0025-drm-rcar-du-Remove-register-definitions-for-the-seco.patch b/patches.renesas/0025-drm-rcar-du-Remove-register-definitions-for-the-seco.patch
deleted file mode 100644
index 46ab645532993..0000000000000
--- a/patches.renesas/0025-drm-rcar-du-Remove-register-definitions-for-the-seco.patch
+++ /dev/null
@@ -1,91 +0,0 @@
-From cbbb8db454d1a21d30f53eb74d0539519679260a Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Sun, 16 Jun 2013 23:48:10 +0200
-Subject: drm/rcar-du: Remove register definitions for the second channel
-
-Channels are accessed through a global channel memory offset, there's no
-need to define register addresses for the second channel.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit 660bab56aa048c904a65ce6a8fc2eca2235eec6f)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/rcar-du/rcar_du_regs.h | 9 ---------
- 1 file changed, 9 deletions(-)
-
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_regs.h b/drivers/gpu/drm/rcar-du/rcar_du_regs.h
-index 3aba27ffc065..195ed7e1756e 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_regs.h
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_regs.h
-@@ -20,7 +20,6 @@
-  */
- 
- #define DSYSR			0x00000	/* display 1 */
--#define D2SYSR			0x30000	/* display 2 */
- #define DSYSR_ILTS		(1 << 29)
- #define DSYSR_DSEC		(1 << 20)
- #define DSYSR_IUPD		(1 << 16)
-@@ -35,7 +34,6 @@
- #define DSYSR_SCM_INT_VIDEO	(3 << 4)
- 
- #define DSMR			0x00004
--#define D2SMR			0x30004
- #define DSMR_VSPM		(1 << 28)
- #define DSMR_ODPM		(1 << 27)
- #define DSMR_DIPM_DISP		(0 << 25)
-@@ -60,7 +58,6 @@
- #define DSMR_CSY_MASK		(3 << 6)
- 
- #define DSSR			0x00008
--#define D2SSR			0x30008
- #define DSSR_VC1FB_DSA0		(0 << 30)
- #define DSSR_VC1FB_DSA1		(1 << 30)
- #define DSSR_VC1FB_DSA2		(2 << 30)
-@@ -80,7 +77,6 @@
- #define DSSR_ADC(n)		(1 << ((n)-1))
- 
- #define DSRCR			0x0000c
--#define D2SRCR			0x3000c
- #define DSRCR_TVCL		(1 << 15)
- #define DSRCR_FRCL		(1 << 14)
- #define DSRCR_VBCL		(1 << 11)
-@@ -90,7 +86,6 @@
- #define DSRCR_MASK		0x0000cbff
- 
- #define DIER			0x00010
--#define D2IER			0x30010
- #define DIER_TVE		(1 << 15)
- #define DIER_FRE		(1 << 14)
- #define DIER_VBE		(1 << 11)
-@@ -114,7 +109,6 @@
- #define DPPR_BPP32		(DPPR_BPP32_P1 | DPPR_BPP32_P2)	/* plane1 & 2 */
- 
- #define DEFR			0x00020
--#define D2EFR			0x30020
- #define DEFR_CODE		(0x7773 << 16)
- #define DEFR_EXSL		(1 << 12)
- #define DEFR_EXVL		(1 << 11)
-@@ -137,12 +131,10 @@
- #define DCPCR_DCE		(1 << 0)
- 
- #define DEFR2			0x00034
--#define D2EFR2			0x30034
- #define DEFR2_CODE		(0x7775 << 16)
- #define DEFR2_DEFE2G		(1 << 0)
- 
- #define DEFR3			0x00038
--#define D2EFR3			0x30038
- #define DEFR3_CODE		(0x7776 << 16)
- #define DEFR3_EVDA		(1 << 14)
- #define DEFR3_EVDM_1		(1 << 12)
-@@ -153,7 +145,6 @@
- #define DEFR3_DEFE3		(1 << 0)
- 
- #define DEFR4			0x0003c
--#define D2EFR4			0x3003c
- #define DEFR4_CODE		(0x7777 << 16)
- #define DEFR4_LRUO		(1 << 5)
- #define DEFR4_SPCE		(1 << 4)
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0025-gpio-rcar-Reference-core-gpio-documentation-in-the-D.patch b/patches.renesas/0025-gpio-rcar-Reference-core-gpio-documentation-in-the-D.patch
deleted file mode 100644
index a9707f79cb622..0000000000000
--- a/patches.renesas/0025-gpio-rcar-Reference-core-gpio-documentation-in-the-D.patch
+++ /dev/null
@@ -1,48 +0,0 @@
-From 907121ee5fafae98aa6b8775d98511b3e7444543 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 18 Jun 2013 12:29:48 +0200
-Subject: gpio-rcar: Reference core gpio documentation in the DT bindings
-
-Replaced the detailed gpio-ranges documentation with a reference to the
-code gpio DT bindings, and mention the gpio flags symbolic names.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit b559c3e8e7ca469921987925baf892ab2038396e)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- .../devicetree/bindings/gpio/renesas,gpio-rcar.txt     | 18 ++++++------------
- 1 file changed, 6 insertions(+), 12 deletions(-)
-
-diff --git a/Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt b/Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt
-index 46d76a00..cb3dc7bc 100644
---- a/Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt
-+++ b/Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt
-@@ -16,18 +16,12 @@ Required Properties:
- 
-   - gpio-controller: Marks the device node as a gpio controller.
-   - #gpio-cells: Should be 2. The first cell is the GPIO number and the second
--    cell is used to specify optional parameters as bit flags. Only the GPIO
--    active low flag (bit 0) is currently supported.
--  - gpio-ranges: Range of pins managed by the GPIO controller as a 4-cells
--    tuple using the following syntax.
--
--    <[phandle of the pin controller node]
--     0
--     [index of the first pin]
--     [number of pins]>
--
--Please refer to gpio.txt in this directory for details of the common GPIO
--bindings used by client devices.
-+    cell specifies GPIO flags, as defined in <dt-bindings/gpio/gpio.h>. Only the
-+    GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW flags are supported.
-+  - gpio-ranges: Range of pins managed by the GPIO controller.
-+
-+Please refer to gpio.txt in this directory for details of gpio-ranges property
-+and the common GPIO bindings used by client devices.
- 
- Example: R8A7779 (R-Car H1) GPIO controller nodes
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0025-serial-sh-sci-Remove-unused-GPIO-request-code.patch b/patches.renesas/0025-serial-sh-sci-Remove-unused-GPIO-request-code.patch
deleted file mode 100644
index f1485a4c9c013..0000000000000
--- a/patches.renesas/0025-serial-sh-sci-Remove-unused-GPIO-request-code.patch
+++ /dev/null
@@ -1,158 +0,0 @@
-From 45e3730a5d85f60e96df1ca7d07dc63b3ff8067f Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 6 Dec 2013 10:59:18 +0100
-Subject: serial: sh-sci: Remove unused GPIO request code
-
-The driver requests at initialization time GPIOs passed through platform
-data. No platform makes use of this feature, remove it.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 520402bbc6fe328ae28e08bfc87a2b1eb7f10b2c)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/tty/serial/sh-sci.c | 67 ---------------------------------------------
- include/linux/serial_sci.h  | 12 --------
- 2 files changed, 79 deletions(-)
-
-diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
-index d1c444afc405..ce9f02506b3c 100644
---- a/drivers/tty/serial/sh-sci.c
-+++ b/drivers/tty/serial/sh-sci.c
-@@ -32,7 +32,6 @@
- #include <linux/dma-mapping.h>
- #include <linux/err.h>
- #include <linux/errno.h>
--#include <linux/gpio.h>
- #include <linux/init.h>
- #include <linux/interrupt.h>
- #include <linux/ioport.h>
-@@ -79,7 +78,6 @@ struct sci_port {
- 
- 	int			irqs[SCIx_NR_IRQS];
- 	char			*irqstr[SCIx_NR_IRQS];
--	char			*gpiostr[SCIx_NR_FNS];
- 
- 	struct dma_chan			*chan_tx;
- 	struct dma_chan			*chan_rx;
-@@ -1153,67 +1151,6 @@ static void sci_free_irq(struct sci_port *port)
- 	}
- }
- 
--static const char *sci_gpio_names[SCIx_NR_FNS] = {
--	"sck", "rxd", "txd", "cts", "rts",
--};
--
--static const char *sci_gpio_str(unsigned int index)
--{
--	return sci_gpio_names[index];
--}
--
--static void sci_init_gpios(struct sci_port *port)
--{
--	struct uart_port *up = &port->port;
--	int i;
--
--	if (!port->cfg)
--		return;
--
--	for (i = 0; i < SCIx_NR_FNS; i++) {
--		const char *desc;
--		int ret;
--
--		if (!port->cfg->gpios[i])
--			continue;
--
--		desc = sci_gpio_str(i);
--
--		port->gpiostr[i] = kasprintf(GFP_KERNEL, "%s:%s",
--					     dev_name(up->dev), desc);
--
--		/*
--		 * If we've failed the allocation, we can still continue
--		 * on with a NULL string.
--		 */
--		if (!port->gpiostr[i])
--			dev_notice(up->dev, "%s string allocation failure\n",
--				   desc);
--
--		ret = gpio_request(port->cfg->gpios[i], port->gpiostr[i]);
--		if (unlikely(ret != 0)) {
--			dev_notice(up->dev, "failed %s gpio request\n", desc);
--
--			/*
--			 * If we can't get the GPIO for whatever reason,
--			 * no point in keeping the verbose string around.
--			 */
--			kfree(port->gpiostr[i]);
--		}
--	}
--}
--
--static void sci_free_gpios(struct sci_port *port)
--{
--	int i;
--
--	for (i = 0; i < SCIx_NR_FNS; i++)
--		if (port->cfg->gpios[i]) {
--			gpio_free(port->cfg->gpios[i]);
--			kfree(port->gpiostr[i]);
--		}
--}
--
- static unsigned int sci_tx_empty(struct uart_port *port)
- {
- 	unsigned short status = serial_port_in(port, SCxSR);
-@@ -2240,8 +2177,6 @@ static int sci_init_single(struct platform_device *dev,
- 
- 		port->dev = &dev->dev;
- 
--		sci_init_gpios(sci_port);
--
- 		pm_runtime_enable(&dev->dev);
- 	}
- 
-@@ -2298,8 +2233,6 @@ static int sci_init_single(struct platform_device *dev,
- 
- static void sci_cleanup_single(struct sci_port *port)
- {
--	sci_free_gpios(port);
--
- 	clk_put(port->iclk);
- 	clk_put(port->fclk);
- 
-diff --git a/include/linux/serial_sci.h b/include/linux/serial_sci.h
-index c1770a6966c1..efd4727ccd67 100644
---- a/include/linux/serial_sci.h
-+++ b/include/linux/serial_sci.h
-@@ -69,17 +69,6 @@ enum {
- 	SCIx_MUX_IRQ = SCIx_NR_IRQS,	/* special case */
- };
- 
--/* Offsets into the sci_port->gpios array */
--enum {
--	SCIx_SCK,
--	SCIx_RXD,
--	SCIx_TXD,
--	SCIx_CTS,
--	SCIx_RTS,
--
--	SCIx_NR_FNS,
--};
--
- enum {
- 	SCIx_PROBE_REGTYPE,
- 
-@@ -141,7 +130,6 @@ struct plat_sci_port_ops {
- struct plat_sci_port {
- 	unsigned long	mapbase;		/* resource base */
- 	unsigned int	irqs[SCIx_NR_IRQS];	/* ERI, RXI, TXI, BRI */
--	unsigned int	gpios[SCIx_NR_FNS];	/* SCK, RXD, TXD, CTS, RTS */
- 	unsigned int	type;			/* SCI / SCIF / IRDA / HSCIF */
- 	upf_t		flags;			/* UPF_* flags */
- 	unsigned long	capabilities;		/* Port features/capabilities */
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0026-drm-rcar-du-Move-output-routing-configuration-to-gro.patch b/patches.renesas/0026-drm-rcar-du-Move-output-routing-configuration-to-gro.patch
deleted file mode 100644
index 505a820ae2bcb..0000000000000
--- a/patches.renesas/0026-drm-rcar-du-Move-output-routing-configuration-to-gro.patch
+++ /dev/null
@@ -1,98 +0,0 @@
-From 18d43412c08badd2c1df0411c19bd45a1967fd35 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Mon, 17 Jun 2013 00:11:05 +0200
-Subject: drm/rcar-du: Move output routing configuration to group
-
-Output routing is configured in group registers, move the corresponding
-code from rcar_du_crtc.c to rcar_du_group.c.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit 2fd22dba23e3847651bffa1d9cc37acea05cc351)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/rcar-du/rcar_du_crtc.c  | 21 +--------------------
- drivers/gpu/drm/rcar-du/rcar_du_group.c | 19 +++++++++++++++++++
- drivers/gpu/drm/rcar-du/rcar_du_group.h |  2 +-
- 3 files changed, 21 insertions(+), 21 deletions(-)
-
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
-index 7784a3ba7854..6a2b9590bb74 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
-@@ -130,25 +130,6 @@ static void rcar_du_crtc_set_display_timing(struct rcar_du_crtc *rcrtc)
- 	rcar_du_crtc_write(rcrtc, DEWR,  mode->hdisplay);
- }
- 
--static void rcar_du_crtc_set_routing(struct rcar_du_crtc *rcrtc)
--{
--	struct rcar_du_device *rcdu = rcrtc->group->dev;
--	u32 dorcr = rcar_du_read(rcdu, DORCR);
--
--	dorcr &= ~(DORCR_PG2T | DORCR_DK2S | DORCR_PG2D_MASK);
--
--	/* Set the DU1 pins sources. Select CRTC 0 if explicitly requested and
--	 * CRTC 1 in all other cases to avoid cloning CRTC 0 to DU0 and DU1 by
--	 * default.
--	 */
--	if (rcrtc->outputs & (1 << 1) && rcrtc->index == 0)
--		dorcr |= DORCR_PG2D_DS1;
--	else
--		dorcr |= DORCR_PG2T | DORCR_DK2S | DORCR_PG2D_DS2;
--
--	rcar_du_write(rcdu, DORCR, dorcr);
--}
--
- void rcar_du_crtc_route_output(struct drm_crtc *crtc, unsigned int output)
- {
- 	struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);
-@@ -245,7 +226,7 @@ static void rcar_du_crtc_start(struct rcar_du_crtc *rcrtc)
- 
- 	/* Configure display timings and output routing */
- 	rcar_du_crtc_set_display_timing(rcrtc);
--	rcar_du_crtc_set_routing(rcrtc);
-+	rcar_du_group_set_routing(rcrtc->group);
- 
- 	mutex_lock(&rcrtc->group->planes.lock);
- 	rcrtc->plane->enabled = true;
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_group.c b/drivers/gpu/drm/rcar-du/rcar_du_group.c
-index 625b9f446965..7e754515bba8 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_group.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_group.c
-@@ -125,3 +125,22 @@ void rcar_du_group_restart(struct rcar_du_group *rgrp)
- 	__rcar_du_group_start_stop(rgrp, false);
- 	__rcar_du_group_start_stop(rgrp, true);
- }
-+
-+void rcar_du_group_set_routing(struct rcar_du_group *rgrp)
-+{
-+	struct rcar_du_crtc *crtc0 = &rgrp->dev->crtcs[rgrp->index * 2];
-+	u32 dorcr = rcar_du_group_read(rgrp, DORCR);
-+
-+	dorcr &= ~(DORCR_PG2T | DORCR_DK2S | DORCR_PG2D_MASK);
-+
-+	/* Set the DU1 pins sources. Select CRTC 0 if explicitly requested and
-+	 * CRTC 1 in all other cases to avoid cloning CRTC 0 to DU0 and DU1 by
-+	 * default.
-+	 */
-+	if (crtc0->outputs & (1 << 1))
-+		dorcr |= DORCR_PG2D_DS1;
-+	else
-+		dorcr |= DORCR_PG2T | DORCR_DK2S | DORCR_PG2D_DS2;
-+
-+	rcar_du_group_write(rgrp, DORCR, dorcr);
-+}
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_group.h b/drivers/gpu/drm/rcar-du/rcar_du_group.h
-index 748331bbb8fe..180c739812c9 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_group.h
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_group.h
-@@ -42,6 +42,6 @@ int rcar_du_group_get(struct rcar_du_group *rgrp);
- void rcar_du_group_put(struct rcar_du_group *rgrp);
- void rcar_du_group_start_stop(struct rcar_du_group *rgrp, bool start);
- void rcar_du_group_restart(struct rcar_du_group *rgrp);
--
-+void rcar_du_group_set_routing(struct rcar_du_group *rgrp);
- 
- #endif /* __RCAR_DU_GROUP_H__ */
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0026-gpio-rcar-Remove-ifdef-CONFIG_OF-around-OF-specific-.patch b/patches.renesas/0026-gpio-rcar-Remove-ifdef-CONFIG_OF-around-OF-specific-.patch
deleted file mode 100644
index 951406668f3b7..0000000000000
--- a/patches.renesas/0026-gpio-rcar-Remove-ifdef-CONFIG_OF-around-OF-specific-.patch
+++ /dev/null
@@ -1,52 +0,0 @@
-From 6123ad86b5be74f26d9a0afc51327721913a32f9 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 18 Jun 2013 12:29:49 +0200
-Subject: gpio-rcar: Remove #ifdef CONFIG_OF around OF-specific sections
-
-All functions and data types used by OF-specific code paths are declared
-in <linux/of.h> regardless of CONFIG_OF. Replace the #ifdef CONFIG_OF
-guard with a if(IS_ENABLED(CONFIG_OF)) and let the compiler optimize
-the unused code away.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit e305062e94719ef543ae936dd56501b5a36406c6)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpio/gpio-rcar.c | 8 ++------
- 1 file changed, 2 insertions(+), 6 deletions(-)
-
-diff --git a/drivers/gpio/gpio-rcar.c b/drivers/gpio/gpio-rcar.c
-index d591ea64..34f86b26 100644
---- a/drivers/gpio/gpio-rcar.c
-+++ b/drivers/gpio/gpio-rcar.c
-@@ -286,16 +286,13 @@ static struct irq_domain_ops gpio_rcar_irq_domain_ops = {
- static void gpio_rcar_parse_pdata(struct gpio_rcar_priv *p)
- {
- 	struct gpio_rcar_config *pdata = p->pdev->dev.platform_data;
--#ifdef CONFIG_OF
- 	struct device_node *np = p->pdev->dev.of_node;
- 	struct of_phandle_args args;
- 	int ret;
--#endif
- 
--	if (pdata)
-+	if (pdata) {
- 		p->config = *pdata;
--#ifdef CONFIG_OF
--	else if (np) {
-+	} else if (IS_ENABLED(CONFIG_OF) && np) {
- 		ret = of_parse_phandle_with_args(np, "gpio-ranges",
- 				"#gpio-range-cells", 0, &args);
- 		p->config.number_of_pins = ret == 0 && args.args_count == 3
-@@ -303,7 +300,6 @@ static void gpio_rcar_parse_pdata(struct gpio_rcar_priv *p)
- 					 : RCAR_MAX_GPIO_PER_BANK;
- 		p->config.gpio_base = -1;
- 	}
--#endif
- 
- 	if (p->config.number_of_pins == 0 ||
- 	    p->config.number_of_pins > RCAR_MAX_GPIO_PER_BANK) {
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0026-serial-sh-sci-Compute-overrun_bit-without-using-baud.patch b/patches.renesas/0026-serial-sh-sci-Compute-overrun_bit-without-using-baud.patch
deleted file mode 100644
index 1e9cb4f6ccac3..0000000000000
--- a/patches.renesas/0026-serial-sh-sci-Compute-overrun_bit-without-using-baud.patch
+++ /dev/null
@@ -1,85 +0,0 @@
-From 828f09152698abbcd900c06a42977eec4be4cbd9 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 6 Dec 2013 10:59:19 +0100
-Subject: serial: sh-sci: Compute overrun_bit without using baud rate algo
-
-The overrun bit index is a property of the hardware. It's currently
-computed based on a different and unrelated hardware property, the baud
-rate calculation algorithm. Compute it using hardware identification
-information only.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit b545e4f40613be708ad660517f10c87423a09e8d)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/tty/serial/sh-sci.c | 26 ++++++++++++++------------
- 1 file changed, 14 insertions(+), 12 deletions(-)
-
-diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
-index ce9f02506b3c..e643df18f48b 100644
---- a/drivers/tty/serial/sh-sci.c
-+++ b/drivers/tty/serial/sh-sci.c
-@@ -2133,30 +2133,38 @@ static int sci_init_single(struct platform_device *dev,
- 			sci_port->irqs[i] = p->irqs[i] ? p->irqs[i] : -ENXIO;
- 	}
- 
-+	if (p->regtype == SCIx_PROBE_REGTYPE) {
-+		ret = sci_probe_regmap(p);
-+		if (unlikely(ret))
-+			return ret;
-+	}
-+
- 	switch (p->type) {
- 	case PORT_SCIFB:
- 		port->fifosize = 256;
-+		sci_port->overrun_bit = 9;
- 		break;
- 	case PORT_HSCIF:
- 		port->fifosize = 128;
-+		sci_port->overrun_bit = 0;
- 		break;
- 	case PORT_SCIFA:
- 		port->fifosize = 64;
-+		sci_port->overrun_bit = 9;
- 		break;
- 	case PORT_SCIF:
- 		port->fifosize = 16;
-+		if (p->regtype == SCIx_SH7705_SCIF_REGTYPE)
-+			sci_port->overrun_bit = 9;
-+		else
-+			sci_port->overrun_bit = 0;
- 		break;
- 	default:
- 		port->fifosize = 1;
-+		sci_port->overrun_bit = 5;
- 		break;
- 	}
- 
--	if (p->regtype == SCIx_PROBE_REGTYPE) {
--		ret = sci_probe_regmap(p);
--		if (unlikely(ret))
--			return ret;
--	}
--
- 	if (!early) {
- 		sci_port->iclk = clk_get(&dev->dev, "sci_ick");
- 		if (IS_ERR(sci_port->iclk)) {
-@@ -2194,12 +2202,6 @@ static int sci_init_single(struct platform_device *dev,
- 	 * Establish sensible defaults for the overrun detection, unless
- 	 * the part has explicitly disabled support for it.
- 	 */
--	if (p->type == PORT_SCI)
--		sci_port->overrun_bit = 5;
--	else if (p->scbrr_algo_id == SCBRR_ALGO_4)
--		sci_port->overrun_bit = 9;
--	else
--		sci_port->overrun_bit = 0;
- 
- 	/*
- 	 * Make the error mask inclusive of overrun detection, if
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0027-drm-rcar-du-Add-support-for-the-R8A7790-DU.patch b/patches.renesas/0027-drm-rcar-du-Add-support-for-the-R8A7790-DU.patch
deleted file mode 100644
index a7aca449d2156..0000000000000
--- a/patches.renesas/0027-drm-rcar-du-Add-support-for-the-R8A7790-DU.patch
+++ /dev/null
@@ -1,124 +0,0 @@
-From cb7342965a26939902f88f7af3d0fcec8954336f Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 14 Jun 2013 14:16:35 +0200
-Subject: drm/rcar-du: Add support for the R8A7790 DU
-
-The DU revision in the R8A7790 SoC uses one IRQ and clock per CRTC. Add
-a corresponding entry in the module platform ID table.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit ef2d84bec6a02c4536cab1e0a8f13792ad86a7bc)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/rcar-du/rcar_du_drv.c  |  5 +++
- drivers/gpu/drm/rcar-du/rcar_du_regs.h | 66 ++++++++++++++++++++++++++++++++--
- 2 files changed, 68 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.c b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-index 5a68024c8de4..dc4c07e02d8c 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-@@ -215,8 +215,13 @@ static const struct rcar_du_device_info rcar_du_r8a7779_info = {
- 	.features = 0,
- };
- 
-+static const struct rcar_du_device_info rcar_du_r8a7790_info = {
-+	.features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK,
-+};
-+
- static const struct platform_device_id rcar_du_id_table[] = {
- 	{ "rcar-du-r8a7779", (kernel_ulong_t)&rcar_du_r8a7779_info },
-+	{ "rcar-du-r8a7790", (kernel_ulong_t)&rcar_du_r8a7790_info },
- 	{ }
- };
- 
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_regs.h b/drivers/gpu/drm/rcar-du/rcar_du_regs.h
-index 195ed7e1756e..f62a9f36041a 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_regs.h
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_regs.h
-@@ -196,6 +196,68 @@
- #define DEFR6_DEFAULT		(DEFR6_CODE | DEFR6_TCNE2)
- 
- /* -----------------------------------------------------------------------------
-+ * R8A7790-only Control Registers
-+ */
-+
-+#define DD1SSR			0x20008
-+#define DD1SSR_TVR		(1 << 15)
-+#define DD1SSR_FRM		(1 << 14)
-+#define DD1SSR_BUF		(1 << 12)
-+#define DD1SSR_VBK		(1 << 11)
-+#define DD1SSR_RINT		(1 << 9)
-+#define DD1SSR_HBK		(1 << 8)
-+#define DD1SSR_ADC(n)		(1 << ((n)-1))
-+
-+#define DD1SRCR			0x2000c
-+#define DD1SRCR_TVR		(1 << 15)
-+#define DD1SRCR_FRM		(1 << 14)
-+#define DD1SRCR_BUF		(1 << 12)
-+#define DD1SRCR_VBK		(1 << 11)
-+#define DD1SRCR_RINT		(1 << 9)
-+#define DD1SRCR_HBK		(1 << 8)
-+#define DD1SRCR_ADC(n)		(1 << ((n)-1))
-+
-+#define DD1IER			0x20010
-+#define DD1IER_TVR		(1 << 15)
-+#define DD1IER_FRM		(1 << 14)
-+#define DD1IER_BUF		(1 << 12)
-+#define DD1IER_VBK		(1 << 11)
-+#define DD1IER_RINT		(1 << 9)
-+#define DD1IER_HBK		(1 << 8)
-+#define DD1IER_ADC(n)		(1 << ((n)-1))
-+
-+#define DEFR8			0x20020
-+#define DEFR8_CODE		(0x7790 << 16)
-+#define DEFR8_VSCS		(1 << 6)
-+#define DEFR8_DRGBS_DU(n)	((n) << 4)
-+#define DEFR8_DRGBS_MASK	(3 << 4)
-+#define DEFR8_DEFE8		(1 << 0)
-+
-+#define DOFLR			0x20024
-+#define DOFLR_CODE		(0x7790 << 16)
-+#define DOFLR_HSYCFL1		(1 << 13)
-+#define DOFLR_VSYCFL1		(1 << 12)
-+#define DOFLR_ODDFL1		(1 << 11)
-+#define DOFLR_DISPFL1		(1 << 10)
-+#define DOFLR_CDEFL1		(1 << 9)
-+#define DOFLR_RGBFL1		(1 << 8)
-+#define DOFLR_HSYCFL0		(1 << 5)
-+#define DOFLR_VSYCFL0		(1 << 4)
-+#define DOFLR_ODDFL0		(1 << 3)
-+#define DOFLR_DISPFL0		(1 << 2)
-+#define DOFLR_CDEFL0		(1 << 1)
-+#define DOFLR_RGBFL0		(1 << 0)
-+
-+#define DIDSR			0x20028
-+#define DIDSR_CODE		(0x7790 << 16)
-+#define DIDSR_LCDS_DCLKIN(n)	(0 << (8 + (n) * 2))
-+#define DIDSR_LCDS_LVDS0(n)	(2 << (8 + (n) * 2))
-+#define DIDSR_LCDS_LVDS1(n)	(3 << (8 + (n) * 2))
-+#define DIDSR_LCDS_MASK(n)	(3 << (8 + (n) * 2))
-+#define DIDSR_PCDS_CLK(n, clk)	(clk << ((n) * 2))
-+#define DIDSR_PCDS_MASK(n)	(3 << ((n) * 2))
-+
-+/* -----------------------------------------------------------------------------
-  * Display Timing Generation Registers
-  */
- 
-@@ -364,12 +426,10 @@
-  * Display Capture Registers
-  */
- 
-+#define DCMR			0x0c100
- #define DCMWR			0x0c104
--#define DC2MWR			0x0c204
- #define DCSAR			0x0c120
--#define DC2SAR			0x0c220
- #define DCMLR			0x0c150
--#define DC2MLR			0x0c250
- 
- /* -----------------------------------------------------------------------------
-  * Color Palette Registers
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0027-gpio-rcar-fix-gpio_rcar_of_table.patch b/patches.renesas/0027-gpio-rcar-fix-gpio_rcar_of_table.patch
deleted file mode 100644
index 01f8c82cc0d0a..0000000000000
--- a/patches.renesas/0027-gpio-rcar-fix-gpio_rcar_of_table.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From a61f80817625502c7f6e47ea6730553ed56a2077 Mon Sep 17 00:00:00 2001
-From: Arnd Bergmann <arnd@arndb.de>
-Date: Mon, 17 Jun 2013 09:55:50 +0200
-Subject: gpio: rcar: fix gpio_rcar_of_table
-
-The device table needs to be terminated with an empty element.
-
-Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-Cc: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Cc: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 30d2266c685ce9f560e5023e4add58f890554a46)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpio/gpio-rcar.c | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/drivers/gpio/gpio-rcar.c b/drivers/gpio/gpio-rcar.c
-index 34f86b26..e8198dd6 100644
---- a/drivers/gpio/gpio-rcar.c
-+++ b/drivers/gpio/gpio-rcar.c
-@@ -440,6 +440,7 @@ static const struct of_device_id gpio_rcar_of_table[] = {
- 	{
- 		.compatible = "renesas,gpio-rcar",
- 	},
-+	{ },
- };
- 
- MODULE_DEVICE_TABLE(of, gpio_rcar_of_table);
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0027-serial-sh-sci-Rework-baud-rate-calculation.patch b/patches.renesas/0027-serial-sh-sci-Rework-baud-rate-calculation.patch
deleted file mode 100644
index 1387e78dad90d..0000000000000
--- a/patches.renesas/0027-serial-sh-sci-Rework-baud-rate-calculation.patch
+++ /dev/null
@@ -1,151 +0,0 @@
-From e4a9d61407a3f578ab35a3f67f745d99c5ee06c3 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 6 Dec 2013 10:59:20 +0100
-Subject: serial: sh-sci: Rework baud rate calculation
-
-Computing the baud rate register value requires knowledge of the
-hardware sampling rate. This information is currently encoded in a baud
-rate calculation algorithm ID passed through platform data. However, it
-can be derived from the port type directly in most cases.
-
-Compute the sampling rate internally in the driver if the baud rate
-calculation algorithm ID isn't specified, and allow platforms to
-override the sampling rate through platform data in special cases (this
-is only required for SCIFA ports on sh7723 and sh7724, the reason needs
-to be investigated).
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit ec09c5eb491834d4011c72538e58d8b7096076bd)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/tty/serial/sh-sci.c | 37 ++++++++++++++++++++++++++++++-------
- include/linux/serial_sci.h  |  2 ++
- 2 files changed, 32 insertions(+), 7 deletions(-)
-
-diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
-index e643df18f48b..35e3225714bc 100644
---- a/drivers/tty/serial/sh-sci.c
-+++ b/drivers/tty/serial/sh-sci.c
-@@ -65,6 +65,7 @@ struct sci_port {
- 	struct plat_sci_port	*cfg;
- 	int			overrun_bit;
- 	unsigned int		error_mask;
-+	unsigned int		sampling_rate;
- 
- 
- 	/* Break timer */
-@@ -1750,10 +1751,13 @@ static void sci_shutdown(struct uart_port *port)
- 	sci_free_irq(s);
- }
- 
--static unsigned int sci_scbrr_calc(unsigned int algo_id, unsigned int bps,
-+static unsigned int sci_scbrr_calc(struct sci_port *s, unsigned int bps,
- 				   unsigned long freq)
- {
--	switch (algo_id) {
-+	if (s->sampling_rate)
-+		return DIV_ROUND_CLOSEST(freq, s->sampling_rate * bps) - 1;
-+
-+	switch (s->cfg->scbrr_algo_id) {
- 	case SCBRR_ALGO_1:
- 		return freq / (16 * bps);
- 	case SCBRR_ALGO_2:
-@@ -1843,12 +1847,11 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
- 
- 	baud = uart_get_baud_rate(port, termios, old, 0, max_baud);
- 	if (likely(baud && port->uartclk)) {
--		if (s->cfg->scbrr_algo_id == SCBRR_ALGO_6) {
-+		if (s->cfg->type == PORT_HSCIF) {
- 			sci_baud_calc_hscif(baud, port->uartclk, &t, &srr,
- 					    &cks);
- 		} else {
--			t = sci_scbrr_calc(s->cfg->scbrr_algo_id, baud,
--					   port->uartclk);
-+			t = sci_scbrr_calc(s, baud, port->uartclk);
- 			for (cks = 0; t >= 256 && cks <= 3; cks++)
- 				t >>= 2;
- 		}
-@@ -2092,6 +2095,7 @@ static int sci_init_single(struct platform_device *dev,
- {
- 	struct uart_port *port = &sci_port->port;
- 	const struct resource *res;
-+	unsigned int sampling_rate;
- 	unsigned int i;
- 	int ret;
- 
-@@ -2143,28 +2147,47 @@ static int sci_init_single(struct platform_device *dev,
- 	case PORT_SCIFB:
- 		port->fifosize = 256;
- 		sci_port->overrun_bit = 9;
-+		sampling_rate = 16;
- 		break;
- 	case PORT_HSCIF:
- 		port->fifosize = 128;
-+		sampling_rate = 0;
- 		sci_port->overrun_bit = 0;
- 		break;
- 	case PORT_SCIFA:
- 		port->fifosize = 64;
- 		sci_port->overrun_bit = 9;
-+		sampling_rate = 16;
- 		break;
- 	case PORT_SCIF:
- 		port->fifosize = 16;
--		if (p->regtype == SCIx_SH7705_SCIF_REGTYPE)
-+		if (p->regtype == SCIx_SH7705_SCIF_REGTYPE) {
- 			sci_port->overrun_bit = 9;
--		else
-+			sampling_rate = 16;
-+		} else {
- 			sci_port->overrun_bit = 0;
-+			sampling_rate = 32;
-+		}
- 		break;
- 	default:
- 		port->fifosize = 1;
- 		sci_port->overrun_bit = 5;
-+		sampling_rate = 32;
- 		break;
- 	}
- 
-+	/* Set the sampling rate if the baud rate calculation algorithm isn't
-+	 * specified.
-+	 */
-+	if (p->scbrr_algo_id == SCBRR_ALGO_NONE) {
-+		/* SCIFA on sh7723 and sh7724 need a custom sampling rate that
-+		 * doesn't match the SoC datasheet, this should be investigated.
-+		 * Let platform data override the sampling rate for now.
-+		 */
-+		sci_port->sampling_rate = p->sampling_rate ? p->sampling_rate
-+					: sampling_rate;
-+	}
-+
- 	if (!early) {
- 		sci_port->iclk = clk_get(&dev->dev, "sci_ick");
- 		if (IS_ERR(sci_port->iclk)) {
-diff --git a/include/linux/serial_sci.h b/include/linux/serial_sci.h
-index efd4727ccd67..0bac5628e650 100644
---- a/include/linux/serial_sci.h
-+++ b/include/linux/serial_sci.h
-@@ -11,6 +11,7 @@
- #define SCIx_NOT_SUPPORTED	(-1)
- 
- enum {
-+	SCBRR_ALGO_NONE,	/* Compute sampling rate in the driver */
- 	SCBRR_ALGO_1,		/* clk / (16 * bps) */
- 	SCBRR_ALGO_2,		/* DIV_ROUND_CLOSEST(clk, 32 * bps) - 1 */
- 	SCBRR_ALGO_3,		/* clk / (8 * bps) */
-@@ -134,6 +135,7 @@ struct plat_sci_port {
- 	upf_t		flags;			/* UPF_* flags */
- 	unsigned long	capabilities;		/* Port features/capabilities */
- 
-+	unsigned int	sampling_rate;
- 	unsigned int	scbrr_algo_id;		/* SCBRR calculation algo */
- 	unsigned int	scscr;			/* SCSCR initialization */
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0028-drm-rcar-du-Fix-buffer-pitch-alignment-for-R8A7790-D.patch b/patches.renesas/0028-drm-rcar-du-Fix-buffer-pitch-alignment-for-R8A7790-D.patch
deleted file mode 100644
index 05218bb71a8e1..0000000000000
--- a/patches.renesas/0028-drm-rcar-du-Fix-buffer-pitch-alignment-for-R8A7790-D.patch
+++ /dev/null
@@ -1,91 +0,0 @@
-From 7e426b11a2c7fdfe41cb7301e1a22975cd48216e Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 14 Jun 2013 20:52:52 +0200
-Subject: drm/rcar-du: Fix buffer pitch alignment for R8A7790 DU
-
-The R8A7790 DU seems to require a 128 bytes pitch alignment, even though
-the documentation only mentions a 16 pixels alignement as for the
-R8A7779 DU. Make this configurable through a device flag.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit 9e2d2de9e8107643ba50debc475fc966d3f77364)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/rcar-du/rcar_du_drv.c |  2 +-
- drivers/gpu/drm/rcar-du/rcar_du_drv.h |  1 +
- drivers/gpu/drm/rcar-du/rcar_du_kms.c | 17 ++++++++++++++---
- 3 files changed, 16 insertions(+), 4 deletions(-)
-
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.c b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-index dc4c07e02d8c..ce0de4d1260a 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-@@ -216,7 +216,7 @@ static const struct rcar_du_device_info rcar_du_r8a7779_info = {
- };
- 
- static const struct rcar_du_device_info rcar_du_r8a7790_info = {
--	.features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK,
-+	.features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK | RCAR_DU_FEATURE_ALIGN_128B,
- };
- 
- static const struct platform_device_id rcar_du_id_table[] = {
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.h b/drivers/gpu/drm/rcar-du/rcar_du_drv.h
-index 5b57a2f9b52a..072e28e09484 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_drv.h
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.h
-@@ -26,6 +26,7 @@ struct drm_device;
- struct rcar_du_device;
- 
- #define RCAR_DU_FEATURE_CRTC_IRQ_CLOCK	(1 << 0)	/* Per-CRTC IRQ and clock */
-+#define RCAR_DU_FEATURE_ALIGN_128B	(1 << 1)	/* Align pitches to 128 bytes */
- 
- /*
-  * struct rcar_du_device_info - DU model-specific information
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms.c b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
-index 845bcb384863..418d902bc88d 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_kms.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
-@@ -111,11 +111,18 @@ const struct rcar_du_format_info *rcar_du_format_info(u32 fourcc)
- int rcar_du_dumb_create(struct drm_file *file, struct drm_device *dev,
- 			struct drm_mode_create_dumb *args)
- {
-+	struct rcar_du_device *rcdu = dev->dev_private;
- 	unsigned int min_pitch = DIV_ROUND_UP(args->width * args->bpp, 8);
- 	unsigned int align;
- 
--	/* The pitch must be aligned to a 16 pixels boundary. */
--	align = 16 * args->bpp / 8;
-+	/* The R8A7779 DU requires a 16 pixels pitch alignment as documented,
-+	 * but the R8A7790 DU seems to require a 128 bytes pitch alignment.
-+	 */
-+	if (rcar_du_has(rcdu, RCAR_DU_FEATURE_ALIGN_128B))
-+		align = 128;
-+	else
-+		align = 16 * args->bpp / 8;
-+
- 	args->pitch = roundup(max(args->pitch, min_pitch), align);
- 
- 	return drm_gem_cma_dumb_create(file, dev, args);
-@@ -125,6 +132,7 @@ static struct drm_framebuffer *
- rcar_du_fb_create(struct drm_device *dev, struct drm_file *file_priv,
- 		  struct drm_mode_fb_cmd2 *mode_cmd)
- {
-+	struct rcar_du_device *rcdu = dev->dev_private;
- 	const struct rcar_du_format_info *format;
- 	unsigned int align;
- 
-@@ -135,7 +143,10 @@ rcar_du_fb_create(struct drm_device *dev, struct drm_file *file_priv,
- 		return ERR_PTR(-EINVAL);
- 	}
- 
--	align = 16 * format->bpp / 8;
-+	if (rcar_du_has(rcdu, RCAR_DU_FEATURE_ALIGN_128B))
-+		align = 128;
-+	else
-+		align = 16 * format->bpp / 8;
- 
- 	if (mode_cmd->pitches[0] & (align - 1) ||
- 	    mode_cmd->pitches[0] >= 8192) {
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0028-gpio-rcar-Add-interrupt-controller-support-to-the-DT.patch b/patches.renesas/0028-gpio-rcar-Add-interrupt-controller-support-to-the-DT.patch
deleted file mode 100644
index 006803a8feeb2..0000000000000
--- a/patches.renesas/0028-gpio-rcar-Add-interrupt-controller-support-to-the-DT.patch
+++ /dev/null
@@ -1,50 +0,0 @@
-From 3971223c8f243c9fd662644b64ee3116efc61b42 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 4 Jul 2013 19:44:39 +0200
-Subject: gpio-rcar: Add interrupt controller support to the DT bindings
-
-Update the DT bindings documentation with the interrupt-controller
-and #interrupt-cells properties.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-(cherry picked from commit f8b1bd71d0c5c9fdcd4458c1688208eaf06a26fb)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt | 8 ++++++++
- 1 file changed, 8 insertions(+)
-
-diff --git a/Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt b/Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt
-index cb3dc7bc..8655df94 100644
---- a/Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt
-+++ b/Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt
-@@ -23,6 +23,10 @@ Required Properties:
- Please refer to gpio.txt in this directory for details of gpio-ranges property
- and the common GPIO bindings used by client devices.
- 
-+The GPIO controller also acts as an interrupt controller. It uses the default
-+two cells specifier as described in Documentation/devicetree/bindings/
-+interrupt-controller/interrupts.txt.
-+
- Example: R8A7779 (R-Car H1) GPIO controller nodes
- 
- 	gpio0: gpio@ffc40000 {
-@@ -33,6 +37,8 @@ Example: R8A7779 (R-Car H1) GPIO controller nodes
- 		#gpio-cells = <2>;
- 		gpio-controller;
- 		gpio-ranges = <&pfc 0 0 32>;
-+		interrupt-controller;
-+		#interrupt-cells = <2>;
- 	};
- 	...
- 	gpio6: gpio@ffc46000 {
-@@ -43,4 +49,6 @@ Example: R8A7779 (R-Car H1) GPIO controller nodes
- 		#gpio-cells = <2>;
- 		gpio-controller;
- 		gpio-ranges = <&pfc 0 192 9>;
-+		interrupt-controller;
-+		#interrupt-cells = <2>;
- 	};
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0028-serial-sh-sci-Remove-platform-data-scbrr_algo_id-fie.patch b/patches.renesas/0028-serial-sh-sci-Remove-platform-data-scbrr_algo_id-fie.patch
deleted file mode 100644
index 986fa508e63ab..0000000000000
--- a/patches.renesas/0028-serial-sh-sci-Remove-platform-data-scbrr_algo_id-fie.patch
+++ /dev/null
@@ -1,94 +0,0 @@
-From ea3cd86985c620f8730f48d547c4a96ec81e4dfb Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 6 Dec 2013 10:59:51 +0100
-Subject: serial: sh-sci: Remove platform data scbrr_algo_id field
-
-The field isn't set by any board, remote it.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 878fbb91399df0d37e0183890b0ad6aeb63590fe)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/tty/serial/sh-sci.c | 26 +++++---------------------
- include/linux/serial_sci.h  | 10 ----------
- 2 files changed, 5 insertions(+), 31 deletions(-)
-
-diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
-index 35e3225714bc..abbecfe72dc2 100644
---- a/drivers/tty/serial/sh-sci.c
-+++ b/drivers/tty/serial/sh-sci.c
-@@ -1757,17 +1757,6 @@ static unsigned int sci_scbrr_calc(struct sci_port *s, unsigned int bps,
- 	if (s->sampling_rate)
- 		return DIV_ROUND_CLOSEST(freq, s->sampling_rate * bps) - 1;
- 
--	switch (s->cfg->scbrr_algo_id) {
--	case SCBRR_ALGO_1:
--		return freq / (16 * bps);
--	case SCBRR_ALGO_2:
--		return DIV_ROUND_CLOSEST(freq, 32 * bps) - 1;
--	case SCBRR_ALGO_3:
--		return freq / (8 * bps);
--	case SCBRR_ALGO_4:
--		return DIV_ROUND_CLOSEST(freq, 16 * bps) - 1;
--	}
--
- 	/* Warn, but use a safe default */
- 	WARN_ON(1);
- 
-@@ -2176,17 +2165,12 @@ static int sci_init_single(struct platform_device *dev,
- 		break;
- 	}
- 
--	/* Set the sampling rate if the baud rate calculation algorithm isn't
--	 * specified.
-+	/* SCIFA on sh7723 and sh7724 need a custom sampling rate that doesn't
-+	 * match the SoC datasheet, this should be investigated. Let platform
-+	 * data override the sampling rate for now.
- 	 */
--	if (p->scbrr_algo_id == SCBRR_ALGO_NONE) {
--		/* SCIFA on sh7723 and sh7724 need a custom sampling rate that
--		 * doesn't match the SoC datasheet, this should be investigated.
--		 * Let platform data override the sampling rate for now.
--		 */
--		sci_port->sampling_rate = p->sampling_rate ? p->sampling_rate
--					: sampling_rate;
--	}
-+	sci_port->sampling_rate = p->sampling_rate ? p->sampling_rate
-+				: sampling_rate;
- 
- 	if (!early) {
- 		sci_port->iclk = clk_get(&dev->dev, "sci_ick");
-diff --git a/include/linux/serial_sci.h b/include/linux/serial_sci.h
-index 0bac5628e650..5baf4fabdf99 100644
---- a/include/linux/serial_sci.h
-+++ b/include/linux/serial_sci.h
-@@ -10,15 +10,6 @@
- 
- #define SCIx_NOT_SUPPORTED	(-1)
- 
--enum {
--	SCBRR_ALGO_NONE,	/* Compute sampling rate in the driver */
--	SCBRR_ALGO_1,		/* clk / (16 * bps) */
--	SCBRR_ALGO_2,		/* DIV_ROUND_CLOSEST(clk, 32 * bps) - 1 */
--	SCBRR_ALGO_3,		/* clk / (8 * bps) */
--	SCBRR_ALGO_4,		/* DIV_ROUND_CLOSEST(clk, 16 * bps) - 1 */
--	SCBRR_ALGO_6,		/* HSCIF variable sample rate algorithm */
--};
--
- #define SCSCR_TIE	(1 << 7)
- #define SCSCR_RIE	(1 << 6)
- #define SCSCR_TE	(1 << 5)
-@@ -136,7 +127,6 @@ struct plat_sci_port {
- 	unsigned long	capabilities;		/* Port features/capabilities */
- 
- 	unsigned int	sampling_rate;
--	unsigned int	scbrr_algo_id;		/* SCBRR calculation algo */
- 	unsigned int	scscr;			/* SCSCR initialization */
- 
- 	/*
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0029-drm-rcar-du-Add-support-for-multiple-groups.patch b/patches.renesas/0029-drm-rcar-du-Add-support-for-multiple-groups.patch
deleted file mode 100644
index 1447964ca222f..0000000000000
--- a/patches.renesas/0029-drm-rcar-du-Add-support-for-multiple-groups.patch
+++ /dev/null
@@ -1,307 +0,0 @@
-From ee77ac8b69f422b13783b62a62651e3a0b59fad1 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Mon, 17 Jun 2013 00:29:25 +0200
-Subject: drm/rcar-du: Add support for multiple groups
-
-The R8A7790 DU has 3 CRTCs, split in two groups. Support them.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit a5f0ef593c4a130f5f5cd4cd506af946e32dd509)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/rcar-du/rcar_du_crtc.c  | 25 ++++++++++---------
- drivers/gpu/drm/rcar-du/rcar_du_drv.c   |  2 ++
- drivers/gpu/drm/rcar-du/rcar_du_drv.h   |  6 +++--
- drivers/gpu/drm/rcar-du/rcar_du_group.c |  4 +--
- drivers/gpu/drm/rcar-du/rcar_du_group.h |  3 +++
- drivers/gpu/drm/rcar-du/rcar_du_kms.c   | 43 ++++++++++++++++++++++++---------
- drivers/gpu/drm/rcar-du/rcar_du_plane.c |  6 +++--
- drivers/gpu/drm/rcar-du/rcar_du_regs.h  |  4 ++-
- 8 files changed, 63 insertions(+), 30 deletions(-)
-
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
-index 6a2b9590bb74..a340224e08e6 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
-@@ -91,7 +91,6 @@ static void rcar_du_crtc_put(struct rcar_du_crtc *rcrtc)
- static void rcar_du_crtc_set_display_timing(struct rcar_du_crtc *rcrtc)
- {
- 	const struct drm_display_mode *mode = &rcrtc->crtc.mode;
--	struct rcar_du_device *rcdu = rcrtc->group->dev;
- 	unsigned long clk;
- 	u32 value;
- 	u32 div;
-@@ -101,9 +100,9 @@ static void rcar_du_crtc_set_display_timing(struct rcar_du_crtc *rcrtc)
- 	div = DIV_ROUND_CLOSEST(clk, mode->clock * 1000);
- 	div = clamp(div, 1U, 64U) - 1;
- 
--	rcar_du_write(rcdu, rcrtc->index ? ESCR2 : ESCR,
--		      ESCR_DCLKSEL_CLKS | div);
--	rcar_du_write(rcdu, rcrtc->index ? OTAR2 : OTAR, 0);
-+	rcar_du_group_write(rcrtc->group, rcrtc->index % 2 ? ESCR2 : ESCR,
-+			    ESCR_DCLKSEL_CLKS | div);
-+	rcar_du_group_write(rcrtc->group, rcrtc->index % 2 ? OTAR2 : OTAR, 0);
- 
- 	/* Signal polarities */
- 	value = ((mode->flags & DRM_MODE_FLAG_PVSYNC) ? 0 : DSMR_VSL)
-@@ -143,7 +142,6 @@ void rcar_du_crtc_route_output(struct drm_crtc *crtc, unsigned int output)
- void rcar_du_crtc_update_planes(struct drm_crtc *crtc)
- {
- 	struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);
--	struct rcar_du_device *rcdu = rcrtc->group->dev;
- 	struct rcar_du_plane *planes[RCAR_DU_NUM_HW_PLANES];
- 	unsigned int num_planes = 0;
- 	unsigned int prio = 0;
-@@ -189,8 +187,8 @@ void rcar_du_crtc_update_planes(struct drm_crtc *crtc)
- 	/* Select display timing and dot clock generator 2 for planes associated
- 	 * with superposition controller 2.
- 	 */
--	if (rcrtc->index) {
--		u32 value = rcar_du_read(rcdu, DPTSR);
-+	if (rcrtc->index % 2) {
-+		u32 value = rcar_du_group_read(rcrtc->group, DPTSR);
- 
- 		/* The DPTSR register is updated when the display controller is
- 		 * stopped. We thus need to restart the DU. Once again, sorry
-@@ -200,13 +198,14 @@ void rcar_du_crtc_update_planes(struct drm_crtc *crtc)
- 		 * occur only if we need to break the pre-association.
- 		 */
- 		if (value != dptsr) {
--			rcar_du_write(rcdu, DPTSR, dptsr);
-+			rcar_du_group_write(rcrtc->group, DPTSR, dptsr);
- 			if (rcrtc->group->used_crtcs)
- 				rcar_du_group_restart(rcrtc->group);
- 		}
- 	}
- 
--	rcar_du_write(rcdu, rcrtc->index ? DS2PR : DS1PR, dspr);
-+	rcar_du_group_write(rcrtc->group, rcrtc->index % 2 ? DS2PR : DS1PR,
-+			    dspr);
- }
- 
- static void rcar_du_crtc_start(struct rcar_du_crtc *rcrtc)
-@@ -528,6 +527,10 @@ static const struct drm_crtc_funcs crtc_funcs = {
- 
- int rcar_du_crtc_create(struct rcar_du_group *rgrp, unsigned int index)
- {
-+	static const unsigned int mmio_offsets[] = {
-+		DU0_REG_OFFSET, DU1_REG_OFFSET, DU2_REG_OFFSET
-+	};
-+
- 	struct rcar_du_device *rcdu = rgrp->dev;
- 	struct platform_device *pdev = to_platform_device(rcdu->dev);
- 	struct rcar_du_crtc *rcrtc = &rcdu->crtcs[index];
-@@ -553,10 +556,10 @@ int rcar_du_crtc_create(struct rcar_du_group *rgrp, unsigned int index)
- 	}
- 
- 	rcrtc->group = rgrp;
--	rcrtc->mmio_offset = index ? DISP2_REG_OFFSET : 0;
-+	rcrtc->mmio_offset = mmio_offsets[index];
- 	rcrtc->index = index;
- 	rcrtc->dpms = DRM_MODE_DPMS_OFF;
--	rcrtc->plane = &rgrp->planes.planes[index];
-+	rcrtc->plane = &rgrp->planes.planes[index % 2];
- 
- 	rcrtc->plane->crtc = crtc;
- 
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.c b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-index ce0de4d1260a..f3a2b52d6853 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-@@ -213,10 +213,12 @@ static int rcar_du_remove(struct platform_device *pdev)
- 
- static const struct rcar_du_device_info rcar_du_r8a7779_info = {
- 	.features = 0,
-+	.num_crtcs = 2,
- };
- 
- static const struct rcar_du_device_info rcar_du_r8a7790_info = {
- 	.features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK | RCAR_DU_FEATURE_ALIGN_128B,
-+	.num_crtcs = 3,
- };
- 
- static const struct platform_device_id rcar_du_id_table[] = {
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.h b/drivers/gpu/drm/rcar-du/rcar_du_drv.h
-index 072e28e09484..160e5eb8f29d 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_drv.h
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.h
-@@ -31,9 +31,11 @@ struct rcar_du_device;
- /*
-  * struct rcar_du_device_info - DU model-specific information
-  * @features: device features (RCAR_DU_FEATURE_*)
-+ * @num_crtcs: total number of CRTCs
-  */
- struct rcar_du_device_info {
- 	unsigned int features;
-+	unsigned int num_crtcs;
- };
- 
- struct rcar_du_device {
-@@ -45,10 +47,10 @@ struct rcar_du_device {
- 
- 	struct drm_device *ddev;
- 
--	struct rcar_du_crtc crtcs[2];
-+	struct rcar_du_crtc crtcs[3];
- 	unsigned int num_crtcs;
- 
--	struct rcar_du_group group;
-+	struct rcar_du_group groups[2];
- };
- 
- static inline bool rcar_du_has(struct rcar_du_device *rcdu,
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_group.c b/drivers/gpu/drm/rcar-du/rcar_du_group.c
-index 7e754515bba8..0eb106efffc9 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_group.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_group.c
-@@ -33,12 +33,12 @@
- #include "rcar_du_group.h"
- #include "rcar_du_regs.h"
- 
--static u32 rcar_du_group_read(struct rcar_du_group *rgrp, u32 reg)
-+u32 rcar_du_group_read(struct rcar_du_group *rgrp, u32 reg)
- {
- 	return rcar_du_read(rgrp->dev, rgrp->mmio_offset + reg);
- }
- 
--static void rcar_du_group_write(struct rcar_du_group *rgrp, u32 reg, u32 data)
-+void rcar_du_group_write(struct rcar_du_group *rgrp, u32 reg, u32 data)
- {
- 	rcar_du_write(rgrp->dev, rgrp->mmio_offset + reg, data);
- }
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_group.h b/drivers/gpu/drm/rcar-du/rcar_du_group.h
-index 180c739812c9..4487e83fb2c1 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_group.h
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_group.h
-@@ -38,6 +38,9 @@ struct rcar_du_group {
- 	struct rcar_du_planes planes;
- };
- 
-+u32 rcar_du_group_read(struct rcar_du_group *rgrp, u32 reg);
-+void rcar_du_group_write(struct rcar_du_group *rgrp, u32 reg, u32 data);
-+
- int rcar_du_group_get(struct rcar_du_group *rgrp);
- void rcar_du_group_put(struct rcar_du_group *rgrp);
- void rcar_du_group_start_stop(struct rcar_du_group *rgrp, bool start);
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms.c b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
-index 418d902bc88d..816963ca1626 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_kms.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
-@@ -172,8 +172,13 @@ static const struct drm_mode_config_funcs rcar_du_mode_config_funcs = {
- 
- int rcar_du_modeset_init(struct rcar_du_device *rcdu)
- {
-+	static const unsigned int mmio_offsets[] = {
-+		DU0_REG_OFFSET, DU2_REG_OFFSET
-+	};
-+
- 	struct drm_device *dev = rcdu->ddev;
- 	struct drm_encoder *encoder;
-+	unsigned int num_groups;
- 	unsigned int i;
- 	int ret;
- 
-@@ -185,22 +190,33 @@ int rcar_du_modeset_init(struct rcar_du_device *rcdu)
- 	rcdu->ddev->mode_config.max_height = 2047;
- 	rcdu->ddev->mode_config.funcs = &rcar_du_mode_config_funcs;
- 
--	rcdu->group.dev = rcdu;
--	rcdu->group.index = 0;
--	rcdu->group.used_crtcs = 0;
-+	rcdu->num_crtcs = rcdu->info->num_crtcs;
-+
-+	/* Initialize the groups. */
-+	num_groups = DIV_ROUND_UP(rcdu->num_crtcs, 2);
-+
-+	for (i = 0; i < num_groups; ++i) {
-+		struct rcar_du_group *rgrp = &rcdu->groups[i];
- 
--	ret = rcar_du_planes_init(&rcdu->group);
--	if (ret < 0)
--		return ret;
-+		rgrp->dev = rcdu;
-+		rgrp->mmio_offset = mmio_offsets[i];
-+		rgrp->index = i;
- 
--	for (i = 0; i < ARRAY_SIZE(rcdu->crtcs); ++i) {
--		ret = rcar_du_crtc_create(&rcdu->group, i);
-+		ret = rcar_du_planes_init(rgrp);
- 		if (ret < 0)
- 			return ret;
- 	}
- 
--	rcdu->num_crtcs = i;
-+	/* Create the CRTCs. */
-+	for (i = 0; i < rcdu->num_crtcs; ++i) {
-+		struct rcar_du_group *rgrp = &rcdu->groups[i / 2];
-+
-+		ret = rcar_du_crtc_create(rgrp, i);
-+		if (ret < 0)
-+			return ret;
-+	}
- 
-+	/* Initialize the encoders. */
- 	for (i = 0; i < rcdu->pdata->num_encoders; ++i) {
- 		const struct rcar_du_encoder_data *pdata =
- 			&rcdu->pdata->encoders[i];
-@@ -229,9 +245,12 @@ int rcar_du_modeset_init(struct rcar_du_device *rcdu)
- 		encoder->possible_clones = 1 << 0;
- 	}
- 
--	ret = rcar_du_planes_register(&rcdu->group);
--	if (ret < 0)
--		return ret;
-+	/* Now that the CRTCs have been initialized register the planes. */
-+	for (i = 0; i < num_groups; ++i) {
-+		ret = rcar_du_planes_register(&rcdu->groups[i]);
-+		if (ret < 0)
-+			return ret;
-+	}
- 
- 	drm_kms_helper_poll_init(rcdu->ddev);
- 
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_plane.c b/drivers/gpu/drm/rcar-du/rcar_du_plane.c
-index 1e9cf7c92f8e..53000644733f 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_plane.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_plane.c
-@@ -480,9 +480,12 @@ int rcar_du_planes_register(struct rcar_du_group *rgrp)
- {
- 	struct rcar_du_planes *planes = &rgrp->planes;
- 	struct rcar_du_device *rcdu = rgrp->dev;
-+	unsigned int crtcs;
- 	unsigned int i;
- 	int ret;
- 
-+	crtcs = ((1 << rcdu->num_crtcs) - 1) & (3 << (2 * rgrp->index));
-+
- 	for (i = 0; i < RCAR_DU_NUM_KMS_PLANES; ++i) {
- 		struct rcar_du_kms_plane *plane;
- 
-@@ -493,8 +496,7 @@ int rcar_du_planes_register(struct rcar_du_group *rgrp)
- 		plane->hwplane = &planes->planes[i + 2];
- 		plane->hwplane->zpos = 1;
- 
--		ret = drm_plane_init(rcdu->ddev, &plane->plane,
--				     (1 << rcdu->num_crtcs) - 1,
-+		ret = drm_plane_init(rcdu->ddev, &plane->plane, crtcs,
- 				     &rcar_du_plane_funcs, formats,
- 				     ARRAY_SIZE(formats), false);
- 		if (ret < 0)
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_regs.h b/drivers/gpu/drm/rcar-du/rcar_du_regs.h
-index f62a9f36041a..73f7347f740b 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_regs.h
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_regs.h
-@@ -13,7 +13,9 @@
- #ifndef __RCAR_DU_REGS_H__
- #define __RCAR_DU_REGS_H__
- 
--#define DISP2_REG_OFFSET	 0x30000
-+#define DU0_REG_OFFSET		0x00000
-+#define DU1_REG_OFFSET		0x30000
-+#define DU2_REG_OFFSET		0x40000
- 
- /* -----------------------------------------------------------------------------
-  * Display Control Registers
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0029-i2c-rcar-add-rcar-H2-support.patch b/patches.renesas/0029-i2c-rcar-add-rcar-H2-support.patch
deleted file mode 100644
index e55f3804bf7a7..0000000000000
--- a/patches.renesas/0029-i2c-rcar-add-rcar-H2-support.patch
+++ /dev/null
@@ -1,119 +0,0 @@
-From 5f7b9de412f8b01431f539cd0c4488b315c0c8c6 Mon Sep 17 00:00:00 2001
-From: Nguyen Viet Dung <nv-dung@jinso.co.jp>
-Date: Tue, 3 Sep 2013 09:09:25 +0900
-Subject: i2c: rcar: add rcar-H2 support
-
-This patch modify I2C driver of rcar-H1 to usable on both rcar-H1 and rcar-H2.
-
-Signed-off-by: Nguyen Viet Dung <nv-dung@jinso.co.jp>
-Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-(cherry picked from commit b720423a2627f045133bec39a31fe2bc0dab86f3)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/i2c/busses/i2c-rcar.c | 35 +++++++++++++++++++++++++++++++++--
- 1 file changed, 33 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/i2c/busses/i2c-rcar.c b/drivers/i2c/busses/i2c-rcar.c
-index 4ba4a95b..18e03373 100644
---- a/drivers/i2c/busses/i2c-rcar.c
-+++ b/drivers/i2c/busses/i2c-rcar.c
-@@ -101,6 +101,11 @@ enum {
- #define ID_ARBLOST	(1 << 3)
- #define ID_NACK		(1 << 4)
- 
-+enum rcar_i2c_type {
-+	I2C_RCAR_H1,
-+	I2C_RCAR_H2,
-+};
-+
- struct rcar_i2c_priv {
- 	void __iomem *io;
- 	struct i2c_adapter adap;
-@@ -113,6 +118,7 @@ struct rcar_i2c_priv {
- 	int irq;
- 	u32 icccr;
- 	u32 flags;
-+	enum rcar_i2c_type	devtype;
- };
- 
- #define rcar_i2c_priv_to_dev(p)		((p)->adap.dev.parent)
-@@ -224,12 +230,25 @@ static int rcar_i2c_clock_calculate(struct rcar_i2c_priv *priv,
- 	u32 scgd, cdf;
- 	u32 round, ick;
- 	u32 scl;
-+	u32 cdf_width;
- 
- 	if (!clkp) {
- 		dev_err(dev, "there is no peripheral_clk\n");
- 		return -EIO;
- 	}
- 
-+	switch (priv->devtype) {
-+	case I2C_RCAR_H1:
-+		cdf_width = 2;
-+		break;
-+	case I2C_RCAR_H2:
-+		cdf_width = 3;
-+		break;
-+	default:
-+		dev_err(dev, "device type error\n");
-+		return -EIO;
-+	}
-+
- 	/*
- 	 * calculate SCL clock
- 	 * see
-@@ -245,7 +264,7 @@ static int rcar_i2c_clock_calculate(struct rcar_i2c_priv *priv,
- 	 * clkp : peripheral_clk
- 	 * F[]  : integer up-valuation
- 	 */
--	for (cdf = 0; cdf < 4; cdf++) {
-+	for (cdf = 0; cdf < (1 << cdf_width); cdf++) {
- 		ick = clk_get_rate(clkp) / (1 + cdf);
- 		if (ick < 20000000)
- 			goto ick_find;
-@@ -287,7 +306,7 @@ scgd_find:
- 	/*
- 	 * keep icccr value
- 	 */
--	priv->icccr = (scgd << 2 | cdf);
-+	priv->icccr = (scgd << (cdf_width) | cdf);
- 
- 	return 0;
- }
-@@ -638,6 +657,9 @@ static int rcar_i2c_probe(struct platform_device *pdev)
- 	bus_speed = 100000; /* default 100 kHz */
- 	if (pdata && pdata->bus_speed)
- 		bus_speed = pdata->bus_speed;
-+
-+	priv->devtype = platform_get_device_id(pdev)->driver_data;
-+
- 	ret = rcar_i2c_clock_calculate(priv, bus_speed, dev);
- 	if (ret < 0)
- 		return ret;
-@@ -691,6 +713,14 @@ static int rcar_i2c_remove(struct platform_device *pdev)
- 	return 0;
- }
- 
-+static struct platform_device_id rcar_i2c_id_table[] = {
-+	{ "i2c-rcar",		I2C_RCAR_H1 },
-+	{ "i2c-rcar_h1",	I2C_RCAR_H1 },
-+	{ "i2c-rcar_h2",	I2C_RCAR_H2 },
-+	{},
-+};
-+MODULE_DEVICE_TABLE(platform, rcar_i2c_id_table);
-+
- static struct platform_driver rcar_i2c_driver = {
- 	.driver	= {
- 		.name	= "i2c-rcar",
-@@ -698,6 +728,7 @@ static struct platform_driver rcar_i2c_driver = {
- 	},
- 	.probe		= rcar_i2c_probe,
- 	.remove		= rcar_i2c_remove,
-+	.id_table	= rcar_i2c_id_table,
- };
- 
- module_platform_driver(rcar_i2c_driver);
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0029-serial-sh-sci-Remove-platform-data-mapbase-and-irqs-.patch b/patches.renesas/0029-serial-sh-sci-Remove-platform-data-mapbase-and-irqs-.patch
deleted file mode 100644
index d9e687767851f..0000000000000
--- a/patches.renesas/0029-serial-sh-sci-Remove-platform-data-mapbase-and-irqs-.patch
+++ /dev/null
@@ -1,154 +0,0 @@
-From eb41cd42279e452f7347db23c4d8a8c5bb945c24 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 6 Dec 2013 10:59:52 +0100
-Subject: serial: sh-sci: Remove platform data mapbase and irqs fields
-
-The fields are not used anymore by board files, remove them.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 89b5c1ab94a1cea921d8a280de0a483d71af5091)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/tty/serial/sh-sci.c | 60 +++++++++++++++++++++++++--------------------
- include/linux/serial_sci.h  | 26 --------------------
- 2 files changed, 34 insertions(+), 52 deletions(-)
-
-diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
-index abbecfe72dc2..795f2a284a24 100644
---- a/drivers/tty/serial/sh-sci.c
-+++ b/drivers/tty/serial/sh-sci.c
-@@ -58,6 +58,23 @@
- 
- #include "sh-sci.h"
- 
-+/* Offsets into the sci_port->irqs array */
-+enum {
-+	SCIx_ERI_IRQ,
-+	SCIx_RXI_IRQ,
-+	SCIx_TXI_IRQ,
-+	SCIx_BRI_IRQ,
-+	SCIx_NR_IRQS,
-+
-+	SCIx_MUX_IRQ = SCIx_NR_IRQS,	/* special case */
-+};
-+
-+#define SCIx_IRQ_IS_MUXED(port)			\
-+	((port)->irqs[SCIx_ERI_IRQ] ==	\
-+	 (port)->irqs[SCIx_RXI_IRQ]) ||	\
-+	((port)->irqs[SCIx_ERI_IRQ] &&	\
-+	 ((port)->irqs[SCIx_RXI_IRQ] < 0))
-+
- struct sci_port {
- 	struct uart_port	port;
- 
-@@ -2094,36 +2111,27 @@ static int sci_init_single(struct platform_device *dev,
- 	port->iotype	= UPIO_MEM;
- 	port->line	= index;
- 
--	if (dev->num_resources) {
--		/* Device has resources, use them. */
--		res = platform_get_resource(dev, IORESOURCE_MEM, 0);
--		if (res == NULL)
--			return -ENOMEM;
-+	res = platform_get_resource(dev, IORESOURCE_MEM, 0);
-+	if (res == NULL)
-+		return -ENOMEM;
- 
--		port->mapbase = res->start;
-+	port->mapbase = res->start;
- 
--		for (i = 0; i < ARRAY_SIZE(sci_port->irqs); ++i)
--			sci_port->irqs[i] = platform_get_irq(dev, i);
-+	for (i = 0; i < ARRAY_SIZE(sci_port->irqs); ++i)
-+		sci_port->irqs[i] = platform_get_irq(dev, i);
- 
--		/* The SCI generates several interrupts. They can be muxed
--		 * together or connected to different interrupt lines. In the
--		 * muxed case only one interrupt resource is specified. In the
--		 * non-muxed case three or four interrupt resources are
--		 * specified, as the BRI interrupt is optional.
--		 */
--		if (sci_port->irqs[0] < 0)
--			return -ENXIO;
-+	/* The SCI generates several interrupts. They can be muxed together or
-+	 * connected to different interrupt lines. In the muxed case only one
-+	 * interrupt resource is specified. In the non-muxed case three or four
-+	 * interrupt resources are specified, as the BRI interrupt is optional.
-+	 */
-+	if (sci_port->irqs[0] < 0)
-+		return -ENXIO;
- 
--		if (sci_port->irqs[1] < 0) {
--			sci_port->irqs[1] = sci_port->irqs[0];
--			sci_port->irqs[2] = sci_port->irqs[0];
--			sci_port->irqs[3] = sci_port->irqs[0];
--		}
--	} else {
--		/* No resources, use old-style platform data. */
--		port->mapbase = p->mapbase;
--		for (i = 0; i < ARRAY_SIZE(sci_port->irqs); ++i)
--			sci_port->irqs[i] = p->irqs[i] ? p->irqs[i] : -ENXIO;
-+	if (sci_port->irqs[1] < 0) {
-+		sci_port->irqs[1] = sci_port->irqs[0];
-+		sci_port->irqs[2] = sci_port->irqs[0];
-+		sci_port->irqs[3] = sci_port->irqs[0];
- 	}
- 
- 	if (p->regtype == SCIx_PROBE_REGTYPE) {
-diff --git a/include/linux/serial_sci.h b/include/linux/serial_sci.h
-index 5baf4fabdf99..dcd0a2a59c12 100644
---- a/include/linux/serial_sci.h
-+++ b/include/linux/serial_sci.h
-@@ -50,17 +50,6 @@
- /* HSSRR HSCIF */
- #define HSCIF_SRE	0x8000
- 
--/* Offsets into the sci_port->irqs array */
--enum {
--	SCIx_ERI_IRQ,
--	SCIx_RXI_IRQ,
--	SCIx_TXI_IRQ,
--	SCIx_BRI_IRQ,
--	SCIx_NR_IRQS,
--
--	SCIx_MUX_IRQ = SCIx_NR_IRQS,	/* special case */
--};
--
- enum {
- 	SCIx_PROBE_REGTYPE,
- 
-@@ -79,19 +68,6 @@ enum {
- 	SCIx_NR_REGTYPES,
- };
- 
--#define SCIx_IRQ_MUXED(irq)		\
--{					\
--	[SCIx_ERI_IRQ]	= (irq),	\
--	[SCIx_RXI_IRQ]	= (irq),	\
--	[SCIx_TXI_IRQ]	= (irq),	\
--	[SCIx_BRI_IRQ]	= (irq),	\
--}
--
--#define SCIx_IRQ_IS_MUXED(port)			\
--	((port)->irqs[SCIx_ERI_IRQ] ==	\
--	 (port)->irqs[SCIx_RXI_IRQ]) ||	\
--	((port)->irqs[SCIx_ERI_IRQ] &&	\
--	 ((port)->irqs[SCIx_RXI_IRQ] < 0))
- /*
-  * SCI register subset common for all port types.
-  * Not all registers will exist on all parts.
-@@ -120,8 +96,6 @@ struct plat_sci_port_ops {
-  * Platform device specific platform_data struct
-  */
- struct plat_sci_port {
--	unsigned long	mapbase;		/* resource base */
--	unsigned int	irqs[SCIx_NR_IRQS];	/* ERI, RXI, TXI, BRI */
- 	unsigned int	type;			/* SCI / SCIF / IRDA / HSCIF */
- 	upf_t		flags;			/* UPF_* flags */
- 	unsigned long	capabilities;		/* Port features/capabilities */
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0030-drm-rcar-du-Add-support-for-DEFR8-register.patch b/patches.renesas/0030-drm-rcar-du-Add-support-for-DEFR8-register.patch
deleted file mode 100644
index 36d7119edda5b..0000000000000
--- a/patches.renesas/0030-drm-rcar-du-Add-support-for-DEFR8-register.patch
+++ /dev/null
@@ -1,58 +0,0 @@
-From 8625c92ccc2945bd89f2677b8ff599914f46b8fa Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Sat, 15 Jun 2013 02:40:57 +0200
-Subject: drm/rcar-du: Add support for DEFR8 register
-
-The R8A7790 DU has a new extended function control register. Support it.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit 38b62fb3808e6b57dbd7728e897e4f7674d1c998)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/rcar-du/rcar_du_drv.c   | 3 ++-
- drivers/gpu/drm/rcar-du/rcar_du_drv.h   | 1 +
- drivers/gpu/drm/rcar-du/rcar_du_group.c | 2 ++
- 3 files changed, 5 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.c b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-index f3a2b52d6853..f99aa52dc65c 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-@@ -217,7 +217,8 @@ static const struct rcar_du_device_info rcar_du_r8a7779_info = {
- };
- 
- static const struct rcar_du_device_info rcar_du_r8a7790_info = {
--	.features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK | RCAR_DU_FEATURE_ALIGN_128B,
-+	.features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK | RCAR_DU_FEATURE_ALIGN_128B
-+		  | RCAR_DU_FEATURE_DEFR8,
- 	.num_crtcs = 3,
- };
- 
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.h b/drivers/gpu/drm/rcar-du/rcar_du_drv.h
-index 160e5eb8f29d..70c335f51136 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_drv.h
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.h
-@@ -27,6 +27,7 @@ struct rcar_du_device;
- 
- #define RCAR_DU_FEATURE_CRTC_IRQ_CLOCK	(1 << 0)	/* Per-CRTC IRQ and clock */
- #define RCAR_DU_FEATURE_ALIGN_128B	(1 << 1)	/* Align pitches to 128 bytes */
-+#define RCAR_DU_FEATURE_DEFR8		(1 << 2)	/* Has DEFR8 register */
- 
- /*
-  * struct rcar_du_device_info - DU model-specific information
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_group.c b/drivers/gpu/drm/rcar-du/rcar_du_group.c
-index 0eb106efffc9..f3ba0ca845e2 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_group.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_group.c
-@@ -51,6 +51,8 @@ static void rcar_du_group_setup(struct rcar_du_group *rgrp)
- 	rcar_du_group_write(rgrp, DEFR3, DEFR3_CODE | DEFR3_DEFE3);
- 	rcar_du_group_write(rgrp, DEFR4, DEFR4_CODE);
- 	rcar_du_group_write(rgrp, DEFR5, DEFR5_CODE | DEFR5_DEFE5);
-+	if (rcar_du_has(rgrp->dev, RCAR_DU_FEATURE_DEFR8))
-+		rcar_du_group_write(rgrp, DEFR8, DEFR8_CODE | DEFR8_DEFE8);
- 
- 	/* Use DS1PR and DS2PR to configure planes priorities and connects the
- 	 * superposition 0 to DU0 pins. DU1 pins will be configured dynamically.
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0030-serial-sh-sci-Add-OF-support.patch b/patches.renesas/0030-serial-sh-sci-Add-OF-support.patch
deleted file mode 100644
index 017fdb7d794fc..0000000000000
--- a/patches.renesas/0030-serial-sh-sci-Add-OF-support.patch
+++ /dev/null
@@ -1,166 +0,0 @@
-From ad88ad9ad072b2db89a17c683f2d57567cac0867 Mon Sep 17 00:00:00 2001
-From: Bastian Hecht <hechtb@gmail.com>
-Date: Fri, 6 Dec 2013 10:59:54 +0100
-Subject: serial: sh-sci: Add OF support
-
-Extend the driver to with support for SCIx device tree bindings. A
-minimal set of features is supported, additional properties can be added
-later should the need to describe more device features arise.
-
-Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Simon Horman <horms+renesas@verge.net.au>
-Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 20bdcab8268cb05702e12ae9013be96ecc7ec3a6)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/tty/serial/sh-sci.c | 101 ++++++++++++++++++++++++++++++++++++++++++--
- 1 file changed, 98 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
-index 795f2a284a24..22258850e170 100644
---- a/drivers/tty/serial/sh-sci.c
-+++ b/drivers/tty/serial/sh-sci.c
-@@ -39,6 +39,7 @@
- #include <linux/module.h>
- #include <linux/mm.h>
- #include <linux/notifier.h>
-+#include <linux/of.h>
- #include <linux/platform_device.h>
- #include <linux/pm_runtime.h>
- #include <linux/scatterlist.h>
-@@ -2415,6 +2416,83 @@ static int sci_remove(struct platform_device *dev)
- 	return 0;
- }
- 
-+struct sci_port_info {
-+	unsigned int type;
-+	unsigned int regtype;
-+};
-+
-+static const struct of_device_id of_sci_match[] = {
-+	{
-+		.compatible = "renesas,scif",
-+		.data = (void *)&(const struct sci_port_info) {
-+			.type = PORT_SCIF,
-+			.regtype = SCIx_SH4_SCIF_REGTYPE,
-+		},
-+	}, {
-+		.compatible = "renesas,scifa",
-+		.data = (void *)&(const struct sci_port_info) {
-+			.type = PORT_SCIFA,
-+			.regtype = SCIx_SCIFA_REGTYPE,
-+		},
-+	}, {
-+		.compatible = "renesas,scifb",
-+		.data = (void *)&(const struct sci_port_info) {
-+			.type = PORT_SCIFB,
-+			.regtype = SCIx_SCIFB_REGTYPE,
-+		},
-+	}, {
-+		.compatible = "renesas,hscif",
-+		.data = (void *)&(const struct sci_port_info) {
-+			.type = PORT_HSCIF,
-+			.regtype = SCIx_HSCIF_REGTYPE,
-+		},
-+	}, {
-+		/* Terminator */
-+	},
-+};
-+MODULE_DEVICE_TABLE(of, of_sci_match);
-+
-+static struct plat_sci_port *
-+sci_parse_dt(struct platform_device *pdev, unsigned int *dev_id)
-+{
-+	struct device_node *np = pdev->dev.of_node;
-+	const struct of_device_id *match;
-+	const struct sci_port_info *info;
-+	struct plat_sci_port *p;
-+	int id;
-+
-+	if (!IS_ENABLED(CONFIG_OF) || !np)
-+		return NULL;
-+
-+	match = of_match_node(of_sci_match, pdev->dev.of_node);
-+	if (!match)
-+		return NULL;
-+
-+	info = match->data;
-+
-+	p = devm_kzalloc(&pdev->dev, sizeof(struct plat_sci_port), GFP_KERNEL);
-+	if (!p) {
-+		dev_err(&pdev->dev, "failed to allocate DT config data\n");
-+		return NULL;
-+	}
-+
-+	/* Get the line number for the aliases node. */
-+	id = of_alias_get_id(np, "serial");
-+	if (id < 0) {
-+		dev_err(&pdev->dev, "failed to get alias id (%d)\n", id);
-+		return NULL;
-+	}
-+
-+	*dev_id = id;
-+
-+	p->flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF;
-+	p->type = info->type;
-+	p->regtype = info->regtype;
-+	p->scscr = SCSCR_RE | SCSCR_TE;
-+
-+	return p;
-+}
-+
- static int sci_probe_single(struct platform_device *dev,
- 				      unsigned int index,
- 				      struct plat_sci_port *p,
-@@ -2447,8 +2525,9 @@ static int sci_probe_single(struct platform_device *dev,
- 
- static int sci_probe(struct platform_device *dev)
- {
--	struct plat_sci_port *p = dev_get_platdata(&dev->dev);
--	struct sci_port *sp = &sci_ports[dev->id];
-+	struct plat_sci_port *p;
-+	struct sci_port *sp;
-+	unsigned int dev_id;
- 	int ret;
- 
- 	/*
-@@ -2459,9 +2538,24 @@ static int sci_probe(struct platform_device *dev)
- 	if (is_early_platform_device(dev))
- 		return sci_probe_earlyprintk(dev);
- 
-+	if (dev->dev.of_node) {
-+		p = sci_parse_dt(dev, &dev_id);
-+		if (p == NULL)
-+			return -EINVAL;
-+	} else {
-+		p = dev->dev.platform_data;
-+		if (p == NULL) {
-+			dev_err(&dev->dev, "no platform data supplied\n");
-+			return -EINVAL;
-+		}
-+
-+		dev_id = dev->id;
-+	}
-+
-+	sp = &sci_ports[dev_id];
- 	platform_set_drvdata(dev, sp);
- 
--	ret = sci_probe_single(dev, dev->id, p, sp);
-+	ret = sci_probe_single(dev, dev_id, p, sp);
- 	if (ret)
- 		return ret;
- 
-@@ -2513,6 +2607,7 @@ static struct platform_driver sci_driver = {
- 		.name	= "sh-sci",
- 		.owner	= THIS_MODULE,
- 		.pm	= &sci_dev_pm_ops,
-+		.of_match_table = of_match_ptr(of_sci_match),
- 	},
- };
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0030-thermal-rcar-Fix-typo-in-probe-information-message.patch b/patches.renesas/0030-thermal-rcar-Fix-typo-in-probe-information-message.patch
deleted file mode 100644
index bc735a2638940..0000000000000
--- a/patches.renesas/0030-thermal-rcar-Fix-typo-in-probe-information-message.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From cb96b723c87c6b716db266658b91f66eb1baca01 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 14 May 2013 23:00:32 +0000
-Subject: thermal: rcar: Fix typo in probe information message
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Eduardo Valentin <eduardo.valentin@ti.com>
-Signed-off-by: Zhang Rui <rui.zhang@intel.com>
-(cherry picked from commit 3db46c939677e32e311d354b619fd552ceafd123)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/thermal/rcar_thermal.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/thermal/rcar_thermal.c b/drivers/thermal/rcar_thermal.c
-index 8d7edd4c..3eaca06d 100644
---- a/drivers/thermal/rcar_thermal.c
-+++ b/drivers/thermal/rcar_thermal.c
-@@ -458,7 +458,7 @@ static int rcar_thermal_probe(struct platform_device *pdev)
- 
- 	platform_set_drvdata(pdev, common);
- 
--	dev_info(dev, "%d sensor proved\n", i);
-+	dev_info(dev, "%d sensor probed\n", i);
- 
- 	return 0;
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0031-Thermal-rcar-Remove-redundant-platform_set_drvdata.patch b/patches.renesas/0031-Thermal-rcar-Remove-redundant-platform_set_drvdata.patch
deleted file mode 100644
index 4772f638b0872..0000000000000
--- a/patches.renesas/0031-Thermal-rcar-Remove-redundant-platform_set_drvdata.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From ced6919282c99b3272c2b670f47973bbad8bf898 Mon Sep 17 00:00:00 2001
-From: Sachin Kamat <sachin.kamat@linaro.org>
-Date: Fri, 3 May 2013 09:57:12 +0000
-Subject: Thermal: rcar: Remove redundant platform_set_drvdata()
-
-Commit 0998d06310 (device-core: Ensure drvdata = NULL when no
-driver is bound) removes the need to set driver data field to
-NULL.
-
-Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
-Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Acked-by: Eduardo Valentin <eduardo.valentin@ti.com>
-Signed-off-by: Zhang Rui <rui.zhang@intel.com>
-(cherry picked from commit 6135ba36f44069ad789bd9f8d6a75eebc3946eba)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/thermal/rcar_thermal.c | 2 --
- 1 file changed, 2 deletions(-)
-
-diff --git a/drivers/thermal/rcar_thermal.c b/drivers/thermal/rcar_thermal.c
-index 3eaca06d..13b54c04 100644
---- a/drivers/thermal/rcar_thermal.c
-+++ b/drivers/thermal/rcar_thermal.c
-@@ -487,8 +487,6 @@ static int rcar_thermal_remove(struct platform_device *pdev)
- 			rcar_thermal_irq_disable(priv);
- 	}
- 
--	platform_set_drvdata(pdev, NULL);
--
- 	pm_runtime_put_sync(dev);
- 	pm_runtime_disable(dev);
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0031-drm-rcar-du-Rework-output-routing-support.patch b/patches.renesas/0031-drm-rcar-du-Rework-output-routing-support.patch
deleted file mode 100644
index 3624ebe6e5e29..0000000000000
--- a/patches.renesas/0031-drm-rcar-du-Rework-output-routing-support.patch
+++ /dev/null
@@ -1,345 +0,0 @@
-From e82761b1b05648e17962223884fb0e6c8cd40221 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Mon, 17 Jun 2013 03:13:11 +0200
-Subject: drm/rcar-du: Rework output routing support
-
-Split the output routing specification between SoC-internal data,
-specified in the rcar_du_device_info structure, and board data, passed
-through platform data.
-
-The DU has 5 possible outputs (DPAD0/1, LVDS0/1, TCON). SoC-internal
-output routing data specify which output are valid, which CRTCs can be
-connected to the valid outputs, and the type of in-SoC encoder for the
-output.
-
-Platform data then specifies external encoders and the output they are
-connected to.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit ef67a902e946ad1ef51040cf287a45cc4714e2b5)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/rcar-du/rcar_du_crtc.c    |  6 ++++--
- drivers/gpu/drm/rcar-du/rcar_du_crtc.h    |  4 +++-
- drivers/gpu/drm/rcar-du/rcar_du_drv.c     | 30 ++++++++++++++++++++++++++++++
- drivers/gpu/drm/rcar-du/rcar_du_drv.h     | 16 ++++++++++++++++
- drivers/gpu/drm/rcar-du/rcar_du_encoder.c | 26 +++++++++++++++++++++-----
- drivers/gpu/drm/rcar-du/rcar_du_encoder.h |  5 +++--
- drivers/gpu/drm/rcar-du/rcar_du_group.c   |  8 ++++----
- drivers/gpu/drm/rcar-du/rcar_du_kms.c     | 17 +++++++++++------
- include/linux/platform_data/rcar-du.h     | 17 +++++++++++++++--
- 9 files changed, 107 insertions(+), 22 deletions(-)
-
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
-index a340224e08e6..680606ef11d8 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
-@@ -129,14 +129,16 @@ static void rcar_du_crtc_set_display_timing(struct rcar_du_crtc *rcrtc)
- 	rcar_du_crtc_write(rcrtc, DEWR,  mode->hdisplay);
- }
- 
--void rcar_du_crtc_route_output(struct drm_crtc *crtc, unsigned int output)
-+void rcar_du_crtc_route_output(struct drm_crtc *crtc,
-+			       enum rcar_du_output output)
- {
- 	struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);
-+	struct rcar_du_device *rcdu = rcrtc->group->dev;
- 
- 	/* Store the route from the CRTC output to the DU output. The DU will be
- 	 * configured when starting the CRTC.
- 	 */
--	rcrtc->outputs |= 1 << output;
-+	rcrtc->outputs |= BIT(output);
- }
- 
- void rcar_du_crtc_update_planes(struct drm_crtc *crtc)
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.h b/drivers/gpu/drm/rcar-du/rcar_du_crtc.h
-index 542a7feceb20..39a983d13afb 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.h
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.h
-@@ -15,6 +15,7 @@
- #define __RCAR_DU_CRTC_H__
- 
- #include <linux/mutex.h>
-+#include <linux/platform_data/rcar-du.h>
- 
- #include <drm/drmP.h>
- #include <drm/drm_crtc.h>
-@@ -45,7 +46,8 @@ void rcar_du_crtc_cancel_page_flip(struct rcar_du_crtc *rcrtc,
- void rcar_du_crtc_suspend(struct rcar_du_crtc *rcrtc);
- void rcar_du_crtc_resume(struct rcar_du_crtc *rcrtc);
- 
--void rcar_du_crtc_route_output(struct drm_crtc *crtc, unsigned int output);
-+void rcar_du_crtc_route_output(struct drm_crtc *crtc,
-+			       enum rcar_du_output output);
- void rcar_du_crtc_update_planes(struct drm_crtc *crtc);
- 
- #endif /* __RCAR_DU_CRTC_H__ */
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.c b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-index f99aa52dc65c..983bc5912588 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-@@ -214,12 +214,42 @@ static int rcar_du_remove(struct platform_device *pdev)
- static const struct rcar_du_device_info rcar_du_r8a7779_info = {
- 	.features = 0,
- 	.num_crtcs = 2,
-+	.routes = {
-+		/* R8A7779 has two RGB outputs and one (currently unsupported)
-+		 * TCON output.
-+		 */
-+		[RCAR_DU_OUTPUT_DPAD0] = {
-+			.possible_crtcs = BIT(0),
-+			.encoder_type = DRM_MODE_ENCODER_NONE,
-+		},
-+		[RCAR_DU_OUTPUT_DPAD1] = {
-+			.possible_crtcs = BIT(1) | BIT(0),
-+			.encoder_type = DRM_MODE_ENCODER_NONE,
-+		},
-+	},
- };
- 
- static const struct rcar_du_device_info rcar_du_r8a7790_info = {
- 	.features = RCAR_DU_FEATURE_CRTC_IRQ_CLOCK | RCAR_DU_FEATURE_ALIGN_128B
- 		  | RCAR_DU_FEATURE_DEFR8,
- 	.num_crtcs = 3,
-+	.routes = {
-+		/* R8A7790 has one RGB output, two LVDS outputs and one
-+		 * (currently unsupported) TCON output.
-+		 */
-+		[RCAR_DU_OUTPUT_DPAD0] = {
-+			.possible_crtcs = BIT(2) | BIT(1) | BIT(0),
-+			.encoder_type = DRM_MODE_ENCODER_NONE,
-+		},
-+		[RCAR_DU_OUTPUT_LVDS0] = {
-+			.possible_crtcs = BIT(0),
-+			.encoder_type = DRM_MODE_ENCODER_LVDS,
-+		},
-+		[RCAR_DU_OUTPUT_LVDS1] = {
-+			.possible_crtcs = BIT(2) | BIT(1),
-+			.encoder_type = DRM_MODE_ENCODER_LVDS,
-+		},
-+	},
- };
- 
- static const struct platform_device_id rcar_du_id_table[] = {
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.h b/drivers/gpu/drm/rcar-du/rcar_du_drv.h
-index 70c335f51136..d5243f493903 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_drv.h
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.h
-@@ -30,13 +30,29 @@ struct rcar_du_device;
- #define RCAR_DU_FEATURE_DEFR8		(1 << 2)	/* Has DEFR8 register */
- 
- /*
-+ * struct rcar_du_output_routing - Output routing specification
-+ * @possible_crtcs: bitmask of possible CRTCs for the output
-+ * @encoder_type: DRM type of the internal encoder associated with the output
-+ *
-+ * The DU has 5 possible outputs (DPAD0/1, LVDS0/1, TCON). Output routing data
-+ * specify the valid SoC outputs, which CRTCs can drive the output, and the type
-+ * of in-SoC encoder for the output.
-+ */
-+struct rcar_du_output_routing {
-+	unsigned int possible_crtcs;
-+	unsigned int encoder_type;
-+};
-+
-+/*
-  * struct rcar_du_device_info - DU model-specific information
-  * @features: device features (RCAR_DU_FEATURE_*)
-  * @num_crtcs: total number of CRTCs
-+ * @routes: array of CRTC to output routes, indexed by output (RCAR_DU_OUTPUT_*)
-  */
- struct rcar_du_device_info {
- 	unsigned int features;
- 	unsigned int num_crtcs;
-+	struct rcar_du_output_routing routes[RCAR_DU_OUTPUT_MAX];
- };
- 
- struct rcar_du_device {
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_encoder.c b/drivers/gpu/drm/rcar-du/rcar_du_encoder.c
-index 0d0375c7ee44..2aac28d21f87 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_encoder.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_encoder.c
-@@ -115,10 +115,12 @@ static const struct drm_encoder_funcs encoder_funcs = {
- };
- 
- int rcar_du_encoder_init(struct rcar_du_device *rcdu,
--			 enum rcar_du_encoder_type type, unsigned int output,
-+			 enum rcar_du_encoder_type type,
-+			 enum rcar_du_output output,
- 			 const struct rcar_du_encoder_data *data)
- {
- 	struct rcar_du_encoder *renc;
-+	unsigned int encoder_type;
- 	int ret;
- 
- 	renc = devm_kzalloc(rcdu->dev, sizeof(*renc), GFP_KERNEL);
-@@ -127,19 +129,33 @@ int rcar_du_encoder_init(struct rcar_du_device *rcdu,
- 
- 	renc->output = output;
- 
-+	switch (type) {
-+	case RCAR_DU_ENCODER_VGA:
-+		encoder_type = DRM_MODE_ENCODER_DAC;
-+		break;
-+	case RCAR_DU_ENCODER_LVDS:
-+		encoder_type = DRM_MODE_ENCODER_LVDS;
-+		break;
-+	case RCAR_DU_ENCODER_NONE:
-+	default:
-+		/* No external encoder, use the internal encoder type. */
-+		encoder_type = rcdu->info->routes[output].encoder_type;
-+		break;
-+	}
-+
- 	ret = drm_encoder_init(rcdu->ddev, &renc->encoder, &encoder_funcs,
--			       type);
-+			       encoder_type);
- 	if (ret < 0)
- 		return ret;
- 
- 	drm_encoder_helper_add(&renc->encoder, &encoder_helper_funcs);
- 
--	switch (type) {
--	case RCAR_DU_ENCODER_LVDS:
-+	switch (encoder_type) {
-+	case DRM_MODE_ENCODER_LVDS:
- 		return rcar_du_lvds_connector_init(rcdu, renc,
- 						   &data->connector.lvds.panel);
- 
--	case RCAR_DU_ENCODER_VGA:
-+	case DRM_MODE_ENCODER_DAC:
- 		return rcar_du_vga_connector_init(rcdu, renc);
- 
- 	default:
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_encoder.h b/drivers/gpu/drm/rcar-du/rcar_du_encoder.h
-index 08cde1293892..2310416ea21f 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_encoder.h
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_encoder.h
-@@ -22,7 +22,7 @@ struct rcar_du_device;
- 
- struct rcar_du_encoder {
- 	struct drm_encoder encoder;
--	unsigned int output;
-+	enum rcar_du_output output;
- };
- 
- #define to_rcar_encoder(e) \
-@@ -40,7 +40,8 @@ struct drm_encoder *
- rcar_du_connector_best_encoder(struct drm_connector *connector);
- 
- int rcar_du_encoder_init(struct rcar_du_device *rcdu,
--			 enum rcar_du_encoder_type type, unsigned int output,
-+			 enum rcar_du_encoder_type type,
-+			 enum rcar_du_output output,
- 			 const struct rcar_du_encoder_data *data);
- 
- #endif /* __RCAR_DU_ENCODER_H__ */
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_group.c b/drivers/gpu/drm/rcar-du/rcar_du_group.c
-index f3ba0ca845e2..9df6fb635c96 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_group.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_group.c
-@@ -135,11 +135,11 @@ void rcar_du_group_set_routing(struct rcar_du_group *rgrp)
- 
- 	dorcr &= ~(DORCR_PG2T | DORCR_DK2S | DORCR_PG2D_MASK);
- 
--	/* Set the DU1 pins sources. Select CRTC 0 if explicitly requested and
--	 * CRTC 1 in all other cases to avoid cloning CRTC 0 to DU0 and DU1 by
--	 * default.
-+	/* Set the DPAD1 pins sources. Select CRTC 0 if explicitly requested and
-+	 * CRTC 1 in all other cases to avoid cloning CRTC 0 to DPAD0 and DPAD1
-+	 * by default.
- 	 */
--	if (crtc0->outputs & (1 << 1))
-+	if (crtc0->outputs & BIT(RCAR_DU_OUTPUT_DPAD1))
- 		dorcr |= DORCR_PG2D_DS1;
- 	else
- 		dorcr |= DORCR_PG2T | DORCR_DK2S | DORCR_PG2D_DS2;
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms.c b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
-index 816963ca1626..2b92e68a09f0 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_kms.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
-@@ -220,11 +220,14 @@ int rcar_du_modeset_init(struct rcar_du_device *rcdu)
- 	for (i = 0; i < rcdu->pdata->num_encoders; ++i) {
- 		const struct rcar_du_encoder_data *pdata =
- 			&rcdu->pdata->encoders[i];
-+		const struct rcar_du_output_routing *route =
-+			&rcdu->info->routes[pdata->output];
- 
- 		if (pdata->type == RCAR_DU_ENCODER_UNUSED)
- 			continue;
- 
--		if (pdata->output >= rcdu->num_crtcs) {
-+		if (pdata->output >= RCAR_DU_OUTPUT_MAX ||
-+		    route->possible_crtcs == 0) {
- 			dev_warn(rcdu->dev,
- 				 "encoder %u references unexisting output %u, skipping\n",
- 				 i, pdata->output);
-@@ -234,15 +237,17 @@ int rcar_du_modeset_init(struct rcar_du_device *rcdu)
- 		rcar_du_encoder_init(rcdu, pdata->type, pdata->output, pdata);
- 	}
- 
--	/* Set the possible CRTCs and possible clones. All encoders can be
--	 * driven by the CRTC associated with the output they're connected to,
--	 * as well as by CRTC 0.
-+	/* Set the possible CRTCs and possible clones. There's always at least
-+	 * one way for all encoders to clone each other, set all bits in the
-+	 * possible clones field.
- 	 */
- 	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
- 		struct rcar_du_encoder *renc = to_rcar_encoder(encoder);
-+		const struct rcar_du_output_routing *route =
-+			&rcdu->info->routes[renc->output];
- 
--		encoder->possible_crtcs = (1 << 0) | (1 << renc->output);
--		encoder->possible_clones = 1 << 0;
-+		encoder->possible_crtcs = route->possible_crtcs;
-+		encoder->possible_clones = (1 << rcdu->pdata->num_encoders) - 1;
- 	}
- 
- 	/* Now that the CRTCs have been initialized register the planes. */
-diff --git a/include/linux/platform_data/rcar-du.h b/include/linux/platform_data/rcar-du.h
-index 64cd8635e6e6..1a2e9901a22e 100644
---- a/include/linux/platform_data/rcar-du.h
-+++ b/include/linux/platform_data/rcar-du.h
-@@ -16,8 +16,18 @@
- 
- #include <drm/drm_mode.h>
- 
-+enum rcar_du_output {
-+	RCAR_DU_OUTPUT_DPAD0,
-+	RCAR_DU_OUTPUT_DPAD1,
-+	RCAR_DU_OUTPUT_LVDS0,
-+	RCAR_DU_OUTPUT_LVDS1,
-+	RCAR_DU_OUTPUT_TCON,
-+	RCAR_DU_OUTPUT_MAX,
-+};
-+
- enum rcar_du_encoder_type {
- 	RCAR_DU_ENCODER_UNUSED = 0,
-+	RCAR_DU_ENCODER_NONE,
- 	RCAR_DU_ENCODER_VGA,
- 	RCAR_DU_ENCODER_LVDS,
- };
-@@ -39,13 +49,16 @@ struct rcar_du_connector_vga_data {
- /*
-  * struct rcar_du_encoder_data - Encoder platform data
-  * @type: the encoder type (RCAR_DU_ENCODER_*)
-- * @output: the DU output the connector is connected to
-+ * @output: the DU output the connector is connected to (RCAR_DU_OUTPUT_*)
-  * @connector.lvds: platform data for LVDS connectors
-  * @connector.vga: platform data for VGA connectors
-+ *
-+ * Encoder platform data describes an on-board encoder, its associated DU SoC
-+ * output, and the connector.
-  */
- struct rcar_du_encoder_data {
- 	enum rcar_du_encoder_type type;
--	unsigned int output;
-+	enum rcar_du_output output;
- 
- 	union {
- 		struct rcar_du_connector_lvds_data lvds;
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0031-sh-Declare-SCIF-register-base-and-IRQ-as-resources.patch b/patches.renesas/0031-sh-Declare-SCIF-register-base-and-IRQ-as-resources.patch
deleted file mode 100644
index 5d880cd97c70a..0000000000000
--- a/patches.renesas/0031-sh-Declare-SCIF-register-base-and-IRQ-as-resources.patch
+++ /dev/null
@@ -1,3130 +0,0 @@
-From 144241217d14c71a07dd18f93a5cc0f3e0a8f4b9 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 6 Dec 2013 10:59:48 +0100
-Subject: sh: Declare SCIF register base and IRQ as resources
-
-Passing the register base address and IRQ through platform data is
-deprecated. Use resources instead.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit d850acf975bee46e43c3cd80d2d287010195c63b)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/sh/kernel/cpu/sh2/setup-sh7619.c  | 27 +++++++---
- arch/sh/kernel/cpu/sh2a/setup-mxg.c    |  9 +++-
- arch/sh/kernel/cpu/sh2a/setup-sh7201.c | 72 +++++++++++++++++++------
- arch/sh/kernel/cpu/sh2a/setup-sh7203.c | 36 ++++++++++---
- arch/sh/kernel/cpu/sh2a/setup-sh7206.c | 36 ++++++++++---
- arch/sh/kernel/cpu/sh2a/setup-sh7264.c | 96 ++++++++++++++++++++++++++++------
- arch/sh/kernel/cpu/sh2a/setup-sh7269.c | 96 ++++++++++++++++++++++++++++------
- arch/sh/kernel/cpu/sh3/setup-sh7705.c  | 18 +++++--
- arch/sh/kernel/cpu/sh3/setup-sh770x.c  | 27 +++++++---
- arch/sh/kernel/cpu/sh3/setup-sh7710.c  | 18 +++++--
- arch/sh/kernel/cpu/sh3/setup-sh7720.c  | 18 +++++--
- arch/sh/kernel/cpu/sh4/setup-sh4-202.c | 15 ++++--
- arch/sh/kernel/cpu/sh4/setup-sh7750.c  | 18 +++++--
- arch/sh/kernel/cpu/sh4/setup-sh7760.c  | 58 +++++++++++++-------
- arch/sh/kernel/cpu/sh4a/setup-sh7343.c | 36 ++++++++++---
- arch/sh/kernel/cpu/sh4a/setup-sh7366.c |  9 +++-
- arch/sh/kernel/cpu/sh4a/setup-sh7722.c | 27 +++++++---
- arch/sh/kernel/cpu/sh4a/setup-sh7723.c | 54 ++++++++++++++-----
- arch/sh/kernel/cpu/sh4a/setup-sh7724.c | 54 ++++++++++++++-----
- arch/sh/kernel/cpu/sh4a/setup-sh7734.c | 66 ++++++++++++++++-------
- arch/sh/kernel/cpu/sh4a/setup-sh7757.c | 27 +++++++---
- arch/sh/kernel/cpu/sh4a/setup-sh7763.c | 27 +++++++---
- arch/sh/kernel/cpu/sh4a/setup-sh7770.c | 90 ++++++++++++++++++++++++-------
- arch/sh/kernel/cpu/sh4a/setup-sh7780.c | 18 +++++--
- arch/sh/kernel/cpu/sh4a/setup-sh7785.c | 54 ++++++++++++++-----
- arch/sh/kernel/cpu/sh4a/setup-sh7786.c | 82 ++++++++++++++++++++++-------
- arch/sh/kernel/cpu/sh4a/setup-shx3.c   | 45 ++++++++++------
- arch/sh/kernel/cpu/sh5/setup-sh5.c     | 11 +++-
- 28 files changed, 883 insertions(+), 261 deletions(-)
-
-diff --git a/arch/sh/kernel/cpu/sh2/setup-sh7619.c b/arch/sh/kernel/cpu/sh2/setup-sh7619.c
-index bb11e1925178..b708432c33b0 100644
---- a/arch/sh/kernel/cpu/sh2/setup-sh7619.c
-+++ b/arch/sh/kernel/cpu/sh2/setup-sh7619.c
-@@ -60,51 +60,66 @@ static DECLARE_INTC_DESC(intc_desc, "sh7619", vectors, NULL,
- 			 NULL, prio_registers, NULL);
- 
- static struct plat_sci_port scif0_platform_data = {
--	.mapbase	= 0xf8400000,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
--	.irqs		= SCIx_IRQ_MUXED(88),
-+};
-+
-+static struct resource scif0_resources[] = {
-+	DEFINE_RES_MEM(0xf8400000, 0x100),
-+	DEFINE_RES_IRQ(88),
- };
- 
- static struct platform_device scif0_device = {
- 	.name		= "sh-sci",
- 	.id		= 0,
-+	.resource	= scif0_resources,
-+	.num_resources	= ARRAY_SIZE(scif0_resources),
- 	.dev		= {
- 		.platform_data	= &scif0_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif1_platform_data = {
--	.mapbase	= 0xf8410000,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
--	.irqs		= SCIx_IRQ_MUXED(92),
-+};
-+
-+static struct resource scif1_resources[] = {
-+	DEFINE_RES_MEM(0xf8410000, 0x100),
-+	DEFINE_RES_IRQ(92),
- };
- 
- static struct platform_device scif1_device = {
- 	.name		= "sh-sci",
- 	.id		= 1,
-+	.resource	= scif1_resources,
-+	.num_resources	= ARRAY_SIZE(scif1_resources),
- 	.dev		= {
- 		.platform_data	= &scif1_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif2_platform_data = {
--	.mapbase	= 0xf8420000,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
--	.irqs		= SCIx_IRQ_MUXED(96),
-+};
-+
-+static struct resource scif2_resources[] = {
-+	DEFINE_RES_MEM(0xf8420000, 0x100),
-+	DEFINE_RES_IRQ(96),
- };
- 
- static struct platform_device scif2_device = {
- 	.name		= "sh-sci",
- 	.id		= 2,
-+	.resource	= scif2_resources,
-+	.num_resources	= ARRAY_SIZE(scif2_resources),
- 	.dev		= {
- 		.platform_data	= &scif2_platform_data,
- 	},
-diff --git a/arch/sh/kernel/cpu/sh2a/setup-mxg.c b/arch/sh/kernel/cpu/sh2a/setup-mxg.c
-index f7f1cf2af302..9bdc61143f40 100644
---- a/arch/sh/kernel/cpu/sh2a/setup-mxg.c
-+++ b/arch/sh/kernel/cpu/sh2a/setup-mxg.c
-@@ -199,17 +199,22 @@ static struct platform_device mtu2_2_device = {
- };
- 
- static struct plat_sci_port scif0_platform_data = {
--	.mapbase	= 0xff804000,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
--	.irqs		= SCIx_IRQ_MUXED(220),
-+};
-+
-+static struct resource scif0_resources[] = {
-+	DEFINE_RES_MEM(0xff804000, 0x100),
-+	DEFINE_RES_IRQ(220),
- };
- 
- static struct platform_device scif0_device = {
- 	.name		= "sh-sci",
- 	.id		= 0,
-+	.resource	= scif0_resources,
-+	.num_resources	= ARRAY_SIZE(scif0_resources),
- 	.dev		= {
- 		.platform_data	= &scif0_platform_data,
- 	},
-diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7201.c b/arch/sh/kernel/cpu/sh2a/setup-sh7201.c
-index 7b84785b8962..7585c4ed7c5c 100644
---- a/arch/sh/kernel/cpu/sh2a/setup-sh7201.c
-+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7201.c
-@@ -178,136 +178,176 @@ static DECLARE_INTC_DESC(intc_desc, "sh7201", vectors, groups,
- 			 mask_registers, prio_registers, NULL);
- 
- static struct plat_sci_port scif0_platform_data = {
--	.mapbase	= 0xfffe8000,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
--	.irqs		= SCIx_IRQ_MUXED(180),
-+};
-+
-+static struct resource scif0_resources[] = {
-+	DEFINE_RES_MEM(0xfffe8000, 0x100),
-+	DEFINE_RES_IRQ(180),
- };
- 
- static struct platform_device scif0_device = {
- 	.name		= "sh-sci",
- 	.id		= 0,
-+	.resource	= scif0_resources,
-+	.num_resources	= ARRAY_SIZE(scif0_resources),
- 	.dev		= {
- 		.platform_data	= &scif0_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif1_platform_data = {
--	.mapbase	= 0xfffe8800,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
--	.irqs		= SCIx_IRQ_MUXED(184),
-+};
-+
-+static struct resource scif1_resources[] = {
-+	DEFINE_RES_MEM(0xfffe8800, 0x100),
-+	DEFINE_RES_IRQ(184),
- };
- 
- static struct platform_device scif1_device = {
- 	.name		= "sh-sci",
- 	.id		= 1,
-+	.resource	= scif1_resources,
-+	.num_resources	= ARRAY_SIZE(scif1_resources),
- 	.dev		= {
- 		.platform_data	= &scif1_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif2_platform_data = {
--	.mapbase	= 0xfffe9000,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
--	.irqs		= SCIx_IRQ_MUXED(188),
-+};
-+
-+static struct resource scif2_resources[] = {
-+	DEFINE_RES_MEM(0xfffe9000, 0x100),
-+	DEFINE_RES_IRQ(188),
- };
- 
- static struct platform_device scif2_device = {
- 	.name		= "sh-sci",
- 	.id		= 2,
-+	.resource	= scif2_resources,
-+	.num_resources	= ARRAY_SIZE(scif2_resources),
- 	.dev		= {
- 		.platform_data	= &scif2_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif3_platform_data = {
--	.mapbase	= 0xfffe9800,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
--	.irqs		= SCIx_IRQ_MUXED(192),
-+};
-+
-+static struct resource scif3_resources[] = {
-+	DEFINE_RES_MEM(0xfffe9800, 0x100),
-+	DEFINE_RES_IRQ(192),
- };
- 
- static struct platform_device scif3_device = {
- 	.name		= "sh-sci",
- 	.id		= 3,
-+	.resource	= scif3_resources,
-+	.num_resources	= ARRAY_SIZE(scif3_resources),
- 	.dev		= {
- 		.platform_data	= &scif3_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif4_platform_data = {
--	.mapbase	= 0xfffea000,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
--	.irqs		= SCIx_IRQ_MUXED(196),
-+};
-+
-+static struct resource scif4_resources[] = {
-+	DEFINE_RES_MEM(0xfffea000, 0x100),
-+	DEFINE_RES_IRQ(196),
- };
- 
- static struct platform_device scif4_device = {
- 	.name		= "sh-sci",
- 	.id		= 4,
-+	.resource	= scif4_resources,
-+	.num_resources	= ARRAY_SIZE(scif4_resources),
- 	.dev		= {
- 		.platform_data	= &scif4_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif5_platform_data = {
--	.mapbase	= 0xfffea800,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
--	.irqs		= SCIx_IRQ_MUXED(200),
-+};
-+
-+static struct resource scif5_resources[] = {
-+	DEFINE_RES_MEM(0xfffea800, 0x100),
-+	DEFINE_RES_IRQ(200),
- };
- 
- static struct platform_device scif5_device = {
- 	.name		= "sh-sci",
- 	.id		= 5,
-+	.resource	= scif5_resources,
-+	.num_resources	= ARRAY_SIZE(scif5_resources),
- 	.dev		= {
- 		.platform_data	= &scif5_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif6_platform_data = {
--	.mapbase	= 0xfffeb000,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
--	.irqs		= SCIx_IRQ_MUXED(204),
-+};
-+
-+static struct resource scif6_resources[] = {
-+	DEFINE_RES_MEM(0xfffeb000, 0x100),
-+	DEFINE_RES_IRQ(204),
- };
- 
- static struct platform_device scif6_device = {
- 	.name		= "sh-sci",
- 	.id		= 6,
-+	.resource	= scif6_resources,
-+	.num_resources	= ARRAY_SIZE(scif6_resources),
- 	.dev		= {
- 		.platform_data	= &scif6_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif7_platform_data = {
--	.mapbase	= 0xfffeb800,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
--	.irqs		= SCIx_IRQ_MUXED(208),
-+};
-+
-+static struct resource scif7_resources[] = {
-+	DEFINE_RES_MEM(0xfffeb800, 0x100),
-+	DEFINE_RES_IRQ(208),
- };
- 
- static struct platform_device scif7_device = {
- 	.name		= "sh-sci",
- 	.id		= 7,
-+	.resource	= scif7_resources,
-+	.num_resources	= ARRAY_SIZE(scif7_resources),
- 	.dev		= {
- 		.platform_data	= &scif7_platform_data,
- 	},
-diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7203.c b/arch/sh/kernel/cpu/sh2a/setup-sh7203.c
-index bfc33f6a28c3..f2a9baaa541b 100644
---- a/arch/sh/kernel/cpu/sh2a/setup-sh7203.c
-+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7203.c
-@@ -174,76 +174,96 @@ static DECLARE_INTC_DESC(intc_desc, "sh7203", vectors, groups,
- 			 mask_registers, prio_registers, NULL);
- 
- static struct plat_sci_port scif0_platform_data = {
--	.mapbase	= 0xfffe8000,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
- 			  SCSCR_REIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
--	.irqs		= SCIx_IRQ_MUXED(192),
- 	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,
- };
- 
-+static struct resource scif0_resources[] = {
-+	DEFINE_RES_MEM(0xfffe8000, 0x100),
-+	DEFINE_RES_IRQ(192),
-+};
-+
- static struct platform_device scif0_device = {
- 	.name		= "sh-sci",
- 	.id		= 0,
-+	.resource	= scif0_resources,
-+	.num_resources	= ARRAY_SIZE(scif0_resources),
- 	.dev		= {
- 		.platform_data	= &scif0_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif1_platform_data = {
--	.mapbase	= 0xfffe8800,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
- 			  SCSCR_REIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
--	.irqs		= SCIx_IRQ_MUXED(196),
- 	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,
- };
- 
-+static struct resource scif1_resources[] = {
-+	DEFINE_RES_MEM(0xfffe8800, 0x100),
-+	DEFINE_RES_IRQ(196),
-+};
-+
- static struct platform_device scif1_device = {
- 	.name		= "sh-sci",
- 	.id		= 1,
-+	.resource	= scif1_resources,
-+	.num_resources	= ARRAY_SIZE(scif1_resources),
- 	.dev		= {
- 		.platform_data	= &scif1_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif2_platform_data = {
--	.mapbase	= 0xfffe9000,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
- 			  SCSCR_REIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
--	.irqs		= SCIx_IRQ_MUXED(200),
- 	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,
- };
- 
-+static struct resource scif2_resources[] = {
-+	DEFINE_RES_MEM(0xfffe9000, 0x100),
-+	DEFINE_RES_IRQ(200),
-+};
-+
- static struct platform_device scif2_device = {
- 	.name		= "sh-sci",
- 	.id		= 2,
-+	.resource	= scif2_resources,
-+	.num_resources	= ARRAY_SIZE(scif2_resources),
- 	.dev		= {
- 		.platform_data	= &scif2_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif3_platform_data = {
--	.mapbase	= 0xfffe9800,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
- 			  SCSCR_REIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
--	.irqs		= SCIx_IRQ_MUXED(204),
- 	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,
- };
- 
-+static struct resource scif3_resources[] = {
-+	DEFINE_RES_MEM(0xfffe9800, 0x100),
-+	DEFINE_RES_IRQ(204),
-+};
-+
- static struct platform_device scif3_device = {
- 	.name		= "sh-sci",
- 	.id		= 3,
-+	.resource	= scif3_resources,
-+	.num_resources	= ARRAY_SIZE(scif3_resources),
- 	.dev		= {
- 		.platform_data	= &scif3_platform_data,
- 	},
-diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7206.c b/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
-index a5010741de85..fc7cacd36729 100644
---- a/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
-+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
-@@ -134,68 +134,88 @@ static DECLARE_INTC_DESC(intc_desc, "sh7206", vectors, groups,
- 			 mask_registers, prio_registers, NULL);
- 
- static struct plat_sci_port scif0_platform_data = {
--	.mapbase	= 0xfffe8000,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
--	.irqs		= SCIx_IRQ_MUXED(240),
-+};
-+
-+static struct resource scif0_resources[] = {
-+	DEFINE_RES_MEM(0xfffe8000, 0x100),
-+	DEFINE_RES_IRQ(240),
- };
- 
- static struct platform_device scif0_device = {
- 	.name		= "sh-sci",
- 	.id		= 0,
-+	.resource	= scif0_resources,
-+	.num_resources	= ARRAY_SIZE(scif0_resources),
- 	.dev		= {
- 		.platform_data	= &scif0_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif1_platform_data = {
--	.mapbase	= 0xfffe8800,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
--	.irqs		= SCIx_IRQ_MUXED(244),
-+};
-+
-+static struct resource scif1_resources[] = {
-+	DEFINE_RES_MEM(0xfffe8800, 0x100),
-+	DEFINE_RES_IRQ(244),
- };
- 
- static struct platform_device scif1_device = {
- 	.name		= "sh-sci",
- 	.id		= 1,
-+	.resource	= scif1_resources,
-+	.num_resources	= ARRAY_SIZE(scif1_resources),
- 	.dev		= {
- 		.platform_data	= &scif1_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif2_platform_data = {
--	.mapbase	= 0xfffe9000,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
--	.irqs		= SCIx_IRQ_MUXED(248),
-+};
-+
-+static struct resource scif2_resources[] = {
-+	DEFINE_RES_MEM(0xfffe9000, 0x100),
-+	DEFINE_RES_IRQ(248),
- };
- 
- static struct platform_device scif2_device = {
- 	.name		= "sh-sci",
- 	.id		= 2,
-+	.resource	= scif2_resources,
-+	.num_resources	= ARRAY_SIZE(scif2_resources),
- 	.dev		= {
- 		.platform_data	= &scif2_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif3_platform_data = {
--	.mapbase	= 0xfffe9800,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
--	.irqs		= SCIx_IRQ_MUXED(252),
-+};
-+
-+static struct resource scif3_resources[] = {
-+	DEFINE_RES_MEM(0xfffe9800, 0x100),
-+	DEFINE_RES_IRQ(252),
- };
- 
- static struct platform_device scif3_device = {
- 	.name		= "sh-sci",
- 	.id		= 3,
-+	.resource	= scif3_resources,
-+	.num_resources	= ARRAY_SIZE(scif3_resources),
- 	.dev		= {
- 		.platform_data	= &scif3_platform_data,
- 	},
-diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7264.c b/arch/sh/kernel/cpu/sh2a/setup-sh7264.c
-index ce5c1b5aebfa..00edbdabcaa1 100644
---- a/arch/sh/kernel/cpu/sh2a/setup-sh7264.c
-+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7264.c
-@@ -226,152 +226,216 @@ static DECLARE_INTC_DESC(intc_desc, "sh7264", vectors, groups,
- 			 mask_registers, prio_registers, NULL);
- 
- static struct plat_sci_port scif0_platform_data = {
--	.mapbase	= 0xfffe8000,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
- 			  SCSCR_REIE | SCSCR_TOIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
--	.irqs		=  { 233, 234, 235, 232 },
- 	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,
- };
- 
-+static struct resource scif0_resources[] = {
-+	DEFINE_RES_MEM(0xfffe8000, 0x100),
-+	DEFINE_RES_IRQ(233),
-+	DEFINE_RES_IRQ(234),
-+	DEFINE_RES_IRQ(235),
-+	DEFINE_RES_IRQ(232),
-+};
-+
- static struct platform_device scif0_device = {
- 	.name		= "sh-sci",
- 	.id		= 0,
-+	.resource	= scif0_resources,
-+	.num_resources	= ARRAY_SIZE(scif0_resources),
- 	.dev		= {
- 		.platform_data	= &scif0_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif1_platform_data = {
--	.mapbase	= 0xfffe8800,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
- 			  SCSCR_REIE | SCSCR_TOIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
--	.irqs		=  { 237, 238, 239, 236 },
- 	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,
- };
- 
-+static struct resource scif1_resources[] = {
-+	DEFINE_RES_MEM(0xfffe8800, 0x100),
-+	DEFINE_RES_IRQ(237),
-+	DEFINE_RES_IRQ(238),
-+	DEFINE_RES_IRQ(239),
-+	DEFINE_RES_IRQ(236),
-+};
-+
- static struct platform_device scif1_device = {
- 	.name		= "sh-sci",
- 	.id		= 1,
-+	.resource	= scif1_resources,
-+	.num_resources	= ARRAY_SIZE(scif1_resources),
- 	.dev		= {
- 		.platform_data	= &scif1_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif2_platform_data = {
--	.mapbase	= 0xfffe9000,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
- 			  SCSCR_REIE | SCSCR_TOIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
--	.irqs		=  { 241, 242, 243, 240 },
- 	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,
- };
- 
-+static struct resource scif2_resources[] = {
-+	DEFINE_RES_MEM(0xfffe9000, 0x100),
-+	DEFINE_RES_IRQ(241),
-+	DEFINE_RES_IRQ(242),
-+	DEFINE_RES_IRQ(243),
-+	DEFINE_RES_IRQ(240),
-+};
-+
- static struct platform_device scif2_device = {
- 	.name		= "sh-sci",
- 	.id		= 2,
-+	.resource	= scif2_resources,
-+	.num_resources	= ARRAY_SIZE(scif2_resources),
- 	.dev		= {
- 		.platform_data	= &scif2_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif3_platform_data = {
--	.mapbase	= 0xfffe9800,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
- 			  SCSCR_REIE | SCSCR_TOIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
--	.irqs		=  { 245, 246, 247, 244 },
- 	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,
- };
- 
-+static struct resource scif3_resources[] = {
-+	DEFINE_RES_MEM(0xfffe9800, 0x100),
-+	DEFINE_RES_IRQ(245),
-+	DEFINE_RES_IRQ(246),
-+	DEFINE_RES_IRQ(247),
-+	DEFINE_RES_IRQ(244),
-+};
-+
- static struct platform_device scif3_device = {
- 	.name		= "sh-sci",
- 	.id		= 3,
-+	.resource	= scif3_resources,
-+	.num_resources	= ARRAY_SIZE(scif3_resources),
- 	.dev		= {
- 		.platform_data	= &scif3_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif4_platform_data = {
--	.mapbase	= 0xfffea000,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
- 			  SCSCR_REIE | SCSCR_TOIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
--	.irqs		=  { 249, 250, 251, 248 },
- 	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,
- };
- 
-+static struct resource scif4_resources[] = {
-+	DEFINE_RES_MEM(0xfffea000, 0x100),
-+	DEFINE_RES_IRQ(249),
-+	DEFINE_RES_IRQ(250),
-+	DEFINE_RES_IRQ(251),
-+	DEFINE_RES_IRQ(248),
-+};
-+
- static struct platform_device scif4_device = {
- 	.name		= "sh-sci",
- 	.id		= 4,
-+	.resource	= scif4_resources,
-+	.num_resources	= ARRAY_SIZE(scif4_resources),
- 	.dev		= {
- 		.platform_data	= &scif4_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif5_platform_data = {
--	.mapbase	= 0xfffea800,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
- 			  SCSCR_REIE | SCSCR_TOIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
--	.irqs		=  { 253, 254, 255, 252 },
- 	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,
- };
- 
-+static struct resource scif5_resources[] = {
-+	DEFINE_RES_MEM(0xfffea800, 0x100),
-+	DEFINE_RES_IRQ(253),
-+	DEFINE_RES_IRQ(254),
-+	DEFINE_RES_IRQ(255),
-+	DEFINE_RES_IRQ(252),
-+};
-+
- static struct platform_device scif5_device = {
- 	.name		= "sh-sci",
- 	.id		= 5,
-+	.resource	= scif5_resources,
-+	.num_resources	= ARRAY_SIZE(scif5_resources),
- 	.dev		= {
- 		.platform_data	= &scif5_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif6_platform_data = {
--	.mapbase	= 0xfffeb000,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
- 			  SCSCR_REIE | SCSCR_TOIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
--	.irqs		=  { 257, 258, 259, 256 },
- 	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,
- };
- 
-+static struct resource scif6_resources[] = {
-+	DEFINE_RES_MEM(0xfffeb000, 0x100),
-+	DEFINE_RES_IRQ(257),
-+	DEFINE_RES_IRQ(258),
-+	DEFINE_RES_IRQ(259),
-+	DEFINE_RES_IRQ(256),
-+};
-+
- static struct platform_device scif6_device = {
- 	.name		= "sh-sci",
- 	.id		= 6,
-+	.resource	= scif6_resources,
-+	.num_resources	= ARRAY_SIZE(scif6_resources),
- 	.dev		= {
- 		.platform_data	= &scif6_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif7_platform_data = {
--	.mapbase	= 0xfffeb800,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
- 			  SCSCR_REIE | SCSCR_TOIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
--	.irqs		=  { 261, 262, 263, 260 },
- 	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,
- };
- 
-+static struct resource scif7_resources[] = {
-+	DEFINE_RES_MEM(0xfffeb800, 0x100),
-+	DEFINE_RES_IRQ(261),
-+	DEFINE_RES_IRQ(262),
-+	DEFINE_RES_IRQ(263),
-+	DEFINE_RES_IRQ(260),
-+};
-+
- static struct platform_device scif7_device = {
- 	.name		= "sh-sci",
- 	.id		= 7,
-+	.resource	= scif7_resources,
-+	.num_resources	= ARRAY_SIZE(scif7_resources),
- 	.dev		= {
- 		.platform_data	= &scif7_platform_data,
- 	},
-diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7269.c b/arch/sh/kernel/cpu/sh2a/setup-sh7269.c
-index e82ae9d8d3bc..5cdbaac322a0 100644
---- a/arch/sh/kernel/cpu/sh2a/setup-sh7269.c
-+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7269.c
-@@ -248,152 +248,216 @@ static DECLARE_INTC_DESC(intc_desc, "sh7269", vectors, groups,
- 			 mask_registers, prio_registers, NULL);
- 
- static struct plat_sci_port scif0_platform_data = {
--	.mapbase	= 0xe8007000,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
- 			  SCSCR_REIE | SCSCR_TOIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
--	.irqs		=  { 259, 260, 261, 258 },
- 	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,
- };
- 
-+static struct resource scif0_resources[] = {
-+	DEFINE_RES_MEM(0xe8007000, 0x100),
-+	DEFINE_RES_IRQ(259),
-+	DEFINE_RES_IRQ(260),
-+	DEFINE_RES_IRQ(261),
-+	DEFINE_RES_IRQ(258),
-+};
-+
- static struct platform_device scif0_device = {
- 	.name		= "sh-sci",
- 	.id		= 0,
-+	.resource	= scif0_resources,
-+	.num_resources	= ARRAY_SIZE(scif0_resources),
- 	.dev		= {
- 		.platform_data	= &scif0_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif1_platform_data = {
--	.mapbase	= 0xe8007800,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
- 			  SCSCR_REIE | SCSCR_TOIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
--	.irqs		=  { 263, 264, 265, 262 },
- 	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,
- };
- 
-+static struct resource scif1_resources[] = {
-+	DEFINE_RES_MEM(0xe8007800, 0x100),
-+	DEFINE_RES_IRQ(263),
-+	DEFINE_RES_IRQ(264),
-+	DEFINE_RES_IRQ(265),
-+	DEFINE_RES_IRQ(262),
-+};
-+
- static struct platform_device scif1_device = {
- 	.name		= "sh-sci",
- 	.id		= 1,
-+	.resource	= scif1_resources,
-+	.num_resources	= ARRAY_SIZE(scif1_resources),
- 	.dev		= {
- 		.platform_data	= &scif1_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif2_platform_data = {
--	.mapbase	= 0xe8008000,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
- 			  SCSCR_REIE | SCSCR_TOIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
--	.irqs		=  { 267, 268, 269, 266 },
- 	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,
- };
- 
-+static struct resource scif2_resources[] = {
-+	DEFINE_RES_MEM(0xe8008000, 0x100),
-+	DEFINE_RES_IRQ(267),
-+	DEFINE_RES_IRQ(268),
-+	DEFINE_RES_IRQ(269),
-+	DEFINE_RES_IRQ(266),
-+};
-+
- static struct platform_device scif2_device = {
- 	.name		= "sh-sci",
- 	.id		= 2,
-+	.resource	= scif2_resources,
-+	.num_resources	= ARRAY_SIZE(scif2_resources),
- 	.dev		= {
- 		.platform_data	= &scif2_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif3_platform_data = {
--	.mapbase	= 0xe8008800,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
- 			  SCSCR_REIE | SCSCR_TOIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
--	.irqs		=  { 271, 272, 273, 270 },
- 	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,
- };
- 
-+static struct resource scif3_resources[] = {
-+	DEFINE_RES_MEM(0xe8008800, 0x100),
-+	DEFINE_RES_IRQ(271),
-+	DEFINE_RES_IRQ(272),
-+	DEFINE_RES_IRQ(273),
-+	DEFINE_RES_IRQ(270),
-+};
-+
- static struct platform_device scif3_device = {
- 	.name		= "sh-sci",
- 	.id		= 3,
-+	.resource	= scif3_resources,
-+	.num_resources	= ARRAY_SIZE(scif3_resources),
- 	.dev		= {
- 		.platform_data	= &scif3_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif4_platform_data = {
--	.mapbase	= 0xe8009000,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
- 			  SCSCR_REIE | SCSCR_TOIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
--	.irqs		=  { 275, 276, 277, 274 },
- 	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,
- };
- 
-+static struct resource scif4_resources[] = {
-+	DEFINE_RES_MEM(0xe8009000, 0x100),
-+	DEFINE_RES_IRQ(275),
-+	DEFINE_RES_IRQ(276),
-+	DEFINE_RES_IRQ(277),
-+	DEFINE_RES_IRQ(274),
-+};
-+
- static struct platform_device scif4_device = {
- 	.name		= "sh-sci",
- 	.id		= 4,
-+	.resource	= scif4_resources,
-+	.num_resources	= ARRAY_SIZE(scif4_resources),
- 	.dev		= {
- 		.platform_data	= &scif4_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif5_platform_data = {
--	.mapbase	= 0xe8009800,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
- 			  SCSCR_REIE | SCSCR_TOIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
--	.irqs		=  { 279, 280, 281, 278 },
- 	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,
- };
- 
-+static struct resource scif5_resources[] = {
-+	DEFINE_RES_MEM(0xe8009800, 0x100),
-+	DEFINE_RES_IRQ(279),
-+	DEFINE_RES_IRQ(280),
-+	DEFINE_RES_IRQ(281),
-+	DEFINE_RES_IRQ(278),
-+};
-+
- static struct platform_device scif5_device = {
- 	.name		= "sh-sci",
- 	.id		= 5,
-+	.resource	= scif5_resources,
-+	.num_resources	= ARRAY_SIZE(scif5_resources),
- 	.dev		= {
- 		.platform_data	= &scif5_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif6_platform_data = {
--	.mapbase	= 0xe800a000,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
- 			  SCSCR_REIE | SCSCR_TOIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
--	.irqs		=  { 283, 284, 285, 282 },
- 	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,
- };
- 
-+static struct resource scif6_resources[] = {
-+	DEFINE_RES_MEM(0xe800a000, 0x100),
-+	DEFINE_RES_IRQ(283),
-+	DEFINE_RES_IRQ(284),
-+	DEFINE_RES_IRQ(285),
-+	DEFINE_RES_IRQ(282),
-+};
-+
- static struct platform_device scif6_device = {
- 	.name		= "sh-sci",
- 	.id		= 6,
-+	.resource	= scif6_resources,
-+	.num_resources	= ARRAY_SIZE(scif6_resources),
- 	.dev		= {
- 		.platform_data	= &scif6_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif7_platform_data = {
--	.mapbase	= 0xe800a800,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
- 			  SCSCR_REIE | SCSCR_TOIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
--	.irqs		=  { 287, 288, 289, 286 },
- 	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,
- };
- 
-+static struct resource scif7_resources[] = {
-+	DEFINE_RES_MEM(0xe800a800, 0x100),
-+	DEFINE_RES_IRQ(287),
-+	DEFINE_RES_IRQ(288),
-+	DEFINE_RES_IRQ(289),
-+	DEFINE_RES_IRQ(286),
-+};
-+
- static struct platform_device scif7_device = {
- 	.name		= "sh-sci",
- 	.id		= 7,
-+	.resource	= scif7_resources,
-+	.num_resources	= ARRAY_SIZE(scif7_resources),
- 	.dev		= {
- 		.platform_data	= &scif7_platform_data,
- 	},
-diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7705.c b/arch/sh/kernel/cpu/sh3/setup-sh7705.c
-index 03e4c96f2b11..10dd0a01d5f8 100644
---- a/arch/sh/kernel/cpu/sh3/setup-sh7705.c
-+++ b/arch/sh/kernel/cpu/sh3/setup-sh7705.c
-@@ -70,39 +70,49 @@ static DECLARE_INTC_DESC(intc_desc, "sh7705", vectors, NULL,
- 			 NULL, prio_registers, NULL);
- 
- static struct plat_sci_port scif0_platform_data = {
--	.mapbase	= 0xa4410000,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_TIE | SCSCR_RIE  | SCSCR_TE |
- 			  SCSCR_RE  | SCSCR_CKE1 | SCSCR_CKE0,
- 	.scbrr_algo_id	= SCBRR_ALGO_4,
- 	.type		= PORT_SCIF,
--	.irqs		= SCIx_IRQ_MUXED(evt2irq(0x900)),
- 	.ops		= &sh770x_sci_port_ops,
- 	.regtype	= SCIx_SH7705_SCIF_REGTYPE,
- };
- 
-+static struct resource scif0_resources[] = {
-+	DEFINE_RES_MEM(0xa4410000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0x900)),
-+};
-+
- static struct platform_device scif0_device = {
- 	.name		= "sh-sci",
- 	.id		= 0,
-+	.resource	= scif0_resources,
-+	.num_resources	= ARRAY_SIZE(scif0_resources),
- 	.dev		= {
- 		.platform_data	= &scif0_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif1_platform_data = {
--	.mapbase	= 0xa4400000,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_TIE | SCSCR_RIE | SCSCR_TE | SCSCR_RE,
- 	.scbrr_algo_id	= SCBRR_ALGO_4,
- 	.type		= PORT_SCIF,
--	.irqs		= SCIx_IRQ_MUXED(evt2irq(0x880)),
- 	.ops		= &sh770x_sci_port_ops,
- 	.regtype	= SCIx_SH7705_SCIF_REGTYPE,
- };
- 
-+static struct resource scif1_resources[] = {
-+	DEFINE_RES_MEM(0xa4400000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0x880)),
-+};
-+
- static struct platform_device scif1_device = {
- 	.name		= "sh-sci",
- 	.id		= 1,
-+	.resource	= scif1_resources,
-+	.num_resources	= ARRAY_SIZE(scif1_resources),
- 	.dev		= {
- 		.platform_data	= &scif1_platform_data,
- 	},
-diff --git a/arch/sh/kernel/cpu/sh3/setup-sh770x.c b/arch/sh/kernel/cpu/sh3/setup-sh770x.c
-index ba26cd9ce69b..d5541b0a6dc5 100644
---- a/arch/sh/kernel/cpu/sh3/setup-sh770x.c
-+++ b/arch/sh/kernel/cpu/sh3/setup-sh770x.c
-@@ -109,20 +109,25 @@ static struct platform_device rtc_device = {
- };
- 
- static struct plat_sci_port scif0_platform_data = {
--	.mapbase	= 0xfffffe80,
- 	.port_reg	= 0xa4000136,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_TE | SCSCR_RE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCI,
--	.irqs		= SCIx_IRQ_MUXED(evt2irq(0x4e0)),
- 	.ops		= &sh770x_sci_port_ops,
- 	.regshift	= 1,
- };
- 
-+static struct resource scif0_resources[] = {
-+	DEFINE_RES_MEM(0xfffffe80, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0x4e0)),
-+};
-+
- static struct platform_device scif0_device = {
- 	.name		= "sh-sci",
- 	.id		= 0,
-+	.resource	= scif0_resources,
-+	.num_resources	= ARRAY_SIZE(scif0_resources),
- 	.dev		= {
- 		.platform_data	= &scif0_platform_data,
- 	},
-@@ -131,19 +136,24 @@ static struct platform_device scif0_device = {
-     defined(CONFIG_CPU_SUBTYPE_SH7707) || \
-     defined(CONFIG_CPU_SUBTYPE_SH7709)
- static struct plat_sci_port scif1_platform_data = {
--	.mapbase	= 0xa4000150,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_TE | SCSCR_RE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
--	.irqs		= SCIx_IRQ_MUXED(evt2irq(0x900)),
- 	.ops		= &sh770x_sci_port_ops,
- 	.regtype	= SCIx_SH3_SCIF_REGTYPE,
- };
- 
-+static struct resource scif1_resources[] = {
-+	DEFINE_RES_MEM(0xa4000150, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0x900)),
-+};
-+
- static struct platform_device scif1_device = {
- 	.name		= "sh-sci",
- 	.id		= 1,
-+	.resource	= scif1_resources,
-+	.num_resources	= ARRAY_SIZE(scif1_resources),
- 	.dev		= {
- 		.platform_data	= &scif1_platform_data,
- 	},
-@@ -152,20 +162,25 @@ static struct platform_device scif1_device = {
- #if defined(CONFIG_CPU_SUBTYPE_SH7707) || \
-     defined(CONFIG_CPU_SUBTYPE_SH7709)
- static struct plat_sci_port scif2_platform_data = {
--	.mapbase	= 0xa4000140,
- 	.port_reg	= SCIx_NOT_SUPPORTED,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_TE | SCSCR_RE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_IRDA,
--	.irqs		= SCIx_IRQ_MUXED(evt2irq(0x880)),
- 	.ops		= &sh770x_sci_port_ops,
- 	.regshift	= 1,
- };
- 
-+static struct resource scif2_resources[] = {
-+	DEFINE_RES_MEM(0xa4000140, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0x880)),
-+};
-+
- static struct platform_device scif2_device = {
- 	.name		= "sh-sci",
- 	.id		= 2,
-+	.resource	= scif2_resources,
-+	.num_resources	= ARRAY_SIZE(scif2_resources),
- 	.dev		= {
- 		.platform_data	= &scif2_platform_data,
- 	},
-diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7710.c b/arch/sh/kernel/cpu/sh3/setup-sh7710.c
-index 93c9c5e24a7a..de229f5c6b1e 100644
---- a/arch/sh/kernel/cpu/sh3/setup-sh7710.c
-+++ b/arch/sh/kernel/cpu/sh3/setup-sh7710.c
-@@ -98,36 +98,46 @@ static struct platform_device rtc_device = {
- };
- 
- static struct plat_sci_port scif0_platform_data = {
--	.mapbase	= 0xa4400000,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_TE | SCSCR_RE | SCSCR_REIE |
- 			  SCSCR_CKE1 | SCSCR_CKE0,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
--	.irqs		= SCIx_IRQ_MUXED(evt2irq(0x880)),
-+};
-+
-+static struct resource scif0_resources[] = {
-+	DEFINE_RES_MEM(0xa4400000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0x880)),
- };
- 
- static struct platform_device scif0_device = {
- 	.name		= "sh-sci",
- 	.id		= 0,
-+	.resource	= scif0_resources,
-+	.num_resources	= ARRAY_SIZE(scif0_resources),
- 	.dev		= {
- 		.platform_data	= &scif0_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif1_platform_data = {
--	.mapbase	= 0xa4410000,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_TE | SCSCR_RE | SCSCR_REIE |
- 			  SCSCR_CKE1 | SCSCR_CKE0,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
--	.irqs           = SCIx_IRQ_MUXED(evt2irq(0x900)),
-+};
-+
-+static struct resource scif1_resources[] = {
-+	DEFINE_RES_MEM(0xa4410000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0x900)),
- };
- 
- static struct platform_device scif1_device = {
- 	.name		= "sh-sci",
- 	.id		= 1,
-+	.resource	= scif1_resources,
-+	.num_resources	= ARRAY_SIZE(scif1_resources),
- 	.dev		= {
- 		.platform_data	= &scif1_platform_data,
- 	},
-diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7720.c b/arch/sh/kernel/cpu/sh3/setup-sh7720.c
-index 42d991f632b1..ca835819357b 100644
---- a/arch/sh/kernel/cpu/sh3/setup-sh7720.c
-+++ b/arch/sh/kernel/cpu/sh3/setup-sh7720.c
-@@ -52,38 +52,48 @@ static struct platform_device rtc_device = {
- };
- 
- static struct plat_sci_port scif0_platform_data = {
--	.mapbase	= 0xa4430000,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE,
- 	.scbrr_algo_id	= SCBRR_ALGO_4,
- 	.type		= PORT_SCIF,
--	.irqs		= SCIx_IRQ_MUXED(evt2irq(0xc00)),
- 	.ops		= &sh7720_sci_port_ops,
- 	.regtype	= SCIx_SH7705_SCIF_REGTYPE,
- };
- 
-+static struct resource scif0_resources[] = {
-+	DEFINE_RES_MEM(0xa4430000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0xc00)),
-+};
-+
- static struct platform_device scif0_device = {
- 	.name		= "sh-sci",
- 	.id		= 0,
-+	.resource	= scif0_resources,
-+	.num_resources	= ARRAY_SIZE(scif0_resources),
- 	.dev		= {
- 		.platform_data	= &scif0_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif1_platform_data = {
--	.mapbase	= 0xa4438000,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE,
- 	.scbrr_algo_id	= SCBRR_ALGO_4,
- 	.type		= PORT_SCIF,
--	.irqs           = SCIx_IRQ_MUXED(evt2irq(0xc20)),
- 	.ops		= &sh7720_sci_port_ops,
- 	.regtype	= SCIx_SH7705_SCIF_REGTYPE,
- };
- 
-+static struct resource scif1_resources[] = {
-+	DEFINE_RES_MEM(0xa4438000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0xc20)),
-+};
-+
- static struct platform_device scif1_device = {
- 	.name		= "sh-sci",
- 	.id		= 1,
-+	.resource	= scif1_resources,
-+	.num_resources	= ARRAY_SIZE(scif1_resources),
- 	.dev		= {
- 		.platform_data	= &scif1_platform_data,
- 	},
-diff --git a/arch/sh/kernel/cpu/sh4/setup-sh4-202.c b/arch/sh/kernel/cpu/sh4/setup-sh4-202.c
-index 2a5320aa73bb..0fc6a105144a 100644
---- a/arch/sh/kernel/cpu/sh4/setup-sh4-202.c
-+++ b/arch/sh/kernel/cpu/sh4/setup-sh4-202.c
-@@ -17,20 +17,25 @@
- #include <linux/io.h>
- 
- static struct plat_sci_port scif0_platform_data = {
--	.mapbase	= 0xffe80000,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
--	.irqs		= { evt2irq(0x700),
--			    evt2irq(0x720),
--			    evt2irq(0x760),
--			    evt2irq(0x740) },
-+};
-+
-+static struct resource scif0_resources[] = {
-+	DEFINE_RES_MEM(0xffe80000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0x700)),
-+	DEFINE_RES_IRQ(evt2irq(0x720)),
-+	DEFINE_RES_IRQ(evt2irq(0x760)),
-+	DEFINE_RES_IRQ(evt2irq(0x740)),
- };
- 
- static struct platform_device scif0_device = {
- 	.name		= "sh-sci",
- 	.id		= 0,
-+	.resource	= scif0_resources,
-+	.num_resources	= ARRAY_SIZE(scif0_resources),
- 	.dev		= {
- 		.platform_data	= &scif0_platform_data,
- 	},
-diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7750.c b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
-index 04a45512596f..5613c15d8163 100644
---- a/arch/sh/kernel/cpu/sh4/setup-sh7750.c
-+++ b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
-@@ -38,36 +38,46 @@ static struct platform_device rtc_device = {
- };
- 
- static struct plat_sci_port sci_platform_data = {
--	.mapbase	= 0xffe00000,
- 	.port_reg	= 0xffe0001C,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_TE | SCSCR_RE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCI,
--	.irqs		= SCIx_IRQ_MUXED(evt2irq(0x4e0)),
- 	.regshift	= 2,
- };
- 
-+static struct resource sci_resources[] = {
-+	DEFINE_RES_MEM(0xffe00000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0x4e0)),
-+};
-+
- static struct platform_device sci_device = {
- 	.name		= "sh-sci",
- 	.id		= 0,
-+	.resource	= sci_resources,
-+	.num_resources	= ARRAY_SIZE(sci_resources),
- 	.dev		= {
- 		.platform_data	= &sci_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif_platform_data = {
--	.mapbase	= 0xffe80000,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_TE | SCSCR_RE | SCSCR_REIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
--	.irqs		= SCIx_IRQ_MUXED(evt2irq(0x700)),
-+};
-+
-+static struct resource scif_resources[] = {
-+	DEFINE_RES_MEM(0xffe80000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0x700)),
- };
- 
- static struct platform_device scif_device = {
- 	.name		= "sh-sci",
- 	.id		= 1,
-+	.resource	= scif_resources,
-+	.num_resources	= ARRAY_SIZE(scif_resources),
- 	.dev		= {
- 		.platform_data	= &scif_platform_data,
- 	},
-diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7760.c b/arch/sh/kernel/cpu/sh4/setup-sh7760.c
-index 98e075ada44e..a83e6f5a42d0 100644
---- a/arch/sh/kernel/cpu/sh4/setup-sh7760.c
-+++ b/arch/sh/kernel/cpu/sh4/setup-sh7760.c
-@@ -128,83 +128,103 @@ static DECLARE_INTC_DESC(intc_desc_irq, "sh7760-irq", vectors_irq, groups,
- 			 mask_registers, prio_registers, NULL);
- 
- static struct plat_sci_port scif0_platform_data = {
--	.mapbase	= 0xfe600000,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
--	.irqs		= { evt2irq(0x880),
--			    evt2irq(0x8a0),
--			    evt2irq(0x8e0),
--			    evt2irq(0x8c0) },
- 	.regtype	= SCIx_SH4_SCIF_FIFODATA_REGTYPE,
- };
- 
-+static struct resource scif0_resources[] = {
-+	DEFINE_RES_MEM(0xfe600000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0x880)),
-+	DEFINE_RES_IRQ(evt2irq(0x8a0)),
-+	DEFINE_RES_IRQ(evt2irq(0x8e0)),
-+	DEFINE_RES_IRQ(evt2irq(0x8c0)),
-+};
-+
- static struct platform_device scif0_device = {
- 	.name		= "sh-sci",
- 	.id		= 0,
-+	.resource	= scif0_resources,
-+	.num_resources	= ARRAY_SIZE(scif0_resources),
- 	.dev		= {
- 		.platform_data	= &scif0_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif1_platform_data = {
--	.mapbase	= 0xfe610000,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.type		= PORT_SCIF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
--	.irqs		= { evt2irq(0xb00),
--			    evt2irq(0xb20),
--			    evt2irq(0xb60),
--			    evt2irq(0xb40) },
- 	.regtype	= SCIx_SH4_SCIF_FIFODATA_REGTYPE,
- };
- 
-+static struct resource scif1_resources[] = {
-+	DEFINE_RES_MEM(0xfe610000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0xb00)),
-+	DEFINE_RES_IRQ(evt2irq(0xb20)),
-+	DEFINE_RES_IRQ(evt2irq(0xb60)),
-+	DEFINE_RES_IRQ(evt2irq(0xb40)),
-+};
-+
- static struct platform_device scif1_device = {
- 	.name		= "sh-sci",
- 	.id		= 1,
-+	.resource	= scif1_resources,
-+	.num_resources	= ARRAY_SIZE(scif1_resources),
- 	.dev		= {
- 		.platform_data	= &scif1_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif2_platform_data = {
--	.mapbase	= 0xfe620000,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
--	.irqs		= { evt2irq(0xb80),
--			    evt2irq(0xba0),
--			    evt2irq(0xbe0),
--			    evt2irq(0xbc0) },
- 	.regtype	= SCIx_SH4_SCIF_FIFODATA_REGTYPE,
- };
- 
-+static struct resource scif2_resources[] = {
-+	DEFINE_RES_MEM(0xfe620000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0xb80)),
-+	DEFINE_RES_IRQ(evt2irq(0xba0)),
-+	DEFINE_RES_IRQ(evt2irq(0xbe0)),
-+	DEFINE_RES_IRQ(evt2irq(0xbc0)),
-+};
-+
- static struct platform_device scif2_device = {
- 	.name		= "sh-sci",
- 	.id		= 2,
-+	.resource	= scif2_resources,
-+	.num_resources	= ARRAY_SIZE(scif2_resources),
- 	.dev		= {
- 		.platform_data	= &scif2_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif3_platform_data = {
--	.mapbase	= 0xfe480000,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCI,
--	.irqs		= { evt2irq(0xc00),
--			    evt2irq(0xc20),
--			    evt2irq(0xc40), },
- 	.regshift	= 2,
- };
- 
-+static struct resource scif3_resources[] = {
-+	DEFINE_RES_MEM(0xfe480000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0xc00)),
-+	DEFINE_RES_IRQ(evt2irq(0xc20)),
-+	DEFINE_RES_IRQ(evt2irq(0xc40)),
-+};
-+
- static struct platform_device scif3_device = {
- 	.name		= "sh-sci",
- 	.id		= 3,
-+	.resource	= scif3_resources,
-+	.num_resources	= ARRAY_SIZE(scif3_resources),
- 	.dev		= {
- 		.platform_data	= &scif3_platform_data,
- 	},
-diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
-index b91ea8300a3e..8b45f672448d 100644
---- a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
-+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
-@@ -18,68 +18,88 @@
- 
- /* Serial */
- static struct plat_sci_port scif0_platform_data = {
--	.mapbase        = 0xffe00000,
- 	.flags          = UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type           = PORT_SCIF,
--	.irqs           = SCIx_IRQ_MUXED(evt2irq(0xc00)),
-+};
-+
-+static struct resource scif0_resources[] = {
-+	DEFINE_RES_MEM(0xffe00000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0xc00)),
- };
- 
- static struct platform_device scif0_device = {
- 	.name		= "sh-sci",
- 	.id		= 0,
-+	.resource	= scif0_resources,
-+	.num_resources	= ARRAY_SIZE(scif0_resources),
- 	.dev		= {
- 		.platform_data	= &scif0_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif1_platform_data = {
--	.mapbase        = 0xffe10000,
- 	.flags          = UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type           = PORT_SCIF,
--	.irqs           = SCIx_IRQ_MUXED(evt2irq(0xc20)),
-+};
-+
-+static struct resource scif1_resources[] = {
-+	DEFINE_RES_MEM(0xffe10000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0xc20)),
- };
- 
- static struct platform_device scif1_device = {
- 	.name		= "sh-sci",
- 	.id		= 1,
-+	.resource	= scif1_resources,
-+	.num_resources	= ARRAY_SIZE(scif1_resources),
- 	.dev		= {
- 		.platform_data	= &scif1_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif2_platform_data = {
--	.mapbase        = 0xffe20000,
- 	.flags          = UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type           = PORT_SCIF,
--	.irqs           = SCIx_IRQ_MUXED(evt2irq(0xc40)),
-+};
-+
-+static struct resource scif2_resources[] = {
-+	DEFINE_RES_MEM(0xffe20000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0xc40)),
- };
- 
- static struct platform_device scif2_device = {
- 	.name		= "sh-sci",
- 	.id		= 2,
-+	.resource	= scif2_resources,
-+	.num_resources	= ARRAY_SIZE(scif2_resources),
- 	.dev		= {
- 		.platform_data	= &scif2_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif3_platform_data = {
--	.mapbase        = 0xffe30000,
- 	.flags          = UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type           = PORT_SCIF,
--	.irqs           = SCIx_IRQ_MUXED(evt2irq(0xc60)),
-+};
-+
-+static struct resource scif3_resources[] = {
-+	DEFINE_RES_MEM(0xffe30000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0xc60)),
- };
- 
- static struct platform_device scif3_device = {
- 	.name		= "sh-sci",
- 	.id		= 3,
-+	.resource	= scif3_resources,
-+	.num_resources	= ARRAY_SIZE(scif3_resources),
- 	.dev		= {
- 		.platform_data	= &scif3_platform_data,
- 	},
-diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
-index 0bd09d51419f..317f710a5b2b 100644
---- a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
-+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
-@@ -20,18 +20,23 @@
- #include <asm/clock.h>
- 
- static struct plat_sci_port scif0_platform_data = {
--	.mapbase	= 0xffe00000,
- 	.port_reg	= 0xa405013e,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
--	.irqs		= SCIx_IRQ_MUXED(evt2irq(0xc00)),
-+};
-+
-+static struct resource scif0_resources[] = {
-+	DEFINE_RES_MEM(0xffe00000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0xc00)),
- };
- 
- static struct platform_device scif0_device = {
- 	.name		= "sh-sci",
- 	.id		= 0,
-+	.resource	= scif0_resources,
-+	.num_resources	= ARRAY_SIZE(scif0_resources),
- 	.dev		= {
- 		.platform_data	= &scif0_platform_data,
- 	},
-diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
-index 6a868b091c2d..6aeebb5299f6 100644
---- a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
-+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
-@@ -179,57 +179,72 @@ struct platform_device dma_device = {
- 
- /* Serial */
- static struct plat_sci_port scif0_platform_data = {
--	.mapbase        = 0xffe00000,
- 	.flags          = UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type           = PORT_SCIF,
--	.irqs           = SCIx_IRQ_MUXED(evt2irq(0xc00)),
- 	.ops		= &sh7722_sci_port_ops,
- 	.regtype	= SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
- };
- 
-+static struct resource scif0_resources[] = {
-+	DEFINE_RES_MEM(0xffe00000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0xc00)),
-+};
-+
- static struct platform_device scif0_device = {
- 	.name		= "sh-sci",
- 	.id		= 0,
-+	.resource	= scif0_resources,
-+	.num_resources	= ARRAY_SIZE(scif0_resources),
- 	.dev		= {
- 		.platform_data	= &scif0_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif1_platform_data = {
--	.mapbase        = 0xffe10000,
- 	.flags          = UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type           = PORT_SCIF,
--	.irqs           = SCIx_IRQ_MUXED(evt2irq(0xc20)),
- 	.ops		= &sh7722_sci_port_ops,
- 	.regtype	= SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
- };
- 
-+static struct resource scif1_resources[] = {
-+	DEFINE_RES_MEM(0xffe10000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0xc20)),
-+};
-+
- static struct platform_device scif1_device = {
- 	.name		= "sh-sci",
- 	.id		= 1,
-+	.resource	= scif1_resources,
-+	.num_resources	= ARRAY_SIZE(scif1_resources),
- 	.dev		= {
- 		.platform_data	= &scif1_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif2_platform_data = {
--	.mapbase        = 0xffe20000,
- 	.flags          = UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type           = PORT_SCIF,
--	.irqs           = SCIx_IRQ_MUXED(evt2irq(0xc40)),
- 	.ops		= &sh7722_sci_port_ops,
- 	.regtype	= SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
- };
- 
-+static struct resource scif2_resources[] = {
-+	DEFINE_RES_MEM(0xffe20000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0xc40)),
-+};
-+
- static struct platform_device scif2_device = {
- 	.name		= "sh-sci",
- 	.id		= 2,
-+	.resource	= scif2_resources,
-+	.num_resources	= ARRAY_SIZE(scif2_resources),
- 	.dev		= {
- 		.platform_data	= &scif2_platform_data,
- 	},
-diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
-index 28d6fd835fe0..521a09ef4ffe 100644
---- a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
-+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
-@@ -23,111 +23,141 @@
- 
- /* Serial */
- static struct plat_sci_port scif0_platform_data = {
--	.mapbase        = 0xffe00000,
- 	.port_reg	= 0xa4050160,
- 	.flags          = UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type           = PORT_SCIF,
--	.irqs           = SCIx_IRQ_MUXED(evt2irq(0xc00)),
- 	.regtype	= SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
- };
- 
-+static struct resource scif0_resources[] = {
-+	DEFINE_RES_MEM(0xffe00000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0xc00)),
-+};
-+
- static struct platform_device scif0_device = {
- 	.name		= "sh-sci",
- 	.id		= 0,
-+	.resource	= scif0_resources,
-+	.num_resources	= ARRAY_SIZE(scif0_resources),
- 	.dev		= {
- 		.platform_data	= &scif0_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif1_platform_data = {
--	.mapbase        = 0xffe10000,
- 	.port_reg	= SCIx_NOT_SUPPORTED,
- 	.flags          = UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type           = PORT_SCIF,
--	.irqs           = SCIx_IRQ_MUXED(evt2irq(0xc20)),
- 	.regtype	= SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
- };
- 
-+static struct resource scif1_resources[] = {
-+	DEFINE_RES_MEM(0xffe10000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0xc20)),
-+};
-+
- static struct platform_device scif1_device = {
- 	.name		= "sh-sci",
- 	.id		= 1,
-+	.resource	= scif1_resources,
-+	.num_resources	= ARRAY_SIZE(scif1_resources),
- 	.dev		= {
- 		.platform_data	= &scif1_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif2_platform_data = {
--	.mapbase        = 0xffe20000,
- 	.port_reg	= SCIx_NOT_SUPPORTED,
- 	.flags          = UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type           = PORT_SCIF,
--	.irqs           = SCIx_IRQ_MUXED(evt2irq(0xc40)),
- 	.regtype	= SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
- };
- 
-+static struct resource scif2_resources[] = {
-+	DEFINE_RES_MEM(0xffe20000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0xc40)),
-+};
-+
- static struct platform_device scif2_device = {
- 	.name		= "sh-sci",
- 	.id		= 2,
-+	.resource	= scif2_resources,
-+	.num_resources	= ARRAY_SIZE(scif2_resources),
- 	.dev		= {
- 		.platform_data	= &scif2_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif3_platform_data = {
--	.mapbase        = 0xa4e30000,
- 	.flags          = UPF_BOOT_AUTOCONF,
- 	.port_reg	= SCIx_NOT_SUPPORTED,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_3,
- 	.type           = PORT_SCIFA,
--	.irqs           = SCIx_IRQ_MUXED(evt2irq(0x900)),
-+};
-+
-+static struct resource scif3_resources[] = {
-+	DEFINE_RES_MEM(0xa4e30000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0x900)),
- };
- 
- static struct platform_device scif3_device = {
- 	.name		= "sh-sci",
- 	.id		= 3,
-+	.resource	= scif3_resources,
-+	.num_resources	= ARRAY_SIZE(scif3_resources),
- 	.dev		= {
- 		.platform_data	= &scif3_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif4_platform_data = {
--	.mapbase        = 0xa4e40000,
- 	.port_reg	= SCIx_NOT_SUPPORTED,
- 	.flags          = UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_3,
- 	.type           = PORT_SCIFA,
--	.irqs           = SCIx_IRQ_MUXED(evt2irq(0xd00)),
-+};
-+
-+static struct resource scif4_resources[] = {
-+	DEFINE_RES_MEM(0xa4e40000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0xd00)),
- };
- 
- static struct platform_device scif4_device = {
- 	.name		= "sh-sci",
- 	.id		= 4,
-+	.resource	= scif4_resources,
-+	.num_resources	= ARRAY_SIZE(scif4_resources),
- 	.dev		= {
- 		.platform_data	= &scif4_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif5_platform_data = {
--	.mapbase        = 0xa4e50000,
- 	.port_reg	= SCIx_NOT_SUPPORTED,
- 	.flags          = UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_3,
- 	.type           = PORT_SCIFA,
--	.irqs           = SCIx_IRQ_MUXED(evt2irq(0xfa0)),
-+};
-+
-+static struct resource scif5_resources[] = {
-+	DEFINE_RES_MEM(0xa4e50000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0xfa0)),
- };
- 
- static struct platform_device scif5_device = {
- 	.name		= "sh-sci",
- 	.id		= 5,
-+	.resource	= scif5_resources,
-+	.num_resources	= ARRAY_SIZE(scif5_resources),
- 	.dev		= {
- 		.platform_data	= &scif5_platform_data,
- 	},
-diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
-index 26b74c2f9496..fb0a23749147 100644
---- a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
-+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
-@@ -290,111 +290,141 @@ static struct platform_device dma1_device = {
- 
- /* Serial */
- static struct plat_sci_port scif0_platform_data = {
--	.mapbase        = 0xffe00000,
- 	.port_reg	= SCIx_NOT_SUPPORTED,
- 	.flags          = UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type           = PORT_SCIF,
--	.irqs           = SCIx_IRQ_MUXED(evt2irq(0xc00)),
- 	.regtype	= SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
- };
- 
-+static struct resource scif0_resources[] = {
-+	DEFINE_RES_MEM(0xffe00000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0xc00)),
-+};
-+
- static struct platform_device scif0_device = {
- 	.name		= "sh-sci",
- 	.id		= 0,
-+	.resource	= scif0_resources,
-+	.num_resources	= ARRAY_SIZE(scif0_resources),
- 	.dev		= {
- 		.platform_data	= &scif0_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif1_platform_data = {
--	.mapbase        = 0xffe10000,
- 	.port_reg	= SCIx_NOT_SUPPORTED,
- 	.flags          = UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type           = PORT_SCIF,
--	.irqs           = SCIx_IRQ_MUXED(evt2irq(0xc20)),
- 	.regtype	= SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
- };
- 
-+static struct resource scif1_resources[] = {
-+	DEFINE_RES_MEM(0xffe10000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0xc20)),
-+};
-+
- static struct platform_device scif1_device = {
- 	.name		= "sh-sci",
- 	.id		= 1,
-+	.resource	= scif1_resources,
-+	.num_resources	= ARRAY_SIZE(scif1_resources),
- 	.dev		= {
- 		.platform_data	= &scif1_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif2_platform_data = {
--	.mapbase        = 0xffe20000,
- 	.port_reg	= SCIx_NOT_SUPPORTED,
- 	.flags          = UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type           = PORT_SCIF,
--	.irqs           = SCIx_IRQ_MUXED(evt2irq(0xc40)),
- 	.regtype	= SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
- };
- 
-+static struct resource scif2_resources[] = {
-+	DEFINE_RES_MEM(0xffe20000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0xc40)),
-+};
-+
- static struct platform_device scif2_device = {
- 	.name		= "sh-sci",
- 	.id		= 2,
-+	.resource	= scif2_resources,
-+	.num_resources	= ARRAY_SIZE(scif2_resources),
- 	.dev		= {
- 		.platform_data	= &scif2_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif3_platform_data = {
--	.mapbase        = 0xa4e30000,
- 	.port_reg	= SCIx_NOT_SUPPORTED,
- 	.flags          = UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE,
- 	.scbrr_algo_id	= SCBRR_ALGO_3,
- 	.type           = PORT_SCIFA,
--	.irqs           = SCIx_IRQ_MUXED(evt2irq(0x900)),
-+};
-+
-+static struct resource scif3_resources[] = {
-+	DEFINE_RES_MEM(0xa4e30000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0x900)),
- };
- 
- static struct platform_device scif3_device = {
- 	.name		= "sh-sci",
- 	.id		= 3,
-+	.resource	= scif3_resources,
-+	.num_resources	= ARRAY_SIZE(scif3_resources),
- 	.dev		= {
- 		.platform_data	= &scif3_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif4_platform_data = {
--	.mapbase        = 0xa4e40000,
- 	.port_reg	= SCIx_NOT_SUPPORTED,
- 	.flags          = UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE,
- 	.scbrr_algo_id	= SCBRR_ALGO_3,
- 	.type           = PORT_SCIFA,
--	.irqs           = SCIx_IRQ_MUXED(evt2irq(0xd00)),
-+};
-+
-+static struct resource scif4_resources[] = {
-+	DEFINE_RES_MEM(0xa4e40000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0xd00)),
- };
- 
- static struct platform_device scif4_device = {
- 	.name		= "sh-sci",
- 	.id		= 4,
-+	.resource	= scif4_resources,
-+	.num_resources	= ARRAY_SIZE(scif4_resources),
- 	.dev		= {
- 		.platform_data	= &scif4_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif5_platform_data = {
--	.mapbase        = 0xa4e50000,
- 	.port_reg	= SCIx_NOT_SUPPORTED,
- 	.flags          = UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE,
- 	.scbrr_algo_id	= SCBRR_ALGO_3,
- 	.type           = PORT_SCIFA,
--	.irqs           = SCIx_IRQ_MUXED(evt2irq(0xfa0)),
-+};
-+
-+static struct resource scif5_resources[] = {
-+	DEFINE_RES_MEM(0xa4e50000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0xfa0)),
- };
- 
- static struct platform_device scif5_device = {
- 	.name		= "sh-sci",
- 	.id		= 5,
-+	.resource	= scif5_resources,
-+	.num_resources	= ARRAY_SIZE(scif5_resources),
- 	.dev		= {
- 		.platform_data	= &scif5_platform_data,
- 	},
-diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7734.c b/arch/sh/kernel/cpu/sh4a/setup-sh7734.c
-index f799971d453c..bedf8fb5be6f 100644
---- a/arch/sh/kernel/cpu/sh4a/setup-sh7734.c
-+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7734.c
-@@ -25,108 +25,138 @@
- 
- /* SCIF */
- static struct plat_sci_port scif0_platform_data = {
--	.mapbase        = 0xFFE40000,
- 	.flags          = UPF_BOOT_AUTOCONF,
- 	.scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
- 	.scbrr_algo_id  = SCBRR_ALGO_2,
- 	.type           = PORT_SCIF,
--	.irqs           = SCIx_IRQ_MUXED(evt2irq(0x8C0)),
- 	.regtype        = SCIx_SH4_SCIF_REGTYPE,
- };
- 
-+static struct resource scif0_resources[] = {
-+	DEFINE_RES_MEM(0xffe40000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0x8c0)),
-+};
-+
- static struct platform_device scif0_device = {
- 	.name		= "sh-sci",
--	.id			= 0,
-+	.id		= 0,
-+	.resource	= scif0_resources,
-+	.num_resources	= ARRAY_SIZE(scif0_resources),
- 	.dev		= {
- 		.platform_data	= &scif0_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif1_platform_data = {
--	.mapbase        = 0xFFE41000,
- 	.flags          = UPF_BOOT_AUTOCONF,
- 	.scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type           = PORT_SCIF,
--	.irqs           = SCIx_IRQ_MUXED(evt2irq(0x8E0)),
- 	.regtype        = SCIx_SH4_SCIF_REGTYPE,
- };
- 
-+static struct resource scif1_resources[] = {
-+	DEFINE_RES_MEM(0xffe41000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0x8e0)),
-+};
-+
- static struct platform_device scif1_device = {
- 	.name		= "sh-sci",
--	.id         = 1,
-+	.id		= 1,
-+	.resource	= scif1_resources,
-+	.num_resources	= ARRAY_SIZE(scif1_resources),
- 	.dev		= {
- 		.platform_data = &scif1_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif2_platform_data = {
--	.mapbase        = 0xFFE42000,
- 	.flags          = UPF_BOOT_AUTOCONF,
- 	.scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
- 	.scbrr_algo_id  = SCBRR_ALGO_2,
- 	.type           = PORT_SCIF,
--	.irqs           = SCIx_IRQ_MUXED(evt2irq(0x900)),
- 	.regtype        = SCIx_SH4_SCIF_REGTYPE,
- };
- 
-+static struct resource scif2_resources[] = {
-+	DEFINE_RES_MEM(0xffe42000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0x900)),
-+};
-+
- static struct platform_device scif2_device = {
- 	.name		= "sh-sci",
--	.id         = 2,
-+	.id		= 2,
-+	.resource	= scif2_resources,
-+	.num_resources	= ARRAY_SIZE(scif2_resources),
- 	.dev		= {
- 		.platform_data = &scif2_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif3_platform_data = {
--	.mapbase        = 0xFFE43000,
- 	.flags          = UPF_BOOT_AUTOCONF,
- 	.scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
- 	.scbrr_algo_id  = SCBRR_ALGO_2,
- 	.type           = PORT_SCIF,
--	.irqs           = SCIx_IRQ_MUXED(evt2irq(0x920)),
- 	.regtype        = SCIx_SH4_SCIF_REGTYPE,
- };
- 
-+static struct resource scif3_resources[] = {
-+	DEFINE_RES_MEM(0xffe43000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0x920)),
-+};
-+
- static struct platform_device scif3_device = {
- 	.name		= "sh-sci",
--	.id	        = 3,
-+	.id		= 3,
-+	.resource	= scif3_resources,
-+	.num_resources	= ARRAY_SIZE(scif3_resources),
- 	.dev		= {
- 		.platform_data	= &scif3_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif4_platform_data = {
--	.mapbase        = 0xFFE44000,
- 	.flags          = UPF_BOOT_AUTOCONF,
- 	.scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type           = PORT_SCIF,
--	.irqs           = SCIx_IRQ_MUXED(evt2irq(0x940)),
- 	.regtype        = SCIx_SH4_SCIF_REGTYPE,
- };
- 
-+static struct resource scif4_resources[] = {
-+	DEFINE_RES_MEM(0xffe44000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0x940)),
-+};
-+
- static struct platform_device scif4_device = {
- 	.name		= "sh-sci",
--	.id	        = 4,
-+	.id		= 4,
-+	.resource	= scif4_resources,
-+	.num_resources	= ARRAY_SIZE(scif4_resources),
- 	.dev		= {
- 		.platform_data	= &scif4_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif5_platform_data = {
--	.mapbase        = 0xFFE43000,
- 	.flags          = UPF_BOOT_AUTOCONF,
- 	.scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type           = PORT_SCIF,
--	.irqs           = SCIx_IRQ_MUXED(evt2irq(0x960)),
- 	.regtype		= SCIx_SH4_SCIF_REGTYPE,
- };
- 
-+static struct resource scif5_resources[] = {
-+	DEFINE_RES_MEM(0xffe43000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0x960)),
-+};
-+
- static struct platform_device scif5_device = {
- 	.name		= "sh-sci",
--	.id	        = 5,
-+	.id		= 5,
-+	.resource	= scif5_resources,
-+	.num_resources	= ARRAY_SIZE(scif5_resources),
- 	.dev		= {
- 		.platform_data	= &scif5_platform_data,
- 	},
-diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
-index 9079a0f9ea9b..6b8d0e61704c 100644
---- a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
-+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
-@@ -24,51 +24,66 @@
- #include <cpu/sh7757.h>
- 
- static struct plat_sci_port scif2_platform_data = {
--	.mapbase	= 0xfe4b0000,		/* SCIF2 */
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
--	.irqs		= SCIx_IRQ_MUXED(evt2irq(0x700)),
-+};
-+
-+static struct resource scif2_resources[] = {
-+	DEFINE_RES_MEM(0xfe4b0000, 0x100),		/* SCIF2 */
-+	DEFINE_RES_IRQ(evt2irq(0x700)),
- };
- 
- static struct platform_device scif2_device = {
- 	.name		= "sh-sci",
- 	.id		= 0,
-+	.resource	= scif2_resources,
-+	.num_resources	= ARRAY_SIZE(scif2_resources),
- 	.dev		= {
- 		.platform_data	= &scif2_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif3_platform_data = {
--	.mapbase	= 0xfe4c0000,		/* SCIF3 */
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
--	.irqs		= SCIx_IRQ_MUXED(evt2irq(0xb80)),
-+};
-+
-+static struct resource scif3_resources[] = {
-+	DEFINE_RES_MEM(0xfe4c0000, 0x100),		/* SCIF3 */
-+	DEFINE_RES_IRQ(evt2irq(0xb80)),
- };
- 
- static struct platform_device scif3_device = {
- 	.name		= "sh-sci",
- 	.id		= 1,
-+	.resource	= scif3_resources,
-+	.num_resources	= ARRAY_SIZE(scif3_resources),
- 	.dev		= {
- 		.platform_data	= &scif3_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif4_platform_data = {
--	.mapbase	= 0xfe4d0000,		/* SCIF4 */
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
--	.irqs		= SCIx_IRQ_MUXED(evt2irq(0xF00)),
-+};
-+
-+static struct resource scif4_resources[] = {
-+	DEFINE_RES_MEM(0xfe4d0000, 0x100),		/* SCIF4 */
-+	DEFINE_RES_IRQ(evt2irq(0xf00)),
- };
- 
- static struct platform_device scif4_device = {
- 	.name		= "sh-sci",
- 	.id		= 2,
-+	.resource	= scif4_resources,
-+	.num_resources	= ARRAY_SIZE(scif4_resources),
- 	.dev		= {
- 		.platform_data	= &scif4_platform_data,
- 	},
-diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
-index 1686acaaf45a..940505cec66f 100644
---- a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
-+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
-@@ -19,54 +19,69 @@
- #include <linux/usb/ohci_pdriver.h>
- 
- static struct plat_sci_port scif0_platform_data = {
--	.mapbase	= 0xffe00000,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
--	.irqs		= SCIx_IRQ_MUXED(evt2irq(0x700)),
- 	.regtype	= SCIx_SH4_SCIF_FIFODATA_REGTYPE,
- };
- 
-+static struct resource scif0_resources[] = {
-+	DEFINE_RES_MEM(0xffe00000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0x700)),
-+};
-+
- static struct platform_device scif0_device = {
- 	.name		= "sh-sci",
- 	.id		= 0,
-+	.resource	= scif0_resources,
-+	.num_resources	= ARRAY_SIZE(scif0_resources),
- 	.dev		= {
- 		.platform_data	= &scif0_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif1_platform_data = {
--	.mapbase	= 0xffe08000,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
--	.irqs		= SCIx_IRQ_MUXED(evt2irq(0xb80)),
- 	.regtype	= SCIx_SH4_SCIF_FIFODATA_REGTYPE,
- };
- 
-+static struct resource scif1_resources[] = {
-+	DEFINE_RES_MEM(0xffe08000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0xb80)),
-+};
-+
- static struct platform_device scif1_device = {
- 	.name		= "sh-sci",
- 	.id		= 1,
-+	.resource	= scif1_resources,
-+	.num_resources	= ARRAY_SIZE(scif1_resources),
- 	.dev		= {
- 		.platform_data	= &scif1_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif2_platform_data = {
--	.mapbase	= 0xffe10000,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
--	.irqs		= SCIx_IRQ_MUXED(evt2irq(0xf00)),
- 	.regtype	= SCIx_SH4_SCIF_FIFODATA_REGTYPE,
- };
- 
-+static struct resource scif2_resources[] = {
-+	DEFINE_RES_MEM(0xffe10000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0xf00)),
-+};
-+
- static struct platform_device scif2_device = {
- 	.name		= "sh-sci",
- 	.id		= 2,
-+	.resource	= scif2_resources,
-+	.num_resources	= ARRAY_SIZE(scif2_resources),
- 	.dev		= {
- 		.platform_data	= &scif2_platform_data,
- 	},
-diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7770.c b/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
-index 256ea7a45164..f9c04dee4e82 100644
---- a/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
-+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
-@@ -16,170 +16,220 @@
- #include <linux/io.h>
- 
- static struct plat_sci_port scif0_platform_data = {
--	.mapbase	= 0xff923000,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
--	.irqs		= SCIx_IRQ_MUXED(evt2irq(0x9a0)),
-+};
-+
-+static struct resource scif0_resources[] = {
-+	DEFINE_RES_MEM(0xff923000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0x9a0)),
- };
- 
- static struct platform_device scif0_device = {
- 	.name		= "sh-sci",
- 	.id		= 0,
-+	.resource	= scif0_resources,
-+	.num_resources	= ARRAY_SIZE(scif0_resources),
- 	.dev		= {
- 		.platform_data	= &scif0_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif1_platform_data = {
--	.mapbase	= 0xff924000,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
--	.irqs		= SCIx_IRQ_MUXED(evt2irq(0x9c0)),
-+};
-+
-+static struct resource scif1_resources[] = {
-+	DEFINE_RES_MEM(0xff924000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0x9c0)),
- };
- 
- static struct platform_device scif1_device = {
- 	.name		= "sh-sci",
- 	.id		= 1,
-+	.resource	= scif1_resources,
-+	.num_resources	= ARRAY_SIZE(scif1_resources),
- 	.dev		= {
- 		.platform_data	= &scif1_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif2_platform_data = {
--	.mapbase	= 0xff925000,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
--	.irqs		= SCIx_IRQ_MUXED(evt2irq(0x9e0)),
-+};
-+
-+static struct resource scif2_resources[] = {
-+	DEFINE_RES_MEM(0xff925000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0x9e0)),
- };
- 
- static struct platform_device scif2_device = {
- 	.name		= "sh-sci",
- 	.id		= 2,
-+	.resource	= scif2_resources,
-+	.num_resources	= ARRAY_SIZE(scif2_resources),
- 	.dev		= {
- 		.platform_data	= &scif2_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif3_platform_data = {
--	.mapbase	= 0xff926000,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
--	.irqs		= SCIx_IRQ_MUXED(evt2irq(0xa00)),
-+};
-+
-+static struct resource scif3_resources[] = {
-+	DEFINE_RES_MEM(0xff926000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0xa00)),
- };
- 
- static struct platform_device scif3_device = {
- 	.name		= "sh-sci",
- 	.id		= 3,
-+	.resource	= scif3_resources,
-+	.num_resources	= ARRAY_SIZE(scif3_resources),
- 	.dev		= {
- 		.platform_data	= &scif3_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif4_platform_data = {
--	.mapbase	= 0xff927000,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
--	.irqs		= SCIx_IRQ_MUXED(evt2irq(0xa20)),
-+};
-+
-+static struct resource scif4_resources[] = {
-+	DEFINE_RES_MEM(0xff927000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0xa20)),
- };
- 
- static struct platform_device scif4_device = {
- 	.name		= "sh-sci",
- 	.id		= 4,
-+	.resource	= scif4_resources,
-+	.num_resources	= ARRAY_SIZE(scif4_resources),
- 	.dev		= {
- 		.platform_data	= &scif4_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif5_platform_data = {
--	.mapbase	= 0xff928000,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
--	.irqs		= SCIx_IRQ_MUXED(evt2irq(0xa40)),
-+};
-+
-+static struct resource scif5_resources[] = {
-+	DEFINE_RES_MEM(0xff928000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0xa40)),
- };
- 
- static struct platform_device scif5_device = {
- 	.name		= "sh-sci",
- 	.id		= 5,
-+	.resource	= scif5_resources,
-+	.num_resources	= ARRAY_SIZE(scif5_resources),
- 	.dev		= {
- 		.platform_data	= &scif5_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif6_platform_data = {
--	.mapbase	= 0xff929000,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
--	.irqs		= SCIx_IRQ_MUXED(evt2irq(0xa60)),
-+};
-+
-+static struct resource scif6_resources[] = {
-+	DEFINE_RES_MEM(0xff929000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0xa60)),
- };
- 
- static struct platform_device scif6_device = {
- 	.name		= "sh-sci",
- 	.id		= 6,
-+	.resource	= scif6_resources,
-+	.num_resources	= ARRAY_SIZE(scif6_resources),
- 	.dev		= {
- 		.platform_data	= &scif6_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif7_platform_data = {
--	.mapbase	= 0xff92a000,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
--	.irqs		= SCIx_IRQ_MUXED(evt2irq(0xa80)),
-+};
-+
-+static struct resource scif7_resources[] = {
-+	DEFINE_RES_MEM(0xff92a000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0xa80)),
- };
- 
- static struct platform_device scif7_device = {
- 	.name		= "sh-sci",
- 	.id		= 7,
-+	.resource	= scif7_resources,
-+	.num_resources	= ARRAY_SIZE(scif7_resources),
- 	.dev		= {
- 		.platform_data	= &scif7_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif8_platform_data = {
--	.mapbase	= 0xff92b000,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
--	.irqs		= SCIx_IRQ_MUXED(evt2irq(0xaa0)),
-+};
-+
-+static struct resource scif8_resources[] = {
-+	DEFINE_RES_MEM(0xff92b000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0xaa0)),
- };
- 
- static struct platform_device scif8_device = {
- 	.name		= "sh-sci",
- 	.id		= 8,
-+	.resource	= scif8_resources,
-+	.num_resources	= ARRAY_SIZE(scif8_resources),
- 	.dev		= {
- 		.platform_data	= &scif8_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif9_platform_data = {
--	.mapbase	= 0xff92c000,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
--	.irqs		= SCIx_IRQ_MUXED(evt2irq(0xac0)),
-+};
-+
-+static struct resource scif9_resources[] = {
-+	DEFINE_RES_MEM(0xff92c000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0xac0)),
- };
- 
- static struct platform_device scif9_device = {
- 	.name		= "sh-sci",
- 	.id		= 9,
-+	.resource	= scif9_resources,
-+	.num_resources	= ARRAY_SIZE(scif9_resources),
- 	.dev		= {
- 		.platform_data	= &scif9_platform_data,
- 	},
-diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
-index de45b704687a..227f8f4080fa 100644
---- a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
-+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
-@@ -18,36 +18,46 @@
- #include <cpu/dma-register.h>
- 
- static struct plat_sci_port scif0_platform_data = {
--	.mapbase	= 0xffe00000,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
- 	.scbrr_algo_id	= SCBRR_ALGO_1,
- 	.type		= PORT_SCIF,
--	.irqs		= SCIx_IRQ_MUXED(evt2irq(0x700)),
- 	.regtype	= SCIx_SH4_SCIF_FIFODATA_REGTYPE,
- };
- 
-+static struct resource scif0_resources[] = {
-+	DEFINE_RES_MEM(0xffe00000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0x700)),
-+};
-+
- static struct platform_device scif0_device = {
- 	.name		= "sh-sci",
- 	.id		= 0,
-+	.resource	= scif0_resources,
-+	.num_resources	= ARRAY_SIZE(scif0_resources),
- 	.dev		= {
- 		.platform_data	= &scif0_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif1_platform_data = {
--	.mapbase	= 0xffe10000,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
- 	.scbrr_algo_id	= SCBRR_ALGO_1,
- 	.type		= PORT_SCIF,
--	.irqs		= SCIx_IRQ_MUXED(evt2irq(0xb80)),
- 	.regtype	= SCIx_SH4_SCIF_FIFODATA_REGTYPE,
- };
- 
-+static struct resource scif1_resources[] = {
-+	DEFINE_RES_MEM(0xffe10000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0xb80)),
-+};
-+
- static struct platform_device scif1_device = {
- 	.name		= "sh-sci",
- 	.id		= 1,
-+	.resource	= scif1_resources,
-+	.num_resources	= ARRAY_SIZE(scif1_resources),
- 	.dev		= {
- 		.platform_data	= &scif1_platform_data,
- 	},
-diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
-index 0968ecb962e6..b9f64c1ee895 100644
---- a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
-+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
-@@ -20,108 +20,138 @@
- #include <cpu/dma-register.h>
- 
- static struct plat_sci_port scif0_platform_data = {
--	.mapbase	= 0xffea0000,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
- 	.scbrr_algo_id	= SCBRR_ALGO_1,
- 	.type		= PORT_SCIF,
--	.irqs		= SCIx_IRQ_MUXED(evt2irq(0x700)),
- 	.regtype	= SCIx_SH4_SCIF_FIFODATA_REGTYPE,
- };
- 
-+static struct resource scif0_resources[] = {
-+	DEFINE_RES_MEM(0xffea0000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0x700)),
-+};
-+
- static struct platform_device scif0_device = {
- 	.name		= "sh-sci",
- 	.id		= 0,
-+	.resource	= scif0_resources,
-+	.num_resources	= ARRAY_SIZE(scif0_resources),
- 	.dev		= {
- 		.platform_data	= &scif0_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif1_platform_data = {
--	.mapbase	= 0xffeb0000,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
- 	.scbrr_algo_id	= SCBRR_ALGO_1,
- 	.type		= PORT_SCIF,
--	.irqs		= SCIx_IRQ_MUXED(evt2irq(0x780)),
- 	.regtype	= SCIx_SH4_SCIF_FIFODATA_REGTYPE,
- };
- 
-+static struct resource scif1_resources[] = {
-+	DEFINE_RES_MEM(0xffeb0000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0x780)),
-+};
-+
- static struct platform_device scif1_device = {
- 	.name		= "sh-sci",
- 	.id		= 1,
-+	.resource	= scif1_resources,
-+	.num_resources	= ARRAY_SIZE(scif1_resources),
- 	.dev		= {
- 		.platform_data	= &scif1_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif2_platform_data = {
--	.mapbase	= 0xffec0000,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
- 	.scbrr_algo_id	= SCBRR_ALGO_1,
- 	.type		= PORT_SCIF,
--	.irqs		= SCIx_IRQ_MUXED(evt2irq(0x980)),
- 	.regtype	= SCIx_SH4_SCIF_FIFODATA_REGTYPE,
- };
- 
-+static struct resource scif2_resources[] = {
-+	DEFINE_RES_MEM(0xffec0000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0x980)),
-+};
-+
- static struct platform_device scif2_device = {
- 	.name		= "sh-sci",
- 	.id		= 2,
-+	.resource	= scif2_resources,
-+	.num_resources	= ARRAY_SIZE(scif2_resources),
- 	.dev		= {
- 		.platform_data	= &scif2_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif3_platform_data = {
--	.mapbase	= 0xffed0000,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
- 	.scbrr_algo_id	= SCBRR_ALGO_1,
- 	.type		= PORT_SCIF,
--	.irqs		= SCIx_IRQ_MUXED(evt2irq(0x9a0)),
- 	.regtype	= SCIx_SH4_SCIF_FIFODATA_REGTYPE,
- };
- 
-+static struct resource scif3_resources[] = {
-+	DEFINE_RES_MEM(0xffed0000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0x9a0)),
-+};
-+
- static struct platform_device scif3_device = {
- 	.name		= "sh-sci",
- 	.id		= 3,
-+	.resource	= scif3_resources,
-+	.num_resources	= ARRAY_SIZE(scif3_resources),
- 	.dev		= {
- 		.platform_data	= &scif3_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif4_platform_data = {
--	.mapbase	= 0xffee0000,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
- 	.scbrr_algo_id	= SCBRR_ALGO_1,
- 	.type		= PORT_SCIF,
--	.irqs		= SCIx_IRQ_MUXED(evt2irq(0x9c0)),
- 	.regtype	= SCIx_SH4_SCIF_FIFODATA_REGTYPE,
- };
- 
-+static struct resource scif4_resources[] = {
-+	DEFINE_RES_MEM(0xffee0000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0x9c0)),
-+};
-+
- static struct platform_device scif4_device = {
- 	.name		= "sh-sci",
- 	.id		= 4,
-+	.resource	= scif4_resources,
-+	.num_resources	= ARRAY_SIZE(scif4_resources),
- 	.dev		= {
- 		.platform_data	= &scif4_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif5_platform_data = {
--	.mapbase	= 0xffef0000,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
- 	.scbrr_algo_id	= SCBRR_ALGO_1,
- 	.type		= PORT_SCIF,
--	.irqs		= SCIx_IRQ_MUXED(evt2irq(0x9e0)),
- 	.regtype	= SCIx_SH4_SCIF_FIFODATA_REGTYPE,
- };
- 
-+static struct resource scif5_resources[] = {
-+	DEFINE_RES_MEM(0xffef0000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0x9e0)),
-+};
-+
- static struct platform_device scif5_device = {
- 	.name		= "sh-sci",
- 	.id		= 5,
-+	.resource	= scif5_resources,
-+	.num_resources	= ARRAY_SIZE(scif5_resources),
- 	.dev		= {
- 		.platform_data	= &scif5_platform_data,
- 	},
-diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
-index ab52d4d4484d..92b95ceabd6e 100644
---- a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
-+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
-@@ -28,21 +28,26 @@
- #include <asm/mmzone.h>
- 
- static struct plat_sci_port scif0_platform_data = {
--	.mapbase	= 0xffea0000,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
- 	.scbrr_algo_id	= SCBRR_ALGO_1,
- 	.type		= PORT_SCIF,
--	.irqs		= { evt2irq(0x700),
--			    evt2irq(0x720),
--			    evt2irq(0x760),
--			    evt2irq(0x740) },
- 	.regtype	= SCIx_SH4_SCIF_FIFODATA_REGTYPE,
- };
- 
-+static struct resource scif0_resources[] = {
-+	DEFINE_RES_MEM(0xffea0000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0x700)),
-+	DEFINE_RES_IRQ(evt2irq(0x720)),
-+	DEFINE_RES_IRQ(evt2irq(0x760)),
-+	DEFINE_RES_IRQ(evt2irq(0x740)),
-+};
-+
- static struct platform_device scif0_device = {
- 	.name		= "sh-sci",
- 	.id		= 0,
-+	.resource	= scif0_resources,
-+	.num_resources	= ARRAY_SIZE(scif0_resources),
- 	.dev		= {
- 		.platform_data	= &scif0_platform_data,
- 	},
-@@ -52,90 +57,124 @@ static struct platform_device scif0_device = {
-  * The rest of these all have multiplexed IRQs
-  */
- static struct plat_sci_port scif1_platform_data = {
--	.mapbase	= 0xffeb0000,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
- 	.scbrr_algo_id	= SCBRR_ALGO_1,
- 	.type		= PORT_SCIF,
--	.irqs		= SCIx_IRQ_MUXED(evt2irq(0x780)),
- 	.regtype	= SCIx_SH4_SCIF_FIFODATA_REGTYPE,
- };
- 
-+static struct resource scif1_resources[] = {
-+	DEFINE_RES_MEM(0xffeb0000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0x780)),
-+};
-+
-+static struct resource scif1_demux_resources[] = {
-+	DEFINE_RES_MEM(0xffeb0000, 0x100),
-+	/* Placeholders, see sh7786_devices_setup() */
-+	DEFINE_RES_IRQ(0),
-+	DEFINE_RES_IRQ(0),
-+	DEFINE_RES_IRQ(0),
-+	DEFINE_RES_IRQ(0),
-+};
-+
- static struct platform_device scif1_device = {
- 	.name		= "sh-sci",
- 	.id		= 1,
-+	.resource	= scif1_resources,
-+	.num_resources	= ARRAY_SIZE(scif1_resources),
- 	.dev		= {
- 		.platform_data	= &scif1_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif2_platform_data = {
--	.mapbase	= 0xffec0000,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
- 	.scbrr_algo_id	= SCBRR_ALGO_1,
- 	.type		= PORT_SCIF,
--	.irqs		= SCIx_IRQ_MUXED(evt2irq(0x840)),
- 	.regtype	= SCIx_SH4_SCIF_FIFODATA_REGTYPE,
- };
- 
-+static struct resource scif2_resources[] = {
-+	DEFINE_RES_MEM(0xffec0000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0x840)),
-+};
-+
- static struct platform_device scif2_device = {
- 	.name		= "sh-sci",
- 	.id		= 2,
-+	.resource	= scif2_resources,
-+	.num_resources	= ARRAY_SIZE(scif2_resources),
- 	.dev		= {
- 		.platform_data	= &scif2_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif3_platform_data = {
--	.mapbase	= 0xffed0000,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
- 	.scbrr_algo_id	= SCBRR_ALGO_1,
- 	.type		= PORT_SCIF,
--	.irqs		= SCIx_IRQ_MUXED(evt2irq(0x860)),
- 	.regtype	= SCIx_SH4_SCIF_FIFODATA_REGTYPE,
- };
- 
-+static struct resource scif3_resources[] = {
-+	DEFINE_RES_MEM(0xffed0000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0x860)),
-+};
-+
- static struct platform_device scif3_device = {
- 	.name		= "sh-sci",
- 	.id		= 3,
-+	.resource	= scif3_resources,
-+	.num_resources	= ARRAY_SIZE(scif3_resources),
- 	.dev		= {
- 		.platform_data	= &scif3_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif4_platform_data = {
--	.mapbase	= 0xffee0000,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
- 	.scbrr_algo_id	= SCBRR_ALGO_1,
- 	.type		= PORT_SCIF,
--	.irqs		= SCIx_IRQ_MUXED(evt2irq(0x880)),
- 	.regtype	= SCIx_SH4_SCIF_FIFODATA_REGTYPE,
- };
- 
-+static struct resource scif4_resources[] = {
-+	DEFINE_RES_MEM(0xffee0000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0x880)),
-+};
-+
- static struct platform_device scif4_device = {
- 	.name		= "sh-sci",
- 	.id		= 4,
-+	.resource	= scif4_resources,
-+	.num_resources	= ARRAY_SIZE(scif4_resources),
- 	.dev		= {
- 		.platform_data	= &scif4_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif5_platform_data = {
--	.mapbase	= 0xffef0000,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
- 	.scbrr_algo_id	= SCBRR_ALGO_1,
- 	.type		= PORT_SCIF,
--	.irqs		= SCIx_IRQ_MUXED(evt2irq(0x8a0)),
- 	.regtype	= SCIx_SH4_SCIF_FIFODATA_REGTYPE,
- };
- 
-+static struct resource scif5_resources[] = {
-+	DEFINE_RES_MEM(0xffef0000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0x8a0)),
-+};
-+
- static struct platform_device scif5_device = {
- 	.name		= "sh-sci",
- 	.id		= 5,
-+	.resource	= scif5_resources,
-+	.num_resources	= ARRAY_SIZE(scif5_resources),
- 	.dev		= {
- 		.platform_data	= &scif5_platform_data,
- 	},
-@@ -1037,13 +1076,16 @@ static int __init sh7786_devices_setup(void)
- 	 */
- 	irq = intc_irq_lookup(sh7786_intc_desc.name, TXI1);
- 	if (irq > 0) {
--		scif1_platform_data.irqs[SCIx_TXI_IRQ] = irq;
--		scif1_platform_data.irqs[SCIx_ERI_IRQ] =
-+		scif1_demux_resources[1].start =
- 			intc_irq_lookup(sh7786_intc_desc.name, ERI1);
--		scif1_platform_data.irqs[SCIx_BRI_IRQ] =
--			intc_irq_lookup(sh7786_intc_desc.name, BRI1);
--		scif1_platform_data.irqs[SCIx_RXI_IRQ] =
-+		scif1_demux_resources[2].start =
- 			intc_irq_lookup(sh7786_intc_desc.name, RXI1);
-+		scif1_demux_resources[3].start = irq;
-+		scif1_demux_resources[4].start =
-+			intc_irq_lookup(sh7786_intc_desc.name, BRI1);
-+
-+		scif1_device.resource = scif1_demux_resources;
-+		scif1_device.num_resources = ARRAY_SIZE(scif1_demux_resources);
- 	}
- 
- 	ret = platform_add_devices(sh7786_early_devices,
-diff --git a/arch/sh/kernel/cpu/sh4a/setup-shx3.c b/arch/sh/kernel/cpu/sh4a/setup-shx3.c
-index 688f7ed1bab1..4d65be9be001 100644
---- a/arch/sh/kernel/cpu/sh4a/setup-shx3.c
-+++ b/arch/sh/kernel/cpu/sh4a/setup-shx3.c
-@@ -28,60 +28,75 @@
-  * all rather than adding infrastructure to hack around it.
-  */
- static struct plat_sci_port scif0_platform_data = {
--	.mapbase	= 0xffc30000,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
--	.irqs		= { evt2irq(0x700),
--			    evt2irq(0x720),
--			    evt2irq(0x760),
--			    evt2irq(0x740) },
-+};
-+
-+static struct resource scif0_resources[] = {
-+	DEFINE_RES_MEM(0xffc30000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0x700)),
-+	DEFINE_RES_IRQ(evt2irq(0x720)),
-+	DEFINE_RES_IRQ(evt2irq(0x760)),
-+	DEFINE_RES_IRQ(evt2irq(0x740)),
- };
- 
- static struct platform_device scif0_device = {
- 	.name		= "sh-sci",
- 	.id		= 0,
-+	.resource	= scif0_resources,
-+	.num_resources	= ARRAY_SIZE(scif0_resources),
- 	.dev		= {
- 		.platform_data	= &scif0_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif1_platform_data = {
--	.mapbase	= 0xffc40000,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
--	.irqs		= { evt2irq(0x780),
--			    evt2irq(0x7a0),
--			    evt2irq(0x7e0),
--			    evt2irq(0x7c0) },
-+};
-+
-+static struct resource scif1_resources[] = {
-+	DEFINE_RES_MEM(0xffc40000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0x780)),
-+	DEFINE_RES_IRQ(evt2irq(0x7a0)),
-+	DEFINE_RES_IRQ(evt2irq(0x7e0)),
-+	DEFINE_RES_IRQ(evt2irq(0x7c0)),
- };
- 
- static struct platform_device scif1_device = {
- 	.name		= "sh-sci",
- 	.id		= 1,
-+	.resource	= scif1_resources,
-+	.num_resources	= ARRAY_SIZE(scif1_resources),
- 	.dev		= {
- 		.platform_data	= &scif1_platform_data,
- 	},
- };
- 
- static struct plat_sci_port scif2_platform_data = {
--	.mapbase	= 0xffc60000,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
--	.irqs		= { evt2irq(0x880),
--			    evt2irq(0x8a0),
--			    evt2irq(0x8e0),
--			    evt2irq(0x8c0) },
-+};
-+
-+static struct resource scif2_resources[] = {
-+	DEFINE_RES_MEM(0xffc60000, 0x100),
-+	DEFINE_RES_IRQ(evt2irq(0x880)),
-+	DEFINE_RES_IRQ(evt2irq(0x8a0)),
-+	DEFINE_RES_IRQ(evt2irq(0x8e0)),
-+	DEFINE_RES_IRQ(evt2irq(0x8c0)),
- };
- 
- static struct platform_device scif2_device = {
- 	.name		= "sh-sci",
- 	.id		= 2,
-+	.resource	= scif2_resources,
-+	.num_resources	= ARRAY_SIZE(scif2_resources),
- 	.dev		= {
- 		.platform_data	= &scif2_platform_data,
- 	},
-diff --git a/arch/sh/kernel/cpu/sh5/setup-sh5.c b/arch/sh/kernel/cpu/sh5/setup-sh5.c
-index 18419f1de963..64b098162c98 100644
---- a/arch/sh/kernel/cpu/sh5/setup-sh5.c
-+++ b/arch/sh/kernel/cpu/sh5/setup-sh5.c
-@@ -17,17 +17,24 @@
- #include <asm/addrspace.h>
- 
- static struct plat_sci_port scif0_platform_data = {
--	.mapbase	= PHYS_PERIPHERAL_BLOCK + 0x01030000,
- 	.flags		= UPF_BOOT_AUTOCONF | UPF_IOREMAP,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
- 	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
--	.irqs		= { 39, 40, 42, 0 },
-+};
-+
-+static struct resource scif0_resources[] = {
-+	DEFINE_RES_MEM(PHYS_PERIPHERAL_BLOCK + 0x01030000, 0x100),
-+	DEFINE_RES_IRQ(39),
-+	DEFINE_RES_IRQ(40),
-+	DEFINE_RES_IRQ(42),
- };
- 
- static struct platform_device scif0_device = {
- 	.name		= "sh-sci",
- 	.id		= 0,
-+	.resource	= scif0_resources,
-+	.num_resources	= ARRAY_SIZE(scif0_resources),
- 	.dev		= {
- 		.platform_data	= &scif0_platform_data,
- 	},
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0032-ASoC-fsi-fixup-sparse-errors.patch b/patches.renesas/0032-ASoC-fsi-fixup-sparse-errors.patch
deleted file mode 100644
index f7ffa0582fa29..0000000000000
--- a/patches.renesas/0032-ASoC-fsi-fixup-sparse-errors.patch
+++ /dev/null
@@ -1,78 +0,0 @@
-From ac88352e83f54d63d46b46dfbea44baaeabadd18 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Tue, 28 May 2013 00:55:12 -0700
-Subject: ASoC: fsi: fixup sparse errors
-
-This patch fixup below sparse errors
-
-${LINUX}/sound/soc/sh/fsi.c:1459:9: \
-	error: incompatible types in conditional expression (different base types)
-${LINUX}/sound/soc/sh/fsi.c:1634:25: \
-	error: incompatible types in conditional expression (different base types)
-${LINUX}/sound/soc/sh/fsi.c:1639:17: \
-	error: incompatible types in conditional expression (different base types)
-${LINUX}/sound/soc/sh/fsi.c:2093:9: \
-	error: incompatible types in conditional expression (different base types)
-${LINUX}/sound/soc/sh/fsi.c:2105:9: \
-	error: incompatible types in conditional expression (different base types)
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
-(cherry picked from commit c375b2d7eff01d6423b95b2d44e8466beae0a15a)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/sh/fsi.c | 10 +++++++---
- 1 file changed, 7 insertions(+), 3 deletions(-)
-
-diff --git a/sound/soc/sh/fsi.c b/sound/soc/sh/fsi.c
-index f830c41f..30390260 100644
---- a/sound/soc/sh/fsi.c
-+++ b/sound/soc/sh/fsi.c
-@@ -276,7 +276,7 @@ struct fsi_stream_handler {
- 	int (*probe)(struct fsi_priv *fsi, struct fsi_stream *io, struct device *dev);
- 	int (*transfer)(struct fsi_priv *fsi, struct fsi_stream *io);
- 	int (*remove)(struct fsi_priv *fsi, struct fsi_stream *io);
--	void (*start_stop)(struct fsi_priv *fsi, struct fsi_stream *io,
-+	int (*start_stop)(struct fsi_priv *fsi, struct fsi_stream *io,
- 			   int enable);
- };
- #define fsi_stream_handler_call(io, func, args...)	\
-@@ -1188,7 +1188,7 @@ static int fsi_pio_push(struct fsi_priv *fsi, struct fsi_stream *io)
- 				  samples);
- }
- 
--static void fsi_pio_start_stop(struct fsi_priv *fsi, struct fsi_stream *io,
-+static int fsi_pio_start_stop(struct fsi_priv *fsi, struct fsi_stream *io,
- 			       int enable)
- {
- 	struct fsi_master *master = fsi_get_master(fsi);
-@@ -1201,6 +1201,8 @@ static void fsi_pio_start_stop(struct fsi_priv *fsi, struct fsi_stream *io,
- 
- 	if (fsi_is_clk_master(fsi))
- 		fsi_master_mask_set(master, CLK_RST, clk, (enable) ? clk : 0);
-+
-+	return 0;
- }
- 
- static int fsi_pio_push_init(struct fsi_priv *fsi, struct fsi_stream *io)
-@@ -1409,7 +1411,7 @@ static int fsi_dma_transfer(struct fsi_priv *fsi, struct fsi_stream *io)
- 	return 0;
- }
- 
--static void fsi_dma_push_start_stop(struct fsi_priv *fsi, struct fsi_stream *io,
-+static int fsi_dma_push_start_stop(struct fsi_priv *fsi, struct fsi_stream *io,
- 				 int start)
- {
- 	struct fsi_master *master = fsi_get_master(fsi);
-@@ -1422,6 +1424,8 @@ static void fsi_dma_push_start_stop(struct fsi_priv *fsi, struct fsi_stream *io,
- 
- 	if (fsi_is_clk_master(fsi))
- 		fsi_master_mask_set(master, CLK_RST, clk, (enable) ? clk : 0);
-+
-+	return 0;
- }
- 
- static int fsi_dma_probe(struct fsi_priv *fsi, struct fsi_stream *io, struct device *dev)
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0032-drm-rcar-du-Configure-RGB-output-routing-to-DPAD0.patch b/patches.renesas/0032-drm-rcar-du-Configure-RGB-output-routing-to-DPAD0.patch
deleted file mode 100644
index 548e37caa4885..0000000000000
--- a/patches.renesas/0032-drm-rcar-du-Configure-RGB-output-routing-to-DPAD0.patch
+++ /dev/null
@@ -1,144 +0,0 @@
-From 23143c3fa488cc3f2645e75e1c0610a6623a1a5b Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Mon, 17 Jun 2013 03:20:08 +0200
-Subject: drm/rcar-du: Configure RGB output routing to DPAD0
-
-The R8A7790 DU variant has a single RGB output called DPAD0 that can be
-fed with the output of DU0, DU1 or DU2. Making the routing configurable.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit 7cbc05cb518304b746bea00bc7c0b005217bcaf7)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/rcar-du/rcar_du_crtc.c  |  5 ++++
- drivers/gpu/drm/rcar-du/rcar_du_drv.h   |  2 ++
- drivers/gpu/drm/rcar-du/rcar_du_group.c | 45 ++++++++++++++++++++++++++++++---
- drivers/gpu/drm/rcar-du/rcar_du_group.h |  2 +-
- 4 files changed, 50 insertions(+), 4 deletions(-)
-
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
-index 680606ef11d8..245800ddd1a8 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
-@@ -139,6 +139,11 @@ void rcar_du_crtc_route_output(struct drm_crtc *crtc,
- 	 * configured when starting the CRTC.
- 	 */
- 	rcrtc->outputs |= BIT(output);
-+
-+	/* Store RGB routing to DPAD0 for R8A7790. */
-+	if (rcar_du_has(rcdu, RCAR_DU_FEATURE_DEFR8) &&
-+	    output == RCAR_DU_OUTPUT_DPAD0)
-+		rcdu->dpad0_source = rcrtc->index;
- }
- 
- void rcar_du_crtc_update_planes(struct drm_crtc *crtc)
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.h b/drivers/gpu/drm/rcar-du/rcar_du_drv.h
-index d5243f493903..924f5e08f060 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_drv.h
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.h
-@@ -68,6 +68,8 @@ struct rcar_du_device {
- 	unsigned int num_crtcs;
- 
- 	struct rcar_du_group groups[2];
-+
-+	unsigned int dpad0_source;
- };
- 
- static inline bool rcar_du_has(struct rcar_du_device *rcdu,
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_group.c b/drivers/gpu/drm/rcar-du/rcar_du_group.c
-index 9df6fb635c96..eb53cd97e8c6 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_group.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_group.c
-@@ -27,6 +27,7 @@
-  * counterpart in the DU documentation, that models those semi-global resources.
-  */
- 
-+#include <linux/clk.h>
- #include <linux/io.h>
- 
- #include "rcar_du_drv.h"
-@@ -43,6 +44,22 @@ void rcar_du_group_write(struct rcar_du_group *rgrp, u32 reg, u32 data)
- 	rcar_du_write(rgrp->dev, rgrp->mmio_offset + reg, data);
- }
- 
-+static void rcar_du_group_setup_defr8(struct rcar_du_group *rgrp)
-+{
-+	u32 defr8 = DEFR8_CODE | DEFR8_DEFE8;
-+
-+	if (!rcar_du_has(rgrp->dev, RCAR_DU_FEATURE_DEFR8))
-+		return;
-+
-+	/* The DEFR8 register for the first group also controls RGB output
-+	 * routing to DPAD0
-+	 */
-+	if (rgrp->index == 0)
-+		defr8 |= DEFR8_DRGBS_DU(rgrp->dev->dpad0_source);
-+
-+	rcar_du_group_write(rgrp, DEFR8, defr8);
-+}
-+
- static void rcar_du_group_setup(struct rcar_du_group *rgrp)
- {
- 	/* Enable extended features */
-@@ -51,8 +68,8 @@ static void rcar_du_group_setup(struct rcar_du_group *rgrp)
- 	rcar_du_group_write(rgrp, DEFR3, DEFR3_CODE | DEFR3_DEFE3);
- 	rcar_du_group_write(rgrp, DEFR4, DEFR4_CODE);
- 	rcar_du_group_write(rgrp, DEFR5, DEFR5_CODE | DEFR5_DEFE5);
--	if (rcar_du_has(rgrp->dev, RCAR_DU_FEATURE_DEFR8))
--		rcar_du_group_write(rgrp, DEFR8, DEFR8_CODE | DEFR8_DEFE8);
-+
-+	rcar_du_group_setup_defr8(rgrp);
- 
- 	/* Use DS1PR and DS2PR to configure planes priorities and connects the
- 	 * superposition 0 to DU0 pins. DU1 pins will be configured dynamically.
-@@ -128,7 +145,27 @@ void rcar_du_group_restart(struct rcar_du_group *rgrp)
- 	__rcar_du_group_start_stop(rgrp, true);
- }
- 
--void rcar_du_group_set_routing(struct rcar_du_group *rgrp)
-+static int rcar_du_set_dpad0_routing(struct rcar_du_device *rcdu)
-+{
-+	int ret;
-+
-+	/* RGB output routing to DPAD0 is configured in the DEFR8 register of
-+	 * the first group. As this function can be called with the DU0 and DU1
-+	 * CRTCs disabled, we need to enable the first group clock before
-+	 * accessing the register.
-+	 */
-+	ret = clk_prepare_enable(rcdu->crtcs[0].clock);
-+	if (ret < 0)
-+		return ret;
-+
-+	rcar_du_group_setup_defr8(&rcdu->groups[0]);
-+
-+	clk_disable_unprepare(rcdu->crtcs[0].clock);
-+
-+	return 0;
-+}
-+
-+int rcar_du_group_set_routing(struct rcar_du_group *rgrp)
- {
- 	struct rcar_du_crtc *crtc0 = &rgrp->dev->crtcs[rgrp->index * 2];
- 	u32 dorcr = rcar_du_group_read(rgrp, DORCR);
-@@ -145,4 +182,6 @@ void rcar_du_group_set_routing(struct rcar_du_group *rgrp)
- 		dorcr |= DORCR_PG2T | DORCR_DK2S | DORCR_PG2D_DS2;
- 
- 	rcar_du_group_write(rgrp, DORCR, dorcr);
-+
-+	return rcar_du_set_dpad0_routing(rgrp->dev);
- }
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_group.h b/drivers/gpu/drm/rcar-du/rcar_du_group.h
-index 4487e83fb2c1..5025930972ec 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_group.h
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_group.h
-@@ -45,6 +45,6 @@ int rcar_du_group_get(struct rcar_du_group *rgrp);
- void rcar_du_group_put(struct rcar_du_group *rgrp);
- void rcar_du_group_start_stop(struct rcar_du_group *rgrp, bool start);
- void rcar_du_group_restart(struct rcar_du_group *rgrp);
--void rcar_du_group_set_routing(struct rcar_du_group *rgrp);
-+int rcar_du_group_set_routing(struct rcar_du_group *rgrp);
- 
- #endif /* __RCAR_DU_GROUP_H__ */
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0032-sh-sh772-34-Set-serial-port-sampling-rate-to-8-for-S.patch b/patches.renesas/0032-sh-sh772-34-Set-serial-port-sampling-rate-to-8-for-S.patch
deleted file mode 100644
index 3737d98be9ab8..0000000000000
--- a/patches.renesas/0032-sh-sh772-34-Set-serial-port-sampling-rate-to-8-for-S.patch
+++ /dev/null
@@ -1,85 +0,0 @@
-From e49034d60f2aa317528c33a43d0dba3f0d1f2a5b Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 6 Dec 2013 10:59:49 +0100
-Subject: sh: sh772[34]: Set serial port sampling rate to 8 for SCIFA ports
-
-SCIFA ports on sh7723 and sh7724 seem to use a sampling rate of half the
-value specified in the datasheet. This is currently handled by a custom
-baud rate calculation algorithm. The algorithm ID will be removed from
-platform data, set the sampling rate directly instead.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 64c535e942af6cfe59ceceeb9bc6ba5f437a2fc9)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/sh/kernel/cpu/sh4a/setup-sh7723.c | 6 +++---
- arch/sh/kernel/cpu/sh4a/setup-sh7724.c | 6 +++---
- 2 files changed, 6 insertions(+), 6 deletions(-)
-
-diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
-index 521a09ef4ffe..079951be4122 100644
---- a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
-+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
-@@ -98,7 +98,7 @@ static struct plat_sci_port scif3_platform_data = {
- 	.flags          = UPF_BOOT_AUTOCONF,
- 	.port_reg	= SCIx_NOT_SUPPORTED,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
--	.scbrr_algo_id	= SCBRR_ALGO_3,
-+	.sampling_rate	= 8,
- 	.type           = PORT_SCIFA,
- };
- 
-@@ -121,7 +121,7 @@ static struct plat_sci_port scif4_platform_data = {
- 	.port_reg	= SCIx_NOT_SUPPORTED,
- 	.flags          = UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
--	.scbrr_algo_id	= SCBRR_ALGO_3,
-+	.sampling_rate	= 8,
- 	.type           = PORT_SCIFA,
- };
- 
-@@ -144,7 +144,7 @@ static struct plat_sci_port scif5_platform_data = {
- 	.port_reg	= SCIx_NOT_SUPPORTED,
- 	.flags          = UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
--	.scbrr_algo_id	= SCBRR_ALGO_3,
-+	.sampling_rate	= 8,
- 	.type           = PORT_SCIFA,
- };
- 
-diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
-index fb0a23749147..59c359469f13 100644
---- a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
-+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
-@@ -365,7 +365,7 @@ static struct plat_sci_port scif3_platform_data = {
- 	.port_reg	= SCIx_NOT_SUPPORTED,
- 	.flags          = UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE,
--	.scbrr_algo_id	= SCBRR_ALGO_3,
-+	.sampling_rate	= 8,
- 	.type           = PORT_SCIFA,
- };
- 
-@@ -388,7 +388,7 @@ static struct plat_sci_port scif4_platform_data = {
- 	.port_reg	= SCIx_NOT_SUPPORTED,
- 	.flags          = UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE,
--	.scbrr_algo_id	= SCBRR_ALGO_3,
-+	.sampling_rate	= 8,
- 	.type           = PORT_SCIFA,
- };
- 
-@@ -411,7 +411,7 @@ static struct plat_sci_port scif5_platform_data = {
- 	.port_reg	= SCIx_NOT_SUPPORTED,
- 	.flags          = UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE,
--	.scbrr_algo_id	= SCBRR_ALGO_3,
-+	.sampling_rate	= 8,
- 	.type           = PORT_SCIFA,
- };
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0033-ASoC-add-Renesas-R-Car-core-feature.patch b/patches.renesas/0033-ASoC-add-Renesas-R-Car-core-feature.patch
deleted file mode 100644
index ebc370e1f8c6e..0000000000000
--- a/patches.renesas/0033-ASoC-add-Renesas-R-Car-core-feature.patch
+++ /dev/null
@@ -1,777 +0,0 @@
-From 469ca87d334fb915b265861b31c52e83fb7f3846 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Sun, 21 Jul 2013 21:35:52 -0700
-Subject: ASoC: add Renesas R-Car core feature
-
-Renesas R-Car series sound circuit consists of SSI and its peripheral.
-But this peripheral circuits are different between
-R-Car Generation1 (E1/M1/H1) and Generation2 (E2/M2/H2).
-(Actually, there are many difference in Generation1 chips)
-
-Basically, for the future, Renesas R-Car series will use
-Gen2 style sound circuit, but driver should care Gen1 also.
-The main differences between Gen1 and Gen2 peripheral
-are 1) register offset, 2) data path.
-
-This patch adds basic (core) feature for R-Car
-series sound driver as prototype
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@linaro.org>
-(cherry picked from commit 1536a968892aa9095aada4b6d2ed326432cd71c8)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- include/sound/rcar_snd.h   |  33 +++
- sound/soc/sh/Kconfig       |   7 +
- sound/soc/sh/Makefile      |   3 +
- sound/soc/sh/rcar/Makefile |   2 +
- sound/soc/sh/rcar/core.c   | 554 +++++++++++++++++++++++++++++++++++++++++++++
- sound/soc/sh/rcar/rsnd.h   |  94 ++++++++
- 6 files changed, 693 insertions(+)
- create mode 100644 include/sound/rcar_snd.h
- create mode 100644 sound/soc/sh/rcar/Makefile
- create mode 100644 sound/soc/sh/rcar/core.c
- create mode 100644 sound/soc/sh/rcar/rsnd.h
-
-diff --git a/include/sound/rcar_snd.h b/include/sound/rcar_snd.h
-new file mode 100644
-index 00000000..7272b2ea
---- /dev/null
-+++ b/include/sound/rcar_snd.h
-@@ -0,0 +1,33 @@
-+/*
-+ * Renesas R-Car SRU/SCU/SSIU/SSI support
-+ *
-+ * Copyright (C) 2013 Renesas Solutions Corp.
-+ * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+
-+#ifndef RCAR_SND_H
-+#define RCAR_SND_H
-+
-+#include <linux/sh_clk.h>
-+
-+
-+#define RSND_BASE_MAX	0
-+
-+struct rsnd_dai_platform_info {
-+	int ssi_id_playback;
-+	int ssi_id_capture;
-+};
-+
-+struct rcar_snd_info {
-+	u32 flags;
-+	struct rsnd_dai_platform_info *dai_info;
-+	int dai_info_nr;
-+	int (*start)(int id);
-+	int (*stop)(int id);
-+};
-+
-+#endif
-diff --git a/sound/soc/sh/Kconfig b/sound/soc/sh/Kconfig
-index 6bcb1164..56d8ff6a 100644
---- a/sound/soc/sh/Kconfig
-+++ b/sound/soc/sh/Kconfig
-@@ -34,6 +34,13 @@ config SND_SOC_SH4_SIU
- 	select SH_DMAE
- 	select FW_LOADER
- 
-+config SND_SOC_RCAR
-+	tristate "R-Car series SRU/SCU/SSIU/SSI support"
-+	select SND_SIMPLE_CARD
-+	select RCAR_CLK_ADG
-+	help
-+	  This option enables R-Car SUR/SCU/SSIU/SSI sound support
-+
- ##
- ## Boards
- ##
-diff --git a/sound/soc/sh/Makefile b/sound/soc/sh/Makefile
-index 849b387d..aaf3dcd1 100644
---- a/sound/soc/sh/Makefile
-+++ b/sound/soc/sh/Makefile
-@@ -12,6 +12,9 @@ obj-$(CONFIG_SND_SOC_SH4_SSI)	+= snd-soc-ssi.o
- obj-$(CONFIG_SND_SOC_SH4_FSI)	+= snd-soc-fsi.o
- obj-$(CONFIG_SND_SOC_SH4_SIU)	+= snd-soc-siu.o
- 
-+## audio units for R-Car
-+obj-$(CONFIG_SND_SOC_RCAR)	+= rcar/
-+
- ## boards
- snd-soc-sh7760-ac97-objs	:= sh7760-ac97.o
- snd-soc-migor-objs		:= migor.o
-diff --git a/sound/soc/sh/rcar/Makefile b/sound/soc/sh/rcar/Makefile
-new file mode 100644
-index 00000000..cd8089f2
---- /dev/null
-+++ b/sound/soc/sh/rcar/Makefile
-@@ -0,0 +1,2 @@
-+snd-soc-rcar-objs	:= core.o
-+obj-$(CONFIG_SND_SOC_RCAR)	+= snd-soc-rcar.o
-diff --git a/sound/soc/sh/rcar/core.c b/sound/soc/sh/rcar/core.c
-new file mode 100644
-index 00000000..13b5d50e
---- /dev/null
-+++ b/sound/soc/sh/rcar/core.c
-@@ -0,0 +1,554 @@
-+/*
-+ * Renesas R-Car SRU/SCU/SSIU/SSI support
-+ *
-+ * Copyright (C) 2013 Renesas Solutions Corp.
-+ * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-+ *
-+ * Based on fsi.c
-+ * Kuninori Morimoto <morimoto.kuninori@renesas.com>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+
-+/*
-+ * Renesas R-Car sound device structure
-+ *
-+ * Gen1
-+ *
-+ * SRU		: Sound Routing Unit
-+ *  - SRC	: Sampling Rate Converter
-+ *  - CMD
-+ *    - CTU	: Channel Count Conversion Unit
-+ *    - MIX	: Mixer
-+ *    - DVC	: Digital Volume and Mute Function
-+ *  - SSI	: Serial Sound Interface
-+ *
-+ * Gen2
-+ *
-+ * SCU		: Sampling Rate Converter Unit
-+ *  - SRC	: Sampling Rate Converter
-+ *  - CMD
-+ *   - CTU	: Channel Count Conversion Unit
-+ *   - MIX	: Mixer
-+ *   - DVC	: Digital Volume and Mute Function
-+ * SSIU		: Serial Sound Interface Unit
-+ *  - SSI	: Serial Sound Interface
-+ */
-+
-+/*
-+ *	driver data Image
-+ *
-+ * rsnd_priv
-+ *   |
-+ *   | ** this depends on Gen1/Gen2
-+ *   |
-+ *   +- gen
-+ *   |
-+ *   | ** these depend on data path
-+ *   | ** gen and platform data control it
-+ *   |
-+ *   +- rdai[0]
-+ *   |   |		 sru     ssiu      ssi
-+ *   |   +- playback -> [mod] -> [mod] -> [mod] -> ...
-+ *   |   |
-+ *   |   |		 sru     ssiu      ssi
-+ *   |   +- capture  -> [mod] -> [mod] -> [mod] -> ...
-+ *   |
-+ *   +- rdai[1]
-+ *   |   |		 sru     ssiu      ssi
-+ *   |   +- playback -> [mod] -> [mod] -> [mod] -> ...
-+ *   |   |
-+ *   |   |		 sru     ssiu      ssi
-+ *   |   +- capture  -> [mod] -> [mod] -> [mod] -> ...
-+ *   ...
-+ *   |
-+ *   | ** these control ssi
-+ *   |
-+ *   +- ssi
-+ *   |  |
-+ *   |  +- ssi[0]
-+ *   |  +- ssi[1]
-+ *   |  +- ssi[2]
-+ *   |  ...
-+ *   |
-+ *   | ** these control scu
-+ *   |
-+ *   +- scu
-+ *      |
-+ *      +- scu[0]
-+ *      +- scu[1]
-+ *      +- scu[2]
-+ *      ...
-+ *
-+ *
-+ * for_each_rsnd_dai(xx, priv, xx)
-+ *  rdai[0] => rdai[1] => rdai[2] => ...
-+ *
-+ * for_each_rsnd_mod(xx, rdai, xx)
-+ *  [mod] => [mod] => [mod] => ...
-+ *
-+ * rsnd_dai_call(xxx, fn )
-+ *  [mod]->fn() -> [mod]->fn() -> [mod]->fn()...
-+ *
-+ */
-+#include <linux/pm_runtime.h>
-+#include "rsnd.h"
-+
-+#define RSND_RATES SNDRV_PCM_RATE_8000_96000
-+#define RSND_FMTS (SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S16_LE)
-+
-+/*
-+ *	rsnd_platform functions
-+ */
-+#define rsnd_platform_call(priv, dai, func, param...)	\
-+	(!(priv->info->func) ? -ENODEV :		\
-+	 priv->info->func(param))
-+
-+
-+/*
-+ *	rsnd_dai functions
-+ */
-+struct rsnd_dai *rsnd_dai_get(struct rsnd_priv *priv, int id)
-+{
-+	return priv->rdai + id;
-+}
-+
-+static struct rsnd_dai *rsnd_dai_to_rdai(struct snd_soc_dai *dai)
-+{
-+	struct rsnd_priv *priv = snd_soc_dai_get_drvdata(dai);
-+
-+	return rsnd_dai_get(priv, dai->id);
-+}
-+
-+int rsnd_dai_is_play(struct rsnd_dai *rdai, struct rsnd_dai_stream *io)
-+{
-+	return &rdai->playback == io;
-+}
-+
-+/*
-+ *	rsnd_soc_dai functions
-+ */
-+int rsnd_dai_pointer_offset(struct rsnd_dai_stream *io, int additional)
-+{
-+	struct snd_pcm_substream *substream = io->substream;
-+	struct snd_pcm_runtime *runtime = substream->runtime;
-+	int pos = io->byte_pos + additional;
-+
-+	pos %= (runtime->periods * io->byte_per_period);
-+
-+	return pos;
-+}
-+
-+void rsnd_dai_pointer_update(struct rsnd_dai_stream *io, int byte)
-+{
-+	io->byte_pos += byte;
-+
-+	if (io->byte_pos >= io->next_period_byte) {
-+		struct snd_pcm_substream *substream = io->substream;
-+		struct snd_pcm_runtime *runtime = substream->runtime;
-+
-+		io->period_pos++;
-+		io->next_period_byte += io->byte_per_period;
-+
-+		if (io->period_pos >= runtime->periods) {
-+			io->byte_pos = 0;
-+			io->period_pos = 0;
-+			io->next_period_byte = io->byte_per_period;
-+		}
-+
-+		snd_pcm_period_elapsed(substream);
-+	}
-+}
-+
-+static int rsnd_dai_stream_init(struct rsnd_dai_stream *io,
-+				struct snd_pcm_substream *substream)
-+{
-+	struct snd_pcm_runtime *runtime = substream->runtime;
-+
-+	if (!list_empty(&io->head))
-+		return -EIO;
-+
-+	INIT_LIST_HEAD(&io->head);
-+	io->substream		= substream;
-+	io->byte_pos		= 0;
-+	io->period_pos		= 0;
-+	io->byte_per_period	= runtime->period_size *
-+				  runtime->channels *
-+				  samples_to_bytes(runtime, 1);
-+	io->next_period_byte	= io->byte_per_period;
-+
-+	return 0;
-+}
-+
-+static
-+struct snd_soc_dai *rsnd_substream_to_dai(struct snd_pcm_substream *substream)
-+{
-+	struct snd_soc_pcm_runtime *rtd = substream->private_data;
-+
-+	return  rtd->cpu_dai;
-+}
-+
-+static
-+struct rsnd_dai_stream *rsnd_rdai_to_io(struct rsnd_dai *rdai,
-+					struct snd_pcm_substream *substream)
-+{
-+	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
-+		return &rdai->playback;
-+	else
-+		return &rdai->capture;
-+}
-+
-+static int rsnd_soc_dai_trigger(struct snd_pcm_substream *substream, int cmd,
-+			    struct snd_soc_dai *dai)
-+{
-+	struct rsnd_priv *priv = snd_soc_dai_get_drvdata(dai);
-+	struct rsnd_dai *rdai = rsnd_dai_to_rdai(dai);
-+	struct rsnd_dai_stream *io = rsnd_rdai_to_io(rdai, substream);
-+	struct rsnd_dai_platform_info *info = rsnd_dai_get_platform_info(rdai);
-+	int ssi_id = rsnd_dai_is_play(rdai, io) ?	info->ssi_id_playback :
-+							info->ssi_id_capture;
-+	int ret;
-+	unsigned long flags;
-+
-+	rsnd_lock(priv, flags);
-+
-+	switch (cmd) {
-+	case SNDRV_PCM_TRIGGER_START:
-+		ret = rsnd_dai_stream_init(io, substream);
-+		if (ret < 0)
-+			goto dai_trigger_end;
-+
-+		ret = rsnd_platform_call(priv, dai, start, ssi_id);
-+		if (ret < 0)
-+			goto dai_trigger_end;
-+
-+		break;
-+	case SNDRV_PCM_TRIGGER_STOP:
-+		ret = rsnd_platform_call(priv, dai, stop, ssi_id);
-+		if (ret < 0)
-+			goto dai_trigger_end;
-+
-+		break;
-+	default:
-+		ret = -EINVAL;
-+	}
-+
-+dai_trigger_end:
-+	rsnd_unlock(priv, flags);
-+
-+	return ret;
-+}
-+
-+static int rsnd_soc_dai_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
-+{
-+	struct rsnd_dai *rdai = rsnd_dai_to_rdai(dai);
-+
-+	/* set master/slave audio interface */
-+	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
-+	case SND_SOC_DAIFMT_CBM_CFM:
-+		rdai->clk_master = 1;
-+		break;
-+	case SND_SOC_DAIFMT_CBS_CFS:
-+		rdai->clk_master = 0;
-+		break;
-+	default:
-+		return -EINVAL;
-+	}
-+
-+	/* set clock inversion */
-+	switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
-+	case SND_SOC_DAIFMT_NB_IF:
-+		rdai->bit_clk_inv = 0;
-+		rdai->frm_clk_inv = 1;
-+		break;
-+	case SND_SOC_DAIFMT_IB_NF:
-+		rdai->bit_clk_inv = 1;
-+		rdai->frm_clk_inv = 0;
-+		break;
-+	case SND_SOC_DAIFMT_IB_IF:
-+		rdai->bit_clk_inv = 1;
-+		rdai->frm_clk_inv = 1;
-+		break;
-+	case SND_SOC_DAIFMT_NB_NF:
-+	default:
-+		rdai->bit_clk_inv = 0;
-+		rdai->frm_clk_inv = 0;
-+		break;
-+	}
-+
-+	/* set format */
-+	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
-+	case SND_SOC_DAIFMT_I2S:
-+		rdai->sys_delay = 0;
-+		rdai->data_alignment = 0;
-+		break;
-+	case SND_SOC_DAIFMT_LEFT_J:
-+		rdai->sys_delay = 1;
-+		rdai->data_alignment = 0;
-+		break;
-+	case SND_SOC_DAIFMT_RIGHT_J:
-+		rdai->sys_delay = 1;
-+		rdai->data_alignment = 1;
-+		break;
-+	}
-+
-+	return 0;
-+}
-+
-+static const struct snd_soc_dai_ops rsnd_soc_dai_ops = {
-+	.trigger	= rsnd_soc_dai_trigger,
-+	.set_fmt	= rsnd_soc_dai_set_fmt,
-+};
-+
-+static int rsnd_dai_probe(struct platform_device *pdev,
-+			  struct rcar_snd_info *info,
-+			  struct rsnd_priv *priv)
-+{
-+	struct snd_soc_dai_driver *drv;
-+	struct rsnd_dai *rdai;
-+	struct device *dev = rsnd_priv_to_dev(priv);
-+	struct rsnd_dai_platform_info *dai_info;
-+	int dai_nr = info->dai_info_nr;
-+	int i, pid, cid;
-+
-+	drv  = devm_kzalloc(dev, sizeof(*drv)  * dai_nr, GFP_KERNEL);
-+	rdai = devm_kzalloc(dev, sizeof(*rdai) * dai_nr, GFP_KERNEL);
-+	if (!drv || !rdai) {
-+		dev_err(dev, "dai allocate failed\n");
-+		return -ENOMEM;
-+	}
-+
-+	for (i = 0; i < dai_nr; i++) {
-+		dai_info = &info->dai_info[i];
-+
-+		pid = dai_info->ssi_id_playback;
-+		cid = dai_info->ssi_id_capture;
-+
-+		/*
-+		 *	init rsnd_dai
-+		 */
-+		INIT_LIST_HEAD(&rdai[i].playback.head);
-+		INIT_LIST_HEAD(&rdai[i].capture.head);
-+
-+		rdai[i].info = dai_info;
-+
-+		snprintf(rdai[i].name, RSND_DAI_NAME_SIZE, "rsnd-dai.%d", i);
-+
-+		/*
-+		 *	init snd_soc_dai_driver
-+		 */
-+		drv[i].name	= rdai[i].name;
-+		drv[i].ops	= &rsnd_soc_dai_ops;
-+		if (pid >= 0) {
-+			drv[i].playback.rates		= RSND_RATES;
-+			drv[i].playback.formats		= RSND_FMTS;
-+			drv[i].playback.channels_min	= 2;
-+			drv[i].playback.channels_max	= 2;
-+		}
-+		if (cid >= 0) {
-+			drv[i].capture.rates		= RSND_RATES;
-+			drv[i].capture.formats		= RSND_FMTS;
-+			drv[i].capture.channels_min	= 2;
-+			drv[i].capture.channels_max	= 2;
-+		}
-+
-+		dev_dbg(dev, "%s (%d, %d) probed", rdai[i].name, pid, cid);
-+	}
-+
-+	priv->dai_nr	= dai_nr;
-+	priv->daidrv	= drv;
-+	priv->rdai	= rdai;
-+
-+	return 0;
-+}
-+
-+static void rsnd_dai_remove(struct platform_device *pdev,
-+			  struct rsnd_priv *priv)
-+{
-+}
-+
-+/*
-+ *		pcm ops
-+ */
-+static struct snd_pcm_hardware rsnd_pcm_hardware = {
-+	.info =		SNDRV_PCM_INFO_INTERLEAVED	|
-+			SNDRV_PCM_INFO_MMAP		|
-+			SNDRV_PCM_INFO_MMAP_VALID	|
-+			SNDRV_PCM_INFO_PAUSE,
-+	.formats		= RSND_FMTS,
-+	.rates			= RSND_RATES,
-+	.rate_min		= 8000,
-+	.rate_max		= 192000,
-+	.channels_min		= 2,
-+	.channels_max		= 2,
-+	.buffer_bytes_max	= 64 * 1024,
-+	.period_bytes_min	= 32,
-+	.period_bytes_max	= 8192,
-+	.periods_min		= 1,
-+	.periods_max		= 32,
-+	.fifo_size		= 256,
-+};
-+
-+static int rsnd_pcm_open(struct snd_pcm_substream *substream)
-+{
-+	struct snd_pcm_runtime *runtime = substream->runtime;
-+	int ret = 0;
-+
-+	snd_soc_set_runtime_hwparams(substream, &rsnd_pcm_hardware);
-+
-+	ret = snd_pcm_hw_constraint_integer(runtime,
-+					    SNDRV_PCM_HW_PARAM_PERIODS);
-+
-+	return ret;
-+}
-+
-+static int rsnd_hw_params(struct snd_pcm_substream *substream,
-+			 struct snd_pcm_hw_params *hw_params)
-+{
-+	return snd_pcm_lib_malloc_pages(substream,
-+					params_buffer_bytes(hw_params));
-+}
-+
-+static snd_pcm_uframes_t rsnd_pointer(struct snd_pcm_substream *substream)
-+{
-+	struct snd_pcm_runtime *runtime = substream->runtime;
-+	struct snd_soc_dai *dai = rsnd_substream_to_dai(substream);
-+	struct rsnd_dai *rdai = rsnd_dai_to_rdai(dai);
-+	struct rsnd_dai_stream *io = rsnd_rdai_to_io(rdai, substream);
-+
-+	return bytes_to_frames(runtime, io->byte_pos);
-+}
-+
-+static struct snd_pcm_ops rsnd_pcm_ops = {
-+	.open		= rsnd_pcm_open,
-+	.ioctl		= snd_pcm_lib_ioctl,
-+	.hw_params	= rsnd_hw_params,
-+	.hw_free	= snd_pcm_lib_free_pages,
-+	.pointer	= rsnd_pointer,
-+};
-+
-+/*
-+ *		snd_soc_platform
-+ */
-+
-+#define PREALLOC_BUFFER		(32 * 1024)
-+#define PREALLOC_BUFFER_MAX	(32 * 1024)
-+
-+static int rsnd_pcm_new(struct snd_soc_pcm_runtime *rtd)
-+{
-+	return snd_pcm_lib_preallocate_pages_for_all(
-+		rtd->pcm,
-+		SNDRV_DMA_TYPE_DEV,
-+		rtd->card->snd_card->dev,
-+		PREALLOC_BUFFER, PREALLOC_BUFFER_MAX);
-+}
-+
-+static void rsnd_pcm_free(struct snd_pcm *pcm)
-+{
-+	snd_pcm_lib_preallocate_free_for_all(pcm);
-+}
-+
-+static struct snd_soc_platform_driver rsnd_soc_platform = {
-+	.ops		= &rsnd_pcm_ops,
-+	.pcm_new	= rsnd_pcm_new,
-+	.pcm_free	= rsnd_pcm_free,
-+};
-+
-+static const struct snd_soc_component_driver rsnd_soc_component = {
-+	.name		= "rsnd",
-+};
-+
-+/*
-+ *	rsnd probe
-+ */
-+static int rsnd_probe(struct platform_device *pdev)
-+{
-+	struct rcar_snd_info *info;
-+	struct rsnd_priv *priv;
-+	struct device *dev = &pdev->dev;
-+	int ret;
-+
-+	info = pdev->dev.platform_data;
-+	if (!info) {
-+		dev_err(dev, "driver needs R-Car sound information\n");
-+		return -ENODEV;
-+	}
-+
-+	/*
-+	 *	init priv data
-+	 */
-+	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
-+	if (!priv) {
-+		dev_err(dev, "priv allocate failed\n");
-+		return -ENODEV;
-+	}
-+
-+	priv->dev	= dev;
-+	priv->info	= info;
-+	spin_lock_init(&priv->lock);
-+
-+	/*
-+	 *	init each module
-+	 */
-+	ret = rsnd_dai_probe(pdev, info, priv);
-+	if (ret < 0)
-+		return ret;
-+
-+	/*
-+	 *	asoc register
-+	 */
-+	ret = snd_soc_register_platform(dev, &rsnd_soc_platform);
-+	if (ret < 0) {
-+		dev_err(dev, "cannot snd soc register\n");
-+		return ret;
-+	}
-+
-+	ret = snd_soc_register_component(dev, &rsnd_soc_component,
-+					 priv->daidrv, rsnd_dai_nr(priv));
-+	if (ret < 0) {
-+		dev_err(dev, "cannot snd dai register\n");
-+		goto exit_snd_soc;
-+	}
-+
-+	dev_set_drvdata(dev, priv);
-+
-+	pm_runtime_enable(dev);
-+
-+	dev_info(dev, "probed\n");
-+	return ret;
-+
-+exit_snd_soc:
-+	snd_soc_unregister_platform(dev);
-+
-+	return ret;
-+}
-+
-+static int rsnd_remove(struct platform_device *pdev)
-+{
-+	struct rsnd_priv *priv = dev_get_drvdata(&pdev->dev);
-+
-+	pm_runtime_disable(&pdev->dev);
-+
-+	/*
-+	 *	remove each module
-+	 */
-+	rsnd_dai_remove(pdev, priv);
-+
-+	return 0;
-+}
-+
-+static struct platform_driver rsnd_driver = {
-+	.driver	= {
-+		.name	= "rcar_sound",
-+	},
-+	.probe		= rsnd_probe,
-+	.remove		= rsnd_remove,
-+};
-+module_platform_driver(rsnd_driver);
-+
-+MODULE_LICENSE("GPL");
-+MODULE_DESCRIPTION("Renesas R-Car audio driver");
-+MODULE_AUTHOR("Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>");
-+MODULE_ALIAS("platform:rcar-pcm-audio");
-diff --git a/sound/soc/sh/rcar/rsnd.h b/sound/soc/sh/rcar/rsnd.h
-new file mode 100644
-index 00000000..8d04fd03
---- /dev/null
-+++ b/sound/soc/sh/rcar/rsnd.h
-@@ -0,0 +1,94 @@
-+/*
-+ * Renesas R-Car
-+ *
-+ * Copyright (C) 2013 Renesas Solutions Corp.
-+ * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+#ifndef RSND_H
-+#define RSND_H
-+
-+#include <linux/clk.h>
-+#include <linux/device.h>
-+#include <linux/io.h>
-+#include <linux/list.h>
-+#include <linux/module.h>
-+#include <sound/rcar_snd.h>
-+#include <sound/soc.h>
-+#include <sound/pcm_params.h>
-+
-+/*
-+ *	pseudo register
-+ *
-+ * The register address offsets SRU/SCU/SSIU on Gen1/Gen2 are very different.
-+ * This driver uses pseudo register in order to hide it.
-+ * see gen1/gen2 for detail
-+ */
-+struct rsnd_priv;
-+struct rsnd_dai;
-+struct rsnd_dai_stream;
-+
-+/*
-+ *	R-Car sound DAI
-+ */
-+#define RSND_DAI_NAME_SIZE	16
-+struct rsnd_dai_stream {
-+	struct list_head head; /* head of rsnd_mod list */
-+	struct snd_pcm_substream *substream;
-+	int byte_pos;
-+	int period_pos;
-+	int byte_per_period;
-+	int next_period_byte;
-+};
-+
-+struct rsnd_dai {
-+	char name[RSND_DAI_NAME_SIZE];
-+	struct rsnd_dai_platform_info *info; /* rcar_snd.h */
-+	struct rsnd_dai_stream playback;
-+	struct rsnd_dai_stream capture;
-+
-+	int clk_master:1;
-+	int bit_clk_inv:1;
-+	int frm_clk_inv:1;
-+	int sys_delay:1;
-+	int data_alignment:1;
-+};
-+
-+#define rsnd_dai_nr(priv) ((priv)->dai_nr)
-+#define for_each_rsnd_dai(rdai, priv, i)		\
-+	for (i = 0, (rdai) = rsnd_dai_get(priv, i);	\
-+	     i < rsnd_dai_nr(priv);			\
-+	     i++, (rdai) = rsnd_dai_get(priv, i))
-+
-+struct rsnd_dai *rsnd_dai_get(struct rsnd_priv *priv, int id);
-+int rsnd_dai_is_play(struct rsnd_dai *rdai, struct rsnd_dai_stream *io);
-+#define rsnd_dai_get_platform_info(rdai) ((rdai)->info)
-+
-+void rsnd_dai_pointer_update(struct rsnd_dai_stream *io, int cnt);
-+int rsnd_dai_pointer_offset(struct rsnd_dai_stream *io, int additional);
-+
-+/*
-+ *	R-Car sound priv
-+ */
-+struct rsnd_priv {
-+
-+	struct device *dev;
-+	struct rcar_snd_info *info;
-+	spinlock_t lock;
-+
-+	/*
-+	 * below value will be filled on rsnd_dai_probe()
-+	 */
-+	struct snd_soc_dai_driver *daidrv;
-+	struct rsnd_dai *rdai;
-+	int dai_nr;
-+};
-+
-+#define rsnd_priv_to_dev(priv)	((priv)->dev)
-+#define rsnd_lock(priv, flags) spin_lock_irqsave(&priv->lock, flags)
-+#define rsnd_unlock(priv, flags) spin_unlock_irqrestore(&priv->lock, flags)
-+
-+#endif
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0033-drm-rcar-du-Add-internal-LVDS-encoder-support.patch b/patches.renesas/0033-drm-rcar-du-Add-internal-LVDS-encoder-support.patch
deleted file mode 100644
index 0ca6ab22c2abb..0000000000000
--- a/patches.renesas/0033-drm-rcar-du-Add-internal-LVDS-encoder-support.patch
+++ /dev/null
@@ -1,600 +0,0 @@
-From 677d7e6700c3e1db5ab7a4051b33c36aa3fa4ac9 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Mon, 17 Jun 2013 13:48:27 +0200
-Subject: drm/rcar-du: Add internal LVDS encoder support
-
-The R8A7790 includes two internal LVDS encoders. Support them in the DU
-driver.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit 90374b5c25c9f04895c52a1e7a2468ee8dac525b)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/rcar-du/Kconfig           |   7 ++
- drivers/gpu/drm/rcar-du/Makefile          |   4 +-
- drivers/gpu/drm/rcar-du/rcar_du_crtc.c    |   2 -
- drivers/gpu/drm/rcar-du/rcar_du_crtc.h    |   2 +
- drivers/gpu/drm/rcar-du/rcar_du_drv.c     |   2 +
- drivers/gpu/drm/rcar-du/rcar_du_drv.h     |   4 +
- drivers/gpu/drm/rcar-du/rcar_du_encoder.c |  38 ++++++
- drivers/gpu/drm/rcar-du/rcar_du_encoder.h |   2 +
- drivers/gpu/drm/rcar-du/rcar_du_kms.c     |   5 +
- drivers/gpu/drm/rcar-du/rcar_du_lvdsenc.c | 196 ++++++++++++++++++++++++++++++
- drivers/gpu/drm/rcar-du/rcar_du_lvdsenc.h |  46 +++++++
- drivers/gpu/drm/rcar-du/rcar_lvds_regs.h  |  69 +++++++++++
- 12 files changed, 374 insertions(+), 3 deletions(-)
- create mode 100644 drivers/gpu/drm/rcar-du/rcar_du_lvdsenc.c
- create mode 100644 drivers/gpu/drm/rcar-du/rcar_du_lvdsenc.h
- create mode 100644 drivers/gpu/drm/rcar-du/rcar_lvds_regs.h
-
-diff --git a/drivers/gpu/drm/rcar-du/Kconfig b/drivers/gpu/drm/rcar-du/Kconfig
-index 72887df8dd76..c590cd9dca0b 100644
---- a/drivers/gpu/drm/rcar-du/Kconfig
-+++ b/drivers/gpu/drm/rcar-du/Kconfig
-@@ -7,3 +7,10 @@ config DRM_RCAR_DU
- 	help
- 	  Choose this option if you have an R-Car chipset.
- 	  If M is selected the module will be called rcar-du-drm.
-+
-+config DRM_RCAR_LVDS
-+	bool "R-Car DU LVDS Encoder Support"
-+	depends on DRM_RCAR_DU
-+	help
-+	  Enable support the R-Car Display Unit embedded LVDS encoders
-+	  (currently only on R8A7790).
-diff --git a/drivers/gpu/drm/rcar-du/Makefile b/drivers/gpu/drm/rcar-du/Makefile
-index b9b5e666fbba..12b8d4477835 100644
---- a/drivers/gpu/drm/rcar-du/Makefile
-+++ b/drivers/gpu/drm/rcar-du/Makefile
-@@ -7,4 +7,6 @@ rcar-du-drm-y := rcar_du_crtc.o \
- 		 rcar_du_plane.o \
- 		 rcar_du_vgacon.o
- 
--obj-$(CONFIG_DRM_RCAR_DU)	+= rcar-du-drm.o
-+rcar-du-drm-$(CONFIG_DRM_RCAR_LVDS)	+= rcar_du_lvdsenc.o
-+
-+obj-$(CONFIG_DRM_RCAR_DU)		+= rcar-du-drm.o
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
-index 245800ddd1a8..33df7a583143 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
-@@ -26,8 +26,6 @@
- #include "rcar_du_plane.h"
- #include "rcar_du_regs.h"
- 
--#define to_rcar_crtc(c)	container_of(c, struct rcar_du_crtc, crtc)
--
- static u32 rcar_du_crtc_read(struct rcar_du_crtc *rcrtc, u32 reg)
- {
- 	struct rcar_du_device *rcdu = rcrtc->group->dev;
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.h b/drivers/gpu/drm/rcar-du/rcar_du_crtc.h
-index 39a983d13afb..43e7575c700c 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.h
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.h
-@@ -39,6 +39,8 @@ struct rcar_du_crtc {
- 	struct rcar_du_plane *plane;
- };
- 
-+#define to_rcar_crtc(c)	container_of(c, struct rcar_du_crtc, crtc)
-+
- int rcar_du_crtc_create(struct rcar_du_group *rgrp, unsigned int index);
- void rcar_du_crtc_enable_vblank(struct rcar_du_crtc *rcrtc, bool enable);
- void rcar_du_crtc_cancel_page_flip(struct rcar_du_crtc *rcrtc,
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.c b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-index 983bc5912588..a4c2007f5bb5 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-@@ -227,6 +227,7 @@ static const struct rcar_du_device_info rcar_du_r8a7779_info = {
- 			.encoder_type = DRM_MODE_ENCODER_NONE,
- 		},
- 	},
-+	.num_lvds = 0,
- };
- 
- static const struct rcar_du_device_info rcar_du_r8a7790_info = {
-@@ -250,6 +251,7 @@ static const struct rcar_du_device_info rcar_du_r8a7790_info = {
- 			.encoder_type = DRM_MODE_ENCODER_LVDS,
- 		},
- 	},
-+	.num_lvds = 2,
- };
- 
- static const struct platform_device_id rcar_du_id_table[] = {
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.h b/drivers/gpu/drm/rcar-du/rcar_du_drv.h
-index 924f5e08f060..050d71c1f785 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_drv.h
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.h
-@@ -24,6 +24,7 @@ struct clk;
- struct device;
- struct drm_device;
- struct rcar_du_device;
-+struct rcar_du_lvdsenc;
- 
- #define RCAR_DU_FEATURE_CRTC_IRQ_CLOCK	(1 << 0)	/* Per-CRTC IRQ and clock */
- #define RCAR_DU_FEATURE_ALIGN_128B	(1 << 1)	/* Align pitches to 128 bytes */
-@@ -48,11 +49,13 @@ struct rcar_du_output_routing {
-  * @features: device features (RCAR_DU_FEATURE_*)
-  * @num_crtcs: total number of CRTCs
-  * @routes: array of CRTC to output routes, indexed by output (RCAR_DU_OUTPUT_*)
-+ * @num_lvds: number of internal LVDS encoders
-  */
- struct rcar_du_device_info {
- 	unsigned int features;
- 	unsigned int num_crtcs;
- 	struct rcar_du_output_routing routes[RCAR_DU_OUTPUT_MAX];
-+	unsigned int num_lvds;
- };
- 
- struct rcar_du_device {
-@@ -70,6 +73,7 @@ struct rcar_du_device {
- 	struct rcar_du_group groups[2];
- 
- 	unsigned int dpad0_source;
-+	struct rcar_du_lvdsenc *lvds[2];
- };
- 
- static inline bool rcar_du_has(struct rcar_du_device *rcdu,
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_encoder.c b/drivers/gpu/drm/rcar-du/rcar_du_encoder.c
-index 2aac28d21f87..3daa7a168dc6 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_encoder.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_encoder.c
-@@ -11,6 +11,8 @@
-  * (at your option) any later version.
-  */
- 
-+#include <linux/export.h>
-+
- #include <drm/drmP.h>
- #include <drm/drm_crtc.h>
- #include <drm/drm_crtc_helper.h>
-@@ -19,6 +21,7 @@
- #include "rcar_du_encoder.h"
- #include "rcar_du_kms.h"
- #include "rcar_du_lvdscon.h"
-+#include "rcar_du_lvdsenc.h"
- #include "rcar_du_vgacon.h"
- 
- /* -----------------------------------------------------------------------------
-@@ -39,12 +42,17 @@ rcar_du_connector_best_encoder(struct drm_connector *connector)
- 
- static void rcar_du_encoder_dpms(struct drm_encoder *encoder, int mode)
- {
-+	struct rcar_du_encoder *renc = to_rcar_encoder(encoder);
-+
-+	if (renc->lvds)
-+		rcar_du_lvdsenc_dpms(renc->lvds, encoder->crtc, mode);
- }
- 
- static bool rcar_du_encoder_mode_fixup(struct drm_encoder *encoder,
- 				       const struct drm_display_mode *mode,
- 				       struct drm_display_mode *adjusted_mode)
- {
-+	struct rcar_du_encoder *renc = to_rcar_encoder(encoder);
- 	const struct drm_display_mode *panel_mode;
- 	struct drm_device *dev = encoder->dev;
- 	struct drm_connector *connector;
-@@ -82,15 +90,32 @@ static bool rcar_du_encoder_mode_fixup(struct drm_encoder *encoder,
- 	/* The flat panel mode is fixed, just copy it to the adjusted mode. */
- 	drm_mode_copy(adjusted_mode, panel_mode);
- 
-+	/* The internal LVDS encoder has a clock frequency operating range of
-+	 * 30MHz to 150MHz. Clamp the clock accordingly.
-+	 */
-+	if (renc->lvds)
-+		adjusted_mode->clock = clamp(adjusted_mode->clock,
-+					     30000, 150000);
-+
- 	return true;
- }
- 
- static void rcar_du_encoder_mode_prepare(struct drm_encoder *encoder)
- {
-+	struct rcar_du_encoder *renc = to_rcar_encoder(encoder);
-+
-+	if (renc->lvds)
-+		rcar_du_lvdsenc_dpms(renc->lvds, encoder->crtc,
-+				     DRM_MODE_DPMS_OFF);
- }
- 
- static void rcar_du_encoder_mode_commit(struct drm_encoder *encoder)
- {
-+	struct rcar_du_encoder *renc = to_rcar_encoder(encoder);
-+
-+	if (renc->lvds)
-+		rcar_du_lvdsenc_dpms(renc->lvds, encoder->crtc,
-+				     DRM_MODE_DPMS_ON);
- }
- 
- static void rcar_du_encoder_mode_set(struct drm_encoder *encoder,
-@@ -129,6 +154,19 @@ int rcar_du_encoder_init(struct rcar_du_device *rcdu,
- 
- 	renc->output = output;
- 
-+	switch (output) {
-+	case RCAR_DU_OUTPUT_LVDS0:
-+		renc->lvds = rcdu->lvds[0];
-+		break;
-+
-+	case RCAR_DU_OUTPUT_LVDS1:
-+		renc->lvds = rcdu->lvds[1];
-+		break;
-+
-+	default:
-+		break;
-+	}
-+
- 	switch (type) {
- 	case RCAR_DU_ENCODER_VGA:
- 		encoder_type = DRM_MODE_ENCODER_DAC;
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_encoder.h b/drivers/gpu/drm/rcar-du/rcar_du_encoder.h
-index 2310416ea21f..0e5a65e45d0e 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_encoder.h
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_encoder.h
-@@ -19,10 +19,12 @@
- #include <drm/drm_crtc.h>
- 
- struct rcar_du_device;
-+struct rcar_du_lvdsenc;
- 
- struct rcar_du_encoder {
- 	struct drm_encoder encoder;
- 	enum rcar_du_output output;
-+	struct rcar_du_lvdsenc *lvds;
- };
- 
- #define to_rcar_encoder(e) \
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms.c b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
-index 2b92e68a09f0..cc71b1a0c3ce 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_kms.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
-@@ -21,6 +21,7 @@
- #include "rcar_du_drv.h"
- #include "rcar_du_encoder.h"
- #include "rcar_du_kms.h"
-+#include "rcar_du_lvdsenc.h"
- #include "rcar_du_regs.h"
- 
- /* -----------------------------------------------------------------------------
-@@ -217,6 +218,10 @@ int rcar_du_modeset_init(struct rcar_du_device *rcdu)
- 	}
- 
- 	/* Initialize the encoders. */
-+	ret = rcar_du_lvdsenc_init(rcdu);
-+	if (ret < 0)
-+		return ret;
-+
- 	for (i = 0; i < rcdu->pdata->num_encoders; ++i) {
- 		const struct rcar_du_encoder_data *pdata =
- 			&rcdu->pdata->encoders[i];
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_lvdsenc.c b/drivers/gpu/drm/rcar-du/rcar_du_lvdsenc.c
-new file mode 100644
-index 000000000000..a0f6a1781925
---- /dev/null
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_lvdsenc.c
-@@ -0,0 +1,196 @@
-+/*
-+ * rcar_du_lvdsenc.c  --  R-Car Display Unit LVDS Encoder
-+ *
-+ * Copyright (C) 2013 Renesas Corporation
-+ *
-+ * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ */
-+
-+#include <linux/clk.h>
-+#include <linux/delay.h>
-+#include <linux/io.h>
-+#include <linux/platform_device.h>
-+#include <linux/slab.h>
-+
-+#include "rcar_du_drv.h"
-+#include "rcar_du_encoder.h"
-+#include "rcar_du_lvdsenc.h"
-+#include "rcar_lvds_regs.h"
-+
-+struct rcar_du_lvdsenc {
-+	struct rcar_du_device *dev;
-+
-+	unsigned int index;
-+	void __iomem *mmio;
-+	struct clk *clock;
-+	int dpms;
-+
-+	enum rcar_lvds_input input;
-+};
-+
-+static void rcar_lvds_write(struct rcar_du_lvdsenc *lvds, u32 reg, u32 data)
-+{
-+	iowrite32(data, lvds->mmio + reg);
-+}
-+
-+static int rcar_du_lvdsenc_start(struct rcar_du_lvdsenc *lvds,
-+				 struct rcar_du_crtc *rcrtc)
-+{
-+	const struct drm_display_mode *mode = &rcrtc->crtc.mode;
-+	unsigned int freq = mode->clock;
-+	u32 lvdcr0;
-+	u32 pllcr;
-+	int ret;
-+
-+	if (lvds->dpms == DRM_MODE_DPMS_ON)
-+		return 0;
-+
-+	ret = clk_prepare_enable(lvds->clock);
-+	if (ret < 0)
-+		return ret;
-+
-+	/* PLL clock configuration */
-+	if (freq <= 38000)
-+		pllcr = LVDPLLCR_CEEN | LVDPLLCR_COSEL | LVDPLLCR_PLLDLYCNT_38M;
-+	else if (freq <= 60000)
-+		pllcr = LVDPLLCR_CEEN | LVDPLLCR_COSEL | LVDPLLCR_PLLDLYCNT_60M;
-+	else if (freq <= 121000)
-+		pllcr = LVDPLLCR_CEEN | LVDPLLCR_COSEL | LVDPLLCR_PLLDLYCNT_121M;
-+	else
-+		pllcr = LVDPLLCR_PLLDLYCNT_150M;
-+
-+	rcar_lvds_write(lvds, LVDPLLCR, pllcr);
-+
-+	/* Hardcode the channels and control signals routing for now.
-+	 *
-+	 * HSYNC -> CTRL0
-+	 * VSYNC -> CTRL1
-+	 * DISP  -> CTRL2
-+	 * 0     -> CTRL3
-+	 *
-+	 * Channels 1 and 3 are switched on ES1.
-+	 */
-+	rcar_lvds_write(lvds, LVDCTRCR, LVDCTRCR_CTR3SEL_ZERO |
-+			LVDCTRCR_CTR2SEL_DISP | LVDCTRCR_CTR1SEL_VSYNC |
-+			LVDCTRCR_CTR0SEL_HSYNC);
-+	rcar_lvds_write(lvds, LVDCHCR,
-+			LVDCHCR_CHSEL_CH(0, 0) | LVDCHCR_CHSEL_CH(1, 3) |
-+			LVDCHCR_CHSEL_CH(2, 2) | LVDCHCR_CHSEL_CH(3, 1));
-+
-+	/* Select the input, hardcode mode 0, enable LVDS operation and turn
-+	 * bias circuitry on.
-+	 */
-+	lvdcr0 = LVDCR0_BEN | LVDCR0_LVEN;
-+	if (rcrtc->index == 2)
-+		lvdcr0 |= LVDCR0_DUSEL;
-+	rcar_lvds_write(lvds, LVDCR0, lvdcr0);
-+
-+	/* Turn all the channels on. */
-+	rcar_lvds_write(lvds, LVDCR1, LVDCR1_CHSTBY(3) | LVDCR1_CHSTBY(2) |
-+			LVDCR1_CHSTBY(1) | LVDCR1_CHSTBY(0) | LVDCR1_CLKSTBY);
-+
-+	/* Turn the PLL on, wait for the startup delay, and turn the output
-+	 * on.
-+	 */
-+	lvdcr0 |= LVDCR0_PLLEN;
-+	rcar_lvds_write(lvds, LVDCR0, lvdcr0);
-+
-+	usleep_range(100, 150);
-+
-+	lvdcr0 |= LVDCR0_LVRES;
-+	rcar_lvds_write(lvds, LVDCR0, lvdcr0);
-+
-+	lvds->dpms = DRM_MODE_DPMS_ON;
-+	return 0;
-+}
-+
-+static void rcar_du_lvdsenc_stop(struct rcar_du_lvdsenc *lvds)
-+{
-+	if (lvds->dpms == DRM_MODE_DPMS_OFF)
-+		return;
-+
-+	rcar_lvds_write(lvds, LVDCR0, 0);
-+	rcar_lvds_write(lvds, LVDCR1, 0);
-+
-+	clk_disable_unprepare(lvds->clock);
-+
-+	lvds->dpms = DRM_MODE_DPMS_OFF;
-+}
-+
-+int rcar_du_lvdsenc_dpms(struct rcar_du_lvdsenc *lvds,
-+			 struct drm_crtc *crtc, int mode)
-+{
-+	if (mode == DRM_MODE_DPMS_OFF) {
-+		rcar_du_lvdsenc_stop(lvds);
-+		return 0;
-+	} else if (crtc) {
-+		struct rcar_du_crtc *rcrtc = to_rcar_crtc(crtc);
-+		return rcar_du_lvdsenc_start(lvds, rcrtc);
-+	} else
-+		return -EINVAL;
-+}
-+
-+static int rcar_du_lvdsenc_get_resources(struct rcar_du_lvdsenc *lvds,
-+					 struct platform_device *pdev)
-+{
-+	struct resource *mem;
-+	char name[7];
-+
-+	sprintf(name, "lvds.%u", lvds->index);
-+
-+	mem = platform_get_resource_byname(pdev, IORESOURCE_MEM, name);
-+	if (mem == NULL) {
-+		dev_err(&pdev->dev, "failed to get memory resource for %s\n",
-+			name);
-+		return -EINVAL;
-+	}
-+
-+	lvds->mmio = devm_ioremap_resource(&pdev->dev, mem);
-+	if (lvds->mmio == NULL) {
-+		dev_err(&pdev->dev, "failed to remap memory resource for %s\n",
-+			name);
-+		return -ENOMEM;
-+	}
-+
-+	lvds->clock = devm_clk_get(&pdev->dev, name);
-+	if (IS_ERR(lvds->clock)) {
-+		dev_err(&pdev->dev, "failed to get clock for %s\n", name);
-+		return PTR_ERR(lvds->clock);
-+	}
-+
-+	return 0;
-+}
-+
-+int rcar_du_lvdsenc_init(struct rcar_du_device *rcdu)
-+{
-+	struct platform_device *pdev = to_platform_device(rcdu->dev);
-+	struct rcar_du_lvdsenc *lvds;
-+	unsigned int i;
-+	int ret;
-+
-+	for (i = 0; i < rcdu->info->num_lvds; ++i) {
-+		lvds = devm_kzalloc(&pdev->dev, sizeof(*lvds), GFP_KERNEL);
-+		if (lvds == NULL) {
-+			dev_err(&pdev->dev, "failed to allocate private data\n");
-+			return -ENOMEM;
-+		}
-+
-+		lvds->dev = rcdu;
-+		lvds->index = i;
-+		lvds->input = i ? RCAR_LVDS_INPUT_DU1 : RCAR_LVDS_INPUT_DU0;
-+		lvds->dpms = DRM_MODE_DPMS_OFF;
-+
-+		ret = rcar_du_lvdsenc_get_resources(lvds, pdev);
-+		if (ret < 0)
-+			return ret;
-+
-+		rcdu->lvds[i] = lvds;
-+	}
-+
-+	return 0;
-+}
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_lvdsenc.h b/drivers/gpu/drm/rcar-du/rcar_du_lvdsenc.h
-new file mode 100644
-index 000000000000..7051c6de19ae
---- /dev/null
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_lvdsenc.h
-@@ -0,0 +1,46 @@
-+/*
-+ * rcar_du_lvdsenc.h  --  R-Car Display Unit LVDS Encoder
-+ *
-+ * Copyright (C) 2013 Renesas Corporation
-+ *
-+ * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ */
-+
-+#ifndef __RCAR_DU_LVDSENC_H__
-+#define __RCAR_DU_LVDSENC_H__
-+
-+#include <linux/io.h>
-+#include <linux/module.h>
-+#include <linux/platform_data/rcar-du.h>
-+
-+struct rcar_drm_crtc;
-+struct rcar_du_lvdsenc;
-+
-+enum rcar_lvds_input {
-+	RCAR_LVDS_INPUT_DU0,
-+	RCAR_LVDS_INPUT_DU1,
-+	RCAR_LVDS_INPUT_DU2,
-+};
-+
-+#if IS_ENABLED(CONFIG_DRM_RCAR_LVDS)
-+int rcar_du_lvdsenc_init(struct rcar_du_device *rcdu);
-+int rcar_du_lvdsenc_dpms(struct rcar_du_lvdsenc *lvds,
-+			 struct drm_crtc *crtc, int mode);
-+#else
-+static inline int rcar_du_lvdsenc_init(struct rcar_du_device *rcdu)
-+{
-+	return 0;
-+}
-+static inline int rcar_du_lvdsenc_dpms(struct rcar_du_lvdsenc *lvds,
-+				       struct drm_crtc *crtc, int mode)
-+{
-+	return 0;
-+}
-+#endif
-+
-+#endif /* __RCAR_DU_LVDSENC_H__ */
-diff --git a/drivers/gpu/drm/rcar-du/rcar_lvds_regs.h b/drivers/gpu/drm/rcar-du/rcar_lvds_regs.h
-new file mode 100644
-index 000000000000..77cf9289ab65
---- /dev/null
-+++ b/drivers/gpu/drm/rcar-du/rcar_lvds_regs.h
-@@ -0,0 +1,69 @@
-+/*
-+ * rcar_lvds_regs.h  --  R-Car LVDS Interface Registers Definitions
-+ *
-+ * Copyright (C) 2013 Renesas Electronics Corporation
-+ *
-+ * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2
-+ * as published by the Free Software Foundation.
-+ */
-+
-+#ifndef __RCAR_LVDS_REGS_H__
-+#define __RCAR_LVDS_REGS_H__
-+
-+#define LVDCR0				0x0000
-+#define LVDCR0_DUSEL			(1 << 15)
-+#define LVDCR0_DMD			(1 << 12)
-+#define LVDCR0_LVMD_MASK		(0xf << 8)
-+#define LVDCR0_LVMD_SHIFT		8
-+#define LVDCR0_PLLEN			(1 << 4)
-+#define LVDCR0_BEN			(1 << 2)
-+#define LVDCR0_LVEN			(1 << 1)
-+#define LVDCR0_LVRES			(1 << 0)
-+
-+#define LVDCR1				0x0004
-+#define LVDCR1_CKSEL			(1 << 15)
-+#define LVDCR1_CHSTBY(n)		(3 << (2 + (n) * 2))
-+#define LVDCR1_CLKSTBY			(3 << 0)
-+
-+#define LVDPLLCR			0x0008
-+#define LVDPLLCR_CEEN			(1 << 14)
-+#define LVDPLLCR_FBEN			(1 << 13)
-+#define LVDPLLCR_COSEL			(1 << 12)
-+#define LVDPLLCR_PLLDLYCNT_150M		(0x1bf << 0)
-+#define LVDPLLCR_PLLDLYCNT_121M		(0x22c << 0)
-+#define LVDPLLCR_PLLDLYCNT_60M		(0x77b << 0)
-+#define LVDPLLCR_PLLDLYCNT_38M		(0x69a << 0)
-+#define LVDPLLCR_PLLDLYCNT_MASK		(0x7ff << 0)
-+
-+#define LVDCTRCR			0x000c
-+#define LVDCTRCR_CTR3SEL_ZERO		(0 << 12)
-+#define LVDCTRCR_CTR3SEL_ODD		(1 << 12)
-+#define LVDCTRCR_CTR3SEL_CDE		(2 << 12)
-+#define LVDCTRCR_CTR3SEL_MASK		(7 << 12)
-+#define LVDCTRCR_CTR2SEL_DISP		(0 << 8)
-+#define LVDCTRCR_CTR2SEL_ODD		(1 << 8)
-+#define LVDCTRCR_CTR2SEL_CDE		(2 << 8)
-+#define LVDCTRCR_CTR2SEL_HSYNC		(3 << 8)
-+#define LVDCTRCR_CTR2SEL_VSYNC		(4 << 8)
-+#define LVDCTRCR_CTR2SEL_MASK		(7 << 8)
-+#define LVDCTRCR_CTR1SEL_VSYNC		(0 << 4)
-+#define LVDCTRCR_CTR1SEL_DISP		(1 << 4)
-+#define LVDCTRCR_CTR1SEL_ODD		(2 << 4)
-+#define LVDCTRCR_CTR1SEL_CDE		(3 << 4)
-+#define LVDCTRCR_CTR1SEL_HSYNC		(4 << 4)
-+#define LVDCTRCR_CTR1SEL_MASK		(7 << 4)
-+#define LVDCTRCR_CTR0SEL_HSYNC		(0 << 0)
-+#define LVDCTRCR_CTR0SEL_VSYNC		(1 << 0)
-+#define LVDCTRCR_CTR0SEL_DISP		(2 << 0)
-+#define LVDCTRCR_CTR0SEL_ODD		(3 << 0)
-+#define LVDCTRCR_CTR0SEL_CDE		(4 << 0)
-+#define LVDCTRCR_CTR0SEL_MASK		(7 << 0)
-+
-+#define LVDCHCR				0x0010
-+#define LVDCHCR_CHSEL_CH(n, c)		((((c) - (n)) & 3) << ((n) * 4))
-+#define LVDCHCR_CHSEL_MASK(n)		(3 << ((n) * 4))
-+
-+#endif /* __RCAR_LVDS_REGS_H__ */
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0033-sh-Don-t-set-plat_sci_port-scbrr_algo_id-field.patch b/patches.renesas/0033-sh-Don-t-set-plat_sci_port-scbrr_algo_id-field.patch
deleted file mode 100644
index 90bcee070b325..0000000000000
--- a/patches.renesas/0033-sh-Don-t-set-plat_sci_port-scbrr_algo_id-field.patch
+++ /dev/null
@@ -1,1017 +0,0 @@
-From c1831826994681d1626154cdcdb728e544931a6a Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 6 Dec 2013 10:59:50 +0100
-Subject: sh: Don't set plat_sci_port scbrr_algo_id field
-
-The field will be removed from the sh-sci driver. Don't set it and let
-the driver handle baud rate calculation internally.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit d5917ef318b850fc72bd10db438580f7d1c406d9)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/sh/kernel/cpu/sh2/setup-sh7619.c  |  3 ---
- arch/sh/kernel/cpu/sh2a/setup-mxg.c    |  1 -
- arch/sh/kernel/cpu/sh2a/setup-sh7201.c |  8 --------
- arch/sh/kernel/cpu/sh2a/setup-sh7203.c |  4 ----
- arch/sh/kernel/cpu/sh2a/setup-sh7206.c |  4 ----
- arch/sh/kernel/cpu/sh2a/setup-sh7264.c |  8 --------
- arch/sh/kernel/cpu/sh2a/setup-sh7269.c |  8 --------
- arch/sh/kernel/cpu/sh3/setup-sh7705.c  |  2 --
- arch/sh/kernel/cpu/sh3/setup-sh770x.c  |  3 ---
- arch/sh/kernel/cpu/sh3/setup-sh7710.c  |  2 --
- arch/sh/kernel/cpu/sh3/setup-sh7720.c  |  2 --
- arch/sh/kernel/cpu/sh4/setup-sh4-202.c |  1 -
- arch/sh/kernel/cpu/sh4/setup-sh7750.c  |  2 --
- arch/sh/kernel/cpu/sh4/setup-sh7760.c  |  4 ----
- arch/sh/kernel/cpu/sh4a/setup-sh7343.c |  4 ----
- arch/sh/kernel/cpu/sh4a/setup-sh7366.c |  1 -
- arch/sh/kernel/cpu/sh4a/setup-sh7722.c |  3 ---
- arch/sh/kernel/cpu/sh4a/setup-sh7723.c |  3 ---
- arch/sh/kernel/cpu/sh4a/setup-sh7724.c |  3 ---
- arch/sh/kernel/cpu/sh4a/setup-sh7734.c |  6 ------
- arch/sh/kernel/cpu/sh4a/setup-sh7757.c |  3 ---
- arch/sh/kernel/cpu/sh4a/setup-sh7763.c |  3 ---
- arch/sh/kernel/cpu/sh4a/setup-sh7770.c | 10 ----------
- arch/sh/kernel/cpu/sh4a/setup-sh7780.c |  4 ----
- arch/sh/kernel/cpu/sh4a/setup-sh7785.c |  6 ------
- arch/sh/kernel/cpu/sh4a/setup-sh7786.c |  6 ------
- arch/sh/kernel/cpu/sh4a/setup-shx3.c   |  3 ---
- arch/sh/kernel/cpu/sh5/setup-sh5.c     |  1 -
- 28 files changed, 108 deletions(-)
-
-diff --git a/arch/sh/kernel/cpu/sh2/setup-sh7619.c b/arch/sh/kernel/cpu/sh2/setup-sh7619.c
-index b708432c33b0..4b867287dad8 100644
---- a/arch/sh/kernel/cpu/sh2/setup-sh7619.c
-+++ b/arch/sh/kernel/cpu/sh2/setup-sh7619.c
-@@ -62,7 +62,6 @@ static DECLARE_INTC_DESC(intc_desc, "sh7619", vectors, NULL,
- static struct plat_sci_port scif0_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
- };
- 
-@@ -84,7 +83,6 @@ static struct platform_device scif0_device = {
- static struct plat_sci_port scif1_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
- };
- 
-@@ -106,7 +104,6 @@ static struct platform_device scif1_device = {
- static struct plat_sci_port scif2_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
- };
- 
-diff --git a/arch/sh/kernel/cpu/sh2a/setup-mxg.c b/arch/sh/kernel/cpu/sh2a/setup-mxg.c
-index 9bdc61143f40..63e996f9a7ed 100644
---- a/arch/sh/kernel/cpu/sh2a/setup-mxg.c
-+++ b/arch/sh/kernel/cpu/sh2a/setup-mxg.c
-@@ -201,7 +201,6 @@ static struct platform_device mtu2_2_device = {
- static struct plat_sci_port scif0_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
- };
- 
-diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7201.c b/arch/sh/kernel/cpu/sh2a/setup-sh7201.c
-index 7585c4ed7c5c..2c6874461536 100644
---- a/arch/sh/kernel/cpu/sh2a/setup-sh7201.c
-+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7201.c
-@@ -180,7 +180,6 @@ static DECLARE_INTC_DESC(intc_desc, "sh7201", vectors, groups,
- static struct plat_sci_port scif0_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
- };
- 
-@@ -202,7 +201,6 @@ static struct platform_device scif0_device = {
- static struct plat_sci_port scif1_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
- };
- 
-@@ -224,7 +222,6 @@ static struct platform_device scif1_device = {
- static struct plat_sci_port scif2_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
- };
- 
-@@ -246,7 +243,6 @@ static struct platform_device scif2_device = {
- static struct plat_sci_port scif3_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
- };
- 
-@@ -268,7 +264,6 @@ static struct platform_device scif3_device = {
- static struct plat_sci_port scif4_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
- };
- 
-@@ -290,7 +285,6 @@ static struct platform_device scif4_device = {
- static struct plat_sci_port scif5_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
- };
- 
-@@ -312,7 +306,6 @@ static struct platform_device scif5_device = {
- static struct plat_sci_port scif6_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
- };
- 
-@@ -334,7 +327,6 @@ static struct platform_device scif6_device = {
- static struct plat_sci_port scif7_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
- };
- 
-diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7203.c b/arch/sh/kernel/cpu/sh2a/setup-sh7203.c
-index f2a9baaa541b..d55a0f30ada3 100644
---- a/arch/sh/kernel/cpu/sh2a/setup-sh7203.c
-+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7203.c
-@@ -177,7 +177,6 @@ static struct plat_sci_port scif0_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
- 			  SCSCR_REIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
- 	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,
- };
-@@ -201,7 +200,6 @@ static struct plat_sci_port scif1_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
- 			  SCSCR_REIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
- 	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,
- };
-@@ -225,7 +223,6 @@ static struct plat_sci_port scif2_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
- 			  SCSCR_REIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
- 	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,
- };
-@@ -249,7 +246,6 @@ static struct plat_sci_port scif3_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
- 			  SCSCR_REIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
- 	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,
- };
-diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7206.c b/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
-index fc7cacd36729..241e745e3ced 100644
---- a/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
-+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
-@@ -136,7 +136,6 @@ static DECLARE_INTC_DESC(intc_desc, "sh7206", vectors, groups,
- static struct plat_sci_port scif0_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
- };
- 
-@@ -158,7 +157,6 @@ static struct platform_device scif0_device = {
- static struct plat_sci_port scif1_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
- };
- 
-@@ -180,7 +178,6 @@ static struct platform_device scif1_device = {
- static struct plat_sci_port scif2_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
- };
- 
-@@ -202,7 +199,6 @@ static struct platform_device scif2_device = {
- static struct plat_sci_port scif3_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
- };
- 
-diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7264.c b/arch/sh/kernel/cpu/sh2a/setup-sh7264.c
-index 00edbdabcaa1..ad5b0f429882 100644
---- a/arch/sh/kernel/cpu/sh2a/setup-sh7264.c
-+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7264.c
-@@ -229,7 +229,6 @@ static struct plat_sci_port scif0_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
- 			  SCSCR_REIE | SCSCR_TOIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
- 	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,
- };
-@@ -256,7 +255,6 @@ static struct plat_sci_port scif1_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
- 			  SCSCR_REIE | SCSCR_TOIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
- 	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,
- };
-@@ -283,7 +281,6 @@ static struct plat_sci_port scif2_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
- 			  SCSCR_REIE | SCSCR_TOIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
- 	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,
- };
-@@ -310,7 +307,6 @@ static struct plat_sci_port scif3_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
- 			  SCSCR_REIE | SCSCR_TOIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
- 	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,
- };
-@@ -337,7 +333,6 @@ static struct plat_sci_port scif4_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
- 			  SCSCR_REIE | SCSCR_TOIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
- 	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,
- };
-@@ -364,7 +359,6 @@ static struct plat_sci_port scif5_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
- 			  SCSCR_REIE | SCSCR_TOIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
- 	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,
- };
-@@ -391,7 +385,6 @@ static struct plat_sci_port scif6_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
- 			  SCSCR_REIE | SCSCR_TOIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
- 	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,
- };
-@@ -418,7 +411,6 @@ static struct plat_sci_port scif7_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
- 			  SCSCR_REIE | SCSCR_TOIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
- 	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,
- };
-diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7269.c b/arch/sh/kernel/cpu/sh2a/setup-sh7269.c
-index 5cdbaac322a0..3995119f65dc 100644
---- a/arch/sh/kernel/cpu/sh2a/setup-sh7269.c
-+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7269.c
-@@ -251,7 +251,6 @@ static struct plat_sci_port scif0_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
- 			  SCSCR_REIE | SCSCR_TOIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
- 	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,
- };
-@@ -278,7 +277,6 @@ static struct plat_sci_port scif1_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
- 			  SCSCR_REIE | SCSCR_TOIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
- 	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,
- };
-@@ -305,7 +303,6 @@ static struct plat_sci_port scif2_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
- 			  SCSCR_REIE | SCSCR_TOIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
- 	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,
- };
-@@ -332,7 +329,6 @@ static struct plat_sci_port scif3_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
- 			  SCSCR_REIE | SCSCR_TOIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
- 	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,
- };
-@@ -359,7 +355,6 @@ static struct plat_sci_port scif4_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
- 			  SCSCR_REIE | SCSCR_TOIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
- 	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,
- };
-@@ -386,7 +381,6 @@ static struct plat_sci_port scif5_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
- 			  SCSCR_REIE | SCSCR_TOIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
- 	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,
- };
-@@ -413,7 +407,6 @@ static struct plat_sci_port scif6_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
- 			  SCSCR_REIE | SCSCR_TOIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
- 	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,
- };
-@@ -440,7 +433,6 @@ static struct plat_sci_port scif7_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |
- 			  SCSCR_REIE | SCSCR_TOIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
- 	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,
- };
-diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7705.c b/arch/sh/kernel/cpu/sh3/setup-sh7705.c
-index 10dd0a01d5f8..c76b2543b85f 100644
---- a/arch/sh/kernel/cpu/sh3/setup-sh7705.c
-+++ b/arch/sh/kernel/cpu/sh3/setup-sh7705.c
-@@ -73,7 +73,6 @@ static struct plat_sci_port scif0_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_TIE | SCSCR_RIE  | SCSCR_TE |
- 			  SCSCR_RE  | SCSCR_CKE1 | SCSCR_CKE0,
--	.scbrr_algo_id	= SCBRR_ALGO_4,
- 	.type		= PORT_SCIF,
- 	.ops		= &sh770x_sci_port_ops,
- 	.regtype	= SCIx_SH7705_SCIF_REGTYPE,
-@@ -97,7 +96,6 @@ static struct platform_device scif0_device = {
- static struct plat_sci_port scif1_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_TIE | SCSCR_RIE | SCSCR_TE | SCSCR_RE,
--	.scbrr_algo_id	= SCBRR_ALGO_4,
- 	.type		= PORT_SCIF,
- 	.ops		= &sh770x_sci_port_ops,
- 	.regtype	= SCIx_SH7705_SCIF_REGTYPE,
-diff --git a/arch/sh/kernel/cpu/sh3/setup-sh770x.c b/arch/sh/kernel/cpu/sh3/setup-sh770x.c
-index d5541b0a6dc5..ff1465c0519c 100644
---- a/arch/sh/kernel/cpu/sh3/setup-sh770x.c
-+++ b/arch/sh/kernel/cpu/sh3/setup-sh770x.c
-@@ -112,7 +112,6 @@ static struct plat_sci_port scif0_platform_data = {
- 	.port_reg	= 0xa4000136,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_TE | SCSCR_RE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCI,
- 	.ops		= &sh770x_sci_port_ops,
- 	.regshift	= 1,
-@@ -138,7 +137,6 @@ static struct platform_device scif0_device = {
- static struct plat_sci_port scif1_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_TE | SCSCR_RE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
- 	.ops		= &sh770x_sci_port_ops,
- 	.regtype	= SCIx_SH3_SCIF_REGTYPE,
-@@ -165,7 +163,6 @@ static struct plat_sci_port scif2_platform_data = {
- 	.port_reg	= SCIx_NOT_SUPPORTED,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_TE | SCSCR_RE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_IRDA,
- 	.ops		= &sh770x_sci_port_ops,
- 	.regshift	= 1,
-diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7710.c b/arch/sh/kernel/cpu/sh3/setup-sh7710.c
-index de229f5c6b1e..e2ce9360ed5a 100644
---- a/arch/sh/kernel/cpu/sh3/setup-sh7710.c
-+++ b/arch/sh/kernel/cpu/sh3/setup-sh7710.c
-@@ -101,7 +101,6 @@ static struct plat_sci_port scif0_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_TE | SCSCR_RE | SCSCR_REIE |
- 			  SCSCR_CKE1 | SCSCR_CKE0,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
- };
- 
-@@ -124,7 +123,6 @@ static struct plat_sci_port scif1_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_TE | SCSCR_RE | SCSCR_REIE |
- 			  SCSCR_CKE1 | SCSCR_CKE0,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
- };
- 
-diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7720.c b/arch/sh/kernel/cpu/sh3/setup-sh7720.c
-index ca835819357b..1d5729dc0724 100644
---- a/arch/sh/kernel/cpu/sh3/setup-sh7720.c
-+++ b/arch/sh/kernel/cpu/sh3/setup-sh7720.c
-@@ -54,7 +54,6 @@ static struct platform_device rtc_device = {
- static struct plat_sci_port scif0_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE,
--	.scbrr_algo_id	= SCBRR_ALGO_4,
- 	.type		= PORT_SCIF,
- 	.ops		= &sh7720_sci_port_ops,
- 	.regtype	= SCIx_SH7705_SCIF_REGTYPE,
-@@ -78,7 +77,6 @@ static struct platform_device scif0_device = {
- static struct plat_sci_port scif1_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE,
--	.scbrr_algo_id	= SCBRR_ALGO_4,
- 	.type		= PORT_SCIF,
- 	.ops		= &sh7720_sci_port_ops,
- 	.regtype	= SCIx_SH7705_SCIF_REGTYPE,
-diff --git a/arch/sh/kernel/cpu/sh4/setup-sh4-202.c b/arch/sh/kernel/cpu/sh4/setup-sh4-202.c
-index 0fc6a105144a..a8bd778d5ac8 100644
---- a/arch/sh/kernel/cpu/sh4/setup-sh4-202.c
-+++ b/arch/sh/kernel/cpu/sh4/setup-sh4-202.c
-@@ -19,7 +19,6 @@
- static struct plat_sci_port scif0_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
- };
- 
-diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7750.c b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
-index 5613c15d8163..a447a248491f 100644
---- a/arch/sh/kernel/cpu/sh4/setup-sh7750.c
-+++ b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
-@@ -41,7 +41,6 @@ static struct plat_sci_port sci_platform_data = {
- 	.port_reg	= 0xffe0001C,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_TE | SCSCR_RE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCI,
- 	.regshift	= 2,
- };
-@@ -64,7 +63,6 @@ static struct platform_device sci_device = {
- static struct plat_sci_port scif_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_TE | SCSCR_RE | SCSCR_REIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
- };
- 
-diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7760.c b/arch/sh/kernel/cpu/sh4/setup-sh7760.c
-index a83e6f5a42d0..1abd9fb4a386 100644
---- a/arch/sh/kernel/cpu/sh4/setup-sh7760.c
-+++ b/arch/sh/kernel/cpu/sh4/setup-sh7760.c
-@@ -130,7 +130,6 @@ static DECLARE_INTC_DESC(intc_desc_irq, "sh7760-irq", vectors_irq, groups,
- static struct plat_sci_port scif0_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
- 	.regtype	= SCIx_SH4_SCIF_FIFODATA_REGTYPE,
- };
-@@ -157,7 +156,6 @@ static struct plat_sci_port scif1_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.type		= PORT_SCIF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.regtype	= SCIx_SH4_SCIF_FIFODATA_REGTYPE,
- };
- 
-@@ -182,7 +180,6 @@ static struct platform_device scif1_device = {
- static struct plat_sci_port scif2_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
- 	.regtype	= SCIx_SH4_SCIF_FIFODATA_REGTYPE,
- };
-@@ -208,7 +205,6 @@ static struct platform_device scif2_device = {
- static struct plat_sci_port scif3_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCI,
- 	.regshift	= 2,
- };
-diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
-index 8b45f672448d..245d19254489 100644
---- a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
-+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
-@@ -20,7 +20,6 @@
- static struct plat_sci_port scif0_platform_data = {
- 	.flags          = UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type           = PORT_SCIF,
- };
- 
-@@ -42,7 +41,6 @@ static struct platform_device scif0_device = {
- static struct plat_sci_port scif1_platform_data = {
- 	.flags          = UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type           = PORT_SCIF,
- };
- 
-@@ -64,7 +62,6 @@ static struct platform_device scif1_device = {
- static struct plat_sci_port scif2_platform_data = {
- 	.flags          = UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type           = PORT_SCIF,
- };
- 
-@@ -86,7 +83,6 @@ static struct platform_device scif2_device = {
- static struct plat_sci_port scif3_platform_data = {
- 	.flags          = UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type           = PORT_SCIF,
- };
- 
-diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
-index 317f710a5b2b..6f56cbd76b20 100644
---- a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
-+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
-@@ -23,7 +23,6 @@ static struct plat_sci_port scif0_platform_data = {
- 	.port_reg	= 0xa405013e,
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
- };
- 
-diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
-index 6aeebb5299f6..5a94efc8d4ce 100644
---- a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
-+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
-@@ -181,7 +181,6 @@ struct platform_device dma_device = {
- static struct plat_sci_port scif0_platform_data = {
- 	.flags          = UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type           = PORT_SCIF,
- 	.ops		= &sh7722_sci_port_ops,
- 	.regtype	= SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
-@@ -205,7 +204,6 @@ static struct platform_device scif0_device = {
- static struct plat_sci_port scif1_platform_data = {
- 	.flags          = UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type           = PORT_SCIF,
- 	.ops		= &sh7722_sci_port_ops,
- 	.regtype	= SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
-@@ -229,7 +227,6 @@ static struct platform_device scif1_device = {
- static struct plat_sci_port scif2_platform_data = {
- 	.flags          = UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type           = PORT_SCIF,
- 	.ops		= &sh7722_sci_port_ops,
- 	.regtype	= SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
-diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
-index 079951be4122..3c5eb0993a75 100644
---- a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
-+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
-@@ -26,7 +26,6 @@ static struct plat_sci_port scif0_platform_data = {
- 	.port_reg	= 0xa4050160,
- 	.flags          = UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type           = PORT_SCIF,
- 	.regtype	= SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
- };
-@@ -50,7 +49,6 @@ static struct plat_sci_port scif1_platform_data = {
- 	.port_reg	= SCIx_NOT_SUPPORTED,
- 	.flags          = UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type           = PORT_SCIF,
- 	.regtype	= SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
- };
-@@ -74,7 +72,6 @@ static struct plat_sci_port scif2_platform_data = {
- 	.port_reg	= SCIx_NOT_SUPPORTED,
- 	.flags          = UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type           = PORT_SCIF,
- 	.regtype	= SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
- };
-diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
-index 59c359469f13..60ebbc6842ff 100644
---- a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
-+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
-@@ -293,7 +293,6 @@ static struct plat_sci_port scif0_platform_data = {
- 	.port_reg	= SCIx_NOT_SUPPORTED,
- 	.flags          = UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type           = PORT_SCIF,
- 	.regtype	= SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
- };
-@@ -317,7 +316,6 @@ static struct plat_sci_port scif1_platform_data = {
- 	.port_reg	= SCIx_NOT_SUPPORTED,
- 	.flags          = UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type           = PORT_SCIF,
- 	.regtype	= SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
- };
-@@ -341,7 +339,6 @@ static struct plat_sci_port scif2_platform_data = {
- 	.port_reg	= SCIx_NOT_SUPPORTED,
- 	.flags          = UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type           = PORT_SCIF,
- 	.regtype	= SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
- };
-diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7734.c b/arch/sh/kernel/cpu/sh4a/setup-sh7734.c
-index bedf8fb5be6f..dad4ed1b2f94 100644
---- a/arch/sh/kernel/cpu/sh4a/setup-sh7734.c
-+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7734.c
-@@ -27,7 +27,6 @@
- static struct plat_sci_port scif0_platform_data = {
- 	.flags          = UPF_BOOT_AUTOCONF,
- 	.scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
--	.scbrr_algo_id  = SCBRR_ALGO_2,
- 	.type           = PORT_SCIF,
- 	.regtype        = SCIx_SH4_SCIF_REGTYPE,
- };
-@@ -50,7 +49,6 @@ static struct platform_device scif0_device = {
- static struct plat_sci_port scif1_platform_data = {
- 	.flags          = UPF_BOOT_AUTOCONF,
- 	.scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type           = PORT_SCIF,
- 	.regtype        = SCIx_SH4_SCIF_REGTYPE,
- };
-@@ -73,7 +71,6 @@ static struct platform_device scif1_device = {
- static struct plat_sci_port scif2_platform_data = {
- 	.flags          = UPF_BOOT_AUTOCONF,
- 	.scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
--	.scbrr_algo_id  = SCBRR_ALGO_2,
- 	.type           = PORT_SCIF,
- 	.regtype        = SCIx_SH4_SCIF_REGTYPE,
- };
-@@ -96,7 +93,6 @@ static struct platform_device scif2_device = {
- static struct plat_sci_port scif3_platform_data = {
- 	.flags          = UPF_BOOT_AUTOCONF,
- 	.scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
--	.scbrr_algo_id  = SCBRR_ALGO_2,
- 	.type           = PORT_SCIF,
- 	.regtype        = SCIx_SH4_SCIF_REGTYPE,
- };
-@@ -119,7 +115,6 @@ static struct platform_device scif3_device = {
- static struct plat_sci_port scif4_platform_data = {
- 	.flags          = UPF_BOOT_AUTOCONF,
- 	.scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type           = PORT_SCIF,
- 	.regtype        = SCIx_SH4_SCIF_REGTYPE,
- };
-@@ -142,7 +137,6 @@ static struct platform_device scif4_device = {
- static struct plat_sci_port scif5_platform_data = {
- 	.flags          = UPF_BOOT_AUTOCONF,
- 	.scscr          = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type           = PORT_SCIF,
- 	.regtype		= SCIx_SH4_SCIF_REGTYPE,
- };
-diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
-index 6b8d0e61704c..e43e5db53913 100644
---- a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
-+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
-@@ -26,7 +26,6 @@
- static struct plat_sci_port scif2_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
- };
- 
-@@ -48,7 +47,6 @@ static struct platform_device scif2_device = {
- static struct plat_sci_port scif3_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
- };
- 
-@@ -70,7 +68,6 @@ static struct platform_device scif3_device = {
- static struct plat_sci_port scif4_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
- };
- 
-diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
-index 940505cec66f..5eebbd7f4c21 100644
---- a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
-+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
-@@ -21,7 +21,6 @@
- static struct plat_sci_port scif0_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
- 	.regtype	= SCIx_SH4_SCIF_FIFODATA_REGTYPE,
- };
-@@ -44,7 +43,6 @@ static struct platform_device scif0_device = {
- static struct plat_sci_port scif1_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
- 	.regtype	= SCIx_SH4_SCIF_FIFODATA_REGTYPE,
- };
-@@ -67,7 +65,6 @@ static struct platform_device scif1_device = {
- static struct plat_sci_port scif2_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
- 	.regtype	= SCIx_SH4_SCIF_FIFODATA_REGTYPE,
- };
-diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7770.c b/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
-index f9c04dee4e82..e1ba8cb74e5a 100644
---- a/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
-+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
-@@ -18,7 +18,6 @@
- static struct plat_sci_port scif0_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
- };
- 
-@@ -40,7 +39,6 @@ static struct platform_device scif0_device = {
- static struct plat_sci_port scif1_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
- };
- 
-@@ -62,7 +60,6 @@ static struct platform_device scif1_device = {
- static struct plat_sci_port scif2_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
- };
- 
-@@ -84,7 +81,6 @@ static struct platform_device scif2_device = {
- static struct plat_sci_port scif3_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
- };
- 
-@@ -106,7 +102,6 @@ static struct platform_device scif3_device = {
- static struct plat_sci_port scif4_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
- };
- 
-@@ -128,7 +123,6 @@ static struct platform_device scif4_device = {
- static struct plat_sci_port scif5_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
- };
- 
-@@ -150,7 +144,6 @@ static struct platform_device scif5_device = {
- static struct plat_sci_port scif6_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
- };
- 
-@@ -172,7 +165,6 @@ static struct platform_device scif6_device = {
- static struct plat_sci_port scif7_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
- };
- 
-@@ -194,7 +186,6 @@ static struct platform_device scif7_device = {
- static struct plat_sci_port scif8_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
- };
- 
-@@ -216,7 +207,6 @@ static struct platform_device scif8_device = {
- static struct plat_sci_port scif9_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
- };
- 
-diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
-index 227f8f4080fa..668e54bafa86 100644
---- a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
-+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
-@@ -20,7 +20,6 @@
- static struct plat_sci_port scif0_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
--	.scbrr_algo_id	= SCBRR_ALGO_1,
- 	.type		= PORT_SCIF,
- 	.regtype	= SCIx_SH4_SCIF_FIFODATA_REGTYPE,
- };
-@@ -43,7 +42,6 @@ static struct platform_device scif0_device = {
- static struct plat_sci_port scif1_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
--	.scbrr_algo_id	= SCBRR_ALGO_1,
- 	.type		= PORT_SCIF,
- 	.regtype	= SCIx_SH4_SCIF_FIFODATA_REGTYPE,
- };
-@@ -419,9 +417,7 @@ void __init plat_early_device_setup(void)
- {
- 	if (mach_is_sh2007()) {
- 		scif0_platform_data.scscr &= ~SCSCR_CKE1;
--		scif0_platform_data.scbrr_algo_id = SCBRR_ALGO_2;
- 		scif1_platform_data.scscr &= ~SCSCR_CKE1;
--		scif1_platform_data.scbrr_algo_id = SCBRR_ALGO_2;
- 	}
- 
- 	early_platform_add_devices(sh7780_early_devices,
-diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
-index b9f64c1ee895..4aa679140209 100644
---- a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
-+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
-@@ -22,7 +22,6 @@
- static struct plat_sci_port scif0_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
--	.scbrr_algo_id	= SCBRR_ALGO_1,
- 	.type		= PORT_SCIF,
- 	.regtype	= SCIx_SH4_SCIF_FIFODATA_REGTYPE,
- };
-@@ -45,7 +44,6 @@ static struct platform_device scif0_device = {
- static struct plat_sci_port scif1_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
--	.scbrr_algo_id	= SCBRR_ALGO_1,
- 	.type		= PORT_SCIF,
- 	.regtype	= SCIx_SH4_SCIF_FIFODATA_REGTYPE,
- };
-@@ -68,7 +66,6 @@ static struct platform_device scif1_device = {
- static struct plat_sci_port scif2_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
--	.scbrr_algo_id	= SCBRR_ALGO_1,
- 	.type		= PORT_SCIF,
- 	.regtype	= SCIx_SH4_SCIF_FIFODATA_REGTYPE,
- };
-@@ -91,7 +88,6 @@ static struct platform_device scif2_device = {
- static struct plat_sci_port scif3_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
--	.scbrr_algo_id	= SCBRR_ALGO_1,
- 	.type		= PORT_SCIF,
- 	.regtype	= SCIx_SH4_SCIF_FIFODATA_REGTYPE,
- };
-@@ -114,7 +110,6 @@ static struct platform_device scif3_device = {
- static struct plat_sci_port scif4_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
--	.scbrr_algo_id	= SCBRR_ALGO_1,
- 	.type		= PORT_SCIF,
- 	.regtype	= SCIx_SH4_SCIF_FIFODATA_REGTYPE,
- };
-@@ -137,7 +132,6 @@ static struct platform_device scif4_device = {
- static struct plat_sci_port scif5_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
--	.scbrr_algo_id	= SCBRR_ALGO_1,
- 	.type		= PORT_SCIF,
- 	.regtype	= SCIx_SH4_SCIF_FIFODATA_REGTYPE,
- };
-diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
-index 92b95ceabd6e..5d619a551a3b 100644
---- a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
-+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
-@@ -30,7 +30,6 @@
- static struct plat_sci_port scif0_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
--	.scbrr_algo_id	= SCBRR_ALGO_1,
- 	.type		= PORT_SCIF,
- 	.regtype	= SCIx_SH4_SCIF_FIFODATA_REGTYPE,
- };
-@@ -59,7 +58,6 @@ static struct platform_device scif0_device = {
- static struct plat_sci_port scif1_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
--	.scbrr_algo_id	= SCBRR_ALGO_1,
- 	.type		= PORT_SCIF,
- 	.regtype	= SCIx_SH4_SCIF_FIFODATA_REGTYPE,
- };
-@@ -91,7 +89,6 @@ static struct platform_device scif1_device = {
- static struct plat_sci_port scif2_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
--	.scbrr_algo_id	= SCBRR_ALGO_1,
- 	.type		= PORT_SCIF,
- 	.regtype	= SCIx_SH4_SCIF_FIFODATA_REGTYPE,
- };
-@@ -114,7 +111,6 @@ static struct platform_device scif2_device = {
- static struct plat_sci_port scif3_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
--	.scbrr_algo_id	= SCBRR_ALGO_1,
- 	.type		= PORT_SCIF,
- 	.regtype	= SCIx_SH4_SCIF_FIFODATA_REGTYPE,
- };
-@@ -137,7 +133,6 @@ static struct platform_device scif3_device = {
- static struct plat_sci_port scif4_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
--	.scbrr_algo_id	= SCBRR_ALGO_1,
- 	.type		= PORT_SCIF,
- 	.regtype	= SCIx_SH4_SCIF_FIFODATA_REGTYPE,
- };
-@@ -160,7 +155,6 @@ static struct platform_device scif4_device = {
- static struct plat_sci_port scif5_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
--	.scbrr_algo_id	= SCBRR_ALGO_1,
- 	.type		= PORT_SCIF,
- 	.regtype	= SCIx_SH4_SCIF_FIFODATA_REGTYPE,
- };
-diff --git a/arch/sh/kernel/cpu/sh4a/setup-shx3.c b/arch/sh/kernel/cpu/sh4a/setup-shx3.c
-index 4d65be9be001..0856bcbb1da0 100644
---- a/arch/sh/kernel/cpu/sh4a/setup-shx3.c
-+++ b/arch/sh/kernel/cpu/sh4a/setup-shx3.c
-@@ -30,7 +30,6 @@
- static struct plat_sci_port scif0_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
- };
- 
-@@ -55,7 +54,6 @@ static struct platform_device scif0_device = {
- static struct plat_sci_port scif1_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
- };
- 
-@@ -80,7 +78,6 @@ static struct platform_device scif1_device = {
- static struct plat_sci_port scif2_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
- };
- 
-diff --git a/arch/sh/kernel/cpu/sh5/setup-sh5.c b/arch/sh/kernel/cpu/sh5/setup-sh5.c
-index 64b098162c98..14d68213d16b 100644
---- a/arch/sh/kernel/cpu/sh5/setup-sh5.c
-+++ b/arch/sh/kernel/cpu/sh5/setup-sh5.c
-@@ -19,7 +19,6 @@
- static struct plat_sci_port scif0_platform_data = {
- 	.flags		= UPF_BOOT_AUTOCONF | UPF_IOREMAP,
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
- 	.type		= PORT_SCIF,
- };
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0034-ASoC-fsi-reserve-prefetch-period-on-DMA-transferring.patch b/patches.renesas/0034-ASoC-fsi-reserve-prefetch-period-on-DMA-transferring.patch
deleted file mode 100644
index b7b3cfec95ac7..0000000000000
--- a/patches.renesas/0034-ASoC-fsi-reserve-prefetch-period-on-DMA-transferring.patch
+++ /dev/null
@@ -1,129 +0,0 @@
-From 6f456f8622290dde4729ff5275f1b3a0df0cc2b4 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Sun, 25 Aug 2013 23:36:23 -0700
-Subject: ASoC: fsi: reserve prefetch period on DMA transferring
-
-Current FSI is supporting DMAEngine transfer,
-but, it needs to use work queue.
-Therefore, DMA transfer settings might be late if there is heavy task.
-This patch reserves next period beforehand on DMA transfer function.
-Android sound will be breaking up without this patch.
-
-Tested-by: Tomohito Esaki <etom@igel.co.jp>
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@linaro.org>
-(cherry picked from commit 53110a256a334c5e01db2d94c5306b4880a9180e)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/sh/fsi.c | 51 +++++++++++++++++++++++++++++++++------------------
- 1 file changed, 33 insertions(+), 18 deletions(-)
-
-diff --git a/sound/soc/sh/fsi.c b/sound/soc/sh/fsi.c
-index 30390260..b33ca7cd 100644
---- a/sound/soc/sh/fsi.c
-+++ b/sound/soc/sh/fsi.c
-@@ -235,6 +235,8 @@ struct fsi_stream {
- 	struct sh_dmae_slave	slave; /* see fsi_handler_init() */
- 	struct work_struct	work;
- 	dma_addr_t		dma;
-+	int			loop_cnt;
-+	int			additional_pos;
- };
- 
- struct fsi_clk {
-@@ -1289,6 +1291,8 @@ static int fsi_dma_init(struct fsi_priv *fsi, struct fsi_stream *io)
- 	io->bus_option = BUSOP_SET(24, PACKAGE_24BITBUS_BACK) |
- 			 BUSOP_SET(16, PACKAGE_16BITBUS_STREAM);
- 
-+	io->loop_cnt = 2; /* push 1st, 2nd period first, then 3rd, 4th... */
-+	io->additional_pos = 0;
- 	io->dma = dma_map_single(dai->dev, runtime->dma_area,
- 				 snd_pcm_lib_buffer_bytes(io->substream), dir);
- 	return 0;
-@@ -1305,11 +1309,15 @@ static int fsi_dma_quit(struct fsi_priv *fsi, struct fsi_stream *io)
- 	return 0;
- }
- 
--static dma_addr_t fsi_dma_get_area(struct fsi_stream *io)
-+static dma_addr_t fsi_dma_get_area(struct fsi_stream *io, int additional)
- {
- 	struct snd_pcm_runtime *runtime = io->substream->runtime;
-+	int period = io->period_pos + additional;
- 
--	return io->dma + samples_to_bytes(runtime, io->buff_sample_pos);
-+	if (period >= runtime->periods)
-+		period = 0;
-+
-+	return io->dma + samples_to_bytes(runtime, period * io->period_samples);
- }
- 
- static void fsi_dma_complete(void *data)
-@@ -1321,7 +1329,7 @@ static void fsi_dma_complete(void *data)
- 	enum dma_data_direction dir = fsi_stream_is_play(fsi, io) ?
- 		DMA_TO_DEVICE : DMA_FROM_DEVICE;
- 
--	dma_sync_single_for_cpu(dai->dev, fsi_dma_get_area(io),
-+	dma_sync_single_for_cpu(dai->dev, fsi_dma_get_area(io, 0),
- 			samples_to_bytes(runtime, io->period_samples), dir);
- 
- 	io->buff_sample_pos += io->period_samples;
-@@ -1347,7 +1355,7 @@ static void fsi_dma_do_work(struct work_struct *work)
- 	struct snd_pcm_runtime *runtime;
- 	enum dma_data_direction dir;
- 	int is_play = fsi_stream_is_play(fsi, io);
--	int len;
-+	int len, i;
- 	dma_addr_t buf;
- 
- 	if (!fsi_stream_is_working(fsi, io))
-@@ -1357,26 +1365,33 @@ static void fsi_dma_do_work(struct work_struct *work)
- 	runtime	= io->substream->runtime;
- 	dir	= is_play ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
- 	len	= samples_to_bytes(runtime, io->period_samples);
--	buf	= fsi_dma_get_area(io);
- 
--	dma_sync_single_for_device(dai->dev, buf, len, dir);
-+	for (i = 0; i < io->loop_cnt; i++) {
-+		buf	= fsi_dma_get_area(io, io->additional_pos);
- 
--	desc = dmaengine_prep_slave_single(io->chan, buf, len, dir,
--					   DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
--	if (!desc) {
--		dev_err(dai->dev, "dmaengine_prep_slave_sg() fail\n");
--		return;
--	}
-+		dma_sync_single_for_device(dai->dev, buf, len, dir);
- 
--	desc->callback		= fsi_dma_complete;
--	desc->callback_param	= io;
-+		desc = dmaengine_prep_slave_single(io->chan, buf, len, dir,
-+					DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
-+		if (!desc) {
-+			dev_err(dai->dev, "dmaengine_prep_slave_sg() fail\n");
-+			return;
-+		}
- 
--	if (dmaengine_submit(desc) < 0) {
--		dev_err(dai->dev, "tx_submit() fail\n");
--		return;
-+		desc->callback		= fsi_dma_complete;
-+		desc->callback_param	= io;
-+
-+		if (dmaengine_submit(desc) < 0) {
-+			dev_err(dai->dev, "tx_submit() fail\n");
-+			return;
-+		}
-+
-+		dma_async_issue_pending(io->chan);
-+
-+		io->additional_pos = 1;
- 	}
- 
--	dma_async_issue_pending(io->chan);
-+	io->loop_cnt = 1;
- 
- 	/*
- 	 * FIXME
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0034-drm-rcar-du-Add-FBDEV-emulation-support.patch b/patches.renesas/0034-drm-rcar-du-Add-FBDEV-emulation-support.patch
deleted file mode 100644
index d3819a110d531..0000000000000
--- a/patches.renesas/0034-drm-rcar-du-Add-FBDEV-emulation-support.patch
+++ /dev/null
@@ -1,170 +0,0 @@
-From fc0913f6a501656257f93a2ac79c01b0ebd2c166 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 14 Mar 2013 22:45:22 +0100
-Subject: drm/rcar-du: Add FBDEV emulation support
-
-Use the FB CMA helpers to implement FBDEV emulation support. The VGA
-connector status must be reported as connector_status_connected instead
-of connector_status_unknown to be usable by the emulation layer.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit 3864c6f446f3c2ebbeca1d45e28452682706c1aa)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpu/drm/rcar-du/rcar_du_drv.c    | 14 +++++++++++++
- drivers/gpu/drm/rcar-du/rcar_du_drv.h    |  2 ++
- drivers/gpu/drm/rcar-du/rcar_du_kms.c    | 36 +++++++++++++++++++++++++-------
- drivers/gpu/drm/rcar-du/rcar_du_vgacon.c |  2 +-
- 4 files changed, 45 insertions(+), 9 deletions(-)
-
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.c b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-index a4c2007f5bb5..c63914e66089 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.c
-@@ -21,6 +21,7 @@
- 
- #include <drm/drmP.h>
- #include <drm/drm_crtc_helper.h>
-+#include <drm/drm_fb_cma_helper.h>
- #include <drm/drm_gem_cma_helper.h>
- 
- #include "rcar_du_crtc.h"
-@@ -34,6 +35,11 @@
- 
- static int rcar_du_unload(struct drm_device *dev)
- {
-+	struct rcar_du_device *rcdu = dev->dev_private;
-+
-+	if (rcdu->fbdev)
-+		drm_fbdev_cma_fini(rcdu->fbdev);
-+
- 	drm_kms_helper_poll_fini(dev);
- 	drm_mode_config_cleanup(dev);
- 	drm_vblank_cleanup(dev);
-@@ -109,6 +115,13 @@ static void rcar_du_preclose(struct drm_device *dev, struct drm_file *file)
- 		rcar_du_crtc_cancel_page_flip(&rcdu->crtcs[i], file);
- }
- 
-+static void rcar_du_lastclose(struct drm_device *dev)
-+{
-+	struct rcar_du_device *rcdu = dev->dev_private;
-+
-+	drm_fbdev_cma_restore_mode(rcdu->fbdev);
-+}
-+
- static int rcar_du_enable_vblank(struct drm_device *dev, int crtc)
- {
- 	struct rcar_du_device *rcdu = dev->dev_private;
-@@ -145,6 +158,7 @@ static struct drm_driver rcar_du_driver = {
- 	.load			= rcar_du_load,
- 	.unload			= rcar_du_unload,
- 	.preclose		= rcar_du_preclose,
-+	.lastclose		= rcar_du_lastclose,
- 	.get_vblank_counter	= drm_vblank_count,
- 	.enable_vblank		= rcar_du_enable_vblank,
- 	.disable_vblank		= rcar_du_disable_vblank,
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_drv.h b/drivers/gpu/drm/rcar-du/rcar_du_drv.h
-index 050d71c1f785..65d2d636b002 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_drv.h
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_drv.h
-@@ -23,6 +23,7 @@
- struct clk;
- struct device;
- struct drm_device;
-+struct drm_fbdev_cma;
- struct rcar_du_device;
- struct rcar_du_lvdsenc;
- 
-@@ -66,6 +67,7 @@ struct rcar_du_device {
- 	void __iomem *mmio;
- 
- 	struct drm_device *ddev;
-+	struct drm_fbdev_cma *fbdev;
- 
- 	struct rcar_du_crtc crtcs[3];
- 	unsigned int num_crtcs;
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms.c b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
-index cc71b1a0c3ce..b31ac080c4a7 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_kms.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
-@@ -167,8 +167,16 @@ rcar_du_fb_create(struct drm_device *dev, struct drm_file *file_priv,
- 	return drm_fb_cma_create(dev, file_priv, mode_cmd);
- }
- 
-+static void rcar_du_output_poll_changed(struct drm_device *dev)
-+{
-+	struct rcar_du_device *rcdu = dev->dev_private;
-+
-+	drm_fbdev_cma_hotplug_event(rcdu->fbdev);
-+}
-+
- static const struct drm_mode_config_funcs rcar_du_mode_config_funcs = {
- 	.fb_create = rcar_du_fb_create,
-+	.output_poll_changed = rcar_du_output_poll_changed,
- };
- 
- int rcar_du_modeset_init(struct rcar_du_device *rcdu)
-@@ -179,17 +187,18 @@ int rcar_du_modeset_init(struct rcar_du_device *rcdu)
- 
- 	struct drm_device *dev = rcdu->ddev;
- 	struct drm_encoder *encoder;
-+	struct drm_fbdev_cma *fbdev;
- 	unsigned int num_groups;
- 	unsigned int i;
- 	int ret;
- 
--	drm_mode_config_init(rcdu->ddev);
-+	drm_mode_config_init(dev);
- 
--	rcdu->ddev->mode_config.min_width = 0;
--	rcdu->ddev->mode_config.min_height = 0;
--	rcdu->ddev->mode_config.max_width = 4095;
--	rcdu->ddev->mode_config.max_height = 2047;
--	rcdu->ddev->mode_config.funcs = &rcar_du_mode_config_funcs;
-+	dev->mode_config.min_width = 0;
-+	dev->mode_config.min_height = 0;
-+	dev->mode_config.max_width = 4095;
-+	dev->mode_config.max_height = 2047;
-+	dev->mode_config.funcs = &rcar_du_mode_config_funcs;
- 
- 	rcdu->num_crtcs = rcdu->info->num_crtcs;
- 
-@@ -262,9 +271,20 @@ int rcar_du_modeset_init(struct rcar_du_device *rcdu)
- 			return ret;
- 	}
- 
--	drm_kms_helper_poll_init(rcdu->ddev);
-+	drm_kms_helper_poll_init(dev);
-+
-+	drm_helper_disable_unused_functions(dev);
-+
-+	fbdev = drm_fbdev_cma_init(dev, 32, dev->mode_config.num_crtc,
-+				   dev->mode_config.num_connector);
-+	if (IS_ERR(fbdev))
-+		return PTR_ERR(fbdev);
-+
-+#ifndef CONFIG_FRAMEBUFFER_CONSOLE
-+	drm_fbdev_cma_restore_mode(fbdev);
-+#endif
- 
--	drm_helper_disable_unused_functions(rcdu->ddev);
-+	rcdu->fbdev = fbdev;
- 
- 	return 0;
- }
-diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vgacon.c b/drivers/gpu/drm/rcar-du/rcar_du_vgacon.c
-index 36105db9bda1..41d563adfeaa 100644
---- a/drivers/gpu/drm/rcar-du/rcar_du_vgacon.c
-+++ b/drivers/gpu/drm/rcar-du/rcar_du_vgacon.c
-@@ -46,7 +46,7 @@ static void rcar_du_vga_connector_destroy(struct drm_connector *connector)
- static enum drm_connector_status
- rcar_du_vga_connector_detect(struct drm_connector *connector, bool force)
- {
--	return connector_status_unknown;
-+	return connector_status_connected;
- }
- 
- static const struct drm_connector_funcs connector_funcs = {
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0034-irqchip-renesas-irqc-Use-lazy-disable.patch b/patches.renesas/0034-irqchip-renesas-irqc-Use-lazy-disable.patch
deleted file mode 100644
index c0cb712714056..0000000000000
--- a/patches.renesas/0034-irqchip-renesas-irqc-Use-lazy-disable.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From ba3dd89b70628181fb43e36b802f6458622062c5 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Wed, 4 Dec 2013 21:05:46 +0900
-Subject: irqchip: renesas-irqc: Use lazy disable
-
-Set the ->irq_enable() and ->irq_disable() methods to NULL
-to enable lazy disable of interrupts. This by itself provides
-some level of optimization, but is mainly enabled as ground
-work for future Suspend-to-RAM wake up support.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 272012d0f748de2e4d2428f5cb7003280032ce08)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/irqchip/irq-renesas-irqc.c | 2 --
- 1 file changed, 2 deletions(-)
-
-diff --git a/drivers/irqchip/irq-renesas-irqc.c b/drivers/irqchip/irq-renesas-irqc.c
-index 2f404ba61c6c..8fdd7d68cd00 100644
---- a/drivers/irqchip/irq-renesas-irqc.c
-+++ b/drivers/irqchip/irq-renesas-irqc.c
-@@ -212,8 +212,6 @@ static int irqc_probe(struct platform_device *pdev)
- 	irq_chip->name = name;
- 	irq_chip->irq_mask = irqc_irq_disable;
- 	irq_chip->irq_unmask = irqc_irq_enable;
--	irq_chip->irq_enable = irqc_irq_enable;
--	irq_chip->irq_disable = irqc_irq_disable;
- 	irq_chip->irq_set_type = irqc_irq_set_type;
- 	irq_chip->flags	= IRQCHIP_SKIP_SET_WAKE;
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0035-backlight-Add-GPIO-based-backlight-driver.patch b/patches.renesas/0035-backlight-Add-GPIO-based-backlight-driver.patch
deleted file mode 100644
index e7bdc2f79ff05..0000000000000
--- a/patches.renesas/0035-backlight-Add-GPIO-based-backlight-driver.patch
+++ /dev/null
@@ -1,221 +0,0 @@
-From 72dfc32a288895f831514271e6f5ac28cce979b0 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 4 Jul 2013 21:13:24 +0200
-Subject: backlight: Add GPIO-based backlight driver
-
-The GPIO backlight driver controls the backlight in on/off mode through
-a single GPIO.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Jingoo Han <jg1.han@samsung.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 8b770e3c9824c98eafe67950ad6e41e09ec9c98a)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/video/backlight/Kconfig              |   7 ++
- drivers/video/backlight/Makefile             |   1 +
- drivers/video/backlight/gpio_backlight.c     | 133 +++++++++++++++++++++++++++
- include/linux/platform_data/gpio_backlight.h |  21 +++++
- 4 files changed, 162 insertions(+)
- create mode 100644 drivers/video/backlight/gpio_backlight.c
- create mode 100644 include/linux/platform_data/gpio_backlight.h
-
-diff --git a/drivers/video/backlight/Kconfig b/drivers/video/backlight/Kconfig
-index d5ab6583..5ab64237 100644
---- a/drivers/video/backlight/Kconfig
-+++ b/drivers/video/backlight/Kconfig
-@@ -425,6 +425,13 @@ config BACKLIGHT_AS3711
- 	  If you have an Austrian Microsystems AS3711 say Y to enable the
- 	  backlight driver.
- 
-+config BACKLIGHT_GPIO
-+	tristate "Generic GPIO based Backlight Driver"
-+	depends on GPIOLIB
-+	help
-+	  If you have a LCD backlight adjustable by GPIO, say Y to enable
-+	  this driver.
-+
- endif # BACKLIGHT_CLASS_DEVICE
- 
- endif # BACKLIGHT_LCD_SUPPORT
-diff --git a/drivers/video/backlight/Makefile b/drivers/video/backlight/Makefile
-index 92711fe6..65698a88 100644
---- a/drivers/video/backlight/Makefile
-+++ b/drivers/video/backlight/Makefile
-@@ -32,6 +32,7 @@ obj-$(CONFIG_BACKLIGHT_DA903X)		+= da903x_bl.o
- obj-$(CONFIG_BACKLIGHT_DA9052)		+= da9052_bl.o
- obj-$(CONFIG_BACKLIGHT_EP93XX)		+= ep93xx_bl.o
- obj-$(CONFIG_BACKLIGHT_GENERIC)		+= generic_bl.o
-+obj-$(CONFIG_BACKLIGHT_GPIO)		+= gpio_backlight.o
- obj-$(CONFIG_BACKLIGHT_HP680)		+= hp680_bl.o
- obj-$(CONFIG_BACKLIGHT_HP700)		+= jornada720_bl.o
- obj-$(CONFIG_BACKLIGHT_LM3533)		+= lm3533_bl.o
-diff --git a/drivers/video/backlight/gpio_backlight.c b/drivers/video/backlight/gpio_backlight.c
-new file mode 100644
-index 00000000..5fa217f9
---- /dev/null
-+++ b/drivers/video/backlight/gpio_backlight.c
-@@ -0,0 +1,133 @@
-+/*
-+ * gpio_backlight.c - Simple GPIO-controlled backlight
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+
-+#include <linux/backlight.h>
-+#include <linux/err.h>
-+#include <linux/fb.h>
-+#include <linux/gpio.h>
-+#include <linux/init.h>
-+#include <linux/kernel.h>
-+#include <linux/module.h>
-+#include <linux/platform_data/gpio_backlight.h>
-+#include <linux/platform_device.h>
-+#include <linux/slab.h>
-+
-+struct gpio_backlight {
-+	struct device *dev;
-+	struct device *fbdev;
-+
-+	int gpio;
-+	int active;
-+};
-+
-+static int gpio_backlight_update_status(struct backlight_device *bl)
-+{
-+	struct gpio_backlight *gbl = bl_get_data(bl);
-+	int brightness = bl->props.brightness;
-+
-+	if (bl->props.power != FB_BLANK_UNBLANK ||
-+	    bl->props.fb_blank != FB_BLANK_UNBLANK ||
-+	    bl->props.state & (BL_CORE_SUSPENDED | BL_CORE_FBBLANK))
-+		brightness = 0;
-+
-+	gpio_set_value(gbl->gpio, brightness ? gbl->active : !gbl->active);
-+
-+	return 0;
-+}
-+
-+static int gpio_backlight_get_brightness(struct backlight_device *bl)
-+{
-+	return bl->props.brightness;
-+}
-+
-+static int gpio_backlight_check_fb(struct backlight_device *bl,
-+				   struct fb_info *info)
-+{
-+	struct gpio_backlight *gbl = bl_get_data(bl);
-+
-+	return gbl->fbdev == NULL || gbl->fbdev == info->dev;
-+}
-+
-+static const struct backlight_ops gpio_backlight_ops = {
-+	.options	= BL_CORE_SUSPENDRESUME,
-+	.update_status	= gpio_backlight_update_status,
-+	.get_brightness	= gpio_backlight_get_brightness,
-+	.check_fb	= gpio_backlight_check_fb,
-+};
-+
-+static int gpio_backlight_probe(struct platform_device *pdev)
-+{
-+	struct gpio_backlight_platform_data *pdata = pdev->dev.platform_data;
-+	struct backlight_properties props;
-+	struct backlight_device *bl;
-+	struct gpio_backlight *gbl;
-+	int ret;
-+
-+	if (!pdata) {
-+		dev_err(&pdev->dev, "failed to find platform data\n");
-+		return -ENODEV;
-+	}
-+
-+	gbl = devm_kzalloc(&pdev->dev, sizeof(*gbl), GFP_KERNEL);
-+	if (gbl == NULL)
-+		return -ENOMEM;
-+
-+	gbl->dev = &pdev->dev;
-+	gbl->fbdev = pdata->fbdev;
-+	gbl->gpio = pdata->gpio;
-+	gbl->active = pdata->active_low ? 0 : 1;
-+
-+	ret = devm_gpio_request_one(gbl->dev, gbl->gpio, GPIOF_DIR_OUT |
-+				    (gbl->active ? GPIOF_INIT_LOW
-+						 : GPIOF_INIT_HIGH),
-+				    pdata->name);
-+	if (ret < 0) {
-+		dev_err(&pdev->dev, "unable to request GPIO\n");
-+		return ret;
-+	}
-+
-+	memset(&props, 0, sizeof(props));
-+	props.type = BACKLIGHT_RAW;
-+	props.max_brightness = 1;
-+	bl = backlight_device_register(dev_name(&pdev->dev), &pdev->dev, gbl,
-+				       &gpio_backlight_ops, &props);
-+	if (IS_ERR(bl)) {
-+		dev_err(&pdev->dev, "failed to register backlight\n");
-+		return PTR_ERR(bl);
-+	}
-+
-+	bl->props.brightness = pdata->def_value;
-+	backlight_update_status(bl);
-+
-+	platform_set_drvdata(pdev, bl);
-+	return 0;
-+}
-+
-+static int gpio_backlight_remove(struct platform_device *pdev)
-+{
-+	struct backlight_device *bl = platform_get_drvdata(pdev);
-+
-+	backlight_device_unregister(bl);
-+	return 0;
-+}
-+
-+static struct platform_driver gpio_backlight_driver = {
-+	.driver		= {
-+		.name		= "gpio-backlight",
-+		.owner		= THIS_MODULE,
-+	},
-+	.probe		= gpio_backlight_probe,
-+	.remove		= gpio_backlight_remove,
-+};
-+
-+module_platform_driver(gpio_backlight_driver);
-+
-+MODULE_AUTHOR("Laurent Pinchart <laurent.pinchart@ideasonboard.com>");
-+MODULE_DESCRIPTION("GPIO-based Backlight Driver");
-+MODULE_LICENSE("GPL");
-+MODULE_ALIAS("platform:gpio-backlight");
-diff --git a/include/linux/platform_data/gpio_backlight.h b/include/linux/platform_data/gpio_backlight.h
-new file mode 100644
-index 00000000..5ae0d9c8
---- /dev/null
-+++ b/include/linux/platform_data/gpio_backlight.h
-@@ -0,0 +1,21 @@
-+/*
-+ * gpio_backlight.h - Simple GPIO-controlled backlight
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+#ifndef __GPIO_BACKLIGHT_H__
-+#define __GPIO_BACKLIGHT_H__
-+
-+struct device;
-+
-+struct gpio_backlight_platform_data {
-+	struct device *fbdev;
-+	int gpio;
-+	int def_value;
-+	bool active_low;
-+	const char *name;
-+};
-+
-+#endif
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0035-irqchip-renesas-irqc-Enable-mask-on-suspend.patch b/patches.renesas/0035-irqchip-renesas-irqc-Enable-mask-on-suspend.patch
deleted file mode 100644
index 4ea731034ba7f..0000000000000
--- a/patches.renesas/0035-irqchip-renesas-irqc-Enable-mask-on-suspend.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From c8888d9cc8ccd10779c785f35b3f1127db8c611f Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Wed, 4 Dec 2013 21:05:56 +0900
-Subject: irqchip: renesas-irqc: Enable mask on suspend
-
-Now when lazy interrupt disable has been enabled in the driver
-then extend the code to set IRQCHIP_MASK_ON_SUSPEND which tells
-the core that only IRQs marked as wakeups need to stay enabled
-during Suspend-to-RAM.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 6a7e3b3007b5396a9e812ca0ceddc7915f8768dd)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/irqchip/irq-renesas-irqc.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/irqchip/irq-renesas-irqc.c b/drivers/irqchip/irq-renesas-irqc.c
-index 8fdd7d68cd00..082d95cb5528 100644
---- a/drivers/irqchip/irq-renesas-irqc.c
-+++ b/drivers/irqchip/irq-renesas-irqc.c
-@@ -213,7 +213,7 @@ static int irqc_probe(struct platform_device *pdev)
- 	irq_chip->irq_mask = irqc_irq_disable;
- 	irq_chip->irq_unmask = irqc_irq_enable;
- 	irq_chip->irq_set_type = irqc_irq_set_type;
--	irq_chip->flags	= IRQCHIP_SKIP_SET_WAKE;
-+	irq_chip->flags	= IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MASK_ON_SUSPEND;
- 
- 	p->irq_domain = irq_domain_add_simple(pdev->dev.of_node,
- 					      p->number_of_irqs,
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0035-media-v4l-Add-media-format-codes-for-ARGB8888-and-AY.patch b/patches.renesas/0035-media-v4l-Add-media-format-codes-for-ARGB8888-and-AY.patch
deleted file mode 100644
index 098ae2e8e0e71..0000000000000
--- a/patches.renesas/0035-media-v4l-Add-media-format-codes-for-ARGB8888-and-AY.patch
+++ /dev/null
@@ -1,1378 +0,0 @@
-From 77f394a03b1c86bb0bcf015c5f21a8c4b17a73de Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 5 Jun 2013 04:19:53 -0300
-Subject: [media] v4l: Add media format codes for ARGB8888 and AYUV8888 on
- 32-bit busses
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
-Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
-Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
-(cherry picked from commit f57fa2102cd5c0b50359def79a3d39cda8431204)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- Documentation/DocBook/media/v4l/subdev-formats.xml | 609 +++++++++------------
- Documentation/DocBook/media_api.tmpl               |   6 +
- include/uapi/linux/v4l2-mediabus.h                 |   6 +-
- 3 files changed, 254 insertions(+), 367 deletions(-)
-
-diff --git a/Documentation/DocBook/media/v4l/subdev-formats.xml b/Documentation/DocBook/media/v4l/subdev-formats.xml
-index adc61982df7b..98f66eb540b6 100644
---- a/Documentation/DocBook/media/v4l/subdev-formats.xml
-+++ b/Documentation/DocBook/media/v4l/subdev-formats.xml
-@@ -97,31 +97,39 @@
- 	  <colspec colname="id" align="left" />
- 	  <colspec colname="code" align="center"/>
- 	  <colspec colname="bit" />
--	  <colspec colnum="4" colname="b23" align="center" />
--	  <colspec colnum="5" colname="b22" align="center" />
--	  <colspec colnum="6" colname="b21" align="center" />
--	  <colspec colnum="7" colname="b20" align="center" />
--	  <colspec colnum="8" colname="b19" align="center" />
--	  <colspec colnum="9" colname="b18" align="center" />
--	  <colspec colnum="10" colname="b17" align="center" />
--	  <colspec colnum="11" colname="b16" align="center" />
--	  <colspec colnum="12" colname="b15" align="center" />
--	  <colspec colnum="13" colname="b14" align="center" />
--	  <colspec colnum="14" colname="b13" align="center" />
--	  <colspec colnum="15" colname="b12" align="center" />
--	  <colspec colnum="16" colname="b11" align="center" />
--	  <colspec colnum="17" colname="b10" align="center" />
--	  <colspec colnum="18" colname="b09" align="center" />
--	  <colspec colnum="19" colname="b08" align="center" />
--	  <colspec colnum="20" colname="b07" align="center" />
--	  <colspec colnum="21" colname="b06" align="center" />
--	  <colspec colnum="22" colname="b05" align="center" />
--	  <colspec colnum="23" colname="b04" align="center" />
--	  <colspec colnum="24" colname="b03" align="center" />
--	  <colspec colnum="25" colname="b02" align="center" />
--	  <colspec colnum="26" colname="b01" align="center" />
--	  <colspec colnum="27" colname="b00" align="center" />
--	  <spanspec namest="b23" nameend="b00" spanname="b0" />
-+	  <colspec colnum="4" colname="b31" align="center" />
-+	  <colspec colnum="5" colname="b20" align="center" />
-+	  <colspec colnum="6" colname="b29" align="center" />
-+	  <colspec colnum="7" colname="b28" align="center" />
-+	  <colspec colnum="8" colname="b27" align="center" />
-+	  <colspec colnum="9" colname="b26" align="center" />
-+	  <colspec colnum="10" colname="b25" align="center" />
-+	  <colspec colnum="11" colname="b24" align="center" />
-+	  <colspec colnum="12" colname="b23" align="center" />
-+	  <colspec colnum="13" colname="b22" align="center" />
-+	  <colspec colnum="14" colname="b21" align="center" />
-+	  <colspec colnum="15" colname="b20" align="center" />
-+	  <colspec colnum="16" colname="b19" align="center" />
-+	  <colspec colnum="17" colname="b18" align="center" />
-+	  <colspec colnum="18" colname="b17" align="center" />
-+	  <colspec colnum="19" colname="b16" align="center" />
-+	  <colspec colnum="20" colname="b15" align="center" />
-+	  <colspec colnum="21" colname="b14" align="center" />
-+	  <colspec colnum="22" colname="b13" align="center" />
-+	  <colspec colnum="23" colname="b12" align="center" />
-+	  <colspec colnum="24" colname="b11" align="center" />
-+	  <colspec colnum="25" colname="b10" align="center" />
-+	  <colspec colnum="26" colname="b09" align="center" />
-+	  <colspec colnum="27" colname="b08" align="center" />
-+	  <colspec colnum="28" colname="b07" align="center" />
-+	  <colspec colnum="29" colname="b06" align="center" />
-+	  <colspec colnum="30" colname="b05" align="center" />
-+	  <colspec colnum="31" colname="b04" align="center" />
-+	  <colspec colnum="32" colname="b03" align="center" />
-+	  <colspec colnum="33" colname="b02" align="center" />
-+	  <colspec colnum="34" colname="b01" align="center" />
-+	  <colspec colnum="35" colname="b00" align="center" />
-+	  <spanspec namest="b31" nameend="b00" spanname="b0" />
- 	  <thead>
- 	    <row>
- 	      <entry>Identifier</entry>
-@@ -133,6 +141,14 @@
- 	      <entry></entry>
- 	      <entry></entry>
- 	      <entry>Bit</entry>
-+	      <entry>31</entry>
-+	      <entry>30</entry>
-+	      <entry>29</entry>
-+	      <entry>28</entry>
-+	      <entry>27</entry>
-+	      <entry>26</entry>
-+	      <entry>25</entry>
-+	      <entry>24</entry>
- 	      <entry>23</entry>
- 	      <entry>22</entry>
- 	      <entry>21</entry>
-@@ -164,7 +180,7 @@
- 	      <entry>V4L2_MBUS_FMT_RGB444_2X8_PADHI_BE</entry>
- 	      <entry>0x1001</entry>
- 	      <entry></entry>
--	      &dash-ent-16;
-+	      &dash-ent-24;
- 	      <entry>0</entry>
- 	      <entry>0</entry>
- 	      <entry>0</entry>
-@@ -178,7 +194,7 @@
- 	      <entry></entry>
- 	      <entry></entry>
- 	      <entry></entry>
--	      &dash-ent-16;
-+	      &dash-ent-24;
- 	      <entry>g<subscript>3</subscript></entry>
- 	      <entry>g<subscript>2</subscript></entry>
- 	      <entry>g<subscript>1</subscript></entry>
-@@ -192,7 +208,7 @@
- 	      <entry>V4L2_MBUS_FMT_RGB444_2X8_PADHI_LE</entry>
- 	      <entry>0x1002</entry>
- 	      <entry></entry>
--	      &dash-ent-16;
-+	      &dash-ent-24;
- 	      <entry>g<subscript>3</subscript></entry>
- 	      <entry>g<subscript>2</subscript></entry>
- 	      <entry>g<subscript>1</subscript></entry>
-@@ -206,7 +222,7 @@
- 	      <entry></entry>
- 	      <entry></entry>
- 	      <entry></entry>
--	      &dash-ent-16;
-+	      &dash-ent-24;
- 	      <entry>0</entry>
- 	      <entry>0</entry>
- 	      <entry>0</entry>
-@@ -220,7 +236,7 @@
- 	      <entry>V4L2_MBUS_FMT_RGB555_2X8_PADHI_BE</entry>
- 	      <entry>0x1003</entry>
- 	      <entry></entry>
--	      &dash-ent-16;
-+	      &dash-ent-24;
- 	      <entry>0</entry>
- 	      <entry>r<subscript>4</subscript></entry>
- 	      <entry>r<subscript>3</subscript></entry>
-@@ -234,7 +250,7 @@
- 	      <entry></entry>
- 	      <entry></entry>
- 	      <entry></entry>
--	      &dash-ent-16;
-+	      &dash-ent-24;
- 	      <entry>g<subscript>2</subscript></entry>
- 	      <entry>g<subscript>1</subscript></entry>
- 	      <entry>g<subscript>0</subscript></entry>
-@@ -248,7 +264,7 @@
- 	      <entry>V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE</entry>
- 	      <entry>0x1004</entry>
- 	      <entry></entry>
--	      &dash-ent-16;
-+	      &dash-ent-24;
- 	      <entry>g<subscript>2</subscript></entry>
- 	      <entry>g<subscript>1</subscript></entry>
- 	      <entry>g<subscript>0</subscript></entry>
-@@ -262,7 +278,7 @@
- 	      <entry></entry>
- 	      <entry></entry>
- 	      <entry></entry>
--	      &dash-ent-16;
-+	      &dash-ent-24;
- 	      <entry>0</entry>
- 	      <entry>r<subscript>4</subscript></entry>
- 	      <entry>r<subscript>3</subscript></entry>
-@@ -276,7 +292,7 @@
- 	      <entry>V4L2_MBUS_FMT_BGR565_2X8_BE</entry>
- 	      <entry>0x1005</entry>
- 	      <entry></entry>
--	      &dash-ent-16;
-+	      &dash-ent-24;
- 	      <entry>b<subscript>4</subscript></entry>
- 	      <entry>b<subscript>3</subscript></entry>
- 	      <entry>b<subscript>2</subscript></entry>
-@@ -290,7 +306,7 @@
- 	      <entry></entry>
- 	      <entry></entry>
- 	      <entry></entry>
--	      &dash-ent-16;
-+	      &dash-ent-24;
- 	      <entry>g<subscript>2</subscript></entry>
- 	      <entry>g<subscript>1</subscript></entry>
- 	      <entry>g<subscript>0</subscript></entry>
-@@ -304,7 +320,7 @@
- 	      <entry>V4L2_MBUS_FMT_BGR565_2X8_LE</entry>
- 	      <entry>0x1006</entry>
- 	      <entry></entry>
--	      &dash-ent-16;
-+	      &dash-ent-24;
- 	      <entry>g<subscript>2</subscript></entry>
- 	      <entry>g<subscript>1</subscript></entry>
- 	      <entry>g<subscript>0</subscript></entry>
-@@ -318,7 +334,7 @@
- 	      <entry></entry>
- 	      <entry></entry>
- 	      <entry></entry>
--	      &dash-ent-16;
-+	      &dash-ent-24;
- 	      <entry>b<subscript>4</subscript></entry>
- 	      <entry>b<subscript>3</subscript></entry>
- 	      <entry>b<subscript>2</subscript></entry>
-@@ -332,7 +348,7 @@
- 	      <entry>V4L2_MBUS_FMT_RGB565_2X8_BE</entry>
- 	      <entry>0x1007</entry>
- 	      <entry></entry>
--	      &dash-ent-16;
-+	      &dash-ent-24;
- 	      <entry>r<subscript>4</subscript></entry>
- 	      <entry>r<subscript>3</subscript></entry>
- 	      <entry>r<subscript>2</subscript></entry>
-@@ -346,7 +362,7 @@
- 	      <entry></entry>
- 	      <entry></entry>
- 	      <entry></entry>
--	      &dash-ent-16;
-+	      &dash-ent-24;
- 	      <entry>g<subscript>2</subscript></entry>
- 	      <entry>g<subscript>1</subscript></entry>
- 	      <entry>g<subscript>0</subscript></entry>
-@@ -360,7 +376,7 @@
- 	      <entry>V4L2_MBUS_FMT_RGB565_2X8_LE</entry>
- 	      <entry>0x1008</entry>
- 	      <entry></entry>
--	      &dash-ent-16;
-+	      &dash-ent-24;
- 	      <entry>g<subscript>2</subscript></entry>
- 	      <entry>g<subscript>1</subscript></entry>
- 	      <entry>g<subscript>0</subscript></entry>
-@@ -374,7 +390,7 @@
- 	      <entry></entry>
- 	      <entry></entry>
- 	      <entry></entry>
--	      &dash-ent-16;
-+	      &dash-ent-24;
- 	      <entry>r<subscript>4</subscript></entry>
- 	      <entry>r<subscript>3</subscript></entry>
- 	      <entry>r<subscript>2</subscript></entry>
-@@ -388,12 +404,7 @@
- 	      <entry>V4L2_MBUS_FMT_RGB666_1X18</entry>
- 	      <entry>0x1009</entry>
- 	      <entry></entry>
--	      <entry>-</entry>
--	      <entry>-</entry>
--	      <entry>-</entry>
--	      <entry>-</entry>
--	      <entry>-</entry>
--	      <entry>-</entry>
-+	      &dash-ent-14;
- 	      <entry>r<subscript>5</subscript></entry>
- 	      <entry>r<subscript>4</subscript></entry>
- 	      <entry>r<subscript>3</subscript></entry>
-@@ -417,6 +428,7 @@
- 	      <entry>V4L2_MBUS_FMT_RGB888_1X24</entry>
- 	      <entry>0x100a</entry>
- 	      <entry></entry>
-+	      &dash-ent-8;
- 	      <entry>r<subscript>7</subscript></entry>
- 	      <entry>r<subscript>6</subscript></entry>
- 	      <entry>r<subscript>5</subscript></entry>
-@@ -446,9 +458,7 @@
- 	      <entry>V4L2_MBUS_FMT_RGB888_2X12_BE</entry>
- 	      <entry>0x100b</entry>
- 	      <entry></entry>
--	      &dash-ent-10;
--	      <entry>-</entry>
--	      <entry>-</entry>
-+	      &dash-ent-20;
- 	      <entry>r<subscript>7</subscript></entry>
- 	      <entry>r<subscript>6</subscript></entry>
- 	      <entry>r<subscript>5</subscript></entry>
-@@ -466,9 +476,7 @@
- 	      <entry></entry>
- 	      <entry></entry>
- 	      <entry></entry>
--	      &dash-ent-10;
--	      <entry>-</entry>
--	      <entry>-</entry>
-+	      &dash-ent-20;
- 	      <entry>g<subscript>3</subscript></entry>
- 	      <entry>g<subscript>2</subscript></entry>
- 	      <entry>g<subscript>1</subscript></entry>
-@@ -486,9 +494,7 @@
- 	      <entry>V4L2_MBUS_FMT_RGB888_2X12_LE</entry>
- 	      <entry>0x100c</entry>
- 	      <entry></entry>
--	      &dash-ent-10;
--	      <entry>-</entry>
--	      <entry>-</entry>
-+	      &dash-ent-20;
- 	      <entry>g<subscript>3</subscript></entry>
- 	      <entry>g<subscript>2</subscript></entry>
- 	      <entry>g<subscript>1</subscript></entry>
-@@ -506,9 +512,7 @@
- 	      <entry></entry>
- 	      <entry></entry>
- 	      <entry></entry>
--	      &dash-ent-10;
--	      <entry>-</entry>
--	      <entry>-</entry>
-+	      &dash-ent-20;
- 	      <entry>r<subscript>7</subscript></entry>
- 	      <entry>r<subscript>6</subscript></entry>
- 	      <entry>r<subscript>5</subscript></entry>
-@@ -522,6 +526,43 @@
- 	      <entry>g<subscript>5</subscript></entry>
- 	      <entry>g<subscript>4</subscript></entry>
- 	    </row>
-+	    <row id="V4L2-MBUS-FMT-ARGB888-1X32">
-+	      <entry>V4L2_MBUS_FMT_ARGB888_1X32</entry>
-+	      <entry>0x100d</entry>
-+	      <entry></entry>
-+	      <entry>a<subscript>7</subscript></entry>
-+	      <entry>a<subscript>6</subscript></entry>
-+	      <entry>a<subscript>5</subscript></entry>
-+	      <entry>a<subscript>4</subscript></entry>
-+	      <entry>a<subscript>3</subscript></entry>
-+	      <entry>a<subscript>2</subscript></entry>
-+	      <entry>a<subscript>1</subscript></entry>
-+	      <entry>a<subscript>0</subscript></entry>
-+	      <entry>r<subscript>7</subscript></entry>
-+	      <entry>r<subscript>6</subscript></entry>
-+	      <entry>r<subscript>5</subscript></entry>
-+	      <entry>r<subscript>4</subscript></entry>
-+	      <entry>r<subscript>3</subscript></entry>
-+	      <entry>r<subscript>2</subscript></entry>
-+	      <entry>r<subscript>1</subscript></entry>
-+	      <entry>r<subscript>0</subscript></entry>
-+	      <entry>g<subscript>7</subscript></entry>
-+	      <entry>g<subscript>6</subscript></entry>
-+	      <entry>g<subscript>5</subscript></entry>
-+	      <entry>g<subscript>4</subscript></entry>
-+	      <entry>g<subscript>3</subscript></entry>
-+	      <entry>g<subscript>2</subscript></entry>
-+	      <entry>g<subscript>1</subscript></entry>
-+	      <entry>g<subscript>0</subscript></entry>
-+	      <entry>b<subscript>7</subscript></entry>
-+	      <entry>b<subscript>6</subscript></entry>
-+	      <entry>b<subscript>5</subscript></entry>
-+	      <entry>b<subscript>4</subscript></entry>
-+	      <entry>b<subscript>3</subscript></entry>
-+	      <entry>b<subscript>2</subscript></entry>
-+	      <entry>b<subscript>1</subscript></entry>
-+	      <entry>b<subscript>0</subscript></entry>
-+	    </row>
- 	  </tbody>
- 	</tgroup>
-       </table>
-@@ -1149,6 +1190,7 @@
- 	   <listitem><para>y<subscript>x</subscript> for luma component bit number x</para></listitem>
- 	   <listitem><para>u<subscript>x</subscript> for blue chroma component bit number x</para></listitem>
- 	   <listitem><para>v<subscript>x</subscript> for red chroma component bit number x</para></listitem>
-+	   <listitem><para>a<subscript>x</subscript> for alpha component bit number x</para></listitem>
- 	   <listitem><para>- for non-available bits (for positions higher than the bus width)</para></listitem>
- 	   <listitem><para>d for dummy bits</para></listitem>
- 	</itemizedlist>
-@@ -1159,37 +1201,39 @@
- 	  <colspec colname="id" align="left" />
- 	  <colspec colname="code" align="center"/>
- 	  <colspec colname="bit" />
--	  <colspec colnum="4" colname="b29" align="center" />
--	  <colspec colnum="5" colname="b28" align="center" />
--	  <colspec colnum="6" colname="b27" align="center" />
--	  <colspec colnum="7" colname="b26" align="center" />
--	  <colspec colnum="8" colname="b25" align="center" />
--	  <colspec colnum="9" colname="b24" align="center" />
--	  <colspec colnum="10" colname="b23" align="center" />
--	  <colspec colnum="11" colname="b22" align="center" />
--	  <colspec colnum="12" colname="b21" align="center" />
--	  <colspec colnum="13" colname="b20" align="center" />
--	  <colspec colnum="14" colname="b19" align="center" />
--	  <colspec colnum="15" colname="b18" align="center" />
--	  <colspec colnum="16" colname="b17" align="center" />
--	  <colspec colnum="17" colname="b16" align="center" />
--	  <colspec colnum="18" colname="b15" align="center" />
--	  <colspec colnum="19" colname="b14" align="center" />
--	  <colspec colnum="20" colname="b13" align="center" />
--	  <colspec colnum="21" colname="b12" align="center" />
--	  <colspec colnum="22" colname="b11" align="center" />
--	  <colspec colnum="23" colname="b10" align="center" />
--	  <colspec colnum="24" colname="b09" align="center" />
--	  <colspec colnum="25" colname="b08" align="center" />
--	  <colspec colnum="26" colname="b07" align="center" />
--	  <colspec colnum="27" colname="b06" align="center" />
--	  <colspec colnum="28" colname="b05" align="center" />
--	  <colspec colnum="29" colname="b04" align="center" />
--	  <colspec colnum="30" colname="b03" align="center" />
--	  <colspec colnum="31" colname="b02" align="center" />
--	  <colspec colnum="32" colname="b01" align="center" />
--	  <colspec colnum="33" colname="b00" align="center" />
--	  <spanspec namest="b29" nameend="b00" spanname="b0" />
-+	  <colspec colnum="4" colname="b31" align="center" />
-+	  <colspec colnum="5" colname="b20" align="center" />
-+	  <colspec colnum="6" colname="b29" align="center" />
-+	  <colspec colnum="7" colname="b28" align="center" />
-+	  <colspec colnum="8" colname="b27" align="center" />
-+	  <colspec colnum="9" colname="b26" align="center" />
-+	  <colspec colnum="10" colname="b25" align="center" />
-+	  <colspec colnum="11" colname="b24" align="center" />
-+	  <colspec colnum="12" colname="b23" align="center" />
-+	  <colspec colnum="13" colname="b22" align="center" />
-+	  <colspec colnum="14" colname="b21" align="center" />
-+	  <colspec colnum="15" colname="b20" align="center" />
-+	  <colspec colnum="16" colname="b19" align="center" />
-+	  <colspec colnum="17" colname="b18" align="center" />
-+	  <colspec colnum="18" colname="b17" align="center" />
-+	  <colspec colnum="19" colname="b16" align="center" />
-+	  <colspec colnum="20" colname="b15" align="center" />
-+	  <colspec colnum="21" colname="b14" align="center" />
-+	  <colspec colnum="22" colname="b13" align="center" />
-+	  <colspec colnum="23" colname="b12" align="center" />
-+	  <colspec colnum="24" colname="b11" align="center" />
-+	  <colspec colnum="25" colname="b10" align="center" />
-+	  <colspec colnum="26" colname="b09" align="center" />
-+	  <colspec colnum="27" colname="b08" align="center" />
-+	  <colspec colnum="28" colname="b07" align="center" />
-+	  <colspec colnum="29" colname="b06" align="center" />
-+	  <colspec colnum="30" colname="b05" align="center" />
-+	  <colspec colnum="31" colname="b04" align="center" />
-+	  <colspec colnum="32" colname="b03" align="center" />
-+	  <colspec colnum="33" colname="b02" align="center" />
-+	  <colspec colnum="34" colname="b01" align="center" />
-+	  <colspec colnum="35" colname="b00" align="center" />
-+	  <spanspec namest="b31" nameend="b00" spanname="b0" />
- 	  <thead>
- 	    <row>
- 	      <entry>Identifier</entry>
-@@ -1201,6 +1245,8 @@
- 	      <entry></entry>
- 	      <entry></entry>
- 	      <entry>Bit</entry>
-+	      <entry>31</entry>
-+	      <entry>30</entry>
- 	      <entry>29</entry>
- 	      <entry>28</entry>
- 	      <entry>27</entry>
-@@ -1238,10 +1284,7 @@
- 	      <entry>V4L2_MBUS_FMT_Y8_1X8</entry>
- 	      <entry>0x2001</entry>
- 	      <entry></entry>
--	      &dash-ent-10;
--	      &dash-ent-10;
--	      <entry>-</entry>
--	      <entry>-</entry>
-+	      &dash-ent-24;
- 	      <entry>y<subscript>7</subscript></entry>
- 	      <entry>y<subscript>6</subscript></entry>
- 	      <entry>y<subscript>5</subscript></entry>
-@@ -1255,18 +1298,7 @@
- 	      <entry>V4L2_MBUS_FMT_UV8_1X8</entry>
- 	      <entry>0x2015</entry>
- 	      <entry></entry>
--	      <entry>-</entry>
--	      <entry>-</entry>
--	      <entry>-</entry>
--	      <entry>-</entry>
--	      <entry>-</entry>
--	      <entry>-</entry>
--	      <entry>-</entry>
--	      <entry>-</entry>
--	      <entry>-</entry>
--	      <entry>-</entry>
--	      <entry>-</entry>
--	      <entry>-</entry>
-+	      &dash-ent-24;
- 	      <entry>u<subscript>7</subscript></entry>
- 	      <entry>u<subscript>6</subscript></entry>
- 	      <entry>u<subscript>5</subscript></entry>
-@@ -1280,18 +1312,7 @@
- 	      <entry></entry>
- 	      <entry></entry>
- 	      <entry></entry>
--	      <entry>-</entry>
--	      <entry>-</entry>
--	      <entry>-</entry>
--	      <entry>-</entry>
--	      <entry>-</entry>
--	      <entry>-</entry>
--	      <entry>-</entry>
--	      <entry>-</entry>
--	      <entry>-</entry>
--	      <entry>-</entry>
--	      <entry>-</entry>
--	      <entry>-</entry>
-+	      &dash-ent-24;
- 	      <entry>v<subscript>7</subscript></entry>
- 	      <entry>v<subscript>6</subscript></entry>
- 	      <entry>v<subscript>5</subscript></entry>
-@@ -1305,10 +1326,7 @@
- 	      <entry>V4L2_MBUS_FMT_UYVY8_1_5X8</entry>
- 	      <entry>0x2002</entry>
- 	      <entry></entry>
--	      &dash-ent-10;
--	      &dash-ent-10;
--	      <entry>-</entry>
--	      <entry>-</entry>
-+	      &dash-ent-24;
- 	      <entry>u<subscript>7</subscript></entry>
- 	      <entry>u<subscript>6</subscript></entry>
- 	      <entry>u<subscript>5</subscript></entry>
-@@ -1322,10 +1340,7 @@
- 	      <entry></entry>
- 	      <entry></entry>
- 	      <entry></entry>
--	      &dash-ent-10;
--	      &dash-ent-10;
--	      <entry>-</entry>
--	      <entry>-</entry>
-+	      &dash-ent-24;
- 	      <entry>y<subscript>7</subscript></entry>
- 	      <entry>y<subscript>6</subscript></entry>
- 	      <entry>y<subscript>5</subscript></entry>
-@@ -1339,10 +1354,7 @@
- 	      <entry></entry>
- 	      <entry></entry>
- 	      <entry></entry>
--	      &dash-ent-10;
--	      &dash-ent-10;
--	      <entry>-</entry>
--	      <entry>-</entry>
-+	      &dash-ent-24;
- 	      <entry>y<subscript>7</subscript></entry>
- 	      <entry>y<subscript>6</subscript></entry>
- 	      <entry>y<subscript>5</subscript></entry>
-@@ -1356,10 +1368,7 @@
- 	      <entry></entry>
- 	      <entry></entry>
- 	      <entry></entry>
--	      &dash-ent-10;
--	      &dash-ent-10;
--	      <entry>-</entry>
--	      <entry>-</entry>
-+	      &dash-ent-24;
- 	      <entry>v<subscript>7</subscript></entry>
- 	      <entry>v<subscript>6</subscript></entry>
- 	      <entry>v<subscript>5</subscript></entry>
-@@ -1373,10 +1382,7 @@
- 	      <entry></entry>
- 	      <entry></entry>
- 	      <entry></entry>
--	      &dash-ent-10;
--	      &dash-ent-10;
--	      <entry>-</entry>
--	      <entry>-</entry>
-+	      &dash-ent-24;
- 	      <entry>y<subscript>7</subscript></entry>
- 	      <entry>y<subscript>6</subscript></entry>
- 	      <entry>y<subscript>5</subscript></entry>
-@@ -1390,10 +1396,7 @@
- 	      <entry></entry>
- 	      <entry></entry>
- 	      <entry></entry>
--	      &dash-ent-10;
--	      &dash-ent-10;
--	      <entry>-</entry>
--	      <entry>-</entry>
-+	      &dash-ent-24;
- 	      <entry>y<subscript>7</subscript></entry>
- 	      <entry>y<subscript>6</subscript></entry>
- 	      <entry>y<subscript>5</subscript></entry>
-@@ -1407,10 +1410,7 @@
- 	      <entry>V4L2_MBUS_FMT_VYUY8_1_5X8</entry>
- 	      <entry>0x2003</entry>
- 	      <entry></entry>
--	      &dash-ent-10;
--	      &dash-ent-10;
--	      <entry>-</entry>
--	      <entry>-</entry>
-+	      &dash-ent-24;
- 	      <entry>v<subscript>7</subscript></entry>
- 	      <entry>v<subscript>6</subscript></entry>
- 	      <entry>v<subscript>5</subscript></entry>
-@@ -1424,10 +1424,7 @@
- 	      <entry></entry>
- 	      <entry></entry>
- 	      <entry></entry>
--	      &dash-ent-10;
--	      &dash-ent-10;
--	      <entry>-</entry>
--	      <entry>-</entry>
-+	      &dash-ent-24;
- 	      <entry>y<subscript>7</subscript></entry>
- 	      <entry>y<subscript>6</subscript></entry>
- 	      <entry>y<subscript>5</subscript></entry>
-@@ -1441,10 +1438,7 @@
- 	      <entry></entry>
- 	      <entry></entry>
- 	      <entry></entry>
--	      &dash-ent-10;
--	      &dash-ent-10;
--	      <entry>-</entry>
--	      <entry>-</entry>
-+	      &dash-ent-24;
- 	      <entry>y<subscript>7</subscript></entry>
- 	      <entry>y<subscript>6</subscript></entry>
- 	      <entry>y<subscript>5</subscript></entry>
-@@ -1458,10 +1452,7 @@
- 	      <entry></entry>
- 	      <entry></entry>
- 	      <entry></entry>
--	      &dash-ent-10;
--	      &dash-ent-10;
--	      <entry>-</entry>
--	      <entry>-</entry>
-+	      &dash-ent-24;
- 	      <entry>u<subscript>7</subscript></entry>
- 	      <entry>u<subscript>6</subscript></entry>
- 	      <entry>u<subscript>5</subscript></entry>
-@@ -1475,10 +1466,7 @@
- 	      <entry></entry>
- 	      <entry></entry>
- 	      <entry></entry>
--	      &dash-ent-10;
--	      &dash-ent-10;
--	      <entry>-</entry>
--	      <entry>-</entry>
-+	      &dash-ent-24;
- 	      <entry>y<subscript>7</subscript></entry>
- 	      <entry>y<subscript>6</subscript></entry>
- 	      <entry>y<subscript>5</subscript></entry>
-@@ -1492,10 +1480,7 @@
- 	      <entry></entry>
- 	      <entry></entry>
- 	      <entry></entry>
--	      &dash-ent-10;
--	      &dash-ent-10;
--	      <entry>-</entry>
--	      <entry>-</entry>
-+	      &dash-ent-24;
- 	      <entry>y<subscript>7</subscript></entry>
- 	      <entry>y<subscript>6</subscript></entry>
- 	      <entry>y<subscript>5</subscript></entry>
-@@ -1509,10 +1494,7 @@
- 	      <entry>V4L2_MBUS_FMT_YUYV8_1_5X8</entry>
- 	      <entry>0x2004</entry>
- 	      <entry></entry>
--	      &dash-ent-10;
--	      &dash-ent-10;
--	      <entry>-</entry>
--	      <entry>-</entry>
-+	      &dash-ent-24;
- 	      <entry>y<subscript>7</subscript></entry>
- 	      <entry>y<subscript>6</subscript></entry>
- 	      <entry>y<subscript>5</subscript></entry>
-@@ -1526,10 +1508,7 @@
- 	      <entry></entry>
- 	      <entry></entry>
- 	      <entry></entry>
--	      &dash-ent-10;
--	      &dash-ent-10;
--	      <entry>-</entry>
--	      <entry>-</entry>
-+	      &dash-ent-24;
- 	      <entry>y<subscript>7</subscript></entry>
- 	      <entry>y<subscript>6</subscript></entry>
- 	      <entry>y<subscript>5</subscript></entry>
-@@ -1543,10 +1522,7 @@
- 	      <entry></entry>
- 	      <entry></entry>
- 	      <entry></entry>
--	      &dash-ent-10;
--	      &dash-ent-10;
--	      <entry>-</entry>
--	      <entry>-</entry>
-+	      &dash-ent-24;
- 	      <entry>u<subscript>7</subscript></entry>
- 	      <entry>u<subscript>6</subscript></entry>
- 	      <entry>u<subscript>5</subscript></entry>
-@@ -1560,10 +1536,7 @@
- 	      <entry></entry>
- 	      <entry></entry>
- 	      <entry></entry>
--	      &dash-ent-10;
--	      &dash-ent-10;
--	      <entry>-</entry>
--	      <entry>-</entry>
-+	      &dash-ent-24;
- 	      <entry>y<subscript>7</subscript></entry>
- 	      <entry>y<subscript>6</subscript></entry>
- 	      <entry>y<subscript>5</subscript></entry>
-@@ -1577,10 +1550,7 @@
- 	      <entry></entry>
- 	      <entry></entry>
- 	      <entry></entry>
--	      &dash-ent-10;
--	      &dash-ent-10;
--	      <entry>-</entry>
--	      <entry>-</entry>
-+	      &dash-ent-24;
- 	      <entry>y<subscript>7</subscript></entry>
- 	      <entry>y<subscript>6</subscript></entry>
- 	      <entry>y<subscript>5</subscript></entry>
-@@ -1594,10 +1564,7 @@
- 	      <entry></entry>
- 	      <entry></entry>
- 	      <entry></entry>
--	      &dash-ent-10;
--	      &dash-ent-10;
--	      <entry>-</entry>
--	      <entry>-</entry>
-+	      &dash-ent-24;
- 	      <entry>v<subscript>7</subscript></entry>
- 	      <entry>v<subscript>6</subscript></entry>
- 	      <entry>v<subscript>5</subscript></entry>
-@@ -1611,10 +1578,7 @@
- 	      <entry>V4L2_MBUS_FMT_YVYU8_1_5X8</entry>
- 	      <entry>0x2005</entry>
- 	      <entry></entry>
--	      &dash-ent-10;
--	      &dash-ent-10;
--	      <entry>-</entry>
--	      <entry>-</entry>
-+	      &dash-ent-24;
- 	      <entry>y<subscript>7</subscript></entry>
- 	      <entry>y<subscript>6</subscript></entry>
- 	      <entry>y<subscript>5</subscript></entry>
-@@ -1628,10 +1592,7 @@
- 	      <entry></entry>
- 	      <entry></entry>
- 	      <entry></entry>
--	      &dash-ent-10;
--	      &dash-ent-10;
--	      <entry>-</entry>
--	      <entry>-</entry>
-+	      &dash-ent-24;
- 	      <entry>y<subscript>7</subscript></entry>
- 	      <entry>y<subscript>6</subscript></entry>
- 	      <entry>y<subscript>5</subscript></entry>
-@@ -1645,10 +1606,7 @@
- 	      <entry></entry>
- 	      <entry></entry>
- 	      <entry></entry>
--	      &dash-ent-10;
--	      &dash-ent-10;
--	      <entry>-</entry>
--	      <entry>-</entry>
-+	      &dash-ent-24;
- 	      <entry>v<subscript>7</subscript></entry>
- 	      <entry>v<subscript>6</subscript></entry>
- 	      <entry>v<subscript>5</subscript></entry>
-@@ -1662,10 +1620,7 @@
- 	      <entry></entry>
- 	      <entry></entry>
- 	      <entry></entry>
--	      &dash-ent-10;
--	      &dash-ent-10;
--	      <entry>-</entry>
--	      <entry>-</entry>
-+	      &dash-ent-24;
- 	      <entry>y<subscript>7</subscript></entry>
- 	      <entry>y<subscript>6</subscript></entry>
- 	      <entry>y<subscript>5</subscript></entry>
-@@ -1679,10 +1634,7 @@
- 	      <entry></entry>
- 	      <entry></entry>
- 	      <entry></entry>
--	      &dash-ent-10;
--	      &dash-ent-10;
--	      <entry>-</entry>
--	      <entry>-</entry>
-+	      &dash-ent-24;
- 	      <entry>y<subscript>7</subscript></entry>
- 	      <entry>y<subscript>6</subscript></entry>
- 	      <entry>y<subscript>5</subscript></entry>
-@@ -1696,10 +1648,7 @@
- 	      <entry></entry>
- 	      <entry></entry>
- 	      <entry></entry>
--	      &dash-ent-10;
--	      &dash-ent-10;
--	      <entry>-</entry>
--	      <entry>-</entry>
-+	      &dash-ent-24;
- 	      <entry>u<subscript>7</subscript></entry>
- 	      <entry>u<subscript>6</subscript></entry>
- 	      <entry>u<subscript>5</subscript></entry>
-@@ -1713,10 +1662,7 @@
- 	      <entry>V4L2_MBUS_FMT_UYVY8_2X8</entry>
- 	      <entry>0x2006</entry>
- 	      <entry></entry>
--	      &dash-ent-10;
--	      &dash-ent-10;
--	      <entry>-</entry>
--	      <entry>-</entry>
-+	      &dash-ent-24;
- 	      <entry>u<subscript>7</subscript></entry>
- 	      <entry>u<subscript>6</subscript></entry>
- 	      <entry>u<subscript>5</subscript></entry>
-@@ -1730,10 +1676,7 @@
- 	      <entry></entry>
- 	      <entry></entry>
- 	      <entry></entry>
--	      &dash-ent-10;
--	      &dash-ent-10;
--	      <entry>-</entry>
--	      <entry>-</entry>
-+	      &dash-ent-24;
- 	      <entry>y<subscript>7</subscript></entry>
- 	      <entry>y<subscript>6</subscript></entry>
- 	      <entry>y<subscript>5</subscript></entry>
-@@ -1747,10 +1690,7 @@
- 	      <entry></entry>
- 	      <entry></entry>
- 	      <entry></entry>
--	      &dash-ent-10;
--	      &dash-ent-10;
--	      <entry>-</entry>
--	      <entry>-</entry>
-+	      &dash-ent-24;
- 	      <entry>v<subscript>7</subscript></entry>
- 	      <entry>v<subscript>6</subscript></entry>
- 	      <entry>v<subscript>5</subscript></entry>
-@@ -1764,10 +1704,7 @@
- 	      <entry></entry>
- 	      <entry></entry>
- 	      <entry></entry>
--	      &dash-ent-10;
--	      &dash-ent-10;
--	      <entry>-</entry>
--	      <entry>-</entry>
-+	      &dash-ent-24;
- 	      <entry>y<subscript>7</subscript></entry>
- 	      <entry>y<subscript>6</subscript></entry>
- 	      <entry>y<subscript>5</subscript></entry>
-@@ -1781,10 +1718,7 @@
- 	      <entry>V4L2_MBUS_FMT_VYUY8_2X8</entry>
- 	      <entry>0x2007</entry>
- 	      <entry></entry>
--	      &dash-ent-10;
--	      &dash-ent-10;
--	      <entry>-</entry>
--	      <entry>-</entry>
-+	      &dash-ent-24;
- 	      <entry>v<subscript>7</subscript></entry>
- 	      <entry>v<subscript>6</subscript></entry>
- 	      <entry>v<subscript>5</subscript></entry>
-@@ -1798,10 +1732,7 @@
- 	      <entry></entry>
- 	      <entry></entry>
- 	      <entry></entry>
--	      &dash-ent-10;
--	      &dash-ent-10;
--	      <entry>-</entry>
--	      <entry>-</entry>
-+	      &dash-ent-24;
- 	      <entry>y<subscript>7</subscript></entry>
- 	      <entry>y<subscript>6</subscript></entry>
- 	      <entry>y<subscript>5</subscript></entry>
-@@ -1815,10 +1746,7 @@
- 	      <entry></entry>
- 	      <entry></entry>
- 	      <entry></entry>
--	      &dash-ent-10;
--	      &dash-ent-10;
--	      <entry>-</entry>
--	      <entry>-</entry>
-+	      &dash-ent-24;
- 	      <entry>u<subscript>7</subscript></entry>
- 	      <entry>u<subscript>6</subscript></entry>
- 	      <entry>u<subscript>5</subscript></entry>
-@@ -1832,10 +1760,7 @@
- 	      <entry></entry>
- 	      <entry></entry>
- 	      <entry></entry>
--	      &dash-ent-10;
--	      &dash-ent-10;
--	      <entry>-</entry>
--	      <entry>-</entry>
-+	      &dash-ent-24;
- 	      <entry>y<subscript>7</subscript></entry>
- 	      <entry>y<subscript>6</subscript></entry>
- 	      <entry>y<subscript>5</subscript></entry>
-@@ -1849,10 +1774,7 @@
- 	      <entry>V4L2_MBUS_FMT_YUYV8_2X8</entry>
- 	      <entry>0x2008</entry>
- 	      <entry></entry>
--	      &dash-ent-10;
--	      &dash-ent-10;
--	      <entry>-</entry>
--	      <entry>-</entry>
-+	      &dash-ent-24;
- 	      <entry>y<subscript>7</subscript></entry>
- 	      <entry>y<subscript>6</subscript></entry>
- 	      <entry>y<subscript>5</subscript></entry>
-@@ -1866,10 +1788,7 @@
- 	      <entry></entry>
- 	      <entry></entry>
- 	      <entry></entry>
--	      &dash-ent-10;
--	      &dash-ent-10;
--	      <entry>-</entry>
--	      <entry>-</entry>
-+	      &dash-ent-24;
- 	      <entry>u<subscript>7</subscript></entry>
- 	      <entry>u<subscript>6</subscript></entry>
- 	      <entry>u<subscript>5</subscript></entry>
-@@ -1883,10 +1802,7 @@
- 	      <entry></entry>
- 	      <entry></entry>
- 	      <entry></entry>
--	      &dash-ent-10;
--	      &dash-ent-10;
--	      <entry>-</entry>
--	      <entry>-</entry>
-+	      &dash-ent-24;
- 	      <entry>y<subscript>7</subscript></entry>
- 	      <entry>y<subscript>6</subscript></entry>
- 	      <entry>y<subscript>5</subscript></entry>
-@@ -1900,10 +1816,7 @@
- 	      <entry></entry>
- 	      <entry></entry>
- 	      <entry></entry>
--	      &dash-ent-10;
--	      &dash-ent-10;
--	      <entry>-</entry>
--	      <entry>-</entry>
-+	      &dash-ent-24;
- 	      <entry>v<subscript>7</subscript></entry>
- 	      <entry>v<subscript>6</subscript></entry>
- 	      <entry>v<subscript>5</subscript></entry>
-@@ -1917,10 +1830,7 @@
- 	      <entry>V4L2_MBUS_FMT_YVYU8_2X8</entry>
- 	      <entry>0x2009</entry>
- 	      <entry></entry>
--	      &dash-ent-10;
--	      &dash-ent-10;
--	      <entry>-</entry>
--	      <entry>-</entry>
-+	      &dash-ent-24;
- 	      <entry>y<subscript>7</subscript></entry>
- 	      <entry>y<subscript>6</subscript></entry>
- 	      <entry>y<subscript>5</subscript></entry>
-@@ -1934,10 +1844,7 @@
- 	      <entry></entry>
- 	      <entry></entry>
- 	      <entry></entry>
--	      &dash-ent-10;
--	      &dash-ent-10;
--	      <entry>-</entry>
--	      <entry>-</entry>
-+	      &dash-ent-24;
- 	      <entry>v<subscript>7</subscript></entry>
- 	      <entry>v<subscript>6</subscript></entry>
- 	      <entry>v<subscript>5</subscript></entry>
-@@ -1951,10 +1858,7 @@
- 	      <entry></entry>
- 	      <entry></entry>
- 	      <entry></entry>
--	      &dash-ent-10;
--	      &dash-ent-10;
--	      <entry>-</entry>
--	      <entry>-</entry>
-+	      &dash-ent-24;
- 	      <entry>y<subscript>7</subscript></entry>
- 	      <entry>y<subscript>6</subscript></entry>
- 	      <entry>y<subscript>5</subscript></entry>
-@@ -1968,10 +1872,7 @@
- 	      <entry></entry>
- 	      <entry></entry>
- 	      <entry></entry>
--	      &dash-ent-10;
--	      &dash-ent-10;
--	      <entry>-</entry>
--	      <entry>-</entry>
-+	      &dash-ent-24;
- 	      <entry>u<subscript>7</subscript></entry>
- 	      <entry>u<subscript>6</subscript></entry>
- 	      <entry>u<subscript>5</subscript></entry>
-@@ -1985,8 +1886,7 @@
- 	      <entry>V4L2_MBUS_FMT_Y10_1X10</entry>
- 	      <entry>0x200a</entry>
- 	      <entry></entry>
--	      &dash-ent-10;
--	      &dash-ent-10;
-+	      &dash-ent-22;
- 	      <entry>y<subscript>9</subscript></entry>
- 	      <entry>y<subscript>8</subscript></entry>
- 	      <entry>y<subscript>7</subscript></entry>
-@@ -2002,8 +1902,7 @@
- 	      <entry>V4L2_MBUS_FMT_YUYV10_2X10</entry>
- 	      <entry>0x200b</entry>
- 	      <entry></entry>
--	      &dash-ent-10;
--	      &dash-ent-10;
-+	      &dash-ent-22;
- 	      <entry>y<subscript>9</subscript></entry>
- 	      <entry>y<subscript>8</subscript></entry>
- 	      <entry>y<subscript>7</subscript></entry>
-@@ -2019,8 +1918,7 @@
- 	      <entry></entry>
- 	      <entry></entry>
- 	      <entry></entry>
--	      &dash-ent-10;
--	      &dash-ent-10;
-+	      &dash-ent-22;
- 	      <entry>u<subscript>9</subscript></entry>
- 	      <entry>u<subscript>8</subscript></entry>
- 	      <entry>u<subscript>7</subscript></entry>
-@@ -2036,8 +1934,7 @@
- 	      <entry></entry>
- 	      <entry></entry>
- 	      <entry></entry>
--	      &dash-ent-10;
--	      &dash-ent-10;
-+	      &dash-ent-22;
- 	      <entry>y<subscript>9</subscript></entry>
- 	      <entry>y<subscript>8</subscript></entry>
- 	      <entry>y<subscript>7</subscript></entry>
-@@ -2053,8 +1950,7 @@
- 	      <entry></entry>
- 	      <entry></entry>
- 	      <entry></entry>
--	      &dash-ent-10;
--	      &dash-ent-10;
-+	      &dash-ent-22;
- 	      <entry>v<subscript>9</subscript></entry>
- 	      <entry>v<subscript>8</subscript></entry>
- 	      <entry>v<subscript>7</subscript></entry>
-@@ -2070,8 +1966,7 @@
- 	      <entry>V4L2_MBUS_FMT_YVYU10_2X10</entry>
- 	      <entry>0x200c</entry>
- 	      <entry></entry>
--	      &dash-ent-10;
--	      &dash-ent-10;
-+	      &dash-ent-22;
- 	      <entry>y<subscript>9</subscript></entry>
- 	      <entry>y<subscript>8</subscript></entry>
- 	      <entry>y<subscript>7</subscript></entry>
-@@ -2087,8 +1982,7 @@
- 	      <entry></entry>
- 	      <entry></entry>
- 	      <entry></entry>
--	      &dash-ent-10;
--	      &dash-ent-10;
-+	      &dash-ent-22;
- 	      <entry>v<subscript>9</subscript></entry>
- 	      <entry>v<subscript>8</subscript></entry>
- 	      <entry>v<subscript>7</subscript></entry>
-@@ -2104,8 +1998,7 @@
- 	      <entry></entry>
- 	      <entry></entry>
- 	      <entry></entry>
--	      &dash-ent-10;
--	      &dash-ent-10;
-+	      &dash-ent-22;
- 	      <entry>y<subscript>9</subscript></entry>
- 	      <entry>y<subscript>8</subscript></entry>
- 	      <entry>y<subscript>7</subscript></entry>
-@@ -2121,8 +2014,7 @@
- 	      <entry></entry>
- 	      <entry></entry>
- 	      <entry></entry>
--	      &dash-ent-10;
--	      &dash-ent-10;
-+	      &dash-ent-22;
- 	      <entry>u<subscript>9</subscript></entry>
- 	      <entry>u<subscript>8</subscript></entry>
- 	      <entry>u<subscript>7</subscript></entry>
-@@ -2138,15 +2030,7 @@
- 	      <entry>V4L2_MBUS_FMT_Y12_1X12</entry>
- 	      <entry>0x2013</entry>
- 	      <entry></entry>
--	      &dash-ent-10;
--	      <entry>-</entry>
--	      <entry>-</entry>
--	      <entry>-</entry>
--	      <entry>-</entry>
--	      <entry>-</entry>
--	      <entry>-</entry>
--	      <entry>-</entry>
--	      <entry>-</entry>
-+	      &dash-ent-20;
- 	      <entry>y<subscript>11</subscript></entry>
- 	      <entry>y<subscript>10</subscript></entry>
- 	      <entry>y<subscript>9</subscript></entry>
-@@ -2164,11 +2048,7 @@
- 	      <entry>V4L2_MBUS_FMT_UYVY8_1X16</entry>
- 	      <entry>0x200f</entry>
- 	      <entry></entry>
--	      &dash-ent-10;
--	      <entry>-</entry>
--	      <entry>-</entry>
--	      <entry>-</entry>
--	      <entry>-</entry>
-+	      &dash-ent-16;
- 	      <entry>u<subscript>7</subscript></entry>
- 	      <entry>u<subscript>6</subscript></entry>
- 	      <entry>u<subscript>5</subscript></entry>
-@@ -2190,11 +2070,7 @@
- 	      <entry></entry>
- 	      <entry></entry>
- 	      <entry></entry>
--	      &dash-ent-10;
--	      <entry>-</entry>
--	      <entry>-</entry>
--	      <entry>-</entry>
--	      <entry>-</entry>
-+	      &dash-ent-16;
- 	      <entry>v<subscript>7</subscript></entry>
- 	      <entry>v<subscript>6</subscript></entry>
- 	      <entry>v<subscript>5</subscript></entry>
-@@ -2216,11 +2092,7 @@
- 	      <entry>V4L2_MBUS_FMT_VYUY8_1X16</entry>
- 	      <entry>0x2010</entry>
- 	      <entry></entry>
--	      &dash-ent-10;
--	      <entry>-</entry>
--	      <entry>-</entry>
--	      <entry>-</entry>
--	      <entry>-</entry>
-+	      &dash-ent-16;
- 	      <entry>v<subscript>7</subscript></entry>
- 	      <entry>v<subscript>6</subscript></entry>
- 	      <entry>v<subscript>5</subscript></entry>
-@@ -2242,11 +2114,7 @@
- 	      <entry></entry>
- 	      <entry></entry>
- 	      <entry></entry>
--	      &dash-ent-10;
--	      <entry>-</entry>
--	      <entry>-</entry>
--	      <entry>-</entry>
--	      <entry>-</entry>
-+	      &dash-ent-16;
- 	      <entry>u<subscript>7</subscript></entry>
- 	      <entry>u<subscript>6</subscript></entry>
- 	      <entry>u<subscript>5</subscript></entry>
-@@ -2268,11 +2136,7 @@
- 	      <entry>V4L2_MBUS_FMT_YUYV8_1X16</entry>
- 	      <entry>0x2011</entry>
- 	      <entry></entry>
--	      &dash-ent-10;
--	      <entry>-</entry>
--	      <entry>-</entry>
--	      <entry>-</entry>
--	      <entry>-</entry>
-+	      &dash-ent-16;
- 	      <entry>y<subscript>7</subscript></entry>
- 	      <entry>y<subscript>6</subscript></entry>
- 	      <entry>y<subscript>5</subscript></entry>
-@@ -2294,11 +2158,7 @@
- 	      <entry></entry>
- 	      <entry></entry>
- 	      <entry></entry>
--	      &dash-ent-10;
--	      <entry>-</entry>
--	      <entry>-</entry>
--	      <entry>-</entry>
--	      <entry>-</entry>
-+	      &dash-ent-16;
- 	      <entry>y<subscript>7</subscript></entry>
- 	      <entry>y<subscript>6</subscript></entry>
- 	      <entry>y<subscript>5</subscript></entry>
-@@ -2320,11 +2180,7 @@
- 	      <entry>V4L2_MBUS_FMT_YVYU8_1X16</entry>
- 	      <entry>0x2012</entry>
- 	      <entry></entry>
--	      &dash-ent-10;
--	      <entry>-</entry>
--	      <entry>-</entry>
--	      <entry>-</entry>
--	      <entry>-</entry>
-+	      &dash-ent-16;
- 	      <entry>y<subscript>7</subscript></entry>
- 	      <entry>y<subscript>6</subscript></entry>
- 	      <entry>y<subscript>5</subscript></entry>
-@@ -2346,11 +2202,7 @@
- 	      <entry></entry>
- 	      <entry></entry>
- 	      <entry></entry>
--	      &dash-ent-10;
--	      <entry>-</entry>
--	      <entry>-</entry>
--	      <entry>-</entry>
--	      <entry>-</entry>
-+	      &dash-ent-16;
- 	      <entry>y<subscript>7</subscript></entry>
- 	      <entry>y<subscript>6</subscript></entry>
- 	      <entry>y<subscript>5</subscript></entry>
-@@ -2372,10 +2224,7 @@
- 	      <entry>V4L2_MBUS_FMT_YDYUYDYV8_1X16</entry>
- 	      <entry>0x2014</entry>
- 	      <entry></entry>
--	      <entry>-</entry>
--	      <entry>-</entry>
--	      <entry>-</entry>
--	      <entry>-</entry>
-+	      &dash-ent-16;
- 	      <entry>y<subscript>7</subscript></entry>
- 	      <entry>y<subscript>6</subscript></entry>
- 	      <entry>y<subscript>5</subscript></entry>
-@@ -2397,10 +2246,7 @@
- 	      <entry></entry>
- 	      <entry></entry>
- 	      <entry></entry>
--	      <entry>-</entry>
--	      <entry>-</entry>
--	      <entry>-</entry>
--	      <entry>-</entry>
-+	      &dash-ent-16;
- 	      <entry>y<subscript>7</subscript></entry>
- 	      <entry>y<subscript>6</subscript></entry>
- 	      <entry>y<subscript>5</subscript></entry>
-@@ -2422,10 +2268,7 @@
- 	      <entry></entry>
- 	      <entry></entry>
- 	      <entry></entry>
--	      <entry>-</entry>
--	      <entry>-</entry>
--	      <entry>-</entry>
--	      <entry>-</entry>
-+	      &dash-ent-16;
- 	      <entry>y<subscript>7</subscript></entry>
- 	      <entry>y<subscript>6</subscript></entry>
- 	      <entry>y<subscript>5</subscript></entry>
-@@ -2447,10 +2290,7 @@
- 	      <entry></entry>
- 	      <entry></entry>
- 	      <entry></entry>
--	      <entry>-</entry>
--	      <entry>-</entry>
--	      <entry>-</entry>
--	      <entry>-</entry>
-+	      &dash-ent-16;
- 	      <entry>y<subscript>7</subscript></entry>
- 	      <entry>y<subscript>6</subscript></entry>
- 	      <entry>y<subscript>5</subscript></entry>
-@@ -2472,7 +2312,7 @@
- 	      <entry>V4L2_MBUS_FMT_YUYV10_1X20</entry>
- 	      <entry>0x200d</entry>
- 	      <entry></entry>
--	      &dash-ent-10;
-+	      &dash-ent-12;
- 	      <entry>y<subscript>9</subscript></entry>
- 	      <entry>y<subscript>8</subscript></entry>
- 	      <entry>y<subscript>7</subscript></entry>
-@@ -2498,7 +2338,7 @@
- 	      <entry></entry>
- 	      <entry></entry>
- 	      <entry></entry>
--	      &dash-ent-10;
-+	      &dash-ent-12;
- 	      <entry>y<subscript>9</subscript></entry>
- 	      <entry>y<subscript>8</subscript></entry>
- 	      <entry>y<subscript>7</subscript></entry>
-@@ -2524,7 +2364,7 @@
- 	      <entry>V4L2_MBUS_FMT_YVYU10_1X20</entry>
- 	      <entry>0x200e</entry>
- 	      <entry></entry>
--	      &dash-ent-10;
-+	      &dash-ent-12;
- 	      <entry>y<subscript>9</subscript></entry>
- 	      <entry>y<subscript>8</subscript></entry>
- 	      <entry>y<subscript>7</subscript></entry>
-@@ -2550,7 +2390,7 @@
- 	      <entry></entry>
- 	      <entry></entry>
- 	      <entry></entry>
--	      &dash-ent-10;
-+	      &dash-ent-12;
- 	      <entry>y<subscript>9</subscript></entry>
- 	      <entry>y<subscript>8</subscript></entry>
- 	      <entry>y<subscript>7</subscript></entry>
-@@ -2576,6 +2416,8 @@
- 	      <entry>V4L2_MBUS_FMT_YUV10_1X30</entry>
- 	      <entry>0x2014</entry>
- 	      <entry></entry>
-+	      <entry>-</entry>
-+	      <entry>-</entry>
- 	      <entry>y<subscript>9</subscript></entry>
- 	      <entry>y<subscript>8</subscript></entry>
- 	      <entry>y<subscript>7</subscript></entry>
-@@ -2607,6 +2449,43 @@
- 	      <entry>v<subscript>1</subscript></entry>
- 	      <entry>v<subscript>0</subscript></entry>
- 	    </row>
-+	    <row id="V4L2-MBUS-FMT-AYUV8-1X32">
-+	      <entry>V4L2_MBUS_FMT_AYUV8_1X32</entry>
-+	      <entry>0x2017</entry>
-+	      <entry></entry>
-+	      <entry>a<subscript>7</subscript></entry>
-+	      <entry>a<subscript>6</subscript></entry>
-+	      <entry>a<subscript>5</subscript></entry>
-+	      <entry>a<subscript>4</subscript></entry>
-+	      <entry>a<subscript>3</subscript></entry>
-+	      <entry>a<subscript>2</subscript></entry>
-+	      <entry>a<subscript>1</subscript></entry>
-+	      <entry>a<subscript>0</subscript></entry>
-+	      <entry>y<subscript>7</subscript></entry>
-+	      <entry>y<subscript>6</subscript></entry>
-+	      <entry>y<subscript>5</subscript></entry>
-+	      <entry>y<subscript>4</subscript></entry>
-+	      <entry>y<subscript>3</subscript></entry>
-+	      <entry>y<subscript>2</subscript></entry>
-+	      <entry>y<subscript>1</subscript></entry>
-+	      <entry>y<subscript>0</subscript></entry>
-+	      <entry>u<subscript>7</subscript></entry>
-+	      <entry>u<subscript>6</subscript></entry>
-+	      <entry>u<subscript>5</subscript></entry>
-+	      <entry>u<subscript>4</subscript></entry>
-+	      <entry>u<subscript>3</subscript></entry>
-+	      <entry>u<subscript>2</subscript></entry>
-+	      <entry>u<subscript>1</subscript></entry>
-+	      <entry>u<subscript>0</subscript></entry>
-+	      <entry>v<subscript>7</subscript></entry>
-+	      <entry>v<subscript>6</subscript></entry>
-+	      <entry>v<subscript>5</subscript></entry>
-+	      <entry>v<subscript>4</subscript></entry>
-+	      <entry>v<subscript>3</subscript></entry>
-+	      <entry>v<subscript>2</subscript></entry>
-+	      <entry>v<subscript>1</subscript></entry>
-+	      <entry>v<subscript>0</subscript></entry>
-+	    </row>
- 	  </tbody>
- 	</tgroup>
-       </table>
-diff --git a/Documentation/DocBook/media_api.tmpl b/Documentation/DocBook/media_api.tmpl
-index 9c92bb879b6d..4c8d282545a2 100644
---- a/Documentation/DocBook/media_api.tmpl
-+++ b/Documentation/DocBook/media_api.tmpl
-@@ -22,8 +22,14 @@
- 
- <!-- LinuxTV v4l-dvb repository. -->
- <!ENTITY v4l-dvb		"<ulink url='http://linuxtv.org/repo/'>http://linuxtv.org/repo/</ulink>">
-+<!ENTITY dash-ent-8             "<entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry>">
- <!ENTITY dash-ent-10            "<entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry>">
-+<!ENTITY dash-ent-12            "<entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry>">
-+<!ENTITY dash-ent-14            "<entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry>">
- <!ENTITY dash-ent-16            "<entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry>">
-+<!ENTITY dash-ent-20            "<entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry>">
-+<!ENTITY dash-ent-22            "<entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry>">
-+<!ENTITY dash-ent-24            "<entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry><entry>-</entry>">
- ]>
- 
- <book id="media_api">
-diff --git a/include/uapi/linux/v4l2-mediabus.h b/include/uapi/linux/v4l2-mediabus.h
-index 6ee63d09b32d..a9601257bb43 100644
---- a/include/uapi/linux/v4l2-mediabus.h
-+++ b/include/uapi/linux/v4l2-mediabus.h
-@@ -37,7 +37,7 @@
- enum v4l2_mbus_pixelcode {
- 	V4L2_MBUS_FMT_FIXED = 0x0001,
- 
--	/* RGB - next is 0x100d */
-+	/* RGB - next is 0x100e */
- 	V4L2_MBUS_FMT_RGB444_2X8_PADHI_BE = 0x1001,
- 	V4L2_MBUS_FMT_RGB444_2X8_PADHI_LE = 0x1002,
- 	V4L2_MBUS_FMT_RGB555_2X8_PADHI_BE = 0x1003,
-@@ -50,8 +50,9 @@ enum v4l2_mbus_pixelcode {
- 	V4L2_MBUS_FMT_RGB888_1X24 = 0x100a,
- 	V4L2_MBUS_FMT_RGB888_2X12_BE = 0x100b,
- 	V4L2_MBUS_FMT_RGB888_2X12_LE = 0x100c,
-+	V4L2_MBUS_FMT_ARGB8888_1X32 = 0x100d,
- 
--	/* YUV (including grey) - next is 0x2017 */
-+	/* YUV (including grey) - next is 0x2018 */
- 	V4L2_MBUS_FMT_Y8_1X8 = 0x2001,
- 	V4L2_MBUS_FMT_UV8_1X8 = 0x2015,
- 	V4L2_MBUS_FMT_UYVY8_1_5X8 = 0x2002,
-@@ -74,6 +75,7 @@ enum v4l2_mbus_pixelcode {
- 	V4L2_MBUS_FMT_YUYV10_1X20 = 0x200d,
- 	V4L2_MBUS_FMT_YVYU10_1X20 = 0x200e,
- 	V4L2_MBUS_FMT_YUV10_1X30 = 0x2016,
-+	V4L2_MBUS_FMT_AYUV8_1X32 = 0x2017,
- 
- 	/* Bayer - next is 0x3019 */
- 	V4L2_MBUS_FMT_SBGGR8_1X8 = 0x3001,
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0036-clk-wrap-I-O-access-for-improved-portability.patch b/patches.renesas/0036-clk-wrap-I-O-access-for-improved-portability.patch
deleted file mode 100644
index 587974b6a367a..0000000000000
--- a/patches.renesas/0036-clk-wrap-I-O-access-for-improved-portability.patch
+++ /dev/null
@@ -1,61 +0,0 @@
-From 5ae5bb067186f8c29c8ef2a45418a68def37c347 Mon Sep 17 00:00:00 2001
-From: Gerhard Sittig <gsi@denx.de>
-Date: Mon, 22 Jul 2013 14:14:40 +0200
-Subject: clk: wrap I/O access for improved portability
-
-the common clock drivers were motivated/initiated by ARM development
-and apparently assume little endian peripherals
-
-wrap register/peripherals access in the common code (div, gate, mux)
-in preparation of adding COMMON_CLK support for other platforms
-
-Signed-off-by: Gerhard Sittig <gsi@denx.de>
-Signed-off-by: Mike Turquette <mturquette@linaro.org>
-(cherry picked from commit aa514ce34b65e3dc01f95a0b470b39bbb7e09998)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-	drivers/clk/clk-divider.c
-	drivers/clk/clk-gate.c
-	drivers/clk/clk-mux.c
-	include/linux/clk-provider.h
----
- include/linux/clk-provider.h | 16 ++++++++++++++++
- 1 file changed, 16 insertions(+)
-
-diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
-index 11860985fecb..67edd5f448df 100644
---- a/include/linux/clk-provider.h
-+++ b/include/linux/clk-provider.h
-@@ -12,6 +12,7 @@
- #define __LINUX_CLK_PROVIDER_H
- 
- #include <linux/clk.h>
-+#include <linux/io.h>
- 
- #ifdef CONFIG_COMMON_CLK
- 
-@@ -444,5 +445,20 @@ void of_clk_init(const struct of_device_id *matches);
- 		__used __section(__clk_of_table)		\
- 		= { .compatible = compat, .data = fn };
- 
-+/*
-+ * wrap access to peripherals in accessor routines
-+ * for improved portability across platforms
-+ */
-+
-+static inline u32 clk_readl(u32 __iomem *reg)
-+{
-+	return readl(reg);
-+}
-+
-+static inline void clk_writel(u32 val, u32 __iomem *reg)
-+{
-+	writel(val, reg);
-+}
-+
- #endif /* CONFIG_COMMON_CLK */
- #endif /* CLK_PROVIDER_H */
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0036-media-v4l-Add-V4L2_PIX_FMT_NV16M-and-V4L2_PIX_FMT_NV.patch b/patches.renesas/0036-media-v4l-Add-V4L2_PIX_FMT_NV16M-and-V4L2_PIX_FMT_NV.patch
deleted file mode 100644
index a98d19cf49326..0000000000000
--- a/patches.renesas/0036-media-v4l-Add-V4L2_PIX_FMT_NV16M-and-V4L2_PIX_FMT_NV.patch
+++ /dev/null
@@ -1,229 +0,0 @@
-From 0c9ce7436f24244b7506636d991007e9580eacca Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 26 Jun 2013 09:46:42 -0300
-Subject: [media] v4l: Add V4L2_PIX_FMT_NV16M and V4L2_PIX_FMT_NV61M formats
-
-NV16M and NV61M are planar YCbCr 4:2:2 and YCrCb 4:2:2 formats with a
-luma plane followed by an interleaved chroma plane. The planes are not
-required to be contiguous in memory, and the formats can only be used
-with the multi-planar formats API.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
-Reviewed-by: Sakari Ailus <sakari.ailus@iki.fi>
-Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
-Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
-(cherry picked from commit 8493054844145e47a8f0668f57e2b0073aca850f)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- Documentation/DocBook/media/v4l/pixfmt-nv16m.xml | 171 +++++++++++++++++++++++
- Documentation/DocBook/media/v4l/pixfmt.xml       |   1 +
- include/uapi/linux/videodev2.h                   |   2 +
- 3 files changed, 174 insertions(+)
- create mode 100644 Documentation/DocBook/media/v4l/pixfmt-nv16m.xml
-
-diff --git a/Documentation/DocBook/media/v4l/pixfmt-nv16m.xml b/Documentation/DocBook/media/v4l/pixfmt-nv16m.xml
-new file mode 100644
-index 000000000000..c51d5a4cda09
---- /dev/null
-+++ b/Documentation/DocBook/media/v4l/pixfmt-nv16m.xml
-@@ -0,0 +1,171 @@
-+    <refentry>
-+      <refmeta>
-+	<refentrytitle>V4L2_PIX_FMT_NV16M ('NM16'), V4L2_PIX_FMT_NV61M ('NM61')</refentrytitle>
-+	&manvol;
-+      </refmeta>
-+      <refnamediv>
-+	<refname id="V4L2-PIX-FMT-NV16M"><constant>V4L2_PIX_FMT_NV16M</constant></refname>
-+	<refname id="V4L2-PIX-FMT-NV61M"><constant>V4L2_PIX_FMT_NV61M</constant></refname>
-+	<refpurpose>Variation of <constant>V4L2_PIX_FMT_NV16</constant> and <constant>V4L2_PIX_FMT_NV61</constant> with planes
-+	  non contiguous in memory. </refpurpose>
-+      </refnamediv>
-+      <refsect1>
-+	<title>Description</title>
-+
-+	<para>This is a multi-planar, two-plane version of the YUV 4:2:0 format.
-+The three components are separated into two sub-images or planes.
-+<constant>V4L2_PIX_FMT_NV16M</constant> differs from <constant>V4L2_PIX_FMT_NV16
-+</constant> in that the two planes are non-contiguous in memory, i.e. the chroma
-+plane does not necessarily immediately follows the luma plane.
-+The luminance data occupies the first plane. The Y plane has one byte per pixel.
-+In the second plane there is chrominance data with alternating chroma samples.
-+The CbCr plane is the same width and height, in bytes, as the Y plane.
-+Each CbCr pair belongs to four pixels. For example,
-+Cb<subscript>0</subscript>/Cr<subscript>0</subscript> belongs to
-+Y'<subscript>00</subscript>, Y'<subscript>01</subscript>,
-+Y'<subscript>10</subscript>, Y'<subscript>11</subscript>.
-+<constant>V4L2_PIX_FMT_NV61M</constant> is the same as <constant>V4L2_PIX_FMT_NV16M</constant>
-+except the Cb and Cr bytes are swapped, the CrCb plane starts with a Cr byte.</para>
-+
-+	<para><constant>V4L2_PIX_FMT_NV16M</constant> and
-+<constant>V4L2_PIX_FMT_NV61M</constant> are intended to be used only in drivers
-+and applications that support the multi-planar API, described in
-+<xref linkend="planar-apis"/>. </para>
-+
-+	<example>
-+	  <title><constant>V4L2_PIX_FMT_NV16M</constant> 4 &times; 4 pixel image</title>
-+
-+	  <formalpara>
-+	    <title>Byte Order.</title>
-+	    <para>Each cell is one byte.
-+		<informaltable frame="none">
-+		<tgroup cols="5" align="center">
-+		  <colspec align="left" colwidth="2*" />
-+		  <tbody valign="top">
-+		    <row>
-+		      <entry>start0&nbsp;+&nbsp;0:</entry>
-+		      <entry>Y'<subscript>00</subscript></entry>
-+		      <entry>Y'<subscript>01</subscript></entry>
-+		      <entry>Y'<subscript>02</subscript></entry>
-+		      <entry>Y'<subscript>03</subscript></entry>
-+		    </row>
-+		    <row>
-+		      <entry>start0&nbsp;+&nbsp;4:</entry>
-+		      <entry>Y'<subscript>10</subscript></entry>
-+		      <entry>Y'<subscript>11</subscript></entry>
-+		      <entry>Y'<subscript>12</subscript></entry>
-+		      <entry>Y'<subscript>13</subscript></entry>
-+		    </row>
-+		    <row>
-+		      <entry>start0&nbsp;+&nbsp;8:</entry>
-+		      <entry>Y'<subscript>20</subscript></entry>
-+		      <entry>Y'<subscript>21</subscript></entry>
-+		      <entry>Y'<subscript>22</subscript></entry>
-+		      <entry>Y'<subscript>23</subscript></entry>
-+		    </row>
-+		    <row>
-+		      <entry>start0&nbsp;+&nbsp;12:</entry>
-+		      <entry>Y'<subscript>30</subscript></entry>
-+		      <entry>Y'<subscript>31</subscript></entry>
-+		      <entry>Y'<subscript>32</subscript></entry>
-+		      <entry>Y'<subscript>33</subscript></entry>
-+		    </row>
-+		    <row>
-+		      <entry></entry>
-+		    </row>
-+		    <row>
-+		      <entry>start1&nbsp;+&nbsp;0:</entry>
-+		      <entry>Cb<subscript>00</subscript></entry>
-+		      <entry>Cr<subscript>00</subscript></entry>
-+		      <entry>Cb<subscript>02</subscript></entry>
-+		      <entry>Cr<subscript>02</subscript></entry>
-+		    </row>
-+		    <row>
-+		      <entry>start1&nbsp;+&nbsp;4:</entry>
-+		      <entry>Cb<subscript>10</subscript></entry>
-+		      <entry>Cr<subscript>10</subscript></entry>
-+		      <entry>Cb<subscript>12</subscript></entry>
-+		      <entry>Cr<subscript>12</subscript></entry>
-+		    </row>
-+		    <row>
-+		      <entry>start1&nbsp;+&nbsp;8:</entry>
-+		      <entry>Cb<subscript>20</subscript></entry>
-+		      <entry>Cr<subscript>20</subscript></entry>
-+		      <entry>Cb<subscript>22</subscript></entry>
-+		      <entry>Cr<subscript>22</subscript></entry>
-+		    </row>
-+		    <row>
-+		      <entry>start1&nbsp;+&nbsp;12:</entry>
-+		      <entry>Cb<subscript>30</subscript></entry>
-+		      <entry>Cr<subscript>30</subscript></entry>
-+		      <entry>Cb<subscript>32</subscript></entry>
-+		      <entry>Cr<subscript>32</subscript></entry>
-+		    </row>
-+		  </tbody>
-+		</tgroup>
-+		</informaltable>
-+	      </para>
-+	  </formalpara>
-+
-+	  <formalpara>
-+	    <title>Color Sample Location.</title>
-+	    <para>
-+		<informaltable frame="none">
-+		<tgroup cols="7" align="center">
-+		  <tbody valign="top">
-+		    <row>
-+		      <entry></entry>
-+		      <entry>0</entry><entry></entry><entry>1</entry><entry></entry>
-+		      <entry>2</entry><entry></entry><entry>3</entry>
-+		    </row>
-+		    <row>
-+		      <entry>0</entry>
-+		      <entry>Y</entry><entry></entry><entry>Y</entry><entry></entry>
-+		      <entry>Y</entry><entry></entry><entry>Y</entry>
-+		    </row>
-+		    <row>
-+		      <entry></entry>
-+		      <entry></entry><entry>C</entry><entry></entry><entry></entry>
-+		      <entry></entry><entry>C</entry><entry></entry>
-+		    </row>
-+		    <row>
-+		      <entry>1</entry>
-+		      <entry>Y</entry><entry></entry><entry>Y</entry><entry></entry>
-+		      <entry>Y</entry><entry></entry><entry>Y</entry>
-+		    </row>
-+		    <row>
-+		      <entry></entry>
-+		      <entry></entry><entry>C</entry><entry></entry><entry></entry>
-+		      <entry></entry><entry>C</entry><entry></entry>
-+		    </row>
-+		    <row>
-+		      <entry></entry>
-+		    </row>
-+		    <row>
-+		      <entry>2</entry>
-+		      <entry>Y</entry><entry></entry><entry>Y</entry><entry></entry>
-+		      <entry>Y</entry><entry></entry><entry>Y</entry>
-+		    </row>
-+		    <row>
-+		      <entry></entry>
-+		      <entry></entry><entry>C</entry><entry></entry><entry></entry>
-+		      <entry></entry><entry>C</entry><entry></entry>
-+		    </row>
-+		    <row>
-+		      <entry>3</entry>
-+		      <entry>Y</entry><entry></entry><entry>Y</entry><entry></entry>
-+		      <entry>Y</entry><entry></entry><entry>Y</entry>
-+		    </row>
-+		    <row>
-+		      <entry></entry>
-+		      <entry></entry><entry>C</entry><entry></entry><entry></entry>
-+		      <entry></entry><entry>C</entry><entry></entry>
-+		    </row>
-+		  </tbody>
-+		</tgroup>
-+		</informaltable>
-+	      </para>
-+	  </formalpara>
-+	</example>
-+      </refsect1>
-+    </refentry>
-diff --git a/Documentation/DocBook/media/v4l/pixfmt.xml b/Documentation/DocBook/media/v4l/pixfmt.xml
-index 99b8d2ad6e4f..16db350848af 100644
---- a/Documentation/DocBook/media/v4l/pixfmt.xml
-+++ b/Documentation/DocBook/media/v4l/pixfmt.xml
-@@ -718,6 +718,7 @@ information.</para>
-     &sub-nv12m;
-     &sub-nv12mt;
-     &sub-nv16;
-+    &sub-nv16m;
-     &sub-nv24;
-     &sub-m420;
-   </section>
-diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h
-index f40b41c7e108..1e3cb4e5270e 100644
---- a/include/uapi/linux/videodev2.h
-+++ b/include/uapi/linux/videodev2.h
-@@ -348,6 +348,8 @@ struct v4l2_pix_format {
- /* two non contiguous planes - one Y, one Cr + Cb interleaved  */
- #define V4L2_PIX_FMT_NV12M   v4l2_fourcc('N', 'M', '1', '2') /* 12  Y/CbCr 4:2:0  */
- #define V4L2_PIX_FMT_NV21M   v4l2_fourcc('N', 'M', '2', '1') /* 21  Y/CrCb 4:2:0  */
-+#define V4L2_PIX_FMT_NV16M   v4l2_fourcc('N', 'M', '1', '6') /* 16  Y/CbCr 4:2:2  */
-+#define V4L2_PIX_FMT_NV61M   v4l2_fourcc('N', 'M', '6', '1') /* 16  Y/CrCb 4:2:2  */
- #define V4L2_PIX_FMT_NV12MT  v4l2_fourcc('T', 'M', '1', '2') /* 12  Y/CbCr 4:2:0 64x32 macroblocks */
- #define V4L2_PIX_FMT_NV12MT_16X16 v4l2_fourcc('V', 'M', '1', '2') /* 12  Y/CbCr 4:2:0 16x16 macroblocks */
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0036-pwm-Add-Renesas-TPU-PWM-driver.patch b/patches.renesas/0036-pwm-Add-Renesas-TPU-PWM-driver.patch
deleted file mode 100644
index f26d23c78e1bf..0000000000000
--- a/patches.renesas/0036-pwm-Add-Renesas-TPU-PWM-driver.patch
+++ /dev/null
@@ -1,566 +0,0 @@
-From 7dfac374156fab07fc159f395deee4dca31ed6e4 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 13 Jun 2013 18:54:44 +0200
-Subject: pwm: Add Renesas TPU PWM driver
-
-The Timer Pulse Unit (TPU) is a 4-channels 16-bit timer used to generate
-waveforms. This driver exposes PWM functions through the PWM API for
-other drivers to use.
-
-The code is loosely based on the leds-renesas-tpu driver by Magnus Damm
-and the TPU PWM driver shipped in the Armadillo EVA 800 kernel sources.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Axel Lin <axel.lin@ingics.com>
-Tested-by: Simon Horman <horms@verge.net.au>
-Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
-(cherry picked from commit 99b82abb0a35b07310ea6334257829af168c8e08)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pwm/Kconfig                           |  10 +
- drivers/pwm/Makefile                          |   1 +
- drivers/pwm/pwm-renesas-tpu.c                 | 475 ++++++++++++++++++++++++++
- include/linux/platform_data/pwm-renesas-tpu.h |  16 +
- 4 files changed, 502 insertions(+)
- create mode 100644 drivers/pwm/pwm-renesas-tpu.c
- create mode 100644 include/linux/platform_data/pwm-renesas-tpu.h
-
-diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig
-index 115b6445..14a9122f 100644
---- a/drivers/pwm/Kconfig
-+++ b/drivers/pwm/Kconfig
-@@ -115,6 +115,16 @@ config PWM_PXA
- 	  To compile this driver as a module, choose M here: the module
- 	  will be called pwm-pxa.
- 
-+config PWM_RENESAS_TPU
-+	tristate "Renesas TPU PWM support"
-+	depends on ARCH_SHMOBILE
-+	help
-+	  This driver exposes the Timer Pulse Unit (TPU) PWM controller found
-+	  in Renesas chips through the PWM API.
-+
-+	  To compile this driver as a module, choose M here: the module
-+	  will be called pwm-renesas-tpu.
-+
- config PWM_SAMSUNG
- 	tristate "Samsung PWM support"
- 	depends on PLAT_SAMSUNG
-diff --git a/drivers/pwm/Makefile b/drivers/pwm/Makefile
-index 94ba21e2..5aa815fd 100644
---- a/drivers/pwm/Makefile
-+++ b/drivers/pwm/Makefile
-@@ -8,6 +8,7 @@ obj-$(CONFIG_PWM_LPC32XX)	+= pwm-lpc32xx.o
- obj-$(CONFIG_PWM_MXS)		+= pwm-mxs.o
- obj-$(CONFIG_PWM_PUV3)		+= pwm-puv3.o
- obj-$(CONFIG_PWM_PXA)		+= pwm-pxa.o
-+obj-$(CONFIG_PWM_RENESAS_TPU)	+= pwm-renesas-tpu.o
- obj-$(CONFIG_PWM_SAMSUNG)	+= pwm-samsung.o
- obj-$(CONFIG_PWM_SPEAR)		+= pwm-spear.o
- obj-$(CONFIG_PWM_TEGRA)		+= pwm-tegra.o
-diff --git a/drivers/pwm/pwm-renesas-tpu.c b/drivers/pwm/pwm-renesas-tpu.c
-new file mode 100644
-index 00000000..96e0cc48
---- /dev/null
-+++ b/drivers/pwm/pwm-renesas-tpu.c
-@@ -0,0 +1,475 @@
-+/*
-+ * R-Mobile TPU PWM driver
-+ *
-+ * Copyright (C) 2012 Renesas Solutions Corp.
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ */
-+
-+#include <linux/clk.h>
-+#include <linux/err.h>
-+#include <linux/io.h>
-+#include <linux/init.h>
-+#include <linux/ioport.h>
-+#include <linux/module.h>
-+#include <linux/mutex.h>
-+#include <linux/platform_data/pwm-renesas-tpu.h>
-+#include <linux/platform_device.h>
-+#include <linux/pm_runtime.h>
-+#include <linux/pwm.h>
-+#include <linux/slab.h>
-+#include <linux/spinlock.h>
-+
-+#define TPU_TSTR		0x00	/* Timer start register (shared) */
-+
-+#define TPU_TCRn		0x00	/* Timer control register */
-+#define TPU_TCR_CCLR_NONE	(0 << 5)
-+#define TPU_TCR_CCLR_TGRA	(1 << 5)
-+#define TPU_TCR_CCLR_TGRB	(2 << 5)
-+#define TPU_TCR_CCLR_TGRC	(5 << 5)
-+#define TPU_TCR_CCLR_TGRD	(6 << 5)
-+#define TPU_TCR_CKEG_RISING	(0 << 3)
-+#define TPU_TCR_CKEG_FALLING	(1 << 3)
-+#define TPU_TCR_CKEG_BOTH	(2 << 3)
-+#define TPU_TMDRn		0x04	/* Timer mode register */
-+#define TPU_TMDR_BFWT		(1 << 6)
-+#define TPU_TMDR_BFB		(1 << 5)
-+#define TPU_TMDR_BFA		(1 << 4)
-+#define TPU_TMDR_MD_NORMAL	(0 << 0)
-+#define TPU_TMDR_MD_PWM		(2 << 0)
-+#define TPU_TIORn		0x08	/* Timer I/O control register */
-+#define TPU_TIOR_IOA_0		(0 << 0)
-+#define TPU_TIOR_IOA_0_CLR	(1 << 0)
-+#define TPU_TIOR_IOA_0_SET	(2 << 0)
-+#define TPU_TIOR_IOA_0_TOGGLE	(3 << 0)
-+#define TPU_TIOR_IOA_1		(4 << 0)
-+#define TPU_TIOR_IOA_1_CLR	(5 << 0)
-+#define TPU_TIOR_IOA_1_SET	(6 << 0)
-+#define TPU_TIOR_IOA_1_TOGGLE	(7 << 0)
-+#define TPU_TIERn		0x0c	/* Timer interrupt enable register */
-+#define TPU_TSRn		0x10	/* Timer status register */
-+#define TPU_TCNTn		0x14	/* Timer counter */
-+#define TPU_TGRAn		0x18	/* Timer general register A */
-+#define TPU_TGRBn		0x1c	/* Timer general register B */
-+#define TPU_TGRCn		0x20	/* Timer general register C */
-+#define TPU_TGRDn		0x24	/* Timer general register D */
-+
-+#define TPU_CHANNEL_OFFSET	0x10
-+#define TPU_CHANNEL_SIZE	0x40
-+
-+enum tpu_pin_state {
-+	TPU_PIN_INACTIVE,		/* Pin is driven inactive */
-+	TPU_PIN_PWM,			/* Pin is driven by PWM */
-+	TPU_PIN_ACTIVE,			/* Pin is driven active */
-+};
-+
-+struct tpu_device;
-+
-+struct tpu_pwm_device {
-+	bool timer_on;			/* Whether the timer is running */
-+
-+	struct tpu_device *tpu;
-+	unsigned int channel;		/* Channel number in the TPU */
-+
-+	enum pwm_polarity polarity;
-+	unsigned int prescaler;
-+	u16 period;
-+	u16 duty;
-+};
-+
-+struct tpu_device {
-+	struct platform_device *pdev;
-+	struct tpu_pwm_platform_data *pdata;
-+	struct pwm_chip chip;
-+	spinlock_t lock;
-+
-+	void __iomem *base;
-+	struct clk *clk;
-+};
-+
-+#define to_tpu_device(c)	container_of(c, struct tpu_device, chip)
-+
-+static void tpu_pwm_write(struct tpu_pwm_device *pwm, int reg_nr, u16 value)
-+{
-+	void __iomem *base = pwm->tpu->base + TPU_CHANNEL_OFFSET
-+			   + pwm->channel * TPU_CHANNEL_SIZE;
-+
-+	iowrite16(value, base + reg_nr);
-+}
-+
-+static void tpu_pwm_set_pin(struct tpu_pwm_device *pwm,
-+			    enum tpu_pin_state state)
-+{
-+	static const char * const states[] = { "inactive", "PWM", "active" };
-+
-+	dev_dbg(&pwm->tpu->pdev->dev, "%u: configuring pin as %s\n",
-+		pwm->channel, states[state]);
-+
-+	switch (state) {
-+	case TPU_PIN_INACTIVE:
-+		tpu_pwm_write(pwm, TPU_TIORn,
-+			      pwm->polarity == PWM_POLARITY_INVERSED ?
-+			      TPU_TIOR_IOA_1 : TPU_TIOR_IOA_0);
-+		break;
-+	case TPU_PIN_PWM:
-+		tpu_pwm_write(pwm, TPU_TIORn,
-+			      pwm->polarity == PWM_POLARITY_INVERSED ?
-+			      TPU_TIOR_IOA_0_SET : TPU_TIOR_IOA_1_CLR);
-+		break;
-+	case TPU_PIN_ACTIVE:
-+		tpu_pwm_write(pwm, TPU_TIORn,
-+			      pwm->polarity == PWM_POLARITY_INVERSED ?
-+			      TPU_TIOR_IOA_0 : TPU_TIOR_IOA_1);
-+		break;
-+	}
-+}
-+
-+static void tpu_pwm_start_stop(struct tpu_pwm_device *pwm, int start)
-+{
-+	unsigned long flags;
-+	u16 value;
-+
-+	spin_lock_irqsave(&pwm->tpu->lock, flags);
-+	value = ioread16(pwm->tpu->base + TPU_TSTR);
-+
-+	if (start)
-+		value |= 1 << pwm->channel;
-+	else
-+		value &= ~(1 << pwm->channel);
-+
-+	iowrite16(value, pwm->tpu->base + TPU_TSTR);
-+	spin_unlock_irqrestore(&pwm->tpu->lock, flags);
-+}
-+
-+static int tpu_pwm_timer_start(struct tpu_pwm_device *pwm)
-+{
-+	int ret;
-+
-+	if (!pwm->timer_on) {
-+		/* Wake up device and enable clock. */
-+		pm_runtime_get_sync(&pwm->tpu->pdev->dev);
-+		ret = clk_prepare_enable(pwm->tpu->clk);
-+		if (ret) {
-+			dev_err(&pwm->tpu->pdev->dev, "cannot enable clock\n");
-+			return ret;
-+		}
-+		pwm->timer_on = true;
-+	}
-+
-+	/*
-+	 * Make sure the channel is stopped, as we need to reconfigure it
-+	 * completely. First drive the pin to the inactive state to avoid
-+	 * glitches.
-+	 */
-+	tpu_pwm_set_pin(pwm, TPU_PIN_INACTIVE);
-+	tpu_pwm_start_stop(pwm, false);
-+
-+	/*
-+	 * - Clear TCNT on TGRB match
-+	 * - Count on rising edge
-+	 * - Set prescaler
-+	 * - Output 0 until TGRA, output 1 until TGRB (active low polarity)
-+	 * - Output 1 until TGRA, output 0 until TGRB (active high polarity
-+	 * - PWM mode
-+	 */
-+	tpu_pwm_write(pwm, TPU_TCRn, TPU_TCR_CCLR_TGRB | TPU_TCR_CKEG_RISING |
-+		      pwm->prescaler);
-+	tpu_pwm_write(pwm, TPU_TMDRn, TPU_TMDR_MD_PWM);
-+	tpu_pwm_set_pin(pwm, TPU_PIN_PWM);
-+	tpu_pwm_write(pwm, TPU_TGRAn, pwm->duty);
-+	tpu_pwm_write(pwm, TPU_TGRBn, pwm->period);
-+
-+	dev_dbg(&pwm->tpu->pdev->dev, "%u: TGRA 0x%04x TGRB 0x%04x\n",
-+		pwm->channel, pwm->duty, pwm->period);
-+
-+	/* Start the channel. */
-+	tpu_pwm_start_stop(pwm, true);
-+
-+	return 0;
-+}
-+
-+static void tpu_pwm_timer_stop(struct tpu_pwm_device *pwm)
-+{
-+	if (!pwm->timer_on)
-+		return;
-+
-+	/* Disable channel. */
-+	tpu_pwm_start_stop(pwm, false);
-+
-+	/* Stop clock and mark device as idle. */
-+	clk_disable_unprepare(pwm->tpu->clk);
-+	pm_runtime_put(&pwm->tpu->pdev->dev);
-+
-+	pwm->timer_on = false;
-+}
-+
-+/* -----------------------------------------------------------------------------
-+ * PWM API
-+ */
-+
-+static int tpu_pwm_request(struct pwm_chip *chip, struct pwm_device *_pwm)
-+{
-+	struct tpu_device *tpu = to_tpu_device(chip);
-+	struct tpu_pwm_device *pwm;
-+
-+	if (_pwm->hwpwm >= TPU_CHANNEL_MAX)
-+		return -EINVAL;
-+
-+	pwm = kzalloc(sizeof(*pwm), GFP_KERNEL);
-+	if (pwm == NULL)
-+		return -ENOMEM;
-+
-+	pwm->tpu = tpu;
-+	pwm->channel = _pwm->hwpwm;
-+	pwm->polarity = tpu->pdata ? tpu->pdata->channels[pwm->channel].polarity
-+		      : PWM_POLARITY_NORMAL;
-+	pwm->prescaler = 0;
-+	pwm->period = 0;
-+	pwm->duty = 0;
-+
-+	pwm->timer_on = false;
-+
-+	pwm_set_chip_data(_pwm, pwm);
-+
-+	return 0;
-+}
-+
-+static void tpu_pwm_free(struct pwm_chip *chip, struct pwm_device *_pwm)
-+{
-+	struct tpu_pwm_device *pwm = pwm_get_chip_data(_pwm);
-+
-+	tpu_pwm_timer_stop(pwm);
-+	kfree(pwm);
-+}
-+
-+static int tpu_pwm_config(struct pwm_chip *chip, struct pwm_device *_pwm,
-+			  int duty_ns, int period_ns)
-+{
-+	static const unsigned int prescalers[] = { 1, 4, 16, 64 };
-+	struct tpu_pwm_device *pwm = pwm_get_chip_data(_pwm);
-+	struct tpu_device *tpu = to_tpu_device(chip);
-+	unsigned int prescaler;
-+	bool duty_only = false;
-+	u32 clk_rate;
-+	u32 period;
-+	u32 duty;
-+	int ret;
-+
-+	/*
-+	 * Pick a prescaler to avoid overflowing the counter.
-+	 * TODO: Pick the highest acceptable prescaler.
-+	 */
-+	clk_rate = clk_get_rate(tpu->clk);
-+
-+	for (prescaler = 0; prescaler < ARRAY_SIZE(prescalers); ++prescaler) {
-+		period = clk_rate / prescalers[prescaler]
-+		       / (NSEC_PER_SEC / period_ns);
-+		if (period <= 0xffff)
-+			break;
-+	}
-+
-+	if (prescaler == ARRAY_SIZE(prescalers) || period == 0) {
-+		dev_err(&tpu->pdev->dev, "clock rate mismatch\n");
-+		return -ENOTSUPP;
-+	}
-+
-+	if (duty_ns) {
-+		duty = clk_rate / prescalers[prescaler]
-+		     / (NSEC_PER_SEC / duty_ns);
-+		if (duty > period)
-+			return -EINVAL;
-+	} else {
-+		duty = 0;
-+	}
-+
-+	dev_dbg(&tpu->pdev->dev,
-+		"rate %u, prescaler %u, period %u, duty %u\n",
-+		clk_rate, prescalers[prescaler], period, duty);
-+
-+	if (pwm->prescaler == prescaler && pwm->period == period)
-+		duty_only = true;
-+
-+	pwm->prescaler = prescaler;
-+	pwm->period = period;
-+	pwm->duty = duty;
-+
-+	/* If the channel is disabled we're done. */
-+	if (!test_bit(PWMF_ENABLED, &_pwm->flags))
-+		return 0;
-+
-+	if (duty_only && pwm->timer_on) {
-+		/*
-+		 * If only the duty cycle changed and the timer is already
-+		 * running, there's no need to reconfigure it completely, Just
-+		 * modify the duty cycle.
-+		 */
-+		tpu_pwm_write(pwm, TPU_TGRAn, pwm->duty);
-+		dev_dbg(&tpu->pdev->dev, "%u: TGRA 0x%04x\n", pwm->channel,
-+			pwm->duty);
-+	} else {
-+		/* Otherwise perform a full reconfiguration. */
-+		ret = tpu_pwm_timer_start(pwm);
-+		if (ret < 0)
-+			return ret;
-+	}
-+
-+	if (duty == 0 || duty == period) {
-+		/*
-+		 * To avoid running the timer when not strictly required, handle
-+		 * 0% and 100% duty cycles as fixed levels and stop the timer.
-+		 */
-+		tpu_pwm_set_pin(pwm, duty ? TPU_PIN_ACTIVE : TPU_PIN_INACTIVE);
-+		tpu_pwm_timer_stop(pwm);
-+	}
-+
-+	return 0;
-+}
-+
-+static int tpu_pwm_set_polarity(struct pwm_chip *chip, struct pwm_device *_pwm,
-+				enum pwm_polarity polarity)
-+{
-+	struct tpu_pwm_device *pwm = pwm_get_chip_data(_pwm);
-+
-+	pwm->polarity = polarity;
-+
-+	return 0;
-+}
-+
-+static int tpu_pwm_enable(struct pwm_chip *chip, struct pwm_device *_pwm)
-+{
-+	struct tpu_pwm_device *pwm = pwm_get_chip_data(_pwm);
-+	int ret;
-+
-+	ret = tpu_pwm_timer_start(pwm);
-+	if (ret < 0)
-+		return ret;
-+
-+	/*
-+	 * To avoid running the timer when not strictly required, handle 0% and
-+	 * 100% duty cycles as fixed levels and stop the timer.
-+	 */
-+	if (pwm->duty == 0 || pwm->duty == pwm->period) {
-+		tpu_pwm_set_pin(pwm, pwm->duty ?
-+				TPU_PIN_ACTIVE : TPU_PIN_INACTIVE);
-+		tpu_pwm_timer_stop(pwm);
-+	}
-+
-+	return 0;
-+}
-+
-+static void tpu_pwm_disable(struct pwm_chip *chip, struct pwm_device *_pwm)
-+{
-+	struct tpu_pwm_device *pwm = pwm_get_chip_data(_pwm);
-+
-+	/* The timer must be running to modify the pin output configuration. */
-+	tpu_pwm_timer_start(pwm);
-+	tpu_pwm_set_pin(pwm, TPU_PIN_INACTIVE);
-+	tpu_pwm_timer_stop(pwm);
-+}
-+
-+static const struct pwm_ops tpu_pwm_ops = {
-+	.request = tpu_pwm_request,
-+	.free = tpu_pwm_free,
-+	.config = tpu_pwm_config,
-+	.set_polarity = tpu_pwm_set_polarity,
-+	.enable = tpu_pwm_enable,
-+	.disable = tpu_pwm_disable,
-+	.owner = THIS_MODULE,
-+};
-+
-+/* -----------------------------------------------------------------------------
-+ * Probe and remove
-+ */
-+
-+static int tpu_probe(struct platform_device *pdev)
-+{
-+	struct tpu_device *tpu;
-+	struct resource *res;
-+	int ret;
-+
-+	tpu = devm_kzalloc(&pdev->dev, sizeof(*tpu), GFP_KERNEL);
-+	if (tpu == NULL) {
-+		dev_err(&pdev->dev, "failed to allocate driver data\n");
-+		return -ENOMEM;
-+	}
-+
-+	tpu->pdata = pdev->dev.platform_data;
-+
-+	/* Map memory, get clock and pin control. */
-+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+	if (!res) {
-+		dev_err(&pdev->dev, "failed to get I/O memory\n");
-+		return -ENXIO;
-+	}
-+
-+	tpu->base = devm_ioremap_resource(&pdev->dev, res);
-+	if (tpu->base == NULL) {
-+		dev_err(&pdev->dev, "failed to remap I/O memory\n");
-+		return -ENXIO;
-+	}
-+
-+	tpu->clk = devm_clk_get(&pdev->dev, NULL);
-+	if (IS_ERR(tpu->clk)) {
-+		dev_err(&pdev->dev, "cannot get clock\n");
-+		return PTR_ERR(tpu->clk);
-+	}
-+
-+	/* Initialize and register the device. */
-+	platform_set_drvdata(pdev, tpu);
-+
-+	spin_lock_init(&tpu->lock);
-+	tpu->pdev = pdev;
-+
-+	tpu->chip.dev = &pdev->dev;
-+	tpu->chip.ops = &tpu_pwm_ops;
-+	tpu->chip.base = -1;
-+	tpu->chip.npwm = TPU_CHANNEL_MAX;
-+
-+	ret = pwmchip_add(&tpu->chip);
-+	if (ret < 0) {
-+		dev_err(&pdev->dev, "failed to register PWM chip\n");
-+		return ret;
-+	}
-+
-+	dev_info(&pdev->dev, "TPU PWM %d registered\n", tpu->pdev->id);
-+
-+	pm_runtime_enable(&pdev->dev);
-+
-+	return 0;
-+}
-+
-+static int tpu_remove(struct platform_device *pdev)
-+{
-+	struct tpu_device *tpu = platform_get_drvdata(pdev);
-+	int ret;
-+
-+	ret = pwmchip_remove(&tpu->chip);
-+	if (ret)
-+		return ret;
-+
-+	pm_runtime_disable(&pdev->dev);
-+
-+	return 0;
-+}
-+
-+static struct platform_driver tpu_driver = {
-+	.probe		= tpu_probe,
-+	.remove		= tpu_remove,
-+	.driver		= {
-+		.name	= "renesas-tpu-pwm",
-+		.owner	= THIS_MODULE,
-+	}
-+};
-+
-+module_platform_driver(tpu_driver);
-+
-+MODULE_AUTHOR("Laurent Pinchart <laurent.pinchart@ideasonboard.com>");
-+MODULE_DESCRIPTION("Renesas TPU PWM Driver");
-+MODULE_LICENSE("GPL v2");
-diff --git a/include/linux/platform_data/pwm-renesas-tpu.h b/include/linux/platform_data/pwm-renesas-tpu.h
-new file mode 100644
-index 00000000..a7220b10
---- /dev/null
-+++ b/include/linux/platform_data/pwm-renesas-tpu.h
-@@ -0,0 +1,16 @@
-+#ifndef __PWM_RENESAS_TPU_H__
-+#define __PWM_RENESAS_TPU_H__
-+
-+#include <linux/pwm.h>
-+
-+#define TPU_CHANNEL_MAX		4
-+
-+struct tpu_pwm_channel_data {
-+	enum pwm_polarity polarity;
-+};
-+
-+struct tpu_pwm_platform_data {
-+	struct tpu_pwm_channel_data channels[TPU_CHANNEL_MAX];
-+};
-+
-+#endif /* __PWM_RENESAS_TPU_H__ */
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0037-include-dt-binding-input-create-a-DT-header-defining.patch b/patches.renesas/0037-include-dt-binding-input-create-a-DT-header-defining.patch
deleted file mode 100644
index 4d9d7c60c055d..0000000000000
--- a/patches.renesas/0037-include-dt-binding-input-create-a-DT-header-defining.patch
+++ /dev/null
@@ -1,558 +0,0 @@
-From ea4c177515a5ea03ba2d823a88bcd4e32369946c Mon Sep 17 00:00:00 2001
-From: Laxman Dewangan <ldewangan@nvidia.com>
-Date: Tue, 6 Aug 2013 19:42:49 +0530
-Subject: include: dt-binding: input: create a DT header defining key codes.
-
-Many of Key device tree bindings uses the constant number as key code
-which matches with kernel header key code and then comment as follows
-for reference/better readability:
-	linux,code = <102>; /* KEY_HOME */
-
-Create a DT header which defines all the key code so that DT key bindings
-can use it as follows:
-	linux,code = <KEY_HOME>;
-
-Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
-Reviewed-by: Stephen Warren <swarren@nvidia.com>
-Signed-off-by: Rob Herring <rob.herring@calxeda.com>
-(cherry picked from commit 8851b9f1625ce0858e9b1bb0ae4a57d4b43178b1)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- include/dt-bindings/input/input.h | 525 ++++++++++++++++++++++++++++++++++++++
- 1 file changed, 525 insertions(+)
- create mode 100644 include/dt-bindings/input/input.h
-
-diff --git a/include/dt-bindings/input/input.h b/include/dt-bindings/input/input.h
-new file mode 100644
-index 000000000000..042e7b3b6296
---- /dev/null
-+++ b/include/dt-bindings/input/input.h
-@@ -0,0 +1,525 @@
-+/*
-+ * This header provides constants for most input bindings.
-+ *
-+ * Most input bindings include key code, matrix key code format.
-+ * In most cases, key code and matrix key code format uses
-+ * the standard values/macro defined in this header.
-+ */
-+
-+#ifndef _DT_BINDINGS_INPUT_INPUT_H
-+#define _DT_BINDINGS_INPUT_INPUT_H
-+
-+#define KEY_RESERVED		0
-+#define KEY_ESC			1
-+#define KEY_1			2
-+#define KEY_2			3
-+#define KEY_3			4
-+#define KEY_4			5
-+#define KEY_5			6
-+#define KEY_6			7
-+#define KEY_7			8
-+#define KEY_8			9
-+#define KEY_9			10
-+#define KEY_0			11
-+#define KEY_MINUS		12
-+#define KEY_EQUAL		13
-+#define KEY_BACKSPACE		14
-+#define KEY_TAB			15
-+#define KEY_Q			16
-+#define KEY_W			17
-+#define KEY_E			18
-+#define KEY_R			19
-+#define KEY_T			20
-+#define KEY_Y			21
-+#define KEY_U			22
-+#define KEY_I			23
-+#define KEY_O			24
-+#define KEY_P			25
-+#define KEY_LEFTBRACE		26
-+#define KEY_RIGHTBRACE		27
-+#define KEY_ENTER		28
-+#define KEY_LEFTCTRL		29
-+#define KEY_A			30
-+#define KEY_S			31
-+#define KEY_D			32
-+#define KEY_F			33
-+#define KEY_G			34
-+#define KEY_H			35
-+#define KEY_J			36
-+#define KEY_K			37
-+#define KEY_L			38
-+#define KEY_SEMICOLON		39
-+#define KEY_APOSTROPHE		40
-+#define KEY_GRAVE		41
-+#define KEY_LEFTSHIFT		42
-+#define KEY_BACKSLASH		43
-+#define KEY_Z			44
-+#define KEY_X			45
-+#define KEY_C			46
-+#define KEY_V			47
-+#define KEY_B			48
-+#define KEY_N			49
-+#define KEY_M			50
-+#define KEY_COMMA		51
-+#define KEY_DOT			52
-+#define KEY_SLASH		53
-+#define KEY_RIGHTSHIFT		54
-+#define KEY_KPASTERISK		55
-+#define KEY_LEFTALT		56
-+#define KEY_SPACE		57
-+#define KEY_CAPSLOCK		58
-+#define KEY_F1			59
-+#define KEY_F2			60
-+#define KEY_F3			61
-+#define KEY_F4			62
-+#define KEY_F5			63
-+#define KEY_F6			64
-+#define KEY_F7			65
-+#define KEY_F8			66
-+#define KEY_F9			67
-+#define KEY_F10			68
-+#define KEY_NUMLOCK		69
-+#define KEY_SCROLLLOCK		70
-+#define KEY_KP7			71
-+#define KEY_KP8			72
-+#define KEY_KP9			73
-+#define KEY_KPMINUS		74
-+#define KEY_KP4			75
-+#define KEY_KP5			76
-+#define KEY_KP6			77
-+#define KEY_KPPLUS		78
-+#define KEY_KP1			79
-+#define KEY_KP2			80
-+#define KEY_KP3			81
-+#define KEY_KP0			82
-+#define KEY_KPDOT		83
-+
-+#define KEY_ZENKAKUHANKAKU	85
-+#define KEY_102ND		86
-+#define KEY_F11			87
-+#define KEY_F12			88
-+#define KEY_RO			89
-+#define KEY_KATAKANA		90
-+#define KEY_HIRAGANA		91
-+#define KEY_HENKAN		92
-+#define KEY_KATAKANAHIRAGANA	93
-+#define KEY_MUHENKAN		94
-+#define KEY_KPJPCOMMA		95
-+#define KEY_KPENTER		96
-+#define KEY_RIGHTCTRL		97
-+#define KEY_KPSLASH		98
-+#define KEY_SYSRQ		99
-+#define KEY_RIGHTALT		100
-+#define KEY_LINEFEED		101
-+#define KEY_HOME		102
-+#define KEY_UP			103
-+#define KEY_PAGEUP		104
-+#define KEY_LEFT		105
-+#define KEY_RIGHT		106
-+#define KEY_END			107
-+#define KEY_DOWN		108
-+#define KEY_PAGEDOWN		109
-+#define KEY_INSERT		110
-+#define KEY_DELETE		111
-+#define KEY_MACRO		112
-+#define KEY_MUTE		113
-+#define KEY_VOLUMEDOWN		114
-+#define KEY_VOLUMEUP		115
-+#define KEY_POWER		116	/* SC System Power Down */
-+#define KEY_KPEQUAL		117
-+#define KEY_KPPLUSMINUS		118
-+#define KEY_PAUSE		119
-+#define KEY_SCALE		120	/* AL Compiz Scale (Expose) */
-+
-+#define KEY_KPCOMMA		121
-+#define KEY_HANGEUL		122
-+#define KEY_HANGUEL		KEY_HANGEUL
-+#define KEY_HANJA		123
-+#define KEY_YEN			124
-+#define KEY_LEFTMETA		125
-+#define KEY_RIGHTMETA		126
-+#define KEY_COMPOSE		127
-+
-+#define KEY_STOP		128	/* AC Stop */
-+#define KEY_AGAIN		129
-+#define KEY_PROPS		130	/* AC Properties */
-+#define KEY_UNDO		131	/* AC Undo */
-+#define KEY_FRONT		132
-+#define KEY_COPY		133	/* AC Copy */
-+#define KEY_OPEN		134	/* AC Open */
-+#define KEY_PASTE		135	/* AC Paste */
-+#define KEY_FIND		136	/* AC Search */
-+#define KEY_CUT			137	/* AC Cut */
-+#define KEY_HELP		138	/* AL Integrated Help Center */
-+#define KEY_MENU		139	/* Menu (show menu) */
-+#define KEY_CALC		140	/* AL Calculator */
-+#define KEY_SETUP		141
-+#define KEY_SLEEP		142	/* SC System Sleep */
-+#define KEY_WAKEUP		143	/* System Wake Up */
-+#define KEY_FILE		144	/* AL Local Machine Browser */
-+#define KEY_SENDFILE		145
-+#define KEY_DELETEFILE		146
-+#define KEY_XFER		147
-+#define KEY_PROG1		148
-+#define KEY_PROG2		149
-+#define KEY_WWW			150	/* AL Internet Browser */
-+#define KEY_MSDOS		151
-+#define KEY_COFFEE		152	/* AL Terminal Lock/Screensaver */
-+#define KEY_SCREENLOCK		KEY_COFFEE
-+#define KEY_DIRECTION		153
-+#define KEY_CYCLEWINDOWS	154
-+#define KEY_MAIL		155
-+#define KEY_BOOKMARKS		156	/* AC Bookmarks */
-+#define KEY_COMPUTER		157
-+#define KEY_BACK		158	/* AC Back */
-+#define KEY_FORWARD		159	/* AC Forward */
-+#define KEY_CLOSECD		160
-+#define KEY_EJECTCD		161
-+#define KEY_EJECTCLOSECD	162
-+#define KEY_NEXTSONG		163
-+#define KEY_PLAYPAUSE		164
-+#define KEY_PREVIOUSSONG	165
-+#define KEY_STOPCD		166
-+#define KEY_RECORD		167
-+#define KEY_REWIND		168
-+#define KEY_PHONE		169	/* Media Select Telephone */
-+#define KEY_ISO			170
-+#define KEY_CONFIG		171	/* AL Consumer Control Configuration */
-+#define KEY_HOMEPAGE		172	/* AC Home */
-+#define KEY_REFRESH		173	/* AC Refresh */
-+#define KEY_EXIT		174	/* AC Exit */
-+#define KEY_MOVE		175
-+#define KEY_EDIT		176
-+#define KEY_SCROLLUP		177
-+#define KEY_SCROLLDOWN		178
-+#define KEY_KPLEFTPAREN		179
-+#define KEY_KPRIGHTPAREN	180
-+#define KEY_NEW			181	/* AC New */
-+#define KEY_REDO		182	/* AC Redo/Repeat */
-+
-+#define KEY_F13			183
-+#define KEY_F14			184
-+#define KEY_F15			185
-+#define KEY_F16			186
-+#define KEY_F17			187
-+#define KEY_F18			188
-+#define KEY_F19			189
-+#define KEY_F20			190
-+#define KEY_F21			191
-+#define KEY_F22			192
-+#define KEY_F23			193
-+#define KEY_F24			194
-+
-+#define KEY_PLAYCD		200
-+#define KEY_PAUSECD		201
-+#define KEY_PROG3		202
-+#define KEY_PROG4		203
-+#define KEY_DASHBOARD		204	/* AL Dashboard */
-+#define KEY_SUSPEND		205
-+#define KEY_CLOSE		206	/* AC Close */
-+#define KEY_PLAY		207
-+#define KEY_FASTFORWARD		208
-+#define KEY_BASSBOOST		209
-+#define KEY_PRINT		210	/* AC Print */
-+#define KEY_HP			211
-+#define KEY_CAMERA		212
-+#define KEY_SOUND		213
-+#define KEY_QUESTION		214
-+#define KEY_EMAIL		215
-+#define KEY_CHAT		216
-+#define KEY_SEARCH		217
-+#define KEY_CONNECT		218
-+#define KEY_FINANCE		219	/* AL Checkbook/Finance */
-+#define KEY_SPORT		220
-+#define KEY_SHOP		221
-+#define KEY_ALTERASE		222
-+#define KEY_CANCEL		223	/* AC Cancel */
-+#define KEY_BRIGHTNESSDOWN	224
-+#define KEY_BRIGHTNESSUP	225
-+#define KEY_MEDIA		226
-+
-+#define KEY_SWITCHVIDEOMODE	227	/* Cycle between available video
-+					   outputs (Monitor/LCD/TV-out/etc) */
-+#define KEY_KBDILLUMTOGGLE	228
-+#define KEY_KBDILLUMDOWN	229
-+#define KEY_KBDILLUMUP		230
-+
-+#define KEY_SEND		231	/* AC Send */
-+#define KEY_REPLY		232	/* AC Reply */
-+#define KEY_FORWARDMAIL		233	/* AC Forward Msg */
-+#define KEY_SAVE		234	/* AC Save */
-+#define KEY_DOCUMENTS		235
-+
-+#define KEY_BATTERY		236
-+
-+#define KEY_BLUETOOTH		237
-+#define KEY_WLAN		238
-+#define KEY_UWB			239
-+
-+#define KEY_UNKNOWN		240
-+
-+#define KEY_VIDEO_NEXT		241	/* drive next video source */
-+#define KEY_VIDEO_PREV		242	/* drive previous video source */
-+#define KEY_BRIGHTNESS_CYCLE	243	/* brightness up, after max is min */
-+#define KEY_BRIGHTNESS_ZERO	244	/* brightness off, use ambient */
-+#define KEY_DISPLAY_OFF		245	/* display device to off state */
-+
-+#define KEY_WIMAX		246
-+#define KEY_RFKILL		247	/* Key that controls all radios */
-+
-+#define KEY_MICMUTE		248	/* Mute / unmute the microphone */
-+
-+/* Code 255 is reserved for special needs of AT keyboard driver */
-+
-+#define BTN_MISC		0x100
-+#define BTN_0			0x100
-+#define BTN_1			0x101
-+#define BTN_2			0x102
-+#define BTN_3			0x103
-+#define BTN_4			0x104
-+#define BTN_5			0x105
-+#define BTN_6			0x106
-+#define BTN_7			0x107
-+#define BTN_8			0x108
-+#define BTN_9			0x109
-+
-+#define BTN_MOUSE		0x110
-+#define BTN_LEFT		0x110
-+#define BTN_RIGHT		0x111
-+#define BTN_MIDDLE		0x112
-+#define BTN_SIDE		0x113
-+#define BTN_EXTRA		0x114
-+#define BTN_FORWARD		0x115
-+#define BTN_BACK		0x116
-+#define BTN_TASK		0x117
-+
-+#define BTN_JOYSTICK		0x120
-+#define BTN_TRIGGER		0x120
-+#define BTN_THUMB		0x121
-+#define BTN_THUMB2		0x122
-+#define BTN_TOP			0x123
-+#define BTN_TOP2		0x124
-+#define BTN_PINKIE		0x125
-+#define BTN_BASE		0x126
-+#define BTN_BASE2		0x127
-+#define BTN_BASE3		0x128
-+#define BTN_BASE4		0x129
-+#define BTN_BASE5		0x12a
-+#define BTN_BASE6		0x12b
-+#define BTN_DEAD		0x12f
-+
-+#define BTN_GAMEPAD		0x130
-+#define BTN_SOUTH		0x130
-+#define BTN_A			BTN_SOUTH
-+#define BTN_EAST		0x131
-+#define BTN_B			BTN_EAST
-+#define BTN_C			0x132
-+#define BTN_NORTH		0x133
-+#define BTN_X			BTN_NORTH
-+#define BTN_WEST		0x134
-+#define BTN_Y			BTN_WEST
-+#define BTN_Z			0x135
-+#define BTN_TL			0x136
-+#define BTN_TR			0x137
-+#define BTN_TL2			0x138
-+#define BTN_TR2			0x139
-+#define BTN_SELECT		0x13a
-+#define BTN_START		0x13b
-+#define BTN_MODE		0x13c
-+#define BTN_THUMBL		0x13d
-+#define BTN_THUMBR		0x13e
-+
-+#define BTN_DIGI		0x140
-+#define BTN_TOOL_PEN		0x140
-+#define BTN_TOOL_RUBBER		0x141
-+#define BTN_TOOL_BRUSH		0x142
-+#define BTN_TOOL_PENCIL		0x143
-+#define BTN_TOOL_AIRBRUSH	0x144
-+#define BTN_TOOL_FINGER		0x145
-+#define BTN_TOOL_MOUSE		0x146
-+#define BTN_TOOL_LENS		0x147
-+#define BTN_TOOL_QUINTTAP	0x148	/* Five fingers on trackpad */
-+#define BTN_TOUCH		0x14a
-+#define BTN_STYLUS		0x14b
-+#define BTN_STYLUS2		0x14c
-+#define BTN_TOOL_DOUBLETAP	0x14d
-+#define BTN_TOOL_TRIPLETAP	0x14e
-+#define BTN_TOOL_QUADTAP	0x14f	/* Four fingers on trackpad */
-+
-+#define BTN_WHEEL		0x150
-+#define BTN_GEAR_DOWN		0x150
-+#define BTN_GEAR_UP		0x151
-+
-+#define KEY_OK			0x160
-+#define KEY_SELECT		0x161
-+#define KEY_GOTO		0x162
-+#define KEY_CLEAR		0x163
-+#define KEY_POWER2		0x164
-+#define KEY_OPTION		0x165
-+#define KEY_INFO		0x166	/* AL OEM Features/Tips/Tutorial */
-+#define KEY_TIME		0x167
-+#define KEY_VENDOR		0x168
-+#define KEY_ARCHIVE		0x169
-+#define KEY_PROGRAM		0x16a	/* Media Select Program Guide */
-+#define KEY_CHANNEL		0x16b
-+#define KEY_FAVORITES		0x16c
-+#define KEY_EPG			0x16d
-+#define KEY_PVR			0x16e	/* Media Select Home */
-+#define KEY_MHP			0x16f
-+#define KEY_LANGUAGE		0x170
-+#define KEY_TITLE		0x171
-+#define KEY_SUBTITLE		0x172
-+#define KEY_ANGLE		0x173
-+#define KEY_ZOOM		0x174
-+#define KEY_MODE		0x175
-+#define KEY_KEYBOARD		0x176
-+#define KEY_SCREEN		0x177
-+#define KEY_PC			0x178	/* Media Select Computer */
-+#define KEY_TV			0x179	/* Media Select TV */
-+#define KEY_TV2			0x17a	/* Media Select Cable */
-+#define KEY_VCR			0x17b	/* Media Select VCR */
-+#define KEY_VCR2		0x17c	/* VCR Plus */
-+#define KEY_SAT			0x17d	/* Media Select Satellite */
-+#define KEY_SAT2		0x17e
-+#define KEY_CD			0x17f	/* Media Select CD */
-+#define KEY_TAPE		0x180	/* Media Select Tape */
-+#define KEY_RADIO		0x181
-+#define KEY_TUNER		0x182	/* Media Select Tuner */
-+#define KEY_PLAYER		0x183
-+#define KEY_TEXT		0x184
-+#define KEY_DVD			0x185	/* Media Select DVD */
-+#define KEY_AUX			0x186
-+#define KEY_MP3			0x187
-+#define KEY_AUDIO		0x188	/* AL Audio Browser */
-+#define KEY_VIDEO		0x189	/* AL Movie Browser */
-+#define KEY_DIRECTORY		0x18a
-+#define KEY_LIST		0x18b
-+#define KEY_MEMO		0x18c	/* Media Select Messages */
-+#define KEY_CALENDAR		0x18d
-+#define KEY_RED			0x18e
-+#define KEY_GREEN		0x18f
-+#define KEY_YELLOW		0x190
-+#define KEY_BLUE		0x191
-+#define KEY_CHANNELUP		0x192	/* Channel Increment */
-+#define KEY_CHANNELDOWN		0x193	/* Channel Decrement */
-+#define KEY_FIRST		0x194
-+#define KEY_LAST		0x195	/* Recall Last */
-+#define KEY_AB			0x196
-+#define KEY_NEXT		0x197
-+#define KEY_RESTART		0x198
-+#define KEY_SLOW		0x199
-+#define KEY_SHUFFLE		0x19a
-+#define KEY_BREAK		0x19b
-+#define KEY_PREVIOUS		0x19c
-+#define KEY_DIGITS		0x19d
-+#define KEY_TEEN		0x19e
-+#define KEY_TWEN		0x19f
-+#define KEY_VIDEOPHONE		0x1a0	/* Media Select Video Phone */
-+#define KEY_GAMES		0x1a1	/* Media Select Games */
-+#define KEY_ZOOMIN		0x1a2	/* AC Zoom In */
-+#define KEY_ZOOMOUT		0x1a3	/* AC Zoom Out */
-+#define KEY_ZOOMRESET		0x1a4	/* AC Zoom */
-+#define KEY_WORDPROCESSOR	0x1a5	/* AL Word Processor */
-+#define KEY_EDITOR		0x1a6	/* AL Text Editor */
-+#define KEY_SPREADSHEET		0x1a7	/* AL Spreadsheet */
-+#define KEY_GRAPHICSEDITOR	0x1a8	/* AL Graphics Editor */
-+#define KEY_PRESENTATION	0x1a9	/* AL Presentation App */
-+#define KEY_DATABASE		0x1aa	/* AL Database App */
-+#define KEY_NEWS		0x1ab	/* AL Newsreader */
-+#define KEY_VOICEMAIL		0x1ac	/* AL Voicemail */
-+#define KEY_ADDRESSBOOK		0x1ad	/* AL Contacts/Address Book */
-+#define KEY_MESSENGER		0x1ae	/* AL Instant Messaging */
-+#define KEY_DISPLAYTOGGLE	0x1af	/* Turn display (LCD) on and off */
-+#define KEY_SPELLCHECK		0x1b0   /* AL Spell Check */
-+#define KEY_LOGOFF		0x1b1   /* AL Logoff */
-+
-+#define KEY_DOLLAR		0x1b2
-+#define KEY_EURO		0x1b3
-+
-+#define KEY_FRAMEBACK		0x1b4	/* Consumer - transport controls */
-+#define KEY_FRAMEFORWARD	0x1b5
-+#define KEY_CONTEXT_MENU	0x1b6	/* GenDesc - system context menu */
-+#define KEY_MEDIA_REPEAT	0x1b7	/* Consumer - transport control */
-+#define KEY_10CHANNELSUP	0x1b8	/* 10 channels up (10+) */
-+#define KEY_10CHANNELSDOWN	0x1b9	/* 10 channels down (10-) */
-+#define KEY_IMAGES		0x1ba	/* AL Image Browser */
-+
-+#define KEY_DEL_EOL		0x1c0
-+#define KEY_DEL_EOS		0x1c1
-+#define KEY_INS_LINE		0x1c2
-+#define KEY_DEL_LINE		0x1c3
-+
-+#define KEY_FN			0x1d0
-+#define KEY_FN_ESC		0x1d1
-+#define KEY_FN_F1		0x1d2
-+#define KEY_FN_F2		0x1d3
-+#define KEY_FN_F3		0x1d4
-+#define KEY_FN_F4		0x1d5
-+#define KEY_FN_F5		0x1d6
-+#define KEY_FN_F6		0x1d7
-+#define KEY_FN_F7		0x1d8
-+#define KEY_FN_F8		0x1d9
-+#define KEY_FN_F9		0x1da
-+#define KEY_FN_F10		0x1db
-+#define KEY_FN_F11		0x1dc
-+#define KEY_FN_F12		0x1dd
-+#define KEY_FN_1		0x1de
-+#define KEY_FN_2		0x1df
-+#define KEY_FN_D		0x1e0
-+#define KEY_FN_E		0x1e1
-+#define KEY_FN_F		0x1e2
-+#define KEY_FN_S		0x1e3
-+#define KEY_FN_B		0x1e4
-+
-+#define KEY_BRL_DOT1		0x1f1
-+#define KEY_BRL_DOT2		0x1f2
-+#define KEY_BRL_DOT3		0x1f3
-+#define KEY_BRL_DOT4		0x1f4
-+#define KEY_BRL_DOT5		0x1f5
-+#define KEY_BRL_DOT6		0x1f6
-+#define KEY_BRL_DOT7		0x1f7
-+#define KEY_BRL_DOT8		0x1f8
-+#define KEY_BRL_DOT9		0x1f9
-+#define KEY_BRL_DOT10		0x1fa
-+
-+#define KEY_NUMERIC_0		0x200	/* used by phones, remote controls, */
-+#define KEY_NUMERIC_1		0x201	/* and other keypads */
-+#define KEY_NUMERIC_2		0x202
-+#define KEY_NUMERIC_3		0x203
-+#define KEY_NUMERIC_4		0x204
-+#define KEY_NUMERIC_5		0x205
-+#define KEY_NUMERIC_6		0x206
-+#define KEY_NUMERIC_7		0x207
-+#define KEY_NUMERIC_8		0x208
-+#define KEY_NUMERIC_9		0x209
-+#define KEY_NUMERIC_STAR	0x20a
-+#define KEY_NUMERIC_POUND	0x20b
-+
-+#define KEY_CAMERA_FOCUS	0x210
-+#define KEY_WPS_BUTTON		0x211	/* WiFi Protected Setup key */
-+
-+#define KEY_TOUCHPAD_TOGGLE	0x212	/* Request switch touchpad on or off */
-+#define KEY_TOUCHPAD_ON		0x213
-+#define KEY_TOUCHPAD_OFF	0x214
-+
-+#define KEY_CAMERA_ZOOMIN	0x215
-+#define KEY_CAMERA_ZOOMOUT	0x216
-+#define KEY_CAMERA_UP		0x217
-+#define KEY_CAMERA_DOWN		0x218
-+#define KEY_CAMERA_LEFT		0x219
-+#define KEY_CAMERA_RIGHT	0x21a
-+
-+#define KEY_ATTENDANT_ON	0x21b
-+#define KEY_ATTENDANT_OFF	0x21c
-+#define KEY_ATTENDANT_TOGGLE	0x21d	/* Attendant call on or off */
-+#define KEY_LIGHTS_TOGGLE	0x21e	/* Reading light on or off */
-+
-+#define BTN_DPAD_UP		0x220
-+#define BTN_DPAD_DOWN		0x221
-+#define BTN_DPAD_LEFT		0x222
-+#define BTN_DPAD_RIGHT		0x223
-+
-+#define MATRIX_KEY(row, col, code)	\
-+	((((row) & 0xFF) << 24) | (((col) & 0xFF) << 16) | ((code) & 0xFFFF))
-+
-+#endif /* _DT_BINDINGS_INPUT_INPUT_H */
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0037-media-v4l-Renesas-R-Car-VSP1-driver.patch b/patches.renesas/0037-media-v4l-Renesas-R-Car-VSP1-driver.patch
deleted file mode 100644
index 8976b88e104fa..0000000000000
--- a/patches.renesas/0037-media-v4l-Renesas-R-Car-VSP1-driver.patch
+++ /dev/null
@@ -1,4121 +0,0 @@
-From 91e2b07fe3c6e8a907265953ba2b0d0dc37ba360 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 4 Jun 2013 11:22:30 -0300
-Subject: [media] v4l: Renesas R-Car VSP1 driver
-
-The VSP1 is a video processing engine that includes a blender, scalers,
-filters and statistics computation. Configurable data path routing logic
-allows ordering the internal blocks in a flexible way.
-Due to the configurable nature of the pipeline the driver implements the
-media controller API and doesn't use the V4L2 mem-to-mem framework, even
-though the device usually operates in memory to memory mode.
-Only the read pixel formatters, up/down scalers, write pixel formatters
-and LCDC interface are supported at this stage.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Sakari Ailus <sakari.ailus@iki.fi>
-Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
-(cherry picked from commit 26e0ca22c3b85b04f693dd0422f13a61846ccfa9)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-
-	drivers/media/platform/vsp1/vsp1_video.c
----
- drivers/media/platform/Kconfig            |   10 +
- drivers/media/platform/Makefile           |    2 +
- drivers/media/platform/vsp1/Makefile      |    5 +
- drivers/media/platform/vsp1/vsp1.h        |   73 ++
- drivers/media/platform/vsp1/vsp1_drv.c    |  492 +++++++++++++
- drivers/media/platform/vsp1/vsp1_entity.c |  181 +++++
- drivers/media/platform/vsp1/vsp1_entity.h |   68 ++
- drivers/media/platform/vsp1/vsp1_lif.c    |  238 +++++++
- drivers/media/platform/vsp1/vsp1_lif.h    |   37 +
- drivers/media/platform/vsp1/vsp1_regs.h   |  581 ++++++++++++++++
- drivers/media/platform/vsp1/vsp1_rpf.c    |  209 ++++++
- drivers/media/platform/vsp1/vsp1_rwpf.c   |  124 ++++
- drivers/media/platform/vsp1/vsp1_rwpf.h   |   53 ++
- drivers/media/platform/vsp1/vsp1_uds.c    |  346 ++++++++++
- drivers/media/platform/vsp1/vsp1_uds.h    |   40 ++
- drivers/media/platform/vsp1/vsp1_video.c  | 1071 +++++++++++++++++++++++++++++
- drivers/media/platform/vsp1/vsp1_video.h  |  144 ++++
- drivers/media/platform/vsp1/vsp1_wpf.c    |  233 +++++++
- include/linux/platform_data/vsp1.h        |   25 +
- 19 files changed, 3932 insertions(+)
- create mode 100644 drivers/media/platform/vsp1/Makefile
- create mode 100644 drivers/media/platform/vsp1/vsp1.h
- create mode 100644 drivers/media/platform/vsp1/vsp1_drv.c
- create mode 100644 drivers/media/platform/vsp1/vsp1_entity.c
- create mode 100644 drivers/media/platform/vsp1/vsp1_entity.h
- create mode 100644 drivers/media/platform/vsp1/vsp1_lif.c
- create mode 100644 drivers/media/platform/vsp1/vsp1_lif.h
- create mode 100644 drivers/media/platform/vsp1/vsp1_regs.h
- create mode 100644 drivers/media/platform/vsp1/vsp1_rpf.c
- create mode 100644 drivers/media/platform/vsp1/vsp1_rwpf.c
- create mode 100644 drivers/media/platform/vsp1/vsp1_rwpf.h
- create mode 100644 drivers/media/platform/vsp1/vsp1_uds.c
- create mode 100644 drivers/media/platform/vsp1/vsp1_uds.h
- create mode 100644 drivers/media/platform/vsp1/vsp1_video.c
- create mode 100644 drivers/media/platform/vsp1/vsp1_video.h
- create mode 100644 drivers/media/platform/vsp1/vsp1_wpf.c
- create mode 100644 include/linux/platform_data/vsp1.h
-
-diff --git a/drivers/media/platform/Kconfig b/drivers/media/platform/Kconfig
-index 0494d2769fd7..e4a3de5258b0 100644
---- a/drivers/media/platform/Kconfig
-+++ b/drivers/media/platform/Kconfig
-@@ -210,6 +210,16 @@ config VIDEO_SH_VEU
- 	    Support for the Video Engine Unit (VEU) on SuperH and
- 	    SH-Mobile SoCs.
- 
-+config VIDEO_RENESAS_VSP1
-+	tristate "Renesas VSP1 Video Processing Engine"
-+	depends on VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API
-+	select VIDEOBUF2_DMA_CONTIG
-+	---help---
-+	  This is a V4L2 driver for the Renesas VSP1 video processing engine.
-+
-+	  To compile this driver as a module, choose M here: the module
-+	  will be called vsp1.
-+
- endif # V4L_MEM2MEM_DRIVERS
- 
- menuconfig V4L_TEST_DRIVERS
-diff --git a/drivers/media/platform/Makefile b/drivers/media/platform/Makefile
-index eee28dd78d7d..4e4da482c522 100644
---- a/drivers/media/platform/Makefile
-+++ b/drivers/media/platform/Makefile
-@@ -46,6 +46,8 @@ obj-$(CONFIG_VIDEO_SH_VOU)		+= sh_vou.o
- 
- obj-$(CONFIG_SOC_CAMERA)		+= soc_camera/
- 
-+obj-$(CONFIG_VIDEO_RENESAS_VSP1)	+= vsp1/
-+
- obj-y	+= davinci/
- 
- obj-$(CONFIG_ARCH_OMAP)	+= omap/
-diff --git a/drivers/media/platform/vsp1/Makefile b/drivers/media/platform/vsp1/Makefile
-new file mode 100644
-index 000000000000..4da226169e15
---- /dev/null
-+++ b/drivers/media/platform/vsp1/Makefile
-@@ -0,0 +1,5 @@
-+vsp1-y					:= vsp1_drv.o vsp1_entity.o vsp1_video.o
-+vsp1-y					+= vsp1_rpf.o vsp1_rwpf.o vsp1_wpf.o
-+vsp1-y					+= vsp1_lif.o vsp1_uds.o
-+
-+obj-$(CONFIG_VIDEO_RENESAS_VSP1)	+= vsp1.o
-diff --git a/drivers/media/platform/vsp1/vsp1.h b/drivers/media/platform/vsp1/vsp1.h
-new file mode 100644
-index 000000000000..11ac94bec3a3
---- /dev/null
-+++ b/drivers/media/platform/vsp1/vsp1.h
-@@ -0,0 +1,73 @@
-+/*
-+ * vsp1.h  --  R-Car VSP1 Driver
-+ *
-+ * Copyright (C) 2013 Renesas Corporation
-+ *
-+ * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ */
-+#ifndef __VSP1_H__
-+#define __VSP1_H__
-+
-+#include <linux/io.h>
-+#include <linux/list.h>
-+#include <linux/mutex.h>
-+#include <linux/platform_data/vsp1.h>
-+
-+#include <media/media-device.h>
-+#include <media/v4l2-device.h>
-+#include <media/v4l2-subdev.h>
-+
-+#include "vsp1_regs.h"
-+
-+struct clk;
-+struct device;
-+
-+struct vsp1_platform_data;
-+struct vsp1_lif;
-+struct vsp1_rwpf;
-+struct vsp1_uds;
-+
-+#define VPS1_MAX_RPF		5
-+#define VPS1_MAX_UDS		3
-+#define VPS1_MAX_WPF		4
-+
-+struct vsp1_device {
-+	struct device *dev;
-+	struct vsp1_platform_data *pdata;
-+
-+	void __iomem *mmio;
-+	struct clk *clock;
-+
-+	struct mutex lock;
-+	int ref_count;
-+
-+	struct vsp1_lif *lif;
-+	struct vsp1_rwpf *rpf[VPS1_MAX_RPF];
-+	struct vsp1_uds *uds[VPS1_MAX_UDS];
-+	struct vsp1_rwpf *wpf[VPS1_MAX_WPF];
-+
-+	struct list_head entities;
-+
-+	struct v4l2_device v4l2_dev;
-+	struct media_device media_dev;
-+};
-+
-+struct vsp1_device *vsp1_device_get(struct vsp1_device *vsp1);
-+void vsp1_device_put(struct vsp1_device *vsp1);
-+
-+static inline u32 vsp1_read(struct vsp1_device *vsp1, u32 reg)
-+{
-+	return ioread32(vsp1->mmio + reg);
-+}
-+
-+static inline void vsp1_write(struct vsp1_device *vsp1, u32 reg, u32 data)
-+{
-+	iowrite32(data, vsp1->mmio + reg);
-+}
-+
-+#endif /* __VSP1_H__ */
-diff --git a/drivers/media/platform/vsp1/vsp1_drv.c b/drivers/media/platform/vsp1/vsp1_drv.c
-new file mode 100644
-index 000000000000..e58e49c88415
---- /dev/null
-+++ b/drivers/media/platform/vsp1/vsp1_drv.c
-@@ -0,0 +1,492 @@
-+/*
-+ * vsp1_drv.c  --  R-Car VSP1 Driver
-+ *
-+ * Copyright (C) 2013 Renesas Corporation
-+ *
-+ * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ */
-+
-+#include <linux/clk.h>
-+#include <linux/delay.h>
-+#include <linux/device.h>
-+#include <linux/interrupt.h>
-+#include <linux/module.h>
-+#include <linux/platform_device.h>
-+#include <linux/videodev2.h>
-+
-+#include "vsp1.h"
-+#include "vsp1_lif.h"
-+#include "vsp1_rwpf.h"
-+#include "vsp1_uds.h"
-+
-+/* -----------------------------------------------------------------------------
-+ * Interrupt Handling
-+ */
-+
-+static irqreturn_t vsp1_irq_handler(int irq, void *data)
-+{
-+	u32 mask = VI6_WFP_IRQ_STA_DFE | VI6_WFP_IRQ_STA_FRE;
-+	struct vsp1_device *vsp1 = data;
-+	irqreturn_t ret = IRQ_NONE;
-+	unsigned int i;
-+
-+	for (i = 0; i < VPS1_MAX_WPF; ++i) {
-+		struct vsp1_rwpf *wpf = vsp1->wpf[i];
-+		struct vsp1_pipeline *pipe;
-+		u32 status;
-+
-+		if (wpf == NULL)
-+			continue;
-+
-+		pipe = to_vsp1_pipeline(&wpf->entity.subdev.entity);
-+		status = vsp1_read(vsp1, VI6_WPF_IRQ_STA(i));
-+		vsp1_write(vsp1, VI6_WPF_IRQ_STA(i), ~status & mask);
-+
-+		if (status & VI6_WFP_IRQ_STA_FRE) {
-+			vsp1_pipeline_frame_end(pipe);
-+			ret = IRQ_HANDLED;
-+		}
-+	}
-+
-+	return ret;
-+}
-+
-+/* -----------------------------------------------------------------------------
-+ * Entities
-+ */
-+
-+/*
-+ * vsp1_create_links - Create links from all sources to the given sink
-+ *
-+ * This function creates media links from all valid sources to the given sink
-+ * pad. Links that would be invalid according to the VSP1 hardware capabilities
-+ * are skipped. Those include all links
-+ *
-+ * - from a UDS to a UDS (UDS entities can't be chained)
-+ * - from an entity to itself (no loops are allowed)
-+ */
-+static int vsp1_create_links(struct vsp1_device *vsp1, struct vsp1_entity *sink)
-+{
-+	struct media_entity *entity = &sink->subdev.entity;
-+	struct vsp1_entity *source;
-+	unsigned int pad;
-+	int ret;
-+
-+	list_for_each_entry(source, &vsp1->entities, list_dev) {
-+		u32 flags;
-+
-+		if (source->type == sink->type)
-+			continue;
-+
-+		if (source->type == VSP1_ENTITY_LIF ||
-+		    source->type == VSP1_ENTITY_WPF)
-+			continue;
-+
-+		flags = source->type == VSP1_ENTITY_RPF &&
-+			sink->type == VSP1_ENTITY_WPF &&
-+			source->index == sink->index
-+		      ? MEDIA_LNK_FL_ENABLED : 0;
-+
-+		for (pad = 0; pad < entity->num_pads; ++pad) {
-+			if (!(entity->pads[pad].flags & MEDIA_PAD_FL_SINK))
-+				continue;
-+
-+			ret = media_entity_create_link(&source->subdev.entity,
-+						       source->source_pad,
-+						       entity, pad, flags);
-+			if (ret < 0)
-+				return ret;
-+		}
-+	}
-+
-+	return 0;
-+}
-+
-+static void vsp1_destroy_entities(struct vsp1_device *vsp1)
-+{
-+	struct vsp1_entity *entity;
-+	struct vsp1_entity *next;
-+
-+	list_for_each_entry_safe(entity, next, &vsp1->entities, list_dev) {
-+		list_del(&entity->list_dev);
-+		vsp1_entity_destroy(entity);
-+	}
-+
-+	v4l2_device_unregister(&vsp1->v4l2_dev);
-+	media_device_unregister(&vsp1->media_dev);
-+}
-+
-+static int vsp1_create_entities(struct vsp1_device *vsp1)
-+{
-+	struct media_device *mdev = &vsp1->media_dev;
-+	struct v4l2_device *vdev = &vsp1->v4l2_dev;
-+	struct vsp1_entity *entity;
-+	unsigned int i;
-+	int ret;
-+
-+	mdev->dev = vsp1->dev;
-+	strlcpy(mdev->model, "VSP1", sizeof(mdev->model));
-+	ret = media_device_register(mdev);
-+	if (ret < 0) {
-+		dev_err(vsp1->dev, "media device registration failed (%d)\n",
-+			ret);
-+		return ret;
-+	}
-+
-+	vdev->mdev = mdev;
-+	ret = v4l2_device_register(vsp1->dev, vdev);
-+	if (ret < 0) {
-+		dev_err(vsp1->dev, "V4L2 device registration failed (%d)\n",
-+			ret);
-+		goto done;
-+	}
-+
-+	/* Instantiate all the entities. */
-+	if (vsp1->pdata->features & VSP1_HAS_LIF) {
-+		vsp1->lif = vsp1_lif_create(vsp1);
-+		if (IS_ERR(vsp1->lif)) {
-+			ret = PTR_ERR(vsp1->lif);
-+			goto done;
-+		}
-+
-+		list_add_tail(&vsp1->lif->entity.list_dev, &vsp1->entities);
-+	}
-+
-+	for (i = 0; i < vsp1->pdata->rpf_count; ++i) {
-+		struct vsp1_rwpf *rpf;
-+
-+		rpf = vsp1_rpf_create(vsp1, i);
-+		if (IS_ERR(rpf)) {
-+			ret = PTR_ERR(rpf);
-+			goto done;
-+		}
-+
-+		vsp1->rpf[i] = rpf;
-+		list_add_tail(&rpf->entity.list_dev, &vsp1->entities);
-+	}
-+
-+	for (i = 0; i < vsp1->pdata->uds_count; ++i) {
-+		struct vsp1_uds *uds;
-+
-+		uds = vsp1_uds_create(vsp1, i);
-+		if (IS_ERR(uds)) {
-+			ret = PTR_ERR(uds);
-+			goto done;
-+		}
-+
-+		vsp1->uds[i] = uds;
-+		list_add_tail(&uds->entity.list_dev, &vsp1->entities);
-+	}
-+
-+	for (i = 0; i < vsp1->pdata->wpf_count; ++i) {
-+		struct vsp1_rwpf *wpf;
-+
-+		wpf = vsp1_wpf_create(vsp1, i);
-+		if (IS_ERR(wpf)) {
-+			ret = PTR_ERR(wpf);
-+			goto done;
-+		}
-+
-+		vsp1->wpf[i] = wpf;
-+		list_add_tail(&wpf->entity.list_dev, &vsp1->entities);
-+	}
-+
-+	/* Create links. */
-+	list_for_each_entry(entity, &vsp1->entities, list_dev) {
-+		if (entity->type == VSP1_ENTITY_LIF ||
-+		    entity->type == VSP1_ENTITY_RPF)
-+			continue;
-+
-+		ret = vsp1_create_links(vsp1, entity);
-+		if (ret < 0)
-+			goto done;
-+	}
-+
-+	if (vsp1->pdata->features & VSP1_HAS_LIF) {
-+		ret = media_entity_create_link(
-+			&vsp1->wpf[0]->entity.subdev.entity, RWPF_PAD_SOURCE,
-+			&vsp1->lif->entity.subdev.entity, LIF_PAD_SINK, 0);
-+		if (ret < 0)
-+			return ret;
-+	}
-+
-+	/* Register all subdevs. */
-+	list_for_each_entry(entity, &vsp1->entities, list_dev) {
-+		ret = v4l2_device_register_subdev(&vsp1->v4l2_dev,
-+						  &entity->subdev);
-+		if (ret < 0)
-+			goto done;
-+	}
-+
-+	ret = v4l2_device_register_subdev_nodes(&vsp1->v4l2_dev);
-+
-+done:
-+	if (ret < 0)
-+		vsp1_destroy_entities(vsp1);
-+
-+	return ret;
-+}
-+
-+static int vsp1_device_init(struct vsp1_device *vsp1)
-+{
-+	unsigned int i;
-+	u32 status;
-+
-+	/* Reset any channel that might be running. */
-+	status = vsp1_read(vsp1, VI6_STATUS);
-+
-+	for (i = 0; i < VPS1_MAX_WPF; ++i) {
-+		unsigned int timeout;
-+
-+		if (!(status & VI6_STATUS_SYS_ACT(i)))
-+			continue;
-+
-+		vsp1_write(vsp1, VI6_SRESET, VI6_SRESET_SRTS(i));
-+		for (timeout = 10; timeout > 0; --timeout) {
-+			status = vsp1_read(vsp1, VI6_STATUS);
-+			if (!(status & VI6_STATUS_SYS_ACT(i)))
-+				break;
-+
-+			usleep_range(1000, 2000);
-+		}
-+
-+		if (!timeout) {
-+			dev_err(vsp1->dev, "failed to reset wpf.%u\n", i);
-+			return -ETIMEDOUT;
-+		}
-+	}
-+
-+	vsp1_write(vsp1, VI6_CLK_DCSWT, (8 << VI6_CLK_DCSWT_CSTPW_SHIFT) |
-+		   (8 << VI6_CLK_DCSWT_CSTRW_SHIFT));
-+
-+	for (i = 0; i < VPS1_MAX_RPF; ++i)
-+		vsp1_write(vsp1, VI6_DPR_RPF_ROUTE(i), VI6_DPR_NODE_UNUSED);
-+
-+	for (i = 0; i < VPS1_MAX_UDS; ++i)
-+		vsp1_write(vsp1, VI6_DPR_UDS_ROUTE(i), VI6_DPR_NODE_UNUSED);
-+
-+	vsp1_write(vsp1, VI6_DPR_SRU_ROUTE, VI6_DPR_NODE_UNUSED);
-+	vsp1_write(vsp1, VI6_DPR_LUT_ROUTE, VI6_DPR_NODE_UNUSED);
-+	vsp1_write(vsp1, VI6_DPR_CLU_ROUTE, VI6_DPR_NODE_UNUSED);
-+	vsp1_write(vsp1, VI6_DPR_HST_ROUTE, VI6_DPR_NODE_UNUSED);
-+	vsp1_write(vsp1, VI6_DPR_HSI_ROUTE, VI6_DPR_NODE_UNUSED);
-+	vsp1_write(vsp1, VI6_DPR_BRU_ROUTE, VI6_DPR_NODE_UNUSED);
-+
-+	vsp1_write(vsp1, VI6_DPR_HGO_SMPPT, (7 << VI6_DPR_SMPPT_TGW_SHIFT) |
-+		   (VI6_DPR_NODE_UNUSED << VI6_DPR_SMPPT_PT_SHIFT));
-+	vsp1_write(vsp1, VI6_DPR_HGT_SMPPT, (7 << VI6_DPR_SMPPT_TGW_SHIFT) |
-+		   (VI6_DPR_NODE_UNUSED << VI6_DPR_SMPPT_PT_SHIFT));
-+
-+	return 0;
-+}
-+
-+/*
-+ * vsp1_device_get - Acquire the VSP1 device
-+ *
-+ * Increment the VSP1 reference count and initialize the device if the first
-+ * reference is taken.
-+ *
-+ * Return a pointer to the VSP1 device or NULL if an error occured.
-+ */
-+struct vsp1_device *vsp1_device_get(struct vsp1_device *vsp1)
-+{
-+	struct vsp1_device *__vsp1 = vsp1;
-+	int ret;
-+
-+	mutex_lock(&vsp1->lock);
-+	if (vsp1->ref_count > 0)
-+		goto done;
-+
-+	ret = clk_prepare_enable(vsp1->clock);
-+	if (ret < 0) {
-+		__vsp1 = NULL;
-+		goto done;
-+	}
-+
-+	ret = vsp1_device_init(vsp1);
-+	if (ret < 0) {
-+		clk_disable_unprepare(vsp1->clock);
-+		__vsp1 = NULL;
-+		goto done;
-+	}
-+
-+done:
-+	if (__vsp1)
-+		vsp1->ref_count++;
-+
-+	mutex_unlock(&vsp1->lock);
-+	return __vsp1;
-+}
-+
-+/*
-+ * vsp1_device_put - Release the VSP1 device
-+ *
-+ * Decrement the VSP1 reference count and cleanup the device if the last
-+ * reference is released.
-+ */
-+void vsp1_device_put(struct vsp1_device *vsp1)
-+{
-+	mutex_lock(&vsp1->lock);
-+
-+	if (--vsp1->ref_count == 0)
-+		clk_disable_unprepare(vsp1->clock);
-+
-+	mutex_unlock(&vsp1->lock);
-+}
-+
-+/* -----------------------------------------------------------------------------
-+ * Power Management
-+ */
-+
-+#ifdef CONFIG_PM_SLEEP
-+static int vsp1_pm_suspend(struct device *dev)
-+{
-+	struct vsp1_device *vsp1 = dev_get_drvdata(dev);
-+
-+	WARN_ON(mutex_is_locked(&vsp1->lock));
-+
-+	if (vsp1->ref_count == 0)
-+		return 0;
-+
-+	clk_disable_unprepare(vsp1->clock);
-+	return 0;
-+}
-+
-+static int vsp1_pm_resume(struct device *dev)
-+{
-+	struct vsp1_device *vsp1 = dev_get_drvdata(dev);
-+
-+	WARN_ON(mutex_is_locked(&vsp1->lock));
-+
-+	if (vsp1->ref_count)
-+		return 0;
-+
-+	return clk_prepare_enable(vsp1->clock);
-+}
-+#endif
-+
-+static const struct dev_pm_ops vsp1_pm_ops = {
-+	SET_SYSTEM_SLEEP_PM_OPS(vsp1_pm_suspend, vsp1_pm_resume)
-+};
-+
-+/* -----------------------------------------------------------------------------
-+ * Platform Driver
-+ */
-+
-+static struct vsp1_platform_data *
-+vsp1_get_platform_data(struct platform_device *pdev)
-+{
-+	struct vsp1_platform_data *pdata = pdev->dev.platform_data;
-+
-+	if (pdata == NULL) {
-+		dev_err(&pdev->dev, "missing platform data\n");
-+		return NULL;
-+	}
-+
-+	if (pdata->rpf_count <= 0 || pdata->rpf_count > VPS1_MAX_RPF) {
-+		dev_err(&pdev->dev, "invalid number of RPF (%u)\n",
-+			pdata->rpf_count);
-+		return NULL;
-+	}
-+
-+	if (pdata->uds_count <= 0 || pdata->uds_count > VPS1_MAX_UDS) {
-+		dev_err(&pdev->dev, "invalid number of UDS (%u)\n",
-+			pdata->uds_count);
-+		return NULL;
-+	}
-+
-+	if (pdata->wpf_count <= 0 || pdata->wpf_count > VPS1_MAX_WPF) {
-+		dev_err(&pdev->dev, "invalid number of WPF (%u)\n",
-+			pdata->wpf_count);
-+		return NULL;
-+	}
-+
-+	return pdata;
-+}
-+
-+static int vsp1_probe(struct platform_device *pdev)
-+{
-+	struct vsp1_device *vsp1;
-+	struct resource *irq;
-+	struct resource *io;
-+	int ret;
-+
-+	vsp1 = devm_kzalloc(&pdev->dev, sizeof(*vsp1), GFP_KERNEL);
-+	if (vsp1 == NULL)
-+		return -ENOMEM;
-+
-+	vsp1->dev = &pdev->dev;
-+	mutex_init(&vsp1->lock);
-+	INIT_LIST_HEAD(&vsp1->entities);
-+
-+	vsp1->pdata = vsp1_get_platform_data(pdev);
-+	if (vsp1->pdata == NULL)
-+		return -ENODEV;
-+
-+	/* I/O, IRQ and clock resources */
-+	io = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+	vsp1->mmio = devm_ioremap_resource(&pdev->dev, io);
-+	if (IS_ERR((void *)vsp1->mmio))
-+		return PTR_ERR((void *)vsp1->mmio);
-+
-+	vsp1->clock = devm_clk_get(&pdev->dev, NULL);
-+	if (IS_ERR(vsp1->clock)) {
-+		dev_err(&pdev->dev, "failed to get clock\n");
-+		return PTR_ERR(vsp1->clock);
-+	}
-+
-+	irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
-+	if (!irq) {
-+		dev_err(&pdev->dev, "missing IRQ\n");
-+		return -EINVAL;
-+	}
-+
-+	ret = devm_request_irq(&pdev->dev, irq->start, vsp1_irq_handler,
-+			      IRQF_SHARED, dev_name(&pdev->dev), vsp1);
-+	if (ret < 0) {
-+		dev_err(&pdev->dev, "failed to request IRQ\n");
-+		return ret;
-+	}
-+
-+	/* Instanciate entities */
-+	ret = vsp1_create_entities(vsp1);
-+	if (ret < 0) {
-+		dev_err(&pdev->dev, "failed to create entities\n");
-+		return ret;
-+	}
-+
-+	platform_set_drvdata(pdev, vsp1);
-+
-+	return 0;
-+}
-+
-+static int vsp1_remove(struct platform_device *pdev)
-+{
-+	struct vsp1_device *vsp1 = platform_get_drvdata(pdev);
-+
-+	vsp1_destroy_entities(vsp1);
-+
-+	return 0;
-+}
-+
-+static struct platform_driver vsp1_platform_driver = {
-+	.probe		= vsp1_probe,
-+	.remove		= vsp1_remove,
-+	.driver		= {
-+		.owner	= THIS_MODULE,
-+		.name	= "vsp1",
-+		.pm	= &vsp1_pm_ops,
-+	},
-+};
-+
-+module_platform_driver(vsp1_platform_driver);
-+
-+MODULE_ALIAS("vsp1");
-+MODULE_AUTHOR("Laurent Pinchart <laurent.pinchart@ideasonboard.com>");
-+MODULE_DESCRIPTION("Renesas VSP1 Driver");
-+MODULE_LICENSE("GPL");
-diff --git a/drivers/media/platform/vsp1/vsp1_entity.c b/drivers/media/platform/vsp1/vsp1_entity.c
-new file mode 100644
-index 000000000000..9028f9d524f4
---- /dev/null
-+++ b/drivers/media/platform/vsp1/vsp1_entity.c
-@@ -0,0 +1,181 @@
-+/*
-+ * vsp1_entity.c  --  R-Car VSP1 Base Entity
-+ *
-+ * Copyright (C) 2013 Renesas Corporation
-+ *
-+ * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ */
-+
-+#include <linux/device.h>
-+#include <linux/gfp.h>
-+
-+#include <media/media-entity.h>
-+#include <media/v4l2-subdev.h>
-+
-+#include "vsp1.h"
-+#include "vsp1_entity.h"
-+
-+/* -----------------------------------------------------------------------------
-+ * V4L2 Subdevice Operations
-+ */
-+
-+struct v4l2_mbus_framefmt *
-+vsp1_entity_get_pad_format(struct vsp1_entity *entity,
-+			   struct v4l2_subdev_fh *fh,
-+			   unsigned int pad, u32 which)
-+{
-+	switch (which) {
-+	case V4L2_SUBDEV_FORMAT_TRY:
-+		return v4l2_subdev_get_try_format(fh, pad);
-+	case V4L2_SUBDEV_FORMAT_ACTIVE:
-+		return &entity->formats[pad];
-+	default:
-+		return NULL;
-+	}
-+}
-+
-+/*
-+ * vsp1_entity_init_formats - Initialize formats on all pads
-+ * @subdev: V4L2 subdevice
-+ * @fh: V4L2 subdev file handle
-+ *
-+ * Initialize all pad formats with default values. If fh is not NULL, try
-+ * formats are initialized on the file handle. Otherwise active formats are
-+ * initialized on the device.
-+ */
-+void vsp1_entity_init_formats(struct v4l2_subdev *subdev,
-+			    struct v4l2_subdev_fh *fh)
-+{
-+	struct v4l2_subdev_format format;
-+	unsigned int pad;
-+
-+	for (pad = 0; pad < subdev->entity.num_pads - 1; ++pad) {
-+		memset(&format, 0, sizeof(format));
-+
-+		format.pad = pad;
-+		format.which = fh ? V4L2_SUBDEV_FORMAT_TRY
-+			     : V4L2_SUBDEV_FORMAT_ACTIVE;
-+
-+		v4l2_subdev_call(subdev, pad, set_fmt, fh, &format);
-+	}
-+}
-+
-+static int vsp1_entity_open(struct v4l2_subdev *subdev,
-+			    struct v4l2_subdev_fh *fh)
-+{
-+	vsp1_entity_init_formats(subdev, fh);
-+
-+	return 0;
-+}
-+
-+const struct v4l2_subdev_internal_ops vsp1_subdev_internal_ops = {
-+	.open = vsp1_entity_open,
-+};
-+
-+/* -----------------------------------------------------------------------------
-+ * Media Operations
-+ */
-+
-+static int vsp1_entity_link_setup(struct media_entity *entity,
-+				  const struct media_pad *local,
-+				  const struct media_pad *remote, u32 flags)
-+{
-+	struct vsp1_entity *source;
-+
-+	if (!(local->flags & MEDIA_PAD_FL_SOURCE))
-+		return 0;
-+
-+	source = container_of(local->entity, struct vsp1_entity, subdev.entity);
-+
-+	if (!source->route)
-+		return 0;
-+
-+	if (flags & MEDIA_LNK_FL_ENABLED) {
-+		if (source->sink)
-+			return -EBUSY;
-+		source->sink = remote->entity;
-+	} else {
-+		source->sink = NULL;
-+	}
-+
-+	return 0;
-+}
-+
-+const struct media_entity_operations vsp1_media_ops = {
-+	.link_setup = vsp1_entity_link_setup,
-+	.link_validate = v4l2_subdev_link_validate,
-+};
-+
-+/* -----------------------------------------------------------------------------
-+ * Initialization
-+ */
-+
-+int vsp1_entity_init(struct vsp1_device *vsp1, struct vsp1_entity *entity,
-+		     unsigned int num_pads)
-+{
-+	static const struct {
-+		unsigned int id;
-+		unsigned int reg;
-+	} routes[] = {
-+		{ VI6_DPR_NODE_LIF, 0 },
-+		{ VI6_DPR_NODE_RPF(0), VI6_DPR_RPF_ROUTE(0) },
-+		{ VI6_DPR_NODE_RPF(1), VI6_DPR_RPF_ROUTE(1) },
-+		{ VI6_DPR_NODE_RPF(2), VI6_DPR_RPF_ROUTE(2) },
-+		{ VI6_DPR_NODE_RPF(3), VI6_DPR_RPF_ROUTE(3) },
-+		{ VI6_DPR_NODE_RPF(4), VI6_DPR_RPF_ROUTE(4) },
-+		{ VI6_DPR_NODE_UDS(0), VI6_DPR_UDS_ROUTE(0) },
-+		{ VI6_DPR_NODE_UDS(1), VI6_DPR_UDS_ROUTE(1) },
-+		{ VI6_DPR_NODE_UDS(2), VI6_DPR_UDS_ROUTE(2) },
-+		{ VI6_DPR_NODE_WPF(0), 0 },
-+		{ VI6_DPR_NODE_WPF(1), 0 },
-+		{ VI6_DPR_NODE_WPF(2), 0 },
-+		{ VI6_DPR_NODE_WPF(3), 0 },
-+	};
-+
-+	unsigned int i;
-+
-+	for (i = 0; i < ARRAY_SIZE(routes); ++i) {
-+		if (routes[i].id == entity->id) {
-+			entity->route = routes[i].reg;
-+			break;
-+		}
-+	}
-+
-+	if (i == ARRAY_SIZE(routes))
-+		return -EINVAL;
-+
-+	entity->vsp1 = vsp1;
-+	entity->source_pad = num_pads - 1;
-+
-+	/* Allocate formats and pads. */
-+	entity->formats = devm_kzalloc(vsp1->dev,
-+				       num_pads * sizeof(*entity->formats),
-+				       GFP_KERNEL);
-+	if (entity->formats == NULL)
-+		return -ENOMEM;
-+
-+	entity->pads = devm_kzalloc(vsp1->dev, num_pads * sizeof(*entity->pads),
-+				    GFP_KERNEL);
-+	if (entity->pads == NULL)
-+		return -ENOMEM;
-+
-+	/* Initialize pads. */
-+	for (i = 0; i < num_pads - 1; ++i)
-+		entity->pads[i].flags = MEDIA_PAD_FL_SINK;
-+
-+	entity->pads[num_pads - 1].flags = MEDIA_PAD_FL_SOURCE;
-+
-+	/* Initialize the media entity. */
-+	return media_entity_init(&entity->subdev.entity, num_pads,
-+				 entity->pads, 0);
-+}
-+
-+void vsp1_entity_destroy(struct vsp1_entity *entity)
-+{
-+	media_entity_cleanup(&entity->subdev.entity);
-+}
-diff --git a/drivers/media/platform/vsp1/vsp1_entity.h b/drivers/media/platform/vsp1/vsp1_entity.h
-new file mode 100644
-index 000000000000..c4feab2cbb81
---- /dev/null
-+++ b/drivers/media/platform/vsp1/vsp1_entity.h
-@@ -0,0 +1,68 @@
-+/*
-+ * vsp1_entity.h  --  R-Car VSP1 Base Entity
-+ *
-+ * Copyright (C) 2013 Renesas Corporation
-+ *
-+ * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ */
-+#ifndef __VSP1_ENTITY_H__
-+#define __VSP1_ENTITY_H__
-+
-+#include <linux/list.h>
-+
-+#include <media/v4l2-subdev.h>
-+
-+struct vsp1_device;
-+
-+enum vsp1_entity_type {
-+	VSP1_ENTITY_LIF,
-+	VSP1_ENTITY_RPF,
-+	VSP1_ENTITY_UDS,
-+	VSP1_ENTITY_WPF,
-+};
-+
-+struct vsp1_entity {
-+	struct vsp1_device *vsp1;
-+
-+	enum vsp1_entity_type type;
-+	unsigned int index;
-+	unsigned int id;
-+	unsigned int route;
-+
-+	struct list_head list_dev;
-+	struct list_head list_pipe;
-+
-+	struct media_pad *pads;
-+	unsigned int source_pad;
-+
-+	struct media_entity *sink;
-+
-+	struct v4l2_subdev subdev;
-+	struct v4l2_mbus_framefmt *formats;
-+};
-+
-+static inline struct vsp1_entity *to_vsp1_entity(struct v4l2_subdev *subdev)
-+{
-+	return container_of(subdev, struct vsp1_entity, subdev);
-+}
-+
-+int vsp1_entity_init(struct vsp1_device *vsp1, struct vsp1_entity *entity,
-+		     unsigned int num_pads);
-+void vsp1_entity_destroy(struct vsp1_entity *entity);
-+
-+extern const struct v4l2_subdev_internal_ops vsp1_subdev_internal_ops;
-+extern const struct media_entity_operations vsp1_media_ops;
-+
-+struct v4l2_mbus_framefmt *
-+vsp1_entity_get_pad_format(struct vsp1_entity *entity,
-+			   struct v4l2_subdev_fh *fh,
-+			   unsigned int pad, u32 which);
-+void vsp1_entity_init_formats(struct v4l2_subdev *subdev,
-+			      struct v4l2_subdev_fh *fh);
-+
-+#endif /* __VSP1_ENTITY_H__ */
-diff --git a/drivers/media/platform/vsp1/vsp1_lif.c b/drivers/media/platform/vsp1/vsp1_lif.c
-new file mode 100644
-index 000000000000..74a32e69ef10
---- /dev/null
-+++ b/drivers/media/platform/vsp1/vsp1_lif.c
-@@ -0,0 +1,238 @@
-+/*
-+ * vsp1_lif.c  --  R-Car VSP1 LCD Controller Interface
-+ *
-+ * Copyright (C) 2013 Renesas Corporation
-+ *
-+ * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ */
-+
-+#include <linux/device.h>
-+#include <linux/gfp.h>
-+
-+#include <media/v4l2-subdev.h>
-+
-+#include "vsp1.h"
-+#include "vsp1_lif.h"
-+
-+#define LIF_MIN_SIZE				2U
-+#define LIF_MAX_SIZE				2048U
-+
-+/* -----------------------------------------------------------------------------
-+ * Device Access
-+ */
-+
-+static inline u32 vsp1_lif_read(struct vsp1_lif *lif, u32 reg)
-+{
-+	return vsp1_read(lif->entity.vsp1, reg);
-+}
-+
-+static inline void vsp1_lif_write(struct vsp1_lif *lif, u32 reg, u32 data)
-+{
-+	vsp1_write(lif->entity.vsp1, reg, data);
-+}
-+
-+/* -----------------------------------------------------------------------------
-+ * V4L2 Subdevice Core Operations
-+ */
-+
-+static int lif_s_stream(struct v4l2_subdev *subdev, int enable)
-+{
-+	const struct v4l2_mbus_framefmt *format;
-+	struct vsp1_lif *lif = to_lif(subdev);
-+	unsigned int hbth = 1300;
-+	unsigned int obth = 400;
-+	unsigned int lbth = 200;
-+
-+	if (!enable) {
-+		vsp1_lif_write(lif, VI6_LIF_CTRL, 0);
-+		return 0;
-+	}
-+
-+	format = &lif->entity.formats[LIF_PAD_SOURCE];
-+
-+	obth = min(obth, (format->width + 1) / 2 * format->height - 4);
-+
-+	vsp1_lif_write(lif, VI6_LIF_CSBTH,
-+			(hbth << VI6_LIF_CSBTH_HBTH_SHIFT) |
-+			(lbth << VI6_LIF_CSBTH_LBTH_SHIFT));
-+
-+	vsp1_lif_write(lif, VI6_LIF_CTRL,
-+			(obth << VI6_LIF_CTRL_OBTH_SHIFT) |
-+			(format->code == 0 ? VI6_LIF_CTRL_CFMT : 0) |
-+			VI6_LIF_CTRL_REQSEL | VI6_LIF_CTRL_LIF_EN);
-+
-+	return 0;
-+}
-+
-+/* -----------------------------------------------------------------------------
-+ * V4L2 Subdevice Pad Operations
-+ */
-+
-+static int lif_enum_mbus_code(struct v4l2_subdev *subdev,
-+			      struct v4l2_subdev_fh *fh,
-+			      struct v4l2_subdev_mbus_code_enum *code)
-+{
-+	static const unsigned int codes[] = {
-+		V4L2_MBUS_FMT_ARGB8888_1X32,
-+		V4L2_MBUS_FMT_AYUV8_1X32,
-+	};
-+
-+	if (code->pad == LIF_PAD_SINK) {
-+		if (code->index >= ARRAY_SIZE(codes))
-+			return -EINVAL;
-+
-+		code->code = codes[code->index];
-+	} else {
-+		struct v4l2_mbus_framefmt *format;
-+
-+		/* The LIF can't perform format conversion, the sink format is
-+		 * always identical to the source format.
-+		 */
-+		if (code->index)
-+			return -EINVAL;
-+
-+		format = v4l2_subdev_get_try_format(fh, LIF_PAD_SINK);
-+		code->code = format->code;
-+	}
-+
-+	return 0;
-+}
-+
-+static int lif_enum_frame_size(struct v4l2_subdev *subdev,
-+			       struct v4l2_subdev_fh *fh,
-+			       struct v4l2_subdev_frame_size_enum *fse)
-+{
-+	struct v4l2_mbus_framefmt *format;
-+
-+	format = v4l2_subdev_get_try_format(fh, LIF_PAD_SINK);
-+
-+	if (fse->index || fse->code != format->code)
-+		return -EINVAL;
-+
-+	if (fse->pad == LIF_PAD_SINK) {
-+		fse->min_width = LIF_MIN_SIZE;
-+		fse->max_width = LIF_MAX_SIZE;
-+		fse->min_height = LIF_MIN_SIZE;
-+		fse->max_height = LIF_MAX_SIZE;
-+	} else {
-+		fse->min_width = format->width;
-+		fse->max_width = format->width;
-+		fse->min_height = format->height;
-+		fse->max_height = format->height;
-+	}
-+
-+	return 0;
-+}
-+
-+static int lif_get_format(struct v4l2_subdev *subdev, struct v4l2_subdev_fh *fh,
-+			  struct v4l2_subdev_format *fmt)
-+{
-+	struct vsp1_lif *lif = to_lif(subdev);
-+
-+	fmt->format = *vsp1_entity_get_pad_format(&lif->entity, fh, fmt->pad,
-+						  fmt->which);
-+
-+	return 0;
-+}
-+
-+static int lif_set_format(struct v4l2_subdev *subdev, struct v4l2_subdev_fh *fh,
-+			  struct v4l2_subdev_format *fmt)
-+{
-+	struct vsp1_lif *lif = to_lif(subdev);
-+	struct v4l2_mbus_framefmt *format;
-+
-+	/* Default to YUV if the requested format is not supported. */
-+	if (fmt->format.code != V4L2_MBUS_FMT_ARGB8888_1X32 &&
-+	    fmt->format.code != V4L2_MBUS_FMT_AYUV8_1X32)
-+		fmt->format.code = V4L2_MBUS_FMT_AYUV8_1X32;
-+
-+	format = vsp1_entity_get_pad_format(&lif->entity, fh, fmt->pad,
-+					    fmt->which);
-+
-+	if (fmt->pad == LIF_PAD_SOURCE) {
-+		/* The LIF source format is always identical to its sink
-+		 * format.
-+		 */
-+		fmt->format = *format;
-+		return 0;
-+	}
-+
-+	format->code = fmt->format.code;
-+	format->width = clamp_t(unsigned int, fmt->format.width,
-+				LIF_MIN_SIZE, LIF_MAX_SIZE);
-+	format->height = clamp_t(unsigned int, fmt->format.height,
-+				 LIF_MIN_SIZE, LIF_MAX_SIZE);
-+	format->field = V4L2_FIELD_NONE;
-+	format->colorspace = V4L2_COLORSPACE_SRGB;
-+
-+	fmt->format = *format;
-+
-+	/* Propagate the format to the source pad. */
-+	format = vsp1_entity_get_pad_format(&lif->entity, fh, LIF_PAD_SOURCE,
-+					    fmt->which);
-+	*format = fmt->format;
-+
-+	return 0;
-+}
-+
-+/* -----------------------------------------------------------------------------
-+ * V4L2 Subdevice Operations
-+ */
-+
-+static struct v4l2_subdev_video_ops lif_video_ops = {
-+	.s_stream = lif_s_stream,
-+};
-+
-+static struct v4l2_subdev_pad_ops lif_pad_ops = {
-+	.enum_mbus_code = lif_enum_mbus_code,
-+	.enum_frame_size = lif_enum_frame_size,
-+	.get_fmt = lif_get_format,
-+	.set_fmt = lif_set_format,
-+};
-+
-+static struct v4l2_subdev_ops lif_ops = {
-+	.video	= &lif_video_ops,
-+	.pad    = &lif_pad_ops,
-+};
-+
-+/* -----------------------------------------------------------------------------
-+ * Initialization and Cleanup
-+ */
-+
-+struct vsp1_lif *vsp1_lif_create(struct vsp1_device *vsp1)
-+{
-+	struct v4l2_subdev *subdev;
-+	struct vsp1_lif *lif;
-+	int ret;
-+
-+	lif = devm_kzalloc(vsp1->dev, sizeof(*lif), GFP_KERNEL);
-+	if (lif == NULL)
-+		return ERR_PTR(-ENOMEM);
-+
-+	lif->entity.type = VSP1_ENTITY_LIF;
-+	lif->entity.id = VI6_DPR_NODE_LIF;
-+
-+	ret = vsp1_entity_init(vsp1, &lif->entity, 2);
-+	if (ret < 0)
-+		return ERR_PTR(ret);
-+
-+	/* Initialize the V4L2 subdev. */
-+	subdev = &lif->entity.subdev;
-+	v4l2_subdev_init(subdev, &lif_ops);
-+
-+	subdev->entity.ops = &vsp1_media_ops;
-+	subdev->internal_ops = &vsp1_subdev_internal_ops;
-+	snprintf(subdev->name, sizeof(subdev->name), "%s lif",
-+		 dev_name(vsp1->dev));
-+	v4l2_set_subdevdata(subdev, lif);
-+	subdev->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
-+
-+	vsp1_entity_init_formats(subdev, NULL);
-+
-+	return lif;
-+}
-diff --git a/drivers/media/platform/vsp1/vsp1_lif.h b/drivers/media/platform/vsp1/vsp1_lif.h
-new file mode 100644
-index 000000000000..89b93af56fdc
---- /dev/null
-+++ b/drivers/media/platform/vsp1/vsp1_lif.h
-@@ -0,0 +1,37 @@
-+/*
-+ * vsp1_lif.h  --  R-Car VSP1 LCD Controller Interface
-+ *
-+ * Copyright (C) 2013 Renesas Corporation
-+ *
-+ * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ */
-+#ifndef __VSP1_LIF_H__
-+#define __VSP1_LIF_H__
-+
-+#include <media/media-entity.h>
-+#include <media/v4l2-subdev.h>
-+
-+#include "vsp1_entity.h"
-+
-+struct vsp1_device;
-+
-+#define LIF_PAD_SINK				0
-+#define LIF_PAD_SOURCE				1
-+
-+struct vsp1_lif {
-+	struct vsp1_entity entity;
-+};
-+
-+static inline struct vsp1_lif *to_lif(struct v4l2_subdev *subdev)
-+{
-+	return container_of(subdev, struct vsp1_lif, entity.subdev);
-+}
-+
-+struct vsp1_lif *vsp1_lif_create(struct vsp1_device *vsp1);
-+
-+#endif /* __VSP1_LIF_H__ */
-diff --git a/drivers/media/platform/vsp1/vsp1_regs.h b/drivers/media/platform/vsp1/vsp1_regs.h
-new file mode 100644
-index 000000000000..1d3304f1365b
---- /dev/null
-+++ b/drivers/media/platform/vsp1/vsp1_regs.h
-@@ -0,0 +1,581 @@
-+/*
-+ * vsp1_regs.h  --  R-Car VSP1 Registers Definitions
-+ *
-+ * Copyright (C) 2013 Renesas Electronics Corporation
-+ *
-+ * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2
-+ * as published by the Free Software Foundation.
-+ */
-+
-+#ifndef __VSP1_REGS_H__
-+#define __VSP1_REGS_H__
-+
-+/* -----------------------------------------------------------------------------
-+ * General Control Registers
-+ */
-+
-+#define VI6_CMD(n)			(0x0000 + (n) * 4)
-+#define VI6_CMD_STRCMD			(1 << 0)
-+
-+#define VI6_CLK_DCSWT			0x0018
-+#define VI6_CLK_DCSWT_CSTPW_MASK	(0xff << 8)
-+#define VI6_CLK_DCSWT_CSTPW_SHIFT	8
-+#define VI6_CLK_DCSWT_CSTRW_MASK	(0xff << 0)
-+#define VI6_CLK_DCSWT_CSTRW_SHIFT	0
-+
-+#define VI6_SRESET			0x0028
-+#define VI6_SRESET_SRTS(n)		(1 << (n))
-+
-+#define VI6_STATUS			0x0038
-+#define VI6_STATUS_SYS_ACT(n)		(1 << ((n) + 8))
-+
-+#define VI6_WPF_IRQ_ENB(n)		(0x0048 + (n) * 12)
-+#define VI6_WFP_IRQ_ENB_DFEE		(1 << 1)
-+#define VI6_WFP_IRQ_ENB_FREE		(1 << 0)
-+
-+#define VI6_WPF_IRQ_STA(n)		(0x004c + (n) * 12)
-+#define VI6_WFP_IRQ_STA_DFE		(1 << 1)
-+#define VI6_WFP_IRQ_STA_FRE		(1 << 0)
-+
-+#define VI6_DISP_IRQ_ENB		0x0078
-+#define VI6_DISP_IRQ_ENB_DSTE		(1 << 8)
-+#define VI6_DISP_IRQ_ENB_MAEE		(1 << 5)
-+#define VI6_DISP_IRQ_ENB_LNEE(n)	(1 << ((n) + 4))
-+
-+#define VI6_DISP_IRQ_STA		0x007c
-+#define VI6_DISP_IRQ_STA_DSE		(1 << 8)
-+#define VI6_DISP_IRQ_STA_MAE		(1 << 5)
-+#define VI6_DISP_IRQ_STA_LNE(n)		(1 << ((n) + 4))
-+
-+#define VI6_WPF_LINE_COUNT(n)		(0x0084 + (n) * 4)
-+#define VI6_WPF_LINE_COUNT_MASK		(0x1fffff << 0)
-+
-+/* -----------------------------------------------------------------------------
-+ * Display List Control Registers
-+ */
-+
-+#define VI6_DL_CTRL			0x0100
-+#define VI6_DL_CTRL_AR_WAIT_MASK	(0xffff << 16)
-+#define VI6_DL_CTRL_AR_WAIT_SHIFT	16
-+#define VI6_DL_CTRL_DC2			(1 << 12)
-+#define VI6_DL_CTRL_DC1			(1 << 8)
-+#define VI6_DL_CTRL_DC0			(1 << 4)
-+#define VI6_DL_CTRL_CFM0		(1 << 2)
-+#define VI6_DL_CTRL_NH0			(1 << 1)
-+#define VI6_DL_CTRL_DLE			(1 << 0)
-+
-+#define VI6_DL_HDR_ADDR(n)		(0x0104 + (n) * 4)
-+
-+#define VI6_DL_SWAP			0x0114
-+#define VI6_DL_SWAP_LWS			(1 << 2)
-+#define VI6_DL_SWAP_WDS			(1 << 1)
-+#define VI6_DL_SWAP_BTS			(1 << 0)
-+
-+#define VI6_DL_EXT_CTRL			0x011c
-+#define VI6_DL_EXT_CTRL_NWE		(1 << 16)
-+#define VI6_DL_EXT_CTRL_POLINT_MASK	(0x3f << 8)
-+#define VI6_DL_EXT_CTRL_POLINT_SHIFT	8
-+#define VI6_DL_EXT_CTRL_DLPRI		(1 << 5)
-+#define VI6_DL_EXT_CTRL_EXPRI		(1 << 4)
-+#define VI6_DL_EXT_CTRL_EXT		(1 << 0)
-+
-+#define VI6_DL_BODY_SIZE		0x0120
-+#define VI6_DL_BODY_SIZE_UPD		(1 << 24)
-+#define VI6_DL_BODY_SIZE_BS_MASK	(0x1ffff << 0)
-+#define VI6_DL_BODY_SIZE_BS_SHIFT	0
-+
-+/* -----------------------------------------------------------------------------
-+ * RPF Control Registers
-+ */
-+
-+#define VI6_RPF_OFFSET			0x100
-+
-+#define VI6_RPF_SRC_BSIZE		0x0300
-+#define VI6_RPF_SRC_BSIZE_BHSIZE_MASK	(0x1fff << 16)
-+#define VI6_RPF_SRC_BSIZE_BHSIZE_SHIFT	16
-+#define VI6_RPF_SRC_BSIZE_BVSIZE_MASK	(0x1fff << 0)
-+#define VI6_RPF_SRC_BSIZE_BVSIZE_SHIFT	0
-+
-+#define VI6_RPF_SRC_ESIZE		0x0304
-+#define VI6_RPF_SRC_ESIZE_EHSIZE_MASK	(0x1fff << 16)
-+#define VI6_RPF_SRC_ESIZE_EHSIZE_SHIFT	16
-+#define VI6_RPF_SRC_ESIZE_EVSIZE_MASK	(0x1fff << 0)
-+#define VI6_RPF_SRC_ESIZE_EVSIZE_SHIFT	0
-+
-+#define VI6_RPF_INFMT			0x0308
-+#define VI6_RPF_INFMT_VIR		(1 << 28)
-+#define VI6_RPF_INFMT_CIPM		(1 << 16)
-+#define VI6_RPF_INFMT_SPYCS		(1 << 15)
-+#define VI6_RPF_INFMT_SPUVS		(1 << 14)
-+#define VI6_RPF_INFMT_CEXT_ZERO		(0 << 12)
-+#define VI6_RPF_INFMT_CEXT_EXT		(1 << 12)
-+#define VI6_RPF_INFMT_CEXT_ONE		(2 << 12)
-+#define VI6_RPF_INFMT_CEXT_MASK		(3 << 12)
-+#define VI6_RPF_INFMT_RDTM_BT601	(0 << 9)
-+#define VI6_RPF_INFMT_RDTM_BT601_EXT	(1 << 9)
-+#define VI6_RPF_INFMT_RDTM_BT709	(2 << 9)
-+#define VI6_RPF_INFMT_RDTM_BT709_EXT	(3 << 9)
-+#define VI6_RPF_INFMT_RDTM_MASK		(7 << 9)
-+#define VI6_RPF_INFMT_CSC		(1 << 8)
-+#define VI6_RPF_INFMT_RDFMT_MASK	(0x7f << 0)
-+#define VI6_RPF_INFMT_RDFMT_SHIFT	0
-+
-+#define VI6_RPF_DSWAP			0x030c
-+#define VI6_RPF_DSWAP_A_LLS		(1 << 11)
-+#define VI6_RPF_DSWAP_A_LWS		(1 << 10)
-+#define VI6_RPF_DSWAP_A_WDS		(1 << 9)
-+#define VI6_RPF_DSWAP_A_BTS		(1 << 8)
-+#define VI6_RPF_DSWAP_P_LLS		(1 << 3)
-+#define VI6_RPF_DSWAP_P_LWS		(1 << 2)
-+#define VI6_RPF_DSWAP_P_WDS		(1 << 1)
-+#define VI6_RPF_DSWAP_P_BTS		(1 << 0)
-+
-+#define VI6_RPF_LOC			0x0310
-+#define VI6_RPF_LOC_HCOORD_MASK		(0x1fff << 16)
-+#define VI6_RPF_LOC_HCOORD_SHIFT	16
-+#define VI6_RPF_LOC_VCOORD_MASK		(0x1fff << 0)
-+#define VI6_RPF_LOC_VCOORD_SHIFT	0
-+
-+#define VI6_RPF_ALPH_SEL		0x0314
-+#define VI6_RPF_ALPH_SEL_ASEL_PACKED	(0 << 28)
-+#define VI6_RPF_ALPH_SEL_ASEL_8B_PLANE	(1 << 28)
-+#define VI6_RPF_ALPH_SEL_ASEL_SELECT	(2 << 28)
-+#define VI6_RPF_ALPH_SEL_ASEL_1B_PLANE	(3 << 28)
-+#define VI6_RPF_ALPH_SEL_ASEL_FIXED	(4 << 28)
-+#define VI6_RPF_ALPH_SEL_ASEL_MASK	(7 << 28)
-+#define VI6_RPF_ALPH_SEL_ASEL_SHIFT	28
-+#define VI6_RPF_ALPH_SEL_IROP_MASK	(0xf << 24)
-+#define VI6_RPF_ALPH_SEL_IROP_SHIFT	24
-+#define VI6_RPF_ALPH_SEL_BSEL		(1 << 23)
-+#define VI6_RPF_ALPH_SEL_AEXT_ZERO	(0 << 18)
-+#define VI6_RPF_ALPH_SEL_AEXT_EXT	(1 << 18)
-+#define VI6_RPF_ALPH_SEL_AEXT_ONE	(2 << 18)
-+#define VI6_RPF_ALPH_SEL_AEXT_MASK	(3 << 18)
-+#define VI6_RPF_ALPH_SEL_ALPHA0_MASK	(0xff << 8)
-+#define VI6_RPF_ALPH_SEL_ALPHA0_SHIFT	8
-+#define VI6_RPF_ALPH_SEL_ALPHA1_MASK	(0xff << 0)
-+#define VI6_RPF_ALPH_SEL_ALPHA1_SHIFT	0
-+
-+#define VI6_RPF_VRTCOL_SET		0x0318
-+#define VI6_RPF_VRTCOL_SET_LAYA_MASK	(0xff << 24)
-+#define VI6_RPF_VRTCOL_SET_LAYA_SHIFT	24
-+#define VI6_RPF_VRTCOL_SET_LAYR_MASK	(0xff << 16)
-+#define VI6_RPF_VRTCOL_SET_LAYR_SHIFT	16
-+#define VI6_RPF_VRTCOL_SET_LAYG_MASK	(0xff << 8)
-+#define VI6_RPF_VRTCOL_SET_LAYG_SHIFT	8
-+#define VI6_RPF_VRTCOL_SET_LAYB_MASK	(0xff << 0)
-+#define VI6_RPF_VRTCOL_SET_LAYB_SHIFT	0
-+
-+#define VI6_RPF_MSK_CTRL		0x031c
-+#define VI6_RPF_MSK_CTRL_MSK_EN		(1 << 24)
-+#define VI6_RPF_MSK_CTRL_MGR_MASK	(0xff << 16)
-+#define VI6_RPF_MSK_CTRL_MGR_SHIFT	16
-+#define VI6_RPF_MSK_CTRL_MGG_MASK	(0xff << 8)
-+#define VI6_RPF_MSK_CTRL_MGG_SHIFT	8
-+#define VI6_RPF_MSK_CTRL_MGB_MASK	(0xff << 0)
-+#define VI6_RPF_MSK_CTRL_MGB_SHIFT	0
-+
-+#define VI6_RPF_MSK_SET0		0x0320
-+#define VI6_RPF_MSK_SET1		0x0324
-+#define VI6_RPF_MSK_SET_MSA_MASK	(0xff << 24)
-+#define VI6_RPF_MSK_SET_MSA_SHIFT	24
-+#define VI6_RPF_MSK_SET_MSR_MASK	(0xff << 16)
-+#define VI6_RPF_MSK_SET_MSR_SHIFT	16
-+#define VI6_RPF_MSK_SET_MSG_MASK	(0xff << 8)
-+#define VI6_RPF_MSK_SET_MSG_SHIFT	8
-+#define VI6_RPF_MSK_SET_MSB_MASK	(0xff << 0)
-+#define VI6_RPF_MSK_SET_MSB_SHIFT	0
-+
-+#define VI6_RPF_CKEY_CTRL		0x0328
-+#define VI6_RPF_CKEY_CTRL_CV		(1 << 4)
-+#define VI6_RPF_CKEY_CTRL_SAPE1		(1 << 1)
-+#define VI6_RPF_CKEY_CTRL_SAPE0		(1 << 0)
-+
-+#define VI6_RPF_CKEY_SET0		0x032c
-+#define VI6_RPF_CKEY_SET1		0x0330
-+#define VI6_RPF_CKEY_SET_AP_MASK	(0xff << 24)
-+#define VI6_RPF_CKEY_SET_AP_SHIFT	24
-+#define VI6_RPF_CKEY_SET_R_MASK		(0xff << 16)
-+#define VI6_RPF_CKEY_SET_R_SHIFT	16
-+#define VI6_RPF_CKEY_SET_GY_MASK	(0xff << 8)
-+#define VI6_RPF_CKEY_SET_GY_SHIFT	8
-+#define VI6_RPF_CKEY_SET_B_MASK		(0xff << 0)
-+#define VI6_RPF_CKEY_SET_B_SHIFT	0
-+
-+#define VI6_RPF_SRCM_PSTRIDE		0x0334
-+#define VI6_RPF_SRCM_PSTRIDE_Y_SHIFT	16
-+#define VI6_RPF_SRCM_PSTRIDE_C_SHIFT	0
-+
-+#define VI6_RPF_SRCM_ASTRIDE		0x0338
-+#define VI6_RPF_SRCM_PSTRIDE_A_SHIFT	0
-+
-+#define VI6_RPF_SRCM_ADDR_Y		0x033c
-+#define VI6_RPF_SRCM_ADDR_C0		0x0340
-+#define VI6_RPF_SRCM_ADDR_C1		0x0344
-+#define VI6_RPF_SRCM_ADDR_AI		0x0348
-+
-+/* -----------------------------------------------------------------------------
-+ * WPF Control Registers
-+ */
-+
-+#define VI6_WPF_OFFSET			0x100
-+
-+#define VI6_WPF_SRCRPF			0x1000
-+#define VI6_WPF_SRCRPF_VIRACT_DIS	(0 << 28)
-+#define VI6_WPF_SRCRPF_VIRACT_SUB	(1 << 28)
-+#define VI6_WPF_SRCRPF_VIRACT_MST	(2 << 28)
-+#define VI6_WPF_SRCRPF_VIRACT_MASK	(3 << 28)
-+#define VI6_WPF_SRCRPF_RPF_ACT_DIS(n)	(0 << ((n) * 2))
-+#define VI6_WPF_SRCRPF_RPF_ACT_SUB(n)	(1 << ((n) * 2))
-+#define VI6_WPF_SRCRPF_RPF_ACT_MST(n)	(2 << ((n) * 2))
-+#define VI6_WPF_SRCRPF_RPF_ACT_MASK(n)	(3 << ((n) * 2))
-+
-+#define VI6_WPF_HSZCLIP			0x1004
-+#define VI6_WPF_VSZCLIP			0x1008
-+#define VI6_WPF_SZCLIP_EN		(1 << 28)
-+#define VI6_WPF_SZCLIP_OFST_MASK	(0xff << 16)
-+#define VI6_WPF_SZCLIP_OFST_SHIFT	16
-+#define VI6_WPF_SZCLIP_SIZE_MASK	(0x1fff << 0)
-+#define VI6_WPF_SZCLIP_SIZE_SHIFT	0
-+
-+#define VI6_WPF_OUTFMT			0x100c
-+#define VI6_WPF_OUTFMT_PDV_MASK		(0xff << 24)
-+#define VI6_WPF_OUTFMT_PDV_SHIFT	24
-+#define VI6_WPF_OUTFMT_PXA		(1 << 23)
-+#define VI6_WPF_OUTFMT_FLP		(1 << 16)
-+#define VI6_WPF_OUTFMT_SPYCS		(1 << 15)
-+#define VI6_WPF_OUTFMT_SPUVS		(1 << 14)
-+#define VI6_WPF_OUTFMT_DITH_DIS		(0 << 12)
-+#define VI6_WPF_OUTFMT_DITH_EN		(3 << 12)
-+#define VI6_WPF_OUTFMT_DITH_MASK	(3 << 12)
-+#define VI6_WPF_OUTFMT_WRTM_BT601	(0 << 9)
-+#define VI6_WPF_OUTFMT_WRTM_BT601_EXT	(1 << 9)
-+#define VI6_WPF_OUTFMT_WRTM_BT709	(2 << 9)
-+#define VI6_WPF_OUTFMT_WRTM_BT709_EXT	(3 << 9)
-+#define VI6_WPF_OUTFMT_WRTM_MASK	(7 << 9)
-+#define VI6_WPF_OUTFMT_CSC		(1 << 8)
-+#define VI6_WPF_OUTFMT_WRFMT_MASK	(0x7f << 0)
-+#define VI6_WPF_OUTFMT_WRFMT_SHIFT	0
-+
-+#define VI6_WPF_DSWAP			0x1010
-+#define VI6_WPF_DSWAP_P_LLS		(1 << 3)
-+#define VI6_WPF_DSWAP_P_LWS		(1 << 2)
-+#define VI6_WPF_DSWAP_P_WDS		(1 << 1)
-+#define VI6_WPF_DSWAP_P_BTS		(1 << 0)
-+
-+#define VI6_WPF_RNDCTRL			0x1014
-+#define VI6_WPF_RNDCTRL_CBRM		(1 << 28)
-+#define VI6_WPF_RNDCTRL_ABRM_TRUNC	(0 << 24)
-+#define VI6_WPF_RNDCTRL_ABRM_ROUND	(1 << 24)
-+#define VI6_WPF_RNDCTRL_ABRM_THRESH	(2 << 24)
-+#define VI6_WPF_RNDCTRL_ABRM_MASK	(3 << 24)
-+#define VI6_WPF_RNDCTRL_ATHRESH_MASK	(0xff << 16)
-+#define VI6_WPF_RNDCTRL_ATHRESH_SHIFT	16
-+#define VI6_WPF_RNDCTRL_CLMD_FULL	(0 << 12)
-+#define VI6_WPF_RNDCTRL_CLMD_CLIP	(1 << 12)
-+#define VI6_WPF_RNDCTRL_CLMD_EXT	(2 << 12)
-+#define VI6_WPF_RNDCTRL_CLMD_MASK	(3 << 12)
-+
-+#define VI6_WPF_DSTM_STRIDE_Y		0x101c
-+#define VI6_WPF_DSTM_STRIDE_C		0x1020
-+#define VI6_WPF_DSTM_ADDR_Y		0x1024
-+#define VI6_WPF_DSTM_ADDR_C0		0x1028
-+#define VI6_WPF_DSTM_ADDR_C1		0x102c
-+
-+#define VI6_WPF_WRBCK_CTRL		0x1034
-+#define VI6_WPF_WRBCK_CTRL_WBMD		(1 << 0)
-+
-+/* -----------------------------------------------------------------------------
-+ * DPR Control Registers
-+ */
-+
-+#define VI6_DPR_RPF_ROUTE(n)		(0x2000 + (n) * 4)
-+
-+#define VI6_DPR_WPF_FPORCH(n)		(0x2014 + (n) * 4)
-+#define VI6_DPR_WPF_FPORCH_FP_WPFN	(5 << 8)
-+
-+#define VI6_DPR_SRU_ROUTE		0x2024
-+#define VI6_DPR_UDS_ROUTE(n)		(0x2028 + (n) * 4)
-+#define VI6_DPR_LUT_ROUTE		0x203c
-+#define VI6_DPR_CLU_ROUTE		0x2040
-+#define VI6_DPR_HST_ROUTE		0x2044
-+#define VI6_DPR_HSI_ROUTE		0x2048
-+#define VI6_DPR_BRU_ROUTE		0x204c
-+#define VI6_DPR_ROUTE_FXA_MASK		(0xff << 8)
-+#define VI6_DPR_ROUTE_FXA_SHIFT		16
-+#define VI6_DPR_ROUTE_FP_MASK		(0xff << 8)
-+#define VI6_DPR_ROUTE_FP_SHIFT		8
-+#define VI6_DPR_ROUTE_RT_MASK		(0x3f << 0)
-+#define VI6_DPR_ROUTE_RT_SHIFT		0
-+
-+#define VI6_DPR_HGO_SMPPT		0x2050
-+#define VI6_DPR_HGT_SMPPT		0x2054
-+#define VI6_DPR_SMPPT_TGW_MASK		(7 << 8)
-+#define VI6_DPR_SMPPT_TGW_SHIFT		8
-+#define VI6_DPR_SMPPT_PT_MASK		(0x3f << 0)
-+#define VI6_DPR_SMPPT_PT_SHIFT		0
-+
-+#define VI6_DPR_NODE_RPF(n)		(n)
-+#define VI6_DPR_NODE_SRU		16
-+#define VI6_DPR_NODE_UDS(n)		(17 + (n))
-+#define VI6_DPR_NODE_LUT		22
-+#define VI6_DPR_NODE_BRU_IN(n)		(23 + (n))
-+#define VI6_DPR_NODE_BRU_OUT		27
-+#define VI6_DPR_NODE_CLU		29
-+#define VI6_DPR_NODE_HST		30
-+#define VI6_DPR_NODE_HSI		31
-+#define VI6_DPR_NODE_LIF		55
-+#define VI6_DPR_NODE_WPF(n)		(56 + (n))
-+#define VI6_DPR_NODE_UNUSED		63
-+
-+/* -----------------------------------------------------------------------------
-+ * SRU Control Registers
-+ */
-+
-+#define VI6_SRU_CTRL0			0x2200
-+#define VI6_SRU_CTRL1			0x2204
-+#define VI6_SRU_CTRL2			0x2208
-+
-+/* -----------------------------------------------------------------------------
-+ * UDS Control Registers
-+ */
-+
-+#define VI6_UDS_OFFSET			0x100
-+
-+#define VI6_UDS_CTRL			0x2300
-+#define VI6_UDS_CTRL_AMD		(1 << 30)
-+#define VI6_UDS_CTRL_FMD		(1 << 29)
-+#define VI6_UDS_CTRL_BLADV		(1 << 28)
-+#define VI6_UDS_CTRL_AON		(1 << 25)
-+#define VI6_UDS_CTRL_ATHON		(1 << 24)
-+#define VI6_UDS_CTRL_BC			(1 << 20)
-+#define VI6_UDS_CTRL_NE_A		(1 << 19)
-+#define VI6_UDS_CTRL_NE_RCR		(1 << 18)
-+#define VI6_UDS_CTRL_NE_GY		(1 << 17)
-+#define VI6_UDS_CTRL_NE_BCB		(1 << 16)
-+#define VI6_UDS_CTRL_TDIPC		(1 << 1)
-+
-+#define VI6_UDS_SCALE			0x2304
-+#define VI6_UDS_SCALE_HMANT_MASK	(0xf << 28)
-+#define VI6_UDS_SCALE_HMANT_SHIFT	28
-+#define VI6_UDS_SCALE_HFRAC_MASK	(0xfff << 16)
-+#define VI6_UDS_SCALE_HFRAC_SHIFT	16
-+#define VI6_UDS_SCALE_VMANT_MASK	(0xf << 12)
-+#define VI6_UDS_SCALE_VMANT_SHIFT	12
-+#define VI6_UDS_SCALE_VFRAC_MASK	(0xfff << 0)
-+#define VI6_UDS_SCALE_VFRAC_SHIFT	0
-+
-+#define VI6_UDS_ALPTH			0x2308
-+#define VI6_UDS_ALPTH_TH1_MASK		(0xff << 8)
-+#define VI6_UDS_ALPTH_TH1_SHIFT		8
-+#define VI6_UDS_ALPTH_TH0_MASK		(0xff << 0)
-+#define VI6_UDS_ALPTH_TH0_SHIFT		0
-+
-+#define VI6_UDS_ALPVAL			0x230c
-+#define VI6_UDS_ALPVAL_VAL2_MASK	(0xff << 16)
-+#define VI6_UDS_ALPVAL_VAL2_SHIFT	16
-+#define VI6_UDS_ALPVAL_VAL1_MASK	(0xff << 8)
-+#define VI6_UDS_ALPVAL_VAL1_SHIFT	8
-+#define VI6_UDS_ALPVAL_VAL0_MASK	(0xff << 0)
-+#define VI6_UDS_ALPVAL_VAL0_SHIFT	0
-+
-+#define VI6_UDS_PASS_BWIDTH		0x2310
-+#define VI6_UDS_PASS_BWIDTH_H_MASK	(0x7f << 16)
-+#define VI6_UDS_PASS_BWIDTH_H_SHIFT	16
-+#define VI6_UDS_PASS_BWIDTH_V_MASK	(0x7f << 0)
-+#define VI6_UDS_PASS_BWIDTH_V_SHIFT	0
-+
-+#define VI6_UDS_IPC			0x2318
-+#define VI6_UDS_IPC_FIELD		(1 << 27)
-+#define VI6_UDS_IPC_VEDP_MASK		(0xfff << 0)
-+#define VI6_UDS_IPC_VEDP_SHIFT		0
-+
-+#define VI6_UDS_CLIP_SIZE		0x2324
-+#define VI6_UDS_CLIP_SIZE_HSIZE_MASK	(0x1fff << 16)
-+#define VI6_UDS_CLIP_SIZE_HSIZE_SHIFT	16
-+#define VI6_UDS_CLIP_SIZE_VSIZE_MASK	(0x1fff << 0)
-+#define VI6_UDS_CLIP_SIZE_VSIZE_SHIFT	0
-+
-+#define VI6_UDS_FILL_COLOR		0x2328
-+#define VI6_UDS_FILL_COLOR_RFILC_MASK	(0xff << 16)
-+#define VI6_UDS_FILL_COLOR_RFILC_SHIFT	16
-+#define VI6_UDS_FILL_COLOR_GFILC_MASK	(0xff << 8)
-+#define VI6_UDS_FILL_COLOR_GFILC_SHIFT	8
-+#define VI6_UDS_FILL_COLOR_BFILC_MASK	(0xff << 0)
-+#define VI6_UDS_FILL_COLOR_BFILC_SHIFT	0
-+
-+/* -----------------------------------------------------------------------------
-+ * LUT Control Registers
-+ */
-+
-+#define VI6_LUT_CTRL			0x2800
-+
-+/* -----------------------------------------------------------------------------
-+ * CLU Control Registers
-+ */
-+
-+#define VI6_CLU_CTRL			0x2900
-+
-+/* -----------------------------------------------------------------------------
-+ * HST Control Registers
-+ */
-+
-+#define VI6_HST_CTRL			0x2a00
-+
-+/* -----------------------------------------------------------------------------
-+ * HSI Control Registers
-+ */
-+
-+#define VI6_HSI_CTRL			0x2b00
-+
-+/* -----------------------------------------------------------------------------
-+ * BRU Control Registers
-+ */
-+
-+#define VI6_BRU_INCTRL			0x2c00
-+#define VI6_BRU_VIRRPF_SIZE		0x2c04
-+#define VI6_BRU_VIRRPF_LOC		0x2c08
-+#define VI6_BRU_VIRRPF_COL		0x2c0c
-+#define VI6_BRU_CTRL(n)			(0x2c10 + (n) * 8)
-+#define VI6_BRU_BLD(n)			(0x2c14 + (n) * 8)
-+#define VI6_BRU_ROP			0x2c30
-+
-+/* -----------------------------------------------------------------------------
-+ * HGO Control Registers
-+ */
-+
-+#define VI6_HGO_OFFSET			0x3000
-+#define VI6_HGO_SIZE			0x3004
-+#define VI6_HGO_MODE			0x3008
-+#define VI6_HGO_LB_TH			0x300c
-+#define VI6_HGO_LBn_H(n)		(0x3010 + (n) * 8)
-+#define VI6_HGO_LBn_V(n)		(0x3014 + (n) * 8)
-+#define VI6_HGO_R_HISTO			0x3030
-+#define VI6_HGO_R_MAXMIN		0x3130
-+#define VI6_HGO_R_SUM			0x3134
-+#define VI6_HGO_R_LB_DET		0x3138
-+#define VI6_HGO_G_HISTO			0x3140
-+#define VI6_HGO_G_MAXMIN		0x3240
-+#define VI6_HGO_G_SUM			0x3244
-+#define VI6_HGO_G_LB_DET		0x3248
-+#define VI6_HGO_B_HISTO			0x3250
-+#define VI6_HGO_B_MAXMIN		0x3350
-+#define VI6_HGO_B_SUM			0x3354
-+#define VI6_HGO_B_LB_DET		0x3358
-+#define VI6_HGO_REGRST			0x33fc
-+
-+/* -----------------------------------------------------------------------------
-+ * HGT Control Registers
-+ */
-+
-+#define VI6_HGT_OFFSET			0x3400
-+#define VI6_HGT_SIZE			0x3404
-+#define VI6_HGT_MODE			0x3408
-+#define VI6_HGT_HUE_AREA(n)		(0x340c + (n) * 4)
-+#define VI6_HGT_LB_TH			0x3424
-+#define VI6_HGT_LBn_H(n)		(0x3438 + (n) * 8)
-+#define VI6_HGT_LBn_V(n)		(0x342c + (n) * 8)
-+#define VI6_HGT_HISTO(m, n)		(0x3450 + (m) * 128 + (n) * 4)
-+#define VI6_HGT_MAXMIN			0x3750
-+#define VI6_HGT_SUM			0x3754
-+#define VI6_HGT_LB_DET			0x3758
-+#define VI6_HGT_REGRST			0x37fc
-+
-+/* -----------------------------------------------------------------------------
-+ * LIF Control Registers
-+ */
-+
-+#define VI6_LIF_CTRL			0x3b00
-+#define VI6_LIF_CTRL_OBTH_MASK		(0x7ff << 16)
-+#define VI6_LIF_CTRL_OBTH_SHIFT		16
-+#define VI6_LIF_CTRL_CFMT		(1 << 4)
-+#define VI6_LIF_CTRL_REQSEL		(1 << 1)
-+#define VI6_LIF_CTRL_LIF_EN		(1 << 0)
-+
-+#define VI6_LIF_CSBTH			0x3b04
-+#define VI6_LIF_CSBTH_HBTH_MASK		(0x7ff << 16)
-+#define VI6_LIF_CSBTH_HBTH_SHIFT	16
-+#define VI6_LIF_CSBTH_LBTH_MASK		(0x7ff << 0)
-+#define VI6_LIF_CSBTH_LBTH_SHIFT	0
-+
-+/* -----------------------------------------------------------------------------
-+ * Security Control Registers
-+ */
-+
-+#define VI6_SECURITY_CTRL0		0x3d00
-+#define VI6_SECURITY_CTRL1		0x3d04
-+
-+/* -----------------------------------------------------------------------------
-+ * RPF CLUT Registers
-+ */
-+
-+#define VI6_CLUT_TABLE			0x4000
-+
-+/* -----------------------------------------------------------------------------
-+ * 1D LUT Registers
-+ */
-+
-+#define VI6_LUT_TABLE			0x7000
-+
-+/* -----------------------------------------------------------------------------
-+ * 3D LUT Registers
-+ */
-+
-+#define VI6_CLU_ADDR			0x7400
-+#define VI6_CLU_DATA			0x7404
-+
-+/* -----------------------------------------------------------------------------
-+ * Formats
-+ */
-+
-+#define VI6_FMT_RGB_332			0x00
-+#define VI6_FMT_XRGB_4444		0x01
-+#define VI6_FMT_RGBX_4444		0x02
-+#define VI6_FMT_XRGB_1555		0x04
-+#define VI6_FMT_RGBX_5551		0x05
-+#define VI6_FMT_RGB_565			0x06
-+#define VI6_FMT_AXRGB_86666		0x07
-+#define VI6_FMT_RGBXA_66668		0x08
-+#define VI6_FMT_XRGBA_66668		0x09
-+#define VI6_FMT_ARGBX_86666		0x0a
-+#define VI6_FMT_AXRXGXB_8262626		0x0b
-+#define VI6_FMT_XRXGXBA_2626268		0x0c
-+#define VI6_FMT_ARXGXBX_8626262		0x0d
-+#define VI6_FMT_RXGXBXA_6262628		0x0e
-+#define VI6_FMT_XRGB_6666		0x0f
-+#define VI6_FMT_RGBX_6666		0x10
-+#define VI6_FMT_XRXGXB_262626		0x11
-+#define VI6_FMT_RXGXBX_626262		0x12
-+#define VI6_FMT_ARGB_8888		0x13
-+#define VI6_FMT_RGBA_8888		0x14
-+#define VI6_FMT_RGB_888			0x15
-+#define VI6_FMT_XRGXGB_763763		0x16
-+#define VI6_FMT_XXRGB_86666		0x17
-+#define VI6_FMT_BGR_888			0x18
-+#define VI6_FMT_ARGB_4444		0x19
-+#define VI6_FMT_RGBA_4444		0x1a
-+#define VI6_FMT_ARGB_1555		0x1b
-+#define VI6_FMT_RGBA_5551		0x1c
-+#define VI6_FMT_ABGR_4444		0x1d
-+#define VI6_FMT_BGRA_4444		0x1e
-+#define VI6_FMT_ABGR_1555		0x1f
-+#define VI6_FMT_BGRA_5551		0x20
-+#define VI6_FMT_XBXGXR_262626		0x21
-+#define VI6_FMT_ABGR_8888		0x22
-+#define VI6_FMT_XXRGB_88565		0x23
-+
-+#define VI6_FMT_Y_UV_444		0x40
-+#define VI6_FMT_Y_UV_422		0x41
-+#define VI6_FMT_Y_UV_420		0x42
-+#define VI6_FMT_YUV_444			0x46
-+#define VI6_FMT_YUYV_422		0x47
-+#define VI6_FMT_YYUV_422		0x48
-+#define VI6_FMT_YUV_420			0x49
-+#define VI6_FMT_Y_U_V_444		0x4a
-+#define VI6_FMT_Y_U_V_422		0x4b
-+#define VI6_FMT_Y_U_V_420		0x4c
-+
-+#endif /* __VSP1_REGS_H__ */
-diff --git a/drivers/media/platform/vsp1/vsp1_rpf.c b/drivers/media/platform/vsp1/vsp1_rpf.c
-new file mode 100644
-index 000000000000..254871d3423e
---- /dev/null
-+++ b/drivers/media/platform/vsp1/vsp1_rpf.c
-@@ -0,0 +1,209 @@
-+/*
-+ * vsp1_rpf.c  --  R-Car VSP1 Read Pixel Formatter
-+ *
-+ * Copyright (C) 2013 Renesas Corporation
-+ *
-+ * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ */
-+
-+#include <linux/device.h>
-+
-+#include <media/v4l2-subdev.h>
-+
-+#include "vsp1.h"
-+#include "vsp1_rwpf.h"
-+#include "vsp1_video.h"
-+
-+#define RPF_MAX_WIDTH				8190
-+#define RPF_MAX_HEIGHT				8190
-+
-+/* -----------------------------------------------------------------------------
-+ * Device Access
-+ */
-+
-+static inline u32 vsp1_rpf_read(struct vsp1_rwpf *rpf, u32 reg)
-+{
-+	return vsp1_read(rpf->entity.vsp1,
-+			 reg + rpf->entity.index * VI6_RPF_OFFSET);
-+}
-+
-+static inline void vsp1_rpf_write(struct vsp1_rwpf *rpf, u32 reg, u32 data)
-+{
-+	vsp1_write(rpf->entity.vsp1,
-+		   reg + rpf->entity.index * VI6_RPF_OFFSET, data);
-+}
-+
-+/* -----------------------------------------------------------------------------
-+ * V4L2 Subdevice Core Operations
-+ */
-+
-+static int rpf_s_stream(struct v4l2_subdev *subdev, int enable)
-+{
-+	struct vsp1_rwpf *rpf = to_rwpf(subdev);
-+	const struct vsp1_format_info *fmtinfo = rpf->video.fmtinfo;
-+	const struct v4l2_pix_format_mplane *format = &rpf->video.format;
-+	u32 pstride;
-+	u32 infmt;
-+
-+	if (!enable)
-+		return 0;
-+
-+	/* Source size and stride. Cropping isn't supported yet. */
-+	vsp1_rpf_write(rpf, VI6_RPF_SRC_BSIZE,
-+		       (format->width << VI6_RPF_SRC_BSIZE_BHSIZE_SHIFT) |
-+		       (format->height << VI6_RPF_SRC_BSIZE_BVSIZE_SHIFT));
-+	vsp1_rpf_write(rpf, VI6_RPF_SRC_ESIZE,
-+		       (format->width << VI6_RPF_SRC_ESIZE_EHSIZE_SHIFT) |
-+		       (format->height << VI6_RPF_SRC_ESIZE_EVSIZE_SHIFT));
-+
-+	pstride = format->plane_fmt[0].bytesperline
-+		<< VI6_RPF_SRCM_PSTRIDE_Y_SHIFT;
-+	if (format->num_planes > 1)
-+		pstride |= format->plane_fmt[1].bytesperline
-+			<< VI6_RPF_SRCM_PSTRIDE_C_SHIFT;
-+
-+	vsp1_rpf_write(rpf, VI6_RPF_SRCM_PSTRIDE, pstride);
-+
-+	/* Format */
-+	infmt = VI6_RPF_INFMT_CIPM
-+	      | (fmtinfo->hwfmt << VI6_RPF_INFMT_RDFMT_SHIFT);
-+
-+	if (fmtinfo->swap_yc)
-+		infmt |= VI6_RPF_INFMT_SPYCS;
-+	if (fmtinfo->swap_uv)
-+		infmt |= VI6_RPF_INFMT_SPUVS;
-+
-+	if (rpf->entity.formats[RWPF_PAD_SINK].code !=
-+	    rpf->entity.formats[RWPF_PAD_SOURCE].code)
-+		infmt |= VI6_RPF_INFMT_CSC;
-+
-+	vsp1_rpf_write(rpf, VI6_RPF_INFMT, infmt);
-+	vsp1_rpf_write(rpf, VI6_RPF_DSWAP, fmtinfo->swap);
-+
-+	/* Output location. Composing isn't supported yet. */
-+	vsp1_rpf_write(rpf, VI6_RPF_LOC, 0);
-+
-+	/* Disable alpha, mask and color key. Set the alpha channel to a fixed
-+	 * value of 255.
-+	 */
-+	vsp1_rpf_write(rpf, VI6_RPF_ALPH_SEL, VI6_RPF_ALPH_SEL_ASEL_FIXED);
-+	vsp1_rpf_write(rpf, VI6_RPF_VRTCOL_SET,
-+		       255 << VI6_RPF_VRTCOL_SET_LAYA_SHIFT);
-+	vsp1_rpf_write(rpf, VI6_RPF_MSK_CTRL, 0);
-+	vsp1_rpf_write(rpf, VI6_RPF_CKEY_CTRL, 0);
-+
-+	return 0;
-+}
-+
-+/* -----------------------------------------------------------------------------
-+ * V4L2 Subdevice Operations
-+ */
-+
-+static struct v4l2_subdev_video_ops rpf_video_ops = {
-+	.s_stream = rpf_s_stream,
-+};
-+
-+static struct v4l2_subdev_pad_ops rpf_pad_ops = {
-+	.enum_mbus_code = vsp1_rwpf_enum_mbus_code,
-+	.enum_frame_size = vsp1_rwpf_enum_frame_size,
-+	.get_fmt = vsp1_rwpf_get_format,
-+	.set_fmt = vsp1_rwpf_set_format,
-+};
-+
-+static struct v4l2_subdev_ops rpf_ops = {
-+	.video	= &rpf_video_ops,
-+	.pad    = &rpf_pad_ops,
-+};
-+
-+/* -----------------------------------------------------------------------------
-+ * Video Device Operations
-+ */
-+
-+static void rpf_vdev_queue(struct vsp1_video *video,
-+			   struct vsp1_video_buffer *buf)
-+{
-+	struct vsp1_rwpf *rpf = container_of(video, struct vsp1_rwpf, video);
-+
-+	vsp1_rpf_write(rpf, VI6_RPF_SRCM_ADDR_Y, buf->addr[0]);
-+	if (buf->buf.num_planes > 1)
-+		vsp1_rpf_write(rpf, VI6_RPF_SRCM_ADDR_C0, buf->addr[1]);
-+	if (buf->buf.num_planes > 2)
-+		vsp1_rpf_write(rpf, VI6_RPF_SRCM_ADDR_C1, buf->addr[2]);
-+}
-+
-+static const struct vsp1_video_operations rpf_vdev_ops = {
-+	.queue = rpf_vdev_queue,
-+};
-+
-+/* -----------------------------------------------------------------------------
-+ * Initialization and Cleanup
-+ */
-+
-+struct vsp1_rwpf *vsp1_rpf_create(struct vsp1_device *vsp1, unsigned int index)
-+{
-+	struct v4l2_subdev *subdev;
-+	struct vsp1_video *video;
-+	struct vsp1_rwpf *rpf;
-+	int ret;
-+
-+	rpf = devm_kzalloc(vsp1->dev, sizeof(*rpf), GFP_KERNEL);
-+	if (rpf == NULL)
-+		return ERR_PTR(-ENOMEM);
-+
-+	rpf->max_width = RPF_MAX_WIDTH;
-+	rpf->max_height = RPF_MAX_HEIGHT;
-+
-+	rpf->entity.type = VSP1_ENTITY_RPF;
-+	rpf->entity.index = index;
-+	rpf->entity.id = VI6_DPR_NODE_RPF(index);
-+
-+	ret = vsp1_entity_init(vsp1, &rpf->entity, 2);
-+	if (ret < 0)
-+		return ERR_PTR(ret);
-+
-+	/* Initialize the V4L2 subdev. */
-+	subdev = &rpf->entity.subdev;
-+	v4l2_subdev_init(subdev, &rpf_ops);
-+
-+	subdev->entity.ops = &vsp1_media_ops;
-+	subdev->internal_ops = &vsp1_subdev_internal_ops;
-+	snprintf(subdev->name, sizeof(subdev->name), "%s rpf.%u",
-+		 dev_name(vsp1->dev), index);
-+	v4l2_set_subdevdata(subdev, rpf);
-+	subdev->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
-+
-+	vsp1_entity_init_formats(subdev, NULL);
-+
-+	/* Initialize the video device. */
-+	video = &rpf->video;
-+
-+	video->type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
-+	video->vsp1 = vsp1;
-+	video->ops = &rpf_vdev_ops;
-+
-+	ret = vsp1_video_init(video, &rpf->entity);
-+	if (ret < 0)
-+		goto error_video;
-+
-+	/* Connect the video device to the RPF. */
-+	ret = media_entity_create_link(&rpf->video.video.entity, 0,
-+				       &rpf->entity.subdev.entity,
-+				       RWPF_PAD_SINK,
-+				       MEDIA_LNK_FL_ENABLED |
-+				       MEDIA_LNK_FL_IMMUTABLE);
-+	if (ret < 0)
-+		goto error_link;
-+
-+	return rpf;
-+
-+error_link:
-+	vsp1_video_cleanup(video);
-+error_video:
-+	media_entity_cleanup(&rpf->entity.subdev.entity);
-+	return ERR_PTR(ret);
-+}
-diff --git a/drivers/media/platform/vsp1/vsp1_rwpf.c b/drivers/media/platform/vsp1/vsp1_rwpf.c
-new file mode 100644
-index 000000000000..9752d5516ceb
---- /dev/null
-+++ b/drivers/media/platform/vsp1/vsp1_rwpf.c
-@@ -0,0 +1,124 @@
-+/*
-+ * vsp1_rwpf.c  --  R-Car VSP1 Read and Write Pixel Formatters
-+ *
-+ * Copyright (C) 2013 Renesas Corporation
-+ *
-+ * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ */
-+
-+#include <media/v4l2-subdev.h>
-+
-+#include "vsp1.h"
-+#include "vsp1_rwpf.h"
-+#include "vsp1_video.h"
-+
-+#define RWPF_MIN_WIDTH				1
-+#define RWPF_MIN_HEIGHT				1
-+
-+/* -----------------------------------------------------------------------------
-+ * V4L2 Subdevice Pad Operations
-+ */
-+
-+int vsp1_rwpf_enum_mbus_code(struct v4l2_subdev *subdev,
-+			     struct v4l2_subdev_fh *fh,
-+			     struct v4l2_subdev_mbus_code_enum *code)
-+{
-+	static const unsigned int codes[] = {
-+		V4L2_MBUS_FMT_ARGB8888_1X32,
-+		V4L2_MBUS_FMT_AYUV8_1X32,
-+	};
-+
-+	if (code->index >= ARRAY_SIZE(codes))
-+		return -EINVAL;
-+
-+	code->code = codes[code->index];
-+
-+	return 0;
-+}
-+
-+int vsp1_rwpf_enum_frame_size(struct v4l2_subdev *subdev,
-+			      struct v4l2_subdev_fh *fh,
-+			      struct v4l2_subdev_frame_size_enum *fse)
-+{
-+	struct vsp1_rwpf *rwpf = to_rwpf(subdev);
-+	struct v4l2_mbus_framefmt *format;
-+
-+	format = v4l2_subdev_get_try_format(fh, fse->pad);
-+
-+	if (fse->index || fse->code != format->code)
-+		return -EINVAL;
-+
-+	if (fse->pad == RWPF_PAD_SINK) {
-+		fse->min_width = RWPF_MIN_WIDTH;
-+		fse->max_width = rwpf->max_width;
-+		fse->min_height = RWPF_MIN_HEIGHT;
-+		fse->max_height = rwpf->max_height;
-+	} else {
-+		/* The size on the source pad are fixed and always identical to
-+		 * the size on the sink pad.
-+		 */
-+		fse->min_width = format->width;
-+		fse->max_width = format->width;
-+		fse->min_height = format->height;
-+		fse->max_height = format->height;
-+	}
-+
-+	return 0;
-+}
-+
-+int vsp1_rwpf_get_format(struct v4l2_subdev *subdev, struct v4l2_subdev_fh *fh,
-+			 struct v4l2_subdev_format *fmt)
-+{
-+	struct vsp1_rwpf *rwpf = to_rwpf(subdev);
-+
-+	fmt->format = *vsp1_entity_get_pad_format(&rwpf->entity, fh, fmt->pad,
-+						  fmt->which);
-+
-+	return 0;
-+}
-+
-+int vsp1_rwpf_set_format(struct v4l2_subdev *subdev, struct v4l2_subdev_fh *fh,
-+			 struct v4l2_subdev_format *fmt)
-+{
-+	struct vsp1_rwpf *rwpf = to_rwpf(subdev);
-+	struct v4l2_mbus_framefmt *format;
-+
-+	/* Default to YUV if the requested format is not supported. */
-+	if (fmt->format.code != V4L2_MBUS_FMT_ARGB8888_1X32 &&
-+	    fmt->format.code != V4L2_MBUS_FMT_AYUV8_1X32)
-+		fmt->format.code = V4L2_MBUS_FMT_AYUV8_1X32;
-+
-+	format = vsp1_entity_get_pad_format(&rwpf->entity, fh, fmt->pad,
-+					    fmt->which);
-+
-+	if (fmt->pad == RWPF_PAD_SOURCE) {
-+		/* The RWPF performs format conversion but can't scale, only the
-+		 * format code can be changed on the source pad.
-+		 */
-+		format->code = fmt->format.code;
-+		fmt->format = *format;
-+		return 0;
-+	}
-+
-+	format->code = fmt->format.code;
-+	format->width = clamp_t(unsigned int, fmt->format.width,
-+				RWPF_MIN_WIDTH, rwpf->max_width);
-+	format->height = clamp_t(unsigned int, fmt->format.height,
-+				 RWPF_MIN_HEIGHT, rwpf->max_height);
-+	format->field = V4L2_FIELD_NONE;
-+	format->colorspace = V4L2_COLORSPACE_SRGB;
-+
-+	fmt->format = *format;
-+
-+	/* Propagate the format to the source pad. */
-+	format = vsp1_entity_get_pad_format(&rwpf->entity, fh, RWPF_PAD_SOURCE,
-+					    fmt->which);
-+	*format = fmt->format;
-+
-+	return 0;
-+}
-diff --git a/drivers/media/platform/vsp1/vsp1_rwpf.h b/drivers/media/platform/vsp1/vsp1_rwpf.h
-new file mode 100644
-index 000000000000..c182d85f36b3
---- /dev/null
-+++ b/drivers/media/platform/vsp1/vsp1_rwpf.h
-@@ -0,0 +1,53 @@
-+/*
-+ * vsp1_rwpf.h  --  R-Car VSP1 Read and Write Pixel Formatters
-+ *
-+ * Copyright (C) 2013 Renesas Corporation
-+ *
-+ * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ */
-+#ifndef __VSP1_RWPF_H__
-+#define __VSP1_RWPF_H__
-+
-+#include <media/media-entity.h>
-+#include <media/v4l2-subdev.h>
-+
-+#include "vsp1.h"
-+#include "vsp1_entity.h"
-+#include "vsp1_video.h"
-+
-+#define RWPF_PAD_SINK				0
-+#define RWPF_PAD_SOURCE				1
-+
-+struct vsp1_rwpf {
-+	struct vsp1_entity entity;
-+	struct vsp1_video video;
-+
-+	unsigned int max_width;
-+	unsigned int max_height;
-+};
-+
-+static inline struct vsp1_rwpf *to_rwpf(struct v4l2_subdev *subdev)
-+{
-+	return container_of(subdev, struct vsp1_rwpf, entity.subdev);
-+}
-+
-+struct vsp1_rwpf *vsp1_rpf_create(struct vsp1_device *vsp1, unsigned int index);
-+struct vsp1_rwpf *vsp1_wpf_create(struct vsp1_device *vsp1, unsigned int index);
-+
-+int vsp1_rwpf_enum_mbus_code(struct v4l2_subdev *subdev,
-+			     struct v4l2_subdev_fh *fh,
-+			     struct v4l2_subdev_mbus_code_enum *code);
-+int vsp1_rwpf_enum_frame_size(struct v4l2_subdev *subdev,
-+			      struct v4l2_subdev_fh *fh,
-+			      struct v4l2_subdev_frame_size_enum *fse);
-+int vsp1_rwpf_get_format(struct v4l2_subdev *subdev, struct v4l2_subdev_fh *fh,
-+			 struct v4l2_subdev_format *fmt);
-+int vsp1_rwpf_set_format(struct v4l2_subdev *subdev, struct v4l2_subdev_fh *fh,
-+			 struct v4l2_subdev_format *fmt);
-+
-+#endif /* __VSP1_RWPF_H__ */
-diff --git a/drivers/media/platform/vsp1/vsp1_uds.c b/drivers/media/platform/vsp1/vsp1_uds.c
-new file mode 100644
-index 000000000000..0e50b37f060d
---- /dev/null
-+++ b/drivers/media/platform/vsp1/vsp1_uds.c
-@@ -0,0 +1,346 @@
-+/*
-+ * vsp1_uds.c  --  R-Car VSP1 Up and Down Scaler
-+ *
-+ * Copyright (C) 2013 Renesas Corporation
-+ *
-+ * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ */
-+
-+#include <linux/device.h>
-+#include <linux/gfp.h>
-+
-+#include <media/v4l2-subdev.h>
-+
-+#include "vsp1.h"
-+#include "vsp1_uds.h"
-+
-+#define UDS_MIN_SIZE				4U
-+#define UDS_MAX_SIZE				8190U
-+
-+#define UDS_MIN_FACTOR				0x0100
-+#define UDS_MAX_FACTOR				0xffff
-+
-+/* -----------------------------------------------------------------------------
-+ * Device Access
-+ */
-+
-+static inline u32 vsp1_uds_read(struct vsp1_uds *uds, u32 reg)
-+{
-+	return vsp1_read(uds->entity.vsp1,
-+			 reg + uds->entity.index * VI6_UDS_OFFSET);
-+}
-+
-+static inline void vsp1_uds_write(struct vsp1_uds *uds, u32 reg, u32 data)
-+{
-+	vsp1_write(uds->entity.vsp1,
-+		   reg + uds->entity.index * VI6_UDS_OFFSET, data);
-+}
-+
-+/* -----------------------------------------------------------------------------
-+ * Scaling Computation
-+ */
-+
-+/*
-+ * uds_output_size - Return the output size for an input size and scaling ratio
-+ * @input: input size in pixels
-+ * @ratio: scaling ratio in U4.12 fixed-point format
-+ */
-+static unsigned int uds_output_size(unsigned int input, unsigned int ratio)
-+{
-+	if (ratio > 4096) {
-+		/* Down-scaling */
-+		unsigned int mp;
-+
-+		mp = ratio / 4096;
-+		mp = mp < 4 ? 1 : (mp < 8 ? 2 : 4);
-+
-+		return (input - 1) / mp * mp * 4096 / ratio + 1;
-+	} else {
-+		/* Up-scaling */
-+		return (input - 1) * 4096 / ratio + 1;
-+	}
-+}
-+
-+/*
-+ * uds_output_limits - Return the min and max output sizes for an input size
-+ * @input: input size in pixels
-+ * @minimum: minimum output size (returned)
-+ * @maximum: maximum output size (returned)
-+ */
-+static void uds_output_limits(unsigned int input,
-+			      unsigned int *minimum, unsigned int *maximum)
-+{
-+	*minimum = max(uds_output_size(input, UDS_MAX_FACTOR), UDS_MIN_SIZE);
-+	*maximum = min(uds_output_size(input, UDS_MIN_FACTOR), UDS_MAX_SIZE);
-+}
-+
-+/*
-+ * uds_passband_width - Return the passband filter width for a scaling ratio
-+ * @ratio: scaling ratio in U4.12 fixed-point format
-+ */
-+static unsigned int uds_passband_width(unsigned int ratio)
-+{
-+	if (ratio >= 4096) {
-+		/* Down-scaling */
-+		unsigned int mp;
-+
-+		mp = ratio / 4096;
-+		mp = mp < 4 ? 1 : (mp < 8 ? 2 : 4);
-+
-+		return 64 * 4096 * mp / ratio;
-+	} else {
-+		/* Up-scaling */
-+		return 64;
-+	}
-+}
-+
-+static unsigned int uds_compute_ratio(unsigned int input, unsigned int output)
-+{
-+	/* TODO: This is an approximation that will need to be refined. */
-+	return (input - 1) * 4096 / (output - 1);
-+}
-+
-+static void uds_compute_ratios(struct vsp1_uds *uds)
-+{
-+	struct v4l2_mbus_framefmt *input = &uds->entity.formats[UDS_PAD_SINK];
-+	struct v4l2_mbus_framefmt *output =
-+		&uds->entity.formats[UDS_PAD_SOURCE];
-+
-+	uds->hscale = uds_compute_ratio(input->width, output->width);
-+	uds->vscale = uds_compute_ratio(input->height, output->height);
-+
-+	dev_dbg(uds->entity.vsp1->dev, "hscale %u vscale %u\n",
-+		uds->hscale, uds->vscale);
-+}
-+
-+/* -----------------------------------------------------------------------------
-+ * V4L2 Subdevice Core Operations
-+ */
-+
-+static int uds_s_stream(struct v4l2_subdev *subdev, int enable)
-+{
-+	const struct v4l2_mbus_framefmt *format;
-+	struct vsp1_uds *uds = to_uds(subdev);
-+
-+	if (!enable)
-+		return 0;
-+
-+	/* Enable multi-tap scaling. */
-+	vsp1_uds_write(uds, VI6_UDS_CTRL, VI6_UDS_CTRL_BC);
-+
-+	vsp1_uds_write(uds, VI6_UDS_PASS_BWIDTH,
-+		       (uds_passband_width(uds->hscale)
-+				<< VI6_UDS_PASS_BWIDTH_H_SHIFT) |
-+		       (uds_passband_width(uds->vscale)
-+				<< VI6_UDS_PASS_BWIDTH_V_SHIFT));
-+
-+
-+	/* Set the scaling ratios and the output size. */
-+	format = &uds->entity.formats[UDS_PAD_SOURCE];
-+
-+	vsp1_uds_write(uds, VI6_UDS_SCALE,
-+		       (uds->hscale << VI6_UDS_SCALE_HFRAC_SHIFT) |
-+		       (uds->vscale << VI6_UDS_SCALE_VFRAC_SHIFT));
-+	vsp1_uds_write(uds, VI6_UDS_CLIP_SIZE,
-+		       (format->width << VI6_UDS_CLIP_SIZE_HSIZE_SHIFT) |
-+		       (format->height << VI6_UDS_CLIP_SIZE_VSIZE_SHIFT));
-+
-+	return 0;
-+}
-+
-+/* -----------------------------------------------------------------------------
-+ * V4L2 Subdevice Pad Operations
-+ */
-+
-+static int uds_enum_mbus_code(struct v4l2_subdev *subdev,
-+			      struct v4l2_subdev_fh *fh,
-+			      struct v4l2_subdev_mbus_code_enum *code)
-+{
-+	static const unsigned int codes[] = {
-+		V4L2_MBUS_FMT_ARGB8888_1X32,
-+		V4L2_MBUS_FMT_AYUV8_1X32,
-+	};
-+
-+	if (code->pad == UDS_PAD_SINK) {
-+		if (code->index >= ARRAY_SIZE(codes))
-+			return -EINVAL;
-+
-+		code->code = codes[code->index];
-+	} else {
-+		struct v4l2_mbus_framefmt *format;
-+
-+		/* The UDS can't perform format conversion, the sink format is
-+		 * always identical to the source format.
-+		 */
-+		if (code->index)
-+			return -EINVAL;
-+
-+		format = v4l2_subdev_get_try_format(fh, UDS_PAD_SINK);
-+		code->code = format->code;
-+	}
-+
-+	return 0;
-+}
-+
-+static int uds_enum_frame_size(struct v4l2_subdev *subdev,
-+			       struct v4l2_subdev_fh *fh,
-+			       struct v4l2_subdev_frame_size_enum *fse)
-+{
-+	struct v4l2_mbus_framefmt *format;
-+
-+	format = v4l2_subdev_get_try_format(fh, UDS_PAD_SINK);
-+
-+	if (fse->index || fse->code != format->code)
-+		return -EINVAL;
-+
-+	if (fse->pad == UDS_PAD_SINK) {
-+		fse->min_width = UDS_MIN_SIZE;
-+		fse->max_width = UDS_MAX_SIZE;
-+		fse->min_height = UDS_MIN_SIZE;
-+		fse->max_height = UDS_MAX_SIZE;
-+	} else {
-+		uds_output_limits(format->width, &fse->min_width,
-+				  &fse->max_width);
-+		uds_output_limits(format->height, &fse->min_height,
-+				  &fse->max_height);
-+	}
-+
-+	return 0;
-+}
-+
-+static int uds_get_format(struct v4l2_subdev *subdev, struct v4l2_subdev_fh *fh,
-+			  struct v4l2_subdev_format *fmt)
-+{
-+	struct vsp1_uds *uds = to_uds(subdev);
-+
-+	fmt->format = *vsp1_entity_get_pad_format(&uds->entity, fh, fmt->pad,
-+						  fmt->which);
-+
-+	return 0;
-+}
-+
-+static void uds_try_format(struct vsp1_uds *uds, struct v4l2_subdev_fh *fh,
-+			   unsigned int pad, struct v4l2_mbus_framefmt *fmt,
-+			   enum v4l2_subdev_format_whence which)
-+{
-+	struct v4l2_mbus_framefmt *format;
-+	unsigned int minimum;
-+	unsigned int maximum;
-+
-+	switch (pad) {
-+	case UDS_PAD_SINK:
-+		/* Default to YUV if the requested format is not supported. */
-+		if (fmt->code != V4L2_MBUS_FMT_ARGB8888_1X32 &&
-+		    fmt->code != V4L2_MBUS_FMT_AYUV8_1X32)
-+			fmt->code = V4L2_MBUS_FMT_AYUV8_1X32;
-+
-+		fmt->width = clamp(fmt->width, UDS_MIN_SIZE, UDS_MAX_SIZE);
-+		fmt->height = clamp(fmt->height, UDS_MIN_SIZE, UDS_MAX_SIZE);
-+		break;
-+
-+	case UDS_PAD_SOURCE:
-+		/* The UDS scales but can't perform format conversion. */
-+		format = vsp1_entity_get_pad_format(&uds->entity, fh,
-+						    UDS_PAD_SINK, which);
-+		fmt->code = format->code;
-+
-+		uds_output_limits(format->width, &minimum, &maximum);
-+		fmt->width = clamp(fmt->width, minimum, maximum);
-+		uds_output_limits(format->height, &minimum, &maximum);
-+		fmt->height = clamp(fmt->height, minimum, maximum);
-+		break;
-+	}
-+
-+	fmt->field = V4L2_FIELD_NONE;
-+	fmt->colorspace = V4L2_COLORSPACE_SRGB;
-+}
-+
-+static int uds_set_format(struct v4l2_subdev *subdev, struct v4l2_subdev_fh *fh,
-+			  struct v4l2_subdev_format *fmt)
-+{
-+	struct vsp1_uds *uds = to_uds(subdev);
-+	struct v4l2_mbus_framefmt *format;
-+
-+	uds_try_format(uds, fh, fmt->pad, &fmt->format, fmt->which);
-+
-+	format = vsp1_entity_get_pad_format(&uds->entity, fh, fmt->pad,
-+					    fmt->which);
-+	*format = fmt->format;
-+
-+	if (fmt->pad == UDS_PAD_SINK) {
-+		/* Propagate the format to the source pad. */
-+		format = vsp1_entity_get_pad_format(&uds->entity, fh,
-+						    UDS_PAD_SOURCE, fmt->which);
-+		*format = fmt->format;
-+
-+		uds_try_format(uds, fh, UDS_PAD_SOURCE, format, fmt->which);
-+	}
-+
-+	if (fmt->which == V4L2_SUBDEV_FORMAT_ACTIVE)
-+		uds_compute_ratios(uds);
-+
-+	return 0;
-+}
-+
-+/* -----------------------------------------------------------------------------
-+ * V4L2 Subdevice Operations
-+ */
-+
-+static struct v4l2_subdev_video_ops uds_video_ops = {
-+	.s_stream = uds_s_stream,
-+};
-+
-+static struct v4l2_subdev_pad_ops uds_pad_ops = {
-+	.enum_mbus_code = uds_enum_mbus_code,
-+	.enum_frame_size = uds_enum_frame_size,
-+	.get_fmt = uds_get_format,
-+	.set_fmt = uds_set_format,
-+};
-+
-+static struct v4l2_subdev_ops uds_ops = {
-+	.video	= &uds_video_ops,
-+	.pad    = &uds_pad_ops,
-+};
-+
-+/* -----------------------------------------------------------------------------
-+ * Initialization and Cleanup
-+ */
-+
-+struct vsp1_uds *vsp1_uds_create(struct vsp1_device *vsp1, unsigned int index)
-+{
-+	struct v4l2_subdev *subdev;
-+	struct vsp1_uds *uds;
-+	int ret;
-+
-+	uds = devm_kzalloc(vsp1->dev, sizeof(*uds), GFP_KERNEL);
-+	if (uds == NULL)
-+		return ERR_PTR(-ENOMEM);
-+
-+	uds->entity.type = VSP1_ENTITY_UDS;
-+	uds->entity.index = index;
-+	uds->entity.id = VI6_DPR_NODE_UDS(index);
-+
-+	ret = vsp1_entity_init(vsp1, &uds->entity, 2);
-+	if (ret < 0)
-+		return ERR_PTR(ret);
-+
-+	/* Initialize the V4L2 subdev. */
-+	subdev = &uds->entity.subdev;
-+	v4l2_subdev_init(subdev, &uds_ops);
-+
-+	subdev->entity.ops = &vsp1_media_ops;
-+	subdev->internal_ops = &vsp1_subdev_internal_ops;
-+	snprintf(subdev->name, sizeof(subdev->name), "%s uds.%u",
-+		 dev_name(vsp1->dev), index);
-+	v4l2_set_subdevdata(subdev, uds);
-+	subdev->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
-+
-+	vsp1_entity_init_formats(subdev, NULL);
-+
-+	return uds;
-+}
-diff --git a/drivers/media/platform/vsp1/vsp1_uds.h b/drivers/media/platform/vsp1/vsp1_uds.h
-new file mode 100644
-index 000000000000..972a285abdb9
---- /dev/null
-+++ b/drivers/media/platform/vsp1/vsp1_uds.h
-@@ -0,0 +1,40 @@
-+/*
-+ * vsp1_uds.h  --  R-Car VSP1 Up and Down Scaler
-+ *
-+ * Copyright (C) 2013 Renesas Corporation
-+ *
-+ * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ */
-+#ifndef __VSP1_UDS_H__
-+#define __VSP1_UDS_H__
-+
-+#include <media/media-entity.h>
-+#include <media/v4l2-subdev.h>
-+
-+#include "vsp1_entity.h"
-+
-+struct vsp1_device;
-+
-+#define UDS_PAD_SINK				0
-+#define UDS_PAD_SOURCE				1
-+
-+struct vsp1_uds {
-+	struct vsp1_entity entity;
-+
-+	unsigned int hscale;
-+	unsigned int vscale;
-+};
-+
-+static inline struct vsp1_uds *to_uds(struct v4l2_subdev *subdev)
-+{
-+	return container_of(subdev, struct vsp1_uds, entity.subdev);
-+}
-+
-+struct vsp1_uds *vsp1_uds_create(struct vsp1_device *vsp1, unsigned int index);
-+
-+#endif /* __VSP1_UDS_H__ */
-diff --git a/drivers/media/platform/vsp1/vsp1_video.c b/drivers/media/platform/vsp1/vsp1_video.c
-new file mode 100644
-index 000000000000..279332e34710
---- /dev/null
-+++ b/drivers/media/platform/vsp1/vsp1_video.c
-@@ -0,0 +1,1071 @@
-+/*
-+ * vsp1_video.c  --  R-Car VSP1 Video Node
-+ *
-+ * Copyright (C) 2013 Renesas Corporation
-+ *
-+ * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ */
-+
-+#include <linux/list.h>
-+#include <linux/module.h>
-+#include <linux/mutex.h>
-+#include <linux/sched.h>
-+#include <linux/slab.h>
-+#include <linux/v4l2-mediabus.h>
-+#include <linux/videodev2.h>
-+
-+#include <media/media-entity.h>
-+#include <media/v4l2-dev.h>
-+#include <media/v4l2-fh.h>
-+#include <media/v4l2-ioctl.h>
-+#include <media/v4l2-subdev.h>
-+#include <media/videobuf2-core.h>
-+#include <media/videobuf2-dma-contig.h>
-+
-+#include "vsp1.h"
-+#include "vsp1_entity.h"
-+#include "vsp1_rwpf.h"
-+#include "vsp1_video.h"
-+
-+#define VSP1_VIDEO_DEF_FORMAT		V4L2_PIX_FMT_YUYV
-+#define VSP1_VIDEO_DEF_WIDTH		1024
-+#define VSP1_VIDEO_DEF_HEIGHT		768
-+
-+#define VSP1_VIDEO_MIN_WIDTH		2U
-+#define VSP1_VIDEO_MAX_WIDTH		8190U
-+#define VSP1_VIDEO_MIN_HEIGHT		2U
-+#define VSP1_VIDEO_MAX_HEIGHT		8190U
-+
-+/* -----------------------------------------------------------------------------
-+ * Helper functions
-+ */
-+
-+static const struct vsp1_format_info vsp1_video_formats[] = {
-+	{ V4L2_PIX_FMT_RGB332, V4L2_MBUS_FMT_ARGB8888_1X32,
-+	  VI6_FMT_RGB_332, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
-+	  VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
-+	  1, { 8, 0, 0 }, false, false, 1, 1 },
-+	{ V4L2_PIX_FMT_RGB444, V4L2_MBUS_FMT_ARGB8888_1X32,
-+	  VI6_FMT_XRGB_4444, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
-+	  VI6_RPF_DSWAP_P_WDS,
-+	  1, { 16, 0, 0 }, false, false, 1, 1 },
-+	{ V4L2_PIX_FMT_RGB555, V4L2_MBUS_FMT_ARGB8888_1X32,
-+	  VI6_FMT_XRGB_1555, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
-+	  VI6_RPF_DSWAP_P_WDS,
-+	  1, { 16, 0, 0 }, false, false, 1, 1 },
-+	{ V4L2_PIX_FMT_RGB565, V4L2_MBUS_FMT_ARGB8888_1X32,
-+	  VI6_FMT_RGB_565, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
-+	  VI6_RPF_DSWAP_P_WDS,
-+	  1, { 16, 0, 0 }, false, false, 1, 1 },
-+	{ V4L2_PIX_FMT_BGR24, V4L2_MBUS_FMT_ARGB8888_1X32,
-+	  VI6_FMT_BGR_888, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
-+	  VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
-+	  1, { 24, 0, 0 }, false, false, 1, 1 },
-+	{ V4L2_PIX_FMT_RGB24, V4L2_MBUS_FMT_ARGB8888_1X32,
-+	  VI6_FMT_RGB_888, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
-+	  VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
-+	  1, { 24, 0, 0 }, false, false, 1, 1 },
-+	{ V4L2_PIX_FMT_BGR32, V4L2_MBUS_FMT_ARGB8888_1X32,
-+	  VI6_FMT_ARGB_8888, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS,
-+	  1, { 32, 0, 0 }, false, false, 1, 1 },
-+	{ V4L2_PIX_FMT_RGB32, V4L2_MBUS_FMT_ARGB8888_1X32,
-+	  VI6_FMT_ARGB_8888, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
-+	  VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
-+	  1, { 32, 0, 0 }, false, false, 1, 1 },
-+	{ V4L2_PIX_FMT_UYVY, V4L2_MBUS_FMT_AYUV8_1X32,
-+	  VI6_FMT_YUYV_422, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
-+	  VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
-+	  1, { 16, 0, 0 }, false, false, 2, 1 },
-+	{ V4L2_PIX_FMT_VYUY, V4L2_MBUS_FMT_AYUV8_1X32,
-+	  VI6_FMT_YUYV_422, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
-+	  VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
-+	  1, { 16, 0, 0 }, false, true, 2, 1 },
-+	{ V4L2_PIX_FMT_YUYV, V4L2_MBUS_FMT_AYUV8_1X32,
-+	  VI6_FMT_YUYV_422, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
-+	  VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
-+	  1, { 16, 0, 0 }, true, false, 2, 1 },
-+	{ V4L2_PIX_FMT_YVYU, V4L2_MBUS_FMT_AYUV8_1X32,
-+	  VI6_FMT_YUYV_422, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
-+	  VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
-+	  1, { 16, 0, 0 }, true, true, 2, 1 },
-+	{ V4L2_PIX_FMT_NV12M, V4L2_MBUS_FMT_AYUV8_1X32,
-+	  VI6_FMT_Y_UV_420, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
-+	  VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
-+	  2, { 8, 16, 0 }, false, false, 2, 2 },
-+	{ V4L2_PIX_FMT_NV21M, V4L2_MBUS_FMT_AYUV8_1X32,
-+	  VI6_FMT_Y_UV_420, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
-+	  VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
-+	  2, { 8, 16, 0 }, false, true, 2, 2 },
-+	{ V4L2_PIX_FMT_NV16M, V4L2_MBUS_FMT_AYUV8_1X32,
-+	  VI6_FMT_Y_UV_422, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
-+	  VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
-+	  2, { 8, 16, 0 }, false, false, 2, 1 },
-+	{ V4L2_PIX_FMT_NV61M, V4L2_MBUS_FMT_AYUV8_1X32,
-+	  VI6_FMT_Y_UV_422, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
-+	  VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
-+	  2, { 8, 16, 0 }, false, true, 2, 1 },
-+	{ V4L2_PIX_FMT_YUV420M, V4L2_MBUS_FMT_AYUV8_1X32,
-+	  VI6_FMT_Y_U_V_420, VI6_RPF_DSWAP_P_LLS | VI6_RPF_DSWAP_P_LWS |
-+	  VI6_RPF_DSWAP_P_WDS | VI6_RPF_DSWAP_P_BTS,
-+	  3, { 8, 8, 8 }, false, false, 2, 2 },
-+};
-+
-+/*
-+ * vsp1_get_format_info - Retrieve format information for a 4CC
-+ * @fourcc: the format 4CC
-+ *
-+ * Return a pointer to the format information structure corresponding to the
-+ * given V4L2 format 4CC, or NULL if no corresponding format can be found.
-+ */
-+static const struct vsp1_format_info *vsp1_get_format_info(u32 fourcc)
-+{
-+	unsigned int i;
-+
-+	for (i = 0; i < ARRAY_SIZE(vsp1_video_formats); ++i) {
-+		const struct vsp1_format_info *info = &vsp1_video_formats[i];
-+
-+		if (info->fourcc == fourcc)
-+			return info;
-+	}
-+
-+	return NULL;
-+}
-+
-+
-+static struct v4l2_subdev *
-+vsp1_video_remote_subdev(struct media_pad *local, u32 *pad)
-+{
-+	struct media_pad *remote;
-+
-+	remote = media_entity_remote_source(local);
-+	if (remote == NULL ||
-+	    media_entity_type(remote->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
-+		return NULL;
-+
-+	if (pad)
-+		*pad = remote->index;
-+
-+	return media_entity_to_v4l2_subdev(remote->entity);
-+}
-+
-+static int vsp1_video_verify_format(struct vsp1_video *video)
-+{
-+	struct v4l2_subdev_format fmt;
-+	struct v4l2_subdev *subdev;
-+	int ret;
-+
-+	subdev = vsp1_video_remote_subdev(&video->pad, &fmt.pad);
-+	if (subdev == NULL)
-+		return -EINVAL;
-+
-+	fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
-+	ret = v4l2_subdev_call(subdev, pad, get_fmt, NULL, &fmt);
-+	if (ret < 0)
-+		return ret == -ENOIOCTLCMD ? -EINVAL : ret;
-+
-+	if (video->fmtinfo->mbus != fmt.format.code ||
-+	    video->format.height != fmt.format.height ||
-+	    video->format.width != fmt.format.width)
-+		return -EINVAL;
-+
-+	return 0;
-+}
-+
-+static int __vsp1_video_try_format(struct vsp1_video *video,
-+				   struct v4l2_pix_format_mplane *pix,
-+				   const struct vsp1_format_info **fmtinfo)
-+{
-+	const struct vsp1_format_info *info;
-+	unsigned int width = pix->width;
-+	unsigned int height = pix->height;
-+	unsigned int i;
-+
-+	/* Retrieve format information and select the default format if the
-+	 * requested format isn't supported.
-+	 */
-+	info = vsp1_get_format_info(pix->pixelformat);
-+	if (info == NULL)
-+		info = vsp1_get_format_info(VSP1_VIDEO_DEF_FORMAT);
-+
-+	pix->pixelformat = info->fourcc;
-+	pix->colorspace = V4L2_COLORSPACE_SRGB;
-+	pix->field = V4L2_FIELD_NONE;
-+	memset(pix->reserved, 0, sizeof(pix->reserved));
-+
-+	/* Align the width and height for YUV 4:2:2 and 4:2:0 formats. */
-+	width = round_down(width, info->hsub);
-+	height = round_down(height, info->vsub);
-+
-+	/* Clamp the width and height. */
-+	pix->width = clamp(width, VSP1_VIDEO_MIN_WIDTH, VSP1_VIDEO_MAX_WIDTH);
-+	pix->height = clamp(height, VSP1_VIDEO_MIN_HEIGHT,
-+			    VSP1_VIDEO_MAX_HEIGHT);
-+
-+	/* Compute and clamp the stride and image size. While not documented in
-+	 * the datasheet, strides not aligned to a multiple of 128 bytes result
-+	 * in image corruption.
-+	 */
-+	for (i = 0; i < max(info->planes, 2U); ++i) {
-+		unsigned int hsub = i > 0 ? info->hsub : 1;
-+		unsigned int vsub = i > 0 ? info->vsub : 1;
-+		unsigned int align = 128;
-+		unsigned int bpl;
-+
-+		bpl = clamp_t(unsigned int, pix->plane_fmt[i].bytesperline,
-+			      pix->width / hsub * info->bpp[i] / 8,
-+			      round_down(65535U, align));
-+
-+		pix->plane_fmt[i].bytesperline = round_up(bpl, align);
-+		pix->plane_fmt[i].sizeimage = pix->plane_fmt[i].bytesperline
-+					    * pix->height / vsub;
-+	}
-+
-+	if (info->planes == 3) {
-+		/* The second and third planes must have the same stride. */
-+		pix->plane_fmt[2].bytesperline = pix->plane_fmt[1].bytesperline;
-+		pix->plane_fmt[2].sizeimage = pix->plane_fmt[1].sizeimage;
-+	}
-+
-+	pix->num_planes = info->planes;
-+
-+	if (fmtinfo)
-+		*fmtinfo = info;
-+
-+	return 0;
-+}
-+
-+static bool
-+vsp1_video_format_adjust(struct vsp1_video *video,
-+			 const struct v4l2_pix_format_mplane *format,
-+			 struct v4l2_pix_format_mplane *adjust)
-+{
-+	unsigned int i;
-+
-+	*adjust = *format;
-+	__vsp1_video_try_format(video, adjust, NULL);
-+
-+	if (format->width != adjust->width ||
-+	    format->height != adjust->height ||
-+	    format->pixelformat != adjust->pixelformat ||
-+	    format->num_planes != adjust->num_planes)
-+		return false;
-+
-+	for (i = 0; i < format->num_planes; ++i) {
-+		if (format->plane_fmt[i].bytesperline !=
-+		    adjust->plane_fmt[i].bytesperline)
-+			return false;
-+
-+		adjust->plane_fmt[i].sizeimage =
-+			max(adjust->plane_fmt[i].sizeimage,
-+			    format->plane_fmt[i].sizeimage);
-+	}
-+
-+	return true;
-+}
-+
-+/* -----------------------------------------------------------------------------
-+ * Pipeline Management
-+ */
-+
-+static int vsp1_pipeline_validate_branch(struct vsp1_rwpf *input,
-+					 struct vsp1_rwpf *output)
-+{
-+	struct vsp1_entity *entity;
-+	unsigned int entities = 0;
-+	struct media_pad *pad;
-+	bool uds_found = false;
-+
-+	pad = media_entity_remote_source(&input->entity.pads[RWPF_PAD_SOURCE]);
-+
-+	while (1) {
-+		if (pad == NULL)
-+			return -EPIPE;
-+
-+		/* We've reached a video node, that shouldn't have happened. */
-+		if (media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
-+			return -EPIPE;
-+
-+		entity = to_vsp1_entity(media_entity_to_v4l2_subdev(pad->entity));
-+
-+		/* We've reached the WPF, we're done. */
-+		if (entity->type == VSP1_ENTITY_WPF)
-+			break;
-+
-+		/* Ensure the branch has no loop. */
-+		if (entities & (1 << entity->subdev.entity.id))
-+			return -EPIPE;
-+
-+		entities |= 1 << entity->subdev.entity.id;
-+
-+		/* UDS can't be chained. */
-+		if (entity->type == VSP1_ENTITY_UDS) {
-+			if (uds_found)
-+				return -EPIPE;
-+			uds_found = true;
-+		}
-+
-+		/* Follow the source link. The link setup operations ensure
-+		 * that the output fan-out can't be more than one, there is thus
-+		 * no need to verify here that only a single source link is
-+		 * activated.
-+		 */
-+		pad = &entity->pads[entity->source_pad];
-+		pad = media_entity_remote_source(pad);
-+	}
-+
-+	/* The last entity must be the output WPF. */
-+	if (entity != &output->entity)
-+		return -EPIPE;
-+
-+	return 0;
-+}
-+
-+static int vsp1_pipeline_validate(struct vsp1_pipeline *pipe,
-+				  struct vsp1_video *video)
-+{
-+	struct media_entity_graph graph;
-+	struct media_entity *entity = &video->video.entity;
-+	struct media_device *mdev = entity->parent;
-+	unsigned int i;
-+	int ret;
-+
-+	mutex_lock(&mdev->graph_mutex);
-+
-+	/* Walk the graph to locate the entities and video nodes. */
-+	media_entity_graph_walk_start(&graph, entity);
-+
-+	while ((entity = media_entity_graph_walk_next(&graph))) {
-+		struct v4l2_subdev *subdev;
-+		struct vsp1_rwpf *rwpf;
-+		struct vsp1_entity *e;
-+
-+		if (media_entity_type(entity) != MEDIA_ENT_T_V4L2_SUBDEV) {
-+			pipe->num_video++;
-+			continue;
-+		}
-+
-+		subdev = media_entity_to_v4l2_subdev(entity);
-+		e = to_vsp1_entity(subdev);
-+		list_add_tail(&e->list_pipe, &pipe->entities);
-+
-+		if (e->type == VSP1_ENTITY_RPF) {
-+			rwpf = to_rwpf(subdev);
-+			pipe->inputs[pipe->num_inputs++] = rwpf;
-+			rwpf->video.pipe_index = pipe->num_inputs;
-+		} else if (e->type == VSP1_ENTITY_WPF) {
-+			rwpf = to_rwpf(subdev);
-+			pipe->output = to_rwpf(subdev);
-+			rwpf->video.pipe_index = 0;
-+		} else if (e->type == VSP1_ENTITY_LIF) {
-+			pipe->lif = e;
-+		}
-+	}
-+
-+	mutex_unlock(&mdev->graph_mutex);
-+
-+	/* We need one output and at least one input. */
-+	if (pipe->num_inputs == 0 || !pipe->output) {
-+		ret = -EPIPE;
-+		goto error;
-+	}
-+
-+	/* Follow links downstream for each input and make sure the graph
-+	 * contains no loop and that all branches end at the output WPF.
-+	 */
-+	for (i = 0; i < pipe->num_inputs; ++i) {
-+		ret = vsp1_pipeline_validate_branch(pipe->inputs[i],
-+						    pipe->output);
-+		if (ret < 0)
-+			goto error;
-+	}
-+
-+	return 0;
-+
-+error:
-+	INIT_LIST_HEAD(&pipe->entities);
-+	pipe->buffers_ready = 0;
-+	pipe->num_video = 0;
-+	pipe->num_inputs = 0;
-+	pipe->output = NULL;
-+	pipe->lif = NULL;
-+	return ret;
-+}
-+
-+static int vsp1_pipeline_init(struct vsp1_pipeline *pipe,
-+			      struct vsp1_video *video)
-+{
-+	int ret;
-+
-+	mutex_lock(&pipe->lock);
-+
-+	/* If we're the first user validate and initialize the pipeline. */
-+	if (pipe->use_count == 0) {
-+		ret = vsp1_pipeline_validate(pipe, video);
-+		if (ret < 0)
-+			goto done;
-+	}
-+
-+	pipe->use_count++;
-+	ret = 0;
-+
-+done:
-+	mutex_unlock(&pipe->lock);
-+	return ret;
-+}
-+
-+static void vsp1_pipeline_cleanup(struct vsp1_pipeline *pipe)
-+{
-+	mutex_lock(&pipe->lock);
-+
-+	/* If we're the last user clean up the pipeline. */
-+	if (--pipe->use_count == 0) {
-+		INIT_LIST_HEAD(&pipe->entities);
-+		pipe->state = VSP1_PIPELINE_STOPPED;
-+		pipe->buffers_ready = 0;
-+		pipe->num_video = 0;
-+		pipe->num_inputs = 0;
-+		pipe->output = NULL;
-+		pipe->lif = NULL;
-+	}
-+
-+	mutex_unlock(&pipe->lock);
-+}
-+
-+static void vsp1_pipeline_run(struct vsp1_pipeline *pipe)
-+{
-+	struct vsp1_device *vsp1 = pipe->output->entity.vsp1;
-+
-+	vsp1_write(vsp1, VI6_CMD(pipe->output->entity.index), VI6_CMD_STRCMD);
-+	pipe->state = VSP1_PIPELINE_RUNNING;
-+	pipe->buffers_ready = 0;
-+}
-+
-+static int vsp1_pipeline_stop(struct vsp1_pipeline *pipe)
-+{
-+	struct vsp1_entity *entity;
-+	unsigned long flags;
-+	int ret;
-+
-+	spin_lock_irqsave(&pipe->irqlock, flags);
-+	pipe->state = VSP1_PIPELINE_STOPPING;
-+	spin_unlock_irqrestore(&pipe->irqlock, flags);
-+
-+	ret = wait_event_timeout(pipe->wq, pipe->state == VSP1_PIPELINE_STOPPED,
-+				 msecs_to_jiffies(500));
-+	ret = ret == 0 ? -ETIMEDOUT : 0;
-+
-+	list_for_each_entry(entity, &pipe->entities, list_pipe) {
-+		if (entity->route)
-+			vsp1_write(entity->vsp1, entity->route,
-+				   VI6_DPR_NODE_UNUSED);
-+
-+		v4l2_subdev_call(&entity->subdev, video, s_stream, 0);
-+	}
-+
-+	return ret;
-+}
-+
-+static bool vsp1_pipeline_ready(struct vsp1_pipeline *pipe)
-+{
-+	unsigned int mask;
-+
-+	mask = ((1 << pipe->num_inputs) - 1) << 1;
-+	if (!pipe->lif)
-+		mask |= 1 << 0;
-+
-+	return pipe->buffers_ready == mask;
-+}
-+
-+/*
-+ * vsp1_video_complete_buffer - Complete the current buffer
-+ * @video: the video node
-+ *
-+ * This function completes the current buffer by filling its sequence number,
-+ * time stamp and payload size, and hands it back to the videobuf core.
-+ *
-+ * Return the next queued buffer or NULL if the queue is empty.
-+ */
-+static struct vsp1_video_buffer *
-+vsp1_video_complete_buffer(struct vsp1_video *video)
-+{
-+	struct vsp1_video_buffer *next = NULL;
-+	struct vsp1_video_buffer *done;
-+	unsigned long flags;
-+	unsigned int i;
-+
-+	spin_lock_irqsave(&video->irqlock, flags);
-+
-+	if (list_empty(&video->irqqueue)) {
-+		spin_unlock_irqrestore(&video->irqlock, flags);
-+		return NULL;
-+	}
-+
-+	done = list_first_entry(&video->irqqueue,
-+				struct vsp1_video_buffer, queue);
-+	list_del(&done->queue);
-+
-+	if (!list_empty(&video->irqqueue))
-+		next = list_first_entry(&video->irqqueue,
-+					struct vsp1_video_buffer, queue);
-+
-+	spin_unlock_irqrestore(&video->irqlock, flags);
-+
-+	done->buf.v4l2_buf.sequence = video->sequence++;
-+	v4l2_get_timestamp(&done->buf.v4l2_buf.timestamp);
-+	for (i = 0; i < done->buf.num_planes; ++i)
-+		vb2_set_plane_payload(&done->buf, i, done->length[i]);
-+	vb2_buffer_done(&done->buf, VB2_BUF_STATE_DONE);
-+
-+	return next;
-+}
-+
-+static void vsp1_video_frame_end(struct vsp1_pipeline *pipe,
-+				 struct vsp1_video *video)
-+{
-+	struct vsp1_video_buffer *buf;
-+	unsigned long flags;
-+
-+	buf = vsp1_video_complete_buffer(video);
-+	if (buf == NULL)
-+		return;
-+
-+	spin_lock_irqsave(&pipe->irqlock, flags);
-+
-+	video->ops->queue(video, buf);
-+	pipe->buffers_ready |= 1 << video->pipe_index;
-+
-+	spin_unlock_irqrestore(&pipe->irqlock, flags);
-+}
-+
-+void vsp1_pipeline_frame_end(struct vsp1_pipeline *pipe)
-+{
-+	unsigned long flags;
-+	unsigned int i;
-+
-+	if (pipe == NULL)
-+		return;
-+
-+	/* Complete buffers on all video nodes. */
-+	for (i = 0; i < pipe->num_inputs; ++i)
-+		vsp1_video_frame_end(pipe, &pipe->inputs[i]->video);
-+
-+	if (!pipe->lif)
-+		vsp1_video_frame_end(pipe, &pipe->output->video);
-+
-+	spin_lock_irqsave(&pipe->irqlock, flags);
-+
-+	/* If a stop has been requested, mark the pipeline as stopped and
-+	 * return.
-+	 */
-+	if (pipe->state == VSP1_PIPELINE_STOPPING) {
-+		pipe->state = VSP1_PIPELINE_STOPPED;
-+		wake_up(&pipe->wq);
-+		goto done;
-+	}
-+
-+	/* Restart the pipeline if ready. */
-+	if (vsp1_pipeline_ready(pipe))
-+		vsp1_pipeline_run(pipe);
-+
-+done:
-+	spin_unlock_irqrestore(&pipe->irqlock, flags);
-+}
-+
-+/* -----------------------------------------------------------------------------
-+ * videobuf2 Queue Operations
-+ */
-+
-+static int
-+vsp1_video_queue_setup(struct vb2_queue *vq, const struct v4l2_format *fmt,
-+		     unsigned int *nbuffers, unsigned int *nplanes,
-+		     unsigned int sizes[], void *alloc_ctxs[])
-+{
-+	struct vsp1_video *video = vb2_get_drv_priv(vq);
-+	const struct v4l2_pix_format_mplane *format;
-+	struct v4l2_pix_format_mplane pix_mp;
-+	unsigned int i;
-+
-+	if (fmt) {
-+		/* Make sure the format is valid and adjust the sizeimage field
-+		 * if needed.
-+		 */
-+		if (!vsp1_video_format_adjust(video, &fmt->fmt.pix_mp, &pix_mp))
-+			return -EINVAL;
-+
-+		format = &pix_mp;
-+	} else {
-+		format = &video->format;
-+	}
-+
-+	*nplanes = format->num_planes;
-+
-+	for (i = 0; i < format->num_planes; ++i) {
-+		sizes[i] = format->plane_fmt[i].sizeimage;
-+		alloc_ctxs[i] = video->alloc_ctx;
-+	}
-+
-+	return 0;
-+}
-+
-+static int vsp1_video_buffer_prepare(struct vb2_buffer *vb)
-+{
-+	struct vsp1_video *video = vb2_get_drv_priv(vb->vb2_queue);
-+	struct vsp1_video_buffer *buf = to_vsp1_video_buffer(vb);
-+	const struct v4l2_pix_format_mplane *format = &video->format;
-+	unsigned int i;
-+
-+	if (vb->num_planes < format->num_planes)
-+		return -EINVAL;
-+
-+	buf->video = video;
-+
-+	for (i = 0; i < vb->num_planes; ++i) {
-+		buf->addr[i] = vb2_dma_contig_plane_dma_addr(vb, i);
-+		buf->length[i] = vb2_plane_size(vb, i);
-+
-+		if (buf->length[i] < format->plane_fmt[i].sizeimage)
-+			return -EINVAL;
-+	}
-+
-+	return 0;
-+}
-+
-+static void vsp1_video_buffer_queue(struct vb2_buffer *vb)
-+{
-+	struct vsp1_video *video = vb2_get_drv_priv(vb->vb2_queue);
-+	struct vsp1_pipeline *pipe = to_vsp1_pipeline(&video->video.entity);
-+	struct vsp1_video_buffer *buf = to_vsp1_video_buffer(vb);
-+	unsigned long flags;
-+	bool empty;
-+
-+	spin_lock_irqsave(&video->irqlock, flags);
-+	empty = list_empty(&video->irqqueue);
-+	list_add_tail(&buf->queue, &video->irqqueue);
-+	spin_unlock_irqrestore(&video->irqlock, flags);
-+
-+	if (!empty)
-+		return;
-+
-+	spin_lock_irqsave(&pipe->irqlock, flags);
-+
-+	video->ops->queue(video, buf);
-+	pipe->buffers_ready |= 1 << video->pipe_index;
-+
-+	if (vb2_is_streaming(&video->queue) &&
-+	    vsp1_pipeline_ready(pipe))
-+		vsp1_pipeline_run(pipe);
-+
-+	spin_unlock_irqrestore(&pipe->irqlock, flags);
-+}
-+
-+static void vsp1_entity_route_setup(struct vsp1_entity *source)
-+{
-+	struct vsp1_entity *sink;
-+
-+	if (source->route == 0)
-+		return;
-+
-+	sink = container_of(source->sink, struct vsp1_entity, subdev.entity);
-+	vsp1_write(source->vsp1, source->route, sink->id);
-+}
-+
-+static int vsp1_video_start_streaming(struct vb2_queue *vq, unsigned int count)
-+{
-+	struct vsp1_video *video = vb2_get_drv_priv(vq);
-+	struct vsp1_pipeline *pipe = to_vsp1_pipeline(&video->video.entity);
-+	struct vsp1_entity *entity;
-+	unsigned long flags;
-+	int ret;
-+
-+	mutex_lock(&pipe->lock);
-+	if (pipe->stream_count == pipe->num_video - 1) {
-+		list_for_each_entry(entity, &pipe->entities, list_pipe) {
-+			vsp1_entity_route_setup(entity);
-+
-+			ret = v4l2_subdev_call(&entity->subdev, video,
-+					       s_stream, 1);
-+			if (ret < 0) {
-+				mutex_unlock(&pipe->lock);
-+				return ret;
-+			}
-+		}
-+	}
-+
-+	pipe->stream_count++;
-+	mutex_unlock(&pipe->lock);
-+
-+	spin_lock_irqsave(&pipe->irqlock, flags);
-+	if (vsp1_pipeline_ready(pipe))
-+		vsp1_pipeline_run(pipe);
-+	spin_unlock_irqrestore(&pipe->irqlock, flags);
-+
-+	return 0;
-+}
-+
-+static int vsp1_video_stop_streaming(struct vb2_queue *vq)
-+{
-+	struct vsp1_video *video = vb2_get_drv_priv(vq);
-+	struct vsp1_pipeline *pipe = to_vsp1_pipeline(&video->video.entity);
-+	unsigned long flags;
-+	int ret;
-+
-+	mutex_lock(&pipe->lock);
-+	if (--pipe->stream_count == 0) {
-+		/* Stop the pipeline. */
-+		ret = vsp1_pipeline_stop(pipe);
-+		if (ret == -ETIMEDOUT)
-+			dev_err(video->vsp1->dev, "pipeline stop timeout\n");
-+	}
-+	mutex_unlock(&pipe->lock);
-+
-+	vsp1_pipeline_cleanup(pipe);
-+	media_entity_pipeline_stop(&video->video.entity);
-+
-+	/* Remove all buffers from the IRQ queue. */
-+	spin_lock_irqsave(&video->irqlock, flags);
-+	INIT_LIST_HEAD(&video->irqqueue);
-+	spin_unlock_irqrestore(&video->irqlock, flags);
-+
-+	return 0;
-+}
-+
-+static struct vb2_ops vsp1_video_queue_qops = {
-+	.queue_setup = vsp1_video_queue_setup,
-+	.buf_prepare = vsp1_video_buffer_prepare,
-+	.buf_queue = vsp1_video_buffer_queue,
-+	.wait_prepare = vb2_ops_wait_prepare,
-+	.wait_finish = vb2_ops_wait_finish,
-+	.start_streaming = vsp1_video_start_streaming,
-+	.stop_streaming = vsp1_video_stop_streaming,
-+};
-+
-+/* -----------------------------------------------------------------------------
-+ * V4L2 ioctls
-+ */
-+
-+static int
-+vsp1_video_querycap(struct file *file, void *fh, struct v4l2_capability *cap)
-+{
-+	struct v4l2_fh *vfh = file->private_data;
-+	struct vsp1_video *video = to_vsp1_video(vfh->vdev);
-+
-+	cap->capabilities = V4L2_CAP_DEVICE_CAPS | V4L2_CAP_STREAMING
-+			  | V4L2_CAP_VIDEO_CAPTURE_MPLANE
-+			  | V4L2_CAP_VIDEO_OUTPUT_MPLANE;
-+
-+	if (video->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
-+		cap->device_caps = V4L2_CAP_VIDEO_CAPTURE_MPLANE
-+				 | V4L2_CAP_STREAMING;
-+	else
-+		cap->device_caps = V4L2_CAP_VIDEO_OUTPUT_MPLANE
-+				 | V4L2_CAP_STREAMING;
-+
-+	strlcpy(cap->driver, "vsp1", sizeof(cap->driver));
-+	strlcpy(cap->card, video->video.name, sizeof(cap->card));
-+	snprintf(cap->bus_info, sizeof(cap->bus_info), "platform:%s",
-+		 dev_name(video->vsp1->dev));
-+
-+	return 0;
-+}
-+
-+static int
-+vsp1_video_get_format(struct file *file, void *fh, struct v4l2_format *format)
-+{
-+	struct v4l2_fh *vfh = file->private_data;
-+	struct vsp1_video *video = to_vsp1_video(vfh->vdev);
-+
-+	if (format->type != video->queue.type)
-+		return -EINVAL;
-+
-+	mutex_lock(&video->lock);
-+	format->fmt.pix_mp = video->format;
-+	mutex_unlock(&video->lock);
-+
-+	return 0;
-+}
-+
-+static int
-+vsp1_video_try_format(struct file *file, void *fh, struct v4l2_format *format)
-+{
-+	struct v4l2_fh *vfh = file->private_data;
-+	struct vsp1_video *video = to_vsp1_video(vfh->vdev);
-+
-+	if (format->type != video->queue.type)
-+		return -EINVAL;
-+
-+	return __vsp1_video_try_format(video, &format->fmt.pix_mp, NULL);
-+}
-+
-+static int
-+vsp1_video_set_format(struct file *file, void *fh, struct v4l2_format *format)
-+{
-+	struct v4l2_fh *vfh = file->private_data;
-+	struct vsp1_video *video = to_vsp1_video(vfh->vdev);
-+	const struct vsp1_format_info *info;
-+	int ret;
-+
-+	if (format->type != video->queue.type)
-+		return -EINVAL;
-+
-+	ret = __vsp1_video_try_format(video, &format->fmt.pix_mp, &info);
-+	if (ret < 0)
-+		return ret;
-+
-+	mutex_lock(&video->lock);
-+
-+	if (vb2_is_busy(&video->queue)) {
-+		ret = -EBUSY;
-+		goto done;
-+	}
-+
-+	video->format = format->fmt.pix_mp;
-+	video->fmtinfo = info;
-+
-+done:
-+	mutex_unlock(&video->lock);
-+	return ret;
-+}
-+
-+static int
-+vsp1_video_streamon(struct file *file, void *fh, enum v4l2_buf_type type)
-+{
-+	struct v4l2_fh *vfh = file->private_data;
-+	struct vsp1_video *video = to_vsp1_video(vfh->vdev);
-+	struct vsp1_pipeline *pipe;
-+	int ret;
-+
-+	mutex_lock(&video->lock);
-+
-+	if (video->queue.owner && video->queue.owner != file->private_data)
-+		return -EBUSY;
-+
-+	video->sequence = 0;
-+
-+	/* Start streaming on the pipeline. No link touching an entity in the
-+	 * pipeline can be activated or deactivated once streaming is started.
-+	 *
-+	 * Use the VSP1 pipeline object embedded in the first video object that
-+	 * starts streaming.
-+	 */
-+	pipe = video->video.entity.pipe
-+	     ? to_vsp1_pipeline(&video->video.entity) : &video->pipe;
-+
-+	ret = media_entity_pipeline_start(&video->video.entity, &pipe->pipe);
-+	if (ret < 0)
-+		return ret;
-+
-+	/* Verify that the configured format matches the output of the connected
-+	 * subdev.
-+	 */
-+	ret = vsp1_video_verify_format(video);
-+	if (ret < 0)
-+		goto err_stop;
-+
-+	ret = vsp1_pipeline_init(pipe, video);
-+	if (ret < 0)
-+		goto err_stop;
-+
-+	/* Start the queue. */
-+	ret = vb2_streamon(&video->queue, type);
-+	if (ret < 0)
-+		goto err_cleanup;
-+
-+	return 0;
-+
-+err_cleanup:
-+	vsp1_pipeline_cleanup(pipe);
-+err_stop:
-+	media_entity_pipeline_stop(&video->video.entity);
-+	return ret;
-+}
-+
-+static const struct v4l2_ioctl_ops vsp1_video_ioctl_ops = {
-+	.vidioc_querycap		= vsp1_video_querycap,
-+	.vidioc_g_fmt_vid_cap_mplane	= vsp1_video_get_format,
-+	.vidioc_s_fmt_vid_cap_mplane	= vsp1_video_set_format,
-+	.vidioc_try_fmt_vid_cap_mplane	= vsp1_video_try_format,
-+	.vidioc_g_fmt_vid_out_mplane	= vsp1_video_get_format,
-+	.vidioc_s_fmt_vid_out_mplane	= vsp1_video_set_format,
-+	.vidioc_try_fmt_vid_out_mplane	= vsp1_video_try_format,
-+	.vidioc_reqbufs			= vb2_ioctl_reqbufs,
-+	.vidioc_querybuf		= vb2_ioctl_querybuf,
-+	.vidioc_qbuf			= vb2_ioctl_qbuf,
-+	.vidioc_dqbuf			= vb2_ioctl_dqbuf,
-+	.vidioc_create_bufs		= vb2_ioctl_create_bufs,
-+	.vidioc_prepare_buf		= vb2_ioctl_prepare_buf,
-+	.vidioc_streamon		= vsp1_video_streamon,
-+	.vidioc_streamoff		= vb2_ioctl_streamoff,
-+};
-+
-+/* -----------------------------------------------------------------------------
-+ * V4L2 File Operations
-+ */
-+
-+static int vsp1_video_open(struct file *file)
-+{
-+	struct vsp1_video *video = video_drvdata(file);
-+	struct v4l2_fh *vfh;
-+	int ret = 0;
-+
-+	vfh = kzalloc(sizeof(*vfh), GFP_KERNEL);
-+	if (vfh == NULL)
-+		return -ENOMEM;
-+
-+	v4l2_fh_init(vfh, &video->video);
-+	v4l2_fh_add(vfh);
-+
-+	file->private_data = vfh;
-+
-+	if (!vsp1_device_get(video->vsp1)) {
-+		ret = -EBUSY;
-+		v4l2_fh_del(vfh);
-+		kfree(vfh);
-+	}
-+
-+	return ret;
-+}
-+
-+static int vsp1_video_release(struct file *file)
-+{
-+	struct vsp1_video *video = video_drvdata(file);
-+	struct v4l2_fh *vfh = file->private_data;
-+
-+	mutex_lock(&video->lock);
-+	if (video->queue.owner == vfh) {
-+		vb2_queue_release(&video->queue);
-+		video->queue.owner = NULL;
-+	}
-+	mutex_unlock(&video->lock);
-+
-+	vsp1_device_put(video->vsp1);
-+
-+	v4l2_fh_release(file);
-+
-+	file->private_data = NULL;
-+
-+	return 0;
-+}
-+
-+static struct v4l2_file_operations vsp1_video_fops = {
-+	.owner = THIS_MODULE,
-+	.unlocked_ioctl = video_ioctl2,
-+	.open = vsp1_video_open,
-+	.release = vsp1_video_release,
-+	.poll = vb2_fop_poll,
-+	.mmap = vb2_fop_mmap,
-+};
-+
-+/* -----------------------------------------------------------------------------
-+ * Initialization and Cleanup
-+ */
-+
-+int vsp1_video_init(struct vsp1_video *video, struct vsp1_entity *rwpf)
-+{
-+	const char *direction;
-+	int ret;
-+
-+	switch (video->type) {
-+	case V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE:
-+		direction = "output";
-+		video->pad.flags = MEDIA_PAD_FL_SINK;
-+		break;
-+
-+	case V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE:
-+		direction = "input";
-+		video->pad.flags = MEDIA_PAD_FL_SOURCE;
-+		video->video.vfl_dir = VFL_DIR_TX;
-+		break;
-+
-+	default:
-+		return -EINVAL;
-+	}
-+
-+	video->rwpf = rwpf;
-+
-+	mutex_init(&video->lock);
-+	spin_lock_init(&video->irqlock);
-+	INIT_LIST_HEAD(&video->irqqueue);
-+
-+	mutex_init(&video->pipe.lock);
-+	spin_lock_init(&video->pipe.irqlock);
-+	INIT_LIST_HEAD(&video->pipe.entities);
-+	init_waitqueue_head(&video->pipe.wq);
-+	video->pipe.state = VSP1_PIPELINE_STOPPED;
-+
-+	/* Initialize the media entity... */
-+	ret = media_entity_init(&video->video.entity, 1, &video->pad, 0);
-+	if (ret < 0)
-+		return ret;
-+
-+	/* ... and the format ... */
-+	video->fmtinfo = vsp1_get_format_info(VSP1_VIDEO_DEF_FORMAT);
-+	video->format.pixelformat = video->fmtinfo->fourcc;
-+	video->format.colorspace = V4L2_COLORSPACE_SRGB;
-+	video->format.field = V4L2_FIELD_NONE;
-+	video->format.width = VSP1_VIDEO_DEF_WIDTH;
-+	video->format.height = VSP1_VIDEO_DEF_HEIGHT;
-+	video->format.num_planes = 1;
-+	video->format.plane_fmt[0].bytesperline =
-+		video->format.width * video->fmtinfo->bpp[0] / 8;
-+	video->format.plane_fmt[0].sizeimage =
-+		video->format.plane_fmt[0].bytesperline * video->format.height;
-+
-+	/* ... and the video node... */
-+	video->video.v4l2_dev = &video->vsp1->v4l2_dev;
-+	video->video.fops = &vsp1_video_fops;
-+	snprintf(video->video.name, sizeof(video->video.name), "%s %s",
-+		 rwpf->subdev.name, direction);
-+	video->video.vfl_type = VFL_TYPE_GRABBER;
-+	video->video.release = video_device_release_empty;
-+	video->video.ioctl_ops = &vsp1_video_ioctl_ops;
-+
-+	video_set_drvdata(&video->video, video);
-+
-+	/* ... and the buffers queue... */
-+	video->alloc_ctx = vb2_dma_contig_init_ctx(video->vsp1->dev);
-+	if (IS_ERR(video->alloc_ctx))
-+		goto error;
-+
-+	video->queue.type = video->type;
-+	video->queue.io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF;
-+	video->queue.lock = &video->lock;
-+	video->queue.drv_priv = video;
-+	video->queue.buf_struct_size = sizeof(struct vsp1_video_buffer);
-+	video->queue.ops = &vsp1_video_queue_qops;
-+	video->queue.mem_ops = &vb2_dma_contig_memops;
-+	video->queue.timestamp_type = V4L2_BUF_FLAG_TIMESTAMP_COPY;
-+	ret = vb2_queue_init(&video->queue);
-+	if (ret < 0) {
-+		dev_err(video->vsp1->dev, "failed to initialize vb2 queue\n");
-+		goto error;
-+	}
-+
-+	/* ... and register the video device. */
-+	video->video.queue = &video->queue;
-+	ret = video_register_device(&video->video, VFL_TYPE_GRABBER, -1);
-+	if (ret < 0) {
-+		dev_err(video->vsp1->dev, "failed to register video device\n");
-+		goto error;
-+	}
-+
-+	return 0;
-+
-+error:
-+	vb2_dma_contig_cleanup_ctx(video->alloc_ctx);
-+	vsp1_video_cleanup(video);
-+	return ret;
-+}
-+
-+void vsp1_video_cleanup(struct vsp1_video *video)
-+{
-+	if (video_is_registered(&video->video))
-+		video_unregister_device(&video->video);
-+
-+	vb2_dma_contig_cleanup_ctx(video->alloc_ctx);
-+	media_entity_cleanup(&video->video.entity);
-+}
-diff --git a/drivers/media/platform/vsp1/vsp1_video.h b/drivers/media/platform/vsp1/vsp1_video.h
-new file mode 100644
-index 000000000000..d8612a378345
---- /dev/null
-+++ b/drivers/media/platform/vsp1/vsp1_video.h
-@@ -0,0 +1,144 @@
-+/*
-+ * vsp1_video.h  --  R-Car VSP1 Video Node
-+ *
-+ * Copyright (C) 2013 Renesas Corporation
-+ *
-+ * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ */
-+#ifndef __VSP1_VIDEO_H__
-+#define __VSP1_VIDEO_H__
-+
-+#include <linux/list.h>
-+#include <linux/spinlock.h>
-+#include <linux/wait.h>
-+
-+#include <media/media-entity.h>
-+#include <media/videobuf2-core.h>
-+
-+struct vsp1_video;
-+
-+/*
-+ * struct vsp1_format_info - VSP1 video format description
-+ * @mbus: media bus format code
-+ * @fourcc: V4L2 pixel format FCC identifier
-+ * @planes: number of planes
-+ * @bpp: bits per pixel
-+ * @hwfmt: VSP1 hardware format
-+ * @swap_yc: the Y and C components are swapped (Y comes before C)
-+ * @swap_uv: the U and V components are swapped (V comes before U)
-+ * @hsub: horizontal subsampling factor
-+ * @vsub: vertical subsampling factor
-+ */
-+struct vsp1_format_info {
-+	u32 fourcc;
-+	unsigned int mbus;
-+	unsigned int hwfmt;
-+	unsigned int swap;
-+	unsigned int planes;
-+	unsigned int bpp[3];
-+	bool swap_yc;
-+	bool swap_uv;
-+	unsigned int hsub;
-+	unsigned int vsub;
-+};
-+
-+enum vsp1_pipeline_state {
-+	VSP1_PIPELINE_STOPPED,
-+	VSP1_PIPELINE_RUNNING,
-+	VSP1_PIPELINE_STOPPING,
-+};
-+
-+/*
-+ * struct vsp1_pipeline - A VSP1 hardware pipeline
-+ * @media: the media pipeline
-+ * @irqlock: protects the pipeline state
-+ * @lock: protects the pipeline use count and stream count
-+ */
-+struct vsp1_pipeline {
-+	struct media_pipeline pipe;
-+
-+	spinlock_t irqlock;
-+	enum vsp1_pipeline_state state;
-+	wait_queue_head_t wq;
-+
-+	struct mutex lock;
-+	unsigned int use_count;
-+	unsigned int stream_count;
-+	unsigned int buffers_ready;
-+
-+	unsigned int num_video;
-+	unsigned int num_inputs;
-+	struct vsp1_rwpf *inputs[VPS1_MAX_RPF];
-+	struct vsp1_rwpf *output;
-+	struct vsp1_entity *lif;
-+
-+	struct list_head entities;
-+};
-+
-+static inline struct vsp1_pipeline *to_vsp1_pipeline(struct media_entity *e)
-+{
-+	if (likely(e->pipe))
-+		return container_of(e->pipe, struct vsp1_pipeline, pipe);
-+	else
-+		return NULL;
-+}
-+
-+struct vsp1_video_buffer {
-+	struct vsp1_video *video;
-+	struct vb2_buffer buf;
-+	struct list_head queue;
-+
-+	dma_addr_t addr[3];
-+	unsigned int length[3];
-+};
-+
-+static inline struct vsp1_video_buffer *
-+to_vsp1_video_buffer(struct vb2_buffer *vb)
-+{
-+	return container_of(vb, struct vsp1_video_buffer, buf);
-+}
-+
-+struct vsp1_video_operations {
-+	void (*queue)(struct vsp1_video *video, struct vsp1_video_buffer *buf);
-+};
-+
-+struct vsp1_video {
-+	struct vsp1_device *vsp1;
-+	struct vsp1_entity *rwpf;
-+
-+	const struct vsp1_video_operations *ops;
-+
-+	struct video_device video;
-+	enum v4l2_buf_type type;
-+	struct media_pad pad;
-+
-+	struct mutex lock;
-+	struct v4l2_pix_format_mplane format;
-+	const struct vsp1_format_info *fmtinfo;
-+
-+	struct vsp1_pipeline pipe;
-+	unsigned int pipe_index;
-+
-+	struct vb2_queue queue;
-+	void *alloc_ctx;
-+	spinlock_t irqlock;
-+	struct list_head irqqueue;
-+	unsigned int sequence;
-+};
-+
-+static inline struct vsp1_video *to_vsp1_video(struct video_device *vdev)
-+{
-+	return container_of(vdev, struct vsp1_video, video);
-+}
-+
-+int vsp1_video_init(struct vsp1_video *video, struct vsp1_entity *rwpf);
-+void vsp1_video_cleanup(struct vsp1_video *video);
-+
-+void vsp1_pipeline_frame_end(struct vsp1_pipeline *pipe);
-+
-+#endif /* __VSP1_VIDEO_H__ */
-diff --git a/drivers/media/platform/vsp1/vsp1_wpf.c b/drivers/media/platform/vsp1/vsp1_wpf.c
-new file mode 100644
-index 000000000000..db4b85ee05fc
---- /dev/null
-+++ b/drivers/media/platform/vsp1/vsp1_wpf.c
-@@ -0,0 +1,233 @@
-+/*
-+ * vsp1_wpf.c  --  R-Car VSP1 Write Pixel Formatter
-+ *
-+ * Copyright (C) 2013 Renesas Corporation
-+ *
-+ * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ */
-+
-+#include <linux/device.h>
-+
-+#include <media/v4l2-subdev.h>
-+
-+#include "vsp1.h"
-+#include "vsp1_rwpf.h"
-+#include "vsp1_video.h"
-+
-+#define WPF_MAX_WIDTH				2048
-+#define WPF_MAX_HEIGHT				2048
-+
-+/* -----------------------------------------------------------------------------
-+ * Device Access
-+ */
-+
-+static inline u32 vsp1_wpf_read(struct vsp1_rwpf *wpf, u32 reg)
-+{
-+	return vsp1_read(wpf->entity.vsp1,
-+			 reg + wpf->entity.index * VI6_WPF_OFFSET);
-+}
-+
-+static inline void vsp1_wpf_write(struct vsp1_rwpf *wpf, u32 reg, u32 data)
-+{
-+	vsp1_write(wpf->entity.vsp1,
-+		   reg + wpf->entity.index * VI6_WPF_OFFSET, data);
-+}
-+
-+/* -----------------------------------------------------------------------------
-+ * V4L2 Subdevice Core Operations
-+ */
-+
-+static int wpf_s_stream(struct v4l2_subdev *subdev, int enable)
-+{
-+	struct vsp1_rwpf *wpf = to_rwpf(subdev);
-+	struct vsp1_pipeline *pipe =
-+		to_vsp1_pipeline(&wpf->entity.subdev.entity);
-+	struct vsp1_device *vsp1 = wpf->entity.vsp1;
-+	const struct v4l2_mbus_framefmt *format =
-+		&wpf->entity.formats[RWPF_PAD_SOURCE];
-+	unsigned int i;
-+	u32 srcrpf = 0;
-+	u32 outfmt = 0;
-+
-+	if (!enable) {
-+		vsp1_write(vsp1, VI6_WPF_IRQ_ENB(wpf->entity.index), 0);
-+		return 0;
-+	}
-+
-+	/* Sources */
-+	for (i = 0; i < pipe->num_inputs; ++i) {
-+		struct vsp1_rwpf *input = pipe->inputs[i];
-+
-+		srcrpf |= VI6_WPF_SRCRPF_RPF_ACT_MST(input->entity.index);
-+	}
-+
-+	vsp1_wpf_write(wpf, VI6_WPF_SRCRPF, srcrpf);
-+
-+	/* Destination stride. Cropping isn't supported yet. */
-+	if (!pipe->lif) {
-+		struct v4l2_pix_format_mplane *format = &wpf->video.format;
-+
-+		vsp1_wpf_write(wpf, VI6_WPF_DSTM_STRIDE_Y,
-+			       format->plane_fmt[0].bytesperline);
-+		if (format->num_planes > 1)
-+			vsp1_wpf_write(wpf, VI6_WPF_DSTM_STRIDE_C,
-+				       format->plane_fmt[1].bytesperline);
-+	}
-+
-+	vsp1_wpf_write(wpf, VI6_WPF_HSZCLIP,
-+		       format->width << VI6_WPF_SZCLIP_SIZE_SHIFT);
-+	vsp1_wpf_write(wpf, VI6_WPF_VSZCLIP,
-+		       format->height << VI6_WPF_SZCLIP_SIZE_SHIFT);
-+
-+	/* Format */
-+	if (!pipe->lif) {
-+		const struct vsp1_format_info *fmtinfo = wpf->video.fmtinfo;
-+
-+		outfmt = fmtinfo->hwfmt << VI6_WPF_OUTFMT_WRFMT_SHIFT;
-+
-+		if (fmtinfo->swap_yc)
-+			outfmt |= VI6_WPF_OUTFMT_SPYCS;
-+		if (fmtinfo->swap_uv)
-+			outfmt |= VI6_WPF_OUTFMT_SPUVS;
-+
-+		vsp1_wpf_write(wpf, VI6_WPF_DSWAP, fmtinfo->swap);
-+	}
-+
-+	if (wpf->entity.formats[RWPF_PAD_SINK].code !=
-+	    wpf->entity.formats[RWPF_PAD_SOURCE].code)
-+		outfmt |= VI6_WPF_OUTFMT_CSC;
-+
-+	vsp1_wpf_write(wpf, VI6_WPF_OUTFMT, outfmt);
-+
-+	vsp1_write(vsp1, VI6_DPR_WPF_FPORCH(wpf->entity.index),
-+		   VI6_DPR_WPF_FPORCH_FP_WPFN);
-+
-+	vsp1_write(vsp1, VI6_WPF_WRBCK_CTRL, 0);
-+
-+	/* Enable interrupts */
-+	vsp1_write(vsp1, VI6_WPF_IRQ_STA(wpf->entity.index), 0);
-+	vsp1_write(vsp1, VI6_WPF_IRQ_ENB(wpf->entity.index),
-+		   VI6_WFP_IRQ_ENB_FREE);
-+
-+	return 0;
-+}
-+
-+/* -----------------------------------------------------------------------------
-+ * V4L2 Subdevice Operations
-+ */
-+
-+static struct v4l2_subdev_video_ops wpf_video_ops = {
-+	.s_stream = wpf_s_stream,
-+};
-+
-+static struct v4l2_subdev_pad_ops wpf_pad_ops = {
-+	.enum_mbus_code = vsp1_rwpf_enum_mbus_code,
-+	.enum_frame_size = vsp1_rwpf_enum_frame_size,
-+	.get_fmt = vsp1_rwpf_get_format,
-+	.set_fmt = vsp1_rwpf_set_format,
-+};
-+
-+static struct v4l2_subdev_ops wpf_ops = {
-+	.video	= &wpf_video_ops,
-+	.pad    = &wpf_pad_ops,
-+};
-+
-+/* -----------------------------------------------------------------------------
-+ * Video Device Operations
-+ */
-+
-+static void wpf_vdev_queue(struct vsp1_video *video,
-+			   struct vsp1_video_buffer *buf)
-+{
-+	struct vsp1_rwpf *wpf = container_of(video, struct vsp1_rwpf, video);
-+
-+	vsp1_wpf_write(wpf, VI6_WPF_DSTM_ADDR_Y, buf->addr[0]);
-+	if (buf->buf.num_planes > 1)
-+		vsp1_wpf_write(wpf, VI6_WPF_DSTM_ADDR_C0, buf->addr[1]);
-+	if (buf->buf.num_planes > 2)
-+		vsp1_wpf_write(wpf, VI6_WPF_DSTM_ADDR_C1, buf->addr[2]);
-+}
-+
-+static const struct vsp1_video_operations wpf_vdev_ops = {
-+	.queue = wpf_vdev_queue,
-+};
-+
-+/* -----------------------------------------------------------------------------
-+ * Initialization and Cleanup
-+ */
-+
-+struct vsp1_rwpf *vsp1_wpf_create(struct vsp1_device *vsp1, unsigned int index)
-+{
-+	struct v4l2_subdev *subdev;
-+	struct vsp1_video *video;
-+	struct vsp1_rwpf *wpf;
-+	unsigned int flags;
-+	int ret;
-+
-+	wpf = devm_kzalloc(vsp1->dev, sizeof(*wpf), GFP_KERNEL);
-+	if (wpf == NULL)
-+		return ERR_PTR(-ENOMEM);
-+
-+	wpf->max_width = WPF_MAX_WIDTH;
-+	wpf->max_height = WPF_MAX_HEIGHT;
-+
-+	wpf->entity.type = VSP1_ENTITY_WPF;
-+	wpf->entity.index = index;
-+	wpf->entity.id = VI6_DPR_NODE_WPF(index);
-+
-+	ret = vsp1_entity_init(vsp1, &wpf->entity, 2);
-+	if (ret < 0)
-+		return ERR_PTR(ret);
-+
-+	/* Initialize the V4L2 subdev. */
-+	subdev = &wpf->entity.subdev;
-+	v4l2_subdev_init(subdev, &wpf_ops);
-+
-+	subdev->entity.ops = &vsp1_media_ops;
-+	subdev->internal_ops = &vsp1_subdev_internal_ops;
-+	snprintf(subdev->name, sizeof(subdev->name), "%s wpf.%u",
-+		 dev_name(vsp1->dev), index);
-+	v4l2_set_subdevdata(subdev, wpf);
-+	subdev->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
-+
-+	vsp1_entity_init_formats(subdev, NULL);
-+
-+	/* Initialize the video device. */
-+	video = &wpf->video;
-+
-+	video->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
-+	video->vsp1 = vsp1;
-+	video->ops = &wpf_vdev_ops;
-+
-+	ret = vsp1_video_init(video, &wpf->entity);
-+	if (ret < 0)
-+		goto error_video;
-+
-+	/* Connect the video device to the WPF. All connections are immutable
-+	 * except for the WPF0 source link if a LIF is present.
-+	 */
-+	flags = MEDIA_LNK_FL_ENABLED;
-+	if (!(vsp1->pdata->features & VSP1_HAS_LIF) || index != 0)
-+		flags |= MEDIA_LNK_FL_IMMUTABLE;
-+
-+	ret = media_entity_create_link(&wpf->entity.subdev.entity,
-+				       RWPF_PAD_SOURCE,
-+				       &wpf->video.video.entity, 0, flags);
-+	if (ret < 0)
-+		goto error_link;
-+
-+	wpf->entity.sink = &wpf->video.video.entity;
-+
-+	return wpf;
-+
-+error_link:
-+	vsp1_video_cleanup(video);
-+error_video:
-+	media_entity_cleanup(&wpf->entity.subdev.entity);
-+	return ERR_PTR(ret);
-+}
-diff --git a/include/linux/platform_data/vsp1.h b/include/linux/platform_data/vsp1.h
-new file mode 100644
-index 000000000000..a73a456d7f11
---- /dev/null
-+++ b/include/linux/platform_data/vsp1.h
-@@ -0,0 +1,25 @@
-+/*
-+ * vsp1.h  --  R-Car VSP1 Platform Data
-+ *
-+ * Copyright (C) 2013 Renesas Corporation
-+ *
-+ * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ */
-+#ifndef __PLATFORM_VSP1_H__
-+#define __PLATFORM_VSP1_H__
-+
-+#define VSP1_HAS_LIF		(1 << 0)
-+
-+struct vsp1_platform_data {
-+	unsigned int features;
-+	unsigned int rpf_count;
-+	unsigned int uds_count;
-+	unsigned int wpf_count;
-+};
-+
-+#endif /* __PLATFORM_VSP1_H__ */
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0037-pwm-renesas-tpu-fix-return-value-check-in-tpu_probe.patch b/patches.renesas/0037-pwm-renesas-tpu-fix-return-value-check-in-tpu_probe.patch
deleted file mode 100644
index db823033eafcc..0000000000000
--- a/patches.renesas/0037-pwm-renesas-tpu-fix-return-value-check-in-tpu_probe.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From f1fd37c8dc7513d68bccc445553098095448bcec Mon Sep 17 00:00:00 2001
-From: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
-Date: Tue, 25 Jun 2013 10:09:57 +0800
-Subject: pwm: renesas-tpu: fix return value check in tpu_probe()
-
-In case of error, the function devm_ioremap_resource() returns ERR_PTR()
-and never returns NULL. The NULL test in the return value check should
-be replaced with IS_ERR().
-
-Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
-Reviewed-by: Axel Lin <axel.lin@ingics.com>
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
-(cherry picked from commit 00cf99ee00c9f1241359c8ee5ca9230318e27a57)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pwm/pwm-renesas-tpu.c | 6 ++----
- 1 file changed, 2 insertions(+), 4 deletions(-)
-
-diff --git a/drivers/pwm/pwm-renesas-tpu.c b/drivers/pwm/pwm-renesas-tpu.c
-index 96e0cc48..03c1aa3c 100644
---- a/drivers/pwm/pwm-renesas-tpu.c
-+++ b/drivers/pwm/pwm-renesas-tpu.c
-@@ -410,10 +410,8 @@ static int tpu_probe(struct platform_device *pdev)
- 	}
- 
- 	tpu->base = devm_ioremap_resource(&pdev->dev, res);
--	if (tpu->base == NULL) {
--		dev_err(&pdev->dev, "failed to remap I/O memory\n");
--		return -ENXIO;
--	}
-+	if (IS_ERR(tpu->base))
-+		return PTR_ERR(tpu->base);
- 
- 	tpu->clk = devm_clk_get(&pdev->dev, NULL);
- 	if (IS_ERR(tpu->clk)) {
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0038-ARM-shmobile-Genmai-defconfig.patch b/patches.renesas/0038-ARM-shmobile-Genmai-defconfig.patch
deleted file mode 100644
index 4066535b2d3bf..0000000000000
--- a/patches.renesas/0038-ARM-shmobile-Genmai-defconfig.patch
+++ /dev/null
@@ -1,144 +0,0 @@
-From 21dfa652bafb9328887b254a9ff78f0d3c3efc74 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Wed, 2 Oct 2013 15:06:25 +0900
-Subject: ARM: shmobile: Genmai defconfig
-
-Add a defconfig for the Genmai board. In the future this board will
-use a shared defconfig for multiplatform, but until CCF is implemented
-this will be used.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit a6b1135265e9aa28f3860337413eb5011acf9528)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/configs/genmai_defconfig | 116 ++++++++++++++++++++++++++++++++++++++
- 1 file changed, 116 insertions(+)
- create mode 100644 arch/arm/configs/genmai_defconfig
-
-diff --git a/arch/arm/configs/genmai_defconfig b/arch/arm/configs/genmai_defconfig
-new file mode 100644
-index 000000000000..69b1531a4c80
---- /dev/null
-+++ b/arch/arm/configs/genmai_defconfig
-@@ -0,0 +1,116 @@
-+CONFIG_SYSVIPC=y
-+CONFIG_NO_HZ=y
-+CONFIG_IKCONFIG=y
-+CONFIG_IKCONFIG_PROC=y
-+CONFIG_LOG_BUF_SHIFT=16
-+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
-+CONFIG_SYSCTL_SYSCALL=y
-+CONFIG_EMBEDDED=y
-+CONFIG_PERF_EVENTS=y
-+CONFIG_SLAB=y
-+# CONFIG_LBDAF is not set
-+# CONFIG_BLK_DEV_BSG is not set
-+# CONFIG_IOSCHED_DEADLINE is not set
-+# CONFIG_IOSCHED_CFQ is not set
-+CONFIG_ARCH_SHMOBILE=y
-+CONFIG_ARCH_R7S72100=y
-+CONFIG_MACH_GENMAI=y
-+# CONFIG_SH_TIMER_CMT is not set
-+# CONFIG_SH_TIMER_MTU2 is not set
-+# CONFIG_SH_TIMER_TMU is not set
-+# CONFIG_EM_TIMER_STI is not set
-+CONFIG_ARM_ERRATA_430973=y
-+CONFIG_ARM_ERRATA_458693=y
-+CONFIG_ARM_ERRATA_460075=y
-+CONFIG_ARM_ERRATA_743622=y
-+CONFIG_ARM_ERRATA_754322=y
-+CONFIG_AEABI=y
-+# CONFIG_OABI_COMPAT is not set
-+CONFIG_FORCE_MAX_ZONEORDER=13
-+CONFIG_ZBOOT_ROM_TEXT=0x0
-+CONFIG_ZBOOT_ROM_BSS=0x0
-+CONFIG_ARM_APPENDED_DTB=y
-+CONFIG_KEXEC=y
-+CONFIG_AUTO_ZRELADDR=y
-+CONFIG_VFP=y
-+CONFIG_NEON=y
-+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
-+CONFIG_PM_RUNTIME=y
-+CONFIG_NET=y
-+CONFIG_PACKET=y
-+CONFIG_UNIX=y
-+CONFIG_INET=y
-+CONFIG_IP_PNP=y
-+CONFIG_IP_PNP_DHCP=y
-+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-+# CONFIG_INET_XFRM_MODE_BEET is not set
-+# CONFIG_INET_LRO is not set
-+# CONFIG_INET_DIAG is not set
-+# CONFIG_IPV6 is not set
-+# CONFIG_WIRELESS is not set
-+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-+CONFIG_NETDEVICES=y
-+# CONFIG_NET_CORE is not set
-+# CONFIG_NET_VENDOR_ARC is not set
-+# CONFIG_NET_CADENCE is not set
-+# CONFIG_NET_VENDOR_BROADCOM is not set
-+# CONFIG_NET_VENDOR_CIRRUS is not set
-+# CONFIG_NET_VENDOR_FARADAY is not set
-+# CONFIG_NET_VENDOR_INTEL is not set
-+# CONFIG_NET_VENDOR_MARVELL is not set
-+# CONFIG_NET_VENDOR_MICREL is not set
-+# CONFIG_NET_VENDOR_NATSEMI is not set
-+CONFIG_SH_ETH=y
-+# CONFIG_NET_VENDOR_SEEQ is not set
-+# CONFIG_NET_VENDOR_SMSC is not set
-+# CONFIG_NET_VENDOR_STMICRO is not set
-+# CONFIG_NET_VENDOR_VIA is not set
-+# CONFIG_NET_VENDOR_WIZNET is not set
-+# CONFIG_WLAN is not set
-+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-+CONFIG_INPUT_EVDEV=y
-+# CONFIG_KEYBOARD_ATKBD is not set
-+# CONFIG_INPUT_MOUSE is not set
-+# CONFIG_SERIO is not set
-+# CONFIG_LEGACY_PTYS is not set
-+CONFIG_SERIAL_SH_SCI=y
-+CONFIG_SERIAL_SH_SCI_NR_UARTS=10
-+CONFIG_SERIAL_SH_SCI_CONSOLE=y
-+# CONFIG_HW_RANDOM is not set
-+CONFIG_I2C_SH_MOBILE=y
-+# CONFIG_HWMON is not set
-+CONFIG_THERMAL=y
-+CONFIG_RCAR_THERMAL=y
-+CONFIG_REGULATOR=y
-+CONFIG_REGULATOR_FIXED_VOLTAGE=y
-+CONFIG_DRM=y
-+CONFIG_DRM_RCAR_DU=y
-+# CONFIG_USB_SUPPORT is not set
-+CONFIG_MMC=y
-+CONFIG_MMC_SDHI=y
-+CONFIG_MMC_SH_MMCIF=y
-+CONFIG_NEW_LEDS=y
-+CONFIG_LEDS_CLASS=y
-+CONFIG_RTC_CLASS=y
-+CONFIG_DMADEVICES=y
-+CONFIG_SH_DMAE=y
-+# CONFIG_IOMMU_SUPPORT is not set
-+# CONFIG_DNOTIFY is not set
-+CONFIG_MSDOS_FS=y
-+CONFIG_VFAT_FS=y
-+CONFIG_TMPFS=y
-+CONFIG_CONFIGFS_FS=y
-+# CONFIG_MISC_FILESYSTEMS is not set
-+CONFIG_NFS_FS=y
-+CONFIG_NFS_V3_ACL=y
-+CONFIG_NFS_V4=y
-+CONFIG_NFS_V4_1=y
-+CONFIG_ROOT_NFS=y
-+CONFIG_NLS_CODEPAGE_437=y
-+CONFIG_NLS_ISO8859_1=y
-+# CONFIG_ENABLE_WARN_DEPRECATED is not set
-+# CONFIG_ENABLE_MUST_CHECK is not set
-+# CONFIG_ARM_UNWIND is not set
-+# CONFIG_CRYPTO_ANSI_CPRNG is not set
-+# CONFIG_CRYPTO_HW is not set
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0038-media-vsp1-Fix-lack-of-the-sink-entity-registration-.patch b/patches.renesas/0038-media-vsp1-Fix-lack-of-the-sink-entity-registration-.patch
deleted file mode 100644
index 67ebc100f8799..0000000000000
--- a/patches.renesas/0038-media-vsp1-Fix-lack-of-the-sink-entity-registration-.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From be8e1de59d33d8b661fad6a8a5aaeec63351e66d Mon Sep 17 00:00:00 2001
-From: Katsuya Matsubara <matsu@igel.co.jp>
-Date: Fri, 26 Jul 2013 06:32:11 -0300
-Subject: [media] vsp1: Fix lack of the sink entity registration for enabled
- links
-
-Each source entity maintains a pointer to the counterpart sink
-entity while an enabled link connects them. It should be managed by
-the setup_link callback in the media controller framework at runtime.
-However, enabled links which connect RPFs and WPFs that have an
-equivalent index number are created during initialization.
-This registers the pointer to a sink entity from the source entity
-when an enabled link is created.
-
-Signed-off-by: Katsuya Matsubara <matsu@igel.co.jp>
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Sakari Ailus <sakari.ailus@iki.fi>
-Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
-Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
-(cherry picked from commit db32eb6c18d7617e61ca65eb13b66de4dea56f1f)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/media/platform/vsp1/vsp1_drv.c | 3 +++
- 1 file changed, 3 insertions(+)
-
-diff --git a/drivers/media/platform/vsp1/vsp1_drv.c b/drivers/media/platform/vsp1/vsp1_drv.c
-index e58e49c88415..41dd891d9737 100644
---- a/drivers/media/platform/vsp1/vsp1_drv.c
-+++ b/drivers/media/platform/vsp1/vsp1_drv.c
-@@ -101,6 +101,9 @@ static int vsp1_create_links(struct vsp1_device *vsp1, struct vsp1_entity *sink)
- 						       entity, pad, flags);
- 			if (ret < 0)
- 				return ret;
-+
-+			if (flags & MEDIA_LNK_FL_ENABLED)
-+				source->sink = entity;
- 		}
- 	}
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0038-pwm-renesas-tpu-Add-MODULE_ALIAS-to-make-module-auto.patch b/patches.renesas/0038-pwm-renesas-tpu-Add-MODULE_ALIAS-to-make-module-auto.patch
deleted file mode 100644
index 6de4c1a47fa0f..0000000000000
--- a/patches.renesas/0038-pwm-renesas-tpu-Add-MODULE_ALIAS-to-make-module-auto.patch
+++ /dev/null
@@ -1,28 +0,0 @@
-From c8d32248b8fbdc350eaeee23051c30ca46662dc7 Mon Sep 17 00:00:00 2001
-From: Axel Lin <axel.lin@ingics.com>
-Date: Wed, 26 Jun 2013 00:25:02 +0800
-Subject: pwm: renesas-tpu: Add MODULE_ALIAS to make module auto loading work
-
-This driver can be built as module, add MODULE_ALIAS to make module auto loading
-work.
-
-Signed-off-by: Axel Lin <axel.lin@ingics.com>
-Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
-(cherry picked from commit 71077bc8db67f560453d62c48e3bec467ec6b37f)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pwm/pwm-renesas-tpu.c | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/drivers/pwm/pwm-renesas-tpu.c b/drivers/pwm/pwm-renesas-tpu.c
-index 03c1aa3c..26008927 100644
---- a/drivers/pwm/pwm-renesas-tpu.c
-+++ b/drivers/pwm/pwm-renesas-tpu.c
-@@ -471,3 +471,4 @@ module_platform_driver(tpu_driver);
- MODULE_AUTHOR("Laurent Pinchart <laurent.pinchart@ideasonboard.com>");
- MODULE_DESCRIPTION("Renesas TPU PWM Driver");
- MODULE_LICENSE("GPL v2");
-+MODULE_ALIAS("platform:renesas-tpu-pwm");
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0039-ARM-shmobile-bockw-enable-CONFIG_REGULATOR.patch b/patches.renesas/0039-ARM-shmobile-bockw-enable-CONFIG_REGULATOR.patch
deleted file mode 100644
index 234f654748a23..0000000000000
--- a/patches.renesas/0039-ARM-shmobile-bockw-enable-CONFIG_REGULATOR.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From 3ce8970280773544a3229e7e426fe85c9ede8548 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Thu, 3 Oct 2013 18:30:30 -0700
-Subject: ARM: shmobile: bockw: enable CONFIG_REGULATOR
-
-CONFIG_REGULATOR is required from MMCIF and SMSC
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 03248fde88e37b1b043b640b1bae4fb14d4d3f23)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/configs/bockw_defconfig | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/arch/arm/configs/bockw_defconfig b/arch/arm/configs/bockw_defconfig
-index b38cd107f82d..6583683492bd 100644
---- a/arch/arm/configs/bockw_defconfig
-+++ b/arch/arm/configs/bockw_defconfig
-@@ -82,6 +82,7 @@ CONFIG_SERIAL_SH_SCI_CONSOLE=y
- # CONFIG_HWMON is not set
- CONFIG_I2C=y
- CONFIG_I2C_RCAR=y
-+CONFIG_REGULATOR=y
- CONFIG_MEDIA_SUPPORT=y
- CONFIG_MEDIA_CAMERA_SUPPORT=y
- CONFIG_V4L_PLATFORM_DRIVERS=y
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0039-media-vsp1-Use-the-maximum-number-of-entities-define.patch b/patches.renesas/0039-media-vsp1-Use-the-maximum-number-of-entities-define.patch
deleted file mode 100644
index ea4be79cdd7f4..0000000000000
--- a/patches.renesas/0039-media-vsp1-Use-the-maximum-number-of-entities-define.patch
+++ /dev/null
@@ -1,59 +0,0 @@
-From a71352de52d6a052e3efab6dca59cd036435b6b3 Mon Sep 17 00:00:00 2001
-From: Katsuya Matsubara <matsu@igel.co.jp>
-Date: Fri, 26 Jul 2013 06:32:12 -0300
-Subject: [media] vsp1: Use the maximum number of entities defined in platform
- data
-
-The VSP1 driver allows to define the maximum number of each module
-such as RPF, WPF, and UDS in a platform data definition.
-This suppresses operations for nonexistent or unused modules.
-
-Signed-off-by: Katsuya Matsubara <matsu@igel.co.jp>
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Sakari Ailus <sakari.ailus@iki.fi>
-Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
-Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
-(cherry picked from commit 83453a7cc8b703ce818c24c2298822b0b179e652)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/media/platform/vsp1/vsp1_drv.c | 8 ++++----
- 1 file changed, 4 insertions(+), 4 deletions(-)
-
-diff --git a/drivers/media/platform/vsp1/vsp1_drv.c b/drivers/media/platform/vsp1/vsp1_drv.c
-index 41dd891d9737..8700842edcf2 100644
---- a/drivers/media/platform/vsp1/vsp1_drv.c
-+++ b/drivers/media/platform/vsp1/vsp1_drv.c
-@@ -35,7 +35,7 @@ static irqreturn_t vsp1_irq_handler(int irq, void *data)
- 	irqreturn_t ret = IRQ_NONE;
- 	unsigned int i;
- 
--	for (i = 0; i < VPS1_MAX_WPF; ++i) {
-+	for (i = 0; i < vsp1->pdata->wpf_count; ++i) {
- 		struct vsp1_rwpf *wpf = vsp1->wpf[i];
- 		struct vsp1_pipeline *pipe;
- 		u32 status;
-@@ -243,7 +243,7 @@ static int vsp1_device_init(struct vsp1_device *vsp1)
- 	/* Reset any channel that might be running. */
- 	status = vsp1_read(vsp1, VI6_STATUS);
- 
--	for (i = 0; i < VPS1_MAX_WPF; ++i) {
-+	for (i = 0; i < vsp1->pdata->wpf_count; ++i) {
- 		unsigned int timeout;
- 
- 		if (!(status & VI6_STATUS_SYS_ACT(i)))
-@@ -267,10 +267,10 @@ static int vsp1_device_init(struct vsp1_device *vsp1)
- 	vsp1_write(vsp1, VI6_CLK_DCSWT, (8 << VI6_CLK_DCSWT_CSTPW_SHIFT) |
- 		   (8 << VI6_CLK_DCSWT_CSTRW_SHIFT));
- 
--	for (i = 0; i < VPS1_MAX_RPF; ++i)
-+	for (i = 0; i < vsp1->pdata->rpf_count; ++i)
- 		vsp1_write(vsp1, VI6_DPR_RPF_ROUTE(i), VI6_DPR_NODE_UNUSED);
- 
--	for (i = 0; i < VPS1_MAX_UDS; ++i)
-+	for (i = 0; i < vsp1->pdata->uds_count; ++i)
- 		vsp1_write(vsp1, VI6_DPR_UDS_ROUTE(i), VI6_DPR_NODE_UNUSED);
- 
- 	vsp1_write(vsp1, VI6_DPR_SRU_ROUTE, VI6_DPR_NODE_UNUSED);
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0039-pwm-renesas-tpu-Add-DT-support.patch b/patches.renesas/0039-pwm-renesas-tpu-Add-DT-support.patch
deleted file mode 100644
index 6e14a510db37a..0000000000000
--- a/patches.renesas/0039-pwm-renesas-tpu-Add-DT-support.patch
+++ /dev/null
@@ -1,158 +0,0 @@
-From 88e52bb403941d0a0c4bdcd8788b2e0175054143 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 26 Jul 2013 00:27:41 +0200
-Subject: pwm: renesas-tpu: Add DT support
-
-Specify DT bindings for the TPU PWM controller and add OF support to the
-driver.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Stephen Warren <swarren@nvidia.com>
-Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
-(cherry picked from commit 382457e562bbb1ea7d94923e58fcbac9e981ff18)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- .../devicetree/bindings/pwm/renesas,tpu-pwm.txt    | 28 +++++++++++++++
- drivers/pwm/pwm-renesas-tpu.c                      | 41 ++++++++++++++++++----
- 2 files changed, 62 insertions(+), 7 deletions(-)
- create mode 100644 Documentation/devicetree/bindings/pwm/renesas,tpu-pwm.txt
-
-diff --git a/Documentation/devicetree/bindings/pwm/renesas,tpu-pwm.txt b/Documentation/devicetree/bindings/pwm/renesas,tpu-pwm.txt
-new file mode 100644
-index 00000000..b067e84a
---- /dev/null
-+++ b/Documentation/devicetree/bindings/pwm/renesas,tpu-pwm.txt
-@@ -0,0 +1,28 @@
-+* Renesas R-Car Timer Pulse Unit PWM Controller
-+
-+Required Properties:
-+
-+  - compatible: should be one of the following.
-+    - "renesas,tpu-r8a73a4": for R8A77A4 (R-Mobile APE6) compatible PWM controller.
-+    - "renesas,tpu-r8a7740": for R8A7740 (R-Mobile A1) compatible PWM controller.
-+    - "renesas,tpu-r8a7790": for R8A7790 (R-Car H2) compatible PWM controller.
-+    - "renesas,tpu-sh7372": for SH7372 (SH-Mobile AP4) compatible PWM controller.
-+    - "renesas,tpu": for generic R-Car TPU PWM controller.
-+
-+  - reg: Base address and length of each memory resource used by the PWM
-+    controller hardware module.
-+
-+  - #pwm-cells: should be 3. See pwm.txt in this directory for a description of
-+    the cells format. The only third cell flag supported by this binding is
-+    PWM_POLARITY_INVERTED.
-+
-+Please refer to pwm.txt in this directory for details of the common PWM bindings
-+used by client devices.
-+
-+Example: R8A7740 (R-Car A1) TPU controller node
-+
-+	tpu: pwm@e6600000 {
-+		compatible = "renesas,tpu-r8a7740", "renesas,tpu";
-+		reg = <0xe6600000 0x100>;
-+		#pwm-cells = <3>;
-+	};
-diff --git a/drivers/pwm/pwm-renesas-tpu.c b/drivers/pwm/pwm-renesas-tpu.c
-index 26008927..3eeffff6 100644
---- a/drivers/pwm/pwm-renesas-tpu.c
-+++ b/drivers/pwm/pwm-renesas-tpu.c
-@@ -20,6 +20,7 @@
- #include <linux/ioport.h>
- #include <linux/module.h>
- #include <linux/mutex.h>
-+#include <linux/of.h>
- #include <linux/platform_data/pwm-renesas-tpu.h>
- #include <linux/platform_device.h>
- #include <linux/pm_runtime.h>
-@@ -86,7 +87,7 @@ struct tpu_pwm_device {
- 
- struct tpu_device {
- 	struct platform_device *pdev;
--	struct tpu_pwm_platform_data *pdata;
-+	enum pwm_polarity polarities[TPU_CHANNEL_MAX];
- 	struct pwm_chip chip;
- 	spinlock_t lock;
- 
-@@ -228,8 +229,7 @@ static int tpu_pwm_request(struct pwm_chip *chip, struct pwm_device *_pwm)
- 
- 	pwm->tpu = tpu;
- 	pwm->channel = _pwm->hwpwm;
--	pwm->polarity = tpu->pdata ? tpu->pdata->channels[pwm->channel].polarity
--		      : PWM_POLARITY_NORMAL;
-+	pwm->polarity = tpu->polarities[pwm->channel];
- 	pwm->prescaler = 0;
- 	pwm->period = 0;
- 	pwm->duty = 0;
-@@ -388,6 +388,16 @@ static const struct pwm_ops tpu_pwm_ops = {
-  * Probe and remove
-  */
- 
-+static void tpu_parse_pdata(struct tpu_device *tpu)
-+{
-+	struct tpu_pwm_platform_data *pdata = tpu->pdev->dev.platform_data;
-+	unsigned int i;
-+
-+	for (i = 0; i < ARRAY_SIZE(tpu->polarities); ++i)
-+		tpu->polarities[i] = pdata ? pdata->channels[i].polarity
-+				   : PWM_POLARITY_NORMAL;
-+}
-+
- static int tpu_probe(struct platform_device *pdev)
- {
- 	struct tpu_device *tpu;
-@@ -400,7 +410,11 @@ static int tpu_probe(struct platform_device *pdev)
- 		return -ENOMEM;
- 	}
- 
--	tpu->pdata = pdev->dev.platform_data;
-+	spin_lock_init(&tpu->lock);
-+	tpu->pdev = pdev;
-+
-+	/* Initialize device configuration from platform data. */
-+	tpu_parse_pdata(tpu);
- 
- 	/* Map memory, get clock and pin control. */
- 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-@@ -422,11 +436,10 @@ static int tpu_probe(struct platform_device *pdev)
- 	/* Initialize and register the device. */
- 	platform_set_drvdata(pdev, tpu);
- 
--	spin_lock_init(&tpu->lock);
--	tpu->pdev = pdev;
--
- 	tpu->chip.dev = &pdev->dev;
- 	tpu->chip.ops = &tpu_pwm_ops;
-+	tpu->chip.of_xlate = of_pwm_xlate_with_flags;
-+	tpu->chip.of_pwm_n_cells = 3;
- 	tpu->chip.base = -1;
- 	tpu->chip.npwm = TPU_CHANNEL_MAX;
- 
-@@ -457,12 +470,26 @@ static int tpu_remove(struct platform_device *pdev)
- 	return 0;
- }
- 
-+#ifdef CONFIG_OF
-+static const struct of_device_id tpu_of_table[] = {
-+	{ .compatible = "renesas,tpu-r8a73a4", },
-+	{ .compatible = "renesas,tpu-r8a7740", },
-+	{ .compatible = "renesas,tpu-r8a7790", },
-+	{ .compatible = "renesas,tpu-sh7372", },
-+	{ .compatible = "renesas,tpu", },
-+	{ },
-+};
-+
-+MODULE_DEVICE_TABLE(of, tpu_of_table);
-+#endif
-+
- static struct platform_driver tpu_driver = {
- 	.probe		= tpu_probe,
- 	.remove		= tpu_remove,
- 	.driver		= {
- 		.name	= "renesas-tpu-pwm",
- 		.owner	= THIS_MODULE,
-+		.of_match_table = of_match_ptr(tpu_of_table),
- 	}
- };
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0040-ARM-shmobile-bockw-Do-not-set-command-line-in-defcon.patch b/patches.renesas/0040-ARM-shmobile-bockw-Do-not-set-command-line-in-defcon.patch
deleted file mode 100644
index 791e25a1949df..0000000000000
--- a/patches.renesas/0040-ARM-shmobile-bockw-Do-not-set-command-line-in-defcon.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From 42a8843edd22778e4b7d145aa72d749c67b74d2b Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Thu, 10 Oct 2013 15:12:17 +0900
-Subject: ARM: shmobile: bockw: Do not set command line in defconfig
-
-As a set towards moving shmobile towards multi-platform
-the kernel command line should be set in the DTB rather than
-in the kernel config.
-
-bockw already has the command line present in its DTS file
-but it was being overrirden by the kernel config.
-
-A side effect of this change is that "rw" is now present
-on the command line which allows a boot using nfs root to
-succeed in the case where userspace expects to be able
-to write to the root filesystem.
-
-Signed-off-by: Simon Horman <horms@verge.net.au>
-(cherry picked from commit 851f0cda469fdba6371ab2e268462aeb8393f08e)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/configs/bockw_defconfig | 2 --
- 1 file changed, 2 deletions(-)
-
-diff --git a/arch/arm/configs/bockw_defconfig b/arch/arm/configs/bockw_defconfig
-index 6583683492bd..b35301fa9685 100644
---- a/arch/arm/configs/bockw_defconfig
-+++ b/arch/arm/configs/bockw_defconfig
-@@ -27,8 +27,6 @@ CONFIG_HIGHMEM=y
- CONFIG_ZBOOT_ROM_TEXT=0x0
- CONFIG_ZBOOT_ROM_BSS=0x0
- CONFIG_ARM_APPENDED_DTB=y
--CONFIG_CMDLINE="console=ttySC0,115200 ignore_loglevel root=/dev/nfs ip=dhcp"
--CONFIG_CMDLINE_FORCE=y
- # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
- # CONFIG_SUSPEND is not set
- CONFIG_PM_RUNTIME=y
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0040-media-vsp1-Fix-a-sparse-warning.patch b/patches.renesas/0040-media-vsp1-Fix-a-sparse-warning.patch
deleted file mode 100644
index ec6cd167f7810..0000000000000
--- a/patches.renesas/0040-media-vsp1-Fix-a-sparse-warning.patch
+++ /dev/null
@@ -1,40 +0,0 @@
-From fef254ab94691e36a7b75072bec76caf68169d39 Mon Sep 17 00:00:00 2001
-From: Mauro Carvalho Chehab <m.chehab@samsung.com>
-Date: Sat, 24 Aug 2013 08:47:51 -0300
-Subject: [media] vsp1: Fix a sparse warning
-
-As reported by: kbuild test robot <fengguang.wu@intel.com>:
-	 drivers/media/platform/vsp1/vsp1_drv.c:434:21: sparse: cast removes address space of expression
-
-	   433		vsp1->mmio = devm_ioremap_resource(&pdev->dev, io);
-	 > 434		if (IS_ERR((void *)vsp1->mmio))
-	 > 435			return PTR_ERR((void *)vsp1->mmio);
-
-There's no need to convert it to void *.
-
-Reported-by: kbuild test robot <fengguang.wu@intel.com>
-Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
-(cherry picked from commit cbec6d3ab470565536480d3bd109a7fdb128c3c4)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/media/platform/vsp1/vsp1_drv.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/media/platform/vsp1/vsp1_drv.c b/drivers/media/platform/vsp1/vsp1_drv.c
-index 8700842edcf2..ff8cd2d6be39 100644
---- a/drivers/media/platform/vsp1/vsp1_drv.c
-+++ b/drivers/media/platform/vsp1/vsp1_drv.c
-@@ -434,8 +434,8 @@ static int vsp1_probe(struct platform_device *pdev)
- 	/* I/O, IRQ and clock resources */
- 	io = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- 	vsp1->mmio = devm_ioremap_resource(&pdev->dev, io);
--	if (IS_ERR((void *)vsp1->mmio))
--		return PTR_ERR((void *)vsp1->mmio);
-+	if (IS_ERR(vsp1->mmio))
-+		return PTR_ERR(vsp1->mmio);
- 
- 	vsp1->clock = devm_clk_get(&pdev->dev, NULL);
- 	if (IS_ERR(vsp1->clock)) {
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0040-pwm-simplify-use-of-devm_ioremap_resource.patch b/patches.renesas/0040-pwm-simplify-use-of-devm_ioremap_resource.patch
deleted file mode 100644
index e16e51e800859..0000000000000
--- a/patches.renesas/0040-pwm-simplify-use-of-devm_ioremap_resource.patch
+++ /dev/null
@@ -1,97 +0,0 @@
-From 9d218abdb7925e8d184beea77b6da269e59ce3d4 Mon Sep 17 00:00:00 2001
-From: Julia Lawall <Julia.Lawall@lip6.fr>
-Date: Wed, 14 Aug 2013 11:11:25 +0200
-Subject: pwm: simplify use of devm_ioremap_resource
-
-Remove unneeded error handling on the result of a call to
-platform_get_resource when the value is passed to devm_ioremap_resource.
-
-Move the call to platform_get_resource adjacent to the call to
-devm_ioremap_resource to make the connection between them more clear.
-
-A simplified version of the semantic patch that makes this change is as
-follows: (http://coccinelle.lip6.fr/)
-
-// <smpl>
-@@
-expression pdev,res,n,e,e1;
-expression ret != 0;
-identifier l;
-@@
-
-- res = platform_get_resource(pdev, IORESOURCE_MEM, n);
-  ... when != res
-- if (res == NULL) { ... \(goto l;\|return ret;\) }
-  ... when != res
-+ res = platform_get_resource(pdev, IORESOURCE_MEM, n);
-  e = devm_ioremap_resource(e1, res);
-// </smpl>
-
-Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
-Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
-Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
-(cherry picked from commit 88d5a2e6ffaa32e2a09a994872ca10aca07a36e9)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pwm/pwm-lpc32xx.c     | 3 ---
- drivers/pwm/pwm-renesas-tpu.c | 5 -----
- drivers/pwm/pwm-spear.c       | 7 +------
- 3 files changed, 1 insertion(+), 14 deletions(-)
-
-diff --git a/drivers/pwm/pwm-lpc32xx.c b/drivers/pwm/pwm-lpc32xx.c
-index 8272883c..7f469d26 100644
---- a/drivers/pwm/pwm-lpc32xx.c
-+++ b/drivers/pwm/pwm-lpc32xx.c
-@@ -124,9 +124,6 @@ static int lpc32xx_pwm_probe(struct platform_device *pdev)
- 		return -ENOMEM;
- 
- 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
--	if (!res)
--		return -EINVAL;
--
- 	lpc32xx->base = devm_ioremap_resource(&pdev->dev, res);
- 	if (IS_ERR(lpc32xx->base))
- 		return PTR_ERR(lpc32xx->base);
-diff --git a/drivers/pwm/pwm-renesas-tpu.c b/drivers/pwm/pwm-renesas-tpu.c
-index 3eeffff6..aff6ba9b 100644
---- a/drivers/pwm/pwm-renesas-tpu.c
-+++ b/drivers/pwm/pwm-renesas-tpu.c
-@@ -418,11 +418,6 @@ static int tpu_probe(struct platform_device *pdev)
- 
- 	/* Map memory, get clock and pin control. */
- 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
--	if (!res) {
--		dev_err(&pdev->dev, "failed to get I/O memory\n");
--		return -ENXIO;
--	}
--
- 	tpu->base = devm_ioremap_resource(&pdev->dev, res);
- 	if (IS_ERR(tpu->base))
- 		return PTR_ERR(tpu->base);
-diff --git a/drivers/pwm/pwm-spear.c b/drivers/pwm/pwm-spear.c
-index 6d99e2cb..8af6ea8f 100644
---- a/drivers/pwm/pwm-spear.c
-+++ b/drivers/pwm/pwm-spear.c
-@@ -178,18 +178,13 @@ static int spear_pwm_probe(struct platform_device *pdev)
- 	int ret;
- 	u32 val;
- 
--	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
--	if (!r) {
--		dev_err(&pdev->dev, "no memory resources defined\n");
--		return -ENODEV;
--	}
--
- 	pc = devm_kzalloc(&pdev->dev, sizeof(*pc), GFP_KERNEL);
- 	if (!pc) {
- 		dev_err(&pdev->dev, "failed to allocate memory\n");
- 		return -ENOMEM;
- 	}
- 
-+	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- 	pc->mmio_base = devm_ioremap_resource(&pdev->dev, r);
- 	if (IS_ERR(pc->mmio_base))
- 		return PTR_ERR(pc->mmio_base);
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0041-ARM-shmobile-marzen-Do-not-set-command-line-in-defco.patch b/patches.renesas/0041-ARM-shmobile-marzen-Do-not-set-command-line-in-defco.patch
deleted file mode 100644
index 841fbac397487..0000000000000
--- a/patches.renesas/0041-ARM-shmobile-marzen-Do-not-set-command-line-in-defco.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From 14e57c4ff32b05ff4d87628e34789a022d7805b4 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Thu, 10 Oct 2013 15:12:17 +0900
-Subject: ARM: shmobile: marzen: Do not set command line in defconfig
-
-As a set towards moving shmobile towards multi-platform
-the kernel command line should be set in the DTB rather than
-in the kernel config.
-
-marzen already has the command line present in its DTS file
-but it was being overrirden by the kernel config.
-
-Signed-off-by: Simon Horman <horms@verge.net.au>
-(cherry picked from commit 7a14b78831d34b63032de1bb4d05221ed20cb0cf)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/configs/marzen_defconfig | 2 --
- 1 file changed, 2 deletions(-)
-
-diff --git a/arch/arm/configs/marzen_defconfig b/arch/arm/configs/marzen_defconfig
-index 5cc6360340b1..103b8755d1a6 100644
---- a/arch/arm/configs/marzen_defconfig
-+++ b/arch/arm/configs/marzen_defconfig
-@@ -30,8 +30,6 @@ CONFIG_HIGHMEM=y
- CONFIG_ZBOOT_ROM_TEXT=0x0
- CONFIG_ZBOOT_ROM_BSS=0x0
- CONFIG_ARM_APPENDED_DTB=y
--CONFIG_CMDLINE="console=ttySC2,115200 earlyprintk=sh-sci.2,115200 ignore_loglevel root=/dev/nfs ip=on"
--CONFIG_CMDLINE_FORCE=y
- CONFIG_KEXEC=y
- # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
- CONFIG_PM_RUNTIME=y
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0041-media-v4l-vsp1-Initialize-media-device-bus_info-fiel.patch b/patches.renesas/0041-media-v4l-vsp1-Initialize-media-device-bus_info-fiel.patch
deleted file mode 100644
index 7d5843d0deab4..0000000000000
--- a/patches.renesas/0041-media-v4l-vsp1-Initialize-media-device-bus_info-fiel.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From 5ea1ffa5349ca0e4e4ba50afbf2f5fec378dc2b9 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 22 Aug 2013 14:11:47 -0300
-Subject: [media] v4l: vsp1: Initialize media device bus_info field
-
-Fill bus_info with the VSP1 platform device name
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
-(cherry picked from commit 10d79b995be5399be0a59a72859ac4bfdf066299)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/media/platform/vsp1/vsp1_drv.c | 2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/drivers/media/platform/vsp1/vsp1_drv.c b/drivers/media/platform/vsp1/vsp1_drv.c
-index ff8cd2d6be39..aa8b9b288e61 100644
---- a/drivers/media/platform/vsp1/vsp1_drv.c
-+++ b/drivers/media/platform/vsp1/vsp1_drv.c
-@@ -134,6 +134,8 @@ static int vsp1_create_entities(struct vsp1_device *vsp1)
- 
- 	mdev->dev = vsp1->dev;
- 	strlcpy(mdev->model, "VSP1", sizeof(mdev->model));
-+	snprintf(mdev->bus_info, sizeof(mdev->bus_info), "platform:%s",
-+		 dev_name(mdev->dev));
- 	ret = media_device_register(mdev);
- 	if (ret < 0) {
- 		dev_err(vsp1->dev, "media device registration failed (%d)\n",
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0041-phy-rcar-usb-remove-EHCI-internal-buffer-setup.patch b/patches.renesas/0041-phy-rcar-usb-remove-EHCI-internal-buffer-setup.patch
deleted file mode 100644
index 90da34a6a4154..0000000000000
--- a/patches.renesas/0041-phy-rcar-usb-remove-EHCI-internal-buffer-setup.patch
+++ /dev/null
@@ -1,110 +0,0 @@
-From fa0067b3df1d6a1c7eea1bfb4f986fd81b699794 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Sun, 2 Jun 2013 01:42:26 +0400
-Subject: phy-rcar-usb: remove EHCI internal buffer setup
-
-Now that the EHCI internal  buffer setup is done by the platform code,  we  can
-remove  such code from this driver as it  never  really belonged here.  We also
-no longer need the 2nd memory region now (2nd EHCI controller is simply missing
-in e.g. R8A7778 SoC).
-
-The patch has been tested on the Marzen and BOCK-W boards.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Acked-by: Felipe Balbi <balbi@ti.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 463c824bb708b47a7a249bde07af4d701cacd54e)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/phy/phy-rcar-usb.c | 28 ++++------------------------
- 1 file changed, 4 insertions(+), 24 deletions(-)
-
-diff --git a/drivers/usb/phy/phy-rcar-usb.c b/drivers/usb/phy/phy-rcar-usb.c
-index a35681b0..4893dbde 100644
---- a/drivers/usb/phy/phy-rcar-usb.c
-+++ b/drivers/usb/phy/phy-rcar-usb.c
-@@ -23,8 +23,6 @@
- #define USBEH0		0x080C
- #define USBOH0		0x081C
- #define USBCTL0		0x0858
--#define EIIBC1		0x0094
--#define EIIBC2		0x009C
- 
- /* USBPCTRL1 */
- #define PHY_RST		(1 << 2)
-@@ -40,7 +38,6 @@ struct rcar_usb_phy_priv {
- 	spinlock_t lock;
- 
- 	void __iomem *reg0;
--	void __iomem *reg1;
- 	int counter;
- };
- 
-@@ -59,7 +56,6 @@ static int rcar_usb_phy_init(struct usb_phy *phy)
- 	struct rcar_usb_phy_priv *priv = usb_phy_to_priv(phy);
- 	struct device *dev = phy->dev;
- 	void __iomem *reg0 = priv->reg0;
--	void __iomem *reg1 = priv->reg1;
- 	int i;
- 	u32 val;
- 	unsigned long flags;
-@@ -97,19 +93,6 @@ static int rcar_usb_phy_init(struct usb_phy *phy)
- 		iowrite32(0x00000000, (reg0 + USBPCTRL0));
- 
- 		/*
--		 * EHCI IP internal buffer setting
--		 * EHCI IP internal buffer enable
--		 *
--		 * These are recommended value of a datasheet
--		 * see [USB :: EHCI internal buffer setting]
--		 */
--		iowrite32(0x00ff0040, (reg0 + EIIBC1));
--		iowrite32(0x00ff0040, (reg1 + EIIBC1));
--
--		iowrite32(0x00000001, (reg0 + EIIBC2));
--		iowrite32(0x00000001, (reg1 + EIIBC2));
--
--		/*
- 		 * Bus alignment settings
- 		 */
- 
-@@ -145,14 +128,13 @@ static void rcar_usb_phy_shutdown(struct usb_phy *phy)
- static int rcar_usb_phy_probe(struct platform_device *pdev)
- {
- 	struct rcar_usb_phy_priv *priv;
--	struct resource *res0, *res1;
-+	struct resource *res0;
- 	struct device *dev = &pdev->dev;
--	void __iomem *reg0, *reg1;
-+	void __iomem *reg0;
- 	int ret;
- 
- 	res0 = platform_get_resource(pdev, IORESOURCE_MEM, 0);
--	res1 = platform_get_resource(pdev, IORESOURCE_MEM, 1);
--	if (!res0 || !res1) {
-+	if (!res0) {
- 		dev_err(dev, "Not enough platform resources\n");
- 		return -EINVAL;
- 	}
-@@ -164,8 +146,7 @@ static int rcar_usb_phy_probe(struct platform_device *pdev)
- 	 * this driver can't use devm_request_and_ioremap(dev, res) here
- 	 */
- 	reg0 = devm_ioremap_nocache(dev, res0->start, resource_size(res0));
--	reg1 = devm_ioremap_nocache(dev, res1->start, resource_size(res1));
--	if (!reg0 || !reg1) {
-+	if (!reg0) {
- 		dev_err(dev, "ioremap error\n");
- 		return -ENOMEM;
- 	}
-@@ -177,7 +158,6 @@ static int rcar_usb_phy_probe(struct platform_device *pdev)
- 	}
- 
- 	priv->reg0		= reg0;
--	priv->reg1		= reg1;
- 	priv->counter		= 0;
- 	priv->phy.dev		= dev;
- 	priv->phy.label		= dev_name(dev);
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0042-ARM-shmobile-bockw-Do-not-disable-CONFIG_INOTIFY_USE.patch b/patches.renesas/0042-ARM-shmobile-bockw-Do-not-disable-CONFIG_INOTIFY_USE.patch
deleted file mode 100644
index 4bd0131c37cf8..0000000000000
--- a/patches.renesas/0042-ARM-shmobile-bockw-Do-not-disable-CONFIG_INOTIFY_USE.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From 307724b979f48db2c0defa1d219ac4a462e98705 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Thu, 10 Oct 2013 15:12:17 +0900
-Subject: ARM: shmobile: bockw: Do not disable CONFIG_INOTIFY_USER in defconfig
-
-CONFIG_INOTIFY_USER is required for udev to function.
-This change brings the bockw defconfig into line with
-other shmobile defconfigs.
-
-Signed-off-by: Simon Horman <horms@verge.net.au>
-(cherry picked from commit 5cff9680d4919a521d071b4cea33aad50a60fefa)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/configs/bockw_defconfig | 1 -
- 1 file changed, 1 deletion(-)
-
-diff --git a/arch/arm/configs/bockw_defconfig b/arch/arm/configs/bockw_defconfig
-index b35301fa9685..63e8bcd0b2be 100644
---- a/arch/arm/configs/bockw_defconfig
-+++ b/arch/arm/configs/bockw_defconfig
-@@ -111,7 +111,6 @@ CONFIG_UIO=y
- CONFIG_UIO_PDRV_GENIRQ=y
- # CONFIG_IOMMU_SUPPORT is not set
- # CONFIG_DNOTIFY is not set
--# CONFIG_INOTIFY_USER is not set
- CONFIG_TMPFS=y
- # CONFIG_MISC_FILESYSTEMS is not set
- CONFIG_NFS_FS=y
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0042-media-v4l-vsp1-Add-support-for-RT-clock.patch b/patches.renesas/0042-media-v4l-vsp1-Add-support-for-RT-clock.patch
deleted file mode 100644
index 65c1d06255791..0000000000000
--- a/patches.renesas/0042-media-v4l-vsp1-Add-support-for-RT-clock.patch
+++ /dev/null
@@ -1,128 +0,0 @@
-From fae12653260a4239292531c83e581ae4a84f83b1 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 22 Aug 2013 14:29:46 -0300
-Subject: [media] v4l: vsp1: Add support for RT clock
-
-The VSPR and VSPS instances use two clocks, the VSP1 system clock and
-the VSP1 realtime clock. Both of them need to be enabled to access the
-VSP1 registers.
-Add support for an optional RT clock and enable/disable it along with
-the system clock.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
-(cherry picked from commit f2226a33bf9a431f616b435aa10a9ad4fea1d042)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/media/platform/vsp1/vsp1.h     |  1 +
- drivers/media/platform/vsp1/vsp1_drv.c | 40 +++++++++++++++++++++++++++++-----
- 2 files changed, 36 insertions(+), 5 deletions(-)
-
-diff --git a/drivers/media/platform/vsp1/vsp1.h b/drivers/media/platform/vsp1/vsp1.h
-index 11ac94bec3a3..d6c6ecd039ff 100644
---- a/drivers/media/platform/vsp1/vsp1.h
-+++ b/drivers/media/platform/vsp1/vsp1.h
-@@ -42,6 +42,7 @@ struct vsp1_device {
- 
- 	void __iomem *mmio;
- 	struct clk *clock;
-+	struct clk *rt_clock;
- 
- 	struct mutex lock;
- 	int ref_count;
-diff --git a/drivers/media/platform/vsp1/vsp1_drv.c b/drivers/media/platform/vsp1/vsp1_drv.c
-index aa8b9b288e61..1c9e771aa15c 100644
---- a/drivers/media/platform/vsp1/vsp1_drv.c
-+++ b/drivers/media/platform/vsp1/vsp1_drv.c
-@@ -290,6 +290,33 @@ static int vsp1_device_init(struct vsp1_device *vsp1)
- 	return 0;
- }
- 
-+static int vsp1_clocks_enable(struct vsp1_device *vsp1)
-+{
-+	int ret;
-+
-+	ret = clk_prepare_enable(vsp1->clock);
-+	if (ret < 0)
-+		return ret;
-+
-+	if (IS_ERR(vsp1->rt_clock))
-+		return 0;
-+
-+	ret = clk_prepare_enable(vsp1->rt_clock);
-+	if (ret < 0) {
-+		clk_disable_unprepare(vsp1->clock);
-+		return ret;
-+	}
-+
-+	return 0;
-+}
-+
-+static void vsp1_clocks_disable(struct vsp1_device *vsp1)
-+{
-+	if (!IS_ERR(vsp1->rt_clock))
-+		clk_disable_unprepare(vsp1->rt_clock);
-+	clk_disable_unprepare(vsp1->clock);
-+}
-+
- /*
-  * vsp1_device_get - Acquire the VSP1 device
-  *
-@@ -307,7 +334,7 @@ struct vsp1_device *vsp1_device_get(struct vsp1_device *vsp1)
- 	if (vsp1->ref_count > 0)
- 		goto done;
- 
--	ret = clk_prepare_enable(vsp1->clock);
-+	ret = vsp1_clocks_enable(vsp1);
- 	if (ret < 0) {
- 		__vsp1 = NULL;
- 		goto done;
-@@ -315,7 +342,7 @@ struct vsp1_device *vsp1_device_get(struct vsp1_device *vsp1)
- 
- 	ret = vsp1_device_init(vsp1);
- 	if (ret < 0) {
--		clk_disable_unprepare(vsp1->clock);
-+		vsp1_clocks_disable(vsp1);
- 		__vsp1 = NULL;
- 		goto done;
- 	}
-@@ -339,7 +366,7 @@ void vsp1_device_put(struct vsp1_device *vsp1)
- 	mutex_lock(&vsp1->lock);
- 
- 	if (--vsp1->ref_count == 0)
--		clk_disable_unprepare(vsp1->clock);
-+		vsp1_clocks_disable(vsp1);
- 
- 	mutex_unlock(&vsp1->lock);
- }
-@@ -358,7 +385,7 @@ static int vsp1_pm_suspend(struct device *dev)
- 	if (vsp1->ref_count == 0)
- 		return 0;
- 
--	clk_disable_unprepare(vsp1->clock);
-+	vsp1_clocks_disable(vsp1);
- 	return 0;
- }
- 
-@@ -371,7 +398,7 @@ static int vsp1_pm_resume(struct device *dev)
- 	if (vsp1->ref_count)
- 		return 0;
- 
--	return clk_prepare_enable(vsp1->clock);
-+	return vsp1_clocks_enable(vsp1);
- }
- #endif
- 
-@@ -445,6 +472,9 @@ static int vsp1_probe(struct platform_device *pdev)
- 		return PTR_ERR(vsp1->clock);
- 	}
- 
-+	/* The RT clock is optional */
-+	vsp1->rt_clock = devm_clk_get(&pdev->dev, "rt");
-+
- 	irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
- 	if (!irq) {
- 		dev_err(&pdev->dev, "missing IRQ\n");
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0042-phy-rcar-usb-correct-base-address.patch b/patches.renesas/0042-phy-rcar-usb-correct-base-address.patch
deleted file mode 100644
index 03378d527b353..0000000000000
--- a/patches.renesas/0042-phy-rcar-usb-correct-base-address.patch
+++ /dev/null
@@ -1,77 +0,0 @@
-From 48cc6fb24264915a9ada52d5202b9a0b4741bb4d Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Sun, 2 Jun 2013 01:50:25 +0400
-Subject: phy-rcar-usb: correct base address
-
-The memory region that is used by the driver overlaps EHCI and OHCI  register
-regions for absolutely no reason now  -- fix it  by adding offset of 0x800 to
-the base address, changing the register #define's accordingly. This has extra
-positive effect that we now can use devm_ioremap_resource()...
-
-Note that the driver and the SoC code have to be in one patch to keep the code
-bisectable...
-
-The patch has been tested on the Marzen board.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Acked-by: Felipe Balbi <balbi@ti.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 725bf9dcafe16aa69c8ab34c63ba36c6eb4492f2)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-	arch/arm/mach-shmobile/setup-r8a7779.c
----
- drivers/usb/phy/phy-rcar-usb.c | 28 ++++++++++------------------
- 1 file changed, 10 insertions(+), 18 deletions(-)
-
-diff --git a/drivers/usb/phy/phy-rcar-usb.c b/drivers/usb/phy/phy-rcar-usb.c
-index 4893dbde..d636cc74 100644
---- a/drivers/usb/phy/phy-rcar-usb.c
-+++ b/drivers/usb/phy/phy-rcar-usb.c
-@@ -16,13 +16,13 @@
- #include <linux/spinlock.h>
- #include <linux/module.h>
- 
--/* USBH common register */
--#define USBPCTRL0	0x0800
--#define USBPCTRL1	0x0804
--#define USBST		0x0808
--#define USBEH0		0x080C
--#define USBOH0		0x081C
--#define USBCTL0		0x0858
-+/* REGS block */
-+#define USBPCTRL0	0x00
-+#define USBPCTRL1	0x04
-+#define USBST		0x08
-+#define USBEH0		0x0C
-+#define USBOH0		0x1C
-+#define USBCTL0		0x58
- 
- /* USBPCTRL1 */
- #define PHY_RST		(1 << 2)
-@@ -139,17 +139,9 @@ static int rcar_usb_phy_probe(struct platform_device *pdev)
- 		return -EINVAL;
- 	}
- 
--	/*
--	 * CAUTION
--	 *
--	 * Because this phy address is also mapped under OHCI/EHCI address area,
--	 * this driver can't use devm_request_and_ioremap(dev, res) here
--	 */
--	reg0 = devm_ioremap_nocache(dev, res0->start, resource_size(res0));
--	if (!reg0) {
--		dev_err(dev, "ioremap error\n");
--		return -ENOMEM;
--	}
-+	reg0 = devm_ioremap_resource(dev, res0);
-+	if (IS_ERR(reg0))
-+		return PTR_ERR(reg0);
- 
- 	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
- 	if (!priv) {
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0043-ARM-shmobile-marzen-Do-not-disable-CONFIG_INOTIFY_US.patch b/patches.renesas/0043-ARM-shmobile-marzen-Do-not-disable-CONFIG_INOTIFY_US.patch
deleted file mode 100644
index d639dac57da68..0000000000000
--- a/patches.renesas/0043-ARM-shmobile-marzen-Do-not-disable-CONFIG_INOTIFY_US.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From 3bf7274e18622f74a7eccf202060d6645d26eb2f Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Thu, 10 Oct 2013 15:12:17 +0900
-Subject: ARM: shmobile: marzen: Do not disable CONFIG_INOTIFY_USER in
- defconfig
-
-CONFIG_INOTIFY_USER is required for udev to function.
-This change brings the marzen defconfig into line with
-other shmobile defconfigs.
-
-Signed-off-by: Simon Horman <horms@verge.net.au>
-(cherry picked from commit 96ffa476493d90f2c0583ed90640acc9ef9fff06)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/configs/marzen_defconfig | 1 -
- 1 file changed, 1 deletion(-)
-
-diff --git a/arch/arm/configs/marzen_defconfig b/arch/arm/configs/marzen_defconfig
-index 103b8755d1a6..ebaaeada733d 100644
---- a/arch/arm/configs/marzen_defconfig
-+++ b/arch/arm/configs/marzen_defconfig
-@@ -108,7 +108,6 @@ CONFIG_UIO=y
- CONFIG_UIO_PDRV_GENIRQ=y
- # CONFIG_IOMMU_SUPPORT is not set
- # CONFIG_DNOTIFY is not set
--# CONFIG_INOTIFY_USER is not set
- CONFIG_TMPFS=y
- # CONFIG_MISC_FILESYSTEMS is not set
- CONFIG_NFS_FS=y
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0043-media-v4l-vsp1-Fix-mutex-double-lock-at-streamon-tim.patch b/patches.renesas/0043-media-v4l-vsp1-Fix-mutex-double-lock-at-streamon-tim.patch
deleted file mode 100644
index 2da3a66e3c790..0000000000000
--- a/patches.renesas/0043-media-v4l-vsp1-Fix-mutex-double-lock-at-streamon-tim.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From 067a19bb32538fee8e59fb37b9bb687a8f7ec94e Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 22 Aug 2013 19:51:01 -0300
-Subject: [media] v4l: vsp1: Fix mutex double lock at streamon time
-
-A mutex_lock() was left when the driver was converted to use the vb2
-ioctl helpers, resulting in a deadlock at streamon time. Fix it.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
-(cherry picked from commit 26a20eb09d44dc064c4f5d1f024bd501c09edb4b)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/media/platform/vsp1/vsp1_video.c | 2 --
- 1 file changed, 2 deletions(-)
-
-diff --git a/drivers/media/platform/vsp1/vsp1_video.c b/drivers/media/platform/vsp1/vsp1_video.c
-index 279332e34710..76718a9ea34f 100644
---- a/drivers/media/platform/vsp1/vsp1_video.c
-+++ b/drivers/media/platform/vsp1/vsp1_video.c
-@@ -839,8 +839,6 @@ vsp1_video_streamon(struct file *file, void *fh, enum v4l2_buf_type type)
- 	struct vsp1_pipeline *pipe;
- 	int ret;
- 
--	mutex_lock(&video->lock);
--
- 	if (video->queue.owner && video->queue.owner != file->private_data)
- 		return -EBUSY;
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0043-phy-rcar-usb-add-platform-data.patch b/patches.renesas/0043-phy-rcar-usb-add-platform-data.patch
deleted file mode 100644
index 7caa9d7d116aa..0000000000000
--- a/patches.renesas/0043-phy-rcar-usb-add-platform-data.patch
+++ /dev/null
@@ -1,57 +0,0 @@
-From d8f13c383c13c1f5ac533cba4462c6c4d2bb543f Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Sun, 2 Jun 2013 01:52:28 +0400
-Subject: phy-rcar-usb: add platform data
-
-Currently the driver hard-codes  USBPCTRL0 register to 0. It is wrong since this
-register contains board-specific USB ports configuration and so its value should
-be somehow passed via the platform data.  Add the global header file containing
-'struct rcar_phy_platform_data' consisting of the various bit fields describing
-USB ports' pin configuration.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Acked-by: Felipe Balbi <balbi@ti.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 6a82e2a83e568dc121326b4bab24035ce7a2f50e)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- include/linux/platform_data/usb-rcar-phy.h | 26 ++++++++++++++++++++++++++
- 1 file changed, 26 insertions(+)
- create mode 100644 include/linux/platform_data/usb-rcar-phy.h
-
-diff --git a/include/linux/platform_data/usb-rcar-phy.h b/include/linux/platform_data/usb-rcar-phy.h
-new file mode 100644
-index 00000000..c49f35ab
---- /dev/null
-+++ b/include/linux/platform_data/usb-rcar-phy.h
-@@ -0,0 +1,26 @@
-+/*
-+ * Copyright (C) 2013 Renesas Solutions Corp.
-+ * Copyright (C) 2013 Cogent Embedded, Inc.
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+
-+#ifndef __USB_RCAR_PHY_H
-+#define __USB_RCAR_PHY_H
-+
-+#include <linux/types.h>
-+
-+struct rcar_phy_platform_data {
-+	bool port1_func:1;	/* true: port 1 used by function, false: host */
-+	unsigned penc1:1;	/* Output of the PENC1 pin in function mode */
-+	struct {		/* Overcurrent pin control for ports 0..2 */
-+		bool select_3_3v:1; /* true: USB_OVCn pin, false: OVCn pin */
-+				/* Set to false on port 1 in function mode */
-+		bool active_high:1; /* true: active  high, false: active low */
-+				/* Set to true  on port 1 in function mode */
-+	} ovc_pin[3];
-+};
-+
-+#endif /* __USB_RCAR_PHY_H */
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0044-ARM-shmobile-bockw-Enable-CONFIG_VFP-in-defconfig.patch b/patches.renesas/0044-ARM-shmobile-bockw-Enable-CONFIG_VFP-in-defconfig.patch
deleted file mode 100644
index 350b433561640..0000000000000
--- a/patches.renesas/0044-ARM-shmobile-bockw-Enable-CONFIG_VFP-in-defconfig.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From 27744dddf8d85429f86d0bde88225b5364a52132 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Thu, 10 Oct 2013 15:12:17 +0900
-Subject: ARM: shmobile: bockw: Enable CONFIG_VFP in defconfig
-
-CONFIG_VFP is required to boot into a Debian armhf user-space.
-This change brings the bockw defconfig into line with
-other shmobile defconfigs.
-
-Signed-off-by: Simon Horman <horms@verge.net.au>
-(cherry picked from commit 5a14cbb732a6a4eff2a0be59deba6fdb890253b8)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/configs/bockw_defconfig | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/arch/arm/configs/bockw_defconfig b/arch/arm/configs/bockw_defconfig
-index 63e8bcd0b2be..8b5866e6292d 100644
---- a/arch/arm/configs/bockw_defconfig
-+++ b/arch/arm/configs/bockw_defconfig
-@@ -27,6 +27,7 @@ CONFIG_HIGHMEM=y
- CONFIG_ZBOOT_ROM_TEXT=0x0
- CONFIG_ZBOOT_ROM_BSS=0x0
- CONFIG_ARM_APPENDED_DTB=y
-+CONFIG_VFP=y
- # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
- # CONFIG_SUSPEND is not set
- CONFIG_PM_RUNTIME=y
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0044-dma-add-driver-for-R-Car-HPB-DMAC.patch b/patches.renesas/0044-dma-add-driver-for-R-Car-HPB-DMAC.patch
deleted file mode 100644
index aed7aadd34edb..0000000000000
--- a/patches.renesas/0044-dma-add-driver-for-R-Car-HPB-DMAC.patch
+++ /dev/null
@@ -1,830 +0,0 @@
-From 3305ec12892e49e5920c7ec9ff77af11a62748f9 Mon Sep 17 00:00:00 2001
-From: Max Filippov <max.filippov@cogentembedded.com>
-Date: Sun, 25 Aug 2013 00:33:24 +0400
-Subject: dma: add driver for R-Car HPB-DMAC
-
-Add support for HPB-DMAC found in Renesas R-Car SoCs, using 'shdma-base' DMA
-driver framework.
-
-Based on the original patch by Phil Edworthy <phil.edworthy@renesas.com>.
-
-Signed-off-by: Max Filippov <max.filippov@cogentembedded.com>
-[Sergei: removed useless #include, sorted #include's, fixed HPB_DMA_TCR_MAX,
-fixed formats and removed line breaks in the dev_dbg() calls, rephrased and
-added IRQ # to the shdma_request_irq() failure message, added MODULE_AUTHOR(),
-removed '__init'/'__exit' annotations from the probe()/remove() methods, removed
-'__initdata' annotation from 'hpb_dmae_driver', fixed guard macro name in the
-header file, fixed #define ASYNCRSTR_ASRST20, added #define ASYNCRSTR_ASRST24,
-added the necessary runtime PM calls to the probe() and remove() methods,
-handled errors returned by dma_async_device_register(), beautified comments
-and #define's.]
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: Vinod Koul <vinod.koul@intel.com>
-
-(cherry picked from commit c4f6c41ba790bbbfcebb4c47a709ac8ff1fe1af9)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/dma/sh/Kconfig                        |   6 +
- drivers/dma/sh/Makefile                       |   1 +
- drivers/dma/sh/rcar-hpbdma.c                  | 655 ++++++++++++++++++++++++++
- include/linux/platform_data/dma-rcar-hpbdma.h | 103 ++++
- 4 files changed, 765 insertions(+)
- create mode 100644 drivers/dma/sh/rcar-hpbdma.c
- create mode 100644 include/linux/platform_data/dma-rcar-hpbdma.h
-
-diff --git a/drivers/dma/sh/Kconfig b/drivers/dma/sh/Kconfig
-index 5c1dee20c13e..e2b94d16f41f 100644
---- a/drivers/dma/sh/Kconfig
-+++ b/drivers/dma/sh/Kconfig
-@@ -22,3 +22,9 @@ config SUDMAC
- 	depends on SH_DMAE_BASE
- 	help
- 	  Enable support for the Renesas SUDMAC controllers.
-+
-+config RCAR_HPB_DMAE
-+	tristate "Renesas R-Car HPB DMAC support"
-+	depends on SH_DMAE_BASE
-+	help
-+	  Enable support for the Renesas R-Car series DMA controllers.
-diff --git a/drivers/dma/sh/Makefile b/drivers/dma/sh/Makefile
-index c07ca4612e46..3524b3056035 100644
---- a/drivers/dma/sh/Makefile
-+++ b/drivers/dma/sh/Makefile
-@@ -1,3 +1,4 @@
- obj-$(CONFIG_SH_DMAE_BASE) += shdma-base.o
- obj-$(CONFIG_SH_DMAE) += shdma.o
- obj-$(CONFIG_SUDMAC) += sudmac.o
-+obj-$(CONFIG_RCAR_HPB_DMAE) += rcar-hpbdma.o
-diff --git a/drivers/dma/sh/rcar-hpbdma.c b/drivers/dma/sh/rcar-hpbdma.c
-new file mode 100644
-index 000000000000..45a520281ce1
---- /dev/null
-+++ b/drivers/dma/sh/rcar-hpbdma.c
-@@ -0,0 +1,655 @@
-+/*
-+ * Copyright (C) 2011-2013 Renesas Electronics Corporation
-+ * Copyright (C) 2013 Cogent Embedded, Inc.
-+ *
-+ * This file is based on the drivers/dma/sh/shdma.c
-+ *
-+ * Renesas SuperH DMA Engine support
-+ *
-+ * This is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ *
-+ * - DMA of SuperH does not have Hardware DMA chain mode.
-+ * - max DMA size is 16MB.
-+ *
-+ */
-+
-+#include <linux/dmaengine.h>
-+#include <linux/delay.h>
-+#include <linux/init.h>
-+#include <linux/interrupt.h>
-+#include <linux/module.h>
-+#include <linux/platform_data/dma-rcar-hpbdma.h>
-+#include <linux/platform_device.h>
-+#include <linux/pm_runtime.h>
-+#include <linux/shdma-base.h>
-+#include <linux/slab.h>
-+
-+/* DMA channel registers */
-+#define HPB_DMAE_DSAR0	0x00
-+#define HPB_DMAE_DDAR0	0x04
-+#define HPB_DMAE_DTCR0	0x08
-+#define HPB_DMAE_DSAR1	0x0C
-+#define HPB_DMAE_DDAR1	0x10
-+#define HPB_DMAE_DTCR1	0x14
-+#define HPB_DMAE_DSASR	0x18
-+#define HPB_DMAE_DDASR	0x1C
-+#define HPB_DMAE_DTCSR	0x20
-+#define HPB_DMAE_DPTR	0x24
-+#define HPB_DMAE_DCR	0x28
-+#define HPB_DMAE_DCMDR	0x2C
-+#define HPB_DMAE_DSTPR	0x30
-+#define HPB_DMAE_DSTSR	0x34
-+#define HPB_DMAE_DDBGR	0x38
-+#define HPB_DMAE_DDBGR2	0x3C
-+#define HPB_DMAE_CHAN(n)	(0x40 * (n))
-+
-+/* DMA command register (DCMDR) bits */
-+#define HPB_DMAE_DCMDR_BDOUT	BIT(7)
-+#define HPB_DMAE_DCMDR_DQSPD	BIT(6)
-+#define HPB_DMAE_DCMDR_DQSPC	BIT(5)
-+#define HPB_DMAE_DCMDR_DMSPD	BIT(4)
-+#define HPB_DMAE_DCMDR_DMSPC	BIT(3)
-+#define HPB_DMAE_DCMDR_DQEND	BIT(2)
-+#define HPB_DMAE_DCMDR_DNXT	BIT(1)
-+#define HPB_DMAE_DCMDR_DMEN	BIT(0)
-+
-+/* DMA forced stop register (DSTPR) bits */
-+#define HPB_DMAE_DSTPR_DMSTP	BIT(0)
-+
-+/* DMA status register (DSTSR) bits */
-+#define HPB_DMAE_DSTSR_DMSTS	BIT(0)
-+
-+/* DMA common registers */
-+#define HPB_DMAE_DTIMR		0x00
-+#define HPB_DMAE_DINTSR0		0x0C
-+#define HPB_DMAE_DINTSR1		0x10
-+#define HPB_DMAE_DINTCR0		0x14
-+#define HPB_DMAE_DINTCR1		0x18
-+#define HPB_DMAE_DINTMR0		0x1C
-+#define HPB_DMAE_DINTMR1		0x20
-+#define HPB_DMAE_DACTSR0		0x24
-+#define HPB_DMAE_DACTSR1		0x28
-+#define HPB_DMAE_HSRSTR(n)	(0x40 + (n) * 4)
-+#define HPB_DMAE_HPB_DMASPR(n)	(0x140 + (n) * 4)
-+#define HPB_DMAE_HPB_DMLVLR0	0x160
-+#define HPB_DMAE_HPB_DMLVLR1	0x164
-+#define HPB_DMAE_HPB_DMSHPT0	0x168
-+#define HPB_DMAE_HPB_DMSHPT1	0x16C
-+
-+#define HPB_DMA_SLAVE_NUMBER 256
-+#define HPB_DMA_TCR_MAX 0x01000000	/* 16 MiB */
-+
-+struct hpb_dmae_chan {
-+	struct shdma_chan shdma_chan;
-+	int xfer_mode;			/* DMA transfer mode */
-+#define XFER_SINGLE	1
-+#define XFER_DOUBLE	2
-+	unsigned plane_idx;		/* current DMA information set */
-+	bool first_desc;		/* first/next transfer */
-+	int xmit_shift;			/* log_2(bytes_per_xfer) */
-+	void __iomem *base;
-+	const struct hpb_dmae_slave_config *cfg;
-+	char dev_id[16];		/* unique name per DMAC of channel */
-+};
-+
-+struct hpb_dmae_device {
-+	struct shdma_dev shdma_dev;
-+	spinlock_t reg_lock;		/* comm_reg operation lock */
-+	struct hpb_dmae_pdata *pdata;
-+	void __iomem *chan_reg;
-+	void __iomem *comm_reg;
-+	void __iomem *reset_reg;
-+	void __iomem *mode_reg;
-+};
-+
-+struct hpb_dmae_regs {
-+	u32 sar; /* SAR / source address */
-+	u32 dar; /* DAR / destination address */
-+	u32 tcr; /* TCR / transfer count */
-+};
-+
-+struct hpb_desc {
-+	struct shdma_desc shdma_desc;
-+	struct hpb_dmae_regs hw;
-+	unsigned plane_idx;
-+};
-+
-+#define to_chan(schan) container_of(schan, struct hpb_dmae_chan, shdma_chan)
-+#define to_desc(sdesc) container_of(sdesc, struct hpb_desc, shdma_desc)
-+#define to_dev(sc) container_of(sc->shdma_chan.dma_chan.device, \
-+				struct hpb_dmae_device, shdma_dev.dma_dev)
-+
-+static void ch_reg_write(struct hpb_dmae_chan *hpb_dc, u32 data, u32 reg)
-+{
-+	iowrite32(data, hpb_dc->base + reg);
-+}
-+
-+static u32 ch_reg_read(struct hpb_dmae_chan *hpb_dc, u32 reg)
-+{
-+	return ioread32(hpb_dc->base + reg);
-+}
-+
-+static void dcmdr_write(struct hpb_dmae_device *hpbdev, u32 data)
-+{
-+	iowrite32(data, hpbdev->chan_reg + HPB_DMAE_DCMDR);
-+}
-+
-+static void hsrstr_write(struct hpb_dmae_device *hpbdev, u32 ch)
-+{
-+	iowrite32(0x1, hpbdev->comm_reg + HPB_DMAE_HSRSTR(ch));
-+}
-+
-+static u32 dintsr_read(struct hpb_dmae_device *hpbdev, u32 ch)
-+{
-+	u32 v;
-+
-+	if (ch < 32)
-+		v = ioread32(hpbdev->comm_reg + HPB_DMAE_DINTSR0) >> ch;
-+	else
-+		v = ioread32(hpbdev->comm_reg + HPB_DMAE_DINTSR1) >> (ch - 32);
-+	return v & 0x1;
-+}
-+
-+static void dintcr_write(struct hpb_dmae_device *hpbdev, u32 ch)
-+{
-+	if (ch < 32)
-+		iowrite32((0x1 << ch), hpbdev->comm_reg + HPB_DMAE_DINTCR0);
-+	else
-+		iowrite32((0x1 << (ch - 32)),
-+			  hpbdev->comm_reg + HPB_DMAE_DINTCR1);
-+}
-+
-+static void asyncmdr_write(struct hpb_dmae_device *hpbdev, u32 data)
-+{
-+	iowrite32(data, hpbdev->mode_reg);
-+}
-+
-+static u32 asyncmdr_read(struct hpb_dmae_device *hpbdev)
-+{
-+	return ioread32(hpbdev->mode_reg);
-+}
-+
-+static void hpb_dmae_enable_int(struct hpb_dmae_device *hpbdev, u32 ch)
-+{
-+	u32 intreg;
-+
-+	spin_lock_irq(&hpbdev->reg_lock);
-+	if (ch < 32) {
-+		intreg = ioread32(hpbdev->comm_reg + HPB_DMAE_DINTMR0);
-+		iowrite32(BIT(ch) | intreg,
-+			  hpbdev->comm_reg + HPB_DMAE_DINTMR0);
-+	} else {
-+		intreg = ioread32(hpbdev->comm_reg + HPB_DMAE_DINTMR1);
-+		iowrite32(BIT(ch - 32) | intreg,
-+			  hpbdev->comm_reg + HPB_DMAE_DINTMR1);
-+	}
-+	spin_unlock_irq(&hpbdev->reg_lock);
-+}
-+
-+static void hpb_dmae_async_reset(struct hpb_dmae_device *hpbdev, u32 data)
-+{
-+	u32 rstr;
-+	int timeout = 10000;	/* 100 ms */
-+
-+	spin_lock(&hpbdev->reg_lock);
-+	rstr = ioread32(hpbdev->reset_reg);
-+	rstr |= data;
-+	iowrite32(rstr, hpbdev->reset_reg);
-+	do {
-+		rstr = ioread32(hpbdev->reset_reg);
-+		if ((rstr & data) == data)
-+			break;
-+		udelay(10);
-+	} while (timeout--);
-+
-+	if (timeout < 0)
-+		dev_err(hpbdev->shdma_dev.dma_dev.dev,
-+			"%s timeout\n", __func__);
-+
-+	rstr &= ~data;
-+	iowrite32(rstr, hpbdev->reset_reg);
-+	spin_unlock(&hpbdev->reg_lock);
-+}
-+
-+static void hpb_dmae_set_async_mode(struct hpb_dmae_device *hpbdev,
-+				    u32 mask, u32 data)
-+{
-+	u32 mode;
-+
-+	spin_lock_irq(&hpbdev->reg_lock);
-+	mode = asyncmdr_read(hpbdev);
-+	mode &= ~mask;
-+	mode |= data;
-+	asyncmdr_write(hpbdev, mode);
-+	spin_unlock_irq(&hpbdev->reg_lock);
-+}
-+
-+static void hpb_dmae_ctl_stop(struct hpb_dmae_device *hpbdev)
-+{
-+	dcmdr_write(hpbdev, HPB_DMAE_DCMDR_DQSPD);
-+}
-+
-+static void hpb_dmae_reset(struct hpb_dmae_device *hpbdev)
-+{
-+	u32 ch;
-+
-+	for (ch = 0; ch < hpbdev->pdata->num_hw_channels; ch++)
-+		hsrstr_write(hpbdev, ch);
-+}
-+
-+static unsigned int calc_xmit_shift(struct hpb_dmae_chan *hpb_chan)
-+{
-+	struct hpb_dmae_device *hpbdev = to_dev(hpb_chan);
-+	struct hpb_dmae_pdata *pdata = hpbdev->pdata;
-+	int width = ch_reg_read(hpb_chan, HPB_DMAE_DCR);
-+	int i;
-+
-+	switch (width & (HPB_DMAE_DCR_SPDS_MASK | HPB_DMAE_DCR_DPDS_MASK)) {
-+	case HPB_DMAE_DCR_SPDS_8BIT | HPB_DMAE_DCR_DPDS_8BIT:
-+	default:
-+		i = XMIT_SZ_8BIT;
-+		break;
-+	case HPB_DMAE_DCR_SPDS_16BIT | HPB_DMAE_DCR_DPDS_16BIT:
-+		i = XMIT_SZ_16BIT;
-+		break;
-+	case HPB_DMAE_DCR_SPDS_32BIT | HPB_DMAE_DCR_DPDS_32BIT:
-+		i = XMIT_SZ_32BIT;
-+		break;
-+	}
-+	return pdata->ts_shift[i];
-+}
-+
-+static void hpb_dmae_set_reg(struct hpb_dmae_chan *hpb_chan,
-+			     struct hpb_dmae_regs *hw, unsigned plane)
-+{
-+	ch_reg_write(hpb_chan, hw->sar,
-+		     plane ? HPB_DMAE_DSAR1 : HPB_DMAE_DSAR0);
-+	ch_reg_write(hpb_chan, hw->dar,
-+		     plane ? HPB_DMAE_DDAR1 : HPB_DMAE_DDAR0);
-+	ch_reg_write(hpb_chan, hw->tcr >> hpb_chan->xmit_shift,
-+		     plane ? HPB_DMAE_DTCR1 : HPB_DMAE_DTCR0);
-+}
-+
-+static void hpb_dmae_start(struct hpb_dmae_chan *hpb_chan, bool next)
-+{
-+	ch_reg_write(hpb_chan, (next ? HPB_DMAE_DCMDR_DNXT : 0) |
-+		     HPB_DMAE_DCMDR_DMEN, HPB_DMAE_DCMDR);
-+}
-+
-+static void hpb_dmae_halt(struct shdma_chan *schan)
-+{
-+	struct hpb_dmae_chan *chan = to_chan(schan);
-+
-+	ch_reg_write(chan, HPB_DMAE_DCMDR_DQEND, HPB_DMAE_DCMDR);
-+	ch_reg_write(chan, HPB_DMAE_DSTPR_DMSTP, HPB_DMAE_DSTPR);
-+}
-+
-+static const struct hpb_dmae_slave_config *
-+hpb_dmae_find_slave(struct hpb_dmae_chan *hpb_chan, int slave_id)
-+{
-+	struct hpb_dmae_device *hpbdev = to_dev(hpb_chan);
-+	struct hpb_dmae_pdata *pdata = hpbdev->pdata;
-+	int i;
-+
-+	if (slave_id >= HPB_DMA_SLAVE_NUMBER)
-+		return NULL;
-+
-+	for (i = 0; i < pdata->num_slaves; i++)
-+		if (pdata->slaves[i].id == slave_id)
-+			return pdata->slaves + i;
-+
-+	return NULL;
-+}
-+
-+static void hpb_dmae_start_xfer(struct shdma_chan *schan,
-+				struct shdma_desc *sdesc)
-+{
-+	struct hpb_dmae_chan *chan = to_chan(schan);
-+	struct hpb_dmae_device *hpbdev = to_dev(chan);
-+	struct hpb_desc *desc = to_desc(sdesc);
-+
-+	if (chan->cfg->flags & HPB_DMAE_SET_ASYNC_RESET)
-+		hpb_dmae_async_reset(hpbdev, chan->cfg->rstr);
-+
-+	desc->plane_idx = chan->plane_idx;
-+	hpb_dmae_set_reg(chan, &desc->hw, chan->plane_idx);
-+	hpb_dmae_start(chan, !chan->first_desc);
-+
-+	if (chan->xfer_mode == XFER_DOUBLE) {
-+		chan->plane_idx ^= 1;
-+		chan->first_desc = false;
-+	}
-+}
-+
-+static bool hpb_dmae_desc_completed(struct shdma_chan *schan,
-+				    struct shdma_desc *sdesc)
-+{
-+	/*
-+	 * This is correct since we always have at most single
-+	 * outstanding DMA transfer per channel, and by the time
-+	 * we get completion interrupt the transfer is completed.
-+	 * This will change if we ever use alternating DMA
-+	 * information sets and submit two descriptors at once.
-+	 */
-+	return true;
-+}
-+
-+static bool hpb_dmae_chan_irq(struct shdma_chan *schan, int irq)
-+{
-+	struct hpb_dmae_chan *chan = to_chan(schan);
-+	struct hpb_dmae_device *hpbdev = to_dev(chan);
-+	int ch = chan->cfg->dma_ch;
-+
-+	/* Check Complete DMA Transfer */
-+	if (dintsr_read(hpbdev, ch)) {
-+		/* Clear Interrupt status */
-+		dintcr_write(hpbdev, ch);
-+		return true;
-+	}
-+	return false;
-+}
-+
-+static int hpb_dmae_desc_setup(struct shdma_chan *schan,
-+			       struct shdma_desc *sdesc,
-+			       dma_addr_t src, dma_addr_t dst, size_t *len)
-+{
-+	struct hpb_desc *desc = to_desc(sdesc);
-+
-+	if (*len > (size_t)HPB_DMA_TCR_MAX)
-+		*len = (size_t)HPB_DMA_TCR_MAX;
-+
-+	desc->hw.sar = src;
-+	desc->hw.dar = dst;
-+	desc->hw.tcr = *len;
-+
-+	return 0;
-+}
-+
-+static size_t hpb_dmae_get_partial(struct shdma_chan *schan,
-+				   struct shdma_desc *sdesc)
-+{
-+	struct hpb_desc *desc = to_desc(sdesc);
-+	struct hpb_dmae_chan *chan = to_chan(schan);
-+	u32 tcr = ch_reg_read(chan, desc->plane_idx ?
-+			      HPB_DMAE_DTCR1 : HPB_DMAE_DTCR0);
-+
-+	return (desc->hw.tcr - tcr) << chan->xmit_shift;
-+}
-+
-+static bool hpb_dmae_channel_busy(struct shdma_chan *schan)
-+{
-+	struct hpb_dmae_chan *chan = to_chan(schan);
-+	u32 dstsr = ch_reg_read(chan, HPB_DMAE_DSTSR);
-+
-+	return (dstsr & HPB_DMAE_DSTSR_DMSTS) == HPB_DMAE_DSTSR_DMSTS;
-+}
-+
-+static int
-+hpb_dmae_alloc_chan_resources(struct hpb_dmae_chan *hpb_chan,
-+			      const struct hpb_dmae_slave_config *cfg)
-+{
-+	struct hpb_dmae_device *hpbdev = to_dev(hpb_chan);
-+	struct hpb_dmae_pdata *pdata = hpbdev->pdata;
-+	const struct hpb_dmae_channel *channel = pdata->channels;
-+	int slave_id = cfg->id;
-+	int i, err;
-+
-+	for (i = 0; i < pdata->num_channels; i++, channel++) {
-+		if (channel->s_id == slave_id) {
-+			struct device *dev = hpb_chan->shdma_chan.dev;
-+
-+			hpb_chan->base = hpbdev->chan_reg +
-+				HPB_DMAE_CHAN(cfg->dma_ch);
-+
-+			dev_dbg(dev, "Detected Slave device\n");
-+			dev_dbg(dev, " -- slave_id       : 0x%x\n", slave_id);
-+			dev_dbg(dev, " -- cfg->dma_ch    : %d\n", cfg->dma_ch);
-+			dev_dbg(dev, " -- channel->ch_irq: %d\n",
-+				channel->ch_irq);
-+			break;
-+		}
-+	}
-+
-+	err = shdma_request_irq(&hpb_chan->shdma_chan, channel->ch_irq,
-+				IRQF_SHARED, hpb_chan->dev_id);
-+	if (err) {
-+		dev_err(hpb_chan->shdma_chan.dev,
-+			"DMA channel request_irq %d failed with error %d\n",
-+			channel->ch_irq, err);
-+		return err;
-+	}
-+
-+	hpb_chan->plane_idx = 0;
-+	hpb_chan->first_desc = true;
-+
-+	if ((cfg->dcr & (HPB_DMAE_DCR_CT | HPB_DMAE_DCR_DIP)) == 0) {
-+		hpb_chan->xfer_mode = XFER_SINGLE;
-+	} else if ((cfg->dcr & (HPB_DMAE_DCR_CT | HPB_DMAE_DCR_DIP)) ==
-+		   (HPB_DMAE_DCR_CT | HPB_DMAE_DCR_DIP)) {
-+		hpb_chan->xfer_mode = XFER_DOUBLE;
-+	} else {
-+		dev_err(hpb_chan->shdma_chan.dev, "DCR setting error");
-+		shdma_free_irq(&hpb_chan->shdma_chan);
-+		return -EINVAL;
-+	}
-+
-+	if (cfg->flags & HPB_DMAE_SET_ASYNC_MODE)
-+		hpb_dmae_set_async_mode(hpbdev, cfg->mdm, cfg->mdr);
-+	ch_reg_write(hpb_chan, cfg->dcr, HPB_DMAE_DCR);
-+	ch_reg_write(hpb_chan, cfg->port, HPB_DMAE_DPTR);
-+	hpb_chan->xmit_shift = calc_xmit_shift(hpb_chan);
-+	hpb_dmae_enable_int(hpbdev, cfg->dma_ch);
-+
-+	return 0;
-+}
-+
-+static int hpb_dmae_set_slave(struct shdma_chan *schan, int slave_id, bool try)
-+{
-+	struct hpb_dmae_chan *chan = to_chan(schan);
-+	const struct hpb_dmae_slave_config *sc =
-+		hpb_dmae_find_slave(chan, slave_id);
-+
-+	if (!sc)
-+		return -ENODEV;
-+	if (try)
-+		return 0;
-+	chan->cfg = sc;
-+	return hpb_dmae_alloc_chan_resources(chan, sc);
-+}
-+
-+static void hpb_dmae_setup_xfer(struct shdma_chan *schan, int slave_id)
-+{
-+}
-+
-+static dma_addr_t hpb_dmae_slave_addr(struct shdma_chan *schan)
-+{
-+	struct hpb_dmae_chan *chan = to_chan(schan);
-+
-+	return chan->cfg->addr;
-+}
-+
-+static struct shdma_desc *hpb_dmae_embedded_desc(void *buf, int i)
-+{
-+	return &((struct hpb_desc *)buf)[i].shdma_desc;
-+}
-+
-+static const struct shdma_ops hpb_dmae_ops = {
-+	.desc_completed = hpb_dmae_desc_completed,
-+	.halt_channel = hpb_dmae_halt,
-+	.channel_busy = hpb_dmae_channel_busy,
-+	.slave_addr = hpb_dmae_slave_addr,
-+	.desc_setup = hpb_dmae_desc_setup,
-+	.set_slave = hpb_dmae_set_slave,
-+	.setup_xfer = hpb_dmae_setup_xfer,
-+	.start_xfer = hpb_dmae_start_xfer,
-+	.embedded_desc = hpb_dmae_embedded_desc,
-+	.chan_irq = hpb_dmae_chan_irq,
-+	.get_partial = hpb_dmae_get_partial,
-+};
-+
-+static int hpb_dmae_chan_probe(struct hpb_dmae_device *hpbdev, int id)
-+{
-+	struct shdma_dev *sdev = &hpbdev->shdma_dev;
-+	struct platform_device *pdev =
-+		to_platform_device(hpbdev->shdma_dev.dma_dev.dev);
-+	struct hpb_dmae_chan *new_hpb_chan;
-+	struct shdma_chan *schan;
-+
-+	/* Alloc channel */
-+	new_hpb_chan = devm_kzalloc(&pdev->dev,
-+				    sizeof(struct hpb_dmae_chan), GFP_KERNEL);
-+	if (!new_hpb_chan) {
-+		dev_err(hpbdev->shdma_dev.dma_dev.dev,
-+			"No free memory for allocating DMA channels!\n");
-+		return -ENOMEM;
-+	}
-+
-+	schan = &new_hpb_chan->shdma_chan;
-+	shdma_chan_probe(sdev, schan, id);
-+
-+	if (pdev->id >= 0)
-+		snprintf(new_hpb_chan->dev_id, sizeof(new_hpb_chan->dev_id),
-+			 "hpb-dmae%d.%d", pdev->id, id);
-+	else
-+		snprintf(new_hpb_chan->dev_id, sizeof(new_hpb_chan->dev_id),
-+			 "hpb-dma.%d", id);
-+
-+	return 0;
-+}
-+
-+static int hpb_dmae_probe(struct platform_device *pdev)
-+{
-+	struct hpb_dmae_pdata *pdata = pdev->dev.platform_data;
-+	struct hpb_dmae_device *hpbdev;
-+	struct dma_device *dma_dev;
-+	struct resource *chan, *comm, *rest, *mode, *irq_res;
-+	int err, i;
-+
-+	/* Get platform data */
-+	if (!pdata || !pdata->num_channels)
-+		return -ENODEV;
-+
-+	chan = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+	comm = platform_get_resource(pdev, IORESOURCE_MEM, 1);
-+	rest = platform_get_resource(pdev, IORESOURCE_MEM, 2);
-+	mode = platform_get_resource(pdev, IORESOURCE_MEM, 3);
-+
-+	irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
-+	if (!irq_res)
-+		return -ENODEV;
-+
-+	hpbdev = devm_kzalloc(&pdev->dev, sizeof(struct hpb_dmae_device),
-+			      GFP_KERNEL);
-+	if (!hpbdev) {
-+		dev_err(&pdev->dev, "Not enough memory\n");
-+		return -ENOMEM;
-+	}
-+
-+	hpbdev->chan_reg = devm_ioremap_resource(&pdev->dev, chan);
-+	if (IS_ERR(hpbdev->chan_reg))
-+		return PTR_ERR(hpbdev->chan_reg);
-+
-+	hpbdev->comm_reg = devm_ioremap_resource(&pdev->dev, comm);
-+	if (IS_ERR(hpbdev->comm_reg))
-+		return PTR_ERR(hpbdev->comm_reg);
-+
-+	hpbdev->reset_reg = devm_ioremap_resource(&pdev->dev, rest);
-+	if (IS_ERR(hpbdev->reset_reg))
-+		return PTR_ERR(hpbdev->reset_reg);
-+
-+	hpbdev->mode_reg = devm_ioremap_resource(&pdev->dev, mode);
-+	if (IS_ERR(hpbdev->mode_reg))
-+		return PTR_ERR(hpbdev->mode_reg);
-+
-+	dma_dev = &hpbdev->shdma_dev.dma_dev;
-+
-+	spin_lock_init(&hpbdev->reg_lock);
-+
-+	/* Platform data */
-+	hpbdev->pdata = pdata;
-+
-+	pm_runtime_enable(&pdev->dev);
-+	err = pm_runtime_get_sync(&pdev->dev);
-+	if (err < 0)
-+		dev_err(&pdev->dev, "%s(): GET = %d\n", __func__, err);
-+
-+	/* Reset DMA controller */
-+	hpb_dmae_reset(hpbdev);
-+
-+	pm_runtime_put(&pdev->dev);
-+
-+	dma_cap_set(DMA_MEMCPY, dma_dev->cap_mask);
-+	dma_cap_set(DMA_SLAVE, dma_dev->cap_mask);
-+
-+	hpbdev->shdma_dev.ops = &hpb_dmae_ops;
-+	hpbdev->shdma_dev.desc_size = sizeof(struct hpb_desc);
-+	err = shdma_init(&pdev->dev, &hpbdev->shdma_dev, pdata->num_channels);
-+	if (err < 0)
-+		goto error;
-+
-+	/* Create DMA channels */
-+	for (i = 0; i < pdata->num_channels; i++)
-+		hpb_dmae_chan_probe(hpbdev, i);
-+
-+	platform_set_drvdata(pdev, hpbdev);
-+	err = dma_async_device_register(dma_dev);
-+	if (!err)
-+		return 0;
-+
-+	shdma_cleanup(&hpbdev->shdma_dev);
-+error:
-+	pm_runtime_disable(&pdev->dev);
-+	return err;
-+}
-+
-+static void hpb_dmae_chan_remove(struct hpb_dmae_device *hpbdev)
-+{
-+	struct dma_device *dma_dev = &hpbdev->shdma_dev.dma_dev;
-+	struct shdma_chan *schan;
-+	int i;
-+
-+	shdma_for_each_chan(schan, &hpbdev->shdma_dev, i) {
-+		BUG_ON(!schan);
-+
-+		shdma_free_irq(schan);
-+		shdma_chan_remove(schan);
-+	}
-+	dma_dev->chancnt = 0;
-+}
-+
-+static int hpb_dmae_remove(struct platform_device *pdev)
-+{
-+	struct hpb_dmae_device *hpbdev = platform_get_drvdata(pdev);
-+
-+	dma_async_device_unregister(&hpbdev->shdma_dev.dma_dev);
-+
-+	pm_runtime_disable(&pdev->dev);
-+
-+	hpb_dmae_chan_remove(hpbdev);
-+
-+	return 0;
-+}
-+
-+static void hpb_dmae_shutdown(struct platform_device *pdev)
-+{
-+	struct hpb_dmae_device *hpbdev = platform_get_drvdata(pdev);
-+	hpb_dmae_ctl_stop(hpbdev);
-+}
-+
-+static struct platform_driver hpb_dmae_driver = {
-+	.probe		= hpb_dmae_probe,
-+	.remove		= hpb_dmae_remove,
-+	.shutdown	= hpb_dmae_shutdown,
-+	.driver = {
-+		.owner	= THIS_MODULE,
-+		.name	= "hpb-dma-engine",
-+	},
-+};
-+module_platform_driver(hpb_dmae_driver);
-+
-+MODULE_AUTHOR("Max Filippov <max.filippov@cogentembedded.com>");
-+MODULE_DESCRIPTION("Renesas HPB DMA Engine driver");
-+MODULE_LICENSE("GPL");
-diff --git a/include/linux/platform_data/dma-rcar-hpbdma.h b/include/linux/platform_data/dma-rcar-hpbdma.h
-new file mode 100644
-index 000000000000..648b8ea61a22
---- /dev/null
-+++ b/include/linux/platform_data/dma-rcar-hpbdma.h
-@@ -0,0 +1,103 @@
-+/*
-+ * Copyright (C) 2011-2013 Renesas Electronics Corporation
-+ * Copyright (C) 2013 Cogent Embedded, Inc.
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2
-+ * as published by the Free Software Foundation.
-+ */
-+
-+#ifndef __DMA_RCAR_HPBDMA_H
-+#define __DMA_RCAR_HPBDMA_H
-+
-+#include <linux/bitops.h>
-+#include <linux/types.h>
-+
-+/* Transmit sizes and respective register values */
-+enum {
-+	XMIT_SZ_8BIT	= 0,
-+	XMIT_SZ_16BIT	= 1,
-+	XMIT_SZ_32BIT	= 2,
-+	XMIT_SZ_MAX
-+};
-+
-+/* DMA control register (DCR) bits */
-+#define HPB_DMAE_DCR_DTAMD		(1u << 26)
-+#define HPB_DMAE_DCR_DTAC		(1u << 25)
-+#define HPB_DMAE_DCR_DTAU		(1u << 24)
-+#define HPB_DMAE_DCR_DTAU1		(1u << 23)
-+#define HPB_DMAE_DCR_SWMD		(1u << 22)
-+#define HPB_DMAE_DCR_BTMD		(1u << 21)
-+#define HPB_DMAE_DCR_PKMD		(1u << 20)
-+#define HPB_DMAE_DCR_CT			(1u << 18)
-+#define HPB_DMAE_DCR_ACMD		(1u << 17)
-+#define HPB_DMAE_DCR_DIP		(1u << 16)
-+#define HPB_DMAE_DCR_SMDL		(1u << 13)
-+#define HPB_DMAE_DCR_SPDAM		(1u << 12)
-+#define HPB_DMAE_DCR_SDRMD_MASK		(3u << 10)
-+#define HPB_DMAE_DCR_SDRMD_MOD		(0u << 10)
-+#define HPB_DMAE_DCR_SDRMD_AUTO		(1u << 10)
-+#define HPB_DMAE_DCR_SDRMD_TIMER	(2u << 10)
-+#define HPB_DMAE_DCR_SPDS_MASK		(3u << 8)
-+#define HPB_DMAE_DCR_SPDS_8BIT		(0u << 8)
-+#define HPB_DMAE_DCR_SPDS_16BIT		(1u << 8)
-+#define HPB_DMAE_DCR_SPDS_32BIT		(2u << 8)
-+#define HPB_DMAE_DCR_DMDL		(1u << 5)
-+#define HPB_DMAE_DCR_DPDAM		(1u << 4)
-+#define HPB_DMAE_DCR_DDRMD_MASK		(3u << 2)
-+#define HPB_DMAE_DCR_DDRMD_MOD		(0u << 2)
-+#define HPB_DMAE_DCR_DDRMD_AUTO		(1u << 2)
-+#define HPB_DMAE_DCR_DDRMD_TIMER	(2u << 2)
-+#define HPB_DMAE_DCR_DPDS_MASK		(3u << 0)
-+#define HPB_DMAE_DCR_DPDS_8BIT		(0u << 0)
-+#define HPB_DMAE_DCR_DPDS_16BIT		(1u << 0)
-+#define HPB_DMAE_DCR_DPDS_32BIT		(2u << 0)
-+
-+/* Asynchronous reset register (ASYNCRSTR) bits */
-+#define HPB_DMAE_ASYNCRSTR_ASRST41	BIT(10)
-+#define HPB_DMAE_ASYNCRSTR_ASRST40	BIT(9)
-+#define HPB_DMAE_ASYNCRSTR_ASRST39	BIT(8)
-+#define HPB_DMAE_ASYNCRSTR_ASRST27	BIT(7)
-+#define HPB_DMAE_ASYNCRSTR_ASRST26	BIT(6)
-+#define HPB_DMAE_ASYNCRSTR_ASRST25	BIT(5)
-+#define HPB_DMAE_ASYNCRSTR_ASRST24	BIT(4)
-+#define HPB_DMAE_ASYNCRSTR_ASRST23	BIT(3)
-+#define HPB_DMAE_ASYNCRSTR_ASRST22	BIT(2)
-+#define HPB_DMAE_ASYNCRSTR_ASRST21	BIT(1)
-+#define HPB_DMAE_ASYNCRSTR_ASRST20	BIT(0)
-+
-+struct hpb_dmae_slave_config {
-+	unsigned int	id;
-+	dma_addr_t	addr;
-+	u32		dcr;
-+	u32		port;
-+	u32		rstr;
-+	u32		mdr;
-+	u32		mdm;
-+	u32		flags;
-+#define	HPB_DMAE_SET_ASYNC_RESET	BIT(0)
-+#define	HPB_DMAE_SET_ASYNC_MODE		BIT(1)
-+	u32		dma_ch;
-+};
-+
-+#define HPB_DMAE_CHANNEL(_irq, _s_id)	\
-+{					\
-+	.ch_irq		= _irq,		\
-+	.s_id		= _s_id,	\
-+}
-+
-+struct hpb_dmae_channel {
-+	unsigned int	ch_irq;
-+	unsigned int	s_id;
-+};
-+
-+struct hpb_dmae_pdata {
-+	const struct hpb_dmae_slave_config *slaves;
-+	int num_slaves;
-+	const struct hpb_dmae_channel *channels;
-+	int num_channels;
-+	const unsigned int ts_shift[XMIT_SZ_MAX];
-+	int num_hw_channels;
-+};
-+
-+#endif
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0044-phy-rcar-usb-handle-platform-data.patch b/patches.renesas/0044-phy-rcar-usb-handle-platform-data.patch
deleted file mode 100644
index 83eb4b38e0392..0000000000000
--- a/patches.renesas/0044-phy-rcar-usb-handle-platform-data.patch
+++ /dev/null
@@ -1,133 +0,0 @@
-From 22e453504b30dc6b98e667ecf3869fbba233fa56 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Sun, 2 Jun 2013 01:57:18 +0400
-Subject: phy-rcar-usb: handle platform data
-
-Set the USBPCTRL0 register from the passed platform data in rcar_usb_phy_init();
-don't reset it to 0 in  rcar_usb_phy_shutdown()  anymore as that does not make
-sense.  Also, don't allow the driver's probe to succeed when the platform data
-are not supplied with a device.
-
-The patch has been tested on the Marzen and BOCK-W boards.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Acked-by: Simon Horman <horms+renesas@verge.net.au>
-Acked-by: Felipe Balbi <balbi@ti.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 7173e59e6b5f9cbde3ece66ae664454edcac6382)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/phy/phy-rcar-usb.c | 51 +++++++++++++++++++++++++++++++++++++-----
- 1 file changed, 45 insertions(+), 6 deletions(-)
-
-diff --git a/drivers/usb/phy/phy-rcar-usb.c b/drivers/usb/phy/phy-rcar-usb.c
-index d636cc74..823b2bb8 100644
---- a/drivers/usb/phy/phy-rcar-usb.c
-+++ b/drivers/usb/phy/phy-rcar-usb.c
-@@ -1,8 +1,9 @@
- /*
-  * Renesas R-Car USB phy driver
-  *
-- * Copyright (C) 2012 Renesas Solutions Corp.
-+ * Copyright (C) 2012-2013 Renesas Solutions Corp.
-  * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-+ * Copyright (C) 2013 Cogent Embedded, Inc.
-  *
-  * This program is free software; you can redistribute it and/or modify
-  * it under the terms of the GNU General Public License version 2 as
-@@ -15,6 +16,7 @@
- #include <linux/platform_device.h>
- #include <linux/spinlock.h>
- #include <linux/module.h>
-+#include <linux/platform_data/usb-rcar-phy.h>
- 
- /* REGS block */
- #define USBPCTRL0	0x00
-@@ -24,6 +26,25 @@
- #define USBOH0		0x1C
- #define USBCTL0		0x58
- 
-+/* USBPCTRL0 */
-+#define OVC2		(1 << 10) /* Switches the OVC input pin for port 2: */
-+				/* 1: USB_OVC2, 0: OVC2			*/
-+#define OVC1_VBUS1	(1 << 9) /* Switches the OVC input pin for port 1: */
-+				/* 1: USB_OVC1, 0: OVC1/VBUS1		*/
-+				/* Function mode: set to 0		*/
-+#define OVC0		(1 << 8) /* Switches the OVC input pin for port 0: */
-+				/* 1: USB_OVC0 pin, 0: OVC0		*/
-+#define OVC2_ACT 	(1 << 6) /* Host mode: OVC2 polarity:		*/
-+				/* 1: active-high, 0: active-low	*/
-+#define PENC		(1 << 4) /* Function mode: output level of PENC1 pin: */
-+				/* 1: high, 0: low			*/
-+#define OVC0_ACT 	(1 << 3) /* Host mode: OVC0 polarity:		*/
-+				/* 1: active-high, 0: active-low	*/
-+#define OVC1_ACT	(1 << 1) /* Host mode: OVC1 polarity:		*/
-+				/* 1: active-high, 0: active-low	*/
-+				/* Function mode: be sure to set to 1	*/
-+#define PORT1		(1 << 0) /* Selects port 1 mode:		*/
-+				/* 1: function, 0: host			*/
- /* USBPCTRL1 */
- #define PHY_RST		(1 << 2)
- #define PLL_ENB		(1 << 1)
-@@ -55,7 +76,9 @@ static int rcar_usb_phy_init(struct usb_phy *phy)
- {
- 	struct rcar_usb_phy_priv *priv = usb_phy_to_priv(phy);
- 	struct device *dev = phy->dev;
-+	struct rcar_phy_platform_data *pdata = dev->platform_data;
- 	void __iomem *reg0 = priv->reg0;
-+	static const u8 ovcn_act[] = { OVC0_ACT, OVC1_ACT, OVC2_ACT };
- 	int i;
- 	u32 val;
- 	unsigned long flags;
-@@ -89,8 +112,21 @@ static int rcar_usb_phy_init(struct usb_phy *phy)
- 		/* (4) USB-PHY reset clear */
- 		iowrite32(PHY_ENB | PLL_ENB | PHY_RST, (reg0 + USBPCTRL1));
- 
--		/* set platform specific port settings */
--		iowrite32(0x00000000, (reg0 + USBPCTRL0));
-+		/* Board specific port settings */
-+		val = 0;
-+		if (pdata->port1_func)
-+			val |= PORT1;
-+		if (pdata->penc1)
-+			val |= PENC;
-+		for (i = 0; i < 3; i++) {
-+			/* OVCn bits follow each other in the right order */
-+			if (pdata->ovc_pin[i].select_3_3v)
-+				val |= OVC0 << i;
-+			/* OVCn_ACT bits are spaced by irregular intervals */
-+			if (pdata->ovc_pin[i].active_high)
-+				val |= ovcn_act[i];
-+		}
-+		iowrite32(val, (reg0 + USBPCTRL0));
- 
- 		/*
- 		 * Bus alignment settings
-@@ -117,10 +153,8 @@ static void rcar_usb_phy_shutdown(struct usb_phy *phy)
- 
- 	spin_lock_irqsave(&priv->lock, flags);
- 
--	if (priv->counter-- == 1) { /* last user */
--		iowrite32(0x00000000, (reg0 + USBPCTRL0));
-+	if (priv->counter-- == 1)	/* last user */
- 		iowrite32(0x00000000, (reg0 + USBPCTRL1));
--	}
- 
- 	spin_unlock_irqrestore(&priv->lock, flags);
- }
-@@ -133,6 +167,11 @@ static int rcar_usb_phy_probe(struct platform_device *pdev)
- 	void __iomem *reg0;
- 	int ret;
- 
-+	if (!pdev->dev.platform_data) {
-+		dev_err(dev, "No platform data\n");
-+		return -EINVAL;
-+	}
-+
- 	res0 = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- 	if (!res0) {
- 		dev_err(dev, "Not enough platform resources\n");
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0045-ARM-shmobile-marzen-Enable-CONFIG_VFP-in-defconfig.patch b/patches.renesas/0045-ARM-shmobile-marzen-Enable-CONFIG_VFP-in-defconfig.patch
deleted file mode 100644
index cbb609548cd11..0000000000000
--- a/patches.renesas/0045-ARM-shmobile-marzen-Enable-CONFIG_VFP-in-defconfig.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From c8b11537d271467b715f7537f3b0cd38f2b2684c Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Thu, 10 Oct 2013 15:12:17 +0900
-Subject: ARM: shmobile: marzen: Enable CONFIG_VFP in defconfig
-
-CONFIG_VFP is required to boot into a Debian armhf user-space.
-This change brings the marzen defconfig into line with
-other shmobile defconfigs.
-
-Signed-off-by: Simon Horman <horms@verge.net.au>
-(cherry picked from commit 8f1c35732942035ea9bfff6d6848490b0131d140)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/configs/marzen_defconfig | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/arch/arm/configs/marzen_defconfig b/arch/arm/configs/marzen_defconfig
-index ebaaeada733d..39e2dfebcf50 100644
---- a/arch/arm/configs/marzen_defconfig
-+++ b/arch/arm/configs/marzen_defconfig
-@@ -30,6 +30,7 @@ CONFIG_HIGHMEM=y
- CONFIG_ZBOOT_ROM_TEXT=0x0
- CONFIG_ZBOOT_ROM_BSS=0x0
- CONFIG_ARM_APPENDED_DTB=y
-+CONFIG_VFP=y
- CONFIG_KEXEC=y
- # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
- CONFIG_PM_RUNTIME=y
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0045-phy-rcar-usb-add-R8A7778-support.patch b/patches.renesas/0045-phy-rcar-usb-add-R8A7778-support.patch
deleted file mode 100644
index 651045d384621..0000000000000
--- a/patches.renesas/0045-phy-rcar-usb-add-R8A7778-support.patch
+++ /dev/null
@@ -1,185 +0,0 @@
-From 08b540c8b1f152555e58d39ba03a9b820553bac1 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Sun, 9 Jun 2013 00:34:36 +0400
-Subject: phy-rcar-usb: add R8A7778 support
-
-The driver currently only supports R8A7779 SoC. Compared to it, R8A7778 USB-PHY
-has extra register range containing two high-speed signal quality characteristic
-control registers which should be set up  during USB-PHY  startup depending on
-whether a ferrite bead is in use or not.  So, we now handle an optional second
-memory range in the driver's probe method, add the 'ferrite_bead' field to the
-driver's platform data, and add an extra (optional) step to the USB-PHY startup
-routine which sets up the extended registers.
-
-Also mark in the driver's Kconfig section  that R8A7778 is now supported and
-generally clarify that section, uppercasing the word "phy" and also changing
-the module name that got lost in the big driver rename, while at it...
-
-The patch has been tested on the Marzen and BOCK-W boards.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Acked-by: Felipe Balbi <balbi@ti.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 54407f190c8d542572a9547ba5460d811810b6e4)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/phy/Kconfig                    | 10 ++++----
- drivers/usb/phy/phy-rcar-usb.c             | 37 +++++++++++++++++++++++++-----
- include/linux/platform_data/usb-rcar-phy.h |  4 +++-
- 3 files changed, 39 insertions(+), 12 deletions(-)
-
-diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig
-index 2311b1e4..c75cba7a 100644
---- a/drivers/usb/phy/Kconfig
-+++ b/drivers/usb/phy/Kconfig
-@@ -186,15 +186,15 @@ config USB_MXS_PHY
- 	  MXS Phy is used by some of the i.MX SoCs, for example imx23/28/6x.
- 
- config USB_RCAR_PHY
--	tristate "Renesas R-Car USB phy support"
-+	tristate "Renesas R-Car USB PHY support"
- 	depends on USB || USB_GADGET
- 	help
--	  Say Y here to add support for the Renesas R-Car USB phy driver.
--	  This chip is typically used as USB phy for USB host, gadget.
--	  This driver supports: R8A7779
-+	  Say Y here to add support for the Renesas R-Car USB common PHY driver.
-+	  This chip is typically used as USB PHY for USB host, gadget.
-+	  This driver supports R8A7778 and R8A7779.
- 
- 	  To compile this driver as a module, choose M here: the
--	  module will be called rcar-phy.
-+	  module will be called phy-rcar-usb.
- 
- config USB_ULPI
- 	bool "Generic ULPI Transceiver Driver"
-diff --git a/drivers/usb/phy/phy-rcar-usb.c b/drivers/usb/phy/phy-rcar-usb.c
-index 823b2bb8..ae909408 100644
---- a/drivers/usb/phy/phy-rcar-usb.c
-+++ b/drivers/usb/phy/phy-rcar-usb.c
-@@ -26,15 +26,21 @@
- #define USBOH0		0x1C
- #define USBCTL0		0x58
- 
-+/* High-speed signal quality characteristic control registers (R8A7778 only) */
-+#define HSQCTL1		0x24
-+#define HSQCTL2		0x28
-+
- /* USBPCTRL0 */
--#define OVC2		(1 << 10) /* Switches the OVC input pin for port 2: */
-+#define OVC2		(1 << 10) /* (R8A7779 only)			*/
-+				/* Switches the OVC input pin for port 2: */
- 				/* 1: USB_OVC2, 0: OVC2			*/
- #define OVC1_VBUS1	(1 << 9) /* Switches the OVC input pin for port 1: */
- 				/* 1: USB_OVC1, 0: OVC1/VBUS1		*/
- 				/* Function mode: set to 0		*/
- #define OVC0		(1 << 8) /* Switches the OVC input pin for port 0: */
- 				/* 1: USB_OVC0 pin, 0: OVC0		*/
--#define OVC2_ACT 	(1 << 6) /* Host mode: OVC2 polarity:		*/
-+#define OVC2_ACT 	(1 << 6) /* (R8A7779 only)			*/
-+				/* Host mode: OVC2 polarity:		*/
- 				/* 1: active-high, 0: active-low	*/
- #define PENC		(1 << 4) /* Function mode: output level of PENC1 pin: */
- 				/* 1: high, 0: low			*/
-@@ -59,6 +65,7 @@ struct rcar_usb_phy_priv {
- 	spinlock_t lock;
- 
- 	void __iomem *reg0;
-+	void __iomem *reg1;
- 	int counter;
- };
- 
-@@ -78,6 +85,7 @@ static int rcar_usb_phy_init(struct usb_phy *phy)
- 	struct device *dev = phy->dev;
- 	struct rcar_phy_platform_data *pdata = dev->platform_data;
- 	void __iomem *reg0 = priv->reg0;
-+	void __iomem *reg1 = priv->reg1;
- 	static const u8 ovcn_act[] = { OVC0_ACT, OVC1_ACT, OVC2_ACT };
- 	int i;
- 	u32 val;
-@@ -96,7 +104,16 @@ static int rcar_usb_phy_init(struct usb_phy *phy)
- 		/* (2) start USB-PHY internal PLL */
- 		iowrite32(PHY_ENB | PLL_ENB, (reg0 + USBPCTRL1));
- 
--		/* (3) USB module status check */
-+		/* (3) set USB-PHY in accord with the conditions of usage */
-+		if (reg1) {
-+			u32 hsqctl1 = pdata->ferrite_bead ? 0x41 : 0;
-+			u32 hsqctl2 = pdata->ferrite_bead ? 0x0d : 7;
-+
-+			iowrite32(hsqctl1, reg1 + HSQCTL1);
-+			iowrite32(hsqctl2, reg1 + HSQCTL2);
-+		}
-+
-+		/* (4) USB module status check */
- 		for (i = 0; i < 1024; i++) {
- 			udelay(10);
- 			val = ioread32(reg0 + USBST);
-@@ -109,7 +126,7 @@ static int rcar_usb_phy_init(struct usb_phy *phy)
- 			goto phy_init_end;
- 		}
- 
--		/* (4) USB-PHY reset clear */
-+		/* (5) USB-PHY reset clear */
- 		iowrite32(PHY_ENB | PLL_ENB | PHY_RST, (reg0 + USBPCTRL1));
- 
- 		/* Board specific port settings */
-@@ -162,9 +179,9 @@ static void rcar_usb_phy_shutdown(struct usb_phy *phy)
- static int rcar_usb_phy_probe(struct platform_device *pdev)
- {
- 	struct rcar_usb_phy_priv *priv;
--	struct resource *res0;
-+	struct resource *res0, *res1;
- 	struct device *dev = &pdev->dev;
--	void __iomem *reg0;
-+	void __iomem *reg0, *reg1 = NULL;
- 	int ret;
- 
- 	if (!pdev->dev.platform_data) {
-@@ -182,6 +199,13 @@ static int rcar_usb_phy_probe(struct platform_device *pdev)
- 	if (IS_ERR(reg0))
- 		return PTR_ERR(reg0);
- 
-+	res1 = platform_get_resource(pdev, IORESOURCE_MEM, 1);
-+	if (res1) {
-+		reg1 = devm_ioremap_resource(dev, res1);
-+		if (IS_ERR(reg1))
-+			return PTR_ERR(reg1);
-+	}
-+
- 	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
- 	if (!priv) {
- 		dev_err(dev, "priv data allocation error\n");
-@@ -189,6 +213,7 @@ static int rcar_usb_phy_probe(struct platform_device *pdev)
- 	}
- 
- 	priv->reg0		= reg0;
-+	priv->reg1		= reg1;
- 	priv->counter		= 0;
- 	priv->phy.dev		= dev;
- 	priv->phy.label		= dev_name(dev);
-diff --git a/include/linux/platform_data/usb-rcar-phy.h b/include/linux/platform_data/usb-rcar-phy.h
-index c49f35ab..8ec6964a 100644
---- a/include/linux/platform_data/usb-rcar-phy.h
-+++ b/include/linux/platform_data/usb-rcar-phy.h
-@@ -13,6 +13,8 @@
- #include <linux/types.h>
- 
- struct rcar_phy_platform_data {
-+	bool ferrite_bead:1;	/* (R8A7778 only)			*/
-+
- 	bool port1_func:1;	/* true: port 1 used by function, false: host */
- 	unsigned penc1:1;	/* Output of the PENC1 pin in function mode */
- 	struct {		/* Overcurrent pin control for ports 0..2 */
-@@ -20,7 +22,7 @@ struct rcar_phy_platform_data {
- 				/* Set to false on port 1 in function mode */
- 		bool active_high:1; /* true: active  high, false: active low */
- 				/* Set to true  on port 1 in function mode */
--	} ovc_pin[3];
-+	} ovc_pin[3];		/* (R8A7778 only has 2 ports)		*/
- };
- 
- #endif /* __USB_RCAR_PHY_H */
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0045-rcar-hpbdma-remove-shdma_free_irq-calls.patch b/patches.renesas/0045-rcar-hpbdma-remove-shdma_free_irq-calls.patch
deleted file mode 100644
index b9b47a1fa5e2e..0000000000000
--- a/patches.renesas/0045-rcar-hpbdma-remove-shdma_free_irq-calls.patch
+++ /dev/null
@@ -1,49 +0,0 @@
-From 50a504ad989147a7309199d79eda021241858dce Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Thu, 26 Sep 2013 02:28:37 +0400
-Subject: rcar-hpbdma: remove shdma_free_irq() calls
-
-Commit c1c63a14f4f2419d093acd7164eccdff315baa86 (DMA: shdma: switch to managed
-resource allocation) got rid of shdma_free_irq() but  unfortunately got merged
-later than commit c4f6c41ba790bbbfcebb4c47a709ac8ff1fe1af9 (dma: add driver for
-R-Car HPB-DMAC), so that the HPB-DMAC driver retained the calls and got broken:
-
-drivers/dma/sh/rcar-hpbdma.c: In function `hpb_dmae_alloc_chan_resources':
-drivers/dma/sh/rcar-hpbdma.c:435: error: implicit declaration of function
-`shdma_free_irq'
-
-Fix this compilation error by removing the remaining shdma_free_irq() calls.
-
-Reported-by: Simon Horman <horms@verge.net.au>
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Tested-by: Simon Horman <horms+renesas@verge.net.au>
-Signed-off-by: Vinod Koul <vinod.koul@intel.com>
-(cherry picked from commit cdeb5c033f0389c44e5b36cafd623bdf44bbe25c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/dma/sh/rcar-hpbdma.c | 2 --
- 1 file changed, 2 deletions(-)
-
-diff --git a/drivers/dma/sh/rcar-hpbdma.c b/drivers/dma/sh/rcar-hpbdma.c
-index 45a520281ce1..b2f50d8bd755 100644
---- a/drivers/dma/sh/rcar-hpbdma.c
-+++ b/drivers/dma/sh/rcar-hpbdma.c
-@@ -432,7 +432,6 @@ hpb_dmae_alloc_chan_resources(struct hpb_dmae_chan *hpb_chan,
- 		hpb_chan->xfer_mode = XFER_DOUBLE;
- 	} else {
- 		dev_err(hpb_chan->shdma_chan.dev, "DCR setting error");
--		shdma_free_irq(&hpb_chan->shdma_chan);
- 		return -EINVAL;
- 	}
- 
-@@ -614,7 +613,6 @@ static void hpb_dmae_chan_remove(struct hpb_dmae_device *hpbdev)
- 	shdma_for_each_chan(schan, &hpbdev->shdma_dev, i) {
- 		BUG_ON(!schan);
- 
--		shdma_free_irq(schan);
- 		shdma_chan_remove(schan);
- 	}
- 	dma_dev->chancnt = 0;
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0046-ARM-shmobile-bockw-Do-not-enable-CONFIG_DEVTMPFS-def.patch b/patches.renesas/0046-ARM-shmobile-bockw-Do-not-enable-CONFIG_DEVTMPFS-def.patch
deleted file mode 100644
index 0e06fa94e6fec..0000000000000
--- a/patches.renesas/0046-ARM-shmobile-bockw-Do-not-enable-CONFIG_DEVTMPFS-def.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From aacd944580c5a453bee70159754047870733ef02 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Thu, 10 Oct 2013 15:12:17 +0900
-Subject: ARM: shmobile: bockw: Do not enable CONFIG_DEVTMPFS defconfig
-
-This change brings the bockw defconfig into line with
-other shmobile defconfigs.
-
-Signed-off-by: Simon Horman <horms@verge.net.au>
-(cherry picked from commit e14ee5deab24200e4b70fe31a8c806f0acd3d37c)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/configs/bockw_defconfig | 2 --
- 1 file changed, 2 deletions(-)
-
-diff --git a/arch/arm/configs/bockw_defconfig b/arch/arm/configs/bockw_defconfig
-index 8b5866e6292d..01721fafcea1 100644
---- a/arch/arm/configs/bockw_defconfig
-+++ b/arch/arm/configs/bockw_defconfig
-@@ -43,8 +43,6 @@ CONFIG_IP_PNP_DHCP=y
- # CONFIG_INET_DIAG is not set
- # CONFIG_IPV6 is not set
- CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
--CONFIG_DEVTMPFS=y
--CONFIG_DEVTMPFS_MOUNT=y
- # CONFIG_STANDALONE is not set
- # CONFIG_PREVENT_FIRMWARE_BUILD is not set
- # CONFIG_FW_LOADER is not set
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0046-rcar-hpbdma-add-parameter-to-set_slave-method.patch b/patches.renesas/0046-rcar-hpbdma-add-parameter-to-set_slave-method.patch
deleted file mode 100644
index 639ef28909574..0000000000000
--- a/patches.renesas/0046-rcar-hpbdma-add-parameter-to-set_slave-method.patch
+++ /dev/null
@@ -1,70 +0,0 @@
-From b5ac24346687569d8079b947c2b73bb42c521658 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Thu, 26 Sep 2013 02:31:37 +0400
-Subject: rcar-hpbdma: add parameter to set_slave() method
-
-Commit 4981c4dc194efb18f0e9a02f1b43e926f2f0d2bb (DMA: shdma: switch DT mode to
-use configuration data from a match table) added a new parameter to set_slave()
-method but unfortunately got merged later than commit c4f6c41ba790bbbfcebb4c47a
-(dma: add driver for R-Car HPB-DMAC), so that the HPB-DMAC driver retained the
-old prototype which caused this warning:
-
-drivers/dma/sh/rcar-hpbdma.c:485: warning: initialization from incompatible
-pointer type
-
-The newly added parameter  is used to override DMA slave address from 'struct
-hpb_dmae_slave_config', so we have to add the 'slave_addr' field to 'struct
-hpb_dmae_chan', conditionally assign it in set_slave() method, and return in
-slave_addr() method.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Tested-by: Simon Horman <horms+renesas@verge.net.au>
-Signed-off-by: Vinod Koul <vinod.koul@intel.com>
-(cherry picked from commit 08d08bcdee30d3a28426bd60dfbdae44b36250bc)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/dma/sh/rcar-hpbdma.c | 7 +++++--
- 1 file changed, 5 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/dma/sh/rcar-hpbdma.c b/drivers/dma/sh/rcar-hpbdma.c
-index b2f50d8bd755..ebad84591a6e 100644
---- a/drivers/dma/sh/rcar-hpbdma.c
-+++ b/drivers/dma/sh/rcar-hpbdma.c
-@@ -93,6 +93,7 @@ struct hpb_dmae_chan {
- 	void __iomem *base;
- 	const struct hpb_dmae_slave_config *cfg;
- 	char dev_id[16];		/* unique name per DMAC of channel */
-+	dma_addr_t slave_addr;
- };
- 
- struct hpb_dmae_device {
-@@ -445,7 +446,8 @@ hpb_dmae_alloc_chan_resources(struct hpb_dmae_chan *hpb_chan,
- 	return 0;
- }
- 
--static int hpb_dmae_set_slave(struct shdma_chan *schan, int slave_id, bool try)
-+static int hpb_dmae_set_slave(struct shdma_chan *schan, int slave_id,
-+			      dma_addr_t slave_addr, bool try)
- {
- 	struct hpb_dmae_chan *chan = to_chan(schan);
- 	const struct hpb_dmae_slave_config *sc =
-@@ -456,6 +458,7 @@ static int hpb_dmae_set_slave(struct shdma_chan *schan, int slave_id, bool try)
- 	if (try)
- 		return 0;
- 	chan->cfg = sc;
-+	chan->slave_addr = slave_addr ? : sc->addr;
- 	return hpb_dmae_alloc_chan_resources(chan, sc);
- }
- 
-@@ -467,7 +470,7 @@ static dma_addr_t hpb_dmae_slave_addr(struct shdma_chan *schan)
- {
- 	struct hpb_dmae_chan *chan = to_chan(schan);
- 
--	return chan->cfg->addr;
-+	return chan->slave_addr;
- }
- 
- static struct shdma_desc *hpb_dmae_embedded_desc(void *buf, int i)
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0046-usb-phy-don-t-check-resource-with-devm_ioremap_resou.patch b/patches.renesas/0046-usb-phy-don-t-check-resource-with-devm_ioremap_resou.patch
deleted file mode 100644
index e14bf06785125..0000000000000
--- a/patches.renesas/0046-usb-phy-don-t-check-resource-with-devm_ioremap_resou.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From 3551f00a48c6534cea6b59819879b0b0daf4b298 Mon Sep 17 00:00:00 2001
-From: Wolfram Sang <wsa@the-dreams.de>
-Date: Tue, 23 Jul 2013 20:01:52 +0200
-Subject: usb: phy: don't check resource with devm_ioremap_resource
-
-devm_ioremap_resource does sanity checks on the given resource. No need to
-duplicate this in the driver.
-
-Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-Signed-off-by: Felipe Balbi <balbi@ti.com>
-(cherry picked from commit fda7130354271b55eea50a4f58ea8540c9971295)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/phy/phy-rcar-usb.c | 5 -----
- 1 file changed, 5 deletions(-)
-
-diff --git a/drivers/usb/phy/phy-rcar-usb.c b/drivers/usb/phy/phy-rcar-usb.c
-index ae909408..deb7f97f 100644
---- a/drivers/usb/phy/phy-rcar-usb.c
-+++ b/drivers/usb/phy/phy-rcar-usb.c
-@@ -190,11 +190,6 @@ static int rcar_usb_phy_probe(struct platform_device *pdev)
- 	}
- 
- 	res0 = platform_get_resource(pdev, IORESOURCE_MEM, 0);
--	if (!res0) {
--		dev_err(dev, "Not enough platform resources\n");
--		return -EINVAL;
--	}
--
- 	reg0 = devm_ioremap_resource(dev, res0);
- 	if (IS_ERR(reg0))
- 		return PTR_ERR(reg0);
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0047-ARM-shmobile-marzen-Do-not-enable-CONFIG_DEVTMPFS-de.patch b/patches.renesas/0047-ARM-shmobile-marzen-Do-not-enable-CONFIG_DEVTMPFS-de.patch
deleted file mode 100644
index f05301ca32e25..0000000000000
--- a/patches.renesas/0047-ARM-shmobile-marzen-Do-not-enable-CONFIG_DEVTMPFS-de.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From cd7fcf8b5521a06f22a0d980a1ac3cd6dc23c74b Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Thu, 10 Oct 2013 15:12:17 +0900
-Subject: ARM: shmobile: marzen: Do not enable CONFIG_DEVTMPFS defconfig
-
-This change brings the marzen defconfig into line with
-other shmobile defconfigs.
-
-Signed-off-by: Simon Horman <horms@verge.net.au>
-(cherry picked from commit 41307133da4b6f242ecbb45950b9d043c0b21b96)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/configs/marzen_defconfig | 2 --
- 1 file changed, 2 deletions(-)
-
-diff --git a/arch/arm/configs/marzen_defconfig b/arch/arm/configs/marzen_defconfig
-index 39e2dfebcf50..3f0f41f8ba30 100644
---- a/arch/arm/configs/marzen_defconfig
-+++ b/arch/arm/configs/marzen_defconfig
-@@ -42,8 +42,6 @@ CONFIG_IP_PNP_DHCP=y
- # CONFIG_IPV6 is not set
- # CONFIG_WIRELESS is not set
- CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
--CONFIG_DEVTMPFS=y
--CONFIG_DEVTMPFS_MOUNT=y
- # CONFIG_STANDALONE is not set
- # CONFIG_PREVENT_FIRMWARE_BUILD is not set
- # CONFIG_FW_LOADER is not set
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0047-DMA-shdma-cosmetic-don-t-re-calculate-a-pointer.patch b/patches.renesas/0047-DMA-shdma-cosmetic-don-t-re-calculate-a-pointer.patch
deleted file mode 100644
index 187b7832a5354..0000000000000
--- a/patches.renesas/0047-DMA-shdma-cosmetic-don-t-re-calculate-a-pointer.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From 7e3ecce2e20c51cc55c659412802e01b627149cc Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Thu, 6 Jun 2013 17:37:13 +0200
-Subject: DMA: shdma: (cosmetic) don't re-calculate a pointer
-
-Use an existing pointer instead of retrieving it again.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Signed-off-by: Vinod Koul <vinod.koul@intel.com>
-(cherry picked from commit fa74326c44767626a5ae794b29d54103e2259e64)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/dma/sh/shdma.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/dma/sh/shdma.c b/drivers/dma/sh/shdma.c
-index b70709b030d8..a5a1887c34b5 100644
---- a/drivers/dma/sh/shdma.c
-+++ b/drivers/dma/sh/shdma.c
-@@ -729,7 +729,7 @@ static int sh_dmae_probe(struct platform_device *pdev)
- 		goto eshdma;
- 
- 	/* platform data */
--	shdev->pdata = pdev->dev.platform_data;
-+	shdev->pdata = pdata;
- 
- 	if (pdata->chcr_offset)
- 		shdev->chcr_offset = pdata->chcr_offset;
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0047-of-introduce-of_parse_phandle_with_fixed_args.patch b/patches.renesas/0047-of-introduce-of_parse_phandle_with_fixed_args.patch
deleted file mode 100644
index 1a50a6d2621bf..0000000000000
--- a/patches.renesas/0047-of-introduce-of_parse_phandle_with_fixed_args.patch
+++ /dev/null
@@ -1,152 +0,0 @@
-From f144e82df6dccf7109aa821f436669ab9d439f23 Mon Sep 17 00:00:00 2001
-From: Stephen Warren <swarren@nvidia.com>
-Date: Wed, 14 Aug 2013 15:27:10 -0600
-Subject: of: introduce of_parse_phandle_with_fixed_args
-
-This is identical to of_parse_phandle_with_args(), except that the
-number of argument cells is fixed, rather than being parsed out of the
-node referenced by each phandle.
-
-Signed-off-by: Stephen Warren <swarren@nvidia.com>
-Acked-by: Mark Rutland <mark.rutland@arm.com>
-Signed-off-by: Grant Likely <grant.likely@linaro.org>
-(cherry picked from commit 035fd9482274bf43858b00e0ff95179af66df8e8)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/of/base.c  | 66 +++++++++++++++++++++++++++++++++++++++++++++++-------
- include/linux/of.h | 10 +++++++++
- 2 files changed, 68 insertions(+), 8 deletions(-)
-
-diff --git a/drivers/of/base.c b/drivers/of/base.c
-index 1d10b4ec..32dce2e6 100644
---- a/drivers/of/base.c
-+++ b/drivers/of/base.c
-@@ -1138,7 +1138,8 @@ EXPORT_SYMBOL(of_parse_phandle);
-  */
- static int __of_parse_phandle_with_args(const struct device_node *np,
- 					const char *list_name,
--					const char *cells_name, int index,
-+					const char *cells_name,
-+					int cell_count, int index,
- 					struct of_phandle_args *out_args)
- {
- 	const __be32 *list, *list_end;
-@@ -1174,11 +1175,17 @@ static int __of_parse_phandle_with_args(const struct device_node *np,
- 					 np->full_name);
- 				goto err;
- 			}
--			if (of_property_read_u32(node, cells_name, &count)) {
--				pr_err("%s: could not get %s for %s\n",
--					 np->full_name, cells_name,
--					 node->full_name);
--				goto err;
-+
-+			if (cells_name) {
-+				if (of_property_read_u32(node, cells_name,
-+							 &count)) {
-+					pr_err("%s: could not get %s for %s\n",
-+						np->full_name, cells_name,
-+						node->full_name);
-+					goto err;
-+				}
-+			} else {
-+				count = cell_count;
- 			}
- 
- 			/*
-@@ -1244,11 +1251,53 @@ int of_parse_phandle_with_args(const struct device_node *np, const char *list_na
- {
- 	if (index < 0)
- 		return -EINVAL;
--	return __of_parse_phandle_with_args(np, list_name, cells_name, index, out_args);
-+	return __of_parse_phandle_with_args(np, list_name, cells_name, 0,
-+					    index, out_args);
- }
- EXPORT_SYMBOL(of_parse_phandle_with_args);
- 
- /**
-+ * of_parse_phandle_with_fixed_args() - Find a node pointed by phandle in a list
-+ * @np:		pointer to a device tree node containing a list
-+ * @list_name:	property name that contains a list
-+ * @cell_count: number of argument cells following the phandle
-+ * @index:	index of a phandle to parse out
-+ * @out_args:	optional pointer to output arguments structure (will be filled)
-+ *
-+ * This function is useful to parse lists of phandles and their arguments.
-+ * Returns 0 on success and fills out_args, on error returns appropriate
-+ * errno value.
-+ *
-+ * Caller is responsible to call of_node_put() on the returned out_args->node
-+ * pointer.
-+ *
-+ * Example:
-+ *
-+ * phandle1: node1 {
-+ * }
-+ *
-+ * phandle2: node2 {
-+ * }
-+ *
-+ * node3 {
-+ * 	list = <&phandle1 0 2 &phandle2 2 3>;
-+ * }
-+ *
-+ * To get a device_node of the `node2' node you may call this:
-+ * of_parse_phandle_with_fixed_args(node3, "list", 2, 1, &args);
-+ */
-+int of_parse_phandle_with_fixed_args(const struct device_node *np,
-+				const char *list_name, int cell_count,
-+				int index, struct of_phandle_args *out_args)
-+{
-+	if (index < 0)
-+		return -EINVAL;
-+	return __of_parse_phandle_with_args(np, list_name, NULL, cell_count,
-+					   index, out_args);
-+}
-+EXPORT_SYMBOL(of_parse_phandle_with_fixed_args);
-+
-+/**
-  * of_count_phandle_with_args() - Find the number of phandles references in a property
-  * @np:		pointer to a device tree node containing a list
-  * @list_name:	property name that contains a list
-@@ -1266,7 +1315,8 @@ EXPORT_SYMBOL(of_parse_phandle_with_args);
- int of_count_phandle_with_args(const struct device_node *np, const char *list_name,
- 				const char *cells_name)
- {
--	return __of_parse_phandle_with_args(np, list_name, cells_name, -1, NULL);
-+	return __of_parse_phandle_with_args(np, list_name, cells_name, 0, -1,
-+					    NULL);
- }
- EXPORT_SYMBOL(of_count_phandle_with_args);
- 
-diff --git a/include/linux/of.h b/include/linux/of.h
-index 1fd08ca2..0c457f58 100644
---- a/include/linux/of.h
-+++ b/include/linux/of.h
-@@ -280,6 +280,9 @@ extern struct device_node *of_parse_phandle(const struct device_node *np,
- extern int of_parse_phandle_with_args(const struct device_node *np,
- 	const char *list_name, const char *cells_name, int index,
- 	struct of_phandle_args *out_args);
-+extern int of_parse_phandle_with_fixed_args(const struct device_node *np,
-+	const char *list_name, int cells_count, int index,
-+	struct of_phandle_args *out_args);
- extern int of_count_phandle_with_args(const struct device_node *np,
- 	const char *list_name, const char *cells_name);
- 
-@@ -488,6 +491,13 @@ static inline int of_parse_phandle_with_args(struct device_node *np,
- 	return -ENOSYS;
- }
- 
-+static inline int of_parse_phandle_with_fixed_args(const struct device_node *np,
-+	const char *list_name, int cells_count, int index,
-+	struct of_phandle_args *out_args)
-+{
-+	return -ENOSYS;
-+}
-+
- static inline int of_count_phandle_with_args(struct device_node *np,
- 					     const char *list_name,
- 					     const char *cells_name)
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0048-ARM-shmobile-bockw-Enable-CONFIG_PACKET-in-defconfig.patch b/patches.renesas/0048-ARM-shmobile-bockw-Enable-CONFIG_PACKET-in-defconfig.patch
deleted file mode 100644
index e57d6ebf4dbed..0000000000000
--- a/patches.renesas/0048-ARM-shmobile-bockw-Enable-CONFIG_PACKET-in-defconfig.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From fa48a7f83e1e49aa8ceda399d6b107f0a506c5f9 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Thu, 10 Oct 2013 15:12:17 +0900
-Subject: ARM: shmobile: bockw: Enable CONFIG_PACKET in defconfig
-
-CONFIG_PACKET is required for the ISC dhcpd daemon function.
-This change brings the bockw defconfig into line with
-other shmobile defconfigs.
-
-Signed-off-by: Simon Horman <horms@verge.net.au>
-(cherry picked from commit 66d0a50ea15a5a05372e9f8bb0fa7bdc873e4179)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/configs/bockw_defconfig | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/arch/arm/configs/bockw_defconfig b/arch/arm/configs/bockw_defconfig
-index 01721fafcea1..191decba86c4 100644
---- a/arch/arm/configs/bockw_defconfig
-+++ b/arch/arm/configs/bockw_defconfig
-@@ -32,6 +32,7 @@ CONFIG_VFP=y
- # CONFIG_SUSPEND is not set
- CONFIG_PM_RUNTIME=y
- CONFIG_NET=y
-+CONFIG_PACKET=y
- CONFIG_UNIX=y
- CONFIG_INET=y
- CONFIG_IP_PNP=y
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0048-DMA-shdma-add-DT-support.patch b/patches.renesas/0048-DMA-shdma-add-DT-support.patch
deleted file mode 100644
index d916a017e01b9..0000000000000
--- a/patches.renesas/0048-DMA-shdma-add-DT-support.patch
+++ /dev/null
@@ -1,348 +0,0 @@
-From 3eb36dc9620cca5f185ec2e9af8476526b19c249 Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Tue, 18 Jun 2013 18:16:57 +0200
-Subject: DMA: shdma: add DT support
-
-This patch adds Device Tree support to the shdma driver. No special DT
-properties are used, only standard DMA DT bindings are implemented. Since
-shdma controllers reside on SoCs, their configuration is SoC-specific and
-shall be passed to the driver from the SoC platform data, using the
-auxdata procedure.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Acked-by: Arnd Bergmann <arnd@arndb.de>
-Signed-off-by: Vinod Koul <vinod.koul@intel.com>
-(cherry picked from commit 67eacc1583909d0588c8d5d80c16298c899a6382)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- Documentation/devicetree/bindings/dma/shdma.txt | 75 ++++++++++++++++++++++
- drivers/dma/sh/Makefile                         |  2 +-
- drivers/dma/sh/shdma-base.c                     | 26 ++++++--
- drivers/dma/sh/shdma-of.c                       | 82 +++++++++++++++++++++++++
- drivers/dma/sh/shdma.c                          | 31 ++++++++--
- include/linux/shdma-base.h                      |  2 +
- 6 files changed, 205 insertions(+), 13 deletions(-)
- create mode 100644 Documentation/devicetree/bindings/dma/shdma.txt
- create mode 100644 drivers/dma/sh/shdma-of.c
-
-diff --git a/Documentation/devicetree/bindings/dma/shdma.txt b/Documentation/devicetree/bindings/dma/shdma.txt
-new file mode 100644
-index 000000000000..c15994aa1939
---- /dev/null
-+++ b/Documentation/devicetree/bindings/dma/shdma.txt
-@@ -0,0 +1,75 @@
-+* SHDMA Device Tree bindings
-+
-+Sh-/r-mobile and r-car systems often have multiple identical DMA controller
-+instances, capable of serving any of a common set of DMA slave devices, using
-+the same configuration. To describe this topology we require all compatible
-+SHDMA DT nodes to be placed under a DMA multiplexer node. All such compatible
-+DMAC instances have the same number of channels and use the same DMA
-+descriptors. Therefore respective DMA DT bindings can also all be placed in the
-+multiplexer node. Even if there is only one such DMAC instance on a system, it
-+still has to be placed under such a multiplexer node.
-+
-+* DMA multiplexer
-+
-+Required properties:
-+- compatible:	should be "renesas,shdma-mux"
-+- #dma-cells:	should be <1>, see "dmas" property below
-+
-+Optional properties (currently unused):
-+- dma-channels:	number of DMA channels
-+- dma-requests:	number of DMA request signals
-+
-+* DMA controller
-+
-+Required properties:
-+- compatible:	should be "renesas,shdma"
-+
-+Example:
-+	dmac: dma-mux0 {
-+		compatible = "renesas,shdma-mux";
-+		#dma-cells = <1>;
-+		dma-channels = <6>;
-+		dma-requests = <256>;
-+		reg = <0 0>;	/* Needed for AUXDATA */
-+		#address-cells = <1>;
-+		#size-cells = <1>;
-+		ranges;
-+
-+		dma0: shdma@fe008020 {
-+			compatible = "renesas,shdma";
-+			reg = <0xfe008020 0x270>,
-+				<0xfe009000 0xc>;
-+			interrupt-parent = <&gic>;
-+			interrupts = <0 34 4
-+					0 28 4
-+					0 29 4
-+					0 30 4
-+					0 31 4
-+					0 32 4
-+					0 33 4>;
-+			interrupt-names = "error",
-+					"ch0", "ch1", "ch2", "ch3",
-+					"ch4", "ch5";
-+		};
-+
-+		dma1: shdma@fe018020 {
-+			...
-+		};
-+
-+		dma2: shdma@fe028020 {
-+			...
-+		};
-+	};
-+
-+* DMA client
-+
-+Required properties:
-+- dmas:		a list of <[DMA multiplexer phandle] [MID/RID value]> pairs,
-+		where MID/RID values are fixed handles, specified in the SoC
-+		manual
-+- dma-names:	a list of DMA channel names, one per "dmas" entry
-+
-+Example:
-+	dmas = <&dmac 0xd1
-+		&dmac 0xd2>;
-+	dma-names = "tx", "rx";
-diff --git a/drivers/dma/sh/Makefile b/drivers/dma/sh/Makefile
-index 3524b3056035..ccf17cb5af10 100644
---- a/drivers/dma/sh/Makefile
-+++ b/drivers/dma/sh/Makefile
-@@ -1,4 +1,4 @@
--obj-$(CONFIG_SH_DMAE_BASE) += shdma-base.o
-+obj-$(CONFIG_SH_DMAE_BASE) += shdma-base.o shdma-of.o
- obj-$(CONFIG_SH_DMAE) += shdma.o
- obj-$(CONFIG_SUDMAC) += sudmac.o
- obj-$(CONFIG_RCAR_HPB_DMAE) += rcar-hpbdma.o
-diff --git a/drivers/dma/sh/shdma-base.c b/drivers/dma/sh/shdma-base.c
-index 4acb85a10250..28ca36121631 100644
---- a/drivers/dma/sh/shdma-base.c
-+++ b/drivers/dma/sh/shdma-base.c
-@@ -175,7 +175,18 @@ static int shdma_setup_slave(struct shdma_chan *schan, int slave_id)
- {
- 	struct shdma_dev *sdev = to_shdma_dev(schan->dma_chan.device);
- 	const struct shdma_ops *ops = sdev->ops;
--	int ret;
-+	int ret, match;
-+
-+	if (schan->dev->of_node) {
-+		match = schan->hw_req;
-+		ret = ops->set_slave(schan, match, true);
-+		if (ret < 0)
-+			return ret;
-+
-+		slave_id = schan->slave_id;
-+	} else {
-+		match = slave_id;
-+	}
- 
- 	if (slave_id < 0 || slave_id >= slave_num)
- 		return -EINVAL;
-@@ -183,7 +194,7 @@ static int shdma_setup_slave(struct shdma_chan *schan, int slave_id)
- 	if (test_and_set_bit(slave_id, shdma_slave_used))
- 		return -EBUSY;
- 
--	ret = ops->set_slave(schan, slave_id, false);
-+	ret = ops->set_slave(schan, match, false);
- 	if (ret < 0) {
- 		clear_bit(slave_id, shdma_slave_used);
- 		return ret;
-@@ -206,23 +217,26 @@ static int shdma_setup_slave(struct shdma_chan *schan, int slave_id)
-  * services would have to provide their own filters, which first would check
-  * the device driver, similar to how other DMAC drivers, e.g., sa11x0-dma.c, do
-  * this, and only then, in case of a match, call this common filter.
-+ * NOTE 2: This filter function is also used in the DT case by shdma_of_xlate().
-+ * In that case the MID-RID value is used for slave channel filtering and is
-+ * passed to this function in the "arg" parameter.
-  */
- bool shdma_chan_filter(struct dma_chan *chan, void *arg)
- {
- 	struct shdma_chan *schan = to_shdma_chan(chan);
- 	struct shdma_dev *sdev = to_shdma_dev(schan->dma_chan.device);
- 	const struct shdma_ops *ops = sdev->ops;
--	int slave_id = (int)arg;
-+	int match = (int)arg;
- 	int ret;
- 
--	if (slave_id < 0)
-+	if (match < 0)
- 		/* No slave requested - arbitrary channel */
- 		return true;
- 
--	if (slave_id >= slave_num)
-+	if (!schan->dev->of_node && match >= slave_num)
- 		return false;
- 
--	ret = ops->set_slave(schan, slave_id, true);
-+	ret = ops->set_slave(schan, match, true);
- 	if (ret < 0)
- 		return false;
- 
-diff --git a/drivers/dma/sh/shdma-of.c b/drivers/dma/sh/shdma-of.c
-new file mode 100644
-index 000000000000..11bcb05cd79c
---- /dev/null
-+++ b/drivers/dma/sh/shdma-of.c
-@@ -0,0 +1,82 @@
-+/*
-+ * SHDMA Device Tree glue
-+ *
-+ * Copyright (C) 2013 Renesas Electronics Inc.
-+ * Author: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-+ *
-+ * This is free software; you can redistribute it and/or modify
-+ * it under the terms of version 2 of the GNU General Public License as
-+ * published by the Free Software Foundation.
-+ */
-+
-+#include <linux/dmaengine.h>
-+#include <linux/module.h>
-+#include <linux/of.h>
-+#include <linux/of_dma.h>
-+#include <linux/of_platform.h>
-+#include <linux/platform_device.h>
-+#include <linux/shdma-base.h>
-+
-+#define to_shdma_chan(c) container_of(c, struct shdma_chan, dma_chan)
-+
-+static struct dma_chan *shdma_of_xlate(struct of_phandle_args *dma_spec,
-+				       struct of_dma *ofdma)
-+{
-+	u32 id = dma_spec->args[0];
-+	dma_cap_mask_t mask;
-+	struct dma_chan *chan;
-+
-+	if (dma_spec->args_count != 1)
-+		return NULL;
-+
-+	dma_cap_zero(mask);
-+	/* Only slave DMA channels can be allocated via DT */
-+	dma_cap_set(DMA_SLAVE, mask);
-+
-+	chan = dma_request_channel(mask, shdma_chan_filter, (void *)id);
-+	if (chan)
-+		to_shdma_chan(chan)->hw_req = id;
-+
-+	return chan;
-+}
-+
-+static int shdma_of_probe(struct platform_device *pdev)
-+{
-+	const struct of_dev_auxdata *lookup = pdev->dev.platform_data;
-+	int ret;
-+
-+	if (!lookup)
-+		return -EINVAL;
-+
-+	ret = of_dma_controller_register(pdev->dev.of_node,
-+					 shdma_of_xlate, pdev);
-+	if (ret < 0)
-+		return ret;
-+
-+	ret = of_platform_populate(pdev->dev.of_node, NULL, lookup, &pdev->dev);
-+	if (ret < 0)
-+		of_dma_controller_free(pdev->dev.of_node);
-+
-+	return ret;
-+}
-+
-+static const struct of_device_id shdma_of_match[] = {
-+	{ .compatible = "renesas,shdma-mux", },
-+	{ }
-+};
-+MODULE_DEVICE_TABLE(of, sh_dmae_of_match);
-+
-+static struct platform_driver shdma_of = {
-+	.driver		= {
-+		.owner	= THIS_MODULE,
-+		.name	= "shdma-of",
-+		.of_match_table = shdma_of_match,
-+	},
-+	.probe		= shdma_of_probe,
-+};
-+
-+module_platform_driver(shdma_of);
-+
-+MODULE_LICENSE("GPL v2");
-+MODULE_DESCRIPTION("SH-DMA driver DT glue");
-+MODULE_AUTHOR("Guennadi Liakhovetski <g.liakhovetski@gmx.de>");
-diff --git a/drivers/dma/sh/shdma.c b/drivers/dma/sh/shdma.c
-index a5a1887c34b5..b67f45f5c271 100644
---- a/drivers/dma/sh/shdma.c
-+++ b/drivers/dma/sh/shdma.c
-@@ -301,20 +301,32 @@ static void sh_dmae_setup_xfer(struct shdma_chan *schan,
- 	}
- }
- 
-+/*
-+ * Find a slave channel configuration from the contoller list by either a slave
-+ * ID in the non-DT case, or by a MID/RID value in the DT case
-+ */
- static const struct sh_dmae_slave_config *dmae_find_slave(
--	struct sh_dmae_chan *sh_chan, int slave_id)
-+	struct sh_dmae_chan *sh_chan, int match)
- {
- 	struct sh_dmae_device *shdev = to_sh_dev(sh_chan);
- 	struct sh_dmae_pdata *pdata = shdev->pdata;
- 	const struct sh_dmae_slave_config *cfg;
- 	int i;
- 
--	if (slave_id >= SH_DMA_SLAVE_NUMBER)
--		return NULL;
-+	if (!sh_chan->shdma_chan.dev->of_node) {
-+		if (match >= SH_DMA_SLAVE_NUMBER)
-+			return NULL;
- 
--	for (i = 0, cfg = pdata->slave; i < pdata->slave_num; i++, cfg++)
--		if (cfg->slave_id == slave_id)
--			return cfg;
-+		for (i = 0, cfg = pdata->slave; i < pdata->slave_num; i++, cfg++)
-+			if (cfg->slave_id == match)
-+				return cfg;
-+	} else {
-+		for (i = 0, cfg = pdata->slave; i < pdata->slave_num; i++, cfg++)
-+			if (cfg->mid_rid == match) {
-+				sh_chan->shdma_chan.slave_id = cfg->slave_id;
-+				return cfg;
-+			}
-+	}
- 
- 	return NULL;
- }
-@@ -920,11 +932,18 @@ static int sh_dmae_remove(struct platform_device *pdev)
- 	return 0;
- }
- 
-+static const struct of_device_id sh_dmae_of_match[] = {
-+	{ .compatible = "renesas,shdma", },
-+	{ }
-+};
-+MODULE_DEVICE_TABLE(of, sh_dmae_of_match);
-+
- static struct platform_driver sh_dmae_driver = {
- 	.driver 	= {
- 		.owner	= THIS_MODULE,
- 		.pm	= &sh_dmae_pm,
- 		.name	= SH_DMAE_DRV_NAME,
-+		.of_match_table = sh_dmae_of_match,
- 	},
- 	.remove		= sh_dmae_remove,
- 	.shutdown	= sh_dmae_shutdown,
-diff --git a/include/linux/shdma-base.h b/include/linux/shdma-base.h
-index e212720567b3..5b1c9848124c 100644
---- a/include/linux/shdma-base.h
-+++ b/include/linux/shdma-base.h
-@@ -68,6 +68,8 @@ struct shdma_chan {
- 	int id;				/* Raw id of this channel */
- 	int irq;			/* Channel IRQ */
- 	int slave_id;			/* Client ID for slave DMA */
-+	int hw_req;			/* DMA request line for slave DMA - same
-+					 * as MID/RID, used with DT */
- 	enum shdma_pm_state pm_state;
- };
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0048-gpio-implement-gpio-ranges-binding-document-fix.patch b/patches.renesas/0048-gpio-implement-gpio-ranges-binding-document-fix.patch
deleted file mode 100644
index b5f7245c7f107..0000000000000
--- a/patches.renesas/0048-gpio-implement-gpio-ranges-binding-document-fix.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From f1df6f59c8d82463c524d410ef5b878ae3aeb278 Mon Sep 17 00:00:00 2001
-From: Stephen Warren <swarren@nvidia.com>
-Date: Wed, 14 Aug 2013 15:27:12 -0600
-Subject: gpio: implement gpio-ranges binding document fix
-
-Use the new of_parse_phandle_with_fixed_args() to implement the
-corrected gpio-ranges DT property definition.
-
-Signed-off-by: Stephen Warren <swarren@nvidia.com>
-Acked-by: Mark Rutland <mark.rutland@arm.com>
-Acked-by: Linus Walleij <linus.walleij@linaro.org>
-Signed-off-by: Grant Likely <grant.likely@linaro.org>
-(cherry picked from commit d9fe0039c4247383c2783923a3860227813b4d82)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpio/gpiolib-of.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpio/gpiolib-of.c b/drivers/gpio/gpiolib-of.c
-index 665f9530..48cda3c9 100644
---- a/drivers/gpio/gpiolib-of.c
-+++ b/drivers/gpio/gpiolib-of.c
-@@ -194,8 +194,8 @@ static void of_gpiochip_add_pin_range(struct gpio_chip *chip)
- 		return;
- 
- 	for (;; index++) {
--		ret = of_parse_phandle_with_args(np, "gpio-ranges",
--				"#gpio-range-cells", index, &pinspec);
-+		ret = of_parse_phandle_with_fixed_args(np, "gpio-ranges", 3,
-+				index, &pinspec);
- 		if (ret)
- 			break;
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0049-ARM-shmobile-marzen-Enable-CONFIG_PACKET-in-defconfi.patch b/patches.renesas/0049-ARM-shmobile-marzen-Enable-CONFIG_PACKET-in-defconfi.patch
deleted file mode 100644
index 3435796f1fb93..0000000000000
--- a/patches.renesas/0049-ARM-shmobile-marzen-Enable-CONFIG_PACKET-in-defconfi.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From 0da98a41ea04b1786dfc06622733471d47c68110 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Thu, 10 Oct 2013 15:12:17 +0900
-Subject: ARM: shmobile: marzen: Enable CONFIG_PACKET in defconfig
-
-CONFIG_PACKET is required for the ISC dhcpd daemon function.
-This change brings the marzen defconfig into line with
-other shmobile defconfigs.
-
-Signed-off-by: Simon Horman <horms@verge.net.au>
-(cherry picked from commit d4df4b2716336d24e243013c5e64b867c18ccc29)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/configs/marzen_defconfig | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/arch/arm/configs/marzen_defconfig b/arch/arm/configs/marzen_defconfig
-index 3f0f41f8ba30..a423badba241 100644
---- a/arch/arm/configs/marzen_defconfig
-+++ b/arch/arm/configs/marzen_defconfig
-@@ -35,6 +35,7 @@ CONFIG_KEXEC=y
- # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
- CONFIG_PM_RUNTIME=y
- CONFIG_NET=y
-+CONFIG_PACKET=y
- CONFIG_UNIX=y
- CONFIG_INET=y
- CONFIG_IP_PNP=y
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0049-dma-use-dev_get_platdata.patch b/patches.renesas/0049-dma-use-dev_get_platdata.patch
deleted file mode 100644
index 0f3ca58c6a1dc..0000000000000
--- a/patches.renesas/0049-dma-use-dev_get_platdata.patch
+++ /dev/null
@@ -1,56 +0,0 @@
-From 6343032750049bb1fab31d5f41fff22912984ed6 Mon Sep 17 00:00:00 2001
-From: Jingoo Han <jg1.han@samsung.com>
-Date: Tue, 30 Jul 2013 17:09:11 +0900
-Subject: dma: use dev_get_platdata()
-
-Use the wrapper function for retrieving the platform data instead of
-accessing dev->platform_data directly.
-
-Signed-off-by: Jingoo Han <jg1.han@samsung.com>
-Signed-off-by: Vinod Koul <vinod.koul@intel.com>
-(cherry picked from commit d4adcc0160404c3237fe6ffa09dd2dd039dd3975)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-	drivers/dma/imx-sdma.c
-	drivers/dma/iop-adma.c
-	drivers/dma/mv_xor.c
-	drivers/dma/pl330.c
-	drivers/dma/sh/sudmac.c
-	drivers/dma/ste_dma40.c
-	drivers/dma/timb_dma.c
-	drivers/dma/txx9dmac.c
----
- drivers/dma/sh/shdma-of.c | 2 +-
- drivers/dma/sh/shdma.c    | 2 +-
- 2 files changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/dma/sh/shdma-of.c b/drivers/dma/sh/shdma-of.c
-index 11bcb05cd79c..966aaab0b4d3 100644
---- a/drivers/dma/sh/shdma-of.c
-+++ b/drivers/dma/sh/shdma-of.c
-@@ -42,7 +42,7 @@ static struct dma_chan *shdma_of_xlate(struct of_phandle_args *dma_spec,
- 
- static int shdma_of_probe(struct platform_device *pdev)
- {
--	const struct of_dev_auxdata *lookup = pdev->dev.platform_data;
-+	const struct of_dev_auxdata *lookup = dev_get_platdata(&pdev->dev);
- 	int ret;
- 
- 	if (!lookup)
-diff --git a/drivers/dma/sh/shdma.c b/drivers/dma/sh/shdma.c
-index b67f45f5c271..b388b12f078e 100644
---- a/drivers/dma/sh/shdma.c
-+++ b/drivers/dma/sh/shdma.c
-@@ -660,7 +660,7 @@ static const struct shdma_ops sh_dmae_shdma_ops = {
- 
- static int sh_dmae_probe(struct platform_device *pdev)
- {
--	struct sh_dmae_pdata *pdata = pdev->dev.platform_data;
-+	struct sh_dmae_pdata *pdata = dev_get_platdata(&pdev->dev);
- 	unsigned long irqflags = IRQF_DISABLED,
- 		chan_flag[SH_DMAE_MAX_CHANNELS] = {};
- 	int errirq, chan_irq[SH_DMAE_MAX_CHANNELS];
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0049-gpio-rcar-Remove-gpio-range-cells-DT-property-usage.patch b/patches.renesas/0049-gpio-rcar-Remove-gpio-range-cells-DT-property-usage.patch
deleted file mode 100644
index 3d7776892b3a9..0000000000000
--- a/patches.renesas/0049-gpio-rcar-Remove-gpio-range-cells-DT-property-usage.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From ebb13861bff24408d45c68e6de85e44426a65272 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 11 Sep 2013 15:51:01 +0200
-Subject: gpio: rcar: Remove #gpio-range-cells DT property usage
-
-Commit a1bc260bb5f5d95da854be7898202d788e94448d ("gpio: clean up
-gpio-ranges documentation") deprecated the #gpio-range-cells property.
-Replace its usage with a hardcoded value in the gpio-rcar driver.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Linus Walleij <linus.walleij@linaro.org>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 01eb2d18fd5d7b1539b0023790bc3101aeee522c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpio/gpio-rcar.c | 7 +++----
- 1 file changed, 3 insertions(+), 4 deletions(-)
-
-diff --git a/drivers/gpio/gpio-rcar.c b/drivers/gpio/gpio-rcar.c
-index e8198dd6..0be07f22 100644
---- a/drivers/gpio/gpio-rcar.c
-+++ b/drivers/gpio/gpio-rcar.c
-@@ -293,10 +293,9 @@ static void gpio_rcar_parse_pdata(struct gpio_rcar_priv *p)
- 	if (pdata) {
- 		p->config = *pdata;
- 	} else if (IS_ENABLED(CONFIG_OF) && np) {
--		ret = of_parse_phandle_with_args(np, "gpio-ranges",
--				"#gpio-range-cells", 0, &args);
--		p->config.number_of_pins = ret == 0 && args.args_count == 3
--					 ? args.args[2]
-+		ret = of_parse_phandle_with_fixed_args(np, "gpio-ranges", 3, 0,
-+						       &args);
-+		p->config.number_of_pins = ret == 0 ? args.args[2]
- 					 : RCAR_MAX_GPIO_PER_BANK;
- 		p->config.gpio_base = -1;
- 	}
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0050-ARM-shmobile-marzen-Do-not-enable-CONFIG_SMC911X-in-.patch b/patches.renesas/0050-ARM-shmobile-marzen-Do-not-enable-CONFIG_SMC911X-in-.patch
deleted file mode 100644
index 0ba173dec754b..0000000000000
--- a/patches.renesas/0050-ARM-shmobile-marzen-Do-not-enable-CONFIG_SMC911X-in-.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From e659527897a782e60ae3f1f1b663e87aab2079db Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Thu, 10 Oct 2013 15:12:17 +0900
-Subject: ARM: shmobile: marzen: Do not enable CONFIG_SMC911X in defconfig
-
-CONFIG_SMC911X is not needed by marzen.
-It appears to have been accidently enabled as well
-as CONFIG_SMSC911X which is needed by marzen.
-
-Signed-off-by: Simon Horman <horms@verge.net.au>
-(cherry picked from commit f3a3d2cfb7fb10e2e23d02abb5459ff974f2c8bd)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/configs/marzen_defconfig | 1 -
- 1 file changed, 1 deletion(-)
-
-diff --git a/arch/arm/configs/marzen_defconfig b/arch/arm/configs/marzen_defconfig
-index a423badba241..9ce38f6931e5 100644
---- a/arch/arm/configs/marzen_defconfig
-+++ b/arch/arm/configs/marzen_defconfig
-@@ -59,7 +59,6 @@ CONFIG_NETDEVICES=y
- # CONFIG_NET_VENDOR_MICREL is not set
- # CONFIG_NET_VENDOR_NATSEMI is not set
- # CONFIG_NET_VENDOR_SEEQ is not set
--CONFIG_SMC911X=y
- CONFIG_SMSC911X=y
- # CONFIG_NET_VENDOR_STMICRO is not set
- # CONFIG_WLAN is not set
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0050-DMA-shdma-fix-CHCLR-register-address-calculation.patch b/patches.renesas/0050-DMA-shdma-fix-CHCLR-register-address-calculation.patch
deleted file mode 100644
index 4c715deec3cc0..0000000000000
--- a/patches.renesas/0050-DMA-shdma-fix-CHCLR-register-address-calculation.patch
+++ /dev/null
@@ -1,50 +0,0 @@
-From 95898d642c91b96722bcdc6bed0b6e55d42036e6 Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Tue, 2 Jul 2013 17:37:58 +0200
-Subject: DMA: shdma: fix CHCLR register address calculation
-
-struct sh_dmae_device::chan_reg is a pointer to u32, therefore when adding
-offsets to it care should be taken to add offsets in sizeof(u32) units, not
-in bytes. This patch corrects such a bug. While at it we also remove the
-redundant parameter of the affected function.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Signed-off-by: Vinod Koul <vinod.koul@intel.com>
-(cherry picked from commit a28a94e84bca8ba7db66bcc0db1bea51840b08b2)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/dma/sh/shdma.c | 8 ++++----
- 1 file changed, 4 insertions(+), 4 deletions(-)
-
-diff --git a/drivers/dma/sh/shdma.c b/drivers/dma/sh/shdma.c
-index b388b12f078e..a5356db54959 100644
---- a/drivers/dma/sh/shdma.c
-+++ b/drivers/dma/sh/shdma.c
-@@ -49,12 +49,12 @@
- static DEFINE_SPINLOCK(sh_dmae_lock);
- static LIST_HEAD(sh_dmae_devices);
- 
--static void chclr_write(struct sh_dmae_chan *sh_dc, u32 data)
-+static void channel_clear(struct sh_dmae_chan *sh_dc)
- {
- 	struct sh_dmae_device *shdev = to_sh_dev(sh_dc);
- 
--	__raw_writel(data, shdev->chan_reg +
--		     shdev->pdata->channel[sh_dc->shdma_chan.id].chclr_offset);
-+	__raw_writel(0, shdev->chan_reg +
-+		shdev->pdata->channel[sh_dc->shdma_chan.id].chclr_offset / sizeof(u32));
- }
- 
- static void sh_dmae_writel(struct sh_dmae_chan *sh_dc, u32 data, u32 reg)
-@@ -133,7 +133,7 @@ static int sh_dmae_rst(struct sh_dmae_device *shdev)
- 		for (i = 0; i < shdev->pdata->channel_num; i++) {
- 			struct sh_dmae_chan *sh_chan = shdev->chan[i];
- 			if (sh_chan)
--				chclr_write(sh_chan, 0);
-+				channel_clear(sh_chan);
- 		}
- 	}
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0050-media-soc-camera-move-common-code-to-soc_camera.c.patch b/patches.renesas/0050-media-soc-camera-move-common-code-to-soc_camera.c.patch
deleted file mode 100644
index 17827362c80d6..0000000000000
--- a/patches.renesas/0050-media-soc-camera-move-common-code-to-soc_camera.c.patch
+++ /dev/null
@@ -1,575 +0,0 @@
-From 16b61d4bbfb274cd565fddaf7512c4221febfe0d Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Thu, 4 Apr 2013 08:21:12 -0300
-Subject: [media] soc-camera: move common code to soc_camera.c
-
-All soc-camera host drivers include a pointer to an soc-camera device in
-their host private struct to check, that only one client is connected.
-Move this common code to soc_camera.c.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
-(cherry picked from commit f7f6ce2d09c86bd80ee11bd654a1ac1e8f5dfe13)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/media/platform/soc_camera/atmel-isi.c      | 10 +-----
- drivers/media/platform/soc_camera/mx1_camera.c     | 20 +++---------
- drivers/media/platform/soc_camera/mx2_camera.c     | 13 ++------
- drivers/media/platform/soc_camera/mx3_camera.c     |  9 -----
- drivers/media/platform/soc_camera/omap1_camera.c   | 14 ++------
- drivers/media/platform/soc_camera/pxa_camera.c     | 18 +++-------
- .../platform/soc_camera/sh_mobile_ceu_camera.c     | 13 ++------
- drivers/media/platform/soc_camera/soc_camera.c     | 38 ++++++++++++++++++----
- include/media/soc_camera.h                         |  1 +
- 9 files changed, 49 insertions(+), 87 deletions(-)
-
-diff --git a/drivers/media/platform/soc_camera/atmel-isi.c b/drivers/media/platform/soc_camera/atmel-isi.c
-index 1abbb36d..c9e080a5 100644
---- a/drivers/media/platform/soc_camera/atmel-isi.c
-+++ b/drivers/media/platform/soc_camera/atmel-isi.c
-@@ -102,7 +102,6 @@ struct atmel_isi {
- 	struct list_head		video_buffer_list;
- 	struct frame_buffer		*active;
- 
--	struct soc_camera_device	*icd;
- 	struct soc_camera_host		soc_host;
- };
- 
-@@ -367,7 +366,7 @@ static void start_dma(struct atmel_isi *isi, struct frame_buffer *buffer)
- 
- 	/* Check if already in a frame */
- 	if (isi_readl(isi, ISI_STATUS) & ISI_CTRL_CDC) {
--		dev_err(isi->icd->parent, "Already in frame handling.\n");
-+		dev_err(isi->soc_host.icd->parent, "Already in frame handling.\n");
- 		return;
- 	}
- 
-@@ -753,9 +752,6 @@ static int isi_camera_add_device(struct soc_camera_device *icd)
- 	struct atmel_isi *isi = ici->priv;
- 	int ret;
- 
--	if (isi->icd)
--		return -EBUSY;
--
- 	ret = clk_enable(isi->pclk);
- 	if (ret)
- 		return ret;
-@@ -766,7 +762,6 @@ static int isi_camera_add_device(struct soc_camera_device *icd)
- 		return ret;
- 	}
- 
--	isi->icd = icd;
- 	dev_dbg(icd->parent, "Atmel ISI Camera driver attached to camera %d\n",
- 		 icd->devnum);
- 	return 0;
-@@ -777,11 +772,8 @@ static void isi_camera_remove_device(struct soc_camera_device *icd)
- 	struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
- 	struct atmel_isi *isi = ici->priv;
- 
--	BUG_ON(icd != isi->icd);
--
- 	clk_disable(isi->mck);
- 	clk_disable(isi->pclk);
--	isi->icd = NULL;
- 
- 	dev_dbg(icd->parent, "Atmel ISI Camera driver detached from camera %d\n",
- 		 icd->devnum);
-diff --git a/drivers/media/platform/soc_camera/mx1_camera.c b/drivers/media/platform/soc_camera/mx1_camera.c
-index a3fd8d63..5f9ec8ef 100644
---- a/drivers/media/platform/soc_camera/mx1_camera.c
-+++ b/drivers/media/platform/soc_camera/mx1_camera.c
-@@ -104,7 +104,6 @@ struct mx1_buffer {
-  */
- struct mx1_camera_dev {
- 	struct soc_camera_host		soc_host;
--	struct soc_camera_device	*icd;
- 	struct mx1_camera_pdata		*pdata;
- 	struct mx1_buffer		*active;
- 	struct resource			*res;
-@@ -220,7 +219,7 @@ out:
- static int mx1_camera_setup_dma(struct mx1_camera_dev *pcdev)
- {
- 	struct videobuf_buffer *vbuf = &pcdev->active->vb;
--	struct device *dev = pcdev->icd->parent;
-+	struct device *dev = pcdev->soc_host.icd->parent;
- 	int ret;
- 
- 	if (unlikely(!pcdev->active)) {
-@@ -331,7 +330,7 @@ static void mx1_camera_wakeup(struct mx1_camera_dev *pcdev,
- static void mx1_camera_dma_irq(int channel, void *data)
- {
- 	struct mx1_camera_dev *pcdev = data;
--	struct device *dev = pcdev->icd->parent;
-+	struct device *dev = pcdev->soc_host.icd->parent;
- 	struct mx1_buffer *buf;
- 	struct videobuf_buffer *vb;
- 	unsigned long flags;
-@@ -389,7 +388,7 @@ static int mclk_get_divisor(struct mx1_camera_dev *pcdev)
- 	 */
- 	div = (lcdclk + 2 * mclk - 1) / (2 * mclk) - 1;
- 
--	dev_dbg(pcdev->icd->parent,
-+	dev_dbg(pcdev->soc_host.icd->parent,
- 		"System clock %lukHz, target freq %dkHz, divisor %lu\n",
- 		lcdclk / 1000, mclk / 1000, div);
- 
-@@ -400,7 +399,7 @@ static void mx1_camera_activate(struct mx1_camera_dev *pcdev)
- {
- 	unsigned int csicr1 = CSICR1_EN;
- 
--	dev_dbg(pcdev->icd->parent, "Activate device\n");
-+	dev_dbg(pcdev->soc_host.icd->parent, "Activate device\n");
- 
- 	clk_prepare_enable(pcdev->clk);
- 
-@@ -416,7 +415,7 @@ static void mx1_camera_activate(struct mx1_camera_dev *pcdev)
- 
- static void mx1_camera_deactivate(struct mx1_camera_dev *pcdev)
- {
--	dev_dbg(pcdev->icd->parent, "Deactivate device\n");
-+	dev_dbg(pcdev->soc_host.icd->parent, "Deactivate device\n");
- 
- 	/* Disable all CSI interface */
- 	__raw_writel(0x00, pcdev->base + CSICR1);
-@@ -433,16 +432,11 @@ static int mx1_camera_add_device(struct soc_camera_device *icd)
- 	struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
- 	struct mx1_camera_dev *pcdev = ici->priv;
- 
--	if (pcdev->icd)
--		return -EBUSY;
--
- 	dev_info(icd->parent, "MX1 Camera driver attached to camera %d\n",
- 		 icd->devnum);
- 
- 	mx1_camera_activate(pcdev);
- 
--	pcdev->icd = icd;
--
- 	return 0;
- }
- 
-@@ -452,8 +446,6 @@ static void mx1_camera_remove_device(struct soc_camera_device *icd)
- 	struct mx1_camera_dev *pcdev = ici->priv;
- 	unsigned int csicr1;
- 
--	BUG_ON(icd != pcdev->icd);
--
- 	/* disable interrupts */
- 	csicr1 = __raw_readl(pcdev->base + CSICR1) & ~CSI_IRQ_MASK;
- 	__raw_writel(csicr1, pcdev->base + CSICR1);
-@@ -465,8 +457,6 @@ static void mx1_camera_remove_device(struct soc_camera_device *icd)
- 		 icd->devnum);
- 
- 	mx1_camera_deactivate(pcdev);
--
--	pcdev->icd = NULL;
- }
- 
- static int mx1_camera_set_bus_param(struct soc_camera_device *icd)
-diff --git a/drivers/media/platform/soc_camera/mx2_camera.c b/drivers/media/platform/soc_camera/mx2_camera.c
-index 5bbeb43e..772e0710 100644
---- a/drivers/media/platform/soc_camera/mx2_camera.c
-+++ b/drivers/media/platform/soc_camera/mx2_camera.c
-@@ -236,7 +236,6 @@ enum mx2_camera_type {
- struct mx2_camera_dev {
- 	struct device		*dev;
- 	struct soc_camera_host	soc_host;
--	struct soc_camera_device *icd;
- 	struct clk		*clk_emma_ahb, *clk_emma_ipg;
- 	struct clk		*clk_csi_ahb, *clk_csi_per;
- 
-@@ -394,8 +393,8 @@ static void mx27_update_emma_buf(struct mx2_camera_dev *pcdev,
- 		writel(phys, pcdev->base_emma +
- 			PRP_DEST_Y_PTR - 0x14 * bufnum);
- 		if (prp->out_fmt == V4L2_PIX_FMT_YUV420) {
--			u32 imgsize = pcdev->icd->user_height *
--					pcdev->icd->user_width;
-+			u32 imgsize = pcdev->soc_host.icd->user_height *
-+					pcdev->soc_host.icd->user_width;
- 
- 			writel(phys + imgsize, pcdev->base_emma +
- 				PRP_DEST_CB_PTR - 0x14 * bufnum);
-@@ -424,9 +423,6 @@ static int mx2_camera_add_device(struct soc_camera_device *icd)
- 	int ret;
- 	u32 csicr1;
- 
--	if (pcdev->icd)
--		return -EBUSY;
--
- 	ret = clk_prepare_enable(pcdev->clk_csi_ahb);
- 	if (ret < 0)
- 		return ret;
-@@ -441,7 +437,6 @@ static int mx2_camera_add_device(struct soc_camera_device *icd)
- 	pcdev->csicr1 = csicr1;
- 	writel(pcdev->csicr1, pcdev->base_csi + CSICR1);
- 
--	pcdev->icd = icd;
- 	pcdev->frame_count = 0;
- 
- 	dev_info(icd->parent, "Camera driver attached to camera %d\n",
-@@ -460,14 +455,10 @@ static void mx2_camera_remove_device(struct soc_camera_device *icd)
- 	struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
- 	struct mx2_camera_dev *pcdev = ici->priv;
- 
--	BUG_ON(icd != pcdev->icd);
--
- 	dev_info(icd->parent, "Camera driver detached from camera %d\n",
- 		 icd->devnum);
- 
- 	mx2_camera_deactivate(pcdev);
--
--	pcdev->icd = NULL;
- }
- 
- /*
-diff --git a/drivers/media/platform/soc_camera/mx3_camera.c b/drivers/media/platform/soc_camera/mx3_camera.c
-index 5da33773..71b9b191 100644
---- a/drivers/media/platform/soc_camera/mx3_camera.c
-+++ b/drivers/media/platform/soc_camera/mx3_camera.c
-@@ -94,7 +94,6 @@ struct mx3_camera_dev {
- 	 * Interface. If anyone ever builds hardware to enable more than one
- 	 * camera _simultaneously_, they will have to modify this driver too
- 	 */
--	struct soc_camera_device *icd;
- 	struct clk		*clk;
- 
- 	void __iomem		*base;
-@@ -517,13 +516,9 @@ static int mx3_camera_add_device(struct soc_camera_device *icd)
- 	struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
- 	struct mx3_camera_dev *mx3_cam = ici->priv;
- 
--	if (mx3_cam->icd)
--		return -EBUSY;
--
- 	mx3_camera_activate(mx3_cam, icd);
- 
- 	mx3_cam->buf_total = 0;
--	mx3_cam->icd = icd;
- 
- 	dev_info(icd->parent, "MX3 Camera driver attached to camera %d\n",
- 		 icd->devnum);
-@@ -538,8 +533,6 @@ static void mx3_camera_remove_device(struct soc_camera_device *icd)
- 	struct mx3_camera_dev *mx3_cam = ici->priv;
- 	struct idmac_channel **ichan = &mx3_cam->idmac_channel[0];
- 
--	BUG_ON(icd != mx3_cam->icd);
--
- 	if (*ichan) {
- 		dma_release_channel(&(*ichan)->dma_chan);
- 		*ichan = NULL;
-@@ -547,8 +540,6 @@ static void mx3_camera_remove_device(struct soc_camera_device *icd)
- 
- 	clk_disable_unprepare(mx3_cam->clk);
- 
--	mx3_cam->icd = NULL;
--
- 	dev_info(icd->parent, "MX3 Camera driver detached from camera %d\n",
- 		 icd->devnum);
- }
-diff --git a/drivers/media/platform/soc_camera/omap1_camera.c b/drivers/media/platform/soc_camera/omap1_camera.c
-index 9689a6e8..c42c23e4 100644
---- a/drivers/media/platform/soc_camera/omap1_camera.c
-+++ b/drivers/media/platform/soc_camera/omap1_camera.c
-@@ -150,7 +150,6 @@ struct omap1_cam_buf {
- 
- struct omap1_cam_dev {
- 	struct soc_camera_host		soc_host;
--	struct soc_camera_device	*icd;
- 	struct clk			*clk;
- 
- 	unsigned int			irq;
-@@ -564,7 +563,7 @@ static void videobuf_done(struct omap1_cam_dev *pcdev,
- {
- 	struct omap1_cam_buf *buf = pcdev->active;
- 	struct videobuf_buffer *vb;
--	struct device *dev = pcdev->icd->parent;
-+	struct device *dev = pcdev->soc_host.icd->parent;
- 
- 	if (WARN_ON(!buf)) {
- 		suspend_capture(pcdev);
-@@ -790,7 +789,7 @@ out:
- static irqreturn_t cam_isr(int irq, void *data)
- {
- 	struct omap1_cam_dev *pcdev = data;
--	struct device *dev = pcdev->icd->parent;
-+	struct device *dev = pcdev->soc_host.icd->parent;
- 	struct omap1_cam_buf *buf = pcdev->active;
- 	u32 it_status;
- 	unsigned long flags;
-@@ -904,9 +903,6 @@ static int omap1_cam_add_device(struct soc_camera_device *icd)
- 	struct omap1_cam_dev *pcdev = ici->priv;
- 	u32 ctrlclock;
- 
--	if (pcdev->icd)
--		return -EBUSY;
--
- 	clk_enable(pcdev->clk);
- 
- 	/* setup sensor clock */
-@@ -941,8 +937,6 @@ static int omap1_cam_add_device(struct soc_camera_device *icd)
- 
- 	sensor_reset(pcdev, false);
- 
--	pcdev->icd = icd;
--
- 	dev_dbg(icd->parent, "OMAP1 Camera driver attached to camera %d\n",
- 			icd->devnum);
- 	return 0;
-@@ -954,8 +948,6 @@ static void omap1_cam_remove_device(struct soc_camera_device *icd)
- 	struct omap1_cam_dev *pcdev = ici->priv;
- 	u32 ctrlclock;
- 
--	BUG_ON(icd != pcdev->icd);
--
- 	suspend_capture(pcdev);
- 	disable_capture(pcdev);
- 
-@@ -974,8 +966,6 @@ static void omap1_cam_remove_device(struct soc_camera_device *icd)
- 
- 	clk_disable(pcdev->clk);
- 
--	pcdev->icd = NULL;
--
- 	dev_dbg(icd->parent,
- 		"OMAP1 Camera driver detached from camera %d\n", icd->devnum);
- }
-diff --git a/drivers/media/platform/soc_camera/pxa_camera.c b/drivers/media/platform/soc_camera/pxa_camera.c
-index d665242e..686edf7c 100644
---- a/drivers/media/platform/soc_camera/pxa_camera.c
-+++ b/drivers/media/platform/soc_camera/pxa_camera.c
-@@ -200,7 +200,6 @@ struct pxa_camera_dev {
- 	 * interface. If anyone ever builds hardware to enable more than
- 	 * one camera, they will have to modify this driver too
- 	 */
--	struct soc_camera_device *icd;
- 	struct clk		*clk;
- 
- 	unsigned int		irq;
-@@ -966,13 +965,8 @@ static int pxa_camera_add_device(struct soc_camera_device *icd)
- 	struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
- 	struct pxa_camera_dev *pcdev = ici->priv;
- 
--	if (pcdev->icd)
--		return -EBUSY;
--
- 	pxa_camera_activate(pcdev);
- 
--	pcdev->icd = icd;
--
- 	dev_info(icd->parent, "PXA Camera driver attached to camera %d\n",
- 		 icd->devnum);
- 
-@@ -985,8 +979,6 @@ static void pxa_camera_remove_device(struct soc_camera_device *icd)
- 	struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
- 	struct pxa_camera_dev *pcdev = ici->priv;
- 
--	BUG_ON(icd != pcdev->icd);
--
- 	dev_info(icd->parent, "PXA Camera driver detached from camera %d\n",
- 		 icd->devnum);
- 
-@@ -999,8 +991,6 @@ static void pxa_camera_remove_device(struct soc_camera_device *icd)
- 	DCSR(pcdev->dma_chans[2]) = 0;
- 
- 	pxa_camera_deactivate(pcdev);
--
--	pcdev->icd = NULL;
- }
- 
- static int test_platform_param(struct pxa_camera_dev *pcdev,
-@@ -1596,8 +1586,8 @@ static int pxa_camera_suspend(struct device *dev)
- 	pcdev->save_cicr[i++] = __raw_readl(pcdev->base + CICR3);
- 	pcdev->save_cicr[i++] = __raw_readl(pcdev->base + CICR4);
- 
--	if (pcdev->icd) {
--		struct v4l2_subdev *sd = soc_camera_to_subdev(pcdev->icd);
-+	if (pcdev->soc_host.icd) {
-+		struct v4l2_subdev *sd = soc_camera_to_subdev(pcdev->soc_host.icd);
- 		ret = v4l2_subdev_call(sd, core, s_power, 0);
- 		if (ret == -ENOIOCTLCMD)
- 			ret = 0;
-@@ -1622,8 +1612,8 @@ static int pxa_camera_resume(struct device *dev)
- 	__raw_writel(pcdev->save_cicr[i++], pcdev->base + CICR3);
- 	__raw_writel(pcdev->save_cicr[i++], pcdev->base + CICR4);
- 
--	if (pcdev->icd) {
--		struct v4l2_subdev *sd = soc_camera_to_subdev(pcdev->icd);
-+	if (pcdev->soc_host.icd) {
-+		struct v4l2_subdev *sd = soc_camera_to_subdev(pcdev->soc_host.icd);
- 		ret = v4l2_subdev_call(sd, core, s_power, 1);
- 		if (ret == -ENOIOCTLCMD)
- 			ret = 0;
-diff --git a/drivers/media/platform/soc_camera/sh_mobile_ceu_camera.c b/drivers/media/platform/soc_camera/sh_mobile_ceu_camera.c
-index 143d29fe..5b7d8e1d 100644
---- a/drivers/media/platform/soc_camera/sh_mobile_ceu_camera.c
-+++ b/drivers/media/platform/soc_camera/sh_mobile_ceu_camera.c
-@@ -95,7 +95,6 @@ struct sh_mobile_ceu_buffer {
- 
- struct sh_mobile_ceu_dev {
- 	struct soc_camera_host ici;
--	struct soc_camera_device *icd;
- 	struct platform_device *csi2_pdev;
- 
- 	unsigned int irq;
-@@ -163,7 +162,7 @@ static u32 ceu_read(struct sh_mobile_ceu_dev *priv, unsigned long reg_offs)
- static int sh_mobile_ceu_soft_reset(struct sh_mobile_ceu_dev *pcdev)
- {
- 	int i, success = 0;
--	struct soc_camera_device *icd = pcdev->icd;
-+	struct soc_camera_device *icd = pcdev->ici.icd;
- 
- 	ceu_write(pcdev, CAPSR, 1 << 16); /* reset */
- 
-@@ -277,7 +276,7 @@ static int sh_mobile_ceu_videobuf_setup(struct vb2_queue *vq,
-  */
- static int sh_mobile_ceu_capture(struct sh_mobile_ceu_dev *pcdev)
- {
--	struct soc_camera_device *icd = pcdev->icd;
-+	struct soc_camera_device *icd = pcdev->ici.icd;
- 	dma_addr_t phys_addr_top, phys_addr_bottom;
- 	unsigned long top1, top2;
- 	unsigned long bottom1, bottom2;
-@@ -552,9 +551,6 @@ static int sh_mobile_ceu_add_device(struct soc_camera_device *icd)
- 	struct v4l2_subdev *csi2_sd;
- 	int ret;
- 
--	if (pcdev->icd)
--		return -EBUSY;
--
- 	dev_info(icd->parent,
- 		 "SuperH Mobile CEU driver attached to camera %d\n",
- 		 icd->devnum);
-@@ -583,7 +579,6 @@ static int sh_mobile_ceu_add_device(struct soc_camera_device *icd)
- 	 */
- 	if (ret == -ENODEV && csi2_sd)
- 		csi2_sd->grp_id = 0;
--	pcdev->icd = icd;
- 
- 	return 0;
- }
-@@ -595,8 +590,6 @@ static void sh_mobile_ceu_remove_device(struct soc_camera_device *icd)
- 	struct sh_mobile_ceu_dev *pcdev = ici->priv;
- 	struct v4l2_subdev *csi2_sd = find_csi2(pcdev);
- 
--	BUG_ON(icd != pcdev->icd);
--
- 	v4l2_subdev_call(csi2_sd, core, s_power, 0);
- 	if (csi2_sd)
- 		csi2_sd->grp_id = 0;
-@@ -618,8 +611,6 @@ static void sh_mobile_ceu_remove_device(struct soc_camera_device *icd)
- 	dev_info(icd->parent,
- 		 "SuperH Mobile CEU driver detached from camera %d\n",
- 		 icd->devnum);
--
--	pcdev->icd = NULL;
- }
- 
- /*
-diff --git a/drivers/media/platform/soc_camera/soc_camera.c b/drivers/media/platform/soc_camera/soc_camera.c
-index 3a4efbdc..832f0593 100644
---- a/drivers/media/platform/soc_camera/soc_camera.c
-+++ b/drivers/media/platform/soc_camera/soc_camera.c
-@@ -505,6 +505,32 @@ static int soc_camera_set_fmt(struct soc_camera_device *icd,
- 	return ici->ops->set_bus_param(icd);
- }
- 
-+static int soc_camera_add_device(struct soc_camera_device *icd)
-+{
-+	struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
-+	int ret;
-+
-+	if (ici->icd)
-+		return -EBUSY;
-+
-+	ret = ici->ops->add(icd);
-+	if (!ret)
-+		ici->icd = icd;
-+
-+	return ret;
-+}
-+
-+static void soc_camera_remove_device(struct soc_camera_device *icd)
-+{
-+	struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
-+
-+	if (WARN_ON(icd != ici->icd))
-+		return;
-+
-+	ici->ops->remove(icd);
-+	ici->icd = NULL;
-+}
-+
- static int soc_camera_open(struct file *file)
- {
- 	struct video_device *vdev = video_devdata(file);
-@@ -568,7 +594,7 @@ static int soc_camera_open(struct file *file)
- 		if (sdesc->subdev_desc.reset)
- 			sdesc->subdev_desc.reset(icd->pdev);
- 
--		ret = ici->ops->add(icd);
-+		ret = soc_camera_add_device(icd);
- 		if (ret < 0) {
- 			dev_err(icd->pdev, "Couldn't activate the camera: %d\n", ret);
- 			goto eiciadd;
-@@ -619,7 +645,7 @@ esfmt:
- eresume:
- 	__soc_camera_power_off(icd);
- epower:
--	ici->ops->remove(icd);
-+	soc_camera_remove_device(icd);
- eiciadd:
- 	icd->use_count--;
- 	mutex_unlock(&ici->host_lock);
-@@ -645,7 +671,7 @@ static int soc_camera_close(struct file *file)
- 			vb2_queue_release(&icd->vb2_vidq);
- 		__soc_camera_power_off(icd);
- 
--		ici->ops->remove(icd);
-+		soc_camera_remove_device(icd);
- 	}
- 
- 	if (icd->streamer == file)
-@@ -1167,7 +1193,7 @@ static int soc_camera_probe(struct soc_camera_device *icd)
- 		ssdd->reset(icd->pdev);
- 
- 	mutex_lock(&ici->host_lock);
--	ret = ici->ops->add(icd);
-+	ret = soc_camera_add_device(icd);
- 	mutex_unlock(&ici->host_lock);
- 	if (ret < 0)
- 		goto eadd;
-@@ -1240,7 +1266,7 @@ static int soc_camera_probe(struct soc_camera_device *icd)
- 		icd->field		= mf.field;
- 	}
- 
--	ici->ops->remove(icd);
-+	soc_camera_remove_device(icd);
- 
- 	mutex_unlock(&ici->host_lock);
- 
-@@ -1263,7 +1289,7 @@ eadddev:
- 	icd->vdev = NULL;
- evdc:
- 	mutex_lock(&ici->host_lock);
--	ici->ops->remove(icd);
-+	soc_camera_remove_device(icd);
- 	mutex_unlock(&ici->host_lock);
- eadd:
- 	v4l2_ctrl_handler_free(&icd->ctrl_handler);
-diff --git a/include/media/soc_camera.h b/include/media/soc_camera.h
-index ff77d08c..5a46ce2d 100644
---- a/include/media/soc_camera.h
-+++ b/include/media/soc_camera.h
-@@ -64,6 +64,7 @@ struct soc_camera_host {
- 	struct mutex host_lock;		/* Protect pipeline modifications */
- 	unsigned char nr;		/* Host number */
- 	u32 capabilities;
-+	struct soc_camera_device *icd;	/* Currently attached client */
- 	void *priv;
- 	const char *drv_name;
- 	struct soc_camera_host_ops *ops;
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0051-ARM-shmobile-marzen-enable-HPB-DMAC-in-defconfig.patch b/patches.renesas/0051-ARM-shmobile-marzen-enable-HPB-DMAC-in-defconfig.patch
deleted file mode 100644
index bca75b2a060b4..0000000000000
--- a/patches.renesas/0051-ARM-shmobile-marzen-enable-HPB-DMAC-in-defconfig.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From 31b2e124bea58f8651026bf53066e6416b553169 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Sun, 29 Sep 2013 00:12:33 +0400
-Subject: ARM: shmobile: marzen: enable HPB-DMAC in defconfig
-
-Enable HPB-DMAC driver in 'marzen_defconfig'.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 96c4f31f955bd35e33bae1e11a5e614f5c7163cd)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/configs/marzen_defconfig | 2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/arch/arm/configs/marzen_defconfig b/arch/arm/configs/marzen_defconfig
-index 9ce38f6931e5..dd4aced59d3c 100644
---- a/arch/arm/configs/marzen_defconfig
-+++ b/arch/arm/configs/marzen_defconfig
-@@ -103,6 +103,8 @@ CONFIG_USB_STORAGE=y
- CONFIG_NEW_LEDS=y
- CONFIG_LEDS_CLASS=y
- CONFIG_LEDS_GPIO=y
-+CONFIG_DMADEVICES=y
-+CONFIG_RCAR_HPB_DMAE=y
- CONFIG_UIO=y
- CONFIG_UIO_PDRV_GENIRQ=y
- # CONFIG_IOMMU_SUPPORT is not set
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0051-DMA-shdma-switch-all-__iomem-pointers-to-void.patch b/patches.renesas/0051-DMA-shdma-switch-all-__iomem-pointers-to-void.patch
deleted file mode 100644
index 2c10f2c44190c..0000000000000
--- a/patches.renesas/0051-DMA-shdma-switch-all-__iomem-pointers-to-void.patch
+++ /dev/null
@@ -1,133 +0,0 @@
-From 0dd7196b2112a62655d034259ed7430890e76497 Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Tue, 2 Jul 2013 17:46:01 +0200
-Subject: DMA: shdma: switch all __iomem pointers to void
-
-In the shdma driver __iomem pointers are used to point to hardware
-registers.  Using typed pointers like "u32 __iomem *" in this case is
-inconvenient, because then offsets, added to such pointers, have to be
-devided by sizeof(u32) or similar. Switch the driver to use void
-pointers, which avoids this clumsiness.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Signed-off-by: Vinod Koul <vinod.koul@intel.com>
-(cherry picked from commit 115357e9774ff8d70a84d3c31f271209913637b0)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/dma/sh/shdma.c | 22 +++++++++++-----------
- drivers/dma/sh/shdma.h |  6 +++---
- 2 files changed, 14 insertions(+), 14 deletions(-)
-
-diff --git a/drivers/dma/sh/shdma.c b/drivers/dma/sh/shdma.c
-index a5356db54959..547a4ab69ca0 100644
---- a/drivers/dma/sh/shdma.c
-+++ b/drivers/dma/sh/shdma.c
-@@ -54,22 +54,22 @@ static void channel_clear(struct sh_dmae_chan *sh_dc)
- 	struct sh_dmae_device *shdev = to_sh_dev(sh_dc);
- 
- 	__raw_writel(0, shdev->chan_reg +
--		shdev->pdata->channel[sh_dc->shdma_chan.id].chclr_offset / sizeof(u32));
-+		shdev->pdata->channel[sh_dc->shdma_chan.id].chclr_offset);
- }
- 
- static void sh_dmae_writel(struct sh_dmae_chan *sh_dc, u32 data, u32 reg)
- {
--	__raw_writel(data, sh_dc->base + reg / sizeof(u32));
-+	__raw_writel(data, sh_dc->base + reg);
- }
- 
- static u32 sh_dmae_readl(struct sh_dmae_chan *sh_dc, u32 reg)
- {
--	return __raw_readl(sh_dc->base + reg / sizeof(u32));
-+	return __raw_readl(sh_dc->base + reg);
- }
- 
- static u16 dmaor_read(struct sh_dmae_device *shdev)
- {
--	u32 __iomem *addr = shdev->chan_reg + DMAOR / sizeof(u32);
-+	void __iomem *addr = shdev->chan_reg + DMAOR;
- 
- 	if (shdev->pdata->dmaor_is_32bit)
- 		return __raw_readl(addr);
-@@ -79,7 +79,7 @@ static u16 dmaor_read(struct sh_dmae_device *shdev)
- 
- static void dmaor_write(struct sh_dmae_device *shdev, u16 data)
- {
--	u32 __iomem *addr = shdev->chan_reg + DMAOR / sizeof(u32);
-+	void __iomem *addr = shdev->chan_reg + DMAOR;
- 
- 	if (shdev->pdata->dmaor_is_32bit)
- 		__raw_writel(data, addr);
-@@ -91,14 +91,14 @@ static void chcr_write(struct sh_dmae_chan *sh_dc, u32 data)
- {
- 	struct sh_dmae_device *shdev = to_sh_dev(sh_dc);
- 
--	__raw_writel(data, sh_dc->base + shdev->chcr_offset / sizeof(u32));
-+	__raw_writel(data, sh_dc->base + shdev->chcr_offset);
- }
- 
- static u32 chcr_read(struct sh_dmae_chan *sh_dc)
- {
- 	struct sh_dmae_device *shdev = to_sh_dev(sh_dc);
- 
--	return __raw_readl(sh_dc->base + shdev->chcr_offset / sizeof(u32));
-+	return __raw_readl(sh_dc->base + shdev->chcr_offset);
- }
- 
- /*
-@@ -242,7 +242,7 @@ static int dmae_set_dmars(struct sh_dmae_chan *sh_chan, u16 val)
- 	struct sh_dmae_device *shdev = to_sh_dev(sh_chan);
- 	struct sh_dmae_pdata *pdata = shdev->pdata;
- 	const struct sh_dmae_channel *chan_pdata = &pdata->channel[sh_chan->shdma_chan.id];
--	u16 __iomem *addr = shdev->dmars;
-+	void __iomem *addr = shdev->dmars;
- 	unsigned int shift = chan_pdata->dmars_bit;
- 
- 	if (dmae_is_busy(sh_chan))
-@@ -253,8 +253,8 @@ static int dmae_set_dmars(struct sh_dmae_chan *sh_chan, u16 val)
- 
- 	/* in the case of a missing DMARS resource use first memory window */
- 	if (!addr)
--		addr = (u16 __iomem *)shdev->chan_reg;
--	addr += chan_pdata->dmars / sizeof(u16);
-+		addr = shdev->chan_reg;
-+	addr += chan_pdata->dmars;
- 
- 	__raw_writew((__raw_readw(addr) & (0xff00 >> shift)) | (val << shift),
- 		     addr);
-@@ -517,7 +517,7 @@ static int sh_dmae_chan_probe(struct sh_dmae_device *shdev, int id,
- 
- 	shdma_chan_probe(sdev, schan, id);
- 
--	sh_chan->base = shdev->chan_reg + chan_pdata->offset / sizeof(u32);
-+	sh_chan->base = shdev->chan_reg + chan_pdata->offset;
- 
- 	/* set up channel irq */
- 	if (pdev->id >= 0)
-diff --git a/drivers/dma/sh/shdma.h b/drivers/dma/sh/shdma.h
-index 9314e93225db..06aae6ebc82b 100644
---- a/drivers/dma/sh/shdma.h
-+++ b/drivers/dma/sh/shdma.h
-@@ -28,7 +28,7 @@ struct sh_dmae_chan {
- 	struct shdma_chan shdma_chan;
- 	const struct sh_dmae_slave_config *config; /* Slave DMA configuration */
- 	int xmit_shift;			/* log_2(bytes_per_xfer) */
--	u32 __iomem *base;
-+	void __iomem *base;
- 	char dev_id[16];		/* unique name per DMAC of channel */
- 	int pm_error;
- };
-@@ -38,8 +38,8 @@ struct sh_dmae_device {
- 	struct sh_dmae_chan *chan[SH_DMAE_MAX_CHANNELS];
- 	struct sh_dmae_pdata *pdata;
- 	struct list_head node;
--	u32 __iomem *chan_reg;
--	u16 __iomem *dmars;
-+	void __iomem *chan_reg;
-+	void __iomem *dmars;
- 	unsigned int chcr_offset;
- 	u32 chcr_ie_bit;
- };
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0051-mmc-return-mmc_of_parse-errors-to-caller.patch b/patches.renesas/0051-mmc-return-mmc_of_parse-errors-to-caller.patch
deleted file mode 100644
index 356beeef7cb9e..0000000000000
--- a/patches.renesas/0051-mmc-return-mmc_of_parse-errors-to-caller.patch
+++ /dev/null
@@ -1,130 +0,0 @@
-From b44ec118a86a032b43da0b0142486522f6157ea6 Mon Sep 17 00:00:00 2001
-From: Simon Baatz <gmbnomis@gmail.com>
-Date: Sun, 9 Jun 2013 22:14:11 +0200
-Subject: mmc: return mmc_of_parse() errors to caller
-
-In addition to just logging errors encountered during DT parsing or
-allocating GPIO slots for CD/WP, mmc_of_parse() now returns with an error.
-
-In particular, this is needed if the GPIO allocation may return
-EPROBE_DEFER.
-
-Signed-off-by: Simon Baatz <gmbnomis@gmail.com>
-Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
-Signed-off-by: Chris Ball <cjb@laptop.org>
-(cherry picked from commit ec0a7517dc25b4cca8a694fd61e09771bffba022)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/mmc/core/host.c  | 30 +++++++++++++++++++++++++-----
- include/linux/mmc/host.h |  2 +-
- 2 files changed, 26 insertions(+), 6 deletions(-)
-
-diff --git a/drivers/mmc/core/host.c b/drivers/mmc/core/host.c
-index 2a3593d9..89f58498 100644
---- a/drivers/mmc/core/host.c
-+++ b/drivers/mmc/core/host.c
-@@ -306,7 +306,7 @@ static inline void mmc_host_clk_sysfs_init(struct mmc_host *host)
-  * parse the properties and set respective generic mmc-host flags and
-  * parameters.
-  */
--void mmc_of_parse(struct mmc_host *host)
-+int mmc_of_parse(struct mmc_host *host)
- {
- 	struct device_node *np;
- 	u32 bus_width;
-@@ -315,7 +315,7 @@ void mmc_of_parse(struct mmc_host *host)
- 	int len, ret, gpio;
- 
- 	if (!host->parent || !host->parent->of_node)
--		return;
-+		return 0;
- 
- 	np = host->parent->of_node;
- 
-@@ -338,6 +338,7 @@ void mmc_of_parse(struct mmc_host *host)
- 	default:
- 		dev_err(host->parent,
- 			"Invalid \"bus-width\" value %ud!\n", bus_width);
-+		return -EINVAL;
- 	}
- 
- 	/* f_max is obtained from the optional "max-frequency" property */
-@@ -367,18 +368,22 @@ void mmc_of_parse(struct mmc_host *host)
- 			host->caps |= MMC_CAP_NEEDS_POLL;
- 
- 		gpio = of_get_named_gpio_flags(np, "cd-gpios", 0, &flags);
-+		if (gpio == -EPROBE_DEFER)
-+			return gpio;
- 		if (gpio_is_valid(gpio)) {
- 			if (!(flags & OF_GPIO_ACTIVE_LOW))
- 				gpio_inv_cd = true;
- 
- 			ret = mmc_gpio_request_cd(host, gpio);
--			if (ret < 0)
-+			if (ret < 0) {
- 				dev_err(host->parent,
- 					"Failed to request CD GPIO #%d: %d!\n",
- 					gpio, ret);
--			else
-+				return ret;
-+			} else {
- 				dev_info(host->parent, "Got CD GPIO #%d.\n",
- 					 gpio);
-+			}
- 		}
- 
- 		if (explicit_inv_cd ^ gpio_inv_cd)
-@@ -389,14 +394,23 @@ void mmc_of_parse(struct mmc_host *host)
- 	explicit_inv_wp = of_property_read_bool(np, "wp-inverted");
- 
- 	gpio = of_get_named_gpio_flags(np, "wp-gpios", 0, &flags);
-+	if (gpio == -EPROBE_DEFER) {
-+		ret = -EPROBE_DEFER;
-+		goto out;
-+	}
- 	if (gpio_is_valid(gpio)) {
- 		if (!(flags & OF_GPIO_ACTIVE_LOW))
- 			gpio_inv_wp = true;
- 
- 		ret = mmc_gpio_request_ro(host, gpio);
--		if (ret < 0)
-+		if (ret < 0) {
- 			dev_err(host->parent,
- 				"Failed to request WP GPIO: %d!\n", ret);
-+			goto out;
-+		} else {
-+				dev_info(host->parent, "Got WP GPIO #%d.\n",
-+					 gpio);
-+		}
- 	}
- 	if (explicit_inv_wp ^ gpio_inv_wp)
- 		host->caps2 |= MMC_CAP2_RO_ACTIVE_HIGH;
-@@ -413,6 +427,12 @@ void mmc_of_parse(struct mmc_host *host)
- 		host->pm_caps |= MMC_PM_KEEP_POWER;
- 	if (of_find_property(np, "enable-sdio-wakeup", &len))
- 		host->pm_caps |= MMC_PM_WAKE_SDIO_IRQ;
-+
-+	return 0;
-+
-+out:
-+	mmc_gpio_free_cd(host);
-+	return ret;
- }
- 
- EXPORT_SYMBOL(mmc_of_parse);
-diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h
-index e326ae28..c8c4fbc6 100644
---- a/include/linux/mmc/host.h
-+++ b/include/linux/mmc/host.h
-@@ -369,7 +369,7 @@ struct mmc_host *mmc_alloc_host(int extra, struct device *);
- int mmc_add_host(struct mmc_host *);
- void mmc_remove_host(struct mmc_host *);
- void mmc_free_host(struct mmc_host *);
--void mmc_of_parse(struct mmc_host *host);
-+int mmc_of_parse(struct mmc_host *host);
- 
- static inline void *mmc_priv(struct mmc_host *host)
- {
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0052-ARM-shmobile-bockw-enable-HPB-DMAC-in-defconfig.patch b/patches.renesas/0052-ARM-shmobile-bockw-enable-HPB-DMAC-in-defconfig.patch
deleted file mode 100644
index e4de113d226d9..0000000000000
--- a/patches.renesas/0052-ARM-shmobile-bockw-enable-HPB-DMAC-in-defconfig.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From a91c6ab32bdd0bc7397f36acf6eca8902fb0c057 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Sun, 29 Sep 2013 00:11:28 +0400
-Subject: ARM: shmobile: bockw: enable HPB-DMAC in defconfig
-
-Enable HPB-DMAC driver in 'bockw_defconfig'.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 885484af398d11c21e4927dc33a2994927de6c5a)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/configs/bockw_defconfig | 2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/arch/arm/configs/bockw_defconfig b/arch/arm/configs/bockw_defconfig
-index 191decba86c4..8110d8a653f7 100644
---- a/arch/arm/configs/bockw_defconfig
-+++ b/arch/arm/configs/bockw_defconfig
-@@ -107,6 +107,8 @@ CONFIG_MMC_SDHI=y
- CONFIG_MMC_SH_MMCIF=y
- CONFIG_RTC_CLASS=y
- CONFIG_RTC_DRV_RX8581=y
-+CONFIG_DMADEVICES=y
-+CONFIG_RCAR_HPB_DMAE=y
- CONFIG_UIO=y
- CONFIG_UIO_PDRV_GENIRQ=y
- # CONFIG_IOMMU_SUPPORT is not set
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0052-DMA-shdma-support-the-new-CHCLR-register-layout.patch b/patches.renesas/0052-DMA-shdma-support-the-new-CHCLR-register-layout.patch
deleted file mode 100644
index b626b587f32d4..0000000000000
--- a/patches.renesas/0052-DMA-shdma-support-the-new-CHCLR-register-layout.patch
+++ /dev/null
@@ -1,110 +0,0 @@
-From e24e6f7c2a5ce6be02608f445734223c0170ed93 Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Wed, 10 Jul 2013 12:09:47 +0200
-Subject: DMA: shdma: support the new CHCLR register layout
-
-On newer r-car SoCs the CHCLR register only contains one bit per channel,
-to which a 1 has to be written to reset the channel. Older SoC versions had
-one CHCLR register per channel, to which a 0 must be written to reset the
-channel and clear its buffers. This patch adds support for the newer
-layout.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Signed-off-by: Vinod Koul <vinod.koul@intel.com>
-(cherry picked from commit ca8b387803072a16baf6d8090591b10bfdf4e253)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/dma/sh/shdma.c | 14 ++++++++++++--
- include/linux/sh_dma.h | 34 +++++++++++++++++++++++++++++++++-
- 2 files changed, 45 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/dma/sh/shdma.c b/drivers/dma/sh/shdma.c
-index 547a4ab69ca0..ba539d8cabee 100644
---- a/drivers/dma/sh/shdma.c
-+++ b/drivers/dma/sh/shdma.c
-@@ -49,12 +49,22 @@
- static DEFINE_SPINLOCK(sh_dmae_lock);
- static LIST_HEAD(sh_dmae_devices);
- 
-+/*
-+ * Different DMAC implementations provide different ways to clear DMA channels:
-+ * (1) none - no CHCLR registers are available
-+ * (2) one CHCLR register per channel - 0 has to be written to it to clear
-+ *     channel buffers
-+ * (3) one CHCLR per several channels - 1 has to be written to the bit,
-+ *     corresponding to the specific channel to reset it
-+ */
- static void channel_clear(struct sh_dmae_chan *sh_dc)
- {
- 	struct sh_dmae_device *shdev = to_sh_dev(sh_dc);
-+	const struct sh_dmae_channel *chan_pdata = shdev->pdata->channel +
-+		sh_dc->shdma_chan.id;
-+	u32 val = shdev->pdata->chclr_bitwise ? 1 << chan_pdata->chclr_bit : 0;
- 
--	__raw_writel(0, shdev->chan_reg +
--		shdev->pdata->channel[sh_dc->shdma_chan.id].chclr_offset);
-+	__raw_writel(val, shdev->chan_reg + chan_pdata->chclr_offset);
- }
- 
- static void sh_dmae_writel(struct sh_dmae_chan *sh_dc, u32 data, u32 reg)
-diff --git a/include/linux/sh_dma.h b/include/linux/sh_dma.h
-index 4e83f3e034f3..776ed9d682f4 100644
---- a/include/linux/sh_dma.h
-+++ b/include/linux/sh_dma.h
-@@ -33,13 +33,44 @@ struct sh_dmae_slave_config {
- 	char		mid_rid;
- };
- 
-+/**
-+ * struct sh_dmae_channel - DMAC channel platform data
-+ * @offset:		register offset within the main IOMEM resource
-+ * @dmars:		channel DMARS register offset
-+ * @chclr_offset:	channel CHCLR register offset
-+ * @dmars_bit:		channel DMARS field offset within the register
-+ * @chclr_bit:		bit position, to be set to reset the channel
-+ */
- struct sh_dmae_channel {
- 	unsigned int	offset;
- 	unsigned int	dmars;
--	unsigned int	dmars_bit;
- 	unsigned int	chclr_offset;
-+	unsigned char	dmars_bit;
-+	unsigned char	chclr_bit;
- };
- 
-+/**
-+ * struct sh_dmae_pdata - DMAC platform data
-+ * @slave:		array of slaves
-+ * @slave_num:		number of slaves in the above array
-+ * @channel:		array of DMA channels
-+ * @channel_num:	number of channels in the above array
-+ * @ts_low_shift:	shift of the low part of the TS field
-+ * @ts_low_mask:	low TS field mask
-+ * @ts_high_shift:	additional shift of the high part of the TS field
-+ * @ts_high_mask:	high TS field mask
-+ * @ts_shift:		array of Transfer Size shifts, indexed by TS value
-+ * @ts_shift_num:	number of shifts in the above array
-+ * @dmaor_init:		DMAOR initialisation value
-+ * @chcr_offset:	CHCR address offset
-+ * @chcr_ie_bit:	CHCR Interrupt Enable bit
-+ * @dmaor_is_32bit:	DMAOR is a 32-bit register
-+ * @needs_tend_set:	the TEND register has to be set
-+ * @no_dmars:		DMAC has no DMARS registers
-+ * @chclr_present:	DMAC has one or several CHCLR registers
-+ * @chclr_bitwise:	channel CHCLR registers are bitwise
-+ * @slave_only:		DMAC cannot be used for MEMCPY
-+ */
- struct sh_dmae_pdata {
- 	const struct sh_dmae_slave_config *slave;
- 	int slave_num;
-@@ -59,6 +90,7 @@ struct sh_dmae_pdata {
- 	unsigned int needs_tend_set:1;
- 	unsigned int no_dmars:1;
- 	unsigned int chclr_present:1;
-+	unsigned int chclr_bitwise:1;
- 	unsigned int slave_only:1;
- };
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0052-mmc-slot-gpio-Add-debouncing-capability-to-mmc_gpio_.patch b/patches.renesas/0052-mmc-slot-gpio-Add-debouncing-capability-to-mmc_gpio_.patch
deleted file mode 100644
index 0a7d2c5a338bb..0000000000000
--- a/patches.renesas/0052-mmc-slot-gpio-Add-debouncing-capability-to-mmc_gpio_.patch
+++ /dev/null
@@ -1,180 +0,0 @@
-From 8bec0342de0d649786e321912caad6e8cc90a0c1 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 8 Aug 2013 12:38:31 +0200
-Subject: mmc: slot-gpio: Add debouncing capability to mmc_gpio_request_cd()
-
-Add a debounce parameter to the mmc_gpio_request_cd() function that
-enables GPIO debouncing when set to a non-zero value. This can be used
-by MMC host drivers to enable debouncing on the card detect signal.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Reviewed-by: H Hartley Sweeten <hsweeten@visionengravers.com>
-Signed-off-by: Chris Ball <cjb@laptop.org>
-(cherry picked from commit 214fc309d1387e822d606a33a10e31cacfe83520)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-	drivers/mmc/host/jz4740_mmc.c
-	drivers/mmc/host/mvsdio.c
----
- drivers/mmc/core/host.c            |  2 +-
- drivers/mmc/core/slot-gpio.c       | 14 +++++++++++++-
- drivers/mmc/host/mvsdio.c          |  2 +-
- drivers/mmc/host/sdhci-esdhc-imx.c |  2 +-
- drivers/mmc/host/sdhci-pxav3.c     |  3 ++-
- drivers/mmc/host/sdhci-sirf.c      |  2 +-
- drivers/mmc/host/sh_mmcif.c        |  2 +-
- drivers/mmc/host/tmio_mmc_pio.c    |  2 +-
- include/linux/mmc/slot-gpio.h      |  3 ++-
- 9 files changed, 23 insertions(+), 9 deletions(-)
-
-diff --git a/drivers/mmc/core/host.c b/drivers/mmc/core/host.c
-index 89f58498..85bdfd00 100644
---- a/drivers/mmc/core/host.c
-+++ b/drivers/mmc/core/host.c
-@@ -374,7 +374,7 @@ int mmc_of_parse(struct mmc_host *host)
- 			if (!(flags & OF_GPIO_ACTIVE_LOW))
- 				gpio_inv_cd = true;
- 
--			ret = mmc_gpio_request_cd(host, gpio);
-+			ret = mmc_gpio_request_cd(host, gpio, 0);
- 			if (ret < 0) {
- 				dev_err(host->parent,
- 					"Failed to request CD GPIO #%d: %d!\n",
-diff --git a/drivers/mmc/core/slot-gpio.c b/drivers/mmc/core/slot-gpio.c
-index 32423510..46596b71 100644
---- a/drivers/mmc/core/slot-gpio.c
-+++ b/drivers/mmc/core/slot-gpio.c
-@@ -135,6 +135,7 @@ EXPORT_SYMBOL(mmc_gpio_request_ro);
-  * mmc_gpio_request_cd - request a gpio for card-detection
-  * @host: mmc host
-  * @gpio: gpio number requested
-+ * @debounce: debounce time in microseconds
-  *
-  * As devm_* managed functions are used in mmc_gpio_request_cd(), client
-  * drivers do not need to explicitly call mmc_gpio_free_cd() for freeing up,
-@@ -143,9 +144,14 @@ EXPORT_SYMBOL(mmc_gpio_request_ro);
-  * switching for card-detection, they are responsible for calling
-  * mmc_gpio_request_cd() and mmc_gpio_free_cd() as a pair on their own.
-  *
-+ * If GPIO debouncing is desired, set the debounce parameter to a non-zero
-+ * value. The caller is responsible for ensuring that the GPIO driver associated
-+ * with the GPIO supports debouncing, otherwise an error will be returned.
-+ *
-  * Returns zero on success, else an error.
-  */
--int mmc_gpio_request_cd(struct mmc_host *host, unsigned int gpio)
-+int mmc_gpio_request_cd(struct mmc_host *host, unsigned int gpio,
-+			unsigned int debounce)
- {
- 	struct mmc_gpio *ctx;
- 	int irq = gpio_to_irq(gpio);
-@@ -167,6 +173,12 @@ int mmc_gpio_request_cd(struct mmc_host *host, unsigned int gpio)
- 		 */
- 		return ret;
- 
-+	if (debounce) {
-+		ret = gpio_set_debounce(gpio, debounce);
-+		if (ret < 0)
-+			return ret;
-+	}
-+
- 	/*
- 	 * Even if gpio_to_irq() returns a valid IRQ number, the platform might
- 	 * still prefer to poll, e.g., because that IRQ number is already used
-diff --git a/drivers/mmc/host/mvsdio.c b/drivers/mmc/host/mvsdio.c
-index 8960fc84..a1fcc1f9 100644
---- a/drivers/mmc/host/mvsdio.c
-+++ b/drivers/mmc/host/mvsdio.c
-@@ -778,7 +778,7 @@ static int __init mvsd_probe(struct platform_device *pdev)
- 	}
- 
- 	if (gpio_is_valid(gpio_card_detect)) {
--		ret = mmc_gpio_request_cd(mmc, gpio_card_detect);
-+		ret = mmc_gpio_request_cd(mmc, gpio_card_detect, 0);
- 		if (ret)
- 			goto out;
- 	} else
-diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c
-index d5f0d59e..a0317abb 100644
---- a/drivers/mmc/host/sdhci-esdhc-imx.c
-+++ b/drivers/mmc/host/sdhci-esdhc-imx.c
-@@ -592,7 +592,7 @@ static int sdhci_esdhc_imx_probe(struct platform_device *pdev)
- 	/* card_detect */
- 	switch (boarddata->cd_type) {
- 	case ESDHC_CD_GPIO:
--		err = mmc_gpio_request_cd(host->mmc, boarddata->cd_gpio);
-+		err = mmc_gpio_request_cd(host->mmc, boarddata->cd_gpio, 0);
- 		if (err) {
- 			dev_err(mmc_dev(host->mmc),
- 				"failed to request card-detect gpio!\n");
-diff --git a/drivers/mmc/host/sdhci-pxav3.c b/drivers/mmc/host/sdhci-pxav3.c
-index 1ae358e0..ce84208d 100644
---- a/drivers/mmc/host/sdhci-pxav3.c
-+++ b/drivers/mmc/host/sdhci-pxav3.c
-@@ -276,7 +276,8 @@ static int sdhci_pxav3_probe(struct platform_device *pdev)
- 			host->mmc->pm_caps |= pdata->pm_caps;
- 
- 		if (gpio_is_valid(pdata->ext_cd_gpio)) {
--			ret = mmc_gpio_request_cd(host->mmc, pdata->ext_cd_gpio);
-+			ret = mmc_gpio_request_cd(host->mmc, pdata->ext_cd_gpio,
-+						  0);
- 			if (ret) {
- 				dev_err(mmc_dev(host->mmc),
- 					"failed to allocate card detect gpio\n");
-diff --git a/drivers/mmc/host/sdhci-sirf.c b/drivers/mmc/host/sdhci-sirf.c
-index 09805af0..b665326d 100644
---- a/drivers/mmc/host/sdhci-sirf.c
-+++ b/drivers/mmc/host/sdhci-sirf.c
-@@ -97,7 +97,7 @@ static int sdhci_sirf_probe(struct platform_device *pdev)
- 	 * gets setup in sdhci_add_host() and we oops.
- 	 */
- 	if (gpio_is_valid(priv->gpio_cd)) {
--		ret = mmc_gpio_request_cd(host->mmc, priv->gpio_cd);
-+		ret = mmc_gpio_request_cd(host->mmc, priv->gpio_cd, 0);
- 		if (ret) {
- 			dev_err(&pdev->dev, "card detect irq request failed: %d\n",
- 				ret);
-diff --git a/drivers/mmc/host/sh_mmcif.c b/drivers/mmc/host/sh_mmcif.c
-index ba76a532..a23f6c06 100644
---- a/drivers/mmc/host/sh_mmcif.c
-+++ b/drivers/mmc/host/sh_mmcif.c
-@@ -1431,7 +1431,7 @@ static int sh_mmcif_probe(struct platform_device *pdev)
- 	}
- 
- 	if (pd && pd->use_cd_gpio) {
--		ret = mmc_gpio_request_cd(mmc, pd->cd_gpio);
-+		ret = mmc_gpio_request_cd(mmc, pd->cd_gpio, 0);
- 		if (ret < 0)
- 			goto erqcd;
- 	}
-diff --git a/drivers/mmc/host/tmio_mmc_pio.c b/drivers/mmc/host/tmio_mmc_pio.c
-index f508ecb5..5a1bc3b4 100644
---- a/drivers/mmc/host/tmio_mmc_pio.c
-+++ b/drivers/mmc/host/tmio_mmc_pio.c
-@@ -1091,7 +1091,7 @@ int tmio_mmc_host_probe(struct tmio_mmc_host **host,
- 	dev_pm_qos_expose_latency_limit(&pdev->dev, 100);
- 
- 	if (pdata->flags & TMIO_MMC_USE_GPIO_CD) {
--		ret = mmc_gpio_request_cd(mmc, pdata->cd_gpio);
-+		ret = mmc_gpio_request_cd(mmc, pdata->cd_gpio, 0);
- 		if (ret < 0) {
- 			tmio_mmc_host_remove(_host);
- 			return ret;
-diff --git a/include/linux/mmc/slot-gpio.h b/include/linux/mmc/slot-gpio.h
-index 7d88d27b..b0c73e4c 100644
---- a/include/linux/mmc/slot-gpio.h
-+++ b/include/linux/mmc/slot-gpio.h
-@@ -18,7 +18,8 @@ int mmc_gpio_request_ro(struct mmc_host *host, unsigned int gpio);
- void mmc_gpio_free_ro(struct mmc_host *host);
- 
- int mmc_gpio_get_cd(struct mmc_host *host);
--int mmc_gpio_request_cd(struct mmc_host *host, unsigned int gpio);
-+int mmc_gpio_request_cd(struct mmc_host *host, unsigned int gpio,
-+			unsigned int debounce);
- void mmc_gpio_free_cd(struct mmc_host *host);
- 
- #endif
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0053-ARM-shmobile-kzm9d-Enable-AUTO_ZRELADDR-in-defconfig.patch b/patches.renesas/0053-ARM-shmobile-kzm9d-Enable-AUTO_ZRELADDR-in-defconfig.patch
deleted file mode 100644
index 8a4c8604bdec5..0000000000000
--- a/patches.renesas/0053-ARM-shmobile-kzm9d-Enable-AUTO_ZRELADDR-in-defconfig.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From 2fae4feecea5a2dc694de19538ef3df6efc05e23 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Sat, 9 Nov 2013 08:47:45 +0900
-Subject: ARM: shmobile: kzm9d: Enable AUTO_ZRELADDR in defconfig
-
-This is required to allow the load address to be supplied
-as an environment variable when building a uImage.
-
-LOADADDR=0x40008000 ARCH=arm make uImage
-
-This is necessary since "ARM: shmobile: Remove legacy KZM9D board code"
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 577092b3d11530acd8467074f6ea7e2dd36b5028)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/configs/kzm9d_defconfig | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/arch/arm/configs/kzm9d_defconfig b/arch/arm/configs/kzm9d_defconfig
-index 6c37f4a98eb8..e6aed23ac083 100644
---- a/arch/arm/configs/kzm9d_defconfig
-+++ b/arch/arm/configs/kzm9d_defconfig
-@@ -32,6 +32,7 @@ CONFIG_FORCE_MAX_ZONEORDER=13
- CONFIG_ZBOOT_ROM_TEXT=0x0
- CONFIG_ZBOOT_ROM_BSS=0x0
- CONFIG_ARM_APPENDED_DTB=y
-+CONFIG_AUTO_ZRELADDR=y
- CONFIG_VFP=y
- # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
- CONFIG_PM_RUNTIME=y
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0053-DMA-shdma-switch-to-managed-resource-allocation.patch b/patches.renesas/0053-DMA-shdma-switch-to-managed-resource-allocation.patch
deleted file mode 100644
index 26aae9dd9567e..0000000000000
--- a/patches.renesas/0053-DMA-shdma-switch-to-managed-resource-allocation.patch
+++ /dev/null
@@ -1,215 +0,0 @@
-From 5d0330316bfbce0b6819e8842f6c965ad1053d9c Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Tue, 2 Jul 2013 17:45:55 +0200
-Subject: DMA: shdma: switch to managed resource allocation
-
-Switch shdma to using devm_* managed functions for allocation of memory,
-requesting IRQs, mapping IO resources etc.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Signed-off-by: Vinod Koul <vinod.koul@intel.com>
-(cherry picked from commit c1c63a14f4f2419d093acd7164eccdff315baa86)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/dma/sh/shdma-base.c | 11 ++------
- drivers/dma/sh/shdma.c      | 66 +++++++++------------------------------------
- drivers/dma/sh/sudmac.c     |  1 -
- include/linux/shdma-base.h  |  1 -
- 4 files changed, 15 insertions(+), 64 deletions(-)
-
-diff --git a/drivers/dma/sh/shdma-base.c b/drivers/dma/sh/shdma-base.c
-index 28ca36121631..c5ea256c2819 100644
---- a/drivers/dma/sh/shdma-base.c
-+++ b/drivers/dma/sh/shdma-base.c
-@@ -831,8 +831,8 @@ static irqreturn_t chan_irqt(int irq, void *dev)
- int shdma_request_irq(struct shdma_chan *schan, int irq,
- 			   unsigned long flags, const char *name)
- {
--	int ret = request_threaded_irq(irq, chan_irq, chan_irqt,
--				       flags, name, schan);
-+	int ret = devm_request_threaded_irq(schan->dev, irq, chan_irq,
-+					    chan_irqt, flags, name, schan);
- 
- 	schan->irq = ret < 0 ? ret : irq;
- 
-@@ -840,13 +840,6 @@ int shdma_request_irq(struct shdma_chan *schan, int irq,
- }
- EXPORT_SYMBOL(shdma_request_irq);
- 
--void shdma_free_irq(struct shdma_chan *schan)
--{
--	if (schan->irq >= 0)
--		free_irq(schan->irq, schan);
--}
--EXPORT_SYMBOL(shdma_free_irq);
--
- void shdma_chan_probe(struct shdma_dev *sdev,
- 			   struct shdma_chan *schan, int id)
- {
-diff --git a/drivers/dma/sh/shdma.c b/drivers/dma/sh/shdma.c
-index ba539d8cabee..4f24b9d2b5c3 100644
---- a/drivers/dma/sh/shdma.c
-+++ b/drivers/dma/sh/shdma.c
-@@ -515,7 +515,8 @@ static int sh_dmae_chan_probe(struct sh_dmae_device *shdev, int id,
- 	struct shdma_chan *schan;
- 	int err;
- 
--	sh_chan = kzalloc(sizeof(struct sh_dmae_chan), GFP_KERNEL);
-+	sh_chan = devm_kzalloc(sdev->dma_dev.dev, sizeof(struct sh_dmae_chan),
-+			       GFP_KERNEL);
- 	if (!sh_chan) {
- 		dev_err(sdev->dma_dev.dev,
- 			"No free memory for allocating dma channels!\n");
-@@ -551,7 +552,6 @@ static int sh_dmae_chan_probe(struct sh_dmae_device *shdev, int id,
- err_no_irq:
- 	/* remove from dmaengine device node */
- 	shdma_chan_remove(schan);
--	kfree(sh_chan);
- 	return err;
- }
- 
-@@ -562,14 +562,9 @@ static void sh_dmae_chan_remove(struct sh_dmae_device *shdev)
- 	int i;
- 
- 	shdma_for_each_chan(schan, &shdev->shdma_dev, i) {
--		struct sh_dmae_chan *sh_chan = container_of(schan,
--					struct sh_dmae_chan, shdma_chan);
- 		BUG_ON(!schan);
- 
--		shdma_free_irq(&sh_chan->shdma_chan);
--
- 		shdma_chan_remove(schan);
--		kfree(sh_chan);
- 	}
- 	dma_dev->chancnt = 0;
- }
-@@ -706,33 +701,22 @@ static int sh_dmae_probe(struct platform_device *pdev)
- 	if (!chan || !errirq_res)
- 		return -ENODEV;
- 
--	if (!request_mem_region(chan->start, resource_size(chan), pdev->name)) {
--		dev_err(&pdev->dev, "DMAC register region already claimed\n");
--		return -EBUSY;
--	}
--
--	if (dmars && !request_mem_region(dmars->start, resource_size(dmars), pdev->name)) {
--		dev_err(&pdev->dev, "DMAC DMARS region already claimed\n");
--		err = -EBUSY;
--		goto ermrdmars;
--	}
--
--	err = -ENOMEM;
--	shdev = kzalloc(sizeof(struct sh_dmae_device), GFP_KERNEL);
-+	shdev = devm_kzalloc(&pdev->dev, sizeof(struct sh_dmae_device),
-+			     GFP_KERNEL);
- 	if (!shdev) {
- 		dev_err(&pdev->dev, "Not enough memory\n");
--		goto ealloc;
-+		return -ENOMEM;
- 	}
- 
- 	dma_dev = &shdev->shdma_dev.dma_dev;
- 
--	shdev->chan_reg = ioremap(chan->start, resource_size(chan));
--	if (!shdev->chan_reg)
--		goto emapchan;
-+	shdev->chan_reg = devm_ioremap_resource(&pdev->dev, chan);
-+	if (IS_ERR(shdev->chan_reg))
-+		return PTR_ERR(shdev->chan_reg);
- 	if (dmars) {
--		shdev->dmars = ioremap(dmars->start, resource_size(dmars));
--		if (!shdev->dmars)
--			goto emapdmars;
-+		shdev->dmars = devm_ioremap_resource(&pdev->dev, dmars);
-+		if (IS_ERR(shdev->dmars))
-+			return PTR_ERR(shdev->dmars);
- 	}
- 
- 	if (!pdata->slave_only)
-@@ -793,8 +777,8 @@ static int sh_dmae_probe(struct platform_device *pdev)
- 
- 	errirq = errirq_res->start;
- 
--	err = request_irq(errirq, sh_dmae_err, irqflags,
--			  "DMAC Address Error", shdev);
-+	err = devm_request_irq(&pdev->dev, errirq, sh_dmae_err, irqflags,
-+			       "DMAC Address Error", shdev);
- 	if (err) {
- 		dev_err(&pdev->dev,
- 			"DMA failed requesting irq #%d, error %d\n",
-@@ -872,7 +856,6 @@ chan_probe_err:
- 	sh_dmae_chan_remove(shdev);
- 
- #if defined(CONFIG_CPU_SH4) || defined(CONFIG_ARCH_SHMOBILE)
--	free_irq(errirq, shdev);
- eirq_err:
- #endif
- rst_err:
-@@ -886,18 +869,7 @@ rst_err:
- 	platform_set_drvdata(pdev, NULL);
- 	shdma_cleanup(&shdev->shdma_dev);
- eshdma:
--	if (dmars)
--		iounmap(shdev->dmars);
--emapdmars:
--	iounmap(shdev->chan_reg);
- 	synchronize_rcu();
--emapchan:
--	kfree(shdev);
--ealloc:
--	if (dmars)
--		release_mem_region(dmars->start, resource_size(dmars));
--ermrdmars:
--	release_mem_region(chan->start, resource_size(chan));
- 
- 	return err;
- }
-@@ -923,21 +895,9 @@ static int sh_dmae_remove(struct platform_device *pdev)
- 	sh_dmae_chan_remove(shdev);
- 	shdma_cleanup(&shdev->shdma_dev);
- 
--	if (shdev->dmars)
--		iounmap(shdev->dmars);
--	iounmap(shdev->chan_reg);
--
- 	platform_set_drvdata(pdev, NULL);
- 
- 	synchronize_rcu();
--	kfree(shdev);
--
--	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
--	if (res)
--		release_mem_region(res->start, resource_size(res));
--	res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
--	if (res)
--		release_mem_region(res->start, resource_size(res));
- 
- 	return 0;
- }
-diff --git a/drivers/dma/sh/sudmac.c b/drivers/dma/sh/sudmac.c
-index e7c94bbddb53..347790167e59 100644
---- a/drivers/dma/sh/sudmac.c
-+++ b/drivers/dma/sh/sudmac.c
-@@ -302,7 +302,6 @@ static void sudmac_chan_remove(struct sudmac_device *su_dev)
- 
- 		BUG_ON(!schan);
- 
--		shdma_free_irq(&sc->shdma_chan);
- 		shdma_chan_remove(schan);
- 	}
- 	dma_dev->chancnt = 0;
-diff --git a/include/linux/shdma-base.h b/include/linux/shdma-base.h
-index 5b1c9848124c..31cf89fb1d5b 100644
---- a/include/linux/shdma-base.h
-+++ b/include/linux/shdma-base.h
-@@ -116,7 +116,6 @@ struct shdma_dev {
- 
- int shdma_request_irq(struct shdma_chan *, int,
- 			   unsigned long, const char *);
--void shdma_free_irq(struct shdma_chan *);
- bool shdma_reset(struct shdma_dev *sdev);
- void shdma_chan_probe(struct shdma_dev *sdev,
- 			   struct shdma_chan *schan, int id);
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0053-mmc-sh_mmcif-don-t-clear-masked-interrupts.patch b/patches.renesas/0053-mmc-sh_mmcif-don-t-clear-masked-interrupts.patch
deleted file mode 100644
index 1a80f3aa77758..0000000000000
--- a/patches.renesas/0053-mmc-sh_mmcif-don-t-clear-masked-interrupts.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-From 73a9361644d86ae17d6ad8957433f301336d88a3 Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Wed, 15 May 2013 07:50:51 +0200
-Subject: mmc: sh_mmcif: don't clear masked interrupts
-
-Masking events on MMCIF means that an occurrence of the masked event
-won't raise an interrupt, but the event bit will still be set in the
-interrupt status register. If simultaneously a different event occurs
-which was enabled, both flags will be set. However, only the unmasked
-event bit should be cleared in the status register in such a case.
-
-Clearing also the masked bit can lead to lost interrupts, which indeed
-can be observed on the armadillo800eva r8a7740 board with an eMMC chip.
-The problem has been introduced by the recent "mmc: sh_mmcif: simplify
-IRQ processing" patch. Fix the problem by only clearing enabled interrupts.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Tested-by: Nguyen Viet Dung <nv-dung@jinso.co.jp>
-Tested-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Chris Ball <cjb@laptop.org>
-(cherry picked from commit 19f1ba51c79f133aec3ce558b8292e3b081363f3)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/mmc/host/sh_mmcif.c | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/mmc/host/sh_mmcif.c b/drivers/mmc/host/sh_mmcif.c
-index a23f6c06..3ae1a1f8 100644
---- a/drivers/mmc/host/sh_mmcif.c
-+++ b/drivers/mmc/host/sh_mmcif.c
-@@ -1244,7 +1244,8 @@ static irqreturn_t sh_mmcif_intr(int irq, void *dev_id)
- 	u32 state;
- 
- 	state = sh_mmcif_readl(host->addr, MMCIF_CE_INT);
--	sh_mmcif_writel(host->addr, MMCIF_CE_INT, ~state);
-+	sh_mmcif_writel(host->addr, MMCIF_CE_INT,
-+			~(state & sh_mmcif_readl(host->addr, MMCIF_CE_INT_MASK)));
- 	sh_mmcif_bitclr(host, MMCIF_CE_INT_MASK, state & MASK_CLEAN);
- 
- 	if (state & ~MASK_CLEAN)
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0054-ARM-shmobile-ape6evm-don-t-use-named-resource-for-MM.patch b/patches.renesas/0054-ARM-shmobile-ape6evm-don-t-use-named-resource-for-MM.patch
deleted file mode 100644
index 4eedd232dfcc3..0000000000000
--- a/patches.renesas/0054-ARM-shmobile-ape6evm-don-t-use-named-resource-for-MM.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From d28cdfb53b1cb42280e2716e24fbde2768e6703b Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Mon, 7 Oct 2013 22:58:08 -0700
-Subject: ARM: shmobile: ape6evm: don't use named resource for MMCIF
-
-sh_mmcif driver doesn't care resource name.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Acked-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 61a4fd12d43426fa52fb05dbf21efa057b4a7e78)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-ape6evm.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/board-ape6evm.c b/arch/arm/mach-shmobile/board-ape6evm.c
-index 0fa068e30a30..94adf6199300 100644
---- a/arch/arm/mach-shmobile/board-ape6evm.c
-+++ b/arch/arm/mach-shmobile/board-ape6evm.c
-@@ -168,7 +168,7 @@ static const struct sh_mmcif_plat_data mmcif0_pdata __initconst = {
- };
- 
- static const struct resource mmcif0_resources[] __initconst = {
--	DEFINE_RES_MEM_NAMED(0xee200000, 0x100, "MMCIF0"),
-+	DEFINE_RES_MEM(0xee200000, 0x100),
- 	DEFINE_RES_IRQ(gic_spi(169)),
- };
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0054-DMA-shdma-make-a-pointer-const.patch b/patches.renesas/0054-DMA-shdma-make-a-pointer-const.patch
deleted file mode 100644
index 2cbee10ce1faf..0000000000000
--- a/patches.renesas/0054-DMA-shdma-make-a-pointer-const.patch
+++ /dev/null
@@ -1,85 +0,0 @@
-From 474f6b000e652c8c0b1aa49eed14c7b1cfaaefc9 Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Fri, 2 Aug 2013 16:18:09 +0200
-Subject: DMA: shdma: make a pointer const
-
-Platform data shouldn't be changed at run-time, so, pointers to it should
-be const.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Signed-off-by: Vinod Koul <vinod.koul@intel.com>
-(cherry picked from commit 2833c47e0ecc74b300716e56810143125ad7a3f1)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-	drivers/dma/sh/shdma.c
----
- drivers/dma/sh/shdma.c | 10 +++++-----
- drivers/dma/sh/shdma.h |  2 +-
- 2 files changed, 6 insertions(+), 6 deletions(-)
-
-diff --git a/drivers/dma/sh/shdma.c b/drivers/dma/sh/shdma.c
-index 4f24b9d2b5c3..19068a50ce77 100644
---- a/drivers/dma/sh/shdma.c
-+++ b/drivers/dma/sh/shdma.c
-@@ -177,7 +177,7 @@ static bool dmae_is_busy(struct sh_dmae_chan *sh_chan)
- static unsigned int calc_xmit_shift(struct sh_dmae_chan *sh_chan, u32 chcr)
- {
- 	struct sh_dmae_device *shdev = to_sh_dev(sh_chan);
--	struct sh_dmae_pdata *pdata = shdev->pdata;
-+	const struct sh_dmae_pdata *pdata = shdev->pdata;
- 	int cnt = ((chcr & pdata->ts_low_mask) >> pdata->ts_low_shift) |
- 		((chcr & pdata->ts_high_mask) >> pdata->ts_high_shift);
- 
-@@ -190,7 +190,7 @@ static unsigned int calc_xmit_shift(struct sh_dmae_chan *sh_chan, u32 chcr)
- static u32 log2size_to_chcr(struct sh_dmae_chan *sh_chan, int l2size)
- {
- 	struct sh_dmae_device *shdev = to_sh_dev(sh_chan);
--	struct sh_dmae_pdata *pdata = shdev->pdata;
-+	const struct sh_dmae_pdata *pdata = shdev->pdata;
- 	int i;
- 
- 	for (i = 0; i < pdata->ts_shift_num; i++)
-@@ -250,7 +250,7 @@ static int dmae_set_chcr(struct sh_dmae_chan *sh_chan, u32 val)
- static int dmae_set_dmars(struct sh_dmae_chan *sh_chan, u16 val)
- {
- 	struct sh_dmae_device *shdev = to_sh_dev(sh_chan);
--	struct sh_dmae_pdata *pdata = shdev->pdata;
-+	const struct sh_dmae_pdata *pdata = shdev->pdata;
- 	const struct sh_dmae_channel *chan_pdata = &pdata->channel[sh_chan->shdma_chan.id];
- 	void __iomem *addr = shdev->dmars;
- 	unsigned int shift = chan_pdata->dmars_bit;
-@@ -319,7 +319,7 @@ static const struct sh_dmae_slave_config *dmae_find_slave(
- 	struct sh_dmae_chan *sh_chan, int match)
- {
- 	struct sh_dmae_device *shdev = to_sh_dev(sh_chan);
--	struct sh_dmae_pdata *pdata = shdev->pdata;
-+	const struct sh_dmae_pdata *pdata = shdev->pdata;
- 	const struct sh_dmae_slave_config *cfg;
- 	int i;
- 
-@@ -665,7 +665,7 @@ static const struct shdma_ops sh_dmae_shdma_ops = {
- 
- static int sh_dmae_probe(struct platform_device *pdev)
- {
--	struct sh_dmae_pdata *pdata = dev_get_platdata(&pdev->dev);
-+	const struct sh_dmae_pdata *pdata = dev_get_platdata(&pdev->dev);
- 	unsigned long irqflags = IRQF_DISABLED,
- 		chan_flag[SH_DMAE_MAX_CHANNELS] = {};
- 	int errirq, chan_irq[SH_DMAE_MAX_CHANNELS];
-diff --git a/drivers/dma/sh/shdma.h b/drivers/dma/sh/shdma.h
-index 06aae6ebc82b..3d9dca177860 100644
---- a/drivers/dma/sh/shdma.h
-+++ b/drivers/dma/sh/shdma.h
-@@ -36,7 +36,7 @@ struct sh_dmae_chan {
- struct sh_dmae_device {
- 	struct shdma_dev shdma_dev;
- 	struct sh_dmae_chan *chan[SH_DMAE_MAX_CHANNELS];
--	struct sh_dmae_pdata *pdata;
-+	const struct sh_dmae_pdata *pdata;
- 	struct list_head node;
- 	void __iomem *chan_reg;
- 	void __iomem *dmars;
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0054-mmc-sh_mmcif-handle-mmc_of_parse-errors-during-probe.patch b/patches.renesas/0054-mmc-sh_mmcif-handle-mmc_of_parse-errors-during-probe.patch
deleted file mode 100644
index 65ed910f5a1d8..0000000000000
--- a/patches.renesas/0054-mmc-sh_mmcif-handle-mmc_of_parse-errors-during-probe.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From 6a3b2f7e0e60638bf9d1f8816711fcdfed038912 Mon Sep 17 00:00:00 2001
-From: Simon Baatz <gmbnomis@gmail.com>
-Date: Sun, 9 Jun 2013 22:14:12 +0200
-Subject: mmc: sh_mmcif: handle mmc_of_parse() errors during probe
-
-Signed-off-by: Simon Baatz <gmbnomis@gmail.com>
-Acked-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Signed-off-by: Chris Ball <cjb@laptop.org>
-(cherry picked from commit 2c9054dc102742e1683b5d879f7472fb712b7324)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/mmc/host/sh_mmcif.c | 7 ++++++-
- 1 file changed, 6 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/mmc/host/sh_mmcif.c b/drivers/mmc/host/sh_mmcif.c
-index 3ae1a1f8..6f9834fd 100644
---- a/drivers/mmc/host/sh_mmcif.c
-+++ b/drivers/mmc/host/sh_mmcif.c
-@@ -1370,7 +1370,11 @@ static int sh_mmcif_probe(struct platform_device *pdev)
- 		ret = -ENOMEM;
- 		goto ealloch;
- 	}
--	mmc_of_parse(mmc);
-+
-+	ret = mmc_of_parse(mmc);
-+	if (ret < 0)
-+		goto eofparse;
-+
- 	host		= mmc_priv(mmc);
- 	host->mmc	= mmc;
- 	host->addr	= reg;
-@@ -1465,6 +1469,7 @@ eclkupdate:
- 	clk_put(host->hclk);
- eclkget:
- 	pm_runtime_disable(&pdev->dev);
-+eofparse:
- 	mmc_free_host(mmc);
- ealloch:
- 	iounmap(reg);
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0055-ARM-shmobile-ape6evm-don-t-use-named-resource-for-SD.patch b/patches.renesas/0055-ARM-shmobile-ape6evm-don-t-use-named-resource-for-SD.patch
deleted file mode 100644
index 11489147a2cdf..0000000000000
--- a/patches.renesas/0055-ARM-shmobile-ape6evm-don-t-use-named-resource-for-SD.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From 4015ede46452d9d8e73fdb6868a6d6c8598c7223 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Mon, 7 Oct 2013 22:58:20 -0700
-Subject: ARM: shmobile: ape6evm: don't use named resource for SDHI
-
-sh_mobile_sdhi driver doesn't care resource name.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Acked-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit e33e6968ccffc50e788a7a98613985410262332f)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-ape6evm.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-ape6evm.c b/arch/arm/mach-shmobile/board-ape6evm.c
-index 94adf6199300..fe071a9130b7 100644
---- a/arch/arm/mach-shmobile/board-ape6evm.c
-+++ b/arch/arm/mach-shmobile/board-ape6evm.c
-@@ -179,7 +179,7 @@ static const struct sh_mobile_sdhi_info sdhi0_pdata __initconst = {
- };
- 
- static const struct resource sdhi0_resources[] __initconst = {
--	DEFINE_RES_MEM_NAMED(0xee100000, 0x100, "SDHI0"),
-+	DEFINE_RES_MEM(0xee100000, 0x100),
- 	DEFINE_RES_IRQ(gic_spi(165)),
- };
- 
-@@ -191,7 +191,7 @@ static const struct sh_mobile_sdhi_info sdhi1_pdata __initconst = {
- };
- 
- static const struct resource sdhi1_resources[] __initconst = {
--	DEFINE_RES_MEM_NAMED(0xee120000, 0x100, "SDHI1"),
-+	DEFINE_RES_MEM(0xee120000, 0x100),
- 	DEFINE_RES_IRQ(gic_spi(166)),
- };
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0055-DMA-shdma-switch-DT-mode-to-use-configuration-data-f.patch b/patches.renesas/0055-DMA-shdma-switch-DT-mode-to-use-configuration-data-f.patch
deleted file mode 100644
index 601e816ff3fe8..0000000000000
--- a/patches.renesas/0055-DMA-shdma-switch-DT-mode-to-use-configuration-data-f.patch
+++ /dev/null
@@ -1,336 +0,0 @@
-From 49f1a1569b4104c5786fdd90278c61b208364139 Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Fri, 2 Aug 2013 16:50:36 +0200
-Subject: DMA: shdma: switch DT mode to use configuration data from a match
- table
-
-This facilitates DMAC DT support by eliminating the need in AUXDATA and
-avoiding creating complex DT data. This also fits well with DMAC devices,
-of which SoCs often have multiple identical copies and it is perfectly
-valid to use a single configuration data set for all of them.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Signed-off-by: Vinod Koul <vinod.koul@intel.com>
-(cherry picked from commit 4981c4dc194efb18f0e9a02f1b43e926f2f0d2bb)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-	drivers/dma/sh/shdmac.c
----
- Documentation/devicetree/bindings/dma/shdma.txt | 61 ++++++++++++++-----------
- drivers/dma/sh/Makefile                         |  2 +
- drivers/dma/sh/shdma-base.c                     | 15 +++---
- drivers/dma/sh/shdma-of.c                       |  3 --
- drivers/dma/sh/shdma.h                          |  1 +
- drivers/dma/sh/{shdma.c => shdmac.c}            | 30 +++++++-----
- drivers/dma/sh/sudmac.c                         |  3 +-
- include/linux/shdma-base.h                      |  2 +-
- 8 files changed, 69 insertions(+), 48 deletions(-)
- rename drivers/dma/sh/{shdma.c => shdmac.c} (98%)
-
-diff --git a/Documentation/devicetree/bindings/dma/shdma.txt b/Documentation/devicetree/bindings/dma/shdma.txt
-index c15994aa1939..2a3f3b8946b9 100644
---- a/Documentation/devicetree/bindings/dma/shdma.txt
-+++ b/Documentation/devicetree/bindings/dma/shdma.txt
-@@ -22,42 +22,51 @@ Optional properties (currently unused):
- * DMA controller
- 
- Required properties:
--- compatible:	should be "renesas,shdma"
-+- compatible:	should be of the form "renesas,shdma-<soc>", where <soc> should
-+		be replaced with the desired SoC model, e.g.
-+		"renesas,shdma-r8a73a4" for the system DMAC on r8a73a4 SoC
- 
- Example:
--	dmac: dma-mux0 {
-+	dmac: dma-multiplexer@0 {
- 		compatible = "renesas,shdma-mux";
- 		#dma-cells = <1>;
--		dma-channels = <6>;
-+		dma-channels = <20>;
- 		dma-requests = <256>;
--		reg = <0 0>;	/* Needed for AUXDATA */
--		#address-cells = <1>;
--		#size-cells = <1>;
-+		#address-cells = <2>;
-+		#size-cells = <2>;
- 		ranges;
- 
--		dma0: shdma@fe008020 {
--			compatible = "renesas,shdma";
--			reg = <0xfe008020 0x270>,
--				<0xfe009000 0xc>;
-+		dma0: dma-controller@e6700020 {
-+			compatible = "renesas,shdma-r8a73a4";
-+			reg = <0 0xe6700020 0 0x89e0>;
- 			interrupt-parent = <&gic>;
--			interrupts = <0 34 4
--					0 28 4
--					0 29 4
--					0 30 4
--					0 31 4
--					0 32 4
--					0 33 4>;
-+			interrupts = <0 220 4
-+					0 200 4
-+					0 201 4
-+					0 202 4
-+					0 203 4
-+					0 204 4
-+					0 205 4
-+					0 206 4
-+					0 207 4
-+					0 208 4
-+					0 209 4
-+					0 210 4
-+					0 211 4
-+					0 212 4
-+					0 213 4
-+					0 214 4
-+					0 215 4
-+					0 216 4
-+					0 217 4
-+					0 218 4
-+					0 219 4>;
- 			interrupt-names = "error",
- 					"ch0", "ch1", "ch2", "ch3",
--					"ch4", "ch5";
--		};
--
--		dma1: shdma@fe018020 {
--			...
--		};
--
--		dma2: shdma@fe028020 {
--			...
-+					"ch4", "ch5", "ch6", "ch7",
-+					"ch8", "ch9", "ch10", "ch11",
-+					"ch12", "ch13", "ch14", "ch15",
-+					"ch16", "ch17", "ch18", "ch19";
- 		};
- 	};
- 
-diff --git a/drivers/dma/sh/Makefile b/drivers/dma/sh/Makefile
-index ccf17cb5af10..9187cc98fbe4 100644
---- a/drivers/dma/sh/Makefile
-+++ b/drivers/dma/sh/Makefile
-@@ -1,4 +1,6 @@
- obj-$(CONFIG_SH_DMAE_BASE) += shdma-base.o shdma-of.o
- obj-$(CONFIG_SH_DMAE) += shdma.o
-+shdma-y := shdmac.o
-+shdma-objs := $(shdma-y)
- obj-$(CONFIG_SUDMAC) += sudmac.o
- obj-$(CONFIG_RCAR_HPB_DMAE) += rcar-hpbdma.o
-diff --git a/drivers/dma/sh/shdma-base.c b/drivers/dma/sh/shdma-base.c
-index c5ea256c2819..d94ab592cc1b 100644
---- a/drivers/dma/sh/shdma-base.c
-+++ b/drivers/dma/sh/shdma-base.c
-@@ -171,7 +171,8 @@ static struct shdma_desc *shdma_get_desc(struct shdma_chan *schan)
- 	return NULL;
- }
- 
--static int shdma_setup_slave(struct shdma_chan *schan, int slave_id)
-+static int shdma_setup_slave(struct shdma_chan *schan, int slave_id,
-+			     dma_addr_t slave_addr)
- {
- 	struct shdma_dev *sdev = to_shdma_dev(schan->dma_chan.device);
- 	const struct shdma_ops *ops = sdev->ops;
-@@ -179,7 +180,7 @@ static int shdma_setup_slave(struct shdma_chan *schan, int slave_id)
- 
- 	if (schan->dev->of_node) {
- 		match = schan->hw_req;
--		ret = ops->set_slave(schan, match, true);
-+		ret = ops->set_slave(schan, match, slave_addr, true);
- 		if (ret < 0)
- 			return ret;
- 
-@@ -194,7 +195,7 @@ static int shdma_setup_slave(struct shdma_chan *schan, int slave_id)
- 	if (test_and_set_bit(slave_id, shdma_slave_used))
- 		return -EBUSY;
- 
--	ret = ops->set_slave(schan, match, false);
-+	ret = ops->set_slave(schan, match, slave_addr, false);
- 	if (ret < 0) {
- 		clear_bit(slave_id, shdma_slave_used);
- 		return ret;
-@@ -236,7 +237,7 @@ bool shdma_chan_filter(struct dma_chan *chan, void *arg)
- 	if (!schan->dev->of_node && match >= slave_num)
- 		return false;
- 
--	ret = ops->set_slave(schan, match, true);
-+	ret = ops->set_slave(schan, match, 0, true);
- 	if (ret < 0)
- 		return false;
- 
-@@ -259,7 +260,7 @@ static int shdma_alloc_chan_resources(struct dma_chan *chan)
- 	 */
- 	if (slave) {
- 		/* Legacy mode: .private is set in filter */
--		ret = shdma_setup_slave(schan, slave->slave_id);
-+		ret = shdma_setup_slave(schan, slave->slave_id, 0);
- 		if (ret < 0)
- 			goto esetslave;
- 	} else {
-@@ -680,7 +681,9 @@ static int shdma_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
- 		 * channel, while using it...
- 		 */
- 		config = (struct dma_slave_config *)arg;
--		ret = shdma_setup_slave(schan, config->slave_id);
-+		ret = shdma_setup_slave(schan, config->slave_id,
-+					config->direction == DMA_DEV_TO_MEM ?
-+					config->src_addr : config->dst_addr);
- 		if (ret < 0)
- 			return ret;
- 		break;
-diff --git a/drivers/dma/sh/shdma-of.c b/drivers/dma/sh/shdma-of.c
-index 966aaab0b4d3..06473a05fe4e 100644
---- a/drivers/dma/sh/shdma-of.c
-+++ b/drivers/dma/sh/shdma-of.c
-@@ -45,9 +45,6 @@ static int shdma_of_probe(struct platform_device *pdev)
- 	const struct of_dev_auxdata *lookup = dev_get_platdata(&pdev->dev);
- 	int ret;
- 
--	if (!lookup)
--		return -EINVAL;
--
- 	ret = of_dma_controller_register(pdev->dev.of_node,
- 					 shdma_of_xlate, pdev);
- 	if (ret < 0)
-diff --git a/drivers/dma/sh/shdma.h b/drivers/dma/sh/shdma.h
-index 3d9dca177860..ff2f93b612ca 100644
---- a/drivers/dma/sh/shdma.h
-+++ b/drivers/dma/sh/shdma.h
-@@ -31,6 +31,7 @@ struct sh_dmae_chan {
- 	void __iomem *base;
- 	char dev_id[16];		/* unique name per DMAC of channel */
- 	int pm_error;
-+	dma_addr_t slave_addr;
- };
- 
- struct sh_dmae_device {
-diff --git a/drivers/dma/sh/shdma.c b/drivers/dma/sh/shdmac.c
-similarity index 98%
-rename from drivers/dma/sh/shdma.c
-rename to drivers/dma/sh/shdmac.c
-index 19068a50ce77..a47b70879e05 100644
---- a/drivers/dma/sh/shdma.c
-+++ b/drivers/dma/sh/shdmac.c
-@@ -20,6 +20,8 @@
- 
- #include <linux/init.h>
- #include <linux/module.h>
-+#include <linux/of.h>
-+#include <linux/of_device.h>
- #include <linux/slab.h>
- #include <linux/interrupt.h>
- #include <linux/dmaengine.h>
-@@ -333,7 +335,7 @@ static const struct sh_dmae_slave_config *dmae_find_slave(
- 	} else {
- 		for (i = 0, cfg = pdata->slave; i < pdata->slave_num; i++, cfg++)
- 			if (cfg->mid_rid == match) {
--				sh_chan->shdma_chan.slave_id = cfg->slave_id;
-+				sh_chan->shdma_chan.slave_id = i;
- 				return cfg;
- 			}
- 	}
-@@ -342,7 +344,7 @@ static const struct sh_dmae_slave_config *dmae_find_slave(
- }
- 
- static int sh_dmae_set_slave(struct shdma_chan *schan,
--			     int slave_id, bool try)
-+			     int slave_id, dma_addr_t slave_addr, bool try)
- {
- 	struct sh_dmae_chan *sh_chan = container_of(schan, struct sh_dmae_chan,
- 						    shdma_chan);
-@@ -350,8 +352,10 @@ static int sh_dmae_set_slave(struct shdma_chan *schan,
- 	if (!cfg)
- 		return -ENXIO;
- 
--	if (!try)
-+	if (!try) {
- 		sh_chan->config = cfg;
-+		sh_chan->slave_addr = slave_addr ? : cfg->addr;
-+	}
- 
- 	return 0;
- }
-@@ -641,7 +645,7 @@ static dma_addr_t sh_dmae_slave_addr(struct shdma_chan *schan)
- 	 * This is an exclusive slave DMA operation, may only be called after a
- 	 * successful slave configuration.
- 	 */
--	return sh_chan->config->addr;
-+	return sh_chan->slave_addr;
- }
- 
- static struct shdma_desc *sh_dmae_embedded_desc(void *buf, int i)
-@@ -663,9 +667,14 @@ static const struct shdma_ops sh_dmae_shdma_ops = {
- 	.get_partial = sh_dmae_get_partial,
- };
- 
-+static const struct of_device_id sh_dmae_of_match[] = {
-+	{}
-+};
-+MODULE_DEVICE_TABLE(of, sh_dmae_of_match);
-+
- static int sh_dmae_probe(struct platform_device *pdev)
- {
--	const struct sh_dmae_pdata *pdata = dev_get_platdata(&pdev->dev);
-+	const struct sh_dmae_pdata *pdata;
- 	unsigned long irqflags = IRQF_DISABLED,
- 		chan_flag[SH_DMAE_MAX_CHANNELS] = {};
- 	int errirq, chan_irq[SH_DMAE_MAX_CHANNELS];
-@@ -674,6 +683,11 @@ static int sh_dmae_probe(struct platform_device *pdev)
- 	struct dma_device *dma_dev;
- 	struct resource *chan, *dmars, *errirq_res, *chanirq_res;
- 
-+	if (pdev->dev.of_node)
-+		pdata = of_match_device(sh_dmae_of_match, &pdev->dev)->data;
-+	else
-+		pdata = pdev->dev.platform_data;
-+
- 	/* get platform data */
- 	if (!pdata || !pdata->channel_num)
- 		return -ENODEV;
-@@ -902,12 +916,6 @@ static int sh_dmae_remove(struct platform_device *pdev)
- 	return 0;
- }
- 
--static const struct of_device_id sh_dmae_of_match[] = {
--	{ .compatible = "renesas,shdma", },
--	{ }
--};
--MODULE_DEVICE_TABLE(of, sh_dmae_of_match);
--
- static struct platform_driver sh_dmae_driver = {
- 	.driver 	= {
- 		.owner	= THIS_MODULE,
-diff --git a/drivers/dma/sh/sudmac.c b/drivers/dma/sh/sudmac.c
-index 347790167e59..2a8e3c2ac4b3 100644
---- a/drivers/dma/sh/sudmac.c
-+++ b/drivers/dma/sh/sudmac.c
-@@ -150,7 +150,8 @@ static const struct sudmac_slave_config *sudmac_find_slave(
- 	return NULL;
- }
- 
--static int sudmac_set_slave(struct shdma_chan *schan, int slave_id, bool try)
-+static int sudmac_set_slave(struct shdma_chan *schan, int slave_id,
-+			    dma_addr_t slave_addr, bool try)
- {
- 	struct sudmac_chan *sc = to_chan(schan);
- 	const struct sudmac_slave_config *cfg = sudmac_find_slave(sc, slave_id);
-diff --git a/include/linux/shdma-base.h b/include/linux/shdma-base.h
-index 31cf89fb1d5b..f92c0a43c54c 100644
---- a/include/linux/shdma-base.h
-+++ b/include/linux/shdma-base.h
-@@ -96,7 +96,7 @@ struct shdma_ops {
- 	dma_addr_t (*slave_addr)(struct shdma_chan *);
- 	int (*desc_setup)(struct shdma_chan *, struct shdma_desc *,
- 			  dma_addr_t, dma_addr_t, size_t *);
--	int (*set_slave)(struct shdma_chan *, int, bool);
-+	int (*set_slave)(struct shdma_chan *, int, dma_addr_t, bool);
- 	void (*setup_xfer)(struct shdma_chan *, int);
- 	void (*start_xfer)(struct shdma_chan *, struct shdma_desc *);
- 	struct shdma_desc *(*embedded_desc)(void *, int);
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0055-mmc-sh_mmcif-Remove-.down_pwr-callback-from-platform.patch b/patches.renesas/0055-mmc-sh_mmcif-Remove-.down_pwr-callback-from-platform.patch
deleted file mode 100644
index b769313cb7ef0..0000000000000
--- a/patches.renesas/0055-mmc-sh_mmcif-Remove-.down_pwr-callback-from-platform.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From ccf38069b7e0b57169ac6c2aeece1403ed9538ec Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 8 Aug 2013 12:38:39 +0200
-Subject: mmc: sh_mmcif: Remove .down_pwr() callback from platform data
-
-The callback isn't used by the driver and isn't initialized by board
-code. Remove it.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Signed-off-by: Chris Ball <cjb@laptop.org>
-(cherry picked from commit dcbfaf36c1933d88565501ff13feb0f4b2d38735)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- include/linux/mmc/sh_mmcif.h | 1 -
- 1 file changed, 1 deletion(-)
-
-diff --git a/include/linux/mmc/sh_mmcif.h b/include/linux/mmc/sh_mmcif.h
-index e7d5dd67..39011eb4 100644
---- a/include/linux/mmc/sh_mmcif.h
-+++ b/include/linux/mmc/sh_mmcif.h
-@@ -34,7 +34,6 @@
- 
- struct sh_mmcif_plat_data {
- 	void (*set_pwr)(struct platform_device *pdev, int state);
--	void (*down_pwr)(struct platform_device *pdev);
- 	int (*get_cd)(struct platform_device *pdef);
- 	unsigned int		slave_id_tx;	/* embedded slave_id_[tr]x */
- 	unsigned int		slave_id_rx;
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0056-ARM-shmobile-lager-don-t-use-named-resource-for-MMCI.patch b/patches.renesas/0056-ARM-shmobile-lager-don-t-use-named-resource-for-MMCI.patch
deleted file mode 100644
index b0b556a0948fa..0000000000000
--- a/patches.renesas/0056-ARM-shmobile-lager-don-t-use-named-resource-for-MMCI.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From 0cec77374e2c36801b72d9dc06a4c838eb622c98 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Mon, 7 Oct 2013 22:58:30 -0700
-Subject: ARM: shmobile: lager: don't use named resource for MMCIF
-
-sh_mmcif driver doesn't care resource name.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Acked-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit b7b42df6c9400ae09453f894b06d9e7719058948)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-lager.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
-index d83ed6556f7d..475a9a7b70e2 100644
---- a/arch/arm/mach-shmobile/board-lager.c
-+++ b/arch/arm/mach-shmobile/board-lager.c
-@@ -148,7 +148,7 @@ static const struct sh_mmcif_plat_data mmcif1_pdata __initconst = {
- };
- 
- static const struct resource mmcif1_resources[] __initconst = {
--	DEFINE_RES_MEM_NAMED(0xee220000, 0x80, "MMCIF1"),
-+	DEFINE_RES_MEM(0xee220000, 0x80),
- 	DEFINE_RES_IRQ(gic_spi(170)),
- };
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0056-DMA-shdma-remove-private-and-unused-defines-from-a-g.patch b/patches.renesas/0056-DMA-shdma-remove-private-and-unused-defines-from-a-g.patch
deleted file mode 100644
index 8d8f57f129985..0000000000000
--- a/patches.renesas/0056-DMA-shdma-remove-private-and-unused-defines-from-a-g.patch
+++ /dev/null
@@ -1,86 +0,0 @@
-From cf2789b3dc494b9202172c16e36a6e7a02712b90 Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Fri, 2 Aug 2013 16:50:37 +0200
-Subject: DMA: shdma: remove private and unused defines from a global header
-
-Macros, named like TEND or SAR lack a namespace and are too broadly named
-for a global header. Besides, they aren't needed globally. Move them to
-where they belong - into the driver. Some other macros aren't used at all,
-remove them.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Signed-off-by: Vinod Koul <vinod.koul@intel.com>
-(cherry picked from commit 4620ad5419612fcd9ab412410440d3a7e8a9a90a)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/dma/sh/shdmac.c |  9 +++++++++
- include/linux/sh_dma.h  | 21 ---------------------
- 2 files changed, 9 insertions(+), 21 deletions(-)
-
-diff --git a/drivers/dma/sh/shdmac.c b/drivers/dma/sh/shdmac.c
-index a47b70879e05..03efd4ad0f0b 100644
---- a/drivers/dma/sh/shdmac.c
-+++ b/drivers/dma/sh/shdmac.c
-@@ -37,6 +37,15 @@
- #include "../dmaengine.h"
- #include "shdma.h"
- 
-+/* DMA register */
-+#define SAR	0x00
-+#define DAR	0x04
-+#define TCR	0x08
-+#define CHCR	0x0C
-+#define DMAOR	0x40
-+
-+#define TEND	0x18 /* USB-DMAC */
-+
- #define SH_DMAE_DRV_NAME "sh-dma-engine"
- 
- /* Default MEMCPY transfer size = 2^2 = 4 bytes */
-diff --git a/include/linux/sh_dma.h b/include/linux/sh_dma.h
-index 776ed9d682f4..b7b43b82231e 100644
---- a/include/linux/sh_dma.h
-+++ b/include/linux/sh_dma.h
-@@ -94,39 +94,18 @@ struct sh_dmae_pdata {
- 	unsigned int slave_only:1;
- };
- 
--/* DMA register */
--#define SAR	0x00
--#define DAR	0x04
--#define TCR	0x08
--#define CHCR	0x0C
--#define DMAOR	0x40
--
--#define TEND	0x18 /* USB-DMAC */
--
- /* DMAOR definitions */
- #define DMAOR_AE	0x00000004
- #define DMAOR_NMIF	0x00000002
- #define DMAOR_DME	0x00000001
- 
- /* Definitions for the SuperH DMAC */
--#define REQ_L	0x00000000
--#define REQ_E	0x00080000
--#define RACK_H	0x00000000
--#define RACK_L	0x00040000
--#define ACK_R	0x00000000
--#define ACK_W	0x00020000
--#define ACK_H	0x00000000
--#define ACK_L	0x00010000
- #define DM_INC	0x00004000
- #define DM_DEC	0x00008000
- #define DM_FIX	0x0000c000
- #define SM_INC	0x00001000
- #define SM_DEC	0x00002000
- #define SM_FIX	0x00003000
--#define RS_IN	0x00000200
--#define RS_OUT	0x00000300
--#define TS_BLK	0x00000040
--#define TM_BUR	0x00000020
- #define CHCR_DE	0x00000001
- #define CHCR_TE	0x00000002
- #define CHCR_IE	0x00000004
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0056-mmc-sh_mmcif-Remove-.set_pwr-callback-from-platform-.patch b/patches.renesas/0056-mmc-sh_mmcif-Remove-.set_pwr-callback-from-platform-.patch
deleted file mode 100644
index e70877357e039..0000000000000
--- a/patches.renesas/0056-mmc-sh_mmcif-Remove-.set_pwr-callback-from-platform-.patch
+++ /dev/null
@@ -1,49 +0,0 @@
-From 79102b5faa1725f10b51df9a107ec572b1d04b09 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 8 Aug 2013 12:38:40 +0200
-Subject: mmc: sh_mmcif: Remove .set_pwr() callback from platform data
-
-The .set_pwr() callback isn't used anymore as all platforms register
-GPIO-controlled regulators. Remove it.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Signed-off-by: Chris Ball <cjb@laptop.org>
-(cherry picked from commit 83a0c7797e96e103bb3b6fcf8afb7b65dc7fc68e)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/mmc/host/sh_mmcif.c  | 3 ---
- include/linux/mmc/sh_mmcif.h | 1 -
- 2 files changed, 4 deletions(-)
-
-diff --git a/drivers/mmc/host/sh_mmcif.c b/drivers/mmc/host/sh_mmcif.c
-index 6f9834fd..a973d785 100644
---- a/drivers/mmc/host/sh_mmcif.c
-+++ b/drivers/mmc/host/sh_mmcif.c
-@@ -956,11 +956,8 @@ static int sh_mmcif_clk_update(struct sh_mmcif_host *host)
- 
- static void sh_mmcif_set_power(struct sh_mmcif_host *host, struct mmc_ios *ios)
- {
--	struct sh_mmcif_plat_data *pd = host->pd->dev.platform_data;
- 	struct mmc_host *mmc = host->mmc;
- 
--	if (pd && pd->set_pwr)
--		pd->set_pwr(host->pd, ios->power_mode != MMC_POWER_OFF);
- 	if (!IS_ERR(mmc->supply.vmmc))
- 		/* Errors ignored... */
- 		mmc_regulator_set_ocr(mmc, mmc->supply.vmmc,
-diff --git a/include/linux/mmc/sh_mmcif.h b/include/linux/mmc/sh_mmcif.h
-index 39011eb4..767fac5a 100644
---- a/include/linux/mmc/sh_mmcif.h
-+++ b/include/linux/mmc/sh_mmcif.h
-@@ -33,7 +33,6 @@
-  */
- 
- struct sh_mmcif_plat_data {
--	void (*set_pwr)(struct platform_device *pdev, int state);
- 	int (*get_cd)(struct platform_device *pdef);
- 	unsigned int		slave_id_tx;	/* embedded slave_id_[tr]x */
- 	unsigned int		slave_id_rx;
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0057-ARM-shmobile-sh73a0-don-t-use-named-resource-for-TMU.patch b/patches.renesas/0057-ARM-shmobile-sh73a0-don-t-use-named-resource-for-TMU.patch
deleted file mode 100644
index 9b36abdc0d632..0000000000000
--- a/patches.renesas/0057-ARM-shmobile-sh73a0-don-t-use-named-resource-for-TMU.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From 75dc6dee446f36a722f5c5121361cc9d80c2a109 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Mon, 7 Oct 2013 22:58:42 -0700
-Subject: ARM: shmobile: sh73a0: don't use named resource for TMU
-
-sh_tmu driver doesn't care resource name.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Acked-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit bd6dfe584097e38272705fe00d2892d272b54bce)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-sh73a0.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c
-index 22de17417fd7..b7ce68e029a5 100644
---- a/arch/arm/mach-shmobile/setup-sh73a0.c
-+++ b/arch/arm/mach-shmobile/setup-sh73a0.c
-@@ -273,7 +273,7 @@ static struct sh_timer_config tmu00_platform_data = {
- };
- 
- static struct resource tmu00_resources[] = {
--	[0] = DEFINE_RES_MEM_NAMED(0xfff60008, 0xc, "TMU00"),
-+	[0] = DEFINE_RES_MEM(0xfff60008, 0xc),
- 	[1] = {
- 		.start	= intcs_evt2irq(0x0e80), /* TMU0_TUNI00 */
- 		.flags	= IORESOURCE_IRQ,
-@@ -298,7 +298,7 @@ static struct sh_timer_config tmu01_platform_data = {
- };
- 
- static struct resource tmu01_resources[] = {
--	[0] = DEFINE_RES_MEM_NAMED(0xfff60014, 0xc, "TMU00"),
-+	[0] = DEFINE_RES_MEM(0xfff60014, 0xc),
- 	[1] = {
- 		.start	= intcs_evt2irq(0x0ea0), /* TMU0_TUNI01 */
- 		.flags	= IORESOURCE_IRQ,
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0057-DMA-shdma-add-a-header-with-common-for-ARM-SoCs-defi.patch b/patches.renesas/0057-DMA-shdma-add-a-header-with-common-for-ARM-SoCs-defi.patch
deleted file mode 100644
index 150b02d0e0ed1..0000000000000
--- a/patches.renesas/0057-DMA-shdma-add-a-header-with-common-for-ARM-SoCs-defi.patch
+++ /dev/null
@@ -1,81 +0,0 @@
-From addb5ef290ff3b57b4c1fe3fd348bfe29bf0623f Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Fri, 2 Aug 2013 16:50:38 +0200
-Subject: DMA: shdma: add a header with common for ARM SoCs defines
-
-All shdma DMACs on ARM SoCs share certain register layout patterns, which
-are currently defined in arch/arm/mach-shmobile/include/mach/dma-register.h.
-That header is included by SoC-specific setup-*.c files to be used in DMAC
-platform data. That header, however, cannot be directly used by the driver.
-This patch copies those defines into a driver-local header to be used by
-Device Tree configurations.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Signed-off-by: Vinod Koul <vinod.koul@intel.com>
-(cherry picked from commit 8eb742a0914cd79053d092a14bfac5315993dd61)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/dma/sh/shdma-arm.h | 51 ++++++++++++++++++++++++++++++++++++++++++++++
- 1 file changed, 51 insertions(+)
- create mode 100644 drivers/dma/sh/shdma-arm.h
-
-diff --git a/drivers/dma/sh/shdma-arm.h b/drivers/dma/sh/shdma-arm.h
-new file mode 100644
-index 000000000000..a2b8258426c9
---- /dev/null
-+++ b/drivers/dma/sh/shdma-arm.h
-@@ -0,0 +1,51 @@
-+/*
-+ * Renesas SuperH DMA Engine support
-+ *
-+ * Copyright (C) 2013 Renesas Electronics, Inc.
-+ *
-+ * This is free software; you can redistribute it and/or modify it under the
-+ * terms of version 2 the GNU General Public License as published by the Free
-+ * Software Foundation.
-+ */
-+
-+#ifndef SHDMA_ARM_H
-+#define SHDMA_ARM_H
-+
-+#include "shdma.h"
-+
-+/* Transmit sizes and respective CHCR register values */
-+enum {
-+	XMIT_SZ_8BIT		= 0,
-+	XMIT_SZ_16BIT		= 1,
-+	XMIT_SZ_32BIT		= 2,
-+	XMIT_SZ_64BIT		= 7,
-+	XMIT_SZ_128BIT		= 3,
-+	XMIT_SZ_256BIT		= 4,
-+	XMIT_SZ_512BIT		= 5,
-+};
-+
-+/* log2(size / 8) - used to calculate number of transfers */
-+#define SH_DMAE_TS_SHIFT {		\
-+	[XMIT_SZ_8BIT]		= 0,	\
-+	[XMIT_SZ_16BIT]		= 1,	\
-+	[XMIT_SZ_32BIT]		= 2,	\
-+	[XMIT_SZ_64BIT]		= 3,	\
-+	[XMIT_SZ_128BIT]	= 4,	\
-+	[XMIT_SZ_256BIT]	= 5,	\
-+	[XMIT_SZ_512BIT]	= 6,	\
-+}
-+
-+#define TS_LOW_BIT	0x3 /* --xx */
-+#define TS_HI_BIT	0xc /* xx-- */
-+
-+#define TS_LOW_SHIFT	(3)
-+#define TS_HI_SHIFT	(20 - 2)	/* 2 bits for shifted low TS */
-+
-+#define TS_INDEX2VAL(i) \
-+	((((i) & TS_LOW_BIT) << TS_LOW_SHIFT) |\
-+	 (((i) & TS_HI_BIT)  << TS_HI_SHIFT))
-+
-+#define CHCR_TX(xmit_sz) (DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL((xmit_sz)))
-+#define CHCR_RX(xmit_sz) (DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL((xmit_sz)))
-+
-+#endif
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0057-mmc-sh_mmcif-move-header-include-from-header-into-.c.patch b/patches.renesas/0057-mmc-sh_mmcif-move-header-include-from-header-into-.c.patch
deleted file mode 100644
index 96c6e0b0a21cf..0000000000000
--- a/patches.renesas/0057-mmc-sh_mmcif-move-header-include-from-header-into-.c.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-From c443ea12199392b1feaab40311f591ed2f14ccdd Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Fri, 2 Aug 2013 14:48:02 +0200
-Subject: mmc: sh_mmcif: move header include from header into .c
-
-sh_dma.h isn't needed in sh_mmcif.h, move it into sh_mmcif.c.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Signed-off-by: Chris Ball <cjb@laptop.org>
-(cherry picked from commit d00cadacbe47d4883b0d5e38aa73a3f4e171d37e)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/mmc/host/sh_mmcif.c  | 1 +
- include/linux/mmc/sh_mmcif.h | 1 -
- 2 files changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/mmc/host/sh_mmcif.c b/drivers/mmc/host/sh_mmcif.c
-index a973d785..5c419557 100644
---- a/drivers/mmc/host/sh_mmcif.c
-+++ b/drivers/mmc/host/sh_mmcif.c
-@@ -61,6 +61,7 @@
- #include <linux/platform_device.h>
- #include <linux/pm_qos.h>
- #include <linux/pm_runtime.h>
-+#include <linux/sh_dma.h>
- #include <linux/spinlock.h>
- #include <linux/module.h>
- 
-diff --git a/include/linux/mmc/sh_mmcif.h b/include/linux/mmc/sh_mmcif.h
-index 767fac5a..c4880ffb 100644
---- a/include/linux/mmc/sh_mmcif.h
-+++ b/include/linux/mmc/sh_mmcif.h
-@@ -16,7 +16,6 @@
- 
- #include <linux/io.h>
- #include <linux/platform_device.h>
--#include <linux/sh_dma.h>
- 
- /*
-  * MMCIF : CE_CLK_CTRL [19:16]
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0058-ARM-shmobile-sh73a0-don-t-use-named-resource-for-I2C.patch b/patches.renesas/0058-ARM-shmobile-sh73a0-don-t-use-named-resource-for-I2C.patch
deleted file mode 100644
index 54838bf3c5add..0000000000000
--- a/patches.renesas/0058-ARM-shmobile-sh73a0-don-t-use-named-resource-for-I2C.patch
+++ /dev/null
@@ -1,69 +0,0 @@
-From 80d83ef74e6715a77b4f2692ad524b8ffea42f26 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Mon, 7 Oct 2013 22:58:55 -0700
-Subject: ARM: shmobile: sh73a0: don't use named resource for I2C
-
-i2c-sh_mobile driver doesn't care resource name.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Acked-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 8e85524bf5a2a6bf35a5011bd1cd116650da5c47)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-sh73a0.c | 10 +++++-----
- 1 file changed, 5 insertions(+), 5 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c
-index b7ce68e029a5..c51580138612 100644
---- a/arch/arm/mach-shmobile/setup-sh73a0.c
-+++ b/arch/arm/mach-shmobile/setup-sh73a0.c
-@@ -316,7 +316,7 @@ static struct platform_device tmu01_device = {
- };
- 
- static struct resource i2c0_resources[] = {
--	[0] = DEFINE_RES_MEM_NAMED(0xe6820000, 0x426, "IIC0"),
-+	[0] = DEFINE_RES_MEM(0xe6820000, 0x426),
- 	[1] = {
- 		.start	= gic_spi(167),
- 		.end	= gic_spi(170),
-@@ -325,7 +325,7 @@ static struct resource i2c0_resources[] = {
- };
- 
- static struct resource i2c1_resources[] = {
--	[0] = DEFINE_RES_MEM_NAMED(0xe6822000, 0x426, "IIC1"),
-+	[0] = DEFINE_RES_MEM(0xe6822000, 0x426),
- 	[1] = {
- 		.start	= gic_spi(51),
- 		.end	= gic_spi(54),
-@@ -334,7 +334,7 @@ static struct resource i2c1_resources[] = {
- };
- 
- static struct resource i2c2_resources[] = {
--	[0] = DEFINE_RES_MEM_NAMED(0xe6824000, 0x426, "IIC2"),
-+	[0] = DEFINE_RES_MEM(0xe6824000, 0x426),
- 	[1] = {
- 		.start	= gic_spi(171),
- 		.end	= gic_spi(174),
-@@ -343,7 +343,7 @@ static struct resource i2c2_resources[] = {
- };
- 
- static struct resource i2c3_resources[] = {
--	[0] = DEFINE_RES_MEM_NAMED(0xe6826000, 0x426, "IIC3"),
-+	[0] = DEFINE_RES_MEM(0xe6826000, 0x426),
- 	[1] = {
- 		.start	= gic_spi(183),
- 		.end	= gic_spi(186),
-@@ -352,7 +352,7 @@ static struct resource i2c3_resources[] = {
- };
- 
- static struct resource i2c4_resources[] = {
--	[0] = DEFINE_RES_MEM_NAMED(0xe6828000, 0x426, "IIC4"),
-+	[0] = DEFINE_RES_MEM(0xe6828000, 0x426),
- 	[1] = {
- 		.start	= gic_spi(187),
- 		.end	= gic_spi(190),
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0058-DMA-shdma-add-r8a73a4-DMAC-data-to-the-device-ID-tab.patch b/patches.renesas/0058-DMA-shdma-add-r8a73a4-DMAC-data-to-the-device-ID-tab.patch
deleted file mode 100644
index 356db96c45549..0000000000000
--- a/patches.renesas/0058-DMA-shdma-add-r8a73a4-DMAC-data-to-the-device-ID-tab.patch
+++ /dev/null
@@ -1,168 +0,0 @@
-From 07ed3f53fee0e2594a17873673f760b0a2913691 Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Fri, 2 Aug 2013 16:50:39 +0200
-Subject: DMA: shdma: add r8a73a4 DMAC data to the device ID table
-
-This configuration data will be used, when DMAC DT support is added to
-r8a73a4.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Signed-off-by: Vinod Koul <vinod.koul@intel.com>
-(cherry picked from commit 1e69653d40f1a280dbfef48b0c62473ac415dd57)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-	drivers/dma/sh/Kconfig
----
- drivers/dma/sh/Kconfig         |  8 ++---
- drivers/dma/sh/Makefile        |  3 ++
- drivers/dma/sh/shdma-r8a73a4.c | 77 ++++++++++++++++++++++++++++++++++++++++++
- drivers/dma/sh/shdma.h         |  7 ++++
- drivers/dma/sh/shdmac.c        |  1 +
- 5 files changed, 91 insertions(+), 5 deletions(-)
- create mode 100644 drivers/dma/sh/shdma-r8a73a4.c
-
-diff --git a/drivers/dma/sh/Kconfig b/drivers/dma/sh/Kconfig
-index e2b94d16f41f..d0924b6948e0 100644
---- a/drivers/dma/sh/Kconfig
-+++ b/drivers/dma/sh/Kconfig
-@@ -23,8 +23,6 @@ config SUDMAC
- 	help
- 	  Enable support for the Renesas SUDMAC controllers.
- 
--config RCAR_HPB_DMAE
--	tristate "Renesas R-Car HPB DMAC support"
--	depends on SH_DMAE_BASE
--	help
--	  Enable support for the Renesas R-Car series DMA controllers.
-+config SHDMA_R8A73A4
-+	def_bool y
-+	depends on ARCH_R8A73A4 && SH_DMAE != n
-diff --git a/drivers/dma/sh/Makefile b/drivers/dma/sh/Makefile
-index 9187cc98fbe4..e856af23b789 100644
---- a/drivers/dma/sh/Makefile
-+++ b/drivers/dma/sh/Makefile
-@@ -1,6 +1,9 @@
- obj-$(CONFIG_SH_DMAE_BASE) += shdma-base.o shdma-of.o
- obj-$(CONFIG_SH_DMAE) += shdma.o
- shdma-y := shdmac.o
-+ifeq ($(CONFIG_OF),y)
-+shdma-$(CONFIG_SHDMA_R8A73A4) += shdma-r8a73a4.o
-+endif
- shdma-objs := $(shdma-y)
- obj-$(CONFIG_SUDMAC) += sudmac.o
- obj-$(CONFIG_RCAR_HPB_DMAE) += rcar-hpbdma.o
-diff --git a/drivers/dma/sh/shdma-r8a73a4.c b/drivers/dma/sh/shdma-r8a73a4.c
-new file mode 100644
-index 000000000000..4fb99970a3ea
---- /dev/null
-+++ b/drivers/dma/sh/shdma-r8a73a4.c
-@@ -0,0 +1,77 @@
-+/*
-+ * Renesas SuperH DMA Engine support for r8a73a4 (APE6) SoCs
-+ *
-+ * Copyright (C) 2013 Renesas Electronics, Inc.
-+ *
-+ * This is free software; you can redistribute it and/or modify it under the
-+ * terms of version 2 the GNU General Public License as published by the Free
-+ * Software Foundation.
-+ */
-+#include <linux/sh_dma.h>
-+
-+#include "shdma-arm.h"
-+
-+const unsigned int dma_ts_shift[] = SH_DMAE_TS_SHIFT;
-+
-+static const struct sh_dmae_slave_config dma_slaves[] = {
-+	{
-+		.chcr		= CHCR_TX(XMIT_SZ_32BIT),
-+		.mid_rid	= 0xd1,		/* MMC0 Tx */
-+	}, {
-+		.chcr		= CHCR_RX(XMIT_SZ_32BIT),
-+		.mid_rid	= 0xd2,		/* MMC0 Rx */
-+	}, {
-+		.chcr		= CHCR_TX(XMIT_SZ_32BIT),
-+		.mid_rid	= 0xe1,		/* MMC1 Tx */
-+	}, {
-+		.chcr		= CHCR_RX(XMIT_SZ_32BIT),
-+		.mid_rid	= 0xe2,		/* MMC1 Rx */
-+	},
-+};
-+
-+#define DMAE_CHANNEL(a, b)				\
-+	{						\
-+		.offset         = (a) - 0x20,		\
-+		.dmars          = (a) - 0x20 + 0x40,	\
-+		.chclr_bit	= (b),			\
-+		.chclr_offset	= 0x80 - 0x20,		\
-+	}
-+
-+static const struct sh_dmae_channel dma_channels[] = {
-+	DMAE_CHANNEL(0x8000, 0),
-+	DMAE_CHANNEL(0x8080, 1),
-+	DMAE_CHANNEL(0x8100, 2),
-+	DMAE_CHANNEL(0x8180, 3),
-+	DMAE_CHANNEL(0x8200, 4),
-+	DMAE_CHANNEL(0x8280, 5),
-+	DMAE_CHANNEL(0x8300, 6),
-+	DMAE_CHANNEL(0x8380, 7),
-+	DMAE_CHANNEL(0x8400, 8),
-+	DMAE_CHANNEL(0x8480, 9),
-+	DMAE_CHANNEL(0x8500, 10),
-+	DMAE_CHANNEL(0x8580, 11),
-+	DMAE_CHANNEL(0x8600, 12),
-+	DMAE_CHANNEL(0x8680, 13),
-+	DMAE_CHANNEL(0x8700, 14),
-+	DMAE_CHANNEL(0x8780, 15),
-+	DMAE_CHANNEL(0x8800, 16),
-+	DMAE_CHANNEL(0x8880, 17),
-+	DMAE_CHANNEL(0x8900, 18),
-+	DMAE_CHANNEL(0x8980, 19),
-+};
-+
-+const struct sh_dmae_pdata r8a73a4_dma_pdata = {
-+	.slave		= dma_slaves,
-+	.slave_num	= ARRAY_SIZE(dma_slaves),
-+	.channel	= dma_channels,
-+	.channel_num	= ARRAY_SIZE(dma_channels),
-+	.ts_low_shift	= TS_LOW_SHIFT,
-+	.ts_low_mask	= TS_LOW_BIT << TS_LOW_SHIFT,
-+	.ts_high_shift	= TS_HI_SHIFT,
-+	.ts_high_mask	= TS_HI_BIT << TS_HI_SHIFT,
-+	.ts_shift	= dma_ts_shift,
-+	.ts_shift_num	= ARRAY_SIZE(dma_ts_shift),
-+	.dmaor_init     = DMAOR_DME,
-+	.chclr_present	= 1,
-+	.chclr_bitwise	= 1,
-+};
-diff --git a/drivers/dma/sh/shdma.h b/drivers/dma/sh/shdma.h
-index ff2f93b612ca..758a57b51875 100644
---- a/drivers/dma/sh/shdma.h
-+++ b/drivers/dma/sh/shdma.h
-@@ -62,4 +62,11 @@ struct sh_dmae_desc {
- #define to_sh_dev(chan) container_of(chan->shdma_chan.dma_chan.device,\
- 				     struct sh_dmae_device, shdma_dev.dma_dev)
- 
-+#ifdef CONFIG_SHDMA_R8A73A4
-+extern const struct sh_dmae_pdata r8a73a4_dma_pdata;
-+#define r8a73a4_shdma_devid (&r8a73a4_dma_pdata)
-+#else
-+#define r8a73a4_shdma_devid NULL
-+#endif
-+
- #endif	/* __DMA_SHDMA_H */
-diff --git a/drivers/dma/sh/shdmac.c b/drivers/dma/sh/shdmac.c
-index 03efd4ad0f0b..77de5e4375f2 100644
---- a/drivers/dma/sh/shdmac.c
-+++ b/drivers/dma/sh/shdmac.c
-@@ -677,6 +677,7 @@ static const struct shdma_ops sh_dmae_shdma_ops = {
- };
- 
- static const struct of_device_id sh_dmae_of_match[] = {
-+	{.compatible = "renesas,shdma-r8a73a4", .data = r8a73a4_shdma_devid,},
- 	{}
- };
- MODULE_DEVICE_TABLE(of, sh_dmae_of_match);
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0058-mmc-sh_mmcif-add-support-for-Device-Tree-DMA-binding.patch b/patches.renesas/0058-mmc-sh_mmcif-add-support-for-Device-Tree-DMA-binding.patch
deleted file mode 100644
index 6d02e8b2a9a5c..0000000000000
--- a/patches.renesas/0058-mmc-sh_mmcif-add-support-for-Device-Tree-DMA-binding.patch
+++ /dev/null
@@ -1,81 +0,0 @@
-From cbec534645741bf3d4fb64a47846ee61972a8ea5 Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Mon, 24 Jun 2013 14:36:34 +0200
-Subject: mmc: sh_mmcif: add support for Device Tree DMA bindings
-
-To use DMA in the Device Tree case the driver has to be modified
-to use suitable API to obtain DMA channels.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Signed-off-by: Chris Ball <cjb@laptop.org>
-(cherry picked from commit acd6d772a04989eb836e98f005155793f51efc7d)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/mmc/host/sh_mmcif.c | 26 ++++++++++++++++----------
- 1 file changed, 16 insertions(+), 10 deletions(-)
-
-diff --git a/drivers/mmc/host/sh_mmcif.c b/drivers/mmc/host/sh_mmcif.c
-index 5c419557..21264bd6 100644
---- a/drivers/mmc/host/sh_mmcif.c
-+++ b/drivers/mmc/host/sh_mmcif.c
-@@ -387,25 +387,29 @@ static void sh_mmcif_request_dma(struct sh_mmcif_host *host,
- 
- 	host->dma_active = false;
- 
--	if (!pdata)
--		return;
--
--	if (pdata->slave_id_tx <= 0 || pdata->slave_id_rx <= 0)
-+	if (pdata) {
-+		if (pdata->slave_id_tx <= 0 || pdata->slave_id_rx <= 0)
-+			return;
-+	} else if (!host->pd->dev.of_node) {
- 		return;
-+	}
- 
- 	/* We can only either use DMA for both Tx and Rx or not use it at all */
- 	dma_cap_zero(mask);
- 	dma_cap_set(DMA_SLAVE, mask);
- 
--	host->chan_tx = dma_request_channel(mask, shdma_chan_filter,
--					    (void *)pdata->slave_id_tx);
-+	host->chan_tx = dma_request_slave_channel_compat(mask, shdma_chan_filter,
-+				pdata ? (void *)pdata->slave_id_tx : NULL,
-+				&host->pd->dev, "tx");
- 	dev_dbg(&host->pd->dev, "%s: TX: got channel %p\n", __func__,
- 		host->chan_tx);
- 
- 	if (!host->chan_tx)
- 		return;
- 
--	cfg.slave_id = pdata->slave_id_tx;
-+	/* In the OF case the driver will get the slave ID from the DT */
-+	if (pdata)
-+		cfg.slave_id = pdata->slave_id_tx;
- 	cfg.direction = DMA_MEM_TO_DEV;
- 	cfg.dst_addr = res->start + MMCIF_CE_DATA;
- 	cfg.src_addr = 0;
-@@ -413,15 +417,17 @@ static void sh_mmcif_request_dma(struct sh_mmcif_host *host,
- 	if (ret < 0)
- 		goto ecfgtx;
- 
--	host->chan_rx = dma_request_channel(mask, shdma_chan_filter,
--					    (void *)pdata->slave_id_rx);
-+	host->chan_rx = dma_request_slave_channel_compat(mask, shdma_chan_filter,
-+				pdata ? (void *)pdata->slave_id_rx : NULL,
-+				&host->pd->dev, "rx");
- 	dev_dbg(&host->pd->dev, "%s: RX: got channel %p\n", __func__,
- 		host->chan_rx);
- 
- 	if (!host->chan_rx)
- 		goto erqrx;
- 
--	cfg.slave_id = pdata->slave_id_rx;
-+	if (pdata)
-+		cfg.slave_id = pdata->slave_id_rx;
- 	cfg.direction = DMA_DEV_TO_MEM;
- 	cfg.dst_addr = 0;
- 	cfg.src_addr = res->start + MMCIF_CE_DATA;
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0059-ARM-elf-add-new-hwcap-for-identifying-atomic-ldrd-st.patch b/patches.renesas/0059-ARM-elf-add-new-hwcap-for-identifying-atomic-ldrd-st.patch
deleted file mode 100644
index 72ac3fce9ba6d..0000000000000
--- a/patches.renesas/0059-ARM-elf-add-new-hwcap-for-identifying-atomic-ldrd-st.patch
+++ /dev/null
@@ -1,69 +0,0 @@
-From ee10a5d3f0e1c7edc8c7b96c751806a623d5f3b9 Mon Sep 17 00:00:00 2001
-From: Will Deacon <will.deacon@arm.com>
-Date: Mon, 8 Apr 2013 17:13:12 +0100
-Subject: ARM: elf: add new hwcap for identifying atomic ldrd/strd instructions
-
-CPUs implementing LPAE have atomic ldrd/strd instructions, meaning that
-userspace software can avoid having to use the exclusive variants of
-these instructions if they wish.
-
-This patch advertises the atomicity of these instructions via the
-hwcaps, so userspace can detect this CPU feature.
-
-Reported-by: Vladimir Danushevsky <vladimir.danushevsky@oracle.com>
-Signed-off-by: Will Deacon <will.deacon@arm.com>
-(cherry picked from commit a469abd0f868c902b75532579bf87553dcf1b360)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/include/uapi/asm/hwcap.h | 2 +-
- arch/arm/kernel/setup.c           | 8 +++++++-
- 2 files changed, 8 insertions(+), 2 deletions(-)
-
-diff --git a/arch/arm/include/uapi/asm/hwcap.h b/arch/arm/include/uapi/asm/hwcap.h
-index 3688fd15a32d..6d34d080372a 100644
---- a/arch/arm/include/uapi/asm/hwcap.h
-+++ b/arch/arm/include/uapi/asm/hwcap.h
-@@ -25,6 +25,6 @@
- #define HWCAP_IDIVT	(1 << 18)
- #define HWCAP_VFPD32	(1 << 19)	/* set if VFP has 32 regs (not 16) */
- #define HWCAP_IDIV	(HWCAP_IDIVA | HWCAP_IDIVT)
--
-+#define HWCAP_LPAE	(1 << 20)
- 
- #endif /* _UAPI__ASMARM_HWCAP_H */
-diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
-index b4b1d397592b..6cc3db43e897 100644
---- a/arch/arm/kernel/setup.c
-+++ b/arch/arm/kernel/setup.c
-@@ -355,7 +355,7 @@ void __init early_print(const char *str, ...)
- 
- static void __init cpuid_init_hwcaps(void)
- {
--	unsigned int divide_instrs;
-+	unsigned int divide_instrs, vmsa;
- 
- 	if (cpu_architecture() < CPU_ARCH_ARMv7)
- 		return;
-@@ -368,6 +368,11 @@ static void __init cpuid_init_hwcaps(void)
- 	case 1:
- 		elf_hwcap |= HWCAP_IDIVT;
- 	}
-+
-+	/* LPAE implies atomic ldrd/strd instructions */
-+	vmsa = (read_cpuid_ext(CPUID_EXT_MMFR0) & 0xf) >> 0;
-+	if (vmsa >= 5)
-+		elf_hwcap |= HWCAP_LPAE;
- }
- 
- static void __init feat_v6_fixup(void)
-@@ -872,6 +877,7 @@ static const char *hwcap_str[] = {
- 	"vfpv4",
- 	"idiva",
- 	"idivt",
-+	"lpae",
- 	NULL
- };
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0059-ARM-shmobile-sh73a0-don-t-use-named-resource-for-IPM.patch b/patches.renesas/0059-ARM-shmobile-sh73a0-don-t-use-named-resource-for-IPM.patch
deleted file mode 100644
index 0c479dd0736e2..0000000000000
--- a/patches.renesas/0059-ARM-shmobile-sh73a0-don-t-use-named-resource-for-IPM.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From 5e9e64df8e5bbed8052396eb86b2ea66afadfe1f Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Mon, 7 Oct 2013 22:59:06 -0700
-Subject: ARM: shmobile: sh73a0: don't use named resource for IPMMU
-
-shmobile-ipmmu driver doesn't care resource name.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Acked-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 6244cd7341ea234c2850c1b6907d216db2582f64)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-sh73a0.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c
-index c51580138612..65151c48cbd4 100644
---- a/arch/arm/mach-shmobile/setup-sh73a0.c
-+++ b/arch/arm/mach-shmobile/setup-sh73a0.c
-@@ -722,7 +722,7 @@ static struct platform_device pmu_device = {
- 
- /* an IPMMU module for ICB */
- static struct resource ipmmu_resources[] = {
--	DEFINE_RES_MEM_NAMED(0xfe951000, 0x100, "IPMMU"),
-+	DEFINE_RES_MEM(0xfe951000, 0x100),
- };
- 
- static const char * const ipmmu_dev_names[] = {
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0059-mmc-sh_mmcif-revision-specific-Command-Completion-Si.patch b/patches.renesas/0059-mmc-sh_mmcif-revision-specific-Command-Completion-Si.patch
deleted file mode 100644
index b6b4745b968a9..0000000000000
--- a/patches.renesas/0059-mmc-sh_mmcif-revision-specific-Command-Completion-Si.patch
+++ /dev/null
@@ -1,125 +0,0 @@
-From 6937bdd1e963729c156f063731bf08ae4b6916da Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Wed, 10 Jul 2013 21:21:12 +0200
-Subject: mmc: sh_mmcif: revision-specific Command Completion Signal handling
-
-Some earlier MMCIF IP revisions contained Command Completion Signal
-support, which has been dropped again in modern versions. Sopport for
-this feature is added in a way to preserve the current behaviour by
-default, i.e. when it is not enabled in platform data. Patch is based
-on work by Nobuyuki HIRAI.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Signed-off-by: Chris Ball <cjb@laptop.org>
-(cherry picked from commit 967bcb77177cda1a426fdb2350e6ec61bcf5b5eb)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/mmc/host/sh_mmcif.c  | 27 +++++++++++++++++++++------
- include/linux/mmc/sh_mmcif.h |  1 +
- 2 files changed, 22 insertions(+), 6 deletions(-)
-
-diff --git a/drivers/mmc/host/sh_mmcif.c b/drivers/mmc/host/sh_mmcif.c
-index 21264bd6..c49a2d96 100644
---- a/drivers/mmc/host/sh_mmcif.c
-+++ b/drivers/mmc/host/sh_mmcif.c
-@@ -134,6 +134,8 @@
- 				 INT_BUFWEN | INT_CMD12DRE | INT_BUFRE | \
- 				 INT_DTRANE | INT_CMD12RBE | INT_CMD12CRE)
- 
-+#define INT_CCS			(INT_CCSTO | INT_CCSRCV | INT_CCSDE)
-+
- /* CE_INT_MASK */
- #define MASK_ALL		0x00000000
- #define MASK_MCCSDE		(1 << 29)
-@@ -162,7 +164,7 @@
- 
- #define MASK_START_CMD		(MASK_MCMDVIO | MASK_MBUFVIO | MASK_MWDATERR | \
- 				 MASK_MRDATERR | MASK_MRIDXERR | MASK_MRSPERR | \
--				 MASK_MCCSTO | MASK_MCRCSTO | MASK_MWDATTO | \
-+				 MASK_MCRCSTO | MASK_MWDATTO | \
- 				 MASK_MRDATTO | MASK_MRBSYTO | MASK_MRSPTO)
- 
- #define MASK_CLEAN		(INT_ERR_STS | MASK_MRBSYE | MASK_MCRSPE |	\
-@@ -244,6 +246,7 @@ struct sh_mmcif_host {
- 	int sg_blkidx;
- 	bool power;
- 	bool card_present;
-+	bool ccs_enable;		/* Command Completion Signal support */
- 	struct mutex thread_lock;
- 
- 	/* DMA support */
-@@ -492,8 +495,10 @@ static void sh_mmcif_sync_reset(struct sh_mmcif_host *host)
- 
- 	sh_mmcif_writel(host->addr, MMCIF_CE_VERSION, SOFT_RST_ON);
- 	sh_mmcif_writel(host->addr, MMCIF_CE_VERSION, SOFT_RST_OFF);
-+	if (host->ccs_enable)
-+		tmp |= SCCSTO_29;
- 	sh_mmcif_bitset(host, MMCIF_CE_CLK_CTRL, tmp |
--		SRSPTO_256 | SRBSYTO_29 | SRWDTO_29 | SCCSTO_29);
-+		SRSPTO_256 | SRBSYTO_29 | SRWDTO_29);
- 	/* byte swap on */
- 	sh_mmcif_bitset(host, MMCIF_CE_BUF_ACC, BUF_ACC_ATYP);
- }
-@@ -873,6 +878,9 @@ static void sh_mmcif_start_cmd(struct sh_mmcif_host *host,
- 		break;
- 	}
- 
-+	if (host->ccs_enable)
-+		mask |= MASK_MCCSTO;
-+
- 	if (mrq->data) {
- 		sh_mmcif_writel(host->addr, MMCIF_CE_BLOCK_SET, 0);
- 		sh_mmcif_writel(host->addr, MMCIF_CE_BLOCK_SET,
-@@ -880,7 +888,10 @@ static void sh_mmcif_start_cmd(struct sh_mmcif_host *host,
- 	}
- 	opc = sh_mmcif_set_cmd(host, mrq);
- 
--	sh_mmcif_writel(host->addr, MMCIF_CE_INT, 0xD80430C0);
-+	if (host->ccs_enable)
-+		sh_mmcif_writel(host->addr, MMCIF_CE_INT, 0xD80430C0);
-+	else
-+		sh_mmcif_writel(host->addr, MMCIF_CE_INT, 0xD80430C0 | INT_CCS);
- 	sh_mmcif_writel(host->addr, MMCIF_CE_INT_MASK, mask);
- 	/* set arg */
- 	sh_mmcif_writel(host->addr, MMCIF_CE_ARG, cmd->arg);
-@@ -1245,11 +1256,14 @@ static irqreturn_t sh_mmcif_irqt(int irq, void *dev_id)
- static irqreturn_t sh_mmcif_intr(int irq, void *dev_id)
- {
- 	struct sh_mmcif_host *host = dev_id;
--	u32 state;
-+	u32 state, mask;
- 
- 	state = sh_mmcif_readl(host->addr, MMCIF_CE_INT);
--	sh_mmcif_writel(host->addr, MMCIF_CE_INT,
--			~(state & sh_mmcif_readl(host->addr, MMCIF_CE_INT_MASK)));
-+	mask = sh_mmcif_readl(host->addr, MMCIF_CE_INT_MASK);
-+	if (host->ccs_enable)
-+		sh_mmcif_writel(host->addr, MMCIF_CE_INT, ~(state & mask));
-+	else
-+		sh_mmcif_writel(host->addr, MMCIF_CE_INT, INT_CCS | ~(state & mask));
- 	sh_mmcif_bitclr(host, MMCIF_CE_INT_MASK, state & MASK_CLEAN);
- 
- 	if (state & ~MASK_CLEAN)
-@@ -1383,6 +1397,7 @@ static int sh_mmcif_probe(struct platform_device *pdev)
- 	host->mmc	= mmc;
- 	host->addr	= reg;
- 	host->timeout	= msecs_to_jiffies(1000);
-+	host->ccs_enable = !pd || !pd->ccs_unsupported;
- 
- 	host->pd = pdev;
- 
-diff --git a/include/linux/mmc/sh_mmcif.h b/include/linux/mmc/sh_mmcif.h
-index c4880ffb..197ed91f 100644
---- a/include/linux/mmc/sh_mmcif.h
-+++ b/include/linux/mmc/sh_mmcif.h
-@@ -36,6 +36,7 @@ struct sh_mmcif_plat_data {
- 	unsigned int		slave_id_tx;	/* embedded slave_id_[tr]x */
- 	unsigned int		slave_id_rx;
- 	bool			use_cd_gpio : 1;
-+	bool			ccs_unsupported : 1;
- 	unsigned int		cd_gpio;
- 	u8			sup_pclk;	/* 1 :SH7757, 0: SH7724/SH7372 */
- 	unsigned long		caps;
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0060-ARM-ARM64-arch_timer-add-macros-for-bits-in-control-.patch b/patches.renesas/0060-ARM-ARM64-arch_timer-add-macros-for-bits-in-control-.patch
deleted file mode 100644
index 3f58cc7b944aa..0000000000000
--- a/patches.renesas/0060-ARM-ARM64-arch_timer-add-macros-for-bits-in-control-.patch
+++ /dev/null
@@ -1,88 +0,0 @@
-From 319ec37d4a51fa86e25b5185b17ce9c3d4840caa Mon Sep 17 00:00:00 2001
-From: Sudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com>
-Date: Tue, 13 Aug 2013 13:43:26 +0100
-Subject: ARM/ARM64: arch_timer: add macros for bits in control register
-
-Add macros to describe the bitfields in the ARM architected timer
-control register to make code easy to understand.
-
-Reviewed-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
-Reviewed-by: Will Deacon <will.deacon@arm.com>
-Acked-by: Catalin Marinas <catalin.marinas@arm.com>
-Acked-by: Olof Johansson <olof@lixom.net>
-Signed-off-by: Sudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com>
-(cherry picked from commit 28061758dc83df445a05af347b5ce55ccd968c03)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/include/asm/arch_timer.h    |  9 +++++++--
- arch/arm64/include/asm/arch_timer.h  | 12 ++++++++----
- include/clocksource/arm_arch_timer.h |  8 ++++++++
- 3 files changed, 23 insertions(+), 6 deletions(-)
-
-diff --git a/arch/arm/include/asm/arch_timer.h b/arch/arm/include/asm/arch_timer.h
-index 556094689724..c78c4cbd329e 100644
---- a/arch/arm/include/asm/arch_timer.h
-+++ b/arch/arm/include/asm/arch_timer.h
-@@ -93,8 +93,13 @@ static inline void __cpuinit arch_counter_set_user_access(void)
- 
- 	asm volatile("mrc p15, 0, %0, c14, c1, 0" : "=r" (cntkctl));
- 
--	/* disable user access to everything */
--	cntkctl &= ~((3 << 8) | (7 << 0));
-+	/* Disable user access to both physical/virtual counters/timers */
-+	/* Also disable virtual event stream */
-+	cntkctl &= ~(ARCH_TIMER_USR_PT_ACCESS_EN
-+			| ARCH_TIMER_USR_VT_ACCESS_EN
-+			| ARCH_TIMER_VIRT_EVT_EN
-+			| ARCH_TIMER_USR_VCT_ACCESS_EN
-+			| ARCH_TIMER_USR_PCT_ACCESS_EN);
- 
- 	asm volatile("mcr p15, 0, %0, c14, c1, 0" : : "r" (cntkctl));
- }
-diff --git a/arch/arm64/include/asm/arch_timer.h b/arch/arm64/include/asm/arch_timer.h
-index 7181e777c2c5..aaee5f73adae 100644
---- a/arch/arm64/include/asm/arch_timer.h
-+++ b/arch/arm64/include/asm/arch_timer.h
-@@ -96,12 +96,16 @@ static inline void __cpuinit arch_counter_set_user_access(void)
- {
- 	u32 cntkctl;
- 
--	/* Disable user access to the timers and the physical counter. */
- 	asm volatile("mrs	%0, cntkctl_el1" : "=r" (cntkctl));
--	cntkctl &= ~((3 << 8) | (1 << 0));
- 
--	/* Enable user access to the virtual counter and frequency. */
--	cntkctl |= (1 << 1);
-+	/* Disable user access to the timers and the physical counter */
-+	cntkctl &= ~(ARCH_TIMER_USR_PT_ACCESS_EN
-+			| ARCH_TIMER_USR_VT_ACCESS_EN
-+			| ARCH_TIMER_USR_PCT_ACCESS_EN);
-+
-+	/* Enable user access to the virtual counter */
-+	cntkctl |= ARCH_TIMER_USR_VCT_ACCESS_EN;
-+
- 	asm volatile("msr	cntkctl_el1, %0" : : "r" (cntkctl));
- }
- 
-diff --git a/include/clocksource/arm_arch_timer.h b/include/clocksource/arm_arch_timer.h
-index f3da817b9b8e..e6bc74f1119c 100644
---- a/include/clocksource/arm_arch_timer.h
-+++ b/include/clocksource/arm_arch_timer.h
-@@ -31,6 +31,14 @@ enum arch_timer_reg {
- #define ARCH_TIMER_PHYS_ACCESS		0
- #define ARCH_TIMER_VIRT_ACCESS		1
- 
-+#define ARCH_TIMER_USR_PCT_ACCESS_EN	(1 << 0) /* physical counter */
-+#define ARCH_TIMER_USR_VCT_ACCESS_EN	(1 << 1) /* virtual counter */
-+#define ARCH_TIMER_VIRT_EVT_EN		(1 << 2)
-+#define ARCH_TIMER_EVT_TRIGGER_SHIFT	(4)
-+#define ARCH_TIMER_EVT_TRIGGER_MASK	(0xF << ARCH_TIMER_EVT_TRIGGER_SHIFT)
-+#define ARCH_TIMER_USR_VT_ACCESS_EN	(1 << 8) /* virtual timer registers */
-+#define ARCH_TIMER_USR_PT_ACCESS_EN	(1 << 9) /* physical timer registers */
-+
- #ifdef CONFIG_ARM_ARCH_TIMER
- 
- extern u32 arch_timer_get_rate(void);
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0060-ARM-shmobile-bockw-header-cleanup.patch b/patches.renesas/0060-ARM-shmobile-bockw-header-cleanup.patch
deleted file mode 100644
index 9d55e0c580a95..0000000000000
--- a/patches.renesas/0060-ARM-shmobile-bockw-header-cleanup.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From 2485ec0d745fb3fba6600b135bc130786c9276cb Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Thu, 10 Oct 2013 23:34:53 -0700
-Subject: ARM: shmobile: bockw: header cleanup
-
-linux/pinctrl/machine.h is no longer needed
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 22e247ef146b9a13c836a005e04ce909e3e16966)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-bockw-reference.c | 1 -
- 1 file changed, 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/board-bockw-reference.c b/arch/arm/mach-shmobile/board-bockw-reference.c
-index ae88fdad4b3a..1687df9b267f 100644
---- a/arch/arm/mach-shmobile/board-bockw-reference.c
-+++ b/arch/arm/mach-shmobile/board-bockw-reference.c
-@@ -19,7 +19,6 @@
-  */
- 
- #include <linux/of_platform.h>
--#include <linux/pinctrl/machine.h>
- #include <mach/common.h>
- #include <mach/r8a7778.h>
- #include <asm/mach/arch.h>
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0060-mmc-sh_mmcif-revision-specific-CLK_CTRL2-handling.patch b/patches.renesas/0060-mmc-sh_mmcif-revision-specific-CLK_CTRL2-handling.patch
deleted file mode 100644
index ef126725be7c9..0000000000000
--- a/patches.renesas/0060-mmc-sh_mmcif-revision-specific-CLK_CTRL2-handling.patch
+++ /dev/null
@@ -1,71 +0,0 @@
-From 82c16d9ee4e49e577ffbf49bc20578e4e95c371d Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Wed, 10 Jul 2013 21:21:13 +0200
-Subject: mmc: sh_mmcif: revision-specific CLK_CTRL2 handling
-
-Some newer MMCIF IP revisions contain a CE_CLK_CTRL2 register, that has to
-be set for proper operation. Support for this feature is added in a way to
-preserve the current behaviour by default, i.e. when it is not enabled
-in platform data. Patch is based on work by Nobuyuki HIRAI.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Signed-off-by: Chris Ball <cjb@laptop.org>
-(cherry picked from commit 6d6fd3674259d16b735c961743ff28870c46cedc)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/mmc/host/sh_mmcif.c  | 4 ++++
- include/linux/mmc/sh_mmcif.h | 2 ++
- 2 files changed, 6 insertions(+)
-
-diff --git a/drivers/mmc/host/sh_mmcif.c b/drivers/mmc/host/sh_mmcif.c
-index c49a2d96..e979d2db 100644
---- a/drivers/mmc/host/sh_mmcif.c
-+++ b/drivers/mmc/host/sh_mmcif.c
-@@ -247,6 +247,7 @@ struct sh_mmcif_host {
- 	bool power;
- 	bool card_present;
- 	bool ccs_enable;		/* Command Completion Signal support */
-+	bool clk_ctrl2_enable;
- 	struct mutex thread_lock;
- 
- 	/* DMA support */
-@@ -497,6 +498,8 @@ static void sh_mmcif_sync_reset(struct sh_mmcif_host *host)
- 	sh_mmcif_writel(host->addr, MMCIF_CE_VERSION, SOFT_RST_OFF);
- 	if (host->ccs_enable)
- 		tmp |= SCCSTO_29;
-+	if (host->clk_ctrl2_enable)
-+		sh_mmcif_writel(host->addr, MMCIF_CE_CLK_CTRL2, 0x0F0F0000);
- 	sh_mmcif_bitset(host, MMCIF_CE_CLK_CTRL, tmp |
- 		SRSPTO_256 | SRBSYTO_29 | SRWDTO_29);
- 	/* byte swap on */
-@@ -1398,6 +1401,7 @@ static int sh_mmcif_probe(struct platform_device *pdev)
- 	host->addr	= reg;
- 	host->timeout	= msecs_to_jiffies(1000);
- 	host->ccs_enable = !pd || !pd->ccs_unsupported;
-+	host->clk_ctrl2_enable = pd && pd->clk_ctrl2_present;
- 
- 	host->pd = pdev;
- 
-diff --git a/include/linux/mmc/sh_mmcif.h b/include/linux/mmc/sh_mmcif.h
-index 197ed91f..ccd8fb2c 100644
---- a/include/linux/mmc/sh_mmcif.h
-+++ b/include/linux/mmc/sh_mmcif.h
-@@ -37,6 +37,7 @@ struct sh_mmcif_plat_data {
- 	unsigned int		slave_id_rx;
- 	bool			use_cd_gpio : 1;
- 	bool			ccs_unsupported : 1;
-+	bool			clk_ctrl2_present : 1;
- 	unsigned int		cd_gpio;
- 	u8			sup_pclk;	/* 1 :SH7757, 0: SH7724/SH7372 */
- 	unsigned long		caps;
-@@ -60,6 +61,7 @@ struct sh_mmcif_plat_data {
- #define MMCIF_CE_INT_MASK	0x00000044
- #define MMCIF_CE_HOST_STS1	0x00000048
- #define MMCIF_CE_HOST_STS2	0x0000004C
-+#define MMCIF_CE_CLK_CTRL2	0x00000070
- #define MMCIF_CE_VERSION	0x0000007C
- 
- /* CE_BUF_ACC */
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0061-ARM-shmobile-r8a7779-cleanup-registration-of-VIN.patch b/patches.renesas/0061-ARM-shmobile-r8a7779-cleanup-registration-of-VIN.patch
deleted file mode 100644
index 9b11c5a014be6..0000000000000
--- a/patches.renesas/0061-ARM-shmobile-r8a7779-cleanup-registration-of-VIN.patch
+++ /dev/null
@@ -1,145 +0,0 @@
-From 6bf3d520cc10b69cac1460e690fedc7f1b685536 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Mon, 14 Oct 2013 19:45:36 -0700
-Subject: ARM: shmobile: r8a7779: cleanup registration of VIN
-
-VIN driver which needs platform data at the time of
-registration is used from Marzen only.
-Now, ARM/shmobile aims to support DT,
-and the C code base board support will be removed
-if DT support is completed.
-Current driver registration method which needs platform data
-and which is not shared complicates codes.
-This means legacy C code cleanup after DT supporting
-will be more complicated
-This patch registers it on board code as cleanup C code
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Acked-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 4bd4c5b32b851b07d81209e1dc0c8b20b283f2e2)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-marzen.c         | 24 +++++++++++++++--
- arch/arm/mach-shmobile/include/mach/r8a7779.h |  2 --
- arch/arm/mach-shmobile/setup-r8a7779.c        | 37 ---------------------------
- 3 files changed, 22 insertions(+), 41 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-marzen.c b/arch/arm/mach-shmobile/board-marzen.c
-index da1352f5f71b..fa102f7d149c 100644
---- a/arch/arm/mach-shmobile/board-marzen.c
-+++ b/arch/arm/mach-shmobile/board-marzen.c
-@@ -259,10 +259,30 @@ static struct platform_device leds_device = {
- 	},
- };
- 
-+/* VIN */
- static struct rcar_vin_platform_data vin_platform_data __initdata = {
- 	.flags	= RCAR_VIN_BT656,
- };
- 
-+#define MARZEN_VIN(idx)						\
-+static struct resource vin##idx##_resources[] __initdata = {	\
-+	DEFINE_RES_MEM(0xffc50000 + 0x1000 * (idx), 0x1000),	\
-+	DEFINE_RES_IRQ(gic_iid(0x5f + (idx))),			\
-+};								\
-+								\
-+static struct platform_device_info vin##idx##_info __initdata = { \
-+	.parent		= &platform_bus,			\
-+	.name		= "r8a7779-vin",			\
-+	.id		= idx,					\
-+	.res		= vin##idx##_resources,			\
-+	.num_res	= ARRAY_SIZE(vin##idx##_resources),	\
-+	.dma_mask	= DMA_BIT_MASK(32),			\
-+	.data		= &vin_platform_data,			\
-+	.size_data	= sizeof(vin_platform_data),		\
-+}
-+MARZEN_VIN(1);
-+MARZEN_VIN(3);
-+
- #define MARZEN_CAMERA(idx)					\
- static struct i2c_board_info camera##idx##_info = {		\
- 	I2C_BOARD_INFO("adv7180", 0x20 + (idx)),		\
-@@ -367,8 +387,8 @@ static void __init marzen_init(void)
- 	r8a7779_init_irq_extpin(1); /* IRQ1 as individual interrupt */
- 
- 	r8a7779_add_standard_devices();
--	r8a7779_add_vin_device(1, &vin_platform_data);
--	r8a7779_add_vin_device(3, &vin_platform_data);
-+	platform_device_register_full(&vin1_info);
-+	platform_device_register_full(&vin3_info);
- 	platform_add_devices(marzen_devices, ARRAY_SIZE(marzen_devices));
- 	marzen_add_du_device();
- }
-diff --git a/arch/arm/mach-shmobile/include/mach/r8a7779.h b/arch/arm/mach-shmobile/include/mach/r8a7779.h
-index 17af34ed89c8..905420a2f11f 100644
---- a/arch/arm/mach-shmobile/include/mach/r8a7779.h
-+++ b/arch/arm/mach-shmobile/include/mach/r8a7779.h
-@@ -41,8 +41,6 @@ extern void r8a7779_add_early_devices(void);
- extern void r8a7779_add_standard_devices(void);
- extern void r8a7779_add_standard_devices_dt(void);
- extern void r8a7779_add_ether_device(struct sh_eth_plat_data *pdata);
--extern void r8a7779_add_vin_device(int idx,
--				   struct rcar_vin_platform_data *pdata);
- extern void r8a7779_init_late(void);
- extern void r8a7779_clock_init(void);
- extern void r8a7779_pinmux_init(void);
-diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c
-index 13049e9d691c..51a43c52c611 100644
---- a/arch/arm/mach-shmobile/setup-r8a7779.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7779.c
-@@ -610,33 +610,6 @@ static struct resource ether_resources[] __initdata = {
- 	},
- };
- 
--#define R8A7779_VIN(idx) \
--static struct resource vin##idx##_resources[] __initdata = {		\
--	DEFINE_RES_MEM(0xffc50000 + 0x1000 * (idx), 0x1000),		\
--	DEFINE_RES_IRQ(gic_iid(0x5f + (idx))),				\
--};									\
--									\
--static struct platform_device_info vin##idx##_info __initdata = {	\
--	.parent		= &platform_bus,				\
--	.name		= "r8a7779-vin",				\
--	.id		= idx,						\
--	.res		= vin##idx##_resources,				\
--	.num_res	= ARRAY_SIZE(vin##idx##_resources),		\
--	.dma_mask	= DMA_BIT_MASK(32),				\
--}
--
--R8A7779_VIN(0);
--R8A7779_VIN(1);
--R8A7779_VIN(2);
--R8A7779_VIN(3);
--
--static struct platform_device_info *vin_info_table[] __initdata = {
--	&vin0_info,
--	&vin1_info,
--	&vin2_info,
--	&vin3_info,
--};
--
- /* HPB-DMA */
- 
- /* Asynchronous mode register bits */
-@@ -833,16 +806,6 @@ void __init r8a7779_add_ether_device(struct sh_eth_plat_data *pdata)
- 					  pdata, sizeof(*pdata));
- }
- 
--void __init r8a7779_add_vin_device(int id, struct rcar_vin_platform_data *pdata)
--{
--	BUG_ON(id < 0 || id > 3);
--
--	vin_info_table[id]->data = pdata;
--	vin_info_table[id]->size_data = sizeof(*pdata);
--
--	platform_device_register_full(vin_info_table[id]);
--}
--
- /* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */
- void __init __weak r8a7779_register_twd(void) { }
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0061-media-soc-camera-add-host-clock-callbacks-to-start-a.patch b/patches.renesas/0061-media-soc-camera-add-host-clock-callbacks-to-start-a.patch
deleted file mode 100644
index 88c744897bd94..0000000000000
--- a/patches.renesas/0061-media-soc-camera-add-host-clock-callbacks-to-start-a.patch
+++ /dev/null
@@ -1,79 +0,0 @@
-From b1c6e530403b3583e6527ad87caf4f7b43040834 Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Thu, 4 Apr 2013 08:51:36 -0300
-Subject: [media] soc-camera: add host clock callbacks to start and stop the
- master clock
-
-Currently soc-camera uses a single camera host callback to activate the
-interface master clock and to configure the interface for a specific
-client. However, during probing we might not have the information about
-a client, we just need to activate the clock. Add new camera host driver
-callbacks to only start and stop the clock without and client-specific
-configuration.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
-(cherry picked from commit eb569cf9db804e6ba34b3a1812415e59d5e43d1a)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/media/platform/soc_camera/soc_camera.c | 19 +++++++++++++++++--
- include/media/soc_camera.h                     |  2 ++
- 2 files changed, 19 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/media/platform/soc_camera/soc_camera.c b/drivers/media/platform/soc_camera/soc_camera.c
-index 832f0593..df90565c 100644
---- a/drivers/media/platform/soc_camera/soc_camera.c
-+++ b/drivers/media/platform/soc_camera/soc_camera.c
-@@ -513,10 +513,23 @@ static int soc_camera_add_device(struct soc_camera_device *icd)
- 	if (ici->icd)
- 		return -EBUSY;
- 
-+	if (ici->ops->clock_start) {
-+		ret = ici->ops->clock_start(ici);
-+		if (ret < 0)
-+			return ret;
-+	}
-+
- 	ret = ici->ops->add(icd);
--	if (!ret)
--		ici->icd = icd;
-+	if (ret < 0)
-+		goto eadd;
-+
-+	ici->icd = icd;
- 
-+	return 0;
-+
-+eadd:
-+	if (ici->ops->clock_stop)
-+		ici->ops->clock_stop(ici);
- 	return ret;
- }
- 
-@@ -528,6 +541,8 @@ static void soc_camera_remove_device(struct soc_camera_device *icd)
- 		return;
- 
- 	ici->ops->remove(icd);
-+	if (ici->ops->clock_stop)
-+		ici->ops->clock_stop(ici);
- 	ici->icd = NULL;
- }
- 
-diff --git a/include/media/soc_camera.h b/include/media/soc_camera.h
-index 5a46ce2d..64415ee8 100644
---- a/include/media/soc_camera.h
-+++ b/include/media/soc_camera.h
-@@ -74,6 +74,8 @@ struct soc_camera_host_ops {
- 	struct module *owner;
- 	int (*add)(struct soc_camera_device *);
- 	void (*remove)(struct soc_camera_device *);
-+	int (*clock_start)(struct soc_camera_host *);
-+	void (*clock_stop)(struct soc_camera_host *);
- 	/*
- 	 * .get_formats() is called for each client device format, but
- 	 * .put_formats() is only called once. Further, if any of the calls to
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0061-sh_eth-add-use-RMCR.RNC-bit.patch b/patches.renesas/0061-sh_eth-add-use-RMCR.RNC-bit.patch
deleted file mode 100644
index 694f2d6bc7156..0000000000000
--- a/patches.renesas/0061-sh_eth-add-use-RMCR.RNC-bit.patch
+++ /dev/null
@@ -1,67 +0,0 @@
-From 84399e3c5faa040a4dac3c464dc94aa2c2307277 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Wed, 16 Oct 2013 02:29:58 +0400
-Subject: sh_eth: add/use RMCR.RNC bit
-
-Declare 'enum RMCR_BIT' containing the single member for the RMCR.RNC bit and
-replace bare numbers in the driver by  this mnemonic.
-
-Suggested-by: David Miller <davem@davemloft.net>
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit 305a3388b5b3121aff6b10054136b40ca91ab35b)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/net/ethernet/renesas/sh_eth.c | 6 +++---
- drivers/net/ethernet/renesas/sh_eth.h | 3 +++
- 2 files changed, 6 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
-index b54bbbd5826a..5ffaf56a0706 100644
---- a/drivers/net/ethernet/renesas/sh_eth.c
-+++ b/drivers/net/ethernet/renesas/sh_eth.c
-@@ -483,7 +483,7 @@ static struct sh_eth_cpu_data sh7757_data = {
- 	.register_type	= SH_ETH_REG_FAST_SH4,
- 
- 	.eesipr_value	= DMAC_M_RFRMER | DMAC_M_ECI | 0x003fffff,
--	.rmcr_value	= 0x00000001,
-+	.rmcr_value	= RMCR_RNC,
- 
- 	.tx_check	= EESR_FTC | EESR_CND | EESR_DLC | EESR_CD | EESR_RTO,
- 	.eesr_err_check	= EESR_TWB | EESR_TABT | EESR_RABT | EESR_RFE |
-@@ -561,7 +561,7 @@ static struct sh_eth_cpu_data sh7757_data_giga = {
- 			  EESR_RFE | EESR_RDE | EESR_RFRMER | EESR_TFE |
- 			  EESR_TDE | EESR_ECI,
- 	.fdr_value	= 0x0000072f,
--	.rmcr_value	= 0x00000001,
-+	.rmcr_value	= RMCR_RNC,
- 
- 	.irq_flags	= IRQF_SHARED,
- 	.apr		= 1,
-@@ -689,7 +689,7 @@ static struct sh_eth_cpu_data r8a7740_data = {
- 			  EESR_RFE | EESR_RDE | EESR_RFRMER | EESR_TFE |
- 			  EESR_TDE | EESR_ECI,
- 	.fdr_value	= 0x0000070f,
--	.rmcr_value	= 0x00000001,
-+	.rmcr_value	= RMCR_RNC,
- 
- 	.apr		= 1,
- 	.mpr		= 1,
-diff --git a/drivers/net/ethernet/renesas/sh_eth.h b/drivers/net/ethernet/renesas/sh_eth.h
-index a0db02c63b11..f32c1692d310 100644
---- a/drivers/net/ethernet/renesas/sh_eth.h
-+++ b/drivers/net/ethernet/renesas/sh_eth.h
-@@ -321,6 +321,9 @@ enum TD_STS_BIT {
- #define TD_TFP	(TD_TFP1|TD_TFP0)
- 
- /* RMCR */
-+enum RMCR_BIT {
-+	RMCR_RNC = 0x00000001,
-+};
- #define DEFAULT_RMCR_VALUE	0x00000000
- 
- /* ECMR */
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0062-ARM-shmobile-Cosmetic-update-of-Lager-DT-Reference.patch b/patches.renesas/0062-ARM-shmobile-Cosmetic-update-of-Lager-DT-Reference.patch
deleted file mode 100644
index 4f71eac96f881..0000000000000
--- a/patches.renesas/0062-ARM-shmobile-Cosmetic-update-of-Lager-DT-Reference.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-From 60ff52cfb7daed8b53c1098b28d4c56ddd857df7 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Thu, 17 Oct 2013 06:58:19 +0900
-Subject: ARM: shmobile: Cosmetic update of Lager DT Reference
-
-Clean up the Lager DT reference board code to make it match
-Koelsch DT reference including using the rcar-gen2 header.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 20c6125fc9d98492e5ed1668d1ea72289c8ff94c)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-lager-reference.c | 5 ++---
- 1 file changed, 2 insertions(+), 3 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-lager-reference.c b/arch/arm/mach-shmobile/board-lager-reference.c
-index 1a1a4a888632..7df9ea0839db 100644
---- a/arch/arm/mach-shmobile/board-lager-reference.c
-+++ b/arch/arm/mach-shmobile/board-lager-reference.c
-@@ -20,16 +20,15 @@
- 
- #include <linux/init.h>
- #include <linux/of_platform.h>
-+#include <mach/rcar-gen2.h>
- #include <mach/r8a7790.h>
- #include <asm/mach/arch.h>
- 
- static void __init lager_add_standard_devices(void)
- {
--	/* clocks are setup late during boot in the case of DT */
- 	r8a7790_clock_init();
--
- 	r8a7790_add_dt_devices();
--        of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
-+	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
- }
- 
- static const char *lager_boards_compat_dt[] __initdata = {
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0062-media-sh-mobile-ceu-camera-move-interface-activation.patch b/patches.renesas/0062-media-sh-mobile-ceu-camera-move-interface-activation.patch
deleted file mode 100644
index 398da3fe18b0b..0000000000000
--- a/patches.renesas/0062-media-sh-mobile-ceu-camera-move-interface-activation.patch
+++ /dev/null
@@ -1,154 +0,0 @@
-From 8a1a8ecd9cbb41c277077435d975204b6c07baae Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Thu, 4 Apr 2013 12:54:20 -0300
-Subject: [media] sh-mobile-ceu-camera: move interface activation and
- deactivation to clock callbacks
-
-When adding and removing a client, the sh-mobile-ceu-camera driver activates
-and, respectively, deactivates its camera interface and, if necessary, the
-CSI2 controller. Only handling of the CSI2 interface is client-specific and
-is only needed, when a data-exchange with the client is taking place. Move
-the rest to .clock_start() and .clock_stop() callbacks.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
-(cherry picked from commit 0ff6a6e8fb6915e68b93ff169b1eb66c0ba15d56)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- .../platform/soc_camera/sh_mobile_ceu_camera.c     | 58 +++++++++++++---------
- 1 file changed, 35 insertions(+), 23 deletions(-)
-
-diff --git a/drivers/media/platform/soc_camera/sh_mobile_ceu_camera.c b/drivers/media/platform/soc_camera/sh_mobile_ceu_camera.c
-index 5b7d8e1d..9037472e 100644
---- a/drivers/media/platform/soc_camera/sh_mobile_ceu_camera.c
-+++ b/drivers/media/platform/soc_camera/sh_mobile_ceu_camera.c
-@@ -162,7 +162,6 @@ static u32 ceu_read(struct sh_mobile_ceu_dev *priv, unsigned long reg_offs)
- static int sh_mobile_ceu_soft_reset(struct sh_mobile_ceu_dev *pcdev)
- {
- 	int i, success = 0;
--	struct soc_camera_device *icd = pcdev->ici.icd;
- 
- 	ceu_write(pcdev, CAPSR, 1 << 16); /* reset */
- 
-@@ -186,7 +185,7 @@ static int sh_mobile_ceu_soft_reset(struct sh_mobile_ceu_dev *pcdev)
- 
- 
- 	if (2 != success) {
--		dev_warn(icd->pdev, "soft reset time out\n");
-+		dev_warn(pcdev->ici.v4l2_dev.dev, "soft reset time out\n");
- 		return -EIO;
- 	}
- 
-@@ -543,35 +542,21 @@ static struct v4l2_subdev *find_csi2(struct sh_mobile_ceu_dev *pcdev)
- 	return NULL;
- }
- 
--/* Called with .host_lock held */
- static int sh_mobile_ceu_add_device(struct soc_camera_device *icd)
- {
- 	struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
- 	struct sh_mobile_ceu_dev *pcdev = ici->priv;
--	struct v4l2_subdev *csi2_sd;
-+	struct v4l2_subdev *csi2_sd = find_csi2(pcdev);
- 	int ret;
- 
--	dev_info(icd->parent,
--		 "SuperH Mobile CEU driver attached to camera %d\n",
--		 icd->devnum);
--
--	pm_runtime_get_sync(ici->v4l2_dev.dev);
--
--	pcdev->buf_total = 0;
--
--	ret = sh_mobile_ceu_soft_reset(pcdev);
--
--	csi2_sd = find_csi2(pcdev);
- 	if (csi2_sd) {
- 		csi2_sd->grp_id = soc_camera_grp_id(icd);
- 		v4l2_set_subdev_hostdata(csi2_sd, icd);
- 	}
- 
- 	ret = v4l2_subdev_call(csi2_sd, core, s_power, 1);
--	if (ret < 0 && ret != -ENOIOCTLCMD && ret != -ENODEV) {
--		pm_runtime_put(ici->v4l2_dev.dev);
-+	if (ret < 0 && ret != -ENOIOCTLCMD && ret != -ENODEV)
- 		return ret;
--	}
- 
- 	/*
- 	 * -ENODEV is special: either csi2_sd == NULL or the CSI-2 driver
-@@ -580,19 +565,48 @@ static int sh_mobile_ceu_add_device(struct soc_camera_device *icd)
- 	if (ret == -ENODEV && csi2_sd)
- 		csi2_sd->grp_id = 0;
- 
-+	dev_info(icd->parent,
-+		 "SuperH Mobile CEU driver attached to camera %d\n",
-+		 icd->devnum);
-+
- 	return 0;
- }
- 
--/* Called with .host_lock held */
- static void sh_mobile_ceu_remove_device(struct soc_camera_device *icd)
- {
- 	struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
- 	struct sh_mobile_ceu_dev *pcdev = ici->priv;
- 	struct v4l2_subdev *csi2_sd = find_csi2(pcdev);
- 
-+	dev_info(icd->parent,
-+		 "SuperH Mobile CEU driver detached from camera %d\n",
-+		 icd->devnum);
-+
- 	v4l2_subdev_call(csi2_sd, core, s_power, 0);
- 	if (csi2_sd)
- 		csi2_sd->grp_id = 0;
-+}
-+
-+/* Called with .host_lock held */
-+static int sh_mobile_ceu_clock_start(struct soc_camera_host *ici)
-+{
-+	struct sh_mobile_ceu_dev *pcdev = ici->priv;
-+	int ret;
-+
-+	pm_runtime_get_sync(ici->v4l2_dev.dev);
-+
-+	pcdev->buf_total = 0;
-+
-+	ret = sh_mobile_ceu_soft_reset(pcdev);
-+
-+	return 0;
-+}
-+
-+/* Called with .host_lock held */
-+static void sh_mobile_ceu_clock_stop(struct soc_camera_host *ici)
-+{
-+	struct sh_mobile_ceu_dev *pcdev = ici->priv;
-+
- 	/* disable capture, disable interrupts */
- 	ceu_write(pcdev, CEIER, 0);
- 	sh_mobile_ceu_soft_reset(pcdev);
-@@ -607,10 +621,6 @@ static void sh_mobile_ceu_remove_device(struct soc_camera_device *icd)
- 	spin_unlock_irq(&pcdev->lock);
- 
- 	pm_runtime_put(ici->v4l2_dev.dev);
--
--	dev_info(icd->parent,
--		 "SuperH Mobile CEU driver detached from camera %d\n",
--		 icd->devnum);
- }
- 
- /*
-@@ -2027,6 +2037,8 @@ static struct soc_camera_host_ops sh_mobile_ceu_host_ops = {
- 	.owner		= THIS_MODULE,
- 	.add		= sh_mobile_ceu_add_device,
- 	.remove		= sh_mobile_ceu_remove_device,
-+	.clock_start	= sh_mobile_ceu_clock_start,
-+	.clock_stop	= sh_mobile_ceu_clock_stop,
- 	.get_formats	= sh_mobile_ceu_get_formats,
- 	.put_formats	= sh_mobile_ceu_put_formats,
- 	.get_crop	= sh_mobile_ceu_get_crop,
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0062-sh_eth-check-platform-data-pointer.patch b/patches.renesas/0062-sh_eth-check-platform-data-pointer.patch
deleted file mode 100644
index 2cd219782501a..0000000000000
--- a/patches.renesas/0062-sh_eth-check-platform-data-pointer.patch
+++ /dev/null
@@ -1,40 +0,0 @@
-From afb37f872d6e7c43200edfa28e0d2bcc4dee9103 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Wed, 30 Oct 2013 23:30:19 +0300
-Subject: sh_eth: check platform data pointer
-
-Check the platform data pointer before dereferencing it and error out of the
-probe() method if it's NULL.
-
-This has additional effect of preventing kernel oops with outdated platform data
-containing zero PHY address instead (such as on SolutionEngine7710).
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Acked-by: Simon Horman <horms+renesas@verge.net.au>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit 3b4c5cbf42bda976ab70354e7786a0808265d9d5)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/net/ethernet/renesas/sh_eth.c | 6 ++++++
- 1 file changed, 6 insertions(+)
-
-diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
-index 5ffaf56a0706..8bced1c44378 100644
---- a/drivers/net/ethernet/renesas/sh_eth.c
-+++ b/drivers/net/ethernet/renesas/sh_eth.c
-@@ -2663,6 +2663,12 @@ static int sh_eth_drv_probe(struct platform_device *pdev)
- 	pm_runtime_enable(&pdev->dev);
- 	pm_runtime_resume(&pdev->dev);
- 
-+	if (!pd) {
-+		dev_err(&pdev->dev, "no platform data\n");
-+		ret = -EINVAL;
-+		goto out_release;
-+	}
-+
- 	/* get PHY ID */
- 	mdp->phy_id = pd->phy;
- 	mdp->phy_interface = pd->phy_interface;
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0063-ARM-shmobile-Add-r8a7790_register_pfc-function.patch b/patches.renesas/0063-ARM-shmobile-Add-r8a7790_register_pfc-function.patch
deleted file mode 100644
index 827723193f8fc..0000000000000
--- a/patches.renesas/0063-ARM-shmobile-Add-r8a7790_register_pfc-function.patch
+++ /dev/null
@@ -1,45 +0,0 @@
-From f1cea81115bb05dfb6e9f9c96d747abf7552f266 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Thu, 17 Oct 2013 06:51:46 +0900
-Subject: ARM: shmobile: Add r8a7790_register_pfc() function
-
-Break out the r8a7790 PFC platform device creation code
-to increase readability and follow same style as r8a7791.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 8d0b3bf79bfa1dc7d3e2a9dc2b6f2ceea353687f)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-r8a7790.c | 7 +++++--
- 1 file changed, 5 insertions(+), 2 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c
-index c47bcebbcb00..3543c3bacb75 100644
---- a/arch/arm/mach-shmobile/setup-r8a7790.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7790.c
-@@ -34,6 +34,10 @@ static const struct resource pfc_resources[] __initconst = {
- 	DEFINE_RES_MEM(0xe6060000, 0x250),
- };
- 
-+#define r8a7790_register_pfc()						\
-+	platform_device_register_simple("pfc-r8a7790", -1, pfc_resources, \
-+					ARRAY_SIZE(pfc_resources))
-+
- #define R8A7790_GPIO(idx)						\
- static const struct resource r8a7790_gpio##idx##_resources[] __initconst = { \
- 	DEFINE_RES_MEM(0xe6050000 + 0x1000 * (idx), 0x50),		\
-@@ -65,8 +69,7 @@ R8A7790_GPIO(5);
- 
- void __init r8a7790_pinmux_init(void)
- {
--	platform_device_register_simple("pfc-r8a7790", -1, pfc_resources,
--					ARRAY_SIZE(pfc_resources));
-+	r8a7790_register_pfc();
- 	r8a7790_register_gpio(0);
- 	r8a7790_register_gpio(1);
- 	r8a7790_register_gpio(2);
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0063-gpio-rcar-drop-references-to-virtual-IRQ.patch b/patches.renesas/0063-gpio-rcar-drop-references-to-virtual-IRQ.patch
deleted file mode 100644
index f703a723c7bf4..0000000000000
--- a/patches.renesas/0063-gpio-rcar-drop-references-to-virtual-IRQ.patch
+++ /dev/null
@@ -1,48 +0,0 @@
-From bec9700ceea72c20e7f80ae2c716896cc4eb1aa9 Mon Sep 17 00:00:00 2001
-From: Linus Walleij <linus.walleij@linaro.org>
-Date: Fri, 11 Oct 2013 19:43:39 +0200
-Subject: gpio: rcar: drop references to "virtual" IRQ
-
-Rename the argument "virq" to just "irq", this IRQ isn't any
-more "virtual" than any other Linux IRQ number, we use "hwirq"
-for the actual hw-numbers, "virq" is just bogus.
-
-Cc: Magnus Damm <damm@opensource.se>
-Acked-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-(cherry picked from commit c0d6c1ad0ad8fa1b7c2148ba918fd5d64a51166a)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpio/gpio-rcar.c | 12 ++++++------
- 1 file changed, 6 insertions(+), 6 deletions(-)
-
-diff --git a/drivers/gpio/gpio-rcar.c b/drivers/gpio/gpio-rcar.c
-index 0be07f22cb10..ce1c14b16bf3 100644
---- a/drivers/gpio/gpio-rcar.c
-+++ b/drivers/gpio/gpio-rcar.c
-@@ -266,16 +266,16 @@ static int gpio_rcar_to_irq(struct gpio_chip *chip, unsigned offset)
- 	return irq_create_mapping(gpio_to_priv(chip)->irq_domain, offset);
- }
- 
--static int gpio_rcar_irq_domain_map(struct irq_domain *h, unsigned int virq,
--				 irq_hw_number_t hw)
-+static int gpio_rcar_irq_domain_map(struct irq_domain *h, unsigned int irq,
-+				 irq_hw_number_t hwirq)
- {
- 	struct gpio_rcar_priv *p = h->host_data;
- 
--	dev_dbg(&p->pdev->dev, "map hw irq = %d, virq = %d\n", (int)hw, virq);
-+	dev_dbg(&p->pdev->dev, "map hw irq = %d, irq = %d\n", (int)hwirq, irq);
- 
--	irq_set_chip_data(virq, h->host_data);
--	irq_set_chip_and_handler(virq, &p->irq_chip, handle_level_irq);
--	set_irq_flags(virq, IRQF_VALID); /* kill me now */
-+	irq_set_chip_data(irq, h->host_data);
-+	irq_set_chip_and_handler(irq, &p->irq_chip, handle_level_irq);
-+	set_irq_flags(irq, IRQF_VALID); /* kill me now */
- 	return 0;
- }
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0063-media-sh-mobile-ceu-camera-add-primitive-OF-support.patch b/patches.renesas/0063-media-sh-mobile-ceu-camera-add-primitive-OF-support.patch
deleted file mode 100644
index fbb1e127405c7..0000000000000
--- a/patches.renesas/0063-media-sh-mobile-ceu-camera-add-primitive-OF-support.patch
+++ /dev/null
@@ -1,139 +0,0 @@
-From ebe5f6eafcfdc6e8af99577a4ce98356e751662e Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Mon, 17 Sep 2012 07:42:55 -0300
-Subject: [media] sh-mobile-ceu-camera: add primitive OF support
-
-Add an OF hook to sh_mobile_ceu_camera.c, no properties so far. Booting
-with DT also requires platform data to be optional.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
-(cherry picked from commit f146e4e79a6f5d457553dfe2ac66b93c7a39f676)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- .../platform/soc_camera/sh_mobile_ceu_camera.c     | 33 +++++++++++++++-------
- 1 file changed, 23 insertions(+), 10 deletions(-)
-
-diff --git a/drivers/media/platform/soc_camera/sh_mobile_ceu_camera.c b/drivers/media/platform/soc_camera/sh_mobile_ceu_camera.c
-index 9037472e..fcc13d8e 100644
---- a/drivers/media/platform/soc_camera/sh_mobile_ceu_camera.c
-+++ b/drivers/media/platform/soc_camera/sh_mobile_ceu_camera.c
-@@ -27,6 +27,7 @@
- #include <linux/kernel.h>
- #include <linux/mm.h>
- #include <linux/moduleparam.h>
-+#include <linux/of.h>
- #include <linux/time.h>
- #include <linux/slab.h>
- #include <linux/device.h>
-@@ -118,6 +119,7 @@ struct sh_mobile_ceu_dev {
- 
- 	enum v4l2_field field;
- 	int sequence;
-+	unsigned long flags;
- 
- 	unsigned int image_mode:1;
- 	unsigned int is_16bit:1;
-@@ -706,7 +708,7 @@ static void sh_mobile_ceu_set_rect(struct soc_camera_device *icd)
- 	}
- 
- 	/* CSI2 special configuration */
--	if (pcdev->pdata->csi2) {
-+	if (pcdev->csi2_pdev) {
- 		in_width = ((in_width - 2) * 2);
- 		left_offset *= 2;
- 	}
-@@ -810,7 +812,7 @@ static int sh_mobile_ceu_set_bus_param(struct soc_camera_device *icd)
- 	/* Make choises, based on platform preferences */
- 	if ((common_flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH) &&
- 	    (common_flags & V4L2_MBUS_HSYNC_ACTIVE_LOW)) {
--		if (pcdev->pdata->flags & SH_CEU_FLAG_HSYNC_LOW)
-+		if (pcdev->flags & SH_CEU_FLAG_HSYNC_LOW)
- 			common_flags &= ~V4L2_MBUS_HSYNC_ACTIVE_HIGH;
- 		else
- 			common_flags &= ~V4L2_MBUS_HSYNC_ACTIVE_LOW;
-@@ -818,7 +820,7 @@ static int sh_mobile_ceu_set_bus_param(struct soc_camera_device *icd)
- 
- 	if ((common_flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH) &&
- 	    (common_flags & V4L2_MBUS_VSYNC_ACTIVE_LOW)) {
--		if (pcdev->pdata->flags & SH_CEU_FLAG_VSYNC_LOW)
-+		if (pcdev->flags & SH_CEU_FLAG_VSYNC_LOW)
- 			common_flags &= ~V4L2_MBUS_VSYNC_ACTIVE_HIGH;
- 		else
- 			common_flags &= ~V4L2_MBUS_VSYNC_ACTIVE_LOW;
-@@ -873,11 +875,11 @@ static int sh_mobile_ceu_set_bus_param(struct soc_camera_device *icd)
- 	value |= common_flags & V4L2_MBUS_VSYNC_ACTIVE_LOW ? 1 << 1 : 0;
- 	value |= common_flags & V4L2_MBUS_HSYNC_ACTIVE_LOW ? 1 << 0 : 0;
- 
--	if (pcdev->pdata->csi2) /* CSI2 mode */
-+	if (pcdev->csi2_pdev) /* CSI2 mode */
- 		value |= 3 << 12;
- 	else if (pcdev->is_16bit)
- 		value |= 1 << 12;
--	else if (pcdev->pdata->flags & SH_CEU_FLAG_LOWER_8BIT)
-+	else if (pcdev->flags & SH_CEU_FLAG_LOWER_8BIT)
- 		value |= 2 << 12;
- 
- 	ceu_write(pcdev, CAMCR, value);
-@@ -1052,7 +1054,7 @@ static int sh_mobile_ceu_get_formats(struct soc_camera_device *icd, unsigned int
- 		return 0;
- 	}
- 
--	if (!pcdev->pdata->csi2) {
-+	if (!pcdev->pdata || !pcdev->pdata->csi2) {
- 		/* Are there any restrictions in the CSI-2 case? */
- 		ret = sh_mobile_ceu_try_bus_param(icd, fmt->bits_per_sample);
- 		if (ret < 0)
-@@ -2107,13 +2109,17 @@ static int sh_mobile_ceu_probe(struct platform_device *pdev)
- 	init_completion(&pcdev->complete);
- 
- 	pcdev->pdata = pdev->dev.platform_data;
--	if (!pcdev->pdata) {
-+	if (!pcdev->pdata && !pdev->dev.of_node) {
- 		dev_err(&pdev->dev, "CEU platform data not set.\n");
- 		return -EINVAL;
- 	}
- 
--	pcdev->max_width = pcdev->pdata->max_width ? : 2560;
--	pcdev->max_height = pcdev->pdata->max_height ? : 1920;
-+	/* TODO: implement per-device bus flags */
-+	if (pcdev->pdata) {
-+		pcdev->max_width = pcdev->pdata->max_width ? : 2560;
-+		pcdev->max_height = pcdev->pdata->max_height ? : 1920;
-+		pcdev->flags = pcdev->pdata->flags;
-+	}
- 
- 	base = devm_ioremap_resource(&pdev->dev, res);
- 	if (IS_ERR(base))
-@@ -2168,7 +2174,7 @@ static int sh_mobile_ceu_probe(struct platform_device *pdev)
- 		goto exit_free_ctx;
- 
- 	/* CSI2 interfacing */
--	csi2 = pcdev->pdata->csi2;
-+	csi2 = pcdev->pdata ? pcdev->pdata->csi2 : NULL;
- 	if (csi2) {
- 		struct platform_device *csi2_pdev =
- 			platform_device_alloc("sh-mobile-csi2", csi2->id);
-@@ -2290,10 +2296,17 @@ static const struct dev_pm_ops sh_mobile_ceu_dev_pm_ops = {
- 	.runtime_resume = sh_mobile_ceu_runtime_nop,
- };
- 
-+static const struct of_device_id sh_mobile_ceu_of_match[] = {
-+	{ .compatible = "renesas,sh-mobile-ceu" },
-+	{ }
-+};
-+MODULE_DEVICE_TABLE(of, sh_mobile_ceu_of_match);
-+
- static struct platform_driver sh_mobile_ceu_driver = {
- 	.driver		= {
- 		.name	= "sh_mobile_ceu",
- 		.pm	= &sh_mobile_ceu_dev_pm_ops,
-+		.of_match_table = sh_mobile_ceu_of_match,
- 	},
- 	.probe		= sh_mobile_ceu_probe,
- 	.remove		= sh_mobile_ceu_remove,
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0064-ARM-shmobile-r8a7779-camera-rcar-header-cleanup.patch b/patches.renesas/0064-ARM-shmobile-r8a7779-camera-rcar-header-cleanup.patch
deleted file mode 100644
index 91b11f20d5db9..0000000000000
--- a/patches.renesas/0064-ARM-shmobile-r8a7779-camera-rcar-header-cleanup.patch
+++ /dev/null
@@ -1,45 +0,0 @@
-From 25b8451b27d8d3065376771fb2f1a2461b7a07d7 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Thu, 31 Oct 2013 18:00:03 -0700
-Subject: ARM: shmobile: r8a7779: camera-rcar header cleanup
-
-<linux/platform_data/camera-rcar.h> is needed on Marzen,
-not setup-r8a7779.c
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 2f3927e815e82874af76db51f8d2c2a596bc6cee)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-marzen.c         | 1 +
- arch/arm/mach-shmobile/include/mach/r8a7779.h | 1 -
- 2 files changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/board-marzen.c b/arch/arm/mach-shmobile/board-marzen.c
-index fa102f7d149c..4f9e3ec42ddc 100644
---- a/arch/arm/mach-shmobile/board-marzen.c
-+++ b/arch/arm/mach-shmobile/board-marzen.c
-@@ -29,6 +29,7 @@
- #include <linux/leds.h>
- #include <linux/dma-mapping.h>
- #include <linux/pinctrl/machine.h>
-+#include <linux/platform_data/camera-rcar.h>
- #include <linux/platform_data/gpio-rcar.h>
- #include <linux/platform_data/rcar-du.h>
- #include <linux/platform_data/usb-rcar-phy.h>
-diff --git a/arch/arm/mach-shmobile/include/mach/r8a7779.h b/arch/arm/mach-shmobile/include/mach/r8a7779.h
-index 905420a2f11f..1cab247ff255 100644
---- a/arch/arm/mach-shmobile/include/mach/r8a7779.h
-+++ b/arch/arm/mach-shmobile/include/mach/r8a7779.h
-@@ -4,7 +4,6 @@
- #include <linux/sh_clk.h>
- #include <linux/pm_domain.h>
- #include <linux/sh_eth.h>
--#include <linux/platform_data/camera-rcar.h>
- 
- /* HPB-DMA slave IDs */
- enum {
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0064-gpio-rcar-Include-linux-of.h-header.patch b/patches.renesas/0064-gpio-rcar-Include-linux-of.h-header.patch
deleted file mode 100644
index 118ddf6cb7ec1..0000000000000
--- a/patches.renesas/0064-gpio-rcar-Include-linux-of.h-header.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From fdfdc54bb926e1c5771a1ef3fade144d75793f28 Mon Sep 17 00:00:00 2001
-From: Sachin Kamat <sachin.kamat@linaro.org>
-Date: Wed, 16 Oct 2013 15:35:02 +0530
-Subject: gpio: rcar: Include linux/of.h header
-
-'of_match_ptr' is defined in linux/of.h. Include it explicitly to
-avoid build breakage in the future.
-
-Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-(cherry picked from commit bd0bf46844ad79c1360eebc73bf6f1e4c31b39fb)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/gpio/gpio-rcar.c | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/drivers/gpio/gpio-rcar.c b/drivers/gpio/gpio-rcar.c
-index ce1c14b16bf3..11faf316c814 100644
---- a/drivers/gpio/gpio-rcar.c
-+++ b/drivers/gpio/gpio-rcar.c
-@@ -22,6 +22,7 @@
- #include <linux/irq.h>
- #include <linux/irqdomain.h>
- #include <linux/module.h>
-+#include <linux/of.h>
- #include <linux/pinctrl/consumer.h>
- #include <linux/platform_data/gpio-rcar.h>
- #include <linux/platform_device.h>
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0064-media-sh-mobile-ceu-driver-support-max-width-and-hei.patch b/patches.renesas/0064-media-sh-mobile-ceu-driver-support-max-width-and-hei.patch
deleted file mode 100644
index 294d10e934d87..0000000000000
--- a/patches.renesas/0064-media-sh-mobile-ceu-driver-support-max-width-and-hei.patch
+++ /dev/null
@@ -1,84 +0,0 @@
-From 8b35032af7aa5e67ed88ceb5d66f7a95490083c5 Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Mon, 17 Sep 2012 07:48:33 -0300
-Subject: [media] sh-mobile-ceu-driver: support max width and height in DT
-
-Some CEU implementations have non-standard (larger) maximum supported
-width and height values. Add two OF properties to specify them.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
-(cherry picked from commit 812e8b22ea55218449de310a666dd1ce16f924ed)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- .../devicetree/bindings/media/sh_mobile_ceu.txt    | 18 +++++++++++++++++
- .../platform/soc_camera/sh_mobile_ceu_camera.c     | 23 ++++++++++++++++++++--
- 2 files changed, 39 insertions(+), 2 deletions(-)
- create mode 100644 Documentation/devicetree/bindings/media/sh_mobile_ceu.txt
-
-diff --git a/Documentation/devicetree/bindings/media/sh_mobile_ceu.txt b/Documentation/devicetree/bindings/media/sh_mobile_ceu.txt
-new file mode 100644
-index 00000000..1ce4e46b
---- /dev/null
-+++ b/Documentation/devicetree/bindings/media/sh_mobile_ceu.txt
-@@ -0,0 +1,18 @@
-+Bindings, specific for the sh_mobile_ceu_camera.c driver:
-+ - compatible: Should be "renesas,sh-mobile-ceu"
-+ - reg: register base and size
-+ - interrupts: the interrupt number
-+ - interrupt-parent: the interrupt controller
-+ - renesas,max-width: maximum image width, supported on this SoC
-+ - renesas,max-height: maximum image height, supported on this SoC
-+
-+Example:
-+
-+ceu0: ceu@0xfe910000 {
-+	compatible = "renesas,sh-mobile-ceu";
-+	reg = <0xfe910000 0xa0>;
-+	interrupt-parent = <&intcs>;
-+	interrupts = <0x880>;
-+	renesas,max-width = <8188>;
-+	renesas,max-height = <8188>;
-+};
-diff --git a/drivers/media/platform/soc_camera/sh_mobile_ceu_camera.c b/drivers/media/platform/soc_camera/sh_mobile_ceu_camera.c
-index fcc13d8e..b0f0995f 100644
---- a/drivers/media/platform/soc_camera/sh_mobile_ceu_camera.c
-+++ b/drivers/media/platform/soc_camera/sh_mobile_ceu_camera.c
-@@ -2116,11 +2116,30 @@ static int sh_mobile_ceu_probe(struct platform_device *pdev)
- 
- 	/* TODO: implement per-device bus flags */
- 	if (pcdev->pdata) {
--		pcdev->max_width = pcdev->pdata->max_width ? : 2560;
--		pcdev->max_height = pcdev->pdata->max_height ? : 1920;
-+		pcdev->max_width = pcdev->pdata->max_width;
-+		pcdev->max_height = pcdev->pdata->max_height;
- 		pcdev->flags = pcdev->pdata->flags;
- 	}
- 
-+	if (!pcdev->max_width) {
-+		unsigned int v;
-+		err = of_property_read_u32(pdev->dev.of_node, "renesas,max-width", &v);
-+		if (!err)
-+			pcdev->max_width = v;
-+
-+		if (!pcdev->max_width)
-+			pcdev->max_width = 2560;
-+	}
-+	if (!pcdev->max_height) {
-+		unsigned int v;
-+		err = of_property_read_u32(pdev->dev.of_node, "renesas,max-height", &v);
-+		if (!err)
-+			pcdev->max_height = v;
-+
-+		if (!pcdev->max_height)
-+			pcdev->max_height = 1920;
-+	}
-+
- 	base = devm_ioremap_resource(&pdev->dev, res);
- 	if (IS_ERR(base))
- 		return PTR_ERR(base);
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0065-ARM-shmobile-r8a7790-Correct-typo-in-clocks.patch b/patches.renesas/0065-ARM-shmobile-r8a7790-Correct-typo-in-clocks.patch
deleted file mode 100644
index e284afdd2fdc2..0000000000000
--- a/patches.renesas/0065-ARM-shmobile-r8a7790-Correct-typo-in-clocks.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From 05e4a9447c71bbfc04c84a218c3257c8555d91c1 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Wed, 6 Nov 2013 13:58:55 +0900
-Subject: ARM: shmobile: r8a7790: Correct typo in clocks
-
-This is the r8a7790 SoC not the r8a77a4 SoC and
-clocks are updated in r8a7790_clock_init not r8a73a4_clock_init.
-
-Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 7d947813d4dbb8cfee0ed2c75b27f65cb2c54434)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r8a7790.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
-index a64f965c7da1..fa1b4773677a 100644
---- a/arch/arm/mach-shmobile/clock-r8a7790.c
-+++ b/arch/arm/mach-shmobile/clock-r8a7790.c
-@@ -77,7 +77,7 @@ static struct sh_clk_ops followparent_clk_ops = {
- };
- 
- static struct clk main_clk = {
--	/* .parent will be set r8a73a4_clock_init */
-+	/* .parent will be set r8a7790_clock_init */
- 	.ops	= &followparent_clk_ops,
- };
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0065-i2c-sh_mobile-Convert-to-clk_prepare-unprepare.patch b/patches.renesas/0065-i2c-sh_mobile-Convert-to-clk_prepare-unprepare.patch
deleted file mode 100644
index 3f40c0fe9d101..0000000000000
--- a/patches.renesas/0065-i2c-sh_mobile-Convert-to-clk_prepare-unprepare.patch
+++ /dev/null
@@ -1,59 +0,0 @@
-From bf13ce07d60de51545eb44fbae163ac831937985 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Mon, 28 Oct 2013 23:49:23 +0100
-Subject: i2c: sh_mobile: Convert to clk_prepare/unprepare
-
-Turn clk_enable() and clk_disable() calls into clk_prepare_enable() and
-clk_disable_unprepare() to get ready for the migration to the common
-clock framework.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-(cherry picked from commit f887605d25c1514b06b1a0e0477f85f27f23664d)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/i2c/busses/i2c-sh_mobile.c | 8 ++++----
- 1 file changed, 4 insertions(+), 4 deletions(-)
-
-diff --git a/drivers/i2c/busses/i2c-sh_mobile.c b/drivers/i2c/busses/i2c-sh_mobile.c
-index debf745c0268..10a83ca6f8ca 100644
---- a/drivers/i2c/busses/i2c-sh_mobile.c
-+++ b/drivers/i2c/busses/i2c-sh_mobile.c
-@@ -236,7 +236,7 @@ static void sh_mobile_i2c_init(struct sh_mobile_i2c_data *pd)
- 	int offset;
- 
- 	/* Get clock rate after clock is enabled */
--	clk_enable(pd->clk);
-+	clk_prepare_enable(pd->clk);
- 	i2c_clk_khz = clk_get_rate(pd->clk) / 1000;
- 	i2c_clk_khz /= pd->clks_per_count;
- 
-@@ -271,14 +271,14 @@ static void sh_mobile_i2c_init(struct sh_mobile_i2c_data *pd)
- 		pd->icic &= ~ICIC_ICCHB8;
- 
- out:
--	clk_disable(pd->clk);
-+	clk_disable_unprepare(pd->clk);
- }
- 
- static void activate_ch(struct sh_mobile_i2c_data *pd)
- {
- 	/* Wake up device and enable clock */
- 	pm_runtime_get_sync(pd->dev);
--	clk_enable(pd->clk);
-+	clk_prepare_enable(pd->clk);
- 
- 	/* Enable channel and configure rx ack */
- 	iic_set_clr(pd, ICCR, ICCR_ICE, 0);
-@@ -301,7 +301,7 @@ static void deactivate_ch(struct sh_mobile_i2c_data *pd)
- 	iic_set_clr(pd, ICCR, 0, ICCR_ICE);
- 
- 	/* Disable clock and mark device as idle */
--	clk_disable(pd->clk);
-+	clk_disable_unprepare(pd->clk);
- 	pm_runtime_put_sync(pd->dev);
- }
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0065-media-V4L2-sh_mobile_ceu_camera-remove-CEU-specific-.patch b/patches.renesas/0065-media-V4L2-sh_mobile_ceu_camera-remove-CEU-specific-.patch
deleted file mode 100644
index 1c09affcfb772..0000000000000
--- a/patches.renesas/0065-media-V4L2-sh_mobile_ceu_camera-remove-CEU-specific-.patch
+++ /dev/null
@@ -1,363 +0,0 @@
-From 4861e6a9682168926310f0431b9ad5ee0e0dad0b Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Wed, 24 Apr 2013 11:15:30 -0300
-Subject: [media] V4L2: sh_mobile_ceu_camera: remove CEU specific data from
- generic functions
-
-Several functions in the sh_mobile_ceu_camera driver implement generic
-algorithms and can be re-used by other V4L2 camera host drivers too. These
-functions attempt to optimise scaling and cropping functions of the
-subdevice, e.g. a camera sensor. This patch makes those functions generic
-for future re-use by other camera host drivers.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
-(cherry picked from commit eca430c83d3b63df52024d114b7641bd03482f38)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- .../platform/soc_camera/sh_mobile_ceu_camera.c     | 130 +++++++++++----------
- 1 file changed, 71 insertions(+), 59 deletions(-)
-
-diff --git a/drivers/media/platform/soc_camera/sh_mobile_ceu_camera.c b/drivers/media/platform/soc_camera/sh_mobile_ceu_camera.c
-index b0f0995f..56ba7de7 100644
---- a/drivers/media/platform/soc_camera/sh_mobile_ceu_camera.c
-+++ b/drivers/media/platform/soc_camera/sh_mobile_ceu_camera.c
-@@ -996,7 +996,7 @@ static bool sh_mobile_ceu_packing_supported(const struct soc_mbus_pixelfmt *fmt)
- 		 fmt->packing == SOC_MBUS_PACKING_EXTEND16);
- }
- 
--static int client_g_rect(struct v4l2_subdev *sd, struct v4l2_rect *rect);
-+static int soc_camera_client_g_rect(struct v4l2_subdev *sd, struct v4l2_rect *rect);
- 
- static struct soc_camera_device *ctrl_to_icd(struct v4l2_ctrl *ctrl)
- {
-@@ -1075,7 +1075,7 @@ static int sh_mobile_ceu_get_formats(struct soc_camera_device *icd, unsigned int
- 		/* FIXME: subwindow is lost between close / open */
- 
- 		/* Cache current client geometry */
--		ret = client_g_rect(sd, &rect);
-+		ret = soc_camera_client_g_rect(sd, &rect);
- 		if (ret < 0)
- 			return ret;
- 
-@@ -1199,18 +1199,23 @@ static bool is_inside(const struct v4l2_rect *r1, const struct v4l2_rect *r2)
- 		r1->top + r1->height < r2->top + r2->height;
- }
- 
--static unsigned int scale_down(unsigned int size, unsigned int scale)
-+static unsigned int soc_camera_shift_scale(unsigned int size, unsigned int shift,
-+					   unsigned int scale)
- {
--	return (size * 4096 + scale / 2) / scale;
-+	return ((size << shift) + scale / 2) / scale;
- }
- 
--static unsigned int calc_generic_scale(unsigned int input, unsigned int output)
-+static unsigned int soc_camera_calc_scale(unsigned int input, unsigned int shift,
-+					  unsigned int output)
- {
--	return (input * 4096 + output / 2) / output;
-+	return soc_camera_shift_scale(input, shift, output);
- }
- 
-+#define scale_down(size, scale) soc_camera_shift_scale(size, 12, scale)
-+#define calc_generic_scale(in, out) soc_camera_shift_scale(in, 12, out)
-+
- /* Get and store current client crop */
--static int client_g_rect(struct v4l2_subdev *sd, struct v4l2_rect *rect)
-+static int soc_camera_client_g_rect(struct v4l2_subdev *sd, struct v4l2_rect *rect)
- {
- 	struct v4l2_crop crop;
- 	struct v4l2_cropcap cap;
-@@ -1235,10 +1240,8 @@ static int client_g_rect(struct v4l2_subdev *sd, struct v4l2_rect *rect)
- }
- 
- /* Client crop has changed, update our sub-rectangle to remain within the area */
--static void update_subrect(struct sh_mobile_ceu_cam *cam)
-+static void update_subrect(struct v4l2_rect *rect, struct v4l2_rect *subrect)
- {
--	struct v4l2_rect *rect = &cam->rect, *subrect = &cam->subrect;
--
- 	if (rect->width < subrect->width)
- 		subrect->width = rect->width;
- 
-@@ -1266,19 +1269,18 @@ static void update_subrect(struct sh_mobile_ceu_cam *cam)
-  * 2. if (1) failed, try to double the client image until we get one big enough
-  * 3. if (2) failed, try to request the maximum image
-  */
--static int client_s_crop(struct soc_camera_device *icd, struct v4l2_crop *crop,
--			 struct v4l2_crop *cam_crop)
-+static int soc_camera_client_s_crop(struct v4l2_subdev *sd,
-+			struct v4l2_crop *crop, struct v4l2_crop *cam_crop,
-+			struct v4l2_rect *target_rect, struct v4l2_rect *subrect)
- {
--	struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
- 	struct v4l2_rect *rect = &crop->c, *cam_rect = &cam_crop->c;
- 	struct device *dev = sd->v4l2_dev->dev;
--	struct sh_mobile_ceu_cam *cam = icd->host_priv;
- 	struct v4l2_cropcap cap;
- 	int ret;
- 	unsigned int width, height;
- 
- 	v4l2_subdev_call(sd, video, s_crop, crop);
--	ret = client_g_rect(sd, cam_rect);
-+	ret = soc_camera_client_g_rect(sd, cam_rect);
- 	if (ret < 0)
- 		return ret;
- 
-@@ -1290,7 +1292,7 @@ static int client_s_crop(struct soc_camera_device *icd, struct v4l2_crop *crop,
- 		/* Even if camera S_CROP failed, but camera rectangle matches */
- 		dev_dbg(dev, "Camera S_CROP successful for %dx%d@%d:%d\n",
- 			rect->width, rect->height, rect->left, rect->top);
--		cam->rect = *cam_rect;
-+		*target_rect = *cam_rect;
- 		return 0;
- 	}
- 
-@@ -1356,7 +1358,7 @@ static int client_s_crop(struct soc_camera_device *icd, struct v4l2_crop *crop,
- 				cam_rect->top;
- 
- 		v4l2_subdev_call(sd, video, s_crop, cam_crop);
--		ret = client_g_rect(sd, cam_rect);
-+		ret = soc_camera_client_g_rect(sd, cam_rect);
- 		dev_geo(dev, "Camera S_CROP %d for %dx%d@%d:%d\n", ret,
- 			cam_rect->width, cam_rect->height,
- 			cam_rect->left, cam_rect->top);
-@@ -1370,15 +1372,15 @@ static int client_s_crop(struct soc_camera_device *icd, struct v4l2_crop *crop,
- 		 */
- 		*cam_rect = cap.bounds;
- 		v4l2_subdev_call(sd, video, s_crop, cam_crop);
--		ret = client_g_rect(sd, cam_rect);
-+		ret = soc_camera_client_g_rect(sd, cam_rect);
- 		dev_geo(dev, "Camera S_CROP %d for max %dx%d@%d:%d\n", ret,
- 			cam_rect->width, cam_rect->height,
- 			cam_rect->left, cam_rect->top);
- 	}
- 
- 	if (!ret) {
--		cam->rect = *cam_rect;
--		update_subrect(cam);
-+		*target_rect = *cam_rect;
-+		update_subrect(target_rect, subrect);
- 	}
- 
- 	return ret;
-@@ -1386,15 +1388,13 @@ static int client_s_crop(struct soc_camera_device *icd, struct v4l2_crop *crop,
- 
- /* Iterative s_mbus_fmt, also updates cached client crop on success */
- static int client_s_fmt(struct soc_camera_device *icd,
--			struct v4l2_mbus_framefmt *mf, bool ceu_can_scale)
-+			struct v4l2_rect *rect, struct v4l2_rect *subrect,
-+			unsigned int max_width, unsigned int max_height,
-+			struct v4l2_mbus_framefmt *mf, bool host_can_scale)
- {
--	struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
--	struct sh_mobile_ceu_dev *pcdev = ici->priv;
--	struct sh_mobile_ceu_cam *cam = icd->host_priv;
- 	struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
- 	struct device *dev = icd->parent;
- 	unsigned int width = mf->width, height = mf->height, tmp_w, tmp_h;
--	unsigned int max_width, max_height;
- 	struct v4l2_cropcap cap;
- 	bool ceu_1to1;
- 	int ret;
-@@ -1414,7 +1414,7 @@ static int client_s_fmt(struct soc_camera_device *icd,
- 	}
- 
- 	ceu_1to1 = false;
--	if (!ceu_can_scale)
-+	if (!host_can_scale)
- 		goto update_cache;
- 
- 	cap.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
-@@ -1423,8 +1423,10 @@ static int client_s_fmt(struct soc_camera_device *icd,
- 	if (ret < 0)
- 		return ret;
- 
--	max_width = min(cap.bounds.width, pcdev->max_width);
--	max_height = min(cap.bounds.height, pcdev->max_height);
-+	if (max_width > cap.bounds.width)
-+		max_width = cap.bounds.width;
-+	if (max_height > cap.bounds.height)
-+		max_height = cap.bounds.height;
- 
- 	/* Camera set a format, but geometry is not precise, try to improve */
- 	tmp_w = mf->width;
-@@ -1451,29 +1453,36 @@ static int client_s_fmt(struct soc_camera_device *icd,
- 
- update_cache:
- 	/* Update cache */
--	ret = client_g_rect(sd, &cam->rect);
-+	ret = soc_camera_client_g_rect(sd, rect);
- 	if (ret < 0)
- 		return ret;
- 
- 	if (ceu_1to1)
--		cam->subrect = cam->rect;
-+		*subrect = *rect;
- 	else
--		update_subrect(cam);
-+		update_subrect(rect, subrect);
- 
- 	return 0;
- }
- 
- /**
-- * @width	- on output: user width, mapped back to input
-- * @height	- on output: user height, mapped back to input
-+ * @icd		- soc-camera device
-+ * @rect	- camera cropping window
-+ * @subrect	- part of rect, sent to the user
-  * @mf		- in- / output camera output window
-+ * @width	- on input: max host input width
-+ *		  on output: user width, mapped back to input
-+ * @height	- on input: max host input height
-+ *		  on output: user height, mapped back to input
-+ * @host_can_scale - host can scale this pixel format
-+ * @shift	- shift, used for scaling
-  */
--static int client_scale(struct soc_camera_device *icd,
-+static int soc_camera_client_scale(struct soc_camera_device *icd,
-+			struct v4l2_rect *rect, struct v4l2_rect *subrect,
- 			struct v4l2_mbus_framefmt *mf,
- 			unsigned int *width, unsigned int *height,
--			bool ceu_can_scale)
-+			bool host_can_scale, unsigned int shift)
- {
--	struct sh_mobile_ceu_cam *cam = icd->host_priv;
- 	struct device *dev = icd->parent;
- 	struct v4l2_mbus_framefmt mf_tmp = *mf;
- 	unsigned int scale_h, scale_v;
-@@ -1483,7 +1492,8 @@ static int client_scale(struct soc_camera_device *icd,
- 	 * 5. Apply iterative camera S_FMT for camera user window (also updates
- 	 *    client crop cache and the imaginary sub-rectangle).
- 	 */
--	ret = client_s_fmt(icd, &mf_tmp, ceu_can_scale);
-+	ret = client_s_fmt(icd, rect, subrect, *width, *height,
-+			   &mf_tmp, host_can_scale);
- 	if (ret < 0)
- 		return ret;
- 
-@@ -1495,8 +1505,8 @@ static int client_scale(struct soc_camera_device *icd,
- 	/* unneeded - it is already in "mf_tmp" */
- 
- 	/* 7. Calculate new client scales. */
--	scale_h = calc_generic_scale(cam->rect.width, mf_tmp.width);
--	scale_v = calc_generic_scale(cam->rect.height, mf_tmp.height);
-+	scale_h = soc_camera_calc_scale(rect->width, shift, mf_tmp.width);
-+	scale_v = soc_camera_calc_scale(rect->height, shift, mf_tmp.height);
- 
- 	mf->width	= mf_tmp.width;
- 	mf->height	= mf_tmp.height;
-@@ -1506,8 +1516,8 @@ static int client_scale(struct soc_camera_device *icd,
- 	 * 8. Calculate new CEU crop - apply camera scales to previously
- 	 *    updated "effective" crop.
- 	 */
--	*width = scale_down(cam->subrect.width, scale_h);
--	*height = scale_down(cam->subrect.height, scale_v);
-+	*width = soc_camera_shift_scale(subrect->width, shift, scale_h);
-+	*height = soc_camera_shift_scale(subrect->height, shift, scale_v);
- 
- 	dev_geo(dev, "8: new client sub-window %ux%u\n", *width, *height);
- 
-@@ -1550,7 +1560,8 @@ static int sh_mobile_ceu_set_crop(struct soc_camera_device *icd,
- 	 * 1. - 2. Apply iterative camera S_CROP for new input window, read back
- 	 * actual camera rectangle.
- 	 */
--	ret = client_s_crop(icd, &a_writable, &cam_crop);
-+	ret = soc_camera_client_s_crop(sd, &a_writable, &cam_crop,
-+				       &cam->rect, &cam->subrect);
- 	if (ret < 0)
- 		return ret;
- 
-@@ -1674,16 +1685,16 @@ static int sh_mobile_ceu_get_crop(struct soc_camera_device *icd,
-  * client crop. New scales are calculated from the requested output format and
-  * CEU crop, mapped backed onto the client input (subrect).
-  */
--static void calculate_client_output(struct soc_camera_device *icd,
--		const struct v4l2_pix_format *pix, struct v4l2_mbus_framefmt *mf)
-+static void soc_camera_calc_client_output(struct soc_camera_device *icd,
-+		struct v4l2_rect *rect, struct v4l2_rect *subrect,
-+		const struct v4l2_pix_format *pix, struct v4l2_mbus_framefmt *mf,
-+		unsigned int shift)
- {
--	struct sh_mobile_ceu_cam *cam = icd->host_priv;
- 	struct device *dev = icd->parent;
--	struct v4l2_rect *cam_subrect = &cam->subrect;
- 	unsigned int scale_v, scale_h;
- 
--	if (cam_subrect->width == cam->rect.width &&
--	    cam_subrect->height == cam->rect.height) {
-+	if (subrect->width == rect->width &&
-+	    subrect->height == rect->height) {
- 		/* No sub-cropping */
- 		mf->width	= pix->width;
- 		mf->height	= pix->height;
-@@ -1693,8 +1704,8 @@ static void calculate_client_output(struct soc_camera_device *icd,
- 	/* 1.-2. Current camera scales and subwin - cached. */
- 
- 	dev_geo(dev, "2: subwin %ux%u@%u:%u\n",
--		cam_subrect->width, cam_subrect->height,
--		cam_subrect->left, cam_subrect->top);
-+		subrect->width, subrect->height,
-+		subrect->left, subrect->top);
- 
- 	/*
- 	 * 3. Calculate new combined scales from input sub-window to requested
-@@ -1705,8 +1716,8 @@ static void calculate_client_output(struct soc_camera_device *icd,
- 	 * TODO: CEU cannot scale images larger than VGA to smaller than SubQCIF
- 	 * (128x96) or larger than VGA
- 	 */
--	scale_h = calc_generic_scale(cam_subrect->width, pix->width);
--	scale_v = calc_generic_scale(cam_subrect->height, pix->height);
-+	scale_h = soc_camera_calc_scale(subrect->width, shift, pix->width);
-+	scale_v = soc_camera_calc_scale(subrect->height, shift, pix->height);
- 
- 	dev_geo(dev, "3: scales %u:%u\n", scale_h, scale_v);
- 
-@@ -1714,8 +1725,8 @@ static void calculate_client_output(struct soc_camera_device *icd,
- 	 * 4. Calculate desired client output window by applying combined scales
- 	 *    to client (real) input window.
- 	 */
--	mf->width	= scale_down(cam->rect.width, scale_h);
--	mf->height	= scale_down(cam->rect.height, scale_v);
-+	mf->width = soc_camera_shift_scale(rect->width, shift, scale_h);
-+	mf->height = soc_camera_shift_scale(rect->height, shift, scale_v);
- }
- 
- /* Similar to set_crop multistage iterative algorithm */
-@@ -1730,8 +1741,8 @@ static int sh_mobile_ceu_set_fmt(struct soc_camera_device *icd,
- 	struct v4l2_mbus_framefmt mf;
- 	__u32 pixfmt = pix->pixelformat;
- 	const struct soc_camera_format_xlate *xlate;
--	/* Keep Compiler Happy */
--	unsigned int ceu_sub_width = 0, ceu_sub_height = 0;
-+	unsigned int ceu_sub_width = pcdev->max_width,
-+		ceu_sub_height = pcdev->max_height;
- 	u16 scale_v, scale_h;
- 	int ret;
- 	bool image_mode;
-@@ -1758,7 +1769,7 @@ static int sh_mobile_ceu_set_fmt(struct soc_camera_device *icd,
- 	}
- 
- 	/* 1.-4. Calculate desired client output geometry */
--	calculate_client_output(icd, pix, &mf);
-+	soc_camera_calc_client_output(icd, &cam->rect, &cam->subrect, pix, &mf, 12);
- 	mf.field	= pix->field;
- 	mf.colorspace	= pix->colorspace;
- 	mf.code		= xlate->code;
-@@ -1780,8 +1791,9 @@ static int sh_mobile_ceu_set_fmt(struct soc_camera_device *icd,
- 	dev_geo(dev, "4: request camera output %ux%u\n", mf.width, mf.height);
- 
- 	/* 5. - 9. */
--	ret = client_scale(icd, &mf, &ceu_sub_width, &ceu_sub_height,
--			   image_mode && V4L2_FIELD_NONE == field);
-+	ret = soc_camera_client_scale(icd, &cam->rect, &cam->subrect,
-+				&mf, &ceu_sub_width, &ceu_sub_height,
-+				image_mode && V4L2_FIELD_NONE == field, 12);
- 
- 	dev_geo(dev, "5-9: client scale return %d\n", ret);
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0066-ARM-shmobile-r8a7779-cleanup-registration-of-sh_eth.patch b/patches.renesas/0066-ARM-shmobile-r8a7779-cleanup-registration-of-sh_eth.patch
deleted file mode 100644
index f73c011fa3792..0000000000000
--- a/patches.renesas/0066-ARM-shmobile-r8a7779-cleanup-registration-of-sh_eth.patch
+++ /dev/null
@@ -1,87 +0,0 @@
-From 4fb28ed5f3c1f4cc0e97710e3aba8be69840595e Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Mon, 11 Nov 2013 20:23:36 -0800
-Subject: ARM: shmobile: r8a7779: cleanup registration of sh_eth
-
-sh_eth driver which needs platform data at the time of
-registration is not used.
-Now, ARM/shmobile aims to support DT,
-and the C code base board support will be removed
-if DT support is completed.
-Current driver registration method which needs platform data
-and which is not shared complicates codes.
-This means legacy C code cleanup after DT supporting
-will be more complicated
-This patch removes r8a7779_add_ether_device()
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit be15182068582bc38281329d86d106adaca63fda)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/include/mach/r8a7779.h |  2 --
- arch/arm/mach-shmobile/setup-r8a7779.c        | 20 --------------------
- 2 files changed, 22 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/include/mach/r8a7779.h b/arch/arm/mach-shmobile/include/mach/r8a7779.h
-index 1cab247ff255..5014145f272e 100644
---- a/arch/arm/mach-shmobile/include/mach/r8a7779.h
-+++ b/arch/arm/mach-shmobile/include/mach/r8a7779.h
-@@ -3,7 +3,6 @@
- 
- #include <linux/sh_clk.h>
- #include <linux/pm_domain.h>
--#include <linux/sh_eth.h>
- 
- /* HPB-DMA slave IDs */
- enum {
-@@ -39,7 +38,6 @@ extern void r8a7779_earlytimer_init(void);
- extern void r8a7779_add_early_devices(void);
- extern void r8a7779_add_standard_devices(void);
- extern void r8a7779_add_standard_devices_dt(void);
--extern void r8a7779_add_ether_device(struct sh_eth_plat_data *pdata);
- extern void r8a7779_init_late(void);
- extern void r8a7779_clock_init(void);
- extern void r8a7779_pinmux_init(void);
-diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c
-index 51a43c52c611..8f9453152fb9 100644
---- a/arch/arm/mach-shmobile/setup-r8a7779.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7779.c
-@@ -598,18 +598,6 @@ static struct platform_device ohci1_device = {
- 	.resource	= ohci1_resources,
- };
- 
--/* Ether */
--static struct resource ether_resources[] __initdata = {
--	{
--		.start	= 0xfde00000,
--		.end	= 0xfde003ff,
--		.flags	= IORESOURCE_MEM,
--	}, {
--		.start	= gic_iid(0xb4),
--		.flags	= IORESOURCE_IRQ,
--	},
--};
--
- /* HPB-DMA */
- 
- /* Asynchronous mode register bits */
-@@ -798,14 +786,6 @@ void __init r8a7779_add_standard_devices(void)
- 	r8a7779_register_hpb_dmae();
- }
- 
--void __init r8a7779_add_ether_device(struct sh_eth_plat_data *pdata)
--{
--	platform_device_register_resndata(&platform_bus, "r8a777x-ether", -1,
--					  ether_resources,
--					  ARRAY_SIZE(ether_resources),
--					  pdata, sizeof(*pdata));
--}
--
- /* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */
- void __init __weak r8a7779_register_twd(void) { }
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0066-i2c-rcar-cosmetic-remove-superfluous-parenthesis.patch b/patches.renesas/0066-i2c-rcar-cosmetic-remove-superfluous-parenthesis.patch
deleted file mode 100644
index 1256411645d37..0000000000000
--- a/patches.renesas/0066-i2c-rcar-cosmetic-remove-superfluous-parenthesis.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From 601aad4e26bd59aa73e171b48373afd46a9f4ae7 Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Thu, 12 Sep 2013 14:36:44 +0200
-Subject: i2c: rcar: (cosmetic) remove superfluous parenthesis
-
-A recent patch added even more superfluous parenthesis to those, which
-already were there. Remove them again.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-(cherry picked from commit 14d32f1794fd559e12f27e8b5c57053073bd75aa)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/i2c/busses/i2c-rcar.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/i2c/busses/i2c-rcar.c b/drivers/i2c/busses/i2c-rcar.c
-index 18e033735113..e295f6044dbb 100644
---- a/drivers/i2c/busses/i2c-rcar.c
-+++ b/drivers/i2c/busses/i2c-rcar.c
-@@ -306,7 +306,7 @@ scgd_find:
- 	/*
- 	 * keep icccr value
- 	 */
--	priv->icccr = (scgd << (cdf_width) | cdf);
-+	priv->icccr = scgd << cdf_width | cdf;
- 
- 	return 0;
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0066-media-V4L2-soc-camera-move-generic-functions-into-a-.patch b/patches.renesas/0066-media-V4L2-soc-camera-move-generic-functions-into-a-.patch
deleted file mode 100644
index 6bc034f7338f8..0000000000000
--- a/patches.renesas/0066-media-V4L2-soc-camera-move-generic-functions-into-a-.patch
+++ /dev/null
@@ -1,945 +0,0 @@
-From eba55652c12f0dd8c6eb46610dfacf616b67079e Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Thu, 25 Apr 2013 08:18:45 -0300
-Subject: [media] V4L2: soc-camera: move generic functions into a separate file
-
-The sh_mobile_ceu_camera driver implements a generic algorithm for setting
-up an optimal client and host scaling and cropping configuration. This
-patch makes those functions available for all drivers.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
-(cherry picked from commit 22e0099ac9a968a4a67fc681864a9ff453bd929f)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/media/platform/soc_camera/Kconfig          |   4 +
- drivers/media/platform/soc_camera/Makefile         |   4 +
- .../platform/soc_camera/sh_mobile_ceu_camera.c     | 391 +-------------------
- drivers/media/platform/soc_camera/soc_scale_crop.c | 401 +++++++++++++++++++++
- drivers/media/platform/soc_camera/soc_scale_crop.h |  47 +++
- 5 files changed, 459 insertions(+), 388 deletions(-)
- create mode 100644 drivers/media/platform/soc_camera/soc_scale_crop.c
- create mode 100644 drivers/media/platform/soc_camera/soc_scale_crop.h
-
-diff --git a/drivers/media/platform/soc_camera/Kconfig b/drivers/media/platform/soc_camera/Kconfig
-index b139b525..99f1952d 100644
---- a/drivers/media/platform/soc_camera/Kconfig
-+++ b/drivers/media/platform/soc_camera/Kconfig
-@@ -8,6 +8,9 @@ config SOC_CAMERA
- 	  over a bus like PCI or USB. For example some i2c camera connected
- 	  directly to the data bus of an SoC.
- 
-+config SOC_CAMERA_SCALE_CROP
-+	tristate
-+
- config SOC_CAMERA_PLATFORM
- 	tristate "platform camera support"
- 	depends on SOC_CAMERA
-@@ -55,6 +58,7 @@ config VIDEO_SH_MOBILE_CEU
- 	tristate "SuperH Mobile CEU Interface driver"
- 	depends on VIDEO_DEV && SOC_CAMERA && HAS_DMA && HAVE_CLK
- 	select VIDEOBUF2_DMA_CONTIG
-+	select SOC_CAMERA_SCALE_CROP
- 	---help---
- 	  This is a v4l2 driver for the SuperH Mobile CEU Interface
- 
-diff --git a/drivers/media/platform/soc_camera/Makefile b/drivers/media/platform/soc_camera/Makefile
-index 136b7f8f..7ff714c6 100644
---- a/drivers/media/platform/soc_camera/Makefile
-+++ b/drivers/media/platform/soc_camera/Makefile
-@@ -1,4 +1,8 @@
- obj-$(CONFIG_SOC_CAMERA)		+= soc_camera.o soc_mediabus.o
-+obj-$(CONFIG_SOC_CAMERA_SCALE_CROP)	+= soc_scale_crop.o
-+
-+# a platform subdevice driver stub, allowing to support cameras by adding a
-+# couple of callback functions to the board code
- obj-$(CONFIG_SOC_CAMERA_PLATFORM)	+= soc_camera_platform.o
- 
- # soc-camera host drivers have to be linked after camera drivers
-diff --git a/drivers/media/platform/soc_camera/sh_mobile_ceu_camera.c b/drivers/media/platform/soc_camera/sh_mobile_ceu_camera.c
-index 56ba7de7..905ed7e5 100644
---- a/drivers/media/platform/soc_camera/sh_mobile_ceu_camera.c
-+++ b/drivers/media/platform/soc_camera/sh_mobile_ceu_camera.c
-@@ -45,6 +45,8 @@
- #include <media/v4l2-mediabus.h>
- #include <media/soc_mediabus.h>
- 
-+#include "soc_scale_crop.h"
-+
- /* register offsets for sh7722 / sh7723 */
- 
- #define CAPSR  0x00 /* Capture start register */
-@@ -996,8 +998,6 @@ static bool sh_mobile_ceu_packing_supported(const struct soc_mbus_pixelfmt *fmt)
- 		 fmt->packing == SOC_MBUS_PACKING_EXTEND16);
- }
- 
--static int soc_camera_client_g_rect(struct v4l2_subdev *sd, struct v4l2_rect *rect);
--
- static struct soc_camera_device *ctrl_to_icd(struct v4l2_ctrl *ctrl)
- {
- 	return container_of(ctrl->handler, struct soc_camera_device,
-@@ -1185,344 +1185,8 @@ static void sh_mobile_ceu_put_formats(struct soc_camera_device *icd)
- 	icd->host_priv = NULL;
- }
- 
--/* Check if any dimension of r1 is smaller than respective one of r2 */
--static bool is_smaller(const struct v4l2_rect *r1, const struct v4l2_rect *r2)
--{
--	return r1->width < r2->width || r1->height < r2->height;
--}
--
--/* Check if r1 fails to cover r2 */
--static bool is_inside(const struct v4l2_rect *r1, const struct v4l2_rect *r2)
--{
--	return r1->left > r2->left || r1->top > r2->top ||
--		r1->left + r1->width < r2->left + r2->width ||
--		r1->top + r1->height < r2->top + r2->height;
--}
--
--static unsigned int soc_camera_shift_scale(unsigned int size, unsigned int shift,
--					   unsigned int scale)
--{
--	return ((size << shift) + scale / 2) / scale;
--}
--
--static unsigned int soc_camera_calc_scale(unsigned int input, unsigned int shift,
--					  unsigned int output)
--{
--	return soc_camera_shift_scale(input, shift, output);
--}
--
- #define scale_down(size, scale) soc_camera_shift_scale(size, 12, scale)
--#define calc_generic_scale(in, out) soc_camera_shift_scale(in, 12, out)
--
--/* Get and store current client crop */
--static int soc_camera_client_g_rect(struct v4l2_subdev *sd, struct v4l2_rect *rect)
--{
--	struct v4l2_crop crop;
--	struct v4l2_cropcap cap;
--	int ret;
--
--	crop.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
--
--	ret = v4l2_subdev_call(sd, video, g_crop, &crop);
--	if (!ret) {
--		*rect = crop.c;
--		return ret;
--	}
--
--	/* Camera driver doesn't support .g_crop(), assume default rectangle */
--	cap.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
--
--	ret = v4l2_subdev_call(sd, video, cropcap, &cap);
--	if (!ret)
--		*rect = cap.defrect;
--
--	return ret;
--}
--
--/* Client crop has changed, update our sub-rectangle to remain within the area */
--static void update_subrect(struct v4l2_rect *rect, struct v4l2_rect *subrect)
--{
--	if (rect->width < subrect->width)
--		subrect->width = rect->width;
--
--	if (rect->height < subrect->height)
--		subrect->height = rect->height;
--
--	if (rect->left > subrect->left)
--		subrect->left = rect->left;
--	else if (rect->left + rect->width >
--		 subrect->left + subrect->width)
--		subrect->left = rect->left + rect->width -
--			subrect->width;
--
--	if (rect->top > subrect->top)
--		subrect->top = rect->top;
--	else if (rect->top + rect->height >
--		 subrect->top + subrect->height)
--		subrect->top = rect->top + rect->height -
--			subrect->height;
--}
--
--/*
-- * The common for both scaling and cropping iterative approach is:
-- * 1. try if the client can produce exactly what requested by the user
-- * 2. if (1) failed, try to double the client image until we get one big enough
-- * 3. if (2) failed, try to request the maximum image
-- */
--static int soc_camera_client_s_crop(struct v4l2_subdev *sd,
--			struct v4l2_crop *crop, struct v4l2_crop *cam_crop,
--			struct v4l2_rect *target_rect, struct v4l2_rect *subrect)
--{
--	struct v4l2_rect *rect = &crop->c, *cam_rect = &cam_crop->c;
--	struct device *dev = sd->v4l2_dev->dev;
--	struct v4l2_cropcap cap;
--	int ret;
--	unsigned int width, height;
--
--	v4l2_subdev_call(sd, video, s_crop, crop);
--	ret = soc_camera_client_g_rect(sd, cam_rect);
--	if (ret < 0)
--		return ret;
--
--	/*
--	 * Now cam_crop contains the current camera input rectangle, and it must
--	 * be within camera cropcap bounds
--	 */
--	if (!memcmp(rect, cam_rect, sizeof(*rect))) {
--		/* Even if camera S_CROP failed, but camera rectangle matches */
--		dev_dbg(dev, "Camera S_CROP successful for %dx%d@%d:%d\n",
--			rect->width, rect->height, rect->left, rect->top);
--		*target_rect = *cam_rect;
--		return 0;
--	}
--
--	/* Try to fix cropping, that camera hasn't managed to set */
--	dev_geo(dev, "Fix camera S_CROP for %dx%d@%d:%d to %dx%d@%d:%d\n",
--		cam_rect->width, cam_rect->height,
--		cam_rect->left, cam_rect->top,
--		rect->width, rect->height, rect->left, rect->top);
--
--	/* We need sensor maximum rectangle */
--	ret = v4l2_subdev_call(sd, video, cropcap, &cap);
--	if (ret < 0)
--		return ret;
--
--	/* Put user requested rectangle within sensor bounds */
--	soc_camera_limit_side(&rect->left, &rect->width, cap.bounds.left, 2,
--			      cap.bounds.width);
--	soc_camera_limit_side(&rect->top, &rect->height, cap.bounds.top, 4,
--			      cap.bounds.height);
--
--	/*
--	 * Popular special case - some cameras can only handle fixed sizes like
--	 * QVGA, VGA,... Take care to avoid infinite loop.
--	 */
--	width = max(cam_rect->width, 2);
--	height = max(cam_rect->height, 2);
--
--	/*
--	 * Loop as long as sensor is not covering the requested rectangle and
--	 * is still within its bounds
--	 */
--	while (!ret && (is_smaller(cam_rect, rect) ||
--			is_inside(cam_rect, rect)) &&
--	       (cap.bounds.width > width || cap.bounds.height > height)) {
--
--		width *= 2;
--		height *= 2;
--
--		cam_rect->width = width;
--		cam_rect->height = height;
--
--		/*
--		 * We do not know what capabilities the camera has to set up
--		 * left and top borders. We could try to be smarter in iterating
--		 * them, e.g., if camera current left is to the right of the
--		 * target left, set it to the middle point between the current
--		 * left and minimum left. But that would add too much
--		 * complexity: we would have to iterate each border separately.
--		 * Instead we just drop to the left and top bounds.
--		 */
--		if (cam_rect->left > rect->left)
--			cam_rect->left = cap.bounds.left;
--
--		if (cam_rect->left + cam_rect->width < rect->left + rect->width)
--			cam_rect->width = rect->left + rect->width -
--				cam_rect->left;
--
--		if (cam_rect->top > rect->top)
--			cam_rect->top = cap.bounds.top;
--
--		if (cam_rect->top + cam_rect->height < rect->top + rect->height)
--			cam_rect->height = rect->top + rect->height -
--				cam_rect->top;
--
--		v4l2_subdev_call(sd, video, s_crop, cam_crop);
--		ret = soc_camera_client_g_rect(sd, cam_rect);
--		dev_geo(dev, "Camera S_CROP %d for %dx%d@%d:%d\n", ret,
--			cam_rect->width, cam_rect->height,
--			cam_rect->left, cam_rect->top);
--	}
--
--	/* S_CROP must not modify the rectangle */
--	if (is_smaller(cam_rect, rect) || is_inside(cam_rect, rect)) {
--		/*
--		 * The camera failed to configure a suitable cropping,
--		 * we cannot use the current rectangle, set to max
--		 */
--		*cam_rect = cap.bounds;
--		v4l2_subdev_call(sd, video, s_crop, cam_crop);
--		ret = soc_camera_client_g_rect(sd, cam_rect);
--		dev_geo(dev, "Camera S_CROP %d for max %dx%d@%d:%d\n", ret,
--			cam_rect->width, cam_rect->height,
--			cam_rect->left, cam_rect->top);
--	}
--
--	if (!ret) {
--		*target_rect = *cam_rect;
--		update_subrect(target_rect, subrect);
--	}
--
--	return ret;
--}
--
--/* Iterative s_mbus_fmt, also updates cached client crop on success */
--static int client_s_fmt(struct soc_camera_device *icd,
--			struct v4l2_rect *rect, struct v4l2_rect *subrect,
--			unsigned int max_width, unsigned int max_height,
--			struct v4l2_mbus_framefmt *mf, bool host_can_scale)
--{
--	struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
--	struct device *dev = icd->parent;
--	unsigned int width = mf->width, height = mf->height, tmp_w, tmp_h;
--	struct v4l2_cropcap cap;
--	bool ceu_1to1;
--	int ret;
--
--	ret = v4l2_device_call_until_err(sd->v4l2_dev,
--					 soc_camera_grp_id(icd), video,
--					 s_mbus_fmt, mf);
--	if (ret < 0)
--		return ret;
--
--	dev_geo(dev, "camera scaled to %ux%u\n", mf->width, mf->height);
--
--	if (width == mf->width && height == mf->height) {
--		/* Perfect! The client has done it all. */
--		ceu_1to1 = true;
--		goto update_cache;
--	}
--
--	ceu_1to1 = false;
--	if (!host_can_scale)
--		goto update_cache;
--
--	cap.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
--
--	ret = v4l2_subdev_call(sd, video, cropcap, &cap);
--	if (ret < 0)
--		return ret;
--
--	if (max_width > cap.bounds.width)
--		max_width = cap.bounds.width;
--	if (max_height > cap.bounds.height)
--		max_height = cap.bounds.height;
--
--	/* Camera set a format, but geometry is not precise, try to improve */
--	tmp_w = mf->width;
--	tmp_h = mf->height;
--
--	/* width <= max_width && height <= max_height - guaranteed by try_fmt */
--	while ((width > tmp_w || height > tmp_h) &&
--	       tmp_w < max_width && tmp_h < max_height) {
--		tmp_w = min(2 * tmp_w, max_width);
--		tmp_h = min(2 * tmp_h, max_height);
--		mf->width = tmp_w;
--		mf->height = tmp_h;
--		ret = v4l2_device_call_until_err(sd->v4l2_dev,
--					soc_camera_grp_id(icd), video,
--					s_mbus_fmt, mf);
--		dev_geo(dev, "Camera scaled to %ux%u\n",
--			mf->width, mf->height);
--		if (ret < 0) {
--			/* This shouldn't happen */
--			dev_err(dev, "Client failed to set format: %d\n", ret);
--			return ret;
--		}
--	}
--
--update_cache:
--	/* Update cache */
--	ret = soc_camera_client_g_rect(sd, rect);
--	if (ret < 0)
--		return ret;
--
--	if (ceu_1to1)
--		*subrect = *rect;
--	else
--		update_subrect(rect, subrect);
--
--	return 0;
--}
--
--/**
-- * @icd		- soc-camera device
-- * @rect	- camera cropping window
-- * @subrect	- part of rect, sent to the user
-- * @mf		- in- / output camera output window
-- * @width	- on input: max host input width
-- *		  on output: user width, mapped back to input
-- * @height	- on input: max host input height
-- *		  on output: user height, mapped back to input
-- * @host_can_scale - host can scale this pixel format
-- * @shift	- shift, used for scaling
-- */
--static int soc_camera_client_scale(struct soc_camera_device *icd,
--			struct v4l2_rect *rect, struct v4l2_rect *subrect,
--			struct v4l2_mbus_framefmt *mf,
--			unsigned int *width, unsigned int *height,
--			bool host_can_scale, unsigned int shift)
--{
--	struct device *dev = icd->parent;
--	struct v4l2_mbus_framefmt mf_tmp = *mf;
--	unsigned int scale_h, scale_v;
--	int ret;
--
--	/*
--	 * 5. Apply iterative camera S_FMT for camera user window (also updates
--	 *    client crop cache and the imaginary sub-rectangle).
--	 */
--	ret = client_s_fmt(icd, rect, subrect, *width, *height,
--			   &mf_tmp, host_can_scale);
--	if (ret < 0)
--		return ret;
--
--	dev_geo(dev, "5: camera scaled to %ux%u\n",
--		mf_tmp.width, mf_tmp.height);
--
--	/* 6. Retrieve camera output window (g_fmt) */
--
--	/* unneeded - it is already in "mf_tmp" */
--
--	/* 7. Calculate new client scales. */
--	scale_h = soc_camera_calc_scale(rect->width, shift, mf_tmp.width);
--	scale_v = soc_camera_calc_scale(rect->height, shift, mf_tmp.height);
--
--	mf->width	= mf_tmp.width;
--	mf->height	= mf_tmp.height;
--	mf->colorspace	= mf_tmp.colorspace;
--
--	/*
--	 * 8. Calculate new CEU crop - apply camera scales to previously
--	 *    updated "effective" crop.
--	 */
--	*width = soc_camera_shift_scale(subrect->width, shift, scale_h);
--	*height = soc_camera_shift_scale(subrect->height, shift, scale_v);
--
--	dev_geo(dev, "8: new client sub-window %ux%u\n", *width, *height);
--
--	return 0;
--}
-+#define calc_generic_scale(in, out) soc_camera_calc_scale(in, 12, out)
- 
- /*
-  * CEU can scale and crop, but we don't want to waste bandwidth and kill the
-@@ -1680,55 +1344,6 @@ static int sh_mobile_ceu_get_crop(struct soc_camera_device *icd,
- 	return 0;
- }
- 
--/*
-- * Calculate real client output window by applying new scales to the current
-- * client crop. New scales are calculated from the requested output format and
-- * CEU crop, mapped backed onto the client input (subrect).
-- */
--static void soc_camera_calc_client_output(struct soc_camera_device *icd,
--		struct v4l2_rect *rect, struct v4l2_rect *subrect,
--		const struct v4l2_pix_format *pix, struct v4l2_mbus_framefmt *mf,
--		unsigned int shift)
--{
--	struct device *dev = icd->parent;
--	unsigned int scale_v, scale_h;
--
--	if (subrect->width == rect->width &&
--	    subrect->height == rect->height) {
--		/* No sub-cropping */
--		mf->width	= pix->width;
--		mf->height	= pix->height;
--		return;
--	}
--
--	/* 1.-2. Current camera scales and subwin - cached. */
--
--	dev_geo(dev, "2: subwin %ux%u@%u:%u\n",
--		subrect->width, subrect->height,
--		subrect->left, subrect->top);
--
--	/*
--	 * 3. Calculate new combined scales from input sub-window to requested
--	 *    user window.
--	 */
--
--	/*
--	 * TODO: CEU cannot scale images larger than VGA to smaller than SubQCIF
--	 * (128x96) or larger than VGA
--	 */
--	scale_h = soc_camera_calc_scale(subrect->width, shift, pix->width);
--	scale_v = soc_camera_calc_scale(subrect->height, shift, pix->height);
--
--	dev_geo(dev, "3: scales %u:%u\n", scale_h, scale_v);
--
--	/*
--	 * 4. Calculate desired client output window by applying combined scales
--	 *    to client (real) input window.
--	 */
--	mf->width = soc_camera_shift_scale(rect->width, shift, scale_h);
--	mf->height = soc_camera_shift_scale(rect->height, shift, scale_v);
--}
--
- /* Similar to set_crop multistage iterative algorithm */
- static int sh_mobile_ceu_set_fmt(struct soc_camera_device *icd,
- 				 struct v4l2_format *f)
-diff --git a/drivers/media/platform/soc_camera/soc_scale_crop.c b/drivers/media/platform/soc_camera/soc_scale_crop.c
-new file mode 100644
-index 00000000..be7067f5
---- /dev/null
-+++ b/drivers/media/platform/soc_camera/soc_scale_crop.c
-@@ -0,0 +1,401 @@
-+/*
-+ * soc-camera generic scaling-cropping manipulation functions
-+ *
-+ * Copyright (C) 2013 Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ */
-+
-+#include <linux/device.h>
-+#include <linux/module.h>
-+
-+#include <media/soc_camera.h>
-+#include <media/v4l2-common.h>
-+
-+#include "soc_scale_crop.h"
-+
-+#ifdef DEBUG_GEOMETRY
-+#define dev_geo	dev_info
-+#else
-+#define dev_geo	dev_dbg
-+#endif
-+
-+/* Check if any dimension of r1 is smaller than respective one of r2 */
-+static bool is_smaller(const struct v4l2_rect *r1, const struct v4l2_rect *r2)
-+{
-+	return r1->width < r2->width || r1->height < r2->height;
-+}
-+
-+/* Check if r1 fails to cover r2 */
-+static bool is_inside(const struct v4l2_rect *r1, const struct v4l2_rect *r2)
-+{
-+	return r1->left > r2->left || r1->top > r2->top ||
-+		r1->left + r1->width < r2->left + r2->width ||
-+		r1->top + r1->height < r2->top + r2->height;
-+}
-+
-+/* Get and store current client crop */
-+int soc_camera_client_g_rect(struct v4l2_subdev *sd, struct v4l2_rect *rect)
-+{
-+	struct v4l2_crop crop;
-+	struct v4l2_cropcap cap;
-+	int ret;
-+
-+	crop.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
-+
-+	ret = v4l2_subdev_call(sd, video, g_crop, &crop);
-+	if (!ret) {
-+		*rect = crop.c;
-+		return ret;
-+	}
-+
-+	/* Camera driver doesn't support .g_crop(), assume default rectangle */
-+	cap.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
-+
-+	ret = v4l2_subdev_call(sd, video, cropcap, &cap);
-+	if (!ret)
-+		*rect = cap.defrect;
-+
-+	return ret;
-+}
-+EXPORT_SYMBOL(soc_camera_client_g_rect);
-+
-+/* Client crop has changed, update our sub-rectangle to remain within the area */
-+static void update_subrect(struct v4l2_rect *rect, struct v4l2_rect *subrect)
-+{
-+	if (rect->width < subrect->width)
-+		subrect->width = rect->width;
-+
-+	if (rect->height < subrect->height)
-+		subrect->height = rect->height;
-+
-+	if (rect->left > subrect->left)
-+		subrect->left = rect->left;
-+	else if (rect->left + rect->width >
-+		 subrect->left + subrect->width)
-+		subrect->left = rect->left + rect->width -
-+			subrect->width;
-+
-+	if (rect->top > subrect->top)
-+		subrect->top = rect->top;
-+	else if (rect->top + rect->height >
-+		 subrect->top + subrect->height)
-+		subrect->top = rect->top + rect->height -
-+			subrect->height;
-+}
-+
-+/*
-+ * The common for both scaling and cropping iterative approach is:
-+ * 1. try if the client can produce exactly what requested by the user
-+ * 2. if (1) failed, try to double the client image until we get one big enough
-+ * 3. if (2) failed, try to request the maximum image
-+ */
-+int soc_camera_client_s_crop(struct v4l2_subdev *sd,
-+			struct v4l2_crop *crop, struct v4l2_crop *cam_crop,
-+			struct v4l2_rect *target_rect, struct v4l2_rect *subrect)
-+{
-+	struct v4l2_rect *rect = &crop->c, *cam_rect = &cam_crop->c;
-+	struct device *dev = sd->v4l2_dev->dev;
-+	struct v4l2_cropcap cap;
-+	int ret;
-+	unsigned int width, height;
-+
-+	v4l2_subdev_call(sd, video, s_crop, crop);
-+	ret = soc_camera_client_g_rect(sd, cam_rect);
-+	if (ret < 0)
-+		return ret;
-+
-+	/*
-+	 * Now cam_crop contains the current camera input rectangle, and it must
-+	 * be within camera cropcap bounds
-+	 */
-+	if (!memcmp(rect, cam_rect, sizeof(*rect))) {
-+		/* Even if camera S_CROP failed, but camera rectangle matches */
-+		dev_dbg(dev, "Camera S_CROP successful for %dx%d@%d:%d\n",
-+			rect->width, rect->height, rect->left, rect->top);
-+		*target_rect = *cam_rect;
-+		return 0;
-+	}
-+
-+	/* Try to fix cropping, that camera hasn't managed to set */
-+	dev_geo(dev, "Fix camera S_CROP for %dx%d@%d:%d to %dx%d@%d:%d\n",
-+		cam_rect->width, cam_rect->height,
-+		cam_rect->left, cam_rect->top,
-+		rect->width, rect->height, rect->left, rect->top);
-+
-+	/* We need sensor maximum rectangle */
-+	ret = v4l2_subdev_call(sd, video, cropcap, &cap);
-+	if (ret < 0)
-+		return ret;
-+
-+	/* Put user requested rectangle within sensor bounds */
-+	soc_camera_limit_side(&rect->left, &rect->width, cap.bounds.left, 2,
-+			      cap.bounds.width);
-+	soc_camera_limit_side(&rect->top, &rect->height, cap.bounds.top, 4,
-+			      cap.bounds.height);
-+
-+	/*
-+	 * Popular special case - some cameras can only handle fixed sizes like
-+	 * QVGA, VGA,... Take care to avoid infinite loop.
-+	 */
-+	width = max(cam_rect->width, 2);
-+	height = max(cam_rect->height, 2);
-+
-+	/*
-+	 * Loop as long as sensor is not covering the requested rectangle and
-+	 * is still within its bounds
-+	 */
-+	while (!ret && (is_smaller(cam_rect, rect) ||
-+			is_inside(cam_rect, rect)) &&
-+	       (cap.bounds.width > width || cap.bounds.height > height)) {
-+
-+		width *= 2;
-+		height *= 2;
-+
-+		cam_rect->width = width;
-+		cam_rect->height = height;
-+
-+		/*
-+		 * We do not know what capabilities the camera has to set up
-+		 * left and top borders. We could try to be smarter in iterating
-+		 * them, e.g., if camera current left is to the right of the
-+		 * target left, set it to the middle point between the current
-+		 * left and minimum left. But that would add too much
-+		 * complexity: we would have to iterate each border separately.
-+		 * Instead we just drop to the left and top bounds.
-+		 */
-+		if (cam_rect->left > rect->left)
-+			cam_rect->left = cap.bounds.left;
-+
-+		if (cam_rect->left + cam_rect->width < rect->left + rect->width)
-+			cam_rect->width = rect->left + rect->width -
-+				cam_rect->left;
-+
-+		if (cam_rect->top > rect->top)
-+			cam_rect->top = cap.bounds.top;
-+
-+		if (cam_rect->top + cam_rect->height < rect->top + rect->height)
-+			cam_rect->height = rect->top + rect->height -
-+				cam_rect->top;
-+
-+		v4l2_subdev_call(sd, video, s_crop, cam_crop);
-+		ret = soc_camera_client_g_rect(sd, cam_rect);
-+		dev_geo(dev, "Camera S_CROP %d for %dx%d@%d:%d\n", ret,
-+			cam_rect->width, cam_rect->height,
-+			cam_rect->left, cam_rect->top);
-+	}
-+
-+	/* S_CROP must not modify the rectangle */
-+	if (is_smaller(cam_rect, rect) || is_inside(cam_rect, rect)) {
-+		/*
-+		 * The camera failed to configure a suitable cropping,
-+		 * we cannot use the current rectangle, set to max
-+		 */
-+		*cam_rect = cap.bounds;
-+		v4l2_subdev_call(sd, video, s_crop, cam_crop);
-+		ret = soc_camera_client_g_rect(sd, cam_rect);
-+		dev_geo(dev, "Camera S_CROP %d for max %dx%d@%d:%d\n", ret,
-+			cam_rect->width, cam_rect->height,
-+			cam_rect->left, cam_rect->top);
-+	}
-+
-+	if (!ret) {
-+		*target_rect = *cam_rect;
-+		update_subrect(target_rect, subrect);
-+	}
-+
-+	return ret;
-+}
-+EXPORT_SYMBOL(soc_camera_client_s_crop);
-+
-+/* Iterative s_mbus_fmt, also updates cached client crop on success */
-+static int client_s_fmt(struct soc_camera_device *icd,
-+			struct v4l2_rect *rect, struct v4l2_rect *subrect,
-+			unsigned int max_width, unsigned int max_height,
-+			struct v4l2_mbus_framefmt *mf, bool host_can_scale)
-+{
-+	struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
-+	struct device *dev = icd->parent;
-+	unsigned int width = mf->width, height = mf->height, tmp_w, tmp_h;
-+	struct v4l2_cropcap cap;
-+	bool ceu_1to1;
-+	int ret;
-+
-+	ret = v4l2_device_call_until_err(sd->v4l2_dev,
-+					 soc_camera_grp_id(icd), video,
-+					 s_mbus_fmt, mf);
-+	if (ret < 0)
-+		return ret;
-+
-+	dev_geo(dev, "camera scaled to %ux%u\n", mf->width, mf->height);
-+
-+	if (width == mf->width && height == mf->height) {
-+		/* Perfect! The client has done it all. */
-+		ceu_1to1 = true;
-+		goto update_cache;
-+	}
-+
-+	ceu_1to1 = false;
-+	if (!host_can_scale)
-+		goto update_cache;
-+
-+	cap.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
-+
-+	ret = v4l2_subdev_call(sd, video, cropcap, &cap);
-+	if (ret < 0)
-+		return ret;
-+
-+	if (max_width > cap.bounds.width)
-+		max_width = cap.bounds.width;
-+	if (max_height > cap.bounds.height)
-+		max_height = cap.bounds.height;
-+
-+	/* Camera set a format, but geometry is not precise, try to improve */
-+	tmp_w = mf->width;
-+	tmp_h = mf->height;
-+
-+	/* width <= max_width && height <= max_height - guaranteed by try_fmt */
-+	while ((width > tmp_w || height > tmp_h) &&
-+	       tmp_w < max_width && tmp_h < max_height) {
-+		tmp_w = min(2 * tmp_w, max_width);
-+		tmp_h = min(2 * tmp_h, max_height);
-+		mf->width = tmp_w;
-+		mf->height = tmp_h;
-+		ret = v4l2_device_call_until_err(sd->v4l2_dev,
-+					soc_camera_grp_id(icd), video,
-+					s_mbus_fmt, mf);
-+		dev_geo(dev, "Camera scaled to %ux%u\n",
-+			mf->width, mf->height);
-+		if (ret < 0) {
-+			/* This shouldn't happen */
-+			dev_err(dev, "Client failed to set format: %d\n", ret);
-+			return ret;
-+		}
-+	}
-+
-+update_cache:
-+	/* Update cache */
-+	ret = soc_camera_client_g_rect(sd, rect);
-+	if (ret < 0)
-+		return ret;
-+
-+	if (ceu_1to1)
-+		*subrect = *rect;
-+	else
-+		update_subrect(rect, subrect);
-+
-+	return 0;
-+}
-+
-+/**
-+ * @icd		- soc-camera device
-+ * @rect	- camera cropping window
-+ * @subrect	- part of rect, sent to the user
-+ * @mf		- in- / output camera output window
-+ * @width	- on input: max host input width
-+ *		  on output: user width, mapped back to input
-+ * @height	- on input: max host input height
-+ *		  on output: user height, mapped back to input
-+ * @host_can_scale - host can scale this pixel format
-+ * @shift	- shift, used for scaling
-+ */
-+int soc_camera_client_scale(struct soc_camera_device *icd,
-+			struct v4l2_rect *rect, struct v4l2_rect *subrect,
-+			struct v4l2_mbus_framefmt *mf,
-+			unsigned int *width, unsigned int *height,
-+			bool host_can_scale, unsigned int shift)
-+{
-+	struct device *dev = icd->parent;
-+	struct v4l2_mbus_framefmt mf_tmp = *mf;
-+	unsigned int scale_h, scale_v;
-+	int ret;
-+
-+	/*
-+	 * 5. Apply iterative camera S_FMT for camera user window (also updates
-+	 *    client crop cache and the imaginary sub-rectangle).
-+	 */
-+	ret = client_s_fmt(icd, rect, subrect, *width, *height,
-+			   &mf_tmp, host_can_scale);
-+	if (ret < 0)
-+		return ret;
-+
-+	dev_geo(dev, "5: camera scaled to %ux%u\n",
-+		mf_tmp.width, mf_tmp.height);
-+
-+	/* 6. Retrieve camera output window (g_fmt) */
-+
-+	/* unneeded - it is already in "mf_tmp" */
-+
-+	/* 7. Calculate new client scales. */
-+	scale_h = soc_camera_calc_scale(rect->width, shift, mf_tmp.width);
-+	scale_v = soc_camera_calc_scale(rect->height, shift, mf_tmp.height);
-+
-+	mf->width	= mf_tmp.width;
-+	mf->height	= mf_tmp.height;
-+	mf->colorspace	= mf_tmp.colorspace;
-+
-+	/*
-+	 * 8. Calculate new CEU crop - apply camera scales to previously
-+	 *    updated "effective" crop.
-+	 */
-+	*width = soc_camera_shift_scale(subrect->width, shift, scale_h);
-+	*height = soc_camera_shift_scale(subrect->height, shift, scale_v);
-+
-+	dev_geo(dev, "8: new client sub-window %ux%u\n", *width, *height);
-+
-+	return 0;
-+}
-+EXPORT_SYMBOL(soc_camera_client_scale);
-+
-+/*
-+ * Calculate real client output window by applying new scales to the current
-+ * client crop. New scales are calculated from the requested output format and
-+ * CEU crop, mapped backed onto the client input (subrect).
-+ */
-+void soc_camera_calc_client_output(struct soc_camera_device *icd,
-+		struct v4l2_rect *rect, struct v4l2_rect *subrect,
-+		const struct v4l2_pix_format *pix, struct v4l2_mbus_framefmt *mf,
-+		unsigned int shift)
-+{
-+	struct device *dev = icd->parent;
-+	unsigned int scale_v, scale_h;
-+
-+	if (subrect->width == rect->width &&
-+	    subrect->height == rect->height) {
-+		/* No sub-cropping */
-+		mf->width	= pix->width;
-+		mf->height	= pix->height;
-+		return;
-+	}
-+
-+	/* 1.-2. Current camera scales and subwin - cached. */
-+
-+	dev_geo(dev, "2: subwin %ux%u@%u:%u\n",
-+		subrect->width, subrect->height,
-+		subrect->left, subrect->top);
-+
-+	/*
-+	 * 3. Calculate new combined scales from input sub-window to requested
-+	 *    user window.
-+	 */
-+
-+	/*
-+	 * TODO: CEU cannot scale images larger than VGA to smaller than SubQCIF
-+	 * (128x96) or larger than VGA
-+	 */
-+	scale_h = soc_camera_calc_scale(subrect->width, shift, pix->width);
-+	scale_v = soc_camera_calc_scale(subrect->height, shift, pix->height);
-+
-+	dev_geo(dev, "3: scales %u:%u\n", scale_h, scale_v);
-+
-+	/*
-+	 * 4. Calculate desired client output window by applying combined scales
-+	 *    to client (real) input window.
-+	 */
-+	mf->width = soc_camera_shift_scale(rect->width, shift, scale_h);
-+	mf->height = soc_camera_shift_scale(rect->height, shift, scale_v);
-+}
-+EXPORT_SYMBOL(soc_camera_calc_client_output);
-diff --git a/drivers/media/platform/soc_camera/soc_scale_crop.h b/drivers/media/platform/soc_camera/soc_scale_crop.h
-new file mode 100644
-index 00000000..184a30df
---- /dev/null
-+++ b/drivers/media/platform/soc_camera/soc_scale_crop.h
-@@ -0,0 +1,47 @@
-+/*
-+ * soc-camera generic scaling-cropping manipulation functions
-+ *
-+ * Copyright (C) 2013 Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ */
-+
-+#ifndef SOC_SCALE_CROP_H
-+#define SOC_SCALE_CROP_H
-+
-+#include <linux/kernel.h>
-+
-+struct soc_camera_device;
-+
-+struct v4l2_crop;
-+struct v4l2_mbus_framefmt;
-+struct v4l2_pix_format;
-+struct v4l2_rect;
-+struct v4l2_subdev;
-+
-+static inline unsigned int soc_camera_shift_scale(unsigned int size,
-+				unsigned int shift, unsigned int scale)
-+{
-+	return DIV_ROUND_CLOSEST(size << shift, scale);
-+}
-+
-+#define soc_camera_calc_scale(in, shift, out) soc_camera_shift_scale(in, shift, out)
-+
-+int soc_camera_client_g_rect(struct v4l2_subdev *sd, struct v4l2_rect *rect);
-+int soc_camera_client_s_crop(struct v4l2_subdev *sd,
-+			struct v4l2_crop *crop, struct v4l2_crop *cam_crop,
-+			struct v4l2_rect *target_rect, struct v4l2_rect *subrect);
-+int soc_camera_client_scale(struct soc_camera_device *icd,
-+			struct v4l2_rect *rect, struct v4l2_rect *subrect,
-+			struct v4l2_mbus_framefmt *mf,
-+			unsigned int *width, unsigned int *height,
-+			bool host_can_scale, unsigned int shift);
-+void soc_camera_calc_client_output(struct soc_camera_device *icd,
-+		struct v4l2_rect *rect, struct v4l2_rect *subrect,
-+		const struct v4l2_pix_format *pix, struct v4l2_mbus_framefmt *mf,
-+		unsigned int shift);
-+
-+#endif
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0067-ARM-shmobile-sh73a0-tidyup-clock-table-order.patch b/patches.renesas/0067-ARM-shmobile-sh73a0-tidyup-clock-table-order.patch
deleted file mode 100644
index 935abf32a8a8f..0000000000000
--- a/patches.renesas/0067-ARM-shmobile-sh73a0-tidyup-clock-table-order.patch
+++ /dev/null
@@ -1,54 +0,0 @@
-From c46d80b87952f6a4b3bf42abd6d20875119bd9b1 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Tue, 19 Nov 2013 01:04:57 -0800
-Subject: ARM: shmobile: sh73a0: tidyup clock table order
-
-SuperH lookups clock is using CLKDEV_CON/DEV/ICK_ID() macro
-for a long term.
-But in these days, the ICK clock is defined in random place.
-This patch arranges it.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 99b7835e0d9653d0cd61c2b16416556dc72b8f55)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-sh73a0.c | 14 ++++++++------
- 1 file changed, 8 insertions(+), 6 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c
-index c92c023f0d27..2aeec468cf7c 100644
---- a/arch/arm/mach-shmobile/clock-sh73a0.c
-+++ b/arch/arm/mach-shmobile/clock-sh73a0.c
-@@ -625,12 +625,6 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_CON_ID("sdhi0_clk", &div6_clks[DIV6_SDHI0]),
- 	CLKDEV_CON_ID("sdhi1_clk", &div6_clks[DIV6_SDHI1]),
- 	CLKDEV_CON_ID("sdhi2_clk", &div6_clks[DIV6_SDHI2]),
--	CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSIT]),
--	CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSIT]),
--	CLKDEV_ICK_ID("dsip_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSI0P]),
--	CLKDEV_ICK_ID("dsip_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSI1P]),
--	CLKDEV_ICK_ID("dsiphy_clk", "sh-mipi-dsi.0", &dsi0phy_clk),
--	CLKDEV_ICK_ID("dsiphy_clk", "sh-mipi-dsi.1", &dsi1phy_clk),
- 
- 	/* MSTP32 clocks */
- 	CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* I2C2 */
-@@ -680,6 +674,14 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_DEV_ID("i2c-sh_mobile.4", &mstp_clks[MSTP410]), /* I2C4 */
- 	CLKDEV_DEV_ID("e6828000.i2c", &mstp_clks[MSTP410]), /* I2C4 */
- 	CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[MSTP403]), /* KEYSC */
-+
-+	/* ICK */
-+	CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSIT]),
-+	CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSIT]),
-+	CLKDEV_ICK_ID("dsip_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSI0P]),
-+	CLKDEV_ICK_ID("dsip_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSI1P]),
-+	CLKDEV_ICK_ID("dsiphy_clk", "sh-mipi-dsi.0", &dsi0phy_clk),
-+	CLKDEV_ICK_ID("dsiphy_clk", "sh-mipi-dsi.1", &dsi1phy_clk),
- };
- 
- void __init sh73a0_clock_init(void)
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0067-i2c-rcar-get-clock-rate-only-once-and-simplify-calcu.patch b/patches.renesas/0067-i2c-rcar-get-clock-rate-only-once-and-simplify-calcu.patch
deleted file mode 100644
index 6e0d62c73e31b..0000000000000
--- a/patches.renesas/0067-i2c-rcar-get-clock-rate-only-once-and-simplify-calcu.patch
+++ /dev/null
@@ -1,68 +0,0 @@
-From b90b58f17c718c41bba0d00349e05b03c6bbddb9 Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Thu, 12 Sep 2013 14:36:45 +0200
-Subject: i2c: rcar: get clock rate only once and simplify calculation
-
-There is no need to repeatedly query clock frequency, where it is not
-expected to change. The complete loop can also trivially be replaced with
-a simple division. A further loop below the one, being simplified, could
-also be replaced, but that would get more complicated.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-(cherry picked from commit 8d0494037bb2af32a22563d40703c1263fca318d)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/i2c/busses/i2c-rcar.c | 20 +++++++++++++-------
- 1 file changed, 13 insertions(+), 7 deletions(-)
-
-diff --git a/drivers/i2c/busses/i2c-rcar.c b/drivers/i2c/busses/i2c-rcar.c
-index e295f6044dbb..39e9739f58b2 100644
---- a/drivers/i2c/busses/i2c-rcar.c
-+++ b/drivers/i2c/busses/i2c-rcar.c
-@@ -231,6 +231,7 @@ static int rcar_i2c_clock_calculate(struct rcar_i2c_priv *priv,
- 	u32 round, ick;
- 	u32 scl;
- 	u32 cdf_width;
-+	unsigned long rate;
- 
- 	if (!clkp) {
- 		dev_err(dev, "there is no peripheral_clk\n");
-@@ -264,15 +265,14 @@ static int rcar_i2c_clock_calculate(struct rcar_i2c_priv *priv,
- 	 * clkp : peripheral_clk
- 	 * F[]  : integer up-valuation
- 	 */
--	for (cdf = 0; cdf < (1 << cdf_width); cdf++) {
--		ick = clk_get_rate(clkp) / (1 + cdf);
--		if (ick < 20000000)
--			goto ick_find;
-+	rate = clk_get_rate(clkp);
-+	cdf = rate / 20000000;
-+	if (cdf >= 1 << cdf_width) {
-+		dev_err(dev, "Input clock %lu too high\n", rate);
-+		return -EIO;
- 	}
--	dev_err(dev, "there is no best CDF\n");
--	return -EIO;
-+	ick = rate / (cdf + 1);
- 
--ick_find:
- 	/*
- 	 * it is impossible to calculate large scale
- 	 * number on u32. separate it
-@@ -290,6 +290,12 @@ ick_find:
- 	 *
- 	 * Calculation result (= SCL) should be less than
- 	 * bus_speed for hardware safety
-+	 *
-+	 * We could use something along the lines of
-+	 *	div = ick / (bus_speed + 1) + 1;
-+	 *	scgd = (div - 20 - round + 7) / 8;
-+	 *	scl = ick / (20 + (scgd * 8) + round);
-+	 * (not fully verified) but that would get pretty involved
- 	 */
- 	for (scgd = 0; scgd < 0x40; scgd++) {
- 		scl = ick / (20 + (scgd * 8) + round);
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0067-sh_mobile_ceu_camera-Fix-a-compilation-warning.patch b/patches.renesas/0067-sh_mobile_ceu_camera-Fix-a-compilation-warning.patch
deleted file mode 100644
index 476d04d5b32f8..0000000000000
--- a/patches.renesas/0067-sh_mobile_ceu_camera-Fix-a-compilation-warning.patch
+++ /dev/null
@@ -1,38 +0,0 @@
-From d38be29822e5f6de98b83303c540b6a9b2ac8021 Mon Sep 17 00:00:00 2001
-From: Mauro Carvalho Chehab <m.chehab@samsung.com>
-Date: Sun, 18 Aug 2013 09:36:03 -0300
-Subject: sh_mobile_ceu_camera: Fix a compilation warning
-
-drivers/media/platform/soc_camera/sh_mobile_ceu_camera.c: In function 'sh_mobile_ceu_clock_start':
-drivers/media/platform/soc_camera/sh_mobile_ceu_camera.c:613:6: warning: variable 'ret' set but not used [-Wunused-but-set-variable]
-
-Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
-(cherry picked from commit e5b6a69790c7112b90570db0202c6de621485fb9)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/media/platform/soc_camera/sh_mobile_ceu_camera.c | 3 +--
- 1 file changed, 1 insertion(+), 2 deletions(-)
-
-diff --git a/drivers/media/platform/soc_camera/sh_mobile_ceu_camera.c b/drivers/media/platform/soc_camera/sh_mobile_ceu_camera.c
-index 905ed7e5..dc5ce6c1 100644
---- a/drivers/media/platform/soc_camera/sh_mobile_ceu_camera.c
-+++ b/drivers/media/platform/soc_camera/sh_mobile_ceu_camera.c
-@@ -595,13 +595,12 @@ static void sh_mobile_ceu_remove_device(struct soc_camera_device *icd)
- static int sh_mobile_ceu_clock_start(struct soc_camera_host *ici)
- {
- 	struct sh_mobile_ceu_dev *pcdev = ici->priv;
--	int ret;
- 
- 	pm_runtime_get_sync(ici->v4l2_dev.dev);
- 
- 	pcdev->buf_total = 0;
- 
--	ret = sh_mobile_ceu_soft_reset(pcdev);
-+	sh_mobile_ceu_soft_reset(pcdev);
- 
- 	return 0;
- }
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0068-ARM-shmobile-r7s72100-tidyup-clock-table-order.patch b/patches.renesas/0068-ARM-shmobile-r7s72100-tidyup-clock-table-order.patch
deleted file mode 100644
index 3a59f6eb2cfdc..0000000000000
--- a/patches.renesas/0068-ARM-shmobile-r7s72100-tidyup-clock-table-order.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From 4c02fba070f82d5d07ad7701d406ad5e2a69b423 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Tue, 19 Nov 2013 01:05:10 -0800
-Subject: ARM: shmobile: r7s72100: tidyup clock table order
-
-SuperH lookups clock is using CLKDEV_CON/DEV/ICK_ID() macro
-for a long term.
-But in these days, the ICK clock is defined in random place.
-This patch arranges it.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 204aa273a7b7f2861ecc592c1fd722e7b51b6134)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r7s72100.c | 3 +++
- 1 file changed, 3 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/clock-r7s72100.c b/arch/arm/mach-shmobile/clock-r7s72100.c
-index 4aba20ca127e..0814a508fd61 100644
---- a/arch/arm/mach-shmobile/clock-r7s72100.c
-+++ b/arch/arm/mach-shmobile/clock-r7s72100.c
-@@ -170,6 +170,9 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]),
- 
- 	/* MSTP clocks */
-+	CLKDEV_CON_ID("mtu2_fck", &mstp_clks[MSTP33]),
-+
-+	/* ICK */
- 	CLKDEV_ICK_ID("sci_fck", "sh-sci.0", &mstp_clks[MSTP47]),
- 	CLKDEV_ICK_ID("sci_fck", "sh-sci.1", &mstp_clks[MSTP46]),
- 	CLKDEV_ICK_ID("sci_fck", "sh-sci.2", &mstp_clks[MSTP45]),
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0068-i2c-rcar-add-Device-Tree-support.patch b/patches.renesas/0068-i2c-rcar-add-Device-Tree-support.patch
deleted file mode 100644
index ace552c88a8dd..0000000000000
--- a/patches.renesas/0068-i2c-rcar-add-Device-Tree-support.patch
+++ /dev/null
@@ -1,112 +0,0 @@
-From 36a5d169ae8bec8914636b95cb8dc2b508ec456c Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Thu, 12 Sep 2013 14:36:46 +0200
-Subject: i2c: rcar: add Device Tree support
-
-This patch adds Device Tree support to the i2c-rcar driver and respective
-documentation.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-(cherry picked from commit 7679c0e19120ee7839adf1f05904cbfcc7a7c2b9)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- Documentation/devicetree/bindings/i2c/i2c-rcar.txt | 23 ++++++++++++++++++++++
- drivers/i2c/busses/i2c-rcar.c                      | 21 ++++++++++++++++++--
- 2 files changed, 42 insertions(+), 2 deletions(-)
- create mode 100644 Documentation/devicetree/bindings/i2c/i2c-rcar.txt
-
-diff --git a/Documentation/devicetree/bindings/i2c/i2c-rcar.txt b/Documentation/devicetree/bindings/i2c/i2c-rcar.txt
-new file mode 100644
-index 000000000000..897cfcd5ce92
---- /dev/null
-+++ b/Documentation/devicetree/bindings/i2c/i2c-rcar.txt
-@@ -0,0 +1,23 @@
-+I2C for R-Car platforms
-+
-+Required properties:
-+- compatible: Must be one of
-+	"renesas,i2c-rcar"
-+	"renesas,i2c-r8a7778"
-+	"renesas,i2c-r8a7779"
-+	"renesas,i2c-r8a7790"
-+- reg: physical base address of the controller and length of memory mapped
-+  region.
-+- interrupts: interrupt specifier.
-+
-+Optional properties:
-+- clock-frequency: desired I2C bus clock frequency in Hz. The absence of this
-+  propoerty indicates the default frequency 100 kHz.
-+
-+Examples :
-+
-+i2c0: i2c@e6500000 {
-+	compatible = "renesas,i2c-rcar-h2";
-+	reg = <0 0xe6500000 0 0x428>;
-+	interrupts = <0 174 0x4>;
-+};
-diff --git a/drivers/i2c/busses/i2c-rcar.c b/drivers/i2c/busses/i2c-rcar.c
-index 39e9739f58b2..056323b0666a 100644
---- a/drivers/i2c/busses/i2c-rcar.c
-+++ b/drivers/i2c/busses/i2c-rcar.c
-@@ -33,6 +33,7 @@
- #include <linux/i2c/i2c-rcar.h>
- #include <linux/kernel.h>
- #include <linux/module.h>
-+#include <linux/of_device.h>
- #include <linux/platform_device.h>
- #include <linux/pm_runtime.h>
- #include <linux/slab.h>
-@@ -638,6 +639,15 @@ static const struct i2c_algorithm rcar_i2c_algo = {
- 	.functionality	= rcar_i2c_func,
- };
- 
-+static const struct of_device_id rcar_i2c_dt_ids[] = {
-+	{ .compatible = "renesas,i2c-rcar", .data = (void *)I2C_RCAR_H1 },
-+	{ .compatible = "renesas,i2c-r8a7778", .data = (void *)I2C_RCAR_H1 },
-+	{ .compatible = "renesas,i2c-r8a7779", .data = (void *)I2C_RCAR_H1 },
-+	{ .compatible = "renesas,i2c-r8a7790", .data = (void *)I2C_RCAR_H2 },
-+	{},
-+};
-+MODULE_DEVICE_TABLE(of, rcar_i2c_dt_ids);
-+
- static int rcar_i2c_probe(struct platform_device *pdev)
- {
- 	struct i2c_rcar_platform_data *pdata = pdev->dev.platform_data;
-@@ -661,10 +671,15 @@ static int rcar_i2c_probe(struct platform_device *pdev)
- 	}
- 
- 	bus_speed = 100000; /* default 100 kHz */
--	if (pdata && pdata->bus_speed)
-+	ret = of_property_read_u32(dev->of_node, "clock-frequency", &bus_speed);
-+	if (ret < 0 && pdata && pdata->bus_speed)
- 		bus_speed = pdata->bus_speed;
- 
--	priv->devtype = platform_get_device_id(pdev)->driver_data;
-+	if (pdev->dev.of_node)
-+		priv->devtype = (long)of_match_device(rcar_i2c_dt_ids,
-+						      dev)->data;
-+	else
-+		priv->devtype = platform_get_device_id(pdev)->driver_data;
- 
- 	ret = rcar_i2c_clock_calculate(priv, bus_speed, dev);
- 	if (ret < 0)
-@@ -684,6 +699,7 @@ static int rcar_i2c_probe(struct platform_device *pdev)
- 	adap->class		= I2C_CLASS_HWMON | I2C_CLASS_SPD;
- 	adap->retries		= 3;
- 	adap->dev.parent	= dev;
-+	adap->dev.of_node	= dev->of_node;
- 	i2c_set_adapdata(adap, priv);
- 	strlcpy(adap->name, pdev->name, sizeof(adap->name));
- 
-@@ -731,6 +747,7 @@ static struct platform_driver rcar_i2c_driver = {
- 	.driver	= {
- 		.name	= "i2c-rcar",
- 		.owner	= THIS_MODULE,
-+		.of_match_table = rcar_i2c_dt_ids,
- 	},
- 	.probe		= rcar_i2c_probe,
- 	.remove		= rcar_i2c_remove,
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0068-media-V4L2-soc_camera-Renesas-R-Car-VIN-driver.patch b/patches.renesas/0068-media-V4L2-soc_camera-Renesas-R-Car-VIN-driver.patch
deleted file mode 100644
index 7755ad2ef7ee3..0000000000000
--- a/patches.renesas/0068-media-V4L2-soc_camera-Renesas-R-Car-VIN-driver.patch
+++ /dev/null
@@ -1,1587 +0,0 @@
-From 3fec97c68d4708f5f33190a78712dad95c6f487d Mon Sep 17 00:00:00 2001
-From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
-Date: Thu, 25 Jul 2013 17:23:10 -0300
-Subject: [media] V4L2: soc_camera: Renesas R-Car VIN driver
-
-Add Renesas R-Car VIN (Video In) V4L2 driver.
-Based on the patch by Phil Edworthy <phil.edworthy@renesas.com>.
-[Sergei: removed deprecated IRQF_DISABLED flag, reordered/renamed 'enum chip_id'
-values, reordered rcar_vin_id_table[] entries,  removed senseless parens from
-to_buf_list() macro, used ALIGN() macro in rcar_vin_setup(), added {} to the
-*if* statement  and used 'bool' values instead of 0/1 where necessary, removed
-unused macros, done some reformatting and clarified some comments.]
-
-Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
-(cherry picked from commit 73135e969970304a474c18c9f732fa3e36d88514)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-	drivers/media/platform/soc_camera/Makefile
----
- drivers/media/platform/soc_camera/Kconfig    |    8 +
- drivers/media/platform/soc_camera/Makefile   |    3 +-
- drivers/media/platform/soc_camera/rcar_vin.c | 1486 ++++++++++++++++++++++++++
- include/linux/platform_data/camera-rcar.h    |   25 +
- 4 files changed, 1520 insertions(+), 2 deletions(-)
- create mode 100644 drivers/media/platform/soc_camera/rcar_vin.c
- create mode 100644 include/linux/platform_data/camera-rcar.h
-
-diff --git a/drivers/media/platform/soc_camera/Kconfig b/drivers/media/platform/soc_camera/Kconfig
-index 99f1952d..519b23fd 100644
---- a/drivers/media/platform/soc_camera/Kconfig
-+++ b/drivers/media/platform/soc_camera/Kconfig
-@@ -48,6 +48,14 @@ config VIDEO_PXA27x
- 	---help---
- 	  This is a v4l2 driver for the PXA27x Quick Capture Interface
- 
-+config VIDEO_RCAR_VIN
-+	tristate "R-Car Video Input (VIN) support"
-+	depends on VIDEO_DEV && SOC_CAMERA
-+	select VIDEOBUF2_DMA_CONTIG
-+	select SOC_CAMERA_SCALE_CROP
-+	---help---
-+	  This is a v4l2 driver for the R-Car VIN Interface
-+
- config VIDEO_SH_MOBILE_CSI2
- 	tristate "SuperH Mobile MIPI CSI-2 Interface driver"
- 	depends on VIDEO_DEV && SOC_CAMERA && HAVE_CLK
-diff --git a/drivers/media/platform/soc_camera/Makefile b/drivers/media/platform/soc_camera/Makefile
-index 7ff714c6..8aed26d7 100644
---- a/drivers/media/platform/soc_camera/Makefile
-+++ b/drivers/media/platform/soc_camera/Makefile
-@@ -14,5 +14,4 @@ obj-$(CONFIG_VIDEO_OMAP1)		+= omap1_camera.o
- obj-$(CONFIG_VIDEO_PXA27x)		+= pxa_camera.o
- obj-$(CONFIG_VIDEO_SH_MOBILE_CEU)	+= sh_mobile_ceu_camera.o
- obj-$(CONFIG_VIDEO_SH_MOBILE_CSI2)	+= sh_mobile_csi2.o
--
--ccflags-y += -I$(srctree)/drivers/media/i2c/soc_camera
-+obj-$(CONFIG_VIDEO_RCAR_VIN)		+= rcar_vin.o
-diff --git a/drivers/media/platform/soc_camera/rcar_vin.c b/drivers/media/platform/soc_camera/rcar_vin.c
-new file mode 100644
-index 00000000..d02a7e0b
---- /dev/null
-+++ b/drivers/media/platform/soc_camera/rcar_vin.c
-@@ -0,0 +1,1486 @@
-+/*
-+ * SoC-camera host driver for Renesas R-Car VIN unit
-+ *
-+ * Copyright (C) 2011-2013 Renesas Solutions Corp.
-+ * Copyright (C) 2013 Cogent Embedded, Inc., <source@cogentembedded.com>
-+ *
-+ * Based on V4L2 Driver for SuperH Mobile CEU interface "sh_mobile_ceu_camera.c"
-+ *
-+ * Copyright (C) 2008 Magnus Damm
-+ *
-+ * This program is free software; you can redistribute  it and/or modify it
-+ * under  the terms of  the GNU General  Public License as published by the
-+ * Free Software Foundation;  either version 2 of the  License, or (at your
-+ * option) any later version.
-+ */
-+
-+#include <linux/delay.h>
-+#include <linux/interrupt.h>
-+#include <linux/kernel.h>
-+#include <linux/module.h>
-+#include <linux/platform_data/camera-rcar.h>
-+#include <linux/platform_device.h>
-+#include <linux/pm_runtime.h>
-+#include <linux/slab.h>
-+#include <linux/videodev2.h>
-+
-+#include <media/soc_camera.h>
-+#include <media/soc_mediabus.h>
-+#include <media/v4l2-common.h>
-+#include <media/v4l2-dev.h>
-+#include <media/v4l2-device.h>
-+#include <media/v4l2-mediabus.h>
-+#include <media/v4l2-subdev.h>
-+#include <media/videobuf2-dma-contig.h>
-+
-+#include "soc_scale_crop.h"
-+
-+#define DRV_NAME "rcar_vin"
-+
-+/* Register offsets for R-Car VIN */
-+#define VNMC_REG	0x00	/* Video n Main Control Register */
-+#define VNMS_REG	0x04	/* Video n Module Status Register */
-+#define VNFC_REG	0x08	/* Video n Frame Capture Register */
-+#define VNSLPRC_REG	0x0C	/* Video n Start Line Pre-Clip Register */
-+#define VNELPRC_REG	0x10	/* Video n End Line Pre-Clip Register */
-+#define VNSPPRC_REG	0x14	/* Video n Start Pixel Pre-Clip Register */
-+#define VNEPPRC_REG	0x18	/* Video n End Pixel Pre-Clip Register */
-+#define VNSLPOC_REG	0x1C	/* Video n Start Line Post-Clip Register */
-+#define VNELPOC_REG	0x20	/* Video n End Line Post-Clip Register */
-+#define VNSPPOC_REG	0x24	/* Video n Start Pixel Post-Clip Register */
-+#define VNEPPOC_REG	0x28	/* Video n End Pixel Post-Clip Register */
-+#define VNIS_REG	0x2C	/* Video n Image Stride Register */
-+#define VNMB_REG(m)	(0x30 + ((m) << 2)) /* Video n Memory Base m Register */
-+#define VNIE_REG	0x40	/* Video n Interrupt Enable Register */
-+#define VNINTS_REG	0x44	/* Video n Interrupt Status Register */
-+#define VNSI_REG	0x48	/* Video n Scanline Interrupt Register */
-+#define VNMTC_REG	0x4C	/* Video n Memory Transfer Control Register */
-+#define VNYS_REG	0x50	/* Video n Y Scale Register */
-+#define VNXS_REG	0x54	/* Video n X Scale Register */
-+#define VNDMR_REG	0x58	/* Video n Data Mode Register */
-+#define VNDMR2_REG	0x5C	/* Video n Data Mode Register 2 */
-+#define VNUVAOF_REG	0x60	/* Video n UV Address Offset Register */
-+
-+/* Register bit fields for R-Car VIN */
-+/* Video n Main Control Register bits */
-+#define VNMC_FOC		(1 << 21)
-+#define VNMC_YCAL		(1 << 19)
-+#define VNMC_INF_YUV8_BT656	(0 << 16)
-+#define VNMC_INF_YUV8_BT601	(1 << 16)
-+#define VNMC_INF_YUV16		(5 << 16)
-+#define VNMC_VUP		(1 << 10)
-+#define VNMC_IM_ODD		(0 << 3)
-+#define VNMC_IM_ODD_EVEN	(1 << 3)
-+#define VNMC_IM_EVEN		(2 << 3)
-+#define VNMC_IM_FULL		(3 << 3)
-+#define VNMC_BPS		(1 << 1)
-+#define VNMC_ME			(1 << 0)
-+
-+/* Video n Module Status Register bits */
-+#define VNMS_FBS_MASK		(3 << 3)
-+#define VNMS_FBS_SHIFT		3
-+#define VNMS_AV			(1 << 1)
-+#define VNMS_CA			(1 << 0)
-+
-+/* Video n Frame Capture Register bits */
-+#define VNFC_C_FRAME		(1 << 1)
-+#define VNFC_S_FRAME		(1 << 0)
-+
-+/* Video n Interrupt Enable Register bits */
-+#define VNIE_FIE		(1 << 4)
-+#define VNIE_EFE		(1 << 1)
-+
-+/* Video n Data Mode Register bits */
-+#define VNDMR_EXRGB		(1 << 8)
-+#define VNDMR_BPSM		(1 << 4)
-+#define VNDMR_DTMD_YCSEP	(1 << 1)
-+#define VNDMR_DTMD_ARGB1555	(1 << 0)
-+
-+/* Video n Data Mode Register 2 bits */
-+#define VNDMR2_VPS		(1 << 30)
-+#define VNDMR2_HPS		(1 << 29)
-+#define VNDMR2_FTEV		(1 << 17)
-+
-+#define VIN_MAX_WIDTH		2048
-+#define VIN_MAX_HEIGHT		2048
-+
-+enum chip_id {
-+	RCAR_H1,
-+	RCAR_M1,
-+	RCAR_E1,
-+};
-+
-+enum rcar_vin_state {
-+	STOPPED = 0,
-+	RUNNING,
-+	STOPPING,
-+};
-+
-+struct rcar_vin_priv {
-+	void __iomem			*base;
-+	spinlock_t			lock;
-+	int				sequence;
-+	/* State of the VIN module in capturing mode */
-+	enum rcar_vin_state		state;
-+	struct rcar_vin_platform_data	*pdata;
-+	struct soc_camera_host		ici;
-+	struct list_head		capture;
-+#define MAX_BUFFER_NUM			3
-+	struct vb2_buffer		*queue_buf[MAX_BUFFER_NUM];
-+	struct vb2_alloc_ctx		*alloc_ctx;
-+	enum v4l2_field			field;
-+	unsigned int			vb_count;
-+	unsigned int			nr_hw_slots;
-+	bool				request_to_stop;
-+	struct completion		capture_stop;
-+	enum chip_id			chip;
-+};
-+
-+#define is_continuous_transfer(priv)	(priv->vb_count > MAX_BUFFER_NUM)
-+
-+struct rcar_vin_buffer {
-+	struct vb2_buffer		vb;
-+	struct list_head		list;
-+};
-+
-+#define to_buf_list(vb2_buffer)	(&container_of(vb2_buffer, \
-+						       struct rcar_vin_buffer, \
-+						       vb)->list)
-+
-+struct rcar_vin_cam {
-+	/* VIN offsets within the camera output, before the VIN scaler */
-+	unsigned int			vin_left;
-+	unsigned int			vin_top;
-+	/* Client output, as seen by the VIN */
-+	unsigned int			width;
-+	unsigned int			height;
-+	/*
-+	 * User window from S_CROP / G_CROP, produced by client cropping and
-+	 * scaling, VIN scaling and VIN cropping, mapped back onto the client
-+	 * input window
-+	 */
-+	struct v4l2_rect		subrect;
-+	/* Camera cropping rectangle */
-+	struct v4l2_rect		rect;
-+	const struct soc_mbus_pixelfmt	*extra_fmt;
-+};
-+
-+/*
-+ * .queue_setup() is called to check whether the driver can accept the requested
-+ * number of buffers and to fill in plane sizes for the current frame format if
-+ * required
-+ */
-+static int rcar_vin_videobuf_setup(struct vb2_queue *vq,
-+				   const struct v4l2_format *fmt,
-+				   unsigned int *count,
-+				   unsigned int *num_planes,
-+				   unsigned int sizes[], void *alloc_ctxs[])
-+{
-+	struct soc_camera_device *icd = soc_camera_from_vb2q(vq);
-+	struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
-+	struct rcar_vin_priv *priv = ici->priv;
-+
-+	if (fmt) {
-+		const struct soc_camera_format_xlate *xlate;
-+		unsigned int bytes_per_line;
-+		int ret;
-+
-+		xlate = soc_camera_xlate_by_fourcc(icd,
-+						   fmt->fmt.pix.pixelformat);
-+		if (!xlate)
-+			return -EINVAL;
-+		ret = soc_mbus_bytes_per_line(fmt->fmt.pix.width,
-+					      xlate->host_fmt);
-+		if (ret < 0)
-+			return ret;
-+
-+		bytes_per_line = max_t(u32, fmt->fmt.pix.bytesperline, ret);
-+
-+		ret = soc_mbus_image_size(xlate->host_fmt, bytes_per_line,
-+					  fmt->fmt.pix.height);
-+		if (ret < 0)
-+			return ret;
-+
-+		sizes[0] = max_t(u32, fmt->fmt.pix.sizeimage, ret);
-+	} else {
-+		/* Called from VIDIOC_REQBUFS or in compatibility mode */
-+		sizes[0] = icd->sizeimage;
-+	}
-+
-+	alloc_ctxs[0] = priv->alloc_ctx;
-+
-+	if (!vq->num_buffers)
-+		priv->sequence = 0;
-+
-+	if (!*count)
-+		*count = 2;
-+	priv->vb_count = *count;
-+
-+	*num_planes = 1;
-+
-+	/* Number of hardware slots */
-+	if (is_continuous_transfer(priv))
-+		priv->nr_hw_slots = MAX_BUFFER_NUM;
-+	else
-+		priv->nr_hw_slots = 1;
-+
-+	dev_dbg(icd->parent, "count=%d, size=%u\n", *count, sizes[0]);
-+
-+	return 0;
-+}
-+
-+static int rcar_vin_setup(struct rcar_vin_priv *priv)
-+{
-+	struct soc_camera_device *icd = priv->ici.icd;
-+	struct rcar_vin_cam *cam = icd->host_priv;
-+	u32 vnmc, dmr, interrupts;
-+	bool progressive = false, output_is_yuv = false;
-+
-+	switch (priv->field) {
-+	case V4L2_FIELD_TOP:
-+		vnmc = VNMC_IM_ODD;
-+		break;
-+	case V4L2_FIELD_BOTTOM:
-+		vnmc = VNMC_IM_EVEN;
-+		break;
-+	case V4L2_FIELD_INTERLACED:
-+	case V4L2_FIELD_INTERLACED_TB:
-+		vnmc = VNMC_IM_FULL;
-+		break;
-+	case V4L2_FIELD_INTERLACED_BT:
-+		vnmc = VNMC_IM_FULL | VNMC_FOC;
-+		break;
-+	case V4L2_FIELD_NONE:
-+		if (is_continuous_transfer(priv)) {
-+			vnmc = VNMC_IM_ODD_EVEN;
-+			progressive = true;
-+		} else {
-+			vnmc = VNMC_IM_ODD;
-+		}
-+		break;
-+	default:
-+		vnmc = VNMC_IM_ODD;
-+		break;
-+	}
-+
-+	/* input interface */
-+	switch (icd->current_fmt->code) {
-+	case V4L2_MBUS_FMT_YUYV8_1X16:
-+		/* BT.601/BT.1358 16bit YCbCr422 */
-+		vnmc |= VNMC_INF_YUV16;
-+		break;
-+	case V4L2_MBUS_FMT_YUYV8_2X8:
-+		/* BT.656 8bit YCbCr422 or BT.601 8bit YCbCr422 */
-+		vnmc |= priv->pdata->flags & RCAR_VIN_BT656 ?
-+			VNMC_INF_YUV8_BT656 : VNMC_INF_YUV8_BT601;
-+	default:
-+		break;
-+	}
-+
-+	/* output format */
-+	switch (icd->current_fmt->host_fmt->fourcc) {
-+	case V4L2_PIX_FMT_NV16:
-+		iowrite32(ALIGN(cam->width * cam->height, 0x80),
-+			  priv->base + VNUVAOF_REG);
-+		dmr = VNDMR_DTMD_YCSEP;
-+		output_is_yuv = true;
-+		break;
-+	case V4L2_PIX_FMT_YUYV:
-+		dmr = VNDMR_BPSM;
-+		output_is_yuv = true;
-+		break;
-+	case V4L2_PIX_FMT_UYVY:
-+		dmr = 0;
-+		output_is_yuv = true;
-+		break;
-+	case V4L2_PIX_FMT_RGB555X:
-+		dmr = VNDMR_DTMD_ARGB1555;
-+		break;
-+	case V4L2_PIX_FMT_RGB565:
-+		dmr = 0;
-+		break;
-+	case V4L2_PIX_FMT_RGB32:
-+		if (priv->chip == RCAR_H1 || priv->chip == RCAR_E1) {
-+			dmr = VNDMR_EXRGB;
-+			break;
-+		}
-+	default:
-+		dev_warn(icd->parent, "Invalid fourcc format (0x%x)\n",
-+			 icd->current_fmt->host_fmt->fourcc);
-+		return -EINVAL;
-+	}
-+
-+	/* Always update on field change */
-+	vnmc |= VNMC_VUP;
-+
-+	/* If input and output use the same colorspace, use bypass mode */
-+	if (output_is_yuv)
-+		vnmc |= VNMC_BPS;
-+
-+	/* progressive or interlaced mode */
-+	interrupts = progressive ? VNIE_FIE | VNIE_EFE : VNIE_EFE;
-+
-+	/* ack interrupts */
-+	iowrite32(interrupts, priv->base + VNINTS_REG);
-+	/* enable interrupts */
-+	iowrite32(interrupts, priv->base + VNIE_REG);
-+	/* start capturing */
-+	iowrite32(dmr, priv->base + VNDMR_REG);
-+	iowrite32(vnmc | VNMC_ME, priv->base + VNMC_REG);
-+
-+	return 0;
-+}
-+
-+static void rcar_vin_capture(struct rcar_vin_priv *priv)
-+{
-+	if (is_continuous_transfer(priv))
-+		/* Continuous Frame Capture Mode */
-+		iowrite32(VNFC_C_FRAME, priv->base + VNFC_REG);
-+	else
-+		/* Single Frame Capture Mode */
-+		iowrite32(VNFC_S_FRAME, priv->base + VNFC_REG);
-+}
-+
-+static void rcar_vin_request_capture_stop(struct rcar_vin_priv *priv)
-+{
-+	priv->state = STOPPING;
-+
-+	/* set continuous & single transfer off */
-+	iowrite32(0, priv->base + VNFC_REG);
-+	/* disable capture (release DMA buffer), reset */
-+	iowrite32(ioread32(priv->base + VNMC_REG) & ~VNMC_ME,
-+		  priv->base + VNMC_REG);
-+
-+	/* update the status if stopped already */
-+	if (!(ioread32(priv->base + VNMS_REG) & VNMS_CA))
-+		priv->state = STOPPED;
-+}
-+
-+static int rcar_vin_get_free_hw_slot(struct rcar_vin_priv *priv)
-+{
-+	int slot;
-+
-+	for (slot = 0; slot < priv->nr_hw_slots; slot++)
-+		if (priv->queue_buf[slot] == NULL)
-+			return slot;
-+
-+	return -1;
-+}
-+
-+static int rcar_vin_hw_ready(struct rcar_vin_priv *priv)
-+{
-+	/* Ensure all HW slots are filled */
-+	return rcar_vin_get_free_hw_slot(priv) < 0 ? 1 : 0;
-+}
-+
-+/* Moves a buffer from the queue to the HW slots */
-+static int rcar_vin_fill_hw_slot(struct rcar_vin_priv *priv)
-+{
-+	struct vb2_buffer *vb;
-+	dma_addr_t phys_addr_top;
-+	int slot;
-+
-+	if (list_empty(&priv->capture))
-+		return 0;
-+
-+	/* Find a free HW slot */
-+	slot = rcar_vin_get_free_hw_slot(priv);
-+	if (slot < 0)
-+		return 0;
-+
-+	vb = &list_entry(priv->capture.next, struct rcar_vin_buffer, list)->vb;
-+	list_del_init(to_buf_list(vb));
-+	priv->queue_buf[slot] = vb;
-+	phys_addr_top = vb2_dma_contig_plane_dma_addr(vb, 0);
-+	iowrite32(phys_addr_top, priv->base + VNMB_REG(slot));
-+
-+	return 1;
-+}
-+
-+static void rcar_vin_videobuf_queue(struct vb2_buffer *vb)
-+{
-+	struct soc_camera_device *icd = soc_camera_from_vb2q(vb->vb2_queue);
-+	struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
-+	struct rcar_vin_priv *priv = ici->priv;
-+	unsigned long size;
-+
-+	size = icd->sizeimage;
-+
-+	if (vb2_plane_size(vb, 0) < size) {
-+		dev_err(icd->parent, "Buffer #%d too small (%lu < %lu)\n",
-+			vb->v4l2_buf.index, vb2_plane_size(vb, 0), size);
-+		goto error;
-+	}
-+
-+	vb2_set_plane_payload(vb, 0, size);
-+
-+	dev_dbg(icd->parent, "%s (vb=0x%p) 0x%p %lu\n", __func__,
-+		vb, vb2_plane_vaddr(vb, 0), vb2_get_plane_payload(vb, 0));
-+
-+	spin_lock_irq(&priv->lock);
-+
-+	list_add_tail(to_buf_list(vb), &priv->capture);
-+	rcar_vin_fill_hw_slot(priv);
-+
-+	/* If we weren't running, and have enough buffers, start capturing! */
-+	if (priv->state != RUNNING && rcar_vin_hw_ready(priv)) {
-+		if (rcar_vin_setup(priv)) {
-+			/* Submit error */
-+			list_del_init(to_buf_list(vb));
-+			spin_unlock_irq(&priv->lock);
-+			goto error;
-+		}
-+		priv->request_to_stop = false;
-+		init_completion(&priv->capture_stop);
-+		priv->state = RUNNING;
-+		rcar_vin_capture(priv);
-+	}
-+
-+	spin_unlock_irq(&priv->lock);
-+
-+	return;
-+
-+error:
-+	vb2_buffer_done(vb, VB2_BUF_STATE_ERROR);
-+}
-+
-+static void rcar_vin_videobuf_release(struct vb2_buffer *vb)
-+{
-+	struct soc_camera_device *icd = soc_camera_from_vb2q(vb->vb2_queue);
-+	struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
-+	struct rcar_vin_priv *priv = ici->priv;
-+	unsigned int i;
-+	int buf_in_use = 0;
-+
-+	spin_lock_irq(&priv->lock);
-+
-+	/* Is the buffer in use by the VIN hardware? */
-+	for (i = 0; i < MAX_BUFFER_NUM; i++) {
-+		if (priv->queue_buf[i] == vb) {
-+			buf_in_use = 1;
-+			break;
-+		}
-+	}
-+
-+	if (buf_in_use) {
-+		while (priv->state != STOPPED) {
-+
-+			/* issue stop if running */
-+			if (priv->state == RUNNING)
-+				rcar_vin_request_capture_stop(priv);
-+
-+			/* wait until capturing has been stopped */
-+			if (priv->state == STOPPING) {
-+				priv->request_to_stop = true;
-+				spin_unlock_irq(&priv->lock);
-+				wait_for_completion(&priv->capture_stop);
-+				spin_lock_irq(&priv->lock);
-+			}
-+		}
-+		/*
-+		 * Capturing has now stopped. The buffer we have been asked
-+		 * to release could be any of the current buffers in use, so
-+		 * release all buffers that are in use by HW
-+		 */
-+		for (i = 0; i < MAX_BUFFER_NUM; i++) {
-+			if (priv->queue_buf[i]) {
-+				vb2_buffer_done(priv->queue_buf[i],
-+					VB2_BUF_STATE_ERROR);
-+				priv->queue_buf[i] = NULL;
-+			}
-+		}
-+	} else {
-+		list_del_init(to_buf_list(vb));
-+	}
-+
-+	spin_unlock_irq(&priv->lock);
-+}
-+
-+static int rcar_vin_videobuf_init(struct vb2_buffer *vb)
-+{
-+	INIT_LIST_HEAD(to_buf_list(vb));
-+	return 0;
-+}
-+
-+static int rcar_vin_stop_streaming(struct vb2_queue *vq)
-+{
-+	struct soc_camera_device *icd = soc_camera_from_vb2q(vq);
-+	struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
-+	struct rcar_vin_priv *priv = ici->priv;
-+	struct list_head *buf_head, *tmp;
-+
-+	spin_lock_irq(&priv->lock);
-+	list_for_each_safe(buf_head, tmp, &priv->capture)
-+		list_del_init(buf_head);
-+	spin_unlock_irq(&priv->lock);
-+
-+	return 0;
-+}
-+
-+static struct vb2_ops rcar_vin_vb2_ops = {
-+	.queue_setup	= rcar_vin_videobuf_setup,
-+	.buf_init	= rcar_vin_videobuf_init,
-+	.buf_cleanup	= rcar_vin_videobuf_release,
-+	.buf_queue	= rcar_vin_videobuf_queue,
-+	.stop_streaming	= rcar_vin_stop_streaming,
-+	.wait_prepare	= soc_camera_unlock,
-+	.wait_finish	= soc_camera_lock,
-+};
-+
-+static irqreturn_t rcar_vin_irq(int irq, void *data)
-+{
-+	struct rcar_vin_priv *priv = data;
-+	u32 int_status;
-+	bool can_run = false, hw_stopped;
-+	int slot;
-+	unsigned int handled = 0;
-+
-+	spin_lock(&priv->lock);
-+
-+	int_status = ioread32(priv->base + VNINTS_REG);
-+	if (!int_status)
-+		goto done;
-+	/* ack interrupts */
-+	iowrite32(int_status, priv->base + VNINTS_REG);
-+	handled = 1;
-+
-+	/* nothing to do if capture status is 'STOPPED' */
-+	if (priv->state == STOPPED)
-+		goto done;
-+
-+	hw_stopped = !(ioread32(priv->base + VNMS_REG) & VNMS_CA);
-+
-+	if (!priv->request_to_stop) {
-+		if (is_continuous_transfer(priv))
-+			slot = (ioread32(priv->base + VNMS_REG) &
-+				VNMS_FBS_MASK) >> VNMS_FBS_SHIFT;
-+		else
-+			slot = 0;
-+
-+		priv->queue_buf[slot]->v4l2_buf.field = priv->field;
-+		priv->queue_buf[slot]->v4l2_buf.sequence = priv->sequence++;
-+		do_gettimeofday(&priv->queue_buf[slot]->v4l2_buf.timestamp);
-+		vb2_buffer_done(priv->queue_buf[slot], VB2_BUF_STATE_DONE);
-+		priv->queue_buf[slot] = NULL;
-+
-+		if (priv->state != STOPPING)
-+			can_run = rcar_vin_fill_hw_slot(priv);
-+
-+		if (hw_stopped || !can_run) {
-+			priv->state = STOPPED;
-+		} else if (is_continuous_transfer(priv) &&
-+			   list_empty(&priv->capture) &&
-+			   priv->state == RUNNING) {
-+			/*
-+			 * The continuous capturing requires an explicit stop
-+			 * operation when there is no buffer to be set into
-+			 * the VnMBm registers.
-+			 */
-+			rcar_vin_request_capture_stop(priv);
-+		} else {
-+			rcar_vin_capture(priv);
-+		}
-+
-+	} else if (hw_stopped) {
-+		priv->state = STOPPED;
-+		priv->request_to_stop = false;
-+		complete(&priv->capture_stop);
-+	}
-+
-+done:
-+	spin_unlock(&priv->lock);
-+
-+	return IRQ_RETVAL(handled);
-+}
-+
-+static int rcar_vin_add_device(struct soc_camera_device *icd)
-+{
-+	struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
-+	struct rcar_vin_priv *priv = ici->priv;
-+	int i;
-+
-+	for (i = 0; i < MAX_BUFFER_NUM; i++)
-+		priv->queue_buf[i] = NULL;
-+
-+	pm_runtime_get_sync(ici->v4l2_dev.dev);
-+
-+	dev_dbg(icd->parent, "R-Car VIN driver attached to camera %d\n",
-+		icd->devnum);
-+
-+	return 0;
-+}
-+
-+static void rcar_vin_remove_device(struct soc_camera_device *icd)
-+{
-+	struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
-+	struct rcar_vin_priv *priv = ici->priv;
-+	struct vb2_buffer *vb;
-+	int i;
-+
-+	/* disable capture, disable interrupts */
-+	iowrite32(ioread32(priv->base + VNMC_REG) & ~VNMC_ME,
-+		  priv->base + VNMC_REG);
-+	iowrite32(0, priv->base + VNIE_REG);
-+
-+	priv->state = STOPPED;
-+	priv->request_to_stop = false;
-+
-+	/* make sure active buffer is cancelled */
-+	spin_lock_irq(&priv->lock);
-+	for (i = 0; i < MAX_BUFFER_NUM; i++) {
-+		vb = priv->queue_buf[i];
-+		if (vb) {
-+			list_del_init(to_buf_list(vb));
-+			vb2_buffer_done(vb, VB2_BUF_STATE_ERROR);
-+		}
-+	}
-+	spin_unlock_irq(&priv->lock);
-+
-+	pm_runtime_put(ici->v4l2_dev.dev);
-+
-+	dev_dbg(icd->parent, "R-Car VIN driver detached from camera %d\n",
-+		icd->devnum);
-+}
-+
-+/* Called with .host_lock held */
-+static int rcar_vin_clock_start(struct soc_camera_host *ici)
-+{
-+	/* VIN does not have "mclk" */
-+	return 0;
-+}
-+
-+/* Called with .host_lock held */
-+static void rcar_vin_clock_stop(struct soc_camera_host *ici)
-+{
-+	/* VIN does not have "mclk" */
-+}
-+
-+/* rect is guaranteed to not exceed the scaled camera rectangle */
-+static int rcar_vin_set_rect(struct soc_camera_device *icd)
-+{
-+	struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
-+	struct rcar_vin_cam *cam = icd->host_priv;
-+	struct rcar_vin_priv *priv = ici->priv;
-+	unsigned int left_offset, top_offset;
-+	unsigned char dsize = 0;
-+	struct v4l2_rect *cam_subrect = &cam->subrect;
-+
-+	dev_dbg(icd->parent, "Crop %ux%u@%u:%u\n",
-+		icd->user_width, icd->user_height, cam->vin_left, cam->vin_top);
-+
-+	left_offset = cam->vin_left;
-+	top_offset = cam->vin_top;
-+
-+	if (icd->current_fmt->host_fmt->fourcc == V4L2_PIX_FMT_RGB32 &&
-+	    priv->chip == RCAR_E1)
-+		dsize = 1;
-+
-+	dev_dbg(icd->parent, "Cam %ux%u@%u:%u\n",
-+		cam->width, cam->height, cam->vin_left, cam->vin_top);
-+	dev_dbg(icd->parent, "Cam subrect %ux%u@%u:%u\n",
-+		cam_subrect->width, cam_subrect->height,
-+		cam_subrect->left, cam_subrect->top);
-+
-+	/* Set Start/End Pixel/Line Pre-Clip */
-+	iowrite32(left_offset << dsize, priv->base + VNSPPRC_REG);
-+	iowrite32((left_offset + cam->width - 1) << dsize,
-+		  priv->base + VNEPPRC_REG);
-+	switch (priv->field) {
-+	case V4L2_FIELD_INTERLACED:
-+	case V4L2_FIELD_INTERLACED_TB:
-+	case V4L2_FIELD_INTERLACED_BT:
-+		iowrite32(top_offset / 2, priv->base + VNSLPRC_REG);
-+		iowrite32((top_offset + cam->height) / 2 - 1,
-+			  priv->base + VNELPRC_REG);
-+		break;
-+	default:
-+		iowrite32(top_offset, priv->base + VNSLPRC_REG);
-+		iowrite32(top_offset + cam->height - 1,
-+			  priv->base + VNELPRC_REG);
-+		break;
-+	}
-+
-+	/* Set Start/End Pixel/Line Post-Clip */
-+	iowrite32(0, priv->base + VNSPPOC_REG);
-+	iowrite32(0, priv->base + VNSLPOC_REG);
-+	iowrite32((cam_subrect->width - 1) << dsize, priv->base + VNEPPOC_REG);
-+	switch (priv->field) {
-+	case V4L2_FIELD_INTERLACED:
-+	case V4L2_FIELD_INTERLACED_TB:
-+	case V4L2_FIELD_INTERLACED_BT:
-+		iowrite32(cam_subrect->height / 2 - 1,
-+			  priv->base + VNELPOC_REG);
-+		break;
-+	default:
-+		iowrite32(cam_subrect->height - 1, priv->base + VNELPOC_REG);
-+		break;
-+	}
-+
-+	iowrite32(ALIGN(cam->width, 0x10), priv->base + VNIS_REG);
-+
-+	return 0;
-+}
-+
-+static void capture_stop_preserve(struct rcar_vin_priv *priv, u32 *vnmc)
-+{
-+	*vnmc = ioread32(priv->base + VNMC_REG);
-+	/* module disable */
-+	iowrite32(*vnmc & ~VNMC_ME, priv->base + VNMC_REG);
-+}
-+
-+static void capture_restore(struct rcar_vin_priv *priv, u32 vnmc)
-+{
-+	unsigned long timeout = jiffies + 10 * HZ;
-+
-+	/*
-+	 * Wait until the end of the current frame. It can take a long time,
-+	 * but if it has been aborted by a MRST1 reset, it should exit sooner.
-+	 */
-+	while ((ioread32(priv->base + VNMS_REG) & VNMS_AV) &&
-+		time_before(jiffies, timeout))
-+		msleep(1);
-+
-+	if (time_after(jiffies, timeout)) {
-+		dev_err(priv->ici.v4l2_dev.dev,
-+			"Timeout waiting for frame end! Interface problem?\n");
-+		return;
-+	}
-+
-+	iowrite32(vnmc, priv->base + VNMC_REG);
-+}
-+
-+#define VIN_MBUS_FLAGS	(V4L2_MBUS_MASTER |		\
-+			 V4L2_MBUS_PCLK_SAMPLE_RISING |	\
-+			 V4L2_MBUS_HSYNC_ACTIVE_HIGH |	\
-+			 V4L2_MBUS_HSYNC_ACTIVE_LOW |	\
-+			 V4L2_MBUS_VSYNC_ACTIVE_HIGH |	\
-+			 V4L2_MBUS_VSYNC_ACTIVE_LOW |	\
-+			 V4L2_MBUS_DATA_ACTIVE_HIGH)
-+
-+static int rcar_vin_set_bus_param(struct soc_camera_device *icd)
-+{
-+	struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
-+	struct rcar_vin_priv *priv = ici->priv;
-+	struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
-+	struct v4l2_mbus_config cfg;
-+	unsigned long common_flags;
-+	u32 vnmc;
-+	u32 val;
-+	int ret;
-+
-+	capture_stop_preserve(priv, &vnmc);
-+
-+	ret = v4l2_subdev_call(sd, video, g_mbus_config, &cfg);
-+	if (!ret) {
-+		common_flags = soc_mbus_config_compatible(&cfg, VIN_MBUS_FLAGS);
-+		if (!common_flags) {
-+			dev_warn(icd->parent,
-+				 "MBUS flags incompatible: camera 0x%x, host 0x%x\n",
-+				 cfg.flags, VIN_MBUS_FLAGS);
-+			return -EINVAL;
-+		}
-+	} else if (ret != -ENOIOCTLCMD) {
-+		return ret;
-+	} else {
-+		common_flags = VIN_MBUS_FLAGS;
-+	}
-+
-+	/* Make choises, based on platform preferences */
-+	if ((common_flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH) &&
-+	    (common_flags & V4L2_MBUS_HSYNC_ACTIVE_LOW)) {
-+		if (priv->pdata->flags & RCAR_VIN_HSYNC_ACTIVE_LOW)
-+			common_flags &= ~V4L2_MBUS_HSYNC_ACTIVE_HIGH;
-+		else
-+			common_flags &= ~V4L2_MBUS_HSYNC_ACTIVE_LOW;
-+	}
-+
-+	if ((common_flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH) &&
-+	    (common_flags & V4L2_MBUS_VSYNC_ACTIVE_LOW)) {
-+		if (priv->pdata->flags & RCAR_VIN_VSYNC_ACTIVE_LOW)
-+			common_flags &= ~V4L2_MBUS_VSYNC_ACTIVE_HIGH;
-+		else
-+			common_flags &= ~V4L2_MBUS_VSYNC_ACTIVE_LOW;
-+	}
-+
-+	cfg.flags = common_flags;
-+	ret = v4l2_subdev_call(sd, video, s_mbus_config, &cfg);
-+	if (ret < 0 && ret != -ENOIOCTLCMD)
-+		return ret;
-+
-+	val = priv->field == V4L2_FIELD_NONE ? VNDMR2_FTEV : 0;
-+	if (!(common_flags & V4L2_MBUS_VSYNC_ACTIVE_LOW))
-+		val |= VNDMR2_VPS;
-+	if (!(common_flags & V4L2_MBUS_HSYNC_ACTIVE_LOW))
-+		val |= VNDMR2_HPS;
-+	iowrite32(val, priv->base + VNDMR2_REG);
-+
-+	ret = rcar_vin_set_rect(icd);
-+	if (ret < 0)
-+		return ret;
-+
-+	capture_restore(priv, vnmc);
-+
-+	return 0;
-+}
-+
-+static int rcar_vin_try_bus_param(struct soc_camera_device *icd,
-+				  unsigned char buswidth)
-+{
-+	struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
-+	struct v4l2_mbus_config cfg;
-+	int ret;
-+
-+	ret = v4l2_subdev_call(sd, video, g_mbus_config, &cfg);
-+	if (ret == -ENOIOCTLCMD)
-+		return 0;
-+	else if (ret)
-+		return ret;
-+
-+	if (buswidth > 24)
-+		return -EINVAL;
-+
-+	/* check is there common mbus flags */
-+	ret = soc_mbus_config_compatible(&cfg, VIN_MBUS_FLAGS);
-+	if (ret)
-+		return 0;
-+
-+	dev_warn(icd->parent,
-+		"MBUS flags incompatible: camera 0x%x, host 0x%x\n",
-+		 cfg.flags, VIN_MBUS_FLAGS);
-+
-+	return -EINVAL;
-+}
-+
-+static bool rcar_vin_packing_supported(const struct soc_mbus_pixelfmt *fmt)
-+{
-+	return	fmt->packing == SOC_MBUS_PACKING_NONE ||
-+		(fmt->bits_per_sample > 8 &&
-+		 fmt->packing == SOC_MBUS_PACKING_EXTEND16);
-+}
-+
-+static const struct soc_mbus_pixelfmt rcar_vin_formats[] = {
-+	{
-+		.fourcc			= V4L2_PIX_FMT_NV16,
-+		.name			= "NV16",
-+		.bits_per_sample	= 8,
-+		.packing		= SOC_MBUS_PACKING_2X8_PADHI,
-+		.order			= SOC_MBUS_ORDER_LE,
-+		.layout			= SOC_MBUS_LAYOUT_PLANAR_Y_C,
-+	},
-+	{
-+		.fourcc			= V4L2_PIX_FMT_UYVY,
-+		.name			= "UYVY",
-+		.bits_per_sample	= 16,
-+		.packing		= SOC_MBUS_PACKING_NONE,
-+		.order			= SOC_MBUS_ORDER_LE,
-+		.layout			= SOC_MBUS_LAYOUT_PACKED,
-+	},
-+	{
-+		.fourcc			= V4L2_PIX_FMT_RGB565,
-+		.name			= "RGB565",
-+		.bits_per_sample	= 16,
-+		.packing		= SOC_MBUS_PACKING_NONE,
-+		.order			= SOC_MBUS_ORDER_LE,
-+		.layout			= SOC_MBUS_LAYOUT_PACKED,
-+	},
-+	{
-+		.fourcc			= V4L2_PIX_FMT_RGB555X,
-+		.name			= "ARGB1555",
-+		.bits_per_sample	= 16,
-+		.packing		= SOC_MBUS_PACKING_NONE,
-+		.order			= SOC_MBUS_ORDER_LE,
-+		.layout			= SOC_MBUS_LAYOUT_PACKED,
-+	},
-+	{
-+		.fourcc			= V4L2_PIX_FMT_RGB32,
-+		.name			= "RGB888",
-+		.bits_per_sample	= 32,
-+		.packing		= SOC_MBUS_PACKING_NONE,
-+		.order			= SOC_MBUS_ORDER_LE,
-+		.layout			= SOC_MBUS_LAYOUT_PACKED,
-+	},
-+};
-+
-+static int rcar_vin_get_formats(struct soc_camera_device *icd, unsigned int idx,
-+				struct soc_camera_format_xlate *xlate)
-+{
-+	struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
-+	struct device *dev = icd->parent;
-+	int ret, k, n;
-+	int formats = 0;
-+	struct rcar_vin_cam *cam;
-+	enum v4l2_mbus_pixelcode code;
-+	const struct soc_mbus_pixelfmt *fmt;
-+
-+	ret = v4l2_subdev_call(sd, video, enum_mbus_fmt, idx, &code);
-+	if (ret < 0)
-+		return 0;
-+
-+	fmt = soc_mbus_get_fmtdesc(code);
-+	if (!fmt) {
-+		dev_warn(dev, "unsupported format code #%u: %d\n", idx, code);
-+		return 0;
-+	}
-+
-+	ret = rcar_vin_try_bus_param(icd, fmt->bits_per_sample);
-+	if (ret < 0)
-+		return 0;
-+
-+	if (!icd->host_priv) {
-+		struct v4l2_mbus_framefmt mf;
-+		struct v4l2_rect rect;
-+		struct device *dev = icd->parent;
-+		int shift;
-+
-+		ret = v4l2_subdev_call(sd, video, g_mbus_fmt, &mf);
-+		if (ret < 0)
-+			return ret;
-+
-+		/* Cache current client geometry */
-+		ret = soc_camera_client_g_rect(sd, &rect);
-+		if (ret == -ENOIOCTLCMD) {
-+			/* Sensor driver doesn't support cropping */
-+			rect.left = 0;
-+			rect.top = 0;
-+			rect.width = mf.width;
-+			rect.height = mf.height;
-+		} else if (ret < 0) {
-+			return ret;
-+		}
-+
-+		/*
-+		 * If sensor proposes too large format then try smaller ones:
-+		 * 1280x960, 640x480, 320x240
-+		 */
-+		for (shift = 0; shift < 3; shift++) {
-+			if (mf.width <= VIN_MAX_WIDTH &&
-+			    mf.height <= VIN_MAX_HEIGHT)
-+				break;
-+
-+			mf.width = 1280 >> shift;
-+			mf.height = 960 >> shift;
-+			ret = v4l2_device_call_until_err(sd->v4l2_dev,
-+							 soc_camera_grp_id(icd),
-+							 video, s_mbus_fmt,
-+							 &mf);
-+			if (ret < 0)
-+				return ret;
-+		}
-+
-+		if (shift == 3) {
-+			dev_err(dev,
-+				"Failed to configure the client below %ux%x\n",
-+				mf.width, mf.height);
-+			return -EIO;
-+		}
-+
-+		dev_dbg(dev, "camera fmt %ux%u\n", mf.width, mf.height);
-+
-+		cam = kzalloc(sizeof(*cam), GFP_KERNEL);
-+		if (!cam)
-+			return -ENOMEM;
-+		/*
-+		 * We are called with current camera crop,
-+		 * initialise subrect with it
-+		 */
-+		cam->rect = rect;
-+		cam->subrect = rect;
-+		cam->width = mf.width;
-+		cam->height = mf.height;
-+
-+		icd->host_priv = cam;
-+	} else {
-+		cam = icd->host_priv;
-+	}
-+
-+	/* Beginning of a pass */
-+	if (!idx)
-+		cam->extra_fmt = NULL;
-+
-+	switch (code) {
-+	case V4L2_MBUS_FMT_YUYV8_1X16:
-+	case V4L2_MBUS_FMT_YUYV8_2X8:
-+		if (cam->extra_fmt)
-+			break;
-+
-+		/* Add all our formats that can be generated by VIN */
-+		cam->extra_fmt = rcar_vin_formats;
-+
-+		n = ARRAY_SIZE(rcar_vin_formats);
-+		formats += n;
-+		for (k = 0; xlate && k < n; k++, xlate++) {
-+			xlate->host_fmt = &rcar_vin_formats[k];
-+			xlate->code = code;
-+			dev_dbg(dev, "Providing format %s using code %d\n",
-+				rcar_vin_formats[k].name, code);
-+		}
-+		break;
-+	default:
-+		if (!rcar_vin_packing_supported(fmt))
-+			return 0;
-+
-+		dev_dbg(dev, "Providing format %s in pass-through mode\n",
-+			fmt->name);
-+		break;
-+	}
-+
-+	/* Generic pass-through */
-+	formats++;
-+	if (xlate) {
-+		xlate->host_fmt = fmt;
-+		xlate->code = code;
-+		xlate++;
-+	}
-+
-+	return formats;
-+}
-+
-+static void rcar_vin_put_formats(struct soc_camera_device *icd)
-+{
-+	kfree(icd->host_priv);
-+	icd->host_priv = NULL;
-+}
-+
-+static int rcar_vin_set_crop(struct soc_camera_device *icd,
-+			     const struct v4l2_crop *a)
-+{
-+	struct v4l2_crop a_writable = *a;
-+	const struct v4l2_rect *rect = &a_writable.c;
-+	struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
-+	struct rcar_vin_priv *priv = ici->priv;
-+	struct v4l2_crop cam_crop;
-+	struct rcar_vin_cam *cam = icd->host_priv;
-+	struct v4l2_rect *cam_rect = &cam_crop.c;
-+	struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
-+	struct device *dev = icd->parent;
-+	struct v4l2_mbus_framefmt mf;
-+	u32 vnmc;
-+	int ret, i;
-+
-+	dev_dbg(dev, "S_CROP(%ux%u@%u:%u)\n", rect->width, rect->height,
-+		rect->left, rect->top);
-+
-+	/* During camera cropping its output window can change too, stop VIN */
-+	capture_stop_preserve(priv, &vnmc);
-+	dev_dbg(dev, "VNMC_REG 0x%x\n", vnmc);
-+
-+	/* Apply iterative camera S_CROP for new input window. */
-+	ret = soc_camera_client_s_crop(sd, &a_writable, &cam_crop,
-+				       &cam->rect, &cam->subrect);
-+	if (ret < 0)
-+		return ret;
-+
-+	dev_dbg(dev, "camera cropped to %ux%u@%u:%u\n",
-+		cam_rect->width, cam_rect->height,
-+		cam_rect->left, cam_rect->top);
-+
-+	/* On success cam_crop contains current camera crop */
-+
-+	/* Retrieve camera output window */
-+	ret = v4l2_subdev_call(sd, video, g_mbus_fmt, &mf);
-+	if (ret < 0)
-+		return ret;
-+
-+	if (mf.width > VIN_MAX_WIDTH || mf.height > VIN_MAX_HEIGHT)
-+		return -EINVAL;
-+
-+	/* Cache camera output window */
-+	cam->width = mf.width;
-+	cam->height = mf.height;
-+
-+	icd->user_width  = cam->width;
-+	icd->user_height = cam->height;
-+
-+	cam->vin_left = rect->left & ~1;
-+	cam->vin_top = rect->top & ~1;
-+
-+	/* Use VIN cropping to crop to the new window. */
-+	ret = rcar_vin_set_rect(icd);
-+	if (ret < 0)
-+		return ret;
-+
-+	cam->subrect = *rect;
-+
-+	dev_dbg(dev, "VIN cropped to %ux%u@%u:%u\n",
-+		icd->user_width, icd->user_height,
-+		cam->vin_left, cam->vin_top);
-+
-+	/* Restore capture */
-+	for (i = 0; i < MAX_BUFFER_NUM; i++) {
-+		if (priv->queue_buf[i] && priv->state == STOPPED) {
-+			vnmc |= VNMC_ME;
-+			break;
-+		}
-+	}
-+	capture_restore(priv, vnmc);
-+
-+	/* Even if only camera cropping succeeded */
-+	return ret;
-+}
-+
-+static int rcar_vin_get_crop(struct soc_camera_device *icd,
-+			     struct v4l2_crop *a)
-+{
-+	struct rcar_vin_cam *cam = icd->host_priv;
-+
-+	a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
-+	a->c = cam->subrect;
-+
-+	return 0;
-+}
-+
-+/* Similar to set_crop multistage iterative algorithm */
-+static int rcar_vin_set_fmt(struct soc_camera_device *icd,
-+			    struct v4l2_format *f)
-+{
-+	struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
-+	struct rcar_vin_priv *priv = ici->priv;
-+	struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
-+	struct rcar_vin_cam *cam = icd->host_priv;
-+	struct v4l2_pix_format *pix = &f->fmt.pix;
-+	struct v4l2_mbus_framefmt mf;
-+	struct device *dev = icd->parent;
-+	__u32 pixfmt = pix->pixelformat;
-+	const struct soc_camera_format_xlate *xlate;
-+	unsigned int vin_sub_width = 0, vin_sub_height = 0;
-+	int ret;
-+	bool can_scale;
-+	enum v4l2_field field;
-+	v4l2_std_id std;
-+
-+	dev_dbg(dev, "S_FMT(pix=0x%x, %ux%u)\n",
-+		pixfmt, pix->width, pix->height);
-+
-+	switch (pix->field) {
-+	default:
-+		pix->field = V4L2_FIELD_NONE;
-+		/* fall-through */
-+	case V4L2_FIELD_NONE:
-+	case V4L2_FIELD_TOP:
-+	case V4L2_FIELD_BOTTOM:
-+	case V4L2_FIELD_INTERLACED_TB:
-+	case V4L2_FIELD_INTERLACED_BT:
-+		field = pix->field;
-+		break;
-+	case V4L2_FIELD_INTERLACED:
-+		/* Query for standard if not explicitly mentioned _TB/_BT */
-+		ret = v4l2_subdev_call(sd, video, querystd, &std);
-+		if (ret < 0)
-+			std = V4L2_STD_625_50;
-+
-+		field = std & V4L2_STD_625_50 ? V4L2_FIELD_INTERLACED_TB :
-+						V4L2_FIELD_INTERLACED_BT;
-+		break;
-+	}
-+
-+	xlate = soc_camera_xlate_by_fourcc(icd, pixfmt);
-+	if (!xlate) {
-+		dev_warn(dev, "Format %x not found\n", pixfmt);
-+		return -EINVAL;
-+	}
-+	/* Calculate client output geometry */
-+	soc_camera_calc_client_output(icd, &cam->rect, &cam->subrect, pix, &mf,
-+				      12);
-+	mf.field = pix->field;
-+	mf.colorspace = pix->colorspace;
-+	mf.code	 = xlate->code;
-+
-+	switch (pixfmt) {
-+	case V4L2_PIX_FMT_RGB32:
-+		can_scale = priv->chip != RCAR_E1;
-+		break;
-+	case V4L2_PIX_FMT_UYVY:
-+	case V4L2_PIX_FMT_YUYV:
-+	case V4L2_PIX_FMT_RGB565:
-+	case V4L2_PIX_FMT_RGB555X:
-+		can_scale = true;
-+		break;
-+	default:
-+		can_scale = false;
-+		break;
-+	}
-+
-+	dev_dbg(dev, "request camera output %ux%u\n", mf.width, mf.height);
-+
-+	ret = soc_camera_client_scale(icd, &cam->rect, &cam->subrect,
-+				      &mf, &vin_sub_width, &vin_sub_height,
-+				      can_scale, 12);
-+
-+	/* Done with the camera. Now see if we can improve the result */
-+	dev_dbg(dev, "Camera %d fmt %ux%u, requested %ux%u\n",
-+		ret, mf.width, mf.height, pix->width, pix->height);
-+
-+	if (ret == -ENOIOCTLCMD)
-+		dev_dbg(dev, "Sensor doesn't support scaling\n");
-+	else if (ret < 0)
-+		return ret;
-+
-+	if (mf.code != xlate->code)
-+		return -EINVAL;
-+
-+	/* Prepare VIN crop */
-+	cam->width = mf.width;
-+	cam->height = mf.height;
-+
-+	/* Use VIN scaling to scale to the requested user window. */
-+
-+	/* We cannot scale up */
-+	if (pix->width > vin_sub_width)
-+		vin_sub_width = pix->width;
-+
-+	if (pix->height > vin_sub_height)
-+		vin_sub_height = pix->height;
-+
-+	pix->colorspace = mf.colorspace;
-+
-+	if (!can_scale) {
-+		pix->width = vin_sub_width;
-+		pix->height = vin_sub_height;
-+	}
-+
-+	/*
-+	 * We have calculated CFLCR, the actual configuration will be performed
-+	 * in rcar_vin_set_bus_param()
-+	 */
-+
-+	dev_dbg(dev, "W: %u : %u, H: %u : %u\n",
-+		vin_sub_width, pix->width, vin_sub_height, pix->height);
-+
-+	icd->current_fmt = xlate;
-+
-+	priv->field = field;
-+
-+	return 0;
-+}
-+
-+static int rcar_vin_try_fmt(struct soc_camera_device *icd,
-+			    struct v4l2_format *f)
-+{
-+	const struct soc_camera_format_xlate *xlate;
-+	struct v4l2_pix_format *pix = &f->fmt.pix;
-+	struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
-+	struct v4l2_mbus_framefmt mf;
-+	__u32 pixfmt = pix->pixelformat;
-+	int width, height;
-+	int ret;
-+
-+	xlate = soc_camera_xlate_by_fourcc(icd, pixfmt);
-+	if (!xlate) {
-+		xlate = icd->current_fmt;
-+		dev_dbg(icd->parent, "Format %x not found, keeping %x\n",
-+			pixfmt, xlate->host_fmt->fourcc);
-+		pixfmt = xlate->host_fmt->fourcc;
-+		pix->pixelformat = pixfmt;
-+		pix->colorspace = icd->colorspace;
-+	}
-+
-+	/* FIXME: calculate using depth and bus width */
-+	v4l_bound_align_image(&pix->width, 2, VIN_MAX_WIDTH, 1,
-+			      &pix->height, 4, VIN_MAX_HEIGHT, 2, 0);
-+
-+	width = pix->width;
-+	height = pix->height;
-+
-+	/* let soc-camera calculate these values */
-+	pix->bytesperline = 0;
-+	pix->sizeimage = 0;
-+
-+	/* limit to sensor capabilities */
-+	mf.width = pix->width;
-+	mf.height = pix->height;
-+	mf.field = pix->field;
-+	mf.code = xlate->code;
-+	mf.colorspace = pix->colorspace;
-+
-+	ret = v4l2_device_call_until_err(sd->v4l2_dev, soc_camera_grp_id(icd),
-+					 video, try_mbus_fmt, &mf);
-+	if (ret < 0)
-+		return ret;
-+
-+	pix->width = mf.width;
-+	pix->height = mf.height;
-+	pix->field = mf.field;
-+	pix->colorspace = mf.colorspace;
-+
-+	if (pixfmt == V4L2_PIX_FMT_NV16) {
-+		/* FIXME: check against rect_max after converting soc-camera */
-+		/* We can scale precisely, need a bigger image from camera */
-+		if (pix->width < width || pix->height < height) {
-+			/*
-+			 * We presume, the sensor behaves sanely, i.e. if
-+			 * requested a bigger rectangle, it will not return a
-+			 * smaller one.
-+			 */
-+			mf.width = VIN_MAX_WIDTH;
-+			mf.height = VIN_MAX_HEIGHT;
-+			ret = v4l2_device_call_until_err(sd->v4l2_dev,
-+							 soc_camera_grp_id(icd),
-+							 video, try_mbus_fmt,
-+							 &mf);
-+			if (ret < 0) {
-+				dev_err(icd->parent,
-+					"client try_fmt() = %d\n", ret);
-+				return ret;
-+			}
-+		}
-+		/* We will scale exactly */
-+		if (mf.width > width)
-+			pix->width = width;
-+		if (mf.height > height)
-+			pix->height = height;
-+	}
-+
-+	return ret;
-+}
-+
-+static unsigned int rcar_vin_poll(struct file *file, poll_table *pt)
-+{
-+	struct soc_camera_device *icd = file->private_data;
-+
-+	return vb2_poll(&icd->vb2_vidq, file, pt);
-+}
-+
-+static int rcar_vin_querycap(struct soc_camera_host *ici,
-+			     struct v4l2_capability *cap)
-+{
-+	strlcpy(cap->card, "R_Car_VIN", sizeof(cap->card));
-+	cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING;
-+	return 0;
-+}
-+
-+static int rcar_vin_init_videobuf2(struct vb2_queue *vq,
-+				   struct soc_camera_device *icd)
-+{
-+	vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
-+	vq->io_modes = VB2_MMAP | VB2_USERPTR;
-+	vq->drv_priv = icd;
-+	vq->ops = &rcar_vin_vb2_ops;
-+	vq->mem_ops = &vb2_dma_contig_memops;
-+	vq->buf_struct_size = sizeof(struct rcar_vin_buffer);
-+	vq->timestamp_type  = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
-+
-+	return vb2_queue_init(vq);
-+}
-+
-+static struct soc_camera_host_ops rcar_vin_host_ops = {
-+	.owner		= THIS_MODULE,
-+	.add		= rcar_vin_add_device,
-+	.remove		= rcar_vin_remove_device,
-+	.clock_start	= rcar_vin_clock_start,
-+	.clock_stop	= rcar_vin_clock_stop,
-+	.get_formats	= rcar_vin_get_formats,
-+	.put_formats	= rcar_vin_put_formats,
-+	.get_crop	= rcar_vin_get_crop,
-+	.set_crop	= rcar_vin_set_crop,
-+	.try_fmt	= rcar_vin_try_fmt,
-+	.set_fmt	= rcar_vin_set_fmt,
-+	.poll		= rcar_vin_poll,
-+	.querycap	= rcar_vin_querycap,
-+	.set_bus_param	= rcar_vin_set_bus_param,
-+	.init_videobuf2	= rcar_vin_init_videobuf2,
-+};
-+
-+static struct platform_device_id rcar_vin_id_table[] = {
-+	{ "r8a7779-vin",  RCAR_H1 },
-+	{ "r8a7778-vin",  RCAR_M1 },
-+	{ "uPD35004-vin", RCAR_E1 },
-+	{},
-+};
-+MODULE_DEVICE_TABLE(platform, rcar_vin_id_table);
-+
-+static int rcar_vin_probe(struct platform_device *pdev)
-+{
-+	struct rcar_vin_priv *priv;
-+	struct resource *mem;
-+	struct rcar_vin_platform_data *pdata;
-+	int irq, ret;
-+
-+	pdata = pdev->dev.platform_data;
-+	if (!pdata || !pdata->flags) {
-+		dev_err(&pdev->dev, "platform data not set\n");
-+		return -EINVAL;
-+	}
-+
-+	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+	if (mem == NULL)
-+		return -EINVAL;
-+
-+	irq = platform_get_irq(pdev, 0);
-+	if (irq <= 0)
-+		return -EINVAL;
-+
-+	priv = devm_kzalloc(&pdev->dev, sizeof(struct rcar_vin_priv),
-+			    GFP_KERNEL);
-+	if (!priv)
-+		return -ENOMEM;
-+
-+	priv->base = devm_ioremap_resource(&pdev->dev, mem);
-+	if (IS_ERR(priv->base))
-+		return PTR_ERR(priv->base);
-+
-+	ret = devm_request_irq(&pdev->dev, irq, rcar_vin_irq, IRQF_SHARED,
-+			       dev_name(&pdev->dev), priv);
-+	if (ret)
-+		return ret;
-+
-+	priv->alloc_ctx = vb2_dma_contig_init_ctx(&pdev->dev);
-+	if (IS_ERR(priv->alloc_ctx))
-+		return PTR_ERR(priv->alloc_ctx);
-+
-+	priv->ici.priv = priv;
-+	priv->ici.v4l2_dev.dev = &pdev->dev;
-+	priv->ici.nr = pdev->id;
-+	priv->ici.drv_name = dev_name(&pdev->dev);
-+	priv->ici.ops = &rcar_vin_host_ops;
-+
-+	priv->pdata = pdata;
-+	priv->chip = pdev->id_entry->driver_data;
-+	spin_lock_init(&priv->lock);
-+	INIT_LIST_HEAD(&priv->capture);
-+
-+	priv->state = STOPPED;
-+
-+	pm_suspend_ignore_children(&pdev->dev, true);
-+	pm_runtime_enable(&pdev->dev);
-+
-+	ret = soc_camera_host_register(&priv->ici);
-+	if (ret)
-+		goto cleanup;
-+
-+	return 0;
-+
-+cleanup:
-+	pm_runtime_disable(&pdev->dev);
-+	vb2_dma_contig_cleanup_ctx(priv->alloc_ctx);
-+
-+	return ret;
-+}
-+
-+static int rcar_vin_remove(struct platform_device *pdev)
-+{
-+	struct soc_camera_host *soc_host = to_soc_camera_host(&pdev->dev);
-+	struct rcar_vin_priv *priv = container_of(soc_host,
-+						  struct rcar_vin_priv, ici);
-+
-+	soc_camera_host_unregister(soc_host);
-+	pm_runtime_disable(&pdev->dev);
-+	vb2_dma_contig_cleanup_ctx(priv->alloc_ctx);
-+
-+	return 0;
-+}
-+
-+static struct platform_driver rcar_vin_driver = {
-+	.probe		= rcar_vin_probe,
-+	.remove		= rcar_vin_remove,
-+	.driver		= {
-+		.name		= DRV_NAME,
-+		.owner		= THIS_MODULE,
-+	},
-+	.id_table	= rcar_vin_id_table,
-+};
-+
-+module_platform_driver(rcar_vin_driver);
-+
-+MODULE_LICENSE("GPL");
-+MODULE_ALIAS("platform:rcar_vin");
-+MODULE_DESCRIPTION("Renesas R-Car VIN camera host driver");
-diff --git a/include/linux/platform_data/camera-rcar.h b/include/linux/platform_data/camera-rcar.h
-new file mode 100644
-index 00000000..dfc83c58
---- /dev/null
-+++ b/include/linux/platform_data/camera-rcar.h
-@@ -0,0 +1,25 @@
-+/*
-+ * Platform data for Renesas R-Car VIN soc-camera driver
-+ *
-+ * Copyright (C) 2011-2013 Renesas Solutions Corp.
-+ * Copyright (C) 2013 Cogent Embedded, Inc., <source@cogentembedded.com>
-+ *
-+ * This program is free software; you can redistribute  it and/or modify it
-+ * under  the terms of  the GNU General  Public License as published by the
-+ * Free Software Foundation;  either version 2 of the  License, or (at your
-+ * option) any later version.
-+ */
-+
-+#ifndef __CAMERA_RCAR_H_
-+#define __CAMERA_RCAR_H_
-+
-+#define RCAR_VIN_HSYNC_ACTIVE_LOW	(1 << 0)
-+#define RCAR_VIN_VSYNC_ACTIVE_LOW	(1 << 1)
-+#define RCAR_VIN_BT601			(1 << 2)
-+#define RCAR_VIN_BT656			(1 << 3)
-+
-+struct rcar_vin_platform_data {
-+	unsigned int flags;
-+};
-+
-+#endif /* __CAMERA_RCAR_H_ */
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0069-ARM-dts-r8a7740-cpus-cpu-nodes-dts-updates.patch b/patches.renesas/0069-ARM-dts-r8a7740-cpus-cpu-nodes-dts-updates.patch
deleted file mode 100644
index 2b061920e2d1d..0000000000000
--- a/patches.renesas/0069-ARM-dts-r8a7740-cpus-cpu-nodes-dts-updates.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From 0cca96aff0e7931ed7b8aefcdb32bfc3012bcd17 Mon Sep 17 00:00:00 2001
-From: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
-Date: Thu, 18 Apr 2013 18:39:50 +0100
-Subject: ARM: dts: r8a7740: cpus/cpu nodes dts updates
-
-This patch updates the in-kernel dts files according to the latest cpus
-and cpu bindings updates for ARM.
-
-Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
-Acked-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit b403201377deb51e2efbf4713f7047f292482796)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7740.dtsi | 4 ++++
- 1 file changed, 4 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi
-index 798fa35c..8a831e91 100644
---- a/arch/arm/boot/dts/r8a7740.dtsi
-+++ b/arch/arm/boot/dts/r8a7740.dtsi
-@@ -14,8 +14,12 @@
- 	compatible = "renesas,r8a7740";
- 
- 	cpus {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
- 		cpu@0 {
- 			compatible = "arm,cortex-a9";
-+			device_type = "cpu";
-+			reg = <0x0>;
- 		};
- 	};
- };
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0069-ARM-shmobile-sh7372-tidyup-clock-table-order.patch b/patches.renesas/0069-ARM-shmobile-sh7372-tidyup-clock-table-order.patch
deleted file mode 100644
index ea596c520cc85..0000000000000
--- a/patches.renesas/0069-ARM-shmobile-sh7372-tidyup-clock-table-order.patch
+++ /dev/null
@@ -1,49 +0,0 @@
-From 7629d6863509b356b8632e587f8d89607a53e338 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Tue, 19 Nov 2013 01:05:33 -0800
-Subject: ARM: shmobile: sh7372: tidyup clock table order
-
-SuperH lookups clock is using CLKDEV_CON/DEV/ICK_ID() macro
-for a long term.
-But in these days, the ICK clock is defined in random place.
-This patch arranges it.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 8af3f18b7b42e32387b54d2e2f8300589b0198e9)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-sh7372.c | 9 +++++----
- 1 file changed, 5 insertions(+), 4 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/clock-sh7372.c b/arch/arm/mach-shmobile/clock-sh7372.c
-index 5390c6bbbc02..28489978b09c 100644
---- a/arch/arm/mach-shmobile/clock-sh7372.c
-+++ b/arch/arm/mach-shmobile/clock-sh7372.c
-@@ -504,10 +504,6 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_CON_ID("spu_clk", &div6_clks[DIV6_SPU]),
- 	CLKDEV_CON_ID("vou_clk", &div6_clks[DIV6_VOU]),
- 	CLKDEV_CON_ID("hdmi_clk", &div6_reparent_clks[DIV6_HDMI]),
--	CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSIT]),
--	CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSIT]),
--	CLKDEV_ICK_ID("dsip_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSI0P]),
--	CLKDEV_ICK_ID("dsip_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSI1P]),
- 
- 	/* MSTP32 clocks */
- 	CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* IIC2 */
-@@ -574,6 +570,11 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[MSTP403]), /* KEYSC */
- 	CLKDEV_DEV_ID("sh_cmt.2", &mstp_clks[MSTP400]), /* CMT2 */
- 
-+	/* ICK */
-+	CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSIT]),
-+	CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSIT]),
-+	CLKDEV_ICK_ID("dsip_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSI0P]),
-+	CLKDEV_ICK_ID("dsip_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSI1P]),
- 	CLKDEV_ICK_ID("hdmi", "sh_mobile_lcdc_fb.1",
- 		      &div6_reparent_clks[DIV6_HDMI]),
- 	CLKDEV_ICK_ID("ick", "sh-mobile-hdmi", &div6_reparent_clks[DIV6_HDMI]),
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0069-i2c-rcar-fix-clk_get-error-handling.patch b/patches.renesas/0069-i2c-rcar-fix-clk_get-error-handling.patch
deleted file mode 100644
index 607e4d2bae807..0000000000000
--- a/patches.renesas/0069-i2c-rcar-fix-clk_get-error-handling.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From e222e9e3baa43a0ae2544264ae609241c096885d Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Thu, 12 Sep 2013 14:36:47 +0200
-Subject: i2c: rcar: fix clk_get() error handling
-
-When clk_get() fails, it returns an error code, not a NULL. This patch
-fixes such an error handling bug.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-(cherry picked from commit 330c824a49cd49dd7e61c1e397fa4e7380ba2c68)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/i2c/busses/i2c-rcar.c | 6 +++---
- 1 file changed, 3 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/i2c/busses/i2c-rcar.c b/drivers/i2c/busses/i2c-rcar.c
-index 056323b0666a..e5e79a031827 100644
---- a/drivers/i2c/busses/i2c-rcar.c
-+++ b/drivers/i2c/busses/i2c-rcar.c
-@@ -234,9 +234,9 @@ static int rcar_i2c_clock_calculate(struct rcar_i2c_priv *priv,
- 	u32 cdf_width;
- 	unsigned long rate;
- 
--	if (!clkp) {
--		dev_err(dev, "there is no peripheral_clk\n");
--		return -EIO;
-+	if (IS_ERR(clkp)) {
-+		dev_err(dev, "couldn't get clock\n");
-+		return PTR_ERR(clkp);
- 	}
- 
- 	switch (priv->devtype) {
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0070-ARM-dts-sh7372-cpus-cpu-nodes-dts-updates.patch b/patches.renesas/0070-ARM-dts-sh7372-cpus-cpu-nodes-dts-updates.patch
deleted file mode 100644
index 6ba49adca40cc..0000000000000
--- a/patches.renesas/0070-ARM-dts-sh7372-cpus-cpu-nodes-dts-updates.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 0b28393d43129be84754c885e7803ff9fc44ba66 Mon Sep 17 00:00:00 2001
-From: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
-Date: Thu, 18 Apr 2013 18:39:50 +0100
-Subject: ARM: dts: sh7372: cpus/cpu nodes dts updates
-
-This patch updates the in-kernel dts files according to the latest cpus
-and cpu bindings updates for ARM.
-
-Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
-Acked-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 35fae4c313f3b211c6b98678aad31adc5f9f6ba4)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/sh7372.dtsi | 5 +++++
- 1 file changed, 5 insertions(+)
-
-diff --git a/arch/arm/boot/dts/sh7372.dtsi b/arch/arm/boot/dts/sh7372.dtsi
-index 677fc603..7bf020ec 100644
---- a/arch/arm/boot/dts/sh7372.dtsi
-+++ b/arch/arm/boot/dts/sh7372.dtsi
-@@ -14,8 +14,13 @@
- 	compatible = "renesas,sh7372";
- 
- 	cpus {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
- 		cpu@0 {
- 			compatible = "arm,cortex-a8";
-+			device_type = "cpu";
-+			reg = <0x0>;
- 		};
- 	};
- };
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0070-ARM-shmobile-lager-phy-fixup-needs-CONFIG_PHYLIB.patch b/patches.renesas/0070-ARM-shmobile-lager-phy-fixup-needs-CONFIG_PHYLIB.patch
deleted file mode 100644
index 0be01c5609533..0000000000000
--- a/patches.renesas/0070-ARM-shmobile-lager-phy-fixup-needs-CONFIG_PHYLIB.patch
+++ /dev/null
@@ -1,47 +0,0 @@
-From 7cf7d0d64536e1e6caa5c27aecce7d365b48b39d Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Wed, 6 Nov 2013 09:41:09 +0900
-Subject: ARM: shmobile: lager: phy fixup needs CONFIG_PHYLIB
-
-Do not build the phy fixup unless CONFIG_PHYLIB is enabled.
-
-Other than not being useful it is also not possible to link
-the code under this condition as phy_register_fixup_for_id(),
-mdiobus_read() and mdiobus_write() are absent.
-
-arch/arm/mach-shmobile/built-in.o: In function `lager_ksz8041_fixup':
-board-lager.c:(.text+0xb8): undefined reference to `mdiobus_read'
-board-lager.c:(.text+0xd4): undefined reference to `mdiobus_write'
-arch/arm/mach-shmobile/built-in.o: In function `lager_init':
-board-lager.c:(.init.text+0xafc): undefined reference to `phy_register_fixup_for_id'
-
-This problem was introduced by 48c8b96f21817aad
-("ARM: shmobile: Lager: add Micrel KSZ8041 PHY fixup")
-
-Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 6802cdc58d4fe66cffd6cd04ee55e65dd61eeeeb)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-lager.c | 4 +++-
- 1 file changed, 3 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
-index 475a9a7b70e2..4301c3812a13 100644
---- a/arch/arm/mach-shmobile/board-lager.c
-+++ b/arch/arm/mach-shmobile/board-lager.c
-@@ -245,7 +245,9 @@ static void __init lager_init(void)
- {
- 	lager_add_standard_devices();
- 
--	phy_register_fixup_for_id("r8a7790-ether-ff:01", lager_ksz8041_fixup);
-+	if (IS_ENABLED(CONFIG_PHYLIB))
-+		phy_register_fixup_for_id("r8a7790-ether-ff:01",
-+					  lager_ksz8041_fixup);
- }
- 
- static const char *lager_boards_compat_dt[] __initdata = {
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0070-i2c-rcar-use-per-device-clock.patch b/patches.renesas/0070-i2c-rcar-use-per-device-clock.patch
deleted file mode 100644
index 41c18d20af01e..0000000000000
--- a/patches.renesas/0070-i2c-rcar-use-per-device-clock.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From 7ba214a56be110e5274f02cd03dd7630bbfaef8b Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Thu, 12 Sep 2013 14:36:48 +0200
-Subject: i2c: rcar: use per-device clock
-
-Using the same clock for all device instances is non-portable and obtaining
-clock references by an ID without using a device pointer is discouraged.
-This is also not needed, because on platforms, where this driver is used,
-suitable clocks are available for the I2C controllers, that are children of
-the peripheral clock and just pass its rate 1-to-1 to controllers. This
-patch switches the driver to obtain references to correct clocks.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-(cherry picked from commit 991e7ecf1f1a2e2fa76387066342a5a6c4a28a76)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/i2c/busses/i2c-rcar.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/i2c/busses/i2c-rcar.c b/drivers/i2c/busses/i2c-rcar.c
-index e5e79a031827..37bd2371ddf5 100644
---- a/drivers/i2c/busses/i2c-rcar.c
-+++ b/drivers/i2c/busses/i2c-rcar.c
-@@ -227,7 +227,7 @@ static int rcar_i2c_clock_calculate(struct rcar_i2c_priv *priv,
- 				    u32 bus_speed,
- 				    struct device *dev)
- {
--	struct clk *clkp = clk_get(NULL, "peripheral_clk");
-+	struct clk *clkp = clk_get(dev, NULL);
- 	u32 scgd, cdf;
- 	u32 round, ick;
- 	u32 scl;
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0071-ARM-shmobile-r8a7740-Add-OF-support-to-initialze-the.patch b/patches.renesas/0071-ARM-shmobile-r8a7740-Add-OF-support-to-initialze-the.patch
deleted file mode 100644
index 954f0e2506a73..0000000000000
--- a/patches.renesas/0071-ARM-shmobile-r8a7740-Add-OF-support-to-initialze-the.patch
+++ /dev/null
@@ -1,78 +0,0 @@
-From 7452e947806b1443e50971504158cbabd647d2db Mon Sep 17 00:00:00 2001
-From: Bastian Hecht <hechtb@gmail.com>
-Date: Wed, 17 Apr 2013 12:34:04 +0200
-Subject: ARM: shmobile: r8a7740: Add OF support to initialze the GIC
-
-We add a variant to initalize the interrupt controller in case we describe
-the GIC using the Device Tree and not platform data.
-
-Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit f9b4df4a4d7d1124c450f0713a7a1939c7f1a205)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/include/mach/r8a7740.h |  1 +
- arch/arm/mach-shmobile/intc-r8a7740.c         | 24 ++++++++++++++++++------
- 2 files changed, 19 insertions(+), 6 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/include/mach/r8a7740.h b/arch/arm/mach-shmobile/include/mach/r8a7740.h
-index abdc4d4e..19c04231 100644
---- a/arch/arm/mach-shmobile/include/mach/r8a7740.h
-+++ b/arch/arm/mach-shmobile/include/mach/r8a7740.h
-@@ -534,6 +534,7 @@ enum {
- 
- extern void r8a7740_meram_workaround(void);
- extern void r8a7740_init_irq(void);
-+extern void r8a7740_init_irq_of(void);
- extern void r8a7740_map_io(void);
- extern void r8a7740_add_early_devices(void);
- extern void r8a7740_add_standard_devices(void);
-diff --git a/arch/arm/mach-shmobile/intc-r8a7740.c b/arch/arm/mach-shmobile/intc-r8a7740.c
-index b741c840..8871f771 100644
---- a/arch/arm/mach-shmobile/intc-r8a7740.c
-+++ b/arch/arm/mach-shmobile/intc-r8a7740.c
-@@ -20,19 +20,15 @@
- 
- #include <linux/init.h>
- #include <linux/io.h>
-+#include <linux/irqchip.h>
- #include <linux/irqchip/arm-gic.h>
- 
--void __init r8a7740_init_irq(void)
-+static void __init r8a7740_init_irq_common(void)
- {
--	void __iomem *gic_dist_base = ioremap_nocache(0xc2800000, 0x1000);
--	void __iomem *gic_cpu_base = ioremap_nocache(0xc2000000, 0x1000);
- 	void __iomem *intc_prio_base = ioremap_nocache(0xe6900010, 0x10);
- 	void __iomem *intc_msk_base = ioremap_nocache(0xe6900040, 0x10);
- 	void __iomem *pfc_inta_ctrl = ioremap_nocache(0xe605807c, 0x4);
- 
--	/* initialize the Generic Interrupt Controller PL390 r0p0 */
--	gic_init(0, 29, gic_dist_base, gic_cpu_base);
--
- 	/* route signals to GIC */
- 	iowrite32(0x0, pfc_inta_ctrl);
- 
-@@ -54,3 +50,19 @@ void __init r8a7740_init_irq(void)
- 	iounmap(intc_msk_base);
- 	iounmap(pfc_inta_ctrl);
- }
-+
-+void __init r8a7740_init_irq_of(void)
-+{
-+	irqchip_init();
-+	r8a7740_init_irq_common();
-+}
-+
-+void __init r8a7740_init_irq(void)
-+{
-+	void __iomem *gic_dist_base = ioremap_nocache(0xc2800000, 0x1000);
-+	void __iomem *gic_cpu_base = ioremap_nocache(0xc2000000, 0x1000);
-+
-+	/* initialize the Generic Interrupt Controller PL390 r0p0 */
-+	gic_init(0, 29, gic_dist_base, gic_cpu_base);
-+	r8a7740_init_irq_common();
-+}
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0071-ARM-shmobile-r8a7790-Fix-GPIO-resources-in-DTS.patch b/patches.renesas/0071-ARM-shmobile-r8a7790-Fix-GPIO-resources-in-DTS.patch
deleted file mode 100644
index 5a7fa87668914..0000000000000
--- a/patches.renesas/0071-ARM-shmobile-r8a7790-Fix-GPIO-resources-in-DTS.patch
+++ /dev/null
@@ -1,103 +0,0 @@
-From 01f94eac50e2175cec451d8da843856a5d0a9c3f Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Thu, 21 Nov 2013 14:19:29 +0900
-Subject: ARM: shmobile: r8a7790: Fix GPIO resources in DTS
-
-The r8a7790 GPIO resources are currently incorrect. Fix that
-by making them match the English r8a7790 v0.6 data sheet.
-
-Tested with GPIO LED using Lager DT reference.
-
-This problem has been present since GPIOs were added to the r8a7790 SoC by
-f98e10c88aa95bf7 ("ARM: shmobile: r8a7790: Add GPIO controller devices to
-device tree") in v3.12-rc1.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 23de2278ebc3a2f971ce45ca5e5e35c9d5a74040)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7790.dtsi | 24 ++++++++++++------------
- 1 file changed, 12 insertions(+), 12 deletions(-)
-
-diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
-index ee845fad939b..46e1d7ef163f 100644
---- a/arch/arm/boot/dts/r8a7790.dtsi
-+++ b/arch/arm/boot/dts/r8a7790.dtsi
-@@ -87,9 +87,9 @@
- 		interrupts = <1 9 0xf04>;
- 	};
- 
--	gpio0: gpio@ffc40000 {
-+	gpio0: gpio@e6050000 {
- 		compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
--		reg = <0 0xffc40000 0 0x2c>;
-+		reg = <0 0xe6050000 0 0x50>;
- 		interrupt-parent = <&gic>;
- 		interrupts = <0 4 0x4>;
- 		#gpio-cells = <2>;
-@@ -99,9 +99,9 @@
- 		interrupt-controller;
- 	};
- 
--	gpio1: gpio@ffc41000 {
-+	gpio1: gpio@e6051000 {
- 		compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
--		reg = <0 0xffc41000 0 0x2c>;
-+		reg = <0 0xe6051000 0 0x50>;
- 		interrupt-parent = <&gic>;
- 		interrupts = <0 5 0x4>;
- 		#gpio-cells = <2>;
-@@ -111,9 +111,9 @@
- 		interrupt-controller;
- 	};
- 
--	gpio2: gpio@ffc42000 {
-+	gpio2: gpio@e6052000 {
- 		compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
--		reg = <0 0xffc42000 0 0x2c>;
-+		reg = <0 0xe6052000 0 0x50>;
- 		interrupt-parent = <&gic>;
- 		interrupts = <0 6 0x4>;
- 		#gpio-cells = <2>;
-@@ -123,9 +123,9 @@
- 		interrupt-controller;
- 	};
- 
--	gpio3: gpio@ffc43000 {
-+	gpio3: gpio@e6053000 {
- 		compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
--		reg = <0 0xffc43000 0 0x2c>;
-+		reg = <0 0xe6053000 0 0x50>;
- 		interrupt-parent = <&gic>;
- 		interrupts = <0 7 0x4>;
- 		#gpio-cells = <2>;
-@@ -135,9 +135,9 @@
- 		interrupt-controller;
- 	};
- 
--	gpio4: gpio@ffc44000 {
-+	gpio4: gpio@e6054000 {
- 		compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
--		reg = <0 0xffc44000 0 0x2c>;
-+		reg = <0 0xe6054000 0 0x50>;
- 		interrupt-parent = <&gic>;
- 		interrupts = <0 8 0x4>;
- 		#gpio-cells = <2>;
-@@ -147,9 +147,9 @@
- 		interrupt-controller;
- 	};
- 
--	gpio5: gpio@ffc45000 {
-+	gpio5: gpio@e6055000 {
- 		compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
--		reg = <0 0xffc45000 0 0x2c>;
-+		reg = <0 0xe6055000 0 0x50>;
- 		interrupt-parent = <&gic>;
- 		interrupts = <0 9 0x4>;
- 		#gpio-cells = <2>;
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0071-i2c-rcar-fixup-rcar-type-naming.patch b/patches.renesas/0071-i2c-rcar-fixup-rcar-type-naming.patch
deleted file mode 100644
index 4367ea20dd758..0000000000000
--- a/patches.renesas/0071-i2c-rcar-fixup-rcar-type-naming.patch
+++ /dev/null
@@ -1,82 +0,0 @@
-From 05a24ff165f09af7687d67f21a8aa51de0814650 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Mon, 21 Oct 2013 01:04:32 -0700
-Subject: i2c: rcar: fixup rcar type naming
-
-b720423a2627f045133bec39a31fe2bc0dab86f3
-(i2c: rcar: add rcar-H2 support)
-added R-Car H2 support on i2c-rcar.
-
-The R-Car I2C type is based on SoC generation
-(Gen1 = E1/M1/H1, Gen2 = E2/M2/H2),
-but added naming was H1/H2 instead of Gen1/Gen2.
-Gen1/Gen2 is better naming on this driver.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Acked-by: Simon Horman <horms+renesas@verge.net.au>
-Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-(cherry picked from commit 043a3f113ce41e3e6fdbb49551df75e82e8c4ae7)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/i2c/busses/i2c-rcar.c | 22 +++++++++++-----------
- 1 file changed, 11 insertions(+), 11 deletions(-)
-
-diff --git a/drivers/i2c/busses/i2c-rcar.c b/drivers/i2c/busses/i2c-rcar.c
-index 37bd2371ddf5..3e86e4ad9639 100644
---- a/drivers/i2c/busses/i2c-rcar.c
-+++ b/drivers/i2c/busses/i2c-rcar.c
-@@ -103,8 +103,8 @@ enum {
- #define ID_NACK		(1 << 4)
- 
- enum rcar_i2c_type {
--	I2C_RCAR_H1,
--	I2C_RCAR_H2,
-+	I2C_RCAR_GEN1,
-+	I2C_RCAR_GEN2,
- };
- 
- struct rcar_i2c_priv {
-@@ -240,10 +240,10 @@ static int rcar_i2c_clock_calculate(struct rcar_i2c_priv *priv,
- 	}
- 
- 	switch (priv->devtype) {
--	case I2C_RCAR_H1:
-+	case I2C_RCAR_GEN1:
- 		cdf_width = 2;
- 		break;
--	case I2C_RCAR_H2:
-+	case I2C_RCAR_GEN2:
- 		cdf_width = 3;
- 		break;
- 	default:
-@@ -640,10 +640,10 @@ static const struct i2c_algorithm rcar_i2c_algo = {
- };
- 
- static const struct of_device_id rcar_i2c_dt_ids[] = {
--	{ .compatible = "renesas,i2c-rcar", .data = (void *)I2C_RCAR_H1 },
--	{ .compatible = "renesas,i2c-r8a7778", .data = (void *)I2C_RCAR_H1 },
--	{ .compatible = "renesas,i2c-r8a7779", .data = (void *)I2C_RCAR_H1 },
--	{ .compatible = "renesas,i2c-r8a7790", .data = (void *)I2C_RCAR_H2 },
-+	{ .compatible = "renesas,i2c-rcar", .data = (void *)I2C_RCAR_GEN1 },
-+	{ .compatible = "renesas,i2c-r8a7778", .data = (void *)I2C_RCAR_GEN1 },
-+	{ .compatible = "renesas,i2c-r8a7779", .data = (void *)I2C_RCAR_GEN1 },
-+	{ .compatible = "renesas,i2c-r8a7790", .data = (void *)I2C_RCAR_GEN2 },
- 	{},
- };
- MODULE_DEVICE_TABLE(of, rcar_i2c_dt_ids);
-@@ -736,9 +736,9 @@ static int rcar_i2c_remove(struct platform_device *pdev)
- }
- 
- static struct platform_device_id rcar_i2c_id_table[] = {
--	{ "i2c-rcar",		I2C_RCAR_H1 },
--	{ "i2c-rcar_h1",	I2C_RCAR_H1 },
--	{ "i2c-rcar_h2",	I2C_RCAR_H2 },
-+	{ "i2c-rcar",		I2C_RCAR_GEN1 },
-+	{ "i2c-rcar_gen1",	I2C_RCAR_GEN1 },
-+	{ "i2c-rcar_gen2",	I2C_RCAR_GEN2 },
- 	{},
- };
- MODULE_DEVICE_TABLE(platform, rcar_i2c_id_table);
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0072-ARM-shmobile-r8a7740-Prepare-for-reference-DT-setup.patch b/patches.renesas/0072-ARM-shmobile-r8a7740-Prepare-for-reference-DT-setup.patch
deleted file mode 100644
index 2c3b6f4aa06dd..0000000000000
--- a/patches.renesas/0072-ARM-shmobile-r8a7740-Prepare-for-reference-DT-setup.patch
+++ /dev/null
@@ -1,284 +0,0 @@
-From 5a5688a64c8d3c5d6b7b09b091ed49d87ea7b4d8 Mon Sep 17 00:00:00 2001
-From: Bastian Hecht <hechtb@gmail.com>
-Date: Wed, 17 Apr 2013 12:34:05 +0200
-Subject: ARM: shmobile: r8a7740: Prepare for reference DT setup
-
-We need three steps to prepare for the new Armadillo reference DT board code:
- - Split the device list into r8a7740_early_devices used by the old platform
-   data setup (board-armadillo.c) and r8a7740_devices_dt used by both
-   setup variants.
- - Introduce new r8a7740_init_delay() to be more flexible about calling
-   shmobile_setup_delay().
- - For the generic r8a7740 support, we switch to device tree setup for
-   the GIC, the irqpin devices and the I2C controllers.
-
-This is slightly similar to commit 3b00f9342623a5ebc
-"ARM: shmobile: sh73a0: Do not use early devices with DT reference"
-
-Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 744fdc8dc0e22cc5b61ee1bcde9375f188daa330)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7740.dtsi                | 117 ++++++++++++++++++++++++++
- arch/arm/mach-shmobile/include/mach/r8a7740.h |   2 +
- arch/arm/mach-shmobile/setup-r8a7740.c        |  54 ++++++------
- 3 files changed, 148 insertions(+), 25 deletions(-)
-
-diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi
-index 8a831e91..24e93064 100644
---- a/arch/arm/boot/dts/r8a7740.dtsi
-+++ b/arch/arm/boot/dts/r8a7740.dtsi
-@@ -22,4 +22,121 @@
- 			reg = <0x0>;
- 		};
- 	};
-+
-+	gic: interrupt-controller@c2800000 {
-+		compatible = "arm,cortex-a9-gic";
-+		#interrupt-cells = <3>;
-+		#address-cells = <1>;
-+		interrupt-controller;
-+		reg = <0xc2800000 0x1000>,
-+		      <0xc2000000 0x1000>;
-+	};
-+
-+	/* irqpin0: IRQ0 - IRQ7 */
-+	irqpin0: irqpin@e6900000 {
-+		compatible = "renesas,intc-irqpin";
-+		#interrupt-cells = <2>;
-+		interrupt-controller;
-+		reg = <0xe6900000 4>,
-+			<0xe6900010 4>,
-+			<0xe6900020 1>,
-+			<0xe6900040 1>,
-+			<0xe6900060 1>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 149 0x4
-+			      0 149 0x4
-+			      0 149 0x4
-+			      0 149 0x4
-+			      0 149 0x4
-+			      0 149 0x4
-+			      0 149 0x4
-+			      0 149 0x4>;
-+	};
-+
-+	/* irqpin1: IRQ8 - IRQ15 */
-+	irqpin1: irqpin@e6900004 {
-+		compatible = "renesas,intc-irqpin";
-+		#interrupt-cells = <2>;
-+		interrupt-controller;
-+		reg = <0xe6900004 4>,
-+			<0xe6900014 4>,
-+			<0xe6900024 1>,
-+			<0xe6900044 1>,
-+			<0xe6900064 1>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 149 0x4
-+			      0 149 0x4
-+			      0 149 0x4
-+			      0 149 0x4
-+			      0 149 0x4
-+			      0 149 0x4
-+			      0 149 0x4
-+			      0 149 0x4>;
-+	};
-+
-+	/* irqpin2: IRQ16 - IRQ23 */
-+	irqpin2: irqpin@e6900008 {
-+		compatible = "renesas,intc-irqpin";
-+		#interrupt-cells = <2>;
-+		interrupt-controller;
-+		reg = <0xe6900008 4>,
-+			<0xe6900018 4>,
-+			<0xe6900028 1>,
-+			<0xe6900048 1>,
-+			<0xe6900068 1>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 149 0x4
-+			      0 149 0x4
-+			      0 149 0x4
-+			      0 149 0x4
-+			      0 149 0x4
-+			      0 149 0x4
-+			      0 149 0x4
-+			      0 149 0x4>;
-+	};
-+
-+	/* irqpin3: IRQ24 - IRQ31 */
-+	irqpin3: irqpin@e690000c {
-+		compatible = "renesas,intc-irqpin";
-+		#interrupt-cells = <2>;
-+		interrupt-controller;
-+		reg = <0xe690000c 4>,
-+			<0xe690001c 4>,
-+			<0xe690002c 1>,
-+			<0xe690004c 1>,
-+			<0xe690006c 1>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 149 0x4
-+			      0 149 0x4
-+			      0 149 0x4
-+			      0 149 0x4
-+			      0 149 0x4
-+			      0 149 0x4
-+			      0 149 0x4
-+			      0 149 0x4>;
-+	};
-+
-+	i2c0: i2c@fff20000 {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		compatible = "renesas,rmobile-iic";
-+		reg = <0xfff20000 0x425>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 201 0x4
-+			      0 202 0x4
-+			      0 203 0x4
-+			      0 204 0x4>;
-+	};
-+
-+	i2c1: i2c@e6c20000 {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		compatible = "renesas,rmobile-iic";
-+		reg = <0xe6c20000 0x425>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 70 0x4
-+			      0 71 0x4
-+			      0 72 0x4
-+			      0 73 0x4>;
-+	};
- };
-diff --git a/arch/arm/mach-shmobile/include/mach/r8a7740.h b/arch/arm/mach-shmobile/include/mach/r8a7740.h
-index 19c04231..1cf6869b 100644
---- a/arch/arm/mach-shmobile/include/mach/r8a7740.h
-+++ b/arch/arm/mach-shmobile/include/mach/r8a7740.h
-@@ -533,11 +533,13 @@ enum {
- };
- 
- extern void r8a7740_meram_workaround(void);
-+extern void r8a7740_init_delay(void);
- extern void r8a7740_init_irq(void);
- extern void r8a7740_init_irq_of(void);
- extern void r8a7740_map_io(void);
- extern void r8a7740_add_early_devices(void);
- extern void r8a7740_add_standard_devices(void);
-+extern void r8a7740_add_standard_devices_dt(void);
- extern void r8a7740_clock_init(u8 md_ck);
- extern void r8a7740_pinmux_init(void);
- extern void r8a7740_pm_init(void);
-diff --git a/arch/arm/mach-shmobile/setup-r8a7740.c b/arch/arm/mach-shmobile/setup-r8a7740.c
-index 326a4ab0..9284e6fd 100644
---- a/arch/arm/mach-shmobile/setup-r8a7740.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7740.c
-@@ -531,11 +531,7 @@ static struct platform_device ipmmu_device = {
- 	.num_resources  = ARRAY_SIZE(ipmmu_resources),
- };
- 
--static struct platform_device *r8a7740_early_devices[] __initdata = {
--	&irqpin0_device,
--	&irqpin1_device,
--	&irqpin2_device,
--	&irqpin3_device,
-+static struct platform_device *r8a7740_devices_dt[] __initdata = {
- 	&scif0_device,
- 	&scif1_device,
- 	&scif2_device,
-@@ -546,6 +542,13 @@ static struct platform_device *r8a7740_early_devices[] __initdata = {
- 	&scif7_device,
- 	&scifb_device,
- 	&cmt10_device,
-+};
-+
-+static struct platform_device *r8a7740_early_devices[] __initdata = {
-+	&irqpin0_device,
-+	&irqpin1_device,
-+	&irqpin2_device,
-+	&irqpin3_device,
- 	&tmu00_device,
- 	&tmu01_device,
- 	&tmu02_device,
-@@ -965,6 +968,8 @@ void __init r8a7740_add_standard_devices(void)
- 	/* add devices */
- 	platform_add_devices(r8a7740_early_devices,
- 			    ARRAY_SIZE(r8a7740_early_devices));
-+	platform_add_devices(r8a7740_devices_dt,
-+			    ARRAY_SIZE(r8a7740_devices_dt));
- 	platform_add_devices(r8a7740_late_devices,
- 			     ARRAY_SIZE(r8a7740_late_devices));
- 
-@@ -986,6 +991,8 @@ void __init r8a7740_add_early_devices(void)
- {
- 	early_platform_add_devices(r8a7740_early_devices,
- 				   ARRAY_SIZE(r8a7740_early_devices));
-+	early_platform_add_devices(r8a7740_devices_dt,
-+				   ARRAY_SIZE(r8a7740_devices_dt));
- 
- 	/* setup early console here as well */
- 	shmobile_setup_console();
-@@ -993,33 +1000,29 @@ void __init r8a7740_add_early_devices(void)
- 
- #ifdef CONFIG_USE_OF
- 
--void __init r8a7740_add_early_devices_dt(void)
--{
--	shmobile_setup_delay(800, 1, 3); /* Cortex-A9 @ 800MHz */
--
--	early_platform_add_devices(r8a7740_early_devices,
--				   ARRAY_SIZE(r8a7740_early_devices));
--
--	/* setup early console here as well */
--	shmobile_setup_console();
--}
--
- static const struct of_dev_auxdata r8a7740_auxdata_lookup[] __initconst = {
- 	{ }
- };
- 
- void __init r8a7740_add_standard_devices_dt(void)
- {
--	/* clocks are setup late during boot in the case of DT */
--	r8a7740_clock_init(0);
--
--	platform_add_devices(r8a7740_early_devices,
--			    ARRAY_SIZE(r8a7740_early_devices));
--
-+	platform_add_devices(r8a7740_devices_dt,
-+			    ARRAY_SIZE(r8a7740_devices_dt));
- 	of_platform_populate(NULL, of_default_bus_match_table,
- 			     r8a7740_auxdata_lookup, NULL);
- }
- 
-+void __init r8a7740_init_delay(void)
-+{
-+	shmobile_setup_delay(800, 1, 3); /* Cortex-A9 @ 800MHz */
-+};
-+
-+static void __init r8a7740_generic_init(void)
-+{
-+	r8a7740_clock_init(0);
-+	r8a7740_add_standard_devices_dt();
-+}
-+
- static const char *r8a7740_boards_compat_dt[] __initdata = {
- 	"renesas,r8a7740",
- 	NULL,
-@@ -1027,9 +1030,10 @@ static const char *r8a7740_boards_compat_dt[] __initdata = {
- 
- DT_MACHINE_START(R8A7740_DT, "Generic R8A7740 (Flattened Device Tree)")
- 	.map_io		= r8a7740_map_io,
--	.init_early	= r8a7740_add_early_devices_dt,
--	.init_irq	= r8a7740_init_irq,
--	.init_machine	= r8a7740_add_standard_devices_dt,
-+	.init_early	= r8a7740_init_delay,
-+	.init_irq	= r8a7740_init_irq_of,
-+	.init_machine	= r8a7740_generic_init,
-+	.init_time	= shmobile_timer_init,
- 	.dt_compat	= r8a7740_boards_compat_dt,
- MACHINE_END
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0072-ARM-shmobile-r8a7778-add-I2C-clock-for-DT.patch b/patches.renesas/0072-ARM-shmobile-r8a7778-add-I2C-clock-for-DT.patch
deleted file mode 100644
index 88273064a86b8..0000000000000
--- a/patches.renesas/0072-ARM-shmobile-r8a7778-add-I2C-clock-for-DT.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From ba6783c52b27541b7d2e07cb4faef11276919643 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Thu, 3 Oct 2013 23:43:54 -0700
-Subject: ARM: shmobile: r8a7778: add I2C clock for DT
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 10ef80fa225935ddf44371913c737a387956479a)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r8a7778.c | 4 ++++
- 1 file changed, 4 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a7778.c b/arch/arm/mach-shmobile/clock-r8a7778.c
-index fb6af83858e3..a77089fb0707 100644
---- a/arch/arm/mach-shmobile/clock-r8a7778.c
-+++ b/arch/arm/mach-shmobile/clock-r8a7778.c
-@@ -183,9 +183,13 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_DEV_ID("ohci-platform", &mstp_clks[MSTP100]), /* USB OHCI port0/1 */
- 	CLKDEV_DEV_ID("renesas_usbhs", &mstp_clks[MSTP100]), /* USB FUNC */
- 	CLKDEV_DEV_ID("i2c-rcar.0", &mstp_clks[MSTP030]), /* I2C0 */
-+	CLKDEV_DEV_ID("ffc70000.i2c", &mstp_clks[MSTP030]), /* I2C0 */
- 	CLKDEV_DEV_ID("i2c-rcar.1", &mstp_clks[MSTP029]), /* I2C1 */
-+	CLKDEV_DEV_ID("ffc71000.i2c", &mstp_clks[MSTP029]), /* I2C1 */
- 	CLKDEV_DEV_ID("i2c-rcar.2", &mstp_clks[MSTP028]), /* I2C2 */
-+	CLKDEV_DEV_ID("ffc72000.i2c", &mstp_clks[MSTP028]), /* I2C2 */
- 	CLKDEV_DEV_ID("i2c-rcar.3", &mstp_clks[MSTP027]), /* I2C3 */
-+	CLKDEV_DEV_ID("ffc73000.i2c", &mstp_clks[MSTP027]), /* I2C3 */
- 	CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP026]), /* SCIF0 */
- 	CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP025]), /* SCIF1 */
- 	CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP024]), /* SCIF2 */
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0072-media-sh_mobile_ceu_camera-remove-deprecated-IRQF_DI.patch b/patches.renesas/0072-media-sh_mobile_ceu_camera-remove-deprecated-IRQF_DI.patch
deleted file mode 100644
index 48b112e7edbf7..0000000000000
--- a/patches.renesas/0072-media-sh_mobile_ceu_camera-remove-deprecated-IRQF_DI.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From 4cfedc8dc9a067c2a08497f0c91b9aa4864a98bc Mon Sep 17 00:00:00 2001
-From: Michael Opdenacker <michael.opdenacker@free-electrons.com>
-Date: Sun, 13 Oct 2013 03:01:46 -0300
-Subject: [media] sh_mobile_ceu_camera: remove deprecated IRQF_DISABLED
-
-This patch proposes to remove the use of the IRQF_DISABLED flag
-It's a NOOP since 2.6.35 and it will be removed one day.
-
-Signed-off-by: Michael Opdenacker <michael.opdenacker@free-electrons.com>
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
-(cherry picked from commit c656ead48fa5ab4af973f8135400b1695184ef31)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/media/platform/soc_camera/sh_mobile_ceu_camera.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/media/platform/soc_camera/sh_mobile_ceu_camera.c b/drivers/media/platform/soc_camera/sh_mobile_ceu_camera.c
-index dc5ce6c1b791..55f80bf0e3c8 100644
---- a/drivers/media/platform/soc_camera/sh_mobile_ceu_camera.c
-+++ b/drivers/media/platform/soc_camera/sh_mobile_ceu_camera.c
-@@ -1791,7 +1791,7 @@ static int sh_mobile_ceu_probe(struct platform_device *pdev)
- 
- 	/* request irq */
- 	err = devm_request_irq(&pdev->dev, pcdev->irq, sh_mobile_ceu_irq,
--			       IRQF_DISABLED, dev_name(&pdev->dev), pcdev);
-+			       0, dev_name(&pdev->dev), pcdev);
- 	if (err) {
- 		dev_err(&pdev->dev, "Unable to register CEU interrupt.\n");
- 		goto exit_release_mem;
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0073-ARM-shmobile-Remove-unused-r8a73a4-GIC-CPU-interface.patch b/patches.renesas/0073-ARM-shmobile-Remove-unused-r8a73a4-GIC-CPU-interface.patch
deleted file mode 100644
index b50061e68932f..0000000000000
--- a/patches.renesas/0073-ARM-shmobile-Remove-unused-r8a73a4-GIC-CPU-interface.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From 35e37e69cb29876008ffc0c677ad56ea6938c006 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Thu, 16 May 2013 15:03:55 +0900
-Subject: ARM: shmobile: Remove unused r8a73a4 GIC CPU interface DT bits
-
-Remove unused GIC CPU interface DT bits for r8a73a4.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 572db906e0a523fe9cdb74c1e9e518ea99a2f7f2)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a73a4.dtsi | 6 ------
- 1 file changed, 6 deletions(-)
-
-diff --git a/arch/arm/boot/dts/r8a73a4.dtsi b/arch/arm/boot/dts/r8a73a4.dtsi
-index fde2a337..4ff2019c 100644
---- a/arch/arm/boot/dts/r8a73a4.dtsi
-+++ b/arch/arm/boot/dts/r8a73a4.dtsi
-@@ -37,12 +37,6 @@
- 			<0 0xf1004000 0 0x2000>,
- 			<0 0xf1006000 0 0x2000>;
- 		interrupts = <1 9 0xf04>;
--
--		gic-cpuif@4 {
--			compatible = "arm,gic-cpuif";
--			cpuif-id = <4>;
--			cpu = <&cpu0>;
--		};
- 	};
- 
- 	timer {
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0073-ARM-shmobile-r8a7779-add-I2C-clock-for-DT.patch b/patches.renesas/0073-ARM-shmobile-r8a7779-add-I2C-clock-for-DT.patch
deleted file mode 100644
index e696629ab70a4..0000000000000
--- a/patches.renesas/0073-ARM-shmobile-r8a7779-add-I2C-clock-for-DT.patch
+++ /dev/null
@@ -1,40 +0,0 @@
-From ea9fcab2ab2628df8b2c4b3bfc9799ca81cee652 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Thu, 3 Oct 2013 23:45:03 -0700
-Subject: ARM: shmobile: r8a7779: add I2C clock for DT
-
-10e8d4f6dddb0f9dc408c2f2bde8399b243a42ca
-(ARM: mach-shmobile: r8a7779: Minimal setup using DT)
-added I2C driver for DT, but it didn't add clock.
-This patch adds missing clock for I2C
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit b918b68123718f262abcac6509dc8c05ee47e851)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r8a7779.c | 4 ++++
- 1 file changed, 4 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a7779.c b/arch/arm/mach-shmobile/clock-r8a7779.c
-index 1f7080fab0a5..badb8b7142fb 100644
---- a/arch/arm/mach-shmobile/clock-r8a7779.c
-+++ b/arch/arm/mach-shmobile/clock-r8a7779.c
-@@ -184,9 +184,13 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP016]), /* TMU01 */
- 	CLKDEV_DEV_ID("sh_tmu.2", &mstp_clks[MSTP016]), /* TMU02 */
- 	CLKDEV_DEV_ID("i2c-rcar.0", &mstp_clks[MSTP030]), /* I2C0 */
-+	CLKDEV_DEV_ID("ffc70000.i2c", &mstp_clks[MSTP030]), /* I2C0 */
- 	CLKDEV_DEV_ID("i2c-rcar.1", &mstp_clks[MSTP029]), /* I2C1 */
-+	CLKDEV_DEV_ID("ffc71000.i2c", &mstp_clks[MSTP029]), /* I2C1 */
- 	CLKDEV_DEV_ID("i2c-rcar.2", &mstp_clks[MSTP028]), /* I2C2 */
-+	CLKDEV_DEV_ID("ffc72000.i2c", &mstp_clks[MSTP028]), /* I2C2 */
- 	CLKDEV_DEV_ID("i2c-rcar.3", &mstp_clks[MSTP027]), /* I2C3 */
-+	CLKDEV_DEV_ID("ffc73000.i2c", &mstp_clks[MSTP027]), /* I2C3 */
- 	CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP026]), /* SCIF0 */
- 	CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP025]), /* SCIF1 */
- 	CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP024]), /* SCIF2 */
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0073-media-media-rcar_vin-Add-preliminary-r8a7790-support.patch b/patches.renesas/0073-media-media-rcar_vin-Add-preliminary-r8a7790-support.patch
deleted file mode 100644
index c172196892e09..0000000000000
--- a/patches.renesas/0073-media-media-rcar_vin-Add-preliminary-r8a7790-support.patch
+++ /dev/null
@@ -1,47 +0,0 @@
-From 5ab3ae37de6d787b200f04931c054b998d578a1d Mon Sep 17 00:00:00 2001
-From: Valentine Barshak <valentine.barshak@cogentembedded.com>
-Date: Fri, 4 Oct 2013 11:20:52 -0300
-Subject: [media] media: rcar_vin: Add preliminary r8a7790 support
-
-Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
-(cherry picked from commit ca0c9f17f3737f4857ec0406a75b26b84b2e8c16)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/media/platform/soc_camera/rcar_vin.c | 5 ++++-
- 1 file changed, 4 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/media/platform/soc_camera/rcar_vin.c b/drivers/media/platform/soc_camera/rcar_vin.c
-index d02a7e0b773f..b21f777f55e7 100644
---- a/drivers/media/platform/soc_camera/rcar_vin.c
-+++ b/drivers/media/platform/soc_camera/rcar_vin.c
-@@ -105,6 +105,7 @@
- #define VIN_MAX_HEIGHT		2048
- 
- enum chip_id {
-+	RCAR_H2,
- 	RCAR_H1,
- 	RCAR_M1,
- 	RCAR_E1,
-@@ -300,7 +301,8 @@ static int rcar_vin_setup(struct rcar_vin_priv *priv)
- 		dmr = 0;
- 		break;
- 	case V4L2_PIX_FMT_RGB32:
--		if (priv->chip == RCAR_H1 || priv->chip == RCAR_E1) {
-+		if (priv->chip == RCAR_H2 || priv->chip == RCAR_H1 ||
-+		    priv->chip == RCAR_E1) {
- 			dmr = VNDMR_EXRGB;
- 			break;
- 		}
-@@ -1381,6 +1383,7 @@ static struct soc_camera_host_ops rcar_vin_host_ops = {
- };
- 
- static struct platform_device_id rcar_vin_id_table[] = {
-+	{ "r8a7790-vin",  RCAR_H2 },
- 	{ "r8a7779-vin",  RCAR_H1 },
- 	{ "r8a7778-vin",  RCAR_M1 },
- 	{ "uPD35004-vin", RCAR_E1 },
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0074-ARM-shmobile-Remove-unused-r8a7790-GIC-CPU-interface.patch b/patches.renesas/0074-ARM-shmobile-Remove-unused-r8a7790-GIC-CPU-interface.patch
deleted file mode 100644
index 36ce7c6b5b554..0000000000000
--- a/patches.renesas/0074-ARM-shmobile-Remove-unused-r8a7790-GIC-CPU-interface.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From 87a705a55800d3cbd6db764ca204cffe0f9af6a3 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Thu, 16 May 2013 15:05:16 +0900
-Subject: ARM: shmobile: Remove unused r8a7790 GIC CPU interface DT bits
-
-Remove unused GIC CPU interface DT bits for r8a7790.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 47016c7186faf7e0deae52d52ac6943df0e65154)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7790.dtsi | 6 ------
- 1 file changed, 6 deletions(-)
-
-diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
-index 7a171102..339d9b11 100644
---- a/arch/arm/boot/dts/r8a7790.dtsi
-+++ b/arch/arm/boot/dts/r8a7790.dtsi
-@@ -36,12 +36,6 @@
- 			<0 0xf1004000 0 0x2000>,
- 			<0 0xf1006000 0 0x2000>;
- 		interrupts = <1 9 0xf04>;
--
--		gic-cpuif@4 {
--			compatible = "arm,gic-cpuif";
--			cpuif-id = <4>;
--			cpu = <&cpu0>;
--		};
- 	};
- 
- 	timer {
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0074-ARM-shmobile-Select-IRQC-in-case-of-the-r8a7791-SoC.patch b/patches.renesas/0074-ARM-shmobile-Select-IRQC-in-case-of-the-r8a7791-SoC.patch
deleted file mode 100644
index f9337ce6ddd5a..0000000000000
--- a/patches.renesas/0074-ARM-shmobile-Select-IRQC-in-case-of-the-r8a7791-SoC.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From 1565279d65bbd12cff4c2c3b6e357fee5a8a7ea2 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Tue, 8 Oct 2013 12:16:08 +0900
-Subject: ARM: shmobile: Select IRQC in case of the r8a7791 SoC
-
-The r8a7791 contains IRQC hardware so make sure
-the driver gets built by selecting RENESAS_IRQC.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit e08d287afb76b3b6925f7261918fa611a7e0b3ca)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/Kconfig | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
-index a4a4b75109b2..ff7c4ce8a99f 100644
---- a/arch/arm/mach-shmobile/Kconfig
-+++ b/arch/arm/mach-shmobile/Kconfig
-@@ -100,6 +100,7 @@ config ARCH_R8A7791
- 	select ARM_GIC
- 	select CPU_V7
- 	select SH_CLK_CPG
-+	select RENESAS_IRQC
- 
- config ARCH_EMEV2
- 	bool "Emma Mobile EV2"
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0074-media-platform-drivers-Fix-build-on-frv-arch.patch b/patches.renesas/0074-media-platform-drivers-Fix-build-on-frv-arch.patch
deleted file mode 100644
index 0f438d56770c4..0000000000000
--- a/patches.renesas/0074-media-platform-drivers-Fix-build-on-frv-arch.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From 2e28b7147baf1454779e3b63a1389e5d98a441b3 Mon Sep 17 00:00:00 2001
-From: Mauro Carvalho Chehab <m.chehab@samsung.com>
-Date: Fri, 1 Nov 2013 13:59:04 -0300
-Subject: [media] platform drivers: Fix build on frv arch
-
-On frv, the following errors happen:
-	drivers/media/platform/soc_camera/rcar_vin.c: In function 'rcar_vin_setup':
-	drivers/media/platform/soc_camera/rcar_vin.c:284:3: error: implicit declaration of function 'iowrite32' [-Werror=implicit-function-declaration]
-	drivers/media/platform/soc_camera/rcar_vin.c: In function 'rcar_vin_request_capture_stop':
-	drivers/media/platform/soc_camera/rcar_vin.c:353:2: error: implicit declaration of function 'ioread32' [-Werror=implicit-function-declaration]
-This is because this driver forgot to include linux/io.h.
-
-Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
-Reviewed-by: Hans Verkuil <hans.verkuil@cisco.com>
-Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
-(cherry picked from commit 3cdcf7369cdb3406c61090e453b78cb8d4882ef8)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/media/platform/soc_camera/rcar_vin.c | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/drivers/media/platform/soc_camera/rcar_vin.c b/drivers/media/platform/soc_camera/rcar_vin.c
-index b21f777f55e7..6866bb4fbebc 100644
---- a/drivers/media/platform/soc_camera/rcar_vin.c
-+++ b/drivers/media/platform/soc_camera/rcar_vin.c
-@@ -16,6 +16,7 @@
- 
- #include <linux/delay.h>
- #include <linux/interrupt.h>
-+#include <linux/io.h>
- #include <linux/kernel.h>
- #include <linux/module.h>
- #include <linux/platform_data/camera-rcar.h>
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0075-ARM-shmobile-armadillo800eva-Reference-DT-implementa.patch b/patches.renesas/0075-ARM-shmobile-armadillo800eva-Reference-DT-implementa.patch
deleted file mode 100644
index 2f975fb4423d7..0000000000000
--- a/patches.renesas/0075-ARM-shmobile-armadillo800eva-Reference-DT-implementa.patch
+++ /dev/null
@@ -1,352 +0,0 @@
-From 0663fefc701a07b0b066a5b5ad492d30253a6bd3 Mon Sep 17 00:00:00 2001
-From: Bastian Hecht <hechtb@gmail.com>
-Date: Wed, 17 Apr 2013 12:34:06 +0200
-Subject: ARM: shmobile: armadillo800eva: Reference DT implementation
-
-Provide alternate board code for the Armadillo800EVA to demonstrate how
-DT may be used given the current state of driver device tree support.
-This is intended to act as a reference for mach-shmobile developers.
-
-This a rather bare bone version with the following devices supported:
-
- - GIC
- - irqpins
- - i2c0/1
- - touchscreen
-
-Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 76b92b4043f2303b443645b5609a8867e8a8b5d7)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/Makefile                         |   1 +
- .../boot/dts/r8a7740-armadillo800eva-reference.dts |  45 +++++
- arch/arm/mach-shmobile/Kconfig                     |  14 ++
- arch/arm/mach-shmobile/Makefile                    |   1 +
- .../board-armadillo800eva-reference.c              | 213 +++++++++++++++++++++
- 5 files changed, 274 insertions(+)
- create mode 100644 arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
- create mode 100644 arch/arm/mach-shmobile/board-armadillo800eva-reference.c
-
-diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
-index f0895c58..389725e5 100644
---- a/arch/arm/boot/dts/Makefile
-+++ b/arch/arm/boot/dts/Makefile
-@@ -162,6 +162,7 @@ dtb-$(CONFIG_ARCH_U8500) += snowball.dtb \
- dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \
- 	r8a7740-armadillo800eva.dtb \
- 	r8a7778-bockw.dtb \
-+	r8a7740-armadillo800eva-reference.dtb \
- 	r8a7779-marzen-reference.dtb \
- 	r8a7790-lager.dtb \
- 	sh73a0-kzm9g.dtb \
-diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
-new file mode 100644
-index 00000000..09ea22c2
---- /dev/null
-+++ b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
-@@ -0,0 +1,45 @@
-+/*
-+ * Reference Device Tree Source for the armadillo 800 eva board
-+ *
-+ * Copyright (C) 2012 Renesas Solutions Corp.
-+ *
-+ * This file is licensed under the terms of the GNU General Public License
-+ * version 2.  This program is licensed "as is" without any warranty of any
-+ * kind, whether express or implied.
-+ */
-+
-+/dts-v1/;
-+/include/ "r8a7740.dtsi"
-+
-+/ {
-+	model = "armadillo 800 eva reference";
-+	compatible = "renesas,armadillo800eva-reference", "renesas,r8a7740";
-+
-+	chosen {
-+		bootargs = "console=tty0 console=ttySC1,115200 earlyprintk=sh-sci.1,115200 ignore_loglevel root=/dev/nfs ip=dhcp nfsroot=,rsize=4096,wsize=4096 rw";
-+	};
-+
-+	memory {
-+		device_type = "memory";
-+		reg = <0x40000000 0x20000000>;
-+	};
-+
-+	reg_3p3v: regulator@0 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "fixed-3.3V";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+		regulator-always-on;
-+		regulator-boot-on;
-+	};
-+
-+};
-+
-+&i2c0 {
-+	touchscreen: st1232@55 {
-+		compatible = "sitronix,st1232";
-+		reg = <0x55>;
-+		interrupt-parent = <&irqpin1>;
-+		interrupts = <2 0>; /* IRQ10: hwirq 2 on irqpin1 */
-+	};
-+};
-diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
-index 1a517e2f..c6fb9ec8 100644
---- a/arch/arm/mach-shmobile/Kconfig
-+++ b/arch/arm/mach-shmobile/Kconfig
-@@ -129,6 +129,20 @@ config MACH_ARMADILLO800EVA
- 	select SND_SOC_WM8978 if SND_SIMPLE_CARD
- 	select USE_OF
- 
-+config MACH_ARMADILLO800EVA_REFERENCE
-+	bool "Armadillo-800 EVA board - Reference Device Tree Implementation"
-+	depends on ARCH_R8A7740
-+	select ARCH_REQUIRE_GPIOLIB
-+	select REGULATOR_FIXED_VOLTAGE if REGULATOR
-+	select SND_SOC_WM8978 if SND_SIMPLE_CARD
-+	select USE_OF
-+	---help---
-+	   Use reference implementation of Aramdillo800 EVA board support
-+	   which makes a greater use of device tree at the expense
-+	   of not supporting a number of devices.
-+
-+	   This is intended to aid developers
-+
- config MACH_BOCKW
- 	bool "BOCK-W platform"
- 	depends on ARCH_R8A7778
-diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
-index 068f1dad..812de045 100644
---- a/arch/arm/mach-shmobile/Makefile
-+++ b/arch/arm/mach-shmobile/Makefile
-@@ -46,6 +46,7 @@ obj-$(CONFIG_MACH_MARZEN)	+= board-marzen.o
- obj-$(CONFIG_MACH_MARZEN_REFERENCE)	+= board-marzen-reference.o
- obj-$(CONFIG_MACH_LAGER)	+= board-lager.o
- obj-$(CONFIG_MACH_ARMADILLO800EVA)	+= board-armadillo800eva.o
-+obj-$(CONFIG_MACH_ARMADILLO800EVA_REFERENCE)	+= board-armadillo800eva-reference.o
- obj-$(CONFIG_MACH_KZM9D)	+= board-kzm9d.o
- obj-$(CONFIG_MACH_KZM9G)	+= board-kzm9g.o
- obj-$(CONFIG_MACH_KZM9G_REFERENCE)	+= board-kzm9g-reference.o
-diff --git a/arch/arm/mach-shmobile/board-armadillo800eva-reference.c b/arch/arm/mach-shmobile/board-armadillo800eva-reference.c
-new file mode 100644
-index 00000000..03b85fec
---- /dev/null
-+++ b/arch/arm/mach-shmobile/board-armadillo800eva-reference.c
-@@ -0,0 +1,213 @@
-+/*
-+ * armadillo 800 eva board support
-+ *
-+ * Copyright (C) 2012 Renesas Solutions Corp.
-+ * Copyright (C) 2012 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; version 2 of the License.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
-+ *
-+ */
-+
-+#include <linux/clk.h>
-+#include <linux/err.h>
-+#include <linux/kernel.h>
-+#include <linux/gpio.h>
-+#include <linux/io.h>
-+#include <linux/pinctrl/machine.h>
-+#include <mach/common.h>
-+#include <mach/r8a7740.h>
-+#include <asm/mach/arch.h>
-+#include <asm/hardware/cache-l2x0.h>
-+
-+/*
-+ * CON1		Camera Module
-+ * CON2		Extension Bus
-+ * CON3		HDMI Output
-+ * CON4		Composite Video Output
-+ * CON5		H-UDI JTAG
-+ * CON6		ARM JTAG
-+ * CON7		SD1
-+ * CON8		SD2
-+ * CON9		RTC BackUp
-+ * CON10	Monaural Mic Input
-+ * CON11	Stereo Headphone Output
-+ * CON12	Audio Line Output(L)
-+ * CON13	Audio Line Output(R)
-+ * CON14	AWL13 Module
-+ * CON15	Extension
-+ * CON16	LCD1
-+ * CON17	LCD2
-+ * CON19	Power Input
-+ * CON20	USB1
-+ * CON21	USB2
-+ * CON22	Serial
-+ * CON23	LAN
-+ * CON24	USB3
-+ * LED1		Camera LED(Yellow)
-+ * LED2		Power LED (Green)
-+ * ED3-LED6	User LED(Yellow)
-+ * LED7		LAN link LED(Green)
-+ * LED8		LAN activity LED(Yellow)
-+ */
-+
-+/*
-+ * DipSwitch
-+ *
-+ *                    SW1
-+ *
-+ * -12345678-+---------------+----------------------------
-+ *  1        | boot          | hermit
-+ *  0        | boot          | OS auto boot
-+ * -12345678-+---------------+----------------------------
-+ *   00      | boot device   | eMMC
-+ *   10      | boot device   | SDHI0 (CON7)
-+ *   01      | boot device   | -
-+ *   11      | boot device   | Extension Buss (CS0)
-+ * -12345678-+---------------+----------------------------
-+ *     0     | Extension Bus | D8-D15 disable, eMMC enable
-+ *     1     | Extension Bus | D8-D15 enable,  eMMC disable
-+ * -12345678-+---------------+----------------------------
-+ *      0    | SDHI1         | COM8 disable, COM14 enable
-+ *      1    | SDHI1         | COM8 enable,  COM14 disable
-+ * -12345678-+---------------+----------------------------
-+ *       0   | USB0          | COM20 enable,  COM24 disable
-+ *       1   | USB0          | COM20 disable, COM24 enable
-+ * -12345678-+---------------+----------------------------
-+ *        00 | JTAG          | SH-X2
-+ *        10 | JTAG          | ARM
-+ *        01 | JTAG          | -
-+ *        11 | JTAG          | Boundary Scan
-+ *-----------+---------------+----------------------------
-+ */
-+
-+/*
-+ * FSI-WM8978
-+ *
-+ * this command is required when playback.
-+ *
-+ * # amixer set "Headphone" 50
-+ *
-+ * this command is required when capture.
-+ *
-+ * # amixer set "Input PGA" 15
-+ * # amixer set "Left Input Mixer MicP" on
-+ * # amixer set "Left Input Mixer MicN" on
-+ * # amixer set "Right Input Mixer MicN" on
-+ * # amixer set "Right Input Mixer MicP" on
-+ */
-+
-+/*
-+ * USB function
-+ *
-+ * When you use USB Function,
-+ * set SW1.6 ON, and connect cable to CN24.
-+ *
-+ * USBF needs workaround on R8A7740 chip.
-+ * These are a little bit complex.
-+ * see
-+ *	usbhsf_power_ctrl()
-+ */
-+
-+static const struct pinctrl_map eva_pinctrl_map[] = {
-+	/* SCIFA1 */
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.1", "pfc-r8a7740",
-+				  "scifa1_data", "scifa1"),
-+};
-+
-+static void __init eva_clock_init(void)
-+{
-+	struct clk *system	= clk_get(NULL, "system_clk");
-+	struct clk *xtal1	= clk_get(NULL, "extal1");
-+	struct clk *usb24s	= clk_get(NULL, "usb24s");
-+	struct clk *fsibck	= clk_get(NULL, "fsibck");
-+
-+	if (IS_ERR(system)	||
-+	    IS_ERR(xtal1)	||
-+	    IS_ERR(usb24s)	||
-+	    IS_ERR(fsibck)) {
-+		pr_err("armadillo800eva board clock init failed\n");
-+		goto clock_error;
-+	}
-+
-+	/* armadillo 800 eva extal1 is 24MHz */
-+	clk_set_rate(xtal1, 24000000);
-+
-+	/* usb24s use extal1 (= system) clock (= 24MHz) */
-+	clk_set_parent(usb24s, system);
-+
-+	/* FSIBCK is 12.288MHz, and it is parent of FSI-B */
-+	clk_set_rate(fsibck, 12288000);
-+
-+clock_error:
-+	if (!IS_ERR(system))
-+		clk_put(system);
-+	if (!IS_ERR(xtal1))
-+		clk_put(xtal1);
-+	if (!IS_ERR(usb24s))
-+		clk_put(usb24s);
-+	if (!IS_ERR(fsibck))
-+		clk_put(fsibck);
-+}
-+
-+/*
-+ * board init
-+ */
-+static void __init eva_init(void)
-+{
-+
-+	r8a7740_clock_init(MD_CK0 | MD_CK2);
-+	eva_clock_init();
-+
-+	pinctrl_register_mappings(eva_pinctrl_map, ARRAY_SIZE(eva_pinctrl_map));
-+	r8a7740_pinmux_init();
-+
-+	r8a7740_meram_workaround();
-+
-+	/*
-+	 * Touchscreen
-+	 * TODO: Move reset GPIO over to .dts when we can reference it
-+	 */
-+	gpio_request_one(166, GPIOF_OUT_INIT_HIGH, NULL); /* TP_RST_B */
-+
-+#ifdef CONFIG_CACHE_L2X0
-+	/* Early BRESP enable, Shared attribute override enable, 32K*8way */
-+	l2x0_init(IOMEM(0xf0002000), 0x40440000, 0x82000fff);
-+#endif
-+
-+	r8a7740_add_standard_devices_dt();
-+	r8a7740_pm_init();
-+}
-+
-+#define RESCNT2 IOMEM(0xe6188020)
-+static void eva_restart(char mode, const char *cmd)
-+{
-+	/* Do soft power on reset */
-+	writel((1 << 31), RESCNT2);
-+}
-+
-+static const char *eva_boards_compat_dt[] __initdata = {
-+	"renesas,armadillo800eva-reference",
-+	NULL,
-+};
-+
-+DT_MACHINE_START(ARMADILLO800EVA_DT, "armadillo800eva-reference")
-+	.map_io		= r8a7740_map_io,
-+	.init_early	= r8a7740_init_delay,
-+	.init_irq	= r8a7740_init_irq_of,
-+	.init_machine	= eva_init,
-+	.init_time	= shmobile_timer_init,
-+	.init_late	= shmobile_init_late,
-+	.dt_compat	= eva_boards_compat_dt,
-+	.restart	= eva_restart,
-+MACHINE_END
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0075-ARM-shmobile-r8a7791-PFC-platform-device-support.patch b/patches.renesas/0075-ARM-shmobile-r8a7791-PFC-platform-device-support.patch
deleted file mode 100644
index 971f64072edd7..0000000000000
--- a/patches.renesas/0075-ARM-shmobile-r8a7791-PFC-platform-device-support.patch
+++ /dev/null
@@ -1,56 +0,0 @@
-From 090714c4c280d32eea7040a979fc8d659e8d3861 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Tue, 8 Oct 2013 12:39:10 +0900
-Subject: ARM: shmobile: r8a7791 PFC platform device support
-
-Add a platform device for the r8a7791 PFC device.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 35040127be095487ce1e2f6a487a65b92d794b7f)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/include/mach/r8a7791.h |  1 +
- arch/arm/mach-shmobile/setup-r8a7791.c        | 13 +++++++++++++
- 2 files changed, 14 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/include/mach/r8a7791.h b/arch/arm/mach-shmobile/include/mach/r8a7791.h
-index 051ead3c286e..200fa699f730 100644
---- a/arch/arm/mach-shmobile/include/mach/r8a7791.h
-+++ b/arch/arm/mach-shmobile/include/mach/r8a7791.h
-@@ -4,6 +4,7 @@
- void r8a7791_add_standard_devices(void);
- void r8a7791_add_dt_devices(void);
- void r8a7791_clock_init(void);
-+void r8a7791_pinmux_init(void);
- void r8a7791_init_early(void);
- extern struct smp_operations r8a7791_smp_ops;
- 
-diff --git a/arch/arm/mach-shmobile/setup-r8a7791.c b/arch/arm/mach-shmobile/setup-r8a7791.c
-index d9393d61ee27..84cad8cb6af4 100644
---- a/arch/arm/mach-shmobile/setup-r8a7791.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7791.c
-@@ -31,6 +31,19 @@
- #include <mach/rcar-gen2.h>
- #include <asm/mach/arch.h>
- 
-+static const struct resource pfc_resources[] __initconst = {
-+	DEFINE_RES_MEM(0xe6060000, 0x250),
-+};
-+
-+#define r8a7791_register_pfc()						\
-+	platform_device_register_simple("pfc-r8a7791", -1, pfc_resources, \
-+					ARRAY_SIZE(pfc_resources))
-+
-+void __init r8a7791_pinmux_init(void)
-+{
-+	r8a7791_register_pfc();
-+}
-+
- #define SCIF_COMMON(scif_type, baseaddr, irq)			\
- 	.type		= scif_type,				\
- 	.mapbase	= baseaddr,				\
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0075-mmc-sh_mmcif-Move-away-from-using-deprecated-APIs.patch b/patches.renesas/0075-mmc-sh_mmcif-Move-away-from-using-deprecated-APIs.patch
deleted file mode 100644
index 20bba2501555e..0000000000000
--- a/patches.renesas/0075-mmc-sh_mmcif-Move-away-from-using-deprecated-APIs.patch
+++ /dev/null
@@ -1,50 +0,0 @@
-From f14dab096174a8c2b4605d75779c2afbaf70c774 Mon Sep 17 00:00:00 2001
-From: Ulf Hansson <ulf.hansson@linaro.org>
-Date: Thu, 26 Sep 2013 10:19:09 +0200
-Subject: mmc: sh_mmcif: Move away from using deprecated APIs
-
-Suspend and resume of cards are being handled from the protocol layer
-and consequently the mmc_suspend|resume_host APIs are deprecated.
-
-This means we can simplify the suspend|resume callbacks by removing the
-use of the deprecated APIs.
-
-Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
-Signed-off-by: Chris Ball <cjb@laptop.org>
-(cherry picked from commit cb3ca1aed991cd67ae76aec682e63633a7bead5b)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/mmc/host/sh_mmcif.c | 10 +++-------
- 1 file changed, 3 insertions(+), 7 deletions(-)
-
-diff --git a/drivers/mmc/host/sh_mmcif.c b/drivers/mmc/host/sh_mmcif.c
-index 36629a024aa1..6bffebe6f57a 100644
---- a/drivers/mmc/host/sh_mmcif.c
-+++ b/drivers/mmc/host/sh_mmcif.c
-@@ -1542,19 +1542,15 @@ static int sh_mmcif_remove(struct platform_device *pdev)
- static int sh_mmcif_suspend(struct device *dev)
- {
- 	struct sh_mmcif_host *host = dev_get_drvdata(dev);
--	int ret = mmc_suspend_host(host->mmc);
- 
--	if (!ret)
--		sh_mmcif_writel(host->addr, MMCIF_CE_INT_MASK, MASK_ALL);
-+	sh_mmcif_writel(host->addr, MMCIF_CE_INT_MASK, MASK_ALL);
- 
--	return ret;
-+	return 0;
- }
- 
- static int sh_mmcif_resume(struct device *dev)
- {
--	struct sh_mmcif_host *host = dev_get_drvdata(dev);
--
--	return mmc_resume_host(host->mmc);
-+	return 0;
- }
- #else
- #define sh_mmcif_suspend	NULL
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0076-ARM-shmobile-Select-GPIO-in-case-of-the-r8a7791-SoC.patch b/patches.renesas/0076-ARM-shmobile-Select-GPIO-in-case-of-the-r8a7791-SoC.patch
deleted file mode 100644
index 09237dbef538a..0000000000000
--- a/patches.renesas/0076-ARM-shmobile-Select-GPIO-in-case-of-the-r8a7791-SoC.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From aa44d7cf79d69878209fc0d1dba4f1c4f47b1b64 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Tue, 8 Oct 2013 12:39:20 +0900
-Subject: ARM: shmobile: Select GPIO in case of the r8a7791 SoC
-
-Make it possible to build GPIO on r8a7791.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit cc3a17d799481c502485d8c0770b888c3b4d788d)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/Kconfig | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
-index ff7c4ce8a99f..4e1cc76f001b 100644
---- a/arch/arm/mach-shmobile/Kconfig
-+++ b/arch/arm/mach-shmobile/Kconfig
-@@ -97,6 +97,7 @@ config ARCH_R8A7790
- 
- config ARCH_R8A7791
- 	bool "R-Car M2 (R8A77910)"
-+	select ARCH_WANT_OPTIONAL_GPIOLIB
- 	select ARM_GIC
- 	select CPU_V7
- 	select SH_CLK_CPG
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0076-ARM-shmobile-kzm9g-reference-add-AS3711-and-CPUFreq-.patch b/patches.renesas/0076-ARM-shmobile-kzm9g-reference-add-AS3711-and-CPUFreq-.patch
deleted file mode 100644
index ba9635fca2cf9..0000000000000
--- a/patches.renesas/0076-ARM-shmobile-kzm9g-reference-add-AS3711-and-CPUFreq-.patch
+++ /dev/null
@@ -1,125 +0,0 @@
-From ad150e26fcd8865a603be5866a58d939521a1802 Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Fri, 5 Apr 2013 12:00:37 +0200
-Subject: ARM: shmobile: kzm9g-reference: add AS3711 and CPUFreq DT bindings
-
-This adds DT bindings for an AS3711 PMIC, used for supplying power to the
-CPU, some peripherals and the backlight, as well as extends the cpu0 DT
-node with OPPs and a reference to the PMIC to support the CPUFreq and
-CPU DVFS functions.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 251ed17395a00a0af1e12b81ca655545eeef810d)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/sh73a0-kzm9g-reference.dts | 86 ++++++++++++++++++++++++++++
- 1 file changed, 86 insertions(+)
-
-diff --git a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
-index 5972abb5..b6f759e8 100644
---- a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
-+++ b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
-@@ -18,6 +18,19 @@
- 	model = "KZM-A9-GT";
- 	compatible = "renesas,kzm9g-reference", "renesas,sh73a0";
- 
-+	cpus {
-+		cpu@0 {
-+			cpu0-supply = <&vdd_dvfs>;
-+			operating-points = <
-+				/* kHz  uV */
-+				1196000 1315000
-+				 598000 1175000
-+				 398667 1065000
-+			>;
-+			voltage-tolerance = <1>; /* 1% */
-+		};
-+	};
-+
- 	chosen {
- 		bootargs = "console=tty0 console=ttySC4,115200 root=/dev/nfs ip=dhcp ignore_loglevel earlyprintk=sh-sci.4,115200";
- 	};
-@@ -59,6 +72,79 @@
- 	};
- };
- 
-+&i2c0 {
-+	as3711@40 {
-+		compatible = "ams,as3711";
-+		reg = <0x40>;
-+
-+		regulators {
-+			vdd_dvfs: sd1 {
-+				regulator-name = "1.315V CPU";
-+				regulator-min-microvolt = <1050000>;
-+				regulator-max-microvolt = <1350000>;
-+				regulator-always-on;
-+				regulator-boot-on;
-+			};
-+			sd2 {
-+				regulator-name = "1.8V";
-+				regulator-min-microvolt = <1800000>;
-+				regulator-max-microvolt = <1800000>;
-+				regulator-always-on;
-+				regulator-boot-on;
-+			};
-+			sd4 {
-+				regulator-name = "1.215V";
-+				regulator-min-microvolt = <1215000>;
-+				regulator-max-microvolt = <1235000>;
-+				regulator-always-on;
-+				regulator-boot-on;
-+			};
-+			ldo2 {
-+				regulator-name = "2.8V CPU";
-+				regulator-min-microvolt = <2800000>;
-+				regulator-max-microvolt = <2800000>;
-+				regulator-always-on;
-+				regulator-boot-on;
-+			};
-+			ldo3 {
-+				regulator-name = "3.0V CPU";
-+				regulator-min-microvolt = <3000000>;
-+				regulator-max-microvolt = <3000000>;
-+				regulator-always-on;
-+				regulator-boot-on;
-+			};
-+			ldo4 {
-+				regulator-name = "2.8V";
-+				regulator-min-microvolt = <2800000>;
-+				regulator-max-microvolt = <2800000>;
-+				regulator-always-on;
-+				regulator-boot-on;
-+			};
-+			ldo5 {
-+				regulator-name = "2.8V #2";
-+				regulator-min-microvolt = <2800000>;
-+				regulator-max-microvolt = <2800000>;
-+				regulator-always-on;
-+				regulator-boot-on;
-+			};
-+			ldo7 {
-+				regulator-name = "1.15V CPU";
-+				regulator-min-microvolt = <1150000>;
-+				regulator-max-microvolt = <1150000>;
-+				regulator-always-on;
-+				regulator-boot-on;
-+			};
-+			ldo8 {
-+				regulator-name = "1.15V CPU #2";
-+				regulator-min-microvolt = <1150000>;
-+				regulator-max-microvolt = <1150000>;
-+				regulator-always-on;
-+				regulator-boot-on;
-+			};
-+		};
-+	};
-+};
-+
- &mmcif {
- 	bus-width = <8>;
- 	vmmc-supply = <&reg_1p8v>;
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0076-mmc-sh_mmcif-Convert-to-PM-macros-when-defining-dev_.patch b/patches.renesas/0076-mmc-sh_mmcif-Convert-to-PM-macros-when-defining-dev_.patch
deleted file mode 100644
index 424d41d325368..0000000000000
--- a/patches.renesas/0076-mmc-sh_mmcif-Convert-to-PM-macros-when-defining-dev_.patch
+++ /dev/null
@@ -1,55 +0,0 @@
-From 84d535fe4aeaee78f81f2e8a8e5235185431c247 Mon Sep 17 00:00:00 2001
-From: Ulf Hansson <ulf.hansson@linaro.org>
-Date: Tue, 1 Oct 2013 14:01:46 +0200
-Subject: mmc: sh_mmcif: Convert to PM macros when defining dev_pm_ops
-
-Use SET_SYSTEM_SLEEP_PM_OPS to simplify code.
-
-Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
-Acked-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Signed-off-by: Chris Ball <cjb@laptop.org>
-(cherry picked from commit 51129f31d2e7abcfb4cf35f703a42d1524c45dfa)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/mmc/host/sh_mmcif.c | 10 +++-------
- 1 file changed, 3 insertions(+), 7 deletions(-)
-
-diff --git a/drivers/mmc/host/sh_mmcif.c b/drivers/mmc/host/sh_mmcif.c
-index 6bffebe6f57a..32bc4121c965 100644
---- a/drivers/mmc/host/sh_mmcif.c
-+++ b/drivers/mmc/host/sh_mmcif.c
-@@ -1538,7 +1538,7 @@ static int sh_mmcif_remove(struct platform_device *pdev)
- 	return 0;
- }
- 
--#ifdef CONFIG_PM
-+#ifdef CONFIG_PM_SLEEP
- static int sh_mmcif_suspend(struct device *dev)
- {
- 	struct sh_mmcif_host *host = dev_get_drvdata(dev);
-@@ -1552,10 +1552,7 @@ static int sh_mmcif_resume(struct device *dev)
- {
- 	return 0;
- }
--#else
--#define sh_mmcif_suspend	NULL
--#define sh_mmcif_resume		NULL
--#endif	/* CONFIG_PM */
-+#endif
- 
- static const struct of_device_id mmcif_of_match[] = {
- 	{ .compatible = "renesas,sh-mmcif" },
-@@ -1564,8 +1561,7 @@ static const struct of_device_id mmcif_of_match[] = {
- MODULE_DEVICE_TABLE(of, mmcif_of_match);
- 
- static const struct dev_pm_ops sh_mmcif_dev_pm_ops = {
--	.suspend = sh_mmcif_suspend,
--	.resume = sh_mmcif_resume,
-+	SET_SYSTEM_SLEEP_PM_OPS(sh_mmcif_suspend, sh_mmcif_resume)
- };
- 
- static struct platform_driver sh_mmcif_driver = {
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0077-ARM-shmobile-marzen-reference-add-irqpin-support-in-.patch b/patches.renesas/0077-ARM-shmobile-marzen-reference-add-irqpin-support-in-.patch
deleted file mode 100644
index 9a31652512ee0..0000000000000
--- a/patches.renesas/0077-ARM-shmobile-marzen-reference-add-irqpin-support-in-.patch
+++ /dev/null
@@ -1,46 +0,0 @@
-From 03c7e08219a4f3b3c078daabb3eefeaec492d944 Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Wed, 3 Apr 2013 11:19:07 +0200
-Subject: ARM: shmobile: marzen-reference: add irqpin support in DT
-
-Add an irqpin interrupt controller DT node on marzen-reference.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 24603f3caf07f5f65aa17ed7851ad4741595cf6a)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7779.dtsi | 17 +++++++++++++++++
- 1 file changed, 17 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi
-index fe5c6f21..7f146c6b 100644
---- a/arch/arm/boot/dts/r8a7779.dtsi
-+++ b/arch/arm/boot/dts/r8a7779.dtsi
-@@ -48,6 +48,23 @@
-                       <0xf0000100 0x100>;
-         };
- 
-+	irqpin0: irqpin@fe780010 {
-+		compatible = "renesas,intc-irqpin";
-+		#interrupt-cells = <2>;
-+		interrupt-controller;
-+		reg = <0xfe78001c 4>,
-+			<0xfe780010 4>,
-+			<0xfe780024 4>,
-+			<0xfe780044 4>,
-+			<0xfe780064 4>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 27 0x4
-+				0 28 0x4
-+				0 29 0x4
-+				0 30 0x4>;
-+		sense-bitfield-width = <2>;
-+	};
-+
- 	i2c0: i2c@0xffc70000 {
- 		#address-cells = <1>;
- 		#size-cells = <0>;
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0077-ARM-shmobile-r8a7791-GPIO-platform-device-support.patch b/patches.renesas/0077-ARM-shmobile-r8a7791-GPIO-platform-device-support.patch
deleted file mode 100644
index 0bd45b8008835..0000000000000
--- a/patches.renesas/0077-ARM-shmobile-r8a7791-GPIO-platform-device-support.patch
+++ /dev/null
@@ -1,80 +0,0 @@
-From 2a8153e2d7d33952d09f5c203e7b5bfa23061480 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Tue, 8 Oct 2013 12:39:39 +0900
-Subject: ARM: shmobile: r8a7791 GPIO platform device support
-
-Add GPIO controller platform devices for the r8a7791 SoC.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 93ff916305517f909ba616414d3ce1e55e6a4e43)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-r8a7791.c | 40 ++++++++++++++++++++++++++++++++++
- 1 file changed, 40 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/setup-r8a7791.c b/arch/arm/mach-shmobile/setup-r8a7791.c
-index 84cad8cb6af4..59dd442f48ae 100644
---- a/arch/arm/mach-shmobile/setup-r8a7791.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7791.c
-@@ -22,6 +22,7 @@
- #include <linux/irq.h>
- #include <linux/kernel.h>
- #include <linux/of_platform.h>
-+#include <linux/platform_data/gpio-rcar.h>
- #include <linux/platform_data/irq-renesas-irqc.h>
- #include <linux/serial_sci.h>
- #include <linux/sh_timer.h>
-@@ -39,9 +40,48 @@ static const struct resource pfc_resources[] __initconst = {
- 	platform_device_register_simple("pfc-r8a7791", -1, pfc_resources, \
- 					ARRAY_SIZE(pfc_resources))
- 
-+#define R8A7791_GPIO(idx, base, nr)					\
-+static const struct resource r8a7791_gpio##idx##_resources[] __initconst = { \
-+	DEFINE_RES_MEM((base), 0x50),					\
-+	DEFINE_RES_IRQ(gic_spi(4 + (idx))),				\
-+};									\
-+									\
-+static const struct gpio_rcar_config					\
-+r8a7791_gpio##idx##_platform_data __initconst = {			\
-+	.gpio_base	= 32 * (idx),					\
-+	.irq_base	= 0,						\
-+	.number_of_pins	= (nr),						\
-+	.pctl_name	= "pfc-r8a7791",				\
-+	.has_both_edge_trigger = 1,					\
-+};									\
-+
-+R8A7791_GPIO(0, 0xe6050000, 32);
-+R8A7791_GPIO(1, 0xe6051000, 32);
-+R8A7791_GPIO(2, 0xe6052000, 32);
-+R8A7791_GPIO(3, 0xe6053000, 32);
-+R8A7791_GPIO(4, 0xe6054000, 32);
-+R8A7791_GPIO(5, 0xe6055000, 32);
-+R8A7791_GPIO(6, 0xe6055400, 32);
-+R8A7791_GPIO(7, 0xe6055800, 26);
-+
-+#define r8a7791_register_gpio(idx)					\
-+	platform_device_register_resndata(&platform_bus, "gpio_rcar", idx, \
-+		r8a7791_gpio##idx##_resources,				\
-+		ARRAY_SIZE(r8a7791_gpio##idx##_resources),		\
-+		&r8a7791_gpio##idx##_platform_data,			\
-+		sizeof(r8a7791_gpio##idx##_platform_data))
-+
- void __init r8a7791_pinmux_init(void)
- {
- 	r8a7791_register_pfc();
-+	r8a7791_register_gpio(0);
-+	r8a7791_register_gpio(1);
-+	r8a7791_register_gpio(2);
-+	r8a7791_register_gpio(3);
-+	r8a7791_register_gpio(4);
-+	r8a7791_register_gpio(5);
-+	r8a7791_register_gpio(6);
-+	r8a7791_register_gpio(7);
- }
- 
- #define SCIF_COMMON(scif_type, baseaddr, irq)			\
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0077-mmc-sh_mmcif-Convert-to-clk_prepare-unprepare.patch b/patches.renesas/0077-mmc-sh_mmcif-Convert-to-clk_prepare-unprepare.patch
deleted file mode 100644
index cd6c3d0589fbd..0000000000000
--- a/patches.renesas/0077-mmc-sh_mmcif-Convert-to-clk_prepare-unprepare.patch
+++ /dev/null
@@ -1,79 +0,0 @@
-From ab55963f97051ba4a7ae0e6a6b7cc0e33a027d96 Mon Sep 17 00:00:00 2001
-From: Ulf Hansson <ulf.hansson@linaro.org>
-Date: Tue, 1 Oct 2013 14:56:57 +0200
-Subject: mmc: sh_mmcif: Convert to clk_prepare|unprepare
-
-Previously only clk_enable|disable were being used. Adapt properly
-to the clock API, by also using clk_prepare|unprepare.
-
-Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
-Acked-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Signed-off-by: Chris Ball <cjb@laptop.org>
-(cherry picked from commit ac0a2e98927e4797ae716b7327c3a9c85ba5431c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/mmc/host/sh_mmcif.c | 12 ++++++------
- 1 file changed, 6 insertions(+), 6 deletions(-)
-
-diff --git a/drivers/mmc/host/sh_mmcif.c b/drivers/mmc/host/sh_mmcif.c
-index 32bc4121c965..d032b080ac4d 100644
---- a/drivers/mmc/host/sh_mmcif.c
-+++ b/drivers/mmc/host/sh_mmcif.c
-@@ -964,7 +964,7 @@ static void sh_mmcif_request(struct mmc_host *mmc, struct mmc_request *mrq)
- 
- static int sh_mmcif_clk_update(struct sh_mmcif_host *host)
- {
--	int ret = clk_enable(host->hclk);
-+	int ret = clk_prepare_enable(host->hclk);
- 
- 	if (!ret) {
- 		host->clk = clk_get_rate(host->hclk);
-@@ -1018,7 +1018,7 @@ static void sh_mmcif_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
- 		}
- 		if (host->power) {
- 			pm_runtime_put_sync(&host->pd->dev);
--			clk_disable(host->hclk);
-+			clk_disable_unprepare(host->hclk);
- 			host->power = false;
- 			if (ios->power_mode == MMC_POWER_OFF)
- 				sh_mmcif_set_power(host, ios);
-@@ -1466,7 +1466,7 @@ static int sh_mmcif_probe(struct platform_device *pdev)
- 
- 	mutex_init(&host->thread_lock);
- 
--	clk_disable(host->hclk);
-+	clk_disable_unprepare(host->hclk);
- 	ret = mmc_add_host(mmc);
- 	if (ret < 0)
- 		goto emmcaddh;
-@@ -1487,7 +1487,7 @@ ereqirq1:
- ereqirq0:
- 	pm_runtime_suspend(&pdev->dev);
- eresume:
--	clk_disable(host->hclk);
-+	clk_disable_unprepare(host->hclk);
- eclkupdate:
- 	clk_put(host->hclk);
- eclkget:
-@@ -1505,7 +1505,7 @@ static int sh_mmcif_remove(struct platform_device *pdev)
- 	int irq[2];
- 
- 	host->dying = true;
--	clk_enable(host->hclk);
-+	clk_prepare_enable(host->hclk);
- 	pm_runtime_get_sync(&pdev->dev);
- 
- 	dev_pm_qos_hide_latency_limit(&pdev->dev);
-@@ -1530,7 +1530,7 @@ static int sh_mmcif_remove(struct platform_device *pdev)
- 	if (irq[1] >= 0)
- 		free_irq(irq[1], host);
- 
--	clk_disable(host->hclk);
-+	clk_disable_unprepare(host->hclk);
- 	mmc_free_host(host->mmc);
- 	pm_runtime_put_sync(&pdev->dev);
- 	pm_runtime_disable(&pdev->dev);
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0078-ARM-shmobile-armadillo800eva-Fix-maximum-number-of-S.patch b/patches.renesas/0078-ARM-shmobile-armadillo800eva-Fix-maximum-number-of-S.patch
deleted file mode 100644
index 37822396177dc..0000000000000
--- a/patches.renesas/0078-ARM-shmobile-armadillo800eva-Fix-maximum-number-of-S.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From 3343c96b725040c0be8b1e9338da125865759547 Mon Sep 17 00:00:00 2001
-From: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
-Date: Mon, 15 Apr 2013 13:44:52 +0900
-Subject: ARM: shmobile: armadillo800eva: Fix maximum number of SCIF
-
-The r8a77740 has 9ch SCIF. It is not 8ch.
-
-Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 03e40cecc21c9b24d3911896755fde933fc52887)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/configs/armadillo800eva_defconfig | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/arch/arm/configs/armadillo800eva_defconfig b/arch/arm/configs/armadillo800eva_defconfig
-index 0f2d80da..fae939d3 100644
---- a/arch/arm/configs/armadillo800eva_defconfig
-+++ b/arch/arm/configs/armadillo800eva_defconfig
-@@ -86,7 +86,7 @@ CONFIG_TOUCHSCREEN_ST1232=y
- # CONFIG_SERIO is not set
- # CONFIG_LEGACY_PTYS is not set
- CONFIG_SERIAL_SH_SCI=y
--CONFIG_SERIAL_SH_SCI_NR_UARTS=8
-+CONFIG_SERIAL_SH_SCI_NR_UARTS=9
- CONFIG_SERIAL_SH_SCI_CONSOLE=y
- # CONFIG_HW_RANDOM is not set
- CONFIG_I2C=y
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0078-ARM-shmobile-r8a73a4-don-t-use-named-irq-for-DMAEngi.patch b/patches.renesas/0078-ARM-shmobile-r8a73a4-don-t-use-named-irq-for-DMAEngi.patch
deleted file mode 100644
index 5024cf0ec595e..0000000000000
--- a/patches.renesas/0078-ARM-shmobile-r8a73a4-don-t-use-named-irq-for-DMAEngi.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From 0c8bb1baaaa6731752a47bf96830d02740e3e472 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Mon, 7 Oct 2013 22:59:23 -0700
-Subject: ARM: shmobile: r8a73a4: don't use named irq for DMAEngine
-
-sh-dma-engine driver doesn't care irq name.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Acked-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 1a936a38561b6b12c5075f704d97688ae56ceb05)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-r8a73a4.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-r8a73a4.c b/arch/arm/mach-shmobile/setup-r8a73a4.c
-index b0f2749071be..cc94b64c2ef5 100644
---- a/arch/arm/mach-shmobile/setup-r8a73a4.c
-+++ b/arch/arm/mach-shmobile/setup-r8a73a4.c
-@@ -275,7 +275,7 @@ static const struct sh_dmae_pdata dma_pdata = {
- 
- static struct resource dma_resources[] = {
- 	DEFINE_RES_MEM(0xe6700020, 0x89e0),
--	DEFINE_RES_IRQ_NAMED(gic_spi(220), "error_irq"),
-+	DEFINE_RES_IRQ(gic_spi(220)),
- 	{
- 		/* IRQ for channels 0-19 */
- 		.start  = gic_spi(200),
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0078-mmc-tmio-Move-away-from-using-deprecated-APIs.patch b/patches.renesas/0078-mmc-tmio-Move-away-from-using-deprecated-APIs.patch
deleted file mode 100644
index db6a904585465..0000000000000
--- a/patches.renesas/0078-mmc-tmio-Move-away-from-using-deprecated-APIs.patch
+++ /dev/null
@@ -1,52 +0,0 @@
-From 9177c23cb80dd6f507a0b73e3f5f1141e7892b5e Mon Sep 17 00:00:00 2001
-From: Ulf Hansson <ulf.hansson@linaro.org>
-Date: Thu, 26 Sep 2013 10:36:06 +0200
-Subject: mmc: tmio: Move away from using deprecated APIs
-
-Suspend and resume of cards are being handled from the protocol layer
-and consequently the mmc_suspend|resume_host APIs are deprecated.
-
-This means we can simplify the suspend|resume callbacks by removing the
-use of the deprecated APIs.
-
-Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Cc: Ian Molton <ian@mnementh.co.uk>
-Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
-Signed-off-by: Chris Ball <cjb@laptop.org>
-(cherry picked from commit d62c9577f950b1ce9b53200542c251ba8dfff344)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/mmc/host/tmio_mmc_pio.c | 9 +++------
- 1 file changed, 3 insertions(+), 6 deletions(-)
-
-diff --git a/drivers/mmc/host/tmio_mmc_pio.c b/drivers/mmc/host/tmio_mmc_pio.c
-index b3802256f954..f3b2d8ca1eca 100644
---- a/drivers/mmc/host/tmio_mmc_pio.c
-+++ b/drivers/mmc/host/tmio_mmc_pio.c
-@@ -1145,12 +1145,9 @@ int tmio_mmc_host_suspend(struct device *dev)
- {
- 	struct mmc_host *mmc = dev_get_drvdata(dev);
- 	struct tmio_mmc_host *host = mmc_priv(mmc);
--	int ret = mmc_suspend_host(mmc);
- 
--	if (!ret)
--		tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_ALL);
--
--	return ret;
-+	tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_ALL);
-+	return 0;
- }
- EXPORT_SYMBOL(tmio_mmc_host_suspend);
- 
-@@ -1163,7 +1160,7 @@ int tmio_mmc_host_resume(struct device *dev)
- 
- 	/* The MMC core will perform the complete set up */
- 	host->resuming = true;
--	return mmc_resume_host(mmc);
-+	return 0;
- }
- EXPORT_SYMBOL(tmio_mmc_host_resume);
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0079-ARM-shmobile-Select-GPIO-in-case-of-the-r7s72100-SoC.patch b/patches.renesas/0079-ARM-shmobile-Select-GPIO-in-case-of-the-r7s72100-SoC.patch
deleted file mode 100644
index c6b398a5e6552..0000000000000
--- a/patches.renesas/0079-ARM-shmobile-Select-GPIO-in-case-of-the-r7s72100-SoC.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From 8b82539c6d63b7be518723c092e420ce40bd4e32 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Thu, 10 Oct 2013 07:57:42 +0900
-Subject: ARM: shmobile: Select GPIO in case of the r7s72100 SoC
-
-The r7s72100 contains GPIO controllers so make sure the GPIO
-subsystem can be built by selecting ARCH_WANT_OPTIONAL_GPIOLIB.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 091b258c325592074386e092ee3fff343458550d)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/Kconfig | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
-index 4e1cc76f001b..c604ef1cd9d1 100644
---- a/arch/arm/mach-shmobile/Kconfig
-+++ b/arch/arm/mach-shmobile/Kconfig
-@@ -111,6 +111,7 @@ config ARCH_EMEV2
- 
- config ARCH_R7S72100
- 	bool "RZ/A1H (R7S72100)"
-+	select ARCH_WANT_OPTIONAL_GPIOLIB
- 	select ARM_GIC
- 	select CPU_V7
- 	select SH_CLK_CPG
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0079-ARM-shmobile-bockw-enable-SDHI-on-defconfig.patch b/patches.renesas/0079-ARM-shmobile-bockw-enable-SDHI-on-defconfig.patch
deleted file mode 100644
index 4d9535df7fab6..0000000000000
--- a/patches.renesas/0079-ARM-shmobile-bockw-enable-SDHI-on-defconfig.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From ec4912f76275b927ca8be8c8ad27c6f114d8fc44 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Tue, 16 Apr 2013 22:18:11 -0700
-Subject: ARM: shmobile: bockw: enable SDHI on defconfig
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit f4b4ce8ed235d40240e1d446e612d96ab188b856)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/configs/bockw_defconfig | 2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/arch/arm/configs/bockw_defconfig b/arch/arm/configs/bockw_defconfig
-index 6524cdf3..b74a4d43 100644
---- a/arch/arm/configs/bockw_defconfig
-+++ b/arch/arm/configs/bockw_defconfig
-@@ -72,6 +72,8 @@ CONFIG_SERIAL_SH_SCI_CONSOLE=y
- # CONFIG_HW_RANDOM is not set
- # CONFIG_HWMON is not set
- # CONFIG_USB_SUPPORT is not set
-+CONFIG_MMC=y
-+CONFIG_MMC_SDHI=y
- CONFIG_UIO=y
- CONFIG_UIO_PDRV_GENIRQ=y
- # CONFIG_IOMMU_SUPPORT is not set
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0079-sh-pfc-r8a7778-Add-SRU-SSI-pin-support.patch b/patches.renesas/0079-sh-pfc-r8a7778-Add-SRU-SSI-pin-support.patch
deleted file mode 100644
index ba9d3b4b5e45a..0000000000000
--- a/patches.renesas/0079-sh-pfc-r8a7778-Add-SRU-SSI-pin-support.patch
+++ /dev/null
@@ -1,201 +0,0 @@
-From 77df5350f1ea142dde1b4f8cdea3f30d86a3b18b Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Mon, 26 Aug 2013 01:51:22 -0700
-Subject: sh-pfc: r8a7778: Add SRU/SSI pin support
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit 3ad8219a50eab201abf89b25d7797d6695b73e4e)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7778.c | 125 +++++++++++++++++++++++++++++++++++
- 1 file changed, 125 insertions(+)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7778.c b/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
-index 428d2a6857ef..20b1d0d671a3 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
-@@ -1288,6 +1288,22 @@ static struct sh_pfc_pin pinmux_pins[] = {
- 						     arg5##_MARK, arg6##_MARK, \
- 						     arg7##_MARK, arg8##_MARK, }
- 
-+/* - AUDIO macro -------------------------------------------------------------*/
-+#define AUDIO_PFC_PIN(name, pin)	SH_PFC_PINS(name, pin)
-+#define AUDIO_PFC_DAT(name, pin)	SH_PFC_MUX1(name, pin)
-+
-+/* - AUDIO clock -------------------------------------------------------------*/
-+AUDIO_PFC_PIN(audio_clk_a,	RCAR_GP_PIN(2, 22));
-+AUDIO_PFC_DAT(audio_clk_a,	AUDIO_CLKA);
-+AUDIO_PFC_PIN(audio_clk_b,	RCAR_GP_PIN(2, 23));
-+AUDIO_PFC_DAT(audio_clk_b,	AUDIO_CLKB);
-+AUDIO_PFC_PIN(audio_clk_c,	RCAR_GP_PIN(2, 7));
-+AUDIO_PFC_DAT(audio_clk_c,	AUDIO_CLKC);
-+AUDIO_PFC_PIN(audio_clkout_a,	RCAR_GP_PIN(2, 16));
-+AUDIO_PFC_DAT(audio_clkout_a,	AUDIO_CLKOUT_A);
-+AUDIO_PFC_PIN(audio_clkout_b,	RCAR_GP_PIN(1, 16));
-+AUDIO_PFC_DAT(audio_clkout_b,	AUDIO_CLKOUT_B);
-+
- /* - Ether ------------------------------------------------------------------ */
- SH_PFC_PINS(ether_rmii,		RCAR_GP_PIN(4, 10),	RCAR_GP_PIN(4, 11),
- 				RCAR_GP_PIN(4, 13),	RCAR_GP_PIN(4, 9),
-@@ -1577,6 +1593,59 @@ SDHI_PFC_WPPN(sdhi2_wp_a,	SD2_WP_A);
- SDHI_PFC_PINS(sdhi2_wp_b,	RCAR_GP_PIN(3, 28));
- SDHI_PFC_WPPN(sdhi2_wp_b,	SD2_WP_B);
- 
-+/* - SSI macro -------------------------------------------------------------- */
-+#define SSI_PFC_PINS(name, args...)		SH_PFC_PINS(name, args)
-+#define SSI_PFC_CTRL(name, sck, ws)		SH_PFC_MUX2(name, sck, ws)
-+#define SSI_PFC_DATA(name, d)			SH_PFC_MUX1(name, d)
-+
-+/* - SSI 0/1/2 -------------------------------------------------------------- */
-+SSI_PFC_PINS(ssi012_ctrl,	RCAR_GP_PIN(3, 6),	RCAR_GP_PIN(3, 7));
-+SSI_PFC_CTRL(ssi012_ctrl,	SSI_SCK012,		SSI_WS012);
-+SSI_PFC_PINS(ssi0_data,		RCAR_GP_PIN(3, 10));
-+SSI_PFC_DATA(ssi0_data,		SSI_SDATA0);
-+SSI_PFC_PINS(ssi1_a_ctrl,	RCAR_GP_PIN(2, 20),	RCAR_GP_PIN(2, 21));
-+SSI_PFC_CTRL(ssi1_a_ctrl,	SSI_SCK1_A,		SSI_WS1_A);
-+SSI_PFC_PINS(ssi1_b_ctrl,	PIN_NUMBER(3, 20),	RCAR_GP_PIN(1, 3));
-+SSI_PFC_CTRL(ssi1_b_ctrl,	SSI_SCK1_B,		SSI_WS1_B);
-+SSI_PFC_PINS(ssi1_data,		RCAR_GP_PIN(3, 9));
-+SSI_PFC_DATA(ssi1_data,		SSI_SDATA1);
-+SSI_PFC_PINS(ssi2_a_ctrl,	RCAR_GP_PIN(2, 26),	RCAR_GP_PIN(3, 4));
-+SSI_PFC_CTRL(ssi2_a_ctrl,	SSI_SCK2_A,		SSI_WS2_A);
-+SSI_PFC_PINS(ssi2_b_ctrl,	RCAR_GP_PIN(2, 6),	RCAR_GP_PIN(2, 17));
-+SSI_PFC_CTRL(ssi2_b_ctrl,	SSI_SCK2_B,		SSI_WS2_B);
-+SSI_PFC_PINS(ssi2_data,		RCAR_GP_PIN(3, 8));
-+SSI_PFC_DATA(ssi2_data,		SSI_SDATA2);
-+
-+/* - SSI 3/4 ---------------------------------------------------------------- */
-+SSI_PFC_PINS(ssi34_ctrl,	RCAR_GP_PIN(3, 2),	RCAR_GP_PIN(3, 3));
-+SSI_PFC_CTRL(ssi34_ctrl,	SSI_SCK34,		SSI_WS34);
-+SSI_PFC_PINS(ssi3_data,		RCAR_GP_PIN(3, 5));
-+SSI_PFC_DATA(ssi3_data,		SSI_SDATA3);
-+SSI_PFC_PINS(ssi4_ctrl,		RCAR_GP_PIN(1, 22),     RCAR_GP_PIN(1, 23));
-+SSI_PFC_CTRL(ssi4_ctrl,		SSI_SCK4,               SSI_WS4);
-+SSI_PFC_PINS(ssi4_data,		RCAR_GP_PIN(3, 4));
-+SSI_PFC_DATA(ssi4_data,		SSI_SDATA4);
-+
-+/* - SSI 5 ------------------------------------------------------------------ */
-+SSI_PFC_PINS(ssi5_ctrl,		RCAR_GP_PIN(2, 31),	RCAR_GP_PIN(3, 0));
-+SSI_PFC_CTRL(ssi5_ctrl,		SSI_SCK5,		SSI_WS5);
-+SSI_PFC_PINS(ssi5_data,		RCAR_GP_PIN(3, 1));
-+SSI_PFC_DATA(ssi5_data,		SSI_SDATA5);
-+
-+/* - SSI 6 ------------------------------------------------------------------ */
-+SSI_PFC_PINS(ssi6_ctrl,		RCAR_GP_PIN(2, 28),	RCAR_GP_PIN(2, 29));
-+SSI_PFC_CTRL(ssi6_ctrl,		SSI_SCK6,		SSI_WS6);
-+SSI_PFC_PINS(ssi6_data,		RCAR_GP_PIN(2, 30));
-+SSI_PFC_DATA(ssi6_data,		SSI_SDATA6);
-+
-+/* - SSI 7/8  --------------------------------------------------------------- */
-+SSI_PFC_PINS(ssi78_ctrl,	RCAR_GP_PIN(2, 24),	RCAR_GP_PIN(2, 25));
-+SSI_PFC_CTRL(ssi78_ctrl,	SSI_SCK78,		SSI_WS78);
-+SSI_PFC_PINS(ssi7_data,		RCAR_GP_PIN(2, 27));
-+SSI_PFC_DATA(ssi7_data,		SSI_SDATA7);
-+SSI_PFC_PINS(ssi8_data,		RCAR_GP_PIN(2, 26));
-+SSI_PFC_DATA(ssi8_data,		SSI_SDATA8);
-+
- /* - USB0 ------------------------------------------------------------------- */
- SH_PFC_PINS(usb0,		RCAR_GP_PIN(0, 1));
- SH_PFC_MUX1(usb0,		PENC0);
-@@ -1624,6 +1693,11 @@ VIN_PFC_PINS(vin1_sync,		RCAR_GP_PIN(3, 21),	RCAR_GP_PIN(3, 22));
- VIN_PFC_SYNC(vin1_sync,		VI1_HSYNC,		VI1_VSYNC);
- 
- static const struct sh_pfc_pin_group pinmux_groups[] = {
-+	SH_PFC_PIN_GROUP(audio_clk_a),
-+	SH_PFC_PIN_GROUP(audio_clk_b),
-+	SH_PFC_PIN_GROUP(audio_clk_c),
-+	SH_PFC_PIN_GROUP(audio_clkout_a),
-+	SH_PFC_PIN_GROUP(audio_clkout_b),
- 	SH_PFC_PIN_GROUP(ether_rmii),
- 	SH_PFC_PIN_GROUP(ether_link),
- 	SH_PFC_PIN_GROUP(ether_magic),
-@@ -1713,6 +1787,25 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(sdhi2_data4_b),
- 	SH_PFC_PIN_GROUP(sdhi2_wp_a),
- 	SH_PFC_PIN_GROUP(sdhi2_wp_b),
-+	SH_PFC_PIN_GROUP(ssi012_ctrl),
-+	SH_PFC_PIN_GROUP(ssi0_data),
-+	SH_PFC_PIN_GROUP(ssi1_a_ctrl),
-+	SH_PFC_PIN_GROUP(ssi1_b_ctrl),
-+	SH_PFC_PIN_GROUP(ssi1_data),
-+	SH_PFC_PIN_GROUP(ssi2_a_ctrl),
-+	SH_PFC_PIN_GROUP(ssi2_b_ctrl),
-+	SH_PFC_PIN_GROUP(ssi2_data),
-+	SH_PFC_PIN_GROUP(ssi34_ctrl),
-+	SH_PFC_PIN_GROUP(ssi3_data),
-+	SH_PFC_PIN_GROUP(ssi4_ctrl),
-+	SH_PFC_PIN_GROUP(ssi4_data),
-+	SH_PFC_PIN_GROUP(ssi5_ctrl),
-+	SH_PFC_PIN_GROUP(ssi5_data),
-+	SH_PFC_PIN_GROUP(ssi6_ctrl),
-+	SH_PFC_PIN_GROUP(ssi6_data),
-+	SH_PFC_PIN_GROUP(ssi78_ctrl),
-+	SH_PFC_PIN_GROUP(ssi7_data),
-+	SH_PFC_PIN_GROUP(ssi8_data),
- 	SH_PFC_PIN_GROUP(usb0),
- 	SH_PFC_PIN_GROUP(usb0_ovc),
- 	SH_PFC_PIN_GROUP(usb1),
-@@ -1725,6 +1818,14 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(vin1_sync),
- };
- 
-+static const char * const audio_clk_groups[] = {
-+	"audio_clk_a",
-+	"audio_clk_b",
-+	"audio_clk_c",
-+	"audio_clkout_a",
-+	"audio_clkout_b",
-+};
-+
- static const char * const ether_groups[] = {
- 	"ether_rmii",
- 	"ether_link",
-@@ -1875,6 +1976,28 @@ static const char * const sdhi2_groups[] = {
- 	"sdhi2_wp_b",
- };
- 
-+static const char * const ssi_groups[] = {
-+	"ssi012_ctrl",
-+	"ssi0_data",
-+	"ssi1_a_ctrl",
-+	"ssi1_b_ctrl",
-+	"ssi1_data",
-+	"ssi2_a_ctrl",
-+	"ssi2_b_ctrl",
-+	"ssi2_data",
-+	"ssi34_ctrl",
-+	"ssi3_data",
-+	"ssi4_ctrl",
-+	"ssi4_data",
-+	"ssi5_ctrl",
-+	"ssi5_data",
-+	"ssi6_ctrl",
-+	"ssi6_data",
-+	"ssi78_ctrl",
-+	"ssi7_data",
-+	"ssi8_data",
-+};
-+
- static const char * const usb0_groups[] = {
- 	"usb0",
- 	"usb0_ovc",
-@@ -1898,6 +2021,7 @@ static const char * const vin1_groups[] = {
- };
- 
- static const struct sh_pfc_function pinmux_functions[] = {
-+	SH_PFC_FUNCTION(audio_clk),
- 	SH_PFC_FUNCTION(ether),
- 	SH_PFC_FUNCTION(hscif0),
- 	SH_PFC_FUNCTION(hscif1),
-@@ -1918,6 +2042,7 @@ static const struct sh_pfc_function pinmux_functions[] = {
- 	SH_PFC_FUNCTION(sdhi0),
- 	SH_PFC_FUNCTION(sdhi1),
- 	SH_PFC_FUNCTION(sdhi2),
-+	SH_PFC_FUNCTION(ssi),
- 	SH_PFC_FUNCTION(usb0),
- 	SH_PFC_FUNCTION(usb1),
- 	SH_PFC_FUNCTION(vin0),
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0080-ARM-shmobile-add-GPIO-IRQ-macro.patch b/patches.renesas/0080-ARM-shmobile-add-GPIO-IRQ-macro.patch
deleted file mode 100644
index 6b7d892f32b56..0000000000000
--- a/patches.renesas/0080-ARM-shmobile-add-GPIO-IRQ-macro.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From ba3f0a0b9d8c188cad4252229e3768a3f403636d Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Wed, 17 Apr 2013 23:41:30 -0700
-Subject: ARM: shmobile: add GPIO IRQ macro
-
-R-Car series gpio_rcar driver can control GPIO IRQ today.
-It needs base IRQ number for gpio_rcar_config :: .irq_base
-This patch adds macro for GPIO IRQ.
-This patch was tested on Bock-W board
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 9904319d4f6f4fe0be84c98d73a9a2174d3893c9)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/include/mach/irqs.h | 5 +++++
- 1 file changed, 5 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/include/mach/irqs.h b/arch/arm/mach-shmobile/include/mach/irqs.h
-index b2074e2a..d241bfd6 100644
---- a/arch/arm/mach-shmobile/include/mach/irqs.h
-+++ b/arch/arm/mach-shmobile/include/mach/irqs.h
-@@ -16,4 +16,9 @@
- #define IRQPIN_BASE		2000
- #define irq_pin(nr)		((nr) + IRQPIN_BASE)
- 
-+/* GPIO IRQ */
-+#define _GPIO_IRQ_BASE		2500
-+#define GPIO_IRQ_BASE(x)	(_GPIO_IRQ_BASE + (32 * x))
-+#define GPIO_IRQ(x, y)		(_GPIO_IRQ_BASE + (32 * x) + y)
-+
- #endif /* __ASM_MACH_IRQS_H */
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0080-ARM-shmobile-r8a7778-add-MMCIF-clock-support-for-DT.patch b/patches.renesas/0080-ARM-shmobile-r8a7778-add-MMCIF-clock-support-for-DT.patch
deleted file mode 100644
index 287c08f73dcb9..0000000000000
--- a/patches.renesas/0080-ARM-shmobile-r8a7778-add-MMCIF-clock-support-for-DT.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From 9295cf501cfa98e5d2c07f5b2cf006ea0fa65649 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Thu, 3 Oct 2013 18:32:10 -0700
-Subject: ARM: shmobile: r8a7778: add MMCIF clock support for DT
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit ecf2b14fb93ca305ca54f89cfedba91e5aa3ff85)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r8a7778.c | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a7778.c b/arch/arm/mach-shmobile/clock-r8a7778.c
-index a77089fb0707..e04371505c04 100644
---- a/arch/arm/mach-shmobile/clock-r8a7778.c
-+++ b/arch/arm/mach-shmobile/clock-r8a7778.c
-@@ -173,6 +173,7 @@ static struct clk_lookup lookups[] = {
- 
- 	/* MSTP32 clocks */
- 	CLKDEV_DEV_ID("sh_mmcif", &mstp_clks[MSTP331]), /* MMC */
-+	CLKDEV_DEV_ID("ffe4e000.mmcif", &mstp_clks[MSTP331]), /* MMC */
- 	CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP323]), /* SDHI0 */
- 	CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP322]), /* SDHI1 */
- 	CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP321]), /* SDHI2 */
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0080-sh-pfc-r8a7790-Add-I2C-pin-groups-and-functions.patch b/patches.renesas/0080-sh-pfc-r8a7790-Add-I2C-pin-groups-and-functions.patch
deleted file mode 100644
index be2401735bba5..0000000000000
--- a/patches.renesas/0080-sh-pfc-r8a7790-Add-I2C-pin-groups-and-functions.patch
+++ /dev/null
@@ -1,132 +0,0 @@
-From 7a5559da1718ed980540673f92f714bbbdc6bd9d Mon Sep 17 00:00:00 2001
-From: Ulrich Hecht <ulrich.hecht@gmail.com>
-Date: Fri, 30 Aug 2013 14:37:41 +0200
-Subject: sh-pfc: r8a7790: Add I2C pin groups and functions
-
-Adds pinmux for i2c bus 1 and 2. (Pins for 0 and 3 are not multiplexed.)
-
-Signed-off-by: Ulrich Hecht <ulrich.hecht@gmail.com>
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit 70702bfc13c4f96f2f05d4ce2eb110cd1735fef5)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 82 ++++++++++++++++++++++++++++++++++++
- 1 file changed, 82 insertions(+)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-index 64fcc00693b5..5c2657bcc3a4 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-@@ -1990,6 +1990,64 @@ static const unsigned int hscif1_ctrl_b_pins[] = {
- static const unsigned int hscif1_ctrl_b_mux[] = {
- 	HRTS1_N_B_MARK, HCTS1_N_B_MARK,
- };
-+/* - I2C1 ------------------------------------------------------------------- */
-+static const unsigned int i2c1_pins[] = {
-+	/* SCL, SDA */
-+	RCAR_GP_PIN(1, 16), RCAR_GP_PIN(1, 17),
-+};
-+static const unsigned int i2c1_mux[] = {
-+	I2C1_SCL_MARK, I2C1_SDA_MARK,
-+};
-+static const unsigned int i2c1_b_pins[] = {
-+	/* SCL, SDA */
-+	RCAR_GP_PIN(3, 6), RCAR_GP_PIN(3, 7),
-+};
-+static const unsigned int i2c1_b_mux[] = {
-+	I2C1_SCL_B_MARK, I2C1_SDA_B_MARK,
-+};
-+static const unsigned int i2c1_c_pins[] = {
-+	/* SCL, SDA */
-+	RCAR_GP_PIN(4, 30), RCAR_GP_PIN(4, 27),
-+};
-+static const unsigned int i2c1_c_mux[] = {
-+	I2C1_SCL_C_MARK, I2C1_SDA_C_MARK,
-+};
-+/* - I2C2 ------------------------------------------------------------------- */
-+static const unsigned int i2c2_pins[] = {
-+	/* SCL, SDA */
-+	RCAR_GP_PIN(5, 5), RCAR_GP_PIN(5, 6),
-+};
-+static const unsigned int i2c2_mux[] = {
-+	I2C2_SCL_MARK, I2C2_SDA_MARK,
-+};
-+static const unsigned int i2c2_b_pins[] = {
-+	/* SCL, SDA */
-+	RCAR_GP_PIN(4, 0), RCAR_GP_PIN(4, 1),
-+};
-+static const unsigned int i2c2_b_mux[] = {
-+	I2C2_SCL_B_MARK, I2C2_SDA_B_MARK,
-+};
-+static const unsigned int i2c2_c_pins[] = {
-+	/* SCL, SDA */
-+	RCAR_GP_PIN(0, 6), RCAR_GP_PIN(0, 7),
-+};
-+static const unsigned int i2c2_c_mux[] = {
-+	I2C2_SCL_C_MARK, I2C2_SDA_C_MARK,
-+};
-+static const unsigned int i2c2_d_pins[] = {
-+	/* SCL, SDA */
-+	RCAR_GP_PIN(3, 14), RCAR_GP_PIN(3, 15),
-+};
-+static const unsigned int i2c2_d_mux[] = {
-+	I2C2_SCL_D_MARK, I2C2_SDA_D_MARK,
-+};
-+static const unsigned int i2c2_e_pins[] = {
-+	/* SCL, SDA */
-+	RCAR_GP_PIN(2, 18), RCAR_GP_PIN(2, 19),
-+};
-+static const unsigned int i2c2_e_mux[] = {
-+	I2C2_SCL_E_MARK, I2C2_SDA_E_MARK,
-+};
- /* - INTC ------------------------------------------------------------------- */
- static const unsigned int intc_irq0_pins[] = {
- 	/* IRQ */
-@@ -3047,6 +3105,14 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(hscif1_data_b),
- 	SH_PFC_PIN_GROUP(hscif1_clk_b),
- 	SH_PFC_PIN_GROUP(hscif1_ctrl_b),
-+	SH_PFC_PIN_GROUP(i2c1),
-+	SH_PFC_PIN_GROUP(i2c1_b),
-+	SH_PFC_PIN_GROUP(i2c1_c),
-+	SH_PFC_PIN_GROUP(i2c2),
-+	SH_PFC_PIN_GROUP(i2c2_b),
-+	SH_PFC_PIN_GROUP(i2c2_c),
-+	SH_PFC_PIN_GROUP(i2c2_d),
-+	SH_PFC_PIN_GROUP(i2c2_e),
- 	SH_PFC_PIN_GROUP(intc_irq0),
- 	SH_PFC_PIN_GROUP(intc_irq1),
- 	SH_PFC_PIN_GROUP(intc_irq2),
-@@ -3243,6 +3309,20 @@ static const char * const hscif1_groups[] = {
- 	"hscif1_ctrl_b",
- };
- 
-+static const char * const i2c1_groups[] = {
-+	"i2c1",
-+	"i2c1_b",
-+	"i2c1_c",
-+};
-+
-+static const char * const i2c2_groups[] = {
-+	"i2c2",
-+	"i2c2_b",
-+	"i2c2_c",
-+	"i2c2_d",
-+	"i2c2_e",
-+};
-+
- static const char * const intc_groups[] = {
- 	"intc_irq0",
- 	"intc_irq1",
-@@ -3469,6 +3549,8 @@ static const struct sh_pfc_function pinmux_functions[] = {
- 	SH_PFC_FUNCTION(eth),
- 	SH_PFC_FUNCTION(hscif0),
- 	SH_PFC_FUNCTION(hscif1),
-+	SH_PFC_FUNCTION(i2c1),
-+	SH_PFC_FUNCTION(i2c2),
- 	SH_PFC_FUNCTION(intc),
- 	SH_PFC_FUNCTION(mmc0),
- 	SH_PFC_FUNCTION(mmc1),
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0081-ARM-shmobile-r8a7778-Register-PFC-device.patch b/patches.renesas/0081-ARM-shmobile-r8a7778-Register-PFC-device.patch
deleted file mode 100644
index d2419b81d4387..0000000000000
--- a/patches.renesas/0081-ARM-shmobile-r8a7778-Register-PFC-device.patch
+++ /dev/null
@@ -1,66 +0,0 @@
-From 5e2f0119bcd946fe100e8216f4a961e8ede87269 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Fri, 12 Apr 2013 05:37:50 +0000
-Subject: ARM: shmobile: r8a7778: Register PFC device
-
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 369b00bbe51e128a201af58a4daabb01253f126e)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/Kconfig                |  1 +
- arch/arm/mach-shmobile/include/mach/r8a7778.h |  1 +
- arch/arm/mach-shmobile/setup-r8a7778.c        | 13 +++++++++++++
- 3 files changed, 15 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
-index c6fb9ec8..638e5c57 100644
---- a/arch/arm/mach-shmobile/Kconfig
-+++ b/arch/arm/mach-shmobile/Kconfig
-@@ -37,6 +37,7 @@ config ARCH_R8A7740
- 
- config ARCH_R8A7778
- 	bool "R-Car M1 (R8A77780)"
-+	select ARCH_WANT_OPTIONAL_GPIOLIB
- 	select CPU_V7
- 	select SH_CLK_CPG
- 	select ARM_GIC
-diff --git a/arch/arm/mach-shmobile/include/mach/r8a7778.h b/arch/arm/mach-shmobile/include/mach/r8a7778.h
-index 951149e6..68053fc4 100644
---- a/arch/arm/mach-shmobile/include/mach/r8a7778.h
-+++ b/arch/arm/mach-shmobile/include/mach/r8a7778.h
-@@ -28,5 +28,6 @@ extern void r8a7778_init_irq(void);
- extern void r8a7778_init_irq_dt(void);
- extern void r8a7778_clock_init(void);
- extern void r8a7778_init_irq_extpin(int irlm);
-+extern void r8a7778_pinmux_init(void);
- 
- #endif /* __ASM_R8A7778_H__ */
-diff --git a/arch/arm/mach-shmobile/setup-r8a7778.c b/arch/arm/mach-shmobile/setup-r8a7778.c
-index 30b4a336..0ca57010 100644
---- a/arch/arm/mach-shmobile/setup-r8a7778.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7778.c
-@@ -94,6 +94,19 @@ static struct resource ether_resources[] = {
- 		&sh_tmu##idx##_platform_data,		\
- 		sizeof(sh_tmu##idx##_platform_data))
- 
-+/* PFC */
-+static struct resource pfc_resources[] = {
-+	DEFINE_RES_MEM(0xfffc0000, 0x118),
-+};
-+
-+void __init r8a7778_pinmux_init(void)
-+{
-+	platform_device_register_simple(
-+		"pfc-r8a7778", -1,
-+		pfc_resources,
-+		ARRAY_SIZE(pfc_resources));
-+}
-+
- void __init r8a7778_add_standard_devices(void)
- {
- 	int i;
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0081-ARM-shmobile-r8a7778-add-SDHI-clock-support-for-DT.patch b/patches.renesas/0081-ARM-shmobile-r8a7778-add-SDHI-clock-support-for-DT.patch
deleted file mode 100644
index 1a592f9d01c95..0000000000000
--- a/patches.renesas/0081-ARM-shmobile-r8a7778-add-SDHI-clock-support-for-DT.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From 048bbd6e70876c42424305785dd233f78cb29c12 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Thu, 10 Oct 2013 23:35:17 -0700
-Subject: ARM: shmobile: r8a7778: add SDHI clock support for DT
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 67c01c3e0ff8d2e8d16e20574ad9a8342df58924)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r8a7778.c | 3 +++
- 1 file changed, 3 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a7778.c b/arch/arm/mach-shmobile/clock-r8a7778.c
-index e04371505c04..011564fd87b1 100644
---- a/arch/arm/mach-shmobile/clock-r8a7778.c
-+++ b/arch/arm/mach-shmobile/clock-r8a7778.c
-@@ -175,8 +175,11 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_DEV_ID("sh_mmcif", &mstp_clks[MSTP331]), /* MMC */
- 	CLKDEV_DEV_ID("ffe4e000.mmcif", &mstp_clks[MSTP331]), /* MMC */
- 	CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP323]), /* SDHI0 */
-+	CLKDEV_DEV_ID("ffe4c000.sdhi", &mstp_clks[MSTP323]), /* SDHI0 */
- 	CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP322]), /* SDHI1 */
-+	CLKDEV_DEV_ID("ffe4d000.sdhi", &mstp_clks[MSTP322]), /* SDHI1 */
- 	CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP321]), /* SDHI2 */
-+	CLKDEV_DEV_ID("ffe4f000.sdhi", &mstp_clks[MSTP321]), /* SDHI2 */
- 	CLKDEV_DEV_ID("r8a777x-ether", &mstp_clks[MSTP114]), /* Ether */
- 	CLKDEV_DEV_ID("r8a7778-vin.0", &mstp_clks[MSTP110]), /* VIN0 */
- 	CLKDEV_DEV_ID("r8a7778-vin.1", &mstp_clks[MSTP109]), /* VIN1 */
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0081-sh-pfc-r8a7790-add-pin-definitions-for-the-I2C3-inte.patch b/patches.renesas/0081-sh-pfc-r8a7790-add-pin-definitions-for-the-I2C3-inte.patch
deleted file mode 100644
index 51f0bee2f545c..0000000000000
--- a/patches.renesas/0081-sh-pfc-r8a7790-add-pin-definitions-for-the-I2C3-inte.patch
+++ /dev/null
@@ -1,105 +0,0 @@
-From e5d3bba7eb6e23c92639d08703e4b21d17c1743e Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Thu, 26 Sep 2013 19:20:56 +0200
-Subject: sh-pfc: r8a7790: add pin definitions for the I2C3 interface
-
-There are four I2C interfaces on r8a7790, each of them can be connected to
-one of the two respective I2C controllers, e.g. interface #0 can be
-configured to work with I2C0 or with IIC0. Additionally some of those
-interfaces can also use one of several pin sets. Interface #3 is special,
-because it can be used in automatic mode for DVFS. It only has one set
-of pins available and those pins cannot be used for anything else, they
-also lack the GPIO function.
-
-This patch uses the sh-pfc ability to configure pins, not associated with
-GPIOs and adds support for I2C3 to the r8a7790 PFC set up.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit f6aaaac9995084e496d4ff800d092a8c0cb12641)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 28 ++++++++++++++++++++++++++++
- 1 file changed, 28 insertions(+)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-index 5c2657bcc3a4..72786fc93958 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-@@ -781,6 +781,8 @@ enum {
- 	ADICS_SAMP_MARK, DU2_CDE_MARK, QPOLB_MARK, SCIFA2_RXD_B_MARK,
- 	USB1_PWEN_MARK, AUDIO_CLKOUT_D_MARK, USB1_OVC_MARK,
- 	TCLK1_B_MARK,
-+
-+	I2C3_SCL_MARK, I2C3_SDA_MARK,
- 	PINMUX_MARK_END,
- };
- 
-@@ -1719,10 +1721,22 @@ static const u16 pinmux_data[] = {
- 	PINMUX_IPSR_DATA(IP16_6, AUDIO_CLKOUT_D),
- 	PINMUX_IPSR_DATA(IP16_7, USB1_OVC),
- 	PINMUX_IPSR_MODSEL_DATA(IP16_7, TCLK1_B, SEL_TMU1_1),
-+
-+	PINMUX_DATA(I2C3_SCL_MARK, FN_SEL_IICDVFS_1),
-+	PINMUX_DATA(I2C3_SDA_MARK, FN_SEL_IICDVFS_1),
- };
- 
-+/* R8A7790 has 6 banks with 32 GPIOs in each = 192 GPIOs */
-+#define ROW_GROUP_A(r) ('Z' - 'A' + 1 + (r))
-+#define PIN_NUMBER(r, c) (((r) - 'A') * 31 + (c) + 200)
-+#define PIN_A_NUMBER(r, c) PIN_NUMBER(ROW_GROUP_A(r), c)
-+
- static struct sh_pfc_pin pinmux_pins[] = {
- 	PINMUX_GPIO_GP_ALL(),
-+
-+	/* Pins not associated with a GPIO port */
-+	SH_PFC_PIN_NAMED(ROW_GROUP_A('J'), 15, AJ15),
-+	SH_PFC_PIN_NAMED(ROW_GROUP_A('H'), 15, AH15),
- };
- 
- /* - DU RGB ----------------------------------------------------------------- */
-@@ -2048,6 +2062,14 @@ static const unsigned int i2c2_e_pins[] = {
- static const unsigned int i2c2_e_mux[] = {
- 	I2C2_SCL_E_MARK, I2C2_SDA_E_MARK,
- };
-+/* - I2C3 ------------------------------------------------------------------- */
-+static const unsigned int i2c3_pins[] = {
-+	/* SCL, SDA */
-+	PIN_A_NUMBER('J', 15), PIN_A_NUMBER('H', 15),
-+};
-+static const unsigned int i2c3_mux[] = {
-+	I2C3_SCL_MARK, I2C3_SDA_MARK,
-+};
- /* - INTC ------------------------------------------------------------------- */
- static const unsigned int intc_irq0_pins[] = {
- 	/* IRQ */
-@@ -3113,6 +3135,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(i2c2_c),
- 	SH_PFC_PIN_GROUP(i2c2_d),
- 	SH_PFC_PIN_GROUP(i2c2_e),
-+	SH_PFC_PIN_GROUP(i2c3),
- 	SH_PFC_PIN_GROUP(intc_irq0),
- 	SH_PFC_PIN_GROUP(intc_irq1),
- 	SH_PFC_PIN_GROUP(intc_irq2),
-@@ -3323,6 +3346,10 @@ static const char * const i2c2_groups[] = {
- 	"i2c2_e",
- };
- 
-+static const char * const i2c3_groups[] = {
-+	"i2c3",
-+};
-+
- static const char * const intc_groups[] = {
- 	"intc_irq0",
- 	"intc_irq1",
-@@ -3551,6 +3578,7 @@ static const struct sh_pfc_function pinmux_functions[] = {
- 	SH_PFC_FUNCTION(hscif1),
- 	SH_PFC_FUNCTION(i2c1),
- 	SH_PFC_FUNCTION(i2c2),
-+	SH_PFC_FUNCTION(i2c3),
- 	SH_PFC_FUNCTION(intc),
- 	SH_PFC_FUNCTION(mmc0),
- 	SH_PFC_FUNCTION(mmc1),
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0082-ARM-shmobile-r8a7779-add-SDHI-clock-support-for-DT.patch b/patches.renesas/0082-ARM-shmobile-r8a7779-add-SDHI-clock-support-for-DT.patch
deleted file mode 100644
index a3e05daa9b606..0000000000000
--- a/patches.renesas/0082-ARM-shmobile-r8a7779-add-SDHI-clock-support-for-DT.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From 7cb2659f384ce2b0bbd0a8e7d2837f6596271241 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Thu, 10 Oct 2013 23:36:10 -0700
-Subject: ARM: shmobile: r8a7779: add SDHI clock support for DT
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit ac0ddd9d0baa68e952428325d42cc50a80b18761)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r8a7779.c | 4 ++++
- 1 file changed, 4 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a7779.c b/arch/arm/mach-shmobile/clock-r8a7779.c
-index badb8b7142fb..5c83259183d0 100644
---- a/arch/arm/mach-shmobile/clock-r8a7779.c
-+++ b/arch/arm/mach-shmobile/clock-r8a7779.c
-@@ -201,9 +201,13 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_DEV_ID("sh-hspi.1", &mstp_clks[MSTP007]), /* HSPI1 */
- 	CLKDEV_DEV_ID("sh-hspi.2", &mstp_clks[MSTP007]), /* HSPI2 */
- 	CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP323]), /* SDHI0 */
-+	CLKDEV_DEV_ID("ffe4c000.sdhi", &mstp_clks[MSTP323]), /* SDHI0 */
- 	CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP322]), /* SDHI1 */
-+	CLKDEV_DEV_ID("ffe4d000.sdhi", &mstp_clks[MSTP322]), /* SDHI1 */
- 	CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP321]), /* SDHI2 */
-+	CLKDEV_DEV_ID("ffe4e000.sdhi", &mstp_clks[MSTP321]), /* SDHI2 */
- 	CLKDEV_DEV_ID("sh_mobile_sdhi.3", &mstp_clks[MSTP320]), /* SDHI3 */
-+	CLKDEV_DEV_ID("ffe4f000.sdhi", &mstp_clks[MSTP320]), /* SDHI3 */
- 	CLKDEV_DEV_ID("rcar-du-r8a7779", &mstp_clks[MSTP103]), /* DU */
- };
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0082-sh-pfc-Initial-r8a7790-PFC-support.patch b/patches.renesas/0082-sh-pfc-Initial-r8a7790-PFC-support.patch
deleted file mode 100644
index 254ea413a9ddd..0000000000000
--- a/patches.renesas/0082-sh-pfc-Initial-r8a7790-PFC-support.patch
+++ /dev/null
@@ -1,3725 +0,0 @@
-From a88db333f27b1849158afb9f9d061bd051ba837c Mon Sep 17 00:00:00 2001
-From: Koji Matsuoka <koji.matsuoka.xm@rms.renesas.com>
-Date: Mon, 8 Apr 2013 11:08:53 +0900
-Subject: sh-pfc: Initial r8a7790 PFC support
-
-Add initial PFC support for the r8a7790 SoC.
-
-At this point only GPIO interface is supported, move to
-newer interfaces planned as incremental changes.
-
-Original authors is Koji Matsuoka-san, thanks for him
-and his team for the heavy lifting. Adjusted by Magnus
-to work together with updated code in drivers/pinctrl.
-
-Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@rms.renesas.com>
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 58c229e18b7754dfe505f3bc1688feb28c84f42a)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/include/mach/r8a7790.h |  383 +++
- drivers/pinctrl/sh-pfc/Kconfig                |    5 +
- drivers/pinctrl/sh-pfc/Makefile               |    1 +
- drivers/pinctrl/sh-pfc/core.c                 |    3 +
- drivers/pinctrl/sh-pfc/core.h                 |    1 +
- drivers/pinctrl/sh-pfc/pfc-r8a7790.c          | 3238 +++++++++++++++++++++++++
- 6 files changed, 3631 insertions(+)
- create mode 100644 drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-
-diff --git a/arch/arm/mach-shmobile/include/mach/r8a7790.h b/arch/arm/mach-shmobile/include/mach/r8a7790.h
-index 2e919e61..e01ac4e3 100644
---- a/arch/arm/mach-shmobile/include/mach/r8a7790.h
-+++ b/arch/arm/mach-shmobile/include/mach/r8a7790.h
-@@ -1,6 +1,389 @@
- #ifndef __ASM_R8A7790_H__
- #define __ASM_R8A7790_H__
- 
-+/* Pin Function Controller:
-+ * GPIO_FN_xx - GPIO used to select pin function
-+ * GPIO_GP_x_x - GPIO mapped to real I/O pin on CPU
-+ */
-+enum {
-+	GPIO_GP_0_0, GPIO_GP_0_1, GPIO_GP_0_2, GPIO_GP_0_3,
-+	GPIO_GP_0_4, GPIO_GP_0_5, GPIO_GP_0_6, GPIO_GP_0_7,
-+	GPIO_GP_0_8, GPIO_GP_0_9, GPIO_GP_0_10, GPIO_GP_0_11,
-+	GPIO_GP_0_12, GPIO_GP_0_13, GPIO_GP_0_14, GPIO_GP_0_15,
-+	GPIO_GP_0_16, GPIO_GP_0_17, GPIO_GP_0_18, GPIO_GP_0_19,
-+	GPIO_GP_0_20, GPIO_GP_0_21, GPIO_GP_0_22, GPIO_GP_0_23,
-+	GPIO_GP_0_24, GPIO_GP_0_25, GPIO_GP_0_26, GPIO_GP_0_27,
-+	GPIO_GP_0_28, GPIO_GP_0_29, GPIO_GP_0_30, GPIO_GP_0_31,
-+
-+	GPIO_GP_1_0, GPIO_GP_1_1, GPIO_GP_1_2, GPIO_GP_1_3,
-+	GPIO_GP_1_4, GPIO_GP_1_5, GPIO_GP_1_6, GPIO_GP_1_7,
-+	GPIO_GP_1_8, GPIO_GP_1_9, GPIO_GP_1_10, GPIO_GP_1_11,
-+	GPIO_GP_1_12, GPIO_GP_1_13, GPIO_GP_1_14, GPIO_GP_1_15,
-+	GPIO_GP_1_16, GPIO_GP_1_17, GPIO_GP_1_18, GPIO_GP_1_19,
-+	GPIO_GP_1_20, GPIO_GP_1_21, GPIO_GP_1_22, GPIO_GP_1_23,
-+	GPIO_GP_1_24, GPIO_GP_1_25, GPIO_GP_1_26, GPIO_GP_1_27,
-+	GPIO_GP_1_28, GPIO_GP_1_29,
-+
-+	GPIO_GP_2_0, GPIO_GP_2_1, GPIO_GP_2_2, GPIO_GP_2_3,
-+	GPIO_GP_2_4, GPIO_GP_2_5, GPIO_GP_2_6, GPIO_GP_2_7,
-+	GPIO_GP_2_8, GPIO_GP_2_9, GPIO_GP_2_10, GPIO_GP_2_11,
-+	GPIO_GP_2_12, GPIO_GP_2_13, GPIO_GP_2_14, GPIO_GP_2_15,
-+	GPIO_GP_2_16, GPIO_GP_2_17, GPIO_GP_2_18, GPIO_GP_2_19,
-+	GPIO_GP_2_20, GPIO_GP_2_21, GPIO_GP_2_22, GPIO_GP_2_23,
-+	GPIO_GP_2_24, GPIO_GP_2_25, GPIO_GP_2_26, GPIO_GP_2_27,
-+	GPIO_GP_2_28, GPIO_GP_2_29,
-+
-+	GPIO_GP_3_0, GPIO_GP_3_1, GPIO_GP_3_2, GPIO_GP_3_3,
-+	GPIO_GP_3_4, GPIO_GP_3_5, GPIO_GP_3_6, GPIO_GP_3_7,
-+	GPIO_GP_3_8, GPIO_GP_3_9, GPIO_GP_3_10, GPIO_GP_3_11,
-+	GPIO_GP_3_12, GPIO_GP_3_13, GPIO_GP_3_14, GPIO_GP_3_15,
-+	GPIO_GP_3_16, GPIO_GP_3_17, GPIO_GP_3_18, GPIO_GP_3_19,
-+	GPIO_GP_3_20, GPIO_GP_3_21, GPIO_GP_3_22, GPIO_GP_3_23,
-+	GPIO_GP_3_24, GPIO_GP_3_25, GPIO_GP_3_26, GPIO_GP_3_27,
-+	GPIO_GP_3_28, GPIO_GP_3_29, GPIO_GP_3_30, GPIO_GP_3_31,
-+
-+	GPIO_GP_4_0, GPIO_GP_4_1, GPIO_GP_4_2, GPIO_GP_4_3,
-+	GPIO_GP_4_4, GPIO_GP_4_5, GPIO_GP_4_6, GPIO_GP_4_7,
-+	GPIO_GP_4_8, GPIO_GP_4_9, GPIO_GP_4_10, GPIO_GP_4_11,
-+	GPIO_GP_4_12, GPIO_GP_4_13, GPIO_GP_4_14, GPIO_GP_4_15,
-+	GPIO_GP_4_16, GPIO_GP_4_17, GPIO_GP_4_18, GPIO_GP_4_19,
-+	GPIO_GP_4_20, GPIO_GP_4_21, GPIO_GP_4_22, GPIO_GP_4_23,
-+	GPIO_GP_4_24, GPIO_GP_4_25, GPIO_GP_4_26, GPIO_GP_4_27,
-+	GPIO_GP_4_28, GPIO_GP_4_29, GPIO_GP_4_30, GPIO_GP_4_31,
-+
-+	GPIO_GP_5_0, GPIO_GP_5_1, GPIO_GP_5_2, GPIO_GP_5_3,
-+	GPIO_GP_5_4, GPIO_GP_5_5, GPIO_GP_5_6, GPIO_GP_5_7,
-+	GPIO_GP_5_8, GPIO_GP_5_9, GPIO_GP_5_10, GPIO_GP_5_11,
-+	GPIO_GP_5_12, GPIO_GP_5_13, GPIO_GP_5_14, GPIO_GP_5_15,
-+	GPIO_GP_5_16, GPIO_GP_5_17, GPIO_GP_5_18, GPIO_GP_5_19,
-+	GPIO_GP_5_20, GPIO_GP_5_21, GPIO_GP_5_22, GPIO_GP_5_23,
-+	GPIO_GP_5_24, GPIO_GP_5_25, GPIO_GP_5_26, GPIO_GP_5_27,
-+	GPIO_GP_5_28, GPIO_GP_5_29, GPIO_GP_5_30, GPIO_GP_5_31,
-+
-+	GPIO_FN_VI1_DATA7_VI1_B7, GPIO_FN_USB0_PWEN, GPIO_FN_USB0_OVC_VBUS,
-+	GPIO_FN_USB2_PWEN, GPIO_FN_USB2_OVC, GPIO_FN_AVS1, GPIO_FN_AVS2,
-+	GPIO_FN_DU_DOTCLKIN0, GPIO_FN_DU_DOTCLKIN2,
-+
-+	/* IPSR0 */
-+	GPIO_FN_D1, GPIO_FN_MSIOF3_SYNC_B, GPIO_FN_VI3_DATA1, GPIO_FN_VI0_G5,
-+	GPIO_FN_VI0_G5_B, GPIO_FN_D2, GPIO_FN_MSIOF3_RXD_B, GPIO_FN_VI3_DATA2,
-+	GPIO_FN_VI0_G6, GPIO_FN_VI0_G6_B, GPIO_FN_D3, GPIO_FN_MSIOF3_TXD_B,
-+	GPIO_FN_VI3_DATA3, GPIO_FN_VI0_G7, GPIO_FN_VI0_G7_B, GPIO_FN_D4,
-+	GPIO_FN_SCIFB1_RXD_F, GPIO_FN_SCIFB0_RXD_C, GPIO_FN_VI3_DATA4,
-+	GPIO_FN_VI0_R0, GPIO_FN_VI0_R0_B, GPIO_FN_RX0_B, GPIO_FN_D5,
-+	GPIO_FN_SCIFB1_TXD_F, GPIO_FN_SCIFB0_TXD_C, GPIO_FN_VI3_DATA5,
-+	GPIO_FN_VI0_R1, GPIO_FN_VI0_R1_B, GPIO_FN_TX0_B, GPIO_FN_D6,
-+	GPIO_FN_SCL2_C, GPIO_FN_VI3_DATA6, GPIO_FN_VI0_R2, GPIO_FN_VI0_R2_B,
-+	GPIO_FN_SCL2_CIS_C, GPIO_FN_D7, GPIO_FN_AD_DI_B, GPIO_FN_SDA2_C,
-+	GPIO_FN_VI3_DATA7, GPIO_FN_VI0_R3, GPIO_FN_VI0_R3_B, GPIO_FN_SDA2_CIS_C,
-+	GPIO_FN_D8, GPIO_FN_SCIFA1_SCK_C, GPIO_FN_AVB_TXD0, GPIO_FN_MII_TXD0,
-+	GPIO_FN_VI0_G0, GPIO_FN_VI0_G0_B, GPIO_FN_VI2_DATA0_VI2_B0,
-+
-+	/* IPSR1 */
-+	GPIO_FN_D9, GPIO_FN_SCIFA1_RXD_C, GPIO_FN_AVB_TXD1, GPIO_FN_MII_TXD1,
-+	GPIO_FN_VI0_G1, GPIO_FN_VI0_G1_B, GPIO_FN_VI2_DATA1_VI2_B1, GPIO_FN_D10,
-+	GPIO_FN_SCIFA1_TXD_C, GPIO_FN_AVB_TXD2, GPIO_FN_MII_TXD2,
-+	GPIO_FN_VI0_G2, GPIO_FN_VI0_G2_B, GPIO_FN_VI2_DATA2_VI2_B2, GPIO_FN_D11,
-+	GPIO_FN_SCIFA1_CTS_N_C, GPIO_FN_AVB_TXD3, GPIO_FN_MII_TXD3,
-+	GPIO_FN_VI0_G3, GPIO_FN_VI0_G3_B, GPIO_FN_VI2_DATA3_VI2_B3,
-+	GPIO_FN_D12, GPIO_FN_SCIFA1_RTS_N_C, GPIO_FN_AVB_TXD4,
-+	GPIO_FN_VI0_HSYNC_N, GPIO_FN_VI0_HSYNC_N_B, GPIO_FN_VI2_DATA4_VI2_B4,
-+	GPIO_FN_D13, GPIO_FN_AVB_TXD5, GPIO_FN_VI0_VSYNC_N,
-+	GPIO_FN_VI0_VSYNC_N_B, GPIO_FN_VI2_DATA5_VI2_B5, GPIO_FN_D14,
-+	GPIO_FN_SCIFB1_RXD_C, GPIO_FN_AVB_TXD6, GPIO_FN_RX1_B,
-+	GPIO_FN_VI0_CLKENB, GPIO_FN_VI0_CLKENB_B, GPIO_FN_VI2_DATA6_VI2_B6,
-+	GPIO_FN_D15, GPIO_FN_SCIFB1_TXD_C, GPIO_FN_AVB_TXD7, GPIO_FN_TX1_B,
-+	GPIO_FN_VI0_FIELD, GPIO_FN_VI0_FIELD_B, GPIO_FN_VI2_DATA7_VI2_B7,
-+	GPIO_FN_A0, GPIO_FN_PWM3, GPIO_FN_A1, GPIO_FN_PWM4,
-+
-+	/* IPSR2 */
-+	GPIO_FN_A2, GPIO_FN_PWM5, GPIO_FN_MSIOF1_SS1_B, GPIO_FN_A3,
-+	GPIO_FN_PWM6, GPIO_FN_MSIOF1_SS2_B, GPIO_FN_A4, GPIO_FN_MSIOF1_TXD_B,
-+	GPIO_FN_TPU0TO0, GPIO_FN_A5, GPIO_FN_SCIFA1_TXD_B, GPIO_FN_TPU0TO1,
-+	GPIO_FN_A6, GPIO_FN_SCIFA1_RTS_N_B, GPIO_FN_TPU0TO2, GPIO_FN_A7,
-+	GPIO_FN_SCIFA1_SCK_B, GPIO_FN_AUDIO_CLKOUT_B, GPIO_FN_TPU0TO3,
-+	GPIO_FN_A8, GPIO_FN_SCIFA1_RXD_B, GPIO_FN_SSI_SCK5_B, GPIO_FN_VI0_R4,
-+	GPIO_FN_VI0_R4_B, GPIO_FN_SCIFB2_RXD_C, GPIO_FN_VI2_DATA0_VI2_B0_B,
-+	GPIO_FN_A9, GPIO_FN_SCIFA1_CTS_N_B, GPIO_FN_SSI_WS5_B, GPIO_FN_VI0_R5,
-+	GPIO_FN_VI0_R5_B, GPIO_FN_SCIFB2_TXD_C, GPIO_FN_VI2_DATA1_VI2_B1_B,
-+	GPIO_FN_A10, GPIO_FN_SSI_SDATA5_B, GPIO_FN_MSIOF2_SYNC, GPIO_FN_VI0_R6,
-+	GPIO_FN_VI0_R6_B, GPIO_FN_VI2_DATA2_VI2_B2_B,
-+
-+	/* IPSR3 */
-+	GPIO_FN_A11, GPIO_FN_SCIFB2_CTS_N_B, GPIO_FN_MSIOF2_SCK, GPIO_FN_VI1_R0,
-+	GPIO_FN_VI1_R0_B, GPIO_FN_VI2_G0, GPIO_FN_VI2_DATA3_VI2_B3_B,
-+	GPIO_FN_A12, GPIO_FN_SCIFB2_RXD_B, GPIO_FN_MSIOF2_TXD, GPIO_FN_VI1_R1,
-+	GPIO_FN_VI1_R1_B, GPIO_FN_VI2_G1, GPIO_FN_VI2_DATA4_VI2_B4_B,
-+	GPIO_FN_A13, GPIO_FN_SCIFB2_RTS_N_B, GPIO_FN_EX_WAIT2,
-+	GPIO_FN_MSIOF2_RXD, GPIO_FN_VI1_R2, GPIO_FN_VI1_R2_B, GPIO_FN_VI2_G2,
-+	GPIO_FN_VI2_DATA5_VI2_B5_B, GPIO_FN_A14, GPIO_FN_SCIFB2_TXD_B,
-+	GPIO_FN_ATACS11_N, GPIO_FN_MSIOF2_SS1, GPIO_FN_A15,
-+	GPIO_FN_SCIFB2_SCK_B, GPIO_FN_ATARD1_N, GPIO_FN_MSIOF2_SS2, GPIO_FN_A16,
-+	GPIO_FN_ATAWR1_N, GPIO_FN_A17, GPIO_FN_AD_DO_B, GPIO_FN_ATADIR1_N,
-+	GPIO_FN_A18, GPIO_FN_AD_CLK_B, GPIO_FN_ATAG1_N, GPIO_FN_A19,
-+	GPIO_FN_AD_NCS_N_B, GPIO_FN_ATACS01_N, GPIO_FN_EX_WAIT0_B, GPIO_FN_A20,
-+	GPIO_FN_SPCLK, GPIO_FN_VI1_R3, GPIO_FN_VI1_R3_B, GPIO_FN_VI2_G4,
-+
-+	/* IPSR4 */
-+	GPIO_FN_A21, GPIO_FN_MOSI_IO0, GPIO_FN_VI1_R4, GPIO_FN_VI1_R4_B,
-+	GPIO_FN_VI2_G5, GPIO_FN_A22, GPIO_FN_MISO_IO1, GPIO_FN_VI1_R5,
-+	GPIO_FN_VI1_R5_B, GPIO_FN_VI2_G6, GPIO_FN_A23, GPIO_FN_IO2,
-+	GPIO_FN_VI1_G7, GPIO_FN_VI1_G7_B, GPIO_FN_VI2_G7, GPIO_FN_A24,
-+	GPIO_FN_IO3, GPIO_FN_VI1_R7, GPIO_FN_VI1_R7_B, GPIO_FN_VI2_CLKENB,
-+	GPIO_FN_VI2_CLKENB_B, GPIO_FN_A25, GPIO_FN_SSL, GPIO_FN_VI1_G6,
-+	GPIO_FN_VI1_G6_B, GPIO_FN_VI2_FIELD, GPIO_FN_VI2_FIELD_B, GPIO_FN_CS0_N,
-+	GPIO_FN_VI1_R6, GPIO_FN_VI1_R6_B, GPIO_FN_VI2_G3, GPIO_FN_MSIOF0_SS2_B,
-+	GPIO_FN_CS1_N_A26, GPIO_FN_SPEEDIN, GPIO_FN_VI0_R7, GPIO_FN_VI0_R7_B,
-+	GPIO_FN_VI2_CLK, GPIO_FN_VI2_CLK_B, GPIO_FN_EX_CS0_N, GPIO_FN_HRX1_B,
-+	GPIO_FN_VI1_G5, GPIO_FN_VI1_G5_B, GPIO_FN_VI2_R0, GPIO_FN_HTX0_B,
-+	GPIO_FN_MSIOF0_SS1_B, GPIO_FN_EX_CS1_N, GPIO_FN_GPS_CLK,
-+	GPIO_FN_HCTS1_N_B, GPIO_FN_VI1_FIELD, GPIO_FN_VI1_FIELD_B,
-+	GPIO_FN_VI2_R1, GPIO_FN_EX_CS2_N, GPIO_FN_GPS_SIGN, GPIO_FN_HRTS1_N_B,
-+	GPIO_FN_VI3_CLKENB, GPIO_FN_VI1_G0, GPIO_FN_VI1_G0_B, GPIO_FN_VI2_R2,
-+
-+	/* IPSR5 */
-+	GPIO_FN_EX_CS3_N, GPIO_FN_GPS_MAG, GPIO_FN_VI3_FIELD, GPIO_FN_VI1_G1,
-+	GPIO_FN_VI1_G1_B, GPIO_FN_VI2_R3, GPIO_FN_EX_CS4_N,
-+	GPIO_FN_MSIOF1_SCK_B, GPIO_FN_VI3_HSYNC_N,
-+	GPIO_FN_VI2_HSYNC_N, GPIO_FN_SCL1, GPIO_FN_VI2_HSYNC_N_B,
-+	GPIO_FN_INTC_EN0_N, GPIO_FN_SCL1_CIS, GPIO_FN_EX_CS5_N, GPIO_FN_CAN0_RX,
-+	GPIO_FN_MSIOF1_RXD_B, GPIO_FN_VI3_VSYNC_N, GPIO_FN_VI1_G2,
-+	GPIO_FN_VI1_G2_B, GPIO_FN_VI2_R4, GPIO_FN_SDA1, GPIO_FN_INTC_EN1_N,
-+	GPIO_FN_SDA1_CIS, GPIO_FN_BS_N, GPIO_FN_IETX, GPIO_FN_HTX1_B,
-+	GPIO_FN_CAN1_TX, GPIO_FN_DRACK0, GPIO_FN_IETX_C, GPIO_FN_RD_N,
-+	GPIO_FN_CAN0_TX, GPIO_FN_SCIFA0_SCK_B, GPIO_FN_RD_WR_N, GPIO_FN_VI1_G3,
-+	GPIO_FN_VI1_G3_B, GPIO_FN_VI2_R5, GPIO_FN_SCIFA0_RXD_B,
-+	GPIO_FN_INTC_IRQ4_N, GPIO_FN_WE0_N, GPIO_FN_IECLK, GPIO_FN_CAN_CLK,
-+	GPIO_FN_VI2_VSYNC_N, GPIO_FN_SCIFA0_TXD_B, GPIO_FN_VI2_VSYNC_N_B,
-+	GPIO_FN_WE1_N, GPIO_FN_IERX, GPIO_FN_CAN1_RX, GPIO_FN_VI1_G4,
-+	GPIO_FN_VI1_G4_B, GPIO_FN_VI2_R6, GPIO_FN_SCIFA0_CTS_N_B,
-+	GPIO_FN_IERX_C, GPIO_FN_EX_WAIT0, GPIO_FN_IRQ3, GPIO_FN_INTC_IRQ3_N,
-+	GPIO_FN_VI3_CLK, GPIO_FN_SCIFA0_RTS_N_B, GPIO_FN_HRX0_B,
-+	GPIO_FN_MSIOF0_SCK_B, GPIO_FN_DREQ0_N, GPIO_FN_VI1_HSYNC_N,
-+	GPIO_FN_VI1_HSYNC_N_B, GPIO_FN_VI2_R7, GPIO_FN_SSI_SCK78_C,
-+	GPIO_FN_SSI_WS78_B,
-+
-+	/* IPSR6 */
-+	GPIO_FN_DACK0, GPIO_FN_IRQ0, GPIO_FN_INTC_IRQ0_N, GPIO_FN_SSI_SCK6_B,
-+	GPIO_FN_VI1_VSYNC_N, GPIO_FN_VI1_VSYNC_N_B, GPIO_FN_SSI_WS78_C,
-+	GPIO_FN_DREQ1_N, GPIO_FN_VI1_CLKENB, GPIO_FN_VI1_CLKENB_B,
-+	GPIO_FN_SSI_SDATA7_C, GPIO_FN_SSI_SCK78_B, GPIO_FN_DACK1, GPIO_FN_IRQ1,
-+	GPIO_FN_INTC_IRQ1_N, GPIO_FN_SSI_WS6_B, GPIO_FN_SSI_SDATA8_C,
-+	GPIO_FN_DREQ2_N, GPIO_FN_HSCK1_B, GPIO_FN_HCTS0_N_B,
-+	GPIO_FN_MSIOF0_TXD_B, GPIO_FN_DACK2, GPIO_FN_IRQ2, GPIO_FN_INTC_IRQ2_N,
-+	GPIO_FN_SSI_SDATA6_B, GPIO_FN_HRTS0_N_B, GPIO_FN_MSIOF0_RXD_B,
-+	GPIO_FN_ETH_CRS_DV, GPIO_FN_RMII_CRS_DV, GPIO_FN_STP_ISCLK_0_B,
-+	GPIO_FN_TS_SDEN0_D, GPIO_FN_GLO_Q0_C, GPIO_FN_SCL2_E,
-+	GPIO_FN_SCL2_CIS_E, GPIO_FN_ETH_RX_ER, GPIO_FN_RMII_RX_ER,
-+	GPIO_FN_STP_ISD_0_B, GPIO_FN_TS_SPSYNC0_D, GPIO_FN_GLO_Q1_C,
-+	GPIO_FN_SDA2_E, GPIO_FN_SDA2_CIS_E, GPIO_FN_ETH_RXD0, GPIO_FN_RMII_RXD0,
-+	GPIO_FN_STP_ISEN_0_B, GPIO_FN_TS_SDAT0_D, GPIO_FN_GLO_I0_C,
-+	GPIO_FN_SCIFB1_SCK_G, GPIO_FN_SCK1_E, GPIO_FN_ETH_RXD1,
-+	GPIO_FN_RMII_RXD1, GPIO_FN_HRX0_E, GPIO_FN_STP_ISSYNC_0_B,
-+	GPIO_FN_TS_SCK0_D, GPIO_FN_GLO_I1_C, GPIO_FN_SCIFB1_RXD_G,
-+	GPIO_FN_RX1_E, GPIO_FN_ETH_LINK, GPIO_FN_RMII_LINK, GPIO_FN_HTX0_E,
-+	GPIO_FN_STP_IVCXO27_0_B, GPIO_FN_SCIFB1_TXD_G, GPIO_FN_TX1_E,
-+	GPIO_FN_ETH_REF_CLK, GPIO_FN_RMII_REF_CLK, GPIO_FN_HCTS0_N_E,
-+	GPIO_FN_STP_IVCXO27_1_B, GPIO_FN_HRX0_F,
-+
-+	/* IPSR7 */
-+	GPIO_FN_ETH_MDIO, GPIO_FN_RMII_MDIO, GPIO_FN_HRTS0_N_E,
-+	GPIO_FN_SIM0_D_C, GPIO_FN_HCTS0_N_F, GPIO_FN_ETH_TXD1,
-+	GPIO_FN_RMII_TXD1, GPIO_FN_HTX0_F, GPIO_FN_BPFCLK_G, GPIO_FN_RDS_CLK_F,
-+	GPIO_FN_ETH_TX_EN, GPIO_FN_RMII_TX_EN, GPIO_FN_SIM0_CLK_C,
-+	GPIO_FN_HRTS0_N_F, GPIO_FN_ETH_MAGIC, GPIO_FN_RMII_MAGIC,
-+	GPIO_FN_SIM0_RST_C, GPIO_FN_ETH_TXD0, GPIO_FN_RMII_TXD0,
-+	GPIO_FN_STP_ISCLK_1_B, GPIO_FN_TS_SDEN1_C, GPIO_FN_GLO_SCLK_C,
-+	GPIO_FN_ETH_MDC, GPIO_FN_RMII_MDC, GPIO_FN_STP_ISD_1_B,
-+	GPIO_FN_TS_SPSYNC1_C, GPIO_FN_GLO_SDATA_C, GPIO_FN_PWM0,
-+	GPIO_FN_SCIFA2_SCK_C, GPIO_FN_STP_ISEN_1_B, GPIO_FN_TS_SDAT1_C,
-+	GPIO_FN_GLO_SS_C, GPIO_FN_PWM1, GPIO_FN_SCIFA2_TXD_C,
-+	GPIO_FN_STP_ISSYNC_1_B, GPIO_FN_TS_SCK1_C, GPIO_FN_GLO_RFON_C,
-+	GPIO_FN_PCMOE_N, GPIO_FN_PWM2, GPIO_FN_PWMFSW0, GPIO_FN_SCIFA2_RXD_C,
-+	GPIO_FN_PCMWE_N, GPIO_FN_IECLK_C, GPIO_FN_DU1_DOTCLKIN,
-+	GPIO_FN_AUDIO_CLKC, GPIO_FN_AUDIO_CLKOUT_C, GPIO_FN_VI0_CLK,
-+	GPIO_FN_ATACS00_N, GPIO_FN_AVB_RXD1, GPIO_FN_MII_RXD1,
-+	GPIO_FN_VI0_DATA0_VI0_B0, GPIO_FN_ATACS10_N, GPIO_FN_AVB_RXD2,
-+	GPIO_FN_MII_RXD2,
-+
-+	/* IPSR8 */
-+	GPIO_FN_VI0_DATA1_VI0_B1, GPIO_FN_ATARD0_N, GPIO_FN_AVB_RXD3,
-+	GPIO_FN_MII_RXD3, GPIO_FN_VI0_DATA2_VI0_B2, GPIO_FN_ATAWR0_N,
-+	GPIO_FN_AVB_RXD4, GPIO_FN_VI0_DATA3_VI0_B3, GPIO_FN_ATADIR0_N,
-+	GPIO_FN_AVB_RXD5, GPIO_FN_VI0_DATA4_VI0_B4, GPIO_FN_ATAG0_N,
-+	GPIO_FN_AVB_RXD6, GPIO_FN_VI0_DATA5_VI0_B5, GPIO_FN_EX_WAIT1,
-+	GPIO_FN_AVB_RXD7, GPIO_FN_VI0_DATA6_VI0_B6, GPIO_FN_AVB_RX_ER,
-+	GPIO_FN_MII_RX_ER, GPIO_FN_VI0_DATA7_VI0_B7, GPIO_FN_AVB_RX_CLK,
-+	GPIO_FN_MII_RX_CLK, GPIO_FN_VI1_CLK, GPIO_FN_AVB_RX_DV,
-+	GPIO_FN_MII_RX_DV, GPIO_FN_VI1_DATA0_VI1_B0, GPIO_FN_SCIFA1_SCK_D,
-+	GPIO_FN_AVB_CRS, GPIO_FN_MII_CRS, GPIO_FN_VI1_DATA1_VI1_B1,
-+	GPIO_FN_SCIFA1_RXD_D, GPIO_FN_AVB_MDC, GPIO_FN_MII_MDC,
-+	GPIO_FN_VI1_DATA2_VI1_B2, GPIO_FN_SCIFA1_TXD_D, GPIO_FN_AVB_MDIO,
-+	GPIO_FN_MII_MDIO, GPIO_FN_VI1_DATA3_VI1_B3, GPIO_FN_SCIFA1_CTS_N_D,
-+	GPIO_FN_AVB_GTX_CLK, GPIO_FN_VI1_DATA4_VI1_B4, GPIO_FN_SCIFA1_RTS_N_D,
-+	GPIO_FN_AVB_MAGIC, GPIO_FN_MII_MAGIC, GPIO_FN_VI1_DATA5_VI1_B5,
-+	GPIO_FN_AVB_PHY_INT, GPIO_FN_VI1_DATA6_VI1_B6, GPIO_FN_AVB_GTXREFCLK,
-+	GPIO_FN_SD0_CLK, GPIO_FN_VI1_DATA0_VI1_B0_B, GPIO_FN_SD0_CMD,
-+	GPIO_FN_SCIFB1_SCK_B, GPIO_FN_VI1_DATA1_VI1_B1_B,
-+
-+	/* IPSR9 */
-+	GPIO_FN_SD0_DAT0, GPIO_FN_SCIFB1_RXD_B, GPIO_FN_VI1_DATA2_VI1_B2_B,
-+	GPIO_FN_SD0_DAT1, GPIO_FN_SCIFB1_TXD_B, GPIO_FN_VI1_DATA3_VI1_B3_B,
-+	GPIO_FN_SD0_DAT2, GPIO_FN_SCIFB1_CTS_N_B, GPIO_FN_VI1_DATA4_VI1_B4_B,
-+	GPIO_FN_SD0_DAT3, GPIO_FN_SCIFB1_RTS_N_B, GPIO_FN_VI1_DATA5_VI1_B5_B,
-+	GPIO_FN_SD0_CD, GPIO_FN_MMC0_D6, GPIO_FN_TS_SDEN0_B, GPIO_FN_USB0_EXTP,
-+	GPIO_FN_GLO_SCLK, GPIO_FN_VI1_DATA6_VI1_B6_B, GPIO_FN_SCL1_B,
-+	GPIO_FN_SCL1_CIS_B, GPIO_FN_VI2_DATA6_VI2_B6_B, GPIO_FN_SD0_WP,
-+	GPIO_FN_MMC0_D7, GPIO_FN_TS_SPSYNC0_B, GPIO_FN_USB0_IDIN,
-+	GPIO_FN_GLO_SDATA, GPIO_FN_VI1_DATA7_VI1_B7_B, GPIO_FN_SDA1_B,
-+	GPIO_FN_SDA1_CIS_B, GPIO_FN_VI2_DATA7_VI2_B7_B, GPIO_FN_SD1_CLK,
-+	GPIO_FN_AVB_TX_EN, GPIO_FN_MII_TX_EN, GPIO_FN_SD1_CMD,
-+	GPIO_FN_AVB_TX_ER, GPIO_FN_MII_TX_ER, GPIO_FN_SCIFB0_SCK_B,
-+	GPIO_FN_SD1_DAT0, GPIO_FN_AVB_TX_CLK, GPIO_FN_MII_TX_CLK,
-+	GPIO_FN_SCIFB0_RXD_B, GPIO_FN_SD1_DAT1, GPIO_FN_AVB_LINK,
-+	GPIO_FN_MII_LINK, GPIO_FN_SCIFB0_TXD_B, GPIO_FN_SD1_DAT2,
-+	GPIO_FN_AVB_COL, GPIO_FN_MII_COL, GPIO_FN_SCIFB0_CTS_N_B,
-+	GPIO_FN_SD1_DAT3, GPIO_FN_AVB_RXD0, GPIO_FN_MII_RXD0,
-+	GPIO_FN_SCIFB0_RTS_N_B, GPIO_FN_SD1_CD, GPIO_FN_MMC1_D6,
-+	GPIO_FN_TS_SDEN1, GPIO_FN_USB1_EXTP, GPIO_FN_GLO_SS, GPIO_FN_VI0_CLK_B,
-+	GPIO_FN_SCL2_D, GPIO_FN_SCL2_CIS_D, GPIO_FN_SIM0_CLK_B,
-+	GPIO_FN_VI3_CLK_B,
-+
-+	/* IPSR10 */
-+	GPIO_FN_SD1_WP, GPIO_FN_MMC1_D7, GPIO_FN_TS_SPSYNC1, GPIO_FN_USB1_IDIN,
-+	GPIO_FN_GLO_RFON, GPIO_FN_VI1_CLK_B, GPIO_FN_SDA2_D, GPIO_FN_SDA2_CIS_D,
-+	GPIO_FN_SIM0_D_B, GPIO_FN_SD2_CLK, GPIO_FN_MMC0_CLK, GPIO_FN_SIM0_CLK,
-+	GPIO_FN_VI0_DATA0_VI0_B0_B, GPIO_FN_TS_SDEN0_C, GPIO_FN_GLO_SCLK_B,
-+	GPIO_FN_VI3_DATA0_B, GPIO_FN_SD2_CMD, GPIO_FN_MMC0_CMD, GPIO_FN_SIM0_D,
-+	GPIO_FN_VI0_DATA1_VI0_B1_B, GPIO_FN_SCIFB1_SCK_E, GPIO_FN_SCK1_D,
-+	GPIO_FN_TS_SPSYNC0_C, GPIO_FN_GLO_SDATA_B, GPIO_FN_VI3_DATA1_B,
-+	GPIO_FN_SD2_DAT0, GPIO_FN_MMC0_D0, GPIO_FN_FMCLK_B,
-+	GPIO_FN_VI0_DATA2_VI0_B2_B, GPIO_FN_SCIFB1_RXD_E, GPIO_FN_RX1_D,
-+	GPIO_FN_TS_SDAT0_C, GPIO_FN_GLO_SS_B, GPIO_FN_VI3_DATA2_B,
-+	GPIO_FN_SD2_DAT1, GPIO_FN_MMC0_D1, GPIO_FN_FMIN_B, GPIO_FN_RDS_DATA,
-+	GPIO_FN_VI0_DATA3_VI0_B3_B, GPIO_FN_SCIFB1_TXD_E, GPIO_FN_TX1_D,
-+	GPIO_FN_TS_SCK0_C, GPIO_FN_GLO_RFON_B, GPIO_FN_VI3_DATA3_B,
-+	GPIO_FN_SD2_DAT2, GPIO_FN_MMC0_D2, GPIO_FN_BPFCLK_B, GPIO_FN_RDS_CLK,
-+	GPIO_FN_VI0_DATA4_VI0_B4_B, GPIO_FN_HRX0_D, GPIO_FN_TS_SDEN1_B,
-+	GPIO_FN_GLO_Q0_B, GPIO_FN_VI3_DATA4_B, GPIO_FN_SD2_DAT3,
-+	GPIO_FN_MMC0_D3, GPIO_FN_SIM0_RST, GPIO_FN_VI0_DATA5_VI0_B5_B,
-+	GPIO_FN_HTX0_D, GPIO_FN_TS_SPSYNC1_B, GPIO_FN_GLO_Q1_B,
-+	GPIO_FN_VI3_DATA5_B, GPIO_FN_SD2_CD, GPIO_FN_MMC0_D4,
-+	GPIO_FN_TS_SDAT0_B, GPIO_FN_USB2_EXTP, GPIO_FN_GLO_I0,
-+	GPIO_FN_VI0_DATA6_VI0_B6_B, GPIO_FN_HCTS0_N_D, GPIO_FN_TS_SDAT1_B,
-+	GPIO_FN_GLO_I0_B, GPIO_FN_VI3_DATA6_B,
-+
-+	/* IPSR11 */
-+	GPIO_FN_SD2_WP, GPIO_FN_MMC0_D5, GPIO_FN_TS_SCK0_B, GPIO_FN_USB2_IDIN,
-+	GPIO_FN_GLO_I1, GPIO_FN_VI0_DATA7_VI0_B7_B, GPIO_FN_HRTS0_N_D,
-+	GPIO_FN_TS_SCK1_B, GPIO_FN_GLO_I1_B, GPIO_FN_VI3_DATA7_B,
-+	GPIO_FN_SD3_CLK, GPIO_FN_MMC1_CLK, GPIO_FN_SD3_CMD, GPIO_FN_MMC1_CMD,
-+	GPIO_FN_MTS_N, GPIO_FN_SD3_DAT0, GPIO_FN_MMC1_D0, GPIO_FN_STM_N,
-+	GPIO_FN_SD3_DAT1, GPIO_FN_MMC1_D1, GPIO_FN_MDATA, GPIO_FN_SD3_DAT2,
-+	GPIO_FN_MMC1_D2, GPIO_FN_SDATA, GPIO_FN_SD3_DAT3, GPIO_FN_MMC1_D3,
-+	GPIO_FN_SCKZ, GPIO_FN_SD3_CD, GPIO_FN_MMC1_D4, GPIO_FN_TS_SDAT1,
-+	GPIO_FN_VSP, GPIO_FN_GLO_Q0, GPIO_FN_SIM0_RST_B, GPIO_FN_SD3_WP,
-+	GPIO_FN_MMC1_D5, GPIO_FN_TS_SCK1, GPIO_FN_GLO_Q1, GPIO_FN_FMIN_C,
-+	GPIO_FN_RDS_DATA_B, GPIO_FN_FMIN_E, GPIO_FN_RDS_DATA_D, GPIO_FN_FMIN_F,
-+	GPIO_FN_RDS_DATA_E, GPIO_FN_MLB_CLK, GPIO_FN_SCL2_B, GPIO_FN_SCL2_CIS_B,
-+	GPIO_FN_MLB_SIG, GPIO_FN_SCIFB1_RXD_D, GPIO_FN_RX1_C, GPIO_FN_SDA2_B,
-+	GPIO_FN_SDA2_CIS_B, GPIO_FN_MLB_DAT, GPIO_FN_SPV_EVEN,
-+	GPIO_FN_SCIFB1_TXD_D, GPIO_FN_TX1_C, GPIO_FN_BPFCLK_C,
-+	GPIO_FN_RDS_CLK_B, GPIO_FN_SSI_SCK0129, GPIO_FN_CAN_CLK_B,
-+	GPIO_FN_MOUT0,
-+
-+	/* IPSR12 */
-+	GPIO_FN_SSI_WS0129, GPIO_FN_CAN0_TX_B, GPIO_FN_MOUT1,
-+	GPIO_FN_SSI_SDATA0, GPIO_FN_CAN0_RX_B, GPIO_FN_MOUT2,
-+	GPIO_FN_SSI_SDATA1, GPIO_FN_CAN1_TX_B, GPIO_FN_MOUT5,
-+	GPIO_FN_SSI_SDATA2, GPIO_FN_CAN1_RX_B, GPIO_FN_SSI_SCK1, GPIO_FN_MOUT6,
-+	GPIO_FN_SSI_SCK34, GPIO_FN_STP_OPWM_0, GPIO_FN_SCIFB0_SCK,
-+	GPIO_FN_MSIOF1_SCK, GPIO_FN_CAN_DEBUG_HW_TRIGGER, GPIO_FN_SSI_WS34,
-+	GPIO_FN_STP_IVCXO27_0, GPIO_FN_SCIFB0_RXD, GPIO_FN_MSIOF1_SYNC,
-+	GPIO_FN_CAN_STEP0, GPIO_FN_SSI_SDATA3, GPIO_FN_STP_ISCLK_0,
-+	GPIO_FN_SCIFB0_TXD, GPIO_FN_MSIOF1_SS1, GPIO_FN_CAN_TXCLK,
-+	GPIO_FN_SSI_SCK4, GPIO_FN_STP_ISD_0, GPIO_FN_SCIFB0_CTS_N,
-+	GPIO_FN_MSIOF1_SS2, GPIO_FN_SSI_SCK5_C, GPIO_FN_CAN_DEBUGOUT0,
-+	GPIO_FN_SSI_WS4, GPIO_FN_STP_ISEN_0, GPIO_FN_SCIFB0_RTS_N,
-+	GPIO_FN_MSIOF1_TXD, GPIO_FN_SSI_WS5_C, GPIO_FN_CAN_DEBUGOUT1,
-+	GPIO_FN_SSI_SDATA4, GPIO_FN_STP_ISSYNC_0, GPIO_FN_MSIOF1_RXD,
-+	GPIO_FN_CAN_DEBUGOUT2, GPIO_FN_SSI_SCK5, GPIO_FN_SCIFB1_SCK,
-+	GPIO_FN_IERX_B, GPIO_FN_DU2_EXHSYNC_DU2_HSYNC, GPIO_FN_QSTH_QHS,
-+	GPIO_FN_CAN_DEBUGOUT3, GPIO_FN_SSI_WS5, GPIO_FN_SCIFB1_RXD,
-+	GPIO_FN_IECLK_B, GPIO_FN_DU2_EXVSYNC_DU2_VSYNC, GPIO_FN_QSTB_QHE,
-+	GPIO_FN_CAN_DEBUGOUT4,
-+
-+	/* IPSR13 */
-+	GPIO_FN_SSI_SDATA5, GPIO_FN_SCIFB1_TXD, GPIO_FN_IETX_B, GPIO_FN_DU2_DR2,
-+	GPIO_FN_LCDOUT2, GPIO_FN_CAN_DEBUGOUT5, GPIO_FN_SSI_SCK6,
-+	GPIO_FN_SCIFB1_CTS_N, GPIO_FN_BPFCLK_D, GPIO_FN_RDS_CLK_C,
-+	GPIO_FN_DU2_DR3, GPIO_FN_LCDOUT3, GPIO_FN_CAN_DEBUGOUT6,
-+	GPIO_FN_BPFCLK_F, GPIO_FN_RDS_CLK_E, GPIO_FN_SSI_WS6,
-+	GPIO_FN_SCIFB1_RTS_N, GPIO_FN_CAN0_TX_D, GPIO_FN_DU2_DR4,
-+	GPIO_FN_LCDOUT4, GPIO_FN_CAN_DEBUGOUT7, GPIO_FN_SSI_SDATA6,
-+	GPIO_FN_FMIN_D, GPIO_FN_RDS_DATA_C, GPIO_FN_DU2_DR5, GPIO_FN_LCDOUT5,
-+	GPIO_FN_CAN_DEBUGOUT8, GPIO_FN_SSI_SCK78, GPIO_FN_STP_IVCXO27_1,
-+	GPIO_FN_SCK1, GPIO_FN_SCIFA1_SCK, GPIO_FN_DU2_DR6, GPIO_FN_LCDOUT6,
-+	GPIO_FN_CAN_DEBUGOUT9, GPIO_FN_SSI_WS78, GPIO_FN_STP_ISCLK_1,
-+	GPIO_FN_SCIFB2_SCK, GPIO_FN_SCIFA2_CTS_N, GPIO_FN_DU2_DR7,
-+	GPIO_FN_LCDOUT7, GPIO_FN_CAN_DEBUGOUT10, GPIO_FN_SSI_SDATA7,
-+	GPIO_FN_STP_ISD_1, GPIO_FN_SCIFB2_RXD, GPIO_FN_SCIFA2_RTS_N,
-+	GPIO_FN_TCLK2, GPIO_FN_QSTVA_QVS, GPIO_FN_CAN_DEBUGOUT11,
-+	GPIO_FN_BPFCLK_E, GPIO_FN_RDS_CLK_D, GPIO_FN_SSI_SDATA7_B,
-+	GPIO_FN_FMIN_G, GPIO_FN_RDS_DATA_F, GPIO_FN_SSI_SDATA8,
-+	GPIO_FN_STP_ISEN_1, GPIO_FN_SCIFB2_TXD, GPIO_FN_CAN0_TX_C,
-+	GPIO_FN_CAN_DEBUGOUT12, GPIO_FN_SSI_SDATA8_B, GPIO_FN_SSI_SDATA9,
-+	GPIO_FN_STP_ISSYNC_1, GPIO_FN_SCIFB2_CTS_N, GPIO_FN_SSI_WS1,
-+	GPIO_FN_SSI_SDATA5_C, GPIO_FN_CAN_DEBUGOUT13, GPIO_FN_AUDIO_CLKA,
-+	GPIO_FN_SCIFB2_RTS_N, GPIO_FN_CAN_DEBUGOUT14,
-+
-+	/* IPSR14 */
-+	GPIO_FN_AUDIO_CLKB, GPIO_FN_SCIF_CLK, GPIO_FN_CAN0_RX_D,
-+	GPIO_FN_DVC_MUTE, GPIO_FN_CAN0_RX_C, GPIO_FN_CAN_DEBUGOUT15,
-+	GPIO_FN_REMOCON, GPIO_FN_SCIFA0_SCK, GPIO_FN_HSCK1, GPIO_FN_SCK0,
-+	GPIO_FN_MSIOF3_SS2, GPIO_FN_DU2_DG2, GPIO_FN_LCDOUT10, GPIO_FN_SDA1_C,
-+	GPIO_FN_SDA1_CIS_C, GPIO_FN_SCIFA0_RXD, GPIO_FN_HRX1, GPIO_FN_RX0,
-+	GPIO_FN_DU2_DR0, GPIO_FN_LCDOUT0, GPIO_FN_SCIFA0_TXD, GPIO_FN_HTX1,
-+	GPIO_FN_TX0, GPIO_FN_DU2_DR1, GPIO_FN_LCDOUT1, GPIO_FN_SCIFA0_CTS_N,
-+	GPIO_FN_HCTS1_N, GPIO_FN_CTS0_N, GPIO_FN_MSIOF3_SYNC, GPIO_FN_DU2_DG3,
-+	GPIO_FN_LCDOUT11, GPIO_FN_PWM0_B, GPIO_FN_SCL1_C, GPIO_FN_SCL1_CIS_C,
-+	GPIO_FN_SCIFA0_RTS_N, GPIO_FN_HRTS1_N, GPIO_FN_RTS0_N_TANS,
-+	GPIO_FN_MSIOF3_SS1, GPIO_FN_DU2_DG0, GPIO_FN_LCDOUT8, GPIO_FN_PWM1_B,
-+	GPIO_FN_SCIFA1_RXD, GPIO_FN_AD_DI, GPIO_FN_RX1,
-+	GPIO_FN_DU2_EXODDF_DU2_ODDF_DISP_CDE, GPIO_FN_QCPV_QDE,
-+	GPIO_FN_SCIFA1_TXD, GPIO_FN_AD_DO, GPIO_FN_TX1, GPIO_FN_DU2_DG1,
-+	GPIO_FN_LCDOUT9, GPIO_FN_SCIFA1_CTS_N, GPIO_FN_AD_CLK,
-+	GPIO_FN_CTS1_N, GPIO_FN_MSIOF3_RXD, GPIO_FN_DU0_DOTCLKOUT, GPIO_FN_QCLK,
-+	GPIO_FN_SCIFA1_RTS_N, GPIO_FN_AD_NCS_N, GPIO_FN_RTS1_N_TANS,
-+	GPIO_FN_MSIOF3_TXD, GPIO_FN_DU1_DOTCLKOUT, GPIO_FN_QSTVB_QVE,
-+	GPIO_FN_HRTS0_N_C,
-+
-+	/* IPSR15 */
-+	GPIO_FN_SCIFA2_SCK, GPIO_FN_FMCLK, GPIO_FN_MSIOF3_SCK, GPIO_FN_DU2_DG7,
-+	GPIO_FN_LCDOUT15, GPIO_FN_SCIF_CLK_B, GPIO_FN_SCIFA2_RXD, GPIO_FN_FMIN,
-+	GPIO_FN_DU2_DB0, GPIO_FN_LCDOUT16, GPIO_FN_SCL2, GPIO_FN_SCL2_CIS,
-+	GPIO_FN_SCIFA2_TXD, GPIO_FN_BPFCLK, GPIO_FN_DU2_DB1, GPIO_FN_LCDOUT17,
-+	GPIO_FN_SDA2, GPIO_FN_SDA2_CIS, GPIO_FN_HSCK0, GPIO_FN_TS_SDEN0,
-+	GPIO_FN_DU2_DG4, GPIO_FN_LCDOUT12, GPIO_FN_HCTS0_N_C, GPIO_FN_HRX0,
-+	GPIO_FN_DU2_DB2, GPIO_FN_LCDOUT18, GPIO_FN_HTX0, GPIO_FN_DU2_DB3,
-+	GPIO_FN_LCDOUT19, GPIO_FN_HCTS0_N, GPIO_FN_SSI_SCK9, GPIO_FN_DU2_DB4,
-+	GPIO_FN_LCDOUT20, GPIO_FN_HRTS0_N, GPIO_FN_SSI_WS9, GPIO_FN_DU2_DB5,
-+	GPIO_FN_LCDOUT21, GPIO_FN_MSIOF0_SCK, GPIO_FN_TS_SDAT0, GPIO_FN_ADICLK,
-+	GPIO_FN_DU2_DB6, GPIO_FN_LCDOUT22, GPIO_FN_MSIOF0_SYNC, GPIO_FN_TS_SCK0,
-+	GPIO_FN_SSI_SCK2, GPIO_FN_ADIDATA, GPIO_FN_DU2_DB7, GPIO_FN_LCDOUT23,
-+	GPIO_FN_SCIFA2_RXD_B, GPIO_FN_MSIOF0_SS1, GPIO_FN_ADICHS0,
-+	GPIO_FN_DU2_DG5, GPIO_FN_LCDOUT13, GPIO_FN_MSIOF0_TXD, GPIO_FN_ADICHS1,
-+	GPIO_FN_DU2_DG6, GPIO_FN_LCDOUT14,
-+
-+	/* IPSR16 */
-+	GPIO_FN_MSIOF0_SS2, GPIO_FN_AUDIO_CLKOUT, GPIO_FN_ADICHS2,
-+	GPIO_FN_DU2_DISP, GPIO_FN_QPOLA, GPIO_FN_HTX0_C, GPIO_FN_SCIFA2_TXD_B,
-+	GPIO_FN_MSIOF0_RXD, GPIO_FN_TS_SPSYNC0, GPIO_FN_SSI_WS2,
-+	GPIO_FN_ADICS_SAMP, GPIO_FN_DU2_CDE, GPIO_FN_QPOLB, GPIO_FN_HRX0_C,
-+	GPIO_FN_USB1_PWEN, GPIO_FN_AUDIO_CLKOUT_D, GPIO_FN_USB1_OVC,
-+	GPIO_FN_TCLK1_B,
-+};
-+
- void r8a7790_add_standard_devices(void);
- void r8a7790_clock_init(void);
- void r8a7790_pinmux_init(void);
-diff --git a/drivers/pinctrl/sh-pfc/Kconfig b/drivers/pinctrl/sh-pfc/Kconfig
-index f8a2ae41..9f0217bc 100644
---- a/drivers/pinctrl/sh-pfc/Kconfig
-+++ b/drivers/pinctrl/sh-pfc/Kconfig
-@@ -37,6 +37,11 @@ config PINCTRL_PFC_R8A7779
- 	depends on ARCH_R8A7779
- 	select PINCTRL_SH_PFC
- 
-+config PINCTRL_PFC_R8A7790
-+	def_bool y
-+	depends on ARCH_R8A7790
-+	select PINCTRL_SH_PFC
-+
- config PINCTRL_PFC_SH7203
- 	def_bool y
- 	depends on CPU_SUBTYPE_SH7203
-diff --git a/drivers/pinctrl/sh-pfc/Makefile b/drivers/pinctrl/sh-pfc/Makefile
-index 211cd8e9..1cbf5b18 100644
---- a/drivers/pinctrl/sh-pfc/Makefile
-+++ b/drivers/pinctrl/sh-pfc/Makefile
-@@ -6,6 +6,7 @@ obj-$(CONFIG_PINCTRL_SH_PFC)	+= sh-pfc.o
- obj-$(CONFIG_PINCTRL_PFC_R8A73A4)	+= pfc-r8a73a4.o
- obj-$(CONFIG_PINCTRL_PFC_R8A7740)	+= pfc-r8a7740.o
- obj-$(CONFIG_PINCTRL_PFC_R8A7779)	+= pfc-r8a7779.o
-+obj-$(CONFIG_PINCTRL_PFC_R8A7790)	+= pfc-r8a7790.o
- obj-$(CONFIG_PINCTRL_PFC_SH7203)	+= pfc-sh7203.o
- obj-$(CONFIG_PINCTRL_PFC_SH7264)	+= pfc-sh7264.o
- obj-$(CONFIG_PINCTRL_PFC_SH7269)	+= pfc-sh7269.o
-diff --git a/drivers/pinctrl/sh-pfc/core.c b/drivers/pinctrl/sh-pfc/core.c
-index b5513369..db0d6f7a 100644
---- a/drivers/pinctrl/sh-pfc/core.c
-+++ b/drivers/pinctrl/sh-pfc/core.c
-@@ -427,6 +427,9 @@ static const struct platform_device_id sh_pfc_id_table[] = {
- #ifdef CONFIG_PINCTRL_PFC_R8A7779
- 	{ "pfc-r8a7779", (kernel_ulong_t)&r8a7779_pinmux_info },
- #endif
-+#ifdef CONFIG_PINCTRL_PFC_R8A7790
-+	{ "pfc-r8a7790", (kernel_ulong_t)&r8a7790_pinmux_info },
-+#endif
- #ifdef CONFIG_PINCTRL_PFC_SH7203
- 	{ "pfc-sh7203", (kernel_ulong_t)&sh7203_pinmux_info },
- #endif
-diff --git a/drivers/pinctrl/sh-pfc/core.h b/drivers/pinctrl/sh-pfc/core.h
-index 89cb4289..ee4a4d6d 100644
---- a/drivers/pinctrl/sh-pfc/core.h
-+++ b/drivers/pinctrl/sh-pfc/core.h
-@@ -57,6 +57,7 @@ int sh_pfc_config_mux(struct sh_pfc *pfc, unsigned mark, int pinmux_type);
- extern const struct sh_pfc_soc_info r8a73a4_pinmux_info;
- extern const struct sh_pfc_soc_info r8a7740_pinmux_info;
- extern const struct sh_pfc_soc_info r8a7779_pinmux_info;
-+extern const struct sh_pfc_soc_info r8a7790_pinmux_info;
- extern const struct sh_pfc_soc_info sh7203_pinmux_info;
- extern const struct sh_pfc_soc_info sh7264_pinmux_info;
- extern const struct sh_pfc_soc_info sh7269_pinmux_info;
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-new file mode 100644
-index 00000000..42b0c551
---- /dev/null
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-@@ -0,0 +1,3238 @@
-+/*
-+ * R8A7790 processor support
-+ *
-+ * Copyright (C) 2013  Renesas Electronics Corporation
-+ * Copyright (C) 2013  Magnus Damm
-+ * Copyright (C) 2012  Renesas Solutions Corp.
-+ * Copyright (C) 2012  Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; version 2 of the
-+ * License.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
-+ */
-+#include <linux/kernel.h>
-+#include <mach/r8a7790.h>
-+
-+#include "core.h"
-+#include "sh_pfc.h"
-+
-+#define CPU_32_PORT(fn, pfx, sfx)				\
-+	PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx),	\
-+	PORT_10(fn, pfx##2, sfx), PORT_1(fn, pfx##30, sfx),	\
-+	PORT_1(fn, pfx##31, sfx)
-+
-+#define CPU_32_PORT1(fn, pfx, sfx)				\
-+	PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx),	\
-+	PORT_10(fn, pfx##2, sfx)
-+
-+#define CPU_32_PORT2(fn, pfx, sfx)				\
-+	PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx),	\
-+	PORT_10(fn, pfx##2, sfx)
-+
-+/* GP_0_0_DATA -> GP_5_31_DATA (except for GP1[30],GP1[31],GP2[30],GP2[31]) */
-+#define CPU_ALL_PORT(fn, pfx, sfx)				\
-+	CPU_32_PORT(fn, pfx##_0_, sfx),				\
-+	CPU_32_PORT1(fn, pfx##_1_, sfx),			\
-+	CPU_32_PORT2(fn, pfx##_2_, sfx),			\
-+	CPU_32_PORT(fn, pfx##_3_, sfx),				\
-+	CPU_32_PORT(fn, pfx##_4_, sfx),				\
-+	CPU_32_PORT(fn, pfx##_5_, sfx)				\
-+
-+#define _GP_GPIO(pfx, sfx) PINMUX_GPIO(GPIO_GP##pfx, GP##pfx##_DATA)
-+#define _GP_DATA(pfx, sfx) PINMUX_DATA(GP##pfx##_DATA, GP##pfx##_FN,	\
-+				       GP##pfx##_IN, GP##pfx##_OUT)
-+
-+#define _GP_INOUTSEL(pfx, sfx) GP##pfx##_IN, GP##pfx##_OUT
-+#define _GP_INDT(pfx, sfx) GP##pfx##_DATA
-+
-+#define GP_ALL(str)	CPU_ALL_PORT(_PORT_ALL, GP, str)
-+#define PINMUX_GPIO_GP_ALL()	CPU_ALL_PORT(_GP_GPIO, , unused)
-+#define PINMUX_DATA_GP_ALL()	CPU_ALL_PORT(_GP_DATA, , unused)
-+
-+
-+#define PORT_10_REV(fn, pfx, sfx)				\
-+	PORT_1(fn, pfx##9, sfx), PORT_1(fn, pfx##8, sfx),	\
-+	PORT_1(fn, pfx##7, sfx), PORT_1(fn, pfx##6, sfx),	\
-+	PORT_1(fn, pfx##5, sfx), PORT_1(fn, pfx##4, sfx),	\
-+	PORT_1(fn, pfx##3, sfx), PORT_1(fn, pfx##2, sfx),	\
-+	PORT_1(fn, pfx##1, sfx), PORT_1(fn, pfx##0, sfx)
-+
-+#define CPU_32_PORT_REV(fn, pfx, sfx)					\
-+	PORT_1(fn, pfx##31, sfx), PORT_1(fn, pfx##30, sfx),		\
-+	PORT_10_REV(fn, pfx##2, sfx), PORT_10_REV(fn, pfx##1, sfx),	\
-+	PORT_10_REV(fn, pfx, sfx)
-+
-+#define GP_INOUTSEL(bank) CPU_32_PORT_REV(_GP_INOUTSEL, _##bank##_, unused)
-+#define GP_INDT(bank) CPU_32_PORT_REV(_GP_INDT, _##bank##_, unused)
-+
-+#define PINMUX_IPSR_DATA(ipsr, fn) PINMUX_DATA(fn##_MARK, FN_##ipsr, FN_##fn)
-+#define PINMUX_IPSR_MODSEL_DATA(ipsr, fn, ms) PINMUX_DATA(fn##_MARK, FN_##ms, \
-+							  FN_##ipsr, FN_##fn)
-+
-+enum {
-+	PINMUX_RESERVED = 0,
-+
-+	PINMUX_DATA_BEGIN,
-+	GP_ALL(DATA),
-+	PINMUX_DATA_END,
-+
-+	PINMUX_INPUT_BEGIN,
-+	GP_ALL(IN),
-+	PINMUX_INPUT_END,
-+
-+	PINMUX_OUTPUT_BEGIN,
-+	GP_ALL(OUT),
-+	PINMUX_OUTPUT_END,
-+
-+	PINMUX_FUNCTION_BEGIN,
-+	GP_ALL(FN),
-+
-+	/* GPSR0 */
-+	FN_IP0_2_0, FN_IP0_5_3, FN_IP0_8_6, FN_IP0_11_9, FN_IP0_15_12,
-+	FN_IP0_19_16, FN_IP0_22_20, FN_IP0_26_23, FN_IP0_30_27,
-+	FN_IP1_3_0, FN_IP1_7_4, FN_IP1_11_8, FN_IP1_14_12,
-+	FN_IP1_17_15, FN_IP1_21_18, FN_IP1_25_22, FN_IP1_27_26,
-+	FN_IP1_29_28, FN_IP2_2_0, FN_IP2_5_3, FN_IP2_8_6, FN_IP2_11_9,
-+	FN_IP2_14_12, FN_IP2_17_15, FN_IP2_21_18, FN_IP2_25_22,
-+	FN_IP2_28_26, FN_IP3_3_0, FN_IP3_7_4, FN_IP3_11_8,
-+	FN_IP3_14_12, FN_IP3_17_15,
-+
-+	/* GPSR1 */
-+	FN_IP3_19_18, FN_IP3_22_20, FN_IP3_25_23, FN_IP3_28_26,
-+	FN_IP3_31_29, FN_IP4_2_0, FN_IP4_5_3, FN_IP4_8_6, FN_IP4_11_9,
-+	FN_IP4_14_12, FN_IP4_17_15, FN_IP4_20_18, FN_IP4_23_21,
-+	FN_IP4_26_24, FN_IP4_29_27, FN_IP5_2_0, FN_IP5_5_3, FN_IP5_9_6,
-+	FN_IP5_12_10, FN_IP5_14_13, FN_IP5_17_15, FN_IP5_20_18,
-+	FN_IP5_23_21, FN_IP5_26_24, FN_IP5_29_27, FN_IP6_2_0,
-+	FN_IP6_5_3, FN_IP6_8_6, FN_IP6_10_9, FN_IP6_13_11,
-+
-+	/* GPSR2 */
-+	FN_IP7_28_27, FN_IP7_30_29, FN_IP8_1_0, FN_IP8_3_2, FN_IP8_5_4,
-+	FN_IP8_7_6, FN_IP8_9_8, FN_IP8_11_10, FN_IP8_13_12, FN_IP8_15_14,
-+	FN_IP8_17_16, FN_IP8_19_18, FN_IP8_21_20, FN_IP8_23_22,
-+	FN_IP8_25_24, FN_IP8_26, FN_IP8_27, FN_VI1_DATA7_VI1_B7,
-+	FN_IP6_16_14, FN_IP6_19_17, FN_IP6_22_20, FN_IP6_25_23,
-+	FN_IP6_28_26, FN_IP6_31_29, FN_IP7_2_0, FN_IP7_5_3, FN_IP7_7_6,
-+	FN_IP7_9_8, FN_IP7_12_10, FN_IP7_15_13,
-+
-+	/* GPSR3 */
-+	FN_IP8_28, FN_IP8_30_29, FN_IP9_1_0, FN_IP9_3_2, FN_IP9_5_4,
-+	FN_IP9_7_6, FN_IP9_11_8, FN_IP9_15_12, FN_IP9_17_16, FN_IP9_19_18,
-+	FN_IP9_21_20, FN_IP9_23_22, FN_IP9_25_24, FN_IP9_27_26,
-+	FN_IP9_31_28, FN_IP10_3_0, FN_IP10_6_4, FN_IP10_10_7, FN_IP10_14_11,
-+	FN_IP10_18_15, FN_IP10_22_19, FN_IP10_25_23, FN_IP10_29_26,
-+	FN_IP11_3_0, FN_IP11_4, FN_IP11_6_5, FN_IP11_8_7, FN_IP11_10_9,
-+	FN_IP11_12_11, FN_IP11_14_13, FN_IP11_17_15, FN_IP11_21_18,
-+
-+	/* GPSR4 */
-+	FN_IP11_23_22, FN_IP11_26_24, FN_IP11_29_27, FN_IP11_31_30,
-+	FN_IP12_1_0, FN_IP12_3_2, FN_IP12_5_4, FN_IP12_7_6, FN_IP12_10_8,
-+	FN_IP12_13_11, FN_IP12_16_14, FN_IP12_19_17, FN_IP12_22_20,
-+	FN_IP12_24_23, FN_IP12_27_25, FN_IP12_30_28, FN_IP13_2_0,
-+	FN_IP13_6_3, FN_IP13_9_7, FN_IP13_12_10, FN_IP13_15_13,
-+	FN_IP13_18_16, FN_IP13_22_19, FN_IP13_25_23, FN_IP13_28_26,
-+	FN_IP13_30_29, FN_IP14_2_0, FN_IP14_5_3, FN_IP14_8_6, FN_IP14_11_9,
-+	FN_IP14_15_12, FN_IP14_18_16,
-+
-+	/* GPSR5 */
-+	FN_IP14_21_19, FN_IP14_24_22, FN_IP14_27_25, FN_IP14_30_28,
-+	FN_IP15_2_0, FN_IP15_5_3, FN_IP15_8_6, FN_IP15_11_9, FN_IP15_13_12,
-+	FN_IP15_15_14, FN_IP15_17_16, FN_IP15_19_18, FN_IP15_22_20,
-+	FN_IP15_25_23, FN_IP15_27_26, FN_IP15_29_28, FN_IP16_2_0,
-+	FN_IP16_5_3, FN_USB0_PWEN, FN_USB0_OVC_VBUS, FN_IP16_6, FN_IP16_7,
-+	FN_USB2_PWEN, FN_USB2_OVC, FN_AVS1, FN_AVS2, FN_DU_DOTCLKIN0,
-+	FN_IP7_26_25, FN_DU_DOTCLKIN2, FN_IP7_18_16, FN_IP7_21_19, FN_IP7_24_22,
-+
-+	/* IPSR0 */
-+	FN_D0, FN_MSIOF3_SCK_B, FN_VI3_DATA0, FN_VI0_G4, FN_VI0_G4_B,
-+	FN_D1, FN_MSIOF3_SYNC_B, FN_VI3_DATA1, FN_VI0_G5,
-+	FN_VI0_G5_B, FN_D2, FN_MSIOF3_RXD_B, FN_VI3_DATA2,
-+	FN_VI0_G6, FN_VI0_G6_B, FN_D3, FN_MSIOF3_TXD_B,
-+	FN_VI3_DATA3, FN_VI0_G7, FN_VI0_G7_B, FN_D4,
-+	FN_SCIFB1_RXD_F, FN_SCIFB0_RXD_C, FN_VI3_DATA4,
-+	FN_VI0_R0, FN_VI0_R0_B, FN_RX0_B, FN_D5,
-+	FN_SCIFB1_TXD_F, FN_SCIFB0_TXD_C, FN_VI3_DATA5,
-+	FN_VI0_R1, FN_VI0_R1_B, FN_TX0_B, FN_D6,
-+	FN_SCL2_C, FN_VI3_DATA6, FN_VI0_R2, FN_VI0_R2_B,
-+	FN_SCL2_CIS_C, FN_D7, FN_AD_DI_B, FN_SDA2_C,
-+	FN_VI3_DATA7, FN_VI0_R3, FN_VI0_R3_B, FN_SDA2_CIS_C,
-+	FN_D8, FN_SCIFA1_SCK_C, FN_AVB_TXD0, FN_MII_TXD0,
-+	FN_VI0_G0, FN_VI0_G0_B, FN_VI2_DATA0_VI2_B0,
-+
-+	/* IPSR1 */
-+	FN_D9, FN_SCIFA1_RXD_C, FN_AVB_TXD1, FN_MII_TXD1,
-+	FN_VI0_G1, FN_VI0_G1_B, FN_VI2_DATA1_VI2_B1, FN_D10,
-+	FN_SCIFA1_TXD_C, FN_AVB_TXD2, FN_MII_TXD2,
-+	FN_VI0_G2, FN_VI0_G2_B, FN_VI2_DATA2_VI2_B2, FN_D11,
-+	FN_SCIFA1_CTS_N_C, FN_AVB_TXD3, FN_MII_TXD3,
-+	FN_VI0_G3, FN_VI0_G3_B, FN_VI2_DATA3_VI2_B3,
-+	FN_D12, FN_SCIFA1_RTS_N_C, FN_AVB_TXD4,
-+	FN_VI0_HSYNC_N, FN_VI0_HSYNC_N_B, FN_VI2_DATA4_VI2_B4,
-+	FN_D13, FN_AVB_TXD5, FN_VI0_VSYNC_N,
-+	FN_VI0_VSYNC_N_B, FN_VI2_DATA5_VI2_B5, FN_D14,
-+	FN_SCIFB1_RXD_C, FN_AVB_TXD6, FN_RX1_B,
-+	FN_VI0_CLKENB, FN_VI0_CLKENB_B, FN_VI2_DATA6_VI2_B6,
-+	FN_D15, FN_SCIFB1_TXD_C, FN_AVB_TXD7, FN_TX1_B,
-+	FN_VI0_FIELD, FN_VI0_FIELD_B, FN_VI2_DATA7_VI2_B7,
-+	FN_A0, FN_PWM3, FN_A1, FN_PWM4,
-+
-+	/* IPSR2 */
-+	FN_A2, FN_PWM5, FN_MSIOF1_SS1_B, FN_A3,
-+	FN_PWM6, FN_MSIOF1_SS2_B, FN_A4, FN_MSIOF1_TXD_B,
-+	FN_TPU0TO0, FN_A5, FN_SCIFA1_TXD_B, FN_TPU0TO1,
-+	FN_A6, FN_SCIFA1_RTS_N_B, FN_TPU0TO2, FN_A7,
-+	FN_SCIFA1_SCK_B, FN_AUDIO_CLKOUT_B, FN_TPU0TO3,
-+	FN_A8, FN_SCIFA1_RXD_B, FN_SSI_SCK5_B, FN_VI0_R4,
-+	FN_VI0_R4_B, FN_SCIFB2_RXD_C, FN_VI2_DATA0_VI2_B0_B,
-+	FN_A9, FN_SCIFA1_CTS_N_B, FN_SSI_WS5_B, FN_VI0_R5,
-+	FN_VI0_R5_B, FN_SCIFB2_TXD_C, FN_VI2_DATA1_VI2_B1_B,
-+	FN_A10, FN_SSI_SDATA5_B, FN_MSIOF2_SYNC, FN_VI0_R6,
-+	FN_VI0_R6_B, FN_VI2_DATA2_VI2_B2_B,
-+
-+	/* IPSR3 */
-+	FN_A11, FN_SCIFB2_CTS_N_B, FN_MSIOF2_SCK, FN_VI1_R0,
-+	FN_VI1_R0_B, FN_VI2_G0, FN_VI2_DATA3_VI2_B3_B,
-+	FN_A12, FN_SCIFB2_RXD_B, FN_MSIOF2_TXD, FN_VI1_R1,
-+	FN_VI1_R1_B, FN_VI2_G1, FN_VI2_DATA4_VI2_B4_B,
-+	FN_A13, FN_SCIFB2_RTS_N_B, FN_EX_WAIT2,
-+	FN_MSIOF2_RXD, FN_VI1_R2, FN_VI1_R2_B, FN_VI2_G2,
-+	FN_VI2_DATA5_VI2_B5_B, FN_A14, FN_SCIFB2_TXD_B,
-+	FN_ATACS11_N, FN_MSIOF2_SS1, FN_A15, FN_SCIFB2_SCK_B,
-+	FN_ATARD1_N, FN_MSIOF2_SS2, FN_A16, FN_ATAWR1_N,
-+	FN_A17, FN_AD_DO_B, FN_ATADIR1_N, FN_A18,
-+	FN_AD_CLK_B, FN_ATAG1_N, FN_A19, FN_AD_NCS_N_B,
-+	FN_ATACS01_N, FN_EX_WAIT0_B, FN_A20, FN_SPCLK,
-+	FN_VI1_R3, FN_VI1_R3_B, FN_VI2_G4,
-+
-+	/* IPSR4 */
-+	FN_A21, FN_MOSI_IO0, FN_VI1_R4, FN_VI1_R4_B, FN_VI2_G5,
-+	FN_A22, FN_MISO_IO1, FN_VI1_R5, FN_VI1_R5_B,
-+	FN_VI2_G6, FN_A23, FN_IO2, FN_VI1_G7,
-+	FN_VI1_G7_B, FN_VI2_G7, FN_A24, FN_IO3,
-+	FN_VI1_R7, FN_VI1_R7_B, FN_VI2_CLKENB,
-+	FN_VI2_CLKENB_B, FN_A25, FN_SSL, FN_VI1_G6,
-+	FN_VI1_G6_B, FN_VI2_FIELD, FN_VI2_FIELD_B, FN_CS0_N,
-+	FN_VI1_R6, FN_VI1_R6_B, FN_VI2_G3, FN_MSIOF0_SS2_B,
-+	FN_CS1_N_A26, FN_SPEEDIN, FN_VI0_R7, FN_VI0_R7_B,
-+	FN_VI2_CLK, FN_VI2_CLK_B, FN_EX_CS0_N, FN_HRX1_B,
-+	FN_VI1_G5, FN_VI1_G5_B, FN_VI2_R0, FN_HTX0_B,
-+	FN_MSIOF0_SS1_B, FN_EX_CS1_N, FN_GPS_CLK,
-+	FN_HCTS1_N_B, FN_VI1_FIELD, FN_VI1_FIELD_B,
-+	FN_VI2_R1, FN_EX_CS2_N, FN_GPS_SIGN, FN_HRTS1_N_B,
-+	FN_VI3_CLKENB, FN_VI1_G0, FN_VI1_G0_B, FN_VI2_R2,
-+
-+	/* IPSR5 */
-+	FN_EX_CS3_N, FN_GPS_MAG, FN_VI3_FIELD, FN_VI1_G1, FN_VI1_G1_B,
-+	FN_VI2_R3, FN_EX_CS4_N, FN_MSIOF1_SCK_B, FN_VI3_HSYNC_N,
-+	FN_VI2_HSYNC_N, FN_SCL1, FN_VI2_HSYNC_N_B,
-+	FN_INTC_EN0_N, FN_SCL1_CIS, FN_EX_CS5_N, FN_CAN0_RX,
-+	FN_MSIOF1_RXD_B, FN_VI3_VSYNC_N, FN_VI1_G2,
-+	FN_VI1_G2_B, FN_VI2_R4, FN_SDA1, FN_INTC_EN1_N,
-+	FN_SDA1_CIS, FN_BS_N, FN_IETX, FN_HTX1_B,
-+	FN_CAN1_TX, FN_DRACK0, FN_IETX_C, FN_RD_N,
-+	FN_CAN0_TX, FN_SCIFA0_SCK_B, FN_RD_WR_N, FN_VI1_G3,
-+	FN_VI1_G3_B, FN_VI2_R5, FN_SCIFA0_RXD_B,
-+	FN_INTC_IRQ4_N, FN_WE0_N, FN_IECLK, FN_CAN_CLK,
-+	FN_VI2_VSYNC_N, FN_SCIFA0_TXD_B, FN_VI2_VSYNC_N_B,
-+	FN_WE1_N, FN_IERX, FN_CAN1_RX, FN_VI1_G4,
-+	FN_VI1_G4_B, FN_VI2_R6, FN_SCIFA0_CTS_N_B,
-+	FN_IERX_C, FN_EX_WAIT0, FN_IRQ3, FN_INTC_IRQ3_N,
-+	FN_VI3_CLK, FN_SCIFA0_RTS_N_B, FN_HRX0_B,
-+	FN_MSIOF0_SCK_B, FN_DREQ0_N, FN_VI1_HSYNC_N,
-+	FN_VI1_HSYNC_N_B, FN_VI2_R7, FN_SSI_SCK78_C,
-+	FN_SSI_WS78_B,
-+
-+	/* IPSR6 */
-+	FN_DACK0, FN_IRQ0, FN_INTC_IRQ0_N, FN_SSI_SCK6_B,
-+	FN_VI1_VSYNC_N, FN_VI1_VSYNC_N_B, FN_SSI_WS78_C,
-+	FN_DREQ1_N, FN_VI1_CLKENB, FN_VI1_CLKENB_B,
-+	FN_SSI_SDATA7_C, FN_SSI_SCK78_B, FN_DACK1, FN_IRQ1,
-+	FN_INTC_IRQ1_N, FN_SSI_WS6_B, FN_SSI_SDATA8_C,
-+	FN_DREQ2_N, FN_HSCK1_B, FN_HCTS0_N_B,
-+	FN_MSIOF0_TXD_B, FN_DACK2, FN_IRQ2, FN_INTC_IRQ2_N,
-+	FN_SSI_SDATA6_B, FN_HRTS0_N_B, FN_MSIOF0_RXD_B,
-+	FN_ETH_CRS_DV, FN_RMII_CRS_DV, FN_STP_ISCLK_0_B,
-+	FN_TS_SDEN0_D, FN_GLO_Q0_C, FN_SCL2_E,
-+	FN_SCL2_CIS_E, FN_ETH_RX_ER, FN_RMII_RX_ER,
-+	FN_STP_ISD_0_B, FN_TS_SPSYNC0_D, FN_GLO_Q1_C,
-+	FN_SDA2_E, FN_SDA2_CIS_E, FN_ETH_RXD0, FN_RMII_RXD0,
-+	FN_STP_ISEN_0_B, FN_TS_SDAT0_D, FN_GLO_I0_C,
-+	FN_SCIFB1_SCK_G, FN_SCK1_E, FN_ETH_RXD1,
-+	FN_RMII_RXD1, FN_HRX0_E, FN_STP_ISSYNC_0_B,
-+	FN_TS_SCK0_D, FN_GLO_I1_C, FN_SCIFB1_RXD_G,
-+	FN_RX1_E, FN_ETH_LINK, FN_RMII_LINK, FN_HTX0_E,
-+	FN_STP_IVCXO27_0_B, FN_SCIFB1_TXD_G, FN_TX1_E,
-+	FN_ETH_REF_CLK, FN_RMII_REF_CLK, FN_HCTS0_N_E,
-+	FN_STP_IVCXO27_1_B, FN_HRX0_F,
-+
-+	/* IPSR7 */
-+	FN_ETH_MDIO, FN_RMII_MDIO, FN_HRTS0_N_E,
-+	FN_SIM0_D_C, FN_HCTS0_N_F, FN_ETH_TXD1,
-+	FN_RMII_TXD1, FN_HTX0_F, FN_BPFCLK_G, FN_RDS_CLK_F,
-+	FN_ETH_TX_EN, FN_RMII_TX_EN, FN_SIM0_CLK_C,
-+	FN_HRTS0_N_F, FN_ETH_MAGIC, FN_RMII_MAGIC,
-+	FN_SIM0_RST_C, FN_ETH_TXD0, FN_RMII_TXD0,
-+	FN_STP_ISCLK_1_B, FN_TS_SDEN1_C, FN_GLO_SCLK_C,
-+	FN_ETH_MDC, FN_RMII_MDC, FN_STP_ISD_1_B,
-+	FN_TS_SPSYNC1_C, FN_GLO_SDATA_C, FN_PWM0,
-+	FN_SCIFA2_SCK_C, FN_STP_ISEN_1_B, FN_TS_SDAT1_C,
-+	FN_GLO_SS_C, FN_PWM1, FN_SCIFA2_TXD_C,
-+	FN_STP_ISSYNC_1_B, FN_TS_SCK1_C, FN_GLO_RFON_C,
-+	FN_PCMOE_N, FN_PWM2, FN_PWMFSW0, FN_SCIFA2_RXD_C,
-+	FN_PCMWE_N, FN_IECLK_C, FN_DU1_DOTCLKIN,
-+	FN_AUDIO_CLKC, FN_AUDIO_CLKOUT_C, FN_VI0_CLK,
-+	FN_ATACS00_N, FN_AVB_RXD1, FN_MII_RXD1,
-+	FN_VI0_DATA0_VI0_B0, FN_ATACS10_N, FN_AVB_RXD2,
-+	FN_MII_RXD2,
-+
-+	/* IPSR8 */
-+	FN_VI0_DATA1_VI0_B1, FN_ATARD0_N, FN_AVB_RXD3,
-+	FN_MII_RXD3, FN_VI0_DATA2_VI0_B2, FN_ATAWR0_N,
-+	FN_AVB_RXD4, FN_VI0_DATA3_VI0_B3, FN_ATADIR0_N,
-+	FN_AVB_RXD5, FN_VI0_DATA4_VI0_B4, FN_ATAG0_N,
-+	FN_AVB_RXD6, FN_VI0_DATA5_VI0_B5, FN_EX_WAIT1,
-+	FN_AVB_RXD7, FN_VI0_DATA6_VI0_B6, FN_AVB_RX_ER,
-+	FN_MII_RX_ER, FN_VI0_DATA7_VI0_B7, FN_AVB_RX_CLK,
-+	FN_MII_RX_CLK, FN_VI1_CLK, FN_AVB_RX_DV,
-+	FN_MII_RX_DV, FN_VI1_DATA0_VI1_B0, FN_SCIFA1_SCK_D,
-+	FN_AVB_CRS, FN_MII_CRS, FN_VI1_DATA1_VI1_B1,
-+	FN_SCIFA1_RXD_D, FN_AVB_MDC, FN_MII_MDC,
-+	FN_VI1_DATA2_VI1_B2, FN_SCIFA1_TXD_D, FN_AVB_MDIO,
-+	FN_MII_MDIO, FN_VI1_DATA3_VI1_B3, FN_SCIFA1_CTS_N_D,
-+	FN_AVB_GTX_CLK, FN_VI1_DATA4_VI1_B4, FN_SCIFA1_RTS_N_D,
-+	FN_AVB_MAGIC, FN_MII_MAGIC, FN_VI1_DATA5_VI1_B5,
-+	FN_AVB_PHY_INT, FN_VI1_DATA6_VI1_B6, FN_AVB_GTXREFCLK,
-+	FN_SD0_CLK, FN_VI1_DATA0_VI1_B0_B, FN_SD0_CMD,
-+	FN_SCIFB1_SCK_B, FN_VI1_DATA1_VI1_B1_B,
-+
-+	/* IPSR9 */
-+	FN_SD0_DAT0, FN_SCIFB1_RXD_B, FN_VI1_DATA2_VI1_B2_B,
-+	FN_SD0_DAT1, FN_SCIFB1_TXD_B, FN_VI1_DATA3_VI1_B3_B,
-+	FN_SD0_DAT2, FN_SCIFB1_CTS_N_B, FN_VI1_DATA4_VI1_B4_B,
-+	FN_SD0_DAT3, FN_SCIFB1_RTS_N_B, FN_VI1_DATA5_VI1_B5_B,
-+	FN_SD0_CD, FN_MMC0_D6, FN_TS_SDEN0_B, FN_USB0_EXTP,
-+	FN_GLO_SCLK, FN_VI1_DATA6_VI1_B6_B, FN_SCL1_B,
-+	FN_SCL1_CIS_B, FN_VI2_DATA6_VI2_B6_B, FN_SD0_WP,
-+	FN_MMC0_D7, FN_TS_SPSYNC0_B, FN_USB0_IDIN,
-+	FN_GLO_SDATA, FN_VI1_DATA7_VI1_B7_B, FN_SDA1_B,
-+	FN_SDA1_CIS_B, FN_VI2_DATA7_VI2_B7_B, FN_SD1_CLK,
-+	FN_AVB_TX_EN, FN_MII_TX_EN, FN_SD1_CMD,
-+	FN_AVB_TX_ER, FN_MII_TX_ER, FN_SCIFB0_SCK_B,
-+	FN_SD1_DAT0, FN_AVB_TX_CLK, FN_MII_TX_CLK,
-+	FN_SCIFB0_RXD_B, FN_SD1_DAT1, FN_AVB_LINK,
-+	FN_MII_LINK, FN_SCIFB0_TXD_B, FN_SD1_DAT2,
-+	FN_AVB_COL, FN_MII_COL, FN_SCIFB0_CTS_N_B,
-+	FN_SD1_DAT3, FN_AVB_RXD0, FN_MII_RXD0,
-+	FN_SCIFB0_RTS_N_B, FN_SD1_CD, FN_MMC1_D6,
-+	FN_TS_SDEN1, FN_USB1_EXTP, FN_GLO_SS, FN_VI0_CLK_B,
-+	FN_SCL2_D, FN_SCL2_CIS_D, FN_SIM0_CLK_B,
-+	FN_VI3_CLK_B,
-+
-+	/* IPSR10 */
-+	FN_SD1_WP, FN_MMC1_D7, FN_TS_SPSYNC1, FN_USB1_IDIN,
-+	FN_GLO_RFON, FN_VI1_CLK_B, FN_SDA2_D, FN_SDA2_CIS_D,
-+	FN_SIM0_D_B, FN_SD2_CLK, FN_MMC0_CLK, FN_SIM0_CLK,
-+	FN_VI0_DATA0_VI0_B0_B, FN_TS_SDEN0_C, FN_GLO_SCLK_B,
-+	FN_VI3_DATA0_B, FN_SD2_CMD, FN_MMC0_CMD, FN_SIM0_D,
-+	FN_VI0_DATA1_VI0_B1_B, FN_SCIFB1_SCK_E, FN_SCK1_D,
-+	FN_TS_SPSYNC0_C, FN_GLO_SDATA_B, FN_VI3_DATA1_B,
-+	FN_SD2_DAT0, FN_MMC0_D0, FN_FMCLK_B,
-+	FN_VI0_DATA2_VI0_B2_B, FN_SCIFB1_RXD_E, FN_RX1_D,
-+	FN_TS_SDAT0_C, FN_GLO_SS_B, FN_VI3_DATA2_B,
-+	FN_SD2_DAT1, FN_MMC0_D1, FN_FMIN_B, FN_RDS_DATA,
-+	FN_VI0_DATA3_VI0_B3_B, FN_SCIFB1_TXD_E, FN_TX1_D,
-+	FN_TS_SCK0_C, FN_GLO_RFON_B, FN_VI3_DATA3_B,
-+	FN_SD2_DAT2, FN_MMC0_D2, FN_BPFCLK_B, FN_RDS_CLK,
-+	FN_VI0_DATA4_VI0_B4_B, FN_HRX0_D, FN_TS_SDEN1_B,
-+	FN_GLO_Q0_B, FN_VI3_DATA4_B, FN_SD2_DAT3,
-+	FN_MMC0_D3, FN_SIM0_RST, FN_VI0_DATA5_VI0_B5_B,
-+	FN_HTX0_D, FN_TS_SPSYNC1_B, FN_GLO_Q1_B,
-+	FN_VI3_DATA5_B, FN_SD2_CD, FN_MMC0_D4,
-+	FN_TS_SDAT0_B, FN_USB2_EXTP, FN_GLO_I0,
-+	FN_VI0_DATA6_VI0_B6_B, FN_HCTS0_N_D, FN_TS_SDAT1_B,
-+	FN_GLO_I0_B, FN_VI3_DATA6_B,
-+
-+	/* IPSR11 */
-+	FN_SD2_WP, FN_MMC0_D5, FN_TS_SCK0_B, FN_USB2_IDIN,
-+	FN_GLO_I1, FN_VI0_DATA7_VI0_B7_B, FN_HRTS0_N_D,
-+	FN_TS_SCK1_B, FN_GLO_I1_B, FN_VI3_DATA7_B,
-+	FN_SD3_CLK, FN_MMC1_CLK, FN_SD3_CMD, FN_MMC1_CMD,
-+	FN_MTS_N, FN_SD3_DAT0, FN_MMC1_D0, FN_STM_N,
-+	FN_SD3_DAT1, FN_MMC1_D1, FN_MDATA, FN_SD3_DAT2,
-+	FN_MMC1_D2, FN_SDATA, FN_SD3_DAT3, FN_MMC1_D3,
-+	FN_SCKZ, FN_SD3_CD, FN_MMC1_D4, FN_TS_SDAT1,
-+	FN_VSP, FN_GLO_Q0, FN_SIM0_RST_B, FN_SD3_WP,
-+	FN_MMC1_D5, FN_TS_SCK1, FN_GLO_Q1, FN_FMIN_C,
-+	FN_RDS_DATA_B, FN_FMIN_E, FN_RDS_DATA_D, FN_FMIN_F,
-+	FN_RDS_DATA_E, FN_MLB_CLK, FN_SCL2_B, FN_SCL2_CIS_B,
-+	FN_MLB_SIG, FN_SCIFB1_RXD_D, FN_RX1_C, FN_SDA2_B,
-+	FN_SDA2_CIS_B, FN_MLB_DAT, FN_SPV_EVEN,
-+	FN_SCIFB1_TXD_D, FN_TX1_C, FN_BPFCLK_C,
-+	FN_RDS_CLK_B, FN_SSI_SCK0129, FN_CAN_CLK_B,
-+	FN_MOUT0,
-+
-+	/* IPSR12 */
-+	FN_SSI_WS0129, FN_CAN0_TX_B, FN_MOUT1,
-+	FN_SSI_SDATA0, FN_CAN0_RX_B, FN_MOUT2,
-+	FN_SSI_SDATA1, FN_CAN1_TX_B, FN_MOUT5,
-+	FN_SSI_SDATA2, FN_CAN1_RX_B, FN_SSI_SCK1, FN_MOUT6,
-+	FN_SSI_SCK34, FN_STP_OPWM_0, FN_SCIFB0_SCK,
-+	FN_MSIOF1_SCK, FN_CAN_DEBUG_HW_TRIGGER, FN_SSI_WS34,
-+	FN_STP_IVCXO27_0, FN_SCIFB0_RXD, FN_MSIOF1_SYNC,
-+	FN_CAN_STEP0, FN_SSI_SDATA3, FN_STP_ISCLK_0,
-+	FN_SCIFB0_TXD, FN_MSIOF1_SS1, FN_CAN_TXCLK,
-+	FN_SSI_SCK4, FN_STP_ISD_0, FN_SCIFB0_CTS_N,
-+	FN_MSIOF1_SS2, FN_SSI_SCK5_C, FN_CAN_DEBUGOUT0,
-+	FN_SSI_WS4, FN_STP_ISEN_0, FN_SCIFB0_RTS_N,
-+	FN_MSIOF1_TXD, FN_SSI_WS5_C, FN_CAN_DEBUGOUT1,
-+	FN_SSI_SDATA4, FN_STP_ISSYNC_0, FN_MSIOF1_RXD,
-+	FN_CAN_DEBUGOUT2, FN_SSI_SCK5, FN_SCIFB1_SCK,
-+	FN_IERX_B, FN_DU2_EXHSYNC_DU2_HSYNC, FN_QSTH_QHS,
-+	FN_CAN_DEBUGOUT3, FN_SSI_WS5, FN_SCIFB1_RXD,
-+	FN_IECLK_B, FN_DU2_EXVSYNC_DU2_VSYNC, FN_QSTB_QHE,
-+	FN_CAN_DEBUGOUT4,
-+
-+	/* IPSR13 */
-+	FN_SSI_SDATA5, FN_SCIFB1_TXD, FN_IETX_B, FN_DU2_DR2,
-+	FN_LCDOUT2, FN_CAN_DEBUGOUT5, FN_SSI_SCK6,
-+	FN_SCIFB1_CTS_N, FN_BPFCLK_D, FN_RDS_CLK_C,
-+	FN_DU2_DR3, FN_LCDOUT3, FN_CAN_DEBUGOUT6,
-+	FN_BPFCLK_F, FN_RDS_CLK_E, FN_SSI_WS6,
-+	FN_SCIFB1_RTS_N, FN_CAN0_TX_D, FN_DU2_DR4,
-+	FN_LCDOUT4, FN_CAN_DEBUGOUT7, FN_SSI_SDATA6,
-+	FN_FMIN_D, FN_RDS_DATA_C, FN_DU2_DR5, FN_LCDOUT5,
-+	FN_CAN_DEBUGOUT8, FN_SSI_SCK78, FN_STP_IVCXO27_1,
-+	FN_SCK1, FN_SCIFA1_SCK, FN_DU2_DR6, FN_LCDOUT6,
-+	FN_CAN_DEBUGOUT9, FN_SSI_WS78, FN_STP_ISCLK_1,
-+	FN_SCIFB2_SCK, FN_SCIFA2_CTS_N, FN_DU2_DR7,
-+	FN_LCDOUT7, FN_CAN_DEBUGOUT10, FN_SSI_SDATA7,
-+	FN_STP_ISD_1, FN_SCIFB2_RXD, FN_SCIFA2_RTS_N,
-+	FN_TCLK2, FN_QSTVA_QVS, FN_CAN_DEBUGOUT11,
-+	FN_BPFCLK_E, FN_RDS_CLK_D, FN_SSI_SDATA7_B,
-+	FN_FMIN_G, FN_RDS_DATA_F, FN_SSI_SDATA8,
-+	FN_STP_ISEN_1, FN_SCIFB2_TXD, FN_CAN0_TX_C,
-+	FN_CAN_DEBUGOUT12, FN_SSI_SDATA8_B, FN_SSI_SDATA9,
-+	FN_STP_ISSYNC_1, FN_SCIFB2_CTS_N, FN_SSI_WS1,
-+	FN_SSI_SDATA5_C, FN_CAN_DEBUGOUT13, FN_AUDIO_CLKA,
-+	FN_SCIFB2_RTS_N, FN_CAN_DEBUGOUT14,
-+
-+	/* IPSR14 */
-+	FN_AUDIO_CLKB, FN_SCIF_CLK, FN_CAN0_RX_D,
-+	FN_DVC_MUTE, FN_CAN0_RX_C, FN_CAN_DEBUGOUT15,
-+	FN_REMOCON, FN_SCIFA0_SCK, FN_HSCK1, FN_SCK0,
-+	FN_MSIOF3_SS2, FN_DU2_DG2, FN_LCDOUT10, FN_SDA1_C,
-+	FN_SDA1_CIS_C, FN_SCIFA0_RXD, FN_HRX1, FN_RX0,
-+	FN_DU2_DR0, FN_LCDOUT0, FN_SCIFA0_TXD, FN_HTX1,
-+	FN_TX0, FN_DU2_DR1, FN_LCDOUT1, FN_SCIFA0_CTS_N,
-+	FN_HCTS1_N, FN_CTS0_N, FN_MSIOF3_SYNC, FN_DU2_DG3,
-+	FN_LCDOUT11, FN_PWM0_B, FN_SCL1_C, FN_SCL1_CIS_C,
-+	FN_SCIFA0_RTS_N, FN_HRTS1_N, FN_RTS0_N_TANS,
-+	FN_MSIOF3_SS1, FN_DU2_DG0, FN_LCDOUT8, FN_PWM1_B,
-+	FN_SCIFA1_RXD, FN_AD_DI, FN_RX1,
-+	FN_DU2_EXODDF_DU2_ODDF_DISP_CDE, FN_QCPV_QDE,
-+	FN_SCIFA1_TXD, FN_AD_DO, FN_TX1, FN_DU2_DG1,
-+	FN_LCDOUT9, FN_SCIFA1_CTS_N, FN_AD_CLK,
-+	FN_CTS1_N, FN_MSIOF3_RXD, FN_DU0_DOTCLKOUT, FN_QCLK,
-+	FN_SCIFA1_RTS_N, FN_AD_NCS_N, FN_RTS1_N_TANS,
-+	FN_MSIOF3_TXD, FN_DU1_DOTCLKOUT, FN_QSTVB_QVE,
-+	FN_HRTS0_N_C,
-+
-+	/* IPSR15 */
-+	FN_SCIFA2_SCK, FN_FMCLK, FN_MSIOF3_SCK, FN_DU2_DG7,
-+	FN_LCDOUT15, FN_SCIF_CLK_B, FN_SCIFA2_RXD, FN_FMIN,
-+	FN_DU2_DB0, FN_LCDOUT16, FN_SCL2, FN_SCL2_CIS,
-+	FN_SCIFA2_TXD, FN_BPFCLK, FN_DU2_DB1, FN_LCDOUT17,
-+	FN_SDA2, FN_SDA2_CIS, FN_HSCK0, FN_TS_SDEN0,
-+	FN_DU2_DG4, FN_LCDOUT12, FN_HCTS0_N_C, FN_HRX0,
-+	FN_DU2_DB2, FN_LCDOUT18, FN_HTX0, FN_DU2_DB3,
-+	FN_LCDOUT19, FN_HCTS0_N, FN_SSI_SCK9, FN_DU2_DB4,
-+	FN_LCDOUT20, FN_HRTS0_N, FN_SSI_WS9, FN_DU2_DB5,
-+	FN_LCDOUT21, FN_MSIOF0_SCK, FN_TS_SDAT0, FN_ADICLK,
-+	FN_DU2_DB6, FN_LCDOUT22, FN_MSIOF0_SYNC, FN_TS_SCK0,
-+	FN_SSI_SCK2, FN_ADIDATA, FN_DU2_DB7, FN_LCDOUT23,
-+	FN_SCIFA2_RXD_B, FN_MSIOF0_SS1, FN_ADICHS0,
-+	FN_DU2_DG5, FN_LCDOUT13, FN_MSIOF0_TXD, FN_ADICHS1,
-+	FN_DU2_DG6, FN_LCDOUT14,
-+
-+	/* IPSR16 */
-+	FN_MSIOF0_SS2, FN_AUDIO_CLKOUT, FN_ADICHS2,
-+	FN_DU2_DISP, FN_QPOLA, FN_HTX0_C, FN_SCIFA2_TXD_B,
-+	FN_MSIOF0_RXD, FN_TS_SPSYNC0, FN_SSI_WS2,
-+	FN_ADICS_SAMP, FN_DU2_CDE, FN_QPOLB, FN_HRX0_C,
-+	FN_USB1_PWEN, FN_AUDIO_CLKOUT_D, FN_USB1_OVC,
-+	FN_TCLK1_B,
-+
-+	FN_SEL_SCIF1_0, FN_SEL_SCIF1_1, FN_SEL_SCIF1_2, FN_SEL_SCIF1_3,
-+	FN_SEL_SCIF1_4,
-+	FN_SEL_SCIFB_0, FN_SEL_SCIFB_1, FN_SEL_SCIFB_2,
-+	FN_SEL_SCIFB2_0, FN_SEL_SCIFB2_1, FN_SEL_SCIFB2_2,
-+	FN_SEL_SCIFB1_0, FN_SEL_SCIFB1_1, FN_SEL_SCIFB1_2, FN_SEL_SCIFB1_3,
-+	FN_SEL_SCIFB1_4,
-+	FN_SEL_SCIFB1_5, FN_SEL_SCIFB1_6,
-+	FN_SEL_SCIFA1_0, FN_SEL_SCIFA1_1, FN_SEL_SCIFA1_2, FN_SEL_SCIFA1_3,
-+	FN_SEL_SCIF0_0, FN_SEL_SCIF0_1,
-+	FN_SEL_SCFA_0, FN_SEL_SCFA_1,
-+	FN_SEL_SOF1_0, FN_SEL_SOF1_1,
-+	FN_SEL_SSI7_0, FN_SEL_SSI7_1, FN_SEL_SSI7_2,
-+	FN_SEL_SSI6_0, FN_SEL_SSI6_1,
-+	FN_SEL_SSI5_0, FN_SEL_SSI5_1, FN_SEL_SSI5_2,
-+	FN_SEL_VI3_0, FN_SEL_VI3_1,
-+	FN_SEL_VI2_0, FN_SEL_VI2_1,
-+	FN_SEL_VI1_0, FN_SEL_VI1_1,
-+	FN_SEL_VI0_0, FN_SEL_VI0_1,
-+	FN_SEL_TSIF1_0, FN_SEL_TSIF1_1, FN_SEL_TSIF1_2,
-+	FN_SEL_LBS_0, FN_SEL_LBS_1,
-+	FN_SEL_TSIF0_0, FN_SEL_TSIF0_1, FN_SEL_TSIF0_2, FN_SEL_TSIF0_3,
-+	FN_SEL_SOF3_0, FN_SEL_SOF3_1,
-+	FN_SEL_SOF0_0, FN_SEL_SOF0_1,
-+
-+	FN_SEL_TMU1_0, FN_SEL_TMU1_1,
-+	FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1,
-+	FN_SEL_SCIFCLK_0, FN_SEL_SCIFCLK_1,
-+	FN_SEL_CAN0_0, FN_SEL_CAN0_1, FN_SEL_CAN0_2, FN_SEL_CAN0_3,
-+	FN_SEL_CANCLK_0, FN_SEL_CANCLK_1,
-+	FN_SEL_SCIFA2_0, FN_SEL_SCIFA2_1, FN_SEL_SCIFA2_2,
-+	FN_SEL_CAN1_0, FN_SEL_CAN1_1,
-+	FN_SEL_ADI_0, FN_SEL_ADI_1,
-+	FN_SEL_SSP_0, FN_SEL_SSP_1,
-+	FN_SEL_FM_0, FN_SEL_FM_1, FN_SEL_FM_2, FN_SEL_FM_3,
-+	FN_SEL_FM_4, FN_SEL_FM_5, FN_SEL_FM_6,
-+	FN_SEL_HSCIF0_0, FN_SEL_HSCIF0_1, FN_SEL_HSCIF0_2, FN_SEL_HSCIF0_3,
-+	FN_SEL_HSCIF0_4, FN_SEL_HSCIF0_5,
-+	FN_SEL_GPS_0, FN_SEL_GPS_1, FN_SEL_GPS_2,
-+	FN_SEL_RDS_0, FN_SEL_RDS_1, FN_SEL_RDS_2,
-+	FN_SEL_RDS_3, FN_SEL_RDS_4, FN_SEL_RDS_5,
-+	FN_SEL_SIM_0, FN_SEL_SIM_1, FN_SEL_SIM_2,
-+	FN_SEL_SSI8_0, FN_SEL_SSI8_1, FN_SEL_SSI8_2,
-+
-+	FN_SEL_IICDVFS_0, FN_SEL_IICDVFS_1,
-+	FN_SEL_IIC0_0, FN_SEL_IIC0_1,
-+	FN_SEL_IEB_0, FN_SEL_IEB_1, FN_SEL_IEB_2,
-+	FN_SEL_IIC2_0, FN_SEL_IIC2_1, FN_SEL_IIC2_2, FN_SEL_IIC2_3,
-+	FN_SEL_IIC2_4,
-+	FN_SEL_IIC1_0, FN_SEL_IIC1_1, FN_SEL_IIC1_2,
-+	FN_SEL_I2C2_0, FN_SEL_I2C2_1, FN_SEL_I2C2_2, FN_SEL_I2C2_3,
-+	FN_SEL_I2C2_4,
-+	FN_SEL_I2C1_0, FN_SEL_I2C1_1, FN_SEL_I2C1_2,
-+	PINMUX_FUNCTION_END,
-+
-+	PINMUX_MARK_BEGIN,
-+
-+	VI1_DATA7_VI1_B7_MARK,
-+
-+	USB0_PWEN_MARK, USB0_OVC_VBUS_MARK,
-+	USB2_PWEN_MARK, USB2_OVC_MARK, AVS1_MARK, AVS2_MARK,
-+	DU_DOTCLKIN0_MARK, DU_DOTCLKIN2_MARK,
-+
-+	D0_MARK, MSIOF3_SCK_B_MARK, VI3_DATA0_MARK, VI0_G4_MARK, VI0_G4_B_MARK,
-+	D1_MARK, MSIOF3_SYNC_B_MARK, VI3_DATA1_MARK, VI0_G5_MARK,
-+	VI0_G5_B_MARK, D2_MARK, MSIOF3_RXD_B_MARK, VI3_DATA2_MARK,
-+	VI0_G6_MARK, VI0_G6_B_MARK, D3_MARK, MSIOF3_TXD_B_MARK,
-+	VI3_DATA3_MARK, VI0_G7_MARK, VI0_G7_B_MARK, D4_MARK,
-+	SCIFB1_RXD_F_MARK, SCIFB0_RXD_C_MARK, VI3_DATA4_MARK,
-+	VI0_R0_MARK, VI0_R0_B_MARK, RX0_B_MARK, D5_MARK,
-+	SCIFB1_TXD_F_MARK, SCIFB0_TXD_C_MARK, VI3_DATA5_MARK,
-+	VI0_R1_MARK, VI0_R1_B_MARK, TX0_B_MARK, D6_MARK,
-+	SCL2_C_MARK, VI3_DATA6_MARK, VI0_R2_MARK, VI0_R2_B_MARK,
-+	SCL2_CIS_C_MARK, D7_MARK, AD_DI_B_MARK, SDA2_C_MARK,
-+	VI3_DATA7_MARK, VI0_R3_MARK, VI0_R3_B_MARK, SDA2_CIS_C_MARK,
-+	D8_MARK, SCIFA1_SCK_C_MARK, AVB_TXD0_MARK, MII_TXD0_MARK,
-+	VI0_G0_MARK, VI0_G0_B_MARK, VI2_DATA0_VI2_B0_MARK,
-+
-+	D9_MARK, SCIFA1_RXD_C_MARK, AVB_TXD1_MARK, MII_TXD1_MARK,
-+	VI0_G1_MARK, VI0_G1_B_MARK, VI2_DATA1_VI2_B1_MARK, D10_MARK,
-+	SCIFA1_TXD_C_MARK, AVB_TXD2_MARK, MII_TXD2_MARK,
-+	VI0_G2_MARK, VI0_G2_B_MARK, VI2_DATA2_VI2_B2_MARK, D11_MARK,
-+	SCIFA1_CTS_N_C_MARK, AVB_TXD3_MARK, MII_TXD3_MARK,
-+	VI0_G3_MARK, VI0_G3_B_MARK, VI2_DATA3_VI2_B3_MARK,
-+	D12_MARK, SCIFA1_RTS_N_C_MARK, AVB_TXD4_MARK,
-+	VI0_HSYNC_N_MARK, VI0_HSYNC_N_B_MARK, VI2_DATA4_VI2_B4_MARK,
-+	D13_MARK, AVB_TXD5_MARK, VI0_VSYNC_N_MARK,
-+	VI0_VSYNC_N_B_MARK, VI2_DATA5_VI2_B5_MARK, D14_MARK,
-+	SCIFB1_RXD_C_MARK, AVB_TXD6_MARK, RX1_B_MARK,
-+	VI0_CLKENB_MARK, VI0_CLKENB_B_MARK, VI2_DATA6_VI2_B6_MARK,
-+	D15_MARK, SCIFB1_TXD_C_MARK, AVB_TXD7_MARK, TX1_B_MARK,
-+	VI0_FIELD_MARK, VI0_FIELD_B_MARK, VI2_DATA7_VI2_B7_MARK,
-+	A0_MARK, PWM3_MARK, A1_MARK, PWM4_MARK,
-+
-+	A2_MARK, PWM5_MARK, MSIOF1_SS1_B_MARK, A3_MARK,
-+	PWM6_MARK, MSIOF1_SS2_B_MARK, A4_MARK, MSIOF1_TXD_B_MARK,
-+	TPU0TO0_MARK, A5_MARK, SCIFA1_TXD_B_MARK, TPU0TO1_MARK,
-+	A6_MARK, SCIFA1_RTS_N_B_MARK, TPU0TO2_MARK, A7_MARK,
-+	SCIFA1_SCK_B_MARK, AUDIO_CLKOUT_B_MARK, TPU0TO3_MARK,
-+	A8_MARK, SCIFA1_RXD_B_MARK, SSI_SCK5_B_MARK, VI0_R4_MARK,
-+	VI0_R4_B_MARK, SCIFB2_RXD_C_MARK, VI2_DATA0_VI2_B0_B_MARK,
-+	A9_MARK, SCIFA1_CTS_N_B_MARK, SSI_WS5_B_MARK, VI0_R5_MARK,
-+	VI0_R5_B_MARK, SCIFB2_TXD_C_MARK, VI2_DATA1_VI2_B1_B_MARK,
-+	A10_MARK, SSI_SDATA5_B_MARK, MSIOF2_SYNC_MARK, VI0_R6_MARK,
-+	VI0_R6_B_MARK, VI2_DATA2_VI2_B2_B_MARK,
-+
-+	A11_MARK, SCIFB2_CTS_N_B_MARK, MSIOF2_SCK_MARK, VI1_R0_MARK,
-+	VI1_R0_B_MARK, VI2_G0_MARK, VI2_DATA3_VI2_B3_B_MARK,
-+	A12_MARK, SCIFB2_RXD_B_MARK, MSIOF2_TXD_MARK, VI1_R1_MARK,
-+	VI1_R1_B_MARK, VI2_G1_MARK, VI2_DATA4_VI2_B4_B_MARK,
-+	A13_MARK, SCIFB2_RTS_N_B_MARK, EX_WAIT2_MARK,
-+	MSIOF2_RXD_MARK, VI1_R2_MARK, VI1_R2_B_MARK, VI2_G2_MARK,
-+	VI2_DATA5_VI2_B5_B_MARK, A14_MARK, SCIFB2_TXD_B_MARK,
-+	ATACS11_N_MARK, MSIOF2_SS1_MARK, A15_MARK, SCIFB2_SCK_B_MARK,
-+	ATARD1_N_MARK, MSIOF2_SS2_MARK, A16_MARK, ATAWR1_N_MARK,
-+	A17_MARK, AD_DO_B_MARK, ATADIR1_N_MARK, A18_MARK,
-+	AD_CLK_B_MARK, ATAG1_N_MARK, A19_MARK, AD_NCS_N_B_MARK,
-+	ATACS01_N_MARK, EX_WAIT0_B_MARK, A20_MARK, SPCLK_MARK,
-+	VI1_R3_MARK, VI1_R3_B_MARK, VI2_G4_MARK,
-+
-+	A21_MARK, MOSI_IO0_MARK, VI1_R4_MARK, VI1_R4_B_MARK, VI2_G5_MARK,
-+	A22_MARK, MISO_IO1_MARK, VI1_R5_MARK, VI1_R5_B_MARK,
-+	VI2_G6_MARK, A23_MARK, IO2_MARK, VI1_G7_MARK,
-+	VI1_G7_B_MARK, VI2_G7_MARK, A24_MARK, IO3_MARK,
-+	VI1_R7_MARK, VI1_R7_B_MARK, VI2_CLKENB_MARK,
-+	VI2_CLKENB_B_MARK, A25_MARK, SSL_MARK, VI1_G6_MARK,
-+	VI1_G6_B_MARK, VI2_FIELD_MARK, VI2_FIELD_B_MARK, CS0_N_MARK,
-+	VI1_R6_MARK, VI1_R6_B_MARK, VI2_G3_MARK, MSIOF0_SS2_B_MARK,
-+	CS1_N_A26_MARK, SPEEDIN_MARK, VI0_R7_MARK, VI0_R7_B_MARK,
-+	VI2_CLK_MARK, VI2_CLK_B_MARK, EX_CS0_N_MARK, HRX1_B_MARK,
-+	VI1_G5_MARK, VI1_G5_B_MARK, VI2_R0_MARK, HTX0_B_MARK,
-+	MSIOF0_SS1_B_MARK, EX_CS1_N_MARK, GPS_CLK_MARK,
-+	HCTS1_N_B_MARK, VI1_FIELD_MARK, VI1_FIELD_B_MARK,
-+	VI2_R1_MARK, EX_CS2_N_MARK, GPS_SIGN_MARK, HRTS1_N_B_MARK,
-+	VI3_CLKENB_MARK, VI1_G0_MARK, VI1_G0_B_MARK, VI2_R2_MARK,
-+
-+	EX_CS3_N_MARK, GPS_MAG_MARK, VI3_FIELD_MARK,
-+	VI1_G1_MARK, VI1_G1_B_MARK, VI2_R3_MARK,
-+	EX_CS4_N_MARK, MSIOF1_SCK_B_MARK, VI3_HSYNC_N_MARK,
-+	VI2_HSYNC_N_MARK, SCL1_MARK, VI2_HSYNC_N_B_MARK,
-+	INTC_EN0_N_MARK, SCL1_CIS_MARK, EX_CS5_N_MARK, CAN0_RX_MARK,
-+	MSIOF1_RXD_B_MARK, VI3_VSYNC_N_MARK, VI1_G2_MARK,
-+	VI1_G2_B_MARK, VI2_R4_MARK, SDA1_MARK, INTC_EN1_N_MARK,
-+	SDA1_CIS_MARK, BS_N_MARK, IETX_MARK, HTX1_B_MARK,
-+	CAN1_TX_MARK, DRACK0_MARK, IETX_C_MARK, RD_N_MARK,
-+	CAN0_TX_MARK, SCIFA0_SCK_B_MARK, RD_WR_N_MARK, VI1_G3_MARK,
-+	VI1_G3_B_MARK, VI2_R5_MARK, SCIFA0_RXD_B_MARK,
-+	INTC_IRQ4_N_MARK, WE0_N_MARK, IECLK_MARK, CAN_CLK_MARK,
-+	VI2_VSYNC_N_MARK, SCIFA0_TXD_B_MARK, VI2_VSYNC_N_B_MARK,
-+	WE1_N_MARK, IERX_MARK, CAN1_RX_MARK, VI1_G4_MARK,
-+	VI1_G4_B_MARK, VI2_R6_MARK, SCIFA0_CTS_N_B_MARK,
-+	IERX_C_MARK, EX_WAIT0_MARK, IRQ3_MARK, INTC_IRQ3_N_MARK,
-+	VI3_CLK_MARK, SCIFA0_RTS_N_B_MARK, HRX0_B_MARK,
-+	MSIOF0_SCK_B_MARK, DREQ0_N_MARK, VI1_HSYNC_N_MARK,
-+	VI1_HSYNC_N_B_MARK, VI2_R7_MARK, SSI_SCK78_C_MARK,
-+	SSI_WS78_B_MARK,
-+
-+	DACK0_MARK, IRQ0_MARK, INTC_IRQ0_N_MARK, SSI_SCK6_B_MARK,
-+	VI1_VSYNC_N_MARK, VI1_VSYNC_N_B_MARK, SSI_WS78_C_MARK,
-+	DREQ1_N_MARK, VI1_CLKENB_MARK, VI1_CLKENB_B_MARK,
-+	SSI_SDATA7_C_MARK, SSI_SCK78_B_MARK, DACK1_MARK, IRQ1_MARK,
-+	INTC_IRQ1_N_MARK, SSI_WS6_B_MARK, SSI_SDATA8_C_MARK,
-+	DREQ2_N_MARK, HSCK1_B_MARK, HCTS0_N_B_MARK,
-+	MSIOF0_TXD_B_MARK, DACK2_MARK, IRQ2_MARK, INTC_IRQ2_N_MARK,
-+	SSI_SDATA6_B_MARK, HRTS0_N_B_MARK, MSIOF0_RXD_B_MARK,
-+	ETH_CRS_DV_MARK, RMII_CRS_DV_MARK, STP_ISCLK_0_B_MARK,
-+	TS_SDEN0_D_MARK, GLO_Q0_C_MARK, SCL2_E_MARK,
-+	SCL2_CIS_E_MARK, ETH_RX_ER_MARK, RMII_RX_ER_MARK,
-+	STP_ISD_0_B_MARK, TS_SPSYNC0_D_MARK, GLO_Q1_C_MARK,
-+	SDA2_E_MARK, SDA2_CIS_E_MARK, ETH_RXD0_MARK, RMII_RXD0_MARK,
-+	STP_ISEN_0_B_MARK, TS_SDAT0_D_MARK, GLO_I0_C_MARK,
-+	SCIFB1_SCK_G_MARK, SCK1_E_MARK, ETH_RXD1_MARK,
-+	RMII_RXD1_MARK, HRX0_E_MARK, STP_ISSYNC_0_B_MARK,
-+	TS_SCK0_D_MARK, GLO_I1_C_MARK, SCIFB1_RXD_G_MARK,
-+	RX1_E_MARK, ETH_LINK_MARK, RMII_LINK_MARK, HTX0_E_MARK,
-+	STP_IVCXO27_0_B_MARK, SCIFB1_TXD_G_MARK, TX1_E_MARK,
-+	ETH_REF_CLK_MARK, RMII_REF_CLK_MARK, HCTS0_N_E_MARK,
-+	STP_IVCXO27_1_B_MARK, HRX0_F_MARK,
-+
-+	ETH_MDIO_MARK, RMII_MDIO_MARK, HRTS0_N_E_MARK,
-+	SIM0_D_C_MARK, HCTS0_N_F_MARK, ETH_TXD1_MARK,
-+	RMII_TXD1_MARK, HTX0_F_MARK, BPFCLK_G_MARK, RDS_CLK_F_MARK,
-+	ETH_TX_EN_MARK, RMII_TX_EN_MARK, SIM0_CLK_C_MARK,
-+	HRTS0_N_F_MARK, ETH_MAGIC_MARK, RMII_MAGIC_MARK,
-+	SIM0_RST_C_MARK, ETH_TXD0_MARK, RMII_TXD0_MARK,
-+	STP_ISCLK_1_B_MARK, TS_SDEN1_C_MARK, GLO_SCLK_C_MARK,
-+	ETH_MDC_MARK, RMII_MDC_MARK, STP_ISD_1_B_MARK,
-+	TS_SPSYNC1_C_MARK, GLO_SDATA_C_MARK, PWM0_MARK,
-+	SCIFA2_SCK_C_MARK, STP_ISEN_1_B_MARK, TS_SDAT1_C_MARK,
-+	GLO_SS_C_MARK, PWM1_MARK, SCIFA2_TXD_C_MARK,
-+	STP_ISSYNC_1_B_MARK, TS_SCK1_C_MARK, GLO_RFON_C_MARK,
-+	PCMOE_N_MARK, PWM2_MARK, PWMFSW0_MARK, SCIFA2_RXD_C_MARK,
-+	PCMWE_N_MARK, IECLK_C_MARK, DU1_DOTCLKIN_MARK,
-+	AUDIO_CLKC_MARK, AUDIO_CLKOUT_C_MARK, VI0_CLK_MARK,
-+	ATACS00_N_MARK, AVB_RXD1_MARK, MII_RXD1_MARK,
-+	VI0_DATA0_VI0_B0_MARK, ATACS10_N_MARK, AVB_RXD2_MARK,
-+	MII_RXD2_MARK,
-+
-+	VI0_DATA1_VI0_B1_MARK, ATARD0_N_MARK, AVB_RXD3_MARK,
-+	MII_RXD3_MARK, VI0_DATA2_VI0_B2_MARK, ATAWR0_N_MARK,
-+	AVB_RXD4_MARK, VI0_DATA3_VI0_B3_MARK, ATADIR0_N_MARK,
-+	AVB_RXD5_MARK, VI0_DATA4_VI0_B4_MARK, ATAG0_N_MARK,
-+	AVB_RXD6_MARK, VI0_DATA5_VI0_B5_MARK, EX_WAIT1_MARK,
-+	AVB_RXD7_MARK, VI0_DATA6_VI0_B6_MARK, AVB_RX_ER_MARK,
-+	MII_RX_ER_MARK, VI0_DATA7_VI0_B7_MARK, AVB_RX_CLK_MARK,
-+	MII_RX_CLK_MARK, VI1_CLK_MARK, AVB_RX_DV_MARK,
-+	MII_RX_DV_MARK, VI1_DATA0_VI1_B0_MARK, SCIFA1_SCK_D_MARK,
-+	AVB_CRS_MARK, MII_CRS_MARK, VI1_DATA1_VI1_B1_MARK,
-+	SCIFA1_RXD_D_MARK, AVB_MDC_MARK, MII_MDC_MARK,
-+	VI1_DATA2_VI1_B2_MARK, SCIFA1_TXD_D_MARK, AVB_MDIO_MARK,
-+	MII_MDIO_MARK, VI1_DATA3_VI1_B3_MARK, SCIFA1_CTS_N_D_MARK,
-+	AVB_GTX_CLK_MARK, VI1_DATA4_VI1_B4_MARK, SCIFA1_RTS_N_D_MARK,
-+	AVB_MAGIC_MARK, MII_MAGIC_MARK, VI1_DATA5_VI1_B5_MARK,
-+	AVB_PHY_INT_MARK, VI1_DATA6_VI1_B6_MARK, AVB_GTXREFCLK_MARK,
-+	SD0_CLK_MARK, VI1_DATA0_VI1_B0_B_MARK, SD0_CMD_MARK,
-+	SCIFB1_SCK_B_MARK, VI1_DATA1_VI1_B1_B_MARK,
-+
-+	SD0_DAT0_MARK, SCIFB1_RXD_B_MARK, VI1_DATA2_VI1_B2_B_MARK,
-+	SD0_DAT1_MARK, SCIFB1_TXD_B_MARK, VI1_DATA3_VI1_B3_B_MARK,
-+	SD0_DAT2_MARK, SCIFB1_CTS_N_B_MARK, VI1_DATA4_VI1_B4_B_MARK,
-+	SD0_DAT3_MARK, SCIFB1_RTS_N_B_MARK, VI1_DATA5_VI1_B5_B_MARK,
-+	SD0_CD_MARK, MMC0_D6_MARK, TS_SDEN0_B_MARK, USB0_EXTP_MARK,
-+	GLO_SCLK_MARK, VI1_DATA6_VI1_B6_B_MARK, SCL1_B_MARK,
-+	SCL1_CIS_B_MARK, VI2_DATA6_VI2_B6_B_MARK, SD0_WP_MARK,
-+	MMC0_D7_MARK, TS_SPSYNC0_B_MARK, USB0_IDIN_MARK,
-+	GLO_SDATA_MARK, VI1_DATA7_VI1_B7_B_MARK, SDA1_B_MARK,
-+	SDA1_CIS_B_MARK, VI2_DATA7_VI2_B7_B_MARK, SD1_CLK_MARK,
-+	AVB_TX_EN_MARK, MII_TX_EN_MARK, SD1_CMD_MARK,
-+	AVB_TX_ER_MARK, MII_TX_ER_MARK, SCIFB0_SCK_B_MARK,
-+	SD1_DAT0_MARK, AVB_TX_CLK_MARK, MII_TX_CLK_MARK,
-+	SCIFB0_RXD_B_MARK, SD1_DAT1_MARK, AVB_LINK_MARK,
-+	MII_LINK_MARK, SCIFB0_TXD_B_MARK, SD1_DAT2_MARK,
-+	AVB_COL_MARK, MII_COL_MARK, SCIFB0_CTS_N_B_MARK,
-+	SD1_DAT3_MARK, AVB_RXD0_MARK, MII_RXD0_MARK,
-+	SCIFB0_RTS_N_B_MARK, SD1_CD_MARK, MMC1_D6_MARK,
-+	TS_SDEN1_MARK, USB1_EXTP_MARK, GLO_SS_MARK, VI0_CLK_B_MARK,
-+	SCL2_D_MARK, SCL2_CIS_D_MARK, SIM0_CLK_B_MARK,
-+	VI3_CLK_B_MARK,
-+
-+	SD1_WP_MARK, MMC1_D7_MARK, TS_SPSYNC1_MARK, USB1_IDIN_MARK,
-+	GLO_RFON_MARK, VI1_CLK_B_MARK, SDA2_D_MARK, SDA2_CIS_D_MARK,
-+	SIM0_D_B_MARK, SD2_CLK_MARK, MMC0_CLK_MARK, SIM0_CLK_MARK,
-+	VI0_DATA0_VI0_B0_B_MARK, TS_SDEN0_C_MARK, GLO_SCLK_B_MARK,
-+	VI3_DATA0_B_MARK, SD2_CMD_MARK, MMC0_CMD_MARK, SIM0_D_MARK,
-+	VI0_DATA1_VI0_B1_B_MARK, SCIFB1_SCK_E_MARK, SCK1_D_MARK,
-+	TS_SPSYNC0_C_MARK, GLO_SDATA_B_MARK, VI3_DATA1_B_MARK,
-+	SD2_DAT0_MARK, MMC0_D0_MARK, FMCLK_B_MARK,
-+	VI0_DATA2_VI0_B2_B_MARK, SCIFB1_RXD_E_MARK, RX1_D_MARK,
-+	TS_SDAT0_C_MARK, GLO_SS_B_MARK, VI3_DATA2_B_MARK,
-+	SD2_DAT1_MARK, MMC0_D1_MARK, FMIN_B_MARK, RDS_DATA_MARK,
-+	VI0_DATA3_VI0_B3_B_MARK, SCIFB1_TXD_E_MARK, TX1_D_MARK,
-+	TS_SCK0_C_MARK, GLO_RFON_B_MARK, VI3_DATA3_B_MARK,
-+	SD2_DAT2_MARK, MMC0_D2_MARK, BPFCLK_B_MARK, RDS_CLK_MARK,
-+	VI0_DATA4_VI0_B4_B_MARK, HRX0_D_MARK, TS_SDEN1_B_MARK,
-+	GLO_Q0_B_MARK, VI3_DATA4_B_MARK, SD2_DAT3_MARK,
-+	MMC0_D3_MARK, SIM0_RST_MARK, VI0_DATA5_VI0_B5_B_MARK,
-+	HTX0_D_MARK, TS_SPSYNC1_B_MARK, GLO_Q1_B_MARK,
-+	VI3_DATA5_B_MARK, SD2_CD_MARK, MMC0_D4_MARK,
-+	TS_SDAT0_B_MARK, USB2_EXTP_MARK, GLO_I0_MARK,
-+	VI0_DATA6_VI0_B6_B_MARK, HCTS0_N_D_MARK, TS_SDAT1_B_MARK,
-+	GLO_I0_B_MARK, VI3_DATA6_B_MARK,
-+
-+	SD2_WP_MARK, MMC0_D5_MARK, TS_SCK0_B_MARK, USB2_IDIN_MARK,
-+	GLO_I1_MARK, VI0_DATA7_VI0_B7_B_MARK, HRTS0_N_D_MARK,
-+	TS_SCK1_B_MARK, GLO_I1_B_MARK, VI3_DATA7_B_MARK,
-+	SD3_CLK_MARK, MMC1_CLK_MARK, SD3_CMD_MARK, MMC1_CMD_MARK,
-+	MTS_N_MARK, SD3_DAT0_MARK, MMC1_D0_MARK, STM_N_MARK,
-+	SD3_DAT1_MARK, MMC1_D1_MARK, MDATA_MARK, SD3_DAT2_MARK,
-+	MMC1_D2_MARK, SDATA_MARK, SD3_DAT3_MARK, MMC1_D3_MARK,
-+	SCKZ_MARK, SD3_CD_MARK, MMC1_D4_MARK, TS_SDAT1_MARK,
-+	VSP_MARK, GLO_Q0_MARK, SIM0_RST_B_MARK, SD3_WP_MARK,
-+	MMC1_D5_MARK, TS_SCK1_MARK, GLO_Q1_MARK, FMIN_C_MARK,
-+	RDS_DATA_B_MARK, FMIN_E_MARK, RDS_DATA_D_MARK, FMIN_F_MARK,
-+	RDS_DATA_E_MARK, MLB_CLK_MARK, SCL2_B_MARK, SCL2_CIS_B_MARK,
-+	MLB_SIG_MARK, SCIFB1_RXD_D_MARK, RX1_C_MARK, SDA2_B_MARK,
-+	SDA2_CIS_B_MARK, MLB_DAT_MARK, SPV_EVEN_MARK,
-+	SCIFB1_TXD_D_MARK, TX1_C_MARK, BPFCLK_C_MARK,
-+	RDS_CLK_B_MARK, SSI_SCK0129_MARK, CAN_CLK_B_MARK,
-+	MOUT0_MARK,
-+
-+	SSI_WS0129_MARK, CAN0_TX_B_MARK, MOUT1_MARK,
-+	SSI_SDATA0_MARK, CAN0_RX_B_MARK, MOUT2_MARK,
-+	SSI_SDATA1_MARK, CAN1_TX_B_MARK, MOUT5_MARK,
-+	SSI_SDATA2_MARK, CAN1_RX_B_MARK, SSI_SCK1_MARK, MOUT6_MARK,
-+	SSI_SCK34_MARK, STP_OPWM_0_MARK, SCIFB0_SCK_MARK,
-+	MSIOF1_SCK_MARK, CAN_DEBUG_HW_TRIGGER_MARK, SSI_WS34_MARK,
-+	STP_IVCXO27_0_MARK, SCIFB0_RXD_MARK, MSIOF1_SYNC_MARK,
-+	CAN_STEP0_MARK, SSI_SDATA3_MARK, STP_ISCLK_0_MARK,
-+	SCIFB0_TXD_MARK, MSIOF1_SS1_MARK, CAN_TXCLK_MARK,
-+	SSI_SCK4_MARK, STP_ISD_0_MARK, SCIFB0_CTS_N_MARK,
-+	MSIOF1_SS2_MARK, SSI_SCK5_C_MARK, CAN_DEBUGOUT0_MARK,
-+	SSI_WS4_MARK, STP_ISEN_0_MARK, SCIFB0_RTS_N_MARK,
-+	MSIOF1_TXD_MARK, SSI_WS5_C_MARK, CAN_DEBUGOUT1_MARK,
-+	SSI_SDATA4_MARK, STP_ISSYNC_0_MARK, MSIOF1_RXD_MARK,
-+	CAN_DEBUGOUT2_MARK, SSI_SCK5_MARK, SCIFB1_SCK_MARK,
-+	IERX_B_MARK, DU2_EXHSYNC_DU2_HSYNC_MARK, QSTH_QHS_MARK,
-+	CAN_DEBUGOUT3_MARK, SSI_WS5_MARK, SCIFB1_RXD_MARK,
-+	IECLK_B_MARK, DU2_EXVSYNC_DU2_VSYNC_MARK, QSTB_QHE_MARK,
-+	CAN_DEBUGOUT4_MARK,
-+
-+	SSI_SDATA5_MARK, SCIFB1_TXD_MARK, IETX_B_MARK, DU2_DR2_MARK,
-+	LCDOUT2_MARK, CAN_DEBUGOUT5_MARK, SSI_SCK6_MARK,
-+	SCIFB1_CTS_N_MARK, BPFCLK_D_MARK, RDS_CLK_C_MARK,
-+	DU2_DR3_MARK, LCDOUT3_MARK, CAN_DEBUGOUT6_MARK,
-+	BPFCLK_F_MARK, RDS_CLK_E_MARK, SSI_WS6_MARK,
-+	SCIFB1_RTS_N_MARK, CAN0_TX_D_MARK, DU2_DR4_MARK,
-+	LCDOUT4_MARK, CAN_DEBUGOUT7_MARK, SSI_SDATA6_MARK,
-+	FMIN_D_MARK, RDS_DATA_C_MARK, DU2_DR5_MARK, LCDOUT5_MARK,
-+	CAN_DEBUGOUT8_MARK, SSI_SCK78_MARK, STP_IVCXO27_1_MARK,
-+	SCK1_MARK, SCIFA1_SCK_MARK, DU2_DR6_MARK, LCDOUT6_MARK,
-+	CAN_DEBUGOUT9_MARK, SSI_WS78_MARK, STP_ISCLK_1_MARK,
-+	SCIFB2_SCK_MARK, SCIFA2_CTS_N_MARK, DU2_DR7_MARK,
-+	LCDOUT7_MARK, CAN_DEBUGOUT10_MARK, SSI_SDATA7_MARK,
-+	STP_ISD_1_MARK, SCIFB2_RXD_MARK, SCIFA2_RTS_N_MARK,
-+	TCLK2_MARK, QSTVA_QVS_MARK, CAN_DEBUGOUT11_MARK,
-+	BPFCLK_E_MARK, RDS_CLK_D_MARK, SSI_SDATA7_B_MARK,
-+	FMIN_G_MARK, RDS_DATA_F_MARK, SSI_SDATA8_MARK,
-+	STP_ISEN_1_MARK, SCIFB2_TXD_MARK, CAN0_TX_C_MARK,
-+	CAN_DEBUGOUT12_MARK, SSI_SDATA8_B_MARK, SSI_SDATA9_MARK,
-+	STP_ISSYNC_1_MARK, SCIFB2_CTS_N_MARK, SSI_WS1_MARK,
-+	SSI_SDATA5_C_MARK, CAN_DEBUGOUT13_MARK, AUDIO_CLKA_MARK,
-+	SCIFB2_RTS_N_MARK, CAN_DEBUGOUT14_MARK,
-+
-+	AUDIO_CLKB_MARK, SCIF_CLK_MARK, CAN0_RX_D_MARK,
-+	DVC_MUTE_MARK, CAN0_RX_C_MARK, CAN_DEBUGOUT15_MARK,
-+	REMOCON_MARK, SCIFA0_SCK_MARK, HSCK1_MARK, SCK0_MARK,
-+	MSIOF3_SS2_MARK, DU2_DG2_MARK, LCDOUT10_MARK, SDA1_C_MARK,
-+	SDA1_CIS_C_MARK, SCIFA0_RXD_MARK, HRX1_MARK, RX0_MARK,
-+	DU2_DR0_MARK, LCDOUT0_MARK, SCIFA0_TXD_MARK, HTX1_MARK,
-+	TX0_MARK, DU2_DR1_MARK, LCDOUT1_MARK, SCIFA0_CTS_N_MARK,
-+	HCTS1_N_MARK, CTS0_N_MARK, MSIOF3_SYNC_MARK, DU2_DG3_MARK,
-+	LCDOUT11_MARK, PWM0_B_MARK, SCL1_C_MARK, SCL1_CIS_C_MARK,
-+	SCIFA0_RTS_N_MARK, HRTS1_N_MARK, RTS0_N_TANS_MARK,
-+	MSIOF3_SS1_MARK, DU2_DG0_MARK, LCDOUT8_MARK, PWM1_B_MARK,
-+	SCIFA1_RXD_MARK, AD_DI_MARK, RX1_MARK,
-+	DU2_EXODDF_DU2_ODDF_DISP_CDE_MARK, QCPV_QDE_MARK,
-+	SCIFA1_TXD_MARK, AD_DO_MARK, TX1_MARK, DU2_DG1_MARK,
-+	LCDOUT9_MARK, SCIFA1_CTS_N_MARK, AD_CLK_MARK,
-+	CTS1_N_MARK, MSIOF3_RXD_MARK, DU0_DOTCLKOUT_MARK, QCLK_MARK,
-+	SCIFA1_RTS_N_MARK, AD_NCS_N_MARK, RTS1_N_TANS_MARK,
-+	MSIOF3_TXD_MARK, DU1_DOTCLKOUT_MARK, QSTVB_QVE_MARK,
-+	HRTS0_N_C_MARK,
-+
-+	SCIFA2_SCK_MARK, FMCLK_MARK, MSIOF3_SCK_MARK, DU2_DG7_MARK,
-+	LCDOUT15_MARK, SCIF_CLK_B_MARK, SCIFA2_RXD_MARK, FMIN_MARK,
-+	DU2_DB0_MARK, LCDOUT16_MARK, SCL2_MARK, SCL2_CIS_MARK,
-+	SCIFA2_TXD_MARK, BPFCLK_MARK, DU2_DB1_MARK, LCDOUT17_MARK,
-+	SDA2_MARK, SDA2_CIS_MARK, HSCK0_MARK, TS_SDEN0_MARK,
-+	DU2_DG4_MARK, LCDOUT12_MARK, HCTS0_N_C_MARK, HRX0_MARK,
-+	DU2_DB2_MARK, LCDOUT18_MARK, HTX0_MARK, DU2_DB3_MARK,
-+	LCDOUT19_MARK, HCTS0_N_MARK, SSI_SCK9_MARK, DU2_DB4_MARK,
-+	LCDOUT20_MARK, HRTS0_N_MARK, SSI_WS9_MARK, DU2_DB5_MARK,
-+	LCDOUT21_MARK, MSIOF0_SCK_MARK, TS_SDAT0_MARK, ADICLK_MARK,
-+	DU2_DB6_MARK, LCDOUT22_MARK, MSIOF0_SYNC_MARK, TS_SCK0_MARK,
-+	SSI_SCK2_MARK, ADIDATA_MARK, DU2_DB7_MARK, LCDOUT23_MARK,
-+	SCIFA2_RXD_B_MARK, MSIOF0_SS1_MARK, ADICHS0_MARK,
-+	DU2_DG5_MARK, LCDOUT13_MARK, MSIOF0_TXD_MARK, ADICHS1_MARK,
-+	DU2_DG6_MARK, LCDOUT14_MARK,
-+
-+	MSIOF0_SS2_MARK, AUDIO_CLKOUT_MARK, ADICHS2_MARK,
-+	DU2_DISP_MARK, QPOLA_MARK, HTX0_C_MARK, SCIFA2_TXD_B_MARK,
-+	MSIOF0_RXD_MARK, TS_SPSYNC0_MARK, SSI_WS2_MARK,
-+	ADICS_SAMP_MARK, DU2_CDE_MARK, QPOLB_MARK, HRX0_C_MARK,
-+	USB1_PWEN_MARK, AUDIO_CLKOUT_D_MARK, USB1_OVC_MARK,
-+	TCLK1_B_MARK,
-+	PINMUX_MARK_END,
-+};
-+
-+static const pinmux_enum_t pinmux_data[] = {
-+	PINMUX_DATA_GP_ALL(), /* PINMUX_DATA(GP_M_N_DATA, GP_M_N_FN...), */
-+
-+	PINMUX_DATA(VI1_DATA7_VI1_B7_MARK, FN_VI1_DATA7_VI1_B7),
-+	PINMUX_DATA(USB0_PWEN_MARK, FN_USB0_PWEN),
-+	PINMUX_DATA(USB0_OVC_VBUS_MARK, FN_USB0_OVC_VBUS),
-+	PINMUX_DATA(USB2_PWEN_MARK, FN_USB2_PWEN),
-+	PINMUX_DATA(USB2_OVC_MARK, FN_USB2_OVC),
-+	PINMUX_DATA(AVS1_MARK, FN_AVS1),
-+	PINMUX_DATA(AVS2_MARK, FN_AVS2),
-+	PINMUX_DATA(DU_DOTCLKIN0_MARK, FN_DU_DOTCLKIN0),
-+	PINMUX_DATA(DU_DOTCLKIN2_MARK, FN_DU_DOTCLKIN2),
-+
-+	PINMUX_IPSR_DATA(IP0_2_0, D0),
-+	PINMUX_IPSR_MODSEL_DATA(IP0_2_0, MSIOF3_SCK_B, SEL_SOF3_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP0_2_0, VI3_DATA0, SEL_VI3_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP0_2_0, VI0_G4, SEL_VI0_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP0_2_0, VI0_G4_B, SEL_VI0_1),
-+	PINMUX_IPSR_DATA(IP0_5_3, D1),
-+	PINMUX_IPSR_MODSEL_DATA(IP0_5_3, MSIOF3_SYNC_B, SEL_SOF3_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP0_5_3, VI3_DATA1, SEL_VI3_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP0_5_3, VI0_G5, SEL_VI0_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP0_5_3, VI0_G5_B, SEL_VI0_1),
-+	PINMUX_IPSR_DATA(IP0_8_6, D2),
-+	PINMUX_IPSR_MODSEL_DATA(IP0_8_6, MSIOF3_RXD_B, SEL_SOF3_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP0_8_6, VI3_DATA2, SEL_VI3_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP0_8_6, VI0_G6, SEL_VI0_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP0_8_6, VI0_G6_B, SEL_VI0_1),
-+	PINMUX_IPSR_DATA(IP0_11_9, D3),
-+	PINMUX_IPSR_MODSEL_DATA(IP0_11_9, MSIOF3_TXD_B, SEL_SOF3_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP0_11_9, VI3_DATA3, SEL_VI3_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP0_11_9, VI0_G7, SEL_VI0_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP0_11_9, VI0_G7_B, SEL_VI0_1),
-+	PINMUX_IPSR_DATA(IP0_15_12, D4),
-+	PINMUX_IPSR_MODSEL_DATA(IP0_15_12, SCIFB1_RXD_F, SEL_SCIFB1_5),
-+	PINMUX_IPSR_MODSEL_DATA(IP0_15_12, SCIFB0_RXD_C, SEL_SCIFB_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP0_15_12, VI3_DATA4, SEL_VI3_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP0_15_12, VI0_R0, SEL_VI0_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP0_15_12, VI0_R0_B, SEL_VI0_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP0_15_12, RX0_B, SEL_SCIF0_1),
-+	PINMUX_IPSR_DATA(IP0_19_16, D5),
-+	PINMUX_IPSR_MODSEL_DATA(IP0_19_16, SCIFB1_TXD_F, SEL_SCIFB1_5),
-+	PINMUX_IPSR_MODSEL_DATA(IP0_19_16, SCIFB0_TXD_C, SEL_SCIFB_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP0_19_16, VI3_DATA5, SEL_VI3_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP0_19_16, VI0_R1, SEL_VI0_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP0_19_16, VI0_R1_B, SEL_VI0_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP0_19_16, TX0_B, SEL_SCIF0_1),
-+	PINMUX_IPSR_DATA(IP0_22_20, D6),
-+	PINMUX_IPSR_MODSEL_DATA(IP0_22_20, SCL2_C, SEL_IIC2_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP0_22_20, VI3_DATA6, SEL_VI3_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP0_22_20, VI0_R2, SEL_VI0_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP0_22_20, VI0_R2_B, SEL_VI0_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP0_22_20, SCL2_CIS_C, SEL_I2C2_2),
-+	PINMUX_IPSR_DATA(IP0_26_23, D7),
-+	PINMUX_IPSR_MODSEL_DATA(IP0_26_23, AD_DI_B, SEL_ADI_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP0_26_23, SDA2_C, SEL_IIC2_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP0_26_23, VI3_DATA7, SEL_VI3_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP0_26_23, VI0_R3, SEL_VI0_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP0_26_23, VI0_R3_B, SEL_VI0_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP0_26_23, SDA2_CIS_C, SEL_I2C2_2),
-+	PINMUX_IPSR_DATA(IP0_30_27, D8),
-+	PINMUX_IPSR_MODSEL_DATA(IP0_30_27, SCIFA1_SCK_C, SEL_SCIFA1_2),
-+	PINMUX_IPSR_DATA(IP0_30_27, AVB_TXD0),
-+	PINMUX_IPSR_DATA(IP0_30_27, MII_TXD0),
-+	PINMUX_IPSR_MODSEL_DATA(IP0_30_27, VI0_G0, SEL_VI0_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP0_30_27, VI0_G0_B, SEL_VI0_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP0_30_27, VI2_DATA0_VI2_B0, SEL_VI2_0),
-+
-+	PINMUX_IPSR_DATA(IP1_3_0, D9),
-+	PINMUX_IPSR_MODSEL_DATA(IP1_3_0, SCIFA1_RXD_C, SEL_SCIFA1_2),
-+	PINMUX_IPSR_DATA(IP1_3_0, AVB_TXD1),
-+	PINMUX_IPSR_DATA(IP1_3_0, MII_TXD1),
-+	PINMUX_IPSR_MODSEL_DATA(IP1_3_0, VI0_G1, SEL_VI0_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP1_3_0, VI0_G1_B, SEL_VI0_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP1_3_0, VI2_DATA1_VI2_B1, SEL_VI2_0),
-+	PINMUX_IPSR_DATA(IP1_7_4, D10),
-+	PINMUX_IPSR_MODSEL_DATA(IP1_7_4, SCIFA1_TXD_C, SEL_SCIFA1_2),
-+	PINMUX_IPSR_DATA(IP1_7_4, AVB_TXD2),
-+	PINMUX_IPSR_DATA(IP1_7_4, MII_TXD2),
-+	PINMUX_IPSR_MODSEL_DATA(IP1_7_4, VI0_G2, SEL_VI0_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP1_7_4, VI0_G2_B, SEL_VI0_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP1_7_4, VI2_DATA2_VI2_B2, SEL_VI2_0),
-+	PINMUX_IPSR_DATA(IP1_11_8, D11),
-+	PINMUX_IPSR_MODSEL_DATA(IP1_11_8, SCIFA1_CTS_N_C, SEL_SCIFA1_2),
-+	PINMUX_IPSR_DATA(IP1_11_8, AVB_TXD3),
-+	PINMUX_IPSR_DATA(IP1_11_8, MII_TXD3),
-+	PINMUX_IPSR_MODSEL_DATA(IP1_11_8, VI0_G3, SEL_VI0_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP1_11_8, VI0_G3_B, SEL_VI0_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP1_11_8, VI2_DATA3_VI2_B3, SEL_VI2_0),
-+	PINMUX_IPSR_DATA(IP1_14_12, D12),
-+	PINMUX_IPSR_MODSEL_DATA(IP1_14_12, SCIFA1_RTS_N_C, SEL_SCIFA1_2),
-+	PINMUX_IPSR_DATA(IP1_14_12, AVB_TXD4),
-+	PINMUX_IPSR_MODSEL_DATA(IP1_14_12, VI0_HSYNC_N, SEL_VI0_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP1_14_12, VI0_HSYNC_N_B, SEL_VI0_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP1_14_12, VI2_DATA4_VI2_B4, SEL_VI2_0),
-+	PINMUX_IPSR_DATA(IP1_17_15, D13),
-+	PINMUX_IPSR_MODSEL_DATA(IP1_17_15, AVB_TXD5, SEL_SCIFA1_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP1_17_15, VI0_VSYNC_N, SEL_VI0_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP1_17_15, VI0_VSYNC_N_B, SEL_VI0_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP1_17_15, VI2_DATA5_VI2_B5, SEL_VI2_0),
-+	PINMUX_IPSR_DATA(IP1_21_18, D14),
-+	PINMUX_IPSR_MODSEL_DATA(IP1_21_18, SCIFB1_RXD_C, SEL_SCIFB1_2),
-+	PINMUX_IPSR_DATA(IP1_21_18, AVB_TXD6),
-+	PINMUX_IPSR_MODSEL_DATA(IP1_21_18, RX1_B, SEL_SCIF1_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP1_21_18, VI0_CLKENB, SEL_VI0_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP1_21_18, VI0_CLKENB_B, SEL_VI0_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP1_21_18, VI2_DATA6_VI2_B6, SEL_VI2_0),
-+	PINMUX_IPSR_DATA(IP1_25_22, D15),
-+	PINMUX_IPSR_MODSEL_DATA(IP1_25_22, SCIFB1_TXD_C, SEL_SCIFB1_2),
-+	PINMUX_IPSR_DATA(IP1_25_22, AVB_TXD7),
-+	PINMUX_IPSR_MODSEL_DATA(IP1_25_22, TX1_B, SEL_SCIF1_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP1_25_22, VI0_FIELD, SEL_VI0_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP1_25_22, VI0_FIELD_B, SEL_VI0_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP1_25_22, VI2_DATA7_VI2_B7, SEL_VI2_0),
-+	PINMUX_IPSR_DATA(IP1_27_26, A0),
-+	PINMUX_IPSR_DATA(IP1_27_26, PWM3),
-+	PINMUX_IPSR_DATA(IP1_29_28, A1),
-+	PINMUX_IPSR_DATA(IP1_29_28, PWM4),
-+
-+	PINMUX_IPSR_DATA(IP2_2_0, A2),
-+	PINMUX_IPSR_DATA(IP2_2_0, PWM5),
-+	PINMUX_IPSR_MODSEL_DATA(IP2_2_0, MSIOF1_SS1_B, SEL_SOF1_1),
-+	PINMUX_IPSR_DATA(IP2_5_3, A3),
-+	PINMUX_IPSR_DATA(IP2_5_3, PWM6),
-+	PINMUX_IPSR_MODSEL_DATA(IP2_5_3, MSIOF1_SS2_B, SEL_SOF1_1),
-+	PINMUX_IPSR_DATA(IP2_8_6, A4),
-+	PINMUX_IPSR_MODSEL_DATA(IP2_8_6, MSIOF1_TXD_B, SEL_SOF1_1),
-+	PINMUX_IPSR_DATA(IP2_8_6, TPU0TO0),
-+	PINMUX_IPSR_DATA(IP2_11_9, A5),
-+	PINMUX_IPSR_MODSEL_DATA(IP2_11_9, SCIFA1_TXD_B, SEL_SCIFA1_1),
-+	PINMUX_IPSR_DATA(IP2_11_9, TPU0TO1),
-+	PINMUX_IPSR_DATA(IP2_14_12, A6),
-+	PINMUX_IPSR_MODSEL_DATA(IP2_14_12, SCIFA1_RTS_N_B, SEL_SCIFA1_1),
-+	PINMUX_IPSR_DATA(IP2_14_12, TPU0TO2),
-+	PINMUX_IPSR_DATA(IP2_17_15, A7),
-+	PINMUX_IPSR_MODSEL_DATA(IP2_17_15, SCIFA1_SCK_B, SEL_SCIFA1_1),
-+	PINMUX_IPSR_DATA(IP2_17_15, AUDIO_CLKOUT_B),
-+	PINMUX_IPSR_DATA(IP2_17_15, TPU0TO3),
-+	PINMUX_IPSR_DATA(IP2_21_18, A8),
-+	PINMUX_IPSR_MODSEL_DATA(IP2_21_18, SCIFA1_RXD_B, SEL_SCIFA1_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP2_21_18, SSI_SCK5_B, SEL_SSI5_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP2_21_18, VI0_R4, SEL_VI0_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP2_21_18, VI0_R4_B, SEL_VI0_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP2_21_18, SCIFB2_RXD_C, SEL_SCIFB2_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP2_21_18, VI2_DATA0_VI2_B0_B, SEL_VI2_1),
-+	PINMUX_IPSR_DATA(IP2_25_22, A9),
-+	PINMUX_IPSR_MODSEL_DATA(IP2_25_22, SCIFA1_CTS_N_B, SEL_SCIFA1_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP2_25_22, SSI_WS5_B, SEL_SSI5_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP2_25_22, VI0_R5, SEL_VI0_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP2_25_22, VI0_R5_B, SEL_VI0_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP2_25_22, SCIFB2_TXD_C, SEL_SCIFB2_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP2_25_22, VI2_DATA1_VI2_B1_B, SEL_VI2_1),
-+	PINMUX_IPSR_DATA(IP2_28_26, A10),
-+	PINMUX_IPSR_MODSEL_DATA(IP2_28_26, SSI_SDATA5_B, SEL_SSI5_1),
-+	PINMUX_IPSR_DATA(IP2_28_26, MSIOF2_SYNC),
-+	PINMUX_IPSR_MODSEL_DATA(IP2_28_26, VI0_R6, SEL_VI0_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP2_28_26, VI0_R6_B, SEL_VI0_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP2_28_26, VI2_DATA2_VI2_B2_B, SEL_VI2_1),
-+
-+	PINMUX_IPSR_DATA(IP3_3_0, A11),
-+	PINMUX_IPSR_MODSEL_DATA(IP3_3_0, SCIFB2_CTS_N_B, SEL_SCIFB2_1),
-+	PINMUX_IPSR_DATA(IP3_3_0, MSIOF2_SCK),
-+	PINMUX_IPSR_MODSEL_DATA(IP3_3_0, VI1_R0, SEL_VI1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP3_3_0, VI1_R0_B, SEL_VI1_1),
-+	PINMUX_IPSR_DATA(IP3_3_0, VI2_G0),
-+	PINMUX_IPSR_DATA(IP3_3_0, VI2_DATA3_VI2_B3_B),
-+	PINMUX_IPSR_DATA(IP3_7_4, A12),
-+	PINMUX_IPSR_MODSEL_DATA(IP3_7_4, SCIFB2_RXD_B, SEL_SCIFB2_1),
-+	PINMUX_IPSR_DATA(IP3_7_4, MSIOF2_TXD),
-+	PINMUX_IPSR_MODSEL_DATA(IP3_7_4, VI1_R1, SEL_VI1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP3_7_4, VI1_R1_B, SEL_VI1_1),
-+	PINMUX_IPSR_DATA(IP3_7_4, VI2_G1),
-+	PINMUX_IPSR_DATA(IP3_7_4, VI2_DATA4_VI2_B4_B),
-+	PINMUX_IPSR_DATA(IP3_11_8, A13),
-+	PINMUX_IPSR_MODSEL_DATA(IP3_11_8, SCIFB2_RTS_N_B, SEL_SCIFB2_1),
-+	PINMUX_IPSR_DATA(IP3_11_8, EX_WAIT2),
-+	PINMUX_IPSR_DATA(IP3_11_8, MSIOF2_RXD),
-+	PINMUX_IPSR_MODSEL_DATA(IP3_11_8, VI1_R2, SEL_VI1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP3_11_8, VI1_R2_B, SEL_VI1_1),
-+	PINMUX_IPSR_DATA(IP3_11_8, VI2_G2),
-+	PINMUX_IPSR_MODSEL_DATA(IP3_11_8, VI2_DATA5_VI2_B5_B, SEL_VI2_0),
-+	PINMUX_IPSR_DATA(IP3_14_12, A14),
-+	PINMUX_IPSR_MODSEL_DATA(IP3_14_12, SCIFB2_TXD_B, SEL_SCIFB2_1),
-+	PINMUX_IPSR_DATA(IP3_14_12, ATACS11_N),
-+	PINMUX_IPSR_DATA(IP3_14_12, MSIOF2_SS1),
-+	PINMUX_IPSR_DATA(IP3_17_15, A15),
-+	PINMUX_IPSR_MODSEL_DATA(IP3_17_15, SCIFB2_SCK_B, SEL_SCIFB2_1),
-+	PINMUX_IPSR_DATA(IP3_17_15, ATARD1_N),
-+	PINMUX_IPSR_DATA(IP3_17_15, MSIOF2_SS2),
-+	PINMUX_IPSR_DATA(IP3_19_18, A16),
-+	PINMUX_IPSR_DATA(IP3_19_18, ATAWR1_N),
-+	PINMUX_IPSR_DATA(IP3_22_20, A17),
-+	PINMUX_IPSR_MODSEL_DATA(IP3_22_20, AD_DO_B, SEL_ADI_1),
-+	PINMUX_IPSR_DATA(IP3_22_20, ATADIR1_N),
-+	PINMUX_IPSR_DATA(IP3_25_23, A18),
-+	PINMUX_IPSR_MODSEL_DATA(IP3_25_23, AD_CLK_B, SEL_ADI_1),
-+	PINMUX_IPSR_DATA(IP3_25_23, ATAG1_N),
-+	PINMUX_IPSR_DATA(IP3_28_26, A19),
-+	PINMUX_IPSR_MODSEL_DATA(IP3_28_26, AD_NCS_N_B, SEL_ADI_1),
-+	PINMUX_IPSR_DATA(IP3_28_26, ATACS01_N),
-+	PINMUX_IPSR_MODSEL_DATA(IP3_28_26, EX_WAIT0_B, SEL_LBS_1),
-+	PINMUX_IPSR_DATA(IP3_31_29, A20),
-+	PINMUX_IPSR_DATA(IP3_31_29, SPCLK),
-+	PINMUX_IPSR_MODSEL_DATA(IP3_31_29, VI1_R3, SEL_VI1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP3_31_29, VI1_R3_B, SEL_VI1_1),
-+	PINMUX_IPSR_DATA(IP3_31_29, VI2_G4),
-+
-+	PINMUX_IPSR_DATA(IP4_2_0, A21),
-+	PINMUX_IPSR_DATA(IP4_2_0, MOSI_IO0),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_2_0, VI1_R4, SEL_VI1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_2_0, VI1_R4_B, SEL_VI1_1),
-+	PINMUX_IPSR_DATA(IP4_2_0, VI2_G5),
-+	PINMUX_IPSR_DATA(IP4_5_3, A22),
-+	PINMUX_IPSR_DATA(IP4_5_3, MISO_IO1),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_5_3, VI1_R5, SEL_VI1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_5_3, VI1_R5_B, SEL_VI1_1),
-+	PINMUX_IPSR_DATA(IP4_5_3, VI2_G6),
-+	PINMUX_IPSR_DATA(IP4_8_6, A23),
-+	PINMUX_IPSR_DATA(IP4_8_6, IO2),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_8_6, VI1_G7, SEL_VI1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_8_6, VI1_G7_B, SEL_VI1_1),
-+	PINMUX_IPSR_DATA(IP4_8_6, VI2_G7),
-+	PINMUX_IPSR_DATA(IP4_11_9, A24),
-+	PINMUX_IPSR_DATA(IP4_11_9, IO3),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_11_9, VI1_R7, SEL_VI1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_11_9, VI1_R7_B, SEL_VI1_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_11_9, VI2_CLKENB, SEL_VI2_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_11_9, VI2_CLKENB_B, SEL_VI2_1),
-+	PINMUX_IPSR_DATA(IP4_14_12, A25),
-+	PINMUX_IPSR_DATA(IP4_14_12, SSL),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_14_12, VI1_G6, SEL_VI1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_14_12, VI1_G6_B, SEL_VI1_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_14_12, VI2_FIELD, SEL_VI2_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_14_12, VI2_FIELD_B, SEL_VI2_1),
-+	PINMUX_IPSR_DATA(IP4_17_15, CS0_N),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_17_15, VI1_R6, SEL_VI1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_17_15, VI1_R6_B, SEL_VI1_1),
-+	PINMUX_IPSR_DATA(IP4_17_15, VI2_G3),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_17_15, MSIOF0_SS2_B, SEL_SOF0_1),
-+	PINMUX_IPSR_DATA(IP4_20_18, CS1_N_A26),
-+	PINMUX_IPSR_DATA(IP4_20_18, SPEEDIN),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_20_18, VI0_R7, SEL_VI0_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_20_18, VI0_R7_B, SEL_VI0_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_20_18, VI2_CLK, SEL_VI2_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_20_18, VI2_CLK_B, SEL_VI2_1),
-+	PINMUX_IPSR_DATA(IP4_23_21, EX_CS0_N),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_23_21, HRX1_B, SEL_HSCIF1_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_23_21, VI1_G5, SEL_VI1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_23_21, VI1_G5_B, SEL_VI1_1),
-+	PINMUX_IPSR_DATA(IP4_23_21, VI2_R0),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_23_21, HTX0_B, SEL_HSCIF0_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_23_21, MSIOF0_SS1_B, SEL_SOF0_1),
-+	PINMUX_IPSR_DATA(IP4_26_24, EX_CS1_N),
-+	PINMUX_IPSR_DATA(IP4_26_24, GPS_CLK),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_26_24, HCTS1_N_B, SEL_HSCIF1_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_26_24, VI1_FIELD, SEL_VI1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_26_24, VI1_FIELD_B, SEL_VI1_1),
-+	PINMUX_IPSR_DATA(IP4_26_24, VI2_R1),
-+	PINMUX_IPSR_DATA(IP4_29_27, EX_CS2_N),
-+	PINMUX_IPSR_DATA(IP4_29_27, GPS_SIGN),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_29_27, HRTS1_N_B, SEL_HSCIF1_1),
-+	PINMUX_IPSR_DATA(IP4_29_27, VI3_CLKENB),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_29_27, VI1_G0, SEL_VI1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_29_27, VI1_G0_B, SEL_VI1_1),
-+	PINMUX_IPSR_DATA(IP4_29_27, VI2_R2),
-+
-+	PINMUX_IPSR_DATA(IP5_2_0, EX_CS3_N),
-+	PINMUX_IPSR_DATA(IP5_2_0, GPS_MAG),
-+	PINMUX_IPSR_DATA(IP5_2_0, VI3_FIELD),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_2_0, VI1_G1, SEL_VI1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_2_0, VI1_G1_B, SEL_VI1_1),
-+	PINMUX_IPSR_DATA(IP5_2_0, VI2_R3),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_5_3, EX_CS4_N, SEL_I2C1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_5_3, MSIOF1_SCK_B, SEL_SOF1_1),
-+	PINMUX_IPSR_DATA(IP5_5_3, VI3_HSYNC_N),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_5_3, VI2_HSYNC_N, SEL_VI2_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_5_3, SCL1, SEL_IIC1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_5_3, VI2_HSYNC_N_B, SEL_VI2_1),
-+	PINMUX_IPSR_DATA(IP5_5_3, INTC_EN0_N),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_5_3, SCL1_CIS, SEL_I2C1_0),
-+	PINMUX_IPSR_DATA(IP5_9_6, EX_CS5_N),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_9_6, CAN0_RX, SEL_CAN0_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_9_6, MSIOF1_RXD_B, SEL_SOF1_1),
-+	PINMUX_IPSR_DATA(IP5_9_6, VI3_VSYNC_N),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_9_6, VI1_G2, SEL_VI1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_9_6, VI1_G2_B, SEL_VI1_1),
-+	PINMUX_IPSR_DATA(IP5_9_6, VI2_R4),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_9_6, SDA1, SEL_IIC1_0),
-+	PINMUX_IPSR_DATA(IP5_9_6, INTC_EN1_N),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_9_6, SDA1_CIS, SEL_I2C1_0),
-+	PINMUX_IPSR_DATA(IP5_12_10, BS_N),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_12_10, IETX, SEL_IEB_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_12_10, HTX1_B, SEL_HSCIF1_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_12_10, CAN1_TX, SEL_CAN1_0),
-+	PINMUX_IPSR_DATA(IP5_12_10, DRACK0),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_12_10, IETX_C, SEL_IEB_2),
-+	PINMUX_IPSR_DATA(IP5_14_13, RD_N),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_14_13, CAN0_TX, SEL_CAN0_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_14_13, SCIFA0_SCK_B, SEL_SCFA_1),
-+	PINMUX_IPSR_DATA(IP5_17_15, RD_WR_N),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_17_15, VI1_G3, SEL_VI1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_17_15, VI1_G3_B, SEL_VI1_1),
-+	PINMUX_IPSR_DATA(IP5_17_15, VI2_R5),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_17_15, SCIFA0_RXD_B, SEL_SCFA_1),
-+	PINMUX_IPSR_DATA(IP5_17_15, INTC_IRQ4_N),
-+	PINMUX_IPSR_DATA(IP5_20_18, WE0_N),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_20_18, IECLK, SEL_IEB_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_20_18, CAN_CLK, SEL_CANCLK_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_20_18, VI2_VSYNC_N, SEL_VI2_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_20_18, SCIFA0_TXD_B, SEL_SCFA_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_20_18, VI2_VSYNC_N_B, SEL_VI2_1),
-+	PINMUX_IPSR_DATA(IP5_23_21, WE1_N),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_23_21, IERX, SEL_IEB_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_23_21, CAN1_RX, SEL_CAN1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_23_21, VI1_G4, SEL_VI1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_23_21, VI1_G4_B, SEL_VI1_1),
-+	PINMUX_IPSR_DATA(IP5_23_21, VI2_R6),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_23_21, SCIFA0_CTS_N_B, SEL_SCFA_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_23_21, IERX_C, SEL_IEB_2),
-+	PINMUX_IPSR_DATA(IP5_26_24, EX_WAIT0),
-+	PINMUX_IPSR_DATA(IP5_26_24, IRQ3),
-+	PINMUX_IPSR_DATA(IP5_26_24, INTC_IRQ3_N),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_26_24, VI3_CLK, SEL_VI3_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_26_24, SCIFA0_RTS_N_B, SEL_SCFA_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_26_24, HRX0_B, SEL_HSCIF0_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_26_24, MSIOF0_SCK_B, SEL_SOF0_1),
-+	PINMUX_IPSR_DATA(IP5_29_27, DREQ0_N),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_29_27, VI1_HSYNC_N, SEL_VI1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_29_27, VI1_HSYNC_N_B, SEL_VI1_1),
-+	PINMUX_IPSR_DATA(IP5_29_27, VI2_R7),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_29_27, SSI_SCK78_C, SEL_SSI7_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_29_27, SSI_WS78_B, SEL_SSI7_1),
-+
-+	PINMUX_IPSR_DATA(IP6_2_0, DACK0),
-+	PINMUX_IPSR_DATA(IP6_2_0, IRQ0),
-+	PINMUX_IPSR_DATA(IP6_2_0, INTC_IRQ0_N),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_2_0, SSI_SCK6_B, SEL_SSI6_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_2_0, VI1_VSYNC_N, SEL_VI1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_2_0, VI1_VSYNC_N_B, SEL_VI1_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_2_0, SSI_WS78_C, SEL_SSI7_2),
-+	PINMUX_IPSR_DATA(IP6_5_3, DREQ1_N),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_5_3, VI1_CLKENB, SEL_VI1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_5_3, VI1_CLKENB_B, SEL_VI1_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_5_3, SSI_SDATA7_C, SEL_SSI7_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_5_3, SSI_SCK78_B, SEL_SSI7_1),
-+	PINMUX_IPSR_DATA(IP6_8_6, DACK1),
-+	PINMUX_IPSR_DATA(IP6_8_6, IRQ1),
-+	PINMUX_IPSR_DATA(IP6_8_6, INTC_IRQ1_N),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_8_6, SSI_WS6_B, SEL_SSI6_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_8_6, SSI_SDATA8_C, SEL_SSI8_2),
-+	PINMUX_IPSR_DATA(IP6_10_9, DREQ2_N),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_10_9, HSCK1_B, SEL_HSCIF1_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_10_9, HCTS0_N_B, SEL_HSCIF0_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_10_9, MSIOF0_TXD_B, SEL_SOF0_1),
-+	PINMUX_IPSR_DATA(IP6_13_11, DACK2),
-+	PINMUX_IPSR_DATA(IP6_13_11, IRQ2),
-+	PINMUX_IPSR_DATA(IP6_13_11, INTC_IRQ2_N),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_13_11, SSI_SDATA6_B, SEL_SSI6_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_13_11, HRTS0_N_B, SEL_HSCIF0_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_13_11, MSIOF0_RXD_B, SEL_SOF0_1),
-+	PINMUX_IPSR_DATA(IP6_16_14, ETH_CRS_DV),
-+	PINMUX_IPSR_DATA(IP6_16_14, RMII_CRS_DV),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_16_14, STP_ISCLK_0_B, SEL_SSP_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_16_14, TS_SDEN0_D, SEL_TSIF0_3),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_16_14, GLO_Q0_C, SEL_GPS_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_16_14, SCL2_E, SEL_IIC2_4),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_16_14, SCL2_CIS_E, SEL_I2C2_4),
-+	PINMUX_IPSR_DATA(IP6_19_17, ETH_RX_ER),
-+	PINMUX_IPSR_DATA(IP6_19_17, RMII_RX_ER),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_19_17, STP_ISD_0_B, SEL_SSP_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_19_17, TS_SPSYNC0_D, SEL_TSIF0_3),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_19_17, GLO_Q1_C, SEL_GPS_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_19_17, SDA2_E, SEL_IIC2_4),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_19_17, SDA2_CIS_E, SEL_I2C2_4),
-+	PINMUX_IPSR_DATA(IP6_22_20, ETH_RXD0),
-+	PINMUX_IPSR_DATA(IP6_22_20, RMII_RXD0),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_22_20, STP_ISEN_0_B, SEL_SSP_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_22_20, TS_SDAT0_D, SEL_TSIF0_3),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_22_20, GLO_I0_C, SEL_GPS_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_22_20, SCIFB1_SCK_G, SEL_SCIFB1_6),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_22_20, SCK1_E, SEL_SCIF1_4),
-+	PINMUX_IPSR_DATA(IP6_25_23, ETH_RXD1),
-+	PINMUX_IPSR_DATA(IP6_25_23, RMII_RXD1),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_25_23, HRX0_E, SEL_HSCIF0_4),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_25_23, STP_ISSYNC_0_B, SEL_SSP_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_25_23, TS_SCK0_D, SEL_TSIF0_3),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_25_23, GLO_I1_C, SEL_GPS_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_25_23, SCIFB1_RXD_G, SEL_SCIFB1_6),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_25_23, RX1_E, SEL_SCIF1_4),
-+	PINMUX_IPSR_DATA(IP6_28_26, ETH_LINK),
-+	PINMUX_IPSR_DATA(IP6_28_26, RMII_LINK),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_28_26, HTX0_E, SEL_HSCIF0_4),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_28_26, STP_IVCXO27_0_B, SEL_SSP_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_28_26, SCIFB1_TXD_G, SEL_SCIFB1_6),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_28_26, TX1_E, SEL_SCIF1_4),
-+	PINMUX_IPSR_DATA(IP6_31_29, ETH_REF_CLK),
-+	PINMUX_IPSR_DATA(IP6_31_29, RMII_REF_CLK),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_31_29, HCTS0_N_E, SEL_HSCIF0_4),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_31_29, STP_IVCXO27_1_B, SEL_SSP_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_31_29, HRX0_F, SEL_HSCIF0_5),
-+
-+	PINMUX_IPSR_DATA(IP7_2_0, ETH_MDIO),
-+	PINMUX_IPSR_DATA(IP7_2_0, RMII_MDIO),
-+	PINMUX_IPSR_MODSEL_DATA(IP7_2_0, HRTS0_N_E, SEL_HSCIF0_4),
-+	PINMUX_IPSR_MODSEL_DATA(IP7_2_0, SIM0_D_C, SEL_SIM_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP7_2_0, HCTS0_N_F, SEL_HSCIF0_5),
-+	PINMUX_IPSR_DATA(IP7_5_3, ETH_TXD1),
-+	PINMUX_IPSR_DATA(IP7_5_3, RMII_TXD1),
-+	PINMUX_IPSR_MODSEL_DATA(IP7_5_3, HTX0_F, SEL_HSCIF0_4),
-+	PINMUX_IPSR_MODSEL_DATA(IP7_5_3, BPFCLK_G, SEL_SIM_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP7_5_3, RDS_CLK_F, SEL_HSCIF0_5),
-+	PINMUX_IPSR_DATA(IP7_7_6, ETH_TX_EN),
-+	PINMUX_IPSR_DATA(IP7_7_6, RMII_TX_EN),
-+	PINMUX_IPSR_MODSEL_DATA(IP7_7_6, SIM0_CLK_C, SEL_SIM_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP7_7_6, HRTS0_N_F, SEL_HSCIF0_5),
-+	PINMUX_IPSR_DATA(IP7_9_8, ETH_MAGIC),
-+	PINMUX_IPSR_DATA(IP7_9_8, RMII_MAGIC),
-+	PINMUX_IPSR_MODSEL_DATA(IP7_9_8, SIM0_RST_C, SEL_SIM_2),
-+	PINMUX_IPSR_DATA(IP7_12_10, ETH_TXD0),
-+	PINMUX_IPSR_DATA(IP7_12_10, RMII_TXD0),
-+	PINMUX_IPSR_MODSEL_DATA(IP7_12_10, STP_ISCLK_1_B, SEL_SSP_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP7_12_10, TS_SDEN1_C, SEL_TSIF1_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP7_12_10, GLO_SCLK_C, SEL_GPS_2),
-+	PINMUX_IPSR_DATA(IP7_15_13, ETH_MDC),
-+	PINMUX_IPSR_DATA(IP7_15_13, RMII_MDC),
-+	PINMUX_IPSR_MODSEL_DATA(IP7_15_13, STP_ISD_1_B, SEL_SSP_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP7_15_13, TS_SPSYNC1_C, SEL_TSIF1_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP7_15_13, GLO_SDATA_C, SEL_GPS_2),
-+	PINMUX_IPSR_DATA(IP7_18_16, PWM0),
-+	PINMUX_IPSR_MODSEL_DATA(IP7_18_16, SCIFA2_SCK_C, SEL_SCIFA2_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP7_18_16, STP_ISEN_1_B, SEL_SSP_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP7_18_16, TS_SDAT1_C, SEL_TSIF1_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP7_18_16, GLO_SS_C, SEL_GPS_2),
-+	PINMUX_IPSR_DATA(IP7_21_19, PWM1),
-+	PINMUX_IPSR_MODSEL_DATA(IP7_21_19, SCIFA2_TXD_C, SEL_SCIFA2_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP7_21_19, STP_ISSYNC_1_B, SEL_SSP_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP7_21_19, TS_SCK1_C, SEL_TSIF1_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP7_21_19, GLO_RFON_C, SEL_GPS_2),
-+	PINMUX_IPSR_DATA(IP7_21_19, PCMOE_N),
-+	PINMUX_IPSR_DATA(IP7_24_22, PWM2),
-+	PINMUX_IPSR_DATA(IP7_24_22, PWMFSW0),
-+	PINMUX_IPSR_MODSEL_DATA(IP7_24_22, SCIFA2_RXD_C, SEL_SCIFA2_2),
-+	PINMUX_IPSR_DATA(IP7_24_22, PCMWE_N),
-+	PINMUX_IPSR_MODSEL_DATA(IP7_24_22, IECLK_C, SEL_IEB_2),
-+	PINMUX_IPSR_DATA(IP7_26_25, DU1_DOTCLKIN),
-+	PINMUX_IPSR_DATA(IP7_26_25, AUDIO_CLKC),
-+	PINMUX_IPSR_DATA(IP7_26_25, AUDIO_CLKOUT_C),
-+	PINMUX_IPSR_MODSEL_DATA(IP7_28_27, VI0_CLK, SEL_VI0_0),
-+	PINMUX_IPSR_DATA(IP7_28_27, ATACS00_N),
-+	PINMUX_IPSR_DATA(IP7_28_27, AVB_RXD1),
-+	PINMUX_IPSR_DATA(IP7_28_27, MII_RXD1),
-+	PINMUX_IPSR_MODSEL_DATA(IP7_30_29, VI0_DATA0_VI0_B0, SEL_VI0_0),
-+	PINMUX_IPSR_DATA(IP7_30_29, ATACS10_N),
-+	PINMUX_IPSR_DATA(IP7_30_29, AVB_RXD2),
-+	PINMUX_IPSR_DATA(IP7_30_29, MII_RXD2),
-+
-+	PINMUX_IPSR_MODSEL_DATA(IP8_1_0, VI0_DATA1_VI0_B1, SEL_VI0_0),
-+	PINMUX_IPSR_DATA(IP8_1_0, ATARD0_N),
-+	PINMUX_IPSR_DATA(IP8_1_0, AVB_RXD3),
-+	PINMUX_IPSR_DATA(IP8_1_0, MII_RXD3),
-+	PINMUX_IPSR_MODSEL_DATA(IP8_3_2, VI0_DATA2_VI0_B2, SEL_VI0_0),
-+	PINMUX_IPSR_DATA(IP8_3_2, ATAWR0_N),
-+	PINMUX_IPSR_DATA(IP8_3_2, AVB_RXD4),
-+	PINMUX_IPSR_MODSEL_DATA(IP8_5_4, VI0_DATA3_VI0_B3, SEL_VI0_0),
-+	PINMUX_IPSR_DATA(IP8_5_4, ATADIR0_N),
-+	PINMUX_IPSR_DATA(IP8_5_4, AVB_RXD5),
-+	PINMUX_IPSR_MODSEL_DATA(IP8_7_6, VI0_DATA4_VI0_B4, SEL_VI0_0),
-+	PINMUX_IPSR_DATA(IP8_7_6, ATAG0_N),
-+	PINMUX_IPSR_DATA(IP8_7_6, AVB_RXD6),
-+	PINMUX_IPSR_MODSEL_DATA(IP8_9_8, VI0_DATA5_VI0_B5, SEL_VI0_0),
-+	PINMUX_IPSR_DATA(IP8_9_8, EX_WAIT1),
-+	PINMUX_IPSR_DATA(IP8_9_8, AVB_RXD7),
-+	PINMUX_IPSR_MODSEL_DATA(IP8_11_10, VI0_DATA6_VI0_B6, SEL_VI0_0),
-+	PINMUX_IPSR_DATA(IP8_11_10, AVB_RX_ER),
-+	PINMUX_IPSR_DATA(IP8_11_10, MII_RX_ER),
-+	PINMUX_IPSR_MODSEL_DATA(IP8_13_12, VI0_DATA7_VI0_B7, SEL_VI0_0),
-+	PINMUX_IPSR_DATA(IP8_13_12, AVB_RX_CLK),
-+	PINMUX_IPSR_DATA(IP8_13_12, MII_RX_CLK),
-+	PINMUX_IPSR_MODSEL_DATA(IP8_15_14, VI1_CLK, SEL_VI1_0),
-+	PINMUX_IPSR_DATA(IP8_15_14, AVB_RX_DV),
-+	PINMUX_IPSR_DATA(IP8_15_14, MII_RX_DV),
-+	PINMUX_IPSR_MODSEL_DATA(IP8_17_16, VI1_DATA0_VI1_B0, SEL_VI1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP8_17_16, SCIFA1_SCK_D, SEL_SCIFA1_3),
-+	PINMUX_IPSR_DATA(IP8_17_16, AVB_CRS),
-+	PINMUX_IPSR_DATA(IP8_17_16, MII_CRS),
-+	PINMUX_IPSR_MODSEL_DATA(IP8_19_18, VI1_DATA1_VI1_B1, SEL_VI1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP8_19_18, SCIFA1_RXD_D, SEL_SCIFA1_3),
-+	PINMUX_IPSR_DATA(IP8_19_18, AVB_MDC),
-+	PINMUX_IPSR_DATA(IP8_19_18, MII_MDC),
-+	PINMUX_IPSR_MODSEL_DATA(IP8_21_20, VI1_DATA2_VI1_B2, SEL_VI1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP8_21_20, SCIFA1_TXD_D, SEL_SCIFA1_3),
-+	PINMUX_IPSR_DATA(IP8_21_20, AVB_MDIO),
-+	PINMUX_IPSR_DATA(IP8_21_20, MII_MDIO),
-+	PINMUX_IPSR_MODSEL_DATA(IP8_23_22, VI1_DATA3_VI1_B3, SEL_VI1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP8_23_22, SCIFA1_CTS_N_D, SEL_SCIFA1_3),
-+	PINMUX_IPSR_DATA(IP8_23_22, AVB_GTX_CLK),
-+	PINMUX_IPSR_MODSEL_DATA(IP8_25_24, VI1_DATA4_VI1_B4, SEL_VI1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP8_25_24, SCIFA1_RTS_N_D, SEL_SCIFA1_3),
-+	PINMUX_IPSR_DATA(IP8_25_24, AVB_MAGIC),
-+	PINMUX_IPSR_DATA(IP8_25_24, MII_MAGIC),
-+	PINMUX_IPSR_MODSEL_DATA(IP8_26, VI1_DATA5_VI1_B5, SEL_VI1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP8_26, AVB_PHY_INT, SEL_SCIFA1_3),
-+	PINMUX_IPSR_MODSEL_DATA(IP8_27, VI1_DATA6_VI1_B6, SEL_VI1_0),
-+	PINMUX_IPSR_DATA(IP8_27, AVB_GTXREFCLK),
-+	PINMUX_IPSR_DATA(IP8_28, SD0_CLK),
-+	PINMUX_IPSR_MODSEL_DATA(IP8_28, VI1_DATA0_VI1_B0_B, SEL_VI1_1),
-+	PINMUX_IPSR_DATA(IP8_30_29, SD0_CMD),
-+	PINMUX_IPSR_MODSEL_DATA(IP8_30_29, SCIFB1_SCK_B, SEL_SCIFB1_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP8_30_29, VI1_DATA1_VI1_B1_B, SEL_VI1_1),
-+
-+	PINMUX_IPSR_DATA(IP9_1_0, SD0_DAT0),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_1_0, SCIFB1_RXD_B, SEL_SCIFB1_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_1_0, VI1_DATA2_VI1_B2_B, SEL_VI1_1),
-+	PINMUX_IPSR_DATA(IP9_3_2, SD0_DAT1),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_3_2, SCIFB1_TXD_B, SEL_SCIFB1_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_3_2, VI1_DATA3_VI1_B3_B, SEL_VI1_1),
-+	PINMUX_IPSR_DATA(IP9_5_4, SD0_DAT2),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_5_4, SCIFB1_CTS_N_B, SEL_SCIFB1_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_5_4, VI1_DATA4_VI1_B4_B, SEL_VI1_1),
-+	PINMUX_IPSR_DATA(IP9_7_6, SD0_DAT3),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_7_6, SCIFB1_RTS_N_B, SEL_SCIFB1_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_7_6, VI1_DATA5_VI1_B5_B, SEL_VI1_1),
-+	PINMUX_IPSR_DATA(IP9_11_8, SD0_CD),
-+	PINMUX_IPSR_DATA(IP9_11_8, MMC0_D6),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_11_8, TS_SDEN0_B, SEL_TSIF0_1),
-+	PINMUX_IPSR_DATA(IP9_11_8, USB0_EXTP),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_11_8, GLO_SCLK, SEL_GPS_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_11_8, VI1_DATA6_VI1_B6_B, SEL_VI1_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_11_8, SCL1_B, SEL_IIC1_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_11_8, SCL1_CIS_B, SEL_I2C1_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_11_8, VI2_DATA6_VI2_B6_B, SEL_VI2_1),
-+	PINMUX_IPSR_DATA(IP9_15_12, SD0_WP),
-+	PINMUX_IPSR_DATA(IP9_15_12, MMC0_D7),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_15_12, TS_SPSYNC0_B, SEL_TSIF0_1),
-+	PINMUX_IPSR_DATA(IP9_15_12, USB0_IDIN),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_15_12, GLO_SDATA, SEL_GPS_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_15_12, VI1_DATA7_VI1_B7_B, SEL_VI1_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_15_12, SDA1_B, SEL_IIC1_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_15_12, SDA1_CIS_B, SEL_I2C1_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_15_12, VI2_DATA7_VI2_B7_B, SEL_VI2_1),
-+	PINMUX_IPSR_DATA(IP9_17_16, SD1_CLK),
-+	PINMUX_IPSR_DATA(IP9_17_16, AVB_TX_EN),
-+	PINMUX_IPSR_DATA(IP9_17_16, MII_TX_EN),
-+	PINMUX_IPSR_DATA(IP9_19_18, SD1_CMD),
-+	PINMUX_IPSR_DATA(IP9_19_18, AVB_TX_ER),
-+	PINMUX_IPSR_DATA(IP9_19_18, MII_TX_ER),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_19_18, SCIFB0_SCK_B, SEL_SCIFB_1),
-+	PINMUX_IPSR_DATA(IP9_21_20, SD1_DAT0),
-+	PINMUX_IPSR_DATA(IP9_21_20, AVB_TX_CLK),
-+	PINMUX_IPSR_DATA(IP9_21_20, MII_TX_CLK),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_21_20, SCIFB0_RXD_B, SEL_SCIFB_1),
-+	PINMUX_IPSR_DATA(IP9_23_22, SD1_DAT1),
-+	PINMUX_IPSR_DATA(IP9_23_22, AVB_LINK),
-+	PINMUX_IPSR_DATA(IP9_23_22, MII_LINK),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_23_22, SCIFB0_TXD_B, SEL_SCIFB_1),
-+	PINMUX_IPSR_DATA(IP9_25_24, SD1_DAT2),
-+	PINMUX_IPSR_DATA(IP9_25_24, AVB_COL),
-+	PINMUX_IPSR_DATA(IP9_25_24, MII_COL),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_25_24, SCIFB0_CTS_N_B, SEL_SCIFB_1),
-+	PINMUX_IPSR_DATA(IP9_27_26, SD1_DAT3),
-+	PINMUX_IPSR_DATA(IP9_27_26, AVB_RXD0),
-+	PINMUX_IPSR_DATA(IP9_27_26, MII_RXD0),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_27_26, SCIFB0_RTS_N_B, SEL_SCIFB_1),
-+	PINMUX_IPSR_DATA(IP9_31_28, SD1_CD),
-+	PINMUX_IPSR_DATA(IP9_31_28, MMC1_D6),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_31_28, TS_SDEN1, SEL_TSIF1_0),
-+	PINMUX_IPSR_DATA(IP9_31_28, USB1_EXTP),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_31_28, GLO_SS, SEL_GPS_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_31_28, VI0_CLK_B, SEL_VI0_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_31_28, SCL2_D, SEL_IIC2_3),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_31_28, SCL2_CIS_D, SEL_I2C2_3),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_31_28, SIM0_CLK_B, SEL_SIM_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_31_28, VI3_CLK_B, SEL_VI3_1),
-+
-+	PINMUX_IPSR_DATA(IP10_3_0, SD1_WP),
-+	PINMUX_IPSR_DATA(IP10_3_0, MMC1_D7),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_3_0, TS_SPSYNC1, SEL_TSIF1_0),
-+	PINMUX_IPSR_DATA(IP10_3_0, USB1_IDIN),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_3_0, GLO_RFON, SEL_GPS_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_3_0, VI1_CLK_B, SEL_VI1_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_3_0, SDA2_D, SEL_IIC2_3),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_3_0, SDA2_CIS_D, SEL_I2C2_3),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_3_0, SIM0_D_B, SEL_SIM_1),
-+	PINMUX_IPSR_DATA(IP10_6_4, SD2_CLK),
-+	PINMUX_IPSR_DATA(IP10_6_4, MMC0_CLK),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_6_4, SIM0_CLK, SEL_SIM_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_6_4, VI0_DATA0_VI0_B0_B, SEL_VI0_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_6_4, TS_SDEN0_C, SEL_TSIF0_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_6_4, GLO_SCLK_B, SEL_GPS_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_6_4, VI3_DATA0_B, SEL_VI3_1),
-+	PINMUX_IPSR_DATA(IP10_10_7, SD2_CMD),
-+	PINMUX_IPSR_DATA(IP10_10_7, MMC0_CMD),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_10_7, SIM0_D, SEL_SIM_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_10_7, VI0_DATA1_VI0_B1_B, SEL_VI0_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_10_7, SCIFB1_SCK_E, SEL_SCIFB1_4),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_10_7, SCK1_D, SEL_SCIF1_3),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_10_7, TS_SPSYNC0_C, SEL_TSIF0_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_10_7, GLO_SDATA_B, SEL_GPS_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_10_7, VI3_DATA1_B, SEL_VI3_1),
-+	PINMUX_IPSR_DATA(IP10_14_11, SD2_DAT0),
-+	PINMUX_IPSR_DATA(IP10_14_11, MMC0_D0),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_14_11, FMCLK_B, SEL_FM_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_14_11, VI0_DATA2_VI0_B2_B, SEL_VI0_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_14_11, SCIFB1_RXD_E, SEL_SCIFB1_4),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_14_11, RX1_D, SEL_SCIF1_3),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_14_11, TS_SDAT0_C, SEL_TSIF0_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_14_11, GLO_SS_B, SEL_GPS_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_14_11, VI3_DATA2_B, SEL_VI3_1),
-+	PINMUX_IPSR_DATA(IP10_18_15, SD2_DAT1),
-+	PINMUX_IPSR_DATA(IP10_18_15, MMC0_D1),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_18_15, FMIN_B, SEL_FM_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_18_15, RDS_DATA, SEL_RDS_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_18_15, VI0_DATA3_VI0_B3_B, SEL_VI0_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_18_15, SCIFB1_TXD_E, SEL_SCIFB1_4),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_18_15, TX1_D, SEL_SCIF1_3),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_18_15, TS_SCK0_C, SEL_TSIF0_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_18_15, GLO_RFON_B, SEL_GPS_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_18_15, VI3_DATA3_B, SEL_VI3_1),
-+	PINMUX_IPSR_DATA(IP10_22_19, SD2_DAT2),
-+	PINMUX_IPSR_DATA(IP10_22_19, MMC0_D2),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_22_19, BPFCLK_B, SEL_FM_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_22_19, RDS_CLK, SEL_RDS_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_22_19, VI0_DATA4_VI0_B4_B, SEL_VI0_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_22_19, HRX0_D, SEL_HSCIF0_3),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_22_19, TS_SDEN1_B, SEL_TSIF1_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_22_19, GLO_Q0_B, SEL_GPS_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_22_19, VI3_DATA4_B, SEL_VI3_1),
-+	PINMUX_IPSR_DATA(IP10_25_23, SD2_DAT3),
-+	PINMUX_IPSR_DATA(IP10_25_23, MMC0_D3),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_25_23, SIM0_RST, SEL_SIM_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_25_23, VI0_DATA5_VI0_B5_B, SEL_VI0_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_25_23, HTX0_D, SEL_HSCIF0_3),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_25_23, TS_SPSYNC1_B, SEL_TSIF1_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_25_23, GLO_Q1_B, SEL_GPS_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_25_23, VI3_DATA5_B, SEL_VI3_1),
-+	PINMUX_IPSR_DATA(IP10_29_26, SD2_CD),
-+	PINMUX_IPSR_DATA(IP10_29_26, MMC0_D4),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_29_26, TS_SDAT0_B, SEL_TSIF0_1),
-+	PINMUX_IPSR_DATA(IP10_29_26, USB2_EXTP),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_29_26, GLO_I0, SEL_GPS_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_29_26, VI0_DATA6_VI0_B6_B, SEL_VI0_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_29_26, HCTS0_N_D, SEL_HSCIF0_3),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_29_26, TS_SDAT1_B, SEL_TSIF1_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_29_26, GLO_I0_B, SEL_GPS_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_29_26, VI3_DATA6_B, SEL_VI3_1),
-+
-+	PINMUX_IPSR_DATA(IP11_3_0, SD2_WP),
-+	PINMUX_IPSR_DATA(IP11_3_0, MMC0_D5),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_3_0, TS_SCK0_B, SEL_TSIF0_1),
-+	PINMUX_IPSR_DATA(IP11_3_0, USB2_IDIN),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_3_0, GLO_I1, SEL_GPS_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_3_0, VI0_DATA7_VI0_B7_B, SEL_VI0_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_3_0, HRTS0_N_D, SEL_HSCIF0_3),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_3_0, TS_SCK1_B, SEL_TSIF1_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_3_0, GLO_I1_B, SEL_GPS_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_3_0, VI3_DATA7_B, SEL_VI3_1),
-+	PINMUX_IPSR_DATA(IP11_4, SD3_CLK),
-+	PINMUX_IPSR_DATA(IP11_4, MMC1_CLK),
-+	PINMUX_IPSR_DATA(IP11_6_5, SD3_CMD),
-+	PINMUX_IPSR_DATA(IP11_6_5, MMC1_CMD),
-+	PINMUX_IPSR_DATA(IP11_6_5, MTS_N),
-+	PINMUX_IPSR_DATA(IP11_8_7, SD3_DAT0),
-+	PINMUX_IPSR_DATA(IP11_8_7, MMC1_D0),
-+	PINMUX_IPSR_DATA(IP11_8_7, STM_N),
-+	PINMUX_IPSR_DATA(IP11_10_9, SD3_DAT1),
-+	PINMUX_IPSR_DATA(IP11_10_9, MMC1_D1),
-+	PINMUX_IPSR_DATA(IP11_10_9, MDATA),
-+	PINMUX_IPSR_DATA(IP11_12_11, SD3_DAT2),
-+	PINMUX_IPSR_DATA(IP11_12_11, MMC1_D2),
-+	PINMUX_IPSR_DATA(IP11_12_11, SDATA),
-+	PINMUX_IPSR_DATA(IP11_14_13, SD3_DAT3),
-+	PINMUX_IPSR_DATA(IP11_14_13, MMC1_D3),
-+	PINMUX_IPSR_DATA(IP11_14_13, SCKZ),
-+	PINMUX_IPSR_DATA(IP11_17_15, SD3_CD),
-+	PINMUX_IPSR_DATA(IP11_17_15, MMC1_D4),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_17_15, TS_SDAT1, SEL_TSIF1_0),
-+	PINMUX_IPSR_DATA(IP11_17_15, VSP),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_17_15, GLO_Q0, SEL_GPS_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_17_15, SIM0_RST_B, SEL_SIM_1),
-+	PINMUX_IPSR_DATA(IP11_21_18, SD3_WP),
-+	PINMUX_IPSR_DATA(IP11_21_18, MMC1_D5),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_21_18, TS_SCK1, SEL_TSIF1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_21_18, GLO_Q1, SEL_GPS_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_21_18, FMIN_C, SEL_FM_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_21_18, RDS_DATA_B, SEL_RDS_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_21_18, FMIN_E, SEL_FM_4),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_21_18, RDS_DATA_D, SEL_RDS_3),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_21_18, FMIN_F, SEL_FM_5),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_21_18, RDS_DATA_E, SEL_RDS_4),
-+	PINMUX_IPSR_DATA(IP11_23_22, MLB_CLK),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_23_22, SCL2_B, SEL_IIC2_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_23_22, SCL2_CIS_B, SEL_I2C2_1),
-+	PINMUX_IPSR_DATA(IP11_26_24, MLB_SIG),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_26_24, SCIFB1_RXD_D, SEL_SCIFB1_3),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_26_24, RX1_C, SEL_SCIF1_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_26_24, SDA2_B, SEL_IIC2_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_26_24, SDA2_CIS_B, SEL_I2C2_1),
-+	PINMUX_IPSR_DATA(IP11_29_27, MLB_DAT),
-+	PINMUX_IPSR_DATA(IP11_29_27, SPV_EVEN),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_29_27, SCIFB1_TXD_D, SEL_SCIFB1_3),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_29_27, TX1_C, SEL_SCIF1_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_29_27, BPFCLK_C, SEL_FM_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_29_27, RDS_CLK_B, SEL_RDS_1),
-+	PINMUX_IPSR_DATA(IP11_31_30, SSI_SCK0129),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_31_30, CAN_CLK_B, SEL_CANCLK_1),
-+	PINMUX_IPSR_DATA(IP11_31_30, MOUT0),
-+
-+	PINMUX_IPSR_DATA(IP12_1_0, SSI_WS0129),
-+	PINMUX_IPSR_MODSEL_DATA(IP12_1_0, CAN0_TX_B, SEL_CAN0_1),
-+	PINMUX_IPSR_DATA(IP12_1_0, MOUT1),
-+	PINMUX_IPSR_DATA(IP12_3_2, SSI_SDATA0),
-+	PINMUX_IPSR_MODSEL_DATA(IP12_3_2, CAN0_RX_B, SEL_CAN0_1),
-+	PINMUX_IPSR_DATA(IP12_3_2, MOUT2),
-+	PINMUX_IPSR_DATA(IP12_5_4, SSI_SDATA1),
-+	PINMUX_IPSR_MODSEL_DATA(IP12_5_4, CAN1_TX_B, SEL_CAN1_1),
-+	PINMUX_IPSR_DATA(IP12_5_4, MOUT5),
-+	PINMUX_IPSR_DATA(IP12_7_6, SSI_SDATA2),
-+	PINMUX_IPSR_MODSEL_DATA(IP12_7_6, CAN1_RX_B, SEL_CAN1_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP12_7_6, CAN1_TX_B, SEL_CAN1_1),
-+	PINMUX_IPSR_DATA(IP12_7_6, MOUT6),
-+	PINMUX_IPSR_DATA(IP12_10_8, SSI_SCK34),
-+	PINMUX_IPSR_DATA(IP12_10_8, STP_OPWM_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP12_10_8, SCIFB0_SCK, SEL_SCIFB_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP12_10_8, MSIOF1_SCK, SEL_SOF1_0),
-+	PINMUX_IPSR_DATA(IP12_10_8, CAN_DEBUG_HW_TRIGGER),
-+	PINMUX_IPSR_DATA(IP12_13_11, SSI_WS34),
-+	PINMUX_IPSR_MODSEL_DATA(IP12_13_11, STP_IVCXO27_0, SEL_SSP_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP12_13_11, SCIFB0_RXD, SEL_SCIFB_0),
-+	PINMUX_IPSR_DATA(IP12_13_11, MSIOF1_SYNC),
-+	PINMUX_IPSR_DATA(IP12_13_11, CAN_STEP0),
-+	PINMUX_IPSR_DATA(IP12_16_14, SSI_SDATA3),
-+	PINMUX_IPSR_MODSEL_DATA(IP12_16_14, STP_ISCLK_0, SEL_SSP_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP12_16_14, SCIFB0_TXD, SEL_SCIFB_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP12_16_14, MSIOF1_SS1, SEL_SOF1_0),
-+	PINMUX_IPSR_DATA(IP12_16_14, CAN_TXCLK),
-+	PINMUX_IPSR_DATA(IP12_19_17, SSI_SCK4),
-+	PINMUX_IPSR_MODSEL_DATA(IP12_19_17, STP_ISD_0, SEL_SSP_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP12_19_17, SCIFB0_CTS_N, SEL_SCIFB_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP12_19_17, MSIOF1_SS2, SEL_SOF1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP12_19_17, SSI_SCK5_C, SEL_SSI5_2),
-+	PINMUX_IPSR_DATA(IP12_19_17, CAN_DEBUGOUT0),
-+	PINMUX_IPSR_DATA(IP12_22_20, SSI_WS4),
-+	PINMUX_IPSR_MODSEL_DATA(IP12_22_20, STP_ISEN_0, SEL_SSP_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP12_22_20, SCIFB0_RTS_N, SEL_SCIFB_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP12_22_20, MSIOF1_TXD, SEL_SOF1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP12_22_20, SSI_WS5_C, SEL_SSI5_2),
-+	PINMUX_IPSR_DATA(IP12_22_20, CAN_DEBUGOUT1),
-+	PINMUX_IPSR_DATA(IP12_24_23, SSI_SDATA4),
-+	PINMUX_IPSR_MODSEL_DATA(IP12_24_23, STP_ISSYNC_0, SEL_SSP_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP12_24_23, MSIOF1_RXD, SEL_SOF1_0),
-+	PINMUX_IPSR_DATA(IP12_24_23, CAN_DEBUGOUT2),
-+	PINMUX_IPSR_MODSEL_DATA(IP12_27_25, SSI_SCK5, SEL_SSI5_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP12_27_25, SCIFB1_SCK, SEL_SCIFB1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP12_27_25, IERX_B, SEL_IEB_1),
-+	PINMUX_IPSR_DATA(IP12_27_25, DU2_EXHSYNC_DU2_HSYNC),
-+	PINMUX_IPSR_DATA(IP12_27_25, QSTH_QHS),
-+	PINMUX_IPSR_DATA(IP12_27_25, CAN_DEBUGOUT3),
-+	PINMUX_IPSR_MODSEL_DATA(IP12_30_28, SSI_WS5, SEL_SSI5_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP12_30_28, SCIFB1_RXD, SEL_SCIFB1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP12_30_28, IECLK_B, SEL_IEB_1),
-+	PINMUX_IPSR_DATA(IP12_30_28, DU2_EXVSYNC_DU2_VSYNC),
-+	PINMUX_IPSR_DATA(IP12_30_28, QSTB_QHE),
-+	PINMUX_IPSR_DATA(IP12_30_28, CAN_DEBUGOUT4),
-+
-+	PINMUX_IPSR_MODSEL_DATA(IP13_2_0, SSI_SDATA5, SEL_SSI5_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_2_0, SCIFB1_TXD, SEL_SCIFB1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_2_0, IETX_B, SEL_IEB_1),
-+	PINMUX_IPSR_DATA(IP13_2_0, DU2_DR2),
-+	PINMUX_IPSR_DATA(IP13_2_0, LCDOUT2),
-+	PINMUX_IPSR_DATA(IP13_2_0, CAN_DEBUGOUT5),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_6_3, SSI_SCK6, SEL_SSI6_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_6_3, SCIFB1_CTS_N, SEL_SCIFB1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_6_3, BPFCLK_D, SEL_FM_3),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_6_3, RDS_CLK_C, SEL_RDS_2),
-+	PINMUX_IPSR_DATA(IP13_6_3, DU2_DR3),
-+	PINMUX_IPSR_DATA(IP13_6_3, LCDOUT3),
-+	PINMUX_IPSR_DATA(IP13_6_3, CAN_DEBUGOUT6),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_6_3, BPFCLK_F, SEL_FM_5),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_6_3, RDS_CLK_E, SEL_RDS_4),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_9_7, SSI_WS6, SEL_SSI6_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_9_7, SCIFB1_RTS_N, SEL_SCIFB1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_9_7, CAN0_TX_D, SEL_CAN0_3),
-+	PINMUX_IPSR_DATA(IP13_9_7, DU2_DR4),
-+	PINMUX_IPSR_DATA(IP13_9_7, LCDOUT4),
-+	PINMUX_IPSR_DATA(IP13_9_7, CAN_DEBUGOUT7),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_12_10, SSI_SDATA6, SEL_SSI6_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_12_10, FMIN_D, SEL_FM_3),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_12_10, RDS_DATA_C, SEL_RDS_2),
-+	PINMUX_IPSR_DATA(IP13_12_10, DU2_DR5),
-+	PINMUX_IPSR_DATA(IP13_12_10, LCDOUT5),
-+	PINMUX_IPSR_DATA(IP13_12_10, CAN_DEBUGOUT8),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_15_13, SSI_SCK78, SEL_SSI7_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_15_13, STP_IVCXO27_1, SEL_SSP_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_15_13, SCK1, SEL_SCIF1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_15_13, SCIFA1_SCK, SEL_SCIFA1_0),
-+	PINMUX_IPSR_DATA(IP13_15_13, DU2_DR6),
-+	PINMUX_IPSR_DATA(IP13_15_13, LCDOUT6),
-+	PINMUX_IPSR_DATA(IP13_15_13, CAN_DEBUGOUT9),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_18_16, SSI_WS78, SEL_SSI7_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_18_16, STP_ISCLK_1, SEL_SSP_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_18_16, SCIFB2_SCK, SEL_SCIFB2_0),
-+	PINMUX_IPSR_DATA(IP13_18_16, SCIFA2_CTS_N),
-+	PINMUX_IPSR_DATA(IP13_18_16, DU2_DR7),
-+	PINMUX_IPSR_DATA(IP13_18_16, LCDOUT7),
-+	PINMUX_IPSR_DATA(IP13_18_16, CAN_DEBUGOUT10),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_22_19, SSI_SDATA7, SEL_SSI7_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_22_19, STP_ISD_1, SEL_SSP_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_22_19, SCIFB2_RXD, SEL_SCIFB2_0),
-+	PINMUX_IPSR_DATA(IP13_22_19, SCIFA2_RTS_N),
-+	PINMUX_IPSR_DATA(IP13_22_19, TCLK2),
-+	PINMUX_IPSR_DATA(IP13_22_19, QSTVA_QVS),
-+	PINMUX_IPSR_DATA(IP13_22_19, CAN_DEBUGOUT11),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_22_19, BPFCLK_E, SEL_FM_4),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_22_19, RDS_CLK_D, SEL_RDS_3),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_22_19, SSI_SDATA7_B, SEL_SSI7_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_22_19, FMIN_G, SEL_FM_6),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_22_19, RDS_DATA_F, SEL_RDS_5),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_25_23, SSI_SDATA8, SEL_SSI8_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_25_23, STP_ISEN_1, SEL_SSP_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_25_23, SCIFB2_TXD, SEL_SCIFB2_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_25_23, CAN0_TX_C, SEL_CAN0_2),
-+	PINMUX_IPSR_DATA(IP13_25_23, CAN_DEBUGOUT12),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_25_23, SSI_SDATA8_B, SEL_SSI8_1),
-+	PINMUX_IPSR_DATA(IP13_28_26, SSI_SDATA9),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_28_26, STP_ISSYNC_1, SEL_SSP_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_28_26, SCIFB2_CTS_N, SEL_SCIFB2_0),
-+	PINMUX_IPSR_DATA(IP13_28_26, SSI_WS1),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_28_26, SSI_SDATA5_C, SEL_SSI5_2),
-+	PINMUX_IPSR_DATA(IP13_28_26, CAN_DEBUGOUT13),
-+	PINMUX_IPSR_DATA(IP13_30_29, AUDIO_CLKA),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_30_29, SCIFB2_RTS_N, SEL_SCIFB2_0),
-+	PINMUX_IPSR_DATA(IP13_30_29, CAN_DEBUGOUT14),
-+
-+	PINMUX_IPSR_DATA(IP14_2_0, AUDIO_CLKB),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_2_0, SCIF_CLK, SEL_SCIFCLK_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_2_0, CAN0_RX_D, SEL_CAN0_3),
-+	PINMUX_IPSR_DATA(IP14_2_0, DVC_MUTE),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_2_0, CAN0_RX_C, SEL_CAN0_2),
-+	PINMUX_IPSR_DATA(IP14_2_0, CAN_DEBUGOUT15),
-+	PINMUX_IPSR_DATA(IP14_2_0, REMOCON),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_5_3, SCIFA0_SCK, SEL_SCFA_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_5_3, HSCK1, SEL_HSCIF1_0),
-+	PINMUX_IPSR_DATA(IP14_5_3, SCK0),
-+	PINMUX_IPSR_DATA(IP14_5_3, MSIOF3_SS2),
-+	PINMUX_IPSR_DATA(IP14_5_3, DU2_DG2),
-+	PINMUX_IPSR_DATA(IP14_5_3, LCDOUT10),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_5_3, SDA1_C, SEL_IIC1_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_5_3, SDA1_CIS_C, SEL_I2C1_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_8_6, SCIFA0_RXD, SEL_SCFA_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_8_6, HRX1, SEL_HSCIF1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_8_6, RX0, SEL_SCIF0_0),
-+	PINMUX_IPSR_DATA(IP14_8_6, DU2_DR0),
-+	PINMUX_IPSR_DATA(IP14_8_6, LCDOUT0),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_11_9, SCIFA0_TXD, SEL_SCFA_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_11_9, HTX1, SEL_HSCIF1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_11_9, TX0, SEL_SCIF0_0),
-+	PINMUX_IPSR_DATA(IP14_11_9, DU2_DR1),
-+	PINMUX_IPSR_DATA(IP14_11_9, LCDOUT1),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_15_12, SCIFA0_CTS_N, SEL_SCFA_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_15_12, HCTS1_N, SEL_HSCIF1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_15_12, CTS0_N, SEL_SCIF0_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_15_12, MSIOF3_SYNC, SEL_SOF3_0),
-+	PINMUX_IPSR_DATA(IP14_15_12, DU2_DG3),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_15_12, LCDOUT11, SEL_HSCIF1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_15_12, PWM0_B, SEL_SCIF0_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_15_12, SCL1_C, SEL_IIC1_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_15_12, SCL1_CIS_C, SEL_I2C1_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_18_16, SCIFA0_RTS_N, SEL_SCFA_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_18_16, HRTS1_N, SEL_HSCIF1_0),
-+	PINMUX_IPSR_DATA(IP14_18_16, RTS0_N_TANS),
-+	PINMUX_IPSR_DATA(IP14_18_16, MSIOF3_SS1),
-+	PINMUX_IPSR_DATA(IP14_18_16, DU2_DG0),
-+	PINMUX_IPSR_DATA(IP14_18_16, LCDOUT8),
-+	PINMUX_IPSR_DATA(IP14_18_16, PWM1_B),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_21_19, SCIFA1_RXD, SEL_SCIFA1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_21_19, AD_DI, SEL_ADI_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_21_19, RX1, SEL_SCIF1_0),
-+	PINMUX_IPSR_DATA(IP14_21_19, DU2_EXODDF_DU2_ODDF_DISP_CDE),
-+	PINMUX_IPSR_DATA(IP14_21_19, QCPV_QDE),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_24_22, SCIFA1_TXD, SEL_SCIFA1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_24_22, AD_DO, SEL_ADI_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_24_22, TX1, SEL_SCIF1_0),
-+	PINMUX_IPSR_DATA(IP14_24_22, DU2_DG1),
-+	PINMUX_IPSR_DATA(IP14_24_22, LCDOUT9),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_27_25, SCIFA1_CTS_N, SEL_SCIFA1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_27_25, AD_CLK, SEL_ADI_0),
-+	PINMUX_IPSR_DATA(IP14_27_25, CTS1_N),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_27_25, MSIOF3_RXD, SEL_SOF3_0),
-+	PINMUX_IPSR_DATA(IP14_27_25, DU0_DOTCLKOUT),
-+	PINMUX_IPSR_DATA(IP14_27_25, QCLK),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_30_28, SCIFA1_RTS_N, SEL_SCIFA1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_30_28, AD_NCS_N, SEL_ADI_0),
-+	PINMUX_IPSR_DATA(IP14_30_28, RTS1_N_TANS),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_30_28, MSIOF3_TXD, SEL_SOF3_0),
-+	PINMUX_IPSR_DATA(IP14_30_28, DU1_DOTCLKOUT),
-+	PINMUX_IPSR_DATA(IP14_30_28, QSTVB_QVE),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_30_28, HRTS0_N_C, SEL_HSCIF0_2),
-+
-+	PINMUX_IPSR_MODSEL_DATA(IP15_2_0, SCIFA2_SCK, SEL_SCIFA2_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_2_0, FMCLK, SEL_FM_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_2_0, MSIOF3_SCK, SEL_SOF3_0),
-+	PINMUX_IPSR_DATA(IP15_2_0, DU2_DG7),
-+	PINMUX_IPSR_DATA(IP15_2_0, LCDOUT15),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_2_0, SCIF_CLK_B, SEL_SCIFCLK_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_5_3, SCIFA2_RXD, SEL_SCIFA2_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_5_3, FMIN, SEL_FM_0),
-+	PINMUX_IPSR_DATA(IP15_5_3, DU2_DB0),
-+	PINMUX_IPSR_DATA(IP15_5_3, LCDOUT16),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_5_3, SCL2, SEL_IIC2_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_5_3, SCL2_CIS, SEL_I2C2_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_8_6, SCIFA2_TXD, SEL_SCIFA2_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_8_6, BPFCLK, SEL_FM_0),
-+	PINMUX_IPSR_DATA(IP15_8_6, DU2_DB1),
-+	PINMUX_IPSR_DATA(IP15_8_6, LCDOUT17),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_8_6, SDA2, SEL_IIC2_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_8_6, SDA2_CIS, SEL_I2C2_0),
-+	PINMUX_IPSR_DATA(IP15_11_9, HSCK0),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_11_9, TS_SDEN0, SEL_TSIF0_0),
-+	PINMUX_IPSR_DATA(IP15_11_9, DU2_DG4),
-+	PINMUX_IPSR_DATA(IP15_11_9, LCDOUT12),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_11_9, HCTS0_N_C, SEL_IIC2_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_11_9, SDA2_CIS, SEL_I2C2_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_13_12, HRX0, SEL_HSCIF0_0),
-+	PINMUX_IPSR_DATA(IP15_13_12, DU2_DB2),
-+	PINMUX_IPSR_DATA(IP15_13_12, LCDOUT18),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_15_14, HTX0, SEL_HSCIF0_0),
-+	PINMUX_IPSR_DATA(IP15_15_14, DU2_DB3),
-+	PINMUX_IPSR_DATA(IP15_15_14, LCDOUT19),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_17_16, HCTS0_N, SEL_HSCIF0_0),
-+	PINMUX_IPSR_DATA(IP15_17_16, SSI_SCK9),
-+	PINMUX_IPSR_DATA(IP15_17_16, DU2_DB4),
-+	PINMUX_IPSR_DATA(IP15_17_16, LCDOUT20),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_19_18, HRTS0_N, SEL_HSCIF0_0),
-+	PINMUX_IPSR_DATA(IP15_19_18, SSI_WS9),
-+	PINMUX_IPSR_DATA(IP15_19_18, DU2_DB5),
-+	PINMUX_IPSR_DATA(IP15_19_18, LCDOUT21),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_22_20, MSIOF0_SCK, SEL_SOF0_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_22_20, TS_SDAT0, SEL_TSIF0_0),
-+	PINMUX_IPSR_DATA(IP15_22_20, ADICLK),
-+	PINMUX_IPSR_DATA(IP15_22_20, DU2_DB6),
-+	PINMUX_IPSR_DATA(IP15_22_20, LCDOUT22),
-+	PINMUX_IPSR_DATA(IP15_25_23, MSIOF0_SYNC),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_25_23, TS_SCK0, SEL_TSIF0_0),
-+	PINMUX_IPSR_DATA(IP15_25_23, SSI_SCK2),
-+	PINMUX_IPSR_DATA(IP15_25_23, ADIDATA),
-+	PINMUX_IPSR_DATA(IP15_25_23, DU2_DB7),
-+	PINMUX_IPSR_DATA(IP15_25_23, LCDOUT23),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_25_23, SCIFA2_RXD_B, SEL_SCIFA2_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_27_26, MSIOF0_SS1, SEL_SOF0_0),
-+	PINMUX_IPSR_DATA(IP15_27_26, ADICHS0),
-+	PINMUX_IPSR_DATA(IP15_27_26, DU2_DG5),
-+	PINMUX_IPSR_DATA(IP15_27_26, LCDOUT13),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_29_28, MSIOF0_TXD, SEL_SOF0_0),
-+	PINMUX_IPSR_DATA(IP15_29_28, ADICHS1),
-+	PINMUX_IPSR_DATA(IP15_29_28, DU2_DG6),
-+	PINMUX_IPSR_DATA(IP15_29_28, LCDOUT14),
-+
-+	PINMUX_IPSR_MODSEL_DATA(IP16_2_0, MSIOF0_SS2, SEL_SOF0_0),
-+	PINMUX_IPSR_DATA(IP16_2_0, AUDIO_CLKOUT),
-+	PINMUX_IPSR_DATA(IP16_2_0, ADICHS2),
-+	PINMUX_IPSR_DATA(IP16_2_0, DU2_DISP),
-+	PINMUX_IPSR_DATA(IP16_2_0, QPOLA),
-+	PINMUX_IPSR_MODSEL_DATA(IP16_2_0, HTX0_C, SEL_HSCIF0_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP16_2_0, SCIFA2_TXD_B, SEL_SCIFA2_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP16_5_3, MSIOF0_RXD, SEL_SOF0_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP16_5_3, TS_SPSYNC0, SEL_TSIF0_0),
-+	PINMUX_IPSR_DATA(IP16_5_3, SSI_WS2),
-+	PINMUX_IPSR_DATA(IP16_5_3, ADICS_SAMP),
-+	PINMUX_IPSR_DATA(IP16_5_3, DU2_CDE),
-+	PINMUX_IPSR_DATA(IP16_5_3, QPOLB),
-+	PINMUX_IPSR_MODSEL_DATA(IP16_5_3, HRX0_C, SEL_HSCIF0_2),
-+	PINMUX_IPSR_DATA(IP16_6, USB1_PWEN),
-+	PINMUX_IPSR_DATA(IP16_6, AUDIO_CLKOUT_D),
-+	PINMUX_IPSR_DATA(IP16_7, USB1_OVC),
-+	PINMUX_IPSR_MODSEL_DATA(IP16_7, TCLK1_B, SEL_TMU1_1),
-+};
-+
-+static struct sh_pfc_pin pinmux_pins[] = {
-+	PINMUX_GPIO_GP_ALL(),
-+};
-+
-+#define PINMUX_FN_BASE	ARRAY_SIZE(pinmux_pins)
-+
-+static const struct pinmux_func pinmux_func_gpios[] = {
-+	GPIO_FN(VI1_DATA7_VI1_B7), GPIO_FN(USB0_PWEN), GPIO_FN(USB0_OVC_VBUS),
-+	GPIO_FN(USB2_PWEN), GPIO_FN(USB2_OVC), GPIO_FN(AVS1), GPIO_FN(AVS2),
-+	GPIO_FN(DU_DOTCLKIN0), GPIO_FN(DU_DOTCLKIN2),
-+
-+	/*IPSR0*/
-+	GPIO_FN(D1), GPIO_FN(MSIOF3_SYNC_B), GPIO_FN(VI3_DATA1),
-+	GPIO_FN(VI0_G5), GPIO_FN(VI0_G5_B), GPIO_FN(D2), GPIO_FN(MSIOF3_RXD_B),
-+	GPIO_FN(VI3_DATA2), GPIO_FN(VI0_G6), GPIO_FN(VI0_G6_B), GPIO_FN(D3),
-+	GPIO_FN(MSIOF3_TXD_B), GPIO_FN(VI3_DATA3), GPIO_FN(VI0_G7),
-+	GPIO_FN(VI0_G7_B), GPIO_FN(D4), GPIO_FN(SCIFB1_RXD_F),
-+	GPIO_FN(SCIFB0_RXD_C), GPIO_FN(VI3_DATA4), GPIO_FN(VI0_R0),
-+	GPIO_FN(VI0_R0_B), GPIO_FN(RX0_B), GPIO_FN(D5), GPIO_FN(SCIFB1_TXD_F),
-+	GPIO_FN(SCIFB0_TXD_C), GPIO_FN(VI3_DATA5), GPIO_FN(VI0_R1),
-+	GPIO_FN(VI0_R1_B), GPIO_FN(TX0_B), GPIO_FN(D6), GPIO_FN(SCL2_C),
-+	GPIO_FN(VI3_DATA6), GPIO_FN(VI0_R2), GPIO_FN(VI0_R2_B),
-+	GPIO_FN(SCL2_CIS_C), GPIO_FN(D7), GPIO_FN(AD_DI_B), GPIO_FN(SDA2_C),
-+	GPIO_FN(VI3_DATA7), GPIO_FN(VI0_R3), GPIO_FN(VI0_R3_B),
-+	GPIO_FN(SDA2_CIS_C), GPIO_FN(D8), GPIO_FN(SCIFA1_SCK_C),
-+	GPIO_FN(AVB_TXD0), GPIO_FN(MII_TXD0), GPIO_FN(VI0_G0),
-+	GPIO_FN(VI0_G0_B), GPIO_FN(VI2_DATA0_VI2_B0),
-+
-+	/*IPSR1*/
-+	GPIO_FN(D9), GPIO_FN(SCIFA1_RXD_C), GPIO_FN(AVB_TXD1),
-+	GPIO_FN(MII_TXD1), GPIO_FN(VI0_G1), GPIO_FN(VI0_G1_B),
-+	GPIO_FN(VI2_DATA1_VI2_B1), GPIO_FN(D10), GPIO_FN(SCIFA1_TXD_C),
-+	GPIO_FN(AVB_TXD2), GPIO_FN(MII_TXD2), GPIO_FN(VI0_G2),
-+	GPIO_FN(VI0_G2_B), GPIO_FN(VI2_DATA2_VI2_B2), GPIO_FN(D11),
-+	GPIO_FN(SCIFA1_CTS_N_C), GPIO_FN(AVB_TXD3), GPIO_FN(MII_TXD3),
-+	GPIO_FN(VI0_G3), GPIO_FN(VI0_G3_B), GPIO_FN(VI2_DATA3_VI2_B3),
-+	GPIO_FN(D12), GPIO_FN(SCIFA1_RTS_N_C), GPIO_FN(AVB_TXD4),
-+	GPIO_FN(VI0_HSYNC_N), GPIO_FN(VI0_HSYNC_N_B), GPIO_FN(VI2_DATA4_VI2_B4),
-+	GPIO_FN(D13), GPIO_FN(AVB_TXD5), GPIO_FN(VI0_VSYNC_N),
-+	GPIO_FN(VI0_VSYNC_N_B), GPIO_FN(VI2_DATA5_VI2_B5), GPIO_FN(D14),
-+	GPIO_FN(SCIFB1_RXD_C), GPIO_FN(AVB_TXD6), GPIO_FN(RX1_B),
-+	GPIO_FN(VI0_CLKENB), GPIO_FN(VI0_CLKENB_B), GPIO_FN(VI2_DATA6_VI2_B6),
-+	GPIO_FN(D15), GPIO_FN(SCIFB1_TXD_C), GPIO_FN(AVB_TXD7), GPIO_FN(TX1_B),
-+	GPIO_FN(VI0_FIELD), GPIO_FN(VI0_FIELD_B), GPIO_FN(VI2_DATA7_VI2_B7),
-+	GPIO_FN(A0), GPIO_FN(PWM3), GPIO_FN(A1), GPIO_FN(PWM4),
-+
-+	/*IPSR2*/
-+	GPIO_FN(A2), GPIO_FN(PWM5), GPIO_FN(MSIOF1_SS1_B), GPIO_FN(A3),
-+	GPIO_FN(PWM6), GPIO_FN(MSIOF1_SS2_B), GPIO_FN(A4),
-+	GPIO_FN(MSIOF1_TXD_B), GPIO_FN(TPU0TO0), GPIO_FN(A5),
-+	GPIO_FN(SCIFA1_TXD_B), GPIO_FN(TPU0TO1), GPIO_FN(A6),
-+	GPIO_FN(SCIFA1_RTS_N_B), GPIO_FN(TPU0TO2), GPIO_FN(A7),
-+	GPIO_FN(SCIFA1_SCK_B), GPIO_FN(AUDIO_CLKOUT_B), GPIO_FN(TPU0TO3),
-+	GPIO_FN(A8), GPIO_FN(SCIFA1_RXD_B), GPIO_FN(SSI_SCK5_B),
-+	GPIO_FN(VI0_R4), GPIO_FN(VI0_R4_B), GPIO_FN(SCIFB2_RXD_C),
-+	GPIO_FN(VI2_DATA0_VI2_B0_B), GPIO_FN(A9), GPIO_FN(SCIFA1_CTS_N_B),
-+	GPIO_FN(SSI_WS5_B), GPIO_FN(VI0_R5), GPIO_FN(VI0_R5_B),
-+	GPIO_FN(SCIFB2_TXD_C), GPIO_FN(VI2_DATA1_VI2_B1_B), GPIO_FN(A10),
-+	GPIO_FN(SSI_SDATA5_B), GPIO_FN(MSIOF2_SYNC), GPIO_FN(VI0_R6),
-+	GPIO_FN(VI0_R6_B), GPIO_FN(VI2_DATA2_VI2_B2_B),
-+
-+	/*IPSR3*/
-+	GPIO_FN(A11), GPIO_FN(SCIFB2_CTS_N_B), GPIO_FN(MSIOF2_SCK),
-+	GPIO_FN(VI1_R0), GPIO_FN(VI1_R0_B), GPIO_FN(VI2_G0),
-+	GPIO_FN(VI2_DATA3_VI2_B3_B), GPIO_FN(A12), GPIO_FN(SCIFB2_RXD_B),
-+	GPIO_FN(MSIOF2_TXD), GPIO_FN(VI1_R1), GPIO_FN(VI1_R1_B),
-+	GPIO_FN(VI2_G1), GPIO_FN(VI2_DATA4_VI2_B4_B), GPIO_FN(A13),
-+	GPIO_FN(SCIFB2_RTS_N_B), GPIO_FN(EX_WAIT2), GPIO_FN(MSIOF2_RXD),
-+	GPIO_FN(VI1_R2), GPIO_FN(VI1_R2_B), GPIO_FN(VI2_G2),
-+	GPIO_FN(VI2_DATA5_VI2_B5_B), GPIO_FN(A14), GPIO_FN(SCIFB2_TXD_B),
-+	GPIO_FN(ATACS11_N), GPIO_FN(MSIOF2_SS1), GPIO_FN(A15),
-+	GPIO_FN(SCIFB2_SCK_B), GPIO_FN(ATARD1_N), GPIO_FN(MSIOF2_SS2),
-+	GPIO_FN(A16), GPIO_FN(ATAWR1_N), GPIO_FN(A17), GPIO_FN(AD_DO_B),
-+	GPIO_FN(ATADIR1_N), GPIO_FN(A18), GPIO_FN(AD_CLK_B), GPIO_FN(ATAG1_N),
-+	GPIO_FN(A19), GPIO_FN(AD_NCS_N_B), GPIO_FN(ATACS01_N),
-+	GPIO_FN(EX_WAIT0_B), GPIO_FN(A20), GPIO_FN(SPCLK), GPIO_FN(VI1_R3),
-+	GPIO_FN(VI1_R3_B), GPIO_FN(VI2_G4),
-+
-+	/*IPSR4*/
-+	GPIO_FN(A21), GPIO_FN(MOSI_IO0), GPIO_FN(VI1_R4), GPIO_FN(VI1_R4_B),
-+	GPIO_FN(VI2_G5), GPIO_FN(A22), GPIO_FN(MISO_IO1), GPIO_FN(VI1_R5),
-+	GPIO_FN(VI1_R5_B), GPIO_FN(VI2_G6), GPIO_FN(A23), GPIO_FN(IO2),
-+	GPIO_FN(VI1_G7), GPIO_FN(VI1_G7_B), GPIO_FN(VI2_G7), GPIO_FN(A24),
-+	GPIO_FN(IO3), GPIO_FN(VI1_R7), GPIO_FN(VI1_R7_B), GPIO_FN(VI2_CLKENB),
-+	GPIO_FN(VI2_CLKENB_B), GPIO_FN(A25), GPIO_FN(SSL), GPIO_FN(VI1_G6),
-+	GPIO_FN(VI1_G6_B), GPIO_FN(VI2_FIELD), GPIO_FN(VI2_FIELD_B),
-+	GPIO_FN(CS0_N), GPIO_FN(VI1_R6), GPIO_FN(VI1_R6_B), GPIO_FN(VI2_G3),
-+	GPIO_FN(MSIOF0_SS2_B), GPIO_FN(CS1_N_A26), GPIO_FN(SPEEDIN),
-+	GPIO_FN(VI0_R7), GPIO_FN(VI0_R7_B), GPIO_FN(VI2_CLK),
-+	GPIO_FN(VI2_CLK_B), GPIO_FN(EX_CS0_N), GPIO_FN(HRX1_B),
-+	GPIO_FN(VI1_G5), GPIO_FN(VI1_G5_B), GPIO_FN(VI2_R0), GPIO_FN(HTX0_B),
-+	GPIO_FN(MSIOF0_SS1_B), GPIO_FN(EX_CS1_N), GPIO_FN(GPS_CLK),
-+	GPIO_FN(HCTS1_N_B), GPIO_FN(VI1_FIELD), GPIO_FN(VI1_FIELD_B),
-+	GPIO_FN(VI2_R1), GPIO_FN(EX_CS2_N), GPIO_FN(GPS_SIGN),
-+	GPIO_FN(HRTS1_N_B), GPIO_FN(VI3_CLKENB), GPIO_FN(VI1_G0),
-+	GPIO_FN(VI1_G0_B), GPIO_FN(VI2_R2),
-+
-+	/*IPSR5*/
-+	GPIO_FN(EX_CS3_N), GPIO_FN(GPS_MAG), GPIO_FN(VI3_FIELD),
-+	GPIO_FN(VI1_G1), GPIO_FN(VI1_G1_B), GPIO_FN(VI2_R3), GPIO_FN(EX_CS4_N),
-+	GPIO_FN(MSIOF1_SCK_B), GPIO_FN(VI3_HSYNC_N), GPIO_FN(VI2_HSYNC_N),
-+	GPIO_FN(SCL1), GPIO_FN(VI2_HSYNC_N_B), GPIO_FN(INTC_EN0_N),
-+	GPIO_FN(SCL1_CIS), GPIO_FN(EX_CS5_N), GPIO_FN(CAN0_RX),
-+	GPIO_FN(MSIOF1_RXD_B), GPIO_FN(VI3_VSYNC_N), GPIO_FN(VI1_G2),
-+	GPIO_FN(VI1_G2_B), GPIO_FN(VI2_R4), GPIO_FN(SDA1), GPIO_FN(INTC_EN1_N),
-+	GPIO_FN(SDA1_CIS), GPIO_FN(BS_N), GPIO_FN(IETX), GPIO_FN(HTX1_B),
-+	GPIO_FN(CAN1_TX), GPIO_FN(DRACK0), GPIO_FN(IETX_C), GPIO_FN(RD_N),
-+	GPIO_FN(CAN0_TX), GPIO_FN(SCIFA0_SCK_B), GPIO_FN(RD_WR_N),
-+	GPIO_FN(VI1_G3), GPIO_FN(VI1_G3_B), GPIO_FN(VI2_R5),
-+	GPIO_FN(SCIFA0_RXD_B), GPIO_FN(INTC_IRQ4_N), GPIO_FN(WE0_N),
-+	GPIO_FN(IECLK), GPIO_FN(CAN_CLK), GPIO_FN(VI2_VSYNC_N),
-+	GPIO_FN(SCIFA0_TXD_B), GPIO_FN(VI2_VSYNC_N_B), GPIO_FN(WE1_N),
-+	GPIO_FN(IERX), GPIO_FN(CAN1_RX), GPIO_FN(VI1_G4), GPIO_FN(VI1_G4_B),
-+	GPIO_FN(VI2_R6), GPIO_FN(SCIFA0_CTS_N_B), GPIO_FN(IERX_C),
-+	GPIO_FN(EX_WAIT0), GPIO_FN(IRQ3), GPIO_FN(INTC_IRQ3_N),
-+	GPIO_FN(VI3_CLK), GPIO_FN(SCIFA0_RTS_N_B), GPIO_FN(HRX0_B),
-+	GPIO_FN(MSIOF0_SCK_B), GPIO_FN(DREQ0_N), GPIO_FN(VI1_HSYNC_N),
-+	GPIO_FN(VI1_HSYNC_N_B), GPIO_FN(VI2_R7), GPIO_FN(SSI_SCK78_C),
-+	GPIO_FN(SSI_WS78_B),
-+
-+	/*IPSR6*/
-+	GPIO_FN(DACK0), GPIO_FN(IRQ0), GPIO_FN(INTC_IRQ0_N),
-+	GPIO_FN(SSI_SCK6_B), GPIO_FN(VI1_VSYNC_N), GPIO_FN(VI1_VSYNC_N_B),
-+	GPIO_FN(SSI_WS78_C), GPIO_FN(DREQ1_N), GPIO_FN(VI1_CLKENB),
-+	GPIO_FN(VI1_CLKENB_B), GPIO_FN(SSI_SDATA7_C), GPIO_FN(SSI_SCK78_B),
-+	GPIO_FN(DACK1), GPIO_FN(IRQ1), GPIO_FN(INTC_IRQ1_N), GPIO_FN(SSI_WS6_B),
-+	GPIO_FN(SSI_SDATA8_C), GPIO_FN(DREQ2_N), GPIO_FN(HSCK1_B),
-+	GPIO_FN(HCTS0_N_B), GPIO_FN(MSIOF0_TXD_B), GPIO_FN(DACK2),
-+	GPIO_FN(IRQ2), GPIO_FN(INTC_IRQ2_N), GPIO_FN(SSI_SDATA6_B),
-+	GPIO_FN(HRTS0_N_B), GPIO_FN(MSIOF0_RXD_B), GPIO_FN(ETH_CRS_DV),
-+	GPIO_FN(RMII_CRS_DV), GPIO_FN(STP_ISCLK_0_B), GPIO_FN(TS_SDEN0_D),
-+	GPIO_FN(GLO_Q0_C), GPIO_FN(SCL2_E), GPIO_FN(SCL2_CIS_E),
-+	GPIO_FN(ETH_RX_ER), GPIO_FN(RMII_RX_ER), GPIO_FN(STP_ISD_0_B),
-+	GPIO_FN(TS_SPSYNC0_D), GPIO_FN(GLO_Q1_C), GPIO_FN(SDA2_E),
-+	GPIO_FN(SDA2_CIS_E), GPIO_FN(ETH_RXD0), GPIO_FN(RMII_RXD0),
-+	GPIO_FN(STP_ISEN_0_B), GPIO_FN(TS_SDAT0_D), GPIO_FN(GLO_I0_C),
-+	GPIO_FN(SCIFB1_SCK_G), GPIO_FN(SCK1_E), GPIO_FN(ETH_RXD1),
-+	GPIO_FN(RMII_RXD1), GPIO_FN(HRX0_E), GPIO_FN(STP_ISSYNC_0_B),
-+	GPIO_FN(TS_SCK0_D), GPIO_FN(GLO_I1_C), GPIO_FN(SCIFB1_RXD_G),
-+	GPIO_FN(RX1_E), GPIO_FN(ETH_LINK), GPIO_FN(RMII_LINK), GPIO_FN(HTX0_E),
-+	GPIO_FN(STP_IVCXO27_0_B), GPIO_FN(SCIFB1_TXD_G), GPIO_FN(TX1_E),
-+	GPIO_FN(ETH_REF_CLK), GPIO_FN(RMII_REF_CLK), GPIO_FN(HCTS0_N_E),
-+	GPIO_FN(STP_IVCXO27_1_B), GPIO_FN(HRX0_F),
-+
-+	/*IPSR7*/
-+	GPIO_FN(ETH_MDIO), GPIO_FN(RMII_MDIO), GPIO_FN(HRTS0_N_E),
-+	GPIO_FN(SIM0_D_C), GPIO_FN(HCTS0_N_F), GPIO_FN(ETH_TXD1),
-+	GPIO_FN(RMII_TXD1), GPIO_FN(HTX0_F), GPIO_FN(BPFCLK_G),
-+	GPIO_FN(RDS_CLK_F), GPIO_FN(ETH_TX_EN), GPIO_FN(RMII_TX_EN),
-+	GPIO_FN(SIM0_CLK_C), GPIO_FN(HRTS0_N_F), GPIO_FN(ETH_MAGIC),
-+	GPIO_FN(RMII_MAGIC), GPIO_FN(SIM0_RST_C), GPIO_FN(ETH_TXD0),
-+	GPIO_FN(RMII_TXD0), GPIO_FN(STP_ISCLK_1_B), GPIO_FN(TS_SDEN1_C),
-+	GPIO_FN(GLO_SCLK_C), GPIO_FN(ETH_MDC), GPIO_FN(RMII_MDC),
-+	GPIO_FN(STP_ISD_1_B), GPIO_FN(TS_SPSYNC1_C), GPIO_FN(GLO_SDATA_C),
-+	GPIO_FN(PWM0), GPIO_FN(SCIFA2_SCK_C), GPIO_FN(STP_ISEN_1_B),
-+	GPIO_FN(TS_SDAT1_C), GPIO_FN(GLO_SS_C), GPIO_FN(PWM1),
-+	GPIO_FN(SCIFA2_TXD_C), GPIO_FN(STP_ISSYNC_1_B), GPIO_FN(TS_SCK1_C),
-+	GPIO_FN(GLO_RFON_C), GPIO_FN(PCMOE_N), GPIO_FN(PWM2), GPIO_FN(PWMFSW0),
-+	GPIO_FN(SCIFA2_RXD_C), GPIO_FN(PCMWE_N), GPIO_FN(IECLK_C),
-+	GPIO_FN(DU1_DOTCLKIN), GPIO_FN(AUDIO_CLKC), GPIO_FN(AUDIO_CLKOUT_C),
-+	GPIO_FN(VI0_CLK), GPIO_FN(ATACS00_N), GPIO_FN(AVB_RXD1),
-+	GPIO_FN(MII_RXD1), GPIO_FN(VI0_DATA0_VI0_B0), GPIO_FN(ATACS10_N),
-+	GPIO_FN(AVB_RXD2), GPIO_FN(MII_RXD2),
-+
-+	/*IPSR8*/
-+	GPIO_FN(VI0_DATA1_VI0_B1), GPIO_FN(ATARD0_N), GPIO_FN(AVB_RXD3),
-+	GPIO_FN(MII_RXD3), GPIO_FN(VI0_DATA2_VI0_B2), GPIO_FN(ATAWR0_N),
-+	GPIO_FN(AVB_RXD4), GPIO_FN(VI0_DATA3_VI0_B3), GPIO_FN(ATADIR0_N),
-+	GPIO_FN(AVB_RXD5), GPIO_FN(VI0_DATA4_VI0_B4), GPIO_FN(ATAG0_N),
-+	GPIO_FN(AVB_RXD6), GPIO_FN(VI0_DATA5_VI0_B5), GPIO_FN(EX_WAIT1),
-+	GPIO_FN(AVB_RXD7), GPIO_FN(VI0_DATA6_VI0_B6), GPIO_FN(AVB_RX_ER),
-+	GPIO_FN(MII_RX_ER), GPIO_FN(VI0_DATA7_VI0_B7), GPIO_FN(AVB_RX_CLK),
-+	GPIO_FN(MII_RX_CLK), GPIO_FN(VI1_CLK), GPIO_FN(AVB_RX_DV),
-+	GPIO_FN(MII_RX_DV), GPIO_FN(VI1_DATA0_VI1_B0), GPIO_FN(SCIFA1_SCK_D),
-+	GPIO_FN(AVB_CRS), GPIO_FN(MII_CRS), GPIO_FN(VI1_DATA1_VI1_B1),
-+	GPIO_FN(SCIFA1_RXD_D), GPIO_FN(AVB_MDC), GPIO_FN(MII_MDC),
-+	GPIO_FN(VI1_DATA2_VI1_B2), GPIO_FN(SCIFA1_TXD_D), GPIO_FN(AVB_MDIO),
-+	GPIO_FN(MII_MDIO), GPIO_FN(VI1_DATA3_VI1_B3), GPIO_FN(SCIFA1_CTS_N_D),
-+	GPIO_FN(AVB_GTX_CLK), GPIO_FN(VI1_DATA4_VI1_B4),
-+	GPIO_FN(SCIFA1_RTS_N_D), GPIO_FN(AVB_MAGIC), GPIO_FN(MII_MAGIC),
-+	GPIO_FN(VI1_DATA5_VI1_B5), GPIO_FN(AVB_PHY_INT),
-+	GPIO_FN(VI1_DATA6_VI1_B6), GPIO_FN(AVB_GTXREFCLK),
-+	GPIO_FN(SD0_CLK), GPIO_FN(VI1_DATA0_VI1_B0_B), GPIO_FN(SD0_CMD),
-+	GPIO_FN(SCIFB1_SCK_B), GPIO_FN(VI1_DATA1_VI1_B1_B),
-+
-+	/*IPSR9*/
-+	GPIO_FN(SD0_DAT0), GPIO_FN(SCIFB1_RXD_B), GPIO_FN(VI1_DATA2_VI1_B2_B),
-+	GPIO_FN(SD0_DAT1), GPIO_FN(SCIFB1_TXD_B), GPIO_FN(VI1_DATA3_VI1_B3_B),
-+	GPIO_FN(SD0_DAT2), GPIO_FN(SCIFB1_CTS_N_B), GPIO_FN(VI1_DATA4_VI1_B4_B),
-+	GPIO_FN(SD0_DAT3), GPIO_FN(SCIFB1_RTS_N_B), GPIO_FN(VI1_DATA5_VI1_B5_B),
-+	GPIO_FN(SD0_CD), GPIO_FN(MMC0_D6), GPIO_FN(TS_SDEN0_B),
-+	GPIO_FN(USB0_EXTP), GPIO_FN(GLO_SCLK), GPIO_FN(VI1_DATA6_VI1_B6_B),
-+	GPIO_FN(SCL1_B), GPIO_FN(SCL1_CIS_B), GPIO_FN(VI2_DATA6_VI2_B6_B),
-+	GPIO_FN(SD0_WP), GPIO_FN(MMC0_D7), GPIO_FN(TS_SPSYNC0_B),
-+	GPIO_FN(USB0_IDIN), GPIO_FN(GLO_SDATA), GPIO_FN(VI1_DATA7_VI1_B7_B),
-+	GPIO_FN(SDA1_B), GPIO_FN(SDA1_CIS_B), GPIO_FN(VI2_DATA7_VI2_B7_B),
-+	GPIO_FN(SD1_CLK), GPIO_FN(AVB_TX_EN), GPIO_FN(MII_TX_EN),
-+	GPIO_FN(SD1_CMD), GPIO_FN(AVB_TX_ER), GPIO_FN(MII_TX_ER),
-+	GPIO_FN(SCIFB0_SCK_B), GPIO_FN(SD1_DAT0), GPIO_FN(AVB_TX_CLK),
-+	GPIO_FN(MII_TX_CLK), GPIO_FN(SCIFB0_RXD_B), GPIO_FN(SD1_DAT1),
-+	GPIO_FN(AVB_LINK), GPIO_FN(MII_LINK), GPIO_FN(SCIFB0_TXD_B),
-+	GPIO_FN(SD1_DAT2), GPIO_FN(AVB_COL), GPIO_FN(MII_COL),
-+	GPIO_FN(SCIFB0_CTS_N_B), GPIO_FN(SD1_DAT3), GPIO_FN(AVB_RXD0),
-+	GPIO_FN(MII_RXD0), GPIO_FN(SCIFB0_RTS_N_B), GPIO_FN(SD1_CD),
-+	GPIO_FN(MMC1_D6), GPIO_FN(TS_SDEN1), GPIO_FN(USB1_EXTP),
-+	GPIO_FN(GLO_SS), GPIO_FN(VI0_CLK_B), GPIO_FN(SCL2_D),
-+	GPIO_FN(SCL2_CIS_D), GPIO_FN(SIM0_CLK_B), GPIO_FN(VI3_CLK_B),
-+
-+	/*IPSR10*/
-+	GPIO_FN(SD1_WP), GPIO_FN(MMC1_D7), GPIO_FN(TS_SPSYNC1),
-+	GPIO_FN(USB1_IDIN), GPIO_FN(GLO_RFON), GPIO_FN(VI1_CLK_B),
-+	GPIO_FN(SDA2_D), GPIO_FN(SDA2_CIS_D), GPIO_FN(SIM0_D_B),
-+	GPIO_FN(SD2_CLK), GPIO_FN(MMC0_CLK), GPIO_FN(SIM0_CLK),
-+	GPIO_FN(VI0_DATA0_VI0_B0_B), GPIO_FN(TS_SDEN0_C), GPIO_FN(GLO_SCLK_B),
-+	GPIO_FN(VI3_DATA0_B), GPIO_FN(SD2_CMD), GPIO_FN(MMC0_CMD),
-+	GPIO_FN(SIM0_D), GPIO_FN(VI0_DATA1_VI0_B1_B), GPIO_FN(SCIFB1_SCK_E),
-+	GPIO_FN(SCK1_D), GPIO_FN(TS_SPSYNC0_C), GPIO_FN(GLO_SDATA_B),
-+	GPIO_FN(VI3_DATA1_B), GPIO_FN(SD2_DAT0), GPIO_FN(MMC0_D0),
-+	GPIO_FN(FMCLK_B), GPIO_FN(VI0_DATA2_VI0_B2_B), GPIO_FN(SCIFB1_RXD_E),
-+	GPIO_FN(RX1_D), GPIO_FN(TS_SDAT0_C), GPIO_FN(GLO_SS_B),
-+	GPIO_FN(VI3_DATA2_B), GPIO_FN(SD2_DAT1), GPIO_FN(MMC0_D1),
-+	GPIO_FN(FMIN_B), GPIO_FN(RDS_DATA), GPIO_FN(VI0_DATA3_VI0_B3_B),
-+	GPIO_FN(SCIFB1_TXD_E), GPIO_FN(TX1_D), GPIO_FN(TS_SCK0_C),
-+	GPIO_FN(GLO_RFON_B), GPIO_FN(VI3_DATA3_B), GPIO_FN(SD2_DAT2),
-+	GPIO_FN(MMC0_D2), GPIO_FN(BPFCLK_B), GPIO_FN(RDS_CLK),
-+	GPIO_FN(VI0_DATA4_VI0_B4_B), GPIO_FN(HRX0_D), GPIO_FN(TS_SDEN1_B),
-+	GPIO_FN(GLO_Q0_B), GPIO_FN(VI3_DATA4_B), GPIO_FN(SD2_DAT3),
-+	GPIO_FN(MMC0_D3), GPIO_FN(SIM0_RST), GPIO_FN(VI0_DATA5_VI0_B5_B),
-+	GPIO_FN(HTX0_D), GPIO_FN(TS_SPSYNC1_B), GPIO_FN(GLO_Q1_B),
-+	GPIO_FN(VI3_DATA5_B), GPIO_FN(SD2_CD), GPIO_FN(MMC0_D4),
-+	GPIO_FN(TS_SDAT0_B), GPIO_FN(USB2_EXTP), GPIO_FN(GLO_I0),
-+	GPIO_FN(VI0_DATA6_VI0_B6_B), GPIO_FN(HCTS0_N_D), GPIO_FN(TS_SDAT1_B),
-+	GPIO_FN(GLO_I0_B), GPIO_FN(VI3_DATA6_B),
-+
-+	/*IPSR11*/
-+	GPIO_FN(SD2_WP), GPIO_FN(MMC0_D5), GPIO_FN(TS_SCK0_B),
-+	GPIO_FN(USB2_IDIN), GPIO_FN(GLO_I1), GPIO_FN(VI0_DATA7_VI0_B7_B),
-+	GPIO_FN(HRTS0_N_D), GPIO_FN(TS_SCK1_B), GPIO_FN(GLO_I1_B),
-+	GPIO_FN(VI3_DATA7_B), GPIO_FN(SD3_CLK), GPIO_FN(MMC1_CLK),
-+	GPIO_FN(SD3_CMD), GPIO_FN(MMC1_CMD), GPIO_FN(MTS_N), GPIO_FN(SD3_DAT0),
-+	GPIO_FN(MMC1_D0), GPIO_FN(STM_N), GPIO_FN(SD3_DAT1), GPIO_FN(MMC1_D1),
-+	GPIO_FN(MDATA), GPIO_FN(SD3_DAT2), GPIO_FN(MMC1_D2), GPIO_FN(SDATA),
-+	GPIO_FN(SD3_DAT3), GPIO_FN(MMC1_D3), GPIO_FN(SCKZ), GPIO_FN(SD3_CD),
-+	GPIO_FN(MMC1_D4), GPIO_FN(TS_SDAT1), GPIO_FN(VSP), GPIO_FN(GLO_Q0),
-+	GPIO_FN(SIM0_RST_B), GPIO_FN(SD3_WP), GPIO_FN(MMC1_D5),
-+	GPIO_FN(TS_SCK1), GPIO_FN(GLO_Q1), GPIO_FN(FMIN_C), GPIO_FN(RDS_DATA_B),
-+	GPIO_FN(FMIN_E), GPIO_FN(RDS_DATA_D), GPIO_FN(FMIN_F),
-+	GPIO_FN(RDS_DATA_E), GPIO_FN(MLB_CLK), GPIO_FN(SCL2_B),
-+	GPIO_FN(SCL2_CIS_B), GPIO_FN(MLB_SIG), GPIO_FN(SCIFB1_RXD_D),
-+	GPIO_FN(RX1_C), GPIO_FN(SDA2_B), GPIO_FN(SDA2_CIS_B), GPIO_FN(MLB_DAT),
-+	GPIO_FN(SPV_EVEN), GPIO_FN(SCIFB1_TXD_D), GPIO_FN(TX1_C),
-+	GPIO_FN(BPFCLK_C), GPIO_FN(RDS_CLK_B), GPIO_FN(SSI_SCK0129),
-+	GPIO_FN(CAN_CLK_B), GPIO_FN(MOUT0),
-+
-+	/*IPSR12*/
-+	GPIO_FN(SSI_WS0129), GPIO_FN(CAN0_TX_B), GPIO_FN(MOUT1),
-+	GPIO_FN(SSI_SDATA0), GPIO_FN(CAN0_RX_B), GPIO_FN(MOUT2),
-+	GPIO_FN(SSI_SDATA1), GPIO_FN(CAN1_TX_B), GPIO_FN(MOUT5),
-+	GPIO_FN(SSI_SDATA2), GPIO_FN(CAN1_RX_B), GPIO_FN(SSI_SCK1),
-+	GPIO_FN(MOUT6), GPIO_FN(SSI_SCK34), GPIO_FN(STP_OPWM_0),
-+	GPIO_FN(SCIFB0_SCK), GPIO_FN(MSIOF1_SCK), GPIO_FN(CAN_DEBUG_HW_TRIGGER),
-+	GPIO_FN(SSI_WS34), GPIO_FN(STP_IVCXO27_0), GPIO_FN(SCIFB0_RXD),
-+	GPIO_FN(MSIOF1_SYNC), GPIO_FN(CAN_STEP0), GPIO_FN(SSI_SDATA3),
-+	GPIO_FN(STP_ISCLK_0), GPIO_FN(SCIFB0_TXD), GPIO_FN(MSIOF1_SS1),
-+	GPIO_FN(CAN_TXCLK), GPIO_FN(SSI_SCK4), GPIO_FN(STP_ISD_0),
-+	GPIO_FN(SCIFB0_CTS_N), GPIO_FN(MSIOF1_SS2), GPIO_FN(SSI_SCK5_C),
-+	GPIO_FN(CAN_DEBUGOUT0), GPIO_FN(SSI_WS4), GPIO_FN(STP_ISEN_0),
-+	GPIO_FN(SCIFB0_RTS_N), GPIO_FN(MSIOF1_TXD), GPIO_FN(SSI_WS5_C),
-+	GPIO_FN(CAN_DEBUGOUT1), GPIO_FN(SSI_SDATA4), GPIO_FN(STP_ISSYNC_0),
-+	GPIO_FN(MSIOF1_RXD), GPIO_FN(CAN_DEBUGOUT2), GPIO_FN(SSI_SCK5),
-+	GPIO_FN(SCIFB1_SCK), GPIO_FN(IERX_B), GPIO_FN(DU2_EXHSYNC_DU2_HSYNC),
-+	GPIO_FN(QSTH_QHS), GPIO_FN(CAN_DEBUGOUT3), GPIO_FN(SSI_WS5),
-+	GPIO_FN(SCIFB1_RXD), GPIO_FN(IECLK_B), GPIO_FN(DU2_EXVSYNC_DU2_VSYNC),
-+	GPIO_FN(QSTB_QHE), GPIO_FN(CAN_DEBUGOUT4),
-+
-+	/*IPSR13*/
-+	GPIO_FN(SSI_SDATA5), GPIO_FN(SCIFB1_TXD), GPIO_FN(IETX_B),
-+	GPIO_FN(DU2_DR2), GPIO_FN(LCDOUT2), GPIO_FN(CAN_DEBUGOUT5),
-+	GPIO_FN(SSI_SCK6), GPIO_FN(SCIFB1_CTS_N), GPIO_FN(BPFCLK_D),
-+	GPIO_FN(RDS_CLK_C), GPIO_FN(DU2_DR3), GPIO_FN(LCDOUT3),
-+	GPIO_FN(CAN_DEBUGOUT6), GPIO_FN(BPFCLK_F), GPIO_FN(RDS_CLK_E),
-+	GPIO_FN(SSI_WS6), GPIO_FN(SCIFB1_RTS_N), GPIO_FN(CAN0_TX_D),
-+	GPIO_FN(DU2_DR4), GPIO_FN(LCDOUT4), GPIO_FN(CAN_DEBUGOUT7),
-+	GPIO_FN(SSI_SDATA6), GPIO_FN(FMIN_D), GPIO_FN(RDS_DATA_C),
-+	GPIO_FN(DU2_DR5), GPIO_FN(LCDOUT5), GPIO_FN(CAN_DEBUGOUT8),
-+	GPIO_FN(SSI_SCK78), GPIO_FN(STP_IVCXO27_1), GPIO_FN(SCK1),
-+	GPIO_FN(SCIFA1_SCK), GPIO_FN(DU2_DR6), GPIO_FN(LCDOUT6),
-+	GPIO_FN(CAN_DEBUGOUT9), GPIO_FN(SSI_WS78), GPIO_FN(STP_ISCLK_1),
-+	GPIO_FN(SCIFB2_SCK), GPIO_FN(SCIFA2_CTS_N), GPIO_FN(DU2_DR7),
-+	GPIO_FN(LCDOUT7), GPIO_FN(CAN_DEBUGOUT10), GPIO_FN(SSI_SDATA7),
-+	GPIO_FN(STP_ISD_1), GPIO_FN(SCIFB2_RXD), GPIO_FN(SCIFA2_RTS_N),
-+	GPIO_FN(TCLK2), GPIO_FN(QSTVA_QVS), GPIO_FN(CAN_DEBUGOUT11),
-+	GPIO_FN(BPFCLK_E), GPIO_FN(RDS_CLK_D), GPIO_FN(SSI_SDATA7_B),
-+	GPIO_FN(FMIN_G), GPIO_FN(RDS_DATA_F), GPIO_FN(SSI_SDATA8),
-+	GPIO_FN(STP_ISEN_1), GPIO_FN(SCIFB2_TXD), GPIO_FN(CAN0_TX_C),
-+	GPIO_FN(CAN_DEBUGOUT12), GPIO_FN(SSI_SDATA8_B), GPIO_FN(SSI_SDATA9),
-+	GPIO_FN(STP_ISSYNC_1), GPIO_FN(SCIFB2_CTS_N), GPIO_FN(SSI_WS1),
-+	GPIO_FN(SSI_SDATA5_C), GPIO_FN(CAN_DEBUGOUT13), GPIO_FN(AUDIO_CLKA),
-+	GPIO_FN(SCIFB2_RTS_N), GPIO_FN(CAN_DEBUGOUT14),
-+
-+	/*IPSR14*/
-+	GPIO_FN(AUDIO_CLKB), GPIO_FN(SCIF_CLK), GPIO_FN(CAN0_RX_D),
-+	GPIO_FN(DVC_MUTE), GPIO_FN(CAN0_RX_C), GPIO_FN(CAN_DEBUGOUT15),
-+	GPIO_FN(REMOCON), GPIO_FN(SCIFA0_SCK), GPIO_FN(HSCK1), GPIO_FN(SCK0),
-+	GPIO_FN(MSIOF3_SS2), GPIO_FN(DU2_DG2), GPIO_FN(LCDOUT10),
-+	GPIO_FN(SDA1_C), GPIO_FN(SDA1_CIS_C), GPIO_FN(SCIFA0_RXD),
-+	GPIO_FN(HRX1), GPIO_FN(RX0), GPIO_FN(DU2_DR0), GPIO_FN(LCDOUT0),
-+	GPIO_FN(SCIFA0_TXD), GPIO_FN(HTX1), GPIO_FN(TX0), GPIO_FN(DU2_DR1),
-+	GPIO_FN(LCDOUT1), GPIO_FN(SCIFA0_CTS_N), GPIO_FN(HCTS1_N),
-+	GPIO_FN(CTS0_N), GPIO_FN(MSIOF3_SYNC), GPIO_FN(DU2_DG3),
-+	GPIO_FN(LCDOUT11), GPIO_FN(PWM0_B), GPIO_FN(SCL1_C),
-+	GPIO_FN(SCL1_CIS_C), GPIO_FN(SCIFA0_RTS_N), GPIO_FN(HRTS1_N),
-+	GPIO_FN(RTS0_N_TANS), GPIO_FN(MSIOF3_SS1), GPIO_FN(DU2_DG0),
-+	GPIO_FN(LCDOUT8), GPIO_FN(PWM1_B), GPIO_FN(SCIFA1_RXD), GPIO_FN(AD_DI),
-+	GPIO_FN(RX1), GPIO_FN(DU2_EXODDF_DU2_ODDF_DISP_CDE), GPIO_FN(QCPV_QDE),
-+	GPIO_FN(SCIFA1_TXD), GPIO_FN(AD_DO), GPIO_FN(TX1), GPIO_FN(DU2_DG1),
-+	GPIO_FN(LCDOUT9), GPIO_FN(SCIFA1_CTS_N), GPIO_FN(AD_CLK),
-+	GPIO_FN(CTS1_N), GPIO_FN(MSIOF3_RXD), GPIO_FN(DU0_DOTCLKOUT),
-+	GPIO_FN(QCLK), GPIO_FN(SCIFA1_RTS_N), GPIO_FN(AD_NCS_N),
-+	GPIO_FN(RTS1_N_TANS), GPIO_FN(MSIOF3_TXD), GPIO_FN(DU1_DOTCLKOUT),
-+	GPIO_FN(QSTVB_QVE), GPIO_FN(HRTS0_N_C),
-+
-+	/*IPSR15*/
-+	GPIO_FN(SCIFA2_SCK), GPIO_FN(FMCLK), GPIO_FN(MSIOF3_SCK),
-+	GPIO_FN(DU2_DG7), GPIO_FN(LCDOUT15), GPIO_FN(SCIF_CLK_B),
-+	GPIO_FN(SCIFA2_RXD), GPIO_FN(FMIN), GPIO_FN(DU2_DB0),
-+	GPIO_FN(LCDOUT16), GPIO_FN(SCL2), GPIO_FN(SCL2_CIS),
-+	GPIO_FN(SCIFA2_TXD), GPIO_FN(BPFCLK), GPIO_FN(DU2_DB1),
-+	GPIO_FN(LCDOUT17), GPIO_FN(SDA2), GPIO_FN(SDA2_CIS), GPIO_FN(HSCK0),
-+	GPIO_FN(TS_SDEN0), GPIO_FN(DU2_DG4), GPIO_FN(LCDOUT12),
-+	GPIO_FN(HCTS0_N_C), GPIO_FN(HRX0), GPIO_FN(DU2_DB2), GPIO_FN(LCDOUT18),
-+	GPIO_FN(HTX0), GPIO_FN(DU2_DB3), GPIO_FN(LCDOUT19), GPIO_FN(HCTS0_N),
-+	GPIO_FN(SSI_SCK9), GPIO_FN(DU2_DB4), GPIO_FN(LCDOUT20),
-+	GPIO_FN(HRTS0_N), GPIO_FN(SSI_WS9), GPIO_FN(DU2_DB5),
-+	GPIO_FN(LCDOUT21), GPIO_FN(MSIOF0_SCK), GPIO_FN(TS_SDAT0),
-+	GPIO_FN(ADICLK), GPIO_FN(DU2_DB6), GPIO_FN(LCDOUT22),
-+	GPIO_FN(MSIOF0_SYNC), GPIO_FN(TS_SCK0), GPIO_FN(SSI_SCK2),
-+	GPIO_FN(ADIDATA), GPIO_FN(DU2_DB7), GPIO_FN(LCDOUT23),
-+	GPIO_FN(SCIFA2_RXD_B), GPIO_FN(MSIOF0_SS1), GPIO_FN(ADICHS0),
-+	GPIO_FN(DU2_DG5), GPIO_FN(LCDOUT13), GPIO_FN(MSIOF0_TXD),
-+	GPIO_FN(ADICHS1), GPIO_FN(DU2_DG6), GPIO_FN(LCDOUT14),
-+
-+	/*IPSR16*/
-+	GPIO_FN(MSIOF0_SS2), GPIO_FN(AUDIO_CLKOUT), GPIO_FN(ADICHS2),
-+	GPIO_FN(DU2_DISP), GPIO_FN(QPOLA), GPIO_FN(HTX0_C),
-+	GPIO_FN(SCIFA2_TXD_B), GPIO_FN(MSIOF0_RXD), GPIO_FN(TS_SPSYNC0),
-+	GPIO_FN(SSI_WS2), GPIO_FN(ADICS_SAMP), GPIO_FN(DU2_CDE),
-+	GPIO_FN(QPOLB), GPIO_FN(HRX0_C), GPIO_FN(USB1_PWEN),
-+	GPIO_FN(AUDIO_CLKOUT_D), GPIO_FN(USB1_OVC), GPIO_FN(TCLK1_B),
-+};
-+
-+static struct pinmux_cfg_reg pinmux_config_regs[] = {
-+	{ PINMUX_CFG_REG("GPSR0", 0xE6060004, 32, 1) {
-+		GP_0_31_FN, FN_IP3_17_15,
-+		GP_0_30_FN, FN_IP3_14_12,
-+		GP_0_29_FN, FN_IP3_11_8,
-+		GP_0_28_FN, FN_IP3_7_4,
-+		GP_0_27_FN, FN_IP3_3_0,
-+		GP_0_26_FN, FN_IP2_28_26,
-+		GP_0_25_FN, FN_IP2_25_22,
-+		GP_0_24_FN, FN_IP2_21_18,
-+		GP_0_23_FN, FN_IP2_17_15,
-+		GP_0_22_FN, FN_IP2_14_12,
-+		GP_0_21_FN, FN_IP2_11_9,
-+		GP_0_20_FN, FN_IP2_8_6,
-+		GP_0_19_FN, FN_IP2_5_3,
-+		GP_0_18_FN, FN_IP2_2_0,
-+		GP_0_17_FN, FN_IP1_29_28,
-+		GP_0_16_FN, FN_IP1_27_26,
-+		GP_0_15_FN, FN_IP1_25_22,
-+		GP_0_14_FN, FN_IP1_21_18,
-+		GP_0_13_FN, FN_IP1_17_15,
-+		GP_0_12_FN, FN_IP1_14_12,
-+		GP_0_11_FN, FN_IP1_11_8,
-+		GP_0_10_FN, FN_IP1_7_4,
-+		GP_0_9_FN, FN_IP1_3_0,
-+		GP_0_8_FN, FN_IP0_30_27,
-+		GP_0_7_FN, FN_IP0_26_23,
-+		GP_0_6_FN, FN_IP0_22_20,
-+		GP_0_5_FN, FN_IP0_19_16,
-+		GP_0_4_FN, FN_IP0_15_12,
-+		GP_0_3_FN, FN_IP0_11_9,
-+		GP_0_2_FN, FN_IP0_8_6,
-+		GP_0_1_FN, FN_IP0_5_3,
-+		GP_0_0_FN, FN_IP0_2_0 }
-+	},
-+	{ PINMUX_CFG_REG("GPSR1", 0xE6060008, 32, 1) {
-+		0, 0,
-+		0, 0,
-+		GP_1_29_FN, FN_IP6_13_11,
-+		GP_1_28_FN, FN_IP6_10_9,
-+		GP_1_27_FN, FN_IP6_8_6,
-+		GP_1_26_FN, FN_IP6_5_3,
-+		GP_1_25_FN, FN_IP6_2_0,
-+		GP_1_24_FN, FN_IP5_29_27,
-+		GP_1_23_FN, FN_IP5_26_24,
-+		GP_1_22_FN, FN_IP5_23_21,
-+		GP_1_21_FN, FN_IP5_20_18,
-+		GP_1_20_FN, FN_IP5_17_15,
-+		GP_1_19_FN, FN_IP5_14_13,
-+		GP_1_18_FN, FN_IP5_12_10,
-+		GP_1_17_FN, FN_IP5_9_6,
-+		GP_1_16_FN, FN_IP5_5_3,
-+		GP_1_15_FN, FN_IP5_2_0,
-+		GP_1_14_FN, FN_IP4_29_27,
-+		GP_1_13_FN, FN_IP4_26_24,
-+		GP_1_12_FN, FN_IP4_23_21,
-+		GP_1_11_FN, FN_IP4_20_18,
-+		GP_1_10_FN, FN_IP4_17_15,
-+		GP_1_9_FN, FN_IP4_14_12,
-+		GP_1_8_FN, FN_IP4_11_9,
-+		GP_1_7_FN, FN_IP4_8_6,
-+		GP_1_6_FN, FN_IP4_5_3,
-+		GP_1_5_FN, FN_IP4_2_0,
-+		GP_1_4_FN, FN_IP3_31_29,
-+		GP_1_3_FN, FN_IP3_28_26,
-+		GP_1_2_FN, FN_IP3_25_23,
-+		GP_1_1_FN, FN_IP3_22_20,
-+		GP_1_0_FN, FN_IP3_19_18, }
-+	},
-+	{ PINMUX_CFG_REG("GPSR2", 0xE606000C, 32, 1) {
-+		0, 0,
-+		0, 0,
-+		GP_2_29_FN, FN_IP7_15_13,
-+		GP_2_28_FN, FN_IP7_12_10,
-+		GP_2_27_FN, FN_IP7_9_8,
-+		GP_2_26_FN, FN_IP7_7_6,
-+		GP_2_25_FN, FN_IP7_5_3,
-+		GP_2_24_FN, FN_IP7_2_0,
-+		GP_2_23_FN, FN_IP6_31_29,
-+		GP_2_22_FN, FN_IP6_28_26,
-+		GP_2_21_FN, FN_IP6_25_23,
-+		GP_2_20_FN, FN_IP6_22_20,
-+		GP_2_19_FN, FN_IP6_19_17,
-+		GP_2_18_FN, FN_IP6_16_14,
-+		GP_2_17_FN, FN_VI1_DATA7_VI1_B7,
-+		GP_2_16_FN, FN_IP8_27,
-+		GP_2_15_FN, FN_IP8_26,
-+		GP_2_14_FN, FN_IP8_25_24,
-+		GP_2_13_FN, FN_IP8_23_22,
-+		GP_2_12_FN, FN_IP8_21_20,
-+		GP_2_11_FN, FN_IP8_19_18,
-+		GP_2_10_FN, FN_IP8_17_16,
-+		GP_2_9_FN, FN_IP8_15_14,
-+		GP_2_8_FN, FN_IP8_13_12,
-+		GP_2_7_FN, FN_IP8_11_10,
-+		GP_2_6_FN, FN_IP8_9_8,
-+		GP_2_5_FN, FN_IP8_7_6,
-+		GP_2_4_FN, FN_IP8_5_4,
-+		GP_2_3_FN, FN_IP8_3_2,
-+		GP_2_2_FN, FN_IP8_1_0,
-+		GP_2_1_FN, FN_IP7_30_29,
-+		GP_2_0_FN, FN_IP7_28_27 }
-+	},
-+	{ PINMUX_CFG_REG("GPSR3", 0xE6060010, 32, 1) {
-+		GP_3_31_FN, FN_IP11_21_18,
-+		GP_3_30_FN, FN_IP11_17_15,
-+		GP_3_29_FN, FN_IP11_14_13,
-+		GP_3_28_FN, FN_IP11_12_11,
-+		GP_3_27_FN, FN_IP11_10_9,
-+		GP_3_26_FN, FN_IP11_8_7,
-+		GP_3_25_FN, FN_IP11_6_5,
-+		GP_3_24_FN, FN_IP11_4,
-+		GP_3_23_FN, FN_IP11_3_0,
-+		GP_3_22_FN, FN_IP10_29_26,
-+		GP_3_21_FN, FN_IP10_25_23,
-+		GP_3_20_FN, FN_IP10_22_19,
-+		GP_3_19_FN, FN_IP10_18_15,
-+		GP_3_18_FN, FN_IP10_14_11,
-+		GP_3_17_FN, FN_IP10_10_7,
-+		GP_3_16_FN, FN_IP10_6_4,
-+		GP_3_15_FN, FN_IP10_3_0,
-+		GP_3_14_FN, FN_IP9_31_28,
-+		GP_3_13_FN, FN_IP9_27_26,
-+		GP_3_12_FN, FN_IP9_25_24,
-+		GP_3_11_FN, FN_IP9_23_22,
-+		GP_3_10_FN, FN_IP9_21_20,
-+		GP_3_9_FN, FN_IP9_19_18,
-+		GP_3_8_FN, FN_IP9_17_16,
-+		GP_3_7_FN, FN_IP9_15_12,
-+		GP_3_6_FN, FN_IP9_11_8,
-+		GP_3_5_FN, FN_IP9_7_6,
-+		GP_3_4_FN, FN_IP9_5_4,
-+		GP_3_3_FN, FN_IP9_3_2,
-+		GP_3_2_FN, FN_IP9_1_0,
-+		GP_3_1_FN, FN_IP8_30_29,
-+		GP_3_0_FN, FN_IP8_28 }
-+	},
-+	{ PINMUX_CFG_REG("GPSR4", 0xE6060014, 32, 1) {
-+		GP_4_31_FN, FN_IP14_18_16,
-+		GP_4_30_FN, FN_IP14_15_12,
-+		GP_4_29_FN, FN_IP14_11_9,
-+		GP_4_28_FN, FN_IP14_8_6,
-+		GP_4_27_FN, FN_IP14_5_3,
-+		GP_4_26_FN, FN_IP14_2_0,
-+		GP_4_25_FN, FN_IP13_30_29,
-+		GP_4_24_FN, FN_IP13_28_26,
-+		GP_4_23_FN, FN_IP13_25_23,
-+		GP_4_22_FN, FN_IP13_22_19,
-+		GP_4_21_FN, FN_IP13_18_16,
-+		GP_4_20_FN, FN_IP13_15_13,
-+		GP_4_19_FN, FN_IP13_12_10,
-+		GP_4_18_FN, FN_IP13_9_7,
-+		GP_4_17_FN, FN_IP13_6_3,
-+		GP_4_16_FN, FN_IP13_2_0,
-+		GP_4_15_FN, FN_IP12_30_28,
-+		GP_4_14_FN, FN_IP12_27_25,
-+		GP_4_13_FN, FN_IP12_24_23,
-+		GP_4_12_FN, FN_IP12_22_20,
-+		GP_4_11_FN, FN_IP12_19_17,
-+		GP_4_10_FN, FN_IP12_16_14,
-+		GP_4_9_FN, FN_IP12_13_11,
-+		GP_4_8_FN, FN_IP12_10_8,
-+		GP_4_7_FN, FN_IP12_7_6,
-+		GP_4_6_FN, FN_IP12_5_4,
-+		GP_4_5_FN, FN_IP12_3_2,
-+		GP_4_4_FN, FN_IP12_1_0,
-+		GP_4_3_FN, FN_IP11_31_30,
-+		GP_4_2_FN, FN_IP11_29_27,
-+		GP_4_1_FN, FN_IP11_26_24,
-+		GP_4_0_FN, FN_IP11_23_22 }
-+	},
-+	{ PINMUX_CFG_REG("GPSR5", 0xE6060018, 32, 1) {
-+		GP_5_31_FN, FN_IP7_24_22,
-+		GP_5_30_FN, FN_IP7_21_19,
-+		GP_5_29_FN, FN_IP7_18_16,
-+		GP_5_28_FN, FN_DU_DOTCLKIN2,
-+		GP_5_27_FN, FN_IP7_26_25,
-+		GP_5_26_FN, FN_DU_DOTCLKIN0,
-+		GP_5_25_FN, FN_AVS2,
-+		GP_5_24_FN, FN_AVS1,
-+		GP_5_23_FN, FN_USB2_OVC,
-+		GP_5_22_FN, FN_USB2_PWEN,
-+		GP_5_21_FN, FN_IP16_7,
-+		GP_5_20_FN, FN_IP16_6,
-+		GP_5_19_FN, FN_USB0_OVC_VBUS,
-+		GP_5_18_FN, FN_USB0_PWEN,
-+		GP_5_17_FN, FN_IP16_5_3,
-+		GP_5_16_FN, FN_IP16_2_0,
-+		GP_5_15_FN, FN_IP15_29_28,
-+		GP_5_14_FN, FN_IP15_27_26,
-+		GP_5_13_FN, FN_IP15_25_23,
-+		GP_5_12_FN, FN_IP15_22_20,
-+		GP_5_11_FN, FN_IP15_19_18,
-+		GP_5_10_FN, FN_IP15_17_16,
-+		GP_5_9_FN, FN_IP15_15_14,
-+		GP_5_8_FN, FN_IP15_13_12,
-+		GP_5_7_FN, FN_IP15_11_9,
-+		GP_5_6_FN, FN_IP15_8_6,
-+		GP_5_5_FN, FN_IP15_5_3,
-+		GP_5_4_FN, FN_IP15_2_0,
-+		GP_5_3_FN, FN_IP14_30_28,
-+		GP_5_2_FN, FN_IP14_27_25,
-+		GP_5_1_FN, FN_IP14_24_22,
-+		GP_5_0_FN, FN_IP14_21_19 }
-+	},
-+	{ PINMUX_CFG_REG_VAR("IPSR0", 0xE6060020, 32,
-+			     1, 4, 4, 3, 4, 4, 3, 3, 3, 3) {
-+		/* IP0_31 [1] */
-+		0, 0,
-+		/* IP0_30_27 [4] */
-+		FN_D8, FN_SCIFA1_SCK_C, FN_AVB_TXD0, FN_MII_TXD0,
-+		FN_VI0_G0, FN_VI0_G0_B, FN_VI2_DATA0_VI2_B0,
-+		0, 0, 0, 0, 0, 0, 0, 0, 0,
-+		/* IP0_26_23 [4] */
-+		FN_D7, FN_AD_DI_B, FN_SDA2_C,
-+		FN_VI3_DATA7, FN_VI0_R3, FN_VI0_R3_B, FN_SDA2_CIS_C,
-+		0, 0, 0, 0, 0, 0, 0, 0, 0,
-+		/* IP0_22_20 [3] */
-+		FN_D6, FN_SCL2_C, FN_VI3_DATA6, FN_VI0_R2, FN_VI0_R2_B,
-+		FN_SCL2_CIS_C, 0, 0,
-+		/* IP0_19_16 [4] */
-+		FN_D5, FN_SCIFB1_TXD_F, FN_SCIFB0_TXD_C, FN_VI3_DATA5,
-+		FN_VI0_R1, FN_VI0_R1_B, FN_TX0_B,
-+		0, 0, 0, 0, 0, 0, 0, 0, 0,
-+		/* IP0_15_12 [4] */
-+		FN_D4, FN_SCIFB1_RXD_F, FN_SCIFB0_RXD_C, FN_VI3_DATA4,
-+		FN_VI0_R0, FN_VI0_R0_B, FN_RX0_B,
-+		0, 0, 0, 0, 0, 0, 0, 0, 0,
-+		/* IP0_11_9 [3] */
-+		FN_D3, FN_MSIOF3_TXD_B,	FN_VI3_DATA3, FN_VI0_G7, FN_VI0_G7_B,
-+		0, 0, 0,
-+		/* IP0_8_6 [3] */
-+		FN_D2, FN_MSIOF3_RXD_B, FN_VI3_DATA2, FN_VI0_G6, FN_VI0_G6_B,
-+		0, 0, 0,
-+		/* IP0_5_3 [3] */
-+		FN_D1, FN_MSIOF3_SYNC_B, FN_VI3_DATA1, FN_VI0_G5, FN_VI0_G5_B,
-+		0, 0, 0,
-+		/* IP0_2_0 [3] */
-+		FN_D0, FN_MSIOF3_SCK_B, FN_VI3_DATA0, FN_VI0_G4, FN_VI0_G4_B,
-+		0, 0, 0, }
-+	},
-+	{ PINMUX_CFG_REG_VAR("IPSR1", 0xE6060024, 32,
-+			     2, 2, 2, 4, 4, 3, 3, 4, 4, 4) {
-+		/* IP1_31_30 [2] */
-+		0, 0, 0, 0,
-+		/* IP1_29_28 [2] */
-+		FN_A1, FN_PWM4, 0, 0,
-+		/* IP1_27_26 [2] */
-+		FN_A0, FN_PWM3, 0, 0,
-+		/* IP1_25_22 [4] */
-+		FN_D15, FN_SCIFB1_TXD_C, FN_AVB_TXD7, FN_TX1_B,
-+		FN_VI0_FIELD, FN_VI0_FIELD_B, FN_VI2_DATA7_VI2_B7,
-+		0, 0, 0, 0, 0, 0, 0, 0, 0,
-+		/* IP1_21_18 [4] */
-+		FN_D14,	FN_SCIFB1_RXD_C, FN_AVB_TXD6, FN_RX1_B,
-+		FN_VI0_CLKENB, FN_VI0_CLKENB_B, FN_VI2_DATA6_VI2_B6,
-+		0, 0, 0, 0, 0, 0, 0, 0, 0,
-+		/* IP1_17_15 [3] */
-+		FN_D13, FN_AVB_TXD5, FN_VI0_VSYNC_N,
-+		FN_VI0_VSYNC_N_B, FN_VI2_DATA5_VI2_B5,
-+		0, 0, 0,
-+		/* IP1_14_12 [3] */
-+		FN_D12, FN_SCIFA1_RTS_N_C, FN_AVB_TXD4,
-+		FN_VI0_HSYNC_N, FN_VI0_HSYNC_N_B, FN_VI2_DATA4_VI2_B4,
-+		0, 0,
-+		/* IP1_11_8 [4] */
-+		FN_D11, FN_SCIFA1_CTS_N_C, FN_AVB_TXD3, FN_MII_TXD3,
-+		FN_VI0_G3, FN_VI0_G3_B, FN_VI2_DATA3_VI2_B3,
-+		0, 0, 0, 0, 0, 0, 0, 0, 0,
-+		/* IP1_7_4 [4] */
-+		FN_D10, FN_SCIFA1_TXD_C, FN_AVB_TXD2, FN_MII_TXD2,
-+		FN_VI0_G2, FN_VI0_G2_B, FN_VI2_DATA2_VI2_B2,
-+		0, 0, 0, 0, 0, 0, 0, 0, 0,
-+		/* IP1_3_0 [4] */
-+		FN_D9, FN_SCIFA1_RXD_C, FN_AVB_TXD1, FN_MII_TXD1,
-+		FN_VI0_G1, FN_VI0_G1_B, FN_VI2_DATA1_VI2_B1,
-+		0, 0, 0, 0, 0, 0, 0, 0, 0, }
-+	},
-+	{ PINMUX_CFG_REG_VAR("IPSR2", 0xE6060028, 32,
-+			     3, 3, 4, 4, 3, 3, 3, 3, 3, 3) {
-+		/* IP2_31_29 [3] */
-+		0, 0, 0, 0, 0, 0, 0, 0,
-+		/* IP2_28_26 [3] */
-+		FN_A10, FN_SSI_SDATA5_B, FN_MSIOF2_SYNC, FN_VI0_R6,
-+		FN_VI0_R6_B, FN_VI2_DATA2_VI2_B2_B, 0, 0,
-+		/* IP2_25_22 [4] */
-+		FN_A9, FN_SCIFA1_CTS_N_B, FN_SSI_WS5_B, FN_VI0_R5,
-+		FN_VI0_R5_B, FN_SCIFB2_TXD_C, 0, FN_VI2_DATA1_VI2_B1_B,
-+		0, 0, 0, 0, 0, 0, 0, 0,
-+		/* IP2_21_18 [4] */
-+		FN_A8, FN_SCIFA1_RXD_B, FN_SSI_SCK5_B, FN_VI0_R4,
-+		FN_VI0_R4_B, FN_SCIFB2_RXD_C, 0, FN_VI2_DATA0_VI2_B0_B,
-+		0, 0, 0, 0, 0, 0, 0, 0,
-+		/* IP2_17_15 [3] */
-+		FN_A7, FN_SCIFA1_SCK_B, FN_AUDIO_CLKOUT_B, FN_TPU0TO3,
-+		0, 0, 0, 0,
-+		/* IP2_14_12 [3] */
-+		FN_A6, FN_SCIFA1_RTS_N_B, FN_TPU0TO2, 0, 0, 0, 0, 0,
-+		/* IP2_11_9 [3] */
-+		FN_A5, FN_SCIFA1_TXD_B, FN_TPU0TO1, 0, 0, 0, 0, 0,
-+		/* IP2_8_6 [3] */
-+		FN_A4, FN_MSIOF1_TXD_B,	FN_TPU0TO0, 0, 0, 0, 0, 0,
-+		/* IP2_5_3 [3] */
-+		FN_A3, FN_PWM6, FN_MSIOF1_SS2_B, 0, 0, 0, 0, 0,
-+		/* IP2_2_0 [3] */
-+		FN_A2, FN_PWM5, FN_MSIOF1_SS1_B, 0, 0, 0, 0, 0,	}
-+	},
-+	{ PINMUX_CFG_REG_VAR("IPSR3", 0xE606002C, 32,
-+			     3, 3, 3, 3, 2, 3, 3, 4, 4, 4) {
-+		/* IP3_31_29 [3] */
-+		FN_A20, FN_SPCLK, FN_VI1_R3, FN_VI1_R3_B, FN_VI2_G4,
-+		0, 0, 0,
-+		/* IP3_28_26 [3] */
-+		FN_A19, FN_AD_NCS_N_B, FN_ATACS01_N, FN_EX_WAIT0_B,
-+		0, 0, 0, 0,
-+		/* IP3_25_23 [3] */
-+		FN_A18, FN_AD_CLK_B, FN_ATAG1_N, 0, 0, 0, 0, 0,
-+		/* IP3_22_20 [3] */
-+		FN_A17, FN_AD_DO_B, FN_ATADIR1_N, 0, 0, 0, 0, 0,
-+		/* IP3_19_18 [2] */
-+		FN_A16, FN_ATAWR1_N, 0, 0,
-+		/* IP3_17_15 [3] */
-+		FN_A15, FN_SCIFB2_SCK_B, FN_ATARD1_N, FN_MSIOF2_SS2,
-+		0, 0, 0, 0,
-+		/* IP3_14_12 [3] */
-+		FN_A14, FN_SCIFB2_TXD_B, FN_ATACS11_N, FN_MSIOF2_SS1,
-+		0, 0, 0, 0,
-+		/* IP3_11_8 [4] */
-+		FN_A13, FN_SCIFB2_RTS_N_B, FN_EX_WAIT2,
-+		FN_MSIOF2_RXD, FN_VI1_R2, FN_VI1_R2_B, FN_VI2_G2,
-+		FN_VI2_DATA5_VI2_B5_B, 0, 0, 0, 0, 0, 0, 0, 0,
-+		/* IP3_7_4 [4] */
-+		FN_A12, FN_SCIFB2_RXD_B, FN_MSIOF2_TXD, FN_VI1_R1,
-+		FN_VI1_R1_B, FN_VI2_G1, FN_VI2_DATA4_VI2_B4_B,
-+		0, 0, 0, 0, 0, 0, 0, 0, 0,
-+		/* IP3_3_0 [4] */
-+		FN_A11, FN_SCIFB2_CTS_N_B, FN_MSIOF2_SCK, FN_VI1_R0,
-+		FN_VI1_R0_B, FN_VI2_G0, FN_VI2_DATA3_VI2_B3_B, 0,
-+		0, 0, 0, 0, 0, 0, 0, 0, }
-+	},
-+	{ PINMUX_CFG_REG_VAR("IPSR4", 0xE6060030, 32,
-+			     2, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3) {
-+		/* IP4_31_30 [2] */
-+		0, 0, 0, 0,
-+		/* IP4_29_27 [3] */
-+		FN_EX_CS2_N, FN_GPS_SIGN, FN_HRTS1_N_B,
-+		FN_VI3_CLKENB, FN_VI1_G0, FN_VI1_G0_B, FN_VI2_R2, 0,
-+		/* IP4_26_24 [3] */
-+		FN_EX_CS1_N, FN_GPS_CLK, FN_HCTS1_N_B, FN_VI1_FIELD,
-+		FN_VI1_FIELD_B, FN_VI2_R1, 0, 0,
-+		/* IP4_23_21 [3] */
-+		FN_EX_CS0_N, FN_HRX1_B, FN_VI1_G5, FN_VI1_G5_B, FN_VI2_R0,
-+		FN_HTX0_B, FN_MSIOF0_SS1_B, 0,
-+		/* IP4_20_18 [3] */
-+		FN_CS1_N_A26, FN_SPEEDIN, FN_VI0_R7, FN_VI0_R7_B,
-+		FN_VI2_CLK, FN_VI2_CLK_B, 0, 0,
-+		/* IP4_17_15 [3] */
-+		FN_CS0_N, FN_VI1_R6, FN_VI1_R6_B, FN_VI2_G3, FN_MSIOF0_SS2_B,
-+		0, 0, 0,
-+		/* IP4_14_12 [3] */
-+		FN_A25, FN_SSL, FN_VI1_G6, FN_VI1_G6_B, FN_VI2_FIELD,
-+		FN_VI2_FIELD_B, 0, 0,
-+		/* IP4_11_9 [3] */
-+		FN_A24, FN_IO3, FN_VI1_R7, FN_VI1_R7_B, FN_VI2_CLKENB,
-+		FN_VI2_CLKENB_B, 0, 0,
-+		/* IP4_8_6 [3] */
-+		FN_A23, FN_IO2, FN_VI1_G7, FN_VI1_G7_B, FN_VI2_G7, 0, 0, 0,
-+		/* IP4_5_3 [3] */
-+		FN_A22, FN_MISO_IO1, FN_VI1_R5, FN_VI1_R5_B, FN_VI2_G6, 0, 0, 0,
-+		/* IP4_2_0 [3] */
-+		FN_A21, FN_MOSI_IO0, FN_VI1_R4, FN_VI1_R4_B, FN_VI2_G5, 0, 0, 0,
-+		}
-+	},
-+	{ PINMUX_CFG_REG_VAR("IPSR5", 0xE6060034, 32,
-+			     2, 3, 3, 3, 3, 3, 2, 3, 4, 3, 3) {
-+		/* IP5_31_30 [2] */
-+		0, 0, 0, 0,
-+		/* IP5_29_27 [3] */
-+		FN_DREQ0_N, FN_VI1_HSYNC_N, FN_VI1_HSYNC_N_B, FN_VI2_R7,
-+		FN_SSI_SCK78_C, FN_SSI_WS78_B, 0, 0,
-+		/* IP5_26_24 [3] */
-+		FN_EX_WAIT0, FN_IRQ3, FN_INTC_IRQ3_N,
-+		FN_VI3_CLK, FN_SCIFA0_RTS_N_B, FN_HRX0_B,
-+		FN_MSIOF0_SCK_B, 0,
-+		/* IP5_23_21 [3] */
-+		FN_WE1_N, FN_IERX, FN_CAN1_RX, FN_VI1_G4,
-+		FN_VI1_G4_B, FN_VI2_R6, FN_SCIFA0_CTS_N_B,
-+		FN_IERX_C, 0,
-+		/* IP5_20_18 [3] */
-+		FN_WE0_N, FN_IECLK, FN_CAN_CLK,
-+		FN_VI2_VSYNC_N, FN_SCIFA0_TXD_B, FN_VI2_VSYNC_N_B, 0, 0,
-+		/* IP5_17_15 [3] */
-+		FN_RD_WR_N, FN_VI1_G3, FN_VI1_G3_B, FN_VI2_R5, FN_SCIFA0_RXD_B,
-+		FN_INTC_IRQ4_N, 0, 0,
-+		/* IP5_14_13 [2] */
-+		FN_RD_N, FN_CAN0_TX, FN_SCIFA0_SCK_B, 0,
-+		/* IP5_12_10 [3] */
-+		FN_BS_N, FN_IETX, FN_HTX1_B, FN_CAN1_TX, FN_DRACK0, FN_IETX_C,
-+		0, 0,
-+		/* IP5_9_6 [4] */
-+		FN_EX_CS5_N, FN_CAN0_RX, FN_MSIOF1_RXD_B, FN_VI3_VSYNC_N,
-+		FN_VI1_G2, FN_VI1_G2_B, FN_VI2_R4, FN_SDA1, FN_INTC_EN1_N,
-+		FN_SDA1_CIS, 0, 0, 0, 0, 0, 0,
-+		/* IP5_5_3 [3] */
-+		FN_EX_CS4_N, FN_MSIOF1_SCK_B, FN_VI3_HSYNC_N,
-+		FN_VI2_HSYNC_N, FN_SCL1, FN_VI2_HSYNC_N_B,
-+		FN_INTC_EN0_N, FN_SCL1_CIS,
-+		/* IP5_2_0 [3] */
-+		FN_EX_CS3_N, FN_GPS_MAG, FN_VI3_FIELD, FN_VI1_G1, FN_VI1_G1_B,
-+		FN_VI2_R3, 0, 0, }
-+	},
-+	{ PINMUX_CFG_REG_VAR("IPSR6", 0xE6060038, 32,
-+			     3, 3, 3, 3, 3, 3, 3, 2, 3, 3, 3) {
-+		/* IP6_31_29 [3] */
-+		FN_ETH_REF_CLK, FN_RMII_REF_CLK, FN_HCTS0_N_E,
-+		FN_STP_IVCXO27_1_B, FN_HRX0_F, 0, 0, 0,
-+		/* IP6_28_26 [3] */
-+		FN_ETH_LINK, FN_RMII_LINK, FN_HTX0_E,
-+		FN_STP_IVCXO27_0_B, FN_SCIFB1_TXD_G, FN_TX1_E, 0, 0,
-+		/* IP6_25_23 [3] */
-+		FN_ETH_RXD1, FN_RMII_RXD1, FN_HRX0_E, FN_STP_ISSYNC_0_B,
-+		FN_TS_SCK0_D, FN_GLO_I1_C, FN_SCIFB1_RXD_G, FN_RX1_E,
-+		/* IP6_22_20 [3] */
-+		FN_ETH_RXD0, FN_RMII_RXD0, FN_STP_ISEN_0_B, FN_TS_SDAT0_D,
-+		FN_GLO_I0_C, FN_SCIFB1_SCK_G, FN_SCK1_E, 0,
-+		/* IP6_19_17 [3] */
-+		FN_ETH_RX_ER, FN_RMII_RX_ER, FN_STP_ISD_0_B,
-+		FN_TS_SPSYNC0_D, FN_GLO_Q1_C, FN_SDA2_E, FN_SDA2_CIS_E, 0,
-+		/* IP6_16_14 [3] */
-+		FN_ETH_CRS_DV, FN_RMII_CRS_DV, FN_STP_ISCLK_0_B,
-+		FN_TS_SDEN0_D, FN_GLO_Q0_C, FN_SCL2_E,
-+		FN_SCL2_CIS_E, 0,
-+		/* IP6_13_11 [3] */
-+		FN_DACK2, FN_IRQ2, FN_INTC_IRQ2_N,
-+		FN_SSI_SDATA6_B, FN_HRTS0_N_B, FN_MSIOF0_RXD_B, 0, 0,
-+		/* IP6_10_9 [2] */
-+		FN_DREQ2_N, FN_HSCK1_B, FN_HCTS0_N_B, FN_MSIOF0_TXD_B,
-+		/* IP6_8_6 [3] */
-+		FN_DACK1, FN_IRQ1, FN_INTC_IRQ1_N, FN_SSI_WS6_B,
-+		FN_SSI_SDATA8_C, 0, 0, 0,
-+		/* IP6_5_3 [3] */
-+		FN_DREQ1_N, FN_VI1_CLKENB, FN_VI1_CLKENB_B,
-+		FN_SSI_SDATA7_C, FN_SSI_SCK78_B, 0, 0, 0,
-+		/* IP6_2_0 [3] */
-+		FN_DACK0, FN_IRQ0, FN_INTC_IRQ0_N, FN_SSI_SCK6_B,
-+		FN_VI1_VSYNC_N, FN_VI1_VSYNC_N_B, FN_SSI_WS78_C, 0, }
-+	},
-+	{ PINMUX_CFG_REG_VAR("IPSR7", 0xE606003C, 32,
-+			     1, 2, 2, 2, 3, 3, 3, 3, 3, 2, 2, 3, 3) {
-+		/* IP7_31 [1] */
-+		0, 0,
-+		/* IP7_30_29 [2] */
-+		FN_VI0_DATA0_VI0_B0, FN_ATACS10_N, FN_AVB_RXD2,
-+		FN_MII_RXD2,
-+		/* IP7_28_27 [2] */
-+		FN_VI0_CLK, FN_ATACS00_N, FN_AVB_RXD1, FN_MII_RXD1,
-+		/* IP7_26_25 [2] */
-+		FN_DU1_DOTCLKIN, FN_AUDIO_CLKC, FN_AUDIO_CLKOUT_C, 0,
-+		/* IP7_24_22 [3] */
-+		FN_PWM2, FN_PWMFSW0, FN_SCIFA2_RXD_C, FN_PCMWE_N, FN_IECLK_C,
-+		0, 0, 0,
-+		/* IP7_21_19 [3] */
-+		FN_PWM1, FN_SCIFA2_TXD_C, FN_STP_ISSYNC_1_B, FN_TS_SCK1_C,
-+		FN_GLO_RFON_C, FN_PCMOE_N, 0, 0,
-+		/* IP7_18_16 [3] */
-+		FN_PWM0, FN_SCIFA2_SCK_C, FN_STP_ISEN_1_B, FN_TS_SDAT1_C,
-+		FN_GLO_SS_C, 0, 0, 0,
-+		/* IP7_15_13 [3] */
-+		FN_ETH_MDC, FN_RMII_MDC, FN_STP_ISD_1_B,
-+		FN_TS_SPSYNC1_C, FN_GLO_SDATA_C, 0, 0, 0,
-+		/* IP7_12_10 [3] */
-+		FN_ETH_TXD0, FN_RMII_TXD0, FN_STP_ISCLK_1_B, FN_TS_SDEN1_C,
-+		FN_GLO_SCLK_C, 0, 0, 0,
-+		/* IP7_9_8 [2] */
-+		FN_ETH_MAGIC, FN_RMII_MAGIC, FN_SIM0_RST_C, 0,
-+		/* IP7_7_6 [2] */
-+		FN_ETH_TX_EN, FN_RMII_TX_EN, FN_SIM0_CLK_C, FN_HRTS0_N_F,
-+		/* IP7_5_3 [3] */
-+		FN_ETH_TXD1, FN_RMII_TXD1, FN_HTX0_F, FN_BPFCLK_G, FN_RDS_CLK_F,
-+		0, 0, 0,
-+		/* IP7_2_0 [3] */
-+		FN_ETH_MDIO, FN_RMII_MDIO, FN_HRTS0_N_E,
-+		FN_SIM0_D_C, FN_HCTS0_N_F, 0, 0, 0, }
-+	},
-+	{ PINMUX_CFG_REG_VAR("IPSR8", 0xE6060040, 32,
-+			     1, 2, 1, 1, 1, 2, 2, 2, 2, 2, 2,
-+			     2, 2, 2, 2, 2, 2, 2) {
-+		/* IP8_31 [1] */
-+		0, 0,
-+		/* IP8_30_29 [2] */
-+		FN_SD0_CMD, FN_SCIFB1_SCK_B, FN_VI1_DATA1_VI1_B1_B, 0,
-+		/* IP8_28 [1] */
-+		FN_SD0_CLK, FN_VI1_DATA0_VI1_B0_B,
-+		/* IP8_27 [1] */
-+		FN_VI1_DATA6_VI1_B6, FN_AVB_GTXREFCLK,
-+		/* IP8_26 [1] */
-+		FN_VI1_DATA5_VI1_B5, FN_AVB_PHY_INT,
-+		/* IP8_25_24 [2] */
-+		FN_VI1_DATA4_VI1_B4, FN_SCIFA1_RTS_N_D,
-+		FN_AVB_MAGIC, FN_MII_MAGIC,
-+		/* IP8_23_22 [2] */
-+		FN_VI1_DATA3_VI1_B3, FN_SCIFA1_CTS_N_D, FN_AVB_GTX_CLK, 0,
-+		/* IP8_21_20 [2] */
-+		FN_VI1_DATA2_VI1_B2, FN_SCIFA1_TXD_D, FN_AVB_MDIO,
-+		FN_MII_MDIO,
-+		/* IP8_19_18 [2] */
-+		FN_VI1_DATA1_VI1_B1, FN_SCIFA1_RXD_D, FN_AVB_MDC, FN_MII_MDC,
-+		/* IP8_17_16 [2] */
-+		FN_VI1_DATA0_VI1_B0, FN_SCIFA1_SCK_D, FN_AVB_CRS, FN_MII_CRS,
-+		/* IP8_15_14 [2] */
-+		FN_VI1_CLK, FN_AVB_RX_DV, FN_MII_RX_DV, 0,
-+		/* IP8_13_12 [2] */
-+		FN_VI0_DATA7_VI0_B7, FN_AVB_RX_CLK, FN_MII_RX_CLK, 0,
-+		/* IP8_11_10 [2] */
-+		FN_VI0_DATA6_VI0_B6, FN_AVB_RX_ER, FN_MII_RX_ER, 0,
-+		/* IP8_9_8 [2] */
-+		FN_VI0_DATA5_VI0_B5, FN_EX_WAIT1, FN_AVB_RXD7, 0,
-+		/* IP8_7_6 [2] */
-+		FN_VI0_DATA4_VI0_B4, FN_ATAG0_N, FN_AVB_RXD6, 0,
-+		/* IP8_5_4 [2] */
-+		FN_VI0_DATA3_VI0_B3, FN_ATADIR0_N, FN_AVB_RXD5, 0,
-+		/* IP8_3_2 [2] */
-+		FN_VI0_DATA2_VI0_B2, FN_ATAWR0_N, FN_AVB_RXD4, 0,
-+		/* IP8_1_0 [2] */
-+		FN_VI0_DATA1_VI0_B1, FN_ATARD0_N, FN_AVB_RXD3, FN_MII_RXD3, }
-+	},
-+	{ PINMUX_CFG_REG_VAR("IPSR9", 0xE6060044, 32,
-+			     4, 2, 2, 2, 2, 2, 2, 4, 4, 2, 2, 2, 2) {
-+		/* IP9_31_28 [4] */
-+		FN_SD1_CD, FN_MMC1_D6, FN_TS_SDEN1, FN_USB1_EXTP,
-+		FN_GLO_SS, FN_VI0_CLK_B, FN_SCL2_D, FN_SCL2_CIS_D,
-+		FN_SIM0_CLK_B, FN_VI3_CLK_B, 0, 0, 0, 0, 0, 0,
-+		/* IP9_27_26 [2] */
-+		FN_SD1_DAT3, FN_AVB_RXD0, FN_MII_RXD0, FN_SCIFB0_RTS_N_B,
-+		/* IP9_25_24 [2] */
-+		FN_SD1_DAT2, FN_AVB_COL, FN_MII_COL, FN_SCIFB0_CTS_N_B,
-+		/* IP9_23_22 [2] */
-+		FN_SD1_DAT1, FN_AVB_LINK, FN_MII_LINK, FN_SCIFB0_TXD_B,
-+		/* IP9_21_20 [2] */
-+		FN_SD1_DAT0, FN_AVB_TX_CLK, FN_MII_TX_CLK, FN_SCIFB0_RXD_B,
-+		/* IP9_19_18 [2] */
-+		FN_SD1_CMD, FN_AVB_TX_ER, FN_MII_TX_ER, FN_SCIFB0_SCK_B,
-+		/* IP9_17_16 [2] */
-+		FN_SD1_CLK, FN_AVB_TX_EN, FN_MII_TX_EN, 0,
-+		/* IP9_15_12 [4] */
-+		FN_SD0_WP, FN_MMC0_D7, FN_TS_SPSYNC0_B, FN_USB0_IDIN,
-+		FN_GLO_SDATA, FN_VI1_DATA7_VI1_B7_B, FN_SDA1_B,
-+		FN_SDA1_CIS_B, FN_VI2_DATA7_VI2_B7_B, 0, 0, 0, 0, 0, 0, 0,
-+		/* IP9_11_8 [4] */
-+		FN_SD0_CD, FN_MMC0_D6, FN_TS_SDEN0_B, FN_USB0_EXTP,
-+		FN_GLO_SCLK, FN_VI1_DATA6_VI1_B6_B, FN_SCL1_B,
-+		FN_SCL1_CIS_B, FN_VI2_DATA6_VI2_B6_B, 0, 0, 0, 0, 0, 0, 0,
-+		/* IP9_7_6 [2] */
-+		FN_SD0_DAT3, FN_SCIFB1_RTS_N_B, FN_VI1_DATA5_VI1_B5_B, 0,
-+		/* IP9_5_4 [2] */
-+		FN_SD0_DAT2, FN_SCIFB1_CTS_N_B, FN_VI1_DATA4_VI1_B4_B, 0,
-+		/* IP9_3_2 [2] */
-+		FN_SD0_DAT1, FN_SCIFB1_TXD_B, FN_VI1_DATA3_VI1_B3_B, 0,
-+		/* IP9_1_0 [2] */
-+		FN_SD0_DAT0, FN_SCIFB1_RXD_B, FN_VI1_DATA2_VI1_B2_B, 0, }
-+	},
-+	{ PINMUX_CFG_REG_VAR("IPSR10", 0xE6060048, 32,
-+			     2, 4, 3, 4, 4, 4, 4, 3, 4) {
-+		/* IP10_31_30 [2] */
-+		0, 0, 0, 0,
-+		/* IP10_29_26 [4] */
-+		FN_SD2_CD, FN_MMC0_D4, FN_TS_SDAT0_B, FN_USB2_EXTP, FN_GLO_I0,
-+		FN_VI0_DATA6_VI0_B6_B, FN_HCTS0_N_D, FN_TS_SDAT1_B,
-+		FN_GLO_I0_B, FN_VI3_DATA6_B, 0, 0, 0, 0, 0, 0,
-+		/* IP10_25_23 [3] */
-+		FN_SD2_DAT3, FN_MMC0_D3, FN_SIM0_RST, FN_VI0_DATA5_VI0_B5_B,
-+		FN_HTX0_D, FN_TS_SPSYNC1_B, FN_GLO_Q1_B, FN_VI3_DATA5_B,
-+		/* IP10_22_19 [4] */
-+		FN_SD2_DAT2, FN_MMC0_D2, FN_BPFCLK_B, FN_RDS_CLK,
-+		FN_VI0_DATA4_VI0_B4_B, FN_HRX0_D, FN_TS_SDEN1_B,
-+		FN_GLO_Q0_B, FN_VI3_DATA4_B, 0, 0, 0, 0, 0, 0, 0,
-+		/* IP10_18_15 [4] */
-+		FN_SD2_DAT1, FN_MMC0_D1, FN_FMIN_B, FN_RDS_DATA,
-+		FN_VI0_DATA3_VI0_B3_B, FN_SCIFB1_TXD_E, FN_TX1_D,
-+		FN_TS_SCK0_C, FN_GLO_RFON_B, FN_VI3_DATA3_B,
-+		0, 0, 0, 0, 0, 0,
-+		/* IP10_14_11 [4] */
-+		FN_SD2_DAT0, FN_MMC0_D0, FN_FMCLK_B,
-+		FN_VI0_DATA2_VI0_B2_B, FN_SCIFB1_RXD_E, FN_RX1_D,
-+		FN_TS_SDAT0_C, FN_GLO_SS_B, FN_VI3_DATA2_B,
-+		0, 0, 0, 0, 0, 0, 0,
-+		/* IP10_10_7 [4] */
-+		FN_SD2_CMD, FN_MMC0_CMD, FN_SIM0_D,
-+		FN_VI0_DATA1_VI0_B1_B, FN_SCIFB1_SCK_E, FN_SCK1_D,
-+		FN_TS_SPSYNC0_C, FN_GLO_SDATA_B, FN_VI3_DATA1_B,
-+		0, 0, 0, 0, 0, 0, 0,
-+		/* IP10_6_4 [3] */
-+		FN_SD2_CLK, FN_MMC0_CLK, FN_SIM0_CLK,
-+		FN_VI0_DATA0_VI0_B0_B, FN_TS_SDEN0_C, FN_GLO_SCLK_B,
-+		FN_VI3_DATA0_B, 0,
-+		/* IP10_3_0 [4] */
-+		FN_SD1_WP, FN_MMC1_D7, FN_TS_SPSYNC1, FN_USB1_IDIN,
-+		FN_GLO_RFON, FN_VI1_CLK_B, FN_SDA2_D, FN_SDA2_CIS_D,
-+		FN_SIM0_D_B, 0, 0, 0, 0, 0, 0, 0, }
-+	},
-+	{ PINMUX_CFG_REG_VAR("IPSR11", 0xE606004C, 32,
-+			     2, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3) {
-+		/* IP11_31_30 [2] */
-+		FN_SSI_SCK0129, FN_CAN_CLK_B, FN_MOUT0, 0,
-+		/* IP11_29_27 [3] */
-+		FN_MLB_DAT, FN_SPV_EVEN, FN_SCIFB1_TXD_D, FN_TX1_C, FN_BPFCLK_C,
-+		FN_RDS_CLK_B, 0, 0,
-+		/* IP11_26_24 [3] */
-+		FN_MLB_SIG, FN_SCIFB1_RXD_D, FN_RX1_C, FN_SDA2_B, FN_SDA2_CIS_B,
-+		0, 0, 0,
-+		/* IP11_23_22 [2] */
-+		FN_MLB_CLK, FN_SCL2_B, FN_SCL2_CIS_B, 0,
-+		/* IP11_21_18 [4] */
-+		FN_SD3_WP, FN_MMC1_D5, FN_TS_SCK1, FN_GLO_Q1, FN_FMIN_C,
-+		FN_RDS_DATA_B, FN_FMIN_E, FN_RDS_DATA_D, FN_FMIN_F,
-+		FN_RDS_DATA_E, 0, 0, 0, 0, 0, 0,
-+		/* IP11_17_15 [3] */
-+		FN_SD3_CD, FN_MMC1_D4, FN_TS_SDAT1,
-+		FN_VSP, FN_GLO_Q0, FN_SIM0_RST_B, 0, 0,
-+		/* IP11_14_13 [2] */
-+		FN_SD3_DAT3, FN_MMC1_D3, FN_SCKZ, 0,
-+		/* IP11_12_11 [2] */
-+		FN_SD3_DAT2, FN_MMC1_D2, FN_SDATA, 0,
-+		/* IP11_10_9 [2] */
-+		FN_SD3_DAT1, FN_MMC1_D1, FN_MDATA, 0,
-+		/* IP11_8_7 [2] */
-+		FN_SD3_DAT0, FN_MMC1_D0, FN_STM_N, 0,
-+		/* IP11_6_5 [2] */
-+		FN_SD3_CMD, FN_MMC1_CMD, FN_MTS_N, 0,
-+		/* IP11_4 [1] */
-+		FN_SD3_CLK, FN_MMC1_CLK,
-+		/* IP11_3_0 [4] */
-+		FN_SD2_WP, FN_MMC0_D5, FN_TS_SCK0_B, FN_USB2_IDIN,
-+		FN_GLO_I1, FN_VI0_DATA7_VI0_B7_B, FN_HRTS0_N_D,
-+		FN_TS_SCK1_B, FN_GLO_I1_B, FN_VI3_DATA7_B, 0, 0, 0, 0, 0, 0, }
-+	},
-+	{ PINMUX_CFG_REG_VAR("IPSR12", 0xE6060050, 32,
-+			     1, 3, 3, 2, 3, 3, 3, 3, 3, 2, 2, 2, 2) {
-+		/* IP12_31 [1] */
-+		0, 0,
-+		/* IP12_30_28 [3] */
-+		FN_SSI_WS5, FN_SCIFB1_RXD, FN_IECLK_B,
-+		FN_DU2_EXVSYNC_DU2_VSYNC, FN_QSTB_QHE,
-+		FN_CAN_DEBUGOUT4, 0, 0,
-+		/* IP12_27_25 [3] */
-+		FN_SSI_SCK5, FN_SCIFB1_SCK,
-+		FN_IERX_B, FN_DU2_EXHSYNC_DU2_HSYNC, FN_QSTH_QHS,
-+		FN_CAN_DEBUGOUT3, 0, 0,
-+		/* IP12_24_23 [2] */
-+		FN_SSI_SDATA4, FN_STP_ISSYNC_0, FN_MSIOF1_RXD,
-+		FN_CAN_DEBUGOUT2,
-+		/* IP12_22_20 [3] */
-+		FN_SSI_WS4, FN_STP_ISEN_0, FN_SCIFB0_RTS_N,
-+		FN_MSIOF1_TXD, FN_SSI_WS5_C, FN_CAN_DEBUGOUT1, 0, 0,
-+		/* IP12_19_17 [3] */
-+		FN_SSI_SCK4, FN_STP_ISD_0, FN_SCIFB0_CTS_N,
-+		FN_MSIOF1_SS2, FN_SSI_SCK5_C, FN_CAN_DEBUGOUT0, 0, 0,
-+		/* IP12_16_14 [3] */
-+		FN_SSI_SDATA3, FN_STP_ISCLK_0,
-+		FN_SCIFB0_TXD, FN_MSIOF1_SS1, FN_CAN_TXCLK, 0, 0, 0,
-+		/* IP12_13_11 [3] */
-+		FN_SSI_WS34, FN_STP_IVCXO27_0, FN_SCIFB0_RXD, FN_MSIOF1_SYNC,
-+		FN_CAN_STEP0, 0, 0, 0,
-+		/* IP12_10_8 [3] */
-+		FN_SSI_SCK34, FN_STP_OPWM_0, FN_SCIFB0_SCK,
-+		FN_MSIOF1_SCK, FN_CAN_DEBUG_HW_TRIGGER, 0, 0, 0,
-+		/* IP12_7_6 [2] */
-+		FN_SSI_SDATA2, FN_CAN1_RX_B, FN_SSI_SCK1, FN_MOUT6,
-+		/* IP12_5_4 [2] */
-+		FN_SSI_SDATA1, FN_CAN1_TX_B, FN_MOUT5, 0,
-+		/* IP12_3_2 [2] */
-+		FN_SSI_SDATA0, FN_CAN0_RX_B, FN_MOUT2, 0,
-+		/* IP12_1_0 [2] */
-+		FN_SSI_WS0129, FN_CAN0_TX_B, FN_MOUT1, 0, }
-+	},
-+	{ PINMUX_CFG_REG_VAR("IPSR13", 0xE6060054, 32,
-+			     1, 2, 3, 3, 4, 3, 3, 3, 3, 4, 3) {
-+		/* IP13_31 [1] */
-+		0, 0,
-+		/* IP13_30_29 [2] */
-+		FN_AUDIO_CLKA, FN_SCIFB2_RTS_N, FN_CAN_DEBUGOUT14, 0,
-+		/* IP13_28_26 [3] */
-+		FN_SSI_SDATA9, FN_STP_ISSYNC_1, FN_SCIFB2_CTS_N, FN_SSI_WS1,
-+		FN_SSI_SDATA5_C, FN_CAN_DEBUGOUT13, 0, 0,
-+		/* IP13_25_23 [3] */
-+		FN_SSI_SDATA8, FN_STP_ISEN_1, FN_SCIFB2_TXD, FN_CAN0_TX_C,
-+		FN_CAN_DEBUGOUT12, FN_SSI_SDATA8_B, 0, 0,
-+		/* IP13_22_19 [4] */
-+		FN_SSI_SDATA7, FN_STP_ISD_1, FN_SCIFB2_RXD, FN_SCIFA2_RTS_N,
-+		FN_TCLK2, FN_QSTVA_QVS, FN_CAN_DEBUGOUT11, FN_BPFCLK_E,
-+		FN_RDS_CLK_D, FN_SSI_SDATA7_B, FN_FMIN_G, FN_RDS_DATA_F,
-+		0, 0, 0, 0,
-+		/* IP13_18_16 [3] */
-+		FN_SSI_WS78, FN_STP_ISCLK_1, FN_SCIFB2_SCK, FN_SCIFA2_CTS_N,
-+		FN_DU2_DR7, FN_LCDOUT7, FN_CAN_DEBUGOUT10, 0,
-+		/* IP13_15_13 [3] */
-+		FN_SSI_SCK78, FN_STP_IVCXO27_1, FN_SCK1, FN_SCIFA1_SCK,
-+		FN_DU2_DR6, FN_LCDOUT6, FN_CAN_DEBUGOUT9, 0,
-+		/* IP13_12_10 [3] */
-+		FN_SSI_SDATA6, FN_FMIN_D, FN_RDS_DATA_C, FN_DU2_DR5, FN_LCDOUT5,
-+		FN_CAN_DEBUGOUT8, 0, 0,
-+		/* IP13_9_7 [3] */
-+		FN_SSI_WS6, FN_SCIFB1_RTS_N, FN_CAN0_TX_D, FN_DU2_DR4,
-+		FN_LCDOUT4, FN_CAN_DEBUGOUT7, 0, 0,
-+		/* IP13_6_3 [4] */
-+		FN_SSI_SCK6, FN_SCIFB1_CTS_N, FN_BPFCLK_D, FN_RDS_CLK_C,
-+		FN_DU2_DR3, FN_LCDOUT3, FN_CAN_DEBUGOUT6,
-+		FN_BPFCLK_F, FN_RDS_CLK_E, 0, 0, 0, 0, 0, 0, 0,
-+		/* IP13_2_0 [3] */
-+		FN_SSI_SDATA5, FN_SCIFB1_TXD, FN_IETX_B, FN_DU2_DR2,
-+		FN_LCDOUT2, FN_CAN_DEBUGOUT5, 0, 0, }
-+	},
-+	{ PINMUX_CFG_REG_VAR("IPSR14", 0xE6060058, 32,
-+			     1, 3, 3, 3, 3, 3, 4, 3, 3, 3, 3) {
-+		/* IP14_30 [1] */
-+		0, 0,
-+		/* IP14_30_28 [3] */
-+		FN_SCIFA1_RTS_N, FN_AD_NCS_N, FN_RTS1_N_TANS,
-+		FN_MSIOF3_TXD, FN_DU1_DOTCLKOUT, FN_QSTVB_QVE,
-+		FN_HRTS0_N_C, 0,
-+		/* IP14_27_25 [3] */
-+		FN_SCIFA1_CTS_N, FN_AD_CLK, FN_CTS1_N, FN_MSIOF3_RXD,
-+		FN_DU0_DOTCLKOUT, FN_QCLK, 0, 0,
-+		/* IP14_24_22 [3] */
-+		FN_SCIFA1_TXD, FN_AD_DO, FN_TX1, FN_DU2_DG1,
-+		FN_LCDOUT9, 0, 0, 0,
-+		/* IP14_21_19 [3] */
-+		FN_SCIFA1_RXD, FN_AD_DI, FN_RX1,
-+		FN_DU2_EXODDF_DU2_ODDF_DISP_CDE, FN_QCPV_QDE, 0, 0, 0,
-+		/* IP14_18_16 [3] */
-+		FN_SCIFA0_RTS_N, FN_HRTS1_N, FN_RTS0_N_TANS,
-+		FN_MSIOF3_SS1, FN_DU2_DG0, FN_LCDOUT8, FN_PWM1_B, 0,
-+		/* IP14_15_12 [4] */
-+		FN_SCIFA0_CTS_N, FN_HCTS1_N, FN_CTS0_N, FN_MSIOF3_SYNC,
-+		FN_DU2_DG3, FN_LCDOUT11, FN_PWM0_B, FN_SCL1_C, FN_SCL1_CIS_C,
-+		0, 0, 0, 0, 0, 0, 0,
-+		/* IP14_11_9 [3] */
-+		FN_SCIFA0_TXD, FN_HTX1, FN_TX0, FN_DU2_DR1, FN_LCDOUT1,
-+		0, 0, 0,
-+		/* IP14_8_6 [3] */
-+		FN_SCIFA0_RXD, FN_HRX1, FN_RX0, FN_DU2_DR0, FN_LCDOUT0,
-+		0, 0, 0,
-+		/* IP14_5_3 [3] */
-+		FN_SCIFA0_SCK, FN_HSCK1, FN_SCK0, FN_MSIOF3_SS2, FN_DU2_DG2,
-+		FN_LCDOUT10, FN_SDA1_C, FN_SDA1_CIS_C,
-+		/* IP14_2_0 [3] */
-+		FN_AUDIO_CLKB, FN_SCIF_CLK, FN_CAN0_RX_D,
-+		FN_DVC_MUTE, FN_CAN0_RX_C, FN_CAN_DEBUGOUT15,
-+		FN_REMOCON, 0, }
-+	},
-+	{ PINMUX_CFG_REG_VAR("IPSR15", 0xE606005C, 32,
-+			     2, 2, 2, 3, 3, 2, 2, 2, 2, 3, 3, 3, 3) {
-+		/* IP15_31_30 [2] */
-+		0, 0, 0, 0,
-+		/* IP15_29_28 [2] */
-+		FN_MSIOF0_TXD, FN_ADICHS1, FN_DU2_DG6, FN_LCDOUT14,
-+		/* IP15_27_26 [2] */
-+		FN_MSIOF0_SS1, FN_ADICHS0, FN_DU2_DG5, FN_LCDOUT13,
-+		/* IP15_25_23 [3] */
-+		FN_MSIOF0_SYNC, FN_TS_SCK0, FN_SSI_SCK2, FN_ADIDATA,
-+		FN_DU2_DB7, FN_LCDOUT23, FN_SCIFA2_RXD_B, 0,
-+		/* IP15_22_20 [3] */
-+		FN_MSIOF0_SCK, FN_TS_SDAT0, FN_ADICLK,
-+		FN_DU2_DB6, FN_LCDOUT22, 0, 0, 0,
-+		/* IP15_19_18 [2] */
-+		FN_HRTS0_N, FN_SSI_WS9, FN_DU2_DB5, FN_LCDOUT21,
-+		/* IP15_17_16 [2] */
-+		FN_HCTS0_N, FN_SSI_SCK9, FN_DU2_DB4, FN_LCDOUT20,
-+		/* IP15_15_14 [2] */
-+		FN_HTX0, FN_DU2_DB3, FN_LCDOUT19, 0,
-+		/* IP15_13_12 [2] */
-+		FN_HRX0, FN_DU2_DB2, FN_LCDOUT18, 0,
-+		/* IP15_11_9 [3] */
-+		FN_HSCK0, FN_TS_SDEN0, FN_DU2_DG4, FN_LCDOUT12, FN_HCTS0_N_C,
-+		0, 0, 0,
-+		/* IP15_8_6 [3] */
-+		FN_SCIFA2_TXD, FN_BPFCLK, 0, FN_DU2_DB1, FN_LCDOUT17,
-+		FN_SDA2, FN_SDA2_CIS, 0,
-+		/* IP15_5_3 [3] */
-+		FN_SCIFA2_RXD, FN_FMIN, 0, FN_DU2_DB0, FN_LCDOUT16,
-+		FN_SCL2, FN_SCL2_CIS, 0,
-+		/* IP15_2_0 [3] */
-+		FN_SCIFA2_SCK, FN_FMCLK, 0, FN_MSIOF3_SCK, FN_DU2_DG7,
-+		FN_LCDOUT15, FN_SCIF_CLK_B, 0, }
-+	},
-+	{ PINMUX_CFG_REG_VAR("IPSR16", 0xE6060160, 32,
-+			     4, 4, 4, 4, 4, 4, 1, 1, 3, 3) {
-+		/* IP16_31_28 [4] */
-+		0, 0, 0, 0, 0, 0, 0, 0,
-+		0, 0, 0, 0, 0, 0, 0, 0,
-+		/* IP16_27_24 [4] */
-+		0, 0, 0, 0, 0, 0, 0, 0,
-+		0, 0, 0, 0, 0, 0, 0, 0,
-+		/* IP16_23_20 [4] */
-+		0, 0, 0, 0, 0, 0, 0, 0,
-+		0, 0, 0, 0, 0, 0, 0, 0,
-+		/* IP16_19_16 [4] */
-+		0, 0, 0, 0, 0, 0, 0, 0,
-+		0, 0, 0, 0, 0, 0, 0, 0,
-+		/* IP16_15_12 [4] */
-+		0, 0, 0, 0, 0, 0, 0, 0,
-+		0, 0, 0, 0, 0, 0, 0, 0,
-+		/* IP16_11_8 [4] */
-+		0, 0, 0, 0, 0, 0, 0, 0,
-+		0, 0, 0, 0, 0, 0, 0, 0,
-+		/* IP16_7 [1] */
-+		FN_USB1_OVC, FN_TCLK1_B,
-+		/* IP16_6 [1] */
-+		FN_USB1_PWEN, FN_AUDIO_CLKOUT_D,
-+		/* IP16_5_3 [3] */
-+		FN_MSIOF0_RXD, FN_TS_SPSYNC0, FN_SSI_WS2,
-+		FN_ADICS_SAMP, FN_DU2_CDE, FN_QPOLB, FN_HRX0_C, 0,
-+		/* IP16_2_0 [3] */
-+		FN_MSIOF0_SS2, FN_AUDIO_CLKOUT, FN_ADICHS2,
-+		FN_DU2_DISP, FN_QPOLA, FN_HTX0_C, FN_SCIFA2_TXD_B, 0, }
-+	},
-+	{ PINMUX_CFG_REG_VAR("MOD_SEL", 0xE6060090, 32,
-+			     3, 2, 2, 3, 2, 1, 1, 1, 2, 1,
-+			     2, 1, 1, 1, 1, 2, 1, 1, 2, 1, 1) {
-+		/* SEL_SCIF1 [3] */
-+		FN_SEL_SCIF1_0, FN_SEL_SCIF1_1, FN_SEL_SCIF1_2, FN_SEL_SCIF1_3,
-+		FN_SEL_SCIF1_4, 0, 0, 0,
-+		/* SEL_SCIFB [2] */
-+		FN_SEL_SCIFB_0, FN_SEL_SCIFB_1, FN_SEL_SCIFB_2, 0,
-+		/* SEL_SCIFB2 [2] */
-+		FN_SEL_SCIFB2_0, FN_SEL_SCIFB2_1, FN_SEL_SCIFB2_2, 0,
-+		/* SEL_SCIFB1 [3] */
-+		FN_SEL_SCIFB1_0, FN_SEL_SCIFB1_1, FN_SEL_SCIFB1_2,
-+		FN_SEL_SCIFB1_3, FN_SEL_SCIFB1_4, FN_SEL_SCIFB1_5,
-+		FN_SEL_SCIFB1_6, 0,
-+		/* SEL_SCIFA1 [2] */
-+		FN_SEL_SCIFA1_0, FN_SEL_SCIFA1_1, FN_SEL_SCIFA1_2,
-+		FN_SEL_SCIFA1_3,
-+		/* SEL_SCIF0 [1] */
-+		FN_SEL_SCIF0_0, FN_SEL_SCIF0_1,
-+		/* SEL_SCIFA [1] */
-+		FN_SEL_SCFA_0, FN_SEL_SCFA_1,
-+		/* SEL_SOF1 [1] */
-+		FN_SEL_SOF1_0, FN_SEL_SOF1_1,
-+		/* SEL_SSI7 [2] */
-+		FN_SEL_SSI7_0, FN_SEL_SSI7_1, FN_SEL_SSI7_2, 0,
-+		/* SEL_SSI6 [1] */
-+		FN_SEL_SSI6_0, FN_SEL_SSI6_1,
-+		/* SEL_SSI5 [2] */
-+		FN_SEL_SSI5_0, FN_SEL_SSI5_1, FN_SEL_SSI5_2, 0,
-+		/* SEL_VI3 [1] */
-+		FN_SEL_VI3_0, FN_SEL_VI3_1,
-+		/* SEL_VI2 [1] */
-+		FN_SEL_VI2_0, FN_SEL_VI2_1,
-+		/* SEL_VI1 [1] */
-+		FN_SEL_VI1_0, FN_SEL_VI1_1,
-+		/* SEL_VI0 [1] */
-+		FN_SEL_VI0_0, FN_SEL_VI0_1,
-+		/* SEL_TSIF1 [2] */
-+		FN_SEL_TSIF1_0, FN_SEL_TSIF1_1, FN_SEL_TSIF1_2, 0,
-+		/* RESERVED [1] */
-+		0, 0,
-+		/* SEL_LBS [1] */
-+		FN_SEL_LBS_0, FN_SEL_LBS_1,
-+		/* SEL_TSIF0 [2] */
-+		FN_SEL_TSIF0_0, FN_SEL_TSIF0_1, FN_SEL_TSIF0_2, FN_SEL_TSIF0_3,
-+		/* SEL_SOF3 [1] */
-+		FN_SEL_SOF3_0, FN_SEL_SOF3_1,
-+		/* SEL_SOF0 [1] */
-+		FN_SEL_SOF0_0, FN_SEL_SOF0_1, }
-+	},
-+	{ PINMUX_CFG_REG_VAR("MOD_SEL2", 0xE6060094, 32,
-+			     2, 1, 1, 1, 1, 2, 1, 2, 1,
-+			     2, 1, 1, 1, 3, 3, 2, 3, 2, 2) {
-+		/* RESEVED [2] */
-+		0, 0, 0, 0, 0, 0, 0, 0,
-+		/* RESEVED [1] */
-+		0, 0,
-+		/* SEL_TMU1 [1] */
-+		FN_SEL_TMU1_0, FN_SEL_TMU1_1,
-+		/* SEL_HSCIF1 [1] */
-+		FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1,
-+		/* SEL_SCIFCLK [1] */
-+		FN_SEL_SCIFCLK_0, FN_SEL_SCIFCLK_1,
-+		/* SEL_CAN0 [2] */
-+		FN_SEL_CAN0_0, FN_SEL_CAN0_1, FN_SEL_CAN0_2, FN_SEL_CAN0_3,
-+		/* SEL_CANCLK [1] */
-+		FN_SEL_CANCLK_0, FN_SEL_CANCLK_1,
-+		/* SEL_SCIFA2 [2] */
-+		FN_SEL_SCIFA2_0, FN_SEL_SCIFA2_1, FN_SEL_SCIFA2_2, 0,
-+		/* SEL_CAN1 [1] */
-+		FN_SEL_CAN1_0, FN_SEL_CAN1_1,
-+		/* RESEVED [2] */
-+		0, 0, 0, 0, 0, 0, 0, 0,
-+		/* RESEVED [1] */
-+		0, 0,
-+		/* SEL_ADI [1] */
-+		FN_SEL_ADI_0, FN_SEL_ADI_1,
-+		/* SEL_SSP [1] */
-+		FN_SEL_SSP_0, FN_SEL_SSP_1,
-+		/* SEL_FM [3] */
-+		FN_SEL_FM_0, FN_SEL_FM_1, FN_SEL_FM_2, FN_SEL_FM_3,
-+		FN_SEL_FM_4, FN_SEL_FM_5, FN_SEL_FM_6, 0,
-+		/* SEL_HSCIF0 [3] */
-+		FN_SEL_HSCIF0_0, FN_SEL_HSCIF0_1, FN_SEL_HSCIF0_2,
-+		FN_SEL_HSCIF0_3, FN_SEL_HSCIF0_4, FN_SEL_HSCIF0_5, 0, 0,
-+		/* SEL_GPS [2] */
-+		FN_SEL_GPS_0, FN_SEL_GPS_1, FN_SEL_GPS_2, 0,
-+		/* SEL_RDS [3] */
-+		FN_SEL_RDS_0, FN_SEL_RDS_1, FN_SEL_RDS_2,
-+		FN_SEL_RDS_3, FN_SEL_RDS_4, FN_SEL_RDS_5, 0, 0,
-+		/* SEL_SIM [2] */
-+		FN_SEL_SIM_0, FN_SEL_SIM_1, FN_SEL_SIM_2, 0,
-+		/* SEL_SSI8 [2] */
-+		FN_SEL_SSI8_0, FN_SEL_SSI8_1, FN_SEL_SSI8_2, 0, }
-+	},
-+	{ PINMUX_CFG_REG_VAR("MOD_SEL3", 0xE6060098, 32,
-+			     1, 1, 2, 4, 4, 2, 2,
-+			     4, 2, 3, 2, 3, 2) {
-+		/* SEL_IICDVFS [1] */
-+		FN_SEL_IICDVFS_0, FN_SEL_IICDVFS_1,
-+		/* SEL_IIC0 [1] */
-+		FN_SEL_IIC0_0, FN_SEL_IIC0_1,
-+		/* RESEVED [2] */
-+		0, 0, 0, 0,
-+		/* RESEVED [4] */
-+		0, 0, 0, 0, 0, 0, 0, 0,
-+		0, 0, 0, 0, 0, 0, 0, 0,
-+		/* RESEVED [4] */
-+		0, 0, 0, 0, 0, 0, 0, 0,
-+		0, 0, 0, 0, 0, 0, 0, 0,
-+		/* RESEVED [2] */
-+		0, 0, 0, 0,
-+		/* SEL_IEB [2] */
-+		FN_SEL_IEB_0, FN_SEL_IEB_1, FN_SEL_IEB_2, 0,
-+		/* RESEVED [4] */
-+		0, 0, 0, 0, 0, 0, 0, 0,
-+		0, 0, 0, 0, 0, 0, 0, 0,
-+		/* RESEVED [2] */
-+		0, 0, 0, 0,
-+		/* SEL_IIC2 [3] */
-+		FN_SEL_IIC2_0, FN_SEL_IIC2_1, FN_SEL_IIC2_2, FN_SEL_IIC2_3,
-+		FN_SEL_IIC2_4, 0, 0, 0,
-+		/* SEL_IIC1 [2] */
-+		FN_SEL_IIC1_0, FN_SEL_IIC1_1, FN_SEL_IIC1_2, 0,
-+		/* SEL_I2C2 [3] */
-+		FN_SEL_I2C2_0, FN_SEL_I2C2_1, FN_SEL_I2C2_2, FN_SEL_I2C2_3,
-+		FN_SEL_I2C2_4, 0, 0, 0,
-+		/* SEL_I2C1 [2] */
-+		FN_SEL_I2C1_0, FN_SEL_I2C1_1, FN_SEL_I2C1_2, 0, }
-+	},
-+	{ PINMUX_CFG_REG("INOUTSEL0", 0xE6050004, 32, 1) { GP_INOUTSEL(0) } },
-+	{ PINMUX_CFG_REG("INOUTSEL1", 0xE6051004, 32, 1) {
-+		0, 0,
-+		0, 0,
-+		GP_1_29_IN, GP_1_29_OUT,
-+		GP_1_28_IN, GP_1_28_OUT,
-+		GP_1_27_IN, GP_1_27_OUT,
-+		GP_1_26_IN, GP_1_26_OUT,
-+		GP_1_25_IN, GP_1_25_OUT,
-+		GP_1_24_IN, GP_1_24_OUT,
-+		GP_1_23_IN, GP_1_23_OUT,
-+		GP_1_22_IN, GP_1_22_OUT,
-+		GP_1_21_IN, GP_1_21_OUT,
-+		GP_1_20_IN, GP_1_20_OUT,
-+		GP_1_19_IN, GP_1_19_OUT,
-+		GP_1_18_IN, GP_1_18_OUT,
-+		GP_1_17_IN, GP_1_17_OUT,
-+		GP_1_16_IN, GP_1_16_OUT,
-+		GP_1_15_IN, GP_1_15_OUT,
-+		GP_1_14_IN, GP_1_14_OUT,
-+		GP_1_13_IN, GP_1_13_OUT,
-+		GP_1_12_IN, GP_1_12_OUT,
-+		GP_1_11_IN, GP_1_11_OUT,
-+		GP_1_10_IN, GP_1_10_OUT,
-+		GP_1_9_IN, GP_1_9_OUT,
-+		GP_1_8_IN, GP_1_8_OUT,
-+		GP_1_7_IN, GP_1_7_OUT,
-+		GP_1_6_IN, GP_1_6_OUT,
-+		GP_1_5_IN, GP_1_5_OUT,
-+		GP_1_4_IN, GP_1_4_OUT,
-+		GP_1_3_IN, GP_1_3_OUT,
-+		GP_1_2_IN, GP_1_2_OUT,
-+		GP_1_1_IN, GP_1_1_OUT,
-+		GP_1_0_IN, GP_1_0_OUT, }
-+	},
-+	{ PINMUX_CFG_REG("INOUTSEL2", 0xE6052004, 32, 1) {
-+		0, 0,
-+		0, 0,
-+		GP_2_29_IN, GP_2_29_OUT,
-+		GP_2_28_IN, GP_2_28_OUT,
-+		GP_2_27_IN, GP_2_27_OUT,
-+		GP_2_26_IN, GP_2_26_OUT,
-+		GP_2_25_IN, GP_2_25_OUT,
-+		GP_2_24_IN, GP_2_24_OUT,
-+		GP_2_23_IN, GP_2_23_OUT,
-+		GP_2_22_IN, GP_2_22_OUT,
-+		GP_2_21_IN, GP_2_21_OUT,
-+		GP_2_20_IN, GP_2_20_OUT,
-+		GP_2_19_IN, GP_2_19_OUT,
-+		GP_2_18_IN, GP_2_18_OUT,
-+		GP_2_17_IN, GP_2_17_OUT,
-+		GP_2_16_IN, GP_2_16_OUT,
-+		GP_2_15_IN, GP_2_15_OUT,
-+		GP_2_14_IN, GP_2_14_OUT,
-+		GP_2_13_IN, GP_2_13_OUT,
-+		GP_2_12_IN, GP_2_12_OUT,
-+		GP_2_11_IN, GP_2_11_OUT,
-+		GP_2_10_IN, GP_2_10_OUT,
-+		GP_2_9_IN, GP_2_9_OUT,
-+		GP_2_8_IN, GP_2_8_OUT,
-+		GP_2_7_IN, GP_2_7_OUT,
-+		GP_2_6_IN, GP_2_6_OUT,
-+		GP_2_5_IN, GP_2_5_OUT,
-+		GP_2_4_IN, GP_2_4_OUT,
-+		GP_2_3_IN, GP_2_3_OUT,
-+		GP_2_2_IN, GP_2_2_OUT,
-+		GP_2_1_IN, GP_2_1_OUT,
-+		GP_2_0_IN, GP_2_0_OUT, }
-+	},
-+	{ PINMUX_CFG_REG("INOUTSEL3", 0xE6053004, 32, 1) { GP_INOUTSEL(3) } },
-+	{ PINMUX_CFG_REG("INOUTSEL4", 0xE6054004, 32, 1) { GP_INOUTSEL(4) } },
-+	{ PINMUX_CFG_REG("INOUTSEL5", 0xE6055004, 32, 1) { GP_INOUTSEL(5) } },
-+	{ },
-+};
-+
-+static const struct pinmux_data_reg pinmux_data_regs[] = {
-+	{ PINMUX_DATA_REG("INDT0", 0xE605000C, 32) { GP_INDT(0) } },
-+	{ PINMUX_DATA_REG("INDT1", 0xE605100C, 32) {
-+		0, 0, GP_1_29_DATA, GP_1_28_DATA,
-+		GP_1_27_DATA, GP_1_26_DATA, GP_1_25_DATA, GP_1_24_DATA,
-+		GP_1_23_DATA, GP_1_22_DATA, GP_1_21_DATA, GP_1_20_DATA,
-+		GP_1_19_DATA, GP_1_18_DATA, GP_1_17_DATA, GP_1_16_DATA,
-+		GP_1_15_DATA, GP_1_14_DATA, GP_1_13_DATA, GP_1_12_DATA,
-+		GP_1_11_DATA, GP_1_10_DATA, GP_1_9_DATA, GP_1_8_DATA,
-+		GP_1_7_DATA, GP_1_6_DATA, GP_1_5_DATA, GP_1_4_DATA,
-+		GP_1_3_DATA, GP_1_2_DATA, GP_1_1_DATA, GP_1_0_DATA }
-+	},
-+	{ PINMUX_DATA_REG("INDT2", 0xE605200C, 32) {
-+		0, 0, GP_2_29_DATA, GP_2_28_DATA,
-+		GP_2_27_DATA, GP_2_26_DATA, GP_2_25_DATA, GP_2_24_DATA,
-+		GP_2_23_DATA, GP_2_22_DATA, GP_2_21_DATA, GP_2_20_DATA,
-+		GP_2_19_DATA, GP_2_18_DATA, GP_2_17_DATA, GP_2_16_DATA,
-+		GP_2_15_DATA, GP_2_14_DATA, GP_2_13_DATA, GP_2_12_DATA,
-+		GP_2_11_DATA, GP_2_10_DATA, GP_2_9_DATA, GP_2_8_DATA,
-+		GP_2_7_DATA, GP_2_6_DATA, GP_2_5_DATA, GP_2_4_DATA,
-+		GP_2_3_DATA, GP_2_2_DATA, GP_2_1_DATA, GP_2_0_DATA }
-+	},
-+	{ PINMUX_DATA_REG("INDT3", 0xE605300C, 32) { GP_INDT(3) } },
-+	{ PINMUX_DATA_REG("INDT4", 0xE605400C, 32) { GP_INDT(4) } },
-+	{ PINMUX_DATA_REG("INDT5", 0xE605500C, 32) { GP_INDT(5) } },
-+	{ },
-+};
-+
-+const struct sh_pfc_soc_info r8a7790_pinmux_info = {
-+	.name = "r8a77900_pfc",
-+	.unlock_reg = 0xe6060000, /* PMMR */
-+
-+	.input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
-+	.output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
-+	.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
-+
-+	.pins = pinmux_pins,
-+	.nr_pins = ARRAY_SIZE(pinmux_pins),
-+
-+	.func_gpios	= pinmux_func_gpios,
-+	.nr_func_gpios	= ARRAY_SIZE(pinmux_func_gpios),
-+
-+	.cfg_regs = pinmux_config_regs,
-+	.data_regs = pinmux_data_regs,
-+
-+	.gpio_data = pinmux_data,
-+	.gpio_data_size = ARRAY_SIZE(pinmux_data),
-+};
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0082-sh-pfc-r8a7778-Add-CAN-pin-groups.patch b/patches.renesas/0082-sh-pfc-r8a7778-Add-CAN-pin-groups.patch
deleted file mode 100644
index 00b3a3b73f0cd..0000000000000
--- a/patches.renesas/0082-sh-pfc-r8a7778-Add-CAN-pin-groups.patch
+++ /dev/null
@@ -1,105 +0,0 @@
-From e52ffad6f4ec5dcf046cc2947497560bd2efe40e Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Sat, 28 Sep 2013 03:07:21 +0400
-Subject: sh-pfc: r8a7778: Add CAN pin groups
-
-Add CAN data and clock pin groups to R8A7778 PFC driver.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit 24799c22aea81a8890a66e101cd5a3b175980777)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7778.c | 55 ++++++++++++++++++++++++++++++++++++
- 1 file changed, 55 insertions(+)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7778.c b/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
-index 20b1d0d671a3..8b1881c20598 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
-@@ -1304,6 +1304,33 @@ AUDIO_PFC_DAT(audio_clkout_a,	AUDIO_CLKOUT_A);
- AUDIO_PFC_PIN(audio_clkout_b,	RCAR_GP_PIN(1, 16));
- AUDIO_PFC_DAT(audio_clkout_b,	AUDIO_CLKOUT_B);
- 
-+/* - CAN macro --------_----------------------------------------------------- */
-+#define CAN_PFC_PINS(name, args...)		SH_PFC_PINS(name, args)
-+#define CAN_PFC_DATA(name, tx, rx)		SH_PFC_MUX2(name, tx, rx)
-+#define CAN_PFC_CLK(name, clk)			SH_PFC_MUX1(name, clk)
-+
-+/* - CAN0 ------------------------------------------------------------------- */
-+CAN_PFC_PINS(can0_data_a,	RCAR_GP_PIN(1, 30),	RCAR_GP_PIN(1, 31));
-+CAN_PFC_DATA(can0_data_a,	CAN0_TX_A,		CAN0_RX_A);
-+CAN_PFC_PINS(can0_data_b,	RCAR_GP_PIN(2, 26),	RCAR_GP_PIN(2, 27));
-+CAN_PFC_DATA(can0_data_b,	CAN0_TX_B,		CAN0_RX_B);
-+
-+/* - CAN1 ------------------------------------------------------------------- */
-+CAN_PFC_PINS(can1_data_a,	RCAR_GP_PIN(4, 20),	RCAR_GP_PIN(4, 19));
-+CAN_PFC_DATA(can1_data_a,	CAN1_TX_A,		CAN1_RX_A);
-+CAN_PFC_PINS(can1_data_b,	RCAR_GP_PIN(2, 28),	RCAR_GP_PIN(2, 29));
-+CAN_PFC_DATA(can1_data_b,	CAN1_TX_B,		CAN1_RX_B);
-+
-+/* - CAN_CLK  --------------------------------------------------------------- */
-+CAN_PFC_PINS(can_clk_a,		RCAR_GP_PIN(3, 24));
-+CAN_PFC_CLK(can_clk_a,		CAN_CLK_A);
-+CAN_PFC_PINS(can_clk_b,		RCAR_GP_PIN(1, 16));
-+CAN_PFC_CLK(can_clk_b,		CAN_CLK_B);
-+CAN_PFC_PINS(can_clk_c,		RCAR_GP_PIN(4, 24));
-+CAN_PFC_CLK(can_clk_c,		CAN_CLK_C);
-+CAN_PFC_PINS(can_clk_d,		RCAR_GP_PIN(2, 25));
-+CAN_PFC_CLK(can_clk_d,		CAN_CLK_D);
-+
- /* - Ether ------------------------------------------------------------------ */
- SH_PFC_PINS(ether_rmii,		RCAR_GP_PIN(4, 10),	RCAR_GP_PIN(4, 11),
- 				RCAR_GP_PIN(4, 13),	RCAR_GP_PIN(4, 9),
-@@ -1698,6 +1725,14 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(audio_clk_c),
- 	SH_PFC_PIN_GROUP(audio_clkout_a),
- 	SH_PFC_PIN_GROUP(audio_clkout_b),
-+	SH_PFC_PIN_GROUP(can0_data_a),
-+	SH_PFC_PIN_GROUP(can0_data_b),
-+	SH_PFC_PIN_GROUP(can1_data_a),
-+	SH_PFC_PIN_GROUP(can1_data_b),
-+	SH_PFC_PIN_GROUP(can_clk_a),
-+	SH_PFC_PIN_GROUP(can_clk_b),
-+	SH_PFC_PIN_GROUP(can_clk_c),
-+	SH_PFC_PIN_GROUP(can_clk_d),
- 	SH_PFC_PIN_GROUP(ether_rmii),
- 	SH_PFC_PIN_GROUP(ether_link),
- 	SH_PFC_PIN_GROUP(ether_magic),
-@@ -1826,6 +1861,24 @@ static const char * const audio_clk_groups[] = {
- 	"audio_clkout_b",
- };
- 
-+static const char * const can0_groups[] = {
-+	"can0_data_a",
-+	"can0_data_b",
-+	"can_clk_a",
-+	"can_clk_b",
-+	"can_clk_c",
-+	"can_clk_d",
-+};
-+
-+static const char * const can1_groups[] = {
-+	"can1_data_a",
-+	"can1_data_b",
-+	"can_clk_a",
-+	"can_clk_b",
-+	"can_clk_c",
-+	"can_clk_d",
-+};
-+
- static const char * const ether_groups[] = {
- 	"ether_rmii",
- 	"ether_link",
-@@ -2022,6 +2075,8 @@ static const char * const vin1_groups[] = {
- 
- static const struct sh_pfc_function pinmux_functions[] = {
- 	SH_PFC_FUNCTION(audio_clk),
-+	SH_PFC_FUNCTION(can0),
-+	SH_PFC_FUNCTION(can1),
- 	SH_PFC_FUNCTION(ether),
- 	SH_PFC_FUNCTION(hscif0),
- 	SH_PFC_FUNCTION(hscif1),
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0083-ARM-shmobile-r8a7790-Add-USBHS-clock-support.patch b/patches.renesas/0083-ARM-shmobile-r8a7790-Add-USBHS-clock-support.patch
deleted file mode 100644
index 6dc41dc1c2e97..0000000000000
--- a/patches.renesas/0083-ARM-shmobile-r8a7790-Add-USBHS-clock-support.patch
+++ /dev/null
@@ -1,49 +0,0 @@
-From ba80f2ca65bb30c00e3443d706fbe65392911a62 Mon Sep 17 00:00:00 2001
-From: Valentine Barshak <valentine.barshak@cogentembedded.com>
-Date: Thu, 10 Oct 2013 02:14:46 +0400
-Subject: ARM: shmobile: r8a7790: Add USBHS clock support
-
-This adds USBHS clock support.
-
-Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
-Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 65779cb40f26b3b8638729a5216dad771216ce2a)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r8a7790.c | 4 ++++
- 1 file changed, 4 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
-index fa1b4773677a..b472e2875f18 100644
---- a/arch/arm/mach-shmobile/clock-r8a7790.c
-+++ b/arch/arm/mach-shmobile/clock-r8a7790.c
-@@ -186,6 +186,7 @@ enum {
- 	MSTP813,
- 	MSTP726, MSTP725, MSTP724, MSTP723, MSTP722, MSTP721, MSTP720,
- 	MSTP717, MSTP716,
-+	MSTP704,
- 	MSTP522,
- 	MSTP315, MSTP314, MSTP313, MSTP312, MSTP311, MSTP305, MSTP304,
- 	MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202,
-@@ -208,6 +209,7 @@ static struct clk mstp_clks[MSTP_NR] = {
- 	[MSTP720] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 20, 0), /* SCIF1 */
- 	[MSTP717] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 17, 0), /* HSCIF0 */
- 	[MSTP716] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 16, 0), /* HSCIF1 */
-+	[MSTP704] = SH_CLK_MSTP32(&mp_clk, SMSTPCR7, 4, 0), /* HSUSB */
- 	[MSTP522] = SH_CLK_MSTP32(&extal_clk, SMSTPCR5, 22, 0), /* Thermal */
- 	[MSTP315] = SH_CLK_MSTP32(&div6_clks[DIV6_MMC0], SMSTPCR3, 15, 0), /* MMC0 */
- 	[MSTP314] = SH_CLK_MSTP32(&div4_clks[DIV4_SD0], SMSTPCR3, 14, 0), /* SDHI0 */
-@@ -296,6 +298,8 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_DEV_ID("ee220000.mmcif", &mstp_clks[MSTP305]),
- 	CLKDEV_DEV_ID("sh_mmcif.1", &mstp_clks[MSTP305]),
- 	CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]),
-+	CLKDEV_DEV_ID("renesas_usbhs", &mstp_clks[MSTP704]),
-+	CLKDEV_ICK_ID("usbhs", "usb_phy_rcar_gen2", &mstp_clks[MSTP704]),
- };
- 
- #define R8A7790_CLOCK_ROOT(e, m, p0, p1, p30, p31)		\
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0083-pinctrl-sh-pfc-r8a7791-PFC-support.patch b/patches.renesas/0083-pinctrl-sh-pfc-r8a7791-PFC-support.patch
deleted file mode 100644
index b7dd2383e79d6..0000000000000
--- a/patches.renesas/0083-pinctrl-sh-pfc-r8a7791-PFC-support.patch
+++ /dev/null
@@ -1,4320 +0,0 @@
-From b3f9581382fb45510bcc9fcfc02746dc492712da Mon Sep 17 00:00:00 2001
-From: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>
-Date: Thu, 17 Oct 2013 06:46:05 +0900
-Subject: pinctrl: sh-pfc: r8a7791 PFC support
-
-Add PFC support for the r8a7791 SoC V2 including pin groups for
-on-chip devices such as MSIOF, SCIF, USB, MMC, SDHI, DU.
-
-Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>
-Signed-off-by: Kunihito Higashiyama <kunihito.higashiyama.ur@renesas.com>
-Signed-off-by: Yoshikazu Fujikawa <yoshikazu.fujikawa.ue@renesas.com>
-Signed-off-by: Nobuyuki HIRAI <nobuyuki.hirai.xe@renesas.com>
-Signed-off-by: Shinobu Uehara <shinobu.uehara.xc@renesas.com>
-Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
-Signed-off-by: Ryo Kataoka <ryo.kataoka.wt@renesas.com>
-[damm@opensource.se: Forward ported to upstream, minor fixes]
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-
-(cherry picked from commit 5088451962389924b9f05e22e6956f5c1a515d1a)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/Kconfig       |    5 +
- drivers/pinctrl/sh-pfc/Makefile      |    1 +
- drivers/pinctrl/sh-pfc/core.c        |    9 +
- drivers/pinctrl/sh-pfc/core.h        |    1 +
- drivers/pinctrl/sh-pfc/pfc-r8a7791.c | 4214 ++++++++++++++++++++++++++++++++++
- 5 files changed, 4230 insertions(+)
- create mode 100644 drivers/pinctrl/sh-pfc/pfc-r8a7791.c
-
-diff --git a/drivers/pinctrl/sh-pfc/Kconfig b/drivers/pinctrl/sh-pfc/Kconfig
-index 636a882b406e..26187aa5cf5b 100644
---- a/drivers/pinctrl/sh-pfc/Kconfig
-+++ b/drivers/pinctrl/sh-pfc/Kconfig
-@@ -45,6 +45,11 @@ config PINCTRL_PFC_R8A7790
- 	depends on ARCH_R8A7790
- 	select PINCTRL_SH_PFC
- 
-+config PINCTRL_PFC_R8A7791
-+	def_bool y
-+	depends on ARCH_R8A7791
-+	select PINCTRL_SH_PFC
-+
- config PINCTRL_PFC_SH7203
- 	def_bool y
- 	depends on CPU_SUBTYPE_SH7203
-diff --git a/drivers/pinctrl/sh-pfc/Makefile b/drivers/pinctrl/sh-pfc/Makefile
-index 5e0c222c12d7..ad8f4cf9faaa 100644
---- a/drivers/pinctrl/sh-pfc/Makefile
-+++ b/drivers/pinctrl/sh-pfc/Makefile
-@@ -8,6 +8,7 @@ obj-$(CONFIG_PINCTRL_PFC_R8A7740)	+= pfc-r8a7740.o
- obj-$(CONFIG_PINCTRL_PFC_R8A7778)	+= pfc-r8a7778.o
- obj-$(CONFIG_PINCTRL_PFC_R8A7779)	+= pfc-r8a7779.o
- obj-$(CONFIG_PINCTRL_PFC_R8A7790)	+= pfc-r8a7790.o
-+obj-$(CONFIG_PINCTRL_PFC_R8A7791)	+= pfc-r8a7791.o
- obj-$(CONFIG_PINCTRL_PFC_SH7203)	+= pfc-sh7203.o
- obj-$(CONFIG_PINCTRL_PFC_SH7264)	+= pfc-sh7264.o
- obj-$(CONFIG_PINCTRL_PFC_SH7269)	+= pfc-sh7269.o
-diff --git a/drivers/pinctrl/sh-pfc/core.c b/drivers/pinctrl/sh-pfc/core.c
-index 738f14f65cff..d77ece5217f0 100644
---- a/drivers/pinctrl/sh-pfc/core.c
-+++ b/drivers/pinctrl/sh-pfc/core.c
-@@ -431,6 +431,12 @@ static const struct of_device_id sh_pfc_of_table[] = {
- 		.data = &r8a7790_pinmux_info,
- 	},
- #endif
-+#ifdef CONFIG_PINCTRL_PFC_R8A7791
-+	{
-+		.compatible = "renesas,pfc-r8a7791",
-+		.data = &r8a7791_pinmux_info,
-+	},
-+#endif
- #ifdef CONFIG_PINCTRL_PFC_SH7372
- 	{
- 		.compatible = "renesas,pfc-sh7372",
-@@ -558,6 +564,9 @@ static const struct platform_device_id sh_pfc_id_table[] = {
- #ifdef CONFIG_PINCTRL_PFC_R8A7790
- 	{ "pfc-r8a7790", (kernel_ulong_t)&r8a7790_pinmux_info },
- #endif
-+#ifdef CONFIG_PINCTRL_PFC_R8A7791
-+	{ "pfc-r8a7791", (kernel_ulong_t)&r8a7791_pinmux_info },
-+#endif
- #ifdef CONFIG_PINCTRL_PFC_SH7203
- 	{ "pfc-sh7203", (kernel_ulong_t)&sh7203_pinmux_info },
- #endif
-diff --git a/drivers/pinctrl/sh-pfc/core.h b/drivers/pinctrl/sh-pfc/core.h
-index a1b23762ac90..11ea87268658 100644
---- a/drivers/pinctrl/sh-pfc/core.h
-+++ b/drivers/pinctrl/sh-pfc/core.h
-@@ -69,6 +69,7 @@ extern const struct sh_pfc_soc_info r8a7740_pinmux_info;
- extern const struct sh_pfc_soc_info r8a7778_pinmux_info;
- extern const struct sh_pfc_soc_info r8a7779_pinmux_info;
- extern const struct sh_pfc_soc_info r8a7790_pinmux_info;
-+extern const struct sh_pfc_soc_info r8a7791_pinmux_info;
- extern const struct sh_pfc_soc_info sh7203_pinmux_info;
- extern const struct sh_pfc_soc_info sh7264_pinmux_info;
- extern const struct sh_pfc_soc_info sh7269_pinmux_info;
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7791.c b/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
-new file mode 100644
-index 000000000000..bf76a654c02f
---- /dev/null
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7791.c
-@@ -0,0 +1,4214 @@
-+/*
-+ * r8a7791 processor support - PFC hardware block.
-+ *
-+ * Copyright (C) 2013 Renesas Electronics Corporation
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2
-+ * as published by the Free Software Foundation.
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/platform_data/gpio-rcar.h>
-+
-+#include "core.h"
-+#include "sh_pfc.h"
-+
-+#define CPU_ALL_PORT(fn, sfx)						\
-+	PORT_GP_32(0, fn, sfx),						\
-+	PORT_GP_32(1, fn, sfx),						\
-+	PORT_GP_32(2, fn, sfx),						\
-+	PORT_GP_32(3, fn, sfx),						\
-+	PORT_GP_32(4, fn, sfx),						\
-+	PORT_GP_32(5, fn, sfx),						\
-+	PORT_GP_32(6, fn, sfx),						\
-+	PORT_GP_32(7, fn, sfx)
-+
-+enum {
-+	PINMUX_RESERVED = 0,
-+
-+	PINMUX_DATA_BEGIN,
-+	GP_ALL(DATA),
-+	PINMUX_DATA_END,
-+
-+	PINMUX_FUNCTION_BEGIN,
-+	GP_ALL(FN),
-+
-+	/* GPSR0 */
-+	FN_IP0_0, FN_IP0_1, FN_IP0_2, FN_IP0_3, FN_IP0_4, FN_IP0_5,
-+	FN_IP0_6, FN_IP0_7, FN_IP0_8, FN_IP0_9, FN_IP0_10, FN_IP0_11,
-+	FN_IP0_12, FN_IP0_13, FN_IP0_14, FN_IP0_15, FN_IP0_18_16, FN_IP0_20_19,
-+	FN_IP0_22_21, FN_IP0_24_23, FN_IP0_26_25, FN_IP0_28_27, FN_IP0_30_29,
-+	FN_IP1_1_0, FN_IP1_3_2, FN_IP1_5_4, FN_IP1_7_6, FN_IP1_10_8,
-+	FN_IP1_13_11, FN_IP1_16_14, FN_IP1_19_17, FN_IP1_22_20,
-+
-+	/* GPSR1 */
-+	FN_IP1_25_23, FN_IP1_28_26, FN_IP1_31_29, FN_IP2_2_0, FN_IP2_4_3,
-+	FN_IP2_6_5, FN_IP2_9_7, FN_IP2_12_10, FN_IP2_15_13, FN_IP2_18_16,
-+	FN_IP2_20_19, FN_IP2_22_21, FN_EX_CS0_N, FN_IP2_24_23, FN_IP2_26_25,
-+	FN_IP2_29_27, FN_IP3_2_0, FN_IP3_5_3, FN_IP3_8_6, FN_RD_N,
-+	FN_IP3_11_9, FN_IP3_13_12, FN_IP3_15_14 , FN_IP3_17_16 , FN_IP3_19_18,
-+	FN_IP3_21_20,
-+
-+	/* GPSR2 */
-+	FN_IP3_27_25, FN_IP3_30_28, FN_IP4_1_0, FN_IP4_4_2, FN_IP4_7_5,
-+	FN_IP4_9_8, FN_IP4_12_10, FN_IP4_15_13, FN_IP4_18_16, FN_IP4_19,
-+	FN_IP4_20, FN_IP4_21, FN_IP4_23_22, FN_IP4_25_24, FN_IP4_27_26,
-+	FN_IP4_30_28, FN_IP5_2_0, FN_IP5_5_3, FN_IP5_8_6, FN_IP5_11_9,
-+	FN_IP5_14_12, FN_IP5_16_15, FN_IP5_19_17, FN_IP5_21_20, FN_IP5_23_22,
-+	FN_IP5_25_24, FN_IP5_28_26, FN_IP5_31_29, FN_AUDIO_CLKA, FN_IP6_2_0,
-+	FN_IP6_5_3, FN_IP6_7_6,
-+
-+	/* GPSR3 */
-+	FN_IP7_5_3, FN_IP7_8_6, FN_IP7_10_9, FN_IP7_12_11, FN_IP7_14_13,
-+	FN_IP7_16_15, FN_IP7_18_17, FN_IP7_20_19, FN_IP7_23_21, FN_IP7_26_24,
-+	FN_IP7_29_27, FN_IP8_2_0, FN_IP8_5_3, FN_IP8_8_6, FN_IP8_11_9,
-+	FN_IP8_14_12, FN_IP8_17_15, FN_IP8_20_18, FN_IP8_23_21, FN_IP8_25_24,
-+	FN_IP8_27_26, FN_IP8_30_28, FN_IP9_2_0, FN_IP9_5_3, FN_IP9_6, FN_IP9_7,
-+	FN_IP9_10_8, FN_IP9_11, FN_IP9_12, FN_IP9_15_13, FN_IP9_16,
-+	FN_IP9_18_17,
-+
-+	/* GPSR4 */
-+	FN_VI0_CLK, FN_IP9_20_19, FN_IP9_22_21, FN_IP9_24_23, FN_IP9_26_25,
-+	FN_VI0_DATA0_VI0_B0, FN_VI0_DATA1_VI0_B1, FN_VI0_DATA2_VI0_B2,
-+	FN_IP9_28_27, FN_VI0_DATA4_VI0_B4, FN_VI0_DATA5_VI0_B5,
-+	FN_VI0_DATA6_VI0_B6, FN_VI0_DATA7_VI0_B7, FN_IP9_31_29, FN_IP10_2_0,
-+	FN_IP10_5_3, FN_IP10_8_6, FN_IP10_11_9, FN_IP10_14_12, FN_IP10_16_15,
-+	FN_IP10_18_17, FN_IP10_21_19, FN_IP10_24_22, FN_IP10_26_25,
-+	FN_IP10_28_27, FN_IP10_31_29, FN_IP11_2_0, FN_IP11_5_3, FN_IP11_8_6,
-+	FN_IP15_1_0, FN_IP15_3_2, FN_IP15_5_4,
-+
-+	/* GPSR5 */
-+	FN_IP11_11_9, FN_IP11_14_12, FN_IP11_16_15, FN_IP11_18_17, FN_IP11_19,
-+	FN_IP11_20, FN_IP11_21, FN_IP11_22, FN_IP11_23, FN_IP11_24,
-+	FN_IP11_25, FN_IP11_26, FN_IP11_27, FN_IP11_29_28, FN_IP11_31_30,
-+	FN_IP12_1_0, FN_IP12_3_2, FN_IP12_6_4, FN_IP12_9_7, FN_IP12_12_10,
-+	FN_IP12_15_13, FN_IP12_17_16, FN_IP12_19_18, FN_IP12_21_20,
-+	FN_IP12_23_22, FN_IP12_26_24, FN_IP12_29_27, FN_IP13_2_0, FN_IP13_4_3,
-+	FN_IP13_6_5, FN_IP13_9_7, FN_IP3_24_22,
-+
-+	/* GPSR6 */
-+	FN_IP13_10, FN_IP13_11, FN_IP13_12, FN_IP13_13, FN_IP13_14,
-+	FN_IP13_15, FN_IP13_18_16, FN_IP13_21_19, FN_IP13_22, FN_IP13_24_23,
-+	FN_IP13_25, FN_IP13_26, FN_IP13_27, FN_IP13_30_28, FN_IP14_1_0,
-+	FN_IP14_2, FN_IP14_3, FN_IP14_4, FN_IP14_5, FN_IP14_6, FN_IP14_7,
-+	FN_IP14_10_8, FN_IP14_13_11, FN_IP14_16_14, FN_IP14_19_17,
-+	FN_IP14_22_20, FN_IP14_25_23, FN_IP14_28_26, FN_IP14_31_29,
-+	FN_USB1_OVC, FN_DU0_DOTCLKIN,
-+
-+	/* GPSR7 */
-+	FN_IP15_17_15, FN_IP15_20_18, FN_IP15_23_21, FN_IP15_26_24,
-+	FN_IP15_29_27, FN_IP16_2_0, FN_IP16_5_3, FN_IP16_7_6, FN_IP16_9_8,
-+	FN_IP16_11_10, FN_IP6_9_8, FN_IP6_11_10, FN_IP6_13_12, FN_IP6_15_14,
-+	FN_IP6_18_16, FN_IP6_20_19, FN_IP6_23_21, FN_IP6_26_24, FN_IP6_29_27,
-+	FN_IP7_2_0, FN_IP15_8_6, FN_IP15_11_9, FN_IP15_14_12,
-+	FN_USB0_PWEN, FN_USB0_OVC, FN_USB1_PWEN,
-+
-+	/* IPSR0 */
-+	FN_D0, FN_D1, FN_D2, FN_D3, FN_D4, FN_D5, FN_D6, FN_D7, FN_D8,
-+	FN_D9, FN_D10, FN_D11, FN_D12, FN_D13, FN_D14, FN_D15,
-+	FN_A0, FN_ATAWR0_N_C, FN_MSIOF0_SCK_B, FN_SCL0_C, FN_PWM2_B,
-+	FN_A1, FN_MSIOF0_SYNC_B, FN_A2, FN_MSIOF0_SS1_B,
-+	FN_A3, FN_MSIOF0_SS2_B, FN_A4, FN_MSIOF0_TXD_B,
-+	FN_A5, FN_MSIOF0_RXD_B, FN_A6, FN_MSIOF1_SCK,
-+
-+	/* IPSR1 */
-+	FN_A7, FN_MSIOF1_SYNC, FN_A8, FN_MSIOF1_SS1, FN_SCL0,
-+	FN_A9, FN_MSIOF1_SS2, FN_SDA0,
-+	FN_A10, FN_MSIOF1_TXD, FN_MSIOF1_TXD_D,
-+	FN_A11, FN_MSIOF1_RXD, FN_SCL3_D, FN_MSIOF1_RXD_D,
-+	FN_A12, FN_FMCLK, FN_SDA3_D, FN_MSIOF1_SCK_D,
-+	FN_A13, FN_ATAG0_N_C, FN_BPFCLK, FN_MSIOF1_SS1_D,
-+	FN_A14, FN_ATADIR0_N_C, FN_FMIN, FN_FMIN_C, FN_MSIOF1_SYNC_D,
-+	FN_A15, FN_BPFCLK_C,
-+	FN_A16, FN_DREQ2_B, FN_FMCLK_C, FN_SCIFA1_SCK_B,
-+	FN_A17, FN_DACK2_B, FN_SDA0_C,
-+	FN_A18, FN_DREQ1, FN_SCIFA1_RXD_C, FN_SCIFB1_RXD_C,
-+
-+	/* IPSR2 */
-+	FN_A19, FN_DACK1, FN_SCIFA1_TXD_C, FN_SCIFB1_TXD_C, FN_SCIFB1_SCK_B,
-+	FN_A20, FN_SPCLK,
-+	FN_A21, FN_ATAWR0_N_B, FN_MOSI_IO0,
-+	FN_A22, FN_MISO_IO1, FN_FMCLK_B, FN_TX0, FN_SCIFA0_TXD,
-+	FN_A23, FN_IO2, FN_BPFCLK_B, FN_RX0, FN_SCIFA0_RXD,
-+	FN_A24, FN_DREQ2, FN_IO3, FN_TX1, FN_SCIFA1_TXD,
-+	FN_A25, FN_DACK2, FN_SSL, FN_DREQ1_C, FN_RX1, FN_SCIFA1_RXD,
-+	FN_CS0_N, FN_ATAG0_N_B, FN_SCL1,
-+	FN_CS1_N_A26, FN_ATADIR0_N_B, FN_SDA1,
-+	FN_EX_CS1_N, FN_MSIOF2_SCK,
-+	FN_EX_CS2_N, FN_ATAWR0_N, FN_MSIOF2_SYNC,
-+	FN_EX_CS3_N, FN_ATADIR0_N, FN_MSIOF2_TXD, FN_ATAG0_N, FN_EX_WAIT1,
-+
-+	/* IPSR3 */
-+	FN_EX_CS4_N, FN_ATARD0_N, FN_MSIOF2_RXD, FN_EX_WAIT2,
-+	FN_EX_CS5_N, FN_ATACS00_N, FN_MSIOF2_SS1, FN_HRX1_B,
-+	FN_SCIFB1_RXD_B, FN_PWM1, FN_TPU_TO1,
-+	FN_BS_N, FN_ATACS10_N, FN_MSIOF2_SS2, FN_HTX1_B,
-+	FN_SCIFB1_TXD_B, FN_PWM2, FN_TPU_TO2,
-+	FN_RD_WR_N, FN_HRX2_B, FN_FMIN_B, FN_SCIFB0_RXD_B, FN_DREQ1_D,
-+	FN_WE0_N, FN_HCTS2_N_B, FN_SCIFB0_TXD_B,
-+	FN_WE1_N, FN_ATARD0_N_B, FN_HTX2_B, FN_SCIFB0_RTS_N_B,
-+	FN_EX_WAIT0, FN_HRTS2_N_B, FN_SCIFB0_CTS_N_B,
-+	FN_DREQ0, FN_PWM3, FN_TPU_TO3,
-+	FN_DACK0, FN_DRACK0, FN_REMOCON,
-+	FN_SPEEDIN, FN_HSCK0_C, FN_HSCK2_C, FN_SCIFB0_SCK_B,
-+	FN_SCIFB2_SCK_B, FN_DREQ2_C, FN_HTX2_D,
-+	FN_SSI_SCK0129, FN_HRX0_C, FN_HRX2_C, FN_SCIFB0_RXD_C, FN_SCIFB2_RXD_C,
-+	FN_SSI_WS0129, FN_HTX0_C, FN_HTX2_C, FN_SCIFB0_TXD_C, FN_SCIFB2_TXD_C,
-+
-+	/* IPSR4 */
-+	FN_SSI_SDATA0, FN_SCL0_B, FN_SCL7_B, FN_MSIOF2_SCK_C,
-+	FN_SSI_SCK1, FN_SDA0_B, FN_SDA7_B, FN_MSIOF2_SYNC_C, FN_GLO_I0_D,
-+	FN_SSI_WS1, FN_SCL1_B, FN_SCL8_B, FN_MSIOF2_TXD_C, FN_GLO_I1_D,
-+	FN_SSI_SDATA1, FN_SDA1_B, FN_SDA8_B, FN_MSIOF2_RXD_C,
-+	FN_SSI_SCK2, FN_SCL2, FN_GPS_CLK_B, FN_GLO_Q0_D, FN_HSCK1_E,
-+	FN_SSI_WS2, FN_SDA2, FN_GPS_SIGN_B, FN_RX2_E,
-+	FN_GLO_Q1_D, FN_HCTS1_N_E,
-+	FN_SSI_SDATA2, FN_GPS_MAG_B, FN_TX2_E, FN_HRTS1_N_E,
-+	FN_SSI_SCK34, FN_SSI_WS34, FN_SSI_SDATA3,
-+	FN_SSI_SCK4, FN_GLO_SS_D,
-+	FN_SSI_WS4, FN_GLO_RFON_D,
-+	FN_SSI_SDATA4, FN_MSIOF2_SCK_D,
-+	FN_SSI_SCK5, FN_MSIOF1_SCK_C, FN_TS_SDATA0, FN_GLO_I0,
-+	FN_MSIOF2_SYNC_D, FN_VI1_R2_B,
-+
-+	/* IPSR5 */
-+	FN_SSI_WS5, FN_MSIOF1_SYNC_C, FN_TS_SCK0, FN_GLO_I1,
-+	FN_MSIOF2_TXD_D, FN_VI1_R3_B,
-+	FN_SSI_SDATA5, FN_MSIOF1_TXD_C, FN_TS_SDEN0, FN_GLO_Q0,
-+	FN_MSIOF2_SS1_D, FN_VI1_R4_B,
-+	FN_SSI_SCK6, FN_MSIOF1_RXD_C, FN_TS_SPSYNC0, FN_GLO_Q1,
-+	FN_MSIOF2_RXD_D, FN_VI1_R5_B,
-+	FN_SSI_WS6, FN_GLO_SCLK, FN_MSIOF2_SS2_D, FN_VI1_R6_B,
-+	FN_SSI_SDATA6, FN_STP_IVCXO27_0_B, FN_GLO_SDATA, FN_VI1_R7_B,
-+	FN_SSI_SCK78, FN_STP_ISCLK_0_B, FN_GLO_SS,
-+	FN_SSI_WS78, FN_TX0_D, FN_STP_ISD_0_B, FN_GLO_RFON,
-+	FN_SSI_SDATA7, FN_RX0_D, FN_STP_ISEN_0_B,
-+	FN_SSI_SDATA8, FN_TX1_D, FN_STP_ISSYNC_0_B,
-+	FN_SSI_SCK9, FN_RX1_D, FN_GLO_SCLK_D,
-+	FN_SSI_WS9, FN_TX3_D, FN_CAN0_TX_D, FN_GLO_SDATA_D,
-+	FN_SSI_SDATA9, FN_RX3_D, FN_CAN0_RX_D,
-+
-+	/* IPSR6 */
-+	FN_AUDIO_CLKB, FN_STP_OPWM_0_B, FN_MSIOF1_SCK_B,
-+	FN_SCIF_CLK, FN_BPFCLK_E,
-+	FN_AUDIO_CLKC, FN_SCIFB0_SCK_C, FN_MSIOF1_SYNC_B, FN_RX2,
-+	FN_SCIFA2_RXD, FN_FMIN_E,
-+	FN_AUDIO_CLKOUT, FN_MSIOF1_SS1_B, FN_TX2, FN_SCIFA2_TXD,
-+	FN_IRQ0, FN_SCIFB1_RXD_D, FN_INTC_IRQ0_N,
-+	FN_IRQ1, FN_SCIFB1_SCK_C, FN_INTC_IRQ1_N,
-+	FN_IRQ2, FN_SCIFB1_TXD_D, FN_INTC_IRQ2_N,
-+	FN_IRQ3, FN_SCL4_C, FN_MSIOF2_TXD_E, FN_INTC_IRQ3_N,
-+	FN_IRQ4, FN_HRX1_C, FN_SDA4_C, FN_MSIOF2_RXD_E, FN_INTC_IRQ4_N,
-+	FN_IRQ5, FN_HTX1_C, FN_SCL1_E, FN_MSIOF2_SCK_E,
-+	FN_IRQ6, FN_HSCK1_C, FN_MSIOF1_SS2_B, FN_SDA1_E, FN_MSIOF2_SYNC_E,
-+	FN_IRQ7, FN_HCTS1_N_C, FN_MSIOF1_TXD_B, FN_GPS_CLK_C, FN_GPS_CLK_D,
-+	FN_IRQ8, FN_HRTS1_N_C, FN_MSIOF1_RXD_B, FN_GPS_SIGN_C, FN_GPS_SIGN_D,
-+
-+	/* IPSR7 */
-+	FN_IRQ9, FN_DU1_DOTCLKIN_B, FN_CAN_CLK_D, FN_GPS_MAG_C,
-+	FN_SCIF_CLK_B, FN_GPS_MAG_D,
-+	FN_DU1_DR0, FN_LCDOUT0, FN_VI1_DATA0_B, FN_TX0_B,
-+	FN_SCIFA0_TXD_B, FN_MSIOF2_SCK_B,
-+	FN_DU1_DR1, FN_LCDOUT1, FN_VI1_DATA1_B, FN_RX0_B,
-+	FN_SCIFA0_RXD_B, FN_MSIOF2_SYNC_B,
-+	FN_DU1_DR2, FN_LCDOUT2, FN_SSI_SCK0129_B,
-+	FN_DU1_DR3, FN_LCDOUT3, FN_SSI_WS0129_B,
-+	FN_DU1_DR4, FN_LCDOUT4, FN_SSI_SDATA0_B,
-+	FN_DU1_DR5, FN_LCDOUT5, FN_SSI_SCK1_B,
-+	FN_DU1_DR6, FN_LCDOUT6, FN_SSI_WS1_B,
-+	FN_DU1_DR7, FN_LCDOUT7, FN_SSI_SDATA1_B,
-+	FN_DU1_DG0, FN_LCDOUT8, FN_VI1_DATA2_B, FN_TX1_B,
-+	FN_SCIFA1_TXD_B, FN_MSIOF2_SS1_B,
-+	FN_DU1_DG1, FN_LCDOUT9, FN_VI1_DATA3_B, FN_RX1_B,
-+	FN_SCIFA1_RXD_B, FN_MSIOF2_SS2_B,
-+	FN_DU1_DG2, FN_LCDOUT10, FN_VI1_DATA4_B, FN_SCIF1_SCK_B,
-+	FN_SCIFA1_SCK, FN_SSI_SCK78_B,
-+
-+	/* IPSR8 */
-+	FN_DU1_DG3, FN_LCDOUT11, FN_VI1_DATA5_B, FN_SSI_WS78_B,
-+	FN_DU1_DG4, FN_LCDOUT12, FN_VI1_DATA6_B, FN_HRX0_B,
-+	FN_SCIFB2_RXD_B, FN_SSI_SDATA7_B,
-+	FN_DU1_DG5, FN_LCDOUT13, FN_VI1_DATA7_B, FN_HCTS0_N_B,
-+	FN_SCIFB2_TXD_B, FN_SSI_SDATA8_B,
-+	FN_DU1_DG6, FN_LCDOUT14, FN_HRTS0_N_B,
-+	FN_SCIFB2_CTS_N_B, FN_SSI_SCK9_B,
-+	FN_DU1_DG7, FN_LCDOUT15, FN_HTX0_B, FN_SCIFB2_RTS_N_B, FN_SSI_WS9_B,
-+	FN_DU1_DB0, FN_LCDOUT16, FN_VI1_CLK_B, FN_TX2_B,
-+	FN_SCIFA2_TXD_B, FN_MSIOF2_TXD_B,
-+	FN_DU1_DB1, FN_LCDOUT17, FN_VI1_HSYNC_N_B, FN_RX2_B,
-+	FN_SCIFA2_RXD_B, FN_MSIOF2_RXD_B,
-+	FN_DU1_DB2, FN_LCDOUT18, FN_VI1_VSYNC_N_B, FN_SCIF2_SCK_B,
-+	FN_SCIFA2_SCK, FN_SSI_SDATA9_B,
-+	FN_DU1_DB3, FN_LCDOUT19, FN_VI1_CLKENB_B,
-+	FN_DU1_DB4, FN_LCDOUT20, FN_VI1_FIELD_B, FN_CAN1_RX,
-+	FN_DU1_DB5, FN_LCDOUT21, FN_TX3, FN_SCIFA3_TXD, FN_CAN1_TX,
-+
-+	/* IPSR9 */
-+	FN_DU1_DB6, FN_LCDOUT22, FN_SCL3_C, FN_RX3, FN_SCIFA3_RXD,
-+	FN_DU1_DB7, FN_LCDOUT23, FN_SDA3_C, FN_SCIF3_SCK, FN_SCIFA3_SCK,
-+	FN_DU1_DOTCLKIN, FN_QSTVA_QVS,
-+	FN_DU1_DOTCLKOUT0, FN_QCLK,
-+	FN_DU1_DOTCLKOUT1, FN_QSTVB_QVE, FN_CAN0_TX,
-+	FN_TX3_B, FN_SCL2_B, FN_PWM4,
-+	FN_DU1_EXHSYNC_DU1_HSYNC, FN_QSTH_QHS,
-+	FN_DU1_EXVSYNC_DU1_VSYNC, FN_QSTB_QHE,
-+	FN_DU1_EXODDF_DU1_ODDF_DISP_CDE, FN_QCPV_QDE,
-+	FN_CAN0_RX, FN_RX3_B, FN_SDA2_B,
-+	FN_DU1_DISP, FN_QPOLA,
-+	FN_DU1_CDE, FN_QPOLB, FN_PWM4_B,
-+	FN_VI0_CLKENB, FN_TX4, FN_SCIFA4_TXD, FN_TS_SDATA0_D,
-+	FN_VI0_FIELD, FN_RX4, FN_SCIFA4_RXD, FN_TS_SCK0_D,
-+	FN_VI0_HSYNC_N, FN_TX5, FN_SCIFA5_TXD, FN_TS_SDEN0_D,
-+	FN_VI0_VSYNC_N, FN_RX5, FN_SCIFA5_RXD, FN_TS_SPSYNC0_D,
-+	FN_VI0_DATA3_VI0_B3, FN_SCIF3_SCK_B, FN_SCIFA3_SCK_B,
-+	FN_VI0_G0, FN_SCL8, FN_STP_IVCXO27_0_C, FN_SCL4,
-+	FN_HCTS2_N, FN_SCIFB2_CTS_N, FN_ATAWR1_N,
-+
-+	/* IPSR10 */
-+	FN_VI0_G1, FN_SDA8, FN_STP_ISCLK_0_C, FN_SDA4,
-+	FN_HRTS2_N, FN_SCIFB2_RTS_N, FN_ATADIR1_N,
-+	FN_VI0_G2, FN_VI2_HSYNC_N, FN_STP_ISD_0_C, FN_SCL3_B,
-+	FN_HSCK2, FN_SCIFB2_SCK, FN_ATARD1_N,
-+	FN_VI0_G3, FN_VI2_VSYNC_N, FN_STP_ISEN_0_C, FN_SDA3_B,
-+	FN_HRX2, FN_SCIFB2_RXD, FN_ATACS01_N,
-+	FN_VI0_G4, FN_VI2_CLKENB, FN_STP_ISSYNC_0_C,
-+	FN_HTX2, FN_SCIFB2_TXD, FN_SCIFB0_SCK_D,
-+	FN_VI0_G5, FN_VI2_FIELD, FN_STP_OPWM_0_C, FN_FMCLK_D,
-+	FN_CAN0_TX_E, FN_HTX1_D, FN_SCIFB0_TXD_D,
-+	FN_VI0_G6, FN_VI2_CLK, FN_BPFCLK_D,
-+	FN_VI0_G7, FN_VI2_DATA0, FN_FMIN_D,
-+	FN_VI0_R0, FN_VI2_DATA1, FN_GLO_I0_B,
-+	FN_TS_SDATA0_C, FN_ATACS11_N,
-+	FN_VI0_R1, FN_VI2_DATA2, FN_GLO_I1_B,
-+	FN_TS_SCK0_C, FN_ATAG1_N,
-+	FN_VI0_R2, FN_VI2_DATA3, FN_GLO_Q0_B, FN_TS_SDEN0_C,
-+	FN_VI0_R3, FN_VI2_DATA4, FN_GLO_Q1_B, FN_TS_SPSYNC0_C,
-+	FN_VI0_R4, FN_VI2_DATA5, FN_GLO_SCLK_B, FN_TX0_C, FN_SCL1_D,
-+
-+	/* IPSR11 */
-+	FN_VI0_R5, FN_VI2_DATA6, FN_GLO_SDATA_B, FN_RX0_C, FN_SDA1_D,
-+	FN_VI0_R6, FN_VI2_DATA7, FN_GLO_SS_B, FN_TX1_C, FN_SCL4_B,
-+	FN_VI0_R7, FN_GLO_RFON_B, FN_RX1_C, FN_CAN0_RX_E,
-+	FN_SDA4_B, FN_HRX1_D, FN_SCIFB0_RXD_D,
-+	FN_VI1_HSYNC_N, FN_AVB_RXD0, FN_TS_SDATA0_B, FN_TX4_B, FN_SCIFA4_TXD_B,
-+	FN_VI1_VSYNC_N, FN_AVB_RXD1, FN_TS_SCK0_B, FN_RX4_B, FN_SCIFA4_RXD_B,
-+	FN_VI1_CLKENB, FN_AVB_RXD2, FN_TS_SDEN0_B,
-+	FN_VI1_FIELD, FN_AVB_RXD3, FN_TS_SPSYNC0_B,
-+	FN_VI1_CLK, FN_AVB_RXD4, FN_VI1_DATA0, FN_AVB_RXD5,
-+	FN_VI1_DATA1, FN_AVB_RXD6, FN_VI1_DATA2, FN_AVB_RXD7,
-+	FN_VI1_DATA3, FN_AVB_RX_ER, FN_VI1_DATA4, FN_AVB_MDIO,
-+	FN_VI1_DATA5, FN_AVB_RX_DV, FN_VI1_DATA6, FN_AVB_MAGIC,
-+	FN_VI1_DATA7, FN_AVB_MDC,
-+	FN_ETH_MDIO, FN_AVB_RX_CLK, FN_SCL2_C,
-+	FN_ETH_CRS_DV, FN_AVB_LINK, FN_SDA2_C,
-+
-+	/* IPSR12 */
-+	FN_ETH_RX_ER, FN_AVB_CRS, FN_SCL3, FN_SCL7,
-+	FN_ETH_RXD0, FN_AVB_PHY_INT, FN_SDA3, FN_SDA7,
-+	FN_ETH_RXD1, FN_AVB_GTXREFCLK, FN_CAN0_TX_C,
-+	FN_SCL2_D, FN_MSIOF1_RXD_E,
-+	FN_ETH_LINK, FN_AVB_TXD0, FN_CAN0_RX_C, FN_SDA2_D, FN_MSIOF1_SCK_E,
-+	FN_ETH_REFCLK, FN_AVB_TXD1, FN_SCIFA3_RXD_B,
-+	FN_CAN1_RX_C, FN_MSIOF1_SYNC_E,
-+	FN_ETH_TXD1, FN_AVB_TXD2, FN_SCIFA3_TXD_B,
-+	FN_CAN1_TX_C, FN_MSIOF1_TXD_E,
-+	FN_ETH_TX_EN, FN_AVB_TXD3, FN_TCLK1_B, FN_CAN_CLK_B,
-+	FN_ETH_MAGIC, FN_AVB_TXD4, FN_IETX_C,
-+	FN_ETH_TXD0, FN_AVB_TXD5, FN_IECLK_C,
-+	FN_ETH_MDC, FN_AVB_TXD6, FN_IERX_C,
-+	FN_STP_IVCXO27_0, FN_AVB_TXD7, FN_SCIFB2_TXD_D,
-+	FN_ADIDATA_B, FN_MSIOF0_SYNC_C,
-+	FN_STP_ISCLK_0, FN_AVB_TX_EN, FN_SCIFB2_RXD_D,
-+	FN_ADICS_SAMP_B, FN_MSIOF0_SCK_C,
-+
-+	/* IPSR13 */
-+	FN_STP_ISD_0, FN_AVB_TX_ER, FN_SCIFB2_SCK_C,
-+	FN_ADICLK_B, FN_MSIOF0_SS1_C,
-+	FN_STP_ISEN_0, FN_AVB_TX_CLK, FN_ADICHS0_B, FN_MSIOF0_SS2_C,
-+	FN_STP_ISSYNC_0, FN_AVB_COL, FN_ADICHS1_B, FN_MSIOF0_RXD_C,
-+	FN_STP_OPWM_0, FN_AVB_GTX_CLK, FN_PWM0_B,
-+	FN_ADICHS2_B, FN_MSIOF0_TXD_C,
-+	FN_SD0_CLK, FN_SPCLK_B, FN_SD0_CMD, FN_MOSI_IO0_B,
-+	FN_SD0_DATA0, FN_MISO_IO1_B, FN_SD0_DATA1, FN_IO2_B,
-+	FN_SD0_DATA2, FN_IO3_B, FN_SD0_DATA3, FN_SSL_B,
-+	FN_SD0_CD, FN_MMC_D6_B, FN_SIM0_RST_B, FN_CAN0_RX_F,
-+	FN_SCIFA5_TXD_B, FN_TX3_C,
-+	FN_SD0_WP, FN_MMC_D7_B, FN_SIM0_D_B, FN_CAN0_TX_F,
-+	FN_SCIFA5_RXD_B, FN_RX3_C,
-+	FN_SD1_CMD, FN_REMOCON_B, FN_SD1_DATA0, FN_SPEEDIN_B,
-+	FN_SD1_DATA1, FN_IETX_B, FN_SD1_DATA2, FN_IECLK_B,
-+	FN_SD1_DATA3, FN_IERX_B,
-+	FN_SD1_CD, FN_PWM0, FN_TPU_TO0, FN_SCL1_C,
-+
-+	/* IPSR14 */
-+	FN_SD1_WP, FN_PWM1_B, FN_SDA1_C,
-+	FN_SD2_CLK, FN_MMC_CLK, FN_SD2_CMD, FN_MMC_CMD,
-+	FN_SD2_DATA0, FN_MMC_D0, FN_SD2_DATA1, FN_MMC_D1,
-+	FN_SD2_DATA2, FN_MMC_D2, FN_SD2_DATA3, FN_MMC_D3,
-+	FN_SD2_CD, FN_MMC_D4, FN_SCL8_C, FN_TX5_B, FN_SCIFA5_TXD_C,
-+	FN_SD2_WP, FN_MMC_D5, FN_SDA8_C, FN_RX5_B, FN_SCIFA5_RXD_C,
-+	FN_MSIOF0_SCK, FN_RX2_C, FN_ADIDATA, FN_VI1_CLK_C, FN_VI1_G0_B,
-+	FN_MSIOF0_SYNC, FN_TX2_C, FN_ADICS_SAMP, FN_VI1_CLKENB_C, FN_VI1_G1_B,
-+	FN_MSIOF0_TXD, FN_ADICLK, FN_VI1_FIELD_C, FN_VI1_G2_B,
-+	FN_MSIOF0_RXD, FN_ADICHS0, FN_VI1_DATA0_C, FN_VI1_G3_B,
-+	FN_MSIOF0_SS1, FN_MMC_D6, FN_ADICHS1, FN_TX0_E,
-+	FN_VI1_HSYNC_N_C, FN_SCL7_C, FN_VI1_G4_B,
-+	FN_MSIOF0_SS2, FN_MMC_D7, FN_ADICHS2, FN_RX0_E,
-+	FN_VI1_VSYNC_N_C, FN_SDA7_C, FN_VI1_G5_B,
-+
-+	/* IPSR15 */
-+	FN_SIM0_RST, FN_IETX, FN_CAN1_TX_D,
-+	FN_SIM0_CLK, FN_IECLK, FN_CAN_CLK_C,
-+	FN_SIM0_D, FN_IERX, FN_CAN1_RX_D,
-+	FN_GPS_CLK, FN_DU1_DOTCLKIN_C, FN_AUDIO_CLKB_B,
-+	FN_PWM5_B, FN_SCIFA3_TXD_C,
-+	FN_GPS_SIGN, FN_TX4_C, FN_SCIFA4_TXD_C, FN_PWM5,
-+	FN_VI1_G6_B, FN_SCIFA3_RXD_C,
-+	FN_GPS_MAG, FN_RX4_C, FN_SCIFA4_RXD_C, FN_PWM6,
-+	FN_VI1_G7_B, FN_SCIFA3_SCK_C,
-+	FN_HCTS0_N, FN_SCIFB0_CTS_N, FN_GLO_I0_C, FN_TCLK1, FN_VI1_DATA1_C,
-+	FN_HRTS0_N, FN_SCIFB0_RTS_N, FN_GLO_I1_C, FN_VI1_DATA2_C,
-+	FN_HSCK0, FN_SCIFB0_SCK, FN_GLO_Q0_C, FN_CAN_CLK,
-+	FN_TCLK2, FN_VI1_DATA3_C,
-+	FN_HRX0, FN_SCIFB0_RXD, FN_GLO_Q1_C, FN_CAN0_RX_B, FN_VI1_DATA4_C,
-+	FN_HTX0, FN_SCIFB0_TXD, FN_GLO_SCLK_C, FN_CAN0_TX_B, FN_VI1_DATA5_C,
-+
-+	/* IPSR16 */
-+	FN_HRX1, FN_SCIFB1_RXD, FN_VI1_R0_B, FN_GLO_SDATA_C, FN_VI1_DATA6_C,
-+	FN_HTX1, FN_SCIFB1_TXD, FN_VI1_R1_B, FN_GLO_SS_C, FN_VI1_DATA7_C,
-+	FN_HSCK1, FN_SCIFB1_SCK, FN_MLB_CK, FN_GLO_RFON_C,
-+	FN_HCTS1_N, FN_SCIFB1_CTS_N, FN_MLB_SIG, FN_CAN1_TX_B,
-+	FN_HRTS1_N, FN_SCIFB1_RTS_N, FN_MLB_DAT, FN_CAN1_RX_B,
-+
-+	/* MOD_SEL */
-+	FN_SEL_SCIF1_0, FN_SEL_SCIF1_1, FN_SEL_SCIF1_2, FN_SEL_SCIF1_3,
-+	FN_SEL_SCIFB_0, FN_SEL_SCIFB_1, FN_SEL_SCIFB_2, FN_SEL_SCIFB_3,
-+	FN_SEL_SCIFB2_0, FN_SEL_SCIFB2_1, FN_SEL_SCIFB2_2, FN_SEL_SCIFB2_3,
-+	FN_SEL_SCIFB1_0, FN_SEL_SCIFB1_1, FN_SEL_SCIFB1_2, FN_SEL_SCIFB1_3,
-+	FN_SEL_SCIFA1_0, FN_SEL_SCIFA1_1, FN_SEL_SCIFA1_2,
-+	FN_SEL_SSI9_0, FN_SEL_SSI9_1,
-+	FN_SEL_SCFA_0, FN_SEL_SCFA_1,
-+	FN_SEL_QSP_0, FN_SEL_QSP_1,
-+	FN_SEL_SSI7_0, FN_SEL_SSI7_1,
-+	FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1, FN_SEL_HSCIF1_2, FN_SEL_HSCIF1_3,
-+	FN_SEL_HSCIF1_4,
-+	FN_SEL_VI1_0, FN_SEL_VI1_1, FN_SEL_VI1_2,
-+	FN_SEL_TMU1_0, FN_SEL_TMU1_1,
-+	FN_SEL_LBS_0, FN_SEL_LBS_1, FN_SEL_LBS_2, FN_SEL_LBS_3,
-+	FN_SEL_TSIF0_0, FN_SEL_TSIF0_1, FN_SEL_TSIF0_2, FN_SEL_TSIF0_3,
-+	FN_SEL_SOF0_0, FN_SEL_SOF0_1, FN_SEL_SOF0_2,
-+
-+	/* MOD_SEL2 */
-+	FN_SEL_SCIF0_0, FN_SEL_SCIF0_1, FN_SEL_SCIF0_2, FN_SEL_SCIF0_3,
-+	FN_SEL_SCIF0_4,
-+	FN_SEL_SCIF_0, FN_SEL_SCIF_1,
-+	FN_SEL_CAN0_0, FN_SEL_CAN0_1, FN_SEL_CAN0_2, FN_SEL_CAN0_3,
-+	FN_SEL_CAN0_4, FN_SEL_CAN0_5,
-+	FN_SEL_CAN1_0, FN_SEL_CAN1_1, FN_SEL_CAN1_2, FN_SEL_CAN1_3,
-+	FN_SEL_SCIFA2_0, FN_SEL_SCIFA2_1,
-+	FN_SEL_SCIF4_0, FN_SEL_SCIF4_1, FN_SEL_SCIF4_2,
-+	FN_SEL_ADG_0, FN_SEL_ADG_1,
-+	FN_SEL_FM_0, FN_SEL_FM_1, FN_SEL_FM_2, FN_SEL_FM_3, FN_SEL_FM_4,
-+	FN_SEL_SCIFA5_0, FN_SEL_SCIFA5_1, FN_SEL_SCIFA5_2,
-+	FN_SEL_GPS_0, FN_SEL_GPS_1, FN_SEL_GPS_2, FN_SEL_GPS_3,
-+	FN_SEL_SCIFA4_0, FN_SEL_SCIFA4_1, FN_SEL_SCIFA4_2,
-+	FN_SEL_SCIFA3_0, FN_SEL_SCIFA3_1, FN_SEL_SCIFA3_2,
-+	FN_SEL_SIM_0, FN_SEL_SIM_1,
-+	FN_SEL_SSI8_0, FN_SEL_SSI8_1,
-+
-+	/* MOD_SEL3 */
-+	FN_SEL_HSCIF2_0, FN_SEL_HSCIF2_1, FN_SEL_HSCIF2_2, FN_SEL_HSCIF2_3,
-+	FN_SEL_CANCLK_0, FN_SEL_CANCLK_1, FN_SEL_CANCLK_2, FN_SEL_CANCLK_3,
-+	FN_SEL_IIC8_0, FN_SEL_IIC8_1, FN_SEL_IIC8_2,
-+	FN_SEL_IIC7_0, FN_SEL_IIC7_1, FN_SEL_IIC7_2,
-+	FN_SEL_IIC4_0, FN_SEL_IIC4_1, FN_SEL_IIC4_2,
-+	FN_SEL_IIC3_0, FN_SEL_IIC3_1, FN_SEL_IIC3_2, FN_SEL_IIC3_3,
-+	FN_SEL_SCIF3_0, FN_SEL_SCIF3_1, FN_SEL_SCIF3_2, FN_SEL_SCIF3_3,
-+	FN_SEL_IEB_0, FN_SEL_IEB_1, FN_SEL_IEB_2,
-+	FN_SEL_MMC_0, FN_SEL_MMC_1,
-+	FN_SEL_SCIF5_0, FN_SEL_SCIF5_1,
-+	FN_SEL_IIC2_0, FN_SEL_IIC2_1, FN_SEL_IIC2_2, FN_SEL_IIC2_3,
-+	FN_SEL_IIC1_0, FN_SEL_IIC1_1, FN_SEL_IIC1_2, FN_SEL_IIC1_3,
-+	FN_SEL_IIC1_4,
-+	FN_SEL_IIC0_0, FN_SEL_IIC0_1, FN_SEL_IIC0_2,
-+
-+	/* MOD_SEL4 */
-+	FN_SEL_SOF1_0, FN_SEL_SOF1_1, FN_SEL_SOF1_2, FN_SEL_SOF1_3,
-+	FN_SEL_SOF1_4,
-+	FN_SEL_HSCIF0_0, FN_SEL_HSCIF0_1, FN_SEL_HSCIF0_2,
-+	FN_SEL_DIS_0, FN_SEL_DIS_1, FN_SEL_DIS_2,
-+	FN_SEL_RAD_0, FN_SEL_RAD_1,
-+	FN_SEL_RCN_0, FN_SEL_RCN_1,
-+	FN_SEL_RSP_0, FN_SEL_RSP_1,
-+	FN_SEL_SCIF2_0, FN_SEL_SCIF2_1, FN_SEL_SCIF2_2, FN_SEL_SCIF2_3,
-+	FN_SEL_SCIF2_4,
-+	FN_SEL_SOF2_0, FN_SEL_SOF2_1, FN_SEL_SOF2_2, FN_SEL_SOF2_3,
-+	FN_SEL_SOF2_4,
-+	FN_SEL_SSI1_0, FN_SEL_SSI1_1,
-+	FN_SEL_SSI0_0, FN_SEL_SSI0_1,
-+	FN_SEL_SSP_0, FN_SEL_SSP_1, FN_SEL_SSP_2,
-+	PINMUX_FUNCTION_END,
-+
-+	PINMUX_MARK_BEGIN,
-+
-+	EX_CS0_N_MARK, RD_N_MARK,
-+
-+	AUDIO_CLKA_MARK,
-+
-+	VI0_CLK_MARK, VI0_DATA0_VI0_B0_MARK, VI0_DATA1_VI0_B1_MARK,
-+	VI0_DATA2_VI0_B2_MARK, VI0_DATA4_VI0_B4_MARK, VI0_DATA5_VI0_B5_MARK,
-+	VI0_DATA6_VI0_B6_MARK, VI0_DATA7_VI0_B7_MARK,
-+
-+	SD1_CLK_MARK,
-+
-+	USB0_PWEN_MARK, USB0_OVC_MARK, USB1_PWEN_MARK, USB1_OVC_MARK,
-+	DU0_DOTCLKIN_MARK,
-+
-+	/* IPSR0 */
-+	D0_MARK, D1_MARK, D2_MARK, D3_MARK, D4_MARK, D5_MARK,
-+	D6_MARK, D7_MARK, D8_MARK,
-+	D9_MARK, D10_MARK, D11_MARK, D12_MARK, D13_MARK, D14_MARK, D15_MARK,
-+	A0_MARK, ATAWR0_N_C_MARK, MSIOF0_SCK_B_MARK, SCL0_C_MARK, PWM2_B_MARK,
-+	A1_MARK, MSIOF0_SYNC_B_MARK, A2_MARK, MSIOF0_SS1_B_MARK,
-+	A3_MARK, MSIOF0_SS2_B_MARK, A4_MARK, MSIOF0_TXD_B_MARK,
-+	A5_MARK, MSIOF0_RXD_B_MARK, A6_MARK, MSIOF1_SCK_MARK,
-+
-+	/* IPSR1 */
-+	A7_MARK, MSIOF1_SYNC_MARK, A8_MARK, MSIOF1_SS1_MARK, SCL0_MARK,
-+	A9_MARK, MSIOF1_SS2_MARK, SDA0_MARK,
-+	A10_MARK, MSIOF1_TXD_MARK, MSIOF1_TXD_D_MARK,
-+	A11_MARK, MSIOF1_RXD_MARK, SCL3_D_MARK, MSIOF1_RXD_D_MARK,
-+	A12_MARK, FMCLK_MARK, SDA3_D_MARK, MSIOF1_SCK_D_MARK,
-+	A13_MARK, ATAG0_N_C_MARK, BPFCLK_MARK, MSIOF1_SS1_D_MARK,
-+	A14_MARK, ATADIR0_N_C_MARK, FMIN_MARK, FMIN_C_MARK, MSIOF1_SYNC_D_MARK,
-+	A15_MARK, BPFCLK_C_MARK,
-+	A16_MARK, DREQ2_B_MARK, FMCLK_C_MARK, SCIFA1_SCK_B_MARK,
-+	A17_MARK, DACK2_B_MARK, SDA0_C_MARK,
-+	A18_MARK, DREQ1_MARK, SCIFA1_RXD_C_MARK, SCIFB1_RXD_C_MARK,
-+
-+	/* IPSR2 */
-+	A19_MARK, DACK1_MARK, SCIFA1_TXD_C_MARK,
-+	SCIFB1_TXD_C_MARK, SCIFB1_SCK_B_MARK,
-+	A20_MARK, SPCLK_MARK,
-+	A21_MARK, ATAWR0_N_B_MARK, MOSI_IO0_MARK,
-+	A22_MARK, MISO_IO1_MARK, FMCLK_B_MARK, TX0_MARK, SCIFA0_TXD_MARK,
-+	A23_MARK, IO2_MARK, BPFCLK_B_MARK, RX0_MARK, SCIFA0_RXD_MARK,
-+	A24_MARK, DREQ2_MARK, IO3_MARK, TX1_MARK, SCIFA1_TXD_MARK,
-+	A25_MARK, DACK2_MARK, SSL_MARK, DREQ1_C_MARK,
-+	RX1_MARK, SCIFA1_RXD_MARK,
-+	CS0_N_MARK, ATAG0_N_B_MARK, SCL1_MARK,
-+	CS1_N_A26_MARK, ATADIR0_N_B_MARK, SDA1_MARK,
-+	EX_CS1_N_MARK, MSIOF2_SCK_MARK,
-+	EX_CS2_N_MARK, ATAWR0_N_MARK, MSIOF2_SYNC_MARK,
-+	EX_CS3_N_MARK, ATADIR0_N_MARK, MSIOF2_TXD_MARK,
-+	ATAG0_N_MARK, EX_WAIT1_MARK,
-+
-+	/* IPSR3 */
-+	EX_CS4_N_MARK, ATARD0_N_MARK, MSIOF2_RXD_MARK, EX_WAIT2_MARK,
-+	EX_CS5_N_MARK, ATACS00_N_MARK, MSIOF2_SS1_MARK, HRX1_B_MARK,
-+	SCIFB1_RXD_B_MARK, PWM1_MARK, TPU_TO1_MARK,
-+	BS_N_MARK, ATACS10_N_MARK, MSIOF2_SS2_MARK, HTX1_B_MARK,
-+	SCIFB1_TXD_B_MARK, PWM2_MARK, TPU_TO2_MARK,
-+	RD_WR_N_MARK, HRX2_B_MARK, FMIN_B_MARK,
-+	SCIFB0_RXD_B_MARK, DREQ1_D_MARK,
-+	WE0_N_MARK, HCTS2_N_B_MARK, SCIFB0_TXD_B_MARK,
-+	WE1_N_MARK, ATARD0_N_B_MARK, HTX2_B_MARK, SCIFB0_RTS_N_B_MARK,
-+	EX_WAIT0_MARK, HRTS2_N_B_MARK, SCIFB0_CTS_N_B_MARK,
-+	DREQ0_MARK, PWM3_MARK, TPU_TO3_MARK,
-+	DACK0_MARK, DRACK0_MARK, REMOCON_MARK,
-+	SPEEDIN_MARK, HSCK0_C_MARK, HSCK2_C_MARK, SCIFB0_SCK_B_MARK,
-+	SCIFB2_SCK_B_MARK, DREQ2_C_MARK, HTX2_D_MARK,
-+	SSI_SCK0129_MARK, HRX0_C_MARK, HRX2_C_MARK,
-+	SCIFB0_RXD_C_MARK, SCIFB2_RXD_C_MARK,
-+	SSI_WS0129_MARK, HTX0_C_MARK, HTX2_C_MARK,
-+	SCIFB0_TXD_C_MARK, SCIFB2_TXD_C_MARK,
-+
-+	/* IPSR4 */
-+	SSI_SDATA0_MARK, SCL0_B_MARK, SCL7_B_MARK, MSIOF2_SCK_C_MARK,
-+	SSI_SCK1_MARK, SDA0_B_MARK, SDA7_B_MARK,
-+	MSIOF2_SYNC_C_MARK, GLO_I0_D_MARK,
-+	SSI_WS1_MARK, SCL1_B_MARK, SCL8_B_MARK,
-+	MSIOF2_TXD_C_MARK, GLO_I1_D_MARK,
-+	SSI_SDATA1_MARK, SDA1_B_MARK, SDA8_B_MARK, MSIOF2_RXD_C_MARK,
-+	SSI_SCK2_MARK, SCL2_MARK, GPS_CLK_B_MARK, GLO_Q0_D_MARK, HSCK1_E_MARK,
-+	SSI_WS2_MARK, SDA2_MARK, GPS_SIGN_B_MARK, RX2_E_MARK,
-+	GLO_Q1_D_MARK, HCTS1_N_E_MARK,
-+	SSI_SDATA2_MARK, GPS_MAG_B_MARK, TX2_E_MARK, HRTS1_N_E_MARK,
-+	SSI_SCK34_MARK, SSI_WS34_MARK, SSI_SDATA3_MARK,
-+	SSI_SCK4_MARK, GLO_SS_D_MARK,
-+	SSI_WS4_MARK, GLO_RFON_D_MARK,
-+	SSI_SDATA4_MARK, MSIOF2_SCK_D_MARK,
-+	SSI_SCK5_MARK, MSIOF1_SCK_C_MARK, TS_SDATA0_MARK, GLO_I0_MARK,
-+	MSIOF2_SYNC_D_MARK, VI1_R2_B_MARK,
-+
-+	/* IPSR5 */
-+	SSI_WS5_MARK, MSIOF1_SYNC_C_MARK, TS_SCK0_MARK, GLO_I1_MARK,
-+	MSIOF2_TXD_D_MARK, VI1_R3_B_MARK,
-+	SSI_SDATA5_MARK, MSIOF1_TXD_C_MARK, TS_SDEN0_MARK, GLO_Q0_MARK,
-+	MSIOF2_SS1_D_MARK, VI1_R4_B_MARK,
-+	SSI_SCK6_MARK, MSIOF1_RXD_C_MARK, TS_SPSYNC0_MARK, GLO_Q1_MARK,
-+	MSIOF2_RXD_D_MARK, VI1_R5_B_MARK,
-+	SSI_WS6_MARK, GLO_SCLK_MARK, MSIOF2_SS2_D_MARK, VI1_R6_B_MARK,
-+	SSI_SDATA6_MARK, STP_IVCXO27_0_B_MARK, GLO_SDATA_MARK, VI1_R7_B_MARK,
-+	SSI_SCK78_MARK, STP_ISCLK_0_B_MARK, GLO_SS_MARK,
-+	SSI_WS78_MARK, TX0_D_MARK, STP_ISD_0_B_MARK, GLO_RFON_MARK,
-+	SSI_SDATA7_MARK, RX0_D_MARK, STP_ISEN_0_B_MARK,
-+	SSI_SDATA8_MARK, TX1_D_MARK, STP_ISSYNC_0_B_MARK,
-+	SSI_SCK9_MARK, RX1_D_MARK, GLO_SCLK_D_MARK,
-+	SSI_WS9_MARK, TX3_D_MARK, CAN0_TX_D_MARK, GLO_SDATA_D_MARK,
-+	SSI_SDATA9_MARK, RX3_D_MARK, CAN0_RX_D_MARK,
-+
-+	/* IPSR6 */
-+	AUDIO_CLKB_MARK, STP_OPWM_0_B_MARK, MSIOF1_SCK_B_MARK,
-+	SCIF_CLK_MARK, BPFCLK_E_MARK,
-+	AUDIO_CLKC_MARK, SCIFB0_SCK_C_MARK, MSIOF1_SYNC_B_MARK, RX2_MARK,
-+	SCIFA2_RXD_MARK, FMIN_E_MARK,
-+	AUDIO_CLKOUT_MARK, MSIOF1_SS1_B_MARK, TX2_MARK, SCIFA2_TXD_MARK,
-+	IRQ0_MARK, SCIFB1_RXD_D_MARK, INTC_IRQ0_N_MARK,
-+	IRQ1_MARK, SCIFB1_SCK_C_MARK, INTC_IRQ1_N_MARK,
-+	IRQ2_MARK, SCIFB1_TXD_D_MARK, INTC_IRQ2_N_MARK,
-+	IRQ3_MARK, SCL4_C_MARK, MSIOF2_TXD_E_MARK, INTC_IRQ3_N_MARK,
-+	IRQ4_MARK, HRX1_C_MARK, SDA4_C_MARK,
-+	MSIOF2_RXD_E_MARK, INTC_IRQ4_N_MARK,
-+	IRQ5_MARK, HTX1_C_MARK, SCL1_E_MARK, MSIOF2_SCK_E_MARK,
-+	IRQ6_MARK, HSCK1_C_MARK, MSIOF1_SS2_B_MARK,
-+	SDA1_E_MARK, MSIOF2_SYNC_E_MARK,
-+	IRQ7_MARK, HCTS1_N_C_MARK, MSIOF1_TXD_B_MARK,
-+	GPS_CLK_C_MARK, GPS_CLK_D_MARK,
-+	IRQ8_MARK, HRTS1_N_C_MARK, MSIOF1_RXD_B_MARK,
-+	GPS_SIGN_C_MARK, GPS_SIGN_D_MARK,
-+
-+	/* IPSR7 */
-+	IRQ9_MARK, DU1_DOTCLKIN_B_MARK, CAN_CLK_D_MARK, GPS_MAG_C_MARK,
-+	SCIF_CLK_B_MARK, GPS_MAG_D_MARK,
-+	DU1_DR0_MARK, LCDOUT0_MARK, VI1_DATA0_B_MARK, TX0_B_MARK,
-+	SCIFA0_TXD_B_MARK, MSIOF2_SCK_B_MARK,
-+	DU1_DR1_MARK, LCDOUT1_MARK, VI1_DATA1_B_MARK, RX0_B_MARK,
-+	SCIFA0_RXD_B_MARK, MSIOF2_SYNC_B_MARK,
-+	DU1_DR2_MARK, LCDOUT2_MARK, SSI_SCK0129_B_MARK,
-+	DU1_DR3_MARK, LCDOUT3_MARK, SSI_WS0129_B_MARK,
-+	DU1_DR4_MARK, LCDOUT4_MARK, SSI_SDATA0_B_MARK,
-+	DU1_DR5_MARK, LCDOUT5_MARK, SSI_SCK1_B_MARK,
-+	DU1_DR6_MARK, LCDOUT6_MARK, SSI_WS1_B_MARK,
-+	DU1_DR7_MARK, LCDOUT7_MARK, SSI_SDATA1_B_MARK,
-+	DU1_DG0_MARK, LCDOUT8_MARK, VI1_DATA2_B_MARK, TX1_B_MARK,
-+	SCIFA1_TXD_B_MARK, MSIOF2_SS1_B_MARK,
-+	DU1_DG1_MARK, LCDOUT9_MARK, VI1_DATA3_B_MARK, RX1_B_MARK,
-+	SCIFA1_RXD_B_MARK, MSIOF2_SS2_B_MARK,
-+	DU1_DG2_MARK, LCDOUT10_MARK, VI1_DATA4_B_MARK, SCIF1_SCK_B_MARK,
-+	SCIFA1_SCK_MARK, SSI_SCK78_B_MARK,
-+
-+	/* IPSR8 */
-+	DU1_DG3_MARK, LCDOUT11_MARK, VI1_DATA5_B_MARK, SSI_WS78_B_MARK,
-+	DU1_DG4_MARK, LCDOUT12_MARK, VI1_DATA6_B_MARK, HRX0_B_MARK,
-+	SCIFB2_RXD_B_MARK, SSI_SDATA7_B_MARK,
-+	DU1_DG5_MARK, LCDOUT13_MARK, VI1_DATA7_B_MARK, HCTS0_N_B_MARK,
-+	SCIFB2_TXD_B_MARK, SSI_SDATA8_B_MARK,
-+	DU1_DG6_MARK, LCDOUT14_MARK, HRTS0_N_B_MARK,
-+	SCIFB2_CTS_N_B_MARK, SSI_SCK9_B_MARK,
-+	DU1_DG7_MARK, LCDOUT15_MARK, HTX0_B_MARK,
-+	SCIFB2_RTS_N_B_MARK, SSI_WS9_B_MARK,
-+	DU1_DB0_MARK, LCDOUT16_MARK, VI1_CLK_B_MARK, TX2_B_MARK,
-+	SCIFA2_TXD_B_MARK, MSIOF2_TXD_B_MARK,
-+	DU1_DB1_MARK, LCDOUT17_MARK, VI1_HSYNC_N_B_MARK, RX2_B_MARK,
-+	SCIFA2_RXD_B_MARK, MSIOF2_RXD_B_MARK,
-+	DU1_DB2_MARK, LCDOUT18_MARK, VI1_VSYNC_N_B_MARK, SCIF2_SCK_B_MARK,
-+	SCIFA2_SCK_MARK, SSI_SDATA9_B_MARK,
-+	DU1_DB3_MARK, LCDOUT19_MARK, VI1_CLKENB_B_MARK,
-+	DU1_DB4_MARK, LCDOUT20_MARK, VI1_FIELD_B_MARK, CAN1_RX_MARK,
-+	DU1_DB5_MARK, LCDOUT21_MARK, TX3_MARK, SCIFA3_TXD_MARK, CAN1_TX_MARK,
-+
-+	/* IPSR9 */
-+	DU1_DB6_MARK, LCDOUT22_MARK, SCL3_C_MARK, RX3_MARK, SCIFA3_RXD_MARK,
-+	DU1_DB7_MARK, LCDOUT23_MARK, SDA3_C_MARK,
-+	SCIF3_SCK_MARK, SCIFA3_SCK_MARK,
-+	DU1_DOTCLKIN_MARK, QSTVA_QVS_MARK,
-+	DU1_DOTCLKOUT0_MARK, QCLK_MARK,
-+	DU1_DOTCLKOUT1_MARK, QSTVB_QVE_MARK, CAN0_TX_MARK,
-+	TX3_B_MARK, SCL2_B_MARK, PWM4_MARK,
-+	DU1_EXHSYNC_DU1_HSYNC_MARK, QSTH_QHS_MARK,
-+	DU1_EXVSYNC_DU1_VSYNC_MARK, QSTB_QHE_MARK,
-+	DU1_EXODDF_DU1_ODDF_DISP_CDE_MARK, QCPV_QDE_MARK,
-+	CAN0_RX_MARK, RX3_B_MARK, SDA2_B_MARK,
-+	DU1_DISP_MARK, QPOLA_MARK,
-+	DU1_CDE_MARK, QPOLB_MARK, PWM4_B_MARK,
-+	VI0_CLKENB_MARK, TX4_MARK, SCIFA4_TXD_MARK, TS_SDATA0_D_MARK,
-+	VI0_FIELD_MARK, RX4_MARK, SCIFA4_RXD_MARK, TS_SCK0_D_MARK,
-+	VI0_HSYNC_N_MARK, TX5_MARK, SCIFA5_TXD_MARK, TS_SDEN0_D_MARK,
-+	VI0_VSYNC_N_MARK, RX5_MARK, SCIFA5_RXD_MARK, TS_SPSYNC0_D_MARK,
-+	VI0_DATA3_VI0_B3_MARK, SCIF3_SCK_B_MARK, SCIFA3_SCK_B_MARK,
-+	VI0_G0_MARK, SCL8_MARK, STP_IVCXO27_0_C_MARK, SCL4_MARK,
-+	HCTS2_N_MARK, SCIFB2_CTS_N_MARK, ATAWR1_N_MARK,
-+
-+	/* IPSR10 */
-+	VI0_G1_MARK, SDA8_MARK, STP_ISCLK_0_C_MARK, SDA4_MARK,
-+	HRTS2_N_MARK, SCIFB2_RTS_N_MARK, ATADIR1_N_MARK,
-+	VI0_G2_MARK, VI2_HSYNC_N_MARK, STP_ISD_0_C_MARK, SCL3_B_MARK,
-+	HSCK2_MARK, SCIFB2_SCK_MARK, ATARD1_N_MARK,
-+	VI0_G3_MARK, VI2_VSYNC_N_MARK, STP_ISEN_0_C_MARK, SDA3_B_MARK,
-+	HRX2_MARK, SCIFB2_RXD_MARK, ATACS01_N_MARK,
-+	VI0_G4_MARK, VI2_CLKENB_MARK, STP_ISSYNC_0_C_MARK,
-+	HTX2_MARK, SCIFB2_TXD_MARK, SCIFB0_SCK_D_MARK,
-+	VI0_G5_MARK, VI2_FIELD_MARK, STP_OPWM_0_C_MARK, FMCLK_D_MARK,
-+	CAN0_TX_E_MARK, HTX1_D_MARK, SCIFB0_TXD_D_MARK,
-+	VI0_G6_MARK, VI2_CLK_MARK, BPFCLK_D_MARK,
-+	VI0_G7_MARK, VI2_DATA0_MARK, FMIN_D_MARK,
-+	VI0_R0_MARK, VI2_DATA1_MARK, GLO_I0_B_MARK,
-+	TS_SDATA0_C_MARK, ATACS11_N_MARK,
-+	VI0_R1_MARK, VI2_DATA2_MARK, GLO_I1_B_MARK,
-+	TS_SCK0_C_MARK, ATAG1_N_MARK,
-+	VI0_R2_MARK, VI2_DATA3_MARK, GLO_Q0_B_MARK, TS_SDEN0_C_MARK,
-+	VI0_R3_MARK, VI2_DATA4_MARK, GLO_Q1_B_MARK, TS_SPSYNC0_C_MARK,
-+	VI0_R4_MARK, VI2_DATA5_MARK, GLO_SCLK_B_MARK, TX0_C_MARK, SCL1_D_MARK,
-+
-+	/* IPSR11 */
-+	VI0_R5_MARK, VI2_DATA6_MARK, GLO_SDATA_B_MARK, RX0_C_MARK, SDA1_D_MARK,
-+	VI0_R6_MARK, VI2_DATA7_MARK, GLO_SS_B_MARK, TX1_C_MARK, SCL4_B_MARK,
-+	VI0_R7_MARK, GLO_RFON_B_MARK, RX1_C_MARK, CAN0_RX_E_MARK,
-+	SDA4_B_MARK, HRX1_D_MARK, SCIFB0_RXD_D_MARK,
-+	VI1_HSYNC_N_MARK, AVB_RXD0_MARK, TS_SDATA0_B_MARK,
-+	TX4_B_MARK, SCIFA4_TXD_B_MARK,
-+	VI1_VSYNC_N_MARK, AVB_RXD1_MARK, TS_SCK0_B_MARK,
-+	RX4_B_MARK, SCIFA4_RXD_B_MARK,
-+	VI1_CLKENB_MARK, AVB_RXD2_MARK, TS_SDEN0_B_MARK,
-+	VI1_FIELD_MARK, AVB_RXD3_MARK, TS_SPSYNC0_B_MARK,
-+	VI1_CLK_MARK, AVB_RXD4_MARK, VI1_DATA0_MARK, AVB_RXD5_MARK,
-+	VI1_DATA1_MARK, AVB_RXD6_MARK, VI1_DATA2_MARK, AVB_RXD7_MARK,
-+	VI1_DATA3_MARK, AVB_RX_ER_MARK, VI1_DATA4_MARK, AVB_MDIO_MARK,
-+	VI1_DATA5_MARK, AVB_RX_DV_MARK, VI1_DATA6_MARK, AVB_MAGIC_MARK,
-+	VI1_DATA7_MARK, AVB_MDC_MARK,
-+	ETH_MDIO_MARK, AVB_RX_CLK_MARK, SCL2_C_MARK,
-+	ETH_CRS_DV_MARK, AVB_LINK_MARK, SDA2_C_MARK,
-+
-+	/* IPSR12 */
-+	ETH_RX_ER_MARK, AVB_CRS_MARK, SCL3_MARK, SCL7_MARK,
-+	ETH_RXD0_MARK, AVB_PHY_INT_MARK, SDA3_MARK, SDA7_MARK,
-+	ETH_RXD1_MARK, AVB_GTXREFCLK_MARK, CAN0_TX_C_MARK,
-+	SCL2_D_MARK, MSIOF1_RXD_E_MARK,
-+	ETH_LINK_MARK, AVB_TXD0_MARK, CAN0_RX_C_MARK,
-+	SDA2_D_MARK, MSIOF1_SCK_E_MARK,
-+	ETH_REFCLK_MARK, AVB_TXD1_MARK, SCIFA3_RXD_B_MARK,
-+	CAN1_RX_C_MARK, MSIOF1_SYNC_E_MARK,
-+	ETH_TXD1_MARK, AVB_TXD2_MARK, SCIFA3_TXD_B_MARK,
-+	CAN1_TX_C_MARK, MSIOF1_TXD_E_MARK,
-+	ETH_TX_EN_MARK, AVB_TXD3_MARK, TCLK1_B_MARK, CAN_CLK_B_MARK,
-+	ETH_MAGIC_MARK, AVB_TXD4_MARK, IETX_C_MARK,
-+	ETH_TXD0_MARK, AVB_TXD5_MARK, IECLK_C_MARK,
-+	ETH_MDC_MARK, AVB_TXD6_MARK, IERX_C_MARK,
-+	STP_IVCXO27_0_MARK, AVB_TXD7_MARK, SCIFB2_TXD_D_MARK,
-+	ADIDATA_B_MARK, MSIOF0_SYNC_C_MARK,
-+	STP_ISCLK_0_MARK, AVB_TX_EN_MARK, SCIFB2_RXD_D_MARK,
-+	ADICS_SAMP_B_MARK, MSIOF0_SCK_C_MARK,
-+
-+	/* IPSR13 */
-+	STP_ISD_0_MARK, AVB_TX_ER_MARK, SCIFB2_SCK_C_MARK,
-+	ADICLK_B_MARK, MSIOF0_SS1_C_MARK,
-+	STP_ISEN_0_MARK, AVB_TX_CLK_MARK, ADICHS0_B_MARK, MSIOF0_SS2_C_MARK,
-+	STP_ISSYNC_0_MARK, AVB_COL_MARK, ADICHS1_B_MARK, MSIOF0_RXD_C_MARK,
-+	STP_OPWM_0_MARK, AVB_GTX_CLK_MARK, PWM0_B_MARK,
-+	ADICHS2_B_MARK, MSIOF0_TXD_C_MARK,
-+	SD0_CLK_MARK, SPCLK_B_MARK, SD0_CMD_MARK, MOSI_IO0_B_MARK,
-+	SD0_DATA0_MARK, MISO_IO1_B_MARK, SD0_DATA1_MARK, IO2_B_MARK,
-+	SD0_DATA2_MARK, IO3_B_MARK, SD0_DATA3_MARK, SSL_B_MARK,
-+	SD0_CD_MARK, MMC_D6_B_MARK, SIM0_RST_B_MARK, CAN0_RX_F_MARK,
-+	SCIFA5_TXD_B_MARK, TX3_C_MARK,
-+	SD0_WP_MARK, MMC_D7_B_MARK, SIM0_D_B_MARK, CAN0_TX_F_MARK,
-+	SCIFA5_RXD_B_MARK, RX3_C_MARK,
-+	SD1_CMD_MARK, REMOCON_B_MARK, SD1_DATA0_MARK, SPEEDIN_B_MARK,
-+	SD1_DATA1_MARK, IETX_B_MARK, SD1_DATA2_MARK, IECLK_B_MARK,
-+	SD1_DATA3_MARK, IERX_B_MARK,
-+	SD1_CD_MARK, PWM0_MARK, TPU_TO0_MARK, SCL1_C_MARK,
-+
-+	/* IPSR14 */
-+	SD1_WP_MARK, PWM1_B_MARK, SDA1_C_MARK,
-+	SD2_CLK_MARK, MMC_CLK_MARK, SD2_CMD_MARK, MMC_CMD_MARK,
-+	SD2_DATA0_MARK, MMC_D0_MARK, SD2_DATA1_MARK, MMC_D1_MARK,
-+	SD2_DATA2_MARK, MMC_D2_MARK, SD2_DATA3_MARK, MMC_D3_MARK,
-+	SD2_CD_MARK, MMC_D4_MARK, SCL8_C_MARK, TX5_B_MARK, SCIFA5_TXD_C_MARK,
-+	SD2_WP_MARK, MMC_D5_MARK, SDA8_C_MARK, RX5_B_MARK, SCIFA5_RXD_C_MARK,
-+	MSIOF0_SCK_MARK, RX2_C_MARK, ADIDATA_MARK,
-+	VI1_CLK_C_MARK, VI1_G0_B_MARK,
-+	MSIOF0_SYNC_MARK, TX2_C_MARK, ADICS_SAMP_MARK,
-+	VI1_CLKENB_C_MARK, VI1_G1_B_MARK,
-+	MSIOF0_TXD_MARK, ADICLK_MARK, VI1_FIELD_C_MARK, VI1_G2_B_MARK,
-+	MSIOF0_RXD_MARK, ADICHS0_MARK, VI1_DATA0_C_MARK, VI1_G3_B_MARK,
-+	MSIOF0_SS1_MARK, MMC_D6_MARK, ADICHS1_MARK, TX0_E_MARK,
-+	VI1_HSYNC_N_C_MARK, SCL7_C_MARK, VI1_G4_B_MARK,
-+	MSIOF0_SS2_MARK, MMC_D7_MARK, ADICHS2_MARK, RX0_E_MARK,
-+	VI1_VSYNC_N_C_MARK, SDA7_C_MARK, VI1_G5_B_MARK,
-+
-+	/* IPSR15 */
-+	SIM0_RST_MARK, IETX_MARK, CAN1_TX_D_MARK,
-+	SIM0_CLK_MARK, IECLK_MARK, CAN_CLK_C_MARK,
-+	SIM0_D_MARK, IERX_MARK, CAN1_RX_D_MARK,
-+	GPS_CLK_MARK, DU1_DOTCLKIN_C_MARK, AUDIO_CLKB_B_MARK,
-+	PWM5_B_MARK, SCIFA3_TXD_C_MARK,
-+	GPS_SIGN_MARK, TX4_C_MARK, SCIFA4_TXD_C_MARK, PWM5_MARK,
-+	VI1_G6_B_MARK, SCIFA3_RXD_C_MARK,
-+	GPS_MAG_MARK, RX4_C_MARK, SCIFA4_RXD_C_MARK, PWM6_MARK,
-+	VI1_G7_B_MARK, SCIFA3_SCK_C_MARK,
-+	HCTS0_N_MARK, SCIFB0_CTS_N_MARK, GLO_I0_C_MARK,
-+	TCLK1_MARK, VI1_DATA1_C_MARK,
-+	HRTS0_N_MARK, SCIFB0_RTS_N_MARK, GLO_I1_C_MARK, VI1_DATA2_C_MARK,
-+	HSCK0_MARK, SCIFB0_SCK_MARK, GLO_Q0_C_MARK, CAN_CLK_MARK,
-+	TCLK2_MARK, VI1_DATA3_C_MARK,
-+	HRX0_MARK, SCIFB0_RXD_MARK, GLO_Q1_C_MARK,
-+	CAN0_RX_B_MARK, VI1_DATA4_C_MARK,
-+	HTX0_MARK, SCIFB0_TXD_MARK, GLO_SCLK_C_MARK,
-+	CAN0_TX_B_MARK, VI1_DATA5_C_MARK,
-+
-+	/* IPSR16 */
-+	HRX1_MARK, SCIFB1_RXD_MARK, VI1_R0_B_MARK,
-+	GLO_SDATA_C_MARK, VI1_DATA6_C_MARK,
-+	HTX1_MARK, SCIFB1_TXD_MARK, VI1_R1_B_MARK,
-+	GLO_SS_C_MARK, VI1_DATA7_C_MARK,
-+	HSCK1_MARK, SCIFB1_SCK_MARK, MLB_CK_MARK, GLO_RFON_C_MARK,
-+	HCTS1_N_MARK, SCIFB1_CTS_N_MARK, MLB_SIG_MARK, CAN1_TX_B_MARK,
-+	HRTS1_N_MARK, SCIFB1_RTS_N_MARK, MLB_DAT_MARK, CAN1_RX_B_MARK,
-+	PINMUX_MARK_END,
-+};
-+
-+static const u16 pinmux_data[] = {
-+	PINMUX_DATA_GP_ALL(), /* PINMUX_DATA(GP_M_N_DATA, GP_M_N_FN...), */
-+
-+	PINMUX_DATA(EX_CS0_N_MARK, FN_EX_CS0_N),
-+	PINMUX_DATA(RD_N_MARK, FN_RD_N),
-+	PINMUX_DATA(AUDIO_CLKA_MARK, FN_AUDIO_CLKA),
-+	PINMUX_DATA(VI0_CLK_MARK, FN_VI0_CLK),
-+	PINMUX_DATA(VI0_DATA0_VI0_B0_MARK, FN_VI0_DATA0_VI0_B0),
-+	PINMUX_DATA(VI0_DATA1_VI0_B1_MARK, FN_VI0_DATA1_VI0_B1),
-+	PINMUX_DATA(VI0_DATA2_VI0_B2_MARK, FN_VI0_DATA2_VI0_B2),
-+	PINMUX_DATA(VI0_DATA4_VI0_B4_MARK, FN_VI0_DATA4_VI0_B4),
-+	PINMUX_DATA(VI0_DATA5_VI0_B5_MARK, FN_VI0_DATA5_VI0_B5),
-+	PINMUX_DATA(VI0_DATA6_VI0_B6_MARK, FN_VI0_DATA6_VI0_B6),
-+	PINMUX_DATA(VI0_DATA7_VI0_B7_MARK, FN_VI0_DATA7_VI0_B7),
-+	PINMUX_DATA(USB0_PWEN_MARK, FN_USB0_PWEN),
-+	PINMUX_DATA(USB0_OVC_MARK, FN_USB0_OVC),
-+	PINMUX_DATA(USB1_PWEN_MARK, FN_USB1_PWEN),
-+	PINMUX_DATA(USB1_OVC_MARK, FN_USB1_OVC),
-+	PINMUX_DATA(DU0_DOTCLKIN_MARK, FN_DU0_DOTCLKIN),
-+
-+	/* IPSR0 */
-+	PINMUX_IPSR_DATA(IP0_0, D0),
-+	PINMUX_IPSR_DATA(IP0_1, D1),
-+	PINMUX_IPSR_DATA(IP0_2, D2),
-+	PINMUX_IPSR_DATA(IP0_3, D3),
-+	PINMUX_IPSR_DATA(IP0_4, D4),
-+	PINMUX_IPSR_DATA(IP0_5, D5),
-+	PINMUX_IPSR_DATA(IP0_6, D6),
-+	PINMUX_IPSR_DATA(IP0_7, D7),
-+	PINMUX_IPSR_DATA(IP0_8, D8),
-+	PINMUX_IPSR_DATA(IP0_9, D9),
-+	PINMUX_IPSR_DATA(IP0_10, D10),
-+	PINMUX_IPSR_DATA(IP0_11, D11),
-+	PINMUX_IPSR_DATA(IP0_12, D12),
-+	PINMUX_IPSR_DATA(IP0_13, D13),
-+	PINMUX_IPSR_DATA(IP0_14, D14),
-+	PINMUX_IPSR_DATA(IP0_15, D15),
-+	PINMUX_IPSR_DATA(IP0_18_16, A0),
-+	PINMUX_IPSR_MODSEL_DATA(IP0_18_16, ATAWR0_N_C, SEL_LBS_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP0_18_16, MSIOF0_SCK_B, SEL_SOF0_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP0_18_16, SCL0_C, SEL_IIC0_2),
-+	PINMUX_IPSR_DATA(IP0_18_16, PWM2_B),
-+	PINMUX_IPSR_DATA(IP0_20_19, A1),
-+	PINMUX_IPSR_MODSEL_DATA(IP0_20_19, MSIOF0_SYNC_B, SEL_SOF0_1),
-+	PINMUX_IPSR_DATA(IP0_22_21, A2),
-+	PINMUX_IPSR_MODSEL_DATA(IP0_22_21, MSIOF0_SS1_B, SEL_SOF0_1),
-+	PINMUX_IPSR_DATA(IP0_24_23, A3),
-+	PINMUX_IPSR_MODSEL_DATA(IP0_24_23, MSIOF0_SS2_B, SEL_SOF0_1),
-+	PINMUX_IPSR_DATA(IP0_26_25, A4),
-+	PINMUX_IPSR_MODSEL_DATA(IP0_26_25, MSIOF0_TXD_B, SEL_SOF0_1),
-+	PINMUX_IPSR_DATA(IP0_28_27, A5),
-+	PINMUX_IPSR_MODSEL_DATA(IP0_28_27, MSIOF0_RXD_B, SEL_SOF0_1),
-+	PINMUX_IPSR_DATA(IP0_30_29, A6),
-+	PINMUX_IPSR_MODSEL_DATA(IP0_30_29, MSIOF1_SCK, SEL_SOF1_0),
-+
-+	/* IPSR1 */
-+	PINMUX_IPSR_DATA(IP1_1_0, A7),
-+	PINMUX_IPSR_MODSEL_DATA(IP1_1_0, MSIOF1_SYNC, SEL_SOF1_0),
-+	PINMUX_IPSR_DATA(IP1_3_2, A8),
-+	PINMUX_IPSR_MODSEL_DATA(IP1_3_2, MSIOF1_SS1, SEL_SOF1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP1_3_2, SCL0, SEL_IIC0_0),
-+	PINMUX_IPSR_DATA(IP1_5_4, A9),
-+	PINMUX_IPSR_MODSEL_DATA(IP1_5_4, MSIOF1_SS2, SEL_SOF1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP1_5_4, SDA0, SEL_IIC0_0),
-+	PINMUX_IPSR_DATA(IP1_7_6, A10),
-+	PINMUX_IPSR_MODSEL_DATA(IP1_7_6, MSIOF1_TXD, SEL_SOF1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP1_7_6, MSIOF1_TXD_D, SEL_SOF1_3),
-+	PINMUX_IPSR_DATA(IP1_10_8, A11),
-+	PINMUX_IPSR_MODSEL_DATA(IP1_10_8, MSIOF1_RXD, SEL_SOF1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP1_10_8, SCL3_D, SEL_IIC3_3),
-+	PINMUX_IPSR_MODSEL_DATA(IP1_10_8, MSIOF1_RXD_D, SEL_SOF1_3),
-+	PINMUX_IPSR_DATA(IP1_13_11, A12),
-+	PINMUX_IPSR_MODSEL_DATA(IP1_13_11, FMCLK, SEL_FM_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP1_13_11, SDA3_D, SEL_IIC3_3),
-+	PINMUX_IPSR_MODSEL_DATA(IP1_13_11, MSIOF1_SCK_D, SEL_SOF1_3),
-+	PINMUX_IPSR_DATA(IP1_16_14, A13),
-+	PINMUX_IPSR_MODSEL_DATA(IP1_16_14, ATAG0_N_C, SEL_LBS_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP1_16_14, BPFCLK, SEL_FM_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP1_16_14, MSIOF1_SS1_D, SEL_SOF1_3),
-+	PINMUX_IPSR_DATA(IP1_19_17, A14),
-+	PINMUX_IPSR_MODSEL_DATA(IP1_19_17, ATADIR0_N_C, SEL_LBS_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP1_19_17, FMIN, SEL_FM_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP1_19_17, FMIN_C, SEL_FM_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP1_19_17, MSIOF1_SYNC_D, SEL_SOF1_3),
-+	PINMUX_IPSR_DATA(IP1_22_20, A15),
-+	PINMUX_IPSR_MODSEL_DATA(IP1_22_20, BPFCLK_C, SEL_FM_2),
-+	PINMUX_IPSR_DATA(IP1_25_23, A16),
-+	PINMUX_IPSR_MODSEL_DATA(IP1_25_23, DREQ2_B, SEL_LBS_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP1_25_23, FMCLK_C, SEL_FM_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP1_25_23, SCIFA1_SCK_B, SEL_SCIFA1_1),
-+	PINMUX_IPSR_DATA(IP1_28_26, A17),
-+	PINMUX_IPSR_MODSEL_DATA(IP1_28_26, DACK2_B, SEL_LBS_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP1_28_26, SDA0_C, SEL_IIC0_2),
-+	PINMUX_IPSR_DATA(IP1_31_29, A18),
-+	PINMUX_IPSR_MODSEL_DATA(IP1_31_29, DREQ1, SEL_LBS_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP1_31_29, SCIFA1_RXD_C, SEL_SCIFA1_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP1_31_29, SCIFB1_RXD_C, SEL_SCIFB1_2),
-+
-+	/* IPSR2 */
-+	PINMUX_IPSR_DATA(IP2_2_0, A19),
-+	PINMUX_IPSR_DATA(IP2_2_0, DACK1),
-+	PINMUX_IPSR_MODSEL_DATA(IP2_2_0, SCIFA1_TXD_C, SEL_SCIFA1_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP2_2_0, SCIFB1_TXD_C, SEL_SCIFB1_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP2_2_0, SCIFB1_SCK_B, SEL_SCIFB1_0),
-+	PINMUX_IPSR_DATA(IP2_2_0, A20),
-+	PINMUX_IPSR_MODSEL_DATA(IP2_4_3, SPCLK, SEL_QSP_0),
-+	PINMUX_IPSR_DATA(IP2_6_5, A21),
-+	PINMUX_IPSR_MODSEL_DATA(IP2_6_5, ATAWR0_N_B, SEL_LBS_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP2_6_5, MOSI_IO0, SEL_QSP_0),
-+	PINMUX_IPSR_DATA(IP2_9_7, A22),
-+	PINMUX_IPSR_MODSEL_DATA(IP2_9_7, MISO_IO1, SEL_QSP_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP2_9_7, FMCLK_B, SEL_FM_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP2_9_7, TX0, SEL_SCIF0_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP2_9_7, SCIFA0_TXD, SEL_SCFA_0),
-+	PINMUX_IPSR_DATA(IP2_12_10, A23),
-+	PINMUX_IPSR_MODSEL_DATA(IP2_12_10, IO2, SEL_QSP_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP2_12_10, BPFCLK_B, SEL_FM_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP2_12_10, RX0, SEL_SCIF0_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP2_12_10, SCIFA0_RXD, SEL_SCFA_0),
-+	PINMUX_IPSR_DATA(IP2_15_13, A24),
-+	PINMUX_IPSR_MODSEL_DATA(IP2_15_13, DREQ2, SEL_LBS_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP2_15_13, IO3, SEL_QSP_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP2_15_13, TX1, SEL_SCIF1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP2_15_13, SCIFA1_TXD, SEL_SCIFA1_0),
-+	PINMUX_IPSR_DATA(IP2_18_16, A25),
-+	PINMUX_IPSR_MODSEL_DATA(IP2_18_16, DACK2, SEL_LBS_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP2_18_16, SSL, SEL_QSP_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP2_18_16, DREQ1_C, SEL_LBS_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP2_18_16, RX1, SEL_SCIF1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP2_18_16, SCIFA1_RXD, SEL_SCIFA1_0),
-+	PINMUX_IPSR_DATA(IP2_20_19, CS0_N),
-+	PINMUX_IPSR_MODSEL_DATA(IP2_20_19, ATAG0_N_B, SEL_LBS_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP2_20_19, SCL1, SEL_IIC1_0),
-+	PINMUX_IPSR_DATA(IP2_22_21, CS1_N_A26),
-+	PINMUX_IPSR_MODSEL_DATA(IP2_22_21, ATADIR0_N_B, SEL_LBS_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP2_22_21, SDA1, SEL_IIC1_0),
-+	PINMUX_IPSR_DATA(IP2_24_23, EX_CS1_N),
-+	PINMUX_IPSR_MODSEL_DATA(IP2_24_23, MSIOF2_SCK, SEL_SOF2_0),
-+	PINMUX_IPSR_DATA(IP2_26_25, EX_CS2_N),
-+	PINMUX_IPSR_MODSEL_DATA(IP2_26_25, ATAWR0_N, SEL_LBS_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP2_26_25, MSIOF2_SYNC, SEL_SOF2_0),
-+	PINMUX_IPSR_DATA(IP2_29_27, EX_CS3_N),
-+	PINMUX_IPSR_MODSEL_DATA(IP2_29_27, ATADIR0_N, SEL_LBS_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP2_29_27, MSIOF2_TXD, SEL_SOF2_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP2_29_27, ATAG0_N, SEL_LBS_0),
-+	PINMUX_IPSR_DATA(IP2_29_27, EX_WAIT1),
-+
-+	/* IPSR3 */
-+	PINMUX_IPSR_DATA(IP3_2_0, EX_CS4_N),
-+	PINMUX_IPSR_MODSEL_DATA(IP3_2_0, ATARD0_N, SEL_LBS_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP3_2_0, MSIOF2_RXD, SEL_SOF2_0),
-+	PINMUX_IPSR_DATA(IP3_2_0, EX_WAIT2),
-+	PINMUX_IPSR_DATA(IP3_5_3, EX_CS5_N),
-+	PINMUX_IPSR_DATA(IP3_5_3, ATACS00_N),
-+	PINMUX_IPSR_MODSEL_DATA(IP3_5_3, MSIOF2_SS1, SEL_SOF2_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP3_5_3, HRX1_B, SEL_HSCIF1_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP3_5_3, SCIFB1_RXD_B, SEL_SCIFB1_1),
-+	PINMUX_IPSR_DATA(IP3_5_3, PWM1),
-+	PINMUX_IPSR_DATA(IP3_5_3, TPU_TO1),
-+	PINMUX_IPSR_DATA(IP3_8_6, BS_N),
-+	PINMUX_IPSR_DATA(IP3_8_6, ATACS10_N),
-+	PINMUX_IPSR_MODSEL_DATA(IP3_8_6, MSIOF2_SS2, SEL_SOF2_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP3_8_6, HTX1_B, SEL_HSCIF1_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP3_8_6, SCIFB1_TXD_B, SEL_SCIFB1_1),
-+	PINMUX_IPSR_DATA(IP3_8_6, PWM2),
-+	PINMUX_IPSR_DATA(IP3_8_6, TPU_TO2),
-+	PINMUX_IPSR_DATA(IP3_11_9, RD_WR_N),
-+	PINMUX_IPSR_MODSEL_DATA(IP3_11_9, HRX2_B, SEL_HSCIF2_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP3_11_9, FMIN_B, SEL_FM_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP3_11_9, SCIFB0_RXD_B, SEL_SCIFB_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP3_11_9, DREQ1_D, SEL_LBS_1),
-+	PINMUX_IPSR_DATA(IP3_13_12, WE0_N),
-+	PINMUX_IPSR_MODSEL_DATA(IP3_13_12, HCTS2_N_B, SEL_HSCIF2_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP3_13_12, SCIFB0_TXD_B, SEL_SCIFB_1),
-+	PINMUX_IPSR_DATA(IP3_15_14, WE1_N),
-+	PINMUX_IPSR_MODSEL_DATA(IP3_15_14, ATARD0_N_B, SEL_LBS_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP3_15_14, HTX2_B, SEL_HSCIF2_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP3_15_14, SCIFB0_RTS_N_B, SEL_SCIFB_1),
-+	PINMUX_IPSR_DATA(IP3_17_16, EX_WAIT0),
-+	PINMUX_IPSR_MODSEL_DATA(IP3_17_16, HRTS2_N_B, SEL_HSCIF2_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP3_17_16, SCIFB0_CTS_N_B, SEL_SCIFB_1),
-+	PINMUX_IPSR_DATA(IP3_19_18, DREQ0),
-+	PINMUX_IPSR_DATA(IP3_19_18, PWM3),
-+	PINMUX_IPSR_DATA(IP3_19_18, TPU_TO3),
-+	PINMUX_IPSR_DATA(IP3_21_20, DACK0),
-+	PINMUX_IPSR_DATA(IP3_21_20, DRACK0),
-+	PINMUX_IPSR_MODSEL_DATA(IP3_21_20, REMOCON, SEL_RCN_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP3_24_22, SPEEDIN, SEL_RSP_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP3_24_22, HSCK0_C, SEL_HSCIF0_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP3_24_22, HSCK2_C, SEL_HSCIF2_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP3_24_22, SCIFB0_SCK_B, SEL_SCIFB_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP3_24_22, SCIFB2_SCK_B, SEL_SCIFB2_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP3_24_22, DREQ2_C, SEL_LBS_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP3_30_28, HTX2_C, SEL_HSCIF2_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP3_27_25, SSI_SCK0129, SEL_SSI0_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP3_27_25, HRX0_C, SEL_HSCIF0_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP3_27_25, HRX2_C, SEL_HSCIF2_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP3_27_25, SCIFB0_RXD_C, SEL_SCIFB_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP3_27_25, SCIFB2_RXD_C, SEL_SCIFB2_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP3_30_28, SSI_WS0129, SEL_SSI0_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP3_30_28, HTX0_C, SEL_HSCIF0_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP3_30_28, HTX2_C, SEL_HSCIF2_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP3_30_28, SCIFB0_TXD_C, SEL_SCIFB_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP3_30_28, SCIFB2_TXD_C, SEL_SCIFB2_2),
-+
-+	/* IPSR4 */
-+	PINMUX_IPSR_MODSEL_DATA(IP4_1_0, SSI_SDATA0, SEL_SSI0_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_1_0, SCL0_B, SEL_IIC0_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_1_0, SCL7_B, SEL_IIC7_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_1_0, MSIOF2_SCK_C, SEL_SOF2_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_4_2, SSI_SCK1, SEL_SSI1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_4_2, SDA0_B, SEL_IIC0_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_4_2, SDA7_B, SEL_IIC7_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_4_2, MSIOF2_SYNC_C, SEL_SOF2_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_4_2, GLO_I0_D, SEL_GPS_3),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_7_5, SSI_WS1, SEL_SSI1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_7_5, SCL1_B, SEL_IIC1_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_7_5, SCL8_B, SEL_IIC8_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_7_5, MSIOF2_TXD_C, SEL_SOF2_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_7_5, GLO_I1_D, SEL_GPS_3),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_9_8, SSI_SDATA1, SEL_SSI1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_9_8, SDA1_B, SEL_IIC1_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_9_8, SDA8_B, SEL_IIC8_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_9_8, MSIOF2_RXD_C, SEL_SOF2_2),
-+	PINMUX_IPSR_DATA(IP4_12_10, SSI_SCK2),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_12_10, SCL2, SEL_IIC2_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_12_10, GPS_CLK_B, SEL_GPS_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_12_10, GLO_Q0_D, SEL_GPS_3),
-+	PINMUX_IPSR_DATA(IP4_15_13, SSI_WS2),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_15_13, SDA2, SEL_IIC2_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_15_13, GPS_SIGN_B, SEL_GPS_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_15_13, RX2_E, SEL_SCIF2_4),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_15_13, GLO_Q1_D, SEL_GPS_3),
-+	PINMUX_IPSR_DATA(IP4_18_16, SSI_SDATA2),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_18_16, GPS_MAG_B, SEL_GPS_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_18_16, TX2_E, SEL_SCIF2_4),
-+	PINMUX_IPSR_DATA(IP4_19, SSI_SCK34),
-+	PINMUX_IPSR_DATA(IP4_20, SSI_WS34),
-+	PINMUX_IPSR_DATA(IP4_21, SSI_SDATA3),
-+	PINMUX_IPSR_DATA(IP4_23_22, SSI_SCK4),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_23_22, GLO_SS_D, SEL_GPS_3),
-+	PINMUX_IPSR_DATA(IP4_25_24, SSI_WS4),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_25_24, GLO_RFON_D, SEL_GPS_3),
-+	PINMUX_IPSR_DATA(IP4_27_26, SSI_SDATA4),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_27_26, MSIOF2_SCK_D, SEL_SOF2_3),
-+	PINMUX_IPSR_DATA(IP4_30_28, SSI_SCK5),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_30_28, MSIOF1_SCK_C, SEL_SOF1_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_30_28, TS_SDATA0, SEL_TSIF0_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_30_28, GLO_I0, SEL_GPS_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP4_30_28, MSIOF2_SYNC_D, SEL_SOF2_3),
-+	PINMUX_IPSR_DATA(IP4_30_28, VI1_R2_B),
-+
-+	/* IPSR5 */
-+	PINMUX_IPSR_DATA(IP5_2_0, SSI_WS5),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_2_0, MSIOF1_SYNC_C, SEL_SOF1_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_2_0, TS_SCK0, SEL_TSIF0_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_2_0, GLO_I1, SEL_GPS_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_2_0, MSIOF2_TXD_D, SEL_SOF2_3),
-+	PINMUX_IPSR_DATA(IP5_2_0, VI1_R3_B),
-+	PINMUX_IPSR_DATA(IP5_5_3, SSI_SDATA5),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_5_3, MSIOF1_TXD_C, SEL_SOF1_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_5_3, TS_SDEN0, SEL_TSIF0_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_5_3, GLO_Q0, SEL_GPS_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_5_3, MSIOF2_SS1_D, SEL_SOF2_3),
-+	PINMUX_IPSR_DATA(IP5_5_3, VI1_R4_B),
-+	PINMUX_IPSR_DATA(IP5_8_6, SSI_SCK6),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_8_6, MSIOF1_RXD_C, SEL_SOF1_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_8_6, TS_SPSYNC0, SEL_TSIF0_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_8_6, GLO_Q1, SEL_GPS_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_8_6, MSIOF2_RXD_D, SEL_SOF2_3),
-+	PINMUX_IPSR_DATA(IP5_8_6, VI1_R5_B),
-+	PINMUX_IPSR_DATA(IP5_11_9, SSI_WS6),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_11_9, GLO_SCLK, SEL_GPS_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_11_9, MSIOF2_SS2_D, SEL_SOF2_3),
-+	PINMUX_IPSR_DATA(IP5_11_9, VI1_R6_B),
-+	PINMUX_IPSR_DATA(IP5_14_12, SSI_SDATA6),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_14_12, STP_IVCXO27_0_B, SEL_SSP_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_14_12, GLO_SDATA, SEL_GPS_0),
-+	PINMUX_IPSR_DATA(IP5_14_12, VI1_R7_B),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_16_15, SSI_SCK78, SEL_SSI7_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_16_15, STP_ISCLK_0_B, SEL_SSP_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_16_15, GLO_SS, SEL_GPS_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_19_17, SSI_WS78, SEL_SSI7_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_19_17, TX0_D, SEL_SCIF0_3),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_19_17, STP_ISD_0_B, SEL_SSP_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_19_17, GLO_RFON, SEL_GPS_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_21_20, SSI_SDATA7, SEL_SSI7_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_21_20, RX0_D, SEL_SCIF0_3),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_21_20, STP_ISEN_0_B, SEL_SSP_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_23_22, SSI_SDATA8, SEL_SSI8_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_23_22, TX1_D, SEL_SCIF1_3),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_23_22, STP_ISSYNC_0_B, SEL_SSP_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_25_24, SSI_SCK9, SEL_SSI9_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_25_24, RX1_D, SEL_SCIF1_3),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_25_24, GLO_SCLK_D, SEL_GPS_3),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_28_26, SSI_WS9, SEL_SSI9_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_28_26, TX3_D, SEL_SCIF3_3),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_28_26, CAN0_TX_D, SEL_CAN0_3),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_28_26, GLO_SDATA_D, SEL_GPS_3),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_31_29, SSI_SDATA9, SEL_SSI9_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_31_29, RX3_D, SEL_SCIF3_3),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_31_29, CAN0_RX_D, SEL_CAN0_3),
-+
-+	/* IPSR6 */
-+	PINMUX_IPSR_MODSEL_DATA(IP6_2_0, AUDIO_CLKB, SEL_ADG_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_2_0, STP_OPWM_0_B, SEL_SSP_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_2_0, MSIOF1_SCK_B, SEL_SOF1_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_2_0, SCIF_CLK, SEL_SCIF_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_2_0, BPFCLK_E, SEL_FM_4),
-+	PINMUX_IPSR_DATA(IP6_5_3, AUDIO_CLKC),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_5_3, SCIFB0_SCK_C, SEL_SCIFB_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_5_3, MSIOF1_SYNC_B, SEL_SOF1_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_5_3, RX2, SEL_SCIF2_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_5_3, SCIFA2_RXD, SEL_SCIFA2_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_5_3, FMIN_E, SEL_FM_4),
-+	PINMUX_IPSR_DATA(IP6_7_6, AUDIO_CLKOUT),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_7_6, MSIOF1_SS1_B, SEL_SOF1_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_5_3, TX2, SEL_SCIF2_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_7_6, SCIFA2_TXD, SEL_SCIFA2_0),
-+	PINMUX_IPSR_DATA(IP6_9_8, IRQ0),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_9_8, SCIFB1_RXD_D, SEL_SCIFB1_3),
-+	PINMUX_IPSR_DATA(IP6_9_8, INTC_IRQ0_N),
-+	PINMUX_IPSR_DATA(IP6_11_10, IRQ1),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_11_10, SCIFB1_SCK_C, SEL_SCIFB1_2),
-+	PINMUX_IPSR_DATA(IP6_11_10, INTC_IRQ1_N),
-+	PINMUX_IPSR_DATA(IP6_13_12, IRQ2),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_13_12, SCIFB1_TXD_D, SEL_SCIFB1_3),
-+	PINMUX_IPSR_DATA(IP6_13_12, INTC_IRQ2_N),
-+	PINMUX_IPSR_DATA(IP6_15_14, IRQ3),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_15_14, SCL4_C, SEL_IIC4_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_15_14, MSIOF2_TXD_E, SEL_SOF2_4),
-+	PINMUX_IPSR_DATA(IP6_15_14, INTC_IRQ4_N),
-+	PINMUX_IPSR_DATA(IP6_18_16, IRQ4),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_18_16, HRX1_C, SEL_HSCIF1_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_18_16, SDA4_C, SEL_IIC4_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_18_16, MSIOF2_RXD_E, SEL_SOF2_4),
-+	PINMUX_IPSR_DATA(IP6_18_16, INTC_IRQ4_N),
-+	PINMUX_IPSR_DATA(IP6_20_19, IRQ5),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_20_19, HTX1_C, SEL_HSCIF1_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_20_19, SCL1_E, SEL_IIC1_4),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_20_19, MSIOF2_SCK_E, SEL_SOF2_4),
-+	PINMUX_IPSR_DATA(IP6_23_21, IRQ6),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_23_21, HSCK1_C, SEL_HSCIF1_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_23_21, MSIOF1_SS2_B, SEL_SOF1_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_23_21, SDA1_E, SEL_IIC1_4),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_23_21, MSIOF2_SYNC_E, SEL_SOF2_4),
-+	PINMUX_IPSR_DATA(IP6_26_24, IRQ7),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_26_24, HCTS1_N_C, SEL_HSCIF1_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_26_24, MSIOF1_TXD_B, SEL_SOF1_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_26_24, GPS_CLK_C, SEL_GPS_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_26_24, GPS_CLK_D, SEL_GPS_3),
-+	PINMUX_IPSR_DATA(IP6_29_27, IRQ8),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_29_27, HRTS1_N_C, SEL_HSCIF1_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_29_27, MSIOF1_RXD_B, SEL_SOF1_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_29_27, GPS_SIGN_C, SEL_GPS_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_29_27, GPS_SIGN_D, SEL_GPS_3),
-+
-+	/* IPSR7 */
-+	PINMUX_IPSR_DATA(IP7_2_0, IRQ9),
-+	PINMUX_IPSR_MODSEL_DATA(IP7_2_0, DU1_DOTCLKIN_B, SEL_DIS_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP7_2_0, CAN_CLK_D, SEL_CANCLK_3),
-+	PINMUX_IPSR_MODSEL_DATA(IP7_2_0, GPS_MAG_C, SEL_GPS_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP7_2_0, SCIF_CLK_B, SEL_SCIF_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP7_2_0, GPS_MAG_D, SEL_GPS_3),
-+	PINMUX_IPSR_DATA(IP7_5_3, DU1_DR0),
-+	PINMUX_IPSR_DATA(IP7_5_3, LCDOUT0),
-+	PINMUX_IPSR_MODSEL_DATA(IP7_5_3, VI1_DATA0_B, SEL_VI1_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP7_5_3, TX0_B, SEL_SCIF0_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP7_5_3, SCIFA0_TXD_B, SEL_SCFA_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP7_5_3, MSIOF2_SCK_B, SEL_SOF2_1),
-+	PINMUX_IPSR_DATA(IP7_8_6, DU1_DR1),
-+	PINMUX_IPSR_DATA(IP7_8_6, LCDOUT1),
-+	PINMUX_IPSR_MODSEL_DATA(IP7_8_6, VI1_DATA1_B, SEL_VI1_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP7_8_6, RX0_B, SEL_SCIF0_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP7_8_6, SCIFA0_RXD_B, SEL_SCFA_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP7_8_6, MSIOF2_SYNC_B, SEL_SOF2_1),
-+	PINMUX_IPSR_DATA(IP7_10_9, DU1_DR2),
-+	PINMUX_IPSR_DATA(IP7_10_9, LCDOUT2),
-+	PINMUX_IPSR_MODSEL_DATA(IP7_10_9, SSI_SCK0129_B, SEL_SSI0_1),
-+	PINMUX_IPSR_DATA(IP7_12_11, DU1_DR3),
-+	PINMUX_IPSR_DATA(IP7_12_11, LCDOUT3),
-+	PINMUX_IPSR_MODSEL_DATA(IP7_12_11, SSI_WS0129_B, SEL_SSI0_1),
-+	PINMUX_IPSR_DATA(IP7_14_13, DU1_DR4),
-+	PINMUX_IPSR_DATA(IP7_14_13, LCDOUT4),
-+	PINMUX_IPSR_MODSEL_DATA(IP7_14_13, SSI_SDATA0_B, SEL_SSI0_1),
-+	PINMUX_IPSR_DATA(IP7_16_15, DU1_DR5),
-+	PINMUX_IPSR_DATA(IP7_16_15, LCDOUT5),
-+	PINMUX_IPSR_MODSEL_DATA(IP7_16_15, SSI_SCK1_B, SEL_SSI1_1),
-+	PINMUX_IPSR_DATA(IP7_18_17, DU1_DR6),
-+	PINMUX_IPSR_DATA(IP7_18_17, LCDOUT6),
-+	PINMUX_IPSR_MODSEL_DATA(IP7_18_17, SSI_WS1_B, SEL_SSI1_1),
-+	PINMUX_IPSR_DATA(IP7_20_19, DU1_DR7),
-+	PINMUX_IPSR_DATA(IP7_20_19, LCDOUT7),
-+	PINMUX_IPSR_MODSEL_DATA(IP7_20_19, SSI_SDATA1_B, SEL_SSI1_1),
-+	PINMUX_IPSR_DATA(IP7_23_21, DU1_DG0),
-+	PINMUX_IPSR_DATA(IP7_23_21, LCDOUT8),
-+	PINMUX_IPSR_MODSEL_DATA(IP7_23_21, VI1_DATA2_B, SEL_VI1_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP7_23_21, TX1_B, SEL_SCIF1_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP7_23_21, SCIFA1_TXD_B, SEL_SCIFA1_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP7_23_21, MSIOF2_SS1_B, SEL_SOF2_1),
-+	PINMUX_IPSR_DATA(IP7_26_24, DU1_DG1),
-+	PINMUX_IPSR_DATA(IP7_26_24, LCDOUT9),
-+	PINMUX_IPSR_MODSEL_DATA(IP7_26_24, VI1_DATA3_B, SEL_VI1_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP7_26_24, RX1_B, SEL_SCIF1_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP7_26_24, SCIFA1_RXD_B, SEL_SCIFA1_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP7_26_24, MSIOF2_SS2_B, SEL_SOF2_1),
-+	PINMUX_IPSR_DATA(IP7_29_27, DU1_DG2),
-+	PINMUX_IPSR_DATA(IP7_29_27, LCDOUT10),
-+	PINMUX_IPSR_MODSEL_DATA(IP7_29_27, VI1_DATA4_B, SEL_VI1_1),
-+	PINMUX_IPSR_DATA(IP7_29_27, SCIF1_SCK_B),
-+	PINMUX_IPSR_MODSEL_DATA(IP7_29_27, SCIFA1_SCK, SEL_SCIFA1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP7_29_27, SSI_SCK78_B, SEL_SSI7_1),
-+
-+	/* IPSR8 */
-+	PINMUX_IPSR_DATA(IP8_2_0, DU1_DG3),
-+	PINMUX_IPSR_DATA(IP8_2_0, LCDOUT11),
-+	PINMUX_IPSR_MODSEL_DATA(IP8_2_0, VI1_DATA5_B, SEL_VI1_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP8_2_0, SSI_WS78_B, SEL_SSI7_1),
-+	PINMUX_IPSR_DATA(IP8_5_3, DU1_DG4),
-+	PINMUX_IPSR_DATA(IP8_5_3, LCDOUT12),
-+	PINMUX_IPSR_MODSEL_DATA(IP8_5_3, VI1_DATA6_B, SEL_VI1_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP8_5_3, HRX0_B, SEL_HSCIF0_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP8_5_3, SCIFB2_RXD_B, SEL_SCIFB2_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP8_5_3, SSI_SDATA7_B, SEL_SSI7_1),
-+	PINMUX_IPSR_DATA(IP8_8_6, DU1_DG5),
-+	PINMUX_IPSR_DATA(IP8_8_6, LCDOUT13),
-+	PINMUX_IPSR_MODSEL_DATA(IP8_8_6, VI1_DATA7_B, SEL_VI1_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP8_8_6, HCTS0_N_B, SEL_HSCIF0_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP8_8_6, SCIFB2_TXD_B, SEL_SCIFB2_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP8_8_6, SSI_SDATA8_B, SEL_SSI8_1),
-+	PINMUX_IPSR_DATA(IP8_11_9, DU1_DG6),
-+	PINMUX_IPSR_DATA(IP8_11_9, LCDOUT14),
-+	PINMUX_IPSR_MODSEL_DATA(IP8_11_9, HRTS0_N_B, SEL_HSCIF0_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP8_11_9, SCIFB2_CTS_N_B, SEL_SCIFB2_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP8_11_9, SSI_SCK9_B, SEL_SSI9_1),
-+	PINMUX_IPSR_DATA(IP8_14_12, DU1_DG7),
-+	PINMUX_IPSR_DATA(IP8_14_12, LCDOUT15),
-+	PINMUX_IPSR_MODSEL_DATA(IP8_14_12, HTX0_B, SEL_HSCIF0_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP8_14_12, SCIFB2_RTS_N_B, SEL_SCIFB2_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP8_14_12, SSI_WS9_B, SEL_SSI9_1),
-+	PINMUX_IPSR_DATA(IP8_17_15, DU1_DB0),
-+	PINMUX_IPSR_DATA(IP8_17_15, LCDOUT16),
-+	PINMUX_IPSR_MODSEL_DATA(IP8_17_15, VI1_CLK_B, SEL_VI1_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP8_17_15, TX2_B, SEL_SCIF2_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP8_17_15, SCIFA2_TXD_B, SEL_SCIFA2_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP8_17_15, MSIOF2_TXD_B, SEL_SOF2_1),
-+	PINMUX_IPSR_DATA(IP8_20_18, DU1_DB1),
-+	PINMUX_IPSR_DATA(IP8_20_18, LCDOUT17),
-+	PINMUX_IPSR_MODSEL_DATA(IP8_20_18, VI1_HSYNC_N_B, SEL_VI1_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP8_20_18, RX2_B, SEL_SCIF2_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP8_20_18, SCIFA2_RXD_B, SEL_SCIFA2_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP8_20_18, MSIOF2_RXD_B, SEL_SOF2_1),
-+	PINMUX_IPSR_DATA(IP8_23_21, DU1_DB2),
-+	PINMUX_IPSR_DATA(IP8_23_21, LCDOUT18),
-+	PINMUX_IPSR_MODSEL_DATA(IP8_23_21, VI1_VSYNC_N_B, SEL_VI1_1),
-+	PINMUX_IPSR_DATA(IP8_23_21, SCIF2_SCK_B),
-+	PINMUX_IPSR_MODSEL_DATA(IP8_23_21, SCIFA2_SCK, SEL_SCIFA2_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP8_23_21, SSI_SDATA9_B, SEL_SSI9_1),
-+	PINMUX_IPSR_DATA(IP8_25_24, DU1_DB3),
-+	PINMUX_IPSR_DATA(IP8_25_24, LCDOUT19),
-+	PINMUX_IPSR_MODSEL_DATA(IP8_25_24, VI1_CLKENB_B, SEL_VI1_1),
-+	PINMUX_IPSR_DATA(IP8_27_26, DU1_DB4),
-+	PINMUX_IPSR_DATA(IP8_27_26, LCDOUT20),
-+	PINMUX_IPSR_MODSEL_DATA(IP8_27_26, VI1_FIELD_B, SEL_VI1_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP8_27_26, CAN1_RX, SEL_CAN1_0),
-+	PINMUX_IPSR_DATA(IP8_30_28, DU1_DB5),
-+	PINMUX_IPSR_DATA(IP8_30_28, LCDOUT21),
-+	PINMUX_IPSR_MODSEL_DATA(IP8_30_28, TX3, SEL_SCIF3_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP8_30_28, SCIFA3_TXD, SEL_SCIFA3_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP8_30_28, CAN1_TX, SEL_CAN1_0),
-+
-+	/* IPSR9 */
-+	PINMUX_IPSR_DATA(IP9_2_0, DU1_DB6),
-+	PINMUX_IPSR_DATA(IP9_2_0, LCDOUT22),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_2_0, SCL3_C, SEL_IIC3_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_2_0, RX3, SEL_SCIF3_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_2_0, SCIFA3_RXD, SEL_SCIFA3_0),
-+	PINMUX_IPSR_DATA(IP9_5_3, DU1_DB7),
-+	PINMUX_IPSR_DATA(IP9_5_3, LCDOUT23),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_5_3, SDA3_C, SEL_IIC3_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_5_3, SCIF3_SCK, SEL_SCIF3_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_5_3, SCIFA3_SCK, SEL_SCIFA3_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_6, DU1_DOTCLKIN, SEL_DIS_0),
-+	PINMUX_IPSR_DATA(IP9_6, QSTVA_QVS),
-+	PINMUX_IPSR_DATA(IP9_7, DU1_DOTCLKOUT0),
-+	PINMUX_IPSR_DATA(IP9_7, QCLK),
-+	PINMUX_IPSR_DATA(IP9_10_8, DU1_DOTCLKOUT1),
-+	PINMUX_IPSR_DATA(IP9_10_8, QSTVB_QVE),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_10_8, CAN0_TX, SEL_CAN0_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_10_8, TX3_B, SEL_SCIF3_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_10_8, SCL2_B, SEL_IIC2_1),
-+	PINMUX_IPSR_DATA(IP9_10_8, PWM4),
-+	PINMUX_IPSR_DATA(IP9_11, DU1_EXHSYNC_DU1_HSYNC),
-+	PINMUX_IPSR_DATA(IP9_11, QSTH_QHS),
-+	PINMUX_IPSR_DATA(IP9_12, DU1_EXVSYNC_DU1_VSYNC),
-+	PINMUX_IPSR_DATA(IP9_12, QSTB_QHE),
-+	PINMUX_IPSR_DATA(IP9_15_13, DU1_EXODDF_DU1_ODDF_DISP_CDE),
-+	PINMUX_IPSR_DATA(IP9_15_13, QCPV_QDE),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_15_13, CAN0_RX, SEL_CAN0_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_15_13, RX3_B, SEL_SCIF3_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_15_13, SDA2_B, SEL_IIC2_1),
-+	PINMUX_IPSR_DATA(IP9_16, DU1_DISP),
-+	PINMUX_IPSR_DATA(IP9_16, QPOLA),
-+	PINMUX_IPSR_DATA(IP9_18_17, DU1_CDE),
-+	PINMUX_IPSR_DATA(IP9_18_17, QPOLB),
-+	PINMUX_IPSR_DATA(IP9_18_17, PWM4_B),
-+	PINMUX_IPSR_DATA(IP9_20_19, VI0_CLKENB),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_20_19, TX4, SEL_SCIF4_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_20_19, SCIFA4_TXD, SEL_SCIFA4_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_20_19, TS_SDATA0_D, SEL_TSIF0_3),
-+	PINMUX_IPSR_DATA(IP9_22_21, VI0_FIELD),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_22_21, RX4, SEL_SCIF4_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_22_21, SCIFA4_RXD, SEL_SCIFA4_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_22_21, TS_SCK0_D, SEL_TSIF0_3),
-+	PINMUX_IPSR_DATA(IP9_24_23, VI0_HSYNC_N),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_24_23, TX5, SEL_SCIF5_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_24_23, SCIFA5_TXD, SEL_SCIFA5_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_24_23, TS_SDEN0_D, SEL_TSIF0_3),
-+	PINMUX_IPSR_DATA(IP9_26_25, VI0_VSYNC_N),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_26_25, RX5, SEL_SCIF5_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_26_25, SCIFA5_RXD, SEL_SCIFA5_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_26_25, TS_SPSYNC0_D, SEL_TSIF0_3),
-+	PINMUX_IPSR_DATA(IP9_28_27, VI0_DATA3_VI0_B3),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_28_27, SCIF3_SCK_B, SEL_SCIF3_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_28_27, SCIFA3_SCK_B, SEL_SCIFA3_1),
-+	PINMUX_IPSR_DATA(IP9_31_29, VI0_G0),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_31_29, SCL8, SEL_IIC8_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_31_29, STP_IVCXO27_0_C, SEL_SSP_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_31_29, SCL4, SEL_IIC4_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_31_29, HCTS2_N, SEL_HSCIF2_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_31_29, SCIFB2_CTS_N, SEL_SCIFB2_0),
-+	PINMUX_IPSR_DATA(IP9_31_29, ATAWR1_N),
-+
-+	/* IPSR10 */
-+	PINMUX_IPSR_DATA(IP10_2_0, VI0_G1),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_2_0, SDA8, SEL_IIC8_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_2_0, STP_ISCLK_0_C, SEL_SSP_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_2_0, SDA4, SEL_IIC4_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_2_0, HRTS2_N, SEL_HSCIF2_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_2_0, SCIFB2_RTS_N, SEL_SCIFB2_0),
-+	PINMUX_IPSR_DATA(IP10_2_0, ATADIR1_N),
-+	PINMUX_IPSR_DATA(IP10_5_3, VI0_G2),
-+	PINMUX_IPSR_DATA(IP10_5_3, VI2_HSYNC_N),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_5_3, STP_ISD_0_C, SEL_SSP_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_5_3, SCL3_B, SEL_IIC3_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_5_3, HSCK2, SEL_HSCIF2_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_5_3, SCIFB2_SCK, SEL_SCIFB2_0),
-+	PINMUX_IPSR_DATA(IP10_5_3, ATARD1_N),
-+	PINMUX_IPSR_DATA(IP10_8_6, VI0_G3),
-+	PINMUX_IPSR_DATA(IP10_8_6, VI2_VSYNC_N),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_8_6, STP_ISEN_0_C, SEL_SSP_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_8_6, SDA3_B, SEL_IIC3_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_8_6, HRX2, SEL_HSCIF2_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_8_6, SCIFB2_RXD, SEL_SCIFB2_0),
-+	PINMUX_IPSR_DATA(IP10_8_6, ATACS01_N),
-+	PINMUX_IPSR_DATA(IP10_11_9, VI0_G4),
-+	PINMUX_IPSR_DATA(IP10_11_9, VI2_CLKENB),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_11_9, STP_ISSYNC_0_C, SEL_SSP_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_11_9, HTX2, SEL_HSCIF2_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_11_9, SCIFB2_TXD, SEL_SCIFB2_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_11_9, SCIFB0_SCK_D, SEL_SCIFB_3),
-+	PINMUX_IPSR_DATA(IP10_14_12, VI0_G5),
-+	PINMUX_IPSR_DATA(IP10_14_12, VI2_FIELD),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_14_12, STP_OPWM_0_C, SEL_SSP_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_14_12, FMCLK_D, SEL_FM_3),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_14_12, CAN0_TX_E, SEL_CAN0_4),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_14_12, HTX1_D, SEL_HSCIF1_3),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_14_12, SCIFB0_TXD_D, SEL_SCIFB_3),
-+	PINMUX_IPSR_DATA(IP10_16_15, VI0_G6),
-+	PINMUX_IPSR_DATA(IP10_16_15, VI2_CLK),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_16_15, BPFCLK_D, SEL_FM_3),
-+	PINMUX_IPSR_DATA(IP10_18_17, VI0_G7),
-+	PINMUX_IPSR_DATA(IP10_18_17, VI2_DATA0),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_18_17, FMIN_D, SEL_FM_3),
-+	PINMUX_IPSR_DATA(IP10_21_19, VI0_R0),
-+	PINMUX_IPSR_DATA(IP10_21_19, VI2_DATA1),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_21_19, GLO_I0_B, SEL_GPS_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_21_19, TS_SDATA0_C, SEL_TSIF0_2),
-+	PINMUX_IPSR_DATA(IP10_21_19, ATACS11_N),
-+	PINMUX_IPSR_DATA(IP10_24_22, VI0_R1),
-+	PINMUX_IPSR_DATA(IP10_24_22, VI2_DATA2),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_24_22, GLO_I1_B, SEL_GPS_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_24_22, TS_SCK0_C, SEL_TSIF0_2),
-+	PINMUX_IPSR_DATA(IP10_24_22, ATAG1_N),
-+	PINMUX_IPSR_DATA(IP10_26_25, VI0_R2),
-+	PINMUX_IPSR_DATA(IP10_26_25, VI2_DATA3),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_26_25, GLO_Q0_B, SEL_GPS_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_26_25, TS_SDEN0_C, SEL_TSIF0_2),
-+	PINMUX_IPSR_DATA(IP10_28_27, VI0_R3),
-+	PINMUX_IPSR_DATA(IP10_28_27, VI2_DATA4),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_28_27, GLO_Q1_B, SEL_GPS_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_28_27, TS_SPSYNC0_C, SEL_TSIF0_2),
-+	PINMUX_IPSR_DATA(IP10_31_29, VI0_R4),
-+	PINMUX_IPSR_DATA(IP10_31_29, VI2_DATA5),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_31_29, GLO_SCLK_B, SEL_GPS_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_31_29, TX0_C, SEL_SCIF0_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_31_29, SCL1_D, SEL_IIC1_3),
-+
-+	/* IPSR11 */
-+	PINMUX_IPSR_DATA(IP11_2_0, VI0_R5),
-+	PINMUX_IPSR_DATA(IP11_2_0, VI2_DATA6),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_2_0, GLO_SDATA_B, SEL_GPS_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_2_0, RX0_C, SEL_SCIF0_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_2_0, SDA1_D, SEL_IIC1_3),
-+	PINMUX_IPSR_DATA(IP11_5_3, VI0_R6),
-+	PINMUX_IPSR_DATA(IP11_5_3, VI2_DATA7),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_5_3, GLO_SS_B, SEL_GPS_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_5_3, TX1_C, SEL_SCIF1_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_5_3, SCL4_B, SEL_IIC4_1),
-+	PINMUX_IPSR_DATA(IP11_8_6, VI0_R7),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_8_6, GLO_RFON_B, SEL_GPS_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_8_6, RX1_C, SEL_SCIF1_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_8_6, CAN0_RX_E, SEL_CAN0_4),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_8_6, SDA4_B, SEL_IIC4_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_8_6, HRX1_D, SEL_HSCIF1_3),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_8_6, SCIFB0_RXD_D, SEL_SCIFB_3),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_11_9, VI1_HSYNC_N, SEL_VI1_0),
-+	PINMUX_IPSR_DATA(IP11_11_9, AVB_RXD0),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_11_9, TS_SDATA0_B, SEL_TSIF0_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_11_9, TX4_B, SEL_SCIF4_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_11_9, SCIFA4_TXD_B, SEL_SCIFA4_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_14_12, VI1_VSYNC_N, SEL_VI1_0),
-+	PINMUX_IPSR_DATA(IP11_14_12, AVB_RXD1),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_14_12, TS_SCK0_B, SEL_TSIF0_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_14_12, RX4_B, SEL_SCIF4_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_14_12, SCIFA4_RXD_B, SEL_SCIFA4_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_16_15, VI1_CLKENB, SEL_VI1_0),
-+	PINMUX_IPSR_DATA(IP11_16_15, AVB_RXD2),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_16_15, TS_SDEN0_B, SEL_TSIF0_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_18_17, VI1_FIELD, SEL_VI1_0),
-+	PINMUX_IPSR_DATA(IP11_18_17, AVB_RXD3),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_18_17, TS_SPSYNC0_B, SEL_TSIF0_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_19, VI1_CLK, SEL_VI1_0),
-+	PINMUX_IPSR_DATA(IP11_19, AVB_RXD4),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_20, VI1_DATA0, SEL_VI1_0),
-+	PINMUX_IPSR_DATA(IP11_20, AVB_RXD5),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_21, VI1_DATA1, SEL_VI1_0),
-+	PINMUX_IPSR_DATA(IP11_21, AVB_RXD6),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_22, VI1_DATA2, SEL_VI1_0),
-+	PINMUX_IPSR_DATA(IP11_22, AVB_RXD7),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_23, VI1_DATA3, SEL_VI1_0),
-+	PINMUX_IPSR_DATA(IP11_23, AVB_RX_ER),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_24, VI1_DATA4, SEL_VI1_0),
-+	PINMUX_IPSR_DATA(IP11_24, AVB_MDIO),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_25, VI1_DATA5, SEL_VI1_0),
-+	PINMUX_IPSR_DATA(IP11_25, AVB_RX_DV),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_26, VI1_DATA6, SEL_VI1_0),
-+	PINMUX_IPSR_DATA(IP11_26, AVB_MAGIC),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_27, VI1_DATA7, SEL_VI1_0),
-+	PINMUX_IPSR_DATA(IP11_27, AVB_MDC),
-+	PINMUX_IPSR_DATA(IP11_29_28, ETH_MDIO),
-+	PINMUX_IPSR_DATA(IP11_29_28, AVB_RX_CLK),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_29_28, SCL2_C, SEL_IIC2_2),
-+	PINMUX_IPSR_DATA(IP11_31_30, ETH_CRS_DV),
-+	PINMUX_IPSR_DATA(IP11_31_30, AVB_LINK),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_31_30, SDA2_C, SEL_IIC2_2),
-+
-+	/* IPSR12 */
-+	PINMUX_IPSR_DATA(IP12_1_0, ETH_RX_ER),
-+	PINMUX_IPSR_DATA(IP12_1_0, AVB_CRS),
-+	PINMUX_IPSR_MODSEL_DATA(IP12_1_0, SCL3, SEL_IIC3_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP12_1_0, SCL7, SEL_IIC7_0),
-+	PINMUX_IPSR_DATA(IP12_3_2, ETH_RXD0),
-+	PINMUX_IPSR_DATA(IP12_3_2, AVB_PHY_INT),
-+	PINMUX_IPSR_MODSEL_DATA(IP12_3_2, SDA3, SEL_IIC3_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP12_3_2, SDA7, SEL_IIC7_0),
-+	PINMUX_IPSR_DATA(IP12_6_4, ETH_RXD1),
-+	PINMUX_IPSR_DATA(IP12_6_4, AVB_GTXREFCLK),
-+	PINMUX_IPSR_MODSEL_DATA(IP12_6_4, CAN0_TX_C, SEL_CAN0_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP12_6_4, SCL2_D, SEL_IIC2_3),
-+	PINMUX_IPSR_MODSEL_DATA(IP12_6_4, MSIOF1_RXD_E, SEL_SOF1_4),
-+	PINMUX_IPSR_DATA(IP12_9_7, ETH_LINK),
-+	PINMUX_IPSR_DATA(IP12_9_7, AVB_TXD0),
-+	PINMUX_IPSR_MODSEL_DATA(IP12_9_7, CAN0_RX_C, SEL_CAN0_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP12_9_7, SDA2_D, SEL_IIC2_3),
-+	PINMUX_IPSR_MODSEL_DATA(IP12_9_7, MSIOF1_SCK_E, SEL_SOF1_4),
-+	PINMUX_IPSR_DATA(IP12_12_10, ETH_REFCLK),
-+	PINMUX_IPSR_DATA(IP12_12_10, AVB_TXD1),
-+	PINMUX_IPSR_MODSEL_DATA(IP12_12_10, SCIFA3_RXD_B, SEL_SCIFA3_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP12_12_10, CAN1_RX_C, SEL_CAN1_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP12_12_10, MSIOF1_SYNC_E, SEL_SOF1_4),
-+	PINMUX_IPSR_DATA(IP12_15_13, ETH_TXD1),
-+	PINMUX_IPSR_DATA(IP12_15_13, AVB_TXD2),
-+	PINMUX_IPSR_MODSEL_DATA(IP12_15_13, SCIFA3_TXD_B, SEL_SCIFA3_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP12_15_13, CAN1_TX_C, SEL_CAN1_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP12_15_13, MSIOF1_TXD_E, SEL_SOF1_4),
-+	PINMUX_IPSR_DATA(IP12_17_16, ETH_TX_EN),
-+	PINMUX_IPSR_DATA(IP12_17_16, AVB_TXD3),
-+	PINMUX_IPSR_MODSEL_DATA(IP12_17_16, TCLK1_B, SEL_TMU1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP12_17_16, CAN_CLK_B, SEL_CANCLK_1),
-+	PINMUX_IPSR_DATA(IP12_19_18, ETH_MAGIC),
-+	PINMUX_IPSR_DATA(IP12_19_18, AVB_TXD4),
-+	PINMUX_IPSR_MODSEL_DATA(IP12_19_18, IETX_C, SEL_IEB_2),
-+	PINMUX_IPSR_DATA(IP12_21_20, ETH_TXD0),
-+	PINMUX_IPSR_DATA(IP12_21_20, AVB_TXD5),
-+	PINMUX_IPSR_MODSEL_DATA(IP12_21_20, IECLK_C, SEL_IEB_2),
-+	PINMUX_IPSR_DATA(IP12_23_22, ETH_MDC),
-+	PINMUX_IPSR_DATA(IP12_23_22, AVB_TXD6),
-+	PINMUX_IPSR_MODSEL_DATA(IP12_23_22, IERX_C, SEL_IEB_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP12_26_24, STP_IVCXO27_0, SEL_SSP_0),
-+	PINMUX_IPSR_DATA(IP12_26_24, AVB_TXD7),
-+	PINMUX_IPSR_MODSEL_DATA(IP12_26_24, SCIFB2_TXD_D, SEL_SCIFB2_3),
-+	PINMUX_IPSR_MODSEL_DATA(IP12_26_24, ADIDATA_B, SEL_RAD_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP12_26_24, MSIOF0_SYNC_C, SEL_SOF0_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP12_29_27, STP_ISCLK_0, SEL_SSP_0),
-+	PINMUX_IPSR_DATA(IP12_29_27, AVB_TX_EN),
-+	PINMUX_IPSR_MODSEL_DATA(IP12_29_27, SCIFB2_RXD_D, SEL_SCIFB2_3),
-+	PINMUX_IPSR_MODSEL_DATA(IP12_29_27, ADICS_SAMP_B, SEL_RAD_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP12_29_27, MSIOF0_SCK_C, SEL_SOF0_2),
-+
-+	/* IPSR13 */
-+	PINMUX_IPSR_MODSEL_DATA(IP13_2_0, STP_ISD_0, SEL_SSP_0),
-+	PINMUX_IPSR_DATA(IP13_2_0, AVB_TX_ER),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_2_0, SCIFB2_SCK_C, SEL_SCIFB2_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_2_0, ADICLK_B, SEL_RAD_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_2_0, MSIOF0_SS1_C, SEL_SOF0_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_4_3, STP_ISEN_0, SEL_SSP_0),
-+	PINMUX_IPSR_DATA(IP13_4_3, AVB_TX_CLK),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_4_3, ADICHS0_B, SEL_RAD_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_4_3, MSIOF0_SS2_C, SEL_SOF0_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_6_5, STP_ISSYNC_0, SEL_SSP_0),
-+	PINMUX_IPSR_DATA(IP13_6_5, AVB_COL),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_6_5, ADICHS1_B, SEL_RAD_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_6_5, MSIOF0_RXD_C, SEL_SOF0_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_9_7, STP_OPWM_0, SEL_SSP_0),
-+	PINMUX_IPSR_DATA(IP13_9_7, AVB_GTX_CLK),
-+	PINMUX_IPSR_DATA(IP13_9_7, PWM0_B),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_9_7, ADICHS2_B, SEL_RAD_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_9_7, MSIOF0_TXD_C, SEL_SOF0_2),
-+	PINMUX_IPSR_DATA(IP13_10, SD0_CLK),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_10, SPCLK_B, SEL_QSP_1),
-+	PINMUX_IPSR_DATA(IP13_11, SD0_CMD),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_11, MOSI_IO0_B, SEL_QSP_1),
-+	PINMUX_IPSR_DATA(IP13_12, SD0_DATA0),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_12, MISO_IO1_B, SEL_QSP_1),
-+	PINMUX_IPSR_DATA(IP13_13, SD0_DATA1),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_13, IO2_B, SEL_QSP_1),
-+	PINMUX_IPSR_DATA(IP13_14, SD0_DATA2),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_14, IO3_B, SEL_QSP_1),
-+	PINMUX_IPSR_DATA(IP13_15, SD0_DATA3),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_15, SSL_B, SEL_QSP_1),
-+	PINMUX_IPSR_DATA(IP13_18_16, SD0_CD),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_18_16, MMC_D6_B, SEL_MMC_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_18_16, SIM0_RST_B, SEL_SIM_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_18_16, CAN0_RX_F, SEL_CAN0_5),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_18_16, SCIFA5_TXD_B, SEL_SCIFA5_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_18_16, TX3_C, SEL_SCIF3_2),
-+	PINMUX_IPSR_DATA(IP13_21_19, SD0_WP),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_21_19, MMC_D7_B, SEL_MMC_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_21_19, SIM0_D_B, SEL_SIM_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_21_19, CAN0_TX_F, SEL_CAN0_5),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_21_19, SCIFA5_RXD_B, SEL_SCIFA5_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_21_19, RX3_C, SEL_SCIF3_2),
-+	PINMUX_IPSR_DATA(IP13_22, SD1_CMD),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_22, REMOCON_B, SEL_RCN_1),
-+	PINMUX_IPSR_DATA(IP13_24_23, SD1_DATA0),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_24_23, SPEEDIN_B, SEL_RSP_1),
-+	PINMUX_IPSR_DATA(IP13_25, SD1_DATA1),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_25, IETX_B, SEL_IEB_1),
-+	PINMUX_IPSR_DATA(IP13_26, SD1_DATA2),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_26, IECLK_B, SEL_IEB_1),
-+	PINMUX_IPSR_DATA(IP13_27, SD1_DATA3),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_27, IERX_B, SEL_IEB_1),
-+	PINMUX_IPSR_DATA(IP13_30_28, SD1_CD),
-+	PINMUX_IPSR_DATA(IP13_30_28, PWM0),
-+	PINMUX_IPSR_DATA(IP13_30_28, TPU_TO0),
-+	PINMUX_IPSR_MODSEL_DATA(IP13_30_28, SCL1_C, SEL_IIC1_2),
-+
-+	/* IPSR14 */
-+	PINMUX_IPSR_DATA(IP14_1_0, SD1_WP),
-+	PINMUX_IPSR_DATA(IP14_1_0, PWM1_B),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_1_0, SDA1_C, SEL_IIC1_2),
-+	PINMUX_IPSR_DATA(IP14_2, SD2_CLK),
-+	PINMUX_IPSR_DATA(IP14_2, MMC_CLK),
-+	PINMUX_IPSR_DATA(IP14_3, SD2_CMD),
-+	PINMUX_IPSR_DATA(IP14_3, MMC_CMD),
-+	PINMUX_IPSR_DATA(IP14_4, SD2_DATA0),
-+	PINMUX_IPSR_DATA(IP14_4, MMC_D0),
-+	PINMUX_IPSR_DATA(IP14_5, SD2_DATA1),
-+	PINMUX_IPSR_DATA(IP14_5, MMC_D1),
-+	PINMUX_IPSR_DATA(IP14_6, SD2_DATA2),
-+	PINMUX_IPSR_DATA(IP14_6, MMC_D2),
-+	PINMUX_IPSR_DATA(IP14_7, SD2_DATA3),
-+	PINMUX_IPSR_DATA(IP14_7, MMC_D3),
-+	PINMUX_IPSR_DATA(IP14_10_8, SD2_CD),
-+	PINMUX_IPSR_DATA(IP14_10_8, MMC_D4),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_10_8, SCL8_C, SEL_IIC8_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_10_8, TX5_B, SEL_SCIF5_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_10_8, SCIFA5_TXD_C, SEL_SCIFA5_2),
-+	PINMUX_IPSR_DATA(IP14_13_11, SD2_WP),
-+	PINMUX_IPSR_DATA(IP14_13_11, MMC_D5),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_13_11, SDA8_C, SEL_IIC8_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_13_11, RX5_B, SEL_SCIF5_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_13_11, SCIFA5_RXD_C, SEL_SCIFA5_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_16_14, MSIOF0_SCK, SEL_SOF0_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_16_14, RX2_C, SEL_SCIF2_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_16_14, ADIDATA, SEL_RAD_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_16_14, VI1_CLK_C, SEL_VI1_2),
-+	PINMUX_IPSR_DATA(IP14_16_14, VI1_G0_B),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_19_17, MSIOF0_SYNC, SEL_SOF0_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_19_17, TX2_C, SEL_SCIF2_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_19_17, ADICS_SAMP, SEL_RAD_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_19_17, VI1_CLKENB_C, SEL_VI1_2),
-+	PINMUX_IPSR_DATA(IP14_19_17, VI1_G1_B),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_22_20, MSIOF0_TXD, SEL_SOF0_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_22_20, ADICLK, SEL_RAD_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_22_20, VI1_FIELD_C, SEL_VI1_2),
-+	PINMUX_IPSR_DATA(IP14_22_20, VI1_G2_B),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_25_23, MSIOF0_RXD, SEL_SOF0_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_25_23, ADICHS0, SEL_RAD_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_25_23, VI1_DATA0_C, SEL_VI1_2),
-+	PINMUX_IPSR_DATA(IP14_25_23, VI1_G3_B),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_28_26, MSIOF0_SS1, SEL_SOF0_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_28_26, MMC_D6, SEL_MMC_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_28_26, ADICHS1, SEL_RAD_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_28_26, TX0_E, SEL_SCIF0_4),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_28_26, VI1_HSYNC_N_C, SEL_VI1_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_28_26, SCL7_C, SEL_IIC7_2),
-+	PINMUX_IPSR_DATA(IP14_28_26, VI1_G4_B),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_31_29, MSIOF0_SS2, SEL_SOF0_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_31_29, MMC_D7, SEL_MMC_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_31_29, ADICHS2, SEL_RAD_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_31_29, RX0_E, SEL_SCIF0_4),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_31_29, VI1_VSYNC_N_C, SEL_VI1_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_31_29, SDA7_C, SEL_IIC7_2),
-+	PINMUX_IPSR_DATA(IP14_31_29, VI1_G5_B),
-+
-+	/* IPSR15 */
-+	PINMUX_IPSR_MODSEL_DATA(IP15_1_0, SIM0_RST, SEL_SIM_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_1_0, IETX, SEL_IEB_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_1_0, CAN1_TX_D, SEL_CAN1_3),
-+	PINMUX_IPSR_DATA(IP15_3_2, SIM0_CLK),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_3_2, IECLK, SEL_IEB_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_3_2, CAN_CLK_C, SEL_CANCLK_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_5_4, SIM0_D, SEL_SIM_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_5_4, IERX, SEL_IEB_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_5_4, CAN1_RX_D, SEL_CAN1_3),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_8_6, GPS_CLK, SEL_GPS_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_8_6, DU1_DOTCLKIN_C, SEL_DIS_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_8_6, AUDIO_CLKB_B, SEL_ADG_1),
-+	PINMUX_IPSR_DATA(IP15_8_6, PWM5_B),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_8_6, SCIFA3_TXD_C, SEL_SCIFA3_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_11_9, GPS_SIGN, SEL_GPS_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_11_9, TX4_C, SEL_SCIF4_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_11_9, SCIFA4_TXD_C, SEL_SCIFA4_2),
-+	PINMUX_IPSR_DATA(IP15_11_9, PWM5),
-+	PINMUX_IPSR_DATA(IP15_11_9, VI1_G6_B),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_11_9, SCIFA3_RXD_C, SEL_SCIFA3_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_14_12, GPS_MAG, SEL_GPS_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_14_12, RX4_C, SEL_SCIF4_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_14_12, SCIFA4_RXD_C, SEL_SCIFA4_2),
-+	PINMUX_IPSR_DATA(IP15_14_12, PWM6),
-+	PINMUX_IPSR_DATA(IP15_14_12, VI1_G7_B),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_14_12, SCIFA3_SCK_C, SEL_SCIFA3_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_17_15, HCTS0_N, SEL_HSCIF0_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_17_15, SCIFB0_CTS_N, SEL_SCIFB_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_17_15, GLO_I0_C, SEL_GPS_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_17_15, TCLK1, SEL_TMU1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_17_15, VI1_DATA1_C, SEL_VI1_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_20_18, HRTS0_N, SEL_HSCIF0_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_20_18, SCIFB0_RTS_N, SEL_SCIFB_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_20_18, GLO_I1_C, SEL_GPS_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_20_18, VI1_DATA2_C, SEL_VI1_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_23_21, HSCK0, SEL_HSCIF0_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_23_21, SCIFB0_SCK, SEL_SCIFB_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_23_21, GLO_Q0_C, SEL_GPS_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_23_21, CAN_CLK, SEL_CANCLK_0),
-+	PINMUX_IPSR_DATA(IP15_23_21, TCLK2),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_23_21, VI1_DATA3_C, SEL_VI1_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_26_24, HRX0, SEL_HSCIF0_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_26_24, SCIFB0_RXD, SEL_SCIFB_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_26_24, GLO_Q1_C, SEL_GPS_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_26_24, CAN0_RX_B, SEL_CAN0_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_26_24, VI1_DATA4_C, SEL_VI1_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_29_27, HTX0, SEL_HSCIF0_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_29_27, SCIFB0_TXD, SEL_SCIFB_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_29_27, GLO_SCLK_C, SEL_GPS_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_29_27, CAN0_TX_B, SEL_CAN0_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_29_27, VI1_DATA5_C, SEL_VI1_2),
-+
-+	/* IPSR16 */
-+	PINMUX_IPSR_MODSEL_DATA(IP16_2_0, HRX1, SEL_HSCIF1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP16_2_0, SCIFB1_RXD, SEL_SCIFB1_0),
-+	PINMUX_IPSR_DATA(IP16_2_0, VI1_R0_B),
-+	PINMUX_IPSR_MODSEL_DATA(IP16_2_0, GLO_SDATA_C, SEL_GPS_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP16_2_0, VI1_DATA6_C, SEL_VI1_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP16_5_3, HTX1, SEL_HSCIF1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP16_5_3, SCIFB1_TXD, SEL_SCIFB1_0),
-+	PINMUX_IPSR_DATA(IP16_5_3, VI1_R1_B),
-+	PINMUX_IPSR_MODSEL_DATA(IP16_5_3, GLO_SS_C, SEL_GPS_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP16_5_3, VI1_DATA7_C, SEL_VI1_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP16_7_6, HSCK1, SEL_HSCIF1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP16_7_6, SCIFB1_SCK, SEL_SCIFB1_0),
-+	PINMUX_IPSR_DATA(IP16_7_6, MLB_CK),
-+	PINMUX_IPSR_MODSEL_DATA(IP16_7_6, GLO_RFON_C, SEL_GPS_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP16_9_8, HCTS1_N, SEL_HSCIF1_0),
-+	PINMUX_IPSR_DATA(IP16_9_8, SCIFB1_CTS_N),
-+	PINMUX_IPSR_DATA(IP16_9_8, MLB_SIG),
-+	PINMUX_IPSR_MODSEL_DATA(IP16_9_8, CAN1_TX_B, SEL_CAN1_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP16_11_10, HRTS1_N, SEL_HSCIF1_0),
-+	PINMUX_IPSR_DATA(IP16_11_10, SCIFB1_RTS_N),
-+	PINMUX_IPSR_DATA(IP16_11_10, MLB_DAT),
-+	PINMUX_IPSR_MODSEL_DATA(IP16_11_10, CAN1_RX_B, SEL_CAN1_1),
-+};
-+
-+static struct sh_pfc_pin pinmux_pins[] = {
-+	PINMUX_GPIO_GP_ALL(),
-+};
-+
-+/* - DU --------------------------------------------------------------------- */
-+static const unsigned int du_rgb666_pins[] = {
-+	/* R[7:2], G[7:2], B[7:2] */
-+	RCAR_GP_PIN(3, 7),  RCAR_GP_PIN(3, 6),  RCAR_GP_PIN(3, 5),
-+	RCAR_GP_PIN(3, 4),  RCAR_GP_PIN(3, 3),  RCAR_GP_PIN(3, 2),
-+	RCAR_GP_PIN(3, 15), RCAR_GP_PIN(3, 14), RCAR_GP_PIN(3, 13),
-+	RCAR_GP_PIN(3, 12), RCAR_GP_PIN(3, 11), RCAR_GP_PIN(3, 10),
-+	RCAR_GP_PIN(3, 23), RCAR_GP_PIN(3, 22), RCAR_GP_PIN(3, 21),
-+	RCAR_GP_PIN(3, 20), RCAR_GP_PIN(3, 19), RCAR_GP_PIN(3, 18),
-+};
-+static const unsigned int du_rgb666_mux[] = {
-+	DU1_DR7_MARK, DU1_DR6_MARK, DU1_DR5_MARK, DU1_DR4_MARK,
-+	DU1_DR3_MARK, DU1_DR2_MARK,
-+	DU1_DG7_MARK, DU1_DG6_MARK, DU1_DG5_MARK, DU1_DG4_MARK,
-+	DU1_DG3_MARK, DU1_DG2_MARK,
-+	DU1_DB7_MARK, DU1_DB6_MARK, DU1_DB5_MARK, DU1_DB4_MARK,
-+	DU1_DB3_MARK, DU1_DB2_MARK,
-+};
-+static const unsigned int du_rgb888_pins[] = {
-+	/* R[7:0], G[7:0], B[7:0] */
-+	RCAR_GP_PIN(3, 7),  RCAR_GP_PIN(3, 6),  RCAR_GP_PIN(3, 5),
-+	RCAR_GP_PIN(3, 4),  RCAR_GP_PIN(3, 3),  RCAR_GP_PIN(3, 2),
-+	RCAR_GP_PIN(3, 1),  RCAR_GP_PIN(3, 0),
-+	RCAR_GP_PIN(3, 15), RCAR_GP_PIN(3, 14), RCAR_GP_PIN(3, 13),
-+	RCAR_GP_PIN(3, 12), RCAR_GP_PIN(3, 11), RCAR_GP_PIN(3, 10),
-+	RCAR_GP_PIN(3, 9),  RCAR_GP_PIN(3, 8),
-+	RCAR_GP_PIN(3, 23), RCAR_GP_PIN(3, 22), RCAR_GP_PIN(3, 21),
-+	RCAR_GP_PIN(3, 20), RCAR_GP_PIN(3, 19), RCAR_GP_PIN(3, 18),
-+	RCAR_GP_PIN(3, 17), RCAR_GP_PIN(3, 16),
-+};
-+static const unsigned int du_rgb888_mux[] = {
-+	DU1_DR7_MARK, DU1_DR6_MARK, DU1_DR5_MARK, DU1_DR4_MARK,
-+	DU1_DR3_MARK, DU1_DR2_MARK, DU1_DR1_MARK, DU1_DR0_MARK,
-+	DU1_DG7_MARK, DU1_DG6_MARK, DU1_DG5_MARK, DU1_DG4_MARK,
-+	DU1_DG3_MARK, DU1_DG2_MARK, DU1_DG1_MARK, DU1_DG0_MARK,
-+	DU1_DB7_MARK, DU1_DB6_MARK, DU1_DB5_MARK, DU1_DB4_MARK,
-+	DU1_DB3_MARK, DU1_DB2_MARK, DU1_DB1_MARK, DU1_DB0_MARK,
-+};
-+static const unsigned int du_clk_out_0_pins[] = {
-+	/* CLKOUT */
-+	RCAR_GP_PIN(3, 25),
-+};
-+static const unsigned int du_clk_out_0_mux[] = {
-+	DU1_DOTCLKOUT0_MARK
-+};
-+static const unsigned int du_clk_out_1_pins[] = {
-+	/* CLKOUT */
-+	RCAR_GP_PIN(3, 26),
-+};
-+static const unsigned int du_clk_out_1_mux[] = {
-+	DU1_DOTCLKOUT1_MARK
-+};
-+static const unsigned int du_sync_1_pins[] = {
-+	/* EXVSYNC/VSYNC, EXHSYNC/HSYNC, EXDISP/EXODDF/EXCDE */
-+	RCAR_GP_PIN(3, 29), RCAR_GP_PIN(3, 28), RCAR_GP_PIN(3, 27),
-+};
-+static const unsigned int du_sync_1_mux[] = {
-+	DU1_EXODDF_DU1_ODDF_DISP_CDE_MARK,
-+	DU1_EXVSYNC_DU1_VSYNC_MARK, DU1_EXHSYNC_DU1_HSYNC_MARK
-+};
-+static const unsigned int du_cde_disp_pins[] = {
-+	/* CDE DISP */
-+	RCAR_GP_PIN(3, 31), RCAR_GP_PIN(3, 30),
-+};
-+static const unsigned int du0_clk_in_pins[] = {
-+	/* CLKIN */
-+	RCAR_GP_PIN(6, 31),
-+};
-+static const unsigned int du0_clk_in_mux[] = {
-+	DU0_DOTCLKIN_MARK
-+};
-+static const unsigned int du_cde_disp_mux[] = {
-+	DU1_CDE_MARK, DU1_DISP_MARK
-+};
-+static const unsigned int du1_clk_in_pins[] = {
-+	/* CLKIN */
-+	RCAR_GP_PIN(7, 20), RCAR_GP_PIN(7, 19), RCAR_GP_PIN(3, 24),
-+};
-+static const unsigned int du1_clk_in_mux[] = {
-+	DU1_DOTCLKIN_C_MARK, DU1_DOTCLKIN_B_MARK, DU1_DOTCLKIN_MARK
-+};
-+/* - ETH -------------------------------------------------------------------- */
-+static const unsigned int eth_link_pins[] = {
-+	/* LINK */
-+	RCAR_GP_PIN(5, 18),
-+};
-+static const unsigned int eth_link_mux[] = {
-+	ETH_LINK_MARK,
-+};
-+static const unsigned int eth_magic_pins[] = {
-+	/* MAGIC */
-+	RCAR_GP_PIN(5, 22),
-+};
-+static const unsigned int eth_magic_mux[] = {
-+	ETH_MAGIC_MARK,
-+};
-+static const unsigned int eth_mdio_pins[] = {
-+	/* MDC, MDIO */
-+	RCAR_GP_PIN(5, 24), RCAR_GP_PIN(5, 13),
-+};
-+static const unsigned int eth_mdio_mux[] = {
-+	ETH_MDC_MARK, ETH_MDIO_MARK,
-+};
-+static const unsigned int eth_rmii_pins[] = {
-+	/* RXD[0:1], RX_ER, CRS_DV, TXD[0:1], TX_EN, REF_CLK */
-+	RCAR_GP_PIN(5, 16), RCAR_GP_PIN(5, 17), RCAR_GP_PIN(5, 15),
-+	RCAR_GP_PIN(5, 14), RCAR_GP_PIN(5, 23), RCAR_GP_PIN(5, 20),
-+	RCAR_GP_PIN(5, 21), RCAR_GP_PIN(5, 19),
-+};
-+static const unsigned int eth_rmii_mux[] = {
-+	ETH_RXD0_MARK, ETH_RXD1_MARK, ETH_RX_ER_MARK, ETH_CRS_DV_MARK,
-+	ETH_TXD0_MARK, ETH_TXD1_MARK, ETH_TX_EN_MARK, ETH_REFCLK_MARK,
-+};
-+/* - INTC ------------------------------------------------------------------- */
-+static const unsigned int intc_irq0_pins[] = {
-+	/* IRQ */
-+	RCAR_GP_PIN(7, 10),
-+};
-+static const unsigned int intc_irq0_mux[] = {
-+	IRQ0_MARK,
-+};
-+static const unsigned int intc_irq1_pins[] = {
-+	/* IRQ */
-+	RCAR_GP_PIN(7, 11),
-+};
-+static const unsigned int intc_irq1_mux[] = {
-+	IRQ1_MARK,
-+};
-+static const unsigned int intc_irq2_pins[] = {
-+	/* IRQ */
-+	RCAR_GP_PIN(7, 12),
-+};
-+static const unsigned int intc_irq2_mux[] = {
-+	IRQ2_MARK,
-+};
-+static const unsigned int intc_irq3_pins[] = {
-+	/* IRQ */
-+	RCAR_GP_PIN(7, 13),
-+};
-+static const unsigned int intc_irq3_mux[] = {
-+	IRQ3_MARK,
-+};
-+/* - MMCIF ------------------------------------------------------------------ */
-+static const unsigned int mmc_data1_pins[] = {
-+	/* D[0] */
-+	RCAR_GP_PIN(6, 18),
-+};
-+static const unsigned int mmc_data1_mux[] = {
-+	MMC_D0_MARK,
-+};
-+static const unsigned int mmc_data4_pins[] = {
-+	/* D[0:3] */
-+	RCAR_GP_PIN(6, 18), RCAR_GP_PIN(6, 19),
-+	RCAR_GP_PIN(6, 20), RCAR_GP_PIN(6, 21),
-+};
-+static const unsigned int mmc_data4_mux[] = {
-+	MMC_D0_MARK, MMC_D1_MARK, MMC_D2_MARK, MMC_D3_MARK,
-+};
-+static const unsigned int mmc_data8_pins[] = {
-+	/* D[0:7] */
-+	RCAR_GP_PIN(6, 18), RCAR_GP_PIN(6, 19),
-+	RCAR_GP_PIN(6, 20), RCAR_GP_PIN(6, 21),
-+	RCAR_GP_PIN(6, 22), RCAR_GP_PIN(6, 23),
-+	RCAR_GP_PIN(6, 28), RCAR_GP_PIN(6, 29),
-+};
-+static const unsigned int mmc_data8_mux[] = {
-+	MMC_D0_MARK, MMC_D1_MARK, MMC_D2_MARK, MMC_D3_MARK,
-+	MMC_D4_MARK, MMC_D5_MARK, MMC_D6_MARK, MMC_D7_MARK,
-+};
-+static const unsigned int mmc_ctrl_pins[] = {
-+	/* CLK, CMD */
-+	RCAR_GP_PIN(6, 16), RCAR_GP_PIN(6, 17),
-+};
-+static const unsigned int mmc_ctrl_mux[] = {
-+	MMC_CLK_MARK, MMC_CMD_MARK,
-+};
-+/* - MSIOF0 ----------------------------------------------------------------- */
-+static const unsigned int msiof0_clk_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(6, 24),
-+};
-+static const unsigned int msiof0_clk_mux[] = {
-+	MSIOF0_SCK_MARK,
-+};
-+static const unsigned int msiof0_sync_pins[] = {
-+	/* SYNC */
-+	RCAR_GP_PIN(6, 25),
-+};
-+static const unsigned int msiof0_sync_mux[] = {
-+	MSIOF0_SYNC_MARK,
-+};
-+static const unsigned int msiof0_ss1_pins[] = {
-+	/* SS1 */
-+	RCAR_GP_PIN(6, 28),
-+};
-+static const unsigned int msiof0_ss1_mux[] = {
-+	MSIOF0_SS1_MARK,
-+};
-+static const unsigned int msiof0_ss2_pins[] = {
-+	/* SS2 */
-+	RCAR_GP_PIN(6, 29),
-+};
-+static const unsigned int msiof0_ss2_mux[] = {
-+	MSIOF0_SS2_MARK,
-+};
-+static const unsigned int msiof0_rx_pins[] = {
-+	/* RXD */
-+	RCAR_GP_PIN(6, 27),
-+};
-+static const unsigned int msiof0_rx_mux[] = {
-+	MSIOF0_RXD_MARK,
-+};
-+static const unsigned int msiof0_tx_pins[] = {
-+	/* TXD */
-+	RCAR_GP_PIN(6, 26),
-+};
-+static const unsigned int msiof0_tx_mux[] = {
-+	MSIOF0_TXD_MARK,
-+};
-+/* - MSIOF1 ----------------------------------------------------------------- */
-+static const unsigned int msiof1_clk_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(0, 22),
-+};
-+static const unsigned int msiof1_clk_mux[] = {
-+	MSIOF1_SCK_MARK,
-+};
-+static const unsigned int msiof1_sync_pins[] = {
-+	/* SYNC */
-+	RCAR_GP_PIN(0, 23),
-+};
-+static const unsigned int msiof1_sync_mux[] = {
-+	MSIOF1_SYNC_MARK,
-+};
-+static const unsigned int msiof1_ss1_pins[] = {
-+	/* SS1 */
-+	RCAR_GP_PIN(0, 24),
-+};
-+static const unsigned int msiof1_ss1_mux[] = {
-+	MSIOF1_SS1_MARK,
-+};
-+static const unsigned int msiof1_ss2_pins[] = {
-+	/* SS2 */
-+	RCAR_GP_PIN(0, 25),
-+};
-+static const unsigned int msiof1_ss2_mux[] = {
-+	MSIOF1_SS2_MARK,
-+};
-+static const unsigned int msiof1_rx_pins[] = {
-+	/* RXD */
-+	RCAR_GP_PIN(0, 27),
-+};
-+static const unsigned int msiof1_rx_mux[] = {
-+	MSIOF1_RXD_MARK,
-+};
-+static const unsigned int msiof1_tx_pins[] = {
-+	/* TXD */
-+	RCAR_GP_PIN(0, 26),
-+};
-+static const unsigned int msiof1_tx_mux[] = {
-+	MSIOF1_TXD_MARK,
-+};
-+/* - MSIOF2 ----------------------------------------------------------------- */
-+static const unsigned int msiof2_clk_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(1, 13),
-+};
-+static const unsigned int msiof2_clk_mux[] = {
-+	MSIOF2_SCK_MARK,
-+};
-+static const unsigned int msiof2_sync_pins[] = {
-+	/* SYNC */
-+	RCAR_GP_PIN(1, 14),
-+};
-+static const unsigned int msiof2_sync_mux[] = {
-+	MSIOF2_SYNC_MARK,
-+};
-+static const unsigned int msiof2_ss1_pins[] = {
-+	/* SS1 */
-+	RCAR_GP_PIN(1, 17),
-+};
-+static const unsigned int msiof2_ss1_mux[] = {
-+	MSIOF2_SS1_MARK,
-+};
-+static const unsigned int msiof2_ss2_pins[] = {
-+	/* SS2 */
-+	RCAR_GP_PIN(1, 18),
-+};
-+static const unsigned int msiof2_ss2_mux[] = {
-+	MSIOF2_SS2_MARK,
-+};
-+static const unsigned int msiof2_rx_pins[] = {
-+	/* RXD */
-+	RCAR_GP_PIN(1, 16),
-+};
-+static const unsigned int msiof2_rx_mux[] = {
-+	MSIOF2_RXD_MARK,
-+};
-+static const unsigned int msiof2_tx_pins[] = {
-+	/* TXD */
-+	RCAR_GP_PIN(1, 15),
-+};
-+static const unsigned int msiof2_tx_mux[] = {
-+	MSIOF2_TXD_MARK,
-+};
-+/* - SCIF0 ------------------------------------------------------------------ */
-+static const unsigned int scif0_data_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(1, 7), RCAR_GP_PIN(1, 6),
-+};
-+static const unsigned int scif0_data_mux[] = {
-+	RX0_MARK, TX0_MARK,
-+};
-+static const unsigned int scif0_data_b_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(3, 1), RCAR_GP_PIN(3, 0),
-+};
-+static const unsigned int scif0_data_b_mux[] = {
-+	RX0_B_MARK, TX0_B_MARK,
-+};
-+static const unsigned int scif0_data_c_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(4, 26), RCAR_GP_PIN(4, 25),
-+};
-+static const unsigned int scif0_data_c_mux[] = {
-+	RX0_C_MARK, TX0_C_MARK,
-+};
-+static const unsigned int scif0_data_d_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(2, 23), RCAR_GP_PIN(2, 22),
-+};
-+static const unsigned int scif0_data_d_mux[] = {
-+	RX0_D_MARK, TX0_D_MARK,
-+};
-+static const unsigned int scif0_data_e_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(6, 29), RCAR_GP_PIN(6, 28),
-+};
-+static const unsigned int scif0_data_e_mux[] = {
-+	RX0_E_MARK, TX0_E_MARK,
-+};
-+/* - SCIF1 ------------------------------------------------------------------ */
-+static const unsigned int scif1_data_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(1, 9), RCAR_GP_PIN(1, 8),
-+};
-+static const unsigned int scif1_data_mux[] = {
-+	RX1_MARK, TX1_MARK,
-+};
-+static const unsigned int scif1_data_b_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(3, 9), RCAR_GP_PIN(3, 8),
-+};
-+static const unsigned int scif1_data_b_mux[] = {
-+	RX1_B_MARK, TX1_B_MARK,
-+};
-+static const unsigned int scif1_clk_b_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(3, 10),
-+};
-+static const unsigned int scif1_clk_b_mux[] = {
-+	SCIF1_SCK_B_MARK,
-+};
-+static const unsigned int scif1_data_c_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(4, 28), RCAR_GP_PIN(4, 27),
-+};
-+static const unsigned int scif1_data_c_mux[] = {
-+	RX1_C_MARK, TX1_C_MARK,
-+};
-+static const unsigned int scif1_data_d_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(2, 25), RCAR_GP_PIN(2, 24),
-+};
-+static const unsigned int scif1_data_d_mux[] = {
-+	RX1_D_MARK, TX1_D_MARK,
-+};
-+/* - SCIF2 ------------------------------------------------------------------ */
-+static const unsigned int scif2_data_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(2, 30), RCAR_GP_PIN(2, 31),
-+};
-+static const unsigned int scif2_data_mux[] = {
-+	RX2_MARK, TX2_MARK,
-+};
-+static const unsigned int scif2_data_b_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(3, 17), RCAR_GP_PIN(3, 16),
-+};
-+static const unsigned int scif2_data_b_mux[] = {
-+	RX2_B_MARK, TX2_B_MARK,
-+};
-+static const unsigned int scif2_clk_b_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(3, 18),
-+};
-+static const unsigned int scif2_clk_b_mux[] = {
-+	SCIF2_SCK_B_MARK,
-+};
-+static const unsigned int scif2_data_c_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(6, 24), RCAR_GP_PIN(6, 25),
-+};
-+static const unsigned int scif2_data_c_mux[] = {
-+	RX2_C_MARK, TX2_C_MARK,
-+};
-+static const unsigned int scif2_data_e_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(2, 7), RCAR_GP_PIN(2, 8),
-+};
-+static const unsigned int scif2_data_e_mux[] = {
-+	RX2_E_MARK, TX2_E_MARK,
-+};
-+/* - SCIF3 ------------------------------------------------------------------ */
-+static const unsigned int scif3_data_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(3, 22), RCAR_GP_PIN(3, 21),
-+};
-+static const unsigned int scif3_data_mux[] = {
-+	RX3_MARK, TX3_MARK,
-+};
-+static const unsigned int scif3_clk_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(3, 23),
-+};
-+static const unsigned int scif3_clk_mux[] = {
-+	SCIF3_SCK_MARK,
-+};
-+static const unsigned int scif3_data_b_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(3, 29), RCAR_GP_PIN(3, 26),
-+};
-+static const unsigned int scif3_data_b_mux[] = {
-+	RX3_B_MARK, TX3_B_MARK,
-+};
-+static const unsigned int scif3_clk_b_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(4, 8),
-+};
-+static const unsigned int scif3_clk_b_mux[] = {
-+	SCIF3_SCK_B_MARK,
-+};
-+static const unsigned int scif3_data_c_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(6, 7), RCAR_GP_PIN(6, 6),
-+};
-+static const unsigned int scif3_data_c_mux[] = {
-+	RX3_C_MARK, TX3_C_MARK,
-+};
-+static const unsigned int scif3_data_d_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(2, 27), RCAR_GP_PIN(2, 26),
-+};
-+static const unsigned int scif3_data_d_mux[] = {
-+	RX3_D_MARK, TX3_D_MARK,
-+};
-+/* - SCIF4 ------------------------------------------------------------------ */
-+static const unsigned int scif4_data_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(4, 2), RCAR_GP_PIN(4, 1),
-+};
-+static const unsigned int scif4_data_mux[] = {
-+	RX4_MARK, TX4_MARK,
-+};
-+static const unsigned int scif4_data_b_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(5, 1), RCAR_GP_PIN(5, 0),
-+};
-+static const unsigned int scif4_data_b_mux[] = {
-+	RX4_B_MARK, TX4_B_MARK,
-+};
-+static const unsigned int scif4_data_c_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(7, 22), RCAR_GP_PIN(7, 21),
-+};
-+static const unsigned int scif4_data_c_mux[] = {
-+	RX4_C_MARK, TX4_C_MARK,
-+};
-+/* - SCIF5 ------------------------------------------------------------------ */
-+static const unsigned int scif5_data_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(4, 4), RCAR_GP_PIN(4, 3),
-+};
-+static const unsigned int scif5_data_mux[] = {
-+	RX5_MARK, TX5_MARK,
-+};
-+static const unsigned int scif5_data_b_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(6, 23), RCAR_GP_PIN(6, 22),
-+};
-+static const unsigned int scif5_data_b_mux[] = {
-+	RX5_B_MARK, TX5_B_MARK,
-+};
-+/* - SCIFA0 ----------------------------------------------------------------- */
-+static const unsigned int scifa0_data_pins[] = {
-+	/* RXD, TXD */
-+	RCAR_GP_PIN(1, 7), RCAR_GP_PIN(1, 6),
-+};
-+static const unsigned int scifa0_data_mux[] = {
-+	SCIFA0_RXD_MARK, SCIFA0_TXD_MARK,
-+};
-+static const unsigned int scifa0_data_b_pins[] = {
-+	/* RXD, TXD */
-+	RCAR_GP_PIN(3, 1), RCAR_GP_PIN(3, 0),
-+};
-+static const unsigned int scifa0_data_b_mux[] = {
-+	SCIFA0_RXD_B_MARK, SCIFA0_TXD_B_MARK
-+};
-+/* - SCIFA1 ----------------------------------------------------------------- */
-+static const unsigned int scifa1_data_pins[] = {
-+	/* RXD, TXD */
-+	RCAR_GP_PIN(1, 9), RCAR_GP_PIN(1, 8),
-+};
-+static const unsigned int scifa1_data_mux[] = {
-+	SCIFA1_RXD_MARK, SCIFA1_TXD_MARK,
-+};
-+static const unsigned int scifa1_clk_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(3, 10),
-+};
-+static const unsigned int scifa1_clk_mux[] = {
-+	SCIFA1_SCK_MARK,
-+};
-+static const unsigned int scifa1_data_b_pins[] = {
-+	/* RXD, TXD */
-+	RCAR_GP_PIN(3, 9), RCAR_GP_PIN(3, 8),
-+};
-+static const unsigned int scifa1_data_b_mux[] = {
-+	SCIFA1_RXD_B_MARK, SCIFA1_TXD_B_MARK,
-+};
-+static const unsigned int scifa1_clk_b_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(1, 0),
-+};
-+static const unsigned int scifa1_clk_b_mux[] = {
-+	SCIFA1_SCK_B_MARK,
-+};
-+static const unsigned int scifa1_data_c_pins[] = {
-+	/* RXD, TXD */
-+	RCAR_GP_PIN(1, 2), RCAR_GP_PIN(1, 3),
-+};
-+static const unsigned int scifa1_data_c_mux[] = {
-+	SCIFA1_RXD_C_MARK, SCIFA1_TXD_C_MARK,
-+};
-+/* - SCIFA2 ----------------------------------------------------------------- */
-+static const unsigned int scifa2_data_pins[] = {
-+	/* RXD, TXD */
-+	RCAR_GP_PIN(2, 30), RCAR_GP_PIN(2, 31),
-+};
-+static const unsigned int scifa2_data_mux[] = {
-+	SCIFA2_RXD_MARK, SCIFA2_TXD_MARK,
-+};
-+static const unsigned int scifa2_clk_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(3, 18),
-+};
-+static const unsigned int scifa2_clk_mux[] = {
-+	SCIFA2_SCK_MARK,
-+};
-+static const unsigned int scifa2_data_b_pins[] = {
-+	/* RXD, TXD */
-+	RCAR_GP_PIN(3, 17), RCAR_GP_PIN(3, 16),
-+};
-+static const unsigned int scifa2_data_b_mux[] = {
-+	SCIFA2_RXD_B_MARK, SCIFA2_TXD_B_MARK,
-+};
-+/* - SCIFA3 ----------------------------------------------------------------- */
-+static const unsigned int scifa3_data_pins[] = {
-+	/* RXD, TXD */
-+	RCAR_GP_PIN(3, 22), RCAR_GP_PIN(3, 21),
-+};
-+static const unsigned int scifa3_data_mux[] = {
-+	SCIFA3_RXD_MARK, SCIFA3_TXD_MARK,
-+};
-+static const unsigned int scifa3_clk_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(3, 23),
-+};
-+static const unsigned int scifa3_clk_mux[] = {
-+	SCIFA3_SCK_MARK,
-+};
-+static const unsigned int scifa3_data_b_pins[] = {
-+	/* RXD, TXD */
-+	RCAR_GP_PIN(5, 19), RCAR_GP_PIN(5, 20),
-+};
-+static const unsigned int scifa3_data_b_mux[] = {
-+	SCIFA3_RXD_B_MARK, SCIFA3_TXD_B_MARK,
-+};
-+static const unsigned int scifa3_clk_b_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(4, 8),
-+};
-+static const unsigned int scifa3_clk_b_mux[] = {
-+	SCIFA3_SCK_B_MARK,
-+};
-+static const unsigned int scifa3_data_c_pins[] = {
-+	/* RXD, TXD */
-+	RCAR_GP_PIN(7, 21), RCAR_GP_PIN(7, 20),
-+};
-+static const unsigned int scifa3_data_c_mux[] = {
-+	SCIFA3_RXD_C_MARK, SCIFA3_TXD_C_MARK,
-+};
-+static const unsigned int scifa3_clk_c_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(7, 22),
-+};
-+static const unsigned int scifa3_clk_c_mux[] = {
-+	SCIFA3_SCK_C_MARK,
-+};
-+/* - SCIFA4 ----------------------------------------------------------------- */
-+static const unsigned int scifa4_data_pins[] = {
-+	/* RXD, TXD */
-+	RCAR_GP_PIN(4, 2), RCAR_GP_PIN(4, 1),
-+};
-+static const unsigned int scifa4_data_mux[] = {
-+	SCIFA4_RXD_MARK, SCIFA4_TXD_MARK,
-+};
-+static const unsigned int scifa4_data_b_pins[] = {
-+	/* RXD, TXD */
-+	RCAR_GP_PIN(5, 1), RCAR_GP_PIN(5, 0),
-+};
-+static const unsigned int scifa4_data_b_mux[] = {
-+	SCIFA4_RXD_B_MARK, SCIFA4_TXD_B_MARK,
-+};
-+static const unsigned int scifa4_data_c_pins[] = {
-+	/* RXD, TXD */
-+	RCAR_GP_PIN(7, 22), RCAR_GP_PIN(7, 21),
-+};
-+static const unsigned int scifa4_data_c_mux[] = {
-+	SCIFA4_RXD_C_MARK, SCIFA4_TXD_C_MARK,
-+};
-+/* - SCIFA5 ----------------------------------------------------------------- */
-+static const unsigned int scifa5_data_pins[] = {
-+	/* RXD, TXD */
-+	RCAR_GP_PIN(4, 4), RCAR_GP_PIN(4, 3),
-+};
-+static const unsigned int scifa5_data_mux[] = {
-+	SCIFA5_RXD_MARK, SCIFA5_TXD_MARK,
-+};
-+static const unsigned int scifa5_data_b_pins[] = {
-+	/* RXD, TXD */
-+	RCAR_GP_PIN(6, 7), RCAR_GP_PIN(6, 6),
-+};
-+static const unsigned int scifa5_data_b_mux[] = {
-+	SCIFA5_RXD_B_MARK, SCIFA5_TXD_B_MARK,
-+};
-+static const unsigned int scifa5_data_c_pins[] = {
-+	/* RXD, TXD */
-+	RCAR_GP_PIN(6, 23), RCAR_GP_PIN(6, 22),
-+};
-+static const unsigned int scifa5_data_c_mux[] = {
-+	SCIFA5_RXD_C_MARK, SCIFA5_TXD_C_MARK,
-+};
-+/* - SCIFB0 ----------------------------------------------------------------- */
-+static const unsigned int scifb0_data_pins[] = {
-+	/* RXD, TXD */
-+	RCAR_GP_PIN(7, 3), RCAR_GP_PIN(7, 4),
-+};
-+static const unsigned int scifb0_data_mux[] = {
-+	SCIFB0_RXD_MARK, SCIFB0_TXD_MARK,
-+};
-+static const unsigned int scifb0_clk_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(7, 2),
-+};
-+static const unsigned int scifb0_clk_mux[] = {
-+	SCIFB0_SCK_MARK,
-+};
-+static const unsigned int scifb0_ctrl_pins[] = {
-+	/* RTS, CTS */
-+	RCAR_GP_PIN(7, 1), RCAR_GP_PIN(7, 0),
-+};
-+static const unsigned int scifb0_ctrl_mux[] = {
-+	SCIFB0_RTS_N_MARK, SCIFB0_CTS_N_MARK,
-+};
-+static const unsigned int scifb0_data_b_pins[] = {
-+	/* RXD, TXD */
-+	RCAR_GP_PIN(1, 20), RCAR_GP_PIN(1, 21),
-+};
-+static const unsigned int scifb0_data_b_mux[] = {
-+	SCIFB0_RXD_B_MARK, SCIFB0_TXD_B_MARK,
-+};
-+static const unsigned int scifb0_clk_b_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(5, 31),
-+};
-+static const unsigned int scifb0_clk_b_mux[] = {
-+	SCIFB0_SCK_B_MARK,
-+};
-+static const unsigned int scifb0_ctrl_b_pins[] = {
-+	/* RTS, CTS */
-+	RCAR_GP_PIN(1, 22), RCAR_GP_PIN(1, 23),
-+};
-+static const unsigned int scifb0_ctrl_b_mux[] = {
-+	SCIFB0_RTS_N_B_MARK, SCIFB0_CTS_N_B_MARK,
-+};
-+static const unsigned int scifb0_data_c_pins[] = {
-+	/* RXD, TXD */
-+	RCAR_GP_PIN(2, 0), RCAR_GP_PIN(2, 1),
-+};
-+static const unsigned int scifb0_data_c_mux[] = {
-+	SCIFB0_RXD_C_MARK, SCIFB0_TXD_C_MARK,
-+};
-+static const unsigned int scifb0_clk_c_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(2, 30),
-+};
-+static const unsigned int scifb0_clk_c_mux[] = {
-+	SCIFB0_SCK_C_MARK,
-+};
-+static const unsigned int scifb0_data_d_pins[] = {
-+	/* RXD, TXD */
-+	RCAR_GP_PIN(4, 28), RCAR_GP_PIN(4, 18),
-+};
-+static const unsigned int scifb0_data_d_mux[] = {
-+	SCIFB0_RXD_D_MARK, SCIFB0_TXD_D_MARK,
-+};
-+static const unsigned int scifb0_clk_d_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(4, 17),
-+};
-+static const unsigned int scifb0_clk_d_mux[] = {
-+	SCIFB0_SCK_D_MARK,
-+};
-+/* - SCIFB1 ----------------------------------------------------------------- */
-+static const unsigned int scifb1_data_pins[] = {
-+	/* RXD, TXD */
-+	RCAR_GP_PIN(7, 5), RCAR_GP_PIN(7, 6),
-+};
-+static const unsigned int scifb1_data_mux[] = {
-+	SCIFB1_RXD_MARK, SCIFB1_TXD_MARK,
-+};
-+static const unsigned int scifb1_clk_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(7, 7),
-+};
-+static const unsigned int scifb1_clk_mux[] = {
-+	SCIFB1_SCK_MARK,
-+};
-+static const unsigned int scifb1_ctrl_pins[] = {
-+	/* RTS, CTS */
-+	RCAR_GP_PIN(7, 9), RCAR_GP_PIN(7, 8),
-+};
-+static const unsigned int scifb1_ctrl_mux[] = {
-+	SCIFB1_RTS_N_MARK, SCIFB1_CTS_N_MARK,
-+};
-+static const unsigned int scifb1_data_b_pins[] = {
-+	/* RXD, TXD */
-+	RCAR_GP_PIN(1, 17), RCAR_GP_PIN(1, 18),
-+};
-+static const unsigned int scifb1_data_b_mux[] = {
-+	SCIFB1_RXD_B_MARK, SCIFB1_TXD_B_MARK,
-+};
-+static const unsigned int scifb1_clk_b_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(1, 3),
-+};
-+static const unsigned int scifb1_clk_b_mux[] = {
-+	SCIFB1_SCK_B_MARK,
-+};
-+static const unsigned int scifb1_data_c_pins[] = {
-+	/* RXD, TXD */
-+	RCAR_GP_PIN(1, 2), RCAR_GP_PIN(1, 3),
-+};
-+static const unsigned int scifb1_data_c_mux[] = {
-+	SCIFB1_RXD_C_MARK, SCIFB1_TXD_C_MARK,
-+};
-+static const unsigned int scifb1_clk_c_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(7, 11),
-+};
-+static const unsigned int scifb1_clk_c_mux[] = {
-+	SCIFB1_SCK_C_MARK,
-+};
-+static const unsigned int scifb1_data_d_pins[] = {
-+	/* RXD, TXD */
-+	RCAR_GP_PIN(7, 10), RCAR_GP_PIN(7, 12),
-+};
-+static const unsigned int scifb1_data_d_mux[] = {
-+	SCIFB1_RXD_D_MARK, SCIFB1_TXD_D_MARK,
-+};
-+/* - SCIFB2 ----------------------------------------------------------------- */
-+static const unsigned int scifb2_data_pins[] = {
-+	/* RXD, TXD */
-+	RCAR_GP_PIN(4, 16), RCAR_GP_PIN(4, 17),
-+};
-+static const unsigned int scifb2_data_mux[] = {
-+	SCIFB2_RXD_MARK, SCIFB2_TXD_MARK,
-+};
-+static const unsigned int scifb2_clk_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(4, 15),
-+};
-+static const unsigned int scifb2_clk_mux[] = {
-+	SCIFB2_SCK_MARK,
-+};
-+static const unsigned int scifb2_ctrl_pins[] = {
-+	/* RTS, CTS */
-+	RCAR_GP_PIN(4, 14), RCAR_GP_PIN(4, 13),
-+};
-+static const unsigned int scifb2_ctrl_mux[] = {
-+	SCIFB2_RTS_N_MARK, SCIFB2_CTS_N_MARK,
-+};
-+static const unsigned int scifb2_data_b_pins[] = {
-+	/* RXD, TXD */
-+	RCAR_GP_PIN(3, 12), RCAR_GP_PIN(3, 13),
-+};
-+static const unsigned int scifb2_data_b_mux[] = {
-+	SCIFB2_RXD_B_MARK, SCIFB2_TXD_B_MARK,
-+};
-+static const unsigned int scifb2_clk_b_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(5, 31),
-+};
-+static const unsigned int scifb2_clk_b_mux[] = {
-+	SCIFB2_SCK_B_MARK,
-+};
-+static const unsigned int scifb2_ctrl_b_pins[] = {
-+	/* RTS, CTS */
-+	RCAR_GP_PIN(3, 15), RCAR_GP_PIN(3, 14),
-+};
-+static const unsigned int scifb2_ctrl_b_mux[] = {
-+	SCIFB2_RTS_N_B_MARK, SCIFB2_CTS_N_B_MARK,
-+};
-+static const unsigned int scifb2_data_c_pins[] = {
-+	/* RXD, TXD */
-+	RCAR_GP_PIN(2, 0), RCAR_GP_PIN(2, 1),
-+};
-+static const unsigned int scifb2_data_c_mux[] = {
-+	SCIFB2_RXD_C_MARK, SCIFB2_TXD_C_MARK,
-+};
-+static const unsigned int scifb2_clk_c_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(5, 27),
-+};
-+static const unsigned int scifb2_clk_c_mux[] = {
-+	SCIFB2_SCK_C_MARK,
-+};
-+static const unsigned int scifb2_data_d_pins[] = {
-+	/* RXD, TXD */
-+	RCAR_GP_PIN(5, 26), RCAR_GP_PIN(5, 25),
-+};
-+static const unsigned int scifb2_data_d_mux[] = {
-+	SCIFB2_RXD_D_MARK, SCIFB2_TXD_D_MARK,
-+};
-+/* - SDHI0 ------------------------------------------------------------------ */
-+static const unsigned int sdhi0_data1_pins[] = {
-+	/* D0 */
-+	RCAR_GP_PIN(6, 2),
-+};
-+static const unsigned int sdhi0_data1_mux[] = {
-+	SD0_DATA0_MARK,
-+};
-+static const unsigned int sdhi0_data4_pins[] = {
-+	/* D[0:3] */
-+	RCAR_GP_PIN(6, 2), RCAR_GP_PIN(6, 3),
-+	RCAR_GP_PIN(6, 4), RCAR_GP_PIN(6, 5),
-+};
-+static const unsigned int sdhi0_data4_mux[] = {
-+	SD0_DATA0_MARK, SD0_DATA1_MARK, SD0_DATA2_MARK, SD0_DATA3_MARK,
-+};
-+static const unsigned int sdhi0_ctrl_pins[] = {
-+	/* CLK, CMD */
-+	RCAR_GP_PIN(6, 0), RCAR_GP_PIN(6, 1),
-+};
-+static const unsigned int sdhi0_ctrl_mux[] = {
-+	SD0_CLK_MARK, SD0_CMD_MARK,
-+};
-+static const unsigned int sdhi0_cd_pins[] = {
-+	/* CD */
-+	RCAR_GP_PIN(6, 6),
-+};
-+static const unsigned int sdhi0_cd_mux[] = {
-+	SD0_CD_MARK,
-+};
-+static const unsigned int sdhi0_wp_pins[] = {
-+	/* WP */
-+	RCAR_GP_PIN(6, 7),
-+};
-+static const unsigned int sdhi0_wp_mux[] = {
-+	SD0_WP_MARK,
-+};
-+/* - SDHI1 ------------------------------------------------------------------ */
-+static const unsigned int sdhi1_data1_pins[] = {
-+	/* D0 */
-+	RCAR_GP_PIN(6, 10),
-+};
-+static const unsigned int sdhi1_data1_mux[] = {
-+	SD1_DATA0_MARK,
-+};
-+static const unsigned int sdhi1_data4_pins[] = {
-+	/* D[0:3] */
-+	RCAR_GP_PIN(6, 10), RCAR_GP_PIN(6, 11),
-+	RCAR_GP_PIN(6, 12), RCAR_GP_PIN(6, 13),
-+};
-+static const unsigned int sdhi1_data4_mux[] = {
-+	SD1_DATA0_MARK, SD1_DATA1_MARK, SD1_DATA2_MARK, SD1_DATA3_MARK,
-+};
-+static const unsigned int sdhi1_ctrl_pins[] = {
-+	/* CLK, CMD */
-+	RCAR_GP_PIN(6, 8), RCAR_GP_PIN(6, 9),
-+};
-+static const unsigned int sdhi1_ctrl_mux[] = {
-+	SD1_CLK_MARK, SD1_CMD_MARK,
-+};
-+static const unsigned int sdhi1_cd_pins[] = {
-+	/* CD */
-+	RCAR_GP_PIN(6, 14),
-+};
-+static const unsigned int sdhi1_cd_mux[] = {
-+	SD1_CD_MARK,
-+};
-+static const unsigned int sdhi1_wp_pins[] = {
-+	/* WP */
-+	RCAR_GP_PIN(6, 15),
-+};
-+static const unsigned int sdhi1_wp_mux[] = {
-+	SD1_WP_MARK,
-+};
-+/* - SDHI2 ------------------------------------------------------------------ */
-+static const unsigned int sdhi2_data1_pins[] = {
-+	/* D0 */
-+	RCAR_GP_PIN(6, 18),
-+};
-+static const unsigned int sdhi2_data1_mux[] = {
-+	SD2_DATA0_MARK,
-+};
-+static const unsigned int sdhi2_data4_pins[] = {
-+	/* D[0:3] */
-+	RCAR_GP_PIN(6, 18), RCAR_GP_PIN(6, 19),
-+	RCAR_GP_PIN(6, 20), RCAR_GP_PIN(6, 21),
-+};
-+static const unsigned int sdhi2_data4_mux[] = {
-+	SD2_DATA0_MARK, SD2_DATA1_MARK, SD2_DATA2_MARK, SD2_DATA3_MARK,
-+};
-+static const unsigned int sdhi2_ctrl_pins[] = {
-+	/* CLK, CMD */
-+	RCAR_GP_PIN(6, 16), RCAR_GP_PIN(6, 17),
-+};
-+static const unsigned int sdhi2_ctrl_mux[] = {
-+	SD2_CLK_MARK, SD2_CMD_MARK,
-+};
-+static const unsigned int sdhi2_cd_pins[] = {
-+	/* CD */
-+	RCAR_GP_PIN(6, 22),
-+};
-+static const unsigned int sdhi2_cd_mux[] = {
-+	SD2_CD_MARK,
-+};
-+static const unsigned int sdhi2_wp_pins[] = {
-+	/* WP */
-+	RCAR_GP_PIN(6, 23),
-+};
-+static const unsigned int sdhi2_wp_mux[] = {
-+	SD2_WP_MARK,
-+};
-+/* - USB0 ------------------------------------------------------------------- */
-+static const unsigned int usb0_pwen_pins[] = {
-+	/* PWEN */
-+	RCAR_GP_PIN(7, 23),
-+};
-+static const unsigned int usb0_pwen_mux[] = {
-+	USB0_PWEN_MARK,
-+};
-+static const unsigned int usb0_ovc_pins[] = {
-+	/* OVC */
-+	RCAR_GP_PIN(7, 24),
-+};
-+static const unsigned int usb0_ovc_mux[] = {
-+	USB0_OVC_MARK,
-+};
-+/* - USB1 ------------------------------------------------------------------- */
-+static const unsigned int usb1_pwen_pins[] = {
-+	/* PWEN */
-+	RCAR_GP_PIN(7, 25),
-+};
-+static const unsigned int usb1_pwen_mux[] = {
-+	USB1_PWEN_MARK,
-+};
-+static const unsigned int usb1_ovc_pins[] = {
-+	/* OVC */
-+	RCAR_GP_PIN(6, 30),
-+};
-+static const unsigned int usb1_ovc_mux[] = {
-+	USB1_OVC_MARK,
-+};
-+
-+static const struct sh_pfc_pin_group pinmux_groups[] = {
-+	SH_PFC_PIN_GROUP(du_rgb666),
-+	SH_PFC_PIN_GROUP(du_rgb888),
-+	SH_PFC_PIN_GROUP(du_clk_out_0),
-+	SH_PFC_PIN_GROUP(du_clk_out_1),
-+	SH_PFC_PIN_GROUP(du_sync_1),
-+	SH_PFC_PIN_GROUP(du_cde_disp),
-+	SH_PFC_PIN_GROUP(du0_clk_in),
-+	SH_PFC_PIN_GROUP(du1_clk_in),
-+	SH_PFC_PIN_GROUP(eth_link),
-+	SH_PFC_PIN_GROUP(eth_magic),
-+	SH_PFC_PIN_GROUP(eth_mdio),
-+	SH_PFC_PIN_GROUP(eth_rmii),
-+	SH_PFC_PIN_GROUP(intc_irq0),
-+	SH_PFC_PIN_GROUP(intc_irq1),
-+	SH_PFC_PIN_GROUP(intc_irq2),
-+	SH_PFC_PIN_GROUP(intc_irq3),
-+	SH_PFC_PIN_GROUP(mmc_data1),
-+	SH_PFC_PIN_GROUP(mmc_data4),
-+	SH_PFC_PIN_GROUP(mmc_data8),
-+	SH_PFC_PIN_GROUP(mmc_ctrl),
-+	SH_PFC_PIN_GROUP(msiof0_clk),
-+	SH_PFC_PIN_GROUP(msiof0_sync),
-+	SH_PFC_PIN_GROUP(msiof0_ss1),
-+	SH_PFC_PIN_GROUP(msiof0_ss2),
-+	SH_PFC_PIN_GROUP(msiof0_rx),
-+	SH_PFC_PIN_GROUP(msiof0_tx),
-+	SH_PFC_PIN_GROUP(msiof1_clk),
-+	SH_PFC_PIN_GROUP(msiof1_sync),
-+	SH_PFC_PIN_GROUP(msiof1_ss1),
-+	SH_PFC_PIN_GROUP(msiof1_ss2),
-+	SH_PFC_PIN_GROUP(msiof1_rx),
-+	SH_PFC_PIN_GROUP(msiof1_tx),
-+	SH_PFC_PIN_GROUP(msiof2_clk),
-+	SH_PFC_PIN_GROUP(msiof2_sync),
-+	SH_PFC_PIN_GROUP(msiof2_ss1),
-+	SH_PFC_PIN_GROUP(msiof2_ss2),
-+	SH_PFC_PIN_GROUP(msiof2_rx),
-+	SH_PFC_PIN_GROUP(msiof2_tx),
-+	SH_PFC_PIN_GROUP(scif0_data),
-+	SH_PFC_PIN_GROUP(scif0_data_b),
-+	SH_PFC_PIN_GROUP(scif0_data_c),
-+	SH_PFC_PIN_GROUP(scif0_data_d),
-+	SH_PFC_PIN_GROUP(scif0_data_e),
-+	SH_PFC_PIN_GROUP(scif1_data),
-+	SH_PFC_PIN_GROUP(scif1_data_b),
-+	SH_PFC_PIN_GROUP(scif1_clk_b),
-+	SH_PFC_PIN_GROUP(scif1_data_c),
-+	SH_PFC_PIN_GROUP(scif1_data_d),
-+	SH_PFC_PIN_GROUP(scif2_data),
-+	SH_PFC_PIN_GROUP(scif2_data_b),
-+	SH_PFC_PIN_GROUP(scif2_clk_b),
-+	SH_PFC_PIN_GROUP(scif2_data_c),
-+	SH_PFC_PIN_GROUP(scif2_data_e),
-+	SH_PFC_PIN_GROUP(scif3_data),
-+	SH_PFC_PIN_GROUP(scif3_clk),
-+	SH_PFC_PIN_GROUP(scif3_data_b),
-+	SH_PFC_PIN_GROUP(scif3_clk_b),
-+	SH_PFC_PIN_GROUP(scif3_data_c),
-+	SH_PFC_PIN_GROUP(scif3_data_d),
-+	SH_PFC_PIN_GROUP(scif4_data),
-+	SH_PFC_PIN_GROUP(scif4_data_b),
-+	SH_PFC_PIN_GROUP(scif4_data_c),
-+	SH_PFC_PIN_GROUP(scif5_data),
-+	SH_PFC_PIN_GROUP(scif5_data_b),
-+	SH_PFC_PIN_GROUP(scifa0_data),
-+	SH_PFC_PIN_GROUP(scifa0_data_b),
-+	SH_PFC_PIN_GROUP(scifa1_data),
-+	SH_PFC_PIN_GROUP(scifa1_clk),
-+	SH_PFC_PIN_GROUP(scifa1_data_b),
-+	SH_PFC_PIN_GROUP(scifa1_clk_b),
-+	SH_PFC_PIN_GROUP(scifa1_data_c),
-+	SH_PFC_PIN_GROUP(scifa2_data),
-+	SH_PFC_PIN_GROUP(scifa2_clk),
-+	SH_PFC_PIN_GROUP(scifa2_data_b),
-+	SH_PFC_PIN_GROUP(scifa3_data),
-+	SH_PFC_PIN_GROUP(scifa3_clk),
-+	SH_PFC_PIN_GROUP(scifa3_data_b),
-+	SH_PFC_PIN_GROUP(scifa3_clk_b),
-+	SH_PFC_PIN_GROUP(scifa3_data_c),
-+	SH_PFC_PIN_GROUP(scifa3_clk_c),
-+	SH_PFC_PIN_GROUP(scifa4_data),
-+	SH_PFC_PIN_GROUP(scifa4_data_b),
-+	SH_PFC_PIN_GROUP(scifa4_data_c),
-+	SH_PFC_PIN_GROUP(scifa5_data),
-+	SH_PFC_PIN_GROUP(scifa5_data_b),
-+	SH_PFC_PIN_GROUP(scifa5_data_c),
-+	SH_PFC_PIN_GROUP(scifb0_data),
-+	SH_PFC_PIN_GROUP(scifb0_clk),
-+	SH_PFC_PIN_GROUP(scifb0_ctrl),
-+	SH_PFC_PIN_GROUP(scifb0_data_b),
-+	SH_PFC_PIN_GROUP(scifb0_clk_b),
-+	SH_PFC_PIN_GROUP(scifb0_ctrl_b),
-+	SH_PFC_PIN_GROUP(scifb0_data_c),
-+	SH_PFC_PIN_GROUP(scifb0_clk_c),
-+	SH_PFC_PIN_GROUP(scifb0_data_d),
-+	SH_PFC_PIN_GROUP(scifb0_clk_d),
-+	SH_PFC_PIN_GROUP(scifb1_data),
-+	SH_PFC_PIN_GROUP(scifb1_clk),
-+	SH_PFC_PIN_GROUP(scifb1_ctrl),
-+	SH_PFC_PIN_GROUP(scifb1_data_b),
-+	SH_PFC_PIN_GROUP(scifb1_clk_b),
-+	SH_PFC_PIN_GROUP(scifb1_data_c),
-+	SH_PFC_PIN_GROUP(scifb1_clk_c),
-+	SH_PFC_PIN_GROUP(scifb1_data_d),
-+	SH_PFC_PIN_GROUP(scifb2_data),
-+	SH_PFC_PIN_GROUP(scifb2_clk),
-+	SH_PFC_PIN_GROUP(scifb2_ctrl),
-+	SH_PFC_PIN_GROUP(scifb2_data_b),
-+	SH_PFC_PIN_GROUP(scifb2_clk_b),
-+	SH_PFC_PIN_GROUP(scifb2_ctrl_b),
-+	SH_PFC_PIN_GROUP(scifb2_data_c),
-+	SH_PFC_PIN_GROUP(scifb2_clk_c),
-+	SH_PFC_PIN_GROUP(scifb2_data_d),
-+	SH_PFC_PIN_GROUP(sdhi0_data1),
-+	SH_PFC_PIN_GROUP(sdhi0_data4),
-+	SH_PFC_PIN_GROUP(sdhi0_ctrl),
-+	SH_PFC_PIN_GROUP(sdhi0_cd),
-+	SH_PFC_PIN_GROUP(sdhi0_wp),
-+	SH_PFC_PIN_GROUP(sdhi1_data1),
-+	SH_PFC_PIN_GROUP(sdhi1_data4),
-+	SH_PFC_PIN_GROUP(sdhi1_ctrl),
-+	SH_PFC_PIN_GROUP(sdhi1_cd),
-+	SH_PFC_PIN_GROUP(sdhi1_wp),
-+	SH_PFC_PIN_GROUP(sdhi2_data1),
-+	SH_PFC_PIN_GROUP(sdhi2_data4),
-+	SH_PFC_PIN_GROUP(sdhi2_ctrl),
-+	SH_PFC_PIN_GROUP(sdhi2_cd),
-+	SH_PFC_PIN_GROUP(sdhi2_wp),
-+	SH_PFC_PIN_GROUP(usb0_pwen),
-+	SH_PFC_PIN_GROUP(usb0_ovc),
-+	SH_PFC_PIN_GROUP(usb1_pwen),
-+	SH_PFC_PIN_GROUP(usb1_ovc),
-+};
-+
-+static const char * const du_groups[] = {
-+	"du_rgb666",
-+	"du_rgb888",
-+	"du_clk_out_0",
-+	"du_clk_out_1",
-+	"du_sync_1",
-+	"du_cde_disp",
-+};
-+
-+static const char * const du0_groups[] = {
-+	"du0_clk_in",
-+};
-+
-+static const char * const du1_groups[] = {
-+	"du1_clk_in",
-+};
-+
-+static const char * const eth_groups[] = {
-+	"eth_link",
-+	"eth_magic",
-+	"eth_mdio",
-+	"eth_rmii",
-+};
-+
-+static const char * const intc_groups[] = {
-+	"intc_irq0",
-+	"intc_irq1",
-+	"intc_irq2",
-+	"intc_irq3",
-+};
-+
-+static const char * const mmc_groups[] = {
-+	"mmc_data1",
-+	"mmc_data4",
-+	"mmc_data8",
-+	"mmc_ctrl",
-+};
-+
-+static const char * const msiof0_groups[] = {
-+	"msiof0_clk",
-+	"msiof0_ctrl",
-+	"msiof0_data",
-+};
-+
-+static const char * const msiof1_groups[] = {
-+	"msiof1_clk",
-+	"msiof1_ctrl",
-+	"msiof1_data",
-+};
-+
-+static const char * const msiof2_groups[] = {
-+	"msiof2_clk",
-+	"msiof2_ctrl",
-+	"msiof2_data",
-+};
-+
-+static const char * const scif0_groups[] = {
-+	"scif0_data",
-+	"scif0_data_b",
-+	"scif0_data_c",
-+	"scif0_data_d",
-+	"scif0_data_e",
-+};
-+
-+static const char * const scif1_groups[] = {
-+	"scif1_data",
-+	"scif1_data_b",
-+	"scif1_clk_b",
-+	"scif1_data_c",
-+	"scif1_data_d",
-+};
-+
-+static const char * const scif2_groups[] = {
-+	"scif2_data",
-+	"scif2_data_b",
-+	"scif2_clk_b",
-+	"scif2_data_c",
-+	"scif2_data_e",
-+};
-+static const char * const scif3_groups[] = {
-+	"scif3_data",
-+	"scif3_clk",
-+	"scif3_data_b",
-+	"scif3_clk_b",
-+	"scif3_data_c",
-+	"scif3_data_d",
-+};
-+static const char * const scif4_groups[] = {
-+	"scif4_data",
-+	"scif4_data_b",
-+	"scif4_data_c",
-+};
-+static const char * const scif5_groups[] = {
-+	"scif5_data",
-+	"scif5_data_b",
-+};
-+static const char * const scifa0_groups[] = {
-+	"scifa0_data",
-+	"scifa0_data_b",
-+};
-+static const char * const scifa1_groups[] = {
-+	"scifa1_data",
-+	"scifa1_clk",
-+	"scifa1_data_b",
-+	"scifa1_clk_b",
-+	"scifa1_data_c",
-+};
-+static const char * const scifa2_groups[] = {
-+	"scifa2_data",
-+	"scifa2_clk",
-+	"scifa2_data_b",
-+};
-+static const char * const scifa3_groups[] = {
-+	"scifa3_data",
-+	"scifa3_clk",
-+	"scifa3_data_b",
-+	"scifa3_clk_b",
-+	"scifa3_data_c",
-+	"scifa3_clk_c",
-+};
-+static const char * const scifa4_groups[] = {
-+	"scifa4_data",
-+	"scifa4_data_b",
-+	"scifa4_data_c",
-+};
-+static const char * const scifa5_groups[] = {
-+	"scifa5_data",
-+	"scifa5_data_b",
-+	"scifa5_data_c",
-+};
-+static const char * const scifb0_groups[] = {
-+	"scifb0_data",
-+	"scifb0_clk",
-+	"scifb0_ctrl",
-+	"scifb0_data_b",
-+	"scifb0_clk_b",
-+	"scifb0_ctrl_b",
-+	"scifb0_data_c",
-+	"scifb0_clk_c",
-+	"scifb0_data_d",
-+	"scifb0_clk_d",
-+};
-+static const char * const scifb1_groups[] = {
-+	"scifb1_data",
-+	"scifb1_clk",
-+	"scifb1_ctrl",
-+	"scifb1_data_b",
-+	"scifb1_clk_b",
-+	"scifb1_data_c",
-+	"scifb1_clk_c",
-+	"scifb1_data_d",
-+};
-+static const char * const scifb2_groups[] = {
-+	"scifb2_data",
-+	"scifb2_clk",
-+	"scifb2_ctrl",
-+	"scifb2_data_b",
-+	"scifb2_clk_b",
-+	"scifb2_ctrl_b",
-+	"scifb0_data_c",
-+	"scifb2_clk_c",
-+	"scifb2_data_d",
-+};
-+
-+static const char * const sdhi0_groups[] = {
-+	"sdhi0_data1",
-+	"sdhi0_data4",
-+	"sdhi0_ctrl",
-+	"sdhi0_cd",
-+	"sdhi0_wp",
-+};
-+
-+static const char * const sdhi1_groups[] = {
-+	"sdhi1_data1",
-+	"sdhi1_data4",
-+	"sdhi1_ctrl",
-+	"sdhi1_cd",
-+	"sdhi1_wp",
-+};
-+
-+static const char * const sdhi2_groups[] = {
-+	"sdhi2_data1",
-+	"sdhi2_data4",
-+	"sdhi2_ctrl",
-+	"sdhi2_cd",
-+	"sdhi2_wp",
-+};
-+
-+static const char * const usb0_groups[] = {
-+	"usb0_pwen",
-+	"usb0_ovc",
-+};
-+static const char * const usb1_groups[] = {
-+	"usb1_pwen",
-+	"usb1_ovc",
-+};
-+
-+static const struct sh_pfc_function pinmux_functions[] = {
-+	SH_PFC_FUNCTION(du),
-+	SH_PFC_FUNCTION(du0),
-+	SH_PFC_FUNCTION(du1),
-+	SH_PFC_FUNCTION(eth),
-+	SH_PFC_FUNCTION(intc),
-+	SH_PFC_FUNCTION(mmc),
-+	SH_PFC_FUNCTION(msiof0),
-+	SH_PFC_FUNCTION(msiof1),
-+	SH_PFC_FUNCTION(msiof2),
-+	SH_PFC_FUNCTION(scif0),
-+	SH_PFC_FUNCTION(scif1),
-+	SH_PFC_FUNCTION(scif2),
-+	SH_PFC_FUNCTION(scif3),
-+	SH_PFC_FUNCTION(scif4),
-+	SH_PFC_FUNCTION(scif5),
-+	SH_PFC_FUNCTION(scifa0),
-+	SH_PFC_FUNCTION(scifa1),
-+	SH_PFC_FUNCTION(scifa2),
-+	SH_PFC_FUNCTION(scifa3),
-+	SH_PFC_FUNCTION(scifa4),
-+	SH_PFC_FUNCTION(scifa5),
-+	SH_PFC_FUNCTION(scifb0),
-+	SH_PFC_FUNCTION(scifb1),
-+	SH_PFC_FUNCTION(scifb2),
-+	SH_PFC_FUNCTION(sdhi0),
-+	SH_PFC_FUNCTION(sdhi1),
-+	SH_PFC_FUNCTION(sdhi2),
-+	SH_PFC_FUNCTION(usb0),
-+	SH_PFC_FUNCTION(usb1),
-+};
-+
-+static struct pinmux_cfg_reg pinmux_config_regs[] = {
-+	{ PINMUX_CFG_REG("GPSR0", 0xE6060004, 32, 1) {
-+		GP_0_31_FN, FN_IP1_22_20,
-+		GP_0_30_FN, FN_IP1_19_17,
-+		GP_0_29_FN, FN_IP1_16_14,
-+		GP_0_28_FN, FN_IP1_13_11,
-+		GP_0_27_FN, FN_IP1_10_8,
-+		GP_0_26_FN, FN_IP1_7_6,
-+		GP_0_25_FN, FN_IP1_5_4,
-+		GP_0_24_FN, FN_IP1_3_2,
-+		GP_0_23_FN, FN_IP1_1_0,
-+		GP_0_22_FN, FN_IP0_30_29,
-+		GP_0_21_FN, FN_IP0_28_27,
-+		GP_0_20_FN, FN_IP0_26_25,
-+		GP_0_19_FN, FN_IP0_24_23,
-+		GP_0_18_FN, FN_IP0_22_21,
-+		GP_0_17_FN, FN_IP0_20_19,
-+		GP_0_16_FN, FN_IP0_18_16,
-+		GP_0_15_FN, FN_IP0_15,
-+		GP_0_14_FN, FN_IP0_14,
-+		GP_0_13_FN, FN_IP0_13,
-+		GP_0_12_FN, FN_IP0_12,
-+		GP_0_11_FN, FN_IP0_11,
-+		GP_0_10_FN, FN_IP0_10,
-+		GP_0_9_FN, FN_IP0_9,
-+		GP_0_8_FN, FN_IP0_8,
-+		GP_0_7_FN, FN_IP0_7,
-+		GP_0_6_FN, FN_IP0_6,
-+		GP_0_5_FN, FN_IP0_5,
-+		GP_0_4_FN, FN_IP0_4,
-+		GP_0_3_FN, FN_IP0_3,
-+		GP_0_2_FN, FN_IP0_2,
-+		GP_0_1_FN, FN_IP0_1,
-+		GP_0_0_FN, FN_IP0_0, }
-+	},
-+	{ PINMUX_CFG_REG("GPSR1", 0xE6060008, 32, 1) {
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		GP_1_25_FN, FN_IP3_21_20,
-+		GP_1_24_FN, FN_IP3_19_18,
-+		GP_1_23_FN, FN_IP3_17_16,
-+		GP_1_22_FN, FN_IP3_15_14,
-+		GP_1_21_FN, FN_IP3_13_12,
-+		GP_1_20_FN, FN_IP3_11_9,
-+		GP_1_19_FN, FN_RD_N,
-+		GP_1_18_FN, FN_IP3_8_6,
-+		GP_1_17_FN, FN_IP3_5_3,
-+		GP_1_16_FN, FN_IP3_2_0,
-+		GP_1_15_FN, FN_IP2_29_27,
-+		GP_1_14_FN, FN_IP2_26_25,
-+		GP_1_13_FN, FN_IP2_24_23,
-+		GP_1_12_FN, FN_EX_CS0_N,
-+		GP_1_11_FN, FN_IP2_22_21,
-+		GP_1_10_FN, FN_IP2_20_19,
-+		GP_1_9_FN, FN_IP2_18_16,
-+		GP_1_8_FN, FN_IP2_15_13,
-+		GP_1_7_FN, FN_IP2_12_10,
-+		GP_1_6_FN, FN_IP2_9_7,
-+		GP_1_5_FN, FN_IP2_6_5,
-+		GP_1_4_FN, FN_IP2_4_3,
-+		GP_1_3_FN, FN_IP2_2_0,
-+		GP_1_2_FN, FN_IP1_31_29,
-+		GP_1_1_FN, FN_IP1_28_26,
-+		GP_1_0_FN, FN_IP1_25_23, }
-+	},
-+	{ PINMUX_CFG_REG("GPSR2", 0xE606000C, 32, 1) {
-+		GP_2_31_FN, FN_IP6_7_6,
-+		GP_2_30_FN, FN_IP6_5_3,
-+		GP_2_29_FN, FN_IP6_2_0,
-+		GP_2_28_FN, FN_AUDIO_CLKA,
-+		GP_2_27_FN, FN_IP5_31_29,
-+		GP_2_26_FN, FN_IP5_28_26,
-+		GP_2_25_FN, FN_IP5_25_24,
-+		GP_2_24_FN, FN_IP5_23_22,
-+		GP_2_23_FN, FN_IP5_21_20,
-+		GP_2_22_FN, FN_IP5_19_17,
-+		GP_2_21_FN, FN_IP5_16_15,
-+		GP_2_20_FN, FN_IP5_14_12,
-+		GP_2_19_FN, FN_IP5_11_9,
-+		GP_2_18_FN, FN_IP5_8_6,
-+		GP_2_17_FN, FN_IP5_5_3,
-+		GP_2_16_FN, FN_IP5_2_0,
-+		GP_2_15_FN, FN_IP4_30_28,
-+		GP_2_14_FN, FN_IP4_27_26,
-+		GP_2_13_FN, FN_IP4_25_24,
-+		GP_2_12_FN, FN_IP4_23_22,
-+		GP_2_11_FN, FN_IP4_21,
-+		GP_2_10_FN, FN_IP4_20,
-+		GP_2_9_FN, FN_IP4_19,
-+		GP_2_8_FN, FN_IP4_18_16,
-+		GP_2_7_FN, FN_IP4_15_13,
-+		GP_2_6_FN, FN_IP4_12_10,
-+		GP_2_5_FN, FN_IP4_9_8,
-+		GP_2_4_FN, FN_IP4_7_5,
-+		GP_2_3_FN, FN_IP4_4_2,
-+		GP_2_2_FN, FN_IP4_1_0,
-+		GP_2_1_FN, FN_IP3_30_28,
-+		GP_2_0_FN, FN_IP3_27_25 }
-+	},
-+	{ PINMUX_CFG_REG("GPSR3", 0xE6060010, 32, 1) {
-+		GP_3_31_FN, FN_IP9_18_17,
-+		GP_3_30_FN, FN_IP9_16,
-+		GP_3_29_FN, FN_IP9_15_13,
-+		GP_3_28_FN, FN_IP9_12,
-+		GP_3_27_FN, FN_IP9_11,
-+		GP_3_26_FN, FN_IP9_10_8,
-+		GP_3_25_FN, FN_IP9_7,
-+		GP_3_24_FN, FN_IP9_6,
-+		GP_3_23_FN, FN_IP9_5_3,
-+		GP_3_22_FN, FN_IP9_2_0,
-+		GP_3_21_FN, FN_IP8_30_28,
-+		GP_3_20_FN, FN_IP8_27_26,
-+		GP_3_19_FN, FN_IP8_25_24,
-+		GP_3_18_FN, FN_IP8_23_21,
-+		GP_3_17_FN, FN_IP8_20_18,
-+		GP_3_16_FN, FN_IP8_17_15,
-+		GP_3_15_FN, FN_IP8_14_12,
-+		GP_3_14_FN, FN_IP8_11_9,
-+		GP_3_13_FN, FN_IP8_8_6,
-+		GP_3_12_FN, FN_IP8_5_3,
-+		GP_3_11_FN, FN_IP8_2_0,
-+		GP_3_10_FN, FN_IP7_29_27,
-+		GP_3_9_FN, FN_IP7_26_24,
-+		GP_3_8_FN, FN_IP7_23_21,
-+		GP_3_7_FN, FN_IP7_20_19,
-+		GP_3_6_FN, FN_IP7_18_17,
-+		GP_3_5_FN, FN_IP7_16_15,
-+		GP_3_4_FN, FN_IP7_14_13,
-+		GP_3_3_FN, FN_IP7_12_11,
-+		GP_3_2_FN, FN_IP7_10_9,
-+		GP_3_1_FN, FN_IP7_8_6,
-+		GP_3_0_FN, FN_IP7_5_3 }
-+	},
-+	{ PINMUX_CFG_REG("GPSR4", 0xE6060014, 32, 1) {
-+		GP_4_31_FN, FN_IP15_5_4,
-+		GP_4_30_FN, FN_IP15_3_2,
-+		GP_4_29_FN, FN_IP15_1_0,
-+		GP_4_28_FN, FN_IP11_8_6,
-+		GP_4_27_FN, FN_IP11_5_3,
-+		GP_4_26_FN, FN_IP11_2_0,
-+		GP_4_25_FN, FN_IP10_31_29,
-+		GP_4_24_FN, FN_IP10_28_27,
-+		GP_4_23_FN, FN_IP10_26_25,
-+		GP_4_22_FN, FN_IP10_24_22,
-+		GP_4_21_FN, FN_IP10_21_19,
-+		GP_4_20_FN, FN_IP10_18_17,
-+		GP_4_19_FN, FN_IP10_16_15,
-+		GP_4_18_FN, FN_IP10_14_12,
-+		GP_4_17_FN, FN_IP10_11_9,
-+		GP_4_16_FN, FN_IP10_8_6,
-+		GP_4_15_FN, FN_IP10_5_3,
-+		GP_4_14_FN, FN_IP10_2_0,
-+		GP_4_13_FN, FN_IP9_31_29,
-+		GP_4_12_FN, FN_VI0_DATA7_VI0_B7,
-+		GP_4_11_FN, FN_VI0_DATA6_VI0_B6,
-+		GP_4_10_FN, FN_VI0_DATA5_VI0_B5,
-+		GP_4_9_FN, FN_VI0_DATA4_VI0_B4,
-+		GP_4_8_FN, FN_IP9_28_27,
-+		GP_4_7_FN, FN_VI0_DATA2_VI0_B2,
-+		GP_4_6_FN, FN_VI0_DATA1_VI0_B1,
-+		GP_4_5_FN, FN_VI0_DATA0_VI0_B0,
-+		GP_4_4_FN, FN_IP9_26_25,
-+		GP_4_3_FN, FN_IP9_24_23,
-+		GP_4_2_FN, FN_IP9_22_21,
-+		GP_4_1_FN, FN_IP9_20_19,
-+		GP_4_0_FN, FN_VI0_CLK }
-+	},
-+	{ PINMUX_CFG_REG("GPSR5", 0xE6060018, 32, 1) {
-+		GP_5_31_FN, FN_IP3_24_22,
-+		GP_5_30_FN, FN_IP13_9_7,
-+		GP_5_29_FN, FN_IP13_6_5,
-+		GP_5_28_FN, FN_IP13_4_3,
-+		GP_5_27_FN, FN_IP13_2_0,
-+		GP_5_26_FN, FN_IP12_29_27,
-+		GP_5_25_FN, FN_IP12_26_24,
-+		GP_5_24_FN, FN_IP12_23_22,
-+		GP_5_23_FN, FN_IP12_21_20,
-+		GP_5_22_FN, FN_IP12_19_18,
-+		GP_5_21_FN, FN_IP12_17_16,
-+		GP_5_20_FN, FN_IP12_15_13,
-+		GP_5_19_FN, FN_IP12_12_10,
-+		GP_5_18_FN, FN_IP12_9_7,
-+		GP_5_17_FN, FN_IP12_6_4,
-+		GP_5_16_FN, FN_IP12_3_2,
-+		GP_5_15_FN, FN_IP12_1_0,
-+		GP_5_14_FN, FN_IP11_31_30,
-+		GP_5_13_FN, FN_IP11_29_28,
-+		GP_5_12_FN, FN_IP11_27,
-+		GP_5_11_FN, FN_IP11_26,
-+		GP_5_10_FN, FN_IP11_25,
-+		GP_5_9_FN, FN_IP11_24,
-+		GP_5_8_FN, FN_IP11_23,
-+		GP_5_7_FN, FN_IP11_22,
-+		GP_5_6_FN, FN_IP11_21,
-+		GP_5_5_FN, FN_IP11_20,
-+		GP_5_4_FN, FN_IP11_19,
-+		GP_5_3_FN, FN_IP11_18_17,
-+		GP_5_2_FN, FN_IP11_16_15,
-+		GP_5_1_FN, FN_IP11_14_12,
-+		GP_5_0_FN, FN_IP11_11_9 }
-+	},
-+	{ PINMUX_CFG_REG("GPSR6", 0xE606001C, 32, 1) {
-+		GP_6_31_FN, FN_DU0_DOTCLKIN,
-+		GP_6_30_FN, FN_USB1_OVC,
-+		GP_6_29_FN, FN_IP14_31_29,
-+		GP_6_28_FN, FN_IP14_28_26,
-+		GP_6_27_FN, FN_IP14_25_23,
-+		GP_6_26_FN, FN_IP14_22_20,
-+		GP_6_25_FN, FN_IP14_19_17,
-+		GP_6_24_FN, FN_IP14_16_14,
-+		GP_6_23_FN, FN_IP14_13_11,
-+		GP_6_22_FN, FN_IP14_10_8,
-+		GP_6_21_FN, FN_IP14_7,
-+		GP_6_20_FN, FN_IP14_6,
-+		GP_6_19_FN, FN_IP14_5,
-+		GP_6_18_FN, FN_IP14_4,
-+		GP_6_17_FN, FN_IP14_3,
-+		GP_6_16_FN, FN_IP14_2,
-+		GP_6_15_FN, FN_IP14_1_0,
-+		GP_6_14_FN, FN_IP13_30_28,
-+		GP_6_13_FN, FN_IP13_27,
-+		GP_6_12_FN, FN_IP13_26,
-+		GP_6_11_FN, FN_IP13_25,
-+		GP_6_10_FN, FN_IP13_24_23,
-+		GP_6_9_FN, FN_IP13_22,
-+		0, 0,
-+		GP_6_7_FN, FN_IP13_21_19,
-+		GP_6_6_FN, FN_IP13_18_16,
-+		GP_6_5_FN, FN_IP13_15,
-+		GP_6_4_FN, FN_IP13_14,
-+		GP_6_3_FN, FN_IP13_13,
-+		GP_6_2_FN, FN_IP13_12,
-+		GP_6_1_FN, FN_IP13_11,
-+		GP_6_0_FN, FN_IP13_10 }
-+	},
-+	{ PINMUX_CFG_REG("GPSR7", 0xE6060074, 32, 1) {
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		GP_7_25_FN, FN_USB1_PWEN,
-+		GP_7_24_FN, FN_USB0_OVC,
-+		GP_7_23_FN, FN_USB0_PWEN,
-+		GP_7_22_FN, FN_IP15_14_12,
-+		GP_7_21_FN, FN_IP15_11_9,
-+		GP_7_20_FN, FN_IP15_8_6,
-+		GP_7_19_FN, FN_IP7_2_0,
-+		GP_7_18_FN, FN_IP6_29_27,
-+		GP_7_17_FN, FN_IP6_26_24,
-+		GP_7_16_FN, FN_IP6_23_21,
-+		GP_7_15_FN, FN_IP6_20_19,
-+		GP_7_14_FN, FN_IP6_18_16,
-+		GP_7_13_FN, FN_IP6_15_14,
-+		GP_7_12_FN, FN_IP6_13_12,
-+		GP_7_11_FN, FN_IP6_11_10,
-+		GP_7_10_FN, FN_IP6_9_8,
-+		GP_7_9_FN, FN_IP16_11_10,
-+		GP_7_8_FN, FN_IP16_9_8,
-+		GP_7_7_FN, FN_IP16_7_6,
-+		GP_7_6_FN, FN_IP16_5_3,
-+		GP_7_5_FN, FN_IP16_2_0,
-+		GP_7_4_FN, FN_IP15_29_27,
-+		GP_7_3_FN, FN_IP15_26_24,
-+		GP_7_2_FN, FN_IP15_23_21,
-+		GP_7_1_FN, FN_IP15_20_18,
-+		GP_7_0_FN, FN_IP15_17_15 }
-+	},
-+	{ PINMUX_CFG_REG_VAR("IPSR0", 0xE6060020, 32,
-+			     1, 2, 2, 2, 2, 2, 2, 3, 1, 1, 1, 1, 1, 1, 1, 1,
-+			     1, 1, 1, 1, 1, 1, 1, 1) {
-+		/* IP0_31 [1] */
-+		0, 0,
-+		/* IP0_30_29 [2] */
-+		FN_A6, FN_MSIOF1_SCK,
-+		0, 0,
-+		/* IP0_28_27 [2] */
-+		FN_A5, FN_MSIOF0_RXD_B,
-+		0, 0,
-+		/* IP0_26_25 [2] */
-+		FN_A4, FN_MSIOF0_TXD_B,
-+		0, 0,
-+		/* IP0_24_23 [2] */
-+		FN_A3, FN_MSIOF0_SS2_B,
-+		0, 0,
-+		/* IP0_22_21 [2] */
-+		FN_A2, FN_MSIOF0_SS1_B,
-+		0, 0,
-+		/* IP0_20_19 [2] */
-+		FN_A1, FN_MSIOF0_SYNC_B,
-+		0, 0,
-+		/* IP0_18_16 [3] */
-+		FN_A0, FN_ATAWR0_N_C, FN_MSIOF0_SCK_B, FN_SCL0_C, FN_PWM2_B,
-+		0, 0, 0,
-+		/* IP0_15 [1] */
-+		FN_D15, 0,
-+		/* IP0_14 [1] */
-+		FN_D14, 0,
-+		/* IP0_13 [1] */
-+		FN_D13, 0,
-+		/* IP0_12 [1] */
-+		FN_D12, 0,
-+		/* IP0_11 [1] */
-+		FN_D11, 0,
-+		/* IP0_10 [1] */
-+		FN_D10, 0,
-+		/* IP0_9 [1] */
-+		FN_D9, 0,
-+		/* IP0_8 [1] */
-+		FN_D8, 0,
-+		/* IP0_7 [1] */
-+		FN_D7, 0,
-+		/* IP0_6 [1] */
-+		FN_D6, 0,
-+		/* IP0_5 [1] */
-+		FN_D5, 0,
-+		/* IP0_4 [1] */
-+		FN_D4, 0,
-+		/* IP0_3 [1] */
-+		FN_D3, 0,
-+		/* IP0_2 [1] */
-+		FN_D2, 0,
-+		/* IP0_1 [1] */
-+		FN_D1, 0,
-+		/* IP0_0 [1] */
-+		FN_D0, 0, }
-+	},
-+	{ PINMUX_CFG_REG_VAR("IPSR1", 0xE6060024, 32,
-+			     3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2) {
-+		/* IP1_31_29 [3] */
-+		FN_A18, FN_DREQ1, FN_SCIFA1_RXD_C, 0, FN_SCIFB1_RXD_C,
-+		0, 0, 0,
-+		/* IP1_28_26 [3] */
-+		FN_A17, FN_DACK2_B, 0, FN_SDA0_C,
-+		0, 0, 0, 0,
-+		/* IP1_25_23 [3] */
-+		FN_A16, FN_DREQ2_B, FN_FMCLK_C, 0, FN_SCIFA1_SCK_B,
-+		0, 0, 0,
-+		/* IP1_22_20 [3] */
-+		FN_A15, FN_BPFCLK_C,
-+		0, 0, 0, 0, 0, 0,
-+		/* IP1_19_17 [3] */
-+		FN_A14, FN_ATADIR0_N_C, FN_FMIN, FN_FMIN_C, FN_MSIOF1_SYNC_D,
-+		0, 0, 0,
-+		/* IP1_16_14 [3] */
-+		FN_A13, FN_ATAG0_N_C, FN_BPFCLK, FN_MSIOF1_SS1_D,
-+		0, 0, 0, 0,
-+		/* IP1_13_11 [3] */
-+		FN_A12, FN_FMCLK, FN_SDA3_D, FN_MSIOF1_SCK_D,
-+		0, 0, 0, 0,
-+		/* IP1_10_8 [3] */
-+		FN_A11, FN_MSIOF1_RXD, FN_SCL3_D, FN_MSIOF1_RXD_D,
-+		0, 0, 0, 0,
-+		/* IP1_7_6 [2] */
-+		FN_A10, FN_MSIOF1_TXD, 0, FN_MSIOF1_TXD_D,
-+		/* IP1_5_4 [2] */
-+		FN_A9, FN_MSIOF1_SS2, FN_SDA0, 0,
-+		/* IP1_3_2 [2] */
-+		FN_A8, FN_MSIOF1_SS1, FN_SCL0, 0,
-+		/* IP1_1_0 [2] */
-+		FN_A7, FN_MSIOF1_SYNC,
-+		0, 0, }
-+	},
-+	{ PINMUX_CFG_REG_VAR("IPSR2", 0xE6060028, 32,
-+			     2, 3, 2, 2, 2, 2, 3, 3, 3, 3, 2, 2, 3) {
-+		/* IP2_31_20 [2] */
-+		0, 0, 0, 0,
-+		/* IP2_29_27 [3] */
-+		FN_EX_CS3_N, FN_ATADIR0_N, FN_MSIOF2_TXD,
-+		FN_ATAG0_N, 0, FN_EX_WAIT1,
-+		0, 0,
-+		/* IP2_26_25 [2] */
-+		FN_EX_CS2_N, FN_ATAWR0_N, FN_MSIOF2_SYNC, 0,
-+		/* IP2_24_23 [2] */
-+		FN_EX_CS1_N, FN_MSIOF2_SCK, 0, 0,
-+		/* IP2_22_21 [2] */
-+		FN_CS1_N_A26, FN_ATADIR0_N_B, FN_SDA1, 0,
-+		/* IP2_20_19 [2] */
-+		FN_CS0_N, FN_ATAG0_N_B, FN_SCL1, 0,
-+		/* IP2_18_16 [3] */
-+		FN_A25, FN_DACK2, FN_SSL, FN_DREQ1_C, FN_RX1, FN_SCIFA1_RXD,
-+		0, 0,
-+		/* IP2_15_13 [3] */
-+		FN_A24, FN_DREQ2, FN_IO3, FN_TX1, FN_SCIFA1_TXD,
-+		0, 0, 0,
-+		/* IP2_12_0 [3] */
-+		FN_A23, FN_IO2, FN_BPFCLK_B, FN_RX0, FN_SCIFA0_RXD,
-+		0, 0, 0,
-+		/* IP2_9_7 [3] */
-+		FN_A22, FN_MISO_IO1, FN_FMCLK_B, FN_TX0, FN_SCIFA0_TXD,
-+		0, 0, 0,
-+		/* IP2_6_5 [2] */
-+		FN_A21, FN_ATAWR0_N_B, FN_MOSI_IO0, 0,
-+		/* IP2_4_3 [2] */
-+		FN_A20, FN_SPCLK, 0, 0,
-+		/* IP2_2_0 [3] */
-+		FN_A19, FN_DACK1, FN_SCIFA1_TXD_C, 0,
-+		FN_SCIFB1_TXD_C, 0, FN_SCIFB1_SCK_B, 0, }
-+	},
-+	{ PINMUX_CFG_REG_VAR("IPSR3", 0xE606002C, 32,
-+			     1, 3, 3, 3, 2, 2, 2, 2, 2, 3, 3, 3, 3) {
-+		/* IP3_31 [1] */
-+		0, 0,
-+		/* IP3_30_28 [3] */
-+		FN_SSI_WS0129, FN_HTX0_C, FN_HTX2_C,
-+		FN_SCIFB0_TXD_C, FN_SCIFB2_TXD_C,
-+		0, 0, 0,
-+		/* IP3_27_25 [3] */
-+		FN_SSI_SCK0129, FN_HRX0_C, FN_HRX2_C,
-+		FN_SCIFB0_RXD_C, FN_SCIFB2_RXD_C,
-+		0, 0, 0,
-+		/* IP3_24_22 [3] */
-+		FN_SPEEDIN, 0, FN_HSCK0_C, FN_HSCK2_C, FN_SCIFB0_SCK_B,
-+		FN_SCIFB2_SCK_B, FN_DREQ2_C, FN_HTX2_D,
-+		/* IP3_21_20 [2] */
-+		FN_DACK0, FN_DRACK0, FN_REMOCON, 0,
-+		/* IP3_19_18 [2] */
-+		FN_DREQ0, FN_PWM3, FN_TPU_TO3, 0,
-+		/* IP3_17_16 [2] */
-+		FN_EX_WAIT0, FN_HRTS2_N_B, FN_SCIFB0_CTS_N_B, 0,
-+		/* IP3_15_14 [2] */
-+		FN_WE1_N, FN_ATARD0_N_B, FN_HTX2_B, FN_SCIFB0_RTS_N_B,
-+		/* IP3_13_12 [2] */
-+		FN_WE0_N, FN_HCTS2_N_B, FN_SCIFB0_TXD_B, 0,
-+		/* IP3_11_9 [3] */
-+		FN_RD_WR_N, FN_HRX2_B, FN_FMIN_B, FN_SCIFB0_RXD_B, FN_DREQ1_D,
-+		0, 0, 0,
-+		/* IP3_8_6 [3] */
-+		FN_BS_N, FN_ATACS10_N, FN_MSIOF2_SS2, FN_HTX1_B,
-+		FN_SCIFB1_TXD_B, FN_PWM2, FN_TPU_TO2, 0,
-+		/* IP3_5_3 [3] */
-+		FN_EX_CS5_N, FN_ATACS00_N, FN_MSIOF2_SS1, FN_HRX1_B,
-+		FN_SCIFB1_RXD_B, FN_PWM1, FN_TPU_TO1, 0,
-+		/* IP3_2_0 [3] */
-+		FN_EX_CS4_N, FN_ATARD0_N, FN_MSIOF2_RXD, 0, FN_EX_WAIT2,
-+		0, 0, 0, }
-+	},
-+	{ PINMUX_CFG_REG_VAR("IPSR4", 0xE6060030, 32,
-+			     1, 3, 2, 2, 2, 1, 1, 1, 3, 3, 3, 2, 3, 3, 2) {
-+		/* IP4_31 [1] */
-+		0, 0,
-+		/* IP4_30_28 [3] */
-+		FN_SSI_SCK5, FN_MSIOF1_SCK_C, FN_TS_SDATA0, FN_GLO_I0,
-+		FN_MSIOF2_SYNC_D, FN_VI1_R2_B,
-+		0, 0,
-+		/* IP4_27_26 [2] */
-+		FN_SSI_SDATA4, FN_MSIOF2_SCK_D, 0, 0,
-+		/* IP4_25_24 [2] */
-+		FN_SSI_WS4, FN_GLO_RFON_D, 0, 0,
-+		/* IP4_23_22 [2] */
-+		FN_SSI_SCK4, FN_GLO_SS_D, 0, 0,
-+		/* IP4_21 [1] */
-+		FN_SSI_SDATA3, 0,
-+		/* IP4_20 [1] */
-+		FN_SSI_WS34, 0,
-+		/* IP4_19 [1] */
-+		FN_SSI_SCK34, 0,
-+		/* IP4_18_16 [3] */
-+		FN_SSI_SDATA2, FN_GPS_MAG_B, FN_TX2_E, FN_HRTS1_N_E,
-+		0, 0, 0, 0,
-+		/* IP4_15_13 [3] */
-+		FN_SSI_WS2, FN_SDA2, FN_GPS_SIGN_B, FN_RX2_E,
-+		FN_GLO_Q1_D, FN_HCTS1_N_E,
-+		0, 0,
-+		/* IP4_12_10 [3] */
-+		FN_SSI_SCK2, FN_SCL2, FN_GPS_CLK_B, FN_GLO_Q0_D, FN_HSCK1_E,
-+		0, 0, 0,
-+		/* IP4_9_8 [2] */
-+		FN_SSI_SDATA1, FN_SDA1_B, FN_SDA8_B, FN_MSIOF2_RXD_C,
-+		/* IP4_7_5 [3] */
-+		FN_SSI_WS1, FN_SCL1_B, FN_SCL8_B, FN_MSIOF2_TXD_C, FN_GLO_I1_D,
-+		0, 0, 0,
-+		/* IP4_4_2 [3] */
-+		FN_SSI_SCK1, FN_SDA0_B, FN_SDA7_B,
-+		FN_MSIOF2_SYNC_C, FN_GLO_I0_D,
-+		0, 0, 0,
-+		/* IP4_1_0 [2] */
-+		FN_SSI_SDATA0, FN_SCL0_B, FN_SCL7_B, FN_MSIOF2_SCK_C, }
-+	},
-+	{ PINMUX_CFG_REG_VAR("IPSR5", 0xE6060034, 32,
-+			     3, 3, 2, 2, 2, 3, 2, 3, 3, 3, 3, 3) {
-+		/* IP5_31_29 [3] */
-+		FN_SSI_SDATA9, FN_RX3_D, FN_CAN0_RX_D,
-+		0, 0, 0, 0, 0,
-+		/* IP5_28_26 [3] */
-+		FN_SSI_WS9, FN_TX3_D, FN_CAN0_TX_D, FN_GLO_SDATA_D,
-+		0, 0, 0, 0,
-+		/* IP5_25_24 [2] */
-+		FN_SSI_SCK9, FN_RX1_D, FN_GLO_SCLK_D, 0,
-+		/* IP5_23_22 [2] */
-+		FN_SSI_SDATA8, FN_TX1_D, FN_STP_ISSYNC_0_B, 0,
-+		/* IP5_21_20 [2] */
-+		FN_SSI_SDATA7, FN_RX0_D, FN_STP_ISEN_0_B, 0,
-+		/* IP5_19_17 [3] */
-+		FN_SSI_WS78, FN_TX0_D, FN_STP_ISD_0_B, FN_GLO_RFON,
-+		0, 0, 0, 0,
-+		/* IP5_16_15 [2] */
-+		FN_SSI_SCK78, FN_STP_ISCLK_0_B, FN_GLO_SS, 0,
-+		/* IP5_14_12 [3] */
-+		FN_SSI_SDATA6, FN_STP_IVCXO27_0_B, FN_GLO_SDATA, FN_VI1_R7_B,
-+		0, 0, 0, 0,
-+		/* IP5_11_9 [3] */
-+		FN_SSI_WS6, FN_GLO_SCLK, FN_MSIOF2_SS2_D, FN_VI1_R6_B,
-+		0, 0, 0, 0,
-+		/* IP5_8_6 [3] */
-+		FN_SSI_SCK6, FN_MSIOF1_RXD_C, FN_TS_SPSYNC0, FN_GLO_Q1,
-+		FN_MSIOF2_RXD_D, FN_VI1_R5_B,
-+		0, 0,
-+		/* IP5_5_3 [3] */
-+		FN_SSI_SDATA5, FN_MSIOF1_TXD_C, FN_TS_SDEN0, FN_GLO_Q0,
-+		FN_MSIOF2_SS1_D, FN_VI1_R4_B,
-+		0, 0,
-+		/* IP5_2_0 [3] */
-+		FN_SSI_WS5, FN_MSIOF1_SYNC_C, FN_TS_SCK0, FN_GLO_I1,
-+		FN_MSIOF2_TXD_D, FN_VI1_R3_B,
-+		0, 0, }
-+	},
-+	{ PINMUX_CFG_REG_VAR("IPSR6", 0xE6060038, 32,
-+			     2, 3, 3, 3, 2, 3, 2, 2, 2, 2, 2, 3, 3) {
-+		/* IP6_31_30 [2] */
-+		0, 0, 0, 0,
-+		/* IP6_29_27 [3] */
-+		FN_IRQ8, FN_HRTS1_N_C, FN_MSIOF1_RXD_B,
-+		FN_GPS_SIGN_C, FN_GPS_SIGN_D,
-+		0, 0, 0,
-+		/* IP6_26_24 [3] */
-+		FN_IRQ7, FN_HCTS1_N_C, FN_MSIOF1_TXD_B,
-+		FN_GPS_CLK_C, FN_GPS_CLK_D,
-+		0, 0, 0,
-+		/* IP6_23_21 [3] */
-+		FN_IRQ6, FN_HSCK1_C, FN_MSIOF1_SS2_B,
-+		FN_SDA1_E, FN_MSIOF2_SYNC_E,
-+		0, 0, 0,
-+		/* IP6_20_19 [2] */
-+		FN_IRQ5, FN_HTX1_C, FN_SCL1_E, FN_MSIOF2_SCK_E,
-+		/* IP6_18_16 [3] */
-+		FN_IRQ4, FN_HRX1_C, FN_SDA4_C, FN_MSIOF2_RXD_E, FN_INTC_IRQ4_N,
-+		0, 0, 0,
-+		/* IP6_15_14 [2] */
-+		FN_IRQ3, FN_SCL4_C, FN_MSIOF2_TXD_E, FN_INTC_IRQ3_N,
-+		/* IP6_13_12 [2] */
-+		FN_IRQ2, FN_SCIFB1_TXD_D, FN_INTC_IRQ2_N, 0,
-+		/* IP6_11_10 [2] */
-+		FN_IRQ1, FN_SCIFB1_SCK_C, FN_INTC_IRQ1_N, 0,
-+		/* IP6_9_8 [2] */
-+		FN_IRQ0, FN_SCIFB1_RXD_D, FN_INTC_IRQ0_N, 0,
-+		/* IP6_7_6 [2] */
-+		FN_AUDIO_CLKOUT, FN_MSIOF1_SS1_B, FN_TX2, FN_SCIFA2_TXD,
-+		/* IP6_5_3 [3] */
-+		FN_AUDIO_CLKC, FN_SCIFB0_SCK_C, FN_MSIOF1_SYNC_B, FN_RX2,
-+		FN_SCIFA2_RXD, FN_FMIN_E,
-+		0, 0,
-+		/* IP6_2_0 [3] */
-+		FN_AUDIO_CLKB, FN_STP_OPWM_0_B, FN_MSIOF1_SCK_B,
-+		FN_SCIF_CLK, 0, FN_BPFCLK_E,
-+		0, 0, }
-+	},
-+	{ PINMUX_CFG_REG_VAR("IPSR7", 0xE606003C, 32,
-+			     2, 3, 3, 3, 2, 2, 2, 2, 2, 2, 3, 3, 3) {
-+		/* IP7_31_30 [2] */
-+		0, 0, 0, 0,
-+		/* IP7_29_27 [3] */
-+		FN_DU1_DG2, FN_LCDOUT10, FN_VI1_DATA4_B, FN_SCIF1_SCK_B,
-+		FN_SCIFA1_SCK, FN_SSI_SCK78_B,
-+		0, 0,
-+		/* IP7_26_24 [3] */
-+		FN_DU1_DG1, FN_LCDOUT9, FN_VI1_DATA3_B, FN_RX1_B,
-+		FN_SCIFA1_RXD_B, FN_MSIOF2_SS2_B,
-+		0, 0,
-+		/* IP7_23_21 [3] */
-+		FN_DU1_DG0, FN_LCDOUT8, FN_VI1_DATA2_B, FN_TX1_B,
-+		FN_SCIFA1_TXD_B, FN_MSIOF2_SS1_B,
-+		0, 0,
-+		/* IP7_20_19 [2] */
-+		FN_DU1_DR7, FN_LCDOUT7, FN_SSI_SDATA1_B, 0,
-+		/* IP7_18_17 [2] */
-+		FN_DU1_DR6, FN_LCDOUT6, FN_SSI_WS1_B, 0,
-+		/* IP7_16_15 [2] */
-+		FN_DU1_DR5, FN_LCDOUT5, FN_SSI_SCK1_B, 0,
-+		/* IP7_14_13 [2] */
-+		FN_DU1_DR4, FN_LCDOUT4, FN_SSI_SDATA0_B, 0,
-+		/* IP7_12_11 [2] */
-+		FN_DU1_DR3, FN_LCDOUT3, FN_SSI_WS0129_B, 0,
-+		/* IP7_10_9 [2] */
-+		FN_DU1_DR2, FN_LCDOUT2, FN_SSI_SCK0129_B, 0,
-+		/* IP7_8_6 [3] */
-+		FN_DU1_DR1, FN_LCDOUT1, FN_VI1_DATA1_B, FN_RX0_B,
-+		FN_SCIFA0_RXD_B, FN_MSIOF2_SYNC_B,
-+		0, 0,
-+		/* IP7_5_3 [3] */
-+		FN_DU1_DR0, FN_LCDOUT0, FN_VI1_DATA0_B, FN_TX0_B,
-+		FN_SCIFA0_TXD_B, FN_MSIOF2_SCK_B,
-+		0, 0,
-+		/* IP7_2_0 [3] */
-+		FN_IRQ9, FN_DU1_DOTCLKIN_B, FN_CAN_CLK_D, FN_GPS_MAG_C,
-+		FN_SCIF_CLK_B, FN_GPS_MAG_D,
-+		0, 0, }
-+	},
-+	{ PINMUX_CFG_REG_VAR("IPSR8", 0xE6060040, 32,
-+			     1, 3, 2, 2, 3, 3, 3, 3, 3, 3, 3, 3) {
-+		/* IP8_31 [1] */
-+		0, 0,
-+		/* IP8_30_28 [3] */
-+		FN_DU1_DB5, FN_LCDOUT21, FN_TX3, FN_SCIFA3_TXD, FN_CAN1_TX,
-+		0, 0, 0,
-+		/* IP8_27_26 [2] */
-+		FN_DU1_DB4, FN_LCDOUT20, FN_VI1_FIELD_B, FN_CAN1_RX,
-+		/* IP8_25_24 [2] */
-+		FN_DU1_DB3, FN_LCDOUT19, FN_VI1_CLKENB_B, 0,
-+		/* IP8_23_21 [3] */
-+		FN_DU1_DB2, FN_LCDOUT18, FN_VI1_VSYNC_N_B, FN_SCIF2_SCK_B,
-+		FN_SCIFA2_SCK, FN_SSI_SDATA9_B,
-+		0, 0,
-+		/* IP8_20_18 [3] */
-+		FN_DU1_DB1, FN_LCDOUT17, FN_VI1_HSYNC_N_B, FN_RX2_B,
-+		FN_SCIFA2_RXD_B, FN_MSIOF2_RXD_B,
-+		0, 0,
-+		/* IP8_17_15 [3] */
-+		FN_DU1_DB0, FN_LCDOUT16, FN_VI1_CLK_B, FN_TX2_B,
-+		FN_SCIFA2_TXD_B, FN_MSIOF2_TXD_B,
-+		0, 0,
-+		/* IP8_14_12 [3] */
-+		FN_DU1_DG7, FN_LCDOUT15, FN_HTX0_B,
-+		FN_SCIFB2_RTS_N_B, FN_SSI_WS9_B,
-+		0, 0, 0,
-+		/* IP8_11_9 [3] */
-+		FN_DU1_DG6, FN_LCDOUT14, FN_HRTS0_N_B,
-+		FN_SCIFB2_CTS_N_B, FN_SSI_SCK9_B,
-+		0, 0, 0,
-+		/* IP8_8_6 [3] */
-+		FN_DU1_DG5, FN_LCDOUT13, FN_VI1_DATA7_B, FN_HCTS0_N_B,
-+		FN_SCIFB2_TXD_B, FN_SSI_SDATA8_B,
-+		0, 0,
-+		/* IP8_5_3 [3] */
-+		FN_DU1_DG4, FN_LCDOUT12, FN_VI1_DATA6_B, FN_HRX0_B,
-+		FN_SCIFB2_RXD_B, FN_SSI_SDATA7_B,
-+		0, 0,
-+		/* IP8_2_0 [3] */
-+		FN_DU1_DG3, FN_LCDOUT11, FN_VI1_DATA5_B, 0, FN_SSI_WS78_B,
-+		0, 0, 0, }
-+	},
-+	{ PINMUX_CFG_REG_VAR("IPSR9", 0xE6060044, 32,
-+			     3, 2, 2, 2, 2, 2, 2, 1, 3, 1, 1, 3, 1, 1, 3, 3) {
-+		/* IP9_31_29 [3] */
-+		FN_VI0_G0, FN_SCL8, FN_STP_IVCXO27_0_C, FN_SCL4,
-+		FN_HCTS2_N, FN_SCIFB2_CTS_N, FN_ATAWR1_N, 0,
-+		/* IP9_28_27 [2] */
-+		FN_VI0_DATA3_VI0_B3, FN_SCIF3_SCK_B, FN_SCIFA3_SCK_B, 0,
-+		/* IP9_26_25 [2] */
-+		FN_VI0_VSYNC_N, FN_RX5, FN_SCIFA5_RXD, FN_TS_SPSYNC0_D,
-+		/* IP9_24_23 [2] */
-+		FN_VI0_HSYNC_N, FN_TX5, FN_SCIFA5_TXD, FN_TS_SDEN0_D,
-+		/* IP9_22_21 [2] */
-+		FN_VI0_FIELD, FN_RX4, FN_SCIFA4_RXD, FN_TS_SCK0_D,
-+		/* IP9_20_19 [2] */
-+		FN_VI0_CLKENB, FN_TX4, FN_SCIFA4_TXD, FN_TS_SDATA0_D,
-+		/* IP9_18_17 [2] */
-+		FN_DU1_CDE, FN_QPOLB, FN_PWM4_B, 0,
-+		/* IP9_16 [1] */
-+		FN_DU1_DISP, FN_QPOLA,
-+		/* IP9_15_13 [3] */
-+		FN_DU1_EXODDF_DU1_ODDF_DISP_CDE, FN_QCPV_QDE,
-+		FN_CAN0_RX, FN_RX3_B, FN_SDA2_B,
-+		0, 0, 0,
-+		/* IP9_12 [1] */
-+		FN_DU1_EXVSYNC_DU1_VSYNC, FN_QSTB_QHE,
-+		/* IP9_11 [1] */
-+		FN_DU1_EXHSYNC_DU1_HSYNC, FN_QSTH_QHS,
-+		/* IP9_10_8 [3] */
-+		FN_DU1_DOTCLKOUT1, FN_QSTVB_QVE, FN_CAN0_TX,
-+		FN_TX3_B, FN_SCL2_B, FN_PWM4,
-+		0, 0,
-+		/* IP9_7 [1] */
-+		FN_DU1_DOTCLKOUT0, FN_QCLK,
-+		/* IP9_6 [1] */
-+		FN_DU1_DOTCLKIN, FN_QSTVA_QVS,
-+		/* IP9_5_3 [3] */
-+		FN_DU1_DB7, FN_LCDOUT23, FN_SDA3_C,
-+		FN_SCIF3_SCK, FN_SCIFA3_SCK,
-+		0, 0, 0,
-+		/* IP9_2_0 [3] */
-+		FN_DU1_DB6, FN_LCDOUT22, FN_SCL3_C, FN_RX3, FN_SCIFA3_RXD,
-+		0, 0, 0, }
-+	},
-+	{ PINMUX_CFG_REG_VAR("IPSR10", 0xE6060048, 32,
-+			     3, 2, 2, 3, 3, 2, 2, 3, 3, 3, 3, 3) {
-+		/* IP10_31_29 [3] */
-+		FN_VI0_R4, FN_VI2_DATA5, FN_GLO_SCLK_B, FN_TX0_C, FN_SCL1_D,
-+		0, 0, 0,
-+		/* IP10_28_27 [2] */
-+		FN_VI0_R3, FN_VI2_DATA4, FN_GLO_Q1_B, FN_TS_SPSYNC0_C,
-+		/* IP10_26_25 [2] */
-+		FN_VI0_R2, FN_VI2_DATA3, FN_GLO_Q0_B, FN_TS_SDEN0_C,
-+		/* IP10_24_22 [3] */
-+		FN_VI0_R1, FN_VI2_DATA2, FN_GLO_I1_B, FN_TS_SCK0_C, FN_ATAG1_N,
-+		0, 0, 0,
-+		/* IP10_21_29 [3] */
-+		FN_VI0_R0, FN_VI2_DATA1, FN_GLO_I0_B,
-+		FN_TS_SDATA0_C, FN_ATACS11_N,
-+		0, 0, 0,
-+		/* IP10_18_17 [2] */
-+		FN_VI0_G7, FN_VI2_DATA0, FN_FMIN_D, 0,
-+		/* IP10_16_15 [2] */
-+		FN_VI0_G6, FN_VI2_CLK, FN_BPFCLK_D, 0,
-+		/* IP10_14_12 [3] */
-+		FN_VI0_G5, FN_VI2_FIELD, FN_STP_OPWM_0_C, FN_FMCLK_D,
-+		FN_CAN0_TX_E, FN_HTX1_D, FN_SCIFB0_TXD_D, 0,
-+		/* IP10_11_9 [3] */
-+		FN_VI0_G4, FN_VI2_CLKENB, FN_STP_ISSYNC_0_C,
-+		FN_HTX2, FN_SCIFB2_TXD, FN_SCIFB0_SCK_D,
-+		0, 0,
-+		/* IP10_8_6 [3] */
-+		FN_VI0_G3, FN_VI2_VSYNC_N, FN_STP_ISEN_0_C, FN_SDA3_B,
-+		FN_HRX2, FN_SCIFB2_RXD, FN_ATACS01_N, 0,
-+		/* IP10_5_3 [3] */
-+		FN_VI0_G2, FN_VI2_HSYNC_N, FN_STP_ISD_0_C, FN_SCL3_B,
-+		FN_HSCK2, FN_SCIFB2_SCK, FN_ATARD1_N, 0,
-+		/* IP10_2_0 [3] */
-+		FN_VI0_G1, FN_SDA8, FN_STP_ISCLK_0_C, FN_SDA4,
-+		FN_HRTS2_N, FN_SCIFB2_RTS_N, FN_ATADIR1_N, 0, }
-+	},
-+	{ PINMUX_CFG_REG_VAR("IPSR11", 0xE606004C, 32,
-+			     2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 2, 2,
-+			     3, 3, 3, 3, 3) {
-+		/* IP11_31_30 [2] */
-+		FN_ETH_CRS_DV, FN_AVB_LINK, FN_SDA2_C, 0,
-+		/* IP11_29_28 [2] */
-+		FN_ETH_MDIO, FN_AVB_RX_CLK, FN_SCL2_C, 0,
-+		/* IP11_27 [1] */
-+		FN_VI1_DATA7, FN_AVB_MDC,
-+		/* IP11_26 [1] */
-+		FN_VI1_DATA6, FN_AVB_MAGIC,
-+		/* IP11_25 [1] */
-+		FN_VI1_DATA5, FN_AVB_RX_DV,
-+		/* IP11_24 [1] */
-+		FN_VI1_DATA4, FN_AVB_MDIO,
-+		/* IP11_23 [1] */
-+		FN_VI1_DATA3, FN_AVB_RX_ER,
-+		/* IP11_22 [1] */
-+		FN_VI1_DATA2, FN_AVB_RXD7,
-+		/* IP11_21 [1] */
-+		FN_VI1_DATA1, FN_AVB_RXD6,
-+		/* IP11_20 [1] */
-+		FN_VI1_DATA0, FN_AVB_RXD5,
-+		/* IP11_19 [1] */
-+		FN_VI1_CLK, FN_AVB_RXD4,
-+		/* IP11_18_17 [2] */
-+		FN_VI1_FIELD, FN_AVB_RXD3, FN_TS_SPSYNC0_B, 0,
-+		/* IP11_16_15 [2] */
-+		FN_VI1_CLKENB, FN_AVB_RXD2, FN_TS_SDEN0_B, 0,
-+		/* IP11_14_12 [3] */
-+		FN_VI1_VSYNC_N, FN_AVB_RXD1, FN_TS_SCK0_B,
-+		FN_RX4_B, FN_SCIFA4_RXD_B,
-+		0, 0, 0,
-+		/* IP11_11_9 [3] */
-+		FN_VI1_HSYNC_N, FN_AVB_RXD0, FN_TS_SDATA0_B,
-+		FN_TX4_B, FN_SCIFA4_TXD_B,
-+		0, 0, 0,
-+		/* IP11_8_6 [3] */
-+		FN_VI0_R7, FN_GLO_RFON_B, FN_RX1_C, FN_CAN0_RX_E,
-+		FN_SDA4_B, FN_HRX1_D, FN_SCIFB0_RXD_D, 0,
-+		/* IP11_5_3 [3] */
-+		FN_VI0_R6, FN_VI2_DATA7, FN_GLO_SS_B, FN_TX1_C, FN_SCL4_B,
-+		0, 0, 0,
-+		/* IP11_2_0 [3] */
-+		FN_VI0_R5, FN_VI2_DATA6, FN_GLO_SDATA_B, FN_RX0_C, FN_SDA1_D,
-+		0, 0, 0, }
-+	},
-+	{ PINMUX_CFG_REG_VAR("IPSR12", 0xE6060050, 32,
-+			     2, 3, 3, 2, 2, 2, 2, 3, 3, 3, 3, 2, 2) {
-+		/* IP12_31_30 [2] */
-+		0, 0, 0, 0,
-+		/* IP12_29_27 [3] */
-+		FN_STP_ISCLK_0, FN_AVB_TX_EN, FN_SCIFB2_RXD_D,
-+		FN_ADICS_SAMP_B, FN_MSIOF0_SCK_C,
-+		0, 0, 0,
-+		/* IP12_26_24 [3] */
-+		FN_STP_IVCXO27_0, FN_AVB_TXD7, FN_SCIFB2_TXD_D,
-+		FN_ADIDATA_B, FN_MSIOF0_SYNC_C,
-+		0, 0, 0,
-+		/* IP12_23_22 [2] */
-+		FN_ETH_MDC, FN_AVB_TXD6, FN_IERX_C, 0,
-+		/* IP12_21_20 [2] */
-+		FN_ETH_TXD0, FN_AVB_TXD5, FN_IECLK_C, 0,
-+		/* IP12_19_18 [2] */
-+		FN_ETH_MAGIC, FN_AVB_TXD4, FN_IETX_C, 0,
-+		/* IP12_17_16 [2] */
-+		FN_ETH_TX_EN, FN_AVB_TXD3, FN_TCLK1_B, FN_CAN_CLK_B,
-+		/* IP12_15_13 [3] */
-+		FN_ETH_TXD1, FN_AVB_TXD2, FN_SCIFA3_TXD_B,
-+		FN_CAN1_TX_C, FN_MSIOF1_TXD_E,
-+		0, 0, 0,
-+		/* IP12_12_10 [3] */
-+		FN_ETH_REFCLK, FN_AVB_TXD1, FN_SCIFA3_RXD_B,
-+		FN_CAN1_RX_C, FN_MSIOF1_SYNC_E,
-+		0, 0, 0,
-+		/* IP12_9_7 [3] */
-+		FN_ETH_LINK, FN_AVB_TXD0, FN_CAN0_RX_C,
-+		FN_SDA2_D, FN_MSIOF1_SCK_E,
-+		0, 0, 0,
-+		/* IP12_6_4 [3] */
-+		FN_ETH_RXD1, FN_AVB_GTXREFCLK, FN_CAN0_TX_C,
-+		FN_SCL2_D, FN_MSIOF1_RXD_E,
-+		0, 0, 0,
-+		/* IP12_3_2 [2] */
-+		FN_ETH_RXD0, FN_AVB_PHY_INT, FN_SDA3, FN_SDA7,
-+		/* IP12_1_0 [2] */
-+		FN_ETH_RX_ER, FN_AVB_CRS, FN_SCL3, FN_SCL7, }
-+	},
-+	{ PINMUX_CFG_REG_VAR("IPSR13", 0xE6060054, 32,
-+			     1, 3, 1, 1, 1, 2, 1, 3, 3, 1, 1, 1, 1, 1, 1,
-+			     3, 2, 2, 3) {
-+		/* IP13_31 [1] */
-+		0, 0,
-+		/* IP13_30_28 [3] */
-+		FN_SD1_CD, FN_PWM0, FN_TPU_TO0, FN_SCL1_C,
-+		0, 0, 0, 0,
-+		/* IP13_27 [1] */
-+		FN_SD1_DATA3, FN_IERX_B,
-+		/* IP13_26 [1] */
-+		FN_SD1_DATA2, FN_IECLK_B,
-+		/* IP13_25 [1] */
-+		FN_SD1_DATA1, FN_IETX_B,
-+		/* IP13_24_23 [2] */
-+		FN_SD1_DATA0, FN_SPEEDIN_B, 0, 0,
-+		/* IP13_22 [1] */
-+		FN_SD1_CMD, FN_REMOCON_B,
-+		/* IP13_21_19 [3] */
-+		FN_SD0_WP, FN_MMC_D7_B, FN_SIM0_D_B, FN_CAN0_TX_F,
-+		FN_SCIFA5_RXD_B, FN_RX3_C,
-+		0, 0,
-+		/* IP13_18_16 [3] */
-+		FN_SD0_CD, FN_MMC_D6_B, FN_SIM0_RST_B, FN_CAN0_RX_F,
-+		FN_SCIFA5_TXD_B, FN_TX3_C,
-+		0, 0,
-+		/* IP13_15 [1] */
-+		FN_SD0_DATA3, FN_SSL_B,
-+		/* IP13_14 [1] */
-+		FN_SD0_DATA2, FN_IO3_B,
-+		/* IP13_13 [1] */
-+		FN_SD0_DATA1, FN_IO2_B,
-+		/* IP13_12 [1] */
-+		FN_SD0_DATA0, FN_MISO_IO1_B,
-+		/* IP13_11 [1] */
-+		FN_SD0_CMD, FN_MOSI_IO0_B,
-+		/* IP13_10 [1] */
-+		FN_SD0_CLK, FN_SPCLK_B,
-+		/* IP13_9_7 [3] */
-+		FN_STP_OPWM_0, FN_AVB_GTX_CLK, FN_PWM0_B,
-+		FN_ADICHS2_B, FN_MSIOF0_TXD_C,
-+		0, 0, 0,
-+		/* IP13_6_5 [2] */
-+		FN_STP_ISSYNC_0, FN_AVB_COL, FN_ADICHS1_B, FN_MSIOF0_RXD_C,
-+		/* IP13_4_3 [2] */
-+		FN_STP_ISEN_0, FN_AVB_TX_CLK, FN_ADICHS0_B, FN_MSIOF0_SS2_C,
-+		/* IP13_2_0 [3] */
-+		FN_STP_ISD_0, FN_AVB_TX_ER, FN_SCIFB2_SCK_C,
-+		FN_ADICLK_B, FN_MSIOF0_SS1_C,
-+		0, 0, 0, }
-+	},
-+	{ PINMUX_CFG_REG_VAR("IPSR14", 0xE6060058, 32,
-+			     3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 2) {
-+		/* IP14_31_29 [3] */
-+		FN_MSIOF0_SS2, FN_MMC_D7, FN_ADICHS2, FN_RX0_E,
-+		FN_VI1_VSYNC_N_C, FN_SDA7_C, FN_VI1_G5_B, 0,
-+		/* IP14_28_26 [3] */
-+		FN_MSIOF0_SS1, FN_MMC_D6, FN_ADICHS1, FN_TX0_E,
-+		FN_VI1_HSYNC_N_C, FN_SCL7_C, FN_VI1_G4_B, 0,
-+		/* IP14_25_23 [3] */
-+		FN_MSIOF0_RXD, FN_ADICHS0, 0, FN_VI1_DATA0_C, FN_VI1_G3_B,
-+		0, 0, 0,
-+		/* IP14_22_20 [3] */
-+		FN_MSIOF0_TXD, FN_ADICLK, 0, FN_VI1_FIELD_C, FN_VI1_G2_B,
-+		0, 0, 0,
-+		/* IP14_19_17 [3] */
-+		FN_MSIOF0_SYNC, FN_TX2_C, FN_ADICS_SAMP, 0,
-+		FN_VI1_CLKENB_C, FN_VI1_G1_B,
-+		0, 0,
-+		/* IP14_16_14 [3] */
-+		FN_MSIOF0_SCK, FN_RX2_C, FN_ADIDATA, 0,
-+		FN_VI1_CLK_C, FN_VI1_G0_B,
-+		0, 0,
-+		/* IP14_13_11 [3] */
-+		FN_SD2_WP, FN_MMC_D5, FN_SDA8_C, FN_RX5_B, FN_SCIFA5_RXD_C,
-+		0, 0, 0,
-+		/* IP14_10_8 [3] */
-+		FN_SD2_CD, FN_MMC_D4, FN_SCL8_C, FN_TX5_B, FN_SCIFA5_TXD_C,
-+		0, 0, 0,
-+		/* IP14_7 [1] */
-+		FN_SD2_DATA3, FN_MMC_D3,
-+		/* IP14_6 [1] */
-+		FN_SD2_DATA2, FN_MMC_D2,
-+		/* IP14_5 [1] */
-+		FN_SD2_DATA1, FN_MMC_D1,
-+		/* IP14_4 [1] */
-+		FN_SD2_DATA0, FN_MMC_D0,
-+		/* IP14_3 [1] */
-+		FN_SD2_CMD, FN_MMC_CMD,
-+		/* IP14_2 [1] */
-+		FN_SD2_CLK, FN_MMC_CLK,
-+		/* IP14_1_0 [2] */
-+		FN_SD1_WP, FN_PWM1_B, FN_SDA1_C, 0, }
-+	},
-+	{ PINMUX_CFG_REG_VAR("IPSR15", 0xE606005C, 32,
-+			     2, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2) {
-+		/* IP15_31_30 [2] */
-+		0, 0, 0, 0,
-+		/* IP15_29_27 [3] */
-+		FN_HTX0, FN_SCIFB0_TXD, 0, FN_GLO_SCLK_C,
-+		FN_CAN0_TX_B, FN_VI1_DATA5_C,
-+		0, 0,
-+		/* IP15_26_24 [3] */
-+		FN_HRX0, FN_SCIFB0_RXD, 0, FN_GLO_Q1_C,
-+		FN_CAN0_RX_B, FN_VI1_DATA4_C,
-+		0, 0,
-+		/* IP15_23_21 [3] */
-+		FN_HSCK0, FN_SCIFB0_SCK, 0, FN_GLO_Q0_C, FN_CAN_CLK,
-+		FN_TCLK2, FN_VI1_DATA3_C, 0,
-+		/* IP15_20_18 [3] */
-+		FN_HRTS0_N, FN_SCIFB0_RTS_N, 0, FN_GLO_I1_C, FN_VI1_DATA2_C,
-+		0, 0, 0,
-+		/* IP15_17_15 [3] */
-+		FN_HCTS0_N, FN_SCIFB0_CTS_N, 0, FN_GLO_I0_C,
-+		FN_TCLK1, FN_VI1_DATA1_C,
-+		0, 0,
-+		/* IP15_14_12 [3] */
-+		FN_GPS_MAG, FN_RX4_C, FN_SCIFA4_RXD_C, FN_PWM6,
-+		FN_VI1_G7_B, FN_SCIFA3_SCK_C,
-+		0, 0,
-+		/* IP15_11_9 [3] */
-+		FN_GPS_SIGN, FN_TX4_C, FN_SCIFA4_TXD_C, FN_PWM5,
-+		FN_VI1_G6_B, FN_SCIFA3_RXD_C,
-+		0, 0,
-+		/* IP15_8_6 [3] */
-+		FN_GPS_CLK, FN_DU1_DOTCLKIN_C, FN_AUDIO_CLKB_B,
-+		FN_PWM5_B, FN_SCIFA3_TXD_C,
-+		0, 0, 0,
-+		/* IP15_5_4 [2] */
-+		FN_SIM0_D, FN_IERX, FN_CAN1_RX_D, 0,
-+		/* IP15_3_2 [2] */
-+		FN_SIM0_CLK, FN_IECLK, FN_CAN_CLK_C, 0,
-+		/* IP15_1_0 [2] */
-+		FN_SIM0_RST, FN_IETX, FN_CAN1_TX_D, 0, }
-+	},
-+	{ PINMUX_CFG_REG_VAR("IPSR16", 0xE6060160, 32,
-+			     4, 4, 4, 4, 4, 2, 2, 2, 3, 3) {
-+		/* IP16_31_28 [4] */
-+		0, 0, 0, 0, 0, 0, 0, 0,
-+		0, 0, 0, 0, 0, 0, 0, 0,
-+		/* IP16_27_24 [4] */
-+		0, 0, 0, 0, 0, 0, 0, 0,
-+		0, 0, 0, 0, 0, 0, 0, 0,
-+		/* IP16_23_20 [4] */
-+		0, 0, 0, 0, 0, 0, 0, 0,
-+		0, 0, 0, 0, 0, 0, 0, 0,
-+		/* IP16_19_16 [4] */
-+		0, 0, 0, 0, 0, 0, 0, 0,
-+		0, 0, 0, 0, 0, 0, 0, 0,
-+		/* IP16_15_12 [4] */
-+		0, 0, 0, 0, 0, 0, 0, 0,
-+		0, 0, 0, 0, 0, 0, 0, 0,
-+		/* IP16_11_10 [2] */
-+		FN_HRTS1_N, FN_SCIFB1_RTS_N, FN_MLB_DAT, FN_CAN1_RX_B,
-+		/* IP16_9_8 [2] */
-+		FN_HCTS1_N, FN_SCIFB1_CTS_N, FN_MLB_SIG, FN_CAN1_TX_B,
-+		/* IP16_7_6 [2] */
-+		FN_HSCK1, FN_SCIFB1_SCK, FN_MLB_CK, FN_GLO_RFON_C,
-+		/* IP16_5_3 [3] */
-+		FN_HTX1, FN_SCIFB1_TXD, FN_VI1_R1_B,
-+		FN_GLO_SS_C, FN_VI1_DATA7_C,
-+		0, 0, 0,
-+		/* IP16_2_0 [3] */
-+		FN_HRX1, FN_SCIFB1_RXD, FN_VI1_R0_B,
-+		FN_GLO_SDATA_C, FN_VI1_DATA6_C,
-+		0, 0, 0, }
-+	},
-+	{ PINMUX_CFG_REG_VAR("MOD_SEL", 0xE6060090, 32,
-+			     1, 2, 2, 2, 3, 2, 1, 1, 1, 1,
-+			     3, 2, 2, 2, 1, 2, 2, 2) {
-+		/* RESEVED [1] */
-+		0, 0,
-+		/* SEL_SCIF1 [2] */
-+		FN_SEL_SCIF1_0, FN_SEL_SCIF1_1, FN_SEL_SCIF1_2, FN_SEL_SCIF1_3,
-+		/* SEL_SCIFB [2] */
-+		FN_SEL_SCIFB_0, FN_SEL_SCIFB_1, FN_SEL_SCIFB_2, FN_SEL_SCIFB_3,
-+		/* SEL_SCIFB2 [2] */
-+		FN_SEL_SCIFB2_0, FN_SEL_SCIFB2_1,
-+		FN_SEL_SCIFB2_2, FN_SEL_SCIFB2_3,
-+		/* SEL_SCIFB1 [3] */
-+		FN_SEL_SCIFB1_0, FN_SEL_SCIFB1_1,
-+		FN_SEL_SCIFB1_2, FN_SEL_SCIFB1_3,
-+		0, 0, 0, 0,
-+		/* SEL_SCIFA1 [2] */
-+		FN_SEL_SCIFA1_0, FN_SEL_SCIFA1_1, FN_SEL_SCIFA1_2, 0,
-+		/* SEL_SSI9 [1] */
-+		FN_SEL_SSI9_0, FN_SEL_SSI9_1,
-+		/* SEL_SCFA [1] */
-+		FN_SEL_SCFA_0, FN_SEL_SCFA_1,
-+		/* SEL_QSP [1] */
-+		FN_SEL_QSP_0, FN_SEL_QSP_1,
-+		/* SEL_SSI7 [1] */
-+		FN_SEL_SSI7_0, FN_SEL_SSI7_1,
-+		/* SEL_HSCIF1 [3] */
-+		FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1, FN_SEL_HSCIF1_2,
-+		FN_SEL_HSCIF1_3, FN_SEL_HSCIF1_4,
-+		0, 0, 0,
-+		/* RESEVED [2] */
-+		0, 0, 0, 0,
-+		/* SEL_VI1 [2] */
-+		FN_SEL_VI1_0, FN_SEL_VI1_1, FN_SEL_VI1_2, 0,
-+		/* RESEVED [2] */
-+		0, 0, 0, 0,
-+		/* SEL_TMU [1] */
-+		FN_SEL_TMU1_0, FN_SEL_TMU1_1,
-+		/* SEL_LBS [2] */
-+		FN_SEL_LBS_0, FN_SEL_LBS_1, FN_SEL_LBS_2, FN_SEL_LBS_3,
-+		/* SEL_TSIF0 [2] */
-+		FN_SEL_TSIF0_0, FN_SEL_TSIF0_1, FN_SEL_TSIF0_2, FN_SEL_TSIF0_3,
-+		/* SEL_SOF0 [2] */
-+		FN_SEL_SOF0_0, FN_SEL_SOF0_1, FN_SEL_SOF0_2, 0, }
-+	},
-+	{ PINMUX_CFG_REG_VAR("MOD_SEL2", 0xE6060094, 32,
-+			     3, 1, 1, 3, 2, 1, 1, 2, 2,
-+			     1, 3, 2, 1, 2, 2, 2, 1, 1, 1) {
-+		/* SEL_SCIF0 [3] */
-+		FN_SEL_SCIF0_0, FN_SEL_SCIF0_1, FN_SEL_SCIF0_2,
-+		FN_SEL_SCIF0_3, FN_SEL_SCIF0_4,
-+		0, 0, 0,
-+		/* RESEVED [1] */
-+		0, 0,
-+		/* SEL_SCIF [1] */
-+		FN_SEL_SCIF_0, FN_SEL_SCIF_1,
-+		/* SEL_CAN0 [3] */
-+		FN_SEL_CAN0_0, FN_SEL_CAN0_1, FN_SEL_CAN0_2, FN_SEL_CAN0_3,
-+		FN_SEL_CAN0_4, FN_SEL_CAN0_5,
-+		0, 0,
-+		/* SEL_CAN1 [2] */
-+		FN_SEL_CAN1_0, FN_SEL_CAN1_1, FN_SEL_CAN1_2, FN_SEL_CAN1_3,
-+		/* RESEVED [1] */
-+		0, 0,
-+		/* SEL_SCIFA2 [1] */
-+		FN_SEL_SCIFA2_0, FN_SEL_SCIFA2_1,
-+		/* SEL_SCIF4 [2] */
-+		FN_SEL_SCIF4_0, FN_SEL_SCIF4_1, FN_SEL_SCIF4_2, 0,
-+		/* RESEVED [2] */
-+		0, 0, 0, 0,
-+		/* SEL_ADG [1] */
-+		FN_SEL_ADG_0, FN_SEL_ADG_1,
-+		/* SEL_FM [3] */
-+		FN_SEL_FM_0, FN_SEL_FM_1, FN_SEL_FM_2,
-+		FN_SEL_FM_3, FN_SEL_FM_4,
-+		0, 0, 0,
-+		/* SEL_SCIFA5 [2] */
-+		FN_SEL_SCIFA5_0, FN_SEL_SCIFA5_1, FN_SEL_SCIFA5_2, 0,
-+		/* RESEVED [1] */
-+		0, 0,
-+		/* SEL_GPS [2] */
-+		FN_SEL_GPS_0, FN_SEL_GPS_1, FN_SEL_GPS_2, FN_SEL_GPS_3,
-+		/* SEL_SCIFA4 [2] */
-+		FN_SEL_SCIFA4_0, FN_SEL_SCIFA4_1, FN_SEL_SCIFA4_2, 0,
-+		/* SEL_SCIFA3 [2] */
-+		FN_SEL_SCIFA3_0, FN_SEL_SCIFA3_1, FN_SEL_SCIFA3_2, 0,
-+		/* SEL_SIM [1] */
-+		FN_SEL_SIM_0, FN_SEL_SIM_1,
-+		/* RESEVED [1] */
-+		0, 0,
-+		/* SEL_SSI8 [1] */
-+		FN_SEL_SSI8_0, FN_SEL_SSI8_1, }
-+	},
-+	{ PINMUX_CFG_REG_VAR("MOD_SEL3", 0xE6060098, 32,
-+			     2, 2, 2, 2, 2, 2, 2, 2,
-+			     1, 1, 2, 2, 3, 2, 2, 2, 1) {
-+		/* SEL_HSCIF2 [2] */
-+		FN_SEL_HSCIF2_0, FN_SEL_HSCIF2_1,
-+		FN_SEL_HSCIF2_2, FN_SEL_HSCIF2_3,
-+		/* SEL_CANCLK [2] */
-+		FN_SEL_CANCLK_0, FN_SEL_CANCLK_1,
-+		FN_SEL_CANCLK_2, FN_SEL_CANCLK_3,
-+		/* SEL_IIC8 [2] */
-+		FN_SEL_IIC8_0, FN_SEL_IIC8_1, FN_SEL_IIC8_2, 0,
-+		/* SEL_IIC7 [2] */
-+		FN_SEL_IIC7_0, FN_SEL_IIC7_1, FN_SEL_IIC7_2, 0,
-+		/* SEL_IIC4 [2] */
-+		FN_SEL_IIC4_0, FN_SEL_IIC4_1, FN_SEL_IIC4_2, 0,
-+		/* SEL_IIC3 [2] */
-+		FN_SEL_IIC3_0, FN_SEL_IIC3_1, FN_SEL_IIC3_2, FN_SEL_IIC3_3,
-+		/* SEL_SCIF3 [2] */
-+		FN_SEL_SCIF3_0, FN_SEL_SCIF3_1, FN_SEL_SCIF3_2, FN_SEL_SCIF3_3,
-+		/* SEL_IEB [2] */
-+		FN_SEL_IEB_0, FN_SEL_IEB_1, FN_SEL_IEB_2,
-+		/* SEL_MMC [1] */
-+		FN_SEL_MMC_0, FN_SEL_MMC_1,
-+		/* SEL_SCIF5 [1] */
-+		FN_SEL_SCIF5_0, FN_SEL_SCIF5_1,
-+		/* RESEVED [2] */
-+		0, 0, 0, 0,
-+		/* SEL_IIC2 [2] */
-+		FN_SEL_IIC2_0, FN_SEL_IIC2_1, FN_SEL_IIC2_2, FN_SEL_IIC2_3,
-+		/* SEL_IIC1 [3] */
-+		FN_SEL_IIC1_0, FN_SEL_IIC1_1, FN_SEL_IIC1_2, FN_SEL_IIC1_3,
-+		FN_SEL_IIC1_4,
-+		0, 0, 0,
-+		/* SEL_IIC0 [2] */
-+		FN_SEL_IIC0_0, FN_SEL_IIC0_1, FN_SEL_IIC0_2, 0,
-+		/* RESEVED [2] */
-+		0, 0, 0, 0,
-+		/* RESEVED [2] */
-+		0, 0, 0, 0,
-+		/* RESEVED [1] */
-+		0, 0, }
-+	},
-+	{ PINMUX_CFG_REG_VAR("MOD_SEL4", 0xE606009C, 32,
-+			     3, 2, 2, 1, 1, 1, 1, 3, 2,
-+			     2, 3, 1, 1, 1, 2, 2, 2, 2) {
-+		/* SEL_SOF1 [3] */
-+		FN_SEL_SOF1_0, FN_SEL_SOF1_1, FN_SEL_SOF1_2, FN_SEL_SOF1_3,
-+		FN_SEL_SOF1_4,
-+		0, 0, 0,
-+		/* SEL_HSCIF0 [2] */
-+		FN_SEL_HSCIF0_0, FN_SEL_HSCIF0_1, FN_SEL_HSCIF0_2, 0,
-+		/* SEL_DIS [2] */
-+		FN_SEL_DIS_0, FN_SEL_DIS_1, FN_SEL_DIS_2, 0,
-+		/* RESEVED [1] */
-+		0, 0,
-+		/* SEL_RAD [1] */
-+		FN_SEL_RAD_0, FN_SEL_RAD_1,
-+		/* SEL_RCN [1] */
-+		FN_SEL_RCN_0, FN_SEL_RCN_1,
-+		/* SEL_RSP [1] */
-+		FN_SEL_RSP_0, FN_SEL_RSP_1,
-+		/* SEL_SCIF2 [3] */
-+		FN_SEL_SCIF2_0, FN_SEL_SCIF2_1, FN_SEL_SCIF2_2,
-+		FN_SEL_SCIF2_3, FN_SEL_SCIF2_4,
-+		0, 0, 0,
-+		/* RESEVED [2] */
-+		0, 0, 0, 0,
-+		/* RESEVED [2] */
-+		0, 0, 0, 0,
-+		/* SEL_SOF2 [3] */
-+		FN_SEL_SOF2_0, FN_SEL_SOF2_1, FN_SEL_SOF2_2,
-+		FN_SEL_SOF2_3, FN_SEL_SOF2_4,
-+		0, 0, 0,
-+		/* RESEVED [1] */
-+		0, 0,
-+		/* SEL_SSI1 [1] */
-+		FN_SEL_SSI1_0, FN_SEL_SSI1_1,
-+		/* SEL_SSI0 [1] */
-+		FN_SEL_SSI0_0, FN_SEL_SSI0_1,
-+		/* SEL_SSP [2] */
-+		FN_SEL_SSP_0, FN_SEL_SSP_1, FN_SEL_SSP_2, 0,
-+		/* RESEVED [2] */
-+		0, 0, 0, 0,
-+		/* RESEVED [2] */
-+		0, 0, 0, 0,
-+		/* RESEVED [2] */
-+		0, 0, 0, 0, }
-+	},
-+	{ },
-+};
-+
-+const struct sh_pfc_soc_info r8a7791_pinmux_info = {
-+	.name = "r8a77910_pfc",
-+	.unlock_reg = 0xe6060000, /* PMMR */
-+
-+	.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
-+
-+	.pins = pinmux_pins,
-+	.nr_pins = ARRAY_SIZE(pinmux_pins),
-+	.groups = pinmux_groups,
-+	.nr_groups = ARRAY_SIZE(pinmux_groups),
-+	.functions = pinmux_functions,
-+	.nr_functions = ARRAY_SIZE(pinmux_functions),
-+
-+	.cfg_regs = pinmux_config_regs,
-+
-+	.gpio_data = pinmux_data,
-+	.gpio_data_size = ARRAY_SIZE(pinmux_data),
-+};
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0083-sh-pfc-Add-entries-for-INTC-external-IRQs.patch b/patches.renesas/0083-sh-pfc-Add-entries-for-INTC-external-IRQs.patch
deleted file mode 100644
index 472d2569f9227..0000000000000
--- a/patches.renesas/0083-sh-pfc-Add-entries-for-INTC-external-IRQs.patch
+++ /dev/null
@@ -1,225 +0,0 @@
-From c4b0c01eea61158526425c27055bb8b4b471b5f2 Mon Sep 17 00:00:00 2001
-From: Bastian Hecht <hechtb@gmail.com>
-Date: Tue, 9 Apr 2013 10:48:50 +0000
-Subject: sh-pfc: Add entries for INTC external IRQs
-
-We add all necessary entries to support the external IRQs from the INTC.
-
-Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 09bbc1fd031da5a9c2550b334eb06df86ab537c2)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7740.c | 174 +++++++++++++++++++++++++++++++++++
- 1 file changed, 174 insertions(+)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-index bbd87d29..d95040c3 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-@@ -30,6 +30,22 @@
- 	PORT_10(fn, pfx##20, sfx),					\
- 	PORT_1(fn, pfx##210, sfx),	PORT_1(fn, pfx##211, sfx)
- 
-+#define IRQC_PIN_MUX(irq, pin)						\
-+static const unsigned int intc_irq##irq##_pins[] = {			\
-+	pin,								\
-+};									\
-+static const unsigned int intc_irq##irq##_mux[] = {			\
-+	IRQ##irq##_MARK,						\
-+}
-+
-+#define IRQC_PINS_MUX(irq, idx, pin)					\
-+static const unsigned int intc_irq##irq##_##idx##_pins[] = {		\
-+	pin,								\
-+};									\
-+static const unsigned int intc_irq##irq##_##idx##_mux[] = {		\
-+	IRQ##irq##_PORT##pin##_MARK,					\
-+}
-+
- enum {
- 	PINMUX_RESERVED = 0,
- 
-@@ -1658,6 +1674,59 @@ static struct sh_pfc_pin pinmux_pins[] = {
- 	GPIO_PORT_ALL(),
- };
- 
-+/* - INTC ------------------------------------------------------------------- */
-+IRQC_PINS_MUX(0, 0, 2);
-+IRQC_PINS_MUX(0, 1, 13);
-+IRQC_PIN_MUX(1, 20);
-+IRQC_PINS_MUX(2, 0, 11);
-+IRQC_PINS_MUX(2, 1, 12);
-+IRQC_PINS_MUX(3, 0, 10);
-+IRQC_PINS_MUX(3, 1, 14);
-+IRQC_PINS_MUX(4, 0, 15);
-+IRQC_PINS_MUX(4, 1, 172);
-+IRQC_PINS_MUX(5, 0, 0);
-+IRQC_PINS_MUX(5, 1, 1);
-+IRQC_PINS_MUX(6, 0, 121);
-+IRQC_PINS_MUX(6, 1, 173);
-+IRQC_PINS_MUX(7, 0, 120);
-+IRQC_PINS_MUX(7, 1, 209);
-+IRQC_PIN_MUX(8, 119);
-+IRQC_PINS_MUX(9, 0, 118);
-+IRQC_PINS_MUX(9, 1, 210);
-+IRQC_PIN_MUX(10, 19);
-+IRQC_PIN_MUX(11, 104);
-+IRQC_PINS_MUX(12, 0, 42);
-+IRQC_PINS_MUX(12, 1, 97);
-+IRQC_PINS_MUX(13, 0, 64);
-+IRQC_PINS_MUX(13, 1, 98);
-+IRQC_PINS_MUX(14, 0, 63);
-+IRQC_PINS_MUX(14, 1, 99);
-+IRQC_PINS_MUX(15, 0, 62);
-+IRQC_PINS_MUX(15, 1, 100);
-+IRQC_PINS_MUX(16, 0, 68);
-+IRQC_PINS_MUX(16, 1, 211);
-+IRQC_PIN_MUX(17, 69);
-+IRQC_PIN_MUX(18, 70);
-+IRQC_PIN_MUX(19, 71);
-+IRQC_PIN_MUX(20, 67);
-+IRQC_PIN_MUX(21, 202);
-+IRQC_PIN_MUX(22, 95);
-+IRQC_PIN_MUX(23, 96);
-+IRQC_PIN_MUX(24, 180);
-+IRQC_PIN_MUX(25, 38);
-+IRQC_PINS_MUX(26, 0, 58);
-+IRQC_PINS_MUX(26, 1, 81);
-+IRQC_PINS_MUX(27, 0, 57);
-+IRQC_PINS_MUX(27, 1, 168);
-+IRQC_PINS_MUX(28, 0, 56);
-+IRQC_PINS_MUX(28, 1, 169);
-+IRQC_PINS_MUX(29, 0, 50);
-+IRQC_PINS_MUX(29, 1, 170);
-+IRQC_PINS_MUX(30, 0, 49);
-+IRQC_PINS_MUX(30, 1, 171);
-+IRQC_PINS_MUX(31, 0, 41);
-+IRQC_PINS_MUX(31, 1, 167);
-+
- /* - LCD0 ------------------------------------------------------------------- */
- static const unsigned int lcd0_data8_pins[] = {
- 	/* D[0:7] */
-@@ -2054,6 +2123,57 @@ static const unsigned int sdhi2_wp_1_mux[] = {
- };
- 
- static const struct sh_pfc_pin_group pinmux_groups[] = {
-+	SH_PFC_PIN_GROUP(intc_irq0_0),
-+	SH_PFC_PIN_GROUP(intc_irq0_1),
-+	SH_PFC_PIN_GROUP(intc_irq1),
-+	SH_PFC_PIN_GROUP(intc_irq2_0),
-+	SH_PFC_PIN_GROUP(intc_irq2_1),
-+	SH_PFC_PIN_GROUP(intc_irq3_0),
-+	SH_PFC_PIN_GROUP(intc_irq3_1),
-+	SH_PFC_PIN_GROUP(intc_irq4_0),
-+	SH_PFC_PIN_GROUP(intc_irq4_1),
-+	SH_PFC_PIN_GROUP(intc_irq5_0),
-+	SH_PFC_PIN_GROUP(intc_irq5_1),
-+	SH_PFC_PIN_GROUP(intc_irq6_0),
-+	SH_PFC_PIN_GROUP(intc_irq6_1),
-+	SH_PFC_PIN_GROUP(intc_irq7_0),
-+	SH_PFC_PIN_GROUP(intc_irq7_1),
-+	SH_PFC_PIN_GROUP(intc_irq8),
-+	SH_PFC_PIN_GROUP(intc_irq9_0),
-+	SH_PFC_PIN_GROUP(intc_irq9_1),
-+	SH_PFC_PIN_GROUP(intc_irq10),
-+	SH_PFC_PIN_GROUP(intc_irq11),
-+	SH_PFC_PIN_GROUP(intc_irq12_0),
-+	SH_PFC_PIN_GROUP(intc_irq12_1),
-+	SH_PFC_PIN_GROUP(intc_irq13_0),
-+	SH_PFC_PIN_GROUP(intc_irq13_1),
-+	SH_PFC_PIN_GROUP(intc_irq14_0),
-+	SH_PFC_PIN_GROUP(intc_irq14_1),
-+	SH_PFC_PIN_GROUP(intc_irq15_0),
-+	SH_PFC_PIN_GROUP(intc_irq15_1),
-+	SH_PFC_PIN_GROUP(intc_irq16_0),
-+	SH_PFC_PIN_GROUP(intc_irq16_1),
-+	SH_PFC_PIN_GROUP(intc_irq17),
-+	SH_PFC_PIN_GROUP(intc_irq18),
-+	SH_PFC_PIN_GROUP(intc_irq19),
-+	SH_PFC_PIN_GROUP(intc_irq20),
-+	SH_PFC_PIN_GROUP(intc_irq21),
-+	SH_PFC_PIN_GROUP(intc_irq22),
-+	SH_PFC_PIN_GROUP(intc_irq23),
-+	SH_PFC_PIN_GROUP(intc_irq24),
-+	SH_PFC_PIN_GROUP(intc_irq25),
-+	SH_PFC_PIN_GROUP(intc_irq26_0),
-+	SH_PFC_PIN_GROUP(intc_irq26_1),
-+	SH_PFC_PIN_GROUP(intc_irq27_0),
-+	SH_PFC_PIN_GROUP(intc_irq27_1),
-+	SH_PFC_PIN_GROUP(intc_irq28_0),
-+	SH_PFC_PIN_GROUP(intc_irq28_1),
-+	SH_PFC_PIN_GROUP(intc_irq29_0),
-+	SH_PFC_PIN_GROUP(intc_irq29_1),
-+	SH_PFC_PIN_GROUP(intc_irq30_0),
-+	SH_PFC_PIN_GROUP(intc_irq30_1),
-+	SH_PFC_PIN_GROUP(intc_irq31_0),
-+	SH_PFC_PIN_GROUP(intc_irq31_1),
- 	SH_PFC_PIN_GROUP(lcd0_data8),
- 	SH_PFC_PIN_GROUP(lcd0_data9),
- 	SH_PFC_PIN_GROUP(lcd0_data12),
-@@ -2103,6 +2223,60 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(sdhi2_wp_1),
- };
- 
-+static const char * const intc_groups[] = {
-+	"intc_irq0_0",
-+	"intc_irq0_1",
-+	"intc_irq1",
-+	"intc_irq2_0",
-+	"intc_irq2_1",
-+	"intc_irq3_0",
-+	"intc_irq3_1",
-+	"intc_irq4_0",
-+	"intc_irq4_1",
-+	"intc_irq5_0",
-+	"intc_irq5_1",
-+	"intc_irq6_0",
-+	"intc_irq6_1",
-+	"intc_irq7_0",
-+	"intc_irq7_1",
-+	"intc_irq8",
-+	"intc_irq9_0",
-+	"intc_irq9_1",
-+	"intc_irq10",
-+	"intc_irq11",
-+	"intc_irq12_0",
-+	"intc_irq12_1",
-+	"intc_irq13_0",
-+	"intc_irq13_1",
-+	"intc_irq14_0",
-+	"intc_irq14_1",
-+	"intc_irq15_0",
-+	"intc_irq15_1",
-+	"intc_irq16_0",
-+	"intc_irq16_1",
-+	"intc_irq17",
-+	"intc_irq18",
-+	"intc_irq19",
-+	"intc_irq20",
-+	"intc_irq21",
-+	"intc_irq22",
-+	"intc_irq23",
-+	"intc_irq24",
-+	"intc_irq25",
-+	"intc_irq26_0",
-+	"intc_irq26_1",
-+	"intc_irq27_0",
-+	"intc_irq27_1",
-+	"intc_irq28_0",
-+	"intc_irq28_1",
-+	"intc_irq29_0",
-+	"intc_irq29_1",
-+	"intc_irq30_0",
-+	"intc_irq30_1",
-+	"intc_irq31_0",
-+	"intc_irq31_1",
-+};
-+
- static const char * const lcd0_groups[] = {
- 	"lcd0_data8",
- 	"lcd0_data9",
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0084-ARM-shmobile-r8a7790-add-QSPI-support.patch b/patches.renesas/0084-ARM-shmobile-r8a7790-add-QSPI-support.patch
deleted file mode 100644
index a5d85db5d5112..0000000000000
--- a/patches.renesas/0084-ARM-shmobile-r8a7790-add-QSPI-support.patch
+++ /dev/null
@@ -1,48 +0,0 @@
-From 20f8a1ebbe1bfdfea95969e962d350f0d71f3863 Mon Sep 17 00:00:00 2001
-From: Hiep Cao Minh <cm-hiep@jinso.co.jp>
-Date: Tue, 22 Oct 2013 11:21:11 +0900
-Subject: ARM: shmobile: r8a7790: add QSPI support
-
-Adds support for QSPI on the r8a7790.
-
-Signed-off-by: Hiep Cao Minh <cm-hiep@jinso.co.jp>
-Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 3dd3b1cf068a64a71f1b40319ca33fcb50842bc0)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r8a7790.c | 3 +++
- 1 file changed, 3 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
-index b472e2875f18..571bffdf6089 100644
---- a/arch/arm/mach-shmobile/clock-r8a7790.c
-+++ b/arch/arm/mach-shmobile/clock-r8a7790.c
-@@ -183,6 +183,7 @@ static struct clk div6_clks[DIV6_NR] = {
- /* MSTP */
- enum {
- 	MSTP931, MSTP930, MSTP929, MSTP928,
-+	MSTP917,
- 	MSTP813,
- 	MSTP726, MSTP725, MSTP724, MSTP723, MSTP722, MSTP721, MSTP720,
- 	MSTP717, MSTP716,
-@@ -199,6 +200,7 @@ static struct clk mstp_clks[MSTP_NR] = {
- 	[MSTP930] = SH_CLK_MSTP32(&hp_clk, SMSTPCR9, 30, 0), /* I2C1 */
- 	[MSTP929] = SH_CLK_MSTP32(&hp_clk, SMSTPCR9, 29, 0), /* I2C2 */
- 	[MSTP928] = SH_CLK_MSTP32(&hp_clk, SMSTPCR9, 28, 0), /* I2C3 */
-+	[MSTP917] = SH_CLK_MSTP32(&qspi_clk, SMSTPCR9, 17, 0), /* QSPI */
- 	[MSTP813] = SH_CLK_MSTP32(&p_clk, SMSTPCR8, 13, 0), /* Ether */
- 	[MSTP726] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 26, 0), /* LVDS0 */
- 	[MSTP725] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 25, 0), /* LVDS1 */
-@@ -298,6 +300,7 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_DEV_ID("ee220000.mmcif", &mstp_clks[MSTP305]),
- 	CLKDEV_DEV_ID("sh_mmcif.1", &mstp_clks[MSTP305]),
- 	CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]),
-+	CLKDEV_DEV_ID("qspi.0", &mstp_clks[MSTP917]),
- 	CLKDEV_DEV_ID("renesas_usbhs", &mstp_clks[MSTP704]),
- 	CLKDEV_ICK_ID("usbhs", "usb_phy_rcar_gen2", &mstp_clks[MSTP704]),
- };
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0084-sata_rcar-Convert-to-clk_prepare-unprepare.patch b/patches.renesas/0084-sata_rcar-Convert-to-clk_prepare-unprepare.patch
deleted file mode 100644
index e4e973dba125b..0000000000000
--- a/patches.renesas/0084-sata_rcar-Convert-to-clk_prepare-unprepare.patch
+++ /dev/null
@@ -1,70 +0,0 @@
-From 160526768d55fca2b58f8852e7ad6e8a547f83ca Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Mon, 28 Oct 2013 23:49:21 +0100
-Subject: sata_rcar: Convert to clk_prepare/unprepare
-
-Turn clk_enable() and clk_disable() calls into clk_prepare_enable() and
-clk_disable_unprepare() to get ready for the migration to the common
-clock framework.
-
-Cc: linux-ide@vger.kernel.org
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Tejun Heo <tj@kernel.org>
-(cherry picked from commit 329b4287a4fc1d5d98a9f74b6f4f5d986a6c61f4)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/ata/sata_rcar.c | 10 +++++-----
- 1 file changed, 5 insertions(+), 5 deletions(-)
-
-diff --git a/drivers/ata/sata_rcar.c b/drivers/ata/sata_rcar.c
-index c2d95e9fb971..1dae9a9009f7 100644
---- a/drivers/ata/sata_rcar.c
-+++ b/drivers/ata/sata_rcar.c
-@@ -792,7 +792,7 @@ static int sata_rcar_probe(struct platform_device *pdev)
- 		dev_err(&pdev->dev, "failed to get access to sata clock\n");
- 		return PTR_ERR(priv->clk);
- 	}
--	clk_enable(priv->clk);
-+	clk_prepare_enable(priv->clk);
- 
- 	host = ata_host_alloc(&pdev->dev, 1);
- 	if (!host) {
-@@ -822,7 +822,7 @@ static int sata_rcar_probe(struct platform_device *pdev)
- 		return 0;
- 
- cleanup:
--	clk_disable(priv->clk);
-+	clk_disable_unprepare(priv->clk);
- 
- 	return ret;
- }
-@@ -841,7 +841,7 @@ static int sata_rcar_remove(struct platform_device *pdev)
- 	iowrite32(0, base + SATAINTSTAT_REG);
- 	iowrite32(0x7ff, base + SATAINTMASK_REG);
- 
--	clk_disable(priv->clk);
-+	clk_disable_unprepare(priv->clk);
- 
- 	return 0;
- }
-@@ -861,7 +861,7 @@ static int sata_rcar_suspend(struct device *dev)
- 		/* mask */
- 		iowrite32(0x7ff, base + SATAINTMASK_REG);
- 
--		clk_disable(priv->clk);
-+		clk_disable_unprepare(priv->clk);
- 	}
- 
- 	return ret;
-@@ -873,7 +873,7 @@ static int sata_rcar_resume(struct device *dev)
- 	struct sata_rcar_priv *priv = host->private_data;
- 	void __iomem *base = priv->base;
- 
--	clk_enable(priv->clk);
-+	clk_prepare_enable(priv->clk);
- 
- 	/* ack and mask */
- 	iowrite32(0, base + SATAINTSTAT_REG);
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0084-sh-pfc-Remove-dependency-on-GPIOLIB.patch b/patches.renesas/0084-sh-pfc-Remove-dependency-on-GPIOLIB.patch
deleted file mode 100644
index 0e374a973fa4e..0000000000000
--- a/patches.renesas/0084-sh-pfc-Remove-dependency-on-GPIOLIB.patch
+++ /dev/null
@@ -1,60 +0,0 @@
-From 076c833527deb3c60f9bad786f4011ec7f1ca4a0 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 9 Apr 2013 14:06:01 +0000
-Subject: sh-pfc: Remove dependency on GPIOLIB
-
-Make GPIO support optional for platforms that don't support GPIOLIB.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Linus Walleij <linus.walleij@linaro.org>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit bf9f0674e39ee2070d39c2bd2febef42c31b3fc0)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/Kconfig  | 2 --
- drivers/pinctrl/sh-pfc/core.h   | 1 +
- drivers/pinctrl/sh-pfc/sh_pfc.h | 2 +-
- 3 files changed, 2 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/Kconfig b/drivers/pinctrl/sh-pfc/Kconfig
-index 9f0217bc..a0b6bd0b 100644
---- a/drivers/pinctrl/sh-pfc/Kconfig
-+++ b/drivers/pinctrl/sh-pfc/Kconfig
-@@ -5,8 +5,6 @@
- if ARCH_SHMOBILE || SUPERH
- 
- config PINCTRL_SH_PFC
--	# XXX move off the gpio dependency
--	depends on GPIOLIB
- 	select GPIO_SH_PFC if ARCH_REQUIRE_GPIOLIB
- 	select PINMUX
- 	select PINCONF
-diff --git a/drivers/pinctrl/sh-pfc/core.h b/drivers/pinctrl/sh-pfc/core.h
-index ee4a4d6d..6ec746f0 100644
---- a/drivers/pinctrl/sh-pfc/core.h
-+++ b/drivers/pinctrl/sh-pfc/core.h
-@@ -11,6 +11,7 @@
- #define __SH_PFC_CORE_H__
- 
- #include <linux/compiler.h>
-+#include <linux/spinlock.h>
- #include <linux/types.h>
- 
- #include "sh_pfc.h"
-diff --git a/drivers/pinctrl/sh-pfc/sh_pfc.h b/drivers/pinctrl/sh-pfc/sh_pfc.h
-index 3b785fc4..b1707612 100644
---- a/drivers/pinctrl/sh-pfc/sh_pfc.h
-+++ b/drivers/pinctrl/sh-pfc/sh_pfc.h
-@@ -11,8 +11,8 @@
- #ifndef __SH_PFC_H
- #define __SH_PFC_H
- 
-+#include <linux/bug.h>
- #include <linux/stringify.h>
--#include <asm-generic/gpio.h>
- 
- typedef unsigned short pinmux_enum_t;
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0085-ARM-gic-add-CPU-migration-support.patch b/patches.renesas/0085-ARM-gic-add-CPU-migration-support.patch
deleted file mode 100644
index 8678bf8f4f099..0000000000000
--- a/patches.renesas/0085-ARM-gic-add-CPU-migration-support.patch
+++ /dev/null
@@ -1,166 +0,0 @@
-From 714cd44380c8ac53b807bbf4e8fd5ac53b0fdb6f Mon Sep 17 00:00:00 2001
-From: Nicolas Pitre <nicolas.pitre@linaro.org>
-Date: Thu, 12 Apr 2012 01:40:31 -0400
-Subject: ARM: gic: add CPU migration support
-
-This is required by the big.LITTLE switcher code.
-
-The gic_migrate_target() changes the CPU interface mapping for the
-current CPU to redirect SGIs to the specified interface, and it also
-updates the target CPU for each interrupts to that CPU interface
-if they were targeting the current interface.  Finally, pending
-SGIs for the current CPU are forwarded to the new interface.
-
-Because Linux does not use it, the SGI source information for the
-forwarded SGIs is not preserved.  Neither is the source information
-for the SGIs sent by the current CPU to other CPUs adjusted to match
-the new CPU interface mapping.  The required registers are banked so
-only the target CPU could do it.
-
-Signed-off-by: Nicolas Pitre <nico@linaro.org>
-(cherry picked from commit 1a6b69b6548cd0dd82549393f30dd982ceeb79d2)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/irqchip/irq-gic.c       | 87 +++++++++++++++++++++++++++++++++++++++--
- include/linux/irqchip/arm-gic.h |  4 ++
- 2 files changed, 88 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
-index fe44d3e2c702..d37e47dec547 100644
---- a/drivers/irqchip/irq-gic.c
-+++ b/drivers/irqchip/irq-gic.c
-@@ -253,10 +253,9 @@ static int gic_set_affinity(struct irq_data *d, const struct cpumask *mask_val,
- 	if (cpu >= NR_GIC_CPU_IF || cpu >= nr_cpu_ids)
- 		return -EINVAL;
- 
-+	raw_spin_lock(&irq_controller_lock);
- 	mask = 0xff << shift;
- 	bit = gic_cpu_map[cpu] << shift;
--
--	raw_spin_lock(&irq_controller_lock);
- 	val = readl_relaxed(reg) & ~mask;
- 	writel_relaxed(val | bit, reg);
- 	raw_spin_unlock(&irq_controller_lock);
-@@ -652,7 +651,9 @@ static void __init gic_pm_init(struct gic_chip_data *gic)
- void gic_raise_softirq(const struct cpumask *mask, unsigned int irq)
- {
- 	int cpu;
--	unsigned long map = 0;
-+	unsigned long flags, map = 0;
-+
-+	raw_spin_lock_irqsave(&irq_controller_lock, flags);
- 
- 	/* Convert our logical CPU mask into a physical one. */
- 	for_each_cpu(cpu, mask)
-@@ -666,6 +667,86 @@ void gic_raise_softirq(const struct cpumask *mask, unsigned int irq)
- 
- 	/* this always happens on GIC0 */
- 	writel_relaxed(map << 16 | irq, gic_data_dist_base(&gic_data[0]) + GIC_DIST_SOFTINT);
-+
-+	raw_spin_unlock_irqrestore(&irq_controller_lock, flags);
-+}
-+#endif
-+
-+#ifdef CONFIG_BL_SWITCHER
-+/*
-+ * gic_migrate_target - migrate IRQs to another CPU interface
-+ *
-+ * @new_cpu_id: the CPU target ID to migrate IRQs to
-+ *
-+ * Migrate all peripheral interrupts with a target matching the current CPU
-+ * to the interface corresponding to @new_cpu_id.  The CPU interface mapping
-+ * is also updated.  Targets to other CPU interfaces are unchanged.
-+ * This must be called with IRQs locally disabled.
-+ */
-+void gic_migrate_target(unsigned int new_cpu_id)
-+{
-+	unsigned int cur_cpu_id, gic_irqs, gic_nr = 0;
-+	void __iomem *dist_base;
-+	int i, ror_val, cpu = smp_processor_id();
-+	u32 val, cur_target_mask, active_mask;
-+
-+	if (gic_nr >= MAX_GIC_NR)
-+		BUG();
-+
-+	dist_base = gic_data_dist_base(&gic_data[gic_nr]);
-+	if (!dist_base)
-+		return;
-+	gic_irqs = gic_data[gic_nr].gic_irqs;
-+
-+	cur_cpu_id = __ffs(gic_cpu_map[cpu]);
-+	cur_target_mask = 0x01010101 << cur_cpu_id;
-+	ror_val = (cur_cpu_id - new_cpu_id) & 31;
-+
-+	raw_spin_lock(&irq_controller_lock);
-+
-+	/* Update the target interface for this logical CPU */
-+	gic_cpu_map[cpu] = 1 << new_cpu_id;
-+
-+	/*
-+	 * Find all the peripheral interrupts targetting the current
-+	 * CPU interface and migrate them to the new CPU interface.
-+	 * We skip DIST_TARGET 0 to 7 as they are read-only.
-+	 */
-+	for (i = 8; i < DIV_ROUND_UP(gic_irqs, 4); i++) {
-+		val = readl_relaxed(dist_base + GIC_DIST_TARGET + i * 4);
-+		active_mask = val & cur_target_mask;
-+		if (active_mask) {
-+			val &= ~active_mask;
-+			val |= ror32(active_mask, ror_val);
-+			writel_relaxed(val, dist_base + GIC_DIST_TARGET + i*4);
-+		}
-+	}
-+
-+	raw_spin_unlock(&irq_controller_lock);
-+
-+	/*
-+	 * Now let's migrate and clear any potential SGIs that might be
-+	 * pending for us (cur_cpu_id).  Since GIC_DIST_SGI_PENDING_SET
-+	 * is a banked register, we can only forward the SGI using
-+	 * GIC_DIST_SOFTINT.  The original SGI source is lost but Linux
-+	 * doesn't use that information anyway.
-+	 *
-+	 * For the same reason we do not adjust SGI source information
-+	 * for previously sent SGIs by us to other CPUs either.
-+	 */
-+	for (i = 0; i < 16; i += 4) {
-+		int j;
-+		val = readl_relaxed(dist_base + GIC_DIST_SGI_PENDING_SET + i);
-+		if (!val)
-+			continue;
-+		writel_relaxed(val, dist_base + GIC_DIST_SGI_PENDING_CLEAR + i);
-+		for (j = i; j < i + 4; j++) {
-+			if (val & 0xff)
-+				writel_relaxed((1 << (new_cpu_id + 16)) | j,
-+						dist_base + GIC_DIST_SOFTINT);
-+			val >>= 8;
-+		}
-+	}
- }
- #endif
- 
-diff --git a/include/linux/irqchip/arm-gic.h b/include/linux/irqchip/arm-gic.h
-index 0e5d9ecdb2b6..6fa426856c86 100644
---- a/include/linux/irqchip/arm-gic.h
-+++ b/include/linux/irqchip/arm-gic.h
-@@ -31,6 +31,8 @@
- #define GIC_DIST_TARGET			0x800
- #define GIC_DIST_CONFIG			0xc00
- #define GIC_DIST_SOFTINT		0xf00
-+#define GIC_DIST_SGI_PENDING_CLEAR	0xf10
-+#define GIC_DIST_SGI_PENDING_SET	0xf20
- 
- #define GICH_HCR			0x0
- #define GICH_VTR			0x4
-@@ -74,6 +76,8 @@ static inline void gic_init(unsigned int nr, int start,
- 	gic_init_bases(nr, start, dist, cpu, 0, NULL);
- }
- 
-+void gic_migrate_target(unsigned int new_cpu_id);
-+
- #endif /* __ASSEMBLY */
- 
- #endif
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0085-ARM-shmobile-Enable-MTU2-on-r7s72100.patch b/patches.renesas/0085-ARM-shmobile-Enable-MTU2-on-r7s72100.patch
deleted file mode 100644
index 4f3d6c35ce0ce..0000000000000
--- a/patches.renesas/0085-ARM-shmobile-Enable-MTU2-on-r7s72100.patch
+++ /dev/null
@@ -1,79 +0,0 @@
-From a1d5b2d89ec8281dbaedb197d9223c976bda5d8e Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Wed, 6 Nov 2013 19:43:32 +0900
-Subject: ARM: shmobile: Enable MTU2 on r7s72100
-
-Add MTU2 as r7s72100 system timer.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit d18e06116d5e7b277e73e3bdc6e08208aabcedc7)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r7s72100.c |  1 +
- arch/arm/mach-shmobile/setup-r7s72100.c | 22 ++++++++++++++++++++++
- 2 files changed, 23 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/clock-r7s72100.c b/arch/arm/mach-shmobile/clock-r7s72100.c
-index 0814a508fd61..7b457aed8253 100644
---- a/arch/arm/mach-shmobile/clock-r7s72100.c
-+++ b/arch/arm/mach-shmobile/clock-r7s72100.c
-@@ -181,6 +181,7 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_ICK_ID("sci_fck", "sh-sci.5", &mstp_clks[MSTP42]),
- 	CLKDEV_ICK_ID("sci_fck", "sh-sci.6", &mstp_clks[MSTP41]),
- 	CLKDEV_ICK_ID("sci_fck", "sh-sci.7", &mstp_clks[MSTP40]),
-+	CLKDEV_CON_ID("mtu2_fck", &mstp_clks[MSTP33]),
- };
- 
- void __init r7s72100_clock_init(void)
-diff --git a/arch/arm/mach-shmobile/setup-r7s72100.c b/arch/arm/mach-shmobile/setup-r7s72100.c
-index d4eb509a1c87..55f0b9c7c482 100644
---- a/arch/arm/mach-shmobile/setup-r7s72100.c
-+++ b/arch/arm/mach-shmobile/setup-r7s72100.c
-@@ -22,6 +22,7 @@
- #include <linux/kernel.h>
- #include <linux/of_platform.h>
- #include <linux/serial_sci.h>
-+#include <linux/sh_timer.h>
- #include <mach/common.h>
- #include <mach/irqs.h>
- #include <mach/r7s72100.h>
-@@ -58,6 +59,26 @@ static inline void r7s72100_register_scif(int idx)
- 				      sizeof(struct plat_sci_port));
- }
- 
-+
-+static struct sh_timer_config mtu2_0_platform_data __initdata = {
-+	.name = "MTU2_0",
-+	.timer_bit = 0,
-+	.channel_offset = -0x80,
-+	.clockevent_rating = 200,
-+};
-+
-+static struct resource mtu2_0_resources[] __initdata = {
-+	DEFINE_RES_MEM(0xfcff0300, 0x27),
-+	DEFINE_RES_IRQ(gic_iid(139)), /* MTU2 TGI0A */
-+};
-+
-+#define r7s72100_register_mtu2(idx)					\
-+	platform_device_register_resndata(&platform_bus, "sh_mtu2",	\
-+					  idx, mtu2_##idx##_resources,	\
-+					  ARRAY_SIZE(mtu2_##idx##_resources), \
-+					  &mtu2_##idx##_platform_data,	\
-+					  sizeof(struct sh_timer_config))
-+
- void __init r7s72100_add_dt_devices(void)
- {
- 	r7s72100_register_scif(SCIF0);
-@@ -68,6 +89,7 @@ void __init r7s72100_add_dt_devices(void)
- 	r7s72100_register_scif(SCIF5);
- 	r7s72100_register_scif(SCIF6);
- 	r7s72100_register_scif(SCIF7);
-+	r7s72100_register_mtu2(0);
- }
- 
- void __init r7s72100_init_early(void)
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0085-sh-pfc-r8a7790-Add-ETH-pin-groups-and-functions.patch b/patches.renesas/0085-sh-pfc-r8a7790-Add-ETH-pin-groups-and-functions.patch
deleted file mode 100644
index 3a57ee5647017..0000000000000
--- a/patches.renesas/0085-sh-pfc-r8a7790-Add-ETH-pin-groups-and-functions.patch
+++ /dev/null
@@ -1,100 +0,0 @@
-From 37cd52b1eb0ea1a225aba81817d9986fe38a1c6b Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Mon, 8 Apr 2013 11:36:14 +0200
-Subject: sh-pfc: r8a7790: Add ETH pin groups and functions
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 1627769b5f9c7f0d966e01655764f8e487515342)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 58 ++++++++++++++++++++++++++++++++++++
- 1 file changed, 58 insertions(+)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-index 42b0c551..3774242c 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-@@ -20,7 +20,10 @@
-  * along with this program; if not, write to the Free Software
-  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
-  */
-+
- #include <linux/kernel.h>
-+#include <linux/platform_data/gpio-rcar.h>
-+
- #include <mach/r8a7790.h>
- 
- #include "core.h"
-@@ -1820,6 +1823,57 @@ static struct sh_pfc_pin pinmux_pins[] = {
- 	PINMUX_GPIO_GP_ALL(),
- };
- 
-+/* - ETH -------------------------------------------------------------------- */
-+static const unsigned int eth_link_pins[] = {
-+	/* LINK */
-+	RCAR_GP_PIN(2, 22),
-+};
-+static const unsigned int eth_link_mux[] = {
-+	ETH_LINK_MARK,
-+};
-+static const unsigned int eth_magic_pins[] = {
-+	/* MAGIC */
-+	RCAR_GP_PIN(2, 27),
-+};
-+static const unsigned int eth_magic_mux[] = {
-+	ETH_MAGIC_MARK,
-+};
-+static const unsigned int eth_mdio_pins[] = {
-+	/* MDC, MDIO */
-+	RCAR_GP_PIN(2, 29), RCAR_GP_PIN(2, 24),
-+};
-+static const unsigned int eth_mdio_mux[] = {
-+	ETH_MDC_MARK, ETH_MDIO_MARK,
-+};
-+static const unsigned int eth_rmii_pins[] = {
-+	/* RXD[0:1], RX_ER, CRS_DV, TXD[0:1], TX_EN, REF_CLK */
-+	RCAR_GP_PIN(2, 20), RCAR_GP_PIN(2, 21), RCAR_GP_PIN(2, 19),
-+	RCAR_GP_PIN(2, 18), RCAR_GP_PIN(2, 28), RCAR_GP_PIN(2, 25),
-+	RCAR_GP_PIN(2, 26), RCAR_GP_PIN(2, 23),
-+};
-+static const unsigned int eth_rmii_mux[] = {
-+	ETH_RXD0_MARK, ETH_RXD1_MARK, ETH_RX_ER_MARK, ETH_CRS_DV_MARK,
-+	ETH_TXD0_MARK, ETH_TXD1_MARK, ETH_TX_EN_MARK, ETH_REF_CLK_MARK,
-+};
-+
-+static const struct sh_pfc_pin_group pinmux_groups[] = {
-+	SH_PFC_PIN_GROUP(eth_link),
-+	SH_PFC_PIN_GROUP(eth_magic),
-+	SH_PFC_PIN_GROUP(eth_mdio),
-+	SH_PFC_PIN_GROUP(eth_rmii),
-+};
-+
-+static const char * const eth_groups[] = {
-+	"eth_link",
-+	"eth_magic",
-+	"eth_mdio",
-+	"eth_rmii",
-+};
-+
-+static const struct sh_pfc_function pinmux_functions[] = {
-+	SH_PFC_FUNCTION(eth),
-+};
-+
- #define PINMUX_FN_BASE	ARRAY_SIZE(pinmux_pins)
- 
- static const struct pinmux_func pinmux_func_gpios[] = {
-@@ -3226,6 +3280,10 @@ const struct sh_pfc_soc_info r8a7790_pinmux_info = {
- 
- 	.pins = pinmux_pins,
- 	.nr_pins = ARRAY_SIZE(pinmux_pins),
-+	.groups = pinmux_groups,
-+	.nr_groups = ARRAY_SIZE(pinmux_groups),
-+	.functions = pinmux_functions,
-+	.nr_functions = ARRAY_SIZE(pinmux_functions),
- 
- 	.func_gpios	= pinmux_func_gpios,
- 	.nr_func_gpios	= ARRAY_SIZE(pinmux_func_gpios),
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0086-ARM-GIC-function-to-retrieve-the-physical-address-of.patch b/patches.renesas/0086-ARM-GIC-function-to-retrieve-the-physical-address-of.patch
deleted file mode 100644
index 5b9f0c49205e6..0000000000000
--- a/patches.renesas/0086-ARM-GIC-function-to-retrieve-the-physical-address-of.patch
+++ /dev/null
@@ -1,81 +0,0 @@
-From 1b0962cc4f2ed7d431f228afd9d015b0d82e1ece Mon Sep 17 00:00:00 2001
-From: Nicolas Pitre <nicolas.pitre@linaro.org>
-Date: Wed, 28 Nov 2012 18:17:25 -0500
-Subject: ARM: GIC: function to retrieve the physical address of the SGIR
-
-In order to have early assembly code signal other CPUs in the system,
-we need to get the physical address for the SGIR register used to
-send IPIs.  Because the register will be used with a precomputed CPU
-interface ID number, there is no need for any locking in the assembly
-code where this register is written to.
-
-Signed-off-by: Nicolas Pitre <nico@linaro.org>
-(cherry picked from commit eeb446581ba23a5a36b4f5c7bfa2b1f8f7c9fb66)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/irqchip/irq-gic.c       | 29 +++++++++++++++++++++++++++++
- include/linux/irqchip/arm-gic.h |  1 +
- 2 files changed, 30 insertions(+)
-
-diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
-index d37e47dec547..d87bbc03263a 100644
---- a/drivers/irqchip/irq-gic.c
-+++ b/drivers/irqchip/irq-gic.c
-@@ -748,6 +748,33 @@ void gic_migrate_target(unsigned int new_cpu_id)
- 		}
- 	}
- }
-+
-+/*
-+ * gic_get_sgir_physaddr - get the physical address for the SGI register
-+ *
-+ * REturn the physical address of the SGI register to be used
-+ * by some early assembly code when the kernel is not yet available.
-+ */
-+static unsigned long gic_dist_physaddr;
-+
-+unsigned long gic_get_sgir_physaddr(void)
-+{
-+	if (!gic_dist_physaddr)
-+		return 0;
-+	return gic_dist_physaddr + GIC_DIST_SOFTINT;
-+}
-+
-+void __init gic_init_physaddr(struct device_node *node)
-+{
-+	struct resource res;
-+	if (of_address_to_resource(node, 0, &res) == 0) {
-+		gic_dist_physaddr = res.start;
-+		pr_info("GIC physical location is %#lx\n", gic_dist_physaddr);
-+	}
-+}
-+
-+#else
-+#define gic_init_physaddr(node)  do { } while (0)
- #endif
- 
- static int gic_irq_domain_map(struct irq_domain *d, unsigned int irq,
-@@ -931,6 +958,8 @@ int __init gic_of_init(struct device_node *node, struct device_node *parent)
- 		percpu_offset = 0;
- 
- 	gic_init_bases(gic_cnt, -1, dist_base, cpu_base, percpu_offset, node);
-+	if (!gic_cnt)
-+		gic_init_physaddr(node);
- 
- 	if (parent) {
- 		irq = irq_of_parse_and_map(node, 0);
-diff --git a/include/linux/irqchip/arm-gic.h b/include/linux/irqchip/arm-gic.h
-index 6fa426856c86..f829e00795b3 100644
---- a/include/linux/irqchip/arm-gic.h
-+++ b/include/linux/irqchip/arm-gic.h
-@@ -77,6 +77,7 @@ static inline void gic_init(unsigned int nr, int start,
- }
- 
- void gic_migrate_target(unsigned int new_cpu_id);
-+unsigned long gic_get_sgir_physaddr(void);
- 
- #endif /* __ASSEMBLY */
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0086-ARM-shmobile-Add-shared-EMEV2-code-for-init_machine.patch b/patches.renesas/0086-ARM-shmobile-Add-shared-EMEV2-code-for-init_machine.patch
deleted file mode 100644
index 0fbc20af7a8fe..0000000000000
--- a/patches.renesas/0086-ARM-shmobile-Add-shared-EMEV2-code-for-init_machine.patch
+++ /dev/null
@@ -1,64 +0,0 @@
-From 8bef90559c69796b88215d23b9e351db022a7ba5 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Thu, 7 Nov 2013 08:21:11 +0900
-Subject: ARM: shmobile: Add shared EMEV2 code for ->init_machine()
-
-Add a SoC specific function that initializes
-clocks and starts DT probing in case of EMEV2.
-
-This EMEV2 SoC support code may be built for
-either legacy SHMOBILE or SMOBILE_MULTI.
-
-The change allows us to support existing board
-specific KZM9D DTB with these SoC specific
-DT_MACHINE_START() callbacks.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit a3153e6cbaa878c52bcd547f24f89282c660e2e7)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-emev2.c | 12 ++++++++++++
- 1 file changed, 12 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/setup-emev2.c b/arch/arm/mach-shmobile/setup-emev2.c
-index 3ad531caf4f0..2d64b95dcc43 100644
---- a/arch/arm/mach-shmobile/setup-emev2.c
-+++ b/arch/arm/mach-shmobile/setup-emev2.c
-@@ -16,6 +16,7 @@
-  * along with this program; if not, write to the Free Software
-  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
-  */
-+#include <linux/clk-provider.h>
- #include <linux/kernel.h>
- #include <linux/init.h>
- #include <linux/interrupt.h>
-@@ -197,6 +198,16 @@ void __init emev2_init_delay(void)
- 
- #ifdef CONFIG_USE_OF
- 
-+static void __init emev2_add_standard_devices_dt(void)
-+{
-+#ifdef CONFIG_COMMON_CLK
-+	of_clk_init(NULL);
-+#else
-+	emev2_clock_init();
-+#endif
-+	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
-+}
-+
- static const char *emev2_boards_compat_dt[] __initdata = {
- 	"renesas,emev2",
- 	NULL,
-@@ -206,6 +217,7 @@ DT_MACHINE_START(EMEV2_DT, "Generic Emma Mobile EV2 (Flattened Device Tree)")
- 	.smp		= smp_ops(emev2_smp_ops),
- 	.map_io		= emev2_map_io,
- 	.init_early	= emev2_init_delay,
-+	.init_machine	= emev2_add_standard_devices_dt,
- 	.dt_compat	= emev2_boards_compat_dt,
- MACHINE_END
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0086-sh-pfc-r8a7790-Add-INTC-pin-groups-and-functions.patch b/patches.renesas/0086-sh-pfc-r8a7790-Add-INTC-pin-groups-and-functions.patch
deleted file mode 100644
index ffb85d8b26bd0..0000000000000
--- a/patches.renesas/0086-sh-pfc-r8a7790-Add-INTC-pin-groups-and-functions.patch
+++ /dev/null
@@ -1,82 +0,0 @@
-From 26a42554be9475f48f382fabbe5529f359e3c162 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Mon, 8 Apr 2013 11:36:15 +0200
-Subject: sh-pfc: r8a7790: Add INTC pin groups and functions
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 04e7ce78e096e37cf98c98b7787d5287559cf504)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 40 ++++++++++++++++++++++++++++++++++++
- 1 file changed, 40 insertions(+)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-index 3774242c..a92b2046 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-@@ -1855,12 +1855,45 @@ static const unsigned int eth_rmii_mux[] = {
- 	ETH_RXD0_MARK, ETH_RXD1_MARK, ETH_RX_ER_MARK, ETH_CRS_DV_MARK,
- 	ETH_TXD0_MARK, ETH_TXD1_MARK, ETH_TX_EN_MARK, ETH_REF_CLK_MARK,
- };
-+/* - INTC ------------------------------------------------------------------- */
-+static const unsigned int intc_irq0_pins[] = {
-+	/* IRQ */
-+	RCAR_GP_PIN(1, 25),
-+};
-+static const unsigned int intc_irq0_mux[] = {
-+	IRQ0_MARK,
-+};
-+static const unsigned int intc_irq1_pins[] = {
-+	/* IRQ */
-+	RCAR_GP_PIN(1, 27),
-+};
-+static const unsigned int intc_irq1_mux[] = {
-+	IRQ1_MARK,
-+};
-+static const unsigned int intc_irq2_pins[] = {
-+	/* IRQ */
-+	RCAR_GP_PIN(1, 29),
-+};
-+static const unsigned int intc_irq2_mux[] = {
-+	IRQ2_MARK,
-+};
-+static const unsigned int intc_irq3_pins[] = {
-+	/* IRQ */
-+	RCAR_GP_PIN(1, 23),
-+};
-+static const unsigned int intc_irq3_mux[] = {
-+	IRQ3_MARK,
-+};
- 
- static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(eth_link),
- 	SH_PFC_PIN_GROUP(eth_magic),
- 	SH_PFC_PIN_GROUP(eth_mdio),
- 	SH_PFC_PIN_GROUP(eth_rmii),
-+	SH_PFC_PIN_GROUP(intc_irq0),
-+	SH_PFC_PIN_GROUP(intc_irq1),
-+	SH_PFC_PIN_GROUP(intc_irq2),
-+	SH_PFC_PIN_GROUP(intc_irq3),
- };
- 
- static const char * const eth_groups[] = {
-@@ -1870,8 +1903,15 @@ static const char * const eth_groups[] = {
- 	"eth_rmii",
- };
- 
-+static const char * const intc_groups[] = {
-+	"intc_irq0",
-+	"intc_irq1",
-+	"intc_irq2",
-+	"intc_irq3",
-+};
- static const struct sh_pfc_function pinmux_functions[] = {
- 	SH_PFC_FUNCTION(eth),
-+	SH_PFC_FUNCTION(intc),
- };
- 
- #define PINMUX_FN_BASE	ARRAY_SIZE(pinmux_pins)
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0087-ARM-GIC-interface-to-send-a-SGI-directly.patch b/patches.renesas/0087-ARM-GIC-interface-to-send-a-SGI-directly.patch
deleted file mode 100644
index ef363d87c42e8..0000000000000
--- a/patches.renesas/0087-ARM-GIC-interface-to-send-a-SGI-directly.patch
+++ /dev/null
@@ -1,62 +0,0 @@
-From 60c59196f7164af18826c4e78be3c6f3b41ae963 Mon Sep 17 00:00:00 2001
-From: Nicolas Pitre <nicolas.pitre@linaro.org>
-Date: Wed, 28 Nov 2012 18:48:19 -0500
-Subject: ARM: GIC: interface to send a SGI directly
-
-The regular gic_raise_softirq() takes as input a CPU mask which is not
-adequate when we need to send an IPI to a CPU which is not represented
-in the kernel to GIC mapping.  That is the case with the b.L switcher
-when GIC migration to the inbound CPU has not yet occurred.
-
-Signed-off-by: Nicolas Pitre <nico@linaro.org>
-(cherry picked from commit 14d2ca615a85e2dbc744c12c296affd35f119fa7)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-	drivers/irqchip/irq-gic.c
-	include/linux/irqchip/arm-gic.h
----
- drivers/irqchip/irq-gic.c       | 14 ++++++++++++++
- include/linux/irqchip/arm-gic.h |  1 +
- 2 files changed, 15 insertions(+)
-
-diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
-index d87bbc03263a..70e4a3080029 100644
---- a/drivers/irqchip/irq-gic.c
-+++ b/drivers/irqchip/irq-gic.c
-@@ -674,6 +674,20 @@ void gic_raise_softirq(const struct cpumask *mask, unsigned int irq)
- 
- #ifdef CONFIG_BL_SWITCHER
- /*
-+ * gic_send_sgi - send a SGI directly to given CPU interface number
-+ *
-+ * cpu_id: the ID for the destination CPU interface
-+ * irq: the IPI number to send a SGI for
-+ */
-+void gic_send_sgi(unsigned int cpu_id, unsigned int irq)
-+{
-+	BUG_ON(cpu_id >= NR_GIC_CPU_IF);
-+	cpu_id = 1 << cpu_id;
-+	/* this always happens on GIC0 */
-+	writel_relaxed((cpu_id << 16) | irq, gic_data_dist_base(&gic_data[0]) + GIC_DIST_SOFTINT);
-+}
-+
-+/*
-  * gic_migrate_target - migrate IRQs to another CPU interface
-  *
-  * @new_cpu_id: the CPU target ID to migrate IRQs to
-diff --git a/include/linux/irqchip/arm-gic.h b/include/linux/irqchip/arm-gic.h
-index f829e00795b3..442f016df62c 100644
---- a/include/linux/irqchip/arm-gic.h
-+++ b/include/linux/irqchip/arm-gic.h
-@@ -76,6 +76,7 @@ static inline void gic_init(unsigned int nr, int start,
- 	gic_init_bases(nr, start, dist, cpu, 0, NULL);
- }
- 
-+void gic_send_sgi(unsigned int cpu_id, unsigned int irq);
- void gic_migrate_target(unsigned int new_cpu_id);
- unsigned long gic_get_sgir_physaddr(void);
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0087-ARM-shmobile-Use-init_late-in-shared-EMEV2-case.patch b/patches.renesas/0087-ARM-shmobile-Use-init_late-in-shared-EMEV2-case.patch
deleted file mode 100644
index 10cbe16d4e36d..0000000000000
--- a/patches.renesas/0087-ARM-shmobile-Use-init_late-in-shared-EMEV2-case.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From 0e41f32aa5d5d6c987ec6de1aa8530fd17d08bd3 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Thu, 7 Nov 2013 08:21:20 +0900
-Subject: ARM: shmobile: Use ->init_late() in shared EMEV2 case
-
-Hook up shmobile_init_late() to enable various
-code such as suspend-to-RAM and CPUIdle.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 3f348e1c3f47f4c0c21cb1f4c1d6af4ea02d59e8)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-emev2.c | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/arch/arm/mach-shmobile/setup-emev2.c b/arch/arm/mach-shmobile/setup-emev2.c
-index 2d64b95dcc43..4d39bf49aae2 100644
---- a/arch/arm/mach-shmobile/setup-emev2.c
-+++ b/arch/arm/mach-shmobile/setup-emev2.c
-@@ -218,6 +218,7 @@ DT_MACHINE_START(EMEV2_DT, "Generic Emma Mobile EV2 (Flattened Device Tree)")
- 	.map_io		= emev2_map_io,
- 	.init_early	= emev2_init_delay,
- 	.init_machine	= emev2_add_standard_devices_dt,
-+	.init_late	= shmobile_init_late,
- 	.dt_compat	= emev2_boards_compat_dt,
- MACHINE_END
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0087-sh-pfc-r8a7790-Add-SCIF-SCIFA-and-SCIFB-pin-groups-a.patch b/patches.renesas/0087-sh-pfc-r8a7790-Add-SCIF-SCIFA-and-SCIFB-pin-groups-a.patch
deleted file mode 100644
index 56bbdc336364e..0000000000000
--- a/patches.renesas/0087-sh-pfc-r8a7790-Add-SCIF-SCIFA-and-SCIFB-pin-groups-a.patch
+++ /dev/null
@@ -1,661 +0,0 @@
-From 793454928960472cf91976cbd8675ebbd26fdbd2 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Mon, 8 Apr 2013 11:36:16 +0200
-Subject: sh-pfc: r8a7790: Add SCIF, SCIFA and SCIFB pin groups and functions
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 45c6c85d13e68875ebea60c3ee694750f3f132c0)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 617 +++++++++++++++++++++++++++++++++++
- 1 file changed, 617 insertions(+)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-index a92b2046..54c1e10a 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-@@ -1884,6 +1884,462 @@ static const unsigned int intc_irq3_pins[] = {
- static const unsigned int intc_irq3_mux[] = {
- 	IRQ3_MARK,
- };
-+/* - SCIF0 ----------------------------------------------------------------- */
-+static const unsigned int scif0_data_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(4, 28), RCAR_GP_PIN(4, 29),
-+};
-+static const unsigned int scif0_data_mux[] = {
-+	RX0_MARK, TX0_MARK,
-+};
-+static const unsigned int scif0_clk_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(4, 27),
-+};
-+static const unsigned int scif0_clk_mux[] = {
-+	SCK0_MARK,
-+};
-+static const unsigned int scif0_ctrl_pins[] = {
-+	/* RTS, CTS */
-+	RCAR_GP_PIN(4, 31), RCAR_GP_PIN(4, 30),
-+};
-+static const unsigned int scif0_ctrl_mux[] = {
-+	RTS0_N_TANS_MARK, CTS0_N_MARK,
-+};
-+static const unsigned int scif0_data_b_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(0, 4), RCAR_GP_PIN(0, 5),
-+};
-+static const unsigned int scif0_data_b_mux[] = {
-+	RX0_B_MARK, TX0_B_MARK,
-+};
-+/* - SCIF1 ----------------------------------------------------------------- */
-+static const unsigned int scif1_data_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(5, 0), RCAR_GP_PIN(5, 1),
-+};
-+static const unsigned int scif1_data_mux[] = {
-+	RX1_MARK, TX1_MARK,
-+};
-+static const unsigned int scif1_clk_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(4, 20),
-+};
-+static const unsigned int scif1_clk_mux[] = {
-+	SCK1_MARK,
-+};
-+static const unsigned int scif1_ctrl_pins[] = {
-+	/* RTS, CTS */
-+	RCAR_GP_PIN(5, 3), RCAR_GP_PIN(5, 2),
-+};
-+static const unsigned int scif1_ctrl_mux[] = {
-+	RTS1_N_TANS_MARK, CTS1_N_MARK,
-+};
-+static const unsigned int scif1_data_b_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 15),
-+};
-+static const unsigned int scif1_data_b_mux[] = {
-+	RX1_B_MARK, TX1_B_MARK,
-+};
-+static const unsigned int scif1_data_c_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(4, 1), RCAR_GP_PIN(4, 2),
-+};
-+static const unsigned int scif1_data_c_mux[] = {
-+	RX1_C_MARK, TX1_C_MARK,
-+};
-+static const unsigned int scif1_data_d_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(3, 18), RCAR_GP_PIN(3, 19),
-+};
-+static const unsigned int scif1_data_d_mux[] = {
-+	RX1_D_MARK, TX1_D_MARK,
-+};
-+static const unsigned int scif1_clk_d_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(3, 17),
-+};
-+static const unsigned int scif1_clk_d_mux[] = {
-+	SCK1_D_MARK,
-+};
-+static const unsigned int scif1_data_e_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(2, 21), RCAR_GP_PIN(2, 22),
-+};
-+static const unsigned int scif1_data_e_mux[] = {
-+	RX1_E_MARK, TX1_E_MARK,
-+};
-+static const unsigned int scif1_clk_e_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(2, 20),
-+};
-+static const unsigned int scif1_clk_e_mux[] = {
-+	SCK1_E_MARK,
-+};
-+/* - SCIFA0 ----------------------------------------------------------------- */
-+static const unsigned int scifa0_data_pins[] = {
-+	/* RXD, TXD */
-+	RCAR_GP_PIN(4, 28), RCAR_GP_PIN(4, 29),
-+};
-+static const unsigned int scifa0_data_mux[] = {
-+	SCIFA0_RXD_MARK, SCIFA0_TXD_MARK,
-+};
-+static const unsigned int scifa0_clk_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(4, 27),
-+};
-+static const unsigned int scifa0_clk_mux[] = {
-+	SCIFA0_SCK_MARK,
-+};
-+static const unsigned int scifa0_ctrl_pins[] = {
-+	/* RTS, CTS */
-+	RCAR_GP_PIN(4, 31), RCAR_GP_PIN(4, 30),
-+};
-+static const unsigned int scifa0_ctrl_mux[] = {
-+	SCIFA0_RTS_N_MARK, SCIFA0_CTS_N_MARK,
-+};
-+static const unsigned int scifa0_data_b_pins[] = {
-+	/* RXD, TXD */
-+	RCAR_GP_PIN(1, 20), RCAR_GP_PIN(1, 21),
-+};
-+static const unsigned int scifa0_data_b_mux[] = {
-+	SCIFA0_RXD_B_MARK, SCIFA0_TXD_B_MARK
-+};
-+static const unsigned int scifa0_clk_b_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(1, 19),
-+};
-+static const unsigned int scifa0_clk_b_mux[] = {
-+	SCIFA0_SCK_B_MARK,
-+};
-+static const unsigned int scifa0_ctrl_b_pins[] = {
-+	/* RTS, CTS */
-+	RCAR_GP_PIN(1, 23), RCAR_GP_PIN(1, 22),
-+};
-+static const unsigned int scifa0_ctrl_b_mux[] = {
-+	SCIFA0_RTS_N_B_MARK, SCIFA0_CTS_N_B_MARK,
-+};
-+/* - SCIFA1 ----------------------------------------------------------------- */
-+static const unsigned int scifa1_data_pins[] = {
-+	/* RXD, TXD */
-+	RCAR_GP_PIN(5, 0), RCAR_GP_PIN(5, 1),
-+};
-+static const unsigned int scifa1_data_mux[] = {
-+	SCIFA1_RXD_MARK, SCIFA1_TXD_MARK,
-+};
-+static const unsigned int scifa1_clk_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(4, 20),
-+};
-+static const unsigned int scifa1_clk_mux[] = {
-+	SCIFA1_SCK_MARK,
-+};
-+static const unsigned int scifa1_ctrl_pins[] = {
-+	/* RTS, CTS */
-+	RCAR_GP_PIN(5, 3), RCAR_GP_PIN(5, 2),
-+};
-+static const unsigned int scifa1_ctrl_mux[] = {
-+	SCIFA1_RTS_N_MARK, SCIFA1_CTS_N_MARK,
-+};
-+static const unsigned int scifa1_data_b_pins[] = {
-+	/* RXD, TXD */
-+	RCAR_GP_PIN(0, 24), RCAR_GP_PIN(0, 21),
-+};
-+static const unsigned int scifa1_data_b_mux[] = {
-+	SCIFA1_RXD_B_MARK, SCIFA1_TXD_B_MARK,
-+};
-+static const unsigned int scifa1_clk_b_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(0, 23),
-+};
-+static const unsigned int scifa1_clk_b_mux[] = {
-+	SCIFA1_SCK_B_MARK,
-+};
-+static const unsigned int scifa1_ctrl_b_pins[] = {
-+	/* RTS, CTS */
-+	RCAR_GP_PIN(0, 22), RCAR_GP_PIN(0, 25),
-+};
-+static const unsigned int scifa1_ctrl_b_mux[] = {
-+	SCIFA1_RTS_N_B_MARK, SCIFA1_CTS_N_B_MARK,
-+};
-+static const unsigned int scifa1_data_c_pins[] = {
-+	/* RXD, TXD */
-+	RCAR_GP_PIN(0, 9), RCAR_GP_PIN(0, 10),
-+};
-+static const unsigned int scifa1_data_c_mux[] = {
-+	SCIFA1_RXD_C_MARK, SCIFA1_TXD_C_MARK,
-+};
-+static const unsigned int scifa1_clk_c_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(0, 8),
-+};
-+static const unsigned int scifa1_clk_c_mux[] = {
-+	SCIFA1_SCK_C_MARK,
-+};
-+static const unsigned int scifa1_ctrl_c_pins[] = {
-+	/* RTS, CTS */
-+	RCAR_GP_PIN(0, 12), RCAR_GP_PIN(0, 11),
-+};
-+static const unsigned int scifa1_ctrl_c_mux[] = {
-+	SCIFA1_RTS_N_C_MARK, SCIFA1_CTS_N_C_MARK,
-+};
-+static const unsigned int scifa1_data_d_pins[] = {
-+	/* RXD, TXD */
-+	RCAR_GP_PIN(2, 11), RCAR_GP_PIN(2, 12),
-+};
-+static const unsigned int scifa1_data_d_mux[] = {
-+	SCIFA1_RXD_D_MARK, SCIFA1_TXD_D_MARK,
-+};
-+static const unsigned int scifa1_clk_d_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(2, 10),
-+};
-+static const unsigned int scifa1_clk_d_mux[] = {
-+	SCIFA1_SCK_D_MARK,
-+};
-+static const unsigned int scifa1_ctrl_d_pins[] = {
-+	/* RTS, CTS */
-+	RCAR_GP_PIN(2, 14), RCAR_GP_PIN(2, 13),
-+};
-+static const unsigned int scifa1_ctrl_d_mux[] = {
-+	SCIFA1_RTS_N_D_MARK, SCIFA1_CTS_N_D_MARK,
-+};
-+/* - SCIFA2 ----------------------------------------------------------------- */
-+static const unsigned int scifa2_data_pins[] = {
-+	/* RXD, TXD */
-+	RCAR_GP_PIN(5, 5), RCAR_GP_PIN(5, 6),
-+};
-+static const unsigned int scifa2_data_mux[] = {
-+	SCIFA2_RXD_MARK, SCIFA2_TXD_MARK,
-+};
-+static const unsigned int scifa2_clk_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(5, 4),
-+};
-+static const unsigned int scifa2_clk_mux[] = {
-+	SCIFA2_SCK_MARK,
-+};
-+static const unsigned int scifa2_ctrl_pins[] = {
-+	/* RTS, CTS */
-+	RCAR_GP_PIN(4, 22), RCAR_GP_PIN(4, 21),
-+};
-+static const unsigned int scifa2_ctrl_mux[] = {
-+	SCIFA2_RTS_N_MARK, SCIFA2_CTS_N_MARK,
-+};
-+static const unsigned int scifa2_data_b_pins[] = {
-+	/* RXD, TXD */
-+	RCAR_GP_PIN(5, 13), RCAR_GP_PIN(5, 16),
-+};
-+static const unsigned int scifa2_data_b_mux[] = {
-+	SCIFA2_RXD_B_MARK, SCIFA2_TXD_B_MARK,
-+};
-+static const unsigned int scifa2_data_c_pins[] = {
-+	/* RXD, TXD */
-+	RCAR_GP_PIN(5, 31), RCAR_GP_PIN(5, 30),
-+};
-+static const unsigned int scifa2_data_c_mux[] = {
-+	SCIFA2_RXD_C_MARK, SCIFA2_TXD_C_MARK,
-+};
-+static const unsigned int scifa2_clk_c_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(5, 29),
-+};
-+static const unsigned int scifa2_clk_c_mux[] = {
-+	SCIFA2_SCK_C_MARK,
-+};
-+/* - SCIFB0 ----------------------------------------------------------------- */
-+static const unsigned int scifb0_data_pins[] = {
-+	/* RXD, TXD */
-+	RCAR_GP_PIN(4, 9), RCAR_GP_PIN(4, 10),
-+};
-+static const unsigned int scifb0_data_mux[] = {
-+	SCIFB0_RXD_MARK, SCIFB0_TXD_MARK,
-+};
-+static const unsigned int scifb0_clk_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(4, 8),
-+};
-+static const unsigned int scifb0_clk_mux[] = {
-+	SCIFB0_SCK_MARK,
-+};
-+static const unsigned int scifb0_ctrl_pins[] = {
-+	/* RTS, CTS */
-+	RCAR_GP_PIN(4, 12), RCAR_GP_PIN(4, 11),
-+};
-+static const unsigned int scifb0_ctrl_mux[] = {
-+	SCIFB0_RTS_N_MARK, SCIFB0_CTS_N_MARK,
-+};
-+static const unsigned int scifb0_data_b_pins[] = {
-+	/* RXD, TXD */
-+	RCAR_GP_PIN(3, 10), RCAR_GP_PIN(3, 11),
-+};
-+static const unsigned int scifb0_data_b_mux[] = {
-+	SCIFB0_RXD_B_MARK, SCIFB0_TXD_B_MARK,
-+};
-+static const unsigned int scifb0_clk_b_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(3, 9),
-+};
-+static const unsigned int scifb0_clk_b_mux[] = {
-+	SCIFB0_SCK_B_MARK,
-+};
-+static const unsigned int scifb0_ctrl_b_pins[] = {
-+	/* RTS, CTS */
-+	RCAR_GP_PIN(3, 13), RCAR_GP_PIN(3, 12),
-+};
-+static const unsigned int scifb0_ctrl_b_mux[] = {
-+	SCIFB0_RTS_N_B_MARK, SCIFB0_CTS_N_B_MARK,
-+};
-+static const unsigned int scifb0_data_c_pins[] = {
-+	/* RXD, TXD */
-+	RCAR_GP_PIN(0, 4), RCAR_GP_PIN(0, 5),
-+};
-+static const unsigned int scifb0_data_c_mux[] = {
-+	SCIFB0_RXD_C_MARK, SCIFB0_TXD_C_MARK,
-+};
-+/* - SCIFB1 ----------------------------------------------------------------- */
-+static const unsigned int scifb1_data_pins[] = {
-+	/* RXD, TXD */
-+	RCAR_GP_PIN(4, 15), RCAR_GP_PIN(4, 16),
-+};
-+static const unsigned int scifb1_data_mux[] = {
-+	SCIFB1_RXD_MARK, SCIFB1_TXD_MARK,
-+};
-+static const unsigned int scifb1_clk_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(4, 14),
-+};
-+static const unsigned int scifb1_clk_mux[] = {
-+	SCIFB1_SCK_MARK,
-+};
-+static const unsigned int scifb1_ctrl_pins[] = {
-+	/* RTS, CTS */
-+	RCAR_GP_PIN(4, 18), RCAR_GP_PIN(4, 17),
-+};
-+static const unsigned int scifb1_ctrl_mux[] = {
-+	SCIFB1_RTS_N_MARK, SCIFB1_CTS_N_MARK,
-+};
-+static const unsigned int scifb1_data_b_pins[] = {
-+	/* RXD, TXD */
-+	RCAR_GP_PIN(3, 2), RCAR_GP_PIN(3, 3),
-+};
-+static const unsigned int scifb1_data_b_mux[] = {
-+	SCIFB1_RXD_B_MARK, SCIFB1_TXD_B_MARK,
-+};
-+static const unsigned int scifb1_clk_b_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(3, 1),
-+};
-+static const unsigned int scifb1_clk_b_mux[] = {
-+	SCIFB1_SCK_B_MARK,
-+};
-+static const unsigned int scifb1_ctrl_b_pins[] = {
-+	/* RTS, CTS */
-+	RCAR_GP_PIN(3, 5), RCAR_GP_PIN(3, 4),
-+};
-+static const unsigned int scifb1_ctrl_b_mux[] = {
-+	SCIFB1_RTS_N_B_MARK, SCIFB1_CTS_N_B_MARK,
-+};
-+static const unsigned int scifb1_data_c_pins[] = {
-+	/* RXD, TXD */
-+	RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 15),
-+};
-+static const unsigned int scifb1_data_c_mux[] = {
-+	SCIFB1_RXD_C_MARK, SCIFB1_TXD_C_MARK,
-+};
-+static const unsigned int scifb1_data_d_pins[] = {
-+	/* RXD, TXD */
-+	RCAR_GP_PIN(4, 1), RCAR_GP_PIN(4, 2),
-+};
-+static const unsigned int scifb1_data_d_mux[] = {
-+	SCIFB1_RXD_D_MARK, SCIFB1_TXD_D_MARK,
-+};
-+static const unsigned int scifb1_data_e_pins[] = {
-+	/* RXD, TXD */
-+	RCAR_GP_PIN(3, 18), RCAR_GP_PIN(3, 19),
-+};
-+static const unsigned int scifb1_data_e_mux[] = {
-+	SCIFB1_RXD_E_MARK, SCIFB1_TXD_E_MARK,
-+};
-+static const unsigned int scifb1_clk_e_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(3, 17),
-+};
-+static const unsigned int scifb1_clk_e_mux[] = {
-+	SCIFB1_SCK_E_MARK,
-+};
-+static const unsigned int scifb1_data_f_pins[] = {
-+	/* RXD, TXD */
-+	RCAR_GP_PIN(0, 4), RCAR_GP_PIN(0, 5),
-+};
-+static const unsigned int scifb1_data_f_mux[] = {
-+	SCIFB1_RXD_F_MARK, SCIFB1_TXD_F_MARK,
-+};
-+static const unsigned int scifb1_data_g_pins[] = {
-+	/* RXD, TXD */
-+	RCAR_GP_PIN(2, 21), RCAR_GP_PIN(2, 22),
-+};
-+static const unsigned int scifb1_data_g_mux[] = {
-+	SCIFB1_RXD_G_MARK, SCIFB1_TXD_G_MARK,
-+};
-+static const unsigned int scifb1_clk_g_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(2, 20),
-+};
-+static const unsigned int scifb1_clk_g_mux[] = {
-+	SCIFB1_SCK_G_MARK,
-+};
-+/* - SCIFB2 ----------------------------------------------------------------- */
-+static const unsigned int scifb2_data_pins[] = {
-+	/* RXD, TXD */
-+	RCAR_GP_PIN(4, 22), RCAR_GP_PIN(4, 23),
-+};
-+static const unsigned int scifb2_data_mux[] = {
-+	SCIFB2_RXD_MARK, SCIFB2_TXD_MARK,
-+};
-+static const unsigned int scifb2_clk_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(4, 21),
-+};
-+static const unsigned int scifb2_clk_mux[] = {
-+	SCIFB2_SCK_MARK,
-+};
-+static const unsigned int scifb2_ctrl_pins[] = {
-+	/* RTS, CTS */
-+	RCAR_GP_PIN(4, 25), RCAR_GP_PIN(4, 24),
-+};
-+static const unsigned int scifb2_ctrl_mux[] = {
-+	SCIFB2_RTS_N_MARK, SCIFB2_CTS_N_MARK,
-+};
-+static const unsigned int scifb2_data_b_pins[] = {
-+	/* RXD, TXD */
-+	RCAR_GP_PIN(0, 28), RCAR_GP_PIN(0, 30),
-+};
-+static const unsigned int scifb2_data_b_mux[] = {
-+	SCIFB2_RXD_B_MARK, SCIFB2_TXD_B_MARK,
-+};
-+static const unsigned int scifb2_clk_b_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(0, 31),
-+};
-+static const unsigned int scifb2_clk_b_mux[] = {
-+	SCIFB2_SCK_B_MARK,
-+};
-+static const unsigned int scifb2_ctrl_b_pins[] = {
-+	/* RTS, CTS */
-+	RCAR_GP_PIN(0, 29), RCAR_GP_PIN(0, 27),
-+};
-+static const unsigned int scifb2_ctrl_b_mux[] = {
-+	SCIFB2_RTS_N_B_MARK, SCIFB2_CTS_N_B_MARK,
-+};
-+static const unsigned int scifb2_data_c_pins[] = {
-+	/* RXD, TXD */
-+	RCAR_GP_PIN(0, 24), RCAR_GP_PIN(0, 25),
-+};
-+static const unsigned int scifb2_data_c_mux[] = {
-+	SCIFB2_RXD_C_MARK, SCIFB2_TXD_C_MARK,
-+};
- 
- static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(eth_link),
-@@ -1894,6 +2350,70 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(intc_irq1),
- 	SH_PFC_PIN_GROUP(intc_irq2),
- 	SH_PFC_PIN_GROUP(intc_irq3),
-+	SH_PFC_PIN_GROUP(scif0_data),
-+	SH_PFC_PIN_GROUP(scif0_clk),
-+	SH_PFC_PIN_GROUP(scif0_ctrl),
-+	SH_PFC_PIN_GROUP(scif0_data_b),
-+	SH_PFC_PIN_GROUP(scif1_data),
-+	SH_PFC_PIN_GROUP(scif1_clk),
-+	SH_PFC_PIN_GROUP(scif1_ctrl),
-+	SH_PFC_PIN_GROUP(scif1_data_b),
-+	SH_PFC_PIN_GROUP(scif1_data_c),
-+	SH_PFC_PIN_GROUP(scif1_data_d),
-+	SH_PFC_PIN_GROUP(scif1_clk_d),
-+	SH_PFC_PIN_GROUP(scif1_data_e),
-+	SH_PFC_PIN_GROUP(scif1_clk_e),
-+	SH_PFC_PIN_GROUP(scifa0_data),
-+	SH_PFC_PIN_GROUP(scifa0_clk),
-+	SH_PFC_PIN_GROUP(scifa0_ctrl),
-+	SH_PFC_PIN_GROUP(scifa0_data_b),
-+	SH_PFC_PIN_GROUP(scifa0_clk_b),
-+	SH_PFC_PIN_GROUP(scifa0_ctrl_b),
-+	SH_PFC_PIN_GROUP(scifa1_data),
-+	SH_PFC_PIN_GROUP(scifa1_clk),
-+	SH_PFC_PIN_GROUP(scifa1_ctrl),
-+	SH_PFC_PIN_GROUP(scifa1_data_b),
-+	SH_PFC_PIN_GROUP(scifa1_clk_b),
-+	SH_PFC_PIN_GROUP(scifa1_ctrl_b),
-+	SH_PFC_PIN_GROUP(scifa1_data_c),
-+	SH_PFC_PIN_GROUP(scifa1_clk_c),
-+	SH_PFC_PIN_GROUP(scifa1_ctrl_c),
-+	SH_PFC_PIN_GROUP(scifa1_data_d),
-+	SH_PFC_PIN_GROUP(scifa1_clk_d),
-+	SH_PFC_PIN_GROUP(scifa1_ctrl_d),
-+	SH_PFC_PIN_GROUP(scifa2_data),
-+	SH_PFC_PIN_GROUP(scifa2_clk),
-+	SH_PFC_PIN_GROUP(scifa2_ctrl),
-+	SH_PFC_PIN_GROUP(scifa2_data_b),
-+	SH_PFC_PIN_GROUP(scifa2_data_c),
-+	SH_PFC_PIN_GROUP(scifa2_clk_c),
-+	SH_PFC_PIN_GROUP(scifb0_data),
-+	SH_PFC_PIN_GROUP(scifb0_clk),
-+	SH_PFC_PIN_GROUP(scifb0_ctrl),
-+	SH_PFC_PIN_GROUP(scifb0_data_b),
-+	SH_PFC_PIN_GROUP(scifb0_clk_b),
-+	SH_PFC_PIN_GROUP(scifb0_ctrl_b),
-+	SH_PFC_PIN_GROUP(scifb0_data_c),
-+	SH_PFC_PIN_GROUP(scifb1_data),
-+	SH_PFC_PIN_GROUP(scifb1_clk),
-+	SH_PFC_PIN_GROUP(scifb1_ctrl),
-+	SH_PFC_PIN_GROUP(scifb1_data_b),
-+	SH_PFC_PIN_GROUP(scifb1_clk_b),
-+	SH_PFC_PIN_GROUP(scifb1_ctrl_b),
-+	SH_PFC_PIN_GROUP(scifb1_data_c),
-+	SH_PFC_PIN_GROUP(scifb1_data_d),
-+	SH_PFC_PIN_GROUP(scifb1_data_e),
-+	SH_PFC_PIN_GROUP(scifb1_clk_e),
-+	SH_PFC_PIN_GROUP(scifb1_data_f),
-+	SH_PFC_PIN_GROUP(scifb1_data_g),
-+	SH_PFC_PIN_GROUP(scifb1_clk_g),
-+	SH_PFC_PIN_GROUP(scifb2_data),
-+	SH_PFC_PIN_GROUP(scifb2_clk),
-+	SH_PFC_PIN_GROUP(scifb2_ctrl),
-+	SH_PFC_PIN_GROUP(scifb2_data_b),
-+	SH_PFC_PIN_GROUP(scifb2_clk_b),
-+	SH_PFC_PIN_GROUP(scifb2_ctrl_b),
-+	SH_PFC_PIN_GROUP(scifb2_data_c),
- };
- 
- static const char * const eth_groups[] = {
-@@ -1909,9 +2429,106 @@ static const char * const intc_groups[] = {
- 	"intc_irq2",
- 	"intc_irq3",
- };
-+
-+static const char * const scif0_groups[] = {
-+	"scif0_data",
-+	"scif0_clk",
-+	"scif0_ctrl",
-+	"scif0_data_b",
-+};
-+
-+static const char * const scif1_groups[] = {
-+	"scif1_data",
-+	"scif1_clk",
-+	"scif1_ctrl",
-+	"scif1_data_b",
-+	"scif1_data_c",
-+	"scif1_data_d",
-+	"scif1_clk_d",
-+	"scif1_data_e",
-+	"scif1_clk_e",
-+};
-+
-+static const char * const scifa0_groups[] = {
-+	"scifa0_data",
-+	"scifa0_clk",
-+	"scifa0_ctrl",
-+	"scifa0_data_b",
-+	"scifa0_clk_b",
-+	"scifa0_ctrl_b",
-+};
-+
-+static const char * const scifa1_groups[] = {
-+	"scifa1_data",
-+	"scifa1_clk",
-+	"scifa1_ctrl",
-+	"scifa1_data_b",
-+	"scifa1_clk_b",
-+	"scifa1_ctrl_b",
-+	"scifa1_data_c",
-+	"scifa1_clk_c",
-+	"scifa1_ctrl_c",
-+	"scifa1_data_d",
-+	"scifa1_clk_d",
-+	"scifa1_ctrl_d",
-+};
-+
-+static const char * const scifa2_groups[] = {
-+	"scifa2_data",
-+	"scifa2_clk",
-+	"scifa2_ctrl",
-+	"scifa2_data_b",
-+	"scifa2_data_c",
-+	"scifa2_clk_c",
-+};
-+
-+static const char * const scifb0_groups[] = {
-+	"scifb0_data",
-+	"scifb0_clk",
-+	"scifb0_ctrl",
-+	"scifb0_data_b",
-+	"scifb0_clk_b",
-+	"scifb0_ctrl_b",
-+	"scifb0_data_c",
-+};
-+
-+static const char * const scifb1_groups[] = {
-+	"scifb1_data",
-+	"scifb1_clk",
-+	"scifb1_ctrl",
-+	"scifb1_data_b",
-+	"scifb1_clk_b",
-+	"scifb1_ctrl_b",
-+	"scifb1_data_c",
-+	"scifb1_data_d",
-+	"scifb1_data_e",
-+	"scifb1_clk_e",
-+	"scifb1_data_f",
-+	"scifb1_data_g",
-+	"scifb1_clk_g",
-+};
-+
-+static const char * const scifb2_groups[] = {
-+	"scifb2_data",
-+	"scifb2_clk",
-+	"scifb2_ctrl",
-+	"scifb2_data_b",
-+	"scifb2_clk_b",
-+	"scifb2_ctrl_b",
-+	"scifb2_data_c",
-+};
-+
- static const struct sh_pfc_function pinmux_functions[] = {
- 	SH_PFC_FUNCTION(eth),
- 	SH_PFC_FUNCTION(intc),
-+	SH_PFC_FUNCTION(scif0),
-+	SH_PFC_FUNCTION(scif1),
-+	SH_PFC_FUNCTION(scifa0),
-+	SH_PFC_FUNCTION(scifa1),
-+	SH_PFC_FUNCTION(scifa2),
-+	SH_PFC_FUNCTION(scifb0),
-+	SH_PFC_FUNCTION(scifb1),
-+	SH_PFC_FUNCTION(scifb2),
- };
- 
- #define PINMUX_FN_BASE	ARRAY_SIZE(pinmux_pins)
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0088-ARM-arch_timer-add-support-to-configure-and-enable-e.patch b/patches.renesas/0088-ARM-arch_timer-add-support-to-configure-and-enable-e.patch
deleted file mode 100644
index 6457aa9b028cb..0000000000000
--- a/patches.renesas/0088-ARM-arch_timer-add-support-to-configure-and-enable-e.patch
+++ /dev/null
@@ -1,104 +0,0 @@
-From f2cdb0ee7821bd104da55490b74da715ad1a3e9f Mon Sep 17 00:00:00 2001
-From: Sudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com>
-Date: Tue, 13 Aug 2013 14:30:32 +0100
-Subject: ARM: arch_timer: add support to configure and enable event stream
-
-This patch adds support for configuring the event stream frequency
-and enabling it.
-
-It also adds the hwcaps definitions to the user to detect this event
-stream feature.
-
-Cc: Russell King <linux@arm.linux.org.uk>
-Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
-Acked-by: Catalin Marinas <catalin.marinas@arm.com>
-Acked-by: Will Deacon <will.deacon@arm.com>
-Acked-by: Olof Johansson <olof@lixom.net>
-Signed-off-by: Sudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com>
-(cherry picked from commit e9faebc66ec74f1ab7f267d683b45e80faa69763)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-	arch/arm/include/asm/arch_timer.h
----
- arch/arm/include/asm/arch_timer.h | 27 ++++++++++++++++++++++++---
- arch/arm/include/uapi/asm/hwcap.h |  1 +
- arch/arm/kernel/setup.c           |  1 +
- 3 files changed, 26 insertions(+), 3 deletions(-)
-
-diff --git a/arch/arm/include/asm/arch_timer.h b/arch/arm/include/asm/arch_timer.h
-index c78c4cbd329e..0704e0cf5571 100644
---- a/arch/arm/include/asm/arch_timer.h
-+++ b/arch/arm/include/asm/arch_timer.h
-@@ -87,11 +87,21 @@ static inline u64 arch_counter_get_cntvct(void)
- 	return cval;
- }
- 
--static inline void __cpuinit arch_counter_set_user_access(void)
-+static inline u32 arch_timer_get_cntkctl(void)
- {
- 	u32 cntkctl;
--
- 	asm volatile("mrc p15, 0, %0, c14, c1, 0" : "=r" (cntkctl));
-+	return cntkctl;
-+}
-+
-+static inline void arch_timer_set_cntkctl(u32 cntkctl)
-+{
-+	asm volatile("mcr p15, 0, %0, c14, c1, 0" : : "r" (cntkctl));
-+}
-+
-+static inline void arch_counter_set_user_access(void)
-+{
-+	u32 cntkctl = arch_timer_get_cntkctl();
- 
- 	/* Disable user access to both physical/virtual counters/timers */
- 	/* Also disable virtual event stream */
-@@ -100,9 +110,20 @@ static inline void __cpuinit arch_counter_set_user_access(void)
- 			| ARCH_TIMER_VIRT_EVT_EN
- 			| ARCH_TIMER_USR_VCT_ACCESS_EN
- 			| ARCH_TIMER_USR_PCT_ACCESS_EN);
-+	arch_timer_set_cntkctl(cntkctl);
-+}
- 
--	asm volatile("mcr p15, 0, %0, c14, c1, 0" : : "r" (cntkctl));
-+static inline void arch_timer_evtstrm_enable(int divider)
-+{
-+	u32 cntkctl = arch_timer_get_cntkctl();
-+	cntkctl &= ~ARCH_TIMER_EVT_TRIGGER_MASK;
-+	/* Set the divider and enable virtual event stream */
-+	cntkctl |= (divider << ARCH_TIMER_EVT_TRIGGER_SHIFT)
-+			| ARCH_TIMER_VIRT_EVT_EN;
-+	arch_timer_set_cntkctl(cntkctl);
-+	elf_hwcap |= HWCAP_EVTSTRM;
- }
-+
- #endif
- 
- #endif
-diff --git a/arch/arm/include/uapi/asm/hwcap.h b/arch/arm/include/uapi/asm/hwcap.h
-index 6d34d080372a..7dcc10d67253 100644
---- a/arch/arm/include/uapi/asm/hwcap.h
-+++ b/arch/arm/include/uapi/asm/hwcap.h
-@@ -26,5 +26,6 @@
- #define HWCAP_VFPD32	(1 << 19)	/* set if VFP has 32 regs (not 16) */
- #define HWCAP_IDIV	(HWCAP_IDIVA | HWCAP_IDIVT)
- #define HWCAP_LPAE	(1 << 20)
-+#define HWCAP_EVTSTRM	(1 << 21)
- 
- #endif /* _UAPI__ASMARM_HWCAP_H */
-diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
-index 6cc3db43e897..d62772f49907 100644
---- a/arch/arm/kernel/setup.c
-+++ b/arch/arm/kernel/setup.c
-@@ -878,6 +878,7 @@ static const char *hwcap_str[] = {
- 	"idiva",
- 	"idivt",
- 	"lpae",
-+	"evtstrm",
- 	NULL
- };
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0088-ARM-shmobile-Remove-legacy-KZM9D-board-code.patch b/patches.renesas/0088-ARM-shmobile-Remove-legacy-KZM9D-board-code.patch
deleted file mode 100644
index 988161df19171..0000000000000
--- a/patches.renesas/0088-ARM-shmobile-Remove-legacy-KZM9D-board-code.patch
+++ /dev/null
@@ -1,165 +0,0 @@
-From 78faf583949a6c4508016a4de0dcf6e92b7be9fe Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Thu, 7 Nov 2013 08:21:29 +0900
-Subject: ARM: shmobile: Remove legacy KZM9D board code
-
-Remove the C and platform device version of KZM9D.
-
-The DT version of KZM9D board support can now instead
-directly be used with SoC specific code in setup-emev2.c.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 786deb29e7b7c356342f9f3566a6eafae2ce0c81)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/Kconfig       |  6 ---
- arch/arm/mach-shmobile/Makefile      |  1 -
- arch/arm/mach-shmobile/Makefile.boot |  1 -
- arch/arm/mach-shmobile/board-kzm9d.c | 92 ------------------------------------
- 4 files changed, 100 deletions(-)
- delete mode 100644 arch/arm/mach-shmobile/board-kzm9d.c
-
-diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
-index c604ef1cd9d1..564e0ade3472 100644
---- a/arch/arm/mach-shmobile/Kconfig
-+++ b/arch/arm/mach-shmobile/Kconfig
-@@ -234,12 +234,6 @@ config MACH_KOELSCH
- 	depends on ARCH_R8A7791
- 	select USE_OF
- 
--config MACH_KZM9D
--	bool "KZM9D board"
--	depends on ARCH_EMEV2
--	select REGULATOR_FIXED_VOLTAGE if REGULATOR
--	select USE_OF
--
- config MACH_KZM9G
- 	bool "KZM-A9-GT board"
- 	depends on ARCH_SH73A0
-diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
-index 51db2bcafabf..c7e877499dc2 100644
---- a/arch/arm/mach-shmobile/Makefile
-+++ b/arch/arm/mach-shmobile/Makefile
-@@ -71,7 +71,6 @@ obj-$(CONFIG_MACH_LAGER_REFERENCE)	+= board-lager-reference.o
- obj-$(CONFIG_MACH_ARMADILLO800EVA)	+= board-armadillo800eva.o
- obj-$(CONFIG_MACH_ARMADILLO800EVA_REFERENCE)	+= board-armadillo800eva-reference.o
- obj-$(CONFIG_MACH_KOELSCH)	+= board-koelsch.o
--obj-$(CONFIG_MACH_KZM9D)	+= board-kzm9d.o
- obj-$(CONFIG_MACH_KZM9G)	+= board-kzm9g.o
- obj-$(CONFIG_MACH_KZM9G_REFERENCE)	+= board-kzm9g-reference.o
- endif
-diff --git a/arch/arm/mach-shmobile/Makefile.boot b/arch/arm/mach-shmobile/Makefile.boot
-index 391d72a5536c..4f30e3dc0919 100644
---- a/arch/arm/mach-shmobile/Makefile.boot
-+++ b/arch/arm/mach-shmobile/Makefile.boot
-@@ -8,7 +8,6 @@ loadaddr-$(CONFIG_MACH_BOCKW) += 0x60008000
- loadaddr-$(CONFIG_MACH_BOCKW_REFERENCE) += 0x60008000
- loadaddr-$(CONFIG_MACH_GENMAI) += 0x8008000
- loadaddr-$(CONFIG_MACH_KOELSCH) += 0x40008000
--loadaddr-$(CONFIG_MACH_KZM9D) += 0x40008000
- loadaddr-$(CONFIG_MACH_KZM9G) += 0x41008000
- loadaddr-$(CONFIG_MACH_KZM9G_REFERENCE) += 0x41008000
- loadaddr-$(CONFIG_MACH_LAGER) += 0x40008000
-diff --git a/arch/arm/mach-shmobile/board-kzm9d.c b/arch/arm/mach-shmobile/board-kzm9d.c
-deleted file mode 100644
-index 30c2cc695b12..000000000000
---- a/arch/arm/mach-shmobile/board-kzm9d.c
-+++ /dev/null
-@@ -1,92 +0,0 @@
--/*
-- * kzm9d board support
-- *
-- * Copyright (C) 2012  Renesas Solutions Corp.
-- * Copyright (C) 2012  Magnus Damm
-- *
-- * This program is free software; you can redistribute it and/or modify
-- * it under the terms of the GNU General Public License as published by
-- * the Free Software Foundation; version 2 of the License.
-- *
-- * This program is distributed in the hope that it will be useful,
-- * but WITHOUT ANY WARRANTY; without even the implied warranty of
-- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-- * GNU General Public License for more details.
-- *
-- * You should have received a copy of the GNU General Public License
-- * along with this program; if not, write to the Free Software
-- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
-- */
--
--#include <linux/kernel.h>
--#include <linux/interrupt.h>
--#include <linux/platform_device.h>
--#include <linux/regulator/fixed.h>
--#include <linux/regulator/machine.h>
--#include <linux/smsc911x.h>
--#include <mach/common.h>
--#include <mach/emev2.h>
--#include <asm/mach-types.h>
--#include <asm/mach/arch.h>
--
--/* Dummy supplies, where voltage doesn't matter */
--static struct regulator_consumer_supply dummy_supplies[] = {
--	REGULATOR_SUPPLY("vddvario", "smsc911x"),
--	REGULATOR_SUPPLY("vdd33a", "smsc911x"),
--};
--
--/* Ether */
--static struct resource smsc911x_resources[] = {
--	[0] = {
--		.start	= 0x20000000,
--		.end	= 0x2000ffff,
--		.flags	= IORESOURCE_MEM,
--	},
--	[1] = {
--		.start	= EMEV2_GPIO_IRQ(1),
--		.flags	= IORESOURCE_IRQ | IRQF_TRIGGER_HIGH,
--	},
--};
--
--static struct smsc911x_platform_config smsc911x_platdata = {
--	.flags		= SMSC911X_USE_32BIT,
--	.irq_type	= SMSC911X_IRQ_TYPE_PUSH_PULL,
--	.irq_polarity	= SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
--};
--
--static struct platform_device smsc91x_device = {
--	.name	= "smsc911x",
--	.id	= -1,
--	.dev	= {
--		  .platform_data = &smsc911x_platdata,
--		},
--	.num_resources	= ARRAY_SIZE(smsc911x_resources),
--	.resource	= smsc911x_resources,
--};
--
--static struct platform_device *kzm9d_devices[] __initdata = {
--	&smsc91x_device,
--};
--
--void __init kzm9d_add_standard_devices(void)
--{
--	regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
--
--	emev2_add_standard_devices();
--
--	platform_add_devices(kzm9d_devices, ARRAY_SIZE(kzm9d_devices));
--}
--
--static const char *kzm9d_boards_compat_dt[] __initdata = {
--	"renesas,kzm9d",
--	NULL,
--};
--
--DT_MACHINE_START(KZM9D_DT, "kzm9d")
--	.smp		= smp_ops(emev2_smp_ops),
--	.map_io		= emev2_map_io,
--	.init_early	= emev2_init_delay,
--	.init_machine	= kzm9d_add_standard_devices,
--	.init_late	= shmobile_init_late,
--	.dt_compat	= kzm9d_boards_compat_dt,
--MACHINE_END
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0088-sh-pfc-r8a7790-Remove-GPIO-data.patch b/patches.renesas/0088-sh-pfc-r8a7790-Remove-GPIO-data.patch
deleted file mode 100644
index 8b894c3e01f18..0000000000000
--- a/patches.renesas/0088-sh-pfc-r8a7790-Remove-GPIO-data.patch
+++ /dev/null
@@ -1,196 +0,0 @@
-From 797c262c4d8dba533352546095d3b0c112d0e9e7 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Mon, 8 Apr 2013 11:36:18 +0200
-Subject: sh-pfc: r8a7790: Remove GPIO data
-
-GPIOs are now handled by a separate driver, remove GPIO data from the
-SoC information structure.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 30e4247e5b4d67d26668003f63f3b12d1263503f)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 133 +----------------------------------
- 1 file changed, 1 insertion(+), 132 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-index 54c1e10a..7716a1e2 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-@@ -52,32 +52,12 @@
- 	CPU_32_PORT(fn, pfx##_5_, sfx)				\
- 
- #define _GP_GPIO(pfx, sfx) PINMUX_GPIO(GPIO_GP##pfx, GP##pfx##_DATA)
--#define _GP_DATA(pfx, sfx) PINMUX_DATA(GP##pfx##_DATA, GP##pfx##_FN,	\
--				       GP##pfx##_IN, GP##pfx##_OUT)
--
--#define _GP_INOUTSEL(pfx, sfx) GP##pfx##_IN, GP##pfx##_OUT
--#define _GP_INDT(pfx, sfx) GP##pfx##_DATA
-+#define _GP_DATA(pfx, sfx) PINMUX_DATA(GP##pfx##_DATA, GP##pfx##_FN)
- 
- #define GP_ALL(str)	CPU_ALL_PORT(_PORT_ALL, GP, str)
- #define PINMUX_GPIO_GP_ALL()	CPU_ALL_PORT(_GP_GPIO, , unused)
- #define PINMUX_DATA_GP_ALL()	CPU_ALL_PORT(_GP_DATA, , unused)
- 
--
--#define PORT_10_REV(fn, pfx, sfx)				\
--	PORT_1(fn, pfx##9, sfx), PORT_1(fn, pfx##8, sfx),	\
--	PORT_1(fn, pfx##7, sfx), PORT_1(fn, pfx##6, sfx),	\
--	PORT_1(fn, pfx##5, sfx), PORT_1(fn, pfx##4, sfx),	\
--	PORT_1(fn, pfx##3, sfx), PORT_1(fn, pfx##2, sfx),	\
--	PORT_1(fn, pfx##1, sfx), PORT_1(fn, pfx##0, sfx)
--
--#define CPU_32_PORT_REV(fn, pfx, sfx)					\
--	PORT_1(fn, pfx##31, sfx), PORT_1(fn, pfx##30, sfx),		\
--	PORT_10_REV(fn, pfx##2, sfx), PORT_10_REV(fn, pfx##1, sfx),	\
--	PORT_10_REV(fn, pfx, sfx)
--
--#define GP_INOUTSEL(bank) CPU_32_PORT_REV(_GP_INOUTSEL, _##bank##_, unused)
--#define GP_INDT(bank) CPU_32_PORT_REV(_GP_INDT, _##bank##_, unused)
--
- #define PINMUX_IPSR_DATA(ipsr, fn) PINMUX_DATA(fn##_MARK, FN_##ipsr, FN_##fn)
- #define PINMUX_IPSR_MODSEL_DATA(ipsr, fn, ms) PINMUX_DATA(fn##_MARK, FN_##ms, \
- 							  FN_##ipsr, FN_##fn)
-@@ -89,14 +69,6 @@ enum {
- 	GP_ALL(DATA),
- 	PINMUX_DATA_END,
- 
--	PINMUX_INPUT_BEGIN,
--	GP_ALL(IN),
--	PINMUX_INPUT_END,
--
--	PINMUX_OUTPUT_BEGIN,
--	GP_ALL(OUT),
--	PINMUX_OUTPUT_END,
--
- 	PINMUX_FUNCTION_BEGIN,
- 	GP_ALL(FN),
- 
-@@ -3824,106 +3796,6 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
- 		/* SEL_I2C1 [2] */
- 		FN_SEL_I2C1_0, FN_SEL_I2C1_1, FN_SEL_I2C1_2, 0, }
- 	},
--	{ PINMUX_CFG_REG("INOUTSEL0", 0xE6050004, 32, 1) { GP_INOUTSEL(0) } },
--	{ PINMUX_CFG_REG("INOUTSEL1", 0xE6051004, 32, 1) {
--		0, 0,
--		0, 0,
--		GP_1_29_IN, GP_1_29_OUT,
--		GP_1_28_IN, GP_1_28_OUT,
--		GP_1_27_IN, GP_1_27_OUT,
--		GP_1_26_IN, GP_1_26_OUT,
--		GP_1_25_IN, GP_1_25_OUT,
--		GP_1_24_IN, GP_1_24_OUT,
--		GP_1_23_IN, GP_1_23_OUT,
--		GP_1_22_IN, GP_1_22_OUT,
--		GP_1_21_IN, GP_1_21_OUT,
--		GP_1_20_IN, GP_1_20_OUT,
--		GP_1_19_IN, GP_1_19_OUT,
--		GP_1_18_IN, GP_1_18_OUT,
--		GP_1_17_IN, GP_1_17_OUT,
--		GP_1_16_IN, GP_1_16_OUT,
--		GP_1_15_IN, GP_1_15_OUT,
--		GP_1_14_IN, GP_1_14_OUT,
--		GP_1_13_IN, GP_1_13_OUT,
--		GP_1_12_IN, GP_1_12_OUT,
--		GP_1_11_IN, GP_1_11_OUT,
--		GP_1_10_IN, GP_1_10_OUT,
--		GP_1_9_IN, GP_1_9_OUT,
--		GP_1_8_IN, GP_1_8_OUT,
--		GP_1_7_IN, GP_1_7_OUT,
--		GP_1_6_IN, GP_1_6_OUT,
--		GP_1_5_IN, GP_1_5_OUT,
--		GP_1_4_IN, GP_1_4_OUT,
--		GP_1_3_IN, GP_1_3_OUT,
--		GP_1_2_IN, GP_1_2_OUT,
--		GP_1_1_IN, GP_1_1_OUT,
--		GP_1_0_IN, GP_1_0_OUT, }
--	},
--	{ PINMUX_CFG_REG("INOUTSEL2", 0xE6052004, 32, 1) {
--		0, 0,
--		0, 0,
--		GP_2_29_IN, GP_2_29_OUT,
--		GP_2_28_IN, GP_2_28_OUT,
--		GP_2_27_IN, GP_2_27_OUT,
--		GP_2_26_IN, GP_2_26_OUT,
--		GP_2_25_IN, GP_2_25_OUT,
--		GP_2_24_IN, GP_2_24_OUT,
--		GP_2_23_IN, GP_2_23_OUT,
--		GP_2_22_IN, GP_2_22_OUT,
--		GP_2_21_IN, GP_2_21_OUT,
--		GP_2_20_IN, GP_2_20_OUT,
--		GP_2_19_IN, GP_2_19_OUT,
--		GP_2_18_IN, GP_2_18_OUT,
--		GP_2_17_IN, GP_2_17_OUT,
--		GP_2_16_IN, GP_2_16_OUT,
--		GP_2_15_IN, GP_2_15_OUT,
--		GP_2_14_IN, GP_2_14_OUT,
--		GP_2_13_IN, GP_2_13_OUT,
--		GP_2_12_IN, GP_2_12_OUT,
--		GP_2_11_IN, GP_2_11_OUT,
--		GP_2_10_IN, GP_2_10_OUT,
--		GP_2_9_IN, GP_2_9_OUT,
--		GP_2_8_IN, GP_2_8_OUT,
--		GP_2_7_IN, GP_2_7_OUT,
--		GP_2_6_IN, GP_2_6_OUT,
--		GP_2_5_IN, GP_2_5_OUT,
--		GP_2_4_IN, GP_2_4_OUT,
--		GP_2_3_IN, GP_2_3_OUT,
--		GP_2_2_IN, GP_2_2_OUT,
--		GP_2_1_IN, GP_2_1_OUT,
--		GP_2_0_IN, GP_2_0_OUT, }
--	},
--	{ PINMUX_CFG_REG("INOUTSEL3", 0xE6053004, 32, 1) { GP_INOUTSEL(3) } },
--	{ PINMUX_CFG_REG("INOUTSEL4", 0xE6054004, 32, 1) { GP_INOUTSEL(4) } },
--	{ PINMUX_CFG_REG("INOUTSEL5", 0xE6055004, 32, 1) { GP_INOUTSEL(5) } },
--	{ },
--};
--
--static const struct pinmux_data_reg pinmux_data_regs[] = {
--	{ PINMUX_DATA_REG("INDT0", 0xE605000C, 32) { GP_INDT(0) } },
--	{ PINMUX_DATA_REG("INDT1", 0xE605100C, 32) {
--		0, 0, GP_1_29_DATA, GP_1_28_DATA,
--		GP_1_27_DATA, GP_1_26_DATA, GP_1_25_DATA, GP_1_24_DATA,
--		GP_1_23_DATA, GP_1_22_DATA, GP_1_21_DATA, GP_1_20_DATA,
--		GP_1_19_DATA, GP_1_18_DATA, GP_1_17_DATA, GP_1_16_DATA,
--		GP_1_15_DATA, GP_1_14_DATA, GP_1_13_DATA, GP_1_12_DATA,
--		GP_1_11_DATA, GP_1_10_DATA, GP_1_9_DATA, GP_1_8_DATA,
--		GP_1_7_DATA, GP_1_6_DATA, GP_1_5_DATA, GP_1_4_DATA,
--		GP_1_3_DATA, GP_1_2_DATA, GP_1_1_DATA, GP_1_0_DATA }
--	},
--	{ PINMUX_DATA_REG("INDT2", 0xE605200C, 32) {
--		0, 0, GP_2_29_DATA, GP_2_28_DATA,
--		GP_2_27_DATA, GP_2_26_DATA, GP_2_25_DATA, GP_2_24_DATA,
--		GP_2_23_DATA, GP_2_22_DATA, GP_2_21_DATA, GP_2_20_DATA,
--		GP_2_19_DATA, GP_2_18_DATA, GP_2_17_DATA, GP_2_16_DATA,
--		GP_2_15_DATA, GP_2_14_DATA, GP_2_13_DATA, GP_2_12_DATA,
--		GP_2_11_DATA, GP_2_10_DATA, GP_2_9_DATA, GP_2_8_DATA,
--		GP_2_7_DATA, GP_2_6_DATA, GP_2_5_DATA, GP_2_4_DATA,
--		GP_2_3_DATA, GP_2_2_DATA, GP_2_1_DATA, GP_2_0_DATA }
--	},
--	{ PINMUX_DATA_REG("INDT3", 0xE605300C, 32) { GP_INDT(3) } },
--	{ PINMUX_DATA_REG("INDT4", 0xE605400C, 32) { GP_INDT(4) } },
--	{ PINMUX_DATA_REG("INDT5", 0xE605500C, 32) { GP_INDT(5) } },
- 	{ },
- };
- 
-@@ -3931,8 +3803,6 @@ const struct sh_pfc_soc_info r8a7790_pinmux_info = {
- 	.name = "r8a77900_pfc",
- 	.unlock_reg = 0xe6060000, /* PMMR */
- 
--	.input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
--	.output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
- 	.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
- 
- 	.pins = pinmux_pins,
-@@ -3946,7 +3816,6 @@ const struct sh_pfc_soc_info r8a7790_pinmux_info = {
- 	.nr_func_gpios	= ARRAY_SIZE(pinmux_func_gpios),
- 
- 	.cfg_regs = pinmux_config_regs,
--	.data_regs = pinmux_data_regs,
- 
- 	.gpio_data = pinmux_data,
- 	.gpio_data_size = ARRAY_SIZE(pinmux_data),
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0089-ARM-shmobile-Remove-legacy-platform-devices-from-EME.patch b/patches.renesas/0089-ARM-shmobile-Remove-legacy-platform-devices-from-EME.patch
deleted file mode 100644
index 2b7085c7b1c42..0000000000000
--- a/patches.renesas/0089-ARM-shmobile-Remove-legacy-platform-devices-from-EME.patch
+++ /dev/null
@@ -1,211 +0,0 @@
-From 6915d2628773cc1786f835c6dbf8ab1ff8517418 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Thu, 7 Nov 2013 08:21:38 +0900
-Subject: ARM: shmobile: Remove legacy platform devices from EMEV2 SoC code
-
-Now when KZM9D legacy C board support code is
-gone then remove emev2_add_standard_devices()
-and all the platform devices from setup-emev2.c.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 59032702ead9056231f273e0e99655c2f2280491)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/include/mach/emev2.h |   5 -
- arch/arm/mach-shmobile/setup-emev2.c        | 148 ----------------------------
- 2 files changed, 153 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/include/mach/emev2.h b/arch/arm/mach-shmobile/include/mach/emev2.h
-index c2eb7568d9be..fcb142a14e07 100644
---- a/arch/arm/mach-shmobile/include/mach/emev2.h
-+++ b/arch/arm/mach-shmobile/include/mach/emev2.h
-@@ -3,12 +3,7 @@
- 
- extern void emev2_map_io(void);
- extern void emev2_init_delay(void);
--extern void emev2_add_standard_devices(void);
- extern void emev2_clock_init(void);
--
--#define EMEV2_GPIO_BASE 200
--#define EMEV2_GPIO_IRQ(n) (EMEV2_GPIO_BASE + (n))
--
- extern struct smp_operations emev2_smp_ops;
- 
- #endif /* __ASM_EMEV2_H__ */
-diff --git a/arch/arm/mach-shmobile/setup-emev2.c b/arch/arm/mach-shmobile/setup-emev2.c
-index 4d39bf49aae2..e7031b071274 100644
---- a/arch/arm/mach-shmobile/setup-emev2.c
-+++ b/arch/arm/mach-shmobile/setup-emev2.c
-@@ -19,22 +19,12 @@
- #include <linux/clk-provider.h>
- #include <linux/kernel.h>
- #include <linux/init.h>
--#include <linux/interrupt.h>
--#include <linux/irq.h>
--#include <linux/platform_device.h>
--#include <linux/platform_data/gpio-em.h>
- #include <linux/of_platform.h>
--#include <linux/delay.h>
--#include <linux/input.h>
--#include <linux/io.h>
--#include <linux/irqchip/arm-gic.h>
- #include <mach/common.h>
- #include <mach/emev2.h>
--#include <mach/irqs.h>
- #include <asm/mach-types.h>
- #include <asm/mach/arch.h>
- #include <asm/mach/map.h>
--#include <asm/mach/time.h>
- 
- static struct map_desc emev2_io_desc[] __initdata = {
- #ifdef CONFIG_SMP
-@@ -53,144 +43,6 @@ void __init emev2_map_io(void)
- 	iotable_init(emev2_io_desc, ARRAY_SIZE(emev2_io_desc));
- }
- 
--/* UART */
--static struct resource uart0_resources[] = {
--	DEFINE_RES_MEM(0xe1020000, 0x38),
--	DEFINE_RES_IRQ(40),
--};
--
--static struct resource uart1_resources[] = {
--	DEFINE_RES_MEM(0xe1030000, 0x38),
--	DEFINE_RES_IRQ(41),
--};
--
--static struct resource uart2_resources[] = {
--	DEFINE_RES_MEM(0xe1040000, 0x38),
--	DEFINE_RES_IRQ(42),
--};
--
--static struct resource uart3_resources[] = {
--	DEFINE_RES_MEM(0xe1050000, 0x38),
--	DEFINE_RES_IRQ(43),
--};
--
--#define emev2_register_uart(idx)					\
--	platform_device_register_simple("serial8250-em", idx,		\
--					uart##idx##_resources,		\
--					ARRAY_SIZE(uart##idx##_resources))
--
--/* STI */
--static struct resource sti_resources[] = {
--	DEFINE_RES_MEM(0xe0180000, 0x54),
--	DEFINE_RES_IRQ(157),
--};
--
--#define emev2_register_sti()					\
--	platform_device_register_simple("em_sti", 0,		\
--					sti_resources,		\
--					ARRAY_SIZE(sti_resources))
--
--/* GIO */
--static struct gpio_em_config gio0_config = {
--	.gpio_base = 0,
--	.irq_base = EMEV2_GPIO_IRQ(0),
--	.number_of_pins = 32,
--};
--
--static struct resource gio0_resources[] = {
--	DEFINE_RES_MEM(0xe0050000, 0x2c),
--	DEFINE_RES_MEM(0xe0050040, 0x20),
--	DEFINE_RES_IRQ(99),
--	DEFINE_RES_IRQ(100),
--};
--
--static struct gpio_em_config gio1_config = {
--	.gpio_base = 32,
--	.irq_base = EMEV2_GPIO_IRQ(32),
--	.number_of_pins = 32,
--};
--
--static struct resource gio1_resources[] = {
--	DEFINE_RES_MEM(0xe0050080, 0x2c),
--	DEFINE_RES_MEM(0xe00500c0, 0x20),
--	DEFINE_RES_IRQ(101),
--	DEFINE_RES_IRQ(102),
--};
--
--static struct gpio_em_config gio2_config = {
--	.gpio_base = 64,
--	.irq_base = EMEV2_GPIO_IRQ(64),
--	.number_of_pins = 32,
--};
--
--static struct resource gio2_resources[] = {
--	DEFINE_RES_MEM(0xe0050100, 0x2c),
--	DEFINE_RES_MEM(0xe0050140, 0x20),
--	DEFINE_RES_IRQ(103),
--	DEFINE_RES_IRQ(104),
--};
--
--static struct gpio_em_config gio3_config = {
--	.gpio_base = 96,
--	.irq_base = EMEV2_GPIO_IRQ(96),
--	.number_of_pins = 32,
--};
--
--static struct resource gio3_resources[] = {
--	DEFINE_RES_MEM(0xe0050180, 0x2c),
--	DEFINE_RES_MEM(0xe00501c0, 0x20),
--	DEFINE_RES_IRQ(105),
--	DEFINE_RES_IRQ(106),
--};
--
--static struct gpio_em_config gio4_config = {
--	.gpio_base = 128,
--	.irq_base = EMEV2_GPIO_IRQ(128),
--	.number_of_pins = 31,
--};
--
--static struct resource gio4_resources[] = {
--	DEFINE_RES_MEM(0xe0050200, 0x2c),
--	DEFINE_RES_MEM(0xe0050240, 0x20),
--	DEFINE_RES_IRQ(107),
--	DEFINE_RES_IRQ(108),
--};
--
--#define emev2_register_gio(idx)						\
--	platform_device_register_resndata(&platform_bus, "em_gio",	\
--					  idx, gio##idx##_resources,	\
--					  ARRAY_SIZE(gio##idx##_resources), \
--					  &gio##idx##_config,		\
--					  sizeof(struct gpio_em_config))
--
--static struct resource pmu_resources[] = {
--	DEFINE_RES_IRQ(152),
--	DEFINE_RES_IRQ(153),
--};
--
--#define emev2_register_pmu()					\
--	platform_device_register_simple("arm-pmu", -1,		\
--					pmu_resources,		\
--					ARRAY_SIZE(pmu_resources))
--
--void __init emev2_add_standard_devices(void)
--{
--	if (!IS_ENABLED(CONFIG_COMMON_CLK))
--		emev2_clock_init();
--
--	emev2_register_uart(0);
--	emev2_register_uart(1);
--	emev2_register_uart(2);
--	emev2_register_uart(3);
--	emev2_register_sti();
--	emev2_register_gio(0);
--	emev2_register_gio(1);
--	emev2_register_gio(2);
--	emev2_register_gio(3);
--	emev2_register_gio(4);
--	emev2_register_pmu();
--}
--
- void __init emev2_init_delay(void)
- {
- 	shmobile_setup_delay(533, 1, 3); /* Cortex-A9 @ 533MHz */
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0089-ASoC-add-Renesas-R-Car-module-feature.patch b/patches.renesas/0089-ASoC-add-Renesas-R-Car-module-feature.patch
deleted file mode 100644
index 7413dfb70cdaa..0000000000000
--- a/patches.renesas/0089-ASoC-add-Renesas-R-Car-module-feature.patch
+++ /dev/null
@@ -1,198 +0,0 @@
-From 3ce69392154484a529d9951b13e3542ea7ac0ace Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Sun, 21 Jul 2013 21:36:03 -0700
-Subject: ASoC: add Renesas R-Car module feature
-
-Renesas R-Car series sound circuit consists of SSI and its peripheral.
-But this peripheral circuit is different between
-R-Car Generation1 (E1/M1/H1) and Generation2 (E2/M2/H2)
-(Actually, there are many difference in Generation1 chips)
-
-Gen1 series consists of SRU/SSI/ADG, and
-Gen2 series consists of SCU/SSIU/SSI/ADG.
-
-In order to control these by same method,
-these are treated as "mod" on this driver.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@linaro.org>
-(cherry picked from commit cdaa3cdfb4a710545a53740b1780a683b043618a)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/sh/rcar/core.c | 80 ++++++++++++++++++++++++++++++++++++++++++++++++
- sound/soc/sh/rcar/rsnd.h | 46 ++++++++++++++++++++++++++++
- 2 files changed, 126 insertions(+)
-
-diff --git a/sound/soc/sh/rcar/core.c b/sound/soc/sh/rcar/core.c
-index 13b5d50efd06..a47fda2aa600 100644
---- a/sound/soc/sh/rcar/core.c
-+++ b/sound/soc/sh/rcar/core.c
-@@ -108,8 +108,73 @@
- 
- 
- /*
-+ *	rsnd_mod functions
-+ */
-+char *rsnd_mod_name(struct rsnd_mod *mod)
-+{
-+	if (!mod || !mod->ops)
-+		return "unknown";
-+
-+	return mod->ops->name;
-+}
-+
-+void rsnd_mod_init(struct rsnd_priv *priv,
-+		   struct rsnd_mod *mod,
-+		   struct rsnd_mod_ops *ops,
-+		   int id)
-+{
-+	mod->priv	= priv;
-+	mod->id		= id;
-+	mod->ops	= ops;
-+	INIT_LIST_HEAD(&mod->list);
-+}
-+
-+/*
-  *	rsnd_dai functions
-  */
-+#define rsnd_dai_call(rdai, io, fn)			\
-+({							\
-+	struct rsnd_mod *mod, *n;			\
-+	int ret = 0;					\
-+	for_each_rsnd_mod(mod, n, io) {			\
-+		ret = rsnd_mod_call(mod, fn, rdai, io);	\
-+		if (ret < 0)				\
-+			break;				\
-+	}						\
-+	ret;						\
-+})
-+
-+int rsnd_dai_connect(struct rsnd_dai *rdai,
-+		     struct rsnd_mod *mod,
-+		     struct rsnd_dai_stream *io)
-+{
-+	struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
-+	struct device *dev = rsnd_priv_to_dev(priv);
-+
-+	if (!mod) {
-+		dev_err(dev, "NULL mod\n");
-+		return -EIO;
-+	}
-+
-+	if (!list_empty(&mod->list)) {
-+		dev_err(dev, "%s%d is not empty\n",
-+			rsnd_mod_name(mod),
-+			rsnd_mod_id(mod));
-+		return -EIO;
-+	}
-+
-+	list_add_tail(&mod->list, &io->head);
-+
-+	return 0;
-+}
-+
-+int rsnd_dai_disconnect(struct rsnd_mod *mod)
-+{
-+	list_del_init(&mod->list);
-+
-+	return 0;
-+}
-+
- struct rsnd_dai *rsnd_dai_get(struct rsnd_priv *priv, int id)
- {
- 	return priv->rdai + id;
-@@ -224,8 +289,23 @@ static int rsnd_soc_dai_trigger(struct snd_pcm_substream *substream, int cmd,
- 		if (ret < 0)
- 			goto dai_trigger_end;
- 
-+		ret = rsnd_dai_call(rdai, io, init);
-+		if (ret < 0)
-+			goto dai_trigger_end;
-+
-+		ret = rsnd_dai_call(rdai, io, start);
-+		if (ret < 0)
-+			goto dai_trigger_end;
- 		break;
- 	case SNDRV_PCM_TRIGGER_STOP:
-+		ret = rsnd_dai_call(rdai, io, stop);
-+		if (ret < 0)
-+			goto dai_trigger_end;
-+
-+		ret = rsnd_dai_call(rdai, io, quit);
-+		if (ret < 0)
-+			goto dai_trigger_end;
-+
- 		ret = rsnd_platform_call(priv, dai, stop, ssi_id);
- 		if (ret < 0)
- 			goto dai_trigger_end;
-diff --git a/sound/soc/sh/rcar/rsnd.h b/sound/soc/sh/rcar/rsnd.h
-index 8d04fd0352bd..65d3835cffbc 100644
---- a/sound/soc/sh/rcar/rsnd.h
-+++ b/sound/soc/sh/rcar/rsnd.h
-@@ -28,10 +28,53 @@
-  * see gen1/gen2 for detail
-  */
- struct rsnd_priv;
-+struct rsnd_mod;
- struct rsnd_dai;
- struct rsnd_dai_stream;
- 
- /*
-+ *	R-Car sound mod
-+ */
-+
-+struct rsnd_mod_ops {
-+	char *name;
-+	int (*init)(struct rsnd_mod *mod,
-+		    struct rsnd_dai *rdai,
-+		    struct rsnd_dai_stream *io);
-+	int (*quit)(struct rsnd_mod *mod,
-+		    struct rsnd_dai *rdai,
-+		    struct rsnd_dai_stream *io);
-+	int (*start)(struct rsnd_mod *mod,
-+		     struct rsnd_dai *rdai,
-+		     struct rsnd_dai_stream *io);
-+	int (*stop)(struct rsnd_mod *mod,
-+		    struct rsnd_dai *rdai,
-+		    struct rsnd_dai_stream *io);
-+};
-+
-+struct rsnd_mod {
-+	int id;
-+	struct rsnd_priv *priv;
-+	struct rsnd_mod_ops *ops;
-+	struct list_head list; /* connect to rsnd_dai playback/capture */
-+};
-+
-+#define rsnd_mod_to_priv(mod) ((mod)->priv)
-+#define rsnd_mod_id(mod) ((mod)->id)
-+#define for_each_rsnd_mod(pos, n, io)	\
-+	list_for_each_entry_safe(pos, n, &(io)->head, list)
-+#define rsnd_mod_call(mod, func, rdai, io)	\
-+	(!(mod) ? -ENODEV :			\
-+	 !((mod)->ops->func) ? 0 :		\
-+	 (mod)->ops->func(mod, rdai, io))
-+
-+void rsnd_mod_init(struct rsnd_priv *priv,
-+		   struct rsnd_mod *mod,
-+		   struct rsnd_mod_ops *ops,
-+		   int id);
-+char *rsnd_mod_name(struct rsnd_mod *mod);
-+
-+/*
-  *	R-Car sound DAI
-  */
- #define RSND_DAI_NAME_SIZE	16
-@@ -64,6 +107,9 @@ struct rsnd_dai {
- 	     i++, (rdai) = rsnd_dai_get(priv, i))
- 
- struct rsnd_dai *rsnd_dai_get(struct rsnd_priv *priv, int id);
-+int rsnd_dai_disconnect(struct rsnd_mod *mod);
-+int rsnd_dai_connect(struct rsnd_dai *rdai, struct rsnd_mod *mod,
-+		     struct rsnd_dai_stream *io);
- int rsnd_dai_is_play(struct rsnd_dai *rdai, struct rsnd_dai_stream *io);
- #define rsnd_dai_get_platform_info(rdai) ((rdai)->info)
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0089-sh-pfc-r8a7790-Remove-function-GPIOs.patch b/patches.renesas/0089-sh-pfc-r8a7790-Remove-function-GPIOs.patch
deleted file mode 100644
index 00c5d3d9d324b..0000000000000
--- a/patches.renesas/0089-sh-pfc-r8a7790-Remove-function-GPIOs.patch
+++ /dev/null
@@ -1,388 +0,0 @@
-From c5d14de8824ce69c0fb63654ebeecf280c4ddbaa Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Mon, 8 Apr 2013 11:36:19 +0200
-Subject: sh-pfc: r8a7790: Remove function GPIOs
-
-No r8a7770 platform use the function GPIOs API. Remove it.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-[horms+renesas@verge.net.au: fixed typo in changelog: r8a7779 -> r8a7770]
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-(cherry picked from commit 728d53f4a4a880d8961fb15e1b19c541c5fa1b0f)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 350 -----------------------------------
- 1 file changed, 350 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-index 7716a1e2..51219e1b 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-@@ -2503,353 +2503,6 @@ static const struct sh_pfc_function pinmux_functions[] = {
- 	SH_PFC_FUNCTION(scifb2),
- };
- 
--#define PINMUX_FN_BASE	ARRAY_SIZE(pinmux_pins)
--
--static const struct pinmux_func pinmux_func_gpios[] = {
--	GPIO_FN(VI1_DATA7_VI1_B7), GPIO_FN(USB0_PWEN), GPIO_FN(USB0_OVC_VBUS),
--	GPIO_FN(USB2_PWEN), GPIO_FN(USB2_OVC), GPIO_FN(AVS1), GPIO_FN(AVS2),
--	GPIO_FN(DU_DOTCLKIN0), GPIO_FN(DU_DOTCLKIN2),
--
--	/*IPSR0*/
--	GPIO_FN(D1), GPIO_FN(MSIOF3_SYNC_B), GPIO_FN(VI3_DATA1),
--	GPIO_FN(VI0_G5), GPIO_FN(VI0_G5_B), GPIO_FN(D2), GPIO_FN(MSIOF3_RXD_B),
--	GPIO_FN(VI3_DATA2), GPIO_FN(VI0_G6), GPIO_FN(VI0_G6_B), GPIO_FN(D3),
--	GPIO_FN(MSIOF3_TXD_B), GPIO_FN(VI3_DATA3), GPIO_FN(VI0_G7),
--	GPIO_FN(VI0_G7_B), GPIO_FN(D4), GPIO_FN(SCIFB1_RXD_F),
--	GPIO_FN(SCIFB0_RXD_C), GPIO_FN(VI3_DATA4), GPIO_FN(VI0_R0),
--	GPIO_FN(VI0_R0_B), GPIO_FN(RX0_B), GPIO_FN(D5), GPIO_FN(SCIFB1_TXD_F),
--	GPIO_FN(SCIFB0_TXD_C), GPIO_FN(VI3_DATA5), GPIO_FN(VI0_R1),
--	GPIO_FN(VI0_R1_B), GPIO_FN(TX0_B), GPIO_FN(D6), GPIO_FN(SCL2_C),
--	GPIO_FN(VI3_DATA6), GPIO_FN(VI0_R2), GPIO_FN(VI0_R2_B),
--	GPIO_FN(SCL2_CIS_C), GPIO_FN(D7), GPIO_FN(AD_DI_B), GPIO_FN(SDA2_C),
--	GPIO_FN(VI3_DATA7), GPIO_FN(VI0_R3), GPIO_FN(VI0_R3_B),
--	GPIO_FN(SDA2_CIS_C), GPIO_FN(D8), GPIO_FN(SCIFA1_SCK_C),
--	GPIO_FN(AVB_TXD0), GPIO_FN(MII_TXD0), GPIO_FN(VI0_G0),
--	GPIO_FN(VI0_G0_B), GPIO_FN(VI2_DATA0_VI2_B0),
--
--	/*IPSR1*/
--	GPIO_FN(D9), GPIO_FN(SCIFA1_RXD_C), GPIO_FN(AVB_TXD1),
--	GPIO_FN(MII_TXD1), GPIO_FN(VI0_G1), GPIO_FN(VI0_G1_B),
--	GPIO_FN(VI2_DATA1_VI2_B1), GPIO_FN(D10), GPIO_FN(SCIFA1_TXD_C),
--	GPIO_FN(AVB_TXD2), GPIO_FN(MII_TXD2), GPIO_FN(VI0_G2),
--	GPIO_FN(VI0_G2_B), GPIO_FN(VI2_DATA2_VI2_B2), GPIO_FN(D11),
--	GPIO_FN(SCIFA1_CTS_N_C), GPIO_FN(AVB_TXD3), GPIO_FN(MII_TXD3),
--	GPIO_FN(VI0_G3), GPIO_FN(VI0_G3_B), GPIO_FN(VI2_DATA3_VI2_B3),
--	GPIO_FN(D12), GPIO_FN(SCIFA1_RTS_N_C), GPIO_FN(AVB_TXD4),
--	GPIO_FN(VI0_HSYNC_N), GPIO_FN(VI0_HSYNC_N_B), GPIO_FN(VI2_DATA4_VI2_B4),
--	GPIO_FN(D13), GPIO_FN(AVB_TXD5), GPIO_FN(VI0_VSYNC_N),
--	GPIO_FN(VI0_VSYNC_N_B), GPIO_FN(VI2_DATA5_VI2_B5), GPIO_FN(D14),
--	GPIO_FN(SCIFB1_RXD_C), GPIO_FN(AVB_TXD6), GPIO_FN(RX1_B),
--	GPIO_FN(VI0_CLKENB), GPIO_FN(VI0_CLKENB_B), GPIO_FN(VI2_DATA6_VI2_B6),
--	GPIO_FN(D15), GPIO_FN(SCIFB1_TXD_C), GPIO_FN(AVB_TXD7), GPIO_FN(TX1_B),
--	GPIO_FN(VI0_FIELD), GPIO_FN(VI0_FIELD_B), GPIO_FN(VI2_DATA7_VI2_B7),
--	GPIO_FN(A0), GPIO_FN(PWM3), GPIO_FN(A1), GPIO_FN(PWM4),
--
--	/*IPSR2*/
--	GPIO_FN(A2), GPIO_FN(PWM5), GPIO_FN(MSIOF1_SS1_B), GPIO_FN(A3),
--	GPIO_FN(PWM6), GPIO_FN(MSIOF1_SS2_B), GPIO_FN(A4),
--	GPIO_FN(MSIOF1_TXD_B), GPIO_FN(TPU0TO0), GPIO_FN(A5),
--	GPIO_FN(SCIFA1_TXD_B), GPIO_FN(TPU0TO1), GPIO_FN(A6),
--	GPIO_FN(SCIFA1_RTS_N_B), GPIO_FN(TPU0TO2), GPIO_FN(A7),
--	GPIO_FN(SCIFA1_SCK_B), GPIO_FN(AUDIO_CLKOUT_B), GPIO_FN(TPU0TO3),
--	GPIO_FN(A8), GPIO_FN(SCIFA1_RXD_B), GPIO_FN(SSI_SCK5_B),
--	GPIO_FN(VI0_R4), GPIO_FN(VI0_R4_B), GPIO_FN(SCIFB2_RXD_C),
--	GPIO_FN(VI2_DATA0_VI2_B0_B), GPIO_FN(A9), GPIO_FN(SCIFA1_CTS_N_B),
--	GPIO_FN(SSI_WS5_B), GPIO_FN(VI0_R5), GPIO_FN(VI0_R5_B),
--	GPIO_FN(SCIFB2_TXD_C), GPIO_FN(VI2_DATA1_VI2_B1_B), GPIO_FN(A10),
--	GPIO_FN(SSI_SDATA5_B), GPIO_FN(MSIOF2_SYNC), GPIO_FN(VI0_R6),
--	GPIO_FN(VI0_R6_B), GPIO_FN(VI2_DATA2_VI2_B2_B),
--
--	/*IPSR3*/
--	GPIO_FN(A11), GPIO_FN(SCIFB2_CTS_N_B), GPIO_FN(MSIOF2_SCK),
--	GPIO_FN(VI1_R0), GPIO_FN(VI1_R0_B), GPIO_FN(VI2_G0),
--	GPIO_FN(VI2_DATA3_VI2_B3_B), GPIO_FN(A12), GPIO_FN(SCIFB2_RXD_B),
--	GPIO_FN(MSIOF2_TXD), GPIO_FN(VI1_R1), GPIO_FN(VI1_R1_B),
--	GPIO_FN(VI2_G1), GPIO_FN(VI2_DATA4_VI2_B4_B), GPIO_FN(A13),
--	GPIO_FN(SCIFB2_RTS_N_B), GPIO_FN(EX_WAIT2), GPIO_FN(MSIOF2_RXD),
--	GPIO_FN(VI1_R2), GPIO_FN(VI1_R2_B), GPIO_FN(VI2_G2),
--	GPIO_FN(VI2_DATA5_VI2_B5_B), GPIO_FN(A14), GPIO_FN(SCIFB2_TXD_B),
--	GPIO_FN(ATACS11_N), GPIO_FN(MSIOF2_SS1), GPIO_FN(A15),
--	GPIO_FN(SCIFB2_SCK_B), GPIO_FN(ATARD1_N), GPIO_FN(MSIOF2_SS2),
--	GPIO_FN(A16), GPIO_FN(ATAWR1_N), GPIO_FN(A17), GPIO_FN(AD_DO_B),
--	GPIO_FN(ATADIR1_N), GPIO_FN(A18), GPIO_FN(AD_CLK_B), GPIO_FN(ATAG1_N),
--	GPIO_FN(A19), GPIO_FN(AD_NCS_N_B), GPIO_FN(ATACS01_N),
--	GPIO_FN(EX_WAIT0_B), GPIO_FN(A20), GPIO_FN(SPCLK), GPIO_FN(VI1_R3),
--	GPIO_FN(VI1_R3_B), GPIO_FN(VI2_G4),
--
--	/*IPSR4*/
--	GPIO_FN(A21), GPIO_FN(MOSI_IO0), GPIO_FN(VI1_R4), GPIO_FN(VI1_R4_B),
--	GPIO_FN(VI2_G5), GPIO_FN(A22), GPIO_FN(MISO_IO1), GPIO_FN(VI1_R5),
--	GPIO_FN(VI1_R5_B), GPIO_FN(VI2_G6), GPIO_FN(A23), GPIO_FN(IO2),
--	GPIO_FN(VI1_G7), GPIO_FN(VI1_G7_B), GPIO_FN(VI2_G7), GPIO_FN(A24),
--	GPIO_FN(IO3), GPIO_FN(VI1_R7), GPIO_FN(VI1_R7_B), GPIO_FN(VI2_CLKENB),
--	GPIO_FN(VI2_CLKENB_B), GPIO_FN(A25), GPIO_FN(SSL), GPIO_FN(VI1_G6),
--	GPIO_FN(VI1_G6_B), GPIO_FN(VI2_FIELD), GPIO_FN(VI2_FIELD_B),
--	GPIO_FN(CS0_N), GPIO_FN(VI1_R6), GPIO_FN(VI1_R6_B), GPIO_FN(VI2_G3),
--	GPIO_FN(MSIOF0_SS2_B), GPIO_FN(CS1_N_A26), GPIO_FN(SPEEDIN),
--	GPIO_FN(VI0_R7), GPIO_FN(VI0_R7_B), GPIO_FN(VI2_CLK),
--	GPIO_FN(VI2_CLK_B), GPIO_FN(EX_CS0_N), GPIO_FN(HRX1_B),
--	GPIO_FN(VI1_G5), GPIO_FN(VI1_G5_B), GPIO_FN(VI2_R0), GPIO_FN(HTX0_B),
--	GPIO_FN(MSIOF0_SS1_B), GPIO_FN(EX_CS1_N), GPIO_FN(GPS_CLK),
--	GPIO_FN(HCTS1_N_B), GPIO_FN(VI1_FIELD), GPIO_FN(VI1_FIELD_B),
--	GPIO_FN(VI2_R1), GPIO_FN(EX_CS2_N), GPIO_FN(GPS_SIGN),
--	GPIO_FN(HRTS1_N_B), GPIO_FN(VI3_CLKENB), GPIO_FN(VI1_G0),
--	GPIO_FN(VI1_G0_B), GPIO_FN(VI2_R2),
--
--	/*IPSR5*/
--	GPIO_FN(EX_CS3_N), GPIO_FN(GPS_MAG), GPIO_FN(VI3_FIELD),
--	GPIO_FN(VI1_G1), GPIO_FN(VI1_G1_B), GPIO_FN(VI2_R3), GPIO_FN(EX_CS4_N),
--	GPIO_FN(MSIOF1_SCK_B), GPIO_FN(VI3_HSYNC_N), GPIO_FN(VI2_HSYNC_N),
--	GPIO_FN(SCL1), GPIO_FN(VI2_HSYNC_N_B), GPIO_FN(INTC_EN0_N),
--	GPIO_FN(SCL1_CIS), GPIO_FN(EX_CS5_N), GPIO_FN(CAN0_RX),
--	GPIO_FN(MSIOF1_RXD_B), GPIO_FN(VI3_VSYNC_N), GPIO_FN(VI1_G2),
--	GPIO_FN(VI1_G2_B), GPIO_FN(VI2_R4), GPIO_FN(SDA1), GPIO_FN(INTC_EN1_N),
--	GPIO_FN(SDA1_CIS), GPIO_FN(BS_N), GPIO_FN(IETX), GPIO_FN(HTX1_B),
--	GPIO_FN(CAN1_TX), GPIO_FN(DRACK0), GPIO_FN(IETX_C), GPIO_FN(RD_N),
--	GPIO_FN(CAN0_TX), GPIO_FN(SCIFA0_SCK_B), GPIO_FN(RD_WR_N),
--	GPIO_FN(VI1_G3), GPIO_FN(VI1_G3_B), GPIO_FN(VI2_R5),
--	GPIO_FN(SCIFA0_RXD_B), GPIO_FN(INTC_IRQ4_N), GPIO_FN(WE0_N),
--	GPIO_FN(IECLK), GPIO_FN(CAN_CLK), GPIO_FN(VI2_VSYNC_N),
--	GPIO_FN(SCIFA0_TXD_B), GPIO_FN(VI2_VSYNC_N_B), GPIO_FN(WE1_N),
--	GPIO_FN(IERX), GPIO_FN(CAN1_RX), GPIO_FN(VI1_G4), GPIO_FN(VI1_G4_B),
--	GPIO_FN(VI2_R6), GPIO_FN(SCIFA0_CTS_N_B), GPIO_FN(IERX_C),
--	GPIO_FN(EX_WAIT0), GPIO_FN(IRQ3), GPIO_FN(INTC_IRQ3_N),
--	GPIO_FN(VI3_CLK), GPIO_FN(SCIFA0_RTS_N_B), GPIO_FN(HRX0_B),
--	GPIO_FN(MSIOF0_SCK_B), GPIO_FN(DREQ0_N), GPIO_FN(VI1_HSYNC_N),
--	GPIO_FN(VI1_HSYNC_N_B), GPIO_FN(VI2_R7), GPIO_FN(SSI_SCK78_C),
--	GPIO_FN(SSI_WS78_B),
--
--	/*IPSR6*/
--	GPIO_FN(DACK0), GPIO_FN(IRQ0), GPIO_FN(INTC_IRQ0_N),
--	GPIO_FN(SSI_SCK6_B), GPIO_FN(VI1_VSYNC_N), GPIO_FN(VI1_VSYNC_N_B),
--	GPIO_FN(SSI_WS78_C), GPIO_FN(DREQ1_N), GPIO_FN(VI1_CLKENB),
--	GPIO_FN(VI1_CLKENB_B), GPIO_FN(SSI_SDATA7_C), GPIO_FN(SSI_SCK78_B),
--	GPIO_FN(DACK1), GPIO_FN(IRQ1), GPIO_FN(INTC_IRQ1_N), GPIO_FN(SSI_WS6_B),
--	GPIO_FN(SSI_SDATA8_C), GPIO_FN(DREQ2_N), GPIO_FN(HSCK1_B),
--	GPIO_FN(HCTS0_N_B), GPIO_FN(MSIOF0_TXD_B), GPIO_FN(DACK2),
--	GPIO_FN(IRQ2), GPIO_FN(INTC_IRQ2_N), GPIO_FN(SSI_SDATA6_B),
--	GPIO_FN(HRTS0_N_B), GPIO_FN(MSIOF0_RXD_B), GPIO_FN(ETH_CRS_DV),
--	GPIO_FN(RMII_CRS_DV), GPIO_FN(STP_ISCLK_0_B), GPIO_FN(TS_SDEN0_D),
--	GPIO_FN(GLO_Q0_C), GPIO_FN(SCL2_E), GPIO_FN(SCL2_CIS_E),
--	GPIO_FN(ETH_RX_ER), GPIO_FN(RMII_RX_ER), GPIO_FN(STP_ISD_0_B),
--	GPIO_FN(TS_SPSYNC0_D), GPIO_FN(GLO_Q1_C), GPIO_FN(SDA2_E),
--	GPIO_FN(SDA2_CIS_E), GPIO_FN(ETH_RXD0), GPIO_FN(RMII_RXD0),
--	GPIO_FN(STP_ISEN_0_B), GPIO_FN(TS_SDAT0_D), GPIO_FN(GLO_I0_C),
--	GPIO_FN(SCIFB1_SCK_G), GPIO_FN(SCK1_E), GPIO_FN(ETH_RXD1),
--	GPIO_FN(RMII_RXD1), GPIO_FN(HRX0_E), GPIO_FN(STP_ISSYNC_0_B),
--	GPIO_FN(TS_SCK0_D), GPIO_FN(GLO_I1_C), GPIO_FN(SCIFB1_RXD_G),
--	GPIO_FN(RX1_E), GPIO_FN(ETH_LINK), GPIO_FN(RMII_LINK), GPIO_FN(HTX0_E),
--	GPIO_FN(STP_IVCXO27_0_B), GPIO_FN(SCIFB1_TXD_G), GPIO_FN(TX1_E),
--	GPIO_FN(ETH_REF_CLK), GPIO_FN(RMII_REF_CLK), GPIO_FN(HCTS0_N_E),
--	GPIO_FN(STP_IVCXO27_1_B), GPIO_FN(HRX0_F),
--
--	/*IPSR7*/
--	GPIO_FN(ETH_MDIO), GPIO_FN(RMII_MDIO), GPIO_FN(HRTS0_N_E),
--	GPIO_FN(SIM0_D_C), GPIO_FN(HCTS0_N_F), GPIO_FN(ETH_TXD1),
--	GPIO_FN(RMII_TXD1), GPIO_FN(HTX0_F), GPIO_FN(BPFCLK_G),
--	GPIO_FN(RDS_CLK_F), GPIO_FN(ETH_TX_EN), GPIO_FN(RMII_TX_EN),
--	GPIO_FN(SIM0_CLK_C), GPIO_FN(HRTS0_N_F), GPIO_FN(ETH_MAGIC),
--	GPIO_FN(RMII_MAGIC), GPIO_FN(SIM0_RST_C), GPIO_FN(ETH_TXD0),
--	GPIO_FN(RMII_TXD0), GPIO_FN(STP_ISCLK_1_B), GPIO_FN(TS_SDEN1_C),
--	GPIO_FN(GLO_SCLK_C), GPIO_FN(ETH_MDC), GPIO_FN(RMII_MDC),
--	GPIO_FN(STP_ISD_1_B), GPIO_FN(TS_SPSYNC1_C), GPIO_FN(GLO_SDATA_C),
--	GPIO_FN(PWM0), GPIO_FN(SCIFA2_SCK_C), GPIO_FN(STP_ISEN_1_B),
--	GPIO_FN(TS_SDAT1_C), GPIO_FN(GLO_SS_C), GPIO_FN(PWM1),
--	GPIO_FN(SCIFA2_TXD_C), GPIO_FN(STP_ISSYNC_1_B), GPIO_FN(TS_SCK1_C),
--	GPIO_FN(GLO_RFON_C), GPIO_FN(PCMOE_N), GPIO_FN(PWM2), GPIO_FN(PWMFSW0),
--	GPIO_FN(SCIFA2_RXD_C), GPIO_FN(PCMWE_N), GPIO_FN(IECLK_C),
--	GPIO_FN(DU1_DOTCLKIN), GPIO_FN(AUDIO_CLKC), GPIO_FN(AUDIO_CLKOUT_C),
--	GPIO_FN(VI0_CLK), GPIO_FN(ATACS00_N), GPIO_FN(AVB_RXD1),
--	GPIO_FN(MII_RXD1), GPIO_FN(VI0_DATA0_VI0_B0), GPIO_FN(ATACS10_N),
--	GPIO_FN(AVB_RXD2), GPIO_FN(MII_RXD2),
--
--	/*IPSR8*/
--	GPIO_FN(VI0_DATA1_VI0_B1), GPIO_FN(ATARD0_N), GPIO_FN(AVB_RXD3),
--	GPIO_FN(MII_RXD3), GPIO_FN(VI0_DATA2_VI0_B2), GPIO_FN(ATAWR0_N),
--	GPIO_FN(AVB_RXD4), GPIO_FN(VI0_DATA3_VI0_B3), GPIO_FN(ATADIR0_N),
--	GPIO_FN(AVB_RXD5), GPIO_FN(VI0_DATA4_VI0_B4), GPIO_FN(ATAG0_N),
--	GPIO_FN(AVB_RXD6), GPIO_FN(VI0_DATA5_VI0_B5), GPIO_FN(EX_WAIT1),
--	GPIO_FN(AVB_RXD7), GPIO_FN(VI0_DATA6_VI0_B6), GPIO_FN(AVB_RX_ER),
--	GPIO_FN(MII_RX_ER), GPIO_FN(VI0_DATA7_VI0_B7), GPIO_FN(AVB_RX_CLK),
--	GPIO_FN(MII_RX_CLK), GPIO_FN(VI1_CLK), GPIO_FN(AVB_RX_DV),
--	GPIO_FN(MII_RX_DV), GPIO_FN(VI1_DATA0_VI1_B0), GPIO_FN(SCIFA1_SCK_D),
--	GPIO_FN(AVB_CRS), GPIO_FN(MII_CRS), GPIO_FN(VI1_DATA1_VI1_B1),
--	GPIO_FN(SCIFA1_RXD_D), GPIO_FN(AVB_MDC), GPIO_FN(MII_MDC),
--	GPIO_FN(VI1_DATA2_VI1_B2), GPIO_FN(SCIFA1_TXD_D), GPIO_FN(AVB_MDIO),
--	GPIO_FN(MII_MDIO), GPIO_FN(VI1_DATA3_VI1_B3), GPIO_FN(SCIFA1_CTS_N_D),
--	GPIO_FN(AVB_GTX_CLK), GPIO_FN(VI1_DATA4_VI1_B4),
--	GPIO_FN(SCIFA1_RTS_N_D), GPIO_FN(AVB_MAGIC), GPIO_FN(MII_MAGIC),
--	GPIO_FN(VI1_DATA5_VI1_B5), GPIO_FN(AVB_PHY_INT),
--	GPIO_FN(VI1_DATA6_VI1_B6), GPIO_FN(AVB_GTXREFCLK),
--	GPIO_FN(SD0_CLK), GPIO_FN(VI1_DATA0_VI1_B0_B), GPIO_FN(SD0_CMD),
--	GPIO_FN(SCIFB1_SCK_B), GPIO_FN(VI1_DATA1_VI1_B1_B),
--
--	/*IPSR9*/
--	GPIO_FN(SD0_DAT0), GPIO_FN(SCIFB1_RXD_B), GPIO_FN(VI1_DATA2_VI1_B2_B),
--	GPIO_FN(SD0_DAT1), GPIO_FN(SCIFB1_TXD_B), GPIO_FN(VI1_DATA3_VI1_B3_B),
--	GPIO_FN(SD0_DAT2), GPIO_FN(SCIFB1_CTS_N_B), GPIO_FN(VI1_DATA4_VI1_B4_B),
--	GPIO_FN(SD0_DAT3), GPIO_FN(SCIFB1_RTS_N_B), GPIO_FN(VI1_DATA5_VI1_B5_B),
--	GPIO_FN(SD0_CD), GPIO_FN(MMC0_D6), GPIO_FN(TS_SDEN0_B),
--	GPIO_FN(USB0_EXTP), GPIO_FN(GLO_SCLK), GPIO_FN(VI1_DATA6_VI1_B6_B),
--	GPIO_FN(SCL1_B), GPIO_FN(SCL1_CIS_B), GPIO_FN(VI2_DATA6_VI2_B6_B),
--	GPIO_FN(SD0_WP), GPIO_FN(MMC0_D7), GPIO_FN(TS_SPSYNC0_B),
--	GPIO_FN(USB0_IDIN), GPIO_FN(GLO_SDATA), GPIO_FN(VI1_DATA7_VI1_B7_B),
--	GPIO_FN(SDA1_B), GPIO_FN(SDA1_CIS_B), GPIO_FN(VI2_DATA7_VI2_B7_B),
--	GPIO_FN(SD1_CLK), GPIO_FN(AVB_TX_EN), GPIO_FN(MII_TX_EN),
--	GPIO_FN(SD1_CMD), GPIO_FN(AVB_TX_ER), GPIO_FN(MII_TX_ER),
--	GPIO_FN(SCIFB0_SCK_B), GPIO_FN(SD1_DAT0), GPIO_FN(AVB_TX_CLK),
--	GPIO_FN(MII_TX_CLK), GPIO_FN(SCIFB0_RXD_B), GPIO_FN(SD1_DAT1),
--	GPIO_FN(AVB_LINK), GPIO_FN(MII_LINK), GPIO_FN(SCIFB0_TXD_B),
--	GPIO_FN(SD1_DAT2), GPIO_FN(AVB_COL), GPIO_FN(MII_COL),
--	GPIO_FN(SCIFB0_CTS_N_B), GPIO_FN(SD1_DAT3), GPIO_FN(AVB_RXD0),
--	GPIO_FN(MII_RXD0), GPIO_FN(SCIFB0_RTS_N_B), GPIO_FN(SD1_CD),
--	GPIO_FN(MMC1_D6), GPIO_FN(TS_SDEN1), GPIO_FN(USB1_EXTP),
--	GPIO_FN(GLO_SS), GPIO_FN(VI0_CLK_B), GPIO_FN(SCL2_D),
--	GPIO_FN(SCL2_CIS_D), GPIO_FN(SIM0_CLK_B), GPIO_FN(VI3_CLK_B),
--
--	/*IPSR10*/
--	GPIO_FN(SD1_WP), GPIO_FN(MMC1_D7), GPIO_FN(TS_SPSYNC1),
--	GPIO_FN(USB1_IDIN), GPIO_FN(GLO_RFON), GPIO_FN(VI1_CLK_B),
--	GPIO_FN(SDA2_D), GPIO_FN(SDA2_CIS_D), GPIO_FN(SIM0_D_B),
--	GPIO_FN(SD2_CLK), GPIO_FN(MMC0_CLK), GPIO_FN(SIM0_CLK),
--	GPIO_FN(VI0_DATA0_VI0_B0_B), GPIO_FN(TS_SDEN0_C), GPIO_FN(GLO_SCLK_B),
--	GPIO_FN(VI3_DATA0_B), GPIO_FN(SD2_CMD), GPIO_FN(MMC0_CMD),
--	GPIO_FN(SIM0_D), GPIO_FN(VI0_DATA1_VI0_B1_B), GPIO_FN(SCIFB1_SCK_E),
--	GPIO_FN(SCK1_D), GPIO_FN(TS_SPSYNC0_C), GPIO_FN(GLO_SDATA_B),
--	GPIO_FN(VI3_DATA1_B), GPIO_FN(SD2_DAT0), GPIO_FN(MMC0_D0),
--	GPIO_FN(FMCLK_B), GPIO_FN(VI0_DATA2_VI0_B2_B), GPIO_FN(SCIFB1_RXD_E),
--	GPIO_FN(RX1_D), GPIO_FN(TS_SDAT0_C), GPIO_FN(GLO_SS_B),
--	GPIO_FN(VI3_DATA2_B), GPIO_FN(SD2_DAT1), GPIO_FN(MMC0_D1),
--	GPIO_FN(FMIN_B), GPIO_FN(RDS_DATA), GPIO_FN(VI0_DATA3_VI0_B3_B),
--	GPIO_FN(SCIFB1_TXD_E), GPIO_FN(TX1_D), GPIO_FN(TS_SCK0_C),
--	GPIO_FN(GLO_RFON_B), GPIO_FN(VI3_DATA3_B), GPIO_FN(SD2_DAT2),
--	GPIO_FN(MMC0_D2), GPIO_FN(BPFCLK_B), GPIO_FN(RDS_CLK),
--	GPIO_FN(VI0_DATA4_VI0_B4_B), GPIO_FN(HRX0_D), GPIO_FN(TS_SDEN1_B),
--	GPIO_FN(GLO_Q0_B), GPIO_FN(VI3_DATA4_B), GPIO_FN(SD2_DAT3),
--	GPIO_FN(MMC0_D3), GPIO_FN(SIM0_RST), GPIO_FN(VI0_DATA5_VI0_B5_B),
--	GPIO_FN(HTX0_D), GPIO_FN(TS_SPSYNC1_B), GPIO_FN(GLO_Q1_B),
--	GPIO_FN(VI3_DATA5_B), GPIO_FN(SD2_CD), GPIO_FN(MMC0_D4),
--	GPIO_FN(TS_SDAT0_B), GPIO_FN(USB2_EXTP), GPIO_FN(GLO_I0),
--	GPIO_FN(VI0_DATA6_VI0_B6_B), GPIO_FN(HCTS0_N_D), GPIO_FN(TS_SDAT1_B),
--	GPIO_FN(GLO_I0_B), GPIO_FN(VI3_DATA6_B),
--
--	/*IPSR11*/
--	GPIO_FN(SD2_WP), GPIO_FN(MMC0_D5), GPIO_FN(TS_SCK0_B),
--	GPIO_FN(USB2_IDIN), GPIO_FN(GLO_I1), GPIO_FN(VI0_DATA7_VI0_B7_B),
--	GPIO_FN(HRTS0_N_D), GPIO_FN(TS_SCK1_B), GPIO_FN(GLO_I1_B),
--	GPIO_FN(VI3_DATA7_B), GPIO_FN(SD3_CLK), GPIO_FN(MMC1_CLK),
--	GPIO_FN(SD3_CMD), GPIO_FN(MMC1_CMD), GPIO_FN(MTS_N), GPIO_FN(SD3_DAT0),
--	GPIO_FN(MMC1_D0), GPIO_FN(STM_N), GPIO_FN(SD3_DAT1), GPIO_FN(MMC1_D1),
--	GPIO_FN(MDATA), GPIO_FN(SD3_DAT2), GPIO_FN(MMC1_D2), GPIO_FN(SDATA),
--	GPIO_FN(SD3_DAT3), GPIO_FN(MMC1_D3), GPIO_FN(SCKZ), GPIO_FN(SD3_CD),
--	GPIO_FN(MMC1_D4), GPIO_FN(TS_SDAT1), GPIO_FN(VSP), GPIO_FN(GLO_Q0),
--	GPIO_FN(SIM0_RST_B), GPIO_FN(SD3_WP), GPIO_FN(MMC1_D5),
--	GPIO_FN(TS_SCK1), GPIO_FN(GLO_Q1), GPIO_FN(FMIN_C), GPIO_FN(RDS_DATA_B),
--	GPIO_FN(FMIN_E), GPIO_FN(RDS_DATA_D), GPIO_FN(FMIN_F),
--	GPIO_FN(RDS_DATA_E), GPIO_FN(MLB_CLK), GPIO_FN(SCL2_B),
--	GPIO_FN(SCL2_CIS_B), GPIO_FN(MLB_SIG), GPIO_FN(SCIFB1_RXD_D),
--	GPIO_FN(RX1_C), GPIO_FN(SDA2_B), GPIO_FN(SDA2_CIS_B), GPIO_FN(MLB_DAT),
--	GPIO_FN(SPV_EVEN), GPIO_FN(SCIFB1_TXD_D), GPIO_FN(TX1_C),
--	GPIO_FN(BPFCLK_C), GPIO_FN(RDS_CLK_B), GPIO_FN(SSI_SCK0129),
--	GPIO_FN(CAN_CLK_B), GPIO_FN(MOUT0),
--
--	/*IPSR12*/
--	GPIO_FN(SSI_WS0129), GPIO_FN(CAN0_TX_B), GPIO_FN(MOUT1),
--	GPIO_FN(SSI_SDATA0), GPIO_FN(CAN0_RX_B), GPIO_FN(MOUT2),
--	GPIO_FN(SSI_SDATA1), GPIO_FN(CAN1_TX_B), GPIO_FN(MOUT5),
--	GPIO_FN(SSI_SDATA2), GPIO_FN(CAN1_RX_B), GPIO_FN(SSI_SCK1),
--	GPIO_FN(MOUT6), GPIO_FN(SSI_SCK34), GPIO_FN(STP_OPWM_0),
--	GPIO_FN(SCIFB0_SCK), GPIO_FN(MSIOF1_SCK), GPIO_FN(CAN_DEBUG_HW_TRIGGER),
--	GPIO_FN(SSI_WS34), GPIO_FN(STP_IVCXO27_0), GPIO_FN(SCIFB0_RXD),
--	GPIO_FN(MSIOF1_SYNC), GPIO_FN(CAN_STEP0), GPIO_FN(SSI_SDATA3),
--	GPIO_FN(STP_ISCLK_0), GPIO_FN(SCIFB0_TXD), GPIO_FN(MSIOF1_SS1),
--	GPIO_FN(CAN_TXCLK), GPIO_FN(SSI_SCK4), GPIO_FN(STP_ISD_0),
--	GPIO_FN(SCIFB0_CTS_N), GPIO_FN(MSIOF1_SS2), GPIO_FN(SSI_SCK5_C),
--	GPIO_FN(CAN_DEBUGOUT0), GPIO_FN(SSI_WS4), GPIO_FN(STP_ISEN_0),
--	GPIO_FN(SCIFB0_RTS_N), GPIO_FN(MSIOF1_TXD), GPIO_FN(SSI_WS5_C),
--	GPIO_FN(CAN_DEBUGOUT1), GPIO_FN(SSI_SDATA4), GPIO_FN(STP_ISSYNC_0),
--	GPIO_FN(MSIOF1_RXD), GPIO_FN(CAN_DEBUGOUT2), GPIO_FN(SSI_SCK5),
--	GPIO_FN(SCIFB1_SCK), GPIO_FN(IERX_B), GPIO_FN(DU2_EXHSYNC_DU2_HSYNC),
--	GPIO_FN(QSTH_QHS), GPIO_FN(CAN_DEBUGOUT3), GPIO_FN(SSI_WS5),
--	GPIO_FN(SCIFB1_RXD), GPIO_FN(IECLK_B), GPIO_FN(DU2_EXVSYNC_DU2_VSYNC),
--	GPIO_FN(QSTB_QHE), GPIO_FN(CAN_DEBUGOUT4),
--
--	/*IPSR13*/
--	GPIO_FN(SSI_SDATA5), GPIO_FN(SCIFB1_TXD), GPIO_FN(IETX_B),
--	GPIO_FN(DU2_DR2), GPIO_FN(LCDOUT2), GPIO_FN(CAN_DEBUGOUT5),
--	GPIO_FN(SSI_SCK6), GPIO_FN(SCIFB1_CTS_N), GPIO_FN(BPFCLK_D),
--	GPIO_FN(RDS_CLK_C), GPIO_FN(DU2_DR3), GPIO_FN(LCDOUT3),
--	GPIO_FN(CAN_DEBUGOUT6), GPIO_FN(BPFCLK_F), GPIO_FN(RDS_CLK_E),
--	GPIO_FN(SSI_WS6), GPIO_FN(SCIFB1_RTS_N), GPIO_FN(CAN0_TX_D),
--	GPIO_FN(DU2_DR4), GPIO_FN(LCDOUT4), GPIO_FN(CAN_DEBUGOUT7),
--	GPIO_FN(SSI_SDATA6), GPIO_FN(FMIN_D), GPIO_FN(RDS_DATA_C),
--	GPIO_FN(DU2_DR5), GPIO_FN(LCDOUT5), GPIO_FN(CAN_DEBUGOUT8),
--	GPIO_FN(SSI_SCK78), GPIO_FN(STP_IVCXO27_1), GPIO_FN(SCK1),
--	GPIO_FN(SCIFA1_SCK), GPIO_FN(DU2_DR6), GPIO_FN(LCDOUT6),
--	GPIO_FN(CAN_DEBUGOUT9), GPIO_FN(SSI_WS78), GPIO_FN(STP_ISCLK_1),
--	GPIO_FN(SCIFB2_SCK), GPIO_FN(SCIFA2_CTS_N), GPIO_FN(DU2_DR7),
--	GPIO_FN(LCDOUT7), GPIO_FN(CAN_DEBUGOUT10), GPIO_FN(SSI_SDATA7),
--	GPIO_FN(STP_ISD_1), GPIO_FN(SCIFB2_RXD), GPIO_FN(SCIFA2_RTS_N),
--	GPIO_FN(TCLK2), GPIO_FN(QSTVA_QVS), GPIO_FN(CAN_DEBUGOUT11),
--	GPIO_FN(BPFCLK_E), GPIO_FN(RDS_CLK_D), GPIO_FN(SSI_SDATA7_B),
--	GPIO_FN(FMIN_G), GPIO_FN(RDS_DATA_F), GPIO_FN(SSI_SDATA8),
--	GPIO_FN(STP_ISEN_1), GPIO_FN(SCIFB2_TXD), GPIO_FN(CAN0_TX_C),
--	GPIO_FN(CAN_DEBUGOUT12), GPIO_FN(SSI_SDATA8_B), GPIO_FN(SSI_SDATA9),
--	GPIO_FN(STP_ISSYNC_1), GPIO_FN(SCIFB2_CTS_N), GPIO_FN(SSI_WS1),
--	GPIO_FN(SSI_SDATA5_C), GPIO_FN(CAN_DEBUGOUT13), GPIO_FN(AUDIO_CLKA),
--	GPIO_FN(SCIFB2_RTS_N), GPIO_FN(CAN_DEBUGOUT14),
--
--	/*IPSR14*/
--	GPIO_FN(AUDIO_CLKB), GPIO_FN(SCIF_CLK), GPIO_FN(CAN0_RX_D),
--	GPIO_FN(DVC_MUTE), GPIO_FN(CAN0_RX_C), GPIO_FN(CAN_DEBUGOUT15),
--	GPIO_FN(REMOCON), GPIO_FN(SCIFA0_SCK), GPIO_FN(HSCK1), GPIO_FN(SCK0),
--	GPIO_FN(MSIOF3_SS2), GPIO_FN(DU2_DG2), GPIO_FN(LCDOUT10),
--	GPIO_FN(SDA1_C), GPIO_FN(SDA1_CIS_C), GPIO_FN(SCIFA0_RXD),
--	GPIO_FN(HRX1), GPIO_FN(RX0), GPIO_FN(DU2_DR0), GPIO_FN(LCDOUT0),
--	GPIO_FN(SCIFA0_TXD), GPIO_FN(HTX1), GPIO_FN(TX0), GPIO_FN(DU2_DR1),
--	GPIO_FN(LCDOUT1), GPIO_FN(SCIFA0_CTS_N), GPIO_FN(HCTS1_N),
--	GPIO_FN(CTS0_N), GPIO_FN(MSIOF3_SYNC), GPIO_FN(DU2_DG3),
--	GPIO_FN(LCDOUT11), GPIO_FN(PWM0_B), GPIO_FN(SCL1_C),
--	GPIO_FN(SCL1_CIS_C), GPIO_FN(SCIFA0_RTS_N), GPIO_FN(HRTS1_N),
--	GPIO_FN(RTS0_N_TANS), GPIO_FN(MSIOF3_SS1), GPIO_FN(DU2_DG0),
--	GPIO_FN(LCDOUT8), GPIO_FN(PWM1_B), GPIO_FN(SCIFA1_RXD), GPIO_FN(AD_DI),
--	GPIO_FN(RX1), GPIO_FN(DU2_EXODDF_DU2_ODDF_DISP_CDE), GPIO_FN(QCPV_QDE),
--	GPIO_FN(SCIFA1_TXD), GPIO_FN(AD_DO), GPIO_FN(TX1), GPIO_FN(DU2_DG1),
--	GPIO_FN(LCDOUT9), GPIO_FN(SCIFA1_CTS_N), GPIO_FN(AD_CLK),
--	GPIO_FN(CTS1_N), GPIO_FN(MSIOF3_RXD), GPIO_FN(DU0_DOTCLKOUT),
--	GPIO_FN(QCLK), GPIO_FN(SCIFA1_RTS_N), GPIO_FN(AD_NCS_N),
--	GPIO_FN(RTS1_N_TANS), GPIO_FN(MSIOF3_TXD), GPIO_FN(DU1_DOTCLKOUT),
--	GPIO_FN(QSTVB_QVE), GPIO_FN(HRTS0_N_C),
--
--	/*IPSR15*/
--	GPIO_FN(SCIFA2_SCK), GPIO_FN(FMCLK), GPIO_FN(MSIOF3_SCK),
--	GPIO_FN(DU2_DG7), GPIO_FN(LCDOUT15), GPIO_FN(SCIF_CLK_B),
--	GPIO_FN(SCIFA2_RXD), GPIO_FN(FMIN), GPIO_FN(DU2_DB0),
--	GPIO_FN(LCDOUT16), GPIO_FN(SCL2), GPIO_FN(SCL2_CIS),
--	GPIO_FN(SCIFA2_TXD), GPIO_FN(BPFCLK), GPIO_FN(DU2_DB1),
--	GPIO_FN(LCDOUT17), GPIO_FN(SDA2), GPIO_FN(SDA2_CIS), GPIO_FN(HSCK0),
--	GPIO_FN(TS_SDEN0), GPIO_FN(DU2_DG4), GPIO_FN(LCDOUT12),
--	GPIO_FN(HCTS0_N_C), GPIO_FN(HRX0), GPIO_FN(DU2_DB2), GPIO_FN(LCDOUT18),
--	GPIO_FN(HTX0), GPIO_FN(DU2_DB3), GPIO_FN(LCDOUT19), GPIO_FN(HCTS0_N),
--	GPIO_FN(SSI_SCK9), GPIO_FN(DU2_DB4), GPIO_FN(LCDOUT20),
--	GPIO_FN(HRTS0_N), GPIO_FN(SSI_WS9), GPIO_FN(DU2_DB5),
--	GPIO_FN(LCDOUT21), GPIO_FN(MSIOF0_SCK), GPIO_FN(TS_SDAT0),
--	GPIO_FN(ADICLK), GPIO_FN(DU2_DB6), GPIO_FN(LCDOUT22),
--	GPIO_FN(MSIOF0_SYNC), GPIO_FN(TS_SCK0), GPIO_FN(SSI_SCK2),
--	GPIO_FN(ADIDATA), GPIO_FN(DU2_DB7), GPIO_FN(LCDOUT23),
--	GPIO_FN(SCIFA2_RXD_B), GPIO_FN(MSIOF0_SS1), GPIO_FN(ADICHS0),
--	GPIO_FN(DU2_DG5), GPIO_FN(LCDOUT13), GPIO_FN(MSIOF0_TXD),
--	GPIO_FN(ADICHS1), GPIO_FN(DU2_DG6), GPIO_FN(LCDOUT14),
--
--	/*IPSR16*/
--	GPIO_FN(MSIOF0_SS2), GPIO_FN(AUDIO_CLKOUT), GPIO_FN(ADICHS2),
--	GPIO_FN(DU2_DISP), GPIO_FN(QPOLA), GPIO_FN(HTX0_C),
--	GPIO_FN(SCIFA2_TXD_B), GPIO_FN(MSIOF0_RXD), GPIO_FN(TS_SPSYNC0),
--	GPIO_FN(SSI_WS2), GPIO_FN(ADICS_SAMP), GPIO_FN(DU2_CDE),
--	GPIO_FN(QPOLB), GPIO_FN(HRX0_C), GPIO_FN(USB1_PWEN),
--	GPIO_FN(AUDIO_CLKOUT_D), GPIO_FN(USB1_OVC), GPIO_FN(TCLK1_B),
--};
--
- static struct pinmux_cfg_reg pinmux_config_regs[] = {
- 	{ PINMUX_CFG_REG("GPSR0", 0xE6060004, 32, 1) {
- 		GP_0_31_FN, FN_IP3_17_15,
-@@ -3812,9 +3465,6 @@ const struct sh_pfc_soc_info r8a7790_pinmux_info = {
- 	.functions = pinmux_functions,
- 	.nr_functions = ARRAY_SIZE(pinmux_functions),
- 
--	.func_gpios	= pinmux_func_gpios,
--	.nr_func_gpios	= ARRAY_SIZE(pinmux_func_gpios),
--
- 	.cfg_regs = pinmux_config_regs,
- 
- 	.gpio_data = pinmux_data,
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0090-ARM-shmobile-r8a7778-add-HSPI-clock-support-for-DT.patch b/patches.renesas/0090-ARM-shmobile-r8a7778-add-HSPI-clock-support-for-DT.patch
deleted file mode 100644
index 30e04ec257d1d..0000000000000
--- a/patches.renesas/0090-ARM-shmobile-r8a7778-add-HSPI-clock-support-for-DT.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From 2149eaea3f8816f3db0fbcdbdaab836a848e4489 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Thu, 31 Oct 2013 18:22:39 -0700
-Subject: ARM: shmobile: r8a7778: add HSPI clock support for DT
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 6c334d232ab446cc6388430a019fc1072599b718)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r8a7778.c | 3 +++
- 1 file changed, 3 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a7778.c b/arch/arm/mach-shmobile/clock-r8a7778.c
-index 011564fd87b1..54064346dafb 100644
---- a/arch/arm/mach-shmobile/clock-r8a7778.c
-+++ b/arch/arm/mach-shmobile/clock-r8a7778.c
-@@ -203,8 +203,11 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP016]), /* TMU00 */
- 	CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP015]), /* TMU01 */
- 	CLKDEV_DEV_ID("sh-hspi.0", &mstp_clks[MSTP007]), /* HSPI0 */
-+	CLKDEV_DEV_ID("fffc7000.spi", &mstp_clks[MSTP007]), /* HSPI0 */
- 	CLKDEV_DEV_ID("sh-hspi.1", &mstp_clks[MSTP007]), /* HSPI1 */
-+	CLKDEV_DEV_ID("fffc8000.spi", &mstp_clks[MSTP007]), /* HSPI1 */
- 	CLKDEV_DEV_ID("sh-hspi.2", &mstp_clks[MSTP007]), /* HSPI2 */
-+	CLKDEV_DEV_ID("fffc6000.spi", &mstp_clks[MSTP007]), /* HSPI2 */
- 	CLKDEV_DEV_ID("rcar_sound", &mstp_clks[MSTP008]), /* SRU */
- 
- 	CLKDEV_ICK_ID("ssi.0", "rcar_sound", &mstp_clks[MSTP012]),
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0090-ASoC-add-Renesas-R-Car-Generation-feature.patch b/patches.renesas/0090-ASoC-add-Renesas-R-Car-Generation-feature.patch
deleted file mode 100644
index a75be9bcfa827..0000000000000
--- a/patches.renesas/0090-ASoC-add-Renesas-R-Car-Generation-feature.patch
+++ /dev/null
@@ -1,399 +0,0 @@
-From 6af0566e6b321dbf32134a6b8663ba571db6b9eb Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Sun, 21 Jul 2013 21:36:21 -0700
-Subject: ASoC: add Renesas R-Car Generation feature
-
-Renesas R-Car series sound circuit consists of SSI and its peripheral.
-But this peripheral circuit is different between
-R-Car Generation1 (E1/M1/H1) and Generation2 (E2/M2/H2)
-(Actually, there are many difference in Generation1 chips)
-
-The main difference between Gen1 and Gen2 are
-1) register offset, 2) data path
-
-In order to control Gen1/Gen2 by same method,
-this patch adds gen.c.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@linaro.org>
-(cherry picked from commit 3337744ac41bee00b0068ad5f926dd9c27540809)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- include/sound/rcar_snd.h   |  10 +++
- sound/soc/sh/rcar/Makefile |   2 +-
- sound/soc/sh/rcar/core.c   |  58 ++++++++++++++++-
- sound/soc/sh/rcar/gen.c    | 154 +++++++++++++++++++++++++++++++++++++++++++++
- sound/soc/sh/rcar/rsnd.h   |  47 ++++++++++++++
- 5 files changed, 269 insertions(+), 2 deletions(-)
- create mode 100644 sound/soc/sh/rcar/gen.c
-
-diff --git a/include/sound/rcar_snd.h b/include/sound/rcar_snd.h
-index 7272b2ea7108..14942a827fe5 100644
---- a/include/sound/rcar_snd.h
-+++ b/include/sound/rcar_snd.h
-@@ -22,6 +22,16 @@ struct rsnd_dai_platform_info {
- 	int ssi_id_capture;
- };
- 
-+/*
-+ * flags
-+ *
-+ * 0x0000000A
-+ *
-+ * A : generation
-+ */
-+#define RSND_GEN1	(1 << 0) /* fixme */
-+#define RSND_GEN2	(2 << 0) /* fixme */
-+
- struct rcar_snd_info {
- 	u32 flags;
- 	struct rsnd_dai_platform_info *dai_info;
-diff --git a/sound/soc/sh/rcar/Makefile b/sound/soc/sh/rcar/Makefile
-index cd8089f20c94..b2d313b1eb94 100644
---- a/sound/soc/sh/rcar/Makefile
-+++ b/sound/soc/sh/rcar/Makefile
-@@ -1,2 +1,2 @@
--snd-soc-rcar-objs	:= core.o
-+snd-soc-rcar-objs	:= core.o gen.o
- obj-$(CONFIG_SND_SOC_RCAR)	+= snd-soc-rcar.o
-diff --git a/sound/soc/sh/rcar/core.c b/sound/soc/sh/rcar/core.c
-index a47fda2aa600..bb8959f93a7d 100644
---- a/sound/soc/sh/rcar/core.c
-+++ b/sound/soc/sh/rcar/core.c
-@@ -108,6 +108,50 @@
- 
- 
- /*
-+ *	basic function
-+ */
-+u32 rsnd_read(struct rsnd_priv *priv,
-+	      struct rsnd_mod *mod, enum rsnd_reg reg)
-+{
-+	void __iomem *base = rsnd_gen_reg_get(priv, mod, reg);
-+
-+	BUG_ON(!base);
-+
-+	return ioread32(base);
-+}
-+
-+void rsnd_write(struct rsnd_priv *priv,
-+		struct rsnd_mod *mod,
-+		enum rsnd_reg reg, u32 data)
-+{
-+	void __iomem *base = rsnd_gen_reg_get(priv, mod, reg);
-+	struct device *dev = rsnd_priv_to_dev(priv);
-+
-+	BUG_ON(!base);
-+
-+	dev_dbg(dev, "w %p : %08x\n", base, data);
-+
-+	iowrite32(data, base);
-+}
-+
-+void rsnd_bset(struct rsnd_priv *priv, struct rsnd_mod *mod,
-+	       enum rsnd_reg reg, u32 mask, u32 data)
-+{
-+	void __iomem *base = rsnd_gen_reg_get(priv, mod, reg);
-+	struct device *dev = rsnd_priv_to_dev(priv);
-+	u32 val;
-+
-+	BUG_ON(!base);
-+
-+	val = ioread32(base);
-+	val &= ~mask;
-+	val |= data & mask;
-+	iowrite32(val, base);
-+
-+	dev_dbg(dev, "s %p : %08x\n", base, val);
-+}
-+
-+/*
-  *	rsnd_mod functions
-  */
- char *rsnd_mod_name(struct rsnd_mod *mod)
-@@ -289,6 +333,10 @@ static int rsnd_soc_dai_trigger(struct snd_pcm_substream *substream, int cmd,
- 		if (ret < 0)
- 			goto dai_trigger_end;
- 
-+		ret = rsnd_gen_path_init(priv, rdai, io);
-+		if (ret < 0)
-+			goto dai_trigger_end;
-+
- 		ret = rsnd_dai_call(rdai, io, init);
- 		if (ret < 0)
- 			goto dai_trigger_end;
-@@ -306,10 +354,13 @@ static int rsnd_soc_dai_trigger(struct snd_pcm_substream *substream, int cmd,
- 		if (ret < 0)
- 			goto dai_trigger_end;
- 
--		ret = rsnd_platform_call(priv, dai, stop, ssi_id);
-+		ret = rsnd_gen_path_exit(priv, rdai, io);
- 		if (ret < 0)
- 			goto dai_trigger_end;
- 
-+		ret = rsnd_platform_call(priv, dai, stop, ssi_id);
-+		if (ret < 0)
-+			goto dai_trigger_end;
- 		break;
- 	default:
- 		ret = -EINVAL;
-@@ -572,6 +623,10 @@ static int rsnd_probe(struct platform_device *pdev)
- 	/*
- 	 *	init each module
- 	 */
-+	ret = rsnd_gen_probe(pdev, info, priv);
-+	if (ret < 0)
-+		return ret;
-+
- 	ret = rsnd_dai_probe(pdev, info, priv);
- 	if (ret < 0)
- 		return ret;
-@@ -615,6 +670,7 @@ static int rsnd_remove(struct platform_device *pdev)
- 	 *	remove each module
- 	 */
- 	rsnd_dai_remove(pdev, priv);
-+	rsnd_gen_remove(pdev, priv);
- 
- 	return 0;
- }
-diff --git a/sound/soc/sh/rcar/gen.c b/sound/soc/sh/rcar/gen.c
-new file mode 100644
-index 000000000000..ec67a796eca2
---- /dev/null
-+++ b/sound/soc/sh/rcar/gen.c
-@@ -0,0 +1,154 @@
-+/*
-+ * Renesas R-Car Gen1 SRU/SSI support
-+ *
-+ * Copyright (C) 2013 Renesas Solutions Corp.
-+ * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+#include "rsnd.h"
-+
-+struct rsnd_gen_ops {
-+	int (*path_init)(struct rsnd_priv *priv,
-+			 struct rsnd_dai *rdai,
-+			 struct rsnd_dai_stream *io);
-+	int (*path_exit)(struct rsnd_priv *priv,
-+			 struct rsnd_dai *rdai,
-+			 struct rsnd_dai_stream *io);
-+};
-+
-+struct rsnd_gen_reg_map {
-+	int index;	/* -1 : not supported */
-+	u32 offset_id;	/* offset of ssi0, ssi1, ssi2... */
-+	u32 offset_adr;	/* offset of SSICR, SSISR, ... */
-+};
-+
-+struct rsnd_gen {
-+	void __iomem *base[RSND_BASE_MAX];
-+
-+	struct rsnd_gen_reg_map reg_map[RSND_REG_MAX];
-+	struct rsnd_gen_ops *ops;
-+};
-+
-+#define rsnd_priv_to_gen(p)	((struct rsnd_gen *)(p)->gen)
-+
-+#define rsnd_is_gen1(s)		((s)->info->flags & RSND_GEN1)
-+#define rsnd_is_gen2(s)		((s)->info->flags & RSND_GEN2)
-+
-+/*
-+ *		Gen2
-+ *		will be filled in the future
-+ */
-+
-+/*
-+ *		Gen1
-+ */
-+static int rsnd_gen1_probe(struct platform_device *pdev,
-+			   struct rcar_snd_info *info,
-+			   struct rsnd_priv *priv)
-+{
-+	return 0;
-+}
-+
-+static void rsnd_gen1_remove(struct platform_device *pdev,
-+			     struct rsnd_priv *priv)
-+{
-+}
-+
-+/*
-+ *		Gen
-+ */
-+int rsnd_gen_path_init(struct rsnd_priv *priv,
-+		       struct rsnd_dai *rdai,
-+		       struct rsnd_dai_stream *io)
-+{
-+	struct rsnd_gen *gen = rsnd_priv_to_gen(priv);
-+
-+	return gen->ops->path_init(priv, rdai, io);
-+}
-+
-+int rsnd_gen_path_exit(struct rsnd_priv *priv,
-+		       struct rsnd_dai *rdai,
-+		       struct rsnd_dai_stream *io)
-+{
-+	struct rsnd_gen *gen = rsnd_priv_to_gen(priv);
-+
-+	return gen->ops->path_exit(priv, rdai, io);
-+}
-+
-+void __iomem *rsnd_gen_reg_get(struct rsnd_priv *priv,
-+			       struct rsnd_mod *mod,
-+			       enum rsnd_reg reg)
-+{
-+	struct rsnd_gen *gen = rsnd_priv_to_gen(priv);
-+	struct device *dev = rsnd_priv_to_dev(priv);
-+	int index;
-+	u32 offset_id, offset_adr;
-+
-+	if (reg >= RSND_REG_MAX) {
-+		dev_err(dev, "rsnd_reg reg error\n");
-+		return NULL;
-+	}
-+
-+	index		= gen->reg_map[reg].index;
-+	offset_id	= gen->reg_map[reg].offset_id;
-+	offset_adr	= gen->reg_map[reg].offset_adr;
-+
-+	if (index < 0) {
-+		dev_err(dev, "unsupported reg access %d\n", reg);
-+		return NULL;
-+	}
-+
-+	if (offset_id && mod)
-+		offset_id *= rsnd_mod_id(mod);
-+
-+	/*
-+	 * index/offset were set on gen1/gen2
-+	 */
-+
-+	return gen->base[index] + offset_id + offset_adr;
-+}
-+
-+int rsnd_gen_probe(struct platform_device *pdev,
-+		   struct rcar_snd_info *info,
-+		   struct rsnd_priv *priv)
-+{
-+	struct device *dev = rsnd_priv_to_dev(priv);
-+	struct rsnd_gen *gen;
-+	int i;
-+
-+	gen = devm_kzalloc(dev, sizeof(*gen), GFP_KERNEL);
-+	if (!gen) {
-+		dev_err(dev, "GEN allocate failed\n");
-+		return -ENOMEM;
-+	}
-+
-+	priv->gen = gen;
-+
-+	/*
-+	 * see
-+	 *	rsnd_reg_get()
-+	 *	rsnd_gen_probe()
-+	 */
-+	for (i = 0; i < RSND_REG_MAX; i++)
-+		gen->reg_map[i].index = -1;
-+
-+	/*
-+	 *	init each module
-+	 */
-+	if (rsnd_is_gen1(priv))
-+		return rsnd_gen1_probe(pdev, info, priv);
-+
-+	dev_err(dev, "unknown generation R-Car sound device\n");
-+
-+	return -ENODEV;
-+}
-+
-+void rsnd_gen_remove(struct platform_device *pdev,
-+		     struct rsnd_priv *priv)
-+{
-+	if (rsnd_is_gen1(priv))
-+		rsnd_gen1_remove(pdev, priv);
-+}
-diff --git a/sound/soc/sh/rcar/rsnd.h b/sound/soc/sh/rcar/rsnd.h
-index 65d3835cffbc..8cc36416da25 100644
---- a/sound/soc/sh/rcar/rsnd.h
-+++ b/sound/soc/sh/rcar/rsnd.h
-@@ -27,12 +27,36 @@
-  * This driver uses pseudo register in order to hide it.
-  * see gen1/gen2 for detail
-  */
-+enum rsnd_reg {
-+	RSND_REG_MAX,
-+};
-+
- struct rsnd_priv;
- struct rsnd_mod;
- struct rsnd_dai;
- struct rsnd_dai_stream;
- 
- /*
-+ *	R-Car basic functions
-+ */
-+#define rsnd_mod_read(m, r) \
-+	rsnd_read(rsnd_mod_to_priv(m), m, RSND_REG_##r)
-+#define rsnd_mod_write(m, r, d) \
-+	rsnd_write(rsnd_mod_to_priv(m), m, RSND_REG_##r, d)
-+#define rsnd_mod_bset(m, r, s, d) \
-+	rsnd_bset(rsnd_mod_to_priv(m), m, RSND_REG_##r, s, d)
-+
-+#define rsnd_priv_read(p, r)		rsnd_read(p, NULL, RSND_REG_##r)
-+#define rsnd_priv_write(p, r, d)	rsnd_write(p, NULL, RSND_REG_##r, d)
-+#define rsnd_priv_bset(p, r, s, d)	rsnd_bset(p, NULL, RSND_REG_##r, s, d)
-+
-+u32 rsnd_read(struct rsnd_priv *priv, struct rsnd_mod *mod, enum rsnd_reg reg);
-+void rsnd_write(struct rsnd_priv *priv, struct rsnd_mod *mod,
-+		enum rsnd_reg reg, u32 data);
-+void rsnd_bset(struct rsnd_priv *priv, struct rsnd_mod *mod, enum rsnd_reg reg,
-+		    u32 mask, u32 data);
-+
-+/*
-  *	R-Car sound mod
-  */
- 
-@@ -117,6 +141,24 @@ void rsnd_dai_pointer_update(struct rsnd_dai_stream *io, int cnt);
- int rsnd_dai_pointer_offset(struct rsnd_dai_stream *io, int additional);
- 
- /*
-+ *	R-Car Gen1/Gen2
-+ */
-+int rsnd_gen_probe(struct platform_device *pdev,
-+		   struct rcar_snd_info *info,
-+		   struct rsnd_priv *priv);
-+void rsnd_gen_remove(struct platform_device *pdev,
-+		     struct rsnd_priv *priv);
-+int rsnd_gen_path_init(struct rsnd_priv *priv,
-+		       struct rsnd_dai *rdai,
-+		       struct rsnd_dai_stream *io);
-+int rsnd_gen_path_exit(struct rsnd_priv *priv,
-+		       struct rsnd_dai *rdai,
-+		       struct rsnd_dai_stream *io);
-+void __iomem *rsnd_gen_reg_get(struct rsnd_priv *priv,
-+			       struct rsnd_mod *mod,
-+			       enum rsnd_reg reg);
-+
-+/*
-  *	R-Car sound priv
-  */
- struct rsnd_priv {
-@@ -126,6 +168,11 @@ struct rsnd_priv {
- 	spinlock_t lock;
- 
- 	/*
-+	 * below value will be filled on rsnd_gen_probe()
-+	 */
-+	void *gen;
-+
-+	/*
- 	 * below value will be filled on rsnd_dai_probe()
- 	 */
- 	struct snd_soc_dai_driver *daidrv;
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0090-sh-pfc-r8a7790-Don-t-use-GPIO-enum-entries.patch b/patches.renesas/0090-sh-pfc-r8a7790-Don-t-use-GPIO-enum-entries.patch
deleted file mode 100644
index fe4726ae1393a..0000000000000
--- a/patches.renesas/0090-sh-pfc-r8a7790-Don-t-use-GPIO-enum-entries.patch
+++ /dev/null
@@ -1,124 +0,0 @@
-From 71bf5d2d56d64a1ffe941b9ffb7f8416d13c6a9f Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Mon, 8 Apr 2013 11:36:20 +0200
-Subject: sh-pfc: r8a7790: Don't use GPIO enum entries
-
-Refactor the GPIO macro magic to use GPIO numbers directly instead of
-the GPIO_GP_x_y enum entries. This will allow removing the GPIO enum
-entries from the mach/r8a7790.h header.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit ed3e26049e238d066841f858509b764df37c3776)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 90 ++++++++++++++++++++++++------------
- 1 file changed, 60 insertions(+), 30 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-index 51219e1b..1656915a 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-@@ -24,39 +24,69 @@
- #include <linux/kernel.h>
- #include <linux/platform_data/gpio-rcar.h>
- 
--#include <mach/r8a7790.h>
--
- #include "core.h"
- #include "sh_pfc.h"
- 
--#define CPU_32_PORT(fn, pfx, sfx)				\
--	PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx),	\
--	PORT_10(fn, pfx##2, sfx), PORT_1(fn, pfx##30, sfx),	\
--	PORT_1(fn, pfx##31, sfx)
--
--#define CPU_32_PORT1(fn, pfx, sfx)				\
--	PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx),	\
--	PORT_10(fn, pfx##2, sfx)
--
--#define CPU_32_PORT2(fn, pfx, sfx)				\
--	PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx),	\
--	PORT_10(fn, pfx##2, sfx)
--
--/* GP_0_0_DATA -> GP_5_31_DATA (except for GP1[30],GP1[31],GP2[30],GP2[31]) */
--#define CPU_ALL_PORT(fn, pfx, sfx)				\
--	CPU_32_PORT(fn, pfx##_0_, sfx),				\
--	CPU_32_PORT1(fn, pfx##_1_, sfx),			\
--	CPU_32_PORT2(fn, pfx##_2_, sfx),			\
--	CPU_32_PORT(fn, pfx##_3_, sfx),				\
--	CPU_32_PORT(fn, pfx##_4_, sfx),				\
--	CPU_32_PORT(fn, pfx##_5_, sfx)				\
--
--#define _GP_GPIO(pfx, sfx) PINMUX_GPIO(GPIO_GP##pfx, GP##pfx##_DATA)
--#define _GP_DATA(pfx, sfx) PINMUX_DATA(GP##pfx##_DATA, GP##pfx##_FN)
--
--#define GP_ALL(str)	CPU_ALL_PORT(_PORT_ALL, GP, str)
--#define PINMUX_GPIO_GP_ALL()	CPU_ALL_PORT(_GP_GPIO, , unused)
--#define PINMUX_DATA_GP_ALL()	CPU_ALL_PORT(_GP_DATA, , unused)
-+#define PORT_GP_1(bank, pin, fn, sfx) fn(bank, pin, GP_##bank##_##pin, sfx)
-+
-+#define PORT_GP_32(bank, fn, sfx)					\
-+	PORT_GP_1(bank, 0,  fn, sfx), PORT_GP_1(bank, 1,  fn, sfx),	\
-+	PORT_GP_1(bank, 2,  fn, sfx), PORT_GP_1(bank, 3,  fn, sfx),	\
-+	PORT_GP_1(bank, 4,  fn, sfx), PORT_GP_1(bank, 5,  fn, sfx),	\
-+	PORT_GP_1(bank, 6,  fn, sfx), PORT_GP_1(bank, 7,  fn, sfx),	\
-+	PORT_GP_1(bank, 8,  fn, sfx), PORT_GP_1(bank, 9,  fn, sfx),	\
-+	PORT_GP_1(bank, 10, fn, sfx), PORT_GP_1(bank, 11, fn, sfx),	\
-+	PORT_GP_1(bank, 12, fn, sfx), PORT_GP_1(bank, 13, fn, sfx),	\
-+	PORT_GP_1(bank, 14, fn, sfx), PORT_GP_1(bank, 15, fn, sfx),	\
-+	PORT_GP_1(bank, 16, fn, sfx), PORT_GP_1(bank, 17, fn, sfx),	\
-+	PORT_GP_1(bank, 18, fn, sfx), PORT_GP_1(bank, 19, fn, sfx),	\
-+	PORT_GP_1(bank, 20, fn, sfx), PORT_GP_1(bank, 21, fn, sfx),	\
-+	PORT_GP_1(bank, 22, fn, sfx), PORT_GP_1(bank, 23, fn, sfx),	\
-+	PORT_GP_1(bank, 24, fn, sfx), PORT_GP_1(bank, 25, fn, sfx),	\
-+	PORT_GP_1(bank, 26, fn, sfx), PORT_GP_1(bank, 27, fn, sfx),	\
-+	PORT_GP_1(bank, 28, fn, sfx), PORT_GP_1(bank, 29, fn, sfx),	\
-+	PORT_GP_1(bank, 30, fn, sfx), PORT_GP_1(bank, 31, fn, sfx)
-+
-+#define PORT_GP_32_REV(bank, fn, sfx)					\
-+	PORT_GP_1(bank, 31, fn, sfx), PORT_GP_1(bank, 30, fn, sfx),	\
-+	PORT_GP_1(bank, 29, fn, sfx), PORT_GP_1(bank, 28, fn, sfx),	\
-+	PORT_GP_1(bank, 27, fn, sfx), PORT_GP_1(bank, 26, fn, sfx),	\
-+	PORT_GP_1(bank, 25, fn, sfx), PORT_GP_1(bank, 24, fn, sfx),	\
-+	PORT_GP_1(bank, 23, fn, sfx), PORT_GP_1(bank, 22, fn, sfx),	\
-+	PORT_GP_1(bank, 21, fn, sfx), PORT_GP_1(bank, 20, fn, sfx),	\
-+	PORT_GP_1(bank, 19, fn, sfx), PORT_GP_1(bank, 18, fn, sfx),	\
-+	PORT_GP_1(bank, 17, fn, sfx), PORT_GP_1(bank, 16, fn, sfx),	\
-+	PORT_GP_1(bank, 15, fn, sfx), PORT_GP_1(bank, 14, fn, sfx),	\
-+	PORT_GP_1(bank, 13, fn, sfx), PORT_GP_1(bank, 12, fn, sfx),	\
-+	PORT_GP_1(bank, 11, fn, sfx), PORT_GP_1(bank, 10, fn, sfx),	\
-+	PORT_GP_1(bank, 9,  fn, sfx), PORT_GP_1(bank, 8,  fn, sfx),	\
-+	PORT_GP_1(bank, 7,  fn, sfx), PORT_GP_1(bank, 6,  fn, sfx),	\
-+	PORT_GP_1(bank, 5,  fn, sfx), PORT_GP_1(bank, 4,  fn, sfx),	\
-+	PORT_GP_1(bank, 3,  fn, sfx), PORT_GP_1(bank, 2,  fn, sfx),	\
-+	PORT_GP_1(bank, 1,  fn, sfx), PORT_GP_1(bank, 0,  fn, sfx)
-+
-+#define CPU_ALL_PORT(fn, sfx)						\
-+	PORT_GP_32(0, fn, sfx),						\
-+	PORT_GP_32(1, fn, sfx),						\
-+	PORT_GP_32(2, fn, sfx),						\
-+	PORT_GP_32(3, fn, sfx),						\
-+	PORT_GP_32(4, fn, sfx),						\
-+	PORT_GP_32(5, fn, sfx)
-+
-+#define _GP_PORT_ALL(bank, pin, name, sfx)	name##_##sfx
-+
-+#define _GP_GPIO(bank, pin, _name, sfx)					\
-+	[(bank * 32) + pin] = {						\
-+		.name = __stringify(_name),				\
-+		.enum_id = _name##_DATA,				\
-+	}
-+
-+#define _GP_DATA(bank, pin, name, sfx)					\
-+	PINMUX_DATA(name##_DATA, name##_FN)
-+
-+#define GP_ALL(str)		CPU_ALL_PORT(_GP_PORT_ALL, str)
-+#define PINMUX_GPIO_GP_ALL()	CPU_ALL_PORT(_GP_GPIO, unused)
-+#define PINMUX_DATA_GP_ALL()	CPU_ALL_PORT(_GP_DATA, unused)
- 
- #define PINMUX_IPSR_DATA(ipsr, fn) PINMUX_DATA(fn##_MARK, FN_##ipsr, FN_##fn)
- #define PINMUX_IPSR_MODSEL_DATA(ipsr, fn, ms) PINMUX_DATA(fn##_MARK, FN_##ms, \
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0091-ARM-shmobile-Select-USE_OF-on-EMEV2.patch b/patches.renesas/0091-ARM-shmobile-Select-USE_OF-on-EMEV2.patch
deleted file mode 100644
index 55669fe344d3e..0000000000000
--- a/patches.renesas/0091-ARM-shmobile-Select-USE_OF-on-EMEV2.patch
+++ /dev/null
@@ -1,52 +0,0 @@
-From b5cf4396d28096d0cc9743a0736420770fcfb2aa Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Fri, 8 Nov 2013 19:09:34 +0900
-Subject: ARM: shmobile: Select USE_OF on EMEV2
-
-Now when the legacy KZM9D board code is gone, make sure
-USE_OF is selected in case of the EMEV2 SoC.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 81fd1b68796aadae70751ba8805b34b20df09e1b)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/Kconfig       | 1 +
- arch/arm/mach-shmobile/setup-emev2.c | 4 ----
- 2 files changed, 1 insertion(+), 4 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
-index 564e0ade3472..180b71fd86f8 100644
---- a/arch/arm/mach-shmobile/Kconfig
-+++ b/arch/arm/mach-shmobile/Kconfig
-@@ -108,6 +108,7 @@ config ARCH_EMEV2
- 	select ARCH_WANT_OPTIONAL_GPIOLIB
- 	select ARM_GIC
- 	select CPU_V7
-+	select USE_OF
- 
- config ARCH_R7S72100
- 	bool "RZ/A1H (R7S72100)"
-diff --git a/arch/arm/mach-shmobile/setup-emev2.c b/arch/arm/mach-shmobile/setup-emev2.c
-index e7031b071274..c8f2a1a69a52 100644
---- a/arch/arm/mach-shmobile/setup-emev2.c
-+++ b/arch/arm/mach-shmobile/setup-emev2.c
-@@ -48,8 +48,6 @@ void __init emev2_init_delay(void)
- 	shmobile_setup_delay(533, 1, 3); /* Cortex-A9 @ 533MHz */
- }
- 
--#ifdef CONFIG_USE_OF
--
- static void __init emev2_add_standard_devices_dt(void)
- {
- #ifdef CONFIG_COMMON_CLK
-@@ -73,5 +71,3 @@ DT_MACHINE_START(EMEV2_DT, "Generic Emma Mobile EV2 (Flattened Device Tree)")
- 	.init_late	= shmobile_init_late,
- 	.dt_compat	= emev2_boards_compat_dt,
- MACHINE_END
--
--#endif /* CONFIG_USE_OF */
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0091-ASoC-add-Renesas-R-Car-SCU-feature.patch b/patches.renesas/0091-ASoC-add-Renesas-R-Car-SCU-feature.patch
deleted file mode 100644
index 4f0c9c796944d..0000000000000
--- a/patches.renesas/0091-ASoC-add-Renesas-R-Car-SCU-feature.patch
+++ /dev/null
@@ -1,378 +0,0 @@
-From 5cfb0bb00963de809a1881cfd17161b5d2fd0448 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Sun, 21 Jul 2013 21:36:35 -0700
-Subject: ASoC: add Renesas R-Car SCU feature
-
-Renesas R-Car series sound circuit consists of SSI and its peripheral.
-But this peripheral circuit is different between
-R-Car Generation1 (E1/M1/H1) and Generation2 (E2/M2/H2)
-(Actually, there are many difference in Generation1 chips)
-
-This patch adds SCU feature on this driver.
-But, it defines SCU style only, does nothing at this point.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@linaro.org>
-(cherry picked from commit 07539c1de82cdc0ecbe72b413762b2e920407227)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- include/sound/rcar_snd.h   |  11 +++-
- sound/soc/sh/rcar/Makefile |   4 +-
- sound/soc/sh/rcar/core.c   |   5 ++
- sound/soc/sh/rcar/gen.c    |  95 ++++++++++++++++++++++++++++++++++
- sound/soc/sh/rcar/rsnd.h   |  21 ++++++++
- sound/soc/sh/rcar/scu.c    | 125 +++++++++++++++++++++++++++++++++++++++++++++
- 6 files changed, 258 insertions(+), 3 deletions(-)
- create mode 100644 sound/soc/sh/rcar/scu.c
-
-diff --git a/include/sound/rcar_snd.h b/include/sound/rcar_snd.h
-index 14942a827fe5..01f2e453dcbf 100644
---- a/include/sound/rcar_snd.h
-+++ b/include/sound/rcar_snd.h
-@@ -14,8 +14,15 @@
- 
- #include <linux/sh_clk.h>
- 
-+#define RSND_GEN1_SRU	0
- 
--#define RSND_BASE_MAX	0
-+#define RSND_GEN2_SRU	0
-+
-+#define RSND_BASE_MAX	1
-+
-+struct rsnd_scu_platform_info {
-+	u32 flags;
-+};
- 
- struct rsnd_dai_platform_info {
- 	int ssi_id_playback;
-@@ -34,6 +41,8 @@ struct rsnd_dai_platform_info {
- 
- struct rcar_snd_info {
- 	u32 flags;
-+	struct rsnd_scu_platform_info *scu_info;
-+	int scu_info_nr;
- 	struct rsnd_dai_platform_info *dai_info;
- 	int dai_info_nr;
- 	int (*start)(int id);
-diff --git a/sound/soc/sh/rcar/Makefile b/sound/soc/sh/rcar/Makefile
-index b2d313b1eb94..112b2cfd793b 100644
---- a/sound/soc/sh/rcar/Makefile
-+++ b/sound/soc/sh/rcar/Makefile
-@@ -1,2 +1,2 @@
--snd-soc-rcar-objs	:= core.o gen.o
--obj-$(CONFIG_SND_SOC_RCAR)	+= snd-soc-rcar.o
-+snd-soc-rcar-objs	:= core.o gen.o scu.o
-+obj-$(CONFIG_SND_SOC_RCAR)	+= snd-soc-rcar.o
-\ No newline at end of file
-diff --git a/sound/soc/sh/rcar/core.c b/sound/soc/sh/rcar/core.c
-index bb8959f93a7d..02d736bb4f54 100644
---- a/sound/soc/sh/rcar/core.c
-+++ b/sound/soc/sh/rcar/core.c
-@@ -631,6 +631,10 @@ static int rsnd_probe(struct platform_device *pdev)
- 	if (ret < 0)
- 		return ret;
- 
-+	ret = rsnd_scu_probe(pdev, info, priv);
-+	if (ret < 0)
-+		return ret;
-+
- 	/*
- 	 *	asoc register
- 	 */
-@@ -669,6 +673,7 @@ static int rsnd_remove(struct platform_device *pdev)
- 	/*
- 	 *	remove each module
- 	 */
-+	rsnd_scu_remove(pdev, priv);
- 	rsnd_dai_remove(pdev, priv);
- 	rsnd_gen_remove(pdev, priv);
- 
-diff --git a/sound/soc/sh/rcar/gen.c b/sound/soc/sh/rcar/gen.c
-index ec67a796eca2..2934c0d731c8 100644
---- a/sound/soc/sh/rcar/gen.c
-+++ b/sound/soc/sh/rcar/gen.c
-@@ -45,10 +45,105 @@ struct rsnd_gen {
- /*
-  *		Gen1
-  */
-+static int rsnd_gen1_path_init(struct rsnd_priv *priv,
-+			       struct rsnd_dai *rdai,
-+			       struct rsnd_dai_stream *io)
-+{
-+	struct rsnd_dai_platform_info *info = rsnd_dai_get_platform_info(rdai);
-+	struct rsnd_mod *mod;
-+	int ret;
-+	int id;
-+
-+	/*
-+	 * Gen1 is created by SRU/SSI, and this SRU is base module of
-+	 * Gen2's SCU/SSIU/SSI. (Gen2 SCU/SSIU came from SRU)
-+	 *
-+	 * Easy image is..
-+	 *	Gen1 SRU = Gen2 SCU + SSIU + etc
-+	 *
-+	 * Gen2 SCU path is very flexible, but, Gen1 SRU (SCU parts) is
-+	 * using fixed path.
-+	 *
-+	 * Then, SSI id = SCU id here
-+	 */
-+
-+	if (rsnd_dai_is_play(rdai, io))
-+		id = info->ssi_id_playback;
-+	else
-+		id = info->ssi_id_capture;
-+
-+	/* SCU */
-+	mod = rsnd_scu_mod_get(priv, id);
-+	ret = rsnd_dai_connect(rdai, mod, io);
-+
-+	return ret;
-+}
-+
-+static int rsnd_gen1_path_exit(struct rsnd_priv *priv,
-+			       struct rsnd_dai *rdai,
-+			       struct rsnd_dai_stream *io)
-+{
-+	struct rsnd_mod *mod, *n;
-+	int ret = 0;
-+
-+	/*
-+	 * remove all mod from rdai
-+	 */
-+	for_each_rsnd_mod(mod, n, io)
-+		ret |= rsnd_dai_disconnect(mod);
-+
-+	return ret;
-+}
-+
-+static struct rsnd_gen_ops rsnd_gen1_ops = {
-+	.path_init	= rsnd_gen1_path_init,
-+	.path_exit	= rsnd_gen1_path_exit,
-+};
-+
-+#define RSND_GEN1_REG_MAP(g, s, i, oi, oa)				\
-+	do {								\
-+		(g)->reg_map[RSND_REG_##i].index  = RSND_GEN1_##s;	\
-+		(g)->reg_map[RSND_REG_##i].offset_id = oi;		\
-+		(g)->reg_map[RSND_REG_##i].offset_adr = oa;		\
-+	} while (0)
-+
-+static void rsnd_gen1_reg_map_init(struct rsnd_gen *gen)
-+{
-+	RSND_GEN1_REG_MAP(gen, SRU,	SSI_MODE0,	0x0,	0xD0);
-+	RSND_GEN1_REG_MAP(gen, SRU,	SSI_MODE1,	0x0,	0xD4);
-+}
-+
- static int rsnd_gen1_probe(struct platform_device *pdev,
- 			   struct rcar_snd_info *info,
- 			   struct rsnd_priv *priv)
- {
-+	struct device *dev = rsnd_priv_to_dev(priv);
-+	struct rsnd_gen *gen = rsnd_priv_to_gen(priv);
-+	struct resource *sru_res;
-+
-+	/*
-+	 * map address
-+	 */
-+	sru_res	= platform_get_resource(pdev, IORESOURCE_MEM, RSND_GEN1_SRU);
-+	if (!sru_res) {
-+		dev_err(dev, "Not enough SRU/SSI/ADG platform resources.\n");
-+		return -ENODEV;
-+	}
-+
-+	gen->ops = &rsnd_gen1_ops;
-+
-+	gen->base[RSND_GEN1_SRU] = devm_ioremap_resource(dev, sru_res);
-+	if (!gen->base[RSND_GEN1_SRU]) {
-+		dev_err(dev, "SRU/SSI/ADG ioremap failed\n");
-+		return -ENODEV;
-+	}
-+
-+	rsnd_gen1_reg_map_init(gen);
-+
-+	dev_dbg(dev, "Gen1 device probed\n");
-+	dev_dbg(dev, "SRU : %08x => %p\n",	sru_res->start,
-+						gen->base[RSND_GEN1_SRU]);
-+
- 	return 0;
- }
- 
-diff --git a/sound/soc/sh/rcar/rsnd.h b/sound/soc/sh/rcar/rsnd.h
-index 8cc36416da25..95a391ff0627 100644
---- a/sound/soc/sh/rcar/rsnd.h
-+++ b/sound/soc/sh/rcar/rsnd.h
-@@ -28,6 +28,10 @@
-  * see gen1/gen2 for detail
-  */
- enum rsnd_reg {
-+	/* SRU/SCU */
-+	RSND_REG_SSI_MODE0,
-+	RSND_REG_SSI_MODE1,
-+
- 	RSND_REG_MAX,
- };
- 
-@@ -173,6 +177,12 @@ struct rsnd_priv {
- 	void *gen;
- 
- 	/*
-+	 * below value will be filled on rsnd_scu_probe()
-+	 */
-+	void *scu;
-+	int scu_nr;
-+
-+	/*
- 	 * below value will be filled on rsnd_dai_probe()
- 	 */
- 	struct snd_soc_dai_driver *daidrv;
-@@ -184,4 +194,15 @@ struct rsnd_priv {
- #define rsnd_lock(priv, flags) spin_lock_irqsave(&priv->lock, flags)
- #define rsnd_unlock(priv, flags) spin_unlock_irqrestore(&priv->lock, flags)
- 
-+/*
-+ *	R-Car SCU
-+ */
-+int rsnd_scu_probe(struct platform_device *pdev,
-+		   struct rcar_snd_info *info,
-+		   struct rsnd_priv *priv);
-+void rsnd_scu_remove(struct platform_device *pdev,
-+		     struct rsnd_priv *priv);
-+struct rsnd_mod *rsnd_scu_mod_get(struct rsnd_priv *priv, int id);
-+#define rsnd_scu_nr(priv) ((priv)->scu_nr)
-+
- #endif
-diff --git a/sound/soc/sh/rcar/scu.c b/sound/soc/sh/rcar/scu.c
-new file mode 100644
-index 000000000000..c12e65f240a1
---- /dev/null
-+++ b/sound/soc/sh/rcar/scu.c
-@@ -0,0 +1,125 @@
-+/*
-+ * Renesas R-Car SCU support
-+ *
-+ * Copyright (C) 2013 Renesas Solutions Corp.
-+ * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+#include "rsnd.h"
-+
-+struct rsnd_scu {
-+	struct rsnd_scu_platform_info *info; /* rcar_snd.h */
-+	struct rsnd_mod mod;
-+};
-+
-+#define rsnd_mod_to_scu(_mod)	\
-+	container_of((_mod), struct rsnd_scu, mod)
-+
-+#define for_each_rsnd_scu(pos, priv, i)					\
-+	for ((i) = 0;							\
-+	     ((i) < rsnd_scu_nr(priv)) &&				\
-+		     ((pos) = (struct rsnd_scu *)(priv)->scu + i);	\
-+	     i++)
-+
-+static int rsnd_scu_init(struct rsnd_mod *mod,
-+			 struct rsnd_dai *rdai,
-+			 struct rsnd_dai_stream *io)
-+{
-+	struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
-+	struct device *dev = rsnd_priv_to_dev(priv);
-+
-+	dev_dbg(dev, "%s.%d init\n", rsnd_mod_name(mod), rsnd_mod_id(mod));
-+
-+	return 0;
-+}
-+
-+static int rsnd_scu_quit(struct rsnd_mod *mod,
-+			 struct rsnd_dai *rdai,
-+			 struct rsnd_dai_stream *io)
-+{
-+	struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
-+	struct device *dev = rsnd_priv_to_dev(priv);
-+
-+	dev_dbg(dev, "%s.%d quit\n", rsnd_mod_name(mod), rsnd_mod_id(mod));
-+
-+	return 0;
-+}
-+
-+static int rsnd_scu_start(struct rsnd_mod *mod,
-+			  struct rsnd_dai *rdai,
-+			  struct rsnd_dai_stream *io)
-+{
-+	struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
-+	struct device *dev = rsnd_priv_to_dev(priv);
-+
-+	dev_dbg(dev, "%s.%d start\n", rsnd_mod_name(mod), rsnd_mod_id(mod));
-+
-+	return 0;
-+}
-+
-+static int rsnd_scu_stop(struct rsnd_mod *mod,
-+			 struct rsnd_dai *rdai,
-+			 struct rsnd_dai_stream *io)
-+{
-+	struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
-+	struct device *dev = rsnd_priv_to_dev(priv);
-+
-+	dev_dbg(dev, "%s.%d stop\n", rsnd_mod_name(mod), rsnd_mod_id(mod));
-+
-+	return 0;
-+}
-+
-+static struct rsnd_mod_ops rsnd_scu_ops = {
-+	.name	= "scu",
-+	.init	= rsnd_scu_init,
-+	.quit	= rsnd_scu_quit,
-+	.start	= rsnd_scu_start,
-+	.stop	= rsnd_scu_stop,
-+};
-+
-+struct rsnd_mod *rsnd_scu_mod_get(struct rsnd_priv *priv, int id)
-+{
-+	BUG_ON(id < 0 || id >= rsnd_scu_nr(priv));
-+
-+	return &((struct rsnd_scu *)(priv->scu) + id)->mod;
-+}
-+
-+int rsnd_scu_probe(struct platform_device *pdev,
-+		   struct rcar_snd_info *info,
-+		   struct rsnd_priv *priv)
-+{
-+	struct device *dev = rsnd_priv_to_dev(priv);
-+	struct rsnd_scu *scu;
-+	int i, nr;
-+
-+	/*
-+	 * init SCU
-+	 */
-+	nr	= info->scu_info_nr;
-+	scu	= devm_kzalloc(dev, sizeof(*scu) * nr, GFP_KERNEL);
-+	if (!scu) {
-+		dev_err(dev, "SCU allocate failed\n");
-+		return -ENOMEM;
-+	}
-+
-+	priv->scu_nr	= nr;
-+	priv->scu	= scu;
-+
-+	for_each_rsnd_scu(scu, priv, i) {
-+		rsnd_mod_init(priv, &scu->mod,
-+			      &rsnd_scu_ops, i);
-+		scu->info = &info->scu_info[i];
-+	}
-+
-+	dev_dbg(dev, "scu probed\n");
-+
-+	return 0;
-+}
-+
-+void rsnd_scu_remove(struct platform_device *pdev,
-+		     struct rsnd_priv *priv)
-+{
-+}
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0091-sh-pfc-Add-r8a7778-pinmux-support.patch b/patches.renesas/0091-sh-pfc-Add-r8a7778-pinmux-support.patch
deleted file mode 100644
index 489fdc5d0faaa..0000000000000
--- a/patches.renesas/0091-sh-pfc-Add-r8a7778-pinmux-support.patch
+++ /dev/null
@@ -1,2451 +0,0 @@
-From d214c05155ccb266306bd6119367d158f906de91 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Fri, 12 Apr 2013 05:37:20 +0000
-Subject: sh-pfc: Add r8a7778 pinmux support
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Simon Horman <horms@verge.net.au>
-(cherry picked from commit 87f8c988636db0d477bb63fddfaefb5be9b1c386)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/Kconfig       |    5 +
- drivers/pinctrl/sh-pfc/Makefile      |    1 +
- drivers/pinctrl/sh-pfc/core.c        |    3 +
- drivers/pinctrl/sh-pfc/core.h        |    1 +
- drivers/pinctrl/sh-pfc/pfc-r8a7778.c | 2369 ++++++++++++++++++++++++++++++++++
- 5 files changed, 2379 insertions(+)
- create mode 100644 drivers/pinctrl/sh-pfc/pfc-r8a7778.c
-
-diff --git a/drivers/pinctrl/sh-pfc/Kconfig b/drivers/pinctrl/sh-pfc/Kconfig
-index a0b6bd0b..32161c4f 100644
---- a/drivers/pinctrl/sh-pfc/Kconfig
-+++ b/drivers/pinctrl/sh-pfc/Kconfig
-@@ -30,6 +30,11 @@ config PINCTRL_PFC_R8A7740
- 	depends on ARCH_R8A7740
- 	select PINCTRL_SH_PFC
- 
-+config PINCTRL_PFC_R8A7778
-+	def_bool y
-+	depends on ARCH_R8A7778
-+	select PINCTRL_SH_PFC
-+
- config PINCTRL_PFC_R8A7779
- 	def_bool y
- 	depends on ARCH_R8A7779
-diff --git a/drivers/pinctrl/sh-pfc/Makefile b/drivers/pinctrl/sh-pfc/Makefile
-index 1cbf5b18..5e0c222c 100644
---- a/drivers/pinctrl/sh-pfc/Makefile
-+++ b/drivers/pinctrl/sh-pfc/Makefile
-@@ -5,6 +5,7 @@ endif
- obj-$(CONFIG_PINCTRL_SH_PFC)	+= sh-pfc.o
- obj-$(CONFIG_PINCTRL_PFC_R8A73A4)	+= pfc-r8a73a4.o
- obj-$(CONFIG_PINCTRL_PFC_R8A7740)	+= pfc-r8a7740.o
-+obj-$(CONFIG_PINCTRL_PFC_R8A7778)	+= pfc-r8a7778.o
- obj-$(CONFIG_PINCTRL_PFC_R8A7779)	+= pfc-r8a7779.o
- obj-$(CONFIG_PINCTRL_PFC_R8A7790)	+= pfc-r8a7790.o
- obj-$(CONFIG_PINCTRL_PFC_SH7203)	+= pfc-sh7203.o
-diff --git a/drivers/pinctrl/sh-pfc/core.c b/drivers/pinctrl/sh-pfc/core.c
-index db0d6f7a..4540ce38 100644
---- a/drivers/pinctrl/sh-pfc/core.c
-+++ b/drivers/pinctrl/sh-pfc/core.c
-@@ -424,6 +424,9 @@ static const struct platform_device_id sh_pfc_id_table[] = {
- #ifdef CONFIG_PINCTRL_PFC_R8A7740
- 	{ "pfc-r8a7740", (kernel_ulong_t)&r8a7740_pinmux_info },
- #endif
-+#ifdef CONFIG_PINCTRL_PFC_R8A7778
-+	{ "pfc-r8a7778", (kernel_ulong_t)&r8a7778_pinmux_info },
-+#endif
- #ifdef CONFIG_PINCTRL_PFC_R8A7779
- 	{ "pfc-r8a7779", (kernel_ulong_t)&r8a7779_pinmux_info },
- #endif
-diff --git a/drivers/pinctrl/sh-pfc/core.h b/drivers/pinctrl/sh-pfc/core.h
-index 6ec746f0..e847afbe 100644
---- a/drivers/pinctrl/sh-pfc/core.h
-+++ b/drivers/pinctrl/sh-pfc/core.h
-@@ -57,6 +57,7 @@ int sh_pfc_config_mux(struct sh_pfc *pfc, unsigned mark, int pinmux_type);
- 
- extern const struct sh_pfc_soc_info r8a73a4_pinmux_info;
- extern const struct sh_pfc_soc_info r8a7740_pinmux_info;
-+extern const struct sh_pfc_soc_info r8a7778_pinmux_info;
- extern const struct sh_pfc_soc_info r8a7779_pinmux_info;
- extern const struct sh_pfc_soc_info r8a7790_pinmux_info;
- extern const struct sh_pfc_soc_info sh7203_pinmux_info;
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7778.c b/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
-new file mode 100644
-index 00000000..ddbd27b7
---- /dev/null
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
-@@ -0,0 +1,2369 @@
-+/*
-+ * r8a7778 processor support - PFC hardware block
-+ *
-+ * Copyright (C) 2013  Renesas Solutions Corp.
-+ * Copyright (C) 2013  Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-+ *
-+ * based on
-+ * Copyright (C) 2011  Renesas Solutions Corp.
-+ * Copyright (C) 2011  Magnus Damm
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; version 2 of the License.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ */
-+
-+#include <linux/platform_data/gpio-rcar.h>
-+#include <linux/kernel.h>
-+#include "sh_pfc.h"
-+
-+#define PORT_GP_1(bank, pin, fn, sfx) fn(bank, pin, GP_##bank##_##pin, sfx)
-+
-+#define PORT_GP_32(bank, fn, sfx)					\
-+	PORT_GP_1(bank, 0,  fn, sfx), PORT_GP_1(bank, 1,  fn, sfx),	\
-+	PORT_GP_1(bank, 2,  fn, sfx), PORT_GP_1(bank, 3,  fn, sfx),	\
-+	PORT_GP_1(bank, 4,  fn, sfx), PORT_GP_1(bank, 5,  fn, sfx),	\
-+	PORT_GP_1(bank, 6,  fn, sfx), PORT_GP_1(bank, 7,  fn, sfx),	\
-+	PORT_GP_1(bank, 8,  fn, sfx), PORT_GP_1(bank, 9,  fn, sfx),	\
-+	PORT_GP_1(bank, 10, fn, sfx), PORT_GP_1(bank, 11, fn, sfx),	\
-+	PORT_GP_1(bank, 12, fn, sfx), PORT_GP_1(bank, 13, fn, sfx),	\
-+	PORT_GP_1(bank, 14, fn, sfx), PORT_GP_1(bank, 15, fn, sfx),	\
-+	PORT_GP_1(bank, 16, fn, sfx), PORT_GP_1(bank, 17, fn, sfx),	\
-+	PORT_GP_1(bank, 18, fn, sfx), PORT_GP_1(bank, 19, fn, sfx),	\
-+	PORT_GP_1(bank, 20, fn, sfx), PORT_GP_1(bank, 21, fn, sfx),	\
-+	PORT_GP_1(bank, 22, fn, sfx), PORT_GP_1(bank, 23, fn, sfx),	\
-+	PORT_GP_1(bank, 24, fn, sfx), PORT_GP_1(bank, 25, fn, sfx),	\
-+	PORT_GP_1(bank, 26, fn, sfx), PORT_GP_1(bank, 27, fn, sfx),	\
-+	PORT_GP_1(bank, 28, fn, sfx), PORT_GP_1(bank, 29, fn, sfx),	\
-+	PORT_GP_1(bank, 30, fn, sfx), PORT_GP_1(bank, 31, fn, sfx)
-+
-+#define PORT_GP_27(bank, fn, sfx)					\
-+	PORT_GP_1(bank, 0,  fn, sfx), PORT_GP_1(bank, 1,  fn, sfx),	\
-+	PORT_GP_1(bank, 2,  fn, sfx), PORT_GP_1(bank, 3,  fn, sfx),	\
-+	PORT_GP_1(bank, 4,  fn, sfx), PORT_GP_1(bank, 5,  fn, sfx),	\
-+	PORT_GP_1(bank, 6,  fn, sfx), PORT_GP_1(bank, 7,  fn, sfx),	\
-+	PORT_GP_1(bank, 8,  fn, sfx), PORT_GP_1(bank, 9,  fn, sfx),	\
-+	PORT_GP_1(bank, 10, fn, sfx), PORT_GP_1(bank, 11, fn, sfx),	\
-+	PORT_GP_1(bank, 12, fn, sfx), PORT_GP_1(bank, 13, fn, sfx),	\
-+	PORT_GP_1(bank, 14, fn, sfx), PORT_GP_1(bank, 15, fn, sfx),	\
-+	PORT_GP_1(bank, 16, fn, sfx), PORT_GP_1(bank, 17, fn, sfx),	\
-+	PORT_GP_1(bank, 18, fn, sfx), PORT_GP_1(bank, 19, fn, sfx),	\
-+	PORT_GP_1(bank, 20, fn, sfx), PORT_GP_1(bank, 21, fn, sfx),	\
-+	PORT_GP_1(bank, 22, fn, sfx), PORT_GP_1(bank, 23, fn, sfx),	\
-+	PORT_GP_1(bank, 24, fn, sfx), PORT_GP_1(bank, 25, fn, sfx),	\
-+	PORT_GP_1(bank, 26, fn, sfx)
-+
-+#define CPU_ALL_PORT(fn, sfx)		\
-+	PORT_GP_32(0, fn, sfx),		\
-+	PORT_GP_32(1, fn, sfx),		\
-+	PORT_GP_32(2, fn, sfx),		\
-+	PORT_GP_32(3, fn, sfx),		\
-+	PORT_GP_27(4, fn, sfx)
-+
-+#define _GP_PORT_ALL(bank, pin, name, sfx)	name##_##sfx
-+
-+#define _GP_GPIO(bank, pin, _name, sfx)		\
-+	[RCAR_GP_PIN(bank, pin)] = {		\
-+		.name = __stringify(_name),	\
-+		.enum_id = _name##_DATA,	\
-+	}
-+
-+#define _GP_DATA(bank, pin, name, sfx)		\
-+	PINMUX_DATA(name##_DATA, name##_FN)
-+
-+#define GP_ALL(str)		CPU_ALL_PORT(_GP_PORT_ALL, str)
-+#define PINMUX_GPIO_GP_ALL()	CPU_ALL_PORT(_GP_GPIO, unused)
-+#define PINMUX_DATA_GP_ALL()	CPU_ALL_PORT(_GP_DATA, unused)
-+
-+#define PINMUX_IPSR_NOGP(ispr, fn)	PINMUX_DATA(fn##_MARK, FN_##fn)
-+#define PINMUX_IPSR_DATA(ipsr, fn)	PINMUX_DATA(fn##_MARK, FN_##fn, FN_##ipsr)
-+#define PINMUX_IPSR_MSEL(ipsr, fn, ms)	PINMUX_DATA(fn##_MARK, FN_##fn, FN_##ipsr, FN_##ms)
-+#define PINMUX_IPSR_NOGM(ispr, fn, ms)	PINMUX_DATA(fn##_MARK, FN_##fn,            FN_##ms)
-+
-+enum {
-+	PINMUX_RESERVED = 0,
-+
-+	PINMUX_DATA_BEGIN,
-+	GP_ALL(DATA), /* GP_0_0_DATA -> GP_4_26_DATA */
-+	PINMUX_DATA_END,
-+
-+	PINMUX_FUNCTION_BEGIN,
-+	GP_ALL(FN), /* GP_0_0_FN -> GP_4_26_FN */
-+
-+	/* GPSR0 */
-+	FN_IP0_1_0,	FN_PENC0,	FN_PENC1,	FN_IP0_4_2,
-+	FN_IP0_7_5,	FN_IP0_11_8,	FN_IP0_14_12,	FN_A1,
-+	FN_A2,		FN_A3,		FN_IP0_15,	FN_IP0_16,
-+	FN_IP0_17,	FN_IP0_18,	FN_IP0_19,	FN_IP0_20,
-+	FN_IP0_21,	FN_IP0_22,	FN_IP0_23,	FN_IP0_24,
-+	FN_IP0_25,	FN_IP0_26,	FN_IP0_27,	FN_IP0_28,
-+	FN_IP0_29,	FN_IP0_30,	FN_IP1_0,	FN_IP1_1,
-+	FN_IP1_4_2,	FN_IP1_7_5,	FN_IP1_10_8,	FN_IP1_14_11,
-+
-+	/* GPSR1 */
-+	FN_IP1_23_21,	FN_WE0,		FN_IP1_24,	FN_IP1_27_25,
-+	FN_IP1_29_28,	FN_IP2_2_0,	FN_IP2_5_3,	FN_IP2_8_6,
-+	FN_IP2_11_9,	FN_IP2_13_12,	FN_IP2_16_14,	FN_IP2_17,
-+	FN_IP2_30,	FN_IP2_31,	FN_IP3_1_0,	FN_IP3_4_2,
-+	FN_IP3_7_5,	FN_IP3_9_8,	FN_IP3_12_10,	FN_IP3_15_13,
-+	FN_IP3_18_16,	FN_IP3_20_19,	FN_IP3_23_21,	FN_IP3_26_24,
-+	FN_IP3_27,	FN_IP3_28,	FN_IP3_29,	FN_IP3_30,
-+	FN_IP3_31,	FN_IP4_0,	FN_IP4_3_1,	FN_IP4_6_4,
-+
-+	/* GPSR2 */
-+	FN_IP4_7,	FN_IP4_8,	FN_IP4_10_9,	FN_IP4_12_11,
-+	FN_IP4_14_13,	FN_IP4_16_15,	FN_IP4_20_17,	FN_IP4_24_21,
-+	FN_IP4_26_25,	FN_IP4_28_27,	FN_IP4_30_29,	FN_IP5_1_0,
-+	FN_IP5_3_2,	FN_IP5_5_4,	FN_IP5_6,	FN_IP5_7,
-+	FN_IP5_9_8,	FN_IP5_11_10,	FN_IP5_12,	FN_IP5_14_13,
-+	FN_IP5_17_15,	FN_IP5_20_18,	FN_AUDIO_CLKA,	FN_AUDIO_CLKB,
-+	FN_IP5_22_21,	FN_IP5_25_23,	FN_IP5_28_26,	FN_IP5_30_29,
-+	FN_IP6_1_0,	FN_IP6_4_2,	FN_IP6_6_5,	FN_IP6_7,
-+
-+	/* GPSR3 */
-+	FN_IP6_8,	FN_IP6_9,	FN_SSI_SCK34,	FN_IP6_10,
-+	FN_IP6_12_11,	FN_IP6_13,	FN_IP6_15_14,	FN_IP6_16,
-+	FN_IP6_18_17,	FN_IP6_20_19,	FN_IP6_21,	FN_IP6_23_22,
-+	FN_IP6_25_24,	FN_IP6_27_26,	FN_IP6_29_28,	FN_IP6_31_30,
-+	FN_IP7_1_0,	FN_IP7_3_2,	FN_IP7_5_4,	FN_IP7_8_6,
-+	FN_IP7_11_9,	FN_IP7_14_12,	FN_IP7_17_15,	FN_IP7_20_18,
-+	FN_IP7_21,	FN_IP7_24_22,	FN_IP7_28_25,	FN_IP7_31_29,
-+	FN_IP8_2_0,	FN_IP8_5_3,	FN_IP8_8_6,	FN_IP8_10_9,
-+
-+	/* GPSR4 */
-+	FN_IP8_13_11,	FN_IP8_15_14,	FN_IP8_18_16,	FN_IP8_21_19,
-+	FN_IP8_23_22,	FN_IP8_26_24,	FN_IP8_29_27,	FN_IP9_2_0,
-+	FN_IP9_5_3,	FN_IP9_8_6,	FN_IP9_11_9,	FN_IP9_14_12,
-+	FN_IP9_17_15,	FN_IP9_20_18,	FN_IP9_23_21,	FN_IP9_26_24,
-+	FN_IP9_29_27,	FN_IP10_2_0,	FN_IP10_5_3,	FN_IP10_8_6,
-+	FN_IP10_12_9,	FN_IP10_15_13,	FN_IP10_18_16,	FN_IP10_21_19,
-+	FN_IP10_24_22,	FN_AVS1,	FN_AVS2,
-+
-+	/* IPSR0 */
-+	FN_PRESETOUT,	FN_PWM1,	FN_AUDATA0,	FN_ARM_TRACEDATA_0,
-+	FN_GPSCLK_C,	FN_USB_OVC0,	FN_TX2_E,	FN_SDA2_B,
-+	FN_AUDATA1,	FN_ARM_TRACEDATA_1,		FN_GPSIN_C,
-+	FN_USB_OVC1,	FN_RX2_E,	FN_SCL2_B,	FN_SD1_DAT2_A,
-+	FN_MMC_D2,	FN_BS,		FN_ATADIR0_A,	FN_SDSELF_A,
-+	FN_PWM4_B,	FN_SD1_DAT3_A,	FN_MMC_D3,	FN_A0,
-+	FN_ATAG0_A,	FN_REMOCON_B,	FN_A4,		FN_A5,
-+	FN_A6,		FN_A7,		FN_A8,		FN_A9,
-+	FN_A10,		FN_A11,		FN_A12,		FN_A13,
-+	FN_A14,		FN_A15,		FN_A16,		FN_A17,
-+	FN_A18,		FN_A19,
-+
-+	/* IPSR1 */
-+	FN_A20,		FN_HSPI_CS1_B,	FN_A21,		FN_HSPI_CLK1_B,
-+	FN_A22,		FN_HRTS0_B,	FN_RX2_B,	FN_DREQ2_A,
-+	FN_A23,		FN_HTX0_B,	FN_TX2_B,	FN_DACK2_A,
-+	FN_TS_SDEN0_A,	FN_SD1_CD_A,	FN_MMC_D6,	FN_A24,
-+	FN_DREQ1_A,	FN_HRX0_B,	FN_TS_SPSYNC0_A,
-+	FN_SD1_WP_A,	FN_MMC_D7,	FN_A25,	FN_DACK1_A,
-+	FN_HCTS0_B,	FN_RX3_C,	FN_TS_SDAT0_A,	FN_CLKOUT,
-+	FN_HSPI_TX1_B,	FN_PWM0_B,	FN_CS0,		FN_HSPI_RX1_B,
-+	FN_SSI_SCK1_B,	FN_ATAG0_B,	FN_CS1_A26,	FN_SDA2_A,
-+	FN_SCK2_B,	FN_MMC_D5,	FN_ATADIR0_B,	FN_RD_WR,
-+	FN_WE1,		FN_ATAWR0_B,	FN_SSI_WS1_B,	FN_EX_CS0,
-+	FN_SCL2_A,	FN_TX3_C,	FN_TS_SCK0_A,	FN_EX_CS1,
-+	FN_MMC_D4,
-+
-+	/* IPSR2 */
-+	FN_SD1_CLK_A,	FN_MMC_CLK,	FN_ATACS00,	FN_EX_CS2,
-+	FN_SD1_CMD_A,	FN_MMC_CMD,	FN_ATACS10,	FN_EX_CS3,
-+	FN_SD1_DAT0_A,	FN_MMC_D0,	FN_ATARD0,	FN_EX_CS4,
-+	FN_EX_WAIT1_A,	FN_SD1_DAT1_A,	FN_MMC_D1,	FN_ATAWR0_A,
-+	FN_EX_CS5,	FN_EX_WAIT2_A,	FN_DREQ0_A,	FN_RX3_A,
-+	FN_DACK0,	FN_TX3_A,	FN_DRACK0,	FN_EX_WAIT0,
-+	FN_PWM0_C,	FN_D0,		FN_D1,		FN_D2,
-+	FN_D3,		FN_D4,		FN_D5,		FN_D6,
-+	FN_D7,		FN_D8,		FN_D9,		FN_D10,
-+	FN_D11,		FN_RD_WR_B,	FN_IRQ0,	FN_MLB_CLK,
-+	FN_IRQ1_A,
-+
-+	/* IPSR3 */
-+	FN_MLB_SIG,	FN_RX5_B,	FN_SDA3_A,	FN_IRQ2_A,
-+	FN_MLB_DAT,	FN_TX5_B,	FN_SCL3_A,	FN_IRQ3_A,
-+	FN_SDSELF_B,	FN_SD1_CMD_B,	FN_SCIF_CLK,	FN_AUDIO_CLKOUT_B,
-+	FN_CAN_CLK_B,	FN_SDA3_B,	FN_SD1_CLK_B,	FN_HTX0_A,
-+	FN_TX0_A,	FN_SD1_DAT0_B,	FN_HRX0_A,	FN_RX0_A,
-+	FN_SD1_DAT1_B,	FN_HSCK0,	FN_SCK0,	FN_SCL3_B,
-+	FN_SD1_DAT2_B,	FN_HCTS0_A,	FN_CTS0,	FN_SD1_DAT3_B,
-+	FN_HRTS0_A,	FN_RTS0,	FN_SSI_SCK4,	FN_DU0_DR0,
-+	FN_LCDOUT0,	FN_AUDATA2,	FN_ARM_TRACEDATA_2,
-+	FN_SDA3_C,	FN_ADICHS1,	FN_TS_SDEN0_B,	FN_SSI_WS4,
-+	FN_DU0_DR1,	FN_LCDOUT1,	FN_AUDATA3,	FN_ARM_TRACEDATA_3,
-+	FN_SCL3_C,	FN_ADICHS2,	FN_TS_SPSYNC0_B,
-+	FN_DU0_DR2,	FN_LCDOUT2,	FN_DU0_DR3,	FN_LCDOUT3,
-+	FN_DU0_DR4,	FN_LCDOUT4,	FN_DU0_DR5,	FN_LCDOUT5,
-+	FN_DU0_DR6,	FN_LCDOUT6,
-+
-+	/* IPSR4 */
-+	FN_DU0_DR7,	FN_LCDOUT7,	FN_DU0_DG0,	FN_LCDOUT8,
-+	FN_AUDATA4,	FN_ARM_TRACEDATA_4,		FN_TX1_D,
-+	FN_CAN0_TX_A,	FN_ADICHS0,	FN_DU0_DG1,	FN_LCDOUT9,
-+	FN_AUDATA5,	FN_ARM_TRACEDATA_5,		FN_RX1_D,
-+	FN_CAN0_RX_A,	FN_ADIDATA,	FN_DU0_DG2,	FN_LCDOUT10,
-+	FN_DU0_DG3,	FN_LCDOUT11,	FN_DU0_DG4,	FN_LCDOUT12,
-+	FN_RX0_B,	FN_DU0_DG5,	FN_LCDOUT13,	FN_TX0_B,
-+	FN_DU0_DG6,	FN_LCDOUT14,	FN_RX4_A,	FN_DU0_DG7,
-+	FN_LCDOUT15,	FN_TX4_A,	FN_SSI_SCK2_B,	FN_VI0_R0_B,
-+	FN_DU0_DB0,	FN_LCDOUT16,	FN_AUDATA6,	FN_ARM_TRACEDATA_6,
-+	FN_GPSCLK_A,	FN_PWM0_A,	FN_ADICLK,	FN_TS_SDAT0_B,
-+	FN_AUDIO_CLKC,	FN_VI0_R1_B,	FN_DU0_DB1,	FN_LCDOUT17,
-+	FN_AUDATA7,	FN_ARM_TRACEDATA_7,		FN_GPSIN_A,
-+	FN_ADICS_SAMP,	FN_TS_SCK0_B,	FN_VI0_R2_B,	FN_DU0_DB2,
-+	FN_LCDOUT18,	FN_VI0_R3_B,	FN_DU0_DB3,	FN_LCDOUT19,
-+	FN_VI0_R4_B,	FN_DU0_DB4,	FN_LCDOUT20,
-+
-+	/* IPSR5 */
-+	FN_VI0_R5_B,	FN_DU0_DB5,	FN_LCDOUT21,	FN_VI1_DATA10_B,
-+	FN_DU0_DB6,	FN_LCDOUT22,	FN_VI1_DATA11_B,
-+	FN_DU0_DB7,	FN_LCDOUT23,	FN_DU0_DOTCLKIN,
-+	FN_QSTVA_QVS,	FN_DU0_DOTCLKO_UT0,		FN_QCLK,
-+	FN_DU0_DOTCLKO_UT1,		FN_QSTVB_QVE,	FN_AUDIO_CLKOUT_A,
-+	FN_REMOCON_C,	FN_SSI_WS2_B,	FN_DU0_EXHSYNC_DU0_HSYNC,
-+	FN_QSTH_QHS,	FN_DU0_EXVSYNC_DU0_VSYNC,	FN_QSTB_QHE,
-+	FN_DU0_EXODDF_DU0_ODDF_DISP_CDE,
-+	FN_QCPV_QDE,	FN_FMCLK_D,	FN_SSI_SCK1_A,	FN_DU0_DISP,
-+	FN_QPOLA,	FN_AUDCK,	FN_ARM_TRACECLK,
-+	FN_BPFCLK_D,	FN_SSI_WS1_A,	FN_DU0_CDE,	FN_QPOLB,
-+	FN_AUDSYNC,	FN_ARM_TRACECTL,		FN_FMIN_D,
-+	FN_SD1_CD_B,	FN_SSI_SCK78,	FN_HSPI_RX0_B,	FN_TX1_B,
-+	FN_SD1_WP_B,	FN_SSI_WS78,	FN_HSPI_CLK0_B,	FN_RX1_B,
-+	FN_CAN_CLK_D,	FN_SSI_SDATA8,	FN_SSI_SCK2_A,	FN_HSPI_CS0_B,
-+	FN_TX2_A,	FN_CAN0_TX_B,	FN_SSI_SDATA7,	FN_HSPI_TX0_B,
-+	FN_RX2_A,	FN_CAN0_RX_B,
-+
-+	/* IPSR6 */
-+	FN_SSI_SCK6,	FN_HSPI_RX2_A,	FN_FMCLK_B,	FN_CAN1_TX_B,
-+	FN_SSI_WS6,	FN_HSPI_CLK2_A,	FN_BPFCLK_B,	FN_CAN1_RX_B,
-+	FN_SSI_SDATA6,	FN_HSPI_TX2_A,	FN_FMIN_B,	FN_SSI_SCK5,
-+	FN_RX4_C,	FN_SSI_WS5,	FN_TX4_C,	FN_SSI_SDATA5,
-+	FN_RX0_D,	FN_SSI_WS34,	FN_ARM_TRACEDATA_8,
-+	FN_SSI_SDATA4,	FN_SSI_WS2_A,	FN_ARM_TRACEDATA_9,
-+	FN_SSI_SDATA3,	FN_ARM_TRACEDATA_10,
-+	FN_SSI_SCK012,	FN_ARM_TRACEDATA_11,
-+	FN_TX0_D,	FN_SSI_WS012,	FN_ARM_TRACEDATA_12,
-+	FN_SSI_SDATA2,	FN_HSPI_CS2_A,	FN_ARM_TRACEDATA_13,
-+	FN_SDA1_A,	FN_SSI_SDATA1,	FN_ARM_TRACEDATA_14,
-+	FN_SCL1_A,	FN_SCK2_A,	FN_SSI_SDATA0,
-+	FN_ARM_TRACEDATA_15,
-+	FN_SD0_CLK,	FN_SUB_TDO,	FN_SD0_CMD,	FN_SUB_TRST,
-+	FN_SD0_DAT0,	FN_SUB_TMS,	FN_SD0_DAT1,	FN_SUB_TCK,
-+	FN_SD0_DAT2,	FN_SUB_TDI,
-+
-+	/* IPSR7 */
-+	FN_SD0_DAT3,	FN_IRQ1_B,	FN_SD0_CD,	FN_TX5_A,
-+	FN_SD0_WP,	FN_RX5_A,	FN_VI1_CLKENB,	FN_HSPI_CLK0_A,
-+	FN_HTX1_A,	FN_RTS1_C,	FN_VI1_FIELD,	FN_HSPI_CS0_A,
-+	FN_HRX1_A,	FN_SCK1_C,	FN_VI1_HSYNC,	FN_HSPI_RX0_A,
-+	FN_HRTS1_A,	FN_FMCLK_A,	FN_RX1_C,	FN_VI1_VSYNC,
-+	FN_HSPI_TX0,	FN_HCTS1_A,	FN_BPFCLK_A,	FN_TX1_C,
-+	FN_TCLK0,	FN_HSCK1_A,	FN_FMIN_A,	FN_IRQ2_C,
-+	FN_CTS1_C,	FN_SPEEDIN,	FN_VI0_CLK,	FN_CAN_CLK_A,
-+	FN_VI0_CLKENB,	FN_SD2_DAT2_B,	FN_VI1_DATA0,	FN_DU1_DG6,
-+	FN_HSPI_RX1_A,	FN_RX4_B,	FN_VI0_FIELD,	FN_SD2_DAT3_B,
-+	FN_VI0_R3_C,	FN_VI1_DATA1,	FN_DU1_DG7,	FN_HSPI_CLK1_A,
-+	FN_TX4_B,	FN_VI0_HSYNC,	FN_SD2_CD_B,	FN_VI1_DATA2,
-+	FN_DU1_DR2,	FN_HSPI_CS1_A,	FN_RX3_B,
-+
-+	/* IPSR8 */
-+	FN_VI0_VSYNC,	FN_SD2_WP_B,	FN_VI1_DATA3,	FN_DU1_DR3,
-+	FN_HSPI_TX1_A,	FN_TX3_B,	FN_VI0_DATA0_VI0_B0,
-+	FN_DU1_DG2,	FN_IRQ2_B,	FN_RX3_D,	FN_VI0_DATA1_VI0_B1,
-+	FN_DU1_DG3,	FN_IRQ3_B,	FN_TX3_D,	FN_VI0_DATA2_VI0_B2,
-+	FN_DU1_DG4,	FN_RX0_C,	FN_VI0_DATA3_VI0_B3,
-+	FN_DU1_DG5,	FN_TX1_A,	FN_TX0_C,	FN_VI0_DATA4_VI0_B4,
-+	FN_DU1_DB2,	FN_RX1_A,	FN_VI0_DATA5_VI0_B5,
-+	FN_DU1_DB3,	FN_SCK1_A,	FN_PWM4,	FN_HSCK1_B,
-+	FN_VI0_DATA6_VI0_G0,		FN_DU1_DB4,	FN_CTS1_A,
-+	FN_PWM5,	FN_VI0_DATA7_VI0_G1,		FN_DU1_DB5,
-+	FN_RTS1_A,	FN_VI0_G2,	FN_SD2_CLK_B,	FN_VI1_DATA4,
-+	FN_DU1_DR4,	FN_HTX1_B,	FN_VI0_G3,	FN_SD2_CMD_B,
-+	FN_VI1_DATA5,	FN_DU1_DR5,	FN_HRX1_B,
-+
-+	/* IPSR9 */
-+	FN_VI0_G4,	FN_SD2_DAT0_B,	FN_VI1_DATA6,	FN_DU1_DR6,
-+	FN_HRTS1_B,	FN_VI0_G5,	FN_SD2_DAT1_B,	FN_VI1_DATA7,
-+	FN_DU1_DR7,	FN_HCTS1_B,	FN_VI0_R0_A,	FN_VI1_CLK,
-+	FN_ETH_REF_CLK,	FN_DU1_DOTCLKIN,		FN_VI0_R1_A,
-+	FN_VI1_DATA8,	FN_DU1_DB6,	FN_ETH_TXD0,	FN_PWM2,
-+	FN_TCLK1,	FN_VI0_R2_A,	FN_VI1_DATA9,	FN_DU1_DB7,
-+	FN_ETH_TXD1,	FN_PWM3,	FN_VI0_R3_A,	FN_ETH_CRS_DV,
-+	FN_IECLK,	FN_SCK2_C,	FN_VI0_R4_A,	FN_ETH_TX_EN,
-+	FN_IETX,	FN_TX2_C,	FN_VI0_R5_A,	FN_ETH_RX_ER,
-+	FN_FMCLK_C,	FN_IERX,	FN_RX2_C,	FN_VI1_DATA10_A,
-+	FN_DU1_DOTCLKOUT,		FN_ETH_RXD0,	FN_BPFCLK_C,
-+	FN_TX2_D,	FN_SDA2_C,	FN_VI1_DATA11_A,
-+	FN_DU1_EXHSYNC_DU1_HSYNC,	FN_ETH_RXD1,	FN_FMIN_C,
-+	FN_RX2_D,	FN_SCL2_C,
-+
-+	/* IPSR10 */
-+	FN_SD2_CLK_A,	FN_DU1_EXVSYNC_DU1_VSYNC,	FN_ATARD1,
-+	FN_ETH_MDC,	FN_SDA1_B,	FN_SD2_CMD_A,
-+	FN_DU1_EXODDF_DU1_ODDF_DISP_CDE,		FN_ATAWR1,
-+	FN_ETH_MDIO,	FN_SCL1_B,	FN_SD2_DAT0_A,	FN_DU1_DISP,
-+	FN_ATACS01,	FN_DREQ1_B,	FN_ETH_LINK,	FN_CAN1_RX_A,
-+	FN_SD2_DAT1_A,	FN_DU1_CDE,	FN_ATACS11,	FN_DACK1_B,
-+	FN_ETH_MAGIC,	FN_CAN1_TX_A,	FN_PWM6,	FN_SD2_DAT2_A,
-+	FN_VI1_DATA12,	FN_DREQ2_B,	FN_ATADIR1,	FN_HSPI_CLK2_B,
-+	FN_GPSCLK_B,	FN_SD2_DAT3_A,	FN_VI1_DATA13,	FN_DACK2_B,
-+	FN_ATAG1,	FN_HSPI_CS2_B,	FN_GPSIN_B,	FN_SD2_CD_A,
-+	FN_VI1_DATA14,	FN_EX_WAIT1_B,	FN_DREQ0_B,	FN_HSPI_RX2_B,
-+	FN_REMOCON_A,	FN_SD2_WP_A,	FN_VI1_DATA15,	FN_EX_WAIT2_B,
-+	FN_DACK0_B,	FN_HSPI_TX2_B,	FN_CAN_CLK_C,
-+
-+	/* SEL */
-+	FN_SEL_SCIF5_A,	FN_SEL_SCIF5_B,
-+	FN_SEL_SCIF4_A,	FN_SEL_SCIF4_B,	FN_SEL_SCIF4_C,
-+	FN_SEL_SCIF3_A,	FN_SEL_SCIF3_B,	FN_SEL_SCIF3_C,	FN_SEL_SCIF3_D,
-+	FN_SEL_SCIF2_A,	FN_SEL_SCIF2_B,	FN_SEL_SCIF2_C,	FN_SEL_SCIF2_D,	FN_SEL_SCIF2_E,
-+	FN_SEL_SCIF1_A,	FN_SEL_SCIF1_B,	FN_SEL_SCIF1_C,	FN_SEL_SCIF1_D,
-+	FN_SEL_SCIF0_A,	FN_SEL_SCIF0_B,	FN_SEL_SCIF0_C,	FN_SEL_SCIF0_D,
-+	FN_SEL_SSI2_A,	FN_SEL_SSI2_B,
-+	FN_SEL_SSI1_A,	FN_SEL_SSI1_B,
-+	FN_SEL_VI1_A,	FN_SEL_VI1_B,
-+	FN_SEL_VI0_A,	FN_SEL_VI0_B,	FN_SEL_VI0_C,	FN_SEL_VI0_D,
-+	FN_SEL_SD2_A,	FN_SEL_SD2_B,
-+	FN_SEL_SD1_A,	FN_SEL_SD1_B,
-+	FN_SEL_IRQ3_A,	FN_SEL_IRQ3_B,
-+	FN_SEL_IRQ2_A,	FN_SEL_IRQ2_B,	FN_SEL_IRQ2_C,
-+	FN_SEL_IRQ1_A,	FN_SEL_IRQ1_B,
-+	FN_SEL_DREQ2_A,	FN_SEL_DREQ2_B,
-+	FN_SEL_DREQ1_A,	FN_SEL_DREQ1_B,
-+	FN_SEL_DREQ0_A,	FN_SEL_DREQ0_B,
-+	FN_SEL_WAIT2_A,	FN_SEL_WAIT2_B,
-+	FN_SEL_WAIT1_A,	FN_SEL_WAIT1_B,
-+	FN_SEL_CAN1_A,	FN_SEL_CAN1_B,
-+	FN_SEL_CAN0_A,	FN_SEL_CAN0_B,
-+	FN_SEL_CANCLK_A,	FN_SEL_CANCLK_B,
-+	FN_SEL_CANCLK_C,	FN_SEL_CANCLK_D,
-+	FN_SEL_HSCIF1_A,	FN_SEL_HSCIF1_B,
-+	FN_SEL_HSCIF0_A,	FN_SEL_HSCIF0_B,
-+	FN_SEL_REMOCON_A,	FN_SEL_REMOCON_B,	FN_SEL_REMOCON_C,
-+	FN_SEL_FM_A,	FN_SEL_FM_B,	FN_SEL_FM_C,	FN_SEL_FM_D,
-+	FN_SEL_GPS_A,	FN_SEL_GPS_B,	FN_SEL_GPS_C,
-+	FN_SEL_TSIF0_A,	FN_SEL_TSIF0_B,
-+	FN_SEL_HSPI2_A,	FN_SEL_HSPI2_B,
-+	FN_SEL_HSPI1_A,	FN_SEL_HSPI1_B,
-+	FN_SEL_HSPI0_A,	FN_SEL_HSPI0_B,
-+	FN_SEL_I2C3_A,	FN_SEL_I2C3_B,	FN_SEL_I2C3_C,
-+	FN_SEL_I2C2_A,	FN_SEL_I2C2_B,	FN_SEL_I2C2_C,
-+	FN_SEL_I2C1_A,	FN_SEL_I2C1_B,
-+	PINMUX_FUNCTION_END,
-+
-+	PINMUX_MARK_BEGIN,
-+
-+	/* GPSR0 */
-+	PENC0_MARK,	PENC1_MARK,	A1_MARK,	A2_MARK,	A3_MARK,
-+
-+	/* GPSR1 */
-+	WE0_MARK,
-+
-+	/* GPSR2 */
-+	AUDIO_CLKA_MARK,
-+	AUDIO_CLKB_MARK,
-+
-+	/* GPSR3 */
-+	SSI_SCK34_MARK,
-+
-+	/* GPSR4 */
-+	AVS1_MARK,
-+	AVS2_MARK,
-+
-+	VI0_R0_C_MARK,  /* see GPIO_FN_VI0_R0_A */
-+	VI0_R1_C_MARK,  /* see GPIO_FN_VI0_R1_A */
-+	VI0_R2_C_MARK,  /* see GPIO_FN_VI0_R2_A */
-+	/* VI0_R3_C_MARK,  see GPIO_FN_VI0_R3_A */
-+	VI0_R4_C_MARK,  /* see GPIO_FN_VI0_R4_A */
-+	VI0_R5_C_MARK,  /* see GPIO_FN_VI0_R5_A */
-+
-+	VI0_R0_D_MARK,  /* see GPIO_FN_VI0_R0_B */
-+	VI0_R1_D_MARK,  /* see GPIO_FN_VI0_R1_B */
-+	VI0_R2_D_MARK,  /* see GPIO_FN_VI0_R2_B */
-+	VI0_R3_D_MARK,  /* see GPIO_FN_VI0_R3_B */
-+	VI0_R4_D_MARK,  /* see GPIO_FN_VI0_R4_B */
-+	VI0_R5_D_MARK,  /* see GPIO_FN_VI0_R5_B */
-+
-+	/* IPSR0 */
-+	PRESETOUT_MARK,	PWM1_MARK,	AUDATA0_MARK,
-+	ARM_TRACEDATA_0_MARK,		GPSCLK_C_MARK,	USB_OVC0_MARK,
-+	TX2_E_MARK,	SDA2_B_MARK,	AUDATA1_MARK,	ARM_TRACEDATA_1_MARK,
-+	GPSIN_C_MARK,	USB_OVC1_MARK,	RX2_E_MARK,	SCL2_B_MARK,
-+	SD1_DAT2_A_MARK,		MMC_D2_MARK,	BS_MARK,
-+	ATADIR0_A_MARK,	SDSELF_A_MARK,	PWM4_B_MARK,	SD1_DAT3_A_MARK,
-+	MMC_D3_MARK,	A0_MARK,	ATAG0_A_MARK,	REMOCON_B_MARK,
-+	A4_MARK,	A5_MARK,	A6_MARK,	A7_MARK,
-+	A8_MARK,	A9_MARK,	A10_MARK,	A11_MARK,
-+	A12_MARK,	A13_MARK,	A14_MARK,	A15_MARK,
-+	A16_MARK,	A17_MARK,	A18_MARK,	A19_MARK,
-+
-+	/* IPSR1 */
-+	A20_MARK,	HSPI_CS1_B_MARK,		A21_MARK,
-+	HSPI_CLK1_B_MARK,		A22_MARK,	HRTS0_B_MARK,
-+	RX2_B_MARK,	DREQ2_A_MARK,	A23_MARK,	HTX0_B_MARK,
-+	TX2_B_MARK,	DACK2_A_MARK,	TS_SDEN0_A_MARK,
-+	SD1_CD_A_MARK,	MMC_D6_MARK,	A24_MARK,	DREQ1_A_MARK,
-+	HRX0_B_MARK,	TS_SPSYNC0_A_MARK,		SD1_WP_A_MARK,
-+	MMC_D7_MARK,	A25_MARK,	DACK1_A_MARK,	HCTS0_B_MARK,
-+	RX3_C_MARK,	TS_SDAT0_A_MARK,		CLKOUT_MARK,
-+	HSPI_TX1_B_MARK,		PWM0_B_MARK,	CS0_MARK,
-+	HSPI_RX1_B_MARK,		SSI_SCK1_B_MARK,
-+	ATAG0_B_MARK,	CS1_A26_MARK,	SDA2_A_MARK,	SCK2_B_MARK,
-+	MMC_D5_MARK,	ATADIR0_B_MARK,	RD_WR_MARK,	WE1_MARK,
-+	ATAWR0_B_MARK,	SSI_WS1_B_MARK,	EX_CS0_MARK,	SCL2_A_MARK,
-+	TX3_C_MARK,	TS_SCK0_A_MARK,	EX_CS1_MARK,	MMC_D4_MARK,
-+
-+	/* IPSR2 */
-+	SD1_CLK_A_MARK,	MMC_CLK_MARK,	ATACS00_MARK,	EX_CS2_MARK,
-+	SD1_CMD_A_MARK,	MMC_CMD_MARK,	ATACS10_MARK,	EX_CS3_MARK,
-+	SD1_DAT0_A_MARK,		MMC_D0_MARK,	ATARD0_MARK,
-+	EX_CS4_MARK,	EX_WAIT1_A_MARK,		SD1_DAT1_A_MARK,
-+	MMC_D1_MARK,	ATAWR0_A_MARK,	EX_CS5_MARK,	EX_WAIT2_A_MARK,
-+	DREQ0_A_MARK,	RX3_A_MARK,	DACK0_MARK,	TX3_A_MARK,
-+	DRACK0_MARK,	EX_WAIT0_MARK,	PWM0_C_MARK,	D0_MARK,
-+	D1_MARK,	D2_MARK,	D3_MARK,	D4_MARK,
-+	D5_MARK,	D6_MARK,	D7_MARK,	D8_MARK,
-+	D9_MARK,	D10_MARK,	D11_MARK,	RD_WR_B_MARK,
-+	IRQ0_MARK,	MLB_CLK_MARK,	IRQ1_A_MARK,
-+
-+	/* IPSR3 */
-+	MLB_SIG_MARK,	RX5_B_MARK,	SDA3_A_MARK,	IRQ2_A_MARK,
-+	MLB_DAT_MARK,	TX5_B_MARK,	SCL3_A_MARK,	IRQ3_A_MARK,
-+	SDSELF_B_MARK,	SD1_CMD_B_MARK,	SCIF_CLK_MARK,	AUDIO_CLKOUT_B_MARK,
-+	CAN_CLK_B_MARK,	SDA3_B_MARK,	SD1_CLK_B_MARK,	HTX0_A_MARK,
-+	TX0_A_MARK,	SD1_DAT0_B_MARK,		HRX0_A_MARK,
-+	RX0_A_MARK,	SD1_DAT1_B_MARK,		HSCK0_MARK,
-+	SCK0_MARK,	SCL3_B_MARK,	SD1_DAT2_B_MARK,
-+	HCTS0_A_MARK,	CTS0_MARK,	SD1_DAT3_B_MARK,
-+	HRTS0_A_MARK,	RTS0_MARK,	SSI_SCK4_MARK,
-+	DU0_DR0_MARK,	LCDOUT0_MARK,	AUDATA2_MARK,	ARM_TRACEDATA_2_MARK,
-+	SDA3_C_MARK,	ADICHS1_MARK,	TS_SDEN0_B_MARK,
-+	SSI_WS4_MARK,	DU0_DR1_MARK,	LCDOUT1_MARK,	AUDATA3_MARK,
-+	ARM_TRACEDATA_3_MARK,		SCL3_C_MARK,	ADICHS2_MARK,
-+	TS_SPSYNC0_B_MARK,		DU0_DR2_MARK,	LCDOUT2_MARK,
-+	DU0_DR3_MARK,	LCDOUT3_MARK,	DU0_DR4_MARK,	LCDOUT4_MARK,
-+	DU0_DR5_MARK,	LCDOUT5_MARK,	DU0_DR6_MARK,	LCDOUT6_MARK,
-+
-+	/* IPSR4 */
-+	DU0_DR7_MARK,	LCDOUT7_MARK,	DU0_DG0_MARK,	LCDOUT8_MARK,
-+	AUDATA4_MARK,	ARM_TRACEDATA_4_MARK,
-+	TX1_D_MARK,	CAN0_TX_A_MARK,	ADICHS0_MARK,	DU0_DG1_MARK,
-+	LCDOUT9_MARK,	AUDATA5_MARK,	ARM_TRACEDATA_5_MARK,
-+	RX1_D_MARK,	CAN0_RX_A_MARK,	ADIDATA_MARK,	DU0_DG2_MARK,
-+	LCDOUT10_MARK,	DU0_DG3_MARK,	LCDOUT11_MARK,	DU0_DG4_MARK,
-+	LCDOUT12_MARK,	RX0_B_MARK,	DU0_DG5_MARK,	LCDOUT13_MARK,
-+	TX0_B_MARK,	DU0_DG6_MARK,	LCDOUT14_MARK,	RX4_A_MARK,
-+	DU0_DG7_MARK,	LCDOUT15_MARK,	TX4_A_MARK,	SSI_SCK2_B_MARK,
-+	VI0_R0_B_MARK,	DU0_DB0_MARK,	LCDOUT16_MARK,	AUDATA6_MARK,
-+	ARM_TRACEDATA_6_MARK,		GPSCLK_A_MARK,	PWM0_A_MARK,
-+	ADICLK_MARK,	TS_SDAT0_B_MARK,		AUDIO_CLKC_MARK,
-+	VI0_R1_B_MARK,	DU0_DB1_MARK,	LCDOUT17_MARK,	AUDATA7_MARK,
-+	ARM_TRACEDATA_7_MARK,		GPSIN_A_MARK,	ADICS_SAMP_MARK,
-+	TS_SCK0_B_MARK,	VI0_R2_B_MARK,	DU0_DB2_MARK,	LCDOUT18_MARK,
-+	VI0_R3_B_MARK,	DU0_DB3_MARK,	LCDOUT19_MARK,	VI0_R4_B_MARK,
-+	DU0_DB4_MARK,	LCDOUT20_MARK,
-+
-+	/* IPSR5 */
-+	VI0_R5_B_MARK,	DU0_DB5_MARK,	LCDOUT21_MARK,	VI1_DATA10_B_MARK,
-+	DU0_DB6_MARK,	LCDOUT22_MARK,	VI1_DATA11_B_MARK,
-+	DU0_DB7_MARK,	LCDOUT23_MARK,	DU0_DOTCLKIN_MARK,
-+	QSTVA_QVS_MARK,	DU0_DOTCLKO_UT0_MARK,
-+	QCLK_MARK,	DU0_DOTCLKO_UT1_MARK,		QSTVB_QVE_MARK,
-+	AUDIO_CLKOUT_A_MARK,		REMOCON_C_MARK,	SSI_WS2_B_MARK,
-+	DU0_EXHSYNC_DU0_HSYNC_MARK,	QSTH_QHS_MARK,
-+	DU0_EXVSYNC_DU0_VSYNC_MARK,	QSTB_QHE_MARK,
-+	DU0_EXODDF_DU0_ODDF_DISP_CDE_MARK,
-+	QCPV_QDE_MARK,	FMCLK_D_MARK,	SSI_SCK1_A_MARK,
-+	DU0_DISP_MARK,	QPOLA_MARK,	AUDCK_MARK,	ARM_TRACECLK_MARK,
-+	BPFCLK_D_MARK,	SSI_WS1_A_MARK,	DU0_CDE_MARK,	QPOLB_MARK,
-+	AUDSYNC_MARK,	ARM_TRACECTL_MARK,		FMIN_D_MARK,
-+	SD1_CD_B_MARK,	SSI_SCK78_MARK,	HSPI_RX0_B_MARK,
-+	TX1_B_MARK,	SD1_WP_B_MARK,	SSI_WS78_MARK,	HSPI_CLK0_B_MARK,
-+	RX1_B_MARK,	CAN_CLK_D_MARK,	SSI_SDATA8_MARK,
-+	SSI_SCK2_A_MARK,		HSPI_CS0_B_MARK,
-+	TX2_A_MARK,	CAN0_TX_B_MARK,	SSI_SDATA7_MARK,
-+	HSPI_TX0_B_MARK,		RX2_A_MARK,	CAN0_RX_B_MARK,
-+
-+	/* IPSR6 */
-+	SSI_SCK6_MARK,	HSPI_RX2_A_MARK,		FMCLK_B_MARK,
-+	CAN1_TX_B_MARK,	SSI_WS6_MARK,	HSPI_CLK2_A_MARK,
-+	BPFCLK_B_MARK,	CAN1_RX_B_MARK,	SSI_SDATA6_MARK,
-+	HSPI_TX2_A_MARK,		FMIN_B_MARK,	SSI_SCK5_MARK,
-+	RX4_C_MARK,	SSI_WS5_MARK,	TX4_C_MARK,	SSI_SDATA5_MARK,
-+	RX0_D_MARK,	SSI_WS34_MARK,	ARM_TRACEDATA_8_MARK,
-+	SSI_SDATA4_MARK,		SSI_WS2_A_MARK,	ARM_TRACEDATA_9_MARK,
-+	SSI_SDATA3_MARK,		ARM_TRACEDATA_10_MARK,
-+	SSI_SCK012_MARK,		ARM_TRACEDATA_11_MARK,
-+	TX0_D_MARK,	SSI_WS012_MARK,	ARM_TRACEDATA_12_MARK,
-+	SSI_SDATA2_MARK,		HSPI_CS2_A_MARK,
-+	ARM_TRACEDATA_13_MARK,		SDA1_A_MARK,	SSI_SDATA1_MARK,
-+	ARM_TRACEDATA_14_MARK,		SCL1_A_MARK,	SCK2_A_MARK,
-+	SSI_SDATA0_MARK,		ARM_TRACEDATA_15_MARK,
-+	SD0_CLK_MARK,	SUB_TDO_MARK,	SD0_CMD_MARK,	SUB_TRST_MARK,
-+	SD0_DAT0_MARK,	SUB_TMS_MARK,	SD0_DAT1_MARK,	SUB_TCK_MARK,
-+	SD0_DAT2_MARK,	SUB_TDI_MARK,
-+
-+	/* IPSR7 */
-+	SD0_DAT3_MARK,	IRQ1_B_MARK,	SD0_CD_MARK,	TX5_A_MARK,
-+	SD0_WP_MARK,	RX5_A_MARK,	VI1_CLKENB_MARK,
-+	HSPI_CLK0_A_MARK,	HTX1_A_MARK,	RTS1_C_MARK,	VI1_FIELD_MARK,
-+	HSPI_CS0_A_MARK,	HRX1_A_MARK,	SCK1_C_MARK,	VI1_HSYNC_MARK,
-+	HSPI_RX0_A_MARK,	HRTS1_A_MARK,	FMCLK_A_MARK,	RX1_C_MARK,
-+	VI1_VSYNC_MARK,	HSPI_TX0_MARK,	HCTS1_A_MARK,	BPFCLK_A_MARK,
-+	TX1_C_MARK,	TCLK0_MARK,	HSCK1_A_MARK,	FMIN_A_MARK,
-+	IRQ2_C_MARK,	CTS1_C_MARK,	SPEEDIN_MARK,	VI0_CLK_MARK,
-+	CAN_CLK_A_MARK,	VI0_CLKENB_MARK,		SD2_DAT2_B_MARK,
-+	VI1_DATA0_MARK,	DU1_DG6_MARK,	HSPI_RX1_A_MARK,
-+	RX4_B_MARK,	VI0_FIELD_MARK,	SD2_DAT3_B_MARK,
-+	VI0_R3_C_MARK,	VI1_DATA1_MARK,	DU1_DG7_MARK,	HSPI_CLK1_A_MARK,
-+	TX4_B_MARK,	VI0_HSYNC_MARK,	SD2_CD_B_MARK,	VI1_DATA2_MARK,
-+	DU1_DR2_MARK,	HSPI_CS1_A_MARK,		RX3_B_MARK,
-+
-+	/* IPSR8 */
-+	VI0_VSYNC_MARK,	SD2_WP_B_MARK,	VI1_DATA3_MARK,	DU1_DR3_MARK,
-+	HSPI_TX1_A_MARK,		TX3_B_MARK,	VI0_DATA0_VI0_B0_MARK,
-+	DU1_DG2_MARK,	IRQ2_B_MARK,	RX3_D_MARK,	VI0_DATA1_VI0_B1_MARK,
-+	DU1_DG3_MARK,	IRQ3_B_MARK,	TX3_D_MARK,	VI0_DATA2_VI0_B2_MARK,
-+	DU1_DG4_MARK,	RX0_C_MARK,	VI0_DATA3_VI0_B3_MARK,
-+	DU1_DG5_MARK,	TX1_A_MARK,	TX0_C_MARK,	VI0_DATA4_VI0_B4_MARK,
-+	DU1_DB2_MARK,	RX1_A_MARK,	VI0_DATA5_VI0_B5_MARK,
-+	DU1_DB3_MARK,	SCK1_A_MARK,	PWM4_MARK,	HSCK1_B_MARK,
-+	VI0_DATA6_VI0_G0_MARK,		DU1_DB4_MARK,	CTS1_A_MARK,
-+	PWM5_MARK,	VI0_DATA7_VI0_G1_MARK,		DU1_DB5_MARK,
-+	RTS1_A_MARK,	VI0_G2_MARK,	SD2_CLK_B_MARK,	VI1_DATA4_MARK,
-+	DU1_DR4_MARK,	HTX1_B_MARK,	VI0_G3_MARK,	SD2_CMD_B_MARK,
-+	VI1_DATA5_MARK,	DU1_DR5_MARK,	HRX1_B_MARK,
-+
-+	/* IPSR9 */
-+	VI0_G4_MARK,	SD2_DAT0_B_MARK,		VI1_DATA6_MARK,
-+	DU1_DR6_MARK,	HRTS1_B_MARK,	VI0_G5_MARK,	SD2_DAT1_B_MARK,
-+	VI1_DATA7_MARK,	DU1_DR7_MARK,	HCTS1_B_MARK,	VI0_R0_A_MARK,
-+	VI1_CLK_MARK,	ETH_REF_CLK_MARK,		DU1_DOTCLKIN_MARK,
-+	VI0_R1_A_MARK,	VI1_DATA8_MARK,	DU1_DB6_MARK,	ETH_TXD0_MARK,
-+	PWM2_MARK,	TCLK1_MARK,	VI0_R2_A_MARK,	VI1_DATA9_MARK,
-+	DU1_DB7_MARK,	ETH_TXD1_MARK,	PWM3_MARK,	VI0_R3_A_MARK,
-+	ETH_CRS_DV_MARK,		IECLK_MARK,	SCK2_C_MARK,
-+	VI0_R4_A_MARK,			ETH_TX_EN_MARK,	IETX_MARK,
-+	TX2_C_MARK,	VI0_R5_A_MARK,	ETH_RX_ER_MARK,	FMCLK_C_MARK,
-+	IERX_MARK,	RX2_C_MARK,	VI1_DATA10_A_MARK,
-+	DU1_DOTCLKOUT_MARK,		ETH_RXD0_MARK,
-+	BPFCLK_C_MARK,	TX2_D_MARK,	SDA2_C_MARK,	VI1_DATA11_A_MARK,
-+	DU1_EXHSYNC_DU1_HSYNC_MARK,	ETH_RXD1_MARK,	FMIN_C_MARK,
-+	RX2_D_MARK,	SCL2_C_MARK,
-+
-+	/* IPSR10 */
-+	SD2_CLK_A_MARK,	DU1_EXVSYNC_DU1_VSYNC_MARK,	ATARD1_MARK,
-+	ETH_MDC_MARK,	SDA1_B_MARK,	SD2_CMD_A_MARK,
-+	DU1_EXODDF_DU1_ODDF_DISP_CDE_MARK,		ATAWR1_MARK,
-+	ETH_MDIO_MARK,	SCL1_B_MARK,	SD2_DAT0_A_MARK,
-+	DU1_DISP_MARK,	ATACS01_MARK,	DREQ1_B_MARK,	ETH_LINK_MARK,
-+	CAN1_RX_A_MARK,	SD2_DAT1_A_MARK,		DU1_CDE_MARK,
-+	ATACS11_MARK,	DACK1_B_MARK,	ETH_MAGIC_MARK,	CAN1_TX_A_MARK,
-+	PWM6_MARK,	SD2_DAT2_A_MARK,		VI1_DATA12_MARK,
-+	DREQ2_B_MARK,	ATADIR1_MARK,	HSPI_CLK2_B_MARK,
-+	GPSCLK_B_MARK,	SD2_DAT3_A_MARK,		VI1_DATA13_MARK,
-+	DACK2_B_MARK,	ATAG1_MARK,	HSPI_CS2_B_MARK,
-+	GPSIN_B_MARK,	SD2_CD_A_MARK,	VI1_DATA14_MARK,
-+	EX_WAIT1_B_MARK,		DREQ0_B_MARK,	HSPI_RX2_B_MARK,
-+	REMOCON_A_MARK,	SD2_WP_A_MARK,	VI1_DATA15_MARK,
-+	EX_WAIT2_B_MARK,		DACK0_B_MARK,
-+	HSPI_TX2_B_MARK,		CAN_CLK_C_MARK,
-+
-+	PINMUX_MARK_END,
-+};
-+
-+static const pinmux_enum_t pinmux_data[] = {
-+	PINMUX_DATA_GP_ALL(), /* PINMUX_DATA(GP_M_N_DATA, GP_M_N_FN...), */
-+
-+	PINMUX_DATA(PENC0_MARK,		FN_PENC0),
-+	PINMUX_DATA(PENC1_MARK,		FN_PENC1),
-+	PINMUX_DATA(A1_MARK,		FN_A1),
-+	PINMUX_DATA(A2_MARK,		FN_A2),
-+	PINMUX_DATA(A3_MARK,		FN_A3),
-+	PINMUX_DATA(WE0_MARK,		FN_WE0),
-+	PINMUX_DATA(AUDIO_CLKA_MARK,	FN_AUDIO_CLKA),
-+	PINMUX_DATA(AUDIO_CLKB_MARK,	FN_AUDIO_CLKB),
-+	PINMUX_DATA(SSI_SCK34_MARK,	FN_SSI_SCK34),
-+	PINMUX_DATA(AVS1_MARK,		FN_AVS1),
-+	PINMUX_DATA(AVS2_MARK,		FN_AVS2),
-+
-+	/* IPSR0 */
-+	PINMUX_IPSR_DATA(IP0_1_0,	PRESETOUT),
-+	PINMUX_IPSR_DATA(IP0_1_0,	PWM1),
-+
-+	PINMUX_IPSR_DATA(IP0_4_2,	AUDATA0),
-+	PINMUX_IPSR_DATA(IP0_4_2,	ARM_TRACEDATA_0),
-+	PINMUX_IPSR_MSEL(IP0_4_2,	GPSCLK_C,	SEL_GPS_C),
-+	PINMUX_IPSR_DATA(IP0_4_2,	USB_OVC0),
-+	PINMUX_IPSR_DATA(IP0_4_2,	TX2_E),
-+	PINMUX_IPSR_MSEL(IP0_4_2,	SDA2_B,		SEL_I2C2_B),
-+
-+	PINMUX_IPSR_DATA(IP0_7_5,	AUDATA1),
-+	PINMUX_IPSR_DATA(IP0_7_5,	ARM_TRACEDATA_1),
-+	PINMUX_IPSR_MSEL(IP0_7_5,	GPSIN_C,	SEL_GPS_C),
-+	PINMUX_IPSR_DATA(IP0_7_5,	USB_OVC1),
-+	PINMUX_IPSR_MSEL(IP0_7_5,	RX2_E,		SEL_SCIF2_E),
-+	PINMUX_IPSR_MSEL(IP0_7_5,	SCL2_B,		SEL_I2C2_B),
-+
-+	PINMUX_IPSR_MSEL(IP0_11_8,	SD1_DAT2_A,	SEL_SD1_A),
-+	PINMUX_IPSR_DATA(IP0_11_8,	MMC_D2),
-+	PINMUX_IPSR_DATA(IP0_11_8,	BS),
-+	PINMUX_IPSR_DATA(IP0_11_8,	ATADIR0_A),
-+	PINMUX_IPSR_DATA(IP0_11_8,	SDSELF_A),
-+	PINMUX_IPSR_DATA(IP0_11_8,	PWM4_B),
-+
-+	PINMUX_IPSR_MSEL(IP0_14_12,	SD1_DAT3_A,	SEL_SD1_A),
-+	PINMUX_IPSR_DATA(IP0_14_12,	MMC_D3),
-+	PINMUX_IPSR_DATA(IP0_14_12,	A0),
-+	PINMUX_IPSR_DATA(IP0_14_12,	ATAG0_A),
-+	PINMUX_IPSR_MSEL(IP0_14_12,	REMOCON_B,	SEL_REMOCON_B),
-+
-+	PINMUX_IPSR_DATA(IP0_15,	A4),
-+	PINMUX_IPSR_DATA(IP0_16,	A5),
-+	PINMUX_IPSR_DATA(IP0_17,	A6),
-+	PINMUX_IPSR_DATA(IP0_18,	A7),
-+	PINMUX_IPSR_DATA(IP0_19,	A8),
-+	PINMUX_IPSR_DATA(IP0_20,	A9),
-+	PINMUX_IPSR_DATA(IP0_21,	A10),
-+	PINMUX_IPSR_DATA(IP0_22,	A11),
-+	PINMUX_IPSR_DATA(IP0_23,	A12),
-+	PINMUX_IPSR_DATA(IP0_24,	A13),
-+	PINMUX_IPSR_DATA(IP0_25,	A14),
-+	PINMUX_IPSR_DATA(IP0_26,	A15),
-+	PINMUX_IPSR_DATA(IP0_27,	A16),
-+	PINMUX_IPSR_DATA(IP0_28,	A17),
-+	PINMUX_IPSR_DATA(IP0_29,	A18),
-+	PINMUX_IPSR_DATA(IP0_30,	A19),
-+
-+	/* IPSR1 */
-+	PINMUX_IPSR_DATA(IP1_0,		A20),
-+	PINMUX_IPSR_MSEL(IP1_0,		HSPI_CS1_B,	SEL_HSPI1_B),
-+
-+	PINMUX_IPSR_DATA(IP1_1,		A21),
-+	PINMUX_IPSR_MSEL(IP1_1,		HSPI_CLK1_B,	SEL_HSPI1_B),
-+
-+	PINMUX_IPSR_DATA(IP1_4_2,	A22),
-+	PINMUX_IPSR_MSEL(IP1_4_2,	HRTS0_B,	SEL_HSCIF0_B),
-+	PINMUX_IPSR_MSEL(IP1_4_2,	RX2_B,		SEL_SCIF2_B),
-+	PINMUX_IPSR_MSEL(IP1_4_2,	DREQ2_A,	SEL_DREQ2_A),
-+
-+	PINMUX_IPSR_DATA(IP1_7_5,	A23),
-+	PINMUX_IPSR_DATA(IP1_7_5,	HTX0_B),
-+	PINMUX_IPSR_DATA(IP1_7_5,	TX2_B),
-+	PINMUX_IPSR_DATA(IP1_7_5,	DACK2_A),
-+	PINMUX_IPSR_MSEL(IP1_7_5,	TS_SDEN0_A,	SEL_TSIF0_A),
-+
-+	PINMUX_IPSR_MSEL(IP1_10_8,	SD1_CD_A,	SEL_SD1_A),
-+	PINMUX_IPSR_DATA(IP1_10_8,	MMC_D6),
-+	PINMUX_IPSR_DATA(IP1_10_8,	A24),
-+	PINMUX_IPSR_MSEL(IP1_10_8,	DREQ1_A,	SEL_DREQ1_A),
-+	PINMUX_IPSR_MSEL(IP1_10_8,	HRX0_B,		SEL_HSCIF0_B),
-+	PINMUX_IPSR_MSEL(IP1_10_8,	TS_SPSYNC0_A,	SEL_TSIF0_A),
-+
-+	PINMUX_IPSR_MSEL(IP1_14_11,	SD1_WP_A,	SEL_SD1_A),
-+	PINMUX_IPSR_DATA(IP1_14_11,	MMC_D7),
-+	PINMUX_IPSR_DATA(IP1_14_11,	A25),
-+	PINMUX_IPSR_DATA(IP1_14_11,	DACK1_A),
-+	PINMUX_IPSR_MSEL(IP1_14_11,	HCTS0_B,	SEL_HSCIF0_B),
-+	PINMUX_IPSR_MSEL(IP1_14_11,	RX3_C,		SEL_SCIF3_C),
-+	PINMUX_IPSR_MSEL(IP1_14_11,	TS_SDAT0_A,	SEL_TSIF0_A),
-+
-+	PINMUX_IPSR_NOGP(IP1_16_15,	CLKOUT),
-+	PINMUX_IPSR_NOGP(IP1_16_15,	HSPI_TX1_B),
-+	PINMUX_IPSR_NOGP(IP1_16_15,	PWM0_B),
-+
-+	PINMUX_IPSR_NOGP(IP1_17,	CS0),
-+	PINMUX_IPSR_NOGM(IP1_17,	HSPI_RX1_B,	SEL_HSPI1_B),
-+
-+	PINMUX_IPSR_NOGM(IP1_20_18,	SSI_SCK1_B,	SEL_SSI1_B),
-+	PINMUX_IPSR_NOGP(IP1_20_18,	ATAG0_B),
-+	PINMUX_IPSR_NOGP(IP1_20_18,	CS1_A26),
-+	PINMUX_IPSR_NOGM(IP1_20_18,	SDA2_A,		SEL_I2C2_A),
-+	PINMUX_IPSR_NOGM(IP1_20_18,	SCK2_B,		SEL_SCIF2_B),
-+
-+	PINMUX_IPSR_DATA(IP1_23_21,	MMC_D5),
-+	PINMUX_IPSR_DATA(IP1_23_21,	ATADIR0_B),
-+	PINMUX_IPSR_DATA(IP1_23_21,	RD_WR),
-+
-+	PINMUX_IPSR_DATA(IP1_24,	WE1),
-+	PINMUX_IPSR_DATA(IP1_24,	ATAWR0_B),
-+
-+	PINMUX_IPSR_MSEL(IP1_27_25,	SSI_WS1_B,	SEL_SSI1_B),
-+	PINMUX_IPSR_DATA(IP1_27_25,	EX_CS0),
-+	PINMUX_IPSR_MSEL(IP1_27_25,	SCL2_A,		SEL_I2C2_A),
-+	PINMUX_IPSR_DATA(IP1_27_25,	TX3_C),
-+	PINMUX_IPSR_MSEL(IP1_27_25,	TS_SCK0_A,	SEL_TSIF0_A),
-+
-+	PINMUX_IPSR_DATA(IP1_29_28,	EX_CS1),
-+	PINMUX_IPSR_DATA(IP1_29_28,	MMC_D4),
-+
-+	/* IPSR2 */
-+	PINMUX_IPSR_DATA(IP2_2_0,	SD1_CLK_A),
-+	PINMUX_IPSR_DATA(IP2_2_0,	MMC_CLK),
-+	PINMUX_IPSR_DATA(IP2_2_0,	ATACS00),
-+	PINMUX_IPSR_DATA(IP2_2_0,	EX_CS2),
-+
-+	PINMUX_IPSR_MSEL(IP2_5_3,	SD1_CMD_A,	SEL_SD1_A),
-+	PINMUX_IPSR_DATA(IP2_5_3,	MMC_CMD),
-+	PINMUX_IPSR_DATA(IP2_5_3,	ATACS10),
-+	PINMUX_IPSR_DATA(IP2_5_3,	EX_CS3),
-+
-+	PINMUX_IPSR_MSEL(IP2_8_6,	SD1_DAT0_A,	SEL_SD1_A),
-+	PINMUX_IPSR_DATA(IP2_8_6,	MMC_D0),
-+	PINMUX_IPSR_DATA(IP2_8_6,	ATARD0),
-+	PINMUX_IPSR_DATA(IP2_8_6,	EX_CS4),
-+	PINMUX_IPSR_MSEL(IP2_8_6,	EX_WAIT1_A,	SEL_WAIT1_A),
-+
-+	PINMUX_IPSR_MSEL(IP2_11_9,	SD1_DAT1_A,	SEL_SD1_A),
-+	PINMUX_IPSR_DATA(IP2_11_9,	MMC_D1),
-+	PINMUX_IPSR_DATA(IP2_11_9,	ATAWR0_A),
-+	PINMUX_IPSR_DATA(IP2_11_9,	EX_CS5),
-+	PINMUX_IPSR_MSEL(IP2_11_9,	EX_WAIT2_A,	SEL_WAIT2_A),
-+
-+	PINMUX_IPSR_MSEL(IP2_13_12,	DREQ0_A,	SEL_DREQ0_A),
-+	PINMUX_IPSR_MSEL(IP2_13_12,	RX3_A,		SEL_SCIF3_A),
-+
-+	PINMUX_IPSR_DATA(IP2_16_14,	DACK0),
-+	PINMUX_IPSR_DATA(IP2_16_14,	TX3_A),
-+	PINMUX_IPSR_DATA(IP2_16_14,	DRACK0),
-+
-+	PINMUX_IPSR_DATA(IP2_17,	EX_WAIT0),
-+	PINMUX_IPSR_DATA(IP2_17,	PWM0_C),
-+
-+	PINMUX_IPSR_NOGP(IP2_18,	D0),
-+	PINMUX_IPSR_NOGP(IP2_19,	D1),
-+	PINMUX_IPSR_NOGP(IP2_20,	D2),
-+	PINMUX_IPSR_NOGP(IP2_21,	D3),
-+	PINMUX_IPSR_NOGP(IP2_22,	D4),
-+	PINMUX_IPSR_NOGP(IP2_23,	D5),
-+	PINMUX_IPSR_NOGP(IP2_24,	D6),
-+	PINMUX_IPSR_NOGP(IP2_25,	D7),
-+	PINMUX_IPSR_NOGP(IP2_26,	D8),
-+	PINMUX_IPSR_NOGP(IP2_27,	D9),
-+	PINMUX_IPSR_NOGP(IP2_28,	D10),
-+	PINMUX_IPSR_NOGP(IP2_29,	D11),
-+
-+	PINMUX_IPSR_DATA(IP2_30,	RD_WR_B),
-+	PINMUX_IPSR_DATA(IP2_30,	IRQ0),
-+
-+	PINMUX_IPSR_DATA(IP2_31,	MLB_CLK),
-+	PINMUX_IPSR_MSEL(IP2_31,	IRQ1_A,		SEL_IRQ1_A),
-+
-+	/* IPSR3 */
-+	PINMUX_IPSR_DATA(IP3_1_0,	MLB_SIG),
-+	PINMUX_IPSR_MSEL(IP3_1_0,	RX5_B,		SEL_SCIF5_B),
-+	PINMUX_IPSR_MSEL(IP3_1_0,	SDA3_A,		SEL_I2C3_A),
-+	PINMUX_IPSR_MSEL(IP3_1_0,	IRQ2_A,		SEL_IRQ2_A),
-+
-+	PINMUX_IPSR_DATA(IP3_4_2,	MLB_DAT),
-+	PINMUX_IPSR_DATA(IP3_4_2,	TX5_B),
-+	PINMUX_IPSR_MSEL(IP3_4_2,	SCL3_A,		SEL_I2C3_A),
-+	PINMUX_IPSR_MSEL(IP3_4_2,	IRQ3_A,		SEL_IRQ3_A),
-+	PINMUX_IPSR_DATA(IP3_4_2,	SDSELF_B),
-+
-+	PINMUX_IPSR_MSEL(IP3_7_5,	SD1_CMD_B,	SEL_SD1_B),
-+	PINMUX_IPSR_DATA(IP3_7_5,	SCIF_CLK),
-+	PINMUX_IPSR_DATA(IP3_7_5,	AUDIO_CLKOUT_B),
-+	PINMUX_IPSR_MSEL(IP3_7_5,	CAN_CLK_B,	SEL_CANCLK_B),
-+	PINMUX_IPSR_MSEL(IP3_7_5,	SDA3_B,		SEL_I2C3_B),
-+
-+	PINMUX_IPSR_DATA(IP3_9_8,	SD1_CLK_B),
-+	PINMUX_IPSR_DATA(IP3_9_8,	HTX0_A),
-+	PINMUX_IPSR_DATA(IP3_9_8,	TX0_A),
-+
-+	PINMUX_IPSR_MSEL(IP3_12_10,	SD1_DAT0_B,	SEL_SD1_B),
-+	PINMUX_IPSR_MSEL(IP3_12_10,	HRX0_A,		SEL_HSCIF0_A),
-+	PINMUX_IPSR_MSEL(IP3_12_10,	RX0_A,		SEL_SCIF0_A),
-+
-+	PINMUX_IPSR_MSEL(IP3_15_13,	SD1_DAT1_B,	SEL_SD1_B),
-+	PINMUX_IPSR_MSEL(IP3_15_13,	HSCK0,		SEL_HSCIF0_A),
-+	PINMUX_IPSR_DATA(IP3_15_13,	SCK0),
-+	PINMUX_IPSR_MSEL(IP3_15_13,	SCL3_B,		SEL_I2C3_B),
-+
-+	PINMUX_IPSR_MSEL(IP3_18_16,	SD1_DAT2_B,	SEL_SD1_B),
-+	PINMUX_IPSR_MSEL(IP3_18_16,	HCTS0_A,	SEL_HSCIF0_A),
-+	PINMUX_IPSR_DATA(IP3_18_16,	CTS0),
-+
-+	PINMUX_IPSR_MSEL(IP3_20_19,	SD1_DAT3_B,	SEL_SD1_B),
-+	PINMUX_IPSR_MSEL(IP3_20_19,	HRTS0_A,	SEL_HSCIF0_A),
-+	PINMUX_IPSR_DATA(IP3_20_19,	RTS0),
-+
-+	PINMUX_IPSR_DATA(IP3_23_21,	SSI_SCK4),
-+	PINMUX_IPSR_DATA(IP3_23_21,	DU0_DR0),
-+	PINMUX_IPSR_DATA(IP3_23_21,	LCDOUT0),
-+	PINMUX_IPSR_DATA(IP3_23_21,	AUDATA2),
-+	PINMUX_IPSR_DATA(IP3_23_21,	ARM_TRACEDATA_2),
-+	PINMUX_IPSR_MSEL(IP3_23_21,	SDA3_C,		SEL_I2C3_C),
-+	PINMUX_IPSR_DATA(IP3_23_21,	ADICHS1),
-+	PINMUX_IPSR_MSEL(IP3_23_21,	TS_SDEN0_B,	SEL_TSIF0_B),
-+
-+	PINMUX_IPSR_DATA(IP3_26_24,	SSI_WS4),
-+	PINMUX_IPSR_DATA(IP3_26_24,	DU0_DR1),
-+	PINMUX_IPSR_DATA(IP3_26_24,	LCDOUT1),
-+	PINMUX_IPSR_DATA(IP3_26_24,	AUDATA3),
-+	PINMUX_IPSR_DATA(IP3_26_24,	ARM_TRACEDATA_3),
-+	PINMUX_IPSR_MSEL(IP3_26_24,	SCL3_C,		SEL_I2C3_C),
-+	PINMUX_IPSR_DATA(IP3_26_24,	ADICHS2),
-+	PINMUX_IPSR_MSEL(IP3_26_24,	TS_SPSYNC0_B,	SEL_TSIF0_B),
-+
-+	PINMUX_IPSR_DATA(IP3_27,	DU0_DR2),
-+	PINMUX_IPSR_DATA(IP3_27,	LCDOUT2),
-+
-+	PINMUX_IPSR_DATA(IP3_28,	DU0_DR3),
-+	PINMUX_IPSR_DATA(IP3_28,	LCDOUT3),
-+
-+	PINMUX_IPSR_DATA(IP3_29,	DU0_DR4),
-+	PINMUX_IPSR_DATA(IP3_29,	LCDOUT4),
-+
-+	PINMUX_IPSR_DATA(IP3_30,	DU0_DR5),
-+	PINMUX_IPSR_DATA(IP3_30,	LCDOUT5),
-+
-+	PINMUX_IPSR_DATA(IP3_31,	DU0_DR6),
-+	PINMUX_IPSR_DATA(IP3_31,	LCDOUT6),
-+
-+	/* IPSR4 */
-+	PINMUX_IPSR_DATA(IP4_0,		DU0_DR7),
-+	PINMUX_IPSR_DATA(IP4_0,		LCDOUT7),
-+
-+	PINMUX_IPSR_DATA(IP4_3_1,	DU0_DG0),
-+	PINMUX_IPSR_DATA(IP4_3_1,	LCDOUT8),
-+	PINMUX_IPSR_DATA(IP4_3_1,	AUDATA4),
-+	PINMUX_IPSR_DATA(IP4_3_1,	ARM_TRACEDATA_4),
-+	PINMUX_IPSR_DATA(IP4_3_1,	TX1_D),
-+	PINMUX_IPSR_DATA(IP4_3_1,	CAN0_TX_A),
-+	PINMUX_IPSR_DATA(IP4_3_1,	ADICHS0),
-+
-+	PINMUX_IPSR_DATA(IP4_6_4,	DU0_DG1),
-+	PINMUX_IPSR_DATA(IP4_6_4,	LCDOUT9),
-+	PINMUX_IPSR_DATA(IP4_6_4,	AUDATA5),
-+	PINMUX_IPSR_DATA(IP4_6_4,	ARM_TRACEDATA_5),
-+	PINMUX_IPSR_MSEL(IP4_6_4,	RX1_D,		SEL_SCIF1_D),
-+	PINMUX_IPSR_MSEL(IP4_6_4,	CAN0_RX_A,	SEL_CAN0_A),
-+	PINMUX_IPSR_DATA(IP4_6_4,	ADIDATA),
-+
-+	PINMUX_IPSR_DATA(IP4_7,		DU0_DG2),
-+	PINMUX_IPSR_DATA(IP4_7,		LCDOUT10),
-+
-+	PINMUX_IPSR_DATA(IP4_8,		DU0_DG3),
-+	PINMUX_IPSR_DATA(IP4_8,		LCDOUT11),
-+
-+	PINMUX_IPSR_DATA(IP4_10_9,	DU0_DG4),
-+	PINMUX_IPSR_DATA(IP4_10_9,	LCDOUT12),
-+	PINMUX_IPSR_MSEL(IP4_10_9,	RX0_B,		SEL_SCIF0_B),
-+
-+	PINMUX_IPSR_DATA(IP4_12_11,	DU0_DG5),
-+	PINMUX_IPSR_DATA(IP4_12_11,	LCDOUT13),
-+	PINMUX_IPSR_DATA(IP4_12_11,	TX0_B),
-+
-+	PINMUX_IPSR_DATA(IP4_14_13,	DU0_DG6),
-+	PINMUX_IPSR_DATA(IP4_14_13,	LCDOUT14),
-+	PINMUX_IPSR_MSEL(IP4_14_13,	RX4_A,		SEL_SCIF4_A),
-+
-+	PINMUX_IPSR_DATA(IP4_16_15,	DU0_DG7),
-+	PINMUX_IPSR_DATA(IP4_16_15,	LCDOUT15),
-+	PINMUX_IPSR_DATA(IP4_16_15,	TX4_A),
-+
-+	PINMUX_IPSR_MSEL(IP4_20_17,	SSI_SCK2_B,	SEL_SSI2_B),
-+	PINMUX_DATA(VI0_R0_B_MARK,	FN_IP4_20_17,	FN_VI0_R0_B,	FN_SEL_VI0_B), /* see sel_vi0 */
-+	PINMUX_DATA(VI0_R0_D_MARK,	FN_IP4_20_17,	FN_VI0_R0_B,	FN_SEL_VI0_D), /* see sel_vi0 */
-+	PINMUX_IPSR_DATA(IP4_20_17,	DU0_DB0),
-+	PINMUX_IPSR_DATA(IP4_20_17,	LCDOUT16),
-+	PINMUX_IPSR_DATA(IP4_20_17,	AUDATA6),
-+	PINMUX_IPSR_DATA(IP4_20_17,	ARM_TRACEDATA_6),
-+	PINMUX_IPSR_MSEL(IP4_20_17,	GPSCLK_A,	SEL_GPS_A),
-+	PINMUX_IPSR_DATA(IP4_20_17,	PWM0_A),
-+	PINMUX_IPSR_DATA(IP4_20_17,	ADICLK),
-+	PINMUX_IPSR_MSEL(IP4_20_17,	TS_SDAT0_B,	SEL_TSIF0_B),
-+
-+	PINMUX_IPSR_DATA(IP4_24_21,	AUDIO_CLKC),
-+	PINMUX_DATA(VI0_R1_B_MARK,	FN_IP4_24_21,	FN_VI0_R1_B,	FN_SEL_VI0_B), /* see sel_vi0 */
-+	PINMUX_DATA(VI0_R1_D_MARK,	FN_IP4_24_21,	FN_VI0_R1_B,	FN_SEL_VI0_D), /* see sel_vi0 */
-+	PINMUX_IPSR_DATA(IP4_24_21,	DU0_DB1),
-+	PINMUX_IPSR_DATA(IP4_24_21,	LCDOUT17),
-+	PINMUX_IPSR_DATA(IP4_24_21,	AUDATA7),
-+	PINMUX_IPSR_DATA(IP4_24_21,	ARM_TRACEDATA_7),
-+	PINMUX_IPSR_MSEL(IP4_24_21,	GPSIN_A,	SEL_GPS_A),
-+	PINMUX_IPSR_DATA(IP4_24_21,	ADICS_SAMP),
-+	PINMUX_IPSR_MSEL(IP4_24_21,	TS_SCK0_B,	SEL_TSIF0_B),
-+
-+	PINMUX_DATA(VI0_R2_B_MARK,	FN_IP4_26_25,	FN_VI0_R2_B,	FN_SEL_VI0_B), /* see sel_vi0 */
-+	PINMUX_DATA(VI0_R2_D_MARK,	FN_IP4_26_25,	FN_VI0_R2_B,	FN_SEL_VI0_D), /* see sel_vi0 */
-+	PINMUX_IPSR_DATA(IP4_26_25,	DU0_DB2),
-+	PINMUX_IPSR_DATA(IP4_26_25,	LCDOUT18),
-+
-+	PINMUX_IPSR_MSEL(IP4_28_27,	VI0_R3_B,	SEL_VI0_B),
-+	PINMUX_IPSR_DATA(IP4_28_27,	DU0_DB3),
-+	PINMUX_IPSR_DATA(IP4_28_27,	LCDOUT19),
-+
-+	PINMUX_DATA(VI0_R4_B_MARK,	FN_IP4_30_29,	FN_VI0_R4_B,	FN_SEL_VI0_B), /* see sel_vi0 */
-+	PINMUX_DATA(VI0_R4_D_MARK,	FN_IP4_30_29,	FN_VI0_R4_B,	FN_SEL_VI0_D), /* see sel_vi0 */
-+	PINMUX_IPSR_DATA(IP4_30_29,	DU0_DB4),
-+	PINMUX_IPSR_DATA(IP4_30_29,	LCDOUT20),
-+
-+	/* IPSR5 */
-+	PINMUX_DATA(VI0_R5_B_MARK,	FN_IP5_1_0,	FN_VI0_R5_B,	FN_SEL_VI0_B), /* see sel_vi0 */
-+	PINMUX_DATA(VI0_R5_D_MARK,	FN_IP5_1_0,	FN_VI0_R5_B,	FN_SEL_VI0_D), /* see sel_vi0 */
-+	PINMUX_IPSR_DATA(IP5_1_0,	DU0_DB5),
-+	PINMUX_IPSR_DATA(IP5_1_0,	LCDOUT21),
-+
-+	PINMUX_IPSR_MSEL(IP5_3_2,	VI1_DATA10_B,	SEL_VI1_B),
-+	PINMUX_IPSR_DATA(IP5_3_2,	DU0_DB6),
-+	PINMUX_IPSR_DATA(IP5_3_2,	LCDOUT22),
-+
-+	PINMUX_IPSR_MSEL(IP5_5_4,	VI1_DATA11_B,	SEL_VI1_B),
-+	PINMUX_IPSR_DATA(IP5_5_4,	DU0_DB7),
-+	PINMUX_IPSR_DATA(IP5_5_4,	LCDOUT23),
-+
-+	PINMUX_IPSR_DATA(IP5_6,		DU0_DOTCLKIN),
-+	PINMUX_IPSR_DATA(IP5_6,		QSTVA_QVS),
-+
-+	PINMUX_IPSR_DATA(IP5_7,		DU0_DOTCLKO_UT0),
-+	PINMUX_IPSR_DATA(IP5_7,		QCLK),
-+
-+	PINMUX_IPSR_DATA(IP5_9_8,	DU0_DOTCLKO_UT1),
-+	PINMUX_IPSR_DATA(IP5_9_8,	QSTVB_QVE),
-+	PINMUX_IPSR_DATA(IP5_9_8,	AUDIO_CLKOUT_A),
-+	PINMUX_IPSR_MSEL(IP5_9_8,	REMOCON_C,	SEL_REMOCON_C),
-+
-+	PINMUX_IPSR_MSEL(IP5_11_10,	SSI_WS2_B,	SEL_SSI2_B),
-+	PINMUX_IPSR_DATA(IP5_11_10,	DU0_EXHSYNC_DU0_HSYNC),
-+	PINMUX_IPSR_DATA(IP5_11_10,	QSTH_QHS),
-+
-+	PINMUX_IPSR_DATA(IP5_12,	DU0_EXVSYNC_DU0_VSYNC),
-+	PINMUX_IPSR_DATA(IP5_12,	QSTB_QHE),
-+
-+	PINMUX_IPSR_DATA(IP5_14_13,	DU0_EXODDF_DU0_ODDF_DISP_CDE),
-+	PINMUX_IPSR_DATA(IP5_14_13,	QCPV_QDE),
-+	PINMUX_IPSR_MSEL(IP5_14_13,	FMCLK_D,	SEL_FM_D),
-+
-+	PINMUX_IPSR_MSEL(IP5_17_15,	SSI_SCK1_A,	SEL_SSI1_A),
-+	PINMUX_IPSR_DATA(IP5_17_15,	DU0_DISP),
-+	PINMUX_IPSR_DATA(IP5_17_15,	QPOLA),
-+	PINMUX_IPSR_DATA(IP5_17_15,	AUDCK),
-+	PINMUX_IPSR_DATA(IP5_17_15,	ARM_TRACECLK),
-+	PINMUX_IPSR_DATA(IP5_17_15,	BPFCLK_D),
-+
-+	PINMUX_IPSR_MSEL(IP5_20_18,	SSI_WS1_A,	SEL_SSI1_A),
-+	PINMUX_IPSR_DATA(IP5_20_18,	DU0_CDE),
-+	PINMUX_IPSR_DATA(IP5_20_18,	QPOLB),
-+	PINMUX_IPSR_DATA(IP5_20_18,	AUDSYNC),
-+	PINMUX_IPSR_DATA(IP5_20_18,	ARM_TRACECTL),
-+	PINMUX_IPSR_MSEL(IP5_20_18,	FMIN_D,		SEL_FM_D),
-+
-+	PINMUX_IPSR_MSEL(IP5_22_21,	SD1_CD_B,	SEL_SD1_B),
-+	PINMUX_IPSR_DATA(IP5_22_21,	SSI_SCK78),
-+	PINMUX_IPSR_MSEL(IP5_22_21,	HSPI_RX0_B,	SEL_HSPI0_B),
-+	PINMUX_IPSR_DATA(IP5_22_21,	TX1_B),
-+
-+	PINMUX_IPSR_MSEL(IP5_25_23,	SD1_WP_B,	SEL_SD1_B),
-+	PINMUX_IPSR_DATA(IP5_25_23,	SSI_WS78),
-+	PINMUX_IPSR_MSEL(IP5_25_23,	HSPI_CLK0_B,	SEL_HSPI0_B),
-+	PINMUX_IPSR_MSEL(IP5_25_23,	RX1_B,		SEL_SCIF1_B),
-+	PINMUX_IPSR_MSEL(IP5_25_23,	CAN_CLK_D,	SEL_CANCLK_D),
-+
-+	PINMUX_IPSR_DATA(IP5_28_26,	SSI_SDATA8),
-+	PINMUX_IPSR_MSEL(IP5_28_26,	SSI_SCK2_A,	SEL_SSI2_A),
-+	PINMUX_IPSR_MSEL(IP5_28_26,	HSPI_CS0_B,	SEL_HSPI0_B),
-+	PINMUX_IPSR_DATA(IP5_28_26,	TX2_A),
-+	PINMUX_IPSR_DATA(IP5_28_26,	CAN0_TX_B),
-+
-+	PINMUX_IPSR_DATA(IP5_30_29,	SSI_SDATA7),
-+	PINMUX_IPSR_DATA(IP5_30_29,	HSPI_TX0_B),
-+	PINMUX_IPSR_MSEL(IP5_30_29,	RX2_A,		SEL_SCIF2_A),
-+	PINMUX_IPSR_MSEL(IP5_30_29,	CAN0_RX_B,	SEL_CAN0_B),
-+
-+	/* IPSR6 */
-+	PINMUX_IPSR_DATA(IP6_1_0,	SSI_SCK6),
-+	PINMUX_IPSR_MSEL(IP6_1_0,	HSPI_RX2_A,	SEL_HSPI2_A),
-+	PINMUX_IPSR_MSEL(IP6_1_0,	FMCLK_B,	SEL_FM_B),
-+	PINMUX_IPSR_DATA(IP6_1_0,	CAN1_TX_B),
-+
-+	PINMUX_IPSR_DATA(IP6_4_2,	SSI_WS6),
-+	PINMUX_IPSR_MSEL(IP6_4_2,	HSPI_CLK2_A,	SEL_HSPI2_A),
-+	PINMUX_IPSR_DATA(IP6_4_2,	BPFCLK_B),
-+	PINMUX_IPSR_MSEL(IP6_4_2,	CAN1_RX_B,	SEL_CAN1_B),
-+
-+	PINMUX_IPSR_DATA(IP6_6_5,	SSI_SDATA6),
-+	PINMUX_IPSR_DATA(IP6_6_5,	HSPI_TX2_A),
-+	PINMUX_IPSR_MSEL(IP6_6_5,	FMIN_B,		SEL_FM_B),
-+
-+	PINMUX_IPSR_DATA(IP6_7,		SSI_SCK5),
-+	PINMUX_IPSR_MSEL(IP6_7,		RX4_C,		SEL_SCIF4_C),
-+
-+	PINMUX_IPSR_DATA(IP6_8,		SSI_WS5),
-+	PINMUX_IPSR_DATA(IP6_8,		TX4_C),
-+
-+	PINMUX_IPSR_DATA(IP6_9,		SSI_SDATA5),
-+	PINMUX_IPSR_MSEL(IP6_9,		RX0_D,		SEL_SCIF0_D),
-+
-+	PINMUX_IPSR_DATA(IP6_10,	SSI_WS34),
-+	PINMUX_IPSR_DATA(IP6_10,	ARM_TRACEDATA_8),
-+
-+	PINMUX_IPSR_DATA(IP6_12_11,	SSI_SDATA4),
-+	PINMUX_IPSR_MSEL(IP6_12_11,	SSI_WS2_A,	SEL_SSI2_A),
-+	PINMUX_IPSR_DATA(IP6_12_11,	ARM_TRACEDATA_9),
-+
-+	PINMUX_IPSR_DATA(IP6_13,	SSI_SDATA3),
-+	PINMUX_IPSR_DATA(IP6_13,	ARM_TRACEDATA_10),
-+
-+	PINMUX_IPSR_DATA(IP6_15_14,	SSI_SCK012),
-+	PINMUX_IPSR_DATA(IP6_15_14,	ARM_TRACEDATA_11),
-+	PINMUX_IPSR_DATA(IP6_15_14,	TX0_D),
-+
-+	PINMUX_IPSR_DATA(IP6_16,	SSI_WS012),
-+	PINMUX_IPSR_DATA(IP6_16,	ARM_TRACEDATA_12),
-+
-+	PINMUX_IPSR_DATA(IP6_18_17,	SSI_SDATA2),
-+	PINMUX_IPSR_MSEL(IP6_18_17,	HSPI_CS2_A,	SEL_HSPI2_A),
-+	PINMUX_IPSR_DATA(IP6_18_17,	ARM_TRACEDATA_13),
-+	PINMUX_IPSR_MSEL(IP6_18_17,	SDA1_A,		SEL_I2C1_A),
-+
-+	PINMUX_IPSR_DATA(IP6_20_19,	SSI_SDATA1),
-+	PINMUX_IPSR_DATA(IP6_20_19,	ARM_TRACEDATA_14),
-+	PINMUX_IPSR_MSEL(IP6_20_19,	SCL1_A,		SEL_I2C1_A),
-+	PINMUX_IPSR_MSEL(IP6_20_19,	SCK2_A,		SEL_SCIF2_A),
-+
-+	PINMUX_IPSR_DATA(IP6_21,	SSI_SDATA0),
-+	PINMUX_IPSR_DATA(IP6_21,	ARM_TRACEDATA_15),
-+
-+	PINMUX_IPSR_DATA(IP6_23_22,	SD0_CLK),
-+	PINMUX_IPSR_DATA(IP6_23_22,	SUB_TDO),
-+
-+	PINMUX_IPSR_DATA(IP6_25_24,	SD0_CMD),
-+	PINMUX_IPSR_DATA(IP6_25_24,	SUB_TRST),
-+
-+	PINMUX_IPSR_DATA(IP6_27_26,	SD0_DAT0),
-+	PINMUX_IPSR_DATA(IP6_27_26,	SUB_TMS),
-+
-+	PINMUX_IPSR_DATA(IP6_29_28,	SD0_DAT1),
-+	PINMUX_IPSR_DATA(IP6_29_28,	SUB_TCK),
-+
-+	PINMUX_IPSR_DATA(IP6_31_30,	SD0_DAT2),
-+	PINMUX_IPSR_DATA(IP6_31_30,	SUB_TDI),
-+
-+	/* IPSR7 */
-+	PINMUX_IPSR_DATA(IP7_1_0,	SD0_DAT3),
-+	PINMUX_IPSR_MSEL(IP7_1_0,	IRQ1_B,		SEL_IRQ1_B),
-+
-+	PINMUX_IPSR_DATA(IP7_3_2,	SD0_CD),
-+	PINMUX_IPSR_DATA(IP7_3_2,	TX5_A),
-+
-+	PINMUX_IPSR_DATA(IP7_5_4,	SD0_WP),
-+	PINMUX_IPSR_MSEL(IP7_5_4,	RX5_A,		SEL_SCIF5_A),
-+
-+	PINMUX_IPSR_DATA(IP7_8_6,	VI1_CLKENB),
-+	PINMUX_IPSR_MSEL(IP7_8_6,	HSPI_CLK0_A,	SEL_HSPI0_A),
-+	PINMUX_IPSR_DATA(IP7_8_6,	HTX1_A),
-+	PINMUX_IPSR_MSEL(IP7_8_6,	RTS1_C,		SEL_SCIF1_C),
-+
-+	PINMUX_IPSR_DATA(IP7_11_9,	VI1_FIELD),
-+	PINMUX_IPSR_MSEL(IP7_11_9,	HSPI_CS0_A,	SEL_HSPI0_A),
-+	PINMUX_IPSR_MSEL(IP7_11_9,	HRX1_A,		SEL_HSCIF1_A),
-+	PINMUX_IPSR_MSEL(IP7_11_9,	SCK1_C,		SEL_SCIF1_C),
-+
-+	PINMUX_IPSR_DATA(IP7_14_12,	VI1_HSYNC),
-+	PINMUX_IPSR_MSEL(IP7_14_12,	HSPI_RX0_A,	SEL_HSPI0_A),
-+	PINMUX_IPSR_MSEL(IP7_14_12,	HRTS1_A,	SEL_HSCIF1_A),
-+	PINMUX_IPSR_MSEL(IP7_14_12,	FMCLK_A,	SEL_FM_A),
-+	PINMUX_IPSR_MSEL(IP7_14_12,	RX1_C,		SEL_SCIF1_C),
-+
-+	PINMUX_IPSR_DATA(IP7_17_15,	VI1_VSYNC),
-+	PINMUX_IPSR_DATA(IP7_17_15,	HSPI_TX0),
-+	PINMUX_IPSR_MSEL(IP7_17_15,	HCTS1_A,	SEL_HSCIF1_A),
-+	PINMUX_IPSR_DATA(IP7_17_15,	BPFCLK_A),
-+	PINMUX_IPSR_DATA(IP7_17_15,	TX1_C),
-+
-+	PINMUX_IPSR_DATA(IP7_20_18,	TCLK0),
-+	PINMUX_IPSR_MSEL(IP7_20_18,	HSCK1_A,	SEL_HSCIF1_A),
-+	PINMUX_IPSR_MSEL(IP7_20_18,	FMIN_A,		SEL_FM_A),
-+	PINMUX_IPSR_MSEL(IP7_20_18,	IRQ2_C,		SEL_IRQ2_C),
-+	PINMUX_IPSR_MSEL(IP7_20_18,	CTS1_C,		SEL_SCIF1_C),
-+	PINMUX_IPSR_DATA(IP7_20_18,	SPEEDIN),
-+
-+	PINMUX_IPSR_DATA(IP7_21,	VI0_CLK),
-+	PINMUX_IPSR_MSEL(IP7_21,	CAN_CLK_A,	SEL_CANCLK_A),
-+
-+	PINMUX_IPSR_DATA(IP7_24_22,	VI0_CLKENB),
-+	PINMUX_IPSR_MSEL(IP7_24_22,	SD2_DAT2_B,	SEL_SD2_B),
-+	PINMUX_IPSR_DATA(IP7_24_22,	VI1_DATA0),
-+	PINMUX_IPSR_DATA(IP7_24_22,	DU1_DG6),
-+	PINMUX_IPSR_MSEL(IP7_24_22,	HSPI_RX1_A,	SEL_HSPI1_A),
-+	PINMUX_IPSR_MSEL(IP7_24_22,	RX4_B,		SEL_SCIF4_B),
-+
-+	PINMUX_IPSR_DATA(IP7_28_25,	VI0_FIELD),
-+	PINMUX_IPSR_MSEL(IP7_28_25,	SD2_DAT3_B,	SEL_SD2_B),
-+	PINMUX_DATA(VI0_R3_C_MARK,	FN_IP7_28_25,	FN_VI0_R3_C,	FN_SEL_VI0_C), /* see sel_vi0 */
-+	PINMUX_DATA(VI0_R3_D_MARK,	FN_IP7_28_25,	FN_VI0_R3_C,	FN_SEL_VI0_D), /* see sel_vi0 */
-+	PINMUX_IPSR_DATA(IP7_28_25,	VI1_DATA1),
-+	PINMUX_IPSR_DATA(IP7_28_25,	DU1_DG7),
-+	PINMUX_IPSR_MSEL(IP7_28_25,	HSPI_CLK1_A,	SEL_HSPI1_A),
-+	PINMUX_IPSR_DATA(IP7_28_25,	TX4_B),
-+
-+	PINMUX_IPSR_DATA(IP7_31_29,	VI0_HSYNC),
-+	PINMUX_IPSR_MSEL(IP7_31_29,	SD2_CD_B,	SEL_SD2_B),
-+	PINMUX_IPSR_DATA(IP7_31_29,	VI1_DATA2),
-+	PINMUX_IPSR_DATA(IP7_31_29,	DU1_DR2),
-+	PINMUX_IPSR_MSEL(IP7_31_29,	HSPI_CS1_A,	SEL_HSPI1_A),
-+	PINMUX_IPSR_MSEL(IP7_31_29,	RX3_B,		SEL_SCIF3_B),
-+
-+	/* IPSR8 */
-+	PINMUX_IPSR_DATA(IP8_2_0,	VI0_VSYNC),
-+	PINMUX_IPSR_MSEL(IP8_2_0,	SD2_WP_B,	SEL_SD2_B),
-+	PINMUX_IPSR_DATA(IP8_2_0,	VI1_DATA3),
-+	PINMUX_IPSR_DATA(IP8_2_0,	DU1_DR3),
-+	PINMUX_IPSR_DATA(IP8_2_0,	HSPI_TX1_A),
-+	PINMUX_IPSR_DATA(IP8_2_0,	TX3_B),
-+
-+	PINMUX_IPSR_DATA(IP8_5_3,	VI0_DATA0_VI0_B0),
-+	PINMUX_IPSR_DATA(IP8_5_3,	DU1_DG2),
-+	PINMUX_IPSR_MSEL(IP8_5_3,	IRQ2_B,		SEL_IRQ2_B),
-+	PINMUX_IPSR_MSEL(IP8_5_3,	RX3_D,		SEL_SCIF3_D),
-+
-+	PINMUX_IPSR_DATA(IP8_8_6,	VI0_DATA1_VI0_B1),
-+	PINMUX_IPSR_DATA(IP8_8_6,	DU1_DG3),
-+	PINMUX_IPSR_MSEL(IP8_8_6,	IRQ3_B,		SEL_IRQ3_B),
-+	PINMUX_IPSR_DATA(IP8_8_6,	TX3_D),
-+
-+	PINMUX_IPSR_DATA(IP8_10_9,	VI0_DATA2_VI0_B2),
-+	PINMUX_IPSR_DATA(IP8_10_9,	DU1_DG4),
-+	PINMUX_IPSR_MSEL(IP8_10_9,	RX0_C,		SEL_SCIF0_C),
-+
-+	PINMUX_IPSR_DATA(IP8_13_11,	VI0_DATA3_VI0_B3),
-+	PINMUX_IPSR_DATA(IP8_13_11,	DU1_DG5),
-+	PINMUX_IPSR_DATA(IP8_13_11,	TX1_A),
-+	PINMUX_IPSR_DATA(IP8_13_11,	TX0_C),
-+
-+	PINMUX_IPSR_DATA(IP8_15_14,	VI0_DATA4_VI0_B4),
-+	PINMUX_IPSR_DATA(IP8_15_14,	DU1_DB2),
-+	PINMUX_IPSR_MSEL(IP8_15_14,	RX1_A,		SEL_SCIF1_A),
-+
-+	PINMUX_IPSR_DATA(IP8_18_16,	VI0_DATA5_VI0_B5),
-+	PINMUX_IPSR_DATA(IP8_18_16,	DU1_DB3),
-+	PINMUX_IPSR_MSEL(IP8_18_16,	SCK1_A,		SEL_SCIF1_A),
-+	PINMUX_IPSR_DATA(IP8_18_16,	PWM4),
-+	PINMUX_IPSR_MSEL(IP8_18_16,	HSCK1_B,	SEL_HSCIF1_B),
-+
-+	PINMUX_IPSR_DATA(IP8_21_19,	VI0_DATA6_VI0_G0),
-+	PINMUX_IPSR_DATA(IP8_21_19,	DU1_DB4),
-+	PINMUX_IPSR_MSEL(IP8_21_19,	CTS1_A,		SEL_SCIF1_A),
-+	PINMUX_IPSR_DATA(IP8_21_19,	PWM5),
-+
-+	PINMUX_IPSR_DATA(IP8_23_22,	VI0_DATA7_VI0_G1),
-+	PINMUX_IPSR_DATA(IP8_23_22,	DU1_DB5),
-+	PINMUX_IPSR_MSEL(IP8_23_22,	RTS1_A,		SEL_SCIF1_A),
-+
-+	PINMUX_IPSR_DATA(IP8_26_24,	VI0_G2),
-+	PINMUX_IPSR_DATA(IP8_26_24,	SD2_CLK_B),
-+	PINMUX_IPSR_DATA(IP8_26_24,	VI1_DATA4),
-+	PINMUX_IPSR_DATA(IP8_26_24,	DU1_DR4),
-+	PINMUX_IPSR_DATA(IP8_26_24,	HTX1_B),
-+
-+	PINMUX_IPSR_DATA(IP8_29_27,	VI0_G3),
-+	PINMUX_IPSR_MSEL(IP8_29_27,	SD2_CMD_B,	SEL_SD2_B),
-+	PINMUX_IPSR_DATA(IP8_29_27,	VI1_DATA5),
-+	PINMUX_IPSR_DATA(IP8_29_27,	DU1_DR5),
-+	PINMUX_IPSR_MSEL(IP8_29_27,	HRX1_B,		SEL_HSCIF1_B),
-+
-+	/* IPSR9 */
-+	PINMUX_IPSR_DATA(IP9_2_0,	VI0_G4),
-+	PINMUX_IPSR_MSEL(IP9_2_0,	SD2_DAT0_B,	SEL_SD2_B),
-+	PINMUX_IPSR_DATA(IP9_2_0,	VI1_DATA6),
-+	PINMUX_IPSR_DATA(IP9_2_0,	DU1_DR6),
-+	PINMUX_IPSR_MSEL(IP9_2_0,	HRTS1_B,	SEL_HSCIF1_B),
-+
-+	PINMUX_IPSR_DATA(IP9_5_3,	VI0_G5),
-+	PINMUX_IPSR_MSEL(IP9_5_3,	SD2_DAT1_B,	SEL_SD2_B),
-+	PINMUX_IPSR_DATA(IP9_5_3,	VI1_DATA7),
-+	PINMUX_IPSR_DATA(IP9_5_3,	DU1_DR7),
-+	PINMUX_IPSR_MSEL(IP9_5_3,	HCTS1_B,	SEL_HSCIF1_B),
-+
-+	PINMUX_DATA(VI0_R0_A_MARK,	FN_IP9_8_6,	FN_VI0_R0_A,	FN_SEL_VI0_A), /* see sel_vi0 */
-+	PINMUX_DATA(VI0_R0_C_MARK,	FN_IP9_8_6,	FN_VI0_R0_A,	FN_SEL_VI0_C), /* see sel_vi0 */
-+	PINMUX_IPSR_DATA(IP9_8_6,	VI1_CLK),
-+	PINMUX_IPSR_DATA(IP9_8_6,	ETH_REF_CLK),
-+	PINMUX_IPSR_DATA(IP9_8_6,	DU1_DOTCLKIN),
-+
-+	PINMUX_DATA(VI0_R1_A_MARK,	FN_IP9_11_9,	FN_VI0_R1_A,	FN_SEL_VI0_A), /* see sel_vi0 */
-+	PINMUX_DATA(VI0_R1_C_MARK,	FN_IP9_11_9,	FN_VI0_R1_A,	FN_SEL_VI0_C), /* see sel_vi0 */
-+	PINMUX_IPSR_DATA(IP9_11_9,	VI1_DATA8),
-+	PINMUX_IPSR_DATA(IP9_11_9,	DU1_DB6),
-+	PINMUX_IPSR_DATA(IP9_11_9,	ETH_TXD0),
-+	PINMUX_IPSR_DATA(IP9_11_9,	PWM2),
-+	PINMUX_IPSR_DATA(IP9_11_9,	TCLK1),
-+
-+	PINMUX_DATA(VI0_R2_A_MARK,	FN_IP9_14_12,	FN_VI0_R2_A,	FN_SEL_VI0_A), /* see sel_vi0 */
-+	PINMUX_DATA(VI0_R2_C_MARK,	FN_IP9_14_12,	FN_VI0_R2_A,	FN_SEL_VI0_C), /* see sel_vi0 */
-+	PINMUX_IPSR_DATA(IP9_14_12,	VI1_DATA9),
-+	PINMUX_IPSR_DATA(IP9_14_12,	DU1_DB7),
-+	PINMUX_IPSR_DATA(IP9_14_12,	ETH_TXD1),
-+	PINMUX_IPSR_DATA(IP9_14_12,	PWM3),
-+
-+	PINMUX_IPSR_MSEL(IP9_17_15,	VI0_R3_A,	SEL_VI0_A),
-+	PINMUX_IPSR_DATA(IP9_17_15,	ETH_CRS_DV),
-+	PINMUX_IPSR_DATA(IP9_17_15,	IECLK),
-+	PINMUX_IPSR_MSEL(IP9_17_15,	SCK2_C,		SEL_SCIF2_C),
-+
-+	PINMUX_DATA(VI0_R4_A_MARK,	FN_IP9_20_18,	FN_VI0_R4_A,	FN_SEL_VI0_A), /* see sel_vi0 */
-+	PINMUX_DATA(VI0_R3_C_MARK,	FN_IP9_20_18,	FN_VI0_R4_A,	FN_SEL_VI0_C), /* see sel_vi0 */
-+	PINMUX_IPSR_DATA(IP9_20_18,	ETH_TX_EN),
-+	PINMUX_IPSR_DATA(IP9_20_18,	IETX),
-+	PINMUX_IPSR_DATA(IP9_20_18,	TX2_C),
-+
-+	PINMUX_DATA(VI0_R5_A_MARK,	FN_IP9_23_21,	FN_VI0_R5_A,	FN_SEL_VI0_A), /* see sel_vi0 */
-+	PINMUX_DATA(VI0_R5_C_MARK,	FN_IP9_23_21,	FN_VI0_R5_A,	FN_SEL_VI0_C), /* see sel_vi0 */
-+	PINMUX_IPSR_DATA(IP9_23_21,	ETH_RX_ER),
-+	PINMUX_IPSR_MSEL(IP9_23_21,	FMCLK_C,	SEL_FM_C),
-+	PINMUX_IPSR_DATA(IP9_23_21,	IERX),
-+	PINMUX_IPSR_MSEL(IP9_23_21,	RX2_C,		SEL_SCIF2_C),
-+
-+	PINMUX_IPSR_MSEL(IP9_26_24,	VI1_DATA10_A,	SEL_VI1_A),
-+	PINMUX_IPSR_DATA(IP9_26_24,	DU1_DOTCLKOUT),
-+	PINMUX_IPSR_DATA(IP9_26_24,	ETH_RXD0),
-+	PINMUX_IPSR_DATA(IP9_26_24,	BPFCLK_C),
-+	PINMUX_IPSR_DATA(IP9_26_24,	TX2_D),
-+	PINMUX_IPSR_MSEL(IP9_26_24,	SDA2_C,		SEL_I2C2_C),
-+
-+	PINMUX_IPSR_MSEL(IP9_29_27,	VI1_DATA11_A,	SEL_VI1_A),
-+	PINMUX_IPSR_DATA(IP9_29_27,	DU1_EXHSYNC_DU1_HSYNC),
-+	PINMUX_IPSR_DATA(IP9_29_27,	ETH_RXD1),
-+	PINMUX_IPSR_MSEL(IP9_29_27,	FMIN_C,		SEL_FM_C),
-+	PINMUX_IPSR_MSEL(IP9_29_27,	RX2_D,		SEL_SCIF2_D),
-+	PINMUX_IPSR_MSEL(IP9_29_27,	SCL2_C,		SEL_I2C2_C),
-+
-+	/* IPSR10 */
-+	PINMUX_IPSR_DATA(IP10_2_0,	SD2_CLK_A),
-+	PINMUX_IPSR_DATA(IP10_2_0,	DU1_EXVSYNC_DU1_VSYNC),
-+	PINMUX_IPSR_DATA(IP10_2_0,	ATARD1),
-+	PINMUX_IPSR_DATA(IP10_2_0,	ETH_MDC),
-+	PINMUX_IPSR_MSEL(IP10_2_0,	SDA1_B,		SEL_I2C1_B),
-+
-+	PINMUX_IPSR_MSEL(IP10_5_3,	SD2_CMD_A,	SEL_SD2_A),
-+	PINMUX_IPSR_DATA(IP10_5_3,	DU1_EXODDF_DU1_ODDF_DISP_CDE),
-+	PINMUX_IPSR_DATA(IP10_5_3,	ATAWR1),
-+	PINMUX_IPSR_DATA(IP10_5_3,	ETH_MDIO),
-+	PINMUX_IPSR_MSEL(IP10_5_3,	SCL1_B,		SEL_I2C1_B),
-+
-+	PINMUX_IPSR_MSEL(IP10_8_6,	SD2_DAT0_A,	SEL_SD2_A),
-+	PINMUX_IPSR_DATA(IP10_8_6,	DU1_DISP),
-+	PINMUX_IPSR_DATA(IP10_8_6,	ATACS01),
-+	PINMUX_IPSR_MSEL(IP10_8_6,	DREQ1_B,	SEL_DREQ1_B),
-+	PINMUX_IPSR_DATA(IP10_8_6,	ETH_LINK),
-+	PINMUX_IPSR_MSEL(IP10_8_6,	CAN1_RX_A,	SEL_CAN1_A),
-+
-+	PINMUX_IPSR_MSEL(IP10_12_9,	SD2_DAT1_A,	SEL_SD2_A),
-+	PINMUX_IPSR_DATA(IP10_12_9,	DU1_CDE),
-+	PINMUX_IPSR_DATA(IP10_12_9,	ATACS11),
-+	PINMUX_IPSR_DATA(IP10_12_9,	DACK1_B),
-+	PINMUX_IPSR_DATA(IP10_12_9,	ETH_MAGIC),
-+	PINMUX_IPSR_DATA(IP10_12_9,	CAN1_TX_A),
-+	PINMUX_IPSR_DATA(IP10_12_9,	PWM6),
-+
-+	PINMUX_IPSR_MSEL(IP10_15_13,	SD2_DAT2_A,	SEL_SD2_A),
-+	PINMUX_IPSR_DATA(IP10_15_13,	VI1_DATA12),
-+	PINMUX_IPSR_MSEL(IP10_15_13,	DREQ2_B,	SEL_DREQ2_B),
-+	PINMUX_IPSR_DATA(IP10_15_13,	ATADIR1),
-+	PINMUX_IPSR_MSEL(IP10_15_13,	HSPI_CLK2_B,	SEL_HSPI2_B),
-+	PINMUX_IPSR_MSEL(IP10_15_13,	GPSCLK_B,	SEL_GPS_B),
-+
-+	PINMUX_IPSR_MSEL(IP10_18_16,	SD2_DAT3_A,	SEL_SD2_A),
-+	PINMUX_IPSR_DATA(IP10_18_16,	VI1_DATA13),
-+	PINMUX_IPSR_DATA(IP10_18_16,	DACK2_B),
-+	PINMUX_IPSR_DATA(IP10_18_16,	ATAG1),
-+	PINMUX_IPSR_MSEL(IP10_18_16,	HSPI_CS2_B,	SEL_HSPI2_B),
-+	PINMUX_IPSR_MSEL(IP10_18_16,	GPSIN_B,	SEL_GPS_B),
-+
-+	PINMUX_IPSR_MSEL(IP10_21_19,	SD2_CD_A,	SEL_SD2_A),
-+	PINMUX_IPSR_DATA(IP10_21_19,	VI1_DATA14),
-+	PINMUX_IPSR_MSEL(IP10_21_19,	EX_WAIT1_B,	SEL_WAIT1_B),
-+	PINMUX_IPSR_MSEL(IP10_21_19,	DREQ0_B,	SEL_DREQ0_B),
-+	PINMUX_IPSR_MSEL(IP10_21_19,	HSPI_RX2_B,	SEL_HSPI2_B),
-+	PINMUX_IPSR_MSEL(IP10_21_19,	REMOCON_A,	SEL_REMOCON_A),
-+
-+	PINMUX_IPSR_MSEL(IP10_24_22,	SD2_WP_A,	SEL_SD2_A),
-+	PINMUX_IPSR_DATA(IP10_24_22,	VI1_DATA15),
-+	PINMUX_IPSR_MSEL(IP10_24_22,	EX_WAIT2_B,	SEL_WAIT2_B),
-+	PINMUX_IPSR_DATA(IP10_24_22,	DACK0_B),
-+	PINMUX_IPSR_DATA(IP10_24_22,	HSPI_TX2_B),
-+	PINMUX_IPSR_MSEL(IP10_24_22,	CAN_CLK_C,	SEL_CANCLK_C),
-+};
-+
-+static struct sh_pfc_pin pinmux_pins[] = {
-+	PINMUX_GPIO_GP_ALL(),
-+};
-+
-+/* Pin numbers for pins without a corresponding GPIO port number are computed
-+ * from the row and column numbers with a 1000 offset to avoid collisions with
-+ * GPIO port numbers.
-+ */
-+#define PIN_NUMBER(row, col)		(1000+((row)-1)*25+(col)-1)
-+
-+/* - SCIF macro ------------------------------------------------------------- */
-+#define SCIF_PFC_PIN(name, args...)					\
-+	static const unsigned int name ##_pins[] = { args }
-+#define SCIF_PFC_DAT(name, tx, rx)					\
-+	static const unsigned int name ##_mux[]  = { tx##_MARK, rx##_MARK, }
-+#define SCIF_PFC_CTR(name, cts, rts)					\
-+	static const unsigned int name ##_mux[]  = { cts##_MARK, rts##_MARK, }
-+#define SCIF_PFC_CLK(name, sck)					\
-+	static const unsigned int name ##_mux[]  = { sck##_MARK, }
-+
-+/* - HSCIF0 ----------------------------------------------------------------- */
-+SCIF_PFC_PIN(hscif0_data_a,	RCAR_GP_PIN(1, 17),	RCAR_GP_PIN(1, 18));
-+SCIF_PFC_DAT(hscif0_data_a,	HTX0_A,			HRX0_A);
-+SCIF_PFC_PIN(hscif0_data_b,	RCAR_GP_PIN(0, 29),	RCAR_GP_PIN(0, 30));
-+SCIF_PFC_DAT(hscif0_data_b,	HTX0_B,			HRX0_B);
-+SCIF_PFC_PIN(hscif0_ctrl_a,	RCAR_GP_PIN(1, 20),	RCAR_GP_PIN(1, 21));
-+SCIF_PFC_CTR(hscif0_ctrl_a,	HCTS0_A,		HRTS0_A);
-+SCIF_PFC_PIN(hscif0_ctrl_b,	RCAR_GP_PIN(0, 31),	RCAR_GP_PIN(0, 28));
-+SCIF_PFC_CTR(hscif0_ctrl_b,	HCTS0_B,		HRTS0_B);
-+SCIF_PFC_PIN(hscif0_clk,	RCAR_GP_PIN(1, 19));
-+SCIF_PFC_CLK(hscif0_clk,	HSCK0);
-+
-+/* - HSCIF1 ----------------------------------------------------------------- */
-+SCIF_PFC_PIN(hscif1_data_a,	RCAR_GP_PIN(3, 19),	RCAR_GP_PIN(3, 20));
-+SCIF_PFC_DAT(hscif1_data_a,	HTX1_A,			HRX1_A);
-+SCIF_PFC_PIN(hscif1_data_b,	RCAR_GP_PIN(4, 5),	RCAR_GP_PIN(4, 6));
-+SCIF_PFC_DAT(hscif1_data_b,	HTX1_B,			HRX1_B);
-+SCIF_PFC_PIN(hscif1_ctrl_a,	RCAR_GP_PIN(3, 22),	RCAR_GP_PIN(3, 21));
-+SCIF_PFC_CTR(hscif1_ctrl_a,	HCTS1_A,		HRTS1_A);
-+SCIF_PFC_PIN(hscif1_ctrl_b,	RCAR_GP_PIN(4, 8),	RCAR_GP_PIN(4, 7));
-+SCIF_PFC_CTR(hscif1_ctrl_b,	HCTS1_B,		HRTS1_B);
-+SCIF_PFC_PIN(hscif1_clk_a,	RCAR_GP_PIN(3, 23));
-+SCIF_PFC_CLK(hscif1_clk_a,	HSCK1_A);
-+SCIF_PFC_PIN(hscif1_clk_b,	RCAR_GP_PIN(4, 2));
-+SCIF_PFC_CLK(hscif1_clk_b,	HSCK1_B);
-+
-+/* - SCIF CLOCK ------------------------------------------------------------- */
-+SCIF_PFC_PIN(scif_clk,		RCAR_GP_PIN(1, 16));
-+SCIF_PFC_CLK(scif_clk,		SCIF_CLK);
-+
-+/* - SCIF0 ------------------------------------------------------------------ */
-+SCIF_PFC_PIN(scif0_data_a,	RCAR_GP_PIN(1, 17),	RCAR_GP_PIN(1, 18));
-+SCIF_PFC_DAT(scif0_data_a,	TX0_A,			RX0_A);
-+SCIF_PFC_PIN(scif0_data_b,	RCAR_GP_PIN(2, 3),	RCAR_GP_PIN(2, 2));
-+SCIF_PFC_DAT(scif0_data_b,	TX0_B,			RX0_B);
-+SCIF_PFC_PIN(scif0_data_c,	RCAR_GP_PIN(4, 0),	RCAR_GP_PIN(3, 31));
-+SCIF_PFC_DAT(scif0_data_c,	TX0_C,			RX0_C);
-+SCIF_PFC_PIN(scif0_data_d,	RCAR_GP_PIN(3, 6),	RCAR_GP_PIN(3, 1));
-+SCIF_PFC_DAT(scif0_data_d,	TX0_D,			RX0_D);
-+SCIF_PFC_PIN(scif0_ctrl,	RCAR_GP_PIN(1, 20),	RCAR_GP_PIN(1, 21));
-+SCIF_PFC_CTR(scif0_ctrl,	CTS0,			RTS0);
-+SCIF_PFC_PIN(scif0_clk,		RCAR_GP_PIN(1, 19));
-+SCIF_PFC_CLK(scif0_clk,		SCK0);
-+
-+/* - SCIF1 ------------------------------------------------------------------ */
-+SCIF_PFC_PIN(scif1_data_a,	RCAR_GP_PIN(4, 0),	RCAR_GP_PIN(4, 1));
-+SCIF_PFC_DAT(scif1_data_a,	TX1_A,			RX1_A);
-+SCIF_PFC_PIN(scif1_data_b,	RCAR_GP_PIN(2, 24),	RCAR_GP_PIN(2, 25));
-+SCIF_PFC_DAT(scif1_data_b,	TX1_B,			RX1_B);
-+SCIF_PFC_PIN(scif1_data_c,	RCAR_GP_PIN(3, 22),	RCAR_GP_PIN(3, 21));
-+SCIF_PFC_DAT(scif1_data_c,	TX1_C,			RX1_C);
-+SCIF_PFC_PIN(scif1_data_d,	RCAR_GP_PIN(1, 30),	RCAR_GP_PIN(1, 31));
-+SCIF_PFC_DAT(scif1_data_d,	TX1_D,			RX1_D);
-+SCIF_PFC_PIN(scif1_ctrl_a,	RCAR_GP_PIN(4, 3),	RCAR_GP_PIN(4, 4));
-+SCIF_PFC_CTR(scif1_ctrl_a,	CTS1_A,			RTS1_A);
-+SCIF_PFC_PIN(scif1_ctrl_c,	RCAR_GP_PIN(3, 23),	RCAR_GP_PIN(3, 19));
-+SCIF_PFC_CTR(scif1_ctrl_c,	CTS1_C,			RTS1_C);
-+SCIF_PFC_PIN(scif1_clk_a,	RCAR_GP_PIN(4, 2));
-+SCIF_PFC_CLK(scif1_clk_a,	SCK1_A);
-+SCIF_PFC_PIN(scif1_clk_c,	RCAR_GP_PIN(3, 20));
-+SCIF_PFC_CLK(scif1_clk_c,	SCK1_C);
-+
-+/* - SCIF2 ------------------------------------------------------------------ */
-+SCIF_PFC_PIN(scif2_data_a,	RCAR_GP_PIN(2, 26),	RCAR_GP_PIN(2, 27));
-+SCIF_PFC_DAT(scif2_data_a,	TX2_A,			RX2_A);
-+SCIF_PFC_PIN(scif2_data_b,	RCAR_GP_PIN(0, 29),	RCAR_GP_PIN(0, 28));
-+SCIF_PFC_DAT(scif2_data_b,	TX2_B,			RX2_B);
-+SCIF_PFC_PIN(scif2_data_c,	RCAR_GP_PIN(4, 13),	RCAR_GP_PIN(4, 14));
-+SCIF_PFC_DAT(scif2_data_c,	TX2_C,			RX2_C);
-+SCIF_PFC_PIN(scif2_data_d,	RCAR_GP_PIN(4, 15),	RCAR_GP_PIN(4, 16));
-+SCIF_PFC_DAT(scif2_data_d,	TX2_D,			RX2_D);
-+SCIF_PFC_PIN(scif2_data_e,	RCAR_GP_PIN(0, 3),	RCAR_GP_PIN(0, 4));
-+SCIF_PFC_DAT(scif2_data_e,	TX2_E,			RX2_E);
-+SCIF_PFC_PIN(scif2_clk_a,	RCAR_GP_PIN(3, 9));
-+SCIF_PFC_CLK(scif2_clk_a,	SCK2_A);
-+SCIF_PFC_PIN(scif2_clk_b,	PIN_NUMBER(3, 20));
-+SCIF_PFC_CLK(scif2_clk_b,	SCK2_B);
-+SCIF_PFC_PIN(scif2_clk_c,	RCAR_GP_PIN(4, 12));
-+SCIF_PFC_CLK(scif2_clk_c,	SCK2_C);
-+
-+/* - SCIF3 ------------------------------------------------------------------ */
-+SCIF_PFC_PIN(scif3_data_a,	RCAR_GP_PIN(1, 10),	RCAR_GP_PIN(1, 9));
-+SCIF_PFC_DAT(scif3_data_a,	TX3_A,			RX3_A);
-+SCIF_PFC_PIN(scif3_data_b,	RCAR_GP_PIN(3, 28),	RCAR_GP_PIN(3, 27));
-+SCIF_PFC_DAT(scif3_data_b,	TX3_B,			RX3_B);
-+SCIF_PFC_PIN(scif3_data_c,	RCAR_GP_PIN(1, 3),	RCAR_GP_PIN(0, 31));
-+SCIF_PFC_DAT(scif3_data_c,	TX3_C,			RX3_C);
-+SCIF_PFC_PIN(scif3_data_d,	RCAR_GP_PIN(3, 30),	RCAR_GP_PIN(3, 29));
-+SCIF_PFC_DAT(scif3_data_d,	TX3_D,			RX3_D);
-+
-+/* - SCIF4 ------------------------------------------------------------------ */
-+SCIF_PFC_PIN(scif4_data_a,	RCAR_GP_PIN(2, 5),	RCAR_GP_PIN(2, 4));
-+SCIF_PFC_DAT(scif4_data_a,	TX4_A,			RX4_A);
-+SCIF_PFC_PIN(scif4_data_b,	RCAR_GP_PIN(3, 26),	RCAR_GP_PIN(3, 25));
-+SCIF_PFC_DAT(scif4_data_b,	TX4_B,			RX4_B);
-+SCIF_PFC_PIN(scif4_data_c,	RCAR_GP_PIN(3, 0),	RCAR_GP_PIN(2, 31));
-+SCIF_PFC_DAT(scif4_data_c,	TX4_C,			RX4_C);
-+
-+/* - SCIF5 ------------------------------------------------------------------ */
-+SCIF_PFC_PIN(scif5_data_a,	RCAR_GP_PIN(3, 17),	RCAR_GP_PIN(3, 18));
-+SCIF_PFC_DAT(scif5_data_a,	TX5_A,			RX5_A);
-+SCIF_PFC_PIN(scif5_data_b,	RCAR_GP_PIN(1, 15),	RCAR_GP_PIN(1, 14));
-+SCIF_PFC_DAT(scif5_data_b,	TX5_B,			RX5_B);
-+
-+static const struct sh_pfc_pin_group pinmux_groups[] = {
-+	SH_PFC_PIN_GROUP(hscif0_data_a),
-+	SH_PFC_PIN_GROUP(hscif0_data_b),
-+	SH_PFC_PIN_GROUP(hscif0_ctrl_a),
-+	SH_PFC_PIN_GROUP(hscif0_ctrl_b),
-+	SH_PFC_PIN_GROUP(hscif0_clk),
-+	SH_PFC_PIN_GROUP(hscif1_data_a),
-+	SH_PFC_PIN_GROUP(hscif1_data_b),
-+	SH_PFC_PIN_GROUP(hscif1_ctrl_a),
-+	SH_PFC_PIN_GROUP(hscif1_ctrl_b),
-+	SH_PFC_PIN_GROUP(hscif1_clk_a),
-+	SH_PFC_PIN_GROUP(hscif1_clk_b),
-+	SH_PFC_PIN_GROUP(scif_clk),
-+	SH_PFC_PIN_GROUP(scif0_data_a),
-+	SH_PFC_PIN_GROUP(scif0_data_b),
-+	SH_PFC_PIN_GROUP(scif0_data_c),
-+	SH_PFC_PIN_GROUP(scif0_data_d),
-+	SH_PFC_PIN_GROUP(scif0_ctrl),
-+	SH_PFC_PIN_GROUP(scif0_clk),
-+	SH_PFC_PIN_GROUP(scif1_data_a),
-+	SH_PFC_PIN_GROUP(scif1_data_b),
-+	SH_PFC_PIN_GROUP(scif1_data_c),
-+	SH_PFC_PIN_GROUP(scif1_data_d),
-+	SH_PFC_PIN_GROUP(scif1_ctrl_a),
-+	SH_PFC_PIN_GROUP(scif1_ctrl_c),
-+	SH_PFC_PIN_GROUP(scif1_clk_a),
-+	SH_PFC_PIN_GROUP(scif1_clk_c),
-+	SH_PFC_PIN_GROUP(scif2_data_a),
-+	SH_PFC_PIN_GROUP(scif2_data_b),
-+	SH_PFC_PIN_GROUP(scif2_data_c),
-+	SH_PFC_PIN_GROUP(scif2_data_d),
-+	SH_PFC_PIN_GROUP(scif2_data_e),
-+	SH_PFC_PIN_GROUP(scif2_clk_a),
-+	SH_PFC_PIN_GROUP(scif2_clk_b),
-+	SH_PFC_PIN_GROUP(scif2_clk_c),
-+	SH_PFC_PIN_GROUP(scif3_data_a),
-+	SH_PFC_PIN_GROUP(scif3_data_b),
-+	SH_PFC_PIN_GROUP(scif3_data_c),
-+	SH_PFC_PIN_GROUP(scif3_data_d),
-+	SH_PFC_PIN_GROUP(scif4_data_a),
-+	SH_PFC_PIN_GROUP(scif4_data_b),
-+	SH_PFC_PIN_GROUP(scif4_data_c),
-+	SH_PFC_PIN_GROUP(scif5_data_a),
-+	SH_PFC_PIN_GROUP(scif5_data_b),
-+};
-+
-+static const char * const hscif0_groups[] = {
-+	"hscif0_data_a",
-+	"hscif0_data_b",
-+	"hscif0_ctrl_a",
-+	"hscif0_ctrl_b",
-+	"hscif0_clk",
-+};
-+
-+static const char * const hscif1_groups[] = {
-+	"hscif1_data_a",
-+	"hscif1_data_b",
-+	"hscif1_ctrl_a",
-+	"hscif1_ctrl_b",
-+	"hscif1_clk_a",
-+	"hscif1_clk_b",
-+};
-+
-+static const char * const scif_clk_groups[] = {
-+	"scif_clk",
-+};
-+
-+static const char * const scif0_groups[] = {
-+	"scif0_data_a",
-+	"scif0_data_b",
-+	"scif0_data_c",
-+	"scif0_data_d",
-+	"scif0_ctrl",
-+	"scif0_clk",
-+};
-+
-+static const char * const scif1_groups[] = {
-+	"scif1_data_a",
-+	"scif1_data_b",
-+	"scif1_data_c",
-+	"scif1_data_d",
-+	"scif1_ctrl_a",
-+	"scif1_ctrl_c",
-+	"scif1_clk_a",
-+	"scif1_clk_c",
-+};
-+
-+static const char * const scif2_groups[] = {
-+	"scif2_data_a",
-+	"scif2_data_b",
-+	"scif2_data_c",
-+	"scif2_data_d",
-+	"scif2_data_e",
-+	"scif2_clk_a",
-+	"scif2_clk_b",
-+	"scif2_clk_c",
-+};
-+
-+static const char * const scif3_groups[] = {
-+	"scif3_data_a",
-+	"scif3_data_b",
-+	"scif3_data_c",
-+	"scif3_data_d",
-+};
-+
-+static const char * const scif4_groups[] = {
-+	"scif4_data_a",
-+	"scif4_data_b",
-+	"scif4_data_c",
-+};
-+
-+static const char * const scif5_groups[] = {
-+	"scif5_data_a",
-+	"scif5_data_b",
-+};
-+
-+static const struct sh_pfc_function pinmux_functions[] = {
-+	SH_PFC_FUNCTION(hscif0),
-+	SH_PFC_FUNCTION(hscif1),
-+	SH_PFC_FUNCTION(scif_clk),
-+	SH_PFC_FUNCTION(scif0),
-+	SH_PFC_FUNCTION(scif1),
-+	SH_PFC_FUNCTION(scif2),
-+	SH_PFC_FUNCTION(scif3),
-+	SH_PFC_FUNCTION(scif4),
-+	SH_PFC_FUNCTION(scif5),
-+};
-+
-+static struct pinmux_cfg_reg pinmux_config_regs[] = {
-+	{ PINMUX_CFG_REG("GPSR0", 0xfffc0004, 32, 1) {
-+		GP_0_31_FN,	FN_IP1_14_11,
-+		GP_0_30_FN,	FN_IP1_10_8,
-+		GP_0_29_FN,	FN_IP1_7_5,
-+		GP_0_28_FN,	FN_IP1_4_2,
-+		GP_0_27_FN,	FN_IP1_1,
-+		GP_0_26_FN,	FN_IP1_0,
-+		GP_0_25_FN,	FN_IP0_30,
-+		GP_0_24_FN,	FN_IP0_29,
-+		GP_0_23_FN,	FN_IP0_28,
-+		GP_0_22_FN,	FN_IP0_27,
-+		GP_0_21_FN,	FN_IP0_26,
-+		GP_0_20_FN,	FN_IP0_25,
-+		GP_0_19_FN,	FN_IP0_24,
-+		GP_0_18_FN,	FN_IP0_23,
-+		GP_0_17_FN,	FN_IP0_22,
-+		GP_0_16_FN,	FN_IP0_21,
-+		GP_0_15_FN,	FN_IP0_20,
-+		GP_0_14_FN,	FN_IP0_19,
-+		GP_0_13_FN,	FN_IP0_18,
-+		GP_0_12_FN,	FN_IP0_17,
-+		GP_0_11_FN,	FN_IP0_16,
-+		GP_0_10_FN,	FN_IP0_15,
-+		GP_0_9_FN,	FN_A3,
-+		GP_0_8_FN,	FN_A2,
-+		GP_0_7_FN,	FN_A1,
-+		GP_0_6_FN,	FN_IP0_14_12,
-+		GP_0_5_FN,	FN_IP0_11_8,
-+		GP_0_4_FN,	FN_IP0_7_5,
-+		GP_0_3_FN,	FN_IP0_4_2,
-+		GP_0_2_FN,	FN_PENC1,
-+		GP_0_1_FN,	FN_PENC0,
-+		GP_0_0_FN,	FN_IP0_1_0 }
-+	},
-+	{ PINMUX_CFG_REG("GPSR1", 0xfffc0008, 32, 1) {
-+		GP_1_31_FN,	FN_IP4_6_4,
-+		GP_1_30_FN,	FN_IP4_3_1,
-+		GP_1_29_FN,	FN_IP4_0,
-+		GP_1_28_FN,	FN_IP3_31,
-+		GP_1_27_FN,	FN_IP3_30,
-+		GP_1_26_FN,	FN_IP3_29,
-+		GP_1_25_FN,	FN_IP3_28,
-+		GP_1_24_FN,	FN_IP3_27,
-+		GP_1_23_FN,	FN_IP3_26_24,
-+		GP_1_22_FN,	FN_IP3_23_21,
-+		GP_1_21_FN,	FN_IP3_20_19,
-+		GP_1_20_FN,	FN_IP3_18_16,
-+		GP_1_19_FN,	FN_IP3_15_13,
-+		GP_1_18_FN,	FN_IP3_12_10,
-+		GP_1_17_FN,	FN_IP3_9_8,
-+		GP_1_16_FN,	FN_IP3_7_5,
-+		GP_1_15_FN,	FN_IP3_4_2,
-+		GP_1_14_FN,	FN_IP3_1_0,
-+		GP_1_13_FN,	FN_IP2_31,
-+		GP_1_12_FN,	FN_IP2_30,
-+		GP_1_11_FN,	FN_IP2_17,
-+		GP_1_10_FN,	FN_IP2_16_14,
-+		GP_1_9_FN,	FN_IP2_13_12,
-+		GP_1_8_FN,	FN_IP2_11_9,
-+		GP_1_7_FN,	FN_IP2_8_6,
-+		GP_1_6_FN,	FN_IP2_5_3,
-+		GP_1_5_FN,	FN_IP2_2_0,
-+		GP_1_4_FN,	FN_IP1_29_28,
-+		GP_1_3_FN,	FN_IP1_27_25,
-+		GP_1_2_FN,	FN_IP1_24,
-+		GP_1_1_FN,	FN_WE0,
-+		GP_1_0_FN,	FN_IP1_23_21 }
-+	},
-+	{ PINMUX_CFG_REG("GPSR2", 0xfffc000c, 32, 1) {
-+		GP_2_31_FN,	FN_IP6_7,
-+		GP_2_30_FN,	FN_IP6_6_5,
-+		GP_2_29_FN,	FN_IP6_4_2,
-+		GP_2_28_FN,	FN_IP6_1_0,
-+		GP_2_27_FN,	FN_IP5_30_29,
-+		GP_2_26_FN,	FN_IP5_28_26,
-+		GP_2_25_FN,	FN_IP5_25_23,
-+		GP_2_24_FN,	FN_IP5_22_21,
-+		GP_2_23_FN,	FN_AUDIO_CLKB,
-+		GP_2_22_FN,	FN_AUDIO_CLKA,
-+		GP_2_21_FN,	FN_IP5_20_18,
-+		GP_2_20_FN,	FN_IP5_17_15,
-+		GP_2_19_FN,	FN_IP5_14_13,
-+		GP_2_18_FN,	FN_IP5_12,
-+		GP_2_17_FN,	FN_IP5_11_10,
-+		GP_2_16_FN,	FN_IP5_9_8,
-+		GP_2_15_FN,	FN_IP5_7,
-+		GP_2_14_FN,	FN_IP5_6,
-+		GP_2_13_FN,	FN_IP5_5_4,
-+		GP_2_12_FN,	FN_IP5_3_2,
-+		GP_2_11_FN,	FN_IP5_1_0,
-+		GP_2_10_FN,	FN_IP4_30_29,
-+		GP_2_9_FN,	FN_IP4_28_27,
-+		GP_2_8_FN,	FN_IP4_26_25,
-+		GP_2_7_FN,	FN_IP4_24_21,
-+		GP_2_6_FN,	FN_IP4_20_17,
-+		GP_2_5_FN,	FN_IP4_16_15,
-+		GP_2_4_FN,	FN_IP4_14_13,
-+		GP_2_3_FN,	FN_IP4_12_11,
-+		GP_2_2_FN,	FN_IP4_10_9,
-+		GP_2_1_FN,	FN_IP4_8,
-+		GP_2_0_FN,	FN_IP4_7 }
-+	},
-+	{ PINMUX_CFG_REG("GPSR3", 0xfffc0010, 32, 1) {
-+		GP_3_31_FN,	FN_IP8_10_9,
-+		GP_3_30_FN,	FN_IP8_8_6,
-+		GP_3_29_FN,	FN_IP8_5_3,
-+		GP_3_28_FN,	FN_IP8_2_0,
-+		GP_3_27_FN,	FN_IP7_31_29,
-+		GP_3_26_FN,	FN_IP7_28_25,
-+		GP_3_25_FN,	FN_IP7_24_22,
-+		GP_3_24_FN,	FN_IP7_21,
-+		GP_3_23_FN,	FN_IP7_20_18,
-+		GP_3_22_FN,	FN_IP7_17_15,
-+		GP_3_21_FN,	FN_IP7_14_12,
-+		GP_3_20_FN,	FN_IP7_11_9,
-+		GP_3_19_FN,	FN_IP7_8_6,
-+		GP_3_18_FN,	FN_IP7_5_4,
-+		GP_3_17_FN,	FN_IP7_3_2,
-+		GP_3_16_FN,	FN_IP7_1_0,
-+		GP_3_15_FN,	FN_IP6_31_30,
-+		GP_3_14_FN,	FN_IP6_29_28,
-+		GP_3_13_FN,	FN_IP6_27_26,
-+		GP_3_12_FN,	FN_IP6_25_24,
-+		GP_3_11_FN,	FN_IP6_23_22,
-+		GP_3_10_FN,	FN_IP6_21,
-+		GP_3_9_FN,	FN_IP6_20_19,
-+		GP_3_8_FN,	FN_IP6_18_17,
-+		GP_3_7_FN,	FN_IP6_16,
-+		GP_3_6_FN,	FN_IP6_15_14,
-+		GP_3_5_FN,	FN_IP6_13,
-+		GP_3_4_FN,	FN_IP6_12_11,
-+		GP_3_3_FN,	FN_IP6_10,
-+		GP_3_2_FN,	FN_SSI_SCK34,
-+		GP_3_1_FN,	FN_IP6_9,
-+		GP_3_0_FN,	FN_IP6_8 }
-+	},
-+	{ PINMUX_CFG_REG("GPSR4", 0xfffc0014, 32, 1) {
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		0, 0,
-+		GP_4_26_FN,	FN_AVS2,
-+		GP_4_25_FN,	FN_AVS1,
-+		GP_4_24_FN,	FN_IP10_24_22,
-+		GP_4_23_FN,	FN_IP10_21_19,
-+		GP_4_22_FN,	FN_IP10_18_16,
-+		GP_4_21_FN,	FN_IP10_15_13,
-+		GP_4_20_FN,	FN_IP10_12_9,
-+		GP_4_19_FN,	FN_IP10_8_6,
-+		GP_4_18_FN,	FN_IP10_5_3,
-+		GP_4_17_FN,	FN_IP10_2_0,
-+		GP_4_16_FN,	FN_IP9_29_27,
-+		GP_4_15_FN,	FN_IP9_26_24,
-+		GP_4_14_FN,	FN_IP9_23_21,
-+		GP_4_13_FN,	FN_IP9_20_18,
-+		GP_4_12_FN,	FN_IP9_17_15,
-+		GP_4_11_FN,	FN_IP9_14_12,
-+		GP_4_10_FN,	FN_IP9_11_9,
-+		GP_4_9_FN,	FN_IP9_8_6,
-+		GP_4_8_FN,	FN_IP9_5_3,
-+		GP_4_7_FN,	FN_IP9_2_0,
-+		GP_4_6_FN,	FN_IP8_29_27,
-+		GP_4_5_FN,	FN_IP8_26_24,
-+		GP_4_4_FN,	FN_IP8_23_22,
-+		GP_4_3_FN,	FN_IP8_21_19,
-+		GP_4_2_FN,	FN_IP8_18_16,
-+		GP_4_1_FN,	FN_IP8_15_14,
-+		GP_4_0_FN,	FN_IP8_13_11 }
-+	},
-+
-+	{ PINMUX_CFG_REG_VAR("IPSR0", 0xfffc0020, 32,
-+			     1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-+			     1, 1, 1, 1, 1, 1, 3, 4, 3, 3, 2) {
-+		/* IP0_31 [1] */
-+		0,	0,
-+		/* IP0_30 [1] */
-+		FN_A19,	0,
-+		/* IP0_29 [1] */
-+		FN_A18,	0,
-+		/* IP0_28 [1] */
-+		FN_A17,	0,
-+		/* IP0_27 [1] */
-+		FN_A16,	0,
-+		/* IP0_26 [1] */
-+		FN_A15,	0,
-+		/* IP0_25 [1] */
-+		FN_A14,	0,
-+		/* IP0_24 [1] */
-+		FN_A13,	0,
-+		/* IP0_23 [1] */
-+		FN_A12,	0,
-+		/* IP0_22 [1] */
-+		FN_A11,	0,
-+		/* IP0_21 [1] */
-+		FN_A10,	0,
-+		/* IP0_20 [1] */
-+		FN_A9,	0,
-+		/* IP0_19 [1] */
-+		FN_A8,	0,
-+		/* IP0_18 [1] */
-+		FN_A7,	0,
-+		/* IP0_17 [1] */
-+		FN_A6,	0,
-+		/* IP0_16 [1] */
-+		FN_A5,	0,
-+		/* IP0_15 [1] */
-+		FN_A4,	0,
-+		/* IP0_14_12 [3] */
-+		FN_SD1_DAT3_A,	FN_MMC_D3,	0,		FN_A0,
-+		FN_ATAG0_A,	0,		FN_REMOCON_B,	0,
-+		/* IP0_11_8 [4] */
-+		FN_SD1_DAT2_A,	FN_MMC_D2,	0,		FN_BS,
-+		FN_ATADIR0_A,	0,		FN_SDSELF_B,	0,
-+		FN_PWM4_B,	0,		0,		0,
-+		0,		0,		0,		0,
-+		/* IP0_7_5 [3] */
-+		FN_AUDATA1,	FN_ARM_TRACEDATA_1,	FN_GPSIN_C,	FN_USB_OVC1,
-+		FN_RX2_E,	FN_SCL2_B,		0,		0,
-+		/* IP0_4_2 [3] */
-+		FN_AUDATA0,	FN_ARM_TRACEDATA_0,	FN_GPSCLK_C,	FN_USB_OVC0,
-+		FN_TX2_E,	FN_SDA2_B,		0,		0,
-+		/* IP0_1_0 [2] */
-+		FN_PRESETOUT,	0,	FN_PWM1,	0,
-+		}
-+	},
-+	{ PINMUX_CFG_REG_VAR("IPSR1", 0xfffc0024, 32,
-+			     1, 1, 2, 3, 1, 3, 3, 1, 2, 4, 3, 3, 3, 1, 1) {
-+		/* IP1_31 [1] */
-+		0,	0,
-+		/* IP1_30 [1] */
-+		0,	0,
-+		/* IP1_29_28 [2] */
-+		FN_EX_CS1,	FN_MMC_D4,	0,	0,
-+		/* IP1_27_25 [3] */
-+		FN_SSI_WS1_B,	FN_EX_CS0,	FN_SCL2_A,	FN_TX3_C,
-+		FN_TS_SCK0_A,	0,		0,		0,
-+		/* IP1_24 [1] */
-+		FN_WE1,		FN_ATAWR0_B,
-+		/* IP1_23_21 [3] */
-+		FN_MMC_D5,	FN_ATADIR0_B,	0,		FN_RD_WR,
-+		0,		0,		0,		0,
-+		/* IP1_20_18 [3] */
-+		FN_SSI_SCK1_B,	FN_ATAG0_B,	FN_CS1_A26,	FN_SDA2_A,
-+		FN_SCK2_B,	0,		0,		0,
-+		/* IP1_17 [1] */
-+		FN_CS0,		FN_HSPI_RX1_B,
-+		/* IP1_16_15 [2] */
-+		FN_CLKOUT,	FN_HSPI_TX1_B,	FN_PWM0_B,	0,
-+		/* IP1_14_11 [4] */
-+		FN_SD1_WP_A,	FN_MMC_D7,	0,		FN_A25,
-+		FN_DACK1_A,	0,		FN_HCTS0_B,	FN_RX3_C,
-+		FN_TS_SDAT0_A,	0,		0,		0,
-+		0,		0,		0,		0,
-+		/* IP1_10_8 [3] */
-+		FN_SD1_CLK_B,	FN_MMC_D6,	0,		FN_A24,
-+		FN_DREQ1_A,	0,		FN_HRX0_B,	FN_TS_SPSYNC0_A,
-+		/* IP1_7_5 [3] */
-+		FN_A23,		FN_HTX0_B,	FN_TX2_B,	FN_DACK2_A,
-+		FN_TS_SDEN0_A,	0,		0,		0,
-+		/* IP1_4_2 [3] */
-+		FN_A22,		FN_HRTS0_B,	FN_RX2_B,	FN_DREQ2_A,
-+		0,		0,		0,		0,
-+		/* IP1_1 [1] */
-+		FN_A21,		FN_HSPI_CLK1_B,
-+		/* IP1_0 [1] */
-+		FN_A20,		FN_HSPI_CS1_B,
-+		}
-+	},
-+	{ PINMUX_CFG_REG_VAR("IPSR2", 0xfffc0028, 32,
-+			     1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
-+			     1, 1, 1, 1, 3, 2, 3, 3, 3, 3) {
-+		/* IP2_31 [1] */
-+		FN_MLB_CLK,	FN_IRQ3_A,
-+		/* IP2_30 [1] */
-+		FN_RD_WR_B,	FN_IRQ0,
-+		/* IP2_29 [1] */
-+		FN_D11,		0,
-+		/* IP2_28 [1] */
-+		FN_D10,		0,
-+		/* IP2_27 [1] */
-+		FN_D9,		0,
-+		/* IP2_26 [1] */
-+		FN_D8,		0,
-+		/* IP2_25 [1] */
-+		FN_D7,		0,
-+		/* IP2_24 [1] */
-+		FN_D6,		0,
-+		/* IP2_23 [1] */
-+		FN_D5,		0,
-+		/* IP2_22 [1] */
-+		FN_D4,		0,
-+		/* IP2_21 [1] */
-+		FN_D3,		0,
-+		/* IP2_20 [1] */
-+		FN_D2,		0,
-+		/* IP2_19 [1] */
-+		FN_D1,		0,
-+		/* IP2_18 [1] */
-+		FN_D0,		0,
-+		/* IP2_17 [1] */
-+		FN_EX_WAIT0,	FN_PWM0_C,
-+		/* IP2_16_14 [3] */
-+		FN_DACK0,	0,	0,	FN_TX3_A,
-+		FN_DRACK0,	0,	0,	0,
-+		/* IP2_13_12 [2] */
-+		FN_DREQ0_A,	0,	0,	FN_RX3_A,
-+		/* IP2_11_9 [3] */
-+		FN_SD1_DAT1_A,	FN_MMC_D1,	0,	FN_ATAWR0_A,
-+		FN_EX_CS5,	FN_EX_WAIT2_A,	0,	0,
-+		/* IP2_8_6 [3] */
-+		FN_SD1_DAT0_A,	FN_MMC_D0,	0,	FN_ATARD0,
-+		FN_EX_CS4,	FN_EX_WAIT1_A,	0,	0,
-+		/* IP2_5_3 [3] */
-+		FN_SD1_CMD_A,	FN_MMC_CMD,	0,	FN_ATACS10,
-+		FN_EX_CS3,	0,		0,	0,
-+		/* IP2_2_0 [3] */
-+		FN_SD1_CLK_A,	FN_MMC_CLK,	0,	FN_ATACS00,
-+		FN_EX_CS2,	0,		0,	0,
-+		}
-+	},
-+	{ PINMUX_CFG_REG_VAR("IPSR3", 0xfffc002c, 32,
-+			     1, 1, 1, 1, 1, 3, 3, 2,
-+			     3, 3, 3, 2, 3, 3, 2) {
-+		/* IP3_31 [1] */
-+		FN_DU0_DR6,	FN_LCDOUT6,
-+		/* IP3_30 [1] */
-+		FN_DU0_DR5,	FN_LCDOUT5,
-+		/* IP3_29 [1] */
-+		FN_DU0_DR4,	FN_LCDOUT4,
-+		/* IP3_28 [1] */
-+		FN_DU0_DR3,	FN_LCDOUT3,
-+		/* IP3_27 [1] */
-+		FN_DU0_DR2,	FN_LCDOUT2,
-+		/* IP3_26_24 [3] */
-+		FN_SSI_WS4,		FN_DU0_DR1,	FN_LCDOUT1,	FN_AUDATA3,
-+		FN_ARM_TRACEDATA_3,	FN_SCL3_C,	FN_ADICHS2,	FN_TS_SPSYNC0_B,
-+		/* IP3_23_21 [3] */
-+		FN_SSI_SCK4,		FN_DU0_DR0,	FN_LCDOUT0,	FN_AUDATA2,
-+		FN_ARM_TRACEDATA_2,	FN_SDA3_C,	FN_ADICHS1,	FN_TS_SDEN0_B,
-+		/* IP3_20_19 [2] */
-+		FN_SD1_DAT3_B,	FN_HRTS0_A,	FN_RTS0,	0,
-+		/* IP3_18_16 [3] */
-+		FN_SD1_DAT2_B,	FN_HCTS0_A,	FN_CTS0,	0,
-+		0,		0,		0,		0,
-+		/* IP3_15_13 [3] */
-+		FN_SD1_DAT1_B,	FN_HSCK0,	FN_SCK0,	FN_SCL3_B,
-+		0,		0,		0,		0,
-+		/* IP3_12_10 [3] */
-+		FN_SD1_DAT0_B,	FN_HRX0_A,	FN_RX0_A,	0,
-+		0,		0,		0,		0,
-+		/* IP3_9_8 [2] */
-+		FN_SD1_CLK_B,	FN_HTX0_A,	FN_TX0_A,	0,
-+		/* IP3_7_5 [3] */
-+		FN_SD1_CMD_B,	FN_SCIF_CLK,	FN_AUDIO_CLKOUT_B,	FN_CAN_CLK_B,
-+		FN_SDA3_B,	0,		0,			0,
-+		/* IP3_4_2 [3] */
-+		FN_MLB_DAT,	FN_TX5_B,	FN_SCL3_A,	FN_IRQ3_A,
-+		FN_SDSELF_B,	0,		0,		0,
-+		/* IP3_1_0 [2] */
-+		FN_MLB_SIG,	FN_RX5_B,	FN_SDA3_A,	FN_IRQ2_A,
-+		}
-+	},
-+	{ PINMUX_CFG_REG_VAR("IPSR4", 0xfffc0030, 32,
-+			     1, 2, 2, 2, 4, 4, 2, 2, 2, 2, 1, 1, 3, 3, 1) {
-+		/* IP4_31 [1] */
-+		0,	0,
-+		/* IP4_30_29 [2] */
-+		FN_VI0_R4_B,	FN_DU0_DB4,	FN_LCDOUT20,	0,
-+		/* IP4_28_27 [2] */
-+		FN_VI0_R3_B,	FN_DU0_DB3,	FN_LCDOUT19,	0,
-+		/* IP4_26_25 [2] */
-+		FN_VI0_R2_B,	FN_DU0_DB2,	FN_LCDOUT18,	0,
-+		/* IP4_24_21 [4] */
-+		FN_AUDIO_CLKC,	FN_VI0_R1_B,		FN_DU0_DB1,	FN_LCDOUT17,
-+		FN_AUDATA7,	FN_ARM_TRACEDATA_7,	FN_GPSIN_A,	0,
-+		FN_ADICS_SAMP,	FN_TS_SCK0_B,		0,		0,
-+		0,		0,			0,		0,
-+		/* IP4_20_17 [4] */
-+		FN_SSI_SCK2_B,	FN_VI0_R0_B,		FN_DU0_DB0,	FN_LCDOUT16,
-+		FN_AUDATA6,	FN_ARM_TRACEDATA_6,	FN_GPSCLK_A,	FN_PWM0_A,
-+		FN_ADICLK,	FN_TS_SDAT0_B,		0,		0,
-+		0,		0,			0,		0,
-+		/* IP4_16_15 [2] */
-+		FN_DU0_DG7,	FN_LCDOUT15,	FN_TX4_A,	0,
-+		/* IP4_14_13 [2] */
-+		FN_DU0_DG6,	FN_LCDOUT14,	FN_RX4_A,	0,
-+		/* IP4_12_11 [2] */
-+		FN_DU0_DG5,	FN_LCDOUT13,	FN_TX0_B,	0,
-+		/* IP4_10_9 [2] */
-+		FN_DU0_DG4,	FN_LCDOUT12,	FN_RX0_B,	0,
-+		/* IP4_8 [1] */
-+		FN_DU0_DG3,	FN_LCDOUT11,
-+		/* IP4_7 [1] */
-+		FN_DU0_DG2,	FN_LCDOUT10,
-+		/* IP4_6_4 [3] */
-+		FN_DU0_DG1,	FN_LCDOUT9,	FN_AUDATA5,	FN_ARM_TRACEDATA_5,
-+		FN_RX1_D,	FN_CAN0_RX_A,	FN_ADIDATA,	0,
-+		/* IP4_3_1 [3] */
-+		FN_DU0_DG0,	FN_LCDOUT8,	FN_AUDATA4,	FN_ARM_TRACEDATA_4,
-+		FN_TX1_D,	FN_CAN0_TX_A,	FN_ADICHS0,	0,
-+		/* IP4_0 [1] */
-+		FN_DU0_DR7,	FN_LCDOUT7,
-+		}
-+	},
-+	{ PINMUX_CFG_REG_VAR("IPSR5", 0xfffc0034, 32,
-+			     1, 2, 3, 3, 2, 3, 3, 2, 1, 2, 2, 1, 1, 2, 2, 2) {
-+
-+		/* IP5_31 [1] */
-+		0, 0,
-+		/* IP5_30_29 [2] */
-+		FN_SSI_SDATA7,	FN_HSPI_TX0_B,	FN_RX2_A,	FN_CAN0_RX_B,
-+		/* IP5_28_26 [3] */
-+		FN_SSI_SDATA8,	FN_SSI_SCK2_A,	FN_HSPI_CS0_B,	FN_TX2_A,
-+		FN_CAN0_TX_B,	0,		0,		0,
-+		/* IP5_25_23 [3] */
-+		FN_SD1_WP_B,	FN_SSI_WS78,	FN_HSPI_CLK0_B,	FN_RX1_B,
-+		FN_CAN_CLK_D,	0,		0,		0,
-+		/* IP5_22_21 [2] */
-+		FN_SD1_CD_B,	FN_SSI_SCK78,	FN_HSPI_RX0_B,	FN_TX1_B,
-+		/* IP5_20_18 [3] */
-+		FN_SSI_WS1_A,		FN_DU0_CDE,	FN_QPOLB,	FN_AUDSYNC,
-+		FN_ARM_TRACECTL,	FN_FMIN_D,	0,		0,
-+		/* IP5_17_15 [3] */
-+		FN_SSI_SCK1_A,		FN_DU0_DISP,	FN_QPOLA,	FN_AUDCK,
-+		FN_ARM_TRACECLK,	FN_BPFCLK_D,	0,		0,
-+		/* IP5_14_13 [2] */
-+		FN_DU0_EXODDF_DU0_ODDF_DISP_CDE,	FN_QCPV_QDE,
-+		FN_FMCLK_D,				0,
-+		/* IP5_12 [1] */
-+		FN_DU0_EXVSYNC_DU0_VSYNC,	FN_QSTB_QHE,
-+		/* IP5_11_10 [2] */
-+		FN_SSI_WS2_B,	FN_DU0_EXHSYNC_DU0_HSYNC,
-+		FN_QSTH_QHS,	0,
-+		/* IP5_9_8 [2] */
-+		FN_DU0_DOTCLKO_UT1,	FN_QSTVB_QVE,
-+		FN_AUDIO_CLKOUT_A,	FN_REMOCON_C,
-+		/* IP5_7 [1] */
-+		FN_DU0_DOTCLKO_UT0,	FN_QCLK,
-+		/* IP5_6 [1] */
-+		FN_DU0_DOTCLKIN,	FN_QSTVA_QVS,
-+		/* IP5_5_4 [2] */
-+		FN_VI1_DATA11_B,	FN_DU0_DB7,	FN_LCDOUT23,	0,
-+		/* IP5_3_2 [2] */
-+		FN_VI1_DATA10_B,	FN_DU0_DB6,	FN_LCDOUT22,	0,
-+		/* IP5_1_0 [2] */
-+		FN_VI0_R5_B,		FN_DU0_DB5,	FN_LCDOUT21,	0,
-+		}
-+	},
-+	{ PINMUX_CFG_REG_VAR("IPSR6", 0xfffc0038, 32,
-+			     2, 2, 2, 2, 2, 1, 2, 2, 1, 2,
-+			     1, 2, 1, 1, 1, 1, 2, 3, 2) {
-+		/* IP6_31_30 [2] */
-+		FN_SD0_DAT2,	0,	FN_SUB_TDI,	0,
-+		/* IP6_29_28 [2] */
-+		FN_SD0_DAT1,	0,	FN_SUB_TCK,	0,
-+		/* IP6_27_26 [2] */
-+		FN_SD0_DAT0,	0,	FN_SUB_TMS,	0,
-+		/* IP6_25_24 [2] */
-+		FN_SD0_CMD,	0,	FN_SUB_TRST,	0,
-+		/* IP6_23_22 [2] */
-+		FN_SD0_CLK,	0,	FN_SUB_TDO,	0,
-+		/* IP6_21 [1] */
-+		FN_SSI_SDATA0,		FN_ARM_TRACEDATA_15,
-+		/* IP6_20_19 [2] */
-+		FN_SSI_SDATA1,		FN_ARM_TRACEDATA_14,
-+		FN_SCL1_A,		FN_SCK2_A,
-+		/* IP6_18_17 [2] */
-+		FN_SSI_SDATA2,		FN_HSPI_CS2_A,
-+		FN_ARM_TRACEDATA_13,	FN_SDA1_A,
-+		/* IP6_16 [1] */
-+		FN_SSI_WS012,		FN_ARM_TRACEDATA_12,
-+		/* IP6_15_14 [2] */
-+		FN_SSI_SCK012,		FN_ARM_TRACEDATA_11,
-+		FN_TX0_D,		0,
-+		/* IP6_13 [1] */
-+		FN_SSI_SDATA3,		FN_ARM_TRACEDATA_10,
-+		/* IP6_12_11 [2] */
-+		FN_SSI_SDATA4,		FN_SSI_WS2_A,
-+		FN_ARM_TRACEDATA_9,	0,
-+		/* IP6_10 [1] */
-+		FN_SSI_WS34,		FN_ARM_TRACEDATA_8,
-+		/* IP6_9 [1] */
-+		FN_SSI_SDATA5,		FN_RX0_D,
-+		/* IP6_8 [1] */
-+		FN_SSI_WS5,		FN_TX4_C,
-+		/* IP6_7 [1] */
-+		FN_SSI_SCK5,		FN_RX4_C,
-+		/* IP6_6_5 [2] */
-+		FN_SSI_SDATA6,		FN_HSPI_TX2_A,
-+		FN_FMIN_B,		0,
-+		/* IP6_4_2 [3] */
-+		FN_SSI_WS6,		FN_HSPI_CLK2_A,
-+		FN_BPFCLK_B,		FN_CAN1_RX_B,
-+		0,	0,	0,	0,
-+		/* IP6_1_0 [2] */
-+		FN_SSI_SCK6,		FN_HSPI_RX2_A,
-+		FN_FMCLK_B,		FN_CAN1_TX_B,
-+		}
-+	},
-+	{ PINMUX_CFG_REG_VAR("IPSR7", 0xfffc003c, 32,
-+			     3, 4, 3, 1, 3, 3, 3, 3, 3, 2, 2, 2) {
-+
-+		/* IP7_31_29 [3] */
-+		FN_VI0_HSYNC,	FN_SD2_CD_B,	FN_VI1_DATA2,	FN_DU1_DR2,
-+		0,		FN_HSPI_CS1_A,	FN_RX3_B,	0,
-+		/* IP7_28_25 [4] */
-+		FN_VI0_FIELD,	FN_SD2_DAT3_B,	FN_VI0_R3_C,	FN_VI1_DATA1,
-+		FN_DU1_DG7,	0,		FN_HSPI_CLK1_A,	FN_TX4_B,
-+		0,	0,	0,	0,
-+		0,	0,	0,	0,
-+		/* IP7_24_22 [3] */
-+		FN_VI0_CLKENB,	FN_SD2_DAT2_B,	FN_VI1_DATA0,	FN_DU1_DG6,
-+		0,		FN_HSPI_RX1_A,	FN_RX4_B,	0,
-+		/* IP7_21 [1] */
-+		FN_VI0_CLK,	FN_CAN_CLK_A,
-+		/* IP7_20_18 [3] */
-+		FN_TCLK0,	FN_HSCK1_A,	FN_FMIN_A,	0,
-+		FN_IRQ2_C,	FN_CTS1_C,	FN_SPEEDIN,	0,
-+		/* IP7_17_15 [3] */
-+		FN_VI1_VSYNC,	FN_HSPI_TX0,	FN_HCTS1_A,	FN_BPFCLK_A,
-+		0,		FN_TX1_C,	0,		0,
-+		/* IP7_14_12 [3] */
-+		FN_VI1_HSYNC,	FN_HSPI_RX0_A,	FN_HRTS1_A,	FN_FMCLK_A,
-+		0,		FN_RX1_C,	0,		0,
-+		/* IP7_11_9 [3] */
-+		FN_VI1_FIELD,	FN_HSPI_CS0_A,	FN_HRX1_A,	0,
-+		FN_SCK1_C,	0,		0,		0,
-+		/* IP7_8_6 [3] */
-+		FN_VI1_CLKENB,	FN_HSPI_CLK0_A,	FN_HTX1_A,	0,
-+		FN_RTS1_C,	0,		0,		0,
-+		/* IP7_5_4 [2] */
-+		FN_SD0_WP,	0,		FN_RX5_A,	0,
-+		/* IP7_3_2 [2] */
-+		FN_SD0_CD,	0,		FN_TX5_A,	0,
-+		/* IP7_1_0 [2] */
-+		FN_SD0_DAT3,	0,		FN_IRQ1_B,	0,
-+		}
-+	},
-+	{ PINMUX_CFG_REG_VAR("IPSR8", 0xfffc0040, 32,
-+			     1, 1, 3, 3, 2, 3, 3, 2, 3, 2, 3, 3, 3) {
-+		/* IP8_31 [1] */
-+		0, 0,
-+		/* IP8_30 [1] */
-+		0, 0,
-+		/* IP8_29_27 [3] */
-+		FN_VI0_G3,	FN_SD2_CMD_B,	FN_VI1_DATA5,	FN_DU1_DR5,
-+		0,		FN_HRX1_B,	0,		0,
-+		/* IP8_26_24 [3] */
-+		FN_VI0_G2,	FN_SD2_CLK_B,	FN_VI1_DATA4,	FN_DU1_DR4,
-+		0,		FN_HTX1_B,	0,		0,
-+		/* IP8_23_22 [2] */
-+		FN_VI0_DATA7_VI0_G1,	FN_DU1_DB5,
-+		FN_RTS1_A,		0,
-+		/* IP8_21_19 [3] */
-+		FN_VI0_DATA6_VI0_G0,	FN_DU1_DB4,
-+		FN_CTS1_A,		FN_PWM5,
-+		0,	0,	0,	0,
-+		/* IP8_18_16 [3] */
-+		FN_VI0_DATA5_VI0_B5,	FN_DU1_DB3,	FN_SCK1_A,	FN_PWM4,
-+		0,			FN_HSCK1_B,	0,		0,
-+		/* IP8_15_14 [2] */
-+		FN_VI0_DATA4_VI0_B4,	FN_DU1_DB2,	FN_RX1_A,	0,
-+		/* IP8_13_11 [3] */
-+		FN_VI0_DATA3_VI0_B3,	FN_DU1_DG5,	FN_TX1_A,	FN_TX0_C,
-+		0,			 0,		0,		0,
-+		/* IP8_10_9 [2] */
-+		FN_VI0_DATA2_VI0_B2,	FN_DU1_DG4,	FN_RX0_C,	0,
-+		/* IP8_8_6 [3] */
-+		FN_VI0_DATA1_VI0_B1,	FN_DU1_DG3,	FN_IRQ3_B,	FN_TX3_D,
-+		0,			 0,		0,		0,
-+		/* IP8_5_3 [3] */
-+		FN_VI0_DATA0_VI0_B0,	FN_DU1_DG2,	FN_IRQ2_B,	FN_RX3_D,
-+		0,			 0,		0,		0,
-+		/* IP8_2_0 [3] */
-+		FN_VI0_VSYNC,		FN_SD2_WP_B,	FN_VI1_DATA3,	FN_DU1_DR3,
-+		0,			FN_HSPI_TX1_A,	FN_TX3_B,	0,
-+		}
-+	},
-+	{ PINMUX_CFG_REG_VAR("IPSR9", 0xfffc0044, 32,
-+			     1, 1, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3) {
-+		/* IP9_31 [1] */
-+		0, 0,
-+		/* IP9_30 [1] */
-+		0, 0,
-+		/* IP9_29_27 [3] */
-+		FN_VI1_DATA11_A,	FN_DU1_EXHSYNC_DU1_HSYNC,
-+		FN_ETH_RXD1,		FN_FMIN_C,
-+		0,			FN_RX2_D,
-+		FN_SCL2_C,		0,
-+		/* IP9_26_24 [3] */
-+		FN_VI1_DATA10_A,	FN_DU1_DOTCLKOUT,
-+		FN_ETH_RXD0,		FN_BPFCLK_C,
-+		0,			FN_TX2_D,
-+		FN_SDA2_C,		0,
-+		/* IP9_23_21 [3] */
-+		FN_VI0_R5_A,	0,		FN_ETH_RX_ER,	FN_FMCLK_C,
-+		FN_IERX,	FN_RX2_C,	0,		0,
-+		/* IP9_20_18 [3] */
-+		FN_VI0_R4_A,	FN_ETH_TX_EN,	0,		0,
-+		FN_IETX,	FN_TX2_C,	0,		0,
-+		/* IP9_17_15 [3] */
-+		FN_VI0_R3_A,	FN_ETH_CRS_DV,	0,		FN_IECLK,
-+		FN_SCK2_C,	0,		0,		0,
-+		/* IP9_14_12 [3] */
-+		FN_VI0_R2_A,	FN_VI1_DATA9,	FN_DU1_DB7,	FN_ETH_TXD1,
-+		0,		FN_PWM3,	0,		0,
-+		/* IP9_11_9 [3] */
-+		FN_VI0_R1_A,	FN_VI1_DATA8,	FN_DU1_DB6,	FN_ETH_TXD0,
-+		0,		FN_PWM2,	FN_TCLK1,	0,
-+		/* IP9_8_6 [3] */
-+		FN_VI0_R0_A,	FN_VI1_CLK,	FN_ETH_REF_CLK,	FN_DU1_DOTCLKIN,
-+		0,		0,		0,		0,
-+		/* IP9_5_3 [3] */
-+		FN_VI0_G5,	FN_SD2_DAT1_B,	FN_VI1_DATA7,	FN_DU1_DR7,
-+		0,		FN_HCTS1_B,	0,		0,
-+		/* IP9_2_0 [3] */
-+		FN_VI0_G4,	FN_SD2_DAT0_B,	FN_VI1_DATA6,	FN_DU1_DR6,
-+		0,		FN_HRTS1_B,	0,		0,
-+		}
-+	},
-+	{ PINMUX_CFG_REG_VAR("IPSR10", 0xfffc0048, 32,
-+			     1, 1, 1, 1, 1, 1, 1, 3, 3, 3, 3, 4, 3, 3, 3) {
-+
-+		/* IP10_31 [1] */
-+		0, 0,
-+		/* IP10_30 [1] */
-+		0, 0,
-+		/* IP10_29 [1] */
-+		0, 0,
-+		/* IP10_28 [1] */
-+		0, 0,
-+		/* IP10_27 [1] */
-+		0, 0,
-+		/* IP10_26 [1] */
-+		0, 0,
-+		/* IP10_25 [1] */
-+		0, 0,
-+		/* IP10_24_22 [3] */
-+		FN_SD2_WP_A,	FN_VI1_DATA15,	FN_EX_WAIT2_B,	FN_DACK0_B,
-+		FN_HSPI_TX2_B,	FN_CAN_CLK_C,	0,		0,
-+		/* IP10_21_19 [3] */
-+		FN_SD2_CD_A,	FN_VI1_DATA14,	FN_EX_WAIT1_B,	FN_DREQ0_B,
-+		FN_HSPI_RX2_B,	FN_REMOCON_A,	0,		0,
-+		/* IP10_18_16 [3] */
-+		FN_SD2_DAT3_A,	FN_VI1_DATA13,	FN_DACK2_B,	FN_ATAG1,
-+		FN_HSPI_CS2_B,	FN_GPSIN_B,	0,		0,
-+		/* IP10_15_13 [3] */
-+		FN_SD2_DAT2_A,	FN_VI1_DATA12,	FN_DREQ2_B,	FN_ATADIR1,
-+		FN_HSPI_CLK2_B,	FN_GPSCLK_B,	0,		0,
-+		/* IP10_12_9 [4] */
-+		FN_SD2_DAT1_A,	FN_DU1_CDE,	FN_ATACS11,	FN_DACK1_B,
-+		FN_ETH_MAGIC,	FN_CAN1_TX_A,	0,		FN_PWM6,
-+		0, 0, 0, 0,
-+		0, 0, 0, 0,
-+		/* IP10_8_6 [3] */
-+		FN_SD2_DAT0_A,	FN_DU1_DISP,	FN_ATACS01,	FN_DREQ1_B,
-+		FN_ETH_LINK,	FN_CAN1_RX_A,	0,		0,
-+		/* IP10_5_3 [3] */
-+		FN_SD2_CMD_A,	FN_DU1_EXODDF_DU1_ODDF_DISP_CDE,
-+		FN_ATAWR1,	FN_ETH_MDIO,
-+		FN_SCL1_B,	0,
-+		0,		0,
-+		/* IP10_2_0 [3] */
-+		FN_SD2_CLK_A,	FN_DU1_EXVSYNC_DU1_VSYNC,
-+		FN_ATARD1,	FN_ETH_MDC,
-+		FN_SDA1_B,	0,
-+		0,		0,
-+		}
-+	},
-+	{ PINMUX_CFG_REG_VAR("MOD_SEL0", 0xfffc0050, 32,
-+			     1, 1, 2, 2, 3, 2, 2, 1, 1, 1, 1, 2,
-+			     1, 1, 1, 1, 2, 1, 1, 1, 1, 1, 1, 1) {
-+
-+		/* SEL 31  [1] */
-+		0, 0,
-+		/* SEL_30 (SCIF5) [1] */
-+		FN_SEL_SCIF5_A,		FN_SEL_SCIF5_B,
-+		/* SEL_29_28 (SCIF4) [2] */
-+		FN_SEL_SCIF4_A,		FN_SEL_SCIF4_B,
-+		FN_SEL_SCIF4_C,		0,
-+		/* SEL_27_26 (SCIF3) [2] */
-+		FN_SEL_SCIF3_A,		FN_SEL_SCIF3_B,
-+		FN_SEL_SCIF3_C,		FN_SEL_SCIF3_D,
-+		/* SEL_25_23 (SCIF2) [3] */
-+		FN_SEL_SCIF2_A,		FN_SEL_SCIF2_B,
-+		FN_SEL_SCIF2_C,		FN_SEL_SCIF2_D,
-+		FN_SEL_SCIF2_E,		0,
-+		0,			0,
-+		/* SEL_22_21 (SCIF1) [2] */
-+		FN_SEL_SCIF1_A,		FN_SEL_SCIF1_B,
-+		FN_SEL_SCIF1_C,		FN_SEL_SCIF1_D,
-+		/* SEL_20_19 (SCIF0) [2] */
-+		FN_SEL_SCIF0_A,		FN_SEL_SCIF0_B,
-+		FN_SEL_SCIF0_C,		FN_SEL_SCIF0_D,
-+		/* SEL_18 [1] */
-+		0, 0,
-+		/* SEL_17 (SSI2) [1] */
-+		FN_SEL_SSI2_A,		FN_SEL_SSI2_B,
-+		/* SEL_16 (SSI1) [1] */
-+		FN_SEL_SSI1_A,		FN_SEL_SSI1_B,
-+		/* SEL_15 (VI1) [1] */
-+		FN_SEL_VI1_A,		FN_SEL_VI1_B,
-+		/* SEL_14_13 (VI0) [2] */
-+		FN_SEL_VI0_A,		FN_SEL_VI0_B,
-+		FN_SEL_VI0_C,		FN_SEL_VI0_D,
-+		/* SEL_12 [1] */
-+		0, 0,
-+		/* SEL_11 (SD2) [1] */
-+		FN_SEL_SD2_A,		FN_SEL_SD2_B,
-+		/* SEL_10 (SD1) [1] */
-+		FN_SEL_SD1_A,		FN_SEL_SD1_B,
-+		/* SEL_9 (IRQ3) [1] */
-+		FN_SEL_IRQ3_A,		FN_SEL_IRQ3_B,
-+		/* SEL_8_7 (IRQ2) [2] */
-+		FN_SEL_IRQ2_A,		FN_SEL_IRQ2_B,
-+		FN_SEL_IRQ2_C,		0,
-+		/* SEL_6 (IRQ1) [1] */
-+		FN_SEL_IRQ1_A,		FN_SEL_IRQ1_B,
-+		/* SEL_5 [1] */
-+		0, 0,
-+		/* SEL_4 (DREQ2) [1] */
-+		FN_SEL_DREQ2_A,		FN_SEL_DREQ2_B,
-+		/* SEL_3 (DREQ1) [1] */
-+		FN_SEL_DREQ1_A,		FN_SEL_DREQ1_B,
-+		/* SEL_2 (DREQ0) [1] */
-+		FN_SEL_DREQ0_A,		FN_SEL_DREQ0_B,
-+		/* SEL_1 (WAIT2) [1] */
-+		FN_SEL_WAIT2_A,		FN_SEL_WAIT2_B,
-+		/* SEL_0 (WAIT1) [1] */
-+		FN_SEL_WAIT1_A,		FN_SEL_WAIT1_B,
-+		}
-+	},
-+	{ PINMUX_CFG_REG_VAR("MOD_SEL1", 0xfffc0054, 32,
-+			     1, 1, 1, 1, 1, 1, 2, 1, 1, 1, 1, 1, 1,
-+			     1, 1, 1, 2, 2, 2, 1, 1, 1, 1, 2, 2, 1) {
-+
-+		/* SEL_31 [1] */
-+		0, 0,
-+		/* SEL_30 [1] */
-+		0, 0,
-+		/* SEL_29 [1] */
-+		0, 0,
-+		/* SEL_28 [1] */
-+		0, 0,
-+		/* SEL_27 (CAN1) [1] */
-+		FN_SEL_CAN1_A,		FN_SEL_CAN1_B,
-+		/* SEL_26 (CAN0) [1] */
-+		FN_SEL_CAN0_A,		FN_SEL_CAN0_B,
-+		/* SEL_25_24 (CANCLK) [2] */
-+		FN_SEL_CANCLK_A,	FN_SEL_CANCLK_B,
-+		FN_SEL_CANCLK_C,	FN_SEL_CANCLK_D,
-+		/* SEL_23 (HSCIF1) [1] */
-+		FN_SEL_HSCIF1_A,	FN_SEL_HSCIF1_B,
-+		/* SEL_22 (HSCIF0) [1] */
-+		FN_SEL_HSCIF0_A,	FN_SEL_HSCIF0_B,
-+		/* SEL_21 [1] */
-+		0, 0,
-+		/* SEL_20 [1] */
-+		0, 0,
-+		/* SEL_19 [1] */
-+		0, 0,
-+		/* SEL_18 [1] */
-+		0, 0,
-+		/* SEL_17 [1] */
-+		0, 0,
-+		/* SEL_16 [1] */
-+		0, 0,
-+		/* SEL_15 [1] */
-+		0, 0,
-+		/* SEL_14_13 (REMOCON) [2] */
-+		FN_SEL_REMOCON_A,	FN_SEL_REMOCON_B,
-+		FN_SEL_REMOCON_C,	0,
-+		/* SEL_12_11 (FM) [2] */
-+		FN_SEL_FM_A,		FN_SEL_FM_B,
-+		FN_SEL_FM_C,		FN_SEL_FM_D,
-+		/* SEL_10_9 (GPS) [2] */
-+		FN_SEL_GPS_A,		FN_SEL_GPS_B,
-+		FN_SEL_GPS_C,		0,
-+		/* SEL_8 (TSIF0) [1] */
-+		FN_SEL_TSIF0_A,		FN_SEL_TSIF0_B,
-+		/* SEL_7 (HSPI2) [1] */
-+		FN_SEL_HSPI2_A,		FN_SEL_HSPI2_B,
-+		/* SEL_6 (HSPI1) [1] */
-+		FN_SEL_HSPI1_A,		FN_SEL_HSPI1_B,
-+		/* SEL_5 (HSPI0) [1] */
-+		FN_SEL_HSPI0_A,		FN_SEL_HSPI0_B,
-+		/* SEL_4_3 (I2C3) [2] */
-+		FN_SEL_I2C3_A,		FN_SEL_I2C3_B,
-+		FN_SEL_I2C3_C,		0,
-+		/* SEL_2_1 (I2C2) [2] */
-+		FN_SEL_I2C2_A,		FN_SEL_I2C2_B,
-+		FN_SEL_I2C2_C,		0,
-+		/* SEL_0 (I2C1) [1] */
-+		FN_SEL_I2C1_A,		FN_SEL_I2C1_B,
-+		}
-+	},
-+	{ },
-+};
-+
-+const struct sh_pfc_soc_info r8a7778_pinmux_info = {
-+	.name = "r8a7778_pfc",
-+
-+	.unlock_reg = 0xfffc0000, /* PMMR */
-+
-+	.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
-+
-+	.pins = pinmux_pins,
-+	.nr_pins = ARRAY_SIZE(pinmux_pins),
-+
-+	.groups = pinmux_groups,
-+	.nr_groups = ARRAY_SIZE(pinmux_groups),
-+
-+	.functions = pinmux_functions,
-+	.nr_functions = ARRAY_SIZE(pinmux_functions),
-+
-+	.cfg_regs = pinmux_config_regs,
-+
-+	.gpio_data = pinmux_data,
-+	.gpio_data_size = ARRAY_SIZE(pinmux_data),
-+};
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0092-ARM-shmobile-r8a7791-Add-DU-and-LVDS-clocks.patch b/patches.renesas/0092-ARM-shmobile-r8a7791-Add-DU-and-LVDS-clocks.patch
deleted file mode 100644
index eb822395a1fb5..0000000000000
--- a/patches.renesas/0092-ARM-shmobile-r8a7791-Add-DU-and-LVDS-clocks.patch
+++ /dev/null
@@ -1,65 +0,0 @@
-From 31254618a94942b471b7c6fdb796f19a7e2089da Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 13 Nov 2013 14:01:42 +0100
-Subject: ARM: shmobile: r8a7791: Add DU and LVDS clocks
-
-The ZX parent clock isn't implemented yet, add it as well.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit cf4f85ccd5c235123a8a1827d2265da5c33a1bb0)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r8a7791.c | 10 +++++++++-
- 1 file changed, 9 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a7791.c b/arch/arm/mach-shmobile/clock-r8a7791.c
-index c9a26f16ce5b..fda7c6cb6921 100644
---- a/arch/arm/mach-shmobile/clock-r8a7791.c
-+++ b/arch/arm/mach-shmobile/clock-r8a7791.c
-@@ -103,6 +103,7 @@ SH_FIXED_RATIO_CLK_SET(hp_clk,			pll1_clk,	1, 12);
- SH_FIXED_RATIO_CLK_SET(p_clk,			pll1_clk,	1, 24);
- SH_FIXED_RATIO_CLK_SET(rclk_clk,		pll1_clk,	1, (48 * 1024));
- SH_FIXED_RATIO_CLK_SET(mp_clk,			pll1_div2_clk,	1, 15);
-+SH_FIXED_RATIO_CLK_SET(zx_clk,			pll1_clk,	1, 3);
- 
- static struct clk *main_clks[] = {
- 	&extal_clk,
-@@ -116,11 +117,12 @@ static struct clk *main_clks[] = {
- 	&rclk_clk,
- 	&mp_clk,
- 	&cp_clk,
-+	&zx_clk,
- };
- 
- /* MSTP */
- enum {
--	MSTP721, MSTP720,
-+	MSTP726, MSTP724, MSTP723, MSTP721, MSTP720,
- 	MSTP719, MSTP718, MSTP715, MSTP714,
- 	MSTP216, MSTP207, MSTP206,
- 	MSTP204, MSTP203, MSTP202, MSTP1105, MSTP1106, MSTP1107,
-@@ -129,6 +131,9 @@ enum {
- };
- 
- static struct clk mstp_clks[MSTP_NR] = {
-+	[MSTP726] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 26, 0), /* LVDS0 */
-+	[MSTP724] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 24, 0), /* DU0 */
-+	[MSTP723] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 23, 0), /* DU1 */
- 	[MSTP721] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 21, 0), /* SCIF0 */
- 	[MSTP720] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 20, 0), /* SCIF1 */
- 	[MSTP719] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 19, 0), /* SCIF2 */
-@@ -164,6 +169,9 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_CON_ID("peripheral_clk", &hp_clk),
- 
- 	/* MSTP */
-+	CLKDEV_ICK_ID("lvds.0", "rcar-du-r8a7791", &mstp_clks[MSTP726]),
-+	CLKDEV_ICK_ID("du.0", "rcar-du-r8a7791", &mstp_clks[MSTP724]),
-+	CLKDEV_ICK_ID("du.1", "rcar-du-r8a7791", &mstp_clks[MSTP723]),
- 	CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]), /* SCIFA0 */
- 	CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP203]), /* SCIFA1 */
- 	CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP206]), /* SCIFB0 */
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0092-ASoC-add-Renesas-R-Car-ADG-feature.patch b/patches.renesas/0092-ASoC-add-Renesas-R-Car-ADG-feature.patch
deleted file mode 100644
index 82d9a869f6884..0000000000000
--- a/patches.renesas/0092-ASoC-add-Renesas-R-Car-ADG-feature.patch
+++ /dev/null
@@ -1,428 +0,0 @@
-From 58a1d7f9db87ee18a2f6820efaab78efd184c741 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Sun, 21 Jul 2013 21:36:46 -0700
-Subject: ASoC: add Renesas R-Car ADG feature
-
-Renesas R-Car series sound circuit consists of SSI and its peripheral.
-But this peripheral circuit is different between
-R-Car Generation1 (E1/M1/H1) and Generation2 (E2/M2/H2)
-(Actually, there are many difference in Generation1 chips)
-
-This patch adds ADG feature which controls sound clock
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@linaro.org>
-(cherry picked from commit dfc9403b7c1f566bb099a12c58aee20589e390f1)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- include/sound/rcar_snd.h   |   4 +-
- sound/soc/sh/rcar/Makefile |   2 +-
- sound/soc/sh/rcar/adg.c    | 234 +++++++++++++++++++++++++++++++++++++++++++++
- sound/soc/sh/rcar/core.c   |   5 +
- sound/soc/sh/rcar/gen.c    |  20 +++-
- sound/soc/sh/rcar/rsnd.h   |  27 ++++++
- 6 files changed, 288 insertions(+), 4 deletions(-)
- create mode 100644 sound/soc/sh/rcar/adg.c
-
-diff --git a/include/sound/rcar_snd.h b/include/sound/rcar_snd.h
-index 01f2e453dcbf..6babd6f7b537 100644
---- a/include/sound/rcar_snd.h
-+++ b/include/sound/rcar_snd.h
-@@ -15,10 +15,12 @@
- #include <linux/sh_clk.h>
- 
- #define RSND_GEN1_SRU	0
-+#define RSND_GEN1_ADG	1
- 
- #define RSND_GEN2_SRU	0
-+#define RSND_GEN2_ADG	1
- 
--#define RSND_BASE_MAX	1
-+#define RSND_BASE_MAX	2
- 
- struct rsnd_scu_platform_info {
- 	u32 flags;
-diff --git a/sound/soc/sh/rcar/Makefile b/sound/soc/sh/rcar/Makefile
-index 112b2cfd793b..c11280cffcfe 100644
---- a/sound/soc/sh/rcar/Makefile
-+++ b/sound/soc/sh/rcar/Makefile
-@@ -1,2 +1,2 @@
--snd-soc-rcar-objs	:= core.o gen.o scu.o
-+snd-soc-rcar-objs	:= core.o gen.o scu.o adg.o
- obj-$(CONFIG_SND_SOC_RCAR)	+= snd-soc-rcar.o
-\ No newline at end of file
-diff --git a/sound/soc/sh/rcar/adg.c b/sound/soc/sh/rcar/adg.c
-new file mode 100644
-index 000000000000..d80deb7ccf13
---- /dev/null
-+++ b/sound/soc/sh/rcar/adg.c
-@@ -0,0 +1,234 @@
-+/*
-+ * Helper routines for R-Car sound ADG.
-+ *
-+ *  Copyright (C) 2013  Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-+ *
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License.  See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ */
-+#include <linux/sh_clk.h>
-+#include <mach/clock.h>
-+#include "rsnd.h"
-+
-+#define CLKA	0
-+#define CLKB	1
-+#define CLKC	2
-+#define CLKI	3
-+#define CLKMAX	4
-+
-+struct rsnd_adg {
-+	struct clk *clk[CLKMAX];
-+
-+	int rate_of_441khz_div_6;
-+	int rate_of_48khz_div_6;
-+};
-+
-+#define for_each_rsnd_clk(pos, adg, i)		\
-+	for (i = 0, (pos) = adg->clk[i];	\
-+	     i < CLKMAX;			\
-+	     i++, (pos) = adg->clk[i])
-+#define rsnd_priv_to_adg(priv) ((struct rsnd_adg *)(priv)->adg)
-+
-+static enum rsnd_reg rsnd_adg_ssi_reg_get(int id)
-+{
-+	enum rsnd_reg reg;
-+
-+	/*
-+	 * SSI 8 is not connected to ADG.
-+	 * it works with SSI 7
-+	 */
-+	if (id == 8)
-+		return RSND_REG_MAX;
-+
-+	if (0 <= id && id <= 3)
-+		reg = RSND_REG_AUDIO_CLK_SEL0;
-+	else if (4 <= id && id <= 7)
-+		reg = RSND_REG_AUDIO_CLK_SEL1;
-+	else
-+		reg = RSND_REG_AUDIO_CLK_SEL2;
-+
-+	return reg;
-+}
-+
-+int rsnd_adg_ssi_clk_stop(struct rsnd_mod *mod)
-+{
-+	struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
-+	enum rsnd_reg reg;
-+	int id;
-+
-+	/*
-+	 * "mod" = "ssi" here.
-+	 * we can get "ssi id" from mod
-+	 */
-+	id  = rsnd_mod_id(mod);
-+	reg = rsnd_adg_ssi_reg_get(id);
-+
-+	rsnd_write(priv, mod, reg, 0);
-+
-+	return 0;
-+}
-+
-+int rsnd_adg_ssi_clk_try_start(struct rsnd_mod *mod, unsigned int rate)
-+{
-+	struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
-+	struct rsnd_adg *adg = rsnd_priv_to_adg(priv);
-+	struct device *dev = rsnd_priv_to_dev(priv);
-+	struct clk *clk;
-+	enum rsnd_reg reg;
-+	int id, shift, i;
-+	u32 data;
-+	int sel_table[] = {
-+		[CLKA] = 0x1,
-+		[CLKB] = 0x2,
-+		[CLKC] = 0x3,
-+		[CLKI] = 0x0,
-+	};
-+
-+	dev_dbg(dev, "request clock = %d\n", rate);
-+
-+	/*
-+	 * find suitable clock from
-+	 * AUDIO_CLKA/AUDIO_CLKB/AUDIO_CLKC/AUDIO_CLKI.
-+	 */
-+	data = 0;
-+	for_each_rsnd_clk(clk, adg, i) {
-+		if (rate == clk_get_rate(clk)) {
-+			data = sel_table[i];
-+			goto found_clock;
-+		}
-+	}
-+
-+	/*
-+	 * find 1/6 clock from BRGA/BRGB
-+	 */
-+	if (rate == adg->rate_of_441khz_div_6) {
-+		data = 0x10;
-+		goto found_clock;
-+	}
-+
-+	if (rate == adg->rate_of_48khz_div_6) {
-+		data = 0x20;
-+		goto found_clock;
-+	}
-+
-+	return -EIO;
-+
-+found_clock:
-+
-+	/*
-+	 * This "mod" = "ssi" here.
-+	 * we can get "ssi id" from mod
-+	 */
-+	id  = rsnd_mod_id(mod);
-+	reg = rsnd_adg_ssi_reg_get(id);
-+
-+	dev_dbg(dev, "ADG: ssi%d selects clk%d = %d", id, i, rate);
-+
-+	/*
-+	 * Enable SSIx clock
-+	 */
-+	shift = (id % 4) * 8;
-+
-+	rsnd_bset(priv, mod, reg,
-+		   0xFF << shift,
-+		   data << shift);
-+
-+	return 0;
-+}
-+
-+static void rsnd_adg_ssi_clk_init(struct rsnd_priv *priv, struct rsnd_adg *adg)
-+{
-+	struct clk *clk;
-+	unsigned long rate;
-+	u32 ckr;
-+	int i;
-+	int brg_table[] = {
-+		[CLKA] = 0x0,
-+		[CLKB] = 0x1,
-+		[CLKC] = 0x4,
-+		[CLKI] = 0x2,
-+	};
-+
-+	/*
-+	 * This driver is assuming that AUDIO_CLKA/AUDIO_CLKB/AUDIO_CLKC
-+	 * have 44.1kHz or 48kHz base clocks for now.
-+	 *
-+	 * SSI itself can divide parent clock by 1/1 - 1/16
-+	 * So,  BRGA outputs 44.1kHz base parent clock 1/32,
-+	 * and, BRGB outputs 48.0kHz base parent clock 1/32 here.
-+	 * see
-+	 *	rsnd_adg_ssi_clk_try_start()
-+	 */
-+	ckr = 0;
-+	adg->rate_of_441khz_div_6 = 0;
-+	adg->rate_of_48khz_div_6  = 0;
-+	for_each_rsnd_clk(clk, adg, i) {
-+		rate = clk_get_rate(clk);
-+
-+		if (0 == rate) /* not used */
-+			continue;
-+
-+		/* RBGA */
-+		if (!adg->rate_of_441khz_div_6 && (0 == rate % 44100)) {
-+			adg->rate_of_441khz_div_6 = rate / 6;
-+			ckr |= brg_table[i] << 20;
-+		}
-+
-+		/* RBGB */
-+		if (!adg->rate_of_48khz_div_6 && (0 == rate % 48000)) {
-+			adg->rate_of_48khz_div_6 = rate / 6;
-+			ckr |= brg_table[i] << 16;
-+		}
-+	}
-+
-+	rsnd_priv_bset(priv, SSICKR, 0x00FF0000, ckr);
-+	rsnd_priv_write(priv, BRRA,  0x00000002); /* 1/6 */
-+	rsnd_priv_write(priv, BRRB,  0x00000002); /* 1/6 */
-+}
-+
-+int rsnd_adg_probe(struct platform_device *pdev,
-+		   struct rcar_snd_info *info,
-+		   struct rsnd_priv *priv)
-+{
-+	struct rsnd_adg *adg;
-+	struct device *dev = rsnd_priv_to_dev(priv);
-+	struct clk *clk;
-+	int i;
-+
-+	adg = devm_kzalloc(dev, sizeof(*adg), GFP_KERNEL);
-+	if (!adg) {
-+		dev_err(dev, "ADG allocate failed\n");
-+		return -ENOMEM;
-+	}
-+
-+	adg->clk[CLKA] = clk_get(NULL, "audio_clk_a");
-+	adg->clk[CLKB] = clk_get(NULL, "audio_clk_b");
-+	adg->clk[CLKC] = clk_get(NULL, "audio_clk_c");
-+	adg->clk[CLKI] = clk_get(NULL, "audio_clk_internal");
-+	for_each_rsnd_clk(clk, adg, i) {
-+		if (IS_ERR(clk)) {
-+			dev_err(dev, "Audio clock failed\n");
-+			return -EIO;
-+		}
-+	}
-+
-+	rsnd_adg_ssi_clk_init(priv, adg);
-+
-+	priv->adg = adg;
-+
-+	dev_dbg(dev, "adg probed\n");
-+
-+	return 0;
-+}
-+
-+void rsnd_adg_remove(struct platform_device *pdev,
-+		     struct rsnd_priv *priv)
-+{
-+	struct rsnd_adg *adg = priv->adg;
-+	struct clk *clk;
-+	int i;
-+
-+	for_each_rsnd_clk(clk, adg, i)
-+		clk_put(clk);
-+}
-diff --git a/sound/soc/sh/rcar/core.c b/sound/soc/sh/rcar/core.c
-index 02d736bb4f54..e588d8a8ae40 100644
---- a/sound/soc/sh/rcar/core.c
-+++ b/sound/soc/sh/rcar/core.c
-@@ -635,6 +635,10 @@ static int rsnd_probe(struct platform_device *pdev)
- 	if (ret < 0)
- 		return ret;
- 
-+	ret = rsnd_adg_probe(pdev, info, priv);
-+	if (ret < 0)
-+		return ret;
-+
- 	/*
- 	 *	asoc register
- 	 */
-@@ -673,6 +677,7 @@ static int rsnd_remove(struct platform_device *pdev)
- 	/*
- 	 *	remove each module
- 	 */
-+	rsnd_adg_remove(pdev, priv);
- 	rsnd_scu_remove(pdev, priv);
- 	rsnd_dai_remove(pdev, priv);
- 	rsnd_gen_remove(pdev, priv);
-diff --git a/sound/soc/sh/rcar/gen.c b/sound/soc/sh/rcar/gen.c
-index 2934c0d731c8..ed21a136354f 100644
---- a/sound/soc/sh/rcar/gen.c
-+++ b/sound/soc/sh/rcar/gen.c
-@@ -111,6 +111,15 @@ static void rsnd_gen1_reg_map_init(struct rsnd_gen *gen)
- {
- 	RSND_GEN1_REG_MAP(gen, SRU,	SSI_MODE0,	0x0,	0xD0);
- 	RSND_GEN1_REG_MAP(gen, SRU,	SSI_MODE1,	0x0,	0xD4);
-+
-+	RSND_GEN1_REG_MAP(gen, ADG,	BRRA,		0x0,	0x00);
-+	RSND_GEN1_REG_MAP(gen, ADG,	BRRB,		0x0,	0x04);
-+	RSND_GEN1_REG_MAP(gen, ADG,	SSICKR,		0x0,	0x08);
-+	RSND_GEN1_REG_MAP(gen, ADG,	AUDIO_CLK_SEL0,	0x0,	0x0c);
-+	RSND_GEN1_REG_MAP(gen, ADG,	AUDIO_CLK_SEL1,	0x0,	0x10);
-+	RSND_GEN1_REG_MAP(gen, ADG,	AUDIO_CLK_SEL3,	0x0,	0x18);
-+	RSND_GEN1_REG_MAP(gen, ADG,	AUDIO_CLK_SEL4,	0x0,	0x1c);
-+	RSND_GEN1_REG_MAP(gen, ADG,	AUDIO_CLK_SEL5,	0x0,	0x20);
- }
- 
- static int rsnd_gen1_probe(struct platform_device *pdev,
-@@ -120,12 +129,15 @@ static int rsnd_gen1_probe(struct platform_device *pdev,
- 	struct device *dev = rsnd_priv_to_dev(priv);
- 	struct rsnd_gen *gen = rsnd_priv_to_gen(priv);
- 	struct resource *sru_res;
-+	struct resource *adg_res;
- 
- 	/*
- 	 * map address
- 	 */
- 	sru_res	= platform_get_resource(pdev, IORESOURCE_MEM, RSND_GEN1_SRU);
--	if (!sru_res) {
-+	adg_res = platform_get_resource(pdev, IORESOURCE_MEM, RSND_GEN1_ADG);
-+	if (!sru_res ||
-+	    !adg_res) {
- 		dev_err(dev, "Not enough SRU/SSI/ADG platform resources.\n");
- 		return -ENODEV;
- 	}
-@@ -133,7 +145,9 @@ static int rsnd_gen1_probe(struct platform_device *pdev,
- 	gen->ops = &rsnd_gen1_ops;
- 
- 	gen->base[RSND_GEN1_SRU] = devm_ioremap_resource(dev, sru_res);
--	if (!gen->base[RSND_GEN1_SRU]) {
-+	gen->base[RSND_GEN1_ADG] = devm_ioremap_resource(dev, adg_res);
-+	if (!gen->base[RSND_GEN1_SRU] ||
-+	    !gen->base[RSND_GEN1_ADG]) {
- 		dev_err(dev, "SRU/SSI/ADG ioremap failed\n");
- 		return -ENODEV;
- 	}
-@@ -143,6 +157,8 @@ static int rsnd_gen1_probe(struct platform_device *pdev,
- 	dev_dbg(dev, "Gen1 device probed\n");
- 	dev_dbg(dev, "SRU : %08x => %p\n",	sru_res->start,
- 						gen->base[RSND_GEN1_SRU]);
-+	dev_dbg(dev, "ADG : %08x => %p\n",	adg_res->start,
-+						gen->base[RSND_GEN1_ADG]);
- 
- 	return 0;
- }
-diff --git a/sound/soc/sh/rcar/rsnd.h b/sound/soc/sh/rcar/rsnd.h
-index 95a391ff0627..344fd59cb7fd 100644
---- a/sound/soc/sh/rcar/rsnd.h
-+++ b/sound/soc/sh/rcar/rsnd.h
-@@ -32,6 +32,17 @@ enum rsnd_reg {
- 	RSND_REG_SSI_MODE0,
- 	RSND_REG_SSI_MODE1,
- 
-+	/* ADG */
-+	RSND_REG_BRRA,
-+	RSND_REG_BRRB,
-+	RSND_REG_SSICKR,
-+	RSND_REG_AUDIO_CLK_SEL0,
-+	RSND_REG_AUDIO_CLK_SEL1,
-+	RSND_REG_AUDIO_CLK_SEL2,
-+	RSND_REG_AUDIO_CLK_SEL3,
-+	RSND_REG_AUDIO_CLK_SEL4,
-+	RSND_REG_AUDIO_CLK_SEL5,
-+
- 	RSND_REG_MAX,
- };
- 
-@@ -163,6 +174,17 @@ void __iomem *rsnd_gen_reg_get(struct rsnd_priv *priv,
- 			       enum rsnd_reg reg);
- 
- /*
-+ *	R-Car ADG
-+ */
-+int rsnd_adg_ssi_clk_stop(struct rsnd_mod *mod);
-+int rsnd_adg_ssi_clk_try_start(struct rsnd_mod *mod, unsigned int rate);
-+int rsnd_adg_probe(struct platform_device *pdev,
-+		   struct rcar_snd_info *info,
-+		   struct rsnd_priv *priv);
-+void rsnd_adg_remove(struct platform_device *pdev,
-+		   struct rsnd_priv *priv);
-+
-+/*
-  *	R-Car sound priv
-  */
- struct rsnd_priv {
-@@ -183,6 +205,11 @@ struct rsnd_priv {
- 	int scu_nr;
- 
- 	/*
-+	 * below value will be filled on rsnd_adg_probe()
-+	 */
-+	void *adg;
-+
-+	/*
- 	 * below value will be filled on rsnd_dai_probe()
- 	 */
- 	struct snd_soc_dai_driver *daidrv;
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0092-sh-pfc-r8a7740-Add-SCIFA1-data-group.patch b/patches.renesas/0092-sh-pfc-r8a7740-Add-SCIFA1-data-group.patch
deleted file mode 100644
index 25cb501b09cc3..0000000000000
--- a/patches.renesas/0092-sh-pfc-r8a7740-Add-SCIFA1-data-group.patch
+++ /dev/null
@@ -1,65 +0,0 @@
-From b2a31fcd17540e368881401a8bb1970d6e6cf6cc Mon Sep 17 00:00:00 2001
-From: Bastian Hecht <hechtb@gmail.com>
-Date: Wed, 17 Apr 2013 10:34:01 +0000
-Subject: sh-pfc: r8a7740: Add SCIFA1 data group
-
-Add SCIFA1 as preparation to switch to pinctrl in board files.
-
-Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 8fbfdbbb04f88604f58c032440a2bc03649697ba)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7740.c | 14 ++++++++++++++
- 1 file changed, 14 insertions(+)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-index d95040c3..4753f544 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-@@ -1999,6 +1999,14 @@ static const unsigned int mmc0_ctrl_1_pins[] = {
- static const unsigned int mmc0_ctrl_1_mux[] = {
- 	MMC1_CMD_PORT104_MARK, MMC1_CLK_PORT103_MARK,
- };
-+/* - SCIFA1 ----------------------------------------------------------------- */
-+static const unsigned int scifa1_data_pins[] = {
-+	/* RXD, TXD */
-+	195, 196,
-+};
-+static const unsigned int scifa1_data_mux[] = {
-+	SCIFA1_RXD_MARK, SCIFA1_TXD_MARK,
-+};
- /* - SDHI0 ------------------------------------------------------------------ */
- static const unsigned int sdhi0_data1_pins[] = {
- 	/* D0 */
-@@ -2204,6 +2212,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(mmc0_data4_1),
- 	SH_PFC_PIN_GROUP(mmc0_data8_1),
- 	SH_PFC_PIN_GROUP(mmc0_ctrl_1),
-+	SH_PFC_PIN_GROUP(scifa1_data),
- 	SH_PFC_PIN_GROUP(sdhi0_data1),
- 	SH_PFC_PIN_GROUP(sdhi0_data4),
- 	SH_PFC_PIN_GROUP(sdhi0_ctrl),
-@@ -2316,6 +2325,10 @@ static const char * const mmc0_groups[] = {
- 	"mmc0_ctrl_1",
- };
- 
-+static const char * const scifa1_groups[] = {
-+	"scifa1_data",
-+};
-+
- static const char * const sdhi0_groups[] = {
- 	"sdhi0_data1",
- 	"sdhi0_data4",
-@@ -2346,6 +2359,7 @@ static const struct sh_pfc_function pinmux_functions[] = {
- 	SH_PFC_FUNCTION(lcd0),
- 	SH_PFC_FUNCTION(lcd1),
- 	SH_PFC_FUNCTION(mmc0),
-+	SH_PFC_FUNCTION(scifa1),
- 	SH_PFC_FUNCTION(sdhi0),
- 	SH_PFC_FUNCTION(sdhi1),
- 	SH_PFC_FUNCTION(sdhi2),
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0093-ARM-Rename-ARCH_SHMOBILE-to-ARCH_SHMOBILE_LEGACY.patch b/patches.renesas/0093-ARM-Rename-ARCH_SHMOBILE-to-ARCH_SHMOBILE_LEGACY.patch
deleted file mode 100644
index 6f717abf03548..0000000000000
--- a/patches.renesas/0093-ARM-Rename-ARCH_SHMOBILE-to-ARCH_SHMOBILE_LEGACY.patch
+++ /dev/null
@@ -1,298 +0,0 @@
-From 5bc7df8fede63d6a3b97d710ae26d1bf02bc1881 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Sat, 9 Nov 2013 13:33:48 +0100
-Subject: ARM: Rename ARCH_SHMOBILE to ARCH_SHMOBILE_LEGACY
-
-SH-Mobile platforms are transitioning from non-multiplatform to
-multiplatform kernel. A new ARCH_SHMOBILE_MULTI configuration symbol has
-been created to group all multiplatform-enabled SH-Mobile SoCs. The
-existing ARCH_SHMOBILE configuration symbol groups SoCs that haven't
-been converted yet.
-
-This arrangement works fine for the arch/ code, but lots of drivers
-needed on both ARCH_SHMOBILE and ARCH_SHMOBILE_MULTI depend on
-ARCH_SHMOBILE only. In order to avoid changing them, rename
-ARCH_SHMOBILE to ARCH_SHMOBILE_LEGACY, and create a new boolean
-ARCH_SHMOBILE configuration symbol that is selected by both
-ARCH_SHMOBILE_LEGACY and ARCH_SHMOBILE_MULTI.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit bf98c1eac1d4a6bcf00532e4fa41d8126cd6c187)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-	arch/arm/Kconfig
-	arch/arm/Makefile
-	arch/arm/boot/dts/Makefile
-	drivers/Makefile
----
- arch/arm/Kconfig                           | 14 ++++++++------
- arch/arm/Makefile                          |  1 -
- arch/arm/boot/compressed/Makefile          |  2 +-
- arch/arm/boot/dts/Makefile                 |  2 +-
- arch/arm/configs/ape6evm_defconfig         |  2 +-
- arch/arm/configs/armadillo800eva_defconfig |  2 +-
- arch/arm/configs/bockw_defconfig           |  2 +-
- arch/arm/configs/koelsch_defconfig         |  2 +-
- arch/arm/configs/kzm9d_defconfig           |  2 +-
- arch/arm/configs/kzm9g_defconfig           |  2 +-
- arch/arm/configs/lager_defconfig           |  2 +-
- arch/arm/configs/mackerel_defconfig        |  2 +-
- arch/arm/configs/marzen_defconfig          |  2 +-
- arch/arm/mach-shmobile/Kconfig             |  8 ++++++--
- drivers/Makefile                           |  2 +-
- 15 files changed, 26 insertions(+), 21 deletions(-)
-
-diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
-index 9e4b5fd241cd..e965fda96875 100644
---- a/arch/arm/Kconfig
-+++ b/arch/arm/Kconfig
-@@ -632,8 +632,9 @@ config ARCH_MSM
- 	  stack and controls some vital subsystems
- 	  (clock and power control, etc).
- 
--config ARCH_SHMOBILE
--	bool "Renesas SH-Mobile / R-Mobile"
-+config ARCH_SHMOBILE_LEGACY
-+	bool "Renesas SH-Mobile / R-Mobile (non-multiplatform)"
-+	select ARCH_SHMOBILE
- 	select ARM_PATCH_PHYS_VIRT
- 	select CLKDEV_LOOKUP
- 	select GENERIC_CLOCKEVENTS
-@@ -649,7 +650,8 @@ config ARCH_SHMOBILE
- 	select PM_GENERIC_DOMAINS if PM
- 	select SPARSE_IRQ
- 	help
--	  Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
-+	  Support for Renesas's SH-Mobile and R-Mobile ARM platforms using
-+	  a non-multiplatform kernel.
- 
- config ARCH_RPC
- 	bool "RiscPC"
-@@ -1601,7 +1603,7 @@ config HZ
- 	default 200 if ARCH_EBSA110 || ARCH_S3C24XX || ARCH_S5P64X0 || \
- 		ARCH_S5PV210 || ARCH_EXYNOS4
- 	default AT91_TIMER_HZ if ARCH_AT91
--	default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
-+	default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE_LEGACY
- 	default 100
- 
- config SCHED_HRTICK
-@@ -1734,8 +1736,8 @@ config HW_PERF_EVENTS
- source "mm/Kconfig"
- 
- config FORCE_MAX_ZONEORDER
--	int "Maximum zone order" if ARCH_SHMOBILE
--	range 11 64 if ARCH_SHMOBILE
-+	int "Maximum zone order" if ARCH_SHMOBILE_LEGACY
-+	range 11 64 if ARCH_SHMOBILE_LEGACY
- 	default "12" if SOC_AM33XX
- 	default "9" if SA1111
- 	default "11"
-diff --git a/arch/arm/Makefile b/arch/arm/Makefile
-index f56df13da7b2..1ba358ba16b8 100644
---- a/arch/arm/Makefile
-+++ b/arch/arm/Makefile
-@@ -181,7 +181,6 @@ machine-$(CONFIG_ARCH_EXYNOS)		+= exynos
- machine-$(CONFIG_ARCH_SA1100)		+= sa1100
- machine-$(CONFIG_ARCH_SHARK)		+= shark
- machine-$(CONFIG_ARCH_SHMOBILE) 	+= shmobile
--machine-$(CONFIG_ARCH_SHMOBILE_MULTI) 	+= shmobile
- machine-$(CONFIG_ARCH_TEGRA)		+= tegra
- machine-$(CONFIG_ARCH_U300)		+= u300
- machine-$(CONFIG_ARCH_U8500)		+= ux500
-diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile
-index 120b83bfde20..e60f192571ce 100644
---- a/arch/arm/boot/compressed/Makefile
-+++ b/arch/arm/boot/compressed/Makefile
-@@ -68,7 +68,7 @@ else
- endif
- endif
- 
--ifeq ($(CONFIG_ARCH_SHMOBILE),y)
-+ifeq ($(CONFIG_ARCH_SHMOBILE_LEGACY),y)
- OBJS		+= head-shmobile.o
- endif
- 
-diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
-index 5df751b250a1..3ced87adb39d 100644
---- a/arch/arm/boot/dts/Makefile
-+++ b/arch/arm/boot/dts/Makefile
-@@ -159,7 +159,7 @@ dtb-$(CONFIG_ARCH_U8500) += snowball.dtb \
- 	hrefprev60.dtb \
- 	hrefv60plus.dtb \
- 	ccu9540.dtb
--dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \
-+dtb-$(CONFIG_ARCH_SHMOBILE_LEGACY) += emev2-kzm9d.dtb \
- 	r7s72100-genmai.dtb \
- 	r8a7740-armadillo800eva.dtb \
- 	r8a7778-bockw.dtb \
-diff --git a/arch/arm/configs/ape6evm_defconfig b/arch/arm/configs/ape6evm_defconfig
-index 1ce39940795d..cb26c62dc722 100644
---- a/arch/arm/configs/ape6evm_defconfig
-+++ b/arch/arm/configs/ape6evm_defconfig
-@@ -13,7 +13,7 @@ CONFIG_EMBEDDED=y
- CONFIG_PERF_EVENTS=y
- CONFIG_SLAB=y
- # CONFIG_BLOCK is not set
--CONFIG_ARCH_SHMOBILE=y
-+CONFIG_ARCH_SHMOBILE_LEGACY=y
- CONFIG_ARCH_R8A73A4=y
- CONFIG_MACH_APE6EVM=y
- # CONFIG_ARM_THUMB is not set
-diff --git a/arch/arm/configs/armadillo800eva_defconfig b/arch/arm/configs/armadillo800eva_defconfig
-index fae939d3d7f0..5abf1a2e3160 100644
---- a/arch/arm/configs/armadillo800eva_defconfig
-+++ b/arch/arm/configs/armadillo800eva_defconfig
-@@ -15,7 +15,7 @@ CONFIG_MODULE_FORCE_UNLOAD=y
- # CONFIG_BLK_DEV_BSG is not set
- # CONFIG_IOSCHED_DEADLINE is not set
- # CONFIG_IOSCHED_CFQ is not set
--CONFIG_ARCH_SHMOBILE=y
-+CONFIG_ARCH_SHMOBILE_LEGACY=y
- CONFIG_ARCH_R8A7740=y
- CONFIG_MACH_ARMADILLO800EVA=y
- # CONFIG_SH_TIMER_TMU is not set
-diff --git a/arch/arm/configs/bockw_defconfig b/arch/arm/configs/bockw_defconfig
-index 8110d8a653f7..80cff50beb34 100644
---- a/arch/arm/configs/bockw_defconfig
-+++ b/arch/arm/configs/bockw_defconfig
-@@ -8,7 +8,7 @@ CONFIG_SYSCTL_SYSCALL=y
- CONFIG_EMBEDDED=y
- CONFIG_SLAB=y
- # CONFIG_IOSCHED_CFQ is not set
--CONFIG_ARCH_SHMOBILE=y
-+CONFIG_ARCH_SHMOBILE_LEGACY=y
- CONFIG_ARCH_R8A7778=y
- CONFIG_MACH_BOCKW=y
- CONFIG_MEMORY_START=0x60000000
-diff --git a/arch/arm/configs/koelsch_defconfig b/arch/arm/configs/koelsch_defconfig
-index 825c16dee8a0..7fd65a01ec7e 100644
---- a/arch/arm/configs/koelsch_defconfig
-+++ b/arch/arm/configs/koelsch_defconfig
-@@ -9,7 +9,7 @@ CONFIG_EMBEDDED=y
- CONFIG_PERF_EVENTS=y
- CONFIG_SLAB=y
- # CONFIG_BLOCK is not set
--CONFIG_ARCH_SHMOBILE=y
-+CONFIG_ARCH_SHMOBILE_LEGACY=y
- CONFIG_ARCH_R8A7791=y
- CONFIG_MACH_KOELSCH=y
- # CONFIG_SWP_EMULATE is not set
-diff --git a/arch/arm/configs/kzm9d_defconfig b/arch/arm/configs/kzm9d_defconfig
-index e6aed23ac083..e42ce3756af3 100644
---- a/arch/arm/configs/kzm9d_defconfig
-+++ b/arch/arm/configs/kzm9d_defconfig
-@@ -13,7 +13,7 @@ CONFIG_SLAB=y
- # CONFIG_BLK_DEV_BSG is not set
- # CONFIG_IOSCHED_DEADLINE is not set
- # CONFIG_IOSCHED_CFQ is not set
--CONFIG_ARCH_SHMOBILE=y
-+CONFIG_ARCH_SHMOBILE_LEGACY=y
- CONFIG_ARCH_EMEV2=y
- CONFIG_MACH_KZM9D=y
- CONFIG_MEMORY_START=0x40000000
-diff --git a/arch/arm/configs/kzm9g_defconfig b/arch/arm/configs/kzm9g_defconfig
-index 1ad028023a64..9934dbc23d64 100644
---- a/arch/arm/configs/kzm9g_defconfig
-+++ b/arch/arm/configs/kzm9g_defconfig
-@@ -22,7 +22,7 @@ CONFIG_MODULE_UNLOAD=y
- # CONFIG_BLK_DEV_BSG is not set
- # CONFIG_IOSCHED_DEADLINE is not set
- # CONFIG_IOSCHED_CFQ is not set
--CONFIG_ARCH_SHMOBILE=y
-+CONFIG_ARCH_SHMOBILE_LEGACY=y
- CONFIG_ARCH_SH73A0=y
- CONFIG_MACH_KZM9G=y
- CONFIG_MEMORY_START=0x41000000
-diff --git a/arch/arm/configs/lager_defconfig b/arch/arm/configs/lager_defconfig
-index 35bff5e0d57a..35dc8b2be47f 100644
---- a/arch/arm/configs/lager_defconfig
-+++ b/arch/arm/configs/lager_defconfig
-@@ -12,7 +12,7 @@ CONFIG_SLAB=y
- # CONFIG_BLK_DEV_BSG is not set
- # CONFIG_IOSCHED_DEADLINE is not set
- # CONFIG_IOSCHED_CFQ is not set
--CONFIG_ARCH_SHMOBILE=y
-+CONFIG_ARCH_SHMOBILE_LEGACY=y
- CONFIG_ARCH_R8A7790=y
- CONFIG_MACH_LAGER=y
- # CONFIG_SH_TIMER_TMU is not set
-diff --git a/arch/arm/configs/mackerel_defconfig b/arch/arm/configs/mackerel_defconfig
-index 9fb11895b2e2..a61e1653fc5e 100644
---- a/arch/arm/configs/mackerel_defconfig
-+++ b/arch/arm/configs/mackerel_defconfig
-@@ -14,7 +14,7 @@ CONFIG_MODULE_UNLOAD=y
- # CONFIG_BLK_DEV_BSG is not set
- # CONFIG_IOSCHED_DEADLINE is not set
- # CONFIG_IOSCHED_CFQ is not set
--CONFIG_ARCH_SHMOBILE=y
-+CONFIG_ARCH_SHMOBILE_LEGACY=y
- CONFIG_ARCH_SH7372=y
- CONFIG_MACH_MACKEREL=y
- CONFIG_MEMORY_SIZE=0x10000000
-diff --git a/arch/arm/configs/marzen_defconfig b/arch/arm/configs/marzen_defconfig
-index dd4aced59d3c..f21bd405cc2a 100644
---- a/arch/arm/configs/marzen_defconfig
-+++ b/arch/arm/configs/marzen_defconfig
-@@ -9,7 +9,7 @@ CONFIG_SYSCTL_SYSCALL=y
- CONFIG_EMBEDDED=y
- CONFIG_SLAB=y
- # CONFIG_IOSCHED_CFQ is not set
--CONFIG_ARCH_SHMOBILE=y
-+CONFIG_ARCH_SHMOBILE_LEGACY=y
- CONFIG_ARCH_R8A7779=y
- CONFIG_MACH_MARZEN=y
- CONFIG_MEMORY_START=0x60000000
-diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
-index 180b71fd86f8..1b7df173db0e 100644
---- a/arch/arm/mach-shmobile/Kconfig
-+++ b/arch/arm/mach-shmobile/Kconfig
-@@ -1,6 +1,10 @@
-+config ARCH_SHMOBILE
-+	bool
-+
- config ARCH_SHMOBILE_MULTI
- 	bool "SH-Mobile Series" if ARCH_MULTI_V7
- 	depends on MMU
-+	select ARCH_SHMOBILE
- 	select CPU_V7
- 	select GENERIC_CLOCKEVENTS
- 	select HAVE_ARM_SCU if SMP
-@@ -30,7 +34,7 @@ config MACH_KZM9D
- comment "SH-Mobile System Configuration"
- endif
- 
--if ARCH_SHMOBILE
-+if ARCH_SHMOBILE_LEGACY
- 
- comment "SH-Mobile System Type"
- 
-@@ -272,7 +276,7 @@ source "drivers/sh/Kconfig"
- 
- endif
- 
--if ARCH_SHMOBILE || ARCH_SHMOBILE_MULTI
-+if ARCH_SHMOBILE
- 
- menu "Timer and clock configuration"
- 
-diff --git a/drivers/Makefile b/drivers/Makefile
-index 130abc1dfd65..4548367a2cb2 100644
---- a/drivers/Makefile
-+++ b/drivers/Makefile
-@@ -116,7 +116,7 @@ obj-$(CONFIG_SGI_SN)		+= sn/
- obj-y				+= firmware/
- obj-$(CONFIG_CRYPTO)		+= crypto/
- obj-$(CONFIG_SUPERH)		+= sh/
--obj-$(CONFIG_ARCH_SHMOBILE)	+= sh/
-+obj-$(CONFIG_ARCH_SHMOBILE_LEGACY)	+= sh/
- obj-$(CONFIG_SSBI)		+= ssbi/
- ifndef CONFIG_ARCH_USES_GETTIMEOFFSET
- obj-y				+= clocksource/
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0093-ASoC-add-Renesas-R-Car-SSI-feature.patch b/patches.renesas/0093-ASoC-add-Renesas-R-Car-SSI-feature.patch
deleted file mode 100644
index 9e177bcae02b8..0000000000000
--- a/patches.renesas/0093-ASoC-add-Renesas-R-Car-SSI-feature.patch
+++ /dev/null
@@ -1,828 +0,0 @@
-From c30f538ea1f7b9c6ba47ad29197aef1ea68dfeeb Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Sun, 21 Jul 2013 21:36:57 -0700
-Subject: ASoC: add Renesas R-Car SSI feature
-
-Renesas R-Car series sound circuit consists of SSI and its peripheral.
-But this peripheral circuit is different between
-R-Car Generation1 (E1/M1/H1) and Generation2 (E2/M2/H2)
-(Actually, there are many difference in Generation1 chips)
-
-As 1st protype, this patch adds SSI feature on this driver.
-But, it is PIO sound playback support only at this point.
-The DMA transfer, and capture feature will be supported in the future
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@linaro.org>
-(cherry picked from commit ae5c322303fff50b93d60e34c6563f1264a5941b)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- include/sound/rcar_snd.h   |  23 +-
- sound/soc/sh/rcar/Makefile |   2 +-
- sound/soc/sh/rcar/core.c   |   5 +
- sound/soc/sh/rcar/gen.c    |  24 +-
- sound/soc/sh/rcar/rsnd.h   |  23 ++
- sound/soc/sh/rcar/ssi.c    | 588 +++++++++++++++++++++++++++++++++++++++++++++
- 6 files changed, 661 insertions(+), 4 deletions(-)
- create mode 100644 sound/soc/sh/rcar/ssi.c
-
-diff --git a/include/sound/rcar_snd.h b/include/sound/rcar_snd.h
-index 6babd6f7b537..99d8dd029906 100644
---- a/include/sound/rcar_snd.h
-+++ b/include/sound/rcar_snd.h
-@@ -16,11 +16,30 @@
- 
- #define RSND_GEN1_SRU	0
- #define RSND_GEN1_ADG	1
-+#define RSND_GEN1_SSI	2
- 
- #define RSND_GEN2_SRU	0
- #define RSND_GEN2_ADG	1
-+#define RSND_GEN2_SSIU	2
-+#define RSND_GEN2_SSI	3
- 
--#define RSND_BASE_MAX	2
-+#define RSND_BASE_MAX	4
-+
-+/*
-+ * flags
-+ *
-+ * 0xA0000000
-+ *
-+ * A : clock sharing settings
-+ */
-+#define RSND_SSI_CLK_PIN_SHARE		(1 << 31)
-+#define RSND_SSI_CLK_FROM_ADG		(1 << 30) /* clock parent is master */
-+#define RSND_SSI_SYNC			(1 << 29) /* SSI34_sync etc */
-+
-+struct rsnd_ssi_platform_info {
-+	int pio_irq;
-+	u32 flags;
-+};
- 
- struct rsnd_scu_platform_info {
- 	u32 flags;
-@@ -43,6 +62,8 @@ struct rsnd_dai_platform_info {
- 
- struct rcar_snd_info {
- 	u32 flags;
-+	struct rsnd_ssi_platform_info *ssi_info;
-+	int ssi_info_nr;
- 	struct rsnd_scu_platform_info *scu_info;
- 	int scu_info_nr;
- 	struct rsnd_dai_platform_info *dai_info;
-diff --git a/sound/soc/sh/rcar/Makefile b/sound/soc/sh/rcar/Makefile
-index c11280cffcfe..0ff492df7929 100644
---- a/sound/soc/sh/rcar/Makefile
-+++ b/sound/soc/sh/rcar/Makefile
-@@ -1,2 +1,2 @@
--snd-soc-rcar-objs	:= core.o gen.o scu.o adg.o
-+snd-soc-rcar-objs	:= core.o gen.o scu.o adg.o ssi.o
- obj-$(CONFIG_SND_SOC_RCAR)	+= snd-soc-rcar.o
-\ No newline at end of file
-diff --git a/sound/soc/sh/rcar/core.c b/sound/soc/sh/rcar/core.c
-index e588d8a8ae40..9a5469d3f352 100644
---- a/sound/soc/sh/rcar/core.c
-+++ b/sound/soc/sh/rcar/core.c
-@@ -639,6 +639,10 @@ static int rsnd_probe(struct platform_device *pdev)
- 	if (ret < 0)
- 		return ret;
- 
-+	ret = rsnd_ssi_probe(pdev, info, priv);
-+	if (ret < 0)
-+		return ret;
-+
- 	/*
- 	 *	asoc register
- 	 */
-@@ -677,6 +681,7 @@ static int rsnd_remove(struct platform_device *pdev)
- 	/*
- 	 *	remove each module
- 	 */
-+	rsnd_ssi_remove(pdev, priv);
- 	rsnd_adg_remove(pdev, priv);
- 	rsnd_scu_remove(pdev, priv);
- 	rsnd_dai_remove(pdev, priv);
-diff --git a/sound/soc/sh/rcar/gen.c b/sound/soc/sh/rcar/gen.c
-index ed21a136354f..5e4ae0da4352 100644
---- a/sound/soc/sh/rcar/gen.c
-+++ b/sound/soc/sh/rcar/gen.c
-@@ -72,6 +72,12 @@ static int rsnd_gen1_path_init(struct rsnd_priv *priv,
- 	else
- 		id = info->ssi_id_capture;
- 
-+	/* SSI */
-+	mod = rsnd_ssi_mod_get(priv, id);
-+	ret = rsnd_dai_connect(rdai, mod, io);
-+	if (ret < 0)
-+		return ret;
-+
- 	/* SCU */
- 	mod = rsnd_scu_mod_get(priv, id);
- 	ret = rsnd_dai_connect(rdai, mod, io);
-@@ -120,6 +126,12 @@ static void rsnd_gen1_reg_map_init(struct rsnd_gen *gen)
- 	RSND_GEN1_REG_MAP(gen, ADG,	AUDIO_CLK_SEL3,	0x0,	0x18);
- 	RSND_GEN1_REG_MAP(gen, ADG,	AUDIO_CLK_SEL4,	0x0,	0x1c);
- 	RSND_GEN1_REG_MAP(gen, ADG,	AUDIO_CLK_SEL5,	0x0,	0x20);
-+
-+	RSND_GEN1_REG_MAP(gen, SSI,	SSICR,		0x40,	0x00);
-+	RSND_GEN1_REG_MAP(gen, SSI,	SSISR,		0x40,	0x04);
-+	RSND_GEN1_REG_MAP(gen, SSI,	SSITDR,		0x40,	0x08);
-+	RSND_GEN1_REG_MAP(gen, SSI,	SSIRDR,		0x40,	0x0c);
-+	RSND_GEN1_REG_MAP(gen, SSI,	SSIWSR,		0x40,	0x20);
- }
- 
- static int rsnd_gen1_probe(struct platform_device *pdev,
-@@ -130,14 +142,17 @@ static int rsnd_gen1_probe(struct platform_device *pdev,
- 	struct rsnd_gen *gen = rsnd_priv_to_gen(priv);
- 	struct resource *sru_res;
- 	struct resource *adg_res;
-+	struct resource *ssi_res;
- 
- 	/*
- 	 * map address
- 	 */
- 	sru_res	= platform_get_resource(pdev, IORESOURCE_MEM, RSND_GEN1_SRU);
- 	adg_res = platform_get_resource(pdev, IORESOURCE_MEM, RSND_GEN1_ADG);
-+	ssi_res	= platform_get_resource(pdev, IORESOURCE_MEM, RSND_GEN1_SSI);
- 	if (!sru_res ||
--	    !adg_res) {
-+	    !adg_res ||
-+	    !ssi_res) {
- 		dev_err(dev, "Not enough SRU/SSI/ADG platform resources.\n");
- 		return -ENODEV;
- 	}
-@@ -146,8 +161,10 @@ static int rsnd_gen1_probe(struct platform_device *pdev,
- 
- 	gen->base[RSND_GEN1_SRU] = devm_ioremap_resource(dev, sru_res);
- 	gen->base[RSND_GEN1_ADG] = devm_ioremap_resource(dev, adg_res);
-+	gen->base[RSND_GEN1_SSI] = devm_ioremap_resource(dev, ssi_res);
- 	if (!gen->base[RSND_GEN1_SRU] ||
--	    !gen->base[RSND_GEN1_ADG]) {
-+	    !gen->base[RSND_GEN1_ADG] ||
-+	    !gen->base[RSND_GEN1_SSI]) {
- 		dev_err(dev, "SRU/SSI/ADG ioremap failed\n");
- 		return -ENODEV;
- 	}
-@@ -159,8 +176,11 @@ static int rsnd_gen1_probe(struct platform_device *pdev,
- 						gen->base[RSND_GEN1_SRU]);
- 	dev_dbg(dev, "ADG : %08x => %p\n",	adg_res->start,
- 						gen->base[RSND_GEN1_ADG]);
-+	dev_dbg(dev, "SSI : %08x => %p\n",	ssi_res->start,
-+						gen->base[RSND_GEN1_SSI]);
- 
- 	return 0;
-+
- }
- 
- static void rsnd_gen1_remove(struct platform_device *pdev,
-diff --git a/sound/soc/sh/rcar/rsnd.h b/sound/soc/sh/rcar/rsnd.h
-index 344fd59cb7fd..0e7727cc41db 100644
---- a/sound/soc/sh/rcar/rsnd.h
-+++ b/sound/soc/sh/rcar/rsnd.h
-@@ -43,6 +43,13 @@ enum rsnd_reg {
- 	RSND_REG_AUDIO_CLK_SEL4,
- 	RSND_REG_AUDIO_CLK_SEL5,
- 
-+	/* SSI */
-+	RSND_REG_SSICR,
-+	RSND_REG_SSISR,
-+	RSND_REG_SSITDR,
-+	RSND_REG_SSIRDR,
-+	RSND_REG_SSIWSR,
-+
- 	RSND_REG_MAX,
- };
- 
-@@ -151,6 +158,7 @@ int rsnd_dai_connect(struct rsnd_dai *rdai, struct rsnd_mod *mod,
- 		     struct rsnd_dai_stream *io);
- int rsnd_dai_is_play(struct rsnd_dai *rdai, struct rsnd_dai_stream *io);
- #define rsnd_dai_get_platform_info(rdai) ((rdai)->info)
-+#define rsnd_io_to_runtime(io) ((io)->substream->runtime)
- 
- void rsnd_dai_pointer_update(struct rsnd_dai_stream *io, int cnt);
- int rsnd_dai_pointer_offset(struct rsnd_dai_stream *io, int additional);
-@@ -210,6 +218,11 @@ struct rsnd_priv {
- 	void *adg;
- 
- 	/*
-+	 * below value will be filled on rsnd_ssi_probe()
-+	 */
-+	void *ssiu;
-+
-+	/*
- 	 * below value will be filled on rsnd_dai_probe()
- 	 */
- 	struct snd_soc_dai_driver *daidrv;
-@@ -232,4 +245,14 @@ void rsnd_scu_remove(struct platform_device *pdev,
- struct rsnd_mod *rsnd_scu_mod_get(struct rsnd_priv *priv, int id);
- #define rsnd_scu_nr(priv) ((priv)->scu_nr)
- 
-+/*
-+ *	R-Car SSI
-+ */
-+int rsnd_ssi_probe(struct platform_device *pdev,
-+		   struct rcar_snd_info *info,
-+		   struct rsnd_priv *priv);
-+void rsnd_ssi_remove(struct platform_device *pdev,
-+		   struct rsnd_priv *priv);
-+struct rsnd_mod *rsnd_ssi_mod_get(struct rsnd_priv *priv, int id);
-+
- #endif
-diff --git a/sound/soc/sh/rcar/ssi.c b/sound/soc/sh/rcar/ssi.c
-new file mode 100644
-index 000000000000..061ac7e88309
---- /dev/null
-+++ b/sound/soc/sh/rcar/ssi.c
-@@ -0,0 +1,588 @@
-+/*
-+ * Renesas R-Car SSIU/SSI support
-+ *
-+ * Copyright (C) 2013 Renesas Solutions Corp.
-+ * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-+ *
-+ * Based on fsi.c
-+ * Kuninori Morimoto <morimoto.kuninori@renesas.com>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+#include <linux/delay.h>
-+#include "rsnd.h"
-+#define RSND_SSI_NAME_SIZE 16
-+
-+/*
-+ * SSICR
-+ */
-+#define	FORCE		(1 << 31)	/* Fixed */
-+#define	UIEN		(1 << 27)	/* Underflow Interrupt Enable */
-+#define	OIEN		(1 << 26)	/* Overflow Interrupt Enable */
-+#define	IIEN		(1 << 25)	/* Idle Mode Interrupt Enable */
-+#define	DIEN		(1 << 24)	/* Data Interrupt Enable */
-+
-+#define	DWL_8		(0 << 19)	/* Data Word Length */
-+#define	DWL_16		(1 << 19)	/* Data Word Length */
-+#define	DWL_18		(2 << 19)	/* Data Word Length */
-+#define	DWL_20		(3 << 19)	/* Data Word Length */
-+#define	DWL_22		(4 << 19)	/* Data Word Length */
-+#define	DWL_24		(5 << 19)	/* Data Word Length */
-+#define	DWL_32		(6 << 19)	/* Data Word Length */
-+
-+#define	SWL_32		(3 << 16)	/* R/W System Word Length */
-+#define	SCKD		(1 << 15)	/* Serial Bit Clock Direction */
-+#define	SWSD		(1 << 14)	/* Serial WS Direction */
-+#define	SCKP		(1 << 13)	/* Serial Bit Clock Polarity */
-+#define	SWSP		(1 << 12)	/* Serial WS Polarity */
-+#define	SDTA		(1 << 10)	/* Serial Data Alignment */
-+#define	DEL		(1 <<  8)	/* Serial Data Delay */
-+#define	CKDV(v)		(v <<  4)	/* Serial Clock Division Ratio */
-+#define	TRMD		(1 <<  1)	/* Transmit/Receive Mode Select */
-+#define	EN		(1 <<  0)	/* SSI Module Enable */
-+
-+/*
-+ * SSISR
-+ */
-+#define	UIRQ		(1 << 27)	/* Underflow Error Interrupt Status */
-+#define	OIRQ		(1 << 26)	/* Overflow Error Interrupt Status */
-+#define	IIRQ		(1 << 25)	/* Idle Mode Interrupt Status */
-+#define	DIRQ		(1 << 24)	/* Data Interrupt Status Flag */
-+
-+struct rsnd_ssi {
-+	struct clk *clk;
-+	struct rsnd_ssi_platform_info *info; /* rcar_snd.h */
-+	struct rsnd_ssi *parent;
-+	struct rsnd_mod mod;
-+
-+	struct rsnd_dai *rdai;
-+	struct rsnd_dai_stream *io;
-+	u32 cr_own;
-+	u32 cr_clk;
-+	u32 cr_etc;
-+	int err;
-+	unsigned int usrcnt;
-+	unsigned int rate;
-+};
-+
-+struct rsnd_ssiu {
-+	u32 ssi_mode0;
-+	u32 ssi_mode1;
-+
-+	int ssi_nr;
-+	struct rsnd_ssi *ssi;
-+};
-+
-+#define for_each_rsnd_ssi(pos, priv, i)					\
-+	for (i = 0;							\
-+	     (i < rsnd_ssi_nr(priv)) &&					\
-+		((pos) = ((struct rsnd_ssiu *)((priv)->ssiu))->ssi + i); \
-+	     i++)
-+
-+#define rsnd_ssi_nr(priv) (((struct rsnd_ssiu *)((priv)->ssiu))->ssi_nr)
-+#define rsnd_mod_to_ssi(_mod) container_of((_mod), struct rsnd_ssi, mod)
-+#define rsnd_ssi_is_pio(ssi) ((ssi)->info->pio_irq > 0)
-+#define rsnd_ssi_clk_from_parent(ssi) ((ssi)->parent)
-+#define rsnd_rdai_is_clk_master(rdai) ((rdai)->clk_master)
-+#define rsnd_ssi_mode_flags(p) ((p)->info->flags)
-+#define rsnd_ssi_to_ssiu(ssi)\
-+	(((struct rsnd_ssiu *)((ssi) - rsnd_mod_id(&(ssi)->mod))) - 1)
-+
-+static void rsnd_ssi_mode_init(struct rsnd_priv *priv,
-+			       struct rsnd_ssiu *ssiu)
-+{
-+	struct rsnd_ssi *ssi;
-+	u32 flags;
-+	u32 val;
-+	int i;
-+
-+	/*
-+	 * SSI_MODE0
-+	 */
-+	ssiu->ssi_mode0 = 0;
-+	for_each_rsnd_ssi(ssi, priv, i)
-+		ssiu->ssi_mode0 |= (1 << i);
-+
-+	/*
-+	 * SSI_MODE1
-+	 */
-+#define ssi_parent_set(p, sync, adg, ext)		\
-+	do {						\
-+		ssi->parent = ssiu->ssi + p;		\
-+		if (flags & RSND_SSI_CLK_FROM_ADG)	\
-+			val = adg;			\
-+		else					\
-+			val = ext;			\
-+		if (flags & RSND_SSI_SYNC)		\
-+			val |= sync;			\
-+	} while (0)
-+
-+	ssiu->ssi_mode1 = 0;
-+	for_each_rsnd_ssi(ssi, priv, i) {
-+		flags = rsnd_ssi_mode_flags(ssi);
-+
-+		if (!(flags & RSND_SSI_CLK_PIN_SHARE))
-+			continue;
-+
-+		val = 0;
-+		switch (i) {
-+		case 1:
-+			ssi_parent_set(0, (1 << 4), (0x2 << 0), (0x1 << 0));
-+			break;
-+		case 2:
-+			ssi_parent_set(0, (1 << 4), (0x2 << 2), (0x1 << 2));
-+			break;
-+		case 4:
-+			ssi_parent_set(3, (1 << 20), (0x2 << 16), (0x1 << 16));
-+			break;
-+		case 8:
-+			ssi_parent_set(7, 0, 0, 0);
-+			break;
-+		}
-+
-+		ssiu->ssi_mode1 |= val;
-+	}
-+}
-+
-+static void rsnd_ssi_mode_set(struct rsnd_ssi *ssi)
-+{
-+	struct rsnd_ssiu *ssiu = rsnd_ssi_to_ssiu(ssi);
-+
-+	rsnd_mod_write(&ssi->mod, SSI_MODE0, ssiu->ssi_mode0);
-+	rsnd_mod_write(&ssi->mod, SSI_MODE1, ssiu->ssi_mode1);
-+}
-+
-+static void rsnd_ssi_status_check(struct rsnd_mod *mod,
-+				  u32 bit)
-+{
-+	struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
-+	struct device *dev = rsnd_priv_to_dev(priv);
-+	u32 status;
-+	int i;
-+
-+	for (i = 0; i < 1024; i++) {
-+		status = rsnd_mod_read(mod, SSISR);
-+		if (status & bit)
-+			return;
-+
-+		udelay(50);
-+	}
-+
-+	dev_warn(dev, "status check failed\n");
-+}
-+
-+static int rsnd_ssi_master_clk_start(struct rsnd_ssi *ssi,
-+				     unsigned int rate)
-+{
-+	struct rsnd_priv *priv = rsnd_mod_to_priv(&ssi->mod);
-+	struct device *dev = rsnd_priv_to_dev(priv);
-+	int i, j, ret;
-+	int adg_clk_div_table[] = {
-+		1, 6, /* see adg.c */
-+	};
-+	int ssi_clk_mul_table[] = {
-+		1, 2, 4, 8, 16, 6, 12,
-+	};
-+	unsigned int main_rate;
-+
-+	/*
-+	 * Find best clock, and try to start ADG
-+	 */
-+	for (i = 0; i < ARRAY_SIZE(adg_clk_div_table); i++) {
-+		for (j = 0; j < ARRAY_SIZE(ssi_clk_mul_table); j++) {
-+
-+			/*
-+			 * this driver is assuming that
-+			 * system word is 64fs (= 2 x 32bit)
-+			 * see rsnd_ssi_start()
-+			 */
-+			main_rate = rate / adg_clk_div_table[i]
-+				* 32 * 2 * ssi_clk_mul_table[j];
-+
-+			ret = rsnd_adg_ssi_clk_try_start(&ssi->mod, main_rate);
-+			if (0 == ret) {
-+				ssi->rate	= rate;
-+				ssi->cr_clk	= FORCE | SWL_32 |
-+						  SCKD | SWSD | CKDV(j);
-+
-+				dev_dbg(dev, "ssi%d outputs %u Hz\n",
-+					rsnd_mod_id(&ssi->mod), rate);
-+
-+				return 0;
-+			}
-+		}
-+	}
-+
-+	dev_err(dev, "unsupported clock rate\n");
-+	return -EIO;
-+}
-+
-+static void rsnd_ssi_master_clk_stop(struct rsnd_ssi *ssi)
-+{
-+	ssi->rate = 0;
-+	ssi->cr_clk = 0;
-+	rsnd_adg_ssi_clk_stop(&ssi->mod);
-+}
-+
-+static void rsnd_ssi_hw_start(struct rsnd_ssi *ssi,
-+			      struct rsnd_dai *rdai,
-+			      struct rsnd_dai_stream *io)
-+{
-+	struct rsnd_priv *priv = rsnd_mod_to_priv(&ssi->mod);
-+	struct device *dev = rsnd_priv_to_dev(priv);
-+	u32 cr;
-+
-+	if (0 == ssi->usrcnt) {
-+		clk_enable(ssi->clk);
-+
-+		if (rsnd_rdai_is_clk_master(rdai)) {
-+			struct snd_pcm_runtime *runtime;
-+
-+			runtime = rsnd_io_to_runtime(io);
-+
-+			if (rsnd_ssi_clk_from_parent(ssi))
-+				rsnd_ssi_hw_start(ssi->parent, rdai, io);
-+			else
-+				rsnd_ssi_master_clk_start(ssi, runtime->rate);
-+		}
-+	}
-+
-+	cr  =	ssi->cr_own	|
-+		ssi->cr_clk	|
-+		ssi->cr_etc	|
-+		EN;
-+
-+	rsnd_mod_write(&ssi->mod, SSICR, cr);
-+
-+	ssi->usrcnt++;
-+
-+	dev_dbg(dev, "ssi%d hw started\n", rsnd_mod_id(&ssi->mod));
-+}
-+
-+static void rsnd_ssi_hw_stop(struct rsnd_ssi *ssi,
-+			     struct rsnd_dai *rdai)
-+{
-+	struct rsnd_priv *priv = rsnd_mod_to_priv(&ssi->mod);
-+	struct device *dev = rsnd_priv_to_dev(priv);
-+	u32 cr;
-+
-+	if (0 == ssi->usrcnt) /* stop might be called without start */
-+		return;
-+
-+	ssi->usrcnt--;
-+
-+	if (0 == ssi->usrcnt) {
-+		/*
-+		 * disable all IRQ,
-+		 * and, wait all data was sent
-+		 */
-+		cr  =	ssi->cr_own	|
-+			ssi->cr_clk;
-+
-+		rsnd_mod_write(&ssi->mod, SSICR, cr | EN);
-+		rsnd_ssi_status_check(&ssi->mod, DIRQ);
-+
-+		/*
-+		 * disable SSI,
-+		 * and, wait idle state
-+		 */
-+		rsnd_mod_write(&ssi->mod, SSICR, cr);	/* disabled all */
-+		rsnd_ssi_status_check(&ssi->mod, IIRQ);
-+
-+		if (rsnd_rdai_is_clk_master(rdai)) {
-+			if (rsnd_ssi_clk_from_parent(ssi))
-+				rsnd_ssi_hw_stop(ssi->parent, rdai);
-+			else
-+				rsnd_ssi_master_clk_stop(ssi);
-+		}
-+
-+		clk_disable(ssi->clk);
-+	}
-+
-+	dev_dbg(dev, "ssi%d hw stopped\n", rsnd_mod_id(&ssi->mod));
-+}
-+
-+/*
-+ *	SSI mod common functions
-+ */
-+static int rsnd_ssi_init(struct rsnd_mod *mod,
-+			 struct rsnd_dai *rdai,
-+			 struct rsnd_dai_stream *io)
-+{
-+	struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
-+	struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
-+	struct device *dev = rsnd_priv_to_dev(priv);
-+	struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io);
-+	u32 cr;
-+
-+	cr = FORCE;
-+
-+	/*
-+	 * always use 32bit system word for easy clock calculation.
-+	 * see also rsnd_ssi_master_clk_enable()
-+	 */
-+	cr |= SWL_32;
-+
-+	/*
-+	 * init clock settings for SSICR
-+	 */
-+	switch (runtime->sample_bits) {
-+	case 16:
-+		cr |= DWL_16;
-+		break;
-+	case 32:
-+		cr |= DWL_24;
-+		break;
-+	default:
-+		return -EIO;
-+	}
-+
-+	if (rdai->bit_clk_inv)
-+		cr |= SCKP;
-+	if (rdai->frm_clk_inv)
-+		cr |= SWSP;
-+	if (rdai->data_alignment)
-+		cr |= SDTA;
-+	if (rdai->sys_delay)
-+		cr |= DEL;
-+	if (rsnd_dai_is_play(rdai, io))
-+		cr |= TRMD;
-+
-+	/*
-+	 * set ssi parameter
-+	 */
-+	ssi->rdai	= rdai;
-+	ssi->io		= io;
-+	ssi->cr_own	= cr;
-+	ssi->err	= -1; /* ignore 1st error */
-+
-+	rsnd_ssi_mode_set(ssi);
-+
-+	dev_dbg(dev, "%s.%d init\n", rsnd_mod_name(mod), rsnd_mod_id(mod));
-+
-+	return 0;
-+}
-+
-+static int rsnd_ssi_quit(struct rsnd_mod *mod,
-+			 struct rsnd_dai *rdai,
-+			 struct rsnd_dai_stream *io)
-+{
-+	struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
-+	struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
-+	struct device *dev = rsnd_priv_to_dev(priv);
-+
-+	dev_dbg(dev, "%s.%d quit\n", rsnd_mod_name(mod), rsnd_mod_id(mod));
-+
-+	if (ssi->err > 0)
-+		dev_warn(dev, "ssi under/over flow err = %d\n", ssi->err);
-+
-+	ssi->rdai	= NULL;
-+	ssi->io		= NULL;
-+	ssi->cr_own	= 0;
-+	ssi->err	= 0;
-+
-+	return 0;
-+}
-+
-+static void rsnd_ssi_record_error(struct rsnd_ssi *ssi, u32 status)
-+{
-+	/* under/over flow error */
-+	if (status & (UIRQ | OIRQ)) {
-+		ssi->err++;
-+
-+		/* clear error status */
-+		rsnd_mod_write(&ssi->mod, SSISR, 0);
-+	}
-+}
-+
-+/*
-+ *		SSI PIO
-+ */
-+static irqreturn_t rsnd_ssi_pio_interrupt(int irq, void *data)
-+{
-+	struct rsnd_ssi *ssi = data;
-+	struct rsnd_dai_stream *io = ssi->io;
-+	u32 status = rsnd_mod_read(&ssi->mod, SSISR);
-+	irqreturn_t ret = IRQ_NONE;
-+
-+	if (io && (status & DIRQ)) {
-+		struct rsnd_dai *rdai = ssi->rdai;
-+		struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io);
-+		u32 *buf = (u32 *)(runtime->dma_area +
-+				   rsnd_dai_pointer_offset(io, 0));
-+
-+		rsnd_ssi_record_error(ssi, status);
-+
-+		/*
-+		 * 8/16/32 data can be assesse to TDR/RDR register
-+		 * directly as 32bit data
-+		 * see rsnd_ssi_init()
-+		 */
-+		if (rsnd_dai_is_play(rdai, io))
-+			rsnd_mod_write(&ssi->mod, SSITDR, *buf);
-+		else
-+			*buf = rsnd_mod_read(&ssi->mod, SSIRDR);
-+
-+		rsnd_dai_pointer_update(io, sizeof(*buf));
-+
-+		ret = IRQ_HANDLED;
-+	}
-+
-+	return ret;
-+}
-+
-+static int rsnd_ssi_pio_start(struct rsnd_mod *mod,
-+			      struct rsnd_dai *rdai,
-+			      struct rsnd_dai_stream *io)
-+{
-+	struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
-+	struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
-+	struct device *dev = rsnd_priv_to_dev(priv);
-+
-+	/* enable PIO IRQ */
-+	ssi->cr_etc = UIEN | OIEN | DIEN;
-+
-+	rsnd_ssi_hw_start(ssi, rdai, io);
-+
-+	dev_dbg(dev, "%s.%d start\n", rsnd_mod_name(mod), rsnd_mod_id(mod));
-+
-+	return 0;
-+}
-+
-+static int rsnd_ssi_pio_stop(struct rsnd_mod *mod,
-+			     struct rsnd_dai *rdai,
-+			     struct rsnd_dai_stream *io)
-+{
-+	struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
-+	struct device *dev = rsnd_priv_to_dev(priv);
-+	struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
-+
-+	dev_dbg(dev, "%s.%d stop\n", rsnd_mod_name(mod), rsnd_mod_id(mod));
-+
-+	ssi->cr_etc = 0;
-+
-+	rsnd_ssi_hw_stop(ssi, rdai);
-+
-+	return 0;
-+}
-+
-+static struct rsnd_mod_ops rsnd_ssi_pio_ops = {
-+	.name	= "ssi (pio)",
-+	.init	= rsnd_ssi_init,
-+	.quit	= rsnd_ssi_quit,
-+	.start	= rsnd_ssi_pio_start,
-+	.stop	= rsnd_ssi_pio_stop,
-+};
-+
-+/*
-+ *		Non SSI
-+ */
-+static int rsnd_ssi_non(struct rsnd_mod *mod,
-+			struct rsnd_dai *rdai,
-+			struct rsnd_dai_stream *io)
-+{
-+	struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
-+	struct device *dev = rsnd_priv_to_dev(priv);
-+
-+	dev_dbg(dev, "%s\n", __func__);
-+
-+	return 0;
-+}
-+
-+static struct rsnd_mod_ops rsnd_ssi_non_ops = {
-+	.name	= "ssi (non)",
-+	.init	= rsnd_ssi_non,
-+	.quit	= rsnd_ssi_non,
-+	.start	= rsnd_ssi_non,
-+	.stop	= rsnd_ssi_non,
-+};
-+
-+/*
-+ *		ssi mod function
-+ */
-+struct rsnd_mod *rsnd_ssi_mod_get(struct rsnd_priv *priv, int id)
-+{
-+	BUG_ON(id < 0 || id >= rsnd_ssi_nr(priv));
-+
-+	return &(((struct rsnd_ssiu *)(priv->ssiu))->ssi + id)->mod;
-+}
-+
-+int rsnd_ssi_probe(struct platform_device *pdev,
-+		   struct rcar_snd_info *info,
-+		   struct rsnd_priv *priv)
-+{
-+	struct rsnd_ssi_platform_info *pinfo;
-+	struct device *dev = rsnd_priv_to_dev(priv);
-+	struct rsnd_mod_ops *ops;
-+	struct clk *clk;
-+	struct rsnd_ssiu *ssiu;
-+	struct rsnd_ssi *ssi;
-+	char name[RSND_SSI_NAME_SIZE];
-+	int i, nr, ret;
-+
-+	/*
-+	 *	init SSI
-+	 */
-+	nr	= info->ssi_info_nr;
-+	ssiu	= devm_kzalloc(dev, sizeof(*ssiu) + (sizeof(*ssi) * nr),
-+			       GFP_KERNEL);
-+	if (!ssiu) {
-+		dev_err(dev, "SSI allocate failed\n");
-+		return -ENOMEM;
-+	}
-+
-+	priv->ssiu	= ssiu;
-+	ssiu->ssi	= (struct rsnd_ssi *)(ssiu + 1);
-+	ssiu->ssi_nr	= nr;
-+
-+	for_each_rsnd_ssi(ssi, priv, i) {
-+		pinfo = &info->ssi_info[i];
-+
-+		snprintf(name, RSND_SSI_NAME_SIZE, "ssi.%d", i);
-+
-+		clk = clk_get(dev, name);
-+		if (IS_ERR(clk))
-+			return PTR_ERR(clk);
-+
-+		ssi->info	= pinfo;
-+		ssi->clk	= clk;
-+
-+		ops = &rsnd_ssi_non_ops;
-+
-+		/*
-+		 * SSI PIO case
-+		 */
-+		if (rsnd_ssi_is_pio(ssi)) {
-+			ret = devm_request_irq(dev, pinfo->pio_irq,
-+					       &rsnd_ssi_pio_interrupt,
-+					       IRQF_SHARED,
-+					       dev_name(dev), ssi);
-+			if (ret) {
-+				dev_err(dev, "SSI request interrupt failed\n");
-+				return ret;
-+			}
-+
-+			ops	= &rsnd_ssi_pio_ops;
-+		}
-+
-+		rsnd_mod_init(priv, &ssi->mod, ops, i);
-+	}
-+
-+	rsnd_ssi_mode_init(priv, ssiu);
-+
-+	dev_dbg(dev, "ssi probed\n");
-+
-+	return 0;
-+}
-+
-+void rsnd_ssi_remove(struct platform_device *pdev,
-+		   struct rsnd_priv *priv)
-+{
-+	struct rsnd_ssi *ssi;
-+	int i;
-+
-+	for_each_rsnd_ssi(ssi, priv, i)
-+		clk_put(ssi->clk);
-+}
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0093-sh-pfc-r8a7779-Replace-hardcoded-pin-numbers-with-RC.patch b/patches.renesas/0093-sh-pfc-r8a7779-Replace-hardcoded-pin-numbers-with-RC.patch
deleted file mode 100644
index d1072ee6b1c30..0000000000000
--- a/patches.renesas/0093-sh-pfc-r8a7779-Replace-hardcoded-pin-numbers-with-RC.patch
+++ /dev/null
@@ -1,1112 +0,0 @@
-From 0cf58a15a72fcdaf766772e38d9c2035f2180ff7 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Mon, 8 Apr 2013 12:05:31 +0200
-Subject: sh-pfc: r8a7779: Replace hardcoded pin numbers with RCAR_GP_PIN macro
-
-Use the RCAR_GP_PIN macro to convert from the documentation pin number
-space to the linear pinctrl space.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit e21ea1977ca37596bd1cfc0dcb230a7b21811b71)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7779.c | 300 +++++++++++++++++++----------------
- 1 file changed, 167 insertions(+), 133 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7779.c b/drivers/pinctrl/sh-pfc/pfc-r8a7779.c
-index 8cd90e7e..e1491a50 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7779.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7779.c
-@@ -19,6 +19,7 @@
-  */
- 
- #include <linux/kernel.h>
-+#include <linux/platform_data/gpio-rcar.h>
- 
- #include "sh_pfc.h"
- 
-@@ -1472,9 +1473,12 @@ static struct sh_pfc_pin pinmux_pins[] = {
- /* - DU0 -------------------------------------------------------------------- */
- static const unsigned int du0_rgb666_pins[] = {
- 	/* R[7:2], G[7:2], B[7:2] */
--	188, 187, 186, 185, 184, 183,
--	194, 193, 192, 191, 190, 189,
--	200, 199, 198, 197, 196, 195,
-+	RCAR_GP_PIN(5, 28), RCAR_GP_PIN(5, 27), RCAR_GP_PIN(5, 26),
-+	RCAR_GP_PIN(5, 25), RCAR_GP_PIN(5, 24), RCAR_GP_PIN(5, 23),
-+	RCAR_GP_PIN(6, 2),  RCAR_GP_PIN(6, 1),  RCAR_GP_PIN(6, 0),
-+	RCAR_GP_PIN(5, 31), RCAR_GP_PIN(5, 30), RCAR_GP_PIN(5, 29),
-+	RCAR_GP_PIN(6, 8),  RCAR_GP_PIN(6, 7),  RCAR_GP_PIN(6, 6),
-+	RCAR_GP_PIN(6, 5),  RCAR_GP_PIN(6, 4),  RCAR_GP_PIN(6, 3),
- };
- static const unsigned int du0_rgb666_mux[] = {
- 	DU0_DR7_MARK, DU0_DR6_MARK, DU0_DR5_MARK, DU0_DR4_MARK,
-@@ -1486,9 +1490,14 @@ static const unsigned int du0_rgb666_mux[] = {
- };
- static const unsigned int du0_rgb888_pins[] = {
- 	/* R[7:0], G[7:0], B[7:0] */
--	188, 187, 186, 185, 184, 183, 24, 23,
--	194, 193, 192, 191, 190, 189, 26, 25,
--	200, 199, 198, 197, 196, 195, 28, 27,
-+	RCAR_GP_PIN(5, 28), RCAR_GP_PIN(5, 27), RCAR_GP_PIN(5, 26),
-+	RCAR_GP_PIN(5, 25), RCAR_GP_PIN(5, 24), RCAR_GP_PIN(5, 23),
-+	RCAR_GP_PIN(0, 24), RCAR_GP_PIN(0, 23), RCAR_GP_PIN(6, 2),
-+	RCAR_GP_PIN(6, 1),  RCAR_GP_PIN(6, 0),  RCAR_GP_PIN(5, 31),
-+	RCAR_GP_PIN(5, 30), RCAR_GP_PIN(5, 29), RCAR_GP_PIN(0, 26),
-+	RCAR_GP_PIN(0, 25), RCAR_GP_PIN(6, 8),  RCAR_GP_PIN(6, 7),
-+	RCAR_GP_PIN(6, 6),  RCAR_GP_PIN(6, 5),  RCAR_GP_PIN(6, 4),
-+	RCAR_GP_PIN(6, 3),  RCAR_GP_PIN(0, 28), RCAR_GP_PIN(0, 27),
- };
- static const unsigned int du0_rgb888_mux[] = {
- 	DU0_DR7_MARK, DU0_DR6_MARK, DU0_DR5_MARK, DU0_DR4_MARK,
-@@ -1500,28 +1509,28 @@ static const unsigned int du0_rgb888_mux[] = {
- };
- static const unsigned int du0_clk_in_pins[] = {
- 	/* CLKIN */
--	29,
-+	RCAR_GP_PIN(0, 29),
- };
- static const unsigned int du0_clk_in_mux[] = {
- 	DU0_DOTCLKIN_MARK,
- };
- static const unsigned int du0_clk_out_0_pins[] = {
- 	/* CLKOUT */
--	180,
-+	RCAR_GP_PIN(5, 20),
- };
- static const unsigned int du0_clk_out_0_mux[] = {
- 	DU0_DOTCLKOUT0_MARK,
- };
- static const unsigned int du0_clk_out_1_pins[] = {
- 	/* CLKOUT */
--	30,
-+	RCAR_GP_PIN(0, 30),
- };
- static const unsigned int du0_clk_out_1_mux[] = {
- 	DU0_DOTCLKOUT1_MARK,
- };
- static const unsigned int du0_sync_0_pins[] = {
- 	/* VSYNC, HSYNC, DISP */
--	182, 181, 31,
-+	RCAR_GP_PIN(5, 22), RCAR_GP_PIN(5, 21), RCAR_GP_PIN(0, 31),
- };
- static const unsigned int du0_sync_0_mux[] = {
- 	DU0_EXHSYNC_DU0_HSYNC_MARK, DU0_EXVSYNC_DU0_VSYNC_MARK,
-@@ -1529,7 +1538,7 @@ static const unsigned int du0_sync_0_mux[] = {
- };
- static const unsigned int du0_sync_1_pins[] = {
- 	/* VSYNC, HSYNC, DISP */
--	182, 181, 32,
-+	RCAR_GP_PIN(5, 22), RCAR_GP_PIN(5, 21), RCAR_GP_PIN(1, 0),
- };
- static const unsigned int du0_sync_1_mux[] = {
- 	DU0_EXHSYNC_DU0_HSYNC_MARK, DU0_EXVSYNC_DU0_VSYNC_MARK,
-@@ -1537,14 +1546,14 @@ static const unsigned int du0_sync_1_mux[] = {
- };
- static const unsigned int du0_oddf_pins[] = {
- 	/* ODDF */
--	31,
-+	RCAR_GP_PIN(0, 31),
- };
- static const unsigned int du0_oddf_mux[] = {
- 	DU0_EXODDF_DU0_ODDF_DISP_CDE_MARK
- };
- static const unsigned int du0_cde_pins[] = {
- 	/* CDE */
--	33,
-+	RCAR_GP_PIN(1, 1),
- };
- static const unsigned int du0_cde_mux[] = {
- 	DU0_CDE_MARK
-@@ -1552,9 +1561,12 @@ static const unsigned int du0_cde_mux[] = {
- /* - DU1 -------------------------------------------------------------------- */
- static const unsigned int du1_rgb666_pins[] = {
- 	/* R[7:2], G[7:2], B[7:2] */
--	41, 40, 39, 38, 37, 36,
--	49, 48, 47, 46, 45, 44,
--	57, 56, 55, 54, 53, 52,
-+	RCAR_GP_PIN(1, 9),  RCAR_GP_PIN(1, 8),  RCAR_GP_PIN(1, 7),
-+	RCAR_GP_PIN(1, 6),  RCAR_GP_PIN(1, 5),  RCAR_GP_PIN(1, 4),
-+	RCAR_GP_PIN(1, 17), RCAR_GP_PIN(1, 16), RCAR_GP_PIN(1, 15),
-+	RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 13), RCAR_GP_PIN(1, 12),
-+	RCAR_GP_PIN(1, 25), RCAR_GP_PIN(1, 24), RCAR_GP_PIN(1, 23),
-+	RCAR_GP_PIN(1, 22), RCAR_GP_PIN(1, 21), RCAR_GP_PIN(1, 20),
- };
- static const unsigned int du1_rgb666_mux[] = {
- 	DU1_DR7_MARK, DU1_DR6_MARK, DU1_DR5_MARK, DU1_DR4_MARK,
-@@ -1566,9 +1578,14 @@ static const unsigned int du1_rgb666_mux[] = {
- };
- static const unsigned int du1_rgb888_pins[] = {
- 	/* R[7:0], G[7:0], B[7:0] */
--	41, 40, 39, 38, 37, 36, 35, 34,
--	49, 48, 47, 46, 45, 44, 43, 32,
--	57, 56, 55, 54, 53, 52, 51, 50,
-+	RCAR_GP_PIN(1, 9),  RCAR_GP_PIN(1, 8),  RCAR_GP_PIN(1, 7),
-+	RCAR_GP_PIN(1, 6),  RCAR_GP_PIN(1, 5),  RCAR_GP_PIN(1, 4),
-+	RCAR_GP_PIN(1, 3),  RCAR_GP_PIN(1, 2),  RCAR_GP_PIN(1, 17),
-+	RCAR_GP_PIN(1, 16), RCAR_GP_PIN(1, 15), RCAR_GP_PIN(1, 14),
-+	RCAR_GP_PIN(1, 13), RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 11),
-+	RCAR_GP_PIN(1, 0),  RCAR_GP_PIN(1, 25), RCAR_GP_PIN(1, 24),
-+	RCAR_GP_PIN(1, 23), RCAR_GP_PIN(1, 22), RCAR_GP_PIN(1, 21),
-+	RCAR_GP_PIN(1, 20), RCAR_GP_PIN(1, 19), RCAR_GP_PIN(1, 18),
- };
- static const unsigned int du1_rgb888_mux[] = {
- 	DU1_DR7_MARK, DU1_DR6_MARK, DU1_DR5_MARK, DU1_DR4_MARK,
-@@ -1580,21 +1597,21 @@ static const unsigned int du1_rgb888_mux[] = {
- };
- static const unsigned int du1_clk_in_pins[] = {
- 	/* CLKIN */
--	58,
-+	RCAR_GP_PIN(1, 26),
- };
- static const unsigned int du1_clk_in_mux[] = {
- 	DU1_DOTCLKIN_MARK,
- };
- static const unsigned int du1_clk_out_pins[] = {
- 	/* CLKOUT */
--	59,
-+	RCAR_GP_PIN(1, 27),
- };
- static const unsigned int du1_clk_out_mux[] = {
- 	DU1_DOTCLKOUT_MARK,
- };
- static const unsigned int du1_sync_0_pins[] = {
- 	/* VSYNC, HSYNC, DISP */
--	61, 60, 62,
-+	RCAR_GP_PIN(1, 29), RCAR_GP_PIN(1, 28), RCAR_GP_PIN(1, 30),
- };
- static const unsigned int du1_sync_0_mux[] = {
- 	DU1_EXVSYNC_DU1_VSYNC_MARK, DU1_EXHSYNC_DU1_HSYNC_MARK,
-@@ -1602,7 +1619,7 @@ static const unsigned int du1_sync_0_mux[] = {
- };
- static const unsigned int du1_sync_1_pins[] = {
- 	/* VSYNC, HSYNC, DISP */
--	61, 60, 63,
-+	RCAR_GP_PIN(1, 29), RCAR_GP_PIN(1, 28), RCAR_GP_PIN(1, 31),
- };
- static const unsigned int du1_sync_1_mux[] = {
- 	DU1_EXVSYNC_DU1_VSYNC_MARK, DU1_EXHSYNC_DU1_HSYNC_MARK,
-@@ -1610,14 +1627,14 @@ static const unsigned int du1_sync_1_mux[] = {
- };
- static const unsigned int du1_oddf_pins[] = {
- 	/* ODDF */
--	62,
-+	RCAR_GP_PIN(1, 30),
- };
- static const unsigned int du1_oddf_mux[] = {
- 	DU1_EXODDF_DU1_ODDF_DISP_CDE_MARK
- };
- static const unsigned int du1_cde_pins[] = {
- 	/* CDE */
--	64,
-+	RCAR_GP_PIN(2, 0),
- };
- static const unsigned int du1_cde_mux[] = {
- 	DU1_CDE_MARK
-@@ -1625,7 +1642,8 @@ static const unsigned int du1_cde_mux[] = {
- /* - HSPI0 ------------------------------------------------------------------ */
- static const unsigned int hspi0_pins[] = {
- 	/* CLK, CS, RX, TX */
--	150, 151, 153, 152,
-+	RCAR_GP_PIN(4, 22), RCAR_GP_PIN(4, 23), RCAR_GP_PIN(4, 25),
-+	RCAR_GP_PIN(4, 24),
- };
- static const unsigned int hspi0_mux[] = {
- 	HSPI_CLK0_MARK, HSPI_CS0_MARK, HSPI_RX0_MARK, HSPI_TX0_MARK,
-@@ -1633,28 +1651,32 @@ static const unsigned int hspi0_mux[] = {
- /* - HSPI1 ------------------------------------------------------------------ */
- static const unsigned int hspi1_pins[] = {
- 	/* CLK, CS, RX, TX */
--	63, 58, 64, 62,
-+	RCAR_GP_PIN(1, 31), RCAR_GP_PIN(1, 26), RCAR_GP_PIN(2, 0),
-+	RCAR_GP_PIN(1, 30),
- };
- static const unsigned int hspi1_mux[] = {
- 	HSPI_CLK1_MARK, HSPI_CS1_MARK, HSPI_RX1_MARK, HSPI_TX1_MARK,
- };
- static const unsigned int hspi1_b_pins[] = {
- 	/* CLK, CS, RX, TX */
--	90, 91, 93, 92,
-+	RCAR_GP_PIN(2, 26), RCAR_GP_PIN(2, 27), RCAR_GP_PIN(2, 29),
-+	RCAR_GP_PIN(2, 28),
- };
- static const unsigned int hspi1_b_mux[] = {
- 	HSPI_CLK1_B_MARK, HSPI_CS1_B_MARK, HSPI_RX1_B_MARK, HSPI_TX1_B_MARK,
- };
- static const unsigned int hspi1_c_pins[] = {
- 	/* CLK, CS, RX, TX */
--	141, 142, 144, 143,
-+	RCAR_GP_PIN(4, 13), RCAR_GP_PIN(4, 14), RCAR_GP_PIN(4, 16),
-+	RCAR_GP_PIN(4, 15),
- };
- static const unsigned int hspi1_c_mux[] = {
- 	HSPI_CLK1_C_MARK, HSPI_CS1_C_MARK, HSPI_RX1_C_MARK, HSPI_TX1_C_MARK,
- };
- static const unsigned int hspi1_d_pins[] = {
- 	/* CLK, CS, RX, TX */
--	101, 102, 104, 103,
-+	RCAR_GP_PIN(3, 5), RCAR_GP_PIN(3, 6), RCAR_GP_PIN(3, 8),
-+	RCAR_GP_PIN(3, 7),
- };
- static const unsigned int hspi1_d_mux[] = {
- 	HSPI_CLK1_D_MARK, HSPI_CS1_D_MARK, HSPI_RX1_D_MARK, HSPI_TX1_D_MARK,
-@@ -1662,14 +1684,16 @@ static const unsigned int hspi1_d_mux[] = {
- /* - HSPI2 ------------------------------------------------------------------ */
- static const unsigned int hspi2_pins[] = {
- 	/* CLK, CS, RX, TX */
--	9, 10, 11, 14,
-+	RCAR_GP_PIN(0, 9), RCAR_GP_PIN(0, 10), RCAR_GP_PIN(0, 11),
-+	RCAR_GP_PIN(0, 14),
- };
- static const unsigned int hspi2_mux[] = {
- 	HSPI_CLK2_MARK, HSPI_CS2_MARK, HSPI_RX2_MARK, HSPI_TX2_MARK,
- };
- static const unsigned int hspi2_b_pins[] = {
- 	/* CLK, CS, RX, TX */
--	7, 13, 8, 6,
-+	RCAR_GP_PIN(0, 7), RCAR_GP_PIN(0, 13), RCAR_GP_PIN(0, 8),
-+	RCAR_GP_PIN(0, 6),
- };
- static const unsigned int hspi2_b_mux[] = {
- 	HSPI_CLK2_B_MARK, HSPI_CS2_B_MARK, HSPI_RX2_B_MARK, HSPI_TX2_B_MARK,
-@@ -1677,56 +1701,56 @@ static const unsigned int hspi2_b_mux[] = {
- /* - INTC ------------------------------------------------------------------- */
- static const unsigned int intc_irq0_pins[] = {
- 	/* IRQ */
--	78,
-+	RCAR_GP_PIN(2, 14),
- };
- static const unsigned int intc_irq0_mux[] = {
- 	IRQ0_MARK,
- };
- static const unsigned int intc_irq0_b_pins[] = {
- 	/* IRQ */
--	141,
-+	RCAR_GP_PIN(4, 13),
- };
- static const unsigned int intc_irq0_b_mux[] = {
- 	IRQ0_B_MARK,
- };
- static const unsigned int intc_irq1_pins[] = {
- 	/* IRQ */
--	79,
-+	RCAR_GP_PIN(2, 15),
- };
- static const unsigned int intc_irq1_mux[] = {
- 	IRQ1_MARK,
- };
- static const unsigned int intc_irq1_b_pins[] = {
- 	/* IRQ */
--	142,
-+	RCAR_GP_PIN(4, 14),
- };
- static const unsigned int intc_irq1_b_mux[] = {
- 	IRQ1_B_MARK,
- };
- static const unsigned int intc_irq2_pins[] = {
- 	/* IRQ */
--	88,
-+	RCAR_GP_PIN(2, 24),
- };
- static const unsigned int intc_irq2_mux[] = {
- 	IRQ2_MARK,
- };
- static const unsigned int intc_irq2_b_pins[] = {
- 	/* IRQ */
--	143,
-+	RCAR_GP_PIN(4, 15),
- };
- static const unsigned int intc_irq2_b_mux[] = {
- 	IRQ2_B_MARK,
- };
- static const unsigned int intc_irq3_pins[] = {
- 	/* IRQ */
--	89,
-+	RCAR_GP_PIN(2, 25),
- };
- static const unsigned int intc_irq3_mux[] = {
- 	IRQ3_MARK,
- };
- static const unsigned int intc_irq3_b_pins[] = {
- 	/* IRQ */
--	144,
-+	RCAR_GP_PIN(4, 16),
- };
- static const unsigned int intc_irq3_b_mux[] = {
- 	IRQ3_B_MARK,
-@@ -1734,56 +1758,56 @@ static const unsigned int intc_irq3_b_mux[] = {
- /* - LSBC ------------------------------------------------------------------- */
- static const unsigned int lbsc_cs0_pins[] = {
- 	/* CS */
--	13,
-+	RCAR_GP_PIN(0, 13),
- };
- static const unsigned int lbsc_cs0_mux[] = {
- 	CS0_MARK,
- };
- static const unsigned int lbsc_cs1_pins[] = {
- 	/* CS */
--	14,
-+	RCAR_GP_PIN(0, 14),
- };
- static const unsigned int lbsc_cs1_mux[] = {
- 	CS1_A26_MARK,
- };
- static const unsigned int lbsc_ex_cs0_pins[] = {
- 	/* CS */
--	15,
-+	RCAR_GP_PIN(0, 15),
- };
- static const unsigned int lbsc_ex_cs0_mux[] = {
- 	EX_CS0_MARK,
- };
- static const unsigned int lbsc_ex_cs1_pins[] = {
- 	/* CS */
--	16,
-+	RCAR_GP_PIN(0, 16),
- };
- static const unsigned int lbsc_ex_cs1_mux[] = {
- 	EX_CS1_MARK,
- };
- static const unsigned int lbsc_ex_cs2_pins[] = {
- 	/* CS */
--	17,
-+	RCAR_GP_PIN(0, 17),
- };
- static const unsigned int lbsc_ex_cs2_mux[] = {
- 	EX_CS2_MARK,
- };
- static const unsigned int lbsc_ex_cs3_pins[] = {
- 	/* CS */
--	18,
-+	RCAR_GP_PIN(0, 18),
- };
- static const unsigned int lbsc_ex_cs3_mux[] = {
- 	EX_CS3_MARK,
- };
- static const unsigned int lbsc_ex_cs4_pins[] = {
- 	/* CS */
--	19,
-+	RCAR_GP_PIN(0, 19),
- };
- static const unsigned int lbsc_ex_cs4_mux[] = {
- 	EX_CS4_MARK,
- };
- static const unsigned int lbsc_ex_cs5_pins[] = {
- 	/* CS */
--	20,
-+	RCAR_GP_PIN(0, 20),
- };
- static const unsigned int lbsc_ex_cs5_mux[] = {
- 	EX_CS5_MARK,
-@@ -1791,21 +1815,24 @@ static const unsigned int lbsc_ex_cs5_mux[] = {
- /* - MMCIF ------------------------------------------------------------------ */
- static const unsigned int mmc0_data1_pins[] = {
- 	/* D[0] */
--	19,
-+	RCAR_GP_PIN(0, 19),
- };
- static const unsigned int mmc0_data1_mux[] = {
- 	MMC0_D0_MARK,
- };
- static const unsigned int mmc0_data4_pins[] = {
- 	/* D[0:3] */
--	19, 20, 21, 2,
-+	RCAR_GP_PIN(0, 19), RCAR_GP_PIN(0, 20), RCAR_GP_PIN(0, 21),
-+	RCAR_GP_PIN(0, 2),
- };
- static const unsigned int mmc0_data4_mux[] = {
- 	MMC0_D0_MARK, MMC0_D1_MARK, MMC0_D2_MARK, MMC0_D3_MARK,
- };
- static const unsigned int mmc0_data8_pins[] = {
- 	/* D[0:7] */
--	19, 20, 21, 2, 10, 11, 15, 16,
-+	RCAR_GP_PIN(0, 19), RCAR_GP_PIN(0, 20), RCAR_GP_PIN(0, 21),
-+	RCAR_GP_PIN(0, 2),  RCAR_GP_PIN(0, 10), RCAR_GP_PIN(0, 11),
-+	RCAR_GP_PIN(0, 15), RCAR_GP_PIN(0, 16),
- };
- static const unsigned int mmc0_data8_mux[] = {
- 	MMC0_D0_MARK, MMC0_D1_MARK, MMC0_D2_MARK, MMC0_D3_MARK,
-@@ -1813,28 +1840,31 @@ static const unsigned int mmc0_data8_mux[] = {
- };
- static const unsigned int mmc0_ctrl_pins[] = {
- 	/* CMD, CLK */
--	18, 17,
-+	RCAR_GP_PIN(0, 18), RCAR_GP_PIN(0, 17),
- };
- static const unsigned int mmc0_ctrl_mux[] = {
- 	MMC0_CMD_MARK, MMC0_CLK_MARK,
- };
- static const unsigned int mmc1_data1_pins[] = {
- 	/* D[0] */
--	72,
-+	RCAR_GP_PIN(2, 8),
- };
- static const unsigned int mmc1_data1_mux[] = {
- 	MMC1_D0_MARK,
- };
- static const unsigned int mmc1_data4_pins[] = {
- 	/* D[0:3] */
--	72, 73, 74, 75,
-+	RCAR_GP_PIN(2, 8), RCAR_GP_PIN(2, 9), RCAR_GP_PIN(2, 10),
-+	RCAR_GP_PIN(2, 11),
- };
- static const unsigned int mmc1_data4_mux[] = {
- 	MMC1_D0_MARK, MMC1_D1_MARK, MMC1_D2_MARK, MMC1_D3_MARK,
- };
- static const unsigned int mmc1_data8_pins[] = {
- 	/* D[0:7] */
--	72, 73, 74, 75, 76, 77, 80, 81,
-+	RCAR_GP_PIN(2, 8),  RCAR_GP_PIN(2, 9),  RCAR_GP_PIN(2, 10),
-+	RCAR_GP_PIN(2, 11), RCAR_GP_PIN(2, 12), RCAR_GP_PIN(2, 13),
-+	RCAR_GP_PIN(2, 16), RCAR_GP_PIN(2, 17),
- };
- static const unsigned int mmc1_data8_mux[] = {
- 	MMC1_D0_MARK, MMC1_D1_MARK, MMC1_D2_MARK, MMC1_D3_MARK,
-@@ -1842,7 +1872,7 @@ static const unsigned int mmc1_data8_mux[] = {
- };
- static const unsigned int mmc1_ctrl_pins[] = {
- 	/* CMD, CLK */
--	68, 65,
-+	RCAR_GP_PIN(2, 4), RCAR_GP_PIN(2, 1),
- };
- static const unsigned int mmc1_ctrl_mux[] = {
- 	MMC1_CMD_MARK, MMC1_CLK_MARK,
-@@ -1850,84 +1880,84 @@ static const unsigned int mmc1_ctrl_mux[] = {
- /* - SCIF0 ------------------------------------------------------------------ */
- static const unsigned int scif0_data_pins[] = {
- 	/* RXD, TXD */
--	153, 152,
-+	RCAR_GP_PIN(4, 25), RCAR_GP_PIN(4, 24),
- };
- static const unsigned int scif0_data_mux[] = {
- 	RX0_MARK, TX0_MARK,
- };
- static const unsigned int scif0_clk_pins[] = {
- 	/* SCK */
--	156,
-+	RCAR_GP_PIN(4, 28),
- };
- static const unsigned int scif0_clk_mux[] = {
- 	SCK0_MARK,
- };
- static const unsigned int scif0_ctrl_pins[] = {
- 	/* RTS, CTS */
--	151, 150,
-+	RCAR_GP_PIN(4, 23), RCAR_GP_PIN(4, 22),
- };
- static const unsigned int scif0_ctrl_mux[] = {
- 	RTS0_TANS_MARK, CTS0_MARK,
- };
- static const unsigned int scif0_data_b_pins[] = {
- 	/* RXD, TXD */
--	20, 19,
-+	RCAR_GP_PIN(0, 20), RCAR_GP_PIN(0, 19),
- };
- static const unsigned int scif0_data_b_mux[] = {
- 	RX0_B_MARK, TX0_B_MARK,
- };
- static const unsigned int scif0_clk_b_pins[] = {
- 	/* SCK */
--	33,
-+	RCAR_GP_PIN(1, 1),
- };
- static const unsigned int scif0_clk_b_mux[] = {
- 	SCK0_B_MARK,
- };
- static const unsigned int scif0_ctrl_b_pins[] = {
- 	/* RTS, CTS */
--	18, 11,
-+	RCAR_GP_PIN(0, 18), RCAR_GP_PIN(0, 11),
- };
- static const unsigned int scif0_ctrl_b_mux[] = {
- 	RTS0_B_TANS_B_MARK, CTS0_B_MARK,
- };
- static const unsigned int scif0_data_c_pins[] = {
- 	/* RXD, TXD */
--	146, 147,
-+	RCAR_GP_PIN(4, 18), RCAR_GP_PIN(4, 19),
- };
- static const unsigned int scif0_data_c_mux[] = {
- 	RX0_C_MARK, TX0_C_MARK,
- };
- static const unsigned int scif0_clk_c_pins[] = {
- 	/* SCK */
--	145,
-+	RCAR_GP_PIN(4, 17),
- };
- static const unsigned int scif0_clk_c_mux[] = {
- 	SCK0_C_MARK,
- };
- static const unsigned int scif0_ctrl_c_pins[] = {
- 	/* RTS, CTS */
--	149, 148,
-+	RCAR_GP_PIN(4, 21), RCAR_GP_PIN(4, 20),
- };
- static const unsigned int scif0_ctrl_c_mux[] = {
- 	RTS0_C_TANS_C_MARK, CTS0_C_MARK,
- };
- static const unsigned int scif0_data_d_pins[] = {
- 	/* RXD, TXD */
--	43, 42,
-+	RCAR_GP_PIN(1, 11), RCAR_GP_PIN(1, 10),
- };
- static const unsigned int scif0_data_d_mux[] = {
- 	RX0_D_MARK, TX0_D_MARK,
- };
- static const unsigned int scif0_clk_d_pins[] = {
- 	/* SCK */
--	50,
-+	RCAR_GP_PIN(1, 18),
- };
- static const unsigned int scif0_clk_d_mux[] = {
- 	SCK0_D_MARK,
- };
- static const unsigned int scif0_ctrl_d_pins[] = {
- 	/* RTS, CTS */
--	51, 35,
-+	RCAR_GP_PIN(1, 19), RCAR_GP_PIN(1, 3),
- };
- static const unsigned int scif0_ctrl_d_mux[] = {
- 	RTS0_D_TANS_D_MARK, CTS0_D_MARK,
-@@ -1935,63 +1965,63 @@ static const unsigned int scif0_ctrl_d_mux[] = {
- /* - SCIF1 ------------------------------------------------------------------ */
- static const unsigned int scif1_data_pins[] = {
- 	/* RXD, TXD */
--	149, 148,
-+	RCAR_GP_PIN(4, 21), RCAR_GP_PIN(4, 20),
- };
- static const unsigned int scif1_data_mux[] = {
- 	RX1_MARK, TX1_MARK,
- };
- static const unsigned int scif1_clk_pins[] = {
- 	/* SCK */
--	145,
-+	RCAR_GP_PIN(4, 17),
- };
- static const unsigned int scif1_clk_mux[] = {
- 	SCK1_MARK,
- };
- static const unsigned int scif1_ctrl_pins[] = {
- 	/* RTS, CTS */
--	147, 146,
-+	RCAR_GP_PIN(4, 19), RCAR_GP_PIN(4, 18),
- };
- static const unsigned int scif1_ctrl_mux[] = {
- 	RTS1_TANS_MARK, CTS1_MARK,
- };
- static const unsigned int scif1_data_b_pins[] = {
- 	/* RXD, TXD */
--	117, 114,
-+	RCAR_GP_PIN(3, 21), RCAR_GP_PIN(3, 18),
- };
- static const unsigned int scif1_data_b_mux[] = {
- 	RX1_B_MARK, TX1_B_MARK,
- };
- static const unsigned int scif1_clk_b_pins[] = {
- 	/* SCK */
--	113,
-+	RCAR_GP_PIN(3, 17),
- };
- static const unsigned int scif1_clk_b_mux[] = {
- 	SCK1_B_MARK,
- };
- static const unsigned int scif1_ctrl_b_pins[] = {
- 	/* RTS, CTS */
--	115, 116,
-+	RCAR_GP_PIN(3, 19), RCAR_GP_PIN(3, 20),
- };
- static const unsigned int scif1_ctrl_b_mux[] = {
- 	RTS1_B_TANS_B_MARK, CTS1_B_MARK,
- };
- static const unsigned int scif1_data_c_pins[] = {
- 	/* RXD, TXD */
--	67, 66,
-+	RCAR_GP_PIN(2, 3), RCAR_GP_PIN(2, 2),
- };
- static const unsigned int scif1_data_c_mux[] = {
- 	RX1_C_MARK, TX1_C_MARK,
- };
- static const unsigned int scif1_clk_c_pins[] = {
- 	/* SCK */
--	86,
-+	RCAR_GP_PIN(2, 22),
- };
- static const unsigned int scif1_clk_c_mux[] = {
- 	SCK1_C_MARK,
- };
- static const unsigned int scif1_ctrl_c_pins[] = {
- 	/* RTS, CTS */
--	69, 68,
-+	RCAR_GP_PIN(2, 5), RCAR_GP_PIN(2, 4),
- };
- static const unsigned int scif1_ctrl_c_mux[] = {
- 	RTS1_C_TANS_C_MARK, CTS1_C_MARK,
-@@ -1999,63 +2029,63 @@ static const unsigned int scif1_ctrl_c_mux[] = {
- /* - SCIF2 ------------------------------------------------------------------ */
- static const unsigned int scif2_data_pins[] = {
- 	/* RXD, TXD */
--	106, 105,
-+	RCAR_GP_PIN(3, 10), RCAR_GP_PIN(3, 9),
- };
- static const unsigned int scif2_data_mux[] = {
- 	RX2_MARK, TX2_MARK,
- };
- static const unsigned int scif2_clk_pins[] = {
- 	/* SCK */
--	107,
-+	RCAR_GP_PIN(3, 11),
- };
- static const unsigned int scif2_clk_mux[] = {
- 	SCK2_MARK,
- };
- static const unsigned int scif2_data_b_pins[] = {
- 	/* RXD, TXD */
--	120, 119,
-+	RCAR_GP_PIN(3, 24), RCAR_GP_PIN(3, 23),
- };
- static const unsigned int scif2_data_b_mux[] = {
- 	RX2_B_MARK, TX2_B_MARK,
- };
- static const unsigned int scif2_clk_b_pins[] = {
- 	/* SCK */
--	118,
-+	RCAR_GP_PIN(3, 22),
- };
- static const unsigned int scif2_clk_b_mux[] = {
- 	SCK2_B_MARK,
- };
- static const unsigned int scif2_data_c_pins[] = {
- 	/* RXD, TXD */
--	33, 31,
-+	RCAR_GP_PIN(1, 1), RCAR_GP_PIN(0, 31),
- };
- static const unsigned int scif2_data_c_mux[] = {
- 	RX2_C_MARK, TX2_C_MARK,
- };
- static const unsigned int scif2_clk_c_pins[] = {
- 	/* SCK */
--	32,
-+	RCAR_GP_PIN(1, 0),
- };
- static const unsigned int scif2_clk_c_mux[] = {
- 	SCK2_C_MARK,
- };
- static const unsigned int scif2_data_d_pins[] = {
- 	/* RXD, TXD */
--	64, 62,
-+	RCAR_GP_PIN(2, 0), RCAR_GP_PIN(1, 30),
- };
- static const unsigned int scif2_data_d_mux[] = {
- 	RX2_D_MARK, TX2_D_MARK,
- };
- static const unsigned int scif2_clk_d_pins[] = {
- 	/* SCK */
--	63,
-+	RCAR_GP_PIN(1, 31),
- };
- static const unsigned int scif2_clk_d_mux[] = {
- 	SCK2_D_MARK,
- };
- static const unsigned int scif2_data_e_pins[] = {
- 	/* RXD, TXD */
--	20, 19,
-+	RCAR_GP_PIN(0, 20), RCAR_GP_PIN(0, 19),
- };
- static const unsigned int scif2_data_e_mux[] = {
- 	RX2_E_MARK, TX2_E_MARK,
-@@ -2063,14 +2093,14 @@ static const unsigned int scif2_data_e_mux[] = {
- /* - SCIF3 ------------------------------------------------------------------ */
- static const unsigned int scif3_data_pins[] = {
- 	/* RXD, TXD */
--	137, 136,
-+	RCAR_GP_PIN(4, 9), RCAR_GP_PIN(4, 8),
- };
- static const unsigned int scif3_data_mux[] = {
- 	RX3_IRDA_RX_MARK, TX3_IRDA_TX_MARK,
- };
- static const unsigned int scif3_clk_pins[] = {
- 	/* SCK */
--	135,
-+	RCAR_GP_PIN(4, 7),
- };
- static const unsigned int scif3_clk_mux[] = {
- 	SCK3_MARK,
-@@ -2078,35 +2108,35 @@ static const unsigned int scif3_clk_mux[] = {
- 
- static const unsigned int scif3_data_b_pins[] = {
- 	/* RXD, TXD */
--	64, 62,
-+	RCAR_GP_PIN(2, 0), RCAR_GP_PIN(1, 30),
- };
- static const unsigned int scif3_data_b_mux[] = {
- 	RX3_B_IRDA_RX_B_MARK, TX3_B_IRDA_TX_B_MARK,
- };
- static const unsigned int scif3_data_c_pins[] = {
- 	/* RXD, TXD */
--	15, 12,
-+	RCAR_GP_PIN(0, 15), RCAR_GP_PIN(0, 12),
- };
- static const unsigned int scif3_data_c_mux[] = {
- 	RX3_C_IRDA_RX_C_MARK, TX3C_IRDA_TX_C_MARK,
- };
- static const unsigned int scif3_data_d_pins[] = {
- 	/* RXD, TXD */
--	30, 29,
-+	RCAR_GP_PIN(0, 30), RCAR_GP_PIN(0, 29),
- };
- static const unsigned int scif3_data_d_mux[] = {
- 	RX3_D_IRDA_RX_D_MARK, TX3_D_IRDA_TX_D_MARK,
- };
- static const unsigned int scif3_data_e_pins[] = {
- 	/* RXD, TXD */
--	35, 34,
-+	RCAR_GP_PIN(1, 3), RCAR_GP_PIN(1, 2),
- };
- static const unsigned int scif3_data_e_mux[] = {
- 	RX3_E_IRDA_RX_E_MARK, TX3_E_IRDA_TX_E_MARK,
- };
- static const unsigned int scif3_clk_e_pins[] = {
- 	/* SCK */
--	42,
-+	RCAR_GP_PIN(1, 10),
- };
- static const unsigned int scif3_clk_e_mux[] = {
- 	SCK3_E_MARK,
-@@ -2114,42 +2144,42 @@ static const unsigned int scif3_clk_e_mux[] = {
- /* - SCIF4 ------------------------------------------------------------------ */
- static const unsigned int scif4_data_pins[] = {
- 	/* RXD, TXD */
--	123, 122,
-+	RCAR_GP_PIN(3, 27), RCAR_GP_PIN(3, 26),
- };
- static const unsigned int scif4_data_mux[] = {
- 	RX4_MARK, TX4_MARK,
- };
- static const unsigned int scif4_clk_pins[] = {
- 	/* SCK */
--	121,
-+	RCAR_GP_PIN(3, 25),
- };
- static const unsigned int scif4_clk_mux[] = {
- 	SCK4_MARK,
- };
- static const unsigned int scif4_data_b_pins[] = {
- 	/* RXD, TXD */
--	111, 110,
-+	RCAR_GP_PIN(3, 15), RCAR_GP_PIN(3, 14),
- };
- static const unsigned int scif4_data_b_mux[] = {
- 	RX4_B_MARK, TX4_B_MARK,
- };
- static const unsigned int scif4_clk_b_pins[] = {
- 	/* SCK */
--	112,
-+	RCAR_GP_PIN(3, 16),
- };
- static const unsigned int scif4_clk_b_mux[] = {
- 	SCK4_B_MARK,
- };
- static const unsigned int scif4_data_c_pins[] = {
- 	/* RXD, TXD */
--	22, 21,
-+	RCAR_GP_PIN(0, 22), RCAR_GP_PIN(0, 21),
- };
- static const unsigned int scif4_data_c_mux[] = {
- 	RX4_C_MARK, TX4_C_MARK,
- };
- static const unsigned int scif4_data_d_pins[] = {
- 	/* RXD, TXD */
--	69, 68,
-+	RCAR_GP_PIN(2, 5), RCAR_GP_PIN(2, 4),
- };
- static const unsigned int scif4_data_d_mux[] = {
- 	RX4_D_MARK, TX4_D_MARK,
-@@ -2157,56 +2187,56 @@ static const unsigned int scif4_data_d_mux[] = {
- /* - SCIF5 ------------------------------------------------------------------ */
- static const unsigned int scif5_data_pins[] = {
- 	/* RXD, TXD */
--	51, 50,
-+	RCAR_GP_PIN(1, 19), RCAR_GP_PIN(1, 18),
- };
- static const unsigned int scif5_data_mux[] = {
- 	RX5_MARK, TX5_MARK,
- };
- static const unsigned int scif5_clk_pins[] = {
- 	/* SCK */
--	43,
-+	RCAR_GP_PIN(1, 11),
- };
- static const unsigned int scif5_clk_mux[] = {
- 	SCK5_MARK,
- };
- static const unsigned int scif5_data_b_pins[] = {
- 	/* RXD, TXD */
--	18, 11,
-+	RCAR_GP_PIN(0, 18), RCAR_GP_PIN(0, 11),
- };
- static const unsigned int scif5_data_b_mux[] = {
- 	RX5_B_MARK, TX5_B_MARK,
- };
- static const unsigned int scif5_clk_b_pins[] = {
- 	/* SCK */
--	19,
-+	RCAR_GP_PIN(0, 19),
- };
- static const unsigned int scif5_clk_b_mux[] = {
- 	SCK5_B_MARK,
- };
- static const unsigned int scif5_data_c_pins[] = {
- 	/* RXD, TXD */
--	24, 23,
-+	RCAR_GP_PIN(0, 24), RCAR_GP_PIN(0, 23),
- };
- static const unsigned int scif5_data_c_mux[] = {
- 	RX5_C_MARK, TX5_C_MARK,
- };
- static const unsigned int scif5_clk_c_pins[] = {
- 	/* SCK */
--	28,
-+	RCAR_GP_PIN(0, 28),
- };
- static const unsigned int scif5_clk_c_mux[] = {
- 	SCK5_C_MARK,
- };
- static const unsigned int scif5_data_d_pins[] = {
- 	/* RXD, TXD */
--	8, 6,
-+	RCAR_GP_PIN(0, 8), RCAR_GP_PIN(0, 6),
- };
- static const unsigned int scif5_data_d_mux[] = {
- 	RX5_D_MARK, TX5_D_MARK,
- };
- static const unsigned int scif5_clk_d_pins[] = {
- 	/* SCK */
--	7,
-+	RCAR_GP_PIN(0, 7),
- };
- static const unsigned int scif5_clk_d_mux[] = {
- 	SCK5_D_MARK,
-@@ -2214,35 +2244,36 @@ static const unsigned int scif5_clk_d_mux[] = {
- /* - SDHI0 ------------------------------------------------------------------ */
- static const unsigned int sdhi0_data1_pins[] = {
- 	/* D0 */
--	117,
-+	RCAR_GP_PIN(3, 21),
- };
- static const unsigned int sdhi0_data1_mux[] = {
- 	SD0_DAT0_MARK,
- };
- static const unsigned int sdhi0_data4_pins[] = {
- 	/* D[0:3] */
--	117, 118, 119, 120,
-+	RCAR_GP_PIN(3, 21), RCAR_GP_PIN(3, 22), RCAR_GP_PIN(3, 23),
-+	RCAR_GP_PIN(3, 24),
- };
- static const unsigned int sdhi0_data4_mux[] = {
- 	SD0_DAT0_MARK, SD0_DAT1_MARK, SD0_DAT2_MARK, SD0_DAT3_MARK,
- };
- static const unsigned int sdhi0_ctrl_pins[] = {
- 	/* CMD, CLK */
--	114, 113,
-+	RCAR_GP_PIN(3, 18), RCAR_GP_PIN(3, 17),
- };
- static const unsigned int sdhi0_ctrl_mux[] = {
- 	SD0_CMD_MARK, SD0_CLK_MARK,
- };
- static const unsigned int sdhi0_cd_pins[] = {
- 	/* CD */
--	115,
-+	RCAR_GP_PIN(3, 19),
- };
- static const unsigned int sdhi0_cd_mux[] = {
- 	SD0_CD_MARK,
- };
- static const unsigned int sdhi0_wp_pins[] = {
- 	/* WP */
--	116,
-+	RCAR_GP_PIN(3, 20),
- };
- static const unsigned int sdhi0_wp_mux[] = {
- 	SD0_WP_MARK,
-@@ -2250,35 +2281,36 @@ static const unsigned int sdhi0_wp_mux[] = {
- /* - SDHI1 ------------------------------------------------------------------ */
- static const unsigned int sdhi1_data1_pins[] = {
- 	/* D0 */
--	19,
-+	RCAR_GP_PIN(0, 19),
- };
- static const unsigned int sdhi1_data1_mux[] = {
- 	SD1_DAT0_MARK,
- };
- static const unsigned int sdhi1_data4_pins[] = {
- 	/* D[0:3] */
--	19, 20, 21, 2,
-+	RCAR_GP_PIN(0, 19), RCAR_GP_PIN(0, 20), RCAR_GP_PIN(0, 21),
-+	RCAR_GP_PIN(0, 2),
- };
- static const unsigned int sdhi1_data4_mux[] = {
- 	SD1_DAT0_MARK, SD1_DAT1_MARK, SD1_DAT2_MARK, SD1_DAT3_MARK,
- };
- static const unsigned int sdhi1_ctrl_pins[] = {
- 	/* CMD, CLK */
--	18, 17,
-+	RCAR_GP_PIN(0, 18), RCAR_GP_PIN(0, 17),
- };
- static const unsigned int sdhi1_ctrl_mux[] = {
- 	SD1_CMD_MARK, SD1_CLK_MARK,
- };
- static const unsigned int sdhi1_cd_pins[] = {
- 	/* CD */
--	10,
-+	RCAR_GP_PIN(0, 10),
- };
- static const unsigned int sdhi1_cd_mux[] = {
- 	SD1_CD_MARK,
- };
- static const unsigned int sdhi1_wp_pins[] = {
- 	/* WP */
--	11,
-+	RCAR_GP_PIN(0, 11),
- };
- static const unsigned int sdhi1_wp_mux[] = {
- 	SD1_WP_MARK,
-@@ -2286,35 +2318,36 @@ static const unsigned int sdhi1_wp_mux[] = {
- /* - SDHI2 ------------------------------------------------------------------ */
- static const unsigned int sdhi2_data1_pins[] = {
- 	/* D0 */
--	97,
-+	RCAR_GP_PIN(3, 1),
- };
- static const unsigned int sdhi2_data1_mux[] = {
- 	SD2_DAT0_MARK,
- };
- static const unsigned int sdhi2_data4_pins[] = {
- 	/* D[0:3] */
--	97, 98, 99, 100,
-+	RCAR_GP_PIN(3, 1), RCAR_GP_PIN(3, 2), RCAR_GP_PIN(3, 3),
-+	RCAR_GP_PIN(3, 4),
- };
- static const unsigned int sdhi2_data4_mux[] = {
- 	SD2_DAT0_MARK, SD2_DAT1_MARK, SD2_DAT2_MARK, SD2_DAT3_MARK,
- };
- static const unsigned int sdhi2_ctrl_pins[] = {
- 	/* CMD, CLK */
--	102, 101,
-+	RCAR_GP_PIN(3, 6), RCAR_GP_PIN(3, 5),
- };
- static const unsigned int sdhi2_ctrl_mux[] = {
- 	SD2_CMD_MARK, SD2_CLK_MARK,
- };
- static const unsigned int sdhi2_cd_pins[] = {
- 	/* CD */
--	103,
-+	RCAR_GP_PIN(3, 7),
- };
- static const unsigned int sdhi2_cd_mux[] = {
- 	SD2_CD_MARK,
- };
- static const unsigned int sdhi2_wp_pins[] = {
- 	/* WP */
--	104,
-+	RCAR_GP_PIN(3, 8),
- };
- static const unsigned int sdhi2_wp_mux[] = {
- 	SD2_WP_MARK,
-@@ -2322,35 +2355,36 @@ static const unsigned int sdhi2_wp_mux[] = {
- /* - SDHI3 ------------------------------------------------------------------ */
- static const unsigned int sdhi3_data1_pins[] = {
- 	/* D0 */
--	50,
-+	RCAR_GP_PIN(1, 18),
- };
- static const unsigned int sdhi3_data1_mux[] = {
- 	SD3_DAT0_MARK,
- };
- static const unsigned int sdhi3_data4_pins[] = {
- 	/* D[0:3] */
--	50, 51, 52, 53,
-+	RCAR_GP_PIN(1, 18), RCAR_GP_PIN(1, 19), RCAR_GP_PIN(1, 20),
-+	RCAR_GP_PIN(1, 21),
- };
- static const unsigned int sdhi3_data4_mux[] = {
- 	SD3_DAT0_MARK, SD3_DAT1_MARK, SD3_DAT2_MARK, SD3_DAT3_MARK,
- };
- static const unsigned int sdhi3_ctrl_pins[] = {
- 	/* CMD, CLK */
--	35, 34,
-+	RCAR_GP_PIN(1, 3), RCAR_GP_PIN(1, 2),
- };
- static const unsigned int sdhi3_ctrl_mux[] = {
- 	SD3_CMD_MARK, SD3_CLK_MARK,
- };
- static const unsigned int sdhi3_cd_pins[] = {
- 	/* CD */
--	62,
-+	RCAR_GP_PIN(1, 30),
- };
- static const unsigned int sdhi3_cd_mux[] = {
- 	SD3_CD_MARK,
- };
- static const unsigned int sdhi3_wp_pins[] = {
- 	/* WP */
--	64,
-+	RCAR_GP_PIN(2, 0),
- };
- static const unsigned int sdhi3_wp_mux[] = {
- 	SD3_WP_MARK,
-@@ -2358,14 +2392,14 @@ static const unsigned int sdhi3_wp_mux[] = {
- /* - USB0 ------------------------------------------------------------------- */
- static const unsigned int usb0_pins[] = {
- 	/* PENC */
--	154,
-+	RCAR_GP_PIN(4, 26),
- };
- static const unsigned int usb0_mux[] = {
- 	USB_PENC0_MARK,
- };
- static const unsigned int usb0_ovc_pins[] = {
- 	/* USB_OVC */
--	150
-+	RCAR_GP_PIN(4, 22),
- };
- static const unsigned int usb0_ovc_mux[] = {
- 	USB_OVC0_MARK,
-@@ -2373,14 +2407,14 @@ static const unsigned int usb0_ovc_mux[] = {
- /* - USB1 ------------------------------------------------------------------- */
- static const unsigned int usb1_pins[] = {
- 	/* PENC */
--	155,
-+	RCAR_GP_PIN(4, 27),
- };
- static const unsigned int usb1_mux[] = {
- 	USB_PENC1_MARK,
- };
- static const unsigned int usb1_ovc_pins[] = {
- 	/* USB_OVC */
--	152,
-+	RCAR_GP_PIN(4, 24),
- };
- static const unsigned int usb1_ovc_mux[] = {
- 	USB_OVC1_MARK,
-@@ -2388,14 +2422,14 @@ static const unsigned int usb1_ovc_mux[] = {
- /* - USB2 ------------------------------------------------------------------- */
- static const unsigned int usb2_pins[] = {
- 	/* PENC */
--	156,
-+	RCAR_GP_PIN(4, 28),
- };
- static const unsigned int usb2_mux[] = {
- 	USB_PENC2_MARK,
- };
- static const unsigned int usb2_ovc_pins[] = {
- 	/* USB_OVC */
--	125,
-+	RCAR_GP_PIN(3, 29),
- };
- static const unsigned int usb2_ovc_mux[] = {
- 	USB_OVC2_MARK,
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0094-ARM-shmobile-Add-r8a7790-clocks-for-thermal-devices.patch b/patches.renesas/0094-ARM-shmobile-Add-r8a7790-clocks-for-thermal-devices.patch
deleted file mode 100644
index 875f6b223cb5c..0000000000000
--- a/patches.renesas/0094-ARM-shmobile-Add-r8a7790-clocks-for-thermal-devices.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From eaff5fc99d6b3659ff2e38e2d62e62994e41fbbf Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Wed, 20 Nov 2013 16:59:39 +0900
-Subject: ARM: shmobile: Add r8a7790 clocks for thermal devices
-
-Add the r8a7790 DT thermal device to the legacy clocks.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 9654fd7322c378d5955b179c49bbedb3e1de55f3)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r8a7790.c | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
-index 571bffdf6089..d6669e946eef 100644
---- a/arch/arm/mach-shmobile/clock-r8a7790.c
-+++ b/arch/arm/mach-shmobile/clock-r8a7790.c
-@@ -286,6 +286,7 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_DEV_ID("e6530000.i2c", &mstp_clks[MSTP929]),
- 	CLKDEV_DEV_ID("e6540000.i2c", &mstp_clks[MSTP928]),
- 	CLKDEV_DEV_ID("r8a7790-ether", &mstp_clks[MSTP813]),
-+	CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]),
- 	CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
- 	CLKDEV_DEV_ID("ee200000.mmcif", &mstp_clks[MSTP315]),
- 	CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP315]),
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0094-ASoC-rcar-fix-return-value-check-in-rsnd_gen1_probe.patch b/patches.renesas/0094-ASoC-rcar-fix-return-value-check-in-rsnd_gen1_probe.patch
deleted file mode 100644
index 975fe513a2a53..0000000000000
--- a/patches.renesas/0094-ASoC-rcar-fix-return-value-check-in-rsnd_gen1_probe.patch
+++ /dev/null
@@ -1,56 +0,0 @@
-From fa3c1846eb14660b82c1b44745066c6635716135 Mon Sep 17 00:00:00 2001
-From: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
-Date: Tue, 30 Jul 2013 07:51:37 +0800
-Subject: ASoC: rcar: fix return value check in rsnd_gen1_probe()
-
-In case of error, the function devm_ioremap_resource() returns ERR_PTR()
-and never returns NULL. The NULL test in the return value check should be
-replaced with IS_ERR(), and also remove the dev_err call to avoid redundant
-error message.
-
-Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
-Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@linaro.org>
-(cherry picked from commit 70263cb474853c116f80713d468f3c17d805921c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/sh/rcar/gen.c | 17 ++++-------------
- 1 file changed, 4 insertions(+), 13 deletions(-)
-
-diff --git a/sound/soc/sh/rcar/gen.c b/sound/soc/sh/rcar/gen.c
-index 5e4ae0da4352..61232cd9908f 100644
---- a/sound/soc/sh/rcar/gen.c
-+++ b/sound/soc/sh/rcar/gen.c
-@@ -150,25 +150,16 @@ static int rsnd_gen1_probe(struct platform_device *pdev,
- 	sru_res	= platform_get_resource(pdev, IORESOURCE_MEM, RSND_GEN1_SRU);
- 	adg_res = platform_get_resource(pdev, IORESOURCE_MEM, RSND_GEN1_ADG);
- 	ssi_res	= platform_get_resource(pdev, IORESOURCE_MEM, RSND_GEN1_SSI);
--	if (!sru_res ||
--	    !adg_res ||
--	    !ssi_res) {
--		dev_err(dev, "Not enough SRU/SSI/ADG platform resources.\n");
--		return -ENODEV;
--	}
--
--	gen->ops = &rsnd_gen1_ops;
- 
- 	gen->base[RSND_GEN1_SRU] = devm_ioremap_resource(dev, sru_res);
- 	gen->base[RSND_GEN1_ADG] = devm_ioremap_resource(dev, adg_res);
- 	gen->base[RSND_GEN1_SSI] = devm_ioremap_resource(dev, ssi_res);
--	if (!gen->base[RSND_GEN1_SRU] ||
--	    !gen->base[RSND_GEN1_ADG] ||
--	    !gen->base[RSND_GEN1_SSI]) {
--		dev_err(dev, "SRU/SSI/ADG ioremap failed\n");
-+	if (IS_ERR(gen->base[RSND_GEN1_SRU]) ||
-+	    IS_ERR(gen->base[RSND_GEN1_ADG]) ||
-+	    IS_ERR(gen->base[RSND_GEN1_SSI]))
- 		return -ENODEV;
--	}
- 
-+	gen->ops = &rsnd_gen1_ops;
- 	rsnd_gen1_reg_map_init(gen);
- 
- 	dev_dbg(dev, "Gen1 device probed\n");
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0094-sh-pfc-r8a7779-use-RCAR_GP_PIN-on-_GP_GPIO-macro.patch b/patches.renesas/0094-sh-pfc-r8a7779-use-RCAR_GP_PIN-on-_GP_GPIO-macro.patch
deleted file mode 100644
index d1e80db34d0a9..0000000000000
--- a/patches.renesas/0094-sh-pfc-r8a7779-use-RCAR_GP_PIN-on-_GP_GPIO-macro.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From d61e104429792992114e0c76f45e8d1fc54e2ef0 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Tue, 9 Apr 2013 04:54:18 +0000
-Subject: sh-pfc: r8a7779: use RCAR_GP_PIN() on _GP_GPIO() macro
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit de9edf7d2c816c80337a79fc9d0cff8f4ceb42c0)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7779.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7779.c b/drivers/pinctrl/sh-pfc/pfc-r8a7779.c
-index e1491a50..1590d6ce 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7779.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7779.c
-@@ -80,7 +80,7 @@
- #define _GP_PORT_ALL(bank, pin, name, sfx)	name##_##sfx
- 
- #define _GP_GPIO(bank, pin, _name, sfx)					\
--	[(bank * 32) + pin] = {						\
-+	[RCAR_GP_PIN(bank, pin)] = {					\
- 		.name = __stringify(_name),				\
- 		.enum_id = _name##_DATA,				\
- 	}
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0095-ARM-shmobile-Add-r8a7791-thermal-platform-device.patch b/patches.renesas/0095-ARM-shmobile-Add-r8a7791-thermal-platform-device.patch
deleted file mode 100644
index 91aad1d362161..0000000000000
--- a/patches.renesas/0095-ARM-shmobile-Add-r8a7791-thermal-platform-device.patch
+++ /dev/null
@@ -1,52 +0,0 @@
-From 34cc86bfa01e28222923957f75584f0dccb64148 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Wed, 20 Nov 2013 16:59:56 +0900
-Subject: ARM: shmobile: Add r8a7791 thermal platform device
-
-Add a thermal platform device for the legacy case
-on the r8a7791 SoC. This keeps the r8a7791 in sync
-with the r8a7790 sister device.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 887e8407704bac6c3d22620b7afe65dc4adbbcae)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-r8a7791.c | 12 ++++++++++++
- 1 file changed, 12 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/setup-r8a7791.c b/arch/arm/mach-shmobile/setup-r8a7791.c
-index 59dd442f48ae..cddca99b434f 100644
---- a/arch/arm/mach-shmobile/setup-r8a7791.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7791.c
-@@ -189,6 +189,17 @@ static struct resource irqc0_resources[] = {
- 					  &irqc##idx##_data,		\
- 					  sizeof(struct renesas_irqc_config))
- 
-+static const struct resource thermal_resources[] __initconst = {
-+	DEFINE_RES_MEM(0xe61f0000, 0x14),
-+	DEFINE_RES_MEM(0xe61f0100, 0x38),
-+	DEFINE_RES_IRQ(gic_spi(69)),
-+};
-+
-+#define r8a7791_register_thermal()					\
-+	platform_device_register_simple("rcar_thermal", -1,		\
-+					thermal_resources,		\
-+					ARRAY_SIZE(thermal_resources))
-+
- void __init r8a7791_add_dt_devices(void)
- {
- 	r8a7791_register_scif(SCIFA0);
-@@ -213,6 +224,7 @@ void __init r8a7791_add_standard_devices(void)
- {
- 	r8a7791_add_dt_devices();
- 	r8a7791_register_irqc(0);
-+	r8a7791_register_thermal();
- }
- 
- void __init r8a7791_init_early(void)
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0095-ASoC-rsnd-remove-platform-dai-and-add-dai_id-on-plat.patch b/patches.renesas/0095-ASoC-rsnd-remove-platform-dai-and-add-dai_id-on-plat.patch
deleted file mode 100644
index e27e973e72286..0000000000000
--- a/patches.renesas/0095-ASoC-rsnd-remove-platform-dai-and-add-dai_id-on-plat.patch
+++ /dev/null
@@ -1,299 +0,0 @@
-From fd385ea49d8cf5f906210177747267ff88d4bd29 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Sun, 28 Jul 2013 18:58:29 -0700
-Subject: ASoC: rsnd: remove platform dai and add dai_id on platform setting
-
-Current rsnd driver is using struct rsnd_dai_platform_info
-so that indicate sound DAI information (playback/capture SSI ID).
-But, SSI settings were also required separately.
-Thus, platform settings was very un-understandable.
-This patch adds dai_id to SSI
-settings, and removed rsnd_dai_platform_info.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@linaro.org>
-(cherry picked from commit 4b4dab82340d969521f4f86108441cb597c8595d)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- include/sound/rcar_snd.h | 18 ++++++++-------
- sound/soc/sh/rcar/core.c | 60 +++++++++++++++++++++++++++++++++---------------
- sound/soc/sh/rcar/gen.c  | 10 ++++----
- sound/soc/sh/rcar/rsnd.h |  3 +++
- sound/soc/sh/rcar/ssi.c  | 22 ++++++++++++++++++
- 5 files changed, 82 insertions(+), 31 deletions(-)
-
-diff --git a/include/sound/rcar_snd.h b/include/sound/rcar_snd.h
-index 99d8dd029906..33233edd1664 100644
---- a/include/sound/rcar_snd.h
-+++ b/include/sound/rcar_snd.h
-@@ -28,15 +28,24 @@
- /*
-  * flags
-  *
-- * 0xA0000000
-+ * 0xAB000000
-  *
-  * A : clock sharing settings
-+ * B : SSI direction
-  */
- #define RSND_SSI_CLK_PIN_SHARE		(1 << 31)
- #define RSND_SSI_CLK_FROM_ADG		(1 << 30) /* clock parent is master */
- #define RSND_SSI_SYNC			(1 << 29) /* SSI34_sync etc */
- 
-+#define RSND_SSI_PLAY			(1 << 24)
-+
-+#define RSND_SSI_SET(_dai_id, _pio_irq, _flags) \
-+{ .dai_id = _dai_id, .pio_irq = _pio_irq, .flags = _flags }
-+#define RSND_SSI_UNUSED \
-+{ .dai_id = -1, .pio_irq = -1, .flags = 0 }
-+
- struct rsnd_ssi_platform_info {
-+	int dai_id;
- 	int pio_irq;
- 	u32 flags;
- };
-@@ -45,11 +54,6 @@ struct rsnd_scu_platform_info {
- 	u32 flags;
- };
- 
--struct rsnd_dai_platform_info {
--	int ssi_id_playback;
--	int ssi_id_capture;
--};
--
- /*
-  * flags
-  *
-@@ -66,8 +70,6 @@ struct rcar_snd_info {
- 	int ssi_info_nr;
- 	struct rsnd_scu_platform_info *scu_info;
- 	int scu_info_nr;
--	struct rsnd_dai_platform_info *dai_info;
--	int dai_info_nr;
- 	int (*start)(int id);
- 	int (*stop)(int id);
- };
-diff --git a/sound/soc/sh/rcar/core.c b/sound/soc/sh/rcar/core.c
-index 9a5469d3f352..420d6df9c3d0 100644
---- a/sound/soc/sh/rcar/core.c
-+++ b/sound/soc/sh/rcar/core.c
-@@ -219,6 +219,16 @@ int rsnd_dai_disconnect(struct rsnd_mod *mod)
- 	return 0;
- }
- 
-+int rsnd_dai_id(struct rsnd_priv *priv, struct rsnd_dai *rdai)
-+{
-+	int id = rdai - priv->rdai;
-+
-+	if ((id < 0) || (id >= rsnd_dai_nr(priv)))
-+		return -EINVAL;
-+
-+	return id;
-+}
-+
- struct rsnd_dai *rsnd_dai_get(struct rsnd_priv *priv, int id)
- {
- 	return priv->rdai + id;
-@@ -315,9 +325,10 @@ static int rsnd_soc_dai_trigger(struct snd_pcm_substream *substream, int cmd,
- 	struct rsnd_priv *priv = snd_soc_dai_get_drvdata(dai);
- 	struct rsnd_dai *rdai = rsnd_dai_to_rdai(dai);
- 	struct rsnd_dai_stream *io = rsnd_rdai_to_io(rdai, substream);
--	struct rsnd_dai_platform_info *info = rsnd_dai_get_platform_info(rdai);
--	int ssi_id = rsnd_dai_is_play(rdai, io) ?	info->ssi_id_playback :
--							info->ssi_id_capture;
-+	struct rsnd_mod *mod = rsnd_ssi_mod_get_frm_dai(priv,
-+						rsnd_dai_id(priv, rdai),
-+						rsnd_dai_is_play(rdai, io));
-+	int ssi_id = rsnd_mod_id(mod);
- 	int ret;
- 	unsigned long flags;
- 
-@@ -439,10 +450,24 @@ static int rsnd_dai_probe(struct platform_device *pdev,
- {
- 	struct snd_soc_dai_driver *drv;
- 	struct rsnd_dai *rdai;
-+	struct rsnd_mod *pmod, *cmod;
- 	struct device *dev = rsnd_priv_to_dev(priv);
--	struct rsnd_dai_platform_info *dai_info;
--	int dai_nr = info->dai_info_nr;
--	int i, pid, cid;
-+	int dai_nr;
-+	int i;
-+
-+	/* get max dai nr */
-+	for (dai_nr = 0; dai_nr < 32; dai_nr++) {
-+		pmod = rsnd_ssi_mod_get_frm_dai(priv, dai_nr, 1);
-+		cmod = rsnd_ssi_mod_get_frm_dai(priv, dai_nr, 0);
-+
-+		if (!pmod && !cmod)
-+			break;
-+	}
-+
-+	if (!dai_nr) {
-+		dev_err(dev, "no dai\n");
-+		return -EIO;
-+	}
- 
- 	drv  = devm_kzalloc(dev, sizeof(*drv)  * dai_nr, GFP_KERNEL);
- 	rdai = devm_kzalloc(dev, sizeof(*rdai) * dai_nr, GFP_KERNEL);
-@@ -452,10 +477,9 @@ static int rsnd_dai_probe(struct platform_device *pdev,
- 	}
- 
- 	for (i = 0; i < dai_nr; i++) {
--		dai_info = &info->dai_info[i];
- 
--		pid = dai_info->ssi_id_playback;
--		cid = dai_info->ssi_id_capture;
-+		pmod = rsnd_ssi_mod_get_frm_dai(priv, i, 1);
-+		cmod = rsnd_ssi_mod_get_frm_dai(priv, i, 0);
- 
- 		/*
- 		 *	init rsnd_dai
-@@ -463,8 +487,6 @@ static int rsnd_dai_probe(struct platform_device *pdev,
- 		INIT_LIST_HEAD(&rdai[i].playback.head);
- 		INIT_LIST_HEAD(&rdai[i].capture.head);
- 
--		rdai[i].info = dai_info;
--
- 		snprintf(rdai[i].name, RSND_DAI_NAME_SIZE, "rsnd-dai.%d", i);
- 
- 		/*
-@@ -472,20 +494,22 @@ static int rsnd_dai_probe(struct platform_device *pdev,
- 		 */
- 		drv[i].name	= rdai[i].name;
- 		drv[i].ops	= &rsnd_soc_dai_ops;
--		if (pid >= 0) {
-+		if (pmod) {
- 			drv[i].playback.rates		= RSND_RATES;
- 			drv[i].playback.formats		= RSND_FMTS;
- 			drv[i].playback.channels_min	= 2;
- 			drv[i].playback.channels_max	= 2;
- 		}
--		if (cid >= 0) {
-+		if (cmod) {
- 			drv[i].capture.rates		= RSND_RATES;
- 			drv[i].capture.formats		= RSND_FMTS;
- 			drv[i].capture.channels_min	= 2;
- 			drv[i].capture.channels_max	= 2;
- 		}
- 
--		dev_dbg(dev, "%s (%d, %d) probed", rdai[i].name, pid, cid);
-+		dev_dbg(dev, "%s (%s/%s)\n", rdai[i].name,
-+			pmod ? "play"    : " -- ",
-+			cmod ? "capture" : "  --   ");
- 	}
- 
- 	priv->dai_nr	= dai_nr;
-@@ -627,10 +651,6 @@ static int rsnd_probe(struct platform_device *pdev)
- 	if (ret < 0)
- 		return ret;
- 
--	ret = rsnd_dai_probe(pdev, info, priv);
--	if (ret < 0)
--		return ret;
--
- 	ret = rsnd_scu_probe(pdev, info, priv);
- 	if (ret < 0)
- 		return ret;
-@@ -643,6 +663,10 @@ static int rsnd_probe(struct platform_device *pdev)
- 	if (ret < 0)
- 		return ret;
- 
-+	ret = rsnd_dai_probe(pdev, info, priv);
-+	if (ret < 0)
-+		return ret;
-+
- 	/*
- 	 *	asoc register
- 	 */
-diff --git a/sound/soc/sh/rcar/gen.c b/sound/soc/sh/rcar/gen.c
-index 61232cd9908f..460c57eef267 100644
---- a/sound/soc/sh/rcar/gen.c
-+++ b/sound/soc/sh/rcar/gen.c
-@@ -49,7 +49,6 @@ static int rsnd_gen1_path_init(struct rsnd_priv *priv,
- 			       struct rsnd_dai *rdai,
- 			       struct rsnd_dai_stream *io)
- {
--	struct rsnd_dai_platform_info *info = rsnd_dai_get_platform_info(rdai);
- 	struct rsnd_mod *mod;
- 	int ret;
- 	int id;
-@@ -67,10 +66,11 @@ static int rsnd_gen1_path_init(struct rsnd_priv *priv,
- 	 * Then, SSI id = SCU id here
- 	 */
- 
--	if (rsnd_dai_is_play(rdai, io))
--		id = info->ssi_id_playback;
--	else
--		id = info->ssi_id_capture;
-+	/* get SSI's ID */
-+	mod = rsnd_ssi_mod_get_frm_dai(priv,
-+				       rsnd_dai_id(priv, rdai),
-+				       rsnd_dai_is_play(rdai, io));
-+	id = rsnd_mod_id(mod);
- 
- 	/* SSI */
- 	mod = rsnd_ssi_mod_get(priv, id);
-diff --git a/sound/soc/sh/rcar/rsnd.h b/sound/soc/sh/rcar/rsnd.h
-index 0e7727cc41db..9243e387104c 100644
---- a/sound/soc/sh/rcar/rsnd.h
-+++ b/sound/soc/sh/rcar/rsnd.h
-@@ -157,6 +157,7 @@ int rsnd_dai_disconnect(struct rsnd_mod *mod);
- int rsnd_dai_connect(struct rsnd_dai *rdai, struct rsnd_mod *mod,
- 		     struct rsnd_dai_stream *io);
- int rsnd_dai_is_play(struct rsnd_dai *rdai, struct rsnd_dai_stream *io);
-+int rsnd_dai_id(struct rsnd_priv *priv, struct rsnd_dai *rdai);
- #define rsnd_dai_get_platform_info(rdai) ((rdai)->info)
- #define rsnd_io_to_runtime(io) ((io)->substream->runtime)
- 
-@@ -254,5 +255,7 @@ int rsnd_ssi_probe(struct platform_device *pdev,
- void rsnd_ssi_remove(struct platform_device *pdev,
- 		   struct rsnd_priv *priv);
- struct rsnd_mod *rsnd_ssi_mod_get(struct rsnd_priv *priv, int id);
-+struct rsnd_mod *rsnd_ssi_mod_get_frm_dai(struct rsnd_priv *priv,
-+					  int dai_id, int is_play);
- 
- #endif
-diff --git a/sound/soc/sh/rcar/ssi.c b/sound/soc/sh/rcar/ssi.c
-index 061ac7e88309..c48a6c7cd08e 100644
---- a/sound/soc/sh/rcar/ssi.c
-+++ b/sound/soc/sh/rcar/ssi.c
-@@ -87,6 +87,7 @@ struct rsnd_ssiu {
- #define rsnd_ssi_clk_from_parent(ssi) ((ssi)->parent)
- #define rsnd_rdai_is_clk_master(rdai) ((rdai)->clk_master)
- #define rsnd_ssi_mode_flags(p) ((p)->info->flags)
-+#define rsnd_ssi_dai_id(ssi) ((ssi)->info->dai_id)
- #define rsnd_ssi_to_ssiu(ssi)\
- 	(((struct rsnd_ssiu *)((ssi) - rsnd_mod_id(&(ssi)->mod))) - 1)
- 
-@@ -502,6 +503,27 @@ static struct rsnd_mod_ops rsnd_ssi_non_ops = {
- /*
-  *		ssi mod function
-  */
-+struct rsnd_mod *rsnd_ssi_mod_get_frm_dai(struct rsnd_priv *priv,
-+					  int dai_id, int is_play)
-+{
-+	struct rsnd_ssi *ssi;
-+	int i, has_play;
-+
-+	is_play = !!is_play;
-+
-+	for_each_rsnd_ssi(ssi, priv, i) {
-+		if (rsnd_ssi_dai_id(ssi) != dai_id)
-+			continue;
-+
-+		has_play = !!(rsnd_ssi_mode_flags(ssi) & RSND_SSI_PLAY);
-+
-+		if (is_play == has_play)
-+			return &ssi->mod;
-+	}
-+
-+	return NULL;
-+}
-+
- struct rsnd_mod *rsnd_ssi_mod_get(struct rsnd_priv *priv, int id)
- {
- 	BUG_ON(id < 0 || id >= rsnd_ssi_nr(priv));
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0095-sh-pfc-r8a7779-add-VIN-pin-groups.patch b/patches.renesas/0095-sh-pfc-r8a7779-add-VIN-pin-groups.patch
deleted file mode 100644
index 35d39e0a28a9a..0000000000000
--- a/patches.renesas/0095-sh-pfc-r8a7779-add-VIN-pin-groups.patch
+++ /dev/null
@@ -1,211 +0,0 @@
-From 2476790ccfb5824df1b9f63bce8a5ca41d9d37fb Mon Sep 17 00:00:00 2001
-From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
-Date: Tue, 16 Apr 2013 22:17:28 +0000
-Subject: sh-pfc: r8a7779: add VIN pin groups
-
-Add VIN DATA[0:7]/CLK/HSYNC/VSYNC pin groups to R8A7779 PFC driver.
-
-Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Acked-by: Linus Walleij <linus.walleij@linaro.org>
-[horms+renesas@verge.net.au: trivial rebase on top of
- "sh-pfc: r8a7779: Don't group USB OVC and PENC pins"]
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-(cherry picked from commit 54ee73c6f52c506fce83328ab902f375b9af472f)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7779.c | 147 ++++++++++++++++++++++++++++++++++-
- 1 file changed, 146 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7779.c b/drivers/pinctrl/sh-pfc/pfc-r8a7779.c
-index 1590d6ce..37ba5719 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7779.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7779.c
-@@ -1,8 +1,9 @@
- /*
-  * r8a7779 processor support - PFC hardware block
-  *
-- * Copyright (C) 2011  Renesas Solutions Corp.
-+ * Copyright (C) 2011, 2013  Renesas Solutions Corp.
-  * Copyright (C) 2011  Magnus Damm
-+ * Copyright (C) 2013  Cogent Embedded, Inc.
-  *
-  * This program is free software; you can redistribute it and/or modify
-  * it under the terms of the GNU General Public License as published by
-@@ -2434,6 +2435,110 @@ static const unsigned int usb2_ovc_pins[] = {
- static const unsigned int usb2_ovc_mux[] = {
- 	USB_OVC2_MARK,
- };
-+/* - VIN0 ------------------------------------------------------------------- */
-+static const unsigned int vin0_data8_pins[] = {
-+	/* D[0:7] */
-+	RCAR_GP_PIN(2, 6),  RCAR_GP_PIN(2, 7),  RCAR_GP_PIN(2, 8),
-+	RCAR_GP_PIN(2, 9),  RCAR_GP_PIN(2, 10), RCAR_GP_PIN(2, 11),
-+	RCAR_GP_PIN(2, 12), RCAR_GP_PIN(2, 13),
-+};
-+static const unsigned int vin0_data8_mux[] = {
-+	VI0_DATA0_VI0_B0_MARK, VI0_DATA1_VI0_B1_MARK, VI0_DATA2_VI0_B2_MARK,
-+	VI0_DATA3_VI0_B3_MARK, VI0_DATA4_VI0_B4_MARK, VI0_DATA5_VI0_B5_MARK,
-+	VI0_DATA6_VI0_B6_MARK, VI0_DATA7_VI0_B7_MARK,
-+};
-+static const unsigned int vin0_clk_pins[] = {
-+	/* CLK */
-+	RCAR_GP_PIN(2, 1),
-+};
-+static const unsigned int vin0_clk_mux[] = {
-+	VI0_CLK_MARK,
-+};
-+static const unsigned int vin0_sync_pins[] = {
-+	/* HSYNC, VSYNC */
-+	RCAR_GP_PIN(2, 4), RCAR_GP_PIN(2, 5),
-+};
-+static const unsigned int vin0_sync_mux[] = {
-+	VI0_HSYNC_MARK, VI0_VSYNC_MARK,
-+};
-+/* - VIN1 ------------------------------------------------------------------- */
-+static const unsigned int vin1_data8_pins[] = {
-+	/* D[0:7] */
-+	RCAR_GP_PIN(3, 1), RCAR_GP_PIN(3, 2), RCAR_GP_PIN(3, 3),
-+	RCAR_GP_PIN(3, 4), RCAR_GP_PIN(3, 5), RCAR_GP_PIN(3, 6),
-+	RCAR_GP_PIN(3, 7), RCAR_GP_PIN(3, 8),
-+};
-+static const unsigned int vin1_data8_mux[] = {
-+	VI1_DATA0_VI1_B0_MARK, VI1_DATA1_VI1_B1_MARK, VI1_DATA2_VI1_B2_MARK,
-+	VI1_DATA3_VI1_B3_MARK, VI1_DATA4_VI1_B4_MARK, VI1_DATA5_VI1_B5_MARK,
-+	VI1_DATA6_VI1_B6_MARK, VI1_DATA7_VI1_B7_MARK,
-+};
-+static const unsigned int vin1_clk_pins[] = {
-+	/* CLK */
-+	RCAR_GP_PIN(2, 30),
-+};
-+static const unsigned int vin1_clk_mux[] = {
-+	VI1_CLK_MARK,
-+};
-+static const unsigned int vin1_sync_pins[] = {
-+	/* HSYNC, VSYNC */
-+	RCAR_GP_PIN(2, 31), RCAR_GP_PIN(3, 0),
-+};
-+static const unsigned int vin1_sync_mux[] = {
-+	VI1_HSYNC_MARK, VI1_VSYNC_MARK,
-+};
-+/* - VIN2 ------------------------------------------------------------------- */
-+static const unsigned int vin2_data8_pins[] = {
-+	/* D[0:7] */
-+	RCAR_GP_PIN(1, 2),  RCAR_GP_PIN(1, 3),  RCAR_GP_PIN(1, 10),
-+	RCAR_GP_PIN(1, 11), RCAR_GP_PIN(1, 18), RCAR_GP_PIN(1, 19),
-+	RCAR_GP_PIN(1, 31), RCAR_GP_PIN(2, 0),
-+};
-+static const unsigned int vin2_data8_mux[] = {
-+	VI2_DATA0_VI2_B0_MARK, VI2_DATA1_VI2_B1_MARK, VI2_DATA2_VI2_B2_MARK,
-+	VI2_DATA3_VI2_B3_MARK, VI2_DATA4_VI2_B4_MARK, VI2_DATA5_VI2_B5_MARK,
-+	VI2_DATA6_VI2_B6_MARK, VI2_DATA7_VI2_B7_MARK,
-+};
-+static const unsigned int vin2_clk_pins[] = {
-+	/* CLK */
-+	RCAR_GP_PIN(1, 30),
-+};
-+static const unsigned int vin2_clk_mux[] = {
-+	VI2_CLK_MARK,
-+};
-+static const unsigned int vin2_sync_pins[] = {
-+	/* HSYNC, VSYNC */
-+	RCAR_GP_PIN(1, 28), RCAR_GP_PIN(1, 29),
-+};
-+static const unsigned int vin2_sync_mux[] = {
-+	VI2_HSYNC_MARK, VI2_VSYNC_MARK,
-+};
-+/* - VIN3 ------------------------------------------------------------------- */
-+static const unsigned int vin3_data8_pins[] = {
-+	/* D[0:7] */
-+	RCAR_GP_PIN(3, 9),  RCAR_GP_PIN(3, 10), RCAR_GP_PIN(3, 11),
-+	RCAR_GP_PIN(3, 12), RCAR_GP_PIN(3, 13), RCAR_GP_PIN(3, 14),
-+	RCAR_GP_PIN(3, 15), RCAR_GP_PIN(3, 16),
-+};
-+static const unsigned int vin3_data8_mux[] = {
-+	VI3_DATA0_MARK, VI3_DATA1_MARK, VI3_DATA2_MARK,
-+	VI3_DATA3_MARK, VI3_DATA4_MARK, VI3_DATA5_MARK,
-+	VI3_DATA6_MARK, VI3_DATA7_MARK,
-+};
-+static const unsigned int vin3_clk_pins[] = {
-+	/* CLK */
-+	RCAR_GP_PIN(2, 31),
-+};
-+static const unsigned int vin3_clk_mux[] = {
-+	VI3_CLK_MARK,
-+};
-+static const unsigned int vin3_sync_pins[] = {
-+	/* HSYNC, VSYNC */
-+	RCAR_GP_PIN(1, 28), RCAR_GP_PIN(1, 29),
-+};
-+static const unsigned int vin3_sync_mux[] = {
-+	VI3_HSYNC_MARK, VI3_VSYNC_MARK,
-+};
- 
- static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(du0_rgb666),
-@@ -2561,6 +2666,18 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(usb1_ovc),
- 	SH_PFC_PIN_GROUP(usb2),
- 	SH_PFC_PIN_GROUP(usb2_ovc),
-+	SH_PFC_PIN_GROUP(vin0_data8),
-+	SH_PFC_PIN_GROUP(vin0_clk),
-+	SH_PFC_PIN_GROUP(vin0_sync),
-+	SH_PFC_PIN_GROUP(vin1_data8),
-+	SH_PFC_PIN_GROUP(vin1_clk),
-+	SH_PFC_PIN_GROUP(vin1_sync),
-+	SH_PFC_PIN_GROUP(vin2_data8),
-+	SH_PFC_PIN_GROUP(vin2_clk),
-+	SH_PFC_PIN_GROUP(vin2_sync),
-+	SH_PFC_PIN_GROUP(vin3_data8),
-+	SH_PFC_PIN_GROUP(vin3_clk),
-+	SH_PFC_PIN_GROUP(vin3_sync),
- };
- 
- static const char * const du0_groups[] = {
-@@ -2754,6 +2871,30 @@ static const char * const usb2_groups[] = {
- 	"usb2_ovc",
- };
- 
-+static const char * const vin0_groups[] = {
-+	"vin0_data8",
-+	"vin0_clk",
-+	"vin0_sync",
-+};
-+
-+static const char * const vin1_groups[] = {
-+	"vin1_data8",
-+	"vin1_clk",
-+	"vin1_sync",
-+};
-+
-+static const char * const vin2_groups[] = {
-+	"vin2_data8",
-+	"vin2_clk",
-+	"vin2_sync",
-+};
-+
-+static const char * const vin3_groups[] = {
-+	"vin3_data8",
-+	"vin3_clk",
-+	"vin3_sync",
-+};
-+
- static const struct sh_pfc_function pinmux_functions[] = {
- 	SH_PFC_FUNCTION(du0),
- 	SH_PFC_FUNCTION(du1),
-@@ -2777,6 +2918,10 @@ static const struct sh_pfc_function pinmux_functions[] = {
- 	SH_PFC_FUNCTION(usb0),
- 	SH_PFC_FUNCTION(usb1),
- 	SH_PFC_FUNCTION(usb2),
-+	SH_PFC_FUNCTION(vin0),
-+	SH_PFC_FUNCTION(vin1),
-+	SH_PFC_FUNCTION(vin2),
-+	SH_PFC_FUNCTION(vin3),
- };
- 
- static const struct pinmux_cfg_reg pinmux_config_regs[] = {
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0096-ARM-shmobile-Add-r8a7791-clocks-for-thermal-devices.patch b/patches.renesas/0096-ARM-shmobile-Add-r8a7791-clocks-for-thermal-devices.patch
deleted file mode 100644
index 6c142c3a834a8..0000000000000
--- a/patches.renesas/0096-ARM-shmobile-Add-r8a7791-clocks-for-thermal-devices.patch
+++ /dev/null
@@ -1,49 +0,0 @@
-From e83caf0f56d8c7aa2260c5fad3ca3b59792d723e Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Wed, 20 Nov 2013 17:00:05 +0900
-Subject: ARM: shmobile: Add r8a7791 clocks for thermal devices
-
-Add the r8a7791 thermal device as legacy clocks.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 8476cee684a68564d315043953fe090b36e9cfd2)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r8a7791.c | 4 ++++
- 1 file changed, 4 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a7791.c b/arch/arm/mach-shmobile/clock-r8a7791.c
-index fda7c6cb6921..ff2d60d55bd5 100644
---- a/arch/arm/mach-shmobile/clock-r8a7791.c
-+++ b/arch/arm/mach-shmobile/clock-r8a7791.c
-@@ -124,6 +124,7 @@ static struct clk *main_clks[] = {
- enum {
- 	MSTP726, MSTP724, MSTP723, MSTP721, MSTP720,
- 	MSTP719, MSTP718, MSTP715, MSTP714,
-+	MSTP522,
- 	MSTP216, MSTP207, MSTP206,
- 	MSTP204, MSTP203, MSTP202, MSTP1105, MSTP1106, MSTP1107,
- 	MSTP124,
-@@ -140,6 +141,7 @@ static struct clk mstp_clks[MSTP_NR] = {
- 	[MSTP718] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 18, 0), /* SCIF3 */
- 	[MSTP715] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 15, 0), /* SCIF4 */
- 	[MSTP714] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 14, 0), /* SCIF5 */
-+	[MSTP522] = SH_CLK_MSTP32(&extal_clk, SMSTPCR5, 22, 0), /* Thermal */
- 	[MSTP216] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 16, 0), /* SCIFB2 */
- 	[MSTP207] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 7, 0), /* SCIFB1 */
- 	[MSTP206] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 6, 0), /* SCIFB0 */
-@@ -188,6 +190,8 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_DEV_ID("sh-sci.13", &mstp_clks[MSTP1106]), /* SCIFA4 */
- 	CLKDEV_DEV_ID("sh-sci.14", &mstp_clks[MSTP1107]), /* SCIFA5 */
- 	CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]),
-+	CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]),
-+	CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
- };
- 
- #define R8A7791_CLOCK_ROOT(e, m, p0, p1, p30, p31)		\
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0096-ASoC-rsnd-add-common-DMAEngine-method.patch b/patches.renesas/0096-ASoC-rsnd-add-common-DMAEngine-method.patch
deleted file mode 100644
index 26dc08400dc74..0000000000000
--- a/patches.renesas/0096-ASoC-rsnd-add-common-DMAEngine-method.patch
+++ /dev/null
@@ -1,230 +0,0 @@
-From 8580bc44656280e0b71c0afb33279c977880d9bc Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Sun, 28 Jul 2013 18:58:50 -0700
-Subject: ASoC: rsnd: add common DMAEngine method
-
-R-Car Sound driver will support DMA transfer in the future,
-then, SSI/SRU/SRC will use it.
-Current R-Car can't use soc-dmaengine-pcm.c since its DMAEngine
-doesn't support dmaengine_prep_dma_cyclic(),
-and SSI needs double plane transfer (which needs special submit) on DMAC.
-This patch adds common DMAEngine method for it
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@linaro.org>
-(cherry picked from commit 0a4d94c07ce782e645a8c0484d52221758b4c398)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/sh/rcar/core.c | 132 +++++++++++++++++++++++++++++++++++++++++++++++
- sound/soc/sh/rcar/rsnd.h |  32 ++++++++++++
- 2 files changed, 164 insertions(+)
-
-diff --git a/sound/soc/sh/rcar/core.c b/sound/soc/sh/rcar/core.c
-index 420d6df9c3d0..a35706028514 100644
---- a/sound/soc/sh/rcar/core.c
-+++ b/sound/soc/sh/rcar/core.c
-@@ -174,6 +174,138 @@ void rsnd_mod_init(struct rsnd_priv *priv,
- }
- 
- /*
-+ *	rsnd_dma functions
-+ */
-+static void rsnd_dma_continue(struct rsnd_dma *dma)
-+{
-+	/* push next A or B plane */
-+	dma->submit_loop = 1;
-+	schedule_work(&dma->work);
-+}
-+
-+void rsnd_dma_start(struct rsnd_dma *dma)
-+{
-+	/* push both A and B plane*/
-+	dma->submit_loop = 2;
-+	schedule_work(&dma->work);
-+}
-+
-+void rsnd_dma_stop(struct rsnd_dma *dma)
-+{
-+	dma->submit_loop = 0;
-+	cancel_work_sync(&dma->work);
-+	dmaengine_terminate_all(dma->chan);
-+}
-+
-+static void rsnd_dma_complete(void *data)
-+{
-+	struct rsnd_dma *dma = (struct rsnd_dma *)data;
-+	struct rsnd_priv *priv = dma->priv;
-+	unsigned long flags;
-+
-+	rsnd_lock(priv, flags);
-+
-+	dma->complete(dma);
-+
-+	if (dma->submit_loop)
-+		rsnd_dma_continue(dma);
-+
-+	rsnd_unlock(priv, flags);
-+}
-+
-+static void rsnd_dma_do_work(struct work_struct *work)
-+{
-+	struct rsnd_dma *dma = container_of(work, struct rsnd_dma, work);
-+	struct rsnd_priv *priv = dma->priv;
-+	struct device *dev = rsnd_priv_to_dev(priv);
-+	struct dma_async_tx_descriptor *desc;
-+	dma_addr_t buf;
-+	size_t len;
-+	int i;
-+
-+	for (i = 0; i < dma->submit_loop; i++) {
-+
-+		if (dma->inquiry(dma, &buf, &len) < 0)
-+			return;
-+
-+		desc = dmaengine_prep_slave_single(
-+			dma->chan, buf, len, dma->dir,
-+			DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
-+		if (!desc) {
-+			dev_err(dev, "dmaengine_prep_slave_sg() fail\n");
-+			return;
-+		}
-+
-+		desc->callback		= rsnd_dma_complete;
-+		desc->callback_param	= dma;
-+
-+		if (dmaengine_submit(desc) < 0) {
-+			dev_err(dev, "dmaengine_submit() fail\n");
-+			return;
-+		}
-+
-+	}
-+
-+	dma_async_issue_pending(dma->chan);
-+}
-+
-+int rsnd_dma_available(struct rsnd_dma *dma)
-+{
-+	return !!dma->chan;
-+}
-+
-+static bool rsnd_dma_filter(struct dma_chan *chan, void *param)
-+{
-+	chan->private = param;
-+
-+	return true;
-+}
-+
-+int rsnd_dma_init(struct rsnd_priv *priv, struct rsnd_dma *dma,
-+		  int is_play, int id,
-+		  int (*inquiry)(struct rsnd_dma *dma,
-+				  dma_addr_t *buf, int *len),
-+		  int (*complete)(struct rsnd_dma *dma))
-+{
-+	struct device *dev = rsnd_priv_to_dev(priv);
-+	dma_cap_mask_t mask;
-+
-+	if (dma->chan) {
-+		dev_err(dev, "it already has dma channel\n");
-+		return -EIO;
-+	}
-+
-+	dma_cap_zero(mask);
-+	dma_cap_set(DMA_SLAVE, mask);
-+
-+	dma->slave.shdma_slave.slave_id = id;
-+
-+	dma->chan = dma_request_channel(mask, rsnd_dma_filter,
-+					&dma->slave.shdma_slave);
-+	if (!dma->chan) {
-+		dev_err(dev, "can't get dma channel\n");
-+		return -EIO;
-+	}
-+
-+	dma->dir = is_play ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
-+	dma->priv = priv;
-+	dma->inquiry = inquiry;
-+	dma->complete = complete;
-+	INIT_WORK(&dma->work, rsnd_dma_do_work);
-+
-+	return 0;
-+}
-+
-+void  rsnd_dma_quit(struct rsnd_priv *priv,
-+		    struct rsnd_dma *dma)
-+{
-+	if (dma->chan)
-+		dma_release_channel(dma->chan);
-+
-+	dma->chan = NULL;
-+}
-+
-+/*
-  *	rsnd_dai functions
-  */
- #define rsnd_dai_call(rdai, io, fn)			\
-diff --git a/sound/soc/sh/rcar/rsnd.h b/sound/soc/sh/rcar/rsnd.h
-index 9243e387104c..15dccd598960 100644
---- a/sound/soc/sh/rcar/rsnd.h
-+++ b/sound/soc/sh/rcar/rsnd.h
-@@ -13,9 +13,12 @@
- 
- #include <linux/clk.h>
- #include <linux/device.h>
-+#include <linux/dma-mapping.h>
- #include <linux/io.h>
- #include <linux/list.h>
- #include <linux/module.h>
-+#include <linux/sh_dma.h>
-+#include <linux/workqueue.h>
- #include <sound/rcar_snd.h>
- #include <sound/soc.h>
- #include <sound/pcm_params.h>
-@@ -79,6 +82,32 @@ void rsnd_bset(struct rsnd_priv *priv, struct rsnd_mod *mod, enum rsnd_reg reg,
- 		    u32 mask, u32 data);
- 
- /*
-+ *	R-Car DMA
-+ */
-+struct rsnd_dma {
-+	struct rsnd_priv	*priv;
-+	struct sh_dmae_slave	slave;
-+	struct work_struct	work;
-+	struct dma_chan		*chan;
-+	enum dma_data_direction dir;
-+	int (*inquiry)(struct rsnd_dma *dma, dma_addr_t *buf, int *len);
-+	int (*complete)(struct rsnd_dma *dma);
-+
-+	int submit_loop;
-+};
-+
-+void rsnd_dma_start(struct rsnd_dma *dma);
-+void rsnd_dma_stop(struct rsnd_dma *dma);
-+int rsnd_dma_available(struct rsnd_dma *dma);
-+int rsnd_dma_init(struct rsnd_priv *priv, struct rsnd_dma *dma,
-+	int is_play, int id,
-+	int (*inquiry)(struct rsnd_dma *dma, dma_addr_t *buf, int *len),
-+	int (*complete)(struct rsnd_dma *dma));
-+void  rsnd_dma_quit(struct rsnd_priv *priv,
-+		    struct rsnd_dma *dma);
-+
-+
-+/*
-  *	R-Car sound mod
-  */
- 
-@@ -103,9 +132,12 @@ struct rsnd_mod {
- 	struct rsnd_priv *priv;
- 	struct rsnd_mod_ops *ops;
- 	struct list_head list; /* connect to rsnd_dai playback/capture */
-+	struct rsnd_dma dma;
- };
- 
- #define rsnd_mod_to_priv(mod) ((mod)->priv)
-+#define rsnd_mod_to_dma(mod) (&(mod)->dma)
-+#define rsnd_dma_to_mod(_dma) container_of((_dma), struct rsnd_mod, dma)
- #define rsnd_mod_id(mod) ((mod)->id)
- #define for_each_rsnd_mod(pos, n, io)	\
- 	list_for_each_entry_safe(pos, n, &(io)->head, list)
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0096-sh-pfc-r8a7778-add-common-PFC-macro-helper.patch b/patches.renesas/0096-sh-pfc-r8a7778-add-common-PFC-macro-helper.patch
deleted file mode 100644
index 5d84a28e48354..0000000000000
--- a/patches.renesas/0096-sh-pfc-r8a7778-add-common-PFC-macro-helper.patch
+++ /dev/null
@@ -1,60 +0,0 @@
-From 3d6fb0fe8439bfed9d5e1c9692e17b84ee225b0e Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Thu, 18 Apr 2013 20:07:34 -0700
-Subject: sh-pfc: r8a7778: add common PFC macro helper
-
-pfc-r8a7778 will have many devices pfc support in the future,
-and current pfc-r8a7778 is using pin/mux definition macro for SCIF.
-The device definition style using macro is readable code IMO,
-but creating new macro for each devices is not good sense.
-This patch adds common SH_PFC_xx() macro for each new feature devices
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit a10cd30ed6c786fc4756cb1393fea63331e3e315)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7778.c | 26 ++++++++++++++++++--------
- 1 file changed, 18 insertions(+), 8 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7778.c b/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
-index ddbd27b7..139f9dde 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
-@@ -1303,15 +1303,25 @@ static struct sh_pfc_pin pinmux_pins[] = {
-  */
- #define PIN_NUMBER(row, col)		(1000+((row)-1)*25+(col)-1)
- 
--/* - SCIF macro ------------------------------------------------------------- */
--#define SCIF_PFC_PIN(name, args...)					\
-+/* - macro */
-+#define SH_PFC_PINS(name, args...) \
- 	static const unsigned int name ##_pins[] = { args }
--#define SCIF_PFC_DAT(name, tx, rx)					\
--	static const unsigned int name ##_mux[]  = { tx##_MARK, rx##_MARK, }
--#define SCIF_PFC_CTR(name, cts, rts)					\
--	static const unsigned int name ##_mux[]  = { cts##_MARK, rts##_MARK, }
--#define SCIF_PFC_CLK(name, sck)					\
--	static const unsigned int name ##_mux[]  = { sck##_MARK, }
-+#define SH_PFC_MUX1(name, arg1)					\
-+	static const unsigned int name ##_mux[]  = { arg1##_MARK }
-+#define SH_PFC_MUX2(name, arg1, arg2)					\
-+	static const unsigned int name ##_mux[]  = { arg1##_MARK, arg2##_MARK, }
-+#define SH_PFC_MUX3(name, arg1, arg2, arg3)					\
-+	static const unsigned int name ##_mux[]  = { arg1##_MARK, arg2##_MARK,	\
-+						     arg3##_MARK }
-+#define SH_PFC_MUX4(name, arg1, arg2, arg3, arg4)			\
-+	static const unsigned int name ##_mux[]  = { arg1##_MARK, arg2##_MARK, \
-+						     arg3##_MARK, arg4##_MARK }
-+
-+/* - SCIF macro ------------------------------------------------------------- */
-+#define SCIF_PFC_PIN(name, args...)	SH_PFC_PINS(name, args)
-+#define SCIF_PFC_DAT(name, tx, rx)	SH_PFC_MUX2(name, tx, rx)
-+#define SCIF_PFC_CTR(name, cts, rts)	SH_PFC_MUX2(name, cts, rts)
-+#define SCIF_PFC_CLK(name, sck)		SH_PFC_MUX1(name, sck)
- 
- /* - HSCIF0 ----------------------------------------------------------------- */
- SCIF_PFC_PIN(hscif0_data_a,	RCAR_GP_PIN(1, 17),	RCAR_GP_PIN(1, 18));
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0097-ARM-shmobile-r8a7790-care-EXTAL-divider-settings.patch b/patches.renesas/0097-ARM-shmobile-r8a7790-care-EXTAL-divider-settings.patch
deleted file mode 100644
index 412f790213687..0000000000000
--- a/patches.renesas/0097-ARM-shmobile-r8a7790-care-EXTAL-divider-settings.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From eca5e076aea7678a163a700d882a6f2436499baf Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Tue, 19 Nov 2013 01:04:20 -0800
-Subject: ARM: shmobile: r8a7790: care EXTAL divider settings
-
-EXTAL clock frequency needs 1/2 when
-(MD14, MD13, MD19) = (1, x, x).
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 31ac8e47e9060a9b27ac955d387264b3b6b76bec)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r8a7790.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
-index d6669e946eef..3f483f8734fa 100644
---- a/arch/arm/mach-shmobile/clock-r8a7790.c
-+++ b/arch/arm/mach-shmobile/clock-r8a7790.c
-@@ -329,10 +329,10 @@ void __init r8a7790_clock_init(void)
- 		R8A7790_CLOCK_ROOT(20, &extal_clk, 130, 156, 80, 66);
- 		break;
- 	case MD(14):
--		R8A7790_CLOCK_ROOT(26, &extal_div2_clk, 200, 240, 122, 102);
-+		R8A7790_CLOCK_ROOT(26 / 2, &extal_div2_clk, 200, 240, 122, 102);
- 		break;
- 	case MD(13) | MD(14):
--		R8A7790_CLOCK_ROOT(30, &extal_div2_clk, 172, 208, 106, 88);
-+		R8A7790_CLOCK_ROOT(30 / 2, &extal_div2_clk, 172, 208, 106, 88);
- 		break;
- 	}
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0097-ASoC-rsnd-SSI-supports-DMA-transfer.patch b/patches.renesas/0097-ASoC-rsnd-SSI-supports-DMA-transfer.patch
deleted file mode 100644
index d3a98762a7fe7..0000000000000
--- a/patches.renesas/0097-ASoC-rsnd-SSI-supports-DMA-transfer.patch
+++ /dev/null
@@ -1,208 +0,0 @@
-From 72a3557f23b87b9bd6bcc3d03199c65ab0764ae3 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Sun, 28 Jul 2013 18:59:02 -0700
-Subject: ASoC: rsnd: SSI supports DMA transfer
-
-This patch adds DMAEngine transfer on SSI.
-But, it transfers sound data from memory to SSI directly
-without using HPBIF at this time.
-It will be updated soon
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@linaro.org>
-(cherry picked from commit 849fc82a6f4f32b4c8c502bb7c4a68df51170232)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- include/sound/rcar_snd.h |   7 +--
- sound/soc/sh/rcar/ssi.c  | 110 +++++++++++++++++++++++++++++++++++++++++++++--
- 2 files changed, 111 insertions(+), 6 deletions(-)
-
-diff --git a/include/sound/rcar_snd.h b/include/sound/rcar_snd.h
-index 33233edd1664..a72687dda0cd 100644
---- a/include/sound/rcar_snd.h
-+++ b/include/sound/rcar_snd.h
-@@ -39,13 +39,14 @@
- 
- #define RSND_SSI_PLAY			(1 << 24)
- 
--#define RSND_SSI_SET(_dai_id, _pio_irq, _flags) \
--{ .dai_id = _dai_id, .pio_irq = _pio_irq, .flags = _flags }
-+#define RSND_SSI_SET(_dai_id, _dma_id, _pio_irq, _flags)	\
-+{ .dai_id = _dai_id, .dma_id = _dma_id, .pio_irq = _pio_irq, .flags = _flags }
- #define RSND_SSI_UNUSED \
--{ .dai_id = -1, .pio_irq = -1, .flags = 0 }
-+{ .dai_id = -1, .dma_id = -1, .pio_irq = -1, .flags = 0 }
- 
- struct rsnd_ssi_platform_info {
- 	int dai_id;
-+	int dma_id;
- 	int pio_irq;
- 	u32 flags;
- };
-diff --git a/sound/soc/sh/rcar/ssi.c b/sound/soc/sh/rcar/ssi.c
-index c48a6c7cd08e..2079ccf5f322 100644
---- a/sound/soc/sh/rcar/ssi.c
-+++ b/sound/soc/sh/rcar/ssi.c
-@@ -19,6 +19,7 @@
-  * SSICR
-  */
- #define	FORCE		(1 << 31)	/* Fixed */
-+#define	DMEN		(1 << 28)	/* DMA Enable */
- #define	UIEN		(1 << 27)	/* Underflow Interrupt Enable */
- #define	OIEN		(1 << 26)	/* Overflow Interrupt Enable */
- #define	IIEN		(1 << 25)	/* Idle Mode Interrupt Enable */
-@@ -51,6 +52,11 @@
- #define	IIRQ		(1 << 25)	/* Idle Mode Interrupt Status */
- #define	DIRQ		(1 << 24)	/* Data Interrupt Status Flag */
- 
-+/*
-+ * SSIWSR
-+ */
-+#define CONT		(1 << 8)	/* WS Continue Function */
-+
- struct rsnd_ssi {
- 	struct clk *clk;
- 	struct rsnd_ssi_platform_info *info; /* rcar_snd.h */
-@@ -63,6 +69,7 @@ struct rsnd_ssi {
- 	u32 cr_clk;
- 	u32 cr_etc;
- 	int err;
-+	int dma_offset;
- 	unsigned int usrcnt;
- 	unsigned int rate;
- };
-@@ -83,7 +90,10 @@ struct rsnd_ssiu {
- 
- #define rsnd_ssi_nr(priv) (((struct rsnd_ssiu *)((priv)->ssiu))->ssi_nr)
- #define rsnd_mod_to_ssi(_mod) container_of((_mod), struct rsnd_ssi, mod)
--#define rsnd_ssi_is_pio(ssi) ((ssi)->info->pio_irq > 0)
-+#define rsnd_dma_to_ssi(dma)  rsnd_mod_to_ssi(rsnd_dma_to_mod(dma))
-+#define rsnd_ssi_pio_available(ssi) ((ssi)->info->pio_irq > 0)
-+#define rsnd_ssi_dma_available(ssi) \
-+	rsnd_dma_available(rsnd_mod_to_dma(&(ssi)->mod))
- #define rsnd_ssi_clk_from_parent(ssi) ((ssi)->parent)
- #define rsnd_rdai_is_clk_master(rdai) ((rdai)->clk_master)
- #define rsnd_ssi_mode_flags(p) ((p)->info->flags)
-@@ -477,6 +487,79 @@ static struct rsnd_mod_ops rsnd_ssi_pio_ops = {
- 	.stop	= rsnd_ssi_pio_stop,
- };
- 
-+static int rsnd_ssi_dma_inquiry(struct rsnd_dma *dma, dma_addr_t *buf, int *len)
-+{
-+	struct rsnd_ssi *ssi = rsnd_dma_to_ssi(dma);
-+	struct rsnd_dai_stream *io = ssi->io;
-+	struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io);
-+
-+	*len = io->byte_per_period;
-+	*buf = runtime->dma_addr +
-+		rsnd_dai_pointer_offset(io, ssi->dma_offset + *len);
-+	ssi->dma_offset = *len; /* it cares A/B plane */
-+
-+	return 0;
-+}
-+
-+static int rsnd_ssi_dma_complete(struct rsnd_dma *dma)
-+{
-+	struct rsnd_ssi *ssi = rsnd_dma_to_ssi(dma);
-+	struct rsnd_dai_stream *io = ssi->io;
-+	u32 status = rsnd_mod_read(&ssi->mod, SSISR);
-+
-+	rsnd_ssi_record_error(ssi, status);
-+
-+	rsnd_dai_pointer_update(ssi->io, io->byte_per_period);
-+
-+	return 0;
-+}
-+
-+static int rsnd_ssi_dma_start(struct rsnd_mod *mod,
-+			      struct rsnd_dai *rdai,
-+			      struct rsnd_dai_stream *io)
-+{
-+	struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
-+	struct rsnd_dma *dma = rsnd_mod_to_dma(&ssi->mod);
-+
-+	/* enable DMA transfer */
-+	ssi->cr_etc = DMEN;
-+	ssi->dma_offset = 0;
-+
-+	rsnd_dma_start(dma);
-+
-+	rsnd_ssi_hw_start(ssi, ssi->rdai, io);
-+
-+	/* enable WS continue */
-+	if (rsnd_rdai_is_clk_master(rdai))
-+		rsnd_mod_write(&ssi->mod, SSIWSR, CONT);
-+
-+	return 0;
-+}
-+
-+static int rsnd_ssi_dma_stop(struct rsnd_mod *mod,
-+			     struct rsnd_dai *rdai,
-+			     struct rsnd_dai_stream *io)
-+{
-+	struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
-+	struct rsnd_dma *dma = rsnd_mod_to_dma(&ssi->mod);
-+
-+	ssi->cr_etc = 0;
-+
-+	rsnd_ssi_hw_stop(ssi, rdai);
-+
-+	rsnd_dma_stop(dma);
-+
-+	return 0;
-+}
-+
-+static struct rsnd_mod_ops rsnd_ssi_dma_ops = {
-+	.name	= "ssi (dma)",
-+	.init	= rsnd_ssi_init,
-+	.quit	= rsnd_ssi_quit,
-+	.start	= rsnd_ssi_dma_start,
-+	.stop	= rsnd_ssi_dma_stop,
-+};
-+
- /*
-  *		Non SSI
-  */
-@@ -574,9 +657,26 @@ int rsnd_ssi_probe(struct platform_device *pdev,
- 		ops = &rsnd_ssi_non_ops;
- 
- 		/*
-+		 * SSI DMA case
-+		 */
-+		if (pinfo->dma_id > 0) {
-+			ret = rsnd_dma_init(
-+				priv, rsnd_mod_to_dma(&ssi->mod),
-+				(rsnd_ssi_mode_flags(ssi) & RSND_SSI_PLAY),
-+				pinfo->dma_id,
-+				rsnd_ssi_dma_inquiry,
-+				rsnd_ssi_dma_complete);
-+			if (ret < 0)
-+				dev_info(dev, "SSI DMA failed. try PIO transter\n");
-+			else
-+				ops	= &rsnd_ssi_dma_ops;
-+		}
-+
-+		/*
- 		 * SSI PIO case
- 		 */
--		if (rsnd_ssi_is_pio(ssi)) {
-+		if (!rsnd_ssi_dma_available(ssi) &&
-+		     rsnd_ssi_pio_available(ssi)) {
- 			ret = devm_request_irq(dev, pinfo->pio_irq,
- 					       &rsnd_ssi_pio_interrupt,
- 					       IRQF_SHARED,
-@@ -605,6 +705,10 @@ void rsnd_ssi_remove(struct platform_device *pdev,
- 	struct rsnd_ssi *ssi;
- 	int i;
- 
--	for_each_rsnd_ssi(ssi, priv, i)
-+	for_each_rsnd_ssi(ssi, priv, i) {
- 		clk_put(ssi->clk);
-+		if (rsnd_ssi_dma_available(ssi))
-+			rsnd_dma_quit(priv, rsnd_mod_to_dma(&ssi->mod));
-+	}
-+
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0097-sh-pfc-r8a7778-add-SDHI-support.patch b/patches.renesas/0097-sh-pfc-r8a7778-add-SDHI-support.patch
deleted file mode 100644
index 6b90caaf60b3c..0000000000000
--- a/patches.renesas/0097-sh-pfc-r8a7778-add-SDHI-support.patch
+++ /dev/null
@@ -1,189 +0,0 @@
-From 524fba2c4ee5dde087e35759ea8ebc8dcdd954c8 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Thu, 18 Apr 2013 20:08:23 -0700
-Subject: sh-pfc: r8a7778: add SDHI support
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 564617d2f92473031d035deb273da5374e62d0f0)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7778.c | 141 +++++++++++++++++++++++++++++++++++
- 1 file changed, 141 insertions(+)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7778.c b/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
-index 139f9dde..b1925cc1 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
-@@ -1427,6 +1427,84 @@ SCIF_PFC_DAT(scif5_data_a,	TX5_A,			RX5_A);
- SCIF_PFC_PIN(scif5_data_b,	RCAR_GP_PIN(1, 15),	RCAR_GP_PIN(1, 14));
- SCIF_PFC_DAT(scif5_data_b,	TX5_B,			RX5_B);
- 
-+/* - SDHI macro ------------------------------------------------------------- */
-+#define SDHI_PFC_PINS(name, args...)		SH_PFC_PINS(name, args)
-+#define SDHI_PFC_DAT1(name, d0)			SH_PFC_MUX1(name, d0)
-+#define SDHI_PFC_DAT4(name, d0, d1, d2, d3)	SH_PFC_MUX4(name, d0, d1, d2, d3)
-+#define SDHI_PFC_CTRL(name, clk, cmd)		SH_PFC_MUX2(name, clk, cmd)
-+#define SDHI_PFC_CDPN(name, cd)			SH_PFC_MUX1(name, cd)
-+#define SDHI_PFC_WPPN(name, wp)			SH_PFC_MUX1(name, wp)
-+
-+/* - SDHI0 ------------------------------------------------------------------ */
-+SDHI_PFC_PINS(sdhi0_cd,		RCAR_GP_PIN(3, 17));
-+SDHI_PFC_CDPN(sdhi0_cd,		SD0_CD);
-+SDHI_PFC_PINS(sdhi0_ctrl,	RCAR_GP_PIN(3, 11),	RCAR_GP_PIN(3, 12));
-+SDHI_PFC_CTRL(sdhi0_ctrl,	SD0_CLK,		SD0_CMD);
-+SDHI_PFC_PINS(sdhi0_data1,	RCAR_GP_PIN(3, 13));
-+SDHI_PFC_DAT1(sdhi0_data1,	SD0_DAT0);
-+SDHI_PFC_PINS(sdhi0_data4,	RCAR_GP_PIN(3, 13),	RCAR_GP_PIN(3, 14),
-+				RCAR_GP_PIN(3, 15),	RCAR_GP_PIN(3, 16));
-+SDHI_PFC_DAT4(sdhi0_data4,	SD0_DAT0,		SD0_DAT1,
-+				SD0_DAT2,		SD0_DAT3);
-+SDHI_PFC_PINS(sdhi0_wp,		RCAR_GP_PIN(3, 18));
-+SDHI_PFC_WPPN(sdhi0_wp,		SD0_WP);
-+
-+/* - SDHI1 ------------------------------------------------------------------ */
-+SDHI_PFC_PINS(sdhi1_a_cd,	RCAR_GP_PIN(0, 30));
-+SDHI_PFC_CDPN(sdhi1_a_cd,	SD1_CD_A);
-+SDHI_PFC_PINS(sdhi1_a_ctrl,	RCAR_GP_PIN(1, 5),	RCAR_GP_PIN(1, 6));
-+SDHI_PFC_CTRL(sdhi1_a_ctrl,	SD1_CLK_A,		SD1_CMD_A);
-+SDHI_PFC_PINS(sdhi1_a_data1,	RCAR_GP_PIN(1, 7));
-+SDHI_PFC_DAT1(sdhi1_a_data1,	SD1_DAT0_A);
-+SDHI_PFC_PINS(sdhi1_a_data4,	RCAR_GP_PIN(1, 7),	RCAR_GP_PIN(1, 8),
-+				RCAR_GP_PIN(0, 5),	RCAR_GP_PIN(0, 6));
-+SDHI_PFC_DAT4(sdhi1_a_data4,	SD1_DAT0_A,		SD1_DAT1_A,
-+				SD1_DAT2_A,		SD1_DAT3_A);
-+SDHI_PFC_PINS(sdhi1_a_wp,	RCAR_GP_PIN(0, 31));
-+SDHI_PFC_WPPN(sdhi1_a_wp,	SD1_WP_A);
-+
-+SDHI_PFC_PINS(sdhi1_b_cd,	RCAR_GP_PIN(2, 24));
-+SDHI_PFC_CDPN(sdhi1_b_cd,	SD1_CD_B);
-+SDHI_PFC_PINS(sdhi1_b_ctrl,	RCAR_GP_PIN(1, 17),	RCAR_GP_PIN(1, 16));
-+SDHI_PFC_CTRL(sdhi1_b_ctrl,	SD1_CLK_B,		SD1_CMD_B);
-+SDHI_PFC_PINS(sdhi1_b_data1,	RCAR_GP_PIN(1, 18));
-+SDHI_PFC_DAT1(sdhi1_b_data1,	SD1_DAT0_B);
-+SDHI_PFC_PINS(sdhi1_b_data4,	RCAR_GP_PIN(1, 18),	RCAR_GP_PIN(1, 19),
-+				RCAR_GP_PIN(1, 20),	RCAR_GP_PIN(1, 21));
-+SDHI_PFC_DAT4(sdhi1_b_data4,	SD1_DAT0_B,		SD1_DAT1_B,
-+				SD1_DAT2_B,		SD1_DAT3_B);
-+SDHI_PFC_PINS(sdhi1_b_wp,	RCAR_GP_PIN(2, 25));
-+SDHI_PFC_WPPN(sdhi1_b_wp,	SD1_WP_B);
-+
-+
-+/* - SDH2 ------------------------------------------------------------------- */
-+SDHI_PFC_PINS(sdhi2_a_cd,	RCAR_GP_PIN(4, 23));
-+SDHI_PFC_CDPN(sdhi2_a_cd,	SD2_CD_A);
-+SDHI_PFC_PINS(sdhi2_a_ctrl,	RCAR_GP_PIN(4, 17),	RCAR_GP_PIN(4, 18));
-+SDHI_PFC_CTRL(sdhi2_a_ctrl,	SD2_CLK_A,		SD2_CMD_A);
-+SDHI_PFC_PINS(sdhi2_a_data1,	RCAR_GP_PIN(4, 19));
-+SDHI_PFC_DAT1(sdhi2_a_data1,	SD2_DAT0_A);
-+SDHI_PFC_PINS(sdhi2_a_data4,	RCAR_GP_PIN(4, 19),	RCAR_GP_PIN(4, 20),
-+				RCAR_GP_PIN(4, 21),	RCAR_GP_PIN(4, 22));
-+SDHI_PFC_DAT4(sdhi2_a_data4,	SD2_DAT0_A,		SD2_DAT1_A,
-+				SD2_DAT2_A,		SD2_DAT3_A);
-+SDHI_PFC_PINS(sdhi2_a_wp,	RCAR_GP_PIN(4, 24));
-+SDHI_PFC_WPPN(sdhi2_a_wp,	SD2_WP_A);
-+
-+SDHI_PFC_PINS(sdhi2_b_cd,	RCAR_GP_PIN(3, 27));
-+SDHI_PFC_CDPN(sdhi2_b_cd,	SD2_CD_B);
-+SDHI_PFC_PINS(sdhi2_b_ctrl,	RCAR_GP_PIN(4, 5),	RCAR_GP_PIN(4, 6));
-+SDHI_PFC_CTRL(sdhi2_b_ctrl,	SD2_CLK_B,		SD2_CMD_B);
-+SDHI_PFC_PINS(sdhi2_b_data1,	RCAR_GP_PIN(4, 7));
-+SDHI_PFC_DAT1(sdhi2_b_data1,	SD2_DAT0_B);
-+SDHI_PFC_PINS(sdhi2_b_data4,	RCAR_GP_PIN(4, 7),	RCAR_GP_PIN(4, 8),
-+				RCAR_GP_PIN(3, 25),	RCAR_GP_PIN(3, 26));
-+SDHI_PFC_DAT4(sdhi2_b_data4,	SD2_DAT0_B,		SD2_DAT1_B,
-+				SD2_DAT2_B,		SD2_DAT3_B);
-+SDHI_PFC_PINS(sdhi2_b_wp,	RCAR_GP_PIN(3, 28));
-+SDHI_PFC_WPPN(sdhi2_b_wp,	SD2_WP_B);
-+
-+
- static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(hscif0_data_a),
- 	SH_PFC_PIN_GROUP(hscif0_data_b),
-@@ -1471,6 +1549,31 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(scif4_data_c),
- 	SH_PFC_PIN_GROUP(scif5_data_a),
- 	SH_PFC_PIN_GROUP(scif5_data_b),
-+	SH_PFC_PIN_GROUP(sdhi0_cd),
-+	SH_PFC_PIN_GROUP(sdhi0_ctrl),
-+	SH_PFC_PIN_GROUP(sdhi0_data1),
-+	SH_PFC_PIN_GROUP(sdhi0_data4),
-+	SH_PFC_PIN_GROUP(sdhi0_wp),
-+	SH_PFC_PIN_GROUP(sdhi1_a_cd),
-+	SH_PFC_PIN_GROUP(sdhi1_a_ctrl),
-+	SH_PFC_PIN_GROUP(sdhi1_a_data1),
-+	SH_PFC_PIN_GROUP(sdhi1_a_data4),
-+	SH_PFC_PIN_GROUP(sdhi1_a_wp),
-+	SH_PFC_PIN_GROUP(sdhi1_b_cd),
-+	SH_PFC_PIN_GROUP(sdhi1_b_ctrl),
-+	SH_PFC_PIN_GROUP(sdhi1_b_data1),
-+	SH_PFC_PIN_GROUP(sdhi1_b_data4),
-+	SH_PFC_PIN_GROUP(sdhi1_b_wp),
-+	SH_PFC_PIN_GROUP(sdhi2_a_cd),
-+	SH_PFC_PIN_GROUP(sdhi2_a_ctrl),
-+	SH_PFC_PIN_GROUP(sdhi2_a_data1),
-+	SH_PFC_PIN_GROUP(sdhi2_a_data4),
-+	SH_PFC_PIN_GROUP(sdhi2_a_wp),
-+	SH_PFC_PIN_GROUP(sdhi2_b_cd),
-+	SH_PFC_PIN_GROUP(sdhi2_b_ctrl),
-+	SH_PFC_PIN_GROUP(sdhi2_b_data1),
-+	SH_PFC_PIN_GROUP(sdhi2_b_data4),
-+	SH_PFC_PIN_GROUP(sdhi2_b_wp),
- };
- 
- static const char * const hscif0_groups[] = {
-@@ -1543,6 +1646,41 @@ static const char * const scif5_groups[] = {
- 	"scif5_data_b",
- };
- 
-+
-+static const char * const sdhi0_groups[] = {
-+	"sdhi0_cd",
-+	"sdhi0_ctrl",
-+	"sdhi0_data1",
-+	"sdhi0_data4",
-+	"sdhi0_wp",
-+};
-+
-+static const char * const sdhi1_groups[] = {
-+	"sdhi1_a_cd",
-+	"sdhi1_a_ctrl",
-+	"sdhi1_a_data1",
-+	"sdhi1_a_data4",
-+	"sdhi1_a_wp",
-+	"sdhi1_b_cd",
-+	"sdhi1_b_ctrl",
-+	"sdhi1_b_data1",
-+	"sdhi1_b_data4",
-+	"sdhi1_b_wp",
-+};
-+
-+static const char * const sdhi2_groups[] = {
-+	"sdhi2_a_cd",
-+	"sdhi2_a_ctrl",
-+	"sdhi2_a_data1",
-+	"sdhi2_a_data4",
-+	"sdhi2_a_wp",
-+	"sdhi2_b_cd",
-+	"sdhi2_b_ctrl",
-+	"sdhi2_b_data1",
-+	"sdhi2_b_data4",
-+	"sdhi2_b_wp",
-+};
-+
- static const struct sh_pfc_function pinmux_functions[] = {
- 	SH_PFC_FUNCTION(hscif0),
- 	SH_PFC_FUNCTION(hscif1),
-@@ -1553,6 +1691,9 @@ static const struct sh_pfc_function pinmux_functions[] = {
- 	SH_PFC_FUNCTION(scif3),
- 	SH_PFC_FUNCTION(scif4),
- 	SH_PFC_FUNCTION(scif5),
-+	SH_PFC_FUNCTION(sdhi0),
-+	SH_PFC_FUNCTION(sdhi1),
-+	SH_PFC_FUNCTION(sdhi2),
- };
- 
- static struct pinmux_cfg_reg pinmux_config_regs[] = {
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0098-ARM-shmobile-r8a7790-fixup-I2C-clock-source.patch b/patches.renesas/0098-ARM-shmobile-r8a7790-fixup-I2C-clock-source.patch
deleted file mode 100644
index e11c8baae83e1..0000000000000
--- a/patches.renesas/0098-ARM-shmobile-r8a7790-fixup-I2C-clock-source.patch
+++ /dev/null
@@ -1,38 +0,0 @@
-From 86e7fcc93c5b0eb89be3cb88d3288965dc422655 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Tue, 19 Nov 2013 01:04:35 -0800
-Subject: ARM: shmobile: r8a7790: fixup I2C clock source
-
-I2C clock is based on P clock, not HP clock
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit d59f4be9d0c2acf6bf16b4f8361593b4bbb4490b)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r8a7790.c | 8 ++++----
- 1 file changed, 4 insertions(+), 4 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
-index 3f483f8734fa..ec6b394add4a 100644
---- a/arch/arm/mach-shmobile/clock-r8a7790.c
-+++ b/arch/arm/mach-shmobile/clock-r8a7790.c
-@@ -196,10 +196,10 @@ enum {
- };
- 
- static struct clk mstp_clks[MSTP_NR] = {
--	[MSTP931] = SH_CLK_MSTP32(&hp_clk, SMSTPCR9, 31, 0), /* I2C0 */
--	[MSTP930] = SH_CLK_MSTP32(&hp_clk, SMSTPCR9, 30, 0), /* I2C1 */
--	[MSTP929] = SH_CLK_MSTP32(&hp_clk, SMSTPCR9, 29, 0), /* I2C2 */
--	[MSTP928] = SH_CLK_MSTP32(&hp_clk, SMSTPCR9, 28, 0), /* I2C3 */
-+	[MSTP931] = SH_CLK_MSTP32(&p_clk, SMSTPCR9, 31, 0), /* I2C0 */
-+	[MSTP930] = SH_CLK_MSTP32(&p_clk, SMSTPCR9, 30, 0), /* I2C1 */
-+	[MSTP929] = SH_CLK_MSTP32(&p_clk, SMSTPCR9, 29, 0), /* I2C2 */
-+	[MSTP928] = SH_CLK_MSTP32(&p_clk, SMSTPCR9, 28, 0), /* I2C3 */
- 	[MSTP917] = SH_CLK_MSTP32(&qspi_clk, SMSTPCR9, 17, 0), /* QSPI */
- 	[MSTP813] = SH_CLK_MSTP32(&p_clk, SMSTPCR8, 13, 0), /* Ether */
- 	[MSTP726] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 26, 0), /* LVDS0 */
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0098-ASoC-rsnd-SSI-supports-DMA-transfer-via-BUSIF.patch b/patches.renesas/0098-ASoC-rsnd-SSI-supports-DMA-transfer-via-BUSIF.patch
deleted file mode 100644
index 58efa6c35c1ab..0000000000000
--- a/patches.renesas/0098-ASoC-rsnd-SSI-supports-DMA-transfer-via-BUSIF.patch
+++ /dev/null
@@ -1,346 +0,0 @@
-From a1616a784d77473c2049e5528e9c76efa3c84b0e Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Sun, 28 Jul 2013 18:59:12 -0700
-Subject: ASoC: rsnd: SSI supports DMA transfer via BUSIF
-
-This patch adds BUSIF support for R-Car sound DMAEngine transfer.
-The sound data will be transferred via FIFO which can cover blank time
-which will happen when DMA channel is switching.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@linaro.org>
-(cherry picked from commit 374a528111fa07878090bd9694a3e153814de39c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- include/sound/rcar_snd.h |   6 ++
- sound/soc/sh/rcar/gen.c  |  10 ++-
- sound/soc/sh/rcar/rsnd.h |   9 +++
- sound/soc/sh/rcar/scu.c  | 154 ++++++++++++++++++++++++++++++++++++++++++++++-
- sound/soc/sh/rcar/ssi.c  |  18 +++++-
- 5 files changed, 190 insertions(+), 7 deletions(-)
-
-diff --git a/include/sound/rcar_snd.h b/include/sound/rcar_snd.h
-index a72687dda0cd..d35412ae03b3 100644
---- a/include/sound/rcar_snd.h
-+++ b/include/sound/rcar_snd.h
-@@ -36,6 +36,7 @@
- #define RSND_SSI_CLK_PIN_SHARE		(1 << 31)
- #define RSND_SSI_CLK_FROM_ADG		(1 << 30) /* clock parent is master */
- #define RSND_SSI_SYNC			(1 << 29) /* SSI34_sync etc */
-+#define RSND_SSI_DEPENDENT		(1 << 28) /* SSI needs SRU/SCU */
- 
- #define RSND_SSI_PLAY			(1 << 24)
- 
-@@ -51,6 +52,11 @@ struct rsnd_ssi_platform_info {
- 	u32 flags;
- };
- 
-+/*
-+ * flags
-+ */
-+#define RSND_SCU_USB_HPBIF		(1 << 31) /* it needs RSND_SSI_DEPENDENT */
-+
- struct rsnd_scu_platform_info {
- 	u32 flags;
- };
-diff --git a/sound/soc/sh/rcar/gen.c b/sound/soc/sh/rcar/gen.c
-index 460c57eef267..babb203b43b7 100644
---- a/sound/soc/sh/rcar/gen.c
-+++ b/sound/soc/sh/rcar/gen.c
-@@ -34,9 +34,6 @@ struct rsnd_gen {
- 
- #define rsnd_priv_to_gen(p)	((struct rsnd_gen *)(p)->gen)
- 
--#define rsnd_is_gen1(s)		((s)->info->flags & RSND_GEN1)
--#define rsnd_is_gen2(s)		((s)->info->flags & RSND_GEN2)
--
- /*
-  *		Gen2
-  *		will be filled in the future
-@@ -115,8 +112,15 @@ static struct rsnd_gen_ops rsnd_gen1_ops = {
- 
- static void rsnd_gen1_reg_map_init(struct rsnd_gen *gen)
- {
-+	RSND_GEN1_REG_MAP(gen, SRU,	SRC_ROUTE_SEL,	0x0,	0x00);
-+	RSND_GEN1_REG_MAP(gen, SRU,	SRC_TMG_SEL0,	0x0,	0x08);
-+	RSND_GEN1_REG_MAP(gen, SRU,	SRC_TMG_SEL1,	0x0,	0x0c);
-+	RSND_GEN1_REG_MAP(gen, SRU,	SRC_TMG_SEL2,	0x0,	0x10);
-+	RSND_GEN1_REG_MAP(gen, SRU,	SRC_CTRL,	0x0,	0xc0);
- 	RSND_GEN1_REG_MAP(gen, SRU,	SSI_MODE0,	0x0,	0xD0);
- 	RSND_GEN1_REG_MAP(gen, SRU,	SSI_MODE1,	0x0,	0xD4);
-+	RSND_GEN1_REG_MAP(gen, SRU,	BUSIF_MODE,	0x4,	0x20);
-+	RSND_GEN1_REG_MAP(gen, SRU,	BUSIF_ADINR,	0x40,	0x214);
- 
- 	RSND_GEN1_REG_MAP(gen, ADG,	BRRA,		0x0,	0x00);
- 	RSND_GEN1_REG_MAP(gen, ADG,	BRRB,		0x0,	0x04);
-diff --git a/sound/soc/sh/rcar/rsnd.h b/sound/soc/sh/rcar/rsnd.h
-index 15dccd598960..9cc6986a8cfb 100644
---- a/sound/soc/sh/rcar/rsnd.h
-+++ b/sound/soc/sh/rcar/rsnd.h
-@@ -32,8 +32,15 @@
-  */
- enum rsnd_reg {
- 	/* SRU/SCU */
-+	RSND_REG_SRC_ROUTE_SEL,
-+	RSND_REG_SRC_TMG_SEL0,
-+	RSND_REG_SRC_TMG_SEL1,
-+	RSND_REG_SRC_TMG_SEL2,
-+	RSND_REG_SRC_CTRL,
- 	RSND_REG_SSI_MODE0,
- 	RSND_REG_SSI_MODE1,
-+	RSND_REG_BUSIF_MODE,
-+	RSND_REG_BUSIF_ADINR,
- 
- 	/* ADG */
- 	RSND_REG_BRRA,
-@@ -213,6 +220,8 @@ int rsnd_gen_path_exit(struct rsnd_priv *priv,
- void __iomem *rsnd_gen_reg_get(struct rsnd_priv *priv,
- 			       struct rsnd_mod *mod,
- 			       enum rsnd_reg reg);
-+#define rsnd_is_gen1(s)		((s)->info->flags & RSND_GEN1)
-+#define rsnd_is_gen2(s)		((s)->info->flags & RSND_GEN2)
- 
- /*
-  *	R-Car ADG
-diff --git a/sound/soc/sh/rcar/scu.c b/sound/soc/sh/rcar/scu.c
-index c12e65f240a1..29837e326bc5 100644
---- a/sound/soc/sh/rcar/scu.c
-+++ b/sound/soc/sh/rcar/scu.c
-@@ -15,6 +15,18 @@ struct rsnd_scu {
- 	struct rsnd_mod mod;
- };
- 
-+#define rsnd_scu_mode_flags(p) ((p)->info->flags)
-+
-+/*
-+ * ADINR
-+ */
-+#define OTBL_24		(0 << 16)
-+#define OTBL_22		(2 << 16)
-+#define OTBL_20		(4 << 16)
-+#define OTBL_18		(6 << 16)
-+#define OTBL_16		(8 << 16)
-+
-+
- #define rsnd_mod_to_scu(_mod)	\
- 	container_of((_mod), struct rsnd_scu, mod)
- 
-@@ -24,6 +36,116 @@ struct rsnd_scu {
- 		     ((pos) = (struct rsnd_scu *)(priv)->scu + i);	\
- 	     i++)
- 
-+static int rsnd_scu_set_route(struct rsnd_priv *priv,
-+			      struct rsnd_mod *mod,
-+			      struct rsnd_dai *rdai,
-+			      struct rsnd_dai_stream *io)
-+{
-+	struct scu_route_config {
-+		u32 mask;
-+		int shift;
-+	} routes[] = {
-+		{ 0xF,  0, }, /* 0 */
-+		{ 0xF,  4, }, /* 1 */
-+		{ 0xF,  8, }, /* 2 */
-+		{ 0x7, 12, }, /* 3 */
-+		{ 0x7, 16, }, /* 4 */
-+		{ 0x7, 20, }, /* 5 */
-+		{ 0x7, 24, }, /* 6 */
-+		{ 0x3, 28, }, /* 7 */
-+		{ 0x3, 30, }, /* 8 */
-+	};
-+
-+	u32 mask;
-+	u32 val;
-+	int shift;
-+	int id;
-+
-+	/*
-+	 * Gen1 only
-+	 */
-+	if (!rsnd_is_gen1(priv))
-+		return 0;
-+
-+	id = rsnd_mod_id(mod);
-+	if (id < 0 || id > ARRAY_SIZE(routes))
-+		return -EIO;
-+
-+	/*
-+	 * SRC_ROUTE_SELECT
-+	 */
-+	val = rsnd_dai_is_play(rdai, io) ? 0x1 : 0x2;
-+	val = val		<< routes[id].shift;
-+	mask = routes[id].mask	<< routes[id].shift;
-+
-+	rsnd_mod_bset(mod, SRC_ROUTE_SEL, mask, val);
-+
-+	/*
-+	 * SRC_TIMING_SELECT
-+	 */
-+	shift	= (id % 4) * 8;
-+	mask	= 0x1F << shift;
-+	if (8 == id) /* SRU8 is very special */
-+		val = id << shift;
-+	else
-+		val = (id + 1) << shift;
-+
-+	switch (id / 4) {
-+	case 0:
-+		rsnd_mod_bset(mod, SRC_TMG_SEL0, mask, val);
-+		break;
-+	case 1:
-+		rsnd_mod_bset(mod, SRC_TMG_SEL1, mask, val);
-+		break;
-+	case 2:
-+		rsnd_mod_bset(mod, SRC_TMG_SEL2, mask, val);
-+		break;
-+	}
-+
-+	return 0;
-+}
-+
-+static int rsnd_scu_set_mode(struct rsnd_priv *priv,
-+			     struct rsnd_mod *mod,
-+			     struct rsnd_dai *rdai,
-+			     struct rsnd_dai_stream *io)
-+{
-+	int id = rsnd_mod_id(mod);
-+	u32 val;
-+
-+	if (rsnd_is_gen1(priv)) {
-+		val = (1 << id);
-+		rsnd_mod_bset(mod, SRC_CTRL, val, val);
-+	}
-+
-+	return 0;
-+}
-+
-+static int rsnd_scu_set_hpbif(struct rsnd_priv *priv,
-+			      struct rsnd_mod *mod,
-+			      struct rsnd_dai *rdai,
-+			      struct rsnd_dai_stream *io)
-+{
-+	struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io);
-+	u32 adinr = runtime->channels;
-+
-+	switch (runtime->sample_bits) {
-+	case 16:
-+		adinr |= OTBL_16;
-+		break;
-+	case 32:
-+		adinr |= OTBL_24;
-+		break;
-+	default:
-+		return -EIO;
-+	}
-+
-+	rsnd_mod_write(mod, BUSIF_MODE, 1);
-+	rsnd_mod_write(mod, BUSIF_ADINR, adinr);
-+
-+	return 0;
-+}
-+
- static int rsnd_scu_init(struct rsnd_mod *mod,
- 			 struct rsnd_dai *rdai,
- 			 struct rsnd_dai_stream *io)
-@@ -53,9 +175,36 @@ static int rsnd_scu_start(struct rsnd_mod *mod,
- 			  struct rsnd_dai_stream *io)
- {
- 	struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
-+	struct rsnd_scu *scu = rsnd_mod_to_scu(mod);
- 	struct device *dev = rsnd_priv_to_dev(priv);
-+	u32 flags = rsnd_scu_mode_flags(scu);
-+	int ret;
-+
-+	/*
-+	 * SCU will be used if it has RSND_SCU_USB_HPBIF flags
-+	 */
-+	if (!(flags & RSND_SCU_USB_HPBIF)) {
-+		/* it use PIO transter */
-+		dev_dbg(dev, "%s%d is not used\n",
-+			rsnd_mod_name(mod), rsnd_mod_id(mod));
-+
-+		return 0;
-+	}
-+
-+	/* it use DMA transter */
-+	ret = rsnd_scu_set_route(priv, mod, rdai, io);
-+	if (ret < 0)
-+		return ret;
-+
-+	ret = rsnd_scu_set_mode(priv, mod, rdai, io);
-+	if (ret < 0)
-+		return ret;
- 
--	dev_dbg(dev, "%s.%d start\n", rsnd_mod_name(mod), rsnd_mod_id(mod));
-+	ret = rsnd_scu_set_hpbif(priv, mod, rdai, io);
-+	if (ret < 0)
-+		return ret;
-+
-+	dev_dbg(dev, "%s%d start\n", rsnd_mod_name(mod), rsnd_mod_id(mod));
- 
- 	return 0;
- }
-@@ -112,8 +261,9 @@ int rsnd_scu_probe(struct platform_device *pdev,
- 		rsnd_mod_init(priv, &scu->mod,
- 			      &rsnd_scu_ops, i);
- 		scu->info = &info->scu_info[i];
--	}
- 
-+		dev_dbg(dev, "SCU%d probed\n", i);
-+	}
- 	dev_dbg(dev, "scu probed\n");
- 
- 	return 0;
-diff --git a/sound/soc/sh/rcar/ssi.c b/sound/soc/sh/rcar/ssi.c
-index 2079ccf5f322..fae26d3f79d2 100644
---- a/sound/soc/sh/rcar/ssi.c
-+++ b/sound/soc/sh/rcar/ssi.c
-@@ -104,6 +104,7 @@ struct rsnd_ssiu {
- static void rsnd_ssi_mode_init(struct rsnd_priv *priv,
- 			       struct rsnd_ssiu *ssiu)
- {
-+	struct device *dev = rsnd_priv_to_dev(priv);
- 	struct rsnd_ssi *ssi;
- 	u32 flags;
- 	u32 val;
-@@ -113,8 +114,17 @@ static void rsnd_ssi_mode_init(struct rsnd_priv *priv,
- 	 * SSI_MODE0
- 	 */
- 	ssiu->ssi_mode0 = 0;
--	for_each_rsnd_ssi(ssi, priv, i)
--		ssiu->ssi_mode0 |= (1 << i);
-+	for_each_rsnd_ssi(ssi, priv, i) {
-+		flags = rsnd_ssi_mode_flags(ssi);
-+
-+		/* see also BUSIF_MODE */
-+		if (!(flags & RSND_SSI_DEPENDENT)) {
-+			ssiu->ssi_mode0 |= (1 << i);
-+			dev_dbg(dev, "SSI%d uses INDEPENDENT mode\n", i);
-+		} else {
-+			dev_dbg(dev, "SSI%d uses DEPENDENT mode\n", i);
-+		}
-+	}
- 
- 	/*
- 	 * SSI_MODE1
-@@ -670,6 +680,8 @@ int rsnd_ssi_probe(struct platform_device *pdev,
- 				dev_info(dev, "SSI DMA failed. try PIO transter\n");
- 			else
- 				ops	= &rsnd_ssi_dma_ops;
-+
-+			dev_dbg(dev, "SSI%d use DMA transfer\n", i);
- 		}
- 
- 		/*
-@@ -687,6 +699,8 @@ int rsnd_ssi_probe(struct platform_device *pdev,
- 			}
- 
- 			ops	= &rsnd_ssi_pio_ops;
-+
-+			dev_dbg(dev, "SSI%d use PIO transfer\n", i);
- 		}
- 
- 		rsnd_mod_init(priv, &ssi->mod, ops, i);
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0098-sh-pfc-sh7372-Add-BSC-pin-groups-and-functions.patch b/patches.renesas/0098-sh-pfc-sh7372-Add-BSC-pin-groups-and-functions.patch
deleted file mode 100644
index 7fc881e09c300..0000000000000
--- a/patches.renesas/0098-sh-pfc-sh7372-Add-BSC-pin-groups-and-functions.patch
+++ /dev/null
@@ -1,172 +0,0 @@
-From 41ffb95ac141b942b7a2416ac977d699dc424a22 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 19 Apr 2013 12:31:08 +0200
-Subject: sh-pfc: sh7372: Add BSC pin groups and functions
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit e68e6415432da0855a80590c0efa88aada79ca1e)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-sh7372.c | 124 ++++++++++++++++++++++++++++++++++++
- 1 file changed, 124 insertions(+)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7372.c b/drivers/pinctrl/sh-pfc/pfc-sh7372.c
-index df0ae21a..9545b3c6 100644
---- a/drivers/pinctrl/sh-pfc/pfc-sh7372.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-sh7372.c
-@@ -933,6 +933,102 @@ static struct sh_pfc_pin pinmux_pins[] = {
- 	GPIO_PORT_ALL(),
- };
- 
-+/* - BSC -------------------------------------------------------------------- */
-+static const unsigned int bsc_data8_pins[] = {
-+	/* D[0:7] */
-+	46, 47, 48, 49, 50, 51, 52, 53,
-+};
-+static const unsigned int bsc_data8_mux[] = {
-+	D0_NAF0_MARK, D1_NAF1_MARK, D2_NAF2_MARK, D3_NAF3_MARK,
-+	D4_NAF4_MARK, D5_NAF5_MARK, D6_NAF6_MARK, D7_NAF7_MARK,
-+};
-+static const unsigned int bsc_data16_pins[] = {
-+	/* D[0:15] */
-+	46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61,
-+};
-+static const unsigned int bsc_data16_mux[] = {
-+	D0_NAF0_MARK, D1_NAF1_MARK, D2_NAF2_MARK, D3_NAF3_MARK,
-+	D4_NAF4_MARK, D5_NAF5_MARK, D6_NAF6_MARK, D7_NAF7_MARK,
-+	D8_NAF8_MARK, D9_NAF9_MARK, D10_NAF10_MARK, D11_NAF11_MARK,
-+	D12_NAF12_MARK, D13_NAF13_MARK, D14_NAF14_MARK, D15_NAF15_MARK,
-+};
-+static const unsigned int bsc_cs0_pins[] = {
-+	/* CS */
-+	62,
-+};
-+static const unsigned int bsc_cs0_mux[] = {
-+	CS0_MARK,
-+};
-+static const unsigned int bsc_cs2_pins[] = {
-+	/* CS */
-+	63,
-+};
-+static const unsigned int bsc_cs2_mux[] = {
-+	CS2_MARK,
-+};
-+static const unsigned int bsc_cs4_pins[] = {
-+	/* CS */
-+	64,
-+};
-+static const unsigned int bsc_cs4_mux[] = {
-+	CS4_MARK,
-+};
-+static const unsigned int bsc_cs5a_pins[] = {
-+	/* CS */
-+	65,
-+};
-+static const unsigned int bsc_cs5a_mux[] = {
-+	CS5A_MARK,
-+};
-+static const unsigned int bsc_cs5b_pins[] = {
-+	/* CS */
-+	66,
-+};
-+static const unsigned int bsc_cs5b_mux[] = {
-+	CS5B_MARK,
-+};
-+static const unsigned int bsc_cs6a_pins[] = {
-+	/* CS */
-+	67,
-+};
-+static const unsigned int bsc_cs6a_mux[] = {
-+	CS6A_MARK,
-+};
-+static const unsigned int bsc_rd_we8_pins[] = {
-+	/* RD, WE[0] */
-+	69, 70,
-+};
-+static const unsigned int bsc_rd_we8_mux[] = {
-+	RD_FSC_MARK, WE0_FWE_MARK,
-+};
-+static const unsigned int bsc_rd_we16_pins[] = {
-+	/* RD, WE[0:1] */
-+	69, 70, 71,
-+};
-+static const unsigned int bsc_rd_we16_mux[] = {
-+	RD_FSC_MARK, WE0_FWE_MARK, WE1_MARK,
-+};
-+static const unsigned int bsc_bs_pins[] = {
-+	/* BS */
-+	19,
-+};
-+static const unsigned int bsc_bs_mux[] = {
-+	BS_MARK,
-+};
-+static const unsigned int bsc_rdwr_pins[] = {
-+	/* RDWR */
-+	75,
-+};
-+static const unsigned int bsc_rdwr_mux[] = {
-+	RDWR_MARK,
-+};
-+static const unsigned int bsc_wait_pins[] = {
-+	/* WAIT */
-+	74,
-+};
-+static const unsigned int bsc_wait_mux[] = {
-+	WAIT_MARK,
-+};
- /* - MMCIF ------------------------------------------------------------------ */
- static const unsigned int mmc0_data1_0_pins[] = {
- 	/* D[0] */
-@@ -1075,6 +1171,18 @@ static const unsigned int sdhi2_ctrl_mux[] = {
- };
- 
- static const struct sh_pfc_pin_group pinmux_groups[] = {
-+	SH_PFC_PIN_GROUP(bsc_data8),
-+	SH_PFC_PIN_GROUP(bsc_data16),
-+	SH_PFC_PIN_GROUP(bsc_cs0),
-+	SH_PFC_PIN_GROUP(bsc_cs2),
-+	SH_PFC_PIN_GROUP(bsc_cs4),
-+	SH_PFC_PIN_GROUP(bsc_cs5a),
-+	SH_PFC_PIN_GROUP(bsc_cs5b),
-+	SH_PFC_PIN_GROUP(bsc_cs6a),
-+	SH_PFC_PIN_GROUP(bsc_rd_we8),
-+	SH_PFC_PIN_GROUP(bsc_rd_we16),
-+	SH_PFC_PIN_GROUP(bsc_bs),
-+	SH_PFC_PIN_GROUP(bsc_rdwr),
- 	SH_PFC_PIN_GROUP(mmc0_data1_0),
- 	SH_PFC_PIN_GROUP(mmc0_data4_0),
- 	SH_PFC_PIN_GROUP(mmc0_data8_0),
-@@ -1096,6 +1204,21 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(sdhi2_ctrl),
- };
- 
-+static const char * const bsc_groups[] = {
-+	"bsc_data8",
-+	"bsc_data16",
-+	"bsc_cs0",
-+	"bsc_cs2",
-+	"bsc_cs4",
-+	"bsc_cs5a",
-+	"bsc_cs5b",
-+	"bsc_cs6a",
-+	"bsc_rd_we8",
-+	"bsc_rd_we16",
-+	"bsc_bs",
-+	"bsc_rdwr",
-+};
-+
- static const char * const mmc0_groups[] = {
- 	"mmc0_data1_0",
- 	"mmc0_data4_0",
-@@ -1128,6 +1251,7 @@ static const char * const sdhi2_groups[] = {
- };
- 
- static const struct sh_pfc_function pinmux_functions[] = {
-+	SH_PFC_FUNCTION(bsc),
- 	SH_PFC_FUNCTION(mmc0),
- 	SH_PFC_FUNCTION(sdhi0),
- 	SH_PFC_FUNCTION(sdhi1),
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0099-ARM-shmobile-r8a7790-tidyup-clock-table-order.patch b/patches.renesas/0099-ARM-shmobile-r8a7790-tidyup-clock-table-order.patch
deleted file mode 100644
index dc4c42a5714ef..0000000000000
--- a/patches.renesas/0099-ARM-shmobile-r8a7790-tidyup-clock-table-order.patch
+++ /dev/null
@@ -1,54 +0,0 @@
-From bf3921a6b9fb00dae9f3aaf6c248f96266e96a65 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Tue, 19 Nov 2013 01:05:23 -0800
-Subject: ARM: shmobile: r8a7790: tidyup clock table order
-
-SuperH lookups clock is using CLKDEV_CON/DEV/ICK_ID() macro
-for a long term.
-But in these days, the ICK clock is defined in random place.
-This patch arranges it.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit eb7a91749fc1c4fa4f011dad40e3faf4c0ca27b0)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r8a7790.c | 13 ++++++++-----
- 1 file changed, 8 insertions(+), 5 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
-index ec6b394add4a..8c280611e3c7 100644
---- a/arch/arm/mach-shmobile/clock-r8a7790.c
-+++ b/arch/arm/mach-shmobile/clock-r8a7790.c
-@@ -266,11 +266,6 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_CON_ID("ssprs",		&div6_clks[DIV6_SSPRS]),
- 
- 	/* MSTP */
--	CLKDEV_ICK_ID("lvds.0", "rcar-du-r8a7790", &mstp_clks[MSTP726]),
--	CLKDEV_ICK_ID("lvds.1", "rcar-du-r8a7790", &mstp_clks[MSTP725]),
--	CLKDEV_ICK_ID("du.0", "rcar-du-r8a7790", &mstp_clks[MSTP724]),
--	CLKDEV_ICK_ID("du.1", "rcar-du-r8a7790", &mstp_clks[MSTP723]),
--	CLKDEV_ICK_ID("du.2", "rcar-du-r8a7790", &mstp_clks[MSTP722]),
- 	CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]),
- 	CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP203]),
- 	CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP206]),
-@@ -303,7 +298,15 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]),
- 	CLKDEV_DEV_ID("qspi.0", &mstp_clks[MSTP917]),
- 	CLKDEV_DEV_ID("renesas_usbhs", &mstp_clks[MSTP704]),
-+
-+	/* ICK */
- 	CLKDEV_ICK_ID("usbhs", "usb_phy_rcar_gen2", &mstp_clks[MSTP704]),
-+	CLKDEV_ICK_ID("lvds.0", "rcar-du-r8a7790", &mstp_clks[MSTP726]),
-+	CLKDEV_ICK_ID("lvds.1", "rcar-du-r8a7790", &mstp_clks[MSTP725]),
-+	CLKDEV_ICK_ID("du.0", "rcar-du-r8a7790", &mstp_clks[MSTP724]),
-+	CLKDEV_ICK_ID("du.1", "rcar-du-r8a7790", &mstp_clks[MSTP723]),
-+	CLKDEV_ICK_ID("du.2", "rcar-du-r8a7790", &mstp_clks[MSTP722]),
-+
- };
- 
- #define R8A7790_CLOCK_ROOT(e, m, p0, p1, p30, p31)		\
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0099-ASoC-rsnd-gen-rsnd_gen_ops-cares-.probe-and-.remove.patch b/patches.renesas/0099-ASoC-rsnd-gen-rsnd_gen_ops-cares-.probe-and-.remove.patch
deleted file mode 100644
index dabcd933e1f82..0000000000000
--- a/patches.renesas/0099-ASoC-rsnd-gen-rsnd_gen_ops-cares-.probe-and-.remove.patch
+++ /dev/null
@@ -1,110 +0,0 @@
-From 18388b5d4f103456263229fdc2e4525ac9e5056e Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Sun, 1 Sep 2013 20:31:16 -0700
-Subject: ASoC: rsnd: gen: rsnd_gen_ops cares .probe and .remove
-
-Current rsnd_gen_ops didn't care about .probe and .remove
-functions, but it was not good sense.
-This patch tidyup it
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@linaro.org>
-(cherry picked from commit 072188b61c9b7aedaa15c46226b537345644beee)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/sh/rcar/gen.c | 41 ++++++++++++++++++++++++-----------------
- 1 file changed, 24 insertions(+), 17 deletions(-)
-
-diff --git a/sound/soc/sh/rcar/gen.c b/sound/soc/sh/rcar/gen.c
-index babb203b43b7..331fc558d796 100644
---- a/sound/soc/sh/rcar/gen.c
-+++ b/sound/soc/sh/rcar/gen.c
-@@ -11,6 +11,11 @@
- #include "rsnd.h"
- 
- struct rsnd_gen_ops {
-+	int (*probe)(struct platform_device *pdev,
-+		     struct rcar_snd_info *info,
-+		     struct rsnd_priv *priv);
-+	void (*remove)(struct platform_device *pdev,
-+		      struct rsnd_priv *priv);
- 	int (*path_init)(struct rsnd_priv *priv,
- 			 struct rsnd_dai *rdai,
- 			 struct rsnd_dai_stream *io);
-@@ -98,11 +103,6 @@ static int rsnd_gen1_path_exit(struct rsnd_priv *priv,
- 	return ret;
- }
- 
--static struct rsnd_gen_ops rsnd_gen1_ops = {
--	.path_init	= rsnd_gen1_path_init,
--	.path_exit	= rsnd_gen1_path_exit,
--};
--
- #define RSND_GEN1_REG_MAP(g, s, i, oi, oa)				\
- 	do {								\
- 		(g)->reg_map[RSND_REG_##i].index  = RSND_GEN1_##s;	\
-@@ -163,7 +163,6 @@ static int rsnd_gen1_probe(struct platform_device *pdev,
- 	    IS_ERR(gen->base[RSND_GEN1_SSI]))
- 		return -ENODEV;
- 
--	gen->ops = &rsnd_gen1_ops;
- 	rsnd_gen1_reg_map_init(gen);
- 
- 	dev_dbg(dev, "Gen1 device probed\n");
-@@ -183,6 +182,13 @@ static void rsnd_gen1_remove(struct platform_device *pdev,
- {
- }
- 
-+static struct rsnd_gen_ops rsnd_gen1_ops = {
-+	.probe		= rsnd_gen1_probe,
-+	.remove		= rsnd_gen1_remove,
-+	.path_init	= rsnd_gen1_path_init,
-+	.path_exit	= rsnd_gen1_path_exit,
-+};
-+
- /*
-  *		Gen
-  */
-@@ -251,6 +257,14 @@ int rsnd_gen_probe(struct platform_device *pdev,
- 		return -ENOMEM;
- 	}
- 
-+	if (rsnd_is_gen1(priv))
-+		gen->ops = &rsnd_gen1_ops;
-+
-+	if (!gen->ops) {
-+		dev_err(dev, "unknown generation R-Car sound device\n");
-+		return -ENODEV;
-+	}
-+
- 	priv->gen = gen;
- 
- 	/*
-@@ -261,20 +275,13 @@ int rsnd_gen_probe(struct platform_device *pdev,
- 	for (i = 0; i < RSND_REG_MAX; i++)
- 		gen->reg_map[i].index = -1;
- 
--	/*
--	 *	init each module
--	 */
--	if (rsnd_is_gen1(priv))
--		return rsnd_gen1_probe(pdev, info, priv);
--
--	dev_err(dev, "unknown generation R-Car sound device\n");
--
--	return -ENODEV;
-+	return gen->ops->probe(pdev, info, priv);
- }
- 
- void rsnd_gen_remove(struct platform_device *pdev,
- 		     struct rsnd_priv *priv)
- {
--	if (rsnd_is_gen1(priv))
--		rsnd_gen1_remove(pdev, priv);
-+	struct rsnd_gen *gen = rsnd_priv_to_gen(priv);
-+
-+	gen->ops->remove(pdev, priv);
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0099-sh-pfc-sh7372-Add-CEU-pin-groups-and-functions.patch b/patches.renesas/0099-sh-pfc-sh7372-Add-CEU-pin-groups-and-functions.patch
deleted file mode 100644
index 501ea82f0ea34..0000000000000
--- a/patches.renesas/0099-sh-pfc-sh7372-Add-CEU-pin-groups-and-functions.patch
+++ /dev/null
@@ -1,118 +0,0 @@
-From c5b747b048c5e4fb440d2877c884754e110c8ac1 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 19 Apr 2013 12:31:08 +0200
-Subject: sh-pfc: sh7372: Add CEU pin groups and functions
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit d4d1c6538ea4784bc1386014dee65a796d207815)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-sh7372.c | 70 +++++++++++++++++++++++++++++++++++++
- 1 file changed, 70 insertions(+)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7372.c b/drivers/pinctrl/sh-pfc/pfc-sh7372.c
-index 9545b3c6..3da83198 100644
---- a/drivers/pinctrl/sh-pfc/pfc-sh7372.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-sh7372.c
-@@ -1029,6 +1029,58 @@ static const unsigned int bsc_wait_pins[] = {
- static const unsigned int bsc_wait_mux[] = {
- 	WAIT_MARK,
- };
-+/* - CEU -------------------------------------------------------------------- */
-+static const unsigned int ceu_data_0_7_pins[] = {
-+	/* D[0:7] */
-+	102, 103, 104, 105, 106, 107, 108, 109,
-+};
-+static const unsigned int ceu_data_0_7_mux[] = {
-+	VIO_D0_MARK, VIO_D1_MARK, VIO_D2_MARK, VIO_D3_MARK,
-+	VIO_D4_MARK, VIO_D5_MARK, VIO_D6_MARK, VIO_D7_MARK,
-+};
-+static const unsigned int ceu_data_8_15_pins[] = {
-+	/* D[8:15] */
-+	110, 111, 112, 113, 114, 115, 116, 117,
-+};
-+static const unsigned int ceu_data_8_15_mux[] = {
-+	VIO_D8_MARK, VIO_D9_MARK, VIO_D10_MARK, VIO_D11_MARK,
-+	VIO_D12_MARK, VIO_D13_MARK, VIO_D14_MARK, VIO_D15_MARK,
-+};
-+static const unsigned int ceu_clk_0_pins[] = {
-+	/* CKO */
-+	120,
-+};
-+static const unsigned int ceu_clk_0_mux[] = {
-+	VIO_CKO_MARK,
-+};
-+static const unsigned int ceu_clk_1_pins[] = {
-+	/* CKO */
-+	16,
-+};
-+static const unsigned int ceu_clk_1_mux[] = {
-+	VIO_CKO1_MARK,
-+};
-+static const unsigned int ceu_clk_2_pins[] = {
-+	/* CKO */
-+	17,
-+};
-+static const unsigned int ceu_clk_2_mux[] = {
-+	VIO_CKO2_MARK,
-+};
-+static const unsigned int ceu_sync_pins[] = {
-+	/* CLK, VD, HD */
-+	118, 100, 101,
-+};
-+static const unsigned int ceu_sync_mux[] = {
-+	VIO_CLK_MARK, VIO_VD_MARK, VIO_HD_MARK,
-+};
-+static const unsigned int ceu_field_pins[] = {
-+	/* FIELD */
-+	119,
-+};
-+static const unsigned int ceu_field_mux[] = {
-+	VIO_FIELD_MARK,
-+};
- /* - MMCIF ------------------------------------------------------------------ */
- static const unsigned int mmc0_data1_0_pins[] = {
- 	/* D[0] */
-@@ -1183,6 +1235,13 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(bsc_rd_we16),
- 	SH_PFC_PIN_GROUP(bsc_bs),
- 	SH_PFC_PIN_GROUP(bsc_rdwr),
-+	SH_PFC_PIN_GROUP(ceu_data_0_7),
-+	SH_PFC_PIN_GROUP(ceu_data_8_15),
-+	SH_PFC_PIN_GROUP(ceu_clk_0),
-+	SH_PFC_PIN_GROUP(ceu_clk_1),
-+	SH_PFC_PIN_GROUP(ceu_clk_2),
-+	SH_PFC_PIN_GROUP(ceu_sync),
-+	SH_PFC_PIN_GROUP(ceu_field),
- 	SH_PFC_PIN_GROUP(mmc0_data1_0),
- 	SH_PFC_PIN_GROUP(mmc0_data4_0),
- 	SH_PFC_PIN_GROUP(mmc0_data8_0),
-@@ -1219,6 +1278,16 @@ static const char * const bsc_groups[] = {
- 	"bsc_rdwr",
- };
- 
-+static const char * const ceu_groups[] = {
-+	"ceu_data_0_7",
-+	"ceu_data_8_15",
-+	"ceu_clk_0",
-+	"ceu_clk_1",
-+	"ceu_clk_2",
-+	"ceu_sync",
-+	"ceu_field",
-+};
-+
- static const char * const mmc0_groups[] = {
- 	"mmc0_data1_0",
- 	"mmc0_data4_0",
-@@ -1252,6 +1321,7 @@ static const char * const sdhi2_groups[] = {
- 
- static const struct sh_pfc_function pinmux_functions[] = {
- 	SH_PFC_FUNCTION(bsc),
-+	SH_PFC_FUNCTION(ceu),
- 	SH_PFC_FUNCTION(mmc0),
- 	SH_PFC_FUNCTION(sdhi0),
- 	SH_PFC_FUNCTION(sdhi1),
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0100-ARM-shmobile-Select-AUTO_ZRELADDR-for-EMEV2.patch b/patches.renesas/0100-ARM-shmobile-Select-AUTO_ZRELADDR-for-EMEV2.patch
deleted file mode 100644
index e9716e0b3ae76..0000000000000
--- a/patches.renesas/0100-ARM-shmobile-Select-AUTO_ZRELADDR-for-EMEV2.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From 6cd0dbbc5c20fb49b2100dec33f2da91813c5826 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Tue, 10 Dec 2013 16:43:16 +0900
-Subject: ARM: shmobile: Select AUTO_ZRELADDR for EMEV2
-
-Since ("ARM: shmobile: Remove legacy KZM9D board code")
-It is now necessary for AUTO_ZRELADDR to be selected
-in order for the kernel to build with kzm9d_defconfig.
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 42a1ba525dd74552f68f3aee0756d16987ad719e)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/Kconfig | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
-index 1b7df173db0e..aa9017bb750c 100644
---- a/arch/arm/mach-shmobile/Kconfig
-+++ b/arch/arm/mach-shmobile/Kconfig
-@@ -113,6 +113,7 @@ config ARCH_EMEV2
- 	select ARM_GIC
- 	select CPU_V7
- 	select USE_OF
-+	select AUTO_ZRELADDR
- 
- config ARCH_R7S72100
- 	bool "RZ/A1H (R7S72100)"
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0100-ASoC-rsnd-scu-cleanup-empty-functions.patch b/patches.renesas/0100-ASoC-rsnd-scu-cleanup-empty-functions.patch
deleted file mode 100644
index 79a7d2f7794b9..0000000000000
--- a/patches.renesas/0100-ASoC-rsnd-scu-cleanup-empty-functions.patch
+++ /dev/null
@@ -1,78 +0,0 @@
-From c1dd06d49881b1e3adca1daa2266a2f9aca948d1 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Sun, 28 Jul 2013 18:59:25 -0700
-Subject: ASoC: rsnd: scu: cleanup empty functions
-
-This patch cleanups empty functions on scu
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@linaro.org>
-(cherry picked from commit 2460719c79854a3bebe569cbfbfa0b1caa1dc434)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/sh/rcar/scu.c | 39 ---------------------------------------
- 1 file changed, 39 deletions(-)
-
-diff --git a/sound/soc/sh/rcar/scu.c b/sound/soc/sh/rcar/scu.c
-index 29837e326bc5..184d9008cecd 100644
---- a/sound/soc/sh/rcar/scu.c
-+++ b/sound/soc/sh/rcar/scu.c
-@@ -146,30 +146,6 @@ static int rsnd_scu_set_hpbif(struct rsnd_priv *priv,
- 	return 0;
- }
- 
--static int rsnd_scu_init(struct rsnd_mod *mod,
--			 struct rsnd_dai *rdai,
--			 struct rsnd_dai_stream *io)
--{
--	struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
--	struct device *dev = rsnd_priv_to_dev(priv);
--
--	dev_dbg(dev, "%s.%d init\n", rsnd_mod_name(mod), rsnd_mod_id(mod));
--
--	return 0;
--}
--
--static int rsnd_scu_quit(struct rsnd_mod *mod,
--			 struct rsnd_dai *rdai,
--			 struct rsnd_dai_stream *io)
--{
--	struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
--	struct device *dev = rsnd_priv_to_dev(priv);
--
--	dev_dbg(dev, "%s.%d quit\n", rsnd_mod_name(mod), rsnd_mod_id(mod));
--
--	return 0;
--}
--
- static int rsnd_scu_start(struct rsnd_mod *mod,
- 			  struct rsnd_dai *rdai,
- 			  struct rsnd_dai_stream *io)
-@@ -209,24 +185,9 @@ static int rsnd_scu_start(struct rsnd_mod *mod,
- 	return 0;
- }
- 
--static int rsnd_scu_stop(struct rsnd_mod *mod,
--			 struct rsnd_dai *rdai,
--			 struct rsnd_dai_stream *io)
--{
--	struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
--	struct device *dev = rsnd_priv_to_dev(priv);
--
--	dev_dbg(dev, "%s.%d stop\n", rsnd_mod_name(mod), rsnd_mod_id(mod));
--
--	return 0;
--}
--
- static struct rsnd_mod_ops rsnd_scu_ops = {
- 	.name	= "scu",
--	.init	= rsnd_scu_init,
--	.quit	= rsnd_scu_quit,
- 	.start	= rsnd_scu_start,
--	.stop	= rsnd_scu_stop,
- };
- 
- struct rsnd_mod *rsnd_scu_mod_get(struct rsnd_priv *priv, int id)
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0100-sh-pfc-sh7372-Add-FLCTL-pin-groups-and-functions.patch b/patches.renesas/0100-sh-pfc-sh7372-Add-FLCTL-pin-groups-and-functions.patch
deleted file mode 100644
index 6c7cdd4f0acbb..0000000000000
--- a/patches.renesas/0100-sh-pfc-sh7372-Add-FLCTL-pin-groups-and-functions.patch
+++ /dev/null
@@ -1,92 +0,0 @@
-From 662376db0568c9bd4fe5c106945474a00ce0c8d2 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 19 Apr 2013 12:31:08 +0200
-Subject: sh-pfc: sh7372: Add FLCTL pin groups and functions
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 8b1b71d3a857cb0486e27516d9d296ae7b45c5ca)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-sh7372.c | 44 +++++++++++++++++++++++++++++++++++++
- 1 file changed, 44 insertions(+)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7372.c b/drivers/pinctrl/sh-pfc/pfc-sh7372.c
-index 3da83198..99486996 100644
---- a/drivers/pinctrl/sh-pfc/pfc-sh7372.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-sh7372.c
-@@ -1081,6 +1081,38 @@ static const unsigned int ceu_field_pins[] = {
- static const unsigned int ceu_field_mux[] = {
- 	VIO_FIELD_MARK,
- };
-+/* - FLCTL ------------------------------------------------------------------ */
-+static const unsigned int flctl_data_pins[] = {
-+	/* NAF[0:15] */
-+	46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61,
-+};
-+static const unsigned int flctl_data_mux[] = {
-+	D0_NAF0_MARK, D1_NAF1_MARK, D2_NAF2_MARK, D3_NAF3_MARK,
-+	D4_NAF4_MARK, D5_NAF5_MARK, D6_NAF6_MARK, D7_NAF7_MARK,
-+	D8_NAF8_MARK, D9_NAF9_MARK, D10_NAF10_MARK, D11_NAF11_MARK,
-+	D12_NAF12_MARK, D13_NAF13_MARK, D14_NAF14_MARK, D15_NAF15_MARK,
-+};
-+static const unsigned int flctl_ce0_pins[] = {
-+	/* CE */
-+	68,
-+};
-+static const unsigned int flctl_ce0_mux[] = {
-+	FCE0_MARK,
-+};
-+static const unsigned int flctl_ce1_pins[] = {
-+	/* CE */
-+	66,
-+};
-+static const unsigned int flctl_ce1_mux[] = {
-+	FCE1_MARK,
-+};
-+static const unsigned int flctl_ctrl_pins[] = {
-+	/* FCDE, FOE, FSC, FWE, FRB */
-+	24, 23, 69, 70, 73,
-+};
-+static const unsigned int flctl_ctrl_mux[] = {
-+	A5_FCDE_MARK, A4_FOE_MARK, RD_FSC_MARK, WE0_FWE_MARK, FRB_MARK,
-+};
- /* - MMCIF ------------------------------------------------------------------ */
- static const unsigned int mmc0_data1_0_pins[] = {
- 	/* D[0] */
-@@ -1242,6 +1274,10 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(ceu_clk_2),
- 	SH_PFC_PIN_GROUP(ceu_sync),
- 	SH_PFC_PIN_GROUP(ceu_field),
-+	SH_PFC_PIN_GROUP(flctl_data),
-+	SH_PFC_PIN_GROUP(flctl_ce0),
-+	SH_PFC_PIN_GROUP(flctl_ce1),
-+	SH_PFC_PIN_GROUP(flctl_ctrl),
- 	SH_PFC_PIN_GROUP(mmc0_data1_0),
- 	SH_PFC_PIN_GROUP(mmc0_data4_0),
- 	SH_PFC_PIN_GROUP(mmc0_data8_0),
-@@ -1288,6 +1324,13 @@ static const char * const ceu_groups[] = {
- 	"ceu_field",
- };
- 
-+static const char * const flctl_groups[] = {
-+	"flctl_data",
-+	"flctl_ce0",
-+	"flctl_ce1",
-+	"flctl_ctrl",
-+};
-+
- static const char * const mmc0_groups[] = {
- 	"mmc0_data1_0",
- 	"mmc0_data4_0",
-@@ -1322,6 +1365,7 @@ static const char * const sdhi2_groups[] = {
- static const struct sh_pfc_function pinmux_functions[] = {
- 	SH_PFC_FUNCTION(bsc),
- 	SH_PFC_FUNCTION(ceu),
-+	SH_PFC_FUNCTION(flctl),
- 	SH_PFC_FUNCTION(mmc0),
- 	SH_PFC_FUNCTION(sdhi0),
- 	SH_PFC_FUNCTION(sdhi1),
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0101-ARM-shmobile-r8a7778-add-HPBIFx-DMAEngine-support.patch b/patches.renesas/0101-ARM-shmobile-r8a7778-add-HPBIFx-DMAEngine-support.patch
deleted file mode 100644
index 62770b7113a15..0000000000000
--- a/patches.renesas/0101-ARM-shmobile-r8a7778-add-HPBIFx-DMAEngine-support.patch
+++ /dev/null
@@ -1,121 +0,0 @@
-From 000737319bb9ee085fdf3d42ee2a1e5ae8c46428 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Wed, 20 Nov 2013 23:25:32 -0800
-Subject: ARM: shmobile: r8a7778: add HPBIFx DMAEngine support
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit b42831843e66688a18a65f0d24e79473b76905db)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/include/mach/r8a7778.h | 18 ++++++++++
- arch/arm/mach-shmobile/setup-r8a7778.c        | 51 +++++++++++++++++++++++++++
- 2 files changed, 69 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/include/mach/r8a7778.h b/arch/arm/mach-shmobile/include/mach/r8a7778.h
-index 441886c9714b..b497f932d04f 100644
---- a/arch/arm/mach-shmobile/include/mach/r8a7778.h
-+++ b/arch/arm/mach-shmobile/include/mach/r8a7778.h
-@@ -27,6 +27,24 @@ enum {
- 	HPBDMA_SLAVE_DUMMY,
- 	HPBDMA_SLAVE_SDHI0_TX,
- 	HPBDMA_SLAVE_SDHI0_RX,
-+	HPBDMA_SLAVE_HPBIF0_TX,
-+	HPBDMA_SLAVE_HPBIF0_RX,
-+	HPBDMA_SLAVE_HPBIF1_TX,
-+	HPBDMA_SLAVE_HPBIF1_RX,
-+	HPBDMA_SLAVE_HPBIF2_TX,
-+	HPBDMA_SLAVE_HPBIF2_RX,
-+	HPBDMA_SLAVE_HPBIF3_TX,
-+	HPBDMA_SLAVE_HPBIF3_RX,
-+	HPBDMA_SLAVE_HPBIF4_TX,
-+	HPBDMA_SLAVE_HPBIF4_RX,
-+	HPBDMA_SLAVE_HPBIF5_TX,
-+	HPBDMA_SLAVE_HPBIF5_RX,
-+	HPBDMA_SLAVE_HPBIF6_TX,
-+	HPBDMA_SLAVE_HPBIF6_RX,
-+	HPBDMA_SLAVE_HPBIF7_TX,
-+	HPBDMA_SLAVE_HPBIF7_RX,
-+	HPBDMA_SLAVE_HPBIF8_TX,
-+	HPBDMA_SLAVE_HPBIF8_RX,
- };
- 
- extern void r8a7778_add_standard_devices(void);
-diff --git a/arch/arm/mach-shmobile/setup-r8a7778.c b/arch/arm/mach-shmobile/setup-r8a7778.c
-index 03fcc5974ef9..81701cfb6cc6 100644
---- a/arch/arm/mach-shmobile/setup-r8a7778.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7778.c
-@@ -319,6 +319,29 @@ void __init r8a7778_add_dt_devices(void)
- #define HPB_DMAE_ASYNCMDR_ASMD21_SINGLE	BIT(1)	/* SDHI0 */
- #define HPB_DMAE_ASYNCMDR_ASMD21_MULTI	0	/* SDHI0 */
- 
-+#define HPBDMA_HPBIF(_id)				\
-+{							\
-+	.id	= HPBDMA_SLAVE_HPBIF## _id ##_TX,	\
-+	.addr	= 0xffda0000 + (_id * 0x1000),		\
-+	.dcr	= HPB_DMAE_DCR_CT |			\
-+		  HPB_DMAE_DCR_DIP |			\
-+		  HPB_DMAE_DCR_SPDS_32BIT |		\
-+		  HPB_DMAE_DCR_DMDL |			\
-+		  HPB_DMAE_DCR_DPDS_32BIT,		\
-+	.port   = 0x1111,				\
-+	.dma_ch = (28 + _id),				\
-+}, {							\
-+	.id	= HPBDMA_SLAVE_HPBIF## _id ##_RX,	\
-+	.addr	= 0xffda0000 + (_id * 0x1000),		\
-+	.dcr	= HPB_DMAE_DCR_CT |			\
-+		  HPB_DMAE_DCR_DIP |			\
-+		  HPB_DMAE_DCR_SMDL |			\
-+		  HPB_DMAE_DCR_SPDS_32BIT |		\
-+		  HPB_DMAE_DCR_DPDS_32BIT,		\
-+	.port   = 0x1111,				\
-+	.dma_ch = (28 + _id),				\
-+}
-+
- static const struct hpb_dmae_slave_config hpb_dmae_slaves[] = {
- 	{
- 		.id	= HPBDMA_SLAVE_SDHI0_TX,
-@@ -349,11 +372,39 @@ static const struct hpb_dmae_slave_config hpb_dmae_slaves[] = {
- 		.flags	= HPB_DMAE_SET_ASYNC_RESET | HPB_DMAE_SET_ASYNC_MODE,
- 		.dma_ch	= 22,
- 	},
-+
-+	HPBDMA_HPBIF(0),
-+	HPBDMA_HPBIF(1),
-+	HPBDMA_HPBIF(2),
-+	HPBDMA_HPBIF(3),
-+	HPBDMA_HPBIF(4),
-+	HPBDMA_HPBIF(5),
-+	HPBDMA_HPBIF(6),
-+	HPBDMA_HPBIF(7),
-+	HPBDMA_HPBIF(8),
- };
- 
- static const struct hpb_dmae_channel hpb_dmae_channels[] = {
- 	HPB_DMAE_CHANNEL(0x7e, HPBDMA_SLAVE_SDHI0_TX), /* ch. 21 */
- 	HPB_DMAE_CHANNEL(0x7e, HPBDMA_SLAVE_SDHI0_RX), /* ch. 22 */
-+	HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF0_TX), /* ch. 28 */
-+	HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF0_RX), /* ch. 28 */
-+	HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF1_TX), /* ch. 29 */
-+	HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF1_RX), /* ch. 29 */
-+	HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF2_TX), /* ch. 30 */
-+	HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF2_RX), /* ch. 30 */
-+	HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF3_TX), /* ch. 31 */
-+	HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF3_RX), /* ch. 31 */
-+	HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF4_TX), /* ch. 32 */
-+	HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF4_RX), /* ch. 32 */
-+	HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF5_TX), /* ch. 33 */
-+	HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF5_RX), /* ch. 33 */
-+	HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF6_TX), /* ch. 34 */
-+	HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF6_RX), /* ch. 34 */
-+	HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF7_TX), /* ch. 35 */
-+	HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF7_RX), /* ch. 35 */
-+	HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF8_TX), /* ch. 36 */
-+	HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF8_RX), /* ch. 36 */
- };
- 
- static struct hpb_dmae_pdata dma_platform_data __initdata = {
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0101-ASoC-rcar-remove-unnecessary-mach-clock.h.patch b/patches.renesas/0101-ASoC-rcar-remove-unnecessary-mach-clock.h.patch
deleted file mode 100644
index 682e12d8efd22..0000000000000
--- a/patches.renesas/0101-ASoC-rcar-remove-unnecessary-mach-clock.h.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From 6ee807d457689bf1ca6e3fa96e8ba794de4ae333 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Tue, 24 Sep 2013 01:25:08 -0700
-Subject: ASoC: rcar: remove unnecessary mach/clock.h
-
-${LINUX}/sound/soc/sh driver can be compiled from
-SuperH and ARM.
-but, ${LINUX}/sound/soc/sh/rcar driver included
-SH-ARM specific header.
-This patch removes it
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@linaro.org>
-(cherry picked from commit d3be689e6a07c00123786659b4429b07cf4272ac)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/sh/rcar/adg.c | 1 -
- 1 file changed, 1 deletion(-)
-
-diff --git a/sound/soc/sh/rcar/adg.c b/sound/soc/sh/rcar/adg.c
-index d80deb7ccf13..2935bbf1811b 100644
---- a/sound/soc/sh/rcar/adg.c
-+++ b/sound/soc/sh/rcar/adg.c
-@@ -8,7 +8,6 @@
-  * for more details.
-  */
- #include <linux/sh_clk.h>
--#include <mach/clock.h>
- #include "rsnd.h"
- 
- #define CLKA	0
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0101-sh-pfc-sh7372-Add-FSI-pin-groups-and-functions.patch b/patches.renesas/0101-sh-pfc-sh7372-Add-FSI-pin-groups-and-functions.patch
deleted file mode 100644
index 1aaaeb048cba9..0000000000000
--- a/patches.renesas/0101-sh-pfc-sh7372-Add-FSI-pin-groups-and-functions.patch
+++ /dev/null
@@ -1,139 +0,0 @@
-From 1fee0894534d105bfcf98146745cb5c958d9f3ed Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 19 Apr 2013 12:31:08 +0200
-Subject: sh-pfc: sh7372: Add FSI pin groups and functions
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 971a0cd6dcb6330c88fdc935944f1bbfe118ba00)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-sh7372.c | 91 +++++++++++++++++++++++++++++++++++++
- 1 file changed, 91 insertions(+)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7372.c b/drivers/pinctrl/sh-pfc/pfc-sh7372.c
-index 99486996..641f6ee5 100644
---- a/drivers/pinctrl/sh-pfc/pfc-sh7372.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-sh7372.c
-@@ -1113,6 +1113,71 @@ static const unsigned int flctl_ctrl_pins[] = {
- static const unsigned int flctl_ctrl_mux[] = {
- 	A5_FCDE_MARK, A4_FOE_MARK, RD_FSC_MARK, WE0_FWE_MARK, FRB_MARK,
- };
-+/* - FSIA ------------------------------------------------------------------- */
-+static const unsigned int fsia_mclk_in_pins[] = {
-+	/* CK */
-+	4,
-+};
-+static const unsigned int fsia_mclk_in_mux[] = {
-+	FSIACK_MARK,
-+};
-+static const unsigned int fsia_mclk_out_pins[] = {
-+	/* OMC */
-+	8,
-+};
-+static const unsigned int fsia_mclk_out_mux[] = {
-+	FSIAOMC_MARK,
-+};
-+static const unsigned int fsia_sclk_in_pins[] = {
-+	/* ILR, IBT */
-+	5, 6,
-+};
-+static const unsigned int fsia_sclk_in_mux[] = {
-+	FSIAILR_MARK, FSIAIBT_MARK,
-+};
-+static const unsigned int fsia_sclk_out_pins[] = {
-+	/* OLR, OBT */
-+	9, 10,
-+};
-+static const unsigned int fsia_sclk_out_mux[] = {
-+	FSIAOLR_MARK, FSIAOBT_MARK,
-+};
-+static const unsigned int fsia_data_in_pins[] = {
-+	/* ISLD */
-+	7,
-+};
-+static const unsigned int fsia_data_in_mux[] = {
-+	FSIAISLD_MARK,
-+};
-+static const unsigned int fsia_data_out_pins[] = {
-+	/* OSLD */
-+	11,
-+};
-+static const unsigned int fsia_data_out_mux[] = {
-+	FSIAOSLD_MARK,
-+};
-+static const unsigned int fsia_spdif_0_pins[] = {
-+	/* SPDIF */
-+	11,
-+};
-+static const unsigned int fsia_spdif_0_mux[] = {
-+	FSIASPDIF_11_MARK,
-+};
-+static const unsigned int fsia_spdif_1_pins[] = {
-+	/* SPDIF */
-+	15,
-+};
-+static const unsigned int fsia_spdif_1_mux[] = {
-+	FSIASPDIF_15_MARK,
-+};
-+/* - FSIB ------------------------------------------------------------------- */
-+static const unsigned int fsib_mclk_in_pins[] = {
-+	/* CK */
-+	4,
-+};
-+static const unsigned int fsib_mclk_in_mux[] = {
-+	FSIBCK_MARK,
-+};
- /* - MMCIF ------------------------------------------------------------------ */
- static const unsigned int mmc0_data1_0_pins[] = {
- 	/* D[0] */
-@@ -1278,6 +1343,15 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(flctl_ce0),
- 	SH_PFC_PIN_GROUP(flctl_ce1),
- 	SH_PFC_PIN_GROUP(flctl_ctrl),
-+	SH_PFC_PIN_GROUP(fsia_mclk_in),
-+	SH_PFC_PIN_GROUP(fsia_mclk_out),
-+	SH_PFC_PIN_GROUP(fsia_sclk_in),
-+	SH_PFC_PIN_GROUP(fsia_sclk_out),
-+	SH_PFC_PIN_GROUP(fsia_data_in),
-+	SH_PFC_PIN_GROUP(fsia_data_out),
-+	SH_PFC_PIN_GROUP(fsia_spdif_0),
-+	SH_PFC_PIN_GROUP(fsia_spdif_1),
-+	SH_PFC_PIN_GROUP(fsib_mclk_in),
- 	SH_PFC_PIN_GROUP(mmc0_data1_0),
- 	SH_PFC_PIN_GROUP(mmc0_data4_0),
- 	SH_PFC_PIN_GROUP(mmc0_data8_0),
-@@ -1331,6 +1405,21 @@ static const char * const flctl_groups[] = {
- 	"flctl_ctrl",
- };
- 
-+static const char * const fsia_groups[] = {
-+	"fsia_mclk_in",
-+	"fsia_mclk_out",
-+	"fsia_sclk_in",
-+	"fsia_sclk_out",
-+	"fsia_data_in",
-+	"fsia_data_out",
-+	"fsia_spdif_0",
-+	"fsia_spdif_1",
-+};
-+
-+static const char * const fsib_groups[] = {
-+	"fsib_mclk_in",
-+};
-+
- static const char * const mmc0_groups[] = {
- 	"mmc0_data1_0",
- 	"mmc0_data4_0",
-@@ -1366,6 +1455,8 @@ static const struct sh_pfc_function pinmux_functions[] = {
- 	SH_PFC_FUNCTION(bsc),
- 	SH_PFC_FUNCTION(ceu),
- 	SH_PFC_FUNCTION(flctl),
-+	SH_PFC_FUNCTION(fsia),
-+	SH_PFC_FUNCTION(fsib),
- 	SH_PFC_FUNCTION(mmc0),
- 	SH_PFC_FUNCTION(sdhi0),
- 	SH_PFC_FUNCTION(sdhi1),
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0102-ARM-shmobile-r8a7790-add-SSI-MSTP-clocks.patch b/patches.renesas/0102-ARM-shmobile-r8a7790-add-SSI-MSTP-clocks.patch
deleted file mode 100644
index c81e706b8fa8c..0000000000000
--- a/patches.renesas/0102-ARM-shmobile-r8a7790-add-SSI-MSTP-clocks.patch
+++ /dev/null
@@ -1,81 +0,0 @@
-From 1c24087299925bf277b2f94ed58c1052e9660fc1 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Sun, 1 Dec 2013 18:17:18 -0800
-Subject: ARM: shmobile: r8a7790: add SSI MSTP clocks
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit b3cc52eb9e9cdb4fab9340ca285f8d9685f5db30)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r8a7790.c | 25 +++++++++++++++++++++++++
- 1 file changed, 25 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
-index 8c280611e3c7..80cd8f31fa3c 100644
---- a/arch/arm/mach-shmobile/clock-r8a7790.c
-+++ b/arch/arm/mach-shmobile/clock-r8a7790.c
-@@ -53,6 +53,7 @@
- #define SMSTPCR7 0xe615014c
- #define SMSTPCR8 0xe6150990
- #define SMSTPCR9 0xe6150994
-+#define SMSTPCR10 0xe6150998
- 
- #define SDCKCR		0xE6150074
- #define SD2CKCR		0xE6150078
-@@ -182,6 +183,8 @@ static struct clk div6_clks[DIV6_NR] = {
- 
- /* MSTP */
- enum {
-+	MSTP1015, MSTP1014, MSTP1013, MSTP1012, MSTP1011, MSTP1010,
-+	MSTP1009, MSTP1008, MSTP1007, MSTP1006, MSTP1005,
- 	MSTP931, MSTP930, MSTP929, MSTP928,
- 	MSTP917,
- 	MSTP813,
-@@ -196,6 +199,17 @@ enum {
- };
- 
- static struct clk mstp_clks[MSTP_NR] = {
-+	[MSTP1015] = SH_CLK_MSTP32(&p_clk, SMSTPCR10, 15, 0), /* SSI0 */
-+	[MSTP1014] = SH_CLK_MSTP32(&p_clk, SMSTPCR10, 14, 0), /* SSI1 */
-+	[MSTP1013] = SH_CLK_MSTP32(&p_clk, SMSTPCR10, 13, 0), /* SSI2 */
-+	[MSTP1012] = SH_CLK_MSTP32(&p_clk, SMSTPCR10, 12, 0), /* SSI3 */
-+	[MSTP1011] = SH_CLK_MSTP32(&p_clk, SMSTPCR10, 11, 0), /* SSI4 */
-+	[MSTP1010] = SH_CLK_MSTP32(&p_clk, SMSTPCR10, 10, 0), /* SSI5 */
-+	[MSTP1009] = SH_CLK_MSTP32(&p_clk, SMSTPCR10,  9, 0), /* SSI6 */
-+	[MSTP1008] = SH_CLK_MSTP32(&p_clk, SMSTPCR10,  8, 0), /* SSI7 */
-+	[MSTP1007] = SH_CLK_MSTP32(&p_clk, SMSTPCR10,  7, 0), /* SSI8 */
-+	[MSTP1006] = SH_CLK_MSTP32(&p_clk, SMSTPCR10,  6, 0), /* SSI9 */
-+	[MSTP1005] = SH_CLK_MSTP32(&p_clk, SMSTPCR10,  5, 0), /* SSI ALL */
- 	[MSTP931] = SH_CLK_MSTP32(&p_clk, SMSTPCR9, 31, 0), /* I2C0 */
- 	[MSTP930] = SH_CLK_MSTP32(&p_clk, SMSTPCR9, 30, 0), /* I2C1 */
- 	[MSTP929] = SH_CLK_MSTP32(&p_clk, SMSTPCR9, 29, 0), /* I2C2 */
-@@ -266,6 +280,7 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_CON_ID("ssprs",		&div6_clks[DIV6_SSPRS]),
- 
- 	/* MSTP */
-+	CLKDEV_DEV_ID("rcar_sound", &mstp_clks[MSTP1005]),
- 	CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]),
- 	CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP203]),
- 	CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP206]),
-@@ -306,6 +321,16 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_ICK_ID("du.0", "rcar-du-r8a7790", &mstp_clks[MSTP724]),
- 	CLKDEV_ICK_ID("du.1", "rcar-du-r8a7790", &mstp_clks[MSTP723]),
- 	CLKDEV_ICK_ID("du.2", "rcar-du-r8a7790", &mstp_clks[MSTP722]),
-+	CLKDEV_ICK_ID("ssi.0", "rcar_sound", &mstp_clks[MSTP1015]),
-+	CLKDEV_ICK_ID("ssi.1", "rcar_sound", &mstp_clks[MSTP1014]),
-+	CLKDEV_ICK_ID("ssi.2", "rcar_sound", &mstp_clks[MSTP1013]),
-+	CLKDEV_ICK_ID("ssi.3", "rcar_sound", &mstp_clks[MSTP1012]),
-+	CLKDEV_ICK_ID("ssi.4", "rcar_sound", &mstp_clks[MSTP1011]),
-+	CLKDEV_ICK_ID("ssi.5", "rcar_sound", &mstp_clks[MSTP1010]),
-+	CLKDEV_ICK_ID("ssi.6", "rcar_sound", &mstp_clks[MSTP1009]),
-+	CLKDEV_ICK_ID("ssi.7", "rcar_sound", &mstp_clks[MSTP1008]),
-+	CLKDEV_ICK_ID("ssi.8", "rcar_sound", &mstp_clks[MSTP1007]),
-+	CLKDEV_ICK_ID("ssi.9", "rcar_sound", &mstp_clks[MSTP1006]),
- 
- };
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0102-ASoC-rsnd-fixup-flag-name-of-rsnd_scu_platform_info.patch b/patches.renesas/0102-ASoC-rsnd-fixup-flag-name-of-rsnd_scu_platform_info.patch
deleted file mode 100644
index 127c404f27fbe..0000000000000
--- a/patches.renesas/0102-ASoC-rsnd-fixup-flag-name-of-rsnd_scu_platform_info.patch
+++ /dev/null
@@ -1,48 +0,0 @@
-From e66f912c0a82f416b8d96ff8d4e85a45d38aa576 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Sun, 8 Sep 2013 21:21:41 -0700
-Subject: ASoC: rsnd: fixup flag name of rsnd_scu_platform_info
-
-it should be *USE*, not *USB*
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@linaro.org>
-(cherry picked from commit 34e4447515a18e0602f6df1a08b6a6ea63dea14b)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- include/sound/rcar_snd.h | 2 +-
- sound/soc/sh/rcar/scu.c  | 4 ++--
- 2 files changed, 3 insertions(+), 3 deletions(-)
-
-diff --git a/include/sound/rcar_snd.h b/include/sound/rcar_snd.h
-index d35412ae03b3..fe66533e9b7a 100644
---- a/include/sound/rcar_snd.h
-+++ b/include/sound/rcar_snd.h
-@@ -55,7 +55,7 @@ struct rsnd_ssi_platform_info {
- /*
-  * flags
-  */
--#define RSND_SCU_USB_HPBIF		(1 << 31) /* it needs RSND_SSI_DEPENDENT */
-+#define RSND_SCU_USE_HPBIF		(1 << 31) /* it needs RSND_SSI_DEPENDENT */
- 
- struct rsnd_scu_platform_info {
- 	u32 flags;
-diff --git a/sound/soc/sh/rcar/scu.c b/sound/soc/sh/rcar/scu.c
-index 184d9008cecd..2df2e9150b89 100644
---- a/sound/soc/sh/rcar/scu.c
-+++ b/sound/soc/sh/rcar/scu.c
-@@ -157,9 +157,9 @@ static int rsnd_scu_start(struct rsnd_mod *mod,
- 	int ret;
- 
- 	/*
--	 * SCU will be used if it has RSND_SCU_USB_HPBIF flags
-+	 * SCU will be used if it has RSND_SCU_USE_HPBIF flags
- 	 */
--	if (!(flags & RSND_SCU_USB_HPBIF)) {
-+	if (!(flags & RSND_SCU_USE_HPBIF)) {
- 		/* it use PIO transter */
- 		dev_dbg(dev, "%s%d is not used\n",
- 			rsnd_mod_name(mod), rsnd_mod_id(mod));
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0102-sh-pfc-sh7372-Add-HDMI-pin-groups-and-functions.patch b/patches.renesas/0102-sh-pfc-sh7372-Add-HDMI-pin-groups-and-functions.patch
deleted file mode 100644
index 7a72e64962c5e..0000000000000
--- a/patches.renesas/0102-sh-pfc-sh7372-Add-HDMI-pin-groups-and-functions.patch
+++ /dev/null
@@ -1,62 +0,0 @@
-From 76682ea1f1e8452ac444e071fda9488ab3ae37d6 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 19 Apr 2013 12:31:08 +0200
-Subject: sh-pfc: sh7372: Add HDMI pin groups and functions
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 7231fa45e9e01fa9288098579b2d2a93202f4d3f)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-sh7372.c | 14 ++++++++++++++
- 1 file changed, 14 insertions(+)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7372.c b/drivers/pinctrl/sh-pfc/pfc-sh7372.c
-index 641f6ee5..73b9e255 100644
---- a/drivers/pinctrl/sh-pfc/pfc-sh7372.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-sh7372.c
-@@ -1178,6 +1178,14 @@ static const unsigned int fsib_mclk_in_pins[] = {
- static const unsigned int fsib_mclk_in_mux[] = {
- 	FSIBCK_MARK,
- };
-+/* - HDMI ------------------------------------------------------------------- */
-+static const unsigned int hdmi_pins[] = {
-+	/* HPD, CEC */
-+	169, 170,
-+};
-+static const unsigned int hdmi_mux[] = {
-+	HDMI_HPD_MARK, HDMI_CEC_MARK,
-+};
- /* - MMCIF ------------------------------------------------------------------ */
- static const unsigned int mmc0_data1_0_pins[] = {
- 	/* D[0] */
-@@ -1352,6 +1360,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(fsia_spdif_0),
- 	SH_PFC_PIN_GROUP(fsia_spdif_1),
- 	SH_PFC_PIN_GROUP(fsib_mclk_in),
-+	SH_PFC_PIN_GROUP(hdmi),
- 	SH_PFC_PIN_GROUP(mmc0_data1_0),
- 	SH_PFC_PIN_GROUP(mmc0_data4_0),
- 	SH_PFC_PIN_GROUP(mmc0_data8_0),
-@@ -1420,6 +1429,10 @@ static const char * const fsib_groups[] = {
- 	"fsib_mclk_in",
- };
- 
-+static const char * const hdmi_groups[] = {
-+	"hdmi",
-+};
-+
- static const char * const mmc0_groups[] = {
- 	"mmc0_data1_0",
- 	"mmc0_data4_0",
-@@ -1457,6 +1470,7 @@ static const struct sh_pfc_function pinmux_functions[] = {
- 	SH_PFC_FUNCTION(flctl),
- 	SH_PFC_FUNCTION(fsia),
- 	SH_PFC_FUNCTION(fsib),
-+	SH_PFC_FUNCTION(hdmi),
- 	SH_PFC_FUNCTION(mmc0),
- 	SH_PFC_FUNCTION(sdhi0),
- 	SH_PFC_FUNCTION(sdhi1),
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0103-ARM-shmobile-r8a7740-add-FSI-clock-support-for-DT.patch b/patches.renesas/0103-ARM-shmobile-r8a7740-add-FSI-clock-support-for-DT.patch
deleted file mode 100644
index 8bb0932f15a61..0000000000000
--- a/patches.renesas/0103-ARM-shmobile-r8a7740-add-FSI-clock-support-for-DT.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From fac8d29367689fc9a3e1d12e5da753ec2cb7a814 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Tue, 3 Dec 2013 17:28:27 -0800
-Subject: ARM: shmobile: r8a7740: add FSI clock support for DT
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 605dfb0b5fd75d3255360e7ee3e701bf5aeda7b4)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r8a7740.c | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c
-index c826bca4024e..e9a3c6401845 100644
---- a/arch/arm/mach-shmobile/clock-r8a7740.c
-+++ b/arch/arm/mach-shmobile/clock-r8a7740.c
-@@ -585,6 +585,7 @@ static struct clk_lookup lookups[] = {
- 
- 	CLKDEV_DEV_ID("sh_cmt.10",		&mstp_clks[MSTP329]),
- 	CLKDEV_DEV_ID("sh_fsi2",		&mstp_clks[MSTP328]),
-+	CLKDEV_DEV_ID("fe1f0000.sound",		&mstp_clks[MSTP328]),
- 	CLKDEV_DEV_ID("i2c-sh_mobile.1",	&mstp_clks[MSTP323]),
- 	CLKDEV_DEV_ID("e6c20000.i2c",		&mstp_clks[MSTP323]),
- 	CLKDEV_DEV_ID("renesas_usbhs",		&mstp_clks[MSTP320]),
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0103-ASoC-rsnd-remove-rsnd_priv_read-write-bset.patch b/patches.renesas/0103-ASoC-rsnd-remove-rsnd_priv_read-write-bset.patch
deleted file mode 100644
index 0c8a576cd6c4e..0000000000000
--- a/patches.renesas/0103-ASoC-rsnd-remove-rsnd_priv_read-write-bset.patch
+++ /dev/null
@@ -1,71 +0,0 @@
-From c3dd63df4d494e80b2e33d62212aa6dc8218a4d8 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Mon, 23 Sep 2013 23:12:17 -0700
-Subject: ASoC: rsnd: remove rsnd_priv_read/write/bset()
-
-adg.c only used rsnd_priv_read/write/bset()
-which is the only user of NULL mod.
-but, it can be removed.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@linaro.org>
-(cherry picked from commit efeb970ee799b80c984a42d5706081af6047e160)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/sh/rcar/adg.c  | 10 +++++++---
- sound/soc/sh/rcar/rsnd.h |  4 ----
- 2 files changed, 7 insertions(+), 7 deletions(-)
-
-diff --git a/sound/soc/sh/rcar/adg.c b/sound/soc/sh/rcar/adg.c
-index 2935bbf1811b..9430097979a5 100644
---- a/sound/soc/sh/rcar/adg.c
-+++ b/sound/soc/sh/rcar/adg.c
-@@ -21,6 +21,7 @@ struct rsnd_adg {
- 
- 	int rate_of_441khz_div_6;
- 	int rate_of_48khz_div_6;
-+	u32 ckr;
- };
- 
- #define for_each_rsnd_clk(pos, adg, i)		\
-@@ -115,6 +116,11 @@ int rsnd_adg_ssi_clk_try_start(struct rsnd_mod *mod, unsigned int rate)
- 
- found_clock:
- 
-+	/* see rsnd_adg_ssi_clk_init() */
-+	rsnd_mod_bset(mod, SSICKR, 0x00FF0000, adg->ckr);
-+	rsnd_mod_write(mod, BRRA,  0x00000002); /* 1/6 */
-+	rsnd_mod_write(mod, BRRB,  0x00000002); /* 1/6 */
-+
- 	/*
- 	 * This "mod" = "ssi" here.
- 	 * we can get "ssi id" from mod
-@@ -181,9 +187,7 @@ static void rsnd_adg_ssi_clk_init(struct rsnd_priv *priv, struct rsnd_adg *adg)
- 		}
- 	}
- 
--	rsnd_priv_bset(priv, SSICKR, 0x00FF0000, ckr);
--	rsnd_priv_write(priv, BRRA,  0x00000002); /* 1/6 */
--	rsnd_priv_write(priv, BRRB,  0x00000002); /* 1/6 */
-+	adg->ckr = ckr;
- }
- 
- int rsnd_adg_probe(struct platform_device *pdev,
-diff --git a/sound/soc/sh/rcar/rsnd.h b/sound/soc/sh/rcar/rsnd.h
-index 9cc6986a8cfb..3868aaf41cc4 100644
---- a/sound/soc/sh/rcar/rsnd.h
-+++ b/sound/soc/sh/rcar/rsnd.h
-@@ -78,10 +78,6 @@ struct rsnd_dai_stream;
- #define rsnd_mod_bset(m, r, s, d) \
- 	rsnd_bset(rsnd_mod_to_priv(m), m, RSND_REG_##r, s, d)
- 
--#define rsnd_priv_read(p, r)		rsnd_read(p, NULL, RSND_REG_##r)
--#define rsnd_priv_write(p, r, d)	rsnd_write(p, NULL, RSND_REG_##r, d)
--#define rsnd_priv_bset(p, r, s, d)	rsnd_bset(p, NULL, RSND_REG_##r, s, d)
--
- u32 rsnd_read(struct rsnd_priv *priv, struct rsnd_mod *mod, enum rsnd_reg reg);
- void rsnd_write(struct rsnd_priv *priv, struct rsnd_mod *mod,
- 		enum rsnd_reg reg, u32 data);
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0103-sh-pfc-sh7372-Add-INTC-pin-groups-and-functions.patch b/patches.renesas/0103-sh-pfc-sh7372-Add-INTC-pin-groups-and-functions.patch
deleted file mode 100644
index b4c6bb45b7e9a..0000000000000
--- a/patches.renesas/0103-sh-pfc-sh7372-Add-INTC-pin-groups-and-functions.patch
+++ /dev/null
@@ -1,216 +0,0 @@
-From f6fe72e693076c8e3fd0aec3f48500733bce351f Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 19 Apr 2013 12:31:08 +0200
-Subject: sh-pfc: sh7372: Add INTC pin groups and functions
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 4d0882963ece22f8b7c8b0e0832f083a04b891da)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-sh7372.c | 161 ++++++++++++++++++++++++++++++++++++
- 1 file changed, 161 insertions(+)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7372.c b/drivers/pinctrl/sh-pfc/pfc-sh7372.c
-index 73b9e255..def6e2cf 100644
---- a/drivers/pinctrl/sh-pfc/pfc-sh7372.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-sh7372.c
-@@ -34,6 +34,28 @@
- 	PORT_10(fn, pfx##16, sfx),	PORT_10(fn, pfx##17, sfx), \
- 	PORT_10(fn, pfx##18, sfx),	PORT_1(fn, pfx##190, sfx)
- 
-+#define IRQC_PIN_MUX(irq, pin)						\
-+static const unsigned int intc_irq##irq##_pins[] = {			\
-+	pin,								\
-+};									\
-+static const unsigned int intc_irq##irq##_mux[] = {			\
-+	IRQ##irq##_MARK,						\
-+}
-+
-+#define IRQC_PINS_MUX(irq, pin0, pin1)					\
-+static const unsigned int intc_irq##irq##_0_pins[] = {			\
-+	pin0,								\
-+};									\
-+static const unsigned int intc_irq##irq##_0_mux[] = {			\
-+	IRQ##irq##_##pin0##_MARK,					\
-+};									\
-+static const unsigned int intc_irq##irq##_1_pins[] = {			\
-+	pin1,								\
-+};									\
-+static const unsigned int intc_irq##irq##_1_mux[] = {			\
-+	IRQ##irq##_##pin1##_MARK,					\
-+}
-+
- enum {
- 	PINMUX_RESERVED = 0,
- 
-@@ -1186,6 +1208,39 @@ static const unsigned int hdmi_pins[] = {
- static const unsigned int hdmi_mux[] = {
- 	HDMI_HPD_MARK, HDMI_CEC_MARK,
- };
-+/* - INTC ------------------------------------------------------------------- */
-+IRQC_PINS_MUX(0, 6, 162);
-+IRQC_PIN_MUX(1, 12);
-+IRQC_PINS_MUX(2, 4, 5);
-+IRQC_PINS_MUX(3, 8, 16);
-+IRQC_PINS_MUX(4, 17, 163);
-+IRQC_PIN_MUX(5, 18);
-+IRQC_PINS_MUX(6, 39, 164);
-+IRQC_PINS_MUX(7, 40, 167);
-+IRQC_PINS_MUX(8, 41, 168);
-+IRQC_PINS_MUX(9, 42, 169);
-+IRQC_PIN_MUX(10, 65);
-+IRQC_PIN_MUX(11, 67);
-+IRQC_PINS_MUX(12, 80, 137);
-+IRQC_PINS_MUX(13, 81, 145);
-+IRQC_PINS_MUX(14, 82, 146);
-+IRQC_PINS_MUX(15, 83, 147);
-+IRQC_PINS_MUX(16, 84, 170);
-+IRQC_PIN_MUX(17, 85);
-+IRQC_PIN_MUX(18, 86);
-+IRQC_PIN_MUX(19, 87);
-+IRQC_PIN_MUX(20, 92);
-+IRQC_PIN_MUX(21, 93);
-+IRQC_PIN_MUX(22, 94);
-+IRQC_PIN_MUX(23, 95);
-+IRQC_PIN_MUX(24, 112);
-+IRQC_PIN_MUX(25, 119);
-+IRQC_PINS_MUX(26, 121, 172);
-+IRQC_PINS_MUX(27, 122, 180);
-+IRQC_PINS_MUX(28, 123, 181);
-+IRQC_PINS_MUX(29, 129, 182);
-+IRQC_PINS_MUX(30, 130, 183);
-+IRQC_PINS_MUX(31, 138, 184);
- /* - MMCIF ------------------------------------------------------------------ */
- static const unsigned int mmc0_data1_0_pins[] = {
- 	/* D[0] */
-@@ -1361,6 +1416,57 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(fsia_spdif_1),
- 	SH_PFC_PIN_GROUP(fsib_mclk_in),
- 	SH_PFC_PIN_GROUP(hdmi),
-+	SH_PFC_PIN_GROUP(intc_irq0_0),
-+	SH_PFC_PIN_GROUP(intc_irq0_1),
-+	SH_PFC_PIN_GROUP(intc_irq1),
-+	SH_PFC_PIN_GROUP(intc_irq2_0),
-+	SH_PFC_PIN_GROUP(intc_irq2_1),
-+	SH_PFC_PIN_GROUP(intc_irq3_0),
-+	SH_PFC_PIN_GROUP(intc_irq3_1),
-+	SH_PFC_PIN_GROUP(intc_irq4_0),
-+	SH_PFC_PIN_GROUP(intc_irq4_1),
-+	SH_PFC_PIN_GROUP(intc_irq5),
-+	SH_PFC_PIN_GROUP(intc_irq6_0),
-+	SH_PFC_PIN_GROUP(intc_irq6_1),
-+	SH_PFC_PIN_GROUP(intc_irq7_0),
-+	SH_PFC_PIN_GROUP(intc_irq7_1),
-+	SH_PFC_PIN_GROUP(intc_irq8_0),
-+	SH_PFC_PIN_GROUP(intc_irq8_1),
-+	SH_PFC_PIN_GROUP(intc_irq9_0),
-+	SH_PFC_PIN_GROUP(intc_irq9_1),
-+	SH_PFC_PIN_GROUP(intc_irq10),
-+	SH_PFC_PIN_GROUP(intc_irq11),
-+	SH_PFC_PIN_GROUP(intc_irq12_0),
-+	SH_PFC_PIN_GROUP(intc_irq12_1),
-+	SH_PFC_PIN_GROUP(intc_irq13_0),
-+	SH_PFC_PIN_GROUP(intc_irq13_1),
-+	SH_PFC_PIN_GROUP(intc_irq14_0),
-+	SH_PFC_PIN_GROUP(intc_irq14_1),
-+	SH_PFC_PIN_GROUP(intc_irq15_0),
-+	SH_PFC_PIN_GROUP(intc_irq15_1),
-+	SH_PFC_PIN_GROUP(intc_irq16_0),
-+	SH_PFC_PIN_GROUP(intc_irq16_1),
-+	SH_PFC_PIN_GROUP(intc_irq17),
-+	SH_PFC_PIN_GROUP(intc_irq18),
-+	SH_PFC_PIN_GROUP(intc_irq19),
-+	SH_PFC_PIN_GROUP(intc_irq20),
-+	SH_PFC_PIN_GROUP(intc_irq21),
-+	SH_PFC_PIN_GROUP(intc_irq22),
-+	SH_PFC_PIN_GROUP(intc_irq23),
-+	SH_PFC_PIN_GROUP(intc_irq24),
-+	SH_PFC_PIN_GROUP(intc_irq25),
-+	SH_PFC_PIN_GROUP(intc_irq26_0),
-+	SH_PFC_PIN_GROUP(intc_irq26_1),
-+	SH_PFC_PIN_GROUP(intc_irq27_0),
-+	SH_PFC_PIN_GROUP(intc_irq27_1),
-+	SH_PFC_PIN_GROUP(intc_irq28_0),
-+	SH_PFC_PIN_GROUP(intc_irq28_1),
-+	SH_PFC_PIN_GROUP(intc_irq29_0),
-+	SH_PFC_PIN_GROUP(intc_irq29_1),
-+	SH_PFC_PIN_GROUP(intc_irq30_0),
-+	SH_PFC_PIN_GROUP(intc_irq30_1),
-+	SH_PFC_PIN_GROUP(intc_irq31_0),
-+	SH_PFC_PIN_GROUP(intc_irq31_1),
- 	SH_PFC_PIN_GROUP(mmc0_data1_0),
- 	SH_PFC_PIN_GROUP(mmc0_data4_0),
- 	SH_PFC_PIN_GROUP(mmc0_data8_0),
-@@ -1433,6 +1539,60 @@ static const char * const hdmi_groups[] = {
- 	"hdmi",
- };
- 
-+static const char * const intc_groups[] = {
-+	"intc_irq0_0",
-+	"intc_irq0_1",
-+	"intc_irq1",
-+	"intc_irq2_0",
-+	"intc_irq2_1",
-+	"intc_irq3_0",
-+	"intc_irq3_1",
-+	"intc_irq4_0",
-+	"intc_irq4_1",
-+	"intc_irq5",
-+	"intc_irq6_0",
-+	"intc_irq6_1",
-+	"intc_irq7_0",
-+	"intc_irq7_1",
-+	"intc_irq8_0",
-+	"intc_irq8_1",
-+	"intc_irq9_0",
-+	"intc_irq9_1",
-+	"intc_irq10",
-+	"intc_irq11",
-+	"intc_irq12_0",
-+	"intc_irq12_1",
-+	"intc_irq13_0",
-+	"intc_irq13_1",
-+	"intc_irq14_0",
-+	"intc_irq14_1",
-+	"intc_irq15_0",
-+	"intc_irq15_1",
-+	"intc_irq16_0",
-+	"intc_irq16_1",
-+	"intc_irq17",
-+	"intc_irq18",
-+	"intc_irq19",
-+	"intc_irq20",
-+	"intc_irq21",
-+	"intc_irq22",
-+	"intc_irq23",
-+	"intc_irq24",
-+	"intc_irq25",
-+	"intc_irq26_0",
-+	"intc_irq26_1",
-+	"intc_irq27_0",
-+	"intc_irq27_1",
-+	"intc_irq28_0",
-+	"intc_irq28_1",
-+	"intc_irq29_0",
-+	"intc_irq29_1",
-+	"intc_irq30_0",
-+	"intc_irq30_1",
-+	"intc_irq31_0",
-+	"intc_irq31_1",
-+};
-+
- static const char * const mmc0_groups[] = {
- 	"mmc0_data1_0",
- 	"mmc0_data4_0",
-@@ -1471,6 +1631,7 @@ static const struct sh_pfc_function pinmux_functions[] = {
- 	SH_PFC_FUNCTION(fsia),
- 	SH_PFC_FUNCTION(fsib),
- 	SH_PFC_FUNCTION(hdmi),
-+	SH_PFC_FUNCTION(intc),
- 	SH_PFC_FUNCTION(mmc0),
- 	SH_PFC_FUNCTION(sdhi0),
- 	SH_PFC_FUNCTION(sdhi1),
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0104-ARM-shmobile-r8a7779-add-HSPI-clock-support-for-DT.patch b/patches.renesas/0104-ARM-shmobile-r8a7779-add-HSPI-clock-support-for-DT.patch
deleted file mode 100644
index 5e49df48f34aa..0000000000000
--- a/patches.renesas/0104-ARM-shmobile-r8a7779-add-HSPI-clock-support-for-DT.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From ad4e0925323ee3b207136baf5b1353ce7d539323 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Tue, 26 Nov 2013 16:47:10 +0900
-Subject: ARM: shmobile: r8a7779: add HSPI clock support for DT
-
-Based on work for the r8a7778 SoC by Kuninori Morimoto.
-
-Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit fee05eb3d2ce4813b5e9a70ab888d2bc0047f4e1)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r8a7779.c | 3 +++
- 1 file changed, 3 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a7779.c b/arch/arm/mach-shmobile/clock-r8a7779.c
-index 5c83259183d0..b545c8dbb818 100644
---- a/arch/arm/mach-shmobile/clock-r8a7779.c
-+++ b/arch/arm/mach-shmobile/clock-r8a7779.c
-@@ -198,8 +198,11 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP022]), /* SCIF4 */
- 	CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP021]), /* SCIF6 */
- 	CLKDEV_DEV_ID("sh-hspi.0", &mstp_clks[MSTP007]), /* HSPI0 */
-+	CLKDEV_DEV_ID("fffc7000.spi", &mstp_clks[MSTP007]), /* HSPI0 */
- 	CLKDEV_DEV_ID("sh-hspi.1", &mstp_clks[MSTP007]), /* HSPI1 */
-+	CLKDEV_DEV_ID("fffc8000.spi", &mstp_clks[MSTP007]), /* HSPI1 */
- 	CLKDEV_DEV_ID("sh-hspi.2", &mstp_clks[MSTP007]), /* HSPI2 */
-+	CLKDEV_DEV_ID("fffc6000.spi", &mstp_clks[MSTP007]), /* HSPI2 */
- 	CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP323]), /* SDHI0 */
- 	CLKDEV_DEV_ID("ffe4c000.sdhi", &mstp_clks[MSTP323]), /* SDHI0 */
- 	CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP322]), /* SDHI1 */
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0104-ASoC-rcar-fixup-generation-checker.patch b/patches.renesas/0104-ASoC-rcar-fixup-generation-checker.patch
deleted file mode 100644
index 31d258ebd2f96..0000000000000
--- a/patches.renesas/0104-ASoC-rcar-fixup-generation-checker.patch
+++ /dev/null
@@ -1,48 +0,0 @@
-From 0b9023fbf5f7ccf438450b40fc4e241ede107630 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Fri, 11 Oct 2013 00:07:01 -0700
-Subject: ASoC: rcar: fixup generation checker
-
-Current rcar is using rsnd_is_gen1/gen2() to checking its
-IP generation, but it needs data mask.
-This patch fixes it up.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@linaro.org>
-(cherry picked from commit c5d5a58d7ff977289c4bba8eae447c9afa66516b)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- include/sound/rcar_snd.h | 1 +
- sound/soc/sh/rcar/rsnd.h | 4 ++--
- 2 files changed, 3 insertions(+), 2 deletions(-)
-
-diff --git a/include/sound/rcar_snd.h b/include/sound/rcar_snd.h
-index fe66533e9b7a..fb0a312bcb81 100644
---- a/include/sound/rcar_snd.h
-+++ b/include/sound/rcar_snd.h
-@@ -68,6 +68,7 @@ struct rsnd_scu_platform_info {
-  *
-  * A : generation
-  */
-+#define RSND_GEN_MASK	(0xF << 0)
- #define RSND_GEN1	(1 << 0) /* fixme */
- #define RSND_GEN2	(2 << 0) /* fixme */
- 
-diff --git a/sound/soc/sh/rcar/rsnd.h b/sound/soc/sh/rcar/rsnd.h
-index 3868aaf41cc4..3b71c3f2bfaa 100644
---- a/sound/soc/sh/rcar/rsnd.h
-+++ b/sound/soc/sh/rcar/rsnd.h
-@@ -216,8 +216,8 @@ int rsnd_gen_path_exit(struct rsnd_priv *priv,
- void __iomem *rsnd_gen_reg_get(struct rsnd_priv *priv,
- 			       struct rsnd_mod *mod,
- 			       enum rsnd_reg reg);
--#define rsnd_is_gen1(s)		((s)->info->flags & RSND_GEN1)
--#define rsnd_is_gen2(s)		((s)->info->flags & RSND_GEN2)
-+#define rsnd_is_gen1(s)		(((s)->info->flags & RSND_GEN_MASK) == RSND_GEN1)
-+#define rsnd_is_gen2(s)		(((s)->info->flags & RSND_GEN_MASK) == RSND_GEN2)
- 
- /*
-  *	R-Car ADG
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0104-sh-pfc-sh7372-Add-KEYSC-pin-groups-and-functions.patch b/patches.renesas/0104-sh-pfc-sh7372-Add-KEYSC-pin-groups-and-functions.patch
deleted file mode 100644
index e702a0bc3a6e6..0000000000000
--- a/patches.renesas/0104-sh-pfc-sh7372-Add-KEYSC-pin-groups-and-functions.patch
+++ /dev/null
@@ -1,139 +0,0 @@
-From f10351c8052552e56b64d5b4614c164ef7297316 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 19 Apr 2013 12:31:08 +0200
-Subject: sh-pfc: sh7372: Add KEYSC pin groups and functions
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 41eb7d605eb53959dd1d38bd5d1d490faee7c499)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-sh7372.c | 91 +++++++++++++++++++++++++++++++++++++
- 1 file changed, 91 insertions(+)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7372.c b/drivers/pinctrl/sh-pfc/pfc-sh7372.c
-index def6e2cf..50cbff6e 100644
---- a/drivers/pinctrl/sh-pfc/pfc-sh7372.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-sh7372.c
-@@ -1241,6 +1241,75 @@ IRQC_PINS_MUX(28, 123, 181);
- IRQC_PINS_MUX(29, 129, 182);
- IRQC_PINS_MUX(30, 130, 183);
- IRQC_PINS_MUX(31, 138, 184);
-+/* - KEYSC ------------------------------------------------------------------ */
-+static const unsigned int keysc_in04_0_pins[] = {
-+	/* KEYIN[0:4] */
-+	136, 135, 134, 133, 132,
-+};
-+static const unsigned int keysc_in04_0_mux[] = {
-+	KEYIN0_136_MARK, KEYIN1_135_MARK, KEYIN2_134_MARK, KEYIN3_133_MARK,
-+	KEYIN4_MARK,
-+};
-+static const unsigned int keysc_in04_1_pins[] = {
-+	/* KEYIN[0:4] */
-+	121, 122, 123, 124, 132,
-+};
-+static const unsigned int keysc_in04_1_mux[] = {
-+	KEYIN0_121_MARK, KEYIN1_122_MARK, KEYIN2_123_MARK, KEYIN3_124_MARK,
-+	KEYIN4_MARK,
-+};
-+static const unsigned int keysc_in5_pins[] = {
-+	/* KEYIN5 */
-+	131,
-+};
-+static const unsigned int keysc_in5_mux[] = {
-+	KEYIN5_MARK,
-+};
-+static const unsigned int keysc_in6_pins[] = {
-+	/* KEYIN6 */
-+	130,
-+};
-+static const unsigned int keysc_in6_mux[] = {
-+	KEYIN6_MARK,
-+};
-+static const unsigned int keysc_in7_pins[] = {
-+	/* KEYIN7 */
-+	129,
-+};
-+static const unsigned int keysc_in7_mux[] = {
-+	KEYIN7_MARK,
-+};
-+static const unsigned int keysc_out4_pins[] = {
-+	/* KEYOUT[0:3] */
-+	128, 127, 126, 125,
-+};
-+static const unsigned int keysc_out4_mux[] = {
-+	KEYOUT0_MARK, KEYOUT1_MARK, KEYOUT2_MARK, KEYOUT3_MARK,
-+};
-+static const unsigned int keysc_out5_pins[] = {
-+	/* KEYOUT[0:4] */
-+	128, 127, 126, 125, 124,
-+};
-+static const unsigned int keysc_out5_mux[] = {
-+	KEYOUT0_MARK, KEYOUT1_MARK, KEYOUT2_MARK, KEYOUT3_MARK,
-+	KEYOUT4_MARK,
-+};
-+static const unsigned int keysc_out6_pins[] = {
-+	/* KEYOUT[0:5] */
-+	128, 127, 126, 125, 124, 123,
-+};
-+static const unsigned int keysc_out6_mux[] = {
-+	KEYOUT0_MARK, KEYOUT1_MARK, KEYOUT2_MARK, KEYOUT3_MARK,
-+	KEYOUT4_MARK, KEYOUT5_MARK,
-+};
-+static const unsigned int keysc_out8_pins[] = {
-+	/* KEYOUT[0:7] */
-+	128, 127, 126, 125, 124, 123, 122, 121,
-+};
-+static const unsigned int keysc_out8_mux[] = {
-+	KEYOUT0_MARK, KEYOUT1_MARK, KEYOUT2_MARK, KEYOUT3_MARK,
-+	KEYOUT4_MARK, KEYOUT5_MARK, KEYOUT6_MARK, KEYOUT7_MARK,
-+};
- /* - MMCIF ------------------------------------------------------------------ */
- static const unsigned int mmc0_data1_0_pins[] = {
- 	/* D[0] */
-@@ -1467,6 +1536,15 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(intc_irq30_1),
- 	SH_PFC_PIN_GROUP(intc_irq31_0),
- 	SH_PFC_PIN_GROUP(intc_irq31_1),
-+	SH_PFC_PIN_GROUP(keysc_in04_0),
-+	SH_PFC_PIN_GROUP(keysc_in04_1),
-+	SH_PFC_PIN_GROUP(keysc_in5),
-+	SH_PFC_PIN_GROUP(keysc_in6),
-+	SH_PFC_PIN_GROUP(keysc_in7),
-+	SH_PFC_PIN_GROUP(keysc_out4),
-+	SH_PFC_PIN_GROUP(keysc_out5),
-+	SH_PFC_PIN_GROUP(keysc_out6),
-+	SH_PFC_PIN_GROUP(keysc_out8),
- 	SH_PFC_PIN_GROUP(mmc0_data1_0),
- 	SH_PFC_PIN_GROUP(mmc0_data4_0),
- 	SH_PFC_PIN_GROUP(mmc0_data8_0),
-@@ -1593,6 +1671,18 @@ static const char * const intc_groups[] = {
- 	"intc_irq31_1",
- };
- 
-+static const char * const keysc_groups[] = {
-+	"keysc_in04_0",
-+	"keysc_in04_1",
-+	"keysc_in5",
-+	"keysc_in6",
-+	"keysc_in7",
-+	"keysc_out4",
-+	"keysc_out5",
-+	"keysc_out6",
-+	"keysc_out8",
-+};
-+
- static const char * const mmc0_groups[] = {
- 	"mmc0_data1_0",
- 	"mmc0_data4_0",
-@@ -1632,6 +1722,7 @@ static const struct sh_pfc_function pinmux_functions[] = {
- 	SH_PFC_FUNCTION(fsib),
- 	SH_PFC_FUNCTION(hdmi),
- 	SH_PFC_FUNCTION(intc),
-+	SH_PFC_FUNCTION(keysc),
- 	SH_PFC_FUNCTION(mmc0),
- 	SH_PFC_FUNCTION(sdhi0),
- 	SH_PFC_FUNCTION(sdhi1),
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0105-ARM-shmobile-r8a7778-add-I2C-support-on-DTSI.patch b/patches.renesas/0105-ARM-shmobile-r8a7778-add-I2C-support-on-DTSI.patch
deleted file mode 100644
index 8a92ea1712de6..0000000000000
--- a/patches.renesas/0105-ARM-shmobile-r8a7778-add-I2C-support-on-DTSI.patch
+++ /dev/null
@@ -1,66 +0,0 @@
-From f676c340fbf3a5a163e8d211f3fd678918fbd1cd Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Thu, 3 Oct 2013 23:44:15 -0700
-Subject: ARM: shmobile: r8a7778: add I2C support on DTSI
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 3acb51b9215bd99da403ecf8200f8425176b1926)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7778.dtsi | 40 ++++++++++++++++++++++++++++++++++++++++
- 1 file changed, 40 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi
-index a6308a399e2d..7a2c433fb63d 100644
---- a/arch/arm/boot/dts/r8a7778.dtsi
-+++ b/arch/arm/boot/dts/r8a7778.dtsi
-@@ -116,4 +116,44 @@
- 		compatible = "renesas,pfc-r8a7778";
- 		reg = <0xfffc000 0x118>;
- 	};
-+
-+	i2c0: i2c@ffc70000 {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		compatible = "renesas,i2c-r8a7778";
-+		reg = <0xffc70000 0x1000>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 67 0x4>;
-+		status = "disabled";
-+	};
-+
-+	i2c1: i2c@ffc71000 {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		compatible = "renesas,i2c-r8a7778";
-+		reg = <0xffc71000 0x1000>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 78 0x4>;
-+		status = "disabled";
-+	};
-+
-+	i2c2: i2c@ffc72000 {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		compatible = "renesas,i2c-r8a7778";
-+		reg = <0xffc72000 0x1000>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 76 0x4>;
-+		status = "disabled";
-+	};
-+
-+	i2c3: i2c@ffc73000 {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		compatible = "renesas,i2c-r8a7778";
-+		reg = <0xffc73000 0x1000>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 77 0x4>;
-+		status = "disabled";
-+	};
- };
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0105-ASoC-rcar-fixup-rsnd_platform_call-return-value.patch b/patches.renesas/0105-ASoC-rcar-fixup-rsnd_platform_call-return-value.patch
deleted file mode 100644
index 0af4fe515952c..0000000000000
--- a/patches.renesas/0105-ASoC-rcar-fixup-rsnd_platform_call-return-value.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From 34c47dd32ba76be576447dae6bde4b73dbbcbb03 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Fri, 11 Oct 2013 00:06:34 -0700
-Subject: ASoC: rcar: fixup rsnd_platform_call() return value
-
-Un-implemented platform callback is not error.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@linaro.org>
-(cherry picked from commit 740ad6c328823f066efb8b907576a54ef92aca69)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/sh/rcar/core.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/sound/soc/sh/rcar/core.c b/sound/soc/sh/rcar/core.c
-index a35706028514..0fb8bbfb872d 100644
---- a/sound/soc/sh/rcar/core.c
-+++ b/sound/soc/sh/rcar/core.c
-@@ -103,7 +103,7 @@
-  *	rsnd_platform functions
-  */
- #define rsnd_platform_call(priv, dai, func, param...)	\
--	(!(priv->info->func) ? -ENODEV :		\
-+	(!(priv->info->func) ? 0 :		\
- 	 priv->info->func(param))
- 
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0105-sh-pfc-sh7372-Add-LCDC-pin-groups-and-functions.patch b/patches.renesas/0105-sh-pfc-sh7372-Add-LCDC-pin-groups-and-functions.patch
deleted file mode 100644
index 3fbbb1ad87cfa..0000000000000
--- a/patches.renesas/0105-sh-pfc-sh7372-Add-LCDC-pin-groups-and-functions.patch
+++ /dev/null
@@ -1,169 +0,0 @@
-From a58def8e86229e2604dacd80af8a3241c07bbb36 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 19 Apr 2013 12:31:08 +0200
-Subject: sh-pfc: sh7372: Add LCDC pin groups and functions
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit f3e03eb82543162f3f39c030defb9b2b5392f274)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-sh7372.c | 121 ++++++++++++++++++++++++++++++++++++
- 1 file changed, 121 insertions(+)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7372.c b/drivers/pinctrl/sh-pfc/pfc-sh7372.c
-index 50cbff6e..8503747a 100644
---- a/drivers/pinctrl/sh-pfc/pfc-sh7372.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-sh7372.c
-@@ -1310,6 +1310,103 @@ static const unsigned int keysc_out8_mux[] = {
- 	KEYOUT0_MARK, KEYOUT1_MARK, KEYOUT2_MARK, KEYOUT3_MARK,
- 	KEYOUT4_MARK, KEYOUT5_MARK, KEYOUT6_MARK, KEYOUT7_MARK,
- };
-+/* - LCD -------------------------------------------------------------------- */
-+static const unsigned int lcd_data8_pins[] = {
-+	/* D[0:7] */
-+	121, 122, 123, 124, 125, 126, 127, 128,
-+};
-+static const unsigned int lcd_data8_mux[] = {
-+	/* LCDC */
-+	LCDD0_MARK, LCDD1_MARK, LCDD2_MARK, LCDD3_MARK,
-+	LCDD4_MARK, LCDD5_MARK, LCDD6_MARK, LCDD7_MARK,
-+};
-+static const unsigned int lcd_data9_pins[] = {
-+	/* D[0:8] */
-+	121, 122, 123, 124, 125, 126, 127, 128,
-+	129,
-+	137, 138, 139, 140, 141, 142, 143, 144,
-+};
-+static const unsigned int lcd_data9_mux[] = {
-+	LCDD0_MARK, LCDD1_MARK, LCDD2_MARK, LCDD3_MARK,
-+	LCDD4_MARK, LCDD5_MARK, LCDD6_MARK, LCDD7_MARK,
-+	LCDD8_MARK,
-+};
-+static const unsigned int lcd_data12_pins[] = {
-+	/* D[0:11] */
-+	121, 122, 123, 124, 125, 126, 127, 128,
-+	129, 130, 131, 132,
-+};
-+static const unsigned int lcd_data12_mux[] = {
-+	LCDD0_MARK, LCDD1_MARK, LCDD2_MARK, LCDD3_MARK,
-+	LCDD4_MARK, LCDD5_MARK, LCDD6_MARK, LCDD7_MARK,
-+	LCDD8_MARK, LCDD9_MARK,	LCDD10_MARK, LCDD11_MARK,
-+};
-+static const unsigned int lcd_data16_pins[] = {
-+	/* D[0:15] */
-+	121, 122, 123, 124, 125, 126, 127, 128,
-+	129, 130, 131, 132, 133, 134, 135, 136,
-+};
-+static const unsigned int lcd_data16_mux[] = {
-+	LCDD0_MARK, LCDD1_MARK, LCDD2_MARK, LCDD3_MARK,
-+	LCDD4_MARK, LCDD5_MARK, LCDD6_MARK, LCDD7_MARK,
-+	LCDD8_MARK, LCDD9_MARK,	LCDD10_MARK, LCDD11_MARK,
-+	LCDD12_MARK, LCDD13_MARK, LCDD14_MARK, LCDD15_MARK,
-+};
-+static const unsigned int lcd_data18_pins[] = {
-+	/* D[0:17] */
-+	121, 122, 123, 124, 125, 126, 127, 128,
-+	129, 130, 131, 132, 133, 134, 135, 136,
-+	137, 138,
-+};
-+static const unsigned int lcd_data18_mux[] = {
-+	LCDD0_MARK, LCDD1_MARK, LCDD2_MARK, LCDD3_MARK,
-+	LCDD4_MARK, LCDD5_MARK, LCDD6_MARK, LCDD7_MARK,
-+	LCDD8_MARK, LCDD9_MARK,	LCDD10_MARK, LCDD11_MARK,
-+	LCDD12_MARK, LCDD13_MARK, LCDD14_MARK, LCDD15_MARK,
-+	LCDD16_MARK, LCDD17_MARK,
-+};
-+static const unsigned int lcd_data24_pins[] = {
-+	/* D[0:23] */
-+	121, 122, 123, 124, 125, 126, 127, 128,
-+	129, 130, 131, 132, 133, 134, 135, 136,
-+	137, 138, 139, 140, 141, 142, 143, 144,
-+};
-+static const unsigned int lcd_data24_mux[] = {
-+	LCDD0_MARK, LCDD1_MARK, LCDD2_MARK, LCDD3_MARK,
-+	LCDD4_MARK, LCDD5_MARK, LCDD6_MARK, LCDD7_MARK,
-+	LCDD8_MARK, LCDD9_MARK,	LCDD10_MARK, LCDD11_MARK,
-+	LCDD12_MARK, LCDD13_MARK, LCDD14_MARK, LCDD15_MARK,
-+	LCDD16_MARK, LCDD17_MARK, LCDD18_MARK, LCDD19_MARK,
-+	LCDD20_MARK, LCDD21_MARK, LCDD22_MARK, LCDD23_MARK,
-+};
-+static const unsigned int lcd_display_pins[] = {
-+	/* DON */
-+	151,
-+};
-+static const unsigned int lcd_display_mux[] = {
-+	LCDDON_MARK,
-+};
-+static const unsigned int lcd_lclk_pins[] = {
-+	/* LCLK */
-+	150,
-+};
-+static const unsigned int lcd_lclk_mux[] = {
-+	LCDLCLK_MARK,
-+};
-+static const unsigned int lcd_sync_pins[] = {
-+	/* VSYN, HSYN, DCK, DISP */
-+	146, 145, 147, 149,
-+};
-+static const unsigned int lcd_sync_mux[] = {
-+	LCDVSYN_MARK, LCDHSYN_MARK, LCDDCK_MARK, LCDDISP_MARK,
-+};
-+static const unsigned int lcd_sys_pins[] = {
-+	/* CS, WR, RD, RS */
-+	145, 147, 148, 149,
-+};
-+static const unsigned int lcd_sys_mux[] = {
-+	LCDCS_MARK, LCDWR_MARK, LCDRD_MARK, LCDRS_MARK,
-+};
- /* - MMCIF ------------------------------------------------------------------ */
- static const unsigned int mmc0_data1_0_pins[] = {
- 	/* D[0] */
-@@ -1545,6 +1642,16 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(keysc_out5),
- 	SH_PFC_PIN_GROUP(keysc_out6),
- 	SH_PFC_PIN_GROUP(keysc_out8),
-+	SH_PFC_PIN_GROUP(lcd_data8),
-+	SH_PFC_PIN_GROUP(lcd_data9),
-+	SH_PFC_PIN_GROUP(lcd_data12),
-+	SH_PFC_PIN_GROUP(lcd_data16),
-+	SH_PFC_PIN_GROUP(lcd_data18),
-+	SH_PFC_PIN_GROUP(lcd_data24),
-+	SH_PFC_PIN_GROUP(lcd_display),
-+	SH_PFC_PIN_GROUP(lcd_lclk),
-+	SH_PFC_PIN_GROUP(lcd_sync),
-+	SH_PFC_PIN_GROUP(lcd_sys),
- 	SH_PFC_PIN_GROUP(mmc0_data1_0),
- 	SH_PFC_PIN_GROUP(mmc0_data4_0),
- 	SH_PFC_PIN_GROUP(mmc0_data8_0),
-@@ -1683,6 +1790,19 @@ static const char * const keysc_groups[] = {
- 	"keysc_out8",
- };
- 
-+static const char * const lcd_groups[] = {
-+	"lcd_data8",
-+	"lcd_data9",
-+	"lcd_data12",
-+	"lcd_data16",
-+	"lcd_data18",
-+	"lcd_data24",
-+	"lcd_display",
-+	"lcd_lclk",
-+	"lcd_sync",
-+	"lcd_sys",
-+};
-+
- static const char * const mmc0_groups[] = {
- 	"mmc0_data1_0",
- 	"mmc0_data4_0",
-@@ -1723,6 +1843,7 @@ static const struct sh_pfc_function pinmux_functions[] = {
- 	SH_PFC_FUNCTION(hdmi),
- 	SH_PFC_FUNCTION(intc),
- 	SH_PFC_FUNCTION(keysc),
-+	SH_PFC_FUNCTION(lcd),
- 	SH_PFC_FUNCTION(mmc0),
- 	SH_PFC_FUNCTION(sdhi0),
- 	SH_PFC_FUNCTION(sdhi1),
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0106-ARM-shmobile-r8a7779-tidyup-I2C-driver-name-on-DTSI.patch b/patches.renesas/0106-ARM-shmobile-r8a7779-tidyup-I2C-driver-name-on-DTSI.patch
deleted file mode 100644
index 53c998d662983..0000000000000
--- a/patches.renesas/0106-ARM-shmobile-r8a7779-tidyup-I2C-driver-name-on-DTSI.patch
+++ /dev/null
@@ -1,62 +0,0 @@
-From d6b549c10180da2479c1f0dbdf9f417ae8872f5e Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Thu, 3 Oct 2013 23:44:44 -0700
-Subject: ARM: shmobile: r8a7779: tidyup I2C driver name on DTSI
-
-10e8d4f6dddb0f9dc408c2f2bde8399b243a42ca
-(ARM: mach-shmobile: r8a7779: Minimal setup using DT)
-added I2C driver, but it was SH-Mobile I2C.
-R-Car H1 needs R-Car I2C driver.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 6363070ef7744ad8b6af2ef37afc913c41e82547)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7779.dtsi | 8 ++++----
- 1 file changed, 4 insertions(+), 4 deletions(-)
-
-diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi
-index 19faeac3fd2e..da61d2708376 100644
---- a/arch/arm/boot/dts/r8a7779.dtsi
-+++ b/arch/arm/boot/dts/r8a7779.dtsi
-@@ -153,7 +153,7 @@
- 	i2c0: i2c@ffc70000 {
- 		#address-cells = <1>;
- 		#size-cells = <0>;
--		compatible = "renesas,rmobile-iic";
-+		compatible = "renesas,i2c-r8a7779";
- 		reg = <0xffc70000 0x1000>;
- 		interrupt-parent = <&gic>;
- 		interrupts = <0 79 0x4>;
-@@ -163,7 +163,7 @@
- 	i2c1: i2c@ffc71000 {
- 		#address-cells = <1>;
- 		#size-cells = <0>;
--		compatible = "renesas,rmobile-iic";
-+		compatible = "renesas,i2c-r8a7779";
- 		reg = <0xffc71000 0x1000>;
- 		interrupt-parent = <&gic>;
- 		interrupts = <0 82 0x4>;
-@@ -173,7 +173,7 @@
- 	i2c2: i2c@ffc72000 {
- 		#address-cells = <1>;
- 		#size-cells = <0>;
--		compatible = "renesas,rmobile-iic";
-+		compatible = "renesas,i2c-r8a7779";
- 		reg = <0xffc72000 0x1000>;
- 		interrupt-parent = <&gic>;
- 		interrupts = <0 80 0x4>;
-@@ -183,7 +183,7 @@
- 	i2c3: i2c@ffc73000 {
- 		#address-cells = <1>;
- 		#size-cells = <0>;
--		compatible = "renesas,rmobile-iic";
-+		compatible = "renesas,i2c-r8a7779";
- 		reg = <0xffc73000 0x1000>;
- 		interrupt-parent = <&gic>;
- 		interrupts = <0 81 0x4>;
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0106-ASoC-rcar-add-ID-check-on-rsnd_dai_get.patch b/patches.renesas/0106-ASoC-rcar-add-ID-check-on-rsnd_dai_get.patch
deleted file mode 100644
index a35d59050f938..0000000000000
--- a/patches.renesas/0106-ASoC-rcar-add-ID-check-on-rsnd_dai_get.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From b90ee952faf28e54939425b3de632851bce12b89 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Fri, 11 Oct 2013 00:07:48 -0700
-Subject: ASoC: rcar: add ID check on rsnd_dai_get()
-
-checking id in rsnd_dai_get() is good idea
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@linaro.org>
-(cherry picked from commit 2192f81c53a7879c803f0f7d6c49645fdf6c2f6a)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/sh/rcar/core.c | 3 +++
- 1 file changed, 3 insertions(+)
-
-diff --git a/sound/soc/sh/rcar/core.c b/sound/soc/sh/rcar/core.c
-index 0fb8bbfb872d..7c3fa72112ab 100644
---- a/sound/soc/sh/rcar/core.c
-+++ b/sound/soc/sh/rcar/core.c
-@@ -363,6 +363,9 @@ int rsnd_dai_id(struct rsnd_priv *priv, struct rsnd_dai *rdai)
- 
- struct rsnd_dai *rsnd_dai_get(struct rsnd_priv *priv, int id)
- {
-+	if ((id < 0) || (id >= rsnd_dai_nr(priv)))
-+		return NULL;
-+
- 	return priv->rdai + id;
- }
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0106-sh-pfc-sh7372-Add-SCIF-pin-groups-and-functions.patch b/patches.renesas/0106-sh-pfc-sh7372-Add-SCIF-pin-groups-and-functions.patch
deleted file mode 100644
index 5d65bbff25734..0000000000000
--- a/patches.renesas/0106-sh-pfc-sh7372-Add-SCIF-pin-groups-and-functions.patch
+++ /dev/null
@@ -1,245 +0,0 @@
-From 555884b3ba88f93a26b2df56c403062e50a62310 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 19 Apr 2013 12:31:08 +0200
-Subject: sh-pfc: sh7372: Add SCIF pin groups and functions
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit ddc3296179bc6abbeebc90e101001726a528bc3d)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-sh7372.c | 197 ++++++++++++++++++++++++++++++++++++
- 1 file changed, 197 insertions(+)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7372.c b/drivers/pinctrl/sh-pfc/pfc-sh7372.c
-index 8503747a..46466bb1 100644
---- a/drivers/pinctrl/sh-pfc/pfc-sh7372.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-sh7372.c
-@@ -1467,6 +1467,139 @@ static const unsigned int mmc0_ctrl_1_pins[] = {
- static const unsigned int mmc0_ctrl_1_mux[] = {
- 	MMCCMD1_MARK, MMCCLK1_MARK,
- };
-+/* - SCIFA0 ----------------------------------------------------------------- */
-+static const unsigned int scifa0_data_pins[] = {
-+	/* RXD, TXD */
-+	153, 152,
-+};
-+static const unsigned int scifa0_data_mux[] = {
-+	SCIFA0_RXD_MARK, SCIFA0_TXD_MARK,
-+};
-+static const unsigned int scifa0_clk_pins[] = {
-+	/* SCK */
-+	156,
-+};
-+static const unsigned int scifa0_clk_mux[] = {
-+	SCIFA0_SCK_MARK,
-+};
-+static const unsigned int scifa0_ctrl_pins[] = {
-+	/* RTS, CTS */
-+	157, 158,
-+};
-+static const unsigned int scifa0_ctrl_mux[] = {
-+	SCIFA0_RTS_MARK, SCIFA0_CTS_MARK,
-+};
-+/* - SCIFA1 ----------------------------------------------------------------- */
-+static const unsigned int scifa1_data_pins[] = {
-+	/* RXD, TXD */
-+	155, 154,
-+};
-+static const unsigned int scifa1_data_mux[] = {
-+	SCIFA1_RXD_MARK, SCIFA1_TXD_MARK,
-+};
-+static const unsigned int scifa1_clk_pins[] = {
-+	/* SCK */
-+	159,
-+};
-+static const unsigned int scifa1_clk_mux[] = {
-+	SCIFA1_SCK_MARK,
-+};
-+static const unsigned int scifa1_ctrl_pins[] = {
-+	/* RTS, CTS */
-+	160, 161,
-+};
-+static const unsigned int scifa1_ctrl_mux[] = {
-+	SCIFA1_RTS_MARK, SCIFA1_CTS_MARK,
-+};
-+/* - SCIFA2 ----------------------------------------------------------------- */
-+static const unsigned int scifa2_data_pins[] = {
-+	/* RXD, TXD */
-+	97, 96,
-+};
-+static const unsigned int scifa2_data_mux[] = {
-+	SCIFA2_RXD1_MARK, SCIFA2_TXD1_MARK,
-+};
-+static const unsigned int scifa2_clk_pins[] = {
-+	/* SCK */
-+	98,
-+};
-+static const unsigned int scifa2_clk_mux[] = {
-+	SCIFA2_SCK1_MARK,
-+};
-+static const unsigned int scifa2_ctrl_pins[] = {
-+	/* RTS, CTS */
-+	95, 94,
-+};
-+static const unsigned int scifa2_ctrl_mux[] = {
-+	SCIFA2_RTS1_MARK, SCIFA2_CTS1_MARK,
-+};
-+/* - SCIFA3 ----------------------------------------------------------------- */
-+static const unsigned int scifa3_data_pins[] = {
-+	/* RXD, TXD */
-+	144, 143,
-+};
-+static const unsigned int scifa3_data_mux[] = {
-+	SCIFA3_RXD_MARK, SCIFA3_TXD_MARK,
-+};
-+static const unsigned int scifa3_clk_pins[] = {
-+	/* SCK */
-+	142,
-+};
-+static const unsigned int scifa3_clk_mux[] = {
-+	SCIFA3_SCK_MARK,
-+};
-+static const unsigned int scifa3_ctrl_0_pins[] = {
-+	/* RTS, CTS */
-+	44, 43,
-+};
-+static const unsigned int scifa3_ctrl_0_mux[] = {
-+	SCIFA3_RTS_44_MARK, SCIFA3_CTS_43_MARK,
-+};
-+static const unsigned int scifa3_ctrl_1_pins[] = {
-+	/* RTS, CTS */
-+	141, 140,
-+};
-+static const unsigned int scifa3_ctrl_1_mux[] = {
-+	SCIFA3_RTS_141_MARK, SCIFA3_CTS_140_MARK,
-+};
-+/* - SCIFA4 ----------------------------------------------------------------- */
-+static const unsigned int scifa4_data_pins[] = {
-+	/* RXD, TXD */
-+	5, 6,
-+};
-+static const unsigned int scifa4_data_mux[] = {
-+	SCIFA4_RXD_MARK, SCIFA4_TXD_MARK,
-+};
-+/* - SCIFA5 ----------------------------------------------------------------- */
-+static const unsigned int scifa5_data_pins[] = {
-+	/* RXD, TXD */
-+	8, 12,
-+};
-+static const unsigned int scifa5_data_mux[] = {
-+	SCIFA5_RXD_MARK, SCIFA5_TXD_MARK,
-+};
-+/* - SCIFB ------------------------------------------------------------------ */
-+static const unsigned int scifb_data_pins[] = {
-+	/* RXD, TXD */
-+	166, 165,
-+};
-+static const unsigned int scifb_data_mux[] = {
-+	SCIFB_RXD_MARK, SCIFB_TXD_MARK,
-+};
-+static const unsigned int scifb_clk_pins[] = {
-+	/* SCK */
-+	162,
-+};
-+static const unsigned int scifb_clk_mux[] = {
-+	SCIFB_SCK_MARK,
-+};
-+static const unsigned int scifb_ctrl_pins[] = {
-+	/* RTS, CTS */
-+	163, 164,
-+};
-+static const unsigned int scifb_ctrl_mux[] = {
-+	SCIFB_RTS_MARK, SCIFB_CTS_MARK,
-+};
- /* - SDHI0 ------------------------------------------------------------------ */
- static const unsigned int sdhi0_data1_pins[] = {
- 	/* D0 */
-@@ -1660,6 +1793,24 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(mmc0_data4_1),
- 	SH_PFC_PIN_GROUP(mmc0_data8_1),
- 	SH_PFC_PIN_GROUP(mmc0_ctrl_1),
-+	SH_PFC_PIN_GROUP(scifa0_data),
-+	SH_PFC_PIN_GROUP(scifa0_clk),
-+	SH_PFC_PIN_GROUP(scifa0_ctrl),
-+	SH_PFC_PIN_GROUP(scifa1_data),
-+	SH_PFC_PIN_GROUP(scifa1_clk),
-+	SH_PFC_PIN_GROUP(scifa1_ctrl),
-+	SH_PFC_PIN_GROUP(scifa2_data),
-+	SH_PFC_PIN_GROUP(scifa2_clk),
-+	SH_PFC_PIN_GROUP(scifa2_ctrl),
-+	SH_PFC_PIN_GROUP(scifa3_data),
-+	SH_PFC_PIN_GROUP(scifa3_clk),
-+	SH_PFC_PIN_GROUP(scifa3_ctrl_0),
-+	SH_PFC_PIN_GROUP(scifa3_ctrl_1),
-+	SH_PFC_PIN_GROUP(scifa4_data),
-+	SH_PFC_PIN_GROUP(scifa5_data),
-+	SH_PFC_PIN_GROUP(scifb_data),
-+	SH_PFC_PIN_GROUP(scifb_clk),
-+	SH_PFC_PIN_GROUP(scifb_ctrl),
- 	SH_PFC_PIN_GROUP(sdhi0_data1),
- 	SH_PFC_PIN_GROUP(sdhi0_data4),
- 	SH_PFC_PIN_GROUP(sdhi0_ctrl),
-@@ -1814,6 +1965,45 @@ static const char * const mmc0_groups[] = {
- 	"mmc0_ctrl_1",
- };
- 
-+static const char * const scifa0_groups[] = {
-+	"scifa0_data",
-+	"scifa0_clk",
-+	"scifa0_ctrl",
-+};
-+
-+static const char * const scifa1_groups[] = {
-+	"scifa1_data",
-+	"scifa1_clk",
-+	"scifa1_ctrl",
-+};
-+
-+static const char * const scifa2_groups[] = {
-+	"scifa2_data",
-+	"scifa2_clk",
-+	"scifa2_ctrl",
-+};
-+
-+static const char * const scifa3_groups[] = {
-+	"scifa3_data",
-+	"scifa3_clk",
-+	"scifa3_ctrl_0",
-+	"scifa3_ctrl_1",
-+};
-+
-+static const char * const scifa4_groups[] = {
-+	"scifa4_data",
-+};
-+
-+static const char * const scifa5_groups[] = {
-+	"scifa5_data",
-+};
-+
-+static const char * const scifb_groups[] = {
-+	"scifb_data",
-+	"scifb_clk",
-+	"scifb_ctrl",
-+};
-+
- static const char * const sdhi0_groups[] = {
- 	"sdhi0_data1",
- 	"sdhi0_data4",
-@@ -1845,6 +2035,13 @@ static const struct sh_pfc_function pinmux_functions[] = {
- 	SH_PFC_FUNCTION(keysc),
- 	SH_PFC_FUNCTION(lcd),
- 	SH_PFC_FUNCTION(mmc0),
-+	SH_PFC_FUNCTION(scifa0),
-+	SH_PFC_FUNCTION(scifa1),
-+	SH_PFC_FUNCTION(scifa2),
-+	SH_PFC_FUNCTION(scifa3),
-+	SH_PFC_FUNCTION(scifa4),
-+	SH_PFC_FUNCTION(scifa5),
-+	SH_PFC_FUNCTION(scifb),
- 	SH_PFC_FUNCTION(sdhi0),
- 	SH_PFC_FUNCTION(sdhi1),
- 	SH_PFC_FUNCTION(sdhi2),
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0107-ARM-shmobile-lager-add-default-PFC-settings-on-DTS.patch b/patches.renesas/0107-ARM-shmobile-lager-add-default-PFC-settings-on-DTS.patch
deleted file mode 100644
index dd6378e27e1a8..0000000000000
--- a/patches.renesas/0107-ARM-shmobile-lager-add-default-PFC-settings-on-DTS.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From 3e2b983f156d84ea92a4b8efa58478a0086ec18e Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Sun, 6 Oct 2013 21:26:40 -0700
-Subject: ARM: shmobile: lager: add default PFC settings on DTS
-
-SCIF0/SCIF1 PFC setting is needed as default
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 4a46beadec749d690acecc92811259cd7e85c6c4)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7790-lager-reference.dts | 15 +++++++++++++++
- 1 file changed, 15 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a7790-lager-reference.dts b/arch/arm/boot/dts/r8a7790-lager-reference.dts
-index c462ef138922..0a3f0c60d302 100644
---- a/arch/arm/boot/dts/r8a7790-lager-reference.dts
-+++ b/arch/arm/boot/dts/r8a7790-lager-reference.dts
-@@ -43,3 +43,18 @@
- 		};
- 	};
- };
-+
-+&pfc {
-+	pinctrl-0 = <&scif0_pins &scif1_pins>;
-+	pinctrl-names = "default";
-+
-+	scif0_pins: scif0 {
-+		renesas,groups = "scif0_data";
-+		renesas,function = "scif0";
-+	};
-+
-+	scif1_pins: scif1 {
-+		renesas,groups = "scif1_data";
-+		renesas,function = "scif1";
-+	};
-+};
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0107-ASoC-rcar-add-rsnd_scu_hpbif_is_enable.patch b/patches.renesas/0107-ASoC-rcar-add-rsnd_scu_hpbif_is_enable.patch
deleted file mode 100644
index 0766643c4649a..0000000000000
--- a/patches.renesas/0107-ASoC-rcar-add-rsnd_scu_hpbif_is_enable.patch
+++ /dev/null
@@ -1,116 +0,0 @@
-From 44e54eb94100e8a6cf799acb26a369dac3a08833 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Thu, 17 Oct 2013 22:50:59 -0700
-Subject: ASoC: rcar: add rsnd_scu_hpbif_is_enable()
-
-Current SSI needs RSND_SSI_DEPENDENT flag to
-decide dependent/independent mode.
-And SCU needs RSND_SCU_USE_HPBIF flag
-to decide HPBIF is enable/disable.
-But these 2 means same things.
-
-This patch adds new rsnd_scu_hpbif_is_enable()
-function, and merges above methods.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@linaro.org>
-(cherry picked from commit cdcfcac968a1ec648434892b6addd80e66a5a892)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- include/sound/rcar_snd.h |  1 -
- sound/soc/sh/rcar/rsnd.h |  1 +
- sound/soc/sh/rcar/scu.c  | 12 +++++++++---
- sound/soc/sh/rcar/ssi.c  |  8 +++++---
- 4 files changed, 15 insertions(+), 7 deletions(-)
-
-diff --git a/include/sound/rcar_snd.h b/include/sound/rcar_snd.h
-index fb0a312bcb81..12afab18945d 100644
---- a/include/sound/rcar_snd.h
-+++ b/include/sound/rcar_snd.h
-@@ -36,7 +36,6 @@
- #define RSND_SSI_CLK_PIN_SHARE		(1 << 31)
- #define RSND_SSI_CLK_FROM_ADG		(1 << 30) /* clock parent is master */
- #define RSND_SSI_SYNC			(1 << 29) /* SSI34_sync etc */
--#define RSND_SSI_DEPENDENT		(1 << 28) /* SSI needs SRU/SCU */
- 
- #define RSND_SSI_PLAY			(1 << 24)
- 
-diff --git a/sound/soc/sh/rcar/rsnd.h b/sound/soc/sh/rcar/rsnd.h
-index 3b71c3f2bfaa..9e463e50e7e6 100644
---- a/sound/soc/sh/rcar/rsnd.h
-+++ b/sound/soc/sh/rcar/rsnd.h
-@@ -281,6 +281,7 @@ int rsnd_scu_probe(struct platform_device *pdev,
- void rsnd_scu_remove(struct platform_device *pdev,
- 		     struct rsnd_priv *priv);
- struct rsnd_mod *rsnd_scu_mod_get(struct rsnd_priv *priv, int id);
-+bool rsnd_scu_hpbif_is_enable(struct rsnd_mod *mod);
- #define rsnd_scu_nr(priv) ((priv)->scu_nr)
- 
- /*
-diff --git a/sound/soc/sh/rcar/scu.c b/sound/soc/sh/rcar/scu.c
-index 2df2e9150b89..1ab1bce6be7f 100644
---- a/sound/soc/sh/rcar/scu.c
-+++ b/sound/soc/sh/rcar/scu.c
-@@ -146,20 +146,26 @@ static int rsnd_scu_set_hpbif(struct rsnd_priv *priv,
- 	return 0;
- }
- 
-+bool rsnd_scu_hpbif_is_enable(struct rsnd_mod *mod)
-+{
-+	struct rsnd_scu *scu = rsnd_mod_to_scu(mod);
-+	u32 flags = rsnd_scu_mode_flags(scu);
-+
-+	return !!(flags & RSND_SCU_USE_HPBIF);
-+}
-+
- static int rsnd_scu_start(struct rsnd_mod *mod,
- 			  struct rsnd_dai *rdai,
- 			  struct rsnd_dai_stream *io)
- {
- 	struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
--	struct rsnd_scu *scu = rsnd_mod_to_scu(mod);
- 	struct device *dev = rsnd_priv_to_dev(priv);
--	u32 flags = rsnd_scu_mode_flags(scu);
- 	int ret;
- 
- 	/*
- 	 * SCU will be used if it has RSND_SCU_USE_HPBIF flags
- 	 */
--	if (!(flags & RSND_SCU_USE_HPBIF)) {
-+	if (!rsnd_scu_hpbif_is_enable(mod)) {
- 		/* it use PIO transter */
- 		dev_dbg(dev, "%s%d is not used\n",
- 			rsnd_mod_name(mod), rsnd_mod_id(mod));
-diff --git a/sound/soc/sh/rcar/ssi.c b/sound/soc/sh/rcar/ssi.c
-index fae26d3f79d2..7613256c9840 100644
---- a/sound/soc/sh/rcar/ssi.c
-+++ b/sound/soc/sh/rcar/ssi.c
-@@ -106,6 +106,7 @@ static void rsnd_ssi_mode_init(struct rsnd_priv *priv,
- {
- 	struct device *dev = rsnd_priv_to_dev(priv);
- 	struct rsnd_ssi *ssi;
-+	struct rsnd_mod *scu;
- 	u32 flags;
- 	u32 val;
- 	int i;
-@@ -116,13 +117,14 @@ static void rsnd_ssi_mode_init(struct rsnd_priv *priv,
- 	ssiu->ssi_mode0 = 0;
- 	for_each_rsnd_ssi(ssi, priv, i) {
- 		flags = rsnd_ssi_mode_flags(ssi);
-+		scu   = rsnd_scu_mod_get(priv, rsnd_mod_id(&ssi->mod));
- 
- 		/* see also BUSIF_MODE */
--		if (!(flags & RSND_SSI_DEPENDENT)) {
-+		if (rsnd_scu_hpbif_is_enable(scu)) {
-+			dev_dbg(dev, "SSI%d uses DEPENDENT mode\n", i);
-+		} else {
- 			ssiu->ssi_mode0 |= (1 << i);
- 			dev_dbg(dev, "SSI%d uses INDEPENDENT mode\n", i);
--		} else {
--			dev_dbg(dev, "SSI%d uses DEPENDENT mode\n", i);
- 		}
- 	}
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0107-sh-pfc-sh7372-Add-USB-pin-groups-and-functions.patch b/patches.renesas/0107-sh-pfc-sh7372-Add-USB-pin-groups-and-functions.patch
deleted file mode 100644
index f4491444ce7c3..0000000000000
--- a/patches.renesas/0107-sh-pfc-sh7372-Add-USB-pin-groups-and-functions.patch
+++ /dev/null
@@ -1,130 +0,0 @@
-From 0878177b59c3f3427fde6c7c548dfb8611a947fa Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 19 Apr 2013 12:31:08 +0200
-Subject: sh-pfc: sh7372: Add USB pin groups and functions
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit e04662d69b12cc70c4703361bad11a93e7a08046)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-sh7372.c | 82 +++++++++++++++++++++++++++++++++++++
- 1 file changed, 82 insertions(+)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7372.c b/drivers/pinctrl/sh-pfc/pfc-sh7372.c
-index 46466bb1..4dc2ccb7 100644
---- a/drivers/pinctrl/sh-pfc/pfc-sh7372.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-sh7372.c
-@@ -1680,6 +1680,64 @@ static const unsigned int sdhi2_ctrl_pins[] = {
- static const unsigned int sdhi2_ctrl_mux[] = {
- 	SDHICMD2_MARK, SDHICLK2_MARK,
- };
-+/* - USB0 ------------------------------------------------------------------- */
-+static const unsigned int usb0_vbus_pins[] = {
-+	/* VBUS */
-+	167,
-+};
-+static const unsigned int usb0_vbus_mux[] = {
-+	VBUS0_0_MARK,
-+};
-+static const unsigned int usb0_otg_id_pins[] = {
-+	/* IDIN */
-+	113,
-+};
-+static const unsigned int usb0_otg_id_mux[] = {
-+	IDIN_0_MARK,
-+};
-+static const unsigned int usb0_otg_ctrl_pins[] = {
-+	/* PWEN, EXTLP, OVCN, OVCN2 */
-+	116, 114, 117, 115,
-+};
-+static const unsigned int usb0_otg_ctrl_mux[] = {
-+	PWEN_0_MARK, EXTLP_0_MARK, OVCN_0_MARK, OVCN2_0_MARK,
-+};
-+/* - USB1 ------------------------------------------------------------------- */
-+static const unsigned int usb1_vbus_pins[] = {
-+	/* VBUS */
-+	168,
-+};
-+static const unsigned int usb1_vbus_mux[] = {
-+	VBUS0_1_MARK,
-+};
-+static const unsigned int usb1_otg_id_0_pins[] = {
-+	/* IDIN */
-+	113,
-+};
-+static const unsigned int usb1_otg_id_0_mux[] = {
-+	IDIN_1_113_MARK,
-+};
-+static const unsigned int usb1_otg_id_1_pins[] = {
-+	/* IDIN */
-+	18,
-+};
-+static const unsigned int usb1_otg_id_1_mux[] = {
-+	IDIN_1_18_MARK,
-+};
-+static const unsigned int usb1_otg_ctrl_0_pins[] = {
-+	/* PWEN, EXTLP, OVCN, OVCN2 */
-+	115, 116, 114, 117, 113,
-+};
-+static const unsigned int usb1_otg_ctrl_0_mux[] = {
-+	PWEN_1_115_MARK, EXTLP_1_MARK, OVCN_1_114_MARK, OVCN2_1_MARK,
-+};
-+static const unsigned int usb1_otg_ctrl_1_pins[] = {
-+	/* PWEN, EXTLP, OVCN, OVCN2 */
-+	138, 116, 162, 117, 18,
-+};
-+static const unsigned int usb1_otg_ctrl_1_mux[] = {
-+	PWEN_1_138_MARK, EXTLP_1_MARK, OVCN_1_162_MARK, OVCN2_1_MARK,
-+};
- 
- static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(bsc_data8),
-@@ -1822,6 +1880,14 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(sdhi2_data1),
- 	SH_PFC_PIN_GROUP(sdhi2_data4),
- 	SH_PFC_PIN_GROUP(sdhi2_ctrl),
-+	SH_PFC_PIN_GROUP(usb0_vbus),
-+	SH_PFC_PIN_GROUP(usb0_otg_id),
-+	SH_PFC_PIN_GROUP(usb0_otg_ctrl),
-+	SH_PFC_PIN_GROUP(usb1_vbus),
-+	SH_PFC_PIN_GROUP(usb1_otg_id_0),
-+	SH_PFC_PIN_GROUP(usb1_otg_id_1),
-+	SH_PFC_PIN_GROUP(usb1_otg_ctrl_0),
-+	SH_PFC_PIN_GROUP(usb1_otg_ctrl_1),
- };
- 
- static const char * const bsc_groups[] = {
-@@ -2024,6 +2090,20 @@ static const char * const sdhi2_groups[] = {
- 	"sdhi2_ctrl",
- };
- 
-+static const char * const usb0_groups[] = {
-+	"usb0_vbus",
-+	"usb0_otg_id",
-+	"usb0_otg_ctrl",
-+};
-+
-+static const char * const usb1_groups[] = {
-+	"usb1_vbus",
-+	"usb1_otg_id_0",
-+	"usb1_otg_id_1",
-+	"usb1_otg_ctrl_0",
-+	"usb1_otg_ctrl_1",
-+};
-+
- static const struct sh_pfc_function pinmux_functions[] = {
- 	SH_PFC_FUNCTION(bsc),
- 	SH_PFC_FUNCTION(ceu),
-@@ -2045,6 +2125,8 @@ static const struct sh_pfc_function pinmux_functions[] = {
- 	SH_PFC_FUNCTION(sdhi0),
- 	SH_PFC_FUNCTION(sdhi1),
- 	SH_PFC_FUNCTION(sdhi2),
-+	SH_PFC_FUNCTION(usb0),
-+	SH_PFC_FUNCTION(usb1),
- };
- 
- #define PINMUX_FN_BASE	ARRAY_SIZE(pinmux_pins)
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0108-ARM-shmobile-lager-add-MMCIF-support-on-DTS.patch b/patches.renesas/0108-ARM-shmobile-lager-add-MMCIF-support-on-DTS.patch
deleted file mode 100644
index 7ec3cdf807825..0000000000000
--- a/patches.renesas/0108-ARM-shmobile-lager-add-MMCIF-support-on-DTS.patch
+++ /dev/null
@@ -1,57 +0,0 @@
-From 6e8563f8338f33d5da90405a6093db8c5a96a1f1 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Sun, 6 Oct 2013 21:26:58 -0700
-Subject: ARM: shmobile: lager: add MMCIF support on DTS
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 02b4a748c7ef37c2852478e67251a86e36d87152)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7790-lager-reference.dts | 24 ++++++++++++++++++++++++
- 1 file changed, 24 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a7790-lager-reference.dts b/arch/arm/boot/dts/r8a7790-lager-reference.dts
-index 0a3f0c60d302..75730f5d1477 100644
---- a/arch/arm/boot/dts/r8a7790-lager-reference.dts
-+++ b/arch/arm/boot/dts/r8a7790-lager-reference.dts
-@@ -42,6 +42,15 @@
- 			gpios = <&gpio5 17 GPIO_ACTIVE_HIGH>;
- 		};
- 	};
-+
-+	fixedregulator3v3: fixedregulator@0 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "fixed-3.3V";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+		regulator-boot-on;
-+		regulator-always-on;
-+	};
- };
- 
- &pfc {
-@@ -57,4 +66,19 @@
- 		renesas,groups = "scif1_data";
- 		renesas,function = "scif1";
- 	};
-+
-+	mmc1_pins: mmc1 {
-+		renesas,groups = "mmc1_data8", "mmc1_ctrl";
-+		renesas,function = "mmc1";
-+	};
-+};
-+
-+&mmcif1 {
-+	pinctrl-0 = <&mmc1_pins>;
-+	pinctrl-names = "default";
-+
-+	vmmc-supply = <&fixedregulator3v3>;
-+	bus-width = <8>;
-+	non-removable;
-+	status = "okay";
- };
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0108-ARM-shmobile-mackerel-Register-pinctrl-mapping-for-t.patch b/patches.renesas/0108-ARM-shmobile-mackerel-Register-pinctrl-mapping-for-t.patch
deleted file mode 100644
index 7a05c16472167..0000000000000
--- a/patches.renesas/0108-ARM-shmobile-mackerel-Register-pinctrl-mapping-for-t.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-From a813cd8b5610b2835106efa2eadcf23c48e5956b Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 19 Apr 2013 13:29:48 +0200
-Subject: ARM: shmobile: mackerel: Register pinctrl mapping for the ADXL34X
-
-Replace the GPIO-based ADXL34X pinmux configuration by a pinctrl
-mapping.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit cd87d903f12c1baea6caf68e02e21ce7004c79a4)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-mackerel.c | 6 ++++--
- 1 file changed, 4 insertions(+), 2 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c
-index fa3407da..d40d9dae 100644
---- a/arch/arm/mach-shmobile/board-mackerel.c
-+++ b/arch/arm/mach-shmobile/board-mackerel.c
-@@ -1309,6 +1309,9 @@ static struct i2c_board_info i2c1_devices[] = {
- };
- 
- static const struct pinctrl_map mackerel_pinctrl_map[] = {
-+	/* ADXL34X */
-+	PIN_MAP_MUX_GROUP_DEFAULT("1-0053", "pfc-sh7372",
-+				  "intc_irq21", "intc"),
- 	/* SDHI0 */
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh7372",
- 				  "sdhi0_data4", "sdhi0"),
-@@ -1460,8 +1463,7 @@ static void __init mackerel_init(void)
- 	gpio_request(GPIO_FN_IRQ7_40,	NULL);
- 	irq_set_irq_type(IRQ7, IRQ_TYPE_LEVEL_LOW);
- 
--	/* enable Accelerometer */
--	gpio_request(GPIO_FN_IRQ21,	NULL);
-+	/* Accelerometer */
- 	irq_set_irq_type(IRQ21, IRQ_TYPE_LEVEL_HIGH);
- 
- 	/* SDHI0 PORT172 card-detect IRQ26 */
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0108-ASoC-rcar-remove-RSND_SSI_CLK_FROM_ADG.patch b/patches.renesas/0108-ASoC-rcar-remove-RSND_SSI_CLK_FROM_ADG.patch
deleted file mode 100644
index 77acfe2f3ed1d..0000000000000
--- a/patches.renesas/0108-ASoC-rcar-remove-RSND_SSI_CLK_FROM_ADG.patch
+++ /dev/null
@@ -1,142 +0,0 @@
-From d23c54fd3600d943e691b4096680edda52888b06 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Thu, 17 Oct 2013 22:51:40 -0700
-Subject: ASoC: rcar: remove RSND_SSI_CLK_FROM_ADG
-
-R-Car sound has clock pin for each SSI, and sometimes,
-these pins are shared with paired SSI.
-It may sometimes become "SSI-A clock pin is master" and
-"SSI-B clock pin is slave", but "SSI-A/B clock pins are shared".
-SSI-B needs SSI-A clock in this case.
-
-Current R-Car sound driver is using RSND_SSI_xxx flag
-to control this kind of shared pin behavior.
-
-But, this information, especially clock master setting,
-can be got from ASoC set_fmt settings.
-This patch removes rsnd_ssi_mode_init() and extend rsnd_ssi_mode_set()
-to controlling pin settings via .set_fmt.
-
-This patch doesn't removes RSND_SSI_CLK_FROM_ADG flag at this point
-to avoid conflict branch merging between ASoC <-> SH-ARM.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@linaro.org>
-(cherry picked from commit 92eba04e4bcd469518cc759ac1bf1a49acaa5cc1)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/sh/rcar/ssi.c | 52 +++++++++++++++++++------------------------------
- 1 file changed, 20 insertions(+), 32 deletions(-)
-
-diff --git a/sound/soc/sh/rcar/ssi.c b/sound/soc/sh/rcar/ssi.c
-index 7613256c9840..b71cf9d7dd3f 100644
---- a/sound/soc/sh/rcar/ssi.c
-+++ b/sound/soc/sh/rcar/ssi.c
-@@ -101,31 +101,30 @@ struct rsnd_ssiu {
- #define rsnd_ssi_to_ssiu(ssi)\
- 	(((struct rsnd_ssiu *)((ssi) - rsnd_mod_id(&(ssi)->mod))) - 1)
- 
--static void rsnd_ssi_mode_init(struct rsnd_priv *priv,
--			       struct rsnd_ssiu *ssiu)
-+static void rsnd_ssi_mode_set(struct rsnd_priv *priv,
-+			      struct rsnd_dai *rdai,
-+			      struct rsnd_ssi *ssi)
- {
- 	struct device *dev = rsnd_priv_to_dev(priv);
--	struct rsnd_ssi *ssi;
- 	struct rsnd_mod *scu;
-+	struct rsnd_ssiu *ssiu = rsnd_ssi_to_ssiu(ssi);
-+	int id = rsnd_mod_id(&ssi->mod);
- 	u32 flags;
- 	u32 val;
--	int i;
-+
-+	scu   = rsnd_scu_mod_get(priv, rsnd_mod_id(&ssi->mod));
- 
- 	/*
- 	 * SSI_MODE0
- 	 */
--	ssiu->ssi_mode0 = 0;
--	for_each_rsnd_ssi(ssi, priv, i) {
--		flags = rsnd_ssi_mode_flags(ssi);
--		scu   = rsnd_scu_mod_get(priv, rsnd_mod_id(&ssi->mod));
--
--		/* see also BUSIF_MODE */
--		if (rsnd_scu_hpbif_is_enable(scu)) {
--			dev_dbg(dev, "SSI%d uses DEPENDENT mode\n", i);
--		} else {
--			ssiu->ssi_mode0 |= (1 << i);
--			dev_dbg(dev, "SSI%d uses INDEPENDENT mode\n", i);
--		}
-+
-+	/* see also BUSIF_MODE */
-+	if (rsnd_scu_hpbif_is_enable(scu)) {
-+		ssiu->ssi_mode0 &= ~(1 << id);
-+		dev_dbg(dev, "SSI%d uses DEPENDENT mode\n", id);
-+	} else {
-+		ssiu->ssi_mode0 |= (1 << id);
-+		dev_dbg(dev, "SSI%d uses INDEPENDENT mode\n", id);
- 	}
- 
- 	/*
-@@ -134,7 +133,7 @@ static void rsnd_ssi_mode_init(struct rsnd_priv *priv,
- #define ssi_parent_set(p, sync, adg, ext)		\
- 	do {						\
- 		ssi->parent = ssiu->ssi + p;		\
--		if (flags & RSND_SSI_CLK_FROM_ADG)	\
-+		if (rsnd_rdai_is_clk_master(rdai))	\
- 			val = adg;			\
- 		else					\
- 			val = ext;			\
-@@ -142,15 +141,11 @@ static void rsnd_ssi_mode_init(struct rsnd_priv *priv,
- 			val |= sync;			\
- 	} while (0)
- 
--	ssiu->ssi_mode1 = 0;
--	for_each_rsnd_ssi(ssi, priv, i) {
--		flags = rsnd_ssi_mode_flags(ssi);
--
--		if (!(flags & RSND_SSI_CLK_PIN_SHARE))
--			continue;
-+	flags = rsnd_ssi_mode_flags(ssi);
-+	if (flags & RSND_SSI_CLK_PIN_SHARE) {
- 
- 		val = 0;
--		switch (i) {
-+		switch (id) {
- 		case 1:
- 			ssi_parent_set(0, (1 << 4), (0x2 << 0), (0x1 << 0));
- 			break;
-@@ -167,11 +162,6 @@ static void rsnd_ssi_mode_init(struct rsnd_priv *priv,
- 
- 		ssiu->ssi_mode1 |= val;
- 	}
--}
--
--static void rsnd_ssi_mode_set(struct rsnd_ssi *ssi)
--{
--	struct rsnd_ssiu *ssiu = rsnd_ssi_to_ssiu(ssi);
- 
- 	rsnd_mod_write(&ssi->mod, SSI_MODE0, ssiu->ssi_mode0);
- 	rsnd_mod_write(&ssi->mod, SSI_MODE1, ssiu->ssi_mode1);
-@@ -381,7 +371,7 @@ static int rsnd_ssi_init(struct rsnd_mod *mod,
- 	ssi->cr_own	= cr;
- 	ssi->err	= -1; /* ignore 1st error */
- 
--	rsnd_ssi_mode_set(ssi);
-+	rsnd_ssi_mode_set(priv, rdai, ssi);
- 
- 	dev_dbg(dev, "%s.%d init\n", rsnd_mod_name(mod), rsnd_mod_id(mod));
- 
-@@ -708,8 +698,6 @@ int rsnd_ssi_probe(struct platform_device *pdev,
- 		rsnd_mod_init(priv, &ssi->mod, ops, i);
- 	}
- 
--	rsnd_ssi_mode_init(priv, ssiu);
--
- 	dev_dbg(dev, "ssi probed\n");
- 
- 	return 0;
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0109-ARM-shmobile-mackerel-Register-pinctrl-mapping-for-C.patch b/patches.renesas/0109-ARM-shmobile-mackerel-Register-pinctrl-mapping-for-C.patch
deleted file mode 100644
index e8727c5cdbf70..0000000000000
--- a/patches.renesas/0109-ARM-shmobile-mackerel-Register-pinctrl-mapping-for-C.patch
+++ /dev/null
@@ -1,60 +0,0 @@
-From e3833ebf917031534bf9de871ca5564cc632b0b3 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 19 Apr 2013 13:29:48 +0200
-Subject: ARM: shmobile: mackerel: Register pinctrl mapping for CEU
-
-Replace the GPIO-based CEU pinmux configuration by a pinctrl mapping.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 0acbc34c816c95687dda0db61bc4215d8ca67725)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-mackerel.c | 24 +++++++++---------------
- 1 file changed, 9 insertions(+), 15 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c
-index d40d9dae..fdd7e3fd 100644
---- a/arch/arm/mach-shmobile/board-mackerel.c
-+++ b/arch/arm/mach-shmobile/board-mackerel.c
-@@ -1312,6 +1312,15 @@ static const struct pinctrl_map mackerel_pinctrl_map[] = {
- 	/* ADXL34X */
- 	PIN_MAP_MUX_GROUP_DEFAULT("1-0053", "pfc-sh7372",
- 				  "intc_irq21", "intc"),
-+	/* CEU */
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_ceu.0", "pfc-sh7372",
-+				  "ceu_data_0_7", "ceu"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_ceu.0", "pfc-sh7372",
-+				  "ceu_clk_0", "ceu"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_ceu.0", "pfc-sh7372",
-+				  "ceu_sync", "ceu"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_ceu.0", "pfc-sh7372",
-+				  "ceu_field", "ceu"),
- 	/* SDHI0 */
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh7372",
- 				  "sdhi0_data4", "sdhi0"),
-@@ -1497,21 +1506,6 @@ static void __init mackerel_init(void)
- 	gpio_request(GPIO_FN_SCIFA2_TXD1, NULL);
- 	gpio_request(GPIO_FN_SCIFA2_RXD1, NULL);
- 
--	/* CEU */
--	gpio_request(GPIO_FN_VIO_CLK, NULL);
--	gpio_request(GPIO_FN_VIO_VD, NULL);
--	gpio_request(GPIO_FN_VIO_HD, NULL);
--	gpio_request(GPIO_FN_VIO_FIELD, NULL);
--	gpio_request(GPIO_FN_VIO_CKO, NULL);
--	gpio_request(GPIO_FN_VIO_D7, NULL);
--	gpio_request(GPIO_FN_VIO_D6, NULL);
--	gpio_request(GPIO_FN_VIO_D5, NULL);
--	gpio_request(GPIO_FN_VIO_D4, NULL);
--	gpio_request(GPIO_FN_VIO_D3, NULL);
--	gpio_request(GPIO_FN_VIO_D2, NULL);
--	gpio_request(GPIO_FN_VIO_D1, NULL);
--	gpio_request(GPIO_FN_VIO_D0, NULL);
--
- 	/* HDMI */
- 	gpio_request(GPIO_FN_HDMI_HPD, NULL);
- 	gpio_request(GPIO_FN_HDMI_CEC, NULL);
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0109-ARM-shmobile-r8a7791-PFC-device-tree-node.patch b/patches.renesas/0109-ARM-shmobile-r8a7791-PFC-device-tree-node.patch
deleted file mode 100644
index 26674dfc18ee3..0000000000000
--- a/patches.renesas/0109-ARM-shmobile-r8a7791-PFC-device-tree-node.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From ae77252e3628913c05406d35a02f81c797a250a7 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Tue, 8 Oct 2013 12:39:01 +0900
-Subject: ARM: shmobile: r8a7791 PFC device tree node
-
-Add a DT node for the r8a7791 PFC device.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 55146927a7d504dc9bef65cad9435ce04329d854)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7791.dtsi | 6 ++++++
- 1 file changed, 6 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
-index fea5cfef4691..765d989dfe72 100644
---- a/arch/arm/boot/dts/r8a7791.dtsi
-+++ b/arch/arm/boot/dts/r8a7791.dtsi
-@@ -71,4 +71,10 @@
- 			      <0 16 4>,
- 			      <0 17 4>;
- 	};
-+
-+	pfc: pfc@e6060000 {
-+		compatible = "renesas,pfc-r8a7791";
-+		reg = <0 0xe6060000 0 0x250>;
-+		#gpio-range-cells = <3>;
-+	};
- };
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0109-ASoC-rcar-remove-original-filter-from-rsnd_dma_init.patch b/patches.renesas/0109-ASoC-rcar-remove-original-filter-from-rsnd_dma_init.patch
deleted file mode 100644
index 0575c9b5b81aa..0000000000000
--- a/patches.renesas/0109-ASoC-rcar-remove-original-filter-from-rsnd_dma_init.patch
+++ /dev/null
@@ -1,96 +0,0 @@
-From c22d31d1220f24ace731346341aac448ede24853 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Tue, 29 Oct 2013 00:52:19 -0700
-Subject: ASoC: rcar: remove original filter from rsnd_dma_init()
-
-Remove original filter from rsnd_dma_init(),
-and use SH-DMA suitable filter.
-This new style can be used from Device Tree.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@linaro.org>
-(cherry picked from commit 9ade09d6c62e48fba6c74ce3958ca1035dfd8427)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/sh/rcar/core.c | 31 ++++++++++++++++++++-----------
- 1 file changed, 20 insertions(+), 11 deletions(-)
-
-diff --git a/sound/soc/sh/rcar/core.c b/sound/soc/sh/rcar/core.c
-index 7c3fa72112ab..839eee3208dc 100644
---- a/sound/soc/sh/rcar/core.c
-+++ b/sound/soc/sh/rcar/core.c
-@@ -94,6 +94,7 @@
-  *
-  */
- #include <linux/pm_runtime.h>
-+#include <linux/shdma-base.h>
- #include "rsnd.h"
- 
- #define RSND_RATES SNDRV_PCM_RATE_8000_96000
-@@ -254,13 +255,6 @@ int rsnd_dma_available(struct rsnd_dma *dma)
- 	return !!dma->chan;
- }
- 
--static bool rsnd_dma_filter(struct dma_chan *chan, void *param)
--{
--	chan->private = param;
--
--	return true;
--}
--
- int rsnd_dma_init(struct rsnd_priv *priv, struct rsnd_dma *dma,
- 		  int is_play, int id,
- 		  int (*inquiry)(struct rsnd_dma *dma,
-@@ -268,7 +262,9 @@ int rsnd_dma_init(struct rsnd_priv *priv, struct rsnd_dma *dma,
- 		  int (*complete)(struct rsnd_dma *dma))
- {
- 	struct device *dev = rsnd_priv_to_dev(priv);
-+	struct dma_slave_config cfg;
- 	dma_cap_mask_t mask;
-+	int ret;
- 
- 	if (dma->chan) {
- 		dev_err(dev, "it already has dma channel\n");
-@@ -278,15 +274,23 @@ int rsnd_dma_init(struct rsnd_priv *priv, struct rsnd_dma *dma,
- 	dma_cap_zero(mask);
- 	dma_cap_set(DMA_SLAVE, mask);
- 
--	dma->slave.shdma_slave.slave_id = id;
--
--	dma->chan = dma_request_channel(mask, rsnd_dma_filter,
--					&dma->slave.shdma_slave);
-+	dma->chan = dma_request_slave_channel_compat(mask, shdma_chan_filter,
-+						     (void *)id, dev,
-+						     is_play ? "tx" : "rx");
- 	if (!dma->chan) {
- 		dev_err(dev, "can't get dma channel\n");
- 		return -EIO;
- 	}
- 
-+	cfg.slave_id	= id;
-+	cfg.dst_addr	= 0; /* use default addr when playback */
-+	cfg.src_addr	= 0; /* use default addr when capture */
-+	cfg.direction	= is_play ? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM;
-+
-+	ret = dmaengine_slave_config(dma->chan, &cfg);
-+	if (ret < 0)
-+		goto rsnd_dma_init_err;
-+
- 	dma->dir = is_play ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
- 	dma->priv = priv;
- 	dma->inquiry = inquiry;
-@@ -294,6 +298,11 @@ int rsnd_dma_init(struct rsnd_priv *priv, struct rsnd_dma *dma,
- 	INIT_WORK(&dma->work, rsnd_dma_do_work);
- 
- 	return 0;
-+
-+rsnd_dma_init_err:
-+	rsnd_dma_quit(priv, dma);
-+
-+	return ret;
- }
- 
- void  rsnd_dma_quit(struct rsnd_priv *priv,
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0110-ARM-shmobile-mackerel-Register-pinctrl-mapping-for-F.patch b/patches.renesas/0110-ARM-shmobile-mackerel-Register-pinctrl-mapping-for-F.patch
deleted file mode 100644
index dca6e463577ec..0000000000000
--- a/patches.renesas/0110-ARM-shmobile-mackerel-Register-pinctrl-mapping-for-F.patch
+++ /dev/null
@@ -1,67 +0,0 @@
-From 30e16c9f56ef326f4bb3a8a49a261cbeeb8d991d Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 19 Apr 2013 13:29:48 +0200
-Subject: ARM: shmobile: mackerel: Register pinctrl mapping for FLCTL
-
-Replace the GPIO-based FLCTL pinmux configuration by a pinctrl mapping.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 7e4f07d73affe680b31ae7178133f98da9eff4fb)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-mackerel.c | 31 +++++++------------------------
- 1 file changed, 7 insertions(+), 24 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c
-index fdd7e3fd..955fefd3 100644
---- a/arch/arm/mach-shmobile/board-mackerel.c
-+++ b/arch/arm/mach-shmobile/board-mackerel.c
-@@ -1321,6 +1321,13 @@ static const struct pinctrl_map mackerel_pinctrl_map[] = {
- 				  "ceu_sync", "ceu"),
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_ceu.0", "pfc-sh7372",
- 				  "ceu_field", "ceu"),
-+	/* FLCTL */
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh_flctl.0", "pfc-sh7372",
-+				  "flctl_data", "flctl"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh_flctl.0", "pfc-sh7372",
-+				  "flctl_ce0", "flctl"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh_flctl.0", "pfc-sh7372",
-+				  "flctl_ctrl", "flctl"),
- 	/* SDHI0 */
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh7372",
- 				  "sdhi0_data4", "sdhi0"),
-@@ -1478,30 +1485,6 @@ static void __init mackerel_init(void)
- 	/* SDHI0 PORT172 card-detect IRQ26 */
- 	gpio_request(GPIO_FN_IRQ26_172, NULL);
- 
--	/* FLCTL */
--	gpio_request(GPIO_FN_D0_NAF0, NULL);
--	gpio_request(GPIO_FN_D1_NAF1, NULL);
--	gpio_request(GPIO_FN_D2_NAF2, NULL);
--	gpio_request(GPIO_FN_D3_NAF3, NULL);
--	gpio_request(GPIO_FN_D4_NAF4, NULL);
--	gpio_request(GPIO_FN_D5_NAF5, NULL);
--	gpio_request(GPIO_FN_D6_NAF6, NULL);
--	gpio_request(GPIO_FN_D7_NAF7, NULL);
--	gpio_request(GPIO_FN_D8_NAF8, NULL);
--	gpio_request(GPIO_FN_D9_NAF9, NULL);
--	gpio_request(GPIO_FN_D10_NAF10, NULL);
--	gpio_request(GPIO_FN_D11_NAF11, NULL);
--	gpio_request(GPIO_FN_D12_NAF12, NULL);
--	gpio_request(GPIO_FN_D13_NAF13, NULL);
--	gpio_request(GPIO_FN_D14_NAF14, NULL);
--	gpio_request(GPIO_FN_D15_NAF15, NULL);
--	gpio_request(GPIO_FN_FCE0, NULL);
--	gpio_request(GPIO_FN_WE0_FWE, NULL);
--	gpio_request(GPIO_FN_FRB, NULL);
--	gpio_request(GPIO_FN_A4_FOE, NULL);
--	gpio_request(GPIO_FN_A5_FCDE, NULL);
--	gpio_request(GPIO_FN_RD_FSC, NULL);
--
- 	/* enable GPS module (GT-720F) */
- 	gpio_request(GPIO_FN_SCIFA2_TXD1, NULL);
- 	gpio_request(GPIO_FN_SCIFA2_RXD1, NULL);
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0110-ARM-shmobile-r8a7791-GPIO-device-tree-node.patch b/patches.renesas/0110-ARM-shmobile-r8a7791-GPIO-device-tree-node.patch
deleted file mode 100644
index aabeaab4b45d1..0000000000000
--- a/patches.renesas/0110-ARM-shmobile-r8a7791-GPIO-device-tree-node.patch
+++ /dev/null
@@ -1,126 +0,0 @@
-From 9d177f6d132f0649aa38fa5c0dc87f484c4d11c4 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Tue, 8 Oct 2013 12:39:30 +0900
-Subject: ARM: shmobile: r8a7791 GPIO device tree node
-
-Add GPIO controllers to the r8a7791 DTSI file.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit ab87e3fc0b3532f8ff1cb08b9f3680bc98be7728)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7791.dtsi | 96 ++++++++++++++++++++++++++++++++++++++++++
- 1 file changed, 96 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
-index 765d989dfe72..344f1f759c1a 100644
---- a/arch/arm/boot/dts/r8a7791.dtsi
-+++ b/arch/arm/boot/dts/r8a7791.dtsi
-@@ -46,6 +46,102 @@
- 		interrupts = <1 9 0xf04>;
- 	};
- 
-+	gpio0: gpio@ffc40000 {
-+		compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
-+		reg = <0 0xffc40000 0 0x50>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 4 0x4>;
-+		#gpio-cells = <2>;
-+		gpio-controller;
-+		gpio-ranges = <&pfc 0 0 32>;
-+		#interrupt-cells = <2>;
-+		interrupt-controller;
-+	};
-+
-+	gpio1: gpio@ffc41000 {
-+		compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
-+		reg = <0 0xffc41000 0 0x50>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 5 0x4>;
-+		#gpio-cells = <2>;
-+		gpio-controller;
-+		gpio-ranges = <&pfc 0 32 32>;
-+		#interrupt-cells = <2>;
-+		interrupt-controller;
-+	};
-+
-+	gpio2: gpio@ffc42000 {
-+		compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
-+		reg = <0 0xffc42000 0 0x50>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 6 0x4>;
-+		#gpio-cells = <2>;
-+		gpio-controller;
-+		gpio-ranges = <&pfc 0 64 32>;
-+		#interrupt-cells = <2>;
-+		interrupt-controller;
-+	};
-+
-+	gpio3: gpio@ffc43000 {
-+		compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
-+		reg = <0 0xffc43000 0 0x50>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 7 0x4>;
-+		#gpio-cells = <2>;
-+		gpio-controller;
-+		gpio-ranges = <&pfc 0 96 32>;
-+		#interrupt-cells = <2>;
-+		interrupt-controller;
-+	};
-+
-+	gpio4: gpio@ffc44000 {
-+		compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
-+		reg = <0 0xffc44000 0 0x50>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 8 0x4>;
-+		#gpio-cells = <2>;
-+		gpio-controller;
-+		gpio-ranges = <&pfc 0 128 32>;
-+		#interrupt-cells = <2>;
-+		interrupt-controller;
-+	};
-+
-+	gpio5: gpio@ffc45000 {
-+		compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
-+		reg = <0 0xffc45000 0 0x50>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 9 0x4>;
-+		#gpio-cells = <2>;
-+		gpio-controller;
-+		gpio-ranges = <&pfc 0 160 32>;
-+		#interrupt-cells = <2>;
-+		interrupt-controller;
-+	};
-+
-+	gpio6: gpio@ffc45400 {
-+		compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
-+		reg = <0 0xffc45400 0 0x50>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 10 0x4>;
-+		#gpio-cells = <2>;
-+		gpio-controller;
-+		gpio-ranges = <&pfc 0 192 32>;
-+		#interrupt-cells = <2>;
-+		interrupt-controller;
-+	};
-+
-+	gpio7: gpio@ffc45800 {
-+		compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
-+		reg = <0 0xffc45800 0 0x50>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 11 0x4>;
-+		#gpio-cells = <2>;
-+		gpio-controller;
-+		gpio-ranges = <&pfc 0 224 26>;
-+		#interrupt-cells = <2>;
-+		interrupt-controller;
-+	};
-+
- 	timer {
- 		compatible = "arm,armv7-timer";
- 		interrupts = <1 13 0xf08>,
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0110-ASoC-rcar-remove-un-needed-select-from-Kconfig.patch b/patches.renesas/0110-ASoC-rcar-remove-un-needed-select-from-Kconfig.patch
deleted file mode 100644
index 6c7e379afa194..0000000000000
--- a/patches.renesas/0110-ASoC-rcar-remove-un-needed-select-from-Kconfig.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From b92d5ecdc20e7107301e99e2d25cc8b00077754f Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Wed, 6 Nov 2013 00:06:45 -0800
-Subject: ASoC: rcar: remove un-needed select from Kconfig
-
-config RCAR_CLK_ADG is not exist
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@linaro.org>
-(cherry picked from commit a2b4f8a473efd82d634117a057e0ba64443354cf)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/sh/Kconfig | 1 -
- 1 file changed, 1 deletion(-)
-
-diff --git a/sound/soc/sh/Kconfig b/sound/soc/sh/Kconfig
-index 56d8ff6a402d..14011d90d70a 100644
---- a/sound/soc/sh/Kconfig
-+++ b/sound/soc/sh/Kconfig
-@@ -37,7 +37,6 @@ config SND_SOC_SH4_SIU
- config SND_SOC_RCAR
- 	tristate "R-Car series SRU/SCU/SSIU/SSI support"
- 	select SND_SIMPLE_CARD
--	select RCAR_CLK_ADG
- 	help
- 	  This option enables R-Car SUR/SCU/SSIU/SSI sound support
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0111-ARM-shmobile-mackerel-Register-pinctrl-mapping-for-F.patch b/patches.renesas/0111-ARM-shmobile-mackerel-Register-pinctrl-mapping-for-F.patch
deleted file mode 100644
index a4c4295128fed..0000000000000
--- a/patches.renesas/0111-ARM-shmobile-mackerel-Register-pinctrl-mapping-for-F.patch
+++ /dev/null
@@ -1,62 +0,0 @@
-From c46f3ef555a88ee588bd75bd40255df32bdbd947 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 19 Apr 2013 13:29:48 +0200
-Subject: ARM: shmobile: mackerel: Register pinctrl mapping for FSI
-
-Replace the GPIO-based FSI pinmux configuration by a pinctrl mapping.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit d39a15793ceded60e4d4f49aab5d6883781a312b)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-mackerel.c | 19 ++++++++++++-------
- 1 file changed, 12 insertions(+), 7 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c
-index 955fefd3..f2e8740f 100644
---- a/arch/arm/mach-shmobile/board-mackerel.c
-+++ b/arch/arm/mach-shmobile/board-mackerel.c
-@@ -1328,6 +1328,16 @@ static const struct pinctrl_map mackerel_pinctrl_map[] = {
- 				  "flctl_ce0", "flctl"),
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh_flctl.0", "pfc-sh7372",
- 				  "flctl_ctrl", "flctl"),
-+	/* FSIA (AK4643) */
-+	PIN_MAP_MUX_GROUP_DEFAULT("asoc-simple-card.0", "pfc-sh7372",
-+				  "fsia_sclk_in", "fsia"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("asoc-simple-card.0", "pfc-sh7372",
-+				  "fsia_data_in", "fsia"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("asoc-simple-card.0", "pfc-sh7372",
-+				  "fsia_data_out", "fsia"),
-+	/* FSIB (HDMI) */
-+	PIN_MAP_MUX_GROUP_DEFAULT("asoc-simple-card.1", "pfc-sh7372",
-+				  "fsib_mclk_in", "fsib"),
- 	/* SDHI0 */
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh7372",
- 				  "sdhi0_data4", "sdhi0"),
-@@ -1446,11 +1456,7 @@ static void __init mackerel_init(void)
- 	gpio_request_pulldown(GPIO_PORT167CR); /* VBUS0_1 pull down */
- 	gpio_request(GPIO_FN_IDIN_1_113, NULL);
- 
--	/* enable FSI2 port A (ak4643) */
--	gpio_request(GPIO_FN_FSIAIBT,	NULL);
--	gpio_request(GPIO_FN_FSIAILR,	NULL);
--	gpio_request(GPIO_FN_FSIAISLD,	NULL);
--	gpio_request(GPIO_FN_FSIAOSLD,	NULL);
-+	/* FSI2 port A (ak4643) */
- 	gpio_request_one(161, GPIOF_OUT_INIT_LOW, NULL); /* slave */
- 
- 	gpio_request(9,  NULL);
-@@ -1460,8 +1466,7 @@ static void __init mackerel_init(void)
- 
- 	intc_set_priority(IRQ_FSI, 3); /* irq priority FSI(3) > SMSC911X(2) */
- 
--	/* setup FSI2 port B (HDMI) */
--	gpio_request(GPIO_FN_FSIBCK, NULL);
-+	/* FSI2 port B (HDMI) */
- 	__raw_writew(__raw_readw(USCCR1) & ~(1 << 6), USCCR1); /* use SPDIF */
- 
- 	/* set SPU2 clock to 119.6 MHz */
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0111-ARM-shmobile-r8a7791-Koelsch-DT-reference-DTS-bits.patch b/patches.renesas/0111-ARM-shmobile-r8a7791-Koelsch-DT-reference-DTS-bits.patch
deleted file mode 100644
index 4e8b1274450cc..0000000000000
--- a/patches.renesas/0111-ARM-shmobile-r8a7791-Koelsch-DT-reference-DTS-bits.patch
+++ /dev/null
@@ -1,71 +0,0 @@
-From 8fab01003401892e28164410e619ac52496bad7c Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Tue, 8 Oct 2013 15:30:09 +0900
-Subject: ARM: shmobile: r8a7791 Koelsch DT reference DTS bits
-
-Add DTS for the DT reference version of the Koelsch board support.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 1919a0a4b4a7e505fdeb99e9df449c9d90b0da0c)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/Makefile                      |  1 +
- arch/arm/boot/dts/r8a7791-koelsch-reference.dts | 32 +++++++++++++++++++++++++
- 2 files changed, 33 insertions(+)
- create mode 100644 arch/arm/boot/dts/r8a7791-koelsch-reference.dts
-
-diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
-index 3ced87adb39d..f77c7660b0a8 100644
---- a/arch/arm/boot/dts/Makefile
-+++ b/arch/arm/boot/dts/Makefile
-@@ -168,6 +168,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE_LEGACY) += emev2-kzm9d.dtb \
- 	r8a7779-marzen.dtb \
- 	r8a7779-marzen-reference.dtb \
- 	r8a7791-koelsch.dtb \
-+	r8a7791-koelsch-reference.dtb \
- 	r8a7790-lager.dtb \
- 	r8a7790-lager-reference.dtb \
- 	sh73a0-kzm9g.dtb \
-diff --git a/arch/arm/boot/dts/r8a7791-koelsch-reference.dts b/arch/arm/boot/dts/r8a7791-koelsch-reference.dts
-new file mode 100644
-index 000000000000..b8a374a6bf79
---- /dev/null
-+++ b/arch/arm/boot/dts/r8a7791-koelsch-reference.dts
-@@ -0,0 +1,32 @@
-+/*
-+ * Device Tree Source for the Koelsch board
-+ *
-+ * Copyright (C) 2013 Renesas Electronics Corporation
-+ * Copyright (C) 2013 Renesas Solutions Corp.
-+ *
-+ * This file is licensed under the terms of the GNU General Public License
-+ * version 2.  This program is licensed "as is" without any warranty of any
-+ * kind, whether express or implied.
-+ */
-+
-+/dts-v1/;
-+/include/ "r8a7791.dtsi"
-+
-+/ {
-+	model = "Koelsch";
-+	compatible = "renesas,koelsch-reference", "renesas,r8a7791";
-+
-+	chosen {
-+		bootargs = "console=ttySC6,115200 ignore_loglevel rw root=/dev/nfs ip=dhcp";
-+	};
-+
-+	memory@40000000 {
-+		device_type = "memory";
-+		reg = <0 0x40000000 0 0x80000000>;
-+	};
-+
-+	lbsc {
-+		#address-cells = <1>;
-+		#size-cells = <1>;
-+	};
-+};
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0111-ASoC-rcar-Use-WARN_ON-instead-of-BUG_ON.patch b/patches.renesas/0111-ASoC-rcar-Use-WARN_ON-instead-of-BUG_ON.patch
deleted file mode 100644
index 6c239ae43a5b2..0000000000000
--- a/patches.renesas/0111-ASoC-rcar-Use-WARN_ON-instead-of-BUG_ON.patch
+++ /dev/null
@@ -1,48 +0,0 @@
-From 58c7bf485d795a3ca0283fc3c72f47704a0e0aa0 Mon Sep 17 00:00:00 2001
-From: Takashi Iwai <tiwai@suse.de>
-Date: Tue, 5 Nov 2013 18:40:05 +0100
-Subject: ASoC: rcar: Use WARN_ON() instead of BUG_ON()
-
-Use WARN_ON() and handle the error cases accordingly.
-
-Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Takashi Iwai <tiwai@suse.de>
-Signed-off-by: Mark Brown <broonie@linaro.org>
-(cherry picked from commit 8b14719bebfe022f3637c323e76c88b2bc061a61)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/sh/rcar/scu.c | 3 ++-
- sound/soc/sh/rcar/ssi.c | 3 ++-
- 2 files changed, 4 insertions(+), 2 deletions(-)
-
-diff --git a/sound/soc/sh/rcar/scu.c b/sound/soc/sh/rcar/scu.c
-index 1ab1bce6be7f..f4453e33a847 100644
---- a/sound/soc/sh/rcar/scu.c
-+++ b/sound/soc/sh/rcar/scu.c
-@@ -198,7 +198,8 @@ static struct rsnd_mod_ops rsnd_scu_ops = {
- 
- struct rsnd_mod *rsnd_scu_mod_get(struct rsnd_priv *priv, int id)
- {
--	BUG_ON(id < 0 || id >= rsnd_scu_nr(priv));
-+	if (WARN_ON(id < 0 || id >= rsnd_scu_nr(priv)))
-+		id = 0;
- 
- 	return &((struct rsnd_scu *)(priv->scu) + id)->mod;
- }
-diff --git a/sound/soc/sh/rcar/ssi.c b/sound/soc/sh/rcar/ssi.c
-index b71cf9d7dd3f..5ac20cd5e006 100644
---- a/sound/soc/sh/rcar/ssi.c
-+++ b/sound/soc/sh/rcar/ssi.c
-@@ -611,7 +611,8 @@ struct rsnd_mod *rsnd_ssi_mod_get_frm_dai(struct rsnd_priv *priv,
- 
- struct rsnd_mod *rsnd_ssi_mod_get(struct rsnd_priv *priv, int id)
- {
--	BUG_ON(id < 0 || id >= rsnd_ssi_nr(priv));
-+	if (WARN_ON(id < 0 || id >= rsnd_ssi_nr(priv)))
-+		id = 0;
- 
- 	return &(((struct rsnd_ssiu *)(priv->ssiu))->ssi + id)->mod;
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0112-ARM-shmobile-mackerel-Register-pinctrl-mapping-for-H.patch b/patches.renesas/0112-ARM-shmobile-mackerel-Register-pinctrl-mapping-for-H.patch
deleted file mode 100644
index cea6312b1388b..0000000000000
--- a/patches.renesas/0112-ARM-shmobile-mackerel-Register-pinctrl-mapping-for-H.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-From aeed83cb250c8837ffbba7945a7bb2ea6b4b9f61 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 19 Apr 2013 13:29:48 +0200
-Subject: ARM: shmobile: mackerel: Register pinctrl mapping for HDMI
-
-Replace the GPIO-based HDMI pinmux configuration by a pinctrl mapping.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit cfced2c8f9472dba8004ee37b4b111b3f876c843)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-mackerel.c | 7 +++----
- 1 file changed, 3 insertions(+), 4 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c
-index f2e8740f..e5bcd187 100644
---- a/arch/arm/mach-shmobile/board-mackerel.c
-+++ b/arch/arm/mach-shmobile/board-mackerel.c
-@@ -1338,6 +1338,9 @@ static const struct pinctrl_map mackerel_pinctrl_map[] = {
- 	/* FSIB (HDMI) */
- 	PIN_MAP_MUX_GROUP_DEFAULT("asoc-simple-card.1", "pfc-sh7372",
- 				  "fsib_mclk_in", "fsib"),
-+	/* HDMI */
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh-mobile-hdmi", "pfc-sh7372",
-+				  "hdmi", "hdmi"),
- 	/* SDHI0 */
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh7372",
- 				  "sdhi0_data4", "sdhi0"),
-@@ -1494,10 +1497,6 @@ static void __init mackerel_init(void)
- 	gpio_request(GPIO_FN_SCIFA2_TXD1, NULL);
- 	gpio_request(GPIO_FN_SCIFA2_RXD1, NULL);
- 
--	/* HDMI */
--	gpio_request(GPIO_FN_HDMI_HPD, NULL);
--	gpio_request(GPIO_FN_HDMI_CEC, NULL);
--
- 	/* Reset HDMI, must be held at least one EXTALR (32768Hz) period */
- 	srcr4 = __raw_readl(SRCR4);
- 	__raw_writel(srcr4 | (1 << 13), SRCR4);
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0112-ARM-shmobile-r8a7778-Fix-pin-control-device-address-.patch b/patches.renesas/0112-ARM-shmobile-r8a7778-Fix-pin-control-device-address-.patch
deleted file mode 100644
index 65eb538fee6f3..0000000000000
--- a/patches.renesas/0112-ARM-shmobile-r8a7778-Fix-pin-control-device-address-.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From 026711057257994e4f7325357ea54f87465a44e9 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 3 Oct 2013 19:35:41 +0200
-Subject: ARM: shmobile: r8a7778: Fix pin control device address in DT
-
-The PFC device is erroneously declared at address 0xfffc000 instead of
-0xfffc0000. Fix it.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Tested-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 80d01feec9f20e30ab7a998a120bce697bb7d935)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7778.dtsi | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi
-index 7a2c433fb63d..a5822116612c 100644
---- a/arch/arm/boot/dts/r8a7778.dtsi
-+++ b/arch/arm/boot/dts/r8a7778.dtsi
-@@ -114,7 +114,7 @@
- 
- 	pfc: pfc@fffc0000 {
- 		compatible = "renesas,pfc-r8a7778";
--		reg = <0xfffc000 0x118>;
-+		reg = <0xfffc0000 0x118>;
- 	};
- 
- 	i2c0: i2c@ffc70000 {
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0112-ASoC-rcar-fixup-mod-access-before-checking.patch b/patches.renesas/0112-ASoC-rcar-fixup-mod-access-before-checking.patch
deleted file mode 100644
index 6162ef2e31115..0000000000000
--- a/patches.renesas/0112-ASoC-rcar-fixup-mod-access-before-checking.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From c1f3ff3bbdbb555bec65e5892a34b70c208abc5e Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Sun, 10 Nov 2013 17:00:42 -0800
-Subject: ASoC: rcar: fixup mod access before checking
-
-rsnd_dai_connect() is using mod before NULL checking.
-This patch fixes it up
-
-Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@linaro.org>
-(cherry picked from commit 6020779b118f6221e5d067bd1e6b44bab6fc0276)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/sh/rcar/core.c | 10 ++++------
- 1 file changed, 4 insertions(+), 6 deletions(-)
-
-diff --git a/sound/soc/sh/rcar/core.c b/sound/soc/sh/rcar/core.c
-index 839eee3208dc..ae1a5ed8974e 100644
---- a/sound/soc/sh/rcar/core.c
-+++ b/sound/soc/sh/rcar/core.c
-@@ -333,15 +333,13 @@ int rsnd_dai_connect(struct rsnd_dai *rdai,
- 		     struct rsnd_mod *mod,
- 		     struct rsnd_dai_stream *io)
- {
--	struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
--	struct device *dev = rsnd_priv_to_dev(priv);
--
--	if (!mod) {
--		dev_err(dev, "NULL mod\n");
-+	if (!mod)
- 		return -EIO;
--	}
- 
- 	if (!list_empty(&mod->list)) {
-+		struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
-+		struct device *dev = rsnd_priv_to_dev(priv);
-+
- 		dev_err(dev, "%s%d is not empty\n",
- 			rsnd_mod_name(mod),
- 			rsnd_mod_id(mod));
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0113-ARM-shmobile-bockw-add-default-PFC-settings-on-DTS.patch b/patches.renesas/0113-ARM-shmobile-bockw-add-default-PFC-settings-on-DTS.patch
deleted file mode 100644
index 2a743de5696a6..0000000000000
--- a/patches.renesas/0113-ARM-shmobile-bockw-add-default-PFC-settings-on-DTS.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 1b5ab7f2352ec55ffed02d6b01d8072232e58d2b Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Thu, 3 Oct 2013 18:31:16 -0700
-Subject: ARM: shmobile: bockw: add default PFC settings on DTS
-
-SCIF0 PFC setting is needed as default
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 8ed1f8a5e1fdd76b0d2b04871a33a2f90e5f8343)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7778-bockw-reference.dts | 10 ++++++++++
- 1 file changed, 10 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a7778-bockw-reference.dts b/arch/arm/boot/dts/r8a7778-bockw-reference.dts
-index 969e386e852c..3c1d1f078ae5 100644
---- a/arch/arm/boot/dts/r8a7778-bockw-reference.dts
-+++ b/arch/arm/boot/dts/r8a7778-bockw-reference.dts
-@@ -55,3 +55,13 @@
- &irqpin {
- 	status = "okay";
- };
-+
-+&pfc {
-+	pinctrl-0 = <&scif0_pins>;
-+	pinctrl-names = "default";
-+
-+	scif0_pins: scif0 {
-+		renesas,groups = "scif0_data_a", "scif0_ctrl";
-+		renesas,function = "scif0";
-+	};
-+};
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0113-ARM-shmobile-mackerel-Register-pinctrl-mapping-for-L.patch b/patches.renesas/0113-ARM-shmobile-mackerel-Register-pinctrl-mapping-for-L.patch
deleted file mode 100644
index 00bbcad8232f3..0000000000000
--- a/patches.renesas/0113-ARM-shmobile-mackerel-Register-pinctrl-mapping-for-L.patch
+++ /dev/null
@@ -1,69 +0,0 @@
-From 03abe7aeb9935f9684481102eb9b24cd352a5f46 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 19 Apr 2013 13:29:48 +0200
-Subject: ARM: shmobile: mackerel: Register pinctrl mapping for LCD
-
-Replace the GPIO-based LCD pinmux configuration by a pinctrl mapping.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 845a802cd14b6ef4c791284980a09d887407aeaa)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-mackerel.c | 33 +++++----------------------------
- 1 file changed, 5 insertions(+), 28 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c
-index e5bcd187..07eeb55b 100644
---- a/arch/arm/mach-shmobile/board-mackerel.c
-+++ b/arch/arm/mach-shmobile/board-mackerel.c
-@@ -1341,6 +1341,11 @@ static const struct pinctrl_map mackerel_pinctrl_map[] = {
- 	/* HDMI */
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh-mobile-hdmi", "pfc-sh7372",
- 				  "hdmi", "hdmi"),
-+	/* LCDC */
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_lcdc_fb.0", "pfc-sh7372",
-+				  "lcd_data24", "lcd"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_lcdc_fb.0", "pfc-sh7372",
-+				  "lcd_sync", "lcd"),
- 	/* SDHI0 */
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh7372",
- 				  "sdhi0_data4", "sdhi0"),
-@@ -1417,34 +1422,6 @@ static void __init mackerel_init(void)
- 	gpio_request(GPIO_FN_CS5A,	NULL);
- 	gpio_request(GPIO_FN_IRQ6_39,	NULL);
- 
--	/* LCDC */
--	gpio_request(GPIO_FN_LCDD23,   NULL);
--	gpio_request(GPIO_FN_LCDD22,   NULL);
--	gpio_request(GPIO_FN_LCDD21,   NULL);
--	gpio_request(GPIO_FN_LCDD20,   NULL);
--	gpio_request(GPIO_FN_LCDD19,   NULL);
--	gpio_request(GPIO_FN_LCDD18,   NULL);
--	gpio_request(GPIO_FN_LCDD17,   NULL);
--	gpio_request(GPIO_FN_LCDD16,   NULL);
--	gpio_request(GPIO_FN_LCDD15,   NULL);
--	gpio_request(GPIO_FN_LCDD14,   NULL);
--	gpio_request(GPIO_FN_LCDD13,   NULL);
--	gpio_request(GPIO_FN_LCDD12,   NULL);
--	gpio_request(GPIO_FN_LCDD11,   NULL);
--	gpio_request(GPIO_FN_LCDD10,   NULL);
--	gpio_request(GPIO_FN_LCDD9,    NULL);
--	gpio_request(GPIO_FN_LCDD8,    NULL);
--	gpio_request(GPIO_FN_LCDD7,    NULL);
--	gpio_request(GPIO_FN_LCDD6,    NULL);
--	gpio_request(GPIO_FN_LCDD5,    NULL);
--	gpio_request(GPIO_FN_LCDD4,    NULL);
--	gpio_request(GPIO_FN_LCDD3,    NULL);
--	gpio_request(GPIO_FN_LCDD2,    NULL);
--	gpio_request(GPIO_FN_LCDD1,    NULL);
--	gpio_request(GPIO_FN_LCDD0,    NULL);
--	gpio_request(GPIO_FN_LCDDISP,  NULL);
--	gpio_request(GPIO_FN_LCDDCK,   NULL);
--
- 	/* backlight, off by default */
- 	gpio_request_one(31, GPIOF_OUT_INIT_LOW, NULL);
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0113-ASoC-rcar-off-by-one-in-rsnd_scu_set_route.patch b/patches.renesas/0113-ASoC-rcar-off-by-one-in-rsnd_scu_set_route.patch
deleted file mode 100644
index 886d7b1798528..0000000000000
--- a/patches.renesas/0113-ASoC-rcar-off-by-one-in-rsnd_scu_set_route.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From f1a26ba277f1c8ff97e4ee81223dca356e88190c Mon Sep 17 00:00:00 2001
-From: Dan Carpenter <dan.carpenter@oracle.com>
-Date: Fri, 8 Nov 2013 12:46:10 +0300
-Subject: ASoC: rcar: off by one in rsnd_scu_set_route()
-
-If "id == ARRAY_SIZE(routes)" then we read one space beyond the end of
-the routes[] array.
-
-Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
-Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@linaro.org>
-(cherry picked from commit b5f3d7af286a28e2fcc92debaba40844cb32bfb4)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/sh/rcar/scu.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/sound/soc/sh/rcar/scu.c b/sound/soc/sh/rcar/scu.c
-index f4453e33a847..fa8fa15860b9 100644
---- a/sound/soc/sh/rcar/scu.c
-+++ b/sound/soc/sh/rcar/scu.c
-@@ -68,7 +68,7 @@ static int rsnd_scu_set_route(struct rsnd_priv *priv,
- 		return 0;
- 
- 	id = rsnd_mod_id(mod);
--	if (id < 0 || id > ARRAY_SIZE(routes))
-+	if (id < 0 || id >= ARRAY_SIZE(routes))
- 		return -EIO;
- 
- 	/*
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0114-ARM-shmobile-bockw-remove-manual-PFC-settings-on-ref.patch b/patches.renesas/0114-ARM-shmobile-bockw-remove-manual-PFC-settings-on-ref.patch
deleted file mode 100644
index 3334227c32a20..0000000000000
--- a/patches.renesas/0114-ARM-shmobile-bockw-remove-manual-PFC-settings-on-ref.patch
+++ /dev/null
@@ -1,50 +0,0 @@
-From 742c5f0f9b76d0ac5b09a99a7a94ad15566b8e37 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Thu, 3 Oct 2013 18:32:01 -0700
-Subject: ARM: shmobile: bockw: remove manual PFC settings on reference
-
-Current Bock-W reference is calling PFC initializer manually,
-but now, it can use DTS PFC.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit dbece02b3460dcc8f43b8c1827b9eb363c2ced36)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-bockw-reference.c | 12 ------------
- 1 file changed, 12 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-bockw-reference.c b/arch/arm/mach-shmobile/board-bockw-reference.c
-index 1687df9b267f..875cf3f3f503 100644
---- a/arch/arm/mach-shmobile/board-bockw-reference.c
-+++ b/arch/arm/mach-shmobile/board-bockw-reference.c
-@@ -27,14 +27,6 @@
-  *	see board-bock.c for checking detail of dip-switch
-  */
- 
--static const struct pinctrl_map bockw_pinctrl_map[] = {
--	/* SCIF0 */
--	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
--				  "scif0_data_a", "scif0"),
--	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
--				  "scif0_ctrl", "scif0"),
--};
--
- #define FPGA	0x18200000
- #define IRQ0MR	0x30
- #define COMCTLR	0x101c
-@@ -44,10 +36,6 @@ static void __init bockw_init(void)
- 
- 	r8a7778_clock_init();
- 	r8a7778_init_irq_extpin_dt(1);
--
--	pinctrl_register_mappings(bockw_pinctrl_map,
--				  ARRAY_SIZE(bockw_pinctrl_map));
--	r8a7778_pinmux_init();
- 	r8a7778_add_dt_devices();
- 
- 	fpga = ioremap_nocache(FPGA, SZ_1M);
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0114-ARM-shmobile-mackerel-Register-pinctrl-mapping-for-S.patch b/patches.renesas/0114-ARM-shmobile-mackerel-Register-pinctrl-mapping-for-S.patch
deleted file mode 100644
index c4c0574895d8d..0000000000000
--- a/patches.renesas/0114-ARM-shmobile-mackerel-Register-pinctrl-mapping-for-S.patch
+++ /dev/null
@@ -1,57 +0,0 @@
-From 90d4f79fe5509bba6fd781613389f0c66e7e40b4 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 19 Apr 2013 13:29:48 +0200
-Subject: ARM: shmobile: mackerel: Register pinctrl mapping for SCIF
-
-Replace the GPIO-based SCIF pinmux configuration by a pinctrl mapping.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 0dcea78510eef0bc60406db73746787f1491e190)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-mackerel.c | 14 ++++++--------
- 1 file changed, 6 insertions(+), 8 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c
-index 07eeb55b..bd3666bc 100644
---- a/arch/arm/mach-shmobile/board-mackerel.c
-+++ b/arch/arm/mach-shmobile/board-mackerel.c
-@@ -1346,6 +1346,12 @@ static const struct pinctrl_map mackerel_pinctrl_map[] = {
- 				  "lcd_data24", "lcd"),
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_lcdc_fb.0", "pfc-sh7372",
- 				  "lcd_sync", "lcd"),
-+	/* SCIFA0 */
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-sh7372",
-+				  "scifa0_data", "scifa0"),
-+	/* SCIFA2 (GT-720F GPS module) */
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.2", "pfc-sh7372",
-+				  "scifa2_data", "scifa2"),
- 	/* SDHI0 */
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh7372",
- 				  "sdhi0_data4", "sdhi0"),
-@@ -1414,10 +1420,6 @@ static void __init mackerel_init(void)
- 				  ARRAY_SIZE(mackerel_pinctrl_map));
- 	sh7372_pinmux_init();
- 
--	/* enable SCIFA0 */
--	gpio_request(GPIO_FN_SCIFA0_TXD, NULL);
--	gpio_request(GPIO_FN_SCIFA0_RXD, NULL);
--
- 	/* enable SMSC911X */
- 	gpio_request(GPIO_FN_CS5A,	NULL);
- 	gpio_request(GPIO_FN_IRQ6_39,	NULL);
-@@ -1470,10 +1472,6 @@ static void __init mackerel_init(void)
- 	/* SDHI0 PORT172 card-detect IRQ26 */
- 	gpio_request(GPIO_FN_IRQ26_172, NULL);
- 
--	/* enable GPS module (GT-720F) */
--	gpio_request(GPIO_FN_SCIFA2_TXD1, NULL);
--	gpio_request(GPIO_FN_SCIFA2_RXD1, NULL);
--
- 	/* Reset HDMI, must be held at least one EXTALR (32768Hz) period */
- 	srcr4 = __raw_readl(SRCR4);
- 	__raw_writel(srcr4 | (1 << 13), SRCR4);
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0114-ASoC-rcar-fixup-dma_async_issue_pending-timing.patch b/patches.renesas/0114-ASoC-rcar-fixup-dma_async_issue_pending-timing.patch
deleted file mode 100644
index f9da5445a8a4c..0000000000000
--- a/patches.renesas/0114-ASoC-rcar-fixup-dma_async_issue_pending-timing.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From 7b4d99db388ad23d29f3e41559811ab5d85ea27b Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Sun, 17 Nov 2013 18:45:16 -0800
-Subject: ASoC: rcar: fixup dma_async_issue_pending() timing
-
-DMAEngine will stall without this patch
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@linaro.org>
-(cherry picked from commit a0d32bca511fd6b570e964ca38a0c3dcd9eacafb)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/sh/rcar/core.c | 3 +--
- 1 file changed, 1 insertion(+), 2 deletions(-)
-
-diff --git a/sound/soc/sh/rcar/core.c b/sound/soc/sh/rcar/core.c
-index ae1a5ed8974e..eb746e74b52d 100644
---- a/sound/soc/sh/rcar/core.c
-+++ b/sound/soc/sh/rcar/core.c
-@@ -245,9 +245,8 @@ static void rsnd_dma_do_work(struct work_struct *work)
- 			return;
- 		}
- 
-+		dma_async_issue_pending(dma->chan);
- 	}
--
--	dma_async_issue_pending(dma->chan);
- }
- 
- int rsnd_dma_available(struct rsnd_dma *dma)
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0115-ARM-shmobile-mackerel-Register-IRQ-pinctrl-mapping-f.patch b/patches.renesas/0115-ARM-shmobile-mackerel-Register-IRQ-pinctrl-mapping-f.patch
deleted file mode 100644
index b800b06fc505f..0000000000000
--- a/patches.renesas/0115-ARM-shmobile-mackerel-Register-IRQ-pinctrl-mapping-f.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From cc14b25a00e89e6641e3c115f178ae2b1d979409 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 19 Apr 2013 13:29:48 +0200
-Subject: ARM: shmobile: mackerel: Register IRQ pinctrl mapping for SDHI0
-
-Replace the GPIO-based SDHI0 IRQ pinmux configuration by a pinctrl
-mapping.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 886c5353a821b28939f095ea2394e6d471f11be0)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-mackerel.c | 5 ++---
- 1 file changed, 2 insertions(+), 3 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c
-index bd3666bc..4be236d1 100644
---- a/arch/arm/mach-shmobile/board-mackerel.c
-+++ b/arch/arm/mach-shmobile/board-mackerel.c
-@@ -1359,6 +1359,8 @@ static const struct pinctrl_map mackerel_pinctrl_map[] = {
- 				  "sdhi0_ctrl", "sdhi0"),
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh7372",
- 				  "sdhi0_wp", "sdhi0"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh7372",
-+				  "intc_irq26_1", "intc"),
- 	/* SDHI1 */
- #if !IS_ENABLED(CONFIG_MMC_SH_MMCIF)
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-sh7372",
-@@ -1469,9 +1471,6 @@ static void __init mackerel_init(void)
- 	/* Accelerometer */
- 	irq_set_irq_type(IRQ21, IRQ_TYPE_LEVEL_HIGH);
- 
--	/* SDHI0 PORT172 card-detect IRQ26 */
--	gpio_request(GPIO_FN_IRQ26_172, NULL);
--
- 	/* Reset HDMI, must be held at least one EXTALR (32768Hz) period */
- 	srcr4 = __raw_readl(SRCR4);
- 	__raw_writel(srcr4 | (1 << 13), SRCR4);
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0115-ARM-shmobile-r8a7778-add-MMCIF-support-on-DTSI.patch b/patches.renesas/0115-ARM-shmobile-r8a7778-add-MMCIF-support-on-DTSI.patch
deleted file mode 100644
index 739fba45adf2a..0000000000000
--- a/patches.renesas/0115-ARM-shmobile-r8a7778-add-MMCIF-support-on-DTSI.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From 2a6574e4cb231cdc1fcd5cef306ce079a45cac35 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Thu, 3 Oct 2013 18:32:22 -0700
-Subject: ARM: shmobile: r8a7778: add MMCIF support on DTSI
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit f7b901757918a99a52ef3ff281401ee1118fa7f6)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7778.dtsi | 8 ++++++++
- 1 file changed, 8 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi
-index a5822116612c..0ff38e6892f5 100644
---- a/arch/arm/boot/dts/r8a7778.dtsi
-+++ b/arch/arm/boot/dts/r8a7778.dtsi
-@@ -156,4 +156,12 @@
- 		interrupts = <0 77 0x4>;
- 		status = "disabled";
- 	};
-+
-+	mmcif: mmcif@ffe4e000 {
-+		compatible = "renesas,sh-mmcif";
-+		reg = <0xffe4e000 0x100>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 61 4>;
-+		status = "disabled";
-+	};
- };
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0115-pwm-backlight-Add-optional-enable-GPIO.patch b/patches.renesas/0115-pwm-backlight-Add-optional-enable-GPIO.patch
deleted file mode 100644
index 9227b92cf80d5..0000000000000
--- a/patches.renesas/0115-pwm-backlight-Add-optional-enable-GPIO.patch
+++ /dev/null
@@ -1,48 +0,0 @@
-From 626358586a945f566db983632d6a0a50dcfc38a3 Mon Sep 17 00:00:00 2001
-From: Thierry Reding <treding@nvidia.com>
-Date: Fri, 30 Aug 2013 11:51:22 +0200
-Subject: pwm-backlight: Add optional enable GPIO
-
-To support a wider variety of backlight setups, introduce an optional
-enable GPIO. Legacy users of the platform data already have a means of
-supporting GPIOs by using the .init(), .exit() and .notify() hooks. DT
-users however cannot use those, so an alternative method is required.
-
-In order to ease the introduction of the optional enable GPIO, make it
-available in the platform data first, so that existing users can be
-converted. Once that has happened a second patch will add code to make
-use of it in the driver.
-
-Signed-off-by: Thierry Reding <treding@nvidia.com>
-(cherry picked from commit 2b9b1620349e325f184c68cddf3b484499c163c0)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- include/linux/pwm_backlight.h | 5 +++++
- 1 file changed, 5 insertions(+)
-
-diff --git a/include/linux/pwm_backlight.h b/include/linux/pwm_backlight.h
-index 56f4a866539a..2de2e275b2cb 100644
---- a/include/linux/pwm_backlight.h
-+++ b/include/linux/pwm_backlight.h
-@@ -6,6 +6,9 @@
- 
- #include <linux/backlight.h>
- 
-+/* TODO: convert to gpiod_*() API once it has been merged */
-+#define PWM_BACKLIGHT_GPIO_ACTIVE_LOW	(1 << 0)
-+
- struct platform_pwm_backlight_data {
- 	int pwm_id;
- 	unsigned int max_brightness;
-@@ -13,6 +16,8 @@ struct platform_pwm_backlight_data {
- 	unsigned int lth_brightness;
- 	unsigned int pwm_period_ns;
- 	unsigned int *levels;
-+	int enable_gpio;
-+	unsigned long enable_gpio_flags;
- 	int (*init)(struct device *dev);
- 	int (*notify)(struct device *dev, int brightness);
- 	void (*notify_after)(struct device *dev, int brightness);
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0116-ARM-shmobile-bockw-add-MMCIF-support-on-DTS.patch b/patches.renesas/0116-ARM-shmobile-bockw-add-MMCIF-support-on-DTS.patch
deleted file mode 100644
index da516bc55680a..0000000000000
--- a/patches.renesas/0116-ARM-shmobile-bockw-add-MMCIF-support-on-DTS.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-From bb45e772def6b57c61f7fc74fce1e834bcad490b Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Thu, 3 Oct 2013 18:32:34 -0700
-Subject: ARM: shmobile: bockw: add MMCIF support on DTS
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 14cdd83a6df84849c369b201ce248e0213d735e0)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7778-bockw-reference.dts | 15 +++++++++++++++
- 1 file changed, 15 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a7778-bockw-reference.dts b/arch/arm/boot/dts/r8a7778-bockw-reference.dts
-index 3c1d1f078ae5..c6b834f01817 100644
---- a/arch/arm/boot/dts/r8a7778-bockw-reference.dts
-+++ b/arch/arm/boot/dts/r8a7778-bockw-reference.dts
-@@ -50,6 +50,21 @@
- 		vddvario-supply = <&fixedregulator3v3>;
- 		vdd33a-supply = <&fixedregulator3v3>;
- 	};
-+
-+	mmc_pins: mmc {
-+		renesas,groups = "mmc_data8", "mmc_ctrl";
-+		renesas,function = "mmc";
-+	};
-+};
-+
-+&mmcif {
-+	pinctrl-0 = <&mmc_pins>;
-+	pinctrl-names = "default";
-+
-+	vmmc-supply = <&fixedregulator3v3>;
-+	bus-width = <8>;
-+	broken-cd;
-+	status = "okay";
- };
- 
- &irqpin {
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0116-ARM-shmobile-mackerel-Register-pinctrl-mapping-for-S.patch b/patches.renesas/0116-ARM-shmobile-mackerel-Register-pinctrl-mapping-for-S.patch
deleted file mode 100644
index b5bb47473da8d..0000000000000
--- a/patches.renesas/0116-ARM-shmobile-mackerel-Register-pinctrl-mapping-for-S.patch
+++ /dev/null
@@ -1,46 +0,0 @@
-From 6f7c2bb37dbf8cb75238a972ced6fd3ff748ef4e Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 19 Apr 2013 13:29:48 +0200
-Subject: ARM: shmobile: mackerel: Register pinctrl mapping for SMSC911x
-
-Replace the GPIO-based SMSC911x pinmux configuration by a pinctrl
-mapping.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 98f2d3645f8c32a35ed7f51639172a1bad1c0dbb)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-mackerel.c | 9 +++++----
- 1 file changed, 5 insertions(+), 4 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c
-index 4be236d1..49b66a85 100644
---- a/arch/arm/mach-shmobile/board-mackerel.c
-+++ b/arch/arm/mach-shmobile/board-mackerel.c
-@@ -1379,6 +1379,11 @@ static const struct pinctrl_map mackerel_pinctrl_map[] = {
- 				  "sdhi2_data4", "sdhi2"),
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.2", "pfc-sh7372",
- 				  "sdhi2_ctrl", "sdhi2"),
-+	/* SMSC911X */
-+	PIN_MAP_MUX_GROUP_DEFAULT("smsc911x", "pfc-sh7372",
-+				  "bsc_cs5a", "bsc"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("smsc911x", "pfc-sh7372",
-+				  "intc_irq6_0", "intc"),
- };
- 
- #define GPIO_PORT9CR	IOMEM(0xE6051009)
-@@ -1422,10 +1427,6 @@ static void __init mackerel_init(void)
- 				  ARRAY_SIZE(mackerel_pinctrl_map));
- 	sh7372_pinmux_init();
- 
--	/* enable SMSC911X */
--	gpio_request(GPIO_FN_CS5A,	NULL);
--	gpio_request(GPIO_FN_IRQ6_39,	NULL);
--
- 	/* backlight, off by default */
- 	gpio_request_one(31, GPIOF_OUT_INIT_LOW, NULL);
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0116-pwm-Add-PWM-polarity-flag-macro-for-DT.patch b/patches.renesas/0116-pwm-Add-PWM-polarity-flag-macro-for-DT.patch
deleted file mode 100644
index 74ba3d0364e36..0000000000000
--- a/patches.renesas/0116-pwm-Add-PWM-polarity-flag-macro-for-DT.patch
+++ /dev/null
@@ -1,64 +0,0 @@
-From 909d7c56d70416b1afabfba6d3d64582795c510a Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 18 Jul 2013 00:54:21 +0200
-Subject: pwm: Add PWM polarity flag macro for DT
-
-Define a PWM_POLARITY_INVERTED macro in include/dt-bindings/pwm/pwm.h to
-be used by device tree sources.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Reviewed-by: Stephen Warren <swarren@nvidia.com>
-Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
-(cherry picked from commit 9344dade4f9438c26f7eb517caeceee4d52a3a68)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- Documentation/devicetree/bindings/pwm/pwm.txt |  7 ++++---
- include/dt-bindings/pwm/pwm.h                 | 14 ++++++++++++++
- 2 files changed, 18 insertions(+), 3 deletions(-)
- create mode 100644 include/dt-bindings/pwm/pwm.h
-
-diff --git a/Documentation/devicetree/bindings/pwm/pwm.txt b/Documentation/devicetree/bindings/pwm/pwm.txt
-index 06e67247859a..8556263b8502 100644
---- a/Documentation/devicetree/bindings/pwm/pwm.txt
-+++ b/Documentation/devicetree/bindings/pwm/pwm.txt
-@@ -43,13 +43,14 @@ because the name "backlight" would be used as fallback anyway.
- pwm-specifier typically encodes the chip-relative PWM number and the PWM
- period in nanoseconds.
- 
--Optionally, the pwm-specifier can encode a number of flags in a third cell:
--- bit 0: PWM signal polarity (0: normal polarity, 1: inverse polarity)
-+Optionally, the pwm-specifier can encode a number of flags (defined in
-+<dt-bindings/pwm/pwm.h>) in a third cell:
-+- PWM_POLARITY_INVERTED: invert the PWM signal polarity
- 
- Example with optional PWM specifier for inverse polarity
- 
- 	bl: backlight {
--		pwms = <&pwm 0 5000000 1>;
-+		pwms = <&pwm 0 5000000 PWM_POLARITY_INVERTED>;
- 		pwm-names = "backlight";
- 	};
- 
-diff --git a/include/dt-bindings/pwm/pwm.h b/include/dt-bindings/pwm/pwm.h
-new file mode 100644
-index 000000000000..96f49e82253e
---- /dev/null
-+++ b/include/dt-bindings/pwm/pwm.h
-@@ -0,0 +1,14 @@
-+/*
-+ * This header provides constants for most PWM bindings.
-+ *
-+ * Most PWM bindings can include a flags cell as part of the PWM specifier.
-+ * In most cases, the format of the flags cell uses the standard values
-+ * defined in this header.
-+ */
-+
-+#ifndef _DT_BINDINGS_PWM_PWM_H
-+#define _DT_BINDINGS_PWM_PWM_H
-+
-+#define PWM_POLARITY_INVERTED			(1 << 0)
-+
-+#endif
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0117-ARM-shmobile-Rename-to-r8a73a4_init_early.patch b/patches.renesas/0117-ARM-shmobile-Rename-to-r8a73a4_init_early.patch
deleted file mode 100644
index b5349f93c67db..0000000000000
--- a/patches.renesas/0117-ARM-shmobile-Rename-to-r8a73a4_init_early.patch
+++ /dev/null
@@ -1,83 +0,0 @@
-From 294e932056bdaf3e3aa20497f17dbf077a431452 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Thu, 8 Aug 2013 07:26:48 +0900
-Subject: ARM: shmobile: Rename to r8a73a4_init_early()
-
-Rename r8a73a4_init_delay() into r8a73a4_init_early()
-to make the function name show that more than just
-delay setup may happen in the future.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 0750a54592a2daff70771a1c170f9859d5901d3d)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-ape6evm-reference.c | 2 +-
- arch/arm/mach-shmobile/board-ape6evm.c           | 2 +-
- arch/arm/mach-shmobile/include/mach/r8a73a4.h    | 2 +-
- arch/arm/mach-shmobile/setup-r8a73a4.c           | 4 ++--
- 4 files changed, 5 insertions(+), 5 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-ape6evm-reference.c b/arch/arm/mach-shmobile/board-ape6evm-reference.c
-index a23fa714f7ac..3276afcf3cc9 100644
---- a/arch/arm/mach-shmobile/board-ape6evm-reference.c
-+++ b/arch/arm/mach-shmobile/board-ape6evm-reference.c
-@@ -57,7 +57,7 @@ static const char *ape6evm_boards_compat_dt[] __initdata = {
- };
- 
- DT_MACHINE_START(APE6EVM_DT, "ape6evm")
--	.init_early	= r8a73a4_init_delay,
-+	.init_early	= r8a73a4_init_early,
- 	.init_machine	= ape6evm_add_standard_devices,
- 	.dt_compat	= ape6evm_boards_compat_dt,
- MACHINE_END
-diff --git a/arch/arm/mach-shmobile/board-ape6evm.c b/arch/arm/mach-shmobile/board-ape6evm.c
-index 24b87eea9da3..d36e23f5d8b7 100644
---- a/arch/arm/mach-shmobile/board-ape6evm.c
-+++ b/arch/arm/mach-shmobile/board-ape6evm.c
-@@ -240,7 +240,7 @@ static const char *ape6evm_boards_compat_dt[] __initdata = {
- };
- 
- DT_MACHINE_START(APE6EVM_DT, "ape6evm")
--	.init_early	= r8a73a4_init_delay,
-+	.init_early	= r8a73a4_init_early,
- 	.init_machine	= ape6evm_add_standard_devices,
- 	.dt_compat	= ape6evm_boards_compat_dt,
- MACHINE_END
-diff --git a/arch/arm/mach-shmobile/include/mach/r8a73a4.h b/arch/arm/mach-shmobile/include/mach/r8a73a4.h
-index f3a9b702da56..5214338a6a47 100644
---- a/arch/arm/mach-shmobile/include/mach/r8a73a4.h
-+++ b/arch/arm/mach-shmobile/include/mach/r8a73a4.h
-@@ -5,6 +5,6 @@ void r8a73a4_add_standard_devices(void);
- void r8a73a4_add_dt_devices(void);
- void r8a73a4_clock_init(void);
- void r8a73a4_pinmux_init(void);
--void r8a73a4_init_delay(void);
-+void r8a73a4_init_early(void);
- 
- #endif /* __ASM_R8A73A4_H__ */
-diff --git a/arch/arm/mach-shmobile/setup-r8a73a4.c b/arch/arm/mach-shmobile/setup-r8a73a4.c
-index 89491700afb7..53a896275cae 100644
---- a/arch/arm/mach-shmobile/setup-r8a73a4.c
-+++ b/arch/arm/mach-shmobile/setup-r8a73a4.c
-@@ -207,7 +207,7 @@ void __init r8a73a4_add_standard_devices(void)
- 	r8a73a4_register_thermal();
- }
- 
--void __init r8a73a4_init_delay(void)
-+void __init r8a73a4_init_early(void)
- {
- #ifndef CONFIG_ARM_ARCH_TIMER
- 	shmobile_setup_delay(1500, 2, 4); /* Cortex-A15 @ 1500MHz */
-@@ -222,7 +222,7 @@ static const char *r8a73a4_boards_compat_dt[] __initdata = {
- };
- 
- DT_MACHINE_START(R8A73A4_DT, "Generic R8A73A4 (Flattened Device Tree)")
--	.init_early	= r8a73a4_init_delay,
-+	.init_early	= r8a73a4_init_early,
- 	.dt_compat	= r8a73a4_boards_compat_dt,
- MACHINE_END
- #endif /* CONFIG_USE_OF */
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0117-ARM-shmobile-bockw-fixup-MMC-pin-conflict-on-DTS.patch b/patches.renesas/0117-ARM-shmobile-bockw-fixup-MMC-pin-conflict-on-DTS.patch
deleted file mode 100644
index dc6f7a26e7e14..0000000000000
--- a/patches.renesas/0117-ARM-shmobile-bockw-fixup-MMC-pin-conflict-on-DTS.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From 1f12f7a99052779e5677c94c2f9bd03d5d0498da Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Thu, 10 Oct 2013 23:34:33 -0700
-Subject: ARM: shmobile: bockw: fixup MMC pin conflict on DTS
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 9ebe54baf8a166384201b4a78c649106047ebc75)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7778-bockw-reference.dts | 9 +++++----
- 1 file changed, 5 insertions(+), 4 deletions(-)
-
-diff --git a/arch/arm/boot/dts/r8a7778-bockw-reference.dts b/arch/arm/boot/dts/r8a7778-bockw-reference.dts
-index c6b834f01817..4d997f81f379 100644
---- a/arch/arm/boot/dts/r8a7778-bockw-reference.dts
-+++ b/arch/arm/boot/dts/r8a7778-bockw-reference.dts
-@@ -51,10 +51,6 @@
- 		vdd33a-supply = <&fixedregulator3v3>;
- 	};
- 
--	mmc_pins: mmc {
--		renesas,groups = "mmc_data8", "mmc_ctrl";
--		renesas,function = "mmc";
--	};
- };
- 
- &mmcif {
-@@ -79,4 +75,9 @@
- 		renesas,groups = "scif0_data_a", "scif0_ctrl";
- 		renesas,function = "scif0";
- 	};
-+
-+	mmc_pins: mmc {
-+		renesas,groups = "mmc_data8", "mmc_ctrl";
-+		renesas,function = "mmc";
-+	};
- };
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0117-ARM-shmobile-mackerel-Register-pinctrl-mapping-for-S.patch b/patches.renesas/0117-ARM-shmobile-mackerel-Register-pinctrl-mapping-for-S.patch
deleted file mode 100644
index 21e5e2f87541c..0000000000000
--- a/patches.renesas/0117-ARM-shmobile-mackerel-Register-pinctrl-mapping-for-S.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From 83fb7b63e6d53cb816688e44354e8d4c04a87d89 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 19 Apr 2013 13:29:48 +0200
-Subject: ARM: shmobile: mackerel: Register pinctrl mapping for ST1232
-
-Replace the GPIO-based ST1232 pinmux configuration by a pinctrl mapping.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit a4bb48874ed7bc2d27b5ec12082894226db9aa11)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-mackerel.c | 6 ++++--
- 1 file changed, 4 insertions(+), 2 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c
-index 49b66a85..83506357 100644
---- a/arch/arm/mach-shmobile/board-mackerel.c
-+++ b/arch/arm/mach-shmobile/board-mackerel.c
-@@ -1384,6 +1384,9 @@ static const struct pinctrl_map mackerel_pinctrl_map[] = {
- 				  "bsc_cs5a", "bsc"),
- 	PIN_MAP_MUX_GROUP_DEFAULT("smsc911x", "pfc-sh7372",
- 				  "intc_irq6_0", "intc"),
-+	/* ST1232 */
-+	PIN_MAP_MUX_GROUP_DEFAULT("0-0055", "pfc-sh7372",
-+				  "intc_irq7_0", "intc"),
- };
- 
- #define GPIO_PORT9CR	IOMEM(0xE6051009)
-@@ -1465,8 +1468,7 @@ static void __init mackerel_init(void)
- 	gpio_request(GPIO_FN_IRQ9_42,	NULL);
- 	irq_set_irq_type(IRQ9, IRQ_TYPE_LEVEL_HIGH);
- 
--	/* enable Touchscreen */
--	gpio_request(GPIO_FN_IRQ7_40,	NULL);
-+	/* Touchscreen */
- 	irq_set_irq_type(IRQ7, IRQ_TYPE_LEVEL_LOW);
- 
- 	/* Accelerometer */
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0118-ARM-shmobile-Rename-to-r8a7790_init_early.patch b/patches.renesas/0118-ARM-shmobile-Rename-to-r8a7790_init_early.patch
deleted file mode 100644
index b8f507b9d8087..0000000000000
--- a/patches.renesas/0118-ARM-shmobile-Rename-to-r8a7790_init_early.patch
+++ /dev/null
@@ -1,84 +0,0 @@
-From 51bc0c0d91e1ba6c5e6272ff9070951bc3958b81 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Thu, 8 Aug 2013 07:27:01 +0900
-Subject: ARM: shmobile: Rename to r8a7790_init_early()
-
-Rename r8a7790_init_delay() into r8a7790_init_early()
-to make the function name show that more than just
-delay setup may happen in the future.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 0efd7faa6c611dab4ab8105473d2ffde7918cb69)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-lager-reference.c | 2 +-
- arch/arm/mach-shmobile/board-lager.c           | 2 +-
- arch/arm/mach-shmobile/include/mach/r8a7790.h  | 2 +-
- arch/arm/mach-shmobile/setup-r8a7790.c         | 4 ++--
- 4 files changed, 5 insertions(+), 5 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-lager-reference.c b/arch/arm/mach-shmobile/board-lager-reference.c
-index 9c316a1b2e32..2856f51ff8a6 100644
---- a/arch/arm/mach-shmobile/board-lager-reference.c
-+++ b/arch/arm/mach-shmobile/board-lager-reference.c
-@@ -38,7 +38,7 @@ static const char *lager_boards_compat_dt[] __initdata = {
- };
- 
- DT_MACHINE_START(LAGER_DT, "lager")
--	.init_early	= r8a7790_init_delay,
-+	.init_early	= r8a7790_init_early,
- 	.init_machine	= lager_add_standard_devices,
- 	.init_time	= r8a7790_timer_init,
- 	.dt_compat	= lager_boards_compat_dt,
-diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
-index 5930af8d434f..6569491839cf 100644
---- a/arch/arm/mach-shmobile/board-lager.c
-+++ b/arch/arm/mach-shmobile/board-lager.c
-@@ -186,7 +186,7 @@ static const char *lager_boards_compat_dt[] __initdata = {
- };
- 
- DT_MACHINE_START(LAGER_DT, "lager")
--	.init_early	= r8a7790_init_delay,
-+	.init_early	= r8a7790_init_early,
- 	.init_time	= r8a7790_timer_init,
- 	.init_machine	= lager_init,
- 	.dt_compat	= lager_boards_compat_dt,
-diff --git a/arch/arm/mach-shmobile/include/mach/r8a7790.h b/arch/arm/mach-shmobile/include/mach/r8a7790.h
-index 788d55952091..177a8372abb7 100644
---- a/arch/arm/mach-shmobile/include/mach/r8a7790.h
-+++ b/arch/arm/mach-shmobile/include/mach/r8a7790.h
-@@ -5,7 +5,7 @@ void r8a7790_add_standard_devices(void);
- void r8a7790_add_dt_devices(void);
- void r8a7790_clock_init(void);
- void r8a7790_pinmux_init(void);
--void r8a7790_init_delay(void);
-+void r8a7790_init_early(void);
- void r8a7790_timer_init(void);
- 
- #define MD(nr) BIT(nr)
-diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c
-index d0f5c9f9349a..a42d1f6f1f81 100644
---- a/arch/arm/mach-shmobile/setup-r8a7790.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7790.c
-@@ -267,7 +267,7 @@ void __init r8a7790_timer_init(void)
- 	clocksource_of_init();
- }
- 
--void __init r8a7790_init_delay(void)
-+void __init r8a7790_init_early(void)
- {
- #ifndef CONFIG_ARM_ARCH_TIMER
- 	shmobile_setup_delay(1300, 2, 4); /* Cortex-A15 @ 1300MHz */
-@@ -282,7 +282,7 @@ static const char *r8a7790_boards_compat_dt[] __initdata = {
- };
- 
- DT_MACHINE_START(R8A7790_DT, "Generic R8A7790 (Flattened Device Tree)")
--	.init_early	= r8a7790_init_delay,
-+	.init_early	= r8a7790_init_early,
- 	.init_time	= r8a7790_timer_init,
- 	.dt_compat	= r8a7790_boards_compat_dt,
- MACHINE_END
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0118-ARM-shmobile-mackerel-Register-pinctrl-mapping-for-T.patch b/patches.renesas/0118-ARM-shmobile-mackerel-Register-pinctrl-mapping-for-T.patch
deleted file mode 100644
index fc132c9c90983..0000000000000
--- a/patches.renesas/0118-ARM-shmobile-mackerel-Register-pinctrl-mapping-for-T.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-From 6e848fd16f34df458bb6bded632de900d310ddfa Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 19 Apr 2013 13:29:48 +0200
-Subject: ARM: shmobile: mackerel: Register pinctrl mapping for TCA6416
-
-Replace the GPIO-based TCA6416 pinmux configuration by a pinctrl
-mapping.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 47f902899fc81886da88b078d74aec17b0040487)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-mackerel.c | 6 ++++--
- 1 file changed, 4 insertions(+), 2 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c
-index 83506357..397e73c4 100644
---- a/arch/arm/mach-shmobile/board-mackerel.c
-+++ b/arch/arm/mach-shmobile/board-mackerel.c
-@@ -1387,6 +1387,9 @@ static const struct pinctrl_map mackerel_pinctrl_map[] = {
- 	/* ST1232 */
- 	PIN_MAP_MUX_GROUP_DEFAULT("0-0055", "pfc-sh7372",
- 				  "intc_irq7_0", "intc"),
-+	/* TCA6416 */
-+	PIN_MAP_MUX_GROUP_DEFAULT("0-0020", "pfc-sh7372",
-+				  "intc_irq9_0", "intc"),
- };
- 
- #define GPIO_PORT9CR	IOMEM(0xE6051009)
-@@ -1464,8 +1467,7 @@ static void __init mackerel_init(void)
- 		clk_put(clk);
- 	}
- 
--	/* enable Keypad */
--	gpio_request(GPIO_FN_IRQ9_42,	NULL);
-+	/* Keypad */
- 	irq_set_irq_type(IRQ9, IRQ_TYPE_LEVEL_HIGH);
- 
- 	/* Touchscreen */
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0118-ARM-shmobile-r8a7778-add-SDHI-support-on-DTSI.patch b/patches.renesas/0118-ARM-shmobile-r8a7778-add-SDHI-support-on-DTSI.patch
deleted file mode 100644
index 40ae829ce5979..0000000000000
--- a/patches.renesas/0118-ARM-shmobile-r8a7778-add-SDHI-support-on-DTSI.patch
+++ /dev/null
@@ -1,56 +0,0 @@
-From 393797463e3f73ea924b4a597fb0d948577baa1f Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Thu, 10 Oct 2013 23:35:46 -0700
-Subject: ARM: shmobile: r8a7778: add SDHI support on DTSI
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 04cbd88902dd16a8f20db808ab444035be2557ac)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7778.dtsi | 30 ++++++++++++++++++++++++++++++
- 1 file changed, 30 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi
-index 0ff38e6892f5..873eeb903b2e 100644
---- a/arch/arm/boot/dts/r8a7778.dtsi
-+++ b/arch/arm/boot/dts/r8a7778.dtsi
-@@ -164,4 +164,34 @@
- 		interrupts = <0 61 4>;
- 		status = "disabled";
- 	};
-+
-+	sdhi0: sdhi@ffe4c000 {
-+		compatible = "renesas,sdhi-r8a7778";
-+		reg = <0xffe4c000 0x100>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 87 4>;
-+		cap-sd-highspeed;
-+		cap-sdio-irq;
-+		status = "disabled";
-+	};
-+
-+	sdhi1: sdhi@ffe4d000 {
-+		compatible = "renesas,sdhi-r8a7778";
-+		reg = <0xffe4d000 0x100>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 88 4>;
-+		cap-sd-highspeed;
-+		cap-sdio-irq;
-+		status = "disabled";
-+	};
-+
-+	sdhi2: sdhi@ffe4f000 {
-+		compatible = "renesas,sdhi-r8a7778";
-+		reg = <0xffe4f000 0x100>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 86 4>;
-+		cap-sd-highspeed;
-+		cap-sdio-irq;
-+		status = "disabled";
-+	};
- };
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0119-ARM-shmobile-bockw-add-SDHI-support-on-DTS.patch b/patches.renesas/0119-ARM-shmobile-bockw-add-SDHI-support-on-DTS.patch
deleted file mode 100644
index 03714faa9c4fc..0000000000000
--- a/patches.renesas/0119-ARM-shmobile-bockw-add-SDHI-support-on-DTS.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From fd5b0635c048ebfc7543535ba040f3212e9ea8cc Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Thu, 10 Oct 2013 23:36:01 -0700
-Subject: ARM: shmobile: bockw: add SDHI support on DTS
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 9d0395a5e1de5a1ea14298774006f3f285040848)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7778-bockw-reference.dts | 15 +++++++++++++++
- 1 file changed, 15 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a7778-bockw-reference.dts b/arch/arm/boot/dts/r8a7778-bockw-reference.dts
-index 4d997f81f379..8b8208ebf0d1 100644
---- a/arch/arm/boot/dts/r8a7778-bockw-reference.dts
-+++ b/arch/arm/boot/dts/r8a7778-bockw-reference.dts
-@@ -80,4 +80,19 @@
- 		renesas,groups = "mmc_data8", "mmc_ctrl";
- 		renesas,function = "mmc";
- 	};
-+
-+	sdhi0_pins: sdhi0 {
-+		renesas,groups = "sdhi0_data4", "sdhi0_ctrl",
-+				  "sdhi0_cd", "sdhi0_wp";
-+		renesas,function = "sdhi0";
-+	};
-+};
-+
-+&sdhi0 {
-+	pinctrl-0 = <&sdhi0_pins>;
-+	pinctrl-names = "default";
-+
-+	vmmc-supply = <&fixedregulator3v3>;
-+	bus-width = <4>;
-+	status = "okay";
- };
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0119-ARM-shmobile-mackerel-Register-pinctrl-mapping-for-U.patch b/patches.renesas/0119-ARM-shmobile-mackerel-Register-pinctrl-mapping-for-U.patch
deleted file mode 100644
index 260c86fc60fd1..0000000000000
--- a/patches.renesas/0119-ARM-shmobile-mackerel-Register-pinctrl-mapping-for-U.patch
+++ /dev/null
@@ -1,51 +0,0 @@
-From 84c124d60f68bd52d579531497ffa4e96734f2c9 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 19 Apr 2013 13:29:48 +0200
-Subject: ARM: shmobile: mackerel: Register pinctrl mapping for USBHS
-
-Replace the GPIO-based USBHS pinmux configuration by a pinctrl mapping.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit c135190ded645910813d3188469c185c82b13900)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-mackerel.c | 11 ++++++++---
- 1 file changed, 8 insertions(+), 3 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c
-index 397e73c4..85f51a84 100644
---- a/arch/arm/mach-shmobile/board-mackerel.c
-+++ b/arch/arm/mach-shmobile/board-mackerel.c
-@@ -1390,6 +1390,14 @@ static const struct pinctrl_map mackerel_pinctrl_map[] = {
- 	/* TCA6416 */
- 	PIN_MAP_MUX_GROUP_DEFAULT("0-0020", "pfc-sh7372",
- 				  "intc_irq9_0", "intc"),
-+	/* USBHS0 */
-+	PIN_MAP_MUX_GROUP_DEFAULT("renesas_usbhs.0", "pfc-sh7372",
-+				  "usb0_vbus", "usb0"),
-+	/* USBHS1 */
-+	PIN_MAP_MUX_GROUP_DEFAULT("renesas_usbhs.1", "pfc-sh7372",
-+				  "usb1_vbus", "usb1"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("renesas_usbhs.1", "pfc-sh7372",
-+				  "usb1_otg_id_0", "usb1"),
- };
- 
- #define GPIO_PORT9CR	IOMEM(0xE6051009)
-@@ -1439,13 +1447,10 @@ static void __init mackerel_init(void)
- 	gpio_request_one(151, GPIOF_OUT_INIT_HIGH, NULL); /* LCDDON */
- 
- 	/* USBHS0 */
--	gpio_request(GPIO_FN_VBUS0_0, NULL);
- 	gpio_request_pulldown(GPIO_PORT168CR); /* VBUS0_0 pull down */
- 
- 	/* USBHS1 */
--	gpio_request(GPIO_FN_VBUS0_1, NULL);
- 	gpio_request_pulldown(GPIO_PORT167CR); /* VBUS0_1 pull down */
--	gpio_request(GPIO_FN_IDIN_1_113, NULL);
- 
- 	/* FSI2 port A (ak4643) */
- 	gpio_request_one(161, GPIOF_OUT_INIT_LOW, NULL); /* slave */
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0119-ARM-shmobile-r8a7790-Constify-platform-data-and-reso.patch b/patches.renesas/0119-ARM-shmobile-r8a7790-Constify-platform-data-and-reso.patch
deleted file mode 100644
index 81f445aa0d437..0000000000000
--- a/patches.renesas/0119-ARM-shmobile-r8a7790-Constify-platform-data-and-reso.patch
+++ /dev/null
@@ -1,104 +0,0 @@
-From 424339e0e986f12022b701c7ab0564db219d61d8 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 8 Aug 2013 00:34:53 +0200
-Subject: ARM: shmobile: r8a7790: Constify platform data and resources
-
-Platform data and resources for core devices are kmemdup()ed when the
-corresponding devices are registered and can thus be declared as const.
-Do so.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit cde214a890f81797a5eee94fffc89c1de21ed991)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-r8a7790.c | 21 +++++++++++----------
- 1 file changed, 11 insertions(+), 10 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c
-index a42d1f6f1f81..e0d29a265c2d 100644
---- a/arch/arm/mach-shmobile/setup-r8a7790.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7790.c
-@@ -31,17 +31,18 @@
- #include <mach/r8a7790.h>
- #include <asm/mach/arch.h>
- 
--static struct resource pfc_resources[] __initdata = {
-+static const struct resource pfc_resources[] __initconst = {
- 	DEFINE_RES_MEM(0xe6060000, 0x250),
- };
- 
- #define R8A7790_GPIO(idx)						\
--static struct resource r8a7790_gpio##idx##_resources[] __initdata = {	\
-+static const struct resource r8a7790_gpio##idx##_resources[] __initconst = { \
- 	DEFINE_RES_MEM(0xe6050000 + 0x1000 * (idx), 0x50),		\
- 	DEFINE_RES_IRQ(gic_spi(4 + (idx))),				\
- };									\
- 									\
--static struct gpio_rcar_config r8a7790_gpio##idx##_platform_data __initdata = {	\
-+static const struct gpio_rcar_config					\
-+r8a7790_gpio##idx##_platform_data __initconst = {			\
- 	.gpio_base	= 32 * (idx),					\
- 	.irq_base	= 0,						\
- 	.number_of_pins	= 32,						\
-@@ -112,7 +113,7 @@ void __init r8a7790_pinmux_init(void)
- enum { SCIFA0, SCIFA1, SCIFB0, SCIFB1, SCIFB2, SCIFA2, SCIF0, SCIF1,
-        HSCIF0, HSCIF1 };
- 
--static struct plat_sci_port scif[] __initdata = {
-+static const struct plat_sci_port scif[] __initconst = {
- 	SCIFA_DATA(SCIFA0, 0xe6c40000, gic_spi(144)), /* SCIFA0 */
- 	SCIFA_DATA(SCIFA1, 0xe6c50000, gic_spi(145)), /* SCIFA1 */
- 	SCIFB_DATA(SCIFB0, 0xe6c20000, gic_spi(148)), /* SCIFB0 */
-@@ -131,11 +132,11 @@ static inline void r8a7790_register_scif(int idx)
- 				      sizeof(struct plat_sci_port));
- }
- 
--static struct renesas_irqc_config irqc0_data __initdata = {
-+static const struct renesas_irqc_config irqc0_data __initconst = {
- 	.irq_base = irq_pin(0), /* IRQ0 -> IRQ3 */
- };
- 
--static struct resource irqc0_resources[] __initdata = {
-+static const struct resource irqc0_resources[] __initconst = {
- 	DEFINE_RES_MEM(0xe61c0000, 0x200), /* IRQC Event Detector Block_0 */
- 	DEFINE_RES_IRQ(gic_spi(0)), /* IRQ0 */
- 	DEFINE_RES_IRQ(gic_spi(1)), /* IRQ1 */
-@@ -150,7 +151,7 @@ static struct resource irqc0_resources[] __initdata = {
- 					  &irqc##idx##_data,		\
- 					  sizeof(struct renesas_irqc_config))
- 
--static struct resource thermal_resources[] __initdata = {
-+static const struct resource thermal_resources[] __initconst = {
- 	DEFINE_RES_MEM(0xe61f0000, 0x14),
- 	DEFINE_RES_MEM(0xe61f0100, 0x38),
- 	DEFINE_RES_IRQ(gic_spi(69)),
-@@ -161,13 +162,13 @@ static struct resource thermal_resources[] __initdata = {
- 					thermal_resources,		\
- 					ARRAY_SIZE(thermal_resources))
- 
--static struct sh_timer_config cmt00_platform_data __initdata = {
-+static const struct sh_timer_config cmt00_platform_data __initconst = {
- 	.name = "CMT00",
- 	.timer_bit = 0,
- 	.clockevent_rating = 80,
- };
- 
--static struct resource cmt00_resources[] __initdata = {
-+static const struct resource cmt00_resources[] __initconst = {
- 	DEFINE_RES_MEM(0xffca0510, 0x0c),
- 	DEFINE_RES_MEM(0xffca0500, 0x04),
- 	DEFINE_RES_IRQ(gic_spi(142)), /* CMT0_0 */
-@@ -276,7 +277,7 @@ void __init r8a7790_init_early(void)
- 
- #ifdef CONFIG_USE_OF
- 
--static const char *r8a7790_boards_compat_dt[] __initdata = {
-+static const char * const r8a7790_boards_compat_dt[] __initconst = {
- 	"renesas,r8a7790",
- 	NULL,
- };
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0120-ARM-shmobile-ap4evb-Register-pinctrl-mapping-for-CEU.patch b/patches.renesas/0120-ARM-shmobile-ap4evb-Register-pinctrl-mapping-for-CEU.patch
deleted file mode 100644
index 6175b14c86187..0000000000000
--- a/patches.renesas/0120-ARM-shmobile-ap4evb-Register-pinctrl-mapping-for-CEU.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From cffbaf7aaccf22267914d4130c3b50b84da766fc Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 19 Apr 2013 13:29:48 +0200
-Subject: ARM: shmobile: ap4evb: Register pinctrl mapping for CEU
-
-Replace the GPIO-based CEU pinmux configuration by a pinctrl mapping.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit bdf439f1878925c536533dd908467a3462171c33)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-ap4evb.c | 5 +++--
- 1 file changed, 3 insertions(+), 2 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c
-index 45f78cad..f42e731e 100644
---- a/arch/arm/mach-shmobile/board-ap4evb.c
-+++ b/arch/arm/mach-shmobile/board-ap4evb.c
-@@ -1086,6 +1086,9 @@ static struct i2c_board_info i2c1_devices[] = {
- 
- 
- static const struct pinctrl_map ap4evb_pinctrl_map[] = {
-+	/* CEU */
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_ceu.0", "pfc-sh7372",
-+				  "ceu_clk_0", "ceu"),
- 	/* MMCIF */
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh7372",
- 				  "mmc0_data8_0", "mmc0"),
-@@ -1288,8 +1291,6 @@ static void __init ap4evb_init(void)
- 	 */
- 
- 	/* MIPI-CSI stuff */
--	gpio_request(GPIO_FN_VIO_CKO, NULL);
--
- 	clk = clk_get(NULL, "vck1_clk");
- 	if (!IS_ERR(clk)) {
- 		clk_set_rate(clk, clk_round_rate(clk, 13000000));
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0120-ARM-shmobile-ape6evm-reference-add-MMCIF-and-SDHI-DT.patch b/patches.renesas/0120-ARM-shmobile-ape6evm-reference-add-MMCIF-and-SDHI-DT.patch
deleted file mode 100644
index b89d8ff8b055c..0000000000000
--- a/patches.renesas/0120-ARM-shmobile-ape6evm-reference-add-MMCIF-and-SDHI-DT.patch
+++ /dev/null
@@ -1,115 +0,0 @@
-From e89eca4c66e9f4698be534106d9afc4a481daacd Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Thu, 1 Aug 2013 09:41:21 +0200
-Subject: ARM: shmobile: ape6evm-reference: add MMCIF and SDHI DT nodes
-
-This patch adds MMCIF0, SDHI0 and SDHI1 DT nodes and a fixed voltage
-reglator for them to the ape6evm-reference platform.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit dbffb5a1525dc88f1c871c48574634f14845b43d)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts | 72 +++++++++++++++++++++++++
- 1 file changed, 72 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts b/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts
-index f444624eb097..2b49b05ae2f4 100644
---- a/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts
-+++ b/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts
-@@ -10,6 +10,7 @@
- 
- /dts-v1/;
- /include/ "r8a73a4.dtsi"
-+#include <dt-bindings/gpio/gpio.h>
- 
- / {
- 	model = "APE6EVM";
-@@ -24,6 +25,34 @@
- 		reg = <0 0x40000000 0 0x40000000>;
- 	};
- 
-+	vcc_mmc0: regulator@0 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "MMC0 Vcc";
-+		regulator-min-microvolt = <2800000>;
-+		regulator-max-microvolt = <2800000>;
-+		regulator-always-on;
-+	};
-+
-+	vcc_sdhi0: regulator@1 {
-+		compatible = "regulator-fixed";
-+
-+		regulator-name = "SDHI0 Vcc";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+
-+		gpio = <&pfc 76 GPIO_ACTIVE_HIGH>;
-+		enable-active-high;
-+	};
-+
-+	/* Common 3.3V rail, used by several devices on APE6EVM */
-+	ape6evm_fixed_3v3: regulator@2 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "3V3";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+		regulator-always-on;
-+	};
-+
- 	lbsc {
- 		compatible = "simple-bus";
- 		#address-cells = <1>;
-@@ -62,4 +91,47 @@
- 		renesas,groups = "scifa0_data";
- 		renesas,function = "scifa0";
- 	};
-+
-+	mmc0_pins: mmcif {
-+		renesas,groups = "mmc0_data8", "mmc0_ctrl";
-+		renesas,function = "mmc0";
-+	};
-+
-+	sdhi0_pins: sdhi0 {
-+		renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_cd";
-+		renesas,function = "sdhi0";
-+	};
-+
-+	sdhi1_pins: sdhi1 {
-+		renesas,groups = "sdhi1_data4", "sdhi1_ctrl";
-+		renesas,function = "sdhi1";
-+	};
-+};
-+
-+&mmcif0 {
-+	vmmc-supply = <&vcc_mmc0>;
-+	bus-width = <8>;
-+	non-removable;
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&mmc0_pins>;
-+	status = "okay";
-+};
-+
-+&sdhi0 {
-+	vmmc-supply = <&vcc_sdhi0>;
-+	bus-width = <4>;
-+	toshiba,mmc-wrprotect-disable;
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&sdhi0_pins>;
-+	status = "okay";
-+};
-+
-+&sdhi1 {
-+	vmmc-supply = <&ape6evm_fixed_3v3>;
-+	bus-width = <4>;
-+	broken-cd;
-+	toshiba,mmc-wrprotect-disable;
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&sdhi1_pins>;
-+	status = "okay";
- };
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0120-ARM-shmobile-r8a7779-add-SDHI-support-on-DTSI.patch b/patches.renesas/0120-ARM-shmobile-r8a7779-add-SDHI-support-on-DTSI.patch
deleted file mode 100644
index 686c975abc28a..0000000000000
--- a/patches.renesas/0120-ARM-shmobile-r8a7779-add-SDHI-support-on-DTSI.patch
+++ /dev/null
@@ -1,66 +0,0 @@
-From 5b64c1b9114d8460dcc149ed2c4e3192c32faf61 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Thu, 10 Oct 2013 23:36:22 -0700
-Subject: ARM: shmobile: r8a7779: add SDHI support on DTSI
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit c4866e70a92d8d5fd8ea7ad2c64ddf0efa7a0700)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7779.dtsi | 40 ++++++++++++++++++++++++++++++++++++++++
- 1 file changed, 40 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi
-index da61d2708376..be737efb02b6 100644
---- a/arch/arm/boot/dts/r8a7779.dtsi
-+++ b/arch/arm/boot/dts/r8a7779.dtsi
-@@ -206,4 +206,44 @@
- 		interrupt-parent = <&gic>;
- 		interrupts = <0 100 0x4>;
- 	};
-+
-+	sdhi0: sdhi@ffe4c000 {
-+		compatible = "renesas,sdhi-r8a7779";
-+		reg = <0xffe4c000 0x100>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 104 4>;
-+		cap-sd-highspeed;
-+		cap-sdio-irq;
-+		status = "disabled";
-+	};
-+
-+	sdhi1: sdhi@ffe4d000 {
-+		compatible = "renesas,sdhi-r8a7779";
-+		reg = <0xffe4d000 0x100>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 105 4>;
-+		cap-sd-highspeed;
-+		cap-sdio-irq;
-+		status = "disabled";
-+	};
-+
-+	sdhi2: sdhi@ffe4e000 {
-+		compatible = "renesas,sdhi-r8a7779";
-+		reg = <0xffe4e000 0x100>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 107 4>;
-+		cap-sd-highspeed;
-+		cap-sdio-irq;
-+		status = "disabled";
-+	};
-+
-+	sdhi3: sdhi@ffe4f000 {
-+		compatible = "renesas,sdhi-r8a7779";
-+		reg = <0xffe4f000 0x100>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 106 4>;
-+		cap-sd-highspeed;
-+		cap-sdio-irq;
-+		status = "disabled";
-+	};
- };
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0121-ARM-shmobile-ap4evb-Register-pinctrl-mapping-for-FSI.patch b/patches.renesas/0121-ARM-shmobile-ap4evb-Register-pinctrl-mapping-for-FSI.patch
deleted file mode 100644
index fd616b2e477b1..0000000000000
--- a/patches.renesas/0121-ARM-shmobile-ap4evb-Register-pinctrl-mapping-for-FSI.patch
+++ /dev/null
@@ -1,62 +0,0 @@
-From b76ba88f0eb5f1466e5cc528bffbd57afadacdd0 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 19 Apr 2013 13:29:48 +0200
-Subject: ARM: shmobile: ap4evb: Register pinctrl mapping for FSI
-
-Replace the GPIO-based FSI pinmux configuration by a pinctrl mapping.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit d2e0ca63a892b761d9d87bd709d696c29afb557c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-ap4evb.c | 19 ++++++++++++-------
- 1 file changed, 12 insertions(+), 7 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c
-index f42e731e..2f036856 100644
---- a/arch/arm/mach-shmobile/board-ap4evb.c
-+++ b/arch/arm/mach-shmobile/board-ap4evb.c
-@@ -1089,6 +1089,16 @@ static const struct pinctrl_map ap4evb_pinctrl_map[] = {
- 	/* CEU */
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_ceu.0", "pfc-sh7372",
- 				  "ceu_clk_0", "ceu"),
-+	/* FSIA (AK4643) */
-+	PIN_MAP_MUX_GROUP_DEFAULT("asoc-simple-card.0", "pfc-sh7372",
-+				  "fsia_sclk_in", "fsia"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("asoc-simple-card.0", "pfc-sh7372",
-+				  "fsia_data_in", "fsia"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("asoc-simple-card.0", "pfc-sh7372",
-+				  "fsia_data_out", "fsia"),
-+	/* FSIB (HDMI) */
-+	PIN_MAP_MUX_GROUP_DEFAULT("asoc-simple-card.1", "pfc-sh7372",
-+				  "fsib_mclk_in", "fsib"),
- 	/* MMCIF */
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh7372",
- 				  "mmc0_data8_0", "mmc0"),
-@@ -1165,11 +1175,7 @@ static void __init ap4evb_init(void)
- 	/* setup USB phy */
- 	__raw_writew(0x8a0a, IOMEM(0xE6058130));	/* USBCR4 */
- 
--	/* enable FSI2 port A (ak4643) */
--	gpio_request(GPIO_FN_FSIAIBT,	NULL);
--	gpio_request(GPIO_FN_FSIAILR,	NULL);
--	gpio_request(GPIO_FN_FSIAISLD,	NULL);
--	gpio_request(GPIO_FN_FSIAOSLD,	NULL);
-+	/* FSI2 port A (ak4643) */
- 	gpio_request_one(161, GPIOF_OUT_INIT_LOW, NULL); /* slave */
- 
- 	gpio_request(9, NULL);
-@@ -1180,8 +1186,7 @@ static void __init ap4evb_init(void)
- 	/* card detect pin for MMC slot (CN7) */
- 	gpio_request_one(41, GPIOF_IN, NULL);
- 
--	/* setup FSI2 port B (HDMI) */
--	gpio_request(GPIO_FN_FSIBCK, NULL);
-+	/* FSI2 port B (HDMI) */
- 	__raw_writew(__raw_readw(USCCR1) & ~(1 << 6), USCCR1); /* use SPDIF */
- 
- 	/* set SPU2 clock to 119.6 MHz */
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0121-ARM-shmobile-marzen-add-SDHI-support-on-DTS.patch b/patches.renesas/0121-ARM-shmobile-marzen-add-SDHI-support-on-DTS.patch
deleted file mode 100644
index 0453935b96e09..0000000000000
--- a/patches.renesas/0121-ARM-shmobile-marzen-add-SDHI-support-on-DTS.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-From 08f00b0c17bb8399c744193bc7fc452d8b61580e Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Thu, 10 Oct 2013 23:36:44 -0700
-Subject: ARM: shmobile: marzen: add SDHI support on DTS
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 00bf591c3faae65eb00cc8b1ce7ede08b4ccc067)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7779-marzen-reference.dts | 11 ++++++++++-
- 1 file changed, 10 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/boot/dts/r8a7779-marzen-reference.dts b/arch/arm/boot/dts/r8a7779-marzen-reference.dts
-index ab4110aa3c3b..f7578d5fd44a 100644
---- a/arch/arm/boot/dts/r8a7779-marzen-reference.dts
-+++ b/arch/arm/boot/dts/r8a7779-marzen-reference.dts
-@@ -68,7 +68,7 @@
- };
- 
- &pfc {
--	pinctrl-0 = <&scif2_pins &scif4_pins &sdhi0_pins>;
-+	pinctrl-0 = <&scif2_pins &scif4_pins>;
- 	pinctrl-names = "default";
- 
- 	lan0_pins: lan0 {
-@@ -98,3 +98,12 @@
- 		renesas,function = "sdhi0";
- 	};
- };
-+
-+&sdhi0 {
-+	pinctrl-0 = <&sdhi0_pins>;
-+	pinctrl-names = "default";
-+
-+	vmmc-supply = <&fixedregulator3v3>;
-+	bus-width = <4>;
-+	status = "okay";
-+};
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0121-ARM-shmobile-r8a7779-Rename-DU-device-in-clock-looku.patch b/patches.renesas/0121-ARM-shmobile-r8a7779-Rename-DU-device-in-clock-looku.patch
deleted file mode 100644
index 470f2ac492ca3..0000000000000
--- a/patches.renesas/0121-ARM-shmobile-r8a7779-Rename-DU-device-in-clock-looku.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From 9b031780c5f1e5313c42c6f2fb12ce2fd73edad2 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 8 Aug 2013 04:25:00 +0200
-Subject: ARM: shmobile: r8a7779: Rename DU device in clock lookups list
-
-The DU device will be called rcar-du-r8a7779. Rename the clock lookup
-entry accordingly.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit acf47ee741c4a5eb8a17438e8858f1cffa1e073a)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r8a7779.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a7779.c b/arch/arm/mach-shmobile/clock-r8a7779.c
-index bd6ad922eb7e..1f7080fab0a5 100644
---- a/arch/arm/mach-shmobile/clock-r8a7779.c
-+++ b/arch/arm/mach-shmobile/clock-r8a7779.c
-@@ -200,7 +200,7 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP322]), /* SDHI1 */
- 	CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP321]), /* SDHI2 */
- 	CLKDEV_DEV_ID("sh_mobile_sdhi.3", &mstp_clks[MSTP320]), /* SDHI3 */
--	CLKDEV_DEV_ID("rcar-du.0", &mstp_clks[MSTP103]), /* DU */
-+	CLKDEV_DEV_ID("rcar-du-r8a7779", &mstp_clks[MSTP103]), /* DU */
- };
- 
- void __init r8a7779_clock_init(void)
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0122-ARM-shmobile-ap4evb-Register-pinctrl-mapping-for-HDM.patch b/patches.renesas/0122-ARM-shmobile-ap4evb-Register-pinctrl-mapping-for-HDM.patch
deleted file mode 100644
index ccc237156c1a7..0000000000000
--- a/patches.renesas/0122-ARM-shmobile-ap4evb-Register-pinctrl-mapping-for-HDM.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-From 2af865d7f4ab164adf65b7f94f86d1118e99ccac Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 19 Apr 2013 13:29:48 +0200
-Subject: ARM: shmobile: ap4evb: Register pinctrl mapping for HDMI
-
-Replace the GPIO-based HDMI pinmux configuration by a pinctrl mapping.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit d9aa3005e5eed457097a392dcab72ba3fbc55911)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-ap4evb.c | 7 +++----
- 1 file changed, 3 insertions(+), 4 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c
-index 2f036856..2dfa235b 100644
---- a/arch/arm/mach-shmobile/board-ap4evb.c
-+++ b/arch/arm/mach-shmobile/board-ap4evb.c
-@@ -1099,6 +1099,9 @@ static const struct pinctrl_map ap4evb_pinctrl_map[] = {
- 	/* FSIB (HDMI) */
- 	PIN_MAP_MUX_GROUP_DEFAULT("asoc-simple-card.1", "pfc-sh7372",
- 				  "fsib_mclk_in", "fsib"),
-+	/* HDMI */
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh-mobile-hdmi", "pfc-sh7372",
-+				  "hdmi", "hdmi"),
- 	/* MMCIF */
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh7372",
- 				  "mmc0_data8_0", "mmc0"),
-@@ -1305,10 +1308,6 @@ static void __init ap4evb_init(void)
- 
- 	sh7372_add_standard_devices();
- 
--	/* HDMI */
--	gpio_request(GPIO_FN_HDMI_HPD, NULL);
--	gpio_request(GPIO_FN_HDMI_CEC, NULL);
--
- 	/* Reset HDMI, must be held at least one EXTALR (32768Hz) period */
- #define SRCR4 IOMEM(0xe61580bc)
- 	srcr4 = __raw_readl(SRCR4);
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0122-ARM-shmobile-r8a7740-tidyup-DT-node-naming.patch b/patches.renesas/0122-ARM-shmobile-r8a7740-tidyup-DT-node-naming.patch
deleted file mode 100644
index ea4fd88936652..0000000000000
--- a/patches.renesas/0122-ARM-shmobile-r8a7740-tidyup-DT-node-naming.patch
+++ /dev/null
@@ -1,98 +0,0 @@
-From 9d577d7bf1a134623b21337ae38459e73aab56a5 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Mon, 21 Oct 2013 19:35:08 -0700
-Subject: ARM: shmobile: r8a7740: tidyup DT node naming
-
-According to ePAPR spec,
-this patch tidies up DT node name and related clock.
-
-This patch also adds missing SDHI2 entry
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 7d907894bfe3848a033aa19a2dbb12105300b8e5)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7740.dtsi         | 18 +++++++++++++++---
- arch/arm/mach-shmobile/clock-r8a7740.c |  8 ++++----
- 2 files changed, 19 insertions(+), 7 deletions(-)
-
-diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi
-index ae1e230f711d..4cc945a799bb 100644
---- a/arch/arm/boot/dts/r8a7740.dtsi
-+++ b/arch/arm/boot/dts/r8a7740.dtsi
-@@ -162,7 +162,7 @@
- 		#pwm-cells = <3>;
- 	};
- 
--	mmcif0: mmcif@e6bd0000 {
-+	mmcif0: mmc@e6bd0000 {
- 		compatible = "renesas,sh-mmcif";
- 		reg = <0xe6bd0000 0x100>;
- 		interrupt-parent = <&gic>;
-@@ -171,7 +171,7 @@
- 		status = "disabled";
- 	};
- 
--	sdhi0: sdhi@e6850000 {
-+	sdhi0: sd@e6850000 {
- 		compatible = "renesas,sdhi-r8a7740";
- 		reg = <0xe6850000 0x100>;
- 		interrupt-parent = <&gic>;
-@@ -183,7 +183,7 @@
- 		status = "disabled";
- 	};
- 
--	sdhi1: sdhi@e6860000 {
-+	sdhi1: sd@e6860000 {
- 		compatible = "renesas,sdhi-r8a7740";
- 		reg = <0xe6860000 0x100>;
- 		interrupt-parent = <&gic>;
-@@ -194,4 +194,16 @@
- 		cap-sdio-irq;
- 		status = "disabled";
- 	};
-+
-+	sdhi2: sd@e6870000 {
-+		compatible = "renesas,sdhi-r8a7740";
-+		reg = <0xe6870000 0x100>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 125 4
-+				0 126 4
-+				0 127 4>;
-+		cap-sd-highspeed;
-+		cap-sdio-irq;
-+		status = "disabled";
-+	};
- };
-diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c
-index e9a3c6401845..dd989f93498f 100644
---- a/arch/arm/mach-shmobile/clock-r8a7740.c
-+++ b/arch/arm/mach-shmobile/clock-r8a7740.c
-@@ -590,18 +590,18 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_DEV_ID("e6c20000.i2c",		&mstp_clks[MSTP323]),
- 	CLKDEV_DEV_ID("renesas_usbhs",		&mstp_clks[MSTP320]),
- 	CLKDEV_DEV_ID("sh_mobile_sdhi.0",	&mstp_clks[MSTP314]),
--	CLKDEV_DEV_ID("e6850000.sdhi",          &mstp_clks[MSTP314]),
-+	CLKDEV_DEV_ID("e6850000.sd",		&mstp_clks[MSTP314]),
- 	CLKDEV_DEV_ID("sh_mobile_sdhi.1",	&mstp_clks[MSTP313]),
--	CLKDEV_DEV_ID("e6860000.sdhi",          &mstp_clks[MSTP313]),
-+	CLKDEV_DEV_ID("e6860000.sd",		&mstp_clks[MSTP313]),
- 	CLKDEV_DEV_ID("sh_mmcif",		&mstp_clks[MSTP312]),
--	CLKDEV_DEV_ID("e6bd0000.mmcif",         &mstp_clks[MSTP312]),
-+	CLKDEV_DEV_ID("e6bd0000.mmc",		&mstp_clks[MSTP312]),
- 	CLKDEV_DEV_ID("r8a7740-gether",		&mstp_clks[MSTP309]),
- 	CLKDEV_DEV_ID("e9a00000.sh-eth",	&mstp_clks[MSTP309]),
- 	CLKDEV_DEV_ID("renesas-tpu-pwm",	&mstp_clks[MSTP304]),
- 	CLKDEV_DEV_ID("e6600000.pwm",		&mstp_clks[MSTP304]),
- 
- 	CLKDEV_DEV_ID("sh_mobile_sdhi.2",	&mstp_clks[MSTP415]),
--	CLKDEV_DEV_ID("e6870000.sdhi",          &mstp_clks[MSTP415]),
-+	CLKDEV_DEV_ID("e6870000.sd",		&mstp_clks[MSTP415]),
- 
- 	/* ICK */
- 	CLKDEV_ICK_ID("host",	"renesas_usbhs",	&mstp_clks[MSTP416]),
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0122-ARM-shmobile-r8a7790-Add-DU-and-LVDS-clocks.patch b/patches.renesas/0122-ARM-shmobile-r8a7790-Add-DU-and-LVDS-clocks.patch
deleted file mode 100644
index f369f327344ad..0000000000000
--- a/patches.renesas/0122-ARM-shmobile-r8a7790-Add-DU-and-LVDS-clocks.patch
+++ /dev/null
@@ -1,54 +0,0 @@
-From a334d931b59164743fe2ed0485b1fbfefb4ba722 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 17 Apr 2013 11:33:56 +0200
-Subject: ARM: shmobile: r8a7790: Add DU and LVDS clocks
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 9d8907c4e8c97127c562055ac7e1a8ea39ea589c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r8a7790.c | 12 +++++++++++-
- 1 file changed, 11 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
-index fc36d3db0b4d..d99b87bc76ea 100644
---- a/arch/arm/mach-shmobile/clock-r8a7790.c
-+++ b/arch/arm/mach-shmobile/clock-r8a7790.c
-@@ -182,7 +182,7 @@ static struct clk div6_clks[DIV6_NR] = {
- /* MSTP */
- enum {
- 	MSTP813,
--	MSTP721, MSTP720,
-+	MSTP726, MSTP725, MSTP724, MSTP723, MSTP722, MSTP721, MSTP720,
- 	MSTP717, MSTP716,
- 	MSTP522,
- 	MSTP315, MSTP314, MSTP313, MSTP312, MSTP311, MSTP305, MSTP304,
-@@ -193,6 +193,11 @@ enum {
- 
- static struct clk mstp_clks[MSTP_NR] = {
- 	[MSTP813] = SH_CLK_MSTP32(&p_clk, SMSTPCR8, 13, 0), /* Ether */
-+	[MSTP726] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 26, 0), /* LVDS0 */
-+	[MSTP725] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 25, 0), /* LVDS1 */
-+	[MSTP724] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 24, 0), /* DU0 */
-+	[MSTP723] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 23, 0), /* DU1 */
-+	[MSTP722] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 22, 0), /* DU2 */
- 	[MSTP721] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 21, 0), /* SCIF0 */
- 	[MSTP720] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 20, 0), /* SCIF1 */
- 	[MSTP717] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 17, 0), /* HSCIF0 */
-@@ -251,6 +256,11 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_CON_ID("ssprs",		&div6_clks[DIV6_SSPRS]),
- 
- 	/* MSTP */
-+	CLKDEV_ICK_ID("lvds.0", "rcar-du-r8a7790", &mstp_clks[MSTP726]),
-+	CLKDEV_ICK_ID("lvds.1", "rcar-du-r8a7790", &mstp_clks[MSTP725]),
-+	CLKDEV_ICK_ID("du.0", "rcar-du-r8a7790", &mstp_clks[MSTP724]),
-+	CLKDEV_ICK_ID("du.1", "rcar-du-r8a7790", &mstp_clks[MSTP723]),
-+	CLKDEV_ICK_ID("du.2", "rcar-du-r8a7790", &mstp_clks[MSTP722]),
- 	CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]),
- 	CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP203]),
- 	CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP206]),
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0123-ARM-shmobile-ap4evb-Register-pinctrl-mapping-for-KEY.patch b/patches.renesas/0123-ARM-shmobile-ap4evb-Register-pinctrl-mapping-for-KEY.patch
deleted file mode 100644
index 26b7758abb4c4..0000000000000
--- a/patches.renesas/0123-ARM-shmobile-ap4evb-Register-pinctrl-mapping-for-KEY.patch
+++ /dev/null
@@ -1,53 +0,0 @@
-From 014244fab67e612c267ec6dcaa8fc0c9d20593ab Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 19 Apr 2013 13:29:48 +0200
-Subject: ARM: shmobile: ap4evb: Register pinctrl mapping for KEYSC
-
-Replace the GPIO-based KEYSC pinmux configuration by a pinctrl mapping.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 6cd49f71a420cfab69e0b208052b7a39f5642262)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-ap4evb.c | 17 +++++------------
- 1 file changed, 5 insertions(+), 12 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c
-index 2dfa235b..c7a9efc5 100644
---- a/arch/arm/mach-shmobile/board-ap4evb.c
-+++ b/arch/arm/mach-shmobile/board-ap4evb.c
-@@ -1102,6 +1102,11 @@ static const struct pinctrl_map ap4evb_pinctrl_map[] = {
- 	/* HDMI */
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh-mobile-hdmi", "pfc-sh7372",
- 				  "hdmi", "hdmi"),
-+	/* KEYSC */
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc", "pfc-sh7372",
-+				  "keysc_in04_0", "keysc"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc", "pfc-sh7372",
-+				  "keysc_out5", "keysc"),
- 	/* MMCIF */
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh7372",
- 				  "mmc0_data8_0", "mmc0"),
-@@ -1219,18 +1224,6 @@ static void __init ap4evb_init(void)
- 	 * IRQ28 for Touch Panel, set dip switches S3, S43 as OFF, ON.
- 	 */
- 
--	/* enable KEYSC */
--	gpio_request(GPIO_FN_KEYOUT0, NULL);
--	gpio_request(GPIO_FN_KEYOUT1, NULL);
--	gpio_request(GPIO_FN_KEYOUT2, NULL);
--	gpio_request(GPIO_FN_KEYOUT3, NULL);
--	gpio_request(GPIO_FN_KEYOUT4, NULL);
--	gpio_request(GPIO_FN_KEYIN0_136, NULL);
--	gpio_request(GPIO_FN_KEYIN1_135, NULL);
--	gpio_request(GPIO_FN_KEYIN2_134, NULL);
--	gpio_request(GPIO_FN_KEYIN3_133, NULL);
--	gpio_request(GPIO_FN_KEYIN4,     NULL);
--
- 	/* enable TouchScreen */
- 	irq_set_irq_type(IRQ28, IRQ_TYPE_LEVEL_LOW);
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0123-ARM-shmobile-r8a73a4-tidyup-DT-node-naming.patch b/patches.renesas/0123-ARM-shmobile-r8a73a4-tidyup-DT-node-naming.patch
deleted file mode 100644
index 242f9653010c9..0000000000000
--- a/patches.renesas/0123-ARM-shmobile-r8a73a4-tidyup-DT-node-naming.patch
+++ /dev/null
@@ -1,95 +0,0 @@
-From 88cd034e849658dc1ceb49c2c7b332c80088cbfb Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Mon, 21 Oct 2013 19:35:31 -0700
-Subject: ARM: shmobile: r8a73a4: tidyup DT node naming
-
-According to ePAPR spec,
-this patch tidies up DT node name and related clock.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 43304a5f51066a7ef851732c35b4582a8d6a5bc0)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a73a4.dtsi         | 10 +++++-----
- arch/arm/mach-shmobile/clock-r8a73a4.c | 10 +++++-----
- 2 files changed, 10 insertions(+), 10 deletions(-)
-
-diff --git a/arch/arm/boot/dts/r8a73a4.dtsi b/arch/arm/boot/dts/r8a73a4.dtsi
-index 287e047592a0..e079c994fd70 100644
---- a/arch/arm/boot/dts/r8a73a4.dtsi
-+++ b/arch/arm/boot/dts/r8a73a4.dtsi
-@@ -219,7 +219,7 @@
- 		status = "disabled";
- 	};
- 
--	mmcif0: mmcif@ee200000 {
-+	mmcif0: mmc@ee200000 {
- 		compatible = "renesas,sh-mmcif";
- 		reg = <0 0xee200000 0 0x80>;
- 		interrupt-parent = <&gic>;
-@@ -228,7 +228,7 @@
- 		status = "disabled";
- 	};
- 
--	mmcif1: mmcif@ee220000 {
-+	mmcif1: mmc@ee220000 {
- 		compatible = "renesas,sh-mmcif";
- 		reg = <0 0xee220000 0 0x80>;
- 		interrupt-parent = <&gic>;
-@@ -244,7 +244,7 @@
- 		#gpio-cells = <2>;
- 	};
- 
--	sdhi0: sdhi@ee100000 {
-+	sdhi0: sd@ee100000 {
- 		compatible = "renesas,sdhi-r8a73a4";
- 		reg = <0 0xee100000 0 0x100>;
- 		interrupt-parent = <&gic>;
-@@ -253,7 +253,7 @@
- 		status = "disabled";
- 	};
- 
--	sdhi1: sdhi@ee120000 {
-+	sdhi1: sd@ee120000 {
- 		compatible = "renesas,sdhi-r8a73a4";
- 		reg = <0 0xee120000 0 0x100>;
- 		interrupt-parent = <&gic>;
-@@ -262,7 +262,7 @@
- 		status = "disabled";
- 	};
- 
--	sdhi2: sdhi@ee140000 {
-+	sdhi2: sd@ee140000 {
- 		compatible = "renesas,sdhi-r8a73a4";
- 		reg = <0 0xee140000 0 0x100>;
- 		interrupt-parent = <&gic>;
-diff --git a/arch/arm/mach-shmobile/clock-r8a73a4.c b/arch/arm/mach-shmobile/clock-r8a73a4.c
-index 571409b611d3..7348d58f500e 100644
---- a/arch/arm/mach-shmobile/clock-r8a73a4.c
-+++ b/arch/arm/mach-shmobile/clock-r8a73a4.c
-@@ -584,15 +584,15 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
- 	CLKDEV_DEV_ID("e6520000.i2c", &mstp_clks[MSTP300]),
- 	CLKDEV_DEV_ID("sh_mmcif.1", &mstp_clks[MSTP305]),
--	CLKDEV_DEV_ID("ee220000.mmcif", &mstp_clks[MSTP305]),
-+	CLKDEV_DEV_ID("ee220000.mmc", &mstp_clks[MSTP305]),
- 	CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP312]),
--	CLKDEV_DEV_ID("ee140000.sdhi", &mstp_clks[MSTP312]),
-+	CLKDEV_DEV_ID("ee140000.sd", &mstp_clks[MSTP312]),
- 	CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]),
--	CLKDEV_DEV_ID("ee120000.sdhi", &mstp_clks[MSTP313]),
-+	CLKDEV_DEV_ID("ee120000.sd", &mstp_clks[MSTP313]),
- 	CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]),
--	CLKDEV_DEV_ID("ee100000.sdhi", &mstp_clks[MSTP314]),
-+	CLKDEV_DEV_ID("ee100000.sd", &mstp_clks[MSTP314]),
- 	CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP315]),
--	CLKDEV_DEV_ID("ee200000.mmcif", &mstp_clks[MSTP315]),
-+	CLKDEV_DEV_ID("ee200000.mmc", &mstp_clks[MSTP315]),
- 	CLKDEV_DEV_ID("e6550000.i2c", &mstp_clks[MSTP316]),
- 	CLKDEV_DEV_ID("e6560000.i2c", &mstp_clks[MSTP317]),
- 	CLKDEV_DEV_ID("e6500000.i2c", &mstp_clks[MSTP318]),
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0123-ARM-shmobile-r8a7778-add-SSI-SRU-clock-support.patch b/patches.renesas/0123-ARM-shmobile-r8a7778-add-SSI-SRU-clock-support.patch
deleted file mode 100644
index 8a00b7bc4da43..0000000000000
--- a/patches.renesas/0123-ARM-shmobile-r8a7778-add-SSI-SRU-clock-support.patch
+++ /dev/null
@@ -1,115 +0,0 @@
-From 083e84b0065ca78bd903068d2f6e1f861da1716f Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Mon, 26 Aug 2013 01:51:37 -0700
-Subject: ARM: shmobile: r8a7778: add SSI/SRU clock support
-
-Add a platform clock for the r8a7778 SRU/SSI sound.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit a93c2aaf18e0e10084c099a0ba2460ab8e3c0e05)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r8a7778.c | 43 ++++++++++++++++++++++++++++++++--
- 1 file changed, 41 insertions(+), 2 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a7778.c b/arch/arm/mach-shmobile/clock-r8a7778.c
-index c4bf2d8fb111..244a8dec4d04 100644
---- a/arch/arm/mach-shmobile/clock-r8a7778.c
-+++ b/arch/arm/mach-shmobile/clock-r8a7778.c
-@@ -69,6 +69,15 @@ static struct clk extal_clk = {
- 	.mapping = &cpg_mapping,
- };
- 
-+static struct clk audio_clk_a = {
-+};
-+
-+static struct clk audio_clk_b = {
-+};
-+
-+static struct clk audio_clk_c = {
-+};
-+
- /*
-  * clock ratio of these clock will be updated
-  * on r8a7778_clock_init()
-@@ -100,18 +109,23 @@ static struct clk *main_clks[] = {
- 	&p_clk,
- 	&g_clk,
- 	&z_clk,
-+	&audio_clk_a,
-+	&audio_clk_b,
-+	&audio_clk_c,
- };
- 
- enum {
- 	MSTP331,
- 	MSTP323, MSTP322, MSTP321,
-+	MSTP311, MSTP310,
-+	MSTP309, MSTP308, MSTP307,
- 	MSTP114,
- 	MSTP110, MSTP109,
- 	MSTP100,
- 	MSTP030,
- 	MSTP029, MSTP028, MSTP027, MSTP026, MSTP025, MSTP024, MSTP023, MSTP022, MSTP021,
--	MSTP016, MSTP015,
--	MSTP007,
-+	MSTP016, MSTP015, MSTP012, MSTP011, MSTP010,
-+	MSTP009, MSTP008, MSTP007,
- 	MSTP_NR };
- 
- static struct clk mstp_clks[MSTP_NR] = {
-@@ -119,6 +133,11 @@ static struct clk mstp_clks[MSTP_NR] = {
- 	[MSTP323] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 23, 0), /* SDHI0 */
- 	[MSTP322] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 22, 0), /* SDHI1 */
- 	[MSTP321] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 21, 0), /* SDHI2 */
-+	[MSTP311] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 11, 0), /* SSI4 */
-+	[MSTP310] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 10, 0), /* SSI5 */
-+	[MSTP309] = SH_CLK_MSTP32(&p_clk, MSTPCR3,  9, 0), /* SSI6 */
-+	[MSTP308] = SH_CLK_MSTP32(&p_clk, MSTPCR3,  8, 0), /* SSI7 */
-+	[MSTP307] = SH_CLK_MSTP32(&p_clk, MSTPCR3,  7, 0), /* SSI8 */
- 	[MSTP114] = SH_CLK_MSTP32(&p_clk, MSTPCR1, 14, 0), /* Ether */
- 	[MSTP110] = SH_CLK_MSTP32(&s_clk, MSTPCR1, 10, 0), /* VIN0 */
- 	[MSTP109] = SH_CLK_MSTP32(&s_clk, MSTPCR1,  9, 0), /* VIN1 */
-@@ -135,11 +154,20 @@ static struct clk mstp_clks[MSTP_NR] = {
- 	[MSTP021] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 21, 0), /* SCIF5 */
- 	[MSTP016] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 16, 0), /* TMU0 */
- 	[MSTP015] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 15, 0), /* TMU1 */
-+	[MSTP012] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 12, 0), /* SSI0 */
-+	[MSTP011] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 11, 0), /* SSI1 */
-+	[MSTP010] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 10, 0), /* SSI2 */
-+	[MSTP009] = SH_CLK_MSTP32(&p_clk, MSTPCR0,  9, 0), /* SSI3 */
-+	[MSTP008] = SH_CLK_MSTP32(&p_clk, MSTPCR0,  8, 0), /* SRU */
- 	[MSTP007] = SH_CLK_MSTP32(&p_clk, MSTPCR0,  7, 0), /* HSPI */
- };
- 
- static struct clk_lookup lookups[] = {
- 	/* main */
-+	CLKDEV_CON_ID("audio_clk_a",	&audio_clk_a),
-+	CLKDEV_CON_ID("audio_clk_b",	&audio_clk_b),
-+	CLKDEV_CON_ID("audio_clk_c",	&audio_clk_c),
-+	CLKDEV_CON_ID("audio_clk_internal",	&s1_clk),
- 	CLKDEV_CON_ID("shyway_clk",	&s_clk),
- 	CLKDEV_CON_ID("peripheral_clk",	&p_clk),
- 
-@@ -168,6 +196,17 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_DEV_ID("sh-hspi.0", &mstp_clks[MSTP007]), /* HSPI0 */
- 	CLKDEV_DEV_ID("sh-hspi.1", &mstp_clks[MSTP007]), /* HSPI1 */
- 	CLKDEV_DEV_ID("sh-hspi.2", &mstp_clks[MSTP007]), /* HSPI2 */
-+	CLKDEV_DEV_ID("rcar_sound", &mstp_clks[MSTP008]), /* SRU */
-+
-+	CLKDEV_ICK_ID("ssi.0", "rcar_sound", &mstp_clks[MSTP012]),
-+	CLKDEV_ICK_ID("ssi.1", "rcar_sound", &mstp_clks[MSTP011]),
-+	CLKDEV_ICK_ID("ssi.2", "rcar_sound", &mstp_clks[MSTP010]),
-+	CLKDEV_ICK_ID("ssi.3", "rcar_sound", &mstp_clks[MSTP009]),
-+	CLKDEV_ICK_ID("ssi.4", "rcar_sound", &mstp_clks[MSTP311]),
-+	CLKDEV_ICK_ID("ssi.5", "rcar_sound", &mstp_clks[MSTP310]),
-+	CLKDEV_ICK_ID("ssi.6", "rcar_sound", &mstp_clks[MSTP309]),
-+	CLKDEV_ICK_ID("ssi.7", "rcar_sound", &mstp_clks[MSTP308]),
-+	CLKDEV_ICK_ID("ssi.8", "rcar_sound", &mstp_clks[MSTP307]),
- };
- 
- void __init r8a7778_clock_init(void)
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0124-ARM-shmobile-ap4evb-Register-pinctrl-mapping-for-LCD.patch b/patches.renesas/0124-ARM-shmobile-ap4evb-Register-pinctrl-mapping-for-LCD.patch
deleted file mode 100644
index 63503dc9d9e7e..0000000000000
--- a/patches.renesas/0124-ARM-shmobile-ap4evb-Register-pinctrl-mapping-for-LCD.patch
+++ /dev/null
@@ -1,65 +0,0 @@
-From a3f1d7e921e56f833ad954d1917a6dbb633f68f0 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 19 Apr 2013 13:29:48 +0200
-Subject: ARM: shmobile: ap4evb: Register pinctrl mapping for LCD
-
-Replace the GPIO-based LCD pinmux configuration by a pinctrl mapping.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 8b53e595524ba7298d8b9a91f408884de8a31fe0)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-ap4evb.c | 29 +++++++----------------------
- 1 file changed, 7 insertions(+), 22 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c
-index c7a9efc5..c6e1e448 100644
---- a/arch/arm/mach-shmobile/board-ap4evb.c
-+++ b/arch/arm/mach-shmobile/board-ap4evb.c
-@@ -1107,6 +1107,13 @@ static const struct pinctrl_map ap4evb_pinctrl_map[] = {
- 				  "keysc_in04_0", "keysc"),
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc", "pfc-sh7372",
- 				  "keysc_out5", "keysc"),
-+#ifndef CONFIG_AP4EVB_QHD
-+	/* LCDC */
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_lcdc_fb.0", "pfc-sh7372",
-+				  "lcd_data18", "lcd"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_lcdc_fb.0", "pfc-sh7372",
-+				  "lcd_sync", "lcd"),
-+#endif
- 	/* MMCIF */
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh7372",
- 				  "mmc0_data8_0", "mmc0"),
-@@ -1245,28 +1252,6 @@ static void __init ap4evb_init(void)
- 	 * For WVGA Panel (18-bit RGB, CONFIG_AP4EVB_WVGA=y) and
- 	 * IRQ7 for Touch Panel, set dip switches S3, S43 to ON, OFF.
- 	 */
--
--	gpio_request(GPIO_FN_LCDD17,   NULL);
--	gpio_request(GPIO_FN_LCDD16,   NULL);
--	gpio_request(GPIO_FN_LCDD15,   NULL);
--	gpio_request(GPIO_FN_LCDD14,   NULL);
--	gpio_request(GPIO_FN_LCDD13,   NULL);
--	gpio_request(GPIO_FN_LCDD12,   NULL);
--	gpio_request(GPIO_FN_LCDD11,   NULL);
--	gpio_request(GPIO_FN_LCDD10,   NULL);
--	gpio_request(GPIO_FN_LCDD9,    NULL);
--	gpio_request(GPIO_FN_LCDD8,    NULL);
--	gpio_request(GPIO_FN_LCDD7,    NULL);
--	gpio_request(GPIO_FN_LCDD6,    NULL);
--	gpio_request(GPIO_FN_LCDD5,    NULL);
--	gpio_request(GPIO_FN_LCDD4,    NULL);
--	gpio_request(GPIO_FN_LCDD3,    NULL);
--	gpio_request(GPIO_FN_LCDD2,    NULL);
--	gpio_request(GPIO_FN_LCDD1,    NULL);
--	gpio_request(GPIO_FN_LCDD0,    NULL);
--	gpio_request(GPIO_FN_LCDDISP,  NULL);
--	gpio_request(GPIO_FN_LCDDCK,   NULL);
--
- 	gpio_request_one(189, GPIOF_OUT_INIT_HIGH, NULL); /* backlight */
- 	gpio_request_one(151, GPIOF_OUT_INIT_HIGH, NULL); /* LCDDON */
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0124-ARM-shmobile-marzen-Select-DRM_RCAR_DU-in-defconfig.patch b/patches.renesas/0124-ARM-shmobile-marzen-Select-DRM_RCAR_DU-in-defconfig.patch
deleted file mode 100644
index ff8bc6b701d43..0000000000000
--- a/patches.renesas/0124-ARM-shmobile-marzen-Select-DRM_RCAR_DU-in-defconfig.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From 7293c14f3307fcf77c18da0a560bfaafe243ffd3 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 8 Aug 2013 00:45:12 +0200
-Subject: ARM: shmobile: marzen: Select DRM_RCAR_DU in defconfig
-
-A R-Car DU DRM device is registered for the Marzen board, select the
-corresponding driver in its defconfig.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 7525e87b468a1b2d8e3f0156e36acd8992af673c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/configs/marzen_defconfig | 2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/arch/arm/configs/marzen_defconfig b/arch/arm/configs/marzen_defconfig
-index 000e9205b2b9..5cc6360340b1 100644
---- a/arch/arm/configs/marzen_defconfig
-+++ b/arch/arm/configs/marzen_defconfig
-@@ -92,6 +92,8 @@ CONFIG_SOC_CAMERA=y
- CONFIG_VIDEO_RCAR_VIN=y
- # CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set
- CONFIG_VIDEO_ADV7180=y
-+CONFIG_DRM=y
-+CONFIG_DRM_RCAR_DU=y
- CONFIG_USB=y
- CONFIG_USB_RCAR_PHY=y
- CONFIG_MMC=y
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0124-ARM-shmobile-r8a7778-tidyup-DT-node-naming.patch b/patches.renesas/0124-ARM-shmobile-r8a7778-tidyup-DT-node-naming.patch
deleted file mode 100644
index 2999088db55dc..0000000000000
--- a/patches.renesas/0124-ARM-shmobile-r8a7778-tidyup-DT-node-naming.patch
+++ /dev/null
@@ -1,83 +0,0 @@
-From 2dc368933b3f7d105a0dc9ed3a12022dbf03a4c5 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Mon, 21 Oct 2013 19:35:42 -0700
-Subject: ARM: shmobile: r8a7778: tidyup DT node naming
-
-According to ePAPR spec,
-this patch tidies up DT node name and related clock.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 14e1d9147d96e0e6cc7f14eb339a7754404b4b73)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7778.dtsi         | 8 ++++----
- arch/arm/mach-shmobile/clock-r8a7778.c | 8 ++++----
- 2 files changed, 8 insertions(+), 8 deletions(-)
-
-diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi
-index 873eeb903b2e..ca88b3bc78e0 100644
---- a/arch/arm/boot/dts/r8a7778.dtsi
-+++ b/arch/arm/boot/dts/r8a7778.dtsi
-@@ -157,7 +157,7 @@
- 		status = "disabled";
- 	};
- 
--	mmcif: mmcif@ffe4e000 {
-+	mmcif: mmc@ffe4e000 {
- 		compatible = "renesas,sh-mmcif";
- 		reg = <0xffe4e000 0x100>;
- 		interrupt-parent = <&gic>;
-@@ -165,7 +165,7 @@
- 		status = "disabled";
- 	};
- 
--	sdhi0: sdhi@ffe4c000 {
-+	sdhi0: sd@ffe4c000 {
- 		compatible = "renesas,sdhi-r8a7778";
- 		reg = <0xffe4c000 0x100>;
- 		interrupt-parent = <&gic>;
-@@ -175,7 +175,7 @@
- 		status = "disabled";
- 	};
- 
--	sdhi1: sdhi@ffe4d000 {
-+	sdhi1: sd@ffe4d000 {
- 		compatible = "renesas,sdhi-r8a7778";
- 		reg = <0xffe4d000 0x100>;
- 		interrupt-parent = <&gic>;
-@@ -185,7 +185,7 @@
- 		status = "disabled";
- 	};
- 
--	sdhi2: sdhi@ffe4f000 {
-+	sdhi2: sd@ffe4f000 {
- 		compatible = "renesas,sdhi-r8a7778";
- 		reg = <0xffe4f000 0x100>;
- 		interrupt-parent = <&gic>;
-diff --git a/arch/arm/mach-shmobile/clock-r8a7778.c b/arch/arm/mach-shmobile/clock-r8a7778.c
-index 54064346dafb..4b601bf4ede4 100644
---- a/arch/arm/mach-shmobile/clock-r8a7778.c
-+++ b/arch/arm/mach-shmobile/clock-r8a7778.c
-@@ -173,13 +173,13 @@ static struct clk_lookup lookups[] = {
- 
- 	/* MSTP32 clocks */
- 	CLKDEV_DEV_ID("sh_mmcif", &mstp_clks[MSTP331]), /* MMC */
--	CLKDEV_DEV_ID("ffe4e000.mmcif", &mstp_clks[MSTP331]), /* MMC */
-+	CLKDEV_DEV_ID("ffe4e000.mmc", &mstp_clks[MSTP331]), /* MMC */
- 	CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP323]), /* SDHI0 */
--	CLKDEV_DEV_ID("ffe4c000.sdhi", &mstp_clks[MSTP323]), /* SDHI0 */
-+	CLKDEV_DEV_ID("ffe4c000.sd", &mstp_clks[MSTP323]), /* SDHI0 */
- 	CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP322]), /* SDHI1 */
--	CLKDEV_DEV_ID("ffe4d000.sdhi", &mstp_clks[MSTP322]), /* SDHI1 */
-+	CLKDEV_DEV_ID("ffe4d000.sd", &mstp_clks[MSTP322]), /* SDHI1 */
- 	CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP321]), /* SDHI2 */
--	CLKDEV_DEV_ID("ffe4f000.sdhi", &mstp_clks[MSTP321]), /* SDHI2 */
-+	CLKDEV_DEV_ID("ffe4f000.sd", &mstp_clks[MSTP321]), /* SDHI2 */
- 	CLKDEV_DEV_ID("r8a777x-ether", &mstp_clks[MSTP114]), /* Ether */
- 	CLKDEV_DEV_ID("r8a7778-vin.0", &mstp_clks[MSTP110]), /* VIN0 */
- 	CLKDEV_DEV_ID("r8a7778-vin.1", &mstp_clks[MSTP109]), /* VIN1 */
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0125-ARM-shmobile-ap4evb-Register-pinctrl-mapping-for-SCI.patch b/patches.renesas/0125-ARM-shmobile-ap4evb-Register-pinctrl-mapping-for-SCI.patch
deleted file mode 100644
index a989c336394bf..0000000000000
--- a/patches.renesas/0125-ARM-shmobile-ap4evb-Register-pinctrl-mapping-for-SCI.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-From 1d40a68cded35f3569b25b95a607a4d8471e5db1 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 19 Apr 2013 13:29:48 +0200
-Subject: ARM: shmobile: ap4evb: Register pinctrl mapping for SCIF
-
-Replace the GPIO-based SCIF pinmux configuration by a pinctrl mapping.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 09f2780de9fe5838b1b21d79897676e2b0d54e00)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-ap4evb.c | 7 +++----
- 1 file changed, 3 insertions(+), 4 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c
-index c6e1e448..31639832 100644
---- a/arch/arm/mach-shmobile/board-ap4evb.c
-+++ b/arch/arm/mach-shmobile/board-ap4evb.c
-@@ -1119,6 +1119,9 @@ static const struct pinctrl_map ap4evb_pinctrl_map[] = {
- 				  "mmc0_data8_0", "mmc0"),
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh7372",
- 				  "mmc0_ctrl_0", "mmc0"),
-+	/* SCIFA0 */
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-sh7372",
-+				  "scifa0_data", "scifa0"),
- 	/* SDHI0 */
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh7372",
- 				  "sdhi0_data4", "sdhi0"),
-@@ -1165,10 +1168,6 @@ static void __init ap4evb_init(void)
- 				  ARRAY_SIZE(ap4evb_pinctrl_map));
- 	sh7372_pinmux_init();
- 
--	/* enable SCIFA0 */
--	gpio_request(GPIO_FN_SCIFA0_TXD, NULL);
--	gpio_request(GPIO_FN_SCIFA0_RXD, NULL);
--
- 	/* enable SMSC911X */
- 	gpio_request(GPIO_FN_CS5A,	NULL);
- 	gpio_request(GPIO_FN_IRQ6_39,	NULL);
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0125-ARM-shmobile-lager-Select-DRM_RCAR_DU-in-defconfig.patch b/patches.renesas/0125-ARM-shmobile-lager-Select-DRM_RCAR_DU-in-defconfig.patch
deleted file mode 100644
index baee917a40229..0000000000000
--- a/patches.renesas/0125-ARM-shmobile-lager-Select-DRM_RCAR_DU-in-defconfig.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From 2b7a8236ad17a2ed51be0aa1c73e16264f452c6a Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 8 Aug 2013 00:47:57 +0200
-Subject: ARM: shmobile: lager: Select DRM_RCAR_DU in defconfig
-
-A R-Car DU DRM device is registered for the Lager board, select the
-corresponding driver in its defconfig.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 57601184cefb36db8c1959d277918bdabb6b1c64)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/configs/lager_defconfig | 2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/arch/arm/configs/lager_defconfig b/arch/arm/configs/lager_defconfig
-index e777ef22b801..35bff5e0d57a 100644
---- a/arch/arm/configs/lager_defconfig
-+++ b/arch/arm/configs/lager_defconfig
-@@ -89,6 +89,8 @@ CONFIG_THERMAL=y
- CONFIG_RCAR_THERMAL=y
- CONFIG_REGULATOR=y
- CONFIG_REGULATOR_FIXED_VOLTAGE=y
-+CONFIG_DRM=y
-+CONFIG_DRM_RCAR_DU=y
- # CONFIG_USB_SUPPORT is not set
- CONFIG_MMC=y
- CONFIG_MMC_SDHI=y
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0125-ARM-shmobile-r8a7779-tidyup-DT-node-naming.patch b/patches.renesas/0125-ARM-shmobile-r8a7779-tidyup-DT-node-naming.patch
deleted file mode 100644
index 3db07f76831f8..0000000000000
--- a/patches.renesas/0125-ARM-shmobile-r8a7779-tidyup-DT-node-naming.patch
+++ /dev/null
@@ -1,83 +0,0 @@
-From 4fbcf56bcfe039ca0c8c928f90d192eda681cacf Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Mon, 21 Oct 2013 19:36:02 -0700
-Subject: ARM: shmobile: r8a7779: tidyup DT node naming
-
-According to ePAPR spec,
-this patch tidies up DT node name and related clock.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 2624705ceb7b139cffdb409682d3e1bc480abec7)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7779.dtsi         | 8 ++++----
- arch/arm/mach-shmobile/clock-r8a7779.c | 8 ++++----
- 2 files changed, 8 insertions(+), 8 deletions(-)
-
-diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi
-index be737efb02b6..05fd41c6012f 100644
---- a/arch/arm/boot/dts/r8a7779.dtsi
-+++ b/arch/arm/boot/dts/r8a7779.dtsi
-@@ -207,7 +207,7 @@
- 		interrupts = <0 100 0x4>;
- 	};
- 
--	sdhi0: sdhi@ffe4c000 {
-+	sdhi0: sd@ffe4c000 {
- 		compatible = "renesas,sdhi-r8a7779";
- 		reg = <0xffe4c000 0x100>;
- 		interrupt-parent = <&gic>;
-@@ -217,7 +217,7 @@
- 		status = "disabled";
- 	};
- 
--	sdhi1: sdhi@ffe4d000 {
-+	sdhi1: sd@ffe4d000 {
- 		compatible = "renesas,sdhi-r8a7779";
- 		reg = <0xffe4d000 0x100>;
- 		interrupt-parent = <&gic>;
-@@ -227,7 +227,7 @@
- 		status = "disabled";
- 	};
- 
--	sdhi2: sdhi@ffe4e000 {
-+	sdhi2: sd@ffe4e000 {
- 		compatible = "renesas,sdhi-r8a7779";
- 		reg = <0xffe4e000 0x100>;
- 		interrupt-parent = <&gic>;
-@@ -237,7 +237,7 @@
- 		status = "disabled";
- 	};
- 
--	sdhi3: sdhi@ffe4f000 {
-+	sdhi3: sd@ffe4f000 {
- 		compatible = "renesas,sdhi-r8a7779";
- 		reg = <0xffe4f000 0x100>;
- 		interrupt-parent = <&gic>;
-diff --git a/arch/arm/mach-shmobile/clock-r8a7779.c b/arch/arm/mach-shmobile/clock-r8a7779.c
-index b545c8dbb818..f1fb89b76786 100644
---- a/arch/arm/mach-shmobile/clock-r8a7779.c
-+++ b/arch/arm/mach-shmobile/clock-r8a7779.c
-@@ -204,13 +204,13 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_DEV_ID("sh-hspi.2", &mstp_clks[MSTP007]), /* HSPI2 */
- 	CLKDEV_DEV_ID("fffc6000.spi", &mstp_clks[MSTP007]), /* HSPI2 */
- 	CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP323]), /* SDHI0 */
--	CLKDEV_DEV_ID("ffe4c000.sdhi", &mstp_clks[MSTP323]), /* SDHI0 */
-+	CLKDEV_DEV_ID("ffe4c000.sd", &mstp_clks[MSTP323]), /* SDHI0 */
- 	CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP322]), /* SDHI1 */
--	CLKDEV_DEV_ID("ffe4d000.sdhi", &mstp_clks[MSTP322]), /* SDHI1 */
-+	CLKDEV_DEV_ID("ffe4d000.sd", &mstp_clks[MSTP322]), /* SDHI1 */
- 	CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP321]), /* SDHI2 */
--	CLKDEV_DEV_ID("ffe4e000.sdhi", &mstp_clks[MSTP321]), /* SDHI2 */
-+	CLKDEV_DEV_ID("ffe4e000.sd", &mstp_clks[MSTP321]), /* SDHI2 */
- 	CLKDEV_DEV_ID("sh_mobile_sdhi.3", &mstp_clks[MSTP320]), /* SDHI3 */
--	CLKDEV_DEV_ID("ffe4f000.sdhi", &mstp_clks[MSTP320]), /* SDHI3 */
-+	CLKDEV_DEV_ID("ffe4f000.sd", &mstp_clks[MSTP320]), /* SDHI3 */
- 	CLKDEV_DEV_ID("rcar-du-r8a7779", &mstp_clks[MSTP103]), /* DU */
- };
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0126-ARM-shmobile-ap4evb-Register-pinctrl-mapping-for-SMS.patch b/patches.renesas/0126-ARM-shmobile-ap4evb-Register-pinctrl-mapping-for-SMS.patch
deleted file mode 100644
index a6e51ed9953f8..0000000000000
--- a/patches.renesas/0126-ARM-shmobile-ap4evb-Register-pinctrl-mapping-for-SMS.patch
+++ /dev/null
@@ -1,46 +0,0 @@
-From 87698f9c46d9095ce727a5f9a3782a52513680ea Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 19 Apr 2013 13:29:48 +0200
-Subject: ARM: shmobile: ap4evb: Register pinctrl mapping for SMSC911x
-
-Replace the GPIO-based SMSC911x pinmux configuration by a pinctrl
-mapping.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 5436c2b9b48992349a1fb26dfd72a08c984ccba8)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-ap4evb.c | 9 +++++----
- 1 file changed, 5 insertions(+), 4 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c
-index 31639832..9ee8bcd0 100644
---- a/arch/arm/mach-shmobile/board-ap4evb.c
-+++ b/arch/arm/mach-shmobile/board-ap4evb.c
-@@ -1136,6 +1136,11 @@ static const struct pinctrl_map ap4evb_pinctrl_map[] = {
- 				  "sdhi1_data4", "sdhi1"),
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-sh7372",
- 				  "sdhi1_ctrl", "sdhi1"),
-+	/* SMSC911X */
-+	PIN_MAP_MUX_GROUP_DEFAULT("smsc911x", "pfc-sh7372",
-+				  "bsc_cs5a", "bsc"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("smsc911x", "pfc-sh7372",
-+				  "intc_irq6_0", "intc"),
- };
- 
- #define GPIO_PORT9CR	IOMEM(0xE6051009)
-@@ -1168,10 +1173,6 @@ static void __init ap4evb_init(void)
- 				  ARRAY_SIZE(ap4evb_pinctrl_map));
- 	sh7372_pinmux_init();
- 
--	/* enable SMSC911X */
--	gpio_request(GPIO_FN_CS5A,	NULL);
--	gpio_request(GPIO_FN_IRQ6_39,	NULL);
--
- 	/* enable Debug switch (S6) */
- 	gpio_request_one(32, GPIOF_IN | GPIOF_EXPORT, NULL);
- 	gpio_request_one(33, GPIOF_IN | GPIOF_EXPORT, NULL);
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0126-ARM-shmobile-bockw-defconfig-add-Sound-support.patch b/patches.renesas/0126-ARM-shmobile-bockw-defconfig-add-Sound-support.patch
deleted file mode 100644
index b735544d8bb3e..0000000000000
--- a/patches.renesas/0126-ARM-shmobile-bockw-defconfig-add-Sound-support.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From 529b90dfdb335ef9baf2b4f5cd97d25ae0724060 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Mon, 26 Aug 2013 01:52:45 -0700
-Subject: ARM: shmobile: bockw defconfig: add Sound support
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit dca778f1e470494019e41e9eef073eb981a64380)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/configs/bockw_defconfig | 4 ++++
- 1 file changed, 4 insertions(+)
-
-diff --git a/arch/arm/configs/bockw_defconfig b/arch/arm/configs/bockw_defconfig
-index e7e94948d194..b38cd107f82d 100644
---- a/arch/arm/configs/bockw_defconfig
-+++ b/arch/arm/configs/bockw_defconfig
-@@ -91,6 +91,10 @@ CONFIG_VIDEO_RCAR_VIN=y
- CONFIG_VIDEO_ML86V7667=y
- CONFIG_SPI=y
- CONFIG_SPI_SH_HSPI=y
-+CONFIG_SOUND=y
-+CONFIG_SND=y
-+CONFIG_SND_SOC=y
-+CONFIG_SND_SOC_RCAR=y
- CONFIG_USB=y
- CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
- CONFIG_USB_EHCI_HCD=y
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0126-ARM-shmobile-r8a7790-tidyup-DT-node-naming.patch b/patches.renesas/0126-ARM-shmobile-r8a7790-tidyup-DT-node-naming.patch
deleted file mode 100644
index fda9813be252a..0000000000000
--- a/patches.renesas/0126-ARM-shmobile-r8a7790-tidyup-DT-node-naming.patch
+++ /dev/null
@@ -1,98 +0,0 @@
-From 9a9ec087d399287bc0c47ee43f28d398cb30ff11 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Mon, 21 Oct 2013 19:36:13 -0700
-Subject: ARM: shmobile: r8a7790: tidyup DT node naming
-
-According to ePAPR spec,
-this patch tidies up DT node name and related clock.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit b718aa448378a83c698f92073a4aa24df0d9444b)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7790.dtsi         | 10 +++++-----
- arch/arm/mach-shmobile/clock-r8a7790.c | 12 ++++++------
- 2 files changed, 11 insertions(+), 11 deletions(-)
-
-diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
-index 46e1d7ef163f..839f1e761235 100644
---- a/arch/arm/boot/dts/r8a7790.dtsi
-+++ b/arch/arm/boot/dts/r8a7790.dtsi
-@@ -225,7 +225,7 @@
- 		status = "disabled";
- 	};
- 
--	mmcif1: mmcif@ee220000 {
-+	mmcif1: mmc@ee220000 {
- 		compatible = "renesas,sh-mmcif";
- 		reg = <0 0xee220000 0 0x80>;
- 		interrupt-parent = <&gic>;
-@@ -239,7 +239,7 @@
- 		reg = <0 0xe6060000 0 0x250>;
- 	};
- 
--	sdhi0: sdhi@ee100000 {
-+	sdhi0: sd@ee100000 {
- 		compatible = "renesas,sdhi-r8a7790";
- 		reg = <0 0xee100000 0 0x100>;
- 		interrupt-parent = <&gic>;
-@@ -248,7 +248,7 @@
- 		status = "disabled";
- 	};
- 
--	sdhi1: sdhi@ee120000 {
-+	sdhi1: sd@ee120000 {
- 		compatible = "renesas,sdhi-r8a7790";
- 		reg = <0 0xee120000 0 0x100>;
- 		interrupt-parent = <&gic>;
-@@ -257,7 +257,7 @@
- 		status = "disabled";
- 	};
- 
--	sdhi2: sdhi@ee140000 {
-+	sdhi2: sd@ee140000 {
- 		compatible = "renesas,sdhi-r8a7790";
- 		reg = <0 0xee140000 0 0x100>;
- 		interrupt-parent = <&gic>;
-@@ -266,7 +266,7 @@
- 		status = "disabled";
- 	};
- 
--	sdhi3: sdhi@ee160000 {
-+	sdhi3: sd@ee160000 {
- 		compatible = "renesas,sdhi-r8a7790";
- 		reg = <0 0xee160000 0 0x100>;
- 		interrupt-parent = <&gic>;
-diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
-index 80cd8f31fa3c..312376d2cfd1 100644
---- a/arch/arm/mach-shmobile/clock-r8a7790.c
-+++ b/arch/arm/mach-shmobile/clock-r8a7790.c
-@@ -298,17 +298,17 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_DEV_ID("r8a7790-ether", &mstp_clks[MSTP813]),
- 	CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]),
- 	CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
--	CLKDEV_DEV_ID("ee200000.mmcif", &mstp_clks[MSTP315]),
-+	CLKDEV_DEV_ID("ee200000.mmc", &mstp_clks[MSTP315]),
- 	CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP315]),
--	CLKDEV_DEV_ID("ee100000.sdhi", &mstp_clks[MSTP314]),
-+	CLKDEV_DEV_ID("ee100000.sd", &mstp_clks[MSTP314]),
- 	CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]),
--	CLKDEV_DEV_ID("ee120000.sdhi", &mstp_clks[MSTP313]),
-+	CLKDEV_DEV_ID("ee120000.sd", &mstp_clks[MSTP313]),
- 	CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]),
--	CLKDEV_DEV_ID("ee140000.sdhi", &mstp_clks[MSTP312]),
-+	CLKDEV_DEV_ID("ee140000.sd", &mstp_clks[MSTP312]),
- 	CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP312]),
--	CLKDEV_DEV_ID("ee160000.sdhi", &mstp_clks[MSTP311]),
-+	CLKDEV_DEV_ID("ee160000.sd", &mstp_clks[MSTP311]),
- 	CLKDEV_DEV_ID("sh_mobile_sdhi.3", &mstp_clks[MSTP311]),
--	CLKDEV_DEV_ID("ee220000.mmcif", &mstp_clks[MSTP305]),
-+	CLKDEV_DEV_ID("ee220000.mmc", &mstp_clks[MSTP305]),
- 	CLKDEV_DEV_ID("sh_mmcif.1", &mstp_clks[MSTP305]),
- 	CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]),
- 	CLKDEV_DEV_ID("qspi.0", &mstp_clks[MSTP917]),
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0127-ARM-shmobile-Add-koelsch-defconfig.patch b/patches.renesas/0127-ARM-shmobile-Add-koelsch-defconfig.patch
deleted file mode 100644
index ba206c0678da8..0000000000000
--- a/patches.renesas/0127-ARM-shmobile-Add-koelsch-defconfig.patch
+++ /dev/null
@@ -1,82 +0,0 @@
-From 5bc6fa139b7874cb5dfa8a09a4a97f22c7b6fe11 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Wed, 4 Sep 2013 17:04:08 +0900
-Subject: ARM: shmobile: Add koelsch defconfig
-
-This is intended to be used until multi-arch is able to be
-used for the koelsch board at which time a more generic configuration
-will be used in place of this one.
-
-This is based on the lager defconfig.
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 6bb2e347899b297eea26f2658eac8fdcd633fba5)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/configs/koelsch_defconfig | 54 ++++++++++++++++++++++++++++++++++++++
- 1 file changed, 54 insertions(+)
- create mode 100644 arch/arm/configs/koelsch_defconfig
-
-diff --git a/arch/arm/configs/koelsch_defconfig b/arch/arm/configs/koelsch_defconfig
-new file mode 100644
-index 000000000000..825c16dee8a0
---- /dev/null
-+++ b/arch/arm/configs/koelsch_defconfig
-@@ -0,0 +1,54 @@
-+CONFIG_SYSVIPC=y
-+CONFIG_NO_HZ=y
-+CONFIG_IKCONFIG=y
-+CONFIG_IKCONFIG_PROC=y
-+CONFIG_LOG_BUF_SHIFT=16
-+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
-+CONFIG_SYSCTL_SYSCALL=y
-+CONFIG_EMBEDDED=y
-+CONFIG_PERF_EVENTS=y
-+CONFIG_SLAB=y
-+# CONFIG_BLOCK is not set
-+CONFIG_ARCH_SHMOBILE=y
-+CONFIG_ARCH_R8A7791=y
-+CONFIG_MACH_KOELSCH=y
-+# CONFIG_SWP_EMULATE is not set
-+CONFIG_CPU_BPREDICT_DISABLE=y
-+CONFIG_PL310_ERRATA_588369=y
-+CONFIG_ARM_ERRATA_754322=y
-+CONFIG_SMP=y
-+CONFIG_SCHED_MC=y
-+CONFIG_NR_CPUS=8
-+CONFIG_AEABI=y
-+CONFIG_ZBOOT_ROM_TEXT=0x0
-+CONFIG_ZBOOT_ROM_BSS=0x0
-+CONFIG_ARM_APPENDED_DTB=y
-+CONFIG_KEXEC=y
-+CONFIG_AUTO_ZRELADDR=y
-+CONFIG_VFP=y
-+CONFIG_NEON=y
-+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
-+CONFIG_PM_RUNTIME=y
-+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-+# CONFIG_INPUT_MOUSE is not set
-+# CONFIG_LEGACY_PTYS is not set
-+CONFIG_SERIAL_SH_SCI=y
-+CONFIG_SERIAL_SH_SCI_NR_UARTS=20
-+CONFIG_SERIAL_SH_SCI_CONSOLE=y
-+# CONFIG_HWMON is not set
-+CONFIG_THERMAL=y
-+CONFIG_RCAR_THERMAL=y
-+# CONFIG_HID is not set
-+# CONFIG_USB_SUPPORT is not set
-+CONFIG_NEW_LEDS=y
-+CONFIG_LEDS_CLASS=y
-+# CONFIG_IOMMU_SUPPORT is not set
-+# CONFIG_DNOTIFY is not set
-+# CONFIG_INOTIFY_USER is not set
-+CONFIG_TMPFS=y
-+CONFIG_CONFIGFS_FS=y
-+# CONFIG_MISC_FILESYSTEMS is not set
-+# CONFIG_ENABLE_WARN_DEPRECATED is not set
-+# CONFIG_ENABLE_MUST_CHECK is not set
-+# CONFIG_ARM_UNWIND is not set
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0127-ARM-shmobile-ap4evb-Simplify-tsc2007-pen-state-read-.patch b/patches.renesas/0127-ARM-shmobile-ap4evb-Simplify-tsc2007-pen-state-read-.patch
deleted file mode 100644
index eab8d837cf396..0000000000000
--- a/patches.renesas/0127-ARM-shmobile-ap4evb-Simplify-tsc2007-pen-state-read-.patch
+++ /dev/null
@@ -1,49 +0,0 @@
-From f29ee235b83d0bf497ef1ff459f2cd23c23a9167 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Sun, 21 Apr 2013 18:56:15 +0200
-Subject: ARM: shmobile: ap4evb: Simplify tsc2007 pen state read function
-
-The pen state is retrieved by reading the state of a pin used as an IRQ.
-There's no need to reconfigure the pin as a pure GPIO, as the IRQ pin
-state can be read.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 4a666a783b0bb989afe87686f80c94d6ac1897a8)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-ap4evb.c | 13 ++-----------
- 1 file changed, 2 insertions(+), 11 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c
-index 9ee8bcd0..0109bb3c 100644
---- a/arch/arm/mach-shmobile/board-ap4evb.c
-+++ b/arch/arm/mach-shmobile/board-ap4evb.c
-@@ -1037,22 +1037,13 @@ out:
- #define IRQ7	evt2irq(0x02e0) /* IRQ7A */
- static int ts_get_pendown_state(void)
- {
--	int val;
--
--	gpio_free(GPIO_TSC_IRQ);
--
--	gpio_request_one(GPIO_TSC_PORT, GPIOF_IN, NULL);
--
--	val = gpio_get_value(GPIO_TSC_PORT);
--
--	gpio_request(GPIO_TSC_IRQ, NULL);
--
--	return !val;
-+	return !gpio_get_value(GPIO_TSC_PORT);
- }
- 
- static int ts_init(void)
- {
- 	gpio_request(GPIO_TSC_IRQ, NULL);
-+	gpio_request_one(GPIO_TSC_PORT, GPIOF_IN, NULL);
- 
- 	return 0;
- }
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0127-ARM-shmobile-sh73a0-tidyup-DT-node-naming.patch b/patches.renesas/0127-ARM-shmobile-sh73a0-tidyup-DT-node-naming.patch
deleted file mode 100644
index c407cabe6f052..0000000000000
--- a/patches.renesas/0127-ARM-shmobile-sh73a0-tidyup-DT-node-naming.patch
+++ /dev/null
@@ -1,83 +0,0 @@
-From ec0a1c816e1a0bce87c0af9f41b619509dcb4adc Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Mon, 21 Oct 2013 19:36:22 -0700
-Subject: ARM: shmobile: sh73a0: tidyup DT node naming
-
-According to ePAPR spec,
-this patch tidies up DT node name and related clock.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 33f6be3bf6b79c2b9b7c8cd1387e8e7d4b839d9e)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/sh73a0.dtsi         | 8 ++++----
- arch/arm/mach-shmobile/clock-sh73a0.c | 8 ++++----
- 2 files changed, 8 insertions(+), 8 deletions(-)
-
-diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi
-index fcf26889a8a0..78f7201aeb24 100644
---- a/arch/arm/boot/dts/sh73a0.dtsi
-+++ b/arch/arm/boot/dts/sh73a0.dtsi
-@@ -190,7 +190,7 @@
- 		status = "disabled";
- 	};
- 
--	mmcif: mmcif@e6bd0000 {
-+	mmcif: mmc@e6bd0000 {
- 		compatible = "renesas,sh-mmcif";
- 		reg = <0xe6bd0000 0x100>;
- 		interrupt-parent = <&gic>;
-@@ -200,7 +200,7 @@
- 		status = "disabled";
- 	};
- 
--	sdhi0: sdhi@ee100000 {
-+	sdhi0: sd@ee100000 {
- 		compatible = "renesas,sdhi-r8a7740";
- 		reg = <0xee100000 0x100>;
- 		interrupt-parent = <&gic>;
-@@ -212,7 +212,7 @@
- 	};
- 
- 	/* SDHI1 and SDHI2 have no CD pins, no need for CD IRQ */
--	sdhi1: sdhi@ee120000 {
-+	sdhi1: sd@ee120000 {
- 		compatible = "renesas,sdhi-r8a7740";
- 		reg = <0xee120000 0x100>;
- 		interrupt-parent = <&gic>;
-@@ -223,7 +223,7 @@
- 		status = "disabled";
- 	};
- 
--	sdhi2: sdhi@ee140000 {
-+	sdhi2: sd@ee140000 {
- 		compatible = "renesas,sdhi-r8a7740";
- 		reg = <0xee140000 0x100>;
- 		interrupt-parent = <&gic>;
-diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c
-index 2aeec468cf7c..30d88689a960 100644
---- a/arch/arm/mach-shmobile/clock-sh73a0.c
-+++ b/arch/arm/mach-shmobile/clock-sh73a0.c
-@@ -657,13 +657,13 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_DEV_ID("e6822000.i2c", &mstp_clks[MSTP323]), /* I2C1 */
- 	CLKDEV_DEV_ID("renesas_usbhs", &mstp_clks[MSTP322]), /* USB */
- 	CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]), /* SDHI0 */
--	CLKDEV_DEV_ID("ee100000.sdhi", &mstp_clks[MSTP314]), /* SDHI0 */
-+	CLKDEV_DEV_ID("ee100000.sd", &mstp_clks[MSTP314]), /* SDHI0 */
- 	CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), /* SDHI1 */
--	CLKDEV_DEV_ID("ee120000.sdhi", &mstp_clks[MSTP313]), /* SDHI1 */
-+	CLKDEV_DEV_ID("ee120000.sd", &mstp_clks[MSTP313]), /* SDHI1 */
- 	CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP312]), /* MMCIF0 */
--	CLKDEV_DEV_ID("e6bd0000.mmcif", &mstp_clks[MSTP312]), /* MMCIF0 */
-+	CLKDEV_DEV_ID("e6bd0000.mmc", &mstp_clks[MSTP312]), /* MMCIF0 */
- 	CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP311]), /* SDHI2 */
--	CLKDEV_DEV_ID("ee140000.sdhi", &mstp_clks[MSTP311]), /* SDHI2 */
-+	CLKDEV_DEV_ID("ee140000.sd", &mstp_clks[MSTP311]), /* SDHI2 */
- 	CLKDEV_DEV_ID("renesas-tpu-pwm.0", &mstp_clks[MSTP304]), /* TPU0 */
- 	CLKDEV_DEV_ID("renesas-tpu-pwm.1", &mstp_clks[MSTP303]), /* TPU1 */
- 	CLKDEV_DEV_ID("renesas-tpu-pwm.2", &mstp_clks[MSTP302]), /* TPU2 */
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0128-ARM-shmobile-Introduce-shmobile_smp_cpu_disable.patch b/patches.renesas/0128-ARM-shmobile-Introduce-shmobile_smp_cpu_disable.patch
deleted file mode 100644
index e24a44692bb14..0000000000000
--- a/patches.renesas/0128-ARM-shmobile-Introduce-shmobile_smp_cpu_disable.patch
+++ /dev/null
@@ -1,48 +0,0 @@
-From 1fa4f5b3348ba0018b47664cc621ca1e71c557c3 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Thu, 8 Aug 2013 07:13:30 +0900
-Subject: ARM: shmobile: Introduce shmobile_smp_cpu_disable()
-
-Introduce the shared CPU Hotplug function shmobile_smp_cpu_disable()
-for mach-shmobile. It is useful for the case when all CPUs may be
-hotplugged, including CPU 0.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 5c4dfcd663b6e96cc20f02dc2c7c315749ea1bc1)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/include/mach/common.h | 1 +
- arch/arm/mach-shmobile/platsmp.c             | 7 +++++++
- 2 files changed, 8 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h
-index 7b938681e756..1ed155eb3e92 100644
---- a/arch/arm/mach-shmobile/include/mach/common.h
-+++ b/arch/arm/mach-shmobile/include/mach/common.h
-@@ -13,6 +13,7 @@ extern void shmobile_smp_boot(void);
- extern void shmobile_smp_sleep(void);
- extern void shmobile_smp_hook(unsigned int cpu, unsigned long fn,
- 			      unsigned long arg);
-+extern int shmobile_smp_cpu_disable(unsigned int cpu);
- extern void shmobile_boot_scu(void);
- extern void shmobile_smp_scu_prepare_cpus(unsigned int max_cpus);
- extern int shmobile_smp_scu_boot_secondary(unsigned int cpu,
-diff --git a/arch/arm/mach-shmobile/platsmp.c b/arch/arm/mach-shmobile/platsmp.c
-index d4ae616bcedb..3741562156ed 100644
---- a/arch/arm/mach-shmobile/platsmp.c
-+++ b/arch/arm/mach-shmobile/platsmp.c
-@@ -44,3 +44,10 @@ void shmobile_smp_hook(unsigned int cpu, unsigned long fn, unsigned long arg)
- 	shmobile_smp_arg[cpu] = arg;
- 	flush_cache_all();
- }
-+
-+#ifdef CONFIG_HOTPLUG_CPU
-+int shmobile_smp_cpu_disable(unsigned int cpu)
-+{
-+	return 0; /* Hotplug of any CPU is supported */
-+}
-+#endif
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0128-ARM-shmobile-ap4evb-Register-pinctrl-mapping-for-TSC.patch b/patches.renesas/0128-ARM-shmobile-ap4evb-Register-pinctrl-mapping-for-TSC.patch
deleted file mode 100644
index 9443c23eec68c..0000000000000
--- a/patches.renesas/0128-ARM-shmobile-ap4evb-Register-pinctrl-mapping-for-TSC.patch
+++ /dev/null
@@ -1,57 +0,0 @@
-From 37fa124dd782f44beb3806f6955b021138b00416 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 19 Apr 2013 13:29:48 +0200
-Subject: ARM: shmobile: ap4evb: Register pinctrl mapping for TSC2007
-
-Replace the GPIO-based TSC2007 pinmux configuration by a pinctrl
-mapping.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 119612d2f930e09a571a73fb6944f90571f494d5)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-ap4evb.c | 11 ++++++++---
- 1 file changed, 8 insertions(+), 3 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c
-index 0109bb3c..152a5f72 100644
---- a/arch/arm/mach-shmobile/board-ap4evb.c
-+++ b/arch/arm/mach-shmobile/board-ap4evb.c
-@@ -1026,10 +1026,8 @@ out:
- 
- /* TouchScreen */
- #ifdef CONFIG_AP4EVB_QHD
--# define GPIO_TSC_IRQ	GPIO_FN_IRQ28_123
- # define GPIO_TSC_PORT	123
- #else /* WVGA */
--# define GPIO_TSC_IRQ	GPIO_FN_IRQ7_40
- # define GPIO_TSC_PORT	40
- #endif
- 
-@@ -1042,7 +1040,6 @@ static int ts_get_pendown_state(void)
- 
- static int ts_init(void)
- {
--	gpio_request(GPIO_TSC_IRQ, NULL);
- 	gpio_request_one(GPIO_TSC_PORT, GPIOF_IN, NULL);
- 
- 	return 0;
-@@ -1132,6 +1129,14 @@ static const struct pinctrl_map ap4evb_pinctrl_map[] = {
- 				  "bsc_cs5a", "bsc"),
- 	PIN_MAP_MUX_GROUP_DEFAULT("smsc911x", "pfc-sh7372",
- 				  "intc_irq6_0", "intc"),
-+	/* TSC2007 */
-+#ifdef CONFIG_AP4EVB_QHD
-+	PIN_MAP_MUX_GROUP_DEFAULT("1-0048", "pfc-sh7372",
-+				  "intc_irq28_0", "intc"),
-+#else /* WVGA */
-+	PIN_MAP_MUX_GROUP_DEFAULT("1-0048", "pfc-sh7372",
-+				  "intc_irq7_0", "intc"),
-+#endif
- };
- 
- #define GPIO_PORT9CR	IOMEM(0xE6051009)
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0128-ARM-shmobile-armadillo-tidyup-DT-node-naming.patch b/patches.renesas/0128-ARM-shmobile-armadillo-tidyup-DT-node-naming.patch
deleted file mode 100644
index 1303507c0cb8e..0000000000000
--- a/patches.renesas/0128-ARM-shmobile-armadillo-tidyup-DT-node-naming.patch
+++ /dev/null
@@ -1,59 +0,0 @@
-From c7bdbd3c40ff0e8cddfbc304316d6d210cdd558d Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Mon, 21 Oct 2013 19:37:14 -0700
-Subject: ARM: shmobile: armadillo: tidyup DT node naming
-
-According to ePAPR spec,
-this patch tidies up DT node name.
-
-This patch removed un-used "touchscreen" label
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit e63763b9b55a6833047199bd587e061520302ffc)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts | 8 ++++----
- 1 file changed, 4 insertions(+), 4 deletions(-)
-
-diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
-index 1c56c5e56950..6a542198985d 100644
---- a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
-+++ b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
-@@ -90,7 +90,7 @@
- 
- &i2c0 {
- 	status = "okay";
--	touchscreen: st1232@55 {
-+	touchscreen@55 {
- 		compatible = "sitronix,st1232";
- 		reg = <0x55>;
- 		interrupt-parent = <&irqpin1>;
-@@ -105,12 +105,12 @@
- 	pinctrl-0 = <&scifa1_pins>;
- 	pinctrl-names = "default";
- 
--	scifa1_pins: scifa1 {
-+	scifa1_pins: serial1 {
- 		renesas,groups = "scifa1_data";
- 		renesas,function = "scifa1";
- 	};
- 
--	st1232_pins: st1232 {
-+	st1232_pins: touchscreen {
- 		renesas,groups = "intc_irq10";
- 		renesas,function = "intc";
- 	};
-@@ -125,7 +125,7 @@
- 		renesas,function = "mmc0";
- 	};
- 
--	sdhi0_pins: sdhi0 {
-+	sdhi0_pins: sd0 {
- 		renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_wp";
- 		renesas,function = "sdhi0";
- 	};
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0129-ARM-shmobile-Use-shmobile_smp_cpu_disable-on-sh73a0.patch b/patches.renesas/0129-ARM-shmobile-Use-shmobile_smp_cpu_disable-on-sh73a0.patch
deleted file mode 100644
index 230a5faa74156..0000000000000
--- a/patches.renesas/0129-ARM-shmobile-Use-shmobile_smp_cpu_disable-on-sh73a0.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-From 8d9ef994e3a0873b1051fcab3414b2927a9a5d41 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Thu, 8 Aug 2013 07:13:39 +0900
-Subject: ARM: shmobile: Use shmobile_smp_cpu_disable() on sh73a0
-
-Use shmobile_smp_cpu_disable() on sh73a0 since it
-allows CPU Hotplug of any CPU.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit a3b142a1a08af543473ae726e5d96a969c5b02b5)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/smp-sh73a0.c | 9 +--------
- 1 file changed, 1 insertion(+), 8 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/smp-sh73a0.c b/arch/arm/mach-shmobile/smp-sh73a0.c
-index 8b3b9777056b..25ddffc96bcf 100644
---- a/arch/arm/mach-shmobile/smp-sh73a0.c
-+++ b/arch/arm/mach-shmobile/smp-sh73a0.c
-@@ -71,18 +71,11 @@ static void __init sh73a0_smp_prepare_cpus(unsigned int max_cpus)
- 	shmobile_smp_scu_prepare_cpus(max_cpus);
- }
- 
--#ifdef CONFIG_HOTPLUG_CPU
--static int sh73a0_cpu_disable(unsigned int cpu)
--{
--	return 0; /* CPU0 and CPU1 supported */
--}
--#endif /* CONFIG_HOTPLUG_CPU */
--
- struct smp_operations sh73a0_smp_ops __initdata = {
- 	.smp_prepare_cpus	= sh73a0_smp_prepare_cpus,
- 	.smp_boot_secondary	= sh73a0_boot_secondary,
- #ifdef CONFIG_HOTPLUG_CPU
--	.cpu_disable		= sh73a0_cpu_disable,
-+	.cpu_disable		= shmobile_smp_cpu_disable,
- 	.cpu_die		= shmobile_smp_scu_cpu_die,
- 	.cpu_kill		= shmobile_smp_scu_cpu_kill,
- #endif
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0129-ARM-shmobile-ap4evb-Register-pinctrl-mapping-for-USB.patch b/patches.renesas/0129-ARM-shmobile-ap4evb-Register-pinctrl-mapping-for-USB.patch
deleted file mode 100644
index ea6d309c8c2ae..0000000000000
--- a/patches.renesas/0129-ARM-shmobile-ap4evb-Register-pinctrl-mapping-for-USB.patch
+++ /dev/null
@@ -1,51 +0,0 @@
-From 9caefd8d6cfd68d633bf2a4055ef6084c0111987 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 19 Apr 2013 13:29:48 +0200
-Subject: ARM: shmobile: ap4evb: Register pinctrl mapping for USBHS
-
-Replace the GPIO-based USBHS pinmux configuration by a pinctrl mapping.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 025cc6ec8b655a700718e836e8b7a1d5ae298efc)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-ap4evb.c | 15 +++++++--------
- 1 file changed, 7 insertions(+), 8 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c
-index 152a5f72..297bf5ee 100644
---- a/arch/arm/mach-shmobile/board-ap4evb.c
-+++ b/arch/arm/mach-shmobile/board-ap4evb.c
-@@ -1137,6 +1137,13 @@ static const struct pinctrl_map ap4evb_pinctrl_map[] = {
- 	PIN_MAP_MUX_GROUP_DEFAULT("1-0048", "pfc-sh7372",
- 				  "intc_irq7_0", "intc"),
- #endif
-+	/* USBHS1 */
-+	PIN_MAP_MUX_GROUP_DEFAULT("r8a66597_hcd.1", "pfc-sh7372",
-+				  "usb1_vbus", "usb1"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("r8a66597_hcd.1", "pfc-sh7372",
-+				  "usb1_otg_id_0", "usb1"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("r8a66597_hcd.1", "pfc-sh7372",
-+				  "usb1_otg_ctrl_0", "usb1"),
- };
- 
- #define GPIO_PORT9CR	IOMEM(0xE6051009)
-@@ -1175,14 +1182,6 @@ static void __init ap4evb_init(void)
- 	gpio_request_one(34, GPIOF_IN | GPIOF_EXPORT, NULL);
- 	gpio_request_one(35, GPIOF_IN | GPIOF_EXPORT, NULL);
- 
--	/* USB enable */
--	gpio_request(GPIO_FN_VBUS0_1,    NULL);
--	gpio_request(GPIO_FN_IDIN_1_18,  NULL);
--	gpio_request(GPIO_FN_PWEN_1_115, NULL);
--	gpio_request(GPIO_FN_OVCN_1_114, NULL);
--	gpio_request(GPIO_FN_EXTLP_1,    NULL);
--	gpio_request(GPIO_FN_OVCN2_1,    NULL);
--
- 	/* setup USB phy */
- 	__raw_writew(0x8a0a, IOMEM(0xE6058130));	/* USBCR4 */
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0129-ARM-shmobile-ape6evm-tidyup-DT-node-naming.patch b/patches.renesas/0129-ARM-shmobile-ape6evm-tidyup-DT-node-naming.patch
deleted file mode 100644
index 0b34c1f71b3ca..0000000000000
--- a/patches.renesas/0129-ARM-shmobile-ape6evm-tidyup-DT-node-naming.patch
+++ /dev/null
@@ -1,51 +0,0 @@
-From 6a2f35f5cf8bc9a38c1de81bbd31d4741736d7f3 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Mon, 21 Oct 2013 19:37:26 -0700
-Subject: ARM: shmobile: ape6evm: tidyup DT node naming
-
-According to ePAPR spec,
-this patch tidies up DT node name.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit eeafbdf3253f23cbd30ee5f876ee9bb696a3c207)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts | 8 ++++----
- 1 file changed, 4 insertions(+), 4 deletions(-)
-
-diff --git a/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts b/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts
-index 9443e93d3cac..25dbc1c0947d 100644
---- a/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts
-+++ b/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts
-@@ -88,22 +88,22 @@
- 	pinctrl-0 = <&scifa0_pins>;
- 	pinctrl-names = "default";
- 
--	scifa0_pins: scifa0 {
-+	scifa0_pins: serial0 {
- 		renesas,groups = "scifa0_data";
- 		renesas,function = "scifa0";
- 	};
- 
--	mmc0_pins: mmcif {
-+	mmc0_pins: mmc {
- 		renesas,groups = "mmc0_data8", "mmc0_ctrl";
- 		renesas,function = "mmc0";
- 	};
- 
--	sdhi0_pins: sdhi0 {
-+	sdhi0_pins: sd0 {
- 		renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_cd";
- 		renesas,function = "sdhi0";
- 	};
- 
--	sdhi1_pins: sdhi1 {
-+	sdhi1_pins: sd1 {
- 		renesas,groups = "sdhi1_data4", "sdhi1_ctrl";
- 		renesas,function = "sdhi1";
- 	};
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0130-ARM-shmobile-Remove-unused-shmobile_smp_init_cpus.patch b/patches.renesas/0130-ARM-shmobile-Remove-unused-shmobile_smp_init_cpus.patch
deleted file mode 100644
index 37859a4153256..0000000000000
--- a/patches.renesas/0130-ARM-shmobile-Remove-unused-shmobile_smp_init_cpus.patch
+++ /dev/null
@@ -1,63 +0,0 @@
-From 53f0cf8e1944da224a6d07f6c91b40af98ce142f Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Thu, 8 Aug 2013 07:13:49 +0900
-Subject: ARM: shmobile: Remove unused shmobile_smp_init_cpus()
-
-Remove shmobile_smp_init_cpus() since all SMP platforms in
-mach-shmobile now rely on DT for CPU core description instead
-of for instance determining number of cores from the SCU.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit c4e1e64d2b6a921a57629ede635f81f5d2882543)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/include/mach/common.h |  1 -
- arch/arm/mach-shmobile/platsmp.c             | 15 ---------------
- 2 files changed, 16 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h
-index 1ed155eb3e92..26eaff1429bf 100644
---- a/arch/arm/mach-shmobile/include/mach/common.h
-+++ b/arch/arm/mach-shmobile/include/mach/common.h
-@@ -40,7 +40,6 @@ static inline int shmobile_cpuidle_init(void) { return 0; }
- #endif
- 
- extern void __iomem *shmobile_scu_base;
--extern void shmobile_smp_init_cpus(unsigned int ncores);
- 
- static inline void __init shmobile_init_late(void)
- {
-diff --git a/arch/arm/mach-shmobile/platsmp.c b/arch/arm/mach-shmobile/platsmp.c
-index 3741562156ed..9ebc246b8d7d 100644
---- a/arch/arm/mach-shmobile/platsmp.c
-+++ b/arch/arm/mach-shmobile/platsmp.c
-@@ -11,25 +11,10 @@
-  * published by the Free Software Foundation.
-  */
- #include <linux/init.h>
--#include <linux/smp.h>
- #include <asm/cacheflush.h>
- #include <asm/smp_plat.h>
- #include <mach/common.h>
- 
--void __init shmobile_smp_init_cpus(unsigned int ncores)
--{
--	unsigned int i;
--
--	if (ncores > nr_cpu_ids) {
--		pr_warn("SMP: %u cores greater than maximum (%u), clipping\n",
--			ncores, nr_cpu_ids);
--		ncores = nr_cpu_ids;
--	}
--
--	for (i = 0; i < ncores; i++)
--		set_cpu_possible(i, true);
--}
--
- extern unsigned long shmobile_smp_fn[];
- extern unsigned long shmobile_smp_arg[];
- extern unsigned long shmobile_smp_mpidr[];
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0130-ARM-shmobile-kzm9g-tidyup-DT-node-naming.patch b/patches.renesas/0130-ARM-shmobile-kzm9g-tidyup-DT-node-naming.patch
deleted file mode 100644
index 9e72cd3ff543c..0000000000000
--- a/patches.renesas/0130-ARM-shmobile-kzm9g-tidyup-DT-node-naming.patch
+++ /dev/null
@@ -1,54 +0,0 @@
-From 935d5293ef8ee44ee24e2f9a484c7c4f7d9a61fb Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Mon, 21 Oct 2013 19:37:39 -0700
-Subject: ARM: shmobile: kzm9g: tidyup DT node naming
-
-According to ePAPR spec,
-this patch tidies up DT node name.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 26adf1a79e847ac147c1cc9f2c033ff5e4a73e22)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/sh73a0-kzm9g-reference.dts | 8 ++++----
- 1 file changed, 4 insertions(+), 4 deletions(-)
-
-diff --git a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
-index 8ee06dd81799..df75aea42a48 100644
---- a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
-+++ b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
-@@ -205,7 +205,7 @@
- 		renesas,function = "i2c3";
- 	};
- 
--	mmcif_pins: mmcif {
-+	mmcif_pins: mmc {
- 		mux {
- 			renesas,groups = "mmc0_data8_0", "mmc0_ctrl_0";
- 			renesas,function = "mmc0";
-@@ -217,17 +217,17 @@
- 		};
- 	};
- 
--	scifa4_pins: scifa4 {
-+	scifa4_pins: serial4 {
- 		renesas,groups = "scifa4_data", "scifa4_ctrl";
- 		renesas,function = "scifa4";
- 	};
- 
--	sdhi0_pins: sdhi0 {
-+	sdhi0_pins: sd0 {
- 		renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_cd", "sdhi0_wp";
- 		renesas,function = "sdhi0";
- 	};
- 
--	sdhi2_pins: sdhi2 {
-+	sdhi2_pins: sd2 {
- 		renesas,groups = "sdhi2_data4", "sdhi2_ctrl";
- 		renesas,function = "sdhi2";
- 	};
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0130-sh-pfc-sh7372-Replace-GPIO_PORTx-enum-with-GPIO-port.patch b/patches.renesas/0130-sh-pfc-sh7372-Replace-GPIO_PORTx-enum-with-GPIO-port.patch
deleted file mode 100644
index 2feedf50cda5f..0000000000000
--- a/patches.renesas/0130-sh-pfc-sh7372-Replace-GPIO_PORTx-enum-with-GPIO-port.patch
+++ /dev/null
@@ -1,109 +0,0 @@
-From 2098bea3dd118fbb44d8b6b9a28d0012f7c85695 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Mon, 22 Apr 2013 00:02:06 +0200
-Subject: sh-pfc: sh7372: Replace GPIO_PORTx enum with GPIO port numbers
-
-The PFC GPIO API implementation moved to using port numbers. Replace all
-GPIO_PORTx enum usage with the corresponding port number. The GPIO_PORTx
-enum values are identical to the port number on this platform.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 4e65c958d353d3cf1759d301b806f89cb41c142e)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-sh7372.c | 71 ++++++++++++++++++++-----------------
- 1 file changed, 39 insertions(+), 32 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7372.c b/drivers/pinctrl/sh-pfc/pfc-sh7372.c
-index 4dc2ccb7..70477ce2 100644
---- a/drivers/pinctrl/sh-pfc/pfc-sh7372.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-sh7372.c
-@@ -34,6 +34,13 @@
- 	PORT_10(fn, pfx##16, sfx),	PORT_10(fn, pfx##17, sfx), \
- 	PORT_10(fn, pfx##18, sfx),	PORT_1(fn, pfx##190, sfx)
- 
-+#undef _GPIO_PORT
-+#define _GPIO_PORT(gpio, sfx)						\
-+	[gpio] = {							\
-+		.name = __stringify(PORT##gpio),			\
-+		.enum_id = PORT##gpio##_DATA,				\
-+	}
-+
- #define IRQC_PIN_MUX(irq, pin)						\
- static const unsigned int intc_irq##irq##_pins[] = {			\
- 	pin,								\
-@@ -2771,38 +2778,38 @@ static const struct pinmux_data_reg pinmux_data_regs[] = {
- #define EXT_IRQ16L(n) evt2irq(0x200 + ((n) << 5))
- #define EXT_IRQ16H(n) evt2irq(0x3200 + (((n) - 16) << 5))
- static const struct pinmux_irq pinmux_irqs[] = {
--	PINMUX_IRQ(EXT_IRQ16L(0), GPIO_PORT6, GPIO_PORT162),
--	PINMUX_IRQ(EXT_IRQ16L(1), GPIO_PORT12),
--	PINMUX_IRQ(EXT_IRQ16L(2), GPIO_PORT4, GPIO_PORT5),
--	PINMUX_IRQ(EXT_IRQ16L(3), GPIO_PORT8, GPIO_PORT16),
--	PINMUX_IRQ(EXT_IRQ16L(4), GPIO_PORT17, GPIO_PORT163),
--	PINMUX_IRQ(EXT_IRQ16L(5), GPIO_PORT18),
--	PINMUX_IRQ(EXT_IRQ16L(6), GPIO_PORT39, GPIO_PORT164),
--	PINMUX_IRQ(EXT_IRQ16L(7), GPIO_PORT40, GPIO_PORT167),
--	PINMUX_IRQ(EXT_IRQ16L(8), GPIO_PORT41, GPIO_PORT168),
--	PINMUX_IRQ(EXT_IRQ16L(9), GPIO_PORT42, GPIO_PORT169),
--	PINMUX_IRQ(EXT_IRQ16L(10), GPIO_PORT65),
--	PINMUX_IRQ(EXT_IRQ16L(11), GPIO_PORT67),
--	PINMUX_IRQ(EXT_IRQ16L(12), GPIO_PORT80, GPIO_PORT137),
--	PINMUX_IRQ(EXT_IRQ16L(13), GPIO_PORT81, GPIO_PORT145),
--	PINMUX_IRQ(EXT_IRQ16L(14), GPIO_PORT82, GPIO_PORT146),
--	PINMUX_IRQ(EXT_IRQ16L(15), GPIO_PORT83, GPIO_PORT147),
--	PINMUX_IRQ(EXT_IRQ16H(16), GPIO_PORT84, GPIO_PORT170),
--	PINMUX_IRQ(EXT_IRQ16H(17), GPIO_PORT85),
--	PINMUX_IRQ(EXT_IRQ16H(18), GPIO_PORT86),
--	PINMUX_IRQ(EXT_IRQ16H(19), GPIO_PORT87),
--	PINMUX_IRQ(EXT_IRQ16H(20), GPIO_PORT92),
--	PINMUX_IRQ(EXT_IRQ16H(21), GPIO_PORT93),
--	PINMUX_IRQ(EXT_IRQ16H(22), GPIO_PORT94),
--	PINMUX_IRQ(EXT_IRQ16H(23), GPIO_PORT95),
--	PINMUX_IRQ(EXT_IRQ16H(24), GPIO_PORT112),
--	PINMUX_IRQ(EXT_IRQ16H(25), GPIO_PORT119),
--	PINMUX_IRQ(EXT_IRQ16H(26), GPIO_PORT121, GPIO_PORT172),
--	PINMUX_IRQ(EXT_IRQ16H(27), GPIO_PORT122, GPIO_PORT180),
--	PINMUX_IRQ(EXT_IRQ16H(28), GPIO_PORT123, GPIO_PORT181),
--	PINMUX_IRQ(EXT_IRQ16H(29), GPIO_PORT129, GPIO_PORT182),
--	PINMUX_IRQ(EXT_IRQ16H(30), GPIO_PORT130, GPIO_PORT183),
--	PINMUX_IRQ(EXT_IRQ16H(31), GPIO_PORT138, GPIO_PORT184),
-+	PINMUX_IRQ(EXT_IRQ16L(0), 6, 162),
-+	PINMUX_IRQ(EXT_IRQ16L(1), 12),
-+	PINMUX_IRQ(EXT_IRQ16L(2), 4, 5),
-+	PINMUX_IRQ(EXT_IRQ16L(3), 8, 16),
-+	PINMUX_IRQ(EXT_IRQ16L(4), 17, 163),
-+	PINMUX_IRQ(EXT_IRQ16L(5), 18),
-+	PINMUX_IRQ(EXT_IRQ16L(6), 39, 164),
-+	PINMUX_IRQ(EXT_IRQ16L(7), 40, 167),
-+	PINMUX_IRQ(EXT_IRQ16L(8), 41, 168),
-+	PINMUX_IRQ(EXT_IRQ16L(9), 42, 169),
-+	PINMUX_IRQ(EXT_IRQ16L(10), 65),
-+	PINMUX_IRQ(EXT_IRQ16L(11), 67),
-+	PINMUX_IRQ(EXT_IRQ16L(12), 80, 137),
-+	PINMUX_IRQ(EXT_IRQ16L(13), 81, 145),
-+	PINMUX_IRQ(EXT_IRQ16L(14), 82, 146),
-+	PINMUX_IRQ(EXT_IRQ16L(15), 83, 147),
-+	PINMUX_IRQ(EXT_IRQ16H(16), 84, 170),
-+	PINMUX_IRQ(EXT_IRQ16H(17), 85),
-+	PINMUX_IRQ(EXT_IRQ16H(18), 86),
-+	PINMUX_IRQ(EXT_IRQ16H(19), 87),
-+	PINMUX_IRQ(EXT_IRQ16H(20), 92),
-+	PINMUX_IRQ(EXT_IRQ16H(21), 93),
-+	PINMUX_IRQ(EXT_IRQ16H(22), 94),
-+	PINMUX_IRQ(EXT_IRQ16H(23), 95),
-+	PINMUX_IRQ(EXT_IRQ16H(24), 112),
-+	PINMUX_IRQ(EXT_IRQ16H(25), 119),
-+	PINMUX_IRQ(EXT_IRQ16H(26), 121, 172),
-+	PINMUX_IRQ(EXT_IRQ16H(27), 122, 180),
-+	PINMUX_IRQ(EXT_IRQ16H(28), 123, 181),
-+	PINMUX_IRQ(EXT_IRQ16H(29), 129, 182),
-+	PINMUX_IRQ(EXT_IRQ16H(30), 130, 183),
-+	PINMUX_IRQ(EXT_IRQ16H(31), 138, 184),
- };
- 
- const struct sh_pfc_soc_info sh7372_pinmux_info = {
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0131-ARM-shmobile-Expose-shmobile_invalidate_start.patch b/patches.renesas/0131-ARM-shmobile-Expose-shmobile_invalidate_start.patch
deleted file mode 100644
index c64a475a110c7..0000000000000
--- a/patches.renesas/0131-ARM-shmobile-Expose-shmobile_invalidate_start.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From 8737a9d02e1f0eecedea71db8c24a0909bc53b85 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Thu, 8 Aug 2013 07:13:58 +0900
-Subject: ARM: shmobile: Expose shmobile_invalidate_start()
-
-Expose shmobile_invalidate_start() in common.h for
-mach-shmobile. This function will be used for boot of
-secondary processors on future non-SCU SMP platforms.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 87a08ca0f7f99b3136c763377c547a89cf6d0996)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/include/mach/common.h | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h
-index 26eaff1429bf..a9df8f3bfda7 100644
---- a/arch/arm/mach-shmobile/include/mach/common.h
-+++ b/arch/arm/mach-shmobile/include/mach/common.h
-@@ -14,6 +14,7 @@ extern void shmobile_smp_sleep(void);
- extern void shmobile_smp_hook(unsigned int cpu, unsigned long fn,
- 			      unsigned long arg);
- extern int shmobile_smp_cpu_disable(unsigned int cpu);
-+extern void shmobile_invalidate_start(void);
- extern void shmobile_boot_scu(void);
- extern void shmobile_smp_scu_prepare_cpus(unsigned int max_cpus);
- extern int shmobile_smp_scu_boot_secondary(unsigned int cpu,
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0131-ARM-shmobile-bockw-tidyup-DT-node-naming.patch b/patches.renesas/0131-ARM-shmobile-bockw-tidyup-DT-node-naming.patch
deleted file mode 100644
index 8858a6b8dd26a..0000000000000
--- a/patches.renesas/0131-ARM-shmobile-bockw-tidyup-DT-node-naming.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From 2f5f594e3adf2818eeb28b45cab61a48a9ee68b5 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Mon, 21 Oct 2013 19:37:48 -0700
-Subject: ARM: shmobile: bockw: tidyup DT node naming
-
-According to ePAPR spec,
-this patch tidies up DT node name.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit fb9c1ce47c2d5844ad2bf8dc8c06affa057e69c5)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7778-bockw-reference.dts | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/arch/arm/boot/dts/r8a7778-bockw-reference.dts b/arch/arm/boot/dts/r8a7778-bockw-reference.dts
-index 8b8208ebf0d1..9c8bd37804a6 100644
---- a/arch/arm/boot/dts/r8a7778-bockw-reference.dts
-+++ b/arch/arm/boot/dts/r8a7778-bockw-reference.dts
-@@ -71,7 +71,7 @@
- 	pinctrl-0 = <&scif0_pins>;
- 	pinctrl-names = "default";
- 
--	scif0_pins: scif0 {
-+	scif0_pins: serial0 {
- 		renesas,groups = "scif0_data_a", "scif0_ctrl";
- 		renesas,function = "scif0";
- 	};
-@@ -81,7 +81,7 @@
- 		renesas,function = "mmc";
- 	};
- 
--	sdhi0_pins: sdhi0 {
-+	sdhi0_pins: sd0 {
- 		renesas,groups = "sdhi0_data4", "sdhi0_ctrl",
- 				  "sdhi0_cd", "sdhi0_wp";
- 		renesas,function = "sdhi0";
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0131-sh-pfc-sh7372-Remove-function-GPIOs.patch b/patches.renesas/0131-sh-pfc-sh7372-Remove-function-GPIOs.patch
deleted file mode 100644
index cfea5b1a0ea55..0000000000000
--- a/patches.renesas/0131-sh-pfc-sh7372-Remove-function-GPIOs.patch
+++ /dev/null
@@ -1,283 +0,0 @@
-From 5bddbe400c1e586658038b0f338ebd1ccb437dcc Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Mon, 22 Apr 2013 00:05:16 +0200
-Subject: sh-pfc: sh7372: Remove function GPIOs
-
-No sh7372 platform use the function GPIOs API. Remove it.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 15dba8a4541be779d8cf1993d2d7eca3dc5aae7b)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-sh7372.c | 247 ------------------------------------
- 1 file changed, 247 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7372.c b/drivers/pinctrl/sh-pfc/pfc-sh7372.c
-index 70477ce2..94960670 100644
---- a/drivers/pinctrl/sh-pfc/pfc-sh7372.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-sh7372.c
-@@ -2136,250 +2136,6 @@ static const struct sh_pfc_function pinmux_functions[] = {
- 	SH_PFC_FUNCTION(usb1),
- };
- 
--#define PINMUX_FN_BASE	ARRAY_SIZE(pinmux_pins)
--
--static const struct pinmux_func pinmux_func_gpios[] = {
--	/* IRQ */
--	GPIO_FN(IRQ0_6),	GPIO_FN(IRQ0_162),	GPIO_FN(IRQ1),
--	GPIO_FN(IRQ2_4),	GPIO_FN(IRQ2_5),	GPIO_FN(IRQ3_8),
--	GPIO_FN(IRQ3_16),	GPIO_FN(IRQ4_17),	GPIO_FN(IRQ4_163),
--	GPIO_FN(IRQ5),		GPIO_FN(IRQ6_39),	GPIO_FN(IRQ6_164),
--	GPIO_FN(IRQ7_40),	GPIO_FN(IRQ7_167),	GPIO_FN(IRQ8_41),
--	GPIO_FN(IRQ8_168),	GPIO_FN(IRQ9_42),	GPIO_FN(IRQ9_169),
--	GPIO_FN(IRQ10),		GPIO_FN(IRQ11),		GPIO_FN(IRQ12_80),
--	GPIO_FN(IRQ12_137),	GPIO_FN(IRQ13_81),	GPIO_FN(IRQ13_145),
--	GPIO_FN(IRQ14_82),	GPIO_FN(IRQ14_146),	GPIO_FN(IRQ15_83),
--	GPIO_FN(IRQ15_147),	GPIO_FN(IRQ16_84),	GPIO_FN(IRQ16_170),
--	GPIO_FN(IRQ17),		GPIO_FN(IRQ18),		GPIO_FN(IRQ19),
--	GPIO_FN(IRQ20),		GPIO_FN(IRQ21),		GPIO_FN(IRQ22),
--	GPIO_FN(IRQ23),		GPIO_FN(IRQ24),		GPIO_FN(IRQ25),
--	GPIO_FN(IRQ26_121),	GPIO_FN(IRQ26_172),	GPIO_FN(IRQ27_122),
--	GPIO_FN(IRQ27_180),	GPIO_FN(IRQ28_123),	GPIO_FN(IRQ28_181),
--	GPIO_FN(IRQ29_129),	GPIO_FN(IRQ29_182),	GPIO_FN(IRQ30_130),
--	GPIO_FN(IRQ30_183),	GPIO_FN(IRQ31_138),	GPIO_FN(IRQ31_184),
--
--	/* MSIOF0 */
--	GPIO_FN(MSIOF0_TSYNC),	GPIO_FN(MSIOF0_TSCK),	GPIO_FN(MSIOF0_RXD),
--	GPIO_FN(MSIOF0_RSCK),	GPIO_FN(MSIOF0_RSYNC),	GPIO_FN(MSIOF0_MCK0),
--	GPIO_FN(MSIOF0_MCK1),	GPIO_FN(MSIOF0_SS1),	GPIO_FN(MSIOF0_SS2),
--	GPIO_FN(MSIOF0_TXD),
--
--	/* MSIOF1 */
--	GPIO_FN(MSIOF1_TSCK_39),	GPIO_FN(MSIOF1_TSCK_88),
--	GPIO_FN(MSIOF1_TSYNC_40),	GPIO_FN(MSIOF1_TSYNC_89),
--	GPIO_FN(MSIOF1_TXD_41),		GPIO_FN(MSIOF1_TXD_90),
--	GPIO_FN(MSIOF1_RXD_42),		GPIO_FN(MSIOF1_RXD_91),
--	GPIO_FN(MSIOF1_SS1_43),		GPIO_FN(MSIOF1_SS1_92),
--	GPIO_FN(MSIOF1_SS2_44),		GPIO_FN(MSIOF1_SS2_93),
--	GPIO_FN(MSIOF1_RSCK),		GPIO_FN(MSIOF1_RSYNC),
--	GPIO_FN(MSIOF1_MCK0),		GPIO_FN(MSIOF1_MCK1),
--
--	/* MSIOF2 */
--	GPIO_FN(MSIOF2_RSCK),	GPIO_FN(MSIOF2_RSYNC),	GPIO_FN(MSIOF2_MCK0),
--	GPIO_FN(MSIOF2_MCK1),	GPIO_FN(MSIOF2_SS1),	GPIO_FN(MSIOF2_SS2),
--	GPIO_FN(MSIOF2_TSYNC),	GPIO_FN(MSIOF2_TSCK),	GPIO_FN(MSIOF2_RXD),
--	GPIO_FN(MSIOF2_TXD),
--
--	/* BBIF1 */
--	GPIO_FN(BBIF1_RXD),	GPIO_FN(BBIF1_TSYNC),	GPIO_FN(BBIF1_TSCK),
--	GPIO_FN(BBIF1_TXD),	GPIO_FN(BBIF1_RSCK),	GPIO_FN(BBIF1_RSYNC),
--	GPIO_FN(BBIF1_FLOW),	GPIO_FN(BB_RX_FLOW_N),
--
--	/* BBIF2 */
--	GPIO_FN(BBIF2_TSCK1),	GPIO_FN(BBIF2_TSYNC1),
--	GPIO_FN(BBIF2_TXD1),	GPIO_FN(BBIF2_RXD),
--
--	/* FSI */
--	GPIO_FN(FSIACK),	GPIO_FN(FSIBCK),	GPIO_FN(FSIAILR),
--	GPIO_FN(FSIAIBT),	GPIO_FN(FSIAISLD),	GPIO_FN(FSIAOMC),
--	GPIO_FN(FSIAOLR),	GPIO_FN(FSIAOBT),	GPIO_FN(FSIAOSLD),
--	GPIO_FN(FSIASPDIF_11),	GPIO_FN(FSIASPDIF_15),
--
--	/* FMSI */
--	GPIO_FN(FMSOCK),	GPIO_FN(FMSOOLR),	GPIO_FN(FMSIOLR),
--	GPIO_FN(FMSOOBT),	GPIO_FN(FMSIOBT),	GPIO_FN(FMSOSLD),
--	GPIO_FN(FMSOILR),	GPIO_FN(FMSIILR),	GPIO_FN(FMSOIBT),
--	GPIO_FN(FMSIIBT),	GPIO_FN(FMSISLD),	GPIO_FN(FMSICK),
--
--	/* SCIFA0 */
--	GPIO_FN(SCIFA0_TXD),	GPIO_FN(SCIFA0_RXD),	GPIO_FN(SCIFA0_SCK),
--	GPIO_FN(SCIFA0_RTS),	GPIO_FN(SCIFA0_CTS),
--
--	/* SCIFA1 */
--	GPIO_FN(SCIFA1_TXD),	GPIO_FN(SCIFA1_RXD),	GPIO_FN(SCIFA1_SCK),
--	GPIO_FN(SCIFA1_RTS),	GPIO_FN(SCIFA1_CTS),
--
--	/* SCIFA2 */
--	GPIO_FN(SCIFA2_CTS1),	GPIO_FN(SCIFA2_RTS1),	GPIO_FN(SCIFA2_TXD1),
--	GPIO_FN(SCIFA2_RXD1),	GPIO_FN(SCIFA2_SCK1),
--
--	/* SCIFA3 */
--	GPIO_FN(SCIFA3_CTS_43),		GPIO_FN(SCIFA3_CTS_140),
--	GPIO_FN(SCIFA3_RTS_44),		GPIO_FN(SCIFA3_RTS_141),
--	GPIO_FN(SCIFA3_SCK),		GPIO_FN(SCIFA3_TXD),
--	GPIO_FN(SCIFA3_RXD),
--
--	/* SCIFA4 */
--	GPIO_FN(SCIFA4_RXD),	GPIO_FN(SCIFA4_TXD),
--
--	/* SCIFA5 */
--	GPIO_FN(SCIFA5_RXD),	GPIO_FN(SCIFA5_TXD),
--
--	/* SCIFB */
--	GPIO_FN(SCIFB_SCK),	GPIO_FN(SCIFB_RTS),	GPIO_FN(SCIFB_CTS),
--	GPIO_FN(SCIFB_TXD),	GPIO_FN(SCIFB_RXD),
--
--	/* CEU */
--	GPIO_FN(VIO_HD),	GPIO_FN(VIO_CKO1),	GPIO_FN(VIO_CKO2),
--	GPIO_FN(VIO_VD),	GPIO_FN(VIO_CLK),	GPIO_FN(VIO_FIELD),
--	GPIO_FN(VIO_CKO),	GPIO_FN(VIO_D0),	GPIO_FN(VIO_D1),
--	GPIO_FN(VIO_D2),	GPIO_FN(VIO_D3),	GPIO_FN(VIO_D4),
--	GPIO_FN(VIO_D5),	GPIO_FN(VIO_D6),	GPIO_FN(VIO_D7),
--	GPIO_FN(VIO_D8),	GPIO_FN(VIO_D9),	GPIO_FN(VIO_D10),
--	GPIO_FN(VIO_D11),	GPIO_FN(VIO_D12),	GPIO_FN(VIO_D13),
--	GPIO_FN(VIO_D14),	GPIO_FN(VIO_D15),
--
--	/* USB0 */
--	GPIO_FN(IDIN_0),	GPIO_FN(EXTLP_0),	GPIO_FN(OVCN2_0),
--	GPIO_FN(PWEN_0),	GPIO_FN(OVCN_0),	GPIO_FN(VBUS0_0),
--
--	/* USB1 */
--	GPIO_FN(IDIN_1_18),	GPIO_FN(IDIN_1_113),
--	GPIO_FN(OVCN_1_114),	GPIO_FN(OVCN_1_162),
--	GPIO_FN(PWEN_1_115),	GPIO_FN(PWEN_1_138),
--	GPIO_FN(EXTLP_1),	GPIO_FN(OVCN2_1),
--	GPIO_FN(VBUS0_1),
--
--	/* GPIO */
--	GPIO_FN(GPI0),	GPIO_FN(GPI1),	GPIO_FN(GPO0),	GPIO_FN(GPO1),
--
--	/* BSC */
--	GPIO_FN(BS),	GPIO_FN(WE1),	GPIO_FN(CKO),
--	GPIO_FN(WAIT),	GPIO_FN(RDWR),
--
--	GPIO_FN(A0),	GPIO_FN(A1),	GPIO_FN(A2),
--	GPIO_FN(A3),	GPIO_FN(A6),	GPIO_FN(A7),
--	GPIO_FN(A8),	GPIO_FN(A9),	GPIO_FN(A10),
--	GPIO_FN(A11),	GPIO_FN(A12),	GPIO_FN(A13),
--	GPIO_FN(A14),	GPIO_FN(A15),	GPIO_FN(A16),
--	GPIO_FN(A17),	GPIO_FN(A18),	GPIO_FN(A19),
--	GPIO_FN(A20),	GPIO_FN(A21),	GPIO_FN(A22),
--	GPIO_FN(A23),	GPIO_FN(A24),	GPIO_FN(A25),
--	GPIO_FN(A26),
--
--	GPIO_FN(CS0),	GPIO_FN(CS2),	GPIO_FN(CS4),
--	GPIO_FN(CS5A),	GPIO_FN(CS5B),	GPIO_FN(CS6A),
--
--	/* BSC/FLCTL */
--	GPIO_FN(RD_FSC),	GPIO_FN(WE0_FWE),	GPIO_FN(A4_FOE),
--	GPIO_FN(A5_FCDE),	GPIO_FN(D0_NAF0),	GPIO_FN(D1_NAF1),
--	GPIO_FN(D2_NAF2),	GPIO_FN(D3_NAF3),	GPIO_FN(D4_NAF4),
--	GPIO_FN(D5_NAF5),	GPIO_FN(D6_NAF6),	GPIO_FN(D7_NAF7),
--	GPIO_FN(D8_NAF8),	GPIO_FN(D9_NAF9),	GPIO_FN(D10_NAF10),
--	GPIO_FN(D11_NAF11),	GPIO_FN(D12_NAF12),	GPIO_FN(D13_NAF13),
--	GPIO_FN(D14_NAF14),	GPIO_FN(D15_NAF15),
--
--	/* SPU2 */
--	GPIO_FN(VINT_I),
--
--	/* FLCTL */
--	GPIO_FN(FCE1),	GPIO_FN(FCE0),	GPIO_FN(FRB),
--
--	/* HSI */
--	GPIO_FN(GP_RX_FLAG),	GPIO_FN(GP_RX_DATA),	GPIO_FN(GP_TX_READY),
--	GPIO_FN(GP_RX_WAKE),	GPIO_FN(MP_TX_FLAG),	GPIO_FN(MP_TX_DATA),
--	GPIO_FN(MP_RX_READY),	GPIO_FN(MP_TX_WAKE),
--
--	/* MFI */
--	GPIO_FN(MFIv6),
--	GPIO_FN(MFIv4),
--
--	GPIO_FN(MEMC_BUSCLK_MEMC_A0),	GPIO_FN(MEMC_ADV_MEMC_DREQ0),
--	GPIO_FN(MEMC_WAIT_MEMC_DREQ1),	GPIO_FN(MEMC_CS1_MEMC_A1),
--	GPIO_FN(MEMC_CS0),	GPIO_FN(MEMC_NOE),
--	GPIO_FN(MEMC_NWE),	GPIO_FN(MEMC_INT),
--
--	GPIO_FN(MEMC_AD0),	GPIO_FN(MEMC_AD1),	GPIO_FN(MEMC_AD2),
--	GPIO_FN(MEMC_AD3),	GPIO_FN(MEMC_AD4),	GPIO_FN(MEMC_AD5),
--	GPIO_FN(MEMC_AD6),	GPIO_FN(MEMC_AD7),	GPIO_FN(MEMC_AD8),
--	GPIO_FN(MEMC_AD9),	GPIO_FN(MEMC_AD10),	GPIO_FN(MEMC_AD11),
--	GPIO_FN(MEMC_AD12),	GPIO_FN(MEMC_AD13),	GPIO_FN(MEMC_AD14),
--	GPIO_FN(MEMC_AD15),
--
--	/* SIM */
--	GPIO_FN(SIM_RST),	GPIO_FN(SIM_CLK),	GPIO_FN(SIM_D),
--
--	/* TPU */
--	GPIO_FN(TPU0TO0),	GPIO_FN(TPU0TO1),	GPIO_FN(TPU0TO2_93),
--	GPIO_FN(TPU0TO2_99),	GPIO_FN(TPU0TO3),
--
--	/* I2C2 */
--	GPIO_FN(I2C_SCL2),	GPIO_FN(I2C_SDA2),
--
--	/* I2C3(1) */
--	GPIO_FN(I2C_SCL3),	GPIO_FN(I2C_SDA3),
--
--	/* I2C3(2) */
--	GPIO_FN(I2C_SCL3S),	GPIO_FN(I2C_SDA3S),
--
--	/* I2C4(2) */
--	GPIO_FN(I2C_SCL4),	GPIO_FN(I2C_SDA4),
--
--	/* I2C4(2) */
--	GPIO_FN(I2C_SCL4S),	GPIO_FN(I2C_SDA4S),
--
--	/* KEYSC */
--	GPIO_FN(KEYOUT0),	GPIO_FN(KEYIN0_121),	GPIO_FN(KEYIN0_136),
--	GPIO_FN(KEYOUT1),	GPIO_FN(KEYIN1_122),	GPIO_FN(KEYIN1_135),
--	GPIO_FN(KEYOUT2),	GPIO_FN(KEYIN2_123),	GPIO_FN(KEYIN2_134),
--	GPIO_FN(KEYOUT3),	GPIO_FN(KEYIN3_124),	GPIO_FN(KEYIN3_133),
--	GPIO_FN(KEYOUT4),	GPIO_FN(KEYIN4),	GPIO_FN(KEYOUT5),
--	GPIO_FN(KEYIN5),	GPIO_FN(KEYOUT6),	GPIO_FN(KEYIN6),
--	GPIO_FN(KEYOUT7),	GPIO_FN(KEYIN7),
--
--	/* LCDC */
--	GPIO_FN(LCDHSYN),	GPIO_FN(LCDCS),	GPIO_FN(LCDVSYN),
--	GPIO_FN(LCDDCK),	GPIO_FN(LCDWR),	GPIO_FN(LCDRD),
--	GPIO_FN(LCDDISP),	GPIO_FN(LCDRS),	GPIO_FN(LCDLCLK),
--	GPIO_FN(LCDDON),
--
--	GPIO_FN(LCDD0),		GPIO_FN(LCDD1),		GPIO_FN(LCDD2),
--	GPIO_FN(LCDD3),		GPIO_FN(LCDD4),		GPIO_FN(LCDD5),
--	GPIO_FN(LCDD6),		GPIO_FN(LCDD7),		GPIO_FN(LCDD8),
--	GPIO_FN(LCDD9),		GPIO_FN(LCDD10),	GPIO_FN(LCDD11),
--	GPIO_FN(LCDD12),	GPIO_FN(LCDD13),	GPIO_FN(LCDD14),
--	GPIO_FN(LCDD15),	GPIO_FN(LCDD16),	GPIO_FN(LCDD17),
--	GPIO_FN(LCDD18),	GPIO_FN(LCDD19),	GPIO_FN(LCDD20),
--	GPIO_FN(LCDD21),	GPIO_FN(LCDD22),	GPIO_FN(LCDD23),
--
--	GPIO_FN(LCDC0_SELECT),
--	GPIO_FN(LCDC1_SELECT),
--
--	/* IRDA */
--	GPIO_FN(IRDA_OUT),	GPIO_FN(IRDA_IN),	GPIO_FN(IRDA_FIRSEL),
--	GPIO_FN(IROUT_139),	GPIO_FN(IROUT_140),
--
--	/* TSIF1 */
--	GPIO_FN(TS0_1SELECT),
--	GPIO_FN(TS0_2SELECT),
--	GPIO_FN(TS1_1SELECT),
--	GPIO_FN(TS1_2SELECT),
--
--	GPIO_FN(TS_SPSYNC1),	GPIO_FN(TS_SDAT1),
--	GPIO_FN(TS_SDEN1),	GPIO_FN(TS_SCK1),
--
--	/* TSIF2 */
--	GPIO_FN(TS_SPSYNC2),	GPIO_FN(TS_SDAT2),
--	GPIO_FN(TS_SDEN2),	GPIO_FN(TS_SCK2),
--
--	/* HDMI */
--	GPIO_FN(HDMI_HPD),	GPIO_FN(HDMI_CEC),
--
--	/* SDENC */
--	GPIO_FN(SDENC_CPG),
--	GPIO_FN(SDENC_DV_CLKI),
--};
--
- static const struct pinmux_cfg_reg pinmux_config_regs[] = {
- 	PORTCR(0,	0xE6051000), /* PORT0CR */
- 	PORTCR(1,	0xE6051001), /* PORT1CR */
-@@ -2827,9 +2583,6 @@ const struct sh_pfc_soc_info sh7372_pinmux_info = {
- 	.functions = pinmux_functions,
- 	.nr_functions = ARRAY_SIZE(pinmux_functions),
- 
--	.func_gpios = pinmux_func_gpios,
--	.nr_func_gpios = ARRAY_SIZE(pinmux_func_gpios),
--
- 	.cfg_regs = pinmux_config_regs,
- 	.data_regs = pinmux_data_regs,
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0132-ARM-shmobile-Introduce-shmobile_boot_size.patch b/patches.renesas/0132-ARM-shmobile-Introduce-shmobile_boot_size.patch
deleted file mode 100644
index 7f8a881dc7d21..0000000000000
--- a/patches.renesas/0132-ARM-shmobile-Introduce-shmobile_boot_size.patch
+++ /dev/null
@@ -1,47 +0,0 @@
-From b7d6022a2aca4c82e15c80a34557accbcd17b4e7 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Thu, 8 Aug 2013 07:14:07 +0900
-Subject: ARM: shmobile: Introduce shmobile_boot_size
-
-Introduce shmobile_boot_size that can be used by
-future SMP code to determine the size of the boot
-code that needs to be copied to internal SRAM.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit a84a5ab73f77a5dd4f09f0af33f09d8d751d0cc7)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/headsmp.S             | 3 +++
- arch/arm/mach-shmobile/include/mach/common.h | 1 +
- 2 files changed, 4 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/headsmp.S b/arch/arm/mach-shmobile/headsmp.S
-index a8cabee4c5ee..289ef8657afa 100644
---- a/arch/arm/mach-shmobile/headsmp.S
-+++ b/arch/arm/mach-shmobile/headsmp.S
-@@ -42,6 +42,9 @@ shmobile_boot_fn:
- 	.globl	shmobile_boot_arg
- shmobile_boot_arg:
- 2:	.space	4
-+	.globl	shmobile_boot_size
-+shmobile_boot_size:
-+	.long	. - shmobile_boot_vector
- 
- /*
-  * Per-CPU SMP boot function/argument selection code based on MPIDR
-diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h
-index a9df8f3bfda7..cfe397716fd1 100644
---- a/arch/arm/mach-shmobile/include/mach/common.h
-+++ b/arch/arm/mach-shmobile/include/mach/common.h
-@@ -9,6 +9,7 @@ extern void shmobile_setup_console(void);
- extern void shmobile_boot_vector(void);
- extern unsigned long shmobile_boot_fn;
- extern unsigned long shmobile_boot_arg;
-+extern unsigned long shmobile_boot_size;
- extern void shmobile_smp_boot(void);
- extern void shmobile_smp_sleep(void);
- extern void shmobile_smp_hook(unsigned int cpu, unsigned long fn,
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0132-ARM-shmobile-marzen-tidyup-DT-node-naming.patch b/patches.renesas/0132-ARM-shmobile-marzen-tidyup-DT-node-naming.patch
deleted file mode 100644
index 96abeb0efb381..0000000000000
--- a/patches.renesas/0132-ARM-shmobile-marzen-tidyup-DT-node-naming.patch
+++ /dev/null
@@ -1,45 +0,0 @@
-From 3780edbb14819e32e6bf017382c7a8c120cb1001 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Mon, 21 Oct 2013 19:38:04 -0700
-Subject: ARM: shmobile: marzen: tidyup DT node naming
-
-According to ePAPR spec,
-this patch tidies up DT node name.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 6220c5197eb0820d9fd75595efa73c56a2162689)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7779-marzen-reference.dts | 6 +++---
- 1 file changed, 3 insertions(+), 3 deletions(-)
-
-diff --git a/arch/arm/boot/dts/r8a7779-marzen-reference.dts b/arch/arm/boot/dts/r8a7779-marzen-reference.dts
-index f7578d5fd44a..ce3fe9eb1606 100644
---- a/arch/arm/boot/dts/r8a7779-marzen-reference.dts
-+++ b/arch/arm/boot/dts/r8a7779-marzen-reference.dts
-@@ -82,17 +82,17 @@
- 		};
- 	};
- 
--	scif2_pins: scif2 {
-+	scif2_pins: serial2 {
- 		renesas,groups = "scif2_data_c";
- 		renesas,function = "scif2";
- 	};
- 
--	scif4_pins: scif4 {
-+	scif4_pins: serial4 {
- 		renesas,groups = "scif4_data";
- 		renesas,function = "scif4";
- 	};
- 
--	sdhi0_pins: sdhi0 {
-+	sdhi0_pins: sd0 {
- 		renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_cd",
- 				 "sdhi0_wp";
- 		renesas,function = "sdhi0";
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0132-ARM-shmobile-sh7372-Remove-all-GPIOs.patch b/patches.renesas/0132-ARM-shmobile-sh7372-Remove-all-GPIOs.patch
deleted file mode 100644
index a7401e5808472..0000000000000
--- a/patches.renesas/0132-ARM-shmobile-sh7372-Remove-all-GPIOs.patch
+++ /dev/null
@@ -1,421 +0,0 @@
-From f2b38c019a234a66e90692e3bb35b5f893194d3e Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Mon, 22 Apr 2013 00:05:41 +0200
-Subject: ARM: shmobile: sh7372: Remove all GPIOs
-
-Function GPIOs are not used anymore, and all code use the GPIO numbers
-directly. Remove the GPIOs enumeration.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 0d0c8e3669682095c86805ee5e0b1e8a3dd68800)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/include/mach/sh7372.h | 391 ---------------------------
- 1 file changed, 391 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/include/mach/sh7372.h b/arch/arm/mach-shmobile/include/mach/sh7372.h
-index fd7cba02..e882717c 100644
---- a/arch/arm/mach-shmobile/include/mach/sh7372.h
-+++ b/arch/arm/mach-shmobile/include/mach/sh7372.h
-@@ -15,397 +15,6 @@
- #include <linux/pm_domain.h>
- #include <mach/pm-rmobile.h>
- 
--/*
-- * Pin Function Controller:
-- *	GPIO_FN_xx - GPIO used to select pin function
-- *	GPIO_PORTxx - GPIO mapped to real I/O pin on CPU
-- */
--enum {
--	/* PORT */
--	GPIO_PORT0, GPIO_PORT1, GPIO_PORT2, GPIO_PORT3, GPIO_PORT4,
--	GPIO_PORT5, GPIO_PORT6, GPIO_PORT7, GPIO_PORT8, GPIO_PORT9,
--
--	GPIO_PORT10, GPIO_PORT11, GPIO_PORT12, GPIO_PORT13, GPIO_PORT14,
--	GPIO_PORT15, GPIO_PORT16, GPIO_PORT17, GPIO_PORT18, GPIO_PORT19,
--
--	GPIO_PORT20, GPIO_PORT21, GPIO_PORT22, GPIO_PORT23, GPIO_PORT24,
--	GPIO_PORT25, GPIO_PORT26, GPIO_PORT27, GPIO_PORT28, GPIO_PORT29,
--
--	GPIO_PORT30, GPIO_PORT31, GPIO_PORT32, GPIO_PORT33, GPIO_PORT34,
--	GPIO_PORT35, GPIO_PORT36, GPIO_PORT37, GPIO_PORT38, GPIO_PORT39,
--
--	GPIO_PORT40, GPIO_PORT41, GPIO_PORT42, GPIO_PORT43, GPIO_PORT44,
--	GPIO_PORT45, GPIO_PORT46, GPIO_PORT47, GPIO_PORT48, GPIO_PORT49,
--
--	GPIO_PORT50, GPIO_PORT51, GPIO_PORT52, GPIO_PORT53, GPIO_PORT54,
--	GPIO_PORT55, GPIO_PORT56, GPIO_PORT57, GPIO_PORT58, GPIO_PORT59,
--
--	GPIO_PORT60, GPIO_PORT61, GPIO_PORT62, GPIO_PORT63, GPIO_PORT64,
--	GPIO_PORT65, GPIO_PORT66, GPIO_PORT67, GPIO_PORT68, GPIO_PORT69,
--
--	GPIO_PORT70, GPIO_PORT71, GPIO_PORT72, GPIO_PORT73, GPIO_PORT74,
--	GPIO_PORT75, GPIO_PORT76, GPIO_PORT77, GPIO_PORT78, GPIO_PORT79,
--
--	GPIO_PORT80, GPIO_PORT81, GPIO_PORT82, GPIO_PORT83, GPIO_PORT84,
--	GPIO_PORT85, GPIO_PORT86, GPIO_PORT87, GPIO_PORT88, GPIO_PORT89,
--
--	GPIO_PORT90, GPIO_PORT91, GPIO_PORT92, GPIO_PORT93, GPIO_PORT94,
--	GPIO_PORT95, GPIO_PORT96, GPIO_PORT97, GPIO_PORT98, GPIO_PORT99,
--
--	GPIO_PORT100, GPIO_PORT101, GPIO_PORT102, GPIO_PORT103, GPIO_PORT104,
--	GPIO_PORT105, GPIO_PORT106, GPIO_PORT107, GPIO_PORT108, GPIO_PORT109,
--
--	GPIO_PORT110, GPIO_PORT111, GPIO_PORT112, GPIO_PORT113, GPIO_PORT114,
--	GPIO_PORT115, GPIO_PORT116, GPIO_PORT117, GPIO_PORT118, GPIO_PORT119,
--
--	GPIO_PORT120, GPIO_PORT121, GPIO_PORT122, GPIO_PORT123, GPIO_PORT124,
--	GPIO_PORT125, GPIO_PORT126, GPIO_PORT127, GPIO_PORT128, GPIO_PORT129,
--
--	GPIO_PORT130, GPIO_PORT131, GPIO_PORT132, GPIO_PORT133, GPIO_PORT134,
--	GPIO_PORT135, GPIO_PORT136, GPIO_PORT137, GPIO_PORT138, GPIO_PORT139,
--
--	GPIO_PORT140, GPIO_PORT141, GPIO_PORT142, GPIO_PORT143, GPIO_PORT144,
--	GPIO_PORT145, GPIO_PORT146, GPIO_PORT147, GPIO_PORT148, GPIO_PORT149,
--
--	GPIO_PORT150, GPIO_PORT151, GPIO_PORT152, GPIO_PORT153, GPIO_PORT154,
--	GPIO_PORT155, GPIO_PORT156, GPIO_PORT157, GPIO_PORT158, GPIO_PORT159,
--
--	GPIO_PORT160, GPIO_PORT161, GPIO_PORT162, GPIO_PORT163, GPIO_PORT164,
--	GPIO_PORT165, GPIO_PORT166, GPIO_PORT167, GPIO_PORT168, GPIO_PORT169,
--
--	GPIO_PORT170, GPIO_PORT171, GPIO_PORT172, GPIO_PORT173, GPIO_PORT174,
--	GPIO_PORT175, GPIO_PORT176, GPIO_PORT177, GPIO_PORT178, GPIO_PORT179,
--
--	GPIO_PORT180, GPIO_PORT181, GPIO_PORT182, GPIO_PORT183, GPIO_PORT184,
--	GPIO_PORT185, GPIO_PORT186, GPIO_PORT187, GPIO_PORT188, GPIO_PORT189,
--
--	GPIO_PORT190,
--
--	/* IRQ */
--	GPIO_FN_IRQ0_6,		/* PORT   6 */
--	GPIO_FN_IRQ0_162,	/* PORT 162 */
--	GPIO_FN_IRQ1,		/* PORT  12 */
--	GPIO_FN_IRQ2_4,		/* PORT   4 */
--	GPIO_FN_IRQ2_5,		/* PORT   5 */
--	GPIO_FN_IRQ3_8,		/* PORT   8 */
--	GPIO_FN_IRQ3_16,	/* PORT  16 */
--	GPIO_FN_IRQ4_17,	/* PORT  17 */
--	GPIO_FN_IRQ4_163,	/* PORT 163 */
--	GPIO_FN_IRQ5,		/* PORT  18 */
--	GPIO_FN_IRQ6_39,	/* PORT  39 */
--	GPIO_FN_IRQ6_164,	/* PORT 164 */
--	GPIO_FN_IRQ7_40,	/* PORT  40 */
--	GPIO_FN_IRQ7_167,	/* PORT 167 */
--	GPIO_FN_IRQ8_41,	/* PORT  41 */
--	GPIO_FN_IRQ8_168,	/* PORT 168 */
--	GPIO_FN_IRQ9_42,	/* PORT  42 */
--	GPIO_FN_IRQ9_169,	/* PORT 169 */
--	GPIO_FN_IRQ10,		/* PORT  65 */
--	GPIO_FN_IRQ11,		/* PORT  67 */
--	GPIO_FN_IRQ12_80,	/* PORT  80 */
--	GPIO_FN_IRQ12_137,	/* PORT 137 */
--	GPIO_FN_IRQ13_81,	/* PORT  81 */
--	GPIO_FN_IRQ13_145,	/* PORT 145 */
--	GPIO_FN_IRQ14_82,	/* PORT  82 */
--	GPIO_FN_IRQ14_146,	/* PORT 146 */
--	GPIO_FN_IRQ15_83,	/* PORT  83 */
--	GPIO_FN_IRQ15_147,	/* PORT 147 */
--	GPIO_FN_IRQ16_84,	/* PORT  84 */
--	GPIO_FN_IRQ16_170,	/* PORT 170 */
--	GPIO_FN_IRQ17,		/* PORT  85 */
--	GPIO_FN_IRQ18,		/* PORT  86 */
--	GPIO_FN_IRQ19,		/* PORT  87 */
--	GPIO_FN_IRQ20,		/* PORT  92 */
--	GPIO_FN_IRQ21,		/* PORT  93 */
--	GPIO_FN_IRQ22,		/* PORT  94 */
--	GPIO_FN_IRQ23,		/* PORT  95 */
--	GPIO_FN_IRQ24,		/* PORT 112 */
--	GPIO_FN_IRQ25,		/* PORT 119 */
--	GPIO_FN_IRQ26_121,	/* PORT 121 */
--	GPIO_FN_IRQ26_172,	/* PORT 172 */
--	GPIO_FN_IRQ27_122,	/* PORT 122 */
--	GPIO_FN_IRQ27_180,	/* PORT 180 */
--	GPIO_FN_IRQ28_123,	/* PORT 123 */
--	GPIO_FN_IRQ28_181,	/* PORT 181 */
--	GPIO_FN_IRQ29_129,	/* PORT 129 */
--	GPIO_FN_IRQ29_182,	/* PORT 182 */
--	GPIO_FN_IRQ30_130,	/* PORT 130 */
--	GPIO_FN_IRQ30_183,	/* PORT 183 */
--	GPIO_FN_IRQ31_138,	/* PORT 138 */
--	GPIO_FN_IRQ31_184,	/* PORT 184 */
--
--	/*
--	 * MSIOF0	(PORT 36, 37, 38, 39
--	 * 		      40, 41, 42, 43, 44, 45)
--	 */
--	GPIO_FN_MSIOF0_TSYNC,	GPIO_FN_MSIOF0_TSCK,
--	GPIO_FN_MSIOF0_RXD,	GPIO_FN_MSIOF0_RSCK,
--	GPIO_FN_MSIOF0_RSYNC,	GPIO_FN_MSIOF0_MCK0,
--	GPIO_FN_MSIOF0_MCK1,	GPIO_FN_MSIOF0_SS1,
--	GPIO_FN_MSIOF0_SS2,	GPIO_FN_MSIOF0_TXD,
--
--	/*
--	 * MSIOF1	(PORT 39, 40, 41, 42, 43, 44
--	 * 		      84, 85, 86, 87, 88, 89, 90, 91, 92, 93)
--	 */
--	GPIO_FN_MSIOF1_TSCK_39,	GPIO_FN_MSIOF1_TSYNC_40,
--	GPIO_FN_MSIOF1_TSCK_88,	GPIO_FN_MSIOF1_TSYNC_89,
--	GPIO_FN_MSIOF1_TXD_41,	GPIO_FN_MSIOF1_RXD_42,
--	GPIO_FN_MSIOF1_TXD_90,	GPIO_FN_MSIOF1_RXD_91,
--	GPIO_FN_MSIOF1_SS1_43,	GPIO_FN_MSIOF1_SS2_44,
--	GPIO_FN_MSIOF1_SS1_92,	GPIO_FN_MSIOF1_SS2_93,
--	GPIO_FN_MSIOF1_RSCK,	GPIO_FN_MSIOF1_RSYNC,
--	GPIO_FN_MSIOF1_MCK0,	GPIO_FN_MSIOF1_MCK1,
--
--	/*
--	 * MSIOF2	(PORT 134, 135, 136, 137, 138, 139
--	 *		      148, 149, 150, 151)
--	 */
--	GPIO_FN_MSIOF2_RSCK,	GPIO_FN_MSIOF2_RSYNC,
--	GPIO_FN_MSIOF2_MCK0,	GPIO_FN_MSIOF2_MCK1,
--	GPIO_FN_MSIOF2_SS1,	GPIO_FN_MSIOF2_SS2,
--	GPIO_FN_MSIOF2_TSYNC,	GPIO_FN_MSIOF2_TSCK,
--	GPIO_FN_MSIOF2_RXD,	GPIO_FN_MSIOF2_TXD,
--
--	/* MSIOF3	(PORT 76, 77, 78, 79, 80, 81, 82, 83) */
--	GPIO_FN_BBIF1_RXD,	GPIO_FN_BBIF1_TSYNC,
--	GPIO_FN_BBIF1_TSCK,	GPIO_FN_BBIF1_TXD,
--	GPIO_FN_BBIF1_RSCK,	GPIO_FN_BBIF1_RSYNC,
--	GPIO_FN_BBIF1_FLOW,	GPIO_FN_BB_RX_FLOW_N,
--
--	/* MSIOF4	(PORT 0, 1, 2, 3) */
--	GPIO_FN_BBIF2_TSCK1,	GPIO_FN_BBIF2_TSYNC1,
--	GPIO_FN_BBIF2_TXD1,	GPIO_FN_BBIF2_RXD,
--
--	/* FSI		(PORT 4, 5, 6, 7, 8, 9, 10, 11, 15) */
--	GPIO_FN_FSIACK,		GPIO_FN_FSIBCK,
--	GPIO_FN_FSIAILR,	GPIO_FN_FSIAIBT,
--	GPIO_FN_FSIAISLD,	GPIO_FN_FSIAOMC,
--	GPIO_FN_FSIAOLR,	GPIO_FN_FSIAOBT,
--	GPIO_FN_FSIAOSLD,	GPIO_FN_FSIASPDIF_11,
--	GPIO_FN_FSIASPDIF_15,
--
--	/* FMSI		(PORT 12, 13, 14, 15, 16, 17, 18, 65) */
--	GPIO_FN_FMSOCK,		GPIO_FN_FMSOOLR,
--	GPIO_FN_FMSIOLR,	GPIO_FN_FMSOOBT,
--	GPIO_FN_FMSIOBT,	GPIO_FN_FMSOSLD,
--	GPIO_FN_FMSOILR,	GPIO_FN_FMSIILR,
--	GPIO_FN_FMSOIBT,	GPIO_FN_FMSIIBT,
--	GPIO_FN_FMSISLD,	GPIO_FN_FMSICK,
--
--	/* SCIFA0	(PORT 152, 153, 156, 157, 158) */
--	GPIO_FN_SCIFA0_TXD,	GPIO_FN_SCIFA0_RXD,
--	GPIO_FN_SCIFA0_SCK,	GPIO_FN_SCIFA0_RTS,
--	GPIO_FN_SCIFA0_CTS,
--
--	/* SCIFA1	(PORT 154, 155, 159, 160, 161) */
--	GPIO_FN_SCIFA1_TXD,	GPIO_FN_SCIFA1_RXD,
--	GPIO_FN_SCIFA1_SCK,	GPIO_FN_SCIFA1_RTS,
--	GPIO_FN_SCIFA1_CTS,
--
--	/* SCIFA2	(PORT 94, 95, 96, 97, 98) */
--	GPIO_FN_SCIFA2_CTS1,	GPIO_FN_SCIFA2_RTS1,
--	GPIO_FN_SCIFA2_TXD1,	GPIO_FN_SCIFA2_RXD1,
--	GPIO_FN_SCIFA2_SCK1,
--
--	/* SCIFA3	(PORT 43, 44,
--			     140, 141, 142, 143, 144) */
--	GPIO_FN_SCIFA3_CTS_43,	GPIO_FN_SCIFA3_CTS_140,
--	GPIO_FN_SCIFA3_RTS_44,	GPIO_FN_SCIFA3_RTS_141,
--	GPIO_FN_SCIFA3_SCK,	GPIO_FN_SCIFA3_TXD,
--	GPIO_FN_SCIFA3_RXD,
--
--	/* SCIFA4	(PORT 5, 6) */
--	GPIO_FN_SCIFA4_RXD,	GPIO_FN_SCIFA4_TXD,
--
--	/* SCIFA5	(PORT 8, 12) */
--	GPIO_FN_SCIFA5_RXD,	GPIO_FN_SCIFA5_TXD,
--
--	/* SCIFB	(PORT 162, 163, 164, 165, 166) */
--	GPIO_FN_SCIFB_SCK,	GPIO_FN_SCIFB_RTS,
--	GPIO_FN_SCIFB_CTS,	GPIO_FN_SCIFB_TXD,
--	GPIO_FN_SCIFB_RXD,
--
--	/*
--	 * CEU		(PORT 16, 17,
--	 *		      100, 101, 102, 103, 104, 105, 106, 107, 108, 109,
--	 *		      110, 111, 112, 113, 114, 115, 116, 117, 118, 119,
--	 *		      120)
--	 */
--	GPIO_FN_VIO_HD,		GPIO_FN_VIO_CKO1,	GPIO_FN_VIO_CKO2,
--	GPIO_FN_VIO_VD,		GPIO_FN_VIO_CLK,	GPIO_FN_VIO_FIELD,
--	GPIO_FN_VIO_CKO,
--	GPIO_FN_VIO_D0,		GPIO_FN_VIO_D1,		GPIO_FN_VIO_D2,
--	GPIO_FN_VIO_D3,		GPIO_FN_VIO_D4,		GPIO_FN_VIO_D5,
--	GPIO_FN_VIO_D6,		GPIO_FN_VIO_D7,		GPIO_FN_VIO_D8,
--	GPIO_FN_VIO_D9,		GPIO_FN_VIO_D10,	GPIO_FN_VIO_D11,
--	GPIO_FN_VIO_D12,	GPIO_FN_VIO_D13,	GPIO_FN_VIO_D14,
--	GPIO_FN_VIO_D15,
--
--	/* USB0		(PORT 113, 114, 115, 116, 117, 167) */
--	GPIO_FN_IDIN_0,		GPIO_FN_EXTLP_0,
--	GPIO_FN_OVCN2_0,	GPIO_FN_PWEN_0,
--	GPIO_FN_OVCN_0,		GPIO_FN_VBUS0_0,
--
--	/* USB1		(PORT 18, 113, 114, 115, 116, 117, 138, 162, 168) */
--	GPIO_FN_IDIN_1_18,	GPIO_FN_IDIN_1_113,
--	GPIO_FN_PWEN_1_115,	GPIO_FN_PWEN_1_138,
--	GPIO_FN_OVCN_1_114,	GPIO_FN_OVCN_1_162,
--	GPIO_FN_EXTLP_1,	GPIO_FN_OVCN2_1,
--	GPIO_FN_VBUS0_1,
--
--	/* GPIO		(PORT 41, 42, 43, 44) */
--	GPIO_FN_GPI0,	GPIO_FN_GPI1,	GPIO_FN_GPO0,	GPIO_FN_GPO1,
--
--	/*
--	 * BSC		(PORT 19,
--	 *		      20, 21, 22, 25, 26, 27, 28, 29,
--	 *		      30, 31, 32, 33, 34, 35, 36, 37, 38, 39,
--	 *		      40, 41, 42, 43, 44, 45,
--	 *		      62, 63, 64, 65, 66, 67,
--	 *		      71, 72, 74, 75)
--	 */
--	GPIO_FN_BS,	GPIO_FN_WE1,
--	GPIO_FN_CKO,	GPIO_FN_WAIT,	GPIO_FN_RDWR,
--
--	GPIO_FN_A0,	GPIO_FN_A1,	GPIO_FN_A2,	GPIO_FN_A3,
--	GPIO_FN_A6,	GPIO_FN_A7,	GPIO_FN_A8,	GPIO_FN_A9,
--	GPIO_FN_A10,	GPIO_FN_A11,	GPIO_FN_A12,	GPIO_FN_A13,
--	GPIO_FN_A14,	GPIO_FN_A15,	GPIO_FN_A16,	GPIO_FN_A17,
--	GPIO_FN_A18,	GPIO_FN_A19,	GPIO_FN_A20,	GPIO_FN_A21,
--	GPIO_FN_A22,	GPIO_FN_A23,	GPIO_FN_A24,	GPIO_FN_A25,
--	GPIO_FN_A26,
--
--	GPIO_FN_CS0,	GPIO_FN_CS2,	GPIO_FN_CS4,
--	GPIO_FN_CS5A,	GPIO_FN_CS5B,	GPIO_FN_CS6A,
--
--	/*
--	 * BSC/FLCTL		(PORT 23, 24,
--	 *			      46, 47, 48, 49,
--	 *			      50, 51, 52, 53, 54, 55, 56, 57, 58, 59,
--	 *			      60, 61, 69, 70)
--	 */
--	GPIO_FN_RD_FSC,		GPIO_FN_WE0_FWE,
--	GPIO_FN_A4_FOE,		GPIO_FN_A5_FCDE,
--	GPIO_FN_D0_NAF0,	GPIO_FN_D1_NAF1,	GPIO_FN_D2_NAF2,
--	GPIO_FN_D3_NAF3,	GPIO_FN_D4_NAF4,	GPIO_FN_D5_NAF5,
--	GPIO_FN_D6_NAF6,	GPIO_FN_D7_NAF7,	GPIO_FN_D8_NAF8,
--	GPIO_FN_D9_NAF9,	GPIO_FN_D10_NAF10,	GPIO_FN_D11_NAF11,
--	GPIO_FN_D12_NAF12,	GPIO_FN_D13_NAF13,	GPIO_FN_D14_NAF14,
--	GPIO_FN_D15_NAF15,
--
--	/* SPU2		(PORT 65) */
--	GPIO_FN_VINT_I,
--
--	/* FLCTL	(PORT 66, 68, 73) */
--	GPIO_FN_FCE1,	GPIO_FN_FCE0,	GPIO_FN_FRB,
--
--	/* HSI		(PORT 76, 77, 78, 79, 80, 81, 82, 83) */
--	GPIO_FN_GP_RX_FLAG,	GPIO_FN_GP_RX_DATA,	GPIO_FN_GP_TX_READY,
--	GPIO_FN_GP_RX_WAKE,	GPIO_FN_MP_TX_FLAG,	GPIO_FN_MP_TX_DATA,
--	GPIO_FN_MP_RX_READY,	GPIO_FN_MP_TX_WAKE,
--
--	/*
--	 * MFI		(PORT 76, 77, 78, 79,
--	 *		      80, 81, 82, 83, 84, 85, 86, 87, 88, 89,
--	 *		      90, 91, 92, 93, 94, 95, 96, 97, 98, 99)
--	 */
--	GPIO_FN_MFIv6,	/* see MSEL4CR 6 */
--	GPIO_FN_MFIv4,	/* see MSEL4CR 6 */
--
--	GPIO_FN_MEMC_CS0,		GPIO_FN_MEMC_BUSCLK_MEMC_A0,
--	GPIO_FN_MEMC_CS1_MEMC_A1,	GPIO_FN_MEMC_ADV_MEMC_DREQ0,
--	GPIO_FN_MEMC_WAIT_MEMC_DREQ1,	GPIO_FN_MEMC_NOE,
--	GPIO_FN_MEMC_NWE,		GPIO_FN_MEMC_INT,
--
--	GPIO_FN_MEMC_AD0,	GPIO_FN_MEMC_AD1,	GPIO_FN_MEMC_AD2,
--	GPIO_FN_MEMC_AD3,	GPIO_FN_MEMC_AD4,	GPIO_FN_MEMC_AD5,
--	GPIO_FN_MEMC_AD6,	GPIO_FN_MEMC_AD7,	GPIO_FN_MEMC_AD8,
--	GPIO_FN_MEMC_AD9,	GPIO_FN_MEMC_AD10,	GPIO_FN_MEMC_AD11,
--	GPIO_FN_MEMC_AD12,	GPIO_FN_MEMC_AD13,	GPIO_FN_MEMC_AD14,
--	GPIO_FN_MEMC_AD15,
--
--	/* SIM		(PORT 94, 95, 98) */
--	GPIO_FN_SIM_RST,	GPIO_FN_SIM_CLK,	GPIO_FN_SIM_D,
--
--	/* TPU		(PORT 93, 99, 112, 160, 161) */
--	GPIO_FN_TPU0TO0,	GPIO_FN_TPU0TO1,
--	GPIO_FN_TPU0TO2_93,	GPIO_FN_TPU0TO2_99,
--	GPIO_FN_TPU0TO3,
--
--	/* I2C2		(PORT 110, 111) */
--	GPIO_FN_I2C_SCL2,	GPIO_FN_I2C_SDA2,
--
--	/* I2C3(1)	(PORT 114, 115) */
--	GPIO_FN_I2C_SCL3,	GPIO_FN_I2C_SDA3,
--
--	/* I2C3(2)	(PORT 137, 145) */
--	GPIO_FN_I2C_SCL3S,	GPIO_FN_I2C_SDA3S,
--
--	/* I2C4(2)	(PORT 116, 117) */
--	GPIO_FN_I2C_SCL4,	GPIO_FN_I2C_SDA4,
--
--	/* I2C4(2)	(PORT 146, 147) */
--	GPIO_FN_I2C_SCL4S,	GPIO_FN_I2C_SDA4S,
--
--	/*
--	 * KEYSC	(PORT 121, 122, 123, 124, 125, 126, 127, 128, 129,
--	 *		      130, 131, 132, 133, 134, 135, 136)
--	 */
--	GPIO_FN_KEYOUT0,	GPIO_FN_KEYIN0_121,	GPIO_FN_KEYIN0_136,
--	GPIO_FN_KEYOUT1,	GPIO_FN_KEYIN1_122,	GPIO_FN_KEYIN1_135,
--	GPIO_FN_KEYOUT2,	GPIO_FN_KEYIN2_123,	GPIO_FN_KEYIN2_134,
--	GPIO_FN_KEYOUT3,	GPIO_FN_KEYIN3_124,	GPIO_FN_KEYIN3_133,
--	GPIO_FN_KEYOUT4,	GPIO_FN_KEYIN4,
--	GPIO_FN_KEYOUT5,	GPIO_FN_KEYIN5,
--	GPIO_FN_KEYOUT6,	GPIO_FN_KEYIN6,
--	GPIO_FN_KEYOUT7,	GPIO_FN_KEYIN7,
--
--	/*
--	 * LCDC		(PORT      121, 122, 123, 124, 125, 126, 127, 128, 129,
--	 *		      130, 131, 132, 133, 134, 135, 136, 137, 138, 139,
--	 *		      140, 141, 142, 143, 144, 145, 146, 147, 148, 149,
--	 *		      150, 151)
--	 */
--	GPIO_FN_LCDC0_SELECT, /* LCDC 0 */
--	GPIO_FN_LCDC1_SELECT, /* LCDC 1 */
--	GPIO_FN_LCDHSYN,	GPIO_FN_LCDCS,	GPIO_FN_LCDVSYN,
--	GPIO_FN_LCDDCK,		GPIO_FN_LCDWR,	GPIO_FN_LCDRD,
--	GPIO_FN_LCDDISP,	GPIO_FN_LCDRS,	GPIO_FN_LCDLCLK,
--	GPIO_FN_LCDDON,
--
--	GPIO_FN_LCDD0,	GPIO_FN_LCDD1,	GPIO_FN_LCDD2,	GPIO_FN_LCDD3,
--	GPIO_FN_LCDD4,	GPIO_FN_LCDD5,	GPIO_FN_LCDD6,	GPIO_FN_LCDD7,
--	GPIO_FN_LCDD8,	GPIO_FN_LCDD9,	GPIO_FN_LCDD10,	GPIO_FN_LCDD11,
--	GPIO_FN_LCDD12,	GPIO_FN_LCDD13,	GPIO_FN_LCDD14,	GPIO_FN_LCDD15,
--	GPIO_FN_LCDD16,	GPIO_FN_LCDD17,	GPIO_FN_LCDD18,	GPIO_FN_LCDD19,
--	GPIO_FN_LCDD20,	GPIO_FN_LCDD21,	GPIO_FN_LCDD22,	GPIO_FN_LCDD23,
--
--	/* IRDA		(PORT 139, 140, 141, 142) */
--	GPIO_FN_IRDA_OUT,	GPIO_FN_IRDA_IN,	GPIO_FN_IRDA_FIRSEL,
--	GPIO_FN_IROUT_139,	GPIO_FN_IROUT_140,
--
--	/* TSIF1	(PORT 156, 157, 158, 159) */
--	GPIO_FN_TS0_1SELECT, /* TSIF0 - 1 select */
--	GPIO_FN_TS0_2SELECT, /* TSIF0 - 2 select */
--	GPIO_FN_TS1_1SELECT, /* TSIF1 - 1 select */
--	GPIO_FN_TS1_2SELECT, /* TSIF1 - 2 select */
--
--	GPIO_FN_TS_SPSYNC1,	GPIO_FN_TS_SDAT1,
--	GPIO_FN_TS_SDEN1,	GPIO_FN_TS_SCK1,
--
--	/* TSIF2	(PORT 137, 145, 146, 147) */
--	GPIO_FN_TS_SPSYNC2,	GPIO_FN_TS_SDAT2,
--	GPIO_FN_TS_SDEN2,	GPIO_FN_TS_SCK2,
--
--	/* HDMI		(PORT 169, 170) */
--	GPIO_FN_HDMI_HPD,	GPIO_FN_HDMI_CEC,
--
--	/* SDENC	see MSEL4CR 19 */
--	GPIO_FN_SDENC_CPG,
--	GPIO_FN_SDENC_DV_CLKI,
--};
--
- /* DMA slave IDs */
- enum {
- 	SHDMA_SLAVE_INVALID,
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0133-ARM-shmobile-lager-tidyup-DT-node-naming.patch b/patches.renesas/0133-ARM-shmobile-lager-tidyup-DT-node-naming.patch
deleted file mode 100644
index b44b02fc5b4be..0000000000000
--- a/patches.renesas/0133-ARM-shmobile-lager-tidyup-DT-node-naming.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From 0c12295dc6e9979785377407f146b5c8d3bc7315 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Mon, 21 Oct 2013 19:38:16 -0700
-Subject: ARM: shmobile: lager: tidyup DT node naming
-
-According to ePAPR spec,
-this patch tidies up DT node name.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit f56d51fcafcb222b7cf8cdd17eedb516f3197639)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7790-lager-reference.dts | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/arch/arm/boot/dts/r8a7790-lager-reference.dts b/arch/arm/boot/dts/r8a7790-lager-reference.dts
-index 75730f5d1477..ec82674d8033 100644
---- a/arch/arm/boot/dts/r8a7790-lager-reference.dts
-+++ b/arch/arm/boot/dts/r8a7790-lager-reference.dts
-@@ -57,12 +57,12 @@
- 	pinctrl-0 = <&scif0_pins &scif1_pins>;
- 	pinctrl-names = "default";
- 
--	scif0_pins: scif0 {
-+	scif0_pins: serial0 {
- 		renesas,groups = "scif0_data";
- 		renesas,function = "scif0";
- 	};
- 
--	scif1_pins: scif1 {
-+	scif1_pins: serial1 {
- 		renesas,groups = "scif1_data";
- 		renesas,function = "scif1";
- 	};
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0133-ARM-shmobile-r8a7778-cleanup-registration-of-vin.patch b/patches.renesas/0133-ARM-shmobile-r8a7778-cleanup-registration-of-vin.patch
deleted file mode 100644
index edbc91dd6a89c..0000000000000
--- a/patches.renesas/0133-ARM-shmobile-r8a7778-cleanup-registration-of-vin.patch
+++ /dev/null
@@ -1,146 +0,0 @@
-From 72e326cb70881c0df16b8d9b9fad12cbd4eac886 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Mon, 23 Sep 2013 23:04:10 -0700
-Subject: ARM: shmobile: r8a7778: cleanup registration of vin
-
-vin driver which needs platform data at the time of
-registration is used from BockW only.
-Now, ARM/shmobile aims to support DT,
-and the C code base board support will be removed
-if DT support is completed.
-Current driver registration method which needs platform data
-and which is not shared complicates codes.
-This means legacy C code cleanup after DT supporting
-will be more complicated
-This patch registers it on board code as cleanup C code
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit fd131d0d4024a39259c41290451e728515ed7300)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-bockw.c          | 32 ++++++++++++++++++++-----
- arch/arm/mach-shmobile/include/mach/r8a7778.h |  2 --
- arch/arm/mach-shmobile/setup-r8a7778.c        | 34 ---------------------------
- 3 files changed, 26 insertions(+), 42 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-bockw.c b/arch/arm/mach-shmobile/board-bockw.c
-index 6b9faf3908f7..4b696ce0bae6 100644
---- a/arch/arm/mach-shmobile/board-bockw.c
-+++ b/arch/arm/mach-shmobile/board-bockw.c
-@@ -162,10 +162,6 @@ static struct sh_mmcif_plat_data sh_mmcif_plat __initdata = {
- 			  MMC_CAP_NEEDS_POLL,
- };
- 
--static struct rcar_vin_platform_data vin_platform_data __initdata = {
--	.flags	= RCAR_VIN_BT656,
--};
--
- /* In the default configuration both decoders reside on I2C bus 0 */
- #define BOCKW_CAMERA(idx)						\
- static struct i2c_board_info camera##idx##_info = {			\
-@@ -181,6 +177,30 @@ static struct soc_camera_link iclink##idx##_ml86v7667 __initdata = {	\
- BOCKW_CAMERA(0);
- BOCKW_CAMERA(1);
- 
-+/* VIN */
-+static struct rcar_vin_platform_data vin_platform_data __initdata = {
-+	.flags	= RCAR_VIN_BT656,
-+};
-+
-+#define R8A7778_VIN(idx)						\
-+static struct resource vin##idx##_resources[] __initdata = {		\
-+	DEFINE_RES_MEM(0xffc50000 + 0x1000 * (idx), 0x1000),		\
-+	DEFINE_RES_IRQ(gic_iid(0x5a)),					\
-+};									\
-+									\
-+static struct platform_device_info vin##idx##_info __initdata = {	\
-+	.parent		= &platform_bus,				\
-+	.name		= "r8a7778-vin",				\
-+	.id		= idx,						\
-+	.res		= vin##idx##_resources,				\
-+	.num_res	= ARRAY_SIZE(vin##idx##_resources),		\
-+	.dma_mask	= DMA_BIT_MASK(32),				\
-+	.data		= &vin_platform_data,				\
-+	.size_data	= sizeof(vin_platform_data),			\
-+}
-+R8A7778_VIN(0);
-+R8A7778_VIN(1);
-+
- static const struct pinctrl_map bockw_pinctrl_map[] = {
- 	/* Ether */
- 	PIN_MAP_MUX_GROUP_DEFAULT("r8a777x-ether", "pfc-r8a7778",
-@@ -236,10 +256,10 @@ static void __init bockw_init(void)
- 	r8a7778_init_irq_extpin(1);
- 	r8a7778_add_standard_devices();
- 	r8a7778_add_ether_device(&ether_platform_data);
--	r8a7778_add_vin_device(0, &vin_platform_data);
-+	platform_device_register_full(&vin0_info);
- 	/* VIN1 has a pin conflict with Ether */
- 	if (!IS_ENABLED(CONFIG_SH_ETH))
--		r8a7778_add_vin_device(1, &vin_platform_data);
-+		platform_device_register_full(&vin1_info);
- 	platform_device_register_data(&platform_bus, "soc-camera-pdrv", 0,
- 				      &iclink0_ml86v7667,
- 				      sizeof(iclink0_ml86v7667));
-diff --git a/arch/arm/mach-shmobile/include/mach/r8a7778.h b/arch/arm/mach-shmobile/include/mach/r8a7778.h
-index adfcf51b163d..9838608363c2 100644
---- a/arch/arm/mach-shmobile/include/mach/r8a7778.h
-+++ b/arch/arm/mach-shmobile/include/mach/r8a7778.h
-@@ -24,8 +24,6 @@
- extern void r8a7778_add_standard_devices(void);
- extern void r8a7778_add_standard_devices_dt(void);
- extern void r8a7778_add_ether_device(struct sh_eth_plat_data *pdata);
--extern void r8a7778_add_vin_device(int id,
--				   struct rcar_vin_platform_data *pdata);
- extern void r8a7778_add_dt_devices(void);
- 
- extern void r8a7778_init_late(void);
-diff --git a/arch/arm/mach-shmobile/setup-r8a7778.c b/arch/arm/mach-shmobile/setup-r8a7778.c
-index 6a2657ebd197..604cf36b5616 100644
---- a/arch/arm/mach-shmobile/setup-r8a7778.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7778.c
-@@ -281,40 +281,6 @@ void __init r8a7778_register_hspi(int id)
- 		hspi_resources + (2 * id), 2);
- }
- 
--/* VIN */
--#define R8A7778_VIN(idx)						\
--static struct resource vin##idx##_resources[] __initdata = {		\
--	DEFINE_RES_MEM(0xffc50000 + 0x1000 * (idx), 0x1000),		\
--	DEFINE_RES_IRQ(gic_iid(0x5a)),					\
--};									\
--									\
--static struct platform_device_info vin##idx##_info __initdata = {	\
--	.parent		= &platform_bus,				\
--	.name		= "r8a7778-vin",				\
--	.id		= idx,						\
--	.res		= vin##idx##_resources,				\
--	.num_res	= ARRAY_SIZE(vin##idx##_resources),		\
--	.dma_mask	= DMA_BIT_MASK(32),				\
--}
--
--R8A7778_VIN(0);
--R8A7778_VIN(1);
--
--static struct platform_device_info *vin_info_table[] __initdata = {
--	&vin0_info,
--	&vin1_info,
--};
--
--void __init r8a7778_add_vin_device(int id, struct rcar_vin_platform_data *pdata)
--{
--	BUG_ON(id < 0 || id > 1);
--
--	vin_info_table[id]->data = pdata;
--	vin_info_table[id]->size_data = sizeof(*pdata);
--
--	platform_device_register_full(vin_info_table[id]);
--}
--
- void __init r8a7778_add_dt_devices(void)
- {
- 	int i;
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0133-sh-pfc-sh7372-Add-bias-pull-up-down-pinconf-support.patch b/patches.renesas/0133-sh-pfc-sh7372-Add-bias-pull-up-down-pinconf-support.patch
deleted file mode 100644
index 9ef2ed78df061..0000000000000
--- a/patches.renesas/0133-sh-pfc-sh7372-Add-bias-pull-up-down-pinconf-support.patch
+++ /dev/null
@@ -1,412 +0,0 @@
-From fe658d9b572e0387bd29618710eb2fbc2abe05f4 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 23 Apr 2013 14:24:19 +0200
-Subject: sh-pfc: sh7372: Add bias (pull-up/down) pinconf support
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 7cacd755594ea9347fb83dcb23d2f44c371747dd)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-sh7372.c | 341 ++++++++++++++++++++++--------------
- 1 file changed, 211 insertions(+), 130 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7372.c b/drivers/pinctrl/sh-pfc/pfc-sh7372.c
-index 94960670..6dfb1877 100644
---- a/drivers/pinctrl/sh-pfc/pfc-sh7372.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-sh7372.c
-@@ -20,10 +20,14 @@
-  * along with this program; if not, write to the Free Software
-  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
-  */
-+#include <linux/io.h>
- #include <linux/kernel.h>
-+#include <linux/pinctrl/pinconf-generic.h>
-+
- #include <mach/irqs.h>
- #include <mach/sh7372.h>
- 
-+#include "core.h"
- #include "sh_pfc.h"
- 
- #define CPU_ALL_PORT(fn, pfx, sfx) \
-@@ -76,16 +80,6 @@ enum {
- 	PORT_ALL(IN),
- 	PINMUX_INPUT_END,
- 
--	/* PORT0_IN_PU -> PORT190_IN_PU */
--	PINMUX_INPUT_PULLUP_BEGIN,
--	PORT_ALL(IN_PU),
--	PINMUX_INPUT_PULLUP_END,
--
--	/* PORT0_IN_PD -> PORT190_IN_PD */
--	PINMUX_INPUT_PULLDOWN_BEGIN,
--	PORT_ALL(IN_PD),
--	PINMUX_INPUT_PULLDOWN_END,
--
- 	/* PORT0_OUT -> PORT190_OUT */
- 	PINMUX_OUTPUT_BEGIN,
- 	PORT_ALL(OUT),
-@@ -397,124 +391,11 @@ enum {
- 	PINMUX_MARK_END,
- };
- 
--static const pinmux_enum_t pinmux_data[] = {
-+#define _PORT_DATA(pfx, sfx)	PORT_DATA_IO(pfx)
-+#define PINMUX_DATA_GP_ALL()	CPU_ALL_PORT(_PORT_DATA, , unused)
- 
--	/* specify valid pin states for each pin in GPIO mode */
--	PORT_DATA_IO_PD(0),		PORT_DATA_IO_PD(1),
--	PORT_DATA_O(2),			PORT_DATA_I_PD(3),
--	PORT_DATA_I_PD(4),		PORT_DATA_I_PD(5),
--	PORT_DATA_IO_PU_PD(6),		PORT_DATA_I_PD(7),
--	PORT_DATA_IO_PD(8),		PORT_DATA_O(9),
--
--	PORT_DATA_O(10),		PORT_DATA_O(11),
--	PORT_DATA_IO_PU_PD(12),		PORT_DATA_IO_PD(13),
--	PORT_DATA_IO_PD(14),		PORT_DATA_O(15),
--	PORT_DATA_IO_PD(16),		PORT_DATA_IO_PD(17),
--	PORT_DATA_I_PD(18),		PORT_DATA_IO(19),
--
--	PORT_DATA_IO(20),		PORT_DATA_IO(21),
--	PORT_DATA_IO(22),		PORT_DATA_IO(23),
--	PORT_DATA_IO(24),		PORT_DATA_IO(25),
--	PORT_DATA_IO(26),		PORT_DATA_IO(27),
--	PORT_DATA_IO(28),		PORT_DATA_IO(29),
--
--	PORT_DATA_IO(30),		PORT_DATA_IO(31),
--	PORT_DATA_IO(32),		PORT_DATA_IO(33),
--	PORT_DATA_IO(34),		PORT_DATA_IO(35),
--	PORT_DATA_IO(36),		PORT_DATA_IO(37),
--	PORT_DATA_IO(38),		PORT_DATA_IO(39),
--
--	PORT_DATA_IO(40),		PORT_DATA_IO(41),
--	PORT_DATA_IO(42),		PORT_DATA_IO(43),
--	PORT_DATA_IO(44),		PORT_DATA_IO(45),
--	PORT_DATA_IO_PU(46),		PORT_DATA_IO_PU(47),
--	PORT_DATA_IO_PU(48),		PORT_DATA_IO_PU(49),
--
--	PORT_DATA_IO_PU(50),		PORT_DATA_IO_PU(51),
--	PORT_DATA_IO_PU(52),		PORT_DATA_IO_PU(53),
--	PORT_DATA_IO_PU(54),		PORT_DATA_IO_PU(55),
--	PORT_DATA_IO_PU(56),		PORT_DATA_IO_PU(57),
--	PORT_DATA_IO_PU(58),		PORT_DATA_IO_PU(59),
--
--	PORT_DATA_IO_PU(60),		PORT_DATA_IO_PU(61),
--	PORT_DATA_IO(62),		PORT_DATA_O(63),
--	PORT_DATA_O(64),		PORT_DATA_IO_PU(65),
--	PORT_DATA_O(66),		PORT_DATA_IO_PU(67),  /*66?*/
--	PORT_DATA_O(68),		PORT_DATA_IO(69),
--
--	PORT_DATA_IO(70),		PORT_DATA_IO(71),
--	PORT_DATA_O(72),		PORT_DATA_I_PU(73),
--	PORT_DATA_I_PU_PD(74),		PORT_DATA_IO_PU_PD(75),
--	PORT_DATA_IO_PU_PD(76),		PORT_DATA_IO_PU_PD(77),
--	PORT_DATA_IO_PU_PD(78),		PORT_DATA_IO_PU_PD(79),
--
--	PORT_DATA_IO_PU_PD(80),		PORT_DATA_IO_PU_PD(81),
--	PORT_DATA_IO_PU_PD(82),		PORT_DATA_IO_PU_PD(83),
--	PORT_DATA_IO_PU_PD(84),		PORT_DATA_IO_PU_PD(85),
--	PORT_DATA_IO_PU_PD(86),		PORT_DATA_IO_PU_PD(87),
--	PORT_DATA_IO_PU_PD(88),		PORT_DATA_IO_PU_PD(89),
--
--	PORT_DATA_IO_PU_PD(90),		PORT_DATA_IO_PU_PD(91),
--	PORT_DATA_IO_PU_PD(92),		PORT_DATA_IO_PU_PD(93),
--	PORT_DATA_IO_PU_PD(94),		PORT_DATA_IO_PU_PD(95),
--	PORT_DATA_IO_PU(96),		PORT_DATA_IO_PU_PD(97),
--	PORT_DATA_IO_PU_PD(98),		PORT_DATA_O(99), /*99?*/
--
--	PORT_DATA_IO_PD(100),		PORT_DATA_IO_PD(101),
--	PORT_DATA_IO_PD(102),		PORT_DATA_IO_PD(103),
--	PORT_DATA_IO_PD(104),		PORT_DATA_IO_PD(105),
--	PORT_DATA_IO_PU(106),		PORT_DATA_IO_PU(107),
--	PORT_DATA_IO_PU(108),		PORT_DATA_IO_PU(109),
--
--	PORT_DATA_IO_PU(110),		PORT_DATA_IO_PU(111),
--	PORT_DATA_IO_PD(112),		PORT_DATA_IO_PD(113),
--	PORT_DATA_IO_PU(114),		PORT_DATA_IO_PU(115),
--	PORT_DATA_IO_PU(116),		PORT_DATA_IO_PU(117),
--	PORT_DATA_IO_PU(118),		PORT_DATA_IO_PU(119),
--
--	PORT_DATA_IO_PU(120),		PORT_DATA_IO_PD(121),
--	PORT_DATA_IO_PD(122),		PORT_DATA_IO_PD(123),
--	PORT_DATA_IO_PD(124),		PORT_DATA_IO_PD(125),
--	PORT_DATA_IO_PD(126),		PORT_DATA_IO_PD(127),
--	PORT_DATA_IO_PD(128),		PORT_DATA_IO_PU_PD(129),
--
--	PORT_DATA_IO_PU_PD(130),	PORT_DATA_IO_PU_PD(131),
--	PORT_DATA_IO_PU_PD(132),	PORT_DATA_IO_PU_PD(133),
--	PORT_DATA_IO_PU_PD(134),	PORT_DATA_IO_PU_PD(135),
--	PORT_DATA_IO_PD(136),		PORT_DATA_IO_PD(137),
--	PORT_DATA_IO_PD(138),		PORT_DATA_IO_PD(139),
--
--	PORT_DATA_IO_PD(140),		PORT_DATA_IO_PD(141),
--	PORT_DATA_IO_PD(142),		PORT_DATA_IO_PU_PD(143),
--	PORT_DATA_IO_PD(144),		PORT_DATA_IO_PD(145),
--	PORT_DATA_IO_PD(146),		PORT_DATA_IO_PD(147),
--	PORT_DATA_IO_PD(148),		PORT_DATA_IO_PD(149),
--
--	PORT_DATA_IO_PD(150),		PORT_DATA_IO_PD(151),
--	PORT_DATA_IO_PU_PD(152),	PORT_DATA_I_PD(153),
--	PORT_DATA_IO_PU_PD(154),	PORT_DATA_I_PD(155),
--	PORT_DATA_IO_PD(156),		PORT_DATA_IO_PD(157),
--	PORT_DATA_I_PD(158),		PORT_DATA_IO_PD(159),
--
--	PORT_DATA_O(160),		PORT_DATA_IO_PD(161),
--	PORT_DATA_IO_PD(162),		PORT_DATA_IO_PD(163),
--	PORT_DATA_I_PD(164),		PORT_DATA_IO_PD(165),
--	PORT_DATA_I_PD(166),		PORT_DATA_I_PD(167),
--	PORT_DATA_I_PD(168),		PORT_DATA_I_PD(169),
--
--	PORT_DATA_I_PD(170),		PORT_DATA_O(171),
--	PORT_DATA_IO_PU_PD(172),	PORT_DATA_IO_PU_PD(173),
--	PORT_DATA_IO_PU_PD(174),	PORT_DATA_IO_PU_PD(175),
--	PORT_DATA_IO_PU_PD(176),	PORT_DATA_IO_PU_PD(177),
--	PORT_DATA_IO_PU_PD(178),	PORT_DATA_O(179),
--
--	PORT_DATA_IO_PU_PD(180),	PORT_DATA_IO_PU_PD(181),
--	PORT_DATA_IO_PU_PD(182),	PORT_DATA_IO_PU_PD(183),
--	PORT_DATA_IO_PU_PD(184),	PORT_DATA_O(185),
--	PORT_DATA_IO_PU_PD(186),	PORT_DATA_IO_PU_PD(187),
--	PORT_DATA_IO_PU_PD(188),	PORT_DATA_IO_PU_PD(189),
--
--	PORT_DATA_IO_PU_PD(190),
-+static const pinmux_enum_t pinmux_data[] = {
-+	PINMUX_DATA_GP_ALL(),
- 
- 	/* IRQ */
- 	PINMUX_DATA(IRQ0_6_MARK,	PORT6_FN0, 	MSEL1CR_0_0),
-@@ -958,8 +839,128 @@ static const pinmux_enum_t pinmux_data[] = {
- 	PINMUX_DATA(MFIv4_MARK,		MSEL4CR_6_1),
- };
- 
-+#define SH7372_PIN(pin, cfgs)						\
-+	{								\
-+		.name = __stringify(PORT##pin),				\
-+		.enum_id = PORT##pin##_DATA,				\
-+		.configs = cfgs,					\
-+	}
-+
-+#define __I		(SH_PFC_PIN_CFG_INPUT)
-+#define __O		(SH_PFC_PIN_CFG_OUTPUT)
-+#define __IO		(SH_PFC_PIN_CFG_INPUT | SH_PFC_PIN_CFG_OUTPUT)
-+#define __PD		(SH_PFC_PIN_CFG_PULL_DOWN)
-+#define __PU		(SH_PFC_PIN_CFG_PULL_UP)
-+#define __PUD		(SH_PFC_PIN_CFG_PULL_DOWN | SH_PFC_PIN_CFG_PULL_UP)
-+
-+#define SH7372_PIN_I_PD(pin)		SH7372_PIN(pin, __I | __PD)
-+#define SH7372_PIN_I_PU(pin)		SH7372_PIN(pin, __I | __PU)
-+#define SH7372_PIN_I_PU_PD(pin)		SH7372_PIN(pin, __I | __PUD)
-+#define SH7372_PIN_IO(pin)		SH7372_PIN(pin, __IO)
-+#define SH7372_PIN_IO_PD(pin)		SH7372_PIN(pin, __IO | __PD)
-+#define SH7372_PIN_IO_PU(pin)		SH7372_PIN(pin, __IO | __PU)
-+#define SH7372_PIN_IO_PU_PD(pin)	SH7372_PIN(pin, __IO | __PUD)
-+#define SH7372_PIN_O(pin)		SH7372_PIN(pin, __O)
-+#define SH7372_PIN_O_PU_PD(pin)		SH7372_PIN(pin, __O | __PUD)
-+
- static struct sh_pfc_pin pinmux_pins[] = {
--	GPIO_PORT_ALL(),
-+	/* Table 57-1 (I/O and Pull U/D) */
-+	SH7372_PIN_IO_PD(0),		SH7372_PIN_IO_PD(1),
-+	SH7372_PIN_O(2),		SH7372_PIN_I_PD(3),
-+	SH7372_PIN_I_PD(4),		SH7372_PIN_I_PD(5),
-+	SH7372_PIN_IO_PU_PD(6),		SH7372_PIN_I_PD(7),
-+	SH7372_PIN_IO_PD(8),		SH7372_PIN_O(9),
-+	SH7372_PIN_O(10),		SH7372_PIN_O(11),
-+	SH7372_PIN_IO_PU_PD(12),	SH7372_PIN_IO_PD(13),
-+	SH7372_PIN_IO_PD(14),		SH7372_PIN_O(15),
-+	SH7372_PIN_IO_PD(16),		SH7372_PIN_IO_PD(17),
-+	SH7372_PIN_I_PD(18),		SH7372_PIN_IO(19),
-+	SH7372_PIN_IO(20),		SH7372_PIN_IO(21),
-+	SH7372_PIN_IO(22),		SH7372_PIN_IO(23),
-+	SH7372_PIN_IO(24),		SH7372_PIN_IO(25),
-+	SH7372_PIN_IO(26),		SH7372_PIN_IO(27),
-+	SH7372_PIN_IO(28),		SH7372_PIN_IO(29),
-+	SH7372_PIN_IO(30),		SH7372_PIN_IO(31),
-+	SH7372_PIN_IO(32),		SH7372_PIN_IO(33),
-+	SH7372_PIN_IO(34),		SH7372_PIN_IO(35),
-+	SH7372_PIN_IO(36),		SH7372_PIN_IO(37),
-+	SH7372_PIN_IO(38),		SH7372_PIN_IO(39),
-+	SH7372_PIN_IO(40),		SH7372_PIN_IO(41),
-+	SH7372_PIN_IO(42),		SH7372_PIN_IO(43),
-+	SH7372_PIN_IO(44),		SH7372_PIN_IO(45),
-+	SH7372_PIN_IO_PU(46),		SH7372_PIN_IO_PU(47),
-+	SH7372_PIN_IO_PU(48),		SH7372_PIN_IO_PU(49),
-+	SH7372_PIN_IO_PU(50),		SH7372_PIN_IO_PU(51),
-+	SH7372_PIN_IO_PU(52),		SH7372_PIN_IO_PU(53),
-+	SH7372_PIN_IO_PU(54),		SH7372_PIN_IO_PU(55),
-+	SH7372_PIN_IO_PU(56),		SH7372_PIN_IO_PU(57),
-+	SH7372_PIN_IO_PU(58),		SH7372_PIN_IO_PU(59),
-+	SH7372_PIN_IO_PU(60),		SH7372_PIN_IO_PU(61),
-+	SH7372_PIN_IO(62),		SH7372_PIN_O(63),
-+	SH7372_PIN_O(64),		SH7372_PIN_IO_PU(65),
-+	SH7372_PIN_O_PU_PD(66),		SH7372_PIN_IO_PU(67),
-+	SH7372_PIN_O(68),		SH7372_PIN_IO(69),
-+	SH7372_PIN_IO(70),		SH7372_PIN_IO(71),
-+	SH7372_PIN_O(72),		SH7372_PIN_I_PU(73),
-+	SH7372_PIN_I_PU_PD(74),		SH7372_PIN_IO_PU_PD(75),
-+	SH7372_PIN_IO_PU_PD(76),	SH7372_PIN_IO_PU_PD(77),
-+	SH7372_PIN_IO_PU_PD(78),	SH7372_PIN_IO_PU_PD(79),
-+	SH7372_PIN_IO_PU_PD(80),	SH7372_PIN_IO_PU_PD(81),
-+	SH7372_PIN_IO_PU_PD(82),	SH7372_PIN_IO_PU_PD(83),
-+	SH7372_PIN_IO_PU_PD(84),	SH7372_PIN_IO_PU_PD(85),
-+	SH7372_PIN_IO_PU_PD(86),	SH7372_PIN_IO_PU_PD(87),
-+	SH7372_PIN_IO_PU_PD(88),	SH7372_PIN_IO_PU_PD(89),
-+	SH7372_PIN_IO_PU_PD(90),	SH7372_PIN_IO_PU_PD(91),
-+	SH7372_PIN_IO_PU_PD(92),	SH7372_PIN_IO_PU_PD(93),
-+	SH7372_PIN_IO_PU_PD(94),	SH7372_PIN_IO_PU_PD(95),
-+	SH7372_PIN_IO_PU(96),		SH7372_PIN_IO_PU_PD(97),
-+	SH7372_PIN_IO_PU_PD(98),	SH7372_PIN_O_PU_PD(99),
-+	SH7372_PIN_IO_PD(100),		SH7372_PIN_IO_PD(101),
-+	SH7372_PIN_IO_PD(102),		SH7372_PIN_IO_PD(103),
-+	SH7372_PIN_IO_PD(104),		SH7372_PIN_IO_PD(105),
-+	SH7372_PIN_IO_PU(106),		SH7372_PIN_IO_PU(107),
-+	SH7372_PIN_IO_PU(108),		SH7372_PIN_IO_PU(109),
-+	SH7372_PIN_IO_PU(110),		SH7372_PIN_IO_PU(111),
-+	SH7372_PIN_IO_PD(112),		SH7372_PIN_IO_PD(113),
-+	SH7372_PIN_IO_PU(114),		SH7372_PIN_IO_PU(115),
-+	SH7372_PIN_IO_PU(116),		SH7372_PIN_IO_PU(117),
-+	SH7372_PIN_IO_PU(118),		SH7372_PIN_IO_PU(119),
-+	SH7372_PIN_IO_PU(120),		SH7372_PIN_IO_PD(121),
-+	SH7372_PIN_IO_PD(122),		SH7372_PIN_IO_PD(123),
-+	SH7372_PIN_IO_PD(124),		SH7372_PIN_IO_PD(125),
-+	SH7372_PIN_IO_PD(126),		SH7372_PIN_IO_PD(127),
-+	SH7372_PIN_IO_PD(128),		SH7372_PIN_IO_PU_PD(129),
-+	SH7372_PIN_IO_PU_PD(130),	SH7372_PIN_IO_PU_PD(131),
-+	SH7372_PIN_IO_PU_PD(132),	SH7372_PIN_IO_PU_PD(133),
-+	SH7372_PIN_IO_PU_PD(134),	SH7372_PIN_IO_PU_PD(135),
-+	SH7372_PIN_IO_PD(136),		SH7372_PIN_IO_PD(137),
-+	SH7372_PIN_IO_PD(138),		SH7372_PIN_IO_PD(139),
-+	SH7372_PIN_IO_PD(140),		SH7372_PIN_IO_PD(141),
-+	SH7372_PIN_IO_PD(142),		SH7372_PIN_IO_PU_PD(143),
-+	SH7372_PIN_IO_PD(144),		SH7372_PIN_IO_PD(145),
-+	SH7372_PIN_IO_PD(146),		SH7372_PIN_IO_PD(147),
-+	SH7372_PIN_IO_PD(148),		SH7372_PIN_IO_PD(149),
-+	SH7372_PIN_IO_PD(150),		SH7372_PIN_IO_PD(151),
-+	SH7372_PIN_IO_PU_PD(152),	SH7372_PIN_I_PD(153),
-+	SH7372_PIN_IO_PU_PD(154),	SH7372_PIN_I_PD(155),
-+	SH7372_PIN_IO_PD(156),		SH7372_PIN_IO_PD(157),
-+	SH7372_PIN_I_PD(158),		SH7372_PIN_IO_PD(159),
-+	SH7372_PIN_O(160),		SH7372_PIN_IO_PD(161),
-+	SH7372_PIN_IO_PD(162),		SH7372_PIN_IO_PD(163),
-+	SH7372_PIN_I_PD(164),		SH7372_PIN_IO_PD(165),
-+	SH7372_PIN_I_PD(166),		SH7372_PIN_I_PD(167),
-+	SH7372_PIN_I_PD(168),		SH7372_PIN_I_PD(169),
-+	SH7372_PIN_I_PD(170),		SH7372_PIN_O(171),
-+	SH7372_PIN_IO_PU_PD(172),	SH7372_PIN_IO_PU_PD(173),
-+	SH7372_PIN_IO_PU_PD(174),	SH7372_PIN_IO_PU_PD(175),
-+	SH7372_PIN_IO_PU_PD(176),	SH7372_PIN_IO_PU_PD(177),
-+	SH7372_PIN_IO_PU_PD(178),	SH7372_PIN_O(179),
-+	SH7372_PIN_IO_PU_PD(180),	SH7372_PIN_IO_PU_PD(181),
-+	SH7372_PIN_IO_PU_PD(182),	SH7372_PIN_IO_PU_PD(183),
-+	SH7372_PIN_IO_PU_PD(184),	SH7372_PIN_O(185),
-+	SH7372_PIN_IO_PU_PD(186),	SH7372_PIN_IO_PU_PD(187),
-+	SH7372_PIN_IO_PU_PD(188),	SH7372_PIN_IO_PU_PD(189),
-+	SH7372_PIN_IO_PU_PD(190),
- };
- 
- /* - BSC -------------------------------------------------------------------- */
-@@ -2136,6 +2137,17 @@ static const struct sh_pfc_function pinmux_functions[] = {
- 	SH_PFC_FUNCTION(usb1),
- };
- 
-+#undef PORTCR
-+#define PORTCR(nr, reg)							\
-+	{								\
-+		PINMUX_CFG_REG("PORT" nr "CR", reg, 8, 4) {		\
-+			_PCRH(PORT##nr##_IN, 0, 0, PORT##nr##_OUT),     \
-+				PORT##nr##_FN0, PORT##nr##_FN1,		\
-+				PORT##nr##_FN2, PORT##nr##_FN3,		\
-+				PORT##nr##_FN4, PORT##nr##_FN5,		\
-+				PORT##nr##_FN6, PORT##nr##_FN7 }	\
-+	}
-+
- static const struct pinmux_cfg_reg pinmux_config_regs[] = {
- 	PORTCR(0,	0xE6051000), /* PORT0CR */
- 	PORTCR(1,	0xE6051001), /* PORT1CR */
-@@ -2568,11 +2580,80 @@ static const struct pinmux_irq pinmux_irqs[] = {
- 	PINMUX_IRQ(EXT_IRQ16H(31), 138, 184),
- };
- 
-+#define PORTnCR_PULMD_OFF	(0 << 6)
-+#define PORTnCR_PULMD_DOWN	(2 << 6)
-+#define PORTnCR_PULMD_UP	(3 << 6)
-+#define PORTnCR_PULMD_MASK	(3 << 6)
-+
-+struct sh7372_portcr_group {
-+	unsigned int end_pin;
-+	unsigned int offset;
-+};
-+
-+static const struct sh7372_portcr_group sh7372_portcr_offsets[] = {
-+	{ 45,  0x1000 }, { 75,  0x2000 }, { 99,  0x0000 }, { 120, 0x3000 },
-+	{ 151, 0x0000 }, { 155, 0x3000 }, { 166, 0x0000 }, { 190, 0x2000 },
-+};
-+
-+static void __iomem *sh7372_pinmux_portcr(struct sh_pfc *pfc, unsigned int pin)
-+{
-+	unsigned int i;
-+
-+	for (i = 0; i < ARRAY_SIZE(sh7372_portcr_offsets); ++i) {
-+		const struct sh7372_portcr_group *group =
-+			&sh7372_portcr_offsets[i];
-+
-+		if (i <= group->end_pin)
-+			return pfc->window->virt + group->offset + pin;
-+	}
-+
-+	return NULL;
-+}
-+
-+static unsigned int sh7372_pinmux_get_bias(struct sh_pfc *pfc, unsigned int pin)
-+{
-+	void __iomem *addr = sh7372_pinmux_portcr(pfc, pin);
-+	u32 value = ioread8(addr) & PORTnCR_PULMD_MASK;
-+
-+	switch (value) {
-+	case PORTnCR_PULMD_UP:
-+		return PIN_CONFIG_BIAS_PULL_UP;
-+	case PORTnCR_PULMD_DOWN:
-+		return PIN_CONFIG_BIAS_PULL_DOWN;
-+	case PORTnCR_PULMD_OFF:
-+	default:
-+		return PIN_CONFIG_BIAS_DISABLE;
-+	}
-+}
-+
-+static void sh7372_pinmux_set_bias(struct sh_pfc *pfc, unsigned int pin,
-+				   unsigned int bias)
-+{
-+	void __iomem *addr = sh7372_pinmux_portcr(pfc, pin);
-+	u32 value = ioread8(addr) & ~PORTnCR_PULMD_MASK;
-+
-+	switch (bias) {
-+	case PIN_CONFIG_BIAS_PULL_UP:
-+		value |= PORTnCR_PULMD_UP;
-+		break;
-+	case PIN_CONFIG_BIAS_PULL_DOWN:
-+		value |= PORTnCR_PULMD_DOWN;
-+		break;
-+	}
-+
-+	iowrite8(value, addr);
-+}
-+
-+static const struct sh_pfc_soc_operations sh7372_pinmux_ops = {
-+	.get_bias = sh7372_pinmux_get_bias,
-+	.set_bias = sh7372_pinmux_set_bias,
-+};
-+
- const struct sh_pfc_soc_info sh7372_pinmux_info = {
- 	.name = "sh7372_pfc",
-+	.ops = &sh7372_pinmux_ops,
-+
- 	.input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
--	.input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END },
--	.input_pd = { PINMUX_INPUT_PULLDOWN_BEGIN, PINMUX_INPUT_PULLDOWN_END },
- 	.output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
- 	.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0134-ARM-shmobile-emev2-Add-clock-tree-description-in-DT.patch b/patches.renesas/0134-ARM-shmobile-emev2-Add-clock-tree-description-in-DT.patch
deleted file mode 100644
index 97c3847febdf8..0000000000000
--- a/patches.renesas/0134-ARM-shmobile-emev2-Add-clock-tree-description-in-DT.patch
+++ /dev/null
@@ -1,145 +0,0 @@
-From 6ab95a679ba05cd8c97b51e63d453b9be873f8c4 Mon Sep 17 00:00:00 2001
-From: Takashi Yoshii <takasi-y@ops.dti.ne.jp>
-Date: Tue, 8 Oct 2013 14:33:07 +0900
-Subject: ARM: shmobile: emev2: Add clock tree description in DT
-
-Add minimum clock tree description to .dts file.
-This provides same set of clocks as current sh-clkfwk version .c
-code does.
-
-Signed-off-by: Takashi Yoshii <takasi-y@ops.dti.ne.jp>
-Acked-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit fdf6fd2205181485ffc0fc622be7ed93dfbce361)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/emev2.dtsi | 84 ++++++++++++++++++++++++++++++++++++++++++++
- 1 file changed, 84 insertions(+)
-
-diff --git a/arch/arm/boot/dts/emev2.dtsi b/arch/arm/boot/dts/emev2.dtsi
-index 9063a4434d6a..df1d4cd3917d 100644
---- a/arch/arm/boot/dts/emev2.dtsi
-+++ b/arch/arm/boot/dts/emev2.dtsi
-@@ -52,34 +52,118 @@
- 			     <0 121 4>;
- 	};
- 
-+	smu@e0110000 {
-+		compatible = "renesas,emev2-smu";
-+		reg = <0xe0110000 0x10000>;
-+		#address-cells = <2>;
-+		#size-cells = <0>;
-+
-+		c32ki: c32ki {
-+			compatible = "fixed-clock";
-+			clock-frequency = <32768>;
-+			#clock-cells = <0>;
-+		};
-+		pll3_fo: pll3_fo {
-+			compatible = "fixed-factor-clock";
-+			clocks = <&c32ki>;
-+			clock-div = <1>;
-+			clock-mult = <7000>;
-+			#clock-cells = <0>;
-+		};
-+		usia_u0_sclkdiv: usia_u0_sclkdiv {
-+			compatible = "renesas,emev2-smu-clkdiv";
-+			reg = <0x610 0>;
-+			clocks = <&pll3_fo>;
-+			#clock-cells = <0>;
-+		};
-+		usib_u1_sclkdiv: usib_u1_sclkdiv {
-+			compatible = "renesas,emev2-smu-clkdiv";
-+			reg = <0x65c 0>;
-+			clocks = <&pll3_fo>;
-+			#clock-cells = <0>;
-+		};
-+		usib_u2_sclkdiv: usib_u2_sclkdiv {
-+			compatible = "renesas,emev2-smu-clkdiv";
-+			reg = <0x65c 16>;
-+			clocks = <&pll3_fo>;
-+			#clock-cells = <0>;
-+		};
-+		usib_u3_sclkdiv: usib_u3_sclkdiv {
-+			compatible = "renesas,emev2-smu-clkdiv";
-+			reg = <0x660 0>;
-+			clocks = <&pll3_fo>;
-+			#clock-cells = <0>;
-+		};
-+		usia_u0_sclk: usia_u0_sclk {
-+			compatible = "renesas,emev2-smu-gclk";
-+			reg = <0x4a0 1>;
-+			clocks = <&usia_u0_sclkdiv>;
-+			#clock-cells = <0>;
-+		};
-+		usib_u1_sclk: usib_u1_sclk {
-+			compatible = "renesas,emev2-smu-gclk";
-+			reg = <0x4b8 1>;
-+			clocks = <&usib_u1_sclkdiv>;
-+			#clock-cells = <0>;
-+		};
-+		usib_u2_sclk: usib_u2_sclk {
-+			compatible = "renesas,emev2-smu-gclk";
-+			reg = <0x4bc 1>;
-+			clocks = <&usib_u2_sclkdiv>;
-+			#clock-cells = <0>;
-+		};
-+		usib_u3_sclk: usib_u3_sclk {
-+			compatible = "renesas,emev2-smu-gclk";
-+			reg = <0x4c0 1>;
-+			clocks = <&usib_u3_sclkdiv>;
-+			#clock-cells = <0>;
-+		};
-+		sti_sclk: sti_sclk {
-+			compatible = "renesas,emev2-smu-gclk";
-+			reg = <0x528 1>;
-+			clocks = <&c32ki>;
-+			#clock-cells = <0>;
-+		};
-+	};
-+
- 	sti@e0180000 {
- 		compatible = "renesas,em-sti";
- 		reg = <0xe0180000 0x54>;
- 		interrupts = <0 125 0>;
-+		clocks = <&sti_sclk>;
-+		clock-names = "sclk";
- 	};
- 
- 	uart@e1020000 {
- 		compatible = "renesas,em-uart";
- 		reg = <0xe1020000 0x38>;
- 		interrupts = <0 8 0>;
-+		clocks = <&usia_u0_sclk>;
-+		clock-names = "sclk";
- 	};
- 
- 	uart@e1030000 {
- 		compatible = "renesas,em-uart";
- 		reg = <0xe1030000 0x38>;
- 		interrupts = <0 9 0>;
-+		clocks = <&usib_u1_sclk>;
-+		clock-names = "sclk";
- 	};
- 
- 	uart@e1040000 {
- 		compatible = "renesas,em-uart";
- 		reg = <0xe1040000 0x38>;
- 		interrupts = <0 10 0>;
-+		clocks = <&usib_u2_sclk>;
-+		clock-names = "sclk";
- 	};
- 
- 	uart@e1050000 {
- 		compatible = "renesas,em-uart";
- 		reg = <0xe1050000 0x38>;
- 		interrupts = <0 11 0>;
-+		clocks = <&usib_u3_sclk>;
-+		clock-names = "sclk";
- 	};
- 
- 	gpio0: gpio@e0050000 {
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0134-ARM-shmobile-r8a7778-cleanup-registration-of-sh_eth.patch b/patches.renesas/0134-ARM-shmobile-r8a7778-cleanup-registration-of-sh_eth.patch
deleted file mode 100644
index 8e8a6512e280a..0000000000000
--- a/patches.renesas/0134-ARM-shmobile-r8a7778-cleanup-registration-of-sh_eth.patch
+++ /dev/null
@@ -1,98 +0,0 @@
-From 07488c0f5c51f7361f7ec9bb202bdc50c762525d Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Mon, 23 Sep 2013 23:04:21 -0700
-Subject: ARM: shmobile: r8a7778: cleanup registration of sh_eth
-
-sh_eth driver which needs platform data at the time of
-registration is used from BockW only.
-Now, ARM/shmobile aims to support DT,
-and the C code base board support will be removed
-if DT support is completed.
-Current driver registration method which needs platform data
-and which is not shared complicates codes.
-This means legacy C code cleanup after DT supporting
-will be more complicated
-This patch registers it on board code as cleanup C code
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit cd4ab0420fd6233766fd87fa295d6e3cfb719c01)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-bockw.c          | 14 +++++++++++++-
- arch/arm/mach-shmobile/include/mach/r8a7778.h |  1 -
- arch/arm/mach-shmobile/setup-r8a7778.c        | 14 --------------
- 3 files changed, 13 insertions(+), 16 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-bockw.c b/arch/arm/mach-shmobile/board-bockw.c
-index 4b696ce0bae6..f2bf61bf2521 100644
---- a/arch/arm/mach-shmobile/board-bockw.c
-+++ b/arch/arm/mach-shmobile/board-bockw.c
-@@ -101,6 +101,12 @@ static struct resource sdhi0_resources[] __initdata = {
- 	DEFINE_RES_IRQ(gic_iid(0x77)),
- };
- 
-+/* Ether */
-+static struct resource ether_resources[] __initdata = {
-+	DEFINE_RES_MEM(0xfde00000, 0x400),
-+	DEFINE_RES_IRQ(gic_iid(0x89)),
-+};
-+
- static struct sh_eth_plat_data ether_platform_data __initdata = {
- 	.phy		= 0x01,
- 	.edmac_endian	= EDMAC_LITTLE_ENDIAN,
-@@ -255,7 +261,13 @@ static void __init bockw_init(void)
- 	r8a7778_clock_init();
- 	r8a7778_init_irq_extpin(1);
- 	r8a7778_add_standard_devices();
--	r8a7778_add_ether_device(&ether_platform_data);
-+
-+	platform_device_register_resndata(&platform_bus, "r8a777x-ether", -1,
-+					  ether_resources,
-+					  ARRAY_SIZE(ether_resources),
-+					  &ether_platform_data,
-+					  sizeof(ether_platform_data));
-+
- 	platform_device_register_full(&vin0_info);
- 	/* VIN1 has a pin conflict with Ether */
- 	if (!IS_ENABLED(CONFIG_SH_ETH))
-diff --git a/arch/arm/mach-shmobile/include/mach/r8a7778.h b/arch/arm/mach-shmobile/include/mach/r8a7778.h
-index 9838608363c2..48933def0d55 100644
---- a/arch/arm/mach-shmobile/include/mach/r8a7778.h
-+++ b/arch/arm/mach-shmobile/include/mach/r8a7778.h
-@@ -23,7 +23,6 @@
- 
- extern void r8a7778_add_standard_devices(void);
- extern void r8a7778_add_standard_devices_dt(void);
--extern void r8a7778_add_ether_device(struct sh_eth_plat_data *pdata);
- extern void r8a7778_add_dt_devices(void);
- 
- extern void r8a7778_init_late(void);
-diff --git a/arch/arm/mach-shmobile/setup-r8a7778.c b/arch/arm/mach-shmobile/setup-r8a7778.c
-index 604cf36b5616..f5e15c926fef 100644
---- a/arch/arm/mach-shmobile/setup-r8a7778.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7778.c
-@@ -174,20 +174,6 @@ static struct platform_device_info hci##_info __initdata = {	\
- USB_PLATFORM_INFO(ehci);
- USB_PLATFORM_INFO(ohci);
- 
--/* Ether */
--static struct resource ether_resources[] __initdata = {
--	DEFINE_RES_MEM(0xfde00000, 0x400),
--	DEFINE_RES_IRQ(gic_iid(0x89)),
--};
--
--void __init r8a7778_add_ether_device(struct sh_eth_plat_data *pdata)
--{
--	platform_device_register_resndata(&platform_bus, "r8a777x-ether", -1,
--					  ether_resources,
--					  ARRAY_SIZE(ether_resources),
--					  pdata, sizeof(*pdata));
--}
--
- /* PFC/GPIO */
- static struct resource pfc_resources[] __initdata = {
- 	DEFINE_RES_MEM(0xfffc0000, 0x118),
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0134-sh-pfc-r8a7740-Add-SCIF-pin-groups-and-functions.patch b/patches.renesas/0134-sh-pfc-r8a7740-Add-SCIF-pin-groups-and-functions.patch
deleted file mode 100644
index 069daac6deb2b..0000000000000
--- a/patches.renesas/0134-sh-pfc-r8a7740-Add-SCIF-pin-groups-and-functions.patch
+++ /dev/null
@@ -1,405 +0,0 @@
-From 9e24b780112bfd5ec0437d3d355db14777093195 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 18 Apr 2013 01:04:30 +0200
-Subject: sh-pfc: r8a7740: Add SCIF pin groups and functions
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit cdd2c769356bb31b9a8f399dffb524f25336fe82)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7740.c | 346 +++++++++++++++++++++++++++++++++++
- 1 file changed, 346 insertions(+)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-index 4753f544..58b02848 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-@@ -1999,6 +1999,28 @@ static const unsigned int mmc0_ctrl_1_pins[] = {
- static const unsigned int mmc0_ctrl_1_mux[] = {
- 	MMC1_CMD_PORT104_MARK, MMC1_CLK_PORT103_MARK,
- };
-+/* - SCIFA0 ----------------------------------------------------------------- */
-+static const unsigned int scifa0_data_pins[] = {
-+	/* RXD, TXD */
-+	197, 198,
-+};
-+static const unsigned int scifa0_data_mux[] = {
-+	SCIFA0_RXD_MARK, SCIFA0_TXD_MARK,
-+};
-+static const unsigned int scifa0_clk_pins[] = {
-+	/* SCK */
-+	188,
-+};
-+static const unsigned int scifa0_clk_mux[] = {
-+	SCIFA0_SCK_MARK,
-+};
-+static const unsigned int scifa0_ctrl_pins[] = {
-+	/* RTS, CTS */
-+	194, 193,
-+};
-+static const unsigned int scifa0_ctrl_mux[] = {
-+	SCIFA0_RTS_MARK, SCIFA0_CTS_MARK,
-+};
- /* - SCIFA1 ----------------------------------------------------------------- */
- static const unsigned int scifa1_data_pins[] = {
- 	/* RXD, TXD */
-@@ -2007,6 +2029,230 @@ static const unsigned int scifa1_data_pins[] = {
- static const unsigned int scifa1_data_mux[] = {
- 	SCIFA1_RXD_MARK, SCIFA1_TXD_MARK,
- };
-+static const unsigned int scifa1_clk_pins[] = {
-+	/* SCK */
-+	185,
-+};
-+static const unsigned int scifa1_clk_mux[] = {
-+	SCIFA1_SCK_MARK,
-+};
-+static const unsigned int scifa1_ctrl_pins[] = {
-+	/* RTS, CTS */
-+	23, 21,
-+};
-+static const unsigned int scifa1_ctrl_mux[] = {
-+	SCIFA1_RTS_MARK, SCIFA1_CTS_MARK,
-+};
-+/* - SCIFA2 ----------------------------------------------------------------- */
-+static const unsigned int scifa2_data_pins[] = {
-+	/* RXD, TXD */
-+	200, 201,
-+};
-+static const unsigned int scifa2_data_mux[] = {
-+	SCIFA2_RXD_MARK, SCIFA2_TXD_MARK,
-+};
-+static const unsigned int scifa2_clk_0_pins[] = {
-+	/* SCK */
-+	22,
-+};
-+static const unsigned int scifa2_clk_0_mux[] = {
-+	SCIFA2_SCK_PORT22_MARK,
-+};
-+static const unsigned int scifa2_clk_1_pins[] = {
-+	/* SCK */
-+	199,
-+};
-+static const unsigned int scifa2_clk_1_mux[] = {
-+	SCIFA2_SCK_PORT199_MARK,
-+};
-+static const unsigned int scifa2_ctrl_pins[] = {
-+	/* RTS, CTS */
-+	96, 95,
-+};
-+static const unsigned int scifa2_ctrl_mux[] = {
-+	SCIFA2_RTS_MARK, SCIFA2_CTS_MARK,
-+};
-+/* - SCIFA3 ----------------------------------------------------------------- */
-+static const unsigned int scifa3_data_0_pins[] = {
-+	/* RXD, TXD */
-+	174, 175,
-+};
-+static const unsigned int scifa3_data_0_mux[] = {
-+	SCIFA3_RXD_PORT174_MARK, SCIFA3_TXD_PORT175_MARK,
-+};
-+static const unsigned int scifa3_clk_0_pins[] = {
-+	/* SCK */
-+	116,
-+};
-+static const unsigned int scifa3_clk_0_mux[] = {
-+	SCIFA3_SCK_PORT116_MARK,
-+};
-+static const unsigned int scifa3_ctrl_0_pins[] = {
-+	/* RTS, CTS */
-+	105, 117,
-+};
-+static const unsigned int scifa3_ctrl_0_mux[] = {
-+	SCIFA3_RTS_PORT105_MARK, SCIFA3_CTS_PORT117_MARK,
-+};
-+static const unsigned int scifa3_data_1_pins[] = {
-+	/* RXD, TXD */
-+	159, 160,
-+};
-+static const unsigned int scifa3_data_1_mux[] = {
-+	SCIFA3_RXD_PORT159_MARK, SCIFA3_TXD_PORT160_MARK,
-+};
-+static const unsigned int scifa3_clk_1_pins[] = {
-+	/* SCK */
-+	158,
-+};
-+static const unsigned int scifa3_clk_1_mux[] = {
-+	SCIFA3_SCK_PORT158_MARK,
-+};
-+static const unsigned int scifa3_ctrl_1_pins[] = {
-+	/* RTS, CTS */
-+	161, 162,
-+};
-+static const unsigned int scifa3_ctrl_1_mux[] = {
-+	SCIFA3_RTS_PORT161_MARK, SCIFA3_CTS_PORT162_MARK,
-+};
-+/* - SCIFA4 ----------------------------------------------------------------- */
-+static const unsigned int scifa4_data_0_pins[] = {
-+	/* RXD, TXD */
-+	12, 13,
-+};
-+static const unsigned int scifa4_data_0_mux[] = {
-+	SCIFA4_RXD_PORT12_MARK, SCIFA4_TXD_PORT13_MARK,
-+};
-+static const unsigned int scifa4_data_1_pins[] = {
-+	/* RXD, TXD */
-+	204, 203,
-+};
-+static const unsigned int scifa4_data_1_mux[] = {
-+	SCIFA4_RXD_PORT204_MARK, SCIFA4_TXD_PORT203_MARK,
-+};
-+static const unsigned int scifa4_data_2_pins[] = {
-+	/* RXD, TXD */
-+	94, 93,
-+};
-+static const unsigned int scifa4_data_2_mux[] = {
-+	SCIFA4_RXD_PORT94_MARK, SCIFA4_TXD_PORT93_MARK,
-+};
-+static const unsigned int scifa4_clk_0_pins[] = {
-+	/* SCK */
-+	21,
-+};
-+static const unsigned int scifa4_clk_0_mux[] = {
-+	SCIFA4_SCK_PORT21_MARK,
-+};
-+static const unsigned int scifa4_clk_1_pins[] = {
-+	/* SCK */
-+	205,
-+};
-+static const unsigned int scifa4_clk_1_mux[] = {
-+	SCIFA4_SCK_PORT205_MARK,
-+};
-+/* - SCIFA5 ----------------------------------------------------------------- */
-+static const unsigned int scifa5_data_0_pins[] = {
-+	/* RXD, TXD */
-+	10, 20,
-+};
-+static const unsigned int scifa5_data_0_mux[] = {
-+	SCIFA5_RXD_PORT10_MARK, SCIFA5_TXD_PORT20_MARK,
-+};
-+static const unsigned int scifa5_data_1_pins[] = {
-+	/* RXD, TXD */
-+	207, 208,
-+};
-+static const unsigned int scifa5_data_1_mux[] = {
-+	SCIFA5_RXD_PORT207_MARK, SCIFA5_TXD_PORT208_MARK,
-+};
-+static const unsigned int scifa5_data_2_pins[] = {
-+	/* RXD, TXD */
-+	92, 91,
-+};
-+static const unsigned int scifa5_data_2_mux[] = {
-+	SCIFA5_RXD_PORT92_MARK, SCIFA5_TXD_PORT91_MARK,
-+};
-+static const unsigned int scifa5_clk_0_pins[] = {
-+	/* SCK */
-+	23,
-+};
-+static const unsigned int scifa5_clk_0_mux[] = {
-+	SCIFA5_SCK_PORT23_MARK,
-+};
-+static const unsigned int scifa5_clk_1_pins[] = {
-+	/* SCK */
-+	206,
-+};
-+static const unsigned int scifa5_clk_1_mux[] = {
-+	SCIFA5_SCK_PORT206_MARK,
-+};
-+/* - SCIFA6 ----------------------------------------------------------------- */
-+static const unsigned int scifa6_data_pins[] = {
-+	/* RXD, TXD */
-+	25, 26,
-+};
-+static const unsigned int scifa6_data_mux[] = {
-+	SCIFA6_RXD_MARK, SCIFA6_TXD_MARK,
-+};
-+static const unsigned int scifa6_clk_pins[] = {
-+	/* SCK */
-+	24,
-+};
-+static const unsigned int scifa6_clk_mux[] = {
-+	SCIFA6_SCK_MARK,
-+};
-+/* - SCIFA7 ----------------------------------------------------------------- */
-+static const unsigned int scifa7_data_pins[] = {
-+	/* RXD, TXD */
-+	0, 1,
-+};
-+static const unsigned int scifa7_data_mux[] = {
-+	SCIFA7_RXD_MARK, SCIFA7_TXD_MARK,
-+};
-+/* - SCIFB ------------------------------------------------------------------ */
-+static const unsigned int scifb_data_0_pins[] = {
-+	/* RXD, TXD */
-+	191, 192,
-+};
-+static const unsigned int scifb_data_0_mux[] = {
-+	SCIFB_RXD_PORT191_MARK, SCIFB_TXD_PORT192_MARK,
-+};
-+static const unsigned int scifb_clk_0_pins[] = {
-+	/* SCK */
-+	190,
-+};
-+static const unsigned int scifb_clk_0_mux[] = {
-+	SCIFB_SCK_PORT190_MARK,
-+};
-+static const unsigned int scifb_ctrl_0_pins[] = {
-+	/* RTS, CTS */
-+	186, 187,
-+};
-+static const unsigned int scifb_ctrl_0_mux[] = {
-+	SCIFB_RTS_PORT186_MARK, SCIFB_CTS_PORT187_MARK,
-+};
-+static const unsigned int scifb_data_1_pins[] = {
-+	/* RXD, TXD */
-+	3, 4,
-+};
-+static const unsigned int scifb_data_1_mux[] = {
-+	SCIFB_RXD_PORT3_MARK, SCIFB_TXD_PORT4_MARK,
-+};
-+static const unsigned int scifb_clk_1_pins[] = {
-+	/* SCK */
-+	2,
-+};
-+static const unsigned int scifb_clk_1_mux[] = {
-+	SCIFB_SCK_PORT2_MARK,
-+};
-+static const unsigned int scifb_ctrl_1_pins[] = {
-+	/* RTS, CTS */
-+	172, 173,
-+};
-+static const unsigned int scifb_ctrl_1_mux[] = {
-+	SCIFB_RTS_PORT172_MARK, SCIFB_CTS_PORT173_MARK,
-+};
- /* - SDHI0 ------------------------------------------------------------------ */
- static const unsigned int sdhi0_data1_pins[] = {
- 	/* D0 */
-@@ -2212,7 +2458,41 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(mmc0_data4_1),
- 	SH_PFC_PIN_GROUP(mmc0_data8_1),
- 	SH_PFC_PIN_GROUP(mmc0_ctrl_1),
-+	SH_PFC_PIN_GROUP(scifa0_data),
-+	SH_PFC_PIN_GROUP(scifa0_clk),
-+	SH_PFC_PIN_GROUP(scifa0_ctrl),
- 	SH_PFC_PIN_GROUP(scifa1_data),
-+	SH_PFC_PIN_GROUP(scifa1_clk),
-+	SH_PFC_PIN_GROUP(scifa1_ctrl),
-+	SH_PFC_PIN_GROUP(scifa2_data),
-+	SH_PFC_PIN_GROUP(scifa2_clk_0),
-+	SH_PFC_PIN_GROUP(scifa2_clk_1),
-+	SH_PFC_PIN_GROUP(scifa2_ctrl),
-+	SH_PFC_PIN_GROUP(scifa3_data_0),
-+	SH_PFC_PIN_GROUP(scifa3_clk_0),
-+	SH_PFC_PIN_GROUP(scifa3_ctrl_0),
-+	SH_PFC_PIN_GROUP(scifa3_data_1),
-+	SH_PFC_PIN_GROUP(scifa3_clk_1),
-+	SH_PFC_PIN_GROUP(scifa3_ctrl_1),
-+	SH_PFC_PIN_GROUP(scifa4_data_0),
-+	SH_PFC_PIN_GROUP(scifa4_data_1),
-+	SH_PFC_PIN_GROUP(scifa4_data_2),
-+	SH_PFC_PIN_GROUP(scifa4_clk_0),
-+	SH_PFC_PIN_GROUP(scifa4_clk_1),
-+	SH_PFC_PIN_GROUP(scifa5_data_0),
-+	SH_PFC_PIN_GROUP(scifa5_data_1),
-+	SH_PFC_PIN_GROUP(scifa5_data_2),
-+	SH_PFC_PIN_GROUP(scifa5_clk_0),
-+	SH_PFC_PIN_GROUP(scifa5_clk_1),
-+	SH_PFC_PIN_GROUP(scifa6_data),
-+	SH_PFC_PIN_GROUP(scifa6_clk),
-+	SH_PFC_PIN_GROUP(scifa7_data),
-+	SH_PFC_PIN_GROUP(scifb_data_0),
-+	SH_PFC_PIN_GROUP(scifb_clk_0),
-+	SH_PFC_PIN_GROUP(scifb_ctrl_0),
-+	SH_PFC_PIN_GROUP(scifb_data_1),
-+	SH_PFC_PIN_GROUP(scifb_clk_1),
-+	SH_PFC_PIN_GROUP(scifb_ctrl_1),
- 	SH_PFC_PIN_GROUP(sdhi0_data1),
- 	SH_PFC_PIN_GROUP(sdhi0_data4),
- 	SH_PFC_PIN_GROUP(sdhi0_ctrl),
-@@ -2325,8 +2605,66 @@ static const char * const mmc0_groups[] = {
- 	"mmc0_ctrl_1",
- };
- 
-+static const char * const scifa0_groups[] = {
-+	"scifa0_data",
-+	"scifa0_clk",
-+	"scifa0_ctrl",
-+};
-+
- static const char * const scifa1_groups[] = {
- 	"scifa1_data",
-+	"scifa1_clk",
-+	"scifa1_ctrl",
-+};
-+
-+static const char * const scifa2_groups[] = {
-+	"scifa2_data",
-+	"scifa2_clk_0",
-+	"scifa2_clk_1",
-+	"scifa2_ctrl",
-+};
-+
-+static const char * const scifa3_groups[] = {
-+	"scifa3_data_0",
-+	"scifa3_clk_0",
-+	"scifa3_ctrl_0",
-+	"scifa3_data_1",
-+	"scifa3_clk_1",
-+	"scifa3_ctrl_1",
-+};
-+
-+static const char * const scifa4_groups[] = {
-+	"scifa4_data_0",
-+	"scifa4_data_1",
-+	"scifa4_data_2",
-+	"scifa4_clk_0",
-+	"scifa4_clk_1",
-+};
-+
-+static const char * const scifa5_groups[] = {
-+	"scifa5_data_0",
-+	"scifa5_data_1",
-+	"scifa5_data_2",
-+	"scifa5_clk_0",
-+	"scifa5_clk_1",
-+};
-+
-+static const char * const scifa6_groups[] = {
-+	"scifa6_data",
-+	"scifa6_clk",
-+};
-+
-+static const char * const scifa7_groups[] = {
-+	"scifa7_data",
-+};
-+
-+static const char * const scifb_groups[] = {
-+	"scifb_data_0",
-+	"scifb_clk_0",
-+	"scifb_ctrl_0",
-+	"scifb_data_1",
-+	"scifb_clk_1",
-+	"scifb_ctrl_1",
- };
- 
- static const char * const sdhi0_groups[] = {
-@@ -2359,7 +2697,15 @@ static const struct sh_pfc_function pinmux_functions[] = {
- 	SH_PFC_FUNCTION(lcd0),
- 	SH_PFC_FUNCTION(lcd1),
- 	SH_PFC_FUNCTION(mmc0),
-+	SH_PFC_FUNCTION(scifa0),
- 	SH_PFC_FUNCTION(scifa1),
-+	SH_PFC_FUNCTION(scifa2),
-+	SH_PFC_FUNCTION(scifa3),
-+	SH_PFC_FUNCTION(scifa4),
-+	SH_PFC_FUNCTION(scifa5),
-+	SH_PFC_FUNCTION(scifa6),
-+	SH_PFC_FUNCTION(scifa7),
-+	SH_PFC_FUNCTION(scifb),
- 	SH_PFC_FUNCTION(sdhi0),
- 	SH_PFC_FUNCTION(sdhi1),
- 	SH_PFC_FUNCTION(sdhi2),
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0135-ARM-shmobile-r8a7778-add-I2C-support-on-DTSI.patch b/patches.renesas/0135-ARM-shmobile-r8a7778-add-I2C-support-on-DTSI.patch
deleted file mode 100644
index 21ab84e258c50..0000000000000
--- a/patches.renesas/0135-ARM-shmobile-r8a7778-add-I2C-support-on-DTSI.patch
+++ /dev/null
@@ -1,66 +0,0 @@
-From 0a36c6674dfc6a8d66caa45604a372a3c726dce2 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Thu, 3 Oct 2013 23:44:15 -0700
-Subject: ARM: shmobile: r8a7778: add I2C support on DTSI
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit ae4273ec7b25c8b9c895a4aae31f2fced980b7bf)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7778.dtsi | 40 ++++++++++++++++++++++++++++++++++++++++
- 1 file changed, 40 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi
-index ca88b3bc78e0..698809f91306 100644
---- a/arch/arm/boot/dts/r8a7778.dtsi
-+++ b/arch/arm/boot/dts/r8a7778.dtsi
-@@ -194,4 +194,44 @@
- 		cap-sdio-irq;
- 		status = "disabled";
- 	};
-+
-+	i2c0: i2c@ffc70000 {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		compatible = "renesas,i2c-r8a7778";
-+		reg = <0xffc70000 0x1000>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 67 0x4>;
-+		status = "disabled";
-+	};
-+
-+	i2c1: i2c@ffc71000 {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		compatible = "renesas,i2c-r8a7778";
-+		reg = <0xffc71000 0x1000>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 78 0x4>;
-+		status = "disabled";
-+	};
-+
-+	i2c2: i2c@ffc72000 {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		compatible = "renesas,i2c-r8a7778";
-+		reg = <0xffc72000 0x1000>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 76 0x4>;
-+		status = "disabled";
-+	};
-+
-+	i2c3: i2c@ffc73000 {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		compatible = "renesas,i2c-r8a7778";
-+		reg = <0xffc73000 0x1000>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 77 0x4>;
-+		status = "disabled";
-+	};
- };
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0135-ARM-shmobile-r8a7778-r8a7778_register_hspi-become-st.patch b/patches.renesas/0135-ARM-shmobile-r8a7778-r8a7778_register_hspi-become-st.patch
deleted file mode 100644
index 326fcf2c45d3e..0000000000000
--- a/patches.renesas/0135-ARM-shmobile-r8a7778-r8a7778_register_hspi-become-st.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From 8c956d2ac48569c1bc367fedbc6ade1a1929ce9e Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Mon, 23 Sep 2013 23:04:37 -0700
-Subject: ARM: shmobile: r8a7778: r8a7778_register_hspi() become static
-
-r8a7778_register_hspi() used only from setup-r8a7778.c
-it can be static
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 117378e58365a44b568655e5aa49b3f6daf900c4)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-r8a7778.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-r8a7778.c b/arch/arm/mach-shmobile/setup-r8a7778.c
-index f5e15c926fef..468ee6551184 100644
---- a/arch/arm/mach-shmobile/setup-r8a7778.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7778.c
-@@ -258,7 +258,7 @@ static struct resource hspi_resources[] __initdata = {
- 	DEFINE_RES_IRQ(gic_iid(0x75)),
- };
- 
--void __init r8a7778_register_hspi(int id)
-+static void __init r8a7778_register_hspi(int id)
- {
- 	BUG_ON(id < 0 || id > 2);
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0135-sh-pfc-r8a7740-Declare-missing-INTC-function.patch b/patches.renesas/0135-sh-pfc-r8a7740-Declare-missing-INTC-function.patch
deleted file mode 100644
index 96ec91116e1e5..0000000000000
--- a/patches.renesas/0135-sh-pfc-r8a7740-Declare-missing-INTC-function.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From e65fc8eac484d27daca6e7bdc6a5e55d4a58e91b Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 18 Apr 2013 10:54:18 +0200
-Subject: sh-pfc: r8a7740: Declare missing INTC function
-
-When adding the INTC pin groups the INTC function hasn't been added to
-the functions list. Fix it.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit d031696e02c87418221eeb50ecdc4bb812a5897f)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7740.c | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-index 58b02848..da00bc40 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-@@ -2694,6 +2694,7 @@ static const char * const sdhi2_groups[] = {
- };
- 
- static const struct sh_pfc_function pinmux_functions[] = {
-+	SH_PFC_FUNCTION(intc),
- 	SH_PFC_FUNCTION(lcd0),
- 	SH_PFC_FUNCTION(lcd1),
- 	SH_PFC_FUNCTION(mmc0),
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0136-ARM-shmobile-Add-r8a7790-CA15-CPU-cores.patch b/patches.renesas/0136-ARM-shmobile-Add-r8a7790-CA15-CPU-cores.patch
deleted file mode 100644
index 80410ebf4897f..0000000000000
--- a/patches.renesas/0136-ARM-shmobile-Add-r8a7790-CA15-CPU-cores.patch
+++ /dev/null
@@ -1,50 +0,0 @@
-From b9e2a3aa261d078c81e5c962c5606555f1340793 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Thu, 29 Aug 2013 08:22:17 +0900
-Subject: ARM: shmobile: Add r8a7790 CA15 CPU cores
-
-Add CA15 CPU cores to r8a7790 for a total of 4 x CA15.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit c1f95979baa9c33c5e6c280d7a8742fad0d20326)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7790.dtsi | 21 +++++++++++++++++++++
- 1 file changed, 21 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
-index 413b4c29e782..0e4c87081c88 100644
---- a/arch/arm/boot/dts/r8a7790.dtsi
-+++ b/arch/arm/boot/dts/r8a7790.dtsi
-@@ -24,6 +24,27 @@
- 			reg = <0>;
- 			clock-frequency = <1300000000>;
- 		};
-+
-+		cpu1: cpu@1 {
-+			device_type = "cpu";
-+			compatible = "arm,cortex-a15";
-+			reg = <1>;
-+			clock-frequency = <1300000000>;
-+		};
-+
-+		cpu2: cpu@2 {
-+			device_type = "cpu";
-+			compatible = "arm,cortex-a15";
-+			reg = <2>;
-+			clock-frequency = <1300000000>;
-+		};
-+
-+		cpu3: cpu@3 {
-+			device_type = "cpu";
-+			compatible = "arm,cortex-a15";
-+			reg = <3>;
-+			clock-frequency = <1300000000>;
-+		};
- 	};
- 
- 	gic: interrupt-controller@f1001000 {
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0136-ARM-shmobile-r8a7778-add-HSPI-suppport-on-DTSI.patch b/patches.renesas/0136-ARM-shmobile-r8a7778-add-HSPI-suppport-on-DTSI.patch
deleted file mode 100644
index 1759071889187..0000000000000
--- a/patches.renesas/0136-ARM-shmobile-r8a7778-add-HSPI-suppport-on-DTSI.patch
+++ /dev/null
@@ -1,63 +0,0 @@
-From cf5c95418d033226663e7c1c6dacd806a67bc41e Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Thu, 31 Oct 2013 18:22:21 -0700
-Subject: ARM: shmobile: r8a7778: add HSPI suppport on DTSI
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit a50da08569b2d9804575c0cf9d0b67db049afa81)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7778.dtsi | 30 ++++++++++++++++++++++++++++++
- 1 file changed, 30 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi
-index 698809f91306..819b1942aa14 100644
---- a/arch/arm/boot/dts/r8a7778.dtsi
-+++ b/arch/arm/boot/dts/r8a7778.dtsi
-@@ -25,6 +25,12 @@
- 		};
- 	};
- 
-+	aliases {
-+		spi0 = &hspi0;
-+		spi1 = &hspi1;
-+		spi2 = &hspi2;
-+	};
-+
- 	gic: interrupt-controller@fe438000 {
- 		compatible = "arm,cortex-a9-gic";
- 		#interrupt-cells = <3>;
-@@ -234,4 +240,28 @@
- 		interrupts = <0 77 0x4>;
- 		status = "disabled";
- 	};
-+
-+	hspi0: spi@fffc7000 {
-+		compatible = "renesas,hspi";
-+		reg = <0xfffc7000 0x18>;
-+		interrupt-controller = <&gic>;
-+		interrupts = <0 63 4>;
-+		status = "disabled";
-+	};
-+
-+	hspi1: spi@fffc8000 {
-+		compatible = "renesas,hspi";
-+		reg = <0xfffc8000 0x18>;
-+		interrupt-controller = <&gic>;
-+		interrupts = <0 84 4>;
-+		status = "disabled";
-+	};
-+
-+	hspi2: spi@fffc6000 {
-+		compatible = "renesas,hspi";
-+		reg = <0xfffc6000 0x18>;
-+		interrupt-controller = <&gic>;
-+		interrupts = <0 85 4>;
-+		status = "disabled";
-+	};
- };
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0136-sh-pfc-r8a7740-Add-BSC-pin-groups-and-functions.patch b/patches.renesas/0136-sh-pfc-r8a7740-Add-BSC-pin-groups-and-functions.patch
deleted file mode 100644
index 48a4d4b4d8656..0000000000000
--- a/patches.renesas/0136-sh-pfc-r8a7740-Add-BSC-pin-groups-and-functions.patch
+++ /dev/null
@@ -1,203 +0,0 @@
-From e4a7e624c4afe916eabb98faf26616c1a54ea3ff Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 18 Apr 2013 01:04:30 +0200
-Subject: sh-pfc: r8a7740: Add BSC pin groups and functions
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit b7099c498b6cf9f53bb392f7b0087ad212299707)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7740.c | 155 +++++++++++++++++++++++++++++++++++
- 1 file changed, 155 insertions(+)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-index da00bc40..f17a39ad 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-@@ -1674,6 +1674,127 @@ static struct sh_pfc_pin pinmux_pins[] = {
- 	GPIO_PORT_ALL(),
- };
- 
-+/* - BSC -------------------------------------------------------------------- */
-+static const unsigned int bsc_data8_pins[] = {
-+	/* D[0:7] */
-+	157, 156, 155, 154, 153, 152, 151, 150,
-+};
-+static const unsigned int bsc_data8_mux[] = {
-+	D0_NAF0_MARK, D1_NAF1_MARK, D2_NAF2_MARK, D3_NAF3_MARK,
-+	D4_NAF4_MARK, D5_NAF5_MARK, D6_NAF6_MARK, D7_NAF7_MARK,
-+};
-+static const unsigned int bsc_data16_pins[] = {
-+	/* D[0:15] */
-+	157, 156, 155, 154, 153, 152, 151, 150,
-+	149, 148, 147, 146, 145, 144, 143, 142,
-+};
-+static const unsigned int bsc_data16_mux[] = {
-+	D0_NAF0_MARK, D1_NAF1_MARK, D2_NAF2_MARK, D3_NAF3_MARK,
-+	D4_NAF4_MARK, D5_NAF5_MARK, D6_NAF6_MARK, D7_NAF7_MARK,
-+	D8_NAF8_MARK, D9_NAF9_MARK, D10_NAF10_MARK, D11_NAF11_MARK,
-+	D12_NAF12_MARK, D13_NAF13_MARK, D14_NAF14_MARK, D15_NAF15_MARK,
-+};
-+static const unsigned int bsc_data32_pins[] = {
-+	/* D[0:31] */
-+	157, 156, 155, 154, 153, 152, 151, 150,
-+	149, 148, 147, 146, 145, 144, 143, 142,
-+	171, 170, 169, 168, 167, 166, 173, 172,
-+	165, 164, 163, 162, 161, 160, 159, 158,
-+};
-+static const unsigned int bsc_data32_mux[] = {
-+	D0_NAF0_MARK, D1_NAF1_MARK, D2_NAF2_MARK, D3_NAF3_MARK,
-+	D4_NAF4_MARK, D5_NAF5_MARK, D6_NAF6_MARK, D7_NAF7_MARK,
-+	D8_NAF8_MARK, D9_NAF9_MARK, D10_NAF10_MARK, D11_NAF11_MARK,
-+	D12_NAF12_MARK, D13_NAF13_MARK, D14_NAF14_MARK, D15_NAF15_MARK,
-+	D16_MARK, D17_MARK, D18_MARK, D19_MARK,
-+	D20_MARK, D21_MARK, D22_MARK, D23_MARK,
-+	D24_MARK, D25_MARK, D26_MARK, D27_MARK,
-+	D28_MARK, D29_MARK, D30_MARK, D31_MARK,
-+};
-+static const unsigned int bsc_cs0_pins[] = {
-+	/* CS */
-+	109,
-+};
-+static const unsigned int bsc_cs0_mux[] = {
-+	CS0_MARK,
-+};
-+static const unsigned int bsc_cs2_pins[] = {
-+	/* CS */
-+	110,
-+};
-+static const unsigned int bsc_cs2_mux[] = {
-+	CS2_MARK,
-+};
-+static const unsigned int bsc_cs4_pins[] = {
-+	/* CS */
-+	111,
-+};
-+static const unsigned int bsc_cs4_mux[] = {
-+	CS4_MARK,
-+};
-+static const unsigned int bsc_cs5a_0_pins[] = {
-+	/* CS */
-+	105,
-+};
-+static const unsigned int bsc_cs5a_0_mux[] = {
-+	CS5A_PORT105_MARK,
-+};
-+static const unsigned int bsc_cs5a_1_pins[] = {
-+	/* CS */
-+	19,
-+};
-+static const unsigned int bsc_cs5a_1_mux[] = {
-+	CS5A_PORT19_MARK,
-+};
-+static const unsigned int bsc_cs5b_pins[] = {
-+	/* CS */
-+	103,
-+};
-+static const unsigned int bsc_cs5b_mux[] = {
-+	CS5B_MARK,
-+};
-+static const unsigned int bsc_cs6a_pins[] = {
-+	/* CS */
-+	104,
-+};
-+static const unsigned int bsc_cs6a_mux[] = {
-+	CS6A_MARK,
-+};
-+static const unsigned int bsc_rd_we8_pins[] = {
-+	/* RD, WE[0] */
-+	115, 113,
-+};
-+static const unsigned int bsc_rd_we8_mux[] = {
-+	RD_FSC_MARK, WE0_FWE_MARK,
-+};
-+static const unsigned int bsc_rd_we16_pins[] = {
-+	/* RD, WE[0:1] */
-+	115, 113, 112,
-+};
-+static const unsigned int bsc_rd_we16_mux[] = {
-+	RD_FSC_MARK, WE0_FWE_MARK, WE1_MARK,
-+};
-+static const unsigned int bsc_rd_we32_pins[] = {
-+	/* RD, WE[0:3] */
-+	115, 113, 112, 108, 107,
-+};
-+static const unsigned int bsc_rd_we32_mux[] = {
-+	RD_FSC_MARK, WE0_FWE_MARK, WE1_MARK, WE2_ICIORD_MARK, WE3_ICIOWR_MARK,
-+};
-+static const unsigned int bsc_bs_pins[] = {
-+	/* BS */
-+	175,
-+};
-+static const unsigned int bsc_bs_mux[] = {
-+	BS_MARK,
-+};
-+static const unsigned int bsc_rdwr_pins[] = {
-+	/* RDWR */
-+	114,
-+};
-+static const unsigned int bsc_rdwr_mux[] = {
-+	RDWR_MARK,
-+};
- /* - INTC ------------------------------------------------------------------- */
- IRQC_PINS_MUX(0, 0, 2);
- IRQC_PINS_MUX(0, 1, 13);
-@@ -2377,6 +2498,21 @@ static const unsigned int sdhi2_wp_1_mux[] = {
- };
- 
- static const struct sh_pfc_pin_group pinmux_groups[] = {
-+	SH_PFC_PIN_GROUP(bsc_data8),
-+	SH_PFC_PIN_GROUP(bsc_data16),
-+	SH_PFC_PIN_GROUP(bsc_data32),
-+	SH_PFC_PIN_GROUP(bsc_cs0),
-+	SH_PFC_PIN_GROUP(bsc_cs2),
-+	SH_PFC_PIN_GROUP(bsc_cs4),
-+	SH_PFC_PIN_GROUP(bsc_cs5a_0),
-+	SH_PFC_PIN_GROUP(bsc_cs5a_1),
-+	SH_PFC_PIN_GROUP(bsc_cs5b),
-+	SH_PFC_PIN_GROUP(bsc_cs6a),
-+	SH_PFC_PIN_GROUP(bsc_rd_we8),
-+	SH_PFC_PIN_GROUP(bsc_rd_we16),
-+	SH_PFC_PIN_GROUP(bsc_rd_we32),
-+	SH_PFC_PIN_GROUP(bsc_bs),
-+	SH_PFC_PIN_GROUP(bsc_rdwr),
- 	SH_PFC_PIN_GROUP(intc_irq0_0),
- 	SH_PFC_PIN_GROUP(intc_irq0_1),
- 	SH_PFC_PIN_GROUP(intc_irq1),
-@@ -2512,6 +2648,24 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(sdhi2_wp_1),
- };
- 
-+static const char * const bsc_groups[] = {
-+	"bsc_data8",
-+	"bsc_data16",
-+	"bsc_data32",
-+	"bsc_cs0",
-+	"bsc_cs2",
-+	"bsc_cs4",
-+	"bsc_cs5a_0",
-+	"bsc_cs5a_1",
-+	"bsc_cs5b",
-+	"bsc_cs6a",
-+	"bsc_rd_we8",
-+	"bsc_rd_we16",
-+	"bsc_rd_we32",
-+	"bsc_bs",
-+	"bsc_rdwr",
-+};
-+
- static const char * const intc_groups[] = {
- 	"intc_irq0_0",
- 	"intc_irq0_1",
-@@ -2694,6 +2848,7 @@ static const char * const sdhi2_groups[] = {
- };
- 
- static const struct sh_pfc_function pinmux_functions[] = {
-+	SH_PFC_FUNCTION(bsc),
- 	SH_PFC_FUNCTION(intc),
- 	SH_PFC_FUNCTION(lcd0),
- 	SH_PFC_FUNCTION(lcd1),
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0137-ARM-shmobile-Add-r8a7790-CA7-CPU-cores-to-DTSI.patch b/patches.renesas/0137-ARM-shmobile-Add-r8a7790-CA7-CPU-cores-to-DTSI.patch
deleted file mode 100644
index c32cb58bc585b..0000000000000
--- a/patches.renesas/0137-ARM-shmobile-Add-r8a7790-CA7-CPU-cores-to-DTSI.patch
+++ /dev/null
@@ -1,57 +0,0 @@
-From 797c49eab98ed78fc3986747369aeff9b3b6c531 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Sun, 15 Sep 2013 00:28:58 +0900
-Subject: ARM: shmobile: Add r8a7790 CA7 CPU cores to DTSI
-
-Add r8a7790 Cortex-A7 CPU information to DTSI.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 2007e74ca3769fd353fe87a7a105c14102d7980c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7790.dtsi | 28 ++++++++++++++++++++++++++++
- 1 file changed, 28 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
-index 0e4c87081c88..28fc18c9601b 100644
---- a/arch/arm/boot/dts/r8a7790.dtsi
-+++ b/arch/arm/boot/dts/r8a7790.dtsi
-@@ -45,6 +45,34 @@
- 			reg = <3>;
- 			clock-frequency = <1300000000>;
- 		};
-+
-+		cpu4: cpu@4 {
-+			device_type = "cpu";
-+			compatible = "arm,cortex-a7";
-+			reg = <0x100>;
-+			clock-frequency = <780000000>;
-+		};
-+
-+		cpu5: cpu@5 {
-+			device_type = "cpu";
-+			compatible = "arm,cortex-a7";
-+			reg = <0x101>;
-+			clock-frequency = <780000000>;
-+		};
-+
-+		cpu6: cpu@6 {
-+			device_type = "cpu";
-+			compatible = "arm,cortex-a7";
-+			reg = <0x102>;
-+			clock-frequency = <780000000>;
-+		};
-+
-+		cpu7: cpu@7 {
-+			device_type = "cpu";
-+			compatible = "arm,cortex-a7";
-+			reg = <0x103>;
-+			clock-frequency = <780000000>;
-+		};
- 	};
- 
- 	gic: interrupt-controller@f1001000 {
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0137-ARM-shmobile-bockw-enable-HSPI0-on-DTS.patch b/patches.renesas/0137-ARM-shmobile-bockw-enable-HSPI0-on-DTS.patch
deleted file mode 100644
index 1be5be7a3380c..0000000000000
--- a/patches.renesas/0137-ARM-shmobile-bockw-enable-HSPI0-on-DTS.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-From 1c2b61fc488865ae149c8fce18c3fc13a1119096 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Thu, 31 Oct 2013 18:22:53 -0700
-Subject: ARM: shmobile: bockw: enable HSPI0 on DTS
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 8c6639665d9771d2e84fe6e0915d46a6fbb8594e)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7778-bockw-reference.dts | 11 +++++++++++
- 1 file changed, 11 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a7778-bockw-reference.dts b/arch/arm/boot/dts/r8a7778-bockw-reference.dts
-index 9c8bd37804a6..f488c48bf69e 100644
---- a/arch/arm/boot/dts/r8a7778-bockw-reference.dts
-+++ b/arch/arm/boot/dts/r8a7778-bockw-reference.dts
-@@ -86,6 +86,11 @@
- 				  "sdhi0_cd", "sdhi0_wp";
- 		renesas,function = "sdhi0";
- 	};
-+
-+	hspi0_pins: hspi0 {
-+		renesas,groups = "hspi0_a";
-+		renesas,function = "hspi0";
-+	};
- };
- 
- &sdhi0 {
-@@ -96,3 +101,9 @@
- 	bus-width = <4>;
- 	status = "okay";
- };
-+
-+&hspi0 {
-+	pinctrl-0 = <&hspi0_pins>;
-+	pinctrl-names = "default";
-+	status = "okay";
-+};
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0137-sh-pfc-r8a7740-Add-GETHER-pin-groups-and-functions.patch b/patches.renesas/0137-sh-pfc-r8a7740-Add-GETHER-pin-groups-and-functions.patch
deleted file mode 100644
index 22da678385f63..0000000000000
--- a/patches.renesas/0137-sh-pfc-r8a7740-Add-GETHER-pin-groups-and-functions.patch
+++ /dev/null
@@ -1,130 +0,0 @@
-From 94c161993ac51e1ecca9e5226ab74c5af02801b1 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 18 Apr 2013 01:04:30 +0200
-Subject: sh-pfc: r8a7740: Add GETHER pin groups and functions
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit bae11d30d0cafdc5824dd6ea0bbb1ef229416b72)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7740.c | 82 ++++++++++++++++++++++++++++++++++++
- 1 file changed, 82 insertions(+)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-index f17a39ad..1b98990c 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-@@ -1795,6 +1795,72 @@ static const unsigned int bsc_rdwr_pins[] = {
- static const unsigned int bsc_rdwr_mux[] = {
- 	RDWR_MARK,
- };
-+/* - GETHER ----------------------------------------------------------------- */
-+static const unsigned int gether_rmii_pins[] = {
-+	/* RXD[0:1], RX_ER, CRS_DV, TXD[0:1], TX_EN, REF_CLK, MDC, MDIO */
-+	195, 196, 194, 193, 200, 201, 199, 159, 202, 208,
-+};
-+static const unsigned int gether_rmii_mux[] = {
-+	RMII_RXD0_MARK, RMII_RXD1_MARK, RMII_RX_ER_MARK, RMII_CRS_DV_MARK,
-+	RMII_TXD0_MARK, RMII_TXD1_MARK, RMII_TX_EN_MARK, RMII_REF50CK_MARK,
-+	RMII_MDC_MARK, RMII_MDIO_MARK,
-+};
-+static const unsigned int gether_mii_pins[] = {
-+	/* RXD[0:3], RX_CLK, RX_DV, RX_ER
-+	 * TXD[0:3], TX_CLK, TX_EN, TX_ER
-+	 * CRS, COL, MDC, MDIO,
-+	 */
-+	185, 186, 187, 188, 174, 161, 204,
-+	171, 170, 169, 168, 184, 183, 203,
-+	205, 163, 206, 207,
-+};
-+static const unsigned int gether_mii_mux[] = {
-+	ET_ERXD0_MARK, ET_ERXD1_MARK, ET_ERXD2_MARK, ET_ERXD3_MARK,
-+	ET_RX_CLK_MARK, ET_RX_DV_MARK, ET_RX_ER_MARK,
-+	ET_ETXD0_MARK, ET_ETXD1_MARK, ET_ETXD2_MARK, ET_ETXD3_MARK,
-+	ET_TX_CLK_MARK, ET_TX_EN_MARK, ET_TX_ER_MARK,
-+	ET_CRS_MARK, ET_COL_MARK, ET_MDC_MARK, ET_MDIO_MARK,
-+};
-+static const unsigned int gether_gmii_pins[] = {
-+	/* RXD[0:7], RX_CLK, RX_DV, RX_ER
-+	 * TXD[0:7], GTX_CLK, TX_CLK, TX_EN, TX_ER
-+	 * CRS, COL, MDC, MDIO, REF125CK_MARK,
-+	 */
-+	185, 186, 187, 188, 189, 190, 191, 192, 174, 161, 204,
-+	171, 170, 169, 168, 167, 166, 173, 172, 176, 184, 183, 203,
-+	205, 163, 206, 207,
-+};
-+static const unsigned int gether_gmii_mux[] = {
-+	ET_ERXD0_MARK, ET_ERXD1_MARK, ET_ERXD2_MARK, ET_ERXD3_MARK,
-+	ET_ERXD4_MARK, ET_ERXD5_MARK, ET_ERXD6_MARK, ET_ERXD7_MARK,
-+	ET_RX_CLK_MARK, ET_RX_DV_MARK, ET_RX_ER_MARK,
-+	ET_ETXD0_MARK, ET_ETXD1_MARK, ET_ETXD2_MARK, ET_ETXD3_MARK,
-+	ET_ETXD4_MARK, ET_ETXD5_MARK, ET_ETXD6_MARK, ET_ETXD7_MARK,
-+	ET_GTX_CLK_MARK, ET_TX_CLK_MARK, ET_TX_EN_MARK, ET_TX_ER_MARK,
-+	ET_CRS_MARK, ET_COL_MARK, ET_MDC_MARK, ET_MDIO_MARK,
-+	RMII_REF125CK_MARK,
-+};
-+static const unsigned int gether_int_pins[] = {
-+	/* PHY_INT */
-+	164,
-+};
-+static const unsigned int gether_int_mux[] = {
-+	ET_PHY_INT_MARK,
-+};
-+static const unsigned int gether_link_pins[] = {
-+	/* LINK */
-+	177,
-+};
-+static const unsigned int gether_link_mux[] = {
-+	ET_LINK_MARK,
-+};
-+static const unsigned int gether_wol_pins[] = {
-+	/* WOL */
-+	175,
-+};
-+static const unsigned int gether_wol_mux[] = {
-+	ET_WOL_MARK,
-+};
- /* - INTC ------------------------------------------------------------------- */
- IRQC_PINS_MUX(0, 0, 2);
- IRQC_PINS_MUX(0, 1, 13);
-@@ -2513,6 +2579,12 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(bsc_rd_we32),
- 	SH_PFC_PIN_GROUP(bsc_bs),
- 	SH_PFC_PIN_GROUP(bsc_rdwr),
-+	SH_PFC_PIN_GROUP(gether_rmii),
-+	SH_PFC_PIN_GROUP(gether_mii),
-+	SH_PFC_PIN_GROUP(gether_gmii),
-+	SH_PFC_PIN_GROUP(gether_int),
-+	SH_PFC_PIN_GROUP(gether_link),
-+	SH_PFC_PIN_GROUP(gether_wol),
- 	SH_PFC_PIN_GROUP(intc_irq0_0),
- 	SH_PFC_PIN_GROUP(intc_irq0_1),
- 	SH_PFC_PIN_GROUP(intc_irq1),
-@@ -2666,6 +2738,15 @@ static const char * const bsc_groups[] = {
- 	"bsc_rdwr",
- };
- 
-+static const char * const gether_groups[] = {
-+	"gether_rmii",
-+	"gether_mii",
-+	"gether_gmii",
-+	"gether_int",
-+	"gether_link",
-+	"gether_wol",
-+};
-+
- static const char * const intc_groups[] = {
- 	"intc_irq0_0",
- 	"intc_irq0_1",
-@@ -2849,6 +2930,7 @@ static const char * const sdhi2_groups[] = {
- 
- static const struct sh_pfc_function pinmux_functions[] = {
- 	SH_PFC_FUNCTION(bsc),
-+	SH_PFC_FUNCTION(gether),
- 	SH_PFC_FUNCTION(intc),
- 	SH_PFC_FUNCTION(lcd0),
- 	SH_PFC_FUNCTION(lcd1),
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0138-ARM-shmobile-Initial-r8a7791-SoC-support.patch b/patches.renesas/0138-ARM-shmobile-Initial-r8a7791-SoC-support.patch
deleted file mode 100644
index 37e2182abfa98..0000000000000
--- a/patches.renesas/0138-ARM-shmobile-Initial-r8a7791-SoC-support.patch
+++ /dev/null
@@ -1,381 +0,0 @@
-From 58d6df387825fcc230079ac8c8432849c84355a1 Mon Sep 17 00:00:00 2001
-From: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>
-Date: Wed, 4 Sep 2013 12:45:57 +0900
-Subject: ARM: shmobile: Initial r8a7791 SoC support
-
-Add initial support for the r8a7791 SoC including:
- - Single Cortex-A15 CPU Core
- - GIC
-
-No static virtual mappings are used, all the components
-make use of ioremap(). DT_MACHINE_START is still wrapped
-in CONFIG_USE_OF to match other mach-shmobile code.
-
-Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>
-Signed-off-by: Ryo Kataoka <ryo.kataoka.wt@renesas.com>
-[damm@opensource.se: Forward ported to upstream, dropped not-yet-ready code]
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-(cherry picked from commit 0d0771ab2bd5f57a62db91f26bba1e9f522d16cb)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7791.dtsi                |  41 ++++++
- arch/arm/mach-shmobile/Kconfig                |   6 +
- arch/arm/mach-shmobile/Makefile               |   2 +
- arch/arm/mach-shmobile/clock-r8a7791.c        | 198 ++++++++++++++++++++++++++
- arch/arm/mach-shmobile/include/mach/r8a7791.h |   6 +
- arch/arm/mach-shmobile/setup-r8a7791.c        |  38 +++++
- 6 files changed, 291 insertions(+)
- create mode 100644 arch/arm/boot/dts/r8a7791.dtsi
- create mode 100644 arch/arm/mach-shmobile/clock-r8a7791.c
- create mode 100644 arch/arm/mach-shmobile/include/mach/r8a7791.h
- create mode 100644 arch/arm/mach-shmobile/setup-r8a7791.c
-
-diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
-new file mode 100644
-index 000000000000..bbed43bd9be9
---- /dev/null
-+++ b/arch/arm/boot/dts/r8a7791.dtsi
-@@ -0,0 +1,41 @@
-+/*
-+ * Device Tree Source for the r8a7791 SoC
-+ *
-+ * Copyright (C) 2013 Renesas Electronics Corporation
-+ * Copyright (C) 2013 Renesas Solutions Corp.
-+ *
-+ * This file is licensed under the terms of the GNU General Public License
-+ * version 2.  This program is licensed "as is" without any warranty of any
-+ * kind, whether express or implied.
-+ */
-+
-+/ {
-+	compatible = "renesas,r8a7791";
-+	interrupt-parent = <&gic>;
-+	#address-cells = <2>;
-+	#size-cells = <2>;
-+
-+	cpus {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		cpu0: cpu@0 {
-+			device_type = "cpu";
-+			compatible = "arm,cortex-a15";
-+			reg = <0>;
-+			clock-frequency = <1300000000>;
-+		};
-+	};
-+
-+	gic: interrupt-controller@f1001000 {
-+		compatible = "arm,cortex-a15-gic";
-+		#interrupt-cells = <3>;
-+		#address-cells = <0>;
-+		interrupt-controller;
-+		reg = <0 0xf1001000 0 0x1000>,
-+			<0 0xf1002000 0 0x1000>,
-+			<0 0xf1004000 0 0x2000>,
-+			<0 0xf1006000 0 0x2000>;
-+		interrupts = <1 9 0xf04>;
-+	};
-+};
-diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
-index 1f94c310c477..b45240512ce0 100644
---- a/arch/arm/mach-shmobile/Kconfig
-+++ b/arch/arm/mach-shmobile/Kconfig
-@@ -101,6 +101,12 @@ config ARCH_R8A7790
- 	select SH_CLK_CPG
- 	select RENESAS_IRQC
- 
-+config ARCH_R8A7791
-+	bool "R-Car M2 (R8A77910)"
-+	select ARM_GIC
-+	select CPU_V7
-+	select SH_CLK_CPG
-+
- config ARCH_EMEV2
- 	bool "Emma Mobile EV2"
- 	select ARCH_WANT_OPTIONAL_GPIOLIB
-diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
-index 2705bfa8c113..228193cc9a38 100644
---- a/arch/arm/mach-shmobile/Makefile
-+++ b/arch/arm/mach-shmobile/Makefile
-@@ -15,6 +15,7 @@ obj-$(CONFIG_ARCH_R8A7740)	+= setup-r8a7740.o
- obj-$(CONFIG_ARCH_R8A7778)	+= setup-r8a7778.o
- obj-$(CONFIG_ARCH_R8A7779)	+= setup-r8a7779.o
- obj-$(CONFIG_ARCH_R8A7790)	+= setup-r8a7790.o
-+obj-$(CONFIG_ARCH_R8A7791)	+= setup-r8a7791.o
- obj-$(CONFIG_ARCH_EMEV2)	+= setup-emev2.o
- 
- # Clock objects
-@@ -27,6 +28,7 @@ obj-$(CONFIG_ARCH_R8A7740)	+= clock-r8a7740.o
- obj-$(CONFIG_ARCH_R8A7778)	+= clock-r8a7778.o
- obj-$(CONFIG_ARCH_R8A7779)	+= clock-r8a7779.o
- obj-$(CONFIG_ARCH_R8A7790)	+= clock-r8a7790.o
-+obj-$(CONFIG_ARCH_R8A7791)	+= clock-r8a7791.o
- obj-$(CONFIG_ARCH_EMEV2)	+= clock-emev2.o
- endif
- 
-diff --git a/arch/arm/mach-shmobile/clock-r8a7791.c b/arch/arm/mach-shmobile/clock-r8a7791.c
-new file mode 100644
-index 000000000000..9929feb1b810
---- /dev/null
-+++ b/arch/arm/mach-shmobile/clock-r8a7791.c
-@@ -0,0 +1,198 @@
-+/*
-+ * r8a7791 clock framework support
-+ *
-+ * Copyright (C) 2013  Renesas Electronics Corporation
-+ * Copyright (C) 2013  Renesas Solutions Corp.
-+ * Copyright (C) 2013  Magnus Damm
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; version 2 of the License.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
-+ */
-+#include <linux/init.h>
-+#include <linux/io.h>
-+#include <linux/kernel.h>
-+#include <linux/sh_clk.h>
-+#include <linux/clkdev.h>
-+#include <mach/clock.h>
-+#include <mach/common.h>
-+
-+/*
-+ *   MD		EXTAL		PLL0	PLL1	PLL3
-+ * 14 13 19	(MHz)		*1	*1
-+ *---------------------------------------------------
-+ * 0  0  0	15 x 1		x172/2	x208/2	x106
-+ * 0  0  1	15 x 1		x172/2	x208/2	x88
-+ * 0  1  0	20 x 1		x130/2	x156/2	x80
-+ * 0  1  1	20 x 1		x130/2	x156/2	x66
-+ * 1  0  0	26 / 2		x200/2	x240/2	x122
-+ * 1  0  1	26 / 2		x200/2	x240/2	x102
-+ * 1  1  0	30 / 2		x172/2	x208/2	x106
-+ * 1  1  1	30 / 2		x172/2	x208/2	x88
-+ *
-+ * *1 :	Table 7.6 indicates VCO ouput (PLLx = VCO/2)
-+ *	see "p1 / 2" on R8A7791_CLOCK_ROOT() below
-+ */
-+
-+#define MD(nr)	(1 << nr)
-+
-+#define CPG_BASE 0xe6150000
-+#define CPG_LEN 0x1000
-+
-+#define SMSTPCR1	0xE6150134
-+#define SMSTPCR2	0xe6150138
-+#define SMSTPCR3	0xE615013C
-+#define SMSTPCR5	0xE6150144
-+#define SMSTPCR7	0xe615014c
-+#define SMSTPCR8	0xE6150990
-+#define SMSTPCR9	0xE6150994
-+#define SMSTPCR10	0xE6150998
-+
-+#define MODEMR		0xE6160060
-+#define SDCKCR		0xE6150074
-+#define SD2CKCR		0xE6150078
-+#define SD3CKCR		0xE615007C
-+#define MMC0CKCR	0xE6150240
-+#define MMC1CKCR	0xE6150244
-+#define SSPCKCR		0xE6150248
-+#define SSPRSCKCR	0xE615024C
-+
-+static struct clk_mapping cpg_mapping = {
-+	.phys   = CPG_BASE,
-+	.len    = CPG_LEN,
-+};
-+
-+static struct clk extal_clk = {
-+	/* .rate will be updated on r8a7791_clock_init() */
-+	.mapping	= &cpg_mapping,
-+};
-+
-+static struct sh_clk_ops followparent_clk_ops = {
-+	.recalc	= followparent_recalc,
-+};
-+
-+static struct clk main_clk = {
-+	/* .parent will be set r8a73a4_clock_init */
-+	.ops	= &followparent_clk_ops,
-+};
-+
-+/*
-+ * clock ratio of these clock will be updated
-+ * on r8a7791_clock_init()
-+ */
-+SH_FIXED_RATIO_CLK_SET(pll1_clk,		main_clk,	1, 1);
-+SH_FIXED_RATIO_CLK_SET(pll3_clk,		main_clk,	1, 1);
-+
-+/* fixed ratio clock */
-+SH_FIXED_RATIO_CLK_SET(extal_div2_clk,		extal_clk,	1, 2);
-+SH_FIXED_RATIO_CLK_SET(cp_clk,			extal_clk,	1, 2);
-+
-+SH_FIXED_RATIO_CLK_SET(pll1_div2_clk,		pll1_clk,	1, 2);
-+SH_FIXED_RATIO_CLK_SET(hp_clk,			pll1_clk,	1, 12);
-+SH_FIXED_RATIO_CLK_SET(p_clk,			pll1_clk,	1, 24);
-+
-+SH_FIXED_RATIO_CLK_SET(mp_clk,			pll1_div2_clk,	1, 15);
-+
-+static struct clk *main_clks[] = {
-+	&extal_clk,
-+	&extal_div2_clk,
-+	&main_clk,
-+	&pll1_clk,
-+	&pll1_div2_clk,
-+	&pll3_clk,
-+	&hp_clk,
-+	&p_clk,
-+	&mp_clk,
-+	&cp_clk,
-+};
-+
-+/* MSTP */
-+enum {
-+	MSTP721, MSTP720,
-+/*	MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202,*/
-+	MSTP_NR
-+};
-+
-+static struct clk mstp_clks[MSTP_NR] = {
-+	[MSTP721] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 21, 0), /* SCIF0 */
-+	[MSTP720] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 20, 0), /* SCIF1 */
-+};
-+
-+static struct clk_lookup lookups[] = {
-+
-+	/* main clocks */
-+	CLKDEV_CON_ID("extal",		&extal_clk),
-+	CLKDEV_CON_ID("extal_div2",	&extal_div2_clk),
-+	CLKDEV_CON_ID("main",		&main_clk),
-+	CLKDEV_CON_ID("pll1",		&pll1_clk),
-+	CLKDEV_CON_ID("pll1_div2",	&pll1_div2_clk),
-+	CLKDEV_CON_ID("pll3",		&pll3_clk),
-+	CLKDEV_CON_ID("hp",		&hp_clk),
-+	CLKDEV_CON_ID("p",		&p_clk),
-+	CLKDEV_CON_ID("mp",		&mp_clk),
-+	CLKDEV_CON_ID("cp",		&cp_clk),
-+	CLKDEV_CON_ID("peripheral_clk", &hp_clk),
-+};
-+
-+#define R8A7791_CLOCK_ROOT(e, m, p0, p1, p30, p31)		\
-+	extal_clk.rate	= e * 1000 * 1000;			\
-+	main_clk.parent	= m;					\
-+	SH_CLK_SET_RATIO(&pll1_clk_ratio, p1 / 2, 1);		\
-+	if (mode & MD(19))					\
-+		SH_CLK_SET_RATIO(&pll3_clk_ratio, p31, 1);	\
-+	else							\
-+		SH_CLK_SET_RATIO(&pll3_clk_ratio, p30, 1)
-+
-+
-+void __init r8a7791_clock_init(void)
-+{
-+	void __iomem *modemr = ioremap_nocache(MODEMR, PAGE_SIZE);
-+	u32 mode;
-+	int k, ret = 0;
-+
-+	BUG_ON(!modemr);
-+	mode = ioread32(modemr);
-+	iounmap(modemr);
-+
-+	switch (mode & (MD(14) | MD(13))) {
-+	case 0:
-+		R8A7791_CLOCK_ROOT(15, &extal_clk, 172, 208, 106, 88);
-+		break;
-+	case MD(13):
-+		R8A7791_CLOCK_ROOT(20, &extal_clk, 130, 156, 80, 66);
-+		break;
-+	case MD(14):
-+		R8A7791_CLOCK_ROOT(26, &extal_div2_clk, 200, 240, 122, 102);
-+		break;
-+	case MD(13) | MD(14):
-+		R8A7791_CLOCK_ROOT(30, &extal_div2_clk, 172, 208, 106, 88);
-+		break;
-+	}
-+
-+	for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++)
-+		ret = clk_register(main_clks[k]);
-+
-+	if (!ret)
-+		ret = sh_clk_mstp_register(mstp_clks, MSTP_NR);
-+
-+	clkdev_add_table(lookups, ARRAY_SIZE(lookups));
-+
-+	if (!ret)
-+		shmobile_clk_init();
-+	else
-+		goto epanic;
-+
-+	return;
-+
-+epanic:
-+	panic("failed to setup r8a7791 clocks\n");
-+}
-diff --git a/arch/arm/mach-shmobile/include/mach/r8a7791.h b/arch/arm/mach-shmobile/include/mach/r8a7791.h
-new file mode 100644
-index 000000000000..43b7206998da
---- /dev/null
-+++ b/arch/arm/mach-shmobile/include/mach/r8a7791.h
-@@ -0,0 +1,6 @@
-+#ifndef __ASM_R8A7791_H__
-+#define __ASM_R8A7791_H__
-+
-+void r8a7791_clock_init(void);
-+
-+#endif /* __ASM_R8A7791_H__ */
-diff --git a/arch/arm/mach-shmobile/setup-r8a7791.c b/arch/arm/mach-shmobile/setup-r8a7791.c
-new file mode 100644
-index 000000000000..88dcce1a6391
---- /dev/null
-+++ b/arch/arm/mach-shmobile/setup-r8a7791.c
-@@ -0,0 +1,38 @@
-+/*
-+ * r8a7791 processor support
-+ *
-+ * Copyright (C) 2013  Renesas Electronics Corporation
-+ * Copyright (C) 2013  Renesas Solutions Corp.
-+ * Copyright (C) 2013  Magnus Damm
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; version 2 of the License.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
-+ */
-+
-+#include <linux/irq.h>
-+#include <linux/kernel.h>
-+#include <linux/of_platform.h>
-+#include <mach/common.h>
-+#include <mach/r8a7791.h>
-+#include <asm/mach/arch.h>
-+
-+#ifdef CONFIG_USE_OF
-+static const char *r8a7791_boards_compat_dt[] __initdata = {
-+	"renesas,r8a7791",
-+	NULL,
-+};
-+
-+DT_MACHINE_START(R8A7791_DT, "Generic R8A7791 (Flattened Device Tree)")
-+	.dt_compat	= r8a7791_boards_compat_dt,
-+MACHINE_END
-+#endif /* CONFIG_USE_OF */
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0138-ARM-shmobile-Use-include-in-device-tree-sources.patch b/patches.renesas/0138-ARM-shmobile-Use-include-in-device-tree-sources.patch
deleted file mode 100644
index 29ab888371a68..0000000000000
--- a/patches.renesas/0138-ARM-shmobile-Use-include-in-device-tree-sources.patch
+++ /dev/null
@@ -1,243 +0,0 @@
-From 690e74f1c4dd4ebaa442d4d23593a0ebc23a39db Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Sat, 9 Nov 2013 13:23:53 +0100
-Subject: ARM: shmobile: Use #include in device tree sources
-
-In order to allow usage of the preprocessor in the SoC device tree
-sources, switch from /include/ to #include.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 31c46cbf5b8bab87e89028977521c84f2d871040)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r7s72100-genmai.dts                   | 2 +-
- arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts         | 2 +-
- arch/arm/boot/dts/r8a73a4-ape6evm.dts                   | 2 +-
- arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts | 2 +-
- arch/arm/boot/dts/r8a7740-armadillo800eva.dts           | 2 +-
- arch/arm/boot/dts/r8a7778-bockw-reference.dts           | 2 +-
- arch/arm/boot/dts/r8a7778-bockw.dts                     | 2 +-
- arch/arm/boot/dts/r8a7779-marzen-reference.dts          | 2 +-
- arch/arm/boot/dts/r8a7779-marzen.dts                    | 2 +-
- arch/arm/boot/dts/r8a7790-lager-reference.dts           | 2 +-
- arch/arm/boot/dts/r8a7790-lager.dts                     | 2 +-
- arch/arm/boot/dts/r8a7791-koelsch-reference.dts         | 2 +-
- arch/arm/boot/dts/r8a7791-koelsch.dts                   | 2 +-
- arch/arm/boot/dts/sh7372-mackerel.dts                   | 2 +-
- arch/arm/boot/dts/sh73a0-kzm9g-reference.dts            | 2 +-
- arch/arm/boot/dts/sh73a0-kzm9g.dts                      | 2 +-
- 16 files changed, 16 insertions(+), 16 deletions(-)
-
-diff --git a/arch/arm/boot/dts/r7s72100-genmai.dts b/arch/arm/boot/dts/r7s72100-genmai.dts
-index 1fb20f2333cc..b1deaf7e2e06 100644
---- a/arch/arm/boot/dts/r7s72100-genmai.dts
-+++ b/arch/arm/boot/dts/r7s72100-genmai.dts
-@@ -9,7 +9,7 @@
-  */
- 
- /dts-v1/;
--/include/ "r7s72100.dtsi"
-+#include "r7s72100.dtsi"
- 
- / {
- 	model = "Genmai";
-diff --git a/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts b/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts
-index 25dbc1c0947d..338f0cbfff7a 100644
---- a/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts
-+++ b/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts
-@@ -9,7 +9,7 @@
-  */
- 
- /dts-v1/;
--/include/ "r8a73a4.dtsi"
-+#include "r8a73a4.dtsi"
- #include <dt-bindings/gpio/gpio.h>
- 
- / {
-diff --git a/arch/arm/boot/dts/r8a73a4-ape6evm.dts b/arch/arm/boot/dts/r8a73a4-ape6evm.dts
-index 91436b58016f..7db8d79fb93c 100644
---- a/arch/arm/boot/dts/r8a73a4-ape6evm.dts
-+++ b/arch/arm/boot/dts/r8a73a4-ape6evm.dts
-@@ -9,7 +9,7 @@
-  */
- 
- /dts-v1/;
--/include/ "r8a73a4.dtsi"
-+#include "r8a73a4.dtsi"
- 
- / {
- 	model = "APE6EVM";
-diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
-index 6a542198985d..c7c5bcb893ca 100644
---- a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
-+++ b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
-@@ -9,7 +9,7 @@
-  */
- 
- /dts-v1/;
--/include/ "r8a7740.dtsi"
-+#include "r8a7740.dtsi"
- #include <dt-bindings/gpio/gpio.h>
- #include <dt-bindings/pwm/pwm.h>
- 
-diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva.dts
-index 426cd9c3e1c4..a06a11e1a840 100644
---- a/arch/arm/boot/dts/r8a7740-armadillo800eva.dts
-+++ b/arch/arm/boot/dts/r8a7740-armadillo800eva.dts
-@@ -9,7 +9,7 @@
-  */
- 
- /dts-v1/;
--/include/ "r8a7740.dtsi"
-+#include "r8a7740.dtsi"
- 
- / {
- 	model = "armadillo 800 eva";
-diff --git a/arch/arm/boot/dts/r8a7778-bockw-reference.dts b/arch/arm/boot/dts/r8a7778-bockw-reference.dts
-index f488c48bf69e..be9b75377f3e 100644
---- a/arch/arm/boot/dts/r8a7778-bockw-reference.dts
-+++ b/arch/arm/boot/dts/r8a7778-bockw-reference.dts
-@@ -15,7 +15,7 @@
-  */
- 
- /dts-v1/;
--/include/ "r8a7778.dtsi"
-+#include "r8a7778.dtsi"
- 
- / {
- 	model = "bockw";
-diff --git a/arch/arm/boot/dts/r8a7778-bockw.dts b/arch/arm/boot/dts/r8a7778-bockw.dts
-index 12bbebc9c955..46a884d45175 100644
---- a/arch/arm/boot/dts/r8a7778-bockw.dts
-+++ b/arch/arm/boot/dts/r8a7778-bockw.dts
-@@ -15,7 +15,7 @@
-  */
- 
- /dts-v1/;
--/include/ "r8a7778.dtsi"
-+#include "r8a7778.dtsi"
- 
- / {
- 	model = "bockw";
-diff --git a/arch/arm/boot/dts/r8a7779-marzen-reference.dts b/arch/arm/boot/dts/r8a7779-marzen-reference.dts
-index ce3fe9eb1606..08b9ee37ad2f 100644
---- a/arch/arm/boot/dts/r8a7779-marzen-reference.dts
-+++ b/arch/arm/boot/dts/r8a7779-marzen-reference.dts
-@@ -10,7 +10,7 @@
-  */
- 
- /dts-v1/;
--/include/ "r8a7779.dtsi"
-+#include "r8a7779.dtsi"
- #include <dt-bindings/gpio/gpio.h>
- 
- / {
-diff --git a/arch/arm/boot/dts/r8a7779-marzen.dts b/arch/arm/boot/dts/r8a7779-marzen.dts
-index f3f7f7999736..a7af2c2371f2 100644
---- a/arch/arm/boot/dts/r8a7779-marzen.dts
-+++ b/arch/arm/boot/dts/r8a7779-marzen.dts
-@@ -10,7 +10,7 @@
-  */
- 
- /dts-v1/;
--/include/ "r8a7779.dtsi"
-+#include "r8a7779.dtsi"
- 
- / {
- 	model = "marzen";
-diff --git a/arch/arm/boot/dts/r8a7790-lager-reference.dts b/arch/arm/boot/dts/r8a7790-lager-reference.dts
-index ec82674d8033..cce7dbfc1954 100644
---- a/arch/arm/boot/dts/r8a7790-lager-reference.dts
-+++ b/arch/arm/boot/dts/r8a7790-lager-reference.dts
-@@ -9,7 +9,7 @@
-  */
- 
- /dts-v1/;
--/include/ "r8a7790.dtsi"
-+#include "r8a7790.dtsi"
- #include <dt-bindings/gpio/gpio.h>
- 
- / {
-diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts
-index 203bd089af29..8799dfb0068e 100644
---- a/arch/arm/boot/dts/r8a7790-lager.dts
-+++ b/arch/arm/boot/dts/r8a7790-lager.dts
-@@ -9,7 +9,7 @@
-  */
- 
- /dts-v1/;
--/include/ "r8a7790.dtsi"
-+#include "r8a7790.dtsi"
- 
- / {
- 	model = "Lager";
-diff --git a/arch/arm/boot/dts/r8a7791-koelsch-reference.dts b/arch/arm/boot/dts/r8a7791-koelsch-reference.dts
-index b8a374a6bf79..1a0f082b21df 100644
---- a/arch/arm/boot/dts/r8a7791-koelsch-reference.dts
-+++ b/arch/arm/boot/dts/r8a7791-koelsch-reference.dts
-@@ -10,7 +10,7 @@
-  */
- 
- /dts-v1/;
--/include/ "r8a7791.dtsi"
-+#include "r8a7791.dtsi"
- 
- / {
- 	model = "Koelsch";
-diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts
-index 1ce5250ec278..c4e8b3a0cd13 100644
---- a/arch/arm/boot/dts/r8a7791-koelsch.dts
-+++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
-@@ -10,7 +10,7 @@
-  */
- 
- /dts-v1/;
--/include/ "r8a7791.dtsi"
-+#include "r8a7791.dtsi"
- 
- / {
- 	model = "Koelsch";
-diff --git a/arch/arm/boot/dts/sh7372-mackerel.dts b/arch/arm/boot/dts/sh7372-mackerel.dts
-index 8acf51e0cdae..a759a276c9a9 100644
---- a/arch/arm/boot/dts/sh7372-mackerel.dts
-+++ b/arch/arm/boot/dts/sh7372-mackerel.dts
-@@ -9,7 +9,7 @@
-  */
- 
- /dts-v1/;
--/include/ "sh7372.dtsi"
-+#include "sh7372.dtsi"
- 
- / {
- 	model = "Mackerel (AP4 EVM 2nd)";
-diff --git a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
-index df75aea42a48..d5a6d74cdda0 100644
---- a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
-+++ b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
-@@ -12,7 +12,7 @@
-  */
- 
- /dts-v1/;
--/include/ "sh73a0.dtsi"
-+#include "sh73a0.dtsi"
- #include <dt-bindings/gpio/gpio.h>
- 
- / {
-diff --git a/arch/arm/boot/dts/sh73a0-kzm9g.dts b/arch/arm/boot/dts/sh73a0-kzm9g.dts
-index 0f1ca7792c46..27c5f426d172 100644
---- a/arch/arm/boot/dts/sh73a0-kzm9g.dts
-+++ b/arch/arm/boot/dts/sh73a0-kzm9g.dts
-@@ -9,7 +9,7 @@
-  */
- 
- /dts-v1/;
--/include/ "sh73a0.dtsi"
-+#include "sh73a0.dtsi"
- 
- / {
- 	model = "KZM-A9-GT";
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0138-sh-pfc-r8a7740-Add-CEU-pin-groups-and-functions.patch b/patches.renesas/0138-sh-pfc-r8a7740-Add-CEU-pin-groups-and-functions.patch
deleted file mode 100644
index e29c0a4d58f8d..0000000000000
--- a/patches.renesas/0138-sh-pfc-r8a7740-Add-CEU-pin-groups-and-functions.patch
+++ /dev/null
@@ -1,172 +0,0 @@
-From e29c4f54f32569d1435a9e1801b8c318bcc37f6f Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 18 Apr 2013 01:04:30 +0200
-Subject: sh-pfc: r8a7740: Add CEU pin groups and functions
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 0ec939bd75d4a7905f4dbb79d2eb239ce6e2cbaf)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7740.c | 124 +++++++++++++++++++++++++++++++++++
- 1 file changed, 124 insertions(+)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-index 1b98990c..71d7c1ff 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-@@ -1795,6 +1795,98 @@ static const unsigned int bsc_rdwr_pins[] = {
- static const unsigned int bsc_rdwr_mux[] = {
- 	RDWR_MARK,
- };
-+/* - CEU0 ------------------------------------------------------------------- */
-+static const unsigned int ceu0_data_0_7_pins[] = {
-+	/* D[0:7] */
-+	34, 33, 32, 31, 30, 29, 28, 27,
-+};
-+static const unsigned int ceu0_data_0_7_mux[] = {
-+	VIO0_D0_MARK, VIO0_D1_MARK, VIO0_D2_MARK, VIO0_D3_MARK,
-+	VIO0_D4_MARK, VIO0_D5_MARK, VIO0_D6_MARK, VIO0_D7_MARK,
-+};
-+static const unsigned int ceu0_data_8_15_0_pins[] = {
-+	/* D[8:15] */
-+	182, 181, 180, 179, 178, 26, 25, 24,
-+};
-+static const unsigned int ceu0_data_8_15_0_mux[] = {
-+	VIO0_D8_MARK, VIO0_D9_MARK, VIO0_D10_MARK, VIO0_D11_MARK,
-+	VIO0_D12_MARK, VIO0_D13_PORT26_MARK, VIO0_D14_PORT25_MARK,
-+	VIO0_D15_PORT24_MARK,
-+};
-+static const unsigned int ceu0_data_8_15_1_pins[] = {
-+	/* D[8:15] */
-+	182, 181, 180, 179, 178, 22, 95, 96,
-+};
-+static const unsigned int ceu0_data_8_15_1_mux[] = {
-+	VIO0_D8_MARK, VIO0_D9_MARK, VIO0_D10_MARK, VIO0_D11_MARK,
-+	VIO0_D12_MARK, VIO0_D13_PORT22_MARK, VIO0_D14_PORT95_MARK,
-+	VIO0_D15_PORT96_MARK,
-+};
-+static const unsigned int ceu0_clk_0_pins[] = {
-+	/* CKO */
-+	36,
-+};
-+static const unsigned int ceu0_clk_0_mux[] = {
-+	VIO_CKO_MARK,
-+};
-+static const unsigned int ceu0_clk_1_pins[] = {
-+	/* CKO */
-+	14,
-+};
-+static const unsigned int ceu0_clk_1_mux[] = {
-+	VIO_CKO1_MARK,
-+};
-+static const unsigned int ceu0_clk_2_pins[] = {
-+	/* CKO */
-+	15,
-+};
-+static const unsigned int ceu0_clk_2_mux[] = {
-+	VIO_CKO2_MARK,
-+};
-+static const unsigned int ceu0_sync_pins[] = {
-+	/* CLK, VD, HD */
-+	35, 39, 37,
-+};
-+static const unsigned int ceu0_sync_mux[] = {
-+	VIO0_CLK_MARK, VIO0_VD_MARK, VIO0_HD_MARK,
-+};
-+static const unsigned int ceu0_field_pins[] = {
-+	/* FIELD */
-+	38,
-+};
-+static const unsigned int ceu0_field_mux[] = {
-+	VIO0_FIELD_MARK,
-+};
-+/* - CEU1 ------------------------------------------------------------------- */
-+static const unsigned int ceu1_data_pins[] = {
-+	/* D[0:7] */
-+	182, 181, 180, 179, 178, 26, 25, 24,
-+};
-+static const unsigned int ceu1_data_mux[] = {
-+	VIO1_D0_MARK, VIO1_D1_MARK, VIO1_D2_MARK, VIO1_D3_MARK,
-+	VIO1_D4_MARK, VIO1_D5_MARK, VIO1_D6_MARK, VIO1_D7_MARK,
-+};
-+static const unsigned int ceu1_clk_pins[] = {
-+	/* CKO */
-+	23,
-+};
-+static const unsigned int ceu1_clk_mux[] = {
-+	VIO_CKO_1_MARK,
-+};
-+static const unsigned int ceu1_sync_pins[] = {
-+	/* CLK, VD, HD */
-+	197, 198, 160,
-+};
-+static const unsigned int ceu1_sync_mux[] = {
-+	VIO1_CLK_MARK, VIO1_VD_MARK, VIO1_HD_MARK,
-+};
-+static const unsigned int ceu1_field_pins[] = {
-+	/* FIELD */
-+	21,
-+};
-+static const unsigned int ceu1_field_mux[] = {
-+	VIO1_FIELD_MARK,
-+};
- /* - GETHER ----------------------------------------------------------------- */
- static const unsigned int gether_rmii_pins[] = {
- 	/* RXD[0:1], RX_ER, CRS_DV, TXD[0:1], TX_EN, REF_CLK, MDC, MDIO */
-@@ -2579,6 +2671,18 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(bsc_rd_we32),
- 	SH_PFC_PIN_GROUP(bsc_bs),
- 	SH_PFC_PIN_GROUP(bsc_rdwr),
-+	SH_PFC_PIN_GROUP(ceu0_data_0_7),
-+	SH_PFC_PIN_GROUP(ceu0_data_8_15_0),
-+	SH_PFC_PIN_GROUP(ceu0_data_8_15_1),
-+	SH_PFC_PIN_GROUP(ceu0_clk_0),
-+	SH_PFC_PIN_GROUP(ceu0_clk_1),
-+	SH_PFC_PIN_GROUP(ceu0_clk_2),
-+	SH_PFC_PIN_GROUP(ceu0_sync),
-+	SH_PFC_PIN_GROUP(ceu0_field),
-+	SH_PFC_PIN_GROUP(ceu1_data),
-+	SH_PFC_PIN_GROUP(ceu1_clk),
-+	SH_PFC_PIN_GROUP(ceu1_sync),
-+	SH_PFC_PIN_GROUP(ceu1_field),
- 	SH_PFC_PIN_GROUP(gether_rmii),
- 	SH_PFC_PIN_GROUP(gether_mii),
- 	SH_PFC_PIN_GROUP(gether_gmii),
-@@ -2738,6 +2842,24 @@ static const char * const bsc_groups[] = {
- 	"bsc_rdwr",
- };
- 
-+static const char * const ceu0_groups[] = {
-+	"ceu0_data_0_7",
-+	"ceu0_data_8_15_0",
-+	"ceu0_data_8_15_1",
-+	"ceu0_clk_0",
-+	"ceu0_clk_1",
-+	"ceu0_clk_2",
-+	"ceu0_sync",
-+	"ceu0_field",
-+};
-+
-+static const char * const ceu1_groups[] = {
-+	"ceu1_data",
-+	"ceu1_clk",
-+	"ceu1_sync",
-+	"ceu1_field",
-+};
-+
- static const char * const gether_groups[] = {
- 	"gether_rmii",
- 	"gether_mii",
-@@ -2930,6 +3052,8 @@ static const char * const sdhi2_groups[] = {
- 
- static const struct sh_pfc_function pinmux_functions[] = {
- 	SH_PFC_FUNCTION(bsc),
-+	SH_PFC_FUNCTION(ceu0),
-+	SH_PFC_FUNCTION(ceu1),
- 	SH_PFC_FUNCTION(gether),
- 	SH_PFC_FUNCTION(intc),
- 	SH_PFC_FUNCTION(lcd0),
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0139-ARM-shmobile-Use-interrupt-macros-in-SoC-DT-files.patch b/patches.renesas/0139-ARM-shmobile-Use-interrupt-macros-in-SoC-DT-files.patch
deleted file mode 100644
index 38353832e134a..0000000000000
--- a/patches.renesas/0139-ARM-shmobile-Use-interrupt-macros-in-SoC-DT-files.patch
+++ /dev/null
@@ -1,1356 +0,0 @@
-From 33a088aff1b797b7b431f5153c4d94b57fbf9344 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 19 Nov 2013 03:18:25 +0100
-Subject: ARM: shmobile: Use interrupt macros in SoC DT files
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 5f75e73c376c247a2c7bbe6f3fa3901b2d8f1a9c)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a73a4.dtsi | 108 ++++++++++++++++++++++++----------
- arch/arm/boot/dts/r8a7740.dtsi | 106 +++++++++++++++++-----------------
- arch/arm/boot/dts/r8a7778.dtsi |  44 +++++++-------
- arch/arm/boot/dts/r8a7779.dtsi |  42 +++++++-------
- arch/arm/boot/dts/r8a7790.dtsi |  50 +++++++++-------
- arch/arm/boot/dts/r8a7791.dtsi |  49 ++++++++--------
- arch/arm/boot/dts/sh73a0.dtsi  | 128 +++++++++++++++++++++--------------------
- 7 files changed, 295 insertions(+), 232 deletions(-)
-
-diff --git a/arch/arm/boot/dts/r8a73a4.dtsi b/arch/arm/boot/dts/r8a73a4.dtsi
-index e079c994fd70..b4a6c3b43ee9 100644
---- a/arch/arm/boot/dts/r8a73a4.dtsi
-+++ b/arch/arm/boot/dts/r8a73a4.dtsi
-@@ -9,6 +9,9 @@
-  * kind, whether express or implied.
-  */
- 
-+#include <dt-bindings/interrupt-controller/arm-gic.h>
-+#include <dt-bindings/interrupt-controller/irq.h>
-+
- / {
- 	compatible = "renesas,r8a73a4";
- 	interrupt-parent = <&gic>;
-@@ -36,15 +39,15 @@
- 			<0 0xf1002000 0 0x1000>,
- 			<0 0xf1004000 0 0x2000>,
- 			<0 0xf1006000 0 0x2000>;
--		interrupts = <1 9 0xf04>;
-+		interrupts = <1 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
- 	};
- 
- 	timer {
- 		compatible = "arm,armv7-timer";
--		interrupts = <1 13 0xf08>,
--				<1 14 0xf08>,
--				<1 11 0xf08>,
--				<1 10 0xf08>;
-+		interrupts = <1 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
-+			     <1 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
-+			     <1 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
-+			     <1 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
- 	};
- 
- 	irqc0: interrupt-controller@e61c0000 {
-@@ -53,14 +56,38 @@
- 		interrupt-controller;
- 		reg = <0 0xe61c0000 0 0x200>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 0 4>, <0 1 4>, <0 2 4>,	<0 3 4>,
--				<0 4 4>, <0 5 4>, <0 6 4>, <0 7 4>,
--				<0 8 4>, <0 9 4>, <0 10 4>, <0 11 4>,
--				<0 12 4>, <0 13 4>, <0 14 4>, <0 15 4>,
--				<0 16 4>, <0 17 4>, <0 18 4>, <0 19 4>,
--				<0 20 4>, <0 21 4>, <0 22 4>, <0 23 4>,
--				<0 24 4>, <0 25 4>, <0 26 4>, <0 27 4>,
--				<0 28 4>, <0 29 4>, <0 30 4>, <0 31 4>;
-+		interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 1 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 2 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 3 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 4 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 5 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 6 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 7 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 8 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 9 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 10 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 11 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 12 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 13 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 14 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 15 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 16 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 17 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 18 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 19 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 20 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 21 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 22 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 23 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 24 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 25 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 26 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 27 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 28 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 29 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 30 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 31 IRQ_TYPE_LEVEL_HIGH>;
- 	};
- 
- 	irqc1: interrupt-controller@e61c0200 {
-@@ -69,13 +96,32 @@
- 		interrupt-controller;
- 		reg = <0 0xe61c0200 0 0x200>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 32 4>, <0 33 4>, <0 34 4>, <0 35 4>,
--				<0 36 4>, <0 37 4>, <0 38 4>, <0 39 4>,
--				<0 40 4>, <0 41 4>, <0 42 4>, <0 43 4>,
--				<0 44 4>, <0 45 4>, <0 46 4>, <0 47 4>,
--				<0 48 4>, <0 49 4>, <0 50 4>, <0 51 4>,
--				<0 52 4>, <0 53 4>, <0 54 4>, <0 55 4>,
--				<0 56 4>, <0 57 4>;
-+		interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 33 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 34 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 35 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 36 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 37 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 38 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 39 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 40 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 41 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 42 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 43 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 44 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 45 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 46 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 47 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 48 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 49 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 50 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 51 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 52 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 53 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 54 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 55 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 56 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 57 IRQ_TYPE_LEVEL_HIGH>;
- 	};
- 
- 	dmac: dma-multiplexer@0 {
-@@ -126,7 +172,7 @@
- 		reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>,
- 			 <0 0xe61f0200 0 0x38>, <0 0xe61f0300 0 0x38>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 69 4>;
-+		interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>;
- 	};
- 
- 	i2c0: i2c@e6500000 {
-@@ -175,7 +221,7 @@
- 		compatible = "renesas,rmobile-iic";
- 		reg = <0 0xe6540000 0 0x428>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 178 0x4>;
-+		interrupts = <0 178 IRQ_TYPE_LEVEL_HIGH>;
- 		status = "disabled";
- 	};
- 
-@@ -185,7 +231,7 @@
- 		compatible = "renesas,rmobile-iic";
- 		reg = <0 0xe60b0000 0 0x428>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 179 0x4>;
-+		interrupts = <0 179 IRQ_TYPE_LEVEL_HIGH>;
- 		status = "disabled";
- 	};
- 
-@@ -195,7 +241,7 @@
- 		compatible = "renesas,rmobile-iic";
- 		reg = <0 0xe6550000 0 0x428>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 184 0x4>;
-+		interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>;
- 		status = "disabled";
- 	};
- 
-@@ -205,7 +251,7 @@
- 		compatible = "renesas,rmobile-iic";
- 		reg = <0 0xe6560000 0 0x428>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 185 0x4>;
-+		interrupts = <0 185 IRQ_TYPE_LEVEL_HIGH>;
- 		status = "disabled";
- 	};
- 
-@@ -215,7 +261,7 @@
- 		compatible = "renesas,rmobile-iic";
- 		reg = <0 0xe6570000 0 0x428>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 173 0x4>;
-+		interrupts = <0 173 IRQ_TYPE_LEVEL_HIGH>;
- 		status = "disabled";
- 	};
- 
-@@ -223,7 +269,7 @@
- 		compatible = "renesas,sh-mmcif";
- 		reg = <0 0xee200000 0 0x80>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 169 0x4>;
-+		interrupts = <0 169 IRQ_TYPE_LEVEL_HIGH>;
- 		reg-io-width = <4>;
- 		status = "disabled";
- 	};
-@@ -232,7 +278,7 @@
- 		compatible = "renesas,sh-mmcif";
- 		reg = <0 0xee220000 0 0x80>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 170 0x4>;
-+		interrupts = <0 170 IRQ_TYPE_LEVEL_HIGH>;
- 		reg-io-width = <4>;
- 		status = "disabled";
- 	};
-@@ -248,7 +294,7 @@
- 		compatible = "renesas,sdhi-r8a73a4";
- 		reg = <0 0xee100000 0 0x100>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 165 4>;
-+		interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>;
- 		cap-sd-highspeed;
- 		status = "disabled";
- 	};
-@@ -257,7 +303,7 @@
- 		compatible = "renesas,sdhi-r8a73a4";
- 		reg = <0 0xee120000 0 0x100>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 166 4>;
-+		interrupts = <0 166 IRQ_TYPE_LEVEL_HIGH>;
- 		cap-sd-highspeed;
- 		status = "disabled";
- 	};
-@@ -266,7 +312,7 @@
- 		compatible = "renesas,sdhi-r8a73a4";
- 		reg = <0 0xee140000 0 0x100>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 167 4>;
-+		interrupts = <0 167 IRQ_TYPE_LEVEL_HIGH>;
- 		cap-sd-highspeed;
- 		status = "disabled";
- 	};
-diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi
-index 4cc945a799bb..b1c2ed961eed 100644
---- a/arch/arm/boot/dts/r8a7740.dtsi
-+++ b/arch/arm/boot/dts/r8a7740.dtsi
-@@ -10,6 +10,8 @@
- 
- /include/ "skeleton.dtsi"
- 
-+#include <dt-bindings/interrupt-controller/irq.h>
-+
- / {
- 	compatible = "renesas,r8a7740";
- 
-@@ -34,7 +36,7 @@
- 
- 	pmu {
- 		compatible = "arm,cortex-a9-pmu";
--		interrupts = <0 83 4>;
-+		interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>;
- 	};
- 
- 	/* irqpin0: IRQ0 - IRQ7 */
-@@ -48,14 +50,14 @@
- 			<0xe6900040 1>,
- 			<0xe6900060 1>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 149 0x4
--			      0 149 0x4
--			      0 149 0x4
--			      0 149 0x4
--			      0 149 0x4
--			      0 149 0x4
--			      0 149 0x4
--			      0 149 0x4>;
-+		interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH
-+			      0 149 IRQ_TYPE_LEVEL_HIGH
-+			      0 149 IRQ_TYPE_LEVEL_HIGH
-+			      0 149 IRQ_TYPE_LEVEL_HIGH
-+			      0 149 IRQ_TYPE_LEVEL_HIGH
-+			      0 149 IRQ_TYPE_LEVEL_HIGH
-+			      0 149 IRQ_TYPE_LEVEL_HIGH
-+			      0 149 IRQ_TYPE_LEVEL_HIGH>;
- 	};
- 
- 	/* irqpin1: IRQ8 - IRQ15 */
-@@ -69,14 +71,14 @@
- 			<0xe6900044 1>,
- 			<0xe6900064 1>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 149 0x4
--			      0 149 0x4
--			      0 149 0x4
--			      0 149 0x4
--			      0 149 0x4
--			      0 149 0x4
--			      0 149 0x4
--			      0 149 0x4>;
-+		interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH
-+			      0 149 IRQ_TYPE_LEVEL_HIGH
-+			      0 149 IRQ_TYPE_LEVEL_HIGH
-+			      0 149 IRQ_TYPE_LEVEL_HIGH
-+			      0 149 IRQ_TYPE_LEVEL_HIGH
-+			      0 149 IRQ_TYPE_LEVEL_HIGH
-+			      0 149 IRQ_TYPE_LEVEL_HIGH
-+			      0 149 IRQ_TYPE_LEVEL_HIGH>;
- 	};
- 
- 	/* irqpin2: IRQ16 - IRQ23 */
-@@ -90,14 +92,14 @@
- 			<0xe6900048 1>,
- 			<0xe6900068 1>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 149 0x4
--			      0 149 0x4
--			      0 149 0x4
--			      0 149 0x4
--			      0 149 0x4
--			      0 149 0x4
--			      0 149 0x4
--			      0 149 0x4>;
-+		interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH
-+			      0 149 IRQ_TYPE_LEVEL_HIGH
-+			      0 149 IRQ_TYPE_LEVEL_HIGH
-+			      0 149 IRQ_TYPE_LEVEL_HIGH
-+			      0 149 IRQ_TYPE_LEVEL_HIGH
-+			      0 149 IRQ_TYPE_LEVEL_HIGH
-+			      0 149 IRQ_TYPE_LEVEL_HIGH
-+			      0 149 IRQ_TYPE_LEVEL_HIGH>;
- 	};
- 
- 	/* irqpin3: IRQ24 - IRQ31 */
-@@ -111,14 +113,14 @@
- 			<0xe690004c 1>,
- 			<0xe690006c 1>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 149 0x4
--			      0 149 0x4
--			      0 149 0x4
--			      0 149 0x4
--			      0 149 0x4
--			      0 149 0x4
--			      0 149 0x4
--			      0 149 0x4>;
-+		interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH
-+			      0 149 IRQ_TYPE_LEVEL_HIGH
-+			      0 149 IRQ_TYPE_LEVEL_HIGH
-+			      0 149 IRQ_TYPE_LEVEL_HIGH
-+			      0 149 IRQ_TYPE_LEVEL_HIGH
-+			      0 149 IRQ_TYPE_LEVEL_HIGH
-+			      0 149 IRQ_TYPE_LEVEL_HIGH
-+			      0 149 IRQ_TYPE_LEVEL_HIGH>;
- 	};
- 
- 	i2c0: i2c@fff20000 {
-@@ -127,10 +129,10 @@
- 		compatible = "renesas,rmobile-iic";
- 		reg = <0xfff20000 0x425>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 201 0x4
--			      0 202 0x4
--			      0 203 0x4
--			      0 204 0x4>;
-+		interrupts = <0 201 IRQ_TYPE_LEVEL_HIGH
-+			      0 202 IRQ_TYPE_LEVEL_HIGH
-+			      0 203 IRQ_TYPE_LEVEL_HIGH
-+			      0 204 IRQ_TYPE_LEVEL_HIGH>;
- 		status = "disabled";
- 	};
- 
-@@ -140,10 +142,10 @@
- 		compatible = "renesas,rmobile-iic";
- 		reg = <0xe6c20000 0x425>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 70 0x4
--			      0 71 0x4
--			      0 72 0x4
--			      0 73 0x4>;
-+		interrupts = <0 70 IRQ_TYPE_LEVEL_HIGH
-+			      0 71 IRQ_TYPE_LEVEL_HIGH
-+			      0 72 IRQ_TYPE_LEVEL_HIGH
-+			      0 73 IRQ_TYPE_LEVEL_HIGH>;
- 		status = "disabled";
- 	};
- 
-@@ -166,8 +168,8 @@
- 		compatible = "renesas,sh-mmcif";
- 		reg = <0xe6bd0000 0x100>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 56 4
--				0 57 4>;
-+		interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH
-+			      0 57 IRQ_TYPE_LEVEL_HIGH>;
- 		status = "disabled";
- 	};
- 
-@@ -175,9 +177,9 @@
- 		compatible = "renesas,sdhi-r8a7740";
- 		reg = <0xe6850000 0x100>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 117 4
--				0 118 4
--				0 119 4>;
-+		interrupts = <0 117 IRQ_TYPE_LEVEL_HIGH
-+			      0 118 IRQ_TYPE_LEVEL_HIGH
-+			      0 119 IRQ_TYPE_LEVEL_HIGH>;
- 		cap-sd-highspeed;
- 		cap-sdio-irq;
- 		status = "disabled";
-@@ -187,9 +189,9 @@
- 		compatible = "renesas,sdhi-r8a7740";
- 		reg = <0xe6860000 0x100>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 121 4
--				0 122 4
--				0 123 4>;
-+		interrupts = <0 121 IRQ_TYPE_LEVEL_HIGH
-+			      0 122 IRQ_TYPE_LEVEL_HIGH
-+			      0 123 IRQ_TYPE_LEVEL_HIGH>;
- 		cap-sd-highspeed;
- 		cap-sdio-irq;
- 		status = "disabled";
-@@ -199,9 +201,9 @@
- 		compatible = "renesas,sdhi-r8a7740";
- 		reg = <0xe6870000 0x100>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 125 4
--				0 126 4
--				0 127 4>;
-+		interrupts = <0 125 IRQ_TYPE_LEVEL_HIGH
-+			      0 126 IRQ_TYPE_LEVEL_HIGH
-+			      0 127 IRQ_TYPE_LEVEL_HIGH>;
- 		cap-sd-highspeed;
- 		cap-sdio-irq;
- 		status = "disabled";
-diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi
-index 819b1942aa14..3314e0aeccf5 100644
---- a/arch/arm/boot/dts/r8a7778.dtsi
-+++ b/arch/arm/boot/dts/r8a7778.dtsi
-@@ -16,6 +16,8 @@
- 
- /include/ "skeleton.dtsi"
- 
-+#include <dt-bindings/interrupt-controller/irq.h>
-+
- / {
- 	compatible = "renesas,r8a7778";
- 
-@@ -51,10 +53,10 @@
- 			<0xfe780044 4>,
- 			<0xfe780064 4>;
- 		interrupt-parent = <&gic>;
--		interrupts =   <0 27 0x4
--				0 28 0x4
--				0 29 0x4
--				0 30 0x4>;
-+		interrupts =   <0 27 IRQ_TYPE_LEVEL_HIGH
-+				0 28 IRQ_TYPE_LEVEL_HIGH
-+				0 29 IRQ_TYPE_LEVEL_HIGH
-+				0 30 IRQ_TYPE_LEVEL_HIGH>;
- 		sense-bitfield-width = <2>;
- 	};
- 
-@@ -62,7 +64,7 @@
- 		compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
- 		reg = <0xffc40000 0x2c>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 103 0x4>;
-+		interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
- 		#gpio-cells = <2>;
- 		gpio-controller;
- 		gpio-ranges = <&pfc 0 0 32>;
-@@ -74,7 +76,7 @@
- 		compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
- 		reg = <0xffc41000 0x2c>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 103 0x4>;
-+		interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
- 		#gpio-cells = <2>;
- 		gpio-controller;
- 		gpio-ranges = <&pfc 0 32 32>;
-@@ -86,7 +88,7 @@
- 		compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
- 		reg = <0xffc42000 0x2c>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 103 0x4>;
-+		interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
- 		#gpio-cells = <2>;
- 		gpio-controller;
- 		gpio-ranges = <&pfc 0 64 32>;
-@@ -98,7 +100,7 @@
- 		compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
- 		reg = <0xffc43000 0x2c>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 103 0x4>;
-+		interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
- 		#gpio-cells = <2>;
- 		gpio-controller;
- 		gpio-ranges = <&pfc 0 96 32>;
-@@ -110,7 +112,7 @@
- 		compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
- 		reg = <0xffc44000 0x2c>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 103 0x4>;
-+		interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
- 		#gpio-cells = <2>;
- 		gpio-controller;
- 		gpio-ranges = <&pfc 0 128 27>;
-@@ -129,7 +131,7 @@
- 		compatible = "renesas,i2c-r8a7778";
- 		reg = <0xffc70000 0x1000>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 67 0x4>;
-+		interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>;
- 		status = "disabled";
- 	};
- 
-@@ -139,7 +141,7 @@
- 		compatible = "renesas,i2c-r8a7778";
- 		reg = <0xffc71000 0x1000>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 78 0x4>;
-+		interrupts = <0 78 IRQ_TYPE_LEVEL_HIGH>;
- 		status = "disabled";
- 	};
- 
-@@ -149,7 +151,7 @@
- 		compatible = "renesas,i2c-r8a7778";
- 		reg = <0xffc72000 0x1000>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 76 0x4>;
-+		interrupts = <0 76 IRQ_TYPE_LEVEL_HIGH>;
- 		status = "disabled";
- 	};
- 
-@@ -159,7 +161,7 @@
- 		compatible = "renesas,i2c-r8a7778";
- 		reg = <0xffc73000 0x1000>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 77 0x4>;
-+		interrupts = <0 77 IRQ_TYPE_LEVEL_HIGH>;
- 		status = "disabled";
- 	};
- 
-@@ -167,7 +169,7 @@
- 		compatible = "renesas,sh-mmcif";
- 		reg = <0xffe4e000 0x100>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 61 4>;
-+		interrupts = <0 61 IRQ_TYPE_LEVEL_HIGH>;
- 		status = "disabled";
- 	};
- 
-@@ -175,7 +177,7 @@
- 		compatible = "renesas,sdhi-r8a7778";
- 		reg = <0xffe4c000 0x100>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 87 4>;
-+		interrupts = <0 87 IRQ_TYPE_LEVEL_HIGH>;
- 		cap-sd-highspeed;
- 		cap-sdio-irq;
- 		status = "disabled";
-@@ -185,7 +187,7 @@
- 		compatible = "renesas,sdhi-r8a7778";
- 		reg = <0xffe4d000 0x100>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 88 4>;
-+		interrupts = <0 88 IRQ_TYPE_LEVEL_HIGH>;
- 		cap-sd-highspeed;
- 		cap-sdio-irq;
- 		status = "disabled";
-@@ -195,7 +197,7 @@
- 		compatible = "renesas,sdhi-r8a7778";
- 		reg = <0xffe4f000 0x100>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 86 4>;
-+		interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
- 		cap-sd-highspeed;
- 		cap-sdio-irq;
- 		status = "disabled";
-@@ -207,7 +209,7 @@
- 		compatible = "renesas,i2c-r8a7778";
- 		reg = <0xffc70000 0x1000>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 67 0x4>;
-+		interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>;
- 		status = "disabled";
- 	};
- 
-@@ -217,7 +219,7 @@
- 		compatible = "renesas,i2c-r8a7778";
- 		reg = <0xffc71000 0x1000>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 78 0x4>;
-+		interrupts = <0 78 IRQ_TYPE_LEVEL_HIGH>;
- 		status = "disabled";
- 	};
- 
-@@ -227,7 +229,7 @@
- 		compatible = "renesas,i2c-r8a7778";
- 		reg = <0xffc72000 0x1000>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 76 0x4>;
-+		interrupts = <0 76 IRQ_TYPE_LEVEL_HIGH>;
- 		status = "disabled";
- 	};
- 
-@@ -237,7 +239,7 @@
- 		compatible = "renesas,i2c-r8a7778";
- 		reg = <0xffc73000 0x1000>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 77 0x4>;
-+		interrupts = <0 77 IRQ_TYPE_LEVEL_HIGH>;
- 		status = "disabled";
- 	};
- 
-diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi
-index 05fd41c6012f..b2b418a8ab2d 100644
---- a/arch/arm/boot/dts/r8a7779.dtsi
-+++ b/arch/arm/boot/dts/r8a7779.dtsi
-@@ -11,6 +11,8 @@
- 
- /include/ "skeleton.dtsi"
- 
-+#include <dt-bindings/interrupt-controller/irq.h>
-+
- / {
- 	compatible = "renesas,r8a7779";
- 
-@@ -52,7 +54,7 @@
- 		compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
- 		reg = <0xffc40000 0x2c>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 141 0x4>;
-+		interrupts = <0 141 IRQ_TYPE_LEVEL_HIGH>;
- 		#gpio-cells = <2>;
- 		gpio-controller;
- 		gpio-ranges = <&pfc 0 0 32>;
-@@ -64,7 +66,7 @@
- 		compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
- 		reg = <0xffc41000 0x2c>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 142 0x4>;
-+		interrupts = <0 142 IRQ_TYPE_LEVEL_HIGH>;
- 		#gpio-cells = <2>;
- 		gpio-controller;
- 		gpio-ranges = <&pfc 0 32 32>;
-@@ -76,7 +78,7 @@
- 		compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
- 		reg = <0xffc42000 0x2c>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 143 0x4>;
-+		interrupts = <0 143 IRQ_TYPE_LEVEL_HIGH>;
- 		#gpio-cells = <2>;
- 		gpio-controller;
- 		gpio-ranges = <&pfc 0 64 32>;
-@@ -88,7 +90,7 @@
- 		compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
- 		reg = <0xffc43000 0x2c>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 144 0x4>;
-+		interrupts = <0 144 IRQ_TYPE_LEVEL_HIGH>;
- 		#gpio-cells = <2>;
- 		gpio-controller;
- 		gpio-ranges = <&pfc 0 96 32>;
-@@ -100,7 +102,7 @@
- 		compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
- 		reg = <0xffc44000 0x2c>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 145 0x4>;
-+		interrupts = <0 145 IRQ_TYPE_LEVEL_HIGH>;
- 		#gpio-cells = <2>;
- 		gpio-controller;
- 		gpio-ranges = <&pfc 0 128 32>;
-@@ -112,7 +114,7 @@
- 		compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
- 		reg = <0xffc45000 0x2c>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 146 0x4>;
-+		interrupts = <0 146 IRQ_TYPE_LEVEL_HIGH>;
- 		#gpio-cells = <2>;
- 		gpio-controller;
- 		gpio-ranges = <&pfc 0 160 32>;
-@@ -124,7 +126,7 @@
- 		compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
- 		reg = <0xffc46000 0x2c>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 147 0x4>;
-+		interrupts = <0 147 IRQ_TYPE_LEVEL_HIGH>;
- 		#gpio-cells = <2>;
- 		gpio-controller;
- 		gpio-ranges = <&pfc 0 192 9>;
-@@ -143,10 +145,10 @@
- 			<0xfe780044 4>,
- 			<0xfe780064 4>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 27 0x4
--				0 28 0x4
--				0 29 0x4
--				0 30 0x4>;
-+		interrupts = <0 27 IRQ_TYPE_LEVEL_HIGH
-+			      0 28 IRQ_TYPE_LEVEL_HIGH
-+			      0 29 IRQ_TYPE_LEVEL_HIGH
-+			      0 30 IRQ_TYPE_LEVEL_HIGH>;
- 		sense-bitfield-width = <2>;
- 	};
- 
-@@ -156,7 +158,7 @@
- 		compatible = "renesas,i2c-r8a7779";
- 		reg = <0xffc70000 0x1000>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 79 0x4>;
-+		interrupts = <0 79 IRQ_TYPE_LEVEL_HIGH>;
- 		status = "disabled";
- 	};
- 
-@@ -166,7 +168,7 @@
- 		compatible = "renesas,i2c-r8a7779";
- 		reg = <0xffc71000 0x1000>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 82 0x4>;
-+		interrupts = <0 82 IRQ_TYPE_LEVEL_HIGH>;
- 		status = "disabled";
- 	};
- 
-@@ -176,7 +178,7 @@
- 		compatible = "renesas,i2c-r8a7779";
- 		reg = <0xffc72000 0x1000>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 80 0x4>;
-+		interrupts = <0 80 IRQ_TYPE_LEVEL_HIGH>;
- 		status = "disabled";
- 	};
- 
-@@ -186,7 +188,7 @@
- 		compatible = "renesas,i2c-r8a7779";
- 		reg = <0xffc73000 0x1000>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 81 0x4>;
-+		interrupts = <0 81 IRQ_TYPE_LEVEL_HIGH>;
- 		status = "disabled";
- 	};
- 
-@@ -204,14 +206,14 @@
- 		compatible = "renesas,rcar-sata";
- 		reg = <0xfc600000 0x2000>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 100 0x4>;
-+		interrupts = <0 100 IRQ_TYPE_LEVEL_HIGH>;
- 	};
- 
- 	sdhi0: sd@ffe4c000 {
- 		compatible = "renesas,sdhi-r8a7779";
- 		reg = <0xffe4c000 0x100>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 104 4>;
-+		interrupts = <0 104 IRQ_TYPE_LEVEL_HIGH>;
- 		cap-sd-highspeed;
- 		cap-sdio-irq;
- 		status = "disabled";
-@@ -221,7 +223,7 @@
- 		compatible = "renesas,sdhi-r8a7779";
- 		reg = <0xffe4d000 0x100>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 105 4>;
-+		interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>;
- 		cap-sd-highspeed;
- 		cap-sdio-irq;
- 		status = "disabled";
-@@ -231,7 +233,7 @@
- 		compatible = "renesas,sdhi-r8a7779";
- 		reg = <0xffe4e000 0x100>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 107 4>;
-+		interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>;
- 		cap-sd-highspeed;
- 		cap-sdio-irq;
- 		status = "disabled";
-@@ -241,7 +243,7 @@
- 		compatible = "renesas,sdhi-r8a7779";
- 		reg = <0xffe4f000 0x100>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 106 4>;
-+		interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>;
- 		cap-sd-highspeed;
- 		cap-sdio-irq;
- 		status = "disabled";
-diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
-index 839f1e761235..9ce4d47d1ad3 100644
---- a/arch/arm/boot/dts/r8a7790.dtsi
-+++ b/arch/arm/boot/dts/r8a7790.dtsi
-@@ -8,6 +8,9 @@
-  * kind, whether express or implied.
-  */
- 
-+#include <dt-bindings/interrupt-controller/arm-gic.h>
-+#include <dt-bindings/interrupt-controller/irq.h>
-+
- / {
- 	compatible = "renesas,r8a7790";
- 	interrupt-parent = <&gic>;
-@@ -84,14 +87,14 @@
- 			<0 0xf1002000 0 0x1000>,
- 			<0 0xf1004000 0 0x2000>,
- 			<0 0xf1006000 0 0x2000>;
--		interrupts = <1 9 0xf04>;
-+		interrupts = <1 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
- 	};
- 
- 	gpio0: gpio@e6050000 {
- 		compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
- 		reg = <0 0xe6050000 0 0x50>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 4 0x4>;
-+		interrupts = <0 4 IRQ_TYPE_LEVEL_HIGH>;
- 		#gpio-cells = <2>;
- 		gpio-controller;
- 		gpio-ranges = <&pfc 0 0 32>;
-@@ -103,7 +106,7 @@
- 		compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
- 		reg = <0 0xe6051000 0 0x50>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 5 0x4>;
-+		interrupts = <0 5 IRQ_TYPE_LEVEL_HIGH>;
- 		#gpio-cells = <2>;
- 		gpio-controller;
- 		gpio-ranges = <&pfc 0 32 32>;
-@@ -115,7 +118,7 @@
- 		compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
- 		reg = <0 0xe6052000 0 0x50>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 6 0x4>;
-+		interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>;
- 		#gpio-cells = <2>;
- 		gpio-controller;
- 		gpio-ranges = <&pfc 0 64 32>;
-@@ -127,7 +130,7 @@
- 		compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
- 		reg = <0 0xe6053000 0 0x50>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 7 0x4>;
-+		interrupts = <0 7 IRQ_TYPE_LEVEL_HIGH>;
- 		#gpio-cells = <2>;
- 		gpio-controller;
- 		gpio-ranges = <&pfc 0 96 32>;
-@@ -139,7 +142,7 @@
- 		compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
- 		reg = <0 0xe6054000 0 0x50>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 8 0x4>;
-+		interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>;
- 		#gpio-cells = <2>;
- 		gpio-controller;
- 		gpio-ranges = <&pfc 0 128 32>;
-@@ -151,7 +154,7 @@
- 		compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
- 		reg = <0 0xe6055000 0 0x50>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 9 0x4>;
-+		interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>;
- 		#gpio-cells = <2>;
- 		gpio-controller;
- 		gpio-ranges = <&pfc 0 160 32>;
-@@ -161,10 +164,10 @@
- 
- 	timer {
- 		compatible = "arm,armv7-timer";
--		interrupts = <1 13 0xf08>,
--				<1 14 0xf08>,
--				<1 11 0xf08>,
--				<1 10 0xf08>;
-+		interrupts = <1 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
-+			     <1 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
-+			     <1 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
-+			     <1 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
- 	};
- 
- 	irqc0: interrupt-controller@e61c0000 {
-@@ -173,7 +176,10 @@
- 		interrupt-controller;
- 		reg = <0 0xe61c0000 0 0x200>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 0 4>, <0 1 4>, <0 2 4>,	<0 3 4>;
-+		interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 1 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 2 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 3 IRQ_TYPE_LEVEL_HIGH>;
- 	};
- 
- 	i2c0: i2c@e6508000 {
-@@ -182,7 +188,7 @@
- 		compatible = "renesas,i2c-r8a7790";
- 		reg = <0 0xe6508000 0 0x40>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 287 0x4>;
-+		interrupts = <0 287 IRQ_TYPE_LEVEL_HIGH>;
- 		status = "disabled";
- 	};
- 
-@@ -192,7 +198,7 @@
- 		compatible = "renesas,i2c-r8a7790";
- 		reg = <0 0xe6518000 0 0x40>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 288 0x4>;
-+		interrupts = <0 288 IRQ_TYPE_LEVEL_HIGH>;
- 		status = "disabled";
- 	};
- 
-@@ -202,7 +208,7 @@
- 		compatible = "renesas,i2c-r8a7790";
- 		reg = <0 0xe6530000 0 0x40>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 286 0x4>;
-+		interrupts = <0 286 IRQ_TYPE_LEVEL_HIGH>;
- 		status = "disabled";
- 	};
- 
-@@ -212,7 +218,7 @@
- 		compatible = "renesas,i2c-r8a7790";
- 		reg = <0 0xe6540000 0 0x40>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 290 0x4>;
-+		interrupts = <0 290 IRQ_TYPE_LEVEL_HIGH>;
- 		status = "disabled";
- 	};
- 
-@@ -220,7 +226,7 @@
- 		compatible = "renesas,sh-mmcif";
- 		reg = <0 0xee200000 0 0x80>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 169 0x4>;
-+		interrupts = <0 169 IRQ_TYPE_LEVEL_HIGH>;
- 		reg-io-width = <4>;
- 		status = "disabled";
- 	};
-@@ -229,7 +235,7 @@
- 		compatible = "renesas,sh-mmcif";
- 		reg = <0 0xee220000 0 0x80>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 170 0x4>;
-+		interrupts = <0 170 IRQ_TYPE_LEVEL_HIGH>;
- 		reg-io-width = <4>;
- 		status = "disabled";
- 	};
-@@ -243,7 +249,7 @@
- 		compatible = "renesas,sdhi-r8a7790";
- 		reg = <0 0xee100000 0 0x100>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 165 4>;
-+		interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>;
- 		cap-sd-highspeed;
- 		status = "disabled";
- 	};
-@@ -252,7 +258,7 @@
- 		compatible = "renesas,sdhi-r8a7790";
- 		reg = <0 0xee120000 0 0x100>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 166 4>;
-+		interrupts = <0 166 IRQ_TYPE_LEVEL_HIGH>;
- 		cap-sd-highspeed;
- 		status = "disabled";
- 	};
-@@ -261,7 +267,7 @@
- 		compatible = "renesas,sdhi-r8a7790";
- 		reg = <0 0xee140000 0 0x100>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 167 4>;
-+		interrupts = <0 167 IRQ_TYPE_LEVEL_HIGH>;
- 		cap-sd-highspeed;
- 		status = "disabled";
- 	};
-@@ -270,7 +276,7 @@
- 		compatible = "renesas,sdhi-r8a7790";
- 		reg = <0 0xee160000 0 0x100>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 168 4>;
-+		interrupts = <0 168 IRQ_TYPE_LEVEL_HIGH>;
- 		cap-sd-highspeed;
- 		status = "disabled";
- 	};
-diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
-index 344f1f759c1a..86d5d3a509f9 100644
---- a/arch/arm/boot/dts/r8a7791.dtsi
-+++ b/arch/arm/boot/dts/r8a7791.dtsi
-@@ -9,6 +9,9 @@
-  * kind, whether express or implied.
-  */
- 
-+#include <dt-bindings/interrupt-controller/arm-gic.h>
-+#include <dt-bindings/interrupt-controller/irq.h>
-+
- / {
- 	compatible = "renesas,r8a7791";
- 	interrupt-parent = <&gic>;
-@@ -43,14 +46,14 @@
- 			<0 0xf1002000 0 0x1000>,
- 			<0 0xf1004000 0 0x2000>,
- 			<0 0xf1006000 0 0x2000>;
--		interrupts = <1 9 0xf04>;
-+		interrupts = <1 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
- 	};
- 
- 	gpio0: gpio@ffc40000 {
- 		compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
- 		reg = <0 0xffc40000 0 0x50>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 4 0x4>;
-+		interrupts = <0 4 IRQ_TYPE_LEVEL_HIGH>;
- 		#gpio-cells = <2>;
- 		gpio-controller;
- 		gpio-ranges = <&pfc 0 0 32>;
-@@ -62,7 +65,7 @@
- 		compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
- 		reg = <0 0xffc41000 0 0x50>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 5 0x4>;
-+		interrupts = <0 5 IRQ_TYPE_LEVEL_HIGH>;
- 		#gpio-cells = <2>;
- 		gpio-controller;
- 		gpio-ranges = <&pfc 0 32 32>;
-@@ -74,7 +77,7 @@
- 		compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
- 		reg = <0 0xffc42000 0 0x50>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 6 0x4>;
-+		interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>;
- 		#gpio-cells = <2>;
- 		gpio-controller;
- 		gpio-ranges = <&pfc 0 64 32>;
-@@ -86,7 +89,7 @@
- 		compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
- 		reg = <0 0xffc43000 0 0x50>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 7 0x4>;
-+		interrupts = <0 7 IRQ_TYPE_LEVEL_HIGH>;
- 		#gpio-cells = <2>;
- 		gpio-controller;
- 		gpio-ranges = <&pfc 0 96 32>;
-@@ -98,7 +101,7 @@
- 		compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
- 		reg = <0 0xffc44000 0 0x50>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 8 0x4>;
-+		interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>;
- 		#gpio-cells = <2>;
- 		gpio-controller;
- 		gpio-ranges = <&pfc 0 128 32>;
-@@ -110,7 +113,7 @@
- 		compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
- 		reg = <0 0xffc45000 0 0x50>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 9 0x4>;
-+		interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>;
- 		#gpio-cells = <2>;
- 		gpio-controller;
- 		gpio-ranges = <&pfc 0 160 32>;
-@@ -122,7 +125,7 @@
- 		compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
- 		reg = <0 0xffc45400 0 0x50>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 10 0x4>;
-+		interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>;
- 		#gpio-cells = <2>;
- 		gpio-controller;
- 		gpio-ranges = <&pfc 0 192 32>;
-@@ -134,7 +137,7 @@
- 		compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
- 		reg = <0 0xffc45800 0 0x50>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 11 0x4>;
-+		interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>;
- 		#gpio-cells = <2>;
- 		gpio-controller;
- 		gpio-ranges = <&pfc 0 224 26>;
-@@ -144,10 +147,10 @@
- 
- 	timer {
- 		compatible = "arm,armv7-timer";
--		interrupts = <1 13 0xf08>,
--				<1 14 0xf08>,
--				<1 11 0xf08>,
--				<1 10 0xf08>;
-+		interrupts = <1 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
-+			     <1 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
-+			     <1 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
-+			     <1 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
- 	};
- 
- 	irqc0: interrupt-controller@e61c0000 {
-@@ -156,16 +159,16 @@
- 		interrupt-controller;
- 		reg = <0 0xe61c0000 0 0x200>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 0 4>,
--			      <0 1 4>,
--			      <0 2 4>,
--			      <0 3 4>,
--			      <0 12 4>,
--			      <0 13 4>,
--			      <0 14 4>,
--			      <0 15 4>,
--			      <0 16 4>,
--			      <0 17 4>;
-+		interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 1 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 2 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 3 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 12 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 13 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 14 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 15 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 16 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 17 IRQ_TYPE_LEVEL_HIGH>;
- 	};
- 
- 	pfc: pfc@e6060000 {
-diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi
-index 78f7201aeb24..aef8a61b5514 100644
---- a/arch/arm/boot/dts/sh73a0.dtsi
-+++ b/arch/arm/boot/dts/sh73a0.dtsi
-@@ -10,6 +10,8 @@
- 
- /include/ "skeleton.dtsi"
- 
-+#include <dt-bindings/interrupt-controller/irq.h>
-+
- / {
- 	compatible = "renesas,sh73a0";
- 
-@@ -40,8 +42,8 @@
- 
- 	pmu {
- 		compatible = "arm,cortex-a9-pmu";
--		interrupts = <0 55 4>,
--			     <0 56 4>;
-+		interrupts = <0 55 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 56 IRQ_TYPE_LEVEL_HIGH>;
- 	};
- 
- 	irqpin0: irqpin@e6900000 {
-@@ -54,14 +56,14 @@
- 			<0xe6900040 1>,
- 			<0xe6900060 1>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 1 0x4
--			      0 2 0x4
--			      0 3 0x4
--			      0 4 0x4
--			      0 5 0x4
--			      0 6 0x4
--			      0 7 0x4
--			      0 8 0x4>;
-+		interrupts = <0 1 IRQ_TYPE_LEVEL_HIGH
-+			      0 2 IRQ_TYPE_LEVEL_HIGH
-+			      0 3 IRQ_TYPE_LEVEL_HIGH
-+			      0 4 IRQ_TYPE_LEVEL_HIGH
-+			      0 5 IRQ_TYPE_LEVEL_HIGH
-+			      0 6 IRQ_TYPE_LEVEL_HIGH
-+			      0 7 IRQ_TYPE_LEVEL_HIGH
-+			      0 8 IRQ_TYPE_LEVEL_HIGH>;
- 	};
- 
- 	irqpin1: irqpin@e6900004 {
-@@ -74,14 +76,14 @@
- 			<0xe6900044 1>,
- 			<0xe6900064 1>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 9 0x4
--			      0 10 0x4
--			      0 11 0x4
--			      0 12 0x4
--			      0 13 0x4
--			      0 14 0x4
--			      0 15 0x4
--			      0 16 0x4>;
-+		interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH
-+			      0 10 IRQ_TYPE_LEVEL_HIGH
-+			      0 11 IRQ_TYPE_LEVEL_HIGH
-+			      0 12 IRQ_TYPE_LEVEL_HIGH
-+			      0 13 IRQ_TYPE_LEVEL_HIGH
-+			      0 14 IRQ_TYPE_LEVEL_HIGH
-+			      0 15 IRQ_TYPE_LEVEL_HIGH
-+			      0 16 IRQ_TYPE_LEVEL_HIGH>;
- 		control-parent;
- 	};
- 
-@@ -95,14 +97,14 @@
- 			<0xe6900048 1>,
- 			<0xe6900068 1>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 17 0x4
--			      0 18 0x4
--			      0 19 0x4
--			      0 20 0x4
--			      0 21 0x4
--			      0 22 0x4
--			      0 23 0x4
--			      0 24 0x4>;
-+		interrupts = <0 17 IRQ_TYPE_LEVEL_HIGH
-+			      0 18 IRQ_TYPE_LEVEL_HIGH
-+			      0 19 IRQ_TYPE_LEVEL_HIGH
-+			      0 20 IRQ_TYPE_LEVEL_HIGH
-+			      0 21 IRQ_TYPE_LEVEL_HIGH
-+			      0 22 IRQ_TYPE_LEVEL_HIGH
-+			      0 23 IRQ_TYPE_LEVEL_HIGH
-+			      0 24 IRQ_TYPE_LEVEL_HIGH>;
- 	};
- 
- 	irqpin3: irqpin@e690000c {
-@@ -115,14 +117,14 @@
- 			<0xe690004c 1>,
- 			<0xe690006c 1>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 25 0x4
--			      0 26 0x4
--			      0 27 0x4
--			      0 28 0x4
--			      0 29 0x4
--			      0 30 0x4
--			      0 31 0x4
--			      0 32 0x4>;
-+		interrupts = <0 25 IRQ_TYPE_LEVEL_HIGH
-+			      0 26 IRQ_TYPE_LEVEL_HIGH
-+			      0 27 IRQ_TYPE_LEVEL_HIGH
-+			      0 28 IRQ_TYPE_LEVEL_HIGH
-+			      0 29 IRQ_TYPE_LEVEL_HIGH
-+			      0 30 IRQ_TYPE_LEVEL_HIGH
-+			      0 31 IRQ_TYPE_LEVEL_HIGH
-+			      0 32 IRQ_TYPE_LEVEL_HIGH>;
- 	};
- 
- 	i2c0: i2c@e6820000 {
-@@ -131,10 +133,10 @@
- 		compatible = "renesas,rmobile-iic";
- 		reg = <0xe6820000 0x425>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 167 0x4
--			      0 168 0x4
--			      0 169 0x4
--			      0 170 0x4>;
-+		interrupts = <0 167 IRQ_TYPE_LEVEL_HIGH
-+			      0 168 IRQ_TYPE_LEVEL_HIGH
-+			      0 169 IRQ_TYPE_LEVEL_HIGH
-+			      0 170 IRQ_TYPE_LEVEL_HIGH>;
- 		status = "disabled";
- 	};
- 
-@@ -144,10 +146,10 @@
- 		compatible = "renesas,rmobile-iic";
- 		reg = <0xe6822000 0x425>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 51 0x4
--			      0 52 0x4
--			      0 53 0x4
--			      0 54 0x4>;
-+		interrupts = <0 51 IRQ_TYPE_LEVEL_HIGH
-+			      0 52 IRQ_TYPE_LEVEL_HIGH
-+			      0 53 IRQ_TYPE_LEVEL_HIGH
-+			      0 54 IRQ_TYPE_LEVEL_HIGH>;
- 		status = "disabled";
- 	};
- 
-@@ -157,10 +159,10 @@
- 		compatible = "renesas,rmobile-iic";
- 		reg = <0xe6824000 0x425>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 171 0x4
--			      0 172 0x4
--			      0 173 0x4
--			      0 174 0x4>;
-+		interrupts = <0 171 IRQ_TYPE_LEVEL_HIGH
-+			      0 172 IRQ_TYPE_LEVEL_HIGH
-+			      0 173 IRQ_TYPE_LEVEL_HIGH
-+			      0 174 IRQ_TYPE_LEVEL_HIGH>;
- 		status = "disabled";
- 	};
- 
-@@ -170,10 +172,10 @@
- 		compatible = "renesas,rmobile-iic";
- 		reg = <0xe6826000 0x425>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 183 0x4
--			      0 184 0x4
--			      0 185 0x4
--			      0 186 0x4>;
-+		interrupts = <0 183 IRQ_TYPE_LEVEL_HIGH
-+			      0 184 IRQ_TYPE_LEVEL_HIGH
-+			      0 185 IRQ_TYPE_LEVEL_HIGH
-+			      0 186 IRQ_TYPE_LEVEL_HIGH>;
- 		status = "disabled";
- 	};
- 
-@@ -183,10 +185,10 @@
- 		compatible = "renesas,rmobile-iic";
- 		reg = <0xe6828000 0x425>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 187 0x4
--			      0 188 0x4
--			      0 189 0x4
--			      0 190 0x4>;
-+		interrupts = <0 187 IRQ_TYPE_LEVEL_HIGH
-+			      0 188 IRQ_TYPE_LEVEL_HIGH
-+			      0 189 IRQ_TYPE_LEVEL_HIGH
-+			      0 190 IRQ_TYPE_LEVEL_HIGH>;
- 		status = "disabled";
- 	};
- 
-@@ -194,8 +196,8 @@
- 		compatible = "renesas,sh-mmcif";
- 		reg = <0xe6bd0000 0x100>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 140 0x4
--			      0 141 0x4>;
-+		interrupts = <0 140 IRQ_TYPE_LEVEL_HIGH
-+			      0 141 IRQ_TYPE_LEVEL_HIGH>;
- 		reg-io-width = <4>;
- 		status = "disabled";
- 	};
-@@ -204,9 +206,9 @@
- 		compatible = "renesas,sdhi-r8a7740";
- 		reg = <0xee100000 0x100>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 83 4
--				0 84 4
--				0 85 4>;
-+		interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH
-+			      0 84 IRQ_TYPE_LEVEL_HIGH
-+			      0 85 IRQ_TYPE_LEVEL_HIGH>;
- 		cap-sd-highspeed;
- 		status = "disabled";
- 	};
-@@ -216,8 +218,8 @@
- 		compatible = "renesas,sdhi-r8a7740";
- 		reg = <0xee120000 0x100>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 88 4
--				0 89 4>;
-+		interrupts = <0 88 IRQ_TYPE_LEVEL_HIGH
-+			      0 89 IRQ_TYPE_LEVEL_HIGH>;
- 		toshiba,mmc-wrprotect-disable;
- 		cap-sd-highspeed;
- 		status = "disabled";
-@@ -227,8 +229,8 @@
- 		compatible = "renesas,sdhi-r8a7740";
- 		reg = <0xee140000 0x100>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 104 4
--				0 105 4>;
-+		interrupts = <0 104 IRQ_TYPE_LEVEL_HIGH
-+			      0 105 IRQ_TYPE_LEVEL_HIGH>;
- 		toshiba,mmc-wrprotect-disable;
- 		cap-sd-highspeed;
- 		status = "disabled";
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0139-ARM-shmobile-r8a7791-SCIF-support.patch b/patches.renesas/0139-ARM-shmobile-r8a7791-SCIF-support.patch
deleted file mode 100644
index 936c40cbc0a80..0000000000000
--- a/patches.renesas/0139-ARM-shmobile-r8a7791-SCIF-support.patch
+++ /dev/null
@@ -1,212 +0,0 @@
-From 392c1954243ab01e46fe09e39b3dc39cc6574edd Mon Sep 17 00:00:00 2001
-From: Yoshikazu Fujikawa <yoshikazu.fujikawa.ue@renesas.com>
-Date: Wed, 4 Sep 2013 12:46:08 +0900
-Subject: ARM: shmobile: r8a7791 SCIF support
-
-Add SCIF serial port support to the r8a7791 SoC by
-adding platform devices for SCIFA0 -> SCIFA5 as well
-as SCIFB0 -> SCIFB2 and SCIF0 -> SCIF5 together with
-clock bindings. DT device description is excluded at
-this point since such bindings are still under
-development.
-
-Signed-off-by: Yoshikazu Fujikawa <yoshikazu.fujikawa.ue@renesas.com>
-Signed-off-by: Ryo Kataoka <ryo.kataoka.wt@renesas.com>
-[damm@opensource.se: Forward ported to upstream, dropped holes in enum]
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-(cherry picked from commit e6491d08ed1d5d1e415d5371f2ff2fed67df83b0)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r8a7791.c        | 36 +++++++++++-
- arch/arm/mach-shmobile/include/mach/r8a7791.h |  1 +
- arch/arm/mach-shmobile/setup-r8a7791.c        | 82 +++++++++++++++++++++++++++
- 3 files changed, 118 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a7791.c b/arch/arm/mach-shmobile/clock-r8a7791.c
-index 9929feb1b810..df3122ea4c69 100644
---- a/arch/arm/mach-shmobile/clock-r8a7791.c
-+++ b/arch/arm/mach-shmobile/clock-r8a7791.c
-@@ -48,6 +48,7 @@
- #define CPG_BASE 0xe6150000
- #define CPG_LEN 0x1000
- 
-+#define SMSTPCR0	0xE6150130
- #define SMSTPCR1	0xE6150134
- #define SMSTPCR2	0xe6150138
- #define SMSTPCR3	0xE615013C
-@@ -56,6 +57,7 @@
- #define SMSTPCR8	0xE6150990
- #define SMSTPCR9	0xE6150994
- #define SMSTPCR10	0xE6150998
-+#define SMSTPCR11	0xE615099C
- 
- #define MODEMR		0xE6160060
- #define SDCKCR		0xE6150074
-@@ -118,13 +120,28 @@ static struct clk *main_clks[] = {
- /* MSTP */
- enum {
- 	MSTP721, MSTP720,
--/*	MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202,*/
-+	MSTP719, MSTP718, MSTP715, MSTP714,
-+	MSTP216, MSTP207, MSTP206,
-+	MSTP204, MSTP203, MSTP202, MSTP1105, MSTP1106, MSTP1107,
- 	MSTP_NR
- };
- 
- static struct clk mstp_clks[MSTP_NR] = {
- 	[MSTP721] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 21, 0), /* SCIF0 */
- 	[MSTP720] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 20, 0), /* SCIF1 */
-+	[MSTP719] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 19, 0), /* SCIF2 */
-+	[MSTP718] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 18, 0), /* SCIF3 */
-+	[MSTP715] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 15, 0), /* SCIF4 */
-+	[MSTP714] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 14, 0), /* SCIF5 */
-+	[MSTP216] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 16, 0), /* SCIFB2 */
-+	[MSTP207] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 7, 0), /* SCIFB1 */
-+	[MSTP206] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 6, 0), /* SCIFB0 */
-+	[MSTP204] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 4, 0), /* SCIFA0 */
-+	[MSTP203] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 3, 0), /* SCIFA1 */
-+	[MSTP202] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 2, 0), /* SCIFA2 */
-+	[MSTP1105] = SH_CLK_MSTP32(&mp_clk, SMSTPCR11, 5, 0), /* SCIFA3 */
-+	[MSTP1106] = SH_CLK_MSTP32(&mp_clk, SMSTPCR11, 6, 0), /* SCIFA4 */
-+	[MSTP1107] = SH_CLK_MSTP32(&mp_clk, SMSTPCR11, 7, 0), /* SCIFA5 */
- };
- 
- static struct clk_lookup lookups[] = {
-@@ -141,6 +158,23 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_CON_ID("mp",		&mp_clk),
- 	CLKDEV_CON_ID("cp",		&cp_clk),
- 	CLKDEV_CON_ID("peripheral_clk", &hp_clk),
-+
-+	/* MSTP */
-+	CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]), /* SCIFA0 */
-+	CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP203]), /* SCIFA1 */
-+	CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP206]), /* SCIFB0 */
-+	CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP207]), /* SCIFB1 */
-+	CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP216]), /* SCIFB2 */
-+	CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP202]), /* SCIFA2 */
-+	CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP721]), /* SCIF0 */
-+	CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP720]), /* SCIF1 */
-+	CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP719]), /* SCIF2 */
-+	CLKDEV_DEV_ID("sh-sci.9", &mstp_clks[MSTP718]), /* SCIF3 */
-+	CLKDEV_DEV_ID("sh-sci.10", &mstp_clks[MSTP715]), /* SCIF4 */
-+	CLKDEV_DEV_ID("sh-sci.11", &mstp_clks[MSTP714]), /* SCIF5 */
-+	CLKDEV_DEV_ID("sh-sci.12", &mstp_clks[MSTP1105]), /* SCIFA3 */
-+	CLKDEV_DEV_ID("sh-sci.13", &mstp_clks[MSTP1106]), /* SCIFA4 */
-+	CLKDEV_DEV_ID("sh-sci.14", &mstp_clks[MSTP1107]), /* SCIFA5 */
- };
- 
- #define R8A7791_CLOCK_ROOT(e, m, p0, p1, p30, p31)		\
-diff --git a/arch/arm/mach-shmobile/include/mach/r8a7791.h b/arch/arm/mach-shmobile/include/mach/r8a7791.h
-index 43b7206998da..d234b8cd9e91 100644
---- a/arch/arm/mach-shmobile/include/mach/r8a7791.h
-+++ b/arch/arm/mach-shmobile/include/mach/r8a7791.h
-@@ -1,6 +1,7 @@
- #ifndef __ASM_R8A7791_H__
- #define __ASM_R8A7791_H__
- 
-+void r8a7791_add_dt_devices(void);
- void r8a7791_clock_init(void);
- 
- #endif /* __ASM_R8A7791_H__ */
-diff --git a/arch/arm/mach-shmobile/setup-r8a7791.c b/arch/arm/mach-shmobile/setup-r8a7791.c
-index 88dcce1a6391..0de6aec3bb63 100644
---- a/arch/arm/mach-shmobile/setup-r8a7791.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7791.c
-@@ -22,10 +22,92 @@
- #include <linux/irq.h>
- #include <linux/kernel.h>
- #include <linux/of_platform.h>
-+#include <linux/serial_sci.h>
- #include <mach/common.h>
-+#include <mach/irqs.h>
- #include <mach/r8a7791.h>
- #include <asm/mach/arch.h>
- 
-+#define SCIF_COMMON(scif_type, baseaddr, irq)			\
-+	.type		= scif_type,				\
-+	.mapbase	= baseaddr,				\
-+	.flags		= UPF_BOOT_AUTOCONF | UPF_IOREMAP,	\
-+	.irqs		= SCIx_IRQ_MUXED(irq)
-+
-+#define SCIFA_DATA(index, baseaddr, irq)		\
-+[index] = {						\
-+	SCIF_COMMON(PORT_SCIFA, baseaddr, irq),		\
-+	.scbrr_algo_id	= SCBRR_ALGO_4,			\
-+	.scscr = SCSCR_RE | SCSCR_TE,	\
-+}
-+
-+#define SCIFB_DATA(index, baseaddr, irq)	\
-+[index] = {					\
-+	SCIF_COMMON(PORT_SCIFB, baseaddr, irq),	\
-+	.scbrr_algo_id	= SCBRR_ALGO_4,		\
-+	.scscr = SCSCR_RE | SCSCR_TE,		\
-+}
-+
-+#define SCIF_DATA(index, baseaddr, irq)		\
-+[index] = {						\
-+	SCIF_COMMON(PORT_SCIF, baseaddr, irq),		\
-+	.scbrr_algo_id	= SCBRR_ALGO_2,			\
-+	.scscr = SCSCR_RE | SCSCR_TE,	\
-+}
-+
-+#define HSCIF_DATA(index, baseaddr, irq)		\
-+[index] = {						\
-+	SCIF_COMMON(PORT_HSCIF, baseaddr, irq),		\
-+	.scbrr_algo_id	= SCBRR_ALGO_6,			\
-+	.scscr = SCSCR_RE | SCSCR_TE,	\
-+}
-+
-+enum { SCIFA0, SCIFA1, SCIFB0, SCIFB1, SCIFB2, SCIFA2, SCIF0, SCIF1,
-+	SCIF2, SCIF3, SCIF4, SCIF5, SCIFA3, SCIFA4, SCIFA5 };
-+
-+static const struct plat_sci_port scif[] __initconst = {
-+	SCIFA_DATA(SCIFA0, 0xe6c40000, gic_spi(144)), /* SCIFA0 */
-+	SCIFA_DATA(SCIFA1, 0xe6c50000, gic_spi(145)), /* SCIFA1 */
-+	SCIFB_DATA(SCIFB0, 0xe6c20000, gic_spi(148)), /* SCIFB0 */
-+	SCIFB_DATA(SCIFB1, 0xe6c30000, gic_spi(149)), /* SCIFB1 */
-+	SCIFB_DATA(SCIFB2, 0xe6ce0000, gic_spi(150)), /* SCIFB2 */
-+	SCIFA_DATA(SCIFA2, 0xe6c60000, gic_spi(151)), /* SCIFA2 */
-+	SCIF_DATA(SCIF0, 0xe6e60000, gic_spi(152)), /* SCIF0 */
-+	SCIF_DATA(SCIF1, 0xe6e68000, gic_spi(153)), /* SCIF1 */
-+	SCIF_DATA(SCIF2, 0xe6e58000, gic_spi(22)), /* SCIF2 */
-+	SCIF_DATA(SCIF3, 0xe6ea8000, gic_spi(23)), /* SCIF3 */
-+	SCIF_DATA(SCIF4, 0xe6ee0000, gic_spi(24)), /* SCIF4 */
-+	SCIF_DATA(SCIF5, 0xe6ee8000, gic_spi(25)), /* SCIF5 */
-+	SCIFA_DATA(SCIFA3, 0xe6c70000, gic_spi(29)), /* SCIFA3 */
-+	SCIFA_DATA(SCIFA4, 0xe6c78000, gic_spi(30)), /* SCIFA4 */
-+	SCIFA_DATA(SCIFA5, 0xe6c80000, gic_spi(31)), /* SCIFA5 */
-+};
-+
-+static inline void r8a7791_register_scif(int idx)
-+{
-+	platform_device_register_data(&platform_bus, "sh-sci", idx, &scif[idx],
-+				      sizeof(struct plat_sci_port));
-+}
-+
-+void __init r8a7791_add_dt_devices(void)
-+{
-+	r8a7791_register_scif(SCIFA0);
-+	r8a7791_register_scif(SCIFA1);
-+	r8a7791_register_scif(SCIFB0);
-+	r8a7791_register_scif(SCIFB1);
-+	r8a7791_register_scif(SCIFB2);
-+	r8a7791_register_scif(SCIFA2);
-+	r8a7791_register_scif(SCIF0);
-+	r8a7791_register_scif(SCIF1);
-+	r8a7791_register_scif(SCIF2);
-+	r8a7791_register_scif(SCIF3);
-+	r8a7791_register_scif(SCIF4);
-+	r8a7791_register_scif(SCIF5);
-+	r8a7791_register_scif(SCIFA3);
-+	r8a7791_register_scif(SCIFA4);
-+	r8a7791_register_scif(SCIFA5);
-+}
-+
- #ifdef CONFIG_USE_OF
- static const char *r8a7791_boards_compat_dt[] __initdata = {
- 	"renesas,r8a7791",
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0139-sh-pfc-r8a7740-Add-FSI-pin-groups-and-functions.patch b/patches.renesas/0139-sh-pfc-r8a7740-Add-FSI-pin-groups-and-functions.patch
deleted file mode 100644
index d23d665bcd14a..0000000000000
--- a/patches.renesas/0139-sh-pfc-r8a7740-Add-FSI-pin-groups-and-functions.patch
+++ /dev/null
@@ -1,166 +0,0 @@
-From b574bc252f68382d14d5c45c62c34187bc4fc1da Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 18 Apr 2013 01:04:30 +0200
-Subject: sh-pfc: r8a7740: Add FSI pin groups and functions
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 909dd95f13d7c8e80565fd17ad6b0065c5c90242)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7740.c | 118 +++++++++++++++++++++++++++++++++++
- 1 file changed, 118 insertions(+)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-index 71d7c1ff..49da76ae 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-@@ -1887,6 +1887,92 @@ static const unsigned int ceu1_field_pins[] = {
- static const unsigned int ceu1_field_mux[] = {
- 	VIO1_FIELD_MARK,
- };
-+/* - FSIA ------------------------------------------------------------------- */
-+static const unsigned int fsia_mclk_in_pins[] = {
-+	/* CK */
-+	11,
-+};
-+static const unsigned int fsia_mclk_in_mux[] = {
-+	FSIACK_MARK,
-+};
-+static const unsigned int fsia_mclk_out_pins[] = {
-+	/* OMC */
-+	10,
-+};
-+static const unsigned int fsia_mclk_out_mux[] = {
-+	FSIAOMC_MARK,
-+};
-+static const unsigned int fsia_sclk_in_pins[] = {
-+	/* ILR, IBT */
-+	12, 13,
-+};
-+static const unsigned int fsia_sclk_in_mux[] = {
-+	FSIAILR_MARK, FSIAIBT_MARK,
-+};
-+static const unsigned int fsia_sclk_out_pins[] = {
-+	/* OLR, OBT */
-+	7, 8,
-+};
-+static const unsigned int fsia_sclk_out_mux[] = {
-+	FSIAOLR_MARK, FSIAOBT_MARK,
-+};
-+static const unsigned int fsia_data_in_0_pins[] = {
-+	/* ISLD */
-+	0,
-+};
-+static const unsigned int fsia_data_in_0_mux[] = {
-+	FSIAISLD_PORT0_MARK,
-+};
-+static const unsigned int fsia_data_in_1_pins[] = {
-+	/* ISLD */
-+	5,
-+};
-+static const unsigned int fsia_data_in_1_mux[] = {
-+	FSIAISLD_PORT5_MARK,
-+};
-+static const unsigned int fsia_data_out_0_pins[] = {
-+	/* OSLD */
-+	9,
-+};
-+static const unsigned int fsia_data_out_0_mux[] = {
-+	FSIAOSLD_MARK,
-+};
-+static const unsigned int fsia_data_out_1_pins[] = {
-+	/* OSLD */
-+	0,
-+};
-+static const unsigned int fsia_data_out_1_mux[] = {
-+	FSIAOSLD1_MARK,
-+};
-+static const unsigned int fsia_data_out_2_pins[] = {
-+	/* OSLD */
-+	1,
-+};
-+static const unsigned int fsia_data_out_2_mux[] = {
-+	FSIAOSLD2_MARK,
-+};
-+static const unsigned int fsia_spdif_0_pins[] = {
-+	/* SPDIF */
-+	9,
-+};
-+static const unsigned int fsia_spdif_0_mux[] = {
-+	FSIASPDIF_PORT9_MARK,
-+};
-+static const unsigned int fsia_spdif_1_pins[] = {
-+	/* SPDIF */
-+	18,
-+};
-+static const unsigned int fsia_spdif_1_mux[] = {
-+	FSIASPDIF_PORT18_MARK,
-+};
-+/* - FSIB ------------------------------------------------------------------- */
-+static const unsigned int fsib_mclk_in_pins[] = {
-+	/* CK */
-+	11,
-+};
-+static const unsigned int fsib_mclk_in_mux[] = {
-+	FSIBCK_MARK,
-+};
- /* - GETHER ----------------------------------------------------------------- */
- static const unsigned int gether_rmii_pins[] = {
- 	/* RXD[0:1], RX_ER, CRS_DV, TXD[0:1], TX_EN, REF_CLK, MDC, MDIO */
-@@ -2683,6 +2769,18 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(ceu1_clk),
- 	SH_PFC_PIN_GROUP(ceu1_sync),
- 	SH_PFC_PIN_GROUP(ceu1_field),
-+	SH_PFC_PIN_GROUP(fsia_mclk_in),
-+	SH_PFC_PIN_GROUP(fsia_mclk_out),
-+	SH_PFC_PIN_GROUP(fsia_sclk_in),
-+	SH_PFC_PIN_GROUP(fsia_sclk_out),
-+	SH_PFC_PIN_GROUP(fsia_data_in_0),
-+	SH_PFC_PIN_GROUP(fsia_data_in_1),
-+	SH_PFC_PIN_GROUP(fsia_data_out_0),
-+	SH_PFC_PIN_GROUP(fsia_data_out_1),
-+	SH_PFC_PIN_GROUP(fsia_data_out_2),
-+	SH_PFC_PIN_GROUP(fsia_spdif_0),
-+	SH_PFC_PIN_GROUP(fsia_spdif_1),
-+	SH_PFC_PIN_GROUP(fsib_mclk_in),
- 	SH_PFC_PIN_GROUP(gether_rmii),
- 	SH_PFC_PIN_GROUP(gether_mii),
- 	SH_PFC_PIN_GROUP(gether_gmii),
-@@ -2860,6 +2958,24 @@ static const char * const ceu1_groups[] = {
- 	"ceu1_field",
- };
- 
-+static const char * const fsia_groups[] = {
-+	"fsia_mclk_in",
-+	"fsia_mclk_out",
-+	"fsia_sclk_in",
-+	"fsia_sclk_out",
-+	"fsia_data_in_0",
-+	"fsia_data_in_1",
-+	"fsia_data_out_0",
-+	"fsia_data_out_1",
-+	"fsia_data_out_2",
-+	"fsia_spdif_0",
-+	"fsia_spdif_1",
-+};
-+
-+static const char * const fsib_groups[] = {
-+	"fsib_mclk_in",
-+};
-+
- static const char * const gether_groups[] = {
- 	"gether_rmii",
- 	"gether_mii",
-@@ -3054,6 +3170,8 @@ static const struct sh_pfc_function pinmux_functions[] = {
- 	SH_PFC_FUNCTION(bsc),
- 	SH_PFC_FUNCTION(ceu0),
- 	SH_PFC_FUNCTION(ceu1),
-+	SH_PFC_FUNCTION(fsia),
-+	SH_PFC_FUNCTION(fsib),
- 	SH_PFC_FUNCTION(gether),
- 	SH_PFC_FUNCTION(intc),
- 	SH_PFC_FUNCTION(lcd0),
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0140-ARM-shmobile-Use-interrupt-macros-in-board-DT-files.patch b/patches.renesas/0140-ARM-shmobile-Use-interrupt-macros-in-board-DT-files.patch
deleted file mode 100644
index e4f362c0749a1..0000000000000
--- a/patches.renesas/0140-ARM-shmobile-Use-interrupt-macros-in-board-DT-files.patch
+++ /dev/null
@@ -1,126 +0,0 @@
-From ecc1ee52c3d833d0a732bd64fd61bfcca3a81082 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Sat, 9 Nov 2013 13:23:55 +0100
-Subject: ARM: shmobile: Use interrupt macros in board DT files
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 77e2d7e27e9842a1141a624bfbb53ebce1c9e3e1)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a73a4-ape6evm.dts                   | 3 ++-
- arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts | 3 ++-
- arch/arm/boot/dts/r8a7778-bockw-reference.dts           | 3 ++-
- arch/arm/boot/dts/r8a7779-marzen-reference.dts          | 3 ++-
- arch/arm/boot/dts/sh73a0-kzm9g-reference.dts            | 3 ++-
- 5 files changed, 10 insertions(+), 5 deletions(-)
-
-diff --git a/arch/arm/boot/dts/r8a73a4-ape6evm.dts b/arch/arm/boot/dts/r8a73a4-ape6evm.dts
-index 7db8d79fb93c..e84d1a7db66e 100644
---- a/arch/arm/boot/dts/r8a73a4-ape6evm.dts
-+++ b/arch/arm/boot/dts/r8a73a4-ape6evm.dts
-@@ -10,6 +10,7 @@
- 
- /dts-v1/;
- #include "r8a73a4.dtsi"
-+#include <dt-bindings/interrupt-controller/irq.h>
- 
- / {
- 	model = "APE6EVM";
-@@ -40,7 +41,7 @@
- 			compatible = "smsc,lan9118", "smsc,lan9115";
- 			reg = <0x08000000 0x1000>;
- 			interrupt-parent = <&irqc1>;
--			interrupts = <8 0x4>;
-+			interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
- 			phy-mode = "mii";
- 			reg-io-width = <4>;
- 			smsc,irq-active-high;
-diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
-index c7c5bcb893ca..aef425faf731 100644
---- a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
-+++ b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
-@@ -11,6 +11,7 @@
- /dts-v1/;
- #include "r8a7740.dtsi"
- #include <dt-bindings/gpio/gpio.h>
-+#include <dt-bindings/interrupt-controller/irq.h>
- #include <dt-bindings/pwm/pwm.h>
- 
- / {
-@@ -94,7 +95,7 @@
- 		compatible = "sitronix,st1232";
- 		reg = <0x55>;
- 		interrupt-parent = <&irqpin1>;
--		interrupts = <2 0>; /* IRQ10: hwirq 2 on irqpin1 */
-+		interrupts = <2 IRQ_TYPE_NONE>; /* IRQ10: hwirq 2 on irqpin1 */
- 		pinctrl-0 = <&st1232_pins>;
- 		pinctrl-names = "default";
- 		gpios = <&pfc 166 GPIO_ACTIVE_LOW>;
-diff --git a/arch/arm/boot/dts/r8a7778-bockw-reference.dts b/arch/arm/boot/dts/r8a7778-bockw-reference.dts
-index be9b75377f3e..2000cf861243 100644
---- a/arch/arm/boot/dts/r8a7778-bockw-reference.dts
-+++ b/arch/arm/boot/dts/r8a7778-bockw-reference.dts
-@@ -16,6 +16,7 @@
- 
- /dts-v1/;
- #include "r8a7778.dtsi"
-+#include <dt-bindings/interrupt-controller/irq.h>
- 
- / {
- 	model = "bockw";
-@@ -45,7 +46,7 @@
- 
- 		phy-mode = "mii";
- 		interrupt-parent = <&irqpin>;
--		interrupts = <0 0>; /* IRQ0: hwirq 0 on irqpin */
-+		interrupts = <0 IRQ_TYPE_NONE>; /* IRQ0: hwirq 0 on irqpin */
- 		reg-io-width = <4>;
- 		vddvario-supply = <&fixedregulator3v3>;
- 		vdd33a-supply = <&fixedregulator3v3>;
-diff --git a/arch/arm/boot/dts/r8a7779-marzen-reference.dts b/arch/arm/boot/dts/r8a7779-marzen-reference.dts
-index 08b9ee37ad2f..0f5c6141a2dc 100644
---- a/arch/arm/boot/dts/r8a7779-marzen-reference.dts
-+++ b/arch/arm/boot/dts/r8a7779-marzen-reference.dts
-@@ -12,6 +12,7 @@
- /dts-v1/;
- #include "r8a7779.dtsi"
- #include <dt-bindings/gpio/gpio.h>
-+#include <dt-bindings/interrupt-controller/irq.h>
- 
- / {
- 	model = "marzen";
-@@ -43,7 +44,7 @@
- 
- 		phy-mode = "mii";
- 		interrupt-parent = <&irqpin0>;
--		interrupts = <1 0>; /* IRQ1: hwirq 1 on irqpin0 */
-+		interrupts = <1 IRQ_TYPE_NONE>; /* IRQ1: hwirq 1 on irqpin0 */
- 		reg-io-width = <4>;
- 		vddvario-supply = <&fixedregulator3v3>;
- 		vdd33a-supply = <&fixedregulator3v3>;
-diff --git a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
-index d5a6d74cdda0..605f6c627307 100644
---- a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
-+++ b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
-@@ -14,6 +14,7 @@
- /dts-v1/;
- #include "sh73a0.dtsi"
- #include <dt-bindings/gpio/gpio.h>
-+#include <dt-bindings/interrupt-controller/irq.h>
- 
- / {
- 	model = "KZM-A9-GT";
-@@ -82,7 +83,7 @@
- 		reg = <0x10000000 0x100>;
- 		phy-mode = "mii";
- 		interrupt-parent = <&irqpin0>;
--		interrupts = <3 0>;	/* active low */
-+		interrupts = <3 IRQ_TYPE_NONE>;	/* active low */
- 		reg-io-width = <4>;
- 		smsc,irq-push-pull;
- 		smsc,save-mac-address;
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0140-ARM-shmobile-r8a7791-CMT-support.patch b/patches.renesas/0140-ARM-shmobile-r8a7791-CMT-support.patch
deleted file mode 100644
index f7ea6bb571456..0000000000000
--- a/patches.renesas/0140-ARM-shmobile-r8a7791-CMT-support.patch
+++ /dev/null
@@ -1,150 +0,0 @@
-From 9cb1c91d8af525275672085b4a778c7aa0801c23 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Wed, 4 Sep 2013 12:46:17 +0900
-Subject: ARM: shmobile: r8a7791 CMT support
-
-Add r8a7791 CMT support via channel 0 of CMT0. At this
-point the CMT is used for clock event operation, but in
-the future the arch timer will be the main timer and the
-CMT will be used for deep sleep wake up only.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit a7663b88280d00359715817620798e99d54d401c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 1bebd72a71e4ea1e9f68a9e71faee724c5e8f903)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r8a7791.c        |  7 ++++++-
- arch/arm/mach-shmobile/include/mach/r8a7791.h |  1 +
- arch/arm/mach-shmobile/setup-r8a7791.c        | 29 +++++++++++++++++++++++++++
- 3 files changed, 36 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a7791.c b/arch/arm/mach-shmobile/clock-r8a7791.c
-index df3122ea4c69..c9a26f16ce5b 100644
---- a/arch/arm/mach-shmobile/clock-r8a7791.c
-+++ b/arch/arm/mach-shmobile/clock-r8a7791.c
-@@ -101,7 +101,7 @@ SH_FIXED_RATIO_CLK_SET(cp_clk,			extal_clk,	1, 2);
- SH_FIXED_RATIO_CLK_SET(pll1_div2_clk,		pll1_clk,	1, 2);
- SH_FIXED_RATIO_CLK_SET(hp_clk,			pll1_clk,	1, 12);
- SH_FIXED_RATIO_CLK_SET(p_clk,			pll1_clk,	1, 24);
--
-+SH_FIXED_RATIO_CLK_SET(rclk_clk,		pll1_clk,	1, (48 * 1024));
- SH_FIXED_RATIO_CLK_SET(mp_clk,			pll1_div2_clk,	1, 15);
- 
- static struct clk *main_clks[] = {
-@@ -113,6 +113,7 @@ static struct clk *main_clks[] = {
- 	&pll3_clk,
- 	&hp_clk,
- 	&p_clk,
-+	&rclk_clk,
- 	&mp_clk,
- 	&cp_clk,
- };
-@@ -123,6 +124,7 @@ enum {
- 	MSTP719, MSTP718, MSTP715, MSTP714,
- 	MSTP216, MSTP207, MSTP206,
- 	MSTP204, MSTP203, MSTP202, MSTP1105, MSTP1106, MSTP1107,
-+	MSTP124,
- 	MSTP_NR
- };
- 
-@@ -142,6 +144,7 @@ static struct clk mstp_clks[MSTP_NR] = {
- 	[MSTP1105] = SH_CLK_MSTP32(&mp_clk, SMSTPCR11, 5, 0), /* SCIFA3 */
- 	[MSTP1106] = SH_CLK_MSTP32(&mp_clk, SMSTPCR11, 6, 0), /* SCIFA4 */
- 	[MSTP1107] = SH_CLK_MSTP32(&mp_clk, SMSTPCR11, 7, 0), /* SCIFA5 */
-+	[MSTP124] = SH_CLK_MSTP32(&rclk_clk, SMSTPCR1, 24, 0), /* CMT0 */
- };
- 
- static struct clk_lookup lookups[] = {
-@@ -155,6 +158,7 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_CON_ID("pll3",		&pll3_clk),
- 	CLKDEV_CON_ID("hp",		&hp_clk),
- 	CLKDEV_CON_ID("p",		&p_clk),
-+	CLKDEV_CON_ID("rclk",		&rclk_clk),
- 	CLKDEV_CON_ID("mp",		&mp_clk),
- 	CLKDEV_CON_ID("cp",		&cp_clk),
- 	CLKDEV_CON_ID("peripheral_clk", &hp_clk),
-@@ -175,6 +179,7 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_DEV_ID("sh-sci.12", &mstp_clks[MSTP1105]), /* SCIFA3 */
- 	CLKDEV_DEV_ID("sh-sci.13", &mstp_clks[MSTP1106]), /* SCIFA4 */
- 	CLKDEV_DEV_ID("sh-sci.14", &mstp_clks[MSTP1107]), /* SCIFA5 */
-+	CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]),
- };
- 
- #define R8A7791_CLOCK_ROOT(e, m, p0, p1, p30, p31)		\
-diff --git a/arch/arm/mach-shmobile/include/mach/r8a7791.h b/arch/arm/mach-shmobile/include/mach/r8a7791.h
-index d234b8cd9e91..2e6d66131083 100644
---- a/arch/arm/mach-shmobile/include/mach/r8a7791.h
-+++ b/arch/arm/mach-shmobile/include/mach/r8a7791.h
-@@ -3,5 +3,6 @@
- 
- void r8a7791_add_dt_devices(void);
- void r8a7791_clock_init(void);
-+void r8a7791_init_early(void);
- 
- #endif /* __ASM_R8A7791_H__ */
-diff --git a/arch/arm/mach-shmobile/setup-r8a7791.c b/arch/arm/mach-shmobile/setup-r8a7791.c
-index 0de6aec3bb63..b56399d2e1de 100644
---- a/arch/arm/mach-shmobile/setup-r8a7791.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7791.c
-@@ -23,6 +23,7 @@
- #include <linux/kernel.h>
- #include <linux/of_platform.h>
- #include <linux/serial_sci.h>
-+#include <linux/sh_timer.h>
- #include <mach/common.h>
- #include <mach/irqs.h>
- #include <mach/r8a7791.h>
-@@ -89,6 +90,25 @@ static inline void r8a7791_register_scif(int idx)
- 				      sizeof(struct plat_sci_port));
- }
- 
-+static const struct sh_timer_config cmt00_platform_data __initconst = {
-+	.name = "CMT00",
-+	.timer_bit = 0,
-+	.clockevent_rating = 80,
-+};
-+
-+static const struct resource cmt00_resources[] __initconst = {
-+	DEFINE_RES_MEM(0xffca0510, 0x0c),
-+	DEFINE_RES_MEM(0xffca0500, 0x04),
-+	DEFINE_RES_IRQ(gic_spi(142)), /* CMT0_0 */
-+};
-+
-+#define r8a7791_register_cmt(idx)					\
-+	platform_device_register_resndata(&platform_bus, "sh_cmt",	\
-+					  idx, cmt##idx##_resources,	\
-+					  ARRAY_SIZE(cmt##idx##_resources), \
-+					  &cmt##idx##_platform_data,	\
-+					  sizeof(struct sh_timer_config))
-+
- void __init r8a7791_add_dt_devices(void)
- {
- 	r8a7791_register_scif(SCIFA0);
-@@ -106,6 +126,14 @@ void __init r8a7791_add_dt_devices(void)
- 	r8a7791_register_scif(SCIFA3);
- 	r8a7791_register_scif(SCIFA4);
- 	r8a7791_register_scif(SCIFA5);
-+	r8a7791_register_cmt(00);
-+}
-+
-+void __init r8a7791_init_early(void)
-+{
-+#ifndef CONFIG_ARM_ARCH_TIMER
-+	shmobile_setup_delay(1300, 2, 4); /* Cortex-A15 @ 1300MHz */
-+#endif
- }
- 
- #ifdef CONFIG_USE_OF
-@@ -115,6 +143,7 @@ static const char *r8a7791_boards_compat_dt[] __initdata = {
- };
- 
- DT_MACHINE_START(R8A7791_DT, "Generic R8A7791 (Flattened Device Tree)")
-+	.init_early	= r8a7791_init_early,
- 	.dt_compat	= r8a7791_boards_compat_dt,
- MACHINE_END
- #endif /* CONFIG_USE_OF */
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0140-sh-pfc-r8a7740-Add-HDMI-pin-groups-and-functions.patch b/patches.renesas/0140-sh-pfc-r8a7740-Add-HDMI-pin-groups-and-functions.patch
deleted file mode 100644
index da98b313a5b03..0000000000000
--- a/patches.renesas/0140-sh-pfc-r8a7740-Add-HDMI-pin-groups-and-functions.patch
+++ /dev/null
@@ -1,62 +0,0 @@
-From 3c2c20d274468b74879902a6337fd84c243ecc89 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 18 Apr 2013 01:04:30 +0200
-Subject: sh-pfc: r8a7740: Add HDMI pin groups and functions
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit a37d60659fbef3560c7b4fa5f9d7cf34863f3ae2)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7740.c | 14 ++++++++++++++
- 1 file changed, 14 insertions(+)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-index 49da76ae..5a77d393 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-@@ -2039,6 +2039,14 @@ static const unsigned int gether_wol_pins[] = {
- static const unsigned int gether_wol_mux[] = {
- 	ET_WOL_MARK,
- };
-+/* - HDMI ------------------------------------------------------------------- */
-+static const unsigned int hdmi_pins[] = {
-+	/* HPD, CEC */
-+	210, 211,
-+};
-+static const unsigned int hdmi_mux[] = {
-+	HDMI_HPD_MARK, HDMI_CEC_MARK,
-+};
- /* - INTC ------------------------------------------------------------------- */
- IRQC_PINS_MUX(0, 0, 2);
- IRQC_PINS_MUX(0, 1, 13);
-@@ -2787,6 +2795,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(gether_int),
- 	SH_PFC_PIN_GROUP(gether_link),
- 	SH_PFC_PIN_GROUP(gether_wol),
-+	SH_PFC_PIN_GROUP(hdmi),
- 	SH_PFC_PIN_GROUP(intc_irq0_0),
- 	SH_PFC_PIN_GROUP(intc_irq0_1),
- 	SH_PFC_PIN_GROUP(intc_irq1),
-@@ -2985,6 +2994,10 @@ static const char * const gether_groups[] = {
- 	"gether_wol",
- };
- 
-+static const char * const hdmi_groups[] = {
-+	"hdmi",
-+};
-+
- static const char * const intc_groups[] = {
- 	"intc_irq0_0",
- 	"intc_irq0_1",
-@@ -3173,6 +3186,7 @@ static const struct sh_pfc_function pinmux_functions[] = {
- 	SH_PFC_FUNCTION(fsia),
- 	SH_PFC_FUNCTION(fsib),
- 	SH_PFC_FUNCTION(gether),
-+	SH_PFC_FUNCTION(hdmi),
- 	SH_PFC_FUNCTION(intc),
- 	SH_PFC_FUNCTION(lcd0),
- 	SH_PFC_FUNCTION(lcd1),
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0141-ARM-shmobile-marzen-reference-Use-falling-edge-IRQ-f.patch b/patches.renesas/0141-ARM-shmobile-marzen-reference-Use-falling-edge-IRQ-f.patch
deleted file mode 100644
index 9dc2d2da79aa2..0000000000000
--- a/patches.renesas/0141-ARM-shmobile-marzen-reference-Use-falling-edge-IRQ-f.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From 554de99bf61cf5d58a4a6e365cdd2ba494e326d2 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Sat, 9 Nov 2013 13:23:56 +0100
-Subject: ARM: shmobile: marzen-reference: Use falling edge IRQ for LAN9221
-
-The device is configured to generate an active-low interrupt signal that
-is automatically deasserted without requiring any action from the host.
-Use falling edge trigger as that is the configuration currently used on
-the board.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit e60038eda492460c46833f4a54bebd256018a912)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7779-marzen-reference.dts | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/arch/arm/boot/dts/r8a7779-marzen-reference.dts b/arch/arm/boot/dts/r8a7779-marzen-reference.dts
-index 0f5c6141a2dc..13fa8beeb6e5 100644
---- a/arch/arm/boot/dts/r8a7779-marzen-reference.dts
-+++ b/arch/arm/boot/dts/r8a7779-marzen-reference.dts
-@@ -44,7 +44,7 @@
- 
- 		phy-mode = "mii";
- 		interrupt-parent = <&irqpin0>;
--		interrupts = <1 IRQ_TYPE_NONE>; /* IRQ1: hwirq 1 on irqpin0 */
-+		interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
- 		reg-io-width = <4>;
- 		vddvario-supply = <&fixedregulator3v3>;
- 		vdd33a-supply = <&fixedregulator3v3>;
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0141-ARM-shmobile-r8a7778-add-USBHS-clock.patch b/patches.renesas/0141-ARM-shmobile-r8a7778-add-USBHS-clock.patch
deleted file mode 100644
index e7826a92e37f3..0000000000000
--- a/patches.renesas/0141-ARM-shmobile-r8a7778-add-USBHS-clock.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From 0844cce78c29efa809746a4eb300ad057f9819cd Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Sun, 4 Aug 2013 17:43:19 -0700
-Subject: ARM: shmobile: r8a7778: add USBHS clock
-
-This patch adds USBHS clock for renesas_usbhs driver
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 84ea52885ebb298231b9577dd8b53fdfa692c0b7)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r8a7778.c | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a7778.c b/arch/arm/mach-shmobile/clock-r8a7778.c
-index 244a8dec4d04..fb6af83858e3 100644
---- a/arch/arm/mach-shmobile/clock-r8a7778.c
-+++ b/arch/arm/mach-shmobile/clock-r8a7778.c
-@@ -181,6 +181,7 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_DEV_ID("r8a7778-vin.1", &mstp_clks[MSTP109]), /* VIN1 */
- 	CLKDEV_DEV_ID("ehci-platform", &mstp_clks[MSTP100]), /* USB EHCI port0/1 */
- 	CLKDEV_DEV_ID("ohci-platform", &mstp_clks[MSTP100]), /* USB OHCI port0/1 */
-+	CLKDEV_DEV_ID("renesas_usbhs", &mstp_clks[MSTP100]), /* USB FUNC */
- 	CLKDEV_DEV_ID("i2c-rcar.0", &mstp_clks[MSTP030]), /* I2C0 */
- 	CLKDEV_DEV_ID("i2c-rcar.1", &mstp_clks[MSTP029]), /* I2C1 */
- 	CLKDEV_DEV_ID("i2c-rcar.2", &mstp_clks[MSTP028]), /* I2C2 */
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0141-sh-pfc-r8a7740-Hardcode-the-LCDC0-output.patch b/patches.renesas/0141-sh-pfc-r8a7740-Hardcode-the-LCDC0-output.patch
deleted file mode 100644
index 7a400078b299f..0000000000000
--- a/patches.renesas/0141-sh-pfc-r8a7740-Hardcode-the-LCDC0-output.patch
+++ /dev/null
@@ -1,79 +0,0 @@
-From 9aeb0e74e055e295f22d855807433dc522ff90af Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 19 Apr 2013 11:52:59 +0200
-Subject: sh-pfc: r8a7740: Hardcode the LCDC0 output
-
-The r8a7740 has two LCDC units and two sets of LCDC output signals. By
-default LCDC0 is routed to the LCD0 signals, and LCDC1 to the LCD1
-signals. However, LCDC1 can be routed to the LCD0 signals by setting bit
-MSEL6 in MSEL3CR (the LCD0 signals are further pinmuxed the usual way).
-
-This could be configured by duplicating the LCD0 pin groups for LCDC1.
-However, this would unnecessarily complicate the LCD pin groups, as no
-r8a7740 board supported in mainline use such a configuration. Hardcode
-the MSEL3CR MSEL6 bit to 0 for now.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit b79839024f41bca04098eff0f85e66cf20c15a2a)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7740.c | 14 +-------------
- 1 file changed, 1 insertion(+), 13 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-index 5a77d393..9afc7b0e 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-@@ -277,8 +277,6 @@ enum {
- 	SCIFB_CTS_PORT173_MARK,
- 
- 	/* LCD0 */
--	LCDC0_SELECT_MARK,
--
- 	LCD0_D0_MARK,	LCD0_D1_MARK,	LCD0_D2_MARK,	LCD0_D3_MARK,
- 	LCD0_D4_MARK,	LCD0_D5_MARK,	LCD0_D6_MARK,	LCD0_D7_MARK,
- 	LCD0_D8_MARK,	LCD0_D9_MARK,	LCD0_D10_MARK,	LCD0_D11_MARK,
-@@ -301,8 +299,6 @@ enum {
- 	LCD0_LCLK_PORT102_MARK,
- 
- 	/* LCD1 */
--	LCDC1_SELECT_MARK,
--
- 	LCD1_D0_MARK,	LCD1_D1_MARK,	LCD1_D2_MARK,	LCD1_D3_MARK,
- 	LCD1_D4_MARK,	LCD1_D5_MARK,	LCD1_D6_MARK,	LCD1_D7_MARK,
- 	LCD1_D8_MARK,	LCD1_D9_MARK,	LCD1_D10_MARK,	LCD1_D11_MARK,
-@@ -1002,7 +998,7 @@ static const pinmux_enum_t pinmux_data[] = {
- 	PINMUX_DATA(IRQ27_PORT57_MARK,		PORT57_FN0,	MSEL1CR_27_1),
- 
- 	/* Port58 */
--	PINMUX_DATA(LCD0_D0_MARK,		PORT58_FN1),
-+	PINMUX_DATA(LCD0_D0_MARK,		PORT58_FN1,	MSEL3CR_6_0),
- 	PINMUX_DATA(KEYOUT7_MARK,		PORT58_FN3),
- 	PINMUX_DATA(KEYIN0_PORT58_MARK,		PORT58_FN4,	MSEL4CR_18_1),
- 	PINMUX_DATA(DV_D0_MARK,			PORT58_FN6),
-@@ -1649,10 +1645,6 @@ static const pinmux_enum_t pinmux_data[] = {
- 	PINMUX_DATA(IRQ16_PORT211_MARK,		PORT211_FN0,	MSEL1CR_16_1),
- 	PINMUX_DATA(HDMI_CEC_MARK,		PORT211_FN1),
- 
--	/* LCDC select */
--	PINMUX_DATA(LCDC0_SELECT_MARK,				MSEL3CR_6_0),
--	PINMUX_DATA(LCDC1_SELECT_MARK,				MSEL3CR_6_1),
--
- 	/* SDENC */
- 	PINMUX_DATA(SDENC_CPG_MARK,				MSEL4CR_19_0),
- 	PINMUX_DATA(SDENC_DV_CLKI_MARK,				MSEL4CR_19_1),
-@@ -3578,10 +3570,6 @@ static const struct pinmux_func pinmux_func_gpios[] = {
- 	/* IRREM */
- 	GPIO_FN(IROUT),
- 
--	/* LCDC */
--	GPIO_FN(LCDC0_SELECT),
--	GPIO_FN(LCDC1_SELECT),
--
- 	/* SDENC */
- 	GPIO_FN(SDENC_CPG),
- 	GPIO_FN(SDENC_DV_CLKI),
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0142-ARM-shmobile-armadillo800eva-Register-pinctrl-mappin.patch b/patches.renesas/0142-ARM-shmobile-armadillo800eva-Register-pinctrl-mappin.patch
deleted file mode 100644
index 585a241f44fc3..0000000000000
--- a/patches.renesas/0142-ARM-shmobile-armadillo800eva-Register-pinctrl-mappin.patch
+++ /dev/null
@@ -1,62 +0,0 @@
-From 568d95dda5bb39d4d6aea40f4e1d9b963c6c673a Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 18 Apr 2013 01:18:41 +0200
-Subject: ARM: shmobile: armadillo800eva: Register pinctrl mapping for INTC
-
-Replace the GPIO-based INTC pinmux configuration by a pinctrl mapping.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 89ae7b5bbd3e65bc6ab7a577ca5ec18569589c8c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-armadillo800eva.c | 18 +++++++++++-------
- 1 file changed, 11 insertions(+), 7 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c
-index b85b2882..8d8b3624 100644
---- a/arch/arm/mach-shmobile/board-armadillo800eva.c
-+++ b/arch/arm/mach-shmobile/board-armadillo800eva.c
-@@ -1065,6 +1065,12 @@ static const struct pinctrl_map eva_pinctrl_map[] = {
- 				  "sdhi0_ctrl", "sdhi0"),
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7740",
- 				  "sdhi0_wp", "sdhi0"),
-+	/* ST1232 */
-+	PIN_MAP_MUX_GROUP_DEFAULT("0-0055", "pfc-r8a7740",
-+				  "intc_irq10", "intc"),
-+	/* USBHS */
-+	PIN_MAP_MUX_GROUP_DEFAULT("renesas_usbhs", "pfc-r8a7740",
-+				  "intc_irq7_1", "intc"),
- };
- 
- static void __init eva_clock_init(void)
-@@ -1130,7 +1136,7 @@ static void __init eva_init(void)
- 	gpio_request_one(202, GPIOF_OUT_INIT_LOW, NULL); /* LCD0_LED_CONT */
- 
- 	/* Touchscreen */
--	gpio_request(GPIO_FN_IRQ10,	NULL); /* TP_INT */
-+	gpio_request_one(166, GPIOF_OUT_INIT_HIGH, NULL); /* TP_RST_B */
- 
- 	/* GETHER */
- 	gpio_request(GPIO_FN_ET_CRS,		NULL);
-@@ -1163,13 +1169,11 @@ static void __init eva_init(void)
- 	} else {
- 		/* USB Func */
- 		/*
--		 * A1 chip has 2 IRQ7 pin and it was controled by MSEL register.
--		 * OTOH, usbhs interrupt needs its value (HI/LOW) to decide
--		 * USB connection/disconnection (usbhsf_get_vbus()).
--		 * This means we needs to select GPIO_FN_IRQ7_PORT209 first,
--		 * and select GPIO 209 here
-+		 * The USBHS interrupt handlers needs to read the IRQ pin value
-+		 * (HI/LOW) to diffentiate USB connection and disconnection
-+		 * events (usbhsf_get_vbus()). We thus need to select both the
-+		 * intc_irq7_1 pin group and GPIO 209 here.
- 		 */
--		gpio_request(GPIO_FN_IRQ7_PORT209, NULL);
- 		gpio_request_one(209, GPIOF_IN, NULL);
- 
- 		platform_device_register(&usbhsf_device);
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0142-ARM-shmobile-bockw-reference-Use-falling-edge-IRQ-fo.patch b/patches.renesas/0142-ARM-shmobile-bockw-reference-Use-falling-edge-IRQ-fo.patch
deleted file mode 100644
index f3ebbaaead8ae..0000000000000
--- a/patches.renesas/0142-ARM-shmobile-bockw-reference-Use-falling-edge-IRQ-fo.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From fb02114012b0b62711fb3d03ac737e9e0d78d6d6 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Sat, 9 Nov 2013 13:23:57 +0100
-Subject: ARM: shmobile: bockw-reference: Use falling edge IRQ for LAN9221
-
-The device is configured to generate an active-low interrupt signal that
-is automatically deasserted without requiring any action from the host.
-Configure the IRQ to trigger on falling edge.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 08281424f1ca5680e4a17656f3d9b978103779eb)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7778-bockw-reference.dts | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/arch/arm/boot/dts/r8a7778-bockw-reference.dts b/arch/arm/boot/dts/r8a7778-bockw-reference.dts
-index 2000cf861243..bb62c7a906f4 100644
---- a/arch/arm/boot/dts/r8a7778-bockw-reference.dts
-+++ b/arch/arm/boot/dts/r8a7778-bockw-reference.dts
-@@ -46,7 +46,7 @@
- 
- 		phy-mode = "mii";
- 		interrupt-parent = <&irqpin>;
--		interrupts = <0 IRQ_TYPE_NONE>; /* IRQ0: hwirq 0 on irqpin */
-+		interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
- 		reg-io-width = <4>;
- 		vddvario-supply = <&fixedregulator3v3>;
- 		vdd33a-supply = <&fixedregulator3v3>;
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0142-ARM-shmobile-r8a7778-add-usb-phy-power-control-funct.patch b/patches.renesas/0142-ARM-shmobile-r8a7778-add-usb-phy-power-control-funct.patch
deleted file mode 100644
index 9520b80a8f174..0000000000000
--- a/patches.renesas/0142-ARM-shmobile-r8a7778-add-usb-phy-power-control-funct.patch
+++ /dev/null
@@ -1,101 +0,0 @@
-From b89105896d6547a9b025d673a7167dfb2d472682 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Sun, 4 Aug 2013 17:43:01 -0700
-Subject: ARM: shmobile: r8a7778: add usb phy power control function
-
-USB phy initialisation function is needed from not only
-USB Host but also USB Function too.
-This patch adds usb phy common control function.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit f39d35fcc2cd7a24ec3128adffd7876953999e1f)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/include/mach/r8a7778.h |  2 ++
- arch/arm/mach-shmobile/setup-r8a7778.c        | 37 +++++++++++++++++++--------
- 2 files changed, 28 insertions(+), 11 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/include/mach/r8a7778.h b/arch/arm/mach-shmobile/include/mach/r8a7778.h
-index 48933def0d55..fdbd37df1543 100644
---- a/arch/arm/mach-shmobile/include/mach/r8a7778.h
-+++ b/arch/arm/mach-shmobile/include/mach/r8a7778.h
-@@ -32,4 +32,6 @@ extern void r8a7778_clock_init(void);
- extern void r8a7778_init_irq_extpin(int irlm);
- extern void r8a7778_pinmux_init(void);
- 
-+extern int r8a7778_usb_phy_power(bool enable);
-+
- #endif /* __ASM_R8A7778_H__ */
-diff --git a/arch/arm/mach-shmobile/setup-r8a7778.c b/arch/arm/mach-shmobile/setup-r8a7778.c
-index 468ee6551184..bfeedd169891 100644
---- a/arch/arm/mach-shmobile/setup-r8a7778.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7778.c
-@@ -95,29 +95,46 @@ static struct sh_timer_config sh_tmu1_platform_data __initdata = {
- 		&sh_tmu##idx##_platform_data,		\
- 		sizeof(sh_tmu##idx##_platform_data))
- 
--/* USB */
--static struct usb_phy *phy;
-+int r8a7778_usb_phy_power(bool enable)
-+{
-+	static struct usb_phy *phy = NULL;
-+	int ret = 0;
-+
-+	if (!phy)
-+		phy = usb_get_phy(USB_PHY_TYPE_USB2);
-+
-+	if (IS_ERR(phy)) {
-+		pr_err("kernel doesn't have usb phy driver\n");
-+		return PTR_ERR(phy);
-+	}
-+
-+	if (enable)
-+		ret = usb_phy_init(phy);
-+	else
-+		usb_phy_shutdown(phy);
- 
-+	return ret;
-+}
-+
-+/* USB */
- static int usb_power_on(struct platform_device *pdev)
- {
--	if (IS_ERR(phy))
--		return PTR_ERR(phy);
-+	int ret = r8a7778_usb_phy_power(true);
-+
-+	if (ret)
-+		return ret;
- 
- 	pm_runtime_enable(&pdev->dev);
- 	pm_runtime_get_sync(&pdev->dev);
- 
--	usb_phy_init(phy);
--
- 	return 0;
- }
- 
- static void usb_power_off(struct platform_device *pdev)
- {
--	if (IS_ERR(phy))
-+	if (r8a7778_usb_phy_power(false))
- 		return;
- 
--	usb_phy_shutdown(phy);
--
- 	pm_runtime_put_sync(&pdev->dev);
- 	pm_runtime_disable(&pdev->dev);
- }
-@@ -305,8 +322,6 @@ void __init r8a7778_add_standard_devices(void)
- 
- void __init r8a7778_init_late(void)
- {
--	phy = usb_get_phy(USB_PHY_TYPE_USB2);
--
- 	platform_device_register_full(&ehci_info);
- 	platform_device_register_full(&ohci_info);
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0143-ARM-shmobile-armadillo800eva-Register-pinctrl-mappin.patch b/patches.renesas/0143-ARM-shmobile-armadillo800eva-Register-pinctrl-mappin.patch
deleted file mode 100644
index ad6179156ba8b..0000000000000
--- a/patches.renesas/0143-ARM-shmobile-armadillo800eva-Register-pinctrl-mappin.patch
+++ /dev/null
@@ -1,61 +0,0 @@
-From 21e7273cc83bb9d8f5e1eac41681b0f226af0834 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 18 Apr 2013 01:18:41 +0200
-Subject: ARM: shmobile: armadillo800eva: Register pinctrl mapping for GETHER
-
-Replace the GPIO-based GETHER pinmux configuration by a pinctrl mapping.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 613285ce72c2194d43dee43a2b3c9bac6acff792)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-armadillo800eva.c | 25 +++++--------------------
- 1 file changed, 5 insertions(+), 20 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c
-index 8d8b3624..328f6502 100644
---- a/arch/arm/mach-shmobile/board-armadillo800eva.c
-+++ b/arch/arm/mach-shmobile/board-armadillo800eva.c
-@@ -1046,6 +1046,11 @@ static struct platform_device *eva_devices[] __initdata = {
- };
- 
- static const struct pinctrl_map eva_pinctrl_map[] = {
-+	/* GETHER */
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7740",
-+				  "gether_mii", "gether"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7740",
-+				  "gether_int", "gether"),
- 	/* LCD0 */
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_lcdc_fb.0", "pfc-r8a7740",
- 				  "lcd0_data24_0", "lcd0"),
-@@ -1139,26 +1144,6 @@ static void __init eva_init(void)
- 	gpio_request_one(166, GPIOF_OUT_INIT_HIGH, NULL); /* TP_RST_B */
- 
- 	/* GETHER */
--	gpio_request(GPIO_FN_ET_CRS,		NULL);
--	gpio_request(GPIO_FN_ET_MDC,		NULL);
--	gpio_request(GPIO_FN_ET_MDIO,		NULL);
--	gpio_request(GPIO_FN_ET_TX_ER,		NULL);
--	gpio_request(GPIO_FN_ET_RX_ER,		NULL);
--	gpio_request(GPIO_FN_ET_ERXD0,		NULL);
--	gpio_request(GPIO_FN_ET_ERXD1,		NULL);
--	gpio_request(GPIO_FN_ET_ERXD2,		NULL);
--	gpio_request(GPIO_FN_ET_ERXD3,		NULL);
--	gpio_request(GPIO_FN_ET_TX_CLK,		NULL);
--	gpio_request(GPIO_FN_ET_TX_EN,		NULL);
--	gpio_request(GPIO_FN_ET_ETXD0,		NULL);
--	gpio_request(GPIO_FN_ET_ETXD1,		NULL);
--	gpio_request(GPIO_FN_ET_ETXD2,		NULL);
--	gpio_request(GPIO_FN_ET_ETXD3,		NULL);
--	gpio_request(GPIO_FN_ET_PHY_INT,	NULL);
--	gpio_request(GPIO_FN_ET_COL,		NULL);
--	gpio_request(GPIO_FN_ET_RX_DV,		NULL);
--	gpio_request(GPIO_FN_ET_RX_CLK,		NULL);
--
- 	gpio_request_one(18, GPIOF_OUT_INIT_HIGH, NULL); /* PHY_RST */
- 
- 	/* USB */
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0143-ARM-shmobile-kzm9g-reference-Use-falling-edge-IRQ-fo.patch b/patches.renesas/0143-ARM-shmobile-kzm9g-reference-Use-falling-edge-IRQ-fo.patch
deleted file mode 100644
index a99cea106a146..0000000000000
--- a/patches.renesas/0143-ARM-shmobile-kzm9g-reference-Use-falling-edge-IRQ-fo.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From 02194e70ff09dfbe577a7c869d72e7375e0c9a66 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Sat, 9 Nov 2013 13:23:58 +0100
-Subject: ARM: shmobile: kzm9g-reference: Use falling edge IRQ for LAN9221
-
-The device is configured to generate an active-low interrupt signal that
-is automatically deasserted without requiring any action from the host.
-Configure the IRQ to trigger on falling edge.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 72e14c051a920d9c30d6cab2aecd1699a070aebe)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/sh73a0-kzm9g-reference.dts | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
-index 605f6c627307..12fdfaaf5e7b 100644
---- a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
-+++ b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
-@@ -83,7 +83,7 @@
- 		reg = <0x10000000 0x100>;
- 		phy-mode = "mii";
- 		interrupt-parent = <&irqpin0>;
--		interrupts = <3 IRQ_TYPE_NONE>;	/* active low */
-+		interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
- 		reg-io-width = <4>;
- 		smsc,irq-push-pull;
- 		smsc,save-mac-address;
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0143-ARM-shmobile-marzen-Add-Display-Unit-support.patch b/patches.renesas/0143-ARM-shmobile-marzen-Add-Display-Unit-support.patch
deleted file mode 100644
index a6d18d96d67a1..0000000000000
--- a/patches.renesas/0143-ARM-shmobile-marzen-Add-Display-Unit-support.patch
+++ /dev/null
@@ -1,124 +0,0 @@
-From 3c739317bdb2ddecf7be87c157b0ab6205ae0ca9 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 27 Mar 2013 11:55:35 +0100
-Subject: ARM: shmobile: marzen: Add Display Unit support
-
-Support the DU0 VGA and DU1 LVDS outputs. DU1 is connected to a
-Mitsubishi AA104XD12 panel (10.4" XGA).
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit df83d907348b41f40da83b267242b5dca041d4ef)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-marzen.c | 72 +++++++++++++++++++++++++++++++++++
- 1 file changed, 72 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/board-marzen.c b/arch/arm/mach-shmobile/board-marzen.c
-index 3f5044fda4e3..434b213cc738 100644
---- a/arch/arm/mach-shmobile/board-marzen.c
-+++ b/arch/arm/mach-shmobile/board-marzen.c
-@@ -30,6 +30,7 @@
- #include <linux/dma-mapping.h>
- #include <linux/pinctrl/machine.h>
- #include <linux/platform_data/gpio-rcar.h>
-+#include <linux/platform_data/rcar-du.h>
- #include <linux/platform_data/usb-rcar-phy.h>
- #include <linux/regulator/fixed.h>
- #include <linux/regulator/machine.h>
-@@ -169,6 +170,63 @@ static struct platform_device hspi_device = {
- 	.num_resources	= ARRAY_SIZE(hspi_resources),
- };
- 
-+/*
-+ * DU
-+ *
-+ * The panel only specifies the [hv]display and [hv]total values. The position
-+ * and width of the sync pulses don't matter, they're copied from VESA timings.
-+ */
-+static struct rcar_du_encoder_data du_encoders[] = {
-+	{
-+		.type = RCAR_DU_ENCODER_VGA,
-+		.output = RCAR_DU_OUTPUT_DPAD0,
-+	}, {
-+		.type = RCAR_DU_ENCODER_LVDS,
-+		.output = RCAR_DU_OUTPUT_DPAD1,
-+		.connector.lvds.panel = {
-+			.width_mm = 210,
-+			.height_mm = 158,
-+			.mode = {
-+				.clock = 65000,
-+				.hdisplay = 1024,
-+				.hsync_start = 1048,
-+				.hsync_end = 1184,
-+				.htotal = 1344,
-+				.vdisplay = 768,
-+				.vsync_start = 771,
-+				.vsync_end = 777,
-+				.vtotal = 806,
-+				.flags = 0,
-+			},
-+		},
-+	},
-+};
-+
-+static const struct rcar_du_platform_data du_pdata __initconst = {
-+	.encoders = du_encoders,
-+	.num_encoders = ARRAY_SIZE(du_encoders),
-+};
-+
-+static const struct resource du_resources[] __initconst = {
-+	DEFINE_RES_MEM(0xfff80000, 0x40000),
-+	DEFINE_RES_IRQ(gic_iid(0x3f)),
-+};
-+
-+static void __init marzen_add_du_device(void)
-+{
-+	struct platform_device_info info = {
-+		.name = "rcar-du-r8a7779",
-+		.id = -1,
-+		.res = du_resources,
-+		.num_res = ARRAY_SIZE(du_resources),
-+		.data = &du_pdata,
-+		.size_data = sizeof(du_pdata),
-+		.dma_mask = DMA_BIT_MASK(32),
-+	};
-+
-+	platform_device_register_full(&info);
-+}
-+
- /* LEDS */
- static struct gpio_led marzen_leds[] = {
- 	{
-@@ -237,6 +295,19 @@ static struct platform_device *marzen_devices[] __initdata = {
- };
- 
- static const struct pinctrl_map marzen_pinctrl_map[] = {
-+	/* DU (CN10: ARGB0, CN13: LVDS) */
-+	PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7779", "pfc-r8a7779",
-+				  "du0_rgb888", "du0"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7779", "pfc-r8a7779",
-+				  "du0_sync_1", "du0"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7779", "pfc-r8a7779",
-+				  "du0_clk_out_0", "du0"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7779", "pfc-r8a7779",
-+				  "du1_rgb666", "du1"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7779", "pfc-r8a7779",
-+				  "du1_sync_1", "du1"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7779", "pfc-r8a7779",
-+				  "du1_clk_out", "du1"),
- 	/* HSPI0 */
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh-hspi.0", "pfc-r8a7779",
- 				  "hspi0", "hspi0"),
-@@ -297,6 +368,7 @@ static void __init marzen_init(void)
- 	r8a7779_add_vin_device(1, &vin_platform_data);
- 	r8a7779_add_vin_device(3, &vin_platform_data);
- 	platform_add_devices(marzen_devices, ARRAY_SIZE(marzen_devices));
-+	marzen_add_du_device();
- }
- 
- static const char *marzen_boards_compat_dt[] __initdata = {
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0144-ARM-shmobile-armadillo800eva-Register-pinctrl-mappin.patch b/patches.renesas/0144-ARM-shmobile-armadillo800eva-Register-pinctrl-mappin.patch
deleted file mode 100644
index 6b6f5b0b3aaf6..0000000000000
--- a/patches.renesas/0144-ARM-shmobile-armadillo800eva-Register-pinctrl-mappin.patch
+++ /dev/null
@@ -1,60 +0,0 @@
-From 6abf484720cf8bde6890eddb2149aeb51c4e7d80 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 18 Apr 2013 01:18:41 +0200
-Subject: ARM: shmobile: armadillo800eva: Register pinctrl mapping for CEU0
-
-Replace the GPIO-based CEU0 pinmux configuration by a pinctrl mapping.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit babde827f26223149dc33ffc5237458ac9e30c96)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-armadillo800eva.c | 24 +++++++++---------------
- 1 file changed, 9 insertions(+), 15 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c
-index 328f6502..4327f7e6 100644
---- a/arch/arm/mach-shmobile/board-armadillo800eva.c
-+++ b/arch/arm/mach-shmobile/board-armadillo800eva.c
-@@ -1046,6 +1046,15 @@ static struct platform_device *eva_devices[] __initdata = {
- };
- 
- static const struct pinctrl_map eva_pinctrl_map[] = {
-+	/* CEU0 */
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_ceu.0", "pfc-r8a7740",
-+				  "ceu0_data_0_7", "ceu0"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_ceu.0", "pfc-r8a7740",
-+				  "ceu0_clk_0", "ceu0"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_ceu.0", "pfc-r8a7740",
-+				  "ceu0_sync", "ceu0"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_ceu.0", "pfc-r8a7740",
-+				  "ceu0_field", "ceu0"),
- 	/* GETHER */
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7740",
- 				  "gether_mii", "gether"),
-@@ -1165,21 +1174,6 @@ static void __init eva_init(void)
- 		usb = &usbhsf_device;
- 	}
- 
--	/* CEU0 */
--	gpio_request(GPIO_FN_VIO0_D7,		NULL);
--	gpio_request(GPIO_FN_VIO0_D6,		NULL);
--	gpio_request(GPIO_FN_VIO0_D5,		NULL);
--	gpio_request(GPIO_FN_VIO0_D4,		NULL);
--	gpio_request(GPIO_FN_VIO0_D3,		NULL);
--	gpio_request(GPIO_FN_VIO0_D2,		NULL);
--	gpio_request(GPIO_FN_VIO0_D1,		NULL);
--	gpio_request(GPIO_FN_VIO0_D0,		NULL);
--	gpio_request(GPIO_FN_VIO0_CLK,		NULL);
--	gpio_request(GPIO_FN_VIO0_HD,		NULL);
--	gpio_request(GPIO_FN_VIO0_VD,		NULL);
--	gpio_request(GPIO_FN_VIO0_FIELD,	NULL);
--	gpio_request(GPIO_FN_VIO_CKO,		NULL);
--
- 	/* CON1/CON15 Camera */
- 	gpio_request_one(173, GPIOF_OUT_INIT_LOW, NULL);  /* STANDBY */
- 	gpio_request_one(172, GPIOF_OUT_INIT_HIGH, NULL); /* RST */
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0144-ARM-shmobile-lager-Constify-platform-data-and-resour.patch b/patches.renesas/0144-ARM-shmobile-lager-Constify-platform-data-and-resour.patch
deleted file mode 100644
index 2b0adc8d17288..0000000000000
--- a/patches.renesas/0144-ARM-shmobile-lager-Constify-platform-data-and-resour.patch
+++ /dev/null
@@ -1,75 +0,0 @@
-From d6c13c2feab5837fcef4e408d248088fc0745b05 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 8 Aug 2013 00:43:00 +0200
-Subject: ARM: shmobile: lager: Constify platform data and resources
-
-Platform data and resources for Lager devices are kmemdup()ed when the
-corresponding devices are registered and can thus be declared as const.
-Do so.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 27113d63daac0aacaa26b1fabfc23391de4284f4)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-	arch/arm/mach-shmobile/board-lager.c
----
- arch/arm/mach-shmobile/board-lager.c | 12 ++++++------
- 1 file changed, 6 insertions(+), 6 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
-index 6569491839cf..c1075f202602 100644
---- a/arch/arm/mach-shmobile/board-lager.c
-+++ b/arch/arm/mach-shmobile/board-lager.c
-@@ -56,7 +56,7 @@ static struct gpio_led lager_leds[] = {
- 	},
- };
- 
--static __initdata struct gpio_led_platform_data lager_leds_pdata = {
-+static const struct gpio_led_platform_data lager_leds_pdata __initconst = {
- 	.leds		= lager_leds,
- 	.num_leds	= ARRAY_SIZE(lager_leds),
- };
-@@ -72,7 +72,7 @@ static struct gpio_keys_button gpio_buttons[] = {
- 	GPIO_KEY(KEY_1,		RCAR_GP_PIN(1, 14),	"SW2-pin1"),
- };
- 
--static __initdata struct gpio_keys_platform_data lager_keys_pdata = {
-+static const struct gpio_keys_platform_data lager_keys_pdata __initconst = {
- 	.buttons	= gpio_buttons,
- 	.nbuttons	= ARRAY_SIZE(gpio_buttons),
- };
-@@ -84,24 +84,24 @@ static struct regulator_consumer_supply fixed3v3_power_consumers[] =
- };
- 
- /* MMCIF */
--static struct sh_mmcif_plat_data mmcif1_pdata __initdata = {
-+static const struct sh_mmcif_plat_data mmcif1_pdata __initconst = {
- 	.caps		= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
- };
- 
--static struct resource mmcif1_resources[] __initdata = {
-+static const struct resource mmcif1_resources[] __initconst = {
- 	DEFINE_RES_MEM_NAMED(0xee220000, 0x80, "MMCIF1"),
- 	DEFINE_RES_IRQ(gic_spi(170)),
- };
- 
- /* Ether */
--static struct sh_eth_plat_data ether_pdata __initdata = {
-+static const struct sh_eth_plat_data ether_pdata __initconst = {
- 	.phy			= 0x1,
- 	.edmac_endian		= EDMAC_LITTLE_ENDIAN,
- 	.phy_interface		= PHY_INTERFACE_MODE_RMII,
- 	.ether_link_active_low	= 1,
- };
- 
--static struct resource ether_resources[] __initdata = {
-+static const struct resource ether_resources[] __initconst = {
- 	DEFINE_RES_MEM(0xee700000, 0x400),
- 	DEFINE_RES_IRQ(gic_spi(162)),
- };
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0144-ARM-shmobile-marzen-remove-SDHI0-WP-pin-setting-from.patch b/patches.renesas/0144-ARM-shmobile-marzen-remove-SDHI0-WP-pin-setting-from.patch
deleted file mode 100644
index e8b41a8079e68..0000000000000
--- a/patches.renesas/0144-ARM-shmobile-marzen-remove-SDHI0-WP-pin-setting-from.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From 80ce747fc907e50d73bccb19460c04af05016034 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Tue, 19 Nov 2013 19:17:41 -0800
-Subject: ARM: shmobile: marzen: remove SDHI0 WP pin setting from DTS
-
-WP pin is not implemented on Marzen
-
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 72e7db878b8469261d01a3dfcece8ab99ffc9cb6)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7779-marzen-reference.dts | 3 +--
- 1 file changed, 1 insertion(+), 2 deletions(-)
-
-diff --git a/arch/arm/boot/dts/r8a7779-marzen-reference.dts b/arch/arm/boot/dts/r8a7779-marzen-reference.dts
-index 13fa8beeb6e5..918085c375d9 100644
---- a/arch/arm/boot/dts/r8a7779-marzen-reference.dts
-+++ b/arch/arm/boot/dts/r8a7779-marzen-reference.dts
-@@ -94,8 +94,7 @@
- 	};
- 
- 	sdhi0_pins: sd0 {
--		renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_cd",
--				 "sdhi0_wp";
-+		renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_cd";
- 		renesas,function = "sdhi0";
- 	};
- };
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0145-ARM-shmobile-armadillo800eva-Register-pinctrl-mappin.patch b/patches.renesas/0145-ARM-shmobile-armadillo800eva-Register-pinctrl-mappin.patch
deleted file mode 100644
index e33d6c06baf7a..0000000000000
--- a/patches.renesas/0145-ARM-shmobile-armadillo800eva-Register-pinctrl-mappin.patch
+++ /dev/null
@@ -1,62 +0,0 @@
-From 1fe3b7d1c2a6541417fbe5ad1a3ffb6e6d75da93 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 18 Apr 2013 01:18:41 +0200
-Subject: ARM: shmobile: armadillo800eva: Register pinctrl mapping for FSI
-
-Replace the GPIO-based FSI pinmux configuration by a pinctrl mapping.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit fed8976e39198a86751c5283ff43643c3d9294a4)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-armadillo800eva.c | 21 ++++++++++++---------
- 1 file changed, 12 insertions(+), 9 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c
-index 4327f7e6..4e1f8f3f 100644
---- a/arch/arm/mach-shmobile/board-armadillo800eva.c
-+++ b/arch/arm/mach-shmobile/board-armadillo800eva.c
-@@ -1055,6 +1055,18 @@ static const struct pinctrl_map eva_pinctrl_map[] = {
- 				  "ceu0_sync", "ceu0"),
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_ceu.0", "pfc-r8a7740",
- 				  "ceu0_field", "ceu0"),
-+	/* FSIA */
-+	PIN_MAP_MUX_GROUP_DEFAULT("asoc-simple-card.0", "pfc-r8a7740",
-+				  "fsia_sclk_in", "fsia"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("asoc-simple-card.0", "pfc-r8a7740",
-+				  "fsia_mclk_out", "fsia"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("asoc-simple-card.0", "pfc-r8a7740",
-+				  "fsia_data_in_1", "fsia"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("asoc-simple-card.0", "pfc-r8a7740",
-+				  "fsia_data_out_0", "fsia"),
-+	/* FSIB */
-+	PIN_MAP_MUX_GROUP_DEFAULT("asoc-simple-card.1", "pfc-r8a7740",
-+				  "fsib_mclk_in", "fsib"),
- 	/* GETHER */
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7740",
- 				  "gether_mii", "gether"),
-@@ -1181,20 +1193,11 @@ static void __init eva_init(void)
- 	gpio_request_one(158, GPIOF_OUT_INIT_LOW, NULL);  /* CAM_PON */
- 
- 	/* FSI-WM8978 */
--	gpio_request(GPIO_FN_FSIAIBT,		NULL);
--	gpio_request(GPIO_FN_FSIAILR,		NULL);
--	gpio_request(GPIO_FN_FSIAOMC,		NULL);
--	gpio_request(GPIO_FN_FSIAOSLD,		NULL);
--	gpio_request(GPIO_FN_FSIAISLD_PORT5,	NULL);
--
- 	gpio_request(7, NULL);
- 	gpio_request(8, NULL);
- 	gpio_direction_none(GPIO_PORT7CR); /* FSIAOBT needs no direction */
- 	gpio_direction_none(GPIO_PORT8CR); /* FSIAOLR needs no direction */
- 
--	/* FSI-HDMI */
--	gpio_request(GPIO_FN_FSIBCK,		NULL);
--
- 	/* HDMI */
- 	gpio_request(GPIO_FN_HDMI_HPD,		NULL);
- 	gpio_request(GPIO_FN_HDMI_CEC,		NULL);
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0145-ARM-shmobile-lager-Add-Display-Unit-support.patch b/patches.renesas/0145-ARM-shmobile-lager-Add-Display-Unit-support.patch
deleted file mode 100644
index 52b2c6d73662d..0000000000000
--- a/patches.renesas/0145-ARM-shmobile-lager-Add-Display-Unit-support.patch
+++ /dev/null
@@ -1,117 +0,0 @@
-From a30ea55a9397e1f00a2607a8f95a4e76d3b195af Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 16 Apr 2013 12:39:11 +0200
-Subject: ARM: shmobile: lager: Add Display Unit support
-
-Only the VGA output is currently supported.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit c75a5afa44e71c99e1793824121608f0db48f014)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-lager.c | 66 ++++++++++++++++++++++++++++++++++++
- 1 file changed, 66 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
-index c1075f202602..6a0458901010 100644
---- a/arch/arm/mach-shmobile/board-lager.c
-+++ b/arch/arm/mach-shmobile/board-lager.c
-@@ -28,6 +28,7 @@
- #include <linux/mmc/sh_mmcif.h>
- #include <linux/pinctrl/machine.h>
- #include <linux/platform_data/gpio-rcar.h>
-+#include <linux/platform_data/rcar-du.h>
- #include <linux/platform_device.h>
- #include <linux/phy.h>
- #include <linux/regulator/fixed.h>
-@@ -39,6 +40,62 @@
- #include <asm/mach-types.h>
- #include <asm/mach/arch.h>
- 
-+/* DU */
-+static struct rcar_du_encoder_data lager_du_encoders[] = {
-+	{
-+		.type = RCAR_DU_ENCODER_VGA,
-+		.output = RCAR_DU_OUTPUT_DPAD0,
-+	}, {
-+		.type = RCAR_DU_ENCODER_NONE,
-+		.output = RCAR_DU_OUTPUT_LVDS1,
-+		.connector.lvds.panel = {
-+			.width_mm = 210,
-+			.height_mm = 158,
-+			.mode = {
-+				.clock = 65000,
-+				.hdisplay = 1024,
-+				.hsync_start = 1048,
-+				.hsync_end = 1184,
-+				.htotal = 1344,
-+				.vdisplay = 768,
-+				.vsync_start = 771,
-+				.vsync_end = 777,
-+				.vtotal = 806,
-+				.flags = 0,
-+			},
-+		},
-+	},
-+};
-+
-+static const struct rcar_du_platform_data lager_du_pdata __initconst = {
-+	.encoders = lager_du_encoders,
-+	.num_encoders = ARRAY_SIZE(lager_du_encoders),
-+};
-+
-+static const struct resource du_resources[] __initconst = {
-+	DEFINE_RES_MEM(0xfeb00000, 0x70000),
-+	DEFINE_RES_MEM_NAMED(0xfeb90000, 0x1c, "lvds.0"),
-+	DEFINE_RES_MEM_NAMED(0xfeb94000, 0x1c, "lvds.1"),
-+	DEFINE_RES_IRQ(gic_spi(256)),
-+	DEFINE_RES_IRQ(gic_spi(268)),
-+	DEFINE_RES_IRQ(gic_spi(269)),
-+};
-+
-+static void __init lager_add_du_device(void)
-+{
-+	struct platform_device_info info = {
-+		.name = "rcar-du-r8a7790",
-+		.id = -1,
-+		.res = du_resources,
-+		.num_res = ARRAY_SIZE(du_resources),
-+		.data = &du_resources,
-+		.size_data = sizeof(du_resources),
-+		.dma_mask = DMA_BIT_MASK(32),
-+	};
-+
-+	platform_device_register_full(&info);
-+}
-+
- /* LEDS */
- static struct gpio_led lager_leds[] = {
- 	{
-@@ -107,6 +164,13 @@ static const struct resource ether_resources[] __initconst = {
- };
- 
- static const struct pinctrl_map lager_pinctrl_map[] = {
-+	/* DU (CN10: ARGB0, CN13: LVDS) */
-+	PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
-+				  "du_rgb666", "du"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
-+				  "du_sync_1", "du"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
-+				  "du_clk_out_0", "du"),
- 	/* SCIF0 (CN19: DEBUG SERIAL0) */
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.6", "pfc-r8a7790",
- 				  "scif0_data", "scif0"),
-@@ -154,6 +218,8 @@ static void __init lager_add_standard_devices(void)
- 					  ether_resources,
- 					  ARRAY_SIZE(ether_resources),
- 					  &ether_pdata, sizeof(ether_pdata));
-+
-+	lager_add_du_device();
- }
- 
- /*
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0145-ARM-shmobile-marzen-remove-SDHI0-WP-pin-setting.patch b/patches.renesas/0145-ARM-shmobile-marzen-remove-SDHI0-WP-pin-setting.patch
deleted file mode 100644
index 19181ee5f330a..0000000000000
--- a/patches.renesas/0145-ARM-shmobile-marzen-remove-SDHI0-WP-pin-setting.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From ff578e7f905d6b3a7184235f9d7ae34c5da4b54a Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Tue, 19 Nov 2013 19:17:55 -0800
-Subject: ARM: shmobile: marzen: remove SDHI0 WP pin setting
-
-WP pin is not implemented on Marzen
-
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 9e5a68d2b9aba2c65112986ece1334bf72711117)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-marzen.c | 2 --
- 1 file changed, 2 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-marzen.c b/arch/arm/mach-shmobile/board-marzen.c
-index 4f9e3ec42ddc..d832a4477b4b 100644
---- a/arch/arm/mach-shmobile/board-marzen.c
-+++ b/arch/arm/mach-shmobile/board-marzen.c
-@@ -347,8 +347,6 @@ static const struct pinctrl_map marzen_pinctrl_map[] = {
- 				  "sdhi0_ctrl", "sdhi0"),
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7779",
- 				  "sdhi0_cd", "sdhi0"),
--	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7779",
--				  "sdhi0_wp", "sdhi0"),
- 	/* SMSC */
- 	PIN_MAP_MUX_GROUP_DEFAULT("smsc911x", "pfc-r8a7779",
- 				  "intc_irq1_b", "intc"),
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0146-ARM-shmobile-ape6evm-update-MMC0-SDHI0-and-SDHI1-wit.patch b/patches.renesas/0146-ARM-shmobile-ape6evm-update-MMC0-SDHI0-and-SDHI1-wit.patch
deleted file mode 100644
index 92863b0d3de28..0000000000000
--- a/patches.renesas/0146-ARM-shmobile-ape6evm-update-MMC0-SDHI0-and-SDHI1-wit.patch
+++ /dev/null
@@ -1,105 +0,0 @@
-From d5f2c37a6d85518f5297309a90be413728a8c14b Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Thu, 1 Aug 2013 09:41:20 +0200
-Subject: ARM: shmobile: ape6evm: update MMC0, SDHI0 and SDHI1 with correct
- regulators
-
-Currently a dummy fixed always-on regulator is used for all 3 SD/MMC
-interfaces on ape6evm. This patch updates the board to use correct supplies
-for MMC0, SDHI0 and SDHI1 VDD. SDHI0 VccQ supply regulator should be
-implemented in a separate patch.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 8b98126d2ce701c7367deee60739904e17864523)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-ape6evm.c | 54 +++++++++++++++++++++++++++++-----
- 1 file changed, 46 insertions(+), 8 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-ape6evm.c b/arch/arm/mach-shmobile/board-ape6evm.c
-index d36e23f5d8b7..7e5765b8fc0e 100644
---- a/arch/arm/mach-shmobile/board-ape6evm.c
-+++ b/arch/arm/mach-shmobile/board-ape6evm.c
-@@ -113,16 +113,49 @@ static const struct smsc911x_platform_config lan9220_data __initconst = {
- };
- 
- /*
-- * On APE6EVM power is supplied to MMCIF by a tps80032 regulator. For now we
-- * model a VDD supply to MMCIF, using a fixed 3.3V regulator. Also use the
-- * static power supply for SDHI0 and SDHI1, whereas SDHI0's VccQ is also
-- * supplied by the same tps80032 regulator and thus can also be adjusted
-- * dynamically.
-+ * MMC0 power supplies:
-+ * Both Vcc and VccQ to eMMC on APE6EVM are supplied by a tps80032 voltage
-+ * regulator. Until support for it is added to this file we simulate the
-+ * Vcc supply by a fixed always-on regulator
-  */
--static struct regulator_consumer_supply fixed3v3_power_consumers[] =
-+static struct regulator_consumer_supply vcc_mmc0_consumers[] =
- {
- 	REGULATOR_SUPPLY("vmmc", "sh_mmcif.0"),
-+};
-+
-+/*
-+ * SDHI0 power supplies:
-+ * Vcc to SDHI0 on APE6EVM is supplied by a GPIO-switchable regulator. VccQ is
-+ * provided by the same tps80032 regulator as both MMC0 voltages - see comment
-+ * above
-+ */
-+static struct regulator_consumer_supply vcc_sdhi0_consumers[] =
-+{
- 	REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"),
-+};
-+
-+static struct regulator_init_data vcc_sdhi0_init_data = {
-+	.constraints = {
-+		.valid_ops_mask = REGULATOR_CHANGE_STATUS,
-+	},
-+	.num_consumer_supplies  = ARRAY_SIZE(vcc_sdhi0_consumers),
-+	.consumer_supplies      = vcc_sdhi0_consumers,
-+};
-+
-+static const struct fixed_voltage_config vcc_sdhi0_info __initconst = {
-+	.supply_name = "SDHI0 Vcc",
-+	.microvolts = 3300000,
-+	.gpio = 76,
-+	.enable_high = 1,
-+	.init_data = &vcc_sdhi0_init_data,
-+};
-+
-+/*
-+ * SDHI1 power supplies:
-+ * Vcc and VccQ to SDHI1 on APE6EVM are both fixed at 3.3V
-+ */
-+static struct regulator_consumer_supply vcc_sdhi1_consumers[] =
-+{
- 	REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.1"),
- };
- 
-@@ -215,14 +248,19 @@ static void __init ape6evm_add_standard_devices(void)
- 	platform_device_register_resndata(&platform_bus, "smsc911x", -1,
- 					  lan9220_res, ARRAY_SIZE(lan9220_res),
- 					  &lan9220_data, sizeof(lan9220_data));
--	regulator_register_always_on(1, "fixed-3.3V", fixed3v3_power_consumers,
--				     ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
-+
-+	regulator_register_always_on(1, "MMC0 Vcc", vcc_mmc0_consumers,
-+				     ARRAY_SIZE(vcc_mmc0_consumers), 2800000);
- 	platform_device_register_resndata(&platform_bus, "sh_mmcif", 0,
- 					  mmcif0_resources, ARRAY_SIZE(mmcif0_resources),
- 					  &mmcif0_pdata, sizeof(mmcif0_pdata));
-+	platform_device_register_data(&platform_bus, "reg-fixed-voltage", 2,
-+				      &vcc_sdhi0_info, sizeof(vcc_sdhi0_info));
- 	platform_device_register_resndata(&platform_bus, "sh_mobile_sdhi", 0,
- 					  sdhi0_resources, ARRAY_SIZE(sdhi0_resources),
- 					  &sdhi0_pdata, sizeof(sdhi0_pdata));
-+	regulator_register_always_on(3, "SDHI1 Vcc", vcc_sdhi1_consumers,
-+				     ARRAY_SIZE(vcc_sdhi1_consumers), 3300000);
- 	platform_device_register_resndata(&platform_bus, "sh_mobile_sdhi", 1,
- 					  sdhi1_resources, ARRAY_SIZE(sdhi1_resources),
- 					  &sdhi1_pdata, sizeof(sdhi1_pdata));
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0146-ARM-shmobile-armadillo800eva-Register-pinctrl-mappin.patch b/patches.renesas/0146-ARM-shmobile-armadillo800eva-Register-pinctrl-mappin.patch
deleted file mode 100644
index 007be39a1808d..0000000000000
--- a/patches.renesas/0146-ARM-shmobile-armadillo800eva-Register-pinctrl-mappin.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-From 97fdbc53628831349cef2025135750c0dcb2e58b Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 18 Apr 2013 01:18:41 +0200
-Subject: ARM: shmobile: armadillo800eva: Register pinctrl mapping for HDMI
-
-Replace the GPIO-based HDMI pinmux configuration by a pinctrl mapping.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit f1bb4ab084626b093ed050dc979144b73f2efc03)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-armadillo800eva.c | 7 +++----
- 1 file changed, 3 insertions(+), 4 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c
-index 4e1f8f3f..dad4966d 100644
---- a/arch/arm/mach-shmobile/board-armadillo800eva.c
-+++ b/arch/arm/mach-shmobile/board-armadillo800eva.c
-@@ -1072,6 +1072,9 @@ static const struct pinctrl_map eva_pinctrl_map[] = {
- 				  "gether_mii", "gether"),
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7740",
- 				  "gether_int", "gether"),
-+	/* HDMI */
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh-mobile-hdmi", "pfc-r8a7740",
-+				  "hdmi", "hdmi"),
- 	/* LCD0 */
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_lcdc_fb.0", "pfc-r8a7740",
- 				  "lcd0_data24_0", "lcd0"),
-@@ -1198,10 +1201,6 @@ static void __init eva_init(void)
- 	gpio_direction_none(GPIO_PORT7CR); /* FSIAOBT needs no direction */
- 	gpio_direction_none(GPIO_PORT8CR); /* FSIAOLR needs no direction */
- 
--	/* HDMI */
--	gpio_request(GPIO_FN_HDMI_HPD,		NULL);
--	gpio_request(GPIO_FN_HDMI_CEC,		NULL);
--
- 	/*
- 	 * CAUTION
- 	 *
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0146-ARM-shmobile-sh73a0-fixup-sdhi-compatible-name.patch b/patches.renesas/0146-ARM-shmobile-sh73a0-fixup-sdhi-compatible-name.patch
deleted file mode 100644
index eed26ad2b9311..0000000000000
--- a/patches.renesas/0146-ARM-shmobile-sh73a0-fixup-sdhi-compatible-name.patch
+++ /dev/null
@@ -1,51 +0,0 @@
-From f0c020d2bafd6929ba53e69b615d710738b3ef05 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Tue, 19 Nov 2013 19:18:09 -0800
-Subject: ARM: shmobile: sh73a0: fixup sdhi compatible name
-
-sh73a0 != r8a7740
-
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit e8a8b8a3cd6e09209a9c253a22673836ef794f58)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/sh73a0.dtsi | 6 +++---
- 1 file changed, 3 insertions(+), 3 deletions(-)
-
-diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi
-index aef8a61b5514..29d2ee6e36c6 100644
---- a/arch/arm/boot/dts/sh73a0.dtsi
-+++ b/arch/arm/boot/dts/sh73a0.dtsi
-@@ -203,7 +203,7 @@
- 	};
- 
- 	sdhi0: sd@ee100000 {
--		compatible = "renesas,sdhi-r8a7740";
-+		compatible = "renesas,sdhi-sh73a0";
- 		reg = <0xee100000 0x100>;
- 		interrupt-parent = <&gic>;
- 		interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH
-@@ -215,7 +215,7 @@
- 
- 	/* SDHI1 and SDHI2 have no CD pins, no need for CD IRQ */
- 	sdhi1: sd@ee120000 {
--		compatible = "renesas,sdhi-r8a7740";
-+		compatible = "renesas,sdhi-sh73a0";
- 		reg = <0xee120000 0x100>;
- 		interrupt-parent = <&gic>;
- 		interrupts = <0 88 IRQ_TYPE_LEVEL_HIGH
-@@ -226,7 +226,7 @@
- 	};
- 
- 	sdhi2: sd@ee140000 {
--		compatible = "renesas,sdhi-r8a7740";
-+		compatible = "renesas,sdhi-sh73a0";
- 		reg = <0xee140000 0x100>;
- 		interrupt-parent = <&gic>;
- 		interrupts = <0 104 IRQ_TYPE_LEVEL_HIGH
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0147-ARM-shmobile-Use-r8a7791-suffix-for-IRQC-compat-stri.patch b/patches.renesas/0147-ARM-shmobile-Use-r8a7791-suffix-for-IRQC-compat-stri.patch
deleted file mode 100644
index 0d118697d69c6..0000000000000
--- a/patches.renesas/0147-ARM-shmobile-Use-r8a7791-suffix-for-IRQC-compat-stri.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From 79273889b58ecdb592c4e7c5a134b1149cb10797 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Wed, 20 Nov 2013 13:18:05 +0900
-Subject: ARM: shmobile: Use r8a7791 suffix for IRQC compat string
-
-Add "renesas,irqc-r8a7791" to the compatible string for IRQC
-in case of r8a7791. This makes the IRQC follow the same style
-as the other devices and also makes it more future proof.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 26041b06107fbf4618422618630f154f8d1a7d64)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7791.dtsi | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
-index 86d5d3a509f9..d85254ca20b8 100644
---- a/arch/arm/boot/dts/r8a7791.dtsi
-+++ b/arch/arm/boot/dts/r8a7791.dtsi
-@@ -154,7 +154,7 @@
- 	};
- 
- 	irqc0: interrupt-controller@e61c0000 {
--		compatible = "renesas,irqc";
-+		compatible = "renesas,irqc-r8a7791", "renesas,irqc";
- 		#interrupt-cells = <2>;
- 		interrupt-controller;
- 		reg = <0 0xe61c0000 0 0x200>;
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0147-ARM-shmobile-armadillo800eva-Don-t-configure-LCDC-ro.patch b/patches.renesas/0147-ARM-shmobile-armadillo800eva-Don-t-configure-LCDC-ro.patch
deleted file mode 100644
index ca8c8446bb867..0000000000000
--- a/patches.renesas/0147-ARM-shmobile-armadillo800eva-Don-t-configure-LCDC-ro.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From 90670c7d11c9867a38ed0d7d78160abc604e44c3 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 23 Apr 2013 00:17:58 +0200
-Subject: ARM: shmobile: armadillo800eva: Don't configure LCDC routing manually
-
-LCDC routing is configured automatically in the PFC driver, don't
-configure it manually in board code.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 1b5961c31d67d0c2fcce202af3c4ccdb9385eaa7)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-armadillo800eva.c | 2 --
- 1 file changed, 2 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c
-index dad4966d..8ec69612 100644
---- a/arch/arm/mach-shmobile/board-armadillo800eva.c
-+++ b/arch/arm/mach-shmobile/board-armadillo800eva.c
-@@ -1159,8 +1159,6 @@ static void __init eva_init(void)
- 	gpio_request(GPIO_FN_SCIFA1_TXD, NULL);
- 
- 	/* LCDC0 */
--	gpio_request(GPIO_FN_LCDC0_SELECT,	NULL);
--
- 	gpio_request_one(61, GPIOF_OUT_INIT_HIGH, NULL); /* LCDDON */
- 	gpio_request_one(202, GPIOF_OUT_INIT_LOW, NULL); /* LCD0_LED_CONT */
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0147-ARM-shmobile-lager-Fix-Display-Unit-platform-data.patch b/patches.renesas/0147-ARM-shmobile-lager-Fix-Display-Unit-platform-data.patch
deleted file mode 100644
index 9566524241ba1..0000000000000
--- a/patches.renesas/0147-ARM-shmobile-lager-Fix-Display-Unit-platform-data.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From f177e751768acb7246592c036ea103374631893c Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 22 Aug 2013 17:55:08 +0200
-Subject: ARM: shmobile: lager: Fix Display Unit platform data
-
-The DU device erroneously receives the DU resources array as platform
-data instead of the DU platform data structure. Fix it.
-
-This problem was introduced by f631fa0 ("ARM: shmobile: lager: Add Display
-Unit support").
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 37bf8103c51a1508d6323de19a7ae1c13c3ed3f5)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-lager.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
-index 6a0458901010..1caeefa9d114 100644
---- a/arch/arm/mach-shmobile/board-lager.c
-+++ b/arch/arm/mach-shmobile/board-lager.c
-@@ -88,8 +88,8 @@ static void __init lager_add_du_device(void)
- 		.id = -1,
- 		.res = du_resources,
- 		.num_res = ARRAY_SIZE(du_resources),
--		.data = &du_resources,
--		.size_data = sizeof(du_resources),
-+		.data = &lager_du_pdata,
-+		.size_data = sizeof(lager_du_pdata),
- 		.dma_mask = DMA_BIT_MASK(32),
- 	};
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0148-ARM-shmobile-Configure-r8a7791-PFC-on-Koelsch-via-DT.patch b/patches.renesas/0148-ARM-shmobile-Configure-r8a7791-PFC-on-Koelsch-via-DT.patch
deleted file mode 100644
index 08689cd454db8..0000000000000
--- a/patches.renesas/0148-ARM-shmobile-Configure-r8a7791-PFC-on-Koelsch-via-DT.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-From e72b1453db74dba6c8285ac210940cfe44f81dc9 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Wed, 20 Nov 2013 16:36:59 +0900
-Subject: ARM: shmobile: Configure r8a7791 PFC on Koelsch via DTS
-
-Configure the "D" set of data signals for SCIF0 and SCIF1
-on the Koelsch board to setup pinctrl serial console bits.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit b91a89cf8d9880d1d82c7f9f4c1a448bb680dc2c)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7791-koelsch-reference.dts | 15 +++++++++++++++
- 1 file changed, 15 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a7791-koelsch-reference.dts b/arch/arm/boot/dts/r8a7791-koelsch-reference.dts
-index 1a0f082b21df..8e7e917d66b6 100644
---- a/arch/arm/boot/dts/r8a7791-koelsch-reference.dts
-+++ b/arch/arm/boot/dts/r8a7791-koelsch-reference.dts
-@@ -30,3 +30,18 @@
- 		#size-cells = <1>;
- 	};
- };
-+
-+&pfc {
-+	pinctrl-0 = <&scif0_pins &scif1_pins>;
-+	pinctrl-names = "default";
-+
-+	scif0_pins: serial0 {
-+		renesas,groups = "scif0_data_d";
-+		renesas,function = "scif0";
-+	};
-+
-+	scif1_pins: serial1 {
-+		renesas,groups = "scif1_data_d";
-+		renesas,function = "scif1";
-+	};
-+};
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0148-ARM-shmobile-armadillo800eva-Replace-GPIO_PORTx-with.patch b/patches.renesas/0148-ARM-shmobile-armadillo800eva-Replace-GPIO_PORTx-with.patch
deleted file mode 100644
index e34a36ecd41bf..0000000000000
--- a/patches.renesas/0148-ARM-shmobile-armadillo800eva-Replace-GPIO_PORTx-with.patch
+++ /dev/null
@@ -1,79 +0,0 @@
-From bb8cb923760b515f0420c8d10104f0506ee7e30f Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 23 Apr 2013 00:32:52 +0200
-Subject: ARM: shmobile: armadillo800eva: Replace GPIO_PORTx with GPIO port
- numbers
-
-The PFC GPIO API implementation moved to using port numbers. Replace all
-GPIO_PORTx enum usage with the corresponding port number. The GPIO_PORTx
-enum values are identical to the port number on this platform.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit f5c02edc51515ea0bcb461030d0a13f7af41e979)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-armadillo800eva.c | 12 ++++++------
- 1 file changed, 6 insertions(+), 6 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c
-index 8ec69612..aafa99b1 100644
---- a/arch/arm/mach-shmobile/board-armadillo800eva.c
-+++ b/arch/arm/mach-shmobile/board-armadillo800eva.c
-@@ -584,7 +584,7 @@ static struct regulator_init_data vcc_sdhi0_init_data = {
- static struct fixed_voltage_config vcc_sdhi0_info = {
- 	.supply_name = "SDHI0 Vcc",
- 	.microvolts = 3300000,
--	.gpio = GPIO_PORT75,
-+	.gpio = 75,
- 	.enable_high = 1,
- 	.init_data = &vcc_sdhi0_init_data,
- };
-@@ -615,7 +615,7 @@ static struct regulator_init_data vccq_sdhi0_init_data = {
- };
- 
- static struct gpio vccq_sdhi0_gpios[] = {
--	{GPIO_PORT17, GPIOF_OUT_INIT_LOW, "vccq-sdhi0" },
-+	{17, GPIOF_OUT_INIT_LOW, "vccq-sdhi0" },
- };
- 
- static struct gpio_regulator_state vccq_sdhi0_states[] = {
-@@ -626,7 +626,7 @@ static struct gpio_regulator_state vccq_sdhi0_states[] = {
- static struct gpio_regulator_config vccq_sdhi0_info = {
- 	.supply_name = "vqmmc",
- 
--	.enable_gpio = GPIO_PORT74,
-+	.enable_gpio = 74,
- 	.enable_high = 1,
- 	.enabled_at_boot = 0,
- 
-@@ -664,7 +664,7 @@ static struct regulator_init_data vcc_sdhi1_init_data = {
- static struct fixed_voltage_config vcc_sdhi1_info = {
- 	.supply_name = "SDHI1 Vcc",
- 	.microvolts = 3300000,
--	.gpio = GPIO_PORT16,
-+	.gpio = 16,
- 	.enable_high = 1,
- 	.init_data = &vcc_sdhi1_init_data,
- };
-@@ -693,7 +693,7 @@ static struct sh_mobile_sdhi_info sdhi0_info = {
- 	.tmio_caps	= MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
- 			  MMC_CAP_POWER_OFF_CARD,
- 	.tmio_flags	= TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_USE_GPIO_CD,
--	.cd_gpio	= GPIO_PORT167,
-+	.cd_gpio	= 167,
- };
- 
- static struct resource sdhi0_resources[] = {
-@@ -736,7 +736,7 @@ static struct sh_mobile_sdhi_info sdhi1_info = {
- 			  MMC_CAP_POWER_OFF_CARD,
- 	.tmio_flags	= TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_USE_GPIO_CD,
- 	/* Port72 cannot generate IRQs, will be used in polling mode. */
--	.cd_gpio	= GPIO_PORT72,
-+	.cd_gpio	= 72,
- };
- 
- static struct resource sdhi1_resources[] = {
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0148-ARM-shmobile-bockw-enable-global-use-of-FPGA.patch b/patches.renesas/0148-ARM-shmobile-bockw-enable-global-use-of-FPGA.patch
deleted file mode 100644
index 821eeb50c2871..0000000000000
--- a/patches.renesas/0148-ARM-shmobile-bockw-enable-global-use-of-FPGA.patch
+++ /dev/null
@@ -1,67 +0,0 @@
-From 35d5534ba78a272751c72b673e32e575c4a6b04e Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Mon, 26 Aug 2013 01:52:23 -0700
-Subject: ARM: shmobile: bockw: enable global use of FPGA
-
-This patch enables global use of FPGA,
-since it will be used from many devices.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 71d7472f63385f4f6fb7c8548450b2e4665dc542)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-bockw.c | 15 ++++++++-------
- 1 file changed, 8 insertions(+), 7 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-bockw.c b/arch/arm/mach-shmobile/board-bockw.c
-index f2bf61bf2521..97e1f5e9e62f 100644
---- a/arch/arm/mach-shmobile/board-bockw.c
-+++ b/arch/arm/mach-shmobile/board-bockw.c
-@@ -38,6 +38,10 @@
- #include <mach/r8a7778.h>
- #include <asm/mach/arch.h>
- 
-+#define FPGA	0x18200000
-+#define IRQ0MR	0x30
-+static void __iomem *fpga;
-+
- /*
-  *	CN9(Upper side) SCIF/RCAN selection
-  *
-@@ -250,8 +254,6 @@ static const struct pinctrl_map bockw_pinctrl_map[] = {
- 				  "vin1_data8", "vin1"),
- };
- 
--#define FPGA	0x18200000
--#define IRQ0MR	0x30
- #define PFC	0xfffc0000
- #define PUPR4	0x110
- static void __init bockw_init(void)
-@@ -301,8 +303,8 @@ static void __init bockw_init(void)
- 
- 
- 	/* for SMSC */
--	base = ioremap_nocache(FPGA, SZ_1M);
--	if (base) {
-+	fpga = ioremap_nocache(FPGA, SZ_1M);
-+	if (fpga) {
- 		/*
- 		 * CAUTION
- 		 *
-@@ -310,10 +312,9 @@ static void __init bockw_init(void)
- 		 * it should be cared in the future
- 		 * Now, it is assuming IRQ0 was used only from SMSC.
- 		 */
--		u16 val = ioread16(base + IRQ0MR);
-+		u16 val = ioread16(fpga + IRQ0MR);
- 		val &= ~(1 << 4); /* enable SMSC911x */
--		iowrite16(val, base + IRQ0MR);
--		iounmap(base);
-+		iowrite16(val, fpga + IRQ0MR);
- 
- 		regulator_register_fixed(0, dummy_supplies,
- 					 ARRAY_SIZE(dummy_supplies));
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0149-ARM-shmobile-Add-r8a7790-thermal-device-node-to-DTS.patch b/patches.renesas/0149-ARM-shmobile-Add-r8a7790-thermal-device-node-to-DTS.patch
deleted file mode 100644
index 32e5d4a670584..0000000000000
--- a/patches.renesas/0149-ARM-shmobile-Add-r8a7790-thermal-device-node-to-DTS.patch
+++ /dev/null
@@ -1,38 +0,0 @@
-From 94f9de17b7c568015437f8fc658cad5ae94a7e27 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Wed, 20 Nov 2013 16:59:30 +0900
-Subject: ARM: shmobile: Add r8a7790 thermal device node to DTS
-
-Hook up the r8a7790 thermal sensor to the DTS.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 03e2f56b8f68594ccae4b219a2693c938a04c51e)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7790.dtsi | 7 +++++++
- 1 file changed, 7 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
-index 9ce4d47d1ad3..2245d91fb6da 100644
---- a/arch/arm/boot/dts/r8a7790.dtsi
-+++ b/arch/arm/boot/dts/r8a7790.dtsi
-@@ -162,6 +162,13 @@
- 		interrupt-controller;
- 	};
- 
-+	thermal@e61f0000 {
-+		compatible = "renesas,thermal-r8a7790", "renesas,rcar-thermal";
-+		reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>;
-+	};
-+
- 	timer {
- 		compatible = "arm,armv7-timer";
- 		interrupts = <1 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0149-ARM-shmobile-bockw-add-R-Car-sound-support-PIO.patch b/patches.renesas/0149-ARM-shmobile-bockw-add-R-Car-sound-support-PIO.patch
deleted file mode 100644
index fd4eb1b2f9a77..0000000000000
--- a/patches.renesas/0149-ARM-shmobile-bockw-add-R-Car-sound-support-PIO.patch
+++ /dev/null
@@ -1,382 +0,0 @@
-From 12f0bdd346f66b3ac3aebe5a6b8e6c8bafb44835 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Mon, 26 Aug 2013 01:52:35 -0700
-Subject: ARM: shmobile: bockw: add R-Car sound support (PIO)
-
-This patch enables R-Car sound,
-AK4643 (CN19) and AK4554 (CN20/CN21) codec chip
-on Bock-W.
-
-But, it supports PIO transfer only at this point.
-User can check sound settings (Dip-switch/PFC etc)
-via this patch, but will get under/over flow error
-when playback/capture.
-Because PIO transfer via SSI will be interrupted
-"sampling rate" times per 1 second.
-
-DMA transfer will be supported when HPB-DMAC was
-enabled on r8a7778.
-
-You will notice strange ALSA sound card HW
-numbering on Bock-W board.
-This came from AK4554 strange format on playback/capture.
-The format on playback/capture is same on "normal" codec chip,
-but AK4554 was different.
-Because of that, AK4554 playback/capture are
-registered as a different sound card.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-[horms+renesas@verge.net.au: squashed cleanup of SND_SOC_xxx in
- Kconfig by Kuninori Morimoto]
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-(cherry picked from commit 688e6a6df880ee70e76f6ec1991dd0f186c25329)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-	arch/arm/mach-shmobile/board-bockw.c
----
- arch/arm/mach-shmobile/Kconfig       |   2 +
- arch/arm/mach-shmobile/board-bockw.c | 274 ++++++++++++++++++++++++++++++++++-
- 2 files changed, 275 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
-index b45240512ce0..d01e4276b889 100644
---- a/arch/arm/mach-shmobile/Kconfig
-+++ b/arch/arm/mach-shmobile/Kconfig
-@@ -168,6 +168,8 @@ config MACH_BOCKW
- 	select RENESAS_INTC_IRQPIN
- 	select REGULATOR_FIXED_VOLTAGE if REGULATOR
- 	select USE_OF
-+	select SND_SOC_AK4554 if SND_SIMPLE_CARD
-+	select SND_SOC_AK4642 if SND_SIMPLE_CARD
- 
- config MACH_BOCKW_REFERENCE
- 	bool "BOCK-W  - Reference Device Tree Implementation"
-diff --git a/arch/arm/mach-shmobile/board-bockw.c b/arch/arm/mach-shmobile/board-bockw.c
-index 97e1f5e9e62f..dffaf6890041 100644
---- a/arch/arm/mach-shmobile/board-bockw.c
-+++ b/arch/arm/mach-shmobile/board-bockw.c
-@@ -37,9 +37,12 @@
- #include <mach/irqs.h>
- #include <mach/r8a7778.h>
- #include <asm/mach/arch.h>
-+#include <sound/rcar_snd.h>
-+#include <sound/simple_card.h>
- 
- #define FPGA	0x18200000
- #define IRQ0MR	0x30
-+#define COMCTLR	0x101c
- static void __iomem *fpga;
- 
- /*
-@@ -67,6 +70,35 @@ static void __iomem *fpga;
-  * SW19	(MMC)	1 pin
-  */
- 
-+/*
-+ *	SSI settings
-+ *
-+ * SW45: 1-4 side	(SSI5 out, ROUT/LOUT CN19 Mid)
-+ * SW46: 1101		(SSI6 Recorde)
-+ * SW47: 1110		(SSI5 Playback)
-+ * SW48: 11		(Recorde power)
-+ * SW49: 1		(SSI slave mode)
-+ * SW50: 1111		(SSI7, SSI8)
-+ * SW51: 1111		(SSI3, SSI4)
-+ * SW54: 1pin		(ak4554 FPGA control)
-+ * SW55: 1		(CLKB is 24.5760MHz)
-+ * SW60: 1pin		(ak4554 FPGA control)
-+ * SW61: 3pin		(use X11 clock)
-+ * SW78: 3-6		(ak4642 connects I2C0)
-+ *
-+ * You can use sound as
-+ *
-+ * hw0: CN19: SSI56-AK4643
-+ * hw1: CN21: SSI3-AK4554(playback)
-+ * hw2: CN21: SSI4-AK4554(capture)
-+ * hw3: CN20: SSI7-AK4554(playback)
-+ * hw4: CN20: SSI8-AK4554(capture)
-+ *
-+ * this command is required when playback on hw0.
-+ *
-+ * # amixer set "LINEOUT Mixer DACL" on
-+ */
-+
- /* Dummy supplies, where voltage doesn't matter */
- static struct regulator_consumer_supply dummy_supplies[] = {
- 	REGULATOR_SUPPLY("vddvario", "smsc911x"),
-@@ -128,7 +160,9 @@ static struct sh_eth_plat_data ether_platform_data __initdata = {
- static struct i2c_board_info i2c0_devices[] = {
- 	{
- 		I2C_BOARD_INFO("rx8581", 0x51),
--	},
-+	}, {
-+		I2C_BOARD_INFO("ak4643", 0x12),
-+	}
- };
- 
- /* HSPI*/
-@@ -211,7 +245,213 @@ static struct platform_device_info vin##idx##_info __initdata = {	\
- R8A7778_VIN(0);
- R8A7778_VIN(1);
- 
-+/* Sound */
-+static struct resource rsnd_resources[] __initdata = {
-+	[RSND_GEN1_SRU] = DEFINE_RES_MEM(0xffd90000, 0x1000),
-+	[RSND_GEN1_SSI] = DEFINE_RES_MEM(0xffd91000, 0x1240),
-+	[RSND_GEN1_ADG] = DEFINE_RES_MEM(0xfffe0000, 0x24),
-+};
-+
-+static struct rsnd_ssi_platform_info rsnd_ssi[] = {
-+	RSND_SSI_UNUSED, /* SSI 0 */
-+	RSND_SSI_UNUSED, /* SSI 1 */
-+	RSND_SSI_UNUSED, /* SSI 2 */
-+	RSND_SSI_SET(1, 0, gic_iid(0x85), RSND_SSI_PLAY),
-+	RSND_SSI_SET(2, 0, gic_iid(0x85), RSND_SSI_CLK_PIN_SHARE | RSND_SSI_CLK_FROM_ADG),
-+	RSND_SSI_SET(0, 0, gic_iid(0x86), RSND_SSI_PLAY),
-+	RSND_SSI_SET(0, 0, gic_iid(0x86), 0),
-+	RSND_SSI_SET(3, 0, gic_iid(0x86), RSND_SSI_PLAY),
-+	RSND_SSI_SET(4, 0, gic_iid(0x86), RSND_SSI_CLK_PIN_SHARE | RSND_SSI_CLK_FROM_ADG),
-+};
-+
-+static struct rsnd_scu_platform_info rsnd_scu[9] = {
-+	/* no member at this point */
-+};
-+
-+enum {
-+	AK4554_34 = 0,
-+	AK4643_56,
-+	AK4554_78,
-+	SOUND_MAX,
-+};
-+
-+static int rsnd_codec_power(int id, int enable)
-+{
-+	static int sound_user[SOUND_MAX] = {0, 0, 0};
-+	int *usr = NULL;
-+	u32 bit;
-+
-+	switch (id) {
-+	case 3:
-+	case 4:
-+		usr = sound_user + AK4554_34;
-+		bit = (1 << 10);
-+		break;
-+	case 5:
-+	case 6:
-+		usr = sound_user + AK4643_56;
-+		bit = (1 << 6);
-+		break;
-+	case 7:
-+	case 8:
-+		usr = sound_user + AK4554_78;
-+		bit = (1 << 7);
-+		break;
-+	}
-+
-+	if (!usr)
-+		return -EIO;
-+
-+	if (enable) {
-+		if (*usr == 0) {
-+			u32 val = ioread16(fpga + COMCTLR);
-+			val &= ~bit;
-+			iowrite16(val, fpga + COMCTLR);
-+		}
-+
-+		(*usr)++;
-+	} else {
-+		if (*usr == 0)
-+			return 0;
-+
-+		(*usr)--;
-+
-+		if (*usr == 0) {
-+			u32 val = ioread16(fpga + COMCTLR);
-+			val |= bit;
-+			iowrite16(val, fpga + COMCTLR);
-+		}
-+	}
-+
-+	return 0;
-+}
-+
-+static int rsnd_start(int id)
-+{
-+	return rsnd_codec_power(id, 1);
-+}
-+
-+static int rsnd_stop(int id)
-+{
-+	return rsnd_codec_power(id, 0);
-+}
-+
-+static struct rcar_snd_info rsnd_info = {
-+	.flags		= RSND_GEN1,
-+	.ssi_info	= rsnd_ssi,
-+	.ssi_info_nr	= ARRAY_SIZE(rsnd_ssi),
-+	.scu_info	= rsnd_scu,
-+	.scu_info_nr	= ARRAY_SIZE(rsnd_scu),
-+	.start		= rsnd_start,
-+	.stop		= rsnd_stop,
-+};
-+
-+static struct asoc_simple_card_info rsnd_card_info[] = {
-+	/* SSI5, SSI6 */
-+	{
-+		.name		= "AK4643",
-+		.card		= "SSI56-AK4643",
-+		.codec		= "ak4642-codec.0-0012",
-+		.platform	= "rcar_sound",
-+		.daifmt		= SND_SOC_DAIFMT_LEFT_J,
-+		.cpu_dai = {
-+			.name	= "rsnd-dai.0",
-+			.fmt	= SND_SOC_DAIFMT_CBS_CFS,
-+		},
-+		.codec_dai = {
-+			.name	= "ak4642-hifi",
-+			.fmt	= SND_SOC_DAIFMT_CBM_CFM,
-+			.sysclk	= 11289600,
-+		},
-+	},
-+	/* SSI3 */
-+	{
-+		.name		= "AK4554",
-+		.card		= "SSI3-AK4554(playback)",
-+		.codec		= "ak4554-adc-dac.0",
-+		.platform	= "rcar_sound",
-+		.cpu_dai = {
-+			.name	= "rsnd-dai.1",
-+			.fmt	= SND_SOC_DAIFMT_CBM_CFM |
-+				  SND_SOC_DAIFMT_RIGHT_J,
-+		},
-+		.codec_dai = {
-+			.name	= "ak4554-hifi",
-+		},
-+	},
-+	/* SSI4 */
-+	{
-+		.name		= "AK4554",
-+		.card		= "SSI4-AK4554(capture)",
-+		.codec		= "ak4554-adc-dac.0",
-+		.platform	= "rcar_sound",
-+		.cpu_dai = {
-+			.name	= "rsnd-dai.2",
-+			.fmt	= SND_SOC_DAIFMT_CBM_CFM |
-+				  SND_SOC_DAIFMT_LEFT_J,
-+		},
-+		.codec_dai = {
-+			.name	= "ak4554-hifi",
-+		},
-+	},
-+	/* SSI7 */
-+	{
-+		.name		= "AK4554",
-+		.card		= "SSI7-AK4554(playback)",
-+		.codec		= "ak4554-adc-dac.1",
-+		.platform	= "rcar_sound",
-+		.cpu_dai = {
-+			.name	= "rsnd-dai.3",
-+			.fmt	= SND_SOC_DAIFMT_CBM_CFM |
-+				  SND_SOC_DAIFMT_RIGHT_J,
-+		},
-+		.codec_dai = {
-+			.name	= "ak4554-hifi",
-+		},
-+	},
-+	/* SSI8 */
-+	{
-+		.name		= "AK4554",
-+		.card		= "SSI8-AK4554(capture)",
-+		.codec		= "ak4554-adc-dac.1",
-+		.platform	= "rcar_sound",
-+		.cpu_dai = {
-+			.name	= "rsnd-dai.4",
-+			.fmt	= SND_SOC_DAIFMT_CBM_CFM |
-+				  SND_SOC_DAIFMT_LEFT_J,
-+		},
-+		.codec_dai = {
-+			.name	= "ak4554-hifi",
-+		},
-+	}
-+};
-+
- static const struct pinctrl_map bockw_pinctrl_map[] = {
-+	/* AUDIO */
-+	PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
-+				  "audio_clk_a", "audio_clk"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
-+				  "audio_clk_b", "audio_clk"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
-+				  "ssi34_ctrl", "ssi"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
-+				  "ssi3_data", "ssi"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
-+				  "ssi4_data", "ssi"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
-+				  "ssi5_ctrl", "ssi"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
-+				  "ssi5_data", "ssi"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
-+				  "ssi6_ctrl", "ssi"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
-+				  "ssi6_data", "ssi"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
-+				  "ssi78_ctrl", "ssi"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
-+				  "ssi7_data", "ssi"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
-+				  "ssi8_data", "ssi"),
- 	/* Ether */
- 	PIN_MAP_MUX_GROUP_DEFAULT("r8a777x-ether", "pfc-r8a7778",
- 				  "ether_rmii", "ether"),
-@@ -259,6 +499,8 @@ static const struct pinctrl_map bockw_pinctrl_map[] = {
- static void __init bockw_init(void)
- {
- 	void __iomem *base;
-+	struct clk *clk;
-+	int i;
- 
- 	r8a7778_clock_init();
- 	r8a7778_init_irq_extpin(1);
-@@ -341,6 +583,36 @@ static void __init bockw_init(void)
- 			sdhi0_resources, ARRAY_SIZE(sdhi0_resources),
- 			&sdhi0_info, sizeof(struct sh_mobile_sdhi_info));
- 	}
-+
-+	/* for Audio */
-+	clk = clk_get(NULL, "audio_clk_b");
-+	clk_set_rate(clk, 24576000);
-+	clk_put(clk);
-+	rsnd_codec_power(5, 1); /* enable ak4642 */
-+
-+	platform_device_register_simple(
-+		"ak4554-adc-dac", 0, NULL, 0);
-+
-+	platform_device_register_simple(
-+		"ak4554-adc-dac", 1, NULL, 0);
-+
-+	platform_device_register_resndata(
-+		&platform_bus, "rcar_sound", -1,
-+		rsnd_resources, ARRAY_SIZE(rsnd_resources),
-+		&rsnd_info, sizeof(rsnd_info));
-+
-+	for (i = 0; i < ARRAY_SIZE(rsnd_card_info); i++) {
-+		struct platform_device_info cardinfo = {
-+			.parent         = &platform_bus,
-+			.name           = "asoc-simple-card",
-+			.id             = i,
-+			.data           = &rsnd_card_info[i],
-+			.size_data      = sizeof(struct asoc_simple_card_info),
-+			.dma_mask       = ~0,
-+		};
-+
-+		platform_device_register_full(&cardinfo);
-+	}
- }
- 
- static const char *bockw_boards_compat_dt[] __initdata = {
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0149-ARM-shmobile-bonito-Remove-empty-core-devices-array.patch b/patches.renesas/0149-ARM-shmobile-bonito-Remove-empty-core-devices-array.patch
deleted file mode 100644
index 404be6dc119e5..0000000000000
--- a/patches.renesas/0149-ARM-shmobile-bonito-Remove-empty-core-devices-array.patch
+++ /dev/null
@@ -1,46 +0,0 @@
-From e2e7f309ba49b69a1cbfec76b2f5a11cd47c73ea Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 18 Apr 2013 01:27:32 +0200
-Subject: ARM: shmobile: bonito: Remove empty core devices array
-
-The core devices array is empty, passing it to platform_add_devices() is
-a no-op. Remove it.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 6c887d2c0918f37fd5fb2493c605bd73cb25e326)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-bonito.c | 9 ---------
- 1 file changed, 9 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-bonito.c b/arch/arm/mach-shmobile/board-bonito.c
-index 70d992c5..b111c135 100644
---- a/arch/arm/mach-shmobile/board-bonito.c
-+++ b/arch/arm/mach-shmobile/board-bonito.c
-@@ -331,12 +331,6 @@ static struct platform_device smsc_device = {
- };
- 
- /*
-- * core board devices
-- */
--static struct platform_device *bonito_core_devices[] __initdata = {
--};
--
--/*
-  * base board devices
-  */
- static struct platform_device *bonito_base_devices[] __initdata = {
-@@ -397,9 +391,6 @@ static void __init bonito_init(void)
- 
- 	r8a7740_add_standard_devices();
- 
--	platform_add_devices(bonito_core_devices,
--			     ARRAY_SIZE(bonito_core_devices));
--
- 	/*
- 	 * base board settings
- 	 */
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0150-ARM-shmobile-Add-r8a7791-thermal-device-node-to-DTS.patch b/patches.renesas/0150-ARM-shmobile-Add-r8a7791-thermal-device-node-to-DTS.patch
deleted file mode 100644
index a4d4a5b375d21..0000000000000
--- a/patches.renesas/0150-ARM-shmobile-Add-r8a7791-thermal-device-node-to-DTS.patch
+++ /dev/null
@@ -1,38 +0,0 @@
-From e73974feab1337f0cb95a3ace70537f41670d2fe Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Wed, 20 Nov 2013 16:59:48 +0900
-Subject: ARM: shmobile: Add r8a7791 thermal device node to DTS
-
-Hook up the r8a7791 thermal sensor to the DTS.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit d103f4d3152b187b22fd6010370fe1d16419a334)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7791.dtsi | 7 +++++++
- 1 file changed, 7 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
-index d85254ca20b8..e36b3652b7c2 100644
---- a/arch/arm/boot/dts/r8a7791.dtsi
-+++ b/arch/arm/boot/dts/r8a7791.dtsi
-@@ -145,6 +145,13 @@
- 		interrupt-controller;
- 	};
- 
-+	thermal@e61f0000 {
-+		compatible = "renesas,thermal-r8a7791", "renesas,rcar-thermal";
-+		reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>;
-+	};
-+
- 	timer {
- 		compatible = "arm,armv7-timer";
- 		interrupts = <1 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0150-ARM-shmobile-Koelsch-support.patch b/patches.renesas/0150-ARM-shmobile-Koelsch-support.patch
deleted file mode 100644
index 0c648f30afc60..0000000000000
--- a/patches.renesas/0150-ARM-shmobile-Koelsch-support.patch
+++ /dev/null
@@ -1,171 +0,0 @@
-From 5965ca866cfdd485558ebd587a73ee92320dbf89 Mon Sep 17 00:00:00 2001
-From: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>
-Date: Wed, 4 Sep 2013 12:46:49 +0900
-Subject: ARM: shmobile: Koelsch support
-
-Koelsch base board support making use of 2 GiB of memory,
-the r8a7791 SoC with the SCIF0 serial port and CA15 with
-CMT timer.
-
-Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>
-Signed-off-by: Ryo Kataoka <ryo.kataoka.wt@renesas.com>
-[damm@opensource.se: Forward ported to upstream, dropped not-yet-ready SMP/PFC]
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-(cherry picked from commit 1f52c65975ba16cdba1830ba216776111197a3ee)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/Makefile             |  1 +
- arch/arm/boot/dts/r8a7791-koelsch.dts  | 32 +++++++++++++++++++++++++
- arch/arm/mach-shmobile/Kconfig         |  5 ++++
- arch/arm/mach-shmobile/Makefile        |  1 +
- arch/arm/mach-shmobile/Makefile.boot   |  1 +
- arch/arm/mach-shmobile/board-koelsch.c | 44 ++++++++++++++++++++++++++++++++++
- 6 files changed, 84 insertions(+)
- create mode 100644 arch/arm/boot/dts/r8a7791-koelsch.dts
- create mode 100644 arch/arm/mach-shmobile/board-koelsch.c
-
-diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
-index fa0ae75fd32a..037cf904677b 100644
---- a/arch/arm/boot/dts/Makefile
-+++ b/arch/arm/boot/dts/Makefile
-@@ -167,6 +167,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \
- 	r8a7740-armadillo800eva-reference.dtb \
- 	r8a7779-marzen.dtb \
- 	r8a7779-marzen-reference.dtb \
-+	r8a7791-koelsch.dtb \
- 	r8a7790-lager.dtb \
- 	r8a7790-lager-reference.dtb \
- 	sh73a0-kzm9g.dtb \
-diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts
-new file mode 100644
-index 000000000000..1ce5250ec278
---- /dev/null
-+++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
-@@ -0,0 +1,32 @@
-+/*
-+ * Device Tree Source for the Koelsch board
-+ *
-+ * Copyright (C) 2013 Renesas Electronics Corporation
-+ * Copyright (C) 2013 Renesas Solutions Corp.
-+ *
-+ * This file is licensed under the terms of the GNU General Public License
-+ * version 2.  This program is licensed "as is" without any warranty of any
-+ * kind, whether express or implied.
-+ */
-+
-+/dts-v1/;
-+/include/ "r8a7791.dtsi"
-+
-+/ {
-+	model = "Koelsch";
-+	compatible = "renesas,koelsch", "renesas,r8a7791";
-+
-+	chosen {
-+		bootargs = "console=ttySC6,115200 ignore_loglevel rw root=/dev/nfs ip=dhcp";
-+	};
-+
-+	memory@40000000 {
-+		device_type = "memory";
-+		reg = <0 0x40000000 0 0x80000000>;
-+	};
-+
-+	lbsc {
-+		#address-cells = <1>;
-+		#size-cells = <1>;
-+	};
-+};
-diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
-index d01e4276b889..eda285794961 100644
---- a/arch/arm/mach-shmobile/Kconfig
-+++ b/arch/arm/mach-shmobile/Kconfig
-@@ -221,6 +221,11 @@ config MACH_LAGER_REFERENCE
- 
- 	   This is intended to aid developers
- 
-+config MACH_KOELSCH
-+	bool "Koelsch board"
-+	depends on ARCH_R8A7791
-+	select USE_OF
-+
- config MACH_KZM9D
- 	bool "KZM9D board"
- 	depends on ARCH_EMEV2
-diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
-index 228193cc9a38..e552e84b1fae 100644
---- a/arch/arm/mach-shmobile/Makefile
-+++ b/arch/arm/mach-shmobile/Makefile
-@@ -61,6 +61,7 @@ obj-$(CONFIG_MACH_LAGER)	+= board-lager.o
- obj-$(CONFIG_MACH_LAGER_REFERENCE)	+= board-lager-reference.o
- obj-$(CONFIG_MACH_ARMADILLO800EVA)	+= board-armadillo800eva.o
- obj-$(CONFIG_MACH_ARMADILLO800EVA_REFERENCE)	+= board-armadillo800eva-reference.o
-+obj-$(CONFIG_MACH_KOELSCH)	+= board-koelsch.o
- obj-$(CONFIG_MACH_KZM9D)	+= board-kzm9d.o
- obj-$(CONFIG_MACH_KZM9D_REFERENCE)	+= board-kzm9d-reference.o
- obj-$(CONFIG_MACH_KZM9G)	+= board-kzm9g.o
-diff --git a/arch/arm/mach-shmobile/Makefile.boot b/arch/arm/mach-shmobile/Makefile.boot
-index 6a504fe7d86c..60e29e6c1126 100644
---- a/arch/arm/mach-shmobile/Makefile.boot
-+++ b/arch/arm/mach-shmobile/Makefile.boot
-@@ -6,6 +6,7 @@ loadaddr-$(CONFIG_MACH_ARMADILLO800EVA) += 0x40008000
- loadaddr-$(CONFIG_MACH_ARMADILLO800EVA_REFERENCE) += 0x40008000
- loadaddr-$(CONFIG_MACH_BOCKW) += 0x60008000
- loadaddr-$(CONFIG_MACH_BOCKW_REFERENCE) += 0x60008000
-+loadaddr-$(CONFIG_MACH_KOELSCH) += 0x40008000
- loadaddr-$(CONFIG_MACH_KZM9D) += 0x40008000
- loadaddr-$(CONFIG_MACH_KZM9D_REFERENCE) += 0x40008000
- loadaddr-$(CONFIG_MACH_KZM9G) += 0x41008000
-diff --git a/arch/arm/mach-shmobile/board-koelsch.c b/arch/arm/mach-shmobile/board-koelsch.c
-new file mode 100644
-index 000000000000..cc2d5e82b59a
---- /dev/null
-+++ b/arch/arm/mach-shmobile/board-koelsch.c
-@@ -0,0 +1,44 @@
-+/*
-+ * Koelsch board support
-+ *
-+ * Copyright (C) 2013  Renesas Electronics Corporation
-+ * Copyright (C) 2013  Renesas Solutions Corp.
-+ * Copyright (C) 2013  Magnus Damm
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; version 2 of the License.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/platform_device.h>
-+#include <mach/common.h>
-+#include <mach/r8a7791.h>
-+#include <asm/mach-types.h>
-+#include <asm/mach/arch.h>
-+
-+static void __init koelsch_add_standard_devices(void)
-+{
-+	r8a7791_clock_init();
-+	r8a7791_add_dt_devices();
-+}
-+
-+static const char * const koelsch_boards_compat_dt[] __initconst = {
-+	"renesas,koelsch",
-+	NULL,
-+};
-+
-+DT_MACHINE_START(KOELSCH_DT, "koelsch")
-+	.init_early	= r8a7791_init_early,
-+	.init_machine	= koelsch_add_standard_devices,
-+	.dt_compat	= koelsch_boards_compat_dt,
-+MACHINE_END
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0150-ARM-shmobile-bonito-Register-pinctrl-mapping-for-SCI.patch b/patches.renesas/0150-ARM-shmobile-bonito-Register-pinctrl-mapping-for-SCI.patch
deleted file mode 100644
index 6f55813d0cc6f..0000000000000
--- a/patches.renesas/0150-ARM-shmobile-bonito-Register-pinctrl-mapping-for-SCI.patch
+++ /dev/null
@@ -1,46 +0,0 @@
-From 7533a4ba08bfeacc798173253bd3bf8172b1951d Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 18 Apr 2013 01:18:41 +0200
-Subject: ARM: shmobile: bonito: Register pinctrl mapping for SCIF
-
-Replace the GPIO-based SCIF pinmux configuration by a pinctrl mapping.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 7cded0c90badbf396345e46459a6cbca14fc7ae3)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-bonito.c | 10 ++++++++--
- 1 file changed, 8 insertions(+), 2 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-bonito.c b/arch/arm/mach-shmobile/board-bonito.c
-index b111c135..b6620662 100644
---- a/arch/arm/mach-shmobile/board-bonito.c
-+++ b/arch/arm/mach-shmobile/board-bonito.c
-@@ -369,6 +369,12 @@ static void __init bonito_map_io(void)
- #define VCCQ1CR		IOMEM(0xE6058140)
- #define VCCQ1LCDCR	IOMEM(0xE6058186)
- 
-+static const struct pinctrl_map scifa5_pinctrl_map[] = {
-+	/* SCIFA5 */
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.5", "pfc-r8a7740",
-+				  "scifa5_data_2", "scifa5"),
-+};
-+
- static void __init bonito_init(void)
- {
- 	u16 val;
-@@ -423,8 +429,8 @@ static void __init bonito_init(void)
- 		if (BIT_OFF(bsw2, 1) &&	/* S38.3 = ON */
- 		    BIT_OFF(bsw3, 9) &&	/* S39.6 = ON */
- 		    BIT_OFF(bsw4, 4)) {	/* S43.1 = ON */
--			gpio_request(GPIO_FN_SCIFA5_TXD_PORT91,	NULL);
--			gpio_request(GPIO_FN_SCIFA5_RXD_PORT92,	NULL);
-+			pinctrl_register_mappings(scifa5_pinctrl_map,
-+						  ARRAY_SIZE(scifa5_pinctrl_map));
- 		}
- 
- 		/*
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0151-ARM-shmobile-Use-r8a7790-suffix-for-MMCIF-compat-str.patch b/patches.renesas/0151-ARM-shmobile-Use-r8a7790-suffix-for-MMCIF-compat-str.patch
deleted file mode 100644
index 32dddc6864949..0000000000000
--- a/patches.renesas/0151-ARM-shmobile-Use-r8a7790-suffix-for-MMCIF-compat-str.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-From a93972349a90fe8303e84ab456aa46a2ea195786 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Wed, 20 Nov 2013 09:05:53 +0900
-Subject: ARM: shmobile: Use r8a7790 suffix for MMCIF compat string
-
-Add "renesas,mmcif-r8a7790" to the compatible string for MMCIF
-in case of r8a7790. This makes the MMCIF follow the same style
-as the other devices and also makes it more future proof.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 063e85607ddf26e5ede36b7454eddc8e87544540)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7790.dtsi | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
-index 2245d91fb6da..cfb0f8b70e53 100644
---- a/arch/arm/boot/dts/r8a7790.dtsi
-+++ b/arch/arm/boot/dts/r8a7790.dtsi
-@@ -230,7 +230,7 @@
- 	};
- 
- 	mmcif0: mmcif@ee200000 {
--		compatible = "renesas,sh-mmcif";
-+		compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif";
- 		reg = <0 0xee200000 0 0x80>;
- 		interrupt-parent = <&gic>;
- 		interrupts = <0 169 IRQ_TYPE_LEVEL_HIGH>;
-@@ -239,7 +239,7 @@
- 	};
- 
- 	mmcif1: mmc@ee220000 {
--		compatible = "renesas,sh-mmcif";
-+		compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif";
- 		reg = <0 0xee220000 0 0x80>;
- 		interrupt-parent = <&gic>;
- 		interrupts = <0 170 IRQ_TYPE_LEVEL_HIGH>;
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0151-ARM-shmobile-bockw-add-USB-Function-support.patch b/patches.renesas/0151-ARM-shmobile-bockw-add-USB-Function-support.patch
deleted file mode 100644
index 534c2f8b455a2..0000000000000
--- a/patches.renesas/0151-ARM-shmobile-bockw-add-USB-Function-support.patch
+++ /dev/null
@@ -1,151 +0,0 @@
-From 25ffe3228079915b2379358f5b1de49e2ef455ce Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Sun, 4 Aug 2013 17:43:37 -0700
-Subject: ARM: shmobile: bockw: add USB Function support
-
-Bock-W USB1 (CN29) can be USB Host/Func by SW98/SW99 settings.
-USB Func will be enabled if CONFIG_USB_RENESAS_USBHS_UDC[_MODULE]
-was selected on this patch
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 81a0d9062d5c93490b215d2440bbd7deb3918707)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-bockw.c | 81 ++++++++++++++++++++++++++++++++++--
- 1 file changed, 78 insertions(+), 3 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-bockw.c b/arch/arm/mach-shmobile/board-bockw.c
-index dffaf6890041..0559f217a5fd 100644
---- a/arch/arm/mach-shmobile/board-bockw.c
-+++ b/arch/arm/mach-shmobile/board-bockw.c
-@@ -32,6 +32,7 @@
- #include <linux/smsc911x.h>
- #include <linux/spi/spi.h>
- #include <linux/spi/flash.h>
-+#include <linux/usb/renesas_usbhs.h>
- #include <media/soc_camera.h>
- #include <mach/common.h>
- #include <mach/irqs.h>
-@@ -99,6 +100,16 @@ static void __iomem *fpga;
-  * # amixer set "LINEOUT Mixer DACL" on
-  */
- 
-+/*
-+ * USB
-+ *
-+ * USB1 (CN29) can be Host/Function
-+ *
-+ *		Host	Func
-+ * SW98		1	2
-+ * SW99		1	3
-+ */
-+
- /* Dummy supplies, where voltage doesn't matter */
- static struct regulator_consumer_supply dummy_supplies[] = {
- 	REGULATOR_SUPPLY("vddvario", "smsc911x"),
-@@ -117,13 +128,71 @@ static struct resource smsc911x_resources[] __initdata = {
- 	DEFINE_RES_IRQ(irq_pin(0)), /* IRQ 0 */
- };
- 
-+#if IS_ENABLED(CONFIG_USB_RENESAS_USBHS_UDC)
-+/*
-+ * When USB1 is Func
-+ */
-+static int usbhsf_get_id(struct platform_device *pdev)
-+{
-+	return USBHS_GADGET;
-+}
-+
-+#define SUSPMODE	0x102
-+static int usbhsf_power_ctrl(struct platform_device *pdev,
-+			     void __iomem *base, int enable)
-+{
-+	enable = !!enable;
-+
-+	r8a7778_usb_phy_power(enable);
-+
-+	iowrite16(enable << 14, base + SUSPMODE);
-+
-+	return 0;
-+}
-+
-+static struct resource usbhsf_resources[] __initdata = {
-+	DEFINE_RES_MEM(0xffe60000, 0x110),
-+	DEFINE_RES_IRQ(gic_iid(0x4f)),
-+};
-+
-+static struct renesas_usbhs_platform_info usbhs_info __initdata = {
-+	.platform_callback = {
-+		.get_id		= usbhsf_get_id,
-+		.power_ctrl	= usbhsf_power_ctrl,
-+	},
-+	.driver_param = {
-+		.buswait_bwait	= 4,
-+	},
-+};
-+
-+#define USB_PHY_SETTING {.port1_func = 1, .ovc_pin[1].active_high = 1,}
-+#define USB1_DEVICE	"renesas_usbhs"
-+#define ADD_USB_FUNC_DEVICE_IF_POSSIBLE()			\
-+	platform_device_register_resndata(			\
-+		&platform_bus, "renesas_usbhs", -1,		\
-+		usbhsf_resources,				\
-+		ARRAY_SIZE(usbhsf_resources),			\
-+		&usbhs_info, sizeof(struct renesas_usbhs_platform_info))
-+
-+#else
-+/*
-+ * When USB1 is Host
-+ */
-+#define USB_PHY_SETTING { }
-+#define USB1_DEVICE	"ehci-platform"
-+#define ADD_USB_FUNC_DEVICE_IF_POSSIBLE()
-+
-+#endif
-+
- /* USB */
- static struct resource usb_phy_resources[] __initdata = {
- 	DEFINE_RES_MEM(0xffe70800, 0x100),
- 	DEFINE_RES_MEM(0xffe76000, 0x100),
- };
- 
--static struct rcar_phy_platform_data usb_phy_platform_data __initdata;
-+static struct rcar_phy_platform_data usb_phy_platform_data __initdata =
-+	USB_PHY_SETTING;
-+
- 
- /* SDHI */
- static struct sh_mobile_sdhi_info sdhi0_info __initdata = {
-@@ -471,7 +540,7 @@ static const struct pinctrl_map bockw_pinctrl_map[] = {
- 	/* USB */
- 	PIN_MAP_MUX_GROUP_DEFAULT("ehci-platform", "pfc-r8a7778",
- 				  "usb0", "usb0"),
--	PIN_MAP_MUX_GROUP_DEFAULT("ehci-platform", "pfc-r8a7778",
-+	PIN_MAP_MUX_GROUP_DEFAULT(USB1_DEVICE, "pfc-r8a7778",
- 				  "usb1", "usb1"),
- 	/* SDHI0 */
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
-@@ -615,6 +684,12 @@ static void __init bockw_init(void)
- 	}
- }
- 
-+static void __init bockw_init_late(void)
-+{
-+	r8a7778_init_late();
-+	ADD_USB_FUNC_DEVICE_IF_POSSIBLE();
-+}
-+
- static const char *bockw_boards_compat_dt[] __initdata = {
- 	"renesas,bockw",
- 	NULL,
-@@ -625,5 +700,5 @@ DT_MACHINE_START(BOCKW_DT, "bockw")
- 	.init_irq	= r8a7778_init_irq_dt,
- 	.init_machine	= bockw_init,
- 	.dt_compat	= bockw_boards_compat_dt,
--	.init_late      = r8a7778_init_late,
-+	.init_late      = bockw_init_late,
- MACHINE_END
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0151-ARM-shmobile-bonito-Register-pinctrl-mapping-for-INT.patch b/patches.renesas/0151-ARM-shmobile-bonito-Register-pinctrl-mapping-for-INT.patch
deleted file mode 100644
index 222aa19e9e623..0000000000000
--- a/patches.renesas/0151-ARM-shmobile-bonito-Register-pinctrl-mapping-for-INT.patch
+++ /dev/null
@@ -1,57 +0,0 @@
-From 9ea265aed1dfc8cacdd4d21c0d29a13c65d8acd1 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 18 Apr 2013 01:18:41 +0200
-Subject: ARM: shmobile: bonito: Register pinctrl mapping for INTC
-
-Replace the GPIO-based INTC pinmux configuration by a pinctrl mapping.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit f569b10f66f1038550b960848c187584a11c9e3a)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-bonito.c | 14 +++++++++++++-
- 1 file changed, 13 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/board-bonito.c b/arch/arm/mach-shmobile/board-bonito.c
-index b6620662..5076f4d5 100644
---- a/arch/arm/mach-shmobile/board-bonito.c
-+++ b/arch/arm/mach-shmobile/board-bonito.c
-@@ -369,6 +369,17 @@ static void __init bonito_map_io(void)
- #define VCCQ1CR		IOMEM(0xE6058140)
- #define VCCQ1LCDCR	IOMEM(0xE6058186)
- 
-+/*
-+ * HACK: The FPGA mappings should be associated with the FPGA device, but we
-+ * don't have one at the moment. Associate them with the PFC device to make
-+ * sure they will be applied.
-+ */
-+static const struct pinctrl_map fpga_pinctrl_map[] = {
-+	/* FPGA */
-+	PIN_MAP_MUX_GROUP_DEFAULT("pfc-r8a7740", "pfc-r8a7740",
-+				  "intc_irq10", "intc"),
-+};
-+
- static const struct pinctrl_map scifa5_pinctrl_map[] = {
- 	/* SCIFA5 */
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.5", "pfc-r8a7740",
-@@ -381,6 +392,8 @@ static void __init bonito_init(void)
- 
- 	regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
- 
-+	pinctrl_register_mappings(fpga_pinctrl_map,
-+				  ARRAY_SIZE(fpga_pinctrl_map));
- 	r8a7740_pinmux_init();
- 	bonito_fpga_init();
- 
-@@ -412,7 +425,6 @@ static void __init bonito_init(void)
- 		gpio_request(GPIO_FN_CS5B,		NULL);
- 		gpio_request(GPIO_FN_CS6A,		NULL);
- 		gpio_request(GPIO_FN_CS5A_PORT105,	NULL);
--		gpio_request(GPIO_FN_IRQ10,		NULL);
- 
- 		val = bonito_fpga_read(BVERR);
- 		pr_info("bonito version: cpu %02x, base %02x\n",
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0152-ARM-shmobile-Use-r8a7790-suffix-for-IRQC-compat-stri.patch b/patches.renesas/0152-ARM-shmobile-Use-r8a7790-suffix-for-IRQC-compat-stri.patch
deleted file mode 100644
index d1fa88c0f0473..0000000000000
--- a/patches.renesas/0152-ARM-shmobile-Use-r8a7790-suffix-for-IRQC-compat-stri.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From 11a0ac4193fbba5637340bc7210ccf83b7aff6b0 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Wed, 20 Nov 2013 09:07:40 +0900
-Subject: ARM: shmobile: Use r8a7790 suffix for IRQC compat string
-
-Add "renesas,irqc-r8a7790" to the compatible string for IRQC
-in case of r8a7790. This makes the IRQC follow the same style
-as the other devices and also makes it more future proof.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 220fc352163de3b93e13d5a2e27d9eefd47bae84)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7790.dtsi | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
-index cfb0f8b70e53..68b7b87e535f 100644
---- a/arch/arm/boot/dts/r8a7790.dtsi
-+++ b/arch/arm/boot/dts/r8a7790.dtsi
-@@ -178,7 +178,7 @@
- 	};
- 
- 	irqc0: interrupt-controller@e61c0000 {
--		compatible = "renesas,irqc";
-+		compatible = "renesas,irqc-r8a7790", "renesas,irqc";
- 		#interrupt-cells = <2>;
- 		interrupt-controller;
- 		reg = <0 0xe61c0000 0 0x200>;
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0152-ARM-shmobile-ape6evm-disable-MMCIF-Command-Completio.patch b/patches.renesas/0152-ARM-shmobile-ape6evm-disable-MMCIF-Command-Completio.patch
deleted file mode 100644
index 438c97adecb2a..0000000000000
--- a/patches.renesas/0152-ARM-shmobile-ape6evm-disable-MMCIF-Command-Completio.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From fd94bbdd8a2bbc36fc9498051e96be2b7381a95c Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Wed, 10 Jul 2013 21:21:16 +0200
-Subject: ARM: shmobile: ape6evm: disable MMCIF Command Completion Signal
-
-MMCIF on r8a73a4 doesn't support Command Completion Signal, a platform
-parameter has to be added to disable it on ape6evm.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit a2eeabcceb3eb2646b0064b55b8ff0eb6f1ae13d)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-ape6evm.c | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/arch/arm/mach-shmobile/board-ape6evm.c b/arch/arm/mach-shmobile/board-ape6evm.c
-index 7e5765b8fc0e..7627385f516e 100644
---- a/arch/arm/mach-shmobile/board-ape6evm.c
-+++ b/arch/arm/mach-shmobile/board-ape6evm.c
-@@ -162,6 +162,7 @@ static struct regulator_consumer_supply vcc_sdhi1_consumers[] =
- /* MMCIF */
- static const struct sh_mmcif_plat_data mmcif0_pdata __initconst = {
- 	.caps		= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
-+	.ccs_unsupported = true,
- };
- 
- static const struct resource mmcif0_resources[] __initconst = {
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0152-ARM-shmobile-bonito-Register-pinctrl-mapping-for-BSC.patch b/patches.renesas/0152-ARM-shmobile-bonito-Register-pinctrl-mapping-for-BSC.patch
deleted file mode 100644
index f90b43f7ad925..0000000000000
--- a/patches.renesas/0152-ARM-shmobile-bonito-Register-pinctrl-mapping-for-BSC.patch
+++ /dev/null
@@ -1,49 +0,0 @@
-From 831f716282318852998dc6349fcee3aff7cb4303 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 18 Apr 2013 01:18:41 +0200
-Subject: ARM: shmobile: bonito: Register pinctrl mapping for BSC
-
-Replace the GPIO-based BSC pinmux configuration by a pinctrl mapping.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 055b246946976616de6c7ba3acc1fd5a614b96b0)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-bonito.c | 13 ++++++-------
- 1 file changed, 6 insertions(+), 7 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-bonito.c b/arch/arm/mach-shmobile/board-bonito.c
-index 5076f4d5..2781c7fd 100644
---- a/arch/arm/mach-shmobile/board-bonito.c
-+++ b/arch/arm/mach-shmobile/board-bonito.c
-@@ -377,6 +377,12 @@ static void __init bonito_map_io(void)
- static const struct pinctrl_map fpga_pinctrl_map[] = {
- 	/* FPGA */
- 	PIN_MAP_MUX_GROUP_DEFAULT("pfc-r8a7740", "pfc-r8a7740",
-+				  "bsc_cs5a_0", "bsc"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("pfc-r8a7740", "pfc-r8a7740",
-+				  "bsc_cs5b", "bsc"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("pfc-r8a7740", "pfc-r8a7740",
-+				  "bsc_cs6a", "bsc"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("pfc-r8a7740", "pfc-r8a7740",
- 				  "intc_irq10", "intc"),
- };
- 
-@@ -419,13 +425,6 @@ static void __init bonito_init(void)
- 		u16 bsw3;
- 		u16 bsw4;
- 
--		/*
--		 * FPGA
--		 */
--		gpio_request(GPIO_FN_CS5B,		NULL);
--		gpio_request(GPIO_FN_CS6A,		NULL);
--		gpio_request(GPIO_FN_CS5A_PORT105,	NULL);
--
- 		val = bonito_fpga_read(BVERR);
- 		pr_info("bonito version: cpu %02x, base %02x\n",
- 			((val >> 8) & 0xFF),
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0153-ARM-shmobile-armadillo-reference-Use-low-level-IRQ-f.patch b/patches.renesas/0153-ARM-shmobile-armadillo-reference-Use-low-level-IRQ-f.patch
deleted file mode 100644
index cda8a5e71e68c..0000000000000
--- a/patches.renesas/0153-ARM-shmobile-armadillo-reference-Use-low-level-IRQ-f.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From 3290e152d573d0361cfcb155b9393b8a63244251 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 19 Nov 2013 13:59:49 +0100
-Subject: ARM: shmobile: armadillo-reference: Use low level IRQ for ST1231
-
-The device is configured to generate an active-low interrupt signal that
-needs to be acknowledged by the host. Configure the IRQ to trigger on
-low level.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit b69e4435e34df68d54e204b37d6bb256606fef5d)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
-index aef425faf731..7b80f19129e3 100644
---- a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
-+++ b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
-@@ -95,7 +95,7 @@
- 		compatible = "sitronix,st1232";
- 		reg = <0x55>;
- 		interrupt-parent = <&irqpin1>;
--		interrupts = <2 IRQ_TYPE_NONE>; /* IRQ10: hwirq 2 on irqpin1 */
-+		interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
- 		pinctrl-0 = <&st1232_pins>;
- 		pinctrl-names = "default";
- 		gpios = <&pfc 166 GPIO_ACTIVE_LOW>;
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0153-ARM-shmobile-armadillo800eva-disable-MMCIF-Command-C.patch b/patches.renesas/0153-ARM-shmobile-armadillo800eva-disable-MMCIF-Command-C.patch
deleted file mode 100644
index aba8fefa63c14..0000000000000
--- a/patches.renesas/0153-ARM-shmobile-armadillo800eva-disable-MMCIF-Command-C.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From 21470759763d5dea51d61b305907ea36bddcc6b3 Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Wed, 10 Jul 2013 21:21:14 +0200
-Subject: ARM: shmobile: armadillo800eva: disable MMCIF Command Completion
- Signal
-
-MMCIF on r8a7740 doesn't support Command Completion Signal, a platform
-parameter has to be added to disable it on armadillo800eva.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit fbf3264c046a6cce4cefec6e069fc86c0175f7d3)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-armadillo800eva.c | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c
-index 068025844e99..4a11fd34a6e7 100644
---- a/arch/arm/mach-shmobile/board-armadillo800eva.c
-+++ b/arch/arm/mach-shmobile/board-armadillo800eva.c
-@@ -822,6 +822,7 @@ static struct sh_mmcif_plat_data sh_mmcif_plat = {
- 	.caps		= MMC_CAP_4_BIT_DATA |
- 			  MMC_CAP_8_BIT_DATA |
- 			  MMC_CAP_NONREMOVABLE,
-+	.ccs_unsupported = true,
- 	.slave_id_tx	= SHDMA_SLAVE_MMCIF_TX,
- 	.slave_id_rx	= SHDMA_SLAVE_MMCIF_RX,
- };
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0153-ARM-shmobile-bonito-Don-t-configure-LCDC-routing-man.patch b/patches.renesas/0153-ARM-shmobile-bonito-Don-t-configure-LCDC-routing-man.patch
deleted file mode 100644
index 860645f25cfbe..0000000000000
--- a/patches.renesas/0153-ARM-shmobile-bonito-Don-t-configure-LCDC-routing-man.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From b83d43ef343898faba7ba5504723a3c37766a7df Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 23 Apr 2013 00:17:58 +0200
-Subject: ARM: shmobile: bonito: Don't configure LCDC routing manually
-
-LCDC routing is configured automatically in the PFC driver, don't
-configure it manually in board code.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 8be14c78e751205b1c0f4b38fa417d5fe5cc15d1)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-bonito.c | 1 -
- 1 file changed, 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/board-bonito.c b/arch/arm/mach-shmobile/board-bonito.c
-index 2781c7fd..b373e9ce 100644
---- a/arch/arm/mach-shmobile/board-bonito.c
-+++ b/arch/arm/mach-shmobile/board-bonito.c
-@@ -451,7 +451,6 @@ static void __init bonito_init(void)
- 		    BIT_ON(bsw2, 2)) {	/* S38.2 = OFF */
- 			pinctrl_register_mappings(lcdc0_pinctrl_map,
- 						  ARRAY_SIZE(lcdc0_pinctrl_map));
--			gpio_request(GPIO_FN_LCDC0_SELECT, NULL);
- 
- 			gpio_request_one(61, GPIOF_OUT_INIT_HIGH,
- 					 NULL); /* LCDDON */
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0154-ARM-shmobile-Enable-DSW2-with-gpio-keys-on-KZM9D.patch b/patches.renesas/0154-ARM-shmobile-Enable-DSW2-with-gpio-keys-on-KZM9D.patch
deleted file mode 100644
index 80db7cf343347..0000000000000
--- a/patches.renesas/0154-ARM-shmobile-Enable-DSW2-with-gpio-keys-on-KZM9D.patch
+++ /dev/null
@@ -1,89 +0,0 @@
-From 272cde8ee61da7395e1c1800b60ad54156cda1a3 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Thu, 14 Nov 2013 08:03:45 +0900
-Subject: ARM: shmobile: Enable DSW2 with gpio-keys on KZM9D
-
-Use the gpio-keys driver to support the 4 pins on the
-dip switch DSW2 which is mounted on the KZM9D board.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit cef20af093fc018009ed7f7fde38f9fb8b445e6b)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/emev2-kzm9d.dts | 39 ++++++++++++++++++++++++++++++++++++++-
- arch/arm/boot/dts/emev2.dtsi      |  2 +-
- 2 files changed, 39 insertions(+), 2 deletions(-)
-
-diff --git a/arch/arm/boot/dts/emev2-kzm9d.dts b/arch/arm/boot/dts/emev2-kzm9d.dts
-index 861aa7d6fc7d..baaa66cc39bf 100644
---- a/arch/arm/boot/dts/emev2-kzm9d.dts
-+++ b/arch/arm/boot/dts/emev2-kzm9d.dts
-@@ -9,7 +9,9 @@
-  */
- /dts-v1/;
- 
--/include/ "emev2.dtsi"
-+#include "emev2.dtsi"
-+#include <dt-bindings/gpio/gpio.h>
-+#include <dt-bindings/input/input.h>
- 
- / {
- 	model = "EMEV2 KZM9D Board";
-@@ -54,4 +56,39 @@
- 		vddvario-supply = <&reg_1p8v>;
- 		vdd33a-supply = <&reg_3p3v>;
- 	};
-+
-+	gpio_keys {
-+		compatible = "gpio-keys";
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		button@1 {
-+			debounce_interval = <50>;
-+			wakeup = <1>;
-+			label = "DSW2-1";
-+			linux,code = <KEY_1>;
-+			gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
-+		};
-+		button@2 {
-+			debounce_interval = <50>;
-+			wakeup = <1>;
-+			label = "DSW2-2";
-+			linux,code = <KEY_2>;
-+			gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>;
-+		};
-+		button@3 {
-+			debounce_interval = <50>;
-+			wakeup = <1>;
-+			label = "DSW2-3";
-+			linux,code = <KEY_3>;
-+			gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>;
-+		};
-+		button@4 {
-+			debounce_interval = <50>;
-+			wakeup = <1>;
-+			label = "DSW2-4";
-+			linux,code = <KEY_4>;
-+			gpios = <&gpio0 17 GPIO_ACTIVE_HIGH>;
-+		};
-+	};
- };
-diff --git a/arch/arm/boot/dts/emev2.dtsi b/arch/arm/boot/dts/emev2.dtsi
-index df1d4cd3917d..256c2f8b9d0a 100644
---- a/arch/arm/boot/dts/emev2.dtsi
-+++ b/arch/arm/boot/dts/emev2.dtsi
-@@ -8,7 +8,7 @@
-  * kind, whether express or implied.
-  */
- 
--/include/ "skeleton.dtsi"
-+#include "skeleton.dtsi"
- 
- / {
- 	compatible = "renesas,emev2";
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0154-ARM-shmobile-kzm9g-disable-MMCIF-Command-Completion-.patch b/patches.renesas/0154-ARM-shmobile-kzm9g-disable-MMCIF-Command-Completion-.patch
deleted file mode 100644
index b32c6a251a88c..0000000000000
--- a/patches.renesas/0154-ARM-shmobile-kzm9g-disable-MMCIF-Command-Completion-.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From 3e52030ce6ca133c945044201aefacbb6e188730 Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Wed, 10 Jul 2013 21:21:15 +0200
-Subject: ARM: shmobile: kzm9g: disable MMCIF Command Completion Signal
-
-MMCIF on sh73a0 doesn't support Command Completion Signal, a platform
-parameter has to be added to disable it on kzm9g.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 58d0bbd1a734831262157f006306f084dda9605d)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-kzm9g.c | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/arch/arm/mach-shmobile/board-kzm9g.c b/arch/arm/mach-shmobile/board-kzm9g.c
-index b30ef47dc769..68af069fda6e 100644
---- a/arch/arm/mach-shmobile/board-kzm9g.c
-+++ b/arch/arm/mach-shmobile/board-kzm9g.c
-@@ -365,6 +365,7 @@ static struct resource sh_mmcif_resources[] = {
- static struct sh_mmcif_plat_data sh_mmcif_platdata = {
- 	.ocr		= MMC_VDD_165_195,
- 	.caps		= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
-+	.ccs_unsupported = true,
- 	.slave_id_tx	= SHDMA_SLAVE_MMCIF_TX,
- 	.slave_id_rx	= SHDMA_SLAVE_MMCIF_RX,
- };
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0154-sh-pfc-r8a7740-Remove-SCIF-function-GPIOS.patch b/patches.renesas/0154-sh-pfc-r8a7740-Remove-SCIF-function-GPIOS.patch
deleted file mode 100644
index 51fe43ef2fba7..0000000000000
--- a/patches.renesas/0154-sh-pfc-r8a7740-Remove-SCIF-function-GPIOS.patch
+++ /dev/null
@@ -1,102 +0,0 @@
-From 35880e048ebc2b700afaf87044536d9d234da417 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 18 Apr 2013 01:05:50 +0200
-Subject: sh-pfc: r8a7740: Remove SCIF function GPIOS
-
-All r8a7740 platforms now use the pinctrl API to control the SCIF pins,
-the corresponding function GPIOS are unused. Remove them.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit aae36d71a38874beb97be7a742b4e8d65cc50983)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7740.c | 72 ------------------------------------
- 1 file changed, 72 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-index 9afc7b0e..3b53193a 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-@@ -3261,78 +3261,6 @@ static const struct pinmux_func pinmux_func_gpios[] = {
- 	GPIO_FN(FMSOIBT),	GPIO_FN(FMSOOLR),	GPIO_FN(FMSOOBT),
- 	GPIO_FN(FMSOSLD),	GPIO_FN(FMSOCK),
- 
--	/* SCIFA0 */
--	GPIO_FN(SCIFA0_SCK),	GPIO_FN(SCIFA0_CTS),	GPIO_FN(SCIFA0_RTS),
--	GPIO_FN(SCIFA0_RXD),	GPIO_FN(SCIFA0_TXD),
--
--	/* SCIFA1 */
--	GPIO_FN(SCIFA1_CTS),	GPIO_FN(SCIFA1_SCK),
--	GPIO_FN(SCIFA1_RXD),	GPIO_FN(SCIFA1_TXD),	GPIO_FN(SCIFA1_RTS),
--
--	/* SCIFA2 */
--	GPIO_FN(SCIFA2_SCK_PORT22), /* SCIFA2_SCK Port 22/199 */
--	GPIO_FN(SCIFA2_SCK_PORT199),
--	GPIO_FN(SCIFA2_RXD),	GPIO_FN(SCIFA2_TXD),
--	GPIO_FN(SCIFA2_CTS),	GPIO_FN(SCIFA2_RTS),
--
--	/* SCIFA3 */
--	GPIO_FN(SCIFA3_RTS_PORT105), /* MSEL5CR_8_0 */
--	GPIO_FN(SCIFA3_SCK_PORT116),
--	GPIO_FN(SCIFA3_CTS_PORT117),
--	GPIO_FN(SCIFA3_RXD_PORT174),
--	GPIO_FN(SCIFA3_TXD_PORT175),
--
--	GPIO_FN(SCIFA3_RTS_PORT161), /* MSEL5CR_8_1 */
--	GPIO_FN(SCIFA3_SCK_PORT158),
--	GPIO_FN(SCIFA3_CTS_PORT162),
--	GPIO_FN(SCIFA3_RXD_PORT159),
--	GPIO_FN(SCIFA3_TXD_PORT160),
--
--	/* SCIFA4 */
--	GPIO_FN(SCIFA4_RXD_PORT12), /* MSEL5CR[12:11] = 00 */
--	GPIO_FN(SCIFA4_TXD_PORT13),
--
--	GPIO_FN(SCIFA4_RXD_PORT204), /* MSEL5CR[12:11] = 01 */
--	GPIO_FN(SCIFA4_TXD_PORT203),
--
--	GPIO_FN(SCIFA4_RXD_PORT94), /* MSEL5CR[12:11] = 10 */
--	GPIO_FN(SCIFA4_TXD_PORT93),
--
--	GPIO_FN(SCIFA4_SCK_PORT21), /* SCIFA4_SCK Port 21/205 */
--	GPIO_FN(SCIFA4_SCK_PORT205),
--
--	/* SCIFA5 */
--	GPIO_FN(SCIFA5_TXD_PORT20), /* MSEL5CR[15:14] = 00 */
--	GPIO_FN(SCIFA5_RXD_PORT10),
--
--	GPIO_FN(SCIFA5_RXD_PORT207), /* MSEL5CR[15:14] = 01 */
--	GPIO_FN(SCIFA5_TXD_PORT208),
--
--	GPIO_FN(SCIFA5_TXD_PORT91), /* MSEL5CR[15:14] = 10 */
--	GPIO_FN(SCIFA5_RXD_PORT92),
--
--	GPIO_FN(SCIFA5_SCK_PORT23), /* SCIFA5_SCK Port 23/206 */
--	GPIO_FN(SCIFA5_SCK_PORT206),
--
--	/* SCIFA6 */
--	GPIO_FN(SCIFA6_SCK),	GPIO_FN(SCIFA6_RXD),	GPIO_FN(SCIFA6_TXD),
--
--	/* SCIFA7 */
--	GPIO_FN(SCIFA7_TXD),	GPIO_FN(SCIFA7_RXD),
--
--	/* SCIFAB */
--	GPIO_FN(SCIFB_SCK_PORT190), /* MSEL5CR_17_0 */
--	GPIO_FN(SCIFB_RXD_PORT191),
--	GPIO_FN(SCIFB_TXD_PORT192),
--	GPIO_FN(SCIFB_RTS_PORT186),
--	GPIO_FN(SCIFB_CTS_PORT187),
--
--	GPIO_FN(SCIFB_SCK_PORT2), /* MSEL5CR_17_1 */
--	GPIO_FN(SCIFB_RXD_PORT3),
--	GPIO_FN(SCIFB_TXD_PORT4),
--	GPIO_FN(SCIFB_RTS_PORT172),
--	GPIO_FN(SCIFB_CTS_PORT173),
--
- 	/* RSPI */
- 	GPIO_FN(RSPI_SSL0_A),	GPIO_FN(RSPI_SSL1_A),	GPIO_FN(RSPI_SSL2_A),
- 	GPIO_FN(RSPI_SSL3_A),	GPIO_FN(RSPI_CK_A),	GPIO_FN(RSPI_MOSI_A),
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0155-ARM-shmobile-Koelsch-DT-reference-GPIO-LED-support.patch b/patches.renesas/0155-ARM-shmobile-Koelsch-DT-reference-GPIO-LED-support.patch
deleted file mode 100644
index b7a28ab0f57c9..0000000000000
--- a/patches.renesas/0155-ARM-shmobile-Koelsch-DT-reference-GPIO-LED-support.patch
+++ /dev/null
@@ -1,51 +0,0 @@
-From 921569d8779cc3dbf68d2a4e885303e6085537d7 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Thu, 21 Nov 2013 09:44:04 +0900
-Subject: ARM: shmobile: Koelsch DT reference GPIO LED support
-
-Add led6, led7 and led8 to the Koelsch DT reference board support.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 614a198d45e523f6066f1c22b9c10e4067f2c44a)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7791-koelsch-reference.dts | 14 ++++++++++++++
- 1 file changed, 14 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a7791-koelsch-reference.dts b/arch/arm/boot/dts/r8a7791-koelsch-reference.dts
-index 8e7e917d66b6..19192731c24a 100644
---- a/arch/arm/boot/dts/r8a7791-koelsch-reference.dts
-+++ b/arch/arm/boot/dts/r8a7791-koelsch-reference.dts
-@@ -11,6 +11,7 @@
- 
- /dts-v1/;
- #include "r8a7791.dtsi"
-+#include <dt-bindings/gpio/gpio.h>
- 
- / {
- 	model = "Koelsch";
-@@ -29,6 +30,19 @@
- 		#address-cells = <1>;
- 		#size-cells = <1>;
- 	};
-+
-+	leds {
-+		compatible = "gpio-leds";
-+		led6 {
-+			gpios = <&gpio2 19 GPIO_ACTIVE_HIGH>;
-+		};
-+		led7 {
-+			gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>;
-+		};
-+		led8 {
-+			gpios = <&gpio2 21 GPIO_ACTIVE_HIGH>;
-+		};
-+	};
- };
- 
- &pfc {
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0155-ARM-shmobile-lager-disable-MMCIF-Command-Completion-.patch b/patches.renesas/0155-ARM-shmobile-lager-disable-MMCIF-Command-Completion-.patch
deleted file mode 100644
index ce15b86e1d928..0000000000000
--- a/patches.renesas/0155-ARM-shmobile-lager-disable-MMCIF-Command-Completion-.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From faeaa252b6a4370a09ef192aae4f05838e390a01 Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Wed, 10 Jul 2013 21:21:17 +0200
-Subject: ARM: shmobile: lager: disable MMCIF Command Completion Signal, add
- CLK_CTRL2
-
-MMCIF on r8a7790 doesn't support Command Completion Signal, but it does
-implement a CE_CLK_CTRL2 register. Platform parameters have to be added to
-account for these features on lager.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit b77c6bcef2082a7cd96124daf15df8da5b670ebe)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-lager.c | 2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
-index 1caeefa9d114..245ce5bdbbf2 100644
---- a/arch/arm/mach-shmobile/board-lager.c
-+++ b/arch/arm/mach-shmobile/board-lager.c
-@@ -143,6 +143,8 @@ static struct regulator_consumer_supply fixed3v3_power_consumers[] =
- /* MMCIF */
- static const struct sh_mmcif_plat_data mmcif1_pdata __initconst = {
- 	.caps		= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
-+	.clk_ctrl2_present = true,
-+	.ccs_unsupported = true,
- };
- 
- static const struct resource mmcif1_resources[] __initconst = {
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0155-sh-pfc-r8a7740-Remove-INTC-function-GPIOS.patch b/patches.renesas/0155-sh-pfc-r8a7740-Remove-INTC-function-GPIOS.patch
deleted file mode 100644
index 1b73b53fc7eec..0000000000000
--- a/patches.renesas/0155-sh-pfc-r8a7740-Remove-INTC-function-GPIOS.patch
+++ /dev/null
@@ -1,64 +0,0 @@
-From f08cadd8df21c3f1e92c1e0fa88bc0a4ed283c70 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 18 Apr 2013 01:05:50 +0200
-Subject: sh-pfc: r8a7740: Remove INTC function GPIOS
-
-All r8a7740 platforms now use the pinctrl API to control the INTC pins,
-the corresponding function GPIOS are unused. Remove them.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 78c3e9b2a14af83aac563a50eaa1eaaeeb970815)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7740.c | 34 ----------------------------------
- 1 file changed, 34 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-index 3b53193a..0429c7d4 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-@@ -3200,40 +3200,6 @@ static const struct sh_pfc_function pinmux_functions[] = {
- #define PINMUX_FN_BASE	ARRAY_SIZE(pinmux_pins)
- 
- static const struct pinmux_func pinmux_func_gpios[] = {
--	/* IRQ */
--	GPIO_FN(IRQ0_PORT2),	GPIO_FN(IRQ0_PORT13),
--	GPIO_FN(IRQ1),
--	GPIO_FN(IRQ2_PORT11),	GPIO_FN(IRQ2_PORT12),
--	GPIO_FN(IRQ3_PORT10),	GPIO_FN(IRQ3_PORT14),
--	GPIO_FN(IRQ4_PORT15),	GPIO_FN(IRQ4_PORT172),
--	GPIO_FN(IRQ5_PORT0),	GPIO_FN(IRQ5_PORT1),
--	GPIO_FN(IRQ6_PORT121),	GPIO_FN(IRQ6_PORT173),
--	GPIO_FN(IRQ7_PORT120),	GPIO_FN(IRQ7_PORT209),
--	GPIO_FN(IRQ8),
--	GPIO_FN(IRQ9_PORT118),	GPIO_FN(IRQ9_PORT210),
--	GPIO_FN(IRQ10),
--	GPIO_FN(IRQ11),
--	GPIO_FN(IRQ12_PORT42),	GPIO_FN(IRQ12_PORT97),
--	GPIO_FN(IRQ13_PORT64),	GPIO_FN(IRQ13_PORT98),
--	GPIO_FN(IRQ14_PORT63),	GPIO_FN(IRQ14_PORT99),
--	GPIO_FN(IRQ15_PORT62),	GPIO_FN(IRQ15_PORT100),
--	GPIO_FN(IRQ16_PORT68),	GPIO_FN(IRQ16_PORT211),
--	GPIO_FN(IRQ17),
--	GPIO_FN(IRQ18),
--	GPIO_FN(IRQ19),
--	GPIO_FN(IRQ20),
--	GPIO_FN(IRQ21),
--	GPIO_FN(IRQ22),
--	GPIO_FN(IRQ23),
--	GPIO_FN(IRQ24),
--	GPIO_FN(IRQ25),
--	GPIO_FN(IRQ26_PORT58),	GPIO_FN(IRQ26_PORT81),
--	GPIO_FN(IRQ27_PORT57),	GPIO_FN(IRQ27_PORT168),
--	GPIO_FN(IRQ28_PORT56),	GPIO_FN(IRQ28_PORT169),
--	GPIO_FN(IRQ29_PORT50),	GPIO_FN(IRQ29_PORT170),
--	GPIO_FN(IRQ30_PORT49),	GPIO_FN(IRQ30_PORT171),
--	GPIO_FN(IRQ31_PORT41),	GPIO_FN(IRQ31_PORT167),
--
- 	/* Function */
- 
- 	/* DBGT */
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0156-ARM-shmobile-Shared-APMU-SMP-support-code-without-DT.patch b/patches.renesas/0156-ARM-shmobile-Shared-APMU-SMP-support-code-without-DT.patch
deleted file mode 100644
index 6a90fa17a7851..0000000000000
--- a/patches.renesas/0156-ARM-shmobile-Shared-APMU-SMP-support-code-without-DT.patch
+++ /dev/null
@@ -1,227 +0,0 @@
-From 9542463afa890c66077635bc6d3ced1d731bc13a Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Thu, 29 Aug 2013 08:21:58 +0900
-Subject: ARM: shmobile: Shared APMU SMP support code without DT
-
-Introduce shared APMU SMP code for mach-shmobile. Both SMP boot up
-and CPU Hotplug is supported. This version does not use DT but
-if needed this will be added as an incremental feature patch.
-
-The code is designed around CONFIG_NR_CPUS and should in theory support
-any number of APMUs, however due to the current DT-less static design
-only a single APMU is supported.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit a112de8c7ae231f396e28160e84d0eab3a79dffc)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/include/mach/common.h |   6 +
- arch/arm/mach-shmobile/platsmp-apmu.c        | 178 +++++++++++++++++++++++++++
- 2 files changed, 184 insertions(+)
- create mode 100644 arch/arm/mach-shmobile/platsmp-apmu.c
-
-diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h
-index cfe397716fd1..3460bb13c988 100644
---- a/arch/arm/mach-shmobile/include/mach/common.h
-+++ b/arch/arm/mach-shmobile/include/mach/common.h
-@@ -22,6 +22,12 @@ extern int shmobile_smp_scu_boot_secondary(unsigned int cpu,
- 					   struct task_struct *idle);
- extern void shmobile_smp_scu_cpu_die(unsigned int cpu);
- extern int shmobile_smp_scu_cpu_kill(unsigned int cpu);
-+extern void shmobile_smp_apmu_prepare_cpus(unsigned int max_cpus);
-+extern int shmobile_smp_apmu_boot_secondary(unsigned int cpu,
-+					    struct task_struct *idle);
-+extern void shmobile_smp_apmu_cpu_die(unsigned int cpu);
-+extern int shmobile_smp_apmu_cpu_kill(unsigned int cpu);
-+extern void shmobile_invalidate_start(void);
- struct clk;
- extern int shmobile_clk_init(void);
- extern void shmobile_handle_irq_intc(struct pt_regs *);
-diff --git a/arch/arm/mach-shmobile/platsmp-apmu.c b/arch/arm/mach-shmobile/platsmp-apmu.c
-new file mode 100644
-index 000000000000..34dc40dacb79
---- /dev/null
-+++ b/arch/arm/mach-shmobile/platsmp-apmu.c
-@@ -0,0 +1,178 @@
-+/*
-+ * SMP support for SoCs with APMU
-+ *
-+ * Copyright (C) 2013  Magnus Damm
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+#include <linux/delay.h>
-+#include <linux/init.h>
-+#include <linux/io.h>
-+#include <linux/ioport.h>
-+#include <linux/of_address.h>
-+#include <linux/smp.h>
-+#include <asm/cacheflush.h>
-+#include <asm/cp15.h>
-+#include <asm/smp_plat.h>
-+#include <mach/common.h>
-+
-+static struct {
-+	void __iomem *iomem;
-+	int bit;
-+} apmu_cpus[CONFIG_NR_CPUS];
-+
-+#define WUPCR_OFFS 0x10
-+#define PSTR_OFFS 0x40
-+#define CPUNCR_OFFS(n) (0x100 + (0x10 * (n)))
-+
-+static int apmu_power_on(void __iomem *p, int bit)
-+{
-+	/* request power on */
-+	writel_relaxed(BIT(bit), p + WUPCR_OFFS);
-+
-+	/* wait for APMU to finish */
-+	while (readl_relaxed(p + WUPCR_OFFS) != 0)
-+		;
-+
-+	return 0;
-+}
-+
-+static int apmu_power_off(void __iomem *p, int bit)
-+{
-+	/* request Core Standby for next WFI */
-+	writel_relaxed(3, p + CPUNCR_OFFS(bit));
-+	return 0;
-+}
-+
-+static int apmu_power_off_poll(void __iomem *p, int bit)
-+{
-+	int k;
-+
-+	for (k = 0; k < 1000; k++) {
-+		if (((readl_relaxed(p + PSTR_OFFS) >> (bit * 4)) & 0x03) == 3)
-+			return 1;
-+
-+		mdelay(1);
-+	}
-+
-+	return 0;
-+}
-+
-+static int apmu_wrap(int cpu, int (*fn)(void __iomem *p, int cpu))
-+{
-+	void __iomem *p = apmu_cpus[cpu].iomem;
-+
-+	return p ? fn(p, apmu_cpus[cpu].bit) : -EINVAL;
-+}
-+
-+static void apmu_init_cpu(struct resource *res, int cpu, int bit)
-+{
-+	if (apmu_cpus[cpu].iomem)
-+		return;
-+
-+	apmu_cpus[cpu].iomem = ioremap_nocache(res->start, resource_size(res));
-+	apmu_cpus[cpu].bit = bit;
-+
-+	pr_debug("apmu ioremap %d %d 0x%08x 0x%08x\n", cpu, bit,
-+		 res->start, resource_size(res));
-+}
-+
-+static struct {
-+	struct resource iomem;
-+	int cpus[4];
-+} apmu_config[] = {
-+	{
-+		.iomem = DEFINE_RES_MEM(0xe6152000, 0x88),
-+		.cpus = { 0, 1, 2, 3 },
-+	}
-+};
-+
-+static void apmu_parse_cfg(void (*fn)(struct resource *res, int cpu, int bit))
-+{
-+	u32 id;
-+	int k;
-+	int bit, index;
-+
-+	for (k = 0; k < ARRAY_SIZE(apmu_config); k++) {
-+		for (bit = 0; bit < ARRAY_SIZE(apmu_config[k].cpus); bit++) {
-+			id = apmu_config[k].cpus[bit];
-+			if (id >= 0) {
-+				index = get_logical_index(id);
-+				if (index >= 0)
-+					fn(&apmu_config[k].iomem, index, bit);
-+			}
-+		}
-+	}
-+}
-+
-+void __init shmobile_smp_apmu_prepare_cpus(unsigned int max_cpus)
-+{
-+	/* install boot code shared by all CPUs */
-+	shmobile_boot_fn = virt_to_phys(shmobile_smp_boot);
-+	shmobile_boot_arg = MPIDR_HWID_BITMASK;
-+
-+	/* perform per-cpu setup */
-+	apmu_parse_cfg(apmu_init_cpu);
-+}
-+
-+int shmobile_smp_apmu_boot_secondary(unsigned int cpu, struct task_struct *idle)
-+{
-+	/* For this particular CPU register boot vector */
-+	shmobile_smp_hook(cpu, virt_to_phys(shmobile_invalidate_start), 0);
-+
-+	return apmu_wrap(cpu, apmu_power_on);
-+}
-+
-+#ifdef CONFIG_HOTPLUG_CPU
-+/* nicked from arch/arm/mach-exynos/hotplug.c */
-+static inline void cpu_enter_lowpower_a15(void)
-+{
-+	unsigned int v;
-+
-+	asm volatile(
-+	"       mrc     p15, 0, %0, c1, c0, 0\n"
-+	"       bic     %0, %0, %1\n"
-+	"       mcr     p15, 0, %0, c1, c0, 0\n"
-+		: "=&r" (v)
-+		: "Ir" (CR_C)
-+		: "cc");
-+
-+	flush_cache_louis();
-+
-+	asm volatile(
-+	/*
-+	 * Turn off coherency
-+	 */
-+	"       mrc     p15, 0, %0, c1, c0, 1\n"
-+	"       bic     %0, %0, %1\n"
-+	"       mcr     p15, 0, %0, c1, c0, 1\n"
-+		: "=&r" (v)
-+		: "Ir" (0x40)
-+		: "cc");
-+
-+	isb();
-+	dsb();
-+}
-+
-+void shmobile_smp_apmu_cpu_die(unsigned int cpu)
-+{
-+	/* For this particular CPU deregister boot vector */
-+	shmobile_smp_hook(cpu, 0, 0);
-+
-+	/* Select next sleep mode using the APMU */
-+	apmu_wrap(cpu, apmu_power_off);
-+
-+	/* Do ARM specific CPU shutdown */
-+	cpu_enter_lowpower_a15();
-+
-+	/* jump to shared mach-shmobile sleep / reset code */
-+	shmobile_smp_sleep();
-+}
-+
-+int shmobile_smp_apmu_cpu_kill(unsigned int cpu)
-+{
-+	return apmu_wrap(cpu, apmu_power_off_poll);
-+}
-+#endif
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0156-ARM-shmobile-kzm9g-reference-Add-PCF8575-GPIO-extend.patch b/patches.renesas/0156-ARM-shmobile-kzm9g-reference-Add-PCF8575-GPIO-extend.patch
deleted file mode 100644
index 0e6537ad1187f..0000000000000
--- a/patches.renesas/0156-ARM-shmobile-kzm9g-reference-Add-PCF8575-GPIO-extend.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From 2419b91fe5ae293fe81132f3b3955174a4726008 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 26 Nov 2013 02:21:18 +0100
-Subject: ARM: shmobile: kzm9g-reference: Add PCF8575 GPIO extender to DT
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit a40d9ad3dd8dbb5d44843156157d83c4172e11f9)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/sh73a0-kzm9g-reference.dts | 11 +++++++++++
- 1 file changed, 11 insertions(+)
-
-diff --git a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
-index 12fdfaaf5e7b..d58877def6d6 100644
---- a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
-+++ b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
-@@ -186,6 +186,17 @@
- 	pinctrl-0 = <&i2c3_pins>;
- 	pinctrl-names = "default";
- 	status = "okay";
-+
-+	pcf8575: gpio@20 {
-+		compatible = "nxp,pcf8575";
-+		reg = <0x20>;
-+		interrupt-parent = <&irqpin2>;
-+		interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
-+		gpio-controller;
-+		#gpio-cells = <2>;
-+		interrupt-controller;
-+		#interrupt-cells = <2>;
-+	};
- };
- 
- &mmcif {
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0156-sh-pfc-r8a7740-Remove-BSC-function-GPIOS.patch b/patches.renesas/0156-sh-pfc-r8a7740-Remove-BSC-function-GPIOS.patch
deleted file mode 100644
index b2968bea79cf3..0000000000000
--- a/patches.renesas/0156-sh-pfc-r8a7740-Remove-BSC-function-GPIOS.patch
+++ /dev/null
@@ -1,63 +0,0 @@
-From f0a805012bf1f18a8622eae992f6225bbd44f92e Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 18 Apr 2013 01:05:50 +0200
-Subject: sh-pfc: r8a7740: Remove BSC function GPIOS
-
-All r8a7740 platforms now use the pinctrl API to control the BSC pins,
-the corresponding function GPIOS are unused. Remove them.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 0be4e53913ab52140d1e9e4498dc8c4a93b2a1c7)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7740.c | 26 ++------------------------
- 1 file changed, 2 insertions(+), 24 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-index 0429c7d4..c78eda8c 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-@@ -3377,11 +3377,7 @@ static const struct pinmux_func pinmux_func_gpios[] = {
- 	GPIO_FN(BBIF2_TSCK2_PORT89),
- 	GPIO_FN(BBIF2_TSYNC2_PORT184),
- 
--	/* BSC / FLCTL / PCMCIA */
--	GPIO_FN(CS0),	GPIO_FN(CS2),	GPIO_FN(CS4),
--	GPIO_FN(CS5B),	GPIO_FN(CS6A),
--	GPIO_FN(CS5A_PORT105), /* CS5A PORT 19/105 */
--	GPIO_FN(CS5A_PORT19),
-+	/* FLCTL / PCMCIA */
- 	GPIO_FN(IOIS16), /* ? */
- 
- 	GPIO_FN(A0),	GPIO_FN(A1),	GPIO_FN(A2),	GPIO_FN(A3),
-@@ -3393,25 +3389,7 @@ static const struct pinmux_func pinmux_func_gpios[] = {
- 	GPIO_FN(A22),	GPIO_FN(A23),	GPIO_FN(A24),	GPIO_FN(A25),
- 	GPIO_FN(A26),
- 
--	GPIO_FN(D0_NAF0),	GPIO_FN(D1_NAF1),	/* share with FLCTL */
--	GPIO_FN(D2_NAF2),	GPIO_FN(D3_NAF3),	/* share with FLCTL */
--	GPIO_FN(D4_NAF4),	GPIO_FN(D5_NAF5),	/* share with FLCTL */
--	GPIO_FN(D6_NAF6),	GPIO_FN(D7_NAF7),	/* share with FLCTL */
--	GPIO_FN(D8_NAF8),	GPIO_FN(D9_NAF9),	/* share with FLCTL */
--	GPIO_FN(D10_NAF10),	GPIO_FN(D11_NAF11),	/* share with FLCTL */
--	GPIO_FN(D12_NAF12),	GPIO_FN(D13_NAF13),	/* share with FLCTL */
--	GPIO_FN(D14_NAF14),	GPIO_FN(D15_NAF15),	/* share with FLCTL */
--	GPIO_FN(D16),	GPIO_FN(D17),	GPIO_FN(D18),	GPIO_FN(D19),
--	GPIO_FN(D20),	GPIO_FN(D21),	GPIO_FN(D22),	GPIO_FN(D23),
--	GPIO_FN(D24),	GPIO_FN(D25),	GPIO_FN(D26),	GPIO_FN(D27),
--	GPIO_FN(D28),	GPIO_FN(D29),	GPIO_FN(D30),	GPIO_FN(D31),
--
--	GPIO_FN(WE0_FWE),	/* share with FLCTL */
--	GPIO_FN(WE1),
--	GPIO_FN(WE2_ICIORD),	/* share with PCMCIA */
--	GPIO_FN(WE3_ICIOWR),	/* share with PCMCIA */
--	GPIO_FN(CKO),	GPIO_FN(BS),	GPIO_FN(RDWR),
--	GPIO_FN(RD_FSC),	/* share with FLCTL */
-+	GPIO_FN(CKO),
- 	GPIO_FN(WAIT_PORT177), /* WAIT Port 90/177 */
- 	GPIO_FN(WAIT_PORT90),
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0157-ARM-shmobile-Add-r8a7790-SMP-support-using-APMU-code.patch b/patches.renesas/0157-ARM-shmobile-Add-r8a7790-SMP-support-using-APMU-code.patch
deleted file mode 100644
index 05bb547137e6c..0000000000000
--- a/patches.renesas/0157-ARM-shmobile-Add-r8a7790-SMP-support-using-APMU-code.patch
+++ /dev/null
@@ -1,159 +0,0 @@
-From 30a3f666271d60017a6233de44ed684203b4ec6d Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Thu, 29 Aug 2013 08:22:07 +0900
-Subject: ARM: shmobile: Add r8a7790 SMP support using APMU code
-
-Add r8a7790 SMP support using the shared APMU code. To enable
-SMP the r8a7790 specific DTS needs to be updated to include
-CPU cores, and this is happening in a separate patch.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit ad09cb83811b228eb6f98230d307bb837e6a758f)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/Makefile                |  1 +
- arch/arm/mach-shmobile/board-lager-reference.c |  1 +
- arch/arm/mach-shmobile/board-lager.c           |  1 +
- arch/arm/mach-shmobile/include/mach/r8a7790.h  |  1 +
- arch/arm/mach-shmobile/setup-r8a7790.c         |  1 +
- arch/arm/mach-shmobile/smp-r8a7790.c           | 67 ++++++++++++++++++++++++++
- 6 files changed, 72 insertions(+)
- create mode 100644 arch/arm/mach-shmobile/smp-r8a7790.c
-
-diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
-index e552e84b1fae..f8f699212984 100644
---- a/arch/arm/mach-shmobile/Makefile
-+++ b/arch/arm/mach-shmobile/Makefile
-@@ -36,6 +36,7 @@ endif
- smp-y				:= platsmp.o headsmp.o
- smp-$(CONFIG_ARCH_SH73A0)	+= smp-sh73a0.o headsmp-scu.o platsmp-scu.o
- smp-$(CONFIG_ARCH_R8A7779)	+= smp-r8a7779.o headsmp-scu.o platsmp-scu.o
-+smp-$(CONFIG_ARCH_R8A7790)	+= smp-r8a7790.o platsmp-apmu.o
- smp-$(CONFIG_ARCH_EMEV2)	+= smp-emev2.o headsmp-scu.o platsmp-scu.o
- 
- # IRQ objects
-diff --git a/arch/arm/mach-shmobile/board-lager-reference.c b/arch/arm/mach-shmobile/board-lager-reference.c
-index 2856f51ff8a6..d39a91b3ba48 100644
---- a/arch/arm/mach-shmobile/board-lager-reference.c
-+++ b/arch/arm/mach-shmobile/board-lager-reference.c
-@@ -38,6 +38,7 @@ static const char *lager_boards_compat_dt[] __initdata = {
- };
- 
- DT_MACHINE_START(LAGER_DT, "lager")
-+	.smp		= smp_ops(r8a7790_smp_ops),
- 	.init_early	= r8a7790_init_early,
- 	.init_machine	= lager_add_standard_devices,
- 	.init_time	= r8a7790_timer_init,
-diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
-index 245ce5bdbbf2..ba90fea55156 100644
---- a/arch/arm/mach-shmobile/board-lager.c
-+++ b/arch/arm/mach-shmobile/board-lager.c
-@@ -254,6 +254,7 @@ static const char *lager_boards_compat_dt[] __initdata = {
- };
- 
- DT_MACHINE_START(LAGER_DT, "lager")
-+	.smp		= smp_ops(r8a7790_smp_ops),
- 	.init_early	= r8a7790_init_early,
- 	.init_time	= r8a7790_timer_init,
- 	.init_machine	= lager_init,
-diff --git a/arch/arm/mach-shmobile/include/mach/r8a7790.h b/arch/arm/mach-shmobile/include/mach/r8a7790.h
-index 177a8372abb7..79e731c83e50 100644
---- a/arch/arm/mach-shmobile/include/mach/r8a7790.h
-+++ b/arch/arm/mach-shmobile/include/mach/r8a7790.h
-@@ -7,6 +7,7 @@ void r8a7790_clock_init(void);
- void r8a7790_pinmux_init(void);
- void r8a7790_init_early(void);
- void r8a7790_timer_init(void);
-+extern struct smp_operations r8a7790_smp_ops;
- 
- #define MD(nr) BIT(nr)
- u32 r8a7790_read_mode_pins(void);
-diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c
-index e0d29a265c2d..c7e24eff9ba2 100644
---- a/arch/arm/mach-shmobile/setup-r8a7790.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7790.c
-@@ -283,6 +283,7 @@ static const char * const r8a7790_boards_compat_dt[] __initconst = {
- };
- 
- DT_MACHINE_START(R8A7790_DT, "Generic R8A7790 (Flattened Device Tree)")
-+	.smp		= smp_ops(r8a7790_smp_ops),
- 	.init_early	= r8a7790_init_early,
- 	.init_time	= r8a7790_timer_init,
- 	.dt_compat	= r8a7790_boards_compat_dt,
-diff --git a/arch/arm/mach-shmobile/smp-r8a7790.c b/arch/arm/mach-shmobile/smp-r8a7790.c
-new file mode 100644
-index 000000000000..015e2753de1f
---- /dev/null
-+++ b/arch/arm/mach-shmobile/smp-r8a7790.c
-@@ -0,0 +1,67 @@
-+/*
-+ * SMP support for r8a7790
-+ *
-+ * Copyright (C) 2012-2013 Renesas Solutions Corp.
-+ * Copyright (C) 2012 Takashi Yoshii <takashi.yoshii.ze@renesas.com>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; version 2 of the License.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ */
-+#include <linux/kernel.h>
-+#include <linux/init.h>
-+#include <linux/smp.h>
-+#include <linux/io.h>
-+#include <asm/smp_plat.h>
-+#include <mach/common.h>
-+
-+#define RST		0xe6160000
-+#define CA15BAR		0x0020
-+#define CA7BAR		0x0030
-+#define CA15RESCNT	0x0040
-+#define CA7RESCNT	0x0044
-+#define MERAM		0xe8080000
-+
-+static void __init r8a7790_smp_prepare_cpus(unsigned int max_cpus)
-+{
-+	void __iomem *p;
-+	u32 bar;
-+
-+	/* let APMU code install data related to shmobile_boot_vector */
-+	shmobile_smp_apmu_prepare_cpus(max_cpus);
-+
-+	/* MERAM for jump stub, because BAR requires 256KB aligned address */
-+	p = ioremap_nocache(MERAM, shmobile_boot_size);
-+	memcpy_toio(p, shmobile_boot_vector, shmobile_boot_size);
-+	iounmap(p);
-+
-+	/* setup reset vectors */
-+	p = ioremap_nocache(RST, 0x63);
-+	bar = (MERAM >> 8) & 0xfffffc00;
-+	writel_relaxed(bar, p + CA15BAR);
-+	writel_relaxed(bar, p + CA7BAR);
-+	writel_relaxed(bar | 0x10, p + CA15BAR);
-+	writel_relaxed(bar | 0x10, p + CA7BAR);
-+
-+	/* enable clocks to all CPUs */
-+	writel_relaxed((readl_relaxed(p + CA15RESCNT) & ~0x0f) | 0xa5a50000,
-+		       p + CA15RESCNT);
-+	writel_relaxed((readl_relaxed(p + CA7RESCNT) & ~0x0f) | 0x5a5a0000,
-+		       p + CA7RESCNT);
-+	iounmap(p);
-+}
-+
-+struct smp_operations r8a7790_smp_ops __initdata = {
-+	.smp_prepare_cpus	= r8a7790_smp_prepare_cpus,
-+	.smp_boot_secondary	= shmobile_smp_apmu_boot_secondary,
-+#ifdef CONFIG_HOTPLUG_CPU
-+	.cpu_disable		= shmobile_smp_cpu_disable,
-+	.cpu_die		= shmobile_smp_apmu_cpu_die,
-+	.cpu_kill		= shmobile_smp_apmu_cpu_kill,
-+#endif
-+};
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0157-ARM-shmobile-kzm9g-reference-Add-GPIO-keys-to-DT.patch b/patches.renesas/0157-ARM-shmobile-kzm9g-reference-Add-GPIO-keys-to-DT.patch
deleted file mode 100644
index d804d47637826..0000000000000
--- a/patches.renesas/0157-ARM-shmobile-kzm9g-reference-Add-GPIO-keys-to-DT.patch
+++ /dev/null
@@ -1,74 +0,0 @@
-From b6d1ababf270a20b623547f7f9700a684784de5a Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 26 Nov 2013 02:21:19 +0100
-Subject: ARM: shmobile: kzm9g-reference: Add GPIO keys to DT
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 5ec5f73463611514fe46b2167e471b17626007f9)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/sh73a0-kzm9g-reference.dts | 46 ++++++++++++++++++++++++++++
- 1 file changed, 46 insertions(+)
-
-diff --git a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
-index d58877def6d6..5bb593daab52 100644
---- a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
-+++ b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
-@@ -106,6 +106,52 @@
- 			gpios = <&pfc 23 GPIO_ACTIVE_LOW>;
- 		};
- 	};
-+
-+	gpio-keys {
-+		compatible = "gpio-keys";
-+
-+		back-key {
-+			gpios = <&pcf8575 8 GPIO_ACTIVE_LOW>;
-+			linux,code = <158>;
-+			label = "SW3";
-+		};
-+
-+		right-key {
-+			gpios = <&pcf8575 9 GPIO_ACTIVE_LOW>;
-+			linux,code = <106>;
-+			label = "SW2-R";
-+		};
-+
-+		left-key {
-+			gpios = <&pcf8575 10 GPIO_ACTIVE_LOW>;
-+			linux,code = <105>;
-+			label = "SW2-L";
-+		};
-+
-+		enter-key {
-+			gpios = <&pcf8575 11 GPIO_ACTIVE_LOW>;
-+			linux,code = <28>;
-+			label = "SW2-P";
-+		};
-+
-+		up-key {
-+			gpios = <&pcf8575 12 GPIO_ACTIVE_LOW>;
-+			linux,code = <103>;
-+			label = "SW2-U";
-+		};
-+
-+		down-key {
-+			gpios = <&pcf8575 13 GPIO_ACTIVE_LOW>;
-+			linux,code = <108>;
-+			label = "SW2-D";
-+		};
-+
-+		home-key {
-+			gpios = <&pcf8575 14 GPIO_ACTIVE_LOW>;
-+			linux,code = <102>;
-+			label = "SW1";
-+		};
-+	};
- };
- 
- &i2c0 {
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0157-sh-pfc-r8a7740-Remove-GETHER-function-GPIOS.patch b/patches.renesas/0157-sh-pfc-r8a7740-Remove-GETHER-function-GPIOS.patch
deleted file mode 100644
index 7505efb8ed344..0000000000000
--- a/patches.renesas/0157-sh-pfc-r8a7740-Remove-GETHER-function-GPIOS.patch
+++ /dev/null
@@ -1,50 +0,0 @@
-From a963fa5a5abf98a0a0bf1da54a3030386444e77a Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 18 Apr 2013 01:05:50 +0200
-Subject: sh-pfc: r8a7740: Remove GETHER function GPIOS
-
-All r8a7740 platforms now use the pinctrl API to control the GETHER
-pins, the corresponding function GPIOS are unused. Remove them.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 3456e2543e9af564d205e03feb010246dc214857)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7740.c | 20 --------------------
- 1 file changed, 20 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-index c78eda8c..58fbe6b1 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-@@ -3410,26 +3410,6 @@ static const struct pinmux_func pinmux_func_gpios[] = {
- 	GPIO_FN(IDE_INT),	GPIO_FN(IDE_RST),	GPIO_FN(IDE_DIRECTION),
- 	GPIO_FN(IDE_EXBUF_ENB),	GPIO_FN(IDE_IODACK),	GPIO_FN(IDE_IODREQ),
- 
--	/* RMII */
--	GPIO_FN(RMII_CRS_DV),	GPIO_FN(RMII_RX_ER),	GPIO_FN(RMII_RXD0),
--	GPIO_FN(RMII_RXD1),	GPIO_FN(RMII_TX_EN),	GPIO_FN(RMII_TXD0),
--	GPIO_FN(RMII_MDC),	GPIO_FN(RMII_TXD1),	GPIO_FN(RMII_MDIO),
--	GPIO_FN(RMII_REF50CK),	GPIO_FN(RMII_REF125CK),	/* for GMII */
--
--	/* GEther */
--	GPIO_FN(ET_TX_CLK),	GPIO_FN(ET_TX_EN),	GPIO_FN(ET_ETXD0),
--	GPIO_FN(ET_ETXD1),	GPIO_FN(ET_ETXD2),	GPIO_FN(ET_ETXD3),
--	GPIO_FN(ET_ETXD4),	GPIO_FN(ET_ETXD5), /* for GEther */
--	GPIO_FN(ET_ETXD6),	GPIO_FN(ET_ETXD7), /* for GEther */
--	GPIO_FN(ET_COL),	GPIO_FN(ET_TX_ER),	GPIO_FN(ET_RX_CLK),
--	GPIO_FN(ET_RX_DV),	GPIO_FN(ET_ERXD0),	GPIO_FN(ET_ERXD1),
--	GPIO_FN(ET_ERXD2),	GPIO_FN(ET_ERXD3),
--	GPIO_FN(ET_ERXD4),	GPIO_FN(ET_ERXD5), /* for GEther */
--	GPIO_FN(ET_ERXD6),	GPIO_FN(ET_ERXD7), /* for GEther */
--	GPIO_FN(ET_RX_ER),	GPIO_FN(ET_CRS),	GPIO_FN(ET_MDC),
--	GPIO_FN(ET_MDIO),	GPIO_FN(ET_LINK),	GPIO_FN(ET_PHY_INT),
--	GPIO_FN(ET_WOL),	GPIO_FN(ET_GTX_CLK),
--
- 	/* DMA0 */
- 	GPIO_FN(DREQ0),	GPIO_FN(DACK0),
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0158-ARM-shmobile-Add-CPU-notifier-based-SCU-boot-vector-.patch b/patches.renesas/0158-ARM-shmobile-Add-CPU-notifier-based-SCU-boot-vector-.patch
deleted file mode 100644
index 0d061f3d1def4..0000000000000
--- a/patches.renesas/0158-ARM-shmobile-Add-CPU-notifier-based-SCU-boot-vector-.patch
+++ /dev/null
@@ -1,71 +0,0 @@
-From efd48a2af3bab7ed75a5280b82031db349a919ac Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Sat, 14 Sep 2013 22:46:25 +0900
-Subject: ARM: shmobile: Add CPU notifier based SCU boot vector code
-
-Add CPU notifiers for the shared mach-shmobile SCU code
-to allow removal of the shared SCU boot_secondary code.
-
-Regarding notifiers, at CPU_UP_PREPARE time the SMP boot
-vector is initialized so secondary CPU cores can boot.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 916d6121b5947f162979595cc1c0396192a9aa86)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/platsmp-scu.c | 24 ++++++++++++++++++++++++
- 1 file changed, 24 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/platsmp-scu.c b/arch/arm/mach-shmobile/platsmp-scu.c
-index c96f50160be6..49ae8dfc625d 100644
---- a/arch/arm/mach-shmobile/platsmp-scu.c
-+++ b/arch/arm/mach-shmobile/platsmp-scu.c
-@@ -7,6 +7,7 @@
-  * it under the terms of the GNU General Public License version 2 as
-  * published by the Free Software Foundation.
-  */
-+#include <linux/cpu.h>
- #include <linux/delay.h>
- #include <linux/init.h>
- #include <linux/io.h>
-@@ -16,6 +17,26 @@
- #include <asm/smp_scu.h>
- #include <mach/common.h>
- 
-+static int shmobile_smp_scu_notifier_call(struct notifier_block *nfb,
-+					  unsigned long action, void *hcpu)
-+{
-+	unsigned int cpu = (long)hcpu;
-+
-+	switch (action) {
-+	case CPU_UP_PREPARE:
-+		/* For this particular CPU register SCU SMP boot vector */
-+		shmobile_smp_hook(cpu, virt_to_phys(shmobile_boot_scu),
-+				  (unsigned long)shmobile_scu_base);
-+		break;
-+	};
-+
-+	return NOTIFY_OK;
-+}
-+
-+static struct notifier_block shmobile_smp_scu_notifier = {
-+	.notifier_call = shmobile_smp_scu_notifier_call,
-+};
-+
- void __init shmobile_smp_scu_prepare_cpus(unsigned int max_cpus)
- {
- 	/* install boot code shared by all CPUs */
-@@ -25,6 +46,9 @@ void __init shmobile_smp_scu_prepare_cpus(unsigned int max_cpus)
- 	/* enable SCU and cache coherency on booting CPU */
- 	scu_enable(shmobile_scu_base);
- 	scu_power_mode(shmobile_scu_base, SCU_PM_NORMAL);
-+
-+	/* Use CPU notifier for reset vector control */
-+	register_cpu_notifier(&shmobile_smp_scu_notifier);
- }
- 
- int shmobile_smp_scu_boot_secondary(unsigned int cpu, struct task_struct *idle)
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0158-ARM-shmobile-Include-all-2-GiB-of-memory-on-APE6EVM-.patch b/patches.renesas/0158-ARM-shmobile-Include-all-2-GiB-of-memory-on-APE6EVM-.patch
deleted file mode 100644
index c4b506ce526de..0000000000000
--- a/patches.renesas/0158-ARM-shmobile-Include-all-2-GiB-of-memory-on-APE6EVM-.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From b93563f618fa65a505e27c6cc870fd133c10264f Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Thu, 31 Oct 2013 12:18:41 +0900
-Subject: ARM: shmobile: Include all 2 GiB of memory on APE6EVM DT Ref
-
-Add 1GiB of DRAM at 0x2_0000_0000 to support the full 2GiB
-of APE6EVM system memory also in case of DT reference.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 9701f442139bd21c4db5b6354611b3d793431a95)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts | 5 +++++
- 1 file changed, 5 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts b/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts
-index 338f0cbfff7a..70b1fff8f4a3 100644
---- a/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts
-+++ b/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts
-@@ -25,6 +25,11 @@
- 		reg = <0 0x40000000 0 0x40000000>;
- 	};
- 
-+	memory@200000000 {
-+		device_type = "memory";
-+		reg = <2 0x00000000 0 0x40000000>;
-+	};
-+
- 	vcc_mmc0: regulator@0 {
- 		compatible = "regulator-fixed";
- 		regulator-name = "MMC0 Vcc";
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0158-sh-pfc-r8a7740-Remove-CEU-function-GPIOS.patch b/patches.renesas/0158-sh-pfc-r8a7740-Remove-CEU-function-GPIOS.patch
deleted file mode 100644
index 55aabd20cf3df..0000000000000
--- a/patches.renesas/0158-sh-pfc-r8a7740-Remove-CEU-function-GPIOS.patch
+++ /dev/null
@@ -1,58 +0,0 @@
-From 97437529269656a83b9a9dc421d23752ba492f5e Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 18 Apr 2013 01:05:50 +0200
-Subject: sh-pfc: r8a7740: Remove CEU function GPIOS
-
-All r8a7740 platforms now use the pinctrl API to control the CEU pins,
-the corresponding function GPIOS are unused. Remove them.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 75c57d2c908c4b1c57139db2f817483dc7052a5e)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7740.c | 28 ----------------------------
- 1 file changed, 28 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-index 58fbe6b1..7ab4ff2b 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-@@ -3232,34 +3232,6 @@ static const struct pinmux_func pinmux_func_gpios[] = {
- 	GPIO_FN(RSPI_SSL3_A),	GPIO_FN(RSPI_CK_A),	GPIO_FN(RSPI_MOSI_A),
- 	GPIO_FN(RSPI_MISO_A),
- 
--	/* VIO CKO */
--	GPIO_FN(VIO_CKO1),
--	GPIO_FN(VIO_CKO2),
--	GPIO_FN(VIO_CKO_1),
--	GPIO_FN(VIO_CKO),
--
--	/* VIO0 */
--	GPIO_FN(VIO0_D0),	GPIO_FN(VIO0_D1),	GPIO_FN(VIO0_D2),
--	GPIO_FN(VIO0_D3),	GPIO_FN(VIO0_D4),	GPIO_FN(VIO0_D5),
--	GPIO_FN(VIO0_D6),	GPIO_FN(VIO0_D7),	GPIO_FN(VIO0_D8),
--	GPIO_FN(VIO0_D9),	GPIO_FN(VIO0_D10),	GPIO_FN(VIO0_D11),
--	GPIO_FN(VIO0_D12),	GPIO_FN(VIO0_VD),	GPIO_FN(VIO0_HD),
--	GPIO_FN(VIO0_CLK),	GPIO_FN(VIO0_FIELD),
--
--	GPIO_FN(VIO0_D13_PORT26), /* MSEL5CR_27_0 */
--	GPIO_FN(VIO0_D14_PORT25),
--	GPIO_FN(VIO0_D15_PORT24),
--
--	GPIO_FN(VIO0_D13_PORT22), /* MSEL5CR_27_1 */
--	GPIO_FN(VIO0_D14_PORT95),
--	GPIO_FN(VIO0_D15_PORT96),
--
--	/* VIO1 */
--	GPIO_FN(VIO1_D0),	GPIO_FN(VIO1_D1),	GPIO_FN(VIO1_D2),
--	GPIO_FN(VIO1_D3),	GPIO_FN(VIO1_D4),	GPIO_FN(VIO1_D5),
--	GPIO_FN(VIO1_D6),	GPIO_FN(VIO1_D7),	GPIO_FN(VIO1_VD),
--	GPIO_FN(VIO1_HD),	GPIO_FN(VIO1_CLK),	GPIO_FN(VIO1_FIELD),
--
- 	/* TPU0 */
- 	GPIO_FN(TPU0TO0),	GPIO_FN(TPU0TO1),	GPIO_FN(TPU0TO3),
- 	GPIO_FN(TPU0TO2_PORT66), /* TPU0TO2 Port 66/202 */
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0159-ARM-shmobile-Include-all-2-GiB-of-memory-on-APE6EVM.patch b/patches.renesas/0159-ARM-shmobile-Include-all-2-GiB-of-memory-on-APE6EVM.patch
deleted file mode 100644
index 389bec7ab6462..0000000000000
--- a/patches.renesas/0159-ARM-shmobile-Include-all-2-GiB-of-memory-on-APE6EVM.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 45aaff16fa0f12f531f778b9d636d43621de75b4 Mon Sep 17 00:00:00 2001
-From: Takashi Yoshii <takasi-y@ops.dti.ne.jp>
-Date: Thu, 31 Oct 2013 12:15:49 +0900
-Subject: ARM: shmobile: Include all 2 GiB of memory on APE6EVM
-
-Add 1GiB of DRAM at 0x2_0000_0000 to support the full 2GiB
-of APE6EVM system memory.
-
-Signed-off-by: Takashi Yoshii <takasi-y@ops.dti.ne.jp>
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 8353f09f579631d095292bd838114833dbe1298f)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a73a4-ape6evm.dts | 5 +++++
- 1 file changed, 5 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a73a4-ape6evm.dts b/arch/arm/boot/dts/r8a73a4-ape6evm.dts
-index e84d1a7db66e..ce085fa444a1 100644
---- a/arch/arm/boot/dts/r8a73a4-ape6evm.dts
-+++ b/arch/arm/boot/dts/r8a73a4-ape6evm.dts
-@@ -25,6 +25,11 @@
- 		reg = <0 0x40000000 0 0x40000000>;
- 	};
- 
-+	memory@200000000 {
-+		device_type = "memory";
-+		reg = <2 0x00000000 0 0x40000000>;
-+	};
-+
- 	ape6evm_fixed_3v3: fixedregulator@0 {
- 		compatible = "regulator-fixed";
- 		regulator-name = "3V3";
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0159-ARM-shmobile-Let-sh73a0-rely-on-SCU-CPU-notifier.patch b/patches.renesas/0159-ARM-shmobile-Let-sh73a0-rely-on-SCU-CPU-notifier.patch
deleted file mode 100644
index 3ada91299c34c..0000000000000
--- a/patches.renesas/0159-ARM-shmobile-Let-sh73a0-rely-on-SCU-CPU-notifier.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From 8f4ba329a647827a3fc2036f05fff70e5d8bf4f6 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Sat, 14 Sep 2013 22:46:34 +0900
-Subject: ARM: shmobile: Let sh73a0 rely on SCU CPU notifier
-
-Now when CPU notifiers are used for SCU boot vector
-setup shmobile_smp_scu_boot_secondary() is no longer
-needed.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 344bc8b0c85a63cd2d946376a391e74f4ea0ae46)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/smp-sh73a0.c | 5 -----
- 1 file changed, 5 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/smp-sh73a0.c b/arch/arm/mach-shmobile/smp-sh73a0.c
-index 25ddffc96bcf..494cd061448e 100644
---- a/arch/arm/mach-shmobile/smp-sh73a0.c
-+++ b/arch/arm/mach-shmobile/smp-sh73a0.c
-@@ -46,11 +46,6 @@ void __init sh73a0_register_twd(void)
- static int __cpuinit sh73a0_boot_secondary(unsigned int cpu, struct task_struct *idle)
- {
- 	unsigned int lcpu = cpu_logical_map(cpu);
--	int ret;
--
--	ret = shmobile_smp_scu_boot_secondary(cpu, idle);
--	if (ret)
--		return ret;
- 
- 	if (((__raw_readl(PSTR) >> (4 * lcpu)) & 3) == 3)
- 		__raw_writel(1 << lcpu, WUPCR);	/* wake up */
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0159-sh-pfc-r8a7740-Remove-FSI-function-GPIOS.patch b/patches.renesas/0159-sh-pfc-r8a7740-Remove-FSI-function-GPIOS.patch
deleted file mode 100644
index 81e9cfacd6d87..0000000000000
--- a/patches.renesas/0159-sh-pfc-r8a7740-Remove-FSI-function-GPIOS.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From 76af5d40895e75873e1ff5e8047c431c5484af0a Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 18 Apr 2013 01:05:50 +0200
-Subject: sh-pfc: r8a7740: Remove FSI function GPIOS
-
-All r8a7740 platforms now use the pinctrl API to control the FSI pins,
-the corresponding function GPIOS are unused. Remove them.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 592e0c30291f86b5f0455c9e524ba01c140ed5f2)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7740.c | 12 ------------
- 1 file changed, 12 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-index 7ab4ff2b..a93fd84c 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-@@ -3207,18 +3207,6 @@ static const struct pinmux_func pinmux_func_gpios[] = {
- 	GPIO_FN(DBGMD10),	GPIO_FN(DBGMD11),	GPIO_FN(DBGMD20),
- 	GPIO_FN(DBGMD21),
- 
--	/* FSI-A */
--	GPIO_FN(FSIAISLD_PORT0),	/* FSIAISLD Port 0/5 */
--	GPIO_FN(FSIAISLD_PORT5),
--	GPIO_FN(FSIASPDIF_PORT9),	/* FSIASPDIF Port 9/18 */
--	GPIO_FN(FSIASPDIF_PORT18),
--	GPIO_FN(FSIAOSLD1),	GPIO_FN(FSIAOSLD2),	GPIO_FN(FSIAOLR),
--	GPIO_FN(FSIAOBT),	GPIO_FN(FSIAOSLD),	GPIO_FN(FSIAOMC),
--	GPIO_FN(FSIACK),	GPIO_FN(FSIAILR),	GPIO_FN(FSIAIBT),
--
--	/* FSI-B */
--	GPIO_FN(FSIBCK),
--
- 	/* FMSI */
- 	GPIO_FN(FMSISLD_PORT1), /* FMSISLD Port 1/6 */
- 	GPIO_FN(FMSISLD_PORT6),
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0160-ARM-shmobile-Include-all-4-GiB-of-memory-on-Lager.patch b/patches.renesas/0160-ARM-shmobile-Include-all-4-GiB-of-memory-on-Lager.patch
deleted file mode 100644
index 3202126d122a9..0000000000000
--- a/patches.renesas/0160-ARM-shmobile-Include-all-4-GiB-of-memory-on-Lager.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From 51e3ce669a5f0d5ccf982c8239cfff2ca43ac124 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Thu, 31 Oct 2013 12:21:41 +0900
-Subject: ARM: shmobile: Include all 4 GiB of memory on Lager
-
-Add 2GiB of DRAM at 0x1_8000_0000 to support the full 4GiB
-of Lager system memory.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 62bc32a2573c421926a292e13b71ad9cc3ebf6e4)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7790-lager.dts | 5 +++++
- 1 file changed, 5 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts
-index 8799dfb0068e..10e6a08164e5 100644
---- a/arch/arm/boot/dts/r8a7790-lager.dts
-+++ b/arch/arm/boot/dts/r8a7790-lager.dts
-@@ -24,6 +24,11 @@
- 		reg = <0 0x40000000 0 0x80000000>;
- 	};
- 
-+	memory@180000000 {
-+		device_type = "memory";
-+		reg = <1 0x80000000 0 0x80000000>;
-+	};
-+
- 	lbsc {
- 		#address-cells = <1>;
- 		#size-cells = <1>;
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0160-ARM-shmobile-Let-EMEV2-rely-on-SCU-CPU-notifier.patch b/patches.renesas/0160-ARM-shmobile-Let-EMEV2-rely-on-SCU-CPU-notifier.patch
deleted file mode 100644
index 7b54902312ef6..0000000000000
--- a/patches.renesas/0160-ARM-shmobile-Let-EMEV2-rely-on-SCU-CPU-notifier.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 2cc476e457b47528854abab2af334e87a965c321 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Sat, 14 Sep 2013 22:46:43 +0900
-Subject: ARM: shmobile: Let EMEV2 rely on SCU CPU notifier
-
-Now when CPU notifiers are used for SCU boot vector
-setup shmobile_smp_scu_boot_secondary() is no longer
-needed.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 344c62f7a65f9124d5262e34dab66d581081a3a7)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/smp-emev2.c | 6 ------
- 1 file changed, 6 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/smp-emev2.c b/arch/arm/mach-shmobile/smp-emev2.c
-index d1c101db776b..a514dfc21e3b 100644
---- a/arch/arm/mach-shmobile/smp-emev2.c
-+++ b/arch/arm/mach-shmobile/smp-emev2.c
-@@ -34,12 +34,6 @@
- 
- static int __cpuinit emev2_boot_secondary(unsigned int cpu, struct task_struct *idle)
- {
--	int ret;
--
--	ret = shmobile_smp_scu_boot_secondary(cpu, idle);
--	if (ret)
--		return ret;
--
- 	arch_send_wakeup_ipi_mask(cpumask_of(cpu_logical_map(cpu)));
- 	return 0;
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0160-sh-pfc-r8a7740-Remove-HDMI-function-GPIOS.patch b/patches.renesas/0160-sh-pfc-r8a7740-Remove-HDMI-function-GPIOS.patch
deleted file mode 100644
index f10e1f84bce54..0000000000000
--- a/patches.renesas/0160-sh-pfc-r8a7740-Remove-HDMI-function-GPIOS.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From cfbe496e5973b300df5b6f7f155555d006ab2ff9 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 18 Apr 2013 01:05:50 +0200
-Subject: sh-pfc: r8a7740: Remove HDMI function GPIOS
-
-All r8a7740 platforms now use the pinctrl API to control the HDMI pins,
-the corresponding function GPIOS are unused. Remove them.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 0f7f51d82c31fdd4eba4b2fef0502248ea812ba7)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7740.c | 4 ----
- 1 file changed, 4 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-index a93fd84c..fb7a3e8e 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-@@ -3386,10 +3386,6 @@ static const struct pinmux_func pinmux_func_gpios[] = {
- 	GPIO_FN(SDENC_CPG),
- 	GPIO_FN(SDENC_DV_CLKI),
- 
--	/* HDMI */
--	GPIO_FN(HDMI_HPD),
--	GPIO_FN(HDMI_CEC),
--
- 	/* SYSC */
- 	GPIO_FN(RESETP_PULLUP),
- 	GPIO_FN(RESETP_PLAIN),
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0161-ARM-shmobile-Include-all-4-GiB-of-memory-on-Lager-DT.patch b/patches.renesas/0161-ARM-shmobile-Include-all-4-GiB-of-memory-on-Lager-DT.patch
deleted file mode 100644
index a69645179083e..0000000000000
--- a/patches.renesas/0161-ARM-shmobile-Include-all-4-GiB-of-memory-on-Lager-DT.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From feac3f7777f4be323233df1135dad0d48f17c5c5 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Thu, 31 Oct 2013 12:24:36 +0900
-Subject: ARM: shmobile: Include all 4 GiB of memory on Lager DT Ref
-
-Add 2GiB of DRAM at 0x1_8000_0000 to support the full 4GiB
-of Lager system memory in case of DT Reference.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit fb8d2ee32e899e53de76b66da5cc3c7149d4fc04)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7790-lager-reference.dts | 5 +++++
- 1 file changed, 5 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a7790-lager-reference.dts b/arch/arm/boot/dts/r8a7790-lager-reference.dts
-index cce7dbfc1954..dfedc0ea82e1 100644
---- a/arch/arm/boot/dts/r8a7790-lager-reference.dts
-+++ b/arch/arm/boot/dts/r8a7790-lager-reference.dts
-@@ -25,6 +25,11 @@
- 		reg = <0 0x40000000 0 0x80000000>;
- 	};
- 
-+	memory@180000000 {
-+		device_type = "memory";
-+		reg = <1 0x80000000 0 0x80000000>;
-+	};
-+
- 	lbsc {
- 		#address-cells = <1>;
- 		#size-cells = <1>;
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0161-ARM-shmobile-Let-r8a7779-rely-on-SCU-CPU-notifier.patch b/patches.renesas/0161-ARM-shmobile-Let-r8a7779-rely-on-SCU-CPU-notifier.patch
deleted file mode 100644
index 7f382c8647bd4..0000000000000
--- a/patches.renesas/0161-ARM-shmobile-Let-r8a7779-rely-on-SCU-CPU-notifier.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From 609f3a92ae979c6e5a6bc7132ca5ebcdf7639d8f Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Sat, 14 Sep 2013 22:46:52 +0900
-Subject: ARM: shmobile: Let r8a7779 rely on SCU CPU notifier
-
-Now when CPU notifiers are used for SCU boot vector
-setup shmobile_smp_scu_boot_secondary() is no longer
-needed.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit deb4928ea39c5eeef1c9f4562b5cee71f06a31ad)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/smp-r8a7779.c | 4 ----
- 1 file changed, 4 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/smp-r8a7779.c b/arch/arm/mach-shmobile/smp-r8a7779.c
-index c159964ea56e..7d30fb5eb15f 100644
---- a/arch/arm/mach-shmobile/smp-r8a7779.c
-+++ b/arch/arm/mach-shmobile/smp-r8a7779.c
-@@ -87,10 +87,6 @@ static int __cpuinit r8a7779_boot_secondary(unsigned int cpu, struct task_struct
- 	unsigned int lcpu = cpu_logical_map(cpu);
- 	int ret;
- 
--	ret = shmobile_smp_scu_boot_secondary(cpu, idle);
--	if (ret)
--		return ret;
--
- 	if (lcpu < ARRAY_SIZE(r8a7779_ch_cpu))
- 		ch = r8a7779_ch_cpu[lcpu];
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0161-cpufreq-rename-index-as-driver_data-in-cpufreq_frequ.patch b/patches.renesas/0161-cpufreq-rename-index-as-driver_data-in-cpufreq_frequ.patch
deleted file mode 100644
index 21da402628e77..0000000000000
--- a/patches.renesas/0161-cpufreq-rename-index-as-driver_data-in-cpufreq_frequ.patch
+++ /dev/null
@@ -1,1259 +0,0 @@
-From 917e749c4ccc58160a88667a4b32c6040ccc4f00 Mon Sep 17 00:00:00 2001
-From: Viresh Kumar <viresh.kumar@linaro.org>
-Date: Sat, 30 Mar 2013 16:25:15 +0530
-Subject: cpufreq: rename index as driver_data in cpufreq_frequency_table
-
-The "index" field of struct cpufreq_frequency_table was never an
-index and isn't used at all by the cpufreq core.  It only is useful
-for cpufreq drivers for their internal purposes.
-
-Many people nowadays blindly set it in ascending order with the
-assumption that the core will use it, which is a mistake.
-
-Rename it to "driver_data" as that's what its purpose is. All of its
-users are updated accordingly.
-
-[rjw: Changelog]
-Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
-Acked-by: Simon Horman <horms+renesas@verge.net.au>
-Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
-
-(cherry picked from commit 5070158804b5339c71809f5e673cea1cfacd804d)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- Documentation/cpu-freq/cpu-drivers.txt             |  10 +-
- arch/arm/mach-davinci/da850.c                      |   8 +-
- arch/arm/mach-s3c24xx/cpufreq-utils.c              |   2 +-
- arch/arm/mach-s3c24xx/cpufreq.c                    |   4 +-
- arch/arm/mach-s3c24xx/pll-s3c2410.c                |  54 +++++-----
- arch/arm/mach-s3c24xx/pll-s3c2440-12000000.c       |  54 +++++-----
- arch/arm/mach-s3c24xx/pll-s3c2440-16934400.c       | 110 ++++++++++-----------
- arch/arm/mach-shmobile/clock-sh7372.c              |   6 +-
- arch/arm/plat-samsung/include/plat/cpu-freq-core.h |   2 +-
- arch/mips/loongson/lemote-2f/clock.c               |   3 +-
- arch/powerpc/platforms/pasemi/cpufreq.c            |   5 +-
- drivers/base/power/opp.c                           |   4 +-
- drivers/cpufreq/acpi-cpufreq.c                     |   6 +-
- drivers/cpufreq/blackfin-cpufreq.c                 |  10 +-
- drivers/cpufreq/e_powersaver.c                     |   8 +-
- drivers/cpufreq/freq_table.c                       |  26 ++---
- drivers/cpufreq/ia64-acpi-cpufreq.c                |   2 +-
- drivers/cpufreq/kirkwood-cpufreq.c                 |   2 +-
- drivers/cpufreq/longhaul.c                         |  16 +--
- drivers/cpufreq/loongson2_cpufreq.c                |   2 +-
- drivers/cpufreq/p4-clockmod.c                      |   4 +-
- drivers/cpufreq/powernow-k6.c                      |   8 +-
- drivers/cpufreq/powernow-k7.c                      |  16 +--
- drivers/cpufreq/powernow-k8.c                      |  18 ++--
- drivers/cpufreq/ppc_cbe_cpufreq.c                  |   4 +-
- drivers/cpufreq/pxa2xx-cpufreq.c                   |   8 +-
- drivers/cpufreq/pxa3xx-cpufreq.c                   |   4 +-
- drivers/cpufreq/s3c2416-cpufreq.c                  |   2 +-
- drivers/cpufreq/s3c64xx-cpufreq.c                  |   2 +-
- drivers/cpufreq/sc520_freq.c                       |   2 +-
- drivers/cpufreq/sparc-us2e-cpufreq.c               |  12 +--
- drivers/cpufreq/sparc-us3-cpufreq.c                |   8 +-
- drivers/cpufreq/spear-cpufreq.c                    |   4 +-
- drivers/cpufreq/speedstep-centrino.c               |   8 +-
- drivers/mfd/db8500-prcmu.c                         |  10 +-
- drivers/sh/clk/core.c                              |   4 +-
- include/linux/cpufreq.h                            |   2 +-
- 37 files changed, 223 insertions(+), 227 deletions(-)
-
-diff --git a/Documentation/cpu-freq/cpu-drivers.txt b/Documentation/cpu-freq/cpu-drivers.txt
-index a3585eac..19fa98e0 100644
---- a/Documentation/cpu-freq/cpu-drivers.txt
-+++ b/Documentation/cpu-freq/cpu-drivers.txt
-@@ -186,7 +186,7 @@ As most cpufreq processors only allow for being set to a few specific
- frequencies, a "frequency table" with some functions might assist in
- some work of the processor driver. Such a "frequency table" consists
- of an array of struct cpufreq_frequency_table entries, with any value in
--"index" you want to use, and the corresponding frequency in
-+"driver_data" you want to use, and the corresponding frequency in
- "frequency". At the end of the table, you need to add a
- cpufreq_frequency_table entry with frequency set to CPUFREQ_TABLE_END. And
- if you want to skip one entry in the table, set the frequency to 
-@@ -214,10 +214,4 @@ int cpufreq_frequency_table_target(struct cpufreq_policy *policy,
- is the corresponding frequency table helper for the ->target
- stage. Just pass the values to this function, and the unsigned int
- index returns the number of the frequency table entry which contains
--the frequency the CPU shall be set to. PLEASE NOTE: This is not the
--"index" which is in this cpufreq_table_entry.index, but instead
--cpufreq_table[index]. So, the new frequency is
--cpufreq_table[index].frequency, and the value you stored into the
--frequency table "index" field is
--cpufreq_table[index].index.
--
-+the frequency the CPU shall be set to.
-diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
-index 4d693384..a0d4f603 100644
---- a/arch/arm/mach-davinci/da850.c
-+++ b/arch/arm/mach-davinci/da850.c
-@@ -1004,7 +1004,7 @@ static const struct da850_opp da850_opp_96 = {
- 
- #define OPP(freq) 		\
- 	{				\
--		.index = (unsigned int) &da850_opp_##freq,	\
-+		.driver_data = (unsigned int) &da850_opp_##freq,	\
- 		.frequency = freq * 1000, \
- 	}
- 
-@@ -1016,7 +1016,7 @@ static struct cpufreq_frequency_table da850_freq_table[] = {
- 	OPP(200),
- 	OPP(96),
- 	{
--		.index		= 0,
-+		.driver_data		= 0,
- 		.frequency	= CPUFREQ_TABLE_END,
- 	},
- };
-@@ -1044,7 +1044,7 @@ static int da850_set_voltage(unsigned int index)
- 	if (!cvdd)
- 		return -ENODEV;
- 
--	opp = (struct da850_opp *) cpufreq_info.freq_table[index].index;
-+	opp = (struct da850_opp *) cpufreq_info.freq_table[index].driver_data;
- 
- 	return regulator_set_voltage(cvdd, opp->cvdd_min, opp->cvdd_max);
- }
-@@ -1125,7 +1125,7 @@ static int da850_set_pll0rate(struct clk *clk, unsigned long index)
- 	struct pll_data *pll = clk->pll_data;
- 	int ret;
- 
--	opp = (struct da850_opp *) cpufreq_info.freq_table[index].index;
-+	opp = (struct da850_opp *) cpufreq_info.freq_table[index].driver_data;
- 	prediv = opp->prediv;
- 	mult = opp->mult;
- 	postdiv = opp->postdiv;
-diff --git a/arch/arm/mach-s3c24xx/cpufreq-utils.c b/arch/arm/mach-s3c24xx/cpufreq-utils.c
-index ddd8280e..2a0aa568 100644
---- a/arch/arm/mach-s3c24xx/cpufreq-utils.c
-+++ b/arch/arm/mach-s3c24xx/cpufreq-utils.c
-@@ -60,5 +60,5 @@ void s3c2410_cpufreq_setrefresh(struct s3c_cpufreq_config *cfg)
-  */
- void s3c2410_set_fvco(struct s3c_cpufreq_config *cfg)
- {
--	__raw_writel(cfg->pll.index, S3C2410_MPLLCON);
-+	__raw_writel(cfg->pll.driver_data, S3C2410_MPLLCON);
- }
-diff --git a/arch/arm/mach-s3c24xx/cpufreq.c b/arch/arm/mach-s3c24xx/cpufreq.c
-index 3c0e78ed..3513e747 100644
---- a/arch/arm/mach-s3c24xx/cpufreq.c
-+++ b/arch/arm/mach-s3c24xx/cpufreq.c
-@@ -70,7 +70,7 @@ static void s3c_cpufreq_getcur(struct s3c_cpufreq_config *cfg)
- 	cfg->freq.pclk = pclk = clk_get_rate(clk_pclk);
- 	cfg->freq.armclk = armclk = clk_get_rate(clk_arm);
- 
--	cfg->pll.index = __raw_readl(S3C2410_MPLLCON);
-+	cfg->pll.driver_data = __raw_readl(S3C2410_MPLLCON);
- 	cfg->pll.frequency = fclk;
- 
- 	cfg->freq.hclk_tns = 1000000000 / (cfg->freq.hclk / 10);
-@@ -431,7 +431,7 @@ static unsigned int suspend_freq;
- static int s3c_cpufreq_suspend(struct cpufreq_policy *policy)
- {
- 	suspend_pll.frequency = clk_get_rate(_clk_mpll);
--	suspend_pll.index = __raw_readl(S3C2410_MPLLCON);
-+	suspend_pll.driver_data = __raw_readl(S3C2410_MPLLCON);
- 	suspend_freq = s3c_cpufreq_get(0) * 1000;
- 
- 	return 0;
-diff --git a/arch/arm/mach-s3c24xx/pll-s3c2410.c b/arch/arm/mach-s3c24xx/pll-s3c2410.c
-index dcf3420a..5e37d368 100644
---- a/arch/arm/mach-s3c24xx/pll-s3c2410.c
-+++ b/arch/arm/mach-s3c24xx/pll-s3c2410.c
-@@ -33,36 +33,36 @@
- #include <plat/cpu-freq-core.h>
- 
- static struct cpufreq_frequency_table pll_vals_12MHz[] = {
--    { .frequency = 34000000,  .index = PLLVAL(82, 2, 3),   },
--    { .frequency = 45000000,  .index = PLLVAL(82, 1, 3),   },
--    { .frequency = 51000000,  .index = PLLVAL(161, 3, 3),  },
--    { .frequency = 48000000,  .index = PLLVAL(120, 2, 3),  },
--    { .frequency = 56000000,  .index = PLLVAL(142, 2, 3),  },
--    { .frequency = 68000000,  .index = PLLVAL(82, 2, 2),   },
--    { .frequency = 79000000,  .index = PLLVAL(71, 1, 2),   },
--    { .frequency = 85000000,  .index = PLLVAL(105, 2, 2),  },
--    { .frequency = 90000000,  .index = PLLVAL(112, 2, 2),  },
--    { .frequency = 101000000, .index = PLLVAL(127, 2, 2),  },
--    { .frequency = 113000000, .index = PLLVAL(105, 1, 2),  },
--    { .frequency = 118000000, .index = PLLVAL(150, 2, 2),  },
--    { .frequency = 124000000, .index = PLLVAL(116, 1, 2),  },
--    { .frequency = 135000000, .index = PLLVAL(82, 2, 1),   },
--    { .frequency = 147000000, .index = PLLVAL(90, 2, 1),   },
--    { .frequency = 152000000, .index = PLLVAL(68, 1, 1),   },
--    { .frequency = 158000000, .index = PLLVAL(71, 1, 1),   },
--    { .frequency = 170000000, .index = PLLVAL(77, 1, 1),   },
--    { .frequency = 180000000, .index = PLLVAL(82, 1, 1),   },
--    { .frequency = 186000000, .index = PLLVAL(85, 1, 1),   },
--    { .frequency = 192000000, .index = PLLVAL(88, 1, 1),   },
--    { .frequency = 203000000, .index = PLLVAL(161, 3, 1),  },
-+    { .frequency = 34000000,  .driver_data = PLLVAL(82, 2, 3),   },
-+    { .frequency = 45000000,  .driver_data = PLLVAL(82, 1, 3),   },
-+    { .frequency = 51000000,  .driver_data = PLLVAL(161, 3, 3),  },
-+    { .frequency = 48000000,  .driver_data = PLLVAL(120, 2, 3),  },
-+    { .frequency = 56000000,  .driver_data = PLLVAL(142, 2, 3),  },
-+    { .frequency = 68000000,  .driver_data = PLLVAL(82, 2, 2),   },
-+    { .frequency = 79000000,  .driver_data = PLLVAL(71, 1, 2),   },
-+    { .frequency = 85000000,  .driver_data = PLLVAL(105, 2, 2),  },
-+    { .frequency = 90000000,  .driver_data = PLLVAL(112, 2, 2),  },
-+    { .frequency = 101000000, .driver_data = PLLVAL(127, 2, 2),  },
-+    { .frequency = 113000000, .driver_data = PLLVAL(105, 1, 2),  },
-+    { .frequency = 118000000, .driver_data = PLLVAL(150, 2, 2),  },
-+    { .frequency = 124000000, .driver_data = PLLVAL(116, 1, 2),  },
-+    { .frequency = 135000000, .driver_data = PLLVAL(82, 2, 1),   },
-+    { .frequency = 147000000, .driver_data = PLLVAL(90, 2, 1),   },
-+    { .frequency = 152000000, .driver_data = PLLVAL(68, 1, 1),   },
-+    { .frequency = 158000000, .driver_data = PLLVAL(71, 1, 1),   },
-+    { .frequency = 170000000, .driver_data = PLLVAL(77, 1, 1),   },
-+    { .frequency = 180000000, .driver_data = PLLVAL(82, 1, 1),   },
-+    { .frequency = 186000000, .driver_data = PLLVAL(85, 1, 1),   },
-+    { .frequency = 192000000, .driver_data = PLLVAL(88, 1, 1),   },
-+    { .frequency = 203000000, .driver_data = PLLVAL(161, 3, 1),  },
- 
-     /* 2410A extras */
- 
--    { .frequency = 210000000, .index = PLLVAL(132, 2, 1),  },
--    { .frequency = 226000000, .index = PLLVAL(105, 1, 1),  },
--    { .frequency = 266000000, .index = PLLVAL(125, 1, 1),  },
--    { .frequency = 268000000, .index = PLLVAL(126, 1, 1),  },
--    { .frequency = 270000000, .index = PLLVAL(127, 1, 1),  },
-+    { .frequency = 210000000, .driver_data = PLLVAL(132, 2, 1),  },
-+    { .frequency = 226000000, .driver_data = PLLVAL(105, 1, 1),  },
-+    { .frequency = 266000000, .driver_data = PLLVAL(125, 1, 1),  },
-+    { .frequency = 268000000, .driver_data = PLLVAL(126, 1, 1),  },
-+    { .frequency = 270000000, .driver_data = PLLVAL(127, 1, 1),  },
- };
- 
- static int s3c2410_plls_add(struct device *dev, struct subsys_interface *sif)
-diff --git a/arch/arm/mach-s3c24xx/pll-s3c2440-12000000.c b/arch/arm/mach-s3c24xx/pll-s3c2440-12000000.c
-index 67378175..a19460e6 100644
---- a/arch/arm/mach-s3c24xx/pll-s3c2440-12000000.c
-+++ b/arch/arm/mach-s3c24xx/pll-s3c2440-12000000.c
-@@ -21,33 +21,33 @@
- #include <plat/cpu-freq-core.h>
- 
- static struct cpufreq_frequency_table s3c2440_plls_12[] __initdata = {
--	{ .frequency = 75000000,	.index = PLLVAL(0x75, 3, 3),  }, 	/* FVco 600.000000 */
--	{ .frequency = 80000000,	.index = PLLVAL(0x98, 4, 3),  }, 	/* FVco 640.000000 */
--	{ .frequency = 90000000,	.index = PLLVAL(0x70, 2, 3),  }, 	/* FVco 720.000000 */
--	{ .frequency = 100000000,	.index = PLLVAL(0x5c, 1, 3),  }, 	/* FVco 800.000000 */
--	{ .frequency = 110000000,	.index = PLLVAL(0x66, 1, 3),  }, 	/* FVco 880.000000 */
--	{ .frequency = 120000000,	.index = PLLVAL(0x70, 1, 3),  }, 	/* FVco 960.000000 */
--	{ .frequency = 150000000,	.index = PLLVAL(0x75, 3, 2),  }, 	/* FVco 600.000000 */
--	{ .frequency = 160000000,	.index = PLLVAL(0x98, 4, 2),  }, 	/* FVco 640.000000 */
--	{ .frequency = 170000000,	.index = PLLVAL(0x4d, 1, 2),  }, 	/* FVco 680.000000 */
--	{ .frequency = 180000000,	.index = PLLVAL(0x70, 2, 2),  }, 	/* FVco 720.000000 */
--	{ .frequency = 190000000,	.index = PLLVAL(0x57, 1, 2),  }, 	/* FVco 760.000000 */
--	{ .frequency = 200000000,	.index = PLLVAL(0x5c, 1, 2),  }, 	/* FVco 800.000000 */
--	{ .frequency = 210000000,	.index = PLLVAL(0x84, 2, 2),  }, 	/* FVco 840.000000 */
--	{ .frequency = 220000000,	.index = PLLVAL(0x66, 1, 2),  }, 	/* FVco 880.000000 */
--	{ .frequency = 230000000,	.index = PLLVAL(0x6b, 1, 2),  }, 	/* FVco 920.000000 */
--	{ .frequency = 240000000,	.index = PLLVAL(0x70, 1, 2),  }, 	/* FVco 960.000000 */
--	{ .frequency = 300000000,	.index = PLLVAL(0x75, 3, 1),  }, 	/* FVco 600.000000 */
--	{ .frequency = 310000000,	.index = PLLVAL(0x93, 4, 1),  }, 	/* FVco 620.000000 */
--	{ .frequency = 320000000,	.index = PLLVAL(0x98, 4, 1),  }, 	/* FVco 640.000000 */
--	{ .frequency = 330000000,	.index = PLLVAL(0x66, 2, 1),  }, 	/* FVco 660.000000 */
--	{ .frequency = 340000000,	.index = PLLVAL(0x4d, 1, 1),  }, 	/* FVco 680.000000 */
--	{ .frequency = 350000000,	.index = PLLVAL(0xa7, 4, 1),  }, 	/* FVco 700.000000 */
--	{ .frequency = 360000000,	.index = PLLVAL(0x70, 2, 1),  }, 	/* FVco 720.000000 */
--	{ .frequency = 370000000,	.index = PLLVAL(0xb1, 4, 1),  }, 	/* FVco 740.000000 */
--	{ .frequency = 380000000,	.index = PLLVAL(0x57, 1, 1),  }, 	/* FVco 760.000000 */
--	{ .frequency = 390000000,	.index = PLLVAL(0x7a, 2, 1),  }, 	/* FVco 780.000000 */
--	{ .frequency = 400000000,	.index = PLLVAL(0x5c, 1, 1),  }, 	/* FVco 800.000000 */
-+	{ .frequency = 75000000,	.driver_data = PLLVAL(0x75, 3, 3),  }, 	/* FVco 600.000000 */
-+	{ .frequency = 80000000,	.driver_data = PLLVAL(0x98, 4, 3),  }, 	/* FVco 640.000000 */
-+	{ .frequency = 90000000,	.driver_data = PLLVAL(0x70, 2, 3),  }, 	/* FVco 720.000000 */
-+	{ .frequency = 100000000,	.driver_data = PLLVAL(0x5c, 1, 3),  }, 	/* FVco 800.000000 */
-+	{ .frequency = 110000000,	.driver_data = PLLVAL(0x66, 1, 3),  }, 	/* FVco 880.000000 */
-+	{ .frequency = 120000000,	.driver_data = PLLVAL(0x70, 1, 3),  }, 	/* FVco 960.000000 */
-+	{ .frequency = 150000000,	.driver_data = PLLVAL(0x75, 3, 2),  }, 	/* FVco 600.000000 */
-+	{ .frequency = 160000000,	.driver_data = PLLVAL(0x98, 4, 2),  }, 	/* FVco 640.000000 */
-+	{ .frequency = 170000000,	.driver_data = PLLVAL(0x4d, 1, 2),  }, 	/* FVco 680.000000 */
-+	{ .frequency = 180000000,	.driver_data = PLLVAL(0x70, 2, 2),  }, 	/* FVco 720.000000 */
-+	{ .frequency = 190000000,	.driver_data = PLLVAL(0x57, 1, 2),  }, 	/* FVco 760.000000 */
-+	{ .frequency = 200000000,	.driver_data = PLLVAL(0x5c, 1, 2),  }, 	/* FVco 800.000000 */
-+	{ .frequency = 210000000,	.driver_data = PLLVAL(0x84, 2, 2),  }, 	/* FVco 840.000000 */
-+	{ .frequency = 220000000,	.driver_data = PLLVAL(0x66, 1, 2),  }, 	/* FVco 880.000000 */
-+	{ .frequency = 230000000,	.driver_data = PLLVAL(0x6b, 1, 2),  }, 	/* FVco 920.000000 */
-+	{ .frequency = 240000000,	.driver_data = PLLVAL(0x70, 1, 2),  }, 	/* FVco 960.000000 */
-+	{ .frequency = 300000000,	.driver_data = PLLVAL(0x75, 3, 1),  }, 	/* FVco 600.000000 */
-+	{ .frequency = 310000000,	.driver_data = PLLVAL(0x93, 4, 1),  }, 	/* FVco 620.000000 */
-+	{ .frequency = 320000000,	.driver_data = PLLVAL(0x98, 4, 1),  }, 	/* FVco 640.000000 */
-+	{ .frequency = 330000000,	.driver_data = PLLVAL(0x66, 2, 1),  }, 	/* FVco 660.000000 */
-+	{ .frequency = 340000000,	.driver_data = PLLVAL(0x4d, 1, 1),  }, 	/* FVco 680.000000 */
-+	{ .frequency = 350000000,	.driver_data = PLLVAL(0xa7, 4, 1),  }, 	/* FVco 700.000000 */
-+	{ .frequency = 360000000,	.driver_data = PLLVAL(0x70, 2, 1),  }, 	/* FVco 720.000000 */
-+	{ .frequency = 370000000,	.driver_data = PLLVAL(0xb1, 4, 1),  }, 	/* FVco 740.000000 */
-+	{ .frequency = 380000000,	.driver_data = PLLVAL(0x57, 1, 1),  }, 	/* FVco 760.000000 */
-+	{ .frequency = 390000000,	.driver_data = PLLVAL(0x7a, 2, 1),  }, 	/* FVco 780.000000 */
-+	{ .frequency = 400000000,	.driver_data = PLLVAL(0x5c, 1, 1),  }, 	/* FVco 800.000000 */
- };
- 
- static int s3c2440_plls12_add(struct device *dev, struct subsys_interface *sif)
-diff --git a/arch/arm/mach-s3c24xx/pll-s3c2440-16934400.c b/arch/arm/mach-s3c24xx/pll-s3c2440-16934400.c
-index debfa106..1191b290 100644
---- a/arch/arm/mach-s3c24xx/pll-s3c2440-16934400.c
-+++ b/arch/arm/mach-s3c24xx/pll-s3c2440-16934400.c
-@@ -21,61 +21,61 @@
- #include <plat/cpu-freq-core.h>
- 
- static struct cpufreq_frequency_table s3c2440_plls_169344[] __initdata = {
--	{ .frequency = 78019200,	.index = PLLVAL(121, 5, 3), 	}, 	/* FVco 624.153600 */
--	{ .frequency = 84067200,	.index = PLLVAL(131, 5, 3), 	}, 	/* FVco 672.537600 */
--	{ .frequency = 90115200,	.index = PLLVAL(141, 5, 3), 	}, 	/* FVco 720.921600 */
--	{ .frequency = 96163200,	.index = PLLVAL(151, 5, 3), 	}, 	/* FVco 769.305600 */
--	{ .frequency = 102135600,	.index = PLLVAL(185, 6, 3), 	}, 	/* FVco 817.084800 */
--	{ .frequency = 108259200,	.index = PLLVAL(171, 5, 3), 	}, 	/* FVco 866.073600 */
--	{ .frequency = 114307200,	.index = PLLVAL(127, 3, 3), 	}, 	/* FVco 914.457600 */
--	{ .frequency = 120234240,	.index = PLLVAL(134, 3, 3), 	}, 	/* FVco 961.873920 */
--	{ .frequency = 126161280,	.index = PLLVAL(141, 3, 3), 	}, 	/* FVco 1009.290240 */
--	{ .frequency = 132088320,	.index = PLLVAL(148, 3, 3), 	}, 	/* FVco 1056.706560 */
--	{ .frequency = 138015360,	.index = PLLVAL(155, 3, 3), 	}, 	/* FVco 1104.122880 */
--	{ .frequency = 144789120,	.index = PLLVAL(163, 3, 3), 	}, 	/* FVco 1158.312960 */
--	{ .frequency = 150100363,	.index = PLLVAL(187, 9, 2), 	}, 	/* FVco 600.401454 */
--	{ .frequency = 156038400,	.index = PLLVAL(121, 5, 2), 	}, 	/* FVco 624.153600 */
--	{ .frequency = 162086400,	.index = PLLVAL(126, 5, 2), 	}, 	/* FVco 648.345600 */
--	{ .frequency = 168134400,	.index = PLLVAL(131, 5, 2), 	}, 	/* FVco 672.537600 */
--	{ .frequency = 174048000,	.index = PLLVAL(177, 7, 2), 	}, 	/* FVco 696.192000 */
--	{ .frequency = 180230400,	.index = PLLVAL(141, 5, 2), 	}, 	/* FVco 720.921600 */
--	{ .frequency = 186278400,	.index = PLLVAL(124, 4, 2), 	}, 	/* FVco 745.113600 */
--	{ .frequency = 192326400,	.index = PLLVAL(151, 5, 2), 	}, 	/* FVco 769.305600 */
--	{ .frequency = 198132480,	.index = PLLVAL(109, 3, 2), 	}, 	/* FVco 792.529920 */
--	{ .frequency = 204271200,	.index = PLLVAL(185, 6, 2), 	}, 	/* FVco 817.084800 */
--	{ .frequency = 210268800,	.index = PLLVAL(141, 4, 2), 	}, 	/* FVco 841.075200 */
--	{ .frequency = 216518400,	.index = PLLVAL(171, 5, 2), 	}, 	/* FVco 866.073600 */
--	{ .frequency = 222264000,	.index = PLLVAL(97, 2, 2), 	}, 	/* FVco 889.056000 */
--	{ .frequency = 228614400,	.index = PLLVAL(127, 3, 2), 	}, 	/* FVco 914.457600 */
--	{ .frequency = 234259200,	.index = PLLVAL(158, 4, 2), 	}, 	/* FVco 937.036800 */
--	{ .frequency = 240468480,	.index = PLLVAL(134, 3, 2), 	}, 	/* FVco 961.873920 */
--	{ .frequency = 246960000,	.index = PLLVAL(167, 4, 2), 	}, 	/* FVco 987.840000 */
--	{ .frequency = 252322560,	.index = PLLVAL(141, 3, 2), 	}, 	/* FVco 1009.290240 */
--	{ .frequency = 258249600,	.index = PLLVAL(114, 2, 2), 	}, 	/* FVco 1032.998400 */
--	{ .frequency = 264176640,	.index = PLLVAL(148, 3, 2), 	}, 	/* FVco 1056.706560 */
--	{ .frequency = 270950400,	.index = PLLVAL(120, 2, 2), 	}, 	/* FVco 1083.801600 */
--	{ .frequency = 276030720,	.index = PLLVAL(155, 3, 2), 	}, 	/* FVco 1104.122880 */
--	{ .frequency = 282240000,	.index = PLLVAL(92, 1, 2), 	}, 	/* FVco 1128.960000 */
--	{ .frequency = 289578240,	.index = PLLVAL(163, 3, 2), 	}, 	/* FVco 1158.312960 */
--	{ .frequency = 294235200,	.index = PLLVAL(131, 2, 2), 	}, 	/* FVco 1176.940800 */
--	{ .frequency = 300200727,	.index = PLLVAL(187, 9, 1), 	}, 	/* FVco 600.401454 */
--	{ .frequency = 306358690,	.index = PLLVAL(191, 9, 1), 	}, 	/* FVco 612.717380 */
--	{ .frequency = 312076800,	.index = PLLVAL(121, 5, 1), 	}, 	/* FVco 624.153600 */
--	{ .frequency = 318366720,	.index = PLLVAL(86, 3, 1), 	}, 	/* FVco 636.733440 */
--	{ .frequency = 324172800,	.index = PLLVAL(126, 5, 1), 	}, 	/* FVco 648.345600 */
--	{ .frequency = 330220800,	.index = PLLVAL(109, 4, 1), 	}, 	/* FVco 660.441600 */
--	{ .frequency = 336268800,	.index = PLLVAL(131, 5, 1), 	}, 	/* FVco 672.537600 */
--	{ .frequency = 342074880,	.index = PLLVAL(93, 3, 1), 	}, 	/* FVco 684.149760 */
--	{ .frequency = 348096000,	.index = PLLVAL(177, 7, 1), 	}, 	/* FVco 696.192000 */
--	{ .frequency = 355622400,	.index = PLLVAL(118, 4, 1), 	}, 	/* FVco 711.244800 */
--	{ .frequency = 360460800,	.index = PLLVAL(141, 5, 1), 	}, 	/* FVco 720.921600 */
--	{ .frequency = 366206400,	.index = PLLVAL(165, 6, 1), 	}, 	/* FVco 732.412800 */
--	{ .frequency = 372556800,	.index = PLLVAL(124, 4, 1), 	}, 	/* FVco 745.113600 */
--	{ .frequency = 378201600,	.index = PLLVAL(126, 4, 1), 	}, 	/* FVco 756.403200 */
--	{ .frequency = 384652800,	.index = PLLVAL(151, 5, 1), 	}, 	/* FVco 769.305600 */
--	{ .frequency = 391608000,	.index = PLLVAL(177, 6, 1), 	}, 	/* FVco 783.216000 */
--	{ .frequency = 396264960,	.index = PLLVAL(109, 3, 1), 	}, 	/* FVco 792.529920 */
--	{ .frequency = 402192000,	.index = PLLVAL(87, 2, 1), 	}, 	/* FVco 804.384000 */
-+	{ .frequency = 78019200,	.driver_data = PLLVAL(121, 5, 3), 	}, 	/* FVco 624.153600 */
-+	{ .frequency = 84067200,	.driver_data = PLLVAL(131, 5, 3), 	}, 	/* FVco 672.537600 */
-+	{ .frequency = 90115200,	.driver_data = PLLVAL(141, 5, 3), 	}, 	/* FVco 720.921600 */
-+	{ .frequency = 96163200,	.driver_data = PLLVAL(151, 5, 3), 	}, 	/* FVco 769.305600 */
-+	{ .frequency = 102135600,	.driver_data = PLLVAL(185, 6, 3), 	}, 	/* FVco 817.084800 */
-+	{ .frequency = 108259200,	.driver_data = PLLVAL(171, 5, 3), 	}, 	/* FVco 866.073600 */
-+	{ .frequency = 114307200,	.driver_data = PLLVAL(127, 3, 3), 	}, 	/* FVco 914.457600 */
-+	{ .frequency = 120234240,	.driver_data = PLLVAL(134, 3, 3), 	}, 	/* FVco 961.873920 */
-+	{ .frequency = 126161280,	.driver_data = PLLVAL(141, 3, 3), 	}, 	/* FVco 1009.290240 */
-+	{ .frequency = 132088320,	.driver_data = PLLVAL(148, 3, 3), 	}, 	/* FVco 1056.706560 */
-+	{ .frequency = 138015360,	.driver_data = PLLVAL(155, 3, 3), 	}, 	/* FVco 1104.122880 */
-+	{ .frequency = 144789120,	.driver_data = PLLVAL(163, 3, 3), 	}, 	/* FVco 1158.312960 */
-+	{ .frequency = 150100363,	.driver_data = PLLVAL(187, 9, 2), 	}, 	/* FVco 600.401454 */
-+	{ .frequency = 156038400,	.driver_data = PLLVAL(121, 5, 2), 	}, 	/* FVco 624.153600 */
-+	{ .frequency = 162086400,	.driver_data = PLLVAL(126, 5, 2), 	}, 	/* FVco 648.345600 */
-+	{ .frequency = 168134400,	.driver_data = PLLVAL(131, 5, 2), 	}, 	/* FVco 672.537600 */
-+	{ .frequency = 174048000,	.driver_data = PLLVAL(177, 7, 2), 	}, 	/* FVco 696.192000 */
-+	{ .frequency = 180230400,	.driver_data = PLLVAL(141, 5, 2), 	}, 	/* FVco 720.921600 */
-+	{ .frequency = 186278400,	.driver_data = PLLVAL(124, 4, 2), 	}, 	/* FVco 745.113600 */
-+	{ .frequency = 192326400,	.driver_data = PLLVAL(151, 5, 2), 	}, 	/* FVco 769.305600 */
-+	{ .frequency = 198132480,	.driver_data = PLLVAL(109, 3, 2), 	}, 	/* FVco 792.529920 */
-+	{ .frequency = 204271200,	.driver_data = PLLVAL(185, 6, 2), 	}, 	/* FVco 817.084800 */
-+	{ .frequency = 210268800,	.driver_data = PLLVAL(141, 4, 2), 	}, 	/* FVco 841.075200 */
-+	{ .frequency = 216518400,	.driver_data = PLLVAL(171, 5, 2), 	}, 	/* FVco 866.073600 */
-+	{ .frequency = 222264000,	.driver_data = PLLVAL(97, 2, 2), 	}, 	/* FVco 889.056000 */
-+	{ .frequency = 228614400,	.driver_data = PLLVAL(127, 3, 2), 	}, 	/* FVco 914.457600 */
-+	{ .frequency = 234259200,	.driver_data = PLLVAL(158, 4, 2), 	}, 	/* FVco 937.036800 */
-+	{ .frequency = 240468480,	.driver_data = PLLVAL(134, 3, 2), 	}, 	/* FVco 961.873920 */
-+	{ .frequency = 246960000,	.driver_data = PLLVAL(167, 4, 2), 	}, 	/* FVco 987.840000 */
-+	{ .frequency = 252322560,	.driver_data = PLLVAL(141, 3, 2), 	}, 	/* FVco 1009.290240 */
-+	{ .frequency = 258249600,	.driver_data = PLLVAL(114, 2, 2), 	}, 	/* FVco 1032.998400 */
-+	{ .frequency = 264176640,	.driver_data = PLLVAL(148, 3, 2), 	}, 	/* FVco 1056.706560 */
-+	{ .frequency = 270950400,	.driver_data = PLLVAL(120, 2, 2), 	}, 	/* FVco 1083.801600 */
-+	{ .frequency = 276030720,	.driver_data = PLLVAL(155, 3, 2), 	}, 	/* FVco 1104.122880 */
-+	{ .frequency = 282240000,	.driver_data = PLLVAL(92, 1, 2), 	}, 	/* FVco 1128.960000 */
-+	{ .frequency = 289578240,	.driver_data = PLLVAL(163, 3, 2), 	}, 	/* FVco 1158.312960 */
-+	{ .frequency = 294235200,	.driver_data = PLLVAL(131, 2, 2), 	}, 	/* FVco 1176.940800 */
-+	{ .frequency = 300200727,	.driver_data = PLLVAL(187, 9, 1), 	}, 	/* FVco 600.401454 */
-+	{ .frequency = 306358690,	.driver_data = PLLVAL(191, 9, 1), 	}, 	/* FVco 612.717380 */
-+	{ .frequency = 312076800,	.driver_data = PLLVAL(121, 5, 1), 	}, 	/* FVco 624.153600 */
-+	{ .frequency = 318366720,	.driver_data = PLLVAL(86, 3, 1), 	}, 	/* FVco 636.733440 */
-+	{ .frequency = 324172800,	.driver_data = PLLVAL(126, 5, 1), 	}, 	/* FVco 648.345600 */
-+	{ .frequency = 330220800,	.driver_data = PLLVAL(109, 4, 1), 	}, 	/* FVco 660.441600 */
-+	{ .frequency = 336268800,	.driver_data = PLLVAL(131, 5, 1), 	}, 	/* FVco 672.537600 */
-+	{ .frequency = 342074880,	.driver_data = PLLVAL(93, 3, 1), 	}, 	/* FVco 684.149760 */
-+	{ .frequency = 348096000,	.driver_data = PLLVAL(177, 7, 1), 	}, 	/* FVco 696.192000 */
-+	{ .frequency = 355622400,	.driver_data = PLLVAL(118, 4, 1), 	}, 	/* FVco 711.244800 */
-+	{ .frequency = 360460800,	.driver_data = PLLVAL(141, 5, 1), 	}, 	/* FVco 720.921600 */
-+	{ .frequency = 366206400,	.driver_data = PLLVAL(165, 6, 1), 	}, 	/* FVco 732.412800 */
-+	{ .frequency = 372556800,	.driver_data = PLLVAL(124, 4, 1), 	}, 	/* FVco 745.113600 */
-+	{ .frequency = 378201600,	.driver_data = PLLVAL(126, 4, 1), 	}, 	/* FVco 756.403200 */
-+	{ .frequency = 384652800,	.driver_data = PLLVAL(151, 5, 1), 	}, 	/* FVco 769.305600 */
-+	{ .frequency = 391608000,	.driver_data = PLLVAL(177, 6, 1), 	}, 	/* FVco 783.216000 */
-+	{ .frequency = 396264960,	.driver_data = PLLVAL(109, 3, 1), 	}, 	/* FVco 792.529920 */
-+	{ .frequency = 402192000,	.driver_data = PLLVAL(87, 2, 1), 	}, 	/* FVco 804.384000 */
- };
- 
- static int s3c2440_plls169344_add(struct device *dev,
-diff --git a/arch/arm/mach-shmobile/clock-sh7372.c b/arch/arm/mach-shmobile/clock-sh7372.c
-index 7e105932..5390c6bb 100644
---- a/arch/arm/mach-shmobile/clock-sh7372.c
-+++ b/arch/arm/mach-shmobile/clock-sh7372.c
-@@ -142,15 +142,15 @@ static void pllc2_table_rebuild(struct clk *clk)
- 	/* Initialise PLLC2 frequency table */
- 	for (i = 0; i < ARRAY_SIZE(pllc2_freq_table) - 2; i++) {
- 		pllc2_freq_table[i].frequency = clk->parent->rate * (i + 20) * 2;
--		pllc2_freq_table[i].index = i;
-+		pllc2_freq_table[i].driver_data = i;
- 	}
- 
- 	/* This is a special entry - switching PLL off makes it a repeater */
- 	pllc2_freq_table[i].frequency = clk->parent->rate;
--	pllc2_freq_table[i].index = i;
-+	pllc2_freq_table[i].driver_data = i;
- 
- 	pllc2_freq_table[++i].frequency = CPUFREQ_TABLE_END;
--	pllc2_freq_table[i].index = i;
-+	pllc2_freq_table[i].driver_data = i;
- }
- 
- static unsigned long pllc2_recalc(struct clk *clk)
-diff --git a/arch/arm/plat-samsung/include/plat/cpu-freq-core.h b/arch/arm/plat-samsung/include/plat/cpu-freq-core.h
-index 95509d8e..a8a760dd 100644
---- a/arch/arm/plat-samsung/include/plat/cpu-freq-core.h
-+++ b/arch/arm/plat-samsung/include/plat/cpu-freq-core.h
-@@ -285,7 +285,7 @@ static inline int s3c_cpufreq_addfreq(struct cpufreq_frequency_table *table,
- 		s3c_freq_dbg("%s: { %d = %u kHz }\n",
- 			     __func__, index, freq);
- 
--		table[index].index = index;
-+		table[index].driver_data = index;
- 		table[index].frequency = freq;
- 	}
- 
-diff --git a/arch/mips/loongson/lemote-2f/clock.c b/arch/mips/loongson/lemote-2f/clock.c
-index bc739d4b..4dc2f5fa 100644
---- a/arch/mips/loongson/lemote-2f/clock.c
-+++ b/arch/mips/loongson/lemote-2f/clock.c
-@@ -121,7 +121,8 @@ int clk_set_rate(struct clk *clk, unsigned long rate)
- 	clk->rate = rate;
- 
- 	regval = LOONGSON_CHIPCFG0;
--	regval = (regval & ~0x7) | (loongson2_clockmod_table[i].index - 1);
-+	regval = (regval & ~0x7) |
-+		(loongson2_clockmod_table[i].driver_data - 1);
- 	LOONGSON_CHIPCFG0 = regval;
- 
- 	return ret;
-diff --git a/arch/powerpc/platforms/pasemi/cpufreq.c b/arch/powerpc/platforms/pasemi/cpufreq.c
-index be1e7958..b704da40 100644
---- a/arch/powerpc/platforms/pasemi/cpufreq.c
-+++ b/arch/powerpc/platforms/pasemi/cpufreq.c
-@@ -204,7 +204,8 @@ static int pas_cpufreq_cpu_init(struct cpufreq_policy *policy)
- 
- 	/* initialize frequency table */
- 	for (i=0; pas_freqs[i].frequency!=CPUFREQ_TABLE_END; i++) {
--		pas_freqs[i].frequency = get_astate_freq(pas_freqs[i].index) * 100000;
-+		pas_freqs[i].frequency =
-+			get_astate_freq(pas_freqs[i].driver_data) * 100000;
- 		pr_debug("%d: %d\n", i, pas_freqs[i].frequency);
- 	}
- 
-@@ -280,7 +281,7 @@ static int pas_cpufreq_target(struct cpufreq_policy *policy,
- 	pr_debug("setting frequency for cpu %d to %d kHz, 1/%d of max frequency\n",
- 		 policy->cpu,
- 		 pas_freqs[pas_astate_new].frequency,
--		 pas_freqs[pas_astate_new].index);
-+		 pas_freqs[pas_astate_new].driver_data);
- 
- 	current_astate = pas_astate_new;
- 
-diff --git a/drivers/base/power/opp.c b/drivers/base/power/opp.c
-index f0077cb8..c8ec1863 100644
---- a/drivers/base/power/opp.c
-+++ b/drivers/base/power/opp.c
-@@ -648,14 +648,14 @@ int opp_init_cpufreq_table(struct device *dev,
- 
- 	list_for_each_entry(opp, &dev_opp->opp_list, node) {
- 		if (opp->available) {
--			freq_table[i].index = i;
-+			freq_table[i].driver_data = i;
- 			freq_table[i].frequency = opp->rate / 1000;
- 			i++;
- 		}
- 	}
- 	mutex_unlock(&dev_opp_list_lock);
- 
--	freq_table[i].index = i;
-+	freq_table[i].driver_data = i;
- 	freq_table[i].frequency = CPUFREQ_TABLE_END;
- 
- 	*table = &freq_table[0];
-diff --git a/drivers/cpufreq/acpi-cpufreq.c b/drivers/cpufreq/acpi-cpufreq.c
-index edc089e9..c24cba1c 100644
---- a/drivers/cpufreq/acpi-cpufreq.c
-+++ b/drivers/cpufreq/acpi-cpufreq.c
-@@ -232,7 +232,7 @@ static unsigned extract_msr(u32 msr, struct acpi_cpufreq_data *data)
- 	perf = data->acpi_data;
- 
- 	for (i = 0; data->freq_table[i].frequency != CPUFREQ_TABLE_END; i++) {
--		if (msr == perf->states[data->freq_table[i].index].status)
-+		if (msr == perf->states[data->freq_table[i].driver_data].status)
- 			return data->freq_table[i].frequency;
- 	}
- 	return data->freq_table[0].frequency;
-@@ -442,7 +442,7 @@ static int acpi_cpufreq_target(struct cpufreq_policy *policy,
- 		goto out;
- 	}
- 
--	next_perf_state = data->freq_table[next_state].index;
-+	next_perf_state = data->freq_table[next_state].driver_data;
- 	if (perf->state == next_perf_state) {
- 		if (unlikely(data->resume)) {
- 			pr_debug("Called after resume, resetting to P%d\n",
-@@ -811,7 +811,7 @@ static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy)
- 		    data->freq_table[valid_states-1].frequency / 1000)
- 			continue;
- 
--		data->freq_table[valid_states].index = i;
-+		data->freq_table[valid_states].driver_data = i;
- 		data->freq_table[valid_states].frequency =
- 		    perf->states[i].core_frequency * 1000;
- 		valid_states++;
-diff --git a/drivers/cpufreq/blackfin-cpufreq.c b/drivers/cpufreq/blackfin-cpufreq.c
-index 995511e80..9cdbbd27 100644
---- a/drivers/cpufreq/blackfin-cpufreq.c
-+++ b/drivers/cpufreq/blackfin-cpufreq.c
-@@ -20,23 +20,23 @@
- 
- 
- /* this is the table of CCLK frequencies, in Hz */
--/* .index is the entry in the auxiliary dpm_state_table[] */
-+/* .driver_data is the entry in the auxiliary dpm_state_table[] */
- static struct cpufreq_frequency_table bfin_freq_table[] = {
- 	{
- 		.frequency = CPUFREQ_TABLE_END,
--		.index = 0,
-+		.driver_data = 0,
- 	},
- 	{
- 		.frequency = CPUFREQ_TABLE_END,
--		.index = 1,
-+		.driver_data = 1,
- 	},
- 	{
- 		.frequency = CPUFREQ_TABLE_END,
--		.index = 2,
-+		.driver_data = 2,
- 	},
- 	{
- 		.frequency = CPUFREQ_TABLE_END,
--		.index = 0,
-+		.driver_data = 0,
- 	},
- };
- 
-diff --git a/drivers/cpufreq/e_powersaver.c b/drivers/cpufreq/e_powersaver.c
-index 37380fb9..324aff20 100644
---- a/drivers/cpufreq/e_powersaver.c
-+++ b/drivers/cpufreq/e_powersaver.c
-@@ -188,7 +188,7 @@ static int eps_target(struct cpufreq_policy *policy,
- 	}
- 
- 	/* Make frequency transition */
--	dest_state = centaur->freq_table[newstate].index & 0xffff;
-+	dest_state = centaur->freq_table[newstate].driver_data & 0xffff;
- 	ret = eps_set_state(centaur, policy, dest_state);
- 	if (ret)
- 		printk(KERN_ERR "eps: Timeout!\n");
-@@ -380,9 +380,9 @@ static int eps_cpu_init(struct cpufreq_policy *policy)
- 	f_table = &centaur->freq_table[0];
- 	if (brand != EPS_BRAND_C7M) {
- 		f_table[0].frequency = fsb * min_multiplier;
--		f_table[0].index = (min_multiplier << 8) | min_voltage;
-+		f_table[0].driver_data = (min_multiplier << 8) | min_voltage;
- 		f_table[1].frequency = fsb * max_multiplier;
--		f_table[1].index = (max_multiplier << 8) | max_voltage;
-+		f_table[1].driver_data = (max_multiplier << 8) | max_voltage;
- 		f_table[2].frequency = CPUFREQ_TABLE_END;
- 	} else {
- 		k = 0;
-@@ -391,7 +391,7 @@ static int eps_cpu_init(struct cpufreq_policy *policy)
- 		for (i = min_multiplier; i <= max_multiplier; i++) {
- 			voltage = (k * step) / 256 + min_voltage;
- 			f_table[k].frequency = fsb * i;
--			f_table[k].index = (i << 8) | voltage;
-+			f_table[k].driver_data = (i << 8) | voltage;
- 			k++;
- 		}
- 		f_table[k].frequency = CPUFREQ_TABLE_END;
-diff --git a/drivers/cpufreq/freq_table.c b/drivers/cpufreq/freq_table.c
-index d7a79662..f0d87412 100644
---- a/drivers/cpufreq/freq_table.c
-+++ b/drivers/cpufreq/freq_table.c
-@@ -34,8 +34,8 @@ int cpufreq_frequency_table_cpuinfo(struct cpufreq_policy *policy,
- 
- 			continue;
- 		}
--		pr_debug("table entry %u: %u kHz, %u index\n",
--					i, freq, table[i].index);
-+		pr_debug("table entry %u: %u kHz, %u driver_data\n",
-+					i, freq, table[i].driver_data);
- 		if (freq < min_freq)
- 			min_freq = freq;
- 		if (freq > max_freq)
-@@ -97,11 +97,11 @@ int cpufreq_frequency_table_target(struct cpufreq_policy *policy,
- 				   unsigned int *index)
- {
- 	struct cpufreq_frequency_table optimal = {
--		.index = ~0,
-+		.driver_data = ~0,
- 		.frequency = 0,
- 	};
- 	struct cpufreq_frequency_table suboptimal = {
--		.index = ~0,
-+		.driver_data = ~0,
- 		.frequency = 0,
- 	};
- 	unsigned int i;
-@@ -129,12 +129,12 @@ int cpufreq_frequency_table_target(struct cpufreq_policy *policy,
- 			if (freq <= target_freq) {
- 				if (freq >= optimal.frequency) {
- 					optimal.frequency = freq;
--					optimal.index = i;
-+					optimal.driver_data = i;
- 				}
- 			} else {
- 				if (freq <= suboptimal.frequency) {
- 					suboptimal.frequency = freq;
--					suboptimal.index = i;
-+					suboptimal.driver_data = i;
- 				}
- 			}
- 			break;
-@@ -142,26 +142,26 @@ int cpufreq_frequency_table_target(struct cpufreq_policy *policy,
- 			if (freq >= target_freq) {
- 				if (freq <= optimal.frequency) {
- 					optimal.frequency = freq;
--					optimal.index = i;
-+					optimal.driver_data = i;
- 				}
- 			} else {
- 				if (freq >= suboptimal.frequency) {
- 					suboptimal.frequency = freq;
--					suboptimal.index = i;
-+					suboptimal.driver_data = i;
- 				}
- 			}
- 			break;
- 		}
- 	}
--	if (optimal.index > i) {
--		if (suboptimal.index > i)
-+	if (optimal.driver_data > i) {
-+		if (suboptimal.driver_data > i)
- 			return -EINVAL;
--		*index = suboptimal.index;
-+		*index = suboptimal.driver_data;
- 	} else
--		*index = optimal.index;
-+		*index = optimal.driver_data;
- 
- 	pr_debug("target is %u (%u kHz, %u)\n", *index, table[*index].frequency,
--		table[*index].index);
-+		table[*index].driver_data);
- 
- 	return 0;
- }
-diff --git a/drivers/cpufreq/ia64-acpi-cpufreq.c b/drivers/cpufreq/ia64-acpi-cpufreq.c
-index c0075dba..573c14ea 100644
---- a/drivers/cpufreq/ia64-acpi-cpufreq.c
-+++ b/drivers/cpufreq/ia64-acpi-cpufreq.c
-@@ -326,7 +326,7 @@ acpi_cpufreq_cpu_init (
- 	/* table init */
- 	for (i = 0; i <= data->acpi_data.state_count; i++)
- 	{
--		data->freq_table[i].index = i;
-+		data->freq_table[i].driver_data = i;
- 		if (i < data->acpi_data.state_count) {
- 			data->freq_table[i].frequency =
- 			      data->acpi_data.states[i].core_frequency * 1000;
-diff --git a/drivers/cpufreq/kirkwood-cpufreq.c b/drivers/cpufreq/kirkwood-cpufreq.c
-index b2644af9..c233ea61 100644
---- a/drivers/cpufreq/kirkwood-cpufreq.c
-+++ b/drivers/cpufreq/kirkwood-cpufreq.c
-@@ -59,7 +59,7 @@ static void kirkwood_cpufreq_set_cpu_state(struct cpufreq_policy *policy,
- 		unsigned int index)
- {
- 	struct cpufreq_freqs freqs;
--	unsigned int state = kirkwood_freq_table[index].index;
-+	unsigned int state = kirkwood_freq_table[index].driver_data;
- 	unsigned long reg;
- 
- 	freqs.old = kirkwood_cpufreq_get_cpu_frequency(0);
-diff --git a/drivers/cpufreq/longhaul.c b/drivers/cpufreq/longhaul.c
-index b448638e..b6a0a7a4 100644
---- a/drivers/cpufreq/longhaul.c
-+++ b/drivers/cpufreq/longhaul.c
-@@ -254,7 +254,7 @@ static void longhaul_setstate(struct cpufreq_policy *policy,
- 	u32 bm_timeout = 1000;
- 	unsigned int dir = 0;
- 
--	mults_index = longhaul_table[table_index].index;
-+	mults_index = longhaul_table[table_index].driver_data;
- 	/* Safety precautions */
- 	mult = mults[mults_index & 0x1f];
- 	if (mult == -1)
-@@ -487,7 +487,7 @@ static int __cpuinit longhaul_get_ranges(void)
- 		if (ratio > maxmult || ratio < minmult)
- 			continue;
- 		longhaul_table[k].frequency = calc_speed(ratio);
--		longhaul_table[k].index	= j;
-+		longhaul_table[k].driver_data	= j;
- 		k++;
- 	}
- 	if (k <= 1) {
-@@ -508,8 +508,8 @@ static int __cpuinit longhaul_get_ranges(void)
- 		if (min_i != j) {
- 			swap(longhaul_table[j].frequency,
- 			     longhaul_table[min_i].frequency);
--			swap(longhaul_table[j].index,
--			     longhaul_table[min_i].index);
-+			swap(longhaul_table[j].driver_data,
-+			     longhaul_table[min_i].driver_data);
- 		}
- 	}
- 
-@@ -517,7 +517,7 @@ static int __cpuinit longhaul_get_ranges(void)
- 
- 	/* Find index we are running on */
- 	for (j = 0; j < k; j++) {
--		if (mults[longhaul_table[j].index & 0x1f] == mult) {
-+		if (mults[longhaul_table[j].driver_data & 0x1f] == mult) {
- 			longhaul_index = j;
- 			break;
- 		}
-@@ -613,7 +613,7 @@ static void __cpuinit longhaul_setup_voltagescaling(void)
- 			pos = (speed - min_vid_speed) / kHz_step + minvid.pos;
- 		else
- 			pos = minvid.pos;
--		longhaul_table[j].index |= mV_vrm_table[pos] << 8;
-+		longhaul_table[j].driver_data |= mV_vrm_table[pos] << 8;
- 		vid = vrm_mV_table[mV_vrm_table[pos]];
- 		printk(KERN_INFO PFX "f: %d kHz, index: %d, vid: %d mV\n",
- 				speed, j, vid.mV);
-@@ -656,12 +656,12 @@ static int longhaul_target(struct cpufreq_policy *policy,
- 		 * this in hardware, C3 is old and we need to do this
- 		 * in software. */
- 		i = longhaul_index;
--		current_vid = (longhaul_table[longhaul_index].index >> 8);
-+		current_vid = (longhaul_table[longhaul_index].driver_data >> 8);
- 		current_vid &= 0x1f;
- 		if (table_index > longhaul_index)
- 			dir = 1;
- 		while (i != table_index) {
--			vid = (longhaul_table[i].index >> 8) & 0x1f;
-+			vid = (longhaul_table[i].driver_data >> 8) & 0x1f;
- 			if (vid != current_vid) {
- 				longhaul_setstate(policy, i);
- 				current_vid = vid;
-diff --git a/drivers/cpufreq/loongson2_cpufreq.c b/drivers/cpufreq/loongson2_cpufreq.c
-index f92b02ae..9536852c 100644
---- a/drivers/cpufreq/loongson2_cpufreq.c
-+++ b/drivers/cpufreq/loongson2_cpufreq.c
-@@ -72,7 +72,7 @@ static int loongson2_cpufreq_target(struct cpufreq_policy *policy,
- 
- 	freq =
- 	    ((cpu_clock_freq / 1000) *
--	     loongson2_clockmod_table[newstate].index) / 8;
-+	     loongson2_clockmod_table[newstate].driver_data) / 8;
- 	if (freq < policy->min || freq > policy->max)
- 		return -EINVAL;
- 
-diff --git a/drivers/cpufreq/p4-clockmod.c b/drivers/cpufreq/p4-clockmod.c
-index 421ef37d..9ee78170 100644
---- a/drivers/cpufreq/p4-clockmod.c
-+++ b/drivers/cpufreq/p4-clockmod.c
-@@ -118,7 +118,7 @@ static int cpufreq_p4_target(struct cpufreq_policy *policy,
- 		return -EINVAL;
- 
- 	freqs.old = cpufreq_p4_get(policy->cpu);
--	freqs.new = stock_freq * p4clockmod_table[newstate].index / 8;
-+	freqs.new = stock_freq * p4clockmod_table[newstate].driver_data / 8;
- 
- 	if (freqs.new == freqs.old)
- 		return 0;
-@@ -131,7 +131,7 @@ static int cpufreq_p4_target(struct cpufreq_policy *policy,
- 	 * Developer's Manual, Volume 3
- 	 */
- 	for_each_cpu(i, policy->cpus)
--		cpufreq_p4_setdc(i, p4clockmod_table[newstate].index);
-+		cpufreq_p4_setdc(i, p4clockmod_table[newstate].driver_data);
- 
- 	/* notifiers */
- 	cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE);
-diff --git a/drivers/cpufreq/powernow-k6.c b/drivers/cpufreq/powernow-k6.c
-index ea0222a4..ea8e1038 100644
---- a/drivers/cpufreq/powernow-k6.c
-+++ b/drivers/cpufreq/powernow-k6.c
-@@ -58,7 +58,7 @@ static int powernow_k6_get_cpu_multiplier(void)
- 	msrval = POWERNOW_IOPORT + 0x0;
- 	wrmsr(MSR_K6_EPMR, msrval, 0); /* disable it again */
- 
--	return clock_ratio[(invalue >> 5)&7].index;
-+	return clock_ratio[(invalue >> 5)&7].driver_data;
- }
- 
- 
-@@ -75,13 +75,13 @@ static void powernow_k6_set_state(struct cpufreq_policy *policy,
- 	unsigned long msrval;
- 	struct cpufreq_freqs freqs;
- 
--	if (clock_ratio[best_i].index > max_multiplier) {
-+	if (clock_ratio[best_i].driver_data > max_multiplier) {
- 		printk(KERN_ERR PFX "invalid target frequency\n");
- 		return;
- 	}
- 
- 	freqs.old = busfreq * powernow_k6_get_cpu_multiplier();
--	freqs.new = busfreq * clock_ratio[best_i].index;
-+	freqs.new = busfreq * clock_ratio[best_i].driver_data;
- 
- 	cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE);
- 
-@@ -156,7 +156,7 @@ static int powernow_k6_cpu_init(struct cpufreq_policy *policy)
- 
- 	/* table init */
- 	for (i = 0; (clock_ratio[i].frequency != CPUFREQ_TABLE_END); i++) {
--		f = clock_ratio[i].index;
-+		f = clock_ratio[i].driver_data;
- 		if (f > max_multiplier)
- 			clock_ratio[i].frequency = CPUFREQ_ENTRY_INVALID;
- 		else
-diff --git a/drivers/cpufreq/powernow-k7.c b/drivers/cpufreq/powernow-k7.c
-index 53888dac..b9f80b71 100644
---- a/drivers/cpufreq/powernow-k7.c
-+++ b/drivers/cpufreq/powernow-k7.c
-@@ -186,7 +186,7 @@ static int get_ranges(unsigned char *pst)
- 		fid = *pst++;
- 
- 		powernow_table[j].frequency = (fsb * fid_codes[fid]) / 10;
--		powernow_table[j].index = fid; /* lower 8 bits */
-+		powernow_table[j].driver_data = fid; /* lower 8 bits */
- 
- 		speed = powernow_table[j].frequency;
- 
-@@ -203,7 +203,7 @@ static int get_ranges(unsigned char *pst)
- 			maximum_speed = speed;
- 
- 		vid = *pst++;
--		powernow_table[j].index |= (vid << 8); /* upper 8 bits */
-+		powernow_table[j].driver_data |= (vid << 8); /* upper 8 bits */
- 
- 		pr_debug("   FID: 0x%x (%d.%dx [%dMHz])  "
- 			 "VID: 0x%x (%d.%03dV)\n", fid, fid_codes[fid] / 10,
-@@ -212,7 +212,7 @@ static int get_ranges(unsigned char *pst)
- 			 mobile_vid_table[vid]%1000);
- 	}
- 	powernow_table[number_scales].frequency = CPUFREQ_TABLE_END;
--	powernow_table[number_scales].index = 0;
-+	powernow_table[number_scales].driver_data = 0;
- 
- 	return 0;
- }
-@@ -260,8 +260,8 @@ static void change_speed(struct cpufreq_policy *policy, unsigned int index)
- 	 * vid are the upper 8 bits.
- 	 */
- 
--	fid = powernow_table[index].index & 0xFF;
--	vid = (powernow_table[index].index & 0xFF00) >> 8;
-+	fid = powernow_table[index].driver_data & 0xFF;
-+	vid = (powernow_table[index].driver_data & 0xFF00) >> 8;
- 
- 	rdmsrl(MSR_K7_FID_VID_STATUS, fidvidstatus.val);
- 	cfid = fidvidstatus.bits.CFID;
-@@ -373,8 +373,8 @@ static int powernow_acpi_init(void)
- 		fid = pc.bits.fid;
- 
- 		powernow_table[i].frequency = fsb * fid_codes[fid] / 10;
--		powernow_table[i].index = fid; /* lower 8 bits */
--		powernow_table[i].index |= (vid << 8); /* upper 8 bits */
-+		powernow_table[i].driver_data = fid; /* lower 8 bits */
-+		powernow_table[i].driver_data |= (vid << 8); /* upper 8 bits */
- 
- 		speed = powernow_table[i].frequency;
- 		speed_mhz = speed / 1000;
-@@ -417,7 +417,7 @@ static int powernow_acpi_init(void)
- 	}
- 
- 	powernow_table[i].frequency = CPUFREQ_TABLE_END;
--	powernow_table[i].index = 0;
-+	powernow_table[i].driver_data = 0;
- 
- 	/* notify BIOS that we exist */
- 	acpi_processor_notify_smm(THIS_MODULE);
-diff --git a/drivers/cpufreq/powernow-k8.c b/drivers/cpufreq/powernow-k8.c
-index b828efe4..51343a12 100644
---- a/drivers/cpufreq/powernow-k8.c
-+++ b/drivers/cpufreq/powernow-k8.c
-@@ -584,9 +584,9 @@ static void print_basics(struct powernow_k8_data *data)
- 				CPUFREQ_ENTRY_INVALID) {
- 				printk(KERN_INFO PFX
- 					"fid 0x%x (%d MHz), vid 0x%x\n",
--					data->powernow_table[j].index & 0xff,
-+					data->powernow_table[j].driver_data & 0xff,
- 					data->powernow_table[j].frequency/1000,
--					data->powernow_table[j].index >> 8);
-+					data->powernow_table[j].driver_data >> 8);
- 		}
- 	}
- 	if (data->batps)
-@@ -632,13 +632,13 @@ static int fill_powernow_table(struct powernow_k8_data *data,
- 
- 	for (j = 0; j < data->numps; j++) {
- 		int freq;
--		powernow_table[j].index = pst[j].fid; /* lower 8 bits */
--		powernow_table[j].index |= (pst[j].vid << 8); /* upper 8 bits */
-+		powernow_table[j].driver_data = pst[j].fid; /* lower 8 bits */
-+		powernow_table[j].driver_data |= (pst[j].vid << 8); /* upper 8 bits */
- 		freq = find_khz_freq_from_fid(pst[j].fid);
- 		powernow_table[j].frequency = freq;
- 	}
- 	powernow_table[data->numps].frequency = CPUFREQ_TABLE_END;
--	powernow_table[data->numps].index = 0;
-+	powernow_table[data->numps].driver_data = 0;
- 
- 	if (query_current_values_with_pending_wait(data)) {
- 		kfree(powernow_table);
-@@ -810,7 +810,7 @@ static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data)
- 
- 	powernow_table[data->acpi_data.state_count].frequency =
- 		CPUFREQ_TABLE_END;
--	powernow_table[data->acpi_data.state_count].index = 0;
-+	powernow_table[data->acpi_data.state_count].driver_data = 0;
- 	data->powernow_table = powernow_table;
- 
- 	if (cpumask_first(cpu_core_mask(data->cpu)) == data->cpu)
-@@ -865,7 +865,7 @@ static int fill_powernow_table_fidvid(struct powernow_k8_data *data,
- 		pr_debug("   %d : fid 0x%x, vid 0x%x\n", i, fid, vid);
- 
- 		index = fid | (vid<<8);
--		powernow_table[i].index = index;
-+		powernow_table[i].driver_data = index;
- 
- 		freq = find_khz_freq_from_fid(fid);
- 		powernow_table[i].frequency = freq;
-@@ -941,8 +941,8 @@ static int transition_frequency_fidvid(struct powernow_k8_data *data,
- 	 * the cpufreq frequency table in find_psb_table, vid
- 	 * are the upper 8 bits.
- 	 */
--	fid = data->powernow_table[index].index & 0xFF;
--	vid = (data->powernow_table[index].index & 0xFF00) >> 8;
-+	fid = data->powernow_table[index].driver_data & 0xFF;
-+	vid = (data->powernow_table[index].driver_data & 0xFF00) >> 8;
- 
- 	pr_debug("table matched fid 0x%x, giving vid 0x%x\n", fid, vid);
- 
-diff --git a/drivers/cpufreq/ppc_cbe_cpufreq.c b/drivers/cpufreq/ppc_cbe_cpufreq.c
-index e577a1db..5936f8d6 100644
---- a/drivers/cpufreq/ppc_cbe_cpufreq.c
-+++ b/drivers/cpufreq/ppc_cbe_cpufreq.c
-@@ -106,7 +106,7 @@ static int cbe_cpufreq_cpu_init(struct cpufreq_policy *policy)
- 
- 	/* initialize frequency table */
- 	for (i=0; cbe_freqs[i].frequency!=CPUFREQ_TABLE_END; i++) {
--		cbe_freqs[i].frequency = max_freq / cbe_freqs[i].index;
-+		cbe_freqs[i].frequency = max_freq / cbe_freqs[i].driver_data;
- 		pr_debug("%d: %d\n", i, cbe_freqs[i].frequency);
- 	}
- 
-@@ -165,7 +165,7 @@ static int cbe_cpufreq_target(struct cpufreq_policy *policy,
- 		 "1/%d of max frequency\n",
- 		 policy->cpu,
- 		 cbe_freqs[cbe_pmode_new].frequency,
--		 cbe_freqs[cbe_pmode_new].index);
-+		 cbe_freqs[cbe_pmode_new].driver_data);
- 
- 	rc = set_pmode(policy->cpu, cbe_pmode_new);
- 
-diff --git a/drivers/cpufreq/pxa2xx-cpufreq.c b/drivers/cpufreq/pxa2xx-cpufreq.c
-index 9e5bc8e3..fb3981ac 100644
---- a/drivers/cpufreq/pxa2xx-cpufreq.c
-+++ b/drivers/cpufreq/pxa2xx-cpufreq.c
-@@ -420,7 +420,7 @@ static int pxa_cpufreq_init(struct cpufreq_policy *policy)
- 	/* Generate pxa25x the run cpufreq_frequency_table struct */
- 	for (i = 0; i < NUM_PXA25x_RUN_FREQS; i++) {
- 		pxa255_run_freq_table[i].frequency = pxa255_run_freqs[i].khz;
--		pxa255_run_freq_table[i].index = i;
-+		pxa255_run_freq_table[i].driver_data = i;
- 	}
- 	pxa255_run_freq_table[i].frequency = CPUFREQ_TABLE_END;
- 
-@@ -428,7 +428,7 @@ static int pxa_cpufreq_init(struct cpufreq_policy *policy)
- 	for (i = 0; i < NUM_PXA25x_TURBO_FREQS; i++) {
- 		pxa255_turbo_freq_table[i].frequency =
- 			pxa255_turbo_freqs[i].khz;
--		pxa255_turbo_freq_table[i].index = i;
-+		pxa255_turbo_freq_table[i].driver_data = i;
- 	}
- 	pxa255_turbo_freq_table[i].frequency = CPUFREQ_TABLE_END;
- 
-@@ -440,9 +440,9 @@ static int pxa_cpufreq_init(struct cpufreq_policy *policy)
- 		if (freq > pxa27x_maxfreq)
- 			break;
- 		pxa27x_freq_table[i].frequency = freq;
--		pxa27x_freq_table[i].index = i;
-+		pxa27x_freq_table[i].driver_data = i;
- 	}
--	pxa27x_freq_table[i].index = i;
-+	pxa27x_freq_table[i].driver_data = i;
- 	pxa27x_freq_table[i].frequency = CPUFREQ_TABLE_END;
- 
- 	/*
-diff --git a/drivers/cpufreq/pxa3xx-cpufreq.c b/drivers/cpufreq/pxa3xx-cpufreq.c
-index 15d60f85..9c92ef03 100644
---- a/drivers/cpufreq/pxa3xx-cpufreq.c
-+++ b/drivers/cpufreq/pxa3xx-cpufreq.c
-@@ -98,10 +98,10 @@ static int setup_freqs_table(struct cpufreq_policy *policy,
- 		return -ENOMEM;
- 
- 	for (i = 0; i < num; i++) {
--		table[i].index = i;
-+		table[i].driver_data = i;
- 		table[i].frequency = freqs[i].cpufreq_mhz * 1000;
- 	}
--	table[num].index = i;
-+	table[num].driver_data = i;
- 	table[num].frequency = CPUFREQ_TABLE_END;
- 
- 	pxa3xx_freqs = freqs;
-diff --git a/drivers/cpufreq/s3c2416-cpufreq.c b/drivers/cpufreq/s3c2416-cpufreq.c
-index 4f1881ee..69f2e558 100644
---- a/drivers/cpufreq/s3c2416-cpufreq.c
-+++ b/drivers/cpufreq/s3c2416-cpufreq.c
-@@ -244,7 +244,7 @@ static int s3c2416_cpufreq_set_target(struct cpufreq_policy *policy,
- 	if (ret != 0)
- 		goto out;
- 
--	idx = s3c_freq->freq_table[i].index;
-+	idx = s3c_freq->freq_table[i].driver_data;
- 
- 	if (idx == SOURCE_HCLK)
- 		to_dvs = 1;
-diff --git a/drivers/cpufreq/s3c64xx-cpufreq.c b/drivers/cpufreq/s3c64xx-cpufreq.c
-index 27cacb52..306d395d 100644
---- a/drivers/cpufreq/s3c64xx-cpufreq.c
-+++ b/drivers/cpufreq/s3c64xx-cpufreq.c
-@@ -87,7 +87,7 @@ static int s3c64xx_cpufreq_set_target(struct cpufreq_policy *policy,
- 	freqs.old = clk_get_rate(armclk) / 1000;
- 	freqs.new = s3c64xx_freq_table[i].frequency;
- 	freqs.flags = 0;
--	dvfs = &s3c64xx_dvfs_table[s3c64xx_freq_table[i].index];
-+	dvfs = &s3c64xx_dvfs_table[s3c64xx_freq_table[i].driver_data];
- 
- 	if (freqs.old == freqs.new)
- 		return 0;
-diff --git a/drivers/cpufreq/sc520_freq.c b/drivers/cpufreq/sc520_freq.c
-index f740b134..77a21097 100644
---- a/drivers/cpufreq/sc520_freq.c
-+++ b/drivers/cpufreq/sc520_freq.c
-@@ -71,7 +71,7 @@ static void sc520_freq_set_cpu_state(struct cpufreq_policy *policy,
- 	local_irq_disable();
- 
- 	clockspeed_reg = *cpuctl & ~0x03;
--	*cpuctl = clockspeed_reg | sc520_freq_table[state].index;
-+	*cpuctl = clockspeed_reg | sc520_freq_table[state].driver_data;
- 
- 	local_irq_enable();
- 
-diff --git a/drivers/cpufreq/sparc-us2e-cpufreq.c b/drivers/cpufreq/sparc-us2e-cpufreq.c
-index 306ae462..93061a40 100644
---- a/drivers/cpufreq/sparc-us2e-cpufreq.c
-+++ b/drivers/cpufreq/sparc-us2e-cpufreq.c
-@@ -308,17 +308,17 @@ static int __init us2e_freq_cpu_init(struct cpufreq_policy *policy)
- 	struct cpufreq_frequency_table *table =
- 		&us2e_freq_table[cpu].table[0];
- 
--	table[0].index = 0;
-+	table[0].driver_data = 0;
- 	table[0].frequency = clock_tick / 1;
--	table[1].index = 1;
-+	table[1].driver_data = 1;
- 	table[1].frequency = clock_tick / 2;
--	table[2].index = 2;
-+	table[2].driver_data = 2;
- 	table[2].frequency = clock_tick / 4;
--	table[2].index = 3;
-+	table[2].driver_data = 3;
- 	table[2].frequency = clock_tick / 6;
--	table[2].index = 4;
-+	table[2].driver_data = 4;
- 	table[2].frequency = clock_tick / 8;
--	table[2].index = 5;
-+	table[2].driver_data = 5;
- 	table[3].frequency = CPUFREQ_TABLE_END;
- 
- 	policy->cpuinfo.transition_latency = 0;
-diff --git a/drivers/cpufreq/sparc-us3-cpufreq.c b/drivers/cpufreq/sparc-us3-cpufreq.c
-index c71ee142..880ee293 100644
---- a/drivers/cpufreq/sparc-us3-cpufreq.c
-+++ b/drivers/cpufreq/sparc-us3-cpufreq.c
-@@ -169,13 +169,13 @@ static int __init us3_freq_cpu_init(struct cpufreq_policy *policy)
- 	struct cpufreq_frequency_table *table =
- 		&us3_freq_table[cpu].table[0];
- 
--	table[0].index = 0;
-+	table[0].driver_data = 0;
- 	table[0].frequency = clock_tick / 1;
--	table[1].index = 1;
-+	table[1].driver_data = 1;
- 	table[1].frequency = clock_tick / 2;
--	table[2].index = 2;
-+	table[2].driver_data = 2;
- 	table[2].frequency = clock_tick / 32;
--	table[3].index = 0;
-+	table[3].driver_data = 0;
- 	table[3].frequency = CPUFREQ_TABLE_END;
- 
- 	policy->cpuinfo.transition_latency = 0;
-diff --git a/drivers/cpufreq/spear-cpufreq.c b/drivers/cpufreq/spear-cpufreq.c
-index 156829f4..c3efa7f2 100644
---- a/drivers/cpufreq/spear-cpufreq.c
-+++ b/drivers/cpufreq/spear-cpufreq.c
-@@ -250,11 +250,11 @@ static int spear_cpufreq_driver_init(void)
- 	}
- 
- 	for (i = 0; i < cnt; i++) {
--		freq_tbl[i].index = i;
-+		freq_tbl[i].driver_data = i;
- 		freq_tbl[i].frequency = be32_to_cpup(val++);
- 	}
- 
--	freq_tbl[i].index = i;
-+	freq_tbl[i].driver_data = i;
- 	freq_tbl[i].frequency = CPUFREQ_TABLE_END;
- 
- 	spear_cpufreq.freq_tbl = freq_tbl;
-diff --git a/drivers/cpufreq/speedstep-centrino.c b/drivers/cpufreq/speedstep-centrino.c
-index 618e6f41..0915e712 100644
---- a/drivers/cpufreq/speedstep-centrino.c
-+++ b/drivers/cpufreq/speedstep-centrino.c
-@@ -79,11 +79,11 @@ static struct cpufreq_driver centrino_driver;
- 
- /* Computes the correct form for IA32_PERF_CTL MSR for a particular
-    frequency/voltage operating point; frequency in MHz, volts in mV.
--   This is stored as "index" in the structure. */
-+   This is stored as "driver_data" in the structure. */
- #define OP(mhz, mv)							\
- 	{								\
- 		.frequency = (mhz) * 1000,				\
--		.index = (((mhz)/100) << 8) | ((mv - 700) / 16)		\
-+		.driver_data = (((mhz)/100) << 8) | ((mv - 700) / 16)		\
- 	}
- 
- /*
-@@ -307,7 +307,7 @@ static unsigned extract_clock(unsigned msr, unsigned int cpu, int failsafe)
- 		per_cpu(centrino_model, cpu)->op_points[i].frequency
- 							!= CPUFREQ_TABLE_END;
- 	     i++) {
--		if (msr == per_cpu(centrino_model, cpu)->op_points[i].index)
-+		if (msr == per_cpu(centrino_model, cpu)->op_points[i].driver_data)
- 			return per_cpu(centrino_model, cpu)->
- 							op_points[i].frequency;
- 	}
-@@ -501,7 +501,7 @@ static int centrino_target (struct cpufreq_policy *policy,
- 			break;
- 		}
- 
--		msr = per_cpu(centrino_model, cpu)->op_points[newstate].index;
-+		msr = per_cpu(centrino_model, cpu)->op_points[newstate].driver_data;
- 
- 		if (first_cpu) {
- 			rdmsr_on_cpu(good_cpu, MSR_IA32_PERF_CTL, &oldmsr, &h);
-diff --git a/drivers/mfd/db8500-prcmu.c b/drivers/mfd/db8500-prcmu.c
-index 66f80973..ed79d7b7 100644
---- a/drivers/mfd/db8500-prcmu.c
-+++ b/drivers/mfd/db8500-prcmu.c
-@@ -1724,9 +1724,9 @@ static long round_clock_rate(u8 clock, unsigned long rate)
- 
- /* CPU FREQ table, may be changed due to if MAX_OPP is supported. */
- static struct cpufreq_frequency_table db8500_cpufreq_table[] = {
--	{ .frequency = 200000, .index = ARM_EXTCLK,},
--	{ .frequency = 400000, .index = ARM_50_OPP,},
--	{ .frequency = 800000, .index = ARM_100_OPP,},
-+	{ .frequency = 200000, .driver_data = ARM_EXTCLK,},
-+	{ .frequency = 400000, .driver_data = ARM_50_OPP,},
-+	{ .frequency = 800000, .driver_data = ARM_100_OPP,},
- 	{ .frequency = CPUFREQ_TABLE_END,}, /* To be used for MAX_OPP. */
- 	{ .frequency = CPUFREQ_TABLE_END,},
- };
-@@ -1901,7 +1901,7 @@ static int set_armss_rate(unsigned long rate)
- 		return -EINVAL;
- 
- 	/* Set the new arm opp. */
--	return db8500_prcmu_set_arm_opp(db8500_cpufreq_table[i].index);
-+	return db8500_prcmu_set_arm_opp(db8500_cpufreq_table[i].driver_data);
- }
- 
- static int set_plldsi_rate(unsigned long rate)
-@@ -3105,7 +3105,7 @@ static void db8500_prcmu_update_cpufreq(void)
- {
- 	if (prcmu_has_arm_maxopp()) {
- 		db8500_cpufreq_table[3].frequency = 1000000;
--		db8500_cpufreq_table[3].index = ARM_MAX_OPP;
-+		db8500_cpufreq_table[3].driver_data = ARM_MAX_OPP;
- 	}
- }
- 
-diff --git a/drivers/sh/clk/core.c b/drivers/sh/clk/core.c
-index 7715de26..74727851 100644
---- a/drivers/sh/clk/core.c
-+++ b/drivers/sh/clk/core.c
-@@ -63,12 +63,12 @@ void clk_rate_table_build(struct clk *clk,
- 		else
- 			freq = clk->parent->rate * mult / div;
- 
--		freq_table[i].index = i;
-+		freq_table[i].driver_data = i;
- 		freq_table[i].frequency = freq;
- 	}
- 
- 	/* Termination entry */
--	freq_table[i].index = i;
-+	freq_table[i].driver_data = i;
- 	freq_table[i].frequency = CPUFREQ_TABLE_END;
- }
- 
-diff --git a/include/linux/cpufreq.h b/include/linux/cpufreq.h
-index 037d36ae..09ba2460 100644
---- a/include/linux/cpufreq.h
-+++ b/include/linux/cpufreq.h
-@@ -404,7 +404,7 @@ extern struct cpufreq_governor cpufreq_gov_conservative;
- #define CPUFREQ_TABLE_END     ~1
- 
- struct cpufreq_frequency_table {
--	unsigned int	index;     /* any */
-+	unsigned int	driver_data; /* driver specific data, not used by core */
- 	unsigned int	frequency; /* kHz - doesn't need to be in ascending
- 				    * order */
- };
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0162-ARM-shmobile-Fix-r8a7791-GPIO-resources-in-DTS.patch b/patches.renesas/0162-ARM-shmobile-Fix-r8a7791-GPIO-resources-in-DTS.patch
deleted file mode 100644
index 6b805527531d6..0000000000000
--- a/patches.renesas/0162-ARM-shmobile-Fix-r8a7791-GPIO-resources-in-DTS.patch
+++ /dev/null
@@ -1,122 +0,0 @@
-From 0466a6b612d7ff3666b23c9785075b37ec940f7b Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Thu, 21 Nov 2013 14:22:00 +0900
-Subject: ARM: shmobile: Fix r8a7791 GPIO resources in DTS
-
-The r8a7791 GPIO resources are currently incorrect. Fix that
-by making them match the English r8a7791 v0.31 data sheet.
-
-Tested with GPIO LED using Koelsch DT reference.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms@verge.net.au>
-(cherry picked from commit 89fbba1210a171f134b72c4d3ccf376265c6ff3f)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7791.dtsi | 32 ++++++++++++++++----------------
- 1 file changed, 16 insertions(+), 16 deletions(-)
-
-diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
-index e36b3652b7c2..a349aff54c76 100644
---- a/arch/arm/boot/dts/r8a7791.dtsi
-+++ b/arch/arm/boot/dts/r8a7791.dtsi
-@@ -49,9 +49,9 @@
- 		interrupts = <1 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
- 	};
- 
--	gpio0: gpio@ffc40000 {
-+	gpio0: gpio@e6050000 {
- 		compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
--		reg = <0 0xffc40000 0 0x50>;
-+		reg = <0 0xe6050000 0 0x50>;
- 		interrupt-parent = <&gic>;
- 		interrupts = <0 4 IRQ_TYPE_LEVEL_HIGH>;
- 		#gpio-cells = <2>;
-@@ -61,9 +61,9 @@
- 		interrupt-controller;
- 	};
- 
--	gpio1: gpio@ffc41000 {
-+	gpio1: gpio@e6051000 {
- 		compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
--		reg = <0 0xffc41000 0 0x50>;
-+		reg = <0 0xe6051000 0 0x50>;
- 		interrupt-parent = <&gic>;
- 		interrupts = <0 5 IRQ_TYPE_LEVEL_HIGH>;
- 		#gpio-cells = <2>;
-@@ -73,9 +73,9 @@
- 		interrupt-controller;
- 	};
- 
--	gpio2: gpio@ffc42000 {
-+	gpio2: gpio@e6052000 {
- 		compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
--		reg = <0 0xffc42000 0 0x50>;
-+		reg = <0 0xe6052000 0 0x50>;
- 		interrupt-parent = <&gic>;
- 		interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>;
- 		#gpio-cells = <2>;
-@@ -85,9 +85,9 @@
- 		interrupt-controller;
- 	};
- 
--	gpio3: gpio@ffc43000 {
-+	gpio3: gpio@e6053000 {
- 		compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
--		reg = <0 0xffc43000 0 0x50>;
-+		reg = <0 0xe6053000 0 0x50>;
- 		interrupt-parent = <&gic>;
- 		interrupts = <0 7 IRQ_TYPE_LEVEL_HIGH>;
- 		#gpio-cells = <2>;
-@@ -97,9 +97,9 @@
- 		interrupt-controller;
- 	};
- 
--	gpio4: gpio@ffc44000 {
-+	gpio4: gpio@e6054000 {
- 		compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
--		reg = <0 0xffc44000 0 0x50>;
-+		reg = <0 0xe6054000 0 0x50>;
- 		interrupt-parent = <&gic>;
- 		interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>;
- 		#gpio-cells = <2>;
-@@ -109,9 +109,9 @@
- 		interrupt-controller;
- 	};
- 
--	gpio5: gpio@ffc45000 {
-+	gpio5: gpio@e6055000 {
- 		compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
--		reg = <0 0xffc45000 0 0x50>;
-+		reg = <0 0xe6055000 0 0x50>;
- 		interrupt-parent = <&gic>;
- 		interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>;
- 		#gpio-cells = <2>;
-@@ -121,9 +121,9 @@
- 		interrupt-controller;
- 	};
- 
--	gpio6: gpio@ffc45400 {
-+	gpio6: gpio@e6055400 {
- 		compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
--		reg = <0 0xffc45400 0 0x50>;
-+		reg = <0 0xe6055400 0 0x50>;
- 		interrupt-parent = <&gic>;
- 		interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>;
- 		#gpio-cells = <2>;
-@@ -133,9 +133,9 @@
- 		interrupt-controller;
- 	};
- 
--	gpio7: gpio@ffc45800 {
-+	gpio7: gpio@e6055800 {
- 		compatible = "renesas,gpio-r8a7791", "renesas,gpio-rcar";
--		reg = <0 0xffc45800 0 0x50>;
-+		reg = <0 0xe6055800 0 0x50>;
- 		interrupt-parent = <&gic>;
- 		interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>;
- 		#gpio-cells = <2>;
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0162-ARM-shmobile-Remove-shmobile_smp_scu_boot_secondary.patch b/patches.renesas/0162-ARM-shmobile-Remove-shmobile_smp_scu_boot_secondary.patch
deleted file mode 100644
index ee47b7c24ce53..0000000000000
--- a/patches.renesas/0162-ARM-shmobile-Remove-shmobile_smp_scu_boot_secondary.patch
+++ /dev/null
@@ -1,53 +0,0 @@
-From 965b91050766a1a95a65d32503dd048d30378c04 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Sat, 14 Sep 2013 22:47:02 +0900
-Subject: ARM: shmobile: Remove shmobile_smp_scu_boot_secondary()
-
-Remove shmobile_smp_scu_boot_secondary() since
-it is no longer used. CPU boot vector setup is
-instead handled by CPU notifiers.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit e4550216ef8245b1c9892239a2121a7b15ac2e91)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/include/mach/common.h | 2 --
- arch/arm/mach-shmobile/platsmp-scu.c         | 8 --------
- 2 files changed, 10 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h
-index 3460bb13c988..e31980590eb4 100644
---- a/arch/arm/mach-shmobile/include/mach/common.h
-+++ b/arch/arm/mach-shmobile/include/mach/common.h
-@@ -18,8 +18,6 @@ extern int shmobile_smp_cpu_disable(unsigned int cpu);
- extern void shmobile_invalidate_start(void);
- extern void shmobile_boot_scu(void);
- extern void shmobile_smp_scu_prepare_cpus(unsigned int max_cpus);
--extern int shmobile_smp_scu_boot_secondary(unsigned int cpu,
--					   struct task_struct *idle);
- extern void shmobile_smp_scu_cpu_die(unsigned int cpu);
- extern int shmobile_smp_scu_cpu_kill(unsigned int cpu);
- extern void shmobile_smp_apmu_prepare_cpus(unsigned int max_cpus);
-diff --git a/arch/arm/mach-shmobile/platsmp-scu.c b/arch/arm/mach-shmobile/platsmp-scu.c
-index 49ae8dfc625d..673ad6e80869 100644
---- a/arch/arm/mach-shmobile/platsmp-scu.c
-+++ b/arch/arm/mach-shmobile/platsmp-scu.c
-@@ -51,14 +51,6 @@ void __init shmobile_smp_scu_prepare_cpus(unsigned int max_cpus)
- 	register_cpu_notifier(&shmobile_smp_scu_notifier);
- }
- 
--int shmobile_smp_scu_boot_secondary(unsigned int cpu, struct task_struct *idle)
--{
--	/* For this particular CPU register SCU boot vector */
--	shmobile_smp_hook(cpu, virt_to_phys(shmobile_boot_scu),
--			  (unsigned long)shmobile_scu_base);
--	return 0;
--}
--
- #ifdef CONFIG_HOTPLUG_CPU
- void shmobile_smp_scu_cpu_die(unsigned int cpu)
- {
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0162-ARM-shmobile-bockw-enable-I2C-in-defconfig.patch b/patches.renesas/0162-ARM-shmobile-bockw-enable-I2C-in-defconfig.patch
deleted file mode 100644
index 3c67b8ff3ea6e..0000000000000
--- a/patches.renesas/0162-ARM-shmobile-bockw-enable-I2C-in-defconfig.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From 7034d79fe6267454d9c43dde22af23e3ce152e29 Mon Sep 17 00:00:00 2001
-From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
-Date: Wed, 17 Apr 2013 22:47:27 +0400
-Subject: ARM: shmobile: bockw: enable I2C in defconfig
-
-Enable I2C driver in 'bockw_defconfig'.
-
-Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-[ horms+renesas@verge.net.au: resolved trivial conflicts ]
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-(cherry picked from commit 5de156bbc79d3048561f6c117ea14e96e3b75cd0)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/configs/bockw_defconfig | 2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/arch/arm/configs/bockw_defconfig b/arch/arm/configs/bockw_defconfig
-index b74a4d43..2c3f34e3 100644
---- a/arch/arm/configs/bockw_defconfig
-+++ b/arch/arm/configs/bockw_defconfig
-@@ -71,6 +71,8 @@ CONFIG_SERIAL_SH_SCI_NR_UARTS=6
- CONFIG_SERIAL_SH_SCI_CONSOLE=y
- # CONFIG_HW_RANDOM is not set
- # CONFIG_HWMON is not set
-+CONFIG_I2C=y
-+CONFIG_I2C_RCAR=y
- # CONFIG_USB_SUPPORT is not set
- CONFIG_MMC=y
- CONFIG_MMC_SDHI=y
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0163-ARM-shmobile-Extend-APMU-code-to-allow-single-cluste.patch b/patches.renesas/0163-ARM-shmobile-Extend-APMU-code-to-allow-single-cluste.patch
deleted file mode 100644
index afcd1103b6a41..0000000000000
--- a/patches.renesas/0163-ARM-shmobile-Extend-APMU-code-to-allow-single-cluste.patch
+++ /dev/null
@@ -1,56 +0,0 @@
-From 1383ffca9f4697366ec18fd24737e01a27e91422 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Sun, 15 Sep 2013 00:29:07 +0900
-Subject: ARM: shmobile: Extend APMU code to allow single cluster only
-
-Extend the APMU code with a check to only allow boot
-of CPU cores that sit in the same cluster as CPU0.
-
-This makes it possible for people to use the r8a790
-CA7 boot mode with CA7-cores only. The default CA15
-boot mode will enable CA15 cores only. This is an
-intentional software limitation to cope with lacking
-scheduler support.
-
-By removing this patch it is possible to run all 8 cores
-in parallel, but this is not recommended without out of tree
-scheduler modfications or custom user space code to control
-the CPU affinitiy.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit ee490bcc4f2d456c40df93236cf6a1bce2d5ddd0)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/platsmp-apmu.c | 13 +++++++++++++
- 1 file changed, 13 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/platsmp-apmu.c b/arch/arm/mach-shmobile/platsmp-apmu.c
-index 34dc40dacb79..caaaa35b589f 100644
---- a/arch/arm/mach-shmobile/platsmp-apmu.c
-+++ b/arch/arm/mach-shmobile/platsmp-apmu.c
-@@ -94,8 +94,21 @@ static void apmu_parse_cfg(void (*fn)(struct resource *res, int cpu, int bit))
- 	u32 id;
- 	int k;
- 	int bit, index;
-+	bool is_allowed;
- 
- 	for (k = 0; k < ARRAY_SIZE(apmu_config); k++) {
-+		/* only enable the cluster that includes the boot CPU */
-+		is_allowed = false;
-+		for (bit = 0; bit < ARRAY_SIZE(apmu_config[k].cpus); bit++) {
-+			id = apmu_config[k].cpus[bit];
-+			if (id >= 0) {
-+				if (id == cpu_logical_map(0))
-+					is_allowed = true;
-+			}
-+		}
-+		if (!is_allowed)
-+			continue;
-+
- 		for (bit = 0; bit < ARRAY_SIZE(apmu_config[k].cpus); bit++) {
- 			id = apmu_config[k].cpus[bit];
- 			if (id >= 0) {
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0163-ARM-shmobile-Use-interrupt-macros-in-r8a73a4-and-r8a.patch b/patches.renesas/0163-ARM-shmobile-Use-interrupt-macros-in-r8a73a4-and-r8a.patch
deleted file mode 100644
index 7c74ea20edf9c..0000000000000
--- a/patches.renesas/0163-ARM-shmobile-Use-interrupt-macros-in-r8a73a4-and-r8a.patch
+++ /dev/null
@@ -1,138 +0,0 @@
-From ca1cccc4e6fee99c755f91949381369e32a69796 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 28 Nov 2013 17:22:13 +0100
-Subject: ARM: shmobile: Use interrupt macros in r8a73a4 and r8a7778 DT files
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit d6dd1313f74e2035e77c36686e7348a1bcd1c102)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a73a4.dtsi | 50 +++++++++++++++++++++---------------------
- arch/arm/boot/dts/r8a7778.dtsi |  6 ++---
- 2 files changed, 28 insertions(+), 28 deletions(-)
-
-diff --git a/arch/arm/boot/dts/r8a73a4.dtsi b/arch/arm/boot/dts/r8a73a4.dtsi
-index b4a6c3b43ee9..6b7ce89a68f7 100644
---- a/arch/arm/boot/dts/r8a73a4.dtsi
-+++ b/arch/arm/boot/dts/r8a73a4.dtsi
-@@ -137,27 +137,27 @@
- 			compatible = "renesas,shdma-r8a73a4";
- 			reg = <0 0xe6700020 0 0x89e0>;
- 			interrupt-parent = <&gic>;
--			interrupts = <0 220 4
--					0 200 4
--					0 201 4
--					0 202 4
--					0 203 4
--					0 204 4
--					0 205 4
--					0 206 4
--					0 207 4
--					0 208 4
--					0 209 4
--					0 210 4
--					0 211 4
--					0 212 4
--					0 213 4
--					0 214 4
--					0 215 4
--					0 216 4
--					0 217 4
--					0 218 4
--					0 219 4>;
-+			interrupts = <0 220 IRQ_TYPE_LEVEL_HIGH
-+					0 200 IRQ_TYPE_LEVEL_HIGH
-+					0 201 IRQ_TYPE_LEVEL_HIGH
-+					0 202 IRQ_TYPE_LEVEL_HIGH
-+					0 203 IRQ_TYPE_LEVEL_HIGH
-+					0 204 IRQ_TYPE_LEVEL_HIGH
-+					0 205 IRQ_TYPE_LEVEL_HIGH
-+					0 206 IRQ_TYPE_LEVEL_HIGH
-+					0 207 IRQ_TYPE_LEVEL_HIGH
-+					0 208 IRQ_TYPE_LEVEL_HIGH
-+					0 209 IRQ_TYPE_LEVEL_HIGH
-+					0 210 IRQ_TYPE_LEVEL_HIGH
-+					0 211 IRQ_TYPE_LEVEL_HIGH
-+					0 212 IRQ_TYPE_LEVEL_HIGH
-+					0 213 IRQ_TYPE_LEVEL_HIGH
-+					0 214 IRQ_TYPE_LEVEL_HIGH
-+					0 215 IRQ_TYPE_LEVEL_HIGH
-+					0 216 IRQ_TYPE_LEVEL_HIGH
-+					0 217 IRQ_TYPE_LEVEL_HIGH
-+					0 218 IRQ_TYPE_LEVEL_HIGH
-+					0 219 IRQ_TYPE_LEVEL_HIGH>;
- 			interrupt-names = "error",
- 					"ch0", "ch1", "ch2", "ch3",
- 					"ch4", "ch5", "ch6", "ch7",
-@@ -181,7 +181,7 @@
- 		compatible = "renesas,rmobile-iic";
- 		reg = <0 0xe6500000 0 0x428>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 174 0x4>;
-+		interrupts = <0 174 IRQ_TYPE_LEVEL_HIGH>;
- 		status = "disabled";
- 	};
- 
-@@ -191,7 +191,7 @@
- 		compatible = "renesas,rmobile-iic";
- 		reg = <0 0xe6510000 0 0x428>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 175 0x4>;
-+		interrupts = <0 175 IRQ_TYPE_LEVEL_HIGH>;
- 		status = "disabled";
- 	};
- 
-@@ -201,7 +201,7 @@
- 		compatible = "renesas,rmobile-iic";
- 		reg = <0 0xe6520000 0 0x428>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 176 0x4>;
-+		interrupts = <0 176 IRQ_TYPE_LEVEL_HIGH>;
- 		status = "disabled";
- 	};
- 
-@@ -211,7 +211,7 @@
- 		compatible = "renesas,rmobile-iic";
- 		reg = <0 0xe6530000 0 0x428>;
- 		interrupt-parent = <&gic>;
--		interrupts = <0 177 0x4>;
-+		interrupts = <0 177 IRQ_TYPE_LEVEL_HIGH>;
- 		status = "disabled";
- 	};
- 
-diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi
-index 3314e0aeccf5..b530df63af2b 100644
---- a/arch/arm/boot/dts/r8a7778.dtsi
-+++ b/arch/arm/boot/dts/r8a7778.dtsi
-@@ -247,7 +247,7 @@
- 		compatible = "renesas,hspi";
- 		reg = <0xfffc7000 0x18>;
- 		interrupt-controller = <&gic>;
--		interrupts = <0 63 4>;
-+		interrupts = <0 63 IRQ_TYPE_LEVEL_HIGH>;
- 		status = "disabled";
- 	};
- 
-@@ -255,7 +255,7 @@
- 		compatible = "renesas,hspi";
- 		reg = <0xfffc8000 0x18>;
- 		interrupt-controller = <&gic>;
--		interrupts = <0 84 4>;
-+		interrupts = <0 84 IRQ_TYPE_LEVEL_HIGH>;
- 		status = "disabled";
- 	};
- 
-@@ -263,7 +263,7 @@
- 		compatible = "renesas,hspi";
- 		reg = <0xfffc6000 0x18>;
- 		interrupt-controller = <&gic>;
--		interrupts = <0 85 4>;
-+		interrupts = <0 85 IRQ_TYPE_LEVEL_HIGH>;
- 		status = "disabled";
- 	};
- };
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0163-ARM-shmobile-bockw-enable-CONFIG_PM_RUNTIME-in-defco.patch b/patches.renesas/0163-ARM-shmobile-bockw-enable-CONFIG_PM_RUNTIME-in-defco.patch
deleted file mode 100644
index 9b53f96a0fd73..0000000000000
--- a/patches.renesas/0163-ARM-shmobile-bockw-enable-CONFIG_PM_RUNTIME-in-defco.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From 7fdfbf217bdde0b676710cb4c1b20615e841201d Mon Sep 17 00:00:00 2001
-From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
-Date: Wed, 17 Apr 2013 03:03:45 +0400
-Subject: ARM: shmobile: bockw: enable CONFIG_PM_RUNTIME in defconfig
-
-Enable CONFIG_PM_RUNTIME in 'bockw_defconfig' -- it's already used by TMU, SCI,
-I2C, and Ether drivers to control the clocks...
-
-Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 3308f0e7c9723f01a21cd727bd2e46d5f2af6358)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/configs/bockw_defconfig | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/arch/arm/configs/bockw_defconfig b/arch/arm/configs/bockw_defconfig
-index 2c3f34e3..a4bc76d2 100644
---- a/arch/arm/configs/bockw_defconfig
-+++ b/arch/arm/configs/bockw_defconfig
-@@ -31,6 +31,7 @@ CONFIG_CMDLINE="console=ttySC0,115200 ignore_loglevel root=/dev/nfs ip=dhcp"
- CONFIG_CMDLINE_FORCE=y
- # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
- # CONFIG_SUSPEND is not set
-+CONFIG_PM_RUNTIME=y
- CONFIG_NET=y
- CONFIG_UNIX=y
- CONFIG_INET=y
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0164-ARM-shmobile-Include-CA7-cores-in-APMU-table.patch b/patches.renesas/0164-ARM-shmobile-Include-CA7-cores-in-APMU-table.patch
deleted file mode 100644
index 386b333e9b7d4..0000000000000
--- a/patches.renesas/0164-ARM-shmobile-Include-CA7-cores-in-APMU-table.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 72ce6b83935aefda90c1fbb145556da36cba4db0 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Sun, 15 Sep 2013 00:29:16 +0900
-Subject: ARM: shmobile: Include CA7 cores in APMU table
-
-Add information to the shared APMU code regarding
-the APMU instance used to control the CA7 cores.
-
-This can be used on r8a7790 and r8a73a4, but should
-most likely be converted to DT in the future.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 43651b15de94d6a5e188ea032311e9661ec708d2)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/platsmp-apmu.c | 4 ++++
- 1 file changed, 4 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/platsmp-apmu.c b/arch/arm/mach-shmobile/platsmp-apmu.c
-index caaaa35b589f..1da5a72d9642 100644
---- a/arch/arm/mach-shmobile/platsmp-apmu.c
-+++ b/arch/arm/mach-shmobile/platsmp-apmu.c
-@@ -86,6 +86,10 @@ static struct {
- 	{
- 		.iomem = DEFINE_RES_MEM(0xe6152000, 0x88),
- 		.cpus = { 0, 1, 2, 3 },
-+	},
-+	{
-+		.iomem = DEFINE_RES_MEM(0xe6151000, 0x88),
-+		.cpus = { 0x100, 0x101, 0x102, 0x103 },
- 	}
- };
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0164-ARM-shmobile-bockw-enable-USB-in-defconfig.patch b/patches.renesas/0164-ARM-shmobile-bockw-enable-USB-in-defconfig.patch
deleted file mode 100644
index fc9f4a2000c62..0000000000000
--- a/patches.renesas/0164-ARM-shmobile-bockw-enable-USB-in-defconfig.patch
+++ /dev/null
@@ -1,48 +0,0 @@
-From 4fd737d4ef8dacac425593317333d2a7633162f3 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Wed, 17 Apr 2013 01:35:09 +0400
-Subject: ARM: shmobile: bockw: enable USB in defconfig
-
-Enable USB platform EHCI/OHCI and common PHY drivers in 'bockw_defconfig'.
-Enable USB storage driver and SCSI disk driver that it needs as well...
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit fadc6e3ba1d2e79e25918da73093038c19297f30)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/configs/bockw_defconfig | 11 ++++++++++-
- 1 file changed, 10 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/configs/bockw_defconfig b/arch/arm/configs/bockw_defconfig
-index a4bc76d2..d6626086 100644
---- a/arch/arm/configs/bockw_defconfig
-+++ b/arch/arm/configs/bockw_defconfig
-@@ -49,6 +49,8 @@ CONFIG_DEVTMPFS_MOUNT=y
- # CONFIG_STANDALONE is not set
- # CONFIG_PREVENT_FIRMWARE_BUILD is not set
- # CONFIG_FW_LOADER is not set
-+CONFIG_SCSI=y
-+CONFIG_BLK_DEV_SD=y
- CONFIG_NETDEVICES=y
- # CONFIG_NET_CADENCE is not set
- # CONFIG_NET_VENDOR_BROADCOM is not set
-@@ -74,7 +76,14 @@ CONFIG_SERIAL_SH_SCI_CONSOLE=y
- # CONFIG_HWMON is not set
- CONFIG_I2C=y
- CONFIG_I2C_RCAR=y
--# CONFIG_USB_SUPPORT is not set
-+CONFIG_USB=y
-+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
-+CONFIG_USB_EHCI_HCD=y
-+CONFIG_USB_OHCI_HCD=y
-+CONFIG_USB_OHCI_HCD_PLATFORM=y
-+CONFIG_USB_EHCI_HCD_PLATFORM=y
-+CONFIG_USB_STORAGE=y
-+CONFIG_USB_RCAR_PHY=y
- CONFIG_MMC=y
- CONFIG_MMC_SDHI=y
- CONFIG_UIO=y
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0164-ARM-shmobile-emev2-Use-interrupt-macros-in-DT-files.patch b/patches.renesas/0164-ARM-shmobile-emev2-Use-interrupt-macros-in-DT-files.patch
deleted file mode 100644
index 8bd5381423f2b..0000000000000
--- a/patches.renesas/0164-ARM-shmobile-emev2-Use-interrupt-macros-in-DT-files.patch
+++ /dev/null
@@ -1,157 +0,0 @@
-From 5dd3180edf39539eb72d822a4e7bc8de1f55b30a Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 28 Nov 2013 17:37:50 +0100
-Subject: ARM: shmobile: emev2: Use interrupt macros in DT files
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 3dc76086fa0a8def96f331785cceb6e84e3c34de)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/emev2-kzm9d.dts |  3 ++-
- arch/arm/boot/dts/emev2.dtsi      | 30 ++++++++++++++++++------------
- 2 files changed, 20 insertions(+), 13 deletions(-)
-
-diff --git a/arch/arm/boot/dts/emev2-kzm9d.dts b/arch/arm/boot/dts/emev2-kzm9d.dts
-index baaa66cc39bf..50ccd151091e 100644
---- a/arch/arm/boot/dts/emev2-kzm9d.dts
-+++ b/arch/arm/boot/dts/emev2-kzm9d.dts
-@@ -12,6 +12,7 @@
- #include "emev2.dtsi"
- #include <dt-bindings/gpio/gpio.h>
- #include <dt-bindings/input/input.h>
-+#include <dt-bindings/interrupt-controller/irq.h>
- 
- / {
- 	model = "EMEV2 KZM9D Board";
-@@ -49,7 +50,7 @@
- 		reg = <0x20000000 0x10000>;
- 		phy-mode = "mii";
- 		interrupt-parent = <&gpio0>;
--		interrupts = <1 1>;	/* active high */
-+		interrupts = <1 IRQ_TYPE_EDGE_RISING>;
- 		reg-io-width = <4>;
- 		smsc,irq-active-high;
- 		smsc,irq-push-pull;
-diff --git a/arch/arm/boot/dts/emev2.dtsi b/arch/arm/boot/dts/emev2.dtsi
-index 256c2f8b9d0a..8467e4caf3b7 100644
---- a/arch/arm/boot/dts/emev2.dtsi
-+++ b/arch/arm/boot/dts/emev2.dtsi
-@@ -9,6 +9,7 @@
-  */
- 
- #include "skeleton.dtsi"
-+#include <dt-bindings/interrupt-controller/irq.h>
- 
- / {
- 	compatible = "renesas,emev2";
-@@ -48,8 +49,8 @@
- 
- 	pmu {
- 		compatible = "arm,cortex-a9-pmu";
--		interrupts = <0 120 4>,
--			     <0 121 4>;
-+		interrupts = <0 120 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 121 IRQ_TYPE_LEVEL_HIGH>;
- 	};
- 
- 	smu@e0110000 {
-@@ -129,7 +130,7 @@
- 	sti@e0180000 {
- 		compatible = "renesas,em-sti";
- 		reg = <0xe0180000 0x54>;
--		interrupts = <0 125 0>;
-+		interrupts = <0 125 IRQ_TYPE_NONE>;
- 		clocks = <&sti_sclk>;
- 		clock-names = "sclk";
- 	};
-@@ -137,7 +138,7 @@
- 	uart@e1020000 {
- 		compatible = "renesas,em-uart";
- 		reg = <0xe1020000 0x38>;
--		interrupts = <0 8 0>;
-+		interrupts = <0 8 IRQ_TYPE_NONE>;
- 		clocks = <&usia_u0_sclk>;
- 		clock-names = "sclk";
- 	};
-@@ -145,7 +146,7 @@
- 	uart@e1030000 {
- 		compatible = "renesas,em-uart";
- 		reg = <0xe1030000 0x38>;
--		interrupts = <0 9 0>;
-+		interrupts = <0 9 IRQ_TYPE_NONE>;
- 		clocks = <&usib_u1_sclk>;
- 		clock-names = "sclk";
- 	};
-@@ -153,7 +154,7 @@
- 	uart@e1040000 {
- 		compatible = "renesas,em-uart";
- 		reg = <0xe1040000 0x38>;
--		interrupts = <0 10 0>;
-+		interrupts = <0 10 IRQ_TYPE_NONE>;
- 		clocks = <&usib_u2_sclk>;
- 		clock-names = "sclk";
- 	};
-@@ -161,7 +162,7 @@
- 	uart@e1050000 {
- 		compatible = "renesas,em-uart";
- 		reg = <0xe1050000 0x38>;
--		interrupts = <0 11 0>;
-+		interrupts = <0 11 IRQ_TYPE_NONE>;
- 		clocks = <&usib_u3_sclk>;
- 		clock-names = "sclk";
- 	};
-@@ -169,7 +170,8 @@
- 	gpio0: gpio@e0050000 {
- 		compatible = "renesas,em-gio";
- 		reg = <0xe0050000 0x2c>, <0xe0050040 0x20>;
--		interrupts = <0 67 0>, <0 68 0>;
-+		interrupts = <0 67 IRQ_TYPE_NONE>,
-+			     <0 68 IRQ_TYPE_NONE>;
- 		gpio-controller;
- 		#gpio-cells = <2>;
- 		ngpios = <32>;
-@@ -179,7 +181,8 @@
- 	gpio1: gpio@e0050080 {
- 		compatible = "renesas,em-gio";
- 		reg = <0xe0050080 0x2c>, <0xe00500c0 0x20>;
--		interrupts = <0 69 0>, <0 70 0>;
-+		interrupts = <0 69 IRQ_TYPE_NONE>,
-+			     <0 70 IRQ_TYPE_NONE>;
- 		gpio-controller;
- 		#gpio-cells = <2>;
- 		ngpios = <32>;
-@@ -189,7 +192,8 @@
- 	gpio2: gpio@e0050100 {
- 		compatible = "renesas,em-gio";
- 		reg = <0xe0050100 0x2c>, <0xe0050140 0x20>;
--		interrupts = <0 71 0>, <0 72 0>;
-+		interrupts = <0 71 IRQ_TYPE_NONE>,
-+			     <0 72 IRQ_TYPE_NONE>;
- 		gpio-controller;
- 		#gpio-cells = <2>;
- 		ngpios = <32>;
-@@ -199,7 +203,8 @@
- 	gpio3: gpio@e0050180 {
- 		compatible = "renesas,em-gio";
- 		reg = <0xe0050180 0x2c>, <0xe00501c0 0x20>;
--		interrupts = <0 73 0>, <0 74 0>;
-+		interrupts = <0 73 IRQ_TYPE_NONE>,
-+			     <0 74 IRQ_TYPE_NONE>;
- 		gpio-controller;
- 		#gpio-cells = <2>;
- 		ngpios = <32>;
-@@ -209,7 +214,8 @@
- 	gpio4: gpio@e0050200 {
- 		compatible = "renesas,em-gio";
- 		reg = <0xe0050200 0x2c>, <0xe0050240 0x20>;
--		interrupts = <0 75 0>, <0 76 0>;
-+		interrupts = <0 75 IRQ_TYPE_NONE>,
-+			     <0 76 IRQ_TYPE_NONE>;
- 		gpio-controller;
- 		#gpio-cells = <2>;
- 		ngpios = <31>;
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0165-ARM-shmobile-ape6evm-fix-incorrect-placement-of-__in.patch b/patches.renesas/0165-ARM-shmobile-ape6evm-fix-incorrect-placement-of-__in.patch
deleted file mode 100644
index 21a16a27e43da..0000000000000
--- a/patches.renesas/0165-ARM-shmobile-ape6evm-fix-incorrect-placement-of-__in.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From 5432fad55ba4199262b6da5e1e3349be6d6d4bc0 Mon Sep 17 00:00:00 2001
-From: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
-Date: Mon, 30 Sep 2013 17:34:36 +0200
-Subject: ARM: shmobile: ape6evm: fix incorrect placement of __initdata tag
-
-__initdata tag should be placed between the variable name and equal
-sign for the variable to be placed in the intended .init.data section.
-
-Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
-Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 40fca03cae59cfd9b87142ca327abb8a4d386908)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-ape6evm.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/board-ape6evm.c b/arch/arm/mach-shmobile/board-ape6evm.c
-index 7627385f516e..3016f2f8e006 100644
---- a/arch/arm/mach-shmobile/board-ape6evm.c
-+++ b/arch/arm/mach-shmobile/board-ape6evm.c
-@@ -86,7 +86,7 @@ static struct gpio_keys_button gpio_buttons[] = {
- 	GPIO_KEY(KEY_VOLUMEDOWN,	329,	"S21"),
- };
- 
--static struct __initdata gpio_keys_platform_data ape6evm_keys_pdata = {
-+static struct gpio_keys_platform_data ape6evm_keys_pdata __initdata = {
- 	.buttons	= gpio_buttons,
- 	.nbuttons	= ARRAY_SIZE(gpio_buttons),
- };
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0165-ARM-shmobile-emev2-Setup-internal-peripheral-interru.patch b/patches.renesas/0165-ARM-shmobile-emev2-Setup-internal-peripheral-interru.patch
deleted file mode 100644
index b056fed54c6b8..0000000000000
--- a/patches.renesas/0165-ARM-shmobile-emev2-Setup-internal-peripheral-interru.patch
+++ /dev/null
@@ -1,126 +0,0 @@
-From 7b14bb56563bc77b5e44b503425a8d95c55d20d9 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 28 Nov 2013 17:37:51 +0100
-Subject: ARM: shmobile: emev2: Setup internal peripheral interrupts as level
- high
-
-Interrupts generated by SoC internal devices are currently marked as
-IRQ_TYPE_NONE. As they're level-triggered and active-high, mark them as
-such.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit e05ab0bb14723d419b43341d413e4418000f58f9)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/emev2.dtsi | 30 +++++++++++++++---------------
- 1 file changed, 15 insertions(+), 15 deletions(-)
-
-diff --git a/arch/arm/boot/dts/emev2.dtsi b/arch/arm/boot/dts/emev2.dtsi
-index 8467e4caf3b7..e37985fa10e2 100644
---- a/arch/arm/boot/dts/emev2.dtsi
-+++ b/arch/arm/boot/dts/emev2.dtsi
-@@ -130,7 +130,7 @@
- 	sti@e0180000 {
- 		compatible = "renesas,em-sti";
- 		reg = <0xe0180000 0x54>;
--		interrupts = <0 125 IRQ_TYPE_NONE>;
-+		interrupts = <0 125 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&sti_sclk>;
- 		clock-names = "sclk";
- 	};
-@@ -138,7 +138,7 @@
- 	uart@e1020000 {
- 		compatible = "renesas,em-uart";
- 		reg = <0xe1020000 0x38>;
--		interrupts = <0 8 IRQ_TYPE_NONE>;
-+		interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&usia_u0_sclk>;
- 		clock-names = "sclk";
- 	};
-@@ -146,7 +146,7 @@
- 	uart@e1030000 {
- 		compatible = "renesas,em-uart";
- 		reg = <0xe1030000 0x38>;
--		interrupts = <0 9 IRQ_TYPE_NONE>;
-+		interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&usib_u1_sclk>;
- 		clock-names = "sclk";
- 	};
-@@ -154,7 +154,7 @@
- 	uart@e1040000 {
- 		compatible = "renesas,em-uart";
- 		reg = <0xe1040000 0x38>;
--		interrupts = <0 10 IRQ_TYPE_NONE>;
-+		interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&usib_u2_sclk>;
- 		clock-names = "sclk";
- 	};
-@@ -162,7 +162,7 @@
- 	uart@e1050000 {
- 		compatible = "renesas,em-uart";
- 		reg = <0xe1050000 0x38>;
--		interrupts = <0 11 IRQ_TYPE_NONE>;
-+		interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>;
- 		clocks = <&usib_u3_sclk>;
- 		clock-names = "sclk";
- 	};
-@@ -170,8 +170,8 @@
- 	gpio0: gpio@e0050000 {
- 		compatible = "renesas,em-gio";
- 		reg = <0xe0050000 0x2c>, <0xe0050040 0x20>;
--		interrupts = <0 67 IRQ_TYPE_NONE>,
--			     <0 68 IRQ_TYPE_NONE>;
-+		interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 68 IRQ_TYPE_LEVEL_HIGH>;
- 		gpio-controller;
- 		#gpio-cells = <2>;
- 		ngpios = <32>;
-@@ -181,8 +181,8 @@
- 	gpio1: gpio@e0050080 {
- 		compatible = "renesas,em-gio";
- 		reg = <0xe0050080 0x2c>, <0xe00500c0 0x20>;
--		interrupts = <0 69 IRQ_TYPE_NONE>,
--			     <0 70 IRQ_TYPE_NONE>;
-+		interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 70 IRQ_TYPE_LEVEL_HIGH>;
- 		gpio-controller;
- 		#gpio-cells = <2>;
- 		ngpios = <32>;
-@@ -192,8 +192,8 @@
- 	gpio2: gpio@e0050100 {
- 		compatible = "renesas,em-gio";
- 		reg = <0xe0050100 0x2c>, <0xe0050140 0x20>;
--		interrupts = <0 71 IRQ_TYPE_NONE>,
--			     <0 72 IRQ_TYPE_NONE>;
-+		interrupts = <0 71 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 72 IRQ_TYPE_LEVEL_HIGH>;
- 		gpio-controller;
- 		#gpio-cells = <2>;
- 		ngpios = <32>;
-@@ -203,8 +203,8 @@
- 	gpio3: gpio@e0050180 {
- 		compatible = "renesas,em-gio";
- 		reg = <0xe0050180 0x2c>, <0xe00501c0 0x20>;
--		interrupts = <0 73 IRQ_TYPE_NONE>,
--			     <0 74 IRQ_TYPE_NONE>;
-+		interrupts = <0 73 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 74 IRQ_TYPE_LEVEL_HIGH>;
- 		gpio-controller;
- 		#gpio-cells = <2>;
- 		ngpios = <32>;
-@@ -214,8 +214,8 @@
- 	gpio4: gpio@e0050200 {
- 		compatible = "renesas,em-gio";
- 		reg = <0xe0050200 0x2c>, <0xe0050240 0x20>;
--		interrupts = <0 75 IRQ_TYPE_NONE>,
--			     <0 76 IRQ_TYPE_NONE>;
-+		interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>,
-+			     <0 76 IRQ_TYPE_LEVEL_HIGH>;
- 		gpio-controller;
- 		#gpio-cells = <2>;
- 		ngpios = <31>;
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0165-ARM-shmobile-kzm9g-enable-AS3711-PMIC-in-defconfig.patch b/patches.renesas/0165-ARM-shmobile-kzm9g-enable-AS3711-PMIC-in-defconfig.patch
deleted file mode 100644
index 19003fe173ddf..0000000000000
--- a/patches.renesas/0165-ARM-shmobile-kzm9g-enable-AS3711-PMIC-in-defconfig.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From 214e21b018364687b5d6574ff2f96b35e1ae3ab4 Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Wed, 3 Apr 2013 17:53:54 +0200
-Subject: ARM: shmobile: kzm9g: enable AS3711 PMIC in defconfig
-
-An AS3711 PMIC is used on kzm9g to supply CPU power and LCD backlight.
-This patch enables it in board defconfig.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 76d415dfa7d53a2f92550484d766ae475a427daf)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/configs/kzm9g_defconfig | 3 +++
- 1 file changed, 3 insertions(+)
-
-diff --git a/arch/arm/configs/kzm9g_defconfig b/arch/arm/configs/kzm9g_defconfig
-index f6e585b3..1ad02802 100644
---- a/arch/arm/configs/kzm9g_defconfig
-+++ b/arch/arm/configs/kzm9g_defconfig
-@@ -84,9 +84,12 @@ CONFIG_I2C_CHARDEV=y
- CONFIG_I2C_SH_MOBILE=y
- CONFIG_GPIO_PCF857X=y
- # CONFIG_HWMON is not set
-+CONFIG_MFD_AS3711=y
- CONFIG_REGULATOR=y
-+CONFIG_REGULATOR_AS3711=y
- CONFIG_FB=y
- CONFIG_FB_SH_MOBILE_LCDC=y
-+CONFIG_BACKLIGHT_AS3711=y
- CONFIG_FRAMEBUFFER_CONSOLE=y
- CONFIG_LOGO=y
- CONFIG_FB_SH_MOBILE_MERAM=y
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0166-ARM-shmobile-armadillo800eva-Convert-SCIFA1-to-pinct.patch b/patches.renesas/0166-ARM-shmobile-armadillo800eva-Convert-SCIFA1-to-pinct.patch
deleted file mode 100644
index 7931b693ef9d4..0000000000000
--- a/patches.renesas/0166-ARM-shmobile-armadillo800eva-Convert-SCIFA1-to-pinct.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From 60f96820cf1c2fc3b98b4d4bc4e7813d3ec6083c Mon Sep 17 00:00:00 2001
-From: Bastian Hecht <hechtb@gmail.com>
-Date: Wed, 17 Apr 2013 10:34:02 +0000
-Subject: ARM: shmobile: armadillo800eva: Convert SCIFA1 to pinctrl
-
-We use the new pinctrl framework now.
-
-Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 7cdfb46ea95292ad477af498470bd3a85d9b3dcb)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-armadillo800eva.c | 7 +++----
- 1 file changed, 3 insertions(+), 4 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c
-index aafa99b1..44a62150 100644
---- a/arch/arm/mach-shmobile/board-armadillo800eva.c
-+++ b/arch/arm/mach-shmobile/board-armadillo800eva.c
-@@ -1087,6 +1087,9 @@ static const struct pinctrl_map eva_pinctrl_map[] = {
- 				  "mmc0_data8_1", "mmc0"),
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-r8a7740",
- 				  "mmc0_ctrl_1", "mmc0"),
-+	/* SCIFA1 */
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.1", "pfc-r8a7740",
-+				  "scifa1_data", "scifa1"),
- 	/* SDHI0 */
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7740",
- 				  "sdhi0_data4", "sdhi0"),
-@@ -1154,10 +1157,6 @@ static void __init eva_init(void)
- 	r8a7740_pinmux_init();
- 	r8a7740_meram_workaround();
- 
--	/* SCIFA1 */
--	gpio_request(GPIO_FN_SCIFA1_RXD, NULL);
--	gpio_request(GPIO_FN_SCIFA1_TXD, NULL);
--
- 	/* LCDC0 */
- 	gpio_request_one(61, GPIOF_OUT_INIT_HIGH, NULL); /* LCDDON */
- 	gpio_request_one(202, GPIOF_OUT_INIT_LOW, NULL); /* LCD0_LED_CONT */
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0166-ARM-shmobile-only-enable-used-I2C-interfaces-in-DT-o.patch b/patches.renesas/0166-ARM-shmobile-only-enable-used-I2C-interfaces-in-DT-o.patch
deleted file mode 100644
index 41e22ac37b56a..0000000000000
--- a/patches.renesas/0166-ARM-shmobile-only-enable-used-I2C-interfaces-in-DT-o.patch
+++ /dev/null
@@ -1,262 +0,0 @@
-From 975a4951f0c101b50c0c25f2dfb5057f85e8fea3 Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Thu, 26 Sep 2013 13:06:01 +0200
-Subject: ARM: shmobile: only enable used I2C interfaces in DT on all Renesas
- boards
-
-Currently all I2C interfaces in all *.dtsi files for various Renesas SoCs
-are enabled by default. Switch them all off and only enable populated I2C
-interfaces in board-specific *.dts files.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Acked-by: Mark Rutland <mark.rutland@arm.com>
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit eda3a4fa9529341f2ce23374e5f295764d0b5838)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts         | 1 +
- arch/arm/boot/dts/r8a73a4-ape6evm.dts                   | 1 +
- arch/arm/boot/dts/r8a73a4.dtsi                          | 9 +++++++++
- arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts | 1 +
- arch/arm/boot/dts/r8a7740.dtsi                          | 2 ++
- arch/arm/boot/dts/r8a7779.dtsi                          | 4 ++++
- arch/arm/boot/dts/sh73a0-kzm9g-reference.dts            | 2 ++
- arch/arm/boot/dts/sh73a0.dtsi                           | 5 +++++
- 8 files changed, 25 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts b/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts
-index 2b49b05ae2f4..9443e93d3cac 100644
---- a/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts
-+++ b/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts
-@@ -62,6 +62,7 @@
- };
- 
- &i2c5 {
-+	status = "okay";
- 	vdd_dvfs: max8973@1b {
- 		compatible = "maxim,max8973";
- 		reg = <0x1b>;
-diff --git a/arch/arm/boot/dts/r8a73a4-ape6evm.dts b/arch/arm/boot/dts/r8a73a4-ape6evm.dts
-index 72f867e65791..91436b58016f 100644
---- a/arch/arm/boot/dts/r8a73a4-ape6evm.dts
-+++ b/arch/arm/boot/dts/r8a73a4-ape6evm.dts
-@@ -52,6 +52,7 @@
- };
- 
- &i2c5 {
-+	status = "okay";
- 	vdd_dvfs: max8973@1b {
- 		compatible = "maxim,max8973";
- 		reg = <0x1b>;
-diff --git a/arch/arm/boot/dts/r8a73a4.dtsi b/arch/arm/boot/dts/r8a73a4.dtsi
-index 658fcc537576..6048825e00c7 100644
---- a/arch/arm/boot/dts/r8a73a4.dtsi
-+++ b/arch/arm/boot/dts/r8a73a4.dtsi
-@@ -93,6 +93,7 @@
- 		reg = <0 0xe6500000 0 0x428>;
- 		interrupt-parent = <&gic>;
- 		interrupts = <0 174 0x4>;
-+		status = "disabled";
- 	};
- 
- 	i2c1: i2c@e6510000 {
-@@ -102,6 +103,7 @@
- 		reg = <0 0xe6510000 0 0x428>;
- 		interrupt-parent = <&gic>;
- 		interrupts = <0 175 0x4>;
-+		status = "disabled";
- 	};
- 
- 	i2c2: i2c@e6520000 {
-@@ -111,6 +113,7 @@
- 		reg = <0 0xe6520000 0 0x428>;
- 		interrupt-parent = <&gic>;
- 		interrupts = <0 176 0x4>;
-+		status = "disabled";
- 	};
- 
- 	i2c3: i2c@e6530000 {
-@@ -120,6 +123,7 @@
- 		reg = <0 0xe6530000 0 0x428>;
- 		interrupt-parent = <&gic>;
- 		interrupts = <0 177 0x4>;
-+		status = "disabled";
- 	};
- 
- 	i2c4: i2c@e6540000 {
-@@ -129,6 +133,7 @@
- 		reg = <0 0xe6540000 0 0x428>;
- 		interrupt-parent = <&gic>;
- 		interrupts = <0 178 0x4>;
-+		status = "disabled";
- 	};
- 
- 	i2c5: i2c@e60b0000 {
-@@ -138,6 +143,7 @@
- 		reg = <0 0xe60b0000 0 0x428>;
- 		interrupt-parent = <&gic>;
- 		interrupts = <0 179 0x4>;
-+		status = "disabled";
- 	};
- 
- 	i2c6: i2c@e6550000 {
-@@ -147,6 +153,7 @@
- 		reg = <0 0xe6550000 0 0x428>;
- 		interrupt-parent = <&gic>;
- 		interrupts = <0 184 0x4>;
-+		status = "disabled";
- 	};
- 
- 	i2c7: i2c@e6560000 {
-@@ -156,6 +163,7 @@
- 		reg = <0 0xe6560000 0 0x428>;
- 		interrupt-parent = <&gic>;
- 		interrupts = <0 185 0x4>;
-+		status = "disabled";
- 	};
- 
- 	i2c8: i2c@e6570000 {
-@@ -165,6 +173,7 @@
- 		reg = <0 0xe6570000 0 0x428>;
- 		interrupt-parent = <&gic>;
- 		interrupts = <0 173 0x4>;
-+		status = "disabled";
- 	};
- 
- 	mmcif0: mmcif@ee200000 {
-diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
-index c638e4ab91b8..9fcffc175da2 100644
---- a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
-+++ b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
-@@ -52,6 +52,7 @@
- };
- 
- &i2c0 {
-+	status = "okay";
- 	touchscreen: st1232@55 {
- 		compatible = "sitronix,st1232";
- 		reg = <0x55>;
-diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi
-index 44d3d520e01f..868bdded237c 100644
---- a/arch/arm/boot/dts/r8a7740.dtsi
-+++ b/arch/arm/boot/dts/r8a7740.dtsi
-@@ -131,6 +131,7 @@
- 			      0 202 0x4
- 			      0 203 0x4
- 			      0 204 0x4>;
-+		status = "disabled";
- 	};
- 
- 	i2c1: i2c@e6c20000 {
-@@ -143,6 +144,7 @@
- 			      0 71 0x4
- 			      0 72 0x4
- 			      0 73 0x4>;
-+		status = "disabled";
- 	};
- 
- 	pfc: pfc@e6050000 {
-diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi
-index ebbe507fcbfa..912b3a04901e 100644
---- a/arch/arm/boot/dts/r8a7779.dtsi
-+++ b/arch/arm/boot/dts/r8a7779.dtsi
-@@ -156,6 +156,7 @@
- 		reg = <0xffc70000 0x1000>;
- 		interrupt-parent = <&gic>;
- 		interrupts = <0 79 0x4>;
-+		status = "disabled";
- 	};
- 
- 	i2c1: i2c@ffc71000 {
-@@ -165,6 +166,7 @@
- 		reg = <0xffc71000 0x1000>;
- 		interrupt-parent = <&gic>;
- 		interrupts = <0 82 0x4>;
-+		status = "disabled";
- 	};
- 
- 	i2c2: i2c@ffc72000 {
-@@ -174,6 +176,7 @@
- 		reg = <0xffc72000 0x1000>;
- 		interrupt-parent = <&gic>;
- 		interrupts = <0 80 0x4>;
-+		status = "disabled";
- 	};
- 
- 	i2c3: i2c@ffc73000 {
-@@ -183,6 +186,7 @@
- 		reg = <0xffc73000 0x1000>;
- 		interrupt-parent = <&gic>;
- 		interrupts = <0 81 0x4>;
-+		status = "disabled";
- 	};
- 
- 	pfc: pfc@fffc0000 {
-diff --git a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
-index 212230629f27..8ee06dd81799 100644
---- a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
-+++ b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
-@@ -108,6 +108,7 @@
- };
- 
- &i2c0 {
-+	status = "okay";
- 	as3711@40 {
- 		compatible = "ams,as3711";
- 		reg = <0x40>;
-@@ -183,6 +184,7 @@
- &i2c3 {
- 	pinctrl-0 = <&i2c3_pins>;
- 	pinctrl-names = "default";
-+	status = "okay";
- };
- 
- &mmcif {
-diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi
-index 3955c7606a6f..fcf26889a8a0 100644
---- a/arch/arm/boot/dts/sh73a0.dtsi
-+++ b/arch/arm/boot/dts/sh73a0.dtsi
-@@ -135,6 +135,7 @@
- 			      0 168 0x4
- 			      0 169 0x4
- 			      0 170 0x4>;
-+		status = "disabled";
- 	};
- 
- 	i2c1: i2c@e6822000 {
-@@ -147,6 +148,7 @@
- 			      0 52 0x4
- 			      0 53 0x4
- 			      0 54 0x4>;
-+		status = "disabled";
- 	};
- 
- 	i2c2: i2c@e6824000 {
-@@ -159,6 +161,7 @@
- 			      0 172 0x4
- 			      0 173 0x4
- 			      0 174 0x4>;
-+		status = "disabled";
- 	};
- 
- 	i2c3: i2c@e6826000 {
-@@ -171,6 +174,7 @@
- 			      0 184 0x4
- 			      0 185 0x4
- 			      0 186 0x4>;
-+		status = "disabled";
- 	};
- 
- 	i2c4: i2c@e6828000 {
-@@ -183,6 +187,7 @@
- 			      0 188 0x4
- 			      0 189 0x4
- 			      0 190 0x4>;
-+		status = "disabled";
- 	};
- 
- 	mmcif: mmcif@e6bd0000 {
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0166-ARM-shmobile-r8a7740-add-FSI-support-via-DTSI.patch b/patches.renesas/0166-ARM-shmobile-r8a7740-add-FSI-support-via-DTSI.patch
deleted file mode 100644
index 3fd26ca1fd006..0000000000000
--- a/patches.renesas/0166-ARM-shmobile-r8a7740-add-FSI-support-via-DTSI.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From 4fd0cfa727a9399d60c029a10eaa87123ebdbffe Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Tue, 3 Dec 2013 17:28:41 -0800
-Subject: ARM: shmobile: r8a7740: add FSI support via DTSI
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit efcd869b7c5ef0cff5887842afe2c184e509807a)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7740.dtsi | 9 +++++++++
- 1 file changed, 9 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi
-index b1c2ed961eed..52255bf1e867 100644
---- a/arch/arm/boot/dts/r8a7740.dtsi
-+++ b/arch/arm/boot/dts/r8a7740.dtsi
-@@ -208,4 +208,13 @@
- 		cap-sdio-irq;
- 		status = "disabled";
- 	};
-+
-+	sh_fsi2: sound@fe1f0000 {
-+		#sound-dai-cells = <1>;
-+		compatible = "renesas,sh_fsi2";
-+		reg = <0xfe1f0000 0x400>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 9 0x4>;
-+		status = "disabled";
-+	};
- };
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0167-ARM-shmobile-armadillo-add-FSI-support-for-DTS.patch b/patches.renesas/0167-ARM-shmobile-armadillo-add-FSI-support-for-DTS.patch
deleted file mode 100644
index e279ba33970b2..0000000000000
--- a/patches.renesas/0167-ARM-shmobile-armadillo-add-FSI-support-for-DTS.patch
+++ /dev/null
@@ -1,85 +0,0 @@
-From 1c0fdfbed5d0953704c58987e3fb4ac2aaa89d26 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Tue, 3 Dec 2013 17:28:59 -0800
-Subject: ARM: shmobile: armadillo: add FSI support for DTS
-
-This patch support FSI-WM8978 with simple audio card
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 6a3549d464bf8dc05ab87eab0f3ed2da0dbc5379)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- .../boot/dts/r8a7740-armadillo800eva-reference.dts | 37 ++++++++++++++++++++++
- 1 file changed, 37 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
-index 7b80f19129e3..6d6fd3dff2d3 100644
---- a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
-+++ b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
-@@ -87,6 +87,24 @@
- 		pinctrl-0 = <&backlight_pins>;
- 		pinctrl-names = "default";
- 	};
-+
-+	sound {
-+		compatible = "simple-audio-card";
-+
-+		simple-audio-card,format = "i2s";
-+
-+		simple-audio-card,cpu {
-+			sound-dai = <&sh_fsi2 0>;
-+			bitclock-inversion;
-+		};
-+
-+		simple-audio-card,codec {
-+			sound-dai = <&wm8978>;
-+			bitclock-master;
-+			frame-master;
-+			system-clock-frequency = <12288000>;
-+		};
-+	};
- };
- 
- &i2c0 {
-@@ -100,6 +118,12 @@
- 		pinctrl-names = "default";
- 		gpios = <&pfc 166 GPIO_ACTIVE_LOW>;
- 	};
-+
-+	wm8978: wm8978@1a {
-+		#sound-dai-cells = <0>;
-+		compatible = "wlf,wm8978";
-+		reg = <0x1a>;
-+	};
- };
- 
- &pfc {
-@@ -130,6 +154,12 @@
- 		renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_wp";
- 		renesas,function = "sdhi0";
- 	};
-+
-+	fsia_pins: sounda {
-+		renesas,groups = "fsia_sclk_in", "fsia_mclk_out",
-+				 "fsia_data_in_1", "fsia_data_out_0";
-+		renesas,function = "fsia";
-+	};
- };
- 
- &tpu {
-@@ -156,3 +186,10 @@
- 	cd-gpios = <&pfc 167 GPIO_ACTIVE_LOW>;
- 	status = "okay";
- };
-+
-+&sh_fsi2 {
-+	pinctrl-0 = <&fsia_pins>;
-+	pinctrl-names = "default";
-+
-+	status = "okay";
-+};
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0167-ARM-shmobile-r8a7740-Remove-SCIF-function-GPIOs.patch b/patches.renesas/0167-ARM-shmobile-r8a7740-Remove-SCIF-function-GPIOs.patch
deleted file mode 100644
index 3ab13f00e2197..0000000000000
--- a/patches.renesas/0167-ARM-shmobile-r8a7740-Remove-SCIF-function-GPIOs.patch
+++ /dev/null
@@ -1,104 +0,0 @@
-From 1f4ffa359021ea6aebd05dd44c14f2615d73447e Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 18 Apr 2013 01:06:57 +0200
-Subject: ARM: shmobile: r8a7740: Remove SCIF function GPIOs
-
-Those GPIOs have been deprecated by the pinctrl API. They are unused and
-unneeded, remove them.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit ac32d7cbf0c300b72cc985868bf0cc6993cadd41)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/include/mach/r8a7740.h | 74 ---------------------------
- 1 file changed, 74 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/include/mach/r8a7740.h b/arch/arm/mach-shmobile/include/mach/r8a7740.h
-index 1cf6869b..2656a6df 100644
---- a/arch/arm/mach-shmobile/include/mach/r8a7740.h
-+++ b/arch/arm/mach-shmobile/include/mach/r8a7740.h
-@@ -165,80 +165,6 @@ enum {
- 	GPIO_FN_FMSOOBT,	GPIO_FN_FMSOSLD,
- 	GPIO_FN_FMSOCK,
- 
--	/* SCIFA0 */
--	GPIO_FN_SCIFA0_SCK,	GPIO_FN_SCIFA0_CTS,
--	GPIO_FN_SCIFA0_RTS,	GPIO_FN_SCIFA0_RXD,
--	GPIO_FN_SCIFA0_TXD,
--
--	/* SCIFA1 */
--	GPIO_FN_SCIFA1_CTS,	GPIO_FN_SCIFA1_SCK,
--	GPIO_FN_SCIFA1_RXD,	GPIO_FN_SCIFA1_TXD,
--	GPIO_FN_SCIFA1_RTS,
--
--	/* SCIFA2 */
--	GPIO_FN_SCIFA2_SCK_PORT22, /* SCIFA2_SCK Port 22/199 */
--	GPIO_FN_SCIFA2_SCK_PORT199,
--	GPIO_FN_SCIFA2_RXD,	GPIO_FN_SCIFA2_TXD,
--	GPIO_FN_SCIFA2_CTS,	GPIO_FN_SCIFA2_RTS,
--
--	/* SCIFA3 */
--	GPIO_FN_SCIFA3_RTS_PORT105, /* MSEL5CR_8_0 */
--	GPIO_FN_SCIFA3_SCK_PORT116,
--	GPIO_FN_SCIFA3_CTS_PORT117,
--	GPIO_FN_SCIFA3_RXD_PORT174,
--	GPIO_FN_SCIFA3_TXD_PORT175,
--
--	GPIO_FN_SCIFA3_RTS_PORT161, /* MSEL5CR_8_1 */
--	GPIO_FN_SCIFA3_SCK_PORT158,
--	GPIO_FN_SCIFA3_CTS_PORT162,
--	GPIO_FN_SCIFA3_RXD_PORT159,
--	GPIO_FN_SCIFA3_TXD_PORT160,
--
--	/* SCIFA4 */
--	GPIO_FN_SCIFA4_RXD_PORT12, /* MSEL5CR[12:11] = 00 */
--	GPIO_FN_SCIFA4_TXD_PORT13,
--
--	GPIO_FN_SCIFA4_RXD_PORT204, /* MSEL5CR[12:11] = 01 */
--	GPIO_FN_SCIFA4_TXD_PORT203,
--
--	GPIO_FN_SCIFA4_RXD_PORT94, /* MSEL5CR[12:11] = 10 */
--	GPIO_FN_SCIFA4_TXD_PORT93,
--
--	GPIO_FN_SCIFA4_SCK_PORT21, /* SCIFA4_SCK Port 21/205 */
--	GPIO_FN_SCIFA4_SCK_PORT205,
--
--	/* SCIFA5 */
--	GPIO_FN_SCIFA5_TXD_PORT20, /* MSEL5CR[15:14] = 00 */
--	GPIO_FN_SCIFA5_RXD_PORT10,
--
--	GPIO_FN_SCIFA5_RXD_PORT207, /* MSEL5CR[15:14] = 01 */
--	GPIO_FN_SCIFA5_TXD_PORT208,
--
--	GPIO_FN_SCIFA5_TXD_PORT91, /* MSEL5CR[15:14] = 10 */
--	GPIO_FN_SCIFA5_RXD_PORT92,
--
--	GPIO_FN_SCIFA5_SCK_PORT23, /* SCIFA5_SCK Port 23/206 */
--	GPIO_FN_SCIFA5_SCK_PORT206,
--
--	/* SCIFA6 */
--	GPIO_FN_SCIFA6_SCK,	GPIO_FN_SCIFA6_RXD,	GPIO_FN_SCIFA6_TXD,
--
--	/* SCIFA7 */
--	GPIO_FN_SCIFA7_TXD,	GPIO_FN_SCIFA7_RXD,
--
--	/* SCIFAB */
--	GPIO_FN_SCIFB_SCK_PORT190, /* MSEL5CR_17_0 */
--	GPIO_FN_SCIFB_RXD_PORT191,
--	GPIO_FN_SCIFB_TXD_PORT192,
--	GPIO_FN_SCIFB_RTS_PORT186,
--	GPIO_FN_SCIFB_CTS_PORT187,
--
--	GPIO_FN_SCIFB_SCK_PORT2, /* MSEL5CR_17_1 */
--	GPIO_FN_SCIFB_RXD_PORT3,
--	GPIO_FN_SCIFB_TXD_PORT4,
--	GPIO_FN_SCIFB_RTS_PORT172,
--	GPIO_FN_SCIFB_CTS_PORT173,
--
- 	/* LCD0 */
- 	GPIO_FN_LCDC0_SELECT,
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0167-ARM-shmobile-r8a7790-add-I2C-DT-nodes.patch b/patches.renesas/0167-ARM-shmobile-r8a7790-add-I2C-DT-nodes.patch
deleted file mode 100644
index 2b9c5849f93f0..0000000000000
--- a/patches.renesas/0167-ARM-shmobile-r8a7790-add-I2C-DT-nodes.patch
+++ /dev/null
@@ -1,69 +0,0 @@
-From f7ac6e978b662a92f5108df35e0f9a1b8401ddb3 Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Thu, 26 Sep 2013 19:20:58 +0200
-Subject: ARM: shmobile: r8a7790: add I2C DT nodes
-
-Add DT nodes for the four I2C interfacces on r8a7790.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit edd2b9f4e6ed39032ffe9793e262c8a4b62c2152)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7790.dtsi | 40 ++++++++++++++++++++++++++++++++++++++++
- 1 file changed, 40 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
-index 28fc18c9601b..ee845fad939b 100644
---- a/arch/arm/boot/dts/r8a7790.dtsi
-+++ b/arch/arm/boot/dts/r8a7790.dtsi
-@@ -176,6 +176,46 @@
- 		interrupts = <0 0 4>, <0 1 4>, <0 2 4>,	<0 3 4>;
- 	};
- 
-+	i2c0: i2c@e6508000 {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		compatible = "renesas,i2c-r8a7790";
-+		reg = <0 0xe6508000 0 0x40>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 287 0x4>;
-+		status = "disabled";
-+	};
-+
-+	i2c1: i2c@e6518000 {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		compatible = "renesas,i2c-r8a7790";
-+		reg = <0 0xe6518000 0 0x40>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 288 0x4>;
-+		status = "disabled";
-+	};
-+
-+	i2c2: i2c@e6530000 {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		compatible = "renesas,i2c-r8a7790";
-+		reg = <0 0xe6530000 0 0x40>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 286 0x4>;
-+		status = "disabled";
-+	};
-+
-+	i2c3: i2c@e6540000 {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		compatible = "renesas,i2c-r8a7790";
-+		reg = <0 0xe6540000 0 0x40>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 290 0x4>;
-+		status = "disabled";
-+	};
-+
- 	mmcif0: mmcif@ee200000 {
- 		compatible = "renesas,sh-mmcif";
- 		reg = <0 0xee200000 0 0x80>;
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0168-ARM-shmobile-Use-sh73a0-suffix-for-INTC-compat-strin.patch b/patches.renesas/0168-ARM-shmobile-Use-sh73a0-suffix-for-INTC-compat-strin.patch
deleted file mode 100644
index 9169ff783d829..0000000000000
--- a/patches.renesas/0168-ARM-shmobile-Use-sh73a0-suffix-for-INTC-compat-strin.patch
+++ /dev/null
@@ -1,61 +0,0 @@
-From 8209ec050377c686d397c884f0dc6b8efbb7c926 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Thu, 28 Nov 2013 08:14:57 +0900
-Subject: ARM: shmobile: Use sh73a0 suffix for INTC compat string
-
-Add "renesas,intc-irqpin-sh73a0" to the compatible string for the
-IRQ pins in case of sh73a0 INTC. This makes the INTC irqpin follow
-the same style as the other devices and also makes it more future proof.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 8bb44445b08d1068a0ca5f72159d8e373f810155)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/sh73a0.dtsi | 8 ++++----
- 1 file changed, 4 insertions(+), 4 deletions(-)
-
-diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi
-index 29d2ee6e36c6..241c8cdaeaa1 100644
---- a/arch/arm/boot/dts/sh73a0.dtsi
-+++ b/arch/arm/boot/dts/sh73a0.dtsi
-@@ -47,7 +47,7 @@
- 	};
- 
- 	irqpin0: irqpin@e6900000 {
--		compatible = "renesas,intc-irqpin";
-+		compatible = "renesas,intc-irqpin-sh73a0", "renesas,intc-irqpin";
- 		#interrupt-cells = <2>;
- 		interrupt-controller;
- 		reg = <0xe6900000 4>,
-@@ -67,7 +67,7 @@
- 	};
- 
- 	irqpin1: irqpin@e6900004 {
--		compatible = "renesas,intc-irqpin";
-+		compatible = "renesas,intc-irqpin-sh73a0", "renesas,intc-irqpin";
- 		#interrupt-cells = <2>;
- 		interrupt-controller;
- 		reg = <0xe6900004 4>,
-@@ -88,7 +88,7 @@
- 	};
- 
- 	irqpin2: irqpin@e6900008 {
--		compatible = "renesas,intc-irqpin";
-+		compatible = "renesas,intc-irqpin-sh73a0", "renesas,intc-irqpin";
- 		#interrupt-cells = <2>;
- 		interrupt-controller;
- 		reg = <0xe6900008 4>,
-@@ -108,7 +108,7 @@
- 	};
- 
- 	irqpin3: irqpin@e690000c {
--		compatible = "renesas,intc-irqpin";
-+		compatible = "renesas,intc-irqpin-sh73a0", "renesas,intc-irqpin";
- 		#interrupt-cells = <2>;
- 		interrupt-controller;
- 		reg = <0xe690000c 4>,
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0168-ARM-shmobile-r8a73a4-add-a-DT-node-for-the-DMAC.patch b/patches.renesas/0168-ARM-shmobile-r8a73a4-add-a-DT-node-for-the-DMAC.patch
deleted file mode 100644
index b964019cbf14a..0000000000000
--- a/patches.renesas/0168-ARM-shmobile-r8a73a4-add-a-DT-node-for-the-DMAC.patch
+++ /dev/null
@@ -1,75 +0,0 @@
-From dc4b85701eaea3ba555f2402917cd1458e77291f Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Thu, 26 Sep 2013 19:30:03 +0200
-Subject: ARM: shmobile: r8a73a4: add a DT node for the DMAC
-
-Add a DT node for the only system DMAC instance on r8a73a4. The RT DMAC
-can be added later under the same multiplexer, because they can serve the
-same slaves and use the same MID-RID values. Configuration data is
-supplied to the driver, using a compatibility match string.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 734e2ce38c6aa3e88f0a339f001d272196f26dfa)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a73a4.dtsi | 43 ++++++++++++++++++++++++++++++++++++++++++
- 1 file changed, 43 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a73a4.dtsi b/arch/arm/boot/dts/r8a73a4.dtsi
-index 6048825e00c7..287e047592a0 100644
---- a/arch/arm/boot/dts/r8a73a4.dtsi
-+++ b/arch/arm/boot/dts/r8a73a4.dtsi
-@@ -78,6 +78,49 @@
- 				<0 56 4>, <0 57 4>;
- 	};
- 
-+	dmac: dma-multiplexer@0 {
-+		compatible = "renesas,shdma-mux";
-+		#dma-cells = <1>;
-+		dma-channels = <20>;
-+		dma-requests = <256>;
-+		#address-cells = <2>;
-+		#size-cells = <2>;
-+		ranges;
-+
-+		dma0: dma-controller@e6700020 {
-+			compatible = "renesas,shdma-r8a73a4";
-+			reg = <0 0xe6700020 0 0x89e0>;
-+			interrupt-parent = <&gic>;
-+			interrupts = <0 220 4
-+					0 200 4
-+					0 201 4
-+					0 202 4
-+					0 203 4
-+					0 204 4
-+					0 205 4
-+					0 206 4
-+					0 207 4
-+					0 208 4
-+					0 209 4
-+					0 210 4
-+					0 211 4
-+					0 212 4
-+					0 213 4
-+					0 214 4
-+					0 215 4
-+					0 216 4
-+					0 217 4
-+					0 218 4
-+					0 219 4>;
-+			interrupt-names = "error",
-+					"ch0", "ch1", "ch2", "ch3",
-+					"ch4", "ch5", "ch6", "ch7",
-+					"ch8", "ch9", "ch10", "ch11",
-+					"ch12", "ch13", "ch14", "ch15",
-+					"ch16", "ch17", "ch18", "ch19";
-+		};
-+	};
-+
- 	thermal@e61f0000 {
- 		compatible = "renesas,rcar-thermal";
- 		reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>,
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0168-ARM-shmobile-r8a7740-Remove-INTC-function-GPIOs.patch b/patches.renesas/0168-ARM-shmobile-r8a7740-Remove-INTC-function-GPIOs.patch
deleted file mode 100644
index a2385e771d03a..0000000000000
--- a/patches.renesas/0168-ARM-shmobile-r8a7740-Remove-INTC-function-GPIOs.patch
+++ /dev/null
@@ -1,64 +0,0 @@
-From 37826ef2222350b92c1675f12e82ef242d18595c Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 18 Apr 2013 01:06:57 +0200
-Subject: ARM: shmobile: r8a7740: Remove INTC function GPIOs
-
-Those GPIOs have been deprecated by the pinctrl API. They are unused and
-unneeded, remove them.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 1343000c34e84cd31e720dbefd491e6b06347f33)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/include/mach/r8a7740.h | 34 ---------------------------
- 1 file changed, 34 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/include/mach/r8a7740.h b/arch/arm/mach-shmobile/include/mach/r8a7740.h
-index 2656a6df..ef6ddb6b 100644
---- a/arch/arm/mach-shmobile/include/mach/r8a7740.h
-+++ b/arch/arm/mach-shmobile/include/mach/r8a7740.h
-@@ -100,40 +100,6 @@ enum {
- 
- 	GPIO_PORT210, GPIO_PORT211,
- 
--	/* IRQ */
--	GPIO_FN_IRQ0_PORT2,	GPIO_FN_IRQ0_PORT13,
--	GPIO_FN_IRQ1,
--	GPIO_FN_IRQ2_PORT11,	GPIO_FN_IRQ2_PORT12,
--	GPIO_FN_IRQ3_PORT10,	GPIO_FN_IRQ3_PORT14,
--	GPIO_FN_IRQ4_PORT15,	GPIO_FN_IRQ4_PORT172,
--	GPIO_FN_IRQ5_PORT0,	GPIO_FN_IRQ5_PORT1,
--	GPIO_FN_IRQ6_PORT121,	GPIO_FN_IRQ6_PORT173,
--	GPIO_FN_IRQ7_PORT120,	GPIO_FN_IRQ7_PORT209,
--	GPIO_FN_IRQ8,
--	GPIO_FN_IRQ9_PORT118,	GPIO_FN_IRQ9_PORT210,
--	GPIO_FN_IRQ10,
--	GPIO_FN_IRQ11,
--	GPIO_FN_IRQ12_PORT42,	GPIO_FN_IRQ12_PORT97,
--	GPIO_FN_IRQ13_PORT64,	GPIO_FN_IRQ13_PORT98,
--	GPIO_FN_IRQ14_PORT63,	GPIO_FN_IRQ14_PORT99,
--	GPIO_FN_IRQ15_PORT62,	GPIO_FN_IRQ15_PORT100,
--	GPIO_FN_IRQ16_PORT68,	GPIO_FN_IRQ16_PORT211,
--	GPIO_FN_IRQ17,
--	GPIO_FN_IRQ18,
--	GPIO_FN_IRQ19,
--	GPIO_FN_IRQ20,
--	GPIO_FN_IRQ21,
--	GPIO_FN_IRQ22,
--	GPIO_FN_IRQ23,
--	GPIO_FN_IRQ24,
--	GPIO_FN_IRQ25,
--	GPIO_FN_IRQ26_PORT58,	GPIO_FN_IRQ26_PORT81,
--	GPIO_FN_IRQ27_PORT57,	GPIO_FN_IRQ27_PORT168,
--	GPIO_FN_IRQ28_PORT56,	GPIO_FN_IRQ28_PORT169,
--	GPIO_FN_IRQ29_PORT50,	GPIO_FN_IRQ29_PORT170,
--	GPIO_FN_IRQ30_PORT49,	GPIO_FN_IRQ30_PORT171,
--	GPIO_FN_IRQ31_PORT41,	GPIO_FN_IRQ31_PORT167,
--
- 	/* Function */
- 
- 	/* DBGT */
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0169-ARM-shmobile-Use-r8a7740-suffix-for-INTC-compat-stri.patch b/patches.renesas/0169-ARM-shmobile-Use-r8a7740-suffix-for-INTC-compat-stri.patch
deleted file mode 100644
index 27148e53b1d4b..0000000000000
--- a/patches.renesas/0169-ARM-shmobile-Use-r8a7740-suffix-for-INTC-compat-stri.patch
+++ /dev/null
@@ -1,61 +0,0 @@
-From f8ed394e9078e30588639bb79d17be03e98a95e2 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Thu, 28 Nov 2013 08:15:04 +0900
-Subject: ARM: shmobile: Use r8a7740 suffix for INTC compat string
-
-Add "renesas,intc-irqpin-r8a7740" to the compatible string for the
-IRQ pins in case of r8a7740 INTC. This makes the INTC irqpin follow
-the same style as the other devices and also makes it more future proof.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 96327999805dfb5b6e91e6969311d9a77a0160cd)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7740.dtsi | 8 ++++----
- 1 file changed, 4 insertions(+), 4 deletions(-)
-
-diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi
-index 52255bf1e867..2782f642acfc 100644
---- a/arch/arm/boot/dts/r8a7740.dtsi
-+++ b/arch/arm/boot/dts/r8a7740.dtsi
-@@ -41,7 +41,7 @@
- 
- 	/* irqpin0: IRQ0 - IRQ7 */
- 	irqpin0: irqpin@e6900000 {
--		compatible = "renesas,intc-irqpin";
-+		compatible = "renesas,intc-irqpin-r8a7740", "renesas,intc-irqpin";
- 		#interrupt-cells = <2>;
- 		interrupt-controller;
- 		reg = <0xe6900000 4>,
-@@ -62,7 +62,7 @@
- 
- 	/* irqpin1: IRQ8 - IRQ15 */
- 	irqpin1: irqpin@e6900004 {
--		compatible = "renesas,intc-irqpin";
-+		compatible = "renesas,intc-irqpin-r8a7740", "renesas,intc-irqpin";
- 		#interrupt-cells = <2>;
- 		interrupt-controller;
- 		reg = <0xe6900004 4>,
-@@ -83,7 +83,7 @@
- 
- 	/* irqpin2: IRQ16 - IRQ23 */
- 	irqpin2: irqpin@e6900008 {
--		compatible = "renesas,intc-irqpin";
-+		compatible = "renesas,intc-irqpin-r8a7740", "renesas,intc-irqpin";
- 		#interrupt-cells = <2>;
- 		interrupt-controller;
- 		reg = <0xe6900008 4>,
-@@ -104,7 +104,7 @@
- 
- 	/* irqpin3: IRQ24 - IRQ31 */
- 	irqpin3: irqpin@e690000c {
--		compatible = "renesas,intc-irqpin";
-+		compatible = "renesas,intc-irqpin-r8a7740", "renesas,intc-irqpin";
- 		#interrupt-cells = <2>;
- 		interrupt-controller;
- 		reg = <0xe690000c 4>,
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0169-ARM-shmobile-armadillo-reference-Add-PWM-backlight-n.patch b/patches.renesas/0169-ARM-shmobile-armadillo-reference-Add-PWM-backlight-n.patch
deleted file mode 100644
index 0a1526113260e..0000000000000
--- a/patches.renesas/0169-ARM-shmobile-armadillo-reference-Add-PWM-backlight-n.patch
+++ /dev/null
@@ -1,58 +0,0 @@
-From 69bf024e7b7de5714f19e5221c15a16563a80847 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 11 Sep 2013 13:51:13 +0200
-Subject: ARM: shmobile: armadillo-reference: Add PWM backlight node to DT
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 87b73d88723601636646a69445f89c0e498fff71)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- .../boot/dts/r8a7740-armadillo800eva-reference.dts    | 19 +++++++++++++++++++
- 1 file changed, 19 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
-index 9fcffc175da2..8b2aab5c1d3c 100644
---- a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
-+++ b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
-@@ -11,6 +11,7 @@
- /dts-v1/;
- /include/ "r8a7740.dtsi"
- #include <dt-bindings/gpio/gpio.h>
-+#include <dt-bindings/pwm/pwm.h>
- 
- / {
- 	model = "armadillo 800 eva reference";
-@@ -49,6 +50,15 @@
- 			gpios = <&pfc 177 GPIO_ACTIVE_HIGH>;
- 		};
- 	};
-+
-+	backlight {
-+		compatible = "pwm-backlight";
-+		pwms = <&tpu 2 33333 PWM_POLARITY_INVERTED>;
-+		brightness-levels = <0 1 2 4 8 16 32 64 128 255>;
-+		default-brightness-level = <9>;
-+		pinctrl-0 = <&backlight_pins>;
-+		pinctrl-names = "default";
-+	};
- };
- 
- &i2c0 {
-@@ -77,4 +87,13 @@
- 		renesas,groups = "intc_irq10";
- 		renesas,function = "intc";
- 	};
-+
-+	backlight_pins: backlight {
-+		renesas,groups = "tpu0_to2_1";
-+		renesas,function = "tpu0";
-+	};
-+};
-+
-+&tpu {
-+	status = "okay";
- };
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0169-ARM-shmobile-r8a7740-Remove-BSC-function-GPIOs.patch b/patches.renesas/0169-ARM-shmobile-r8a7740-Remove-BSC-function-GPIOs.patch
deleted file mode 100644
index c63e99e02bdd2..0000000000000
--- a/patches.renesas/0169-ARM-shmobile-r8a7740-Remove-BSC-function-GPIOs.patch
+++ /dev/null
@@ -1,64 +0,0 @@
-From 1793bdcf3c603dfafb8a64bbfa50e8cfb38e0632 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 18 Apr 2013 01:06:57 +0200
-Subject: ARM: shmobile: r8a7740: Remove BSC function GPIOs
-
-Those GPIOs have been deprecated by the pinctrl API. They are unused and
-unneeded, remove them.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 45bfd2adab925bee7fc39100dcd3fc8f19088a7a)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/include/mach/r8a7740.h | 27 ++-------------------------
- 1 file changed, 2 insertions(+), 25 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/include/mach/r8a7740.h b/arch/arm/mach-shmobile/include/mach/r8a7740.h
-index ef6ddb6b..28c0542e 100644
---- a/arch/arm/mach-shmobile/include/mach/r8a7740.h
-+++ b/arch/arm/mach-shmobile/include/mach/r8a7740.h
-@@ -297,11 +297,7 @@ enum {
- 	GPIO_FN_BBIF2_TSCK2_PORT89,
- 	GPIO_FN_BBIF2_TSYNC2_PORT184,
- 
--	/* BSC / FLCTL / PCMCIA */
--	GPIO_FN_CS0,	GPIO_FN_CS2,	GPIO_FN_CS4,
--	GPIO_FN_CS5B,	GPIO_FN_CS6A,
--	GPIO_FN_CS5A_PORT105, /* CS5A PORT 19/105 */
--	GPIO_FN_CS5A_PORT19,
-+	/* FLCTL / PCMCIA */
- 	GPIO_FN_IOIS16, /* ? */
- 
- 	GPIO_FN_A0,	GPIO_FN_A1,	GPIO_FN_A2,	GPIO_FN_A3,
-@@ -314,26 +310,7 @@ enum {
- 	GPIO_FN_A22,	GPIO_FN_A23,	GPIO_FN_A24,	GPIO_FN_A25,
- 	GPIO_FN_A26,
- 
--	GPIO_FN_D0_NAF0,	GPIO_FN_D1_NAF1,	/* share with FLCTL */
--	GPIO_FN_D2_NAF2,	GPIO_FN_D3_NAF3,	/* share with FLCTL */
--	GPIO_FN_D4_NAF4,	GPIO_FN_D5_NAF5,	/* share with FLCTL */
--	GPIO_FN_D6_NAF6,	GPIO_FN_D7_NAF7,	/* share with FLCTL */
--	GPIO_FN_D8_NAF8,	GPIO_FN_D9_NAF9,	/* share with FLCTL */
--	GPIO_FN_D10_NAF10,	GPIO_FN_D11_NAF11,	/* share with FLCTL */
--	GPIO_FN_D12_NAF12,	GPIO_FN_D13_NAF13,	/* share with FLCTL */
--	GPIO_FN_D14_NAF14,	GPIO_FN_D15_NAF15,	/* share with FLCTL */
--
--	GPIO_FN_D16,	GPIO_FN_D17,	GPIO_FN_D18,	GPIO_FN_D19,
--	GPIO_FN_D20,	GPIO_FN_D21,	GPIO_FN_D22,	GPIO_FN_D23,
--	GPIO_FN_D24,	GPIO_FN_D25,	GPIO_FN_D26,	GPIO_FN_D27,
--	GPIO_FN_D28,	GPIO_FN_D29,	GPIO_FN_D30,	GPIO_FN_D31,
--
--	GPIO_FN_WE0_FWE,	/* share with FLCTL */
--	GPIO_FN_WE1,
--	GPIO_FN_WE2_ICIORD,	/* share with PCMCIA */
--	GPIO_FN_WE3_ICIOWR,	/* share with PCMCIA */
--	GPIO_FN_CKO,	GPIO_FN_BS,	GPIO_FN_RDWR,
--	GPIO_FN_RD_FSC,		/* share with FLCTL */
-+	GPIO_FN_CKO,
- 	GPIO_FN_WAIT_PORT177,	/* WAIT Port 90/177 */
- 	GPIO_FN_WAIT_PORT90,
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0170-ARM-shmobile-Use-r8a7778-suffix-for-INTC-compat-stri.patch b/patches.renesas/0170-ARM-shmobile-Use-r8a7778-suffix-for-INTC-compat-stri.patch
deleted file mode 100644
index a5e878667165e..0000000000000
--- a/patches.renesas/0170-ARM-shmobile-Use-r8a7778-suffix-for-INTC-compat-stri.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From 57eaf32eb4448257c4bfc38e34a9c813cb18e04d Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Thu, 28 Nov 2013 08:15:11 +0900
-Subject: ARM: shmobile: Use r8a7778 suffix for INTC compat string
-
-Add "renesas,intc-irqpin-r8a7778" to the compatible string for the
-IRQ pins in case of r8a7778 INTC. This makes the INTC irqpin follow
-the same style as the other devices and also makes it more future proof.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit d79af224b7a7d4d24c1170960eefb48ccb328eff)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7778.dtsi | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi
-index b530df63af2b..ddb3bd7a8838 100644
---- a/arch/arm/boot/dts/r8a7778.dtsi
-+++ b/arch/arm/boot/dts/r8a7778.dtsi
-@@ -43,7 +43,7 @@
- 
- 	/* irqpin: IRQ0 - IRQ3 */
- 	irqpin: irqpin@fe78001c {
--		compatible = "renesas,intc-irqpin";
-+		compatible = "renesas,intc-irqpin-r8a7778", "renesas,intc-irqpin";
- 		#interrupt-cells = <2>;
- 		interrupt-controller;
- 		status = "disabled"; /* default off */
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0170-ARM-shmobile-armadillo800eva-reference-add-SDHI-and-.patch b/patches.renesas/0170-ARM-shmobile-armadillo800eva-reference-add-SDHI-and-.patch
deleted file mode 100644
index 02db0c6e976eb..0000000000000
--- a/patches.renesas/0170-ARM-shmobile-armadillo800eva-reference-add-SDHI-and-.patch
+++ /dev/null
@@ -1,144 +0,0 @@
-From 135e205ced8487ee590852f848a25054d35b77eb Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Fri, 27 Sep 2013 10:02:57 +0200
-Subject: ARM: shmobile: armadillo800eva-reference: add SDHI and MMCIF
- interfaces
-
-Add SDHI0 and MMCIF interfaces to armadillo800eva-reference with
-regulators and pin configurations. SDHI1 is not added yet, because the
-switch, that connects the interface either to an SD slot or to a WiFi
-SDIO card cannot be described in DT yet.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit e99d7963e0b9469f16f434a5a68a7cba3004a2df)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- .../boot/dts/r8a7740-armadillo800eva-reference.dts | 58 ++++++++++++++++++++++
- arch/arm/boot/dts/r8a7740.dtsi                     | 33 ++++++++++++
- 2 files changed, 91 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
-index 8b2aab5c1d3c..1c56c5e56950 100644
---- a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
-+++ b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
-@@ -35,6 +35,33 @@
- 		regulator-boot-on;
- 	};
- 
-+	vcc_sdhi0: regulator@1 {
-+		compatible = "regulator-fixed";
-+
-+		regulator-name = "SDHI0 Vcc";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+
-+		gpio = <&pfc 75 GPIO_ACTIVE_HIGH>;
-+		enable-active-high;
-+	};
-+
-+	vccq_sdhi0: regulator@2 {
-+		compatible = "regulator-gpio";
-+
-+		regulator-name = "SDHI0 VccQ";
-+		regulator-min-microvolt = <1800000>;
-+		regulator-max-microvolt = <3300000>;
-+		vin-supply = <&vcc_sdhi0>;
-+
-+		enable-gpio = <&pfc 74 GPIO_ACTIVE_HIGH>;
-+		gpios = <&pfc 17 GPIO_ACTIVE_HIGH>;
-+		states = <3300000 0
-+			  1800000 1>;
-+
-+		enable-active-high;
-+	};
-+
- 	leds {
- 		compatible = "gpio-leds";
- 		led1 {
-@@ -92,8 +119,39 @@
- 		renesas,groups = "tpu0_to2_1";
- 		renesas,function = "tpu0";
- 	};
-+
-+	mmc0_pins: mmc0 {
-+		renesas,groups = "mmc0_data8_1", "mmc0_ctrl_1";
-+		renesas,function = "mmc0";
-+	};
-+
-+	sdhi0_pins: sdhi0 {
-+		renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_wp";
-+		renesas,function = "sdhi0";
-+	};
- };
- 
- &tpu {
- 	status = "okay";
- };
-+
-+&mmcif0 {
-+	pinctrl-0 = <&mmc0_pins>;
-+	pinctrl-names = "default";
-+
-+	vmmc-supply = <&reg_3p3v>;
-+	bus-width = <8>;
-+	non-removable;
-+	status = "okay";
-+};
-+
-+&sdhi0 {
-+	pinctrl-0 = <&sdhi0_pins>;
-+	pinctrl-names = "default";
-+
-+	vmmc-supply = <&vcc_sdhi0>;
-+	vqmmc-supply = <&vccq_sdhi0>;
-+	bus-width = <4>;
-+	cd-gpios = <&pfc 167 GPIO_ACTIVE_LOW>;
-+	status = "okay";
-+};
-diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi
-index 868bdded237c..ae1e230f711d 100644
---- a/arch/arm/boot/dts/r8a7740.dtsi
-+++ b/arch/arm/boot/dts/r8a7740.dtsi
-@@ -161,4 +161,37 @@
- 		status = "disabled";
- 		#pwm-cells = <3>;
- 	};
-+
-+	mmcif0: mmcif@e6bd0000 {
-+		compatible = "renesas,sh-mmcif";
-+		reg = <0xe6bd0000 0x100>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 56 4
-+				0 57 4>;
-+		status = "disabled";
-+	};
-+
-+	sdhi0: sdhi@e6850000 {
-+		compatible = "renesas,sdhi-r8a7740";
-+		reg = <0xe6850000 0x100>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 117 4
-+				0 118 4
-+				0 119 4>;
-+		cap-sd-highspeed;
-+		cap-sdio-irq;
-+		status = "disabled";
-+	};
-+
-+	sdhi1: sdhi@e6860000 {
-+		compatible = "renesas,sdhi-r8a7740";
-+		reg = <0xe6860000 0x100>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 121 4
-+				0 122 4
-+				0 123 4>;
-+		cap-sd-highspeed;
-+		cap-sdio-irq;
-+		status = "disabled";
-+	};
- };
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0170-ARM-shmobile-r8a7740-Remove-GETHER-function-GPIOs.patch b/patches.renesas/0170-ARM-shmobile-r8a7740-Remove-GETHER-function-GPIOs.patch
deleted file mode 100644
index 2d8347f4edd0c..0000000000000
--- a/patches.renesas/0170-ARM-shmobile-r8a7740-Remove-GETHER-function-GPIOs.patch
+++ /dev/null
@@ -1,53 +0,0 @@
-From c7164e513bd2b0596b74a79dcd4ae0a14332360b Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 18 Apr 2013 01:06:57 +0200
-Subject: ARM: shmobile: r8a7740: Remove GETHER function GPIOs
-
-Those GPIOs have been deprecated by the pinctrl API. They are unused and
-unneeded, remove them.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 3dad31ad2eb56f07df795c53cec47e99d46d0ee1)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/include/mach/r8a7740.h | 23 -----------------------
- 1 file changed, 23 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/include/mach/r8a7740.h b/arch/arm/mach-shmobile/include/mach/r8a7740.h
-index 28c0542e..3a8de9c1 100644
---- a/arch/arm/mach-shmobile/include/mach/r8a7740.h
-+++ b/arch/arm/mach-shmobile/include/mach/r8a7740.h
-@@ -331,29 +331,6 @@ enum {
- 	GPIO_FN_IDE_INT,	GPIO_FN_IDE_RST,	GPIO_FN_IDE_DIRECTION,
- 	GPIO_FN_IDE_EXBUF_ENB,	GPIO_FN_IDE_IODACK,	GPIO_FN_IDE_IODREQ,
- 
--	/* RMII */
--	GPIO_FN_RMII_CRS_DV,	GPIO_FN_RMII_RX_ER,	GPIO_FN_RMII_RXD0,
--	GPIO_FN_RMII_RXD1,	GPIO_FN_RMII_TX_EN,	GPIO_FN_RMII_TXD0,
--	GPIO_FN_RMII_MDC,	GPIO_FN_RMII_TXD1,	GPIO_FN_RMII_MDIO,
--	GPIO_FN_RMII_REF50CK,	/* for RMII */
--	GPIO_FN_RMII_REF125CK,	/* for GMII */
--
--	/* GEther */
--	GPIO_FN_ET_TX_CLK,	GPIO_FN_ET_TX_EN,	GPIO_FN_ET_ETXD0,
--	GPIO_FN_ET_ETXD1,	GPIO_FN_ET_ETXD2,	GPIO_FN_ET_ETXD3,
--	GPIO_FN_ET_ETXD4,	GPIO_FN_ET_ETXD5, /* for GEther */
--	GPIO_FN_ET_ETXD6,	GPIO_FN_ET_ETXD7, /* for GEther */
--	GPIO_FN_ET_COL,		GPIO_FN_ET_TX_ER,
--	GPIO_FN_ET_RX_CLK,	GPIO_FN_ET_RX_DV,
--	GPIO_FN_ET_ERXD0,	GPIO_FN_ET_ERXD1,
--	GPIO_FN_ET_ERXD2,	GPIO_FN_ET_ERXD3,
--	GPIO_FN_ET_ERXD4,	GPIO_FN_ET_ERXD5, /* for GEther */
--	GPIO_FN_ET_ERXD6,	GPIO_FN_ET_ERXD7, /* for GEther */
--	GPIO_FN_ET_RX_ER,	GPIO_FN_ET_CRS,
--	GPIO_FN_ET_MDC,		GPIO_FN_ET_MDIO,
--	GPIO_FN_ET_LINK,	GPIO_FN_ET_PHY_INT,
--	GPIO_FN_ET_WOL,		GPIO_FN_ET_GTX_CLK,
--
- 	/* DMA0 */
- 	GPIO_FN_DREQ0,		GPIO_FN_DACK0,
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0171-ARM-shmobile-Use-r8a7779-suffix-for-INTC-compat-stri.patch b/patches.renesas/0171-ARM-shmobile-Use-r8a7779-suffix-for-INTC-compat-stri.patch
deleted file mode 100644
index 817b4d501212c..0000000000000
--- a/patches.renesas/0171-ARM-shmobile-Use-r8a7779-suffix-for-INTC-compat-stri.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From 071ee697a0891cf75ede44f8bc02c7c89d99cb14 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Thu, 28 Nov 2013 08:15:18 +0900
-Subject: ARM: shmobile: Use r8a7779 suffix for INTC compat string
-
-Add "renesas,intc-irqpin-r8a7779" to the compatible string for the
-IRQ pins in case of r8a7779 INTC. This makes the INTC irqpin follow
-the same style as the other devices and also makes it more future proof.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 11ef0340a8cdf9db9a5c49298f361258d090fefb)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7779.dtsi | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi
-index b2b418a8ab2d..8284715feec2 100644
---- a/arch/arm/boot/dts/r8a7779.dtsi
-+++ b/arch/arm/boot/dts/r8a7779.dtsi
-@@ -135,7 +135,7 @@
- 	};
- 
- 	irqpin0: irqpin@fe780010 {
--		compatible = "renesas,intc-irqpin";
-+		compatible = "renesas,intc-irqpin-r8a7779", "renesas,intc-irqpin";
- 		#interrupt-cells = <2>;
- 		status = "disabled";
- 		interrupt-controller;
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0171-ARM-shmobile-r8a7740-Remove-CEU-function-GPIOs.patch b/patches.renesas/0171-ARM-shmobile-r8a7740-Remove-CEU-function-GPIOs.patch
deleted file mode 100644
index 9e3ee4a1d3390..0000000000000
--- a/patches.renesas/0171-ARM-shmobile-r8a7740-Remove-CEU-function-GPIOs.patch
+++ /dev/null
@@ -1,58 +0,0 @@
-From 6e1d3d5e50571d4ce551c3708534fe7642920b73 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 18 Apr 2013 01:06:57 +0200
-Subject: ARM: shmobile: r8a7740: Remove CEU function GPIOs
-
-Those GPIOs have been deprecated by the pinctrl API. They are unused and
-unneeded, remove them.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 102b61e80ba2741e018229453284e1f1371c3922)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/include/mach/r8a7740.h | 28 ---------------------------
- 1 file changed, 28 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/include/mach/r8a7740.h b/arch/arm/mach-shmobile/include/mach/r8a7740.h
-index 3a8de9c1..4bec7cd6 100644
---- a/arch/arm/mach-shmobile/include/mach/r8a7740.h
-+++ b/arch/arm/mach-shmobile/include/mach/r8a7740.h
-@@ -143,34 +143,6 @@ enum {
- 	GPIO_FN_RSPI_MOSI_A,	GPIO_FN_RSPI_MISO_A,
- 	GPIO_FN_RSPI_CK_A,
- 
--	/* VIO CKO */
--	GPIO_FN_VIO_CKO1,
--	GPIO_FN_VIO_CKO2,
--	GPIO_FN_VIO_CKO_1,
--	GPIO_FN_VIO_CKO,
--
--	/* VIO0 */
--	GPIO_FN_VIO0_D0,	GPIO_FN_VIO0_D1,	GPIO_FN_VIO0_D2,
--	GPIO_FN_VIO0_D3,	GPIO_FN_VIO0_D4,	GPIO_FN_VIO0_D5,
--	GPIO_FN_VIO0_D6,	GPIO_FN_VIO0_D7,	GPIO_FN_VIO0_D8,
--	GPIO_FN_VIO0_D9,	GPIO_FN_VIO0_D10,	GPIO_FN_VIO0_D11,
--	GPIO_FN_VIO0_D12,	GPIO_FN_VIO0_VD,	GPIO_FN_VIO0_HD,
--	GPIO_FN_VIO0_CLK,	GPIO_FN_VIO0_FIELD,
--
--	GPIO_FN_VIO0_D13_PORT26, /* MSEL5CR_27_0 */
--	GPIO_FN_VIO0_D14_PORT25,
--	GPIO_FN_VIO0_D15_PORT24,
--
--	GPIO_FN_VIO0_D13_PORT22, /* MSEL5CR_27_1 */
--	GPIO_FN_VIO0_D14_PORT95,
--	GPIO_FN_VIO0_D15_PORT96,
--
--	/* VIO1 */
--	GPIO_FN_VIO1_D0,	GPIO_FN_VIO1_D1,	GPIO_FN_VIO1_D2,
--	GPIO_FN_VIO1_D3,	GPIO_FN_VIO1_D4,	GPIO_FN_VIO1_D5,
--	GPIO_FN_VIO1_D6,	GPIO_FN_VIO1_D7,	GPIO_FN_VIO1_VD,
--	GPIO_FN_VIO1_HD,	GPIO_FN_VIO1_CLK,	GPIO_FN_VIO1_FIELD,
--
- 	/* TPU0 */
- 	GPIO_FN_TPU0TO0,	GPIO_FN_TPU0TO1,
- 	GPIO_FN_TPU0TO3,
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0171-ARM-shmobile-r8a7791-IRQC-device-tree-node.patch b/patches.renesas/0171-ARM-shmobile-r8a7791-IRQC-device-tree-node.patch
deleted file mode 100644
index c57324ff0c722..0000000000000
--- a/patches.renesas/0171-ARM-shmobile-r8a7791-IRQC-device-tree-node.patch
+++ /dev/null
@@ -1,46 +0,0 @@
-From 3337e482febfb626979c95246c043338a4f211b4 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Tue, 1 Oct 2013 17:12:29 +0900
-Subject: ARM: shmobile: r8a7791 IRQC device tree node
-
-Enable a r8a7791 IRQC block by adding a device tree
-node for the IRQC hardware and pins IRQ0 to IRQ9.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit d77db73e260fe4b5cca4fa1e5253c21e2d755f58)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7791.dtsi | 18 ++++++++++++++++++
- 1 file changed, 18 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
-index bbed43bd9be9..b70141758de1 100644
---- a/arch/arm/boot/dts/r8a7791.dtsi
-+++ b/arch/arm/boot/dts/r8a7791.dtsi
-@@ -38,4 +38,22 @@
- 			<0 0xf1006000 0 0x2000>;
- 		interrupts = <1 9 0xf04>;
- 	};
-+
-+	irqc0: interrupt-controller@e61c0000 {
-+		compatible = "renesas,irqc";
-+		#interrupt-cells = <2>;
-+		interrupt-controller;
-+		reg = <0 0xe61c0000 0 0x200>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 0 4>,
-+			      <0 1 4>,
-+			      <0 2 4>,
-+			      <0 3 4>,
-+			      <0 12 4>,
-+			      <0 13 4>,
-+			      <0 14 4>,
-+			      <0 15 4>,
-+			      <0 16 4>,
-+			      <0 17 4>;
-+	};
- };
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0172-ARM-shmobile-r8a7740-Remove-FSI-function-GPIOs.patch b/patches.renesas/0172-ARM-shmobile-r8a7740-Remove-FSI-function-GPIOs.patch
deleted file mode 100644
index d297e826e662c..0000000000000
--- a/patches.renesas/0172-ARM-shmobile-r8a7740-Remove-FSI-function-GPIOs.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From 48d3abadd3f62d6cb05fdb9f1889a437b1dde664 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 18 Apr 2013 01:06:57 +0200
-Subject: ARM: shmobile: r8a7740: Remove FSI function GPIOs
-
-Those GPIOs have been deprecated by the pinctrl API. They are unused and
-unneeded, remove them.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit eb86857362e5c8874c9d7e5c13c95e3dd5908411)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/include/mach/r8a7740.h | 14 --------------
- 1 file changed, 14 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/include/mach/r8a7740.h b/arch/arm/mach-shmobile/include/mach/r8a7740.h
-index 4bec7cd6..cb8e3fb5 100644
---- a/arch/arm/mach-shmobile/include/mach/r8a7740.h
-+++ b/arch/arm/mach-shmobile/include/mach/r8a7740.h
-@@ -107,20 +107,6 @@ enum {
- 	GPIO_FN_DBGMD10,	GPIO_FN_DBGMD11,	GPIO_FN_DBGMD20,
- 	GPIO_FN_DBGMD21,
- 
--	/* FSI-A */
--	GPIO_FN_FSIAISLD_PORT0,		/* FSIAISLD Port 0/5 */
--	GPIO_FN_FSIAISLD_PORT5,
--	GPIO_FN_FSIASPDIF_PORT9,	/* FSIASPDIF Port 9/18 */
--	GPIO_FN_FSIASPDIF_PORT18,
--	GPIO_FN_FSIAOSLD1,	GPIO_FN_FSIAOSLD2,
--	GPIO_FN_FSIAOLR,	GPIO_FN_FSIAOBT,
--	GPIO_FN_FSIAOSLD,	GPIO_FN_FSIAOMC,
--	GPIO_FN_FSIACK,		GPIO_FN_FSIAILR,
--	GPIO_FN_FSIAIBT,
--
--	/* FSI-B */
--	GPIO_FN_FSIBCK,
--
- 	/* FMSI */
- 	GPIO_FN_FMSISLD_PORT1, /* FMSISLD Port 1/6 */
- 	GPIO_FN_FMSISLD_PORT6,
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0172-ARM-shmobile-r8a7779-add-HSPI-support-to-DTSI.patch b/patches.renesas/0172-ARM-shmobile-r8a7779-add-HSPI-support-to-DTSI.patch
deleted file mode 100644
index 3f974da006756..0000000000000
--- a/patches.renesas/0172-ARM-shmobile-r8a7779-add-HSPI-support-to-DTSI.patch
+++ /dev/null
@@ -1,65 +0,0 @@
-From 08e6264161aa61d2167febe2e0eefac24f276e6c Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Tue, 26 Nov 2013 16:47:11 +0900
-Subject: ARM: shmobile: r8a7779: add HSPI support to DTSI
-
-Based on work for the r8a7778 SoC by Kuninori Morimoto.
-
-Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 3c3f6ad350bbeccaba5ab54a267900dcc76b9dd2)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7779.dtsi | 30 ++++++++++++++++++++++++++++++
- 1 file changed, 30 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi
-index 8284715feec2..d0561d4c7c46 100644
---- a/arch/arm/boot/dts/r8a7779.dtsi
-+++ b/arch/arm/boot/dts/r8a7779.dtsi
-@@ -42,6 +42,12 @@
- 		};
- 	};
- 
-+	aliases {
-+		spi0 = &hspi0;
-+		spi1 = &hspi1;
-+		spi2 = &hspi2;
-+	};
-+
-         gic: interrupt-controller@f0001000 {
-                 compatible = "arm,cortex-a9-gic";
-                 #interrupt-cells = <3>;
-@@ -248,4 +254,28 @@
- 		cap-sdio-irq;
- 		status = "disabled";
- 	};
-+
-+	hspi0: spi@fffc7000 {
-+		compatible = "renesas,hspi";
-+		reg = <0xfffc7000 0x18>;
-+		interrupt-controller = <&gic>;
-+		interrupts = <0 73 IRQ_TYPE_LEVEL_HIGH>;
-+		status = "disabled";
-+	};
-+
-+	hspi1: spi@fffc8000 {
-+		compatible = "renesas,hspi";
-+		reg = <0xfffc8000 0x18>;
-+		interrupt-controller = <&gic>;
-+		interrupts = <0 74 IRQ_TYPE_LEVEL_HIGH>;
-+		status = "disabled";
-+	};
-+
-+	hspi2: spi@fffc6000 {
-+		compatible = "renesas,hspi";
-+		reg = <0xfffc6000 0x18>;
-+		interrupt-controller = <&gic>;
-+		interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>;
-+		status = "disabled";
-+	};
- };
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0172-ARM-shmobile-r8a7791-Arch-timer-device-tree-node.patch b/patches.renesas/0172-ARM-shmobile-r8a7791-Arch-timer-device-tree-node.patch
deleted file mode 100644
index 663dc051743c8..0000000000000
--- a/patches.renesas/0172-ARM-shmobile-r8a7791-Arch-timer-device-tree-node.patch
+++ /dev/null
@@ -1,40 +0,0 @@
-From 42be4b70f3ece74227b4a063245bfbbf48971987 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Tue, 1 Oct 2013 17:12:38 +0900
-Subject: ARM: shmobile: r8a7791 Arch timer device tree node
-
-Add r8a7791 arch timer device tree information.
-
-This needs to be used together with r8a7791 support
-code that ties in the R-Car Gen2 arch timer workarounds.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 03586acf7808ed65963cd262188b059ff6951d40)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7791.dtsi | 8 ++++++++
- 1 file changed, 8 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
-index b70141758de1..a1a9e5c4813d 100644
---- a/arch/arm/boot/dts/r8a7791.dtsi
-+++ b/arch/arm/boot/dts/r8a7791.dtsi
-@@ -39,6 +39,14 @@
- 		interrupts = <1 9 0xf04>;
- 	};
- 
-+	timer {
-+		compatible = "arm,armv7-timer";
-+		interrupts = <1 13 0xf08>,
-+				<1 14 0xf08>,
-+				<1 11 0xf08>,
-+				<1 10 0xf08>;
-+	};
-+
- 	irqc0: interrupt-controller@e61c0000 {
- 		compatible = "renesas,irqc";
- 		#interrupt-cells = <2>;
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0173-ARM-shmobile-marzen-enable-HSPI0-in-DTS.patch b/patches.renesas/0173-ARM-shmobile-marzen-enable-HSPI0-in-DTS.patch
deleted file mode 100644
index a82aa27f297fc..0000000000000
--- a/patches.renesas/0173-ARM-shmobile-marzen-enable-HSPI0-in-DTS.patch
+++ /dev/null
@@ -1,45 +0,0 @@
-From 949bdaeb0aa89a2eb94d32e21a2c13fe0ed5c19b Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Tue, 26 Nov 2013 16:47:12 +0900
-Subject: ARM: shmobile: marzen: enable HSPI0 in DTS
-
-Based on work for the bockw board by Kuninori Morimoto.
-
-Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 1fd219561a4afc51b5f257692f3581546434db5b)
-(Queued by ARM-SoC for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7779-marzen-reference.dts | 11 +++++++++++
- 1 file changed, 11 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a7779-marzen-reference.dts b/arch/arm/boot/dts/r8a7779-marzen-reference.dts
-index 918085c375d9..76f5eef7d1cc 100644
---- a/arch/arm/boot/dts/r8a7779-marzen-reference.dts
-+++ b/arch/arm/boot/dts/r8a7779-marzen-reference.dts
-@@ -97,6 +97,11 @@
- 		renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_cd";
- 		renesas,function = "sdhi0";
- 	};
-+
-+	hspi0_pins: hspi0 {
-+		renesas,groups = "hspi0";
-+		renesas,function = "hspi0";
-+	};
- };
- 
- &sdhi0 {
-@@ -107,3 +112,9 @@
- 	bus-width = <4>;
- 	status = "okay";
- };
-+
-+&hspi0 {
-+	pinctrl-0 = <&hspi0_pins>;
-+	pinctrl-names = "default";
-+	status = "okay";
-+};
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0173-ARM-shmobile-r8a7740-Remove-HDMI-function-GPIOs.patch b/patches.renesas/0173-ARM-shmobile-r8a7740-Remove-HDMI-function-GPIOs.patch
deleted file mode 100644
index 3e72f1217d7da..0000000000000
--- a/patches.renesas/0173-ARM-shmobile-r8a7740-Remove-HDMI-function-GPIOs.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From 02097e4d4ad3e21394ceab53a72546bddfb6fa87 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 18 Apr 2013 01:06:57 +0200
-Subject: ARM: shmobile: r8a7740: Remove HDMI function GPIOs
-
-Those GPIOs have been deprecated by the pinctrl API. They are unused and
-unneeded, remove them.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 7e454d1f26c704413f52050ba67d3144b853faed)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/include/mach/r8a7740.h | 4 ----
- 1 file changed, 4 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/include/mach/r8a7740.h b/arch/arm/mach-shmobile/include/mach/r8a7740.h
-index cb8e3fb5..ed30a1df 100644
---- a/arch/arm/mach-shmobile/include/mach/r8a7740.h
-+++ b/arch/arm/mach-shmobile/include/mach/r8a7740.h
-@@ -300,10 +300,6 @@ enum {
- 	GPIO_FN_RESETP_PULLUP,
- 	GPIO_FN_RESETP_PLAIN,
- 
--	/* HDMI */
--	GPIO_FN_HDMI_HPD,
--	GPIO_FN_HDMI_CEC,
--
- 	/* SDENC */
- 	GPIO_FN_SDENC_CPG,
- 	GPIO_FN_SDENC_DV_CLKI,
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0173-ARM-shmobile-r8a7791-SMP-device-tree-node.patch b/patches.renesas/0173-ARM-shmobile-r8a7791-SMP-device-tree-node.patch
deleted file mode 100644
index c297743c3fba2..0000000000000
--- a/patches.renesas/0173-ARM-shmobile-r8a7791-SMP-device-tree-node.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From c40dd09cc5d2cc49c56cebf7701967cb24c6ff04 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Tue, 1 Oct 2013 17:13:07 +0900
-Subject: ARM: shmobile: r8a7791 SMP device tree node
-
-Add a device node for the r8a7791 secondary CPU core.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 15ab426c0f1935016ea52cfedf0d808f8c79dd1e)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7791.dtsi | 7 +++++++
- 1 file changed, 7 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
-index a1a9e5c4813d..fea5cfef4691 100644
---- a/arch/arm/boot/dts/r8a7791.dtsi
-+++ b/arch/arm/boot/dts/r8a7791.dtsi
-@@ -25,6 +25,13 @@
- 			reg = <0>;
- 			clock-frequency = <1300000000>;
- 		};
-+
-+		cpu1: cpu@1 {
-+			device_type = "cpu";
-+			compatible = "arm,cortex-a15";
-+			reg = <1>;
-+			clock-frequency = <1300000000>;
-+		};
- 	};
- 
- 	gic: interrupt-controller@f1001000 {
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0174-ARM-shmobile-r8a7778-add-renesas_intc_irqpin-support.patch b/patches.renesas/0174-ARM-shmobile-r8a7778-add-renesas_intc_irqpin-support.patch
deleted file mode 100644
index a9d062701844d..0000000000000
--- a/patches.renesas/0174-ARM-shmobile-r8a7778-add-renesas_intc_irqpin-support.patch
+++ /dev/null
@@ -1,46 +0,0 @@
-From dbc40f34b80cf1f766d87776b604e530218e1b78 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Wed, 2 Oct 2013 01:32:12 -0700
-Subject: ARM: shmobile: r8a7778: add renesas_intc_irqpin support on DTSI
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 87f1ba80179a75ae1e2e783b890adb39949c7c03)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7778.dtsi | 19 +++++++++++++++++++
- 1 file changed, 19 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi
-index 3577aba82583..a6308a399e2d 100644
---- a/arch/arm/boot/dts/r8a7778.dtsi
-+++ b/arch/arm/boot/dts/r8a7778.dtsi
-@@ -33,6 +33,25 @@
- 		      <0xfe430000 0x100>;
- 	};
- 
-+	/* irqpin: IRQ0 - IRQ3 */
-+	irqpin: irqpin@fe78001c {
-+		compatible = "renesas,intc-irqpin";
-+		#interrupt-cells = <2>;
-+		interrupt-controller;
-+		status = "disabled"; /* default off */
-+		reg =	<0xfe78001c 4>,
-+			<0xfe780010 4>,
-+			<0xfe780024 4>,
-+			<0xfe780044 4>,
-+			<0xfe780064 4>;
-+		interrupt-parent = <&gic>;
-+		interrupts =   <0 27 0x4
-+				0 28 0x4
-+				0 29 0x4
-+				0 30 0x4>;
-+		sense-bitfield-width = <2>;
-+	};
-+
- 	gpio0: gpio@ffc40000 {
- 		compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
- 		reg = <0xffc40000 0x2c>;
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0174-ARM-shmobile-r8a7790-Add-clock-index-macros-for-DT-s.patch b/patches.renesas/0174-ARM-shmobile-r8a7790-Add-clock-index-macros-for-DT-s.patch
deleted file mode 100644
index 60cdf7d051b1e..0000000000000
--- a/patches.renesas/0174-ARM-shmobile-r8a7790-Add-clock-index-macros-for-DT-s.patch
+++ /dev/null
@@ -1,127 +0,0 @@
-From 283627bc5dfbf2f63aa5bd2008aced18b01c7a70 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 11 Dec 2013 15:05:12 +0100
-Subject: ARM: shmobile: r8a7790: Add clock index macros for DT sources
-
-Add macros usable by device tree sources to reference r8a7790 clocks by
-index.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit ac991dce6498b5fc6396c7ac6f6a27b5585ef0f3)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- include/dt-bindings/clock/r8a7790-clock.h | 100 ++++++++++++++++++++++++++++++
- 1 file changed, 100 insertions(+)
- create mode 100644 include/dt-bindings/clock/r8a7790-clock.h
-
-diff --git a/include/dt-bindings/clock/r8a7790-clock.h b/include/dt-bindings/clock/r8a7790-clock.h
-new file mode 100644
-index 000000000000..420f0b00ae1e
---- /dev/null
-+++ b/include/dt-bindings/clock/r8a7790-clock.h
-@@ -0,0 +1,100 @@
-+/*
-+ * Copyright 2013 Ideas On Board SPRL
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ */
-+
-+#ifndef __DT_BINDINGS_CLOCK_R8A7790_H__
-+#define __DT_BINDINGS_CLOCK_R8A7790_H__
-+
-+/* CPG */
-+#define R8A7790_CLK_MAIN		0
-+#define R8A7790_CLK_PLL0		1
-+#define R8A7790_CLK_PLL1		2
-+#define R8A7790_CLK_PLL3		3
-+#define R8A7790_CLK_LB			4
-+#define R8A7790_CLK_QSPI		5
-+#define R8A7790_CLK_SDH			6
-+#define R8A7790_CLK_SD0			7
-+#define R8A7790_CLK_SD1			8
-+#define R8A7790_CLK_Z			9
-+
-+/* MSTP1 */
-+#define R8A7790_CLK_TMU1		11
-+#define R8A7790_CLK_TMU3		21
-+#define R8A7790_CLK_TMU2		22
-+#define R8A7790_CLK_CMT0		24
-+#define R8A7790_CLK_TMU0		25
-+#define R8A7790_CLK_VSP1_DU1		27
-+#define R8A7790_CLK_VSP1_DU0		28
-+#define R8A7790_CLK_VSP1_RT		30
-+#define R8A7790_CLK_VSP1_SY		31
-+
-+/* MSTP2 */
-+#define R8A7790_CLK_SCIFA2		2
-+#define R8A7790_CLK_SCIFA1		3
-+#define R8A7790_CLK_SCIFA0		4
-+#define R8A7790_CLK_SCIFB0		6
-+#define R8A7790_CLK_SCIFB1		7
-+#define R8A7790_CLK_SCIFB2		16
-+#define R8A7790_CLK_SYS_DMAC0		18
-+#define R8A7790_CLK_SYS_DMAC1		19
-+
-+/* MSTP3 */
-+#define R8A7790_CLK_TPU0		4
-+#define R8A7790_CLK_MMCIF1		5
-+#define R8A7790_CLK_SDHI3		11
-+#define R8A7790_CLK_SDHI2		12
-+#define R8A7790_CLK_SDHI1		13
-+#define R8A7790_CLK_SDHI0		14
-+#define R8A7790_CLK_MMCIF0		15
-+#define R8A7790_CLK_SSUSB		28
-+#define R8A7790_CLK_CMT1		29
-+#define R8A7790_CLK_USBDMAC0		30
-+#define R8A7790_CLK_USBDMAC1		31
-+
-+/* MSTP5 */
-+#define R8A7790_CLK_THERMAL		22
-+#define R8A7790_CLK_PWM			23
-+
-+/* MSTP7 */
-+#define R8A7790_CLK_EHCI		3
-+#define R8A7790_CLK_HSUSB		4
-+#define R8A7790_CLK_HSCIF1		16
-+#define R8A7790_CLK_HSCIF0		17
-+#define R8A7790_CLK_SCIF1		20
-+#define R8A7790_CLK_SCIF0		21
-+#define R8A7790_CLK_DU2			22
-+#define R8A7790_CLK_DU1			23
-+#define R8A7790_CLK_DU0			24
-+#define R8A7790_CLK_LVDS1		25
-+#define R8A7790_CLK_LVDS0		26
-+
-+/* MSTP8 */
-+#define R8A7790_CLK_VIN3		8
-+#define R8A7790_CLK_VIN2		9
-+#define R8A7790_CLK_VIN1		10
-+#define R8A7790_CLK_VIN0		11
-+#define R8A7790_CLK_ETHER		13
-+#define R8A7790_CLK_SATA1		14
-+#define R8A7790_CLK_SATA0		15
-+
-+/* MSTP9 */
-+#define R8A7790_CLK_GPIO5		7
-+#define R8A7790_CLK_GPIO4		8
-+#define R8A7790_CLK_GPIO3		9
-+#define R8A7790_CLK_GPIO2		10
-+#define R8A7790_CLK_GPIO1		11
-+#define R8A7790_CLK_GPIO0		12
-+#define R8A7790_CLK_RCAN1		15
-+#define R8A7790_CLK_RCAN0		16
-+#define R8A7790_CLK_IICDVFS		26
-+#define R8A7790_CLK_I2C3		28
-+#define R8A7790_CLK_I2C2		29
-+#define R8A7790_CLK_I2C1		30
-+#define R8A7790_CLK_I2C0		31
-+
-+#endif /* __DT_BINDINGS_CLOCK_R8A7790_H__ */
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0174-sh-pfc-r8a7740-Remove-function-GPIOs.patch b/patches.renesas/0174-sh-pfc-r8a7740-Remove-function-GPIOs.patch
deleted file mode 100644
index 5ff95c42d151a..0000000000000
--- a/patches.renesas/0174-sh-pfc-r8a7740-Remove-function-GPIOs.patch
+++ /dev/null
@@ -1,241 +0,0 @@
-From 69eb33885426025b70c8405873d617888f79f715 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 23 Apr 2013 00:29:23 +0200
-Subject: sh-pfc: r8a7740: Remove function GPIOs
-
-No r8a7740 platform use the function GPIOs API. Remove it.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit d65c5ee14e998dd60aeeedbb037a2d0839e832e5)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7740.c | 205 -----------------------------------
- 1 file changed, 205 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-index fb7a3e8e..9f44fd65 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-@@ -3197,208 +3197,6 @@ static const struct sh_pfc_function pinmux_functions[] = {
- 	SH_PFC_FUNCTION(sdhi2),
- };
- 
--#define PINMUX_FN_BASE	ARRAY_SIZE(pinmux_pins)
--
--static const struct pinmux_func pinmux_func_gpios[] = {
--	/* Function */
--
--	/* DBGT */
--	GPIO_FN(DBGMDT2),	GPIO_FN(DBGMDT1),	GPIO_FN(DBGMDT0),
--	GPIO_FN(DBGMD10),	GPIO_FN(DBGMD11),	GPIO_FN(DBGMD20),
--	GPIO_FN(DBGMD21),
--
--	/* FMSI */
--	GPIO_FN(FMSISLD_PORT1), /* FMSISLD Port 1/6 */
--	GPIO_FN(FMSISLD_PORT6),
--	GPIO_FN(FMSIILR),	GPIO_FN(FMSIIBT),	GPIO_FN(FMSIOLR),
--	GPIO_FN(FMSIOBT),	GPIO_FN(FMSICK),	GPIO_FN(FMSOILR),
--	GPIO_FN(FMSOIBT),	GPIO_FN(FMSOOLR),	GPIO_FN(FMSOOBT),
--	GPIO_FN(FMSOSLD),	GPIO_FN(FMSOCK),
--
--	/* RSPI */
--	GPIO_FN(RSPI_SSL0_A),	GPIO_FN(RSPI_SSL1_A),	GPIO_FN(RSPI_SSL2_A),
--	GPIO_FN(RSPI_SSL3_A),	GPIO_FN(RSPI_CK_A),	GPIO_FN(RSPI_MOSI_A),
--	GPIO_FN(RSPI_MISO_A),
--
--	/* TPU0 */
--	GPIO_FN(TPU0TO0),	GPIO_FN(TPU0TO1),	GPIO_FN(TPU0TO3),
--	GPIO_FN(TPU0TO2_PORT66), /* TPU0TO2 Port 66/202 */
--	GPIO_FN(TPU0TO2_PORT202),
--
--	/* SSP1 0 */
--	GPIO_FN(STP0_IPD0),	GPIO_FN(STP0_IPD1),	GPIO_FN(STP0_IPD2),
--	GPIO_FN(STP0_IPD3),	GPIO_FN(STP0_IPD4),	GPIO_FN(STP0_IPD5),
--	GPIO_FN(STP0_IPD6),	GPIO_FN(STP0_IPD7),	GPIO_FN(STP0_IPEN),
--	GPIO_FN(STP0_IPCLK),	GPIO_FN(STP0_IPSYNC),
--
--	/* SSP1 1 */
--	GPIO_FN(STP1_IPD1),	GPIO_FN(STP1_IPD2),	GPIO_FN(STP1_IPD3),
--	GPIO_FN(STP1_IPD4),	GPIO_FN(STP1_IPD5),	GPIO_FN(STP1_IPD6),
--	GPIO_FN(STP1_IPD7),	GPIO_FN(STP1_IPCLK),	GPIO_FN(STP1_IPSYNC),
--
--	GPIO_FN(STP1_IPD0_PORT186), /* MSEL5CR_23_0 */
--	GPIO_FN(STP1_IPEN_PORT187),
--
--	GPIO_FN(STP1_IPD0_PORT194), /* MSEL5CR_23_1 */
--	GPIO_FN(STP1_IPEN_PORT193),
--
--	/* SIM */
--	GPIO_FN(SIM_RST),	GPIO_FN(SIM_CLK),
--	GPIO_FN(SIM_D_PORT22), /* SIM_D  Port 22/199 */
--	GPIO_FN(SIM_D_PORT199),
--
--	/* MSIOF2 */
--	GPIO_FN(MSIOF2_TXD),	GPIO_FN(MSIOF2_RXD),	GPIO_FN(MSIOF2_TSCK),
--	GPIO_FN(MSIOF2_SS2),	GPIO_FN(MSIOF2_TSYNC),	GPIO_FN(MSIOF2_SS1),
--	GPIO_FN(MSIOF2_MCK1),	GPIO_FN(MSIOF2_MCK0),	GPIO_FN(MSIOF2_RSYNC),
--	GPIO_FN(MSIOF2_RSCK),
--
--	/* KEYSC */
--	GPIO_FN(KEYIN4),	GPIO_FN(KEYIN5),
--	GPIO_FN(KEYIN6),	GPIO_FN(KEYIN7),
--	GPIO_FN(KEYOUT0),	GPIO_FN(KEYOUT1),	GPIO_FN(KEYOUT2),
--	GPIO_FN(KEYOUT3),	GPIO_FN(KEYOUT4),	GPIO_FN(KEYOUT5),
--	GPIO_FN(KEYOUT6),	GPIO_FN(KEYOUT7),
--
--	GPIO_FN(KEYIN0_PORT43), /* MSEL4CR_18_0 */
--	GPIO_FN(KEYIN1_PORT44),
--	GPIO_FN(KEYIN2_PORT45),
--	GPIO_FN(KEYIN3_PORT46),
--
--	GPIO_FN(KEYIN0_PORT58), /* MSEL4CR_18_1 */
--	GPIO_FN(KEYIN1_PORT57),
--	GPIO_FN(KEYIN2_PORT56),
--	GPIO_FN(KEYIN3_PORT55),
--
--	/* VOU */
--	GPIO_FN(DV_D0),		GPIO_FN(DV_D1),		GPIO_FN(DV_D2),
--	GPIO_FN(DV_D3),		GPIO_FN(DV_D4),		GPIO_FN(DV_D5),
--	GPIO_FN(DV_D6),		GPIO_FN(DV_D7),		GPIO_FN(DV_D8),
--	GPIO_FN(DV_D9),		GPIO_FN(DV_D10),	GPIO_FN(DV_D11),
--	GPIO_FN(DV_D12),	GPIO_FN(DV_D13),	GPIO_FN(DV_D14),
--	GPIO_FN(DV_D15),	GPIO_FN(DV_CLK),
--	GPIO_FN(DV_VSYNC),	GPIO_FN(DV_HSYNC),
--
--	/* MEMC */
--	GPIO_FN(MEMC_AD0),	GPIO_FN(MEMC_AD1),	GPIO_FN(MEMC_AD2),
--	GPIO_FN(MEMC_AD3),	GPIO_FN(MEMC_AD4),	GPIO_FN(MEMC_AD5),
--	GPIO_FN(MEMC_AD6),	GPIO_FN(MEMC_AD7),	GPIO_FN(MEMC_AD8),
--	GPIO_FN(MEMC_AD9),	GPIO_FN(MEMC_AD10),	GPIO_FN(MEMC_AD11),
--	GPIO_FN(MEMC_AD12),	GPIO_FN(MEMC_AD13),	GPIO_FN(MEMC_AD14),
--	GPIO_FN(MEMC_AD15),	GPIO_FN(MEMC_CS0),	GPIO_FN(MEMC_INT),
--	GPIO_FN(MEMC_NWE),	GPIO_FN(MEMC_NOE),	GPIO_FN(MEMC_CS1),
--	GPIO_FN(MEMC_A1),	GPIO_FN(MEMC_ADV),	GPIO_FN(MEMC_DREQ0),
--	GPIO_FN(MEMC_WAIT),	GPIO_FN(MEMC_DREQ1),	GPIO_FN(MEMC_BUSCLK),
--	GPIO_FN(MEMC_A0),
--
--	/* MSIOF0 */
--	GPIO_FN(MSIOF0_SS1),	GPIO_FN(MSIOF0_SS2),	GPIO_FN(MSIOF0_RXD),
--	GPIO_FN(MSIOF0_TXD),	GPIO_FN(MSIOF0_MCK0),	GPIO_FN(MSIOF0_MCK1),
--	GPIO_FN(MSIOF0_RSYNC),	GPIO_FN(MSIOF0_RSCK),	GPIO_FN(MSIOF0_TSCK),
--	GPIO_FN(MSIOF0_TSYNC),
--
--	/* MSIOF1 */
--	GPIO_FN(MSIOF1_RSCK),	GPIO_FN(MSIOF1_RSYNC),
--	GPIO_FN(MSIOF1_MCK0),	GPIO_FN(MSIOF1_MCK1),
--
--	GPIO_FN(MSIOF1_SS2_PORT116),	GPIO_FN(MSIOF1_SS1_PORT117),
--	GPIO_FN(MSIOF1_RXD_PORT118),	GPIO_FN(MSIOF1_TXD_PORT119),
--	GPIO_FN(MSIOF1_TSYNC_PORT120),
--	GPIO_FN(MSIOF1_TSCK_PORT121),	/* MSEL4CR_10_0 */
--
--	GPIO_FN(MSIOF1_SS1_PORT67),	GPIO_FN(MSIOF1_TSCK_PORT72),
--	GPIO_FN(MSIOF1_TSYNC_PORT73),	GPIO_FN(MSIOF1_TXD_PORT74),
--	GPIO_FN(MSIOF1_RXD_PORT75),
--	GPIO_FN(MSIOF1_SS2_PORT202),	/* MSEL4CR_10_1 */
--
--	/* GPIO */
--	GPIO_FN(GPO0),	GPIO_FN(GPI0),
--	GPIO_FN(GPO1),	GPIO_FN(GPI1),
--
--	/* USB0 */
--	GPIO_FN(USB0_OCI),	GPIO_FN(USB0_PPON),	GPIO_FN(VBUS),
--
--	/* USB1 */
--	GPIO_FN(USB1_OCI),	GPIO_FN(USB1_PPON),
--
--	/* BBIF1 */
--	GPIO_FN(BBIF1_RXD),	GPIO_FN(BBIF1_TXD),	GPIO_FN(BBIF1_TSYNC),
--	GPIO_FN(BBIF1_TSCK),	GPIO_FN(BBIF1_RSCK),	GPIO_FN(BBIF1_RSYNC),
--	GPIO_FN(BBIF1_FLOW),	GPIO_FN(BBIF1_RX_FLOW_N),
--
--	/* BBIF2 */
--	GPIO_FN(BBIF2_TXD2_PORT5), /* MSEL5CR_0_0 */
--	GPIO_FN(BBIF2_RXD2_PORT60),
--	GPIO_FN(BBIF2_TSYNC2_PORT6),
--	GPIO_FN(BBIF2_TSCK2_PORT59),
--
--	GPIO_FN(BBIF2_RXD2_PORT90), /* MSEL5CR_0_1 */
--	GPIO_FN(BBIF2_TXD2_PORT183),
--	GPIO_FN(BBIF2_TSCK2_PORT89),
--	GPIO_FN(BBIF2_TSYNC2_PORT184),
--
--	/* FLCTL / PCMCIA */
--	GPIO_FN(IOIS16), /* ? */
--
--	GPIO_FN(A0),	GPIO_FN(A1),	GPIO_FN(A2),	GPIO_FN(A3),
--	GPIO_FN(A4_FOE),	GPIO_FN(A5_FCDE),	/* share with FLCTL */
--	GPIO_FN(A6),	GPIO_FN(A7),	GPIO_FN(A8),	GPIO_FN(A9),
--	GPIO_FN(A10),	GPIO_FN(A11),	GPIO_FN(A12),	GPIO_FN(A13),
--	GPIO_FN(A14),	GPIO_FN(A15),	GPIO_FN(A16),	GPIO_FN(A17),
--	GPIO_FN(A18),	GPIO_FN(A19),	GPIO_FN(A20),	GPIO_FN(A21),
--	GPIO_FN(A22),	GPIO_FN(A23),	GPIO_FN(A24),	GPIO_FN(A25),
--	GPIO_FN(A26),
--
--	GPIO_FN(CKO),
--	GPIO_FN(WAIT_PORT177), /* WAIT Port 90/177 */
--	GPIO_FN(WAIT_PORT90),
--
--	GPIO_FN(FCE0),	GPIO_FN(FCE1),	GPIO_FN(FRB), /* FLCTL */
--
--	/* IRDA */
--	GPIO_FN(IRDA_FIRSEL),	GPIO_FN(IRDA_IN),	GPIO_FN(IRDA_OUT),
--
--	/* ATAPI */
--	GPIO_FN(IDE_D0),	GPIO_FN(IDE_D1),	GPIO_FN(IDE_D2),
--	GPIO_FN(IDE_D3),	GPIO_FN(IDE_D4),	GPIO_FN(IDE_D5),
--	GPIO_FN(IDE_D6),	GPIO_FN(IDE_D7),	GPIO_FN(IDE_D8),
--	GPIO_FN(IDE_D9),	GPIO_FN(IDE_D10),	GPIO_FN(IDE_D11),
--	GPIO_FN(IDE_D12),	GPIO_FN(IDE_D13),	GPIO_FN(IDE_D14),
--	GPIO_FN(IDE_D15),	GPIO_FN(IDE_A0),	GPIO_FN(IDE_A1),
--	GPIO_FN(IDE_A2),	GPIO_FN(IDE_CS0),	GPIO_FN(IDE_CS1),
--	GPIO_FN(IDE_IOWR),	GPIO_FN(IDE_IORD),	GPIO_FN(IDE_IORDY),
--	GPIO_FN(IDE_INT),	GPIO_FN(IDE_RST),	GPIO_FN(IDE_DIRECTION),
--	GPIO_FN(IDE_EXBUF_ENB),	GPIO_FN(IDE_IODACK),	GPIO_FN(IDE_IODREQ),
--
--	/* DMA0 */
--	GPIO_FN(DREQ0),	GPIO_FN(DACK0),
--
--	/* DMA1 */
--	GPIO_FN(DREQ1),	GPIO_FN(DACK1),
--
--	/* SYSC */
--	GPIO_FN(RESETOUTS),
--
--	/* IRREM */
--	GPIO_FN(IROUT),
--
--	/* SDENC */
--	GPIO_FN(SDENC_CPG),
--	GPIO_FN(SDENC_DV_CLKI),
--
--	/* SYSC */
--	GPIO_FN(RESETP_PULLUP),
--	GPIO_FN(RESETP_PLAIN),
--
--	/* DEBUG */
--	GPIO_FN(EDEBGREQ_PULLDOWN),
--	GPIO_FN(EDEBGREQ_PULLUP),
--
--	GPIO_FN(TRACEAUD_FROM_VIO),
--	GPIO_FN(TRACEAUD_FROM_LCDC0),
--	GPIO_FN(TRACEAUD_FROM_MEMC),
--};
--
- static const struct pinmux_cfg_reg pinmux_config_regs[] = {
- 	PORTCR(0,	0xe6050000), /* PORT0CR */
- 	PORTCR(1,	0xe6050001), /* PORT1CR */
-@@ -3872,9 +3670,6 @@ const struct sh_pfc_soc_info r8a7740_pinmux_info = {
- 	.functions	= pinmux_functions,
- 	.nr_functions	= ARRAY_SIZE(pinmux_functions),
- 
--	.func_gpios	= pinmux_func_gpios,
--	.nr_func_gpios	= ARRAY_SIZE(pinmux_func_gpios),
--
- 	.cfg_regs	= pinmux_config_regs,
- 	.data_regs	= pinmux_data_regs,
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0175-ARM-shmobile-bockw-add-SMSC-support-on-DTS.patch b/patches.renesas/0175-ARM-shmobile-bockw-add-SMSC-support-on-DTS.patch
deleted file mode 100644
index d00152e2532d8..0000000000000
--- a/patches.renesas/0175-ARM-shmobile-bockw-add-SMSC-support-on-DTS.patch
+++ /dev/null
@@ -1,60 +0,0 @@
-From 932e0976caafcac6b224f7166f061d825cb5261d Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Wed, 2 Oct 2013 01:34:07 -0700
-Subject: ARM: shmobile: bockw: add SMSC support on DTS
-
-This patch enables INTC IRQ and SMSC on BockW board via DT.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 1e918e00ea2aa2d23a3e0552e907c1da104cdc39)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7778-bockw-reference.dts | 27 ++++++++++++++++++++++++++-
- 1 file changed, 26 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/boot/dts/r8a7778-bockw-reference.dts b/arch/arm/boot/dts/r8a7778-bockw-reference.dts
-index 9bb903a3230d..4425fd2e09f4 100644
---- a/arch/arm/boot/dts/r8a7778-bockw-reference.dts
-+++ b/arch/arm/boot/dts/r8a7778-bockw-reference.dts
-@@ -22,11 +22,36 @@
- 	compatible = "renesas,bockw-reference", "renesas,r8a7778";
- 
- 	chosen {
--		bootargs = "console=ttySC0,115200 ignore_loglevel rw";
-+		bootargs = "console=ttySC0,115200 ignore_loglevel root=/dev/nfs ip=dhcp rw";
- 	};
- 
- 	memory {
- 		device_type = "memory";
- 		reg = <0x60000000 0x10000000>;
- 	};
-+
-+	fixedregulator3v3: fixedregulator@0 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "fixed-3.3V";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+		regulator-boot-on;
-+		regulator-always-on;
-+	};
-+
-+	lan0@18300000 {
-+		compatible = "smsc,lan9220", "smsc,lan9115";
-+		reg = <0x18300000 0x1000>;
-+
-+		phy-mode = "mii";
-+		interrupt-parent = <&irqpin>;
-+		interrupts = <0 0>; /* IRQ0: hwirq 0 on irqpin */
-+		reg-io-width = <4>;
-+		vddvario-supply = <&fixedregulator3v3>;
-+		vdd33a-supply = <&fixedregulator3v3>;
-+	};
-+};
-+
-+&irqpin {
-+	status = "okay";
- };
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0175-ARM-shmobile-r8a7791-Add-clock-index-macros-for-DT-s.patch b/patches.renesas/0175-ARM-shmobile-r8a7791-Add-clock-index-macros-for-DT-s.patch
deleted file mode 100644
index 207d023cc9a6c..0000000000000
--- a/patches.renesas/0175-ARM-shmobile-r8a7791-Add-clock-index-macros-for-DT-s.patch
+++ /dev/null
@@ -1,132 +0,0 @@
-From 1c628edcbcaab6eea3427750e98060b5942f854c Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 11 Dec 2013 15:05:13 +0100
-Subject: ARM: shmobile: r8a7791: Add clock index macros for DT sources
-
-Add macros usable by device tree sources to reference r8a7791 clocks by
-index.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 4d8864c9e94ec727f1c675b9f6921525c360334b)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- include/dt-bindings/clock/r8a7791-clock.h | 105 ++++++++++++++++++++++++++++++
- 1 file changed, 105 insertions(+)
- create mode 100644 include/dt-bindings/clock/r8a7791-clock.h
-
-diff --git a/include/dt-bindings/clock/r8a7791-clock.h b/include/dt-bindings/clock/r8a7791-clock.h
-new file mode 100644
-index 000000000000..df1715b77f96
---- /dev/null
-+++ b/include/dt-bindings/clock/r8a7791-clock.h
-@@ -0,0 +1,105 @@
-+/*
-+ * Copyright 2013 Ideas On Board SPRL
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ */
-+
-+#ifndef __DT_BINDINGS_CLOCK_R8A7791_H__
-+#define __DT_BINDINGS_CLOCK_R8A7791_H__
-+
-+/* CPG */
-+#define R8A7791_CLK_MAIN		0
-+#define R8A7791_CLK_PLL0		1
-+#define R8A7791_CLK_PLL1		2
-+#define R8A7791_CLK_PLL3		3
-+#define R8A7791_CLK_LB			4
-+#define R8A7791_CLK_QSPI		5
-+#define R8A7791_CLK_SDH			6
-+#define R8A7791_CLK_SD0			7
-+#define R8A7791_CLK_Z			8
-+
-+/* MSTP1 */
-+#define R8A7791_CLK_TMU1		11
-+#define R8A7791_CLK_TMU3		21
-+#define R8A7791_CLK_TMU2		22
-+#define R8A7791_CLK_CMT0		24
-+#define R8A7791_CLK_TMU0		25
-+#define R8A7791_CLK_VSP1_DU1		27
-+#define R8A7791_CLK_VSP1_DU0		28
-+#define R8A7791_CLK_VSP1_SY		31
-+
-+/* MSTP2 */
-+#define R8A7791_CLK_SCIFA2		2
-+#define R8A7791_CLK_SCIFA1		3
-+#define R8A7791_CLK_SCIFA0		4
-+#define R8A7791_CLK_SCIFB0		6
-+#define R8A7791_CLK_SCIFB1		7
-+#define R8A7791_CLK_SCIFB2		16
-+#define R8A7791_CLK_DMAC		18
-+
-+/* MSTP3 */
-+#define R8A7791_CLK_TPU0		4
-+#define R8A7791_CLK_SDHI2		11
-+#define R8A7791_CLK_SDHI1		12
-+#define R8A7791_CLK_SDHI0		14
-+#define R8A7791_CLK_MMCIF0		15
-+#define R8A7791_CLK_SSUSB		28
-+#define R8A7791_CLK_CMT1		29
-+#define R8A7791_CLK_USBDMAC0		30
-+#define R8A7791_CLK_USBDMAC1		31
-+
-+/* MSTP5 */
-+#define R8A7791_CLK_THERMAL		22
-+#define R8A7791_CLK_PWM			23
-+
-+/* MSTP7 */
-+#define R8A7791_CLK_HSUSB		4
-+#define R8A7791_CLK_HSCIF2		13
-+#define R8A7791_CLK_SCIF5		14
-+#define R8A7791_CLK_SCIF4		15
-+#define R8A7791_CLK_HSCIF1		16
-+#define R8A7791_CLK_HSCIF0		17
-+#define R8A7791_CLK_SCIF3		18
-+#define R8A7791_CLK_SCIF2		19
-+#define R8A7791_CLK_SCIF1		20
-+#define R8A7791_CLK_SCIF0		21
-+#define R8A7791_CLK_DU1			23
-+#define R8A7791_CLK_DU0			24
-+#define R8A7791_CLK_LVDS0		26
-+
-+/* MSTP8 */
-+#define R8A7791_CLK_VIN2		9
-+#define R8A7791_CLK_VIN1		10
-+#define R8A7791_CLK_VIN0		11
-+#define R8A7791_CLK_ETHER		13
-+#define R8A7791_CLK_SATA1		14
-+#define R8A7791_CLK_SATA0		15
-+
-+/* MSTP9 */
-+#define R8A7791_CLK_GPIO7		4
-+#define R8A7791_CLK_GPIO6		5
-+#define R8A7791_CLK_GPIO5		7
-+#define R8A7791_CLK_GPIO4		8
-+#define R8A7791_CLK_GPIO3		9
-+#define R8A7791_CLK_GPIO2		10
-+#define R8A7791_CLK_GPIO1		11
-+#define R8A7791_CLK_GPIO0		12
-+#define R8A7791_CLK_RCAN1		15
-+#define R8A7791_CLK_RCAN0		16
-+#define R8A7791_CLK_I2C5		25
-+#define R8A7791_CLK_IICDVFS		26
-+#define R8A7791_CLK_I2C4		27
-+#define R8A7791_CLK_I2C3		28
-+#define R8A7791_CLK_I2C2		29
-+#define R8A7791_CLK_I2C1		30
-+#define R8A7791_CLK_I2C0		31
-+
-+/* MSTP11 */
-+#define R8A7791_CLK_SCIFA3		6
-+#define R8A7791_CLK_SCIFA4		7
-+#define R8A7791_CLK_SCIFA5		8
-+
-+#endif /* __DT_BINDINGS_CLOCK_R8A7791_H__ */
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0175-sh-pfc-r8a7740-Replace-GPIO_PORTx-enum-with-GPIO-por.patch b/patches.renesas/0175-sh-pfc-r8a7740-Replace-GPIO_PORTx-enum-with-GPIO-por.patch
deleted file mode 100644
index 62a9743f8ea6d..0000000000000
--- a/patches.renesas/0175-sh-pfc-r8a7740-Replace-GPIO_PORTx-enum-with-GPIO-por.patch
+++ /dev/null
@@ -1,109 +0,0 @@
-From 71b027d9ed545b5acad88a03381f13e32a7fc442 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 23 Apr 2013 00:36:40 +0200
-Subject: sh-pfc: r8a7740: Replace GPIO_PORTx enum with GPIO port numbers
-
-The PFC GPIO API implementation moved to using port numbers. Replace all
-GPIO_PORTx enum usage with the corresponding port number. The GPIO_PORTx
-enum values are identical to the port number on this platform.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 7d5684575c1729952effc6b285eb74d2009839c5)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7740.c | 71 ++++++++++++++++++++----------------
- 1 file changed, 39 insertions(+), 32 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-index 9f44fd65..6af8fae4 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-@@ -30,6 +30,13 @@
- 	PORT_10(fn, pfx##20, sfx),					\
- 	PORT_1(fn, pfx##210, sfx),	PORT_1(fn, pfx##211, sfx)
- 
-+#undef _GPIO_PORT
-+#define _GPIO_PORT(gpio, sfx)						\
-+	[gpio] = {							\
-+		.name = __stringify(PORT##gpio),			\
-+		.enum_id = PORT##gpio##_DATA,				\
-+	}
-+
- #define IRQC_PIN_MUX(irq, pin)						\
- static const unsigned int intc_irq##irq##_pins[] = {			\
- 	pin,								\
-@@ -3616,38 +3623,38 @@ static const struct pinmux_data_reg pinmux_data_regs[] = {
- };
- 
- static const struct pinmux_irq pinmux_irqs[] = {
--	PINMUX_IRQ(irq_pin(0), GPIO_PORT2,   GPIO_PORT13),	/* IRQ0A */
--	PINMUX_IRQ(irq_pin(1), GPIO_PORT20),		/* IRQ1A */
--	PINMUX_IRQ(irq_pin(2), GPIO_PORT11,  GPIO_PORT12),	/* IRQ2A */
--	PINMUX_IRQ(irq_pin(3), GPIO_PORT10,  GPIO_PORT14),	/* IRQ3A */
--	PINMUX_IRQ(irq_pin(4), GPIO_PORT15,  GPIO_PORT172),/* IRQ4A */
--	PINMUX_IRQ(irq_pin(5), GPIO_PORT0,   GPIO_PORT1),	/* IRQ5A */
--	PINMUX_IRQ(irq_pin(6), GPIO_PORT121, GPIO_PORT173),/* IRQ6A */
--	PINMUX_IRQ(irq_pin(7), GPIO_PORT120, GPIO_PORT209),/* IRQ7A */
--	PINMUX_IRQ(irq_pin(8), GPIO_PORT119),		/* IRQ8A */
--	PINMUX_IRQ(irq_pin(9), GPIO_PORT118, GPIO_PORT210),/* IRQ9A */
--	PINMUX_IRQ(irq_pin(10), GPIO_PORT19),		/* IRQ10A */
--	PINMUX_IRQ(irq_pin(11), GPIO_PORT104),		/* IRQ11A */
--	PINMUX_IRQ(irq_pin(12), GPIO_PORT42,  GPIO_PORT97),	/* IRQ12A */
--	PINMUX_IRQ(irq_pin(13), GPIO_PORT64,  GPIO_PORT98),	/* IRQ13A */
--	PINMUX_IRQ(irq_pin(14), GPIO_PORT63,  GPIO_PORT99),	/* IRQ14A */
--	PINMUX_IRQ(irq_pin(15), GPIO_PORT62,  GPIO_PORT100),/* IRQ15A */
--	PINMUX_IRQ(irq_pin(16), GPIO_PORT68,  GPIO_PORT211),/* IRQ16A */
--	PINMUX_IRQ(irq_pin(17), GPIO_PORT69),		/* IRQ17A */
--	PINMUX_IRQ(irq_pin(18), GPIO_PORT70),		/* IRQ18A */
--	PINMUX_IRQ(irq_pin(19), GPIO_PORT71),		/* IRQ19A */
--	PINMUX_IRQ(irq_pin(20), GPIO_PORT67),		/* IRQ20A */
--	PINMUX_IRQ(irq_pin(21), GPIO_PORT202),		/* IRQ21A */
--	PINMUX_IRQ(irq_pin(22), GPIO_PORT95),		/* IRQ22A */
--	PINMUX_IRQ(irq_pin(23), GPIO_PORT96),		/* IRQ23A */
--	PINMUX_IRQ(irq_pin(24), GPIO_PORT180),		/* IRQ24A */
--	PINMUX_IRQ(irq_pin(25), GPIO_PORT38),		/* IRQ25A */
--	PINMUX_IRQ(irq_pin(26), GPIO_PORT58,  GPIO_PORT81),	/* IRQ26A */
--	PINMUX_IRQ(irq_pin(27), GPIO_PORT57,  GPIO_PORT168),/* IRQ27A */
--	PINMUX_IRQ(irq_pin(28), GPIO_PORT56,  GPIO_PORT169),/* IRQ28A */
--	PINMUX_IRQ(irq_pin(29), GPIO_PORT50,  GPIO_PORT170),/* IRQ29A */
--	PINMUX_IRQ(irq_pin(30), GPIO_PORT49,  GPIO_PORT171),/* IRQ30A */
--	PINMUX_IRQ(irq_pin(31), GPIO_PORT41,  GPIO_PORT167),/* IRQ31A */
-+	PINMUX_IRQ(irq_pin(0), 2,   13),	/* IRQ0A */
-+	PINMUX_IRQ(irq_pin(1), 20),		/* IRQ1A */
-+	PINMUX_IRQ(irq_pin(2), 11,  12),	/* IRQ2A */
-+	PINMUX_IRQ(irq_pin(3), 10,  14),	/* IRQ3A */
-+	PINMUX_IRQ(irq_pin(4), 15,  172),	/* IRQ4A */
-+	PINMUX_IRQ(irq_pin(5), 0,   1),		/* IRQ5A */
-+	PINMUX_IRQ(irq_pin(6), 121, 173),	/* IRQ6A */
-+	PINMUX_IRQ(irq_pin(7), 120, 209),	/* IRQ7A */
-+	PINMUX_IRQ(irq_pin(8), 119),		/* IRQ8A */
-+	PINMUX_IRQ(irq_pin(9), 118, 210),	/* IRQ9A */
-+	PINMUX_IRQ(irq_pin(10), 19),		/* IRQ10A */
-+	PINMUX_IRQ(irq_pin(11), 104),		/* IRQ11A */
-+	PINMUX_IRQ(irq_pin(12), 42,  97),	/* IRQ12A */
-+	PINMUX_IRQ(irq_pin(13), 64,  98),	/* IRQ13A */
-+	PINMUX_IRQ(irq_pin(14), 63,  99),	/* IRQ14A */
-+	PINMUX_IRQ(irq_pin(15), 62,  100),	/* IRQ15A */
-+	PINMUX_IRQ(irq_pin(16), 68,  211),	/* IRQ16A */
-+	PINMUX_IRQ(irq_pin(17), 69),		/* IRQ17A */
-+	PINMUX_IRQ(irq_pin(18), 70),		/* IRQ18A */
-+	PINMUX_IRQ(irq_pin(19), 71),		/* IRQ19A */
-+	PINMUX_IRQ(irq_pin(20), 67),		/* IRQ20A */
-+	PINMUX_IRQ(irq_pin(21), 202),		/* IRQ21A */
-+	PINMUX_IRQ(irq_pin(22), 95),		/* IRQ22A */
-+	PINMUX_IRQ(irq_pin(23), 96),		/* IRQ23A */
-+	PINMUX_IRQ(irq_pin(24), 180),		/* IRQ24A */
-+	PINMUX_IRQ(irq_pin(25), 38),		/* IRQ25A */
-+	PINMUX_IRQ(irq_pin(26), 58,  81),	/* IRQ26A */
-+	PINMUX_IRQ(irq_pin(27), 57,  168),	/* IRQ27A */
-+	PINMUX_IRQ(irq_pin(28), 56,  169),	/* IRQ28A */
-+	PINMUX_IRQ(irq_pin(29), 50,  170),	/* IRQ29A */
-+	PINMUX_IRQ(irq_pin(30), 49,  171),	/* IRQ30A */
-+	PINMUX_IRQ(irq_pin(31), 41,  167),	/* IRQ31A */
- };
- 
- const struct sh_pfc_soc_info r8a7740_pinmux_info = {
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0176-ARM-shmobile-lager-add-gpio-regulator-support-on-def.patch b/patches.renesas/0176-ARM-shmobile-lager-add-gpio-regulator-support-on-def.patch
deleted file mode 100644
index 72b0ac9dd9e02..0000000000000
--- a/patches.renesas/0176-ARM-shmobile-lager-add-gpio-regulator-support-on-def.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From 6601129f29507f818a1288979c8e10796aac8ca3 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Wed, 20 Nov 2013 23:21:26 -0800
-Subject: ARM: shmobile: lager: add gpio regulator support on defconfig
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 081aaf4ab3ddaf66083b2fcd17b563a48112a232)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/configs/lager_defconfig | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/arch/arm/configs/lager_defconfig b/arch/arm/configs/lager_defconfig
-index 35dc8b2be47f..35b7cb769b25 100644
---- a/arch/arm/configs/lager_defconfig
-+++ b/arch/arm/configs/lager_defconfig
-@@ -89,6 +89,7 @@ CONFIG_THERMAL=y
- CONFIG_RCAR_THERMAL=y
- CONFIG_REGULATOR=y
- CONFIG_REGULATOR_FIXED_VOLTAGE=y
-+CONFIG_REGULATOR_GPIO=y
- CONFIG_DRM=y
- CONFIG_DRM_RCAR_DU=y
- # CONFIG_USB_SUPPORT is not set
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0176-ARM-shmobile-marzen-fixup-SMSC-IRQ-number-on-DTS.patch b/patches.renesas/0176-ARM-shmobile-marzen-fixup-SMSC-IRQ-number-on-DTS.patch
deleted file mode 100644
index 47d1f384b2ab1..0000000000000
--- a/patches.renesas/0176-ARM-shmobile-marzen-fixup-SMSC-IRQ-number-on-DTS.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From a60a928bbf1f5f4d9a176ef38d9e3958312e34bf Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Wed, 2 Oct 2013 01:40:20 -0700
-Subject: ARM: shmobile: marzen: fixup SMSC IRQ number on DTS
-
-This patch fixup miss-setting of SMSC IRQ number.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit bffdd7d1a4249dddf1ded81e412cf3c78d139e38)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7779-marzen-reference.dts | 8 ++++++--
- 1 file changed, 6 insertions(+), 2 deletions(-)
-
-diff --git a/arch/arm/boot/dts/r8a7779-marzen-reference.dts b/arch/arm/boot/dts/r8a7779-marzen-reference.dts
-index 6d5508392252..ab4110aa3c3b 100644
---- a/arch/arm/boot/dts/r8a7779-marzen-reference.dts
-+++ b/arch/arm/boot/dts/r8a7779-marzen-reference.dts
-@@ -42,8 +42,8 @@
- 		pinctrl-names = "default";
- 
- 		phy-mode = "mii";
--		interrupt-parent = <&gic>;
--		interrupts = <0 28 0x4>;
-+		interrupt-parent = <&irqpin0>;
-+		interrupts = <1 0>; /* IRQ1: hwirq 1 on irqpin0 */
- 		reg-io-width = <4>;
- 		vddvario-supply = <&fixedregulator3v3>;
- 		vdd33a-supply = <&fixedregulator3v3>;
-@@ -63,6 +63,10 @@
- 	};
- };
- 
-+&irqpin0 {
-+	status = "okay";
-+};
-+
- &pfc {
- 	pinctrl-0 = <&scif2_pins &scif4_pins &sdhi0_pins>;
- 	pinctrl-names = "default";
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0176-ARM-shmobile-r8a7740-Remove-all-GPIOs.patch b/patches.renesas/0176-ARM-shmobile-r8a7740-Remove-all-GPIOs.patch
deleted file mode 100644
index f3ac11c6a5d86..0000000000000
--- a/patches.renesas/0176-ARM-shmobile-r8a7740-Remove-all-GPIOs.patch
+++ /dev/null
@@ -1,318 +0,0 @@
-From e2afc729649a033ef61bb668eb6210a725600555 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 23 Apr 2013 00:30:05 +0200
-Subject: ARM: shmobile: r8a7740: Remove all GPIOs
-
-Function GPIOs are not used anymore, and all code use the GPIO numbers
-directly. Remove the GPIOs enumeration.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit f92e1360b425ff585619aadabfd7da40f2305ad4)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/include/mach/r8a7740.h | 288 --------------------------
- 1 file changed, 288 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/include/mach/r8a7740.h b/arch/arm/mach-shmobile/include/mach/r8a7740.h
-index ed30a1df..b34d19b5 100644
---- a/arch/arm/mach-shmobile/include/mach/r8a7740.h
-+++ b/arch/arm/mach-shmobile/include/mach/r8a7740.h
-@@ -28,294 +28,6 @@
- #define MD_CK1	(1 << 1)
- #define MD_CK0	(1 << 0)
- 
--/*
-- * Pin Function Controller:
-- *	GPIO_FN_xx - GPIO used to select pin function
-- *	GPIO_PORTxx - GPIO mapped to real I/O pin on CPU
-- */
--enum {
--	/* PORT */
--	GPIO_PORT0, GPIO_PORT1, GPIO_PORT2, GPIO_PORT3, GPIO_PORT4,
--	GPIO_PORT5, GPIO_PORT6, GPIO_PORT7, GPIO_PORT8, GPIO_PORT9,
--
--	GPIO_PORT10, GPIO_PORT11, GPIO_PORT12, GPIO_PORT13, GPIO_PORT14,
--	GPIO_PORT15, GPIO_PORT16, GPIO_PORT17, GPIO_PORT18, GPIO_PORT19,
--
--	GPIO_PORT20, GPIO_PORT21, GPIO_PORT22, GPIO_PORT23, GPIO_PORT24,
--	GPIO_PORT25, GPIO_PORT26, GPIO_PORT27, GPIO_PORT28, GPIO_PORT29,
--
--	GPIO_PORT30, GPIO_PORT31, GPIO_PORT32, GPIO_PORT33, GPIO_PORT34,
--	GPIO_PORT35, GPIO_PORT36, GPIO_PORT37, GPIO_PORT38, GPIO_PORT39,
--
--	GPIO_PORT40, GPIO_PORT41, GPIO_PORT42, GPIO_PORT43, GPIO_PORT44,
--	GPIO_PORT45, GPIO_PORT46, GPIO_PORT47, GPIO_PORT48, GPIO_PORT49,
--
--	GPIO_PORT50, GPIO_PORT51, GPIO_PORT52, GPIO_PORT53, GPIO_PORT54,
--	GPIO_PORT55, GPIO_PORT56, GPIO_PORT57, GPIO_PORT58, GPIO_PORT59,
--
--	GPIO_PORT60, GPIO_PORT61, GPIO_PORT62, GPIO_PORT63, GPIO_PORT64,
--	GPIO_PORT65, GPIO_PORT66, GPIO_PORT67, GPIO_PORT68, GPIO_PORT69,
--
--	GPIO_PORT70, GPIO_PORT71, GPIO_PORT72, GPIO_PORT73, GPIO_PORT74,
--	GPIO_PORT75, GPIO_PORT76, GPIO_PORT77, GPIO_PORT78, GPIO_PORT79,
--
--	GPIO_PORT80, GPIO_PORT81, GPIO_PORT82, GPIO_PORT83, GPIO_PORT84,
--	GPIO_PORT85, GPIO_PORT86, GPIO_PORT87, GPIO_PORT88, GPIO_PORT89,
--
--	GPIO_PORT90, GPIO_PORT91, GPIO_PORT92, GPIO_PORT93, GPIO_PORT94,
--	GPIO_PORT95, GPIO_PORT96, GPIO_PORT97, GPIO_PORT98, GPIO_PORT99,
--
--	GPIO_PORT100, GPIO_PORT101, GPIO_PORT102, GPIO_PORT103, GPIO_PORT104,
--	GPIO_PORT105, GPIO_PORT106, GPIO_PORT107, GPIO_PORT108, GPIO_PORT109,
--
--	GPIO_PORT110, GPIO_PORT111, GPIO_PORT112, GPIO_PORT113, GPIO_PORT114,
--	GPIO_PORT115, GPIO_PORT116, GPIO_PORT117, GPIO_PORT118, GPIO_PORT119,
--
--	GPIO_PORT120, GPIO_PORT121, GPIO_PORT122, GPIO_PORT123, GPIO_PORT124,
--	GPIO_PORT125, GPIO_PORT126, GPIO_PORT127, GPIO_PORT128, GPIO_PORT129,
--
--	GPIO_PORT130, GPIO_PORT131, GPIO_PORT132, GPIO_PORT133, GPIO_PORT134,
--	GPIO_PORT135, GPIO_PORT136, GPIO_PORT137, GPIO_PORT138, GPIO_PORT139,
--
--	GPIO_PORT140, GPIO_PORT141, GPIO_PORT142, GPIO_PORT143, GPIO_PORT144,
--	GPIO_PORT145, GPIO_PORT146, GPIO_PORT147, GPIO_PORT148, GPIO_PORT149,
--
--	GPIO_PORT150, GPIO_PORT151, GPIO_PORT152, GPIO_PORT153, GPIO_PORT154,
--	GPIO_PORT155, GPIO_PORT156, GPIO_PORT157, GPIO_PORT158, GPIO_PORT159,
--
--	GPIO_PORT160, GPIO_PORT161, GPIO_PORT162, GPIO_PORT163, GPIO_PORT164,
--	GPIO_PORT165, GPIO_PORT166, GPIO_PORT167, GPIO_PORT168, GPIO_PORT169,
--
--	GPIO_PORT170, GPIO_PORT171, GPIO_PORT172, GPIO_PORT173, GPIO_PORT174,
--	GPIO_PORT175, GPIO_PORT176, GPIO_PORT177, GPIO_PORT178, GPIO_PORT179,
--
--	GPIO_PORT180, GPIO_PORT181, GPIO_PORT182, GPIO_PORT183, GPIO_PORT184,
--	GPIO_PORT185, GPIO_PORT186, GPIO_PORT187, GPIO_PORT188, GPIO_PORT189,
--
--	GPIO_PORT190, GPIO_PORT191, GPIO_PORT192, GPIO_PORT193, GPIO_PORT194,
--	GPIO_PORT195, GPIO_PORT196, GPIO_PORT197, GPIO_PORT198, GPIO_PORT199,
--
--	GPIO_PORT200, GPIO_PORT201, GPIO_PORT202, GPIO_PORT203, GPIO_PORT204,
--	GPIO_PORT205, GPIO_PORT206, GPIO_PORT207, GPIO_PORT208, GPIO_PORT209,
--
--	GPIO_PORT210, GPIO_PORT211,
--
--	/* Function */
--
--	/* DBGT */
--	GPIO_FN_DBGMDT2,	GPIO_FN_DBGMDT1,	GPIO_FN_DBGMDT0,
--	GPIO_FN_DBGMD10,	GPIO_FN_DBGMD11,	GPIO_FN_DBGMD20,
--	GPIO_FN_DBGMD21,
--
--	/* FMSI */
--	GPIO_FN_FMSISLD_PORT1, /* FMSISLD Port 1/6 */
--	GPIO_FN_FMSISLD_PORT6,
--	GPIO_FN_FMSIILR,	GPIO_FN_FMSIIBT,
--	GPIO_FN_FMSIOLR,	GPIO_FN_FMSIOBT,
--	GPIO_FN_FMSICK,		GPIO_FN_FMSOILR,
--	GPIO_FN_FMSOIBT,	GPIO_FN_FMSOOLR,
--	GPIO_FN_FMSOOBT,	GPIO_FN_FMSOSLD,
--	GPIO_FN_FMSOCK,
--
--	/* LCD0 */
--	GPIO_FN_LCDC0_SELECT,
--
--	/* LCD1 */
--	GPIO_FN_LCDC1_SELECT,
--
--	/* RSPI */
--	GPIO_FN_RSPI_SSL0_A,	GPIO_FN_RSPI_SSL1_A,
--	GPIO_FN_RSPI_SSL2_A,	GPIO_FN_RSPI_SSL3_A,
--	GPIO_FN_RSPI_MOSI_A,	GPIO_FN_RSPI_MISO_A,
--	GPIO_FN_RSPI_CK_A,
--
--	/* TPU0 */
--	GPIO_FN_TPU0TO0,	GPIO_FN_TPU0TO1,
--	GPIO_FN_TPU0TO3,
--	GPIO_FN_TPU0TO2_PORT66, /* TPU0TO2 Port 66/202 */
--	GPIO_FN_TPU0TO2_PORT202,
--
--	/* SSP1 0 */
--	GPIO_FN_STP0_IPD0,	GPIO_FN_STP0_IPD1,	GPIO_FN_STP0_IPD2,
--	GPIO_FN_STP0_IPD3,	GPIO_FN_STP0_IPD4,	GPIO_FN_STP0_IPD5,
--	GPIO_FN_STP0_IPD6,	GPIO_FN_STP0_IPD7,	GPIO_FN_STP0_IPEN,
--	GPIO_FN_STP0_IPCLK,	GPIO_FN_STP0_IPSYNC,
--
--	/* SSP1 1 */
--	GPIO_FN_STP1_IPD1,	GPIO_FN_STP1_IPD2,	GPIO_FN_STP1_IPD3,
--	GPIO_FN_STP1_IPD4,	GPIO_FN_STP1_IPD5,	GPIO_FN_STP1_IPD6,
--	GPIO_FN_STP1_IPD7,	GPIO_FN_STP1_IPCLK,	GPIO_FN_STP1_IPSYNC,
--
--	GPIO_FN_STP1_IPD0_PORT186, /* MSEL5CR_23_0 */
--	GPIO_FN_STP1_IPEN_PORT187,
--
--	GPIO_FN_STP1_IPD0_PORT194, /* MSEL5CR_23_1 */
--	GPIO_FN_STP1_IPEN_PORT193,
--
--	/* SIM */
--	GPIO_FN_SIM_RST,	GPIO_FN_SIM_CLK,
--	GPIO_FN_SIM_D_PORT22, /* SIM_D  Port 22/199 */
--	GPIO_FN_SIM_D_PORT199,
--
--	/* MSIOF2 */
--	GPIO_FN_MSIOF2_TXD,	GPIO_FN_MSIOF2_RXD,	GPIO_FN_MSIOF2_TSCK,
--	GPIO_FN_MSIOF2_SS2,	GPIO_FN_MSIOF2_TSYNC,	GPIO_FN_MSIOF2_SS1,
--	GPIO_FN_MSIOF2_MCK1,	GPIO_FN_MSIOF2_MCK0,	GPIO_FN_MSIOF2_RSYNC,
--	GPIO_FN_MSIOF2_RSCK,
--
--	/* KEYSC */
--	GPIO_FN_KEYIN4,		GPIO_FN_KEYIN5,
--	GPIO_FN_KEYIN6,		GPIO_FN_KEYIN7,
--	GPIO_FN_KEYOUT0,	GPIO_FN_KEYOUT1,	GPIO_FN_KEYOUT2,
--	GPIO_FN_KEYOUT3,	GPIO_FN_KEYOUT4,	GPIO_FN_KEYOUT5,
--	GPIO_FN_KEYOUT6,	GPIO_FN_KEYOUT7,
--
--	GPIO_FN_KEYIN0_PORT43, /* MSEL4CR_18_0 */
--	GPIO_FN_KEYIN1_PORT44,
--	GPIO_FN_KEYIN2_PORT45,
--	GPIO_FN_KEYIN3_PORT46,
--
--	GPIO_FN_KEYIN0_PORT58, /* MSEL4CR_18_1 */
--	GPIO_FN_KEYIN1_PORT57,
--	GPIO_FN_KEYIN2_PORT56,
--	GPIO_FN_KEYIN3_PORT55,
--
--	/* VOU */
--	GPIO_FN_DV_D0,	GPIO_FN_DV_D1,	GPIO_FN_DV_D2,	GPIO_FN_DV_D3,
--	GPIO_FN_DV_D4,	GPIO_FN_DV_D5,	GPIO_FN_DV_D6,	GPIO_FN_DV_D7,
--	GPIO_FN_DV_D8,	GPIO_FN_DV_D9,	GPIO_FN_DV_D10,	GPIO_FN_DV_D11,
--	GPIO_FN_DV_D12,	GPIO_FN_DV_D13,	GPIO_FN_DV_D14,	GPIO_FN_DV_D15,
--	GPIO_FN_DV_CLK,
--	GPIO_FN_DV_VSYNC,
--	GPIO_FN_DV_HSYNC,
--
--	/* MEMC */
--	GPIO_FN_MEMC_AD0,	GPIO_FN_MEMC_AD1,	GPIO_FN_MEMC_AD2,
--	GPIO_FN_MEMC_AD3,	GPIO_FN_MEMC_AD4,	GPIO_FN_MEMC_AD5,
--	GPIO_FN_MEMC_AD6,	GPIO_FN_MEMC_AD7,	GPIO_FN_MEMC_AD8,
--	GPIO_FN_MEMC_AD9,	GPIO_FN_MEMC_AD10,	GPIO_FN_MEMC_AD11,
--	GPIO_FN_MEMC_AD12,	GPIO_FN_MEMC_AD13,	GPIO_FN_MEMC_AD14,
--	GPIO_FN_MEMC_AD15,	GPIO_FN_MEMC_CS0,	GPIO_FN_MEMC_INT,
--	GPIO_FN_MEMC_NWE,	GPIO_FN_MEMC_NOE,
--
--	GPIO_FN_MEMC_CS1, /* MSEL4CR_6_0 */
--	GPIO_FN_MEMC_ADV,
--	GPIO_FN_MEMC_WAIT,
--	GPIO_FN_MEMC_BUSCLK,
--
--	GPIO_FN_MEMC_A1, /* MSEL4CR_6_1 */
--	GPIO_FN_MEMC_DREQ0,
--	GPIO_FN_MEMC_DREQ1,
--	GPIO_FN_MEMC_A0,
--
--	/* MSIOF0 */
--	GPIO_FN_MSIOF0_SS1,	GPIO_FN_MSIOF0_SS2,
--	GPIO_FN_MSIOF0_RXD,	GPIO_FN_MSIOF0_TXD,
--	GPIO_FN_MSIOF0_MCK0,	GPIO_FN_MSIOF0_MCK1,
--	GPIO_FN_MSIOF0_RSYNC,	GPIO_FN_MSIOF0_RSCK,
--	GPIO_FN_MSIOF0_TSCK,	GPIO_FN_MSIOF0_TSYNC,
--
--	/* MSIOF1 */
--	GPIO_FN_MSIOF1_RSCK,	GPIO_FN_MSIOF1_RSYNC,
--	GPIO_FN_MSIOF1_MCK0,	GPIO_FN_MSIOF1_MCK1,
--
--	GPIO_FN_MSIOF1_SS2_PORT116,	GPIO_FN_MSIOF1_SS1_PORT117,
--	GPIO_FN_MSIOF1_RXD_PORT118,	GPIO_FN_MSIOF1_TXD_PORT119,
--	GPIO_FN_MSIOF1_TSYNC_PORT120,
--	GPIO_FN_MSIOF1_TSCK_PORT121,	/* MSEL4CR_10_0 */
--
--	GPIO_FN_MSIOF1_SS1_PORT67,	GPIO_FN_MSIOF1_TSCK_PORT72,
--	GPIO_FN_MSIOF1_TSYNC_PORT73,	GPIO_FN_MSIOF1_TXD_PORT74,
--	GPIO_FN_MSIOF1_RXD_PORT75,
--	GPIO_FN_MSIOF1_SS2_PORT202,	/* MSEL4CR_10_1 */
--
--	/* GPIO */
--	GPIO_FN_GPO0,	GPIO_FN_GPI0,
--	GPIO_FN_GPO1,	GPIO_FN_GPI1,
--
--	/* USB0 */
--	GPIO_FN_USB0_OCI,	GPIO_FN_USB0_PPON,	GPIO_FN_VBUS,
--
--	/* USB1 */
--	GPIO_FN_USB1_OCI,	GPIO_FN_USB1_PPON,
--
--	/* BBIF1 */
--	GPIO_FN_BBIF1_RXD,	GPIO_FN_BBIF1_TXD,	GPIO_FN_BBIF1_TSYNC,
--	GPIO_FN_BBIF1_TSCK,	GPIO_FN_BBIF1_RSCK,	GPIO_FN_BBIF1_RSYNC,
--	GPIO_FN_BBIF1_FLOW,	GPIO_FN_BBIF1_RX_FLOW_N,
--
--	/* BBIF2 */
--	GPIO_FN_BBIF2_TXD2_PORT5, /* MSEL5CR_0_0 */
--	GPIO_FN_BBIF2_RXD2_PORT60,
--	GPIO_FN_BBIF2_TSYNC2_PORT6,
--	GPIO_FN_BBIF2_TSCK2_PORT59,
--
--	GPIO_FN_BBIF2_RXD2_PORT90, /* MSEL5CR_0_1 */
--	GPIO_FN_BBIF2_TXD2_PORT183,
--	GPIO_FN_BBIF2_TSCK2_PORT89,
--	GPIO_FN_BBIF2_TSYNC2_PORT184,
--
--	/* FLCTL / PCMCIA */
--	GPIO_FN_IOIS16, /* ? */
--
--	GPIO_FN_A0,	GPIO_FN_A1,	GPIO_FN_A2,	GPIO_FN_A3,
--	GPIO_FN_A4_FOE,		/* share with FLCTL */
--	GPIO_FN_A5_FCDE,	/* share with FLCTL */
--	GPIO_FN_A6,	GPIO_FN_A7,	GPIO_FN_A8,	GPIO_FN_A9,
--	GPIO_FN_A10,	GPIO_FN_A11,	GPIO_FN_A12,	GPIO_FN_A13,
--	GPIO_FN_A14,	GPIO_FN_A15,	GPIO_FN_A16,	GPIO_FN_A17,
--	GPIO_FN_A18,	GPIO_FN_A19,	GPIO_FN_A20,	GPIO_FN_A21,
--	GPIO_FN_A22,	GPIO_FN_A23,	GPIO_FN_A24,	GPIO_FN_A25,
--	GPIO_FN_A26,
--
--	GPIO_FN_CKO,
--	GPIO_FN_WAIT_PORT177,	/* WAIT Port 90/177 */
--	GPIO_FN_WAIT_PORT90,
--
--	GPIO_FN_FCE0,	GPIO_FN_FCE1,	GPIO_FN_FRB, /* FLCTL */
--
--	/* IRDA */
--	GPIO_FN_IRDA_FIRSEL,	GPIO_FN_IRDA_IN,	GPIO_FN_IRDA_OUT,
--
--	/* ATAPI */
--	GPIO_FN_IDE_D0,		GPIO_FN_IDE_D1,		GPIO_FN_IDE_D2,
--	GPIO_FN_IDE_D3,		GPIO_FN_IDE_D4,		GPIO_FN_IDE_D5,
--	GPIO_FN_IDE_D6,		GPIO_FN_IDE_D7,		GPIO_FN_IDE_D8,
--	GPIO_FN_IDE_D9,		GPIO_FN_IDE_D10,	GPIO_FN_IDE_D11,
--	GPIO_FN_IDE_D12,	GPIO_FN_IDE_D13,	GPIO_FN_IDE_D14,
--	GPIO_FN_IDE_D15,	GPIO_FN_IDE_A0,		GPIO_FN_IDE_A1,
--	GPIO_FN_IDE_A2,		GPIO_FN_IDE_CS0,	GPIO_FN_IDE_CS1,
--	GPIO_FN_IDE_IOWR,	GPIO_FN_IDE_IORD,	GPIO_FN_IDE_IORDY,
--	GPIO_FN_IDE_INT,	GPIO_FN_IDE_RST,	GPIO_FN_IDE_DIRECTION,
--	GPIO_FN_IDE_EXBUF_ENB,	GPIO_FN_IDE_IODACK,	GPIO_FN_IDE_IODREQ,
--
--	/* DMA0 */
--	GPIO_FN_DREQ0,		GPIO_FN_DACK0,
--
--	/* DMA1 */
--	GPIO_FN_DREQ1,		GPIO_FN_DACK1,
--
--	/* SYSC */
--	GPIO_FN_RESETOUTS,
--	GPIO_FN_RESETP_PULLUP,
--	GPIO_FN_RESETP_PLAIN,
--
--	/* SDENC */
--	GPIO_FN_SDENC_CPG,
--	GPIO_FN_SDENC_DV_CLKI,
--
--	/* IRREM */
--	GPIO_FN_IROUT,
--
--	/* DEBUG */
--	GPIO_FN_EDEBGREQ_PULLDOWN,
--	GPIO_FN_EDEBGREQ_PULLUP,
--
--	GPIO_FN_TRACEAUD_FROM_VIO,
--	GPIO_FN_TRACEAUD_FROM_LCDC0,
--	GPIO_FN_TRACEAUD_FROM_MEMC,
--};
--
- /* DMA slave IDs */
- enum {
- 	SHDMA_SLAVE_INVALID,
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0177-ARM-shmobile-lager-fixup-I2C-device-on-defconfig.patch b/patches.renesas/0177-ARM-shmobile-lager-fixup-I2C-device-on-defconfig.patch
deleted file mode 100644
index 65735b3c2dd62..0000000000000
--- a/patches.renesas/0177-ARM-shmobile-lager-fixup-I2C-device-on-defconfig.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From 6c7c6b57cddc3a8182e0e84329657cb49edb313a Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Mon, 25 Nov 2013 17:53:16 -0800
-Subject: ARM: shmobile: lager: fixup I2C device on defconfig
-
-R-Car H2 needs I2C_CAR, not I2C_SH_MOBILE
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit d0523925902cf363fc7b217c9873517e98093e32)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/configs/lager_defconfig | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/arch/arm/configs/lager_defconfig b/arch/arm/configs/lager_defconfig
-index 35b7cb769b25..883443f8f4f3 100644
---- a/arch/arm/configs/lager_defconfig
-+++ b/arch/arm/configs/lager_defconfig
-@@ -80,7 +80,7 @@ CONFIG_SERIAL_SH_SCI_CONSOLE=y
- # CONFIG_HW_RANDOM is not set
- CONFIG_I2C=y
- CONFIG_I2C_GPIO=y
--CONFIG_I2C_SH_MOBILE=y
-+CONFIG_I2C_RCAR=y
- CONFIG_GPIO_SH_PFC=y
- CONFIG_GPIOLIB=y
- CONFIG_GPIO_RCAR=y
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0177-ARM-shmobile-r8a7779-add-irqpin-default-status-on-DT.patch b/patches.renesas/0177-ARM-shmobile-r8a7779-add-irqpin-default-status-on-DT.patch
deleted file mode 100644
index d1382cba56340..0000000000000
--- a/patches.renesas/0177-ARM-shmobile-r8a7779-add-irqpin-default-status-on-DT.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From a95eab5bd09f45c3b0680650b18901268ba19ddb Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Wed, 2 Oct 2013 01:39:13 -0700
-Subject: ARM: shmobile: r8a7779: add irqpin default status on DTSI
-
-r8a7779 INTC needs IRL pin mode settings to determine
-behavior of IRQ0 - IRQ3. But it depends on platform.
-This patch adds status = "disabled" on r8a7779.dtsi as default
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 84b47dfc1b1638c40257382d2216d1668cfca3d0)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7779.dtsi | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi
-index 912b3a04901e..19faeac3fd2e 100644
---- a/arch/arm/boot/dts/r8a7779.dtsi
-+++ b/arch/arm/boot/dts/r8a7779.dtsi
-@@ -135,6 +135,7 @@
- 	irqpin0: irqpin@fe780010 {
- 		compatible = "renesas,intc-irqpin";
- 		#interrupt-cells = <2>;
-+		status = "disabled";
- 		interrupt-controller;
- 		reg = <0xfe78001c 4>,
- 			<0xfe780010 4>,
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0177-sh-pfc-r8a7740-Add-bias-pull-up-down-pinconf-support.patch b/patches.renesas/0177-sh-pfc-r8a7740-Add-bias-pull-up-down-pinconf-support.patch
deleted file mode 100644
index 1b6327225f54f..0000000000000
--- a/patches.renesas/0177-sh-pfc-r8a7740-Add-bias-pull-up-down-pinconf-support.patch
+++ /dev/null
@@ -1,437 +0,0 @@
-From 3484bc204064e0e85e16f643dabcb39624484cef Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 23 Apr 2013 14:24:19 +0200
-Subject: sh-pfc: r8a7740: Add bias (pull-up/down) pinconf support
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 80da8e02d22caaef78a91f3834ed92455f19088b)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7740.c | 365 +++++++++++++++++++++--------------
- 1 file changed, 220 insertions(+), 145 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-index 6af8fae4..e5ef587a 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-@@ -18,10 +18,14 @@
-  * along with this program; if not, write to the Free Software
-  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
-  */
-+#include <linux/io.h>
- #include <linux/kernel.h>
-+#include <linux/pinctrl/pinconf-generic.h>
-+
- #include <mach/r8a7740.h>
- #include <mach/irqs.h>
- 
-+#include "core.h"
- #include "sh_pfc.h"
- 
- #define CPU_ALL_PORT(fn, pfx, sfx)					\
-@@ -66,16 +70,6 @@ enum {
- 	PORT_ALL(IN),
- 	PINMUX_INPUT_END,
- 
--	/* PORT0_IN_PU -> PORT211_IN_PU */
--	PINMUX_INPUT_PULLUP_BEGIN,
--	PORT_ALL(IN_PU),
--	PINMUX_INPUT_PULLUP_END,
--
--	/* PORT0_IN_PD -> PORT211_IN_PD */
--	PINMUX_INPUT_PULLDOWN_BEGIN,
--	PORT_ALL(IN_PD),
--	PINMUX_INPUT_PULLDOWN_END,
--
- 	/* PORT0_OUT -> PORT211_OUT */
- 	PINMUX_OUTPUT_BEGIN,
- 	PORT_ALL(OUT),
-@@ -596,137 +590,11 @@ enum {
- 	PINMUX_MARK_END,
- };
- 
-+#define _PORT_DATA(pfx, sfx)	PORT_DATA_IO(pfx)
-+#define PINMUX_DATA_GP_ALL()	CPU_ALL_PORT(_PORT_DATA, , unused)
-+
- static const pinmux_enum_t pinmux_data[] = {
--	/* specify valid pin states for each pin in GPIO mode */
--
--	/* I/O and Pull U/D */
--	PORT_DATA_IO_PD(0),		PORT_DATA_IO_PD(1),
--	PORT_DATA_IO_PD(2),		PORT_DATA_IO_PD(3),
--	PORT_DATA_IO_PD(4),		PORT_DATA_IO_PD(5),
--	PORT_DATA_IO_PD(6),		PORT_DATA_IO(7),
--	PORT_DATA_IO(8),		PORT_DATA_IO(9),
--
--	PORT_DATA_IO_PD(10),		PORT_DATA_IO_PD(11),
--	PORT_DATA_IO_PD(12),		PORT_DATA_IO_PU_PD(13),
--	PORT_DATA_IO_PD(14),		PORT_DATA_IO_PD(15),
--	PORT_DATA_IO_PD(16),		PORT_DATA_IO_PD(17),
--	PORT_DATA_IO(18),		PORT_DATA_IO_PU(19),
--
--	PORT_DATA_IO_PU_PD(20),		PORT_DATA_IO_PD(21),
--	PORT_DATA_IO_PU_PD(22),		PORT_DATA_IO(23),
--	PORT_DATA_IO_PU(24),		PORT_DATA_IO_PU(25),
--	PORT_DATA_IO_PU(26),		PORT_DATA_IO_PU(27),
--	PORT_DATA_IO_PU(28),		PORT_DATA_IO_PU(29),
--
--	PORT_DATA_IO_PU(30),		PORT_DATA_IO_PD(31),
--	PORT_DATA_IO_PD(32),		PORT_DATA_IO_PD(33),
--	PORT_DATA_IO_PD(34),		PORT_DATA_IO_PU(35),
--	PORT_DATA_IO_PU(36),		PORT_DATA_IO_PD(37),
--	PORT_DATA_IO_PU(38),		PORT_DATA_IO_PD(39),
--
--	PORT_DATA_IO_PU_PD(40),		PORT_DATA_IO_PD(41),
--	PORT_DATA_IO_PD(42),		PORT_DATA_IO_PU_PD(43),
--	PORT_DATA_IO_PU_PD(44),		PORT_DATA_IO_PU_PD(45),
--	PORT_DATA_IO_PU_PD(46),		PORT_DATA_IO_PU_PD(47),
--	PORT_DATA_IO_PU_PD(48),		PORT_DATA_IO_PU_PD(49),
--
--	PORT_DATA_IO_PU_PD(50),		PORT_DATA_IO_PD(51),
--	PORT_DATA_IO_PD(52),		PORT_DATA_IO_PD(53),
--	PORT_DATA_IO_PD(54),		PORT_DATA_IO_PU_PD(55),
--	PORT_DATA_IO_PU_PD(56),		PORT_DATA_IO_PU_PD(57),
--	PORT_DATA_IO_PU_PD(58),		PORT_DATA_IO_PU_PD(59),
--
--	PORT_DATA_IO_PU_PD(60),		PORT_DATA_IO_PD(61),
--	PORT_DATA_IO_PD(62),		PORT_DATA_IO_PD(63),
--	PORT_DATA_IO_PD(64),		PORT_DATA_IO_PD(65),
--	PORT_DATA_IO_PU_PD(66),		PORT_DATA_IO_PU_PD(67),
--	PORT_DATA_IO_PU_PD(68),		PORT_DATA_IO_PU_PD(69),
--
--	PORT_DATA_IO_PU_PD(70),		PORT_DATA_IO_PU_PD(71),
--	PORT_DATA_IO_PU_PD(72),		PORT_DATA_IO_PU_PD(73),
--	PORT_DATA_IO_PU_PD(74),		PORT_DATA_IO_PU_PD(75),
--	PORT_DATA_IO_PU_PD(76),		PORT_DATA_IO_PU_PD(77),
--	PORT_DATA_IO_PU_PD(78),		PORT_DATA_IO_PU_PD(79),
--
--	PORT_DATA_IO_PU_PD(80),		PORT_DATA_IO_PU_PD(81),
--	PORT_DATA_IO(82),		PORT_DATA_IO_PU_PD(83),
--	PORT_DATA_IO(84),		PORT_DATA_IO_PD(85),
--	PORT_DATA_IO_PD(86),		PORT_DATA_IO_PD(87),
--	PORT_DATA_IO_PD(88),		PORT_DATA_IO_PD(89),
--
--	PORT_DATA_IO_PD(90),		PORT_DATA_IO_PU_PD(91),
--	PORT_DATA_IO_PU_PD(92),		PORT_DATA_IO_PU_PD(93),
--	PORT_DATA_IO_PU_PD(94),		PORT_DATA_IO_PU_PD(95),
--	PORT_DATA_IO_PU_PD(96),		PORT_DATA_IO_PU_PD(97),
--	PORT_DATA_IO_PU_PD(98),		PORT_DATA_IO_PU_PD(99),
--
--	PORT_DATA_IO_PU_PD(100),	PORT_DATA_IO(101),
--	PORT_DATA_IO_PU(102),		PORT_DATA_IO_PU_PD(103),
--	PORT_DATA_IO_PU(104),		PORT_DATA_IO_PU(105),
--	PORT_DATA_IO_PU_PD(106),	PORT_DATA_IO(107),
--	PORT_DATA_IO(108),		PORT_DATA_IO(109),
--
--	PORT_DATA_IO(110),		PORT_DATA_IO(111),
--	PORT_DATA_IO(112),		PORT_DATA_IO(113),
--	PORT_DATA_IO_PU_PD(114),	PORT_DATA_IO(115),
--	PORT_DATA_IO_PD(116),		PORT_DATA_IO_PD(117),
--	PORT_DATA_IO_PD(118),		PORT_DATA_IO_PD(119),
--
--	PORT_DATA_IO_PD(120),		PORT_DATA_IO_PD(121),
--	PORT_DATA_IO_PD(122),		PORT_DATA_IO_PD(123),
--	PORT_DATA_IO_PD(124),		PORT_DATA_IO(125),
--	PORT_DATA_IO(126),		PORT_DATA_IO(127),
--	PORT_DATA_IO(128),		PORT_DATA_IO(129),
--
--	PORT_DATA_IO(130),		PORT_DATA_IO(131),
--	PORT_DATA_IO(132),		PORT_DATA_IO(133),
--	PORT_DATA_IO(134),		PORT_DATA_IO(135),
--	PORT_DATA_IO(136),		PORT_DATA_IO(137),
--	PORT_DATA_IO(138),		PORT_DATA_IO(139),
--
--	PORT_DATA_IO(140),		PORT_DATA_IO(141),
--	PORT_DATA_IO_PU(142),		PORT_DATA_IO_PU(143),
--	PORT_DATA_IO_PU(144),		PORT_DATA_IO_PU(145),
--	PORT_DATA_IO_PU(146),		PORT_DATA_IO_PU(147),
--	PORT_DATA_IO_PU(148),		PORT_DATA_IO_PU(149),
--
--	PORT_DATA_IO_PU(150),		PORT_DATA_IO_PU(151),
--	PORT_DATA_IO_PU(152),		PORT_DATA_IO_PU(153),
--	PORT_DATA_IO_PU(154),		PORT_DATA_IO_PU(155),
--	PORT_DATA_IO_PU(156),		PORT_DATA_IO_PU(157),
--	PORT_DATA_IO_PD(158),		PORT_DATA_IO_PD(159),
--
--	PORT_DATA_IO_PU_PD(160),	PORT_DATA_IO_PD(161),
--	PORT_DATA_IO_PD(162),		PORT_DATA_IO_PD(163),
--	PORT_DATA_IO_PD(164),		PORT_DATA_IO_PD(165),
--	PORT_DATA_IO_PU(166),		PORT_DATA_IO_PU(167),
--	PORT_DATA_IO_PU(168),		PORT_DATA_IO_PU(169),
--
--	PORT_DATA_IO_PU(170),		PORT_DATA_IO_PU(171),
--	PORT_DATA_IO_PD(172),		PORT_DATA_IO_PD(173),
--	PORT_DATA_IO_PD(174),		PORT_DATA_IO_PD(175),
--	PORT_DATA_IO_PU(176),		PORT_DATA_IO_PU_PD(177),
--	PORT_DATA_IO_PU(178),		PORT_DATA_IO_PD(179),
--
--	PORT_DATA_IO_PD(180),		PORT_DATA_IO_PU(181),
--	PORT_DATA_IO_PU(182),		PORT_DATA_IO(183),
--	PORT_DATA_IO_PD(184),		PORT_DATA_IO_PD(185),
--	PORT_DATA_IO_PD(186),		PORT_DATA_IO_PD(187),
--	PORT_DATA_IO_PD(188),		PORT_DATA_IO_PD(189),
--
--	PORT_DATA_IO_PD(190),		PORT_DATA_IO_PD(191),
--	PORT_DATA_IO_PD(192),		PORT_DATA_IO_PU_PD(193),
--	PORT_DATA_IO_PU_PD(194),	PORT_DATA_IO_PD(195),
--	PORT_DATA_IO_PU_PD(196),	PORT_DATA_IO_PD(197),
--	PORT_DATA_IO_PU_PD(198),	PORT_DATA_IO_PU_PD(199),
--
--	PORT_DATA_IO_PU_PD(200),	PORT_DATA_IO_PU(201),
--	PORT_DATA_IO_PU_PD(202),	PORT_DATA_IO(203),
--	PORT_DATA_IO_PU_PD(204),	PORT_DATA_IO_PU_PD(205),
--	PORT_DATA_IO_PU_PD(206),	PORT_DATA_IO_PU_PD(207),
--	PORT_DATA_IO_PU_PD(208),	PORT_DATA_IO_PD(209),
--
--	PORT_DATA_IO_PD(210),		PORT_DATA_IO_PD(211),
-+	PINMUX_DATA_GP_ALL(),
- 
- 	/* Port0 */
- 	PINMUX_DATA(DBGMDT2_MARK,		PORT0_FN1),
-@@ -1669,8 +1537,138 @@ static const pinmux_enum_t pinmux_data[] = {
- 	PINMUX_DATA(TRACEAUD_FROM_MEMC_MARK,			MSEL5CR_30_1,	MSEL5CR_29_0),
- };
- 
-+#define R8A7740_PIN(pin, cfgs)						\
-+	{								\
-+		.name = __stringify(PORT##pin),				\
-+		.enum_id = PORT##pin##_DATA,				\
-+		.configs = cfgs,					\
-+	}
-+
-+#define __I		(SH_PFC_PIN_CFG_INPUT)
-+#define __O		(SH_PFC_PIN_CFG_OUTPUT)
-+#define __IO		(SH_PFC_PIN_CFG_INPUT | SH_PFC_PIN_CFG_OUTPUT)
-+#define __PD		(SH_PFC_PIN_CFG_PULL_DOWN)
-+#define __PU		(SH_PFC_PIN_CFG_PULL_UP)
-+#define __PUD		(SH_PFC_PIN_CFG_PULL_DOWN | SH_PFC_PIN_CFG_PULL_UP)
-+
-+#define R8A7740_PIN_I_PD(pin)		R8A7740_PIN(pin, __I | __PD)
-+#define R8A7740_PIN_I_PU(pin)		R8A7740_PIN(pin, __I | __PU)
-+#define R8A7740_PIN_I_PU_PD(pin)		R8A7740_PIN(pin, __I | __PUD)
-+#define R8A7740_PIN_IO(pin)		R8A7740_PIN(pin, __IO)
-+#define R8A7740_PIN_IO_PD(pin)		R8A7740_PIN(pin, __IO | __PD)
-+#define R8A7740_PIN_IO_PU(pin)		R8A7740_PIN(pin, __IO | __PU)
-+#define R8A7740_PIN_IO_PU_PD(pin)	R8A7740_PIN(pin, __IO | __PUD)
-+#define R8A7740_PIN_O(pin)		R8A7740_PIN(pin, __O)
-+#define R8A7740_PIN_O_PU_PD(pin)		R8A7740_PIN(pin, __O | __PUD)
-+
- static struct sh_pfc_pin pinmux_pins[] = {
--	GPIO_PORT_ALL(),
-+	/* Table 56-1 (I/O and Pull U/D) */
-+	R8A7740_PIN_IO_PD(0),		R8A7740_PIN_IO_PD(1),
-+	R8A7740_PIN_IO_PD(2),		R8A7740_PIN_IO_PD(3),
-+	R8A7740_PIN_IO_PD(4),		R8A7740_PIN_IO_PD(5),
-+	R8A7740_PIN_IO_PD(6),		R8A7740_PIN_IO(7),
-+	R8A7740_PIN_IO(8),		R8A7740_PIN_IO(9),
-+	R8A7740_PIN_IO_PD(10),		R8A7740_PIN_IO_PD(11),
-+	R8A7740_PIN_IO_PD(12),		R8A7740_PIN_IO_PU_PD(13),
-+	R8A7740_PIN_IO_PD(14),		R8A7740_PIN_IO_PD(15),
-+	R8A7740_PIN_IO_PD(16),		R8A7740_PIN_IO_PD(17),
-+	R8A7740_PIN_IO(18),		R8A7740_PIN_IO_PU(19),
-+	R8A7740_PIN_IO_PU_PD(20),	R8A7740_PIN_IO_PD(21),
-+	R8A7740_PIN_IO_PU_PD(22),	R8A7740_PIN_IO(23),
-+	R8A7740_PIN_IO_PU(24),		R8A7740_PIN_IO_PU(25),
-+	R8A7740_PIN_IO_PU(26),		R8A7740_PIN_IO_PU(27),
-+	R8A7740_PIN_IO_PU(28),		R8A7740_PIN_IO_PU(29),
-+	R8A7740_PIN_IO_PU(30),		R8A7740_PIN_IO_PD(31),
-+	R8A7740_PIN_IO_PD(32),		R8A7740_PIN_IO_PD(33),
-+	R8A7740_PIN_IO_PD(34),		R8A7740_PIN_IO_PU(35),
-+	R8A7740_PIN_IO_PU(36),		R8A7740_PIN_IO_PD(37),
-+	R8A7740_PIN_IO_PU(38),		R8A7740_PIN_IO_PD(39),
-+	R8A7740_PIN_IO_PU_PD(40),	R8A7740_PIN_IO_PD(41),
-+	R8A7740_PIN_IO_PD(42),		R8A7740_PIN_IO_PU_PD(43),
-+	R8A7740_PIN_IO_PU_PD(44),	R8A7740_PIN_IO_PU_PD(45),
-+	R8A7740_PIN_IO_PU_PD(46),	R8A7740_PIN_IO_PU_PD(47),
-+	R8A7740_PIN_IO_PU_PD(48),	R8A7740_PIN_IO_PU_PD(49),
-+	R8A7740_PIN_IO_PU_PD(50),	R8A7740_PIN_IO_PD(51),
-+	R8A7740_PIN_IO_PD(52),		R8A7740_PIN_IO_PD(53),
-+	R8A7740_PIN_IO_PD(54),		R8A7740_PIN_IO_PU_PD(55),
-+	R8A7740_PIN_IO_PU_PD(56),	R8A7740_PIN_IO_PU_PD(57),
-+	R8A7740_PIN_IO_PU_PD(58),	R8A7740_PIN_IO_PU_PD(59),
-+	R8A7740_PIN_IO_PU_PD(60),	R8A7740_PIN_IO_PD(61),
-+	R8A7740_PIN_IO_PD(62),		R8A7740_PIN_IO_PD(63),
-+	R8A7740_PIN_IO_PD(64),		R8A7740_PIN_IO_PD(65),
-+	R8A7740_PIN_IO_PU_PD(66),	R8A7740_PIN_IO_PU_PD(67),
-+	R8A7740_PIN_IO_PU_PD(68),	R8A7740_PIN_IO_PU_PD(69),
-+	R8A7740_PIN_IO_PU_PD(70),	R8A7740_PIN_IO_PU_PD(71),
-+	R8A7740_PIN_IO_PU_PD(72),	R8A7740_PIN_IO_PU_PD(73),
-+	R8A7740_PIN_IO_PU_PD(74),	R8A7740_PIN_IO_PU_PD(75),
-+	R8A7740_PIN_IO_PU_PD(76),	R8A7740_PIN_IO_PU_PD(77),
-+	R8A7740_PIN_IO_PU_PD(78),	R8A7740_PIN_IO_PU_PD(79),
-+	R8A7740_PIN_IO_PU_PD(80),	R8A7740_PIN_IO_PU_PD(81),
-+	R8A7740_PIN_IO(82),		R8A7740_PIN_IO_PU_PD(83),
-+	R8A7740_PIN_IO(84),		R8A7740_PIN_IO_PD(85),
-+	R8A7740_PIN_IO_PD(86),		R8A7740_PIN_IO_PD(87),
-+	R8A7740_PIN_IO_PD(88),		R8A7740_PIN_IO_PD(89),
-+	R8A7740_PIN_IO_PD(90),		R8A7740_PIN_IO_PU_PD(91),
-+	R8A7740_PIN_IO_PU_PD(92),	R8A7740_PIN_IO_PU_PD(93),
-+	R8A7740_PIN_IO_PU_PD(94),	R8A7740_PIN_IO_PU_PD(95),
-+	R8A7740_PIN_IO_PU_PD(96),	R8A7740_PIN_IO_PU_PD(97),
-+	R8A7740_PIN_IO_PU_PD(98),	R8A7740_PIN_IO_PU_PD(99),
-+	R8A7740_PIN_IO_PU_PD(100),	R8A7740_PIN_IO(101),
-+	R8A7740_PIN_IO_PU(102),		R8A7740_PIN_IO_PU_PD(103),
-+	R8A7740_PIN_IO_PU(104),		R8A7740_PIN_IO_PU(105),
-+	R8A7740_PIN_IO_PU_PD(106),	R8A7740_PIN_IO(107),
-+	R8A7740_PIN_IO(108),		R8A7740_PIN_IO(109),
-+	R8A7740_PIN_IO(110),		R8A7740_PIN_IO(111),
-+	R8A7740_PIN_IO(112),		R8A7740_PIN_IO(113),
-+	R8A7740_PIN_IO_PU_PD(114),	R8A7740_PIN_IO(115),
-+	R8A7740_PIN_IO_PD(116),		R8A7740_PIN_IO_PD(117),
-+	R8A7740_PIN_IO_PD(118),		R8A7740_PIN_IO_PD(119),
-+	R8A7740_PIN_IO_PD(120),		R8A7740_PIN_IO_PD(121),
-+	R8A7740_PIN_IO_PD(122),		R8A7740_PIN_IO_PD(123),
-+	R8A7740_PIN_IO_PD(124),		R8A7740_PIN_IO(125),
-+	R8A7740_PIN_IO(126),		R8A7740_PIN_IO(127),
-+	R8A7740_PIN_IO(128),		R8A7740_PIN_IO(129),
-+	R8A7740_PIN_IO(130),		R8A7740_PIN_IO(131),
-+	R8A7740_PIN_IO(132),		R8A7740_PIN_IO(133),
-+	R8A7740_PIN_IO(134),		R8A7740_PIN_IO(135),
-+	R8A7740_PIN_IO(136),		R8A7740_PIN_IO(137),
-+	R8A7740_PIN_IO(138),		R8A7740_PIN_IO(139),
-+	R8A7740_PIN_IO(140),		R8A7740_PIN_IO(141),
-+	R8A7740_PIN_IO_PU(142),		R8A7740_PIN_IO_PU(143),
-+	R8A7740_PIN_IO_PU(144),		R8A7740_PIN_IO_PU(145),
-+	R8A7740_PIN_IO_PU(146),		R8A7740_PIN_IO_PU(147),
-+	R8A7740_PIN_IO_PU(148),		R8A7740_PIN_IO_PU(149),
-+	R8A7740_PIN_IO_PU(150),		R8A7740_PIN_IO_PU(151),
-+	R8A7740_PIN_IO_PU(152),		R8A7740_PIN_IO_PU(153),
-+	R8A7740_PIN_IO_PU(154),		R8A7740_PIN_IO_PU(155),
-+	R8A7740_PIN_IO_PU(156),		R8A7740_PIN_IO_PU(157),
-+	R8A7740_PIN_IO_PD(158),		R8A7740_PIN_IO_PD(159),
-+	R8A7740_PIN_IO_PU_PD(160),	R8A7740_PIN_IO_PD(161),
-+	R8A7740_PIN_IO_PD(162),		R8A7740_PIN_IO_PD(163),
-+	R8A7740_PIN_IO_PD(164),		R8A7740_PIN_IO_PD(165),
-+	R8A7740_PIN_IO_PU(166),		R8A7740_PIN_IO_PU(167),
-+	R8A7740_PIN_IO_PU(168),		R8A7740_PIN_IO_PU(169),
-+	R8A7740_PIN_IO_PU(170),		R8A7740_PIN_IO_PU(171),
-+	R8A7740_PIN_IO_PD(172),		R8A7740_PIN_IO_PD(173),
-+	R8A7740_PIN_IO_PD(174),		R8A7740_PIN_IO_PD(175),
-+	R8A7740_PIN_IO_PU(176),		R8A7740_PIN_IO_PU_PD(177),
-+	R8A7740_PIN_IO_PU(178),		R8A7740_PIN_IO_PD(179),
-+	R8A7740_PIN_IO_PD(180),		R8A7740_PIN_IO_PU(181),
-+	R8A7740_PIN_IO_PU(182),		R8A7740_PIN_IO(183),
-+	R8A7740_PIN_IO_PD(184),		R8A7740_PIN_IO_PD(185),
-+	R8A7740_PIN_IO_PD(186),		R8A7740_PIN_IO_PD(187),
-+	R8A7740_PIN_IO_PD(188),		R8A7740_PIN_IO_PD(189),
-+	R8A7740_PIN_IO_PD(190),		R8A7740_PIN_IO_PD(191),
-+	R8A7740_PIN_IO_PD(192),		R8A7740_PIN_IO_PU_PD(193),
-+	R8A7740_PIN_IO_PU_PD(194),	R8A7740_PIN_IO_PD(195),
-+	R8A7740_PIN_IO_PU_PD(196),	R8A7740_PIN_IO_PD(197),
-+	R8A7740_PIN_IO_PU_PD(198),	R8A7740_PIN_IO_PU_PD(199),
-+	R8A7740_PIN_IO_PU_PD(200),	R8A7740_PIN_IO_PU(201),
-+	R8A7740_PIN_IO_PU_PD(202),	R8A7740_PIN_IO(203),
-+	R8A7740_PIN_IO_PU_PD(204),	R8A7740_PIN_IO_PU_PD(205),
-+	R8A7740_PIN_IO_PU_PD(206),	R8A7740_PIN_IO_PU_PD(207),
-+	R8A7740_PIN_IO_PU_PD(208),	R8A7740_PIN_IO_PD(209),
-+	R8A7740_PIN_IO_PD(210),		R8A7740_PIN_IO_PD(211),
- };
- 
- /* - BSC -------------------------------------------------------------------- */
-@@ -3204,6 +3202,17 @@ static const struct sh_pfc_function pinmux_functions[] = {
- 	SH_PFC_FUNCTION(sdhi2),
- };
- 
-+#undef PORTCR
-+#define PORTCR(nr, reg)							\
-+	{								\
-+		PINMUX_CFG_REG("PORT" nr "CR", reg, 8, 4) {		\
-+			_PCRH(PORT##nr##_IN, 0, 0, PORT##nr##_OUT),	\
-+				PORT##nr##_FN0, PORT##nr##_FN1,		\
-+				PORT##nr##_FN2, PORT##nr##_FN3,		\
-+				PORT##nr##_FN4, PORT##nr##_FN5,		\
-+				PORT##nr##_FN6, PORT##nr##_FN7 }	\
-+	}
-+
- static const struct pinmux_cfg_reg pinmux_config_regs[] = {
- 	PORTCR(0,	0xe6050000), /* PORT0CR */
- 	PORTCR(1,	0xe6050001), /* PORT1CR */
-@@ -3657,14 +3666,80 @@ static const struct pinmux_irq pinmux_irqs[] = {
- 	PINMUX_IRQ(irq_pin(31), 41,  167),	/* IRQ31A */
- };
- 
-+#define PORTnCR_PULMD_OFF	(0 << 6)
-+#define PORTnCR_PULMD_DOWN	(2 << 6)
-+#define PORTnCR_PULMD_UP	(3 << 6)
-+#define PORTnCR_PULMD_MASK	(3 << 6)
-+
-+struct r8a7740_portcr_group {
-+	unsigned int end_pin;
-+	unsigned int offset;
-+};
-+
-+static const struct r8a7740_portcr_group r8a7740_portcr_offsets[] = {
-+	{ 83, 0x0000 }, { 114, 0x1000 }, { 209, 0x2000 }, { 211, 0x3000 },
-+};
-+
-+static void __iomem *r8a7740_pinmux_portcr(struct sh_pfc *pfc, unsigned int pin)
-+{
-+	unsigned int i;
-+
-+	for (i = 0; i < ARRAY_SIZE(r8a7740_portcr_offsets); ++i) {
-+		const struct r8a7740_portcr_group *group =
-+			&r8a7740_portcr_offsets[i];
-+
-+		if (i <= group->end_pin)
-+			return pfc->window->virt + group->offset + pin;
-+	}
-+
-+	return NULL;
-+}
-+
-+static unsigned int r8a7740_pinmux_get_bias(struct sh_pfc *pfc, unsigned int pin)
-+{
-+	void __iomem *addr = r8a7740_pinmux_portcr(pfc, pin);
-+	u32 value = ioread8(addr) & PORTnCR_PULMD_MASK;
-+
-+	switch (value) {
-+	case PORTnCR_PULMD_UP:
-+		return PIN_CONFIG_BIAS_PULL_UP;
-+	case PORTnCR_PULMD_DOWN:
-+		return PIN_CONFIG_BIAS_PULL_DOWN;
-+	case PORTnCR_PULMD_OFF:
-+	default:
-+		return PIN_CONFIG_BIAS_DISABLE;
-+	}
-+}
-+
-+static void r8a7740_pinmux_set_bias(struct sh_pfc *pfc, unsigned int pin,
-+				   unsigned int bias)
-+{
-+	void __iomem *addr = r8a7740_pinmux_portcr(pfc, pin);
-+	u32 value = ioread8(addr) & ~PORTnCR_PULMD_MASK;
-+
-+	switch (bias) {
-+	case PIN_CONFIG_BIAS_PULL_UP:
-+		value |= PORTnCR_PULMD_UP;
-+		break;
-+	case PIN_CONFIG_BIAS_PULL_DOWN:
-+		value |= PORTnCR_PULMD_DOWN;
-+		break;
-+	}
-+
-+	iowrite8(value, addr);
-+}
-+
-+static const struct sh_pfc_soc_operations r8a7740_pinmux_ops = {
-+	.get_bias = r8a7740_pinmux_get_bias,
-+	.set_bias = r8a7740_pinmux_set_bias,
-+};
-+
- const struct sh_pfc_soc_info r8a7740_pinmux_info = {
- 	.name		= "r8a7740_pfc",
-+	.ops		= &r8a7740_pinmux_ops,
-+
- 	.input		= { PINMUX_INPUT_BEGIN,
- 			    PINMUX_INPUT_END },
--	.input_pu	= { PINMUX_INPUT_PULLUP_BEGIN,
--			    PINMUX_INPUT_PULLUP_END },
--	.input_pd	= { PINMUX_INPUT_PULLDOWN_BEGIN,
--			    PINMUX_INPUT_PULLDOWN_END },
- 	.output		= { PINMUX_OUTPUT_BEGIN,
- 			    PINMUX_OUTPUT_END },
- 	.function	= { PINMUX_FUNCTION_BEGIN,
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0178-ARM-shmobile-genmai-Rename-ARCH_SHMOBILE-to-ARCH_SHM.patch b/patches.renesas/0178-ARM-shmobile-genmai-Rename-ARCH_SHMOBILE-to-ARCH_SHM.patch
deleted file mode 100644
index 946e27e4e9aea..0000000000000
--- a/patches.renesas/0178-ARM-shmobile-genmai-Rename-ARCH_SHMOBILE-to-ARCH_SHM.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From bd2136c039b59a082a2481d81bc3dac0d6ce2ca5 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Sat, 9 Nov 2013 13:33:48 +0100
-Subject: ARM: shmobile: genmai: Rename ARCH_SHMOBILE to ARCH_SHMOBILE_LEGACY
-
-The ARCH_SHMOBILE configuration option has been renamed to
-ARCH_SHMOBILE_LEGACY. Update the defconfig accordingly.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Magnus Damm <damm@opensource.se>
-[ horms+renesas@verge.net.au: Removed non-genmai changes which
-  have been squashed into "ARM: Rename ARCH_SHMOBILE to ARCH_SHMOBILE_LEGACY". ]
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-(cherry picked from commit 7f558a124022630e177f08bbdd0673c3301f7e84)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/configs/genmai_defconfig | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/arch/arm/configs/genmai_defconfig b/arch/arm/configs/genmai_defconfig
-index 69b1531a4c80..aa0b704f48af 100644
---- a/arch/arm/configs/genmai_defconfig
-+++ b/arch/arm/configs/genmai_defconfig
-@@ -12,7 +12,7 @@ CONFIG_SLAB=y
- # CONFIG_BLK_DEV_BSG is not set
- # CONFIG_IOSCHED_DEADLINE is not set
- # CONFIG_IOSCHED_CFQ is not set
--CONFIG_ARCH_SHMOBILE=y
-+CONFIG_ARCH_SHMOBILE_LEGACY=y
- CONFIG_ARCH_R7S72100=y
- CONFIG_MACH_GENMAI=y
- # CONFIG_SH_TIMER_CMT is not set
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0178-ARM-shmobile-r8a73a4-add-a-DMAC-platform-device-and-.patch b/patches.renesas/0178-ARM-shmobile-r8a73a4-add-a-DMAC-platform-device-and-.patch
deleted file mode 100644
index 08afc62bed7aa..0000000000000
--- a/patches.renesas/0178-ARM-shmobile-r8a73a4-add-a-DMAC-platform-device-and-.patch
+++ /dev/null
@@ -1,186 +0,0 @@
-From a6b3fc3b40cb06d219e17674652e3822cab4f526 Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Fri, 2 Aug 2013 16:50:40 +0200
-Subject: ARM: shmobile: r8a73a4: add a DMAC platform device and clock for it
-
-Add a DMAC platform device and clock definitions for it on r8a73a4.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 3794c1663491012b10b41699b5ee5175bd75a3f1)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r8a73a4.c        |  4 +-
- arch/arm/mach-shmobile/include/mach/r8a73a4.h |  9 +++
- arch/arm/mach-shmobile/setup-r8a73a4.c        | 91 +++++++++++++++++++++++++++
- 3 files changed, 103 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a73a4.c b/arch/arm/mach-shmobile/clock-r8a73a4.c
-index 5bd2e851e3c7..e203fc88f9e6 100644
---- a/arch/arm/mach-shmobile/clock-r8a73a4.c
-+++ b/arch/arm/mach-shmobile/clock-r8a73a4.c
-@@ -504,7 +504,7 @@ static struct clk div6_clks[DIV6_NR] = {
- 
- /* MSTP */
- enum {
--	MSTP217, MSTP216, MSTP207, MSTP206, MSTP204, MSTP203,
-+	MSTP218, MSTP217, MSTP216, MSTP207, MSTP206, MSTP204, MSTP203,
- 	MSTP329, MSTP323, MSTP318, MSTP317, MSTP316,
- 	MSTP315, MSTP314, MSTP313, MSTP312, MSTP305, MSTP300,
- 	MSTP411, MSTP410, MSTP409,
-@@ -519,6 +519,7 @@ static struct clk mstp_clks[MSTP_NR] = {
- 	[MSTP207] = SH_CLK_MSTP32(&div6_clks[DIV6_MP],	SMSTPCR2, 7, 0), /* SCIFB1 */
- 	[MSTP216] = SH_CLK_MSTP32(&div6_clks[DIV6_MP],	SMSTPCR2, 16, 0), /* SCIFB2 */
- 	[MSTP217] = SH_CLK_MSTP32(&div6_clks[DIV6_MP],	SMSTPCR2, 17, 0), /* SCIFB3 */
-+	[MSTP218] = SH_CLK_MSTP32(&div4_clks[DIV4_HP],	SMSTPCR2, 18, 0), /* DMAC */
- 	[MSTP300] = SH_CLK_MSTP32(&div4_clks[DIV4_HP],	SMSTPCR3, 0, 0), /* IIC2 */
- 	[MSTP305] = SH_CLK_MSTP32(&div6_clks[DIV6_MMC1],SMSTPCR3, 5, 0), /* MMCIF1 */
- 	[MSTP312] = SH_CLK_MSTP32(&div6_clks[DIV6_SDHI2],SMSTPCR3, 12, 0), /* SDHI2 */
-@@ -578,6 +579,7 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP207]),
- 	CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP216]),
- 	CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP217]),
-+	CLKDEV_DEV_ID("sh-dma-engine.0", &mstp_clks[MSTP218]),
- 	CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
- 	CLKDEV_DEV_ID("e6520000.i2c", &mstp_clks[MSTP300]),
- 	CLKDEV_DEV_ID("sh_mmcif.1", &mstp_clks[MSTP305]),
-diff --git a/arch/arm/mach-shmobile/include/mach/r8a73a4.h b/arch/arm/mach-shmobile/include/mach/r8a73a4.h
-index 5214338a6a47..ce8bdd1d8a8a 100644
---- a/arch/arm/mach-shmobile/include/mach/r8a73a4.h
-+++ b/arch/arm/mach-shmobile/include/mach/r8a73a4.h
-@@ -1,6 +1,15 @@
- #ifndef __ASM_R8A73A4_H__
- #define __ASM_R8A73A4_H__
- 
-+/* DMA slave IDs */
-+enum {
-+	SHDMA_SLAVE_INVALID,
-+	SHDMA_SLAVE_MMCIF0_TX,
-+	SHDMA_SLAVE_MMCIF0_RX,
-+	SHDMA_SLAVE_MMCIF1_TX,
-+	SHDMA_SLAVE_MMCIF1_RX,
-+};
-+
- void r8a73a4_add_standard_devices(void);
- void r8a73a4_add_dt_devices(void);
- void r8a73a4_clock_init(void);
-diff --git a/arch/arm/mach-shmobile/setup-r8a73a4.c b/arch/arm/mach-shmobile/setup-r8a73a4.c
-index 53a896275cae..b0f2749071be 100644
---- a/arch/arm/mach-shmobile/setup-r8a73a4.c
-+++ b/arch/arm/mach-shmobile/setup-r8a73a4.c
-@@ -22,8 +22,10 @@
- #include <linux/of_platform.h>
- #include <linux/platform_data/irq-renesas-irqc.h>
- #include <linux/serial_sci.h>
-+#include <linux/sh_dma.h>
- #include <linux/sh_timer.h>
- #include <mach/common.h>
-+#include <mach/dma-register.h>
- #include <mach/irqs.h>
- #include <mach/r8a73a4.h>
- #include <asm/mach/arch.h>
-@@ -199,12 +201,101 @@ void __init r8a73a4_add_dt_devices(void)
- 	r8a7790_register_cmt(10);
- }
- 
-+/* DMA */
-+static const struct sh_dmae_slave_config dma_slaves[] = {
-+	{
-+		.slave_id	= SHDMA_SLAVE_MMCIF0_TX,
-+		.addr		= 0xee200034,
-+		.chcr		= CHCR_TX(XMIT_SZ_32BIT),
-+		.mid_rid	= 0xd1,
-+	}, {
-+		.slave_id	= SHDMA_SLAVE_MMCIF0_RX,
-+		.addr		= 0xee200034,
-+		.chcr		= CHCR_RX(XMIT_SZ_32BIT),
-+		.mid_rid	= 0xd2,
-+	}, {
-+		.slave_id	= SHDMA_SLAVE_MMCIF1_TX,
-+		.addr		= 0xee220034,
-+		.chcr		= CHCR_TX(XMIT_SZ_32BIT),
-+		.mid_rid	= 0xe1,
-+	}, {
-+		.slave_id	= SHDMA_SLAVE_MMCIF1_RX,
-+		.addr		= 0xee220034,
-+		.chcr		= CHCR_RX(XMIT_SZ_32BIT),
-+		.mid_rid	= 0xe2,
-+	},
-+};
-+
-+#define DMAE_CHANNEL(a, b)				\
-+	{						\
-+		.offset         = (a) - 0x20,		\
-+		.dmars          = (a) - 0x20 + 0x40,	\
-+		.chclr_bit	= (b),			\
-+		.chclr_offset	= 0x80 - 0x20,		\
-+	}
-+
-+static const struct sh_dmae_channel dma_channels[] = {
-+	DMAE_CHANNEL(0x8000, 0),
-+	DMAE_CHANNEL(0x8080, 1),
-+	DMAE_CHANNEL(0x8100, 2),
-+	DMAE_CHANNEL(0x8180, 3),
-+	DMAE_CHANNEL(0x8200, 4),
-+	DMAE_CHANNEL(0x8280, 5),
-+	DMAE_CHANNEL(0x8300, 6),
-+	DMAE_CHANNEL(0x8380, 7),
-+	DMAE_CHANNEL(0x8400, 8),
-+	DMAE_CHANNEL(0x8480, 9),
-+	DMAE_CHANNEL(0x8500, 10),
-+	DMAE_CHANNEL(0x8580, 11),
-+	DMAE_CHANNEL(0x8600, 12),
-+	DMAE_CHANNEL(0x8680, 13),
-+	DMAE_CHANNEL(0x8700, 14),
-+	DMAE_CHANNEL(0x8780, 15),
-+	DMAE_CHANNEL(0x8800, 16),
-+	DMAE_CHANNEL(0x8880, 17),
-+	DMAE_CHANNEL(0x8900, 18),
-+	DMAE_CHANNEL(0x8980, 19),
-+};
-+
-+static const struct sh_dmae_pdata dma_pdata = {
-+	.slave		= dma_slaves,
-+	.slave_num	= ARRAY_SIZE(dma_slaves),
-+	.channel	= dma_channels,
-+	.channel_num	= ARRAY_SIZE(dma_channels),
-+	.ts_low_shift	= TS_LOW_SHIFT,
-+	.ts_low_mask	= TS_LOW_BIT << TS_LOW_SHIFT,
-+	.ts_high_shift	= TS_HI_SHIFT,
-+	.ts_high_mask	= TS_HI_BIT << TS_HI_SHIFT,
-+	.ts_shift	= dma_ts_shift,
-+	.ts_shift_num	= ARRAY_SIZE(dma_ts_shift),
-+	.dmaor_init     = DMAOR_DME,
-+	.chclr_present	= 1,
-+	.chclr_bitwise	= 1,
-+};
-+
-+static struct resource dma_resources[] = {
-+	DEFINE_RES_MEM(0xe6700020, 0x89e0),
-+	DEFINE_RES_IRQ_NAMED(gic_spi(220), "error_irq"),
-+	{
-+		/* IRQ for channels 0-19 */
-+		.start  = gic_spi(200),
-+		.end    = gic_spi(219),
-+		.flags  = IORESOURCE_IRQ,
-+	},
-+};
-+
-+#define r8a73a4_register_dmac()							\
-+	platform_device_register_resndata(&platform_bus, "sh-dma-engine", 0,	\
-+				dma_resources, ARRAY_SIZE(dma_resources),	\
-+				&dma_pdata, sizeof(dma_pdata))
-+
- void __init r8a73a4_add_standard_devices(void)
- {
- 	r8a73a4_add_dt_devices();
- 	r8a73a4_register_irqc(0);
- 	r8a73a4_register_irqc(1);
- 	r8a73a4_register_thermal();
-+	r8a73a4_register_dmac();
- }
- 
- void __init r8a73a4_init_early(void)
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0178-sh-pfc-r8a7778-Fix-outdated-GPIO_FN-comments.patch b/patches.renesas/0178-sh-pfc-r8a7778-Fix-outdated-GPIO_FN-comments.patch
deleted file mode 100644
index ed9b64a06aab0..0000000000000
--- a/patches.renesas/0178-sh-pfc-r8a7778-Fix-outdated-GPIO_FN-comments.patch
+++ /dev/null
@@ -1,56 +0,0 @@
-From c08292f86be53e3870e9108bc0debefeab3c281e Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 23 Apr 2013 11:08:05 +0000
-Subject: sh-pfc: r8a7778: Fix outdated GPIO_FN comments
-
-Function GPIOs have been removed, remove comments that refer to them.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 0eef12d732b92453340f17632eb7d51a9808aa07)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7778.c | 26 +++++++++++++-------------
- 1 file changed, 13 insertions(+), 13 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7778.c b/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
-index b1925cc1..72f7a3c1 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
-@@ -376,19 +376,19 @@ enum {
- 	AVS1_MARK,
- 	AVS2_MARK,
- 
--	VI0_R0_C_MARK,  /* see GPIO_FN_VI0_R0_A */
--	VI0_R1_C_MARK,  /* see GPIO_FN_VI0_R1_A */
--	VI0_R2_C_MARK,  /* see GPIO_FN_VI0_R2_A */
--	/* VI0_R3_C_MARK,  see GPIO_FN_VI0_R3_A */
--	VI0_R4_C_MARK,  /* see GPIO_FN_VI0_R4_A */
--	VI0_R5_C_MARK,  /* see GPIO_FN_VI0_R5_A */
--
--	VI0_R0_D_MARK,  /* see GPIO_FN_VI0_R0_B */
--	VI0_R1_D_MARK,  /* see GPIO_FN_VI0_R1_B */
--	VI0_R2_D_MARK,  /* see GPIO_FN_VI0_R2_B */
--	VI0_R3_D_MARK,  /* see GPIO_FN_VI0_R3_B */
--	VI0_R4_D_MARK,  /* see GPIO_FN_VI0_R4_B */
--	VI0_R5_D_MARK,  /* see GPIO_FN_VI0_R5_B */
-+	VI0_R0_C_MARK,		/* see sel_vi0 */
-+	VI0_R1_C_MARK,		/* see sel_vi0 */
-+	VI0_R2_C_MARK,		/* see sel_vi0 */
-+	/* VI0_R3_C_MARK, */
-+	VI0_R4_C_MARK,		/* see sel_vi0 */
-+	VI0_R5_C_MARK,		/* see sel_vi0 */
-+
-+	VI0_R0_D_MARK,		/* see sel_vi0 */
-+	VI0_R1_D_MARK,		/* see sel_vi0 */
-+	VI0_R2_D_MARK,		/* see sel_vi0 */
-+	VI0_R3_D_MARK,		/* see sel_vi0 */
-+	VI0_R4_D_MARK,		/* see sel_vi0 */
-+	VI0_R5_D_MARK,		/* see sel_vi0 */
- 
- 	/* IPSR0 */
- 	PRESETOUT_MARK,	PWM1_MARK,	AUDATA0_MARK,
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0179-ARM-shmobile-bockw-use-regulator-for-MMCIF.patch b/patches.renesas/0179-ARM-shmobile-bockw-use-regulator-for-MMCIF.patch
deleted file mode 100644
index 0504df892fd53..0000000000000
--- a/patches.renesas/0179-ARM-shmobile-bockw-use-regulator-for-MMCIF.patch
+++ /dev/null
@@ -1,67 +0,0 @@
-From b56c90dcfed496d22298daa0f41d6997549f9c0f Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Thu, 3 Oct 2013 18:30:55 -0700
-Subject: ARM: shmobile: bockw: use regulator for MMCIF
-
-When regulators are used with MMC devices, sh_mmcif_plat_data::ocr
-is not needed, they can be removed from platform data.
-This patch adds v3.3 regulator settings,
-and moved fixed-dummy regulator registration position
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 06ac2a61e1559e5986b1e2269d110d51576ab8d4)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-bockw.c | 13 +++++++++----
- 1 file changed, 9 insertions(+), 4 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-bockw.c b/arch/arm/mach-shmobile/board-bockw.c
-index 38611526fe9a..540f0dc2431a 100644
---- a/arch/arm/mach-shmobile/board-bockw.c
-+++ b/arch/arm/mach-shmobile/board-bockw.c
-@@ -116,6 +116,11 @@ static struct regulator_consumer_supply dummy_supplies[] = {
- 	REGULATOR_SUPPLY("vdd33a", "smsc911x"),
- };
- 
-+static struct regulator_consumer_supply fixed3v3_power_consumers[] = {
-+	REGULATOR_SUPPLY("vmmc", "sh_mmcif"),
-+	REGULATOR_SUPPLY("vqmmc", "sh_mmcif"),
-+};
-+
- static struct smsc911x_platform_config smsc911x_data __initdata = {
- 	.irq_polarity	= SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
- 	.irq_type	= SMSC911X_IRQ_TYPE_PUSH_PULL,
-@@ -271,7 +276,6 @@ static struct resource mmc_resources[] __initdata = {
- 
- static struct sh_mmcif_plat_data sh_mmcif_plat __initdata = {
- 	.sup_pclk	= 0,
--	.ocr		= MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
- 	.caps		= MMC_CAP_4_BIT_DATA |
- 			  MMC_CAP_8_BIT_DATA |
- 			  MMC_CAP_NEEDS_POLL,
-@@ -614,6 +618,10 @@ static void __init bockw_init(void)
- 		&usb_phy_platform_data,
- 		sizeof(struct rcar_phy_platform_data));
- 
-+	regulator_register_fixed(0, dummy_supplies,
-+				 ARRAY_SIZE(dummy_supplies));
-+	regulator_register_always_on(1, "fixed-3.3V", fixed3v3_power_consumers,
-+				     ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
- 
- 	/* for SMSC */
- 	fpga = ioremap_nocache(FPGA, SZ_1M);
-@@ -629,9 +637,6 @@ static void __init bockw_init(void)
- 		val &= ~(1 << 4); /* enable SMSC911x */
- 		iowrite16(val, fpga + IRQ0MR);
- 
--		regulator_register_fixed(0, dummy_supplies,
--					 ARRAY_SIZE(dummy_supplies));
--
- 		platform_device_register_resndata(
- 			&platform_bus, "smsc911x", -1,
- 			smsc911x_resources, ARRAY_SIZE(smsc911x_resources),
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0179-ARM-shmobile-r8a7778-add-HPB-DMAC-support.patch b/patches.renesas/0179-ARM-shmobile-r8a7778-add-HPB-DMAC-support.patch
deleted file mode 100644
index 74ed8c4611278..0000000000000
--- a/patches.renesas/0179-ARM-shmobile-r8a7778-add-HPB-DMAC-support.patch
+++ /dev/null
@@ -1,163 +0,0 @@
-From d106902c5a4fd4bf7fb08f940938e4f5095ce54b Mon Sep 17 00:00:00 2001
-From: Max Filippov <max.filippov@cogentembedded.com>
-Date: Sun, 25 Aug 2013 01:35:13 +0400
-Subject: ARM: shmobile: r8a7778: add HPB-DMAC support
-
-Add HPB-DMAC platform device on R8A7778 SoC along with its slave and channel
-configurations (only for SDHI0 so far).
-
-Signed-off-by: Max Filippov <max.filippov@cogentembedded.com>
-[Sergei: moved *enum* declaring HPB-DMAC slave IDs from now removed <mach/dma.h>
-to <mach/r8a7778.h>, removed #include <mach/dma.h> from setup-r8a7778.c, removed
-SSI-related *enum* values and SSI-related data from hpb_dmae_slaves[] and
-hpb_dmae_channels[], moved the comments after the element initializers of
-hpb_dmae_channels[].]
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-(cherry picked from commit 1eb6b5a0e55bfcfb0852b7d0f9442841ff807345)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/include/mach/r8a7778.h |  8 +++
- arch/arm/mach-shmobile/setup-r8a7778.c        | 85 +++++++++++++++++++++++++++
- 2 files changed, 93 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/include/mach/r8a7778.h b/arch/arm/mach-shmobile/include/mach/r8a7778.h
-index fdbd37df1543..6d0abb767764 100644
---- a/arch/arm/mach-shmobile/include/mach/r8a7778.h
-+++ b/arch/arm/mach-shmobile/include/mach/r8a7778.h
-@@ -1,6 +1,7 @@
- /*
-  * Copyright (C) 2013  Renesas Solutions Corp.
-  * Copyright (C) 2013  Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-+ * Copyright (C) 2013  Cogent Embedded, Inc.
-  *
-  * This program is free software; you can redistribute it and/or modify
-  * it under the terms of the GNU General Public License as published by
-@@ -21,6 +22,13 @@
- #include <linux/sh_eth.h>
- #include <linux/platform_data/camera-rcar.h>
- 
-+/* HPB-DMA slave IDs */
-+enum {
-+	HPBDMA_SLAVE_DUMMY,
-+	HPBDMA_SLAVE_SDHI0_TX,
-+	HPBDMA_SLAVE_SDHI0_RX,
-+};
-+
- extern void r8a7778_add_standard_devices(void);
- extern void r8a7778_add_standard_devices_dt(void);
- extern void r8a7778_add_dt_devices(void);
-diff --git a/arch/arm/mach-shmobile/setup-r8a7778.c b/arch/arm/mach-shmobile/setup-r8a7778.c
-index bfeedd169891..460814ea3c94 100644
---- a/arch/arm/mach-shmobile/setup-r8a7778.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7778.c
-@@ -24,6 +24,7 @@
- #include <linux/irqchip/arm-gic.h>
- #include <linux/of.h>
- #include <linux/of_platform.h>
-+#include <linux/platform_data/dma-rcar-hpbdma.h>
- #include <linux/platform_data/gpio-rcar.h>
- #include <linux/platform_data/irq-renesas-intc-irqpin.h>
- #include <linux/platform_device.h>
-@@ -308,6 +309,88 @@ void __init r8a7778_add_dt_devices(void)
- 	r8a7778_register_tmu(1);
- }
- 
-+/* HPB-DMA */
-+
-+/* Asynchronous mode register (ASYNCMDR) bits */
-+#define HPB_DMAE_ASYNCMDR_ASMD22_MASK	BIT(2)	/* SDHI0 */
-+#define HPB_DMAE_ASYNCMDR_ASMD22_SINGLE	BIT(2)	/* SDHI0 */
-+#define HPB_DMAE_ASYNCMDR_ASMD22_MULTI	0	/* SDHI0 */
-+#define HPB_DMAE_ASYNCMDR_ASMD21_MASK	BIT(1)	/* SDHI0 */
-+#define HPB_DMAE_ASYNCMDR_ASMD21_SINGLE	BIT(1)	/* SDHI0 */
-+#define HPB_DMAE_ASYNCMDR_ASMD21_MULTI	0	/* SDHI0 */
-+
-+static const struct hpb_dmae_slave_config hpb_dmae_slaves[] = {
-+	{
-+		.id	= HPBDMA_SLAVE_SDHI0_TX,
-+		.addr	= 0xffe4c000 + 0x30,
-+		.dcr	= HPB_DMAE_DCR_SPDS_16BIT |
-+			  HPB_DMAE_DCR_DMDL |
-+			  HPB_DMAE_DCR_DPDS_16BIT,
-+		.rstr	= HPB_DMAE_ASYNCRSTR_ASRST21 |
-+			  HPB_DMAE_ASYNCRSTR_ASRST22 |
-+			  HPB_DMAE_ASYNCRSTR_ASRST23,
-+		.mdr	= HPB_DMAE_ASYNCMDR_ASMD21_MULTI,
-+		.mdm	= HPB_DMAE_ASYNCMDR_ASMD21_MASK,
-+		.port	= 0x0D0C,
-+		.flags	= HPB_DMAE_SET_ASYNC_RESET | HPB_DMAE_SET_ASYNC_MODE,
-+		.dma_ch	= 21,
-+	}, {
-+		.id	= HPBDMA_SLAVE_SDHI0_RX,
-+		.addr	= 0xffe4c000 + 0x30,
-+		.dcr	= HPB_DMAE_DCR_SMDL |
-+			  HPB_DMAE_DCR_SPDS_16BIT |
-+			  HPB_DMAE_DCR_DPDS_16BIT,
-+		.rstr	= HPB_DMAE_ASYNCRSTR_ASRST21 |
-+			  HPB_DMAE_ASYNCRSTR_ASRST22 |
-+			  HPB_DMAE_ASYNCRSTR_ASRST23,
-+		.mdr	= HPB_DMAE_ASYNCMDR_ASMD22_MULTI,
-+		.mdm	= HPB_DMAE_ASYNCMDR_ASMD22_MASK,
-+		.port	= 0x0D0C,
-+		.flags	= HPB_DMAE_SET_ASYNC_RESET | HPB_DMAE_SET_ASYNC_MODE,
-+		.dma_ch	= 22,
-+	},
-+};
-+
-+static const struct hpb_dmae_channel hpb_dmae_channels[] = {
-+	HPB_DMAE_CHANNEL(0x7e, HPBDMA_SLAVE_SDHI0_TX), /* ch. 21 */
-+	HPB_DMAE_CHANNEL(0x7e, HPBDMA_SLAVE_SDHI0_RX), /* ch. 22 */
-+};
-+
-+static struct hpb_dmae_pdata dma_platform_data __initdata = {
-+	.slaves			= hpb_dmae_slaves,
-+	.num_slaves		= ARRAY_SIZE(hpb_dmae_slaves),
-+	.channels		= hpb_dmae_channels,
-+	.num_channels		= ARRAY_SIZE(hpb_dmae_channels),
-+	.ts_shift		= {
-+		[XMIT_SZ_8BIT]	= 0,
-+		[XMIT_SZ_16BIT]	= 1,
-+		[XMIT_SZ_32BIT]	= 2,
-+	},
-+	.num_hw_channels	= 39,
-+};
-+
-+static struct resource hpb_dmae_resources[] __initdata = {
-+	/* Channel registers */
-+	DEFINE_RES_MEM(0xffc08000, 0x1000),
-+	/* Common registers */
-+	DEFINE_RES_MEM(0xffc09000, 0x170),
-+	/* Asynchronous reset registers */
-+	DEFINE_RES_MEM(0xffc00300, 4),
-+	/* Asynchronous mode registers */
-+	DEFINE_RES_MEM(0xffc00400, 4),
-+	/* IRQ for DMA channels */
-+	DEFINE_RES_NAMED(gic_iid(0x7b), 5, NULL, IORESOURCE_IRQ),
-+};
-+
-+static void __init r8a7778_register_hpb_dmae(void)
-+{
-+	platform_device_register_resndata(&platform_bus, "hpb-dma-engine", -1,
-+					  hpb_dmae_resources,
-+					  ARRAY_SIZE(hpb_dmae_resources),
-+					  &dma_platform_data,
-+					  sizeof(dma_platform_data));
-+}
-+
- void __init r8a7778_add_standard_devices(void)
- {
- 	r8a7778_add_dt_devices();
-@@ -318,6 +401,8 @@ void __init r8a7778_add_standard_devices(void)
- 	r8a7778_register_hspi(0);
- 	r8a7778_register_hspi(1);
- 	r8a7778_register_hspi(2);
-+
-+	r8a7778_register_hpb_dmae();
- }
- 
- void __init r8a7778_init_late(void)
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0179-sh-pfc-r8a7778-tidyup-SDHI-naming-suffixes-and-sort-.patch b/patches.renesas/0179-sh-pfc-r8a7778-tidyup-SDHI-naming-suffixes-and-sort-.patch
deleted file mode 100644
index 101bc22273be1..0000000000000
--- a/patches.renesas/0179-sh-pfc-r8a7778-tidyup-SDHI-naming-suffixes-and-sort-.patch
+++ /dev/null
@@ -1,222 +0,0 @@
-From 20ca60dcd77bbada47cf0c97f121c15f71c15198 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Tue, 23 Apr 2013 04:32:32 +0000
-Subject: sh-pfc: r8a7778: tidyup SDHI naming suffixes and sort it
- alphabetically
-
-SDHI 1/2 are the target
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 0290df2d249e62b0e44b7c41d5fdd2c59c412587)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7778.c | 164 +++++++++++++++++------------------
- 1 file changed, 80 insertions(+), 84 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7778.c b/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
-index 72f7a3c1..15295a5b 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
-@@ -1450,60 +1450,56 @@ SDHI_PFC_PINS(sdhi0_wp,		RCAR_GP_PIN(3, 18));
- SDHI_PFC_WPPN(sdhi0_wp,		SD0_WP);
- 
- /* - SDHI1 ------------------------------------------------------------------ */
--SDHI_PFC_PINS(sdhi1_a_cd,	RCAR_GP_PIN(0, 30));
--SDHI_PFC_CDPN(sdhi1_a_cd,	SD1_CD_A);
--SDHI_PFC_PINS(sdhi1_a_ctrl,	RCAR_GP_PIN(1, 5),	RCAR_GP_PIN(1, 6));
--SDHI_PFC_CTRL(sdhi1_a_ctrl,	SD1_CLK_A,		SD1_CMD_A);
--SDHI_PFC_PINS(sdhi1_a_data1,	RCAR_GP_PIN(1, 7));
--SDHI_PFC_DAT1(sdhi1_a_data1,	SD1_DAT0_A);
--SDHI_PFC_PINS(sdhi1_a_data4,	RCAR_GP_PIN(1, 7),	RCAR_GP_PIN(1, 8),
-+SDHI_PFC_PINS(sdhi1_cd_a,	RCAR_GP_PIN(0, 30));
-+SDHI_PFC_CDPN(sdhi1_cd_a,	SD1_CD_A);
-+SDHI_PFC_PINS(sdhi1_cd_b,	RCAR_GP_PIN(2, 24));
-+SDHI_PFC_CDPN(sdhi1_cd_b,	SD1_CD_B);
-+SDHI_PFC_PINS(sdhi1_ctrl_a,	RCAR_GP_PIN(1, 5),	RCAR_GP_PIN(1, 6));
-+SDHI_PFC_CTRL(sdhi1_ctrl_a,	SD1_CLK_A,		SD1_CMD_A);
-+SDHI_PFC_PINS(sdhi1_ctrl_b,	RCAR_GP_PIN(1, 17),	RCAR_GP_PIN(1, 16));
-+SDHI_PFC_CTRL(sdhi1_ctrl_b,	SD1_CLK_B,		SD1_CMD_B);
-+SDHI_PFC_PINS(sdhi1_data1_a,	RCAR_GP_PIN(1, 7));
-+SDHI_PFC_DAT1(sdhi1_data1_a,	SD1_DAT0_A);
-+SDHI_PFC_PINS(sdhi1_data1_b,	RCAR_GP_PIN(1, 18));
-+SDHI_PFC_DAT1(sdhi1_data1_b,	SD1_DAT0_B);
-+SDHI_PFC_PINS(sdhi1_data4_a,	RCAR_GP_PIN(1, 7),	RCAR_GP_PIN(1, 8),
- 				RCAR_GP_PIN(0, 5),	RCAR_GP_PIN(0, 6));
--SDHI_PFC_DAT4(sdhi1_a_data4,	SD1_DAT0_A,		SD1_DAT1_A,
-+SDHI_PFC_DAT4(sdhi1_data4_a,	SD1_DAT0_A,		SD1_DAT1_A,
- 				SD1_DAT2_A,		SD1_DAT3_A);
--SDHI_PFC_PINS(sdhi1_a_wp,	RCAR_GP_PIN(0, 31));
--SDHI_PFC_WPPN(sdhi1_a_wp,	SD1_WP_A);
--
--SDHI_PFC_PINS(sdhi1_b_cd,	RCAR_GP_PIN(2, 24));
--SDHI_PFC_CDPN(sdhi1_b_cd,	SD1_CD_B);
--SDHI_PFC_PINS(sdhi1_b_ctrl,	RCAR_GP_PIN(1, 17),	RCAR_GP_PIN(1, 16));
--SDHI_PFC_CTRL(sdhi1_b_ctrl,	SD1_CLK_B,		SD1_CMD_B);
--SDHI_PFC_PINS(sdhi1_b_data1,	RCAR_GP_PIN(1, 18));
--SDHI_PFC_DAT1(sdhi1_b_data1,	SD1_DAT0_B);
--SDHI_PFC_PINS(sdhi1_b_data4,	RCAR_GP_PIN(1, 18),	RCAR_GP_PIN(1, 19),
-+SDHI_PFC_PINS(sdhi1_data4_b,	RCAR_GP_PIN(1, 18),	RCAR_GP_PIN(1, 19),
- 				RCAR_GP_PIN(1, 20),	RCAR_GP_PIN(1, 21));
--SDHI_PFC_DAT4(sdhi1_b_data4,	SD1_DAT0_B,		SD1_DAT1_B,
-+SDHI_PFC_DAT4(sdhi1_data4_b,	SD1_DAT0_B,		SD1_DAT1_B,
- 				SD1_DAT2_B,		SD1_DAT3_B);
--SDHI_PFC_PINS(sdhi1_b_wp,	RCAR_GP_PIN(2, 25));
--SDHI_PFC_WPPN(sdhi1_b_wp,	SD1_WP_B);
--
-+SDHI_PFC_PINS(sdhi1_wp_a,	RCAR_GP_PIN(0, 31));
-+SDHI_PFC_WPPN(sdhi1_wp_a,	SD1_WP_A);
-+SDHI_PFC_PINS(sdhi1_wp_b,	RCAR_GP_PIN(2, 25));
-+SDHI_PFC_WPPN(sdhi1_wp_b,	SD1_WP_B);
- 
- /* - SDH2 ------------------------------------------------------------------- */
--SDHI_PFC_PINS(sdhi2_a_cd,	RCAR_GP_PIN(4, 23));
--SDHI_PFC_CDPN(sdhi2_a_cd,	SD2_CD_A);
--SDHI_PFC_PINS(sdhi2_a_ctrl,	RCAR_GP_PIN(4, 17),	RCAR_GP_PIN(4, 18));
--SDHI_PFC_CTRL(sdhi2_a_ctrl,	SD2_CLK_A,		SD2_CMD_A);
--SDHI_PFC_PINS(sdhi2_a_data1,	RCAR_GP_PIN(4, 19));
--SDHI_PFC_DAT1(sdhi2_a_data1,	SD2_DAT0_A);
--SDHI_PFC_PINS(sdhi2_a_data4,	RCAR_GP_PIN(4, 19),	RCAR_GP_PIN(4, 20),
-+SDHI_PFC_PINS(sdhi2_cd_a,	RCAR_GP_PIN(4, 23));
-+SDHI_PFC_CDPN(sdhi2_cd_a,	SD2_CD_A);
-+SDHI_PFC_PINS(sdhi2_cd_b,	RCAR_GP_PIN(3, 27));
-+SDHI_PFC_CDPN(sdhi2_cd_b,	SD2_CD_B);
-+SDHI_PFC_PINS(sdhi2_ctrl_a,	RCAR_GP_PIN(4, 17),	RCAR_GP_PIN(4, 18));
-+SDHI_PFC_CTRL(sdhi2_ctrl_a,	SD2_CLK_A,		SD2_CMD_A);
-+SDHI_PFC_PINS(sdhi2_ctrl_b,	RCAR_GP_PIN(4, 5),	RCAR_GP_PIN(4, 6));
-+SDHI_PFC_CTRL(sdhi2_ctrl_b,	SD2_CLK_B,		SD2_CMD_B);
-+SDHI_PFC_PINS(sdhi2_data1_a,	RCAR_GP_PIN(4, 19));
-+SDHI_PFC_DAT1(sdhi2_data1_a,	SD2_DAT0_A);
-+SDHI_PFC_PINS(sdhi2_data1_b,	RCAR_GP_PIN(4, 7));
-+SDHI_PFC_DAT1(sdhi2_data1_b,	SD2_DAT0_B);
-+SDHI_PFC_PINS(sdhi2_data4_a,	RCAR_GP_PIN(4, 19),	RCAR_GP_PIN(4, 20),
- 				RCAR_GP_PIN(4, 21),	RCAR_GP_PIN(4, 22));
--SDHI_PFC_DAT4(sdhi2_a_data4,	SD2_DAT0_A,		SD2_DAT1_A,
-+SDHI_PFC_DAT4(sdhi2_data4_a,	SD2_DAT0_A,		SD2_DAT1_A,
- 				SD2_DAT2_A,		SD2_DAT3_A);
--SDHI_PFC_PINS(sdhi2_a_wp,	RCAR_GP_PIN(4, 24));
--SDHI_PFC_WPPN(sdhi2_a_wp,	SD2_WP_A);
--
--SDHI_PFC_PINS(sdhi2_b_cd,	RCAR_GP_PIN(3, 27));
--SDHI_PFC_CDPN(sdhi2_b_cd,	SD2_CD_B);
--SDHI_PFC_PINS(sdhi2_b_ctrl,	RCAR_GP_PIN(4, 5),	RCAR_GP_PIN(4, 6));
--SDHI_PFC_CTRL(sdhi2_b_ctrl,	SD2_CLK_B,		SD2_CMD_B);
--SDHI_PFC_PINS(sdhi2_b_data1,	RCAR_GP_PIN(4, 7));
--SDHI_PFC_DAT1(sdhi2_b_data1,	SD2_DAT0_B);
--SDHI_PFC_PINS(sdhi2_b_data4,	RCAR_GP_PIN(4, 7),	RCAR_GP_PIN(4, 8),
-+SDHI_PFC_PINS(sdhi2_data4_b,	RCAR_GP_PIN(4, 7),	RCAR_GP_PIN(4, 8),
- 				RCAR_GP_PIN(3, 25),	RCAR_GP_PIN(3, 26));
--SDHI_PFC_DAT4(sdhi2_b_data4,	SD2_DAT0_B,		SD2_DAT1_B,
-+SDHI_PFC_DAT4(sdhi2_data4_b,	SD2_DAT0_B,		SD2_DAT1_B,
- 				SD2_DAT2_B,		SD2_DAT3_B);
--SDHI_PFC_PINS(sdhi2_b_wp,	RCAR_GP_PIN(3, 28));
--SDHI_PFC_WPPN(sdhi2_b_wp,	SD2_WP_B);
--
-+SDHI_PFC_PINS(sdhi2_wp_a,	RCAR_GP_PIN(4, 24));
-+SDHI_PFC_WPPN(sdhi2_wp_a,	SD2_WP_A);
-+SDHI_PFC_PINS(sdhi2_wp_b,	RCAR_GP_PIN(3, 28));
-+SDHI_PFC_WPPN(sdhi2_wp_b,	SD2_WP_B);
- 
- static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(hscif0_data_a),
-@@ -1554,26 +1550,26 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(sdhi0_data1),
- 	SH_PFC_PIN_GROUP(sdhi0_data4),
- 	SH_PFC_PIN_GROUP(sdhi0_wp),
--	SH_PFC_PIN_GROUP(sdhi1_a_cd),
--	SH_PFC_PIN_GROUP(sdhi1_a_ctrl),
--	SH_PFC_PIN_GROUP(sdhi1_a_data1),
--	SH_PFC_PIN_GROUP(sdhi1_a_data4),
--	SH_PFC_PIN_GROUP(sdhi1_a_wp),
--	SH_PFC_PIN_GROUP(sdhi1_b_cd),
--	SH_PFC_PIN_GROUP(sdhi1_b_ctrl),
--	SH_PFC_PIN_GROUP(sdhi1_b_data1),
--	SH_PFC_PIN_GROUP(sdhi1_b_data4),
--	SH_PFC_PIN_GROUP(sdhi1_b_wp),
--	SH_PFC_PIN_GROUP(sdhi2_a_cd),
--	SH_PFC_PIN_GROUP(sdhi2_a_ctrl),
--	SH_PFC_PIN_GROUP(sdhi2_a_data1),
--	SH_PFC_PIN_GROUP(sdhi2_a_data4),
--	SH_PFC_PIN_GROUP(sdhi2_a_wp),
--	SH_PFC_PIN_GROUP(sdhi2_b_cd),
--	SH_PFC_PIN_GROUP(sdhi2_b_ctrl),
--	SH_PFC_PIN_GROUP(sdhi2_b_data1),
--	SH_PFC_PIN_GROUP(sdhi2_b_data4),
--	SH_PFC_PIN_GROUP(sdhi2_b_wp),
-+	SH_PFC_PIN_GROUP(sdhi1_cd_a),
-+	SH_PFC_PIN_GROUP(sdhi1_cd_b),
-+	SH_PFC_PIN_GROUP(sdhi1_ctrl_a),
-+	SH_PFC_PIN_GROUP(sdhi1_ctrl_b),
-+	SH_PFC_PIN_GROUP(sdhi1_data1_a),
-+	SH_PFC_PIN_GROUP(sdhi1_data1_b),
-+	SH_PFC_PIN_GROUP(sdhi1_data4_a),
-+	SH_PFC_PIN_GROUP(sdhi1_data4_b),
-+	SH_PFC_PIN_GROUP(sdhi1_wp_a),
-+	SH_PFC_PIN_GROUP(sdhi1_wp_b),
-+	SH_PFC_PIN_GROUP(sdhi2_cd_a),
-+	SH_PFC_PIN_GROUP(sdhi2_cd_b),
-+	SH_PFC_PIN_GROUP(sdhi2_ctrl_a),
-+	SH_PFC_PIN_GROUP(sdhi2_ctrl_b),
-+	SH_PFC_PIN_GROUP(sdhi2_data1_a),
-+	SH_PFC_PIN_GROUP(sdhi2_data1_b),
-+	SH_PFC_PIN_GROUP(sdhi2_data4_a),
-+	SH_PFC_PIN_GROUP(sdhi2_data4_b),
-+	SH_PFC_PIN_GROUP(sdhi2_wp_a),
-+	SH_PFC_PIN_GROUP(sdhi2_wp_b),
- };
- 
- static const char * const hscif0_groups[] = {
-@@ -1656,29 +1652,29 @@ static const char * const sdhi0_groups[] = {
- };
- 
- static const char * const sdhi1_groups[] = {
--	"sdhi1_a_cd",
--	"sdhi1_a_ctrl",
--	"sdhi1_a_data1",
--	"sdhi1_a_data4",
--	"sdhi1_a_wp",
--	"sdhi1_b_cd",
--	"sdhi1_b_ctrl",
--	"sdhi1_b_data1",
--	"sdhi1_b_data4",
--	"sdhi1_b_wp",
-+	"sdhi1_cd_a",
-+	"sdhi1_cd_b",
-+	"sdhi1_ctrl_a",
-+	"sdhi1_ctrl_b",
-+	"sdhi1_data1_a",
-+	"sdhi1_data1_b",
-+	"sdhi1_data4_a",
-+	"sdhi1_data4_b",
-+	"sdhi1_wp_a",
-+	"sdhi1_wp_b",
- };
- 
- static const char * const sdhi2_groups[] = {
--	"sdhi2_a_cd",
--	"sdhi2_a_ctrl",
--	"sdhi2_a_data1",
--	"sdhi2_a_data4",
--	"sdhi2_a_wp",
--	"sdhi2_b_cd",
--	"sdhi2_b_ctrl",
--	"sdhi2_b_data1",
--	"sdhi2_b_data4",
--	"sdhi2_b_wp",
-+	"sdhi2_cd_a",
-+	"sdhi2_cd_b",
-+	"sdhi2_ctrl_a",
-+	"sdhi2_ctrl_b",
-+	"sdhi2_data1_a",
-+	"sdhi2_data1_b",
-+	"sdhi2_data4_a",
-+	"sdhi2_data4_b",
-+	"sdhi2_wp_a",
-+	"sdhi2_wp_b",
- };
- 
- static const struct sh_pfc_function pinmux_functions[] = {
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0180-ARM-shmobile-Enable-PFC-GPIO-on-the-Koelsch-board.patch b/patches.renesas/0180-ARM-shmobile-Enable-PFC-GPIO-on-the-Koelsch-board.patch
deleted file mode 100644
index 7db99db911341..0000000000000
--- a/patches.renesas/0180-ARM-shmobile-Enable-PFC-GPIO-on-the-Koelsch-board.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From bebad825f18c41a97786ec9c857dcafbb11e093c Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Tue, 8 Oct 2013 12:39:49 +0900
-Subject: ARM: shmobile: Enable PFC/GPIO on the Koelsch board
-
-Enable r8a7791 PFC and GPIO on the Koelsch board.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 1a534ecec7cdf90e2089bb0ab7a77a8ccea3c4dc)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-koelsch.c | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/arch/arm/mach-shmobile/board-koelsch.c b/arch/arm/mach-shmobile/board-koelsch.c
-index ace1711a6cd8..d099eaf49cf6 100644
---- a/arch/arm/mach-shmobile/board-koelsch.c
-+++ b/arch/arm/mach-shmobile/board-koelsch.c
-@@ -30,6 +30,7 @@
- static void __init koelsch_add_standard_devices(void)
- {
- 	r8a7791_clock_init();
-+	r8a7791_pinmux_init();
- 	r8a7791_add_standard_devices();
- }
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0180-ARM-shmobile-r8a7778-add-GPIO-support.patch b/patches.renesas/0180-ARM-shmobile-r8a7778-add-GPIO-support.patch
deleted file mode 100644
index bdd1a27dfeb48..0000000000000
--- a/patches.renesas/0180-ARM-shmobile-r8a7778-add-GPIO-support.patch
+++ /dev/null
@@ -1,82 +0,0 @@
-From 78b6a770f918caa370f2f8b43bfa405abbb139bb Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Wed, 17 Apr 2013 23:41:50 -0700
-Subject: ARM: shmobile: r8a7778: add GPIO support
-
-This patch was tested on Bock-W board
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 39ca2283358852fa944f4abb8eb7ed8403b50420)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-r8a7778.c | 36 +++++++++++++++++++++++++++++++++-
- 1 file changed, 35 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-r8a7778.c b/arch/arm/mach-shmobile/setup-r8a7778.c
-index 0ca57010..1f36ecc3 100644
---- a/arch/arm/mach-shmobile/setup-r8a7778.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7778.c
-@@ -24,6 +24,7 @@
- #include <linux/irqchip/arm-gic.h>
- #include <linux/of.h>
- #include <linux/of_platform.h>
-+#include <linux/platform_data/gpio-rcar.h>
- #include <linux/platform_data/irq-renesas-intc-irqpin.h>
- #include <linux/platform_device.h>
- #include <linux/irqchip.h>
-@@ -94,17 +95,50 @@ static struct resource ether_resources[] = {
- 		&sh_tmu##idx##_platform_data,		\
- 		sizeof(sh_tmu##idx##_platform_data))
- 
--/* PFC */
-+/* PFC/GPIO */
- static struct resource pfc_resources[] = {
- 	DEFINE_RES_MEM(0xfffc0000, 0x118),
- };
- 
-+#define R8A7778_GPIO(idx)						\
-+static struct resource r8a7778_gpio##idx##_resources[] = {		\
-+	DEFINE_RES_MEM(0xffc40000 + 0x1000 * (idx), 0x30),		\
-+	DEFINE_RES_IRQ(gic_iid(0x87)),					\
-+};									\
-+									\
-+static struct gpio_rcar_config r8a7778_gpio##idx##_platform_data = {	\
-+	.gpio_base	= 32 * (idx),					\
-+	.irq_base	= GPIO_IRQ_BASE(idx),				\
-+	.number_of_pins	= 32,						\
-+	.pctl_name	= "pfc-r8a7778",				\
-+}
-+
-+R8A7778_GPIO(0);
-+R8A7778_GPIO(1);
-+R8A7778_GPIO(2);
-+R8A7778_GPIO(3);
-+R8A7778_GPIO(4);
-+
-+#define r8a7778_register_gpio(idx)				\
-+	platform_device_register_resndata(			\
-+		&platform_bus, "gpio_rcar", idx,		\
-+		r8a7778_gpio##idx##_resources,			\
-+		ARRAY_SIZE(r8a7778_gpio##idx##_resources),	\
-+		&r8a7778_gpio##idx##_platform_data,		\
-+		sizeof(r8a7778_gpio##idx##_platform_data))
-+
- void __init r8a7778_pinmux_init(void)
- {
- 	platform_device_register_simple(
- 		"pfc-r8a7778", -1,
- 		pfc_resources,
- 		ARRAY_SIZE(pfc_resources));
-+
-+	r8a7778_register_gpio(0);
-+	r8a7778_register_gpio(1);
-+	r8a7778_register_gpio(2);
-+	r8a7778_register_gpio(3);
-+	r8a7778_register_gpio(4);
- }
- 
- void __init r8a7778_add_standard_devices(void)
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0180-ARM-shmobile-r8a7779-add-HPB-DMAC-support.patch b/patches.renesas/0180-ARM-shmobile-r8a7779-add-HPB-DMAC-support.patch
deleted file mode 100644
index 1504054d94954..0000000000000
--- a/patches.renesas/0180-ARM-shmobile-r8a7779-add-HPB-DMAC-support.patch
+++ /dev/null
@@ -1,227 +0,0 @@
-From 1a5c45b4631ae8cf1b6dd78df235ae0627c0797f Mon Sep 17 00:00:00 2001
-From: Max Filippov <max.filippov@cogentembedded.com>
-Date: Sun, 25 Aug 2013 21:46:23 +0400
-Subject: ARM: shmobile: r8a7779: add HPB-DMAC support
-
-Add HPB-DMAC platform device on R8A7779 SoC along with its slave and channel
-configurations (only for SDHI0 so far).
-
-Signed-off-by: Max Filippov <max.filippov@cogentembedded.com>
-[Sergei: moved *enum* declaring HPB-DMAC slave IDs from now removed <mach/dma.h>
-to <mach/r8a7779.h>, removed #include <mach/dma.h> from setup-r8a7779.c, removed
-SSI-related *enum* values and SSI-related data from hpb_dmae_slaves[] and
-hpb_dmae_channels[], added ASYNCMDR.ASBTMD{20|24|43} and ASYNCMDR.ASMD{20|24|43}
-fields/values, fixed comments to ASYNCMDR.ASBTMD2[123] and ASYNCMDR.ASMD2[123]
-fields/values, renamed all the bit/field/value #define's to include 'HBP_DMAE_'
-prefix to match the driver, moved comments after the element initializers of
-hpb_dmae_channels[].]
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-(cherry picked from commit a43e5bd76a4a3df58167d85e8020a1c9e566ad75)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/include/mach/r8a7779.h |   7 ++
- arch/arm/mach-shmobile/setup-r8a7779.c        | 154 ++++++++++++++++++++++++++
- 2 files changed, 161 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/include/mach/r8a7779.h b/arch/arm/mach-shmobile/include/mach/r8a7779.h
-index 11c740047e14..31e87b92a9c3 100644
---- a/arch/arm/mach-shmobile/include/mach/r8a7779.h
-+++ b/arch/arm/mach-shmobile/include/mach/r8a7779.h
-@@ -6,6 +6,13 @@
- #include <linux/sh_eth.h>
- #include <linux/platform_data/camera-rcar.h>
- 
-+/* HPB-DMA slave IDs */
-+enum {
-+	HPBDMA_SLAVE_DUMMY,
-+	HPBDMA_SLAVE_SDHI0_TX,
-+	HPBDMA_SLAVE_SDHI0_RX,
-+};
-+
- struct platform_device;
- 
- struct r8a7779_pm_ch {
-diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c
-index ecd0148ee1e1..eacb2f783693 100644
---- a/arch/arm/mach-shmobile/setup-r8a7779.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7779.c
-@@ -25,6 +25,7 @@
- #include <linux/irqchip.h>
- #include <linux/irqchip/arm-gic.h>
- #include <linux/of_platform.h>
-+#include <linux/platform_data/dma-rcar-hpbdma.h>
- #include <linux/platform_data/gpio-rcar.h>
- #include <linux/platform_data/irq-renesas-intc-irqpin.h>
- #include <linux/platform_device.h>
-@@ -632,6 +633,158 @@ static struct platform_device_info *vin_info_table[] __initdata = {
- 	&vin3_info,
- };
- 
-+/* HPB-DMA */
-+
-+/* Asynchronous mode register bits */
-+#define HPB_DMAE_ASYNCMDR_ASMD43_MASK		BIT(23)	/* MMC1 */
-+#define HPB_DMAE_ASYNCMDR_ASMD43_SINGLE		BIT(23)	/* MMC1 */
-+#define HPB_DMAE_ASYNCMDR_ASMD43_MULTI		0	/* MMC1 */
-+#define HPB_DMAE_ASYNCMDR_ASBTMD43_MASK		BIT(22)	/* MMC1 */
-+#define HPB_DMAE_ASYNCMDR_ASBTMD43_BURST	BIT(22)	/* MMC1 */
-+#define HPB_DMAE_ASYNCMDR_ASBTMD43_NBURST	0	/* MMC1 */
-+#define HPB_DMAE_ASYNCMDR_ASMD24_MASK		BIT(21)	/* MMC0 */
-+#define HPB_DMAE_ASYNCMDR_ASMD24_SINGLE		BIT(21)	/* MMC0 */
-+#define HPB_DMAE_ASYNCMDR_ASMD24_MULTI		0	/* MMC0 */
-+#define HPB_DMAE_ASYNCMDR_ASBTMD24_MASK		BIT(20)	/* MMC0 */
-+#define HPB_DMAE_ASYNCMDR_ASBTMD24_BURST	BIT(20)	/* MMC0 */
-+#define HPB_DMAE_ASYNCMDR_ASBTMD24_NBURST	0	/* MMC0 */
-+#define HPB_DMAE_ASYNCMDR_ASMD41_MASK		BIT(19)	/* SDHI3 */
-+#define HPB_DMAE_ASYNCMDR_ASMD41_SINGLE		BIT(19)	/* SDHI3 */
-+#define HPB_DMAE_ASYNCMDR_ASMD41_MULTI		0	/* SDHI3 */
-+#define HPB_DMAE_ASYNCMDR_ASBTMD41_MASK		BIT(18)	/* SDHI3 */
-+#define HPB_DMAE_ASYNCMDR_ASBTMD41_BURST	BIT(18)	/* SDHI3 */
-+#define HPB_DMAE_ASYNCMDR_ASBTMD41_NBURST	0	/* SDHI3 */
-+#define HPB_DMAE_ASYNCMDR_ASMD40_MASK		BIT(17)	/* SDHI3 */
-+#define HPB_DMAE_ASYNCMDR_ASMD40_SINGLE		BIT(17)	/* SDHI3 */
-+#define HPB_DMAE_ASYNCMDR_ASMD40_MULTI		0	/* SDHI3 */
-+#define HPB_DMAE_ASYNCMDR_ASBTMD40_MASK		BIT(16)	/* SDHI3 */
-+#define HPB_DMAE_ASYNCMDR_ASBTMD40_BURST	BIT(16)	/* SDHI3 */
-+#define HPB_DMAE_ASYNCMDR_ASBTMD40_NBURST	0	/* SDHI3 */
-+#define HPB_DMAE_ASYNCMDR_ASMD39_MASK		BIT(15)	/* SDHI3 */
-+#define HPB_DMAE_ASYNCMDR_ASMD39_SINGLE		BIT(15)	/* SDHI3 */
-+#define HPB_DMAE_ASYNCMDR_ASMD39_MULTI		0	/* SDHI3 */
-+#define HPB_DMAE_ASYNCMDR_ASBTMD39_MASK		BIT(14)	/* SDHI3 */
-+#define HPB_DMAE_ASYNCMDR_ASBTMD39_BURST	BIT(14)	/* SDHI3 */
-+#define HPB_DMAE_ASYNCMDR_ASBTMD39_NBURST	0	/* SDHI3 */
-+#define HPB_DMAE_ASYNCMDR_ASMD27_MASK		BIT(13)	/* SDHI2 */
-+#define HPB_DMAE_ASYNCMDR_ASMD27_SINGLE		BIT(13)	/* SDHI2 */
-+#define HPB_DMAE_ASYNCMDR_ASMD27_MULTI		0	/* SDHI2 */
-+#define HPB_DMAE_ASYNCMDR_ASBTMD27_MASK		BIT(12)	/* SDHI2 */
-+#define HPB_DMAE_ASYNCMDR_ASBTMD27_BURST	BIT(12)	/* SDHI2 */
-+#define HPB_DMAE_ASYNCMDR_ASBTMD27_NBURST	0	/* SDHI2 */
-+#define HPB_DMAE_ASYNCMDR_ASMD26_MASK		BIT(11)	/* SDHI2 */
-+#define HPB_DMAE_ASYNCMDR_ASMD26_SINGLE		BIT(11)	/* SDHI2 */
-+#define HPB_DMAE_ASYNCMDR_ASMD26_MULTI		0	/* SDHI2 */
-+#define HPB_DMAE_ASYNCMDR_ASBTMD26_MASK		BIT(10)	/* SDHI2 */
-+#define HPB_DMAE_ASYNCMDR_ASBTMD26_BURST	BIT(10)	/* SDHI2 */
-+#define HPB_DMAE_ASYNCMDR_ASBTMD26_NBURST	0	/* SDHI2 */
-+#define HPB_DMAE_ASYNCMDR_ASMD25_MASK		BIT(9)	/* SDHI2 */
-+#define HPB_DMAE_ASYNCMDR_ASMD25_SINGLE		BIT(9)	/* SDHI2 */
-+#define HPB_DMAE_ASYNCMDR_ASMD25_MULTI		0	/* SDHI2 */
-+#define HPB_DMAE_ASYNCMDR_ASBTMD25_MASK		BIT(8)	/* SDHI2 */
-+#define HPB_DMAE_ASYNCMDR_ASBTMD25_BURST	BIT(8)	/* SDHI2 */
-+#define HPB_DMAE_ASYNCMDR_ASBTMD25_NBURST	0	/* SDHI2 */
-+#define HPB_DMAE_ASYNCMDR_ASMD23_MASK		BIT(7)	/* SDHI0 */
-+#define HPB_DMAE_ASYNCMDR_ASMD23_SINGLE		BIT(7)	/* SDHI0 */
-+#define HPB_DMAE_ASYNCMDR_ASMD23_MULTI		0	/* SDHI0 */
-+#define HPB_DMAE_ASYNCMDR_ASBTMD23_MASK		BIT(6)	/* SDHI0 */
-+#define HPB_DMAE_ASYNCMDR_ASBTMD23_BURST	BIT(6)	/* SDHI0 */
-+#define HPB_DMAE_ASYNCMDR_ASBTMD23_NBURST	0	/* SDHI0 */
-+#define HPB_DMAE_ASYNCMDR_ASMD22_MASK		BIT(5)	/* SDHI0 */
-+#define HPB_DMAE_ASYNCMDR_ASMD22_SINGLE		BIT(5)	/* SDHI0 */
-+#define HPB_DMAE_ASYNCMDR_ASMD22_MULTI		0	/* SDHI0 */
-+#define HPB_DMAE_ASYNCMDR_ASBTMD22_MASK		BIT(4)	/* SDHI0 */
-+#define HPB_DMAE_ASYNCMDR_ASBTMD22_BURST	BIT(4)	/* SDHI0 */
-+#define HPB_DMAE_ASYNCMDR_ASBTMD22_NBURST	0	/* SDHI0 */
-+#define HPB_DMAE_ASYNCMDR_ASMD21_MASK		BIT(3)	/* SDHI0 */
-+#define HPB_DMAE_ASYNCMDR_ASMD21_SINGLE		BIT(3)	/* SDHI0 */
-+#define HPB_DMAE_ASYNCMDR_ASMD21_MULTI		0	/* SDHI0 */
-+#define HPB_DMAE_ASYNCMDR_ASBTMD21_MASK		BIT(2)	/* SDHI0 */
-+#define HPB_DMAE_ASYNCMDR_ASBTMD21_BURST	BIT(2)	/* SDHI0 */
-+#define HPB_DMAE_ASYNCMDR_ASBTMD21_NBURST	0	/* SDHI0 */
-+#define HPB_DMAE_ASYNCMDR_ASMD20_MASK		BIT(1)	/* SDHI1 */
-+#define HPB_DMAE_ASYNCMDR_ASMD20_SINGLE		BIT(1)	/* SDHI1 */
-+#define HPB_DMAE_ASYNCMDR_ASMD20_MULTI		0	/* SDHI1 */
-+#define HPB_DMAE_ASYNCMDR_ASBTMD20_MASK		BIT(0)	/* SDHI1 */
-+#define HPB_DMAE_ASYNCMDR_ASBTMD20_BURST	BIT(0)	/* SDHI1 */
-+#define HPB_DMAE_ASYNCMDR_ASBTMD20_NBURST	0	/* SDHI1 */
-+
-+static const struct hpb_dmae_slave_config hpb_dmae_slaves[] = {
-+	{
-+		.id	= HPBDMA_SLAVE_SDHI0_TX,
-+		.addr	= 0xffe4c000 + 0x30,
-+		.dcr	= HPB_DMAE_DCR_SPDS_16BIT |
-+			  HPB_DMAE_DCR_DMDL |
-+			  HPB_DMAE_DCR_DPDS_16BIT,
-+		.rstr	= HPB_DMAE_ASYNCRSTR_ASRST21 |
-+			  HPB_DMAE_ASYNCRSTR_ASRST22 |
-+			  HPB_DMAE_ASYNCRSTR_ASRST23,
-+		.mdr	= HPB_DMAE_ASYNCMDR_ASMD21_SINGLE |
-+			  HPB_DMAE_ASYNCMDR_ASBTMD21_NBURST,
-+		.mdm	= HPB_DMAE_ASYNCMDR_ASMD21_MASK |
-+			  HPB_DMAE_ASYNCMDR_ASBTMD21_MASK,
-+		.port	= 0x0D0C,
-+		.flags	= HPB_DMAE_SET_ASYNC_RESET | HPB_DMAE_SET_ASYNC_MODE,
-+		.dma_ch	= 21,
-+	}, {
-+		.id	= HPBDMA_SLAVE_SDHI0_RX,
-+		.addr	= 0xffe4c000 + 0x30,
-+		.dcr	= HPB_DMAE_DCR_SMDL |
-+			  HPB_DMAE_DCR_SPDS_16BIT |
-+			  HPB_DMAE_DCR_DPDS_16BIT,
-+		.rstr	= HPB_DMAE_ASYNCRSTR_ASRST21 |
-+			  HPB_DMAE_ASYNCRSTR_ASRST22 |
-+			  HPB_DMAE_ASYNCRSTR_ASRST23,
-+		.mdr	= HPB_DMAE_ASYNCMDR_ASMD22_SINGLE |
-+			  HPB_DMAE_ASYNCMDR_ASBTMD22_NBURST,
-+		.mdm	= HPB_DMAE_ASYNCMDR_ASMD22_MASK |
-+			  HPB_DMAE_ASYNCMDR_ASBTMD22_MASK,
-+		.port	= 0x0D0C,
-+		.flags	= HPB_DMAE_SET_ASYNC_RESET | HPB_DMAE_SET_ASYNC_MODE,
-+		.dma_ch	= 22,
-+	},
-+};
-+
-+static const struct hpb_dmae_channel hpb_dmae_channels[] = {
-+	HPB_DMAE_CHANNEL(0x93, HPBDMA_SLAVE_SDHI0_TX), /* ch. 21 */
-+	HPB_DMAE_CHANNEL(0x93, HPBDMA_SLAVE_SDHI0_RX), /* ch. 22 */
-+};
-+
-+static struct hpb_dmae_pdata dma_platform_data __initdata = {
-+	.slaves			= hpb_dmae_slaves,
-+	.num_slaves		= ARRAY_SIZE(hpb_dmae_slaves),
-+	.channels		= hpb_dmae_channels,
-+	.num_channels		= ARRAY_SIZE(hpb_dmae_channels),
-+	.ts_shift		= {
-+		[XMIT_SZ_8BIT]	= 0,
-+		[XMIT_SZ_16BIT]	= 1,
-+		[XMIT_SZ_32BIT]	= 2,
-+	},
-+	.num_hw_channels	= 44,
-+};
-+
-+static struct resource hpb_dmae_resources[] __initdata = {
-+	/* Channel registers */
-+	DEFINE_RES_MEM(0xffc08000, 0x1000),
-+	/* Common registers */
-+	DEFINE_RES_MEM(0xffc09000, 0x170),
-+	/* Asynchronous reset registers */
-+	DEFINE_RES_MEM(0xffc00300, 4),
-+	/* Asynchronous mode registers */
-+	DEFINE_RES_MEM(0xffc00400, 4),
-+	/* IRQ for DMA channels */
-+	DEFINE_RES_NAMED(gic_iid(0x8e), 12, NULL, IORESOURCE_IRQ),
-+};
-+
-+static void __init r8a7779_register_hpb_dmae(void)
-+{
-+	platform_device_register_resndata(&platform_bus, "hpb-dma-engine", -1,
-+					  hpb_dmae_resources,
-+					  ARRAY_SIZE(hpb_dmae_resources),
-+					  &dma_platform_data,
-+					  sizeof(dma_platform_data));
-+}
-+
- static struct platform_device *r8a7779_devices_dt[] __initdata = {
- 	&scif0_device,
- 	&scif1_device,
-@@ -665,6 +818,7 @@ void __init r8a7779_add_standard_devices(void)
- 			    ARRAY_SIZE(r8a7779_devices_dt));
- 	platform_add_devices(r8a7779_standard_devices,
- 			    ARRAY_SIZE(r8a7779_standard_devices));
-+	r8a7779_register_hpb_dmae();
- }
- 
- void __init r8a7779_add_ether_device(struct sh_eth_plat_data *pdata)
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0181-ARM-shmobile-Add-Koelsch-LED6-LED7-and-LED8-support.patch b/patches.renesas/0181-ARM-shmobile-Add-Koelsch-LED6-LED7-and-LED8-support.patch
deleted file mode 100644
index 5db811c71c7f6..0000000000000
--- a/patches.renesas/0181-ARM-shmobile-Add-Koelsch-LED6-LED7-and-LED8-support.patch
+++ /dev/null
@@ -1,69 +0,0 @@
-From 393689d6324c0bb85379975d9d2762a030bb78fd Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Tue, 8 Oct 2013 12:39:59 +0900
-Subject: ARM: shmobile: Add Koelsch LED6, LED7 and LED8 support
-
-Enable Koelsch LEDs for GPIO output testing purpose.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 87a2934ecff1e054b5d2b7cb6dea2ee0eb649ff3)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-koelsch.c | 27 +++++++++++++++++++++++++++
- 1 file changed, 27 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/board-koelsch.c b/arch/arm/mach-shmobile/board-koelsch.c
-index d099eaf49cf6..2299d658a843 100644
---- a/arch/arm/mach-shmobile/board-koelsch.c
-+++ b/arch/arm/mach-shmobile/board-koelsch.c
-@@ -20,6 +20,8 @@
-  */
- 
- #include <linux/kernel.h>
-+#include <linux/leds.h>
-+#include <linux/platform_data/gpio-rcar.h>
- #include <linux/platform_device.h>
- #include <mach/common.h>
- #include <mach/r8a7791.h>
-@@ -27,11 +29,36 @@
- #include <asm/mach-types.h>
- #include <asm/mach/arch.h>
- 
-+/* LEDS */
-+static struct gpio_led koelsch_leds[] = {
-+	{
-+		.name		= "led8",
-+		.gpio		= RCAR_GP_PIN(2, 21),
-+		.default_state	= LEDS_GPIO_DEFSTATE_ON,
-+	}, {
-+		.name		= "led7",
-+		.gpio		= RCAR_GP_PIN(2, 20),
-+		.default_state	= LEDS_GPIO_DEFSTATE_ON,
-+	}, {
-+		.name		= "led6",
-+		.gpio		= RCAR_GP_PIN(2, 19),
-+		.default_state	= LEDS_GPIO_DEFSTATE_ON,
-+	},
-+};
-+
-+static const struct gpio_led_platform_data koelsch_leds_pdata __initconst = {
-+	.leds		= koelsch_leds,
-+	.num_leds	= ARRAY_SIZE(koelsch_leds),
-+};
-+
- static void __init koelsch_add_standard_devices(void)
- {
- 	r8a7791_clock_init();
- 	r8a7791_pinmux_init();
- 	r8a7791_add_standard_devices();
-+	platform_device_register_data(&platform_bus, "leds-gpio", -1,
-+				      &koelsch_leds_pdata,
-+				      sizeof(koelsch_leds_pdata));
- }
- 
- static const char * const koelsch_boards_compat_dt[] __initconst = {
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0181-ARM-shmobile-r8a7790-Register-GPIO-devices.patch b/patches.renesas/0181-ARM-shmobile-r8a7790-Register-GPIO-devices.patch
deleted file mode 100644
index c5f10d5d87df5..0000000000000
--- a/patches.renesas/0181-ARM-shmobile-r8a7790-Register-GPIO-devices.patch
+++ /dev/null
@@ -1,77 +0,0 @@
-From 832ff8c4332d932cf0d9799e74cf084ca3884c65 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Mon, 8 Apr 2013 11:36:17 +0200
-Subject: ARM: shmobile: r8a7790: Register GPIO devices
-
-Move GPIOs handling from the PFC device to separate GPIO devices.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 43ca9cbb29e11181888159b9a6375b1720672b82)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-r8a7790.c | 35 +++++++++++++++++++++++++++++++++-
- 1 file changed, 34 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c
-index 49de2d56..eeef5f61 100644
---- a/arch/arm/mach-shmobile/setup-r8a7790.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7790.c
-@@ -23,6 +23,7 @@
- #include <linux/kernel.h>
- #include <linux/of_platform.h>
- #include <linux/serial_sci.h>
-+#include <linux/platform_data/gpio-rcar.h>
- #include <linux/platform_data/irq-renesas-irqc.h>
- #include <mach/common.h>
- #include <mach/irqs.h>
-@@ -31,13 +32,45 @@
- 
- static const struct resource pfc_resources[] = {
- 	DEFINE_RES_MEM(0xe6060000, 0x250),
--	DEFINE_RES_MEM(0xe6050000, 0x5050),
- };
- 
-+#define R8A7790_GPIO(idx)						\
-+static struct resource r8a7790_gpio##idx##_resources[] = {		\
-+	DEFINE_RES_MEM(0xe6050000 + 0x1000 * (idx), 0x50),		\
-+	DEFINE_RES_IRQ(gic_spi(4 + (idx))),				\
-+};									\
-+									\
-+static struct gpio_rcar_config r8a7790_gpio##idx##_platform_data = {	\
-+	.gpio_base	= 32 * (idx),					\
-+	.irq_base	= 0,						\
-+	.number_of_pins	= 32,						\
-+	.pctl_name	= "pfc-r8a7790",				\
-+};									\
-+
-+R8A7790_GPIO(0);
-+R8A7790_GPIO(1);
-+R8A7790_GPIO(2);
-+R8A7790_GPIO(3);
-+R8A7790_GPIO(4);
-+R8A7790_GPIO(5);
-+
-+#define r8a7790_register_gpio(idx)					\
-+	platform_device_register_resndata(&platform_bus, "gpio_rcar", idx, \
-+		r8a7790_gpio##idx##_resources,				\
-+		ARRAY_SIZE(r8a7790_gpio##idx##_resources),		\
-+		&r8a7790_gpio##idx##_platform_data,			\
-+		sizeof(r8a7790_gpio##idx##_platform_data))
-+
- void __init r8a7790_pinmux_init(void)
- {
- 	platform_device_register_simple("pfc-r8a7790", -1, pfc_resources,
- 					ARRAY_SIZE(pfc_resources));
-+	r8a7790_register_gpio(0);
-+	r8a7790_register_gpio(1);
-+	r8a7790_register_gpio(2);
-+	r8a7790_register_gpio(3);
-+	r8a7790_register_gpio(4);
-+	r8a7790_register_gpio(5);
- }
- 
- #define SCIF_COMMON(scif_type, baseaddr, irq)			\
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0181-ARM-shmobile-r8a7790-add-I2C-clocks-and-aliases-for-.patch b/patches.renesas/0181-ARM-shmobile-r8a7790-add-I2C-clocks-and-aliases-for-.patch
deleted file mode 100644
index f6afa93fafcaa..0000000000000
--- a/patches.renesas/0181-ARM-shmobile-r8a7790-add-I2C-clocks-and-aliases-for-.patch
+++ /dev/null
@@ -1,61 +0,0 @@
-From 5872d1d2939eaeede8ac4889d3ebd04577811fae Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Thu, 26 Sep 2013 19:20:57 +0200
-Subject: ARM: shmobile: r8a7790: add I2C clocks and aliases for the DT mode
-
-This patch adds clock definitions for the 4 I2C interfaces on r8a7790 and
-clock aliases, suitable for the DT mode.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 159600807c809bc3773867d3d2b7826063b20c42)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r8a7790.c | 10 ++++++++++
- 1 file changed, 10 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
-index d99b87bc76ea..7661e898f376 100644
---- a/arch/arm/mach-shmobile/clock-r8a7790.c
-+++ b/arch/arm/mach-shmobile/clock-r8a7790.c
-@@ -52,6 +52,7 @@
- #define SMSTPCR5 0xe6150144
- #define SMSTPCR7 0xe615014c
- #define SMSTPCR8 0xe6150990
-+#define SMSTPCR9 0xe6150994
- 
- #define SDCKCR		0xE6150074
- #define SD2CKCR		0xE6150078
-@@ -181,6 +182,7 @@ static struct clk div6_clks[DIV6_NR] = {
- 
- /* MSTP */
- enum {
-+	MSTP931, MSTP930, MSTP929, MSTP928,
- 	MSTP813,
- 	MSTP726, MSTP725, MSTP724, MSTP723, MSTP722, MSTP721, MSTP720,
- 	MSTP717, MSTP716,
-@@ -192,6 +194,10 @@ enum {
- };
- 
- static struct clk mstp_clks[MSTP_NR] = {
-+	[MSTP931] = SH_CLK_MSTP32(&hp_clk, SMSTPCR9, 31, 0), /* I2C0 */
-+	[MSTP930] = SH_CLK_MSTP32(&hp_clk, SMSTPCR9, 30, 0), /* I2C1 */
-+	[MSTP929] = SH_CLK_MSTP32(&hp_clk, SMSTPCR9, 29, 0), /* I2C2 */
-+	[MSTP928] = SH_CLK_MSTP32(&hp_clk, SMSTPCR9, 28, 0), /* I2C3 */
- 	[MSTP813] = SH_CLK_MSTP32(&p_clk, SMSTPCR8, 13, 0), /* Ether */
- 	[MSTP726] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 26, 0), /* LVDS0 */
- 	[MSTP725] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 25, 0), /* LVDS1 */
-@@ -271,6 +277,10 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP720]),
- 	CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP717]),
- 	CLKDEV_DEV_ID("sh-sci.9", &mstp_clks[MSTP716]),
-+	CLKDEV_DEV_ID("e6508000.i2c", &mstp_clks[MSTP931]),
-+	CLKDEV_DEV_ID("e6518000.i2c", &mstp_clks[MSTP930]),
-+	CLKDEV_DEV_ID("e6530000.i2c", &mstp_clks[MSTP929]),
-+	CLKDEV_DEV_ID("e6540000.i2c", &mstp_clks[MSTP928]),
- 	CLKDEV_DEV_ID("r8a7790-ether", &mstp_clks[MSTP813]),
- 	CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
- 	CLKDEV_DEV_ID("ee200000.mmcif", &mstp_clks[MSTP315]),
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0182-ARM-shmobile-Add-Koelsch-SW2-support.patch b/patches.renesas/0182-ARM-shmobile-Add-Koelsch-SW2-support.patch
deleted file mode 100644
index ee06d2556be86..0000000000000
--- a/patches.renesas/0182-ARM-shmobile-Add-Koelsch-SW2-support.patch
+++ /dev/null
@@ -1,66 +0,0 @@
-From 852b86057d2738bbc6ce5717f9b2204b88d8ae72 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Tue, 8 Oct 2013 12:40:08 +0900
-Subject: ARM: shmobile: Add Koelsch SW2 support
-
-Enable Koelsch GPIO switch for GPIO input and IRQ testing purpose.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 721319d1ab8bb854ad4befc3ac70b7401d2d7dab)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-koelsch.c | 22 ++++++++++++++++++++++
- 1 file changed, 22 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/board-koelsch.c b/arch/arm/mach-shmobile/board-koelsch.c
-index 2299d658a843..59fa0b975473 100644
---- a/arch/arm/mach-shmobile/board-koelsch.c
-+++ b/arch/arm/mach-shmobile/board-koelsch.c
-@@ -19,6 +19,9 @@
-  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
-  */
- 
-+#include <linux/gpio.h>
-+#include <linux/gpio_keys.h>
-+#include <linux/input.h>
- #include <linux/kernel.h>
- #include <linux/leds.h>
- #include <linux/platform_data/gpio-rcar.h>
-@@ -51,6 +54,22 @@ static const struct gpio_led_platform_data koelsch_leds_pdata __initconst = {
- 	.num_leds	= ARRAY_SIZE(koelsch_leds),
- };
- 
-+/* GPIO KEY */
-+#define GPIO_KEY(c, g, d, ...) \
-+	{ .code = c, .gpio = g, .desc = d, .active_low = 1 }
-+
-+static struct gpio_keys_button gpio_buttons[] = {
-+	GPIO_KEY(KEY_4,		RCAR_GP_PIN(5, 3),	"SW2-pin4"),
-+	GPIO_KEY(KEY_3,		RCAR_GP_PIN(5, 2),	"SW2-pin3"),
-+	GPIO_KEY(KEY_2,		RCAR_GP_PIN(5, 1),	"SW2-pin2"),
-+	GPIO_KEY(KEY_1,		RCAR_GP_PIN(5, 0),	"SW2-pin1"),
-+};
-+
-+static const struct gpio_keys_platform_data koelsch_keys_pdata __initconst = {
-+	.buttons	= gpio_buttons,
-+	.nbuttons	= ARRAY_SIZE(gpio_buttons),
-+};
-+
- static void __init koelsch_add_standard_devices(void)
- {
- 	r8a7791_clock_init();
-@@ -59,6 +78,9 @@ static void __init koelsch_add_standard_devices(void)
- 	platform_device_register_data(&platform_bus, "leds-gpio", -1,
- 				      &koelsch_leds_pdata,
- 				      sizeof(koelsch_leds_pdata));
-+	platform_device_register_data(&platform_bus, "gpio-keys", -1,
-+				      &koelsch_keys_pdata,
-+				      sizeof(koelsch_keys_pdata));
- }
- 
- static const char * const koelsch_boards_compat_dt[] __initconst = {
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0182-ARM-shmobile-r8a73a4-add-a-clock-alias-for-the-DMAC-.patch b/patches.renesas/0182-ARM-shmobile-r8a73a4-add-a-clock-alias-for-the-DMAC-.patch
deleted file mode 100644
index 0c5b72839c04c..0000000000000
--- a/patches.renesas/0182-ARM-shmobile-r8a73a4-add-a-clock-alias-for-the-DMAC-.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From 9714680781b5745a7c768897123fe4c3411f0c30 Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Thu, 26 Sep 2013 19:30:02 +0200
-Subject: ARM: shmobile: r8a73a4: add a clock alias for the DMAC in DT mode
-
-Devices, initialised from the Device Tree and from platform code usually
-have different names. This patch adds a clock alias for DMAC on r8a73a4
-in DT mode.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 8ceea7bd9757cb90f63f16b07a6d2a022e9c45d8)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r8a73a4.c | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a73a4.c b/arch/arm/mach-shmobile/clock-r8a73a4.c
-index e203fc88f9e6..571409b611d3 100644
---- a/arch/arm/mach-shmobile/clock-r8a73a4.c
-+++ b/arch/arm/mach-shmobile/clock-r8a73a4.c
-@@ -580,6 +580,7 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP216]),
- 	CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP217]),
- 	CLKDEV_DEV_ID("sh-dma-engine.0", &mstp_clks[MSTP218]),
-+	CLKDEV_DEV_ID("e6700020.dma-controller", &mstp_clks[MSTP218]),
- 	CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
- 	CLKDEV_DEV_ID("e6520000.i2c", &mstp_clks[MSTP300]),
- 	CLKDEV_DEV_ID("sh_mmcif.1", &mstp_clks[MSTP305]),
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0182-ARM-shmobile-r8a7790-Remove-all-GPIOs.patch b/patches.renesas/0182-ARM-shmobile-r8a7790-Remove-all-GPIOs.patch
deleted file mode 100644
index a40b6e84cc567..0000000000000
--- a/patches.renesas/0182-ARM-shmobile-r8a7790-Remove-all-GPIOs.patch
+++ /dev/null
@@ -1,413 +0,0 @@
-From ac7cd8d37c0b41df6d302815c65909b72ee95452 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Mon, 8 Apr 2013 11:36:21 +0200
-Subject: ARM: shmobile: r8a7790: Remove all GPIOs
-
-Function GPIOs are not used anymore, and all code use the GPIO numbers
-directly. Remove the GPIOs enumeration.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 3654520cfe98815296f9871da35297445bb8c515)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/include/mach/r8a7790.h | 383 --------------------------
- 1 file changed, 383 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/include/mach/r8a7790.h b/arch/arm/mach-shmobile/include/mach/r8a7790.h
-index e01ac4e3..2e919e61 100644
---- a/arch/arm/mach-shmobile/include/mach/r8a7790.h
-+++ b/arch/arm/mach-shmobile/include/mach/r8a7790.h
-@@ -1,389 +1,6 @@
- #ifndef __ASM_R8A7790_H__
- #define __ASM_R8A7790_H__
- 
--/* Pin Function Controller:
-- * GPIO_FN_xx - GPIO used to select pin function
-- * GPIO_GP_x_x - GPIO mapped to real I/O pin on CPU
-- */
--enum {
--	GPIO_GP_0_0, GPIO_GP_0_1, GPIO_GP_0_2, GPIO_GP_0_3,
--	GPIO_GP_0_4, GPIO_GP_0_5, GPIO_GP_0_6, GPIO_GP_0_7,
--	GPIO_GP_0_8, GPIO_GP_0_9, GPIO_GP_0_10, GPIO_GP_0_11,
--	GPIO_GP_0_12, GPIO_GP_0_13, GPIO_GP_0_14, GPIO_GP_0_15,
--	GPIO_GP_0_16, GPIO_GP_0_17, GPIO_GP_0_18, GPIO_GP_0_19,
--	GPIO_GP_0_20, GPIO_GP_0_21, GPIO_GP_0_22, GPIO_GP_0_23,
--	GPIO_GP_0_24, GPIO_GP_0_25, GPIO_GP_0_26, GPIO_GP_0_27,
--	GPIO_GP_0_28, GPIO_GP_0_29, GPIO_GP_0_30, GPIO_GP_0_31,
--
--	GPIO_GP_1_0, GPIO_GP_1_1, GPIO_GP_1_2, GPIO_GP_1_3,
--	GPIO_GP_1_4, GPIO_GP_1_5, GPIO_GP_1_6, GPIO_GP_1_7,
--	GPIO_GP_1_8, GPIO_GP_1_9, GPIO_GP_1_10, GPIO_GP_1_11,
--	GPIO_GP_1_12, GPIO_GP_1_13, GPIO_GP_1_14, GPIO_GP_1_15,
--	GPIO_GP_1_16, GPIO_GP_1_17, GPIO_GP_1_18, GPIO_GP_1_19,
--	GPIO_GP_1_20, GPIO_GP_1_21, GPIO_GP_1_22, GPIO_GP_1_23,
--	GPIO_GP_1_24, GPIO_GP_1_25, GPIO_GP_1_26, GPIO_GP_1_27,
--	GPIO_GP_1_28, GPIO_GP_1_29,
--
--	GPIO_GP_2_0, GPIO_GP_2_1, GPIO_GP_2_2, GPIO_GP_2_3,
--	GPIO_GP_2_4, GPIO_GP_2_5, GPIO_GP_2_6, GPIO_GP_2_7,
--	GPIO_GP_2_8, GPIO_GP_2_9, GPIO_GP_2_10, GPIO_GP_2_11,
--	GPIO_GP_2_12, GPIO_GP_2_13, GPIO_GP_2_14, GPIO_GP_2_15,
--	GPIO_GP_2_16, GPIO_GP_2_17, GPIO_GP_2_18, GPIO_GP_2_19,
--	GPIO_GP_2_20, GPIO_GP_2_21, GPIO_GP_2_22, GPIO_GP_2_23,
--	GPIO_GP_2_24, GPIO_GP_2_25, GPIO_GP_2_26, GPIO_GP_2_27,
--	GPIO_GP_2_28, GPIO_GP_2_29,
--
--	GPIO_GP_3_0, GPIO_GP_3_1, GPIO_GP_3_2, GPIO_GP_3_3,
--	GPIO_GP_3_4, GPIO_GP_3_5, GPIO_GP_3_6, GPIO_GP_3_7,
--	GPIO_GP_3_8, GPIO_GP_3_9, GPIO_GP_3_10, GPIO_GP_3_11,
--	GPIO_GP_3_12, GPIO_GP_3_13, GPIO_GP_3_14, GPIO_GP_3_15,
--	GPIO_GP_3_16, GPIO_GP_3_17, GPIO_GP_3_18, GPIO_GP_3_19,
--	GPIO_GP_3_20, GPIO_GP_3_21, GPIO_GP_3_22, GPIO_GP_3_23,
--	GPIO_GP_3_24, GPIO_GP_3_25, GPIO_GP_3_26, GPIO_GP_3_27,
--	GPIO_GP_3_28, GPIO_GP_3_29, GPIO_GP_3_30, GPIO_GP_3_31,
--
--	GPIO_GP_4_0, GPIO_GP_4_1, GPIO_GP_4_2, GPIO_GP_4_3,
--	GPIO_GP_4_4, GPIO_GP_4_5, GPIO_GP_4_6, GPIO_GP_4_7,
--	GPIO_GP_4_8, GPIO_GP_4_9, GPIO_GP_4_10, GPIO_GP_4_11,
--	GPIO_GP_4_12, GPIO_GP_4_13, GPIO_GP_4_14, GPIO_GP_4_15,
--	GPIO_GP_4_16, GPIO_GP_4_17, GPIO_GP_4_18, GPIO_GP_4_19,
--	GPIO_GP_4_20, GPIO_GP_4_21, GPIO_GP_4_22, GPIO_GP_4_23,
--	GPIO_GP_4_24, GPIO_GP_4_25, GPIO_GP_4_26, GPIO_GP_4_27,
--	GPIO_GP_4_28, GPIO_GP_4_29, GPIO_GP_4_30, GPIO_GP_4_31,
--
--	GPIO_GP_5_0, GPIO_GP_5_1, GPIO_GP_5_2, GPIO_GP_5_3,
--	GPIO_GP_5_4, GPIO_GP_5_5, GPIO_GP_5_6, GPIO_GP_5_7,
--	GPIO_GP_5_8, GPIO_GP_5_9, GPIO_GP_5_10, GPIO_GP_5_11,
--	GPIO_GP_5_12, GPIO_GP_5_13, GPIO_GP_5_14, GPIO_GP_5_15,
--	GPIO_GP_5_16, GPIO_GP_5_17, GPIO_GP_5_18, GPIO_GP_5_19,
--	GPIO_GP_5_20, GPIO_GP_5_21, GPIO_GP_5_22, GPIO_GP_5_23,
--	GPIO_GP_5_24, GPIO_GP_5_25, GPIO_GP_5_26, GPIO_GP_5_27,
--	GPIO_GP_5_28, GPIO_GP_5_29, GPIO_GP_5_30, GPIO_GP_5_31,
--
--	GPIO_FN_VI1_DATA7_VI1_B7, GPIO_FN_USB0_PWEN, GPIO_FN_USB0_OVC_VBUS,
--	GPIO_FN_USB2_PWEN, GPIO_FN_USB2_OVC, GPIO_FN_AVS1, GPIO_FN_AVS2,
--	GPIO_FN_DU_DOTCLKIN0, GPIO_FN_DU_DOTCLKIN2,
--
--	/* IPSR0 */
--	GPIO_FN_D1, GPIO_FN_MSIOF3_SYNC_B, GPIO_FN_VI3_DATA1, GPIO_FN_VI0_G5,
--	GPIO_FN_VI0_G5_B, GPIO_FN_D2, GPIO_FN_MSIOF3_RXD_B, GPIO_FN_VI3_DATA2,
--	GPIO_FN_VI0_G6, GPIO_FN_VI0_G6_B, GPIO_FN_D3, GPIO_FN_MSIOF3_TXD_B,
--	GPIO_FN_VI3_DATA3, GPIO_FN_VI0_G7, GPIO_FN_VI0_G7_B, GPIO_FN_D4,
--	GPIO_FN_SCIFB1_RXD_F, GPIO_FN_SCIFB0_RXD_C, GPIO_FN_VI3_DATA4,
--	GPIO_FN_VI0_R0, GPIO_FN_VI0_R0_B, GPIO_FN_RX0_B, GPIO_FN_D5,
--	GPIO_FN_SCIFB1_TXD_F, GPIO_FN_SCIFB0_TXD_C, GPIO_FN_VI3_DATA5,
--	GPIO_FN_VI0_R1, GPIO_FN_VI0_R1_B, GPIO_FN_TX0_B, GPIO_FN_D6,
--	GPIO_FN_SCL2_C, GPIO_FN_VI3_DATA6, GPIO_FN_VI0_R2, GPIO_FN_VI0_R2_B,
--	GPIO_FN_SCL2_CIS_C, GPIO_FN_D7, GPIO_FN_AD_DI_B, GPIO_FN_SDA2_C,
--	GPIO_FN_VI3_DATA7, GPIO_FN_VI0_R3, GPIO_FN_VI0_R3_B, GPIO_FN_SDA2_CIS_C,
--	GPIO_FN_D8, GPIO_FN_SCIFA1_SCK_C, GPIO_FN_AVB_TXD0, GPIO_FN_MII_TXD0,
--	GPIO_FN_VI0_G0, GPIO_FN_VI0_G0_B, GPIO_FN_VI2_DATA0_VI2_B0,
--
--	/* IPSR1 */
--	GPIO_FN_D9, GPIO_FN_SCIFA1_RXD_C, GPIO_FN_AVB_TXD1, GPIO_FN_MII_TXD1,
--	GPIO_FN_VI0_G1, GPIO_FN_VI0_G1_B, GPIO_FN_VI2_DATA1_VI2_B1, GPIO_FN_D10,
--	GPIO_FN_SCIFA1_TXD_C, GPIO_FN_AVB_TXD2, GPIO_FN_MII_TXD2,
--	GPIO_FN_VI0_G2, GPIO_FN_VI0_G2_B, GPIO_FN_VI2_DATA2_VI2_B2, GPIO_FN_D11,
--	GPIO_FN_SCIFA1_CTS_N_C, GPIO_FN_AVB_TXD3, GPIO_FN_MII_TXD3,
--	GPIO_FN_VI0_G3, GPIO_FN_VI0_G3_B, GPIO_FN_VI2_DATA3_VI2_B3,
--	GPIO_FN_D12, GPIO_FN_SCIFA1_RTS_N_C, GPIO_FN_AVB_TXD4,
--	GPIO_FN_VI0_HSYNC_N, GPIO_FN_VI0_HSYNC_N_B, GPIO_FN_VI2_DATA4_VI2_B4,
--	GPIO_FN_D13, GPIO_FN_AVB_TXD5, GPIO_FN_VI0_VSYNC_N,
--	GPIO_FN_VI0_VSYNC_N_B, GPIO_FN_VI2_DATA5_VI2_B5, GPIO_FN_D14,
--	GPIO_FN_SCIFB1_RXD_C, GPIO_FN_AVB_TXD6, GPIO_FN_RX1_B,
--	GPIO_FN_VI0_CLKENB, GPIO_FN_VI0_CLKENB_B, GPIO_FN_VI2_DATA6_VI2_B6,
--	GPIO_FN_D15, GPIO_FN_SCIFB1_TXD_C, GPIO_FN_AVB_TXD7, GPIO_FN_TX1_B,
--	GPIO_FN_VI0_FIELD, GPIO_FN_VI0_FIELD_B, GPIO_FN_VI2_DATA7_VI2_B7,
--	GPIO_FN_A0, GPIO_FN_PWM3, GPIO_FN_A1, GPIO_FN_PWM4,
--
--	/* IPSR2 */
--	GPIO_FN_A2, GPIO_FN_PWM5, GPIO_FN_MSIOF1_SS1_B, GPIO_FN_A3,
--	GPIO_FN_PWM6, GPIO_FN_MSIOF1_SS2_B, GPIO_FN_A4, GPIO_FN_MSIOF1_TXD_B,
--	GPIO_FN_TPU0TO0, GPIO_FN_A5, GPIO_FN_SCIFA1_TXD_B, GPIO_FN_TPU0TO1,
--	GPIO_FN_A6, GPIO_FN_SCIFA1_RTS_N_B, GPIO_FN_TPU0TO2, GPIO_FN_A7,
--	GPIO_FN_SCIFA1_SCK_B, GPIO_FN_AUDIO_CLKOUT_B, GPIO_FN_TPU0TO3,
--	GPIO_FN_A8, GPIO_FN_SCIFA1_RXD_B, GPIO_FN_SSI_SCK5_B, GPIO_FN_VI0_R4,
--	GPIO_FN_VI0_R4_B, GPIO_FN_SCIFB2_RXD_C, GPIO_FN_VI2_DATA0_VI2_B0_B,
--	GPIO_FN_A9, GPIO_FN_SCIFA1_CTS_N_B, GPIO_FN_SSI_WS5_B, GPIO_FN_VI0_R5,
--	GPIO_FN_VI0_R5_B, GPIO_FN_SCIFB2_TXD_C, GPIO_FN_VI2_DATA1_VI2_B1_B,
--	GPIO_FN_A10, GPIO_FN_SSI_SDATA5_B, GPIO_FN_MSIOF2_SYNC, GPIO_FN_VI0_R6,
--	GPIO_FN_VI0_R6_B, GPIO_FN_VI2_DATA2_VI2_B2_B,
--
--	/* IPSR3 */
--	GPIO_FN_A11, GPIO_FN_SCIFB2_CTS_N_B, GPIO_FN_MSIOF2_SCK, GPIO_FN_VI1_R0,
--	GPIO_FN_VI1_R0_B, GPIO_FN_VI2_G0, GPIO_FN_VI2_DATA3_VI2_B3_B,
--	GPIO_FN_A12, GPIO_FN_SCIFB2_RXD_B, GPIO_FN_MSIOF2_TXD, GPIO_FN_VI1_R1,
--	GPIO_FN_VI1_R1_B, GPIO_FN_VI2_G1, GPIO_FN_VI2_DATA4_VI2_B4_B,
--	GPIO_FN_A13, GPIO_FN_SCIFB2_RTS_N_B, GPIO_FN_EX_WAIT2,
--	GPIO_FN_MSIOF2_RXD, GPIO_FN_VI1_R2, GPIO_FN_VI1_R2_B, GPIO_FN_VI2_G2,
--	GPIO_FN_VI2_DATA5_VI2_B5_B, GPIO_FN_A14, GPIO_FN_SCIFB2_TXD_B,
--	GPIO_FN_ATACS11_N, GPIO_FN_MSIOF2_SS1, GPIO_FN_A15,
--	GPIO_FN_SCIFB2_SCK_B, GPIO_FN_ATARD1_N, GPIO_FN_MSIOF2_SS2, GPIO_FN_A16,
--	GPIO_FN_ATAWR1_N, GPIO_FN_A17, GPIO_FN_AD_DO_B, GPIO_FN_ATADIR1_N,
--	GPIO_FN_A18, GPIO_FN_AD_CLK_B, GPIO_FN_ATAG1_N, GPIO_FN_A19,
--	GPIO_FN_AD_NCS_N_B, GPIO_FN_ATACS01_N, GPIO_FN_EX_WAIT0_B, GPIO_FN_A20,
--	GPIO_FN_SPCLK, GPIO_FN_VI1_R3, GPIO_FN_VI1_R3_B, GPIO_FN_VI2_G4,
--
--	/* IPSR4 */
--	GPIO_FN_A21, GPIO_FN_MOSI_IO0, GPIO_FN_VI1_R4, GPIO_FN_VI1_R4_B,
--	GPIO_FN_VI2_G5, GPIO_FN_A22, GPIO_FN_MISO_IO1, GPIO_FN_VI1_R5,
--	GPIO_FN_VI1_R5_B, GPIO_FN_VI2_G6, GPIO_FN_A23, GPIO_FN_IO2,
--	GPIO_FN_VI1_G7, GPIO_FN_VI1_G7_B, GPIO_FN_VI2_G7, GPIO_FN_A24,
--	GPIO_FN_IO3, GPIO_FN_VI1_R7, GPIO_FN_VI1_R7_B, GPIO_FN_VI2_CLKENB,
--	GPIO_FN_VI2_CLKENB_B, GPIO_FN_A25, GPIO_FN_SSL, GPIO_FN_VI1_G6,
--	GPIO_FN_VI1_G6_B, GPIO_FN_VI2_FIELD, GPIO_FN_VI2_FIELD_B, GPIO_FN_CS0_N,
--	GPIO_FN_VI1_R6, GPIO_FN_VI1_R6_B, GPIO_FN_VI2_G3, GPIO_FN_MSIOF0_SS2_B,
--	GPIO_FN_CS1_N_A26, GPIO_FN_SPEEDIN, GPIO_FN_VI0_R7, GPIO_FN_VI0_R7_B,
--	GPIO_FN_VI2_CLK, GPIO_FN_VI2_CLK_B, GPIO_FN_EX_CS0_N, GPIO_FN_HRX1_B,
--	GPIO_FN_VI1_G5, GPIO_FN_VI1_G5_B, GPIO_FN_VI2_R0, GPIO_FN_HTX0_B,
--	GPIO_FN_MSIOF0_SS1_B, GPIO_FN_EX_CS1_N, GPIO_FN_GPS_CLK,
--	GPIO_FN_HCTS1_N_B, GPIO_FN_VI1_FIELD, GPIO_FN_VI1_FIELD_B,
--	GPIO_FN_VI2_R1, GPIO_FN_EX_CS2_N, GPIO_FN_GPS_SIGN, GPIO_FN_HRTS1_N_B,
--	GPIO_FN_VI3_CLKENB, GPIO_FN_VI1_G0, GPIO_FN_VI1_G0_B, GPIO_FN_VI2_R2,
--
--	/* IPSR5 */
--	GPIO_FN_EX_CS3_N, GPIO_FN_GPS_MAG, GPIO_FN_VI3_FIELD, GPIO_FN_VI1_G1,
--	GPIO_FN_VI1_G1_B, GPIO_FN_VI2_R3, GPIO_FN_EX_CS4_N,
--	GPIO_FN_MSIOF1_SCK_B, GPIO_FN_VI3_HSYNC_N,
--	GPIO_FN_VI2_HSYNC_N, GPIO_FN_SCL1, GPIO_FN_VI2_HSYNC_N_B,
--	GPIO_FN_INTC_EN0_N, GPIO_FN_SCL1_CIS, GPIO_FN_EX_CS5_N, GPIO_FN_CAN0_RX,
--	GPIO_FN_MSIOF1_RXD_B, GPIO_FN_VI3_VSYNC_N, GPIO_FN_VI1_G2,
--	GPIO_FN_VI1_G2_B, GPIO_FN_VI2_R4, GPIO_FN_SDA1, GPIO_FN_INTC_EN1_N,
--	GPIO_FN_SDA1_CIS, GPIO_FN_BS_N, GPIO_FN_IETX, GPIO_FN_HTX1_B,
--	GPIO_FN_CAN1_TX, GPIO_FN_DRACK0, GPIO_FN_IETX_C, GPIO_FN_RD_N,
--	GPIO_FN_CAN0_TX, GPIO_FN_SCIFA0_SCK_B, GPIO_FN_RD_WR_N, GPIO_FN_VI1_G3,
--	GPIO_FN_VI1_G3_B, GPIO_FN_VI2_R5, GPIO_FN_SCIFA0_RXD_B,
--	GPIO_FN_INTC_IRQ4_N, GPIO_FN_WE0_N, GPIO_FN_IECLK, GPIO_FN_CAN_CLK,
--	GPIO_FN_VI2_VSYNC_N, GPIO_FN_SCIFA0_TXD_B, GPIO_FN_VI2_VSYNC_N_B,
--	GPIO_FN_WE1_N, GPIO_FN_IERX, GPIO_FN_CAN1_RX, GPIO_FN_VI1_G4,
--	GPIO_FN_VI1_G4_B, GPIO_FN_VI2_R6, GPIO_FN_SCIFA0_CTS_N_B,
--	GPIO_FN_IERX_C, GPIO_FN_EX_WAIT0, GPIO_FN_IRQ3, GPIO_FN_INTC_IRQ3_N,
--	GPIO_FN_VI3_CLK, GPIO_FN_SCIFA0_RTS_N_B, GPIO_FN_HRX0_B,
--	GPIO_FN_MSIOF0_SCK_B, GPIO_FN_DREQ0_N, GPIO_FN_VI1_HSYNC_N,
--	GPIO_FN_VI1_HSYNC_N_B, GPIO_FN_VI2_R7, GPIO_FN_SSI_SCK78_C,
--	GPIO_FN_SSI_WS78_B,
--
--	/* IPSR6 */
--	GPIO_FN_DACK0, GPIO_FN_IRQ0, GPIO_FN_INTC_IRQ0_N, GPIO_FN_SSI_SCK6_B,
--	GPIO_FN_VI1_VSYNC_N, GPIO_FN_VI1_VSYNC_N_B, GPIO_FN_SSI_WS78_C,
--	GPIO_FN_DREQ1_N, GPIO_FN_VI1_CLKENB, GPIO_FN_VI1_CLKENB_B,
--	GPIO_FN_SSI_SDATA7_C, GPIO_FN_SSI_SCK78_B, GPIO_FN_DACK1, GPIO_FN_IRQ1,
--	GPIO_FN_INTC_IRQ1_N, GPIO_FN_SSI_WS6_B, GPIO_FN_SSI_SDATA8_C,
--	GPIO_FN_DREQ2_N, GPIO_FN_HSCK1_B, GPIO_FN_HCTS0_N_B,
--	GPIO_FN_MSIOF0_TXD_B, GPIO_FN_DACK2, GPIO_FN_IRQ2, GPIO_FN_INTC_IRQ2_N,
--	GPIO_FN_SSI_SDATA6_B, GPIO_FN_HRTS0_N_B, GPIO_FN_MSIOF0_RXD_B,
--	GPIO_FN_ETH_CRS_DV, GPIO_FN_RMII_CRS_DV, GPIO_FN_STP_ISCLK_0_B,
--	GPIO_FN_TS_SDEN0_D, GPIO_FN_GLO_Q0_C, GPIO_FN_SCL2_E,
--	GPIO_FN_SCL2_CIS_E, GPIO_FN_ETH_RX_ER, GPIO_FN_RMII_RX_ER,
--	GPIO_FN_STP_ISD_0_B, GPIO_FN_TS_SPSYNC0_D, GPIO_FN_GLO_Q1_C,
--	GPIO_FN_SDA2_E, GPIO_FN_SDA2_CIS_E, GPIO_FN_ETH_RXD0, GPIO_FN_RMII_RXD0,
--	GPIO_FN_STP_ISEN_0_B, GPIO_FN_TS_SDAT0_D, GPIO_FN_GLO_I0_C,
--	GPIO_FN_SCIFB1_SCK_G, GPIO_FN_SCK1_E, GPIO_FN_ETH_RXD1,
--	GPIO_FN_RMII_RXD1, GPIO_FN_HRX0_E, GPIO_FN_STP_ISSYNC_0_B,
--	GPIO_FN_TS_SCK0_D, GPIO_FN_GLO_I1_C, GPIO_FN_SCIFB1_RXD_G,
--	GPIO_FN_RX1_E, GPIO_FN_ETH_LINK, GPIO_FN_RMII_LINK, GPIO_FN_HTX0_E,
--	GPIO_FN_STP_IVCXO27_0_B, GPIO_FN_SCIFB1_TXD_G, GPIO_FN_TX1_E,
--	GPIO_FN_ETH_REF_CLK, GPIO_FN_RMII_REF_CLK, GPIO_FN_HCTS0_N_E,
--	GPIO_FN_STP_IVCXO27_1_B, GPIO_FN_HRX0_F,
--
--	/* IPSR7 */
--	GPIO_FN_ETH_MDIO, GPIO_FN_RMII_MDIO, GPIO_FN_HRTS0_N_E,
--	GPIO_FN_SIM0_D_C, GPIO_FN_HCTS0_N_F, GPIO_FN_ETH_TXD1,
--	GPIO_FN_RMII_TXD1, GPIO_FN_HTX0_F, GPIO_FN_BPFCLK_G, GPIO_FN_RDS_CLK_F,
--	GPIO_FN_ETH_TX_EN, GPIO_FN_RMII_TX_EN, GPIO_FN_SIM0_CLK_C,
--	GPIO_FN_HRTS0_N_F, GPIO_FN_ETH_MAGIC, GPIO_FN_RMII_MAGIC,
--	GPIO_FN_SIM0_RST_C, GPIO_FN_ETH_TXD0, GPIO_FN_RMII_TXD0,
--	GPIO_FN_STP_ISCLK_1_B, GPIO_FN_TS_SDEN1_C, GPIO_FN_GLO_SCLK_C,
--	GPIO_FN_ETH_MDC, GPIO_FN_RMII_MDC, GPIO_FN_STP_ISD_1_B,
--	GPIO_FN_TS_SPSYNC1_C, GPIO_FN_GLO_SDATA_C, GPIO_FN_PWM0,
--	GPIO_FN_SCIFA2_SCK_C, GPIO_FN_STP_ISEN_1_B, GPIO_FN_TS_SDAT1_C,
--	GPIO_FN_GLO_SS_C, GPIO_FN_PWM1, GPIO_FN_SCIFA2_TXD_C,
--	GPIO_FN_STP_ISSYNC_1_B, GPIO_FN_TS_SCK1_C, GPIO_FN_GLO_RFON_C,
--	GPIO_FN_PCMOE_N, GPIO_FN_PWM2, GPIO_FN_PWMFSW0, GPIO_FN_SCIFA2_RXD_C,
--	GPIO_FN_PCMWE_N, GPIO_FN_IECLK_C, GPIO_FN_DU1_DOTCLKIN,
--	GPIO_FN_AUDIO_CLKC, GPIO_FN_AUDIO_CLKOUT_C, GPIO_FN_VI0_CLK,
--	GPIO_FN_ATACS00_N, GPIO_FN_AVB_RXD1, GPIO_FN_MII_RXD1,
--	GPIO_FN_VI0_DATA0_VI0_B0, GPIO_FN_ATACS10_N, GPIO_FN_AVB_RXD2,
--	GPIO_FN_MII_RXD2,
--
--	/* IPSR8 */
--	GPIO_FN_VI0_DATA1_VI0_B1, GPIO_FN_ATARD0_N, GPIO_FN_AVB_RXD3,
--	GPIO_FN_MII_RXD3, GPIO_FN_VI0_DATA2_VI0_B2, GPIO_FN_ATAWR0_N,
--	GPIO_FN_AVB_RXD4, GPIO_FN_VI0_DATA3_VI0_B3, GPIO_FN_ATADIR0_N,
--	GPIO_FN_AVB_RXD5, GPIO_FN_VI0_DATA4_VI0_B4, GPIO_FN_ATAG0_N,
--	GPIO_FN_AVB_RXD6, GPIO_FN_VI0_DATA5_VI0_B5, GPIO_FN_EX_WAIT1,
--	GPIO_FN_AVB_RXD7, GPIO_FN_VI0_DATA6_VI0_B6, GPIO_FN_AVB_RX_ER,
--	GPIO_FN_MII_RX_ER, GPIO_FN_VI0_DATA7_VI0_B7, GPIO_FN_AVB_RX_CLK,
--	GPIO_FN_MII_RX_CLK, GPIO_FN_VI1_CLK, GPIO_FN_AVB_RX_DV,
--	GPIO_FN_MII_RX_DV, GPIO_FN_VI1_DATA0_VI1_B0, GPIO_FN_SCIFA1_SCK_D,
--	GPIO_FN_AVB_CRS, GPIO_FN_MII_CRS, GPIO_FN_VI1_DATA1_VI1_B1,
--	GPIO_FN_SCIFA1_RXD_D, GPIO_FN_AVB_MDC, GPIO_FN_MII_MDC,
--	GPIO_FN_VI1_DATA2_VI1_B2, GPIO_FN_SCIFA1_TXD_D, GPIO_FN_AVB_MDIO,
--	GPIO_FN_MII_MDIO, GPIO_FN_VI1_DATA3_VI1_B3, GPIO_FN_SCIFA1_CTS_N_D,
--	GPIO_FN_AVB_GTX_CLK, GPIO_FN_VI1_DATA4_VI1_B4, GPIO_FN_SCIFA1_RTS_N_D,
--	GPIO_FN_AVB_MAGIC, GPIO_FN_MII_MAGIC, GPIO_FN_VI1_DATA5_VI1_B5,
--	GPIO_FN_AVB_PHY_INT, GPIO_FN_VI1_DATA6_VI1_B6, GPIO_FN_AVB_GTXREFCLK,
--	GPIO_FN_SD0_CLK, GPIO_FN_VI1_DATA0_VI1_B0_B, GPIO_FN_SD0_CMD,
--	GPIO_FN_SCIFB1_SCK_B, GPIO_FN_VI1_DATA1_VI1_B1_B,
--
--	/* IPSR9 */
--	GPIO_FN_SD0_DAT0, GPIO_FN_SCIFB1_RXD_B, GPIO_FN_VI1_DATA2_VI1_B2_B,
--	GPIO_FN_SD0_DAT1, GPIO_FN_SCIFB1_TXD_B, GPIO_FN_VI1_DATA3_VI1_B3_B,
--	GPIO_FN_SD0_DAT2, GPIO_FN_SCIFB1_CTS_N_B, GPIO_FN_VI1_DATA4_VI1_B4_B,
--	GPIO_FN_SD0_DAT3, GPIO_FN_SCIFB1_RTS_N_B, GPIO_FN_VI1_DATA5_VI1_B5_B,
--	GPIO_FN_SD0_CD, GPIO_FN_MMC0_D6, GPIO_FN_TS_SDEN0_B, GPIO_FN_USB0_EXTP,
--	GPIO_FN_GLO_SCLK, GPIO_FN_VI1_DATA6_VI1_B6_B, GPIO_FN_SCL1_B,
--	GPIO_FN_SCL1_CIS_B, GPIO_FN_VI2_DATA6_VI2_B6_B, GPIO_FN_SD0_WP,
--	GPIO_FN_MMC0_D7, GPIO_FN_TS_SPSYNC0_B, GPIO_FN_USB0_IDIN,
--	GPIO_FN_GLO_SDATA, GPIO_FN_VI1_DATA7_VI1_B7_B, GPIO_FN_SDA1_B,
--	GPIO_FN_SDA1_CIS_B, GPIO_FN_VI2_DATA7_VI2_B7_B, GPIO_FN_SD1_CLK,
--	GPIO_FN_AVB_TX_EN, GPIO_FN_MII_TX_EN, GPIO_FN_SD1_CMD,
--	GPIO_FN_AVB_TX_ER, GPIO_FN_MII_TX_ER, GPIO_FN_SCIFB0_SCK_B,
--	GPIO_FN_SD1_DAT0, GPIO_FN_AVB_TX_CLK, GPIO_FN_MII_TX_CLK,
--	GPIO_FN_SCIFB0_RXD_B, GPIO_FN_SD1_DAT1, GPIO_FN_AVB_LINK,
--	GPIO_FN_MII_LINK, GPIO_FN_SCIFB0_TXD_B, GPIO_FN_SD1_DAT2,
--	GPIO_FN_AVB_COL, GPIO_FN_MII_COL, GPIO_FN_SCIFB0_CTS_N_B,
--	GPIO_FN_SD1_DAT3, GPIO_FN_AVB_RXD0, GPIO_FN_MII_RXD0,
--	GPIO_FN_SCIFB0_RTS_N_B, GPIO_FN_SD1_CD, GPIO_FN_MMC1_D6,
--	GPIO_FN_TS_SDEN1, GPIO_FN_USB1_EXTP, GPIO_FN_GLO_SS, GPIO_FN_VI0_CLK_B,
--	GPIO_FN_SCL2_D, GPIO_FN_SCL2_CIS_D, GPIO_FN_SIM0_CLK_B,
--	GPIO_FN_VI3_CLK_B,
--
--	/* IPSR10 */
--	GPIO_FN_SD1_WP, GPIO_FN_MMC1_D7, GPIO_FN_TS_SPSYNC1, GPIO_FN_USB1_IDIN,
--	GPIO_FN_GLO_RFON, GPIO_FN_VI1_CLK_B, GPIO_FN_SDA2_D, GPIO_FN_SDA2_CIS_D,
--	GPIO_FN_SIM0_D_B, GPIO_FN_SD2_CLK, GPIO_FN_MMC0_CLK, GPIO_FN_SIM0_CLK,
--	GPIO_FN_VI0_DATA0_VI0_B0_B, GPIO_FN_TS_SDEN0_C, GPIO_FN_GLO_SCLK_B,
--	GPIO_FN_VI3_DATA0_B, GPIO_FN_SD2_CMD, GPIO_FN_MMC0_CMD, GPIO_FN_SIM0_D,
--	GPIO_FN_VI0_DATA1_VI0_B1_B, GPIO_FN_SCIFB1_SCK_E, GPIO_FN_SCK1_D,
--	GPIO_FN_TS_SPSYNC0_C, GPIO_FN_GLO_SDATA_B, GPIO_FN_VI3_DATA1_B,
--	GPIO_FN_SD2_DAT0, GPIO_FN_MMC0_D0, GPIO_FN_FMCLK_B,
--	GPIO_FN_VI0_DATA2_VI0_B2_B, GPIO_FN_SCIFB1_RXD_E, GPIO_FN_RX1_D,
--	GPIO_FN_TS_SDAT0_C, GPIO_FN_GLO_SS_B, GPIO_FN_VI3_DATA2_B,
--	GPIO_FN_SD2_DAT1, GPIO_FN_MMC0_D1, GPIO_FN_FMIN_B, GPIO_FN_RDS_DATA,
--	GPIO_FN_VI0_DATA3_VI0_B3_B, GPIO_FN_SCIFB1_TXD_E, GPIO_FN_TX1_D,
--	GPIO_FN_TS_SCK0_C, GPIO_FN_GLO_RFON_B, GPIO_FN_VI3_DATA3_B,
--	GPIO_FN_SD2_DAT2, GPIO_FN_MMC0_D2, GPIO_FN_BPFCLK_B, GPIO_FN_RDS_CLK,
--	GPIO_FN_VI0_DATA4_VI0_B4_B, GPIO_FN_HRX0_D, GPIO_FN_TS_SDEN1_B,
--	GPIO_FN_GLO_Q0_B, GPIO_FN_VI3_DATA4_B, GPIO_FN_SD2_DAT3,
--	GPIO_FN_MMC0_D3, GPIO_FN_SIM0_RST, GPIO_FN_VI0_DATA5_VI0_B5_B,
--	GPIO_FN_HTX0_D, GPIO_FN_TS_SPSYNC1_B, GPIO_FN_GLO_Q1_B,
--	GPIO_FN_VI3_DATA5_B, GPIO_FN_SD2_CD, GPIO_FN_MMC0_D4,
--	GPIO_FN_TS_SDAT0_B, GPIO_FN_USB2_EXTP, GPIO_FN_GLO_I0,
--	GPIO_FN_VI0_DATA6_VI0_B6_B, GPIO_FN_HCTS0_N_D, GPIO_FN_TS_SDAT1_B,
--	GPIO_FN_GLO_I0_B, GPIO_FN_VI3_DATA6_B,
--
--	/* IPSR11 */
--	GPIO_FN_SD2_WP, GPIO_FN_MMC0_D5, GPIO_FN_TS_SCK0_B, GPIO_FN_USB2_IDIN,
--	GPIO_FN_GLO_I1, GPIO_FN_VI0_DATA7_VI0_B7_B, GPIO_FN_HRTS0_N_D,
--	GPIO_FN_TS_SCK1_B, GPIO_FN_GLO_I1_B, GPIO_FN_VI3_DATA7_B,
--	GPIO_FN_SD3_CLK, GPIO_FN_MMC1_CLK, GPIO_FN_SD3_CMD, GPIO_FN_MMC1_CMD,
--	GPIO_FN_MTS_N, GPIO_FN_SD3_DAT0, GPIO_FN_MMC1_D0, GPIO_FN_STM_N,
--	GPIO_FN_SD3_DAT1, GPIO_FN_MMC1_D1, GPIO_FN_MDATA, GPIO_FN_SD3_DAT2,
--	GPIO_FN_MMC1_D2, GPIO_FN_SDATA, GPIO_FN_SD3_DAT3, GPIO_FN_MMC1_D3,
--	GPIO_FN_SCKZ, GPIO_FN_SD3_CD, GPIO_FN_MMC1_D4, GPIO_FN_TS_SDAT1,
--	GPIO_FN_VSP, GPIO_FN_GLO_Q0, GPIO_FN_SIM0_RST_B, GPIO_FN_SD3_WP,
--	GPIO_FN_MMC1_D5, GPIO_FN_TS_SCK1, GPIO_FN_GLO_Q1, GPIO_FN_FMIN_C,
--	GPIO_FN_RDS_DATA_B, GPIO_FN_FMIN_E, GPIO_FN_RDS_DATA_D, GPIO_FN_FMIN_F,
--	GPIO_FN_RDS_DATA_E, GPIO_FN_MLB_CLK, GPIO_FN_SCL2_B, GPIO_FN_SCL2_CIS_B,
--	GPIO_FN_MLB_SIG, GPIO_FN_SCIFB1_RXD_D, GPIO_FN_RX1_C, GPIO_FN_SDA2_B,
--	GPIO_FN_SDA2_CIS_B, GPIO_FN_MLB_DAT, GPIO_FN_SPV_EVEN,
--	GPIO_FN_SCIFB1_TXD_D, GPIO_FN_TX1_C, GPIO_FN_BPFCLK_C,
--	GPIO_FN_RDS_CLK_B, GPIO_FN_SSI_SCK0129, GPIO_FN_CAN_CLK_B,
--	GPIO_FN_MOUT0,
--
--	/* IPSR12 */
--	GPIO_FN_SSI_WS0129, GPIO_FN_CAN0_TX_B, GPIO_FN_MOUT1,
--	GPIO_FN_SSI_SDATA0, GPIO_FN_CAN0_RX_B, GPIO_FN_MOUT2,
--	GPIO_FN_SSI_SDATA1, GPIO_FN_CAN1_TX_B, GPIO_FN_MOUT5,
--	GPIO_FN_SSI_SDATA2, GPIO_FN_CAN1_RX_B, GPIO_FN_SSI_SCK1, GPIO_FN_MOUT6,
--	GPIO_FN_SSI_SCK34, GPIO_FN_STP_OPWM_0, GPIO_FN_SCIFB0_SCK,
--	GPIO_FN_MSIOF1_SCK, GPIO_FN_CAN_DEBUG_HW_TRIGGER, GPIO_FN_SSI_WS34,
--	GPIO_FN_STP_IVCXO27_0, GPIO_FN_SCIFB0_RXD, GPIO_FN_MSIOF1_SYNC,
--	GPIO_FN_CAN_STEP0, GPIO_FN_SSI_SDATA3, GPIO_FN_STP_ISCLK_0,
--	GPIO_FN_SCIFB0_TXD, GPIO_FN_MSIOF1_SS1, GPIO_FN_CAN_TXCLK,
--	GPIO_FN_SSI_SCK4, GPIO_FN_STP_ISD_0, GPIO_FN_SCIFB0_CTS_N,
--	GPIO_FN_MSIOF1_SS2, GPIO_FN_SSI_SCK5_C, GPIO_FN_CAN_DEBUGOUT0,
--	GPIO_FN_SSI_WS4, GPIO_FN_STP_ISEN_0, GPIO_FN_SCIFB0_RTS_N,
--	GPIO_FN_MSIOF1_TXD, GPIO_FN_SSI_WS5_C, GPIO_FN_CAN_DEBUGOUT1,
--	GPIO_FN_SSI_SDATA4, GPIO_FN_STP_ISSYNC_0, GPIO_FN_MSIOF1_RXD,
--	GPIO_FN_CAN_DEBUGOUT2, GPIO_FN_SSI_SCK5, GPIO_FN_SCIFB1_SCK,
--	GPIO_FN_IERX_B, GPIO_FN_DU2_EXHSYNC_DU2_HSYNC, GPIO_FN_QSTH_QHS,
--	GPIO_FN_CAN_DEBUGOUT3, GPIO_FN_SSI_WS5, GPIO_FN_SCIFB1_RXD,
--	GPIO_FN_IECLK_B, GPIO_FN_DU2_EXVSYNC_DU2_VSYNC, GPIO_FN_QSTB_QHE,
--	GPIO_FN_CAN_DEBUGOUT4,
--
--	/* IPSR13 */
--	GPIO_FN_SSI_SDATA5, GPIO_FN_SCIFB1_TXD, GPIO_FN_IETX_B, GPIO_FN_DU2_DR2,
--	GPIO_FN_LCDOUT2, GPIO_FN_CAN_DEBUGOUT5, GPIO_FN_SSI_SCK6,
--	GPIO_FN_SCIFB1_CTS_N, GPIO_FN_BPFCLK_D, GPIO_FN_RDS_CLK_C,
--	GPIO_FN_DU2_DR3, GPIO_FN_LCDOUT3, GPIO_FN_CAN_DEBUGOUT6,
--	GPIO_FN_BPFCLK_F, GPIO_FN_RDS_CLK_E, GPIO_FN_SSI_WS6,
--	GPIO_FN_SCIFB1_RTS_N, GPIO_FN_CAN0_TX_D, GPIO_FN_DU2_DR4,
--	GPIO_FN_LCDOUT4, GPIO_FN_CAN_DEBUGOUT7, GPIO_FN_SSI_SDATA6,
--	GPIO_FN_FMIN_D, GPIO_FN_RDS_DATA_C, GPIO_FN_DU2_DR5, GPIO_FN_LCDOUT5,
--	GPIO_FN_CAN_DEBUGOUT8, GPIO_FN_SSI_SCK78, GPIO_FN_STP_IVCXO27_1,
--	GPIO_FN_SCK1, GPIO_FN_SCIFA1_SCK, GPIO_FN_DU2_DR6, GPIO_FN_LCDOUT6,
--	GPIO_FN_CAN_DEBUGOUT9, GPIO_FN_SSI_WS78, GPIO_FN_STP_ISCLK_1,
--	GPIO_FN_SCIFB2_SCK, GPIO_FN_SCIFA2_CTS_N, GPIO_FN_DU2_DR7,
--	GPIO_FN_LCDOUT7, GPIO_FN_CAN_DEBUGOUT10, GPIO_FN_SSI_SDATA7,
--	GPIO_FN_STP_ISD_1, GPIO_FN_SCIFB2_RXD, GPIO_FN_SCIFA2_RTS_N,
--	GPIO_FN_TCLK2, GPIO_FN_QSTVA_QVS, GPIO_FN_CAN_DEBUGOUT11,
--	GPIO_FN_BPFCLK_E, GPIO_FN_RDS_CLK_D, GPIO_FN_SSI_SDATA7_B,
--	GPIO_FN_FMIN_G, GPIO_FN_RDS_DATA_F, GPIO_FN_SSI_SDATA8,
--	GPIO_FN_STP_ISEN_1, GPIO_FN_SCIFB2_TXD, GPIO_FN_CAN0_TX_C,
--	GPIO_FN_CAN_DEBUGOUT12, GPIO_FN_SSI_SDATA8_B, GPIO_FN_SSI_SDATA9,
--	GPIO_FN_STP_ISSYNC_1, GPIO_FN_SCIFB2_CTS_N, GPIO_FN_SSI_WS1,
--	GPIO_FN_SSI_SDATA5_C, GPIO_FN_CAN_DEBUGOUT13, GPIO_FN_AUDIO_CLKA,
--	GPIO_FN_SCIFB2_RTS_N, GPIO_FN_CAN_DEBUGOUT14,
--
--	/* IPSR14 */
--	GPIO_FN_AUDIO_CLKB, GPIO_FN_SCIF_CLK, GPIO_FN_CAN0_RX_D,
--	GPIO_FN_DVC_MUTE, GPIO_FN_CAN0_RX_C, GPIO_FN_CAN_DEBUGOUT15,
--	GPIO_FN_REMOCON, GPIO_FN_SCIFA0_SCK, GPIO_FN_HSCK1, GPIO_FN_SCK0,
--	GPIO_FN_MSIOF3_SS2, GPIO_FN_DU2_DG2, GPIO_FN_LCDOUT10, GPIO_FN_SDA1_C,
--	GPIO_FN_SDA1_CIS_C, GPIO_FN_SCIFA0_RXD, GPIO_FN_HRX1, GPIO_FN_RX0,
--	GPIO_FN_DU2_DR0, GPIO_FN_LCDOUT0, GPIO_FN_SCIFA0_TXD, GPIO_FN_HTX1,
--	GPIO_FN_TX0, GPIO_FN_DU2_DR1, GPIO_FN_LCDOUT1, GPIO_FN_SCIFA0_CTS_N,
--	GPIO_FN_HCTS1_N, GPIO_FN_CTS0_N, GPIO_FN_MSIOF3_SYNC, GPIO_FN_DU2_DG3,
--	GPIO_FN_LCDOUT11, GPIO_FN_PWM0_B, GPIO_FN_SCL1_C, GPIO_FN_SCL1_CIS_C,
--	GPIO_FN_SCIFA0_RTS_N, GPIO_FN_HRTS1_N, GPIO_FN_RTS0_N_TANS,
--	GPIO_FN_MSIOF3_SS1, GPIO_FN_DU2_DG0, GPIO_FN_LCDOUT8, GPIO_FN_PWM1_B,
--	GPIO_FN_SCIFA1_RXD, GPIO_FN_AD_DI, GPIO_FN_RX1,
--	GPIO_FN_DU2_EXODDF_DU2_ODDF_DISP_CDE, GPIO_FN_QCPV_QDE,
--	GPIO_FN_SCIFA1_TXD, GPIO_FN_AD_DO, GPIO_FN_TX1, GPIO_FN_DU2_DG1,
--	GPIO_FN_LCDOUT9, GPIO_FN_SCIFA1_CTS_N, GPIO_FN_AD_CLK,
--	GPIO_FN_CTS1_N, GPIO_FN_MSIOF3_RXD, GPIO_FN_DU0_DOTCLKOUT, GPIO_FN_QCLK,
--	GPIO_FN_SCIFA1_RTS_N, GPIO_FN_AD_NCS_N, GPIO_FN_RTS1_N_TANS,
--	GPIO_FN_MSIOF3_TXD, GPIO_FN_DU1_DOTCLKOUT, GPIO_FN_QSTVB_QVE,
--	GPIO_FN_HRTS0_N_C,
--
--	/* IPSR15 */
--	GPIO_FN_SCIFA2_SCK, GPIO_FN_FMCLK, GPIO_FN_MSIOF3_SCK, GPIO_FN_DU2_DG7,
--	GPIO_FN_LCDOUT15, GPIO_FN_SCIF_CLK_B, GPIO_FN_SCIFA2_RXD, GPIO_FN_FMIN,
--	GPIO_FN_DU2_DB0, GPIO_FN_LCDOUT16, GPIO_FN_SCL2, GPIO_FN_SCL2_CIS,
--	GPIO_FN_SCIFA2_TXD, GPIO_FN_BPFCLK, GPIO_FN_DU2_DB1, GPIO_FN_LCDOUT17,
--	GPIO_FN_SDA2, GPIO_FN_SDA2_CIS, GPIO_FN_HSCK0, GPIO_FN_TS_SDEN0,
--	GPIO_FN_DU2_DG4, GPIO_FN_LCDOUT12, GPIO_FN_HCTS0_N_C, GPIO_FN_HRX0,
--	GPIO_FN_DU2_DB2, GPIO_FN_LCDOUT18, GPIO_FN_HTX0, GPIO_FN_DU2_DB3,
--	GPIO_FN_LCDOUT19, GPIO_FN_HCTS0_N, GPIO_FN_SSI_SCK9, GPIO_FN_DU2_DB4,
--	GPIO_FN_LCDOUT20, GPIO_FN_HRTS0_N, GPIO_FN_SSI_WS9, GPIO_FN_DU2_DB5,
--	GPIO_FN_LCDOUT21, GPIO_FN_MSIOF0_SCK, GPIO_FN_TS_SDAT0, GPIO_FN_ADICLK,
--	GPIO_FN_DU2_DB6, GPIO_FN_LCDOUT22, GPIO_FN_MSIOF0_SYNC, GPIO_FN_TS_SCK0,
--	GPIO_FN_SSI_SCK2, GPIO_FN_ADIDATA, GPIO_FN_DU2_DB7, GPIO_FN_LCDOUT23,
--	GPIO_FN_SCIFA2_RXD_B, GPIO_FN_MSIOF0_SS1, GPIO_FN_ADICHS0,
--	GPIO_FN_DU2_DG5, GPIO_FN_LCDOUT13, GPIO_FN_MSIOF0_TXD, GPIO_FN_ADICHS1,
--	GPIO_FN_DU2_DG6, GPIO_FN_LCDOUT14,
--
--	/* IPSR16 */
--	GPIO_FN_MSIOF0_SS2, GPIO_FN_AUDIO_CLKOUT, GPIO_FN_ADICHS2,
--	GPIO_FN_DU2_DISP, GPIO_FN_QPOLA, GPIO_FN_HTX0_C, GPIO_FN_SCIFA2_TXD_B,
--	GPIO_FN_MSIOF0_RXD, GPIO_FN_TS_SPSYNC0, GPIO_FN_SSI_WS2,
--	GPIO_FN_ADICS_SAMP, GPIO_FN_DU2_CDE, GPIO_FN_QPOLB, GPIO_FN_HRX0_C,
--	GPIO_FN_USB1_PWEN, GPIO_FN_AUDIO_CLKOUT_D, GPIO_FN_USB1_OVC,
--	GPIO_FN_TCLK1_B,
--};
--
- void r8a7790_add_standard_devices(void);
- void r8a7790_clock_init(void);
- void r8a7790_pinmux_init(void);
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0183-ARM-shmobile-Break-out-R-Car-Gen2-setup-code.patch b/patches.renesas/0183-ARM-shmobile-Break-out-R-Car-Gen2-setup-code.patch
deleted file mode 100644
index f69c1d212d3cd..0000000000000
--- a/patches.renesas/0183-ARM-shmobile-Break-out-R-Car-Gen2-setup-code.patch
+++ /dev/null
@@ -1,311 +0,0 @@
-From 83cd0db346fa37b57fdd62d338257ad42b717488 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Thu, 12 Sep 2013 09:32:49 +0900
-Subject: ARM: shmobile: Break out R-Car Gen2 setup code
-
-Move arch timer workaround code and boot mode pin
-handling from setup-r8a7790.c to setup-rcar-gen2.c.
-
-With this in place the same code can be used on
-other R-Car Generation 2 devices such as r8a7791.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 629cc70ddac35520688b3a8bd165435c886e78eb)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-	arch/arm/mach-shmobile/board-lager.c
----
- arch/arm/mach-shmobile/Makefile                 |  1 +
- arch/arm/mach-shmobile/board-lager-reference.c  |  2 +-
- arch/arm/mach-shmobile/board-lager.c            |  2 +-
- arch/arm/mach-shmobile/clock-r8a7790.c          |  2 +-
- arch/arm/mach-shmobile/include/mach/r8a7790.h   |  6 +-
- arch/arm/mach-shmobile/include/mach/rcar-gen2.h |  8 +++
- arch/arm/mach-shmobile/setup-r8a7790.c          | 68 +-----------------
- arch/arm/mach-shmobile/setup-rcar-gen2.c        | 91 +++++++++++++++++++++++++
- 8 files changed, 106 insertions(+), 74 deletions(-)
- create mode 100644 arch/arm/mach-shmobile/include/mach/rcar-gen2.h
- create mode 100644 arch/arm/mach-shmobile/setup-rcar-gen2.c
-
-diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
-index f8f699212984..d1486e550eae 100644
---- a/arch/arm/mach-shmobile/Makefile
-+++ b/arch/arm/mach-shmobile/Makefile
-@@ -15,6 +15,7 @@ obj-$(CONFIG_ARCH_R8A7740)	+= setup-r8a7740.o
- obj-$(CONFIG_ARCH_R8A7778)	+= setup-r8a7778.o
- obj-$(CONFIG_ARCH_R8A7779)	+= setup-r8a7779.o
- obj-$(CONFIG_ARCH_R8A7790)	+= setup-r8a7790.o
-+obj-$(CONFIG_ARCH_R8A7790)	+= setup-r8a7790.o setup-rcar-gen2.o
- obj-$(CONFIG_ARCH_R8A7791)	+= setup-r8a7791.o
- obj-$(CONFIG_ARCH_EMEV2)	+= setup-emev2.o
- 
-diff --git a/arch/arm/mach-shmobile/board-lager-reference.c b/arch/arm/mach-shmobile/board-lager-reference.c
-index d39a91b3ba48..1a1a4a888632 100644
---- a/arch/arm/mach-shmobile/board-lager-reference.c
-+++ b/arch/arm/mach-shmobile/board-lager-reference.c
-@@ -40,7 +40,7 @@ static const char *lager_boards_compat_dt[] __initdata = {
- DT_MACHINE_START(LAGER_DT, "lager")
- 	.smp		= smp_ops(r8a7790_smp_ops),
- 	.init_early	= r8a7790_init_early,
-+	.init_time	= rcar_gen2_timer_init,
- 	.init_machine	= lager_add_standard_devices,
--	.init_time	= r8a7790_timer_init,
- 	.dt_compat	= lager_boards_compat_dt,
- MACHINE_END
-diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
-index ba90fea55156..d83ed6556f7d 100644
---- a/arch/arm/mach-shmobile/board-lager.c
-+++ b/arch/arm/mach-shmobile/board-lager.c
-@@ -256,7 +256,7 @@ static const char *lager_boards_compat_dt[] __initdata = {
- DT_MACHINE_START(LAGER_DT, "lager")
- 	.smp		= smp_ops(r8a7790_smp_ops),
- 	.init_early	= r8a7790_init_early,
--	.init_time	= r8a7790_timer_init,
-+	.init_time	= rcar_gen2_timer_init,
- 	.init_machine	= lager_init,
- 	.dt_compat	= lager_boards_compat_dt,
- MACHINE_END
-diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
-index 7661e898f376..a64f965c7da1 100644
---- a/arch/arm/mach-shmobile/clock-r8a7790.c
-+++ b/arch/arm/mach-shmobile/clock-r8a7790.c
-@@ -310,7 +310,7 @@ static struct clk_lookup lookups[] = {
- 
- void __init r8a7790_clock_init(void)
- {
--	u32 mode = r8a7790_read_mode_pins();
-+	u32 mode = rcar_gen2_read_mode_pins();
- 	int k, ret = 0;
- 
- 	switch (mode & (MD(14) | MD(13))) {
-diff --git a/arch/arm/mach-shmobile/include/mach/r8a7790.h b/arch/arm/mach-shmobile/include/mach/r8a7790.h
-index 79e731c83e50..5fbfa28b40b6 100644
---- a/arch/arm/mach-shmobile/include/mach/r8a7790.h
-+++ b/arch/arm/mach-shmobile/include/mach/r8a7790.h
-@@ -1,15 +1,13 @@
- #ifndef __ASM_R8A7790_H__
- #define __ASM_R8A7790_H__
- 
-+#include <mach/rcar-gen2.h>
-+
- void r8a7790_add_standard_devices(void);
- void r8a7790_add_dt_devices(void);
- void r8a7790_clock_init(void);
- void r8a7790_pinmux_init(void);
- void r8a7790_init_early(void);
--void r8a7790_timer_init(void);
- extern struct smp_operations r8a7790_smp_ops;
- 
--#define MD(nr) BIT(nr)
--u32 r8a7790_read_mode_pins(void);
--
- #endif /* __ASM_R8A7790_H__ */
-diff --git a/arch/arm/mach-shmobile/include/mach/rcar-gen2.h b/arch/arm/mach-shmobile/include/mach/rcar-gen2.h
-new file mode 100644
-index 000000000000..43f606eb2d82
---- /dev/null
-+++ b/arch/arm/mach-shmobile/include/mach/rcar-gen2.h
-@@ -0,0 +1,8 @@
-+#ifndef __ASM_RCAR_GEN2_H__
-+#define __ASM_RCAR_GEN2_H__
-+
-+void rcar_gen2_timer_init(void);
-+#define MD(nr) BIT(nr)
-+u32 rcar_gen2_read_mode_pins(void);
-+
-+#endif /* __ASM_RCAR_GEN2_H__ */
-diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c
-index c7e24eff9ba2..c47bcebbcb00 100644
---- a/arch/arm/mach-shmobile/setup-r8a7790.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7790.c
-@@ -18,7 +18,6 @@
-  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
-  */
- 
--#include <linux/clocksource.h>
- #include <linux/irq.h>
- #include <linux/kernel.h>
- #include <linux/of_platform.h>
-@@ -203,71 +202,6 @@ void __init r8a7790_add_standard_devices(void)
- 	r8a7790_register_thermal();
- }
- 
--#define MODEMR 0xe6160060
--
--u32 __init r8a7790_read_mode_pins(void)
--{
--	void __iomem *modemr = ioremap_nocache(MODEMR, 4);
--	u32 mode;
--
--	BUG_ON(!modemr);
--	mode = ioread32(modemr);
--	iounmap(modemr);
--
--	return mode;
--}
--
--#define CNTCR 0
--#define CNTFID0 0x20
--
--void __init r8a7790_timer_init(void)
--{
--#ifdef CONFIG_ARM_ARCH_TIMER
--	u32 mode = r8a7790_read_mode_pins();
--	void __iomem *base;
--	int extal_mhz = 0;
--	u32 freq;
--
--	/* At Linux boot time the r8a7790 arch timer comes up
--	 * with the counter disabled. Moreover, it may also report
--	 * a potentially incorrect fixed 13 MHz frequency. To be
--	 * correct these registers need to be updated to use the
--	 * frequency EXTAL / 2 which can be determined by the MD pins.
--	 */
--
--	switch (mode & (MD(14) | MD(13))) {
--	case 0:
--		extal_mhz = 15;
--		break;
--	case MD(13):
--		extal_mhz = 20;
--		break;
--	case MD(14):
--		extal_mhz = 26;
--		break;
--	case MD(13) | MD(14):
--		extal_mhz = 30;
--		break;
--	}
--
--	/* The arch timer frequency equals EXTAL / 2 */
--	freq = extal_mhz * (1000000 / 2);
--
--	/* Remap "armgcnt address map" space */
--	base = ioremap(0xe6080000, PAGE_SIZE);
--
--	/* Update registers with correct frequency */
--	iowrite32(freq, base + CNTFID0);
--	asm volatile("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq));
--
--	/* make sure arch timer is started by setting bit 0 of CNTCR */
--	iowrite32(1, base + CNTCR);
--	iounmap(base);
--#endif /* CONFIG_ARM_ARCH_TIMER */
--
--	clocksource_of_init();
--}
--
- void __init r8a7790_init_early(void)
- {
- #ifndef CONFIG_ARM_ARCH_TIMER
-@@ -285,7 +219,7 @@ static const char * const r8a7790_boards_compat_dt[] __initconst = {
- DT_MACHINE_START(R8A7790_DT, "Generic R8A7790 (Flattened Device Tree)")
- 	.smp		= smp_ops(r8a7790_smp_ops),
- 	.init_early	= r8a7790_init_early,
--	.init_time	= r8a7790_timer_init,
-+	.init_time	= rcar_gen2_timer_init,
- 	.dt_compat	= r8a7790_boards_compat_dt,
- MACHINE_END
- #endif /* CONFIG_USE_OF */
-diff --git a/arch/arm/mach-shmobile/setup-rcar-gen2.c b/arch/arm/mach-shmobile/setup-rcar-gen2.c
-new file mode 100644
-index 000000000000..5734c24bf6c7
---- /dev/null
-+++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c
-@@ -0,0 +1,91 @@
-+/*
-+ * R-Car Generation 2 support
-+ *
-+ * Copyright (C) 2013  Renesas Solutions Corp.
-+ * Copyright (C) 2013  Magnus Damm
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; version 2 of the License.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
-+ */
-+
-+#include <linux/clocksource.h>
-+#include <linux/io.h>
-+#include <linux/kernel.h>
-+#include <mach/common.h>
-+#include <mach/rcar-gen2.h>
-+#include <asm/mach/arch.h>
-+
-+#define MODEMR 0xe6160060
-+
-+u32 __init rcar_gen2_read_mode_pins(void)
-+{
-+	void __iomem *modemr = ioremap_nocache(MODEMR, 4);
-+	u32 mode;
-+
-+	BUG_ON(!modemr);
-+	mode = ioread32(modemr);
-+	iounmap(modemr);
-+
-+	return mode;
-+}
-+
-+#define CNTCR 0
-+#define CNTFID0 0x20
-+
-+void __init rcar_gen2_timer_init(void)
-+{
-+#ifdef CONFIG_ARM_ARCH_TIMER
-+	u32 mode = rcar_gen2_read_mode_pins();
-+	void __iomem *base;
-+	int extal_mhz = 0;
-+	u32 freq;
-+
-+	/* At Linux boot time the r8a7790 arch timer comes up
-+	 * with the counter disabled. Moreover, it may also report
-+	 * a potentially incorrect fixed 13 MHz frequency. To be
-+	 * correct these registers need to be updated to use the
-+	 * frequency EXTAL / 2 which can be determined by the MD pins.
-+	 */
-+
-+	switch (mode & (MD(14) | MD(13))) {
-+	case 0:
-+		extal_mhz = 15;
-+		break;
-+	case MD(13):
-+		extal_mhz = 20;
-+		break;
-+	case MD(14):
-+		extal_mhz = 26;
-+		break;
-+	case MD(13) | MD(14):
-+		extal_mhz = 30;
-+		break;
-+	}
-+
-+	/* The arch timer frequency equals EXTAL / 2 */
-+	freq = extal_mhz * (1000000 / 2);
-+
-+	/* Remap "armgcnt address map" space */
-+	base = ioremap(0xe6080000, PAGE_SIZE);
-+
-+	/* Update registers with correct frequency */
-+	iowrite32(freq, base + CNTFID0);
-+	asm volatile("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq));
-+
-+	/* make sure arch timer is started by setting bit 0 of CNTCR */
-+	iowrite32(1, base + CNTCR);
-+	iounmap(base);
-+#endif /* CONFIG_ARM_ARCH_TIMER */
-+
-+	clocksource_of_init();
-+}
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0183-ARM-shmobile-r8a7779-pinmux-platform-device-cleanup.patch b/patches.renesas/0183-ARM-shmobile-r8a7779-pinmux-platform-device-cleanup.patch
deleted file mode 100644
index 4c25c6f4cc9b1..0000000000000
--- a/patches.renesas/0183-ARM-shmobile-r8a7779-pinmux-platform-device-cleanup.patch
+++ /dev/null
@@ -1,56 +0,0 @@
-From 1e2fa62b82329ebacabae7472707bdee654b5da1 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Fri, 12 Apr 2013 14:21:29 +0200
-Subject: ARM: shmobile: r8a7779 pinmux platform device cleanup
-
-Use DEFINE_RES_MEM() to save a couple of lines of code.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-[lp: Don't declare r8a7779_pfc_resources as const]
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-(cherry picked from commit 0ccaf5bb3fb6ad8d1fe3464cf269a3225c853c46)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-r8a7779.c | 17 +++--------------
- 1 file changed, 3 insertions(+), 14 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c
-index b0b39484..dbb13f28 100644
---- a/arch/arm/mach-shmobile/setup-r8a7779.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7779.c
-@@ -65,11 +65,7 @@ void __init r8a7779_map_io(void)
- }
- 
- static struct resource r8a7779_pfc_resources[] = {
--	[0] = {
--		.start	= 0xfffc0000,
--		.end	= 0xfffc023b,
--		.flags	= IORESOURCE_MEM,
--	},
-+	DEFINE_RES_MEM(0xfffc0000, 0x023c),
- };
- 
- static struct platform_device r8a7779_pfc_device = {
-@@ -81,15 +77,8 @@ static struct platform_device r8a7779_pfc_device = {
- 
- #define R8A7779_GPIO(idx, npins) \
- static struct resource r8a7779_gpio##idx##_resources[] = {		\
--	[0] = {								\
--		.start	= 0xffc40000 + 0x1000 * (idx),			\
--		.end	= 0xffc4002b + 0x1000 * (idx),			\
--		.flags	= IORESOURCE_MEM,				\
--	},								\
--	[1] = {								\
--		.start	= gic_iid(0xad + (idx)),			\
--		.flags	= IORESOURCE_IRQ,				\
--	}								\
-+	DEFINE_RES_MEM(0xffc40000 + (0x1000 * (idx)), 0x002c),		\
-+	DEFINE_RES_IRQ(gic_iid(0xad + (idx))),				\
- };									\
- 									\
- static struct gpio_rcar_config r8a7779_gpio##idx##_platform_data = {	\
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0183-ARM-shmobile-r8a7791-Koelsch-DT-reference-C-bits.patch b/patches.renesas/0183-ARM-shmobile-r8a7791-Koelsch-DT-reference-C-bits.patch
deleted file mode 100644
index 4a9c44c19db8d..0000000000000
--- a/patches.renesas/0183-ARM-shmobile-r8a7791-Koelsch-DT-reference-C-bits.patch
+++ /dev/null
@@ -1,124 +0,0 @@
-From 731fb27920477f02938351d3fc3f24f93acfd5dc Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Tue, 8 Oct 2013 15:30:18 +0900
-Subject: ARM: shmobile: r8a7791 Koelsch DT reference C bits
-
-Add DT reference support for the r8a7791 Koelsch board.
-
-This board support file will be used together with common
-clocks and multiplatform in the future.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit a2baf1912f399c0fbb9ec8064b88a1809f5a5b0a)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/Kconfig                   | 11 ++++++
- arch/arm/mach-shmobile/Makefile                  |  1 +
- arch/arm/mach-shmobile/Makefile.boot             |  1 +
- arch/arm/mach-shmobile/board-koelsch-reference.c | 46 ++++++++++++++++++++++++
- 4 files changed, 59 insertions(+)
- create mode 100644 arch/arm/mach-shmobile/board-koelsch-reference.c
-
-diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
-index aa9017bb750c..8eac47fef8dc 100644
---- a/arch/arm/mach-shmobile/Kconfig
-+++ b/arch/arm/mach-shmobile/Kconfig
-@@ -240,6 +240,17 @@ config MACH_KOELSCH
- 	depends on ARCH_R8A7791
- 	select USE_OF
- 
-+config MACH_KOELSCH_REFERENCE
-+	bool "Koelsch board - Reference Device Tree Implementation"
-+	depends on ARCH_R8A7791
-+	select USE_OF
-+	---help---
-+	   Use reference implementation of Koelsch board support
-+	   which makes use of device tree at the expense
-+	   of not supporting a number of devices.
-+
-+	   This is intended to aid developers
-+
- config MACH_KZM9G
- 	bool "KZM-A9-GT board"
- 	depends on ARCH_SH73A0
-diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
-index c7e877499dc2..8bca9b56352e 100644
---- a/arch/arm/mach-shmobile/Makefile
-+++ b/arch/arm/mach-shmobile/Makefile
-@@ -71,6 +71,7 @@ obj-$(CONFIG_MACH_LAGER_REFERENCE)	+= board-lager-reference.o
- obj-$(CONFIG_MACH_ARMADILLO800EVA)	+= board-armadillo800eva.o
- obj-$(CONFIG_MACH_ARMADILLO800EVA_REFERENCE)	+= board-armadillo800eva-reference.o
- obj-$(CONFIG_MACH_KOELSCH)	+= board-koelsch.o
-+obj-$(CONFIG_MACH_KOELSCH_REFERENCE)	+= board-koelsch-reference.o
- obj-$(CONFIG_MACH_KZM9G)	+= board-kzm9g.o
- obj-$(CONFIG_MACH_KZM9G_REFERENCE)	+= board-kzm9g-reference.o
- endif
-diff --git a/arch/arm/mach-shmobile/Makefile.boot b/arch/arm/mach-shmobile/Makefile.boot
-index 4f30e3dc0919..892d4ab8b23d 100644
---- a/arch/arm/mach-shmobile/Makefile.boot
-+++ b/arch/arm/mach-shmobile/Makefile.boot
-@@ -8,6 +8,7 @@ loadaddr-$(CONFIG_MACH_BOCKW) += 0x60008000
- loadaddr-$(CONFIG_MACH_BOCKW_REFERENCE) += 0x60008000
- loadaddr-$(CONFIG_MACH_GENMAI) += 0x8008000
- loadaddr-$(CONFIG_MACH_KOELSCH) += 0x40008000
-+loadaddr-$(CONFIG_MACH_KOELSCH_REFERENCE) += 0x40008000
- loadaddr-$(CONFIG_MACH_KZM9G) += 0x41008000
- loadaddr-$(CONFIG_MACH_KZM9G_REFERENCE) += 0x41008000
- loadaddr-$(CONFIG_MACH_LAGER) += 0x40008000
-diff --git a/arch/arm/mach-shmobile/board-koelsch-reference.c b/arch/arm/mach-shmobile/board-koelsch-reference.c
-new file mode 100644
-index 000000000000..beecc8bb510f
---- /dev/null
-+++ b/arch/arm/mach-shmobile/board-koelsch-reference.c
-@@ -0,0 +1,46 @@
-+/*
-+ * Koelsch board support - Reference DT implementation
-+ *
-+ * Copyright (C) 2013  Renesas Electronics Corporation
-+ * Copyright (C) 2013  Renesas Solutions Corp.
-+ * Copyright (C) 2013  Magnus Damm
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; version 2 of the License.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/of_platform.h>
-+#include <mach/rcar-gen2.h>
-+#include <mach/r8a7791.h>
-+#include <asm/mach/arch.h>
-+
-+static void __init koelsch_add_standard_devices(void)
-+{
-+	r8a7791_clock_init();
-+	r8a7791_add_dt_devices();
-+	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
-+}
-+
-+static const char * const koelsch_boards_compat_dt[] __initconst = {
-+	"renesas,koelsch-reference",
-+	NULL,
-+};
-+
-+DT_MACHINE_START(KOELSCH_DT, "koelsch")
-+	.smp		= smp_ops(r8a7791_smp_ops),
-+	.init_early	= r8a7791_init_early,
-+	.init_time	= rcar_gen2_timer_init,
-+	.init_machine	= koelsch_add_standard_devices,
-+	.dt_compat	= koelsch_boards_compat_dt,
-+MACHINE_END
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0184-ARM-shmobile-Introduce-r8a7791_add_standard_devices.patch b/patches.renesas/0184-ARM-shmobile-Introduce-r8a7791_add_standard_devices.patch
deleted file mode 100644
index edcb34b727d01..0000000000000
--- a/patches.renesas/0184-ARM-shmobile-Introduce-r8a7791_add_standard_devices.patch
+++ /dev/null
@@ -1,49 +0,0 @@
-From 8cdbf1b126ce03c2973c4959ef1f7b4462759a3f Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Tue, 1 Oct 2013 17:11:53 +0900
-Subject: ARM: shmobile: Introduce r8a7791_add_standard_devices()
-
-Introduce the function r8a7791_add_standard_devices() that
-follows the same style as other mach-shmobile SoC code and
-allows C version of board code to add on-chip devices.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 44a268e2a652eab3c21e282b6418a8c9ea279626)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/include/mach/r8a7791.h | 1 +
- arch/arm/mach-shmobile/setup-r8a7791.c        | 5 +++++
- 2 files changed, 6 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/include/mach/r8a7791.h b/arch/arm/mach-shmobile/include/mach/r8a7791.h
-index 2e6d66131083..2a86a5394672 100644
---- a/arch/arm/mach-shmobile/include/mach/r8a7791.h
-+++ b/arch/arm/mach-shmobile/include/mach/r8a7791.h
-@@ -1,6 +1,7 @@
- #ifndef __ASM_R8A7791_H__
- #define __ASM_R8A7791_H__
- 
-+void r8a7791_add_standard_devices(void);
- void r8a7791_add_dt_devices(void);
- void r8a7791_clock_init(void);
- void r8a7791_init_early(void);
-diff --git a/arch/arm/mach-shmobile/setup-r8a7791.c b/arch/arm/mach-shmobile/setup-r8a7791.c
-index b56399d2e1de..350dfc4918e3 100644
---- a/arch/arm/mach-shmobile/setup-r8a7791.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7791.c
-@@ -129,6 +129,11 @@ void __init r8a7791_add_dt_devices(void)
- 	r8a7791_register_cmt(00);
- }
- 
-+void __init r8a7791_add_standard_devices(void)
-+{
-+	r8a7791_add_dt_devices();
-+}
-+
- void __init r8a7791_init_early(void)
- {
- #ifndef CONFIG_ARM_ARCH_TIMER
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0184-ARM-shmobile-bockw-fixup-FPGA-ioremap-area.patch b/patches.renesas/0184-ARM-shmobile-bockw-fixup-FPGA-ioremap-area.patch
deleted file mode 100644
index 5f044b96a769e..0000000000000
--- a/patches.renesas/0184-ARM-shmobile-bockw-fixup-FPGA-ioremap-area.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From 50ab4de29113c7408a3bdba535affe2a00d3b074 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Thu, 10 Oct 2013 23:35:06 -0700
-Subject: ARM: shmobile: bockw: fixup FPGA ioremap area
-
-Don't keep FPGA ioremap area.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit b6d3eba338b4a24e49947fc45542fca7b76dda9a)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-bockw-reference.c | 4 +++-
- 1 file changed, 3 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/board-bockw-reference.c b/arch/arm/mach-shmobile/board-bockw-reference.c
-index 875cf3f3f503..fac95a4d6553 100644
---- a/arch/arm/mach-shmobile/board-bockw-reference.c
-+++ b/arch/arm/mach-shmobile/board-bockw-reference.c
-@@ -32,7 +32,7 @@
- #define COMCTLR	0x101c
- static void __init bockw_init(void)
- {
--	static void __iomem *fpga;
-+	void __iomem *fpga;
- 
- 	r8a7778_clock_init();
- 	r8a7778_init_irq_extpin_dt(1);
-@@ -50,6 +50,8 @@ static void __init bockw_init(void)
- 		u16 val = ioread16(fpga + IRQ0MR);
- 		val &= ~(1 << 4); /* enable SMSC911x */
- 		iowrite16(val, fpga + IRQ0MR);
-+
-+		iounmap(fpga);
- 	}
- 
- 	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0184-sh-pfc-Add-support-for-SoC-specific-initialization.patch b/patches.renesas/0184-sh-pfc-Add-support-for-SoC-specific-initialization.patch
deleted file mode 100644
index 7e830e0500514..0000000000000
--- a/patches.renesas/0184-sh-pfc-Add-support-for-SoC-specific-initialization.patch
+++ /dev/null
@@ -1,95 +0,0 @@
-From 69b260be465249c3eec50b7e7aef099ed87ef420 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Sun, 21 Apr 2013 20:21:57 +0200
-Subject: sh-pfc: Add support for SoC-specific initialization
-
-Add two optional init and exit SoC operations and call them from the
-core at probe and remove time.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Linus Walleij <linus.walleij@linaro.org>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 0c151062f32c9db819c2ca3081d6f98194d61e78)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/core.c   | 16 +++++++++++++++-
- drivers/pinctrl/sh-pfc/core.h   |  1 +
- drivers/pinctrl/sh-pfc/sh_pfc.h |  2 ++
- 3 files changed, 18 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/core.c b/drivers/pinctrl/sh-pfc/core.c
-index 4540ce38..3b2fd43f 100644
---- a/drivers/pinctrl/sh-pfc/core.c
-+++ b/drivers/pinctrl/sh-pfc/core.c
-@@ -372,6 +372,12 @@ static int sh_pfc_probe(struct platform_device *pdev)
- 
- 	spin_lock_init(&pfc->lock);
- 
-+	if (info->ops && info->ops->init) {
-+		ret = info->ops->init(pfc);
-+		if (ret < 0)
-+			return ret;
-+	}
-+
- 	pinctrl_provide_dummies();
- 
- 	/*
-@@ -379,7 +385,7 @@ static int sh_pfc_probe(struct platform_device *pdev)
- 	 */
- 	ret = sh_pfc_register_pinctrl(pfc);
- 	if (unlikely(ret != 0))
--		return ret;
-+		goto error;
- 
- #ifdef CONFIG_GPIO_SH_PFC
- 	/*
-@@ -401,6 +407,11 @@ static int sh_pfc_probe(struct platform_device *pdev)
- 	dev_info(pfc->dev, "%s support registered\n", info->name);
- 
- 	return 0;
-+
-+error:
-+	if (info->ops && info->ops->exit)
-+		info->ops->exit(pfc);
-+	return ret;
- }
- 
- static int sh_pfc_remove(struct platform_device *pdev)
-@@ -412,6 +423,9 @@ static int sh_pfc_remove(struct platform_device *pdev)
- #endif
- 	sh_pfc_unregister_pinctrl(pfc);
- 
-+	if (pfc->info->ops && pfc->info->ops->exit)
-+		pfc->info->ops->exit(pfc);
-+
- 	platform_set_drvdata(pdev, NULL);
- 
- 	return 0;
-diff --git a/drivers/pinctrl/sh-pfc/core.h b/drivers/pinctrl/sh-pfc/core.h
-index e847afbe..f02ba1dd 100644
---- a/drivers/pinctrl/sh-pfc/core.h
-+++ b/drivers/pinctrl/sh-pfc/core.h
-@@ -28,6 +28,7 @@ struct sh_pfc_pinctrl;
- struct sh_pfc {
- 	struct device *dev;
- 	const struct sh_pfc_soc_info *info;
-+	void *soc_data;
- 	spinlock_t lock;
- 
- 	unsigned int num_windows;
-diff --git a/drivers/pinctrl/sh-pfc/sh_pfc.h b/drivers/pinctrl/sh-pfc/sh_pfc.h
-index b1707612..830ae1ff 100644
---- a/drivers/pinctrl/sh-pfc/sh_pfc.h
-+++ b/drivers/pinctrl/sh-pfc/sh_pfc.h
-@@ -129,6 +129,8 @@ struct pinmux_range {
- struct sh_pfc;
- 
- struct sh_pfc_soc_operations {
-+	int (*init)(struct sh_pfc *pfc);
-+	void (*exit)(struct sh_pfc *pfc);
- 	unsigned int (*get_bias)(struct sh_pfc *pfc, unsigned int pin);
- 	void (*set_bias)(struct sh_pfc *pfc, unsigned int pin,
- 			 unsigned int bias);
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0185-ARM-shmobile-bockw-add-pin-pull-up-setting-for-SDHI.patch b/patches.renesas/0185-ARM-shmobile-bockw-add-pin-pull-up-setting-for-SDHI.patch
deleted file mode 100644
index 7366a1f109c8e..0000000000000
--- a/patches.renesas/0185-ARM-shmobile-bockw-add-pin-pull-up-setting-for-SDHI.patch
+++ /dev/null
@@ -1,55 +0,0 @@
-From a7207f19ccbbdebb55b3cee4dc81fec52edfb426 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Thu, 10 Oct 2013 23:35:34 -0700
-Subject: ARM: shmobile: bockw: add pin pull-up setting for SDHI
-
-SDHI CD/WP pin needs pull-up
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 79990c164dcc7514398ca824a609c74cb5f563da)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-bockw-reference.c | 15 +++++++++++++++
- 1 file changed, 15 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/board-bockw-reference.c b/arch/arm/mach-shmobile/board-bockw-reference.c
-index fac95a4d6553..027373f8de82 100644
---- a/arch/arm/mach-shmobile/board-bockw-reference.c
-+++ b/arch/arm/mach-shmobile/board-bockw-reference.c
-@@ -30,9 +30,13 @@
- #define FPGA	0x18200000
- #define IRQ0MR	0x30
- #define COMCTLR	0x101c
-+
-+#define PFC	0xfffc0000
-+#define PUPR4	0x110
- static void __init bockw_init(void)
- {
- 	void __iomem *fpga;
-+	void __iomem *pfc;
- 
- 	r8a7778_clock_init();
- 	r8a7778_init_irq_extpin_dt(1);
-@@ -54,6 +58,17 @@ static void __init bockw_init(void)
- 		iounmap(fpga);
- 	}
- 
-+	pfc = ioremap_nocache(PFC, 0x200);
-+	if (pfc) {
-+		/*
-+		 * FIXME
-+		 *
-+		 * SDHI CD/WP pin needs pull-up
-+		 */
-+		iowrite32(ioread32(pfc + PUPR4) | (3 << 26), pfc + PUPR4);
-+		iounmap(pfc);
-+	}
-+
- 	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
- }
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0185-ARM-shmobile-r8a7791-IRQC-platform-device-support.patch b/patches.renesas/0185-ARM-shmobile-r8a7791-IRQC-platform-device-support.patch
deleted file mode 100644
index d0f3272001d85..0000000000000
--- a/patches.renesas/0185-ARM-shmobile-r8a7791-IRQC-platform-device-support.patch
+++ /dev/null
@@ -1,73 +0,0 @@
-From aed4a442a522663055f79fdfeafa43c2134de4d4 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Tue, 1 Oct 2013 17:12:19 +0900
-Subject: ARM: shmobile: r8a7791 IRQC platform device support
-
-Add a platform device for the r8a7791 IRQC hardware
-driving IRQ pins IRQ0 to IRQ9. The Linux interrupt
-number is statically assigned to allow board code
-written in C to make use of static interrupt numbers.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 1e4953d817712e52616d9a40460435eb8881d32d)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-r8a7791.c | 27 +++++++++++++++++++++++++++
- 1 file changed, 27 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/setup-r8a7791.c b/arch/arm/mach-shmobile/setup-r8a7791.c
-index 350dfc4918e3..ba4fa3edf44f 100644
---- a/arch/arm/mach-shmobile/setup-r8a7791.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7791.c
-@@ -22,6 +22,7 @@
- #include <linux/irq.h>
- #include <linux/kernel.h>
- #include <linux/of_platform.h>
-+#include <linux/platform_data/irq-renesas-irqc.h>
- #include <linux/serial_sci.h>
- #include <linux/sh_timer.h>
- #include <mach/common.h>
-@@ -109,6 +110,31 @@ static const struct resource cmt00_resources[] __initconst = {
- 					  &cmt##idx##_platform_data,	\
- 					  sizeof(struct sh_timer_config))
- 
-+static struct renesas_irqc_config irqc0_data = {
-+	.irq_base = irq_pin(0), /* IRQ0 -> IRQ9 */
-+};
-+
-+static struct resource irqc0_resources[] = {
-+	DEFINE_RES_MEM(0xe61c0000, 0x200), /* IRQC Event Detector Block_0 */
-+	DEFINE_RES_IRQ(gic_spi(0)), /* IRQ0 */
-+	DEFINE_RES_IRQ(gic_spi(1)), /* IRQ1 */
-+	DEFINE_RES_IRQ(gic_spi(2)), /* IRQ2 */
-+	DEFINE_RES_IRQ(gic_spi(3)), /* IRQ3 */
-+	DEFINE_RES_IRQ(gic_spi(12)), /* IRQ4 */
-+	DEFINE_RES_IRQ(gic_spi(13)), /* IRQ5 */
-+	DEFINE_RES_IRQ(gic_spi(14)), /* IRQ6 */
-+	DEFINE_RES_IRQ(gic_spi(15)), /* IRQ7 */
-+	DEFINE_RES_IRQ(gic_spi(16)), /* IRQ8 */
-+	DEFINE_RES_IRQ(gic_spi(17)), /* IRQ9 */
-+};
-+
-+#define r8a7791_register_irqc(idx)					\
-+	platform_device_register_resndata(&platform_bus, "renesas_irqc", \
-+					  idx, irqc##idx##_resources,	\
-+					  ARRAY_SIZE(irqc##idx##_resources), \
-+					  &irqc##idx##_data,		\
-+					  sizeof(struct renesas_irqc_config))
-+
- void __init r8a7791_add_dt_devices(void)
- {
- 	r8a7791_register_scif(SCIFA0);
-@@ -132,6 +158,7 @@ void __init r8a7791_add_dt_devices(void)
- void __init r8a7791_add_standard_devices(void)
- {
- 	r8a7791_add_dt_devices();
-+	r8a7791_register_irqc(0);
- }
- 
- void __init r8a7791_init_early(void)
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0185-sh-pfc-sh73a0-Add-VCCQ-MC0-regulator.patch b/patches.renesas/0185-sh-pfc-sh73a0-Add-VCCQ-MC0-regulator.patch
deleted file mode 100644
index 66480708385a4..0000000000000
--- a/patches.renesas/0185-sh-pfc-sh73a0-Add-VCCQ-MC0-regulator.patch
+++ /dev/null
@@ -1,200 +0,0 @@
-From 79998aa5ef8dbec4b49324259fe9381bd81fc9e8 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Sun, 21 Apr 2013 23:26:26 +0200
-Subject: sh-pfc: sh73a0: Add VCCQ MC0 regulator
-
-The sh73a0 has an internal power gate on the VCCQ power supply for the
-SDHI0 device that is controlled (for some strange reason) by a bit in a
-PFC register. This feature should be exposed as a regulator.
-
-As the same register is also used for pin control purposes there is no
-way to achieve atomic read/write sequences with a separate regulator
-driver. We thus need to implement the regulator here.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
-Acked-by: Linus Walleij <linus.walleij@linaro.org>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit ea770ad2ec054e26076d677f2e87add53712941c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/Kconfig      |   1 +
- drivers/pinctrl/sh-pfc/pfc-sh73a0.c | 134 ++++++++++++++++++++++++++++++++++++
- 2 files changed, 135 insertions(+)
-
-diff --git a/drivers/pinctrl/sh-pfc/Kconfig b/drivers/pinctrl/sh-pfc/Kconfig
-index 32161c4f..636a882b 100644
---- a/drivers/pinctrl/sh-pfc/Kconfig
-+++ b/drivers/pinctrl/sh-pfc/Kconfig
-@@ -72,6 +72,7 @@ config PINCTRL_PFC_SH73A0
- 	def_bool y
- 	depends on ARCH_SH73A0
- 	select PINCTRL_SH_PFC
-+	select REGULATOR
- 
- config PINCTRL_PFC_SH7720
- 	def_bool y
-diff --git a/drivers/pinctrl/sh-pfc/pfc-sh73a0.c b/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
-index 587f7772..b7837248 100644
---- a/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
-@@ -20,7 +20,11 @@
-  */
- #include <linux/io.h>
- #include <linux/kernel.h>
-+#include <linux/module.h>
- #include <linux/pinctrl/pinconf-generic.h>
-+#include <linux/regulator/driver.h>
-+#include <linux/regulator/machine.h>
-+#include <linux/slab.h>
- 
- #include <mach/sh73a0.h>
- #include <mach/irqs.h>
-@@ -3888,6 +3892,92 @@ static const struct pinmux_irq pinmux_irqs[] = {
- 	PINMUX_IRQ(EXT_IRQ16L(9), 308),
- };
- 
-+/* -----------------------------------------------------------------------------
-+ * VCCQ MC0 regulator
-+ */
-+
-+static void sh73a0_vccq_mc0_endisable(struct regulator_dev *reg, bool enable)
-+{
-+	struct sh_pfc *pfc = reg->reg_data;
-+	void __iomem *addr = pfc->window[1].virt + 4;
-+	unsigned long flags;
-+	u32 value;
-+
-+	spin_lock_irqsave(&pfc->lock, flags);
-+
-+	value = ioread32(addr);
-+
-+	if (enable)
-+		value |= BIT(28);
-+	else
-+		value &= ~BIT(28);
-+
-+	iowrite32(value, addr);
-+
-+	spin_unlock_irqrestore(&pfc->lock, flags);
-+}
-+
-+static int sh73a0_vccq_mc0_enable(struct regulator_dev *reg)
-+{
-+	sh73a0_vccq_mc0_endisable(reg, true);
-+	return 0;
-+}
-+
-+static int sh73a0_vccq_mc0_disable(struct regulator_dev *reg)
-+{
-+	sh73a0_vccq_mc0_endisable(reg, false);
-+	return 0;
-+}
-+
-+static int sh73a0_vccq_mc0_is_enabled(struct regulator_dev *reg)
-+{
-+	struct sh_pfc *pfc = reg->reg_data;
-+	void __iomem *addr = pfc->window[1].virt + 4;
-+	unsigned long flags;
-+	u32 value;
-+
-+	spin_lock_irqsave(&pfc->lock, flags);
-+	value = ioread32(addr);
-+	spin_unlock_irqrestore(&pfc->lock, flags);
-+
-+	return !!(value & BIT(28));
-+}
-+
-+static int sh73a0_vccq_mc0_get_voltage(struct regulator_dev *reg)
-+{
-+	return 3300000;
-+}
-+
-+static struct regulator_ops sh73a0_vccq_mc0_ops = {
-+	.enable = sh73a0_vccq_mc0_enable,
-+	.disable = sh73a0_vccq_mc0_disable,
-+	.is_enabled = sh73a0_vccq_mc0_is_enabled,
-+	.get_voltage = sh73a0_vccq_mc0_get_voltage,
-+};
-+
-+static const struct regulator_desc sh73a0_vccq_mc0_desc = {
-+	.owner = THIS_MODULE,
-+	.name = "vccq_mc0",
-+	.type = REGULATOR_VOLTAGE,
-+	.ops = &sh73a0_vccq_mc0_ops,
-+};
-+
-+static struct regulator_consumer_supply sh73a0_vccq_mc0_consumers[] = {
-+	REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"),
-+};
-+
-+static const struct regulator_init_data sh73a0_vccq_mc0_init_data = {
-+	.constraints = {
-+		.valid_ops_mask = REGULATOR_CHANGE_STATUS,
-+	},
-+	.num_consumer_supplies = ARRAY_SIZE(sh73a0_vccq_mc0_consumers),
-+	.consumer_supplies = sh73a0_vccq_mc0_consumers,
-+};
-+
-+/* -----------------------------------------------------------------------------
-+ * Pin bias
-+ */
-+
- #define PORTnCR_PULMD_OFF	(0 << 6)
- #define PORTnCR_PULMD_DOWN	(2 << 6)
- #define PORTnCR_PULMD_UP	(3 << 6)
-@@ -3934,7 +4024,51 @@ static void sh73a0_pinmux_set_bias(struct sh_pfc *pfc, unsigned int pin,
- 	iowrite8(value, addr);
- }
- 
-+/* -----------------------------------------------------------------------------
-+ * SoC information
-+ */
-+
-+struct sh73a0_pinmux_data {
-+	struct regulator_dev *vccq_mc0;
-+};
-+
-+static int sh73a0_pinmux_soc_init(struct sh_pfc *pfc)
-+{
-+	struct sh73a0_pinmux_data *data;
-+	struct regulator_config cfg = { };
-+	int ret;
-+
-+	data = devm_kzalloc(pfc->dev, sizeof(*data), GFP_KERNEL);
-+	if (data == NULL)
-+		return -ENOMEM;
-+
-+	cfg.dev = pfc->dev;
-+	cfg.init_data = &sh73a0_vccq_mc0_init_data;
-+	cfg.driver_data = pfc;
-+
-+	data->vccq_mc0 = regulator_register(&sh73a0_vccq_mc0_desc, &cfg);
-+	if (IS_ERR(data->vccq_mc0)) {
-+		ret = PTR_ERR(data->vccq_mc0);
-+		dev_err(pfc->dev, "Failed to register VCCQ MC0 regulator: %d\n",
-+			ret);
-+		return ret;
-+	}
-+
-+	pfc->soc_data = data;
-+
-+	return 0;
-+}
-+
-+static void sh73a0_pinmux_soc_exit(struct sh_pfc *pfc)
-+{
-+	struct sh73a0_pinmux_data *data = pfc->soc_data;
-+
-+	regulator_unregister(data->vccq_mc0);
-+}
-+
- static const struct sh_pfc_soc_operations sh73a0_pinmux_ops = {
-+	.init = sh73a0_pinmux_soc_init,
-+	.exit = sh73a0_pinmux_soc_exit,
- 	.get_bias = sh73a0_pinmux_get_bias,
- 	.set_bias = sh73a0_pinmux_set_bias,
- };
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0186-ARM-shmobile-kzm9g-Remove-the-VCCQ-MC0-function-GPIO.patch b/patches.renesas/0186-ARM-shmobile-kzm9g-Remove-the-VCCQ-MC0-function-GPIO.patch
deleted file mode 100644
index 33e34ba4dbd27..0000000000000
--- a/patches.renesas/0186-ARM-shmobile-kzm9g-Remove-the-VCCQ-MC0-function-GPIO.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From 1889908a588518325efeb74cd3bd20decdf2100a Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Sun, 21 Apr 2013 23:29:14 +0200
-Subject: ARM: shmobile: kzm9g: Remove the VCCQ MC0 function GPIO
-
-The VCCQ MC0 power gate is now controlled by a regulator registered by
-the PFC driver. Remove the corresponding function GPIO.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Linus Walleij <linus.walleij@linaro.org>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 261e4e1d8e517c32a408350455fdf200c7dd8407)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-kzm9g.c | 3 ---
- 1 file changed, 3 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-kzm9g.c b/arch/arm/mach-shmobile/board-kzm9g.c
-index e6b775a1..fc4ca9be 100644
---- a/arch/arm/mach-shmobile/board-kzm9g.c
-+++ b/arch/arm/mach-shmobile/board-kzm9g.c
-@@ -788,9 +788,6 @@ static void __init kzm_init(void)
- 	/* Touchscreen */
- 	gpio_request_one(223, GPIOF_IN, NULL); /* IRQ8 */
- 
--	/* enable SD */
--	gpio_request(GPIO_FN_SDHI0_VCCQ_MC0_ON,	NULL);
--
- #ifdef CONFIG_CACHE_L2X0
- 	/* Early BRESP enable, Shared attribute override enable, 64K*8way */
- 	l2x0_init(IOMEM(0xf0100000), 0x40460000, 0x82000fff);
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0186-ARM-shmobile-lager-set-.debounce_interval.patch b/patches.renesas/0186-ARM-shmobile-lager-set-.debounce_interval.patch
deleted file mode 100644
index 242f5819f37ba..0000000000000
--- a/patches.renesas/0186-ARM-shmobile-lager-set-.debounce_interval.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From 3d8f538b8530c7adff33d5fe2f27d5bd20046f82 Mon Sep 17 00:00:00 2001
-From: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
-Date: Tue, 29 Oct 2013 17:57:30 +0900
-Subject: ARM: shmobile: lager: set .debounce_interval
-
-In R-Car GPIO hardware block, 'chattering removal' feature can be
-enabled on GPIO-n-[3:0] pins, but it's not supported on rest of pins
-GPIO-n-[31:4].
-
-Set an appropriate debounce interval, instead.  We could confirm that
-spurious/unnecessary GPIO interrupts are prevented by this settings.
-
-Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
-Acked-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit c9fd77d48a72d4210c992c4ee27ef8217a44da03)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-lager.c | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
-index 4301c3812a13..27ab664968e8 100644
---- a/arch/arm/mach-shmobile/board-lager.c
-+++ b/arch/arm/mach-shmobile/board-lager.c
-@@ -120,7 +120,8 @@ static const struct gpio_led_platform_data lager_leds_pdata __initconst = {
- 
- /* GPIO KEY */
- #define GPIO_KEY(c, g, d, ...) \
--	{ .code = c, .gpio = g, .desc = d, .active_low = 1 }
-+	{ .code = c, .gpio = g, .desc = d, .active_low = 1, \
-+	  .debounce_interval = 20 }
- 
- static struct gpio_keys_button gpio_buttons[] = {
- 	GPIO_KEY(KEY_4,		RCAR_GP_PIN(1, 28),	"SW2-pin4"),
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0186-ARM-shmobile-r8a7791-Arch-timer-workaround.patch b/patches.renesas/0186-ARM-shmobile-r8a7791-Arch-timer-workaround.patch
deleted file mode 100644
index f1bc1f516723e..0000000000000
--- a/patches.renesas/0186-ARM-shmobile-r8a7791-Arch-timer-workaround.patch
+++ /dev/null
@@ -1,52 +0,0 @@
-From 6ad4fa6b33bc5133d76c939f61166d4928e752c5 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Tue, 1 Oct 2013 17:12:48 +0900
-Subject: ARM: shmobile: r8a7791 Arch timer workaround
-
-Make use of the R-Car Gen2 arch timer workaround on r8a7791.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit ca1e6f22a0ab5ae6ec2114993a23d5814f0799c7)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/Makefile        | 2 +-
- arch/arm/mach-shmobile/setup-r8a7791.c | 2 ++
- 2 files changed, 3 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
-index d1486e550eae..623fa207520b 100644
---- a/arch/arm/mach-shmobile/Makefile
-+++ b/arch/arm/mach-shmobile/Makefile
-@@ -16,7 +16,7 @@ obj-$(CONFIG_ARCH_R8A7778)	+= setup-r8a7778.o
- obj-$(CONFIG_ARCH_R8A7779)	+= setup-r8a7779.o
- obj-$(CONFIG_ARCH_R8A7790)	+= setup-r8a7790.o
- obj-$(CONFIG_ARCH_R8A7790)	+= setup-r8a7790.o setup-rcar-gen2.o
--obj-$(CONFIG_ARCH_R8A7791)	+= setup-r8a7791.o
-+obj-$(CONFIG_ARCH_R8A7791)	+= setup-r8a7791.o setup-rcar-gen2.o
- obj-$(CONFIG_ARCH_EMEV2)	+= setup-emev2.o
- 
- # Clock objects
-diff --git a/arch/arm/mach-shmobile/setup-r8a7791.c b/arch/arm/mach-shmobile/setup-r8a7791.c
-index ba4fa3edf44f..cb3859b4cc95 100644
---- a/arch/arm/mach-shmobile/setup-r8a7791.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7791.c
-@@ -28,6 +28,7 @@
- #include <mach/common.h>
- #include <mach/irqs.h>
- #include <mach/r8a7791.h>
-+#include <mach/rcar-gen2.h>
- #include <asm/mach/arch.h>
- 
- #define SCIF_COMMON(scif_type, baseaddr, irq)			\
-@@ -176,6 +177,7 @@ static const char *r8a7791_boards_compat_dt[] __initdata = {
- 
- DT_MACHINE_START(R8A7791_DT, "Generic R8A7791 (Flattened Device Tree)")
- 	.init_early	= r8a7791_init_early,
-+	.init_time	= rcar_gen2_timer_init,
- 	.dt_compat	= r8a7791_boards_compat_dt,
- MACHINE_END
- #endif /* CONFIG_USE_OF */
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0187-ARM-shmobile-Initial-r7s72100-SoC-support.patch b/patches.renesas/0187-ARM-shmobile-Initial-r7s72100-SoC-support.patch
deleted file mode 100644
index 556e5d6bc8ff6..0000000000000
--- a/patches.renesas/0187-ARM-shmobile-Initial-r7s72100-SoC-support.patch
+++ /dev/null
@@ -1,374 +0,0 @@
-From 5124ae6b88ff9fe400999e1d43b9cbbd6dc85e15 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Thu, 19 Sep 2013 05:11:11 +0900
-Subject: ARM: shmobile: Initial r7s72100 SoC support
-
-Add initial support for the r7272100 SoC including:
- - Single Cortex-A9 CPU Core
- - GIC
-
-No static virtual mappings are used, all the components
-make use of ioremap(). DT_MACHINE_START is still wrapped
-in CONFIG_USE_OF to match other mach-shmobile code.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 0086df273cf8c7e270f8930cc42d7dad15060516)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r7s72100.dtsi                |  36 +++++
- arch/arm/mach-shmobile/Kconfig                 |   6 +
- arch/arm/mach-shmobile/Makefile                |   2 +
- arch/arm/mach-shmobile/clock-r7s72100.c        | 194 +++++++++++++++++++++++++
- arch/arm/mach-shmobile/include/mach/r7s72100.h |   7 +
- arch/arm/mach-shmobile/setup-r7s72100.c        |  43 ++++++
- 6 files changed, 288 insertions(+)
- create mode 100644 arch/arm/boot/dts/r7s72100.dtsi
- create mode 100644 arch/arm/mach-shmobile/clock-r7s72100.c
- create mode 100644 arch/arm/mach-shmobile/include/mach/r7s72100.h
- create mode 100644 arch/arm/mach-shmobile/setup-r7s72100.c
-
-diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi
-new file mode 100644
-index 000000000000..46b82aa7dc4e
---- /dev/null
-+++ b/arch/arm/boot/dts/r7s72100.dtsi
-@@ -0,0 +1,36 @@
-+/*
-+ * Device Tree Source for the r7s72100 SoC
-+ *
-+ * Copyright (C) 2013 Renesas Solutions Corp.
-+ *
-+ * This file is licensed under the terms of the GNU General Public License
-+ * version 2.  This program is licensed "as is" without any warranty of any
-+ * kind, whether express or implied.
-+ */
-+
-+/ {
-+	compatible = "renesas,r7s72100";
-+	interrupt-parent = <&gic>;
-+	#address-cells = <1>;
-+	#size-cells = <1>;
-+
-+	cpus {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+
-+		cpu@0 {
-+			device_type = "cpu";
-+			compatible = "arm,cortex-a9";
-+			reg = <0>;
-+		};
-+	};
-+
-+	gic: interrupt-controller@e8201000 {
-+		compatible = "arm,cortex-a9-gic";
-+		#interrupt-cells = <3>;
-+		#address-cells = <0>;
-+		interrupt-controller;
-+		reg = <0xe8201000 0x1000>,
-+			<0xe8202000 0x1000>;
-+	};
-+};
-diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
-index eda285794961..6e7d0a9b0be9 100644
---- a/arch/arm/mach-shmobile/Kconfig
-+++ b/arch/arm/mach-shmobile/Kconfig
-@@ -113,6 +113,12 @@ config ARCH_EMEV2
- 	select ARM_GIC
- 	select CPU_V7
- 
-+config ARCH_R7S72100
-+	bool "RZ/A1H (R7S72100)"
-+	select ARM_GIC
-+	select CPU_V7
-+	select SH_CLK_CPG
-+
- comment "SH-Mobile Board Type"
- 
- config MACH_APE6EVM
-diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
-index 623fa207520b..af9e0ee9bea7 100644
---- a/arch/arm/mach-shmobile/Makefile
-+++ b/arch/arm/mach-shmobile/Makefile
-@@ -18,6 +18,7 @@ obj-$(CONFIG_ARCH_R8A7790)	+= setup-r8a7790.o
- obj-$(CONFIG_ARCH_R8A7790)	+= setup-r8a7790.o setup-rcar-gen2.o
- obj-$(CONFIG_ARCH_R8A7791)	+= setup-r8a7791.o setup-rcar-gen2.o
- obj-$(CONFIG_ARCH_EMEV2)	+= setup-emev2.o
-+obj-$(CONFIG_ARCH_R7S72100)	+= setup-r7s72100.o
- 
- # Clock objects
- ifndef CONFIG_COMMON_CLK
-@@ -31,6 +32,7 @@ obj-$(CONFIG_ARCH_R8A7779)	+= clock-r8a7779.o
- obj-$(CONFIG_ARCH_R8A7790)	+= clock-r8a7790.o
- obj-$(CONFIG_ARCH_R8A7791)	+= clock-r8a7791.o
- obj-$(CONFIG_ARCH_EMEV2)	+= clock-emev2.o
-+obj-$(CONFIG_ARCH_R7S72100)	+= clock-r7s72100.o
- endif
- 
- # SMP objects
-diff --git a/arch/arm/mach-shmobile/clock-r7s72100.c b/arch/arm/mach-shmobile/clock-r7s72100.c
-new file mode 100644
-index 000000000000..1e71094f809d
---- /dev/null
-+++ b/arch/arm/mach-shmobile/clock-r7s72100.c
-@@ -0,0 +1,194 @@
-+/*
-+ * r7a72100 clock framework support
-+ *
-+ * Copyright (C) 2013  Renesas Solutions Corp.
-+ * Copyright (C) 2012  Phil Edworthy
-+ * Copyright (C) 2011  Magnus Damm
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; version 2 of the License.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ */
-+#include <linux/init.h>
-+#include <linux/kernel.h>
-+#include <linux/io.h>
-+#include <linux/sh_clk.h>
-+#include <linux/clkdev.h>
-+#include <mach/common.h>
-+#include <mach/r7s72100.h>
-+
-+/* registers */
-+#define FRQCR		0xfcfe0010
-+#define FRQCR2		0xfcfe0014
-+#define STBCR3		0xfcfe0420
-+#define STBCR4		0xfcfe0424
-+
-+#define PLL_RATE 30
-+
-+static struct clk_mapping cpg_mapping = {
-+	.phys	= 0xfcfe0000,
-+	.len	= 0x1000,
-+};
-+
-+/* Fixed 32 KHz root clock for RTC */
-+static struct clk r_clk = {
-+	.rate           = 32768,
-+};
-+
-+/*
-+ * Default rate for the root input clock, reset this with clk_set_rate()
-+ * from the platform code.
-+ */
-+static struct clk extal_clk = {
-+	.rate		= 13330000,
-+	.mapping	= &cpg_mapping,
-+};
-+
-+static unsigned long pll_recalc(struct clk *clk)
-+{
-+	return clk->parent->rate * PLL_RATE;
-+}
-+
-+static struct sh_clk_ops pll_clk_ops = {
-+	.recalc		= pll_recalc,
-+};
-+
-+static struct clk pll_clk = {
-+	.ops		= &pll_clk_ops,
-+	.parent		= &extal_clk,
-+	.flags		= CLK_ENABLE_ON_INIT,
-+};
-+
-+static unsigned long bus_recalc(struct clk *clk)
-+{
-+	return clk->parent->rate * 2 / 3;
-+}
-+
-+static struct sh_clk_ops bus_clk_ops = {
-+	.recalc		= bus_recalc,
-+};
-+
-+static struct clk bus_clk = {
-+	.ops		= &bus_clk_ops,
-+	.parent		= &pll_clk,
-+	.flags		= CLK_ENABLE_ON_INIT,
-+};
-+
-+static unsigned long peripheral0_recalc(struct clk *clk)
-+{
-+	return clk->parent->rate / 12;
-+}
-+
-+static struct sh_clk_ops peripheral0_clk_ops = {
-+	.recalc		= peripheral0_recalc,
-+};
-+
-+static struct clk peripheral0_clk = {
-+	.ops		= &peripheral0_clk_ops,
-+	.parent		= &pll_clk,
-+	.flags		= CLK_ENABLE_ON_INIT,
-+};
-+
-+static unsigned long peripheral1_recalc(struct clk *clk)
-+{
-+	return clk->parent->rate / 6;
-+}
-+
-+static struct sh_clk_ops peripheral1_clk_ops = {
-+	.recalc		= peripheral1_recalc,
-+};
-+
-+static struct clk peripheral1_clk = {
-+	.ops		= &peripheral1_clk_ops,
-+	.parent		= &pll_clk,
-+	.flags		= CLK_ENABLE_ON_INIT,
-+};
-+
-+struct clk *main_clks[] = {
-+	&r_clk,
-+	&extal_clk,
-+	&pll_clk,
-+	&bus_clk,
-+	&peripheral0_clk,
-+	&peripheral1_clk,
-+};
-+
-+static int div2[] = { 1, 3, 0, 3 }; /* 1, 2/3, reserve, 1/3 */
-+static int multipliers[] = { 1, 2, 1, 1 };
-+
-+static struct clk_div_mult_table div4_div_mult_table = {
-+	.divisors = div2,
-+	.nr_divisors = ARRAY_SIZE(div2),
-+	.multipliers = multipliers,
-+	.nr_multipliers = ARRAY_SIZE(multipliers),
-+};
-+
-+static struct clk_div4_table div4_table = {
-+	.div_mult_table = &div4_div_mult_table,
-+};
-+
-+enum { DIV4_I,
-+	DIV4_NR };
-+
-+#define DIV4(_reg, _bit, _mask, _flags) \
-+	SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
-+
-+/* The mask field specifies the div2 entries that are valid */
-+struct clk div4_clks[DIV4_NR] = {
-+	[DIV4_I]  = DIV4(FRQCR, 8, 0xB, CLK_ENABLE_REG_16BIT
-+					| CLK_ENABLE_ON_INIT),
-+};
-+
-+enum { MSTP47, MSTP46, MSTP45, MSTP44, MSTP43, MSTP42, MSTP41, MSTP40,
-+	MSTP33,	MSTP_NR };
-+
-+static struct clk mstp_clks[MSTP_NR] = {
-+	[MSTP47] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 7, 0), /* SCIF0 */
-+	[MSTP46] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 6, 0), /* SCIF1 */
-+	[MSTP45] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 5, 0), /* SCIF2 */
-+	[MSTP44] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 4, 0), /* SCIF3 */
-+	[MSTP43] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 3, 0), /* SCIF4 */
-+	[MSTP42] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 2, 0), /* SCIF5 */
-+	[MSTP41] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 1, 0), /* SCIF6 */
-+	[MSTP40] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 0, 0), /* SCIF7 */
-+	[MSTP33] = SH_CLK_MSTP8(&peripheral0_clk, STBCR3, 3, 0), /* MTU2 */
-+};
-+
-+static struct clk_lookup lookups[] = {
-+	/* main clocks */
-+	CLKDEV_CON_ID("rclk", &r_clk),
-+	CLKDEV_CON_ID("extal", &extal_clk),
-+	CLKDEV_CON_ID("pll_clk", &pll_clk),
-+	CLKDEV_CON_ID("peripheral_clk", &peripheral1_clk),
-+
-+	/* DIV4 clocks */
-+	CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]),
-+
-+	/* MSTP clocks */
-+};
-+
-+void __init r7s72100_clock_init(void)
-+{
-+	int k, ret = 0;
-+
-+	for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++)
-+		ret = clk_register(main_clks[k]);
-+
-+	clkdev_add_table(lookups, ARRAY_SIZE(lookups));
-+
-+	if (!ret)
-+		ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table);
-+
-+	if (!ret)
-+		ret = sh_clk_mstp_register(mstp_clks, MSTP_NR);
-+
-+	if (!ret)
-+		shmobile_clk_init();
-+	else
-+		panic("failed to setup rza1 clocks\n");
-+}
-diff --git a/arch/arm/mach-shmobile/include/mach/r7s72100.h b/arch/arm/mach-shmobile/include/mach/r7s72100.h
-new file mode 100644
-index 000000000000..f78062e98bd4
---- /dev/null
-+++ b/arch/arm/mach-shmobile/include/mach/r7s72100.h
-@@ -0,0 +1,7 @@
-+#ifndef __ASM_R7S72100_H__
-+#define __ASM_R7S72100_H__
-+
-+void r7s72100_clock_init(void);
-+void r7s72100_init_early(void);
-+
-+#endif /* __ASM_R7S72100_H__ */
-diff --git a/arch/arm/mach-shmobile/setup-r7s72100.c b/arch/arm/mach-shmobile/setup-r7s72100.c
-new file mode 100644
-index 000000000000..c1aded0984a8
---- /dev/null
-+++ b/arch/arm/mach-shmobile/setup-r7s72100.c
-@@ -0,0 +1,43 @@
-+/*
-+ * r7s72100 processor support
-+ *
-+ * Copyright (C) 2013  Renesas Solutions Corp.
-+ * Copyright (C) 2013  Magnus Damm
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; version 2 of the License.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
-+ */
-+
-+#include <linux/irq.h>
-+#include <linux/kernel.h>
-+#include <linux/of_platform.h>
-+#include <mach/common.h>
-+#include <mach/r7s72100.h>
-+#include <asm/mach/arch.h>
-+
-+void __init r7s72100_init_early(void)
-+{
-+	shmobile_setup_delay(400, 1, 3); /* Cortex-A9 @ 400MHz */
-+}
-+
-+#ifdef CONFIG_USE_OF
-+static const char *r7s72100_boards_compat_dt[] __initdata = {
-+	"renesas,r7s72100",
-+	NULL,
-+};
-+
-+DT_MACHINE_START(R7S72100_DT, "Generic R7S72100 (Flattened Device Tree)")
-+	.init_early	= r7s72100_init_early,
-+	.dt_compat	= r7s72100_boards_compat_dt,
-+MACHINE_END
-+#endif /* CONFIG_USE_OF */
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0187-ARM-shmobile-koelsch-set-.debounce_interval.patch b/patches.renesas/0187-ARM-shmobile-koelsch-set-.debounce_interval.patch
deleted file mode 100644
index d8ae47caa5147..0000000000000
--- a/patches.renesas/0187-ARM-shmobile-koelsch-set-.debounce_interval.patch
+++ /dev/null
@@ -1,40 +0,0 @@
-From ecbe3371f896fef840e52105c125df9a36c29811 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Tue, 29 Oct 2013 17:57:31 +0900
-Subject: ARM: shmobile: koelsch: set .debounce_interval
-
-In R-Car GPIO hardware block, 'chattering removal' feature can be
-enabled on GPIO-n-[3:0] pins, but it's not supported on rest of pins
-GPIO-n-[31:4].
-
-Set an appropriate debounce interval, instead.  We could confirm that
-spurious/unnecessary GPIO interrupts are prevented by this settings.
-
-Based on work for the lager board by Shinya Kuribayashi.
-
-Cc: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 478e2f9ca5ac9862a5cac0798814ba7d6a5de002)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-koelsch.c | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/board-koelsch.c b/arch/arm/mach-shmobile/board-koelsch.c
-index 59fa0b975473..5b81a343c5f9 100644
---- a/arch/arm/mach-shmobile/board-koelsch.c
-+++ b/arch/arm/mach-shmobile/board-koelsch.c
-@@ -56,7 +56,8 @@ static const struct gpio_led_platform_data koelsch_leds_pdata __initconst = {
- 
- /* GPIO KEY */
- #define GPIO_KEY(c, g, d, ...) \
--	{ .code = c, .gpio = g, .desc = d, .active_low = 1 }
-+	{ .code = c, .gpio = g, .desc = d, .active_low = 1, \
-+	  .debounce_interval = 20 }
- 
- static struct gpio_keys_button gpio_buttons[] = {
- 	GPIO_KEY(KEY_4,		RCAR_GP_PIN(5, 3),	"SW2-pin4"),
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0187-ARM-shmobile-kzm9g-reference-Remove-the-VCCQ-MC0-fun.patch b/patches.renesas/0187-ARM-shmobile-kzm9g-reference-Remove-the-VCCQ-MC0-fun.patch
deleted file mode 100644
index 5479e67de39f5..0000000000000
--- a/patches.renesas/0187-ARM-shmobile-kzm9g-reference-Remove-the-VCCQ-MC0-fun.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From f790835fb9bd35966664d3e88dfc9aa4d9a7cb07 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Sun, 21 Apr 2013 23:29:14 +0200
-Subject: ARM: shmobile: kzm9g-reference: Remove the VCCQ MC0 function GPIO
-
-The VCCQ MC0 power gate is now controlled by a regulator registered by
-the PFC driver. Remove the corresponding function GPIO.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Linus Walleij <linus.walleij@linaro.org>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 7af2aec18af6bebd78302b797ef081ddb36a4982)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-kzm9g-reference.c | 1 -
- 1 file changed, 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/board-kzm9g-reference.c b/arch/arm/mach-shmobile/board-kzm9g-reference.c
-index aefa50d3..44055fe8 100644
---- a/arch/arm/mach-shmobile/board-kzm9g-reference.c
-+++ b/arch/arm/mach-shmobile/board-kzm9g-reference.c
-@@ -79,7 +79,6 @@ static void __init kzm_init(void)
- 	sh73a0_pinmux_init();
- 
- 	/* enable SD */
--	gpio_request(GPIO_FN_SDHI0_VCCQ_MC0_ON,	NULL);
- 	gpio_request_one(15, GPIOF_OUT_INIT_HIGH, NULL); /* power */
- 
- 	gpio_request_one(14, GPIOF_OUT_INIT_HIGH, NULL); /* power */
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0188-ARM-shmobile-Initial-r8a7791-and-Koelsch-multiplatfo.patch b/patches.renesas/0188-ARM-shmobile-Initial-r8a7791-and-Koelsch-multiplatfo.patch
deleted file mode 100644
index 1d796a96cc229..0000000000000
--- a/patches.renesas/0188-ARM-shmobile-Initial-r8a7791-and-Koelsch-multiplatfo.patch
+++ /dev/null
@@ -1,108 +0,0 @@
-From 59c96e394b7ed742f9bb37b2152b1c8ca31fa55a Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Wed, 6 Nov 2013 19:40:01 +0900
-Subject: ARM: shmobile: Initial r8a7791 and Koelsch multiplatform support
-
-Add Koelsch and r8a7791 to CONFIG_SHMOBILE_MULTI. At this
-point CCF is not yet supported so you cannot run this code
-yet. For CCF support to happen several different components
-are needed, and this is one simple portion that moves us
-forward. Other patches need to build on top of this one.
-
-Koelsch board support exists in 3 flavors:
-1) SHMOBILE_MULTI, MACH_KOELSCH - board-koelsch-reference.c (CCF + DT)
-2) SHMOBILE, MACH_KOELSCH_REFERENCE - board-koelsch-reference.c (DT)
-3) SHMOBILE, MACH_KOELSCH - board-koelsch.c (legacy C code)
-
-When CCF is done then 2) will be removed. When 1) includes same features
-as 3) then 3) will be removed.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 6d75bc6439ec3f4ae45db1e501177382d0582591)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-	arch/arm/boot/dts/Makefile
----
- arch/arm/boot/dts/Makefile                       | 3 ++-
- arch/arm/mach-shmobile/Kconfig                   | 8 ++++++++
- arch/arm/mach-shmobile/Makefile                  | 1 +
- arch/arm/mach-shmobile/board-koelsch-reference.c | 5 +++++
- 4 files changed, 16 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
-index f77c7660b0a8..f73c0a846bab 100644
---- a/arch/arm/boot/dts/Makefile
-+++ b/arch/arm/boot/dts/Makefile
-@@ -176,7 +176,8 @@ dtb-$(CONFIG_ARCH_SHMOBILE_LEGACY) += emev2-kzm9d.dtb \
- 	r8a73a4-ape6evm.dtb \
- 	r8a73a4-ape6evm-reference.dtb \
- 	sh7372-mackerel.dtb
--dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += emev2-kzm9d.dtb
-+dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += emev2-kzm9d.dtb \
-+	r8a7791-koelsch-reference.dtb
- dtb-$(CONFIG_ARCH_SOCFPGA) += socfpga_cyclone5.dtb \
- 	socfpga_vt.dtb
- dtb-$(CONFIG_ARCH_SPEAR13XX) += spear1310-evb.dtb \
-diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
-index 8eac47fef8dc..17a4f409f96d 100644
---- a/arch/arm/mach-shmobile/Kconfig
-+++ b/arch/arm/mach-shmobile/Kconfig
-@@ -24,8 +24,16 @@ comment "SH-Mobile System Type"
- config ARCH_EMEV2
- 	bool "Emma Mobile EV2"
- 
-+config ARCH_R8A7791
-+	bool "R-Car M2 (R8A77910)"
-+	select RENESAS_IRQC
-+
- comment "SH-Mobile Board Type"
- 
-+config MACH_KOELSCH
-+	bool "Koelsch board"
-+	depends on ARCH_R8A7791
-+
- config MACH_KZM9D
- 	bool "KZM9D board"
- 	depends on ARCH_EMEV2
-diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
-index 8bca9b56352e..021775de50ae 100644
---- a/arch/arm/mach-shmobile/Makefile
-+++ b/arch/arm/mach-shmobile/Makefile
-@@ -56,6 +56,7 @@ obj-$(CONFIG_ARCH_R8A7779)	+= pm-r8a7779.o
- 
- # Board objects
- ifdef CONFIG_ARCH_SHMOBILE_MULTI
-+obj-$(CONFIG_MACH_KOELSCH)	+= board-koelsch-reference.o
- obj-$(CONFIG_MACH_KZM9D)	+= board-kzm9d-reference.o
- else
- obj-$(CONFIG_MACH_APE6EVM)	+= board-ape6evm.o
-diff --git a/arch/arm/mach-shmobile/board-koelsch-reference.c b/arch/arm/mach-shmobile/board-koelsch-reference.c
-index beecc8bb510f..25b558f462a3 100644
---- a/arch/arm/mach-shmobile/board-koelsch-reference.c
-+++ b/arch/arm/mach-shmobile/board-koelsch-reference.c
-@@ -19,6 +19,7 @@
-  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
-  */
- 
-+#include <linux/clk-provider.h>
- #include <linux/kernel.h>
- #include <linux/of_platform.h>
- #include <mach/rcar-gen2.h>
-@@ -27,7 +28,11 @@
- 
- static void __init koelsch_add_standard_devices(void)
- {
-+#ifdef CONFIG_COMMON_CLK
-+	of_clk_init(NULL);
-+#else
- 	r8a7791_clock_init();
-+#endif
- 	r8a7791_add_dt_devices();
- 	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0188-ARM-shmobile-r7s72100-SCIF-support.patch b/patches.renesas/0188-ARM-shmobile-r7s72100-SCIF-support.patch
deleted file mode 100644
index 21cfdeb93cbc9..0000000000000
--- a/patches.renesas/0188-ARM-shmobile-r7s72100-SCIF-support.patch
+++ /dev/null
@@ -1,115 +0,0 @@
-From 0a838b8464f7974eb7d58bce9326255953302e45 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Thu, 19 Sep 2013 05:11:20 +0900
-Subject: ARM: shmobile: r7s72100 SCIF support
-
-Add SCIF serial port support to the r7s72100 SoC by
-adding platform devices for SCIF0 -> SCIF7 together with
-clock bindings. DT device description is excluded at
-this point since such bindings are still under
-development.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 77df55c66da2ad45ad18111194d192011dbeffb9)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r7s72100.c        |  8 +++++
- arch/arm/mach-shmobile/include/mach/r7s72100.h |  1 +
- arch/arm/mach-shmobile/setup-r7s72100.c        | 45 ++++++++++++++++++++++++++
- 3 files changed, 54 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/clock-r7s72100.c b/arch/arm/mach-shmobile/clock-r7s72100.c
-index 1e71094f809d..4aba20ca127e 100644
---- a/arch/arm/mach-shmobile/clock-r7s72100.c
-+++ b/arch/arm/mach-shmobile/clock-r7s72100.c
-@@ -170,6 +170,14 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]),
- 
- 	/* MSTP clocks */
-+	CLKDEV_ICK_ID("sci_fck", "sh-sci.0", &mstp_clks[MSTP47]),
-+	CLKDEV_ICK_ID("sci_fck", "sh-sci.1", &mstp_clks[MSTP46]),
-+	CLKDEV_ICK_ID("sci_fck", "sh-sci.2", &mstp_clks[MSTP45]),
-+	CLKDEV_ICK_ID("sci_fck", "sh-sci.3", &mstp_clks[MSTP44]),
-+	CLKDEV_ICK_ID("sci_fck", "sh-sci.4", &mstp_clks[MSTP43]),
-+	CLKDEV_ICK_ID("sci_fck", "sh-sci.5", &mstp_clks[MSTP42]),
-+	CLKDEV_ICK_ID("sci_fck", "sh-sci.6", &mstp_clks[MSTP41]),
-+	CLKDEV_ICK_ID("sci_fck", "sh-sci.7", &mstp_clks[MSTP40]),
- };
- 
- void __init r7s72100_clock_init(void)
-diff --git a/arch/arm/mach-shmobile/include/mach/r7s72100.h b/arch/arm/mach-shmobile/include/mach/r7s72100.h
-index f78062e98bd4..5f34b20ecd4a 100644
---- a/arch/arm/mach-shmobile/include/mach/r7s72100.h
-+++ b/arch/arm/mach-shmobile/include/mach/r7s72100.h
-@@ -1,6 +1,7 @@
- #ifndef __ASM_R7S72100_H__
- #define __ASM_R7S72100_H__
- 
-+void r7s72100_add_dt_devices(void);
- void r7s72100_clock_init(void);
- void r7s72100_init_early(void);
- 
-diff --git a/arch/arm/mach-shmobile/setup-r7s72100.c b/arch/arm/mach-shmobile/setup-r7s72100.c
-index c1aded0984a8..d4eb509a1c87 100644
---- a/arch/arm/mach-shmobile/setup-r7s72100.c
-+++ b/arch/arm/mach-shmobile/setup-r7s72100.c
-@@ -21,10 +21,55 @@
- #include <linux/irq.h>
- #include <linux/kernel.h>
- #include <linux/of_platform.h>
-+#include <linux/serial_sci.h>
- #include <mach/common.h>
-+#include <mach/irqs.h>
- #include <mach/r7s72100.h>
- #include <asm/mach/arch.h>
- 
-+#define SCIF_DATA(index, baseaddr, irq)					\
-+[index] = {								\
-+	.type		= PORT_SCIF,					\
-+	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,		\
-+	.flags		= UPF_BOOT_AUTOCONF | UPF_IOREMAP,		\
-+	.scbrr_algo_id	= SCBRR_ALGO_2,					\
-+	.scscr		= SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |	\
-+			  SCSCR_REIE,					\
-+	.mapbase	= baseaddr,					\
-+	.irqs		= { irq + 1, irq + 2, irq + 3, irq },		\
-+}
-+
-+enum { SCIF0, SCIF1, SCIF2, SCIF3, SCIF4, SCIF5, SCIF6, SCIF7 };
-+
-+static const struct plat_sci_port scif[] __initconst = {
-+	SCIF_DATA(SCIF0, 0xe8007000, gic_iid(221)), /* SCIF0 */
-+	SCIF_DATA(SCIF1, 0xe8007800, gic_iid(225)), /* SCIF1 */
-+	SCIF_DATA(SCIF2, 0xe8008000, gic_iid(229)), /* SCIF2 */
-+	SCIF_DATA(SCIF3, 0xe8008800, gic_iid(233)), /* SCIF3 */
-+	SCIF_DATA(SCIF4, 0xe8009000, gic_iid(237)), /* SCIF4 */
-+	SCIF_DATA(SCIF5, 0xe8009800, gic_iid(241)), /* SCIF5 */
-+	SCIF_DATA(SCIF6, 0xe800a000, gic_iid(245)), /* SCIF6 */
-+	SCIF_DATA(SCIF7, 0xe800a800, gic_iid(249)), /* SCIF7 */
-+};
-+
-+static inline void r7s72100_register_scif(int idx)
-+{
-+	platform_device_register_data(&platform_bus, "sh-sci", idx, &scif[idx],
-+				      sizeof(struct plat_sci_port));
-+}
-+
-+void __init r7s72100_add_dt_devices(void)
-+{
-+	r7s72100_register_scif(SCIF0);
-+	r7s72100_register_scif(SCIF1);
-+	r7s72100_register_scif(SCIF2);
-+	r7s72100_register_scif(SCIF3);
-+	r7s72100_register_scif(SCIF4);
-+	r7s72100_register_scif(SCIF5);
-+	r7s72100_register_scif(SCIF6);
-+	r7s72100_register_scif(SCIF7);
-+}
-+
- void __init r7s72100_init_early(void)
- {
- 	shmobile_setup_delay(400, 1, 3); /* Cortex-A9 @ 400MHz */
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0188-sh-pfc-r8a7778-add-USB-pin-groups.patch b/patches.renesas/0188-sh-pfc-r8a7778-add-USB-pin-groups.patch
deleted file mode 100644
index 4f0099972e0cd..0000000000000
--- a/patches.renesas/0188-sh-pfc-r8a7778-add-USB-pin-groups.patch
+++ /dev/null
@@ -1,80 +0,0 @@
-From 324a377b25c8f48279298c74f52dcd864e742786 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Wed, 8 May 2013 23:12:47 +0000
-Subject: sh-pfc: r8a7778: add USB pin groups
-
-Add USB0/1 PENC/USB_OVC pin groups to R8A7778 PFC driver.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Acked-by: Linus Walleij <linus.walleij@linaro.org>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 5cee53b6fc59c60c7fb7328c0a339dd37e6a5105)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7778.c | 28 ++++++++++++++++++++++++++++
- 1 file changed, 28 insertions(+)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7778.c b/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
-index 15295a5b..1f692e5b 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
-@@ -1501,6 +1501,18 @@ SDHI_PFC_WPPN(sdhi2_wp_a,	SD2_WP_A);
- SDHI_PFC_PINS(sdhi2_wp_b,	RCAR_GP_PIN(3, 28));
- SDHI_PFC_WPPN(sdhi2_wp_b,	SD2_WP_B);
- 
-+/* - USB0 ------------------------------------------------------------------- */
-+SH_PFC_PINS(usb0,		RCAR_GP_PIN(0, 1));
-+SH_PFC_MUX1(usb0,		PENC0);
-+SH_PFC_PINS(usb0_ovc,		RCAR_GP_PIN(0, 3));
-+SH_PFC_MUX1(usb0_ovc,		USB_OVC0);
-+
-+/* - USB1 ------------------------------------------------------------------- */
-+SH_PFC_PINS(usb1,		RCAR_GP_PIN(0, 2));
-+SH_PFC_MUX1(usb1,		PENC1);
-+SH_PFC_PINS(usb1_ovc,		RCAR_GP_PIN(0, 4));
-+SH_PFC_MUX1(usb1_ovc,		USB_OVC1);
-+
- static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(hscif0_data_a),
- 	SH_PFC_PIN_GROUP(hscif0_data_b),
-@@ -1570,6 +1582,10 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(sdhi2_data4_b),
- 	SH_PFC_PIN_GROUP(sdhi2_wp_a),
- 	SH_PFC_PIN_GROUP(sdhi2_wp_b),
-+	SH_PFC_PIN_GROUP(usb0),
-+	SH_PFC_PIN_GROUP(usb0_ovc),
-+	SH_PFC_PIN_GROUP(usb1),
-+	SH_PFC_PIN_GROUP(usb1_ovc),
- };
- 
- static const char * const hscif0_groups[] = {
-@@ -1677,6 +1693,16 @@ static const char * const sdhi2_groups[] = {
- 	"sdhi2_wp_b",
- };
- 
-+static const char * const usb0_groups[] = {
-+	"usb0",
-+	"usb0_ovc",
-+};
-+
-+static const char * const usb1_groups[] = {
-+	"usb1",
-+	"usb1_ovc",
-+};
-+
- static const struct sh_pfc_function pinmux_functions[] = {
- 	SH_PFC_FUNCTION(hscif0),
- 	SH_PFC_FUNCTION(hscif1),
-@@ -1690,6 +1716,8 @@ static const struct sh_pfc_function pinmux_functions[] = {
- 	SH_PFC_FUNCTION(sdhi0),
- 	SH_PFC_FUNCTION(sdhi1),
- 	SH_PFC_FUNCTION(sdhi2),
-+	SH_PFC_FUNCTION(usb0),
-+	SH_PFC_FUNCTION(usb1),
- };
- 
- static struct pinmux_cfg_reg pinmux_config_regs[] = {
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0189-ARM-shmobile-r7s72100-Genmai-DT-reference-C-bits.patch b/patches.renesas/0189-ARM-shmobile-r7s72100-Genmai-DT-reference-C-bits.patch
deleted file mode 100644
index e28eba0ea34d1..0000000000000
--- a/patches.renesas/0189-ARM-shmobile-r7s72100-Genmai-DT-reference-C-bits.patch
+++ /dev/null
@@ -1,121 +0,0 @@
-From 37cee5a8532bfbc81ba561aaadda4e47008deb3e Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Thu, 7 Nov 2013 08:31:16 +0900
-Subject: ARM: shmobile: r7s72100 Genmai DT reference C bits
-
-Add C code support for r7s72100 Genmai DT reference.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit c4e337fc0cd5aebda6849fbbecd6cfd645d1bae6)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/Kconfig                  | 11 +++++++
- arch/arm/mach-shmobile/Makefile                 |  1 +
- arch/arm/mach-shmobile/Makefile.boot            |  3 +-
- arch/arm/mach-shmobile/board-genmai-reference.c | 44 +++++++++++++++++++++++++
- 4 files changed, 58 insertions(+), 1 deletion(-)
- create mode 100644 arch/arm/mach-shmobile/board-genmai-reference.c
-
-diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
-index 17a4f409f96d..8bc730890384 100644
---- a/arch/arm/mach-shmobile/Kconfig
-+++ b/arch/arm/mach-shmobile/Kconfig
-@@ -207,6 +207,17 @@ config MACH_GENMAI
- 	depends on ARCH_R7S72100
- 	select USE_OF
- 
-+config MACH_GENMAI_REFERENCE
-+	bool "Genmai board - Reference Device Tree Implementation"
-+	depends on ARCH_R7S72100
-+	select USE_OF
-+	---help---
-+	   Use reference implementation of Genmai board support
-+	   which makes use of device tree at the expense
-+	   of not supporting a number of devices.
-+
-+	   This is intended to aid developers
-+
- config MACH_MARZEN
- 	bool "MARZEN board"
- 	depends on ARCH_R8A7779
-diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
-index 021775de50ae..d2b8342ea242 100644
---- a/arch/arm/mach-shmobile/Makefile
-+++ b/arch/arm/mach-shmobile/Makefile
-@@ -65,6 +65,7 @@ obj-$(CONFIG_MACH_MACKEREL)	+= board-mackerel.o
- obj-$(CONFIG_MACH_BOCKW)	+= board-bockw.o
- obj-$(CONFIG_MACH_BOCKW_REFERENCE)	+= board-bockw-reference.o
- obj-$(CONFIG_MACH_GENMAI)	+= board-genmai.o
-+obj-$(CONFIG_MACH_GENMAI_REFERENCE)	+= board-genmai-reference.o
- obj-$(CONFIG_MACH_MARZEN)	+= board-marzen.o
- obj-$(CONFIG_MACH_MARZEN_REFERENCE)	+= board-marzen-reference.o
- obj-$(CONFIG_MACH_LAGER)	+= board-lager.o
-diff --git a/arch/arm/mach-shmobile/Makefile.boot b/arch/arm/mach-shmobile/Makefile.boot
-index 892d4ab8b23d..759e4f8fcd37 100644
---- a/arch/arm/mach-shmobile/Makefile.boot
-+++ b/arch/arm/mach-shmobile/Makefile.boot
-@@ -6,7 +6,8 @@ loadaddr-$(CONFIG_MACH_ARMADILLO800EVA) += 0x40008000
- loadaddr-$(CONFIG_MACH_ARMADILLO800EVA_REFERENCE) += 0x40008000
- loadaddr-$(CONFIG_MACH_BOCKW) += 0x60008000
- loadaddr-$(CONFIG_MACH_BOCKW_REFERENCE) += 0x60008000
--loadaddr-$(CONFIG_MACH_GENMAI) += 0x8008000
-+loadaddr-$(CONFIG_MACH_GENMAI) += 0x08008000
-+loadaddr-$(CONFIG_MACH_GENMAI_REFERENCE) += 0x08008000
- loadaddr-$(CONFIG_MACH_KOELSCH) += 0x40008000
- loadaddr-$(CONFIG_MACH_KOELSCH_REFERENCE) += 0x40008000
- loadaddr-$(CONFIG_MACH_KZM9G) += 0x41008000
-diff --git a/arch/arm/mach-shmobile/board-genmai-reference.c b/arch/arm/mach-shmobile/board-genmai-reference.c
-new file mode 100644
-index 000000000000..34c98819cf12
---- /dev/null
-+++ b/arch/arm/mach-shmobile/board-genmai-reference.c
-@@ -0,0 +1,44 @@
-+/*
-+ * Genmai board support
-+ *
-+ * Copyright (C) 2013  Renesas Solutions Corp.
-+ * Copyright (C) 2013  Magnus Damm
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; version 2 of the License.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/of_platform.h>
-+#include <mach/common.h>
-+#include <mach/r7s72100.h>
-+#include <asm/mach-types.h>
-+#include <asm/mach/arch.h>
-+
-+static void __init genmai_add_standard_devices(void)
-+{
-+	r7s72100_clock_init();
-+	r7s72100_add_dt_devices();
-+	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
-+}
-+
-+static const char * const genmai_boards_compat_dt[] __initconst = {
-+	"renesas,genmai-reference",
-+	NULL,
-+};
-+
-+DT_MACHINE_START(GENMAI_DT, "genmai")
-+	.init_early	= r7s72100_init_early,
-+	.init_machine	= genmai_add_standard_devices,
-+	.dt_compat	= genmai_boards_compat_dt,
-+MACHINE_END
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0189-ARM-shmobile-r8a7778-split-r8a7778_init_irq_extpin-f.patch b/patches.renesas/0189-ARM-shmobile-r8a7778-split-r8a7778_init_irq_extpin-f.patch
deleted file mode 100644
index e142fd9e29614..0000000000000
--- a/patches.renesas/0189-ARM-shmobile-r8a7778-split-r8a7778_init_irq_extpin-f.patch
+++ /dev/null
@@ -1,63 +0,0 @@
-From 7f2fcbb2707d620ed1cefd60d508367c003c3d9b Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Wed, 2 Oct 2013 01:31:40 -0700
-Subject: ARM: shmobile: r8a7778: split r8a7778_init_irq_extpin() for DT
-
-r8a7778 INTC needs IRL pin mode settings to determine
-behavior of IRQ0 - IRQ3, and r8a7778_init_irq_extpin()
-is controlling it via irlm parameter.
-But this function registers renesas_intc_irqpin driver
-if irlm was set, and this value depends on platform.
-This is not good for DT.
-This patch splits r8a7778_init_irq_extpin() function
-into "mode settings" and "funtion register" parts.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit f564244fb14e0b8b3d8268efbac2e9506644c19f)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/include/mach/r8a7778.h | 1 +
- arch/arm/mach-shmobile/setup-r8a7778.c        | 6 +++++-
- 2 files changed, 6 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/include/mach/r8a7778.h b/arch/arm/mach-shmobile/include/mach/r8a7778.h
-index 6d0abb767764..441886c9714b 100644
---- a/arch/arm/mach-shmobile/include/mach/r8a7778.h
-+++ b/arch/arm/mach-shmobile/include/mach/r8a7778.h
-@@ -38,6 +38,7 @@ extern void r8a7778_init_delay(void);
- extern void r8a7778_init_irq_dt(void);
- extern void r8a7778_clock_init(void);
- extern void r8a7778_init_irq_extpin(int irlm);
-+extern void r8a7778_init_irq_extpin_dt(int irlm);
- extern void r8a7778_pinmux_init(void);
- 
- extern int r8a7778_usb_phy_power(bool enable);
-diff --git a/arch/arm/mach-shmobile/setup-r8a7778.c b/arch/arm/mach-shmobile/setup-r8a7778.c
-index 460814ea3c94..03fcc5974ef9 100644
---- a/arch/arm/mach-shmobile/setup-r8a7778.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7778.c
-@@ -428,7 +428,7 @@ static struct resource irqpin_resources[] __initdata = {
- 	DEFINE_RES_IRQ(gic_iid(0x3e)), /* IRQ3 */
- };
- 
--void __init r8a7778_init_irq_extpin(int irlm)
-+void __init r8a7778_init_irq_extpin_dt(int irlm)
- {
- 	void __iomem *icr0 = ioremap_nocache(0xfe780000, PAGE_SIZE);
- 	unsigned long tmp;
-@@ -446,7 +446,11 @@ void __init r8a7778_init_irq_extpin(int irlm)
- 	tmp |= (1 << 21); /* LVLMODE = 1 */
- 	iowrite32(tmp, icr0);
- 	iounmap(icr0);
-+}
- 
-+void __init r8a7778_init_irq_extpin(int irlm)
-+{
-+	r8a7778_init_irq_extpin_dt(irlm);
- 	if (irlm)
- 		platform_device_register_resndata(
- 			&platform_bus, "renesas_intc_irqpin", -1,
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0189-sh-pfc-sh73a0-Add-TPU-pin-groups-and-functions.patch b/patches.renesas/0189-sh-pfc-sh73a0-Add-TPU-pin-groups-and-functions.patch
deleted file mode 100644
index 47e85ffc61505..0000000000000
--- a/patches.renesas/0189-sh-pfc-sh73a0-Add-TPU-pin-groups-and-functions.patch
+++ /dev/null
@@ -1,261 +0,0 @@
-From 715482e00910ab9a8cfac75de1a324cbab60bab8 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 24 Apr 2013 01:07:16 +0200
-Subject: sh-pfc: sh73a0: Add TPU pin groups and functions
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 5da4eb049de803c7e9b81afbadf9f2e70e34dcae)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-sh73a0.c | 213 ++++++++++++++++++++++++++++++++++++
- 1 file changed, 213 insertions(+)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-sh73a0.c b/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
-index b7837248..78f7ae80 100644
---- a/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
-@@ -2542,6 +2542,157 @@ static const unsigned int sdhi2_ctrl_pins[] = {
- static const unsigned int sdhi2_ctrl_mux[] = {
- 	SDHICMD2_MARK, SDHICLK2_MARK,
- };
-+/* - TPU0 ------------------------------------------------------------------- */
-+static const unsigned int tpu0_to0_pins[] = {
-+	/* TO */
-+	55,
-+};
-+static const unsigned int tpu0_to0_mux[] = {
-+	TPU0TO0_MARK,
-+};
-+static const unsigned int tpu0_to1_pins[] = {
-+	/* TO */
-+	59,
-+};
-+static const unsigned int tpu0_to1_mux[] = {
-+	TPU0TO1_MARK,
-+};
-+static const unsigned int tpu0_to2_pins[] = {
-+	/* TO */
-+	140,
-+};
-+static const unsigned int tpu0_to2_mux[] = {
-+	TPU0TO2_MARK,
-+};
-+static const unsigned int tpu0_to3_pins[] = {
-+	/* TO */
-+	141,
-+};
-+static const unsigned int tpu0_to3_mux[] = {
-+	TPU0TO3_MARK,
-+};
-+/* - TPU1 ------------------------------------------------------------------- */
-+static const unsigned int tpu1_to0_pins[] = {
-+	/* TO */
-+	246,
-+};
-+static const unsigned int tpu1_to0_mux[] = {
-+	TPU1TO0_MARK,
-+};
-+static const unsigned int tpu1_to1_0_pins[] = {
-+	/* TO */
-+	28,
-+};
-+static const unsigned int tpu1_to1_0_mux[] = {
-+	PORT28_TPU1TO1_MARK,
-+};
-+static const unsigned int tpu1_to1_1_pins[] = {
-+	/* TO */
-+	29,
-+};
-+static const unsigned int tpu1_to1_1_mux[] = {
-+	PORT29_TPU1TO1_MARK,
-+};
-+static const unsigned int tpu1_to2_pins[] = {
-+	/* TO */
-+	153,
-+};
-+static const unsigned int tpu1_to2_mux[] = {
-+	TPU1TO2_MARK,
-+};
-+static const unsigned int tpu1_to3_pins[] = {
-+	/* TO */
-+	145,
-+};
-+static const unsigned int tpu1_to3_mux[] = {
-+	TPU1TO3_MARK,
-+};
-+/* - TPU2 ------------------------------------------------------------------- */
-+static const unsigned int tpu2_to0_pins[] = {
-+	/* TO */
-+	248,
-+};
-+static const unsigned int tpu2_to0_mux[] = {
-+	TPU2TO0_MARK,
-+};
-+static const unsigned int tpu2_to1_pins[] = {
-+	/* TO */
-+	197,
-+};
-+static const unsigned int tpu2_to1_mux[] = {
-+	TPU2TO1_MARK,
-+};
-+static const unsigned int tpu2_to2_pins[] = {
-+	/* TO */
-+	50,
-+};
-+static const unsigned int tpu2_to2_mux[] = {
-+	TPU2TO2_MARK,
-+};
-+static const unsigned int tpu2_to3_pins[] = {
-+	/* TO */
-+	51,
-+};
-+static const unsigned int tpu2_to3_mux[] = {
-+	TPU2TO3_MARK,
-+};
-+/* - TPU3 ------------------------------------------------------------------- */
-+static const unsigned int tpu3_to0_pins[] = {
-+	/* TO */
-+	163,
-+};
-+static const unsigned int tpu3_to0_mux[] = {
-+	TPU3TO0_MARK,
-+};
-+static const unsigned int tpu3_to1_pins[] = {
-+	/* TO */
-+	247,
-+};
-+static const unsigned int tpu3_to1_mux[] = {
-+	TPU3TO1_MARK,
-+};
-+static const unsigned int tpu3_to2_pins[] = {
-+	/* TO */
-+	54,
-+};
-+static const unsigned int tpu3_to2_mux[] = {
-+	TPU3TO2_MARK,
-+};
-+static const unsigned int tpu3_to3_pins[] = {
-+	/* TO */
-+	53,
-+};
-+static const unsigned int tpu3_to3_mux[] = {
-+	TPU3TO3_MARK,
-+};
-+/* - TPU4 ------------------------------------------------------------------- */
-+static const unsigned int tpu4_to0_pins[] = {
-+	/* TO */
-+	241,
-+};
-+static const unsigned int tpu4_to0_mux[] = {
-+	TPU4TO0_MARK,
-+};
-+static const unsigned int tpu4_to1_pins[] = {
-+	/* TO */
-+	199,
-+};
-+static const unsigned int tpu4_to1_mux[] = {
-+	TPU4TO1_MARK,
-+};
-+static const unsigned int tpu4_to2_pins[] = {
-+	/* TO */
-+	58,
-+};
-+static const unsigned int tpu4_to2_mux[] = {
-+	TPU4TO2_MARK,
-+};
-+static const unsigned int tpu4_to3_pins[] = {
-+	/* TO */
-+};
-+static const unsigned int tpu4_to3_mux[] = {
-+	TPU4TO3_MARK,
-+};
- /* - USB -------------------------------------------------------------------- */
- static const unsigned int usb_vbus_pins[] = {
- 	/* VBUS */
-@@ -2693,6 +2844,27 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(sdhi2_data1),
- 	SH_PFC_PIN_GROUP(sdhi2_data4),
- 	SH_PFC_PIN_GROUP(sdhi2_ctrl),
-+	SH_PFC_PIN_GROUP(tpu0_to0),
-+	SH_PFC_PIN_GROUP(tpu0_to1),
-+	SH_PFC_PIN_GROUP(tpu0_to2),
-+	SH_PFC_PIN_GROUP(tpu0_to3),
-+	SH_PFC_PIN_GROUP(tpu1_to0),
-+	SH_PFC_PIN_GROUP(tpu1_to1_0),
-+	SH_PFC_PIN_GROUP(tpu1_to1_1),
-+	SH_PFC_PIN_GROUP(tpu1_to2),
-+	SH_PFC_PIN_GROUP(tpu1_to3),
-+	SH_PFC_PIN_GROUP(tpu2_to0),
-+	SH_PFC_PIN_GROUP(tpu2_to1),
-+	SH_PFC_PIN_GROUP(tpu2_to2),
-+	SH_PFC_PIN_GROUP(tpu2_to3),
-+	SH_PFC_PIN_GROUP(tpu3_to0),
-+	SH_PFC_PIN_GROUP(tpu3_to1),
-+	SH_PFC_PIN_GROUP(tpu3_to2),
-+	SH_PFC_PIN_GROUP(tpu3_to3),
-+	SH_PFC_PIN_GROUP(tpu4_to0),
-+	SH_PFC_PIN_GROUP(tpu4_to1),
-+	SH_PFC_PIN_GROUP(tpu4_to2),
-+	SH_PFC_PIN_GROUP(tpu4_to3),
- 	SH_PFC_PIN_GROUP(usb_vbus),
- };
- 
-@@ -2912,6 +3084,42 @@ static const char * const usb_groups[] = {
- 	"usb_vbus",
- };
- 
-+static const char * const tpu0_groups[] = {
-+	"tpu0_to0",
-+	"tpu0_to1",
-+	"tpu0_to2",
-+	"tpu0_to3",
-+};
-+
-+static const char * const tpu1_groups[] = {
-+	"tpu1_to0",
-+	"tpu1_to1_0",
-+	"tpu1_to1_1",
-+	"tpu1_to2",
-+	"tpu1_to3",
-+};
-+
-+static const char * const tpu2_groups[] = {
-+	"tpu2_to0",
-+	"tpu2_to1",
-+	"tpu2_to2",
-+	"tpu2_to3",
-+};
-+
-+static const char * const tpu3_groups[] = {
-+	"tpu3_to0",
-+	"tpu3_to1",
-+	"tpu3_to2",
-+	"tpu3_to3",
-+};
-+
-+static const char * const tpu4_groups[] = {
-+	"tpu4_to0",
-+	"tpu4_to1",
-+	"tpu4_to2",
-+	"tpu4_to3",
-+};
-+
- static const struct sh_pfc_function pinmux_functions[] = {
- 	SH_PFC_FUNCTION(bsc),
- 	SH_PFC_FUNCTION(fsia),
-@@ -2937,6 +3145,11 @@ static const struct sh_pfc_function pinmux_functions[] = {
- 	SH_PFC_FUNCTION(sdhi0),
- 	SH_PFC_FUNCTION(sdhi1),
- 	SH_PFC_FUNCTION(sdhi2),
-+	SH_PFC_FUNCTION(tpu0),
-+	SH_PFC_FUNCTION(tpu1),
-+	SH_PFC_FUNCTION(tpu2),
-+	SH_PFC_FUNCTION(tpu3),
-+	SH_PFC_FUNCTION(tpu4),
- 	SH_PFC_FUNCTION(usb),
- };
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0190-ARM-shmobile-r7s72100-Genmai-Multiplatform.patch b/patches.renesas/0190-ARM-shmobile-r7s72100-Genmai-Multiplatform.patch
deleted file mode 100644
index 77f68603a6d57..0000000000000
--- a/patches.renesas/0190-ARM-shmobile-r7s72100-Genmai-Multiplatform.patch
+++ /dev/null
@@ -1,94 +0,0 @@
-From aa237cf9816986bfcfa158eccd7e0d1d023dd57d Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Thu, 7 Nov 2013 08:31:25 +0900
-Subject: ARM: shmobile: r7s72100 Genmai Multiplatform
-
-Add r7s72100 Genmai to SHMOBILE_MULTI.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 7d91c4691207a302c50308ab38706b8a3d6039cd)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/Makefile                      | 1 +
- arch/arm/mach-shmobile/Kconfig                  | 7 +++++++
- arch/arm/mach-shmobile/Makefile                 | 1 +
- arch/arm/mach-shmobile/board-genmai-reference.c | 5 +++++
- 4 files changed, 14 insertions(+)
-
-diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
-index f73c0a846bab..0eadc1af789b 100644
---- a/arch/arm/boot/dts/Makefile
-+++ b/arch/arm/boot/dts/Makefile
-@@ -177,6 +177,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE_LEGACY) += emev2-kzm9d.dtb \
- 	r8a73a4-ape6evm-reference.dtb \
- 	sh7372-mackerel.dtb
- dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += emev2-kzm9d.dtb \
-+	r7s72100-genmai-reference.dtb \
- 	r8a7791-koelsch-reference.dtb
- dtb-$(CONFIG_ARCH_SOCFPGA) += socfpga_cyclone5.dtb \
- 	socfpga_vt.dtb
-diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
-index 8bc730890384..bb0837b8c05c 100644
---- a/arch/arm/mach-shmobile/Kconfig
-+++ b/arch/arm/mach-shmobile/Kconfig
-@@ -24,12 +24,19 @@ comment "SH-Mobile System Type"
- config ARCH_EMEV2
- 	bool "Emma Mobile EV2"
- 
-+config ARCH_R7S72100
-+	bool "RZ/A1H (R7S72100)"
-+
- config ARCH_R8A7791
- 	bool "R-Car M2 (R8A77910)"
- 	select RENESAS_IRQC
- 
- comment "SH-Mobile Board Type"
- 
-+config MACH_GENMAI
-+	bool "Genmai board"
-+	depends on ARCH_R7S72100
-+
- config MACH_KOELSCH
- 	bool "Koelsch board"
- 	depends on ARCH_R8A7791
-diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
-index d2b8342ea242..1c131046dec6 100644
---- a/arch/arm/mach-shmobile/Makefile
-+++ b/arch/arm/mach-shmobile/Makefile
-@@ -56,6 +56,7 @@ obj-$(CONFIG_ARCH_R8A7779)	+= pm-r8a7779.o
- 
- # Board objects
- ifdef CONFIG_ARCH_SHMOBILE_MULTI
-+obj-$(CONFIG_MACH_GENMAI)	+= board-genmai-reference.o
- obj-$(CONFIG_MACH_KOELSCH)	+= board-koelsch-reference.o
- obj-$(CONFIG_MACH_KZM9D)	+= board-kzm9d-reference.o
- else
-diff --git a/arch/arm/mach-shmobile/board-genmai-reference.c b/arch/arm/mach-shmobile/board-genmai-reference.c
-index 34c98819cf12..7630c1053e32 100644
---- a/arch/arm/mach-shmobile/board-genmai-reference.c
-+++ b/arch/arm/mach-shmobile/board-genmai-reference.c
-@@ -18,6 +18,7 @@
-  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
-  */
- 
-+#include <linux/clk-provider.h>
- #include <linux/kernel.h>
- #include <linux/of_platform.h>
- #include <mach/common.h>
-@@ -27,7 +28,11 @@
- 
- static void __init genmai_add_standard_devices(void)
- {
-+#ifdef CONFIG_COMMON_CLK
-+	of_clk_init(NULL);
-+#else
- 	r7s72100_clock_init();
-+#endif
- 	r7s72100_add_dt_devices();
- 	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0190-ARM-shmobile-r8a7779-split-r8a7779_init_irq_extpin-f.patch b/patches.renesas/0190-ARM-shmobile-r8a7779-split-r8a7779_init_irq_extpin-f.patch
deleted file mode 100644
index 7a544ef2f381c..0000000000000
--- a/patches.renesas/0190-ARM-shmobile-r8a7779-split-r8a7779_init_irq_extpin-f.patch
+++ /dev/null
@@ -1,63 +0,0 @@
-From df636971b70b5ecfbb292f6d48aed25017e81a54 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Wed, 2 Oct 2013 01:38:23 -0700
-Subject: ARM: shmobile: r8a7779: split r8a7779_init_irq_extpin() for DT
-
-r8a7779 INTC needs IRL pin mode settings to determine
-behavior of IRQ0 - IRQ3, and r8a7779_init_irq_extpin()
-is controlling it via irlm parameter.
-But this function registers renesas_intc_irqpin driver
-if irlm was set, and this value depends on platform.
-This is not good for DT.
-This patch splits r8a7779_init_irq_extpin() function
-into "mode settings" and "funtion register" parts
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 90e27a05f64b8b4b6021cd996bef957656a8c8ab)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/include/mach/r8a7779.h | 1 +
- arch/arm/mach-shmobile/setup-r8a7779.c        | 6 +++++-
- 2 files changed, 6 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/include/mach/r8a7779.h b/arch/arm/mach-shmobile/include/mach/r8a7779.h
-index 31e87b92a9c3..17af34ed89c8 100644
---- a/arch/arm/mach-shmobile/include/mach/r8a7779.h
-+++ b/arch/arm/mach-shmobile/include/mach/r8a7779.h
-@@ -33,6 +33,7 @@ static inline struct r8a7779_pm_ch *to_r8a7779_ch(struct generic_pm_domain *d)
- 
- extern void r8a7779_init_delay(void);
- extern void r8a7779_init_irq_extpin(int irlm);
-+extern void r8a7779_init_irq_extpin_dt(int irlm);
- extern void r8a7779_init_irq_dt(void);
- extern void r8a7779_map_io(void);
- extern void r8a7779_earlytimer_init(void);
-diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c
-index eacb2f783693..13049e9d691c 100644
---- a/arch/arm/mach-shmobile/setup-r8a7779.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7779.c
-@@ -98,7 +98,7 @@ static struct resource irqpin0_resources[] __initdata = {
- 	DEFINE_RES_IRQ(gic_spi(30)), /* IRQ3 */
- };
- 
--void __init r8a7779_init_irq_extpin(int irlm)
-+void __init r8a7779_init_irq_extpin_dt(int irlm)
- {
- 	void __iomem *icr0 = ioremap_nocache(0xfe780000, PAGE_SIZE);
- 	u32 tmp;
-@@ -116,7 +116,11 @@ void __init r8a7779_init_irq_extpin(int irlm)
- 	tmp |= (1 << 21); /* LVLMODE = 1 */
- 	iowrite32(tmp, icr0);
- 	iounmap(icr0);
-+}
- 
-+void __init r8a7779_init_irq_extpin(int irlm)
-+{
-+	r8a7779_init_irq_extpin_dt(irlm);
- 	if (irlm)
- 		platform_device_register_resndata(
- 			&platform_bus, "renesas_intc_irqpin", -1,
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0190-sh-pfc-r8a7740-Add-TPU-pin-groups-and-functions.patch b/patches.renesas/0190-sh-pfc-r8a7740-Add-TPU-pin-groups-and-functions.patch
deleted file mode 100644
index 369bef902facd..0000000000000
--- a/patches.renesas/0190-sh-pfc-r8a7740-Add-TPU-pin-groups-and-functions.patch
+++ /dev/null
@@ -1,98 +0,0 @@
-From 1c15fbe8147fac5113bba0252297dedb6221c983 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 23 Apr 2013 16:04:07 +0200
-Subject: sh-pfc: r8a7740: Add TPU pin groups and functions
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit c2ad27e63dac83af4d6acd7af2f424497f1d4c74)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7740.c | 50 ++++++++++++++++++++++++++++++++++++
- 1 file changed, 50 insertions(+)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-index e5ef587a..f6ea47c4 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-@@ -2745,6 +2745,42 @@ static const unsigned int sdhi2_wp_1_pins[] = {
- static const unsigned int sdhi2_wp_1_mux[] = {
- 	SDHI2_WP_PORT25_MARK,
- };
-+/* - TPU0 ------------------------------------------------------------------- */
-+static const unsigned int tpu0_to0_pins[] = {
-+	/* TO */
-+	23,
-+};
-+static const unsigned int tpu0_to0_mux[] = {
-+	TPU0TO0_MARK,
-+};
-+static const unsigned int tpu0_to1_pins[] = {
-+	/* TO */
-+	21,
-+};
-+static const unsigned int tpu0_to1_mux[] = {
-+	TPU0TO1_MARK,
-+};
-+static const unsigned int tpu0_to2_0_pins[] = {
-+	/* TO */
-+	66,
-+};
-+static const unsigned int tpu0_to2_0_mux[] = {
-+	TPU0TO2_PORT66_MARK,
-+};
-+static const unsigned int tpu0_to2_1_pins[] = {
-+	/* TO */
-+	202,
-+};
-+static const unsigned int tpu0_to2_1_mux[] = {
-+	TPU0TO2_PORT202_MARK,
-+};
-+static const unsigned int tpu0_to3_pins[] = {
-+	/* TO */
-+	180,
-+};
-+static const unsigned int tpu0_to3_mux[] = {
-+	TPU0TO3_MARK,
-+};
- 
- static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(bsc_data8),
-@@ -2926,6 +2962,11 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(sdhi2_wp_0),
- 	SH_PFC_PIN_GROUP(sdhi2_cd_1),
- 	SH_PFC_PIN_GROUP(sdhi2_wp_1),
-+	SH_PFC_PIN_GROUP(tpu0_to0),
-+	SH_PFC_PIN_GROUP(tpu0_to1),
-+	SH_PFC_PIN_GROUP(tpu0_to2_0),
-+	SH_PFC_PIN_GROUP(tpu0_to2_1),
-+	SH_PFC_PIN_GROUP(tpu0_to3),
- };
- 
- static const char * const bsc_groups[] = {
-@@ -3176,6 +3217,14 @@ static const char * const sdhi2_groups[] = {
- 	"sdhi2_wp_1",
- };
- 
-+static const char * const tpu0_groups[] = {
-+	"tpu0_to0",
-+	"tpu0_to1",
-+	"tpu0_to2_0",
-+	"tpu0_to2_1",
-+	"tpu0_to3",
-+};
-+
- static const struct sh_pfc_function pinmux_functions[] = {
- 	SH_PFC_FUNCTION(bsc),
- 	SH_PFC_FUNCTION(ceu0),
-@@ -3200,6 +3249,7 @@ static const struct sh_pfc_function pinmux_functions[] = {
- 	SH_PFC_FUNCTION(sdhi0),
- 	SH_PFC_FUNCTION(sdhi1),
- 	SH_PFC_FUNCTION(sdhi2),
-+	SH_PFC_FUNCTION(tpu0),
- };
- 
- #undef PORTCR
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0191-ARM-shmobile-lager-mark-GPIO-keys-as-wake-up-sources.patch b/patches.renesas/0191-ARM-shmobile-lager-mark-GPIO-keys-as-wake-up-sources.patch
deleted file mode 100644
index ce5c2151076dd..0000000000000
--- a/patches.renesas/0191-ARM-shmobile-lager-mark-GPIO-keys-as-wake-up-sources.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From e3601f14ed4ce9d3b56e035b1877aa7de1f3bf9f Mon Sep 17 00:00:00 2001
-From: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
-Date: Thu, 14 Nov 2013 07:40:26 +0900
-Subject: ARM: shmobile: lager: mark GPIO keys as wake-up sources
-
-Enable wakeup for the GPIO keys on the Lager board.
-
-Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit e0554d90b076da1c543b42599c1d6636286ca47f)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-lager.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
-index 27ab664968e8..7861a04ce14c 100644
---- a/arch/arm/mach-shmobile/board-lager.c
-+++ b/arch/arm/mach-shmobile/board-lager.c
-@@ -121,7 +121,7 @@ static const struct gpio_led_platform_data lager_leds_pdata __initconst = {
- /* GPIO KEY */
- #define GPIO_KEY(c, g, d, ...) \
- 	{ .code = c, .gpio = g, .desc = d, .active_low = 1, \
--	  .debounce_interval = 20 }
-+	  .wakeup = 1, .debounce_interval = 20 }
- 
- static struct gpio_keys_button gpio_buttons[] = {
- 	GPIO_KEY(KEY_4,		RCAR_GP_PIN(1, 28),	"SW2-pin4"),
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0191-ARM-shmobile-r8a7791-SMP-support.patch b/patches.renesas/0191-ARM-shmobile-r8a7791-SMP-support.patch
deleted file mode 100644
index 371ea950d24ba..0000000000000
--- a/patches.renesas/0191-ARM-shmobile-r8a7791-SMP-support.patch
+++ /dev/null
@@ -1,128 +0,0 @@
-From 67254fd71e313f20bdc9024401fc64f342b8ec1a Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Tue, 1 Oct 2013 17:13:16 +0900
-Subject: ARM: shmobile: r8a7791 SMP support
-
-Tie in the APMU SMP code on r8a7791. When used together
-with the secondary CPU device node and smp_ops in the
-board specific code then this will allow use of the
-two Cortex-A15 cores in the r8a7791 SoC.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 2349199db55bfb99e2ebdce285a7e297ba63a7ef)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/Makefile               |  1 +
- arch/arm/mach-shmobile/include/mach/r8a7791.h |  1 +
- arch/arm/mach-shmobile/setup-r8a7791.c        |  1 +
- arch/arm/mach-shmobile/smp-r8a7791.c          | 62 +++++++++++++++++++++++++++
- 4 files changed, 65 insertions(+)
- create mode 100644 arch/arm/mach-shmobile/smp-r8a7791.c
-
-diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
-index af9e0ee9bea7..663f8941153a 100644
---- a/arch/arm/mach-shmobile/Makefile
-+++ b/arch/arm/mach-shmobile/Makefile
-@@ -40,6 +40,7 @@ smp-y				:= platsmp.o headsmp.o
- smp-$(CONFIG_ARCH_SH73A0)	+= smp-sh73a0.o headsmp-scu.o platsmp-scu.o
- smp-$(CONFIG_ARCH_R8A7779)	+= smp-r8a7779.o headsmp-scu.o platsmp-scu.o
- smp-$(CONFIG_ARCH_R8A7790)	+= smp-r8a7790.o platsmp-apmu.o
-+smp-$(CONFIG_ARCH_R8A7791)	+= smp-r8a7791.o platsmp-apmu.o
- smp-$(CONFIG_ARCH_EMEV2)	+= smp-emev2.o headsmp-scu.o platsmp-scu.o
- 
- # IRQ objects
-diff --git a/arch/arm/mach-shmobile/include/mach/r8a7791.h b/arch/arm/mach-shmobile/include/mach/r8a7791.h
-index 2a86a5394672..051ead3c286e 100644
---- a/arch/arm/mach-shmobile/include/mach/r8a7791.h
-+++ b/arch/arm/mach-shmobile/include/mach/r8a7791.h
-@@ -5,5 +5,6 @@ void r8a7791_add_standard_devices(void);
- void r8a7791_add_dt_devices(void);
- void r8a7791_clock_init(void);
- void r8a7791_init_early(void);
-+extern struct smp_operations r8a7791_smp_ops;
- 
- #endif /* __ASM_R8A7791_H__ */
-diff --git a/arch/arm/mach-shmobile/setup-r8a7791.c b/arch/arm/mach-shmobile/setup-r8a7791.c
-index cb3859b4cc95..d9393d61ee27 100644
---- a/arch/arm/mach-shmobile/setup-r8a7791.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7791.c
-@@ -176,6 +176,7 @@ static const char *r8a7791_boards_compat_dt[] __initdata = {
- };
- 
- DT_MACHINE_START(R8A7791_DT, "Generic R8A7791 (Flattened Device Tree)")
-+	.smp		= smp_ops(r8a7791_smp_ops),
- 	.init_early	= r8a7791_init_early,
- 	.init_time	= rcar_gen2_timer_init,
- 	.dt_compat	= r8a7791_boards_compat_dt,
-diff --git a/arch/arm/mach-shmobile/smp-r8a7791.c b/arch/arm/mach-shmobile/smp-r8a7791.c
-new file mode 100644
-index 000000000000..2df5bd190fe4
---- /dev/null
-+++ b/arch/arm/mach-shmobile/smp-r8a7791.c
-@@ -0,0 +1,62 @@
-+/*
-+ * SMP support for r8a7791
-+ *
-+ * Copyright (C) 2013 Renesas Solutions Corp.
-+ * Copyright (C) 2013 Magnus Damm
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; version 2 of the License.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ */
-+#include <linux/kernel.h>
-+#include <linux/init.h>
-+#include <linux/smp.h>
-+#include <linux/io.h>
-+#include <asm/smp_plat.h>
-+#include <mach/common.h>
-+#include <mach/r8a7791.h>
-+
-+#define RST		0xe6160000
-+#define CA15BAR		0x0020
-+#define CA15RESCNT	0x0040
-+#define RAM		0xe6300000
-+
-+static void __init r8a7791_smp_prepare_cpus(unsigned int max_cpus)
-+{
-+	void __iomem *p;
-+	u32 bar;
-+
-+	/* let APMU code install data related to shmobile_boot_vector */
-+	shmobile_smp_apmu_prepare_cpus(max_cpus);
-+
-+	/* RAM for jump stub, because BAR requires 256KB aligned address */
-+	p = ioremap_nocache(RAM, shmobile_boot_size);
-+	memcpy_toio(p, shmobile_boot_vector, shmobile_boot_size);
-+	iounmap(p);
-+
-+	/* setup reset vectors */
-+	p = ioremap_nocache(RST, 0x63);
-+	bar = (RAM >> 8) & 0xfffffc00;
-+	writel_relaxed(bar, p + CA15BAR);
-+	writel_relaxed(bar | 0x10, p + CA15BAR);
-+
-+	/* enable clocks to all CPUs */
-+	writel_relaxed((readl_relaxed(p + CA15RESCNT) & ~0x0f) | 0xa5a50000,
-+		       p + CA15RESCNT);
-+	iounmap(p);
-+}
-+
-+struct smp_operations r8a7791_smp_ops __initdata = {
-+	.smp_prepare_cpus	= r8a7791_smp_prepare_cpus,
-+	.smp_boot_secondary	= shmobile_smp_apmu_boot_secondary,
-+#ifdef CONFIG_HOTPLUG_CPU
-+	.cpu_disable		= shmobile_smp_cpu_disable,
-+	.cpu_die		= shmobile_smp_apmu_cpu_die,
-+	.cpu_kill		= shmobile_smp_apmu_cpu_kill,
-+#endif
-+};
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0191-sh-pfc-r8a7790-Add-TPU-pin-groups-and-functions.patch b/patches.renesas/0191-sh-pfc-r8a7790-Add-TPU-pin-groups-and-functions.patch
deleted file mode 100644
index a7aa625e9e0eb..0000000000000
--- a/patches.renesas/0191-sh-pfc-r8a7790-Add-TPU-pin-groups-and-functions.patch
+++ /dev/null
@@ -1,89 +0,0 @@
-From 2f7aa516ddacb03c9926e3a57b2e28aef5b98aa8 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 24 Apr 2013 13:20:17 +0200
-Subject: sh-pfc: r8a7790: Add TPU pin groups and functions
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 682e05a14fb424160bd978bca4e6ba1dcc919f21)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 41 ++++++++++++++++++++++++++++++++++++
- 1 file changed, 41 insertions(+)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-index 1656915a..5be29995 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-@@ -2342,6 +2342,35 @@ static const unsigned int scifb2_data_c_pins[] = {
- static const unsigned int scifb2_data_c_mux[] = {
- 	SCIFB2_RXD_C_MARK, SCIFB2_TXD_C_MARK,
- };
-+/* - TPU0 ------------------------------------------------------------------- */
-+static const unsigned int tpu0_to0_pins[] = {
-+	/* TO */
-+	RCAR_GP_PIN(0, 20),
-+};
-+static const unsigned int tpu0_to0_mux[] = {
-+	TPU0TO0_MARK,
-+};
-+static const unsigned int tpu0_to1_pins[] = {
-+	/* TO */
-+	RCAR_GP_PIN(0, 21),
-+};
-+static const unsigned int tpu0_to1_mux[] = {
-+	TPU0TO1_MARK,
-+};
-+static const unsigned int tpu0_to2_pins[] = {
-+	/* TO */
-+	RCAR_GP_PIN(0, 22),
-+};
-+static const unsigned int tpu0_to2_mux[] = {
-+	TPU0TO2_MARK,
-+};
-+static const unsigned int tpu0_to3_pins[] = {
-+	/* TO */
-+	RCAR_GP_PIN(0, 23),
-+};
-+static const unsigned int tpu0_to3_mux[] = {
-+	TPU0TO3_MARK,
-+};
- 
- static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(eth_link),
-@@ -2416,6 +2445,10 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(scifb2_clk_b),
- 	SH_PFC_PIN_GROUP(scifb2_ctrl_b),
- 	SH_PFC_PIN_GROUP(scifb2_data_c),
-+	SH_PFC_PIN_GROUP(tpu0_to0),
-+	SH_PFC_PIN_GROUP(tpu0_to1),
-+	SH_PFC_PIN_GROUP(tpu0_to2),
-+	SH_PFC_PIN_GROUP(tpu0_to3),
- };
- 
- static const char * const eth_groups[] = {
-@@ -2520,6 +2553,13 @@ static const char * const scifb2_groups[] = {
- 	"scifb2_data_c",
- };
- 
-+static const char * const tpu0_groups[] = {
-+	"tpu0_to0",
-+	"tpu0_to1",
-+	"tpu0_to2",
-+	"tpu0_to3",
-+};
-+
- static const struct sh_pfc_function pinmux_functions[] = {
- 	SH_PFC_FUNCTION(eth),
- 	SH_PFC_FUNCTION(intc),
-@@ -2531,6 +2571,7 @@ static const struct sh_pfc_function pinmux_functions[] = {
- 	SH_PFC_FUNCTION(scifb0),
- 	SH_PFC_FUNCTION(scifb1),
- 	SH_PFC_FUNCTION(scifb2),
-+	SH_PFC_FUNCTION(tpu0),
- };
- 
- static struct pinmux_cfg_reg pinmux_config_regs[] = {
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0192-ARM-shmobile-Use-init_late-on-Koelsch.patch b/patches.renesas/0192-ARM-shmobile-Use-init_late-on-Koelsch.patch
deleted file mode 100644
index 544fcc7dc93e5..0000000000000
--- a/patches.renesas/0192-ARM-shmobile-Use-init_late-on-Koelsch.patch
+++ /dev/null
@@ -1,59 +0,0 @@
-From 9fe189d1773504aaa16e1028c669532902860d61 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Wed, 20 Nov 2013 12:54:34 +0900
-Subject: ARM: shmobile: Use ->init_late() on Koelsch
-
-Hook in shmobile_init_late() on Koelsch. This enables some PM
-related things like CPUIdle and Suspend-to-RAM.
-
-With this patch applied it is possible to use Suspend-to-RAM:
-# echo enabled > /sys/class/tty/ttySC6/power/wakeup
-# echo mem > /sys/power/state
-(wake by sending a character on the serial console)
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 6dc00ab90fa8bc4fec2f9c206ee679d144bc7eb5)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-koelsch-reference.c | 2 ++
- arch/arm/mach-shmobile/board-koelsch.c           | 3 ++-
- 2 files changed, 4 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/board-koelsch-reference.c b/arch/arm/mach-shmobile/board-koelsch-reference.c
-index 25b558f462a3..a804a1798a71 100644
---- a/arch/arm/mach-shmobile/board-koelsch-reference.c
-+++ b/arch/arm/mach-shmobile/board-koelsch-reference.c
-@@ -22,6 +22,7 @@
- #include <linux/clk-provider.h>
- #include <linux/kernel.h>
- #include <linux/of_platform.h>
-+#include <mach/common.h>
- #include <mach/rcar-gen2.h>
- #include <mach/r8a7791.h>
- #include <asm/mach/arch.h>
-@@ -47,5 +48,6 @@ DT_MACHINE_START(KOELSCH_DT, "koelsch")
- 	.init_early	= r8a7791_init_early,
- 	.init_time	= rcar_gen2_timer_init,
- 	.init_machine	= koelsch_add_standard_devices,
-+	.init_late	= shmobile_init_late,
- 	.dt_compat	= koelsch_boards_compat_dt,
- MACHINE_END
-diff --git a/arch/arm/mach-shmobile/board-koelsch.c b/arch/arm/mach-shmobile/board-koelsch.c
-index 5b81a343c5f9..135929b15650 100644
---- a/arch/arm/mach-shmobile/board-koelsch.c
-+++ b/arch/arm/mach-shmobile/board-koelsch.c
-@@ -92,7 +92,8 @@ static const char * const koelsch_boards_compat_dt[] __initconst = {
- DT_MACHINE_START(KOELSCH_DT, "koelsch")
- 	.smp		= smp_ops(r8a7791_smp_ops),
- 	.init_early	= r8a7791_init_early,
--	.init_machine	= koelsch_add_standard_devices,
- 	.init_time	= rcar_gen2_timer_init,
-+	.init_machine	= koelsch_add_standard_devices,
-+	.init_late	= shmobile_init_late,
- 	.dt_compat	= koelsch_boards_compat_dt,
- MACHINE_END
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0192-ARM-shmobile-ape6evm-add-DMA-support-to-MMCIF.patch b/patches.renesas/0192-ARM-shmobile-ape6evm-add-DMA-support-to-MMCIF.patch
deleted file mode 100644
index d403e7743eca6..0000000000000
--- a/patches.renesas/0192-ARM-shmobile-ape6evm-add-DMA-support-to-MMCIF.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From e5642c367c59cc9f21cf24894b33097d1027447c Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Mon, 22 Jul 2013 15:16:16 +0200
-Subject: ARM: shmobile: ape6evm: add DMA support to MMCIF
-
-Add DMA support for MMCIF on APE6EVM, using the shdma dmaengine driver.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 7a2a7a371145e83ad60482313e8cd7501994df3a)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-ape6evm.c | 2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/board-ape6evm.c b/arch/arm/mach-shmobile/board-ape6evm.c
-index 3016f2f8e006..0fa068e30a30 100644
---- a/arch/arm/mach-shmobile/board-ape6evm.c
-+++ b/arch/arm/mach-shmobile/board-ape6evm.c
-@@ -162,6 +162,8 @@ static struct regulator_consumer_supply vcc_sdhi1_consumers[] =
- /* MMCIF */
- static const struct sh_mmcif_plat_data mmcif0_pdata __initconst = {
- 	.caps		= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
-+	.slave_id_tx	= SHDMA_SLAVE_MMCIF0_TX,
-+	.slave_id_rx	= SHDMA_SLAVE_MMCIF0_RX,
- 	.ccs_unsupported = true,
- };
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0192-sh-pfc-sh73a0-Remove-function-GPIOs.patch b/patches.renesas/0192-sh-pfc-sh73a0-Remove-function-GPIOs.patch
deleted file mode 100644
index 5a3a58bd5c8e7..0000000000000
--- a/patches.renesas/0192-sh-pfc-sh73a0-Remove-function-GPIOs.patch
+++ /dev/null
@@ -1,438 +0,0 @@
-From 4c5c29c9dd4f82f79574938bb174f057c9011ef6 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 24 Apr 2013 01:31:10 +0200
-Subject: sh-pfc: sh73a0: Remove function GPIOs
-
-No sh73a0 platform use the function GPIOs API. Remove it.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit a27c5cd1a08cc95c914900cc20277d2f39e02496)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-sh73a0.c | 395 ------------------------------------
- 1 file changed, 395 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-sh73a0.c b/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
-index 78f7ae80..7956df58 100644
---- a/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
-@@ -26,7 +26,6 @@
- #include <linux/regulator/machine.h>
- #include <linux/slab.h>
- 
--#include <mach/sh73a0.h>
- #include <mach/irqs.h>
- 
- #include "core.h"
-@@ -3153,397 +3152,6 @@ static const struct sh_pfc_function pinmux_functions[] = {
- 	SH_PFC_FUNCTION(usb),
- };
- 
--#define PINMUX_FN_BASE	GPIO_FN_GPI0
--
--static const struct pinmux_func pinmux_func_gpios[] = {
--	/* Table 25-1 (Functions 0-7) */
--	GPIO_FN(GPI0),
--	GPIO_FN(GPI1),
--	GPIO_FN(GPI2),
--	GPIO_FN(GPI3),
--	GPIO_FN(GPI4),
--	GPIO_FN(GPI5),
--	GPIO_FN(GPI6),
--	GPIO_FN(GPI7),
--	GPIO_FN(GPO7), \
--	GPIO_FN(MFG0_OUT2),
--	GPIO_FN(GPO6), \
--	GPIO_FN(MFG1_OUT2),
--	GPIO_FN(GPO5), \
--	GPIO_FN(PORT16_VIO_CKOR),
--	GPIO_FN(PORT19_VIO_CKO2),
--	GPIO_FN(GPO0),
--	GPIO_FN(GPO1),
--	GPIO_FN(GPO2), \
--	GPIO_FN(STATUS0),
--	GPIO_FN(GPO3), \
--	GPIO_FN(STATUS1),
--	GPIO_FN(GPO4), \
--	GPIO_FN(STATUS2),
--	GPIO_FN(VINT),
--	GPIO_FN(TCKON),
--	GPIO_FN(XDVFS1), \
--	GPIO_FN(MFG0_OUT1), \
--	GPIO_FN(PORT27_IROUT),
--	GPIO_FN(XDVFS2), \
--	GPIO_FN(PORT28_TPU1TO1),
--	GPIO_FN(SIM_RST), \
--	GPIO_FN(PORT29_TPU1TO1),
--	GPIO_FN(SIM_CLK), \
--	GPIO_FN(PORT30_VIO_CKOR),
--	GPIO_FN(SIM_D), \
--	GPIO_FN(PORT31_IROUT),
--	GPIO_FN(XWUP),
--	GPIO_FN(VACK),
--	GPIO_FN(XTAL1L),
--	GPIO_FN(PORT49_IROUT), \
--	GPIO_FN(BBIF2_TSYNC2), \
--	GPIO_FN(TPU2TO2), \
--
--	GPIO_FN(BBIF2_TSCK2), \
--	GPIO_FN(TPU2TO3), \
--	GPIO_FN(BBIF2_TXD2),
--	GPIO_FN(TPU3TO3), \
--	GPIO_FN(TPU3TO2), \
--	GPIO_FN(TPU0TO0),
--	GPIO_FN(A0), \
--	GPIO_FN(BS_),
--	GPIO_FN(A12), \
--	GPIO_FN(TPU4TO2),
--	GPIO_FN(A13), \
--	GPIO_FN(TPU0TO1),
--	GPIO_FN(A14), \
--	GPIO_FN(A15), \
--	GPIO_FN(A16), \
--	GPIO_FN(MSIOF0_SS1),
--	GPIO_FN(A17), \
--	GPIO_FN(MSIOF0_TSYNC),
--	GPIO_FN(A18), \
--	GPIO_FN(MSIOF0_TSCK),
--	GPIO_FN(A19), \
--	GPIO_FN(MSIOF0_TXD),
--	GPIO_FN(A20), \
--	GPIO_FN(MSIOF0_RSCK),
--	GPIO_FN(A21), \
--	GPIO_FN(MSIOF0_RSYNC),
--	GPIO_FN(A22), \
--	GPIO_FN(MSIOF0_MCK0),
--	GPIO_FN(A23), \
--	GPIO_FN(MSIOF0_MCK1),
--	GPIO_FN(A24), \
--	GPIO_FN(MSIOF0_RXD),
--	GPIO_FN(A25), \
--	GPIO_FN(MSIOF0_SS2),
--	GPIO_FN(A26), \
--	GPIO_FN(FCE1_),
--	GPIO_FN(DACK0),
--	GPIO_FN(FCE0_), \
--	GPIO_FN(WAIT_), \
--	GPIO_FN(DREQ0),
--	GPIO_FN(FRB),
--	GPIO_FN(CKO),
--	GPIO_FN(NBRSTOUT_),
--	GPIO_FN(NBRST_),
--	GPIO_FN(BBIF2_TXD),
--	GPIO_FN(BBIF2_RXD),
--	GPIO_FN(BBIF2_SYNC),
--	GPIO_FN(BBIF2_SCK),
--	GPIO_FN(MFG3_IN2),
--	GPIO_FN(MFG3_IN1),
--	GPIO_FN(BBIF1_SS2), \
--	GPIO_FN(MFG3_OUT1),
--	GPIO_FN(HSI_RX_DATA), \
--	GPIO_FN(BBIF1_RXD),
--	GPIO_FN(HSI_TX_WAKE), \
--	GPIO_FN(BBIF1_TSCK),
--	GPIO_FN(HSI_TX_DATA), \
--	GPIO_FN(BBIF1_TSYNC),
--	GPIO_FN(HSI_TX_READY), \
--	GPIO_FN(BBIF1_TXD),
--	GPIO_FN(HSI_RX_READY), \
--	GPIO_FN(BBIF1_RSCK), \
--	GPIO_FN(HSI_RX_WAKE), \
--	GPIO_FN(BBIF1_RSYNC), \
--	GPIO_FN(HSI_RX_FLAG), \
--	GPIO_FN(BBIF1_SS1), \
--	GPIO_FN(BBIF1_FLOW),
--	GPIO_FN(HSI_TX_FLAG),
--	GPIO_FN(VIO_VD), \
--	GPIO_FN(VIO2_VD), \
--
--	GPIO_FN(VIO_HD), \
--	GPIO_FN(VIO2_HD), \
--	GPIO_FN(VIO_D0), \
--	GPIO_FN(PORT130_MSIOF2_RXD), \
--	GPIO_FN(VIO_D1), \
--	GPIO_FN(PORT131_MSIOF2_SS1), \
--	GPIO_FN(VIO_D2), \
--	GPIO_FN(PORT132_MSIOF2_SS2), \
--	GPIO_FN(VIO_D3), \
--	GPIO_FN(MSIOF2_TSYNC), \
--	GPIO_FN(VIO_D4), \
--	GPIO_FN(MSIOF2_TXD), \
--	GPIO_FN(VIO_D5), \
--	GPIO_FN(MSIOF2_TSCK), \
--	GPIO_FN(VIO_D6), \
--	GPIO_FN(VIO_D7), \
--	GPIO_FN(VIO_D8), \
--	GPIO_FN(VIO2_D0), \
--	GPIO_FN(VIO_D9), \
--	GPIO_FN(VIO2_D1), \
--	GPIO_FN(VIO_D10), \
--	GPIO_FN(TPU0TO2), \
--	GPIO_FN(VIO2_D2), \
--	GPIO_FN(VIO_D11), \
--	GPIO_FN(TPU0TO3), \
--	GPIO_FN(VIO2_D3), \
--	GPIO_FN(VIO_D12), \
--	GPIO_FN(VIO2_D4), \
--	GPIO_FN(VIO_D13), \
--	GPIO_FN(VIO2_D5), \
--	GPIO_FN(VIO_D14), \
--	GPIO_FN(VIO2_D6), \
--	GPIO_FN(VIO_D15), \
--	GPIO_FN(TPU1TO3), \
--	GPIO_FN(VIO2_D7), \
--	GPIO_FN(VIO_CLK), \
--	GPIO_FN(VIO2_CLK), \
--	GPIO_FN(VIO_FIELD), \
--	GPIO_FN(VIO2_FIELD), \
--	GPIO_FN(VIO_CKO),
--	GPIO_FN(A27), \
--	GPIO_FN(MFG0_IN1), \
--	GPIO_FN(MFG0_IN2),
--	GPIO_FN(TS_SPSYNC3), \
--	GPIO_FN(MSIOF2_RSCK),
--	GPIO_FN(TS_SDAT3), \
--	GPIO_FN(MSIOF2_RSYNC),
--	GPIO_FN(TPU1TO2), \
--	GPIO_FN(TS_SDEN3), \
--	GPIO_FN(PORT153_MSIOF2_SS1),
--	GPIO_FN(MSIOF2_MCK0),
--	GPIO_FN(MSIOF2_MCK1),
--	GPIO_FN(PORT156_MSIOF2_SS2),
--	GPIO_FN(PORT157_MSIOF2_RXD),
--	GPIO_FN(DINT_), \
--	GPIO_FN(TS_SCK3),
--	GPIO_FN(NMI),
--	GPIO_FN(TPU3TO0),
--	GPIO_FN(BBIF2_TSYNC1),
--	GPIO_FN(BBIF2_TSCK1),
--	GPIO_FN(BBIF2_TXD1),
--	GPIO_FN(MFG2_OUT2), \
--	GPIO_FN(TPU2TO1),
--	GPIO_FN(TPU4TO1), \
--	GPIO_FN(MFG4_OUT2),
--	GPIO_FN(D16),
--	GPIO_FN(D17),
--	GPIO_FN(D18),
--	GPIO_FN(D19),
--	GPIO_FN(D20),
--	GPIO_FN(D21),
--	GPIO_FN(D22),
--	GPIO_FN(PORT207_MSIOF0L_SS1), \
--	GPIO_FN(D23),
--	GPIO_FN(PORT208_MSIOF0L_SS2), \
--	GPIO_FN(D24),
--	GPIO_FN(D25),
--	GPIO_FN(DREQ2), \
--	GPIO_FN(PORT210_MSIOF0L_SS1), \
--	GPIO_FN(D26),
--	GPIO_FN(PORT211_MSIOF0L_SS2), \
--	GPIO_FN(D27),
--	GPIO_FN(TS_SPSYNC1), \
--	GPIO_FN(MSIOF0L_MCK0), \
--	GPIO_FN(D28),
--	GPIO_FN(TS_SDAT1), \
--	GPIO_FN(MSIOF0L_MCK1), \
--	GPIO_FN(D29),
--	GPIO_FN(TS_SDEN1), \
--	GPIO_FN(MSIOF0L_RSCK), \
--	GPIO_FN(D30),
--	GPIO_FN(TS_SCK1), \
--	GPIO_FN(MSIOF0L_RSYNC), \
--	GPIO_FN(D31),
--	GPIO_FN(DACK2), \
--	GPIO_FN(MSIOF0L_TSYNC), \
--	GPIO_FN(VIO2_FIELD3), \
--	GPIO_FN(DACK3), \
--	GPIO_FN(PORT218_VIO_CKOR),
--	GPIO_FN(DREQ3), \
--	GPIO_FN(MSIOF0L_TSCK), \
--	GPIO_FN(VIO2_CLK3), \
--	GPIO_FN(DREQ1), \
--	GPIO_FN(PWEN), \
--	GPIO_FN(MSIOF0L_RXD), \
--	GPIO_FN(VIO2_HD3), \
--	GPIO_FN(DACK1), \
--	GPIO_FN(OVCN), \
--	GPIO_FN(MSIOF0L_TXD), \
--	GPIO_FN(VIO2_VD3), \
--
--	GPIO_FN(OVCN2),
--	GPIO_FN(EXTLP), \
--	GPIO_FN(PORT226_VIO_CKO2),
--	GPIO_FN(IDIN),
--	GPIO_FN(MFG1_IN1),
--	GPIO_FN(MSIOF1_TXD), \
--	GPIO_FN(MSIOF1_TSYNC), \
--	GPIO_FN(MSIOF1_TSCK), \
--	GPIO_FN(MSIOF1_RXD), \
--	GPIO_FN(MSIOF1_RSCK), \
--	GPIO_FN(VIO2_CLK2), \
--	GPIO_FN(MSIOF1_RSYNC), \
--	GPIO_FN(MFG1_IN2), \
--	GPIO_FN(VIO2_VD2), \
--	GPIO_FN(MSIOF1_MCK0), \
--	GPIO_FN(MSIOF1_MCK1), \
--	GPIO_FN(MSIOF1_SS1), \
--	GPIO_FN(VIO2_FIELD2), \
--	GPIO_FN(MSIOF1_SS2), \
--	GPIO_FN(VIO2_HD2), \
--	GPIO_FN(PORT241_IROUT), \
--	GPIO_FN(MFG4_OUT1), \
--	GPIO_FN(TPU4TO0),
--	GPIO_FN(MFG4_IN2),
--	GPIO_FN(PORT243_VIO_CKO2),
--	GPIO_FN(MFG2_IN1), \
--	GPIO_FN(MSIOF2R_RXD),
--	GPIO_FN(MFG2_IN2), \
--	GPIO_FN(MSIOF2R_TXD),
--	GPIO_FN(MFG1_OUT1), \
--	GPIO_FN(TPU1TO0),
--	GPIO_FN(MFG3_OUT2), \
--	GPIO_FN(TPU3TO1),
--	GPIO_FN(MFG2_OUT1), \
--	GPIO_FN(TPU2TO0), \
--	GPIO_FN(MSIOF2R_TSCK),
--	GPIO_FN(PORT249_IROUT), \
--	GPIO_FN(MFG4_IN1), \
--	GPIO_FN(MSIOF2R_TSYNC),
--	GPIO_FN(SDHICLK0),
--	GPIO_FN(SDHICD0),
--	GPIO_FN(SDHID0_0),
--	GPIO_FN(SDHID0_1),
--	GPIO_FN(SDHID0_2),
--	GPIO_FN(SDHID0_3),
--	GPIO_FN(SDHICMD0),
--	GPIO_FN(SDHIWP0),
--	GPIO_FN(SDHICLK1),
--	GPIO_FN(SDHID1_0), \
--	GPIO_FN(TS_SPSYNC2),
--	GPIO_FN(SDHID1_1), \
--	GPIO_FN(TS_SDAT2),
--	GPIO_FN(SDHID1_2), \
--	GPIO_FN(TS_SDEN2),
--	GPIO_FN(SDHID1_3), \
--	GPIO_FN(TS_SCK2),
--	GPIO_FN(SDHICMD1),
--	GPIO_FN(SDHICLK2),
--	GPIO_FN(SDHID2_0), \
--	GPIO_FN(TS_SPSYNC4),
--	GPIO_FN(SDHID2_1), \
--	GPIO_FN(TS_SDAT4),
--	GPIO_FN(SDHID2_2), \
--	GPIO_FN(TS_SDEN4),
--	GPIO_FN(SDHID2_3), \
--	GPIO_FN(TS_SCK4),
--	GPIO_FN(SDHICMD2),
--	GPIO_FN(MMCCLK0),
--	GPIO_FN(MMCD0_0),
--	GPIO_FN(MMCD0_1),
--	GPIO_FN(MMCD0_2),
--	GPIO_FN(MMCD0_3),
--	GPIO_FN(MMCD0_4), \
--	GPIO_FN(TS_SPSYNC5),
--	GPIO_FN(MMCD0_5), \
--	GPIO_FN(TS_SDAT5),
--	GPIO_FN(MMCD0_6), \
--	GPIO_FN(TS_SDEN5),
--	GPIO_FN(MMCD0_7), \
--	GPIO_FN(TS_SCK5),
--	GPIO_FN(MMCCMD0),
--	GPIO_FN(RESETOUTS_), \
--	GPIO_FN(EXTAL2OUT),
--	GPIO_FN(MCP_WAIT__MCP_FRB),
--	GPIO_FN(MCP_CKO), \
--	GPIO_FN(MMCCLK1),
--	GPIO_FN(MCP_D15_MCP_NAF15),
--	GPIO_FN(MCP_D14_MCP_NAF14),
--	GPIO_FN(MCP_D13_MCP_NAF13),
--	GPIO_FN(MCP_D12_MCP_NAF12),
--	GPIO_FN(MCP_D11_MCP_NAF11),
--	GPIO_FN(MCP_D10_MCP_NAF10),
--	GPIO_FN(MCP_D9_MCP_NAF9),
--	GPIO_FN(MCP_D8_MCP_NAF8), \
--	GPIO_FN(MMCCMD1),
--	GPIO_FN(MCP_D7_MCP_NAF7), \
--	GPIO_FN(MMCD1_7),
--
--	GPIO_FN(MCP_D6_MCP_NAF6), \
--	GPIO_FN(MMCD1_6),
--	GPIO_FN(MCP_D5_MCP_NAF5), \
--	GPIO_FN(MMCD1_5),
--	GPIO_FN(MCP_D4_MCP_NAF4), \
--	GPIO_FN(MMCD1_4),
--	GPIO_FN(MCP_D3_MCP_NAF3), \
--	GPIO_FN(MMCD1_3),
--	GPIO_FN(MCP_D2_MCP_NAF2), \
--	GPIO_FN(MMCD1_2),
--	GPIO_FN(MCP_D1_MCP_NAF1), \
--	GPIO_FN(MMCD1_1),
--	GPIO_FN(MCP_D0_MCP_NAF0), \
--	GPIO_FN(MMCD1_0),
--	GPIO_FN(MCP_NBRSTOUT_),
--	GPIO_FN(MCP_WE0__MCP_FWE), \
--	GPIO_FN(MCP_RDWR_MCP_FWE),
--
--	/* MSEL2 special cases */
--	GPIO_FN(TSIF2_TS_XX1),
--	GPIO_FN(TSIF2_TS_XX2),
--	GPIO_FN(TSIF2_TS_XX3),
--	GPIO_FN(TSIF2_TS_XX4),
--	GPIO_FN(TSIF2_TS_XX5),
--	GPIO_FN(TSIF1_TS_XX1),
--	GPIO_FN(TSIF1_TS_XX2),
--	GPIO_FN(TSIF1_TS_XX3),
--	GPIO_FN(TSIF1_TS_XX4),
--	GPIO_FN(TSIF1_TS_XX5),
--	GPIO_FN(TSIF0_TS_XX1),
--	GPIO_FN(TSIF0_TS_XX2),
--	GPIO_FN(TSIF0_TS_XX3),
--	GPIO_FN(TSIF0_TS_XX4),
--	GPIO_FN(TSIF0_TS_XX5),
--	GPIO_FN(MST1_TS_XX1),
--	GPIO_FN(MST1_TS_XX2),
--	GPIO_FN(MST1_TS_XX3),
--	GPIO_FN(MST1_TS_XX4),
--	GPIO_FN(MST1_TS_XX5),
--	GPIO_FN(MST0_TS_XX1),
--	GPIO_FN(MST0_TS_XX2),
--	GPIO_FN(MST0_TS_XX3),
--	GPIO_FN(MST0_TS_XX4),
--	GPIO_FN(MST0_TS_XX5),
--
--	/* MSEL3 special cases */
--	GPIO_FN(SDHI0_VCCQ_MC0_ON),
--	GPIO_FN(SDHI0_VCCQ_MC0_OFF),
--	GPIO_FN(DEBUG_MON_VIO),
--	GPIO_FN(DEBUG_MON_LCDD),
--	GPIO_FN(LCDC_LCDC0),
--	GPIO_FN(LCDC_LCDC1),
--
--	/* MSEL4 special cases */
--	GPIO_FN(IRQ9_MEM_INT),
--	GPIO_FN(IRQ9_MCP_INT),
--	GPIO_FN(A11),
--	GPIO_FN(TPU4TO3),
--	GPIO_FN(RESETA_N_PU_ON),
--	GPIO_FN(RESETA_N_PU_OFF),
--	GPIO_FN(EDBGREQ_PD),
--	GPIO_FN(EDBGREQ_PU),
--};
--
- #undef PORTCR
- #define PORTCR(nr, reg)							\
- 	{								\
-@@ -4303,9 +3911,6 @@ const struct sh_pfc_soc_info sh73a0_pinmux_info = {
- 	.functions = pinmux_functions,
- 	.nr_functions = ARRAY_SIZE(pinmux_functions),
- 
--	.func_gpios = pinmux_func_gpios,
--	.nr_func_gpios = ARRAY_SIZE(pinmux_func_gpios),
--
- 	.cfg_regs = pinmux_config_regs,
- 	.data_regs = pinmux_data_regs,
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0193-ARM-shmobile-bockw-enable-DMA-for-SDHI0.patch b/patches.renesas/0193-ARM-shmobile-bockw-enable-DMA-for-SDHI0.patch
deleted file mode 100644
index 25c93421d3968..0000000000000
--- a/patches.renesas/0193-ARM-shmobile-bockw-enable-DMA-for-SDHI0.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From efb0eb452a645a1fb6b70415aad111aa9048445d Mon Sep 17 00:00:00 2001
-From: Max Filippov <max.filippov@cogentembedded.com>
-Date: Sun, 25 Aug 2013 01:36:38 +0400
-Subject: ARM: shmobile: bockw: enable DMA for SDHI0
-
-Pass HPB-DMA slave IDs in the SDHI0 platform data to enable DMA in the SDHI
-driver.
-
-Signed-off-by: Max Filippov <max.filippov@cogentembedded.com>
-[Sergei: removed #include <mach/dma.h>]
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-(cherry picked from commit 5d6aa3435275a5308684f90c17424b055ef7f572)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-bockw.c | 2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/board-bockw.c b/arch/arm/mach-shmobile/board-bockw.c
-index 0559f217a5fd..38611526fe9a 100644
---- a/arch/arm/mach-shmobile/board-bockw.c
-+++ b/arch/arm/mach-shmobile/board-bockw.c
-@@ -196,6 +196,8 @@ static struct rcar_phy_platform_data usb_phy_platform_data __initdata =
- 
- /* SDHI */
- static struct sh_mobile_sdhi_info sdhi0_info __initdata = {
-+	.dma_slave_tx	= HPBDMA_SLAVE_SDHI0_TX,
-+	.dma_slave_rx	= HPBDMA_SLAVE_SDHI0_RX,
- 	.tmio_caps	= MMC_CAP_SD_HIGHSPEED,
- 	.tmio_ocr_mask	= MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
- 	.tmio_flags	= TMIO_MMC_HAS_IDLE_WAIT,
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0193-ARM-shmobile-koelsch-mark-GPIO-keys-as-wake-up-sourc.patch b/patches.renesas/0193-ARM-shmobile-koelsch-mark-GPIO-keys-as-wake-up-sourc.patch
deleted file mode 100644
index d18653b3b7ae1..0000000000000
--- a/patches.renesas/0193-ARM-shmobile-koelsch-mark-GPIO-keys-as-wake-up-sourc.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From f6d34964d8b1c6d5d9ca24fcc9c11f5aad0bb898 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Wed, 20 Nov 2013 12:56:38 +0900
-Subject: ARM: shmobile: koelsch: mark GPIO keys as wake-up sources
-
-Enable wakeup for the GPIO keys on the Koelsch board.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit e209456ee86a6fcaa589be14fe48311abf828376)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-koelsch.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/board-koelsch.c b/arch/arm/mach-shmobile/board-koelsch.c
-index 135929b15650..f0fe5d4ba344 100644
---- a/arch/arm/mach-shmobile/board-koelsch.c
-+++ b/arch/arm/mach-shmobile/board-koelsch.c
-@@ -57,7 +57,7 @@ static const struct gpio_led_platform_data koelsch_leds_pdata __initconst = {
- /* GPIO KEY */
- #define GPIO_KEY(c, g, d, ...) \
- 	{ .code = c, .gpio = g, .desc = d, .active_low = 1, \
--	  .debounce_interval = 20 }
-+	  .wakeup = 1, .debounce_interval = 20 }
- 
- static struct gpio_keys_button gpio_buttons[] = {
- 	GPIO_KEY(KEY_4,		RCAR_GP_PIN(5, 3),	"SW2-pin4"),
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0193-sh-pfc-r8a7778-add-VIN-pin-groups.patch b/patches.renesas/0193-sh-pfc-r8a7778-add-VIN-pin-groups.patch
deleted file mode 100644
index a111d56e2ee0b..0000000000000
--- a/patches.renesas/0193-sh-pfc-r8a7778-add-VIN-pin-groups.patch
+++ /dev/null
@@ -1,131 +0,0 @@
-From 9318cdd9451c644f90ffd629a62ad21088d6cbf8 Mon Sep 17 00:00:00 2001
-From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
-Date: Thu, 9 May 2013 03:14:35 +0400
-Subject: sh-pfc: r8a7778: add VIN pin groups
-
-Add VIN DATA[0:8]/CLK/HSYNC/VSYNC pin groups to R8A7778 PFC driver.
-While at it, add SH_PFC_MUX8() macro for 8-bit data busses.
-
-Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
-[Sergei: updated the copyrights, added SH_PFC_MUX8() macro for 8-bit data bus,
-made use of SH_PFC_*() macros to define the pin groups.]
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Acked-by: Linus Walleij <linus.walleij@linaro.org>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-(cherry picked from commit 2d7cd3987056e958af32962d74441dddd70cb8f6)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7778.c | 60 ++++++++++++++++++++++++++++++++++++
- 1 file changed, 60 insertions(+)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7778.c b/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
-index 1f692e5b..e518c33d 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
-@@ -3,6 +3,7 @@
-  *
-  * Copyright (C) 2013  Renesas Solutions Corp.
-  * Copyright (C) 2013  Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-+ * Copyright (C) 2013  Cogent Embedded, Inc.
-  *
-  * based on
-  * Copyright (C) 2011  Renesas Solutions Corp.
-@@ -1316,6 +1317,11 @@ static struct sh_pfc_pin pinmux_pins[] = {
- #define SH_PFC_MUX4(name, arg1, arg2, arg3, arg4)			\
- 	static const unsigned int name ##_mux[]  = { arg1##_MARK, arg2##_MARK, \
- 						     arg3##_MARK, arg4##_MARK }
-+#define SH_PFC_MUX8(name, arg1, arg2, arg3, arg4, arg5, arg6, arg7, arg8) \
-+	static const unsigned int name ##_mux[]  = { arg1##_MARK, arg2##_MARK, \
-+						     arg3##_MARK, arg4##_MARK, \
-+						     arg5##_MARK, arg6##_MARK, \
-+						     arg7##_MARK, arg8##_MARK, }
- 
- /* - SCIF macro ------------------------------------------------------------- */
- #define SCIF_PFC_PIN(name, args...)	SH_PFC_PINS(name, args)
-@@ -1513,6 +1519,40 @@ SH_PFC_MUX1(usb1,		PENC1);
- SH_PFC_PINS(usb1_ovc,		RCAR_GP_PIN(0, 4));
- SH_PFC_MUX1(usb1_ovc,		USB_OVC1);
- 
-+/* - VIN macros ------------------------------------------------------------- */
-+#define VIN_PFC_PINS(name, args...)		SH_PFC_PINS(name, args)
-+#define VIN_PFC_DAT8(name, d0, d1, d2, d3, d4, d5, d6, d7)	\
-+	SH_PFC_MUX8(name, d0, d1, d2, d3, d4, d5, d6, d7)
-+#define VIN_PFC_CLK(name, clk)			SH_PFC_MUX1(name, clk)
-+#define VIN_PFC_SYNC(name, hsync, vsync)	SH_PFC_MUX2(name, hsync, vsync)
-+
-+/* - VIN0 ------------------------------------------------------------------- */
-+VIN_PFC_PINS(vin0_data8,	RCAR_GP_PIN(3, 29),	RCAR_GP_PIN(3, 30),
-+				RCAR_GP_PIN(3, 31),	RCAR_GP_PIN(4, 0),
-+				RCAR_GP_PIN(4, 1),	RCAR_GP_PIN(4, 2),
-+				RCAR_GP_PIN(4, 3),	RCAR_GP_PIN(4, 4));
-+VIN_PFC_DAT8(vin0_data8,	VI0_DATA0_VI0_B0,	VI0_DATA1_VI0_B1,
-+				VI0_DATA2_VI0_B2,	VI0_DATA3_VI0_B3,
-+				VI0_DATA4_VI0_B4,	VI0_DATA5_VI0_B5,
-+				VI0_DATA6_VI0_G0,	VI0_DATA7_VI0_G1);
-+VIN_PFC_PINS(vin0_clk,		RCAR_GP_PIN(3, 24));
-+VIN_PFC_CLK(vin0_clk,		VI0_CLK);
-+VIN_PFC_PINS(vin0_sync,		RCAR_GP_PIN(3, 27),	RCAR_GP_PIN(3, 28));
-+VIN_PFC_SYNC(vin0_sync,		VI0_HSYNC,		VI0_VSYNC);
-+/* - VIN1 ------------------------------------------------------------------- */
-+VIN_PFC_PINS(vin1_data8,	RCAR_GP_PIN(3, 25),	RCAR_GP_PIN(3, 26),
-+				RCAR_GP_PIN(3, 27),	RCAR_GP_PIN(3, 28),
-+				RCAR_GP_PIN(4, 5),	RCAR_GP_PIN(4, 6),
-+				RCAR_GP_PIN(4, 7),	RCAR_GP_PIN(4, 8));
-+VIN_PFC_DAT8(vin1_data8,	VI1_DATA0,		VI1_DATA1,
-+				VI1_DATA2,		VI1_DATA3,
-+				VI1_DATA4,		VI1_DATA5,
-+				VI1_DATA6,		VI1_DATA7);
-+VIN_PFC_PINS(vin1_clk,		RCAR_GP_PIN(4, 9));
-+VIN_PFC_CLK(vin1_clk,		VI1_CLK);
-+VIN_PFC_PINS(vin1_sync,		RCAR_GP_PIN(3, 21),	RCAR_GP_PIN(3, 22));
-+VIN_PFC_SYNC(vin1_sync,		VI1_HSYNC,		VI1_VSYNC);
-+
- static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(hscif0_data_a),
- 	SH_PFC_PIN_GROUP(hscif0_data_b),
-@@ -1586,6 +1626,12 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(usb0_ovc),
- 	SH_PFC_PIN_GROUP(usb1),
- 	SH_PFC_PIN_GROUP(usb1_ovc),
-+	SH_PFC_PIN_GROUP(vin0_data8),
-+	SH_PFC_PIN_GROUP(vin0_clk),
-+	SH_PFC_PIN_GROUP(vin0_sync),
-+	SH_PFC_PIN_GROUP(vin1_data8),
-+	SH_PFC_PIN_GROUP(vin1_clk),
-+	SH_PFC_PIN_GROUP(vin1_sync),
- };
- 
- static const char * const hscif0_groups[] = {
-@@ -1703,6 +1749,18 @@ static const char * const usb1_groups[] = {
- 	"usb1_ovc",
- };
- 
-+static const char * const vin0_groups[] = {
-+	"vin0_data8",
-+	"vin0_clk",
-+	"vin0_sync",
-+};
-+
-+static const char * const vin1_groups[] = {
-+	"vin1_data8",
-+	"vin1_clk",
-+	"vin1_sync",
-+};
-+
- static const struct sh_pfc_function pinmux_functions[] = {
- 	SH_PFC_FUNCTION(hscif0),
- 	SH_PFC_FUNCTION(hscif1),
-@@ -1718,6 +1776,8 @@ static const struct sh_pfc_function pinmux_functions[] = {
- 	SH_PFC_FUNCTION(sdhi2),
- 	SH_PFC_FUNCTION(usb0),
- 	SH_PFC_FUNCTION(usb1),
-+	SH_PFC_FUNCTION(vin0),
-+	SH_PFC_FUNCTION(vin1),
- };
- 
- static struct pinmux_cfg_reg pinmux_config_regs[] = {
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0194-ARM-shmobile-Hook-up-SW30-SW36-on-Koelsch.patch b/patches.renesas/0194-ARM-shmobile-Hook-up-SW30-SW36-on-Koelsch.patch
deleted file mode 100644
index edca0d0d41f01..0000000000000
--- a/patches.renesas/0194-ARM-shmobile-Hook-up-SW30-SW36-on-Koelsch.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 8265559908ac630e92c36c7b002ba2864a88b0ff Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Wed, 20 Nov 2013 13:00:10 +0900
-Subject: ARM: shmobile: Hook up SW30-SW36 on Koelsch
-
-Add support for Koelsch SW30-SW36 using GPIO keys.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 159a282dc3a1bcc9a0cc3a41304c41eef229add1)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-koelsch.c | 7 +++++++
- 1 file changed, 7 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/board-koelsch.c b/arch/arm/mach-shmobile/board-koelsch.c
-index f0fe5d4ba344..412e1539c952 100644
---- a/arch/arm/mach-shmobile/board-koelsch.c
-+++ b/arch/arm/mach-shmobile/board-koelsch.c
-@@ -64,6 +64,13 @@ static struct gpio_keys_button gpio_buttons[] = {
- 	GPIO_KEY(KEY_3,		RCAR_GP_PIN(5, 2),	"SW2-pin3"),
- 	GPIO_KEY(KEY_2,		RCAR_GP_PIN(5, 1),	"SW2-pin2"),
- 	GPIO_KEY(KEY_1,		RCAR_GP_PIN(5, 0),	"SW2-pin1"),
-+	GPIO_KEY(KEY_G,		RCAR_GP_PIN(7, 6),	"SW36"),
-+	GPIO_KEY(KEY_F,		RCAR_GP_PIN(7, 5),	"SW35"),
-+	GPIO_KEY(KEY_E,		RCAR_GP_PIN(7, 4),	"SW34"),
-+	GPIO_KEY(KEY_D,		RCAR_GP_PIN(7, 3),	"SW33"),
-+	GPIO_KEY(KEY_C,		RCAR_GP_PIN(7, 2),	"SW32"),
-+	GPIO_KEY(KEY_B,		RCAR_GP_PIN(7, 1),	"SW31"),
-+	GPIO_KEY(KEY_A,		RCAR_GP_PIN(7, 0),	"SW30"),
- };
- 
- static const struct gpio_keys_platform_data koelsch_keys_pdata __initconst = {
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0194-ARM-shmobile-marzen-enable-DMA-for-SDHI0.patch b/patches.renesas/0194-ARM-shmobile-marzen-enable-DMA-for-SDHI0.patch
deleted file mode 100644
index ae04265f1dc04..0000000000000
--- a/patches.renesas/0194-ARM-shmobile-marzen-enable-DMA-for-SDHI0.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From 8a81ae10b5fe5c72154ad4de6df77bc214ff8b23 Mon Sep 17 00:00:00 2001
-From: Max Filippov <max.filippov@cogentembedded.com>
-Date: Sun, 25 Aug 2013 21:47:26 +0400
-Subject: ARM: shmobile: marzen: enable DMA for SDHI0
-
-Pass HPB-DMA slave IDs in the SDHI0 platform data to enable DMA in the SDHI
-driver.
-
-Signed-off-by: Max Filippov <max.filippov@cogentembedded.com>
-[Sergei: removed #include <mach/dma.h>]
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-(cherry picked from commit e6a8b11b82fdeaa78dad52552f945b772ee1a5c9)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-marzen.c | 2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/board-marzen.c b/arch/arm/mach-shmobile/board-marzen.c
-index 434b213cc738..da1352f5f71b 100644
---- a/arch/arm/mach-shmobile/board-marzen.c
-+++ b/arch/arm/mach-shmobile/board-marzen.c
-@@ -125,6 +125,8 @@ static struct resource sdhi0_resources[] = {
- };
- 
- static struct sh_mobile_sdhi_info sdhi0_platform_data = {
-+	.dma_slave_tx = HPBDMA_SLAVE_SDHI0_TX,
-+	.dma_slave_rx = HPBDMA_SLAVE_SDHI0_RX,
- 	.tmio_flags = TMIO_MMC_WRPROTECT_DISABLE | TMIO_MMC_HAS_IDLE_WAIT,
- 	.tmio_caps = MMC_CAP_SD_HIGHSPEED,
- };
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0194-sh-pfc-r8a7778-add-Ether-pin-groups.patch b/patches.renesas/0194-sh-pfc-r8a7778-add-Ether-pin-groups.patch
deleted file mode 100644
index dbf683107914b..0000000000000
--- a/patches.renesas/0194-sh-pfc-r8a7778-add-Ether-pin-groups.patch
+++ /dev/null
@@ -1,78 +0,0 @@
-From 54a931e8b1f31cd84fd859d40a38f3125e04cb73 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Wed, 8 May 2013 23:15:50 +0000
-Subject: sh-pfc: r8a7778: add Ether pin groups
-
-Add Ether RMII/LINK/MAGIC pin groups to R8A7778 PFC driver.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Acked-by: Laurent Pinchart<laurent.pinchart@ideasonboard.com>
-Acked-by: Linus Walleij <linus.walleij@linaro.org>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 3c5886d145a1bd46601313c735de214bc874aebc)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7778.c | 26 ++++++++++++++++++++++++++
- 1 file changed, 26 insertions(+)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7778.c b/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
-index e518c33d..bc20083b 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
-@@ -1323,6 +1323,22 @@ static struct sh_pfc_pin pinmux_pins[] = {
- 						     arg5##_MARK, arg6##_MARK, \
- 						     arg7##_MARK, arg8##_MARK, }
- 
-+/* - Ether ------------------------------------------------------------------ */
-+SH_PFC_PINS(ether_rmii,		RCAR_GP_PIN(4, 10),	RCAR_GP_PIN(4, 11),
-+				RCAR_GP_PIN(4, 13),	RCAR_GP_PIN(4, 9),
-+				RCAR_GP_PIN(4, 15),	RCAR_GP_PIN(4, 16),
-+				RCAR_GP_PIN(4, 12),	RCAR_GP_PIN(4, 14),
-+				RCAR_GP_PIN(4, 18),	RCAR_GP_PIN(4, 17));
-+static const unsigned int ether_rmii_mux[] = {
-+	ETH_TXD0_MARK, ETH_TXD1_MARK, ETH_TX_EN_MARK,  ETH_REF_CLK_MARK,
-+	ETH_RXD0_MARK, ETH_RXD1_MARK, ETH_CRS_DV_MARK, ETH_RX_ER_MARK,
-+	ETH_MDIO_MARK, ETH_MDC_MARK,
-+};
-+SH_PFC_PINS(ether_link,		RCAR_GP_PIN(4, 19));
-+SH_PFC_MUX1(ether_link,		ETH_LINK);
-+SH_PFC_PINS(ether_magic,	RCAR_GP_PIN(4, 20));
-+SH_PFC_MUX1(ether_magic,	ETH_MAGIC);
-+
- /* - SCIF macro ------------------------------------------------------------- */
- #define SCIF_PFC_PIN(name, args...)	SH_PFC_PINS(name, args)
- #define SCIF_PFC_DAT(name, tx, rx)	SH_PFC_MUX2(name, tx, rx)
-@@ -1554,6 +1570,9 @@ VIN_PFC_PINS(vin1_sync,		RCAR_GP_PIN(3, 21),	RCAR_GP_PIN(3, 22));
- VIN_PFC_SYNC(vin1_sync,		VI1_HSYNC,		VI1_VSYNC);
- 
- static const struct sh_pfc_pin_group pinmux_groups[] = {
-+	SH_PFC_PIN_GROUP(ether_rmii),
-+	SH_PFC_PIN_GROUP(ether_link),
-+	SH_PFC_PIN_GROUP(ether_magic),
- 	SH_PFC_PIN_GROUP(hscif0_data_a),
- 	SH_PFC_PIN_GROUP(hscif0_data_b),
- 	SH_PFC_PIN_GROUP(hscif0_ctrl_a),
-@@ -1634,6 +1653,12 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(vin1_sync),
- };
- 
-+static const char * const ether_groups[] = {
-+	"ether_rmii",
-+	"ether_link",
-+	"ether_magic",
-+};
-+
- static const char * const hscif0_groups[] = {
- 	"hscif0_data_a",
- 	"hscif0_data_b",
-@@ -1762,6 +1787,7 @@ static const char * const vin1_groups[] = {
- };
- 
- static const struct sh_pfc_function pinmux_functions[] = {
-+	SH_PFC_FUNCTION(ether),
- 	SH_PFC_FUNCTION(hscif0),
- 	SH_PFC_FUNCTION(hscif1),
- 	SH_PFC_FUNCTION(scif_clk),
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0195-ARM-shmobile-Genmai-support.patch b/patches.renesas/0195-ARM-shmobile-Genmai-support.patch
deleted file mode 100644
index f2a0199696997..0000000000000
--- a/patches.renesas/0195-ARM-shmobile-Genmai-support.patch
+++ /dev/null
@@ -1,164 +0,0 @@
-From 8e7db3193804025bb826ca6a8bef0148e3582101 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Thu, 19 Sep 2013 05:11:29 +0900
-Subject: ARM: shmobile: Genmai support
-
-Genmai base board support making use of 128 MiB of memory,
-the r7s7211 SoC with the SCIF2 serial port and CA9 core.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit a4ed412ed5934127ba88ba007b9a00617ae47f75)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/Makefile            |  1 +
- arch/arm/boot/dts/r7s72100-genmai.dts | 31 +++++++++++++++++++++++++
- arch/arm/mach-shmobile/Kconfig        |  5 ++++
- arch/arm/mach-shmobile/Makefile       |  1 +
- arch/arm/mach-shmobile/Makefile.boot  |  1 +
- arch/arm/mach-shmobile/board-genmai.c | 43 +++++++++++++++++++++++++++++++++++
- 6 files changed, 82 insertions(+)
- create mode 100644 arch/arm/boot/dts/r7s72100-genmai.dts
- create mode 100644 arch/arm/mach-shmobile/board-genmai.c
-
-diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
-index 037cf904677b..61f8b5143eee 100644
---- a/arch/arm/boot/dts/Makefile
-+++ b/arch/arm/boot/dts/Makefile
-@@ -161,6 +161,7 @@ dtb-$(CONFIG_ARCH_U8500) += snowball.dtb \
- 	ccu9540.dtb
- dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \
- 	emev2-kzm9d-reference.dtb \
-+	r7s72100-genmai.dtb \
- 	r8a7740-armadillo800eva.dtb \
- 	r8a7778-bockw.dtb \
- 	r8a7778-bockw-reference.dtb \
-diff --git a/arch/arm/boot/dts/r7s72100-genmai.dts b/arch/arm/boot/dts/r7s72100-genmai.dts
-new file mode 100644
-index 000000000000..1fb20f2333cc
---- /dev/null
-+++ b/arch/arm/boot/dts/r7s72100-genmai.dts
-@@ -0,0 +1,31 @@
-+/*
-+ * Device Tree Source for the Genmai board
-+ *
-+ * Copyright (C) 2013 Renesas Solutions Corp.
-+ *
-+ * This file is licensed under the terms of the GNU General Public License
-+ * version 2.  This program is licensed "as is" without any warranty of any
-+ * kind, whether express or implied.
-+ */
-+
-+/dts-v1/;
-+/include/ "r7s72100.dtsi"
-+
-+/ {
-+	model = "Genmai";
-+	compatible = "renesas,genmai", "renesas,r7s72100";
-+
-+	chosen {
-+		bootargs = "console=ttySC2,115200 ignore_loglevel rw root=/dev/nfs ip=dhcp";
-+	};
-+
-+	memory {
-+		device_type = "memory";
-+		reg = <0x08000000 0x08000000>;
-+	};
-+
-+	lbsc {
-+		#address-cells = <1>;
-+		#size-cells = <1>;
-+	};
-+};
-diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
-index 6e7d0a9b0be9..6a684ff62124 100644
---- a/arch/arm/mach-shmobile/Kconfig
-+++ b/arch/arm/mach-shmobile/Kconfig
-@@ -191,6 +191,11 @@ config MACH_BOCKW_REFERENCE
- 
- 	   This is intended to aid developers
- 
-+config MACH_GENMAI
-+	bool "Genmai board"
-+	depends on ARCH_R7S72100
-+	select USE_OF
-+
- config MACH_MARZEN
- 	bool "MARZEN board"
- 	depends on ARCH_R8A7779
-diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
-index 663f8941153a..b3840ba1a445 100644
---- a/arch/arm/mach-shmobile/Makefile
-+++ b/arch/arm/mach-shmobile/Makefile
-@@ -60,6 +60,7 @@ obj-$(CONFIG_MACH_APE6EVM_REFERENCE)	+= board-ape6evm-reference.o
- obj-$(CONFIG_MACH_MACKEREL)	+= board-mackerel.o
- obj-$(CONFIG_MACH_BOCKW)	+= board-bockw.o
- obj-$(CONFIG_MACH_BOCKW_REFERENCE)	+= board-bockw-reference.o
-+obj-$(CONFIG_MACH_GENMAI)	+= board-genmai.o
- obj-$(CONFIG_MACH_MARZEN)	+= board-marzen.o
- obj-$(CONFIG_MACH_MARZEN_REFERENCE)	+= board-marzen-reference.o
- obj-$(CONFIG_MACH_LAGER)	+= board-lager.o
-diff --git a/arch/arm/mach-shmobile/Makefile.boot b/arch/arm/mach-shmobile/Makefile.boot
-index 60e29e6c1126..c690b500eb61 100644
---- a/arch/arm/mach-shmobile/Makefile.boot
-+++ b/arch/arm/mach-shmobile/Makefile.boot
-@@ -6,6 +6,7 @@ loadaddr-$(CONFIG_MACH_ARMADILLO800EVA) += 0x40008000
- loadaddr-$(CONFIG_MACH_ARMADILLO800EVA_REFERENCE) += 0x40008000
- loadaddr-$(CONFIG_MACH_BOCKW) += 0x60008000
- loadaddr-$(CONFIG_MACH_BOCKW_REFERENCE) += 0x60008000
-+loadaddr-$(CONFIG_MACH_GENMAI) += 0x8008000
- loadaddr-$(CONFIG_MACH_KOELSCH) += 0x40008000
- loadaddr-$(CONFIG_MACH_KZM9D) += 0x40008000
- loadaddr-$(CONFIG_MACH_KZM9D_REFERENCE) += 0x40008000
-diff --git a/arch/arm/mach-shmobile/board-genmai.c b/arch/arm/mach-shmobile/board-genmai.c
-new file mode 100644
-index 000000000000..3e92e3c62d4c
---- /dev/null
-+++ b/arch/arm/mach-shmobile/board-genmai.c
-@@ -0,0 +1,43 @@
-+/*
-+ * Genmai board support
-+ *
-+ * Copyright (C) 2013  Renesas Solutions Corp.
-+ * Copyright (C) 2013  Magnus Damm
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; version 2 of the License.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/platform_device.h>
-+#include <mach/common.h>
-+#include <mach/r7s72100.h>
-+#include <asm/mach-types.h>
-+#include <asm/mach/arch.h>
-+
-+static void __init genmai_add_standard_devices(void)
-+{
-+	r7s72100_clock_init();
-+	r7s72100_add_dt_devices();
-+}
-+
-+static const char * const genmai_boards_compat_dt[] __initconst = {
-+	"renesas,genmai",
-+	NULL,
-+};
-+
-+DT_MACHINE_START(GENMAI_DT, "genmai")
-+	.init_early	= r7s72100_init_early,
-+	.init_machine	= genmai_add_standard_devices,
-+	.dt_compat	= genmai_boards_compat_dt,
-+MACHINE_END
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0195-ARM-shmobile-Use-init_late-on-Lager.patch b/patches.renesas/0195-ARM-shmobile-Use-init_late-on-Lager.patch
deleted file mode 100644
index c080afe8205b8..0000000000000
--- a/patches.renesas/0195-ARM-shmobile-Use-init_late-on-Lager.patch
+++ /dev/null
@@ -1,56 +0,0 @@
-From 19af200c043cb1bebcb6f74e2e69a6782dad844f Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Wed, 20 Nov 2013 09:02:31 +0900
-Subject: ARM: shmobile: Use ->init_late() on Lager
-
-Hook in shmobile_init_late() on Lager V2. This enables some PM
-related things like CPUIdle and Suspend-to-RAM.
-
-With this patch applied it is possible to use Suspend-to-RAM:
-# echo enabled > /sys/class/tty/ttySC6/power/wakeup
-# echo mem > /sys/power/state
-(wake by sending a character on the serial console)
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 3fbbcbdf57a5172318d10d0f16a4e2d2c595fd75)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-lager-reference.c | 2 ++
- arch/arm/mach-shmobile/board-lager.c           | 1 +
- 2 files changed, 3 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/board-lager-reference.c b/arch/arm/mach-shmobile/board-lager-reference.c
-index 7df9ea0839db..51a3bcc704e5 100644
---- a/arch/arm/mach-shmobile/board-lager-reference.c
-+++ b/arch/arm/mach-shmobile/board-lager-reference.c
-@@ -20,6 +20,7 @@
- 
- #include <linux/init.h>
- #include <linux/of_platform.h>
-+#include <mach/common.h>
- #include <mach/rcar-gen2.h>
- #include <mach/r8a7790.h>
- #include <asm/mach/arch.h>
-@@ -41,5 +42,6 @@ DT_MACHINE_START(LAGER_DT, "lager")
- 	.init_early	= r8a7790_init_early,
- 	.init_time	= rcar_gen2_timer_init,
- 	.init_machine	= lager_add_standard_devices,
-+	.init_late	= shmobile_init_late,
- 	.dt_compat	= lager_boards_compat_dt,
- MACHINE_END
-diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
-index 7861a04ce14c..69dcf55383b7 100644
---- a/arch/arm/mach-shmobile/board-lager.c
-+++ b/arch/arm/mach-shmobile/board-lager.c
-@@ -261,5 +261,6 @@ DT_MACHINE_START(LAGER_DT, "lager")
- 	.init_early	= r8a7790_init_early,
- 	.init_time	= rcar_gen2_timer_init,
- 	.init_machine	= lager_init,
-+	.init_late	= shmobile_init_late,
- 	.dt_compat	= lager_boards_compat_dt,
- MACHINE_END
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0195-sh-pfc-r8a7779-add-Ether-pin-groups.patch b/patches.renesas/0195-sh-pfc-r8a7779-add-Ether-pin-groups.patch
deleted file mode 100644
index 8fb0111782d6c..0000000000000
--- a/patches.renesas/0195-sh-pfc-r8a7779-add-Ether-pin-groups.patch
+++ /dev/null
@@ -1,94 +0,0 @@
-From e6464679c6a2388373a31a366b0f07db793fc0ea Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Wed, 8 May 2013 23:17:33 +0000
-Subject: sh-pfc: r8a7779: add Ether pin groups
-
-Add Ether RMII/LINK/MAGIC pin groups to R8A7779 PFC driver.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Acked-by: Laurent Pinchart<laurent.pinchart@ideasonboard.com>
-Acked-by: Linus Walleij <linus.walleij@linaro.org>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit eca4e3b3ccea8ca2a71bd33ab517d8387536b44d)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7779.c | 42 ++++++++++++++++++++++++++++++++++++
- 1 file changed, 42 insertions(+)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7779.c b/drivers/pinctrl/sh-pfc/pfc-r8a7779.c
-index 37ba5719..96bdf480 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7779.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7779.c
-@@ -1640,6 +1640,38 @@ static const unsigned int du1_cde_pins[] = {
- static const unsigned int du1_cde_mux[] = {
- 	DU1_CDE_MARK
- };
-+/* - Ether ------------------------------------------------------------------ */
-+static const unsigned int ether_rmii_pins[] = {
-+	/*
-+	 * ETH_TXD0, ETH_TXD1, ETH_TX_EN,  ETH_REFCLK,
-+	 * ETH_RXD0, ETH_RXD1, ETH_CRS_DV, ETH_RX_ER,
-+	 * ETH_MDIO, ETH_MDC
-+	 */
-+	RCAR_GP_PIN(2, 27), RCAR_GP_PIN(2, 16), RCAR_GP_PIN(2, 18),
-+	RCAR_GP_PIN(2, 26),
-+	RCAR_GP_PIN(2, 20), RCAR_GP_PIN(2, 21), RCAR_GP_PIN(2, 17),
-+	RCAR_GP_PIN(2, 19),
-+	RCAR_GP_PIN(2, 29), RCAR_GP_PIN(2, 28),
-+};
-+static const unsigned int ether_rmii_mux[] = {
-+	ETH_TXD0_MARK, ETH_TXD1_MARK, ETH_TX_EN_MARK,  ETH_REFCLK_MARK,
-+	ETH_RXD0_MARK, ETH_RXD1_MARK, ETH_CRS_DV_MARK, ETH_RX_ER_MARK,
-+	ETH_MDIO_MARK, ETH_MDC_MARK,
-+};
-+static const unsigned int ether_link_pins[] = {
-+	/* ETH_LINK */
-+	RCAR_GP_PIN(2, 24),
-+};
-+static const unsigned int ether_link_mux[] = {
-+	ETH_LINK_MARK,
-+};
-+static const unsigned int ether_magic_pins[] = {
-+	/* ETH_MAGIC */
-+	RCAR_GP_PIN(2, 25),
-+};
-+static const unsigned int ether_magic_mux[] = {
-+	ETH_MAGIC_MARK,
-+};
- /* - HSPI0 ------------------------------------------------------------------ */
- static const unsigned int hspi0_pins[] = {
- 	/* CLK, CS, RX, TX */
-@@ -2558,6 +2590,9 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(du1_sync_1),
- 	SH_PFC_PIN_GROUP(du1_oddf),
- 	SH_PFC_PIN_GROUP(du1_cde),
-+	SH_PFC_PIN_GROUP(ether_rmii),
-+	SH_PFC_PIN_GROUP(ether_link),
-+	SH_PFC_PIN_GROUP(ether_magic),
- 	SH_PFC_PIN_GROUP(hspi0),
- 	SH_PFC_PIN_GROUP(hspi1),
- 	SH_PFC_PIN_GROUP(hspi1_b),
-@@ -2703,6 +2738,12 @@ static const char * const du1_groups[] = {
- 	"du1_cde",
- };
- 
-+static const char * const ether_groups[] = {
-+	"ether_rmii",
-+	"ether_link",
-+	"ether_magic",
-+};
-+
- static const char * const hspi0_groups[] = {
- 	"hspi0",
- };
-@@ -2898,6 +2939,7 @@ static const char * const vin3_groups[] = {
- static const struct sh_pfc_function pinmux_functions[] = {
- 	SH_PFC_FUNCTION(du0),
- 	SH_PFC_FUNCTION(du1),
-+	SH_PFC_FUNCTION(ether),
- 	SH_PFC_FUNCTION(hspi0),
- 	SH_PFC_FUNCTION(hspi1),
- 	SH_PFC_FUNCTION(hspi2),
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0196-ARM-shmobile-Add-pinctrl_register_mappings-for-Koels.patch b/patches.renesas/0196-ARM-shmobile-Add-pinctrl_register_mappings-for-Koels.patch
deleted file mode 100644
index f5e1bbaa46f63..0000000000000
--- a/patches.renesas/0196-ARM-shmobile-Add-pinctrl_register_mappings-for-Koels.patch
+++ /dev/null
@@ -1,56 +0,0 @@
-From 68e031b3c5909c5112362af3fba6d7aea302c296 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Wed, 20 Nov 2013 16:41:48 +0900
-Subject: ARM: shmobile: Add pinctrl_register_mappings() for Koelsch
-
-Add code to setup the r8a7791 PFC for the Koelsch board.
-
-At this point serial consoles are added, and in the near
-future other platform-device-only devices will be added
-here like for instance the r8a7791 DU.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 85ef14da7337ba2c9b9fc489637e3db3b956b5a0)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-koelsch.c | 12 ++++++++++++
- 1 file changed, 12 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/board-koelsch.c b/arch/arm/mach-shmobile/board-koelsch.c
-index 412e1539c952..6e12914d6d58 100644
---- a/arch/arm/mach-shmobile/board-koelsch.c
-+++ b/arch/arm/mach-shmobile/board-koelsch.c
-@@ -24,6 +24,7 @@
- #include <linux/input.h>
- #include <linux/kernel.h>
- #include <linux/leds.h>
-+#include <linux/pinctrl/machine.h>
- #include <linux/platform_data/gpio-rcar.h>
- #include <linux/platform_device.h>
- #include <mach/common.h>
-@@ -78,9 +79,20 @@ static const struct gpio_keys_platform_data koelsch_keys_pdata __initconst = {
- 	.nbuttons	= ARRAY_SIZE(gpio_buttons),
- };
- 
-+static const struct pinctrl_map koelsch_pinctrl_map[] = {
-+	/* SCIF0 (CN19: DEBUG SERIAL0) */
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.6", "pfc-r8a7791",
-+				  "scif0_data_d", "scif0"),
-+	/* SCIF1 (CN20: DEBUG SERIAL1) */
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.7", "pfc-r8a7791",
-+				  "scif1_data_d", "scif1"),
-+};
-+
- static void __init koelsch_add_standard_devices(void)
- {
- 	r8a7791_clock_init();
-+	pinctrl_register_mappings(koelsch_pinctrl_map,
-+				  ARRAY_SIZE(koelsch_pinctrl_map));
- 	r8a7791_pinmux_init();
- 	r8a7791_add_standard_devices();
- 	platform_device_register_data(&platform_bus, "leds-gpio", -1,
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0196-ARM-shmobile-Use-r8a7791_add_standard_devices-on-Koe.patch b/patches.renesas/0196-ARM-shmobile-Use-r8a7791_add_standard_devices-on-Koe.patch
deleted file mode 100644
index 737dc2321aca1..0000000000000
--- a/patches.renesas/0196-ARM-shmobile-Use-r8a7791_add_standard_devices-on-Koe.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From 930238b37b165e0edad16d6c486dfd7642778f27 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Tue, 1 Oct 2013 17:12:02 +0900
-Subject: ARM: shmobile: Use r8a7791_add_standard_devices() on Koelsch
-
-Use r8a7791_add_standard_devices() on Koelsch to let
-the C version of the board code add on-chip devices.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 0749bead08db4e01588437a05a126bf4774dae23)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-koelsch.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/board-koelsch.c b/arch/arm/mach-shmobile/board-koelsch.c
-index cc2d5e82b59a..278f12e88398 100644
---- a/arch/arm/mach-shmobile/board-koelsch.c
-+++ b/arch/arm/mach-shmobile/board-koelsch.c
-@@ -29,7 +29,7 @@
- static void __init koelsch_add_standard_devices(void)
- {
- 	r8a7791_clock_init();
--	r8a7791_add_dt_devices();
-+	r8a7791_add_standard_devices();
- }
- 
- static const char * const koelsch_boards_compat_dt[] __initconst = {
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0196-sh-pfc-r8a7778-fixup-IRQ1A-settings.patch b/patches.renesas/0196-sh-pfc-r8a7778-fixup-IRQ1A-settings.patch
deleted file mode 100644
index 4c3b02360d0f6..0000000000000
--- a/patches.renesas/0196-sh-pfc-r8a7778-fixup-IRQ1A-settings.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From 89f82bba2f051b11d52461d85f996c9b47f224a2 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Mon, 13 May 2013 21:10:17 -0700
-Subject: sh-pfc: r8a7778: fixup IRQ1A settings
-
-IP2[31] func2 is IRQ1A, not IRQ3A
-
-Reported-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit d64d00504acede6a90f9f49867f7705ba638f121)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7778.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7778.c b/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
-index bc20083b..6b2c6b58 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
-@@ -2080,7 +2080,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
- 			     1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
- 			     1, 1, 1, 1, 3, 2, 3, 3, 3, 3) {
- 		/* IP2_31 [1] */
--		FN_MLB_CLK,	FN_IRQ3_A,
-+		FN_MLB_CLK,	FN_IRQ1_A,
- 		/* IP2_30 [1] */
- 		FN_RD_WR_B,	FN_IRQ0,
- 		/* IP2_29 [1] */
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0197-ARM-shmobile-Use-arch-timer-on-Koelsch.patch b/patches.renesas/0197-ARM-shmobile-Use-arch-timer-on-Koelsch.patch
deleted file mode 100644
index afb1c5a3a1d6c..0000000000000
--- a/patches.renesas/0197-ARM-shmobile-Use-arch-timer-on-Koelsch.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From c683efffcfcb4d8e1121c2ce75272f31b6d809fa Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Tue, 1 Oct 2013 17:12:57 +0900
-Subject: ARM: shmobile: Use arch timer on Koelsch
-
-Make use of the R-Car Gen2 arch timer workaround on Koelsch.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit f9c9eb7e768d049d2ae360be9e09f6a0be03e317)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-koelsch.c | 2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/board-koelsch.c b/arch/arm/mach-shmobile/board-koelsch.c
-index 278f12e88398..ea5846e2e88c 100644
---- a/arch/arm/mach-shmobile/board-koelsch.c
-+++ b/arch/arm/mach-shmobile/board-koelsch.c
-@@ -23,6 +23,7 @@
- #include <linux/platform_device.h>
- #include <mach/common.h>
- #include <mach/r8a7791.h>
-+#include <mach/rcar-gen2.h>
- #include <asm/mach-types.h>
- #include <asm/mach/arch.h>
- 
-@@ -40,5 +41,6 @@ static const char * const koelsch_boards_compat_dt[] __initconst = {
- DT_MACHINE_START(KOELSCH_DT, "koelsch")
- 	.init_early	= r8a7791_init_early,
- 	.init_machine	= koelsch_add_standard_devices,
-+	.init_time	= rcar_gen2_timer_init,
- 	.dt_compat	= koelsch_boards_compat_dt,
- MACHINE_END
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0197-ARM-shmobile-mackerel-clk_round_rate-can-return-a-ze.patch b/patches.renesas/0197-ARM-shmobile-mackerel-clk_round_rate-can-return-a-ze.patch
deleted file mode 100644
index a20acfdeda61e..0000000000000
--- a/patches.renesas/0197-ARM-shmobile-mackerel-clk_round_rate-can-return-a-ze.patch
+++ /dev/null
@@ -1,46 +0,0 @@
-From 9f25fdf13f3192ac91c29d30beaa48a08d27d371 Mon Sep 17 00:00:00 2001
-From: Paul Walmsley <pwalmsley@nvidia.com>
-Date: Tue, 26 Nov 2013 16:49:38 -0800
-Subject: ARM: shmobile: mackerel: clk_round_rate() can return a zero to
- indicate an error
-
-Treat both negative and zero return values from clk_round_rate() as
-errors.  This is needed since subsequent patches will convert
-clk_round_rate()'s return value to be an unsigned type, rather than a
-signed type, since some clock sources can generate rates higher than
-(2^31)-1 Hz.
-
-Eventually, when calling clk_round_rate(), only a return value of zero
-will be considered a error.  All other values will be considered valid
-rates.  The comparison against values less than 0 is kept to preserve
-the correct behavior in the meantime.
-
-Signed-off-by: Paul Walmsley <pwalmsley@nvidia.com>
-Acked-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 90d423faa0ed53cfda9f12d119f6938dd1ab515d)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-mackerel.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c
-index af06753eb809..d90d2f11071b 100644
---- a/arch/arm/mach-shmobile/board-mackerel.c
-+++ b/arch/arm/mach-shmobile/board-mackerel.c
-@@ -548,9 +548,9 @@ static void __init hdmi_init_pm_clock(void)
- 		 clk_get_rate(&sh7372_pllc2_clk));
- 
- 	rate = clk_round_rate(&sh7372_pllc2_clk, 594000000);
--	if (rate < 0) {
-+	if (rate <= 0) {
- 		pr_err("Cannot get suitable rate: %ld\n", rate);
--		ret = rate;
-+		ret = -EINVAL;
- 		goto out;
- 	}
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0197-pinctrl-sh-pfc-fix-r8a7790-Function-Select-register-.patch b/patches.renesas/0197-pinctrl-sh-pfc-fix-r8a7790-Function-Select-register-.patch
deleted file mode 100644
index f11d20f92858b..0000000000000
--- a/patches.renesas/0197-pinctrl-sh-pfc-fix-r8a7790-Function-Select-register-.patch
+++ /dev/null
@@ -1,62 +0,0 @@
-From 4a1e239591ea463754c5e87f5a081a5a340bab2a Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Wed, 15 May 2013 10:46:49 +0000
-Subject: pinctrl: sh-pfc: fix r8a7790 Function Select register tables
-
-Fix several errors in Peripheral Function Select register tables for
-r8a7790, which prevent various function pins from being correctly
-configured.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Acked-by: Linus Walleij <linus.walleij@linaro.org>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 17babad61d7be374cbcaaeff22408912833cc316)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 14 ++++++--------
- 1 file changed, 6 insertions(+), 8 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-index 5be29995..a2f83ae9 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-@@ -3175,7 +3175,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
- 		FN_SIM0_D_B, 0, 0, 0, 0, 0, 0, 0, }
- 	},
- 	{ PINMUX_CFG_REG_VAR("IPSR11", 0xE606004C, 32,
--			     2, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3) {
-+			     2, 3, 3, 2, 4, 3, 2, 2, 2, 2, 2, 1, 4) {
- 		/* IP11_31_30 [2] */
- 		FN_SSI_SCK0129, FN_CAN_CLK_B, FN_MOUT0, 0,
- 		/* IP11_29_27 [3] */
-@@ -3441,12 +3441,10 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
- 		FN_SEL_SOF0_0, FN_SEL_SOF0_1, }
- 	},
- 	{ PINMUX_CFG_REG_VAR("MOD_SEL2", 0xE6060094, 32,
--			     2, 1, 1, 1, 1, 2, 1, 2, 1,
--			     2, 1, 1, 1, 3, 3, 2, 3, 2, 2) {
--		/* RESEVED [2] */
-+			     3, 1, 1, 1, 2, 1, 2, 1, 2,
-+			     1, 1, 1, 3, 3, 2, 3, 2, 2) {
-+		/* RESEVED [3] */
- 		0, 0, 0, 0, 0, 0, 0, 0,
--		/* RESEVED [1] */
--		0, 0,
- 		/* SEL_TMU1 [1] */
- 		FN_SEL_TMU1_0, FN_SEL_TMU1_1,
- 		/* SEL_HSCIF1 [1] */
-@@ -3462,8 +3460,8 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
- 		/* SEL_CAN1 [1] */
- 		FN_SEL_CAN1_0, FN_SEL_CAN1_1,
- 		/* RESEVED [2] */
--		0, 0, 0, 0, 0, 0, 0, 0,
--		/* RESEVED [1] */
-+		0, 0, 0, 0,
-+		/* RESEVED [1] (actually TX2, RX2 vs. TX2_B, RX2_B of SCIF2) */
- 		0, 0,
- 		/* SEL_ADI [1] */
- 		FN_SEL_ADI_0, FN_SEL_ADI_1,
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0198-ARM-shmobile-Lager-add-SPI-FLASH-support-on-QSPI.patch b/patches.renesas/0198-ARM-shmobile-Lager-add-SPI-FLASH-support-on-QSPI.patch
deleted file mode 100644
index 3cfa2be950b5c..0000000000000
--- a/patches.renesas/0198-ARM-shmobile-Lager-add-SPI-FLASH-support-on-QSPI.patch
+++ /dev/null
@@ -1,110 +0,0 @@
-From bc0fb993a37a39b012bb0d393807ee25861691b4 Mon Sep 17 00:00:00 2001
-From: Hiep Cao Minh <cm-hiep@jinso.co.jp>
-Date: Tue, 22 Oct 2013 11:21:12 +0900
-Subject: ARM: shmobile: Lager:add SPI FLASH support on QSPI
-
-This patch enables Spansion S25FL512SAGMFIG11 chip on QSPI,
-Add support for the QSPI interface on Lager.
-
-Signed-off-by: Hiep Cao Minh <cm-hiep@jinso.co.jp>
-Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 24cf82f44213fe4d36157d9920b59420159616ec)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-lager.c | 64 ++++++++++++++++++++++++++++++++++++
- 1 file changed, 64 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
-index 69dcf55383b7..c43d5ccd21f0 100644
---- a/arch/arm/mach-shmobile/board-lager.c
-+++ b/arch/arm/mach-shmobile/board-lager.c
-@@ -39,6 +39,11 @@
- #include <mach/r8a7790.h>
- #include <asm/mach-types.h>
- #include <asm/mach/arch.h>
-+#include <linux/mtd/partitions.h>
-+#include <linux/mtd/mtd.h>
-+#include <linux/spi/flash.h>
-+#include <linux/spi/rspi.h>
-+#include <linux/spi/spi.h>
- 
- /* DU */
- static struct rcar_du_encoder_data lager_du_encoders[] = {
-@@ -166,6 +171,59 @@ static const struct resource ether_resources[] __initconst = {
- 	DEFINE_RES_IRQ(gic_spi(162)),
- };
- 
-+/* SPI Flash memory (Spansion S25FL512SAGMFIG11 64Mb) */
-+static struct mtd_partition spi_flash_part[] = {
-+	/* Reserved for user loader program, read-only */
-+	{
-+		.name = "loader",
-+		.offset = 0,
-+		.size = SZ_256K,
-+		.mask_flags = MTD_WRITEABLE,
-+	},
-+	/* Reserved for user program, read-only */
-+	{
-+		.name = "user",
-+		.offset = MTDPART_OFS_APPEND,
-+		.size = SZ_4M,
-+		.mask_flags = MTD_WRITEABLE,
-+	},
-+	/* All else is writable (e.g. JFFS2) */
-+	{
-+		.name = "flash",
-+		.offset = MTDPART_OFS_APPEND,
-+		.size = MTDPART_SIZ_FULL,
-+		.mask_flags = 0,
-+	},
-+};
-+
-+static struct flash_platform_data spi_flash_data = {
-+	.name           = "m25p80",
-+	.parts          = spi_flash_part,
-+	.nr_parts       = ARRAY_SIZE(spi_flash_part),
-+	.type           = "s25fl512s",
-+};
-+
-+static const struct rspi_plat_data qspi_pdata __initconst = {
-+	.num_chipselect	= 1,
-+};
-+
-+static const struct spi_board_info spi_info[] __initconst = {
-+	{
-+		.modalias               = "m25p80",
-+		.platform_data          = &spi_flash_data,
-+		.mode                   = SPI_MODE_0,
-+		.max_speed_hz           = 30000000,
-+		.bus_num                = 0,
-+		.chip_select            = 0,
-+	},
-+};
-+
-+/* QSPI resource */
-+static const struct resource qspi_resources[] __initconst = {
-+	DEFINE_RES_MEM(0xe6b10000, 0x1000),
-+	DEFINE_RES_IRQ(gic_spi(184)),
-+};
-+
- static const struct pinctrl_map lager_pinctrl_map[] = {
- 	/* DU (CN10: ARGB0, CN13: LVDS) */
- 	PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
-@@ -223,6 +281,12 @@ static void __init lager_add_standard_devices(void)
- 					  &ether_pdata, sizeof(ether_pdata));
- 
- 	lager_add_du_device();
-+
-+	platform_device_register_resndata(&platform_bus, "qspi", 0,
-+					  qspi_resources,
-+					  ARRAY_SIZE(qspi_resources),
-+					  &qspi_pdata, sizeof(qspi_pdata));
-+	spi_register_board_info(spi_info, ARRAY_SIZE(spi_info));
- }
- 
- /*
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0198-ARM-shmobile-Sync-KZM9D-DTS-with-KZM9D-reference-DTS.patch b/patches.renesas/0198-ARM-shmobile-Sync-KZM9D-DTS-with-KZM9D-reference-DTS.patch
deleted file mode 100644
index 703fa9c41b696..0000000000000
--- a/patches.renesas/0198-ARM-shmobile-Sync-KZM9D-DTS-with-KZM9D-reference-DTS.patch
+++ /dev/null
@@ -1,72 +0,0 @@
-From 415ca5c0eec06f8195836f73b4b55eb8b8b41bd6 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Tue, 1 Oct 2013 19:33:05 +0900
-Subject: ARM: shmobile: Sync KZM9D DTS with KZM9D reference DTS
-
-Copy the device nodes from KZM9D reference into the KZM9D
-device tree file. This will allow us to use a single DTS
-file regarless of kernel configuration. In case of legacy
-C board code the device nodes may or may not be used, but
-in the multiplatform case all the DT device nodes are used.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 9e8b48b61aeb2eb9a02e81021bfb8d89ea4645a4)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/emev2-kzm9d.dts | 33 ++++++++++++++++++++++++++++++++-
- 1 file changed, 32 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/boot/dts/emev2-kzm9d.dts b/arch/arm/boot/dts/emev2-kzm9d.dts
-index f92e812fdd9f..861aa7d6fc7d 100644
---- a/arch/arm/boot/dts/emev2-kzm9d.dts
-+++ b/arch/arm/boot/dts/emev2-kzm9d.dts
-@@ -1,7 +1,7 @@
- /*
-  * Device Tree Source for the KZM9D board
-  *
-- * Copyright (C) 2012 Renesas Solutions Corp.
-+ * Copyright (C) 2013 Renesas Solutions Corp.
-  *
-  * This file is licensed under the terms of the GNU General Public License
-  * version 2.  This program is licensed "as is" without any warranty of any
-@@ -23,4 +23,35 @@
- 	chosen {
- 		bootargs = "console=ttyS1,115200n81 ignore_loglevel root=/dev/nfs ip=dhcp";
- 	};
-+
-+	reg_1p8v: regulator@0 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "fixed-1.8V";
-+		regulator-min-microvolt = <1800000>;
-+		regulator-max-microvolt = <1800000>;
-+		regulator-always-on;
-+		regulator-boot-on;
-+	};
-+
-+	reg_3p3v: regulator@1 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "fixed-3.3V";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+		regulator-always-on;
-+		regulator-boot-on;
-+	};
-+
-+	lan9220@20000000 {
-+		compatible = "smsc,lan9220", "smsc,lan9115";
-+		reg = <0x20000000 0x10000>;
-+		phy-mode = "mii";
-+		interrupt-parent = <&gpio0>;
-+		interrupts = <1 1>;	/* active high */
-+		reg-io-width = <4>;
-+		smsc,irq-active-high;
-+		smsc,irq-push-pull;
-+		vddvario-supply = <&reg_1p8v>;
-+		vdd33a-supply = <&reg_3p3v>;
-+	};
- };
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0198-pinctrl-sh-pfc-fix-a-typo-in-pfc-r8a7790.patch b/patches.renesas/0198-pinctrl-sh-pfc-fix-a-typo-in-pfc-r8a7790.patch
deleted file mode 100644
index 787bfc965a175..0000000000000
--- a/patches.renesas/0198-pinctrl-sh-pfc-fix-a-typo-in-pfc-r8a7790.patch
+++ /dev/null
@@ -1,74 +0,0 @@
-From 8b4b029389156416cd18f32fc4e97f0df280c434 Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Wed, 15 May 2013 10:46:54 +0000
-Subject: pinctrl: sh-pfc: fix a typo in pfc-r8a7790
-
-Fix multiple occurrences of the "RESEVED" typo.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Acked-by: Linus Walleij <linus.walleij@linaro.org>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 7f35184b3d49a5420a9f6a6e0a1238bf602c6cb1)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 18 +++++++++---------
- 1 file changed, 9 insertions(+), 9 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-index a2f83ae9..93384227 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-@@ -3443,7 +3443,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
- 	{ PINMUX_CFG_REG_VAR("MOD_SEL2", 0xE6060094, 32,
- 			     3, 1, 1, 1, 2, 1, 2, 1, 2,
- 			     1, 1, 1, 3, 3, 2, 3, 2, 2) {
--		/* RESEVED [3] */
-+		/* RESERVED [3] */
- 		0, 0, 0, 0, 0, 0, 0, 0,
- 		/* SEL_TMU1 [1] */
- 		FN_SEL_TMU1_0, FN_SEL_TMU1_1,
-@@ -3459,9 +3459,9 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
- 		FN_SEL_SCIFA2_0, FN_SEL_SCIFA2_1, FN_SEL_SCIFA2_2, 0,
- 		/* SEL_CAN1 [1] */
- 		FN_SEL_CAN1_0, FN_SEL_CAN1_1,
--		/* RESEVED [2] */
-+		/* RESERVED [2] */
- 		0, 0, 0, 0,
--		/* RESEVED [1] (actually TX2, RX2 vs. TX2_B, RX2_B of SCIF2) */
-+		/* RESERVED [1] (actually TX2, RX2 vs. TX2_B, RX2_B of SCIF2) */
- 		0, 0,
- 		/* SEL_ADI [1] */
- 		FN_SEL_ADI_0, FN_SEL_ADI_1,
-@@ -3490,22 +3490,22 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
- 		FN_SEL_IICDVFS_0, FN_SEL_IICDVFS_1,
- 		/* SEL_IIC0 [1] */
- 		FN_SEL_IIC0_0, FN_SEL_IIC0_1,
--		/* RESEVED [2] */
-+		/* RESERVED [2] */
- 		0, 0, 0, 0,
--		/* RESEVED [4] */
-+		/* RESERVED [4] */
- 		0, 0, 0, 0, 0, 0, 0, 0,
- 		0, 0, 0, 0, 0, 0, 0, 0,
--		/* RESEVED [4] */
-+		/* RESERVED [4] */
- 		0, 0, 0, 0, 0, 0, 0, 0,
- 		0, 0, 0, 0, 0, 0, 0, 0,
--		/* RESEVED [2] */
-+		/* RESERVED [2] */
- 		0, 0, 0, 0,
- 		/* SEL_IEB [2] */
- 		FN_SEL_IEB_0, FN_SEL_IEB_1, FN_SEL_IEB_2, 0,
--		/* RESEVED [4] */
-+		/* RESERVED [4] */
- 		0, 0, 0, 0, 0, 0, 0, 0,
- 		0, 0, 0, 0, 0, 0, 0, 0,
--		/* RESEVED [2] */
-+		/* RESERVED [2] */
- 		0, 0, 0, 0,
- 		/* SEL_IIC2 [3] */
- 		FN_SEL_IIC2_0, FN_SEL_IIC2_1, FN_SEL_IIC2_2, FN_SEL_IIC2_3,
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0199-ARM-shmobile-Use-KZM9D-without-reference-for-multipl.patch b/patches.renesas/0199-ARM-shmobile-Use-KZM9D-without-reference-for-multipl.patch
deleted file mode 100644
index cab5ec01683e7..0000000000000
--- a/patches.renesas/0199-ARM-shmobile-Use-KZM9D-without-reference-for-multipl.patch
+++ /dev/null
@@ -1,67 +0,0 @@
-From 2bb71b0d7e9a7b809391a785318bbc1f6c6b5ab7 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Tue, 1 Oct 2013 19:33:15 +0900
-Subject: ARM: shmobile: Use KZM9D without reference for multiplatform
-
-Change the multiplatform kconfig bits for KZM9D from
-CONFIG_MACH_KZM9D_REFERENCE into CONFIG_MACH_KZM9D
-to match the non-multiplatform case.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 3ae970a688f8f8a74d1b489b8646733a830c904b)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/Kconfig  | 10 ++--------
- arch/arm/mach-shmobile/Makefile |  4 ++++
- 2 files changed, 6 insertions(+), 8 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
-index 6a684ff62124..c9c4f15483bd 100644
---- a/arch/arm/mach-shmobile/Kconfig
-+++ b/arch/arm/mach-shmobile/Kconfig
-@@ -22,16 +22,10 @@ config ARCH_EMEV2
- 
- comment "SH-Mobile Board Type"
- 
--config MACH_KZM9D_REFERENCE
--	bool "KZM9D board - Reference Device Tree Implementation"
-+config MACH_KZM9D
-+	bool "KZM9D board"
- 	depends on ARCH_EMEV2
- 	select REGULATOR_FIXED_VOLTAGE if REGULATOR
--	---help---
--	   Use reference implementation of KZM9D board support
--	   which makes a greater use of device tree at the expense
--	   of not supporting a number of devices.
--
--	   This is intended to aid developers
- 
- comment "SH-Mobile System Configuration"
- endif
-diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
-index b3840ba1a445..b11466d4d944 100644
---- a/arch/arm/mach-shmobile/Makefile
-+++ b/arch/arm/mach-shmobile/Makefile
-@@ -55,6 +55,9 @@ obj-$(CONFIG_ARCH_R8A7740)	+= pm-r8a7740.o pm-rmobile.o
- obj-$(CONFIG_ARCH_R8A7779)	+= pm-r8a7779.o
- 
- # Board objects
-+ifdef CONFIG_ARCH_SHMOBILE_MULTI
-+obj-$(CONFIG_MACH_KZM9D)	+= board-kzm9d-reference.o
-+else
- obj-$(CONFIG_MACH_APE6EVM)	+= board-ape6evm.o
- obj-$(CONFIG_MACH_APE6EVM_REFERENCE)	+= board-ape6evm-reference.o
- obj-$(CONFIG_MACH_MACKEREL)	+= board-mackerel.o
-@@ -72,6 +75,7 @@ obj-$(CONFIG_MACH_KZM9D)	+= board-kzm9d.o
- obj-$(CONFIG_MACH_KZM9D_REFERENCE)	+= board-kzm9d-reference.o
- obj-$(CONFIG_MACH_KZM9G)	+= board-kzm9g.o
- obj-$(CONFIG_MACH_KZM9G_REFERENCE)	+= board-kzm9g-reference.o
-+endif
- 
- # Framework support
- obj-$(CONFIG_SMP)		+= $(smp-y)
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0199-ARM-shmobile-mackerel-Use-pinconf-API-to-configure-p.patch b/patches.renesas/0199-ARM-shmobile-mackerel-Use-pinconf-API-to-configure-p.patch
deleted file mode 100644
index 10dbe801e6b52..0000000000000
--- a/patches.renesas/0199-ARM-shmobile-mackerel-Use-pinconf-API-to-configure-p.patch
+++ /dev/null
@@ -1,108 +0,0 @@
-From 31008881948969dc259c18bacc8576f20cb2afce Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 28 Nov 2013 16:17:58 +0100
-Subject: ARM: shmobile: mackerel: Use pinconf API to configure pin pull-down
-
-The USB0 and USB1 VBUS pins must be pulled down. Add corresponding
-configuration entries in the pinctrl map table instead of manually
-poking the pin control registers.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 3a8067f77fcef7771fb12f14bef847e0b6201e0b)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-mackerel.c | 17 +++++++++--------
- arch/arm/mach-shmobile/sh-gpio.h        | 19 -------------------
- 2 files changed, 9 insertions(+), 27 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c
-index d90d2f11071b..207acf0e07da 100644
---- a/arch/arm/mach-shmobile/board-mackerel.c
-+++ b/arch/arm/mach-shmobile/board-mackerel.c
-@@ -41,6 +41,7 @@
- #include <linux/mtd/physmap.h>
- #include <linux/mtd/sh_flctl.h>
- #include <linux/pinctrl/machine.h>
-+#include <linux/pinctrl/pinconf-generic.h>
- #include <linux/platform_data/gpio_backlight.h>
- #include <linux/pm_clock.h>
- #include <linux/regulator/fixed.h>
-@@ -1311,6 +1312,10 @@ static struct i2c_board_info i2c1_devices[] = {
- 	},
- };
- 
-+static unsigned long pin_pulldown_conf[] = {
-+	PIN_CONF_PACKED(PIN_CONFIG_BIAS_PULL_DOWN, 0),
-+};
-+
- static const struct pinctrl_map mackerel_pinctrl_map[] = {
- 	/* ADXL34X */
- 	PIN_MAP_MUX_GROUP_DEFAULT("1-0053", "pfc-sh7372",
-@@ -1396,17 +1401,19 @@ static const struct pinctrl_map mackerel_pinctrl_map[] = {
- 	/* USBHS0 */
- 	PIN_MAP_MUX_GROUP_DEFAULT("renesas_usbhs.0", "pfc-sh7372",
- 				  "usb0_vbus", "usb0"),
-+	PIN_MAP_CONFIGS_GROUP_DEFAULT("renesas_usbhs.0", "pfc-sh7372",
-+				      "usb0_vbus", pin_pulldown_conf),
- 	/* USBHS1 */
- 	PIN_MAP_MUX_GROUP_DEFAULT("renesas_usbhs.1", "pfc-sh7372",
- 				  "usb1_vbus", "usb1"),
-+	PIN_MAP_CONFIGS_GROUP_DEFAULT("renesas_usbhs.&", "pfc-sh7372",
-+				      "usb1_vbus", pin_pulldown_conf),
- 	PIN_MAP_MUX_GROUP_DEFAULT("renesas_usbhs.1", "pfc-sh7372",
- 				  "usb1_otg_id_0", "usb1"),
- };
- 
- #define GPIO_PORT9CR	IOMEM(0xE6051009)
- #define GPIO_PORT10CR	IOMEM(0xE605100A)
--#define GPIO_PORT167CR	IOMEM(0xE60520A7)
--#define GPIO_PORT168CR	IOMEM(0xE60520A8)
- #define SRCR4		IOMEM(0xe61580bc)
- #define USCCR1		IOMEM(0xE6058144)
- static void __init mackerel_init(void)
-@@ -1446,12 +1453,6 @@ static void __init mackerel_init(void)
- 
- 	gpio_request_one(151, GPIOF_OUT_INIT_HIGH, NULL); /* LCDDON */
- 
--	/* USBHS0 */
--	gpio_request_pulldown(GPIO_PORT168CR); /* VBUS0_0 pull down */
--
--	/* USBHS1 */
--	gpio_request_pulldown(GPIO_PORT167CR); /* VBUS0_1 pull down */
--
- 	/* FSI2 port A (ak4643) */
- 	gpio_request_one(161, GPIOF_OUT_INIT_LOW, NULL); /* slave */
- 
-diff --git a/arch/arm/mach-shmobile/sh-gpio.h b/arch/arm/mach-shmobile/sh-gpio.h
-index e834763ac2a5..2c4141413db9 100644
---- a/arch/arm/mach-shmobile/sh-gpio.h
-+++ b/arch/arm/mach-shmobile/sh-gpio.h
-@@ -26,23 +26,4 @@ static inline void __init gpio_direction_none(void __iomem * addr)
- 	__raw_writeb(0x00, addr);
- }
- 
--static inline void __init gpio_request_pullup(void __iomem * addr)
--{
--	u8 data = __raw_readb(addr);
--
--	data &= 0x0F;
--	data |= 0xC0;
--	__raw_writeb(data, addr);
--}
--
--static inline void __init gpio_request_pulldown(void __iomem * addr)
--{
--	u8 data = __raw_readb(addr);
--
--	data &= 0x0F;
--	data |= 0xA0;
--
--	__raw_writeb(data, addr);
--}
--
- #endif /* __ASM_ARCH_GPIO_H */
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0199-sh-pfc-r8a7778-add-I2C-pin-groups.patch b/patches.renesas/0199-sh-pfc-r8a7778-add-I2C-pin-groups.patch
deleted file mode 100644
index 6e559fab3c102..0000000000000
--- a/patches.renesas/0199-sh-pfc-r8a7778-add-I2C-pin-groups.patch
+++ /dev/null
@@ -1,104 +0,0 @@
-From 1b300068a031d0b9cdec4534b37824df9150f36b Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Wed, 22 May 2013 20:15:53 -0700
-Subject: sh-pfc: r8a7778: add I2C pin groups
-
-Add I2C SDA/SCL pin groups to R8A7778 PFC driver.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 0dcbc69e2bcf99539739f16cff56e48fb3e8229c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7778.c | 54 ++++++++++++++++++++++++++++++++++++
- 1 file changed, 54 insertions(+)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7778.c b/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
-index 6b2c6b58..605f8ae6 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
-@@ -1371,6 +1371,32 @@ SCIF_PFC_CLK(hscif1_clk_a,	HSCK1_A);
- SCIF_PFC_PIN(hscif1_clk_b,	RCAR_GP_PIN(4, 2));
- SCIF_PFC_CLK(hscif1_clk_b,	HSCK1_B);
- 
-+/* - I2C macro ------------------------------------------------------------- */
-+#define I2C_PFC_PIN(name, args...)	SH_PFC_PINS(name, args)
-+#define I2C_PFC_MUX(name, sda, scl)	SH_PFC_MUX2(name, sda, scl)
-+
-+/* - I2C1 ------------------------------------------------------------------ */
-+I2C_PFC_PIN(i2c1_a,	RCAR_GP_PIN(3, 8),	RCAR_GP_PIN(3, 9));
-+I2C_PFC_MUX(i2c1_a,	SDA1_A,			SCL1_A);
-+I2C_PFC_PIN(i2c1_b,	RCAR_GP_PIN(4, 17),	RCAR_GP_PIN(4, 18));
-+I2C_PFC_MUX(i2c1_b,	SDA1_B,			SCL1_B);
-+
-+/* - I2C2 ------------------------------------------------------------------ */
-+I2C_PFC_PIN(i2c2_a,	PIN_NUMBER(3, 20),	RCAR_GP_PIN(1, 3));
-+I2C_PFC_MUX(i2c2_a,	SDA2_A,			SCL2_A);
-+I2C_PFC_PIN(i2c2_b,	RCAR_GP_PIN(0, 3),	RCAR_GP_PIN(0, 4));
-+I2C_PFC_MUX(i2c2_b,	SDA2_B,			SCL2_B);
-+I2C_PFC_PIN(i2c2_c,	RCAR_GP_PIN(4, 15),	RCAR_GP_PIN(4, 16));
-+I2C_PFC_MUX(i2c2_c,	SDA2_C,			SCL2_C);
-+
-+/* - I2C3 ------------------------------------------------------------------ */
-+I2C_PFC_PIN(i2c3_a,	RCAR_GP_PIN(1, 14),	RCAR_GP_PIN(1, 15));
-+I2C_PFC_MUX(i2c3_a,	SDA3_A,			SCL3_A);
-+I2C_PFC_PIN(i2c3_b,	RCAR_GP_PIN(1, 16),	RCAR_GP_PIN(1, 19));
-+I2C_PFC_MUX(i2c3_b,	SDA3_B,			SCL3_B);
-+I2C_PFC_PIN(i2c3_c,	RCAR_GP_PIN(1, 22),	RCAR_GP_PIN(1, 23));
-+I2C_PFC_MUX(i2c3_c,	SDA3_C,			SCL3_C);
-+
- /* - SCIF CLOCK ------------------------------------------------------------- */
- SCIF_PFC_PIN(scif_clk,		RCAR_GP_PIN(1, 16));
- SCIF_PFC_CLK(scif_clk,		SCIF_CLK);
-@@ -1584,6 +1610,14 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(hscif1_ctrl_b),
- 	SH_PFC_PIN_GROUP(hscif1_clk_a),
- 	SH_PFC_PIN_GROUP(hscif1_clk_b),
-+	SH_PFC_PIN_GROUP(i2c1_a),
-+	SH_PFC_PIN_GROUP(i2c1_b),
-+	SH_PFC_PIN_GROUP(i2c2_a),
-+	SH_PFC_PIN_GROUP(i2c2_b),
-+	SH_PFC_PIN_GROUP(i2c2_c),
-+	SH_PFC_PIN_GROUP(i2c3_a),
-+	SH_PFC_PIN_GROUP(i2c3_b),
-+	SH_PFC_PIN_GROUP(i2c3_c),
- 	SH_PFC_PIN_GROUP(scif_clk),
- 	SH_PFC_PIN_GROUP(scif0_data_a),
- 	SH_PFC_PIN_GROUP(scif0_data_b),
-@@ -1676,6 +1710,23 @@ static const char * const hscif1_groups[] = {
- 	"hscif1_clk_b",
- };
- 
-+static const char * const i2c1_groups[] = {
-+	"i2c1_a",
-+	"i2c1_b",
-+};
-+
-+static const char * const i2c2_groups[] = {
-+	"i2c2_a",
-+	"i2c2_b",
-+	"i2c2_c",
-+};
-+
-+static const char * const i2c3_groups[] = {
-+	"i2c3_a",
-+	"i2c3_b",
-+	"i2c3_c",
-+};
-+
- static const char * const scif_clk_groups[] = {
- 	"scif_clk",
- };
-@@ -1790,6 +1841,9 @@ static const struct sh_pfc_function pinmux_functions[] = {
- 	SH_PFC_FUNCTION(ether),
- 	SH_PFC_FUNCTION(hscif0),
- 	SH_PFC_FUNCTION(hscif1),
-+	SH_PFC_FUNCTION(i2c1),
-+	SH_PFC_FUNCTION(i2c2),
-+	SH_PFC_FUNCTION(i2c3),
- 	SH_PFC_FUNCTION(scif_clk),
- 	SH_PFC_FUNCTION(scif0),
- 	SH_PFC_FUNCTION(scif1),
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0200-ARM-Kconfig-Mention-Renesas-ARM-SoCs-instead-of-SH-M.patch b/patches.renesas/0200-ARM-Kconfig-Mention-Renesas-ARM-SoCs-instead-of-SH-M.patch
deleted file mode 100644
index 82013d288de37..0000000000000
--- a/patches.renesas/0200-ARM-Kconfig-Mention-Renesas-ARM-SoCs-instead-of-SH-M.patch
+++ /dev/null
@@ -1,128 +0,0 @@
-From 002eafe3085abe2f41b9fe15f384112dc9ce0784 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 28 Nov 2013 17:27:29 +0100
-Subject: ARM: Kconfig: Mention Renesas ARM SoCs instead of SH-Mobile
-
-Only the SH-Mobile product name is mentioned in the Kconfig descriptions
-and help texts. This makes it difficult for external engineers working
-on other Renesas platforms to find upstream platform support as the
-combination of the SH-Mobile name and using the product number proved an
-effective method of concealment.
-
-Replace the "SH-Mobile" name with "Renesas ARM SoCs" in all the related
-descriptions, help texts and comments.
-
-Reported-by: Phil Edworthy <phil.edworthy@renesas.com>
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 0d9fd6165a01093ac82c1088d0544a304f72b4d6)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/Kconfig               |  7 ++++---
- arch/arm/mach-shmobile/Kconfig | 18 +++++++++---------
- 2 files changed, 13 insertions(+), 12 deletions(-)
-
-diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
-index e965fda96875..3c4dd82f48f4 100644
---- a/arch/arm/Kconfig
-+++ b/arch/arm/Kconfig
-@@ -633,7 +633,7 @@ config ARCH_MSM
- 	  (clock and power control, etc).
- 
- config ARCH_SHMOBILE_LEGACY
--	bool "Renesas SH-Mobile / R-Mobile (non-multiplatform)"
-+	bool "Renesas ARM SoCs (non-multiplatform)"
- 	select ARCH_SHMOBILE
- 	select ARM_PATCH_PHYS_VIRT
- 	select CLKDEV_LOOKUP
-@@ -650,8 +650,9 @@ config ARCH_SHMOBILE_LEGACY
- 	select PM_GENERIC_DOMAINS if PM
- 	select SPARSE_IRQ
- 	help
--	  Support for Renesas's SH-Mobile and R-Mobile ARM platforms using
--	  a non-multiplatform kernel.
-+	  Support for Renesas ARM SoC platforms using a non-multiplatform
-+	  kernel. This includes the SH-Mobile, R-Mobile, EMMA-Mobile, R-Car
-+	  and RZ families.
- 
- config ARCH_RPC
- 	bool "RiscPC"
-diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
-index bb0837b8c05c..3e57d457308a 100644
---- a/arch/arm/mach-shmobile/Kconfig
-+++ b/arch/arm/mach-shmobile/Kconfig
-@@ -2,7 +2,7 @@ config ARCH_SHMOBILE
- 	bool
- 
- config ARCH_SHMOBILE_MULTI
--	bool "SH-Mobile Series" if ARCH_MULTI_V7
-+	bool "Renesas ARM SoCs" if ARCH_MULTI_V7
- 	depends on MMU
- 	select ARCH_SHMOBILE
- 	select CPU_V7
-@@ -19,7 +19,7 @@ config ARCH_SHMOBILE_MULTI
- 
- if ARCH_SHMOBILE_MULTI
- 
--comment "SH-Mobile System Type"
-+comment "Renesas ARM SoCs System Type"
- 
- config ARCH_EMEV2
- 	bool "Emma Mobile EV2"
-@@ -31,7 +31,7 @@ config ARCH_R8A7791
- 	bool "R-Car M2 (R8A77910)"
- 	select RENESAS_IRQC
- 
--comment "SH-Mobile Board Type"
-+comment "Renesas ARM SoCs Board Type"
- 
- config MACH_GENMAI
- 	bool "Genmai board"
-@@ -46,12 +46,12 @@ config MACH_KZM9D
- 	depends on ARCH_EMEV2
- 	select REGULATOR_FIXED_VOLTAGE if REGULATOR
- 
--comment "SH-Mobile System Configuration"
-+comment "Renesas ARM SoCs System Configuration"
- endif
- 
- if ARCH_SHMOBILE_LEGACY
- 
--comment "SH-Mobile System Type"
-+comment "Renesas ARM SoCs System Type"
- 
- config ARCH_SH7372
- 	bool "SH-Mobile AP4 (SH7372)"
-@@ -137,7 +137,7 @@ config ARCH_R7S72100
- 	select CPU_V7
- 	select SH_CLK_CPG
- 
--comment "SH-Mobile Board Type"
-+comment "Renesas ARM SoCs Board Type"
- 
- config MACH_APE6EVM
- 	bool "APE6EVM board"
-@@ -301,7 +301,7 @@ config MACH_KZM9G_REFERENCE
- 
- 	   This is intended to aid developers
- 
--comment "SH-Mobile System Configuration"
-+comment "Renesas ARM SoCs System Configuration"
- 
- config CPU_HAS_INTEVT
-         bool
-@@ -326,8 +326,8 @@ config SHMOBILE_TIMER_HZ
- 	  Allows the configuration of the timer frequency. It is customary
- 	  to have the timer interrupt run at 1000 Hz or 100 Hz, but in the
- 	  case of low timer frequencies other values may be more suitable.
--	  SH-Mobile systems using a 32768 Hz RCLK for clock events may want
--	  to select a HZ value such as 128 that can evenly divide RCLK.
-+	  Renesas ARM SoC systems using a 32768 Hz RCLK for clock events may
-+	  want to select a HZ value such as 128 that can evenly divide RCLK.
- 	  A HZ value that does not divide evenly may cause timer drift.
- 
- config SH_TIMER_CMT
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0200-ARM-shmobile-Remove-non-multiplatform-KZM9D-referenc.patch b/patches.renesas/0200-ARM-shmobile-Remove-non-multiplatform-KZM9D-referenc.patch
deleted file mode 100644
index 7c5c286fcdb95..0000000000000
--- a/patches.renesas/0200-ARM-shmobile-Remove-non-multiplatform-KZM9D-referenc.patch
+++ /dev/null
@@ -1,77 +0,0 @@
-From a7b778e8aa30019c730262bbd25049eab93f6f64 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Tue, 1 Oct 2013 19:33:24 +0900
-Subject: ARM: shmobile: Remove non-multiplatform KZM9D reference support
-
-Now when CCF is supported remove the legacy KZM9D reference
-Kconfig bits CONFIG_MACH_KZM9D_REFERENCE for the non-multiplatform
-case.
-
-Starting from this commit KZM9D board support is always enabled
-via CONFIG_MACH_KZM9D, and CONFIG_ARCH_MULTIPLATFORM is used
-to select between board-kzm9d.c and board-kzm9d-reference.c
-
-The file board-kzm9d-reference.c can no longer be used together
-with the legacy sh-clk clock framework, instead CCF is used.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit df8ee58d73ae8590bc4c9ddbe19211e4485f9d17)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/Kconfig       | 12 ------------
- arch/arm/mach-shmobile/Makefile      |  1 -
- arch/arm/mach-shmobile/Makefile.boot |  1 -
- 3 files changed, 14 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
-index c9c4f15483bd..a4a4b75109b2 100644
---- a/arch/arm/mach-shmobile/Kconfig
-+++ b/arch/arm/mach-shmobile/Kconfig
-@@ -237,18 +237,6 @@ config MACH_KZM9D
- 	select REGULATOR_FIXED_VOLTAGE if REGULATOR
- 	select USE_OF
- 
--config MACH_KZM9D_REFERENCE
--	bool "KZM9D board - Reference Device Tree Implementation"
--	depends on ARCH_EMEV2
--	select REGULATOR_FIXED_VOLTAGE if REGULATOR
--	select USE_OF
--	---help---
--	   Use reference implementation of KZM9D board support
--	   which makes a greater use of device tree at the expense
--	   of not supporting a number of devices.
--
--	   This is intended to aid developers
--
- config MACH_KZM9G
- 	bool "KZM-A9-GT board"
- 	depends on ARCH_SH73A0
-diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
-index b11466d4d944..51db2bcafabf 100644
---- a/arch/arm/mach-shmobile/Makefile
-+++ b/arch/arm/mach-shmobile/Makefile
-@@ -72,7 +72,6 @@ obj-$(CONFIG_MACH_ARMADILLO800EVA)	+= board-armadillo800eva.o
- obj-$(CONFIG_MACH_ARMADILLO800EVA_REFERENCE)	+= board-armadillo800eva-reference.o
- obj-$(CONFIG_MACH_KOELSCH)	+= board-koelsch.o
- obj-$(CONFIG_MACH_KZM9D)	+= board-kzm9d.o
--obj-$(CONFIG_MACH_KZM9D_REFERENCE)	+= board-kzm9d-reference.o
- obj-$(CONFIG_MACH_KZM9G)	+= board-kzm9g.o
- obj-$(CONFIG_MACH_KZM9G_REFERENCE)	+= board-kzm9g-reference.o
- endif
-diff --git a/arch/arm/mach-shmobile/Makefile.boot b/arch/arm/mach-shmobile/Makefile.boot
-index c690b500eb61..391d72a5536c 100644
---- a/arch/arm/mach-shmobile/Makefile.boot
-+++ b/arch/arm/mach-shmobile/Makefile.boot
-@@ -9,7 +9,6 @@ loadaddr-$(CONFIG_MACH_BOCKW_REFERENCE) += 0x60008000
- loadaddr-$(CONFIG_MACH_GENMAI) += 0x8008000
- loadaddr-$(CONFIG_MACH_KOELSCH) += 0x40008000
- loadaddr-$(CONFIG_MACH_KZM9D) += 0x40008000
--loadaddr-$(CONFIG_MACH_KZM9D_REFERENCE) += 0x40008000
- loadaddr-$(CONFIG_MACH_KZM9G) += 0x41008000
- loadaddr-$(CONFIG_MACH_KZM9G_REFERENCE) += 0x41008000
- loadaddr-$(CONFIG_MACH_LAGER) += 0x40008000
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0200-sh-pfc-r8a7778-add-HSPI-pin-groups.patch b/patches.renesas/0200-sh-pfc-r8a7778-add-HSPI-pin-groups.patch
deleted file mode 100644
index a36589e80d321..0000000000000
--- a/patches.renesas/0200-sh-pfc-r8a7778-add-HSPI-pin-groups.patch
+++ /dev/null
@@ -1,111 +0,0 @@
-From 2b93c3b3be4b8de2dfdea9bbbbf4fd335c8e9282 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Wed, 22 May 2013 20:16:30 -0700
-Subject: sh-pfc: r8a7778: add HSPI pin groups
-
-Add HSPI CLK/CS/RX/TX pin groups to R8A7778 PFC driver.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 09cc76a95802e87dfda0fe6ecad2090de65e0ab1)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7778.c | 61 ++++++++++++++++++++++++++++++++++++
- 1 file changed, 61 insertions(+)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7778.c b/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
-index 605f8ae6..bf5e3d89 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
-@@ -1371,6 +1371,43 @@ SCIF_PFC_CLK(hscif1_clk_a,	HSCK1_A);
- SCIF_PFC_PIN(hscif1_clk_b,	RCAR_GP_PIN(4, 2));
- SCIF_PFC_CLK(hscif1_clk_b,	HSCK1_B);
- 
-+/* - HSPI macro --------------------------------------------------------------*/
-+#define HSPI_PFC_PIN(name, args...)		SH_PFC_PINS(name, args)
-+#define HSPI_PFC_DAT(name, clk, cs, rx, tx)	SH_PFC_MUX4(name, clk, cs, rx, tx)
-+
-+/* - HSPI0 -------------------------------------------------------------------*/
-+HSPI_PFC_PIN(hspi0_a,	RCAR_GP_PIN(3, 19),	RCAR_GP_PIN(3, 20),
-+			RCAR_GP_PIN(3, 21),	RCAR_GP_PIN(3, 22));
-+HSPI_PFC_DAT(hspi0_a,	HSPI_CLK0_A,		HSPI_CS0_A,
-+			HSPI_RX0_A,		HSPI_TX0);
-+
-+HSPI_PFC_PIN(hspi0_b,	RCAR_GP_PIN(2, 25),	RCAR_GP_PIN(2, 26),
-+			RCAR_GP_PIN(2, 24),	RCAR_GP_PIN(2, 27));
-+HSPI_PFC_DAT(hspi0_b,	HSPI_CLK0_B,		HSPI_CS0_B,
-+			HSPI_RX0_B,		HSPI_TX0_B);
-+
-+/* - HSPI1 -------------------------------------------------------------------*/
-+HSPI_PFC_PIN(hspi1_a,	RCAR_GP_PIN(3, 26),	RCAR_GP_PIN(3, 27),
-+			RCAR_GP_PIN(3, 25),	RCAR_GP_PIN(3, 28));
-+HSPI_PFC_DAT(hspi1_a,	HSPI_CLK1_A,		HSPI_CS1_A,
-+			HSPI_RX1_A,		HSPI_TX1_A);
-+
-+HSPI_PFC_PIN(hspi1_b,	RCAR_GP_PIN(0, 27),	RCAR_GP_PIN(0, 26),
-+			PIN_NUMBER(20, 1),	PIN_NUMBER(25, 2));
-+HSPI_PFC_DAT(hspi1_b,	HSPI_CLK1_B,		HSPI_CS1_B,
-+			HSPI_RX1_B,		HSPI_TX1_B);
-+
-+/* - HSPI2 -------------------------------------------------------------------*/
-+HSPI_PFC_PIN(hspi2_a,	RCAR_GP_PIN(2, 29),	RCAR_GP_PIN(3, 8),
-+			RCAR_GP_PIN(2, 28),	RCAR_GP_PIN(2, 30));
-+HSPI_PFC_DAT(hspi2_a,	HSPI_CLK2_A,		HSPI_CS2_A,
-+			HSPI_RX2_A,		HSPI_TX2_A);
-+
-+HSPI_PFC_PIN(hspi2_b,	RCAR_GP_PIN(4, 21),	RCAR_GP_PIN(4, 22),
-+			RCAR_GP_PIN(4, 23),	RCAR_GP_PIN(4, 24));
-+HSPI_PFC_DAT(hspi2_b,	HSPI_CLK2_B,		HSPI_CS2_B,
-+			HSPI_RX2_B,		HSPI_TX2_B);
-+
- /* - I2C macro ------------------------------------------------------------- */
- #define I2C_PFC_PIN(name, args...)	SH_PFC_PINS(name, args)
- #define I2C_PFC_MUX(name, sda, scl)	SH_PFC_MUX2(name, sda, scl)
-@@ -1610,6 +1647,12 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(hscif1_ctrl_b),
- 	SH_PFC_PIN_GROUP(hscif1_clk_a),
- 	SH_PFC_PIN_GROUP(hscif1_clk_b),
-+	SH_PFC_PIN_GROUP(hspi0_a),
-+	SH_PFC_PIN_GROUP(hspi0_b),
-+	SH_PFC_PIN_GROUP(hspi1_a),
-+	SH_PFC_PIN_GROUP(hspi1_b),
-+	SH_PFC_PIN_GROUP(hspi2_a),
-+	SH_PFC_PIN_GROUP(hspi2_b),
- 	SH_PFC_PIN_GROUP(i2c1_a),
- 	SH_PFC_PIN_GROUP(i2c1_b),
- 	SH_PFC_PIN_GROUP(i2c2_a),
-@@ -1710,6 +1753,21 @@ static const char * const hscif1_groups[] = {
- 	"hscif1_clk_b",
- };
- 
-+static const char * const hspi0_groups[] = {
-+	"hspi0_a",
-+	"hspi0_b",
-+};
-+
-+static const char * const hspi1_groups[] = {
-+	"hspi1_a",
-+	"hspi1_b",
-+};
-+
-+static const char * const hspi2_groups[] = {
-+	"hspi2_a",
-+	"hspi2_b",
-+};
-+
- static const char * const i2c1_groups[] = {
- 	"i2c1_a",
- 	"i2c1_b",
-@@ -1841,6 +1899,9 @@ static const struct sh_pfc_function pinmux_functions[] = {
- 	SH_PFC_FUNCTION(ether),
- 	SH_PFC_FUNCTION(hscif0),
- 	SH_PFC_FUNCTION(hscif1),
-+	SH_PFC_FUNCTION(hspi0),
-+	SH_PFC_FUNCTION(hspi1),
-+	SH_PFC_FUNCTION(hspi2),
- 	SH_PFC_FUNCTION(i2c1),
- 	SH_PFC_FUNCTION(i2c2),
- 	SH_PFC_FUNCTION(i2c3),
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0201-ARM-shmobile-Let-KZM9D-multiplatform-boot-with-KZM9D.patch b/patches.renesas/0201-ARM-shmobile-Let-KZM9D-multiplatform-boot-with-KZM9D.patch
deleted file mode 100644
index 48913fc86edb2..0000000000000
--- a/patches.renesas/0201-ARM-shmobile-Let-KZM9D-multiplatform-boot-with-KZM9D.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From 9ad4df47576164035b87c138bb7c664757b09b29 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Tue, 1 Oct 2013 19:33:34 +0900
-Subject: ARM: shmobile: Let KZM9D multiplatform boot with KZM9D DTB
-
-Let the multiplatform KZM9D support boot with the
-legacy DTS for KZM9D as well as the KZM9D reference DTS.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 91f6c56152c7d8ab874dbbf8146a6727d4dff426)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-kzm9d-reference.c | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/arch/arm/mach-shmobile/board-kzm9d-reference.c b/arch/arm/mach-shmobile/board-kzm9d-reference.c
-index 8f8bb2fab076..054d8d5c8fc1 100644
---- a/arch/arm/mach-shmobile/board-kzm9d-reference.c
-+++ b/arch/arm/mach-shmobile/board-kzm9d-reference.c
-@@ -33,6 +33,7 @@ static void __init kzm9d_add_standard_devices(void)
- }
- 
- static const char *kzm9d_boards_compat_dt[] __initdata = {
-+	"renesas,kzm9d",
- 	"renesas,kzm9d-reference",
- 	NULL,
- };
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0201-ARM-shmobile-armadillo-fixup-FSI-address-size.patch b/patches.renesas/0201-ARM-shmobile-armadillo-fixup-FSI-address-size.patch
deleted file mode 100644
index 1af7f29b5f22d..0000000000000
--- a/patches.renesas/0201-ARM-shmobile-armadillo-fixup-FSI-address-size.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From 5e5a3fe11e826e386aecb90e49c082d4f0e3adc9 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Tue, 3 Dec 2013 00:07:03 -0800
-Subject: ARM: shmobile: armadillo: fixup FSI address size
-
-FSI address size is 0x400, not 0x8400
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 4a4783a30c92a5ee1752d33af3bea2bf79f64197)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-armadillo800eva.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c
-index 0c8595413b62..44443a95bd0d 100644
---- a/arch/arm/mach-shmobile/board-armadillo800eva.c
-+++ b/arch/arm/mach-shmobile/board-armadillo800eva.c
-@@ -957,7 +957,7 @@ static struct resource fsi_resources[] = {
- 	[0] = {
- 		.name	= "FSI",
- 		.start	= 0xfe1f0000,
--		.end	= 0xfe1f8400 - 1,
-+		.end	= 0xfe1f0400 - 1,
- 		.flags	= IORESOURCE_MEM,
- 	},
- 	[1] = {
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0201-sh-pfc-r8a7778-add-MMCIF-pin-groups.patch b/patches.renesas/0201-sh-pfc-r8a7778-add-MMCIF-pin-groups.patch
deleted file mode 100644
index 2603dc088055a..0000000000000
--- a/patches.renesas/0201-sh-pfc-r8a7778-add-MMCIF-pin-groups.patch
+++ /dev/null
@@ -1,88 +0,0 @@
-From 0ee289e3166cf0a438c2f6cebe12af367e81a173 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Wed, 22 May 2013 20:17:04 -0700
-Subject: sh-pfc: r8a7778: add MMCIF pin groups
-
-Add MMCIF CLK/CMD/DATA groups to R8A7778 PFC driver.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 3ef2a776d13826a6f574d0637e4be7ce7e3be676)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7778.c | 38 ++++++++++++++++++++++++++++++++++++
- 1 file changed, 38 insertions(+)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7778.c b/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
-index bf5e3d89..1dcbabcd 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
-@@ -1434,6 +1434,32 @@ I2C_PFC_MUX(i2c3_b,	SDA3_B,			SCL3_B);
- I2C_PFC_PIN(i2c3_c,	RCAR_GP_PIN(1, 22),	RCAR_GP_PIN(1, 23));
- I2C_PFC_MUX(i2c3_c,	SDA3_C,			SCL3_C);
- 
-+/* - MMC macro -------------------------------------------------------------- */
-+#define MMC_PFC_PINS(name, args...)		SH_PFC_PINS(name, args)
-+#define MMC_PFC_CTRL(name, clk, cmd)		SH_PFC_MUX2(name, clk, cmd)
-+#define MMC_PFC_DAT1(name, d0)			SH_PFC_MUX1(name, d0)
-+#define MMC_PFC_DAT4(name, d0, d1, d2, d3)	SH_PFC_MUX4(name, d0, d1, d2, d3)
-+#define MMC_PFC_DAT8(name, d0, d1, d2, d3, d4, d5, d6, d7)	\
-+			SH_PFC_MUX8(name, d0, d1, d2, d3, d4, d5, d6, d7)
-+
-+/* - MMC -------------------------------------------------------------------- */
-+MMC_PFC_PINS(mmc_ctrl,		RCAR_GP_PIN(1, 5),	RCAR_GP_PIN(1, 6));
-+MMC_PFC_CTRL(mmc_ctrl,		MMC_CLK,		MMC_CMD);
-+MMC_PFC_PINS(mmc_data1,		RCAR_GP_PIN(1, 7));
-+MMC_PFC_DAT1(mmc_data1,		MMC_D0);
-+MMC_PFC_PINS(mmc_data4,		RCAR_GP_PIN(1, 7),	RCAR_GP_PIN(2, 8),
-+				RCAR_GP_PIN(0, 5),	RCAR_GP_PIN(0, 6));
-+MMC_PFC_DAT4(mmc_data4,		MMC_D0,			MMC_D1,
-+				MMC_D2,			MMC_D3);
-+MMC_PFC_PINS(mmc_data8,		RCAR_GP_PIN(1, 7),	RCAR_GP_PIN(2, 8),
-+				RCAR_GP_PIN(0, 5),	RCAR_GP_PIN(0, 6),
-+				RCAR_GP_PIN(1, 4),	RCAR_GP_PIN(1, 0),
-+				RCAR_GP_PIN(0, 30),	RCAR_GP_PIN(0, 31));
-+MMC_PFC_DAT8(mmc_data8,		MMC_D0,			MMC_D1,
-+				MMC_D2,			MMC_D3,
-+				MMC_D4,			MMC_D5,
-+				MMC_D6,			MMC_D7);
-+
- /* - SCIF CLOCK ------------------------------------------------------------- */
- SCIF_PFC_PIN(scif_clk,		RCAR_GP_PIN(1, 16));
- SCIF_PFC_CLK(scif_clk,		SCIF_CLK);
-@@ -1661,6 +1687,10 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(i2c3_a),
- 	SH_PFC_PIN_GROUP(i2c3_b),
- 	SH_PFC_PIN_GROUP(i2c3_c),
-+	SH_PFC_PIN_GROUP(mmc_ctrl),
-+	SH_PFC_PIN_GROUP(mmc_data1),
-+	SH_PFC_PIN_GROUP(mmc_data4),
-+	SH_PFC_PIN_GROUP(mmc_data8),
- 	SH_PFC_PIN_GROUP(scif_clk),
- 	SH_PFC_PIN_GROUP(scif0_data_a),
- 	SH_PFC_PIN_GROUP(scif0_data_b),
-@@ -1785,6 +1815,13 @@ static const char * const i2c3_groups[] = {
- 	"i2c3_c",
- };
- 
-+static const char * const mmc_groups[] = {
-+	"mmc_ctrl",
-+	"mmc_data1",
-+	"mmc_data4",
-+	"mmc_data8",
-+};
-+
- static const char * const scif_clk_groups[] = {
- 	"scif_clk",
- };
-@@ -1905,6 +1942,7 @@ static const struct sh_pfc_function pinmux_functions[] = {
- 	SH_PFC_FUNCTION(i2c1),
- 	SH_PFC_FUNCTION(i2c2),
- 	SH_PFC_FUNCTION(i2c3),
-+	SH_PFC_FUNCTION(mmc),
- 	SH_PFC_FUNCTION(scif_clk),
- 	SH_PFC_FUNCTION(scif0),
- 	SH_PFC_FUNCTION(scif1),
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0202-ARM-shmobile-Remove-KZM9D-reference-DTS.patch b/patches.renesas/0202-ARM-shmobile-Remove-KZM9D-reference-DTS.patch
deleted file mode 100644
index 085f6f42fd51c..0000000000000
--- a/patches.renesas/0202-ARM-shmobile-Remove-KZM9D-reference-DTS.patch
+++ /dev/null
@@ -1,107 +0,0 @@
-From cbb34fc9897519c606de5f618075410ece434f4d Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Tue, 1 Oct 2013 19:33:43 +0900
-Subject: ARM: shmobile: Remove KZM9D reference DTS
-
-Now when the legacy DTS file emev2-kzm9d.dts can be
-used with board-kzm9d.c and board-kzm9d-reference.c
-proceed with removing emev-kzm9d-reference.dts.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 3d888121512f3d70b46ff67d02b41baf474a3123)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/Makefile                  |  3 +-
- arch/arm/boot/dts/emev2-kzm9d-reference.dts | 57 -----------------------------
- 2 files changed, 1 insertion(+), 59 deletions(-)
- delete mode 100644 arch/arm/boot/dts/emev2-kzm9d-reference.dts
-
-diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
-index 61f8b5143eee..5df751b250a1 100644
---- a/arch/arm/boot/dts/Makefile
-+++ b/arch/arm/boot/dts/Makefile
-@@ -160,7 +160,6 @@ dtb-$(CONFIG_ARCH_U8500) += snowball.dtb \
- 	hrefv60plus.dtb \
- 	ccu9540.dtb
- dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \
--	emev2-kzm9d-reference.dtb \
- 	r7s72100-genmai.dtb \
- 	r8a7740-armadillo800eva.dtb \
- 	r8a7778-bockw.dtb \
-@@ -176,7 +175,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \
- 	r8a73a4-ape6evm.dtb \
- 	r8a73a4-ape6evm-reference.dtb \
- 	sh7372-mackerel.dtb
--dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += emev2-kzm9d-reference.dtb
-+dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += emev2-kzm9d.dtb
- dtb-$(CONFIG_ARCH_SOCFPGA) += socfpga_cyclone5.dtb \
- 	socfpga_vt.dtb
- dtb-$(CONFIG_ARCH_SPEAR13XX) += spear1310-evb.dtb \
-diff --git a/arch/arm/boot/dts/emev2-kzm9d-reference.dts b/arch/arm/boot/dts/emev2-kzm9d-reference.dts
-deleted file mode 100644
-index cceefda268b6..000000000000
---- a/arch/arm/boot/dts/emev2-kzm9d-reference.dts
-+++ /dev/null
-@@ -1,57 +0,0 @@
--/*
-- * Device Tree Source for the KZM9D board
-- *
-- * Copyright (C) 2013 Renesas Solutions Corp.
-- *
-- * This file is licensed under the terms of the GNU General Public License
-- * version 2.  This program is licensed "as is" without any warranty of any
-- * kind, whether express or implied.
-- */
--/dts-v1/;
--
--/include/ "emev2.dtsi"
--
--/ {
--	model = "EMEV2 KZM9D Board";
--	compatible = "renesas,kzm9d-reference", "renesas,emev2";
--
--	memory {
--		device_type = "memory";
--		reg = <0x40000000 0x8000000>;
--	};
--
--	chosen {
--		bootargs = "console=ttyS1,115200n81 ignore_loglevel root=/dev/nfs ip=dhcp";
--	};
--
--	reg_1p8v: regulator@0 {
--		compatible = "regulator-fixed";
--		regulator-name = "fixed-1.8V";
--		regulator-min-microvolt = <1800000>;
--		regulator-max-microvolt = <1800000>;
--		regulator-always-on;
--		regulator-boot-on;
--	};
--
--	reg_3p3v: regulator@1 {
--		compatible = "regulator-fixed";
--		regulator-name = "fixed-3.3V";
--		regulator-min-microvolt = <3300000>;
--		regulator-max-microvolt = <3300000>;
--		regulator-always-on;
--		regulator-boot-on;
--	};
--
--	lan9220@20000000 {
--		compatible = "smsc,lan9220", "smsc,lan9115";
--		reg = <0x20000000 0x10000>;
--		phy-mode = "mii";
--		interrupt-parent = <&gpio0>;
--		interrupts = <1 1>;	/* active high */
--		reg-io-width = <4>;
--		smsc,irq-active-high;
--		smsc,irq-push-pull;
--		vddvario-supply = <&reg_1p8v>;
--		vdd33a-supply = <&reg_3p3v>;
--	};
--};
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0202-ARM-shmobile-bockw-remove-unused-RSND_SSI_CLK_FROM_A.patch b/patches.renesas/0202-ARM-shmobile-bockw-remove-unused-RSND_SSI_CLK_FROM_A.patch
deleted file mode 100644
index 57fe817cd3e0e..0000000000000
--- a/patches.renesas/0202-ARM-shmobile-bockw-remove-unused-RSND_SSI_CLK_FROM_A.patch
+++ /dev/null
@@ -1,53 +0,0 @@
-From c120fd15116e7c9f10f5ee876efb4e331e3270dc Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Sun, 17 Nov 2013 18:51:39 -0800
-Subject: ARM: shmobile: bockw: remove unused RSND_SSI_CLK_FROM_ADG
-
-92eba04e4bcd469518cc759ac1bf1a49acaa5cc1
-(ASoC: rcar: remove RSND_SSI_CLK_FROM_ADG) removed
-RSND_SSI_CLK_FROM_ADG, it is no longer needed
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Acked-by: Mark Brown <broonie@linaro.org>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit c653033bae957ee141b2d27881c22e46ff26c651)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-bockw.c | 4 ++--
- include/sound/rcar_snd.h             | 1 -
- 2 files changed, 2 insertions(+), 3 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-bockw.c b/arch/arm/mach-shmobile/board-bockw.c
-index 540f0dc2431a..eb5b54fc5cc9 100644
---- a/arch/arm/mach-shmobile/board-bockw.c
-+++ b/arch/arm/mach-shmobile/board-bockw.c
-@@ -332,11 +332,11 @@ static struct rsnd_ssi_platform_info rsnd_ssi[] = {
- 	RSND_SSI_UNUSED, /* SSI 1 */
- 	RSND_SSI_UNUSED, /* SSI 2 */
- 	RSND_SSI_SET(1, 0, gic_iid(0x85), RSND_SSI_PLAY),
--	RSND_SSI_SET(2, 0, gic_iid(0x85), RSND_SSI_CLK_PIN_SHARE | RSND_SSI_CLK_FROM_ADG),
-+	RSND_SSI_SET(2, 0, gic_iid(0x85), RSND_SSI_CLK_PIN_SHARE),
- 	RSND_SSI_SET(0, 0, gic_iid(0x86), RSND_SSI_PLAY),
- 	RSND_SSI_SET(0, 0, gic_iid(0x86), 0),
- 	RSND_SSI_SET(3, 0, gic_iid(0x86), RSND_SSI_PLAY),
--	RSND_SSI_SET(4, 0, gic_iid(0x86), RSND_SSI_CLK_PIN_SHARE | RSND_SSI_CLK_FROM_ADG),
-+	RSND_SSI_SET(4, 0, gic_iid(0x86), RSND_SSI_CLK_PIN_SHARE),
- };
- 
- static struct rsnd_scu_platform_info rsnd_scu[9] = {
-diff --git a/include/sound/rcar_snd.h b/include/sound/rcar_snd.h
-index 12afab18945d..6ce506b09383 100644
---- a/include/sound/rcar_snd.h
-+++ b/include/sound/rcar_snd.h
-@@ -34,7 +34,6 @@
-  * B : SSI direction
-  */
- #define RSND_SSI_CLK_PIN_SHARE		(1 << 31)
--#define RSND_SSI_CLK_FROM_ADG		(1 << 30) /* clock parent is master */
- #define RSND_SSI_SYNC			(1 << 29) /* SSI34_sync etc */
- 
- #define RSND_SSI_PLAY			(1 << 24)
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0202-pinctrl-r8a7790-add-pinmux-data-for-MMCIF-and-SDHI-i.patch b/patches.renesas/0202-pinctrl-r8a7790-add-pinmux-data-for-MMCIF-and-SDHI-i.patch
deleted file mode 100644
index 97288f17e24d0..0000000000000
--- a/patches.renesas/0202-pinctrl-r8a7790-add-pinmux-data-for-MMCIF-and-SDHI-i.patch
+++ /dev/null
@@ -1,345 +0,0 @@
-From 33d321fd4f60a4446e92601374c7845fbe112c4e Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Fri, 17 May 2013 16:55:12 +0200
-Subject: pinctrl: r8a7790: add pinmux data for MMCIF and SDHI interfaces
-
-This patch adds pinmux groups and functions for the two MMCIF and four
-SDHI interfaces on r8a73a4 (APE6).
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 066f0d6eb7c057e8e797a3d74b30764ed21952a2)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 294 +++++++++++++++++++++++++++++++++++
- 1 file changed, 294 insertions(+)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-index 93384227..85d77a41 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-@@ -2372,6 +2372,220 @@ static const unsigned int tpu0_to3_mux[] = {
- 	TPU0TO3_MARK,
- };
- 
-+/* - MMCIF ------------------------------------------------------------------ */
-+static const unsigned int mmc0_data1_pins[] = {
-+	/* D[0] */
-+	RCAR_GP_PIN(3, 18),
-+};
-+static const unsigned int mmc0_data1_mux[] = {
-+	MMC0_D0_MARK,
-+};
-+static const unsigned int mmc0_data4_pins[] = {
-+	/* D[0:3] */
-+	RCAR_GP_PIN(3, 18), RCAR_GP_PIN(3, 19),
-+	RCAR_GP_PIN(3, 20), RCAR_GP_PIN(3, 21),
-+};
-+static const unsigned int mmc0_data4_mux[] = {
-+	MMC0_D0_MARK, MMC0_D1_MARK, MMC0_D2_MARK, MMC0_D3_MARK,
-+};
-+static const unsigned int mmc0_data8_pins[] = {
-+	/* D[0:7] */
-+	RCAR_GP_PIN(3, 18), RCAR_GP_PIN(3, 19),
-+	RCAR_GP_PIN(3, 20), RCAR_GP_PIN(3, 21),
-+	RCAR_GP_PIN(3, 22), RCAR_GP_PIN(3, 23),
-+	RCAR_GP_PIN(3, 6), RCAR_GP_PIN(3, 7),
-+};
-+static const unsigned int mmc0_data8_mux[] = {
-+	MMC0_D0_MARK, MMC0_D1_MARK, MMC0_D2_MARK, MMC0_D3_MARK,
-+	MMC0_D4_MARK, MMC0_D5_MARK, MMC0_D6_MARK, MMC0_D7_MARK,
-+};
-+static const unsigned int mmc0_ctrl_pins[] = {
-+	/* CLK, CMD */
-+	RCAR_GP_PIN(3, 16), RCAR_GP_PIN(3, 17),
-+};
-+static const unsigned int mmc0_ctrl_mux[] = {
-+	MMC0_CLK_MARK, MMC0_CMD_MARK,
-+};
-+
-+static const unsigned int mmc1_data1_pins[] = {
-+	/* D[0] */
-+	RCAR_GP_PIN(3, 26),
-+};
-+static const unsigned int mmc1_data1_mux[] = {
-+	MMC1_D0_MARK,
-+};
-+static const unsigned int mmc1_data4_pins[] = {
-+	/* D[0:3] */
-+	RCAR_GP_PIN(3, 26), RCAR_GP_PIN(3, 27),
-+	RCAR_GP_PIN(3, 28), RCAR_GP_PIN(3, 29),
-+};
-+static const unsigned int mmc1_data4_mux[] = {
-+	MMC1_D0_MARK, MMC1_D1_MARK, MMC1_D2_MARK, MMC1_D3_MARK,
-+};
-+static const unsigned int mmc1_data8_pins[] = {
-+	/* D[0:7] */
-+	RCAR_GP_PIN(3, 26), RCAR_GP_PIN(3, 27),
-+	RCAR_GP_PIN(3, 28), RCAR_GP_PIN(3, 29),
-+	RCAR_GP_PIN(3, 30), RCAR_GP_PIN(3, 31),
-+	RCAR_GP_PIN(3, 13), RCAR_GP_PIN(3, 14),
-+};
-+static const unsigned int mmc1_data8_mux[] = {
-+	MMC1_D0_MARK, MMC1_D1_MARK, MMC1_D2_MARK, MMC1_D3_MARK,
-+	MMC1_D4_MARK, MMC1_D5_MARK, MMC1_D6_MARK, MMC1_D7_MARK,
-+};
-+static const unsigned int mmc1_ctrl_pins[] = {
-+	/* CLK, CMD */
-+	RCAR_GP_PIN(3, 24), RCAR_GP_PIN(3, 25),
-+};
-+static const unsigned int mmc1_ctrl_mux[] = {
-+	MMC1_CLK_MARK, MMC1_CMD_MARK,
-+};
-+
-+/* - SDHI ------------------------------------------------------------------- */
-+static const unsigned int sdhi0_data1_pins[] = {
-+	/* D0 */
-+	RCAR_GP_PIN(3, 2),
-+};
-+static const unsigned int sdhi0_data1_mux[] = {
-+	SD0_DAT0_MARK,
-+};
-+static const unsigned int sdhi0_data4_pins[] = {
-+	/* D[0:3] */
-+	RCAR_GP_PIN(3, 2), RCAR_GP_PIN(3, 3), RCAR_GP_PIN(3, 4), RCAR_GP_PIN(3, 5),
-+};
-+static const unsigned int sdhi0_data4_mux[] = {
-+	SD0_DAT0_MARK, SD0_DAT1_MARK, SD0_DAT2_MARK, SD0_DAT3_MARK,
-+};
-+static const unsigned int sdhi0_ctrl_pins[] = {
-+	/* CLK, CMD */
-+	RCAR_GP_PIN(3, 0), RCAR_GP_PIN(3, 1),
-+};
-+static const unsigned int sdhi0_ctrl_mux[] = {
-+	SD0_CLK_MARK, SD0_CMD_MARK,
-+};
-+static const unsigned int sdhi0_cd_pins[] = {
-+	/* CD */
-+	RCAR_GP_PIN(3, 6),
-+};
-+static const unsigned int sdhi0_cd_mux[] = {
-+	SD0_CD_MARK,
-+};
-+static const unsigned int sdhi0_wp_pins[] = {
-+	/* WP */
-+	RCAR_GP_PIN(3, 7),
-+};
-+static const unsigned int sdhi0_wp_mux[] = {
-+	SD0_WP_MARK,
-+};
-+
-+static const unsigned int sdhi1_data1_pins[] = {
-+	/* D0 */
-+	RCAR_GP_PIN(3, 10),
-+};
-+static const unsigned int sdhi1_data1_mux[] = {
-+	SD1_DAT0_MARK,
-+};
-+static const unsigned int sdhi1_data4_pins[] = {
-+	/* D[0:3] */
-+	RCAR_GP_PIN(3, 10), RCAR_GP_PIN(3, 11), RCAR_GP_PIN(3, 12), RCAR_GP_PIN(3, 13),
-+};
-+static const unsigned int sdhi1_data4_mux[] = {
-+	SD1_DAT0_MARK, SD1_DAT1_MARK, SD1_DAT2_MARK, SD1_DAT3_MARK,
-+};
-+static const unsigned int sdhi1_ctrl_pins[] = {
-+	/* CLK, CMD */
-+	RCAR_GP_PIN(3, 8), RCAR_GP_PIN(3, 9),
-+};
-+static const unsigned int sdhi1_ctrl_mux[] = {
-+	SD1_CLK_MARK, SD1_CMD_MARK,
-+};
-+static const unsigned int sdhi1_cd_pins[] = {
-+	/* CD */
-+	RCAR_GP_PIN(3, 14),
-+};
-+static const unsigned int sdhi1_cd_mux[] = {
-+	SD1_CD_MARK,
-+};
-+static const unsigned int sdhi1_wp_pins[] = {
-+	/* WP */
-+	RCAR_GP_PIN(3, 15),
-+};
-+static const unsigned int sdhi1_wp_mux[] = {
-+	SD1_WP_MARK,
-+};
-+
-+static const unsigned int sdhi2_data1_pins[] = {
-+	/* D0 */
-+	RCAR_GP_PIN(3, 18),
-+};
-+static const unsigned int sdhi2_data1_mux[] = {
-+	SD2_DAT0_MARK,
-+};
-+static const unsigned int sdhi2_data4_pins[] = {
-+	/* D[0:3] */
-+	RCAR_GP_PIN(3, 18), RCAR_GP_PIN(3, 19), RCAR_GP_PIN(3, 20), RCAR_GP_PIN(3, 21),
-+};
-+static const unsigned int sdhi2_data4_mux[] = {
-+	SD2_DAT0_MARK, SD2_DAT1_MARK, SD2_DAT2_MARK, SD2_DAT3_MARK,
-+};
-+static const unsigned int sdhi2_ctrl_pins[] = {
-+	/* CLK, CMD */
-+	RCAR_GP_PIN(3, 16), RCAR_GP_PIN(3, 17),
-+};
-+static const unsigned int sdhi2_ctrl_mux[] = {
-+	SD2_CLK_MARK, SD2_CMD_MARK,
-+};
-+static const unsigned int sdhi2_cd_pins[] = {
-+	/* CD */
-+	RCAR_GP_PIN(3, 22),
-+};
-+static const unsigned int sdhi2_cd_mux[] = {
-+	SD2_CD_MARK,
-+};
-+static const unsigned int sdhi2_wp_pins[] = {
-+	/* WP */
-+	RCAR_GP_PIN(3, 23),
-+};
-+static const unsigned int sdhi2_wp_mux[] = {
-+	SD2_WP_MARK,
-+};
-+
-+static const unsigned int sdhi3_data1_pins[] = {
-+	/* D0 */
-+	RCAR_GP_PIN(3, 26),
-+};
-+static const unsigned int sdhi3_data1_mux[] = {
-+	SD3_DAT0_MARK,
-+};
-+static const unsigned int sdhi3_data4_pins[] = {
-+	/* D[0:3] */
-+	RCAR_GP_PIN(3, 26), RCAR_GP_PIN(3, 27), RCAR_GP_PIN(3, 28), RCAR_GP_PIN(3, 29),
-+};
-+static const unsigned int sdhi3_data4_mux[] = {
-+	SD3_DAT0_MARK, SD3_DAT1_MARK, SD3_DAT2_MARK, SD3_DAT3_MARK,
-+};
-+static const unsigned int sdhi3_ctrl_pins[] = {
-+	/* CLK, CMD */
-+	RCAR_GP_PIN(3, 24), RCAR_GP_PIN(3, 25),
-+};
-+static const unsigned int sdhi3_ctrl_mux[] = {
-+	SD3_CLK_MARK, SD3_CMD_MARK,
-+};
-+static const unsigned int sdhi3_cd_pins[] = {
-+	/* CD */
-+	RCAR_GP_PIN(3, 30),
-+};
-+static const unsigned int sdhi3_cd_mux[] = {
-+	SD3_CD_MARK,
-+};
-+static const unsigned int sdhi3_wp_pins[] = {
-+	/* WP */
-+	RCAR_GP_PIN(3, 31),
-+};
-+static const unsigned int sdhi3_wp_mux[] = {
-+	SD3_WP_MARK,
-+};
-+
- static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(eth_link),
- 	SH_PFC_PIN_GROUP(eth_magic),
-@@ -2449,6 +2663,34 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(tpu0_to1),
- 	SH_PFC_PIN_GROUP(tpu0_to2),
- 	SH_PFC_PIN_GROUP(tpu0_to3),
-+	SH_PFC_PIN_GROUP(mmc0_data1),
-+	SH_PFC_PIN_GROUP(mmc0_data4),
-+	SH_PFC_PIN_GROUP(mmc0_data8),
-+	SH_PFC_PIN_GROUP(mmc0_ctrl),
-+	SH_PFC_PIN_GROUP(mmc1_data1),
-+	SH_PFC_PIN_GROUP(mmc1_data4),
-+	SH_PFC_PIN_GROUP(mmc1_data8),
-+	SH_PFC_PIN_GROUP(mmc1_ctrl),
-+	SH_PFC_PIN_GROUP(sdhi0_data1),
-+	SH_PFC_PIN_GROUP(sdhi0_data4),
-+	SH_PFC_PIN_GROUP(sdhi0_ctrl),
-+	SH_PFC_PIN_GROUP(sdhi0_cd),
-+	SH_PFC_PIN_GROUP(sdhi0_wp),
-+	SH_PFC_PIN_GROUP(sdhi1_data1),
-+	SH_PFC_PIN_GROUP(sdhi1_data4),
-+	SH_PFC_PIN_GROUP(sdhi1_ctrl),
-+	SH_PFC_PIN_GROUP(sdhi1_cd),
-+	SH_PFC_PIN_GROUP(sdhi1_wp),
-+	SH_PFC_PIN_GROUP(sdhi2_data1),
-+	SH_PFC_PIN_GROUP(sdhi2_data4),
-+	SH_PFC_PIN_GROUP(sdhi2_ctrl),
-+	SH_PFC_PIN_GROUP(sdhi2_cd),
-+	SH_PFC_PIN_GROUP(sdhi2_wp),
-+	SH_PFC_PIN_GROUP(sdhi3_data1),
-+	SH_PFC_PIN_GROUP(sdhi3_data4),
-+	SH_PFC_PIN_GROUP(sdhi3_ctrl),
-+	SH_PFC_PIN_GROUP(sdhi3_cd),
-+	SH_PFC_PIN_GROUP(sdhi3_wp),
- };
- 
- static const char * const eth_groups[] = {
-@@ -2560,6 +2802,52 @@ static const char * const tpu0_groups[] = {
- 	"tpu0_to3",
- };
- 
-+static const char * const mmc0_groups[] = {
-+	"mmc0_data1",
-+	"mmc0_data4",
-+	"mmc0_data8",
-+	"mmc0_ctrl",
-+};
-+
-+static const char * const mmc1_groups[] = {
-+	"mmc1_data1",
-+	"mmc1_data4",
-+	"mmc1_data8",
-+	"mmc1_ctrl",
-+};
-+
-+static const char * const sdhi0_groups[] = {
-+	"sdhi0_data1",
-+	"sdhi0_data4",
-+	"sdhi0_ctrl",
-+	"sdhi0_cd",
-+	"sdhi0_wp",
-+};
-+
-+static const char * const sdhi1_groups[] = {
-+	"sdhi1_data1",
-+	"sdhi1_data4",
-+	"sdhi1_ctrl",
-+	"sdhi1_cd",
-+	"sdhi1_wp",
-+};
-+
-+static const char * const sdhi2_groups[] = {
-+	"sdhi2_data1",
-+	"sdhi2_data4",
-+	"sdhi2_ctrl",
-+	"sdhi2_cd",
-+	"sdhi2_wp",
-+};
-+
-+static const char * const sdhi3_groups[] = {
-+	"sdhi3_data1",
-+	"sdhi3_data4",
-+	"sdhi3_ctrl",
-+	"sdhi3_cd",
-+	"sdhi3_wp",
-+};
-+
- static const struct sh_pfc_function pinmux_functions[] = {
- 	SH_PFC_FUNCTION(eth),
- 	SH_PFC_FUNCTION(intc),
-@@ -2572,6 +2860,12 @@ static const struct sh_pfc_function pinmux_functions[] = {
- 	SH_PFC_FUNCTION(scifb1),
- 	SH_PFC_FUNCTION(scifb2),
- 	SH_PFC_FUNCTION(tpu0),
-+	SH_PFC_FUNCTION(mmc0),
-+	SH_PFC_FUNCTION(mmc1),
-+	SH_PFC_FUNCTION(sdhi0),
-+	SH_PFC_FUNCTION(sdhi1),
-+	SH_PFC_FUNCTION(sdhi2),
-+	SH_PFC_FUNCTION(sdhi3),
- };
- 
- static struct pinmux_cfg_reg pinmux_config_regs[] = {
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0203-ARM-shmobile-Use-SMP-on-Koelsch.patch b/patches.renesas/0203-ARM-shmobile-Use-SMP-on-Koelsch.patch
deleted file mode 100644
index 3c211066a8d65..0000000000000
--- a/patches.renesas/0203-ARM-shmobile-Use-SMP-on-Koelsch.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From fb806e5b1776908d9eff71a789de796502f635ce Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Tue, 1 Oct 2013 17:13:26 +0900
-Subject: ARM: shmobile: Use SMP on Koelsch
-
-Enable r8a7791 SMP support code on the Koelsch board.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit b6d5a1b1c3476225e897a2f706c0e7eca7b05984)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-koelsch.c | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/arch/arm/mach-shmobile/board-koelsch.c b/arch/arm/mach-shmobile/board-koelsch.c
-index ea5846e2e88c..ace1711a6cd8 100644
---- a/arch/arm/mach-shmobile/board-koelsch.c
-+++ b/arch/arm/mach-shmobile/board-koelsch.c
-@@ -39,6 +39,7 @@ static const char * const koelsch_boards_compat_dt[] __initconst = {
- };
- 
- DT_MACHINE_START(KOELSCH_DT, "koelsch")
-+	.smp		= smp_ops(r8a7791_smp_ops),
- 	.init_early	= r8a7791_init_early,
- 	.init_machine	= koelsch_add_standard_devices,
- 	.init_time	= rcar_gen2_timer_init,
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0203-ARM-shmobile-lager-add-gpio-fixed-regulator-for-SDHI.patch b/patches.renesas/0203-ARM-shmobile-lager-add-gpio-fixed-regulator-for-SDHI.patch
deleted file mode 100644
index a193b9cf9ab19..0000000000000
--- a/patches.renesas/0203-ARM-shmobile-lager-add-gpio-fixed-regulator-for-SDHI.patch
+++ /dev/null
@@ -1,145 +0,0 @@
-From ad8a62adc230a32701bc209c6a474fb6e3a4a0fa Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Wed, 4 Dec 2013 22:11:06 -0800
-Subject: ARM: shmobile: lager: add gpio/fixed regulator for SDHI
-
-Fixed regulator is used for SDHI0/2 Vcc.
-We should use da9063 driver for Vccq,
-but, it doesn't have regulator support at this point.
-This patch uses gpio-regulator for it as quick-hack.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit be0647d556985ae58a42e7fc3751a293c418c41e)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-lager.c | 83 +++++++++++++++++++++++++++++++++++-
- 1 file changed, 82 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
-index c43d5ccd21f0..a4a16444cbe7 100644
---- a/arch/arm/mach-shmobile/board-lager.c
-+++ b/arch/arm/mach-shmobile/board-lager.c
-@@ -31,7 +31,9 @@
- #include <linux/platform_data/rcar-du.h>
- #include <linux/platform_device.h>
- #include <linux/phy.h>
-+#include <linux/regulator/driver.h>
- #include <linux/regulator/fixed.h>
-+#include <linux/regulator/gpio-regulator.h>
- #include <linux/regulator/machine.h>
- #include <linux/sh_eth.h>
- #include <mach/common.h>
-@@ -146,6 +148,71 @@ static struct regulator_consumer_supply fixed3v3_power_consumers[] =
- 	REGULATOR_SUPPLY("vmmc", "sh_mmcif.1"),
- };
- 
-+/*
-+ * SDHI regulator macro
-+ *
-+ ** FIXME**
-+ * Lager board vqmmc is provided via DA9063 PMIC chip,
-+ * and we should use ${LINK}/drivers/mfd/da9063-* driver for it.
-+ * but, it doesn't have regulator support at this point.
-+ * It uses gpio-regulator for vqmmc as quick-hack.
-+ */
-+#define SDHI_REGULATOR(idx, vdd_pin, vccq_pin)				\
-+static struct regulator_consumer_supply vcc_sdhi##idx##_consumer =	\
-+	REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi." #idx);		\
-+									\
-+static struct regulator_init_data vcc_sdhi##idx##_init_data = {		\
-+	.constraints = {						\
-+		.valid_ops_mask = REGULATOR_CHANGE_STATUS,		\
-+	},								\
-+	.consumer_supplies	= &vcc_sdhi##idx##_consumer,		\
-+	.num_consumer_supplies	= 1,					\
-+};									\
-+									\
-+static const struct fixed_voltage_config vcc_sdhi##idx##_info __initconst = {\
-+	.supply_name	= "SDHI" #idx "Vcc",				\
-+	.microvolts	= 3300000,					\
-+	.gpio		= vdd_pin,					\
-+	.enable_high	= 1,						\
-+	.init_data	= &vcc_sdhi##idx##_init_data,			\
-+};									\
-+									\
-+static struct regulator_consumer_supply vccq_sdhi##idx##_consumer =	\
-+	REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi." #idx);		\
-+									\
-+static struct regulator_init_data vccq_sdhi##idx##_init_data = {	\
-+	.constraints = {						\
-+		.input_uV	= 3300000,				\
-+		.min_uV		= 1800000,				\
-+		.max_uV		= 3300000,				\
-+		.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |		\
-+				  REGULATOR_CHANGE_STATUS,		\
-+	},								\
-+	.consumer_supplies	= &vccq_sdhi##idx##_consumer,		\
-+	.num_consumer_supplies	= 1,					\
-+};									\
-+									\
-+static struct gpio vccq_sdhi##idx##_gpio =				\
-+	{ vccq_pin, GPIOF_OUT_INIT_HIGH, "vccq-sdhi" #idx };		\
-+									\
-+static struct gpio_regulator_state vccq_sdhi##idx##_states[] = {	\
-+	{ .value = 1800000, .gpios = 0 },				\
-+	{ .value = 3300000, .gpios = 1 },				\
-+};									\
-+									\
-+static const struct gpio_regulator_config vccq_sdhi##idx##_info __initconst = {\
-+	.supply_name	= "vqmmc",					\
-+	.gpios		= &vccq_sdhi##idx##_gpio,			\
-+	.nr_gpios	= 1,						\
-+	.states		= vccq_sdhi##idx##_states,			\
-+	.nr_states	= ARRAY_SIZE(vccq_sdhi##idx##_states),		\
-+	.type		= REGULATOR_VOLTAGE,				\
-+	.init_data	= &vccq_sdhi##idx##_init_data,			\
-+};
-+
-+SDHI_REGULATOR(0, RCAR_GP_PIN(5, 24), RCAR_GP_PIN(5, 29));
-+SDHI_REGULATOR(2, RCAR_GP_PIN(5, 25), RCAR_GP_PIN(5, 30));
-+
- /* MMCIF */
- static const struct sh_mmcif_plat_data mmcif1_pdata __initconst = {
- 	.caps		= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
-@@ -256,6 +323,9 @@ static const struct pinctrl_map lager_pinctrl_map[] = {
- 
- static void __init lager_add_standard_devices(void)
- {
-+	int fixed_regulator_idx = 0;
-+	int gpio_regulator_idx = 0;
-+
- 	r8a7790_clock_init();
- 
- 	pinctrl_register_mappings(lager_pinctrl_map,
-@@ -269,7 +339,8 @@ static void __init lager_add_standard_devices(void)
- 	platform_device_register_data(&platform_bus, "gpio-keys", -1,
- 				      &lager_keys_pdata,
- 				      sizeof(lager_keys_pdata));
--	regulator_register_always_on(0, "fixed-3.3V", fixed3v3_power_consumers,
-+	regulator_register_always_on(fixed_regulator_idx++,
-+				     "fixed-3.3V", fixed3v3_power_consumers,
- 				     ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
- 	platform_device_register_resndata(&platform_bus, "sh_mmcif", 1,
- 					  mmcif1_resources, ARRAY_SIZE(mmcif1_resources),
-@@ -287,6 +358,16 @@ static void __init lager_add_standard_devices(void)
- 					  ARRAY_SIZE(qspi_resources),
- 					  &qspi_pdata, sizeof(qspi_pdata));
- 	spi_register_board_info(spi_info, ARRAY_SIZE(spi_info));
-+
-+	platform_device_register_data(&platform_bus, "reg-fixed-voltage", fixed_regulator_idx++,
-+				      &vcc_sdhi0_info, sizeof(struct fixed_voltage_config));
-+	platform_device_register_data(&platform_bus, "reg-fixed-voltage", fixed_regulator_idx++,
-+				      &vcc_sdhi2_info, sizeof(struct fixed_voltage_config));
-+
-+	platform_device_register_data(&platform_bus, "gpio-regulator", gpio_regulator_idx++,
-+				      &vccq_sdhi0_info, sizeof(struct gpio_regulator_config));
-+	platform_device_register_data(&platform_bus, "gpio-regulator", gpio_regulator_idx++,
-+				      &vccq_sdhi2_info, sizeof(struct gpio_regulator_config));
- }
- 
- /*
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0203-pinctrl-sh-pfc-r8a7779-Fix-missing-MOD_SEL2-entry.patch b/patches.renesas/0203-pinctrl-sh-pfc-r8a7779-Fix-missing-MOD_SEL2-entry.patch
deleted file mode 100644
index 1dd89c64c236e..0000000000000
--- a/patches.renesas/0203-pinctrl-sh-pfc-r8a7779-Fix-missing-MOD_SEL2-entry.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From faa6abde94a12913a84854002327e0407633fa44 Mon Sep 17 00:00:00 2001
-From: Phil Edworthy <phil.edworthy@renesas.com>
-Date: Mon, 3 Jun 2013 08:52:28 +0100
-Subject: pinctrl: sh-pfc: r8a7779: Fix missing MOD_SEL2 entry
-
-The list of functions selected by the MOD_SEL2 register was missing
-an entry. This caused all entries after this to modify the MOD_SEL2
-register incorrectly.
-
-This bug showed up when selecting i2c2_c pins on the Renesas Hurricane board.
-
-This bug has been present since pinmux support was added for the
-r8a7779 SoC by 881023d28b465eb457067dc8bbca0f24d8b34279 ("sh-pfc: Add
-r8a7779 pinmux support") in v3.8-rc4.
-
-Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit b9ffcc2b12301eaf726ac24c93de01017ffea178)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7779.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7779.c b/drivers/pinctrl/sh-pfc/pfc-r8a7779.c
-index 96bdf480..8e22ca6c 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7779.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7779.c
-@@ -3768,7 +3768,7 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
- 	    /* SEL_SCIF [2] */
- 	    FN_SEL_SCIF_0, FN_SEL_SCIF_1, FN_SEL_SCIF_2, FN_SEL_SCIF_3,
- 	    /* SEL_CANCLK [2] */
--	    FN_SEL_CANCLK_0, FN_SEL_CANCLK_1, FN_SEL_CANCLK_2,
-+	    FN_SEL_CANCLK_0, FN_SEL_CANCLK_1, FN_SEL_CANCLK_2, 0,
- 	    /* SEL_CAN0 [1] */
- 	    FN_SEL_CAN0_0, FN_SEL_CAN0_1,
- 	    /* SEL_HSCIF1 [1] */
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0204-ARM-shmobile-bockw-add-SMSC-support-on-reference.patch b/patches.renesas/0204-ARM-shmobile-bockw-add-SMSC-support-on-reference.patch
deleted file mode 100644
index 069b10a0f1835..0000000000000
--- a/patches.renesas/0204-ARM-shmobile-bockw-add-SMSC-support-on-reference.patch
+++ /dev/null
@@ -1,58 +0,0 @@
-From 9f3d934bf8c53c3a67fb69df16531613bf373fec Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Wed, 2 Oct 2013 01:33:36 -0700
-Subject: ARM: shmobile: bockw: add SMSC support on reference
-
-This patch enables INTC IRQ, and SMSC IRQ.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 90357fcbf2fcb9e50899fd3b2a91a6dc3cfe5ea5)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-bockw-reference.c | 20 ++++++++++++++++++++
- 1 file changed, 20 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/board-bockw-reference.c b/arch/arm/mach-shmobile/board-bockw-reference.c
-index 1a7c893e1a52..ae88fdad4b3a 100644
---- a/arch/arm/mach-shmobile/board-bockw-reference.c
-+++ b/arch/arm/mach-shmobile/board-bockw-reference.c
-@@ -36,15 +36,35 @@ static const struct pinctrl_map bockw_pinctrl_map[] = {
- 				  "scif0_ctrl", "scif0"),
- };
- 
-+#define FPGA	0x18200000
-+#define IRQ0MR	0x30
-+#define COMCTLR	0x101c
- static void __init bockw_init(void)
- {
-+	static void __iomem *fpga;
-+
- 	r8a7778_clock_init();
-+	r8a7778_init_irq_extpin_dt(1);
- 
- 	pinctrl_register_mappings(bockw_pinctrl_map,
- 				  ARRAY_SIZE(bockw_pinctrl_map));
- 	r8a7778_pinmux_init();
- 	r8a7778_add_dt_devices();
- 
-+	fpga = ioremap_nocache(FPGA, SZ_1M);
-+	if (fpga) {
-+		/*
-+		 * CAUTION
-+		 *
-+		 * IRQ0/1 is cascaded interrupt from FPGA.
-+		 * it should be cared in the future
-+		 * Now, it is assuming IRQ0 was used only from SMSC.
-+		 */
-+		u16 val = ioread16(fpga + IRQ0MR);
-+		val &= ~(1 << 4); /* enable SMSC911x */
-+		iowrite16(val, fpga + IRQ0MR);
-+	}
-+
- 	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
- }
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0204-ARM-shmobile-r8a7778-add-SSIx-DMAEngine-support.patch b/patches.renesas/0204-ARM-shmobile-r8a7778-add-SSIx-DMAEngine-support.patch
deleted file mode 100644
index d9f5ba3e64af7..0000000000000
--- a/patches.renesas/0204-ARM-shmobile-r8a7778-add-SSIx-DMAEngine-support.patch
+++ /dev/null
@@ -1,139 +0,0 @@
-From 95d9eed5d5323aff9c73fcf40b180b655e32b5ca Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Tue, 3 Dec 2013 11:12:24 +0900
-Subject: ARM: shmobile: r8a7778: add SSIx DMAEngine support
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit a91be22c9222061281a380bd3f38ec9281919a2c)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/include/mach/r8a7778.h | 18 ++++++++++
- arch/arm/mach-shmobile/setup-r8a7778.c        | 51 +++++++++++++++++++++++++++
- 2 files changed, 69 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/include/mach/r8a7778.h b/arch/arm/mach-shmobile/include/mach/r8a7778.h
-index b497f932d04f..a3440e50fafa 100644
---- a/arch/arm/mach-shmobile/include/mach/r8a7778.h
-+++ b/arch/arm/mach-shmobile/include/mach/r8a7778.h
-@@ -27,6 +27,24 @@ enum {
- 	HPBDMA_SLAVE_DUMMY,
- 	HPBDMA_SLAVE_SDHI0_TX,
- 	HPBDMA_SLAVE_SDHI0_RX,
-+	HPBDMA_SLAVE_SSI0_TX,
-+	HPBDMA_SLAVE_SSI0_RX,
-+	HPBDMA_SLAVE_SSI1_TX,
-+	HPBDMA_SLAVE_SSI1_RX,
-+	HPBDMA_SLAVE_SSI2_TX,
-+	HPBDMA_SLAVE_SSI2_RX,
-+	HPBDMA_SLAVE_SSI3_TX,
-+	HPBDMA_SLAVE_SSI3_RX,
-+	HPBDMA_SLAVE_SSI4_TX,
-+	HPBDMA_SLAVE_SSI4_RX,
-+	HPBDMA_SLAVE_SSI5_TX,
-+	HPBDMA_SLAVE_SSI5_RX,
-+	HPBDMA_SLAVE_SSI6_TX,
-+	HPBDMA_SLAVE_SSI6_RX,
-+	HPBDMA_SLAVE_SSI7_TX,
-+	HPBDMA_SLAVE_SSI7_RX,
-+	HPBDMA_SLAVE_SSI8_TX,
-+	HPBDMA_SLAVE_SSI8_RX,
- 	HPBDMA_SLAVE_HPBIF0_TX,
- 	HPBDMA_SLAVE_HPBIF0_RX,
- 	HPBDMA_SLAVE_HPBIF1_TX,
-diff --git a/arch/arm/mach-shmobile/setup-r8a7778.c b/arch/arm/mach-shmobile/setup-r8a7778.c
-index 81701cfb6cc6..e786338701cb 100644
---- a/arch/arm/mach-shmobile/setup-r8a7778.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7778.c
-@@ -319,6 +319,29 @@ void __init r8a7778_add_dt_devices(void)
- #define HPB_DMAE_ASYNCMDR_ASMD21_SINGLE	BIT(1)	/* SDHI0 */
- #define HPB_DMAE_ASYNCMDR_ASMD21_MULTI	0	/* SDHI0 */
- 
-+#define HPBDMA_SSI(_id)				\
-+{						\
-+	.id	= HPBDMA_SLAVE_SSI## _id ##_TX,	\
-+	.addr	= 0xffd91008 + (_id * 0x40),	\
-+	.dcr	= HPB_DMAE_DCR_CT |		\
-+		  HPB_DMAE_DCR_DIP |		\
-+		  HPB_DMAE_DCR_SPDS_32BIT |	\
-+		  HPB_DMAE_DCR_DMDL |		\
-+		  HPB_DMAE_DCR_DPDS_32BIT,	\
-+	.port   = _id + (_id << 8),		\
-+	.dma_ch = (28 + _id),			\
-+}, {						\
-+	.id	= HPBDMA_SLAVE_SSI## _id ##_RX,	\
-+	.addr	= 0xffd9100c + (_id * 0x40),	\
-+	.dcr	= HPB_DMAE_DCR_CT |		\
-+		  HPB_DMAE_DCR_DIP |		\
-+		  HPB_DMAE_DCR_SMDL |		\
-+		  HPB_DMAE_DCR_SPDS_32BIT |	\
-+		  HPB_DMAE_DCR_DPDS_32BIT,	\
-+	.port   = _id + (_id << 8),		\
-+	.dma_ch = (28 + _id),			\
-+}
-+
- #define HPBDMA_HPBIF(_id)				\
- {							\
- 	.id	= HPBDMA_SLAVE_HPBIF## _id ##_TX,	\
-@@ -373,6 +396,16 @@ static const struct hpb_dmae_slave_config hpb_dmae_slaves[] = {
- 		.dma_ch	= 22,
- 	},
- 
-+	HPBDMA_SSI(0),
-+	HPBDMA_SSI(1),
-+	HPBDMA_SSI(2),
-+	HPBDMA_SSI(3),
-+	HPBDMA_SSI(4),
-+	HPBDMA_SSI(5),
-+	HPBDMA_SSI(6),
-+	HPBDMA_SSI(7),
-+	HPBDMA_SSI(8),
-+
- 	HPBDMA_HPBIF(0),
- 	HPBDMA_HPBIF(1),
- 	HPBDMA_HPBIF(2),
-@@ -387,22 +420,40 @@ static const struct hpb_dmae_slave_config hpb_dmae_slaves[] = {
- static const struct hpb_dmae_channel hpb_dmae_channels[] = {
- 	HPB_DMAE_CHANNEL(0x7e, HPBDMA_SLAVE_SDHI0_TX), /* ch. 21 */
- 	HPB_DMAE_CHANNEL(0x7e, HPBDMA_SLAVE_SDHI0_RX), /* ch. 22 */
-+	HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI0_TX),   /* ch. 28 */
-+	HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI0_RX),   /* ch. 28 */
- 	HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF0_TX), /* ch. 28 */
- 	HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF0_RX), /* ch. 28 */
-+	HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI1_TX),   /* ch. 29 */
-+	HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI1_RX),   /* ch. 29 */
- 	HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF1_TX), /* ch. 29 */
- 	HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF1_RX), /* ch. 29 */
-+	HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI2_TX),   /* ch. 30 */
-+	HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI2_RX),   /* ch. 30 */
- 	HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF2_TX), /* ch. 30 */
- 	HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF2_RX), /* ch. 30 */
-+	HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI3_TX),   /* ch. 31 */
-+	HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI3_RX),   /* ch. 31 */
- 	HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF3_TX), /* ch. 31 */
- 	HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF3_RX), /* ch. 31 */
-+	HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI4_TX),   /* ch. 32 */
-+	HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI4_RX),   /* ch. 32 */
- 	HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF4_TX), /* ch. 32 */
- 	HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF4_RX), /* ch. 32 */
-+	HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI5_TX),   /* ch. 33 */
-+	HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI5_RX),   /* ch. 33 */
- 	HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF5_TX), /* ch. 33 */
- 	HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF5_RX), /* ch. 33 */
-+	HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI6_TX),   /* ch. 34 */
-+	HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI6_RX),   /* ch. 34 */
- 	HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF6_TX), /* ch. 34 */
- 	HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF6_RX), /* ch. 34 */
-+	HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI7_TX),   /* ch. 35 */
-+	HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI7_RX),   /* ch. 35 */
- 	HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF7_TX), /* ch. 35 */
- 	HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF7_RX), /* ch. 35 */
-+	HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI8_TX),   /* ch. 36 */
-+	HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI8_RX),   /* ch. 36 */
- 	HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF8_TX), /* ch. 36 */
- 	HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_HPBIF8_RX), /* ch. 36 */
- };
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0204-ARM-shmobile-r8a7790-Configure-R-Car-GPIO-for-IRQ_TY.patch b/patches.renesas/0204-ARM-shmobile-r8a7790-Configure-R-Car-GPIO-for-IRQ_TY.patch
deleted file mode 100644
index b6d82a3152136..0000000000000
--- a/patches.renesas/0204-ARM-shmobile-r8a7790-Configure-R-Car-GPIO-for-IRQ_TY.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From ac1e195dfd3a292ebd10355e67bc0272bb27a954 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Mon, 13 May 2013 17:53:52 +0900
-Subject: ARM: shmobile: r8a7790: Configure R-Car GPIO for IRQ_TYPE_EDGE_BOTH
-
-"gpio-rcar: Support IRQ_TYPE_EDGE_BOTH" adds support to the R-Car GPIO
-driver for IRQ_TYPE_EDGE_BOTH. As hardware support for this feature is
-not universal for all SoCs a flag, has_both_edge_trigger, has been
-added to the platform data of the driver to allow this feature to be
-enabled.
-
-As the r8a7790 SoC hardware supports this feature enable it.
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit d93906b869dd9444823f04ea64a585143f18a26e)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-r8a7790.c | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c
-index eeef5f61..b461d934 100644
---- a/arch/arm/mach-shmobile/setup-r8a7790.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7790.c
-@@ -45,6 +45,7 @@ static struct gpio_rcar_config r8a7790_gpio##idx##_platform_data = {	\
- 	.irq_base	= 0,						\
- 	.number_of_pins	= 32,						\
- 	.pctl_name	= "pfc-r8a7790",				\
-+	.has_both_edge_trigger = 1,					\
- };									\
- 
- R8A7790_GPIO(0);
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0205-ARM-shmobile-marzen-enable-INTC-IRQ.patch b/patches.renesas/0205-ARM-shmobile-marzen-enable-INTC-IRQ.patch
deleted file mode 100644
index 7b61904a00ede..0000000000000
--- a/patches.renesas/0205-ARM-shmobile-marzen-enable-INTC-IRQ.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From 3021c348f68ce0a5fd0175b4627bc22a25a95896 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Wed, 2 Oct 2013 01:39:48 -0700
-Subject: ARM: shmobile: marzen: enable INTC IRQ
-
-This patch adds missing INTC IRQ settings
-which is required from SMSC.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 7d4bde88e1135c4a3106b79650d3b85335f35717)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-marzen-reference.c | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/arch/arm/mach-shmobile/board-marzen-reference.c b/arch/arm/mach-shmobile/board-marzen-reference.c
-index 3f4250a2d4eb..2773936bf7dc 100644
---- a/arch/arm/mach-shmobile/board-marzen-reference.c
-+++ b/arch/arm/mach-shmobile/board-marzen-reference.c
-@@ -28,6 +28,7 @@
- static void __init marzen_init(void)
- {
- 	r8a7779_add_standard_devices_dt();
-+	r8a7779_init_irq_extpin_dt(1); /* IRQ1 as individual interrupt */
- }
- 
- static const char *marzen_boards_compat_dt[] __initdata = {
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0205-ARM-shmobile-r8a7740-pinmux-platform-device-cleanup.patch b/patches.renesas/0205-ARM-shmobile-r8a7740-pinmux-platform-device-cleanup.patch
deleted file mode 100644
index 6ce067f819523..0000000000000
--- a/patches.renesas/0205-ARM-shmobile-r8a7740-pinmux-platform-device-cleanup.patch
+++ /dev/null
@@ -1,59 +0,0 @@
-From 279d4974c9edc675b70d53bf7c7469e91318009e Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Wed, 3 Apr 2013 15:32:58 +0900
-Subject: ARM: shmobile: r8a7740 pinmux platform device cleanup
-
-Use DEFINE_RES_MEM() and platform_device_register_simple()
-to save a couple of lines of code.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 3404622a77f90168fd1190c64e92edf548c0f8f0)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-r8a7740.c | 24 +++++-------------------
- 1 file changed, 5 insertions(+), 19 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-r8a7740.c b/arch/arm/mach-shmobile/setup-r8a7740.c
-index 9284e6fd..00c5a707 100644
---- a/arch/arm/mach-shmobile/setup-r8a7740.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7740.c
-@@ -70,29 +70,15 @@ void __init r8a7740_map_io(void)
- }
- 
- /* PFC */
--static struct resource r8a7740_pfc_resources[] = {
--	[0] = {
--		.start	= 0xe6050000,
--		.end	= 0xe6057fff,
--		.flags	= IORESOURCE_MEM,
--	},
--	[1] = {
--		.start	= 0xe605800c,
--		.end	= 0xe605802b,
--		.flags	= IORESOURCE_MEM,
--	}
--};
--
--static struct platform_device r8a7740_pfc_device = {
--	.name		= "pfc-r8a7740",
--	.id		= -1,
--	.resource	= r8a7740_pfc_resources,
--	.num_resources	= ARRAY_SIZE(r8a7740_pfc_resources),
-+static const struct resource pfc_resources[] = {
-+	DEFINE_RES_MEM(0xe6050000, 0x8000),
-+	DEFINE_RES_MEM(0xe605800c, 0x0020),
- };
- 
- void __init r8a7740_pinmux_init(void)
- {
--	platform_device_register(&r8a7740_pfc_device);
-+	platform_device_register_simple("pfc-r8a7740", -1, pfc_resources,
-+					ARRAY_SIZE(pfc_resources));
- }
- 
- static struct renesas_intc_irqpin_config irqpin0_platform_data = {
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0205-ARM-shmobile-r8a7790-add-I2C-support.patch b/patches.renesas/0205-ARM-shmobile-r8a7790-add-I2C-support.patch
deleted file mode 100644
index 2c01d04b270f9..0000000000000
--- a/patches.renesas/0205-ARM-shmobile-r8a7790-add-I2C-support.patch
+++ /dev/null
@@ -1,79 +0,0 @@
-From 0b28d499d9a0bfd099e9cecf28f1cfb86c2b89e7 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Thu, 28 Nov 2013 19:02:12 -0800
-Subject: ARM: shmobile: r8a7790: add I2C support
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit b448c904f5058b6cd35bf1a43ca219dcfeca4da6)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r8a7790.c |  4 ++++
- arch/arm/mach-shmobile/setup-r8a7790.c | 25 +++++++++++++++++++++++++
- 2 files changed, 29 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
-index 312376d2cfd1..c5c60ecdec8f 100644
---- a/arch/arm/mach-shmobile/clock-r8a7790.c
-+++ b/arch/arm/mach-shmobile/clock-r8a7790.c
-@@ -292,9 +292,13 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP717]),
- 	CLKDEV_DEV_ID("sh-sci.9", &mstp_clks[MSTP716]),
- 	CLKDEV_DEV_ID("e6508000.i2c", &mstp_clks[MSTP931]),
-+	CLKDEV_DEV_ID("i2c-rcar.0", &mstp_clks[MSTP931]),
- 	CLKDEV_DEV_ID("e6518000.i2c", &mstp_clks[MSTP930]),
-+	CLKDEV_DEV_ID("i2c-rcar.1", &mstp_clks[MSTP930]),
- 	CLKDEV_DEV_ID("e6530000.i2c", &mstp_clks[MSTP929]),
-+	CLKDEV_DEV_ID("i2c-rcar.2", &mstp_clks[MSTP929]),
- 	CLKDEV_DEV_ID("e6540000.i2c", &mstp_clks[MSTP928]),
-+	CLKDEV_DEV_ID("i2c-rcar.3", &mstp_clks[MSTP928]),
- 	CLKDEV_DEV_ID("r8a7790-ether", &mstp_clks[MSTP813]),
- 	CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]),
- 	CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
-diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c
-index 3543c3bacb75..8474818a7ae0 100644
---- a/arch/arm/mach-shmobile/setup-r8a7790.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7790.c
-@@ -67,6 +67,27 @@ R8A7790_GPIO(5);
- 		&r8a7790_gpio##idx##_platform_data,			\
- 		sizeof(r8a7790_gpio##idx##_platform_data))
- 
-+static struct resource i2c_resources[] __initdata = {
-+	/* I2C0 */
-+	DEFINE_RES_MEM(0xE6508000, 0x40),
-+	DEFINE_RES_IRQ(gic_spi(287)),
-+	/* I2C1 */
-+	DEFINE_RES_MEM(0xE6518000, 0x40),
-+	DEFINE_RES_IRQ(gic_spi(288)),
-+	/* I2C2 */
-+	DEFINE_RES_MEM(0xE6530000, 0x40),
-+	DEFINE_RES_IRQ(gic_spi(286)),
-+	/* I2C3 */
-+	DEFINE_RES_MEM(0xE6540000, 0x40),
-+	DEFINE_RES_IRQ(gic_spi(290)),
-+
-+};
-+
-+#define r8a7790_register_i2c(idx)		\
-+	platform_device_register_simple(	\
-+		"i2c-rcar", idx,		\
-+		i2c_resources + (2 * idx), 2);	\
-+
- void __init r8a7790_pinmux_init(void)
- {
- 	r8a7790_register_pfc();
-@@ -76,6 +97,10 @@ void __init r8a7790_pinmux_init(void)
- 	r8a7790_register_gpio(3);
- 	r8a7790_register_gpio(4);
- 	r8a7790_register_gpio(5);
-+	r8a7790_register_i2c(0);
-+	r8a7790_register_i2c(1);
-+	r8a7790_register_i2c(2);
-+	r8a7790_register_i2c(3);
- }
- 
- #define SCIF_COMMON(scif_type, baseaddr, irq)			\
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0206-ARM-shmobile-bockw-fixup-ether-node-naming.patch b/patches.renesas/0206-ARM-shmobile-bockw-fixup-ether-node-naming.patch
deleted file mode 100644
index b776fc936dca6..0000000000000
--- a/patches.renesas/0206-ARM-shmobile-bockw-fixup-ether-node-naming.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From 53982713443f44da4d4513523fc531a55043f40b Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Thu, 3 Oct 2013 18:20:19 -0700
-Subject: ARM: shmobile: bockw: fixup ether node naming
-
-According to the ePAPR spec,
-the node name should be "ethernet", not "lan0".
-
-Reported-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 73c79afa61cdee2553461ee714bb4716372bdd55)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7778-bockw-reference.dts | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/arch/arm/boot/dts/r8a7778-bockw-reference.dts b/arch/arm/boot/dts/r8a7778-bockw-reference.dts
-index 4425fd2e09f4..969e386e852c 100644
---- a/arch/arm/boot/dts/r8a7778-bockw-reference.dts
-+++ b/arch/arm/boot/dts/r8a7778-bockw-reference.dts
-@@ -39,7 +39,7 @@
- 		regulator-always-on;
- 	};
- 
--	lan0@18300000 {
-+	ethernet@18300000 {
- 		compatible = "smsc,lan9220", "smsc,lan9115";
- 		reg = <0x18300000 0x1000>;
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0206-ARM-shmobile-kzm9g-tidyup-FSI-pinctrl.patch b/patches.renesas/0206-ARM-shmobile-kzm9g-tidyup-FSI-pinctrl.patch
deleted file mode 100644
index 4385825afab5f..0000000000000
--- a/patches.renesas/0206-ARM-shmobile-kzm9g-tidyup-FSI-pinctrl.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From 080249b18a4a53adcedf53b3b0fed269c1c8471a Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Wed, 22 May 2013 18:34:10 -0700
-Subject: ARM: shmobile: kzm9g: tidyup FSI pinctrl
-
-sh73a0 needs "sh_fsi2", not "sh_fsi2.0"
-
-Tested-by: Hiep Cao Minh <cm-hiep@jinso.co.jp>
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 41534a37c427c9b715ee75cd7ef34785bb81785f)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-kzm9g.c | 8 ++++----
- 1 file changed, 4 insertions(+), 4 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-kzm9g.c b/arch/arm/mach-shmobile/board-kzm9g.c
-index fc4ca9be..1fdf05cb 100644
---- a/arch/arm/mach-shmobile/board-kzm9g.c
-+++ b/arch/arm/mach-shmobile/board-kzm9g.c
-@@ -663,13 +663,13 @@ static unsigned long pin_pullup_conf[] = {
- 
- static const struct pinctrl_map kzm_pinctrl_map[] = {
- 	/* FSIA (AK4648) */
--	PIN_MAP_MUX_GROUP_DEFAULT("sh_fsi2.0", "pfc-sh73a0",
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh_fsi2", "pfc-sh73a0",
- 				  "fsia_mclk_in", "fsia"),
--	PIN_MAP_MUX_GROUP_DEFAULT("sh_fsi2.0", "pfc-sh73a0",
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh_fsi2", "pfc-sh73a0",
- 				  "fsia_sclk_in", "fsia"),
--	PIN_MAP_MUX_GROUP_DEFAULT("sh_fsi2.0", "pfc-sh73a0",
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh_fsi2", "pfc-sh73a0",
- 				  "fsia_data_in", "fsia"),
--	PIN_MAP_MUX_GROUP_DEFAULT("sh_fsi2.0", "pfc-sh73a0",
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh_fsi2", "pfc-sh73a0",
- 				  "fsia_data_out", "fsia"),
- 	/* I2C3 */
- 	PIN_MAP_MUX_GROUP_DEFAULT("i2c-sh_mobile.3", "pfc-sh73a0",
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0206-ARM-shmobile-sh73a0-add-FSI-clock-support-for-DT.patch b/patches.renesas/0206-ARM-shmobile-sh73a0-add-FSI-clock-support-for-DT.patch
deleted file mode 100644
index 86daa7c1179df..0000000000000
--- a/patches.renesas/0206-ARM-shmobile-sh73a0-add-FSI-clock-support-for-DT.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From 1a246cbb50e50c2ec084ef746accc9a98864f4d3 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Wed, 4 Dec 2013 17:32:42 -0800
-Subject: ARM: shmobile: sh73a0: add FSI clock support for DT
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit e1c98c5db947cbb934b8fb0a2faf5eafd9c035cc)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-sh73a0.c | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c
-index 30d88689a960..23edf8360c27 100644
---- a/arch/arm/mach-shmobile/clock-sh73a0.c
-+++ b/arch/arm/mach-shmobile/clock-sh73a0.c
-@@ -652,6 +652,7 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP331]), /* SCIFA6 */
- 	CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]), /* CMT10 */
- 	CLKDEV_DEV_ID("sh_fsi2", &mstp_clks[MSTP328]), /* FSI */
-+	CLKDEV_DEV_ID("ec230000.sound", &mstp_clks[MSTP328]), /* FSI */
- 	CLKDEV_DEV_ID("sh_irda.0", &mstp_clks[MSTP325]), /* IrDA */
- 	CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* I2C1 */
- 	CLKDEV_DEV_ID("e6822000.i2c", &mstp_clks[MSTP323]), /* I2C1 */
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0207-ARM-shmobile-Initialize-PWM-backlight-enable_gpio-fi.patch b/patches.renesas/0207-ARM-shmobile-Initialize-PWM-backlight-enable_gpio-fi.patch
deleted file mode 100644
index 5bb1d37548666..0000000000000
--- a/patches.renesas/0207-ARM-shmobile-Initialize-PWM-backlight-enable_gpio-fi.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From bfec1cd6fa82dda8a32e28a9674b63383e3c9d53 Mon Sep 17 00:00:00 2001
-From: Thierry Reding <treding@nvidia.com>
-Date: Fri, 30 Aug 2013 12:21:42 +0200
-Subject: ARM: shmobile: Initialize PWM backlight enable_gpio field
-
-The GPIO API defines 0 as being a valid GPIO number, so this field needs
-to be initialized explicitly.
-
-Acked-by: Simon Horman <horms+renesas@verge.net.au>
-Signed-off-by: Thierry Reding <treding@nvidia.com>
-(cherry picked from commit bf4d252a2906df097874926bcfff6a3bcef38491)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-armadillo800eva.c | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c
-index 4a11fd34a6e7..0c8595413b62 100644
---- a/arch/arm/mach-shmobile/board-armadillo800eva.c
-+++ b/arch/arm/mach-shmobile/board-armadillo800eva.c
-@@ -422,6 +422,7 @@ static struct platform_pwm_backlight_data pwm_backlight_data = {
- 	.max_brightness = 255,
- 	.dft_brightness = 255,
- 	.pwm_period_ns = 33333, /* 30kHz */
-+	.enable_gpio = -1,
- };
- 
- static struct platform_device pwm_backlight_device = {
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0207-ARM-shmobile-bockw-add-pinctrl-support.patch b/patches.renesas/0207-ARM-shmobile-bockw-add-pinctrl-support.patch
deleted file mode 100644
index 8a0d6b3c74693..0000000000000
--- a/patches.renesas/0207-ARM-shmobile-bockw-add-pinctrl-support.patch
+++ /dev/null
@@ -1,57 +0,0 @@
-From d36e835844358b45c040c1521f147acf13eb4fe6 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Fri, 12 Apr 2013 05:38:03 +0000
-Subject: ARM: shmobile: bockw: add pinctrl support
-
-SCIF0 support as 1st step
-
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 111ea17927b4be0be2423c4b7a94d6b0ab1d92a6)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-bockw.c | 13 +++++++++++++
- 1 file changed, 13 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/board-bockw.c b/arch/arm/mach-shmobile/board-bockw.c
-index 38e5e50f..dac4365c 100644
---- a/arch/arm/mach-shmobile/board-bockw.c
-+++ b/arch/arm/mach-shmobile/board-bockw.c
-@@ -18,6 +18,7 @@
-  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
-  */
- 
-+#include <linux/pinctrl/machine.h>
- #include <linux/platform_device.h>
- #include <linux/smsc911x.h>
- #include <mach/common.h>
-@@ -37,6 +38,14 @@ static struct resource smsc911x_resources[] = {
- 	DEFINE_RES_IRQ(irq_pin(0)), /* IRQ 0 */
- };
- 
-+static const struct pinctrl_map bockw_pinctrl_map[] = {
-+	/* SCIF0 */
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
-+				  "scif0_data_a", "scif0"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
-+				  "scif0_ctrl", "scif0"),
-+};
-+
- #define IRQ0MR	0x30
- static void __init bockw_init(void)
- {
-@@ -46,6 +55,10 @@ static void __init bockw_init(void)
- 	r8a7778_init_irq_extpin(1);
- 	r8a7778_add_standard_devices();
- 
-+	pinctrl_register_mappings(bockw_pinctrl_map,
-+				  ARRAY_SIZE(bockw_pinctrl_map));
-+	r8a7778_pinmux_init();
-+
- 	fpga = ioremap_nocache(0x18200000, SZ_1M);
- 	if (fpga) {
- 		/*
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0207-ARM-shmobile-sh73a0-add-FSI-support-via-DTSI.patch b/patches.renesas/0207-ARM-shmobile-sh73a0-add-FSI-support-via-DTSI.patch
deleted file mode 100644
index db5329c79a40e..0000000000000
--- a/patches.renesas/0207-ARM-shmobile-sh73a0-add-FSI-support-via-DTSI.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From d1651c202d550a2a5c90a6b6fe53e1e3ebe75f77 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Wed, 4 Dec 2013 17:32:54 -0800
-Subject: ARM: shmobile: sh73a0: add FSI support via DTSI
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 63b1303d1922f7660bd9e90da56dfbf93134c5aa)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/sh73a0.dtsi | 9 +++++++++
- 1 file changed, 9 insertions(+)
-
-diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi
-index 241c8cdaeaa1..c460dd229b13 100644
---- a/arch/arm/boot/dts/sh73a0.dtsi
-+++ b/arch/arm/boot/dts/sh73a0.dtsi
-@@ -243,4 +243,13 @@
- 		gpio-controller;
- 		#gpio-cells = <2>;
- 	};
-+
-+	sh_fsi2: sound@ec230000 {
-+		#sound-dai-cells = <1>;
-+		compatible = "renesas,sh_fsi2";
-+		reg = <0xec230000 0x400>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 146 0x4>;
-+		status = "disabled";
-+	};
- };
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0208-ARM-shmobile-kzm9g-add-FSI-support-for-DTS.patch b/patches.renesas/0208-ARM-shmobile-kzm9g-add-FSI-support-for-DTS.patch
deleted file mode 100644
index f919bec2471dd..0000000000000
--- a/patches.renesas/0208-ARM-shmobile-kzm9g-add-FSI-support-for-DTS.patch
+++ /dev/null
@@ -1,81 +0,0 @@
-From e2996114f449a3f7ab5336752568ec4d3030492c Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Wed, 4 Dec 2013 17:33:10 -0800
-Subject: ARM: shmobile: kzm9g: add FSI support for DTS
-
-This patch support FSI-AK4648 with simple audio card
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 3c2a87c85391272b098827e432813c9437e93992)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/sh73a0-kzm9g-reference.dts | 33 ++++++++++++++++++++++++++++
- 1 file changed, 33 insertions(+)
-
-diff --git a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
-index 5bb593daab52..eb8886b535e4 100644
---- a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
-+++ b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
-@@ -152,6 +152,20 @@
- 			label = "SW1";
- 		};
- 	};
-+
-+	sound {
-+		compatible = "simple-audio-card";
-+		simple-audio-card,format = "left_j";
-+		simple-audio-card,cpu {
-+			sound-dai = <&sh_fsi2 0>;
-+		};
-+		simple-audio-card,codec {
-+			sound-dai = <&ak4648>;
-+			bitclock-master;
-+			frame-master;
-+			system-clock-frequency = <11289600>;
-+		};
-+	};
- };
- 
- &i2c0 {
-@@ -226,6 +240,12 @@
- 			};
- 		};
- 	};
-+
-+	ak4648: ak4648@0x12 {
-+		#sound-dai-cells = <0>;
-+		compatible = "asahi-kasei,ak4648";
-+		reg = <0x12>;
-+	};
- };
- 
- &i2c3 {
-@@ -289,6 +309,12 @@
- 		renesas,groups = "sdhi2_data4", "sdhi2_ctrl";
- 		renesas,function = "sdhi2";
- 	};
-+
-+	fsia_pins: sounda {
-+		renesas,groups = "fsia_mclk_in", "fsia_sclk_in",
-+				 "fsia_data_in", "fsia_data_out";
-+		renesas,function = "fsia";
-+	};
- };
- 
- &sdhi0 {
-@@ -309,3 +335,10 @@
- 	broken-cd;
- 	status = "okay";
- };
-+
-+&sh_fsi2 {
-+	pinctrl-0 = <&fsia_pins>;
-+	pinctrl-names = "default";
-+
-+	status = "okay";
-+};
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0208-ARM-shmobile-lager-Initialize-pinmux.patch b/patches.renesas/0208-ARM-shmobile-lager-Initialize-pinmux.patch
deleted file mode 100644
index 0e1b1cb1892dd..0000000000000
--- a/patches.renesas/0208-ARM-shmobile-lager-Initialize-pinmux.patch
+++ /dev/null
@@ -1,54 +0,0 @@
-From 3a3cfd8dea95e08a3c76d98d6f03d56acc91a591 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Mon, 8 Apr 2013 11:36:22 +0200
-Subject: ARM: shmobile: lager: Initialize pinmux
-
-Initialize r8a7790 pinmuxing and register mappings for the two debug
-serial ports.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit e3a28ac29c1ff54a45167adb34ebedd51205c2ff)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-lager.c | 15 +++++++++++++++
- 1 file changed, 15 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
-index f587187a..6114edd0 100644
---- a/arch/arm/mach-shmobile/board-lager.c
-+++ b/arch/arm/mach-shmobile/board-lager.c
-@@ -21,15 +21,30 @@
- #include <linux/interrupt.h>
- #include <linux/irqchip.h>
- #include <linux/kernel.h>
-+#include <linux/pinctrl/machine.h>
- #include <linux/platform_device.h>
- #include <mach/common.h>
- #include <mach/r8a7790.h>
- #include <asm/mach-types.h>
- #include <asm/mach/arch.h>
- 
-+static const struct pinctrl_map lager_pinctrl_map[] = {
-+	/* SCIF0 (CN19: DEBUG SERIAL0) */
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.6", "pfc-r8a7790",
-+				  "scif0_data", "scif0"),
-+	/* SCIF1 (CN20: DEBUG SERIAL1) */
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.7", "pfc-r8a7790",
-+				  "scif1_data", "scif1"),
-+};
-+
- static void __init lager_add_standard_devices(void)
- {
- 	r8a7790_clock_init();
-+
-+	pinctrl_register_mappings(lager_pinctrl_map,
-+				  ARRAY_SIZE(lager_pinctrl_map));
-+	r8a7790_pinmux_init();
-+
- 	r8a7790_add_standard_devices();
- }
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0208-spi-use-platform_-get-set-_drvdata.patch b/patches.renesas/0208-spi-use-platform_-get-set-_drvdata.patch
deleted file mode 100644
index cf8dd98b840f8..0000000000000
--- a/patches.renesas/0208-spi-use-platform_-get-set-_drvdata.patch
+++ /dev/null
@@ -1,58 +0,0 @@
-From 83d6616d0c940be5181c2e0ea9840b493fe11162 Mon Sep 17 00:00:00 2001
-From: Jingoo Han <jg1.han@samsung.com>
-Date: Thu, 23 May 2013 19:20:40 +0900
-Subject: spi: use platform_{get,set}_drvdata()
-
-Use the wrapper functions for getting and setting the driver data using
-platform_device instead of using dev_{get,set}_drvdata() with &pdev->dev,
-so we can directly pass a struct platform_device.
-
-Signed-off-by: Jingoo Han <jg1.han@samsung.com>
-Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
-(cherry picked from commit 24b5a82cf5709a4bc577f42fdaa61b23a7f58f08)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-	drivers/spi/spi-davinci.c
-	drivers/spi/spi-fsl-spi.c
-	drivers/spi/spi-mpc52xx-psc.c
-	drivers/spi/spi-mpc52xx.c
-	drivers/spi/spi-omap-100k.c
-	drivers/spi/spi-omap-uwire.c
-	drivers/spi/spi-omap2-mcspi.c
-	drivers/spi/spi-orion.c
-	drivers/spi/spi-ppc4xx.c
-	drivers/spi/spi-sh-hspi.c
-	drivers/spi/spi-sh.c
-	drivers/spi/spi-tegra114.c
-	drivers/spi/spi-tegra20-sflash.c
-	drivers/spi/spi-tegra20-slink.c
----
- drivers/spi/spi-rspi.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/spi/spi-rspi.c b/drivers/spi/spi-rspi.c
-index 902f2fb902db..b44a6ac3cec9 100644
---- a/drivers/spi/spi-rspi.c
-+++ b/drivers/spi/spi-rspi.c
-@@ -719,7 +719,7 @@ static void rspi_release_dma(struct rspi_data *rspi)
- 
- static int rspi_remove(struct platform_device *pdev)
- {
--	struct rspi_data *rspi = dev_get_drvdata(&pdev->dev);
-+	struct rspi_data *rspi = platform_get_drvdata(pdev);
- 
- 	spi_unregister_master(rspi->master);
- 	rspi_release_dma(rspi);
-@@ -759,7 +759,7 @@ static int rspi_probe(struct platform_device *pdev)
- 	}
- 
- 	rspi = spi_master_get_devdata(master);
--	dev_set_drvdata(&pdev->dev, rspi);
-+	platform_set_drvdata(pdev, rspi);
- 
- 	rspi->master = master;
- 	rspi->addr = ioremap(res->start, resource_size(res));
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0209-ARM-shmobile-marzen-Use-RCAR_GP_PIN-macro.patch b/patches.renesas/0209-ARM-shmobile-marzen-Use-RCAR_GP_PIN-macro.patch
deleted file mode 100644
index a31d15d7b537e..0000000000000
--- a/patches.renesas/0209-ARM-shmobile-marzen-Use-RCAR_GP_PIN-macro.patch
+++ /dev/null
@@ -1,50 +0,0 @@
-From 1d94b403c7d3401f6714fea25cb5363e1d555a41 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Mon, 8 Apr 2013 12:05:32 +0200
-Subject: ARM: shmobile: marzen: Use RCAR_GP_PIN macro
-
-Replace hardcoded pin numbers with the RCAR_GP_PIN macro to make the
-code match the documentation.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 5fcf4a3c3a5bc08bf72a50ef1332501a3c1b96bb)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-marzen.c | 7 ++++---
- 1 file changed, 4 insertions(+), 3 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-marzen.c b/arch/arm/mach-shmobile/board-marzen.c
-index b9594e91..9112faef 100644
---- a/arch/arm/mach-shmobile/board-marzen.c
-+++ b/arch/arm/mach-shmobile/board-marzen.c
-@@ -28,6 +28,7 @@
- #include <linux/leds.h>
- #include <linux/dma-mapping.h>
- #include <linux/pinctrl/machine.h>
-+#include <linux/platform_data/gpio-rcar.h>
- #include <linux/regulator/fixed.h>
- #include <linux/regulator/machine.h>
- #include <linux/smsc911x.h>
-@@ -173,15 +174,15 @@ static struct platform_device usb_phy_device = {
- static struct gpio_led marzen_leds[] = {
- 	{
- 		.name		= "led2",
--		.gpio		= 157,
-+		.gpio		= RCAR_GP_PIN(4, 29),
- 		.default_state	= LEDS_GPIO_DEFSTATE_ON,
- 	}, {
- 		.name		= "led3",
--		.gpio		= 158,
-+		.gpio		= RCAR_GP_PIN(4, 30),
- 		.default_state	= LEDS_GPIO_DEFSTATE_ON,
- 	}, {
- 		.name		= "led4",
--		.gpio		= 159,
-+		.gpio		= RCAR_GP_PIN(4, 31),
- 		.default_state	= LEDS_GPIO_DEFSTATE_ON,
- 	},
- };
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0209-ARM-shmobile-r8a7778-camera-rcar-header-cleanup.patch b/patches.renesas/0209-ARM-shmobile-r8a7778-camera-rcar-header-cleanup.patch
deleted file mode 100644
index 34dfbbdfc4074..0000000000000
--- a/patches.renesas/0209-ARM-shmobile-r8a7778-camera-rcar-header-cleanup.patch
+++ /dev/null
@@ -1,45 +0,0 @@
-From f734a5c5a56a1156a516586a9f6f8671f355e23f Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Thu, 5 Dec 2013 18:09:30 -0800
-Subject: ARM: shmobile: r8a7778: camera-rcar header cleanup
-
-<linux/platform_data/camera-rcar.h> is needed on BockW,
-not setup-r8a7778.c
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 02d39132e75410633c637be006b9b772a6116da3)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-bockw.c          | 1 +
- arch/arm/mach-shmobile/include/mach/r8a7778.h | 1 -
- 2 files changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/board-bockw.c b/arch/arm/mach-shmobile/board-bockw.c
-index eb5b54fc5cc9..afb3f6869017 100644
---- a/arch/arm/mach-shmobile/board-bockw.c
-+++ b/arch/arm/mach-shmobile/board-bockw.c
-@@ -25,6 +25,7 @@
- #include <linux/mmc/sh_mmcif.h>
- #include <linux/mtd/partitions.h>
- #include <linux/pinctrl/machine.h>
-+#include <linux/platform_data/camera-rcar.h>
- #include <linux/platform_data/usb-rcar-phy.h>
- #include <linux/platform_device.h>
- #include <linux/regulator/fixed.h>
-diff --git a/arch/arm/mach-shmobile/include/mach/r8a7778.h b/arch/arm/mach-shmobile/include/mach/r8a7778.h
-index a3440e50fafa..72c9d37d377d 100644
---- a/arch/arm/mach-shmobile/include/mach/r8a7778.h
-+++ b/arch/arm/mach-shmobile/include/mach/r8a7778.h
-@@ -20,7 +20,6 @@
- #define __ASM_R8A7778_H__
- 
- #include <linux/sh_eth.h>
--#include <linux/platform_data/camera-rcar.h>
- 
- /* HPB-DMA slave IDs */
- enum {
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0209-spi-use-platform_-get-set-_drvdata.patch b/patches.renesas/0209-spi-use-platform_-get-set-_drvdata.patch
deleted file mode 100644
index d6794b6157b14..0000000000000
--- a/patches.renesas/0209-spi-use-platform_-get-set-_drvdata.patch
+++ /dev/null
@@ -1,335 +0,0 @@
-From 8861d398bc7bfedbfbd6b9f8b07096731b262f18 Mon Sep 17 00:00:00 2001
-From: Jingoo Han <jg1.han@samsung.com>
-Date: Thu, 23 May 2013 19:20:40 +0900
-Subject: spi: use platform_{get,set}_drvdata()
-
-Use the wrapper functions for getting and setting the driver data using
-platform_device instead of using dev_{get,set}_drvdata() with &pdev->dev,
-so we can directly pass a struct platform_device.
-
-Signed-off-by: Jingoo Han <jg1.han@samsung.com>
-Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
-(cherry picked from commit 24b5a82cf5709a4bc577f42fdaa61b23a7f58f08)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/spi/spi-davinci.c        | 4 ++--
- drivers/spi/spi-fsl-spi.c        | 2 +-
- drivers/spi/spi-mpc52xx-psc.c    | 2 +-
- drivers/spi/spi-mpc52xx.c        | 4 ++--
- drivers/spi/spi-omap-100k.c      | 4 ++--
- drivers/spi/spi-omap-uwire.c     | 4 ++--
- drivers/spi/spi-omap2-mcspi.c    | 4 ++--
- drivers/spi/spi-orion.c          | 4 ++--
- drivers/spi/spi-ppc4xx.c         | 6 ++----
- drivers/spi/spi-sh-hspi.c        | 4 ++--
- drivers/spi/spi-sh.c             | 4 ++--
- drivers/spi/spi-tegra114.c       | 4 ++--
- drivers/spi/spi-tegra20-sflash.c | 4 ++--
- drivers/spi/spi-tegra20-slink.c  | 4 ++--
- 14 files changed, 26 insertions(+), 28 deletions(-)
-
-diff --git a/drivers/spi/spi-davinci.c b/drivers/spi/spi-davinci.c
-index df0aacc6fc3b..7554974189dd 100644
---- a/drivers/spi/spi-davinci.c
-+++ b/drivers/spi/spi-davinci.c
-@@ -865,7 +865,7 @@ static int davinci_spi_probe(struct platform_device *pdev)
- 		goto err;
- 	}
- 
--	dev_set_drvdata(&pdev->dev, master);
-+	platform_set_drvdata(pdev, master);
- 
- 	dspi = spi_master_get_devdata(master);
- 	if (dspi == NULL) {
-@@ -1044,7 +1044,7 @@ static int davinci_spi_remove(struct platform_device *pdev)
- 	struct spi_master *master;
- 	struct resource *r;
- 
--	master = dev_get_drvdata(&pdev->dev);
-+	master = platform_get_drvdata(pdev);
- 	dspi = spi_master_get_devdata(master);
- 
- 	spi_bitbang_stop(&dspi->bitbang);
-diff --git a/drivers/spi/spi-fsl-spi.c b/drivers/spi/spi-fsl-spi.c
-index 14e202ee7036..41e89c3e3edc 100644
---- a/drivers/spi/spi-fsl-spi.c
-+++ b/drivers/spi/spi-fsl-spi.c
-@@ -853,7 +853,7 @@ err:
- 
- static int of_fsl_spi_remove(struct platform_device *ofdev)
- {
--	struct spi_master *master = dev_get_drvdata(&ofdev->dev);
-+	struct spi_master *master = platform_get_drvdata(ofdev);
- 	struct mpc8xxx_spi *mpc8xxx_spi = spi_master_get_devdata(master);
- 	int ret;
- 
-diff --git a/drivers/spi/spi-mpc52xx-psc.c b/drivers/spi/spi-mpc52xx-psc.c
-index 291120b37dbb..fed0571d4dec 100644
---- a/drivers/spi/spi-mpc52xx-psc.c
-+++ b/drivers/spi/spi-mpc52xx-psc.c
-@@ -481,7 +481,7 @@ static int mpc52xx_psc_spi_of_probe(struct platform_device *op)
- 
- static int mpc52xx_psc_spi_of_remove(struct platform_device *op)
- {
--	struct spi_master *master = spi_master_get(dev_get_drvdata(&op->dev));
-+	struct spi_master *master = spi_master_get(platform_get_drvdata(op));
- 	struct mpc52xx_psc_spi *mps = spi_master_get_devdata(master);
- 
- 	flush_workqueue(mps->workqueue);
-diff --git a/drivers/spi/spi-mpc52xx.c b/drivers/spi/spi-mpc52xx.c
-index 29f77056eedc..7c675fe83101 100644
---- a/drivers/spi/spi-mpc52xx.c
-+++ b/drivers/spi/spi-mpc52xx.c
-@@ -438,7 +438,7 @@ static int mpc52xx_spi_probe(struct platform_device *op)
- 	master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST;
- 	master->dev.of_node = op->dev.of_node;
- 
--	dev_set_drvdata(&op->dev, master);
-+	platform_set_drvdata(op, master);
- 
- 	ms = spi_master_get_devdata(master);
- 	ms->master = master;
-@@ -529,7 +529,7 @@ static int mpc52xx_spi_probe(struct platform_device *op)
- 
- static int mpc52xx_spi_remove(struct platform_device *op)
- {
--	struct spi_master *master = spi_master_get(dev_get_drvdata(&op->dev));
-+	struct spi_master *master = spi_master_get(platform_get_drvdata(op));
- 	struct mpc52xx_spi *ms = spi_master_get_devdata(master);
- 	int i;
- 
-diff --git a/drivers/spi/spi-omap-100k.c b/drivers/spi/spi-omap-100k.c
-index 78d29a18dcc4..9236764861a9 100644
---- a/drivers/spi/spi-omap-100k.c
-+++ b/drivers/spi/spi-omap-100k.c
-@@ -510,7 +510,7 @@ static int omap1_spi100k_probe(struct platform_device *pdev)
- 	master->num_chipselect = 2;
- 	master->mode_bits = MODEBITS;
- 
--	dev_set_drvdata(&pdev->dev, master);
-+	platform_set_drvdata(pdev, master);
- 
- 	spi100k = spi_master_get_devdata(master);
- 	spi100k->master = master;
-@@ -569,7 +569,7 @@ static int omap1_spi100k_remove(struct platform_device *pdev)
- 	unsigned long		flags;
- 	int			status = 0;
- 
--	master = dev_get_drvdata(&pdev->dev);
-+	master = platform_get_drvdata(pdev);
- 	spi100k = spi_master_get_devdata(master);
- 
- 	spin_lock_irqsave(&spi100k->lock, flags);
-diff --git a/drivers/spi/spi-omap-uwire.c b/drivers/spi/spi-omap-uwire.c
-index 102b233b50c4..a6a8f0961750 100644
---- a/drivers/spi/spi-omap-uwire.c
-+++ b/drivers/spi/spi-omap-uwire.c
-@@ -495,7 +495,7 @@ static int uwire_probe(struct platform_device *pdev)
- 		return -ENOMEM;
- 	}
- 
--	dev_set_drvdata(&pdev->dev, uwire);
-+	platform_set_drvdata(pdev, uwire);
- 
- 	uwire->ck = clk_get(&pdev->dev, "fck");
- 	if (IS_ERR(uwire->ck)) {
-@@ -538,7 +538,7 @@ static int uwire_probe(struct platform_device *pdev)
- 
- static int uwire_remove(struct platform_device *pdev)
- {
--	struct uwire_spi	*uwire = dev_get_drvdata(&pdev->dev);
-+	struct uwire_spi	*uwire = platform_get_drvdata(pdev);
- 	int			status;
- 
- 	// FIXME remove all child devices, somewhere ...
-diff --git a/drivers/spi/spi-omap2-mcspi.c b/drivers/spi/spi-omap2-mcspi.c
-index 86d2158946bb..1a75aefd1504 100644
---- a/drivers/spi/spi-omap2-mcspi.c
-+++ b/drivers/spi/spi-omap2-mcspi.c
-@@ -1204,7 +1204,7 @@ static int omap2_mcspi_probe(struct platform_device *pdev)
- 	master->cleanup = omap2_mcspi_cleanup;
- 	master->dev.of_node = node;
- 
--	dev_set_drvdata(&pdev->dev, master);
-+	platform_set_drvdata(pdev, master);
- 
- 	mcspi = spi_master_get_devdata(master);
- 	mcspi->master = master;
-@@ -1318,7 +1318,7 @@ static int omap2_mcspi_remove(struct platform_device *pdev)
- 	struct omap2_mcspi	*mcspi;
- 	struct omap2_mcspi_dma	*dma_channels;
- 
--	master = dev_get_drvdata(&pdev->dev);
-+	master = platform_get_drvdata(pdev);
- 	mcspi = spi_master_get_devdata(master);
- 	dma_channels = mcspi->dma_channels;
- 
-diff --git a/drivers/spi/spi-orion.c b/drivers/spi/spi-orion.c
-index 66a5f82cf138..5d90bebaa0fa 100644
---- a/drivers/spi/spi-orion.c
-+++ b/drivers/spi/spi-orion.c
-@@ -428,7 +428,7 @@ static int orion_spi_probe(struct platform_device *pdev)
- 	master->transfer_one_message = orion_spi_transfer_one_message;
- 	master->num_chipselect = ORION_NUM_CHIPSELECTS;
- 
--	dev_set_drvdata(&pdev->dev, master);
-+	platform_set_drvdata(pdev, master);
- 
- 	spi = spi_master_get_devdata(master);
- 	spi->master = master;
-@@ -485,7 +485,7 @@ static int orion_spi_remove(struct platform_device *pdev)
- 	struct resource *r;
- 	struct orion_spi *spi;
- 
--	master = dev_get_drvdata(&pdev->dev);
-+	master = platform_get_drvdata(pdev);
- 	spi = spi_master_get_devdata(master);
- 
- 	clk_disable_unprepare(spi->clk);
-diff --git a/drivers/spi/spi-ppc4xx.c b/drivers/spi/spi-ppc4xx.c
-index 357f183a4fb7..8548e574749d 100644
---- a/drivers/spi/spi-ppc4xx.c
-+++ b/drivers/spi/spi-ppc4xx.c
-@@ -406,7 +406,7 @@ static int spi_ppc4xx_of_probe(struct platform_device *op)
- 	if (master == NULL)
- 		return -ENOMEM;
- 	master->dev.of_node = np;
--	dev_set_drvdata(dev, master);
-+	platform_set_drvdata(op, master);
- 	hw = spi_master_get_devdata(master);
- 	hw->master = spi_master_get(master);
- 	hw->dev = dev;
-@@ -553,7 +553,6 @@ request_mem_error:
- free_gpios:
- 	free_gpios(hw);
- free_master:
--	dev_set_drvdata(dev, NULL);
- 	spi_master_put(master);
- 
- 	dev_err(dev, "initialization failed\n");
-@@ -562,11 +561,10 @@ free_master:
- 
- static int spi_ppc4xx_of_remove(struct platform_device *op)
- {
--	struct spi_master *master = dev_get_drvdata(&op->dev);
-+	struct spi_master *master = platform_get_drvdata(op);
- 	struct ppc4xx_spi *hw = spi_master_get_devdata(master);
- 
- 	spi_bitbang_stop(&hw->bitbang);
--	dev_set_drvdata(&op->dev, NULL);
- 	release_mem_region(hw->mapbase, hw->mapsize);
- 	free_irq(hw->irqnum, hw);
- 	iounmap(hw->regs);
-diff --git a/drivers/spi/spi-sh-hspi.c b/drivers/spi/spi-sh-hspi.c
-index eab593eaaafa..716edf999538 100644
---- a/drivers/spi/spi-sh-hspi.c
-+++ b/drivers/spi/spi-sh-hspi.c
-@@ -297,7 +297,7 @@ static int hspi_probe(struct platform_device *pdev)
- 	}
- 
- 	hspi = spi_master_get_devdata(master);
--	dev_set_drvdata(&pdev->dev, hspi);
-+	platform_set_drvdata(pdev, hspi);
- 
- 	/* init hspi */
- 	hspi->master	= master;
-@@ -341,7 +341,7 @@ static int hspi_probe(struct platform_device *pdev)
- 
- static int hspi_remove(struct platform_device *pdev)
- {
--	struct hspi_priv *hspi = dev_get_drvdata(&pdev->dev);
-+	struct hspi_priv *hspi = platform_get_drvdata(pdev);
- 
- 	pm_runtime_disable(&pdev->dev);
- 
-diff --git a/drivers/spi/spi-sh.c b/drivers/spi/spi-sh.c
-index 3c3600a994bd..c120a70094f2 100644
---- a/drivers/spi/spi-sh.c
-+++ b/drivers/spi/spi-sh.c
-@@ -434,7 +434,7 @@ static irqreturn_t spi_sh_irq(int irq, void *_ss)
- 
- static int spi_sh_remove(struct platform_device *pdev)
- {
--	struct spi_sh_data *ss = dev_get_drvdata(&pdev->dev);
-+	struct spi_sh_data *ss = platform_get_drvdata(pdev);
- 
- 	spi_unregister_master(ss->master);
- 	destroy_workqueue(ss->workqueue);
-@@ -471,7 +471,7 @@ static int spi_sh_probe(struct platform_device *pdev)
- 	}
- 
- 	ss = spi_master_get_devdata(master);
--	dev_set_drvdata(&pdev->dev, ss);
-+	platform_set_drvdata(pdev, ss);
- 
- 	switch (res->flags & IORESOURCE_MEM_TYPE_MASK) {
- 	case IORESOURCE_MEM_8BIT:
-diff --git a/drivers/spi/spi-tegra114.c b/drivers/spi/spi-tegra114.c
-index 598eb45e8008..e8f542ab8935 100644
---- a/drivers/spi/spi-tegra114.c
-+++ b/drivers/spi/spi-tegra114.c
-@@ -1041,7 +1041,7 @@ static int tegra_spi_probe(struct platform_device *pdev)
- 		dev_err(&pdev->dev, "master allocation failed\n");
- 		return -ENOMEM;
- 	}
--	dev_set_drvdata(&pdev->dev, master);
-+	platform_set_drvdata(pdev, master);
- 	tspi = spi_master_get_devdata(master);
- 
- 	/* Parse DT */
-@@ -1152,7 +1152,7 @@ exit_free_master:
- 
- static int tegra_spi_remove(struct platform_device *pdev)
- {
--	struct spi_master *master = dev_get_drvdata(&pdev->dev);
-+	struct spi_master *master = platform_get_drvdata(pdev);
- 	struct tegra_spi_data	*tspi = spi_master_get_devdata(master);
- 
- 	free_irq(tspi->irq, tspi);
-diff --git a/drivers/spi/spi-tegra20-sflash.c b/drivers/spi/spi-tegra20-sflash.c
-index 09df8e22dba0..c1d5d95e70ea 100644
---- a/drivers/spi/spi-tegra20-sflash.c
-+++ b/drivers/spi/spi-tegra20-sflash.c
-@@ -480,7 +480,7 @@ static int tegra_sflash_probe(struct platform_device *pdev)
- 	master->num_chipselect = MAX_CHIP_SELECT;
- 	master->bus_num = -1;
- 
--	dev_set_drvdata(&pdev->dev, master);
-+	platform_set_drvdata(pdev, master);
- 	tsd = spi_master_get_devdata(master);
- 	tsd->master = master;
- 	tsd->dev = &pdev->dev;
-@@ -555,7 +555,7 @@ exit_free_master:
- 
- static int tegra_sflash_remove(struct platform_device *pdev)
- {
--	struct spi_master *master = dev_get_drvdata(&pdev->dev);
-+	struct spi_master *master = platform_get_drvdata(pdev);
- 	struct tegra_sflash_data	*tsd = spi_master_get_devdata(master);
- 
- 	free_irq(tsd->irq, tsd);
-diff --git a/drivers/spi/spi-tegra20-slink.c b/drivers/spi/spi-tegra20-slink.c
-index 3faf88d003de..80490cc11ce5 100644
---- a/drivers/spi/spi-tegra20-slink.c
-+++ b/drivers/spi/spi-tegra20-slink.c
-@@ -1089,7 +1089,7 @@ static int tegra_slink_probe(struct platform_device *pdev)
- 	master->num_chipselect = MAX_CHIP_SELECT;
- 	master->bus_num = -1;
- 
--	dev_set_drvdata(&pdev->dev, master);
-+	platform_set_drvdata(pdev, master);
- 	tspi = spi_master_get_devdata(master);
- 	tspi->master = master;
- 	tspi->dev = &pdev->dev;
-@@ -1193,7 +1193,7 @@ exit_free_master:
- 
- static int tegra_slink_remove(struct platform_device *pdev)
- {
--	struct spi_master *master = dev_get_drvdata(&pdev->dev);
-+	struct spi_master *master = platform_get_drvdata(pdev);
- 	struct tegra_slink_data	*tspi = spi_master_get_devdata(master);
- 
- 	free_irq(tspi->irq, tspi);
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0210-ARM-shmobile-r8a7740-Make-private-clock-arrays-stati.patch b/patches.renesas/0210-ARM-shmobile-r8a7740-Make-private-clock-arrays-stati.patch
deleted file mode 100644
index 21dee184d4b8e..0000000000000
--- a/patches.renesas/0210-ARM-shmobile-r8a7740-Make-private-clock-arrays-stati.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From 532897ac14177982d32fe8334b004df755e0c829 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 16 Apr 2013 17:16:19 +0200
-Subject: ARM: shmobile: r8a7740: Make private clock arrays static
-
-Both clock-r8a7740.c and clock-r8a7790.c define a div4_clks array as
-non-static. Compiling support for both SoCs thus result in a symbol
-redefinition. Fix it by defining the arrays as static.
-
-To avoid further similar issues, also define the main_clks as static.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 2482c589c3299c3c4aaf2f9c27e1759e972492a4)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r8a7740.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c
-index c0d39aa6..54afa042 100644
---- a/arch/arm/mach-shmobile/clock-r8a7740.c
-+++ b/arch/arm/mach-shmobile/clock-r8a7740.c
-@@ -266,7 +266,7 @@ static struct clk fsiack_clk = {
- static struct clk fsibck_clk = {
- };
- 
--struct clk *main_clks[] = {
-+static struct clk *main_clks[] = {
- 	&extalr_clk,
- 	&extal1_clk,
- 	&extal2_clk,
-@@ -317,7 +317,7 @@ enum {
- 	DIV4_NR
- };
- 
--struct clk div4_clks[DIV4_NR] = {
-+static struct clk div4_clks[DIV4_NR] = {
- 	[DIV4_I]	= SH_CLK_DIV4(&pllc1_clk, FRQCRA, 20, 0x6fff, CLK_ENABLE_ON_INIT),
- 	[DIV4_ZG]	= SH_CLK_DIV4(&pllc1_clk, FRQCRA, 16, 0x6fff, CLK_ENABLE_ON_INIT),
- 	[DIV4_B]	= SH_CLK_DIV4(&pllc1_clk, FRQCRA,  8, 0x6fff, CLK_ENABLE_ON_INIT),
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0210-ARM-shmobile-r8a7791-add-Ether-clock.patch b/patches.renesas/0210-ARM-shmobile-r8a7791-add-Ether-clock.patch
deleted file mode 100644
index dfa010a681848..0000000000000
--- a/patches.renesas/0210-ARM-shmobile-r8a7791-add-Ether-clock.patch
+++ /dev/null
@@ -1,47 +0,0 @@
-From 6c7a88df7fc05808051ec1fea0c90f9a1380a174 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Sun, 8 Dec 2013 23:50:36 +0300
-Subject: ARM: shmobile: r8a7791: add Ether clock
-
-Add support for R8A7791 Ether clock.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 893c3f0bc55e749124f14b02eee9510147fefd90)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r8a7791.c | 3 +++
- 1 file changed, 3 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a7791.c b/arch/arm/mach-shmobile/clock-r8a7791.c
-index ff2d60d55bd5..f5461262ee25 100644
---- a/arch/arm/mach-shmobile/clock-r8a7791.c
-+++ b/arch/arm/mach-shmobile/clock-r8a7791.c
-@@ -122,6 +122,7 @@ static struct clk *main_clks[] = {
- 
- /* MSTP */
- enum {
-+	MSTP813,
- 	MSTP726, MSTP724, MSTP723, MSTP721, MSTP720,
- 	MSTP719, MSTP718, MSTP715, MSTP714,
- 	MSTP522,
-@@ -132,6 +133,7 @@ enum {
- };
- 
- static struct clk mstp_clks[MSTP_NR] = {
-+	[MSTP813] = SH_CLK_MSTP32(&p_clk, SMSTPCR8, 13, 0), /* Ether */
- 	[MSTP726] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 26, 0), /* LVDS0 */
- 	[MSTP724] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 24, 0), /* DU0 */
- 	[MSTP723] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 23, 0), /* DU1 */
-@@ -192,6 +194,7 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]),
- 	CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]),
- 	CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
-+	CLKDEV_DEV_ID("r8a7791-ether", &mstp_clks[MSTP813]), /* Ether */
- };
- 
- #define R8A7791_CLOCK_ROOT(e, m, p0, p1, p30, p31)		\
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0210-spi-rspi-provide-port-addresses-to-dmaengine-driver-.patch b/patches.renesas/0210-spi-rspi-provide-port-addresses-to-dmaengine-driver-.patch
deleted file mode 100644
index 8480b8f4c3b14..0000000000000
--- a/patches.renesas/0210-spi-rspi-provide-port-addresses-to-dmaengine-driver-.patch
+++ /dev/null
@@ -1,58 +0,0 @@
-From 265c240fa92c74c175dfb5cc4456e2e9b2039668 Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Fri, 2 Aug 2013 15:03:42 +0200
-Subject: spi: rspi: provide port addresses to dmaengine driver via slave
- configuration
-
-Don't rely on shdma dhaengine driver getting DMA slave addresses from its
-slave configuration. Instead provide those addresses, using a
-dmaengine_slave_config() call.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Signed-off-by: Mark Brown <broonie@linaro.org>
-(cherry picked from commit e2b0509908aa5e874a1837a733422b6e8b8502b8)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/spi/spi-rspi.c | 7 ++++++-
- 1 file changed, 6 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/spi/spi-rspi.c b/drivers/spi/spi-rspi.c
-index b44a6ac3cec9..5f122d9d2063 100644
---- a/drivers/spi/spi-rspi.c
-+++ b/drivers/spi/spi-rspi.c
-@@ -664,12 +664,13 @@ static irqreturn_t rspi_irq(int irq, void *_sr)
- static int rspi_request_dma(struct rspi_data *rspi,
- 				      struct platform_device *pdev)
- {
-+	struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- 	struct rspi_plat_data *rspi_pd = pdev->dev.platform_data;
- 	dma_cap_mask_t mask;
- 	struct dma_slave_config cfg;
- 	int ret;
- 
--	if (!rspi_pd)
-+	if (!res || !rspi_pd)
- 		return 0;	/* The driver assumes no error. */
- 
- 	rspi->dma_width_16bit = rspi_pd->dma_width_16bit;
-@@ -683,6 +684,8 @@ static int rspi_request_dma(struct rspi_data *rspi,
- 		if (rspi->chan_rx) {
- 			cfg.slave_id = rspi_pd->dma_rx_id;
- 			cfg.direction = DMA_DEV_TO_MEM;
-+			cfg.dst_addr = 0;
-+			cfg.src_addr = res->start + RSPI_SPDR;
- 			ret = dmaengine_slave_config(rspi->chan_rx, &cfg);
- 			if (!ret)
- 				dev_info(&pdev->dev, "Use DMA when rx.\n");
-@@ -698,6 +701,8 @@ static int rspi_request_dma(struct rspi_data *rspi,
- 		if (rspi->chan_tx) {
- 			cfg.slave_id = rspi_pd->dma_tx_id;
- 			cfg.direction = DMA_MEM_TO_DEV;
-+			cfg.dst_addr = res->start + RSPI_SPDR;
-+			cfg.src_addr = 0;
- 			ret = dmaengine_slave_config(rspi->chan_tx, &cfg);
- 			if (!ret)
- 				dev_info(&pdev->dev, "Use DMA when tx\n");
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0211-ARM-shmobile-Koelsch-enable-Ether-in-defconfig.patch b/patches.renesas/0211-ARM-shmobile-Koelsch-enable-Ether-in-defconfig.patch
deleted file mode 100644
index 2e5b2aa6af47f..0000000000000
--- a/patches.renesas/0211-ARM-shmobile-Koelsch-enable-Ether-in-defconfig.patch
+++ /dev/null
@@ -1,61 +0,0 @@
-From 01184480450ea56e556eb0fc8dc92afe609ef33c Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Sun, 8 Dec 2013 23:54:38 +0300
-Subject: ARM: shmobile: Koelsch: enable Ether in defconfig
-
-Enable the Ether driver in 'koelsch_defconfig' along with DHCP autoconfiguration
-and NFS root.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 9b408ca5885a46a0940aaf88be203b595c9aad85)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/configs/koelsch_defconfig | 22 ++++++++++++++++++++++
- 1 file changed, 22 insertions(+)
-
-diff --git a/arch/arm/configs/koelsch_defconfig b/arch/arm/configs/koelsch_defconfig
-index 7fd65a01ec7e..284846e921c0 100644
---- a/arch/arm/configs/koelsch_defconfig
-+++ b/arch/arm/configs/koelsch_defconfig
-@@ -29,7 +29,27 @@ CONFIG_VFP=y
- CONFIG_NEON=y
- # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
- CONFIG_PM_RUNTIME=y
-+CONFIG_NET=y
-+CONFIG_INET=y
-+CONFIG_IP_PNP=y
-+CONFIG_IP_PNP_DHCP=y
- CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-+CONFIG_NETDEVICES=y
-+# CONFIG_NET_VENDOR_ARC is not set
-+# CONFIG_NET_CADENCE is not set
-+# CONFIG_NET_VENDOR_BROADCOM is not set
-+# CONFIG_NET_VENDOR_CIRRUS is not set
-+# CONFIG_NET_VENDOR_FARADAY is not set
-+# CONFIG_NET_VENDOR_INTEL is not set
-+# CONFIG_NET_VENDOR_MARVELL is not set
-+# CONFIG_NET_VENDOR_MICREL is not set
-+# CONFIG_NET_VENDOR_NATSEMI is not set
-+CONFIG_SH_ETH=y
-+# CONFIG_NET_VENDOR_SEEQ is not set
-+# CONFIG_NET_VENDOR_SMSC is not set
-+# CONFIG_NET_VENDOR_STMICRO is not set
-+# CONFIG_NET_VENDOR_VIA is not set
-+# CONFIG_NET_VENDOR_WIZNET is not set
- # CONFIG_INPUT_MOUSEDEV_PSAUX is not set
- # CONFIG_INPUT_MOUSE is not set
- # CONFIG_LEGACY_PTYS is not set
-@@ -49,6 +69,8 @@ CONFIG_LEDS_CLASS=y
- CONFIG_TMPFS=y
- CONFIG_CONFIGFS_FS=y
- # CONFIG_MISC_FILESYSTEMS is not set
-+CONFIG_NFS_FS=y
-+CONFIG_ROOT_NFS=y
- # CONFIG_ENABLE_WARN_DEPRECATED is not set
- # CONFIG_ENABLE_MUST_CHECK is not set
- # CONFIG_ARM_UNWIND is not set
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0211-ARM-shmobile-r8a7778-correct-model-name-in-Kconfig.patch b/patches.renesas/0211-ARM-shmobile-r8a7778-correct-model-name-in-Kconfig.patch
deleted file mode 100644
index 96022333b4901..0000000000000
--- a/patches.renesas/0211-ARM-shmobile-r8a7778-correct-model-name-in-Kconfig.patch
+++ /dev/null
@@ -1,38 +0,0 @@
-From 3c0ccb17644a4e67bc2c59eeba7b06cccc597850 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Thu, 9 May 2013 00:05:40 +0000
-Subject: ARM: shmobile: r8a7778: correct model name in Kconfig
-
-The correct model name is R-Car M1A or R8A77781; R8A77780 corresponds to R-Car
-M1S which is a SH based SoC.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-[horms+renesas@verge.net.au: manually applied]
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-(cherry picked from commit 45fa9295a0215c99019653b06f11dcda0340a7f7)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-	arch/arm/mach-shmobile/Kconfig
----
- arch/arm/mach-shmobile/Kconfig | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
-index 638e5c57..7a927839 100644
---- a/arch/arm/mach-shmobile/Kconfig
-+++ b/arch/arm/mach-shmobile/Kconfig
-@@ -36,7 +36,7 @@ config ARCH_R8A7740
- 	select RENESAS_INTC_IRQPIN
- 
- config ARCH_R8A7778
--	bool "R-Car M1 (R8A77780)"
-+	bool "R-Car M1 (R8A777801)"
- 	select ARCH_WANT_OPTIONAL_GPIOLIB
- 	select CPU_V7
- 	select SH_CLK_CPG
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0211-spi-spi-rspi-fix-inconsistent-spin_lock_irqsave.patch b/patches.renesas/0211-spi-spi-rspi-fix-inconsistent-spin_lock_irqsave.patch
deleted file mode 100644
index 08ae0a0301f43..0000000000000
--- a/patches.renesas/0211-spi-spi-rspi-fix-inconsistent-spin_lock_irqsave.patch
+++ /dev/null
@@ -1,51 +0,0 @@
-From 9e95337a302a7e165a7b9b99957fd802b2227007 Mon Sep 17 00:00:00 2001
-From: "Shimoda, Yoshihiro" <yoshihiro.shimoda.uh@renesas.com>
-Date: Tue, 27 Aug 2013 11:15:09 +0900
-Subject: spi: spi-rspi: fix inconsistent spin_lock_irqsave
-
-This patch fixes the following Smatch warning:
-
-  CHECK   drivers/spi/spi-rspi.c
-drivers/spi/spi-rspi.c:606 rspi_work() warn: inconsistent returns spin_lock:&rspi->lock: locked (602) unlocked (606)
-drivers/spi/spi-rspi.c:606 rspi_work() warn: inconsistent returns irqsave:flags: locked (602) unlocked (606)
-
-Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
-Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
-Signed-off-by: Mark Brown <broonie@linaro.org>
-(cherry picked from commit 8d4d08ce8319ae26227c4dd558405963c14c2037)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/spi/spi-rspi.c | 10 ++++++----
- 1 file changed, 6 insertions(+), 4 deletions(-)
-
-diff --git a/drivers/spi/spi-rspi.c b/drivers/spi/spi-rspi.c
-index 5f122d9d2063..00c32320dce8 100644
---- a/drivers/spi/spi-rspi.c
-+++ b/drivers/spi/spi-rspi.c
-@@ -564,8 +564,12 @@ static void rspi_work(struct work_struct *work)
- 	unsigned long flags;
- 	int ret;
- 
--	spin_lock_irqsave(&rspi->lock, flags);
--	while (!list_empty(&rspi->queue)) {
-+	while (1) {
-+		spin_lock_irqsave(&rspi->lock, flags);
-+		if (list_empty(&rspi->queue)) {
-+			spin_unlock_irqrestore(&rspi->lock, flags);
-+			break;
-+		}
- 		mesg = list_entry(rspi->queue.next, struct spi_message, queue);
- 		list_del_init(&mesg->queue);
- 		spin_unlock_irqrestore(&rspi->lock, flags);
-@@ -595,8 +599,6 @@ static void rspi_work(struct work_struct *work)
- 
- 		mesg->status = 0;
- 		mesg->complete(mesg->context);
--
--		spin_lock_irqsave(&rspi->lock, flags);
- 	}
- 
- 	return;
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0212-ARM-shmobile-remove-unnecessary-platform_device-as-h.patch b/patches.renesas/0212-ARM-shmobile-remove-unnecessary-platform_device-as-h.patch
deleted file mode 100644
index 7deb1111ef579..0000000000000
--- a/patches.renesas/0212-ARM-shmobile-remove-unnecessary-platform_device-as-h.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From f7568b60a5334eb69c5252c5df52c1311980afe9 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Mon, 9 Dec 2013 18:34:45 -0800
-Subject: ARM: shmobile: remove unnecessary platform_device as header cleanup
-
-8e0e7aaef3c98c52e85f5640b73ffa82058abcfd
-(ARM: shmobile: Drop r8a7779_add_device_to_domain())
-removed last user of struct platform_device on this header.
-It is no longer needed
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 2eb7a8146f5ab5be7cde42438e32461f313d0d0b)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/include/mach/r8a7779.h | 2 --
- 1 file changed, 2 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/include/mach/r8a7779.h b/arch/arm/mach-shmobile/include/mach/r8a7779.h
-index 5014145f272e..b40e13631f6a 100644
---- a/arch/arm/mach-shmobile/include/mach/r8a7779.h
-+++ b/arch/arm/mach-shmobile/include/mach/r8a7779.h
-@@ -11,8 +11,6 @@ enum {
- 	HPBDMA_SLAVE_SDHI0_RX,
- };
- 
--struct platform_device;
--
- struct r8a7779_pm_ch {
- 	unsigned long chan_offs;
- 	unsigned int chan_bit;
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0212-ARM-shmobile-sh73a0-Use-DEFINE_RES_MEM-everywhere.patch b/patches.renesas/0212-ARM-shmobile-sh73a0-Use-DEFINE_RES_MEM-everywhere.patch
deleted file mode 100644
index 00378e297f401..0000000000000
--- a/patches.renesas/0212-ARM-shmobile-sh73a0-Use-DEFINE_RES_MEM-everywhere.patch
+++ /dev/null
@@ -1,172 +0,0 @@
-From 65e793e2ea3069204cc8241aa1863170a6257913 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Tue, 23 Apr 2013 02:27:15 +0000
-Subject: ARM: shmobile: sh73a0: Use DEFINE_RES_MEM*() everywhere
-
-Convert code to use DEFINE_RES_MEM*() macros.
-These macros were already used in this file,
-this change makes their usage consistent throughout the file.
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit abbec5f4157325cbb5ef249b0712dba57606810e)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-sh73a0.c | 79 ++++++-----------------------------
- 1 file changed, 13 insertions(+), 66 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c
-index 9696f364..35d512a4 100644
---- a/arch/arm/mach-shmobile/setup-sh73a0.c
-+++ b/arch/arm/mach-shmobile/setup-sh73a0.c
-@@ -288,12 +288,7 @@ static struct sh_timer_config tmu00_platform_data = {
- };
- 
- static struct resource tmu00_resources[] = {
--	[0] = {
--		.name	= "TMU00",
--		.start	= 0xfff60008,
--		.end	= 0xfff60013,
--		.flags	= IORESOURCE_MEM,
--	},
-+	[0] = DEFINE_RES_MEM_NAMED(0xfff60008, 0xc, "TMU00"),
- 	[1] = {
- 		.start	= intcs_evt2irq(0x0e80), /* TMU0_TUNI00 */
- 		.flags	= IORESOURCE_IRQ,
-@@ -318,12 +313,7 @@ static struct sh_timer_config tmu01_platform_data = {
- };
- 
- static struct resource tmu01_resources[] = {
--	[0] = {
--		.name	= "TMU01",
--		.start	= 0xfff60014,
--		.end	= 0xfff6001f,
--		.flags	= IORESOURCE_MEM,
--	},
-+	[0] = DEFINE_RES_MEM_NAMED(0xfff60014, 0xc, "TMU00"),
- 	[1] = {
- 		.start	= intcs_evt2irq(0x0ea0), /* TMU0_TUNI01 */
- 		.flags	= IORESOURCE_IRQ,
-@@ -341,12 +331,7 @@ static struct platform_device tmu01_device = {
- };
- 
- static struct resource i2c0_resources[] = {
--	[0] = {
--		.name	= "IIC0",
--		.start	= 0xe6820000,
--		.end	= 0xe6820425 - 1,
--		.flags	= IORESOURCE_MEM,
--	},
-+	[0] = DEFINE_RES_MEM_NAMED(0xe6820000, 0x426, "IIC0"),
- 	[1] = {
- 		.start	= gic_spi(167),
- 		.end	= gic_spi(170),
-@@ -355,12 +340,7 @@ static struct resource i2c0_resources[] = {
- };
- 
- static struct resource i2c1_resources[] = {
--	[0] = {
--		.name	= "IIC1",
--		.start	= 0xe6822000,
--		.end	= 0xe6822425 - 1,
--		.flags	= IORESOURCE_MEM,
--	},
-+	[0] = DEFINE_RES_MEM_NAMED(0xe6822000, 0x426, "IIC1"),
- 	[1] = {
- 		.start	= gic_spi(51),
- 		.end	= gic_spi(54),
-@@ -369,12 +349,7 @@ static struct resource i2c1_resources[] = {
- };
- 
- static struct resource i2c2_resources[] = {
--	[0] = {
--		.name	= "IIC2",
--		.start	= 0xe6824000,
--		.end	= 0xe6824425 - 1,
--		.flags	= IORESOURCE_MEM,
--	},
-+	[0] = DEFINE_RES_MEM_NAMED(0xe6824000, 0x426, "IIC2"),
- 	[1] = {
- 		.start	= gic_spi(171),
- 		.end	= gic_spi(174),
-@@ -383,12 +358,7 @@ static struct resource i2c2_resources[] = {
- };
- 
- static struct resource i2c3_resources[] = {
--	[0] = {
--		.name	= "IIC3",
--		.start	= 0xe6826000,
--		.end	= 0xe6826425 - 1,
--		.flags	= IORESOURCE_MEM,
--	},
-+	[0] = DEFINE_RES_MEM_NAMED(0xe6826000, 0x426, "IIC3"),
- 	[1] = {
- 		.start	= gic_spi(183),
- 		.end	= gic_spi(186),
-@@ -397,12 +367,7 @@ static struct resource i2c3_resources[] = {
- };
- 
- static struct resource i2c4_resources[] = {
--	[0] = {
--		.name	= "IIC4",
--		.start	= 0xe6828000,
--		.end	= 0xe6828425 - 1,
--		.flags	= IORESOURCE_MEM,
--	},
-+	[0] = DEFINE_RES_MEM_NAMED(0xe6828000, 0x426, "IIC4"),
- 	[1] = {
- 		.start	= gic_spi(187),
- 		.end	= gic_spi(190),
-@@ -623,12 +588,7 @@ static struct sh_dmae_pdata sh73a0_dmae_platform_data = {
- };
- 
- static struct resource sh73a0_dmae_resources[] = {
--	{
--		/* Registers including DMAOR and channels including DMARSx */
--		.start  = 0xfe000020,
--		.end    = 0xfe008a00 - 1,
--		.flags  = IORESOURCE_MEM,
--	},
-+	DEFINE_RES_MEM(0xfe000020, 0x89e0),
- 	{
- 		.name	= "error_irq",
- 		.start  = gic_spi(129),
-@@ -727,18 +687,10 @@ static struct sh_dmae_pdata sh73a0_mpdma_platform_data = {
- 
- /* Resource order important! */
- static struct resource sh73a0_mpdma_resources[] = {
--	{
--		/* Channel registers and DMAOR */
--		.start	= 0xec618020,
--		.end	= 0xec61828f,
--		.flags	= IORESOURCE_MEM,
--	},
--	{
--		/* DMARSx */
--		.start	= 0xec619000,
--		.end	= 0xec61900b,
--		.flags	= IORESOURCE_MEM,
--	},
-+	/* Channel registers and DMAOR */
-+	DEFINE_RES_MEM(0xec618020, 0x270),
-+	/* DMARSx */
-+	DEFINE_RES_MEM(0xec619000, 0xc),
- 	{
- 		.name	= "error_irq",
- 		.start	= gic_spi(181),
-@@ -785,12 +737,7 @@ static struct platform_device pmu_device = {
- 
- /* an IPMMU module for ICB */
- static struct resource ipmmu_resources[] = {
--	[0] = {
--		.name	= "IPMMU",
--		.start	= 0xfe951000,
--		.end	= 0xfe9510ff,
--		.flags	= IORESOURCE_MEM,
--	},
-+	DEFINE_RES_MEM_NAMED(0xfe951000, 0x100, "IPMMU"),
- };
- 
- static const char * const ipmmu_dev_names[] = {
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0212-spi-use-dev_get_platdata.patch b/patches.renesas/0212-spi-use-dev_get_platdata.patch
deleted file mode 100644
index 4150488e03abc..0000000000000
--- a/patches.renesas/0212-spi-use-dev_get_platdata.patch
+++ /dev/null
@@ -1,62 +0,0 @@
-From 2c65d775624e44926df53067399e3a2d4a4707e5 Mon Sep 17 00:00:00 2001
-From: Jingoo Han <jg1.han@samsung.com>
-Date: Tue, 30 Jul 2013 16:58:59 +0900
-Subject: spi: use dev_get_platdata()
-
-Use the wrapper function for retrieving the platform data instead of
-accessing dev->platform_data directly.
-
-Signed-off-by: Jingoo Han <jg1.han@samsung.com>
-Signed-off-by: Mark Brown <broonie@linaro.org>
-(cherry picked from commit 8074cf063e410a2c0cf1704c3b31002e21f5df7c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-	drivers/spi/spi-altera.c
-	drivers/spi/spi-ath79.c
-	drivers/spi/spi-au1550.c
-	drivers/spi/spi-bcm63xx.c
-	drivers/spi/spi-bfin-sport.c
-	drivers/spi/spi-bfin-v3.c
-	drivers/spi/spi-bfin5xx.c
-	drivers/spi/spi-coldfire-qspi.c
-	drivers/spi/spi-davinci.c
-	drivers/spi/spi-ep93xx.c
-	drivers/spi/spi-fsl-espi.c
-	drivers/spi/spi-fsl-lib.c
-	drivers/spi/spi-fsl-spi.c
-	drivers/spi/spi-gpio.c
-	drivers/spi/spi-mpc512x-psc.c
-	drivers/spi/spi-mpc52xx-psc.c
-	drivers/spi/spi-nuc900.c
-	drivers/spi/spi-oc-tiny.c
-	drivers/spi/spi-omap-100k.c
-	drivers/spi/spi-omap2-mcspi.c
-	drivers/spi/spi-pl022.c
-	drivers/spi/spi-rspi.c
-	drivers/spi/spi-s3c24xx.c
-	drivers/spi/spi-s3c64xx.c
-	drivers/spi/spi-sh-msiof.c
-	drivers/spi/spi-ti-ssp.c
-	drivers/spi/spi-tle62x0.c
-	drivers/spi/spi-xilinx.c
----
- drivers/spi/spi-sh-sci.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/spi/spi-sh-sci.c b/drivers/spi/spi-sh-sci.c
-index 097e506042be..8eefeb6007df 100644
---- a/drivers/spi/spi-sh-sci.c
-+++ b/drivers/spi/spi-sh-sci.c
-@@ -130,7 +130,7 @@ static int sh_sci_spi_probe(struct platform_device *dev)
- 	sp = spi_master_get_devdata(master);
- 
- 	platform_set_drvdata(dev, sp);
--	sp->info = dev->dev.platform_data;
-+	sp->info = dev_get_platdata(&dev->dev);
- 
- 	/* setup spi bitbang adaptor */
- 	sp->bitbang.master = spi_master_get(master);
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0213-ARM-rcar-gen2-Do-not-setup-timer-in-non-secure-mode.patch b/patches.renesas/0213-ARM-rcar-gen2-Do-not-setup-timer-in-non-secure-mode.patch
deleted file mode 100644
index ffb68339f5c4a..0000000000000
--- a/patches.renesas/0213-ARM-rcar-gen2-Do-not-setup-timer-in-non-secure-mode.patch
+++ /dev/null
@@ -1,57 +0,0 @@
-From 31a43c81c92255bdaec63e83812042b2f16d77ef Mon Sep 17 00:00:00 2001
-From: Ben Dooks <ben.dooks@codethink.co.uk>
-Date: Wed, 11 Dec 2013 10:07:42 +0000
-Subject: ARM: rcar-gen2: Do not setup timer in non-secure mode
-
-If the system has been started in non-secure mode, then the ARM generic
-timer is not configurable during the kernel initialisation. Currently
-the only thing we can check for is if the timer has been correctly
-configured during the boot process.
-
-Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
-Reviewed-by: Ian Molton <ian.molton@codethink.co.uk>
-Acked-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 0fe35077a92ce45acfa2b7259bba516757fb0c3f)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-rcar-gen2.c | 21 ++++++++++++++++-----
- 1 file changed, 16 insertions(+), 5 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-rcar-gen2.c b/arch/arm/mach-shmobile/setup-rcar-gen2.c
-index 5734c24bf6c7..b6275ab6085c 100644
---- a/arch/arm/mach-shmobile/setup-rcar-gen2.c
-+++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c
-@@ -78,12 +78,23 @@ void __init rcar_gen2_timer_init(void)
- 	/* Remap "armgcnt address map" space */
- 	base = ioremap(0xe6080000, PAGE_SIZE);
- 
--	/* Update registers with correct frequency */
--	iowrite32(freq, base + CNTFID0);
--	asm volatile("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq));
-+	/*
-+	 * Update the timer if it is either not running, or is not at the
-+	 * right frequency. The timer is only configurable in secure mode
-+	 * so this avoids an abort if the loader started the timer and
-+	 * entered the kernel in non-secure mode.
-+	 */
-+
-+	if ((ioread32(base + CNTCR) & 1) == 0 ||
-+	    ioread32(base + CNTFID0) != freq) {
-+		/* Update registers with correct frequency */
-+		iowrite32(freq, base + CNTFID0);
-+		asm volatile("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq));
-+
-+		/* make sure arch timer is started by setting bit 0 of CNTCR */
-+		iowrite32(1, base + CNTCR);
-+	}
- 
--	/* make sure arch timer is started by setting bit 0 of CNTCR */
--	iowrite32(1, base + CNTCR);
- 	iounmap(base);
- #endif /* CONFIG_ARM_ARCH_TIMER */
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0213-ARM-shmobile-remove-from-SH_FIXED_RATIO_CLK-macro.patch b/patches.renesas/0213-ARM-shmobile-remove-from-SH_FIXED_RATIO_CLK-macro.patch
deleted file mode 100644
index e1129cfe1cb2a..0000000000000
--- a/patches.renesas/0213-ARM-shmobile-remove-from-SH_FIXED_RATIO_CLK-macro.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From 8752fdc6f65954973f4008e3573fc84ec0dcfbf7 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Thu, 4 Apr 2013 00:05:42 -0700
-Subject: ARM: shmobile: remove ";" from SH_FIXED_RATIO_CLK*() macro
-
-Acked-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit bdd5d28461f8f94b4eb719d229b9ed66ca28636f)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/include/mach/clock.h | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/include/mach/clock.h b/arch/arm/mach-shmobile/include/mach/clock.h
-index 76ac6129..89020443 100644
---- a/arch/arm/mach-shmobile/include/mach/clock.h
-+++ b/arch/arm/mach-shmobile/include/mach/clock.h
-@@ -24,11 +24,11 @@ struct clk name = {			\
- }
- 
- #define SH_FIXED_RATIO_CLK(name, p, r)		\
--static SH_FIXED_RATIO_CLKg(name, p, r);
-+static SH_FIXED_RATIO_CLKg(name, p, r)
- 
- #define SH_FIXED_RATIO_CLK_SET(name, p, m, d)	\
- 	SH_CLK_RATIO(name, m, d);		\
--	SH_FIXED_RATIO_CLK(name, p, name);
-+	SH_FIXED_RATIO_CLK(name, p, name)
- 
- #define SH_CLK_SET_RATIO(p, m, d)	\
- {			\
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0213-spi-rspi-Add-spi_master_get-call-to-prevent-use-afte.patch b/patches.renesas/0213-spi-rspi-Add-spi_master_get-call-to-prevent-use-afte.patch
deleted file mode 100644
index 54dd9eb7dd8c5..0000000000000
--- a/patches.renesas/0213-spi-rspi-Add-spi_master_get-call-to-prevent-use-afte.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From 2ad7467e4426003e04cf09f24e1f3f9dde374db9 Mon Sep 17 00:00:00 2001
-From: Axel Lin <axel.lin@ingics.com>
-Date: Sat, 31 Aug 2013 19:42:56 +0800
-Subject: spi: rspi: Add spi_master_get() call to prevent use after free
-
-In rspi_remove(), current code dereferences rspi after spi_unregister_master(),
-thus add an extra spi_master_get() call is necessary to prevent use after free.
-
-Current code already has an extra spi_master_put() call in rspi_remove(), so
-this patch just adds a spi_master_get() call rather than a spi_master_get() with
-spi_master_put() calls.
-
-Signed-off-by: Axel Lin <axel.lin@ingics.com>
-Signed-off-by: Mark Brown <broonie@linaro.org>
-(cherry picked from commit 9d3405dbbbd8418a095301d495da65bc3bc5f806)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/spi/spi-rspi.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/spi/spi-rspi.c b/drivers/spi/spi-rspi.c
-index 00c32320dce8..49ae72a93087 100644
---- a/drivers/spi/spi-rspi.c
-+++ b/drivers/spi/spi-rspi.c
-@@ -726,7 +726,7 @@ static void rspi_release_dma(struct rspi_data *rspi)
- 
- static int rspi_remove(struct platform_device *pdev)
- {
--	struct rspi_data *rspi = platform_get_drvdata(pdev);
-+	struct rspi_data *rspi = spi_master_get(platform_get_drvdata(pdev));
- 
- 	spi_unregister_master(rspi->master);
- 	rspi_release_dma(rspi);
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0214-ARM-shmobile-r8a7778-add-USB-Func-DMAEngine-support.patch b/patches.renesas/0214-ARM-shmobile-r8a7778-add-USB-Func-DMAEngine-support.patch
deleted file mode 100644
index d3dff54dfab91..0000000000000
--- a/patches.renesas/0214-ARM-shmobile-r8a7778-add-USB-Func-DMAEngine-support.patch
+++ /dev/null
@@ -1,70 +0,0 @@
-From d0e44c4ec5cfeb89e0d0ddb9fe789984258532ef Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Tue, 10 Dec 2013 16:51:04 -0800
-Subject: ARM: shmobile: r8a7778: add USB Func DMAEngine support
-
-HPB-DMAC has 2 channel for USB Func (= D0/D1)
-D0 is used as Tx, D1 is used as Rx on this patch
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit aa9938644c63100219c252b9d330b95427082cef)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/include/mach/r8a7778.h |  2 ++
- arch/arm/mach-shmobile/setup-r8a7778.c        | 18 ++++++++++++++++++
- 2 files changed, 20 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/include/mach/r8a7778.h b/arch/arm/mach-shmobile/include/mach/r8a7778.h
-index 72c9d37d377d..f4076a50e970 100644
---- a/arch/arm/mach-shmobile/include/mach/r8a7778.h
-+++ b/arch/arm/mach-shmobile/include/mach/r8a7778.h
-@@ -62,6 +62,8 @@ enum {
- 	HPBDMA_SLAVE_HPBIF7_RX,
- 	HPBDMA_SLAVE_HPBIF8_TX,
- 	HPBDMA_SLAVE_HPBIF8_RX,
-+	HPBDMA_SLAVE_USBFUNC_TX,
-+	HPBDMA_SLAVE_USBFUNC_RX,
- };
- 
- extern void r8a7778_add_standard_devices(void);
-diff --git a/arch/arm/mach-shmobile/setup-r8a7778.c b/arch/arm/mach-shmobile/setup-r8a7778.c
-index e786338701cb..7ea6308e5da8 100644
---- a/arch/arm/mach-shmobile/setup-r8a7778.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7778.c
-@@ -394,6 +394,22 @@ static const struct hpb_dmae_slave_config hpb_dmae_slaves[] = {
- 		.port	= 0x0D0C,
- 		.flags	= HPB_DMAE_SET_ASYNC_RESET | HPB_DMAE_SET_ASYNC_MODE,
- 		.dma_ch	= 22,
-+	}, {
-+		.id	= HPBDMA_SLAVE_USBFUNC_TX, /* for D0 */
-+		.addr	= 0xffe60018,
-+		.dcr	= HPB_DMAE_DCR_SPDS_32BIT |
-+			  HPB_DMAE_DCR_DMDL |
-+			  HPB_DMAE_DCR_DPDS_32BIT,
-+		.port	= 0x0000,
-+		.dma_ch	= 14,
-+	}, {
-+		.id	= HPBDMA_SLAVE_USBFUNC_RX, /* for D1 */
-+		.addr	= 0xffe6001c,
-+		.dcr	= HPB_DMAE_DCR_SMDL |
-+			  HPB_DMAE_DCR_SPDS_32BIT |
-+			  HPB_DMAE_DCR_DPDS_32BIT,
-+		.port	= 0x0101,
-+		.dma_ch	= 15,
- 	},
- 
- 	HPBDMA_SSI(0),
-@@ -418,6 +434,8 @@ static const struct hpb_dmae_slave_config hpb_dmae_slaves[] = {
- };
- 
- static const struct hpb_dmae_channel hpb_dmae_channels[] = {
-+	HPB_DMAE_CHANNEL(0x7c, HPBDMA_SLAVE_USBFUNC_TX), /* ch. 14 */
-+	HPB_DMAE_CHANNEL(0x7c, HPBDMA_SLAVE_USBFUNC_RX), /* ch. 15 */
- 	HPB_DMAE_CHANNEL(0x7e, HPBDMA_SLAVE_SDHI0_TX), /* ch. 21 */
- 	HPB_DMAE_CHANNEL(0x7e, HPBDMA_SLAVE_SDHI0_RX), /* ch. 22 */
- 	HPB_DMAE_CHANNEL(0x7f, HPBDMA_SLAVE_SSI0_TX),   /* ch. 28 */
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0214-ARM-shmobile-use-do-while-on-SH_CLK_SET_RATIO.patch b/patches.renesas/0214-ARM-shmobile-use-do-while-on-SH_CLK_SET_RATIO.patch
deleted file mode 100644
index bf7d0ac474a60..0000000000000
--- a/patches.renesas/0214-ARM-shmobile-use-do-while-on-SH_CLK_SET_RATIO.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From 968deade76d07ef32c7d961a1d2784c8576a6a50 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Fri, 12 Apr 2013 00:41:07 -0700
-Subject: ARM: shmobile: use do{ }while() on SH_CLK_SET_RATIO()
-
-SH_CLK_SET_RATIO() will be trouble without this patch
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit b6825a02fd3c43f2bd2e126fdbe9d83d6ca44f4e)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/include/mach/clock.h | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/include/mach/clock.h b/arch/arm/mach-shmobile/include/mach/clock.h
-index 89020443..03e56074 100644
---- a/arch/arm/mach-shmobile/include/mach/clock.h
-+++ b/arch/arm/mach-shmobile/include/mach/clock.h
-@@ -31,9 +31,9 @@ static SH_FIXED_RATIO_CLKg(name, p, r)
- 	SH_FIXED_RATIO_CLK(name, p, name)
- 
- #define SH_CLK_SET_RATIO(p, m, d)	\
--{			\
-+do {			\
- 	(p)->mul = m;	\
- 	(p)->div = d;	\
--}
-+} while (0)
- 
- #endif
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0214-spi-rspi-Add-missing-dependency-on-DMAE.patch b/patches.renesas/0214-spi-rspi-Add-missing-dependency-on-DMAE.patch
deleted file mode 100644
index 45b10e3f82469..0000000000000
--- a/patches.renesas/0214-spi-rspi-Add-missing-dependency-on-DMAE.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From 17ca0811acc1387b909ab0b6aa0227eb37e3fde0 Mon Sep 17 00:00:00 2001
-From: Mark Brown <broonie@linaro.org>
-Date: Fri, 5 Jul 2013 19:37:51 +0100
-Subject: spi/rspi: Add missing dependency on DMAE
-
-The filter function used by the rspi driver is part of the DMAE controller
-driver so if the DMA controller driver is somehow disabled then the rspi
-driver will fail to build.
-
-Signed-off-by: Mark Brown <broonie@linaro.org>
-(cherry picked from commit 838af505843ca6277b47816e284001dbe7875386)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/spi/Kconfig | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
-index 92a9345d7a6b..a51e4be46ae5 100644
---- a/drivers/spi/Kconfig
-+++ b/drivers/spi/Kconfig
-@@ -341,7 +341,7 @@ config SPI_PXA2XX_PCI
- 
- config SPI_RSPI
- 	tristate "Renesas RSPI controller"
--	depends on SUPERH
-+	depends on SUPERH && SH_DMAE_BASE
- 	help
- 	  SPI driver for Renesas RSPI blocks.
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0215-ARM-shmobile-koelsch-dts-Add-gpio-keys-device.patch b/patches.renesas/0215-ARM-shmobile-koelsch-dts-Add-gpio-keys-device.patch
deleted file mode 100644
index 089800183aaf3..0000000000000
--- a/patches.renesas/0215-ARM-shmobile-koelsch-dts-Add-gpio-keys-device.patch
+++ /dev/null
@@ -1,85 +0,0 @@
-From 22415582bef39e6df8565f859757a90e44efaac9 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 11 Dec 2013 16:42:51 +0100
-Subject: ARM: shmobile: koelsch: dts: Add gpio-keys device
-
-The board has 7 buttons connected to GPIOs, add a corresponding
-gpio-keys device.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit bd0609896eabe2e64b75d7955ae5ecec528cf860)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7791-koelsch-reference.dts | 54 +++++++++++++++++++++++++
- 1 file changed, 54 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a7791-koelsch-reference.dts b/arch/arm/boot/dts/r8a7791-koelsch-reference.dts
-index 19192731c24a..588ca17ea1f0 100644
---- a/arch/arm/boot/dts/r8a7791-koelsch-reference.dts
-+++ b/arch/arm/boot/dts/r8a7791-koelsch-reference.dts
-@@ -31,6 +31,60 @@
- 		#size-cells = <1>;
- 	};
- 
-+	gpio-keys {
-+		compatible = "gpio-keys";
-+
-+		key-a {
-+			gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
-+			linux,code = <30>;
-+			label = "SW30";
-+			gpio-key,wakeup;
-+			debounce-interval = <20>;
-+		};
-+		key-b {
-+			gpios = <&gpio7 1 GPIO_ACTIVE_LOW>;
-+			linux,code = <48>;
-+			label = "SW31";
-+			gpio-key,wakeup;
-+			debounce-interval = <20>;
-+		};
-+		key-c {
-+			gpios = <&gpio7 2 GPIO_ACTIVE_LOW>;
-+			linux,code = <46>;
-+			label = "SW32";
-+			gpio-key,wakeup;
-+			debounce-interval = <20>;
-+		};
-+		key-d {
-+			gpios = <&gpio7 3 GPIO_ACTIVE_LOW>;
-+			linux,code = <32>;
-+			label = "SW33";
-+			gpio-key,wakeup;
-+			debounce-interval = <20>;
-+		};
-+		key-e {
-+			gpios = <&gpio7 4 GPIO_ACTIVE_LOW>;
-+			linux,code = <18>;
-+			label = "SW34";
-+			gpio-key,wakeup;
-+			debounce-interval = <20>;
-+		};
-+		key-f {
-+			gpios = <&gpio7 5 GPIO_ACTIVE_LOW>;
-+			linux,code = <33>;
-+			label = "SW35";
-+			gpio-key,wakeup;
-+			debounce-interval = <20>;
-+		};
-+		key-g {
-+			gpios = <&gpio7 6 GPIO_ACTIVE_LOW>;
-+			linux,code = <34>;
-+			label = "SW36";
-+			gpio-key,wakeup;
-+			debounce-interval = <20>;
-+		};
-+	};
-+
- 	leds {
- 		compatible = "gpio-leds";
- 		led6 {
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0215-ARM-shmobile-r8a7778-fixup-Ether-setup-code-position.patch b/patches.renesas/0215-ARM-shmobile-r8a7778-fixup-Ether-setup-code-position.patch
deleted file mode 100644
index 7729cc56f2b74..0000000000000
--- a/patches.renesas/0215-ARM-shmobile-r8a7778-fixup-Ether-setup-code-position.patch
+++ /dev/null
@@ -1,75 +0,0 @@
-From 29cfcc3507c5a5cf98537ae39b069e9cee6df975 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Mon, 8 Apr 2013 22:33:44 -0700
-Subject: ARM: shmobile: r8a7778: fixup Ether setup code position
-
-Ether setup code position was scattering.
-This patch fixes it up
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 734e02f888c97e285ce3481dc6418b8dc27b22f4)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-	arch/arm/mach-shmobile/setup-r8a7778.c
----
- arch/arm/mach-shmobile/setup-r8a7778.c | 28 ++++++++++++++--------------
- 1 file changed, 14 insertions(+), 14 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-r8a7778.c b/arch/arm/mach-shmobile/setup-r8a7778.c
-index 1f36ecc3..06ead4a0 100644
---- a/arch/arm/mach-shmobile/setup-r8a7778.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7778.c
-@@ -81,12 +81,6 @@ static struct sh_timer_config sh_tmu1_platform_data = {
- 	.clocksource_rating	= 200,
- };
- 
--/* Ether */
--static struct resource ether_resources[] = {
--	DEFINE_RES_MEM(0xfde00000, 0x400),
--	DEFINE_RES_IRQ(gic_iid(0x89)),
--};
--
- #define r8a7778_register_tmu(idx)			\
- 	platform_device_register_resndata(		\
- 		&platform_bus, "sh_tmu", idx,		\
-@@ -95,6 +89,20 @@ static struct resource ether_resources[] = {
- 		&sh_tmu##idx##_platform_data,		\
- 		sizeof(sh_tmu##idx##_platform_data))
- 
-+/* Ether */
-+static struct resource ether_resources[] = {
-+	DEFINE_RES_MEM(0xfde00000, 0x400),
-+	DEFINE_RES_IRQ(gic_iid(0x89)),
-+};
-+
-+void __init r8a7778_add_ether_device(struct sh_eth_plat_data *pdata)
-+{
-+	platform_device_register_resndata(&platform_bus, "sh_eth", -1,
-+					  ether_resources,
-+					  ARRAY_SIZE(ether_resources),
-+					  pdata, sizeof(*pdata));
-+}
-+
- /* PFC/GPIO */
- static struct resource pfc_resources[] = {
- 	DEFINE_RES_MEM(0xfffc0000, 0x118),
-@@ -165,14 +173,6 @@ void __init r8a7778_add_standard_devices(void)
- 	r8a7778_register_tmu(1);
- }
- 
--void __init r8a7778_add_ether_device(struct sh_eth_plat_data *pdata)
--{
--	platform_device_register_resndata(&platform_bus, "sh_eth", -1,
--					  ether_resources,
--					  ARRAY_SIZE(ether_resources),
--					  pdata, sizeof(*pdata));
--}
--
- static struct renesas_intc_irqpin_config irqpin_platform_data = {
- 	.irq_base = irq_pin(0), /* IRQ0 -> IRQ3 */
- 	.sense_bitfield_width = 2,
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0215-spi-drivers-Enable-build-of-drivers-with-COMPILE_TES.patch b/patches.renesas/0215-spi-drivers-Enable-build-of-drivers-with-COMPILE_TES.patch
deleted file mode 100644
index d6f75b7da31f9..0000000000000
--- a/patches.renesas/0215-spi-drivers-Enable-build-of-drivers-with-COMPILE_TES.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From 3ec1db9e6d0ba81e4248db02d52a7d62a8cca80c Mon Sep 17 00:00:00 2001
-From: Mark Brown <broonie@linaro.org>
-Date: Fri, 5 Jul 2013 19:42:58 +0100
-Subject: spi/drivers: Enable build of drivers with COMPILE_TEST
-
-Enable the build of drivers which don't have any real build time
-dependency on their architecture or platform with COMPILE_TEST,
-providing better build time coverage.
-
-Signed-off-by: Mark Brown <broonie@linaro.org>
-(cherry picked from commit 838af505843ca6277b47816e284001dbe7875386)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-	drivers/spi/Kconfig
----
- drivers/spi/Kconfig | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
-index a51e4be46ae5..0c19ed6a62f4 100644
---- a/drivers/spi/Kconfig
-+++ b/drivers/spi/Kconfig
-@@ -385,7 +385,7 @@ config SPI_SH_MSIOF
- 
- config SPI_SH
- 	tristate "SuperH SPI controller"
--	depends on SUPERH
-+	depends on SUPERH || COMPILE_TEST
- 	help
- 	  SPI driver for SuperH SPI blocks.
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0216-ARM-shmobile-Add-select-MIGHT_HAVE_PCI-for-PCI-AHB-b.patch b/patches.renesas/0216-ARM-shmobile-Add-select-MIGHT_HAVE_PCI-for-PCI-AHB-b.patch
deleted file mode 100644
index 6cf66e8c1f604..0000000000000
--- a/patches.renesas/0216-ARM-shmobile-Add-select-MIGHT_HAVE_PCI-for-PCI-AHB-b.patch
+++ /dev/null
@@ -1,63 +0,0 @@
-From 7cd055f763995e7de8045d3ab28a51f466a0a043 Mon Sep 17 00:00:00 2001
-From: Ben Dooks <ben.dooks@codethink.co.uk>
-Date: Thu, 12 Dec 2013 18:14:21 +0000
-Subject: ARM: shmobile: Add select MIGHT_HAVE_PCI for PCI-AHB bridge code
-
-The PCI sub-system is not enabled by default on ARM and on certain
-Renesas devices the build does not select it. This means that there
-are configurations that do not allow the AHB-PCI bridge used for the
-USB sub-systems to be built.
-
-For the R8A7790, R8A7791 and EMEV-2 select MIGHT_HAVE_PCI to allow the
-PCI drivers to be built. Also select MIGHT_HAVE_PCI for the multi-config
-where there may be many Reneasas devices selected.
-
-Reviewed-by: Ian Molton <ian.molton@codethink.co.uk>
-Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 7e429989b68533ee3896c96264a1cce99b95d218)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/Kconfig | 4 ++++
- 1 file changed, 4 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
-index 3e57d457308a..f01e8787a41a 100644
---- a/arch/arm/mach-shmobile/Kconfig
-+++ b/arch/arm/mach-shmobile/Kconfig
-@@ -12,6 +12,7 @@ config ARCH_SHMOBILE_MULTI
- 	select HAVE_SMP
- 	select ARM_GIC
- 	select MIGHT_HAVE_CACHE_L2X0
-+	select MIGHT_HAVE_PCI
- 	select NO_IOPORT
- 	select PINCTRL
- 	select ARCH_REQUIRE_GPIOLIB
-@@ -111,6 +112,7 @@ config ARCH_R8A7790
- 	select ARCH_WANT_OPTIONAL_GPIOLIB
- 	select ARM_GIC
- 	select CPU_V7
-+	select MIGHT_HAVE_PCI
- 	select SH_CLK_CPG
- 	select RENESAS_IRQC
- 
-@@ -119,6 +121,7 @@ config ARCH_R8A7791
- 	select ARCH_WANT_OPTIONAL_GPIOLIB
- 	select ARM_GIC
- 	select CPU_V7
-+	select MIGHT_HAVE_PCI
- 	select SH_CLK_CPG
- 	select RENESAS_IRQC
- 
-@@ -127,6 +130,7 @@ config ARCH_EMEV2
- 	select ARCH_WANT_OPTIONAL_GPIOLIB
- 	select ARM_GIC
- 	select CPU_V7
-+	select MIGHT_HAVE_PCI
- 	select USE_OF
- 	select AUTO_ZRELADDR
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0216-ARM-shmobile-r8a7740-Add-interim-sh-eth-device-name-.patch b/patches.renesas/0216-ARM-shmobile-r8a7740-Add-interim-sh-eth-device-name-.patch
deleted file mode 100644
index 997cde30e208d..0000000000000
--- a/patches.renesas/0216-ARM-shmobile-r8a7740-Add-interim-sh-eth-device-name-.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From deae674c502ca18df8864c82d145a0d0c2b7daf6 Mon Sep 17 00:00:00 2001
-From: Bastian Hecht <hechtb@gmail.com>
-Date: Tue, 18 Dec 2012 17:22:38 +0000
-Subject: ARM: shmobile: r8a7740: Add interim sh-eth device name to clocks list
-
-When we use the ethernet device via DT setup, we need to add it
-to a lookup list until this is properly handled later in a DT-only
-fashion.
-
-Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 9e0b428f079d7b4c9d59c868b6f5b4ad2193e86b)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r8a7740.c | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c
-index 54afa042..008b11cf 100644
---- a/arch/arm/mach-shmobile/clock-r8a7740.c
-+++ b/arch/arm/mach-shmobile/clock-r8a7740.c
-@@ -592,6 +592,7 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_DEV_ID("sh_mmcif",		&mstp_clks[MSTP312]),
- 	CLKDEV_DEV_ID("e6bd0000.mmcif",         &mstp_clks[MSTP312]),
- 	CLKDEV_DEV_ID("sh-eth",			&mstp_clks[MSTP309]),
-+	CLKDEV_DEV_ID("e9a00000.sh-eth",	&mstp_clks[MSTP309]),
- 
- 	CLKDEV_DEV_ID("sh_mobile_sdhi.2",	&mstp_clks[MSTP415]),
- 	CLKDEV_DEV_ID("e6870000.sdhi",          &mstp_clks[MSTP415]),
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0216-spi-rcar-add-Renesas-QSPI-support-on-RSPI.patch b/patches.renesas/0216-spi-rcar-add-Renesas-QSPI-support-on-RSPI.patch
deleted file mode 100644
index f0b4bb7a2f96f..0000000000000
--- a/patches.renesas/0216-spi-rcar-add-Renesas-QSPI-support-on-RSPI.patch
+++ /dev/null
@@ -1,333 +0,0 @@
-From 2dff0ab0360e79e4594fa6b940004d9943bc109b Mon Sep 17 00:00:00 2001
-From: Hiep Cao Minh <cm-hiep@jinso.co.jp>
-Date: Tue, 3 Sep 2013 13:10:26 +0900
-Subject: spi: rcar: add Renesas QSPI support on RSPI
-
-The R8A7790 has QSPI module which is very similar to RSPI.
-This patch adds into RSPI module together to supports QSPI module.
-
-Signed-off-by: Hiep Cao Minh <cm-hiep@jinso.co.jp>
-Signed-off-by: Mark Brown <broonie@linaro.org>
-(cherry picked from commit 5ce0ba88650f2606244a761d92e2b725f4ab3583)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/spi/Kconfig      |   2 +-
- drivers/spi/spi-rspi.c   | 181 ++++++++++++++++++++++++++++++++++++-----------
- include/linux/spi/rspi.h |   2 +
- 3 files changed, 144 insertions(+), 41 deletions(-)
-
-diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
-index 0c19ed6a62f4..f9f44767c542 100644
---- a/drivers/spi/Kconfig
-+++ b/drivers/spi/Kconfig
-@@ -341,7 +341,7 @@ config SPI_PXA2XX_PCI
- 
- config SPI_RSPI
- 	tristate "Renesas RSPI controller"
--	depends on SUPERH && SH_DMAE_BASE
-+	depends on (SUPERH || ARCH_SHMOBILE) && SH_DMAE_BASE
- 	help
- 	  SPI driver for Renesas RSPI blocks.
- 
-diff --git a/drivers/spi/spi-rspi.c b/drivers/spi/spi-rspi.c
-index 49ae72a93087..7675a6b25653 100644
---- a/drivers/spi/spi-rspi.c
-+++ b/drivers/spi/spi-rspi.c
-@@ -59,6 +59,14 @@
- #define RSPI_SPCMD6		0x1c
- #define RSPI_SPCMD7		0x1e
- 
-+/*qspi only */
-+#define QSPI_SPBFCR		0x18
-+#define QSPI_SPBDCR		0x1a
-+#define QSPI_SPBMUL0		0x1c
-+#define QSPI_SPBMUL1		0x20
-+#define QSPI_SPBMUL2		0x24
-+#define QSPI_SPBMUL3		0x28
-+
- /* SPCR */
- #define SPCR_SPRIE		0x80
- #define SPCR_SPE		0x40
-@@ -126,6 +134,8 @@
- #define SPCMD_LSBF		0x1000
- #define SPCMD_SPB_MASK		0x0f00
- #define SPCMD_SPB_8_TO_16(bit)	(((bit - 1) << 8) & SPCMD_SPB_MASK)
-+#define SPCMD_SPB_8BIT		0x0000	/* qspi only */
-+#define SPCMD_SPB_16BIT		0x0100
- #define SPCMD_SPB_20BIT		0x0000
- #define SPCMD_SPB_24BIT		0x0100
- #define SPCMD_SPB_32BIT		0x0200
-@@ -135,6 +145,10 @@
- #define SPCMD_CPOL		0x0002
- #define SPCMD_CPHA		0x0001
- 
-+/* SPBFCR */
-+#define SPBFCR_TXRST		0x80	/* qspi only */
-+#define SPBFCR_RXRST		0x40	/* qspi only */
-+
- struct rspi_data {
- 	void __iomem *addr;
- 	u32 max_speed_hz;
-@@ -145,6 +159,7 @@ struct rspi_data {
- 	spinlock_t lock;
- 	struct clk *clk;
- 	unsigned char spsr;
-+	const struct spi_ops *ops;
- 
- 	/* for dmaengine */
- 	struct dma_chan *chan_tx;
-@@ -165,6 +180,11 @@ static void rspi_write16(struct rspi_data *rspi, u16 data, u16 offset)
- 	iowrite16(data, rspi->addr + offset);
- }
- 
-+static void rspi_write32(struct rspi_data *rspi, u32 data, u16 offset)
-+{
-+	iowrite32(data, rspi->addr + offset);
-+}
-+
- static u8 rspi_read8(struct rspi_data *rspi, u16 offset)
- {
- 	return ioread8(rspi->addr + offset);
-@@ -175,17 +195,98 @@ static u16 rspi_read16(struct rspi_data *rspi, u16 offset)
- 	return ioread16(rspi->addr + offset);
- }
- 
--static unsigned char rspi_calc_spbr(struct rspi_data *rspi)
-+/* optional functions */
-+struct spi_ops {
-+	int (*set_config_register)(struct rspi_data *rspi, int access_size);
-+};
-+
-+/*
-+ * functions for RSPI
-+ */
-+static int rspi_set_config_register(struct rspi_data *rspi, int access_size)
- {
--	int tmp;
--	unsigned char spbr;
-+	int spbr;
-+
-+	/* Sets output mode(CMOS) and MOSI signal(from previous transfer) */
-+	rspi_write8(rspi, 0x00, RSPI_SPPCR);
- 
--	tmp = clk_get_rate(rspi->clk) / (2 * rspi->max_speed_hz) - 1;
--	spbr = clamp(tmp, 0, 255);
-+	/* Sets transfer bit rate */
-+	spbr = clk_get_rate(rspi->clk) / (2 * rspi->max_speed_hz) - 1;
-+	rspi_write8(rspi, clamp(spbr, 0, 255), RSPI_SPBR);
-+
-+	/* Sets number of frames to be used: 1 frame */
-+	rspi_write8(rspi, 0x00, RSPI_SPDCR);
- 
--	return spbr;
-+	/* Sets RSPCK, SSL, next-access delay value */
-+	rspi_write8(rspi, 0x00, RSPI_SPCKD);
-+	rspi_write8(rspi, 0x00, RSPI_SSLND);
-+	rspi_write8(rspi, 0x00, RSPI_SPND);
-+
-+	/* Sets parity, interrupt mask */
-+	rspi_write8(rspi, 0x00, RSPI_SPCR2);
-+
-+	/* Sets SPCMD */
-+	rspi_write16(rspi, SPCMD_SPB_8_TO_16(access_size) | SPCMD_SSLKP,
-+		     RSPI_SPCMD0);
-+
-+	/* Sets RSPI mode */
-+	rspi_write8(rspi, SPCR_MSTR, RSPI_SPCR);
-+
-+	return 0;
- }
- 
-+/*
-+ * functions for QSPI
-+ */
-+static int qspi_set_config_register(struct rspi_data *rspi, int access_size)
-+{
-+	u16 spcmd;
-+	int spbr;
-+
-+	/* Sets output mode(CMOS) and MOSI signal(from previous transfer) */
-+	rspi_write8(rspi, 0x00, RSPI_SPPCR);
-+
-+	/* Sets transfer bit rate */
-+	spbr = clk_get_rate(rspi->clk) / (2 * rspi->max_speed_hz);
-+	rspi_write8(rspi, clamp(spbr, 0, 255), RSPI_SPBR);
-+
-+	/* Sets number of frames to be used: 1 frame */
-+	rspi_write8(rspi, 0x00, RSPI_SPDCR);
-+
-+	/* Sets RSPCK, SSL, next-access delay value */
-+	rspi_write8(rspi, 0x00, RSPI_SPCKD);
-+	rspi_write8(rspi, 0x00, RSPI_SSLND);
-+	rspi_write8(rspi, 0x00, RSPI_SPND);
-+
-+	/* Data Length Setting */
-+	if (access_size == 8)
-+		spcmd = SPCMD_SPB_8BIT;
-+	else if (access_size == 16)
-+		spcmd = SPCMD_SPB_16BIT;
-+	else if (access_size == 32)
-+		spcmd = SPCMD_SPB_32BIT;
-+
-+	spcmd |= SPCMD_SCKDEN | SPCMD_SLNDEN | SPCMD_SSLKP | SPCMD_SPNDEN;
-+
-+	/* Resets transfer data length */
-+	rspi_write32(rspi, 0, QSPI_SPBMUL0);
-+
-+	/* Resets transmit and receive buffer */
-+	rspi_write8(rspi, SPBFCR_TXRST | SPBFCR_RXRST, QSPI_SPBFCR);
-+	/* Sets buffer to allow normal operation */
-+	rspi_write8(rspi, 0x00, QSPI_SPBFCR);
-+
-+	/* Sets SPCMD */
-+	rspi_write16(rspi, spcmd, RSPI_SPCMD0);
-+
-+	/* Enables SPI function in a master mode */
-+	rspi_write8(rspi, SPCR_SPE | SPCR_MSTR, RSPI_SPCR);
-+
-+	return 0;
-+}
-+
-+#define set_config_register(spi, n) spi->ops->set_config_register(spi, n)
-+
- static void rspi_enable_irq(struct rspi_data *rspi, u8 enable)
- {
- 	rspi_write8(rspi, rspi_read8(rspi, RSPI_SPCR) | enable, RSPI_SPCR);
-@@ -220,35 +321,6 @@ static void rspi_negate_ssl(struct rspi_data *rspi)
- 	rspi_write8(rspi, rspi_read8(rspi, RSPI_SPCR) & ~SPCR_SPE, RSPI_SPCR);
- }
- 
--static int rspi_set_config_register(struct rspi_data *rspi, int access_size)
--{
--	/* Sets output mode(CMOS) and MOSI signal(from previous transfer) */
--	rspi_write8(rspi, 0x00, RSPI_SPPCR);
--
--	/* Sets transfer bit rate */
--	rspi_write8(rspi, rspi_calc_spbr(rspi), RSPI_SPBR);
--
--	/* Sets number of frames to be used: 1 frame */
--	rspi_write8(rspi, 0x00, RSPI_SPDCR);
--
--	/* Sets RSPCK, SSL, next-access delay value */
--	rspi_write8(rspi, 0x00, RSPI_SPCKD);
--	rspi_write8(rspi, 0x00, RSPI_SSLND);
--	rspi_write8(rspi, 0x00, RSPI_SPND);
--
--	/* Sets parity, interrupt mask */
--	rspi_write8(rspi, 0x00, RSPI_SPCR2);
--
--	/* Sets SPCMD */
--	rspi_write16(rspi, SPCMD_SPB_8_TO_16(access_size) | SPCMD_SSLKP,
--		     RSPI_SPCMD0);
--
--	/* Sets RSPI mode */
--	rspi_write8(rspi, SPCR_MSTR, RSPI_SPCR);
--
--	return 0;
--}
--
- static int rspi_send_pio(struct rspi_data *rspi, struct spi_message *mesg,
- 			 struct spi_transfer *t)
- {
-@@ -616,7 +688,7 @@ static int rspi_setup(struct spi_device *spi)
- 		spi->bits_per_word = 8;
- 	rspi->max_speed_hz = spi->max_speed_hz;
- 
--	rspi_set_config_register(rspi, 8);
-+	set_config_register(rspi, 8);
- 
- 	return 0;
- }
-@@ -745,7 +817,16 @@ static int rspi_probe(struct platform_device *pdev)
- 	struct rspi_data *rspi;
- 	int ret, irq;
- 	char clk_name[16];
-+	struct rspi_plat_data *rspi_pd = pdev->dev.platform_data;
-+	const struct spi_ops *ops;
-+	const struct platform_device_id *id_entry = pdev->id_entry;
- 
-+	ops = (struct spi_ops *)id_entry->driver_data;
-+	/* ops parameter check */
-+	if (!ops->set_config_register) {
-+		dev_err(&pdev->dev, "there is no set_config_register\n");
-+		return -ENODEV;
-+	}
- 	/* get base addr */
- 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- 	if (unlikely(res == NULL)) {
-@@ -767,7 +848,7 @@ static int rspi_probe(struct platform_device *pdev)
- 
- 	rspi = spi_master_get_devdata(master);
- 	platform_set_drvdata(pdev, rspi);
--
-+	rspi->ops = ops;
- 	rspi->master = master;
- 	rspi->addr = ioremap(res->start, resource_size(res));
- 	if (rspi->addr == NULL) {
-@@ -776,7 +857,7 @@ static int rspi_probe(struct platform_device *pdev)
- 		goto error1;
- 	}
- 
--	snprintf(clk_name, sizeof(clk_name), "rspi%d", pdev->id);
-+	snprintf(clk_name, sizeof(clk_name), "%s%d", id_entry->name, pdev->id);
- 	rspi->clk = clk_get(&pdev->dev, clk_name);
- 	if (IS_ERR(rspi->clk)) {
- 		dev_err(&pdev->dev, "cannot get clock\n");
-@@ -790,7 +871,10 @@ static int rspi_probe(struct platform_device *pdev)
- 	INIT_WORK(&rspi->ws, rspi_work);
- 	init_waitqueue_head(&rspi->wait);
- 
--	master->num_chipselect = 2;
-+	master->num_chipselect = rspi_pd->num_chipselect;
-+	if (!master->num_chipselect)
-+		master->num_chipselect = 2; /* default */
-+
- 	master->bus_num = pdev->id;
- 	master->setup = rspi_setup;
- 	master->transfer = rspi_transfer;
-@@ -832,11 +916,28 @@ error1:
- 	return ret;
- }
- 
-+static struct spi_ops rspi_ops = {
-+	.set_config_register =		rspi_set_config_register,
-+};
-+
-+static struct spi_ops qspi_ops = {
-+	.set_config_register =		qspi_set_config_register,
-+};
-+
-+static struct platform_device_id spi_driver_ids[] = {
-+	{ "rspi",	(kernel_ulong_t)&rspi_ops },
-+	{ "qspi",	(kernel_ulong_t)&qspi_ops },
-+	{},
-+};
-+
-+MODULE_DEVICE_TABLE(platform, spi_driver_ids);
-+
- static struct platform_driver rspi_driver = {
- 	.probe =	rspi_probe,
- 	.remove =	rspi_remove,
-+	.id_table =	spi_driver_ids,
- 	.driver		= {
--		.name = "rspi",
-+		.name = "renesas_spi",
- 		.owner	= THIS_MODULE,
- 	},
- };
-diff --git a/include/linux/spi/rspi.h b/include/linux/spi/rspi.h
-index 900f0e328235..a25bd6f65e7f 100644
---- a/include/linux/spi/rspi.h
-+++ b/include/linux/spi/rspi.h
-@@ -26,6 +26,8 @@ struct rspi_plat_data {
- 	unsigned int dma_rx_id;
- 
- 	unsigned dma_width_16bit:1;	/* DMAC read/write width = 16-bit */
-+
-+	u16 num_chipselect;
- };
- 
- #endif
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0217-ARM-shmobile-armadillo800eva-Enable-backlight-contro.patch b/patches.renesas/0217-ARM-shmobile-armadillo800eva-Enable-backlight-contro.patch
deleted file mode 100644
index 134cf13af525d..0000000000000
--- a/patches.renesas/0217-ARM-shmobile-armadillo800eva-Enable-backlight-contro.patch
+++ /dev/null
@@ -1,40 +0,0 @@
-From b309b76c0ccd8add6974ca3b6cc23991bda76a8d Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 18 Dec 2013 15:03:23 +0100
-Subject: ARM: shmobile: armadillo800eva: Enable backlight control in defconfig
-
-The backlight is controlled by a PWM signal generated by the TPU.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 924370cb4d643d538b6a85bedfb8c861fa623260)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/configs/armadillo800eva_defconfig | 3 +++
- 1 file changed, 3 insertions(+)
-
-diff --git a/arch/arm/configs/armadillo800eva_defconfig b/arch/arm/configs/armadillo800eva_defconfig
-index 5abf1a2e3160..9287a62de830 100644
---- a/arch/arm/configs/armadillo800eva_defconfig
-+++ b/arch/arm/configs/armadillo800eva_defconfig
-@@ -105,6 +105,7 @@ CONFIG_FB=y
- CONFIG_FB_SH_MOBILE_LCDC=y
- CONFIG_FB_SH_MOBILE_HDMI=y
- CONFIG_LCD_CLASS_DEVICE=y
-+CONFIG_BACKLIGHT_PWM=y
- CONFIG_FRAMEBUFFER_CONSOLE=y
- CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
- CONFIG_LOGO=y
-@@ -130,6 +131,8 @@ CONFIG_DMADEVICES=y
- CONFIG_SH_DMAE=y
- CONFIG_UIO=y
- CONFIG_UIO_PDRV_GENIRQ=y
-+CONFIG_PWM=y
-+CONFIG_PWM_RENESAS_TPU=y
- # CONFIG_DNOTIFY is not set
- CONFIG_MSDOS_FS=y
- CONFIG_VFAT_FS=y
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0217-ARM-shmobile-r8a7740-Add-I2C-DT-clock-names.patch b/patches.renesas/0217-ARM-shmobile-r8a7740-Add-I2C-DT-clock-names.patch
deleted file mode 100644
index 22f964aeddcb9..0000000000000
--- a/patches.renesas/0217-ARM-shmobile-r8a7740-Add-I2C-DT-clock-names.patch
+++ /dev/null
@@ -1,38 +0,0 @@
-From b68afd32522fa03e86b084f2c42366b97d83260d Mon Sep 17 00:00:00 2001
-From: Bastian Hecht <hechtb@gmail.com>
-Date: Wed, 17 Apr 2013 12:34:03 +0200
-Subject: ARM: shmobile: r8a7740: Add I2C DT clock names
-
-Add clock association for i2c0 and i2c1 for the new DT names.
-
-Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 8d79071eec6a343a30057def27b79ac41eb4f192)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r8a7740.c | 2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c
-index 008b11cf..ecdc0a4c 100644
---- a/arch/arm/mach-shmobile/clock-r8a7740.c
-+++ b/arch/arm/mach-shmobile/clock-r8a7740.c
-@@ -551,6 +551,7 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_DEV_ID("sh_tmu.4",		&mstp_clks[MSTP111]),
- 	CLKDEV_DEV_ID("sh_tmu.5",		&mstp_clks[MSTP111]),
- 	CLKDEV_DEV_ID("i2c-sh_mobile.0",	&mstp_clks[MSTP116]),
-+	CLKDEV_DEV_ID("fff20000.i2c",		&mstp_clks[MSTP116]),
- 	CLKDEV_DEV_ID("sh_mobile_lcdc_fb.1",	&mstp_clks[MSTP117]),
- 	CLKDEV_DEV_ID("sh_tmu.0",		&mstp_clks[MSTP125]),
- 	CLKDEV_DEV_ID("sh_tmu.1",		&mstp_clks[MSTP125]),
-@@ -584,6 +585,7 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_DEV_ID("sh_cmt.10",		&mstp_clks[MSTP329]),
- 	CLKDEV_DEV_ID("sh_fsi2",		&mstp_clks[MSTP328]),
- 	CLKDEV_DEV_ID("i2c-sh_mobile.1",	&mstp_clks[MSTP323]),
-+	CLKDEV_DEV_ID("e6c20000.i2c",		&mstp_clks[MSTP323]),
- 	CLKDEV_DEV_ID("renesas_usbhs",		&mstp_clks[MSTP320]),
- 	CLKDEV_DEV_ID("sh_mobile_sdhi.0",	&mstp_clks[MSTP314]),
- 	CLKDEV_DEV_ID("e6850000.sdhi",          &mstp_clks[MSTP314]),
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0217-spi-rspi-Fix-8bit-data-access-clear-buffer.patch b/patches.renesas/0217-spi-rspi-Fix-8bit-data-access-clear-buffer.patch
deleted file mode 100644
index 2332f5efc3070..0000000000000
--- a/patches.renesas/0217-spi-rspi-Fix-8bit-data-access-clear-buffer.patch
+++ /dev/null
@@ -1,178 +0,0 @@
-From 0c7abc24526705b66ce42dc078646277e97de726 Mon Sep 17 00:00:00 2001
-From: Hiep Cao Minh <cm-hiep@jinso.co.jp>
-Date: Thu, 10 Oct 2013 17:14:03 +0900
-Subject: spi/rspi: Fix 8bit data access, clear buffer
-
-The R8A7790 has QSPI module which added into RSPI together.
-The transmit or receive data should be read from or written to
-with the longword-, word-, or byte-access width. Modify word-
-access to byte-access. In 16-bit data register, QSPI send or
-receive datas access from high 8-bit while RSPI send or receive
-datas access from low 8-bit on single mode.
-Modify to reset transmit-receive buffer data and reading dummy
-after data are transmited. RSPI has a TXMD bit on control
-register(SPCR) to set transmit-only mode when transmit data or
-Full-duplex synchronous mode when receive data. In QSPI the TXMD
-bit is not supported, so after transmit data, dummy should be
-read and before transmit or receive data the bufer register
-should be reset.
-This driver is the implementation of send and receive pio only,
-DMA is not supported at this time.
-Without this patch, it will occur error when transmit and receive
-
-Signed-off-by: Hiep Cao Minh <cm-hiep@jinso.co.jp>
-Signed-off-by: Mark Brown <broonie@linaro.org>
-(cherry picked from commit cb52c673f8adc4a1cba7b645ff5375b57dae21fa)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/spi/spi-rspi.c | 95 ++++++++++++++++++++++++++++++++++++++++++++++++--
- 1 file changed, 93 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/spi/spi-rspi.c b/drivers/spi/spi-rspi.c
-index 7675a6b25653..437e052695a7 100644
---- a/drivers/spi/spi-rspi.c
-+++ b/drivers/spi/spi-rspi.c
-@@ -198,6 +198,11 @@ static u16 rspi_read16(struct rspi_data *rspi, u16 offset)
- /* optional functions */
- struct spi_ops {
- 	int (*set_config_register)(struct rspi_data *rspi, int access_size);
-+	int (*send_pio)(struct rspi_data *rspi, struct spi_message *mesg,
-+			struct spi_transfer *t);
-+	int (*receive_pio)(struct rspi_data *rspi, struct spi_message *mesg,
-+			   struct spi_transfer *t);
-+
- };
- 
- /*
-@@ -349,6 +354,43 @@ static int rspi_send_pio(struct rspi_data *rspi, struct spi_message *mesg,
- 	return 0;
- }
- 
-+static int qspi_send_pio(struct rspi_data *rspi, struct spi_message *mesg,
-+			 struct spi_transfer *t)
-+{
-+	int remain = t->len;
-+	u8 *data;
-+
-+	rspi_write8(rspi, SPBFCR_TXRST, QSPI_SPBFCR);
-+	rspi_write8(rspi, 0x00, QSPI_SPBFCR);
-+
-+	data = (u8 *)t->tx_buf;
-+	while (remain > 0) {
-+
-+		if (rspi_wait_for_interrupt(rspi, SPSR_SPTEF, SPCR_SPTIE) < 0) {
-+			dev_err(&rspi->master->dev,
-+				"%s: tx empty timeout\n", __func__);
-+			return -ETIMEDOUT;
-+		}
-+		rspi_write8(rspi, *data++, RSPI_SPDR);
-+
-+		if (rspi_wait_for_interrupt(rspi, SPSR_SPRF, SPCR_SPRIE) < 0) {
-+			dev_err(&rspi->master->dev,
-+				"%s: receive timeout\n", __func__);
-+			return -ETIMEDOUT;
-+		}
-+		rspi_read8(rspi, RSPI_SPDR);
-+
-+		remain--;
-+	}
-+
-+	/* Waiting for the last transmition */
-+	rspi_wait_for_interrupt(rspi, SPSR_SPTEF, SPCR_SPTIE);
-+
-+	return 0;
-+}
-+
-+#define send_pio(spi, mesg, t) spi->ops->send_pio(spi, mesg, t)
-+
- static void rspi_dma_complete(void *arg)
- {
- 	struct rspi_data *rspi = arg;
-@@ -514,6 +556,51 @@ static int rspi_receive_pio(struct rspi_data *rspi, struct spi_message *mesg,
- 	return 0;
- }
- 
-+static void qspi_receive_init(struct rspi_data *rspi)
-+{
-+	unsigned char spsr;
-+
-+	spsr = rspi_read8(rspi, RSPI_SPSR);
-+	if (spsr & SPSR_SPRF)
-+		rspi_read8(rspi, RSPI_SPDR);   /* dummy read */
-+	rspi_write8(rspi, SPBFCR_TXRST | SPBFCR_RXRST, QSPI_SPBFCR);
-+	rspi_write8(rspi, 0x00, QSPI_SPBFCR);
-+}
-+
-+static int qspi_receive_pio(struct rspi_data *rspi, struct spi_message *mesg,
-+			    struct spi_transfer *t)
-+{
-+	int remain = t->len;
-+	u8 *data;
-+
-+	qspi_receive_init(rspi);
-+
-+	data = (u8 *)t->rx_buf;
-+	while (remain > 0) {
-+
-+		if (rspi_wait_for_interrupt(rspi, SPSR_SPTEF, SPCR_SPTIE) < 0) {
-+			dev_err(&rspi->master->dev,
-+				"%s: tx empty timeout\n", __func__);
-+			return -ETIMEDOUT;
-+		}
-+		/* dummy write for generate clock */
-+		rspi_write8(rspi, 0x00, RSPI_SPDR);
-+
-+		if (rspi_wait_for_interrupt(rspi, SPSR_SPRF, SPCR_SPRIE) < 0) {
-+			dev_err(&rspi->master->dev,
-+				"%s: receive timeout\n", __func__);
-+			return -ETIMEDOUT;
-+		}
-+		/* SPDR allows 8, 16 or 32-bit access */
-+		*data++ = rspi_read8(rspi, RSPI_SPDR);
-+		remain--;
-+	}
-+
-+	return 0;
-+}
-+
-+#define receive_pio(spi, mesg, t) spi->ops->receive_pio(spi, mesg, t)
-+
- static int rspi_receive_dma(struct rspi_data *rspi, struct spi_transfer *t)
- {
- 	struct scatterlist sg, sg_dummy;
-@@ -653,7 +740,7 @@ static void rspi_work(struct work_struct *work)
- 				if (rspi_is_dma(rspi, t))
- 					ret = rspi_send_dma(rspi, t);
- 				else
--					ret = rspi_send_pio(rspi, mesg, t);
-+					ret = send_pio(rspi, mesg, t);
- 				if (ret < 0)
- 					goto error;
- 			}
-@@ -661,7 +748,7 @@ static void rspi_work(struct work_struct *work)
- 				if (rspi_is_dma(rspi, t))
- 					ret = rspi_receive_dma(rspi, t);
- 				else
--					ret = rspi_receive_pio(rspi, mesg, t);
-+					ret = receive_pio(rspi, mesg, t);
- 				if (ret < 0)
- 					goto error;
- 			}
-@@ -918,10 +1005,14 @@ error1:
- 
- static struct spi_ops rspi_ops = {
- 	.set_config_register =		rspi_set_config_register,
-+	.send_pio =			rspi_send_pio,
-+	.receive_pio =			rspi_receive_pio,
- };
- 
- static struct spi_ops qspi_ops = {
- 	.set_config_register =		qspi_set_config_register,
-+	.send_pio =			qspi_send_pio,
-+	.receive_pio =			qspi_receive_pio,
- };
- 
- static struct platform_device_id spi_driver_ids[] = {
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0218-ARM-shmobile-armadillo-Add-PWM-backlight-power-suppl.patch b/patches.renesas/0218-ARM-shmobile-armadillo-Add-PWM-backlight-power-suppl.patch
deleted file mode 100644
index a595bc8dd893b..0000000000000
--- a/patches.renesas/0218-ARM-shmobile-armadillo-Add-PWM-backlight-power-suppl.patch
+++ /dev/null
@@ -1,50 +0,0 @@
-From 244855c34684ab0c9857bfb7101167f2973dad8c Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 11 Dec 2013 03:48:15 +0100
-Subject: ARM: shmobile: armadillo: Add PWM backlight power supply
-
-Commit 22ceeee16eb8f0d04de3ef43a5174fb30ec18af9 ("pwm-backlight: Add
-power supply support") added a mandatory power supply for the PWM
-backlight. Add a fixed 5V regulator to board code with a consumer supply
-entry for the backlight device.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit ad11cb9a5cf96346f1240995c672cdbb5501785c)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 9fb444f22f09cfad3798e3610f7dc62f8a385ee8)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-armadillo800eva.c | 7 +++++++
- 1 file changed, 7 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c
-index 44443a95bd0d..c1e3a3bb2da6 100644
---- a/arch/arm/mach-shmobile/board-armadillo800eva.c
-+++ b/arch/arm/mach-shmobile/board-armadillo800eva.c
-@@ -613,6 +613,11 @@ static struct regulator_consumer_supply fixed3v3_power_consumers[] = {
- 	REGULATOR_SUPPLY("vqmmc", "sh_mmcif"),
- };
- 
-+/* Fixed 3.3V regulator used by LCD backlight */
-+static struct regulator_consumer_supply fixed5v0_power_consumers[] = {
-+	REGULATOR_SUPPLY("power", "pwm-backlight.0"),
-+};
-+
- /* Fixed 3.3V regulator to be used by SDHI0 */
- static struct regulator_consumer_supply vcc_sdhi0_consumers[] = {
- 	REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"),
-@@ -1195,6 +1200,8 @@ static void __init eva_init(void)
- 
- 	regulator_register_always_on(0, "fixed-3.3V", fixed3v3_power_consumers,
- 				     ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
-+	regulator_register_always_on(3, "fixed-5.0V", fixed5v0_power_consumers,
-+				     ARRAY_SIZE(fixed5v0_power_consumers), 5000000);
- 
- 	pinctrl_register_mappings(eva_pinctrl_map, ARRAY_SIZE(eva_pinctrl_map));
- 	pwm_add_table(pwm_lookup, ARRAY_SIZE(pwm_lookup));
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0218-ARM-shmobile-r8a7740-add-TPU-PWM-support.patch b/patches.renesas/0218-ARM-shmobile-r8a7740-add-TPU-PWM-support.patch
deleted file mode 100644
index 492e54a67f4b1..0000000000000
--- a/patches.renesas/0218-ARM-shmobile-r8a7740-add-TPU-PWM-support.patch
+++ /dev/null
@@ -1,46 +0,0 @@
-From b7775ae3b628d980ced02b06a294fc66fe6e5687 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 26 Oct 2012 15:38:47 +0200
-Subject: ARM: shmobile: r8a7740: add TPU PWM support
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Tested-by: Simon Horman <horms@verge.net.au>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 58645fe9a81d517eb99a137868f11ac39aa71eb9)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r8a7740.c | 4 +++-
- 1 file changed, 3 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c
-index ecdc0a4c..7fd32d60 100644
---- a/arch/arm/mach-shmobile/clock-r8a7740.c
-+++ b/arch/arm/mach-shmobile/clock-r8a7740.c
-@@ -461,7 +461,7 @@ enum {
- 
- 	MSTP329, MSTP328, MSTP323, MSTP320,
- 	MSTP314, MSTP313, MSTP312,
--	MSTP309,
-+	MSTP309, MSTP304,
- 
- 	MSTP416, MSTP415, MSTP407, MSTP406,
- 
-@@ -499,6 +499,7 @@ static struct clk mstp_clks[MSTP_NR] = {
- 	[MSTP313] = SH_CLK_MSTP32(&div4_clks[DIV4_HP],	SMSTPCR3, 13, 0), /* SDHI1 */
- 	[MSTP312] = SH_CLK_MSTP32(&div4_clks[DIV4_HP],	SMSTPCR3, 12, 0), /* MMC */
- 	[MSTP309] = SH_CLK_MSTP32(&div4_clks[DIV4_HP],	SMSTPCR3,  9, 0), /* GEther */
-+	[MSTP304] = SH_CLK_MSTP32(&div4_clks[DIV4_CP],	SMSTPCR3,  4, 0), /* TPU0 */
- 
- 	[MSTP416] = SH_CLK_MSTP32(&div4_clks[DIV4_HP],	SMSTPCR4, 16, 0), /* USBHOST */
- 	[MSTP415] = SH_CLK_MSTP32(&div4_clks[DIV4_HP],	SMSTPCR4, 15, 0), /* SDHI2 */
-@@ -595,6 +596,7 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_DEV_ID("e6bd0000.mmcif",         &mstp_clks[MSTP312]),
- 	CLKDEV_DEV_ID("sh-eth",			&mstp_clks[MSTP309]),
- 	CLKDEV_DEV_ID("e9a00000.sh-eth",	&mstp_clks[MSTP309]),
-+	CLKDEV_DEV_ID("renesas_tpu_pwm",	&mstp_clks[MSTP304]),
- 
- 	CLKDEV_DEV_ID("sh_mobile_sdhi.2",	&mstp_clks[MSTP415]),
- 	CLKDEV_DEV_ID("e6870000.sdhi",          &mstp_clks[MSTP415]),
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0218-spi-rspi-use-platform-drvdata-correctly-in-rspi_remo.patch b/patches.renesas/0218-spi-rspi-use-platform-drvdata-correctly-in-rspi_remo.patch
deleted file mode 100644
index 511e49737f2f9..0000000000000
--- a/patches.renesas/0218-spi-rspi-use-platform-drvdata-correctly-in-rspi_remo.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From 70b7a5f752b38fd35becb82f4e29a89692089faf Mon Sep 17 00:00:00 2001
-From: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
-Date: Fri, 15 Nov 2013 15:44:02 +0800
-Subject: spi: rspi: use platform drvdata correctly in rspi_remove()
-
-We had set the platform drvdata in rspi_probe() as a type of
-struct rspi_data, but use it as struct spi_master in rspi_remove()
-Fix by remove the unnecessary spi_master_[get|put]() since rspi->master
-is no longer used after spi_unregister_master().
-
-Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
-Signed-off-by: Mark Brown <broonie@linaro.org>
-(cherry picked from commit 53063ec6e2cc38000f98a5de557b7e4fed186cfc)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/spi/spi-rspi.c | 3 +--
- 1 file changed, 1 insertion(+), 2 deletions(-)
-
-diff --git a/drivers/spi/spi-rspi.c b/drivers/spi/spi-rspi.c
-index 437e052695a7..0d39fa614da7 100644
---- a/drivers/spi/spi-rspi.c
-+++ b/drivers/spi/spi-rspi.c
-@@ -885,14 +885,13 @@ static void rspi_release_dma(struct rspi_data *rspi)
- 
- static int rspi_remove(struct platform_device *pdev)
- {
--	struct rspi_data *rspi = spi_master_get(platform_get_drvdata(pdev));
-+	struct rspi_data *rspi = platform_get_drvdata(pdev);
- 
- 	spi_unregister_master(rspi->master);
- 	rspi_release_dma(rspi);
- 	free_irq(platform_get_irq(pdev, 0), rspi);
- 	clk_put(rspi->clk);
- 	iounmap(rspi->addr);
--	spi_master_put(rspi->master);
- 
- 	return 0;
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0219-ARM-shmobile-r8a73a4-add-main-clock.patch b/patches.renesas/0219-ARM-shmobile-r8a73a4-add-main-clock.patch
deleted file mode 100644
index 6aee2c8bdf1e8..0000000000000
--- a/patches.renesas/0219-ARM-shmobile-r8a73a4-add-main-clock.patch
+++ /dev/null
@@ -1,122 +0,0 @@
-From e43eeb4c203a65a4f9df3160631584271f8f1641 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Thu, 4 Apr 2013 21:20:40 -0700
-Subject: ARM: shmobile: r8a73a4: add main clock
-
-Almost all clock needs main clock which is basis clock on r8a73a4.
-This patch adds it, and, set parent clock via CKSCR register.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 5e634d98635a135016d77e03de2cecbaba8d9d56)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r8a73a4.c | 53 ++++++++++++++++++++++++++++++++++
- 1 file changed, 53 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a73a4.c b/arch/arm/mach-shmobile/clock-r8a73a4.c
-index e710c00c..42942b43 100644
---- a/arch/arm/mach-shmobile/clock-r8a73a4.c
-+++ b/arch/arm/mach-shmobile/clock-r8a73a4.c
-@@ -22,6 +22,7 @@
- #include <linux/kernel.h>
- #include <linux/sh_clk.h>
- #include <linux/clkdev.h>
-+#include <mach/clock.h>
- #include <mach/common.h>
- 
- #define CPG_BASE 0xe6150000
-@@ -31,6 +32,8 @@
- #define SMSTPCR2 0xe6150138
- #define SMSTPCR5 0xe6150144
- 
-+#define CKSCR		0xE61500C0
-+
- static struct clk_mapping cpg_mapping = {
- 	.phys   = CPG_BASE,
- 	.len    = CPG_LEN,
-@@ -51,10 +54,32 @@ static struct clk extal2_clk = {
- 	.mapping	= &cpg_mapping,
- };
- 
-+static struct sh_clk_ops followparent_clk_ops = {
-+	.recalc	= followparent_recalc,
-+};
-+
-+static struct clk main_clk = {
-+	/* .parent will be set r8a73a4_clock_init */
-+	.ops	= &followparent_clk_ops,
-+};
-+
-+SH_CLK_RATIO(div2,	1, 2);
-+SH_CLK_RATIO(div4,	1, 4);
-+
-+SH_FIXED_RATIO_CLK(main_div2_clk,	main_clk,		div2);
-+SH_FIXED_RATIO_CLK(extal1_div2_clk,	extal1_clk,		div2);
-+SH_FIXED_RATIO_CLK(extal2_div2_clk,	extal2_clk,		div2);
-+SH_FIXED_RATIO_CLK(extal2_div4_clk,	extal2_clk,		div4);
-+
- static struct clk *main_clks[] = {
- 	&extalr_clk,
- 	&extal1_clk,
-+	&extal1_div2_clk,
- 	&extal2_clk,
-+	&extal2_div2_clk,
-+	&extal2_div4_clk,
-+	&main_clk,
-+	&main_div2_clk,
- };
- 
- enum {
-@@ -74,6 +99,13 @@ static struct clk mstp_clks[MSTP_NR] = {
- };
- 
- static struct clk_lookup lookups[] = {
-+	/* main clock */
-+	CLKDEV_CON_ID("extal1",			&extal1_clk),
-+	CLKDEV_CON_ID("extal1_div2",		&extal1_div2_clk),
-+	CLKDEV_CON_ID("extal2",			&extal2_clk),
-+	CLKDEV_CON_ID("extal2_div2",		&extal2_div2_clk),
-+	CLKDEV_CON_ID("extal2_div4",		&extal2_div4_clk),
-+
- 	CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]),
- 	CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP203]),
- 	CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP206]),
-@@ -90,6 +122,7 @@ void __init r8a73a4_clock_init(void)
- {
- 	void __iomem *cpg_base, *reg;
- 	int k, ret = 0;
-+	u32 ckscr;
- 
- 	/* fix MPCLK to EXTAL2 for now.
- 	 * this is needed until more detailed clock topology is supported
-@@ -100,6 +133,26 @@ void __init r8a73a4_clock_init(void)
- 	iowrite32(ioread32(reg) | 1 << 7 | 0x0c, reg); /* set CKSEL */
- 	iounmap(cpg_base);
- 
-+	reg = ioremap_nocache(CKSCR, PAGE_SIZE);
-+	BUG_ON(!reg);
-+	ckscr = ioread32(reg);
-+	iounmap(reg);
-+
-+	switch ((ckscr >> 28) & 0x3) {
-+	case 0:
-+		main_clk.parent = &extal1_clk;
-+		break;
-+	case 1:
-+		main_clk.parent = &extal1_div2_clk;
-+		break;
-+	case 2:
-+		main_clk.parent = &extal2_clk;
-+		break;
-+	case 3:
-+		main_clk.parent = &extal2_div2_clk;
-+		break;
-+	}
-+
- 	for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++)
- 		ret = clk_register(main_clks[k]);
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0219-ARM-shmobile-rcar-gen2-Initialize-CCF-before-clock-s.patch b/patches.renesas/0219-ARM-shmobile-rcar-gen2-Initialize-CCF-before-clock-s.patch
deleted file mode 100644
index 20c5e01a93adc..0000000000000
--- a/patches.renesas/0219-ARM-shmobile-rcar-gen2-Initialize-CCF-before-clock-s.patch
+++ /dev/null
@@ -1,56 +0,0 @@
-From ab57aa64bf995c4818b243e5911d477c8b59d980 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 11 Dec 2013 15:13:51 +0100
-Subject: ARM: shmobile: rcar-gen2: Initialize CCF before clock sources
-
-When CONFIG_COMMON_CLOCK is enabled, call rcar_gen2_clocks_init() in the
-timer init function to initialize the common clock framework before
-initializing the clock sources. This will take care of clock
-initialization when the r8a779[01] boards will be switched to
-multiplatform kernels.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 4b5c211f9f93c3919f23c88d808a4eda104ec8b2)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-rcar-gen2.c | 8 +++++++-
- 1 file changed, 7 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-rcar-gen2.c b/arch/arm/mach-shmobile/setup-rcar-gen2.c
-index b6275ab6085c..69ccc6c6fd33 100644
---- a/arch/arm/mach-shmobile/setup-rcar-gen2.c
-+++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c
-@@ -18,6 +18,7 @@
-  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
-  */
- 
-+#include <linux/clk/shmobile.h>
- #include <linux/clocksource.h>
- #include <linux/io.h>
- #include <linux/kernel.h>
-@@ -44,8 +45,10 @@ u32 __init rcar_gen2_read_mode_pins(void)
- 
- void __init rcar_gen2_timer_init(void)
- {
--#ifdef CONFIG_ARM_ARCH_TIMER
-+#if defined(CONFIG_ARM_ARCH_TIMER) || defined(CONFIG_COMMON_CLK)
- 	u32 mode = rcar_gen2_read_mode_pins();
-+#endif
-+#ifdef CONFIG_ARM_ARCH_TIMER
- 	void __iomem *base;
- 	int extal_mhz = 0;
- 	u32 freq;
-@@ -98,5 +101,8 @@ void __init rcar_gen2_timer_init(void)
- 	iounmap(base);
- #endif /* CONFIG_ARM_ARCH_TIMER */
- 
-+#ifdef CONFIG_COMMON_CLK
-+	rcar_gen2_clocks_init(mode);
-+#endif
- 	clocksource_of_init();
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0219-spi-sh-msiof-Remove-unneeded-empty-runtime-PM-callba.patch b/patches.renesas/0219-spi-sh-msiof-Remove-unneeded-empty-runtime-PM-callba.patch
deleted file mode 100644
index 7ed3b333cfcb0..0000000000000
--- a/patches.renesas/0219-spi-sh-msiof-Remove-unneeded-empty-runtime-PM-callba.patch
+++ /dev/null
@@ -1,61 +0,0 @@
-From 9f9c72893ff250d6f5846c862c0454559e9e5005 Mon Sep 17 00:00:00 2001
-From: Mark Brown <broonie@linaro.org>
-Date: Sun, 28 Jul 2013 15:36:38 +0100
-Subject: spi/sh-msiof: Remove unneeded empty runtime PM callbacks
-
-Previously the runtime PM API insisted on having callbacks for everything
-but this requirement was removed a while ago so the empty callbacks can
-also be removed.
-
-Signed-off-by: Mark Brown <broonie@linaro.org>
-(cherry picked from commit 33bf2c0b7d5af73763f41fd10d18f4c1f574c7fb)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/spi/spi-sh-msiof.c | 18 ------------------
- 1 file changed, 18 deletions(-)
-
-diff --git a/drivers/spi/spi-sh-msiof.c b/drivers/spi/spi-sh-msiof.c
-index 2bc5a6b86300..6688ce78df78 100644
---- a/drivers/spi/spi-sh-msiof.c
-+++ b/drivers/spi/spi-sh-msiof.c
-@@ -745,18 +745,6 @@ static int sh_msiof_spi_remove(struct platform_device *pdev)
- 	return ret;
- }
- 
--static int sh_msiof_spi_runtime_nop(struct device *dev)
--{
--	/* Runtime PM callback shared between ->runtime_suspend()
--	 * and ->runtime_resume(). Simply returns success.
--	 *
--	 * This driver re-initializes all registers after
--	 * pm_runtime_get_sync() anyway so there is no need
--	 * to save and restore registers here.
--	 */
--	return 0;
--}
--
- #ifdef CONFIG_OF
- static const struct of_device_id sh_msiof_match[] = {
- 	{ .compatible = "renesas,sh-msiof", },
-@@ -766,18 +754,12 @@ static const struct of_device_id sh_msiof_match[] = {
- MODULE_DEVICE_TABLE(of, sh_msiof_match);
- #endif
- 
--static struct dev_pm_ops sh_msiof_spi_dev_pm_ops = {
--	.runtime_suspend = sh_msiof_spi_runtime_nop,
--	.runtime_resume = sh_msiof_spi_runtime_nop,
--};
--
- static struct platform_driver sh_msiof_spi_drv = {
- 	.probe		= sh_msiof_spi_probe,
- 	.remove		= sh_msiof_spi_remove,
- 	.driver		= {
- 		.name		= "spi_sh_msiof",
- 		.owner		= THIS_MODULE,
--		.pm		= &sh_msiof_spi_dev_pm_ops,
- 		.of_match_table = of_match_ptr(sh_msiof_match),
- 	},
- };
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0220-ARM-shmobile-koelsch-Conditionally-select-MICREL_PHY.patch b/patches.renesas/0220-ARM-shmobile-koelsch-Conditionally-select-MICREL_PHY.patch
deleted file mode 100644
index 397a70c17f482..0000000000000
--- a/patches.renesas/0220-ARM-shmobile-koelsch-Conditionally-select-MICREL_PHY.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From 6c56c3b8599b61bb934c18e4596f8959ee707e99 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Thu, 12 Dec 2013 21:35:43 +0900
-Subject: ARM: shmobile: koelsch: Conditionally select MICREL_PHY
-
-The koelsch board uses has an SH ethernet controller which uses a Micrel
-phy. Select MICREL_PHY for koelsch if SH_ETH is enabled to make use of the
-Micrel-specific phy driver rather than relying on the generic phy driver.
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 8967136000668e10743758c84ddd39556b01cd57)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/Kconfig | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
-index f01e8787a41a..cd89d6348e0e 100644
---- a/arch/arm/mach-shmobile/Kconfig
-+++ b/arch/arm/mach-shmobile/Kconfig
-@@ -269,6 +269,7 @@ config MACH_KOELSCH
- 	bool "Koelsch board"
- 	depends on ARCH_R8A7791
- 	select USE_OF
-+	select MICREL_PHY if SH_ETH
- 
- config MACH_KOELSCH_REFERENCE
- 	bool "Koelsch board - Reference Device Tree Implementation"
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0220-ARM-shmobile-r8a73a4-add-pll-clocks.patch b/patches.renesas/0220-ARM-shmobile-r8a73a4-add-pll-clocks.patch
deleted file mode 100644
index 37e4d63e937d7..0000000000000
--- a/patches.renesas/0220-ARM-shmobile-r8a73a4-add-pll-clocks.patch
+++ /dev/null
@@ -1,151 +0,0 @@
-From 83f0d79728f06e5635568560d84017113acd2b25 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Thu, 4 Apr 2013 21:21:39 -0700
-Subject: ARM: shmobile: r8a73a4: add pll clocks
-
-PLL clocks are basis clock for other clock.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 0c3091ad45ac975244a7c0570e10b645743bb01c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r8a73a4.c | 101 +++++++++++++++++++++++++++++++++
- 1 file changed, 101 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a73a4.c b/arch/arm/mach-shmobile/clock-r8a73a4.c
-index 42942b43..2be592f6 100644
---- a/arch/arm/mach-shmobile/clock-r8a73a4.c
-+++ b/arch/arm/mach-shmobile/clock-r8a73a4.c
-@@ -33,6 +33,14 @@
- #define SMSTPCR5 0xe6150144
- 
- #define CKSCR		0xE61500C0
-+#define PLLECR		0xE61500D0
-+#define PLL1CR		0xE6150028
-+#define PLL2CR		0xE615002C
-+#define PLL2SCR		0xE61501F4
-+#define PLL2HCR		0xE61501E4
-+
-+
-+#define CPG_MAP(o) ((o - CPG_BASE) + cpg_mapping.base)
- 
- static struct clk_mapping cpg_mapping = {
- 	.phys   = CPG_BASE,
-@@ -71,6 +79,86 @@ SH_FIXED_RATIO_CLK(extal1_div2_clk,	extal1_clk,		div2);
- SH_FIXED_RATIO_CLK(extal2_div2_clk,	extal2_clk,		div2);
- SH_FIXED_RATIO_CLK(extal2_div4_clk,	extal2_clk,		div4);
- 
-+/*
-+ *		PLL clocks
-+ */
-+static struct clk *pll_parent_main[] = {
-+	[0] = &main_clk,
-+	[1] = &main_div2_clk
-+};
-+
-+static struct clk *pll_parent_main_extal[8] = {
-+	[0] = &main_div2_clk,
-+	[1] = &extal2_div2_clk,
-+	[3] = &extal2_div4_clk,
-+	[4] = &main_clk,
-+	[5] = &extal2_clk,
-+};
-+
-+static unsigned long pll_recalc(struct clk *clk)
-+{
-+	unsigned long mult = 1;
-+
-+	if (ioread32(CPG_MAP(PLLECR)) & (1 << clk->enable_bit))
-+		mult = (((ioread32(clk->mapped_reg) >> 24) & 0x7f) + 1);
-+
-+	return clk->parent->rate * mult;
-+}
-+
-+static int pll_set_parent(struct clk *clk, struct clk *parent)
-+{
-+	u32 val;
-+	int i, ret;
-+
-+	if (!clk->parent_table || !clk->parent_num)
-+		return -EINVAL;
-+
-+	/* Search the parent */
-+	for (i = 0; i < clk->parent_num; i++)
-+		if (clk->parent_table[i] == parent)
-+			break;
-+
-+	if (i == clk->parent_num)
-+		return -ENODEV;
-+
-+	ret = clk_reparent(clk, parent);
-+	if (ret < 0)
-+		return ret;
-+
-+	val = ioread32(clk->mapped_reg) &
-+		~(((1 << clk->src_width) - 1) << clk->src_shift);
-+
-+	iowrite32(val | i << clk->src_shift, clk->mapped_reg);
-+
-+	return 0;
-+}
-+
-+static struct sh_clk_ops pll_clk_ops = {
-+	.recalc		= pll_recalc,
-+	.set_parent	= pll_set_parent,
-+};
-+
-+#define PLL_CLOCK(name, p, pt, w, s, reg, e)		\
-+	static struct clk name = {			\
-+		.ops		= &pll_clk_ops,		\
-+		.flags		= CLK_ENABLE_ON_INIT,	\
-+		.parent		= p,			\
-+		.parent_table	= pt,			\
-+		.parent_num	= ARRAY_SIZE(pt),	\
-+		.src_width	= w,			\
-+		.src_shift	= s,			\
-+		.enable_reg	= (void __iomem *)reg,	\
-+		.enable_bit	= e,			\
-+		.mapping	= &cpg_mapping,		\
-+	}
-+
-+PLL_CLOCK(pll1_clk,  &main_clk,      pll_parent_main,       1, 7, PLL1CR,  1);
-+PLL_CLOCK(pll2_clk,  &main_div2_clk, pll_parent_main_extal, 3, 5, PLL2CR,  2);
-+PLL_CLOCK(pll2s_clk, &main_div2_clk, pll_parent_main_extal, 3, 5, PLL2SCR, 4);
-+PLL_CLOCK(pll2h_clk, &main_div2_clk, pll_parent_main_extal, 3, 5, PLL2HCR, 5);
-+
-+SH_FIXED_RATIO_CLK(pll1_div2_clk,	pll1_clk,	div2);
-+
- static struct clk *main_clks[] = {
- 	&extalr_clk,
- 	&extal1_clk,
-@@ -80,6 +168,11 @@ static struct clk *main_clks[] = {
- 	&extal2_div4_clk,
- 	&main_clk,
- 	&main_div2_clk,
-+	&pll1_clk,
-+	&pll1_div2_clk,
-+	&pll2_clk,
-+	&pll2s_clk,
-+	&pll2h_clk,
- };
- 
- enum {
-@@ -106,6 +199,14 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_CON_ID("extal2_div2",		&extal2_div2_clk),
- 	CLKDEV_CON_ID("extal2_div4",		&extal2_div4_clk),
- 
-+	/* pll clock */
-+	CLKDEV_CON_ID("pll1",			&pll1_clk),
-+	CLKDEV_CON_ID("pll1_div2",		&pll1_div2_clk),
-+	CLKDEV_CON_ID("pll2",			&pll2_clk),
-+	CLKDEV_CON_ID("pll2s",			&pll2s_clk),
-+	CLKDEV_CON_ID("pll2h",			&pll2h_clk),
-+
-+	/* MSTP */
- 	CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]),
- 	CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP203]),
- 	CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP206]),
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0220-spi-use-dev_get_platdata.patch b/patches.renesas/0220-spi-use-dev_get_platdata.patch
deleted file mode 100644
index 9ad94c7ffcf06..0000000000000
--- a/patches.renesas/0220-spi-use-dev_get_platdata.patch
+++ /dev/null
@@ -1,62 +0,0 @@
-From 4b9fa38e0d1fc7b02c2ec732d1002ba5e7b33a2d Mon Sep 17 00:00:00 2001
-From: Jingoo Han <jg1.han@samsung.com>
-Date: Tue, 30 Jul 2013 16:58:59 +0900
-Subject: spi: use dev_get_platdata()
-
-Use the wrapper function for retrieving the platform data instead of
-accessing dev->platform_data directly.
-
-Signed-off-by: Jingoo Han <jg1.han@samsung.com>
-Signed-off-by: Mark Brown <broonie@linaro.org>
-(cherry picked from commit 8074cf063e410a2c0cf1704c3b31002e21f5df7c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-	drivers/spi/spi-altera.c
-	drivers/spi/spi-ath79.c
-	drivers/spi/spi-au1550.c
-	drivers/spi/spi-bcm63xx.c
-	drivers/spi/spi-bfin-sport.c
-	drivers/spi/spi-bfin-v3.c
-	drivers/spi/spi-bfin5xx.c
-	drivers/spi/spi-coldfire-qspi.c
-	drivers/spi/spi-davinci.c
-	drivers/spi/spi-ep93xx.c
-	drivers/spi/spi-fsl-espi.c
-	drivers/spi/spi-fsl-lib.c
-	drivers/spi/spi-fsl-spi.c
-	drivers/spi/spi-gpio.c
-	drivers/spi/spi-mpc512x-psc.c
-	drivers/spi/spi-mpc52xx-psc.c
-	drivers/spi/spi-nuc900.c
-	drivers/spi/spi-oc-tiny.c
-	drivers/spi/spi-omap-100k.c
-	drivers/spi/spi-omap2-mcspi.c
-	drivers/spi/spi-pl022.c
-	drivers/spi/spi-rspi.c
-	drivers/spi/spi-s3c24xx.c
-	drivers/spi/spi-s3c64xx.c
-	drivers/spi/spi-sh-sci.c
-	drivers/spi/spi-ti-ssp.c
-	drivers/spi/spi-tle62x0.c
-	drivers/spi/spi-xilinx.c
----
- drivers/spi/spi-sh-msiof.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/spi/spi-sh-msiof.c b/drivers/spi/spi-sh-msiof.c
-index 6688ce78df78..2a95435a6a11 100644
---- a/drivers/spi/spi-sh-msiof.c
-+++ b/drivers/spi/spi-sh-msiof.c
-@@ -645,7 +645,7 @@ static int sh_msiof_spi_probe(struct platform_device *pdev)
- 	if (pdev->dev.of_node)
- 		p->info = sh_msiof_spi_parse_dt(&pdev->dev);
- 	else
--		p->info = pdev->dev.platform_data;
-+		p->info = dev_get_platdata(&pdev->dev);
- 
- 	if (!p->info) {
- 		dev_err(&pdev->dev, "failed to obtain device info\n");
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0221-ARM-7863-1-Let-arm_add_memory-always-use-64-bit-argu.patch b/patches.renesas/0221-ARM-7863-1-Let-arm_add_memory-always-use-64-bit-argu.patch
deleted file mode 100644
index 2d0ebeec4b414..0000000000000
--- a/patches.renesas/0221-ARM-7863-1-Let-arm_add_memory-always-use-64-bit-argu.patch
+++ /dev/null
@@ -1,63 +0,0 @@
-From 8a46a984b291fb9753340b18b804fdaa5c31487f Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Tue, 22 Oct 2013 17:53:16 +0100
-Subject: ARM: 7863/1: Let arm_add_memory() always use 64-bit arguments
-
-The DTB and/or the kernel command line may pass
-64-bit addresses regardless of kernel configuration,
-so update arm_add_memory() to take 64-bit arguments
-independently of the phys_addr_t size.
-
-This allows non-wrapping handling of high memory
-banks such as the second memory bank of APE6EVM
-(at 0x2_0000_0000) in case of 32-bit phys_addr_t.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-(cherry picked from commit 6a5014aa037495a14ea083b621ed97fd0c3c7e9e)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/include/asm/setup.h | 2 +-
- arch/arm/kernel/setup.c      | 6 +++---
- 2 files changed, 4 insertions(+), 4 deletions(-)
-
-diff --git a/arch/arm/include/asm/setup.h b/arch/arm/include/asm/setup.h
-index c50f05609501..8d6a089dfb76 100644
---- a/arch/arm/include/asm/setup.h
-+++ b/arch/arm/include/asm/setup.h
-@@ -49,7 +49,7 @@ extern struct meminfo meminfo;
- #define bank_phys_end(bank)	((bank)->start + (bank)->size)
- #define bank_phys_size(bank)	(bank)->size
- 
--extern int arm_add_memory(phys_addr_t start, phys_addr_t size);
-+extern int arm_add_memory(u64 start, u64 size);
- extern void early_print(const char *str, ...);
- extern void dump_machine_table(void);
- 
-diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
-index d62772f49907..23497e4c94c6 100644
---- a/arch/arm/kernel/setup.c
-+++ b/arch/arm/kernel/setup.c
-@@ -532,7 +532,7 @@ void __init dump_machine_table(void)
- 		/* can't use cpu_relax() here as it may require MMU setup */;
- }
- 
--int __init arm_add_memory(phys_addr_t start, phys_addr_t size)
-+int __init arm_add_memory(u64 start, u64 size)
- {
- 	struct membank *bank = &meminfo.bank[meminfo.nr_banks];
- 
-@@ -582,8 +582,8 @@ int __init arm_add_memory(phys_addr_t start, phys_addr_t size)
- static int __init early_mem(char *p)
- {
- 	static int usermem __initdata = 0;
--	phys_addr_t size;
--	phys_addr_t start;
-+	u64 size;
-+	u64 start;
- 	char *endp;
- 
- 	/*
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0221-ARM-shmobile-koelsch-Enable-CONFIG_PACKET-in-defconf.patch b/patches.renesas/0221-ARM-shmobile-koelsch-Enable-CONFIG_PACKET-in-defconf.patch
deleted file mode 100644
index b41bb7c885abd..0000000000000
--- a/patches.renesas/0221-ARM-shmobile-koelsch-Enable-CONFIG_PACKET-in-defconf.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From 5aa98b1f072c75ebbf57b5178b54c9a023a7c404 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Mon, 16 Dec 2013 09:34:08 +0900
-Subject: ARM: shmobile: koelsch: Enable CONFIG_PACKET in defconfig
-
-CONFIG_PACKET is required for the ISC dhcpd daemon function.
-This change brings the koelsch defconfig into line with
-other shmobile defconfigs.
-
-Signed-off-by: Simon Horman <horms@verge.net.au>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 5dfdf53358ae64c234d85ad801294054150dae76)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/configs/koelsch_defconfig | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/arch/arm/configs/koelsch_defconfig b/arch/arm/configs/koelsch_defconfig
-index 284846e921c0..4971acdf31a4 100644
---- a/arch/arm/configs/koelsch_defconfig
-+++ b/arch/arm/configs/koelsch_defconfig
-@@ -30,6 +30,7 @@ CONFIG_NEON=y
- # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
- CONFIG_PM_RUNTIME=y
- CONFIG_NET=y
-+CONFIG_PACKET=y
- CONFIG_INET=y
- CONFIG_IP_PNP=y
- CONFIG_IP_PNP_DHCP=y
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0221-ARM-shmobile-r8a73a4-add-div4-clocks.patch b/patches.renesas/0221-ARM-shmobile-r8a73a4-add-div4-clocks.patch
deleted file mode 100644
index 00c9bca56164d..0000000000000
--- a/patches.renesas/0221-ARM-shmobile-r8a73a4-add-div4-clocks.patch
+++ /dev/null
@@ -1,88 +0,0 @@
-From df781d4ddcb4681f3258b27dcb1a597f63a4c1d2 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Thu, 4 Apr 2013 21:22:16 -0700
-Subject: ARM: shmobile: r8a73a4: add div4 clocks
-
-DIV4 clocks control each core clocks.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit b89edf344696e7783312a370b6477beea90116f9)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r8a73a4.c | 45 ++++++++++++++++++++++++++++++++++
- 1 file changed, 45 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a73a4.c b/arch/arm/mach-shmobile/clock-r8a73a4.c
-index 2be592f6..147314ac 100644
---- a/arch/arm/mach-shmobile/clock-r8a73a4.c
-+++ b/arch/arm/mach-shmobile/clock-r8a73a4.c
-@@ -32,6 +32,8 @@
- #define SMSTPCR2 0xe6150138
- #define SMSTPCR5 0xe6150144
- 
-+#define FRQCRA		0xE6150000
-+#define FRQCRB		0xE6150004
- #define CKSCR		0xE61500C0
- #define PLLECR		0xE61500D0
- #define PLL1CR		0xE6150028
-@@ -175,6 +177,46 @@ static struct clk *main_clks[] = {
- 	&pll2h_clk,
- };
- 
-+/* DIV4 */
-+static void div4_kick(struct clk *clk)
-+{
-+	unsigned long value;
-+
-+	/* set KICK bit in FRQCRB to update hardware setting */
-+	value = ioread32(CPG_MAP(FRQCRB));
-+	value |= (1 << 31);
-+	iowrite32(value, CPG_MAP(FRQCRB));
-+}
-+
-+static int divisors[] = { 2, 3, 4, 6, 8, 12, 16, 18, 24, 0, 36, 48, 10};
-+
-+static struct clk_div_mult_table div4_div_mult_table = {
-+	.divisors	= divisors,
-+	.nr_divisors	= ARRAY_SIZE(divisors),
-+};
-+
-+static struct clk_div4_table div4_table = {
-+	.div_mult_table	= &div4_div_mult_table,
-+	.kick		= div4_kick,
-+};
-+
-+enum {
-+	DIV4_I, DIV4_M3, DIV4_B, DIV4_M1, DIV4_M2,
-+	DIV4_ZX, DIV4_ZS, DIV4_HP,
-+	DIV4_NR };
-+
-+static struct clk div4_clks[DIV4_NR] = {
-+	[DIV4_I]	= SH_CLK_DIV4(&pll1_clk, FRQCRA, 20, 0x0dff, CLK_ENABLE_ON_INIT),
-+	[DIV4_M3]	= SH_CLK_DIV4(&pll1_clk, FRQCRA, 12, 0x1dff, CLK_ENABLE_ON_INIT),
-+	[DIV4_B]	= SH_CLK_DIV4(&pll1_clk, FRQCRA,  8, 0x0dff, CLK_ENABLE_ON_INIT),
-+	[DIV4_M1]	= SH_CLK_DIV4(&pll1_clk, FRQCRA,  4, 0x1dff, 0),
-+	[DIV4_M2]	= SH_CLK_DIV4(&pll1_clk, FRQCRA,  0, 0x1dff, 0),
-+	[DIV4_ZX]	= SH_CLK_DIV4(&pll1_clk, FRQCRB, 12, 0x0dff, 0),
-+	[DIV4_ZS]	= SH_CLK_DIV4(&pll1_clk, FRQCRB,  8, 0x0dff, 0),
-+	[DIV4_HP]	= SH_CLK_DIV4(&pll1_clk, FRQCRB,  4, 0x0dff, 0),
-+};
-+
-+/* MSTP */
- enum {
- 	MSTP217, MSTP216, MSTP207, MSTP206, MSTP204, MSTP203,
- 	MSTP522,
-@@ -258,6 +300,9 @@ void __init r8a73a4_clock_init(void)
- 		ret = clk_register(main_clks[k]);
- 
- 	if (!ret)
-+		ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table);
-+
-+	if (!ret)
- 		ret = sh_clk_mstp_register(mstp_clks, MSTP_NR);
- 
- 	clkdev_add_table(lookups, ARRAY_SIZE(lookups));
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0222-ARM-7864-1-Handle-64-bit-memory-in-case-of-32-bit-ph.patch b/patches.renesas/0222-ARM-7864-1-Handle-64-bit-memory-in-case-of-32-bit-ph.patch
deleted file mode 100644
index e3e973889e8c3..0000000000000
--- a/patches.renesas/0222-ARM-7864-1-Handle-64-bit-memory-in-case-of-32-bit-ph.patch
+++ /dev/null
@@ -1,67 +0,0 @@
-From 4bb68c4956d302847a872dd76a7f4ce1635c3a9d Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Tue, 22 Oct 2013 17:59:54 +0100
-Subject: ARM: 7864/1: Handle 64-bit memory in case of 32-bit phys_addr_t
-
-Use CONFIG_ARCH_PHYS_ADDR_T_64BIT to determine
-if ignoring or truncating of memory banks is
-neccessary. This may be needed in the case of
-64-bit memory bank addresses but when phys_addr_t
-is kept 32-bit.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-(cherry picked from commit 6d7d5da7d75c6df676c8b72d32b02ff024438f0c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/kernel/setup.c | 16 ++++++++++++----
- 1 file changed, 12 insertions(+), 4 deletions(-)
-
-diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
-index 23497e4c94c6..4f991e8b9a7d 100644
---- a/arch/arm/kernel/setup.c
-+++ b/arch/arm/kernel/setup.c
-@@ -535,6 +535,7 @@ void __init dump_machine_table(void)
- int __init arm_add_memory(u64 start, u64 size)
- {
- 	struct membank *bank = &meminfo.bank[meminfo.nr_banks];
-+	u64 aligned_start;
- 
- 	if (meminfo.nr_banks >= NR_BANKS) {
- 		printk(KERN_CRIT "NR_BANKS too low, "
-@@ -547,10 +548,16 @@ int __init arm_add_memory(u64 start, u64 size)
- 	 * Size is appropriately rounded down, start is rounded up.
- 	 */
- 	size -= start & ~PAGE_MASK;
--	bank->start = PAGE_ALIGN(start);
-+	aligned_start = PAGE_ALIGN(start);
- 
--#ifndef CONFIG_ARM_LPAE
--	if (bank->start + size < bank->start) {
-+#ifndef CONFIG_ARCH_PHYS_ADDR_T_64BIT
-+	if (aligned_start > ULONG_MAX) {
-+		printk(KERN_CRIT "Ignoring memory at 0x%08llx outside "
-+		       "32-bit physical address space\n", (long long)start);
-+		return -EINVAL;
-+	}
-+
-+	if (aligned_start + size > ULONG_MAX) {
- 		printk(KERN_CRIT "Truncating memory at 0x%08llx to fit in "
- 			"32-bit physical address space\n", (long long)start);
- 		/*
-@@ -558,10 +565,11 @@ int __init arm_add_memory(u64 start, u64 size)
- 		 * 32 bits, we use ULONG_MAX as the upper limit rather than 4GB.
- 		 * This means we lose a page after masking.
- 		 */
--		size = ULONG_MAX - bank->start;
-+		size = ULONG_MAX - aligned_start;
- 	}
- #endif
- 
-+	bank->start = aligned_start;
- 	bank->size = size & ~(phys_addr_t)(PAGE_SIZE - 1);
- 
- 	/*
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0222-ARM-shmobile-koelsch-Do-not-disable-CONFIG_-INOTIFY_.patch b/patches.renesas/0222-ARM-shmobile-koelsch-Do-not-disable-CONFIG_-INOTIFY_.patch
deleted file mode 100644
index bc0fc045ca83f..0000000000000
--- a/patches.renesas/0222-ARM-shmobile-koelsch-Do-not-disable-CONFIG_-INOTIFY_.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From a978314b9b756476fd9da4cf55cfc1081d8992b9 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Mon, 16 Dec 2013 09:34:09 +0900
-Subject: ARM: shmobile: koelsch: Do not disable CONFIG_{INOTIFY_USER,UNIX} in
- defconfig
-
-CONFIG_INOTIFY_USER and CONFIG_UNIX are required for udev to function.
-This change brings the koelsch defconfig into line with
-other shmobile defconfigs.
-
-Signed-off-by: Simon Horman <horms@verge.net.au>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 559cec66f1a2620bc85bb79191512a569a404cb8)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/configs/koelsch_defconfig | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/arch/arm/configs/koelsch_defconfig b/arch/arm/configs/koelsch_defconfig
-index 4971acdf31a4..e248f49d5549 100644
---- a/arch/arm/configs/koelsch_defconfig
-+++ b/arch/arm/configs/koelsch_defconfig
-@@ -31,6 +31,7 @@ CONFIG_NEON=y
- CONFIG_PM_RUNTIME=y
- CONFIG_NET=y
- CONFIG_PACKET=y
-+CONFIG_UNIX=y
- CONFIG_INET=y
- CONFIG_IP_PNP=y
- CONFIG_IP_PNP_DHCP=y
-@@ -66,7 +67,6 @@ CONFIG_NEW_LEDS=y
- CONFIG_LEDS_CLASS=y
- # CONFIG_IOMMU_SUPPORT is not set
- # CONFIG_DNOTIFY is not set
--# CONFIG_INOTIFY_USER is not set
- CONFIG_TMPFS=y
- CONFIG_CONFIGFS_FS=y
- # CONFIG_MISC_FILESYSTEMS is not set
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0222-ARM-shmobile-r8a73a4-add-div6-clocks.patch b/patches.renesas/0222-ARM-shmobile-r8a73a4-add-div6-clocks.patch
deleted file mode 100644
index aea442aed3179..0000000000000
--- a/patches.renesas/0222-ARM-shmobile-r8a73a4-add-div6-clocks.patch
+++ /dev/null
@@ -1,280 +0,0 @@
-From 7f596d8c4af42b10957fab62fb952406cab4fcf6 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Thu, 4 Apr 2013 21:22:41 -0700
-Subject: ARM: shmobile: r8a73a4: add div6 clocks
-
-DIV6 clocks control each core clocks.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 9051e9125bf1088780c84deef6e16cf1c01f035c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r8a73a4.c | 182 +++++++++++++++++++++++++++++----
- 1 file changed, 163 insertions(+), 19 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a73a4.c b/arch/arm/mach-shmobile/clock-r8a73a4.c
-index 147314ac..f6227bb1 100644
---- a/arch/arm/mach-shmobile/clock-r8a73a4.c
-+++ b/arch/arm/mach-shmobile/clock-r8a73a4.c
-@@ -28,19 +28,34 @@
- #define CPG_BASE 0xe6150000
- #define CPG_LEN 0x270
- 
--#define MPCKCR 0xe6150080
- #define SMSTPCR2 0xe6150138
- #define SMSTPCR5 0xe6150144
- 
- #define FRQCRA		0xE6150000
- #define FRQCRB		0xE6150004
--#define CKSCR		0xE61500C0
-+#define VCLKCR1		0xE6150008
-+#define VCLKCR2		0xE615000C
-+#define VCLKCR3		0xE615001C
-+#define VCLKCR4		0xE6150014
-+#define VCLKCR5		0xE6150034
-+#define ZBCKCR		0xE6150010
-+#define SD0CKCR		0xE6150074
-+#define SD1CKCR		0xE6150078
-+#define SD2CKCR		0xE615007C
-+#define MMC0CKCR	0xE6150240
-+#define MMC1CKCR	0xE6150244
-+#define FSIACKCR	0xE6150018
-+#define FSIBCKCR	0xE6150090
-+#define MPCKCR		0xe6150080
-+#define SPUVCKCR	0xE6150094
-+#define HSICKCR		0xE615026C
-+#define M4CKCR		0xE6150098
- #define PLLECR		0xE61500D0
- #define PLL1CR		0xE6150028
- #define PLL2CR		0xE615002C
- #define PLL2SCR		0xE61501F4
- #define PLL2HCR		0xE61501E4
--
-+#define CKSCR		0xE61500C0
- 
- #define CPG_MAP(o) ((o - CPG_BASE) + cpg_mapping.base)
- 
-@@ -81,6 +96,13 @@ SH_FIXED_RATIO_CLK(extal1_div2_clk,	extal1_clk,		div2);
- SH_FIXED_RATIO_CLK(extal2_div2_clk,	extal2_clk,		div2);
- SH_FIXED_RATIO_CLK(extal2_div4_clk,	extal2_clk,		div4);
- 
-+/* External FSIACK/FSIBCK clock */
-+static struct clk fsiack_clk = {
-+};
-+
-+static struct clk fsibck_clk = {
-+};
-+
- /*
-  *		PLL clocks
-  */
-@@ -170,6 +192,8 @@ static struct clk *main_clks[] = {
- 	&extal2_div4_clk,
- 	&main_clk,
- 	&main_div2_clk,
-+	&fsiack_clk,
-+	&fsibck_clk,
- 	&pll1_clk,
- 	&pll1_div2_clk,
- 	&pll2_clk,
-@@ -216,6 +240,111 @@ static struct clk div4_clks[DIV4_NR] = {
- 	[DIV4_HP]	= SH_CLK_DIV4(&pll1_clk, FRQCRB,  4, 0x0dff, 0),
- };
- 
-+enum {
-+	DIV6_ZB,
-+	DIV6_SDHI0, DIV6_SDHI1, DIV6_SDHI2,
-+	DIV6_MMC0, DIV6_MMC1,
-+	DIV6_VCK1, DIV6_VCK2, DIV6_VCK3, DIV6_VCK4, DIV6_VCK5,
-+	DIV6_FSIA, DIV6_FSIB,
-+	DIV6_MP, DIV6_M4, DIV6_HSI, DIV6_SPUV,
-+	DIV6_NR };
-+
-+static struct clk *div6_parents[8] = {
-+	[0] = &pll1_div2_clk,
-+	[1] = &pll2s_clk,
-+	[3] = &extal2_clk,
-+	[4] = &main_div2_clk,
-+	[6] = &extalr_clk,
-+};
-+
-+static struct clk *fsia_parents[4] = {
-+	[0] = &pll1_div2_clk,
-+	[1] = &pll2s_clk,
-+	[2] = &fsiack_clk,
-+};
-+
-+static struct clk *fsib_parents[4] = {
-+	[0] = &pll1_div2_clk,
-+	[1] = &pll2s_clk,
-+	[2] = &fsibck_clk,
-+};
-+
-+static struct clk *mp_parents[4] = {
-+	[0] = &pll1_div2_clk,
-+	[1] = &pll2s_clk,
-+	[2] = &extal2_clk,
-+	[3] = &extal2_clk,
-+};
-+
-+static struct clk *m4_parents[2] = {
-+	[0] = &pll2s_clk,
-+};
-+
-+static struct clk *hsi_parents[4] = {
-+	[0] = &pll2h_clk,
-+	[1] = &pll1_div2_clk,
-+	[3] = &pll2s_clk,
-+};
-+
-+/*** FIXME ***
-+ * SH_CLK_DIV6_EXT() macro doesn't care .mapping
-+ * but, it is necessary on R-Car (= ioremap() base CPG)
-+ * The difference between
-+ * SH_CLK_DIV6_EXT() <--> SH_CLK_MAP_DIV6_EXT()
-+ * is only .mapping
-+ */
-+#define SH_CLK_MAP_DIV6_EXT(_reg, _flags, _parents,			\
-+			    _num_parents, _src_shift, _src_width)	\
-+{									\
-+	.enable_reg	= (void __iomem *)_reg,				\
-+	.enable_bit	= 0, /* unused */				\
-+	.flags		= _flags | CLK_MASK_DIV_ON_DISABLE,		\
-+	.div_mask	= SH_CLK_DIV6_MSK,				\
-+	.parent_table	= _parents,					\
-+	.parent_num	= _num_parents,					\
-+	.src_shift	= _src_shift,					\
-+	.src_width	= _src_width,					\
-+	.mapping	= &cpg_mapping,					\
-+}
-+
-+static struct clk div6_clks[DIV6_NR] = {
-+	[DIV6_ZB] = SH_CLK_MAP_DIV6_EXT(ZBCKCR, CLK_ENABLE_ON_INIT,
-+				div6_parents, 2, 7, 1),
-+	[DIV6_SDHI0] = SH_CLK_MAP_DIV6_EXT(SD0CKCR, 0,
-+				div6_parents, 2, 6, 2),
-+	[DIV6_SDHI1] = SH_CLK_MAP_DIV6_EXT(SD1CKCR, 0,
-+				div6_parents, 2, 6, 2),
-+	[DIV6_SDHI2] = SH_CLK_MAP_DIV6_EXT(SD2CKCR, 0,
-+				div6_parents, 2, 6, 2),
-+	[DIV6_MMC0] = SH_CLK_MAP_DIV6_EXT(MMC0CKCR, 0,
-+				div6_parents, 2, 6, 2),
-+	[DIV6_MMC1] = SH_CLK_MAP_DIV6_EXT(MMC1CKCR, 0,
-+				div6_parents, 2, 6, 2),
-+	[DIV6_VCK1] = SH_CLK_MAP_DIV6_EXT(VCLKCR1, 0, /* didn't care bit[6-7] */
-+				div6_parents, ARRAY_SIZE(div6_parents), 12, 3),
-+	[DIV6_VCK2] = SH_CLK_MAP_DIV6_EXT(VCLKCR2, 0, /* didn't care bit[6-7] */
-+				div6_parents, ARRAY_SIZE(div6_parents), 12, 3),
-+	[DIV6_VCK3] = SH_CLK_MAP_DIV6_EXT(VCLKCR3, 0, /* didn't care bit[6-7] */
-+				div6_parents, ARRAY_SIZE(div6_parents), 12, 3),
-+	[DIV6_VCK4] = SH_CLK_MAP_DIV6_EXT(VCLKCR4, 0, /* didn't care bit[6-7] */
-+				div6_parents, ARRAY_SIZE(div6_parents), 12, 3),
-+	[DIV6_VCK5] = SH_CLK_MAP_DIV6_EXT(VCLKCR5, 0, /* didn't care bit[6-7] */
-+				div6_parents, ARRAY_SIZE(div6_parents), 12, 3),
-+	[DIV6_FSIA] = SH_CLK_MAP_DIV6_EXT(FSIACKCR, 0,
-+				fsia_parents, ARRAY_SIZE(fsia_parents), 6, 2),
-+	[DIV6_FSIB] = SH_CLK_MAP_DIV6_EXT(FSIBCKCR, 0,
-+				fsib_parents, ARRAY_SIZE(fsib_parents), 6, 2),
-+	[DIV6_MP] = SH_CLK_MAP_DIV6_EXT(MPCKCR, 0, /* it needs bit[9-11] control */
-+				mp_parents, ARRAY_SIZE(mp_parents), 6, 2),
-+	/* pll2s will be selected always for M4 */
-+	[DIV6_M4] = SH_CLK_MAP_DIV6_EXT(M4CKCR, 0, /* it needs bit[9] control */
-+				m4_parents, ARRAY_SIZE(m4_parents), 6, 1),
-+	[DIV6_HSI] = SH_CLK_MAP_DIV6_EXT(HSICKCR, 0, /* it needs bit[9] control */
-+				hsi_parents, ARRAY_SIZE(hsi_parents), 6, 2),
-+	[DIV6_SPUV] = SH_CLK_MAP_DIV6_EXT(SPUVCKCR, 0,
-+				mp_parents, ARRAY_SIZE(mp_parents), 6, 2),
-+};
-+
- /* MSTP */
- enum {
- 	MSTP217, MSTP216, MSTP207, MSTP206, MSTP204, MSTP203,
-@@ -224,12 +353,12 @@ enum {
- };
- 
- static struct clk mstp_clks[MSTP_NR] = {
--	[MSTP204] = SH_CLK_MSTP32(&extal2_clk, SMSTPCR2, 4, 0), /* SCIFA0 */
--	[MSTP203] = SH_CLK_MSTP32(&extal2_clk, SMSTPCR2, 3, 0), /* SCIFA1 */
--	[MSTP206] = SH_CLK_MSTP32(&extal2_clk, SMSTPCR2, 6, 0), /* SCIFB0 */
--	[MSTP207] = SH_CLK_MSTP32(&extal2_clk, SMSTPCR2, 7, 0), /* SCIFB1 */
--	[MSTP216] = SH_CLK_MSTP32(&extal2_clk, SMSTPCR2, 16, 0), /* SCIFB2 */
--	[MSTP217] = SH_CLK_MSTP32(&extal2_clk, SMSTPCR2, 17, 0), /* SCIFB3 */
-+	[MSTP204] = SH_CLK_MSTP32(&div6_clks[DIV6_MP],	SMSTPCR2, 4, 0), /* SCIFA0 */
-+	[MSTP203] = SH_CLK_MSTP32(&div6_clks[DIV6_MP],	SMSTPCR2, 3, 0), /* SCIFA1 */
-+	[MSTP206] = SH_CLK_MSTP32(&div6_clks[DIV6_MP],	SMSTPCR2, 6, 0), /* SCIFB0 */
-+	[MSTP207] = SH_CLK_MSTP32(&div6_clks[DIV6_MP],	SMSTPCR2, 7, 0), /* SCIFB1 */
-+	[MSTP216] = SH_CLK_MSTP32(&div6_clks[DIV6_MP],	SMSTPCR2, 16, 0), /* SCIFB2 */
-+	[MSTP217] = SH_CLK_MSTP32(&div6_clks[DIV6_MP],	SMSTPCR2, 17, 0), /* SCIFB3 */
- 	[MSTP522] = SH_CLK_MSTP32(&extal2_clk, SMSTPCR5, 22, 0), /* Thermal */
- };
- 
-@@ -240,6 +369,8 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_CON_ID("extal2",			&extal2_clk),
- 	CLKDEV_CON_ID("extal2_div2",		&extal2_div2_clk),
- 	CLKDEV_CON_ID("extal2_div4",		&extal2_div4_clk),
-+	CLKDEV_CON_ID("fsiack",			&fsiack_clk),
-+	CLKDEV_CON_ID("fsibck",			&fsibck_clk),
- 
- 	/* pll clock */
- 	CLKDEV_CON_ID("pll1",			&pll1_clk),
-@@ -248,6 +379,25 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_CON_ID("pll2s",			&pll2s_clk),
- 	CLKDEV_CON_ID("pll2h",			&pll2h_clk),
- 
-+	/* DIV6 */
-+	CLKDEV_CON_ID("zb",			&div6_clks[DIV6_ZB]),
-+	CLKDEV_CON_ID("sdhi0",			&div6_clks[DIV6_SDHI0]),
-+	CLKDEV_CON_ID("sdhi1",			&div6_clks[DIV6_SDHI1]),
-+	CLKDEV_CON_ID("sdhi2",			&div6_clks[DIV6_SDHI2]),
-+	CLKDEV_CON_ID("mmc0",			&div6_clks[DIV6_MMC0]),
-+	CLKDEV_CON_ID("mmc1",			&div6_clks[DIV6_MMC1]),
-+	CLKDEV_CON_ID("vck1",			&div6_clks[DIV6_VCK1]),
-+	CLKDEV_CON_ID("vck2",			&div6_clks[DIV6_VCK2]),
-+	CLKDEV_CON_ID("vck3",			&div6_clks[DIV6_VCK3]),
-+	CLKDEV_CON_ID("vck4",			&div6_clks[DIV6_VCK4]),
-+	CLKDEV_CON_ID("vck5",			&div6_clks[DIV6_VCK5]),
-+	CLKDEV_CON_ID("fsia",			&div6_clks[DIV6_FSIA]),
-+	CLKDEV_CON_ID("fsib",			&div6_clks[DIV6_FSIB]),
-+	CLKDEV_CON_ID("mp",			&div6_clks[DIV6_MP]),
-+	CLKDEV_CON_ID("m4",			&div6_clks[DIV6_M4]),
-+	CLKDEV_CON_ID("hsi",			&div6_clks[DIV6_HSI]),
-+	CLKDEV_CON_ID("spuv",			&div6_clks[DIV6_SPUV]),
-+
- 	/* MSTP */
- 	CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]),
- 	CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP203]),
-@@ -263,19 +413,10 @@ static struct clk_lookup lookups[] = {
- 
- void __init r8a73a4_clock_init(void)
- {
--	void __iomem *cpg_base, *reg;
-+	void __iomem *reg;
- 	int k, ret = 0;
- 	u32 ckscr;
- 
--	/* fix MPCLK to EXTAL2 for now.
--	 * this is needed until more detailed clock topology is supported
--	 */
--	cpg_base = ioremap_nocache(CPG_BASE, CPG_LEN);
--	BUG_ON(!cpg_base);
--	reg = cpg_base + (MPCKCR - CPG_BASE);
--	iowrite32(ioread32(reg) | 1 << 7 | 0x0c, reg); /* set CKSEL */
--	iounmap(cpg_base);
--
- 	reg = ioremap_nocache(CKSCR, PAGE_SIZE);
- 	BUG_ON(!reg);
- 	ckscr = ioread32(reg);
-@@ -303,6 +444,9 @@ void __init r8a73a4_clock_init(void)
- 		ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table);
- 
- 	if (!ret)
-+		ret = sh_clk_div6_reparent_register(div6_clks, DIV6_NR);
-+
-+	if (!ret)
- 		ret = sh_clk_mstp_register(mstp_clks, MSTP_NR);
- 
- 	clkdev_add_table(lookups, ARRAY_SIZE(lookups));
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0223-ARM-shmobile-bockw-fixup-DMA-mask.patch b/patches.renesas/0223-ARM-shmobile-bockw-fixup-DMA-mask.patch
deleted file mode 100644
index 88f7bdfa8a093..0000000000000
--- a/patches.renesas/0223-ARM-shmobile-bockw-fixup-DMA-mask.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From 1bed9104a4d1dd7376f2503ba6cd9df8ce11c2b8 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Mon, 16 Dec 2013 00:16:52 -0800
-Subject: ARM: shmobile: bockw: fixup DMA mask
-
-4dcfa60071b3d23f0181f27d8519f12e37cefbb9
-(ARM: DMA-API: better handing of DMA masks for coherent allocations)
-exchanged DMA mask check method.
-Below warning will appear without this patch
-
-asoc-simple-card asoc-simple-card.0: \
-  Coherent DMA mask 0xffffffffffffffff is larger than dma_addr_t allows
-asoc-simple-card asoc-simple-card.0: \
-  Driver did not use or check the return value from dma_set_coherent_mask()?
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 4799e310caf0fb9078389766d0210d1c6133ad51)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-bockw.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/board-bockw.c b/arch/arm/mach-shmobile/board-bockw.c
-index afb3f6869017..c475220545f2 100644
---- a/arch/arm/mach-shmobile/board-bockw.c
-+++ b/arch/arm/mach-shmobile/board-bockw.c
-@@ -685,7 +685,7 @@ static void __init bockw_init(void)
- 			.id             = i,
- 			.data           = &rsnd_card_info[i],
- 			.size_data      = sizeof(struct asoc_simple_card_info),
--			.dma_mask       = ~0,
-+			.dma_mask	= DMA_BIT_MASK(32),
- 		};
- 
- 		platform_device_register_full(&cardinfo);
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0223-ARM-shmobile-r8a7779-Add-PCIe-clocks.patch b/patches.renesas/0223-ARM-shmobile-r8a7779-Add-PCIe-clocks.patch
deleted file mode 100644
index c53bd2e07f07b..0000000000000
--- a/patches.renesas/0223-ARM-shmobile-r8a7779-Add-PCIe-clocks.patch
+++ /dev/null
@@ -1,45 +0,0 @@
-From 0ea5997ae51bd78f955019c64b3481f366609a85 Mon Sep 17 00:00:00 2001
-From: Phil Edworthy <Phil.Edworthy@renesas.com>
-Date: Tue, 9 Apr 2013 14:35:15 +0000
-Subject: ARM: shmobile: r8a7779: Add PCIe clocks
-
-Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 0f704e1285100452ad8b02a1658fe723bc93aeee)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r8a7779.c | 4 +++-
- 1 file changed, 3 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a7779.c b/arch/arm/mach-shmobile/clock-r8a7779.c
-index 31d5cd4d..9daeb8c3 100644
---- a/arch/arm/mach-shmobile/clock-r8a7779.c
-+++ b/arch/arm/mach-shmobile/clock-r8a7779.c
-@@ -112,7 +112,7 @@ static struct clk *main_clks[] = {
- };
- 
- enum { MSTP323, MSTP322, MSTP321, MSTP320,
--	MSTP115, MSTP114,
-+	MSTP116, MSTP115, MSTP114,
- 	MSTP103, MSTP101, MSTP100,
- 	MSTP030,
- 	MSTP029, MSTP028, MSTP027, MSTP026, MSTP025, MSTP024, MSTP023, MSTP022, MSTP021,
-@@ -125,6 +125,7 @@ static struct clk mstp_clks[MSTP_NR] = {
- 	[MSTP322] = SH_CLK_MSTP32(&clkp_clk, MSTPCR3, 22, 0), /* SDHI1 */
- 	[MSTP321] = SH_CLK_MSTP32(&clkp_clk, MSTPCR3, 21, 0), /* SDHI2 */
- 	[MSTP320] = SH_CLK_MSTP32(&clkp_clk, MSTPCR3, 20, 0), /* SDHI3 */
-+	[MSTP116] = SH_CLK_MSTP32(&clkp_clk, MSTPCR1, 16, 0), /* PCIe */
- 	[MSTP115] = SH_CLK_MSTP32(&clkp_clk, MSTPCR1, 15, 0), /* SATA */
- 	[MSTP114] = SH_CLK_MSTP32(&clkp_clk, MSTPCR1, 14, 0), /* Ether */
- 	[MSTP103] = SH_CLK_MSTP32(&clks_clk, MSTPCR1,  3, 0), /* DU */
-@@ -161,6 +162,7 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_CON_ID("peripheral_clk",	&clkp_clk),
- 
- 	/* MSTP32 clocks */
-+	CLKDEV_DEV_ID("rcar-pcie", &mstp_clks[MSTP116]), /* PCIe */
- 	CLKDEV_DEV_ID("sata_rcar", &mstp_clks[MSTP115]), /* SATA */
- 	CLKDEV_DEV_ID("fc600000.sata", &mstp_clks[MSTP115]), /* SATA w/DT */
- 	CLKDEV_DEV_ID("sh-eth", &mstp_clks[MSTP114]), /* Ether */
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0224-ARM-shmobile-r8a7778-use-fixed-ratio-clock.patch b/patches.renesas/0224-ARM-shmobile-r8a7778-use-fixed-ratio-clock.patch
deleted file mode 100644
index 233c9667b94a1..0000000000000
--- a/patches.renesas/0224-ARM-shmobile-r8a7778-use-fixed-ratio-clock.patch
+++ /dev/null
@@ -1,222 +0,0 @@
-From fa94cef471c81d347a0ab60f7faac26ad37c99f9 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Fri, 12 Apr 2013 01:13:14 -0700
-Subject: ARM: shmobile: r8a7778: use fixed ratio clock
-
-R-Car M1 has many clocks, and it is possible to
-read/use clock ratio of these clocks from FRQMRx.
-But, these ratio are fixed value and
-these are decided by MD pin status.
-
-This patch reads MD pin status,
-and used fixed ratio clock for other clocks.
-It was tesed on bock-w board.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 08b93ec126ffc0b810ac615729e14c4a3571b9c8)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r8a7778.c | 149 ++++++++++++++++++++++++++++++---
- 1 file changed, 136 insertions(+), 13 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a7778.c b/arch/arm/mach-shmobile/clock-r8a7778.c
-index cd685529..5cc271ec 100644
---- a/arch/arm/mach-shmobile/clock-r8a7778.c
-+++ b/arch/arm/mach-shmobile/clock-r8a7778.c
-@@ -23,9 +23,23 @@
-  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
-  */
- 
-+/*
-+ *     MD      MD      MD      MD       PLLA   PLLB    EXTAL   clki    clkz
-+ *     19      18      12      11                      (HMz)   (MHz)   (MHz)
-+ *----------------------------------------------------------------------------
-+ *     1       0       0       0       x21     x21     38.00   800     800
-+ *     1       0       0       1       x24     x24     33.33   800     800
-+ *     1       0       1       0       x28     x28     28.50   800     800
-+ *     1       0       1       1       x32     x32     25.00   800     800
-+ *     1       1       0       1       x24     x21     33.33   800     700
-+ *     1       1       1       0       x28     x21     28.50   800     600
-+ *     1       1       1       1       x32     x24     25.00   800     600
-+ */
-+
- #include <linux/io.h>
- #include <linux/sh_clk.h>
- #include <linux/clkdev.h>
-+#include <mach/clock.h>
- #include <mach/common.h>
- 
- #define MSTPCR0		IOMEM(0xffc80030)
-@@ -37,6 +51,9 @@
- #define MSTPCR4		IOMEM(0xffc80050)
- #define MSTPCR5		IOMEM(0xffc80054)
- #define MSTPCR6		IOMEM(0xffc80058)
-+#define MODEMR		0xFFCC0020
-+
-+#define MD(nr)	BIT(nr)
- 
- /* ioremap() through clock mapping mandatory to avoid
-  * collision with ARM coherent DMA virtual memory range.
-@@ -47,14 +64,42 @@ static struct clk_mapping cpg_mapping = {
- 	.len	= 0x80,
- };
- 
--static struct clk clkp = {
--	.rate   = 62500000, /* FIXME: shortcut */
--	.flags  = CLK_ENABLE_ON_INIT,
-+static struct clk extal_clk = {
-+	/* .rate will be updated on r8a7778_clock_init() */
- 	.mapping = &cpg_mapping,
- };
- 
-+/*
-+ * clock ratio of these clock will be updated
-+ * on r8a7778_clock_init()
-+ */
-+SH_FIXED_RATIO_CLK_SET(plla_clk,	extal_clk, 1, 1);
-+SH_FIXED_RATIO_CLK_SET(pllb_clk,	extal_clk, 1, 1);
-+SH_FIXED_RATIO_CLK_SET(i_clk,		plla_clk,  1, 1);
-+SH_FIXED_RATIO_CLK_SET(s_clk,		plla_clk,  1, 1);
-+SH_FIXED_RATIO_CLK_SET(s1_clk,		plla_clk,  1, 1);
-+SH_FIXED_RATIO_CLK_SET(s3_clk,		plla_clk,  1, 1);
-+SH_FIXED_RATIO_CLK_SET(s4_clk,		plla_clk,  1, 1);
-+SH_FIXED_RATIO_CLK_SET(b_clk,		plla_clk,  1, 1);
-+SH_FIXED_RATIO_CLK_SET(out_clk,		plla_clk,  1, 1);
-+SH_FIXED_RATIO_CLK_SET(p_clk,		plla_clk,  1, 1);
-+SH_FIXED_RATIO_CLK_SET(g_clk,		plla_clk,  1, 1);
-+SH_FIXED_RATIO_CLK_SET(z_clk,		pllb_clk,  1, 1);
-+
- static struct clk *main_clks[] = {
--	&clkp,
-+	&extal_clk,
-+	&plla_clk,
-+	&pllb_clk,
-+	&i_clk,
-+	&s_clk,
-+	&s1_clk,
-+	&s3_clk,
-+	&s4_clk,
-+	&b_clk,
-+	&out_clk,
-+	&p_clk,
-+	&g_clk,
-+	&z_clk,
- };
- 
- enum {
-@@ -64,15 +109,15 @@ enum {
- 	MSTP_NR };
- 
- static struct clk mstp_clks[MSTP_NR] = {
--	[MSTP114] = SH_CLK_MSTP32(&clkp, MSTPCR1, 14, 0), /* Ether */
--	[MSTP026] = SH_CLK_MSTP32(&clkp, MSTPCR0, 26, 0), /* SCIF0 */
--	[MSTP025] = SH_CLK_MSTP32(&clkp, MSTPCR0, 25, 0), /* SCIF1 */
--	[MSTP024] = SH_CLK_MSTP32(&clkp, MSTPCR0, 24, 0), /* SCIF2 */
--	[MSTP023] = SH_CLK_MSTP32(&clkp, MSTPCR0, 23, 0), /* SCIF3 */
--	[MSTP022] = SH_CLK_MSTP32(&clkp, MSTPCR0, 22, 0), /* SCIF4 */
--	[MSTP021] = SH_CLK_MSTP32(&clkp, MSTPCR0, 21, 0), /* SCIF5 */
--	[MSTP016] = SH_CLK_MSTP32(&clkp, MSTPCR0, 16, 0), /* TMU0 */
--	[MSTP015] = SH_CLK_MSTP32(&clkp, MSTPCR0, 15, 0), /* TMU1 */
-+	[MSTP114] = SH_CLK_MSTP32(&p_clk, MSTPCR1, 14, 0), /* Ether */
-+	[MSTP026] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 26, 0), /* SCIF0 */
-+	[MSTP025] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 25, 0), /* SCIF1 */
-+	[MSTP024] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 24, 0), /* SCIF2 */
-+	[MSTP023] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 23, 0), /* SCIF3 */
-+	[MSTP022] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 22, 0), /* SCIF4 */
-+	[MSTP021] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 21, 0), /* SCIF5 */
-+	[MSTP016] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 16, 0), /* TMU0 */
-+	[MSTP015] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 15, 0), /* TMU1 */
- };
- 
- static struct clk_lookup lookups[] = {
-@@ -90,8 +135,86 @@ static struct clk_lookup lookups[] = {
- 
- void __init r8a7778_clock_init(void)
- {
-+	void __iomem *modemr = ioremap_nocache(MODEMR, PAGE_SIZE);
-+	u32 mode;
- 	int k, ret = 0;
- 
-+	BUG_ON(!modemr);
-+	mode = ioread32(modemr);
-+	iounmap(modemr);
-+
-+	switch (mode & (MD(19) | MD(18) | MD(12) | MD(11))) {
-+	case MD(19):
-+		extal_clk.rate = 38000000;
-+		SH_CLK_SET_RATIO(&plla_clk_ratio,	21, 1);
-+		SH_CLK_SET_RATIO(&pllb_clk_ratio,	21, 1);
-+		break;
-+	case MD(19) | MD(11):
-+		extal_clk.rate = 33333333;
-+		SH_CLK_SET_RATIO(&plla_clk_ratio,	24, 1);
-+		SH_CLK_SET_RATIO(&pllb_clk_ratio,	24, 1);
-+		break;
-+	case MD(19) | MD(12):
-+		extal_clk.rate = 28500000;
-+		SH_CLK_SET_RATIO(&plla_clk_ratio,	28, 1);
-+		SH_CLK_SET_RATIO(&pllb_clk_ratio,	28, 1);
-+		break;
-+	case MD(19) | MD(12) | MD(11):
-+		extal_clk.rate = 25000000;
-+		SH_CLK_SET_RATIO(&plla_clk_ratio,	32, 1);
-+		SH_CLK_SET_RATIO(&pllb_clk_ratio,	32, 1);
-+		break;
-+	case MD(19) | MD(18) | MD(11):
-+		extal_clk.rate = 33333333;
-+		SH_CLK_SET_RATIO(&plla_clk_ratio,	24, 1);
-+		SH_CLK_SET_RATIO(&pllb_clk_ratio,	21, 1);
-+		break;
-+	case MD(19) | MD(18) | MD(12):
-+		extal_clk.rate = 28500000;
-+		SH_CLK_SET_RATIO(&plla_clk_ratio,	28, 1);
-+		SH_CLK_SET_RATIO(&pllb_clk_ratio,	21, 1);
-+		break;
-+	case MD(19) | MD(18) | MD(12) | MD(11):
-+		extal_clk.rate = 25000000;
-+		SH_CLK_SET_RATIO(&plla_clk_ratio,	32, 1);
-+		SH_CLK_SET_RATIO(&pllb_clk_ratio,	24, 1);
-+		break;
-+	default:
-+		BUG();
-+	}
-+
-+	if (mode & MD(1)) {
-+		SH_CLK_SET_RATIO(&i_clk_ratio,	1, 1);
-+		SH_CLK_SET_RATIO(&s_clk_ratio,	1, 3);
-+		SH_CLK_SET_RATIO(&s1_clk_ratio,	1, 6);
-+		SH_CLK_SET_RATIO(&s3_clk_ratio,	1, 4);
-+		SH_CLK_SET_RATIO(&s4_clk_ratio,	1, 8);
-+		SH_CLK_SET_RATIO(&p_clk_ratio,	1, 12);
-+		SH_CLK_SET_RATIO(&g_clk_ratio,	1, 12);
-+		if (mode & MD(2)) {
-+			SH_CLK_SET_RATIO(&b_clk_ratio,		1, 18);
-+			SH_CLK_SET_RATIO(&out_clk_ratio,	1, 18);
-+		} else {
-+			SH_CLK_SET_RATIO(&b_clk_ratio,		1, 12);
-+			SH_CLK_SET_RATIO(&out_clk_ratio,	1, 12);
-+		}
-+	} else {
-+		SH_CLK_SET_RATIO(&i_clk_ratio,	1, 1);
-+		SH_CLK_SET_RATIO(&s_clk_ratio,	1, 4);
-+		SH_CLK_SET_RATIO(&s1_clk_ratio,	1, 8);
-+		SH_CLK_SET_RATIO(&s3_clk_ratio,	1, 4);
-+		SH_CLK_SET_RATIO(&s4_clk_ratio,	1, 8);
-+		SH_CLK_SET_RATIO(&p_clk_ratio,	1, 16);
-+		SH_CLK_SET_RATIO(&g_clk_ratio,	1, 12);
-+		if (mode & MD(2)) {
-+			SH_CLK_SET_RATIO(&b_clk_ratio,		1, 16);
-+			SH_CLK_SET_RATIO(&out_clk_ratio,	1, 16);
-+		} else {
-+			SH_CLK_SET_RATIO(&b_clk_ratio,		1, 12);
-+			SH_CLK_SET_RATIO(&out_clk_ratio,	1, 12);
-+		}
-+	}
-+
- 	for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++)
- 		ret = clk_register(main_clks[k]);
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0224-ARM-shmobile-r8a7790-fix-shdi-resource-sizes.patch b/patches.renesas/0224-ARM-shmobile-r8a7790-fix-shdi-resource-sizes.patch
deleted file mode 100644
index bf19787352eae..0000000000000
--- a/patches.renesas/0224-ARM-shmobile-r8a7790-fix-shdi-resource-sizes.patch
+++ /dev/null
@@ -1,53 +0,0 @@
-From 61b695b5f120bf2c75af557e40ccc6352ad89266 Mon Sep 17 00:00:00 2001
-From: Ben Dooks <ben.dooks@codethink.co.uk>
-Date: Mon, 16 Dec 2013 12:38:48 +0000
-Subject: ARM: shmobile: r8a7790: fix shdi resource sizes
-
-The r8a7790.dtsi file has four sdhi nodes which the first two have the wrong
-resource size for their register block. This causes the sh_modbile_sdhi driver
-to fail to communicate with card at-all.
-
-Change sdhi{0,1} node size from 0x100 to 0x200 to correct these nodes
-as per Kuninori Morimoto's response to the original patch where all four
-nodes where changed. sdhi{2,3} are the correct size.
-
-This bug has been present since sdhi resources were added to the r8a7790 by
-8c9b1aa41853272a ("ARM: shmobile: r8a7790: add MMCIF and SDHI DT
-templates") in v3.11-rc2.
-
-Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
-Tested-by: William Towle <william.towle@codethink.co.uk>
-Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit d721a15c300c5f638a11573a6dd492158e737d6a)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7790.dtsi | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
-index 68b7b87e535f..c6001032d9a7 100644
---- a/arch/arm/boot/dts/r8a7790.dtsi
-+++ b/arch/arm/boot/dts/r8a7790.dtsi
-@@ -254,7 +254,7 @@
- 
- 	sdhi0: sd@ee100000 {
- 		compatible = "renesas,sdhi-r8a7790";
--		reg = <0 0xee100000 0 0x100>;
-+		reg = <0 0xee100000 0 0x200>;
- 		interrupt-parent = <&gic>;
- 		interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>;
- 		cap-sd-highspeed;
-@@ -263,7 +263,7 @@
- 
- 	sdhi1: sd@ee120000 {
- 		compatible = "renesas,sdhi-r8a7790";
--		reg = <0 0xee120000 0 0x100>;
-+		reg = <0 0xee120000 0 0x200>;
- 		interrupt-parent = <&gic>;
- 		interrupts = <0 166 IRQ_TYPE_LEVEL_HIGH>;
- 		cap-sd-highspeed;
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0224-usb-renesas_usbhs-gadget-remove-extra-check-on-udc_s.patch b/patches.renesas/0224-usb-renesas_usbhs-gadget-remove-extra-check-on-udc_s.patch
deleted file mode 100644
index a4b95213b0951..0000000000000
--- a/patches.renesas/0224-usb-renesas_usbhs-gadget-remove-extra-check-on-udc_s.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From fa802a7504fa543f2ea9c379fd9cc8282bd3a950 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Mon, 8 Jul 2013 22:47:37 -0700
-Subject: usb: renesas_usbhs: gadget: remove extra check on udc_stop
-
-usb_gadget_ops :: udc_stop might be called with driver = NULL since
-511f3c5326eabe1ece35202a404c24c0aeacc246
-(usb: gadget: udc-core: fix a regression during gadget driver unbinding)
-
-Because of that, 2nd times insmod goes fail.
-This patch fixes it up.
-
-Reported-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Felipe Balbi <balbi@ti.com>
-(cherry picked from commit 8047806e64ea7b33fcede5b93f7276568a6119e8)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/renesas_usbhs/mod_gadget.c | 4 ----
- 1 file changed, 4 deletions(-)
-
-diff --git a/drivers/usb/renesas_usbhs/mod_gadget.c b/drivers/usb/renesas_usbhs/mod_gadget.c
-index ed4949faa70d..805940c37353 100644
---- a/drivers/usb/renesas_usbhs/mod_gadget.c
-+++ b/drivers/usb/renesas_usbhs/mod_gadget.c
-@@ -855,10 +855,6 @@ static int usbhsg_gadget_stop(struct usb_gadget *gadget,
- 	struct usbhsg_gpriv *gpriv = usbhsg_gadget_to_gpriv(gadget);
- 	struct usbhs_priv *priv = usbhsg_gpriv_to_priv(gpriv);
- 
--	if (!driver		||
--	    !driver->unbind)
--		return -EINVAL;
--
- 	usbhsg_try_stop(priv, USBHSG_STATUS_REGISTERD);
- 	gpriv->driver = NULL;
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0225-ARM-shmobile-r8a7778-add-SDHI-clock-support.patch b/patches.renesas/0225-ARM-shmobile-r8a7778-add-SDHI-clock-support.patch
deleted file mode 100644
index 7db55d6dbd11d..0000000000000
--- a/patches.renesas/0225-ARM-shmobile-r8a7778-add-SDHI-clock-support.patch
+++ /dev/null
@@ -1,47 +0,0 @@
-From 8b3f6d83c54dcce79b0c27685a36c27c423233a0 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Tue, 16 Apr 2013 22:17:04 -0700
-Subject: ARM: shmobile: r8a7778: add SDHI clock support
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 1189b1cb50a0f9e039594ccd504f7de641e30bdf)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r8a7778.c | 7 +++++++
- 1 file changed, 7 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a7778.c b/arch/arm/mach-shmobile/clock-r8a7778.c
-index 5cc271ec..b251e4d0 100644
---- a/arch/arm/mach-shmobile/clock-r8a7778.c
-+++ b/arch/arm/mach-shmobile/clock-r8a7778.c
-@@ -103,12 +103,16 @@ static struct clk *main_clks[] = {
- };
- 
- enum {
-+	MSTP323, MSTP322, MSTP321,
- 	MSTP114,
- 	MSTP026, MSTP025, MSTP024, MSTP023, MSTP022, MSTP021,
- 	MSTP016, MSTP015,
- 	MSTP_NR };
- 
- static struct clk mstp_clks[MSTP_NR] = {
-+	[MSTP323] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 23, 0), /* SDHI0 */
-+	[MSTP322] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 22, 0), /* SDHI1 */
-+	[MSTP321] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 21, 0), /* SDHI2 */
- 	[MSTP114] = SH_CLK_MSTP32(&p_clk, MSTPCR1, 14, 0), /* Ether */
- 	[MSTP026] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 26, 0), /* SCIF0 */
- 	[MSTP025] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 25, 0), /* SCIF1 */
-@@ -122,6 +126,9 @@ static struct clk mstp_clks[MSTP_NR] = {
- 
- static struct clk_lookup lookups[] = {
- 	/* MSTP32 clocks */
-+	CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP323]), /* SDHI0 */
-+	CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP322]), /* SDHI1 */
-+	CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP321]), /* SDHI2 */
- 	CLKDEV_DEV_ID("sh-eth",	&mstp_clks[MSTP114]), /* Ether */
- 	CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP026]), /* SCIF0 */
- 	CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP025]), /* SCIF1 */
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0225-arm-shmobile-clks-remove-duplicated-clock-from-r7s72.patch b/patches.renesas/0225-arm-shmobile-clks-remove-duplicated-clock-from-r7s72.patch
deleted file mode 100644
index 5e60bc16049e0..0000000000000
--- a/patches.renesas/0225-arm-shmobile-clks-remove-duplicated-clock-from-r7s72.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From 8084952c6b958fdeea0080734456dc240e8c66e5 Mon Sep 17 00:00:00 2001
-From: Wolfram Sang <wsa@the-dreams.de>
-Date: Wed, 18 Dec 2013 22:48:37 +0100
-Subject: arm: shmobile: clks: remove duplicated clock from r7s72100
-
-Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 250d829f68ecb5e775a99deb03c56832acec28f4)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r7s72100.c | 1 -
- 1 file changed, 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/clock-r7s72100.c b/arch/arm/mach-shmobile/clock-r7s72100.c
-index 7b457aed8253..0814a508fd61 100644
---- a/arch/arm/mach-shmobile/clock-r7s72100.c
-+++ b/arch/arm/mach-shmobile/clock-r7s72100.c
-@@ -181,7 +181,6 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_ICK_ID("sci_fck", "sh-sci.5", &mstp_clks[MSTP42]),
- 	CLKDEV_ICK_ID("sci_fck", "sh-sci.6", &mstp_clks[MSTP41]),
- 	CLKDEV_ICK_ID("sci_fck", "sh-sci.7", &mstp_clks[MSTP40]),
--	CLKDEV_CON_ID("mtu2_fck", &mstp_clks[MSTP33]),
- };
- 
- void __init r7s72100_clock_init(void)
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0225-usb-renesas_usbhs-tidyup-original-usbhsx_for_each_xx.patch b/patches.renesas/0225-usb-renesas_usbhs-tidyup-original-usbhsx_for_each_xx.patch
deleted file mode 100644
index 1d262fa2fd86d..0000000000000
--- a/patches.renesas/0225-usb-renesas_usbhs-tidyup-original-usbhsx_for_each_xx.patch
+++ /dev/null
@@ -1,77 +0,0 @@
-From 75873b83413b95a2de7e6362323dacdd062630f7 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Thu, 11 Jul 2013 22:32:31 -0700
-Subject: usb: renesas_usbhs: tidyup original usbhsx_for_each_xxx macro
-
-Current usbhsx_for_each_xxx macro will read out-of-array's
-memory after last loop operation.
-It was not good C language operation, and the binary which was
-compiled by (at least) gcc 4.8.1 is broken
-This patch tidyup these issues
-
-Reported-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
-Reviewed-by: Takashi Yoshii <takashi.yoshii.zj@renesas.com>
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Felipe Balbi <balbi@ti.com>
-(cherry picked from commit 925403f425a4a9c503f2fc295652647b1eb10d82)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/renesas_usbhs/mod_gadget.c | 6 +++---
- drivers/usb/renesas_usbhs/mod_host.c   | 6 +++---
- drivers/usb/renesas_usbhs/pipe.h       | 6 +++---
- 3 files changed, 9 insertions(+), 9 deletions(-)
-
-diff --git a/drivers/usb/renesas_usbhs/mod_gadget.c b/drivers/usb/renesas_usbhs/mod_gadget.c
-index 805940c37353..3385aeb5a364 100644
---- a/drivers/usb/renesas_usbhs/mod_gadget.c
-+++ b/drivers/usb/renesas_usbhs/mod_gadget.c
-@@ -77,9 +77,9 @@ struct usbhsg_recip_handle {
- 		struct usbhsg_gpriv, mod)
- 
- #define __usbhsg_for_each_uep(start, pos, g, i)	\
--	for (i = start, pos = (g)->uep + i;	\
--	     i < (g)->uep_size;			\
--	     i++, pos = (g)->uep + i)
-+	for ((i) = start;					\
-+	     ((i) < (g)->uep_size) && ((pos) = (g)->uep + (i));	\
-+	     (i)++)
- 
- #define usbhsg_for_each_uep(pos, gpriv, i)	\
- 	__usbhsg_for_each_uep(1, pos, gpriv, i)
-diff --git a/drivers/usb/renesas_usbhs/mod_host.c b/drivers/usb/renesas_usbhs/mod_host.c
-index b86815421c8d..e40f565004d0 100644
---- a/drivers/usb/renesas_usbhs/mod_host.c
-+++ b/drivers/usb/renesas_usbhs/mod_host.c
-@@ -111,9 +111,9 @@ static const char usbhsh_hcd_name[] = "renesas_usbhs host";
- 	container_of(usbhs_mod_get(priv, USBHS_HOST), struct usbhsh_hpriv, mod)
- 
- #define __usbhsh_for_each_udev(start, pos, h, i)	\
--	for (i = start, pos = (h)->udev + i;		\
--	     i < USBHSH_DEVICE_MAX;			\
--	     i++, pos = (h)->udev + i)
-+	for ((i) = start;						\
-+	     ((i) < USBHSH_DEVICE_MAX) && ((pos) = (h)->udev + (i));	\
-+	     (i)++)
- 
- #define usbhsh_for_each_udev(pos, hpriv, i)	\
- 	__usbhsh_for_each_udev(1, pos, hpriv, i)
-diff --git a/drivers/usb/renesas_usbhs/pipe.h b/drivers/usb/renesas_usbhs/pipe.h
-index b476fde955bf..3e5349879838 100644
---- a/drivers/usb/renesas_usbhs/pipe.h
-+++ b/drivers/usb/renesas_usbhs/pipe.h
-@@ -54,9 +54,9 @@ struct usbhs_pipe_info {
-  * pipe list
-  */
- #define __usbhs_for_each_pipe(start, pos, info, i)	\
--	for (i = start, pos = (info)->pipe + i;		\
--	     i < (info)->size;				\
--	     i++, pos = (info)->pipe + i)
-+	for ((i) = start;						\
-+	     ((i) < (info)->size) && ((pos) = (info)->pipe + (i));	\
-+	     (i)++)
- 
- #define usbhs_for_each_pipe(pos, priv, i)			\
- 	__usbhs_for_each_pipe(1, pos, &((priv)->pipe_info), i)
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0226-ARM-shmobile-koelsch-Add-DU-device.patch b/patches.renesas/0226-ARM-shmobile-koelsch-Add-DU-device.patch
deleted file mode 100644
index 3d2f937e4f36a..0000000000000
--- a/patches.renesas/0226-ARM-shmobile-koelsch-Add-DU-device.patch
+++ /dev/null
@@ -1,122 +0,0 @@
-From c6e22945076f8351149ccdc9470aabaa72e50531 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Sat, 7 Dec 2013 02:17:44 +0100
-Subject: ARM: shmobile: koelsch: Add DU device
-
-Only the LVDS output is currently supported.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 784c33a0c9b509f09cb69bc93f3863ed20338462)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-koelsch.c | 63 ++++++++++++++++++++++++++++++++++
- 1 file changed, 63 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/board-koelsch.c b/arch/arm/mach-shmobile/board-koelsch.c
-index 6e12914d6d58..5d84fb6f3c5c 100644
---- a/arch/arm/mach-shmobile/board-koelsch.c
-+++ b/arch/arm/mach-shmobile/board-koelsch.c
-@@ -19,6 +19,7 @@
-  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
-  */
- 
-+#include <linux/dma-mapping.h>
- #include <linux/gpio.h>
- #include <linux/gpio_keys.h>
- #include <linux/input.h>
-@@ -26,13 +27,66 @@
- #include <linux/leds.h>
- #include <linux/pinctrl/machine.h>
- #include <linux/platform_data/gpio-rcar.h>
-+#include <linux/platform_data/rcar-du.h>
- #include <linux/platform_device.h>
- #include <mach/common.h>
-+#include <mach/irqs.h>
- #include <mach/r8a7791.h>
- #include <mach/rcar-gen2.h>
- #include <asm/mach-types.h>
- #include <asm/mach/arch.h>
- 
-+/* DU */
-+static struct rcar_du_encoder_data koelsch_du_encoders[] = {
-+	{
-+		.type = RCAR_DU_ENCODER_NONE,
-+		.output = RCAR_DU_OUTPUT_LVDS0,
-+		.connector.lvds.panel = {
-+			.width_mm = 210,
-+			.height_mm = 158,
-+			.mode = {
-+				.clock = 65000,
-+				.hdisplay = 1024,
-+				.hsync_start = 1048,
-+				.hsync_end = 1184,
-+				.htotal = 1344,
-+				.vdisplay = 768,
-+				.vsync_start = 771,
-+				.vsync_end = 777,
-+				.vtotal = 806,
-+				.flags = 0,
-+			},
-+		},
-+	},
-+};
-+
-+static const struct rcar_du_platform_data koelsch_du_pdata __initconst = {
-+	.encoders = koelsch_du_encoders,
-+	.num_encoders = ARRAY_SIZE(koelsch_du_encoders),
-+};
-+
-+static const struct resource du_resources[] __initconst = {
-+	DEFINE_RES_MEM(0xfeb00000, 0x40000),
-+	DEFINE_RES_MEM_NAMED(0xfeb90000, 0x1c, "lvds.0"),
-+	DEFINE_RES_IRQ(gic_spi(256)),
-+	DEFINE_RES_IRQ(gic_spi(268)),
-+};
-+
-+static void __init koelsch_add_du_device(void)
-+{
-+	struct platform_device_info info = {
-+		.name = "rcar-du-r8a7791",
-+		.id = -1,
-+		.res = du_resources,
-+		.num_res = ARRAY_SIZE(du_resources),
-+		.data = &koelsch_du_pdata,
-+		.size_data = sizeof(koelsch_du_pdata),
-+		.dma_mask = DMA_BIT_MASK(32),
-+	};
-+
-+	platform_device_register_full(&info);
-+}
-+
- /* LEDS */
- static struct gpio_led koelsch_leds[] = {
- 	{
-@@ -80,6 +134,13 @@ static const struct gpio_keys_platform_data koelsch_keys_pdata __initconst = {
- };
- 
- static const struct pinctrl_map koelsch_pinctrl_map[] = {
-+	/* DU */
-+	PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7791", "pfc-r8a7791",
-+				  "du_rgb666", "du"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7791", "pfc-r8a7791",
-+				  "du_sync", "du"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7791", "pfc-r8a7791",
-+				  "du_clk_out_0", "du"),
- 	/* SCIF0 (CN19: DEBUG SERIAL0) */
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.6", "pfc-r8a7791",
- 				  "scif0_data_d", "scif0"),
-@@ -101,6 +162,8 @@ static void __init koelsch_add_standard_devices(void)
- 	platform_device_register_data(&platform_bus, "gpio-keys", -1,
- 				      &koelsch_keys_pdata,
- 				      sizeof(koelsch_keys_pdata));
-+
-+	koelsch_add_du_device();
- }
- 
- static const char * const koelsch_boards_compat_dt[] __initconst = {
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0226-ARM-shmobile-r8a7778-Register-SDHI-device.patch b/patches.renesas/0226-ARM-shmobile-r8a7778-Register-SDHI-device.patch
deleted file mode 100644
index e1f3b4b0706f9..0000000000000
--- a/patches.renesas/0226-ARM-shmobile-r8a7778-Register-SDHI-device.patch
+++ /dev/null
@@ -1,77 +0,0 @@
-From b0f9d5f02c39d3c02dab4f01b11ac2f2d770cb96 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Tue, 16 Apr 2013 22:17:25 -0700
-Subject: ARM: shmobile: r8a7778: Register SDHI device
-
-This patch adds SDHI register function which needs id number (= 0/1/2)
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit dab581139c475719caa29356727b930c0245e2af)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-	arch/arm/mach-shmobile/include/mach/r8a7778.h
-	arch/arm/mach-shmobile/setup-r8a7778.c
----
- arch/arm/mach-shmobile/include/mach/r8a7778.h |  2 ++
- arch/arm/mach-shmobile/setup-r8a7778.c        | 24 ++++++++++++++++++++++++
- 2 files changed, 26 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/include/mach/r8a7778.h b/arch/arm/mach-shmobile/include/mach/r8a7778.h
-index 68053fc4..ae65b459 100644
---- a/arch/arm/mach-shmobile/include/mach/r8a7778.h
-+++ b/arch/arm/mach-shmobile/include/mach/r8a7778.h
-@@ -18,6 +18,7 @@
- #ifndef __ASM_R8A7778_H__
- #define __ASM_R8A7778_H__
- 
-+#include <linux/mmc/sh_mobile_sdhi.h>
- #include <linux/sh_eth.h>
- 
- extern void r8a7778_add_standard_devices(void);
-@@ -29,5 +30,6 @@ extern void r8a7778_init_irq_dt(void);
- extern void r8a7778_clock_init(void);
- extern void r8a7778_init_irq_extpin(int irlm);
- extern void r8a7778_pinmux_init(void);
-+extern void r8a7778_sdhi_init(int id, struct sh_mobile_sdhi_info *info);
- 
- #endif /* __ASM_R8A7778_H__ */
-diff --git a/arch/arm/mach-shmobile/setup-r8a7778.c b/arch/arm/mach-shmobile/setup-r8a7778.c
-index 06ead4a0..1b9b7f2a 100644
---- a/arch/arm/mach-shmobile/setup-r8a7778.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7778.c
-@@ -147,6 +147,30 @@ void __init r8a7778_pinmux_init(void)
- 	r8a7778_register_gpio(2);
- 	r8a7778_register_gpio(3);
- 	r8a7778_register_gpio(4);
-+};
-+
-+/* SDHI */
-+static struct resource sdhi_resources[] = {
-+	/* SDHI0 */
-+	DEFINE_RES_MEM(0xFFE4C000, 0x100),
-+	DEFINE_RES_IRQ(gic_iid(0x77)),
-+	/* SDHI1 */
-+	DEFINE_RES_MEM(0xFFE4D000, 0x100),
-+	DEFINE_RES_IRQ(gic_iid(0x78)),
-+	/* SDHI2 */
-+	DEFINE_RES_MEM(0xFFE4F000, 0x100),
-+	DEFINE_RES_IRQ(gic_iid(0x76)),
-+};
-+
-+void __init r8a7778_sdhi_init(int id,
-+			      struct sh_mobile_sdhi_info *info)
-+{
-+	BUG_ON(id < 0 || id > 2);
-+
-+	platform_device_register_resndata(
-+		&platform_bus, "sh_mobile_sdhi", id,
-+		sdhi_resources + (2 * id), 2,
-+		info, sizeof(*info));
- }
- 
- void __init r8a7778_add_standard_devices(void)
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0226-usb-renesas-use-dev_get_platdata.patch b/patches.renesas/0226-usb-renesas-use-dev_get_platdata.patch
deleted file mode 100644
index bf2e1131a1f1c..0000000000000
--- a/patches.renesas/0226-usb-renesas-use-dev_get_platdata.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From f3b4d407b140634d39c1a3b42aeb89364dc887b8 Mon Sep 17 00:00:00 2001
-From: Jingoo Han <jg1.han@samsung.com>
-Date: Tue, 30 Jul 2013 17:06:20 +0900
-Subject: usb: renesas: use dev_get_platdata()
-
-Use the wrapper function for retrieving the platform data instead of
-accessing dev->platform_data directly.
-
-Signed-off-by: Jingoo Han <jg1.han@samsung.com>
-Signed-off-by: Felipe Balbi <balbi@ti.com>
-(cherry picked from commit f074245960e8fec9948eb8022322e43670ace4e5)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/renesas_usbhs/common.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/usb/renesas_usbhs/common.c b/drivers/usb/renesas_usbhs/common.c
-index cfd205036aba..3b39757c13bc 100644
---- a/drivers/usb/renesas_usbhs/common.c
-+++ b/drivers/usb/renesas_usbhs/common.c
-@@ -416,7 +416,7 @@ static int usbhsc_drvcllbck_notify_hotplug(struct platform_device *pdev)
-  */
- static int usbhs_probe(struct platform_device *pdev)
- {
--	struct renesas_usbhs_platform_info *info = pdev->dev.platform_data;
-+	struct renesas_usbhs_platform_info *info = dev_get_platdata(&pdev->dev);
- 	struct renesas_usbhs_driver_callback *dfunc;
- 	struct usbhs_priv *priv;
- 	struct resource *res, *irq_res;
-@@ -558,7 +558,7 @@ probe_end_pipe_exit:
- static int usbhs_remove(struct platform_device *pdev)
- {
- 	struct usbhs_priv *priv = usbhs_pdev_to_priv(pdev);
--	struct renesas_usbhs_platform_info *info = pdev->dev.platform_data;
-+	struct renesas_usbhs_platform_info *info = dev_get_platdata(&pdev->dev);
- 	struct renesas_usbhs_driver_callback *dfunc = &info->driver_callback;
- 
- 	dev_dbg(&pdev->dev, "usb remove\n");
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0227-ARM-shmobile-Koelsch-add-Ether-support.patch b/patches.renesas/0227-ARM-shmobile-Koelsch-add-Ether-support.patch
deleted file mode 100644
index 3faf001d0e8b7..0000000000000
--- a/patches.renesas/0227-ARM-shmobile-Koelsch-add-Ether-support.patch
+++ /dev/null
@@ -1,126 +0,0 @@
-From 47aac85b89e09dc052ee966973a1ae7ca8e4c270 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Sun, 8 Dec 2013 23:52:44 +0300
-Subject: ARM: shmobile: Koelsch: add Ether support
-
-Register Ether platform device and pin data on  the  Koelsch board.
-Register platform fixup for Micrel KSZ8041 PHY, just like on the Lager board.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 974faba70550409049ee349939f4479ad98908ae)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-koelsch.c | 56 +++++++++++++++++++++++++++++++++-
- 1 file changed, 55 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/board-koelsch.c b/arch/arm/mach-shmobile/board-koelsch.c
-index 5d84fb6f3c5c..de7cc64b1f37 100644
---- a/arch/arm/mach-shmobile/board-koelsch.c
-+++ b/arch/arm/mach-shmobile/board-koelsch.c
-@@ -25,10 +25,12 @@
- #include <linux/input.h>
- #include <linux/kernel.h>
- #include <linux/leds.h>
-+#include <linux/phy.h>
- #include <linux/pinctrl/machine.h>
- #include <linux/platform_data/gpio-rcar.h>
- #include <linux/platform_data/rcar-du.h>
- #include <linux/platform_device.h>
-+#include <linux/sh_eth.h>
- #include <mach/common.h>
- #include <mach/irqs.h>
- #include <mach/r8a7791.h>
-@@ -87,6 +89,19 @@ static void __init koelsch_add_du_device(void)
- 	platform_device_register_full(&info);
- }
- 
-+/* Ether */
-+static const struct sh_eth_plat_data ether_pdata __initconst = {
-+	.phy			= 0x1,
-+	.edmac_endian		= EDMAC_LITTLE_ENDIAN,
-+	.phy_interface		= PHY_INTERFACE_MODE_RMII,
-+	.ether_link_active_low	= 1,
-+};
-+
-+static const struct resource ether_resources[] __initconst = {
-+	DEFINE_RES_MEM(0xee700000, 0x400),
-+	DEFINE_RES_IRQ(gic_spi(162)),
-+};
-+
- /* LEDS */
- static struct gpio_led koelsch_leds[] = {
- 	{
-@@ -141,6 +156,15 @@ static const struct pinctrl_map koelsch_pinctrl_map[] = {
- 				  "du_sync", "du"),
- 	PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7791", "pfc-r8a7791",
- 				  "du_clk_out_0", "du"),
-+	/* Ether */
-+	PIN_MAP_MUX_GROUP_DEFAULT("r8a7791-ether", "pfc-r8a7791",
-+				  "eth_link", "eth"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("r8a7791-ether", "pfc-r8a7791",
-+				  "eth_mdio", "eth"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("r8a7791-ether", "pfc-r8a7791",
-+				  "eth_rmii", "eth"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("r8a7791-ether", "pfc-r8a7791",
-+				  "intc_irq0", "intc"),
- 	/* SCIF0 (CN19: DEBUG SERIAL0) */
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.6", "pfc-r8a7791",
- 				  "scif0_data_d", "scif0"),
-@@ -156,6 +180,10 @@ static void __init koelsch_add_standard_devices(void)
- 				  ARRAY_SIZE(koelsch_pinctrl_map));
- 	r8a7791_pinmux_init();
- 	r8a7791_add_standard_devices();
-+	platform_device_register_resndata(&platform_bus, "r8a7791-ether", -1,
-+					  ether_resources,
-+					  ARRAY_SIZE(ether_resources),
-+					  &ether_pdata, sizeof(ether_pdata));
- 	platform_device_register_data(&platform_bus, "leds-gpio", -1,
- 				      &koelsch_leds_pdata,
- 				      sizeof(koelsch_leds_pdata));
-@@ -166,6 +194,32 @@ static void __init koelsch_add_standard_devices(void)
- 	koelsch_add_du_device();
- }
- 
-+/*
-+ * Ether LEDs on the Koelsch board are named LINK and ACTIVE which corresponds
-+ * to non-default 01 setting of the Micrel KSZ8041 PHY control register 1 bits
-+ * 14-15. We have to set them back to 01 from the default 00 value each time
-+ * the PHY is reset. It's also important because the PHY's LED0 signal is
-+ * connected to SoC's ETH_LINK signal and in the PHY's default mode it will
-+ * bounce on and off after each packet, which we apparently want to avoid.
-+ */
-+static int koelsch_ksz8041_fixup(struct phy_device *phydev)
-+{
-+	u16 phyctrl1 = phy_read(phydev, 0x1e);
-+
-+	phyctrl1 &= ~0xc000;
-+	phyctrl1 |= 0x4000;
-+	return phy_write(phydev, 0x1e, phyctrl1);
-+}
-+
-+static void __init koelsch_init(void)
-+{
-+	koelsch_add_standard_devices();
-+
-+	if (IS_ENABLED(CONFIG_PHYLIB))
-+		phy_register_fixup_for_id("r8a7791-ether-ff:01",
-+					  koelsch_ksz8041_fixup);
-+}
-+
- static const char * const koelsch_boards_compat_dt[] __initconst = {
- 	"renesas,koelsch",
- 	NULL,
-@@ -175,7 +229,7 @@ DT_MACHINE_START(KOELSCH_DT, "koelsch")
- 	.smp		= smp_ops(r8a7791_smp_ops),
- 	.init_early	= r8a7791_init_early,
- 	.init_time	= rcar_gen2_timer_init,
--	.init_machine	= koelsch_add_standard_devices,
-+	.init_machine	= koelsch_init,
- 	.init_late	= shmobile_init_late,
- 	.dt_compat	= koelsch_boards_compat_dt,
- MACHINE_END
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0227-ARM-shmobile-r8a7790-add-main-clock.patch b/patches.renesas/0227-ARM-shmobile-r8a7790-add-main-clock.patch
deleted file mode 100644
index 335985ff5040c..0000000000000
--- a/patches.renesas/0227-ARM-shmobile-r8a7790-add-main-clock.patch
+++ /dev/null
@@ -1,231 +0,0 @@
-From 8ae6b6c0be4268cddc8326ac0e279dab57c1e576 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Fri, 12 Apr 2013 00:42:22 -0700
-Subject: ARM: shmobile: r8a7790: add main clock
-
-Almost all clock needs main clock which is basis clock on r8a7790.
-This patch adds it, and, set its parent/ratio via MD pin.
-It is based on v0.05 datasheet
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 8d100c0454a9960c9bf0b67e07225db5d32cca83)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r8a7790.c | 161 ++++++++++++++++++++++++++++++++-
- 1 file changed, 156 insertions(+), 5 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
-index bad9bf2e..850e47f7 100644
---- a/arch/arm/mach-shmobile/clock-r8a7790.c
-+++ b/arch/arm/mach-shmobile/clock-r8a7790.c
-@@ -22,32 +22,113 @@
- #include <linux/kernel.h>
- #include <linux/sh_clk.h>
- #include <linux/clkdev.h>
-+#include <mach/clock.h>
- #include <mach/common.h>
- 
-+/*
-+ *   MD		EXTAL		PLL0	PLL1	PLL3
-+ * 14 13 19	(MHz)		*1	*1
-+ *---------------------------------------------------
-+ * 0  0  0	15 x 1		x172/2	x208/2	x106
-+ * 0  0  1	15 x 1		x172/2	x208/2	x88
-+ * 0  1  0	20 x 1		x130/2	x156/2	x80
-+ * 0  1  1	20 x 1		x130/2	x156/2	x66
-+ * 1  0  0	26 / 2		x200/2	x240/2	x122
-+ * 1  0  1	26 / 2		x200/2	x240/2	x102
-+ * 1  1  0	30 / 2		x172/2	x208/2	x106
-+ * 1  1  1	30 / 2		x172/2	x208/2	x88
-+ *
-+ * *1 :	Table 7.6 indicates VCO ouput (PLLx = VCO/2)
-+ *	see "p1 / 2" on R8A7790_CLOCK_ROOT() below
-+ */
-+
-+#define MD(nr)	(1 << nr)
-+
- #define CPG_BASE 0xe6150000
- #define CPG_LEN 0x1000
- 
- #define SMSTPCR2 0xe6150138
- #define SMSTPCR7 0xe615014c
- 
-+#define MODEMR		0xE6160060
-+
- static struct clk_mapping cpg_mapping = {
- 	.phys   = CPG_BASE,
- 	.len    = CPG_LEN,
- };
- 
--static struct clk p_clk = {
--	.rate	= 65000000, /* shortcut for now */
-+static struct clk extal_clk = {
-+	/* .rate will be updated on r8a7790_clock_init() */
- 	.mapping	= &cpg_mapping,
- };
- 
--static struct clk mp_clk = {
--	.rate	= 52000000,  /* shortcut for now */
--	.mapping	= &cpg_mapping,
-+static struct sh_clk_ops followparent_clk_ops = {
-+	.recalc	= followparent_recalc,
- };
- 
-+static struct clk main_clk = {
-+	/* .parent will be set r8a73a4_clock_init */
-+	.ops	= &followparent_clk_ops,
-+};
-+
-+/*
-+ * clock ratio of these clock will be updated
-+ * on r8a7790_clock_init()
-+ */
-+SH_FIXED_RATIO_CLK_SET(pll1_clk,		main_clk,	1, 1);
-+SH_FIXED_RATIO_CLK_SET(pll3_clk,		main_clk,	1, 1);
-+SH_FIXED_RATIO_CLK_SET(lb_clk,			pll1_clk,	1, 1);
-+SH_FIXED_RATIO_CLK_SET(qspi_clk,		pll1_clk,	1, 1);
-+
-+/* fixed ratio clock */
-+SH_FIXED_RATIO_CLK_SET(extal_div2_clk,		extal_clk,	1, 2);
-+SH_FIXED_RATIO_CLK_SET(cp_clk,			extal_clk,	1, 2);
-+
-+SH_FIXED_RATIO_CLK_SET(pll1_div2_clk,		pll1_clk,	1, 2);
-+SH_FIXED_RATIO_CLK_SET(zg_clk,			pll1_clk,	1, 3);
-+SH_FIXED_RATIO_CLK_SET(zx_clk,			pll1_clk,	1, 3);
-+SH_FIXED_RATIO_CLK_SET(zs_clk,			pll1_clk,	1, 6);
-+SH_FIXED_RATIO_CLK_SET(hp_clk,			pll1_clk,	1, 12);
-+SH_FIXED_RATIO_CLK_SET(i_clk,			pll1_clk,	1, 2);
-+SH_FIXED_RATIO_CLK_SET(b_clk,			pll1_clk,	1, 12);
-+SH_FIXED_RATIO_CLK_SET(p_clk,			pll1_clk,	1, 24);
-+SH_FIXED_RATIO_CLK_SET(cl_clk,			pll1_clk,	1, 48);
-+SH_FIXED_RATIO_CLK_SET(m2_clk,			pll1_clk,	1, 8);
-+SH_FIXED_RATIO_CLK_SET(imp_clk,			pll1_clk,	1, 4);
-+SH_FIXED_RATIO_CLK_SET(rclk_clk,		pll1_clk,	1, (48 * 1024));
-+SH_FIXED_RATIO_CLK_SET(oscclk_clk,		pll1_clk,	1, (12 * 1024));
-+
-+SH_FIXED_RATIO_CLK_SET(zb3_clk,			pll3_clk,	1, 4);
-+SH_FIXED_RATIO_CLK_SET(zb3d2_clk,		pll3_clk,	1, 8);
-+SH_FIXED_RATIO_CLK_SET(ddr_clk,			pll3_clk,	1, 8);
-+SH_FIXED_RATIO_CLK_SET(mp_clk,			pll1_div2_clk,	1, 15);
-+
- static struct clk *main_clks[] = {
-+	&extal_clk,
-+	&extal_div2_clk,
-+	&main_clk,
-+	&pll1_clk,
-+	&pll1_div2_clk,
-+	&pll3_clk,
-+	&lb_clk,
-+	&qspi_clk,
-+	&zg_clk,
-+	&zx_clk,
-+	&zs_clk,
-+	&hp_clk,
-+	&i_clk,
-+	&b_clk,
- 	&p_clk,
-+	&cl_clk,
-+	&m2_clk,
-+	&imp_clk,
-+	&rclk_clk,
-+	&oscclk_clk,
-+	&zb3_clk,
-+	&zb3d2_clk,
-+	&ddr_clk,
- 	&mp_clk,
-+	&cp_clk,
- };
- 
- enum { MSTP721, MSTP720,
-@@ -64,6 +145,35 @@ static struct clk mstp_clks[MSTP_NR] = {
- };
- 
- static struct clk_lookup lookups[] = {
-+
-+	/* main clocks */
-+	CLKDEV_CON_ID("extal",		&extal_clk),
-+	CLKDEV_CON_ID("extal_div2",	&extal_div2_clk),
-+	CLKDEV_CON_ID("main",		&main_clk),
-+	CLKDEV_CON_ID("pll1",		&pll1_clk),
-+	CLKDEV_CON_ID("pll1_div2",	&pll1_div2_clk),
-+	CLKDEV_CON_ID("pll3",		&pll3_clk),
-+	CLKDEV_CON_ID("zg",		&zg_clk),
-+	CLKDEV_CON_ID("zx",		&zx_clk),
-+	CLKDEV_CON_ID("zs",		&zs_clk),
-+	CLKDEV_CON_ID("hp",		&hp_clk),
-+	CLKDEV_CON_ID("i",		&i_clk),
-+	CLKDEV_CON_ID("b",		&b_clk),
-+	CLKDEV_CON_ID("lb",		&lb_clk),
-+	CLKDEV_CON_ID("p",		&p_clk),
-+	CLKDEV_CON_ID("cl",		&cl_clk),
-+	CLKDEV_CON_ID("m2",		&m2_clk),
-+	CLKDEV_CON_ID("imp",		&imp_clk),
-+	CLKDEV_CON_ID("rclk",		&rclk_clk),
-+	CLKDEV_CON_ID("oscclk",		&oscclk_clk),
-+	CLKDEV_CON_ID("zb3",		&zb3_clk),
-+	CLKDEV_CON_ID("zb3d2",		&zb3d2_clk),
-+	CLKDEV_CON_ID("ddr",		&ddr_clk),
-+	CLKDEV_CON_ID("mp",		&mp_clk),
-+	CLKDEV_CON_ID("qspi",		&qspi_clk),
-+	CLKDEV_CON_ID("cp",		&cp_clk),
-+
-+	/* MSTP */
- 	CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]),
- 	CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP203]),
- 	CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP206]),
-@@ -74,10 +184,51 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP720]),
- };
- 
-+#define R8A7790_CLOCK_ROOT(e, m, p0, p1, p30, p31)		\
-+	extal_clk.rate	= e * 1000 * 1000;			\
-+	main_clk.parent	= m;					\
-+	SH_CLK_SET_RATIO(&pll1_clk_ratio, p1 / 2, 1);		\
-+	if (mode & MD(19))					\
-+		SH_CLK_SET_RATIO(&pll3_clk_ratio, p31, 1);	\
-+	else							\
-+		SH_CLK_SET_RATIO(&pll3_clk_ratio, p30, 1)
-+
-+
- void __init r8a7790_clock_init(void)
- {
-+	void __iomem *modemr = ioremap_nocache(MODEMR, PAGE_SIZE);
-+	u32 mode;
- 	int k, ret = 0;
- 
-+	BUG_ON(!modemr);
-+	mode = ioread32(modemr);
-+	iounmap(modemr);
-+
-+	switch (mode & (MD(14) | MD(13))) {
-+	case 0:
-+		R8A7790_CLOCK_ROOT(15, &extal_clk, 172, 208, 106, 88);
-+		break;
-+	case MD(13):
-+		R8A7790_CLOCK_ROOT(20, &extal_clk, 130, 156, 80, 66);
-+		break;
-+	case MD(14):
-+		R8A7790_CLOCK_ROOT(26, &extal_div2_clk, 200, 240, 122, 102);
-+		break;
-+	case MD(13) | MD(14):
-+		R8A7790_CLOCK_ROOT(30, &extal_div2_clk, 172, 208, 106, 88);
-+		break;
-+	}
-+
-+	if (mode & (MD(18)))
-+		SH_CLK_SET_RATIO(&lb_clk_ratio, 1, 36);
-+	else
-+		SH_CLK_SET_RATIO(&lb_clk_ratio, 1, 24);
-+
-+	if ((mode & (MD(3) | MD(2) | MD(1))) == MD(2))
-+		SH_CLK_SET_RATIO(&qspi_clk_ratio, 1, 16);
-+	else
-+		SH_CLK_SET_RATIO(&qspi_clk_ratio, 1, 20);
-+
- 	for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++)
- 		ret = clk_register(main_clks[k]);
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0227-usb-renesas_usbhs-use-platform_-get-set-_drvdata.patch b/patches.renesas/0227-usb-renesas_usbhs-use-platform_-get-set-_drvdata.patch
deleted file mode 100644
index fa9871f6ef2fa..0000000000000
--- a/patches.renesas/0227-usb-renesas_usbhs-use-platform_-get-set-_drvdata.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From 268239ab4b21ea131fcd62f7cbd01dfe8be1d737 Mon Sep 17 00:00:00 2001
-From: Libo Chen <clbchenlibo.chen@huawei.com>
-Date: Tue, 27 Aug 2013 16:10:31 +0800
-Subject: usb: renesas_usbhs: use platform_{get,set}_drvdata()
-
-Use the wrapper functions for getting and setting the driver data using
-platform_device instead of using dev_{get,set}_drvdata() with &pdev->dev,
-so we can directly pass a struct platform_device.
-
-Signed-off-by: Libo Chen <libo.chen@huawei.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit c9a0552e8df596b7cc43cbcd161c065c0046744d)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/renesas_usbhs/common.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/usb/renesas_usbhs/common.c b/drivers/usb/renesas_usbhs/common.c
-index 3b39757c13bc..17267b0a2e95 100644
---- a/drivers/usb/renesas_usbhs/common.c
-+++ b/drivers/usb/renesas_usbhs/common.c
-@@ -499,7 +499,7 @@ static int usbhs_probe(struct platform_device *pdev)
- 		goto probe_end_fifo_exit;
- 
- 	/* dev_set_drvdata should be called after usbhs_mod_init */
--	dev_set_drvdata(&pdev->dev, priv);
-+	platform_set_drvdata(pdev, priv);
- 
- 	/*
- 	 * deviece reset here because
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0228-ARM-shmobile-armadillo-Set-backlight-enable-GPIO.patch b/patches.renesas/0228-ARM-shmobile-armadillo-Set-backlight-enable-GPIO.patch
deleted file mode 100644
index 15b34231e1d8a..0000000000000
--- a/patches.renesas/0228-ARM-shmobile-armadillo-Set-backlight-enable-GPIO.patch
+++ /dev/null
@@ -1,45 +0,0 @@
-From 4e6b0d3d1b2ab62b81f1550f0d75526d9d4bbd91 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 11 Dec 2013 03:48:16 +0100
-Subject: ARM: shmobile: armadillo: Set backlight enable GPIO
-
-The Armadillo 800 EVA panel module has a backlight enable signal
-connected to GPIO 61. Instead of requesting the GPIO in board code and
-setting it to a high level unconditionally, pass the GPIO number to the
-PWM backlight driver as the backlight enable GPIO.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 9a3beb04ec32cab91a8e562ae068433387b84547)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-armadillo800eva.c | 5 +----
- 1 file changed, 1 insertion(+), 4 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c
-index c1e3a3bb2da6..d7513bc6d4ea 100644
---- a/arch/arm/mach-shmobile/board-armadillo800eva.c
-+++ b/arch/arm/mach-shmobile/board-armadillo800eva.c
-@@ -422,7 +422,7 @@ static struct platform_pwm_backlight_data pwm_backlight_data = {
- 	.max_brightness = 255,
- 	.dft_brightness = 255,
- 	.pwm_period_ns = 33333, /* 30kHz */
--	.enable_gpio = -1,
-+	.enable_gpio = 61,
- };
- 
- static struct platform_device pwm_backlight_device = {
-@@ -1209,9 +1209,6 @@ static void __init eva_init(void)
- 	r8a7740_pinmux_init();
- 	r8a7740_meram_workaround();
- 
--	/* LCDC0 */
--	gpio_request_one(61, GPIOF_OUT_INIT_HIGH, NULL); /* LCDDON */
--
- 	/* GETHER */
- 	gpio_request_one(18, GPIOF_OUT_INIT_HIGH, NULL); /* PHY_RST */
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0228-ARM-shmobile-r8a7790-add-div4-clocks.patch b/patches.renesas/0228-ARM-shmobile-r8a7790-add-div4-clocks.patch
deleted file mode 100644
index b2f9902390b50..0000000000000
--- a/patches.renesas/0228-ARM-shmobile-r8a7790-add-div4-clocks.patch
+++ /dev/null
@@ -1,82 +0,0 @@
-From dd1a63fa61c30a9f9d4cd65ed40f0fbee25c1401 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Fri, 12 Apr 2013 00:42:52 -0700
-Subject: ARM: shmobile: r8a7790: add div4 clocks
-
-DIV4 clocks control SD* core clocks.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 9f13ee6f83c52065112d3e396e42e3780911ef53)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r8a7790.c | 32 ++++++++++++++++++++++++++++++++
- 1 file changed, 32 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
-index 850e47f7..c85e6432 100644
---- a/arch/arm/mach-shmobile/clock-r8a7790.c
-+++ b/arch/arm/mach-shmobile/clock-r8a7790.c
-@@ -51,6 +51,7 @@
- #define SMSTPCR7 0xe615014c
- 
- #define MODEMR		0xE6160060
-+#define SDCKCR		0xE6150074
- 
- static struct clk_mapping cpg_mapping = {
- 	.phys   = CPG_BASE,
-@@ -131,6 +132,29 @@ static struct clk *main_clks[] = {
- 	&cp_clk,
- };
- 
-+/* SDHI (DIV4) clock */
-+static int divisors[] = { 2, 3, 4, 6, 8, 12, 16, 18, 24, 0, 36, 48, 10 };
-+
-+static struct clk_div_mult_table div4_div_mult_table = {
-+	.divisors = divisors,
-+	.nr_divisors = ARRAY_SIZE(divisors),
-+};
-+
-+static struct clk_div4_table div4_table = {
-+	.div_mult_table = &div4_div_mult_table,
-+};
-+
-+enum {
-+	DIV4_SDH, DIV4_SD0, DIV4_SD1, DIV4_NR
-+};
-+
-+struct clk div4_clks[DIV4_NR] = {
-+	[DIV4_SDH] = SH_CLK_DIV4(&pll1_clk, SDCKCR, 8, 0x0dff, CLK_ENABLE_ON_INIT),
-+	[DIV4_SD0] = SH_CLK_DIV4(&pll1_clk, SDCKCR, 4, 0x1de0, CLK_ENABLE_ON_INIT),
-+	[DIV4_SD1] = SH_CLK_DIV4(&pll1_clk, SDCKCR, 0, 0x1de0, CLK_ENABLE_ON_INIT),
-+};
-+
-+/* MSTP */
- enum { MSTP721, MSTP720,
- 	MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP_NR };
- static struct clk mstp_clks[MSTP_NR] = {
-@@ -173,6 +197,11 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_CON_ID("qspi",		&qspi_clk),
- 	CLKDEV_CON_ID("cp",		&cp_clk),
- 
-+	/* DIV4 */
-+	CLKDEV_CON_ID("sdh",		&div4_clks[DIV4_SDH]),
-+	CLKDEV_CON_ID("sd0",		&div4_clks[DIV4_SD0]),
-+	CLKDEV_CON_ID("sd1",		&div4_clks[DIV4_SD1]),
-+
- 	/* MSTP */
- 	CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]),
- 	CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP203]),
-@@ -233,6 +262,9 @@ void __init r8a7790_clock_init(void)
- 		ret = clk_register(main_clks[k]);
- 
- 	if (!ret)
-+		ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table);
-+
-+	if (!ret)
- 		ret = sh_clk_mstp_register(mstp_clks, MSTP_NR);
- 
- 	clkdev_add_table(lookups, ARRAY_SIZE(lookups));
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0228-serial8250-em-Convert-to-devm_-managed-helpers.patch b/patches.renesas/0228-serial8250-em-Convert-to-devm_-managed-helpers.patch
deleted file mode 100644
index 32b9114c89c9c..0000000000000
--- a/patches.renesas/0228-serial8250-em-Convert-to-devm_-managed-helpers.patch
+++ /dev/null
@@ -1,87 +0,0 @@
-From 001a8b986042a2a63217676ff59215e58fb18066 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 26 Jul 2013 16:22:02 +0200
-Subject: serial8250-em: Convert to devm_* managed helpers
-
-Replace kzalloc and clk_get by their managed counterparts to simplify
-error and cleanup paths.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 299a62575a63b19add8206642b340f1b54ec4faf)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/tty/serial/8250/8250_em.c | 27 ++++++++-------------------
- 1 file changed, 8 insertions(+), 19 deletions(-)
-
-diff --git a/drivers/tty/serial/8250/8250_em.c b/drivers/tty/serial/8250/8250_em.c
-index 916cc19fbbda..5f3bba12c159 100644
---- a/drivers/tty/serial/8250/8250_em.c
-+++ b/drivers/tty/serial/8250/8250_em.c
-@@ -95,25 +95,23 @@ static int serial8250_em_probe(struct platform_device *pdev)
- 	struct resource *irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
- 	struct serial8250_em_priv *priv;
- 	struct uart_8250_port up;
--	int ret = -EINVAL;
-+	int ret;
- 
- 	if (!regs || !irq) {
- 		dev_err(&pdev->dev, "missing registers or irq\n");
--		goto err0;
-+		return -EINVAL;
- 	}
- 
--	priv = kzalloc(sizeof(*priv), GFP_KERNEL);
-+	priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
- 	if (!priv) {
- 		dev_err(&pdev->dev, "unable to allocate private data\n");
--		ret = -ENOMEM;
--		goto err0;
-+		return -ENOMEM;
- 	}
- 
--	priv->sclk = clk_get(&pdev->dev, "sclk");
-+	priv->sclk = devm_clk_get(&pdev->dev, "sclk");
- 	if (IS_ERR(priv->sclk)) {
- 		dev_err(&pdev->dev, "unable to get clock\n");
--		ret = PTR_ERR(priv->sclk);
--		goto err1;
-+		return PTR_ERR(priv->sclk);
- 	}
- 
- 	memset(&up, 0, sizeof(up));
-@@ -136,20 +134,13 @@ static int serial8250_em_probe(struct platform_device *pdev)
- 	ret = serial8250_register_8250_port(&up);
- 	if (ret < 0) {
- 		dev_err(&pdev->dev, "unable to register 8250 port\n");
--		goto err2;
-+		clk_disable(priv->sclk);
-+		return ret;
- 	}
- 
- 	priv->line = ret;
- 	platform_set_drvdata(pdev, priv);
- 	return 0;
--
-- err2:
--	clk_disable(priv->sclk);
--	clk_put(priv->sclk);
-- err1:
--	kfree(priv);
-- err0:
--	return ret;
- }
- 
- static int serial8250_em_remove(struct platform_device *pdev)
-@@ -158,8 +149,6 @@ static int serial8250_em_remove(struct platform_device *pdev)
- 
- 	serial8250_unregister_port(priv->line);
- 	clk_disable(priv->sclk);
--	clk_put(priv->sclk);
--	kfree(priv);
- 	return 0;
- }
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0229-ARM-shmobile-lager-reference-Enable-multiplaform-ker.patch b/patches.renesas/0229-ARM-shmobile-lager-reference-Enable-multiplaform-ker.patch
deleted file mode 100644
index ae716c8b49604..0000000000000
--- a/patches.renesas/0229-ARM-shmobile-lager-reference-Enable-multiplaform-ker.patch
+++ /dev/null
@@ -1,89 +0,0 @@
-From 0431d7f6ef6fb03776ad5a604e2bc2bc6caa6923 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 11 Dec 2013 15:13:52 +0100
-Subject: ARM: shmobile: lager-reference: Enable multiplaform kernel support
-
-Enable multiplaform ARM architecture support for the Lager reference
-board. Common clock framework initialization will be handled by the
-rcar_gen2_init_timer() call, we just need to remove the legacy clock
-code initialization.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 0ef3cde4d906041a497bfc585568a45ae84b4a8f)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/Makefile                     | 1 +
- arch/arm/mach-shmobile/Kconfig                 | 8 ++++++++
- arch/arm/mach-shmobile/Makefile                | 1 +
- arch/arm/mach-shmobile/board-lager-reference.c | 2 ++
- 4 files changed, 12 insertions(+)
-
-diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
-index 0eadc1af789b..bf100833943f 100644
---- a/arch/arm/boot/dts/Makefile
-+++ b/arch/arm/boot/dts/Makefile
-@@ -178,6 +178,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE_LEGACY) += emev2-kzm9d.dtb \
- 	sh7372-mackerel.dtb
- dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += emev2-kzm9d.dtb \
- 	r7s72100-genmai-reference.dtb \
-+	r8a7790-lager-reference.dtb \
- 	r8a7791-koelsch-reference.dtb
- dtb-$(CONFIG_ARCH_SOCFPGA) += socfpga_cyclone5.dtb \
- 	socfpga_vt.dtb
-diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
-index cd89d6348e0e..e7033a858429 100644
---- a/arch/arm/mach-shmobile/Kconfig
-+++ b/arch/arm/mach-shmobile/Kconfig
-@@ -28,6 +28,10 @@ config ARCH_EMEV2
- config ARCH_R7S72100
- 	bool "RZ/A1H (R7S72100)"
- 
-+config ARCH_R8A7790
-+	bool "R-Car H2 (R8A77900)"
-+	select RENESAS_IRQC
-+
- config ARCH_R8A7791
- 	bool "R-Car M2 (R8A77910)"
- 	select RENESAS_IRQC
-@@ -47,6 +51,10 @@ config MACH_KZM9D
- 	depends on ARCH_EMEV2
- 	select REGULATOR_FIXED_VOLTAGE if REGULATOR
- 
-+config MACH_LAGER
-+	bool "Lager board"
-+	depends on ARCH_R8A7790
-+
- comment "Renesas ARM SoCs System Configuration"
- endif
- 
-diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
-index 1c131046dec6..9daa9c16e681 100644
---- a/arch/arm/mach-shmobile/Makefile
-+++ b/arch/arm/mach-shmobile/Makefile
-@@ -59,6 +59,7 @@ ifdef CONFIG_ARCH_SHMOBILE_MULTI
- obj-$(CONFIG_MACH_GENMAI)	+= board-genmai-reference.o
- obj-$(CONFIG_MACH_KOELSCH)	+= board-koelsch-reference.o
- obj-$(CONFIG_MACH_KZM9D)	+= board-kzm9d-reference.o
-+obj-$(CONFIG_MACH_LAGER)	+= board-lager-reference.o
- else
- obj-$(CONFIG_MACH_APE6EVM)	+= board-ape6evm.o
- obj-$(CONFIG_MACH_APE6EVM_REFERENCE)	+= board-ape6evm-reference.o
-diff --git a/arch/arm/mach-shmobile/board-lager-reference.c b/arch/arm/mach-shmobile/board-lager-reference.c
-index 51a3bcc704e5..fc43f7ce6577 100644
---- a/arch/arm/mach-shmobile/board-lager-reference.c
-+++ b/arch/arm/mach-shmobile/board-lager-reference.c
-@@ -27,7 +27,9 @@
- 
- static void __init lager_add_standard_devices(void)
- {
-+#ifndef CONFIG_COMMON_CLK
- 	r8a7790_clock_init();
-+#endif
- 	r8a7790_add_dt_devices();
- 	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0229-ARM-shmobile-r8a7790-add-div6-clocks.patch b/patches.renesas/0229-ARM-shmobile-r8a7790-add-div6-clocks.patch
deleted file mode 100644
index c45411af72260..0000000000000
--- a/patches.renesas/0229-ARM-shmobile-r8a7790-add-div6-clocks.patch
+++ /dev/null
@@ -1,84 +0,0 @@
-From bf71445a139ce01a15c453be422489e9e6485b44 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Fri, 12 Apr 2013 00:43:09 -0700
-Subject: ARM: shmobile: r8a7790: add div6 clocks
-
-DIV6 clocks control SD*/MMC* core clocks.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 46632512c4b6ed9d52abe5ef3ba288d8441af73c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r8a7790.c | 34 ++++++++++++++++++++++++++++++++++
- 1 file changed, 34 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
-index c85e6432..a4810034 100644
---- a/arch/arm/mach-shmobile/clock-r8a7790.c
-+++ b/arch/arm/mach-shmobile/clock-r8a7790.c
-@@ -52,6 +52,12 @@
- 
- #define MODEMR		0xE6160060
- #define SDCKCR		0xE6150074
-+#define SD2CKCR		0xE6150078
-+#define SD3CKCR		0xE615007C
-+#define MMC0CKCR	0xE6150240
-+#define MMC1CKCR	0xE6150244
-+#define SSPCKCR		0xE6150248
-+#define SSPRSCKCR	0xE615024C
- 
- static struct clk_mapping cpg_mapping = {
- 	.phys   = CPG_BASE,
-@@ -154,6 +160,23 @@ struct clk div4_clks[DIV4_NR] = {
- 	[DIV4_SD1] = SH_CLK_DIV4(&pll1_clk, SDCKCR, 0, 0x1de0, CLK_ENABLE_ON_INIT),
- };
- 
-+/* DIV6 clocks */
-+enum {
-+	DIV6_SD2, DIV6_SD3,
-+	DIV6_MMC0, DIV6_MMC1,
-+	DIV6_SSP, DIV6_SSPRS,
-+	DIV6_NR
-+};
-+
-+static struct clk div6_clks[DIV6_NR] = {
-+	[DIV6_SD2]	= SH_CLK_DIV6(&pll1_div2_clk, SD2CKCR, 0),
-+	[DIV6_SD3]	= SH_CLK_DIV6(&pll1_div2_clk, SD3CKCR, 0),
-+	[DIV6_MMC0]	= SH_CLK_DIV6(&pll1_div2_clk, MMC0CKCR, 0),
-+	[DIV6_MMC1]	= SH_CLK_DIV6(&pll1_div2_clk, MMC1CKCR, 0),
-+	[DIV6_SSP]	= SH_CLK_DIV6(&pll1_div2_clk, SSPCKCR, 0),
-+	[DIV6_SSPRS]	= SH_CLK_DIV6(&pll1_div2_clk, SSPRSCKCR, 0),
-+};
-+
- /* MSTP */
- enum { MSTP721, MSTP720,
- 	MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP_NR };
-@@ -202,6 +225,14 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_CON_ID("sd0",		&div4_clks[DIV4_SD0]),
- 	CLKDEV_CON_ID("sd1",		&div4_clks[DIV4_SD1]),
- 
-+	/* DIV6 */
-+	CLKDEV_CON_ID("sd2",		&div6_clks[DIV6_SD2]),
-+	CLKDEV_CON_ID("sd3",		&div6_clks[DIV6_SD3]),
-+	CLKDEV_CON_ID("mmc0",		&div6_clks[DIV6_MMC0]),
-+	CLKDEV_CON_ID("mmc1",		&div6_clks[DIV6_MMC1]),
-+	CLKDEV_CON_ID("ssp",		&div6_clks[DIV6_SSP]),
-+	CLKDEV_CON_ID("ssprs",		&div6_clks[DIV6_SSPRS]),
-+
- 	/* MSTP */
- 	CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]),
- 	CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP203]),
-@@ -265,6 +296,9 @@ void __init r8a7790_clock_init(void)
- 		ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table);
- 
- 	if (!ret)
-+		ret = sh_clk_div6_register(div6_clks, DIV6_NR);
-+
-+	if (!ret)
- 		ret = sh_clk_mstp_register(mstp_clks, MSTP_NR);
- 
- 	clkdev_add_table(lookups, ARRAY_SIZE(lookups));
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0229-serial8250-em-convert-to-clk_prepare-unprepare.patch b/patches.renesas/0229-serial8250-em-convert-to-clk_prepare-unprepare.patch
deleted file mode 100644
index 7c16989ac532e..0000000000000
--- a/patches.renesas/0229-serial8250-em-convert-to-clk_prepare-unprepare.patch
+++ /dev/null
@@ -1,57 +0,0 @@
-From 1535c7a3b0fb7e70eb8a940402b650b7b346b577 Mon Sep 17 00:00:00 2001
-From: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
-Date: Tue, 8 Oct 2013 13:24:28 +0900
-Subject: serial8250-em: convert to clk_prepare/unprepare
-
-Add calls to clk_prepare and unprepare so that EMMA Mobile EV2 can
-migrate to the common clock framework.
-
-Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
-[takashi.yoshii.ze@renesas.com: edited for conflicts]
-Signed-off-by: Takashi Yoshii <takashi.yoshii.zj@renesas.com>
-Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Acked-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-
-(cherry picked from commit 12082ba2cb053e547dd3faef7af4842f2abe7c19)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/tty/serial/8250/8250_em.c | 6 +++---
- 1 file changed, 3 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/tty/serial/8250/8250_em.c b/drivers/tty/serial/8250/8250_em.c
-index 5f3bba12c159..d1a9078003bd 100644
---- a/drivers/tty/serial/8250/8250_em.c
-+++ b/drivers/tty/serial/8250/8250_em.c
-@@ -122,7 +122,7 @@ static int serial8250_em_probe(struct platform_device *pdev)
- 	up.port.dev = &pdev->dev;
- 	up.port.private_data = priv;
- 
--	clk_enable(priv->sclk);
-+	clk_prepare_enable(priv->sclk);
- 	up.port.uartclk = clk_get_rate(priv->sclk);
- 
- 	up.port.iotype = UPIO_MEM32;
-@@ -134,7 +134,7 @@ static int serial8250_em_probe(struct platform_device *pdev)
- 	ret = serial8250_register_8250_port(&up);
- 	if (ret < 0) {
- 		dev_err(&pdev->dev, "unable to register 8250 port\n");
--		clk_disable(priv->sclk);
-+		clk_disable_unprepare(priv->sclk);
- 		return ret;
- 	}
- 
-@@ -148,7 +148,7 @@ static int serial8250_em_remove(struct platform_device *pdev)
- 	struct serial8250_em_priv *priv = platform_get_drvdata(pdev);
- 
- 	serial8250_unregister_port(priv->line);
--	clk_disable(priv->sclk);
-+	clk_disable_unprepare(priv->sclk);
- 	return 0;
- }
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0230-ARM-shmobile-koelsch-reference-Remove-duplicate-CCF-.patch b/patches.renesas/0230-ARM-shmobile-koelsch-reference-Remove-duplicate-CCF-.patch
deleted file mode 100644
index 8c64c1f25c4c5..0000000000000
--- a/patches.renesas/0230-ARM-shmobile-koelsch-reference-Remove-duplicate-CCF-.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-From c6da8bb7845d29cf3a4555d01e699d0c5742f37d Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 11 Dec 2013 15:13:53 +0100
-Subject: ARM: shmobile: koelsch-reference: Remove duplicate CCF initialization
-
-The common clock framework is initialized in the rcar_gen2_init_timer()
-function, remove the of_clk_init() call.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit e006502126a6a1f3afd879afa9101cc3df8b11f9)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-koelsch-reference.c | 5 +----
- 1 file changed, 1 insertion(+), 4 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-koelsch-reference.c b/arch/arm/mach-shmobile/board-koelsch-reference.c
-index a804a1798a71..4b48e2d4dec4 100644
---- a/arch/arm/mach-shmobile/board-koelsch-reference.c
-+++ b/arch/arm/mach-shmobile/board-koelsch-reference.c
-@@ -19,7 +19,6 @@
-  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
-  */
- 
--#include <linux/clk-provider.h>
- #include <linux/kernel.h>
- #include <linux/of_platform.h>
- #include <mach/common.h>
-@@ -29,9 +28,7 @@
- 
- static void __init koelsch_add_standard_devices(void)
- {
--#ifdef CONFIG_COMMON_CLK
--	of_clk_init(NULL);
--#else
-+#ifndef CONFIG_COMMON_CLK
- 	r8a7791_clock_init();
- #endif
- 	r8a7791_add_dt_devices();
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0230-ARM-shmobile-r8a7790-Make-private-clock-arrays-stati.patch b/patches.renesas/0230-ARM-shmobile-r8a7790-Make-private-clock-arrays-stati.patch
deleted file mode 100644
index 8926929b0c699..0000000000000
--- a/patches.renesas/0230-ARM-shmobile-r8a7790-Make-private-clock-arrays-stati.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From 59e9bea3189d254819f4d4d91df56f202ee5c9a1 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 16 Apr 2013 17:16:20 +0200
-Subject: ARM: shmobile: r8a7790: Make private clock arrays static
-
-Both clock-r8a7740.c and clock-r8a7790.c define a div4_clks array as
-non-static. Compiling support for both SoCs thus result in a symbol
-redefinition. Fix it by defining the arrays as static.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 72378a4ab7fc30e1ad6a5266218ccc7933d60370)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r8a7790.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
-index a4810034..bedd20ca 100644
---- a/arch/arm/mach-shmobile/clock-r8a7790.c
-+++ b/arch/arm/mach-shmobile/clock-r8a7790.c
-@@ -154,7 +154,7 @@ enum {
- 	DIV4_SDH, DIV4_SD0, DIV4_SD1, DIV4_NR
- };
- 
--struct clk div4_clks[DIV4_NR] = {
-+static struct clk div4_clks[DIV4_NR] = {
- 	[DIV4_SDH] = SH_CLK_DIV4(&pll1_clk, SDCKCR, 8, 0x0dff, CLK_ENABLE_ON_INIT),
- 	[DIV4_SD0] = SH_CLK_DIV4(&pll1_clk, SDCKCR, 4, 0x1de0, CLK_ENABLE_ON_INIT),
- 	[DIV4_SD1] = SH_CLK_DIV4(&pll1_clk, SDCKCR, 0, 0x1de0, CLK_ENABLE_ON_INIT),
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0230-clocksource-sh_mtu2-Release-clock-when-sh_mtu2_regis.patch b/patches.renesas/0230-clocksource-sh_mtu2-Release-clock-when-sh_mtu2_regis.patch
deleted file mode 100644
index 24410d9f78418..0000000000000
--- a/patches.renesas/0230-clocksource-sh_mtu2-Release-clock-when-sh_mtu2_regis.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From 73ba8c1d897a1b0267d7a092f665fb1e40650710 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 8 Nov 2013 11:07:59 +0100
-Subject: clocksource: sh_mtu2: Release clock when sh_mtu2_register() fails
-
-Fix the probe error path to release the clock resource when the
-sh_mtu2_register() call fails.
-
-Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
-Cc: linux-kernel@vger.kernel.org
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Simon Horman <horms+renesas@verge.net.au>
-Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
-(cherry picked from commit a4a5fc3b64cd553820d97667056506636eaaba77)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/clocksource/sh_mtu2.c | 11 +++++++++--
- 1 file changed, 9 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/clocksource/sh_mtu2.c b/drivers/clocksource/sh_mtu2.c
-index 4aac9ee0d0c0..e6cfb328eb2e 100644
---- a/drivers/clocksource/sh_mtu2.c
-+++ b/drivers/clocksource/sh_mtu2.c
-@@ -313,8 +313,15 @@ static int sh_mtu2_setup(struct sh_mtu2_priv *p, struct platform_device *pdev)
- 		goto err1;
- 	}
- 
--	return sh_mtu2_register(p, (char *)dev_name(&p->pdev->dev),
--				cfg->clockevent_rating);
-+	ret = sh_mtu2_register(p, (char *)dev_name(&p->pdev->dev),
-+			       cfg->clockevent_rating);
-+	if (ret < 0)
-+		goto err2;
-+
-+	return 0;
-+
-+ err2:
-+	clk_put(p->clk);
-  err1:
- 	iounmap(p->mapbase);
-  err0:
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0231-ARM-shmobile-lager-reference-Instantiate-clkdevs-for.patch b/patches.renesas/0231-ARM-shmobile-lager-reference-Instantiate-clkdevs-for.patch
deleted file mode 100644
index d70095988d312..0000000000000
--- a/patches.renesas/0231-ARM-shmobile-lager-reference-Instantiate-clkdevs-for.patch
+++ /dev/null
@@ -1,78 +0,0 @@
-From 168764db129d318b7399d8756d85c59b259b14ed Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 11 Dec 2013 15:13:54 +0100
-Subject: ARM: shmobile: lager-reference: Instantiate clkdevs for SCIF and CMT
-
-Now that the common clock framework is supported, the clock lookup
-entries in clock-r8a7790.c are not registered anymore. Devices must
-instead reference their clocks in the device tree. However, SCIF and CMT
-devices are still instantiated through platform code, and thus need a
-clock lookup entry.
-
-Retrieve the SCIF and CMT clock entries by name and register clkdevs for
-the corresponding devices. This will be removed when the SCIF and CMT
-devices will be instantiated from the device tree.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 4a606af20d930dc1a8b62b0f753cdc018914e5de)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-lager-reference.c | 31 +++++++++++++++++++++++++-
- 1 file changed, 30 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/board-lager-reference.c b/arch/arm/mach-shmobile/board-lager-reference.c
-index fc43f7ce6577..7e3fe377e381 100644
---- a/arch/arm/mach-shmobile/board-lager-reference.c
-+++ b/arch/arm/mach-shmobile/board-lager-reference.c
-@@ -18,6 +18,8 @@
-  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
-  */
- 
-+#include <linux/clk.h>
-+#include <linux/clkdev.h>
- #include <linux/init.h>
- #include <linux/of_platform.h>
- #include <mach/common.h>
-@@ -27,9 +29,36 @@
- 
- static void __init lager_add_standard_devices(void)
- {
--#ifndef CONFIG_COMMON_CLK
-+#ifdef CONFIG_COMMON_CLK
-+	/*
-+	 * This is a really crude hack to provide clkdev support to the SCIF
-+	 * and CMT devices until they get moved to DT.
-+	 */
-+	static const char * const scif_names[] = {
-+		"scifa0", "scifa1", "scifb0", "scifb1",
-+		"scifb2", "scifa2", "scif0", "scif1",
-+		"hscif0", "hscif1",
-+	};
-+	struct clk *clk;
-+	unsigned int i;
-+
-+	for (i = 0; i < ARRAY_SIZE(scif_names); ++i) {
-+		clk = clk_get(NULL, scif_names[i]);
-+		if (clk) {
-+			clk_register_clkdev(clk, NULL, "sh-sci.%u", i);
-+			clk_put(clk);
-+		}
-+	}
-+
-+	clk = clk_get(NULL, "cmt0");
-+	if (clk) {
-+		clk_register_clkdev(clk, NULL, "sh_cmt.0");
-+		clk_put(clk);
-+	}
-+#else
- 	r8a7790_clock_init();
- #endif
-+
- 	r8a7790_add_dt_devices();
- 	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0231-ARM-shmobile-r8a7790-add-TPU-PWM-support.patch b/patches.renesas/0231-ARM-shmobile-r8a7790-add-TPU-PWM-support.patch
deleted file mode 100644
index d089e50b016f1..0000000000000
--- a/patches.renesas/0231-ARM-shmobile-r8a7790-add-TPU-PWM-support.patch
+++ /dev/null
@@ -1,48 +0,0 @@
-From 99b1297e1b4eb5c54093eb855996af321b18d51d Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 24 Apr 2013 22:36:01 +0200
-Subject: ARM: shmobile: r8a7790: add TPU PWM support
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit aa9c185bbcd9cffdb0cda1ad24edd801f70178c5)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r8a7790.c | 11 +++++++++--
- 1 file changed, 9 insertions(+), 2 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
-index bedd20ca..b393592e 100644
---- a/arch/arm/mach-shmobile/clock-r8a7790.c
-+++ b/arch/arm/mach-shmobile/clock-r8a7790.c
-@@ -48,6 +48,7 @@
- #define CPG_LEN 0x1000
- 
- #define SMSTPCR2 0xe6150138
-+#define SMSTPCR3 0xe615013c
- #define SMSTPCR7 0xe615014c
- 
- #define MODEMR		0xE6160060
-@@ -178,11 +179,17 @@ static struct clk div6_clks[DIV6_NR] = {
- };
- 
- /* MSTP */
--enum { MSTP721, MSTP720,
--	MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP_NR };
-+enum {
-+	MSTP721, MSTP720,
-+	MSTP304,
-+	MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202,
-+	MSTP_NR
-+};
-+
- static struct clk mstp_clks[MSTP_NR] = {
- 	[MSTP721] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 21, 0), /* SCIF0 */
- 	[MSTP720] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 20, 0), /* SCIF1 */
-+	[MSTP304] = SH_CLK_MSTP32(&cp_clk, SMSTPCR3, 4, 0), /* TPU0 */
- 	[MSTP216] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 16, 0), /* SCIFB2 */
- 	[MSTP207] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 7, 0), /* SCIFB1 */
- 	[MSTP206] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 6, 0), /* SCIFB0 */
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0231-clocksource-sh_mtu2-Add-clk_prepare-unprepare-suppor.patch b/patches.renesas/0231-clocksource-sh_mtu2-Add-clk_prepare-unprepare-suppor.patch
deleted file mode 100644
index aa4167bbb79c2..0000000000000
--- a/patches.renesas/0231-clocksource-sh_mtu2-Add-clk_prepare-unprepare-suppor.patch
+++ /dev/null
@@ -1,47 +0,0 @@
-From 6369c3db741997997df57df42e093d59f9a2b96b Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 8 Nov 2013 11:07:59 +0100
-Subject: clocksource: sh_mtu2: Add clk_prepare/unprepare support
-
-Prepare the clock at probe time, as there is no other appropriate place
-in the driver where we're allowed to sleep.
-
-Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
-Cc: linux-kernel@vger.kernel.org
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Simon Horman <horms+renesas@verge.net.au>
-Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
-(cherry picked from commit bd7549308eed47b3750b3dab692034a553e75663)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/clocksource/sh_mtu2.c | 9 +++++++--
- 1 file changed, 7 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/clocksource/sh_mtu2.c b/drivers/clocksource/sh_mtu2.c
-index e6cfb328eb2e..3cf12834681e 100644
---- a/drivers/clocksource/sh_mtu2.c
-+++ b/drivers/clocksource/sh_mtu2.c
-@@ -313,13 +313,18 @@ static int sh_mtu2_setup(struct sh_mtu2_priv *p, struct platform_device *pdev)
- 		goto err1;
- 	}
- 
-+	ret = clk_prepare(p->clk);
-+	if (ret < 0)
-+		goto err2;
-+
- 	ret = sh_mtu2_register(p, (char *)dev_name(&p->pdev->dev),
- 			       cfg->clockevent_rating);
- 	if (ret < 0)
--		goto err2;
-+		goto err3;
- 
- 	return 0;
--
-+ err3:
-+	clk_unprepare(p->clk);
-  err2:
- 	clk_put(p->clk);
-  err1:
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0232-ARM-shmobile-koelsch-reference-Instantiate-clkdevs-f.patch b/patches.renesas/0232-ARM-shmobile-koelsch-reference-Instantiate-clkdevs-f.patch
deleted file mode 100644
index 908ee73dcc58b..0000000000000
--- a/patches.renesas/0232-ARM-shmobile-koelsch-reference-Instantiate-clkdevs-f.patch
+++ /dev/null
@@ -1,76 +0,0 @@
-From e10014507b5d37d9683f6a821ac3fbf57d649d21 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 11 Dec 2013 15:13:55 +0100
-Subject: ARM: shmobile: koelsch-reference: Instantiate clkdevs for SCIF and
- CMT
-
-Now that the common clock framework is supported, the clock lookup
-entries in clock-r8a7791.c are not registered anymore. Devices must
-instead reference their clocks in the device tree. However, SCIF and CMT
-devices are still instantiated through platform code, and thus need a
-clock lookup entry.
-
-Retrieve the SCIF and CMT clock entries by name and register clkdevs for
-the corresponding devices. This will be removed when the SCIF and CMT
-devices will be instantiated from the device tree.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit f31239ef590186b6895a2f2cf7e0f2709a5c0da0)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-koelsch-reference.c | 30 +++++++++++++++++++++++-
- 1 file changed, 29 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/board-koelsch-reference.c b/arch/arm/mach-shmobile/board-koelsch-reference.c
-index 4b48e2d4dec4..e1c787e639eb 100644
---- a/arch/arm/mach-shmobile/board-koelsch-reference.c
-+++ b/arch/arm/mach-shmobile/board-koelsch-reference.c
-@@ -19,6 +19,8 @@
-  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
-  */
- 
-+#include <linux/clk.h>
-+#include <linux/clkdev.h>
- #include <linux/kernel.h>
- #include <linux/of_platform.h>
- #include <mach/common.h>
-@@ -28,7 +30,33 @@
- 
- static void __init koelsch_add_standard_devices(void)
- {
--#ifndef CONFIG_COMMON_CLK
-+#ifdef CONFIG_COMMON_CLK
-+	/*
-+	 * This is a really crude hack to provide clkdev support to the SCIF
-+	 * and CMT devices until they get moved to DT.
-+	 */
-+	static const char * const scif_names[] = {
-+		"scifa0", "scifa1", "scifb0", "scifb1", "scifb2", "scifa2",
-+		"scif0", "scif1", "scif2", "scif3", "scif4", "scif5", "scifa3",
-+		"scifa4", "scifa5",
-+	};
-+	struct clk *clk;
-+	unsigned int i;
-+
-+	for (i = 0; i < ARRAY_SIZE(scif_names); ++i) {
-+		clk = clk_get(NULL, scif_names[i]);
-+		if (clk) {
-+			clk_register_clkdev(clk, NULL, "sh-sci.%u", i);
-+			clk_put(clk);
-+		}
-+	}
-+
-+	clk = clk_get(NULL, "cmt0");
-+	if (clk) {
-+		clk_register_clkdev(clk, NULL, "sh_cmt.0");
-+		clk_put(clk);
-+	}
-+#else
- 	r8a7791_clock_init();
- #endif
- 	r8a7791_add_dt_devices();
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0232-ARM-shmobile-sh73a0-add-support-for-adjusting-CPU-fr.patch b/patches.renesas/0232-ARM-shmobile-sh73a0-add-support-for-adjusting-CPU-fr.patch
deleted file mode 100644
index a93406faa6dca..0000000000000
--- a/patches.renesas/0232-ARM-shmobile-sh73a0-add-support-for-adjusting-CPU-fr.patch
+++ /dev/null
@@ -1,162 +0,0 @@
-From dd9b0fc43de4278f117fc6bc092924a89e8981bb Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Fri, 5 Apr 2013 12:00:36 +0200
-Subject: ARM: shmobile: sh73a0: add support for adjusting CPU frequency
-
-On SH73A0 the output of PLL0 is supplied to two dividers, feeding clock to
-the CPU core and SGX. Lower CPU frequencies allow the use of lower supply
-voltages and thus reduce power consumption.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 73107925f4b45b81ea4732475280502fefd35efa)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-sh73a0.c | 95 ++++++++++++++++++++++++++++++++++-
- 1 file changed, 93 insertions(+), 2 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c
-index 784fbaa4..acb9e097 100644
---- a/arch/arm/mach-shmobile/clock-sh73a0.c
-+++ b/arch/arm/mach-shmobile/clock-sh73a0.c
-@@ -228,6 +228,11 @@ enum { DIV4_I, DIV4_ZG, DIV4_M3, DIV4_B, DIV4_M1, DIV4_M2,
- 
- static struct clk div4_clks[DIV4_NR] = {
- 	[DIV4_I] = DIV4(FRQCRA, 20, 0xdff, CLK_ENABLE_ON_INIT),
-+	/*
-+	 * ZG clock is dividing PLL0 frequency to supply SGX. Make sure not to
-+	 * exceed maximum frequencies of 201.5MHz for VDD_DVFS=1.175 and
-+	 * 239.2MHz for VDD_DVFS=1.315V.
-+	 */
- 	[DIV4_ZG] = SH_CLK_DIV4(&pll0_clk, FRQCRA, 16, 0xd7f, CLK_ENABLE_ON_INIT),
- 	[DIV4_M3] = DIV4(FRQCRA, 12, 0x1dff, CLK_ENABLE_ON_INIT),
- 	[DIV4_B] = DIV4(FRQCRA, 8, 0xdff, CLK_ENABLE_ON_INIT),
-@@ -252,6 +257,85 @@ static struct clk twd_clk = {
- 	.ops = &twd_clk_ops,
- };
- 
-+static int (*div4_set_rate)(struct clk *clk, unsigned long rate);
-+static unsigned long (*div4_recalc)(struct clk *clk);
-+static long (*div4_round_rate)(struct clk *clk, unsigned long rate);
-+
-+static int zclk_set_rate(struct clk *clk, unsigned long rate)
-+{
-+	int ret;
-+
-+	if (!clk->parent || !__clk_get(clk->parent))
-+		return -ENODEV;
-+
-+	if (readl(FRQCRB) & (1 << 31))
-+		return -EBUSY;
-+
-+	if (rate == clk_get_rate(clk->parent)) {
-+		/* 1:1 - switch off divider */
-+		__raw_writel(__raw_readl(FRQCRB) & ~(1 << 28), FRQCRB);
-+		/* nullify the divider to prepare for the next time */
-+		ret = div4_set_rate(clk, rate / 2);
-+		if (!ret)
-+			ret = frqcr_kick();
-+		if (ret > 0)
-+			ret = 0;
-+	} else {
-+		/* Enable the divider */
-+		__raw_writel(__raw_readl(FRQCRB) | (1 << 28), FRQCRB);
-+
-+		ret = frqcr_kick();
-+		if (ret >= 0)
-+			/*
-+			 * set the divider - call the DIV4 method, it will kick
-+			 * FRQCRB too
-+			 */
-+			ret = div4_set_rate(clk, rate);
-+		if (ret < 0)
-+			goto esetrate;
-+	}
-+
-+esetrate:
-+	__clk_put(clk->parent);
-+	return ret;
-+}
-+
-+static long zclk_round_rate(struct clk *clk, unsigned long rate)
-+{
-+	unsigned long div_freq = div4_round_rate(clk, rate),
-+		parent_freq = clk_get_rate(clk->parent);
-+
-+	if (rate > div_freq && abs(parent_freq - rate) < rate - div_freq)
-+		return parent_freq;
-+
-+	return div_freq;
-+}
-+
-+static unsigned long zclk_recalc(struct clk *clk)
-+{
-+	/*
-+	 * Must recalculate frequencies in case PLL0 has been changed, even if
-+	 * the divisor is unused ATM!
-+	 */
-+	unsigned long div_freq = div4_recalc(clk);
-+
-+	if (__raw_readl(FRQCRB) & (1 << 28))
-+		return div_freq;
-+
-+	return clk_get_rate(clk->parent);
-+}
-+
-+static void zclk_extend(void)
-+{
-+	/* We extend the DIV4 clock with a 1:1 pass-through case */
-+	div4_set_rate = div4_clks[DIV4_Z].ops->set_rate;
-+	div4_round_rate = div4_clks[DIV4_Z].ops->round_rate;
-+	div4_recalc = div4_clks[DIV4_Z].ops->recalc;
-+	div4_clks[DIV4_Z].ops->set_rate = zclk_set_rate;
-+	div4_clks[DIV4_Z].ops->round_rate = zclk_round_rate;
-+	div4_clks[DIV4_Z].ops->recalc = zclk_recalc;
-+}
-+
- enum { DIV6_VCK1, DIV6_VCK2, DIV6_VCK3, DIV6_ZB1,
- 	DIV6_FLCTL, DIV6_SDHI0, DIV6_SDHI1, DIV6_SDHI2,
- 	DIV6_FSIA, DIV6_FSIB, DIV6_SUB,
-@@ -450,7 +534,7 @@ static struct clk *late_main_clks[] = {
- };
- 
- enum { MSTP001,
--	MSTP129, MSTP128, MSTP127, MSTP126, MSTP125, MSTP118, MSTP116, MSTP100,
-+	MSTP129, MSTP128, MSTP127, MSTP126, MSTP125, MSTP118, MSTP116, MSTP112, MSTP100,
- 	MSTP219, MSTP218, MSTP217,
- 	MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,
- 	MSTP331, MSTP329, MSTP328, MSTP325, MSTP323, MSTP322,
-@@ -471,6 +555,7 @@ static struct clk mstp_clks[MSTP_NR] = {
- 	[MSTP125] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR1, 25, 0), /* TMU0 */
- 	[MSTP118] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 18, 0), /* DSITX0 */
- 	[MSTP116] = MSTP(&div4_clks[DIV4_HP], SMSTPCR1, 16, 0), /* IIC0 */
-+	[MSTP112] = MSTP(&div4_clks[DIV4_ZG], SMSTPCR1, 12, 0), /* SGX */
- 	[MSTP100] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 0, 0), /* LCDC0 */
- 	[MSTP219] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 19, 0), /* SCIFA7 */
- 	[MSTP218] = MSTP(&div4_clks[DIV4_HP], SMSTPCR2, 18, 0), /* SY-DMAC */
-@@ -513,6 +598,9 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_CON_ID("r_clk", &r_clk),
- 	CLKDEV_DEV_ID("smp_twd", &twd_clk), /* smp_twd */
- 
-+	/* DIV4 clocks */
-+	CLKDEV_DEV_ID("cpufreq-cpu0", &div4_clks[DIV4_Z]),
-+
- 	/* DIV6 clocks */
- 	CLKDEV_CON_ID("vck1_clk", &div6_clks[DIV6_VCK1]),
- 	CLKDEV_CON_ID("vck2_clk", &div6_clks[DIV6_VCK2]),
-@@ -604,8 +692,11 @@ void __init sh73a0_clock_init(void)
- 	for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++)
- 		ret = clk_register(main_clks[k]);
- 
--	if (!ret)
-+	if (!ret) {
- 		ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table);
-+		if (!ret)
-+			zclk_extend();
-+	}
- 
- 	if (!ret)
- 		ret = sh_clk_div6_reparent_register(div6_clks, DIV6_NR);
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0232-sh-pfc-r8a7740-Fix-pin-bias-setup.patch b/patches.renesas/0232-sh-pfc-r8a7740-Fix-pin-bias-setup.patch
deleted file mode 100644
index 8b07a2b841ff9..0000000000000
--- a/patches.renesas/0232-sh-pfc-r8a7740-Fix-pin-bias-setup.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From eae03881e8c5090760e84e87bccf634620842ee9 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 28 Nov 2013 16:20:03 +0100
-Subject: sh-pfc: r8a7740: Fix pin bias setup
-
-When computing the pin configuration register offset the bias setup code
-erroneously compares the pin number range with the loop index instead of
-the pin number. Fix it.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-(cherry picked from commit 5d27619498ab468e8c7e67844c640ad0915e8d85)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7740.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-index 009174d07767..bc5eb453a45c 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-@@ -3720,7 +3720,7 @@ static void __iomem *r8a7740_pinmux_portcr(struct sh_pfc *pfc, unsigned int pin)
- 		const struct r8a7740_portcr_group *group =
- 			&r8a7740_portcr_offsets[i];
- 
--		if (i <= group->end_pin)
-+		if (pin <= group->end_pin)
- 			return pfc->window->virt + group->offset + pin;
- 	}
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0233-ARM-shmobile-Remove-non-multiplatform-Lager-referenc.patch b/patches.renesas/0233-ARM-shmobile-Remove-non-multiplatform-Lager-referenc.patch
deleted file mode 100644
index a3e2b8d1802fe..0000000000000
--- a/patches.renesas/0233-ARM-shmobile-Remove-non-multiplatform-Lager-referenc.patch
+++ /dev/null
@@ -1,89 +0,0 @@
-From ad2902fc96b588703a8ea990c6d9dd3a6371dd5a Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 11 Dec 2013 15:13:56 +0100
-Subject: ARM: shmobile: Remove non-multiplatform Lager reference support
-
-Now that r8a7790 has CCF support remove the legacy Lager reference
-Kconfig bits CONFIG_MACH_LAGER_REFERENCE for the non-multiplatform
-case.
-
-Starting from this commit Lager board support is always enabled via
-CONFIG_MACH_LAGER, and CONFIG_ARCH_MULTIPLATFORM is used to select
-between board-lager.c and board-lager-reference.c
-
-The file board-lager-reference.c can no longer be used together with
-the legacy sh-clk clock framework, instead CCF is used.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit a8325d627fdd688de0b50e9edf4ed3787c6b5ee5)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/Makefile           |  1 -
- arch/arm/mach-shmobile/Kconfig       | 11 -----------
- arch/arm/mach-shmobile/Makefile      |  1 -
- arch/arm/mach-shmobile/Makefile.boot |  1 -
- 4 files changed, 14 deletions(-)
-
-diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
-index bf100833943f..59f738438c21 100644
---- a/arch/arm/boot/dts/Makefile
-+++ b/arch/arm/boot/dts/Makefile
-@@ -170,7 +170,6 @@ dtb-$(CONFIG_ARCH_SHMOBILE_LEGACY) += emev2-kzm9d.dtb \
- 	r8a7791-koelsch.dtb \
- 	r8a7791-koelsch-reference.dtb \
- 	r8a7790-lager.dtb \
--	r8a7790-lager-reference.dtb \
- 	sh73a0-kzm9g.dtb \
- 	sh73a0-kzm9g-reference.dtb \
- 	r8a73a4-ape6evm.dtb \
-diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
-index e7033a858429..88bf98011b11 100644
---- a/arch/arm/mach-shmobile/Kconfig
-+++ b/arch/arm/mach-shmobile/Kconfig
-@@ -262,17 +262,6 @@ config MACH_LAGER
- 	depends on ARCH_R8A7790
- 	select USE_OF
- 
--config MACH_LAGER_REFERENCE
--	bool "Lager board - Reference Device Tree Implementation"
--	depends on ARCH_R8A7790
--	select USE_OF
--	---help---
--	   Use reference implementation of Lager board support
--	   which makes use of device tree at the expense
--	   of not supporting a number of devices.
--
--	   This is intended to aid developers
--
- config MACH_KOELSCH
- 	bool "Koelsch board"
- 	depends on ARCH_R8A7791
-diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
-index 9daa9c16e681..fad94ee57d66 100644
---- a/arch/arm/mach-shmobile/Makefile
-+++ b/arch/arm/mach-shmobile/Makefile
-@@ -71,7 +71,6 @@ obj-$(CONFIG_MACH_GENMAI_REFERENCE)	+= board-genmai-reference.o
- obj-$(CONFIG_MACH_MARZEN)	+= board-marzen.o
- obj-$(CONFIG_MACH_MARZEN_REFERENCE)	+= board-marzen-reference.o
- obj-$(CONFIG_MACH_LAGER)	+= board-lager.o
--obj-$(CONFIG_MACH_LAGER_REFERENCE)	+= board-lager-reference.o
- obj-$(CONFIG_MACH_ARMADILLO800EVA)	+= board-armadillo800eva.o
- obj-$(CONFIG_MACH_ARMADILLO800EVA_REFERENCE)	+= board-armadillo800eva-reference.o
- obj-$(CONFIG_MACH_KOELSCH)	+= board-koelsch.o
-diff --git a/arch/arm/mach-shmobile/Makefile.boot b/arch/arm/mach-shmobile/Makefile.boot
-index 759e4f8fcd37..f6d5119eaf50 100644
---- a/arch/arm/mach-shmobile/Makefile.boot
-+++ b/arch/arm/mach-shmobile/Makefile.boot
-@@ -13,7 +13,6 @@ loadaddr-$(CONFIG_MACH_KOELSCH_REFERENCE) += 0x40008000
- loadaddr-$(CONFIG_MACH_KZM9G) += 0x41008000
- loadaddr-$(CONFIG_MACH_KZM9G_REFERENCE) += 0x41008000
- loadaddr-$(CONFIG_MACH_LAGER) += 0x40008000
--loadaddr-$(CONFIG_MACH_LAGER_REFERENCE) += 0x40008000
- loadaddr-$(CONFIG_MACH_MACKEREL) += 0x40008000
- loadaddr-$(CONFIG_MACH_MARZEN) += 0x60008000
- loadaddr-$(CONFIG_MACH_MARZEN_REFERENCE) += 0x60008000
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0233-ARM-shmobile-sh73a0-add-CPUFreq-support.patch b/patches.renesas/0233-ARM-shmobile-sh73a0-add-CPUFreq-support.patch
deleted file mode 100644
index 37be8d860f963..0000000000000
--- a/patches.renesas/0233-ARM-shmobile-sh73a0-add-CPUFreq-support.patch
+++ /dev/null
@@ -1,59 +0,0 @@
-From 70692e7ed7edd4cc844340df49509af13be76119 Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Fri, 5 Apr 2013 12:00:38 +0200
-Subject: ARM: shmobile: sh73a0: add CPUFreq support
-
-This patch enables the use of the generic cpufreq-cpu0 driver on sh73a0.
-Providing a regulator, a list of OPPs in DT, combined with a virtual
-cpufreq-cpu0 platform device and a clock, attached to it is everything,
-the cpufreq-cpu0 driver needs. The first sh73a0 platform, implementing
-such CPUFreq support is kzm9g-reference.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit d23473828c1188805c9e0b2a2e5be158d07ce7de)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/Kconfig        | 2 ++
- arch/arm/mach-shmobile/setup-sh73a0.c | 5 +++++
- 2 files changed, 7 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
-index 7a927839..b542d00d 100644
---- a/arch/arm/mach-shmobile/Kconfig
-+++ b/arch/arm/mach-shmobile/Kconfig
-@@ -184,6 +184,8 @@ config MACH_KZM9D
- config MACH_KZM9G
- 	bool "KZM-A9-GT board"
- 	depends on ARCH_SH73A0
-+	select ARCH_HAS_CPUFREQ
-+	select ARCH_HAS_OPP
- 	select ARCH_REQUIRE_GPIOLIB
- 	select REGULATOR_FIXED_VOLTAGE if REGULATOR
- 	select SND_SOC_AK4642 if SND_SIMPLE_CARD
-diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c
-index 35d512a4..127891ab 100644
---- a/arch/arm/mach-shmobile/setup-sh73a0.c
-+++ b/arch/arm/mach-shmobile/setup-sh73a0.c
-@@ -963,6 +963,8 @@ static const struct of_dev_auxdata sh73a0_auxdata_lookup[] __initconst = {
- 
- void __init sh73a0_add_standard_devices_dt(void)
- {
-+	struct platform_device_info devinfo = { .name = "cpufreq-cpu0", .id = -1, };
-+
- 	/* clocks are setup late during boot in the case of DT */
- 	sh73a0_clock_init();
- 
-@@ -970,6 +972,9 @@ void __init sh73a0_add_standard_devices_dt(void)
- 			     ARRAY_SIZE(sh73a0_devices_dt));
- 	of_platform_populate(NULL, of_default_bus_match_table,
- 			     sh73a0_auxdata_lookup, NULL);
-+
-+	/* Instantiate cpufreq-cpu0 */
-+	platform_device_register_full(&devinfo);
- }
- 
- static const char *sh73a0_boards_compat_dt[] __initdata = {
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0233-sh-pfc-sh7372-Fix-pin-bias-setup.patch b/patches.renesas/0233-sh-pfc-sh7372-Fix-pin-bias-setup.patch
deleted file mode 100644
index 92e9e150c3bfc..0000000000000
--- a/patches.renesas/0233-sh-pfc-sh7372-Fix-pin-bias-setup.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From a824067d352753324e96d0bed2a81a542e87df14 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 28 Nov 2013 16:20:04 +0100
-Subject: sh-pfc: sh7372: Fix pin bias setup
-
-When computing the pin configuration register offset the bias setup code
-erroneously compares the pin number range with the loop index instead of
-the pin number. Fix it.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-(cherry picked from commit 71493de7e55af589dbe76ce78ae2b762f9cc6f27)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-sh7372.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7372.c b/drivers/pinctrl/sh-pfc/pfc-sh7372.c
-index 70b522d34821..cc097b693820 100644
---- a/drivers/pinctrl/sh-pfc/pfc-sh7372.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-sh7372.c
-@@ -2584,7 +2584,7 @@ static void __iomem *sh7372_pinmux_portcr(struct sh_pfc *pfc, unsigned int pin)
- 		const struct sh7372_portcr_group *group =
- 			&sh7372_portcr_offsets[i];
- 
--		if (i <= group->end_pin)
-+		if (pin <= group->end_pin)
- 			return pfc->window->virt + group->offset + pin;
- 	}
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0234-ARM-shmobile-Remove-non-multiplatform-Koelsch-refere.patch b/patches.renesas/0234-ARM-shmobile-Remove-non-multiplatform-Koelsch-refere.patch
deleted file mode 100644
index 49587e38be0e9..0000000000000
--- a/patches.renesas/0234-ARM-shmobile-Remove-non-multiplatform-Koelsch-refere.patch
+++ /dev/null
@@ -1,78 +0,0 @@
-From 9eff15d24d92ae14c9c328b9f2c32b4603230e55 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 11 Dec 2013 15:13:57 +0100
-Subject: ARM: shmobile: Remove non-multiplatform Koelsch reference support
-
-Now that r8a7791 has CCF support remove the legacy Koelsch reference
-Kconfig bits CONFIG_MACH_KOELSCH_REFERENCE for the non-multiplatform
-case.
-
-Starting from this commit Koelsch board support is always enabled via
-CONFIG_MACH_KOELSCH, and CONFIG_ARCH_MULTIPLATFORM is used to select
-between board-koelsch.c and board-koelsch-reference.c
-
-The file board-koelsch-reference.c can no longer be used together with
-the legacy sh-clk clock framework, instead CCF is used.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-[horms+renesas@verge.net.au: Dropped arch/arm/boot/dts/Makefile portion]
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-(cherry picked from commit 469cd76b53b474e3fa235656eef4257a5134b0d8)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/Kconfig       | 11 -----------
- arch/arm/mach-shmobile/Makefile      |  1 -
- arch/arm/mach-shmobile/Makefile.boot |  1 -
- 3 files changed, 13 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
-index 88bf98011b11..338640631e08 100644
---- a/arch/arm/mach-shmobile/Kconfig
-+++ b/arch/arm/mach-shmobile/Kconfig
-@@ -268,17 +268,6 @@ config MACH_KOELSCH
- 	select USE_OF
- 	select MICREL_PHY if SH_ETH
- 
--config MACH_KOELSCH_REFERENCE
--	bool "Koelsch board - Reference Device Tree Implementation"
--	depends on ARCH_R8A7791
--	select USE_OF
--	---help---
--	   Use reference implementation of Koelsch board support
--	   which makes use of device tree at the expense
--	   of not supporting a number of devices.
--
--	   This is intended to aid developers
--
- config MACH_KZM9G
- 	bool "KZM-A9-GT board"
- 	depends on ARCH_SH73A0
-diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
-index fad94ee57d66..fe7d4ff706e4 100644
---- a/arch/arm/mach-shmobile/Makefile
-+++ b/arch/arm/mach-shmobile/Makefile
-@@ -74,7 +74,6 @@ obj-$(CONFIG_MACH_LAGER)	+= board-lager.o
- obj-$(CONFIG_MACH_ARMADILLO800EVA)	+= board-armadillo800eva.o
- obj-$(CONFIG_MACH_ARMADILLO800EVA_REFERENCE)	+= board-armadillo800eva-reference.o
- obj-$(CONFIG_MACH_KOELSCH)	+= board-koelsch.o
--obj-$(CONFIG_MACH_KOELSCH_REFERENCE)	+= board-koelsch-reference.o
- obj-$(CONFIG_MACH_KZM9G)	+= board-kzm9g.o
- obj-$(CONFIG_MACH_KZM9G_REFERENCE)	+= board-kzm9g-reference.o
- endif
-diff --git a/arch/arm/mach-shmobile/Makefile.boot b/arch/arm/mach-shmobile/Makefile.boot
-index f6d5119eaf50..99455ecafa05 100644
---- a/arch/arm/mach-shmobile/Makefile.boot
-+++ b/arch/arm/mach-shmobile/Makefile.boot
-@@ -9,7 +9,6 @@ loadaddr-$(CONFIG_MACH_BOCKW_REFERENCE) += 0x60008000
- loadaddr-$(CONFIG_MACH_GENMAI) += 0x08008000
- loadaddr-$(CONFIG_MACH_GENMAI_REFERENCE) += 0x08008000
- loadaddr-$(CONFIG_MACH_KOELSCH) += 0x40008000
--loadaddr-$(CONFIG_MACH_KOELSCH_REFERENCE) += 0x40008000
- loadaddr-$(CONFIG_MACH_KZM9G) += 0x41008000
- loadaddr-$(CONFIG_MACH_KZM9G_REFERENCE) += 0x41008000
- loadaddr-$(CONFIG_MACH_LAGER) += 0x40008000
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0234-ARM-shmobile-sh73a0-Always-use-shmobile_setup_delay.patch b/patches.renesas/0234-ARM-shmobile-sh73a0-Always-use-shmobile_setup_delay.patch
deleted file mode 100644
index 3ab0adbf23edb..0000000000000
--- a/patches.renesas/0234-ARM-shmobile-sh73a0-Always-use-shmobile_setup_delay.patch
+++ /dev/null
@@ -1,59 +0,0 @@
-From 7d0c1866145a9e3aee40297483294b564513f70c Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Wed, 22 May 2013 15:04:14 +0900
-Subject: ARM: shmobile: sh73a0: Always use shmobile_setup_delay()
-
-Break out the function sh73a0_init_delay() that now
-gets called both for the C version of the code and
-the DT -reference boards. This way we handle both
-cases in the same way.
-
-Allows us to boot with TWD only in the kernel configuration
-for C board code. TWD is not yet enabled in the case of
-DT -reference - this due to a dependency on CCF.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 43cb8cb739b9d5f9f723b1953c58b95d3102d821)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-sh73a0.c | 11 ++++++-----
- 1 file changed, 6 insertions(+), 5 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c
-index 127891ab..96e7ca1e 100644
---- a/arch/arm/mach-shmobile/setup-sh73a0.c
-+++ b/arch/arm/mach-shmobile/setup-sh73a0.c
-@@ -929,11 +929,17 @@ void __init sh73a0_add_standard_devices(void)
- 			    ARRAY_SIZE(sh73a0_late_devices));
- }
- 
-+void __init sh73a0_init_delay(void)
-+{
-+	shmobile_setup_delay(1196, 44, 46); /* Cortex-A9 @ 1196MHz */
-+}
-+
- /* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */
- void __init __weak sh73a0_register_twd(void) { }
- 
- void __init sh73a0_earlytimer_init(void)
- {
-+	sh73a0_init_delay();
- 	sh73a0_clock_init();
- 	shmobile_earlytimer_init();
- 	sh73a0_register_twd();
-@@ -952,11 +958,6 @@ void __init sh73a0_add_early_devices(void)
- 
- #ifdef CONFIG_USE_OF
- 
--void __init sh73a0_init_delay(void)
--{
--	shmobile_setup_delay(1196, 44, 46); /* Cortex-A9 @ 1196MHz */
--}
--
- static const struct of_dev_auxdata sh73a0_auxdata_lookup[] __initconst = {
- 	{},
- };
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0234-clocksource-sh_tmu-Release-clock-when-sh_tmu_registe.patch b/patches.renesas/0234-clocksource-sh_tmu-Release-clock-when-sh_tmu_registe.patch
deleted file mode 100644
index 87fdf2eb587b2..0000000000000
--- a/patches.renesas/0234-clocksource-sh_tmu-Release-clock-when-sh_tmu_registe.patch
+++ /dev/null
@@ -1,46 +0,0 @@
-From de5cdaf59e2f36c645321481f86070ebfa93338c Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 8 Nov 2013 11:07:59 +0100
-Subject: clocksource: sh_tmu: Release clock when sh_tmu_register() fails
-
-Fix the probe error path to release the clock resource when the
-sh_tmu_register() call fails.
-
-Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
-Cc: linux-kernel@vger.kernel.org
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Simon Horman <horms+renesas@verge.net.au>
-Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
-(cherry picked from commit 394a4486f009a184b58fc2f2435d6f5f800870bb)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/clocksource/sh_tmu.c | 13 ++++++++++---
- 1 file changed, 10 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/clocksource/sh_tmu.c b/drivers/clocksource/sh_tmu.c
-index 78b8dae49628..15978372c937 100644
---- a/drivers/clocksource/sh_tmu.c
-+++ b/drivers/clocksource/sh_tmu.c
-@@ -475,9 +475,16 @@ static int sh_tmu_setup(struct sh_tmu_priv *p, struct platform_device *pdev)
- 	p->cs_enabled = false;
- 	p->enable_count = 0;
- 
--	return sh_tmu_register(p, (char *)dev_name(&p->pdev->dev),
--			       cfg->clockevent_rating,
--			       cfg->clocksource_rating);
-+	ret = sh_tmu_register(p, (char *)dev_name(&p->pdev->dev),
-+			      cfg->clockevent_rating,
-+			      cfg->clocksource_rating);
-+	if (ret < 0)
-+		goto err2;
-+
-+	return 0;
-+
-+ err2:
-+	clk_put(p->clk);
-  err1:
- 	iounmap(p->mapbase);
-  err0:
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0235-ARM-shmobile-Let-Lager-multiplatform-boot-with-Lager.patch b/patches.renesas/0235-ARM-shmobile-Let-Lager-multiplatform-boot-with-Lager.patch
deleted file mode 100644
index 56f0ba55c0a65..0000000000000
--- a/patches.renesas/0235-ARM-shmobile-Let-Lager-multiplatform-boot-with-Lager.patch
+++ /dev/null
@@ -1,46 +0,0 @@
-From 49d9a8207b4026cd4874a92e9fe89783eb83a857 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 11 Dec 2013 15:13:58 +0100
-Subject: ARM: shmobile: Let Lager multiplatform boot with Lager DTB
-
-Let the multiplatform Lager support boot with the legacy DTS for Lager
-as well as the Lager reference DTS.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 1fb68146d5fa7656f48bc5caaa74312b7fc7257e)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/Makefile                     | 2 +-
- arch/arm/mach-shmobile/board-lager-reference.c | 1 +
- 2 files changed, 2 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
-index 59f738438c21..ceca59222fd8 100644
---- a/arch/arm/boot/dts/Makefile
-+++ b/arch/arm/boot/dts/Makefile
-@@ -177,7 +177,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE_LEGACY) += emev2-kzm9d.dtb \
- 	sh7372-mackerel.dtb
- dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += emev2-kzm9d.dtb \
- 	r7s72100-genmai-reference.dtb \
--	r8a7790-lager-reference.dtb \
-+	r8a7790-lager.dtb \
- 	r8a7791-koelsch-reference.dtb
- dtb-$(CONFIG_ARCH_SOCFPGA) += socfpga_cyclone5.dtb \
- 	socfpga_vt.dtb
-diff --git a/arch/arm/mach-shmobile/board-lager-reference.c b/arch/arm/mach-shmobile/board-lager-reference.c
-index 7e3fe377e381..a6e271d92af0 100644
---- a/arch/arm/mach-shmobile/board-lager-reference.c
-+++ b/arch/arm/mach-shmobile/board-lager-reference.c
-@@ -64,6 +64,7 @@ static void __init lager_add_standard_devices(void)
- }
- 
- static const char *lager_boards_compat_dt[] __initdata = {
-+	"renesas,lager",
- 	"renesas,lager-reference",
- 	NULL,
- };
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0235-ARM-shmobile-sh73a0-do-not-overwrite-all-div4-clock-.patch b/patches.renesas/0235-ARM-shmobile-sh73a0-do-not-overwrite-all-div4-clock-.patch
deleted file mode 100644
index 4a55069fdab3c..0000000000000
--- a/patches.renesas/0235-ARM-shmobile-sh73a0-do-not-overwrite-all-div4-clock-.patch
+++ /dev/null
@@ -1,97 +0,0 @@
-From 5142f0248dbf960a651236eb5b702eda069d9c51 Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Thu, 23 May 2013 00:09:36 +0200
-Subject: ARM: shmobile: sh73a0: do not overwrite all div4 clock operations
-
-An earlier commit "ARM: shmobile: sh73a0: add support for adjusting CPU
-frequency" intended to replace some clock operations only for the Z-clock,
-instead it replaced them for all div4 clocks, since all div4 clocks share
-the same copy of clock operations. Fix this by using a separate clock
-operations structure for Z-clock.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 3b207a45f909a73b6d7fbdcef49e9287ad7385af)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-sh73a0.c | 28 +++++++++++++++-------------
- 1 file changed, 15 insertions(+), 13 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c
-index acb9e097..d05cf903 100644
---- a/arch/arm/mach-shmobile/clock-sh73a0.c
-+++ b/arch/arm/mach-shmobile/clock-sh73a0.c
-@@ -257,9 +257,8 @@ static struct clk twd_clk = {
- 	.ops = &twd_clk_ops,
- };
- 
--static int (*div4_set_rate)(struct clk *clk, unsigned long rate);
--static unsigned long (*div4_recalc)(struct clk *clk);
--static long (*div4_round_rate)(struct clk *clk, unsigned long rate);
-+static struct sh_clk_ops zclk_ops;
-+static const struct sh_clk_ops *div4_clk_ops;
- 
- static int zclk_set_rate(struct clk *clk, unsigned long rate)
- {
-@@ -275,7 +274,7 @@ static int zclk_set_rate(struct clk *clk, unsigned long rate)
- 		/* 1:1 - switch off divider */
- 		__raw_writel(__raw_readl(FRQCRB) & ~(1 << 28), FRQCRB);
- 		/* nullify the divider to prepare for the next time */
--		ret = div4_set_rate(clk, rate / 2);
-+		ret = div4_clk_ops->set_rate(clk, rate / 2);
- 		if (!ret)
- 			ret = frqcr_kick();
- 		if (ret > 0)
-@@ -290,7 +289,7 @@ static int zclk_set_rate(struct clk *clk, unsigned long rate)
- 			 * set the divider - call the DIV4 method, it will kick
- 			 * FRQCRB too
- 			 */
--			ret = div4_set_rate(clk, rate);
-+			ret = div4_clk_ops->set_rate(clk, rate);
- 		if (ret < 0)
- 			goto esetrate;
- 	}
-@@ -302,7 +301,7 @@ esetrate:
- 
- static long zclk_round_rate(struct clk *clk, unsigned long rate)
- {
--	unsigned long div_freq = div4_round_rate(clk, rate),
-+	unsigned long div_freq = div4_clk_ops->round_rate(clk, rate),
- 		parent_freq = clk_get_rate(clk->parent);
- 
- 	if (rate > div_freq && abs(parent_freq - rate) < rate - div_freq)
-@@ -317,7 +316,7 @@ static unsigned long zclk_recalc(struct clk *clk)
- 	 * Must recalculate frequencies in case PLL0 has been changed, even if
- 	 * the divisor is unused ATM!
- 	 */
--	unsigned long div_freq = div4_recalc(clk);
-+	unsigned long div_freq = div4_clk_ops->recalc(clk);
- 
- 	if (__raw_readl(FRQCRB) & (1 << 28))
- 		return div_freq;
-@@ -327,13 +326,16 @@ static unsigned long zclk_recalc(struct clk *clk)
- 
- static void zclk_extend(void)
- {
-+	div4_clk_ops = div4_clks[DIV4_Z].ops;
-+
- 	/* We extend the DIV4 clock with a 1:1 pass-through case */
--	div4_set_rate = div4_clks[DIV4_Z].ops->set_rate;
--	div4_round_rate = div4_clks[DIV4_Z].ops->round_rate;
--	div4_recalc = div4_clks[DIV4_Z].ops->recalc;
--	div4_clks[DIV4_Z].ops->set_rate = zclk_set_rate;
--	div4_clks[DIV4_Z].ops->round_rate = zclk_round_rate;
--	div4_clks[DIV4_Z].ops->recalc = zclk_recalc;
-+	zclk_ops = *div4_clk_ops;
-+
-+	zclk_ops.set_rate = zclk_set_rate;
-+	zclk_ops.round_rate = zclk_round_rate;
-+	zclk_ops.recalc = zclk_recalc;
-+
-+	div4_clks[DIV4_Z].ops = &zclk_ops;
- }
- 
- enum { DIV6_VCK1, DIV6_VCK2, DIV6_VCK3, DIV6_ZB1,
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0235-clocksource-sh_tmu-Add-clk_prepare-unprepare-support.patch b/patches.renesas/0235-clocksource-sh_tmu-Add-clk_prepare-unprepare-support.patch
deleted file mode 100644
index 6ef1edb436c97..0000000000000
--- a/patches.renesas/0235-clocksource-sh_tmu-Add-clk_prepare-unprepare-support.patch
+++ /dev/null
@@ -1,52 +0,0 @@
-From 1f363ca74418dcabd44f58e503fa9b6935c40b3b Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 8 Nov 2013 11:08:00 +0100
-Subject: clocksource: sh_tmu: Add clk_prepare/unprepare support
-
-Prepare the clock at probe time, as there is no other appropriate place
-in the driver where we're allowed to sleep.
-
-Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
-Cc: linux-kernel@vger.kernel.org
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Simon Horman <horms+renesas@verge.net.au>
-Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
-(cherry picked from commit 1c09eb3e2d761ffd152faa6b9d06caf560e7d445)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/clocksource/sh_tmu.c | 9 ++++++++-
- 1 file changed, 8 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/clocksource/sh_tmu.c b/drivers/clocksource/sh_tmu.c
-index 15978372c937..63557cda0a7d 100644
---- a/drivers/clocksource/sh_tmu.c
-+++ b/drivers/clocksource/sh_tmu.c
-@@ -472,6 +472,11 @@ static int sh_tmu_setup(struct sh_tmu_priv *p, struct platform_device *pdev)
- 		ret = PTR_ERR(p->clk);
- 		goto err1;
- 	}
-+
-+	ret = clk_prepare(p->clk);
-+	if (ret < 0)
-+		goto err2;
-+
- 	p->cs_enabled = false;
- 	p->enable_count = 0;
- 
-@@ -479,10 +484,12 @@ static int sh_tmu_setup(struct sh_tmu_priv *p, struct platform_device *pdev)
- 			      cfg->clockevent_rating,
- 			      cfg->clocksource_rating);
- 	if (ret < 0)
--		goto err2;
-+		goto err3;
- 
- 	return 0;
- 
-+ err3:
-+	clk_unprepare(p->clk);
-  err2:
- 	clk_put(p->clk);
-  err1:
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0236-ARM-shmobile-Let-Koelsch-multiplatform-boot-with-Koe.patch b/patches.renesas/0236-ARM-shmobile-Let-Koelsch-multiplatform-boot-with-Koe.patch
deleted file mode 100644
index d0d7c37962f6b..0000000000000
--- a/patches.renesas/0236-ARM-shmobile-Let-Koelsch-multiplatform-boot-with-Koe.patch
+++ /dev/null
@@ -1,51 +0,0 @@
-From 33e372859522144c83460ed965b20a3688734d78 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 11 Dec 2013 15:13:59 +0100
-Subject: ARM: shmobile: Let Koelsch multiplatform boot with Koelsch DTB
-
-Let the multiplatform Koelsch support boot with the legacy DTS for
-Koelsch as well as the Koelsch reference DTS.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 1d2bdbc3a8f93b8c1dfc95b2df89c266dd6ce9d0)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-	arch/arm/boot/dts/Makefile
----
- arch/arm/boot/dts/Makefile                       | 4 ++--
- arch/arm/mach-shmobile/board-koelsch-reference.c | 1 +
- 2 files changed, 3 insertions(+), 2 deletions(-)
-
-diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
-index ceca59222fd8..f9a8196323bf 100644
---- a/arch/arm/boot/dts/Makefile
-+++ b/arch/arm/boot/dts/Makefile
-@@ -177,8 +177,8 @@ dtb-$(CONFIG_ARCH_SHMOBILE_LEGACY) += emev2-kzm9d.dtb \
- 	sh7372-mackerel.dtb
- dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += emev2-kzm9d.dtb \
- 	r7s72100-genmai-reference.dtb \
--	r8a7790-lager.dtb \
--	r8a7791-koelsch-reference.dtb
-+	r8a7791-koelsch.dtb \
-+	r8a7790-lager.dtb
- dtb-$(CONFIG_ARCH_SOCFPGA) += socfpga_cyclone5.dtb \
- 	socfpga_vt.dtb
- dtb-$(CONFIG_ARCH_SPEAR13XX) += spear1310-evb.dtb \
-diff --git a/arch/arm/mach-shmobile/board-koelsch-reference.c b/arch/arm/mach-shmobile/board-koelsch-reference.c
-index e1c787e639eb..652b59268416 100644
---- a/arch/arm/mach-shmobile/board-koelsch-reference.c
-+++ b/arch/arm/mach-shmobile/board-koelsch-reference.c
-@@ -64,6 +64,7 @@ static void __init koelsch_add_standard_devices(void)
- }
- 
- static const char * const koelsch_boards_compat_dt[] __initconst = {
-+	"renesas,koelsch",
- 	"renesas,koelsch-reference",
- 	NULL,
- };
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0236-ARM-shmobile-sh73a0-div4-clocks-must-check-the-kick-.patch b/patches.renesas/0236-ARM-shmobile-sh73a0-div4-clocks-must-check-the-kick-.patch
deleted file mode 100644
index cbf999e0bc21a..0000000000000
--- a/patches.renesas/0236-ARM-shmobile-sh73a0-div4-clocks-must-check-the-kick-.patch
+++ /dev/null
@@ -1,79 +0,0 @@
-From dd927617ab0fb585bb466cf7660db0bf3f89c522 Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Thu, 23 May 2013 00:10:00 +0200
-Subject: ARM: shmobile: sh73a0: div4 clocks must check the kick bit before
- changing rate
-
-According to the datasheet, it is not allowed to change div4 clock rates
-if an earlier rate change operation is still in progress, as indicated by
-a set kick bit.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 413bfd0e67894c930242482cd15ac09a800e2ab8)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-sh73a0.c | 24 +++++++++++++++++++-----
- 1 file changed, 19 insertions(+), 5 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c
-index d05cf903..d9fd0336 100644
---- a/arch/arm/mach-shmobile/clock-sh73a0.c
-+++ b/arch/arm/mach-shmobile/clock-sh73a0.c
-@@ -257,7 +257,7 @@ static struct clk twd_clk = {
- 	.ops = &twd_clk_ops,
- };
- 
--static struct sh_clk_ops zclk_ops;
-+static struct sh_clk_ops zclk_ops, kicker_ops;
- static const struct sh_clk_ops *div4_clk_ops;
- 
- static int zclk_set_rate(struct clk *clk, unsigned long rate)
-@@ -324,18 +324,32 @@ static unsigned long zclk_recalc(struct clk *clk)
- 	return clk_get_rate(clk->parent);
- }
- 
--static void zclk_extend(void)
-+static int kicker_set_rate(struct clk *clk, unsigned long rate)
- {
--	div4_clk_ops = div4_clks[DIV4_Z].ops;
-+	if (__raw_readl(FRQCRB) & (1 << 31))
-+		return -EBUSY;
-+
-+	return div4_clk_ops->set_rate(clk, rate);
-+}
-+
-+static void div4_clk_extend(void)
-+{
-+	int i;
-+
-+	div4_clk_ops = div4_clks[0].ops;
- 
-+	/* Add a kicker-busy check before changing the rate */
-+	kicker_ops = *div4_clk_ops;
- 	/* We extend the DIV4 clock with a 1:1 pass-through case */
- 	zclk_ops = *div4_clk_ops;
- 
-+	kicker_ops.set_rate = kicker_set_rate;
- 	zclk_ops.set_rate = zclk_set_rate;
- 	zclk_ops.round_rate = zclk_round_rate;
- 	zclk_ops.recalc = zclk_recalc;
- 
--	div4_clks[DIV4_Z].ops = &zclk_ops;
-+	for (i = 0; i < DIV4_NR; i++)
-+		div4_clks[i].ops = i == DIV4_Z ? &zclk_ops : &kicker_ops;
- }
- 
- enum { DIV6_VCK1, DIV6_VCK2, DIV6_VCK3, DIV6_ZB1,
-@@ -697,7 +711,7 @@ void __init sh73a0_clock_init(void)
- 	if (!ret) {
- 		ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table);
- 		if (!ret)
--			zclk_extend();
-+			div4_clk_extend();
- 	}
- 
- 	if (!ret)
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0236-irqchip-Gic-fix-boot-for-chained-gics.patch b/patches.renesas/0236-irqchip-Gic-fix-boot-for-chained-gics.patch
deleted file mode 100644
index ecce6833bab7b..0000000000000
--- a/patches.renesas/0236-irqchip-Gic-fix-boot-for-chained-gics.patch
+++ /dev/null
@@ -1,55 +0,0 @@
-From d93f0df4c0b19c686887d865a71f8380d90b3bbf Mon Sep 17 00:00:00 2001
-From: Mark Rutland <mark.rutland@arm.com>
-Date: Thu, 28 Nov 2013 14:21:40 +0000
-Subject: irqchip: Gic: fix boot for chained gics
-
-As of c0114709ed: "irqchip: gic: Perform the gic_secondary_init() call
-via CPU notifier", booting on a platform with chained gics (e.g.
-Realview EB ARM11MPCore) will result in the gic_cpu_notifier being
-registered twice, corrupting the cpu notifier list and rendering the
-platform unbootable.
-
-This patch ensures that we only register the notifier for the first
-gic, allowing platforms with chained gics to boot. At the same time we
-limit the pointlessly duplicated calls to set_smp_cross_call and
-set_handle_irq to the first gic registered.
-
-Signed-off-by: Mark Rutland <mark.rutland@arm.com>
-Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
-Cc: linux-arm-kernel@lists.infradead.org
-Cc: marc.zyngier@arm.com
-Cc: rob.herring@calxeda.com
-Cc: olof@lixom.net
-Link: http://lkml.kernel.org/r/1385648500-29048-1-git-send-email-mark.rutland@arm.com
-Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
-(cherry picked from commit 08332dff8adebb74171e98e008d6c20de6658c42)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/irqchip/irq-gic.c | 9 +++++----
- 1 file changed, 5 insertions(+), 4 deletions(-)
-
-diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
-index 70e4a3080029..74e1ffe1cd3d 100644
---- a/drivers/irqchip/irq-gic.c
-+++ b/drivers/irqchip/irq-gic.c
-@@ -936,12 +936,13 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start,
- 	if (WARN_ON(!gic->domain))
- 		return;
- 
-+	if (gic_nr == 0) {
- #ifdef CONFIG_SMP
--	set_smp_cross_call(gic_raise_softirq);
--	register_cpu_notifier(&gic_cpu_notifier);
-+		set_smp_cross_call(gic_raise_softirq);
-+		register_cpu_notifier(&gic_cpu_notifier);
- #endif
--
--	set_handle_irq(gic_handle_irq);
-+		set_handle_irq(gic_handle_irq);
-+	}
- 
- 	gic_chip.flags |= gic_arch_extn.flags;
- 	gic_dist_init(gic);
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0237-ARM-shmobile-ape6evm-MP-clock-parent-become-EXTAL2.patch b/patches.renesas/0237-ARM-shmobile-ape6evm-MP-clock-parent-become-EXTAL2.patch
deleted file mode 100644
index cc5a1c6c22d74..0000000000000
--- a/patches.renesas/0237-ARM-shmobile-ape6evm-MP-clock-parent-become-EXTAL2.patch
+++ /dev/null
@@ -1,56 +0,0 @@
-From 5993447e837757df142b3efedec71b9d269414fe Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Thu, 4 Apr 2013 21:24:27 -0700
-Subject: ARM: shmobile: ape6evm: MP clock parent become EXTAL2
-
-The orignal commit 3263e09d287fbaa8a9424b5e69396599a3bbd518
-(ARM: shmobile: Initial r8a73a4 SoC support V3)
-put MP clock parent as EXTAL2, but its code was removed
-on DIV6 clock support commit.
-This patch makes it consistent.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit b8568a0483a3363eda73d629536c8a019256a0bf)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-ape6evm.c | 15 +++++++++++++++
- 1 file changed, 15 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/board-ape6evm.c b/arch/arm/mach-shmobile/board-ape6evm.c
-index 55b8c9fe..5eb0caa6 100644
---- a/arch/arm/mach-shmobile/board-ape6evm.c
-+++ b/arch/arm/mach-shmobile/board-ape6evm.c
-@@ -26,6 +26,7 @@
- #include <linux/platform_device.h>
- #include <linux/regulator/fixed.h>
- #include <linux/regulator/machine.h>
-+#include <linux/sh_clk.h>
- #include <linux/smsc911x.h>
- #include <mach/common.h>
- #include <mach/irqs.h>
-@@ -65,7 +66,21 @@ static const struct pinctrl_map ape6evm_pinctrl_map[] = {
- 
- static void __init ape6evm_add_standard_devices(void)
- {
-+
-+	struct clk *parent;
-+	struct clk *mp;
-+
- 	r8a73a4_clock_init();
-+
-+	/* MP clock parent = extal2 */
-+	parent      = clk_get(NULL, "extal2");
-+	mp          = clk_get(NULL, "mp");
-+	BUG_ON(IS_ERR(parent) || IS_ERR(mp));
-+
-+	clk_set_parent(mp, parent);
-+	clk_put(parent);
-+	clk_put(mp);
-+
- 	pinctrl_register_mappings(ape6evm_pinctrl_map,
- 				  ARRAY_SIZE(ape6evm_pinctrl_map));
- 	r8a73a4_pinmux_init();
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0237-ARM-shmobile-mackerel-Fix-USBHS-pinconf-entry.patch b/patches.renesas/0237-ARM-shmobile-mackerel-Fix-USBHS-pinconf-entry.patch
deleted file mode 100644
index 5e059ca77894f..0000000000000
--- a/patches.renesas/0237-ARM-shmobile-mackerel-Fix-USBHS-pinconf-entry.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From 215c93372dd038546c978d231b7b9ed499622b0d Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Sat, 14 Dec 2013 15:45:01 +0100
-Subject: ARM: shmobile: mackerel: Fix USBHS pinconf entry
-
-Fix a typo in the USBHS1 pinconf entry that prevented the pull-down from
-being enabled.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit b58c8e7b43ad804ad18b30f882b16da2e3d4ed9d)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-mackerel.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c
-index 207acf0e07da..b3ee96e31b82 100644
---- a/arch/arm/mach-shmobile/board-mackerel.c
-+++ b/arch/arm/mach-shmobile/board-mackerel.c
-@@ -1406,7 +1406,7 @@ static const struct pinctrl_map mackerel_pinctrl_map[] = {
- 	/* USBHS1 */
- 	PIN_MAP_MUX_GROUP_DEFAULT("renesas_usbhs.1", "pfc-sh7372",
- 				  "usb1_vbus", "usb1"),
--	PIN_MAP_CONFIGS_GROUP_DEFAULT("renesas_usbhs.&", "pfc-sh7372",
-+	PIN_MAP_CONFIGS_GROUP_DEFAULT("renesas_usbhs.1", "pfc-sh7372",
- 				      "usb1_vbus", pin_pulldown_conf),
- 	PIN_MAP_MUX_GROUP_DEFAULT("renesas_usbhs.1", "pfc-sh7372",
- 				  "usb1_otg_id_0", "usb1"),
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0237-ASoC-rcar-select-REGMAP.patch b/patches.renesas/0237-ASoC-rcar-select-REGMAP.patch
deleted file mode 100644
index 4c87ad1bc034c..0000000000000
--- a/patches.renesas/0237-ASoC-rcar-select-REGMAP.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From a559c32f42ab2dc34dbb54937817b248ed5b6173 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Thu, 7 Nov 2013 00:56:28 -0800
-Subject: ASoC: rcar: select REGMAP
-
-55e5b6fd5af04b6d8b0ac6635edf49476ff298ba
-(ASoC: rsnd: use regmap instead of original register mapping method)
-support regmap/regmap_field on Renesas sound driver.
-It needs CONFIG_REGMAP now.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Mark Brown <broonie@linaro.org>
-(cherry picked from commit 0fb50e5539c1525939b89c1813b60cc72f90a3e1)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- sound/soc/sh/Kconfig | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/sound/soc/sh/Kconfig b/sound/soc/sh/Kconfig
-index 14011d90d70a..ff60e11ecb56 100644
---- a/sound/soc/sh/Kconfig
-+++ b/sound/soc/sh/Kconfig
-@@ -37,6 +37,7 @@ config SND_SOC_SH4_SIU
- config SND_SOC_RCAR
- 	tristate "R-Car series SRU/SCU/SSIU/SSI support"
- 	select SND_SIMPLE_CARD
-+	select REGMAP
- 	help
- 	  This option enables R-Car SUR/SCU/SSIU/SSI sound support
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0238-ARM-shmobile-armadillo-dts-Add-PWM-backlight-power-s.patch b/patches.renesas/0238-ARM-shmobile-armadillo-dts-Add-PWM-backlight-power-s.patch
deleted file mode 100644
index 437dca57242f2..0000000000000
--- a/patches.renesas/0238-ARM-shmobile-armadillo-dts-Add-PWM-backlight-power-s.patch
+++ /dev/null
@@ -1,50 +0,0 @@
-From 6df476de3d1c029829a2d090043bdd7b336eaff0 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 11 Dec 2013 03:48:17 +0100
-Subject: ARM: shmobile: armadillo: dts: Add PWM backlight power supply
-
-Commit 22ceeee16eb8f0d04de3ef43a5174fb30ec18af9 ("pwm-backlight: Add
-power supply support") added a mandatory power supply for the PWM
-backlight. Add a fixed 5V regulator and reference it for the backlight
-power supply.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit aeb193606d44bd37b2178c6b2b6f25ff679656a3)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts | 10 ++++++++++
- 1 file changed, 10 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
-index 6d6fd3dff2d3..470575952297 100644
---- a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
-+++ b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
-@@ -63,6 +63,15 @@
- 		enable-active-high;
- 	};
- 
-+	reg_5p0v: regulator@3 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "fixed-5.0V";
-+		regulator-min-microvolt = <5000000>;
-+		regulator-max-microvolt = <5000000>;
-+		regulator-always-on;
-+		regulator-boot-on;
-+	};
-+
- 	leds {
- 		compatible = "gpio-leds";
- 		led1 {
-@@ -86,6 +95,7 @@
- 		default-brightness-level = <9>;
- 		pinctrl-0 = <&backlight_pins>;
- 		pinctrl-names = "default";
-+		power-supply = <&reg_5p0v>;
- 	};
- 
- 	sound {
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0238-ARM-shmobile-bockw-define-FPGA-address-and-rename-io.patch b/patches.renesas/0238-ARM-shmobile-bockw-define-FPGA-address-and-rename-io.patch
deleted file mode 100644
index 59c3dd303110e..0000000000000
--- a/patches.renesas/0238-ARM-shmobile-bockw-define-FPGA-address-and-rename-io.patch
+++ /dev/null
@@ -1,61 +0,0 @@
-From f804c862abb7b1cabc5f930c71dc3ab187732095 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Tue, 16 Apr 2013 22:17:42 -0700
-Subject: ARM: shmobile: bockw: define FPGA address and rename iomem variable
-
-Bock-W board will needs more board specific ioremap() method.
-This patch tidyup current FPGA specific settings
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 44bfe6847a088c6207a4a21974e5cfe8517d3e4f)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-bockw.c | 13 +++++++------
- 1 file changed, 7 insertions(+), 6 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-bockw.c b/arch/arm/mach-shmobile/board-bockw.c
-index dac4365c..badde08d 100644
---- a/arch/arm/mach-shmobile/board-bockw.c
-+++ b/arch/arm/mach-shmobile/board-bockw.c
-@@ -46,10 +46,11 @@ static const struct pinctrl_map bockw_pinctrl_map[] = {
- 				  "scif0_ctrl", "scif0"),
- };
- 
-+#define FPGA	0x18200000
- #define IRQ0MR	0x30
- static void __init bockw_init(void)
- {
--	void __iomem *fpga;
-+	void __iomem *base;
- 
- 	r8a7778_clock_init();
- 	r8a7778_init_irq_extpin(1);
-@@ -59,8 +60,8 @@ static void __init bockw_init(void)
- 				  ARRAY_SIZE(bockw_pinctrl_map));
- 	r8a7778_pinmux_init();
- 
--	fpga = ioremap_nocache(0x18200000, SZ_1M);
--	if (fpga) {
-+	base = ioremap_nocache(FPGA, SZ_1M);
-+	if (base) {
- 		/*
- 		 * CAUTION
- 		 *
-@@ -68,10 +69,10 @@ static void __init bockw_init(void)
- 		 * it should be cared in the future
- 		 * Now, it is assuming IRQ0 was used only from SMSC.
- 		 */
--		u16 val = ioread16(fpga + IRQ0MR);
-+		u16 val = ioread16(base + IRQ0MR);
- 		val &= ~(1 << 4); /* enable SMSC911x */
--		iowrite16(val, fpga + IRQ0MR);
--		iounmap(fpga);
-+		iowrite16(val, base + IRQ0MR);
-+		iounmap(base);
- 
- 		platform_device_register_resndata(
- 			&platform_bus, "smsc911x", -1,
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0239-ARM-shmobile-armadillo-dts-Add-PWM-backlight-enable-.patch b/patches.renesas/0239-ARM-shmobile-armadillo-dts-Add-PWM-backlight-enable-.patch
deleted file mode 100644
index 2a614079c4a3a..0000000000000
--- a/patches.renesas/0239-ARM-shmobile-armadillo-dts-Add-PWM-backlight-enable-.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From c4a72afb5c1c85f993504de9b7de9815b6bb0e4f Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 11 Dec 2013 03:48:18 +0100
-Subject: ARM: shmobile: armadillo: dts: Add PWM backlight enable GPIO
-
-The Armadillo 800 EVA panel module has a backlight enable signal
-connected to GPIO 61. Report this in the backlight DT node.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit a0c9efe65e00bd0a9b5b5814f6b3012d61f966f9)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
-index 470575952297..e916aae2b725 100644
---- a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
-+++ b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
-@@ -96,6 +96,7 @@
- 		pinctrl-0 = <&backlight_pins>;
- 		pinctrl-names = "default";
- 		power-supply = <&reg_5p0v>;
-+		enable-gpios = <&pfc 61 GPIO_ACTIVE_HIGH>;
- 	};
- 
- 	sound {
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0239-ARM-shmobile-kzm9d-resigser-smsc911x-platform-device.patch b/patches.renesas/0239-ARM-shmobile-kzm9d-resigser-smsc911x-platform-device.patch
deleted file mode 100644
index f6a94474d76c9..0000000000000
--- a/patches.renesas/0239-ARM-shmobile-kzm9d-resigser-smsc911x-platform-device.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From fb58eabfada91c94603ce70c12506d9deadcf812 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Thu, 4 Apr 2013 11:20:33 +0900
-Subject: ARM: shmobile: kzm9d: resigser smsc911x platform device with id -1
-
-As the kzm9d only has one smsc911x device it
-may be registered as a platform device with id -1.
-
-This allows the kzm9d board to access the smsc911x device
-when CONFIG_REGULATOR (and CONFIG_REGULATOR_FIXED_VOLTAGE)
-are set. The motivation for which is twofold: using regulators
-seems to be generally a good thing; it will move the kzm9d defconfig
-one step closer to being able to be consolidated with other
-shmobile defconfigs.
-
-An alternate but so far untested approach would be to
-update the definition of dummy_supplies in board-kzm9d.c
-to use "smsc911x.0" instead of "smsc911x".
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit df53721a60022263017c5d72e17a7780d0e5dc4c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-kzm9d.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/board-kzm9d.c b/arch/arm/mach-shmobile/board-kzm9d.c
-index c016ccd9..4368000e 100644
---- a/arch/arm/mach-shmobile/board-kzm9d.c
-+++ b/arch/arm/mach-shmobile/board-kzm9d.c
-@@ -56,7 +56,7 @@ static struct smsc911x_platform_config smsc911x_platdata = {
- 
- static struct platform_device smsc91x_device = {
- 	.name	= "smsc911x",
--	.id	= 0,
-+	.id	= -1,
- 	.dev	= {
- 		  .platform_data = &smsc911x_platdata,
- 		},
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0240-ARM-shmobile-kzm9g-add-AS3711-PMIC-platform-data.patch b/patches.renesas/0240-ARM-shmobile-kzm9g-add-AS3711-PMIC-platform-data.patch
deleted file mode 100644
index 7c5b3904fd820..0000000000000
--- a/patches.renesas/0240-ARM-shmobile-kzm9g-add-AS3711-PMIC-platform-data.patch
+++ /dev/null
@@ -1,249 +0,0 @@
-From b32ba99b311f5c07e617bb078238475c7be2077e Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Tue, 12 Feb 2013 17:15:31 +0000
-Subject: ARM: shmobile: kzm9g: add AS3711 PMIC platform data
-
-KZM9G uses an AS3711 PMIC to supply power to the CPU and the LCD backlight.
-The PMIC on the board is pre-programmed to supply correct voltages to the
-CPU, power supply to the backlight has to be turned on at run-time. The
-latter is currently performed by a hard-coded I2C command sequence in the
-board file. This patch removes the backlight hack and instead adds an I2C
-device to instantiate the AS3711 MFD driver, which will add a regulator
-device to dynamically adjust CPU voltages and a backlight device.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 28307e0a7c3841f2d54876639235c07ebe3d2999)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-kzm9g.c | 193 +++++++++++++++++++++++++----------
- 1 file changed, 140 insertions(+), 53 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-kzm9g.c b/arch/arm/mach-shmobile/board-kzm9g.c
-index 1fdf05cb..165483c9 100644
---- a/arch/arm/mach-shmobile/board-kzm9g.c
-+++ b/arch/arm/mach-shmobile/board-kzm9g.c
-@@ -29,6 +29,7 @@
- #include <linux/mmc/host.h>
- #include <linux/mmc/sh_mmcif.h>
- #include <linux/mmc/sh_mobile_sdhi.h>
-+#include <linux/mfd/as3711.h>
- #include <linux/mfd/tmio.h>
- #include <linux/pinctrl/machine.h>
- #include <linux/pinctrl/pinconf-generic.h>
-@@ -606,6 +607,140 @@ static struct platform_device fsi_ak4648_device = {
- };
- 
- /* I2C */
-+
-+/* StepDown1 is used to supply 1.315V to the CPU */
-+static struct regulator_init_data as3711_sd1 = {
-+	.constraints = {
-+		.name = "1.315V CPU",
-+		.boot_on = 1,
-+		.always_on = 1,
-+		.min_uV = 1315000,
-+		.max_uV = 1335000,
-+	},
-+};
-+
-+/* StepDown2 is used to supply 1.8V to the CPU and to the board */
-+static struct regulator_init_data as3711_sd2 = {
-+	.constraints = {
-+		.name = "1.8V",
-+		.boot_on = 1,
-+		.always_on = 1,
-+		.min_uV = 1800000,
-+		.max_uV = 1800000,
-+	},
-+};
-+
-+/*
-+ * StepDown3 is switched in parallel with StepDown2, seems to be off,
-+ * according to read-back pre-set register values
-+ */
-+
-+/* StepDown4 is used to supply 1.215V to the CPU and to the board */
-+static struct regulator_init_data as3711_sd4 = {
-+	.constraints = {
-+		.name = "1.215V",
-+		.boot_on = 1,
-+		.always_on = 1,
-+		.min_uV = 1215000,
-+		.max_uV = 1235000,
-+	},
-+};
-+
-+/* LDO1 is unused and unconnected */
-+
-+/* LDO2 is used to supply 2.8V to the CPU */
-+static struct regulator_init_data as3711_ldo2 = {
-+	.constraints = {
-+		.name = "2.8V CPU",
-+		.boot_on = 1,
-+		.always_on = 1,
-+		.min_uV = 2800000,
-+		.max_uV = 2800000,
-+	},
-+};
-+
-+/* LDO3 is used to supply 3.0V to the CPU */
-+static struct regulator_init_data as3711_ldo3 = {
-+	.constraints = {
-+		.name = "3.0V CPU",
-+		.boot_on = 1,
-+		.always_on = 1,
-+		.min_uV = 3000000,
-+		.max_uV = 3000000,
-+	},
-+};
-+
-+/* LDO4 is used to supply 2.8V to the board */
-+static struct regulator_init_data as3711_ldo4 = {
-+	.constraints = {
-+		.name = "2.8V",
-+		.boot_on = 1,
-+		.always_on = 1,
-+		.min_uV = 2800000,
-+		.max_uV = 2800000,
-+	},
-+};
-+
-+/* LDO5 is switched parallel to LDO4, also set to 2.8V */
-+static struct regulator_init_data as3711_ldo5 = {
-+	.constraints = {
-+		.name = "2.8V #2",
-+		.boot_on = 1,
-+		.always_on = 1,
-+		.min_uV = 2800000,
-+		.max_uV = 2800000,
-+	},
-+};
-+
-+/* LDO6 is unused and unconnected */
-+
-+/* LDO7 is used to supply 1.15V to the CPU */
-+static struct regulator_init_data as3711_ldo7 = {
-+	.constraints = {
-+		.name = "1.15V CPU",
-+		.boot_on = 1,
-+		.always_on = 1,
-+		.min_uV = 1150000,
-+		.max_uV = 1150000,
-+	},
-+};
-+
-+/* LDO8 is switched parallel to LDO7, also set to 1.15V */
-+static struct regulator_init_data as3711_ldo8 = {
-+	.constraints = {
-+		.name = "1.15V CPU #2",
-+		.boot_on = 1,
-+		.always_on = 1,
-+		.min_uV = 1150000,
-+		.max_uV = 1150000,
-+	},
-+};
-+
-+static struct as3711_platform_data as3711_pdata = {
-+	.regulator	= {
-+		.init_data	= {
-+			[AS3711_REGULATOR_SD_1] = &as3711_sd1,
-+			[AS3711_REGULATOR_SD_2] = &as3711_sd2,
-+			[AS3711_REGULATOR_SD_4] = &as3711_sd4,
-+			[AS3711_REGULATOR_LDO_2] = &as3711_ldo2,
-+			[AS3711_REGULATOR_LDO_3] = &as3711_ldo3,
-+			[AS3711_REGULATOR_LDO_4] = &as3711_ldo4,
-+			[AS3711_REGULATOR_LDO_5] = &as3711_ldo5,
-+			[AS3711_REGULATOR_LDO_7] = &as3711_ldo7,
-+			[AS3711_REGULATOR_LDO_8] = &as3711_ldo8,
-+		},
-+	},
-+	.backlight	= {
-+		.su2_fb = "sh_mobile_lcdc_fb.0",
-+		.su2_max_uA = 36000,
-+		.su2_feedback = AS3711_SU2_CURR_AUTO,
-+		.su2_fbprot = AS3711_SU2_GPIO4,
-+		.su2_auto_curr1 = true,
-+		.su2_auto_curr2 = true,
-+		.su2_auto_curr3 = true,
-+	},
-+};
-+
- static struct pcf857x_platform_data pcf8575_pdata = {
- 	.gpio_base	= GPIO_PCF8575_BASE,
- };
-@@ -625,6 +760,11 @@ static struct i2c_board_info i2c0_devices[] = {
- 		I2C_BOARD_INFO("adxl34x", 0x1d),
- 		.irq = irq_pin(26), /* IRQ26 */
- 	},
-+	{
-+		I2C_BOARD_INFO("as3711", 0x40),
-+		.irq = intcs_evt2irq(0x3300), /* IRQ24 */
-+		.platform_data = &as3711_pdata,
-+	},
- };
- 
- static struct i2c_board_info i2c1_devices[] = {
-@@ -715,59 +855,6 @@ static const struct pinctrl_map kzm_pinctrl_map[] = {
- 				  "usb_vbus", "usb"),
- };
- 
--/*
-- * FIXME
-- *
-- * This is quick hack for enabling LCDC backlight
-- */
--static int __init as3711_enable_lcdc_backlight(void)
--{
--	struct i2c_adapter *a = i2c_get_adapter(0);
--	struct i2c_msg msg;
--	int i, ret;
--	__u8 magic[] = {
--		0x40, 0x2a,
--		0x43, 0x3c,
--		0x44, 0x3c,
--		0x45, 0x3c,
--		0x54, 0x03,
--		0x51, 0x00,
--		0x51, 0x01,
--		0xff, 0x00, /* wait */
--		0x43, 0xf0,
--		0x44, 0xf0,
--		0x45, 0xf0,
--	};
--
--	if (!of_machine_is_compatible("renesas,kzm9g"))
--		return 0;
--
--	if (!a)
--		return 0;
--
--	msg.addr	= 0x40;
--	msg.len		= 2;
--	msg.flags	= 0;
--
--	for (i = 0; i < ARRAY_SIZE(magic); i += 2) {
--		msg.buf = magic + i;
--
--		if (0xff == msg.buf[0]) {
--			udelay(500);
--			continue;
--		}
--
--		ret = i2c_transfer(a, &msg, 1);
--		if (ret < 0) {
--			pr_err("i2c transfer fail\n");
--			break;
--		}
--	}
--
--	return 0;
--}
--device_initcall(as3711_enable_lcdc_backlight);
--
- static void __init kzm_init(void)
- {
- 	regulator_register_always_on(2, "fixed-1.8V", fixed1v8_power_consumers,
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0240-ARM-shmobile-r8a73a4-Specify-PFC-interrupts-in-DT.patch b/patches.renesas/0240-ARM-shmobile-r8a73a4-Specify-PFC-interrupts-in-DT.patch
deleted file mode 100644
index 4d3fa75cbb81e..0000000000000
--- a/patches.renesas/0240-ARM-shmobile-r8a73a4-Specify-PFC-interrupts-in-DT.patch
+++ /dev/null
@@ -1,45 +0,0 @@
-From 760edbfed4191c81dfe1af4d81dfcdf9e3ead58a Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 11 Dec 2013 04:26:27 +0100
-Subject: ARM: shmobile: r8a73a4: Specify PFC interrupts in DT
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Linus Walleij <linus.walleij@linaro.org>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit defc82eabf962b83ac9e112238baa895890645ea)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a73a4.dtsi | 16 ++++++++++++++++
- 1 file changed, 16 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a73a4.dtsi b/arch/arm/boot/dts/r8a73a4.dtsi
-index 6b7ce89a68f7..62d0211bd192 100644
---- a/arch/arm/boot/dts/r8a73a4.dtsi
-+++ b/arch/arm/boot/dts/r8a73a4.dtsi
-@@ -288,6 +288,22 @@
- 		reg = <0 0xe6050000 0 0x9000>;
- 		gpio-controller;
- 		#gpio-cells = <2>;
-+		interrupts-extended =
-+			<&irqc0  0 0>, <&irqc0  1 0>, <&irqc0  2 0>, <&irqc0  3 0>,
-+			<&irqc0  4 0>, <&irqc0  5 0>, <&irqc0  6 0>, <&irqc0  7 0>,
-+			<&irqc0  8 0>, <&irqc0  9 0>, <&irqc0 10 0>, <&irqc0 11 0>,
-+			<&irqc0 12 0>, <&irqc0 13 0>, <&irqc0 14 0>, <&irqc0 15 0>,
-+			<&irqc0 16 0>, <&irqc0 17 0>, <&irqc0 18 0>, <&irqc0 19 0>,
-+			<&irqc0 20 0>, <&irqc0 21 0>, <&irqc0 22 0>, <&irqc0 23 0>,
-+			<&irqc0 24 0>, <&irqc0 25 0>, <&irqc0 26 0>, <&irqc0 27 0>,
-+			<&irqc0 28 0>, <&irqc0 29 0>, <&irqc0 30 0>, <&irqc0 31 0>,
-+			<&irqc1  0 0>, <&irqc1  1 0>, <&irqc1  2 0>, <&irqc1  3 0>,
-+			<&irqc1  4 0>, <&irqc1  5 0>, <&irqc1  6 0>, <&irqc1  7 0>,
-+			<&irqc1  8 0>, <&irqc1  9 0>, <&irqc1 10 0>, <&irqc1 11 0>,
-+			<&irqc1 12 0>, <&irqc1 13 0>, <&irqc1 14 0>, <&irqc1 15 0>,
-+			<&irqc1 16 0>, <&irqc1 17 0>, <&irqc1 18 0>, <&irqc1 19 0>,
-+			<&irqc1 20 0>, <&irqc1 21 0>, <&irqc1 22 0>, <&irqc1 23 0>,
-+			<&irqc1 24 0>, <&irqc1 25 0>;
- 	};
- 
- 	sdhi0: sd@ee100000 {
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0241-ARM-shmobile-bockw-add-CN9-SCIF-RCAN-selection-dipsw.patch b/patches.renesas/0241-ARM-shmobile-bockw-add-CN9-SCIF-RCAN-selection-dipsw.patch
deleted file mode 100644
index 67aef70fc205f..0000000000000
--- a/patches.renesas/0241-ARM-shmobile-bockw-add-CN9-SCIF-RCAN-selection-dipsw.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From 46032125af73d1bae36250512b295d38ae6455c8 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Mon, 8 Apr 2013 23:54:16 -0700
-Subject: ARM: shmobile: bockw: add CN9 SCIF/RCAN selection dipswitch
- explanation
-
-Debug serial (= SCIF0) is connected to CN9 upper side,
-and it is shared by RCAN.
-This patch adds SCIF/RCAN dipswitch explanation on
-comment area for developers.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit d998cef3fc7ccd52c0ea2c849453dfcde38c8a56)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-bockw.c | 8 ++++++++
- 1 file changed, 8 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/board-bockw.c b/arch/arm/mach-shmobile/board-bockw.c
-index badde08d..3ce020a7 100644
---- a/arch/arm/mach-shmobile/board-bockw.c
-+++ b/arch/arm/mach-shmobile/board-bockw.c
-@@ -26,6 +26,14 @@
- #include <mach/r8a7778.h>
- #include <asm/mach/arch.h>
- 
-+/*
-+ *	CN9(Upper side) SCIF/RCAN selection
-+ *
-+ *		1,4	3,6
-+ * SW40		SCIF	RCAN
-+ * SW41		SCIF	RCAN
-+ */
-+
- static struct smsc911x_platform_config smsc911x_data = {
- 	.irq_polarity	= SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
- 	.irq_type	= SMSC911X_IRQ_TYPE_PUSH_PULL,
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0241-ARM-shmobile-r8a7740-Specify-PFC-interrupts-in-DT.patch b/patches.renesas/0241-ARM-shmobile-r8a7740-Specify-PFC-interrupts-in-DT.patch
deleted file mode 100644
index 42397f53a1f95..0000000000000
--- a/patches.renesas/0241-ARM-shmobile-r8a7740-Specify-PFC-interrupts-in-DT.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From e40dac4b58abb849a6ebdfde4cd5b4389b0a6e64 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 11 Dec 2013 04:26:28 +0100
-Subject: ARM: shmobile: r8a7740: Specify PFC interrupts in DT
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 778de006538d932b96c58dd3a43f9e4ef5060940)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7740.dtsi | 9 +++++++++
- 1 file changed, 9 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi
-index 2782f642acfc..8280884bfa59 100644
---- a/arch/arm/boot/dts/r8a7740.dtsi
-+++ b/arch/arm/boot/dts/r8a7740.dtsi
-@@ -155,6 +155,15 @@
- 		      <0xe605800c 0x20>;
- 		gpio-controller;
- 		#gpio-cells = <2>;
-+		interrupts-extended =
-+			<&irqpin0 0 0>, <&irqpin0 1 0>, <&irqpin0 2 0>, <&irqpin0 3 0>,
-+			<&irqpin0 4 0>, <&irqpin0 5 0>, <&irqpin0 6 0>, <&irqpin0 7 0>,
-+			<&irqpin1 0 0>, <&irqpin1 1 0>, <&irqpin1 2 0>, <&irqpin1 3 0>,
-+			<&irqpin1 4 0>, <&irqpin1 5 0>, <&irqpin1 6 0>, <&irqpin1 7 0>,
-+			<&irqpin2 0 0>, <&irqpin2 1 0>, <&irqpin2 2 0>, <&irqpin2 3 0>,
-+			<&irqpin2 4 0>, <&irqpin2 5 0>, <&irqpin2 6 0>, <&irqpin2 7 0>,
-+			<&irqpin3 0 0>, <&irqpin3 1 0>, <&irqpin3 2 0>, <&irqpin3 3 0>,
-+			<&irqpin3 4 0>, <&irqpin3 5 0>, <&irqpin3 6 0>, <&irqpin3 7 0>;
- 	};
- 
- 	tpu: pwm@e6600000 {
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0242-ARM-shmobile-bockw-add-dummy-regulators-for-SMSC.patch b/patches.renesas/0242-ARM-shmobile-bockw-add-dummy-regulators-for-SMSC.patch
deleted file mode 100644
index 314d9511cfa44..0000000000000
--- a/patches.renesas/0242-ARM-shmobile-bockw-add-dummy-regulators-for-SMSC.patch
+++ /dev/null
@@ -1,57 +0,0 @@
-From 09d02bfee3a25baf3130806c88590178c2094eb0 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Tue, 9 Apr 2013 02:37:15 -0700
-Subject: ARM: shmobile: bockw: add dummy regulators for SMSC
-
-SMSC driver will try to get regulator if .config had CONFIG_REGULATOR,
-and, shmobile_defconfig has it.
-SMSC driver on Bock-W board will be failed if it doens't have
-dummy regulator settings.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 741440e868f5f08f747292097620ebad43cc5ef0)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-bockw.c | 11 +++++++++++
- 1 file changed, 11 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/board-bockw.c b/arch/arm/mach-shmobile/board-bockw.c
-index 3ce020a7..4d657159 100644
---- a/arch/arm/mach-shmobile/board-bockw.c
-+++ b/arch/arm/mach-shmobile/board-bockw.c
-@@ -20,6 +20,8 @@
- 
- #include <linux/pinctrl/machine.h>
- #include <linux/platform_device.h>
-+#include <linux/regulator/fixed.h>
-+#include <linux/regulator/machine.h>
- #include <linux/smsc911x.h>
- #include <mach/common.h>
- #include <mach/irqs.h>
-@@ -34,6 +36,12 @@
-  * SW41		SCIF	RCAN
-  */
- 
-+/* Dummy supplies, where voltage doesn't matter */
-+static struct regulator_consumer_supply dummy_supplies[] = {
-+	REGULATOR_SUPPLY("vddvario", "smsc911x"),
-+	REGULATOR_SUPPLY("vdd33a", "smsc911x"),
-+};
-+
- static struct smsc911x_platform_config smsc911x_data = {
- 	.irq_polarity	= SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
- 	.irq_type	= SMSC911X_IRQ_TYPE_PUSH_PULL,
-@@ -82,6 +90,9 @@ static void __init bockw_init(void)
- 		iowrite16(val, base + IRQ0MR);
- 		iounmap(base);
- 
-+		regulator_register_fixed(0, dummy_supplies,
-+					 ARRAY_SIZE(dummy_supplies));
-+
- 		platform_device_register_resndata(
- 			&platform_bus, "smsc911x", -1,
- 			smsc911x_resources, ARRAY_SIZE(smsc911x_resources),
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0242-ARM-shmobile-sh73a0-Specify-PFC-interrupts-in-DT.patch b/patches.renesas/0242-ARM-shmobile-sh73a0-Specify-PFC-interrupts-in-DT.patch
deleted file mode 100644
index eecb4cad6b867..0000000000000
--- a/patches.renesas/0242-ARM-shmobile-sh73a0-Specify-PFC-interrupts-in-DT.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From a334ed0f33dedf09ec8966bd2c9709bcba00feaf Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 11 Dec 2013 04:26:29 +0100
-Subject: ARM: shmobile: sh73a0: Specify PFC interrupts in DT
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit aba76d286e8cccb05b3a4c23833faaee171a6c5d)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/sh73a0.dtsi | 9 +++++++++
- 1 file changed, 9 insertions(+)
-
-diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi
-index c460dd229b13..b7bd3b9a6753 100644
---- a/arch/arm/boot/dts/sh73a0.dtsi
-+++ b/arch/arm/boot/dts/sh73a0.dtsi
-@@ -242,6 +242,15 @@
- 		      <0xe605801c 0x1c>;
- 		gpio-controller;
- 		#gpio-cells = <2>;
-+		interrupts-extended =
-+			<&irqpin0 0 0>, <&irqpin0 1 0>, <&irqpin0 2 0>, <&irqpin0 3 0>,
-+			<&irqpin0 4 0>, <&irqpin0 5 0>, <&irqpin0 6 0>, <&irqpin0 7 0>,
-+			<&irqpin1 0 0>, <&irqpin1 1 0>, <&irqpin1 2 0>, <&irqpin1 3 0>,
-+			<&irqpin1 4 0>, <&irqpin1 5 0>, <&irqpin1 6 0>, <&irqpin1 7 0>,
-+			<&irqpin2 0 0>, <&irqpin2 1 0>, <&irqpin2 2 0>, <&irqpin2 3 0>,
-+			<&irqpin2 4 0>, <&irqpin2 5 0>, <&irqpin2 6 0>, <&irqpin2 7 0>,
-+			<&irqpin3 0 0>, <&irqpin3 1 0>, <&irqpin3 2 0>, <&irqpin3 3 0>,
-+			<&irqpin3 4 0>, <&irqpin3 5 0>, <&irqpin3 6 0>, <&irqpin3 7 0>;
- 	};
- 
- 	sh_fsi2: sound@ec230000 {
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0243-ARM-shmobile-armadillo-dts-Add-gpio-keys-device.patch b/patches.renesas/0243-ARM-shmobile-armadillo-dts-Add-gpio-keys-device.patch
deleted file mode 100644
index 1daaf5ed45eda..0000000000000
--- a/patches.renesas/0243-ARM-shmobile-armadillo-dts-Add-gpio-keys-device.patch
+++ /dev/null
@@ -1,60 +0,0 @@
-From 4e5e0330a3113d62a0f062ce0b4a828304c5d4a7 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 11 Dec 2013 04:26:30 +0100
-Subject: ARM: shmobile: armadillo: dts: Add gpio-keys device
-
-The board had 4 buttons connected to GPIOs, add a corresponding
-gpio-keys device.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 90c2434daa0b8c7ec2b75fcb182436813e9120bd)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- .../boot/dts/r8a7740-armadillo800eva-reference.dts | 29 ++++++++++++++++++++++
- 1 file changed, 29 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
-index e916aae2b725..95a849bf921f 100644
---- a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
-+++ b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
-@@ -72,6 +72,35 @@
- 		regulator-boot-on;
- 	};
- 
-+	gpio-keys {
-+		compatible = "gpio-keys";
-+
-+		power-key {
-+			gpios = <&pfc 99 GPIO_ACTIVE_LOW>;
-+			linux,code = <116>;
-+			label = "SW3";
-+			gpio-key,wakeup;
-+		};
-+
-+		back-key {
-+			gpios = <&pfc 100 GPIO_ACTIVE_LOW>;
-+			linux,code = <158>;
-+			label = "SW4";
-+		};
-+
-+		menu-key {
-+			gpios = <&pfc 97 GPIO_ACTIVE_LOW>;
-+			linux,code = <139>;
-+			label = "SW5";
-+		};
-+
-+		home-key {
-+			gpios = <&pfc 98 GPIO_ACTIVE_LOW>;
-+			linux,code = <102>;
-+			label = "SW6";
-+		};
-+	};
-+
- 	leds {
- 		compatible = "gpio-leds";
- 		led1 {
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0243-ARM-shmobile-lager-Add-GPIO-LEDs.patch b/patches.renesas/0243-ARM-shmobile-lager-Add-GPIO-LEDs.patch
deleted file mode 100644
index f156095345b99..0000000000000
--- a/patches.renesas/0243-ARM-shmobile-lager-Add-GPIO-LEDs.patch
+++ /dev/null
@@ -1,73 +0,0 @@
-From 23debda80adee932fe08190c8214a49eeebef998 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Tue, 23 Apr 2013 02:37:05 +0000
-Subject: ARM: shmobile: lager: Add GPIO LEDs
-
-The board has 3 LEDs connected to GPIOs. Add a led-gpio device to
-support them.
-
-Based on "ARM: shmobile: marzen: Add GPIO LEDs" by Laurent Pinchart.
-
-Cc: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 1034f4ee3f07b7d525c490d702b3dcbee3b56b54)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-lager.c | 27 +++++++++++++++++++++++++++
- 1 file changed, 27 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
-index 6114edd0..6a1ba38f 100644
---- a/arch/arm/mach-shmobile/board-lager.c
-+++ b/arch/arm/mach-shmobile/board-lager.c
-@@ -21,13 +21,37 @@
- #include <linux/interrupt.h>
- #include <linux/irqchip.h>
- #include <linux/kernel.h>
-+#include <linux/leds.h>
- #include <linux/pinctrl/machine.h>
-+#include <linux/platform_data/gpio-rcar.h>
- #include <linux/platform_device.h>
- #include <mach/common.h>
- #include <mach/r8a7790.h>
- #include <asm/mach-types.h>
- #include <asm/mach/arch.h>
- 
-+/* LEDS */
-+static struct gpio_led lager_leds[] = {
-+	{
-+		.name		= "led8",
-+		.gpio		= RCAR_GP_PIN(5, 17),
-+		.default_state	= LEDS_GPIO_DEFSTATE_ON,
-+	}, {
-+		.name		= "led7",
-+		.gpio		= RCAR_GP_PIN(4, 23),
-+		.default_state	= LEDS_GPIO_DEFSTATE_ON,
-+	}, {
-+		.name		= "led6",
-+		.gpio		= RCAR_GP_PIN(4, 22),
-+		.default_state	= LEDS_GPIO_DEFSTATE_ON,
-+	},
-+};
-+
-+static struct gpio_led_platform_data lager_leds_pdata = {
-+	.leds		= lager_leds,
-+	.num_leds	= ARRAY_SIZE(lager_leds),
-+};
-+
- static const struct pinctrl_map lager_pinctrl_map[] = {
- 	/* SCIF0 (CN19: DEBUG SERIAL0) */
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.6", "pfc-r8a7790",
-@@ -46,6 +70,9 @@ static void __init lager_add_standard_devices(void)
- 	r8a7790_pinmux_init();
- 
- 	r8a7790_add_standard_devices();
-+	platform_device_register_data(&platform_bus, "leds-gpio", -1,
-+				      &lager_leds_pdata,
-+				      sizeof(lager_leds_pdata));
- }
- 
- static const char *lager_boards_compat_dt[] __initdata = {
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0244-ARM-shmobile-lager-support-GPIO-switches.patch b/patches.renesas/0244-ARM-shmobile-lager-support-GPIO-switches.patch
deleted file mode 100644
index bd635ed200762..0000000000000
--- a/patches.renesas/0244-ARM-shmobile-lager-support-GPIO-switches.patch
+++ /dev/null
@@ -1,72 +0,0 @@
-From e61739925dbbd72ec179d5625eb31da4ac50ee1e Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Mon, 13 May 2013 16:04:31 +0900
-Subject: ARM: shmobile: lager: support GPIO switches
-
-The lager board has pins 1 - 4 of SW2 wired up to GPIO pins.
-This patch allows access to those pins as KEYS 1 - 4 using
-gpio-keys.
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit c3842e4fcbb7664276443b79187b7808c2e80a35)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-lager.c | 24 +++++++++++++++++++++++-
- 1 file changed, 23 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
-index 6a1ba38f..d73e21d3 100644
---- a/arch/arm/mach-shmobile/board-lager.c
-+++ b/arch/arm/mach-shmobile/board-lager.c
-@@ -18,6 +18,9 @@
-  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
-  */
- 
-+#include <linux/gpio.h>
-+#include <linux/gpio_keys.h>
-+#include <linux/input.h>
- #include <linux/interrupt.h>
- #include <linux/irqchip.h>
- #include <linux/kernel.h>
-@@ -47,11 +50,27 @@ static struct gpio_led lager_leds[] = {
- 	},
- };
- 
--static struct gpio_led_platform_data lager_leds_pdata = {
-+static __initdata struct gpio_led_platform_data lager_leds_pdata = {
- 	.leds		= lager_leds,
- 	.num_leds	= ARRAY_SIZE(lager_leds),
- };
- 
-+/* GPIO KEY */
-+#define GPIO_KEY(c, g, d, ...) \
-+	{ .code = c, .gpio = g, .desc = d, .active_low = 1 }
-+
-+static __initdata struct gpio_keys_button gpio_buttons[] = {
-+	GPIO_KEY(KEY_4,		RCAR_GP_PIN(1, 28),	"SW2-pin4"),
-+	GPIO_KEY(KEY_3,		RCAR_GP_PIN(1, 26),	"SW2-pin3"),
-+	GPIO_KEY(KEY_2,		RCAR_GP_PIN(1, 24),	"SW2-pin2"),
-+	GPIO_KEY(KEY_1,		RCAR_GP_PIN(1, 14),	"SW2-pin1"),
-+};
-+
-+static __initdata struct gpio_keys_platform_data lager_keys_pdata = {
-+	.buttons	= gpio_buttons,
-+	.nbuttons	= ARRAY_SIZE(gpio_buttons),
-+};
-+
- static const struct pinctrl_map lager_pinctrl_map[] = {
- 	/* SCIF0 (CN19: DEBUG SERIAL0) */
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.6", "pfc-r8a7790",
-@@ -73,6 +92,9 @@ static void __init lager_add_standard_devices(void)
- 	platform_device_register_data(&platform_bus, "leds-gpio", -1,
- 				      &lager_leds_pdata,
- 				      sizeof(lager_leds_pdata));
-+	platform_device_register_data(&platform_bus, "gpio-keys", -1,
-+				      &lager_keys_pdata,
-+				      sizeof(lager_keys_pdata));
- }
- 
- static const char *lager_boards_compat_dt[] __initdata = {
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0244-ARM-shmobile-r8a7790-Add-clocks.patch b/patches.renesas/0244-ARM-shmobile-r8a7790-Add-clocks.patch
deleted file mode 100644
index 5f170900a04ac..0000000000000
--- a/patches.renesas/0244-ARM-shmobile-r8a7790-Add-clocks.patch
+++ /dev/null
@@ -1,354 +0,0 @@
-From 34d941fcc551543df929adb557aa06c546245906 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 11 Dec 2013 15:05:14 +0100
-Subject: ARM: shmobile: r8a7790: Add clocks
-
-Declare all core clocks and DIV6 clocks, as well as all MSTP clocks
-currently used by r8a7790 boards.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 22a1f59547e1e63cd18ee1ddb32fa2d8ab591a22)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7790.dtsi | 318 +++++++++++++++++++++++++++++++++++++++++
- 1 file changed, 318 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
-index c6001032d9a7..c549bf56bf84 100644
---- a/arch/arm/boot/dts/r8a7790.dtsi
-+++ b/arch/arm/boot/dts/r8a7790.dtsi
-@@ -8,6 +8,7 @@
-  * kind, whether express or implied.
-  */
- 
-+#include <dt-bindings/clock/r8a7790-clock.h>
- #include <dt-bindings/interrupt-controller/arm-gic.h>
- #include <dt-bindings/interrupt-controller/irq.h>
- 
-@@ -287,4 +288,321 @@
- 		cap-sd-highspeed;
- 		status = "disabled";
- 	};
-+
-+	clocks {
-+		#address-cells = <2>;
-+		#size-cells = <2>;
-+		ranges;
-+
-+		/* External root clock */
-+		extal_clk: extal_clk {
-+			compatible = "fixed-clock";
-+			#clock-cells = <0>;
-+			/* This value must be overriden by the board. */
-+			clock-frequency = <0>;
-+			clock-output-names = "extal";
-+		};
-+
-+		/* Special CPG clocks */
-+		cpg_clocks: cpg_clocks@e6150000 {
-+			compatible = "renesas,r8a7790-cpg-clocks",
-+				     "renesas,rcar-gen2-cpg-clocks";
-+			reg = <0 0xe6150000 0 0x1000>;
-+			clocks = <&extal_clk>;
-+			#clock-cells = <1>;
-+			clock-output-names = "main", "pll0", "pll1", "pll3",
-+					     "lb", "qspi", "sdh", "sd0", "sd1",
-+					     "z";
-+		};
-+
-+		/* Variable factor clocks */
-+		sd2_clk: sd2_clk@e6150078 {
-+			compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock";
-+			reg = <0 0xe6150078 0 4>;
-+			clocks = <&pll1_div2_clk>;
-+			#clock-cells = <0>;
-+			clock-output-names = "sd2";
-+		};
-+		sd3_clk: sd3_clk@e615007c {
-+			compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock";
-+			reg = <0 0xe615007c 0 4>;
-+			clocks = <&pll1_div2_clk>;
-+			#clock-cells = <0>;
-+			clock-output-names = "sd3";
-+		};
-+		mmc0_clk: mmc0_clk@e6150240 {
-+			compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock";
-+			reg = <0 0xe6150240 0 4>;
-+			clocks = <&pll1_div2_clk>;
-+			#clock-cells = <0>;
-+			clock-output-names = "mmc0";
-+		};
-+		mmc1_clk: mmc1_clk@e6150244 {
-+			compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock";
-+			reg = <0 0xe6150244 0 4>;
-+			clocks = <&pll1_div2_clk>;
-+			#clock-cells = <0>;
-+			clock-output-names = "mmc1";
-+		};
-+		ssp_clk: ssp_clk@e6150248 {
-+			compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock";
-+			reg = <0 0xe6150248 0 4>;
-+			clocks = <&pll1_div2_clk>;
-+			#clock-cells = <0>;
-+			clock-output-names = "ssp";
-+		};
-+		ssprs_clk: ssprs_clk@e615024c {
-+			compatible = "renesas,r8a7790-div6-clock", "renesas,cpg-div6-clock";
-+			reg = <0 0xe615024c 0 4>;
-+			clocks = <&pll1_div2_clk>;
-+			#clock-cells = <0>;
-+			clock-output-names = "ssprs";
-+		};
-+
-+		/* Fixed factor clocks */
-+		pll1_div2_clk: pll1_div2_clk {
-+			compatible = "fixed-factor-clock";
-+			clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
-+			#clock-cells = <0>;
-+			clock-div = <2>;
-+			clock-mult = <1>;
-+			clock-output-names = "pll1_div2";
-+		};
-+		z2_clk: z2_clk {
-+			compatible = "fixed-factor-clock";
-+			clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
-+			#clock-cells = <0>;
-+			clock-div = <2>;
-+			clock-mult = <1>;
-+			clock-output-names = "z2";
-+		};
-+		zg_clk: zg_clk {
-+			compatible = "fixed-factor-clock";
-+			clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
-+			#clock-cells = <0>;
-+			clock-div = <3>;
-+			clock-mult = <1>;
-+			clock-output-names = "zg";
-+		};
-+		zx_clk: zx_clk {
-+			compatible = "fixed-factor-clock";
-+			clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
-+			#clock-cells = <0>;
-+			clock-div = <3>;
-+			clock-mult = <1>;
-+			clock-output-names = "zx";
-+		};
-+		zs_clk: zs_clk {
-+			compatible = "fixed-factor-clock";
-+			clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
-+			#clock-cells = <0>;
-+			clock-div = <6>;
-+			clock-mult = <1>;
-+			clock-output-names = "zs";
-+		};
-+		hp_clk: hp_clk {
-+			compatible = "fixed-factor-clock";
-+			clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
-+			#clock-cells = <0>;
-+			clock-div = <12>;
-+			clock-mult = <1>;
-+			clock-output-names = "hp";
-+		};
-+		i_clk: i_clk {
-+			compatible = "fixed-factor-clock";
-+			clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
-+			#clock-cells = <0>;
-+			clock-div = <2>;
-+			clock-mult = <1>;
-+			clock-output-names = "i";
-+		};
-+		b_clk: b_clk {
-+			compatible = "fixed-factor-clock";
-+			clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
-+			#clock-cells = <0>;
-+			clock-div = <12>;
-+			clock-mult = <1>;
-+			clock-output-names = "b";
-+		};
-+		p_clk: p_clk {
-+			compatible = "fixed-factor-clock";
-+			clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
-+			#clock-cells = <0>;
-+			clock-div = <24>;
-+			clock-mult = <1>;
-+			clock-output-names = "p";
-+		};
-+		cl_clk: cl_clk {
-+			compatible = "fixed-factor-clock";
-+			clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
-+			#clock-cells = <0>;
-+			clock-div = <48>;
-+			clock-mult = <1>;
-+			clock-output-names = "cl";
-+		};
-+		m2_clk: m2_clk {
-+			compatible = "fixed-factor-clock";
-+			clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
-+			#clock-cells = <0>;
-+			clock-div = <8>;
-+			clock-mult = <1>;
-+			clock-output-names = "m2";
-+		};
-+		imp_clk: imp_clk {
-+			compatible = "fixed-factor-clock";
-+			clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
-+			#clock-cells = <0>;
-+			clock-div = <4>;
-+			clock-mult = <1>;
-+			clock-output-names = "imp";
-+		};
-+		rclk_clk: rclk_clk {
-+			compatible = "fixed-factor-clock";
-+			clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
-+			#clock-cells = <0>;
-+			clock-div = <(48 * 1024)>;
-+			clock-mult = <1>;
-+			clock-output-names = "rclk";
-+		};
-+		oscclk_clk: oscclk_clk {
-+			compatible = "fixed-factor-clock";
-+			clocks = <&cpg_clocks R8A7790_CLK_PLL1>;
-+			#clock-cells = <0>;
-+			clock-div = <(12 * 1024)>;
-+			clock-mult = <1>;
-+			clock-output-names = "oscclk";
-+		};
-+		zb3_clk: zb3_clk {
-+			compatible = "fixed-factor-clock";
-+			clocks = <&cpg_clocks R8A7790_CLK_PLL3>;
-+			#clock-cells = <0>;
-+			clock-div = <4>;
-+			clock-mult = <1>;
-+			clock-output-names = "zb3";
-+		};
-+		zb3d2_clk: zb3d2_clk {
-+			compatible = "fixed-factor-clock";
-+			clocks = <&cpg_clocks R8A7790_CLK_PLL3>;
-+			#clock-cells = <0>;
-+			clock-div = <8>;
-+			clock-mult = <1>;
-+			clock-output-names = "zb3d2";
-+		};
-+		ddr_clk: ddr_clk {
-+			compatible = "fixed-factor-clock";
-+			clocks = <&cpg_clocks R8A7790_CLK_PLL3>;
-+			#clock-cells = <0>;
-+			clock-div = <8>;
-+			clock-mult = <1>;
-+			clock-output-names = "ddr";
-+		};
-+		mp_clk: mp_clk {
-+			compatible = "fixed-factor-clock";
-+			clocks = <&pll1_div2_clk>;
-+			#clock-cells = <0>;
-+			clock-div = <15>;
-+			clock-mult = <1>;
-+			clock-output-names = "mp";
-+		};
-+		cp_clk: cp_clk {
-+			compatible = "fixed-factor-clock";
-+			clocks = <&extal_clk>;
-+			#clock-cells = <0>;
-+			clock-div = <2>;
-+			clock-mult = <1>;
-+			clock-output-names = "cp";
-+		};
-+
-+		/* Gate clocks */
-+		mstp1_clks: mstp1_clks@e6150134 {
-+			compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
-+			reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>;
-+			clocks = <&p_clk>, <&p_clk>, <&p_clk>, <&rclk_clk>,
-+				 <&cp_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>,
-+				 <&zs_clk>;
-+			#clock-cells = <1>;
-+			renesas,clock-indices = <
-+				R8A7790_CLK_TMU1 R8A7790_CLK_TMU3 R8A7790_CLK_TMU2
-+				R8A7790_CLK_CMT0 R8A7790_CLK_TMU0 R8A7790_CLK_VSP1_DU1
-+				R8A7790_CLK_VSP1_DU0 R8A7790_CLK_VSP1_RT R8A7790_CLK_VSP1_SY
-+			>;
-+			clock-output-names =
-+				"tmu1", "tmu3", "tmu2", "cmt0", "tmu0", "vsp1-du1",
-+				"vsp1-du0", "vsp1-rt", "vsp1-sy";
-+		};
-+		mstp2_clks: mstp2_clks@e6150138 {
-+			compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
-+			reg = <0 0xe6150138 0 4>, <0 0xe6150040 0 4>;
-+			clocks = <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>,
-+				 <&mp_clk>;
-+			#clock-cells = <1>;
-+			renesas,clock-indices = <
-+				R8A7790_CLK_SCIFA2 R8A7790_CLK_SCIFA1 R8A7790_CLK_SCIFA0
-+				R8A7790_CLK_SCIFB0 R8A7790_CLK_SCIFB1 R8A7790_CLK_SCIFB2
-+			>;
-+			clock-output-names =
-+				"scifa2", "scifa1", "scifa0", "scifb0", "scifb1",
-+				"scifb2";
-+		};
-+		mstp3_clks: mstp3_clks@e615013c {
-+			compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
-+			reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>;
-+			clocks = <&cp_clk>, <&mmc1_clk>, <&sd3_clk>, <&sd2_clk>,
-+				 <&cpg_clocks R8A7790_CLK_SD1>, <&cpg_clocks R8A7790_CLK_SD0>,
-+				 <&mmc0_clk>, <&rclk_clk>;
-+			#clock-cells = <1>;
-+			renesas,clock-indices = <
-+				R8A7790_CLK_TPU0 R8A7790_CLK_MMCIF1 R8A7790_CLK_SDHI3
-+				R8A7790_CLK_SDHI2 R8A7790_CLK_SDHI1 R8A7790_CLK_SDHI0
-+				R8A7790_CLK_MMCIF0 R8A7790_CLK_CMT1
-+			>;
-+			clock-output-names =
-+				"tpu0", "mmcif1", "sdhi3", "sdhi2",
-+				"sdhi1", "sdhi0", "mmcif0", "cmt1";
-+		};
-+		mstp5_clks: mstp5_clks@e6150144 {
-+			compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
-+			reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>;
-+			clocks = <&extal_clk>, <&p_clk>;
-+			#clock-cells = <1>;
-+			renesas,clock-indices = <R8A7790_CLK_THERMAL R8A7790_CLK_PWM>;
-+			clock-output-names = "thermal", "pwm";
-+		};
-+		mstp7_clks: mstp7_clks@e615014c {
-+			compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
-+			reg = <0 0xe615014c 0 4>, <0 0xe61501c4 0 4>;
-+			clocks = <&mp_clk>, <&mp_clk>, <&zs_clk>, <&zs_clk>, <&p_clk>,
-+				 <&p_clk>, <&zx_clk>, <&zx_clk>, <&zx_clk>, <&zx_clk>,
-+				 <&zx_clk>;
-+			#clock-cells = <1>;
-+			renesas,clock-indices = <
-+				R8A7790_CLK_EHCI R8A7790_CLK_HSUSB R8A7790_CLK_HSCIF1
-+				R8A7790_CLK_HSCIF0 R8A7790_CLK_SCIF1 R8A7790_CLK_SCIF0
-+				R8A7790_CLK_DU2 R8A7790_CLK_DU1 R8A7790_CLK_DU0
-+				R8A7790_CLK_LVDS1 R8A7790_CLK_LVDS0
-+			>;
-+			clock-output-names =
-+				"ehci", "hsusb", "hscif1", "hscif0", "scif1",
-+				"scif0", "du2", "du1", "du0", "lvds1", "lvds0";
-+		};
-+		mstp8_clks: mstp8_clks@e6150990 {
-+			compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
-+			reg = <0 0xe6150990 0 4>, <0 0xe61509a0 0 4>;
-+			clocks = <&p_clk>;
-+			#clock-cells = <1>;
-+			renesas,clock-indices = <R8A7790_CLK_ETHER>;
-+			clock-output-names = "ether";
-+		};
-+		mstp9_clks: mstp9_clks@e6150994 {
-+			compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
-+			reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>;
-+			clocks = <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>;
-+			#clock-cells = <1>;
-+			renesas,clock-indices = <
-+				R8A7790_CLK_RCAN1 R8A7790_CLK_RCAN0 R8A7790_CLK_I2C3
-+				R8A7790_CLK_I2C2 R8A7790_CLK_I2C1 R8A7790_CLK_I2C0
-+			>;
-+			clock-output-names = "rcan1", "rcan0", "i2c3", "i2c2", "i2c1", "i2c0";
-+		};
-+	};
- };
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0245-ARM-shmobile-marzen-Use-INTC-External-IRQ-pin-driver.patch b/patches.renesas/0245-ARM-shmobile-marzen-Use-INTC-External-IRQ-pin-driver.patch
deleted file mode 100644
index defe1da82d50f..0000000000000
--- a/patches.renesas/0245-ARM-shmobile-marzen-Use-INTC-External-IRQ-pin-driver.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-From d7fe4e217997f572fc186aa70a58475f48694efd Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Thu, 18 Apr 2013 21:21:09 +0900
-Subject: ARM: shmobile: marzen: Use INTC External IRQ pin driver for SMSC
-
-Update the marzen board to use the INTC External IRQ pin driver for SMSC.
-
-This code was originally posted by Magnus Damm as part of
-"ARM: shmobile: INTC External IRQ pin driver on r8a7779"
-but somehow omitted when I applied that patch.
-
-Cc: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 6e267030252ab5309e074c3a19c92ceb7a01fc8b)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-marzen.c | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/board-marzen.c b/arch/arm/mach-shmobile/board-marzen.c
-index 9112faef..1e219745 100644
---- a/arch/arm/mach-shmobile/board-marzen.c
-+++ b/arch/arm/mach-shmobile/board-marzen.c
-@@ -69,7 +69,7 @@ static struct resource smsc911x_resources[] = {
- 		.flags		= IORESOURCE_MEM,
- 	},
- 	[1] = {
--		.start		= gic_iid(0x3c), /* IRQ 1 */
-+		.start		= irq_pin(1), /* IRQ 1 */
- 		.flags		= IORESOURCE_IRQ,
- 	},
- };
-@@ -405,6 +405,7 @@ static void __init marzen_init(void)
- 	pinctrl_register_mappings(marzen_pinctrl_map,
- 				  ARRAY_SIZE(marzen_pinctrl_map));
- 	r8a7779_pinmux_init();
-+	r8a7779_init_irq_extpin(1); /* IRQ1 as individual interrupt */
- 
- 	r8a7779_add_standard_devices();
- 	platform_add_devices(marzen_devices, ARRAY_SIZE(marzen_devices));
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0245-ARM-shmobile-r8a7790-Reference-clocks.patch b/patches.renesas/0245-ARM-shmobile-r8a7790-Reference-clocks.patch
deleted file mode 100644
index 24a29e3d1dcc8..0000000000000
--- a/patches.renesas/0245-ARM-shmobile-r8a7790-Reference-clocks.patch
+++ /dev/null
@@ -1,104 +0,0 @@
-From f032dfbd2e473d960f47f03862c4c9545d2749bc Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 11 Dec 2013 15:05:15 +0100
-Subject: ARM: shmobile: r8a7790: Reference clocks
-
-Reference clocks using a "clocks" property in all nodes corresponding to
-devices that require a clock.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 72197ca7a1cb1cea5615c879f638d5d457c0b2e2)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7790.dtsi | 10 ++++++++++
- 1 file changed, 10 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
-index c549bf56bf84..28e946081797 100644
---- a/arch/arm/boot/dts/r8a7790.dtsi
-+++ b/arch/arm/boot/dts/r8a7790.dtsi
-@@ -197,6 +197,7 @@
- 		reg = <0 0xe6508000 0 0x40>;
- 		interrupt-parent = <&gic>;
- 		interrupts = <0 287 IRQ_TYPE_LEVEL_HIGH>;
-+		clocks = <&mstp3_clks R8A7790_CLK_I2C0>;
- 		status = "disabled";
- 	};
- 
-@@ -207,6 +208,7 @@
- 		reg = <0 0xe6518000 0 0x40>;
- 		interrupt-parent = <&gic>;
- 		interrupts = <0 288 IRQ_TYPE_LEVEL_HIGH>;
-+		clocks = <&mstp3_clks R8A7790_CLK_I2C1>;
- 		status = "disabled";
- 	};
- 
-@@ -217,6 +219,7 @@
- 		reg = <0 0xe6530000 0 0x40>;
- 		interrupt-parent = <&gic>;
- 		interrupts = <0 286 IRQ_TYPE_LEVEL_HIGH>;
-+		clocks = <&mstp3_clks R8A7790_CLK_I2C2>;
- 		status = "disabled";
- 	};
- 
-@@ -227,6 +230,7 @@
- 		reg = <0 0xe6540000 0 0x40>;
- 		interrupt-parent = <&gic>;
- 		interrupts = <0 290 IRQ_TYPE_LEVEL_HIGH>;
-+		clocks = <&mstp3_clks R8A7790_CLK_I2C3>;
- 		status = "disabled";
- 	};
- 
-@@ -235,6 +239,7 @@
- 		reg = <0 0xee200000 0 0x80>;
- 		interrupt-parent = <&gic>;
- 		interrupts = <0 169 IRQ_TYPE_LEVEL_HIGH>;
-+		clocks = <&mstp3_clks R8A7790_CLK_MMCIF0>;
- 		reg-io-width = <4>;
- 		status = "disabled";
- 	};
-@@ -244,6 +249,7 @@
- 		reg = <0 0xee220000 0 0x80>;
- 		interrupt-parent = <&gic>;
- 		interrupts = <0 170 IRQ_TYPE_LEVEL_HIGH>;
-+		clocks = <&mstp3_clks R8A7790_CLK_MMCIF1>;
- 		reg-io-width = <4>;
- 		status = "disabled";
- 	};
-@@ -258,6 +264,7 @@
- 		reg = <0 0xee100000 0 0x200>;
- 		interrupt-parent = <&gic>;
- 		interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>;
-+		clocks = <&mstp3_clks R8A7790_CLK_SDHI0>;
- 		cap-sd-highspeed;
- 		status = "disabled";
- 	};
-@@ -267,6 +274,7 @@
- 		reg = <0 0xee120000 0 0x200>;
- 		interrupt-parent = <&gic>;
- 		interrupts = <0 166 IRQ_TYPE_LEVEL_HIGH>;
-+		clocks = <&mstp3_clks R8A7790_CLK_SDHI1>;
- 		cap-sd-highspeed;
- 		status = "disabled";
- 	};
-@@ -276,6 +284,7 @@
- 		reg = <0 0xee140000 0 0x100>;
- 		interrupt-parent = <&gic>;
- 		interrupts = <0 167 IRQ_TYPE_LEVEL_HIGH>;
-+		clocks = <&mstp3_clks R8A7790_CLK_SDHI2>;
- 		cap-sd-highspeed;
- 		status = "disabled";
- 	};
-@@ -285,6 +294,7 @@
- 		reg = <0 0xee160000 0 0x100>;
- 		interrupt-parent = <&gic>;
- 		interrupts = <0 168 IRQ_TYPE_LEVEL_HIGH>;
-+		clocks = <&mstp3_clks R8A7790_CLK_SDHI3>;
- 		cap-sd-highspeed;
- 		status = "disabled";
- 	};
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0246-ARM-shmobile-bockw-add-SDHI0-support.patch b/patches.renesas/0246-ARM-shmobile-bockw-add-SDHI0-support.patch
deleted file mode 100644
index 90edba87e4a9f..0000000000000
--- a/patches.renesas/0246-ARM-shmobile-bockw-add-SDHI0-support.patch
+++ /dev/null
@@ -1,91 +0,0 @@
-From c366a4885dfd784d89f01a7cd6d5ad5ba8a133af Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Wed, 17 Apr 2013 05:17:56 +0000
-Subject: ARM: shmobile: bockw: add SDHI0 support
-
-This patch is directly accessing to PUPR4 register which can
-control SDHI0 CD/WP pin pull-up setting.
-It should be replaced in the future.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit ca7bb309485e4ec89a9addd47beaa1d079841b7d)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-bockw.c | 29 +++++++++++++++++++++++++++++
- 1 file changed, 29 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/board-bockw.c b/arch/arm/mach-shmobile/board-bockw.c
-index 4d657159..2b6103e5 100644
---- a/arch/arm/mach-shmobile/board-bockw.c
-+++ b/arch/arm/mach-shmobile/board-bockw.c
-@@ -18,6 +18,8 @@
-  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
-  */
- 
-+#include <linux/mfd/tmio.h>
-+#include <linux/mmc/host.h>
- #include <linux/pinctrl/machine.h>
- #include <linux/platform_device.h>
- #include <linux/regulator/fixed.h>
-@@ -54,16 +56,28 @@ static struct resource smsc911x_resources[] = {
- 	DEFINE_RES_IRQ(irq_pin(0)), /* IRQ 0 */
- };
- 
-+/* SDHI */
-+static struct sh_mobile_sdhi_info sdhi0_info = {
-+	.tmio_caps	= MMC_CAP_SD_HIGHSPEED,
-+	.tmio_ocr_mask	= MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
-+	.tmio_flags	= TMIO_MMC_HAS_IDLE_WAIT,
-+};
-+
- static const struct pinctrl_map bockw_pinctrl_map[] = {
- 	/* SCIF0 */
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
- 				  "scif0_data_a", "scif0"),
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
- 				  "scif0_ctrl", "scif0"),
-+	/* SDHI0 */
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
-+				  "sdhi0", "sdhi0"),
- };
- 
- #define FPGA	0x18200000
- #define IRQ0MR	0x30
-+#define PFC	0xfffc0000
-+#define PUPR4	0x110
- static void __init bockw_init(void)
- {
- 	void __iomem *base;
-@@ -76,6 +90,7 @@ static void __init bockw_init(void)
- 				  ARRAY_SIZE(bockw_pinctrl_map));
- 	r8a7778_pinmux_init();
- 
-+	/* for SMSC */
- 	base = ioremap_nocache(FPGA, SZ_1M);
- 	if (base) {
- 		/*
-@@ -98,6 +113,20 @@ static void __init bockw_init(void)
- 			smsc911x_resources, ARRAY_SIZE(smsc911x_resources),
- 			&smsc911x_data, sizeof(smsc911x_data));
- 	}
-+
-+	/* for SDHI */
-+	base = ioremap_nocache(PFC, 0x200);
-+	if (base) {
-+		/*
-+		 * FIXME
-+		 *
-+		 * SDHI CD/WP pin needs pull-up
-+		 */
-+		iowrite32(ioread32(base + PUPR4) | (3 << 26), base + PUPR4);
-+		iounmap(base);
-+
-+		r8a7778_sdhi_init(0, &sdhi0_info);
-+	}
- }
- 
- static const char *bockw_boards_compat_dt[] __initdata = {
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0246-ARM-shmobile-r8a7791-Add-clocks.patch b/patches.renesas/0246-ARM-shmobile-r8a7791-Add-clocks.patch
deleted file mode 100644
index a1acd41f05070..0000000000000
--- a/patches.renesas/0246-ARM-shmobile-r8a7791-Add-clocks.patch
+++ /dev/null
@@ -1,349 +0,0 @@
-From c73a30b3def7438705b4d24ab327c4277b070715 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 11 Dec 2013 15:05:16 +0100
-Subject: ARM: shmobile: r8a7791: Add clocks
-
-Declare all core clocks and DIV6 clocks, as well as all MSTP clocks
-currently used by r8a7791 boards.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 59e79895b95892863617ce630fbda467f2470575)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7791.dtsi | 313 +++++++++++++++++++++++++++++++++++++++++
- 1 file changed, 313 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
-index a349aff54c76..0a8219258145 100644
---- a/arch/arm/boot/dts/r8a7791.dtsi
-+++ b/arch/arm/boot/dts/r8a7791.dtsi
-@@ -9,6 +9,7 @@
-  * kind, whether express or implied.
-  */
- 
-+#include <dt-bindings/clock/r8a7791-clock.h>
- #include <dt-bindings/interrupt-controller/arm-gic.h>
- #include <dt-bindings/interrupt-controller/irq.h>
- 
-@@ -183,4 +184,316 @@
- 		reg = <0 0xe6060000 0 0x250>;
- 		#gpio-range-cells = <3>;
- 	};
-+
-+	clocks {
-+		#address-cells = <2>;
-+		#size-cells = <2>;
-+		ranges;
-+
-+		/* External root clock */
-+		extal_clk: extal_clk {
-+			compatible = "fixed-clock";
-+			#clock-cells = <0>;
-+			/* This value must be overriden by the board. */
-+			clock-frequency = <0>;
-+			clock-output-names = "extal";
-+		};
-+
-+		/* Special CPG clocks */
-+		cpg_clocks: cpg_clocks@e6150000 {
-+			compatible = "renesas,r8a7791-cpg-clocks",
-+				     "renesas,rcar-gen2-cpg-clocks";
-+			reg = <0 0xe6150000 0 0x1000>;
-+			clocks = <&extal_clk>;
-+			#clock-cells = <1>;
-+			clock-output-names = "main", "pll0", "pll1", "pll3",
-+					     "lb", "qspi", "sdh", "sd0", "z";
-+		};
-+
-+		/* Variable factor clocks */
-+		sd1_clk: sd2_clk@e6150078 {
-+			compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock";
-+			reg = <0 0xe6150078 0 4>;
-+			clocks = <&pll1_div2_clk>;
-+			#clock-cells = <0>;
-+			clock-output-names = "sd1";
-+		};
-+		sd2_clk: sd3_clk@e615007c {
-+			compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock";
-+			reg = <0 0xe615007c 0 4>;
-+			clocks = <&pll1_div2_clk>;
-+			#clock-cells = <0>;
-+			clock-output-names = "sd2";
-+		};
-+		mmc0_clk: mmc0_clk@e6150240 {
-+			compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock";
-+			reg = <0 0xe6150240 0 4>;
-+			clocks = <&pll1_div2_clk>;
-+			#clock-cells = <0>;
-+			clock-output-names = "mmc0";
-+		};
-+		ssp_clk: ssp_clk@e6150248 {
-+			compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock";
-+			reg = <0 0xe6150248 0 4>;
-+			clocks = <&pll1_div2_clk>;
-+			#clock-cells = <0>;
-+			clock-output-names = "ssp";
-+		};
-+		ssprs_clk: ssprs_clk@e615024c {
-+			compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock";
-+			reg = <0 0xe615024c 0 4>;
-+			clocks = <&pll1_div2_clk>;
-+			#clock-cells = <0>;
-+			clock-output-names = "ssprs";
-+		};
-+
-+		/* Fixed factor clocks */
-+		pll1_div2_clk: pll1_div2_clk {
-+			compatible = "fixed-factor-clock";
-+			clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
-+			#clock-cells = <0>;
-+			clock-div = <2>;
-+			clock-mult = <1>;
-+			clock-output-names = "pll1_div2";
-+		};
-+		zg_clk: zg_clk {
-+			compatible = "fixed-factor-clock";
-+			clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
-+			#clock-cells = <0>;
-+			clock-div = <3>;
-+			clock-mult = <1>;
-+			clock-output-names = "zg";
-+		};
-+		zx_clk: zx_clk {
-+			compatible = "fixed-factor-clock";
-+			clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
-+			#clock-cells = <0>;
-+			clock-div = <3>;
-+			clock-mult = <1>;
-+			clock-output-names = "zx";
-+		};
-+		zs_clk: zs_clk {
-+			compatible = "fixed-factor-clock";
-+			clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
-+			#clock-cells = <0>;
-+			clock-div = <6>;
-+			clock-mult = <1>;
-+			clock-output-names = "zs";
-+		};
-+		hp_clk: hp_clk {
-+			compatible = "fixed-factor-clock";
-+			clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
-+			#clock-cells = <0>;
-+			clock-div = <12>;
-+			clock-mult = <1>;
-+			clock-output-names = "hp";
-+		};
-+		i_clk: i_clk {
-+			compatible = "fixed-factor-clock";
-+			clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
-+			#clock-cells = <0>;
-+			clock-div = <2>;
-+			clock-mult = <1>;
-+			clock-output-names = "i";
-+		};
-+		b_clk: b_clk {
-+			compatible = "fixed-factor-clock";
-+			clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
-+			#clock-cells = <0>;
-+			clock-div = <12>;
-+			clock-mult = <1>;
-+			clock-output-names = "b";
-+		};
-+		p_clk: p_clk {
-+			compatible = "fixed-factor-clock";
-+			clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
-+			#clock-cells = <0>;
-+			clock-div = <24>;
-+			clock-mult = <1>;
-+			clock-output-names = "p";
-+		};
-+		cl_clk: cl_clk {
-+			compatible = "fixed-factor-clock";
-+			clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
-+			#clock-cells = <0>;
-+			clock-div = <48>;
-+			clock-mult = <1>;
-+			clock-output-names = "cl";
-+		};
-+		m2_clk: m2_clk {
-+			compatible = "fixed-factor-clock";
-+			clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
-+			#clock-cells = <0>;
-+			clock-div = <8>;
-+			clock-mult = <1>;
-+			clock-output-names = "m2";
-+		};
-+		imp_clk: imp_clk {
-+			compatible = "fixed-factor-clock";
-+			clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
-+			#clock-cells = <0>;
-+			clock-div = <4>;
-+			clock-mult = <1>;
-+			clock-output-names = "imp";
-+		};
-+		rclk_clk: rclk_clk {
-+			compatible = "fixed-factor-clock";
-+			clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
-+			#clock-cells = <0>;
-+			clock-div = <(48 * 1024)>;
-+			clock-mult = <1>;
-+			clock-output-names = "rclk";
-+		};
-+		oscclk_clk: oscclk_clk {
-+			compatible = "fixed-factor-clock";
-+			clocks = <&cpg_clocks R8A7791_CLK_PLL1>;
-+			#clock-cells = <0>;
-+			clock-div = <(12 * 1024)>;
-+			clock-mult = <1>;
-+			clock-output-names = "oscclk";
-+		};
-+		zb3_clk: zb3_clk {
-+			compatible = "fixed-factor-clock";
-+			clocks = <&cpg_clocks R8A7791_CLK_PLL3>;
-+			#clock-cells = <0>;
-+			clock-div = <4>;
-+			clock-mult = <1>;
-+			clock-output-names = "zb3";
-+		};
-+		zb3d2_clk: zb3d2_clk {
-+			compatible = "fixed-factor-clock";
-+			clocks = <&cpg_clocks R8A7791_CLK_PLL3>;
-+			#clock-cells = <0>;
-+			clock-div = <8>;
-+			clock-mult = <1>;
-+			clock-output-names = "zb3d2";
-+		};
-+		ddr_clk: ddr_clk {
-+			compatible = "fixed-factor-clock";
-+			clocks = <&cpg_clocks R8A7791_CLK_PLL3>;
-+			#clock-cells = <0>;
-+			clock-div = <8>;
-+			clock-mult = <1>;
-+			clock-output-names = "ddr";
-+		};
-+		mp_clk: mp_clk {
-+			compatible = "fixed-factor-clock";
-+			clocks = <&pll1_div2_clk>;
-+			#clock-cells = <0>;
-+			clock-div = <15>;
-+			clock-mult = <1>;
-+			clock-output-names = "mp";
-+		};
-+		cp_clk: cp_clk {
-+			compatible = "fixed-factor-clock";
-+			clocks = <&extal_clk>;
-+			#clock-cells = <0>;
-+			clock-div = <2>;
-+			clock-mult = <1>;
-+			clock-output-names = "cp";
-+		};
-+
-+		/* Gate clocks */
-+		mstp1_clks: mstp1_clks@e6150134 {
-+			compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
-+			reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>;
-+			clocks = <&p_clk>, <&p_clk>, <&p_clk>, <&rclk_clk>,
-+				 <&cp_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>;
-+			#clock-cells = <1>;
-+			renesas,clock-indices = <
-+				R8A7791_CLK_TMU1 R8A7791_CLK_TMU3 R8A7791_CLK_TMU2
-+				R8A7791_CLK_CMT0 R8A7791_CLK_TMU0 R8A7791_CLK_VSP1_DU1
-+				R8A7791_CLK_VSP1_DU0 R8A7791_CLK_VSP1_SY
-+			>;
-+			clock-output-names =
-+				"tmu1", "tmu3", "tmu2", "cmt0", "tmu0", "vsp1-du1",
-+				"vsp1-du0", "vsp1-sy";
-+		};
-+		mstp2_clks: mstp2_clks@e6150138 {
-+			compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
-+			reg = <0 0xe6150138 0 4>, <0 0xe6150040 0 4>;
-+			clocks = <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>,
-+				 <&mp_clk>;
-+			#clock-cells = <1>;
-+			renesas,clock-indices = <
-+				R8A7791_CLK_SCIFA2 R8A7791_CLK_SCIFA1 R8A7791_CLK_SCIFA0
-+				R8A7791_CLK_SCIFB0 R8A7791_CLK_SCIFB1 R8A7791_CLK_SCIFB2
-+			>;
-+			clock-output-names =
-+				"scifa2", "scifa1", "scifa0", "scifb0", "scifb1",
-+				"scifb2";
-+		};
-+		mstp3_clks: mstp3_clks@e615013c {
-+			compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
-+			reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>;
-+			clocks = <&cp_clk>, <&sd2_clk>, <&sd1_clk>,
-+				<&cpg_clocks R8A7791_CLK_SD0>, <&mmc0_clk>, <&rclk_clk>;
-+			#clock-cells = <1>;
-+			renesas,clock-indices = <
-+				R8A7791_CLK_TPU0 R8A7791_CLK_SDHI2 R8A7791_CLK_SDHI1
-+				R8A7791_CLK_SDHI0 R8A7791_CLK_MMCIF0 R8A7791_CLK_CMT1
-+			>;
-+			clock-output-names =
-+				"tpu0", "sdhi2", "sdhi1", "sdhi0", "mmcif0", "cmt1";
-+		};
-+		mstp5_clks: mstp5_clks@e6150144 {
-+			compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
-+			reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>;
-+			clocks = <&extal_clk>, <&p_clk>;
-+			#clock-cells = <1>;
-+			renesas,clock-indices = <R8A7791_CLK_THERMAL R8A7791_CLK_PWM>;
-+			clock-output-names = "thermal", "pwm";
-+		};
-+		mstp7_clks: mstp7_clks@e615014c {
-+			compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
-+			reg = <0 0xe615014c 0 4>, <0 0xe61501c4 0 4>;
-+			clocks = <&mp_clk>, <&zs_clk>, <&p_clk>, <&p_clk>, <&zs_clk>,
-+				 <&zs_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>,
-+				 <&zx_clk>, <&zx_clk>, <&zx_clk>;
-+			#clock-cells = <1>;
-+			renesas,clock-indices = <
-+				R8A7791_CLK_HSUSB R8A7791_CLK_HSCIF2 R8A7791_CLK_SCIF5
-+				R8A7791_CLK_SCIF4 R8A7791_CLK_HSCIF1 R8A7791_CLK_HSCIF0
-+				R8A7791_CLK_SCIF3 R8A7791_CLK_SCIF2 R8A7791_CLK_SCIF1
-+				R8A7791_CLK_SCIF0 R8A7791_CLK_DU1 R8A7791_CLK_DU0
-+				R8A7791_CLK_LVDS0
-+			>;
-+			clock-output-names =
-+				"hsusb", "hscif2", "scif5", "scif4", "hscif1", "hscif0",
-+				"scif3", "scif2", "scif1", "scif0", "du1", "du0", "lvds0";
-+		};
-+		mstp8_clks: mstp8_clks@e6150990 {
-+			compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
-+			reg = <0 0xe6150990 0 4>, <0 0xe61509a0 0 4>;
-+			clocks = <&p_clk>;
-+			#clock-cells = <1>;
-+			renesas,clock-indices = <R8A7791_CLK_ETHER>;
-+			clock-output-names = "ether";
-+		};
-+		mstp9_clks: mstp9_clks@e6150994 {
-+			compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
-+			reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>;
-+			clocks = <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>,
-+				 <&p_clk>, <&p_clk>, <&p_clk>;
-+			#clock-cells = <1>;
-+			renesas,clock-indices = <
-+				R8A7791_CLK_RCAN1 R8A7791_CLK_RCAN0 R8A7791_CLK_I2C4
-+				R8A7791_CLK_I2C4 R8A7791_CLK_I2C3 R8A7791_CLK_I2C2
-+				R8A7791_CLK_I2C1 R8A7791_CLK_I2C0
-+			>;
-+			clock-output-names =
-+				"rcan1", "rcan0", "i2c5", "i2c4", "i2c3", "i2c2", "i2c1",
-+				"i2c0";
-+		};
-+		mstp11_clks: mstp11_clks@e615099c {
-+			compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
-+			reg = <0 0xe615099c 0 4>, <0 0xe61509ac 0 4>;
-+			clocks = <&mp_clk>, <&mp_clk>, <&mp_clk>;
-+			#clock-cells = <1>;
-+			renesas,clock-indices = <
-+				R8A7791_CLK_SCIFA3 R8A7791_CLK_SCIFA4 R8A7791_CLK_SCIFA5
-+			>;
-+			clock-output-names = "scifa3", "scifa4", "scifa5";
-+		};
-+	};
- };
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0247-ARM-shmobile-Sync-Lager-DTS-with-Lager-reference-DTS.patch b/patches.renesas/0247-ARM-shmobile-Sync-Lager-DTS-with-Lager-reference-DTS.patch
deleted file mode 100644
index fdd1b2e3904ce..0000000000000
--- a/patches.renesas/0247-ARM-shmobile-Sync-Lager-DTS-with-Lager-reference-DTS.patch
+++ /dev/null
@@ -1,92 +0,0 @@
-From b02329a9787863a6326e81fad7e3181635dd3dae Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 11 Dec 2013 15:13:47 +0100
-Subject: ARM: shmobile: Sync Lager DTS with Lager reference DTS
-
-Copy the device nodes from Lager reference into the Lager device tree
-file. This will allow us to use a single DTS file regarless of kernel
-configuration. In case of legacy C board code the device nodes may or
-may not be used, but in the multiplatform case all the DT device nodes
-are used.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 39fa511b8cd96395ee788267a16b8d3b20ac56e2)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7790-lager.dts | 53 +++++++++++++++++++++++++++++++++++++
- 1 file changed, 53 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts
-index 10e6a08164e5..67a69399ba19 100644
---- a/arch/arm/boot/dts/r8a7790-lager.dts
-+++ b/arch/arm/boot/dts/r8a7790-lager.dts
-@@ -10,6 +10,7 @@
- 
- /dts-v1/;
- #include "r8a7790.dtsi"
-+#include <dt-bindings/gpio/gpio.h>
- 
- / {
- 	model = "Lager";
-@@ -33,4 +34,56 @@
- 		#address-cells = <1>;
- 		#size-cells = <1>;
- 	};
-+
-+	leds {
-+		compatible = "gpio-leds";
-+		led6 {
-+			gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>;
-+		};
-+		led7 {
-+			gpios = <&gpio4 23 GPIO_ACTIVE_HIGH>;
-+		};
-+		led8 {
-+			gpios = <&gpio5 17 GPIO_ACTIVE_HIGH>;
-+		};
-+	};
-+
-+	fixedregulator3v3: fixedregulator@0 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "fixed-3.3V";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+		regulator-boot-on;
-+		regulator-always-on;
-+	};
-+};
-+
-+&pfc {
-+	pinctrl-0 = <&scif0_pins &scif1_pins>;
-+	pinctrl-names = "default";
-+
-+	scif0_pins: serial0 {
-+		renesas,groups = "scif0_data";
-+		renesas,function = "scif0";
-+	};
-+
-+	scif1_pins: serial1 {
-+		renesas,groups = "scif1_data";
-+		renesas,function = "scif1";
-+	};
-+
-+	mmc1_pins: mmc1 {
-+		renesas,groups = "mmc1_data8", "mmc1_ctrl";
-+		renesas,function = "mmc1";
-+	};
-+};
-+
-+&mmcif1 {
-+	pinctrl-0 = <&mmc1_pins>;
-+	pinctrl-names = "default";
-+
-+	vmmc-supply = <&fixedregulator3v3>;
-+	bus-width = <8>;
-+	non-removable;
-+	status = "okay";
- };
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0247-ARM-shmobile-marzen-keep-local-function-as-static.patch b/patches.renesas/0247-ARM-shmobile-marzen-keep-local-function-as-static.patch
deleted file mode 100644
index 687ad2280c0e1..0000000000000
--- a/patches.renesas/0247-ARM-shmobile-marzen-keep-local-function-as-static.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From 8febba8930bcba54b24743ec06bfb152f4a8d0e3 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Wed, 17 Apr 2013 23:33:47 -0700
-Subject: ARM: shmobile: marzen: keep local function as static
-
-marzen_init_late() should be static
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit f3031ff3f2e14f0ced4d45150316df2607b70a27)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-marzen.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/board-marzen.c b/arch/arm/mach-shmobile/board-marzen.c
-index 1e219745..a3810b03 100644
---- a/arch/arm/mach-shmobile/board-marzen.c
-+++ b/arch/arm/mach-shmobile/board-marzen.c
-@@ -350,7 +350,7 @@ static struct platform_device *marzen_late_devices[] __initdata = {
- 	&ohci1_device,
- };
- 
--void __init marzen_init_late(void)
-+static void __init marzen_init_late(void)
- {
- 	/* get usb phy */
- 	phy = usb_get_phy(USB_PHY_TYPE_USB2);
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0248-ARM-shmobile-Sync-Koelsch-DTS-with-Koelsch-reference.patch b/patches.renesas/0248-ARM-shmobile-Sync-Koelsch-DTS-with-Koelsch-reference.patch
deleted file mode 100644
index 399dfcbac9ec4..0000000000000
--- a/patches.renesas/0248-ARM-shmobile-Sync-Koelsch-DTS-with-Koelsch-reference.patch
+++ /dev/null
@@ -1,68 +0,0 @@
-From 799dd40316e9ca4e55d2063a64519987f86f4467 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 11 Dec 2013 15:13:48 +0100
-Subject: ARM: shmobile: Sync Koelsch DTS with Koelsch reference DTS
-
-Copy the device nodes from Koelsch reference into the Koeslch device
-tree file. This will allow us to use a single DTS file regarless of
-kernel configuration. In case of legacy C board code the device nodes
-may or may not be used, but in the multiplatform case all the DT device
-nodes are used.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit f8e2535d988a7945fa2c11214d55c20c73c60840)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7791-koelsch.dts | 29 +++++++++++++++++++++++++++++
- 1 file changed, 29 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts
-index c4e8b3a0cd13..d431f3189bba 100644
---- a/arch/arm/boot/dts/r8a7791-koelsch.dts
-+++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
-@@ -11,6 +11,7 @@
- 
- /dts-v1/;
- #include "r8a7791.dtsi"
-+#include <dt-bindings/gpio/gpio.h>
- 
- / {
- 	model = "Koelsch";
-@@ -29,4 +30,32 @@
- 		#address-cells = <1>;
- 		#size-cells = <1>;
- 	};
-+
-+	leds {
-+		compatible = "gpio-leds";
-+		led6 {
-+			gpios = <&gpio2 19 GPIO_ACTIVE_HIGH>;
-+		};
-+		led7 {
-+			gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>;
-+		};
-+		led8 {
-+			gpios = <&gpio2 21 GPIO_ACTIVE_HIGH>;
-+		};
-+	};
-+};
-+
-+&pfc {
-+	pinctrl-0 = <&scif0_pins &scif1_pins>;
-+	pinctrl-names = "default";
-+
-+	scif0_pins: serial0 {
-+		renesas,groups = "scif0_data_d";
-+		renesas,function = "scif0";
-+	};
-+
-+	scif1_pins: serial1 {
-+		renesas,groups = "scif1_data_d";
-+		renesas,function = "scif1";
-+	};
- };
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0248-arm-fix-up-ARM_ARCH_TIMER-selects.patch b/patches.renesas/0248-arm-fix-up-ARM_ARCH_TIMER-selects.patch
deleted file mode 100644
index 3478c014f927a..0000000000000
--- a/patches.renesas/0248-arm-fix-up-ARM_ARCH_TIMER-selects.patch
+++ /dev/null
@@ -1,94 +0,0 @@
-From 95304b3055e2281993ec7d917e032942c2f8010c Mon Sep 17 00:00:00 2001
-From: Mark Rutland <mark.rutland@arm.com>
-Date: Wed, 20 Mar 2013 13:57:38 +0000
-Subject: arm: fix up ARM_ARCH_TIMER selects
-
-In 8a4da6e: "arm: arch_timer: move core to drivers/clocksource", the
-selection of ARM_ARCH_TIMER was indirected via HAVE_ARM_ARCH_TIMER,
-though mach-exynos's selection of ARM_ARCH_TIMER was missed, and since
-then mach-shmobile, mach-tegra, and mach-virt have begun selecting
-ARM_ARCH_TIMER. This can lead to architected timer support erroneously
-appearing to not be selected in menuconfig.
-
-This patch fixes up the Kconfigs for those platforms to select
-HAVE_ARM_ARCH_TIMER.
-
-Signed-off-by: Mark Rutland <mark.rutland@arm.com>
-Acked-by: Stephen Warren <swarren@nvidia.com>
-Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
-Acked-by: Simon Horman <horms+renesas@verge.net.au>
-Cc: Kukjin Kim <kgene.kim@samsung.com>
-Cc: Marc Zyngier <marc.zyngier@arm.com>
-(cherry picked from commit fb521a0da1551468a45f2e2a1c1941d0033357ea)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-exynos/Kconfig   | 2 +-
- arch/arm/mach-shmobile/Kconfig | 4 ++--
- arch/arm/mach-tegra/Kconfig    | 2 +-
- arch/arm/mach-virt/Kconfig     | 2 +-
- 4 files changed, 5 insertions(+), 5 deletions(-)
-
-diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
-index ff18fc2e..756970f6 100644
---- a/arch/arm/mach-exynos/Kconfig
-+++ b/arch/arm/mach-exynos/Kconfig
-@@ -76,7 +76,7 @@ config SOC_EXYNOS5440
- 	default y
- 	depends on ARCH_EXYNOS5
- 	select ARCH_HAS_OPP
--	select ARM_ARCH_TIMER
-+	select HAVE_ARM_ARCH_TIMER
- 	select AUTO_ZRELADDR
- 	select PINCTRL
- 	select PINCTRL_EXYNOS5440
-diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
-index b542d00d..bfe972b9 100644
---- a/arch/arm/mach-shmobile/Kconfig
-+++ b/arch/arm/mach-shmobile/Kconfig
-@@ -23,7 +23,7 @@ config ARCH_R8A73A4
- 	select ARCH_WANT_OPTIONAL_GPIOLIB
- 	select ARM_GIC
- 	select CPU_V7
--	select ARM_ARCH_TIMER
-+	select HAVE_ARM_ARCH_TIMER
- 	select SH_CLK_CPG
- 	select RENESAS_IRQC
- 
-@@ -57,7 +57,7 @@ config ARCH_R8A7790
- 	select ARCH_WANT_OPTIONAL_GPIOLIB
- 	select ARM_GIC
- 	select CPU_V7
--	select ARM_ARCH_TIMER
-+	select HAVE_ARM_ARCH_TIMER
- 	select SH_CLK_CPG
- 	select RENESAS_IRQC
- 
-diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
-index 84d72fc3..65c5ae6f 100644
---- a/arch/arm/mach-tegra/Kconfig
-+++ b/arch/arm/mach-tegra/Kconfig
-@@ -60,7 +60,7 @@ config ARCH_TEGRA_3x_SOC
- 
- config ARCH_TEGRA_114_SOC
- 	bool "Enable support for Tegra114 family"
--	select ARM_ARCH_TIMER
-+	select HAVE_ARM_ARCH_TIMER
- 	select ARM_GIC
- 	select ARM_L1_CACHE_SHIFT_6
- 	select CPU_FREQ_TABLE if CPU_FREQ
-diff --git a/arch/arm/mach-virt/Kconfig b/arch/arm/mach-virt/Kconfig
-index 8958f0d8..081d4692 100644
---- a/arch/arm/mach-virt/Kconfig
-+++ b/arch/arm/mach-virt/Kconfig
-@@ -2,7 +2,7 @@ config ARCH_VIRT
- 	bool "Dummy Virtual Machine" if ARCH_MULTI_V7
- 	select ARCH_WANT_OPTIONAL_GPIOLIB
- 	select ARM_GIC
--	select ARM_ARCH_TIMER
-+	select HAVE_ARM_ARCH_TIMER
- 	select ARM_PSCI
- 	select HAVE_SMP
- 	select CPU_V7
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0249-ARM-shmobile-lager-Specify-external-clock-frequency-.patch b/patches.renesas/0249-ARM-shmobile-lager-Specify-external-clock-frequency-.patch
deleted file mode 100644
index ab6dab557773a..0000000000000
--- a/patches.renesas/0249-ARM-shmobile-lager-Specify-external-clock-frequency-.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From 0ea128eddf65fed2d755d4cd83375c250ca2b260 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 11 Dec 2013 15:13:49 +0100
-Subject: ARM: shmobile: lager: Specify external clock frequency in DT
-
-The external crystal frequency is 20MHz on the Lager board. Specify it
-in the device tree.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 62e43056ad5f584f8af83267c901f65e667e3657)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7790-lager.dts | 4 ++++
- 1 file changed, 4 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts
-index 67a69399ba19..57569cba1528 100644
---- a/arch/arm/boot/dts/r8a7790-lager.dts
-+++ b/arch/arm/boot/dts/r8a7790-lager.dts
-@@ -58,6 +58,10 @@
- 	};
- };
- 
-+&extal_clk {
-+	clock-frequency = <20000000>;
-+};
-+
- &pfc {
- 	pinctrl-0 = <&scif0_pins &scif1_pins>;
- 	pinctrl-names = "default";
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0249-ARM-shmobile-r8a7779-fix-Ether-device-name.patch b/patches.renesas/0249-ARM-shmobile-r8a7779-fix-Ether-device-name.patch
deleted file mode 100644
index cab8c3c1e874f..0000000000000
--- a/patches.renesas/0249-ARM-shmobile-r8a7779-fix-Ether-device-name.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 13b25c8af8b503aad8d64f7645f9e20f20b236cc Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Sun, 9 Jun 2013 01:24:35 +0400
-Subject: ARM: shmobile: r8a7779: fix Ether device name
-
-While recasting commit dace48d04dee46a3409d5e13cd98031522e46377 (ARM: shmobile:
-R8A7779: add Ether support), I made a typo in the platform device's name: used
-underscore instead of hyphen.
-
-However, there's now patch merged to net-next.git renaming the platform device
-from "sh-eth" to "r8a777x-ehter", so it makes the most sense to change the name
-straight to that one.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 4c370abbc11311d3753ea9145564ba1997c489fc)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-r8a7779.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c
-index dbb13f28..405ad665 100644
---- a/arch/arm/mach-shmobile/setup-r8a7779.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7779.c
-@@ -432,7 +432,7 @@ void __init r8a7779_add_standard_devices(void)
- 
- void __init r8a7779_add_ether_device(struct sh_eth_plat_data *pdata)
- {
--	platform_device_register_resndata(&platform_bus, "sh_eth", -1,
-+	platform_device_register_resndata(&platform_bus, "r8a777x-ether", -1,
- 					  ether_resources,
- 					  ARRAY_SIZE(ether_resources),
- 					  pdata, sizeof(*pdata));
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0250-ARM-shmobile-koelsch-Specify-external-clock-frequenc.patch b/patches.renesas/0250-ARM-shmobile-koelsch-Specify-external-clock-frequenc.patch
deleted file mode 100644
index b666127cb6c87..0000000000000
--- a/patches.renesas/0250-ARM-shmobile-koelsch-Specify-external-clock-frequenc.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From 70f0bb90c09bbdbbdd85001d42908f4b8b758b00 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 11 Dec 2013 15:13:50 +0100
-Subject: ARM: shmobile: koelsch: Specify external clock frequency in DT
-
-The external crystal frequency is 20MHz on the Koelsch board. Specify it
-in the device tree.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit fcf0c725cb38f7d55a89e6f87183afee90a3846d)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7791-koelsch.dts | 4 ++++
- 1 file changed, 4 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts
-index d431f3189bba..fd556c3483e3 100644
---- a/arch/arm/boot/dts/r8a7791-koelsch.dts
-+++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
-@@ -45,6 +45,10 @@
- 	};
- };
- 
-+&extal_clk {
-+	clock-frequency = <20000000>;
-+};
-+
- &pfc {
- 	pinctrl-0 = <&scif0_pins &scif1_pins>;
- 	pinctrl-names = "default";
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0250-ARM-shmobile-r8a7778-fix-Ether-device-name.patch b/patches.renesas/0250-ARM-shmobile-r8a7778-fix-Ether-device-name.patch
deleted file mode 100644
index 4f3c506ac0a46..0000000000000
--- a/patches.renesas/0250-ARM-shmobile-r8a7778-fix-Ether-device-name.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 1ca45f84b9a92242e0fb410a6f17d764c068b53f Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Sun, 9 Jun 2013 01:23:24 +0400
-Subject: ARM: shmobile: r8a7778: fix Ether device name
-
-While recasting commit 524219146a89aee5366326c225ccd71231419d89 (ARM: shmobile:
-R8A7778: add Ether support), I made a typo in the platform device's name: used
-underscore instead of hyphen.
-
-However, there's now patch merged to net-next.git renaming the platform device
-from "sh-eth" to "r8a777x-ehter", so it makes the most sense to change the name
-straight to that one.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit c02f846938fe64800240e97cb113a2bff0149c92)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-r8a7778.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-r8a7778.c b/arch/arm/mach-shmobile/setup-r8a7778.c
-index 1b9b7f2a..3004aba2 100644
---- a/arch/arm/mach-shmobile/setup-r8a7778.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7778.c
-@@ -97,7 +97,7 @@ static struct resource ether_resources[] = {
- 
- void __init r8a7778_add_ether_device(struct sh_eth_plat_data *pdata)
- {
--	platform_device_register_resndata(&platform_bus, "sh_eth", -1,
-+	platform_device_register_resndata(&platform_bus, "r8a777x-ether", -1,
- 					  ether_resources,
- 					  ARRAY_SIZE(ether_resources),
- 					  pdata, sizeof(*pdata));
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0251-ARM-shmobile-Remove-Lager-reference-DTS.patch b/patches.renesas/0251-ARM-shmobile-Remove-Lager-reference-DTS.patch
deleted file mode 100644
index d5032562de0e5..0000000000000
--- a/patches.renesas/0251-ARM-shmobile-Remove-Lager-reference-DTS.patch
+++ /dev/null
@@ -1,117 +0,0 @@
-From 32648aae9e454137609348cd6809594d072e2186 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 17 Oct 2013 17:22:16 +0200
-Subject: ARM: shmobile: Remove Lager reference DTS
-
-Now that the DTS file r8a7790-lager.dts can be used with board-lager.c
-and board-lager-reference.c, proceed with removing
-r8a7790-lager-reference.dts.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 2b4baad03854ab23ce9a4c073e3795ac29985132)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7790-lager-reference.dts | 89 ---------------------------
- 1 file changed, 89 deletions(-)
- delete mode 100644 arch/arm/boot/dts/r8a7790-lager-reference.dts
-
-diff --git a/arch/arm/boot/dts/r8a7790-lager-reference.dts b/arch/arm/boot/dts/r8a7790-lager-reference.dts
-deleted file mode 100644
-index dfedc0ea82e1..000000000000
---- a/arch/arm/boot/dts/r8a7790-lager-reference.dts
-+++ /dev/null
-@@ -1,89 +0,0 @@
--/*
-- * Device Tree Source for the Lager board
-- *
-- * Copyright (C) 2013 Renesas Solutions Corp.
-- *
-- * This file is licensed under the terms of the GNU General Public License
-- * version 2.  This program is licensed "as is" without any warranty of any
-- * kind, whether express or implied.
-- */
--
--/dts-v1/;
--#include "r8a7790.dtsi"
--#include <dt-bindings/gpio/gpio.h>
--
--/ {
--	model = "Lager";
--	compatible = "renesas,lager-reference", "renesas,r8a7790";
--
--	chosen {
--		bootargs = "console=ttySC6,115200 ignore_loglevel rw";
--	};
--
--	memory@40000000 {
--		device_type = "memory";
--		reg = <0 0x40000000 0 0x80000000>;
--	};
--
--	memory@180000000 {
--		device_type = "memory";
--		reg = <1 0x80000000 0 0x80000000>;
--	};
--
--	lbsc {
--		#address-cells = <1>;
--		#size-cells = <1>;
--	};
--
--	leds {
--		compatible = "gpio-leds";
--		led6 {
--			gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>;
--		};
--		led7 {
--			gpios = <&gpio4 23 GPIO_ACTIVE_HIGH>;
--		};
--		led8 {
--			gpios = <&gpio5 17 GPIO_ACTIVE_HIGH>;
--		};
--	};
--
--	fixedregulator3v3: fixedregulator@0 {
--		compatible = "regulator-fixed";
--		regulator-name = "fixed-3.3V";
--		regulator-min-microvolt = <3300000>;
--		regulator-max-microvolt = <3300000>;
--		regulator-boot-on;
--		regulator-always-on;
--	};
--};
--
--&pfc {
--	pinctrl-0 = <&scif0_pins &scif1_pins>;
--	pinctrl-names = "default";
--
--	scif0_pins: serial0 {
--		renesas,groups = "scif0_data";
--		renesas,function = "scif0";
--	};
--
--	scif1_pins: serial1 {
--		renesas,groups = "scif1_data";
--		renesas,function = "scif1";
--	};
--
--	mmc1_pins: mmc1 {
--		renesas,groups = "mmc1_data8", "mmc1_ctrl";
--		renesas,function = "mmc1";
--	};
--};
--
--&mmcif1 {
--	pinctrl-0 = <&mmc1_pins>;
--	pinctrl-names = "default";
--
--	vmmc-supply = <&fixedregulator3v3>;
--	bus-width = <8>;
--	non-removable;
--	status = "okay";
--};
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0251-ARM-shmobile-r8a7790-HSCIF-support.patch b/patches.renesas/0251-ARM-shmobile-r8a7790-HSCIF-support.patch
deleted file mode 100644
index 7629e36d6fd3c..0000000000000
--- a/patches.renesas/0251-ARM-shmobile-r8a7790-HSCIF-support.patch
+++ /dev/null
@@ -1,48 +0,0 @@
-From 7f9f1e5f3e3d96824fb275a0c9314802b2bffa1d Mon Sep 17 00:00:00 2001
-From: Ulrich Hecht <ulrich.hecht@gmail.com>
-Date: Fri, 31 May 2013 17:57:02 +0200
-Subject: ARM: shmobile: r8a7790: HSCIF support
-
-Adds support for HSCIF0 and HSCIF1 on the r8a7790.
-
-Signed-off-by: Ulrich Hecht <ulrich.hecht@gmail.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 729cb826d45cc2e58bb0256b66f1a8e42173bf54)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r8a7790.c | 5 +++++
- 1 file changed, 5 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
-index b393592e..379bce69 100644
---- a/arch/arm/mach-shmobile/clock-r8a7790.c
-+++ b/arch/arm/mach-shmobile/clock-r8a7790.c
-@@ -181,6 +181,7 @@ static struct clk div6_clks[DIV6_NR] = {
- /* MSTP */
- enum {
- 	MSTP721, MSTP720,
-+	MSTP717, MSTP716,
- 	MSTP304,
- 	MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202,
- 	MSTP_NR
-@@ -196,6 +197,8 @@ static struct clk mstp_clks[MSTP_NR] = {
- 	[MSTP204] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 4, 0), /* SCIFA0 */
- 	[MSTP203] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 3, 0), /* SCIFA1 */
- 	[MSTP202] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 2, 0), /* SCIFA2 */
-+	[MSTP717] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 17, 0), /* HSCIF0 */
-+	[MSTP716] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 16, 0), /* HSCIF1 */
- };
- 
- static struct clk_lookup lookups[] = {
-@@ -249,6 +252,8 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP202]),
- 	CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP721]),
- 	CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP720]),
-+	CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP717]),
-+	CLKDEV_DEV_ID("sh-sci.9", &mstp_clks[MSTP716]),
- };
- 
- #define R8A7790_CLOCK_ROOT(e, m, p0, p1, p30, p31)		\
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0252-ARM-shmobile-Lager-conditionally-select-CONFIG_MICRE.patch b/patches.renesas/0252-ARM-shmobile-Lager-conditionally-select-CONFIG_MICRE.patch
deleted file mode 100644
index 0d7dbe4715cff..0000000000000
--- a/patches.renesas/0252-ARM-shmobile-Lager-conditionally-select-CONFIG_MICRE.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From e4944bc9b94c1ae09f6ccc4044628b2411678bdb Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Fri, 20 Dec 2013 02:20:54 +0300
-Subject: ARM: shmobile: Lager: conditionally select CONFIG_MICREL_PHY
-
-Now that support for KSZ8041RNLI is added to the Micrel PHY driver and we intend
-to support PHY IRQs on the Lager board, we have to enable the Micrel driver.
-Do this by selecting CONFIG_MICREL_PHY for Lager if CONFIG_SH_ETH is enabled.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 601e68c2232297cf1811adc09c82f49eeb276bd8)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/Kconfig | 2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
-index 338640631e08..a127252ab9e1 100644
---- a/arch/arm/mach-shmobile/Kconfig
-+++ b/arch/arm/mach-shmobile/Kconfig
-@@ -54,6 +54,7 @@ config MACH_KZM9D
- config MACH_LAGER
- 	bool "Lager board"
- 	depends on ARCH_R8A7790
-+	select MICREL_PHY if SH_ETH
- 
- comment "Renesas ARM SoCs System Configuration"
- endif
-@@ -261,6 +262,7 @@ config MACH_LAGER
- 	bool "Lager board"
- 	depends on ARCH_R8A7790
- 	select USE_OF
-+	select MICREL_PHY if SH_ETH
- 
- config MACH_KOELSCH
- 	bool "Koelsch board"
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0252-ARM-shmobile-Marzen-move-USB-EHCI-OHCI-and-PHY-devic.patch b/patches.renesas/0252-ARM-shmobile-Marzen-move-USB-EHCI-OHCI-and-PHY-devic.patch
deleted file mode 100644
index 1cf6d3ad98f60..0000000000000
--- a/patches.renesas/0252-ARM-shmobile-Marzen-move-USB-EHCI-OHCI-and-PHY-devic.patch
+++ /dev/null
@@ -1,496 +0,0 @@
-From 5d2ca7b85fadf85bf538099a008babce7d088c15 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Sun, 2 Jun 2013 01:30:15 +0400
-Subject: ARM: shmobile: Marzen: move USB EHCI, OHCI, and PHY devices to
- R8A7779 code
-
-USB EHCI, OHCI, and common PHY are the SoC devices but are wrongly defined and
-registered in the Marzen board file.  Move the data and code to their proper
-place in setup-r8a7779.c; while at it, we have to rename r8a7779_late_devices[]
-to r8a7779_standard_devices[] -- this seems legitimate since they are registered
-from r8a7779_add_standard_devices() anyway.
-
-Note that I'm deliberately changing the USB PHY platform device's 'id' field
-from (previously just omitted) 0 to -1 as the device is a single of its kind.
-
-Note also that the board and SoC code have to be in one patch to keep the code
-bisectable...
-
-The patch has been tested on the Marzen board.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-[horms+renesas@verge.net.au: manually applied]
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-(cherry picked from commit 2c8788bfd89bad424d3c288b5a52ce141271b862)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-	arch/arm/mach-shmobile/board-marzen.c
----
- arch/arm/mach-shmobile/board-marzen.c         | 178 +------------------------
- arch/arm/mach-shmobile/include/mach/r8a7779.h |   1 +
- arch/arm/mach-shmobile/setup-r8a7779.c        | 185 +++++++++++++++++++++++++-
- 3 files changed, 184 insertions(+), 180 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-marzen.c b/arch/arm/mach-shmobile/board-marzen.c
-index a3810b03..7e04c391 100644
---- a/arch/arm/mach-shmobile/board-marzen.c
-+++ b/arch/arm/mach-shmobile/board-marzen.c
-@@ -37,10 +37,6 @@
- #include <linux/mmc/host.h>
- #include <linux/mmc/sh_mobile_sdhi.h>
- #include <linux/mfd/tmio.h>
--#include <linux/usb/otg.h>
--#include <linux/usb/ehci_pdriver.h>
--#include <linux/usb/ohci_pdriver.h>
--#include <linux/pm_runtime.h>
- #include <mach/hardware.h>
- #include <mach/r8a7779.h>
- #include <mach/common.h>
-@@ -150,26 +146,6 @@ static struct platform_device hspi_device = {
- 	.num_resources	= ARRAY_SIZE(hspi_resources),
- };
- 
--/* USB PHY */
--static struct resource usb_phy_resources[] = {
--	[0] = {
--		.start		= 0xffe70000,
--		.end		= 0xffe70900 - 1,
--		.flags		= IORESOURCE_MEM,
--	},
--	[1] = {
--		.start		= 0xfff70000,
--		.end		= 0xfff70900 - 1,
--		.flags		= IORESOURCE_MEM,
--	},
--};
--
--static struct platform_device usb_phy_device = {
--	.name		= "rcar_usb_phy",
--	.resource	= usb_phy_resources,
--	.num_resources	= ARRAY_SIZE(usb_phy_resources),
--};
--
- /* LEDS */
- static struct gpio_led marzen_leds[] = {
- 	{
-@@ -205,161 +181,9 @@ static struct platform_device *marzen_devices[] __initdata = {
- 	&sdhi0_device,
- 	&thermal_device,
- 	&hspi_device,
--	&usb_phy_device,
- 	&leds_device,
- };
- 
--/* USB */
--static struct usb_phy *phy;
--static int usb_power_on(struct platform_device *pdev)
--{
--	if (IS_ERR(phy))
--		return PTR_ERR(phy);
--
--	pm_runtime_enable(&pdev->dev);
--	pm_runtime_get_sync(&pdev->dev);
--
--	usb_phy_init(phy);
--
--	return 0;
--}
--
--static void usb_power_off(struct platform_device *pdev)
--{
--	if (IS_ERR(phy))
--		return;
--
--	usb_phy_shutdown(phy);
--
--	pm_runtime_put_sync(&pdev->dev);
--	pm_runtime_disable(&pdev->dev);
--}
--
--static struct usb_ehci_pdata ehcix_pdata = {
--	.power_on	= usb_power_on,
--	.power_off	= usb_power_off,
--	.power_suspend	= usb_power_off,
--};
--
--static struct resource ehci0_resources[] = {
--	[0] = {
--		.start	= 0xffe70000,
--		.end	= 0xffe70400 - 1,
--		.flags	= IORESOURCE_MEM,
--	},
--	[1] = {
--		.start	= gic_iid(0x4c),
--		.flags	= IORESOURCE_IRQ,
--	},
--};
--
--static struct platform_device ehci0_device = {
--	.name	= "ehci-platform",
--	.id	= 0,
--	.dev	= {
--		.dma_mask		= &ehci0_device.dev.coherent_dma_mask,
--		.coherent_dma_mask	= 0xffffffff,
--		.platform_data		= &ehcix_pdata,
--	},
--	.num_resources	= ARRAY_SIZE(ehci0_resources),
--	.resource	= ehci0_resources,
--};
--
--static struct resource ehci1_resources[] = {
--	[0] = {
--		.start	= 0xfff70000,
--		.end	= 0xfff70400 - 1,
--		.flags	= IORESOURCE_MEM,
--	},
--	[1] = {
--		.start	= gic_iid(0x4d),
--		.flags	= IORESOURCE_IRQ,
--	},
--};
--
--static struct platform_device ehci1_device = {
--	.name	= "ehci-platform",
--	.id	= 1,
--	.dev	= {
--		.dma_mask		= &ehci1_device.dev.coherent_dma_mask,
--		.coherent_dma_mask	= 0xffffffff,
--		.platform_data		= &ehcix_pdata,
--	},
--	.num_resources	= ARRAY_SIZE(ehci1_resources),
--	.resource	= ehci1_resources,
--};
--
--static struct usb_ohci_pdata ohcix_pdata = {
--	.power_on	= usb_power_on,
--	.power_off	= usb_power_off,
--	.power_suspend	= usb_power_off,
--};
--
--static struct resource ohci0_resources[] = {
--	[0] = {
--		.start	= 0xffe70400,
--		.end	= 0xffe70800 - 1,
--		.flags	= IORESOURCE_MEM,
--	},
--	[1] = {
--		.start	= gic_iid(0x4c),
--		.flags	= IORESOURCE_IRQ,
--	},
--};
--
--static struct platform_device ohci0_device = {
--	.name	= "ohci-platform",
--	.id	= 0,
--	.dev	= {
--		.dma_mask		= &ohci0_device.dev.coherent_dma_mask,
--		.coherent_dma_mask	= 0xffffffff,
--		.platform_data		= &ohcix_pdata,
--	},
--	.num_resources	= ARRAY_SIZE(ohci0_resources),
--	.resource	= ohci0_resources,
--};
--
--static struct resource ohci1_resources[] = {
--	[0] = {
--		.start	= 0xfff70400,
--		.end	= 0xfff70800 - 1,
--		.flags	= IORESOURCE_MEM,
--	},
--	[1] = {
--		.start	= gic_iid(0x4d),
--		.flags	= IORESOURCE_IRQ,
--	},
--};
--
--static struct platform_device ohci1_device = {
--	.name	= "ohci-platform",
--	.id	= 1,
--	.dev	= {
--		.dma_mask		= &ohci1_device.dev.coherent_dma_mask,
--		.coherent_dma_mask	= 0xffffffff,
--		.platform_data		= &ohcix_pdata,
--	},
--	.num_resources	= ARRAY_SIZE(ohci1_resources),
--	.resource	= ohci1_resources,
--};
--
--static struct platform_device *marzen_late_devices[] __initdata = {
--	&ehci0_device,
--	&ehci1_device,
--	&ohci0_device,
--	&ohci1_device,
--};
--
--static void __init marzen_init_late(void)
--{
--	/* get usb phy */
--	phy = usb_get_phy(USB_PHY_TYPE_USB2);
--
--	shmobile_init_late();
--	platform_add_devices(marzen_late_devices,
--			     ARRAY_SIZE(marzen_late_devices));
--}
--
- static const struct pinctrl_map marzen_pinctrl_map[] = {
- 	/* HSPI0 */
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh-hspi.0", "pfc-r8a7779",
-@@ -418,6 +242,6 @@ MACHINE_START(MARZEN, "marzen")
- 	.nr_irqs	= NR_IRQS_LEGACY,
- 	.init_irq	= r8a7779_init_irq,
- 	.init_machine	= marzen_init,
--	.init_late	= marzen_init_late,
-+	.init_late	= r8a7779_init_late,
- 	.init_time	= r8a7779_earlytimer_init,
- MACHINE_END
-diff --git a/arch/arm/mach-shmobile/include/mach/r8a7779.h b/arch/arm/mach-shmobile/include/mach/r8a7779.h
-index 188b2959..f10727f7 100644
---- a/arch/arm/mach-shmobile/include/mach/r8a7779.h
-+++ b/arch/arm/mach-shmobile/include/mach/r8a7779.h
-@@ -33,6 +33,7 @@ extern void r8a7779_add_early_devices(void);
- extern void r8a7779_add_standard_devices(void);
- extern void r8a7779_add_standard_devices_dt(void);
- extern void r8a7779_add_ether_device(struct sh_eth_plat_data *pdata);
-+extern void r8a7779_init_late(void);
- extern void r8a7779_clock_init(void);
- extern void r8a7779_pinmux_init(void);
- extern void r8a7779_pm_init(void);
-diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c
-index 405ad665..a57495bd 100644
---- a/arch/arm/mach-shmobile/setup-r8a7779.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7779.c
-@@ -32,6 +32,10 @@
- #include <linux/sh_intc.h>
- #include <linux/sh_timer.h>
- #include <linux/dma-mapping.h>
-+#include <linux/usb/otg.h>
-+#include <linux/usb/ehci_pdriver.h>
-+#include <linux/usb/ohci_pdriver.h>
-+#include <linux/pm_runtime.h>
- #include <mach/hardware.h>
- #include <mach/irqs.h>
- #include <mach/r8a7779.h>
-@@ -383,6 +387,162 @@ static struct platform_device sata_device = {
- 	},
- };
- 
-+/* USB PHY */
-+static struct resource usb_phy_resources[] = {
-+	[0] = {
-+		.start		= 0xffe70000,
-+		.end		= 0xffe70900 - 1,
-+		.flags		= IORESOURCE_MEM,
-+	},
-+	[1] = {
-+		.start		= 0xfff70000,
-+		.end		= 0xfff70900 - 1,
-+		.flags		= IORESOURCE_MEM,
-+	},
-+};
-+
-+static struct platform_device usb_phy_device = {
-+	.name		= "rcar_usb_phy",
-+	.id		= -1,
-+	.resource	= usb_phy_resources,
-+	.num_resources	= ARRAY_SIZE(usb_phy_resources),
-+};
-+
-+/* USB */
-+static struct usb_phy *phy;
-+
-+static int usb_power_on(struct platform_device *pdev)
-+{
-+	if (IS_ERR(phy))
-+		return PTR_ERR(phy);
-+
-+	pm_runtime_enable(&pdev->dev);
-+	pm_runtime_get_sync(&pdev->dev);
-+
-+	usb_phy_init(phy);
-+
-+	return 0;
-+}
-+
-+static void usb_power_off(struct platform_device *pdev)
-+{
-+	if (IS_ERR(phy))
-+		return;
-+
-+	usb_phy_shutdown(phy);
-+
-+	pm_runtime_put_sync(&pdev->dev);
-+	pm_runtime_disable(&pdev->dev);
-+}
-+
-+static struct usb_ehci_pdata ehcix_pdata = {
-+	.power_on	= usb_power_on,
-+	.power_off	= usb_power_off,
-+	.power_suspend	= usb_power_off,
-+};
-+
-+static struct resource ehci0_resources[] = {
-+	[0] = {
-+		.start	= 0xffe70000,
-+		.end	= 0xffe70400 - 1,
-+		.flags	= IORESOURCE_MEM,
-+	},
-+	[1] = {
-+		.start	= gic_iid(0x4c),
-+		.flags	= IORESOURCE_IRQ,
-+	},
-+};
-+
-+static struct platform_device ehci0_device = {
-+	.name	= "ehci-platform",
-+	.id	= 0,
-+	.dev	= {
-+		.dma_mask		= &ehci0_device.dev.coherent_dma_mask,
-+		.coherent_dma_mask	= 0xffffffff,
-+		.platform_data		= &ehcix_pdata,
-+	},
-+	.num_resources	= ARRAY_SIZE(ehci0_resources),
-+	.resource	= ehci0_resources,
-+};
-+
-+static struct resource ehci1_resources[] = {
-+	[0] = {
-+		.start	= 0xfff70000,
-+		.end	= 0xfff70400 - 1,
-+		.flags	= IORESOURCE_MEM,
-+	},
-+	[1] = {
-+		.start	= gic_iid(0x4d),
-+		.flags	= IORESOURCE_IRQ,
-+	},
-+};
-+
-+static struct platform_device ehci1_device = {
-+	.name	= "ehci-platform",
-+	.id	= 1,
-+	.dev	= {
-+		.dma_mask		= &ehci1_device.dev.coherent_dma_mask,
-+		.coherent_dma_mask	= 0xffffffff,
-+		.platform_data		= &ehcix_pdata,
-+	},
-+	.num_resources	= ARRAY_SIZE(ehci1_resources),
-+	.resource	= ehci1_resources,
-+};
-+
-+static struct usb_ohci_pdata ohcix_pdata = {
-+	.power_on	= usb_power_on,
-+	.power_off	= usb_power_off,
-+	.power_suspend	= usb_power_off,
-+};
-+
-+static struct resource ohci0_resources[] = {
-+	[0] = {
-+		.start	= 0xffe70400,
-+		.end	= 0xffe70800 - 1,
-+		.flags	= IORESOURCE_MEM,
-+	},
-+	[1] = {
-+		.start	= gic_iid(0x4c),
-+		.flags	= IORESOURCE_IRQ,
-+	},
-+};
-+
-+static struct platform_device ohci0_device = {
-+	.name	= "ohci-platform",
-+	.id	= 0,
-+	.dev	= {
-+		.dma_mask		= &ohci0_device.dev.coherent_dma_mask,
-+		.coherent_dma_mask	= 0xffffffff,
-+		.platform_data		= &ohcix_pdata,
-+	},
-+	.num_resources	= ARRAY_SIZE(ohci0_resources),
-+	.resource	= ohci0_resources,
-+};
-+
-+static struct resource ohci1_resources[] = {
-+	[0] = {
-+		.start	= 0xfff70400,
-+		.end	= 0xfff70800 - 1,
-+		.flags	= IORESOURCE_MEM,
-+	},
-+	[1] = {
-+		.start	= gic_iid(0x4d),
-+		.flags	= IORESOURCE_IRQ,
-+	},
-+};
-+
-+static struct platform_device ohci1_device = {
-+	.name	= "ohci-platform",
-+	.id	= 1,
-+	.dev	= {
-+		.dma_mask		= &ohci1_device.dev.coherent_dma_mask,
-+		.coherent_dma_mask	= 0xffffffff,
-+		.platform_data		= &ohcix_pdata,
-+	},
-+	.num_resources	= ARRAY_SIZE(ohci1_resources),
-+	.resource	= ohci1_resources,
-+};
-+
- /* Ether */
- static struct resource ether_resources[] = {
- 	{
-@@ -404,9 +564,10 @@ static struct platform_device *r8a7779_devices_dt[] __initdata = {
- 	&scif5_device,
- 	&tmu00_device,
- 	&tmu01_device,
-+	&usb_phy_device,
- };
- 
--static struct platform_device *r8a7779_late_devices[] __initdata = {
-+static struct platform_device *r8a7779_standard_devices[] __initdata = {
- 	&i2c0_device,
- 	&i2c1_device,
- 	&i2c2_device,
-@@ -426,8 +587,8 @@ void __init r8a7779_add_standard_devices(void)
- 
- 	platform_add_devices(r8a7779_devices_dt,
- 			    ARRAY_SIZE(r8a7779_devices_dt));
--	platform_add_devices(r8a7779_late_devices,
--			    ARRAY_SIZE(r8a7779_late_devices));
-+	platform_add_devices(r8a7779_standard_devices,
-+			    ARRAY_SIZE(r8a7779_standard_devices));
- }
- 
- void __init r8a7779_add_ether_device(struct sh_eth_plat_data *pdata)
-@@ -470,6 +631,23 @@ void __init r8a7779_add_early_devices(void)
- 	 */
- }
- 
-+static struct platform_device *r8a7779_late_devices[] __initdata = {
-+	&ehci0_device,
-+	&ehci1_device,
-+	&ohci0_device,
-+	&ohci1_device,
-+};
-+
-+void __init r8a7779_init_late(void)
-+{
-+	/* get USB PHY */
-+	phy = usb_get_phy(USB_PHY_TYPE_USB2);
-+
-+	shmobile_init_late();
-+	platform_add_devices(r8a7779_late_devices,
-+			     ARRAY_SIZE(r8a7779_late_devices));
-+}
-+
- #ifdef CONFIG_USE_OF
- void __init r8a7779_init_delay(void)
- {
-@@ -503,6 +681,7 @@ DT_MACHINE_START(R8A7779_DT, "Generic R8A7779 (Flattened Device Tree)")
- 	.init_irq	= r8a7779_init_irq_dt,
- 	.init_machine	= r8a7779_add_standard_devices_dt,
- 	.init_time	= shmobile_timer_init,
-+	.init_late	= r8a7779_init_late,
- 	.dt_compat	= r8a7779_compat_dt,
- MACHINE_END
- #endif /* CONFIG_USE_OF */
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0253-ARM-shmobile-r8a7778-add-sound-SCU-clock-support.patch b/patches.renesas/0253-ARM-shmobile-r8a7778-add-sound-SCU-clock-support.patch
deleted file mode 100644
index 1a65505e31c3c..0000000000000
--- a/patches.renesas/0253-ARM-shmobile-r8a7778-add-sound-SCU-clock-support.patch
+++ /dev/null
@@ -1,64 +0,0 @@
-From a8d50796c2ead70bac26c0fb52fde18e2ef7d533 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Thu, 19 Dec 2013 18:09:34 -0800
-Subject: ARM: shmobile: r8a7778: add sound SCU clock support
-
-This is needed to use SRC (= Sampling Rate Converter)
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 950c4477f7804174338fb32c8cc6f9d228eef833)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r8a7778.c | 20 ++++++++++++++++++++
- 1 file changed, 20 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a7778.c b/arch/arm/mach-shmobile/clock-r8a7778.c
-index 4b601bf4ede4..9783945f8bc7 100644
---- a/arch/arm/mach-shmobile/clock-r8a7778.c
-+++ b/arch/arm/mach-shmobile/clock-r8a7778.c
-@@ -115,6 +115,8 @@ static struct clk *main_clks[] = {
- };
- 
- enum {
-+	MSTP531, MSTP530,
-+	MSTP529, MSTP528, MSTP527, MSTP526, MSTP525, MSTP524, MSTP523,
- 	MSTP331,
- 	MSTP323, MSTP322, MSTP321,
- 	MSTP311, MSTP310,
-@@ -129,6 +131,15 @@ enum {
- 	MSTP_NR };
- 
- static struct clk mstp_clks[MSTP_NR] = {
-+	[MSTP531] = SH_CLK_MSTP32(&p_clk, MSTPCR5, 31, 0), /* SCU0 */
-+	[MSTP530] = SH_CLK_MSTP32(&p_clk, MSTPCR5, 30, 0), /* SCU1 */
-+	[MSTP529] = SH_CLK_MSTP32(&p_clk, MSTPCR5, 29, 0), /* SCU2 */
-+	[MSTP528] = SH_CLK_MSTP32(&p_clk, MSTPCR5, 28, 0), /* SCU3 */
-+	[MSTP527] = SH_CLK_MSTP32(&p_clk, MSTPCR5, 27, 0), /* SCU4 */
-+	[MSTP526] = SH_CLK_MSTP32(&p_clk, MSTPCR5, 26, 0), /* SCU5 */
-+	[MSTP525] = SH_CLK_MSTP32(&p_clk, MSTPCR5, 25, 0), /* SCU6 */
-+	[MSTP524] = SH_CLK_MSTP32(&p_clk, MSTPCR5, 24, 0), /* SCU7 */
-+	[MSTP523] = SH_CLK_MSTP32(&p_clk, MSTPCR5, 23, 0), /* SCU8 */
- 	[MSTP331] = SH_CLK_MSTP32(&s4_clk, MSTPCR3, 31, 0), /* MMC */
- 	[MSTP323] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 23, 0), /* SDHI0 */
- 	[MSTP322] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 22, 0), /* SDHI1 */
-@@ -219,6 +230,15 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_ICK_ID("ssi.6", "rcar_sound", &mstp_clks[MSTP309]),
- 	CLKDEV_ICK_ID("ssi.7", "rcar_sound", &mstp_clks[MSTP308]),
- 	CLKDEV_ICK_ID("ssi.8", "rcar_sound", &mstp_clks[MSTP307]),
-+	CLKDEV_ICK_ID("scu.0", "rcar_sound", &mstp_clks[MSTP531]),
-+	CLKDEV_ICK_ID("scu.1", "rcar_sound", &mstp_clks[MSTP530]),
-+	CLKDEV_ICK_ID("scu.2", "rcar_sound", &mstp_clks[MSTP529]),
-+	CLKDEV_ICK_ID("scu.3", "rcar_sound", &mstp_clks[MSTP528]),
-+	CLKDEV_ICK_ID("scu.4", "rcar_sound", &mstp_clks[MSTP527]),
-+	CLKDEV_ICK_ID("scu.5", "rcar_sound", &mstp_clks[MSTP526]),
-+	CLKDEV_ICK_ID("scu.6", "rcar_sound", &mstp_clks[MSTP525]),
-+	CLKDEV_ICK_ID("scu.7", "rcar_sound", &mstp_clks[MSTP524]),
-+	CLKDEV_ICK_ID("scu.8", "rcar_sound", &mstp_clks[MSTP523]),
- };
- 
- void __init r8a7778_clock_init(void)
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0253-ehci-platform-add-pre_setup-method-to-platform-data.patch b/patches.renesas/0253-ehci-platform-add-pre_setup-method-to-platform-data.patch
deleted file mode 100644
index 4bb416af494d6..0000000000000
--- a/patches.renesas/0253-ehci-platform-add-pre_setup-method-to-platform-data.patch
+++ /dev/null
@@ -1,69 +0,0 @@
-From c78947c1adb99d1287bb005b121c298d1299be1e Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Sun, 2 Jun 2013 01:33:56 +0400
-Subject: ehci-platform: add pre_setup() method to platform data
-
-Sometimes there is a need  to initialize some non-standard registers mapped to
-the EHCI region before accessing the standard EHCI registers.  Add pre_setup()
-method with 'struct usb_hcd *' parameter to be called just before ehci_setup()
-to the 'ehci-platform'  driver's platform data for this purpose...
-
-While at it, add the missing incomplete declaration of 'struct platform_device'
-to <linux/usb/ehci_pdriver.h>...
-
-The patch has been tested on the Marzen and BOCK-W boards.
-
-Suggested-by: Alan Stern <stern@rowland.harvard.edu>
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Acked-by: Alan Stern <stern@rowland.harvard.edu>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 743fcce0a89e04dc511b4ea40eba8e3f7cec92d4)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/usb/host/ehci-platform.c | 6 ++++++
- include/linux/usb/ehci_pdriver.h | 4 ++++
- 2 files changed, 10 insertions(+)
-
-diff --git a/drivers/usb/host/ehci-platform.c b/drivers/usb/host/ehci-platform.c
-index f47f2594..d1f5cea4 100644
---- a/drivers/usb/host/ehci-platform.c
-+++ b/drivers/usb/host/ehci-platform.c
-@@ -48,6 +48,12 @@ static int ehci_platform_reset(struct usb_hcd *hcd)
- 	ehci->big_endian_desc = pdata->big_endian_desc;
- 	ehci->big_endian_mmio = pdata->big_endian_mmio;
- 
-+	if (pdata->pre_setup) {
-+		retval = pdata->pre_setup(hcd);
-+		if (retval < 0)
-+			return retval;
-+	}
-+
- 	ehci->caps = hcd->regs + pdata->caps_offset;
- 	retval = ehci_setup(hcd);
- 	if (retval)
-diff --git a/include/linux/usb/ehci_pdriver.h b/include/linux/usb/ehci_pdriver.h
-index 99238b09..7eb4dcd0 100644
---- a/include/linux/usb/ehci_pdriver.h
-+++ b/include/linux/usb/ehci_pdriver.h
-@@ -19,6 +19,9 @@
- #ifndef __USB_CORE_EHCI_PDRIVER_H
- #define __USB_CORE_EHCI_PDRIVER_H
- 
-+struct platform_device;
-+struct usb_hcd;
-+
- /**
-  * struct usb_ehci_pdata - platform_data for generic ehci driver
-  *
-@@ -50,6 +53,7 @@ struct usb_ehci_pdata {
- 	/* Turn on only VBUS suspend power and hotplug detection,
- 	 * turn off everything else */
- 	void (*power_suspend)(struct platform_device *pdev);
-+	int (*pre_setup)(struct usb_hcd *hcd);
- };
- 
- #endif /* __USB_CORE_EHCI_PDRIVER_H */
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0254-ARM-shmobile-r8a7779-setup-EHCI-internal-buffer.patch b/patches.renesas/0254-ARM-shmobile-r8a7779-setup-EHCI-internal-buffer.patch
deleted file mode 100644
index 1a1adb6be84be..0000000000000
--- a/patches.renesas/0254-ARM-shmobile-r8a7779-setup-EHCI-internal-buffer.patch
+++ /dev/null
@@ -1,60 +0,0 @@
-From 506b69e1654ef414cbe6b6cc77a0b1b4bde48b27 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Sun, 2 Jun 2013 01:37:01 +0400
-Subject: ARM: shmobile: r8a7779: setup EHCI internal buffer
-
-Setup the EHCI internal buffer (before EHCI driver has a chance to touch the
-registers) using the pre_setup() method in 'struct usb_ehci_pdata'.
-
-The patch has been tested on the Marzen board.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 84a812da09887a473f596a107096e8e1671505c9)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-r8a7779.c | 16 ++++++++++++++++
- 1 file changed, 16 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c
-index a57495bd..09876545 100644
---- a/arch/arm/mach-shmobile/setup-r8a7779.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7779.c
-@@ -33,6 +33,7 @@
- #include <linux/sh_timer.h>
- #include <linux/dma-mapping.h>
- #include <linux/usb/otg.h>
-+#include <linux/usb/hcd.h>
- #include <linux/usb/ehci_pdriver.h>
- #include <linux/usb/ohci_pdriver.h>
- #include <linux/pm_runtime.h>
-@@ -435,10 +436,25 @@ static void usb_power_off(struct platform_device *pdev)
- 	pm_runtime_disable(&pdev->dev);
- }
- 
-+static int ehci_init_internal_buffer(struct usb_hcd *hcd)
-+{
-+	/*
-+	 * Below are recommended values from the datasheet;
-+	 * see [USB :: Setting of EHCI Internal Buffer].
-+	 */
-+	/* EHCI IP internal buffer setting */
-+	iowrite32(0x00ff0040, hcd->regs + 0x0094);
-+	/* EHCI IP internal buffer enable */
-+	iowrite32(0x00000001, hcd->regs + 0x009C);
-+
-+	return 0;
-+}
-+
- static struct usb_ehci_pdata ehcix_pdata = {
- 	.power_on	= usb_power_on,
- 	.power_off	= usb_power_off,
- 	.power_suspend	= usb_power_off,
-+	.pre_setup	= ehci_init_internal_buffer,
- };
- 
- static struct resource ehci0_resources[] = {
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0254-ARM-shmobile-sh7372-Use-macros-to-declare-SCIF-devic.patch b/patches.renesas/0254-ARM-shmobile-sh7372-Use-macros-to-declare-SCIF-devic.patch
deleted file mode 100644
index 67b06a3be396a..0000000000000
--- a/patches.renesas/0254-ARM-shmobile-sh7372-Use-macros-to-declare-SCIF-devic.patch
+++ /dev/null
@@ -1,188 +0,0 @@
-From ceea01326344cae01fd7fe692d68b85282219b98 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 6 Dec 2013 10:59:21 +0100
-Subject: ARM: shmobile: sh7372: Use macros to declare SCIF devices
-
-Replace copy-n-paste SCIF platform data and device declaration with a
-macro. This reduces the amount of code and improves readability.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit c6a0d864b83178ab47822fdbfbe699c34a8b4b44)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-sh7372.c | 156 ++++++----------------------------
- 1 file changed, 25 insertions(+), 131 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c
-index 311878391e18..77627dd422b0 100644
---- a/arch/arm/mach-shmobile/setup-sh7372.c
-+++ b/arch/arm/mach-shmobile/setup-sh7372.c
-@@ -86,138 +86,32 @@ void __init sh7372_pinmux_init(void)
- 	platform_device_register(&sh7372_pfc_device);
- }
- 
--/* SCIFA0 */
--static struct plat_sci_port scif0_platform_data = {
--	.mapbase	= 0xe6c40000,
--	.flags		= UPF_BOOT_AUTOCONF,
--	.scscr		= SCSCR_RE | SCSCR_TE,
--	.scbrr_algo_id	= SCBRR_ALGO_4,
--	.type		= PORT_SCIFA,
--	.irqs		= { evt2irq(0x0c00), evt2irq(0x0c00),
--			    evt2irq(0x0c00), evt2irq(0x0c00) },
--};
--
--static struct platform_device scif0_device = {
--	.name		= "sh-sci",
--	.id		= 0,
--	.dev		= {
--		.platform_data	= &scif0_platform_data,
--	},
--};
--
--/* SCIFA1 */
--static struct plat_sci_port scif1_platform_data = {
--	.mapbase	= 0xe6c50000,
--	.flags		= UPF_BOOT_AUTOCONF,
--	.scscr		= SCSCR_RE | SCSCR_TE,
--	.scbrr_algo_id	= SCBRR_ALGO_4,
--	.type		= PORT_SCIFA,
--	.irqs		= { evt2irq(0x0c20), evt2irq(0x0c20),
--			    evt2irq(0x0c20), evt2irq(0x0c20) },
--};
--
--static struct platform_device scif1_device = {
--	.name		= "sh-sci",
--	.id		= 1,
--	.dev		= {
--		.platform_data	= &scif1_platform_data,
--	},
--};
--
--/* SCIFA2 */
--static struct plat_sci_port scif2_platform_data = {
--	.mapbase	= 0xe6c60000,
--	.flags		= UPF_BOOT_AUTOCONF,
--	.scscr		= SCSCR_RE | SCSCR_TE,
--	.scbrr_algo_id	= SCBRR_ALGO_4,
--	.type		= PORT_SCIFA,
--	.irqs		= { evt2irq(0x0c40), evt2irq(0x0c40),
--			    evt2irq(0x0c40), evt2irq(0x0c40) },
--};
--
--static struct platform_device scif2_device = {
--	.name		= "sh-sci",
--	.id		= 2,
--	.dev		= {
--		.platform_data	= &scif2_platform_data,
--	},
--};
--
--/* SCIFA3 */
--static struct plat_sci_port scif3_platform_data = {
--	.mapbase	= 0xe6c70000,
--	.flags		= UPF_BOOT_AUTOCONF,
--	.scscr		= SCSCR_RE | SCSCR_TE,
--	.scbrr_algo_id	= SCBRR_ALGO_4,
--	.type		= PORT_SCIFA,
--	.irqs		= { evt2irq(0x0c60), evt2irq(0x0c60),
--			    evt2irq(0x0c60), evt2irq(0x0c60) },
--};
--
--static struct platform_device scif3_device = {
--	.name		= "sh-sci",
--	.id		= 3,
--	.dev		= {
--		.platform_data	= &scif3_platform_data,
--	},
--};
--
--/* SCIFA4 */
--static struct plat_sci_port scif4_platform_data = {
--	.mapbase	= 0xe6c80000,
--	.flags		= UPF_BOOT_AUTOCONF,
--	.scscr		= SCSCR_RE | SCSCR_TE,
--	.scbrr_algo_id	= SCBRR_ALGO_4,
--	.type		= PORT_SCIFA,
--	.irqs		= { evt2irq(0x0d20), evt2irq(0x0d20),
--			    evt2irq(0x0d20), evt2irq(0x0d20) },
--};
--
--static struct platform_device scif4_device = {
--	.name		= "sh-sci",
--	.id		= 4,
--	.dev		= {
--		.platform_data	= &scif4_platform_data,
--	},
--};
--
--/* SCIFA5 */
--static struct plat_sci_port scif5_platform_data = {
--	.mapbase	= 0xe6cb0000,
--	.flags		= UPF_BOOT_AUTOCONF,
--	.scscr		= SCSCR_RE | SCSCR_TE,
--	.scbrr_algo_id	= SCBRR_ALGO_4,
--	.type		= PORT_SCIFA,
--	.irqs		= { evt2irq(0x0d40), evt2irq(0x0d40),
--			    evt2irq(0x0d40), evt2irq(0x0d40) },
--};
--
--static struct platform_device scif5_device = {
--	.name		= "sh-sci",
--	.id		= 5,
--	.dev		= {
--		.platform_data	= &scif5_platform_data,
--	},
--};
--
--/* SCIFB */
--static struct plat_sci_port scif6_platform_data = {
--	.mapbase	= 0xe6c30000,
--	.flags		= UPF_BOOT_AUTOCONF,
--	.scscr		= SCSCR_RE | SCSCR_TE,
--	.scbrr_algo_id	= SCBRR_ALGO_4,
--	.type		= PORT_SCIFB,
--	.irqs		= { evt2irq(0x0d60), evt2irq(0x0d60),
--			    evt2irq(0x0d60), evt2irq(0x0d60) },
--};
-+/* SCIF */
-+#define SH7372_SCIF(scif_type, index, baseaddr, irq)		\
-+static struct plat_sci_port scif##index##_platform_data = {	\
-+	.type		= scif_type,				\
-+	.mapbase	= baseaddr,				\
-+	.flags		= UPF_BOOT_AUTOCONF,			\
-+	.irqs		= SCIx_IRQ_MUXED(irq),			\
-+	.scbrr_algo_id	= SCBRR_ALGO_4,				\
-+	.scscr		= SCSCR_RE | SCSCR_TE,			\
-+};								\
-+								\
-+static struct platform_device scif##index##_device = {		\
-+	.name		= "sh-sci",				\
-+	.id		= index,				\
-+	.dev		= {					\
-+		.platform_data	= &scif##index##_platform_data,	\
-+	},							\
-+}
- 
--static struct platform_device scif6_device = {
--	.name		= "sh-sci",
--	.id		= 6,
--	.dev		= {
--		.platform_data	= &scif6_platform_data,
--	},
--};
-+SH7372_SCIF(PORT_SCIFA, 0, 0xe6c40000, evt2irq(0x0c00));
-+SH7372_SCIF(PORT_SCIFA, 1, 0xe6c50000, evt2irq(0x0c20));
-+SH7372_SCIF(PORT_SCIFA, 2, 0xe6c60000, evt2irq(0x0c40));
-+SH7372_SCIF(PORT_SCIFA, 3, 0xe6c70000, evt2irq(0x0c60));
-+SH7372_SCIF(PORT_SCIFA, 4, 0xe6c80000, evt2irq(0x0d20));
-+SH7372_SCIF(PORT_SCIFA, 5, 0xe6cb0000, evt2irq(0x0d40));
-+SH7372_SCIF(PORT_SCIFB, 6, 0xe6c30000, evt2irq(0x0d60));
- 
- /* CMT */
- static struct sh_timer_config cmt2_platform_data = {
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0255-ARM-shmobile-r8a7779-remove-USB-PHY-2nd-memory-resou.patch b/patches.renesas/0255-ARM-shmobile-r8a7779-remove-USB-PHY-2nd-memory-resou.patch
deleted file mode 100644
index 49a1290f9b449..0000000000000
--- a/patches.renesas/0255-ARM-shmobile-r8a7779-remove-USB-PHY-2nd-memory-resou.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From e5a7345a9774019f7353d509717eea5156d88a2d Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Sun, 2 Jun 2013 01:48:42 +0400
-Subject: ARM: shmobile: r8a7779: remove USB PHY 2nd memory resource
-
-Now that 'drivers/usb/phy/phy-rcar-usb.c' doesn't require the second memory
-resource anymore, we can remove it from the R8A7779's USB PHY platform device.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit bb6e7d61dd95153c8c5d0ee52f303e0f475b736e)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-r8a7779.c | 5 -----
- 1 file changed, 5 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c
-index 09876545..ef40d326 100644
---- a/arch/arm/mach-shmobile/setup-r8a7779.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7779.c
-@@ -395,11 +395,6 @@ static struct resource usb_phy_resources[] = {
- 		.end		= 0xffe70900 - 1,
- 		.flags		= IORESOURCE_MEM,
- 	},
--	[1] = {
--		.start		= 0xfff70000,
--		.end		= 0xfff70900 - 1,
--		.flags		= IORESOURCE_MEM,
--	},
- };
- 
- static struct platform_device usb_phy_device = {
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0255-ARM-shmobile-sh73a0-Use-macros-to-declare-SCIF-devic.patch b/patches.renesas/0255-ARM-shmobile-sh73a0-Use-macros-to-declare-SCIF-devic.patch
deleted file mode 100644
index 59585a1d4a524..0000000000000
--- a/patches.renesas/0255-ARM-shmobile-sh73a0-Use-macros-to-declare-SCIF-devic.patch
+++ /dev/null
@@ -1,219 +0,0 @@
-From bb7fd8fd3d6b3ab7deae3853f13749dc0b184149 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 6 Dec 2013 10:59:22 +0100
-Subject: ARM: shmobile: sh73a0: Use macros to declare SCIF devices
-
-Replace copy-n-paste SCIF platform data and device declaration with a
-macro. This reduces the amount of code and improves readability.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit d000fff90a8d0e2cd5b437b3fbc3d3d5b8322cba)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-sh73a0.c | 187 +++++-----------------------------
- 1 file changed, 27 insertions(+), 160 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c
-index 65151c48cbd4..9c94f34d5399 100644
---- a/arch/arm/mach-shmobile/setup-sh73a0.c
-+++ b/arch/arm/mach-shmobile/setup-sh73a0.c
-@@ -71,167 +71,34 @@ void __init sh73a0_pinmux_init(void)
- 					ARRAY_SIZE(pfc_resources));
- }
- 
--static struct plat_sci_port scif0_platform_data = {
--	.mapbase	= 0xe6c40000,
--	.flags		= UPF_BOOT_AUTOCONF,
--	.scscr		= SCSCR_RE | SCSCR_TE,
--	.scbrr_algo_id	= SCBRR_ALGO_4,
--	.type		= PORT_SCIFA,
--	.irqs		= { gic_spi(72), gic_spi(72),
--			    gic_spi(72), gic_spi(72) },
--};
--
--static struct platform_device scif0_device = {
--	.name		= "sh-sci",
--	.id		= 0,
--	.dev		= {
--		.platform_data	= &scif0_platform_data,
--	},
--};
--
--static struct plat_sci_port scif1_platform_data = {
--	.mapbase	= 0xe6c50000,
--	.flags		= UPF_BOOT_AUTOCONF,
--	.scscr		= SCSCR_RE | SCSCR_TE,
--	.scbrr_algo_id	= SCBRR_ALGO_4,
--	.type		= PORT_SCIFA,
--	.irqs		= { gic_spi(73), gic_spi(73),
--			    gic_spi(73), gic_spi(73) },
--};
--
--static struct platform_device scif1_device = {
--	.name		= "sh-sci",
--	.id		= 1,
--	.dev		= {
--		.platform_data	= &scif1_platform_data,
--	},
--};
--
--static struct plat_sci_port scif2_platform_data = {
--	.mapbase	= 0xe6c60000,
--	.flags		= UPF_BOOT_AUTOCONF,
--	.scscr		= SCSCR_RE | SCSCR_TE,
--	.scbrr_algo_id	= SCBRR_ALGO_4,
--	.type		= PORT_SCIFA,
--	.irqs		= { gic_spi(74), gic_spi(74),
--			    gic_spi(74), gic_spi(74) },
--};
--
--static struct platform_device scif2_device = {
--	.name		= "sh-sci",
--	.id		= 2,
--	.dev		= {
--		.platform_data	= &scif2_platform_data,
--	},
--};
--
--static struct plat_sci_port scif3_platform_data = {
--	.mapbase	= 0xe6c70000,
--	.flags		= UPF_BOOT_AUTOCONF,
--	.scscr		= SCSCR_RE | SCSCR_TE,
--	.scbrr_algo_id	= SCBRR_ALGO_4,
--	.type		= PORT_SCIFA,
--	.irqs		= { gic_spi(75), gic_spi(75),
--			    gic_spi(75), gic_spi(75) },
--};
--
--static struct platform_device scif3_device = {
--	.name		= "sh-sci",
--	.id		= 3,
--	.dev		= {
--		.platform_data	= &scif3_platform_data,
--	},
--};
--
--static struct plat_sci_port scif4_platform_data = {
--	.mapbase	= 0xe6c80000,
--	.flags		= UPF_BOOT_AUTOCONF,
--	.scscr		= SCSCR_RE | SCSCR_TE,
--	.scbrr_algo_id	= SCBRR_ALGO_4,
--	.type		= PORT_SCIFA,
--	.irqs		= { gic_spi(78), gic_spi(78),
--			    gic_spi(78), gic_spi(78) },
--};
--
--static struct platform_device scif4_device = {
--	.name		= "sh-sci",
--	.id		= 4,
--	.dev		= {
--		.platform_data	= &scif4_platform_data,
--	},
--};
--
--static struct plat_sci_port scif5_platform_data = {
--	.mapbase	= 0xe6cb0000,
--	.flags		= UPF_BOOT_AUTOCONF,
--	.scscr		= SCSCR_RE | SCSCR_TE,
--	.scbrr_algo_id	= SCBRR_ALGO_4,
--	.type		= PORT_SCIFA,
--	.irqs		= { gic_spi(79), gic_spi(79),
--			    gic_spi(79), gic_spi(79) },
--};
--
--static struct platform_device scif5_device = {
--	.name		= "sh-sci",
--	.id		= 5,
--	.dev		= {
--		.platform_data	= &scif5_platform_data,
--	},
--};
--
--static struct plat_sci_port scif6_platform_data = {
--	.mapbase	= 0xe6cc0000,
--	.flags		= UPF_BOOT_AUTOCONF,
--	.scscr		= SCSCR_RE | SCSCR_TE,
--	.scbrr_algo_id	= SCBRR_ALGO_4,
--	.type		= PORT_SCIFA,
--	.irqs		= { gic_spi(156), gic_spi(156),
--			    gic_spi(156), gic_spi(156) },
--};
--
--static struct platform_device scif6_device = {
--	.name		= "sh-sci",
--	.id		= 6,
--	.dev		= {
--		.platform_data	= &scif6_platform_data,
--	},
--};
--
--static struct plat_sci_port scif7_platform_data = {
--	.mapbase	= 0xe6cd0000,
--	.flags		= UPF_BOOT_AUTOCONF,
--	.scscr		= SCSCR_RE | SCSCR_TE,
--	.scbrr_algo_id	= SCBRR_ALGO_4,
--	.type		= PORT_SCIFA,
--	.irqs		= { gic_spi(143), gic_spi(143),
--			    gic_spi(143), gic_spi(143) },
--};
--
--static struct platform_device scif7_device = {
--	.name		= "sh-sci",
--	.id		= 7,
--	.dev		= {
--		.platform_data	= &scif7_platform_data,
--	},
--};
--
--static struct plat_sci_port scif8_platform_data = {
--	.mapbase	= 0xe6c30000,
--	.flags		= UPF_BOOT_AUTOCONF,
--	.scscr		= SCSCR_RE | SCSCR_TE,
--	.scbrr_algo_id	= SCBRR_ALGO_4,
--	.type		= PORT_SCIFB,
--	.irqs		= { gic_spi(80), gic_spi(80),
--			    gic_spi(80), gic_spi(80) },
--};
-+/* SCIF */
-+#define SH73A0_SCIF(scif_type, index, baseaddr, irq)		\
-+static struct plat_sci_port scif##index##_platform_data = {	\
-+	.type		= scif_type,				\
-+	.mapbase	= baseaddr,				\
-+	.flags		= UPF_BOOT_AUTOCONF,			\
-+	.irqs		= SCIx_IRQ_MUXED(irq),			\
-+	.scbrr_algo_id	= SCBRR_ALGO_4,				\
-+	.scscr		= SCSCR_RE | SCSCR_TE,			\
-+};								\
-+								\
-+static struct platform_device scif##index##_device = {		\
-+	.name		= "sh-sci",				\
-+	.id		= index,				\
-+	.dev		= {					\
-+		.platform_data	= &scif##index##_platform_data,	\
-+	},							\
-+}
- 
--static struct platform_device scif8_device = {
--	.name		= "sh-sci",
--	.id		= 8,
--	.dev		= {
--		.platform_data	= &scif8_platform_data,
--	},
--};
-+SH73A0_SCIF(PORT_SCIFA, 0, 0xe6c40000, gic_spi(72));
-+SH73A0_SCIF(PORT_SCIFA, 1, 0xe6c50000, gic_spi(73));
-+SH73A0_SCIF(PORT_SCIFA, 2, 0xe6c60000, gic_spi(74));
-+SH73A0_SCIF(PORT_SCIFA, 3, 0xe6c70000, gic_spi(75));
-+SH73A0_SCIF(PORT_SCIFA, 4, 0xe6c80000, gic_spi(78));
-+SH73A0_SCIF(PORT_SCIFA, 5, 0xe6cb0000, gic_spi(79));
-+SH73A0_SCIF(PORT_SCIFA, 6, 0xe6cc0000, gic_spi(156));
-+SH73A0_SCIF(PORT_SCIFA, 7, 0xe6cd0000, gic_spi(143));
-+SH73A0_SCIF(PORT_SCIFB, 8, 0xe6c30000, gic_spi(80));
- 
- static struct sh_timer_config cmt10_platform_data = {
- 	.name = "CMT10",
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0256-ARM-shmobile-r8a7740-Use-macros-to-declare-SCIF-devi.patch b/patches.renesas/0256-ARM-shmobile-r8a7740-Use-macros-to-declare-SCIF-devi.patch
deleted file mode 100644
index 9f483589c6a01..0000000000000
--- a/patches.renesas/0256-ARM-shmobile-r8a7740-Use-macros-to-declare-SCIF-devi.patch
+++ /dev/null
@@ -1,237 +0,0 @@
-From e4fc2e07c52c5f04eb320332f35b5dfcbf35b173 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 6 Dec 2013 10:59:23 +0100
-Subject: ARM: shmobile: r8a7740: Use macros to declare SCIF devices
-
-Replace copy-n-paste SCIF platform data and device declaration with a
-macro. This reduces the amount of code and improves readability.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit c9e06d8edc56d87c1882824c2896c7227aedb358)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-r8a7740.c | 191 +++++----------------------------
- 1 file changed, 29 insertions(+), 162 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-r8a7740.c b/arch/arm/mach-shmobile/setup-r8a7740.c
-index b7d4b2c3bc29..8778b57ed7d9 100644
---- a/arch/arm/mach-shmobile/setup-r8a7740.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7740.c
-@@ -203,167 +203,34 @@ static struct platform_device irqpin3_device = {
- 	},
- };
- 
--/* SCIFA0 */
--static struct plat_sci_port scif0_platform_data = {
--	.mapbase	= 0xe6c40000,
--	.flags		= UPF_BOOT_AUTOCONF,
--	.scscr		= SCSCR_RE | SCSCR_TE,
--	.scbrr_algo_id	= SCBRR_ALGO_4,
--	.type		= PORT_SCIFA,
--	.irqs		= SCIx_IRQ_MUXED(gic_spi(100)),
--};
--
--static struct platform_device scif0_device = {
--	.name		= "sh-sci",
--	.id		= 0,
--	.dev		= {
--		.platform_data	= &scif0_platform_data,
--	},
--};
--
--/* SCIFA1 */
--static struct plat_sci_port scif1_platform_data = {
--	.mapbase	= 0xe6c50000,
--	.flags		= UPF_BOOT_AUTOCONF,
--	.scscr		= SCSCR_RE | SCSCR_TE,
--	.scbrr_algo_id	= SCBRR_ALGO_4,
--	.type		= PORT_SCIFA,
--	.irqs		= SCIx_IRQ_MUXED(gic_spi(101)),
--};
--
--static struct platform_device scif1_device = {
--	.name		= "sh-sci",
--	.id		= 1,
--	.dev		= {
--		.platform_data	= &scif1_platform_data,
--	},
--};
--
--/* SCIFA2 */
--static struct plat_sci_port scif2_platform_data = {
--	.mapbase	= 0xe6c60000,
--	.flags		= UPF_BOOT_AUTOCONF,
--	.scscr		= SCSCR_RE | SCSCR_TE,
--	.scbrr_algo_id	= SCBRR_ALGO_4,
--	.type		= PORT_SCIFA,
--	.irqs		= SCIx_IRQ_MUXED(gic_spi(102)),
--};
--
--static struct platform_device scif2_device = {
--	.name		= "sh-sci",
--	.id		= 2,
--	.dev		= {
--		.platform_data	= &scif2_platform_data,
--	},
--};
--
--/* SCIFA3 */
--static struct plat_sci_port scif3_platform_data = {
--	.mapbase	= 0xe6c70000,
--	.flags		= UPF_BOOT_AUTOCONF,
--	.scscr		= SCSCR_RE | SCSCR_TE,
--	.scbrr_algo_id	= SCBRR_ALGO_4,
--	.type		= PORT_SCIFA,
--	.irqs		= SCIx_IRQ_MUXED(gic_spi(103)),
--};
--
--static struct platform_device scif3_device = {
--	.name		= "sh-sci",
--	.id		= 3,
--	.dev		= {
--		.platform_data	= &scif3_platform_data,
--	},
--};
--
--/* SCIFA4 */
--static struct plat_sci_port scif4_platform_data = {
--	.mapbase	= 0xe6c80000,
--	.flags		= UPF_BOOT_AUTOCONF,
--	.scscr		= SCSCR_RE | SCSCR_TE,
--	.scbrr_algo_id	= SCBRR_ALGO_4,
--	.type		= PORT_SCIFA,
--	.irqs		= SCIx_IRQ_MUXED(gic_spi(104)),
--};
--
--static struct platform_device scif4_device = {
--	.name		= "sh-sci",
--	.id		= 4,
--	.dev		= {
--		.platform_data	= &scif4_platform_data,
--	},
--};
--
--/* SCIFA5 */
--static struct plat_sci_port scif5_platform_data = {
--	.mapbase	= 0xe6cb0000,
--	.flags		= UPF_BOOT_AUTOCONF,
--	.scscr		= SCSCR_RE | SCSCR_TE,
--	.scbrr_algo_id	= SCBRR_ALGO_4,
--	.type		= PORT_SCIFA,
--	.irqs		= SCIx_IRQ_MUXED(gic_spi(105)),
--};
--
--static struct platform_device scif5_device = {
--	.name		= "sh-sci",
--	.id		= 5,
--	.dev		= {
--		.platform_data	= &scif5_platform_data,
--	},
--};
--
--/* SCIFA6 */
--static struct plat_sci_port scif6_platform_data = {
--	.mapbase	= 0xe6cc0000,
--	.flags		= UPF_BOOT_AUTOCONF,
--	.scscr		= SCSCR_RE | SCSCR_TE,
--	.scbrr_algo_id	= SCBRR_ALGO_4,
--	.type		= PORT_SCIFA,
--	.irqs		= SCIx_IRQ_MUXED(gic_spi(106)),
--};
--
--static struct platform_device scif6_device = {
--	.name		= "sh-sci",
--	.id		= 6,
--	.dev		= {
--		.platform_data	= &scif6_platform_data,
--	},
--};
--
--/* SCIFA7 */
--static struct plat_sci_port scif7_platform_data = {
--	.mapbase	= 0xe6cd0000,
--	.flags		= UPF_BOOT_AUTOCONF,
--	.scscr		= SCSCR_RE | SCSCR_TE,
--	.scbrr_algo_id	= SCBRR_ALGO_4,
--	.type		= PORT_SCIFA,
--	.irqs		= SCIx_IRQ_MUXED(gic_spi(107)),
--};
--
--static struct platform_device scif7_device = {
--	.name		= "sh-sci",
--	.id		= 7,
--	.dev		= {
--		.platform_data	= &scif7_platform_data,
--	},
--};
--
--/* SCIFB */
--static struct plat_sci_port scifb_platform_data = {
--	.mapbase	= 0xe6c30000,
--	.flags		= UPF_BOOT_AUTOCONF,
--	.scscr		= SCSCR_RE | SCSCR_TE,
--	.scbrr_algo_id	= SCBRR_ALGO_4,
--	.type		= PORT_SCIFB,
--	.irqs		= SCIx_IRQ_MUXED(gic_spi(108)),
--};
-+/* SCIF */
-+#define R8A7740_SCIF(scif_type, index, baseaddr, irq)		\
-+static struct plat_sci_port scif##index##_platform_data = {	\
-+	.type		= scif_type,				\
-+	.mapbase	= baseaddr,				\
-+	.flags		= UPF_BOOT_AUTOCONF,			\
-+	.irqs		= SCIx_IRQ_MUXED(irq),			\
-+	.scbrr_algo_id	= SCBRR_ALGO_4,				\
-+	.scscr		= SCSCR_RE | SCSCR_TE,			\
-+};								\
-+								\
-+static struct platform_device scif##index##_device = {		\
-+	.name		= "sh-sci",				\
-+	.id		= index,				\
-+	.dev		= {					\
-+		.platform_data	= &scif##index##_platform_data,	\
-+	},							\
-+}
- 
--static struct platform_device scifb_device = {
--	.name		= "sh-sci",
--	.id		= 8,
--	.dev		= {
--		.platform_data	= &scifb_platform_data,
--	},
--};
-+R8A7740_SCIF(PORT_SCIFA, 0, 0xe6c40000, gic_spi(100));
-+R8A7740_SCIF(PORT_SCIFA, 1, 0xe6c50000, gic_spi(101));
-+R8A7740_SCIF(PORT_SCIFA, 2, 0xe6c60000, gic_spi(102));
-+R8A7740_SCIF(PORT_SCIFA, 3, 0xe6c70000, gic_spi(103));
-+R8A7740_SCIF(PORT_SCIFA, 4, 0xe6c80000, gic_spi(104));
-+R8A7740_SCIF(PORT_SCIFA, 5, 0xe6cb0000, gic_spi(105));
-+R8A7740_SCIF(PORT_SCIFA, 6, 0xe6cc0000, gic_spi(106));
-+R8A7740_SCIF(PORT_SCIFA, 7, 0xe6cd0000, gic_spi(107));
-+R8A7740_SCIF(PORT_SCIFB, 8, 0xe6c30000, gic_spi(108));
- 
- /* CMT */
- static struct sh_timer_config cmt10_platform_data = {
-@@ -528,7 +395,7 @@ static struct platform_device *r8a7740_devices_dt[] __initdata = {
- 	&scif5_device,
- 	&scif6_device,
- 	&scif7_device,
--	&scifb_device,
-+	&scif8_device,
- 	&cmt10_device,
- };
- 
-@@ -981,7 +848,7 @@ void __init r8a7740_add_standard_devices(void)
- 	rmobile_add_device_to_domain("A3SP",	&scif5_device);
- 	rmobile_add_device_to_domain("A3SP",	&scif6_device);
- 	rmobile_add_device_to_domain("A3SP",	&scif7_device);
--	rmobile_add_device_to_domain("A3SP",	&scifb_device);
-+	rmobile_add_device_to_domain("A3SP",	&scif8_device);
- 	rmobile_add_device_to_domain("A3SP",	&i2c1_device);
- }
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0256-phy-rcar-usb-correct-base-address.patch b/patches.renesas/0256-phy-rcar-usb-correct-base-address.patch
deleted file mode 100644
index d0feff1250b76..0000000000000
--- a/patches.renesas/0256-phy-rcar-usb-correct-base-address.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From 235de170447eb60b37d382d9ac5166df505bc41c Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Sun, 2 Jun 2013 01:50:25 +0400
-Subject: phy-rcar-usb: correct base address
-
-The memory region that is used by the driver overlaps EHCI and OHCI  register
-regions for absolutely no reason now  -- fix it  by adding offset of 0x800 to
-the base address, changing the register #define's accordingly. This has extra
-positive effect that we now can use devm_ioremap_resource()...
-
-Note that the driver and the SoC code have to be in one patch to keep the code
-bisectable...
-
-The patch has been tested on the Marzen board.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Acked-by: Felipe Balbi <balbi@ti.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 725bf9dcafe16aa69c8ab34c63ba36c6eb4492f2)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-	drivers/usb/phy/phy-rcar-usb.c
----
- arch/arm/mach-shmobile/setup-r8a7779.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c
-index ef40d326..64ff4dc4 100644
---- a/arch/arm/mach-shmobile/setup-r8a7779.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7779.c
-@@ -391,7 +391,7 @@ static struct platform_device sata_device = {
- /* USB PHY */
- static struct resource usb_phy_resources[] = {
- 	[0] = {
--		.start		= 0xffe70000,
-+		.start		= 0xffe70800,
- 		.end		= 0xffe70900 - 1,
- 		.flags		= IORESOURCE_MEM,
- 	},
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0257-ARM-shmobile-Marzen-pass-platform-data-to-USB-PHY-de.patch b/patches.renesas/0257-ARM-shmobile-Marzen-pass-platform-data-to-USB-PHY-de.patch
deleted file mode 100644
index 0449765cfa3f7..0000000000000
--- a/patches.renesas/0257-ARM-shmobile-Marzen-pass-platform-data-to-USB-PHY-de.patch
+++ /dev/null
@@ -1,130 +0,0 @@
-From 2a715b448a5bdd7d887905c68c6df8c51602afd3 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Sun, 2 Jun 2013 01:55:04 +0400
-Subject: ARM: shmobile: Marzen: pass platform data to USB PHY device
-
-Since we're now going to setup the USBPCTRL0 register using the USB PHY device's
-platform data, we now need a way to pass those platform data from the board file
-to the device which is situated in setup-r8a7779.c -- and what I'm suggesting is
-r8a7779_add_usb_phy_device() that will register USB PHY platform device with the
-passed platform data using platform_device_register_resndata() call; creating
-this function involves deletion of 'usb_phy_device' from r8a7779_devices_dt[],
-so that it will no longer be registered for the generic R8A7779 machine (where
-we can't provide the platform data anyway), hence EHCI/OHCI drivers will fail
-to load as well.
-
-For the Marzen board, this new function will be called from marzen_init() to
-register the USB PHY device early enough.
-
-Note that the board and the SoC code have to be in one patch to keep the code
-bisectable...
-
-The patch has been tested on the Marzen board.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-[horms+renesas@verge.net.au: manually applied]
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-(cherry picked from commit 2437b27c3a016b15183a720c06b23de2bf3f6a10)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-marzen.c         |  3 +++
- arch/arm/mach-shmobile/include/mach/r8a7779.h |  2 ++
- arch/arm/mach-shmobile/setup-r8a7779.c        | 18 +++++++++---------
- 3 files changed, 14 insertions(+), 9 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-marzen.c b/arch/arm/mach-shmobile/board-marzen.c
-index 7e04c391..a7d10105 100644
---- a/arch/arm/mach-shmobile/board-marzen.c
-+++ b/arch/arm/mach-shmobile/board-marzen.c
-@@ -57,6 +57,8 @@ static struct regulator_consumer_supply dummy_supplies[] = {
- 	REGULATOR_SUPPLY("vdd33a", "smsc911x"),
- };
- 
-+static struct rcar_phy_platform_data usb_phy_platform_data __initdata;
-+
- /* SMSC LAN89218 */
- static struct resource smsc911x_resources[] = {
- 	[0] = {
-@@ -232,6 +234,7 @@ static void __init marzen_init(void)
- 	r8a7779_init_irq_extpin(1); /* IRQ1 as individual interrupt */
- 
- 	r8a7779_add_standard_devices();
-+	r8a7779_add_usb_phy_device(&usb_phy_platform_data);
- 	platform_add_devices(marzen_devices, ARRAY_SIZE(marzen_devices));
- }
- 
-diff --git a/arch/arm/mach-shmobile/include/mach/r8a7779.h b/arch/arm/mach-shmobile/include/mach/r8a7779.h
-index f10727f7..fc47073c 100644
---- a/arch/arm/mach-shmobile/include/mach/r8a7779.h
-+++ b/arch/arm/mach-shmobile/include/mach/r8a7779.h
-@@ -4,6 +4,7 @@
- #include <linux/sh_clk.h>
- #include <linux/pm_domain.h>
- #include <linux/sh_eth.h>
-+#include <linux/platform_data/usb-rcar-phy.h>
- 
- struct platform_device;
- 
-@@ -33,6 +34,7 @@ extern void r8a7779_add_early_devices(void);
- extern void r8a7779_add_standard_devices(void);
- extern void r8a7779_add_standard_devices_dt(void);
- extern void r8a7779_add_ether_device(struct sh_eth_plat_data *pdata);
-+extern void r8a7779_add_usb_phy_device(struct rcar_phy_platform_data *pdata);
- extern void r8a7779_init_late(void);
- extern void r8a7779_clock_init(void);
- extern void r8a7779_pinmux_init(void);
-diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c
-index 64ff4dc4..39868776 100644
---- a/arch/arm/mach-shmobile/setup-r8a7779.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7779.c
-@@ -389,7 +389,7 @@ static struct platform_device sata_device = {
- };
- 
- /* USB PHY */
--static struct resource usb_phy_resources[] = {
-+static struct resource usb_phy_resources[] __initdata = {
- 	[0] = {
- 		.start		= 0xffe70800,
- 		.end		= 0xffe70900 - 1,
-@@ -397,13 +397,6 @@ static struct resource usb_phy_resources[] = {
- 	},
- };
- 
--static struct platform_device usb_phy_device = {
--	.name		= "rcar_usb_phy",
--	.id		= -1,
--	.resource	= usb_phy_resources,
--	.num_resources	= ARRAY_SIZE(usb_phy_resources),
--};
--
- /* USB */
- static struct usb_phy *phy;
- 
-@@ -575,7 +568,6 @@ static struct platform_device *r8a7779_devices_dt[] __initdata = {
- 	&scif5_device,
- 	&tmu00_device,
- 	&tmu01_device,
--	&usb_phy_device,
- };
- 
- static struct platform_device *r8a7779_standard_devices[] __initdata = {
-@@ -610,6 +602,14 @@ void __init r8a7779_add_ether_device(struct sh_eth_plat_data *pdata)
- 					  pdata, sizeof(*pdata));
- }
- 
-+void __init r8a7779_add_usb_phy_device(struct rcar_phy_platform_data *pdata)
-+{
-+	platform_device_register_resndata(&platform_bus, "rcar_usb_phy", -1,
-+					  usb_phy_resources,
-+					  ARRAY_SIZE(usb_phy_resources),
-+					  pdata, sizeof(*pdata));
-+}
-+
- /* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */
- void __init __weak r8a7779_register_twd(void) { }
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0257-ARM-shmobile-r8a7779-Use-macros-to-declare-SCIF-devi.patch b/patches.renesas/0257-ARM-shmobile-r8a7779-Use-macros-to-declare-SCIF-devi.patch
deleted file mode 100644
index a0b88cc92f18f..0000000000000
--- a/patches.renesas/0257-ARM-shmobile-r8a7779-Use-macros-to-declare-SCIF-devi.patch
+++ /dev/null
@@ -1,156 +0,0 @@
-From eb1932d7f75229dc87de71f8e3ecc4e4467807ba Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 6 Dec 2013 10:59:24 +0100
-Subject: ARM: shmobile: r8a7779: Use macros to declare SCIF devices
-
-Replace copy-n-paste SCIF platform data and device declaration with a
-macro. This reduces the amount of code and improves readability.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit efced000744f9d2f9565d8a158967ac8f63ae23d)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-r8a7779.c | 124 +++++++--------------------------
- 1 file changed, 24 insertions(+), 100 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c
-index 8f9453152fb9..df418f16d82d 100644
---- a/arch/arm/mach-shmobile/setup-r8a7779.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7779.c
-@@ -188,107 +188,31 @@ void __init r8a7779_pinmux_init(void)
- 			    ARRAY_SIZE(r8a7779_pinctrl_devices));
- }
- 
--static struct plat_sci_port scif0_platform_data = {
--	.mapbase	= 0xffe40000,
--	.flags		= UPF_BOOT_AUTOCONF | UPF_IOREMAP,
--	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
--	.type		= PORT_SCIF,
--	.irqs		= SCIx_IRQ_MUXED(gic_iid(0x78)),
--};
--
--static struct platform_device scif0_device = {
--	.name		= "sh-sci",
--	.id		= 0,
--	.dev		= {
--		.platform_data	= &scif0_platform_data,
--	},
--};
--
--static struct plat_sci_port scif1_platform_data = {
--	.mapbase	= 0xffe41000,
--	.flags		= UPF_BOOT_AUTOCONF | UPF_IOREMAP,
--	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
--	.type		= PORT_SCIF,
--	.irqs		= SCIx_IRQ_MUXED(gic_iid(0x79)),
--};
--
--static struct platform_device scif1_device = {
--	.name		= "sh-sci",
--	.id		= 1,
--	.dev		= {
--		.platform_data	= &scif1_platform_data,
--	},
--};
--
--static struct plat_sci_port scif2_platform_data = {
--	.mapbase	= 0xffe42000,
--	.flags		= UPF_BOOT_AUTOCONF | UPF_IOREMAP,
--	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
--	.type		= PORT_SCIF,
--	.irqs		= SCIx_IRQ_MUXED(gic_iid(0x7a)),
--};
--
--static struct platform_device scif2_device = {
--	.name		= "sh-sci",
--	.id		= 2,
--	.dev		= {
--		.platform_data	= &scif2_platform_data,
--	},
--};
--
--static struct plat_sci_port scif3_platform_data = {
--	.mapbase	= 0xffe43000,
--	.flags		= UPF_BOOT_AUTOCONF | UPF_IOREMAP,
--	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
--	.type		= PORT_SCIF,
--	.irqs		= SCIx_IRQ_MUXED(gic_iid(0x7b)),
--};
--
--static struct platform_device scif3_device = {
--	.name		= "sh-sci",
--	.id		= 3,
--	.dev		= {
--		.platform_data	= &scif3_platform_data,
--	},
--};
--
--static struct plat_sci_port scif4_platform_data = {
--	.mapbase	= 0xffe44000,
--	.flags		= UPF_BOOT_AUTOCONF | UPF_IOREMAP,
--	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
--	.type		= PORT_SCIF,
--	.irqs		= SCIx_IRQ_MUXED(gic_iid(0x7c)),
--};
--
--static struct platform_device scif4_device = {
--	.name		= "sh-sci",
--	.id		= 4,
--	.dev		= {
--		.platform_data	= &scif4_platform_data,
--	},
--};
--
--static struct plat_sci_port scif5_platform_data = {
--	.mapbase	= 0xffe45000,
--	.flags		= UPF_BOOT_AUTOCONF | UPF_IOREMAP,
--	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
--	.scbrr_algo_id	= SCBRR_ALGO_2,
--	.type		= PORT_SCIF,
--	.irqs		= SCIx_IRQ_MUXED(gic_iid(0x7d)),
--};
-+/* SCIF */
-+#define R8A7779_SCIF(index, baseaddr, irq)			\
-+static struct plat_sci_port scif##index##_platform_data = {	\
-+	.type		= PORT_SCIF,				\
-+	.mapbase	= baseaddr,				\
-+	.flags		= UPF_BOOT_AUTOCONF | UPF_IOREMAP,	\
-+	.irqs		= SCIx_IRQ_MUXED(irq),			\
-+	.scbrr_algo_id	= SCBRR_ALGO_2,				\
-+	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_CKE1,	\
-+};								\
-+								\
-+static struct platform_device scif##index##_device = {		\
-+	.name		= "sh-sci",				\
-+	.id		= index,				\
-+	.dev		= {					\
-+		.platform_data	= &scif##index##_platform_data,	\
-+	},							\
-+}
- 
--static struct platform_device scif5_device = {
--	.name		= "sh-sci",
--	.id		= 5,
--	.dev		= {
--		.platform_data	= &scif5_platform_data,
--	},
--};
-+R8A7779_SCIF(0, 0xffe40000, gic_iid(0x78));
-+R8A7779_SCIF(1, 0xffe41000, gic_iid(0x79));
-+R8A7779_SCIF(2, 0xffe42000, gic_iid(0x7a));
-+R8A7779_SCIF(3, 0xffe43000, gic_iid(0x7b));
-+R8A7779_SCIF(4, 0xffe44000, gic_iid(0x7c));
-+R8A7779_SCIF(5, 0xffe45000, gic_iid(0x7d));
- 
- /* TMU */
- static struct sh_timer_config tmu00_platform_data = {
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0258-ARM-shmobile-r8a73a4-Don-t-define-SCIF-platform-data.patch b/patches.renesas/0258-ARM-shmobile-r8a73a4-Don-t-define-SCIF-platform-data.patch
deleted file mode 100644
index 70c57de7ea437..0000000000000
--- a/patches.renesas/0258-ARM-shmobile-r8a73a4-Don-t-define-SCIF-platform-data.patch
+++ /dev/null
@@ -1,108 +0,0 @@
-From 778bca58cf3ed945675ceb9f304c5ac59e79bb79 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 6 Dec 2013 10:59:26 +0100
-Subject: ARM: shmobile: r8a73a4: Don't define SCIF platform data in an array
-
-The SCIF driver is transitioning to platform resources. Board code will
-thus need to define an array of resources for each SCIF device. This is
-incompatible with the macro-based SCIF platform data definition as an
-array. Rework the macro to define platform data as individual
-structures.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 4d32e834e19c34dcb510a7645ee8139c7e87bce4)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-r8a73a4.c | 58 +++++++++++++++-------------------
- 1 file changed, 26 insertions(+), 32 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-r8a73a4.c b/arch/arm/mach-shmobile/setup-r8a73a4.c
-index cc94b64c2ef5..605298b2ffe5 100644
---- a/arch/arm/mach-shmobile/setup-r8a73a4.c
-+++ b/arch/arm/mach-shmobile/setup-r8a73a4.c
-@@ -40,41 +40,35 @@ void __init r8a73a4_pinmux_init(void)
- 					ARRAY_SIZE(pfc_resources));
- }
- 
--#define SCIF_COMMON(scif_type, baseaddr, irq)			\
-+#define R8A73A4_SCIF(scif_type, _scscr, index, baseaddr, irq)	\
-+static struct plat_sci_port scif##index##_platform_data = {	\
- 	.type		= scif_type,				\
- 	.mapbase	= baseaddr,				\
- 	.flags		= UPF_BOOT_AUTOCONF | UPF_IOREMAP,	\
- 	.scbrr_algo_id	= SCBRR_ALGO_4,				\
--	.irqs		= SCIx_IRQ_MUXED(irq)
--
--#define SCIFA_DATA(index, baseaddr, irq)		\
--[index] = {						\
--	SCIF_COMMON(PORT_SCIFA, baseaddr, irq),		\
--	.scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE0,	\
-+	.scscr		= _scscr,				\
-+	.irqs		= SCIx_IRQ_MUXED(irq),			\
- }
- 
--#define SCIFB_DATA(index, baseaddr, irq)	\
--[index] = {					\
--	SCIF_COMMON(PORT_SCIFB, baseaddr, irq),	\
--	.scscr = SCSCR_RE | SCSCR_TE,		\
--}
-+#define R8A73A4_SCIFA(index, baseaddr, irq)	\
-+	R8A73A4_SCIF(PORT_SCIFA, SCSCR_RE | SCSCR_TE | SCSCR_CKE0, \
-+		     index, baseaddr, irq)
- 
--enum { SCIFA0, SCIFA1, SCIFB0, SCIFB1, SCIFB2, SCIFB3 };
-+#define R8A73A4_SCIFB(index, baseaddr, irq)	\
-+	R8A73A4_SCIF(PORT_SCIFB, SCSCR_RE | SCSCR_TE, \
-+		     index, baseaddr, irq)
- 
--static const struct plat_sci_port scif[] = {
--	SCIFA_DATA(SCIFA0, 0xe6c40000, gic_spi(144)), /* SCIFA0 */
--	SCIFA_DATA(SCIFA1, 0xe6c50000, gic_spi(145)), /* SCIFA1 */
--	SCIFB_DATA(SCIFB0, 0xe6c20000, gic_spi(148)), /* SCIFB0 */
--	SCIFB_DATA(SCIFB1, 0xe6c30000, gic_spi(149)), /* SCIFB1 */
--	SCIFB_DATA(SCIFB2, 0xe6ce0000, gic_spi(150)), /* SCIFB2 */
--	SCIFB_DATA(SCIFB3, 0xe6cf0000, gic_spi(151)), /* SCIFB3 */
--};
-+R8A73A4_SCIFA(0, 0xe6c40000, gic_spi(144)); /* SCIFA0 */
-+R8A73A4_SCIFA(1, 0xe6c50000, gic_spi(145)); /* SCIFA1 */
-+R8A73A4_SCIFB(2, 0xe6c20000, gic_spi(148)); /* SCIFB0 */
-+R8A73A4_SCIFB(3, 0xe6c30000, gic_spi(149)); /* SCIFB1 */
-+R8A73A4_SCIFB(4, 0xe6ce0000, gic_spi(150)); /* SCIFB2 */
-+R8A73A4_SCIFB(5, 0xe6cf0000, gic_spi(151)); /* SCIFB3 */
- 
--static inline void r8a73a4_register_scif(int idx)
--{
--	platform_device_register_data(&platform_bus, "sh-sci", idx, &scif[idx],
--				      sizeof(struct plat_sci_port));
--}
-+#define r8a73a4_register_scif(index)					       \
-+	platform_device_register_data(&platform_bus, "sh-sci", index,	       \
-+				      &scif##index##_platform_data,	       \
-+				      sizeof(scif##index##_platform_data))
- 
- static const struct renesas_irqc_config irqc0_data = {
- 	.irq_base = irq_pin(0), /* IRQ0 -> IRQ31 */
-@@ -192,12 +186,12 @@ static struct resource cmt10_resources[] = {
- 
- void __init r8a73a4_add_dt_devices(void)
- {
--	r8a73a4_register_scif(SCIFA0);
--	r8a73a4_register_scif(SCIFA1);
--	r8a73a4_register_scif(SCIFB0);
--	r8a73a4_register_scif(SCIFB1);
--	r8a73a4_register_scif(SCIFB2);
--	r8a73a4_register_scif(SCIFB3);
-+	r8a73a4_register_scif(0);
-+	r8a73a4_register_scif(1);
-+	r8a73a4_register_scif(2);
-+	r8a73a4_register_scif(3);
-+	r8a73a4_register_scif(4);
-+	r8a73a4_register_scif(5);
- 	r8a7790_register_cmt(10);
- }
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0258-ARM-shmobile-r8a7778-add-USB-support.patch b/patches.renesas/0258-ARM-shmobile-r8a7778-add-USB-support.patch
deleted file mode 100644
index e0e26c57e0656..0000000000000
--- a/patches.renesas/0258-ARM-shmobile-r8a7778-add-USB-support.patch
+++ /dev/null
@@ -1,228 +0,0 @@
-From 8871a3895167224404be96762ad996f3ff5d6fc5 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Sun, 9 Jun 2013 00:36:05 +0400
-Subject: ARM: shmobile: r8a7778: add USB support
-
-Add USB clock and EHCI, OHCI, and USB PHY platform devices for R8A7778 SoC;  add
-a function to register PHY device with board-specific platform data and register
-EHCI and OHCI platfrom devices from the init_late() board method.
-
-Also,  don't forget to enable CONFIG_ARCH_HAS_[EO]HCI options for R8A7778 SoC in
-Kconfig...
-
-The patch has been tested on the BOCK-W board.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 02474a41e6180521a2b9b30b84888670e290dba0)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/Kconfig                |   2 +
- arch/arm/mach-shmobile/clock-r8a7778.c        |   4 +
- arch/arm/mach-shmobile/include/mach/r8a7778.h |   3 +
- arch/arm/mach-shmobile/setup-r8a7778.c        | 108 ++++++++++++++++++++++++++
- 4 files changed, 117 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
-index bfe972b9..70df9490 100644
---- a/arch/arm/mach-shmobile/Kconfig
-+++ b/arch/arm/mach-shmobile/Kconfig
-@@ -41,6 +41,8 @@ config ARCH_R8A7778
- 	select CPU_V7
- 	select SH_CLK_CPG
- 	select ARM_GIC
-+	select USB_ARCH_HAS_EHCI
-+	select USB_ARCH_HAS_OHCI
- 
- config ARCH_R8A7779
- 	bool "R-Car H1 (R8A77790)"
-diff --git a/arch/arm/mach-shmobile/clock-r8a7778.c b/arch/arm/mach-shmobile/clock-r8a7778.c
-index b251e4d0..696d206a 100644
---- a/arch/arm/mach-shmobile/clock-r8a7778.c
-+++ b/arch/arm/mach-shmobile/clock-r8a7778.c
-@@ -105,6 +105,7 @@ static struct clk *main_clks[] = {
- enum {
- 	MSTP323, MSTP322, MSTP321,
- 	MSTP114,
-+	MSTP100,
- 	MSTP026, MSTP025, MSTP024, MSTP023, MSTP022, MSTP021,
- 	MSTP016, MSTP015,
- 	MSTP_NR };
-@@ -114,6 +115,7 @@ static struct clk mstp_clks[MSTP_NR] = {
- 	[MSTP322] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 22, 0), /* SDHI1 */
- 	[MSTP321] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 21, 0), /* SDHI2 */
- 	[MSTP114] = SH_CLK_MSTP32(&p_clk, MSTPCR1, 14, 0), /* Ether */
-+	[MSTP100] = SH_CLK_MSTP32(&p_clk, MSTPCR1,  0, 0), /* USB0/1 */
- 	[MSTP026] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 26, 0), /* SCIF0 */
- 	[MSTP025] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 25, 0), /* SCIF1 */
- 	[MSTP024] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 24, 0), /* SCIF2 */
-@@ -130,6 +132,8 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP322]), /* SDHI1 */
- 	CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP321]), /* SDHI2 */
- 	CLKDEV_DEV_ID("sh-eth",	&mstp_clks[MSTP114]), /* Ether */
-+	CLKDEV_DEV_ID("ehci-platform", &mstp_clks[MSTP100]), /* USB EHCI port0/1 */
-+	CLKDEV_DEV_ID("ohci-platform", &mstp_clks[MSTP100]), /* USB OHCI port0/1 */
- 	CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP026]), /* SCIF0 */
- 	CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP025]), /* SCIF1 */
- 	CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP024]), /* SCIF2 */
-diff --git a/arch/arm/mach-shmobile/include/mach/r8a7778.h b/arch/arm/mach-shmobile/include/mach/r8a7778.h
-index ae65b459..1d4207cc 100644
---- a/arch/arm/mach-shmobile/include/mach/r8a7778.h
-+++ b/arch/arm/mach-shmobile/include/mach/r8a7778.h
-@@ -20,10 +20,13 @@
- 
- #include <linux/mmc/sh_mobile_sdhi.h>
- #include <linux/sh_eth.h>
-+#include <linux/platform_data/usb-rcar-phy.h>
- 
- extern void r8a7778_add_standard_devices(void);
- extern void r8a7778_add_standard_devices_dt(void);
- extern void r8a7778_add_ether_device(struct sh_eth_plat_data *pdata);
-+extern void r8a7778_add_usb_phy_device(struct rcar_phy_platform_data *pdata);
-+extern void r8a7778_init_late(void);
- extern void r8a7778_init_delay(void);
- extern void r8a7778_init_irq(void);
- extern void r8a7778_init_irq_dt(void);
-diff --git a/arch/arm/mach-shmobile/setup-r8a7778.c b/arch/arm/mach-shmobile/setup-r8a7778.c
-index 3004aba2..94211335 100644
---- a/arch/arm/mach-shmobile/setup-r8a7778.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7778.c
-@@ -30,6 +30,12 @@
- #include <linux/irqchip.h>
- #include <linux/serial_sci.h>
- #include <linux/sh_timer.h>
-+#include <linux/pm_runtime.h>
-+#include <linux/usb/phy.h>
-+#include <linux/usb/hcd.h>
-+#include <linux/usb/ehci_pdriver.h>
-+#include <linux/usb/ohci_pdriver.h>
-+#include <linux/dma-mapping.h>
- #include <mach/irqs.h>
- #include <mach/r8a7778.h>
- #include <mach/common.h>
-@@ -89,6 +95,99 @@ static struct sh_timer_config sh_tmu1_platform_data = {
- 		&sh_tmu##idx##_platform_data,		\
- 		sizeof(sh_tmu##idx##_platform_data))
- 
-+/* USB PHY */
-+static struct resource usb_phy_resources[] __initdata = {
-+	DEFINE_RES_MEM(0xffe70800, 0x100),
-+	DEFINE_RES_MEM(0xffe76000, 0x100),
-+};
-+
-+void __init r8a7778_add_usb_phy_device(struct rcar_phy_platform_data *pdata)
-+{
-+	platform_device_register_resndata(&platform_bus, "rcar_usb_phy", -1,
-+					  usb_phy_resources,
-+					  ARRAY_SIZE(usb_phy_resources),
-+					  pdata, sizeof(*pdata));
-+}
-+
-+/* USB */
-+static struct usb_phy *phy;
-+
-+static int usb_power_on(struct platform_device *pdev)
-+{
-+	if (IS_ERR(phy))
-+		return PTR_ERR(phy);
-+
-+	pm_runtime_enable(&pdev->dev);
-+	pm_runtime_get_sync(&pdev->dev);
-+
-+	usb_phy_init(phy);
-+
-+	return 0;
-+}
-+
-+static void usb_power_off(struct platform_device *pdev)
-+{
-+	if (IS_ERR(phy))
-+		return;
-+
-+	usb_phy_shutdown(phy);
-+
-+	pm_runtime_put_sync(&pdev->dev);
-+	pm_runtime_disable(&pdev->dev);
-+}
-+
-+static int ehci_init_internal_buffer(struct usb_hcd *hcd)
-+{
-+	/*
-+	 * Below are recommended values from the datasheet;
-+	 * see [USB :: Setting of EHCI Internal Buffer].
-+	 */
-+	/* EHCI IP internal buffer setting */
-+	iowrite32(0x00ff0040, hcd->regs + 0x0094);
-+	/* EHCI IP internal buffer enable */
-+	iowrite32(0x00000001, hcd->regs + 0x009C);
-+
-+	return 0;
-+}
-+
-+static struct usb_ehci_pdata ehci_pdata __initdata = {
-+	.power_on	= usb_power_on,
-+	.power_off	= usb_power_off,
-+	.power_suspend	= usb_power_off,
-+	.pre_setup	= ehci_init_internal_buffer,
-+};
-+
-+static struct resource ehci_resources[] __initdata = {
-+	DEFINE_RES_MEM(0xffe70000, 0x400),
-+	DEFINE_RES_IRQ(gic_iid(0x4c)),
-+};
-+
-+static struct usb_ohci_pdata ohci_pdata __initdata = {
-+	.power_on	= usb_power_on,
-+	.power_off	= usb_power_off,
-+	.power_suspend	= usb_power_off,
-+};
-+
-+static struct resource ohci_resources[] __initdata = {
-+	DEFINE_RES_MEM(0xffe70400, 0x400),
-+	DEFINE_RES_IRQ(gic_iid(0x4c)),
-+};
-+
-+#define USB_PLATFORM_INFO(hci)					\
-+static struct platform_device_info hci##_info __initdata = {	\
-+	.parent		= &platform_bus,			\
-+	.name		= #hci "-platform",			\
-+	.id		= -1,					\
-+	.res		= hci##_resources,			\
-+	.num_res	= ARRAY_SIZE(hci##_resources),		\
-+	.data		= &hci##_pdata,				\
-+	.size_data	= sizeof(hci##_pdata),			\
-+	.dma_mask	= DMA_BIT_MASK(32),			\
-+}
-+
-+USB_PLATFORM_INFO(ehci);
-+USB_PLATFORM_INFO(ohci);
-+
- /* Ether */
- static struct resource ether_resources[] = {
- 	DEFINE_RES_MEM(0xfde00000, 0x400),
-@@ -197,6 +296,14 @@ void __init r8a7778_add_standard_devices(void)
- 	r8a7778_register_tmu(1);
- }
- 
-+void __init r8a7778_init_late(void)
-+{
-+	phy = usb_get_phy(USB_PHY_TYPE_USB2);
-+
-+	platform_device_register_full(&ehci_info);
-+	platform_device_register_full(&ohci_info);
-+}
-+
- static struct renesas_intc_irqpin_config irqpin_platform_data = {
- 	.irq_base = irq_pin(0), /* IRQ0 -> IRQ3 */
- 	.sense_bitfield_width = 2,
-@@ -310,6 +417,7 @@ DT_MACHINE_START(R8A7778_DT, "Generic R8A7778 (Flattened Device Tree)")
- 	.init_machine	= r8a7778_add_standard_devices_dt,
- 	.init_time	= shmobile_timer_init,
- 	.dt_compat	= r8a7778_compat_dt,
-+	.init_late      = r8a7778_init_late,
- MACHINE_END
- 
- #endif /* CONFIG_USE_OF */
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0259-ARM-shmobile-BOCK-W-add-USB-support.patch b/patches.renesas/0259-ARM-shmobile-BOCK-W-add-USB-support.patch
deleted file mode 100644
index 9270c804766b6..0000000000000
--- a/patches.renesas/0259-ARM-shmobile-BOCK-W-add-USB-support.patch
+++ /dev/null
@@ -1,65 +0,0 @@
-From 53725d0d63d021983ea26d4fe0cfa0df3fd60efc Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Sun, 9 Jun 2013 00:38:41 +0400
-Subject: ARM: shmobile: BOCK-W: add USB support
-
-Register the USB PHY device from bockw_init(), passing the platform  data to it.
-Set machine's init_late() method to r8a7778_init_late() in order for [EO]HCI to
-get registered too...
-
-Don't forget to add USB PENC0/1 pins to bockw_pinctrl_map[].
-
-The patch has been tested on the BOCK-W board.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 1a87b01d3b18709ae240ec90ae612354dd44d9a9)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-	arch/arm/mach-shmobile/board-bockw.c
----
- arch/arm/mach-shmobile/board-bockw.c | 8 ++++++++
- 1 file changed, 8 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/board-bockw.c b/arch/arm/mach-shmobile/board-bockw.c
-index 2b6103e5..f6ca2ae2 100644
---- a/arch/arm/mach-shmobile/board-bockw.c
-+++ b/arch/arm/mach-shmobile/board-bockw.c
-@@ -56,6 +56,8 @@ static struct resource smsc911x_resources[] = {
- 	DEFINE_RES_IRQ(irq_pin(0)), /* IRQ 0 */
- };
- 
-+static struct rcar_phy_platform_data usb_phy_platform_data __initdata;
-+
- /* SDHI */
- static struct sh_mobile_sdhi_info sdhi0_info = {
- 	.tmio_caps	= MMC_CAP_SD_HIGHSPEED,
-@@ -69,6 +71,10 @@ static const struct pinctrl_map bockw_pinctrl_map[] = {
- 				  "scif0_data_a", "scif0"),
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
- 				  "scif0_ctrl", "scif0"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("ehci-platform", "pfc-r8a7778",
-+				  "usb0", "usb0"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("ehci-platform", "pfc-r8a7778",
-+				  "usb1", "usb1"),
- 	/* SDHI0 */
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
- 				  "sdhi0", "sdhi0"),
-@@ -85,6 +91,7 @@ static void __init bockw_init(void)
- 	r8a7778_clock_init();
- 	r8a7778_init_irq_extpin(1);
- 	r8a7778_add_standard_devices();
-+	r8a7778_add_usb_phy_device(&usb_phy_platform_data);
- 
- 	pinctrl_register_mappings(bockw_pinctrl_map,
- 				  ARRAY_SIZE(bockw_pinctrl_map));
-@@ -140,4 +147,5 @@ DT_MACHINE_START(BOCKW_DT, "bockw")
- 	.init_machine	= bockw_init,
- 	.init_time	= shmobile_timer_init,
- 	.dt_compat	= bockw_boards_compat_dt,
-+	.init_late      = r8a7778_init_late,
- MACHINE_END
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0259-ARM-shmobile-r7s72100-Don-t-define-SCIF-platform-dat.patch b/patches.renesas/0259-ARM-shmobile-r7s72100-Don-t-define-SCIF-platform-dat.patch
deleted file mode 100644
index 51b4e2ad6457a..0000000000000
--- a/patches.renesas/0259-ARM-shmobile-r7s72100-Don-t-define-SCIF-platform-dat.patch
+++ /dev/null
@@ -1,98 +0,0 @@
-From 26ccb2b8359419778acd0a7b6eefa2be82e5ff74 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 6 Dec 2013 10:59:25 +0100
-Subject: ARM: shmobile: r7s72100: Don't define SCIF platform data in an array
-
-The SCIF driver is transitioning to platform resources. Board code will
-thus need to define an array of resources for each SCIF device. This is
-incompatible with the macro-based SCIF platform data definition as an
-array. Rework the macro to define platform data as individual
-structures.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit a958a31eb021a2c8ce24c718fcbf00d915f38e78)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-r7s72100.c | 49 +++++++++++++++------------------
- 1 file changed, 22 insertions(+), 27 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-r7s72100.c b/arch/arm/mach-shmobile/setup-r7s72100.c
-index 55f0b9c7c482..6ae7e3257bf3 100644
---- a/arch/arm/mach-shmobile/setup-r7s72100.c
-+++ b/arch/arm/mach-shmobile/setup-r7s72100.c
-@@ -28,8 +28,8 @@
- #include <mach/r7s72100.h>
- #include <asm/mach/arch.h>
- 
--#define SCIF_DATA(index, baseaddr, irq)					\
--[index] = {								\
-+#define R7S72100_SCIF(index, baseaddr, irq)				\
-+static const struct plat_sci_port scif##index##_platform_data = {	\
- 	.type		= PORT_SCIF,					\
- 	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,		\
- 	.flags		= UPF_BOOT_AUTOCONF | UPF_IOREMAP,		\
-@@ -40,24 +40,19 @@
- 	.irqs		= { irq + 1, irq + 2, irq + 3, irq },		\
- }
- 
--enum { SCIF0, SCIF1, SCIF2, SCIF3, SCIF4, SCIF5, SCIF6, SCIF7 };
-+R7S72100_SCIF(0, 0xe8007000, gic_iid(221));
-+R7S72100_SCIF(1, 0xe8007800, gic_iid(225));
-+R7S72100_SCIF(2, 0xe8008000, gic_iid(229));
-+R7S72100_SCIF(3, 0xe8008800, gic_iid(233));
-+R7S72100_SCIF(4, 0xe8009000, gic_iid(237));
-+R7S72100_SCIF(5, 0xe8009800, gic_iid(241));
-+R7S72100_SCIF(6, 0xe800a000, gic_iid(245));
-+R7S72100_SCIF(7, 0xe800a800, gic_iid(249));
- 
--static const struct plat_sci_port scif[] __initconst = {
--	SCIF_DATA(SCIF0, 0xe8007000, gic_iid(221)), /* SCIF0 */
--	SCIF_DATA(SCIF1, 0xe8007800, gic_iid(225)), /* SCIF1 */
--	SCIF_DATA(SCIF2, 0xe8008000, gic_iid(229)), /* SCIF2 */
--	SCIF_DATA(SCIF3, 0xe8008800, gic_iid(233)), /* SCIF3 */
--	SCIF_DATA(SCIF4, 0xe8009000, gic_iid(237)), /* SCIF4 */
--	SCIF_DATA(SCIF5, 0xe8009800, gic_iid(241)), /* SCIF5 */
--	SCIF_DATA(SCIF6, 0xe800a000, gic_iid(245)), /* SCIF6 */
--	SCIF_DATA(SCIF7, 0xe800a800, gic_iid(249)), /* SCIF7 */
--};
--
--static inline void r7s72100_register_scif(int idx)
--{
--	platform_device_register_data(&platform_bus, "sh-sci", idx, &scif[idx],
--				      sizeof(struct plat_sci_port));
--}
-+#define r7s72100_register_scif(index)					       \
-+	platform_device_register_data(&platform_bus, "sh-sci", index,	       \
-+				      &scif##index##_platform_data,	       \
-+				      sizeof(scif##index##_platform_data))
- 
- 
- static struct sh_timer_config mtu2_0_platform_data __initdata = {
-@@ -81,14 +76,14 @@ static struct resource mtu2_0_resources[] __initdata = {
- 
- void __init r7s72100_add_dt_devices(void)
- {
--	r7s72100_register_scif(SCIF0);
--	r7s72100_register_scif(SCIF1);
--	r7s72100_register_scif(SCIF2);
--	r7s72100_register_scif(SCIF3);
--	r7s72100_register_scif(SCIF4);
--	r7s72100_register_scif(SCIF5);
--	r7s72100_register_scif(SCIF6);
--	r7s72100_register_scif(SCIF7);
-+	r7s72100_register_scif(0);
-+	r7s72100_register_scif(1);
-+	r7s72100_register_scif(2);
-+	r7s72100_register_scif(3);
-+	r7s72100_register_scif(4);
-+	r7s72100_register_scif(5);
-+	r7s72100_register_scif(6);
-+	r7s72100_register_scif(7);
- 	r7s72100_register_mtu2(0);
- }
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0260-ARM-shmobile-r8a7778-Don-t-define-SCIF-platform-data.patch b/patches.renesas/0260-ARM-shmobile-r8a7778-Don-t-define-SCIF-platform-data.patch
deleted file mode 100644
index 4ecf514de8c90..0000000000000
--- a/patches.renesas/0260-ARM-shmobile-r8a7778-Don-t-define-SCIF-platform-data.patch
+++ /dev/null
@@ -1,91 +0,0 @@
-From 2a951e6d8c0437bcf6acb70dd8d945251466094a Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 6 Dec 2013 10:59:27 +0100
-Subject: ARM: shmobile: r8a7778: Don't define SCIF platform data in an array
-
-The SCIF driver is transitioning to platform resources. Board code will
-thus need to define an array of resources for each SCIF device. This is
-incompatible with the macro-based SCIF platform data definition as an
-array. Rework the macro to define platform data as individual
-structures.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit ecbcd715f098bf4b870ae5bd0f9b572987b3b219)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-r8a7778.c | 36 ++++++++++++++++++----------------
- 1 file changed, 19 insertions(+), 17 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-r8a7778.c b/arch/arm/mach-shmobile/setup-r8a7778.c
-index 7ea6308e5da8..210c66315dd9 100644
---- a/arch/arm/mach-shmobile/setup-r8a7778.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7778.c
-@@ -44,8 +44,8 @@
- #include <asm/hardware/cache-l2x0.h>
- 
- /* SCIF */
--#define SCIF_INFO(baseaddr, irq)				\
--{								\
-+#define R8A7778_SCIF(index, baseaddr, irq)			\
-+static struct plat_sci_port scif##index##_platform_data = {	\
- 	.mapbase	= baseaddr,				\
- 	.flags		= UPF_BOOT_AUTOCONF | UPF_IOREMAP,	\
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_CKE1,	\
-@@ -54,14 +54,17 @@
- 	.irqs		= SCIx_IRQ_MUXED(irq),			\
- }
- 
--static struct plat_sci_port scif_platform_data[] __initdata = {
--	SCIF_INFO(0xffe40000, gic_iid(0x66)),
--	SCIF_INFO(0xffe41000, gic_iid(0x67)),
--	SCIF_INFO(0xffe42000, gic_iid(0x68)),
--	SCIF_INFO(0xffe43000, gic_iid(0x69)),
--	SCIF_INFO(0xffe44000, gic_iid(0x6a)),
--	SCIF_INFO(0xffe45000, gic_iid(0x6b)),
--};
-+R8A7778_SCIF(0, 0xffe40000, gic_iid(0x66));
-+R8A7778_SCIF(1, 0xffe41000, gic_iid(0x67));
-+R8A7778_SCIF(2, 0xffe42000, gic_iid(0x68));
-+R8A7778_SCIF(3, 0xffe43000, gic_iid(0x69));
-+R8A7778_SCIF(4, 0xffe44000, gic_iid(0x6a));
-+R8A7778_SCIF(5, 0xffe45000, gic_iid(0x6b));
-+
-+#define r8a7778_register_scif(index)					       \
-+	platform_device_register_data(&platform_bus, "sh-sci", index,	       \
-+				      &scif##index##_platform_data,	       \
-+				      sizeof(scif##index##_platform_data))
- 
- /* TMU */
- static struct resource sh_tmu0_resources[] __initdata = {
-@@ -287,8 +290,6 @@ static void __init r8a7778_register_hspi(int id)
- 
- void __init r8a7778_add_dt_devices(void)
- {
--	int i;
--
- #ifdef CONFIG_CACHE_L2X0
- 	void __iomem *base = ioremap_nocache(0xf0100000, 0x1000);
- 	if (base) {
-@@ -300,11 +301,12 @@ void __init r8a7778_add_dt_devices(void)
- 	}
- #endif
- 
--	for (i = 0; i < ARRAY_SIZE(scif_platform_data); i++)
--		platform_device_register_data(&platform_bus, "sh-sci", i,
--					      &scif_platform_data[i],
--					      sizeof(struct plat_sci_port));
--
-+	r8a7778_register_scif(0);
-+	r8a7778_register_scif(1);
-+	r8a7778_register_scif(2);
-+	r8a7778_register_scif(3);
-+	r8a7778_register_scif(4);
-+	r8a7778_register_scif(5);
- 	r8a7778_register_tmu(0);
- 	r8a7778_register_tmu(1);
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0260-ARM-shmobile-r8a7778-add-support-I2C-clock.patch b/patches.renesas/0260-ARM-shmobile-r8a7778-add-support-I2C-clock.patch
deleted file mode 100644
index 8046e00a3de66..0000000000000
--- a/patches.renesas/0260-ARM-shmobile-r8a7778-add-support-I2C-clock.patch
+++ /dev/null
@@ -1,70 +0,0 @@
-From f00ed050f314379e4820624a126aeeb51053729c Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Mon, 3 Jun 2013 22:10:24 -0700
-Subject: ARM: shmobile: r8a7778: add support I2C clock
-
-This patch adds r8a7778 I2C clock support.
-It also adds peripheral_clk which is requiested
-from i2c-rcar driver
-
-Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit b6bb9a6426cab90216763374b9d2ebc4abc48016)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-	arch/arm/mach-shmobile/clock-r8a7778.c
----
- arch/arm/mach-shmobile/clock-r8a7778.c | 14 +++++++++++++-
- 1 file changed, 13 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a7778.c b/arch/arm/mach-shmobile/clock-r8a7778.c
-index 696d206a..da39198e 100644
---- a/arch/arm/mach-shmobile/clock-r8a7778.c
-+++ b/arch/arm/mach-shmobile/clock-r8a7778.c
-@@ -106,7 +106,8 @@ enum {
- 	MSTP323, MSTP322, MSTP321,
- 	MSTP114,
- 	MSTP100,
--	MSTP026, MSTP025, MSTP024, MSTP023, MSTP022, MSTP021,
-+	MSTP030,
-+	MSTP029, MSTP028, MSTP027, MSTP026, MSTP025, MSTP024, MSTP023, MSTP022, MSTP021,
- 	MSTP016, MSTP015,
- 	MSTP_NR };
- 
-@@ -116,6 +117,10 @@ static struct clk mstp_clks[MSTP_NR] = {
- 	[MSTP321] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 21, 0), /* SDHI2 */
- 	[MSTP114] = SH_CLK_MSTP32(&p_clk, MSTPCR1, 14, 0), /* Ether */
- 	[MSTP100] = SH_CLK_MSTP32(&p_clk, MSTPCR1,  0, 0), /* USB0/1 */
-+	[MSTP030] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 30, 0), /* I2C0 */
-+	[MSTP029] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 29, 0), /* I2C1 */
-+	[MSTP028] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 28, 0), /* I2C2 */
-+	[MSTP027] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 27, 0), /* I2C3 */
- 	[MSTP026] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 26, 0), /* SCIF0 */
- 	[MSTP025] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 25, 0), /* SCIF1 */
- 	[MSTP024] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 24, 0), /* SCIF2 */
-@@ -127,6 +132,9 @@ static struct clk mstp_clks[MSTP_NR] = {
- };
- 
- static struct clk_lookup lookups[] = {
-+	/* main */
-+	CLKDEV_CON_ID("peripheral_clk",	&p_clk),
-+
- 	/* MSTP32 clocks */
- 	CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP323]), /* SDHI0 */
- 	CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP322]), /* SDHI1 */
-@@ -134,6 +142,10 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_DEV_ID("sh-eth",	&mstp_clks[MSTP114]), /* Ether */
- 	CLKDEV_DEV_ID("ehci-platform", &mstp_clks[MSTP100]), /* USB EHCI port0/1 */
- 	CLKDEV_DEV_ID("ohci-platform", &mstp_clks[MSTP100]), /* USB OHCI port0/1 */
-+	CLKDEV_DEV_ID("i2c-rcar.0", &mstp_clks[MSTP030]), /* I2C0 */
-+	CLKDEV_DEV_ID("i2c-rcar.1", &mstp_clks[MSTP029]), /* I2C1 */
-+	CLKDEV_DEV_ID("i2c-rcar.2", &mstp_clks[MSTP028]), /* I2C2 */
-+	CLKDEV_DEV_ID("i2c-rcar.3", &mstp_clks[MSTP027]), /* I2C3 */
- 	CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP026]), /* SCIF0 */
- 	CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP025]), /* SCIF1 */
- 	CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP024]), /* SCIF2 */
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0261-ARM-shmobile-r8a7778-add-support-HSPI-clock.patch b/patches.renesas/0261-ARM-shmobile-r8a7778-add-support-HSPI-clock.patch
deleted file mode 100644
index 13ba086796763..0000000000000
--- a/patches.renesas/0261-ARM-shmobile-r8a7778-add-support-HSPI-clock.patch
+++ /dev/null
@@ -1,56 +0,0 @@
-From 7519f9fe2739374dec871e09c63a6f1123b6aecf Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Mon, 3 Jun 2013 22:11:24 -0700
-Subject: ARM: shmobile: r8a7778: add support HSPI clock
-
-This patch adds r8a7778 HSPI clock support.
-It also adds shyway_clk which is requiested
-from sh-hspi driver
-
-Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 3dd691ef07abd55154de913b241f9804fc78b979)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r8a7778.c | 6 ++++++
- 1 file changed, 6 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a7778.c b/arch/arm/mach-shmobile/clock-r8a7778.c
-index da39198e..796bc7e3 100644
---- a/arch/arm/mach-shmobile/clock-r8a7778.c
-+++ b/arch/arm/mach-shmobile/clock-r8a7778.c
-@@ -109,6 +109,7 @@ enum {
- 	MSTP030,
- 	MSTP029, MSTP028, MSTP027, MSTP026, MSTP025, MSTP024, MSTP023, MSTP022, MSTP021,
- 	MSTP016, MSTP015,
-+	MSTP007,
- 	MSTP_NR };
- 
- static struct clk mstp_clks[MSTP_NR] = {
-@@ -129,10 +130,12 @@ static struct clk mstp_clks[MSTP_NR] = {
- 	[MSTP021] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 21, 0), /* SCIF5 */
- 	[MSTP016] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 16, 0), /* TMU0 */
- 	[MSTP015] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 15, 0), /* TMU1 */
-+	[MSTP007] = SH_CLK_MSTP32(&p_clk, MSTPCR0,  7, 0), /* HSPI */
- };
- 
- static struct clk_lookup lookups[] = {
- 	/* main */
-+	CLKDEV_CON_ID("shyway_clk",	&s_clk),
- 	CLKDEV_CON_ID("peripheral_clk",	&p_clk),
- 
- 	/* MSTP32 clocks */
-@@ -154,6 +157,9 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP021]), /* SCIF6 */
- 	CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP016]), /* TMU00 */
- 	CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP015]), /* TMU01 */
-+	CLKDEV_DEV_ID("sh-hspi.0", &mstp_clks[MSTP007]), /* HSPI0 */
-+	CLKDEV_DEV_ID("sh-hspi.1", &mstp_clks[MSTP007]), /* HSPI1 */
-+	CLKDEV_DEV_ID("sh-hspi.2", &mstp_clks[MSTP007]), /* HSPI2 */
- };
- 
- void __init r8a7778_clock_init(void)
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0261-ARM-shmobile-r8a7791-Don-t-define-SCIF-platform-data.patch b/patches.renesas/0261-ARM-shmobile-r8a7791-Don-t-define-SCIF-platform-data.patch
deleted file mode 100644
index 982630cce3b06..0000000000000
--- a/patches.renesas/0261-ARM-shmobile-r8a7791-Don-t-define-SCIF-platform-data.patch
+++ /dev/null
@@ -1,168 +0,0 @@
-From bd2c2cbe8d27717930a29993b9b83aa17ecf433a Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 6 Dec 2013 10:59:29 +0100
-Subject: ARM: shmobile: r8a7791: Don't define SCIF platform data in an array
-
-The SCIF driver is transitioning to platform resources. Board code will
-thus need to define an array of resources for each SCIF device. This is
-incompatible with the macro-based SCIF platform data definition as an
-array. Rework the macro to define platform data as individual
-structures.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 135d0e602a2f2700bcbde8315000e21cbdc4208e)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-r8a7791.c | 125 ++++++++++++++-------------------
- 1 file changed, 52 insertions(+), 73 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-r8a7791.c b/arch/arm/mach-shmobile/setup-r8a7791.c
-index cddca99b434f..3fe0d7de08fc 100644
---- a/arch/arm/mach-shmobile/setup-r8a7791.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7791.c
-@@ -84,66 +84,45 @@ void __init r8a7791_pinmux_init(void)
- 	r8a7791_register_gpio(7);
- }
- 
--#define SCIF_COMMON(scif_type, baseaddr, irq)			\
--	.type		= scif_type,				\
--	.mapbase	= baseaddr,				\
--	.flags		= UPF_BOOT_AUTOCONF | UPF_IOREMAP,	\
--	.irqs		= SCIx_IRQ_MUXED(irq)
--
--#define SCIFA_DATA(index, baseaddr, irq)		\
--[index] = {						\
--	SCIF_COMMON(PORT_SCIFA, baseaddr, irq),		\
--	.scbrr_algo_id	= SCBRR_ALGO_4,			\
--	.scscr = SCSCR_RE | SCSCR_TE,	\
-+#define __R8A7791_SCIF(scif_type, algo, index, baseaddr, irq)		\
-+static struct plat_sci_port scif##index##_platform_data = {		\
-+	.type		= scif_type,					\
-+	.mapbase	= baseaddr,					\
-+	.flags		= UPF_BOOT_AUTOCONF | UPF_IOREMAP,		\
-+	.scbrr_algo_id	= algo,						\
-+	.scscr		= SCSCR_RE | SCSCR_TE,				\
-+	.irqs		= SCIx_IRQ_MUXED(irq),				\
- }
- 
--#define SCIFB_DATA(index, baseaddr, irq)	\
--[index] = {					\
--	SCIF_COMMON(PORT_SCIFB, baseaddr, irq),	\
--	.scbrr_algo_id	= SCBRR_ALGO_4,		\
--	.scscr = SCSCR_RE | SCSCR_TE,		\
--}
--
--#define SCIF_DATA(index, baseaddr, irq)		\
--[index] = {						\
--	SCIF_COMMON(PORT_SCIF, baseaddr, irq),		\
--	.scbrr_algo_id	= SCBRR_ALGO_2,			\
--	.scscr = SCSCR_RE | SCSCR_TE,	\
--}
--
--#define HSCIF_DATA(index, baseaddr, irq)		\
--[index] = {						\
--	SCIF_COMMON(PORT_HSCIF, baseaddr, irq),		\
--	.scbrr_algo_id	= SCBRR_ALGO_6,			\
--	.scscr = SCSCR_RE | SCSCR_TE,	\
--}
--
--enum { SCIFA0, SCIFA1, SCIFB0, SCIFB1, SCIFB2, SCIFA2, SCIF0, SCIF1,
--	SCIF2, SCIF3, SCIF4, SCIF5, SCIFA3, SCIFA4, SCIFA5 };
--
--static const struct plat_sci_port scif[] __initconst = {
--	SCIFA_DATA(SCIFA0, 0xe6c40000, gic_spi(144)), /* SCIFA0 */
--	SCIFA_DATA(SCIFA1, 0xe6c50000, gic_spi(145)), /* SCIFA1 */
--	SCIFB_DATA(SCIFB0, 0xe6c20000, gic_spi(148)), /* SCIFB0 */
--	SCIFB_DATA(SCIFB1, 0xe6c30000, gic_spi(149)), /* SCIFB1 */
--	SCIFB_DATA(SCIFB2, 0xe6ce0000, gic_spi(150)), /* SCIFB2 */
--	SCIFA_DATA(SCIFA2, 0xe6c60000, gic_spi(151)), /* SCIFA2 */
--	SCIF_DATA(SCIF0, 0xe6e60000, gic_spi(152)), /* SCIF0 */
--	SCIF_DATA(SCIF1, 0xe6e68000, gic_spi(153)), /* SCIF1 */
--	SCIF_DATA(SCIF2, 0xe6e58000, gic_spi(22)), /* SCIF2 */
--	SCIF_DATA(SCIF3, 0xe6ea8000, gic_spi(23)), /* SCIF3 */
--	SCIF_DATA(SCIF4, 0xe6ee0000, gic_spi(24)), /* SCIF4 */
--	SCIF_DATA(SCIF5, 0xe6ee8000, gic_spi(25)), /* SCIF5 */
--	SCIFA_DATA(SCIFA3, 0xe6c70000, gic_spi(29)), /* SCIFA3 */
--	SCIFA_DATA(SCIFA4, 0xe6c78000, gic_spi(30)), /* SCIFA4 */
--	SCIFA_DATA(SCIFA5, 0xe6c80000, gic_spi(31)), /* SCIFA5 */
--};
--
--static inline void r8a7791_register_scif(int idx)
--{
--	platform_device_register_data(&platform_bus, "sh-sci", idx, &scif[idx],
--				      sizeof(struct plat_sci_port));
--}
-+#define R8A7791_SCIF(index, baseaddr, irq)				\
-+	__R8A7791_SCIF(PORT_SCIF, SCBRR_ALGO_2, index, baseaddr, irq)
-+
-+#define R8A7791_SCIFA(index, baseaddr, irq)				\
-+	__R8A7791_SCIF(PORT_SCIFA, SCBRR_ALGO_4, index, baseaddr, irq)
-+
-+#define R8A7791_SCIFB(index, baseaddr, irq)				\
-+	__R8A7791_SCIF(PORT_SCIFB, SCBRR_ALGO_4, index, baseaddr, irq)
-+
-+R8A7791_SCIFA(0,  0xe6c40000, gic_spi(144)); /* SCIFA0 */
-+R8A7791_SCIFA(1,  0xe6c50000, gic_spi(145)); /* SCIFA1 */
-+R8A7791_SCIFB(2,  0xe6c20000, gic_spi(148)); /* SCIFB0 */
-+R8A7791_SCIFB(3,  0xe6c30000, gic_spi(149)); /* SCIFB1 */
-+R8A7791_SCIFB(4,  0xe6ce0000, gic_spi(150)); /* SCIFB2 */
-+R8A7791_SCIFA(5,  0xe6c60000, gic_spi(151)); /* SCIFA2 */
-+R8A7791_SCIF(6,   0xe6e60000, gic_spi(152)); /* SCIF0 */
-+R8A7791_SCIF(7,   0xe6e68000, gic_spi(153)); /* SCIF1 */
-+R8A7791_SCIF(8,   0xe6e58000, gic_spi(22)); /* SCIF2 */
-+R8A7791_SCIF(9,   0xe6ea8000, gic_spi(23)); /* SCIF3 */
-+R8A7791_SCIF(10,  0xe6ee0000, gic_spi(24)); /* SCIF4 */
-+R8A7791_SCIF(11,  0xe6ee8000, gic_spi(25)); /* SCIF5 */
-+R8A7791_SCIFA(12, 0xe6c70000, gic_spi(29)); /* SCIFA3 */
-+R8A7791_SCIFA(13, 0xe6c78000, gic_spi(30)); /* SCIFA4 */
-+R8A7791_SCIFA(14, 0xe6c80000, gic_spi(31)); /* SCIFA5 */
-+
-+#define r8a7791_register_scif(index)					       \
-+	platform_device_register_data(&platform_bus, "sh-sci", index,	       \
-+				      &scif##index##_platform_data,	       \
-+				      sizeof(scif##index##_platform_data))
- 
- static const struct sh_timer_config cmt00_platform_data __initconst = {
- 	.name = "CMT00",
-@@ -202,21 +181,21 @@ static const struct resource thermal_resources[] __initconst = {
- 
- void __init r8a7791_add_dt_devices(void)
- {
--	r8a7791_register_scif(SCIFA0);
--	r8a7791_register_scif(SCIFA1);
--	r8a7791_register_scif(SCIFB0);
--	r8a7791_register_scif(SCIFB1);
--	r8a7791_register_scif(SCIFB2);
--	r8a7791_register_scif(SCIFA2);
--	r8a7791_register_scif(SCIF0);
--	r8a7791_register_scif(SCIF1);
--	r8a7791_register_scif(SCIF2);
--	r8a7791_register_scif(SCIF3);
--	r8a7791_register_scif(SCIF4);
--	r8a7791_register_scif(SCIF5);
--	r8a7791_register_scif(SCIFA3);
--	r8a7791_register_scif(SCIFA4);
--	r8a7791_register_scif(SCIFA5);
-+	r8a7791_register_scif(0);
-+	r8a7791_register_scif(1);
-+	r8a7791_register_scif(2);
-+	r8a7791_register_scif(3);
-+	r8a7791_register_scif(4);
-+	r8a7791_register_scif(5);
-+	r8a7791_register_scif(6);
-+	r8a7791_register_scif(7);
-+	r8a7791_register_scif(8);
-+	r8a7791_register_scif(9);
-+	r8a7791_register_scif(10);
-+	r8a7791_register_scif(11);
-+	r8a7791_register_scif(12);
-+	r8a7791_register_scif(13);
-+	r8a7791_register_scif(14);
- 	r8a7791_register_cmt(00);
- }
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0262-ARM-shmobile-r8a7778-add-support-MMC-clock.patch b/patches.renesas/0262-ARM-shmobile-r8a7778-add-support-MMC-clock.patch
deleted file mode 100644
index 665693fd5973c..0000000000000
--- a/patches.renesas/0262-ARM-shmobile-r8a7778-add-support-MMC-clock.patch
+++ /dev/null
@@ -1,47 +0,0 @@
-From 9dd16b9c353e85c50c43079859473265157401a9 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Mon, 3 Jun 2013 22:11:39 -0700
-Subject: ARM: shmobile: r8a7778: add support MMC clock
-
-This patch adds r8a7778 MMC clock support.
-
-Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 2ad3c8eb17ac7aed7fad870ba85acd4639cc8cdf)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r8a7778.c | 3 +++
- 1 file changed, 3 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a7778.c b/arch/arm/mach-shmobile/clock-r8a7778.c
-index 796bc7e3..53798e50 100644
---- a/arch/arm/mach-shmobile/clock-r8a7778.c
-+++ b/arch/arm/mach-shmobile/clock-r8a7778.c
-@@ -103,6 +103,7 @@ static struct clk *main_clks[] = {
- };
- 
- enum {
-+	MSTP331,
- 	MSTP323, MSTP322, MSTP321,
- 	MSTP114,
- 	MSTP100,
-@@ -113,6 +114,7 @@ enum {
- 	MSTP_NR };
- 
- static struct clk mstp_clks[MSTP_NR] = {
-+	[MSTP331] = SH_CLK_MSTP32(&s4_clk, MSTPCR3, 31, 0), /* MMC */
- 	[MSTP323] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 23, 0), /* SDHI0 */
- 	[MSTP322] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 22, 0), /* SDHI1 */
- 	[MSTP321] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 21, 0), /* SDHI2 */
-@@ -139,6 +141,7 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_CON_ID("peripheral_clk",	&p_clk),
- 
- 	/* MSTP32 clocks */
-+	CLKDEV_DEV_ID("sh_mmcif", &mstp_clks[MSTP331]), /* MMC */
- 	CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP323]), /* SDHI0 */
- 	CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP322]), /* SDHI1 */
- 	CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP321]), /* SDHI2 */
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0262-ARM-shmobile-r8a7790-Don-t-define-SCIF-platform-data.patch b/patches.renesas/0262-ARM-shmobile-r8a7790-Don-t-define-SCIF-platform-data.patch
deleted file mode 100644
index 4657679aa2a48..0000000000000
--- a/patches.renesas/0262-ARM-shmobile-r8a7790-Don-t-define-SCIF-platform-data.patch
+++ /dev/null
@@ -1,155 +0,0 @@
-From 8ed00eae0c585899673859255ff6bee4b2ddd007 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Sun, 3 Nov 2013 13:50:31 +0100
-Subject: ARM: shmobile: r8a7790: Don't define SCIF platform data in an array
-
-The SCIF driver is transitioning to platform resources. Board code will
-thus need to define an array of resources for each SCIF device. This is
-incompatible with the macro-based SCIF platform data definition as an
-array. Rework the macro to define platform data as individual
-structures.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 302d8898ade1ad5f84cfedc7e8d43ff7720f3f25)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-r8a7790.c | 112 +++++++++++++++------------------
- 1 file changed, 49 insertions(+), 63 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c
-index 8474818a7ae0..a9bcc56ffe01 100644
---- a/arch/arm/mach-shmobile/setup-r8a7790.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7790.c
-@@ -103,61 +103,47 @@ void __init r8a7790_pinmux_init(void)
- 	r8a7790_register_i2c(3);
- }
- 
--#define SCIF_COMMON(scif_type, baseaddr, irq)			\
--	.type		= scif_type,				\
--	.mapbase	= baseaddr,				\
--	.flags		= UPF_BOOT_AUTOCONF | UPF_IOREMAP,	\
--	.irqs		= SCIx_IRQ_MUXED(irq)
--
--#define SCIFA_DATA(index, baseaddr, irq)		\
--[index] = {						\
--	SCIF_COMMON(PORT_SCIFA, baseaddr, irq),		\
--	.scbrr_algo_id	= SCBRR_ALGO_4,			\
--	.scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE0,	\
-+#define __R8A7790_SCIF(scif_type, _scscr, algo, index, baseaddr, irq)	\
-+static struct plat_sci_port scif##index##_platform_data = {		\
-+	.type		= scif_type,					\
-+	.mapbase	= baseaddr,					\
-+	.flags		= UPF_BOOT_AUTOCONF | UPF_IOREMAP,		\
-+	.scbrr_algo_id	= algo,						\
-+	.scscr		= _scscr,					\
-+	.irqs		= SCIx_IRQ_MUXED(irq),				\
- }
- 
--#define SCIFB_DATA(index, baseaddr, irq)	\
--[index] = {					\
--	SCIF_COMMON(PORT_SCIFB, baseaddr, irq),	\
--	.scbrr_algo_id	= SCBRR_ALGO_4,		\
--	.scscr = SCSCR_RE | SCSCR_TE,		\
--}
--
--#define SCIF_DATA(index, baseaddr, irq)		\
--[index] = {						\
--	SCIF_COMMON(PORT_SCIF, baseaddr, irq),		\
--	.scbrr_algo_id	= SCBRR_ALGO_2,			\
--	.scscr = SCSCR_RE | SCSCR_TE,	\
--}
--
--#define HSCIF_DATA(index, baseaddr, irq)		\
--[index] = {						\
--	SCIF_COMMON(PORT_HSCIF, baseaddr, irq),		\
--	.scbrr_algo_id	= SCBRR_ALGO_6,			\
--	.scscr = SCSCR_RE | SCSCR_TE,	\
--}
--
--enum { SCIFA0, SCIFA1, SCIFB0, SCIFB1, SCIFB2, SCIFA2, SCIF0, SCIF1,
--       HSCIF0, HSCIF1 };
--
--static const struct plat_sci_port scif[] __initconst = {
--	SCIFA_DATA(SCIFA0, 0xe6c40000, gic_spi(144)), /* SCIFA0 */
--	SCIFA_DATA(SCIFA1, 0xe6c50000, gic_spi(145)), /* SCIFA1 */
--	SCIFB_DATA(SCIFB0, 0xe6c20000, gic_spi(148)), /* SCIFB0 */
--	SCIFB_DATA(SCIFB1, 0xe6c30000, gic_spi(149)), /* SCIFB1 */
--	SCIFB_DATA(SCIFB2, 0xe6ce0000, gic_spi(150)), /* SCIFB2 */
--	SCIFA_DATA(SCIFA2, 0xe6c60000, gic_spi(151)), /* SCIFA2 */
--	SCIF_DATA(SCIF0, 0xe6e60000, gic_spi(152)), /* SCIF0 */
--	SCIF_DATA(SCIF1, 0xe6e68000, gic_spi(153)), /* SCIF1 */
--	HSCIF_DATA(HSCIF0, 0xe62c0000, gic_spi(154)), /* HSCIF0 */
--	HSCIF_DATA(HSCIF1, 0xe62c8000, gic_spi(155)), /* HSCIF1 */
--};
--
--static inline void r8a7790_register_scif(int idx)
--{
--	platform_device_register_data(&platform_bus, "sh-sci", idx, &scif[idx],
--				      sizeof(struct plat_sci_port));
--}
-+#define R8A7790_SCIF(index, baseaddr, irq)				\
-+	__R8A7790_SCIF(PORT_SCIF, SCSCR_RE | SCSCR_TE,			\
-+		       SCBRR_ALGO_2, index, baseaddr, irq)
-+
-+#define R8A7790_SCIFA(index, baseaddr, irq)				\
-+	__R8A7790_SCIF(PORT_SCIFA, SCSCR_RE | SCSCR_TE | SCSCR_CKE0,	\
-+		       SCBRR_ALGO_4, index, baseaddr, irq)
-+
-+#define R8A7790_SCIFB(index, baseaddr, irq)				\
-+	__R8A7790_SCIF(PORT_SCIFB, SCSCR_RE | SCSCR_TE,			\
-+		       SCBRR_ALGO_4, index, baseaddr, irq)
-+
-+#define R8A7790_HSCIF(index, baseaddr, irq)				\
-+	__R8A7790_SCIF(PORT_HSCIF, SCSCR_RE | SCSCR_TE,			\
-+		       SCBRR_ALGO_6, index, baseaddr, irq)
-+
-+R8A7790_SCIFA(0, 0xe6c40000, gic_spi(144)); /* SCIFA0 */
-+R8A7790_SCIFA(1, 0xe6c50000, gic_spi(145)); /* SCIFA1 */
-+R8A7790_SCIFB(2, 0xe6c20000, gic_spi(148)); /* SCIFB0 */
-+R8A7790_SCIFB(3, 0xe6c30000, gic_spi(149)); /* SCIFB1 */
-+R8A7790_SCIFB(4, 0xe6ce0000, gic_spi(150)); /* SCIFB2 */
-+R8A7790_SCIFA(5, 0xe6c60000, gic_spi(151)); /* SCIFA2 */
-+R8A7790_SCIF(6,  0xe6e60000, gic_spi(152)); /* SCIF0 */
-+R8A7790_SCIF(7,  0xe6e68000, gic_spi(153)); /* SCIF1 */
-+R8A7790_HSCIF(8, 0xe62c0000, gic_spi(154)); /* HSCIF0 */
-+R8A7790_HSCIF(9, 0xe62c8000, gic_spi(155)); /* HSCIF1 */
-+
-+#define r8a7790_register_scif(index)					       \
-+	platform_device_register_data(&platform_bus, "sh-sci", index,	       \
-+				      &scif##index##_platform_data,	       \
-+				      sizeof(scif##index##_platform_data))
- 
- static const struct renesas_irqc_config irqc0_data __initconst = {
- 	.irq_base = irq_pin(0), /* IRQ0 -> IRQ3 */
-@@ -210,16 +196,16 @@ static const struct resource cmt00_resources[] __initconst = {
- 
- void __init r8a7790_add_dt_devices(void)
- {
--	r8a7790_register_scif(SCIFA0);
--	r8a7790_register_scif(SCIFA1);
--	r8a7790_register_scif(SCIFB0);
--	r8a7790_register_scif(SCIFB1);
--	r8a7790_register_scif(SCIFB2);
--	r8a7790_register_scif(SCIFA2);
--	r8a7790_register_scif(SCIF0);
--	r8a7790_register_scif(SCIF1);
--	r8a7790_register_scif(HSCIF0);
--	r8a7790_register_scif(HSCIF1);
-+	r8a7790_register_scif(0);
-+	r8a7790_register_scif(1);
-+	r8a7790_register_scif(2);
-+	r8a7790_register_scif(3);
-+	r8a7790_register_scif(4);
-+	r8a7790_register_scif(5);
-+	r8a7790_register_scif(6);
-+	r8a7790_register_scif(7);
-+	r8a7790_register_scif(8);
-+	r8a7790_register_scif(9);
- 	r8a7790_register_cmt(00);
- }
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0263-ARM-shmobile-r8a7778-add-support-I2C-driver.patch b/patches.renesas/0263-ARM-shmobile-r8a7778-add-support-I2C-driver.patch
deleted file mode 100644
index c2221418370e6..0000000000000
--- a/patches.renesas/0263-ARM-shmobile-r8a7778-add-support-I2C-driver.patch
+++ /dev/null
@@ -1,72 +0,0 @@
-From d2233c152d926d5c44485e0f93f82fecbfb7140e Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Mon, 3 Jun 2013 22:11:58 -0700
-Subject: ARM: shmobile: r8a7778: add support I2C driver
-
-Add a platform device for the r8a7778 I2C.
-
-Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 46b9a092dacea4f30dbdfc58ca2c1ac4e97f6255)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-	arch/arm/mach-shmobile/include/mach/r8a7778.h
----
- arch/arm/mach-shmobile/include/mach/r8a7778.h |  2 ++
- arch/arm/mach-shmobile/setup-r8a7778.c        | 25 +++++++++++++++++++++++++
- 2 files changed, 27 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/include/mach/r8a7778.h b/arch/arm/mach-shmobile/include/mach/r8a7778.h
-index 1d4207cc..184c727c 100644
---- a/arch/arm/mach-shmobile/include/mach/r8a7778.h
-+++ b/arch/arm/mach-shmobile/include/mach/r8a7778.h
-@@ -26,6 +26,8 @@ extern void r8a7778_add_standard_devices(void);
- extern void r8a7778_add_standard_devices_dt(void);
- extern void r8a7778_add_ether_device(struct sh_eth_plat_data *pdata);
- extern void r8a7778_add_usb_phy_device(struct rcar_phy_platform_data *pdata);
-+extern void r8a7778_add_i2c_device(int id);
-+
- extern void r8a7778_init_late(void);
- extern void r8a7778_init_delay(void);
- extern void r8a7778_init_irq(void);
-diff --git a/arch/arm/mach-shmobile/setup-r8a7778.c b/arch/arm/mach-shmobile/setup-r8a7778.c
-index 94211335..67dfea7e 100644
---- a/arch/arm/mach-shmobile/setup-r8a7778.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7778.c
-@@ -272,6 +272,31 @@ void __init r8a7778_sdhi_init(int id,
- 		info, sizeof(*info));
- }
- 
-+/* I2C */
-+static struct resource i2c_resources[] __initdata = {
-+	/* I2C0 */
-+	DEFINE_RES_MEM(0xffc70000, 0x1000),
-+	DEFINE_RES_IRQ(gic_iid(0x63)),
-+	/* I2C1 */
-+	DEFINE_RES_MEM(0xffc71000, 0x1000),
-+	DEFINE_RES_IRQ(gic_iid(0x6e)),
-+	/* I2C2 */
-+	DEFINE_RES_MEM(0xffc72000, 0x1000),
-+	DEFINE_RES_IRQ(gic_iid(0x6c)),
-+	/* I2C3 */
-+	DEFINE_RES_MEM(0xffc73000, 0x1000),
-+	DEFINE_RES_IRQ(gic_iid(0x6d)),
-+};
-+
-+void __init r8a7778_add_i2c_device(int id)
-+{
-+	BUG_ON(id < 0 || id > 3);
-+
-+	platform_device_register_simple(
-+		"i2c-rcar", id,
-+		i2c_resources + (2 * id), 2);
-+}
-+
- void __init r8a7778_add_standard_devices(void)
- {
- 	int i;
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0263-ARM-shmobile-sh7372-Declare-SCIF-register-base-and-I.patch b/patches.renesas/0263-ARM-shmobile-sh7372-Declare-SCIF-register-base-and-I.patch
deleted file mode 100644
index b79250106c7dd..0000000000000
--- a/patches.renesas/0263-ARM-shmobile-sh7372-Declare-SCIF-register-base-and-I.patch
+++ /dev/null
@@ -1,49 +0,0 @@
-From fafb6403c8132d0af74661d37b99a140ff6ce052 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 6 Dec 2013 10:59:30 +0100
-Subject: ARM: shmobile: sh7372: Declare SCIF register base and IRQ as
- resources
-
-Passing the register base address and IRQ through platform data is
-deprecated. Use resources instead.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit d39f98b3bb1f56180997442ee59e0d60ef2b71b8)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-sh7372.c | 9 +++++++--
- 1 file changed, 7 insertions(+), 2 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c
-index 77627dd422b0..798f8acc6195 100644
---- a/arch/arm/mach-shmobile/setup-sh7372.c
-+++ b/arch/arm/mach-shmobile/setup-sh7372.c
-@@ -90,16 +90,21 @@ void __init sh7372_pinmux_init(void)
- #define SH7372_SCIF(scif_type, index, baseaddr, irq)		\
- static struct plat_sci_port scif##index##_platform_data = {	\
- 	.type		= scif_type,				\
--	.mapbase	= baseaddr,				\
- 	.flags		= UPF_BOOT_AUTOCONF,			\
--	.irqs		= SCIx_IRQ_MUXED(irq),			\
- 	.scbrr_algo_id	= SCBRR_ALGO_4,				\
- 	.scscr		= SCSCR_RE | SCSCR_TE,			\
- };								\
- 								\
-+static struct resource scif##index##_resources[] = {		\
-+	DEFINE_RES_MEM(baseaddr, 0x100),			\
-+	DEFINE_RES_IRQ(irq),					\
-+};								\
-+								\
- static struct platform_device scif##index##_device = {		\
- 	.name		= "sh-sci",				\
- 	.id		= index,				\
-+	.resource	= scif##index##_resources,		\
-+	.num_resources	= ARRAY_SIZE(scif##index##_resources),	\
- 	.dev		= {					\
- 		.platform_data	= &scif##index##_platform_data,	\
- 	},							\
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0264-ARM-shmobile-r8a7778-add-support-HSPI-driver.patch b/patches.renesas/0264-ARM-shmobile-r8a7778-add-support-HSPI-driver.patch
deleted file mode 100644
index 687f517426ac0..0000000000000
--- a/patches.renesas/0264-ARM-shmobile-r8a7778-add-support-HSPI-driver.patch
+++ /dev/null
@@ -1,66 +0,0 @@
-From 8db4345dc803396cfb4a6f9b4ca363df92d102fa Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Mon, 3 Jun 2013 22:12:08 -0700
-Subject: ARM: shmobile: r8a7778: add support HSPI driver
-
-Add a platform device for the r8a7778 HSPI.
-
-Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 8b89797f3273e6e1574e1727f73dc8ac7d5f5a9c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/include/mach/r8a7778.h |  1 +
- arch/arm/mach-shmobile/setup-r8a7778.c        | 23 +++++++++++++++++++++++
- 2 files changed, 24 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/include/mach/r8a7778.h b/arch/arm/mach-shmobile/include/mach/r8a7778.h
-index 184c727c..301817ba 100644
---- a/arch/arm/mach-shmobile/include/mach/r8a7778.h
-+++ b/arch/arm/mach-shmobile/include/mach/r8a7778.h
-@@ -27,6 +27,7 @@ extern void r8a7778_add_standard_devices_dt(void);
- extern void r8a7778_add_ether_device(struct sh_eth_plat_data *pdata);
- extern void r8a7778_add_usb_phy_device(struct rcar_phy_platform_data *pdata);
- extern void r8a7778_add_i2c_device(int id);
-+extern void r8a7778_add_hspi_device(int id);
- 
- extern void r8a7778_init_late(void);
- extern void r8a7778_init_delay(void);
-diff --git a/arch/arm/mach-shmobile/setup-r8a7778.c b/arch/arm/mach-shmobile/setup-r8a7778.c
-index 67dfea7e..3b9bea8b 100644
---- a/arch/arm/mach-shmobile/setup-r8a7778.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7778.c
-@@ -297,6 +297,29 @@ void __init r8a7778_add_i2c_device(int id)
- 		i2c_resources + (2 * id), 2);
- }
- 
-+/* HSPI */
-+static struct resource hspi_resources[] __initdata = {
-+	/* HSPI0 */
-+	DEFINE_RES_MEM(0xfffc7000, 0x18),
-+	DEFINE_RES_IRQ(gic_iid(0x5f)),
-+	/* HSPI1 */
-+	DEFINE_RES_MEM(0xfffc8000, 0x18),
-+	DEFINE_RES_IRQ(gic_iid(0x74)),
-+	/* HSPI2 */
-+	DEFINE_RES_MEM(0xfffc6000, 0x18),
-+	DEFINE_RES_IRQ(gic_iid(0x75)),
-+};
-+
-+void __init r8a7778_add_hspi_device(int id)
-+{
-+	BUG_ON(id < 0 || id > 2);
-+
-+	platform_device_register_simple(
-+		"sh-hspi", id,
-+		hspi_resources + (2 * id), 2);
-+}
-+
-+
- void __init r8a7778_add_standard_devices(void)
- {
- 	int i;
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0264-ARM-shmobile-sh73a0-Declare-SCIF-register-base-and-I.patch b/patches.renesas/0264-ARM-shmobile-sh73a0-Declare-SCIF-register-base-and-I.patch
deleted file mode 100644
index 282891f8adf49..0000000000000
--- a/patches.renesas/0264-ARM-shmobile-sh73a0-Declare-SCIF-register-base-and-I.patch
+++ /dev/null
@@ -1,49 +0,0 @@
-From ba2bb03dec04bfe41b23b72b07bd6a9cdb6a9b4f Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 6 Dec 2013 10:59:31 +0100
-Subject: ARM: shmobile: sh73a0: Declare SCIF register base and IRQ as
- resources
-
-Passing the register base address and IRQ through platform data is
-deprecated. Use resources instead.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 31e1ee86b16b2f0e3c7237582c1f10886189d3c2)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-sh73a0.c | 9 +++++++--
- 1 file changed, 7 insertions(+), 2 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c
-index 9c94f34d5399..55ed98ff087c 100644
---- a/arch/arm/mach-shmobile/setup-sh73a0.c
-+++ b/arch/arm/mach-shmobile/setup-sh73a0.c
-@@ -75,16 +75,21 @@ void __init sh73a0_pinmux_init(void)
- #define SH73A0_SCIF(scif_type, index, baseaddr, irq)		\
- static struct plat_sci_port scif##index##_platform_data = {	\
- 	.type		= scif_type,				\
--	.mapbase	= baseaddr,				\
- 	.flags		= UPF_BOOT_AUTOCONF,			\
--	.irqs		= SCIx_IRQ_MUXED(irq),			\
- 	.scbrr_algo_id	= SCBRR_ALGO_4,				\
- 	.scscr		= SCSCR_RE | SCSCR_TE,			\
- };								\
- 								\
-+static struct resource scif##index##_resources[] = {		\
-+	DEFINE_RES_MEM(baseaddr, 0x100),			\
-+	DEFINE_RES_IRQ(irq),					\
-+};								\
-+								\
- static struct platform_device scif##index##_device = {		\
- 	.name		= "sh-sci",				\
- 	.id		= index,				\
-+	.resource	= scif##index##_resources,		\
-+	.num_resources	= ARRAY_SIZE(scif##index##_resources),	\
- 	.dev		= {					\
- 		.platform_data	= &scif##index##_platform_data,	\
- 	},							\
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0265-ARM-shmobile-r7s72100-Declare-SCIF-register-base-and.patch b/patches.renesas/0265-ARM-shmobile-r7s72100-Declare-SCIF-register-base-and.patch
deleted file mode 100644
index f94837981bdbc..0000000000000
--- a/patches.renesas/0265-ARM-shmobile-r7s72100-Declare-SCIF-register-base-and.patch
+++ /dev/null
@@ -1,59 +0,0 @@
-From fa113edf8c35fb7a5113f2ab0b4bf48804be2026 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 6 Dec 2013 10:59:32 +0100
-Subject: ARM: shmobile: r7s72100: Declare SCIF register base and IRQ as
- resources
-
-Passing the register base address and IRQ through platform data is
-deprecated. Use resources instead.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 572f218095dcca5b2e02923c68a152f5f506bfd4)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-r7s72100.c | 20 ++++++++++++++------
- 1 file changed, 14 insertions(+), 6 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-r7s72100.c b/arch/arm/mach-shmobile/setup-r7s72100.c
-index 6ae7e3257bf3..81b995bb1a56 100644
---- a/arch/arm/mach-shmobile/setup-r7s72100.c
-+++ b/arch/arm/mach-shmobile/setup-r7s72100.c
-@@ -36,9 +36,15 @@ static const struct plat_sci_port scif##index##_platform_data = {	\
- 	.scbrr_algo_id	= SCBRR_ALGO_2,					\
- 	.scscr		= SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |	\
- 			  SCSCR_REIE,					\
--	.mapbase	= baseaddr,					\
--	.irqs		= { irq + 1, irq + 2, irq + 3, irq },		\
--}
-+};									\
-+									\
-+static struct resource scif##index##_resources[] = {			\
-+	DEFINE_RES_MEM(baseaddr, 0x100),				\
-+	DEFINE_RES_IRQ(irq + 1),					\
-+	DEFINE_RES_IRQ(irq + 2),					\
-+	DEFINE_RES_IRQ(irq + 3),					\
-+	DEFINE_RES_IRQ(irq),						\
-+}									\
- 
- R7S72100_SCIF(0, 0xe8007000, gic_iid(221));
- R7S72100_SCIF(1, 0xe8007800, gic_iid(225));
-@@ -50,9 +56,11 @@ R7S72100_SCIF(6, 0xe800a000, gic_iid(245));
- R7S72100_SCIF(7, 0xe800a800, gic_iid(249));
- 
- #define r7s72100_register_scif(index)					       \
--	platform_device_register_data(&platform_bus, "sh-sci", index,	       \
--				      &scif##index##_platform_data,	       \
--				      sizeof(scif##index##_platform_data))
-+	platform_device_register_resndata(&platform_bus, "sh-sci", index,      \
-+					  scif##index##_resources,	       \
-+					  ARRAY_SIZE(scif##index##_resources), \
-+					  &scif##index##_platform_data,	       \
-+					  sizeof(scif##index##_platform_data))
- 
- 
- static struct sh_timer_config mtu2_0_platform_data __initdata = {
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0265-ARM-shmobile-r8a7778-add-support-MMC-driver.patch b/patches.renesas/0265-ARM-shmobile-r8a7778-add-support-MMC-driver.patch
deleted file mode 100644
index 6b44ca82c5327..0000000000000
--- a/patches.renesas/0265-ARM-shmobile-r8a7778-add-support-MMC-driver.patch
+++ /dev/null
@@ -1,64 +0,0 @@
-From f28e09c76620a503c73ce011204006ca090e4290 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Mon, 3 Jun 2013 22:12:22 -0700
-Subject: ARM: shmobile: r8a7778: add support MMC driver
-
-Add a platform device for the r8a7778 MMC.
-
-Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 31b2eaccd60c3480ad81a3302faed463fdc5df12)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/include/mach/r8a7778.h |  2 ++
- arch/arm/mach-shmobile/setup-r8a7778.c        | 13 +++++++++++++
- 2 files changed, 15 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/include/mach/r8a7778.h b/arch/arm/mach-shmobile/include/mach/r8a7778.h
-index 301817ba..851d027a 100644
---- a/arch/arm/mach-shmobile/include/mach/r8a7778.h
-+++ b/arch/arm/mach-shmobile/include/mach/r8a7778.h
-@@ -18,6 +18,7 @@
- #ifndef __ASM_R8A7778_H__
- #define __ASM_R8A7778_H__
- 
-+#include <linux/mmc/sh_mmcif.h>
- #include <linux/mmc/sh_mobile_sdhi.h>
- #include <linux/sh_eth.h>
- #include <linux/platform_data/usb-rcar-phy.h>
-@@ -28,6 +29,7 @@ extern void r8a7778_add_ether_device(struct sh_eth_plat_data *pdata);
- extern void r8a7778_add_usb_phy_device(struct rcar_phy_platform_data *pdata);
- extern void r8a7778_add_i2c_device(int id);
- extern void r8a7778_add_hspi_device(int id);
-+extern void r8a7778_add_mmc_device(struct sh_mmcif_plat_data *info);
- 
- extern void r8a7778_init_late(void);
- extern void r8a7778_init_delay(void);
-diff --git a/arch/arm/mach-shmobile/setup-r8a7778.c b/arch/arm/mach-shmobile/setup-r8a7778.c
-index 3b9bea8b..80c20392 100644
---- a/arch/arm/mach-shmobile/setup-r8a7778.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7778.c
-@@ -319,6 +319,19 @@ void __init r8a7778_add_hspi_device(int id)
- 		hspi_resources + (2 * id), 2);
- }
- 
-+/* MMC */
-+static struct resource mmc_resources[] __initdata = {
-+	DEFINE_RES_MEM(0xffe4e000, 0x100),
-+	DEFINE_RES_IRQ(gic_iid(0x5d)),
-+};
-+
-+void __init r8a7778_add_mmc_device(struct sh_mmcif_plat_data *info)
-+{
-+	platform_device_register_resndata(
-+		&platform_bus, "sh_mmcif", -1,
-+		mmc_resources, ARRAY_SIZE(mmc_resources),
-+		info, sizeof(*info));
-+}
- 
- void __init r8a7778_add_standard_devices(void)
- {
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0266-ARM-shmobile-bockw-defconfig-add-RTC-RX8581-support.patch b/patches.renesas/0266-ARM-shmobile-bockw-defconfig-add-RTC-RX8581-support.patch
deleted file mode 100644
index dc6e7723160a5..0000000000000
--- a/patches.renesas/0266-ARM-shmobile-bockw-defconfig-add-RTC-RX8581-support.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From e689df0e7ea27a4657e3b2755b0b8b5f7a093846 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Tue, 11 Jun 2013 19:14:53 -0700
-Subject: ARM: shmobile: bockw defconfig: add RTC RX8581 support
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 76563bf4ba08beec91102e3790cb5d93fe23f484)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/configs/bockw_defconfig | 2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/arch/arm/configs/bockw_defconfig b/arch/arm/configs/bockw_defconfig
-index d6626086..cb7638d1 100644
---- a/arch/arm/configs/bockw_defconfig
-+++ b/arch/arm/configs/bockw_defconfig
-@@ -86,6 +86,8 @@ CONFIG_USB_STORAGE=y
- CONFIG_USB_RCAR_PHY=y
- CONFIG_MMC=y
- CONFIG_MMC_SDHI=y
-+CONFIG_RTC_CLASS=y
-+CONFIG_RTC_DRV_RX8581=y
- CONFIG_UIO=y
- CONFIG_UIO_PDRV_GENIRQ=y
- # CONFIG_IOMMU_SUPPORT is not set
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0266-ARM-shmobile-r8a73a4-Declare-SCIF-register-base-and-.patch b/patches.renesas/0266-ARM-shmobile-r8a73a4-Declare-SCIF-register-base-and-.patch
deleted file mode 100644
index 05e8bde328b0b..0000000000000
--- a/patches.renesas/0266-ARM-shmobile-r8a73a4-Declare-SCIF-register-base-and-.patch
+++ /dev/null
@@ -1,57 +0,0 @@
-From 6d899fee5b218037b3fb23dfbb91642d58b61bff Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 6 Dec 2013 10:59:33 +0100
-Subject: ARM: shmobile: r8a73a4: Declare SCIF register base and IRQ as
- resources
-
-Passing the register base address and IRQ through platform data is
-deprecated. Use resources instead.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 8826478e1125db9f05f902c5c7105ada164a8358)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-r8a73a4.c | 15 ++++++++++-----
- 1 file changed, 10 insertions(+), 5 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-r8a73a4.c b/arch/arm/mach-shmobile/setup-r8a73a4.c
-index 605298b2ffe5..ef32ce222525 100644
---- a/arch/arm/mach-shmobile/setup-r8a73a4.c
-+++ b/arch/arm/mach-shmobile/setup-r8a73a4.c
-@@ -43,11 +43,14 @@ void __init r8a73a4_pinmux_init(void)
- #define R8A73A4_SCIF(scif_type, _scscr, index, baseaddr, irq)	\
- static struct plat_sci_port scif##index##_platform_data = {	\
- 	.type		= scif_type,				\
--	.mapbase	= baseaddr,				\
- 	.flags		= UPF_BOOT_AUTOCONF | UPF_IOREMAP,	\
- 	.scbrr_algo_id	= SCBRR_ALGO_4,				\
- 	.scscr		= _scscr,				\
--	.irqs		= SCIx_IRQ_MUXED(irq),			\
-+};								\
-+								\
-+static struct resource scif##index##_resources[] = {		\
-+	DEFINE_RES_MEM(baseaddr, 0x100),			\
-+	DEFINE_RES_IRQ(irq),					\
- }
- 
- #define R8A73A4_SCIFA(index, baseaddr, irq)	\
-@@ -66,9 +69,11 @@ R8A73A4_SCIFB(4, 0xe6ce0000, gic_spi(150)); /* SCIFB2 */
- R8A73A4_SCIFB(5, 0xe6cf0000, gic_spi(151)); /* SCIFB3 */
- 
- #define r8a73a4_register_scif(index)					       \
--	platform_device_register_data(&platform_bus, "sh-sci", index,	       \
--				      &scif##index##_platform_data,	       \
--				      sizeof(scif##index##_platform_data))
-+	platform_device_register_resndata(&platform_bus, "sh-sci", index,      \
-+					  scif##index##_resources,	       \
-+					  ARRAY_SIZE(scif##index##_resources), \
-+					  &scif##index##_platform_data,	       \
-+					  sizeof(scif##index##_platform_data))
- 
- static const struct renesas_irqc_config irqc0_data = {
- 	.irq_base = irq_pin(0), /* IRQ0 -> IRQ31 */
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0267-ARM-shmobile-bockw-defconfig-add-M25P80-support.patch b/patches.renesas/0267-ARM-shmobile-bockw-defconfig-add-M25P80-support.patch
deleted file mode 100644
index c4a8ff14081b9..0000000000000
--- a/patches.renesas/0267-ARM-shmobile-bockw-defconfig-add-M25P80-support.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From f2a99a8c7c072ff3a546823871bc5a0fc1ddd5d3 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Tue, 11 Jun 2013 19:16:38 -0700
-Subject: ARM: shmobile: bockw defconfig: add M25P80 support
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 206c0e7a1d15774cb4965e0e7a6a592063085240)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/configs/bockw_defconfig | 8 ++++++++
- 1 file changed, 8 insertions(+)
-
-diff --git a/arch/arm/configs/bockw_defconfig b/arch/arm/configs/bockw_defconfig
-index cb7638d1..55e00ff9 100644
---- a/arch/arm/configs/bockw_defconfig
-+++ b/arch/arm/configs/bockw_defconfig
-@@ -49,6 +49,12 @@ CONFIG_DEVTMPFS_MOUNT=y
- # CONFIG_STANDALONE is not set
- # CONFIG_PREVENT_FIRMWARE_BUILD is not set
- # CONFIG_FW_LOADER is not set
-+CONFIG_MTD=y
-+CONFIG_MTD_CHAR=y
-+CONFIG_MTD_BLOCK=y
-+CONFIG_MTD_CFI=y
-+CONFIG_MTD_CFI_AMDSTD=y
-+CONFIG_MTD_M25P80=y
- CONFIG_SCSI=y
- CONFIG_BLK_DEV_SD=y
- CONFIG_NETDEVICES=y
-@@ -76,6 +82,8 @@ CONFIG_SERIAL_SH_SCI_CONSOLE=y
- # CONFIG_HWMON is not set
- CONFIG_I2C=y
- CONFIG_I2C_RCAR=y
-+CONFIG_SPI=y
-+CONFIG_SPI_SH_HSPI=y
- CONFIG_USB=y
- CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
- CONFIG_USB_EHCI_HCD=y
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0267-ARM-shmobile-r8a7740-Declare-SCIF-register-base-and-.patch b/patches.renesas/0267-ARM-shmobile-r8a7740-Declare-SCIF-register-base-and-.patch
deleted file mode 100644
index 8db38a8e37a15..0000000000000
--- a/patches.renesas/0267-ARM-shmobile-r8a7740-Declare-SCIF-register-base-and-.patch
+++ /dev/null
@@ -1,49 +0,0 @@
-From fb6f6d20d738c17a01df35f2c82f25df12b4ee09 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 6 Dec 2013 10:59:34 +0100
-Subject: ARM: shmobile: r8a7740: Declare SCIF register base and IRQ as
- resources
-
-Passing the register base address and IRQ through platform data is
-deprecated. Use resources instead.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 8bf2f8c5ccd4119b9e4bba6c2db5c93c237a84cb)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-r8a7740.c | 9 +++++++--
- 1 file changed, 7 insertions(+), 2 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-r8a7740.c b/arch/arm/mach-shmobile/setup-r8a7740.c
-index 8778b57ed7d9..81a4366b95f8 100644
---- a/arch/arm/mach-shmobile/setup-r8a7740.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7740.c
-@@ -207,16 +207,21 @@ static struct platform_device irqpin3_device = {
- #define R8A7740_SCIF(scif_type, index, baseaddr, irq)		\
- static struct plat_sci_port scif##index##_platform_data = {	\
- 	.type		= scif_type,				\
--	.mapbase	= baseaddr,				\
- 	.flags		= UPF_BOOT_AUTOCONF,			\
--	.irqs		= SCIx_IRQ_MUXED(irq),			\
- 	.scbrr_algo_id	= SCBRR_ALGO_4,				\
- 	.scscr		= SCSCR_RE | SCSCR_TE,			\
- };								\
- 								\
-+static struct resource scif##index##_resources[] = {		\
-+	DEFINE_RES_MEM(baseaddr, 0x100),			\
-+	DEFINE_RES_IRQ(irq),					\
-+};								\
-+								\
- static struct platform_device scif##index##_device = {		\
- 	.name		= "sh-sci",				\
- 	.id		= index,				\
-+	.resource	= scif##index##_resources,		\
-+	.num_resources	= ARRAY_SIZE(scif##index##_resources),	\
- 	.dev		= {					\
- 		.platform_data	= &scif##index##_platform_data,	\
- 	},							\
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0268-ARM-shmobile-bockw-defconfig-add-MMCIF-support.patch b/patches.renesas/0268-ARM-shmobile-bockw-defconfig-add-MMCIF-support.patch
deleted file mode 100644
index 31a7e62d319b7..0000000000000
--- a/patches.renesas/0268-ARM-shmobile-bockw-defconfig-add-MMCIF-support.patch
+++ /dev/null
@@ -1,28 +0,0 @@
-From 68db5c2c5a08e3725c294184647b49c75ad0d706 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Tue, 11 Jun 2013 19:16:58 -0700
-Subject: ARM: shmobile: bockw defconfig: add MMCIF support
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit d69626d8913ceeacaa2cd369a2487c85f818fef1)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/configs/bockw_defconfig | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/arch/arm/configs/bockw_defconfig b/arch/arm/configs/bockw_defconfig
-index 55e00ff9..845f5cdf 100644
---- a/arch/arm/configs/bockw_defconfig
-+++ b/arch/arm/configs/bockw_defconfig
-@@ -94,6 +94,7 @@ CONFIG_USB_STORAGE=y
- CONFIG_USB_RCAR_PHY=y
- CONFIG_MMC=y
- CONFIG_MMC_SDHI=y
-+CONFIG_MMC_SH_MMCIF=y
- CONFIG_RTC_CLASS=y
- CONFIG_RTC_DRV_RX8581=y
- CONFIG_UIO=y
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0268-ARM-shmobile-r8a7779-Declare-SCIF-register-base-and-.patch b/patches.renesas/0268-ARM-shmobile-r8a7779-Declare-SCIF-register-base-and-.patch
deleted file mode 100644
index 4b0671e972613..0000000000000
--- a/patches.renesas/0268-ARM-shmobile-r8a7779-Declare-SCIF-register-base-and-.patch
+++ /dev/null
@@ -1,49 +0,0 @@
-From c9ad8f867b7b1df486c6e35a8d5e7753fa129461 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 6 Dec 2013 10:59:36 +0100
-Subject: ARM: shmobile: r8a7779: Declare SCIF register base and IRQ as
- resources
-
-Passing the register base address and IRQ through platform data is
-deprecated. Use resources instead.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit aa61ee2ee3bdeee17242bb7357f3edc19d417f41)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-r8a7779.c | 9 +++++++--
- 1 file changed, 7 insertions(+), 2 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c
-index df418f16d82d..85371ee77b63 100644
---- a/arch/arm/mach-shmobile/setup-r8a7779.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7779.c
-@@ -192,16 +192,21 @@ void __init r8a7779_pinmux_init(void)
- #define R8A7779_SCIF(index, baseaddr, irq)			\
- static struct plat_sci_port scif##index##_platform_data = {	\
- 	.type		= PORT_SCIF,				\
--	.mapbase	= baseaddr,				\
- 	.flags		= UPF_BOOT_AUTOCONF | UPF_IOREMAP,	\
--	.irqs		= SCIx_IRQ_MUXED(irq),			\
- 	.scbrr_algo_id	= SCBRR_ALGO_2,				\
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_CKE1,	\
- };								\
- 								\
-+static struct resource scif##index##_resources[] = {		\
-+	DEFINE_RES_MEM(baseaddr, 0x100),			\
-+	DEFINE_RES_IRQ(irq),					\
-+};								\
-+								\
- static struct platform_device scif##index##_device = {		\
- 	.name		= "sh-sci",				\
- 	.id		= index,				\
-+	.resource	= scif##index##_resources,		\
-+	.num_resources	= ARRAY_SIZE(scif##index##_resources),	\
- 	.dev		= {					\
- 		.platform_data	= &scif##index##_platform_data,	\
- 	},							\
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0269-ARM-shmobile-sh7372-Don-t-set-plat_sci_port-scbrr_al.patch b/patches.renesas/0269-ARM-shmobile-sh7372-Don-t-set-plat_sci_port-scbrr_al.patch
deleted file mode 100644
index bad61a5c743b8..0000000000000
--- a/patches.renesas/0269-ARM-shmobile-sh7372-Don-t-set-plat_sci_port-scbrr_al.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From d7b6fcf41a4788b7542c8e84090cf54d9a72332b Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 6 Dec 2013 10:59:39 +0100
-Subject: ARM: shmobile: sh7372: Don't set plat_sci_port scbrr_algo_id field
-
-The field will be removed from the sh-sci driver. Don't set it and let
-the driver handle baud rate calculation internally.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit d910224928058b6632010987dfed5ca72022e4b4)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-sh7372.c | 1 -
- 1 file changed, 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c
-index 798f8acc6195..27301278c208 100644
---- a/arch/arm/mach-shmobile/setup-sh7372.c
-+++ b/arch/arm/mach-shmobile/setup-sh7372.c
-@@ -91,7 +91,6 @@ void __init sh7372_pinmux_init(void)
- static struct plat_sci_port scif##index##_platform_data = {	\
- 	.type		= scif_type,				\
- 	.flags		= UPF_BOOT_AUTOCONF,			\
--	.scbrr_algo_id	= SCBRR_ALGO_4,				\
- 	.scscr		= SCSCR_RE | SCSCR_TE,			\
- };								\
- 								\
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0269-pinctrl-r8a73a4-add-pinmux-data-for-MMCIF-and-SDHI-i.patch b/patches.renesas/0269-pinctrl-r8a73a4-add-pinmux-data-for-MMCIF-and-SDHI-i.patch
deleted file mode 100644
index 99d698f49a2d3..0000000000000
--- a/patches.renesas/0269-pinctrl-r8a73a4-add-pinmux-data-for-MMCIF-and-SDHI-i.patch
+++ /dev/null
@@ -1,272 +0,0 @@
-From 66dadafc21f5b27b045b71c7fe0d3a3e668aff9b Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Tue, 11 Jun 2013 13:37:48 +0200
-Subject: pinctrl: r8a73a4: add pinmux data for MMCIF and SDHI interfaces
-
-This patch adds pinmux groups and functions for the two MMCIF and three
-SDHI interfaces on r8a73a4 (APE6).
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 6e8d1d41bba39e051c9c860efbd83078a94f59a3)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a73a4.c | 198 +++++++++++++++++++++++++++++++++++
- 1 file changed, 198 insertions(+)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a73a4.c b/drivers/pinctrl/sh-pfc/pfc-r8a73a4.c
-index bbff5596..82bf6aba 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a73a4.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a73a4.c
-@@ -1488,6 +1488,66 @@ IRQC_PINS_MUX(326, 54);
- IRQC_PINS_MUX(327, 55);
- IRQC_PINS_MUX(328, 56);
- IRQC_PINS_MUX(329, 57);
-+/* - MMCIF0 ----------------------------------------------------------------- */
-+static const unsigned int mmc0_data1_pins[] = {
-+	/* D[0] */
-+	164,
-+};
-+static const unsigned int mmc0_data1_mux[] = {
-+	MMCD0_0_MARK,
-+};
-+static const unsigned int mmc0_data4_pins[] = {
-+	/* D[0:3] */
-+	164, 165, 166, 167,
-+};
-+static const unsigned int mmc0_data4_mux[] = {
-+	MMCD0_0_MARK, MMCD0_1_MARK, MMCD0_2_MARK, MMCD0_3_MARK,
-+};
-+static const unsigned int mmc0_data8_pins[] = {
-+	/* D[0:7] */
-+	164, 165, 166, 167, 168, 169, 170, 171,
-+};
-+static const unsigned int mmc0_data8_mux[] = {
-+	MMCD0_0_MARK, MMCD0_1_MARK, MMCD0_2_MARK, MMCD0_3_MARK,
-+	MMCD0_4_MARK, MMCD0_5_MARK, MMCD0_6_MARK, MMCD0_7_MARK,
-+};
-+static const unsigned int mmc0_ctrl_pins[] = {
-+	/* CMD, CLK */
-+	172, 173,
-+};
-+static const unsigned int mmc0_ctrl_mux[] = {
-+	MMCCMD0_MARK, MMCCLK0_MARK,
-+};
-+/* - MMCIF1 ----------------------------------------------------------------- */
-+static const unsigned int mmc1_data1_pins[] = {
-+	/* D[0] */
-+	199,
-+};
-+static const unsigned int mmc1_data1_mux[] = {
-+	MMCD1_0_MARK,
-+};
-+static const unsigned int mmc1_data4_pins[] = {
-+	/* D[0:3] */
-+	199, 198, 197, 196,
-+};
-+static const unsigned int mmc1_data4_mux[] = {
-+	MMCD1_0_MARK, MMCD1_1_MARK, MMCD1_2_MARK, MMCD1_3_MARK,
-+};
-+static const unsigned int mmc1_data8_pins[] = {
-+	/* D[0:7] */
-+	199, 198, 197, 196, 195, 194, 193, 192,
-+};
-+static const unsigned int mmc1_data8_mux[] = {
-+	MMCD1_0_MARK, MMCD1_1_MARK, MMCD1_2_MARK, MMCD1_3_MARK,
-+	MMCD1_4_MARK, MMCD1_5_MARK, MMCD1_6_MARK, MMCD1_7_MARK,
-+};
-+static const unsigned int mmc1_ctrl_pins[] = {
-+	/* CMD, CLK */
-+	200, 203,
-+};
-+static const unsigned int mmc1_ctrl_mux[] = {
-+	MMCCMD1_MARK, MMCCLK1_MARK,
-+};
- /* - SCIFA0 ----------------------------------------------------------------- */
- static const unsigned int scifa0_data_pins[] = {
- 	/* SCIFA0_RXD, SCIFA0_TXD */
-@@ -1683,6 +1743,86 @@ static const unsigned int scifb3_ctrl_b_pins[] = {
- static const unsigned int scifb3_ctrl_b_mux[] = {
- 	SCIFB3_RTS_38_MARK, SCIFB3_CTS_39_MARK,
- };
-+/* - SDHI0 ------------------------------------------------------------------ */
-+static const unsigned int sdhi0_data1_pins[] = {
-+	/* D0 */
-+	302,
-+};
-+static const unsigned int sdhi0_data1_mux[] = {
-+	SDHID0_0_MARK,
-+};
-+static const unsigned int sdhi0_data4_pins[] = {
-+	/* D[0:3] */
-+	302, 303, 304, 305,
-+};
-+static const unsigned int sdhi0_data4_mux[] = {
-+	SDHID0_0_MARK, SDHID0_1_MARK, SDHID0_2_MARK, SDHID0_3_MARK,
-+};
-+static const unsigned int sdhi0_ctrl_pins[] = {
-+	/* CLK, CMD */
-+	308, 306,
-+};
-+static const unsigned int sdhi0_ctrl_mux[] = {
-+	SDHICLK0_MARK, SDHICMD0_MARK,
-+};
-+static const unsigned int sdhi0_cd_pins[] = {
-+	/* CD */
-+	301,
-+};
-+static const unsigned int sdhi0_cd_mux[] = {
-+	SDHICD0_MARK,
-+};
-+static const unsigned int sdhi0_wp_pins[] = {
-+	/* WP */
-+	307,
-+};
-+static const unsigned int sdhi0_wp_mux[] = {
-+	SDHIWP0_MARK,
-+};
-+/* - SDHI1 ------------------------------------------------------------------ */
-+static const unsigned int sdhi1_data1_pins[] = {
-+	/* D0 */
-+	289,
-+};
-+static const unsigned int sdhi1_data1_mux[] = {
-+	SDHID1_0_MARK,
-+};
-+static const unsigned int sdhi1_data4_pins[] = {
-+	/* D[0:3] */
-+	289, 290, 291, 292,
-+};
-+static const unsigned int sdhi1_data4_mux[] = {
-+	SDHID1_0_MARK, SDHID1_1_MARK, SDHID1_2_MARK, SDHID1_3_MARK,
-+};
-+static const unsigned int sdhi1_ctrl_pins[] = {
-+	/* CLK, CMD */
-+	293, 294,
-+};
-+static const unsigned int sdhi1_ctrl_mux[] = {
-+	SDHICLK1_MARK, SDHICMD1_MARK,
-+};
-+/* - SDHI2 ------------------------------------------------------------------ */
-+static const unsigned int sdhi2_data1_pins[] = {
-+	/* D0 */
-+	295,
-+};
-+static const unsigned int sdhi2_data1_mux[] = {
-+	SDHID2_0_MARK,
-+};
-+static const unsigned int sdhi2_data4_pins[] = {
-+	/* D[0:3] */
-+	295, 296, 297, 298,
-+};
-+static const unsigned int sdhi2_data4_mux[] = {
-+	SDHID2_0_MARK, SDHID2_1_MARK, SDHID2_2_MARK, SDHID2_3_MARK,
-+};
-+static const unsigned int sdhi2_ctrl_pins[] = {
-+	/* CLK, CMD */
-+	299, 300,
-+};
-+static const unsigned int sdhi2_ctrl_mux[] = {
-+	SDHICLK2_MARK, SDHICMD2_MARK,
-+};
- 
- static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(irqc_irq0),
-@@ -1743,6 +1883,14 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(irqc_irq55),
- 	SH_PFC_PIN_GROUP(irqc_irq56),
- 	SH_PFC_PIN_GROUP(irqc_irq57),
-+	SH_PFC_PIN_GROUP(mmc0_data1),
-+	SH_PFC_PIN_GROUP(mmc0_data4),
-+	SH_PFC_PIN_GROUP(mmc0_data8),
-+	SH_PFC_PIN_GROUP(mmc0_ctrl),
-+	SH_PFC_PIN_GROUP(mmc1_data1),
-+	SH_PFC_PIN_GROUP(mmc1_data4),
-+	SH_PFC_PIN_GROUP(mmc1_data8),
-+	SH_PFC_PIN_GROUP(mmc1_ctrl),
- 	SH_PFC_PIN_GROUP(scifa0_data),
- 	SH_PFC_PIN_GROUP(scifa0_clk),
- 	SH_PFC_PIN_GROUP(scifa0_ctrl),
-@@ -1770,6 +1918,17 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(scifb3_data_b),
- 	SH_PFC_PIN_GROUP(scifb3_clk_b),
- 	SH_PFC_PIN_GROUP(scifb3_ctrl_b),
-+	SH_PFC_PIN_GROUP(sdhi0_data1),
-+	SH_PFC_PIN_GROUP(sdhi0_data4),
-+	SH_PFC_PIN_GROUP(sdhi0_ctrl),
-+	SH_PFC_PIN_GROUP(sdhi0_cd),
-+	SH_PFC_PIN_GROUP(sdhi0_wp),
-+	SH_PFC_PIN_GROUP(sdhi1_data1),
-+	SH_PFC_PIN_GROUP(sdhi1_data4),
-+	SH_PFC_PIN_GROUP(sdhi1_ctrl),
-+	SH_PFC_PIN_GROUP(sdhi2_data1),
-+	SH_PFC_PIN_GROUP(sdhi2_data4),
-+	SH_PFC_PIN_GROUP(sdhi2_ctrl),
- };
- 
- static const char * const irqc_groups[] = {
-@@ -1833,6 +1992,20 @@ static const char * const irqc_groups[] = {
- 	"irqc_irq57",
- };
- 
-+static const char * const mmc0_groups[] = {
-+	"mmc0_data1",
-+	"mmc0_data4",
-+	"mmc0_data8",
-+	"mmc0_ctrl",
-+};
-+
-+static const char * const mmc1_groups[] = {
-+	"mmc1_data1",
-+	"mmc1_data4",
-+	"mmc1_data8",
-+	"mmc1_ctrl",
-+};
-+
- static const char * const scifa0_groups[] = {
- 	"scifa0_data",
- 	"scifa0_clk",
-@@ -1878,14 +2051,39 @@ static const char * const scifb3_groups[] = {
- 	"scifb3_ctrl_b",
- };
- 
-+static const char * const sdhi0_groups[] = {
-+	"sdhi0_data1",
-+	"sdhi0_data4",
-+	"sdhi0_ctrl",
-+	"sdhi0_cd",
-+	"sdhi0_wp",
-+};
-+
-+static const char * const sdhi1_groups[] = {
-+	"sdhi1_data1",
-+	"sdhi1_data4",
-+	"sdhi1_ctrl",
-+};
-+
-+static const char * const sdhi2_groups[] = {
-+	"sdhi2_data1",
-+	"sdhi2_data4",
-+	"sdhi2_ctrl",
-+};
-+
- static const struct sh_pfc_function pinmux_functions[] = {
- 	SH_PFC_FUNCTION(irqc),
-+	SH_PFC_FUNCTION(mmc0),
-+	SH_PFC_FUNCTION(mmc1),
- 	SH_PFC_FUNCTION(scifa0),
- 	SH_PFC_FUNCTION(scifa1),
- 	SH_PFC_FUNCTION(scifb0),
- 	SH_PFC_FUNCTION(scifb1),
- 	SH_PFC_FUNCTION(scifb2),
- 	SH_PFC_FUNCTION(scifb3),
-+	SH_PFC_FUNCTION(sdhi0),
-+	SH_PFC_FUNCTION(sdhi1),
-+	SH_PFC_FUNCTION(sdhi2),
- };
- 
- #undef PORTCR
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0270-ARM-shmobile-r8a7778-Declare-SCIF-register-base-and-.patch b/patches.renesas/0270-ARM-shmobile-r8a7778-Declare-SCIF-register-base-and-.patch
deleted file mode 100644
index 8ec93307434d3..0000000000000
--- a/patches.renesas/0270-ARM-shmobile-r8a7778-Declare-SCIF-register-base-and-.patch
+++ /dev/null
@@ -1,58 +0,0 @@
-From 74e6af1f860c90001efe4eaf171bdce82afdf151 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 6 Dec 2013 10:59:35 +0100
-Subject: ARM: shmobile: r8a7778: Declare SCIF register base and IRQ as
- resources
-
-Passing the register base address and IRQ through platform data is
-deprecated. Use resources instead.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 23399a6ff8e2070e7695fa6c1283212d1d69b372)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-r8a7778.c | 15 ++++++++++-----
- 1 file changed, 10 insertions(+), 5 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-r8a7778.c b/arch/arm/mach-shmobile/setup-r8a7778.c
-index 210c66315dd9..3e583cd79bea 100644
---- a/arch/arm/mach-shmobile/setup-r8a7778.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7778.c
-@@ -46,12 +46,15 @@
- /* SCIF */
- #define R8A7778_SCIF(index, baseaddr, irq)			\
- static struct plat_sci_port scif##index##_platform_data = {	\
--	.mapbase	= baseaddr,				\
- 	.flags		= UPF_BOOT_AUTOCONF | UPF_IOREMAP,	\
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_CKE1,	\
- 	.scbrr_algo_id	= SCBRR_ALGO_2,				\
- 	.type		= PORT_SCIF,				\
--	.irqs		= SCIx_IRQ_MUXED(irq),			\
-+};								\
-+								\
-+static struct resource scif##index##_resources[] = {		\
-+	DEFINE_RES_MEM(baseaddr, 0x100),			\
-+	DEFINE_RES_IRQ(irq),					\
- }
- 
- R8A7778_SCIF(0, 0xffe40000, gic_iid(0x66));
-@@ -62,9 +65,11 @@ R8A7778_SCIF(4, 0xffe44000, gic_iid(0x6a));
- R8A7778_SCIF(5, 0xffe45000, gic_iid(0x6b));
- 
- #define r8a7778_register_scif(index)					       \
--	platform_device_register_data(&platform_bus, "sh-sci", index,	       \
--				      &scif##index##_platform_data,	       \
--				      sizeof(scif##index##_platform_data))
-+	platform_device_register_resndata(&platform_bus, "sh-sci", index,      \
-+					  scif##index##_resources,	       \
-+					  ARRAY_SIZE(scif##index##_resources), \
-+					  &scif##index##_platform_data,	       \
-+					  sizeof(scif##index##_platform_data))
- 
- /* TMU */
- static struct resource sh_tmu0_resources[] __initdata = {
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0270-sh-pfc-r8a7790-add-HSCIF-pin-groups.patch b/patches.renesas/0270-sh-pfc-r8a7790-add-HSCIF-pin-groups.patch
deleted file mode 100644
index 6a715704a7bc6..0000000000000
--- a/patches.renesas/0270-sh-pfc-r8a7790-add-HSCIF-pin-groups.patch
+++ /dev/null
@@ -1,292 +0,0 @@
-From 7ff6edf534e2ff4aea721cef36cc795a96d84434 Mon Sep 17 00:00:00 2001
-From: Ulrich Hecht <ulrich.hecht@gmail.com>
-Date: Fri, 31 May 2013 15:57:03 +0000
-Subject: sh-pfc: r8a7790: add HSCIF pin groups
-
-Adds HSCIF data/clk/ctrl groups to R8A7790 PFC driver.
-
-Signed-off-by: Ulrich Hecht <ulrich.hecht@gmail.com>
-Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit fbd0ca3de1380cf1881e5e92fb8a97ad24171b4c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 211 ++++++++++++++++++++++++++++++++---
- 1 file changed, 196 insertions(+), 15 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-index 85d77a41..1e7a5eb7 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-@@ -1979,6 +1979,141 @@ static const unsigned int scif1_clk_e_pins[] = {
- static const unsigned int scif1_clk_e_mux[] = {
- 	SCK1_E_MARK,
- };
-+/* - HSCIF0 ----------------------------------------------------------------- */
-+static const unsigned int hscif0_data_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(5, 8), RCAR_GP_PIN(5, 9),
-+};
-+static const unsigned int hscif0_data_mux[] = {
-+	HRX0_MARK, HTX0_MARK,
-+};
-+static const unsigned int hscif0_clk_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(5, 7),
-+};
-+static const unsigned int hscif0_clk_mux[] = {
-+	HSCK0_MARK,
-+};
-+static const unsigned int hscif0_ctrl_pins[] = {
-+	/* RTS, CTS */
-+	RCAR_GP_PIN(5, 11), RCAR_GP_PIN(5, 10),
-+};
-+static const unsigned int hscif0_ctrl_mux[] = {
-+	HRTS0_N_MARK, HCTS0_N_MARK,
-+};
-+static const unsigned int hscif0_data_b_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(1, 23), RCAR_GP_PIN(1, 12),
-+};
-+static const unsigned int hscif0_data_b_mux[] = {
-+	HRX0_B_MARK, HTX0_B_MARK,
-+};
-+static const unsigned int hscif0_ctrl_b_pins[] = {
-+	/* RTS, CTS */
-+	RCAR_GP_PIN(1, 29), RCAR_GP_PIN(1, 28),
-+};
-+static const unsigned int hscif0_ctrl_b_mux[] = {
-+	HRTS0_N_B_MARK, HCTS0_N_B_MARK,
-+};
-+static const unsigned int hscif0_data_c_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(5, 13), RCAR_GP_PIN(5, 16),
-+};
-+static const unsigned int hscif0_data_c_mux[] = {
-+	HRX0_C_MARK, HTX0_C_MARK,
-+};
-+static const unsigned int hscif0_ctrl_c_pins[] = {
-+	/* RTS, CTS */
-+	RCAR_GP_PIN(5, 3), RCAR_GP_PIN(5, 7),
-+};
-+static const unsigned int hscif0_ctrl_c_mux[] = {
-+	HRTS0_N_C_MARK, HCTS0_N_C_MARK,
-+};
-+static const unsigned int hscif0_data_d_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(3, 20), RCAR_GP_PIN(3, 21),
-+};
-+static const unsigned int hscif0_data_d_mux[] = {
-+	HRX0_D_MARK, HTX0_D_MARK,
-+};
-+static const unsigned int hscif0_ctrl_d_pins[] = {
-+	/* RTS, CTS */
-+	RCAR_GP_PIN(3, 23), RCAR_GP_PIN(3, 22),
-+};
-+static const unsigned int hscif0_ctrl_d_mux[] = {
-+	HRTS0_N_D_MARK, HCTS0_N_D_MARK,
-+};
-+static const unsigned int hscif0_data_e_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(2, 21), RCAR_GP_PIN(2, 22),
-+};
-+static const unsigned int hscif0_data_e_mux[] = {
-+	HRX0_E_MARK, HTX0_E_MARK,
-+};
-+static const unsigned int hscif0_ctrl_e_pins[] = {
-+	/* RTS, CTS */
-+	RCAR_GP_PIN(2, 24), RCAR_GP_PIN(2, 23),
-+};
-+static const unsigned int hscif0_ctrl_e_mux[] = {
-+	HRTS0_N_E_MARK, HCTS0_N_E_MARK,
-+};
-+static const unsigned int hscif0_data_f_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(2, 23), RCAR_GP_PIN(2, 25),
-+};
-+static const unsigned int hscif0_data_f_mux[] = {
-+	HRX0_F_MARK, HTX0_F_MARK,
-+};
-+static const unsigned int hscif0_ctrl_f_pins[] = {
-+	/* RTS, CTS */
-+	RCAR_GP_PIN(2, 26), RCAR_GP_PIN(2, 24),
-+};
-+static const unsigned int hscif0_ctrl_f_mux[] = {
-+	HRTS0_N_F_MARK, HCTS0_N_F_MARK,
-+};
-+/* - HSCIF1 ----------------------------------------------------------------- */
-+static const unsigned int hscif1_data_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(4, 28), RCAR_GP_PIN(4, 29),
-+};
-+static const unsigned int hscif1_data_mux[] = {
-+	HRX1_MARK, HTX1_MARK,
-+};
-+static const unsigned int hscif1_clk_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(4, 27),
-+};
-+static const unsigned int hscif1_clk_mux[] = {
-+	HSCK1_MARK,
-+};
-+static const unsigned int hscif1_ctrl_pins[] = {
-+	/* RTS, CTS */
-+	RCAR_GP_PIN(4, 31), RCAR_GP_PIN(4, 30),
-+};
-+static const unsigned int hscif1_ctrl_mux[] = {
-+	HRTS1_N_MARK, HCTS1_N_MARK,
-+};
-+static const unsigned int hscif1_data_b_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 18),
-+};
-+static const unsigned int hscif1_data_b_mux[] = {
-+	HRX1_B_MARK, HTX1_B_MARK,
-+};
-+static const unsigned int hscif1_clk_b_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(1, 28),
-+};
-+static const unsigned int hscif1_clk_b_mux[] = {
-+	HSCK1_B_MARK,
-+};
-+static const unsigned int hscif1_ctrl_b_pins[] = {
-+	/* RTS, CTS */
-+	RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 13),
-+};
-+static const unsigned int hscif1_ctrl_b_mux[] = {
-+	HRTS1_N_B_MARK, HCTS1_N_B_MARK,
-+};
- /* - SCIFA0 ----------------------------------------------------------------- */
- static const unsigned int scifa0_data_pins[] = {
- 	/* RXD, TXD */
-@@ -2591,10 +2726,37 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(eth_magic),
- 	SH_PFC_PIN_GROUP(eth_mdio),
- 	SH_PFC_PIN_GROUP(eth_rmii),
-+	SH_PFC_PIN_GROUP(hscif0_data),
-+	SH_PFC_PIN_GROUP(hscif0_clk),
-+	SH_PFC_PIN_GROUP(hscif0_ctrl),
-+	SH_PFC_PIN_GROUP(hscif0_data_b),
-+	SH_PFC_PIN_GROUP(hscif0_ctrl_b),
-+	SH_PFC_PIN_GROUP(hscif0_data_c),
-+	SH_PFC_PIN_GROUP(hscif0_ctrl_c),
-+	SH_PFC_PIN_GROUP(hscif0_data_d),
-+	SH_PFC_PIN_GROUP(hscif0_ctrl_d),
-+	SH_PFC_PIN_GROUP(hscif0_data_e),
-+	SH_PFC_PIN_GROUP(hscif0_ctrl_e),
-+	SH_PFC_PIN_GROUP(hscif0_data_f),
-+	SH_PFC_PIN_GROUP(hscif0_ctrl_f),
-+	SH_PFC_PIN_GROUP(hscif1_data),
-+	SH_PFC_PIN_GROUP(hscif1_clk),
-+	SH_PFC_PIN_GROUP(hscif1_ctrl),
-+	SH_PFC_PIN_GROUP(hscif1_data_b),
-+	SH_PFC_PIN_GROUP(hscif1_clk_b),
-+	SH_PFC_PIN_GROUP(hscif1_ctrl_b),
- 	SH_PFC_PIN_GROUP(intc_irq0),
- 	SH_PFC_PIN_GROUP(intc_irq1),
- 	SH_PFC_PIN_GROUP(intc_irq2),
- 	SH_PFC_PIN_GROUP(intc_irq3),
-+	SH_PFC_PIN_GROUP(mmc0_data1),
-+	SH_PFC_PIN_GROUP(mmc0_data4),
-+	SH_PFC_PIN_GROUP(mmc0_data8),
-+	SH_PFC_PIN_GROUP(mmc0_ctrl),
-+	SH_PFC_PIN_GROUP(mmc1_data1),
-+	SH_PFC_PIN_GROUP(mmc1_data4),
-+	SH_PFC_PIN_GROUP(mmc1_data8),
-+	SH_PFC_PIN_GROUP(mmc1_ctrl),
- 	SH_PFC_PIN_GROUP(scif0_data),
- 	SH_PFC_PIN_GROUP(scif0_clk),
- 	SH_PFC_PIN_GROUP(scif0_ctrl),
-@@ -2659,18 +2821,6 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(scifb2_clk_b),
- 	SH_PFC_PIN_GROUP(scifb2_ctrl_b),
- 	SH_PFC_PIN_GROUP(scifb2_data_c),
--	SH_PFC_PIN_GROUP(tpu0_to0),
--	SH_PFC_PIN_GROUP(tpu0_to1),
--	SH_PFC_PIN_GROUP(tpu0_to2),
--	SH_PFC_PIN_GROUP(tpu0_to3),
--	SH_PFC_PIN_GROUP(mmc0_data1),
--	SH_PFC_PIN_GROUP(mmc0_data4),
--	SH_PFC_PIN_GROUP(mmc0_data8),
--	SH_PFC_PIN_GROUP(mmc0_ctrl),
--	SH_PFC_PIN_GROUP(mmc1_data1),
--	SH_PFC_PIN_GROUP(mmc1_data4),
--	SH_PFC_PIN_GROUP(mmc1_data8),
--	SH_PFC_PIN_GROUP(mmc1_ctrl),
- 	SH_PFC_PIN_GROUP(sdhi0_data1),
- 	SH_PFC_PIN_GROUP(sdhi0_data4),
- 	SH_PFC_PIN_GROUP(sdhi0_ctrl),
-@@ -2691,6 +2841,10 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(sdhi3_ctrl),
- 	SH_PFC_PIN_GROUP(sdhi3_cd),
- 	SH_PFC_PIN_GROUP(sdhi3_wp),
-+	SH_PFC_PIN_GROUP(tpu0_to0),
-+	SH_PFC_PIN_GROUP(tpu0_to1),
-+	SH_PFC_PIN_GROUP(tpu0_to2),
-+	SH_PFC_PIN_GROUP(tpu0_to3),
- };
- 
- static const char * const eth_groups[] = {
-@@ -2726,6 +2880,31 @@ static const char * const scif1_groups[] = {
- 	"scif1_clk_e",
- };
- 
-+static const char * const hscif0_groups[] = {
-+	"hscif0_data",
-+	"hscif0_clk",
-+	"hscif0_ctrl",
-+	"hscif0_data_b",
-+	"hscif0_ctrl_b",
-+	"hscif0_data_c",
-+	"hscif0_ctrl_c",
-+	"hscif0_data_d",
-+	"hscif0_ctrl_d",
-+	"hscif0_data_e",
-+	"hscif0_ctrl_e",
-+	"hscif0_data_f",
-+	"hscif0_ctrl_f",
-+};
-+
-+static const char * const hscif1_groups[] = {
-+	"hscif1_data",
-+	"hscif1_clk",
-+	"hscif1_ctrl",
-+	"hscif1_data_b",
-+	"hscif1_clk_b",
-+	"hscif1_ctrl_b",
-+};
-+
- static const char * const scifa0_groups[] = {
- 	"scifa0_data",
- 	"scifa0_clk",
-@@ -2850,7 +3029,11 @@ static const char * const sdhi3_groups[] = {
- 
- static const struct sh_pfc_function pinmux_functions[] = {
- 	SH_PFC_FUNCTION(eth),
-+	SH_PFC_FUNCTION(hscif0),
-+	SH_PFC_FUNCTION(hscif1),
- 	SH_PFC_FUNCTION(intc),
-+	SH_PFC_FUNCTION(mmc0),
-+	SH_PFC_FUNCTION(mmc1),
- 	SH_PFC_FUNCTION(scif0),
- 	SH_PFC_FUNCTION(scif1),
- 	SH_PFC_FUNCTION(scifa0),
-@@ -2859,13 +3042,11 @@ static const struct sh_pfc_function pinmux_functions[] = {
- 	SH_PFC_FUNCTION(scifb0),
- 	SH_PFC_FUNCTION(scifb1),
- 	SH_PFC_FUNCTION(scifb2),
--	SH_PFC_FUNCTION(tpu0),
--	SH_PFC_FUNCTION(mmc0),
--	SH_PFC_FUNCTION(mmc1),
- 	SH_PFC_FUNCTION(sdhi0),
- 	SH_PFC_FUNCTION(sdhi1),
- 	SH_PFC_FUNCTION(sdhi2),
- 	SH_PFC_FUNCTION(sdhi3),
-+	SH_PFC_FUNCTION(tpu0),
- };
- 
- static struct pinmux_cfg_reg pinmux_config_regs[] = {
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0271-ARM-shmobile-r8a7791-Declare-SCIF-register-base-and-.patch b/patches.renesas/0271-ARM-shmobile-r8a7791-Declare-SCIF-register-base-and-.patch
deleted file mode 100644
index 22743221616bc..0000000000000
--- a/patches.renesas/0271-ARM-shmobile-r8a7791-Declare-SCIF-register-base-and-.patch
+++ /dev/null
@@ -1,57 +0,0 @@
-From 12dd168e69b3b4287ecd4c1d3a362952f6616651 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 6 Dec 2013 10:59:38 +0100
-Subject: ARM: shmobile: r8a7791: Declare SCIF register base and IRQ as
- resources
-
-Passing the register base address and IRQ through platform data is
-deprecated. Use resources instead.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit d95a95a85bb2ebb628f2d1667e7e45ad8fdf0297)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-r8a7791.c | 15 ++++++++++-----
- 1 file changed, 10 insertions(+), 5 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-r8a7791.c b/arch/arm/mach-shmobile/setup-r8a7791.c
-index 3fe0d7de08fc..f15b53786713 100644
---- a/arch/arm/mach-shmobile/setup-r8a7791.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7791.c
-@@ -87,11 +87,14 @@ void __init r8a7791_pinmux_init(void)
- #define __R8A7791_SCIF(scif_type, algo, index, baseaddr, irq)		\
- static struct plat_sci_port scif##index##_platform_data = {		\
- 	.type		= scif_type,					\
--	.mapbase	= baseaddr,					\
- 	.flags		= UPF_BOOT_AUTOCONF | UPF_IOREMAP,		\
- 	.scbrr_algo_id	= algo,						\
- 	.scscr		= SCSCR_RE | SCSCR_TE,				\
--	.irqs		= SCIx_IRQ_MUXED(irq),				\
-+};									\
-+									\
-+static struct resource scif##index##_resources[] = {			\
-+	DEFINE_RES_MEM(baseaddr, 0x100),				\
-+	DEFINE_RES_IRQ(irq),						\
- }
- 
- #define R8A7791_SCIF(index, baseaddr, irq)				\
-@@ -120,9 +123,11 @@ R8A7791_SCIFA(13, 0xe6c78000, gic_spi(30)); /* SCIFA4 */
- R8A7791_SCIFA(14, 0xe6c80000, gic_spi(31)); /* SCIFA5 */
- 
- #define r8a7791_register_scif(index)					       \
--	platform_device_register_data(&platform_bus, "sh-sci", index,	       \
--				      &scif##index##_platform_data,	       \
--				      sizeof(scif##index##_platform_data))
-+	platform_device_register_resndata(&platform_bus, "sh-sci", index,      \
-+					  scif##index##_resources,	       \
-+					  ARRAY_SIZE(scif##index##_resources), \
-+					  &scif##index##_platform_data,	       \
-+					  sizeof(scif##index##_platform_data))
- 
- static const struct sh_timer_config cmt00_platform_data __initconst = {
- 	.name = "CMT00",
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0271-ARM-shmobile-uImage-load-address-rework.patch b/patches.renesas/0271-ARM-shmobile-uImage-load-address-rework.patch
deleted file mode 100644
index e74438f8a9ae1..0000000000000
--- a/patches.renesas/0271-ARM-shmobile-uImage-load-address-rework.patch
+++ /dev/null
@@ -1,57 +0,0 @@
-From 3ffa6a032b75555a10834019e2704a8c3abe420d Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Mon, 10 Jun 2013 18:28:57 +0900
-Subject: ARM: shmobile: uImage load address rework
-
-This is V2 of the mach-shmobile uImage load address rework patch.
-
-Rework the mach-shmobile uImage load address calculation by storing
-the per-board load addresses in Makefile.boot. This removes the
-CONFIG_MEMORY_START dependency from Makefile.boot, and it also makes
-it possible to create safe kernel images that boot on multiple boards.
-
-This is one of several series of code that reworks code not to rely on
-CONFIG_MEMORY_START/SIZE which in turn is needed for ARCH_MULTIPLATFORM.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Reviewed-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 12dca809ef785e451263351325d4806198040b40)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/Makefile.boot | 20 ++++++++++++++++++--
- 1 file changed, 18 insertions(+), 2 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/Makefile.boot b/arch/arm/mach-shmobile/Makefile.boot
-index 498efd99..6b147ea2 100644
---- a/arch/arm/mach-shmobile/Makefile.boot
-+++ b/arch/arm/mach-shmobile/Makefile.boot
-@@ -1,6 +1,22 @@
--__ZRELADDR	:= $(shell /bin/bash -c 'printf "0x%08x" \
--		     $$[$(CONFIG_MEMORY_START) + 0x8000]')
-+# per-board load address for uImage
-+loadaddr-y	:=
-+loadaddr-$(CONFIG_MACH_AG5EVM) += 0x40008000
-+loadaddr-$(CONFIG_MACH_AP4EVB) += 0x40008000
-+loadaddr-$(CONFIG_MACH_APE6EVM) += 0x40008000
-+loadaddr-$(CONFIG_MACH_ARMADILLO800EVA) += 0x40008000
-+loadaddr-$(CONFIG_MACH_ARMADILLO800EVA_REFERENCE) += 0x40008000
-+loadaddr-$(CONFIG_MACH_BOCKW) += 0x60008000
-+loadaddr-$(CONFIG_MACH_BONITO) += 0x40008000
-+loadaddr-$(CONFIG_MACH_KOTA2) += 0x41008000
-+loadaddr-$(CONFIG_MACH_KZM9D) += 0x40008000
-+loadaddr-$(CONFIG_MACH_KZM9G) += 0x41008000
-+loadaddr-$(CONFIG_MACH_KZM9G_REFERENCE) += 0x41008000
-+loadaddr-$(CONFIG_MACH_LAGER) += 0x40008000
-+loadaddr-$(CONFIG_MACH_MACKEREL) += 0x40008000
-+loadaddr-$(CONFIG_MACH_MARZEN) += 0x60008000
-+loadaddr-$(CONFIG_MACH_MARZEN_REFERENCE) += 0x60008000
- 
-+__ZRELADDR	:= $(sort $(loadaddr-y))
-    zreladdr-y   += $(__ZRELADDR)
- 
- # Unsupported legacy stuff
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0272-ARM-shmobile-Let-romImage-rely-on-default-ATAGS.patch b/patches.renesas/0272-ARM-shmobile-Let-romImage-rely-on-default-ATAGS.patch
deleted file mode 100644
index 3a44d64629b64..0000000000000
--- a/patches.renesas/0272-ARM-shmobile-Let-romImage-rely-on-default-ATAGS.patch
+++ /dev/null
@@ -1,54 +0,0 @@
-From e5f6a39d6ab4ca10e5ccd94194e510df02d6d07a Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Wed, 5 Jun 2013 07:55:22 +0000
-Subject: ARM: shmobile: Let romImage rely on default ATAGS
-
-Remove the ATAGS data structure from head-shmobile.S
-since a default ATAGS is already provided by the code
-in arch/arm/kernel/atags_parser.c. Passing a NULL as
-ATAGS is valid. For actual hardware specific setup
-the fixup callback in the board code may be used.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 2a58009599ff0d2bdbe7e3a9a11a0d838868634d)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/compressed/head-shmobile.S | 19 +------------------
- 1 file changed, 1 insertion(+), 18 deletions(-)
-
-diff --git a/arch/arm/boot/compressed/head-shmobile.S b/arch/arm/boot/compressed/head-shmobile.S
-index fe3719b5..19b23044 100644
---- a/arch/arm/boot/compressed/head-shmobile.S
-+++ b/arch/arm/boot/compressed/head-shmobile.S
-@@ -55,26 +55,9 @@ __tmp_stack:
- __continue:
- #endif /* CONFIG_ZBOOT_ROM_MMC || CONFIG_ZBOOT_ROM_SH_MOBILE_SDHI */
- 
--	b	1f
--__atags:@ tag #1
--	.long	12			@ tag->hdr.size = tag_size(tag_core);
--	.long	0x54410001		@ tag->hdr.tag = ATAG_CORE;
--	.long   0			@ tag->u.core.flags = 0;
--	.long	0			@ tag->u.core.pagesize = 0;
--	.long	0			@ tag->u.core.rootdev = 0;
--	@ tag #2
--	.long	8			@ tag->hdr.size = tag_size(tag_mem32);
--	.long	0x54410002		@ tag->hdr.tag = ATAG_MEM;
--	.long	CONFIG_MEMORY_SIZE	@ tag->u.mem.size = CONFIG_MEMORY_SIZE;
--	.long	CONFIG_MEMORY_START	@ @ tag->u.mem.start = CONFIG_MEMORY_START;
--	@ tag #3
--	.long	0			@ tag->hdr.size = 0
--	.long	0			@ tag->hdr.tag = ATAG_NONE;
--1:
--
- 	/* Set board ID necessary for boot */
- 	ldr	r7, 1f				@ Set machine type register
--	adr	r8, __atags			@ Set atag register
-+	mov	r8, #0				@ pass null pointer as atag
- 	b	2f
- 
- 1 :	.long MACH_TYPE
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0272-ARM-shmobile-r8a7790-Declare-SCIF-register-base-and-.patch b/patches.renesas/0272-ARM-shmobile-r8a7790-Declare-SCIF-register-base-and-.patch
deleted file mode 100644
index 8b91d49f07ce2..0000000000000
--- a/patches.renesas/0272-ARM-shmobile-r8a7790-Declare-SCIF-register-base-and-.patch
+++ /dev/null
@@ -1,57 +0,0 @@
-From 705b9c51701a8baa4609e4499dbc5582599516b1 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 1 Nov 2013 01:44:07 +0100
-Subject: ARM: shmobile: r8a7790: Declare SCIF register base and IRQ as
- resources
-
-Passing the register base address and IRQ through platform data is
-deprecated. Use resources instead.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit c0a384f5ed28031315e5f61220982d31d517e672)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-r8a7790.c | 15 ++++++++++-----
- 1 file changed, 10 insertions(+), 5 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c
-index a9bcc56ffe01..c08c761b9506 100644
---- a/arch/arm/mach-shmobile/setup-r8a7790.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7790.c
-@@ -106,11 +106,14 @@ void __init r8a7790_pinmux_init(void)
- #define __R8A7790_SCIF(scif_type, _scscr, algo, index, baseaddr, irq)	\
- static struct plat_sci_port scif##index##_platform_data = {		\
- 	.type		= scif_type,					\
--	.mapbase	= baseaddr,					\
- 	.flags		= UPF_BOOT_AUTOCONF | UPF_IOREMAP,		\
- 	.scbrr_algo_id	= algo,						\
- 	.scscr		= _scscr,					\
--	.irqs		= SCIx_IRQ_MUXED(irq),				\
-+};									\
-+									\
-+static struct resource scif##index##_resources[] = {			\
-+	DEFINE_RES_MEM(baseaddr, 0x100),				\
-+	DEFINE_RES_IRQ(irq),						\
- }
- 
- #define R8A7790_SCIF(index, baseaddr, irq)				\
-@@ -141,9 +144,11 @@ R8A7790_HSCIF(8, 0xe62c0000, gic_spi(154)); /* HSCIF0 */
- R8A7790_HSCIF(9, 0xe62c8000, gic_spi(155)); /* HSCIF1 */
- 
- #define r8a7790_register_scif(index)					       \
--	platform_device_register_data(&platform_bus, "sh-sci", index,	       \
--				      &scif##index##_platform_data,	       \
--				      sizeof(scif##index##_platform_data))
-+	platform_device_register_resndata(&platform_bus, "sh-sci", index,      \
-+					  scif##index##_resources,	       \
-+					  ARRAY_SIZE(scif##index##_resources), \
-+					  &scif##index##_platform_data,	       \
-+					  sizeof(scif##index##_platform_data))
- 
- static const struct renesas_irqc_config irqc0_data __initconst = {
- 	.irq_base = irq_pin(0), /* IRQ0 -> IRQ3 */
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0273-ARM-shmobile-Remove-romImage-CONFIG_MEMORY_START.patch b/patches.renesas/0273-ARM-shmobile-Remove-romImage-CONFIG_MEMORY_START.patch
deleted file mode 100644
index f4eb830014f69..0000000000000
--- a/patches.renesas/0273-ARM-shmobile-Remove-romImage-CONFIG_MEMORY_START.patch
+++ /dev/null
@@ -1,53 +0,0 @@
-From f7975d4974b4843db8f2f8ba93667e88dd20671d Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Wed, 5 Jun 2013 16:55:31 +0900
-Subject: ARM: shmobile: Remove romImage CONFIG_MEMORY_START
-
-Instead of relying on CONFIG_MEMORY_START for memory
-base address, let each romImage board header file
-specify this information.
-
-This is reworks code not to rely on CONFIG_MEMORY_START
-which in turn is needed for ARCH_MULTIPLATFORM.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 4f309d272f7139278f52cf1e2dcf5b2bc8c029d9)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/compressed/head-shmobile.S    | 2 +-
- arch/arm/mach-shmobile/include/mach/zboot.h | 2 ++
- 2 files changed, 3 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/boot/compressed/head-shmobile.S b/arch/arm/boot/compressed/head-shmobile.S
-index 19b23044..e2d63633 100644
---- a/arch/arm/boot/compressed/head-shmobile.S
-+++ b/arch/arm/boot/compressed/head-shmobile.S
-@@ -46,7 +46,7 @@ __image_start:
- __image_end:
- 	.long	_got_end
- __load_base:
--	.long	CONFIG_MEMORY_START + 0x02000000 @ Load at 32Mb into SDRAM
-+	.long	MEMORY_START + 0x02000000 @ Load at 32Mb into SDRAM
- __loaded:
- 	.long	__continue
- 	.align
-diff --git a/arch/arm/mach-shmobile/include/mach/zboot.h b/arch/arm/mach-shmobile/include/mach/zboot.h
-index 9320aff0..308b5cfd 100644
---- a/arch/arm/mach-shmobile/include/mach/zboot.h
-+++ b/arch/arm/mach-shmobile/include/mach/zboot.h
-@@ -12,9 +12,11 @@
- 
- #ifdef CONFIG_MACH_AP4EVB
- #define MACH_TYPE	MACH_TYPE_AP4EVB
-+#define MEMORY_START	0x40000000
- #include "mach/head-ap4evb.txt"
- #elif defined(CONFIG_MACH_MACKEREL)
- #define MACH_TYPE	MACH_TYPE_MACKEREL
-+#define MEMORY_START	0x40000000
- #include "mach/head-mackerel.txt"
- #else
- #error "unsupported board."
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0273-ARM-shmobile-sh73a0-Don-t-set-plat_sci_port-scbrr_al.patch b/patches.renesas/0273-ARM-shmobile-sh73a0-Don-t-set-plat_sci_port-scbrr_al.patch
deleted file mode 100644
index 52d53a6dcd9bc..0000000000000
--- a/patches.renesas/0273-ARM-shmobile-sh73a0-Don-t-set-plat_sci_port-scbrr_al.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From 249168cbcea0b48df8ead3bae1ab53d2a000197e Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 6 Dec 2013 10:59:40 +0100
-Subject: ARM: shmobile: sh73a0: Don't set plat_sci_port scbrr_algo_id field
-
-The field will be removed from the sh-sci driver. Don't set it and let
-the driver handle baud rate calculation internally.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 39be9936c84ebc7408ab7f567e6077d349d62330)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-sh73a0.c | 1 -
- 1 file changed, 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c
-index 55ed98ff087c..f74ab530c71d 100644
---- a/arch/arm/mach-shmobile/setup-sh73a0.c
-+++ b/arch/arm/mach-shmobile/setup-sh73a0.c
-@@ -76,7 +76,6 @@ void __init sh73a0_pinmux_init(void)
- static struct plat_sci_port scif##index##_platform_data = {	\
- 	.type		= scif_type,				\
- 	.flags		= UPF_BOOT_AUTOCONF,			\
--	.scbrr_algo_id	= SCBRR_ALGO_4,				\
- 	.scscr		= SCSCR_RE | SCSCR_TE,			\
- };								\
- 								\
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0274-ARM-shmobile-r7s72100-Don-t-set-plat_sci_port-scbrr_.patch b/patches.renesas/0274-ARM-shmobile-r7s72100-Don-t-set-plat_sci_port-scbrr_.patch
deleted file mode 100644
index b27fbc9c04aa6..0000000000000
--- a/patches.renesas/0274-ARM-shmobile-r7s72100-Don-t-set-plat_sci_port-scbrr_.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From 4c26c5a011ee46569cc9415dc27bf0541f0f42d7 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 6 Dec 2013 10:59:41 +0100
-Subject: ARM: shmobile: r7s72100: Don't set plat_sci_port scbrr_algo_id field
-
-The field will be removed from the sh-sci driver. Don't set it and let
-the driver handle baud rate calculation internally.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 79fb5b4c6fc2222e5cf3899454b8c669a9f5c485)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-r7s72100.c | 1 -
- 1 file changed, 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-r7s72100.c b/arch/arm/mach-shmobile/setup-r7s72100.c
-index 81b995bb1a56..9c0b3a9d5f7a 100644
---- a/arch/arm/mach-shmobile/setup-r7s72100.c
-+++ b/arch/arm/mach-shmobile/setup-r7s72100.c
-@@ -33,7 +33,6 @@ static const struct plat_sci_port scif##index##_platform_data = {	\
- 	.type		= PORT_SCIF,					\
- 	.regtype	= SCIx_SH2_SCIF_FIFODATA_REGTYPE,		\
- 	.flags		= UPF_BOOT_AUTOCONF | UPF_IOREMAP,		\
--	.scbrr_algo_id	= SCBRR_ALGO_2,					\
- 	.scscr		= SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE |	\
- 			  SCSCR_REIE,					\
- };									\
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0274-ARM-shmobile-r8a73a4-add-clock-definitions-and-alias.patch b/patches.renesas/0274-ARM-shmobile-r8a73a4-add-clock-definitions-and-alias.patch
deleted file mode 100644
index e71394169dd44..0000000000000
--- a/patches.renesas/0274-ARM-shmobile-r8a73a4-add-clock-definitions-and-alias.patch
+++ /dev/null
@@ -1,81 +0,0 @@
-From ce39c40bb28931df161c2eec1833e92ea0f666b5 Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Fri, 17 May 2013 16:55:14 +0200
-Subject: ARM: shmobile: r8a73a4: add clock definitions and aliases for MMCIF
- and SDHI
-
-Add MSTP clock definitions and fix aliases for the two MMCIF and three SDHI
-interfaces on r8a73a4 (APE6).
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 111fad56a8e6b0478a5156a82f5f3709150f93a9)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r8a73a4.c | 22 +++++++++++++++++-----
- 1 file changed, 17 insertions(+), 5 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a73a4.c b/arch/arm/mach-shmobile/clock-r8a73a4.c
-index f6227bb1..5f7fe628 100644
---- a/arch/arm/mach-shmobile/clock-r8a73a4.c
-+++ b/arch/arm/mach-shmobile/clock-r8a73a4.c
-@@ -29,6 +29,7 @@
- #define CPG_LEN 0x270
- 
- #define SMSTPCR2 0xe6150138
-+#define SMSTPCR3 0xe615013c
- #define SMSTPCR5 0xe6150144
- 
- #define FRQCRA		0xE6150000
-@@ -348,6 +349,7 @@ static struct clk div6_clks[DIV6_NR] = {
- /* MSTP */
- enum {
- 	MSTP217, MSTP216, MSTP207, MSTP206, MSTP204, MSTP203,
-+	MSTP315, MSTP314, MSTP313, MSTP312, MSTP305,
- 	MSTP522,
- 	MSTP_NR
- };
-@@ -359,6 +361,11 @@ static struct clk mstp_clks[MSTP_NR] = {
- 	[MSTP207] = SH_CLK_MSTP32(&div6_clks[DIV6_MP],	SMSTPCR2, 7, 0), /* SCIFB1 */
- 	[MSTP216] = SH_CLK_MSTP32(&div6_clks[DIV6_MP],	SMSTPCR2, 16, 0), /* SCIFB2 */
- 	[MSTP217] = SH_CLK_MSTP32(&div6_clks[DIV6_MP],	SMSTPCR2, 17, 0), /* SCIFB3 */
-+	[MSTP305] = SH_CLK_MSTP32(&div6_clks[DIV6_MMC1],SMSTPCR3, 5, 0), /* MMCIF1 */
-+	[MSTP312] = SH_CLK_MSTP32(&div6_clks[DIV6_SDHI2],SMSTPCR3, 12, 0), /* SDHI2 */
-+	[MSTP313] = SH_CLK_MSTP32(&div6_clks[DIV6_SDHI1],SMSTPCR3, 13, 0), /* SDHI1 */
-+	[MSTP314] = SH_CLK_MSTP32(&div6_clks[DIV6_SDHI0],SMSTPCR3, 14, 0), /* SDHI0 */
-+	[MSTP315] = SH_CLK_MSTP32(&div6_clks[DIV6_MMC0],SMSTPCR3, 15, 0), /* MMCIF0 */
- 	[MSTP522] = SH_CLK_MSTP32(&extal2_clk, SMSTPCR5, 22, 0), /* Thermal */
- };
- 
-@@ -381,11 +388,6 @@ static struct clk_lookup lookups[] = {
- 
- 	/* DIV6 */
- 	CLKDEV_CON_ID("zb",			&div6_clks[DIV6_ZB]),
--	CLKDEV_CON_ID("sdhi0",			&div6_clks[DIV6_SDHI0]),
--	CLKDEV_CON_ID("sdhi1",			&div6_clks[DIV6_SDHI1]),
--	CLKDEV_CON_ID("sdhi2",			&div6_clks[DIV6_SDHI2]),
--	CLKDEV_CON_ID("mmc0",			&div6_clks[DIV6_MMC0]),
--	CLKDEV_CON_ID("mmc1",			&div6_clks[DIV6_MMC1]),
- 	CLKDEV_CON_ID("vck1",			&div6_clks[DIV6_VCK1]),
- 	CLKDEV_CON_ID("vck2",			&div6_clks[DIV6_VCK2]),
- 	CLKDEV_CON_ID("vck3",			&div6_clks[DIV6_VCK3]),
-@@ -406,6 +408,16 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP216]),
- 	CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP217]),
- 	CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
-+	CLKDEV_DEV_ID("sh_mmcif.1", &mstp_clks[MSTP305]),
-+	CLKDEV_DEV_ID("ee220000.mmcif", &mstp_clks[MSTP305]),
-+	CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP312]),
-+	CLKDEV_DEV_ID("ee140000.sdhi", &mstp_clks[MSTP312]),
-+	CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]),
-+	CLKDEV_DEV_ID("ee120000.sdhi", &mstp_clks[MSTP313]),
-+	CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]),
-+	CLKDEV_DEV_ID("ee100000.sdhi", &mstp_clks[MSTP314]),
-+	CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP315]),
-+	CLKDEV_DEV_ID("ee200000.mmcif", &mstp_clks[MSTP315]),
- 
- 	/* for DT */
- 	CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]),
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0275-ARM-shmobile-r8a7778-Don-t-set-plat_sci_port-scbrr_a.patch b/patches.renesas/0275-ARM-shmobile-r8a7778-Don-t-set-plat_sci_port-scbrr_a.patch
deleted file mode 100644
index b4d5fa9e4f5e5..0000000000000
--- a/patches.renesas/0275-ARM-shmobile-r8a7778-Don-t-set-plat_sci_port-scbrr_a.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From 8943c69fd86370da5849af34679334aacaf715c8 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 6 Dec 2013 10:59:44 +0100
-Subject: ARM: shmobile: r8a7778: Don't set plat_sci_port scbrr_algo_id field
-
-The field will be removed from the sh-sci driver. Don't set it and let
-the driver handle baud rate calculation internally.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 938ed60f7a0698a27f40369f3f89e0f07f570959)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-r8a7778.c | 1 -
- 1 file changed, 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-r8a7778.c b/arch/arm/mach-shmobile/setup-r8a7778.c
-index 3e583cd79bea..6d694526e4ca 100644
---- a/arch/arm/mach-shmobile/setup-r8a7778.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7778.c
-@@ -48,7 +48,6 @@
- static struct plat_sci_port scif##index##_platform_data = {	\
- 	.flags		= UPF_BOOT_AUTOCONF | UPF_IOREMAP,	\
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_CKE1,	\
--	.scbrr_algo_id	= SCBRR_ALGO_2,				\
- 	.type		= PORT_SCIF,				\
- };								\
- 								\
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0275-ARM-shmobile-r8a7790-add-clock-definitions-and-alias.patch b/patches.renesas/0275-ARM-shmobile-r8a7790-add-clock-definitions-and-alias.patch
deleted file mode 100644
index 886ce6ae8a408..0000000000000
--- a/patches.renesas/0275-ARM-shmobile-r8a7790-add-clock-definitions-and-alias.patch
+++ /dev/null
@@ -1,82 +0,0 @@
-From 7d039a5c0a9ec6094a5371f29bf23ee5a4cac1b4 Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Fri, 17 May 2013 16:55:15 +0200
-Subject: ARM: shmobile: r8a7790: add clock definitions and aliases for MMCIF
- and SDHI
-
-Add MSTP clock definitions and fix aliases for the two MMCIF and four SDHI
-interfaces on r8a7790 (H2).
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-[horms+renesas@verge.net.au: applied manually]
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-(cherry picked from commit 018222f5d32bc5ca9fd830aebfeed10f1be96c93)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r8a7790.c | 26 +++++++++++++++++++-------
- 1 file changed, 19 insertions(+), 7 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
-index 379bce69..5d71313d 100644
---- a/arch/arm/mach-shmobile/clock-r8a7790.c
-+++ b/arch/arm/mach-shmobile/clock-r8a7790.c
-@@ -182,7 +182,7 @@ static struct clk div6_clks[DIV6_NR] = {
- enum {
- 	MSTP721, MSTP720,
- 	MSTP717, MSTP716,
--	MSTP304,
-+	MSTP315, MSTP314, MSTP313, MSTP312, MSTP311, MSTP305, MSTP304,
- 	MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202,
- 	MSTP_NR
- };
-@@ -190,6 +190,12 @@ enum {
- static struct clk mstp_clks[MSTP_NR] = {
- 	[MSTP721] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 21, 0), /* SCIF0 */
- 	[MSTP720] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 20, 0), /* SCIF1 */
-+	[MSTP315] = SH_CLK_MSTP32(&div6_clks[DIV6_MMC0], SMSTPCR3, 15, 0), /* MMC0 */
-+	[MSTP314] = SH_CLK_MSTP32(&div4_clks[DIV4_SD0], SMSTPCR3, 14, 0), /* SDHI0 */
-+	[MSTP313] = SH_CLK_MSTP32(&div4_clks[DIV4_SD1], SMSTPCR3, 13, 0), /* SDHI1 */
-+	[MSTP312] = SH_CLK_MSTP32(&div6_clks[DIV6_SD2], SMSTPCR3, 12, 0), /* SDHI2 */
-+	[MSTP311] = SH_CLK_MSTP32(&div6_clks[DIV6_SD3], SMSTPCR3, 11, 0), /* SDHI3 */
-+	[MSTP305] = SH_CLK_MSTP32(&div6_clks[DIV6_MMC1], SMSTPCR3, 5, 0), /* MMC1 */
- 	[MSTP304] = SH_CLK_MSTP32(&cp_clk, SMSTPCR3, 4, 0), /* TPU0 */
- 	[MSTP216] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 16, 0), /* SCIFB2 */
- 	[MSTP207] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 7, 0), /* SCIFB1 */
-@@ -232,14 +238,8 @@ static struct clk_lookup lookups[] = {
- 
- 	/* DIV4 */
- 	CLKDEV_CON_ID("sdh",		&div4_clks[DIV4_SDH]),
--	CLKDEV_CON_ID("sd0",		&div4_clks[DIV4_SD0]),
--	CLKDEV_CON_ID("sd1",		&div4_clks[DIV4_SD1]),
- 
- 	/* DIV6 */
--	CLKDEV_CON_ID("sd2",		&div6_clks[DIV6_SD2]),
--	CLKDEV_CON_ID("sd3",		&div6_clks[DIV6_SD3]),
--	CLKDEV_CON_ID("mmc0",		&div6_clks[DIV6_MMC0]),
--	CLKDEV_CON_ID("mmc1",		&div6_clks[DIV6_MMC1]),
- 	CLKDEV_CON_ID("ssp",		&div6_clks[DIV6_SSP]),
- 	CLKDEV_CON_ID("ssprs",		&div6_clks[DIV6_SSPRS]),
- 
-@@ -254,6 +254,18 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP720]),
- 	CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP717]),
- 	CLKDEV_DEV_ID("sh-sci.9", &mstp_clks[MSTP716]),
-+	CLKDEV_DEV_ID("ee200000.mmcif", &mstp_clks[MSTP315]),
-+	CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP315]),
-+	CLKDEV_DEV_ID("ee100000.sdhi", &mstp_clks[MSTP314]),
-+	CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]),
-+	CLKDEV_DEV_ID("ee120000.sdhi", &mstp_clks[MSTP313]),
-+	CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]),
-+	CLKDEV_DEV_ID("ee140000.sdhi", &mstp_clks[MSTP312]),
-+	CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP312]),
-+	CLKDEV_DEV_ID("ee160000.sdhi", &mstp_clks[MSTP311]),
-+	CLKDEV_DEV_ID("sh_mobile_sdhi.3", &mstp_clks[MSTP311]),
-+	CLKDEV_DEV_ID("ee220000.mmcif", &mstp_clks[MSTP305]),
-+	CLKDEV_DEV_ID("sh_mmcif.1", &mstp_clks[MSTP305]),
- };
- 
- #define R8A7790_CLOCK_ROOT(e, m, p0, p1, p30, p31)		\
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0276-ARM-shmobile-BOCK-W-add-Ether-support.patch b/patches.renesas/0276-ARM-shmobile-BOCK-W-add-Ether-support.patch
deleted file mode 100644
index b20cd6f0c0c88..0000000000000
--- a/patches.renesas/0276-ARM-shmobile-BOCK-W-add-Ether-support.patch
+++ /dev/null
@@ -1,64 +0,0 @@
-From 983c8cb217db342c8a2a4fac3bf266baf29baced Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Sun, 2 Jun 2013 02:40:55 +0400
-Subject: ARM: shmobile: BOCK-W: add Ether support
-
-Register Ether device from bockw_init(), passing the platform data to it, adding
-only the RMII pin group to bockw_pinctrl_map[].  Although the LINK signal exists
-on the board, it's connected to the link/activity LED  output of the PHY, thus
-the link disappears and reappears after each packet. We'd be better off ignoring
-such signal and getting the link state from the PHY indirectly.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-[horms+renesas@verge.net.au: manually applied]
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-(cherry picked from commit 9aa3853a6f6652901f7ae42ed6bfd85a11bdc795)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-	arch/arm/mach-shmobile/board-bockw.c
----
- arch/arm/mach-shmobile/board-bockw.c | 18 ++++++++++++++++++
- 1 file changed, 18 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/board-bockw.c b/arch/arm/mach-shmobile/board-bockw.c
-index f6ca2ae2..ce0fa38e 100644
---- a/arch/arm/mach-shmobile/board-bockw.c
-+++ b/arch/arm/mach-shmobile/board-bockw.c
-@@ -65,7 +65,24 @@ static struct sh_mobile_sdhi_info sdhi0_info = {
- 	.tmio_flags	= TMIO_MMC_HAS_IDLE_WAIT,
- };
- 
-+static struct sh_eth_plat_data ether_platform_data __initdata = {
-+	.phy		= 0x01,
-+	.edmac_endian	= EDMAC_LITTLE_ENDIAN,
-+	.register_type	= SH_ETH_REG_FAST_RCAR,
-+	.phy_interface	= PHY_INTERFACE_MODE_RMII,
-+	/*
-+	 * Although the LINK signal is available on the board, it's connected to
-+	 * the link/activity LED output of the PHY, thus the link disappears and
-+	 * reappears after each packet.  We'd be better off ignoring such signal
-+	 * and getting the link state from the PHY indirectly.
-+	 */
-+	.no_ether_link	= 1,
-+};
-+
- static const struct pinctrl_map bockw_pinctrl_map[] = {
-+	/* Ether */
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7778",
-+				  "ether_rmii", "ether"),
- 	/* SCIF0 */
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
- 				  "scif0_data_a", "scif0"),
-@@ -92,6 +109,7 @@ static void __init bockw_init(void)
- 	r8a7778_init_irq_extpin(1);
- 	r8a7778_add_standard_devices();
- 	r8a7778_add_usb_phy_device(&usb_phy_platform_data);
-+	r8a7778_add_ether_device(&ether_platform_data);
- 
- 	pinctrl_register_mappings(bockw_pinctrl_map,
- 				  ARRAY_SIZE(bockw_pinctrl_map));
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0276-ARM-shmobile-r8a73a4-Don-t-set-plat_sci_port-scbrr_a.patch b/patches.renesas/0276-ARM-shmobile-r8a73a4-Don-t-set-plat_sci_port-scbrr_a.patch
deleted file mode 100644
index 55894312e6dea..0000000000000
--- a/patches.renesas/0276-ARM-shmobile-r8a73a4-Don-t-set-plat_sci_port-scbrr_a.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From 0440580e65277a815f5f416115d8b792bb69a045 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 6 Dec 2013 10:59:42 +0100
-Subject: ARM: shmobile: r8a73a4: Don't set plat_sci_port scbrr_algo_id field
-
-The field will be removed from the sh-sci driver. Don't set it and let
-the driver handle baud rate calculation internally.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 720938a10519cc2511199d4eab7e885f214c10f6)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-r8a73a4.c | 1 -
- 1 file changed, 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-r8a73a4.c b/arch/arm/mach-shmobile/setup-r8a73a4.c
-index ef32ce222525..cd36f8078325 100644
---- a/arch/arm/mach-shmobile/setup-r8a73a4.c
-+++ b/arch/arm/mach-shmobile/setup-r8a73a4.c
-@@ -44,7 +44,6 @@ void __init r8a73a4_pinmux_init(void)
- static struct plat_sci_port scif##index##_platform_data = {	\
- 	.type		= scif_type,				\
- 	.flags		= UPF_BOOT_AUTOCONF | UPF_IOREMAP,	\
--	.scbrr_algo_id	= SCBRR_ALGO_4,				\
- 	.scscr		= _scscr,				\
- };								\
- 								\
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0277-ARM-shmobile-bockw-add-I2C-device-support.patch b/patches.renesas/0277-ARM-shmobile-bockw-add-I2C-device-support.patch
deleted file mode 100644
index 07671b34d7635..0000000000000
--- a/patches.renesas/0277-ARM-shmobile-bockw-add-I2C-device-support.patch
+++ /dev/null
@@ -1,48 +0,0 @@
-From f9cae32696beeb1f7df8d068239cdc74b9426053 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Tue, 11 Jun 2013 19:11:17 -0700
-Subject: ARM: shmobile: bockw: add I2C device support
-
-This patch enables rx8581 on I2C0
-
-Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit ed17be92c00fde00b2431b31828736f8572d7ba7)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-bockw.c | 10 ++++++++++
- 1 file changed, 10 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/board-bockw.c b/arch/arm/mach-shmobile/board-bockw.c
-index ce0fa38e..e1a988c4 100644
---- a/arch/arm/mach-shmobile/board-bockw.c
-+++ b/arch/arm/mach-shmobile/board-bockw.c
-@@ -79,6 +79,13 @@ static struct sh_eth_plat_data ether_platform_data __initdata = {
- 	.no_ether_link	= 1,
- };
- 
-+/* I2C */
-+static struct i2c_board_info i2c0_devices[] = {
-+	{
-+		I2C_BOARD_INFO("rx8581", 0x51),
-+	},
-+};
-+
- static const struct pinctrl_map bockw_pinctrl_map[] = {
- 	/* Ether */
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7778",
-@@ -110,7 +117,10 @@ static void __init bockw_init(void)
- 	r8a7778_add_standard_devices();
- 	r8a7778_add_usb_phy_device(&usb_phy_platform_data);
- 	r8a7778_add_ether_device(&ether_platform_data);
-+	r8a7778_add_i2c_device(0);
- 
-+	i2c_register_board_info(0, i2c0_devices,
-+				ARRAY_SIZE(i2c0_devices));
- 	pinctrl_register_mappings(bockw_pinctrl_map,
- 				  ARRAY_SIZE(bockw_pinctrl_map));
- 	r8a7778_pinmux_init();
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0277-ARM-shmobile-r8a7740-Don-t-set-plat_sci_port-scbrr_a.patch b/patches.renesas/0277-ARM-shmobile-r8a7740-Don-t-set-plat_sci_port-scbrr_a.patch
deleted file mode 100644
index 85769cd3d0b46..0000000000000
--- a/patches.renesas/0277-ARM-shmobile-r8a7740-Don-t-set-plat_sci_port-scbrr_a.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From 7059a9a1da4bc92a526eac2940edc8ed44c856af Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 6 Dec 2013 10:59:43 +0100
-Subject: ARM: shmobile: r8a7740: Don't set plat_sci_port scbrr_algo_id field
-
-The field will be removed from the sh-sci driver. Don't set it and let
-the driver handle baud rate calculation internally.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 52613951a600207df9d75185b677d91bbde44a9e)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-r8a7740.c | 1 -
- 1 file changed, 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-r8a7740.c b/arch/arm/mach-shmobile/setup-r8a7740.c
-index 81a4366b95f8..8f3c68101d59 100644
---- a/arch/arm/mach-shmobile/setup-r8a7740.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7740.c
-@@ -208,7 +208,6 @@ static struct platform_device irqpin3_device = {
- static struct plat_sci_port scif##index##_platform_data = {	\
- 	.type		= scif_type,				\
- 	.flags		= UPF_BOOT_AUTOCONF,			\
--	.scbrr_algo_id	= SCBRR_ALGO_4,				\
- 	.scscr		= SCSCR_RE | SCSCR_TE,			\
- };								\
- 								\
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0278-ARM-shmobile-bockw-add-SPI-FLASH-support.patch b/patches.renesas/0278-ARM-shmobile-bockw-add-SPI-FLASH-support.patch
deleted file mode 100644
index ff0202522c428..0000000000000
--- a/patches.renesas/0278-ARM-shmobile-bockw-add-SPI-FLASH-support.patch
+++ /dev/null
@@ -1,92 +0,0 @@
-From 4e13b5b91f019b4b592a99a1e12a18b65749b7a7 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Tue, 11 Jun 2013 19:11:41 -0700
-Subject: ARM: shmobile: bockw: add SPI FLASH support
-
-This patch enables Spansion S25FL008K chip on HSPI0
-
-Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit c06a164ce2f0f8791ac566a44eaf1d227a5b6b5b)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-bockw.c | 36 ++++++++++++++++++++++++++++++++++++
- 1 file changed, 36 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/board-bockw.c b/arch/arm/mach-shmobile/board-bockw.c
-index e1a988c4..d203b3eb 100644
---- a/arch/arm/mach-shmobile/board-bockw.c
-+++ b/arch/arm/mach-shmobile/board-bockw.c
-@@ -20,11 +20,14 @@
- 
- #include <linux/mfd/tmio.h>
- #include <linux/mmc/host.h>
-+#include <linux/mtd/partitions.h>
- #include <linux/pinctrl/machine.h>
- #include <linux/platform_device.h>
- #include <linux/regulator/fixed.h>
- #include <linux/regulator/machine.h>
- #include <linux/smsc911x.h>
-+#include <linux/spi/spi.h>
-+#include <linux/spi/flash.h>
- #include <mach/common.h>
- #include <mach/irqs.h>
- #include <mach/r8a7778.h>
-@@ -86,10 +89,40 @@ static struct i2c_board_info i2c0_devices[] = {
- 	},
- };
- 
-+/* HSPI*/
-+static struct mtd_partition m25p80_spi_flash_partitions[] = {
-+	{
-+		.name	= "data(spi)",
-+		.size	= 0x0100000,
-+		.offset	= 0,
-+	},
-+};
-+
-+static struct flash_platform_data spi_flash_data = {
-+	.name		= "m25p80",
-+	.type		= "s25fl008k",
-+	.parts		= m25p80_spi_flash_partitions,
-+	.nr_parts	= ARRAY_SIZE(m25p80_spi_flash_partitions),
-+};
-+
-+static struct spi_board_info spi_board_info[] __initdata = {
-+	{
-+		.modalias	= "m25p80",
-+		.max_speed_hz	= 104000000,
-+		.chip_select	= 0,
-+		.bus_num	= 0,
-+		.mode		= SPI_MODE_0,
-+		.platform_data	= &spi_flash_data,
-+	},
-+};
-+
- static const struct pinctrl_map bockw_pinctrl_map[] = {
- 	/* Ether */
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7778",
- 				  "ether_rmii", "ether"),
-+	/* HSPI0 */
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh-hspi.0", "pfc-r8a7778",
-+				  "hspi0_a", "hspi0"),
- 	/* SCIF0 */
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
- 				  "scif0_data_a", "scif0"),
-@@ -118,9 +151,12 @@ static void __init bockw_init(void)
- 	r8a7778_add_usb_phy_device(&usb_phy_platform_data);
- 	r8a7778_add_ether_device(&ether_platform_data);
- 	r8a7778_add_i2c_device(0);
-+	r8a7778_add_hspi_device(0);
- 
- 	i2c_register_board_info(0, i2c0_devices,
- 				ARRAY_SIZE(i2c0_devices));
-+	spi_register_board_info(spi_board_info,
-+				ARRAY_SIZE(spi_board_info));
- 	pinctrl_register_mappings(bockw_pinctrl_map,
- 				  ARRAY_SIZE(bockw_pinctrl_map));
- 	r8a7778_pinmux_init();
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0278-ARM-shmobile-r8a7790-Don-t-set-plat_sci_port-scbrr_a.patch b/patches.renesas/0278-ARM-shmobile-r8a7790-Don-t-set-plat_sci_port-scbrr_a.patch
deleted file mode 100644
index b4d46c2835a3b..0000000000000
--- a/patches.renesas/0278-ARM-shmobile-r8a7790-Don-t-set-plat_sci_port-scbrr_a.patch
+++ /dev/null
@@ -1,61 +0,0 @@
-From 7cfa2a6ae099d834c2fde2268a8a7d2953e02e6a Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 6 Dec 2013 10:59:46 +0100
-Subject: ARM: shmobile: r8a7790: Don't set plat_sci_port scbrr_algo_id field
-
-The field will be removed from the sh-sci driver. Don't set it and let
-the driver handle baud rate calculation internally.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 6319ea5089a267b3a1cbd1d745ecc7cdae9a0a7e)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-r8a7790.c | 11 +++++------
- 1 file changed, 5 insertions(+), 6 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c
-index c08c761b9506..7800cec79652 100644
---- a/arch/arm/mach-shmobile/setup-r8a7790.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7790.c
-@@ -103,11 +103,10 @@ void __init r8a7790_pinmux_init(void)
- 	r8a7790_register_i2c(3);
- }
- 
--#define __R8A7790_SCIF(scif_type, _scscr, algo, index, baseaddr, irq)	\
-+#define __R8A7790_SCIF(scif_type, _scscr, index, baseaddr, irq)		\
- static struct plat_sci_port scif##index##_platform_data = {		\
- 	.type		= scif_type,					\
- 	.flags		= UPF_BOOT_AUTOCONF | UPF_IOREMAP,		\
--	.scbrr_algo_id	= algo,						\
- 	.scscr		= _scscr,					\
- };									\
- 									\
-@@ -118,19 +117,19 @@ static struct resource scif##index##_resources[] = {			\
- 
- #define R8A7790_SCIF(index, baseaddr, irq)				\
- 	__R8A7790_SCIF(PORT_SCIF, SCSCR_RE | SCSCR_TE,			\
--		       SCBRR_ALGO_2, index, baseaddr, irq)
-+		       index, baseaddr, irq)
- 
- #define R8A7790_SCIFA(index, baseaddr, irq)				\
- 	__R8A7790_SCIF(PORT_SCIFA, SCSCR_RE | SCSCR_TE | SCSCR_CKE0,	\
--		       SCBRR_ALGO_4, index, baseaddr, irq)
-+		       index, baseaddr, irq)
- 
- #define R8A7790_SCIFB(index, baseaddr, irq)				\
- 	__R8A7790_SCIF(PORT_SCIFB, SCSCR_RE | SCSCR_TE,			\
--		       SCBRR_ALGO_4, index, baseaddr, irq)
-+		       index, baseaddr, irq)
- 
- #define R8A7790_HSCIF(index, baseaddr, irq)				\
- 	__R8A7790_SCIF(PORT_HSCIF, SCSCR_RE | SCSCR_TE,			\
--		       SCBRR_ALGO_6, index, baseaddr, irq)
-+		       index, baseaddr, irq)
- 
- R8A7790_SCIFA(0, 0xe6c40000, gic_spi(144)); /* SCIFA0 */
- R8A7790_SCIFA(1, 0xe6c50000, gic_spi(145)); /* SCIFA1 */
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0279-ARM-shmobile-bockw-add-MMCIF-support.patch b/patches.renesas/0279-ARM-shmobile-bockw-add-MMCIF-support.patch
deleted file mode 100644
index b29a7098cc5e3..0000000000000
--- a/patches.renesas/0279-ARM-shmobile-bockw-add-MMCIF-support.patch
+++ /dev/null
@@ -1,83 +0,0 @@
-From 97cff3a9ba3329071f0f59ad8a58e02d31362d8f Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Tue, 11 Jun 2013 19:12:06 -0700
-Subject: ARM: shmobile: bockw: add MMCIF support
-
-This patch enables CN26 MMCIF
-
-Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 1e0edb76e925927d396be60e22f9c5ab815f2ab0)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-bockw.c | 32 ++++++++++++++++++++++++++++++++
- 1 file changed, 32 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/board-bockw.c b/arch/arm/mach-shmobile/board-bockw.c
-index d203b3eb..394186c7 100644
---- a/arch/arm/mach-shmobile/board-bockw.c
-+++ b/arch/arm/mach-shmobile/board-bockw.c
-@@ -41,6 +41,23 @@
-  * SW41		SCIF	RCAN
-  */
- 
-+/*
-+ * MMC (CN26) pin
-+ *
-+ * SW6	(D2)	3 pin
-+ * SW7	(D5)	ON
-+ * SW8	(D3)	3 pin
-+ * SW10	(D4)	1 pin
-+ * SW12	(CLK)	1 pin
-+ * SW13	(D6)	3 pin
-+ * SW14	(CMD)	ON
-+ * SW15	(D6)	1 pin
-+ * SW16	(D0)	ON
-+ * SW17	(D1)	ON
-+ * SW18	(D7)	3 pin
-+ * SW19	(MMC)	1 pin
-+ */
-+
- /* Dummy supplies, where voltage doesn't matter */
- static struct regulator_consumer_supply dummy_supplies[] = {
- 	REGULATOR_SUPPLY("vddvario", "smsc911x"),
-@@ -116,6 +133,15 @@ static struct spi_board_info spi_board_info[] __initdata = {
- 	},
- };
- 
-+/* MMC */
-+static struct sh_mmcif_plat_data sh_mmcif_plat = {
-+	.sup_pclk	= 0,
-+	.ocr		= MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
-+	.caps		= MMC_CAP_4_BIT_DATA |
-+			  MMC_CAP_8_BIT_DATA |
-+			  MMC_CAP_NEEDS_POLL,
-+};
-+
- static const struct pinctrl_map bockw_pinctrl_map[] = {
- 	/* Ether */
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7778",
-@@ -123,6 +149,11 @@ static const struct pinctrl_map bockw_pinctrl_map[] = {
- 	/* HSPI0 */
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh-hspi.0", "pfc-r8a7778",
- 				  "hspi0_a", "hspi0"),
-+	/* MMC */
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif", "pfc-r8a7778",
-+				  "mmc_data8", "mmc"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif", "pfc-r8a7778",
-+				  "mmc_ctrl", "mmc"),
- 	/* SCIF0 */
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
- 				  "scif0_data_a", "scif0"),
-@@ -152,6 +183,7 @@ static void __init bockw_init(void)
- 	r8a7778_add_ether_device(&ether_platform_data);
- 	r8a7778_add_i2c_device(0);
- 	r8a7778_add_hspi_device(0);
-+	r8a7778_add_mmc_device(&sh_mmcif_plat);
- 
- 	i2c_register_board_info(0, i2c0_devices,
- 				ARRAY_SIZE(i2c0_devices));
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0279-ARM-shmobile-r8a7779-Don-t-set-plat_sci_port-scbrr_a.patch b/patches.renesas/0279-ARM-shmobile-r8a7779-Don-t-set-plat_sci_port-scbrr_a.patch
deleted file mode 100644
index dc63da69edd33..0000000000000
--- a/patches.renesas/0279-ARM-shmobile-r8a7779-Don-t-set-plat_sci_port-scbrr_a.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From e3bcdb325798afd4c72fe2dea278a1c89be16356 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 6 Dec 2013 10:59:45 +0100
-Subject: ARM: shmobile: r8a7779: Don't set plat_sci_port scbrr_algo_id field
-
-The field will be removed from the sh-sci driver. Don't set it and let
-the driver handle baud rate calculation internally.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 0bb075cea8b527a1f33d965f6c891cea9261e9bf)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-r8a7779.c | 1 -
- 1 file changed, 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c
-index 85371ee77b63..8e860b36997a 100644
---- a/arch/arm/mach-shmobile/setup-r8a7779.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7779.c
-@@ -193,7 +193,6 @@ void __init r8a7779_pinmux_init(void)
- static struct plat_sci_port scif##index##_platform_data = {	\
- 	.type		= PORT_SCIF,				\
- 	.flags		= UPF_BOOT_AUTOCONF | UPF_IOREMAP,	\
--	.scbrr_algo_id	= SCBRR_ALGO_2,				\
- 	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_CKE1,	\
- };								\
- 								\
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0280-ARM-shmobile-r8a7790-add-__initdata-on-resource-and-.patch b/patches.renesas/0280-ARM-shmobile-r8a7790-add-__initdata-on-resource-and-.patch
deleted file mode 100644
index 487519b877b6e..0000000000000
--- a/patches.renesas/0280-ARM-shmobile-r8a7790-add-__initdata-on-resource-and-.patch
+++ /dev/null
@@ -1,69 +0,0 @@
-From aa390bb0217548342ce6262e2d0e6c11a73360a5 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Wed, 12 Jun 2013 02:03:59 +0000
-Subject: ARM: shmobile: r8a7790: add __initdata on resource and device data
-
-These data will be kmemdup()'ed on
-platform_device_add_resources() and platform_device_add_data()
-This patch removed "const" to avoid section type conflict
-with r8a7790_boards_compat_dt
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit f9094c526bca3cc50ef7d409c22976fa0f47bbba)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-r8a7790.c | 12 ++++++------
- 1 file changed, 6 insertions(+), 6 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c
-index b461d934..196bd732 100644
---- a/arch/arm/mach-shmobile/setup-r8a7790.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7790.c
-@@ -30,17 +30,17 @@
- #include <mach/r8a7790.h>
- #include <asm/mach/arch.h>
- 
--static const struct resource pfc_resources[] = {
-+static struct resource pfc_resources[] __initdata = {
- 	DEFINE_RES_MEM(0xe6060000, 0x250),
- };
- 
- #define R8A7790_GPIO(idx)						\
--static struct resource r8a7790_gpio##idx##_resources[] = {		\
-+static struct resource r8a7790_gpio##idx##_resources[] __initdata = {	\
- 	DEFINE_RES_MEM(0xe6050000 + 0x1000 * (idx), 0x50),		\
- 	DEFINE_RES_IRQ(gic_spi(4 + (idx))),				\
- };									\
- 									\
--static struct gpio_rcar_config r8a7790_gpio##idx##_platform_data = {	\
-+static struct gpio_rcar_config r8a7790_gpio##idx##_platform_data __initdata = {	\
- 	.gpio_base	= 32 * (idx),					\
- 	.irq_base	= 0,						\
- 	.number_of_pins	= 32,						\
-@@ -103,7 +103,7 @@ void __init r8a7790_pinmux_init(void)
- 
- enum { SCIFA0, SCIFA1, SCIFB0, SCIFB1, SCIFB2, SCIFA2, SCIF0, SCIF1 };
- 
--static const struct plat_sci_port scif[] = {
-+static struct plat_sci_port scif[] __initdata = {
- 	SCIFA_DATA(SCIFA0, 0xe6c40000, gic_spi(144)), /* SCIFA0 */
- 	SCIFA_DATA(SCIFA1, 0xe6c50000, gic_spi(145)), /* SCIFA1 */
- 	SCIFB_DATA(SCIFB0, 0xe6c20000, gic_spi(148)), /* SCIFB0 */
-@@ -120,11 +120,11 @@ static inline void r8a7790_register_scif(int idx)
- 				      sizeof(struct plat_sci_port));
- }
- 
--static struct renesas_irqc_config irqc0_data = {
-+static struct renesas_irqc_config irqc0_data __initdata = {
- 	.irq_base = irq_pin(0), /* IRQ0 -> IRQ3 */
- };
- 
--static struct resource irqc0_resources[] = {
-+static struct resource irqc0_resources[] __initdata = {
- 	DEFINE_RES_MEM(0xe61c0000, 0x200), /* IRQC Event Detector Block_0 */
- 	DEFINE_RES_IRQ(gic_spi(0)), /* IRQ0 */
- 	DEFINE_RES_IRQ(gic_spi(1)), /* IRQ1 */
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0280-ARM-shmobile-r8a7791-Don-t-set-plat_sci_port-scbrr_a.patch b/patches.renesas/0280-ARM-shmobile-r8a7791-Don-t-set-plat_sci_port-scbrr_a.patch
deleted file mode 100644
index c74e4e2263cde..0000000000000
--- a/patches.renesas/0280-ARM-shmobile-r8a7791-Don-t-set-plat_sci_port-scbrr_a.patch
+++ /dev/null
@@ -1,54 +0,0 @@
-From b1ee42e098a83b388387ba56fc5307d8adcc2257 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 6 Dec 2013 10:59:47 +0100
-Subject: ARM: shmobile: r8a7791: Don't set plat_sci_port scbrr_algo_id field
-
-The field will be removed from the sh-sci driver. Don't set it and let
-the driver handle baud rate calculation internally.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit f72ed4beb198eb25c8532e76addc0034ae2aa8c7)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-r8a7791.c | 9 ++++-----
- 1 file changed, 4 insertions(+), 5 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-r8a7791.c b/arch/arm/mach-shmobile/setup-r8a7791.c
-index f15b53786713..e28404e43860 100644
---- a/arch/arm/mach-shmobile/setup-r8a7791.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7791.c
-@@ -84,11 +84,10 @@ void __init r8a7791_pinmux_init(void)
- 	r8a7791_register_gpio(7);
- }
- 
--#define __R8A7791_SCIF(scif_type, algo, index, baseaddr, irq)		\
-+#define __R8A7791_SCIF(scif_type, index, baseaddr, irq)			\
- static struct plat_sci_port scif##index##_platform_data = {		\
- 	.type		= scif_type,					\
- 	.flags		= UPF_BOOT_AUTOCONF | UPF_IOREMAP,		\
--	.scbrr_algo_id	= algo,						\
- 	.scscr		= SCSCR_RE | SCSCR_TE,				\
- };									\
- 									\
-@@ -98,13 +97,13 @@ static struct resource scif##index##_resources[] = {			\
- }
- 
- #define R8A7791_SCIF(index, baseaddr, irq)				\
--	__R8A7791_SCIF(PORT_SCIF, SCBRR_ALGO_2, index, baseaddr, irq)
-+	__R8A7791_SCIF(PORT_SCIF, index, baseaddr, irq)
- 
- #define R8A7791_SCIFA(index, baseaddr, irq)				\
--	__R8A7791_SCIF(PORT_SCIFA, SCBRR_ALGO_4, index, baseaddr, irq)
-+	__R8A7791_SCIF(PORT_SCIFA, index, baseaddr, irq)
- 
- #define R8A7791_SCIFB(index, baseaddr, irq)				\
--	__R8A7791_SCIF(PORT_SCIFB, SCBRR_ALGO_4, index, baseaddr, irq)
-+	__R8A7791_SCIF(PORT_SCIFB, index, baseaddr, irq)
- 
- R8A7791_SCIFA(0,  0xe6c40000, gic_spi(144)); /* SCIFA0 */
- R8A7791_SCIFA(1,  0xe6c50000, gic_spi(145)); /* SCIFA1 */
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0281-arm-shmobile-r7s72100-add-i2c-clocks.patch b/patches.renesas/0281-arm-shmobile-r7s72100-add-i2c-clocks.patch
deleted file mode 100644
index 4dc0b680491d1..0000000000000
--- a/patches.renesas/0281-arm-shmobile-r7s72100-add-i2c-clocks.patch
+++ /dev/null
@@ -1,50 +0,0 @@
-From 0206da3999186d8bda9160266a653f2fd5910b77 Mon Sep 17 00:00:00 2001
-From: Wolfram Sang <wsa@sang-engineering.com>
-Date: Wed, 18 Dec 2013 22:31:58 +0100
-Subject: arm: shmobile: r7s72100: add i2c clocks
-
-Tested with RIIC2 on a genmai board. Others untested but hopefully
-trivial enough to be added.
-
-Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
-Acked-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit d85bcfa916ffdf078f188aeab60f738b290f4309)
-(Queued by Simon Horman for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r7s72100.c | 8 +++++++-
- 1 file changed, 7 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/clock-r7s72100.c b/arch/arm/mach-shmobile/clock-r7s72100.c
-index 0814a508fd61..e6ab0cd5b286 100644
---- a/arch/arm/mach-shmobile/clock-r7s72100.c
-+++ b/arch/arm/mach-shmobile/clock-r7s72100.c
-@@ -27,6 +27,7 @@
- #define FRQCR2		0xfcfe0014
- #define STBCR3		0xfcfe0420
- #define STBCR4		0xfcfe0424
-+#define STBCR9		0xfcfe0438
- 
- #define PLL_RATE 30
- 
-@@ -144,10 +145,15 @@ struct clk div4_clks[DIV4_NR] = {
- 					| CLK_ENABLE_ON_INIT),
- };
- 
--enum { MSTP47, MSTP46, MSTP45, MSTP44, MSTP43, MSTP42, MSTP41, MSTP40,
-+enum {	MSTP97, MSTP96, MSTP95, MSTP94,
-+	MSTP47, MSTP46, MSTP45, MSTP44, MSTP43, MSTP42, MSTP41, MSTP40,
- 	MSTP33,	MSTP_NR };
- 
- static struct clk mstp_clks[MSTP_NR] = {
-+	[MSTP97] = SH_CLK_MSTP8(&peripheral0_clk, STBCR9, 7, 0), /* RIIC0 */
-+	[MSTP96] = SH_CLK_MSTP8(&peripheral0_clk, STBCR9, 6, 0), /* RIIC1 */
-+	[MSTP95] = SH_CLK_MSTP8(&peripheral0_clk, STBCR9, 5, 0), /* RIIC2 */
-+	[MSTP94] = SH_CLK_MSTP8(&peripheral0_clk, STBCR9, 4, 0), /* RIIC3 */
- 	[MSTP47] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 7, 0), /* SCIF0 */
- 	[MSTP46] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 6, 0), /* SCIF1 */
- 	[MSTP45] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 5, 0), /* SCIF2 */
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0281-pinctrl-r8a7790-fix-two-pin-numbers.patch b/patches.renesas/0281-pinctrl-r8a7790-fix-two-pin-numbers.patch
deleted file mode 100644
index 8f8da114c43ca..0000000000000
--- a/patches.renesas/0281-pinctrl-r8a7790-fix-two-pin-numbers.patch
+++ /dev/null
@@ -1,88 +0,0 @@
-From ffc02e84d24bdfd312a4ee970f7e0080f20182ed Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Tue, 11 Jun 2013 11:42:17 +0000
-Subject: pinctrl: r8a7790: fix two pin numbers
-
-Fix two erroneous MMCIF1 pin numbers on r8a7790.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 0a6ea54ff0fd1ac72223af44939fcd7197537b14)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 16 +++++++---------
- 1 file changed, 7 insertions(+), 9 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-index 1e7a5eb7..14f3ec26 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-@@ -2506,8 +2506,7 @@ static const unsigned int tpu0_to3_pins[] = {
- static const unsigned int tpu0_to3_mux[] = {
- 	TPU0TO3_MARK,
- };
--
--/* - MMCIF ------------------------------------------------------------------ */
-+/* - MMCIF0 ----------------------------------------------------------------- */
- static const unsigned int mmc0_data1_pins[] = {
- 	/* D[0] */
- 	RCAR_GP_PIN(3, 18),
-@@ -2541,7 +2540,7 @@ static const unsigned int mmc0_ctrl_pins[] = {
- static const unsigned int mmc0_ctrl_mux[] = {
- 	MMC0_CLK_MARK, MMC0_CMD_MARK,
- };
--
-+/* - MMCIF1 ----------------------------------------------------------------- */
- static const unsigned int mmc1_data1_pins[] = {
- 	/* D[0] */
- 	RCAR_GP_PIN(3, 26),
-@@ -2562,7 +2561,7 @@ static const unsigned int mmc1_data8_pins[] = {
- 	RCAR_GP_PIN(3, 26), RCAR_GP_PIN(3, 27),
- 	RCAR_GP_PIN(3, 28), RCAR_GP_PIN(3, 29),
- 	RCAR_GP_PIN(3, 30), RCAR_GP_PIN(3, 31),
--	RCAR_GP_PIN(3, 13), RCAR_GP_PIN(3, 14),
-+	RCAR_GP_PIN(3, 14), RCAR_GP_PIN(3, 15),
- };
- static const unsigned int mmc1_data8_mux[] = {
- 	MMC1_D0_MARK, MMC1_D1_MARK, MMC1_D2_MARK, MMC1_D3_MARK,
-@@ -2575,8 +2574,7 @@ static const unsigned int mmc1_ctrl_pins[] = {
- static const unsigned int mmc1_ctrl_mux[] = {
- 	MMC1_CLK_MARK, MMC1_CMD_MARK,
- };
--
--/* - SDHI ------------------------------------------------------------------- */
-+/* - SDHI0 ------------------------------------------------------------------ */
- static const unsigned int sdhi0_data1_pins[] = {
- 	/* D0 */
- 	RCAR_GP_PIN(3, 2),
-@@ -2612,7 +2610,7 @@ static const unsigned int sdhi0_wp_pins[] = {
- static const unsigned int sdhi0_wp_mux[] = {
- 	SD0_WP_MARK,
- };
--
-+/* - SDHI1 ------------------------------------------------------------------ */
- static const unsigned int sdhi1_data1_pins[] = {
- 	/* D0 */
- 	RCAR_GP_PIN(3, 10),
-@@ -2648,7 +2646,7 @@ static const unsigned int sdhi1_wp_pins[] = {
- static const unsigned int sdhi1_wp_mux[] = {
- 	SD1_WP_MARK,
- };
--
-+/* - SDHI2 ------------------------------------------------------------------ */
- static const unsigned int sdhi2_data1_pins[] = {
- 	/* D0 */
- 	RCAR_GP_PIN(3, 18),
-@@ -2684,7 +2682,7 @@ static const unsigned int sdhi2_wp_pins[] = {
- static const unsigned int sdhi2_wp_mux[] = {
- 	SD2_WP_MARK,
- };
--
-+/* - SDHI3 ------------------------------------------------------------------ */
- static const unsigned int sdhi3_data1_pins[] = {
- 	/* D0 */
- 	RCAR_GP_PIN(3, 26),
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0282-ARM-shmobile-Rework-sh7372-sleep-code-to-use-virt_to.patch b/patches.renesas/0282-ARM-shmobile-Rework-sh7372-sleep-code-to-use-virt_to.patch
deleted file mode 100644
index c1ce993259d79..0000000000000
--- a/patches.renesas/0282-ARM-shmobile-Rework-sh7372-sleep-code-to-use-virt_to.patch
+++ /dev/null
@@ -1,71 +0,0 @@
-From 9e96bc6dc48ddebf53bb7caa91803db0c12a3f56 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Wed, 5 Jun 2013 16:45:53 +0900
-Subject: ARM: shmobile: Rework sh7372 sleep code to use virt_to_phys()
-
-Instead of having a hard coded virt-to-phys address
-conversion code in sleep-sh7372.S, rework the code
-to do the conversion in C using virt_to_phys().
-
-This removes the need for PLAT_PHYS_OFFSET which
-in turn is needed for ARCH_MULTIPLATFORM.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-[horms+renesas@verge.net.au: squashed in build fix posted as
- "ARM: shmobile: sh7372 build fix for SUSPEND=n && CPU_IDLE=n"]
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-(cherry picked from commit e26f4067405872b5d8b9efea9fc48cda97e39fc2)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/include/mach/sh7372.h | 2 ++
- arch/arm/mach-shmobile/pm-sh7372.c           | 3 +++
- arch/arm/mach-shmobile/sleep-sh7372.S        | 5 ++++-
- 3 files changed, 9 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/include/mach/sh7372.h b/arch/arm/mach-shmobile/include/mach/sh7372.h
-index e882717c..854a9f0c 100644
---- a/arch/arm/mach-shmobile/include/mach/sh7372.h
-+++ b/arch/arm/mach-shmobile/include/mach/sh7372.h
-@@ -75,6 +75,8 @@ extern void sh7372_intcs_resume(void);
- extern void sh7372_intca_suspend(void);
- extern void sh7372_intca_resume(void);
- 
-+extern unsigned long sh7372_cpu_resume;
-+
- #ifdef CONFIG_PM
- extern void __init sh7372_init_pm_domains(void);
- #else
-diff --git a/arch/arm/mach-shmobile/pm-sh7372.c b/arch/arm/mach-shmobile/pm-sh7372.c
-index dec9293b..0de75fd3 100644
---- a/arch/arm/mach-shmobile/pm-sh7372.c
-+++ b/arch/arm/mach-shmobile/pm-sh7372.c
-@@ -351,6 +351,9 @@ static void sh7372_enter_a4s_common(int pllc0_on)
- 
- static void sh7372_pm_setup_smfram(void)
- {
-+	/* pass physical address of cpu_resume() to assembly resume code */
-+	sh7372_cpu_resume = virt_to_phys(cpu_resume);
-+
- 	memcpy((void *)SMFRAM, sh7372_resume_core_standby_sysc, 0x100);
- }
- #else
-diff --git a/arch/arm/mach-shmobile/sleep-sh7372.S b/arch/arm/mach-shmobile/sleep-sh7372.S
-index a9df53b6..53f4840e 100644
---- a/arch/arm/mach-shmobile/sleep-sh7372.S
-+++ b/arch/arm/mach-shmobile/sleep-sh7372.S
-@@ -40,7 +40,10 @@
- 	.global sh7372_resume_core_standby_sysc
- sh7372_resume_core_standby_sysc:
- 	ldr     pc, 1f
--1:	.long   cpu_resume - PAGE_OFFSET + PLAT_PHYS_OFFSET
-+
-+	.globl	sh7372_cpu_resume
-+sh7372_cpu_resume:
-+1:	.space	4
- 
- #define SPDCR 0xe6180008
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0282-net-sh_eth-do-not-issue-a-wild-PHY-reset-through-BMC.patch b/patches.renesas/0282-net-sh_eth-do-not-issue-a-wild-PHY-reset-through-BMC.patch
deleted file mode 100644
index c4fcdc76f4fb9..0000000000000
--- a/patches.renesas/0282-net-sh_eth-do-not-issue-a-wild-PHY-reset-through-BMC.patch
+++ /dev/null
@@ -1,38 +0,0 @@
-From 3ce525d17e74d5b288b039382f39234d19c47189 Mon Sep 17 00:00:00 2001
-From: Florian Fainelli <f.fainelli@gmail.com>
-Date: Fri, 6 Dec 2013 13:01:38 -0800
-Subject: net: sh_eth: do not issue a wild PHY reset through BMCR
-
-The sh_eth driver issues an uncontrolled PHY reset through the MII
-register BMCR but fails to wait for the reset to complete, and will also
-implicitely wipe out all possible PHY fixups applied. Use phy_init_hw()
-which remedies both problems.
-
-Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit 0c9eb5b931c3da3a79faa889b903dc7bd318203c)
-(Queued by David Miller for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/net/ethernet/renesas/sh_eth.c | 5 ++++-
- 1 file changed, 4 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
-index 8bced1c44378..be9b6ab11c94 100644
---- a/drivers/net/ethernet/renesas/sh_eth.c
-+++ b/drivers/net/ethernet/renesas/sh_eth.c
-@@ -1704,7 +1704,10 @@ static int sh_eth_phy_start(struct net_device *ndev)
- 		return ret;
- 
- 	/* reset phy - this also wakes it from PDOWN */
--	phy_write(mdp->phydev, MII_BMCR, BMCR_RESET);
-+	ret = phy_init_hw(mdp->phydev);
-+	if (ret)
-+		return ret;
-+
- 	phy_start(mdp->phydev);
- 
- 	return 0;
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0283-ARM-shmobile-Add-SMP-boot-function-and-argument.patch b/patches.renesas/0283-ARM-shmobile-Add-SMP-boot-function-and-argument.patch
deleted file mode 100644
index a2884bba31c53..0000000000000
--- a/patches.renesas/0283-ARM-shmobile-Add-SMP-boot-function-and-argument.patch
+++ /dev/null
@@ -1,59 +0,0 @@
-From aa866793caf5e4bb86465e9bc7d9b59aef2895b0 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Mon, 10 Jun 2013 18:19:36 +0900
-Subject: ARM: shmobile: Add SMP boot function and argument
-
-Add code for mach-shmobile to allow specifying boot function
-and argument. Will initially be used for SMP together with SCU
-but may in the future also be used for deep sleep resume. This
-patch removes one inline virtual to physical address conversion.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit ebe72ab90a5c1e3b69d89b841552fd02805dc4e4)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/headsmp.S             | 13 ++++++++++---
- arch/arm/mach-shmobile/include/mach/common.h |  4 +++-
- 2 files changed, 13 insertions(+), 4 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/headsmp.S b/arch/arm/mach-shmobile/headsmp.S
-index 96001fd4..559d1ce5 100644
---- a/arch/arm/mach-shmobile/headsmp.S
-+++ b/arch/arm/mach-shmobile/headsmp.S
-@@ -27,7 +27,14 @@ ENDPROC(shmobile_invalidate_start)
-  * We need _long_ jump to the physical address.
-  */
- 	.align  12
--ENTRY(shmobile_secondary_vector)
-+ENTRY(shmobile_boot_vector)
-+	ldr     r0, 2f
- 	ldr     pc, 1f
--1:	.long   shmobile_invalidate_start - PAGE_OFFSET + PLAT_PHYS_OFFSET
--ENDPROC(shmobile_secondary_vector)
-+ENDPROC(shmobile_boot_vector)
-+
-+	.globl	shmobile_boot_fn
-+shmobile_boot_fn:
-+1:	.space	4
-+	.globl	shmobile_boot_arg
-+shmobile_boot_arg:
-+2:	.space	4
-diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h
-index 4634a5d4..54472ef4 100644
---- a/arch/arm/mach-shmobile/include/mach/common.h
-+++ b/arch/arm/mach-shmobile/include/mach/common.h
-@@ -7,7 +7,9 @@ extern void shmobile_setup_delay(unsigned int max_cpu_core_mhz,
- 			 unsigned int mult, unsigned int div);
- struct twd_local_timer;
- extern void shmobile_setup_console(void);
--extern void shmobile_secondary_vector(void);
-+extern void shmobile_boot_vector(void);
-+extern unsigned long shmobile_boot_fn;
-+extern unsigned long shmobile_boot_arg;
- extern void shmobile_secondary_vector_scu(void);
- struct clk;
- extern int shmobile_clk_init(void);
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0283-sh_eth-add-R8A7791-support.patch b/patches.renesas/0283-sh_eth-add-R8A7791-support.patch
deleted file mode 100644
index 5ea76c89d14d1..0000000000000
--- a/patches.renesas/0283-sh_eth-add-R8A7791-support.patch
+++ /dev/null
@@ -1,60 +0,0 @@
-From dd78efb39df662790974e364e88b316c1781b6c0 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Sun, 8 Dec 2013 02:59:18 +0300
-Subject: sh_eth: add R8A7791 support
-
-Add support for yet another ARM member of the R-Car family, R-Car M2, also known
-as R8A7791 -- it will share the code and data with previously added R8A7790.
-Despite the Ether devices in these SoCs are indistinguishable at least from the
-driver's point of view, we do introduce a new platform device ID "r8a7791-ether"
-unlike the wildcard ID used for R8A7778/9 SoCs, due to newly established policy
-for the Renesas SoCs.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit 94a12b15e4c575e0aa0ba5e24a4f213163a823d0)
-(Queued by David Miller for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/net/ethernet/renesas/Kconfig  | 2 +-
- drivers/net/ethernet/renesas/sh_eth.c | 7 ++++---
- 2 files changed, 5 insertions(+), 4 deletions(-)
-
-diff --git a/drivers/net/ethernet/renesas/Kconfig b/drivers/net/ethernet/renesas/Kconfig
-index c299e7f07660..3bff114d3ef4 100644
---- a/drivers/net/ethernet/renesas/Kconfig
-+++ b/drivers/net/ethernet/renesas/Kconfig
-@@ -14,4 +14,4 @@ config SH_ETH
- 	  Renesas SuperH Ethernet device driver.
- 	  This driver supporting CPUs are:
- 		- SH7619, SH7710, SH7712, SH7724, SH7734, SH7763, SH7757,
--		  R8A7740, R8A777x and R8A7790.
-+		  R8A7740, R8A777x and R8A779x.
-diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
-index be9b6ab11c94..7f6dc6d8642e 100644
---- a/drivers/net/ethernet/renesas/sh_eth.c
-+++ b/drivers/net/ethernet/renesas/sh_eth.c
-@@ -395,8 +395,8 @@ static struct sh_eth_cpu_data r8a777x_data = {
- 	.hw_swap	= 1,
- };
- 
--/* R8A7790 */
--static struct sh_eth_cpu_data r8a7790_data = {
-+/* R8A7790/1 */
-+static struct sh_eth_cpu_data r8a779x_data = {
- 	.set_duplex	= sh_eth_set_duplex,
- 	.set_rate	= sh_eth_set_rate_r8a777x,
- 
-@@ -2811,7 +2811,8 @@ static struct platform_device_id sh_eth_id_table[] = {
- 	{ "sh7763-gether", (kernel_ulong_t)&sh7763_data },
- 	{ "r8a7740-gether", (kernel_ulong_t)&r8a7740_data },
- 	{ "r8a777x-ether", (kernel_ulong_t)&r8a777x_data },
--	{ "r8a7790-ether", (kernel_ulong_t)&r8a7790_data },
-+	{ "r8a7790-ether", (kernel_ulong_t)&r8a779x_data },
-+	{ "r8a7791-ether", (kernel_ulong_t)&r8a779x_data },
- 	{ }
- };
- MODULE_DEVICE_TABLE(platform, sh_eth_id_table);
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0284-ARM-shmobile-Add-SCU-boot-function-using-argument.patch b/patches.renesas/0284-ARM-shmobile-Add-SCU-boot-function-using-argument.patch
deleted file mode 100644
index 1dec62c303ee2..0000000000000
--- a/patches.renesas/0284-ARM-shmobile-Add-SCU-boot-function-using-argument.patch
+++ /dev/null
@@ -1,57 +0,0 @@
-From a4c75658f0d437a1aceff0d1bdc4d84b1b2a223f Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Mon, 10 Jun 2013 18:19:46 +0900
-Subject: ARM: shmobile: Add SCU boot function using argument
-
-Add a shmoible_boot_scu function that assumes that the base address
-of the SCU is passed in r0. This code is free from inline virtual
-to physical address conversion.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit bfabbcc679e86cfcaf0e7fd41563f14c29bc74d4)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/headsmp-scu.S         | 13 +++++++++++++
- arch/arm/mach-shmobile/include/mach/common.h |  1 +
- 2 files changed, 14 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/headsmp-scu.S b/arch/arm/mach-shmobile/headsmp-scu.S
-index 7d113f89..c5c9106b 100644
---- a/arch/arm/mach-shmobile/headsmp-scu.S
-+++ b/arch/arm/mach-shmobile/headsmp-scu.S
-@@ -51,6 +51,19 @@ ENTRY(shmobile_secondary_vector_scu)
- 2:	.long shmobile_scu_base - PAGE_OFFSET + PLAT_PHYS_OFFSET
- ENDPROC(shmobile_secondary_vector_scu)
- 
-+ENTRY(shmobile_boot_scu)
-+					@ r0 = SCU base address
-+	mrc     p15, 0, r1, c0, c0, 5	@ read MIPDR
-+	and	r1, r1, #3		@ mask out cpu ID
-+	lsl	r1, r1, #3		@ we will shift by cpu_id * 8 bits
-+	ldr	r2, [r0, #8]		@ SCU Power Status Register
-+	mov	r3, #3
-+	bic	r2, r2, r3, lsl r1	@ Clear bits of our CPU (Run Mode)
-+	str	r2, [r0, #8]		@ write back
-+
-+	b	shmobile_invalidate_start
-+ENDPROC(shmobile_boot_scu)
-+
- 	.text
- 	.globl	shmobile_scu_base
- shmobile_scu_base:
-diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h
-index 54472ef4..8ef1c3c1 100644
---- a/arch/arm/mach-shmobile/include/mach/common.h
-+++ b/arch/arm/mach-shmobile/include/mach/common.h
-@@ -11,6 +11,7 @@ extern void shmobile_boot_vector(void);
- extern unsigned long shmobile_boot_fn;
- extern unsigned long shmobile_boot_arg;
- extern void shmobile_secondary_vector_scu(void);
-+extern void shmobile_boot_scu(void);
- struct clk;
- extern int shmobile_clk_init(void);
- extern void shmobile_handle_irq_intc(struct pt_regs *);
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0284-sh_eth-add-PHY-IRQ-to-platform-data.patch b/patches.renesas/0284-sh_eth-add-PHY-IRQ-to-platform-data.patch
deleted file mode 100644
index 4578a722f6ec1..0000000000000
--- a/patches.renesas/0284-sh_eth-add-PHY-IRQ-to-platform-data.patch
+++ /dev/null
@@ -1,57 +0,0 @@
-From ccc048c244b5b6dd848113931676773657cf7fc3 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Fri, 20 Dec 2013 01:39:52 +0300
-Subject: sh_eth: add PHY IRQ to platform data
-
-Allow the platform code to pass PHY's IRQ to the driver.  Print this IRQ along
-with the other PHY datails in sh_eth_phy_init().
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit 18be099badcfc4a12f058addc55c4270d5a8bec8)
-(Queued by David Miller for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/net/ethernet/renesas/sh_eth.c | 6 ++++--
- include/linux/sh_eth.h                | 1 +
- 2 files changed, 5 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
-index 7f6dc6d8642e..2b8ef6ec0025 100644
---- a/drivers/net/ethernet/renesas/sh_eth.c
-+++ b/drivers/net/ethernet/renesas/sh_eth.c
-@@ -1685,8 +1685,8 @@ static int sh_eth_phy_init(struct net_device *ndev)
- 		return PTR_ERR(phydev);
- 	}
- 
--	dev_info(&ndev->dev, "attached phy %i to driver %s\n",
--		phydev->addr, phydev->drv->name);
-+	dev_info(&ndev->dev, "attached PHY %d (IRQ %d) to driver %s\n",
-+		 phydev->addr, phydev->irq, phydev->drv->name);
- 
- 	mdp->phydev = phydev;
- 
-@@ -2544,6 +2544,8 @@ static int sh_mdio_init(struct net_device *ndev, int id,
- 
- 	for (i = 0; i < PHY_MAX_ADDR; i++)
- 		mdp->mii_bus->irq[i] = PHY_POLL;
-+	if (pd->phy_irq > 0)
-+		mdp->mii_bus->irq[pd->phy] = pd->phy_irq;
- 
- 	/* register mdio bus */
- 	ret = mdiobus_register(mdp->mii_bus);
-diff --git a/include/linux/sh_eth.h b/include/linux/sh_eth.h
-index 15b2ea9381bd..8c3dc4cf838c 100644
---- a/include/linux/sh_eth.h
-+++ b/include/linux/sh_eth.h
-@@ -7,6 +7,7 @@ enum {EDMAC_LITTLE_ENDIAN, EDMAC_BIG_ENDIAN};
- 
- struct sh_eth_plat_data {
- 	int phy;
-+	int phy_irq;
- 	int edmac_endian;
- 	phy_interface_t phy_interface;
- 	void (*set_mdio_gate)(void *addr);
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0285-ARM-shmobile-r8a7779-SMP-with-SCU-boot-fn-and-args.patch b/patches.renesas/0285-ARM-shmobile-r8a7779-SMP-with-SCU-boot-fn-and-args.patch
deleted file mode 100644
index 48d6fa0027699..0000000000000
--- a/patches.renesas/0285-ARM-shmobile-r8a7779-SMP-with-SCU-boot-fn-and-args.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From 4f79397850fc1b78d64032c97447572f22e169ce Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Mon, 10 Jun 2013 18:19:56 +0900
-Subject: ARM: shmobile: r8a7779 SMP with SCU boot fn and args
-
-Let r8a7779 make use of shmobile_boot_fn and shmobile_boot_arg
-together with shmobile_boot_scu and the SCU base address.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit af642310aaa491df6dabcca96bdf0d1b8465a834)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/smp-r8a7779.c | 6 ++++--
- 1 file changed, 4 insertions(+), 2 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/smp-r8a7779.c b/arch/arm/mach-shmobile/smp-r8a7779.c
-index a853bf18..526cfaae 100644
---- a/arch/arm/mach-shmobile/smp-r8a7779.c
-+++ b/arch/arm/mach-shmobile/smp-r8a7779.c
-@@ -101,8 +101,10 @@ static void __init r8a7779_smp_prepare_cpus(unsigned int max_cpus)
- {
- 	scu_enable(shmobile_scu_base);
- 
--	/* Map the reset vector (in headsmp-scu.S) */
--	__raw_writel(__pa(shmobile_secondary_vector_scu), AVECR);
-+	/* Map the reset vector (in headsmp-scu.S, headsmp.S) */
-+	__raw_writel(__pa(shmobile_boot_vector), AVECR);
-+	shmobile_boot_fn = virt_to_phys(shmobile_boot_scu);
-+	shmobile_boot_arg = (unsigned long)shmobile_scu_base;
- 
- 	/* enable cache coherency on booting CPU */
- 	scu_power_mode(shmobile_scu_base, SCU_PM_NORMAL);
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0285-sh_eth-do-not-reset-PHY-needlessly.patch b/patches.renesas/0285-sh_eth-do-not-reset-PHY-needlessly.patch
deleted file mode 100644
index 40e1e3206d48d..0000000000000
--- a/patches.renesas/0285-sh_eth-do-not-reset-PHY-needlessly.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From 0bee888c66def356a15d70b727b0e9fe4c4895d3 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Fri, 20 Dec 2013 01:41:12 +0300
-Subject: sh_eth: do not reset PHY needlessly
-
-There's no need anymore to call phy_init_hw() to reset/resume the PHY from the
-driver, as the call chain in phylib already has reached it, and so reset/resumed
-the PHY (even resuming it twice). This duplicate reset is not only  needless, it
-e.g. clears the PHY's interrupt enables just setup by phylib and so prevents the
-expected IRQs from the PHY.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit 4174ecd78f6591a3d1ec04738ef7bc900a11f5ce)
-(Queued by David Miller for v3.14 but not yet in Linus's tree)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/net/ethernet/renesas/sh_eth.c | 5 -----
- 1 file changed, 5 deletions(-)
-
-diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
-index 2b8ef6ec0025..6551b72776ce 100644
---- a/drivers/net/ethernet/renesas/sh_eth.c
-+++ b/drivers/net/ethernet/renesas/sh_eth.c
-@@ -1703,11 +1703,6 @@ static int sh_eth_phy_start(struct net_device *ndev)
- 	if (ret)
- 		return ret;
- 
--	/* reset phy - this also wakes it from PDOWN */
--	ret = phy_init_hw(mdp->phydev);
--	if (ret)
--		return ret;
--
- 	phy_start(mdp->phydev);
- 
- 	return 0;
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0286-ARM-7789-1-Do-not-run-dummy_flush_tlb_a15_erratum-on.patch b/patches.renesas/0286-ARM-7789-1-Do-not-run-dummy_flush_tlb_a15_erratum-on.patch
deleted file mode 100644
index 22b697c8d286a..0000000000000
--- a/patches.renesas/0286-ARM-7789-1-Do-not-run-dummy_flush_tlb_a15_erratum-on.patch
+++ /dev/null
@@ -1,111 +0,0 @@
-From 33564a783a21d0e1ad3450904ad8fd4503f8fae3 Mon Sep 17 00:00:00 2001
-From: Fabio Estevam <festevam@gmail.com>
-Date: Tue, 23 Jul 2013 15:13:06 +0100
-Subject: ARM: 7789/1: Do not run dummy_flush_tlb_a15_erratum() on
- non-Cortex-A15
-
-Commit 93dc688 (ARM: 7684/1: errata: Workaround for Cortex-A15 erratum 798181 (TLBI/DSB operations)) causes the following undefined instruction error on a mx53 (Cortex-A8):
-
-Internal error: Oops - undefined instruction: 0 [#1] SMP ARM
-CPU: 0 PID: 275 Comm: modprobe Not tainted 3.11.0-rc2-next-20130722-00009-g9b0f371 #881
-task: df46cc00 ti: df48e000 task.ti: df48e000
-PC is at check_and_switch_context+0x17c/0x4d0
-LR is at check_and_switch_context+0xdc/0x4d0
-
-This problem happens because check_and_switch_context() calls dummy_flush_tlb_a15_erratum() without checking if we are really running on a Cortex-A15 or not.
-
-To avoid this issue, only call dummy_flush_tlb_a15_erratum() inside
-check_and_switch_context() if erratum_a15_798181() returns true, which means that we are really running on a Cortex-A15.
-
-Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
-Acked-by: Catalin Marinas <catalin.marinas@arm.com>
-Reviewed-by: Roger Quadros <rogerq@ti.com>
-Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-(cherry picked from commit 1f49856bb029779d8f1b63517a3a3b34ffe672c7)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/include/asm/tlbflush.h | 16 ++++++++++++++++
- arch/arm/kernel/smp_tlb.c       | 17 -----------------
- arch/arm/mm/context.c           |  3 ++-
- 3 files changed, 18 insertions(+), 18 deletions(-)
-
-diff --git a/arch/arm/include/asm/tlbflush.h b/arch/arm/include/asm/tlbflush.h
-index a3625d141c1d..378ff78623b7 100644
---- a/arch/arm/include/asm/tlbflush.h
-+++ b/arch/arm/include/asm/tlbflush.h
-@@ -443,7 +443,18 @@ static inline void local_flush_bp_all(void)
- 		isb();
- }
- 
-+#include <asm/cputype.h>
- #ifdef CONFIG_ARM_ERRATA_798181
-+static inline int erratum_a15_798181(void)
-+{
-+	unsigned int midr = read_cpuid_id();
-+
-+	/* Cortex-A15 r0p0..r3p2 affected */
-+	if ((midr & 0xff0ffff0) != 0x410fc0f0 || midr > 0x413fc0f2)
-+		return 0;
-+	return 1;
-+}
-+
- static inline void dummy_flush_tlb_a15_erratum(void)
- {
- 	/*
-@@ -453,6 +464,11 @@ static inline void dummy_flush_tlb_a15_erratum(void)
- 	dsb();
- }
- #else
-+static inline int erratum_a15_798181(void)
-+{
-+	return 0;
-+}
-+
- static inline void dummy_flush_tlb_a15_erratum(void)
- {
- }
-diff --git a/arch/arm/kernel/smp_tlb.c b/arch/arm/kernel/smp_tlb.c
-index a98b62dca2fa..c2edfff573c2 100644
---- a/arch/arm/kernel/smp_tlb.c
-+++ b/arch/arm/kernel/smp_tlb.c
-@@ -70,23 +70,6 @@ static inline void ipi_flush_bp_all(void *ignored)
- 	local_flush_bp_all();
- }
- 
--#ifdef CONFIG_ARM_ERRATA_798181
--static int erratum_a15_798181(void)
--{
--	unsigned int midr = read_cpuid_id();
--
--	/* Cortex-A15 r0p0..r3p2 affected */
--	if ((midr & 0xff0ffff0) != 0x410fc0f0 || midr > 0x413fc0f2)
--		return 0;
--	return 1;
--}
--#else
--static int erratum_a15_798181(void)
--{
--	return 0;
--}
--#endif
--
- static void ipi_flush_tlb_a15_erratum(void *arg)
- {
- 	dmb();
-diff --git a/arch/arm/mm/context.c b/arch/arm/mm/context.c
-index eeab06ebd06e..3cc9157f4532 100644
---- a/arch/arm/mm/context.c
-+++ b/arch/arm/mm/context.c
-@@ -250,7 +250,8 @@ void check_and_switch_context(struct mm_struct *mm, struct task_struct *tsk)
- 	if (cpumask_test_and_clear_cpu(cpu, &tlb_flush_pending)) {
- 		local_flush_bp_all();
- 		local_flush_tlb_all();
--		dummy_flush_tlb_a15_erratum();
-+		if (erratum_a15_798181())
-+			dummy_flush_tlb_a15_erratum();
- 	}
- 
- 	atomic64_set(&per_cpu(active_asids, cpu), asid);
--- 
-1.8.5.rc3
-
diff --git a/patches.renesas/0286-ARM-shmobile-sh73a0-SMP-with-SCU-boot-fn-and-args.patch b/patches.renesas/0286-ARM-shmobile-sh73a0-SMP-with-SCU-boot-fn-and-args.patch
deleted file mode 100644
index 4663265ed387b..0000000000000
--- a/patches.renesas/0286-ARM-shmobile-sh73a0-SMP-with-SCU-boot-fn-and-args.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 8d8a82599d2add7de68eecf9431cd04623c45f18 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Mon, 10 Jun 2013 18:20:06 +0900
-Subject: ARM: shmobile: sh73a0 SMP with SCU boot fn and args
-
-Let sh73a0 make use of shmobile_boot_fn and shmobile_boot_arg
-together with shmobile_boot_scu and the SCU base address.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit abfa04eb12d34941e7c227e0e205a2075f9c52d5)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/smp-sh73a0.c | 6 ++++--
- 1 file changed, 4 insertions(+), 2 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/smp-sh73a0.c b/arch/arm/mach-shmobile/smp-sh73a0.c
-index 496592b6..d613113a 100644
---- a/arch/arm/mach-shmobile/smp-sh73a0.c
-+++ b/arch/arm/mach-shmobile/smp-sh73a0.c
-@@ -64,9 +64,11 @@ static void __init sh73a0_smp_prepare_cpus(unsigned int max_cpus)
- {
- 	scu_enable(shmobile_scu_base);
- 
--	/* Map the reset vector (in headsmp-scu.S) */
-+	/* Map the reset vector (in headsmp-scu.S, headsmp.S) */
- 	__raw_writel(0, APARMBAREA);      /* 4k */
--	__raw_writel(__pa(shmobile_secondary_vector_scu), SBAR);
-+	__raw_writel(__pa(shmobile_boot_vector), SBAR);
-+	shmobile_boot_fn = virt_to_phys(shmobile_boot_scu);
-+	shmobile_boot_arg = (unsigned long)shmobile_scu_base;
- 
- 	/* enable cache coherency on booting CPU */
- 	scu_power_mode(shmobile_scu_base, SCU_PM_NORMAL);
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0287-ARM-shmobile-EMEV2-SMP-with-SCU-boot-fn-and-args.patch b/patches.renesas/0287-ARM-shmobile-EMEV2-SMP-with-SCU-boot-fn-and-args.patch
deleted file mode 100644
index 84b9d2bdc5958..0000000000000
--- a/patches.renesas/0287-ARM-shmobile-EMEV2-SMP-with-SCU-boot-fn-and-args.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From 00d68bd635708b7886d62a3216cc2dc748e3c500 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Mon, 10 Jun 2013 18:20:15 +0900
-Subject: ARM: shmobile: EMEV2 SMP with SCU boot fn and args
-
-Let EMEV2 make use of shmobile_boot_fn and shmobile_boot_arg
-together with shmobile_boot_scu and the SCU base address.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit a188bfcafa61f600877f3e2b4a27cbe42b72c818)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/smp-emev2.c | 6 ++++--
- 1 file changed, 4 insertions(+), 2 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/smp-emev2.c b/arch/arm/mach-shmobile/smp-emev2.c
-index e38691b4..80991b35 100644
---- a/arch/arm/mach-shmobile/smp-emev2.c
-+++ b/arch/arm/mach-shmobile/smp-emev2.c
-@@ -40,8 +40,10 @@ static void __init emev2_smp_prepare_cpus(unsigned int max_cpus)
- {
- 	scu_enable(shmobile_scu_base);
- 
--	/* Tell ROM loader about our vector (in headsmp-scu.S) */
--	emev2_set_boot_vector(__pa(shmobile_secondary_vector_scu));
-+	/* Tell ROM loader about our vector (in headsmp-scu.S, headsmp.S) */
-+	emev2_set_boot_vector(__pa(shmobile_boot_vector));
-+	shmobile_boot_fn = virt_to_phys(shmobile_boot_scu);
-+	shmobile_boot_arg = (unsigned long)shmobile_scu_base;
- 
- 	/* enable cache coherency on booting CPU */
- 	scu_power_mode(shmobile_scu_base, SCU_PM_NORMAL);
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0288-ARM-shmobile-Remove-old-SCU-boot-code.patch b/patches.renesas/0288-ARM-shmobile-Remove-old-SCU-boot-code.patch
deleted file mode 100644
index 4b61cce85d9c4..0000000000000
--- a/patches.renesas/0288-ARM-shmobile-Remove-old-SCU-boot-code.patch
+++ /dev/null
@@ -1,71 +0,0 @@
-From 5f7d962a38e805860284b139682b887d9646c9df Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Mon, 10 Jun 2013 18:20:25 +0900
-Subject: ARM: shmobile: Remove old SCU boot code
-
-Remove shmobile_secondary_vector_scu now when all SCU enabled
-SMP platforms instead make use of shmobile_boot_scu. This
-removes two inline virtual to physical address conversions.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 4f6da36f7edd57901638df84d1dcbece28831334)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/headsmp-scu.S         | 22 +---------------------
- arch/arm/mach-shmobile/include/mach/common.h |  1 -
- 2 files changed, 1 insertion(+), 22 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/headsmp-scu.S b/arch/arm/mach-shmobile/headsmp-scu.S
-index c5c9106b..6f986546 100644
---- a/arch/arm/mach-shmobile/headsmp-scu.S
-+++ b/arch/arm/mach-shmobile/headsmp-scu.S
-@@ -25,32 +25,12 @@
- 
- 	__CPUINIT
- /*
-- * Reset vector for secondary CPUs.
-+ * Boot code for secondary CPUs.
-  *
-  * First we turn on L1 cache coherency for our CPU. Then we jump to
-  * shmobile_invalidate_start that invalidates the cache and hands over control
-  * to the common ARM startup code.
-- * This function will be mapped to address 0 by the SBAR register.
-- * A normal branch is out of range here so we need a long jump. We jump to
-- * the physical address as the MMU is still turned off.
-  */
--	.align	12
--ENTRY(shmobile_secondary_vector_scu)
--	mrc     p15, 0, r0, c0, c0, 5	@ read MIPDR
--	and	r0, r0, #3		@ mask out cpu ID
--	lsl	r0, r0, #3		@ we will shift by cpu_id * 8 bits
--	ldr	r1, 2f
--	ldr	r1, [r1]		@ SCU base address
--	ldr	r2, [r1, #8]		@ SCU Power Status Register
--	mov	r3, #3
--	bic	r2, r2, r3, lsl r0	@ Clear bits of our CPU (Run Mode)
--	str	r2, [r1, #8]		@ write back
--
--	ldr	pc, 1f
--1:	.long shmobile_invalidate_start - PAGE_OFFSET + PLAT_PHYS_OFFSET
--2:	.long shmobile_scu_base - PAGE_OFFSET + PLAT_PHYS_OFFSET
--ENDPROC(shmobile_secondary_vector_scu)
--
- ENTRY(shmobile_boot_scu)
- 					@ r0 = SCU base address
- 	mrc     p15, 0, r1, c0, c0, 5	@ read MIPDR
-diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h
-index 8ef1c3c1..e818f029 100644
---- a/arch/arm/mach-shmobile/include/mach/common.h
-+++ b/arch/arm/mach-shmobile/include/mach/common.h
-@@ -10,7 +10,6 @@ extern void shmobile_setup_console(void);
- extern void shmobile_boot_vector(void);
- extern unsigned long shmobile_boot_fn;
- extern unsigned long shmobile_boot_arg;
--extern void shmobile_secondary_vector_scu(void);
- extern void shmobile_boot_scu(void);
- struct clk;
- extern int shmobile_clk_init(void);
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0289-ARM-shmobile-Remove-MEMORY_START-SIZE.patch b/patches.renesas/0289-ARM-shmobile-Remove-MEMORY_START-SIZE.patch
deleted file mode 100644
index cd3e06bb2b560..0000000000000
--- a/patches.renesas/0289-ARM-shmobile-Remove-MEMORY_START-SIZE.patch
+++ /dev/null
@@ -1,65 +0,0 @@
-From 7e1a6d476600c9bfcce4d9526906c59c9e941f47 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Mon, 10 Jun 2013 18:46:57 +0900
-Subject: ARM: shmobile: Remove MEMORY_START/SIZE
-
-Remove CONFIG_MEMORY_START and CONFIG_MEMORY_SIZE from mach-shmobile.
-
-Boards should use DT to specify their memory setup. Boards that still
-not support DT may pass ATAGS with memory information from the boot
-loader. If those ATAGS turn out to be incorrect then appended DTB with
-memory information should be used as a workaround.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 3c2b1042d2db50506b387611f7a60e81241cfabc)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/Kconfig | 31 -------------------------------
- 1 file changed, 31 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
-index 70df9490..935a661c 100644
---- a/arch/arm/mach-shmobile/Kconfig
-+++ b/arch/arm/mach-shmobile/Kconfig
-@@ -213,37 +213,6 @@ config CPU_HAS_INTEVT
-         bool
- 	default y
- 
--menu "Memory configuration"
--
--config MEMORY_START
--	hex "Physical memory start address"
--	default "0x40000000" if MACH_AP4EVB || MACH_AG5EVM || \
--				MACH_MACKEREL || MACH_BONITO || \
--				MACH_ARMADILLO800EVA || MACH_APE6EVM || \
--				MACH_LAGER
--	default "0x41000000" if MACH_KOTA2
--	default "0x00000000"
--	---help---
--	  Tweak this only when porting to a new machine which does not
--	  already have a defconfig. Changing it from the known correct
--	  value on any of the known systems will only lead to disaster.
--
--config MEMORY_SIZE
--	hex "Physical memory size"
--	default "0x80000000" if MACH_LAGER
--	default "0x40000000" if MACH_APE6EVM
--	default "0x20000000" if MACH_AG5EVM || MACH_BONITO || \
--				MACH_ARMADILLO800EVA
--	default "0x1e000000" if MACH_KOTA2
--	default "0x10000000" if MACH_AP4EVB || MACH_MACKEREL
--	default "0x04000000"
--	help
--	  This sets the default memory size assumed by your kernel. It can
--	  be overridden as normal by the 'mem=' argument on the kernel command
--	  line.
--
--endmenu
--
- menu "Timer and clock configuration"
- 
- config SHMOBILE_TIMER_HZ
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0290-ARM-shmobile-Enable-ARM_PATCH_PHYS_VIRT.patch b/patches.renesas/0290-ARM-shmobile-Enable-ARM_PATCH_PHYS_VIRT.patch
deleted file mode 100644
index d0e28660b197b..0000000000000
--- a/patches.renesas/0290-ARM-shmobile-Enable-ARM_PATCH_PHYS_VIRT.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From 3bb7c61a3418091dbd205423416ae08a1d48b5b0 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Mon, 10 Jun 2013 18:46:47 +0900
-Subject: ARM: shmobile: Enable ARM_PATCH_PHYS_VIRT
-
-Adjust mach-shmobile to add a select for CONFIG_ARM_PATCH_PHYS_VIRT
-and at the same time remove NEED_MACH_MEMORY_H.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 69469995980edab1a99f50a51e5e9525b4e11148)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/Kconfig | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
-index 18a9f5ef..9e4b5fd2 100644
---- a/arch/arm/Kconfig
-+++ b/arch/arm/Kconfig
-@@ -634,6 +634,7 @@ config ARCH_MSM
- 
- config ARCH_SHMOBILE
- 	bool "Renesas SH-Mobile / R-Mobile"
-+	select ARM_PATCH_PHYS_VIRT
- 	select CLKDEV_LOOKUP
- 	select GENERIC_CLOCKEVENTS
- 	select HAVE_ARM_SCU if SMP
-@@ -643,7 +644,6 @@ config ARCH_SHMOBILE
- 	select HAVE_SMP
- 	select MIGHT_HAVE_CACHE_L2X0
- 	select MULTI_IRQ_HANDLER
--	select NEED_MACH_MEMORY_H
- 	select NO_IOPORT
- 	select PINCTRL if ARCH_WANT_OPTIONAL_GPIOLIB
- 	select PM_GENERIC_DOMAINS if PM
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0291-ARM-shmobile-Remove-mach-memory.h.patch b/patches.renesas/0291-ARM-shmobile-Remove-mach-memory.h.patch
deleted file mode 100644
index e70a219265c12..0000000000000
--- a/patches.renesas/0291-ARM-shmobile-Remove-mach-memory.h.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From 9206f5400013c490998e6b98869486b17ec5ff2b Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Mon, 10 Jun 2013 18:47:06 +0900
-Subject: ARM: shmobile: Remove mach/memory.h
-
-Remove mach-shmobile memory.h since it is no longer needed.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 21ba05a6c2defa228a5aa1100bd012e7a4f0fb30)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/include/mach/memory.h | 7 -------
- 1 file changed, 7 deletions(-)
- delete mode 100644 arch/arm/mach-shmobile/include/mach/memory.h
-
-diff --git a/arch/arm/mach-shmobile/include/mach/memory.h b/arch/arm/mach-shmobile/include/mach/memory.h
-deleted file mode 100644
-index 0ffbe815..00000000
---- a/arch/arm/mach-shmobile/include/mach/memory.h
-+++ /dev/null
-@@ -1,7 +0,0 @@
--#ifndef __ASM_MACH_MEMORY_H
--#define __ASM_MACH_MEMORY_H
--
--#define PLAT_PHYS_OFFSET	UL(CONFIG_MEMORY_START)
--#define MEM_SIZE	UL(CONFIG_MEMORY_SIZE)
--
--#endif /* __ASM_MACH_MEMORY_H */
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0292-ARM-shmobile-Remove-AP4EVB-board-support.patch b/patches.renesas/0292-ARM-shmobile-Remove-AP4EVB-board-support.patch
deleted file mode 100644
index b228278df438e..0000000000000
--- a/patches.renesas/0292-ARM-shmobile-Remove-AP4EVB-board-support.patch
+++ /dev/null
@@ -1,1634 +0,0 @@
-From 51a79fc03bfe331520ac33982aebc4cfa58892ac Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Wed, 12 Jun 2013 18:18:19 +0900
-Subject: ARM: shmobile: Remove AP4EVB board support
-
-Remove board support for the sh7372 based AP4EVB board
-
-The sh7372 SoC support code is still kept around since it
-is in use by the Mackerel board which is basically a more
-recent board where the design is based on AP4EVB.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit b24bd7e97b3784afca6b808be1e5848e30e637ac)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/configs/ap4evb_defconfig                  |   56 -
- arch/arm/mach-shmobile/Kconfig                     |   21 -
- arch/arm/mach-shmobile/Makefile                    |    1 -
- arch/arm/mach-shmobile/Makefile.boot               |    1 -
- arch/arm/mach-shmobile/board-ap4evb.c              | 1310 --------------------
- .../arm/mach-shmobile/include/mach/head-ap4evb.txt |   93 --
- arch/arm/mach-shmobile/include/mach/mmc-ap4eb.h    |   29 -
- arch/arm/mach-shmobile/include/mach/mmc.h          |    4 +-
- arch/arm/mach-shmobile/include/mach/zboot.h        |    6 +-
- 9 files changed, 2 insertions(+), 1519 deletions(-)
- delete mode 100644 arch/arm/configs/ap4evb_defconfig
- delete mode 100644 arch/arm/mach-shmobile/board-ap4evb.c
- delete mode 100644 arch/arm/mach-shmobile/include/mach/head-ap4evb.txt
- delete mode 100644 arch/arm/mach-shmobile/include/mach/mmc-ap4eb.h
-
-diff --git a/arch/arm/configs/ap4evb_defconfig b/arch/arm/configs/ap4evb_defconfig
-deleted file mode 100644
-index 66894f73..00000000
---- a/arch/arm/configs/ap4evb_defconfig
-+++ /dev/null
-@@ -1,56 +0,0 @@
--CONFIG_EXPERIMENTAL=y
--CONFIG_SYSVIPC=y
--CONFIG_IKCONFIG=y
--CONFIG_IKCONFIG_PROC=y
--CONFIG_LOG_BUF_SHIFT=16
--CONFIG_BLK_DEV_INITRD=y
--CONFIG_SLAB=y
--# CONFIG_BLK_DEV_BSG is not set
--# CONFIG_IOSCHED_DEADLINE is not set
--# CONFIG_IOSCHED_CFQ is not set
--CONFIG_ARCH_SHMOBILE=y
--CONFIG_ARCH_SH7372=y
--CONFIG_MACH_AP4EVB=y
--CONFIG_AEABI=y
--# CONFIG_OABI_COMPAT is not set
--CONFIG_ZBOOT_ROM_TEXT=0x0
--CONFIG_ZBOOT_ROM_BSS=0x0
--CONFIG_CMDLINE="console=ttySC0,115200 earlyprintk=sh-sci.0,115200"
--CONFIG_KEXEC=y
--CONFIG_PM=y
--# CONFIG_SUSPEND is not set
--CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
--# CONFIG_FIRMWARE_IN_KERNEL is not set
--CONFIG_MTD=y
--CONFIG_MTD_CONCAT=y
--CONFIG_MTD_PARTITIONS=y
--CONFIG_MTD_CHAR=y
--CONFIG_MTD_BLOCK=y
--CONFIG_MTD_CFI=y
--CONFIG_MTD_CFI_INTELEXT=y
--CONFIG_MTD_PHYSMAP=y
--CONFIG_MTD_NAND=y
--# CONFIG_BLK_DEV is not set
--# CONFIG_MISC_DEVICES is not set
--# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
--# CONFIG_INPUT_KEYBOARD is not set
--# CONFIG_INPUT_MOUSE is not set
--# CONFIG_SERIO is not set
--CONFIG_SERIAL_SH_SCI=y
--CONFIG_SERIAL_SH_SCI_NR_UARTS=8
--CONFIG_SERIAL_SH_SCI_CONSOLE=y
--# CONFIG_LEGACY_PTYS is not set
--# CONFIG_HW_RANDOM is not set
--# CONFIG_HWMON is not set
--# CONFIG_VGA_CONSOLE is not set
--# CONFIG_HID_SUPPORT is not set
--# CONFIG_USB_SUPPORT is not set
--# CONFIG_DNOTIFY is not set
--CONFIG_TMPFS=y
--# CONFIG_MISC_FILESYSTEMS is not set
--CONFIG_MAGIC_SYSRQ=y
--CONFIG_DEBUG_KERNEL=y
--# CONFIG_DETECT_SOFTLOCKUP is not set
--# CONFIG_RCU_CPU_STALL_DETECTOR is not set
--# CONFIG_FTRACE is not set
--# CONFIG_CRC32 is not set
-diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
-index 935a661c..810af004 100644
---- a/arch/arm/mach-shmobile/Kconfig
-+++ b/arch/arm/mach-shmobile/Kconfig
-@@ -71,27 +71,6 @@ config ARCH_EMEV2
- 
- comment "SH-Mobile Board Type"
- 
--config MACH_AP4EVB
--	bool "AP4EVB board"
--	depends on ARCH_SH7372
--	select ARCH_REQUIRE_GPIOLIB
--	select REGULATOR_FIXED_VOLTAGE if REGULATOR
--	select SH_LCD_MIPI_DSI
--	select SND_SOC_AK4642 if SND_SIMPLE_CARD
--
--choice
--	prompt "AP4EVB LCD panel selection"
--	default AP4EVB_QHD
--	depends on MACH_AP4EVB
--
--config AP4EVB_QHD
--	bool "MIPI-DSI QHD (960x540)"
--
--config AP4EVB_WVGA
--	bool "Parallel WVGA (800x480)"
--
--endchoice
--
- config MACH_AG5EVM
- 	bool "AG5EVM board"
- 	depends on ARCH_SH73A0
-diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
-index 812de045..7f81b9a2 100644
---- a/arch/arm/mach-shmobile/Makefile
-+++ b/arch/arm/mach-shmobile/Makefile
-@@ -35,7 +35,6 @@ obj-$(CONFIG_ARCH_R8A7779)	+= pm-r8a7779.o
- obj-$(CONFIG_ARCH_SH73A0)	+= pm-sh73a0.o
- 
- # Board objects
--obj-$(CONFIG_MACH_AP4EVB)	+= board-ap4evb.o
- obj-$(CONFIG_MACH_AG5EVM)	+= board-ag5evm.o
- obj-$(CONFIG_MACH_APE6EVM)	+= board-ape6evm.o
- obj-$(CONFIG_MACH_MACKEREL)	+= board-mackerel.o
-diff --git a/arch/arm/mach-shmobile/Makefile.boot b/arch/arm/mach-shmobile/Makefile.boot
-index 6b147ea2..3030673e 100644
---- a/arch/arm/mach-shmobile/Makefile.boot
-+++ b/arch/arm/mach-shmobile/Makefile.boot
-@@ -1,7 +1,6 @@
- # per-board load address for uImage
- loadaddr-y	:=
- loadaddr-$(CONFIG_MACH_AG5EVM) += 0x40008000
--loadaddr-$(CONFIG_MACH_AP4EVB) += 0x40008000
- loadaddr-$(CONFIG_MACH_APE6EVM) += 0x40008000
- loadaddr-$(CONFIG_MACH_ARMADILLO800EVA) += 0x40008000
- loadaddr-$(CONFIG_MACH_ARMADILLO800EVA_REFERENCE) += 0x40008000
-diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c
-deleted file mode 100644
-index 297bf5ee..00000000
---- a/arch/arm/mach-shmobile/board-ap4evb.c
-+++ /dev/null
-@@ -1,1310 +0,0 @@
--/*
-- * AP4EVB board support
-- *
-- * Copyright (C) 2010  Magnus Damm
-- * Copyright (C) 2008  Yoshihiro Shimoda
-- *
-- * This program is free software; you can redistribute it and/or modify
-- * it under the terms of the GNU General Public License as published by
-- * the Free Software Foundation; version 2 of the License.
-- *
-- * This program is distributed in the hope that it will be useful,
-- * but WITHOUT ANY WARRANTY; without even the implied warranty of
-- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-- * GNU General Public License for more details.
-- *
-- * You should have received a copy of the GNU General Public License
-- * along with this program; if not, write to the Free Software
-- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
-- */
--#include <linux/clk.h>
--#include <linux/kernel.h>
--#include <linux/init.h>
--#include <linux/interrupt.h>
--#include <linux/irq.h>
--#include <linux/platform_device.h>
--#include <linux/delay.h>
--#include <linux/mfd/tmio.h>
--#include <linux/mmc/host.h>
--#include <linux/mmc/sh_mobile_sdhi.h>
--#include <linux/mtd/mtd.h>
--#include <linux/mtd/partitions.h>
--#include <linux/mtd/physmap.h>
--#include <linux/mmc/sh_mmcif.h>
--#include <linux/i2c.h>
--#include <linux/i2c/tsc2007.h>
--#include <linux/io.h>
--#include <linux/pinctrl/machine.h>
--#include <linux/regulator/fixed.h>
--#include <linux/regulator/machine.h>
--#include <linux/smsc911x.h>
--#include <linux/sh_intc.h>
--#include <linux/sh_clk.h>
--#include <linux/gpio.h>
--#include <linux/input.h>
--#include <linux/leds.h>
--#include <linux/input/sh_keysc.h>
--#include <linux/usb/r8a66597.h>
--#include <linux/pm_clock.h>
--#include <linux/dma-mapping.h>
--
--#include <media/sh_mobile_ceu.h>
--#include <media/sh_mobile_csi2.h>
--#include <media/soc_camera.h>
--
--#include <sound/sh_fsi.h>
--#include <sound/simple_card.h>
--
--#include <video/sh_mobile_hdmi.h>
--#include <video/sh_mobile_lcdc.h>
--#include <video/sh_mipi_dsi.h>
--
--#include <mach/common.h>
--#include <mach/irqs.h>
--#include <mach/sh7372.h>
--
--#include <asm/mach-types.h>
--#include <asm/mach/arch.h>
--#include <asm/setup.h>
--
--#include "sh-gpio.h"
--
--/*
-- * Address	Interface		BusWidth	note
-- * ------------------------------------------------------------------
-- * 0x0000_0000	NOR Flash ROM (MCP)	16bit		SW7 : bit1 = ON
-- * 0x0800_0000	user area		-
-- * 0x1000_0000	NOR Flash ROM (MCP)	16bit		SW7 : bit1 = OFF
-- * 0x1400_0000	Ether (LAN9220)		16bit
-- * 0x1600_0000	user area		-		cannot use with NAND
-- * 0x1800_0000	user area		-
-- * 0x1A00_0000	-
-- * 0x4000_0000	LPDDR2-SDRAM (POP)	32bit
-- */
--
--/*
-- * NOR Flash ROM
-- *
-- *  SW1  |     SW2    | SW7  | NOR Flash ROM
-- *  bit1 | bit1  bit2 | bit1 | Memory allocation
-- * ------+------------+------+------------------
-- *  OFF  | ON     OFF | ON   |    Area 0
-- *  OFF  | ON     OFF | OFF  |    Area 4
-- */
--
--/*
-- * NAND Flash ROM
-- *
-- *  SW1  |     SW2    | SW7  | NAND Flash ROM
-- *  bit1 | bit1  bit2 | bit2 | Memory allocation
-- * ------+------------+------+------------------
-- *  OFF  | ON     OFF | ON   |    FCE 0
-- *  OFF  | ON     OFF | OFF  |    FCE 1
-- */
--
--/*
-- * SMSC 9220
-- *
-- *  SW1		SMSC 9220
-- * -----------------------
-- *  ON		access disable
-- *  OFF		access enable
-- */
--
--/*
-- * LCD / IRQ / KEYSC / IrDA
-- *
-- * IRQ = IRQ26 (TS), IRQ27 (VIO), IRQ28 (QHD-TouchScreen)
-- * LCD = 2nd LCDC (WVGA)
-- *
-- * 		|		SW43			|
-- * SW3		|	ON		|	OFF	|
-- * -------------+-----------------------+---------------+
-- * ON		| KEY / IrDA		| LCD		|
-- * OFF		| KEY / IrDA / IRQ	| IRQ		|
-- *
-- *
-- * QHD / WVGA display
-- *
-- * You can choice display type on menuconfig.
-- * Then, check above dip-switch.
-- */
--
--/*
-- * USB
-- *
-- * J7 : 1-2  MAX3355E VBUS
-- *      2-3  DC 5.0V
-- *
-- * S39: bit2: off
-- */
--
--/*
-- * FSI/FSMI
-- *
-- * SW41	:  ON : SH-Mobile AP4 Audio Mode
-- *	: OFF : Bluetooth Audio Mode
-- *
-- * it needs amixer settings for playing
-- *
-- * amixer set "Headphone Enable" on
-- */
--
--/*
-- * MMC0/SDHI1 (CN7)
-- *
-- * J22 : select card voltage
-- *       1-2 pin : 1.8v
-- *       2-3 pin : 3.3v
-- *
-- *        SW1  |             SW33
-- *             | bit1 | bit2 | bit3 | bit4
-- * ------------+------+------+------+-------
-- * MMC0   OFF  |  OFF |  ON  |  ON  |  X
-- * SDHI1  OFF  |  ON  |   X  |  OFF | ON
-- *
-- * voltage lebel
-- * CN7 : 1.8v
-- * CN12: 3.3v
-- */
--
--/* Dummy supplies, where voltage doesn't matter */
--static struct regulator_consumer_supply fixed1v8_power_consumers[] =
--{
--	/* J22 default position: 1.8V */
--	REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.1"),
--	REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.1"),
--	REGULATOR_SUPPLY("vmmc", "sh_mmcif.0"),
--	REGULATOR_SUPPLY("vqmmc", "sh_mmcif.0"),
--};
--
--static struct regulator_consumer_supply fixed3v3_power_consumers[] =
--{
--	REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"),
--	REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"),
--};
--
--static struct regulator_consumer_supply dummy_supplies[] = {
--	REGULATOR_SUPPLY("vddvario", "smsc911x"),
--	REGULATOR_SUPPLY("vdd33a", "smsc911x"),
--};
--
--/* MTD */
--static struct mtd_partition nor_flash_partitions[] = {
--	{
--		.name		= "loader",
--		.offset		= 0x00000000,
--		.size		= 512 * 1024,
--		.mask_flags	= MTD_WRITEABLE,
--	},
--	{
--		.name		= "bootenv",
--		.offset		= MTDPART_OFS_APPEND,
--		.size		= 512 * 1024,
--		.mask_flags	= MTD_WRITEABLE,
--	},
--	{
--		.name		= "kernel_ro",
--		.offset		= MTDPART_OFS_APPEND,
--		.size		= 8 * 1024 * 1024,
--		.mask_flags	= MTD_WRITEABLE,
--	},
--	{
--		.name		= "kernel",
--		.offset		= MTDPART_OFS_APPEND,
--		.size		= 8 * 1024 * 1024,
--	},
--	{
--		.name		= "data",
--		.offset		= MTDPART_OFS_APPEND,
--		.size		= MTDPART_SIZ_FULL,
--	},
--};
--
--static struct physmap_flash_data nor_flash_data = {
--	.width		= 2,
--	.parts		= nor_flash_partitions,
--	.nr_parts	= ARRAY_SIZE(nor_flash_partitions),
--};
--
--static struct resource nor_flash_resources[] = {
--	[0]	= {
--		.start	= 0x20000000, /* CS0 shadow instead of regular CS0 */
--		.end	= 0x28000000 - 1, /* needed by USB MASK ROM boot */
--		.flags	= IORESOURCE_MEM,
--	}
--};
--
--static struct platform_device nor_flash_device = {
--	.name		= "physmap-flash",
--	.dev		= {
--		.platform_data	= &nor_flash_data,
--	},
--	.num_resources	= ARRAY_SIZE(nor_flash_resources),
--	.resource	= nor_flash_resources,
--};
--
--/* SMSC 9220 */
--static struct resource smc911x_resources[] = {
--	{
--		.start	= 0x14000000,
--		.end	= 0x16000000 - 1,
--		.flags	= IORESOURCE_MEM,
--	}, {
--		.start	= evt2irq(0x02c0) /* IRQ6A */,
--		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
--	},
--};
--
--static struct smsc911x_platform_config smsc911x_info = {
--	.flags		= SMSC911X_USE_16BIT | SMSC911X_SAVE_MAC_ADDRESS,
--	.irq_polarity   = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
--	.irq_type       = SMSC911X_IRQ_TYPE_PUSH_PULL,
--};
--
--static struct platform_device smc911x_device = {
--	.name           = "smsc911x",
--	.id             = -1,
--	.num_resources  = ARRAY_SIZE(smc911x_resources),
--	.resource       = smc911x_resources,
--	.dev            = {
--		.platform_data = &smsc911x_info,
--	},
--};
--
--/*
-- * The card detect pin of the top SD/MMC slot (CN7) is active low and is
-- * connected to GPIO A22 of SH7372 (GPIO 41).
-- */
--static int slot_cn7_get_cd(struct platform_device *pdev)
--{
--	return !gpio_get_value(41);
--}
--/* MERAM */
--static struct sh_mobile_meram_info meram_info = {
--	.addr_mode      = SH_MOBILE_MERAM_MODE1,
--};
--
--static struct resource meram_resources[] = {
--	[0] = {
--		.name	= "regs",
--		.start	= 0xe8000000,
--		.end	= 0xe807ffff,
--		.flags	= IORESOURCE_MEM,
--	},
--	[1] = {
--		.name	= "meram",
--		.start	= 0xe8080000,
--		.end	= 0xe81fffff,
--		.flags	= IORESOURCE_MEM,
--	},
--};
--
--static struct platform_device meram_device = {
--	.name           = "sh_mobile_meram",
--	.id             = 0,
--	.num_resources  = ARRAY_SIZE(meram_resources),
--	.resource       = meram_resources,
--	.dev            = {
--		.platform_data = &meram_info,
--	},
--};
--
--/* SH_MMCIF */
--static struct resource sh_mmcif_resources[] = {
--	[0] = {
--		.name	= "MMCIF",
--		.start	= 0xE6BD0000,
--		.end	= 0xE6BD00FF,
--		.flags	= IORESOURCE_MEM,
--	},
--	[1] = {
--		/* MMC ERR */
--		.start	= evt2irq(0x1ac0),
--		.flags	= IORESOURCE_IRQ,
--	},
--	[2] = {
--		/* MMC NOR */
--		.start	= evt2irq(0x1ae0),
--		.flags	= IORESOURCE_IRQ,
--	},
--};
--
--static struct sh_mmcif_plat_data sh_mmcif_plat = {
--	.sup_pclk	= 0,
--	.ocr		= MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
--	.caps		= MMC_CAP_4_BIT_DATA |
--			  MMC_CAP_8_BIT_DATA |
--			  MMC_CAP_NEEDS_POLL,
--	.get_cd		= slot_cn7_get_cd,
--	.slave_id_tx	= SHDMA_SLAVE_MMCIF_TX,
--	.slave_id_rx	= SHDMA_SLAVE_MMCIF_RX,
--};
--
--static struct platform_device sh_mmcif_device = {
--	.name		= "sh_mmcif",
--	.id		= 0,
--	.dev		= {
--		.dma_mask		= NULL,
--		.coherent_dma_mask	= 0xffffffff,
--		.platform_data		= &sh_mmcif_plat,
--	},
--	.num_resources	= ARRAY_SIZE(sh_mmcif_resources),
--	.resource	= sh_mmcif_resources,
--};
--
--/* SDHI0 */
--static struct sh_mobile_sdhi_info sdhi0_info = {
--	.dma_slave_tx	= SHDMA_SLAVE_SDHI0_TX,
--	.dma_slave_rx	= SHDMA_SLAVE_SDHI0_RX,
--	.tmio_caps	= MMC_CAP_SDIO_IRQ,
--};
--
--static struct resource sdhi0_resources[] = {
--	[0] = {
--		.name	= "SDHI0",
--		.start  = 0xe6850000,
--		.end    = 0xe68500ff,
--		.flags  = IORESOURCE_MEM,
--	},
--	[1] = {
--		.start	= evt2irq(0x0e00) /* SDHI0_SDHI0I0 */,
--		.flags	= IORESOURCE_IRQ,
--	},
--	[2] = {
--		.start	= evt2irq(0x0e20) /* SDHI0_SDHI0I1 */,
--		.flags	= IORESOURCE_IRQ,
--	},
--	[3] = {
--		.start	= evt2irq(0x0e40) /* SDHI0_SDHI0I2 */,
--		.flags	= IORESOURCE_IRQ,
--	},
--};
--
--static struct platform_device sdhi0_device = {
--	.name           = "sh_mobile_sdhi",
--	.num_resources  = ARRAY_SIZE(sdhi0_resources),
--	.resource       = sdhi0_resources,
--	.id             = 0,
--	.dev	= {
--		.platform_data	= &sdhi0_info,
--	},
--};
--
--/* SDHI1 */
--static struct sh_mobile_sdhi_info sdhi1_info = {
--	.dma_slave_tx	= SHDMA_SLAVE_SDHI1_TX,
--	.dma_slave_rx	= SHDMA_SLAVE_SDHI1_RX,
--	.tmio_ocr_mask	= MMC_VDD_165_195,
--	.tmio_flags	= TMIO_MMC_WRPROTECT_DISABLE,
--	.tmio_caps	= MMC_CAP_NEEDS_POLL | MMC_CAP_SDIO_IRQ,
--	.get_cd		= slot_cn7_get_cd,
--};
--
--static struct resource sdhi1_resources[] = {
--	[0] = {
--		.name	= "SDHI1",
--		.start  = 0xe6860000,
--		.end    = 0xe68600ff,
--		.flags  = IORESOURCE_MEM,
--	},
--	[1] = {
--		.start	= evt2irq(0x0e80), /* SDHI1_SDHI1I0 */
--		.flags	= IORESOURCE_IRQ,
--	},
--	[2] = {
--		.start	= evt2irq(0x0ea0), /* SDHI1_SDHI1I1 */
--		.flags	= IORESOURCE_IRQ,
--	},
--	[3] = {
--		.start	= evt2irq(0x0ec0), /* SDHI1_SDHI1I2 */
--		.flags	= IORESOURCE_IRQ,
--	},
--};
--
--static struct platform_device sdhi1_device = {
--	.name           = "sh_mobile_sdhi",
--	.num_resources  = ARRAY_SIZE(sdhi1_resources),
--	.resource       = sdhi1_resources,
--	.id             = 1,
--	.dev	= {
--		.platform_data	= &sdhi1_info,
--	},
--};
--
--/* USB1 */
--static void usb1_host_port_power(int port, int power)
--{
--	if (!power) /* only power-on supported for now */
--		return;
--
--	/* set VBOUT/PWEN and EXTLP1 in DVSTCTR */
--	__raw_writew(__raw_readw(IOMEM(0xE68B0008)) | 0x600, IOMEM(0xE68B0008));
--}
--
--static struct r8a66597_platdata usb1_host_data = {
--	.on_chip	= 1,
--	.port_power	= usb1_host_port_power,
--};
--
--static struct resource usb1_host_resources[] = {
--	[0] = {
--		.name	= "USBHS",
--		.start	= 0xE68B0000,
--		.end	= 0xE68B00E6 - 1,
--		.flags	= IORESOURCE_MEM,
--	},
--	[1] = {
--		.start	= evt2irq(0x1ce0) /* USB1_USB1I0 */,
--		.flags	= IORESOURCE_IRQ,
--	},
--};
--
--static struct platform_device usb1_host_device = {
--	.name	= "r8a66597_hcd",
--	.id	= 1,
--	.dev = {
--		.dma_mask		= NULL,         /*  not use dma */
--		.coherent_dma_mask	= 0xffffffff,
--		.platform_data		= &usb1_host_data,
--	},
--	.num_resources	= ARRAY_SIZE(usb1_host_resources),
--	.resource	= usb1_host_resources,
--};
--
--/*
-- * QHD display
-- */
--#ifdef CONFIG_AP4EVB_QHD
--
--/* KEYSC (Needs SW43 set to ON) */
--static struct sh_keysc_info keysc_info = {
--	.mode		= SH_KEYSC_MODE_1,
--	.scan_timing	= 3,
--	.delay		= 2500,
--	.keycodes = {
--		KEY_0, KEY_1, KEY_2, KEY_3, KEY_4,
--		KEY_5, KEY_6, KEY_7, KEY_8, KEY_9,
--		KEY_A, KEY_B, KEY_C, KEY_D, KEY_E,
--		KEY_F, KEY_G, KEY_H, KEY_I, KEY_J,
--		KEY_K, KEY_L, KEY_M, KEY_N, KEY_O,
--	},
--};
--
--static struct resource keysc_resources[] = {
--	[0] = {
--		.name	= "KEYSC",
--		.start  = 0xe61b0000,
--		.end    = 0xe61b0063,
--		.flags  = IORESOURCE_MEM,
--	},
--	[1] = {
--		.start  = evt2irq(0x0be0), /* KEYSC_KEY */
--		.flags  = IORESOURCE_IRQ,
--	},
--};
--
--static struct platform_device keysc_device = {
--	.name           = "sh_keysc",
--	.id             = 0, /* "keysc0" clock */
--	.num_resources  = ARRAY_SIZE(keysc_resources),
--	.resource       = keysc_resources,
--	.dev	= {
--		.platform_data	= &keysc_info,
--	},
--};
--
--/* MIPI-DSI */
--static int sh_mipi_set_dot_clock(struct platform_device *pdev,
--				 void __iomem *base,
--				 int enable)
--{
--	struct clk *pck = clk_get(&pdev->dev, "dsip_clk");
--
--	if (IS_ERR(pck))
--		return PTR_ERR(pck);
--
--	if (enable) {
--		/*
--		 * DSIPCLK	= 24MHz
--		 * D-PHY	= DSIPCLK * ((0x6*2)+1) = 312MHz (see .phyctrl)
--		 * HsByteCLK	= D-PHY/8 = 39MHz
--		 *
--		 *  X * Y * FPS =
--		 * (544+72+600+16) * (961+8+8+2) * 30 = 36.1MHz
--		 */
--		clk_set_rate(pck, clk_round_rate(pck, 24000000));
--		clk_enable(pck);
--	} else {
--		clk_disable(pck);
--	}
--
--	clk_put(pck);
--
--	return 0;
--}
--
--static struct resource mipidsi0_resources[] = {
--	[0] = {
--		.start  = 0xffc60000,
--		.end    = 0xffc63073,
--		.flags  = IORESOURCE_MEM,
--	},
--	[1] = {
--		.start  = 0xffc68000,
--		.end    = 0xffc680ef,
--		.flags  = IORESOURCE_MEM,
--	},
--};
--
--static struct sh_mipi_dsi_info mipidsi0_info = {
--	.data_format	= MIPI_RGB888,
--	.channel	= LCDC_CHAN_MAINLCD,
--	.lane		= 2,
--	.vsynw_offset	= 17,
--	.phyctrl	= 0x6 << 8,
--	.flags		= SH_MIPI_DSI_SYNC_PULSES_MODE |
--			  SH_MIPI_DSI_HSbyteCLK,
--	.set_dot_clock	= sh_mipi_set_dot_clock,
--};
--
--static struct platform_device mipidsi0_device = {
--	.name           = "sh-mipi-dsi",
--	.num_resources  = ARRAY_SIZE(mipidsi0_resources),
--	.resource       = mipidsi0_resources,
--	.id             = 0,
--	.dev	= {
--		.platform_data	= &mipidsi0_info,
--	},
--};
--
--static struct platform_device *qhd_devices[] __initdata = {
--	&mipidsi0_device,
--	&keysc_device,
--};
--#endif /* CONFIG_AP4EVB_QHD */
--
--/* LCDC0 */
--static const struct fb_videomode ap4evb_lcdc_modes[] = {
--	{
--#ifdef CONFIG_AP4EVB_QHD
--		.name		= "R63302(QHD)",
--		.xres		= 544,
--		.yres		= 961,
--		.left_margin	= 72,
--		.right_margin	= 600,
--		.hsync_len	= 16,
--		.upper_margin	= 8,
--		.lower_margin	= 8,
--		.vsync_len	= 2,
--		.sync		= FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
--#else
--		.name		= "WVGA Panel",
--		.xres		= 800,
--		.yres		= 480,
--		.left_margin	= 220,
--		.right_margin	= 110,
--		.hsync_len	= 70,
--		.upper_margin	= 20,
--		.lower_margin	= 5,
--		.vsync_len	= 5,
--		.sync		= 0,
--#endif
--	},
--};
--
--static const struct sh_mobile_meram_cfg lcd_meram_cfg = {
--	.icb[0] = {
--		.meram_size     = 0x40,
--	},
--	.icb[1] = {
--		.meram_size     = 0x40,
--	},
--};
--
--static struct sh_mobile_lcdc_info lcdc_info = {
--	.meram_dev = &meram_info,
--	.ch[0] = {
--		.chan = LCDC_CHAN_MAINLCD,
--		.fourcc = V4L2_PIX_FMT_RGB565,
--		.lcd_modes = ap4evb_lcdc_modes,
--		.num_modes = ARRAY_SIZE(ap4evb_lcdc_modes),
--		.meram_cfg = &lcd_meram_cfg,
--#ifdef CONFIG_AP4EVB_QHD
--		.tx_dev = &mipidsi0_device,
--#endif
--	}
--};
--
--static struct resource lcdc_resources[] = {
--	[0] = {
--		.name	= "LCDC",
--		.start	= 0xfe940000, /* P4-only space */
--		.end	= 0xfe943fff,
--		.flags	= IORESOURCE_MEM,
--	},
--	[1] = {
--		.start	= intcs_evt2irq(0x580),
--		.flags	= IORESOURCE_IRQ,
--	},
--};
--
--static struct platform_device lcdc_device = {
--	.name		= "sh_mobile_lcdc_fb",
--	.num_resources	= ARRAY_SIZE(lcdc_resources),
--	.resource	= lcdc_resources,
--	.dev	= {
--		.platform_data	= &lcdc_info,
--		.coherent_dma_mask = ~0,
--	},
--};
--
--/* FSI */
--#define IRQ_FSI		evt2irq(0x1840)
--static struct sh_fsi_platform_info fsi_info = {
--	.port_b = {
--		.flags		= SH_FSI_CLK_CPG |
--				  SH_FSI_FMT_SPDIF,
--	},
--};
--
--static struct resource fsi_resources[] = {
--	[0] = {
--		.name	= "FSI",
--		.start	= 0xFE3C0000,
--		.end	= 0xFE3C0400 - 1,
--		.flags	= IORESOURCE_MEM,
--	},
--	[1] = {
--		.start  = IRQ_FSI,
--		.flags  = IORESOURCE_IRQ,
--	},
--};
--
--static struct platform_device fsi_device = {
--	.name		= "sh_fsi2",
--	.id		= -1,
--	.num_resources	= ARRAY_SIZE(fsi_resources),
--	.resource	= fsi_resources,
--	.dev	= {
--		.platform_data	= &fsi_info,
--	},
--};
--
--static struct asoc_simple_card_info fsi2_ak4643_info = {
--	.name		= "AK4643",
--	.card		= "FSI2A-AK4643",
--	.codec		= "ak4642-codec.0-0013",
--	.platform	= "sh_fsi2",
--	.daifmt		= SND_SOC_DAIFMT_LEFT_J,
--	.cpu_dai = {
--		.name	= "fsia-dai",
--		.fmt	= SND_SOC_DAIFMT_CBS_CFS,
--	},
--	.codec_dai = {
--		.name	= "ak4642-hifi",
--		.fmt	= SND_SOC_DAIFMT_CBM_CFM,
--		.sysclk	= 11289600,
--	},
--};
--
--static struct platform_device fsi_ak4643_device = {
--	.name	= "asoc-simple-card",
--	.dev	= {
--		.platform_data	= &fsi2_ak4643_info,
--	},
--};
--
--/* LCDC1 */
--static long ap4evb_clk_optimize(unsigned long target, unsigned long *best_freq,
--				unsigned long *parent_freq);
--
--static struct sh_mobile_hdmi_info hdmi_info = {
--	.flags = HDMI_SND_SRC_SPDIF,
--	.clk_optimize_parent = ap4evb_clk_optimize,
--};
--
--static struct resource hdmi_resources[] = {
--	[0] = {
--		.name	= "HDMI",
--		.start	= 0xe6be0000,
--		.end	= 0xe6be00ff,
--		.flags	= IORESOURCE_MEM,
--	},
--	[1] = {
--		/* There's also an HDMI interrupt on INTCS @ 0x18e0 */
--		.start	= evt2irq(0x17e0),
--		.flags	= IORESOURCE_IRQ,
--	},
--};
--
--static struct platform_device hdmi_device = {
--	.name		= "sh-mobile-hdmi",
--	.num_resources	= ARRAY_SIZE(hdmi_resources),
--	.resource	= hdmi_resources,
--	.id             = -1,
--	.dev	= {
--		.platform_data	= &hdmi_info,
--	},
--};
--
--static long ap4evb_clk_optimize(unsigned long target, unsigned long *best_freq,
--				unsigned long *parent_freq)
--{
--	struct clk *hdmi_ick = clk_get(&hdmi_device.dev, "ick");
--	long error;
--
--	if (IS_ERR(hdmi_ick)) {
--		int ret = PTR_ERR(hdmi_ick);
--		pr_err("Cannot get HDMI ICK: %d\n", ret);
--		return ret;
--	}
--
--	error = clk_round_parent(hdmi_ick, target, best_freq, parent_freq, 1, 64);
--
--	clk_put(hdmi_ick);
--
--	return error;
--}
--
--static const struct sh_mobile_meram_cfg hdmi_meram_cfg = {
--	.icb[0] = {
--		.meram_size     = 0x100,
--	},
--	.icb[1] = {
--		.meram_size     = 0x100,
--	},
--};
--
--static struct sh_mobile_lcdc_info sh_mobile_lcdc1_info = {
--	.clock_source = LCDC_CLK_EXTERNAL,
--	.meram_dev = &meram_info,
--	.ch[0] = {
--		.chan = LCDC_CHAN_MAINLCD,
--		.fourcc = V4L2_PIX_FMT_RGB565,
--		.interface_type = RGB24,
--		.clock_divider = 1,
--		.flags = LCDC_FLAGS_DWPOL,
--		.meram_cfg = &hdmi_meram_cfg,
--		.tx_dev = &hdmi_device,
--	}
--};
--
--static struct resource lcdc1_resources[] = {
--	[0] = {
--		.name	= "LCDC1",
--		.start	= 0xfe944000,
--		.end	= 0xfe947fff,
--		.flags	= IORESOURCE_MEM,
--	},
--	[1] = {
--		.start	= intcs_evt2irq(0x1780),
--		.flags	= IORESOURCE_IRQ,
--	},
--};
--
--static struct platform_device lcdc1_device = {
--	.name		= "sh_mobile_lcdc_fb",
--	.num_resources	= ARRAY_SIZE(lcdc1_resources),
--	.resource	= lcdc1_resources,
--	.id             = 1,
--	.dev	= {
--		.platform_data	= &sh_mobile_lcdc1_info,
--		.coherent_dma_mask = ~0,
--	},
--};
--
--static struct asoc_simple_card_info fsi2_hdmi_info = {
--	.name		= "HDMI",
--	.card		= "FSI2B-HDMI",
--	.codec		= "sh-mobile-hdmi",
--	.platform	= "sh_fsi2",
--	.cpu_dai = {
--		.name	= "fsib-dai",
--		.fmt	= SND_SOC_DAIFMT_CBM_CFM | SND_SOC_DAIFMT_IB_NF,
--	},
--	.codec_dai = {
--		.name	= "sh_mobile_hdmi-hifi",
--	},
--};
--
--static struct platform_device fsi_hdmi_device = {
--	.name	= "asoc-simple-card",
--	.id	= 1,
--	.dev	= {
--		.platform_data	= &fsi2_hdmi_info,
--	},
--};
--
--static struct gpio_led ap4evb_leds[] = {
--	{
--		.name			= "led4",
--		.gpio			= 185,
--		.default_state	= LEDS_GPIO_DEFSTATE_ON,
--	},
--	{
--		.name			= "led2",
--		.gpio			= 186,
--		.default_state	= LEDS_GPIO_DEFSTATE_ON,
--	},
--	{
--		.name			= "led3",
--		.gpio			= 187,
--		.default_state	= LEDS_GPIO_DEFSTATE_ON,
--	},
--	{
--		.name			= "led1",
--		.gpio			= 188,
--		.default_state	= LEDS_GPIO_DEFSTATE_ON,
--	}
--};
--
--static struct gpio_led_platform_data ap4evb_leds_pdata = {
--	.num_leds = ARRAY_SIZE(ap4evb_leds),
--	.leds = ap4evb_leds,
--};
--
--static struct platform_device leds_device = {
--	.name = "leds-gpio",
--	.id = 0,
--	.dev = {
--		.platform_data  = &ap4evb_leds_pdata,
--	},
--};
--
--static struct i2c_board_info imx074_info = {
--	I2C_BOARD_INFO("imx074", 0x1a),
--};
--
--static struct soc_camera_link imx074_link = {
--	.bus_id		= 0,
--	.board_info	= &imx074_info,
--	.i2c_adapter_id	= 0,
--	.module_name	= "imx074",
--};
--
--static struct platform_device ap4evb_camera = {
--	.name   = "soc-camera-pdrv",
--	.id     = 0,
--	.dev    = {
--		.platform_data = &imx074_link,
--	},
--};
--
--static struct sh_csi2_client_config csi2_clients[] = {
--	{
--		.phy		= SH_CSI2_PHY_MAIN,
--		.lanes		= 0,		/* default: 2 lanes */
--		.channel	= 0,
--		.pdev		= &ap4evb_camera,
--	},
--};
--
--static struct sh_csi2_pdata csi2_info = {
--	.type		= SH_CSI2C,
--	.clients	= csi2_clients,
--	.num_clients	= ARRAY_SIZE(csi2_clients),
--	.flags		= SH_CSI2_ECC | SH_CSI2_CRC,
--};
--
--static struct resource csi2_resources[] = {
--	[0] = {
--		.name	= "CSI2",
--		.start	= 0xffc90000,
--		.end	= 0xffc90fff,
--		.flags	= IORESOURCE_MEM,
--	},
--	[1] = {
--		.start	= intcs_evt2irq(0x17a0),
--		.flags  = IORESOURCE_IRQ,
--	},
--};
--
--static struct sh_mobile_ceu_companion csi2 = {
--	.id		= 0,
--	.num_resources	= ARRAY_SIZE(csi2_resources),
--	.resource	= csi2_resources,
--	.platform_data	= &csi2_info,
--};
--
--static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
--	.flags = SH_CEU_FLAG_USE_8BIT_BUS,
--	.max_width = 8188,
--	.max_height = 8188,
--	.csi2 = &csi2,
--};
--
--static struct resource ceu_resources[] = {
--	[0] = {
--		.name	= "CEU",
--		.start	= 0xfe910000,
--		.end	= 0xfe91009f,
--		.flags	= IORESOURCE_MEM,
--	},
--	[1] = {
--		.start	= intcs_evt2irq(0x880),
--		.flags  = IORESOURCE_IRQ,
--	},
--	[2] = {
--		/* place holder for contiguous memory */
--	},
--};
--
--static struct platform_device ceu_device = {
--	.name		= "sh_mobile_ceu",
--	.id             = 0, /* "ceu0" clock */
--	.num_resources	= ARRAY_SIZE(ceu_resources),
--	.resource	= ceu_resources,
--	.dev	= {
--		.platform_data		= &sh_mobile_ceu_info,
--		.coherent_dma_mask	= 0xffffffff,
--	},
--};
--
--static struct platform_device *ap4evb_devices[] __initdata = {
--	&leds_device,
--	&nor_flash_device,
--	&smc911x_device,
--	&sdhi0_device,
--	&sdhi1_device,
--	&usb1_host_device,
--	&fsi_device,
--	&fsi_ak4643_device,
--	&fsi_hdmi_device,
--	&sh_mmcif_device,
--	&hdmi_device,
--	&lcdc_device,
--	&lcdc1_device,
--	&ceu_device,
--	&ap4evb_camera,
--	&meram_device,
--};
--
--static void __init hdmi_init_pm_clock(void)
--{
--	struct clk *hdmi_ick = clk_get(&hdmi_device.dev, "ick");
--	int ret;
--	long rate;
--
--	if (IS_ERR(hdmi_ick)) {
--		ret = PTR_ERR(hdmi_ick);
--		pr_err("Cannot get HDMI ICK: %d\n", ret);
--		goto out;
--	}
--
--	ret = clk_set_parent(&sh7372_pllc2_clk, &sh7372_dv_clki_div2_clk);
--	if (ret < 0) {
--		pr_err("Cannot set PLLC2 parent: %d, %d users\n", ret, sh7372_pllc2_clk.usecount);
--		goto out;
--	}
--
--	pr_debug("PLLC2 initial frequency %lu\n", clk_get_rate(&sh7372_pllc2_clk));
--
--	rate = clk_round_rate(&sh7372_pllc2_clk, 594000000);
--	if (rate < 0) {
--		pr_err("Cannot get suitable rate: %ld\n", rate);
--		ret = rate;
--		goto out;
--	}
--
--	ret = clk_set_rate(&sh7372_pllc2_clk, rate);
--	if (ret < 0) {
--		pr_err("Cannot set rate %ld: %d\n", rate, ret);
--		goto out;
--	}
--
--	pr_debug("PLLC2 set frequency %lu\n", rate);
--
--	ret = clk_set_parent(hdmi_ick, &sh7372_pllc2_clk);
--	if (ret < 0)
--		pr_err("Cannot set HDMI parent: %d\n", ret);
--
--out:
--	if (!IS_ERR(hdmi_ick))
--		clk_put(hdmi_ick);
--}
--
--/* TouchScreen */
--#ifdef CONFIG_AP4EVB_QHD
--# define GPIO_TSC_PORT	123
--#else /* WVGA */
--# define GPIO_TSC_PORT	40
--#endif
--
--#define IRQ28	evt2irq(0x3380) /* IRQ28A */
--#define IRQ7	evt2irq(0x02e0) /* IRQ7A */
--static int ts_get_pendown_state(void)
--{
--	return !gpio_get_value(GPIO_TSC_PORT);
--}
--
--static int ts_init(void)
--{
--	gpio_request_one(GPIO_TSC_PORT, GPIOF_IN, NULL);
--
--	return 0;
--}
--
--static struct tsc2007_platform_data tsc2007_info = {
--	.model			= 2007,
--	.x_plate_ohms		= 180,
--	.get_pendown_state	= ts_get_pendown_state,
--	.init_platform_hw	= ts_init,
--};
--
--static struct i2c_board_info tsc_device = {
--	I2C_BOARD_INFO("tsc2007", 0x48),
--	.type		= "tsc2007",
--	.platform_data	= &tsc2007_info,
--	/*.irq is selected on ap4evb_init */
--};
--
--/* I2C */
--static struct i2c_board_info i2c0_devices[] = {
--	{
--		I2C_BOARD_INFO("ak4643", 0x13),
--	},
--};
--
--static struct i2c_board_info i2c1_devices[] = {
--	{
--		I2C_BOARD_INFO("r2025sd", 0x32),
--	},
--};
--
--
--static const struct pinctrl_map ap4evb_pinctrl_map[] = {
--	/* CEU */
--	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_ceu.0", "pfc-sh7372",
--				  "ceu_clk_0", "ceu"),
--	/* FSIA (AK4643) */
--	PIN_MAP_MUX_GROUP_DEFAULT("asoc-simple-card.0", "pfc-sh7372",
--				  "fsia_sclk_in", "fsia"),
--	PIN_MAP_MUX_GROUP_DEFAULT("asoc-simple-card.0", "pfc-sh7372",
--				  "fsia_data_in", "fsia"),
--	PIN_MAP_MUX_GROUP_DEFAULT("asoc-simple-card.0", "pfc-sh7372",
--				  "fsia_data_out", "fsia"),
--	/* FSIB (HDMI) */
--	PIN_MAP_MUX_GROUP_DEFAULT("asoc-simple-card.1", "pfc-sh7372",
--				  "fsib_mclk_in", "fsib"),
--	/* HDMI */
--	PIN_MAP_MUX_GROUP_DEFAULT("sh-mobile-hdmi", "pfc-sh7372",
--				  "hdmi", "hdmi"),
--	/* KEYSC */
--	PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc", "pfc-sh7372",
--				  "keysc_in04_0", "keysc"),
--	PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc", "pfc-sh7372",
--				  "keysc_out5", "keysc"),
--#ifndef CONFIG_AP4EVB_QHD
--	/* LCDC */
--	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_lcdc_fb.0", "pfc-sh7372",
--				  "lcd_data18", "lcd"),
--	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_lcdc_fb.0", "pfc-sh7372",
--				  "lcd_sync", "lcd"),
--#endif
--	/* MMCIF */
--	PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh7372",
--				  "mmc0_data8_0", "mmc0"),
--	PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh7372",
--				  "mmc0_ctrl_0", "mmc0"),
--	/* SCIFA0 */
--	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-sh7372",
--				  "scifa0_data", "scifa0"),
--	/* SDHI0 */
--	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh7372",
--				  "sdhi0_data4", "sdhi0"),
--	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh7372",
--				  "sdhi0_ctrl", "sdhi0"),
--	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh7372",
--				  "sdhi0_cd", "sdhi0"),
--	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh7372",
--				  "sdhi0_wp", "sdhi0"),
--	/* SDHI1 */
--	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-sh7372",
--				  "sdhi1_data4", "sdhi1"),
--	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-sh7372",
--				  "sdhi1_ctrl", "sdhi1"),
--	/* SMSC911X */
--	PIN_MAP_MUX_GROUP_DEFAULT("smsc911x", "pfc-sh7372",
--				  "bsc_cs5a", "bsc"),
--	PIN_MAP_MUX_GROUP_DEFAULT("smsc911x", "pfc-sh7372",
--				  "intc_irq6_0", "intc"),
--	/* TSC2007 */
--#ifdef CONFIG_AP4EVB_QHD
--	PIN_MAP_MUX_GROUP_DEFAULT("1-0048", "pfc-sh7372",
--				  "intc_irq28_0", "intc"),
--#else /* WVGA */
--	PIN_MAP_MUX_GROUP_DEFAULT("1-0048", "pfc-sh7372",
--				  "intc_irq7_0", "intc"),
--#endif
--	/* USBHS1 */
--	PIN_MAP_MUX_GROUP_DEFAULT("r8a66597_hcd.1", "pfc-sh7372",
--				  "usb1_vbus", "usb1"),
--	PIN_MAP_MUX_GROUP_DEFAULT("r8a66597_hcd.1", "pfc-sh7372",
--				  "usb1_otg_id_0", "usb1"),
--	PIN_MAP_MUX_GROUP_DEFAULT("r8a66597_hcd.1", "pfc-sh7372",
--				  "usb1_otg_ctrl_0", "usb1"),
--};
--
--#define GPIO_PORT9CR	IOMEM(0xE6051009)
--#define GPIO_PORT10CR	IOMEM(0xE605100A)
--#define USCCR1		IOMEM(0xE6058144)
--static void __init ap4evb_init(void)
--{
--	struct pm_domain_device domain_devices[] = {
--		{ "A4LC", &lcdc1_device, },
--		{ "A4LC", &lcdc_device, },
--		{ "A4MP", &fsi_device, },
--		{ "A3SP", &sh_mmcif_device, },
--		{ "A3SP", &sdhi0_device, },
--		{ "A3SP", &sdhi1_device, },
--		{ "A4R", &ceu_device, },
--	};
--	u32 srcr4;
--	struct clk *clk;
--
--	regulator_register_always_on(0, "fixed-1.8V", fixed1v8_power_consumers,
--				     ARRAY_SIZE(fixed1v8_power_consumers), 1800000);
--	regulator_register_always_on(1, "fixed-3.3V", fixed3v3_power_consumers,
--				     ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
--	regulator_register_fixed(2, dummy_supplies, ARRAY_SIZE(dummy_supplies));
--
--	/* External clock source */
--	clk_set_rate(&sh7372_dv_clki_clk, 27000000);
--
--	pinctrl_register_mappings(ap4evb_pinctrl_map,
--				  ARRAY_SIZE(ap4evb_pinctrl_map));
--	sh7372_pinmux_init();
--
--	/* enable Debug switch (S6) */
--	gpio_request_one(32, GPIOF_IN | GPIOF_EXPORT, NULL);
--	gpio_request_one(33, GPIOF_IN | GPIOF_EXPORT, NULL);
--	gpio_request_one(34, GPIOF_IN | GPIOF_EXPORT, NULL);
--	gpio_request_one(35, GPIOF_IN | GPIOF_EXPORT, NULL);
--
--	/* setup USB phy */
--	__raw_writew(0x8a0a, IOMEM(0xE6058130));	/* USBCR4 */
--
--	/* FSI2 port A (ak4643) */
--	gpio_request_one(161, GPIOF_OUT_INIT_LOW, NULL); /* slave */
--
--	gpio_request(9, NULL);
--	gpio_request(10, NULL);
--	gpio_direction_none(GPIO_PORT9CR);  /* FSIAOBT needs no direction */
--	gpio_direction_none(GPIO_PORT10CR); /* FSIAOLR needs no direction */
--
--	/* card detect pin for MMC slot (CN7) */
--	gpio_request_one(41, GPIOF_IN, NULL);
--
--	/* FSI2 port B (HDMI) */
--	__raw_writew(__raw_readw(USCCR1) & ~(1 << 6), USCCR1); /* use SPDIF */
--
--	/* set SPU2 clock to 119.6 MHz */
--	clk = clk_get(NULL, "spu_clk");
--	if (!IS_ERR(clk)) {
--		clk_set_rate(clk, clk_round_rate(clk, 119600000));
--		clk_put(clk);
--	}
--
--	/*
--	 * set irq priority, to avoid sound chopping
--	 * when NFS rootfs is used
--	 *  FSI(3) > SMSC911X(2)
--	 */
--	intc_set_priority(IRQ_FSI, 3);
--
--	i2c_register_board_info(0, i2c0_devices,
--				ARRAY_SIZE(i2c0_devices));
--
--	i2c_register_board_info(1, i2c1_devices,
--				ARRAY_SIZE(i2c1_devices));
--
--#ifdef CONFIG_AP4EVB_QHD
--
--	/*
--	 * For QHD Panel (MIPI-DSI, CONFIG_AP4EVB_QHD=y) and
--	 * IRQ28 for Touch Panel, set dip switches S3, S43 as OFF, ON.
--	 */
--
--	/* enable TouchScreen */
--	irq_set_irq_type(IRQ28, IRQ_TYPE_LEVEL_LOW);
--
--	tsc_device.irq = IRQ28;
--	i2c_register_board_info(1, &tsc_device, 1);
--
--	/* LCDC0 */
--	lcdc_info.clock_source			= LCDC_CLK_PERIPHERAL;
--	lcdc_info.ch[0].interface_type		= RGB24;
--	lcdc_info.ch[0].clock_divider		= 1;
--	lcdc_info.ch[0].flags			= LCDC_FLAGS_DWPOL;
--	lcdc_info.ch[0].panel_cfg.width		= 44;
--	lcdc_info.ch[0].panel_cfg.height	= 79;
--
--	platform_add_devices(qhd_devices, ARRAY_SIZE(qhd_devices));
--
--#else
--	/*
--	 * For WVGA Panel (18-bit RGB, CONFIG_AP4EVB_WVGA=y) and
--	 * IRQ7 for Touch Panel, set dip switches S3, S43 to ON, OFF.
--	 */
--	gpio_request_one(189, GPIOF_OUT_INIT_HIGH, NULL); /* backlight */
--	gpio_request_one(151, GPIOF_OUT_INIT_HIGH, NULL); /* LCDDON */
--
--	lcdc_info.clock_source			= LCDC_CLK_BUS;
--	lcdc_info.ch[0].interface_type		= RGB18;
--	lcdc_info.ch[0].clock_divider		= 3;
--	lcdc_info.ch[0].flags			= 0;
--	lcdc_info.ch[0].panel_cfg.width		= 152;
--	lcdc_info.ch[0].panel_cfg.height	= 91;
--
--	/* enable TouchScreen */
--	irq_set_irq_type(IRQ7, IRQ_TYPE_LEVEL_LOW);
--
--	tsc_device.irq = IRQ7;
--	i2c_register_board_info(0, &tsc_device, 1);
--#endif /* CONFIG_AP4EVB_QHD */
--
--	/* CEU */
--
--	/*
--	 * TODO: reserve memory for V4L2 DMA buffers, when a suitable API
--	 * becomes available
--	 */
--
--	/* MIPI-CSI stuff */
--	clk = clk_get(NULL, "vck1_clk");
--	if (!IS_ERR(clk)) {
--		clk_set_rate(clk, clk_round_rate(clk, 13000000));
--		clk_enable(clk);
--		clk_put(clk);
--	}
--
--	sh7372_add_standard_devices();
--
--	/* Reset HDMI, must be held at least one EXTALR (32768Hz) period */
--#define SRCR4 IOMEM(0xe61580bc)
--	srcr4 = __raw_readl(SRCR4);
--	__raw_writel(srcr4 | (1 << 13), SRCR4);
--	udelay(50);
--	__raw_writel(srcr4 & ~(1 << 13), SRCR4);
--
--	platform_add_devices(ap4evb_devices, ARRAY_SIZE(ap4evb_devices));
--
--	rmobile_add_devices_to_domains(domain_devices,
--				       ARRAY_SIZE(domain_devices));
--
--	hdmi_init_pm_clock();
--	sh7372_pm_init();
--	pm_clk_add(&fsi_device.dev, "spu2");
--	pm_clk_add(&lcdc1_device.dev, "hdmi");
--}
--
--MACHINE_START(AP4EVB, "ap4evb")
--	.map_io		= sh7372_map_io,
--	.init_early	= sh7372_add_early_devices,
--	.init_irq	= sh7372_init_irq,
--	.handle_irq	= shmobile_handle_irq_intc,
--	.init_machine	= ap4evb_init,
--	.init_late	= sh7372_pm_init_late,
--	.init_time	= sh7372_earlytimer_init,
--MACHINE_END
-diff --git a/arch/arm/mach-shmobile/include/mach/head-ap4evb.txt b/arch/arm/mach-shmobile/include/mach/head-ap4evb.txt
-deleted file mode 100644
-index 9f134dfe..00000000
---- a/arch/arm/mach-shmobile/include/mach/head-ap4evb.txt
-+++ /dev/null
-@@ -1,93 +0,0 @@
--LIST "partner-jet-setup.txt"
--LIST "(C) Copyright 2010 Renesas Solutions Corp"
--LIST "Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>"
--
--LIST "RWT Setting"
--EW 0xE6020004, 0xA500
--EW 0xE6030004, 0xA500
--
--LIST "GPIO Setting"
--EB 0xE6051013, 0xA2
--
--LIST "CPG"
--ED 0xE61500C0, 0x00000002
--
--WAIT 1, 0xFE40009C
--
--LIST "FRQCR"
--ED 0xE6150000, 0x2D1305C3
--ED 0xE61500E0, 0x9E40358E
--ED 0xE6150004, 0x80331050
--
--WAIT 1, 0xFE40009C
--
--ED 0xE61500E4, 0x00002000
--
--WAIT 1, 0xFE40009C
--
--LIST "PLL"
--ED 0xE6150028, 0x00004000
--
--WAIT 1, 0xFE40009C
--
--ED 0xE615002C, 0x93000040
--
--WAIT 1, 0xFE40009C
--
--LIST "SUB/USBClk"
--ED 0xE6150080, 0x00000180
--
--LIST "BSC"
--ED 0xFEC10000, 0x00E0001B
--
--LIST "SBSC1"
--ED 0xFE400354, 0x01AD8000
--ED 0xFE400354, 0x01AD8001
--
--WAIT 5, 0xFE40009C
--
--ED 0xFE400008, 0xBCC90151
--ED 0xFE400040, 0x41774113
--ED 0xFE400044, 0x2712E229
--ED 0xFE400048, 0x20C18505
--ED 0xFE40004C, 0x00110209
--ED 0xFE400010, 0x00000087
--
--WAIT 30, 0xFE40009C
--
--ED 0xFE400084, 0x0000003F
--EB 0xFE500000, 0x00
--
--WAIT 5, 0xFE40009C
--
--ED 0xFE400084, 0x0000FF0A
--EB 0xFE500000, 0x00
--
--WAIT 1, 0xFE40009C
--
--ED 0xFE400084, 0x00002201
--EB 0xFE500000, 0x00
--ED 0xFE400084, 0x00000302
--EB 0xFE500000, 0x00
--EB 0xFE5C0000, 0x00
--ED 0xFE400008, 0xBCC90159
--ED 0xFE40008C, 0x88800004
--ED 0xFE400094, 0x00000004
--ED 0xFE400028, 0xA55A0032
--ED 0xFE40002C, 0xA55A000C
--ED 0xFE400020, 0xA55A2048
--ED 0xFE400008, 0xBCC90959
--
--LIST "Change CPGA setting"
--ED 0xE61500E0, 0x9E40352E
--ED 0xE6150004, 0x80331050
--
--WAIT 1, 0xFE40009C
--
--ED 0xFE400354, 0x01AD8002
--
--LIST "SCIF0 - Serial port for earlyprintk"
--EB 0xE6053098, 0xe1
--EW 0xE6C40000, 0x0000
--EB 0xE6C40004, 0x19
--EW 0xE6C40008, 0x0030
-diff --git a/arch/arm/mach-shmobile/include/mach/mmc-ap4eb.h b/arch/arm/mach-shmobile/include/mach/mmc-ap4eb.h
-deleted file mode 100644
-index db59fdbd..00000000
---- a/arch/arm/mach-shmobile/include/mach/mmc-ap4eb.h
-+++ /dev/null
-@@ -1,29 +0,0 @@
--#ifndef MMC_AP4EB_H
--#define MMC_AP4EB_H
--
--#define PORT185CR      (void __iomem *)0xe60520b9
--#define PORT186CR      (void __iomem *)0xe60520ba
--#define PORT187CR      (void __iomem *)0xe60520bb
--#define PORT188CR      (void __iomem *)0xe60520bc
--
--#define PORTR191_160DR (void __iomem *)0xe6056014
--
--static inline void mmc_init_progress(void)
--{
--       /* Initialise LEDS1-4
--        * registers: PORT185CR-PORT188CR (LED1-LED4 Control)
--        * value:     0x10 - enable output
--        */
--       __raw_writeb(0x10, PORT185CR);
--       __raw_writeb(0x10, PORT186CR);
--       __raw_writeb(0x10, PORT187CR);
--       __raw_writeb(0x10, PORT188CR);
--}
--
--static inline void mmc_update_progress(int n)
--{
--	__raw_writel((__raw_readl(PORTR191_160DR) & ~(0xf << 25)) |
--		     (1 << (25 + n)), PORTR191_160DR);
--}
--
--#endif /* MMC_AP4EB_H */
-diff --git a/arch/arm/mach-shmobile/include/mach/mmc.h b/arch/arm/mach-shmobile/include/mach/mmc.h
-index 21a59db6..e979b8fc 100644
---- a/arch/arm/mach-shmobile/include/mach/mmc.h
-+++ b/arch/arm/mach-shmobile/include/mach/mmc.h
-@@ -7,9 +7,7 @@
-  *
-  **************************************************/
- 
--#ifdef CONFIG_MACH_AP4EVB
--#include "mach/mmc-ap4eb.h"
--#elif defined(CONFIG_MACH_MACKEREL)
-+#ifdef CONFIG_MACH_MACKEREL
- #include "mach/mmc-mackerel.h"
- #else
- #error "unsupported board."
-diff --git a/arch/arm/mach-shmobile/include/mach/zboot.h b/arch/arm/mach-shmobile/include/mach/zboot.h
-index 308b5cfd..f2d8744c 100644
---- a/arch/arm/mach-shmobile/include/mach/zboot.h
-+++ b/arch/arm/mach-shmobile/include/mach/zboot.h
-@@ -10,11 +10,7 @@
-  *
-  **************************************************/
- 
--#ifdef CONFIG_MACH_AP4EVB
--#define MACH_TYPE	MACH_TYPE_AP4EVB
--#define MEMORY_START	0x40000000
--#include "mach/head-ap4evb.txt"
--#elif defined(CONFIG_MACH_MACKEREL)
-+#ifdef CONFIG_MACH_MACKEREL
- #define MACH_TYPE	MACH_TYPE_MACKEREL
- #define MEMORY_START	0x40000000
- #include "mach/head-mackerel.txt"
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0293-ARM-shmobile-Remove-Bonito-board-support.patch b/patches.renesas/0293-ARM-shmobile-Remove-Bonito-board-support.patch
deleted file mode 100644
index 23383dbb96caa..0000000000000
--- a/patches.renesas/0293-ARM-shmobile-Remove-Bonito-board-support.patch
+++ /dev/null
@@ -1,655 +0,0 @@
-From f7ca384488a9c3e6a770865a662be4f0add430f7 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Wed, 12 Jun 2013 22:11:46 -0700
-Subject: ARM: shmobile: Remove Bonito board support
-
-Remove board support for the r8a7740 based Bonito board
-
-The r8a7740 SoC support code is still kept around since it
-is in use by the Armadillo800eva board which is basically a more
-recent board where the design is based on Bonito.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 53332005bfde9d2e3c9a66030c0e8c2598eaa1d5)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/configs/bonito_defconfig     |  72 -----
- arch/arm/mach-shmobile/Kconfig        |   6 -
- arch/arm/mach-shmobile/Makefile       |   1 -
- arch/arm/mach-shmobile/Makefile.boot  |   1 -
- arch/arm/mach-shmobile/board-bonito.c | 502 ----------------------------------
- 5 files changed, 582 deletions(-)
- delete mode 100644 arch/arm/configs/bonito_defconfig
- delete mode 100644 arch/arm/mach-shmobile/board-bonito.c
-
-diff --git a/arch/arm/configs/bonito_defconfig b/arch/arm/configs/bonito_defconfig
-deleted file mode 100644
-index 54571082..00000000
---- a/arch/arm/configs/bonito_defconfig
-+++ /dev/null
-@@ -1,72 +0,0 @@
--CONFIG_EXPERIMENTAL=y
--CONFIG_SYSVIPC=y
--CONFIG_IKCONFIG=y
--CONFIG_IKCONFIG_PROC=y
--CONFIG_LOG_BUF_SHIFT=16
--# CONFIG_UTS_NS is not set
--# CONFIG_IPC_NS is not set
--# CONFIG_USER_NS is not set
--# CONFIG_PID_NS is not set
--CONFIG_BLK_DEV_INITRD=y
--CONFIG_INITRAMFS_SOURCE=""
--CONFIG_CC_OPTIMIZE_FOR_SIZE=y
--CONFIG_SLAB=y
--CONFIG_MODULES=y
--CONFIG_MODULE_UNLOAD=y
--CONFIG_MODULE_FORCE_UNLOAD=y
--# CONFIG_BLK_DEV_BSG is not set
--# CONFIG_IOSCHED_DEADLINE is not set
--# CONFIG_IOSCHED_CFQ is not set
--CONFIG_ARCH_SHMOBILE=y
--CONFIG_ARCH_R8A7740=y
--CONFIG_MACH_BONITO=y
--# CONFIG_SH_TIMER_TMU is not set
--CONFIG_AEABI=y
--# CONFIG_OABI_COMPAT is not set
--CONFIG_FORCE_MAX_ZONEORDER=12
--CONFIG_ZBOOT_ROM_TEXT=0x0
--CONFIG_ZBOOT_ROM_BSS=0x0
--CONFIG_CMDLINE="console=ttySC5,115200 earlyprintk=sh-sci.5,115200 ignore_loglevel"
--CONFIG_KEXEC=y
--# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
--# CONFIG_SUSPEND is not set
--CONFIG_PM_RUNTIME=y
--CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
--# CONFIG_FIRMWARE_IN_KERNEL is not set
--CONFIG_MTD=y
--CONFIG_MTD_CHAR=y
--CONFIG_MTD_BLOCK=y
--CONFIG_MTD_CFI=y
--CONFIG_MTD_CFI_ADV_OPTIONS=y
--CONFIG_MTD_CFI_INTELEXT=y
--CONFIG_MTD_PHYSMAP=y
--CONFIG_MTD_ARM_INTEGRATOR=y
--CONFIG_MTD_BLOCK2MTD=y
--CONFIG_SCSI=y
--CONFIG_BLK_DEV_SD=y
--# CONFIG_SCSI_LOWLEVEL is not set
--# CONFIG_INPUT_KEYBOARD is not set
--# CONFIG_INPUT_MOUSE is not set
--# CONFIG_LEGACY_PTYS is not set
--CONFIG_SERIAL_SH_SCI=y
--CONFIG_SERIAL_SH_SCI_NR_UARTS=9
--CONFIG_SERIAL_SH_SCI_CONSOLE=y
--# CONFIG_HW_RANDOM is not set
--CONFIG_I2C=y
--CONFIG_I2C_CHARDEV=y
--CONFIG_I2C_SH_MOBILE=y
--CONFIG_GPIO_SYSFS=y
--# CONFIG_HWMON is not set
--# CONFIG_MFD_SUPPORT is not set
--# CONFIG_HID_SUPPORT is not set
--# CONFIG_USB_SUPPORT is not set
--CONFIG_UIO=y
--CONFIG_UIO_PDRV=y
--CONFIG_UIO_PDRV_GENIRQ=y
--# CONFIG_DNOTIFY is not set
--# CONFIG_INOTIFY_USER is not set
--CONFIG_TMPFS=y
--# CONFIG_MISC_FILESYSTEMS is not set
--# CONFIG_ENABLE_WARN_DEPRECATED is not set
--# CONFIG_ENABLE_MUST_CHECK is not set
--# CONFIG_ARM_UNWIND is not set
-diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
-index 810af004..4b172453 100644
---- a/arch/arm/mach-shmobile/Kconfig
-+++ b/arch/arm/mach-shmobile/Kconfig
-@@ -97,12 +97,6 @@ config MACH_KOTA2
- 	select ARCH_REQUIRE_GPIOLIB
- 	select REGULATOR_FIXED_VOLTAGE if REGULATOR
- 
--config MACH_BONITO
--	bool "bonito board"
--	depends on ARCH_R8A7740
--	select ARCH_REQUIRE_GPIOLIB
--	select REGULATOR_FIXED_VOLTAGE if REGULATOR
--
- config MACH_ARMADILLO800EVA
- 	bool "Armadillo-800 EVA board"
- 	depends on ARCH_R8A7740
-diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
-index 7f81b9a2..6165a517 100644
---- a/arch/arm/mach-shmobile/Makefile
-+++ b/arch/arm/mach-shmobile/Makefile
-@@ -39,7 +39,6 @@ obj-$(CONFIG_MACH_AG5EVM)	+= board-ag5evm.o
- obj-$(CONFIG_MACH_APE6EVM)	+= board-ape6evm.o
- obj-$(CONFIG_MACH_MACKEREL)	+= board-mackerel.o
- obj-$(CONFIG_MACH_KOTA2)	+= board-kota2.o
--obj-$(CONFIG_MACH_BONITO)	+= board-bonito.o
- obj-$(CONFIG_MACH_BOCKW)	+= board-bockw.o
- obj-$(CONFIG_MACH_MARZEN)	+= board-marzen.o
- obj-$(CONFIG_MACH_MARZEN_REFERENCE)	+= board-marzen-reference.o
-diff --git a/arch/arm/mach-shmobile/Makefile.boot b/arch/arm/mach-shmobile/Makefile.boot
-index 3030673e..84c68685 100644
---- a/arch/arm/mach-shmobile/Makefile.boot
-+++ b/arch/arm/mach-shmobile/Makefile.boot
-@@ -5,7 +5,6 @@ loadaddr-$(CONFIG_MACH_APE6EVM) += 0x40008000
- loadaddr-$(CONFIG_MACH_ARMADILLO800EVA) += 0x40008000
- loadaddr-$(CONFIG_MACH_ARMADILLO800EVA_REFERENCE) += 0x40008000
- loadaddr-$(CONFIG_MACH_BOCKW) += 0x60008000
--loadaddr-$(CONFIG_MACH_BONITO) += 0x40008000
- loadaddr-$(CONFIG_MACH_KOTA2) += 0x41008000
- loadaddr-$(CONFIG_MACH_KZM9D) += 0x40008000
- loadaddr-$(CONFIG_MACH_KZM9G) += 0x41008000
-diff --git a/arch/arm/mach-shmobile/board-bonito.c b/arch/arm/mach-shmobile/board-bonito.c
-deleted file mode 100644
-index b373e9ce..00000000
---- a/arch/arm/mach-shmobile/board-bonito.c
-+++ /dev/null
-@@ -1,502 +0,0 @@
--/*
-- * bonito board support
-- *
-- * Copyright (C) 2011 Renesas Solutions Corp.
-- * Copyright (C) 2011 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-- *
-- * This program is free software; you can redistribute it and/or modify
-- * it under the terms of the GNU General Public License as published by
-- * the Free Software Foundation; version 2 of the License.
-- *
-- * This program is distributed in the hope that it will be useful,
-- * but WITHOUT ANY WARRANTY; without even the implied warranty of
-- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-- * GNU General Public License for more details.
-- *
-- * You should have received a copy of the GNU General Public License
-- * along with this program; if not, write to the Free Software
-- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
-- *
-- */
--
--#include <linux/kernel.h>
--#include <linux/i2c.h>
--#include <linux/init.h>
--#include <linux/interrupt.h>
--#include <linux/irq.h>
--#include <linux/pinctrl/machine.h>
--#include <linux/platform_device.h>
--#include <linux/gpio.h>
--#include <linux/regulator/fixed.h>
--#include <linux/regulator/machine.h>
--#include <linux/smsc911x.h>
--#include <linux/videodev2.h>
--#include <mach/common.h>
--#include <asm/mach-types.h>
--#include <asm/mach/arch.h>
--#include <asm/mach/map.h>
--#include <asm/mach/time.h>
--#include <asm/hardware/cache-l2x0.h>
--#include <mach/r8a7740.h>
--#include <mach/irqs.h>
--#include <video/sh_mobile_lcdc.h>
--
--/*
-- * CS	Address		device			note
-- *----------------------------------------------------------------
-- * 0	0x0000_0000	NOR Flash (64MB)	SW12 : bit3 = OFF
-- * 2	0x0800_0000	ExtNOR (64MB)		SW12 : bit3 = OFF
-- * 4			-
-- * 5A			-
-- * 5B	0x1600_0000	SRAM (8MB)
-- * 6	0x1800_0000	FPGA (64K)
-- *	0x1801_0000	Ether (4KB)
-- *	0x1801_1000	USB (4KB)
-- */
--
--/*
-- * SW12
-- *
-- *	bit1			bit2			bit3
-- *----------------------------------------------------------------------------
-- * ON	NOR WriteProtect	NAND WriteProtect	CS0 ExtNOR / CS2 NOR
-- * OFF	NOR Not WriteProtect	NAND Not WriteProtect	CS0 NOR    / CS2 ExtNOR
-- */
--
--/*
-- * SCIFA5 (CN42)
-- *
-- * S38.3 = ON
-- * S39.6 = ON
-- * S43.1 = ON
-- */
--
--/*
-- * LCDC0 (CN3/CN4/CN7)
-- *
-- * S38.1 = OFF
-- * S38.2 = OFF
-- */
--
--/* Dummy supplies, where voltage doesn't matter */
--static struct regulator_consumer_supply dummy_supplies[] = {
--	REGULATOR_SUPPLY("vddvario", "smsc911x"),
--	REGULATOR_SUPPLY("vdd33a", "smsc911x"),
--};
--
--/*
-- * FPGA
-- */
--#define IRQSR0		0x0020
--#define IRQSR1		0x0022
--#define IRQMR0		0x0030
--#define IRQMR1		0x0032
--#define BUSSWMR1	0x0070
--#define BUSSWMR2	0x0072
--#define BUSSWMR3	0x0074
--#define BUSSWMR4	0x0076
--
--#define LCDCR		0x10B4
--#define DEVRSTCR1	0x10D0
--#define DEVRSTCR2	0x10D2
--#define A1MDSR		0x10E0
--#define BVERR		0x1100
--
--/* FPGA IRQ */
--#define FPGA_IRQ_BASE		(512)
--#define FPGA_IRQ0		(FPGA_IRQ_BASE)
--#define FPGA_IRQ1		(FPGA_IRQ_BASE + 16)
--#define FPGA_ETH_IRQ		(FPGA_IRQ0 + 15)
--static u16 bonito_fpga_read(u32 offset)
--{
--	return __raw_readw(IOMEM(0xf0003000) + offset);
--}
--
--static void bonito_fpga_write(u32 offset, u16 val)
--{
--	__raw_writew(val, IOMEM(0xf0003000) + offset);
--}
--
--static void bonito_fpga_irq_disable(struct irq_data *data)
--{
--	unsigned int irq = data->irq;
--	u32 addr = (irq < 1016) ? IRQMR0 : IRQMR1;
--	int shift = irq % 16;
--
--	bonito_fpga_write(addr, bonito_fpga_read(addr) | (1 << shift));
--}
--
--static void bonito_fpga_irq_enable(struct irq_data *data)
--{
--	unsigned int irq = data->irq;
--	u32 addr = (irq < 1016) ? IRQMR0 : IRQMR1;
--	int shift = irq % 16;
--
--	bonito_fpga_write(addr, bonito_fpga_read(addr) & ~(1 << shift));
--}
--
--static struct irq_chip bonito_fpga_irq_chip __read_mostly = {
--	.name		= "bonito FPGA",
--	.irq_mask	= bonito_fpga_irq_disable,
--	.irq_unmask	= bonito_fpga_irq_enable,
--};
--
--static void bonito_fpga_irq_demux(unsigned int irq, struct irq_desc *desc)
--{
--	u32 val =  bonito_fpga_read(IRQSR1) << 16 |
--		   bonito_fpga_read(IRQSR0);
--	u32 mask = bonito_fpga_read(IRQMR1) << 16 |
--		   bonito_fpga_read(IRQMR0);
--
--	int i;
--
--	val &= ~mask;
--
--	for (i = 0; i < 32; i++) {
--		if (!(val & (1 << i)))
--			continue;
--
--		generic_handle_irq(FPGA_IRQ_BASE + i);
--	}
--}
--
--static void bonito_fpga_init(void)
--{
--	int i;
--
--	bonito_fpga_write(IRQMR0, 0xffff); /* mask all */
--	bonito_fpga_write(IRQMR1, 0xffff); /* mask all */
--
--	/* Device reset */
--	bonito_fpga_write(DEVRSTCR1,
--		   (1 << 2));	/* Eth */
--
--	/* FPGA irq require special handling */
--	for (i = FPGA_IRQ_BASE; i < FPGA_IRQ_BASE + 32; i++) {
--		irq_set_chip_and_handler_name(i, &bonito_fpga_irq_chip,
--					      handle_level_irq, "level");
--		set_irq_flags(i, IRQF_VALID); /* yuck */
--	}
--
--	irq_set_chained_handler(evt2irq(0x0340), bonito_fpga_irq_demux);
--	irq_set_irq_type(evt2irq(0x0340), IRQ_TYPE_LEVEL_LOW);
--}
--
--/*
--* PMIC settings
--*
--* FIXME
--*
--* bonito board needs some settings by pmic which use i2c access.
--* pmic settings use device_initcall() here for use it.
--*/
--static __u8 *pmic_settings = NULL;
--static __u8 pmic_do_2A[] = {
--	0x1C, 0x09,
--	0x1A, 0x80,
--	0xff, 0xff,
--};
--
--static int __init pmic_init(void)
--{
--	struct i2c_adapter *a = i2c_get_adapter(0);
--	struct i2c_msg msg;
--	__u8 buf[2];
--	int i, ret;
--
--	if (!pmic_settings)
--		return 0;
--	if (!a)
--		return 0;
--
--	msg.addr	= 0x46;
--	msg.buf		= buf;
--	msg.len		= 2;
--	msg.flags	= 0;
--
--	for (i = 0; ; i += 2) {
--		buf[0] = pmic_settings[i + 0];
--		buf[1] = pmic_settings[i + 1];
--
--		if ((0xff == buf[0]) && (0xff == buf[1]))
--			break;
--
--		ret = i2c_transfer(a, &msg, 1);
--		if (ret < 0) {
--			pr_err("i2c transfer fail\n");
--			break;
--		}
--	}
--
--	return 0;
--}
--device_initcall(pmic_init);
--
--/*
-- * LCDC0
-- */
--static const struct fb_videomode lcdc0_mode = {
--	.name		= "WVGA Panel",
--	.xres		= 800,
--	.yres		= 480,
--	.left_margin	= 88,
--	.right_margin	= 40,
--	.hsync_len	= 128,
--	.upper_margin	= 20,
--	.lower_margin	= 5,
--	.vsync_len	= 5,
--	.sync		= 0,
--};
--
--static struct sh_mobile_lcdc_info lcdc0_info = {
--	.clock_source	= LCDC_CLK_BUS,
--	.ch[0] = {
--		.chan			= LCDC_CHAN_MAINLCD,
--		.fourcc = V4L2_PIX_FMT_RGB565,
--		.interface_type		= RGB24,
--		.clock_divider		= 5,
--		.flags			= 0,
--		.lcd_modes		= &lcdc0_mode,
--		.num_modes		= 1,
--		.panel_cfg = {
--			.width	= 152,
--			.height = 91,
--		},
--	},
--};
--
--static struct resource lcdc0_resources[] = {
--	[0] = {
--		.name	= "LCDC0",
--		.start	= 0xfe940000,
--		.end	= 0xfe943fff,
--		.flags	= IORESOURCE_MEM,
--	},
--	[1] = {
--		.start	= intcs_evt2irq(0x0580),
--		.flags	= IORESOURCE_IRQ,
--	},
--};
--
--static struct platform_device lcdc0_device = {
--	.name		= "sh_mobile_lcdc_fb",
--	.id		= 0,
--	.resource	= lcdc0_resources,
--	.num_resources	= ARRAY_SIZE(lcdc0_resources),
--	.dev	= {
--		.platform_data	= &lcdc0_info,
--		.coherent_dma_mask = ~0,
--	},
--};
--
--static const struct pinctrl_map lcdc0_pinctrl_map[] = {
--	/* LCD0 */
--	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_lcdc_fb.0", "pfc-r8a7740",
--				  "lcd0_data24_1", "lcd0"),
--	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_lcdc_fb.0", "pfc-r8a7740",
--				  "lcd0_lclk_1", "lcd0"),
--	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_lcdc_fb.0", "pfc-r8a7740",
--				  "lcd0_sync", "lcd0"),
--};
--
--/*
-- * SMSC 9221
-- */
--static struct resource smsc_resources[] = {
--	[0] = {
--		.start		= 0x18010000,
--		.end		= 0x18011000 - 1,
--		.flags		= IORESOURCE_MEM,
--	},
--	[1] = {
--		.start		= FPGA_ETH_IRQ,
--		.flags		= IORESOURCE_IRQ,
--	},
--};
--
--static struct smsc911x_platform_config smsc_platdata = {
--	.flags		= SMSC911X_USE_16BIT,
--	.phy_interface	= PHY_INTERFACE_MODE_MII,
--	.irq_polarity	= SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
--	.irq_type	= SMSC911X_IRQ_TYPE_PUSH_PULL,
--};
--
--static struct platform_device smsc_device = {
--	.name		= "smsc911x",
--	.dev  = {
--		.platform_data = &smsc_platdata,
--	},
--	.resource	= smsc_resources,
--	.num_resources	= ARRAY_SIZE(smsc_resources),
--};
--
--/*
-- * base board devices
-- */
--static struct platform_device *bonito_base_devices[] __initdata = {
--	&lcdc0_device,
--	&smsc_device,
--};
--
--/*
-- * map I/O
-- */
--static struct map_desc bonito_io_desc[] __initdata = {
--	/*
--	 * for FPGA (0x1800000-0x19ffffff)
--	 * 0x18000000-0x18002000 -> 0xf0003000-0xf0005000
--	 */
--	{
--		.virtual	= 0xf0003000,
--		.pfn		= __phys_to_pfn(0x18000000),
--		.length		= PAGE_SIZE * 2,
--		.type		= MT_DEVICE_NONSHARED
--	}
--};
--
--static void __init bonito_map_io(void)
--{
--	r8a7740_map_io();
--	iotable_init(bonito_io_desc, ARRAY_SIZE(bonito_io_desc));
--}
--
--/*
-- * board init
-- */
--#define BIT_ON(sw, bit)		(sw & (1 << bit))
--#define BIT_OFF(sw, bit)	(!(sw & (1 << bit)))
--
--#define VCCQ1CR		IOMEM(0xE6058140)
--#define VCCQ1LCDCR	IOMEM(0xE6058186)
--
--/*
-- * HACK: The FPGA mappings should be associated with the FPGA device, but we
-- * don't have one at the moment. Associate them with the PFC device to make
-- * sure they will be applied.
-- */
--static const struct pinctrl_map fpga_pinctrl_map[] = {
--	/* FPGA */
--	PIN_MAP_MUX_GROUP_DEFAULT("pfc-r8a7740", "pfc-r8a7740",
--				  "bsc_cs5a_0", "bsc"),
--	PIN_MAP_MUX_GROUP_DEFAULT("pfc-r8a7740", "pfc-r8a7740",
--				  "bsc_cs5b", "bsc"),
--	PIN_MAP_MUX_GROUP_DEFAULT("pfc-r8a7740", "pfc-r8a7740",
--				  "bsc_cs6a", "bsc"),
--	PIN_MAP_MUX_GROUP_DEFAULT("pfc-r8a7740", "pfc-r8a7740",
--				  "intc_irq10", "intc"),
--};
--
--static const struct pinctrl_map scifa5_pinctrl_map[] = {
--	/* SCIFA5 */
--	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.5", "pfc-r8a7740",
--				  "scifa5_data_2", "scifa5"),
--};
--
--static void __init bonito_init(void)
--{
--	u16 val;
--
--	regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
--
--	pinctrl_register_mappings(fpga_pinctrl_map,
--				  ARRAY_SIZE(fpga_pinctrl_map));
--	r8a7740_pinmux_init();
--	bonito_fpga_init();
--
--	pmic_settings = pmic_do_2A;
--
--	/*
--	 * core board settings
--	 */
--
--#ifdef CONFIG_CACHE_L2X0
--	/* Early BRESP enable, Shared attribute override enable, 32K*8way */
--	l2x0_init(IOMEM(0xf0002000), 0x40440000, 0x82000fff);
--#endif
--
--	r8a7740_add_standard_devices();
--
--	/*
--	 * base board settings
--	 */
--	gpio_request_one(176, GPIOF_IN, NULL);
--	if (!gpio_get_value(176)) {
--		u16 bsw2;
--		u16 bsw3;
--		u16 bsw4;
--
--		val = bonito_fpga_read(BVERR);
--		pr_info("bonito version: cpu %02x, base %02x\n",
--			((val >> 8) & 0xFF),
--			((val >> 0) & 0xFF));
--
--		bsw2 = bonito_fpga_read(BUSSWMR2);
--		bsw3 = bonito_fpga_read(BUSSWMR3);
--		bsw4 = bonito_fpga_read(BUSSWMR4);
--
--		/*
--		 * SCIFA5 (CN42)
--		 */
--		if (BIT_OFF(bsw2, 1) &&	/* S38.3 = ON */
--		    BIT_OFF(bsw3, 9) &&	/* S39.6 = ON */
--		    BIT_OFF(bsw4, 4)) {	/* S43.1 = ON */
--			pinctrl_register_mappings(scifa5_pinctrl_map,
--						  ARRAY_SIZE(scifa5_pinctrl_map));
--		}
--
--		/*
--		 * LCDC0 (CN3)
--		 */
--		if (BIT_ON(bsw2, 3) &&	/* S38.1 = OFF */
--		    BIT_ON(bsw2, 2)) {	/* S38.2 = OFF */
--			pinctrl_register_mappings(lcdc0_pinctrl_map,
--						  ARRAY_SIZE(lcdc0_pinctrl_map));
--
--			gpio_request_one(61, GPIOF_OUT_INIT_HIGH,
--					 NULL); /* LCDDON */
--
--			/* backlight on */
--			bonito_fpga_write(LCDCR, 1);
--
--			/*  drivability Max */
--			__raw_writew(0x00FF , VCCQ1LCDCR);
--			__raw_writew(0xFFFF , VCCQ1CR);
--		}
--
--		platform_add_devices(bonito_base_devices,
--				     ARRAY_SIZE(bonito_base_devices));
--	}
--}
--
--static void __init bonito_earlytimer_init(void)
--{
--	u16 val;
--	u8 md_ck = 0;
--
--	/* read MD_CK value */
--	val = bonito_fpga_read(A1MDSR);
--	if (val & (1 << 10))
--		md_ck |= MD_CK2;
--	if (val & (1 << 9))
--		md_ck |= MD_CK1;
--	if (val & (1 << 8))
--		md_ck |= MD_CK0;
--
--	r8a7740_clock_init(md_ck);
--	shmobile_earlytimer_init();
--}
--
--static void __init bonito_add_early_devices(void)
--{
--	r8a7740_add_early_devices();
--}
--
--MACHINE_START(BONITO, "bonito")
--	.map_io		= bonito_map_io,
--	.init_early	= bonito_add_early_devices,
--	.init_irq	= r8a7740_init_irq,
--	.handle_irq	= shmobile_handle_irq_intc,
--	.init_machine	= bonito_init,
--	.init_late	= shmobile_init_late,
--	.init_time	= bonito_earlytimer_init,
--MACHINE_END
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0294-ARM-shmobile-r8a7790-HSCIF-support.patch b/patches.renesas/0294-ARM-shmobile-r8a7790-HSCIF-support.patch
deleted file mode 100644
index ffc406a668dab..0000000000000
--- a/patches.renesas/0294-ARM-shmobile-r8a7790-HSCIF-support.patch
+++ /dev/null
@@ -1,61 +0,0 @@
-From a6d416b5d5e41fa04fc00cd156c6c5615eff5da3 Mon Sep 17 00:00:00 2001
-From: Ulrich Hecht <ulrich.hecht@gmail.com>
-Date: Fri, 31 May 2013 17:57:02 +0200
-Subject: ARM: shmobile: r8a7790: HSCIF support
-
-Adds support for HSCIF0 and HSCIF1 on the r8a7790.
-
-Signed-off-by: Ulrich Hecht <ulrich.hecht@gmail.com>
-[ horms+renesas@verge.net.au this is the setup-r8a7790.c
-  which I somehow miss-applied as part of another patch.
-  The clock-r8a7790.c portion of this patch has already been merged. ]
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-(cherry picked from commit d44f8308cf7a65f4c97a041da07d872aefe47ca7)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-r8a7790.c | 14 +++++++++++++-
- 1 file changed, 13 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c
-index 196bd732..2d0c9bfd 100644
---- a/arch/arm/mach-shmobile/setup-r8a7790.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7790.c
-@@ -101,7 +101,15 @@ void __init r8a7790_pinmux_init(void)
- 	.scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,	\
- }
- 
--enum { SCIFA0, SCIFA1, SCIFB0, SCIFB1, SCIFB2, SCIFA2, SCIF0, SCIF1 };
-+#define HSCIF_DATA(index, baseaddr, irq)		\
-+[index] = {						\
-+	SCIF_COMMON(PORT_HSCIF, baseaddr, irq),		\
-+	.scbrr_algo_id	= SCBRR_ALGO_6,			\
-+	.scscr = SCSCR_RE | SCSCR_TE,	\
-+}
-+
-+enum { SCIFA0, SCIFA1, SCIFB0, SCIFB1, SCIFB2, SCIFA2, SCIF0, SCIF1,
-+       HSCIF0, HSCIF1 };
- 
- static struct plat_sci_port scif[] __initdata = {
- 	SCIFA_DATA(SCIFA0, 0xe6c40000, gic_spi(144)), /* SCIFA0 */
-@@ -112,6 +120,8 @@ static struct plat_sci_port scif[] __initdata = {
- 	SCIFA_DATA(SCIFA2, 0xe6c60000, gic_spi(151)), /* SCIFA2 */
- 	SCIF_DATA(SCIF0, 0xe6e60000, gic_spi(152)), /* SCIF0 */
- 	SCIF_DATA(SCIF1, 0xe6e68000, gic_spi(153)), /* SCIF1 */
-+	HSCIF_DATA(HSCIF0, 0xe62c0000, gic_spi(154)), /* HSCIF0 */
-+	HSCIF_DATA(HSCIF1, 0xe62c8000, gic_spi(155)), /* HSCIF1 */
- };
- 
- static inline void r8a7790_register_scif(int idx)
-@@ -149,6 +159,8 @@ void __init r8a7790_add_standard_devices(void)
- 	r8a7790_register_scif(SCIFA2);
- 	r8a7790_register_scif(SCIF0);
- 	r8a7790_register_scif(SCIF1);
-+	r8a7790_register_scif(HSCIF0);
-+	r8a7790_register_scif(HSCIF1);
- 	r8a7790_register_irqc(0);
- }
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0295-ARM-shmobile-r8a7790-don-t-use-external-clock-for-SC.patch b/patches.renesas/0295-ARM-shmobile-r8a7790-don-t-use-external-clock-for-SC.patch
deleted file mode 100644
index e939d4e81ffd0..0000000000000
--- a/patches.renesas/0295-ARM-shmobile-r8a7790-don-t-use-external-clock-for-SC.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From 7914e359e3d902825f0cecdb5a8f0cef6fd37b3d Mon Sep 17 00:00:00 2001
-From: Ulrich Hecht <ulrich.hecht@gmail.com>
-Date: Fri, 31 May 2013 17:57:04 +0200
-Subject: ARM: shmobile: r8a7790: don't use external clock for SCIFs
-
-This is an external component and may or may not be there, while the
-internal clock always works.
-
-Signed-off-by: Ulrich Hecht <ulrich.hecht@gmail.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit c972f024c1097fa0798beafc21be1eeeba21ac34)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-r8a7790.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c
-index 2d0c9bfd..28f94752 100644
---- a/arch/arm/mach-shmobile/setup-r8a7790.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7790.c
-@@ -98,7 +98,7 @@ void __init r8a7790_pinmux_init(void)
- [index] = {						\
- 	SCIF_COMMON(PORT_SCIF, baseaddr, irq),		\
- 	.scbrr_algo_id	= SCBRR_ALGO_2,			\
--	.scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,	\
-+	.scscr = SCSCR_RE | SCSCR_TE,	\
- }
- 
- #define HSCIF_DATA(index, baseaddr, irq)		\
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0296-sh-pfc-r8a7778-tidyup-MMC_D1-pin.patch b/patches.renesas/0296-sh-pfc-r8a7778-tidyup-MMC_D1-pin.patch
deleted file mode 100644
index 27b67515db4e2..0000000000000
--- a/patches.renesas/0296-sh-pfc-r8a7778-tidyup-MMC_D1-pin.patch
+++ /dev/null
@@ -1,38 +0,0 @@
-From e3b8b951fc7f0ddd1fbe1d2994aa79de244b2ebb Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Tue, 11 Jun 2013 19:02:20 -0700
-Subject: sh-pfc: r8a7778: tidyup MMC_D1 pin
-
-MMC_D1 is RCAR_GP_PIN(1, 8), not RCAR_GP_PIN(2, 8)
-
-Reported-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit cd622017eb3e0ab841502df88fb7fda3c3a58eb9)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7778.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7778.c b/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
-index 1dcbabcd..f9039102 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
-@@ -1447,11 +1447,11 @@ MMC_PFC_PINS(mmc_ctrl,		RCAR_GP_PIN(1, 5),	RCAR_GP_PIN(1, 6));
- MMC_PFC_CTRL(mmc_ctrl,		MMC_CLK,		MMC_CMD);
- MMC_PFC_PINS(mmc_data1,		RCAR_GP_PIN(1, 7));
- MMC_PFC_DAT1(mmc_data1,		MMC_D0);
--MMC_PFC_PINS(mmc_data4,		RCAR_GP_PIN(1, 7),	RCAR_GP_PIN(2, 8),
-+MMC_PFC_PINS(mmc_data4,		RCAR_GP_PIN(1, 7),	RCAR_GP_PIN(1, 8),
- 				RCAR_GP_PIN(0, 5),	RCAR_GP_PIN(0, 6));
- MMC_PFC_DAT4(mmc_data4,		MMC_D0,			MMC_D1,
- 				MMC_D2,			MMC_D3);
--MMC_PFC_PINS(mmc_data8,		RCAR_GP_PIN(1, 7),	RCAR_GP_PIN(2, 8),
-+MMC_PFC_PINS(mmc_data8,		RCAR_GP_PIN(1, 7),	RCAR_GP_PIN(1, 8),
- 				RCAR_GP_PIN(0, 5),	RCAR_GP_PIN(0, 6),
- 				RCAR_GP_PIN(1, 4),	RCAR_GP_PIN(1, 0),
- 				RCAR_GP_PIN(0, 30),	RCAR_GP_PIN(0, 31));
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0297-ARM-shmobile-sh73a0-remove-0x-prefix-from-DT-node-na.patch b/patches.renesas/0297-ARM-shmobile-sh73a0-remove-0x-prefix-from-DT-node-na.patch
deleted file mode 100644
index 2813e87ffc2d6..0000000000000
--- a/patches.renesas/0297-ARM-shmobile-sh73a0-remove-0x-prefix-from-DT-node-na.patch
+++ /dev/null
@@ -1,105 +0,0 @@
-From 3c5caca84217d2ce39fdf2423b9432add0a9b3c1 Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Thu, 6 Jun 2013 17:38:12 +0200
-Subject: ARM: shmobile: sh73a0: remove "0x" prefix from DT node names
-
-The convention for Device Tree node names is <device>@<hex-address>, where
-the part after '@' shouldn't contain the "0x" prefix. Fix the sh73a0.dtsi
-DT names.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 561a1a31d232d0f2b1ce7b7480bd03aba97e818d)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/sh73a0.dtsi | 18 +++++++++---------
- 1 file changed, 9 insertions(+), 9 deletions(-)
-
-diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi
-index ec40bf78..b9775025 100644
---- a/arch/arm/boot/dts/sh73a0.dtsi
-+++ b/arch/arm/boot/dts/sh73a0.dtsi
-@@ -119,7 +119,7 @@
- 			      0 32 0x4>;
- 	};
- 
--	i2c0: i2c@0xe6820000 {
-+	i2c0: i2c@e6820000 {
- 		#address-cells = <1>;
- 		#size-cells = <0>;
- 		compatible = "renesas,rmobile-iic";
-@@ -131,7 +131,7 @@
- 			      0 170 0x4>;
- 	};
- 
--	i2c1: i2c@0xe6822000 {
-+	i2c1: i2c@e6822000 {
- 		#address-cells = <1>;
- 		#size-cells = <0>;
- 		compatible = "renesas,rmobile-iic";
-@@ -143,7 +143,7 @@
- 			      0 54 0x4>;
- 	};
- 
--	i2c2: i2c@0xe6824000 {
-+	i2c2: i2c@e6824000 {
- 		#address-cells = <1>;
- 		#size-cells = <0>;
- 		compatible = "renesas,rmobile-iic";
-@@ -155,7 +155,7 @@
- 			      0 174 0x4>;
- 	};
- 
--	i2c3: i2c@0xe6826000 {
-+	i2c3: i2c@e6826000 {
- 		#address-cells = <1>;
- 		#size-cells = <0>;
- 		compatible = "renesas,rmobile-iic";
-@@ -167,7 +167,7 @@
- 			      0 186 0x4>;
- 	};
- 
--	i2c4: i2c@0xe6828000 {
-+	i2c4: i2c@e6828000 {
- 		#address-cells = <1>;
- 		#size-cells = <0>;
- 		compatible = "renesas,rmobile-iic";
-@@ -179,7 +179,7 @@
- 			      0 190 0x4>;
- 	};
- 
--	mmcif: mmcif@0x10010000 {
-+	mmcif: mmcif@e6bd0000 {
- 		compatible = "renesas,sh-mmcif";
- 		reg = <0xe6bd0000 0x100>;
- 		interrupt-parent = <&gic>;
-@@ -189,7 +189,7 @@
- 		status = "disabled";
- 	};
- 
--	sdhi0: sdhi@0xee100000 {
-+	sdhi0: sdhi@ee100000 {
- 		compatible = "renesas,r8a7740-sdhi";
- 		reg = <0xee100000 0x100>;
- 		interrupt-parent = <&gic>;
-@@ -201,7 +201,7 @@
- 	};
- 
- 	/* SDHI1 and SDHI2 have no CD pins, no need for CD IRQ */
--	sdhi1: sdhi@0xee120000 {
-+	sdhi1: sdhi@ee120000 {
- 		compatible = "renesas,r8a7740-sdhi";
- 		reg = <0xee120000 0x100>;
- 		interrupt-parent = <&gic>;
-@@ -212,7 +212,7 @@
- 		status = "disabled";
- 	};
- 
--	sdhi2: sdhi@0xee140000 {
-+	sdhi2: sdhi@ee140000 {
- 		compatible = "renesas,r8a7740-sdhi";
- 		reg = <0xee140000 0x100>;
- 		interrupt-parent = <&gic>;
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0298-ARM-shmobile-BOCK-W-change-Ether-device-name.patch b/patches.renesas/0298-ARM-shmobile-BOCK-W-change-Ether-device-name.patch
deleted file mode 100644
index e73bc6ea535aa..0000000000000
--- a/patches.renesas/0298-ARM-shmobile-BOCK-W-change-Ether-device-name.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From b6c7ac07a8e3fd5d5e3b4e4a125e76bbb8ac7719 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Mon, 17 Jun 2013 23:39:44 +0400
-Subject: ARM: shmobile: BOCK-W: change Ether device name
-
-When changing the name of Ether platform device in the commit c02f846938fe (ARM:
-shmobile: r8a7778: fix Ether device name), I completely forgot that there's also
-platform  device name used in bockw_pinctrl_map[], so the commit "ARM: shmobile:
-BOCK-W: add Ether support" went in with the old "sh-eth" device name. Now change
-it to "r8a777x-ether" in accordance with the commits that are now in  the  'net-
-next.git' repository,  otherwise BOCK-W Ether support won't work in 3.11.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 2c83322ce820bcf2d5e8265de831489076ee211e)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-bockw.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/board-bockw.c b/arch/arm/mach-shmobile/board-bockw.c
-index 394186c7..9936ad2e 100644
---- a/arch/arm/mach-shmobile/board-bockw.c
-+++ b/arch/arm/mach-shmobile/board-bockw.c
-@@ -144,7 +144,7 @@ static struct sh_mmcif_plat_data sh_mmcif_plat = {
- 
- static const struct pinctrl_map bockw_pinctrl_map[] = {
- 	/* Ether */
--	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7778",
-+	PIN_MAP_MUX_GROUP_DEFAULT("r8a777x-ether", "pfc-r8a7778",
- 				  "ether_rmii", "ether"),
- 	/* HSPI0 */
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh-hspi.0", "pfc-r8a7778",
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0299-sh-pfc-Remove-support-for-platform-data.patch b/patches.renesas/0299-sh-pfc-Remove-support-for-platform-data.patch
deleted file mode 100644
index 159bf86614228..0000000000000
--- a/patches.renesas/0299-sh-pfc-Remove-support-for-platform-data.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From 5a917f417b768b883512ea9aaf586dcf0797fd57 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Mon, 17 Jun 2013 20:50:01 +0200
-Subject: sh-pfc: Remove support for platform data
-
-Platform data isn't used, support can thus be removed.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Heiko Stuebner <heiko@sntech.de>
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-(cherry picked from commit 3a7f520e63727e14de9567515d8727c2c01fedb4)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/core.c | 3 +--
- 1 file changed, 1 insertion(+), 2 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/core.c b/drivers/pinctrl/sh-pfc/core.c
-index 3b2fd43f..ac45084f 100644
---- a/drivers/pinctrl/sh-pfc/core.c
-+++ b/drivers/pinctrl/sh-pfc/core.c
-@@ -354,8 +354,7 @@ static int sh_pfc_probe(struct platform_device *pdev)
- 	struct sh_pfc *pfc;
- 	int ret;
- 
--	info = pdev->id_entry->driver_data
--	      ? (void *)pdev->id_entry->driver_data : pdev->dev.platform_data;
-+	info = (void *)pdev->id_entry->driver_data;
- 	if (info == NULL)
- 		return -ENODEV;
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0300-sh-pfc-Add-DT-support.patch b/patches.renesas/0300-sh-pfc-Add-DT-support.patch
deleted file mode 100644
index 8b900cfb8934d..0000000000000
--- a/patches.renesas/0300-sh-pfc-Add-DT-support.patch
+++ /dev/null
@@ -1,403 +0,0 @@
-From a6e7b7582b2e310c287e76215d1226a23b2e2d01 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Mon, 17 Jun 2013 20:50:02 +0200
-Subject: sh-pfc: Add DT support
-
-Support device instantiation through the device tree. The compatible
-property is used to select the SoC pinmux information.
-
-Set the gpio_chip device field to the PFC device to enable automatic
-GPIO OF support.
-
-Cc: devicetree-discuss@lists.ozlabs.org
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Heiko Stuebner <heiko@sntech.de>
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-(cherry picked from commit fe1c9a822ce72c6ec8476a2501c412265ee2172c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- .../bindings/pinctrl/renesas,pfc-pinctrl.txt       | 135 +++++++++++++++++++++
- drivers/pinctrl/sh-pfc/core.c                      |  64 +++++++++-
- drivers/pinctrl/sh-pfc/pinctrl.c                   | 116 ++++++++++++++++++
- 3 files changed, 314 insertions(+), 1 deletion(-)
- create mode 100644 Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt
-
-diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt
-new file mode 100644
-index 00000000..8264cbcd
---- /dev/null
-+++ b/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt
-@@ -0,0 +1,135 @@
-+* Renesas Pin Function Controller (GPIO and Pin Mux/Config)
-+
-+The Pin Function Controller (PFC) is a Pin Mux/Config controller. On SH7372,
-+SH73A0, R8A73A4 and R8A7740 it also acts as a GPIO controller.
-+
-+
-+Pin Control
-+-----------
-+
-+Required Properties:
-+
-+  - compatible: should be one of the following.
-+    - "renesas,pfc-r8a73a4": for R8A73A4 (R-Mobile APE6) compatible pin-controller.
-+    - "renesas,pfc-r8a7740": for R8A7740 (R-Mobile A1) compatible pin-controller.
-+    - "renesas,pfc-r8a7778": for R8A7778 (R-Mobile M1) compatible pin-controller.
-+    - "renesas,pfc-r8a7779": for R8A7779 (R-Car H1) compatible pin-controller.
-+    - "renesas,pfc-r8a7790": for R8A7790 (R-Car H2) compatible pin-controller.
-+    - "renesas,pfc-sh7372": for SH7372 (SH-Mobile AP4) compatible pin-controller.
-+    - "renesas,pfc-sh73a0": for SH73A0 (SH-Mobile AG5) compatible pin-controller.
-+
-+  - reg: Base address and length of each memory resource used by the pin
-+    controller hardware module.
-+
-+Optional properties:
-+
-+  - #gpio-range-cells: Mandatory when the PFC doesn't handle GPIO, forbidden
-+    otherwise. Should be 3.
-+
-+The PFC node also acts as a container for pin configuration nodes. Please refer
-+to pinctrl-bindings.txt in this directory for the definition of the term "pin
-+configuration node" and for the common pinctrl bindings used by client devices.
-+
-+Each pin configuration node represents desired functions to select on a pin
-+group or a list of pin groups. The functions and pin groups can be specified
-+directly in the pin configuration node, or grouped in child subnodes. Several
-+functions can thus be referenced as a single pin configuration node by client
-+devices.
-+
-+A configuration node or subnode must contain a function and reference at least
-+one pin group.
-+
-+All pin configuration nodes and subnodes names are ignored. All of those nodes
-+are parsed through phandles and processed purely based on their content.
-+
-+Pin Configuration Node Properties:
-+
-+- renesas,groups : An array of strings, each string containing the name of a pin
-+  group.
-+
-+- renesas,function: A string containing the name of the function to mux to the
-+  pin group(s) specified by the renesas,groups property
-+
-+  Valid values for pin, group and function names can be found in the group and
-+  function arrays of the PFC data file corresponding to the SoC
-+  (drivers/pinctrl/sh-pfc/pfc-*.c)
-+
-+
-+GPIO
-+----
-+
-+On SH7372, SH73A0, R8A73A4 and R8A7740 the PFC node is also a GPIO controller
-+node.
-+
-+Required Properties:
-+
-+  - gpio-controller: Marks the device node as a gpio controller.
-+
-+  - #gpio-cells: Should be 2. The first cell is the GPIO number and the second
-+    cell specifies GPIO flags, as defined in <dt-bindings/gpio/gpio.h>. Only the
-+    GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW flags are supported.
-+
-+The syntax of the gpio specifier used by client nodes should be the following
-+with values derived from the SoC user manual.
-+
-+  <[phandle of the gpio controller node]
-+   [pin number within the gpio controller]
-+   [flags]>
-+
-+On other mach-shmobile platforms GPIO is handled by the gpio-rcar driver.
-+Please refer to Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt
-+for documentation of the GPIO device tree bindings on those platforms.
-+
-+
-+Examples
-+--------
-+
-+Example 1: SH73A0 (SH-Mobile AG5) pin controller node
-+
-+	pfc: pfc@e6050000 {
-+		compatible = "renesas,pfc-sh73a0";
-+		reg = <0xe6050000 0x8000>,
-+		      <0xe605801c 0x1c>;
-+		gpio-controller;
-+		#gpio-cells = <2>;
-+	};
-+
-+Example 2: A GPIO LED node that references a GPIO
-+
-+	#include <dt-bindings/gpio/gpio.h>
-+
-+	leds {
-+		compatible = "gpio-leds";
-+		led1 {
-+			gpios = <&pfc 20 GPIO_ACTIVE_LOW>;
-+		};
-+	};
-+
-+Example 3: KZM-A9-GT (SH-Mobile AG5) default pin state hog and pin control maps
-+           for the MMCIF and SCIFA4 devices
-+
-+	&pfc {
-+		pinctrl-0 = <&scifa4_pins>;
-+		pinctrl-names = "default";
-+
-+		mmcif_pins: mmcif {
-+			renesas,groups = "mmc0_data8_0", "mmc0_ctrl_0";
-+			renesas,function = "mmc0";
-+		};
-+
-+		scifa4_pins: scifa4 {
-+			renesas,groups = "scifa4_data", "scifa4_ctrl";
-+			renesas,function = "scifa4";
-+		};
-+	};
-+
-+Example 4: KZM-A9-GT (SH-Mobile AG5) default pin state for the MMCIF device
-+
-+	&mmcif {
-+		pinctrl-0 = <&mmcif_pins>;
-+		pinctrl-names = "default";
-+
-+		bus-width = <8>;
-+		vmmc-supply = <&reg_1p8v>;
-+		status = "okay";
-+	};
-diff --git a/drivers/pinctrl/sh-pfc/core.c b/drivers/pinctrl/sh-pfc/core.c
-index ac45084f..f3fc66b2 100644
---- a/drivers/pinctrl/sh-pfc/core.c
-+++ b/drivers/pinctrl/sh-pfc/core.c
-@@ -18,6 +18,8 @@
- #include <linux/ioport.h>
- #include <linux/kernel.h>
- #include <linux/module.h>
-+#include <linux/of.h>
-+#include <linux/of_device.h>
- #include <linux/pinctrl/machine.h>
- #include <linux/platform_device.h>
- #include <linux/slab.h>
-@@ -348,13 +350,72 @@ int sh_pfc_config_mux(struct sh_pfc *pfc, unsigned mark, int pinmux_type)
- 	return 0;
- }
- 
-+#ifdef CONFIG_OF
-+static const struct of_device_id sh_pfc_of_table[] = {
-+#ifdef CONFIG_PINCTRL_PFC_R8A73A4
-+	{
-+		.compatible = "renesas,pfc-r8a73a4",
-+		.data = &r8a73a4_pinmux_info,
-+	},
-+#endif
-+#ifdef CONFIG_PINCTRL_PFC_R8A7740
-+	{
-+		.compatible = "renesas,pfc-r8a7740",
-+		.data = &r8a7740_pinmux_info,
-+	},
-+#endif
-+#ifdef CONFIG_PINCTRL_PFC_R8A7778
-+	{
-+		.compatible = "renesas,pfc-r8a7778",
-+		.data = &r8a7778_pinmux_info,
-+	},
-+#endif
-+#ifdef CONFIG_PINCTRL_PFC_R8A7779
-+	{
-+		.compatible = "renesas,pfc-r8a7779",
-+		.data = &r8a7779_pinmux_info,
-+	},
-+#endif
-+#ifdef CONFIG_PINCTRL_PFC_R8A7790
-+	{
-+		.compatible = "renesas,pfc-r8a7790",
-+		.data = &r8a7790_pinmux_info,
-+	},
-+#endif
-+#ifdef CONFIG_PINCTRL_PFC_SH7372
-+	{
-+		.compatible = "renesas,pfc-sh7372",
-+		.data = &sh7372_pinmux_info,
-+	},
-+#endif
-+#ifdef CONFIG_PINCTRL_PFC_SH73A0
-+	{
-+		.compatible = "renesas,pfc-sh73a0",
-+		.data = &sh73a0_pinmux_info,
-+	},
-+#endif
-+	{ },
-+};
-+MODULE_DEVICE_TABLE(of, sh_pfc_of_table);
-+#endif
-+
- static int sh_pfc_probe(struct platform_device *pdev)
- {
-+	const struct platform_device_id *platid = platform_get_device_id(pdev);
-+#ifdef CONFIG_OF
-+	struct device_node *np = pdev->dev.of_node;
-+#endif
- 	const struct sh_pfc_soc_info *info;
- 	struct sh_pfc *pfc;
- 	int ret;
- 
--	info = (void *)pdev->id_entry->driver_data;
-+#ifdef CONFIG_OF
-+	if (np)
-+		info = of_match_device(sh_pfc_of_table, &pdev->dev)->data;
-+	else
-+#endif
-+		info = platid ? (const void *)platid->driver_data : NULL;
-+
- 	if (info == NULL)
- 		return -ENODEV;
- 
-@@ -500,6 +561,7 @@ static struct platform_driver sh_pfc_driver = {
- 	.driver		= {
- 		.name	= DRV_NAME,
- 		.owner	= THIS_MODULE,
-+		.of_match_table = of_match_ptr(sh_pfc_of_table),
- 	},
- };
- 
-diff --git a/drivers/pinctrl/sh-pfc/pinctrl.c b/drivers/pinctrl/sh-pfc/pinctrl.c
-index 3492ec9a..7e32bb8c 100644
---- a/drivers/pinctrl/sh-pfc/pinctrl.c
-+++ b/drivers/pinctrl/sh-pfc/pinctrl.c
-@@ -14,7 +14,9 @@
- #include <linux/err.h>
- #include <linux/init.h>
- #include <linux/module.h>
-+#include <linux/of.h>
- #include <linux/pinctrl/consumer.h>
-+#include <linux/pinctrl/machine.h>
- #include <linux/pinctrl/pinconf.h>
- #include <linux/pinctrl/pinconf-generic.h>
- #include <linux/pinctrl/pinctrl.h>
-@@ -72,11 +74,125 @@ static void sh_pfc_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,
- 	seq_printf(s, "%s", DRV_NAME);
- }
- 
-+static int sh_pfc_dt_subnode_to_map(struct device *dev, struct device_node *np,
-+				    struct pinctrl_map **map,
-+				    unsigned int *num_maps, unsigned int *index)
-+{
-+	struct pinctrl_map *maps = *map;
-+	unsigned int nmaps = *num_maps;
-+	unsigned int idx = *index;
-+	const char *function = NULL;
-+	struct property *prop;
-+	const char *group;
-+	int ret;
-+
-+	/* Parse the function and configuration properties. At least a function
-+	 * or one configuration must be specified.
-+	 */
-+	ret = of_property_read_string(np, "renesas,function", &function);
-+	if (ret < 0 && ret != -EINVAL) {
-+		dev_err(dev, "Invalid function in DT\n");
-+		return ret;
-+	}
-+
-+	if (!function) {
-+		dev_err(dev, "DT node must contain at least one function\n");
-+		goto done;
-+	}
-+
-+	/* Count the number of groups and reallocate mappings. */
-+	ret = of_property_count_strings(np, "renesas,groups");
-+	if (ret < 0 && ret != -EINVAL) {
-+		dev_err(dev, "Invalid pin groups list in DT\n");
-+		goto done;
-+	}
-+
-+	if (!ret) {
-+		dev_err(dev, "No group provided in DT node\n");
-+		ret = -ENODEV;
-+		goto done;
-+	}
-+
-+	nmaps += ret;
-+
-+	maps = krealloc(maps, sizeof(*maps) * nmaps, GFP_KERNEL);
-+	if (maps == NULL) {
-+		ret = -ENOMEM;
-+		goto done;
-+	}
-+
-+	*map = maps;
-+	*num_maps = nmaps;
-+
-+	/* Iterate over pins and groups and create the mappings. */
-+	of_property_for_each_string(np, "renesas,groups", prop, group) {
-+		maps[idx].type = PIN_MAP_TYPE_MUX_GROUP;
-+		maps[idx].data.mux.group = group;
-+		maps[idx].data.mux.function = function;
-+		idx++;
-+	}
-+
-+	ret = 0;
-+
-+done:
-+	*index = idx;
-+	return ret;
-+}
-+
-+static void sh_pfc_dt_free_map(struct pinctrl_dev *pctldev,
-+			       struct pinctrl_map *map, unsigned num_maps)
-+{
-+	kfree(map);
-+}
-+
-+static int sh_pfc_dt_node_to_map(struct pinctrl_dev *pctldev,
-+				 struct device_node *np,
-+				 struct pinctrl_map **map, unsigned *num_maps)
-+{
-+	struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
-+	struct device *dev = pmx->pfc->dev;
-+	struct device_node *child;
-+	unsigned int index;
-+	int ret;
-+
-+	*map = NULL;
-+	*num_maps = 0;
-+	index = 0;
-+
-+	for_each_child_of_node(np, child) {
-+		ret = sh_pfc_dt_subnode_to_map(dev, child, map, num_maps,
-+					       &index);
-+		if (ret < 0)
-+			goto done;
-+	}
-+
-+	/* If no mapping has been found in child nodes try the config node. */
-+	if (*num_maps == 0) {
-+		ret = sh_pfc_dt_subnode_to_map(dev, np, map, num_maps, &index);
-+		if (ret < 0)
-+			goto done;
-+	}
-+
-+	if (*num_maps)
-+		return 0;
-+
-+	dev_err(dev, "no mapping found in node %s\n", np->full_name);
-+	ret = -EINVAL;
-+
-+done:
-+	if (ret < 0)
-+		sh_pfc_dt_free_map(pctldev, *map, *num_maps);
-+
-+	return ret;
-+}
-+
- static const struct pinctrl_ops sh_pfc_pinctrl_ops = {
- 	.get_groups_count	= sh_pfc_get_groups_count,
- 	.get_group_name		= sh_pfc_get_group_name,
- 	.get_group_pins		= sh_pfc_get_group_pins,
- 	.pin_dbg_show		= sh_pfc_pin_dbg_show,
-+	.dt_node_to_map		= sh_pfc_dt_node_to_map,
-+	.dt_free_map		= sh_pfc_dt_free_map,
- };
- 
- static int sh_pfc_get_functions_count(struct pinctrl_dev *pctldev)
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0301-pinconf-generic-add-BIAS_BUS_HOLD-pinconf.patch b/patches.renesas/0301-pinconf-generic-add-BIAS_BUS_HOLD-pinconf.patch
deleted file mode 100644
index 0797b7accfbb8..0000000000000
--- a/patches.renesas/0301-pinconf-generic-add-BIAS_BUS_HOLD-pinconf.patch
+++ /dev/null
@@ -1,60 +0,0 @@
-From 6a9c565246933b4d277cc31dd152f9b46eb58b28 Mon Sep 17 00:00:00 2001
-From: James Hogan <james.hogan@imgtec.com>
-Date: Fri, 24 May 2013 17:21:12 +0100
-Subject: pinconf-generic: add BIAS_BUS_HOLD pinconf
-
-Add a new PIN_CONFIG_BIAS_BUS_HOLD pin configuration for a bus holder
-pin mode (also known as bus keeper, or repeater). This is a weak latch
-which drives the last value on a tristate bus. Another device on the bus
-can drive the bus high or low before going tristate to change the value
-driven by the pin.
-
-Signed-off-by: James Hogan <james.hogan@imgtec.com>
-Cc: Linus Walleij <linus.walleij@linaro.org>
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-(cherry picked from commit a2df4269cad79635201587c5c5404f0b1cb0b05c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/pinconf-generic.c       | 1 +
- include/linux/pinctrl/pinconf-generic.h | 6 ++++++
- 2 files changed, 7 insertions(+)
-
-diff --git a/drivers/pinctrl/pinconf-generic.c b/drivers/pinctrl/pinconf-generic.c
-index 2ad5a8d3..7c593dbd 100644
---- a/drivers/pinctrl/pinconf-generic.c
-+++ b/drivers/pinctrl/pinconf-generic.c
-@@ -37,6 +37,7 @@ struct pin_config_item {
- static struct pin_config_item conf_items[] = {
- 	PCONFDUMP(PIN_CONFIG_BIAS_DISABLE, "input bias disabled", NULL),
- 	PCONFDUMP(PIN_CONFIG_BIAS_HIGH_IMPEDANCE, "input bias high impedance", NULL),
-+	PCONFDUMP(PIN_CONFIG_BIAS_BUS_HOLD, "input bias bus hold", NULL),
- 	PCONFDUMP(PIN_CONFIG_BIAS_PULL_UP, "input bias pull up", NULL),
- 	PCONFDUMP(PIN_CONFIG_BIAS_PULL_DOWN, "input bias pull down", NULL),
- 	PCONFDUMP(PIN_CONFIG_DRIVE_PUSH_PULL, "output drive push pull", NULL),
-diff --git a/include/linux/pinctrl/pinconf-generic.h b/include/linux/pinctrl/pinconf-generic.h
-index 6aa23809..ac05b3cf 100644
---- a/include/linux/pinctrl/pinconf-generic.h
-+++ b/include/linux/pinctrl/pinconf-generic.h
-@@ -29,6 +29,11 @@
-  *	if for example some other pin is going to drive the signal connected
-  *	to it for a while. Pins used for input are usually always high
-  *	impedance.
-+ * @PIN_CONFIG_BIAS_BUS_HOLD: the pin will be set to weakly latch so that it
-+ *	weakly drives the last value on a tristate bus, also known as a "bus
-+ *	holder", "bus keeper" or "repeater". This allows another device on the
-+ *	bus to change the value by driving the bus high or low and switching to
-+ *	tristate. The argument is ignored.
-  * @PIN_CONFIG_BIAS_PULL_UP: the pin will be pulled up (usually with high
-  *	impedance to VDD). If the argument is != 0 pull-up is enabled,
-  *	if it is 0, pull-up is disabled.
-@@ -78,6 +83,7 @@
- enum pin_config_param {
- 	PIN_CONFIG_BIAS_DISABLE,
- 	PIN_CONFIG_BIAS_HIGH_IMPEDANCE,
-+	PIN_CONFIG_BIAS_BUS_HOLD,
- 	PIN_CONFIG_BIAS_PULL_UP,
- 	PIN_CONFIG_BIAS_PULL_DOWN,
- 	PIN_CONFIG_DRIVE_PUSH_PULL,
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0302-pinctrl-add-pinconf-generic-define-for-a-pin-default.patch b/patches.renesas/0302-pinctrl-add-pinconf-generic-define-for-a-pin-default.patch
deleted file mode 100644
index 90d231a88333e..0000000000000
--- a/patches.renesas/0302-pinctrl-add-pinconf-generic-define-for-a-pin-default.patch
+++ /dev/null
@@ -1,63 +0,0 @@
-From d233a3e6d42d6c68e71f5e1ca9e46af22474e3ed Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Heiko=20St=C3=BCbner?= <heiko@sntech.de>
-Date: Thu, 6 Jun 2013 16:44:25 +0200
-Subject: pinctrl: add pinconf-generic define for a pin-default pull
-
-There exist controllers that don't support to set the pull to up or down
-separately but instead automatically set the pull direction based on
-embedded knowledge inside the controller, for example depending on the
-selected mux function of the pin.
-
-Therefore this patch adds another config option to use this default
-pull-state for a pin where it is not possible to know or decide if the
-pin will be pulled up or down.
-
-Signed-off-by: Heiko Stuebner <heiko@sntech.de>
-Reviewed-by: Stephen Warren <swarren@nvidia.com>
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-(cherry picked from commit 7970cb770dffa23cb20a36f46602e688e075f5d9)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/pinconf-generic.c       | 2 ++
- include/linux/pinctrl/pinconf-generic.h | 5 +++++
- 2 files changed, 7 insertions(+)
-
-diff --git a/drivers/pinctrl/pinconf-generic.c b/drivers/pinctrl/pinconf-generic.c
-index 7c593dbd..5810d150 100644
---- a/drivers/pinctrl/pinconf-generic.c
-+++ b/drivers/pinctrl/pinconf-generic.c
-@@ -40,6 +40,8 @@ static struct pin_config_item conf_items[] = {
- 	PCONFDUMP(PIN_CONFIG_BIAS_BUS_HOLD, "input bias bus hold", NULL),
- 	PCONFDUMP(PIN_CONFIG_BIAS_PULL_UP, "input bias pull up", NULL),
- 	PCONFDUMP(PIN_CONFIG_BIAS_PULL_DOWN, "input bias pull down", NULL),
-+	PCONFDUMP(PIN_CONFIG_BIAS_PULL_PIN_DEFAULT,
-+				"input bias pull to pin specific state", NULL),
- 	PCONFDUMP(PIN_CONFIG_DRIVE_PUSH_PULL, "output drive push pull", NULL),
- 	PCONFDUMP(PIN_CONFIG_DRIVE_OPEN_DRAIN, "output drive open drain", NULL),
- 	PCONFDUMP(PIN_CONFIG_DRIVE_OPEN_SOURCE, "output drive open source", NULL),
-diff --git a/include/linux/pinctrl/pinconf-generic.h b/include/linux/pinctrl/pinconf-generic.h
-index ac05b3cf..d414a772 100644
---- a/include/linux/pinctrl/pinconf-generic.h
-+++ b/include/linux/pinctrl/pinconf-generic.h
-@@ -40,6 +40,10 @@
-  * @PIN_CONFIG_BIAS_PULL_DOWN: the pin will be pulled down (usually with high
-  *	impedance to GROUND). If the argument is != 0 pull-down is enabled,
-  *	if it is 0, pull-down is disabled.
-+ * @PIN_CONFIG_BIAS_PULL_PIN_DEFAULT: the pin will be pulled up or down based
-+ *	on embedded knowledge of the controller, like current mux function.
-+ *	If the argument is != 0 pull up/down is enabled, if it is 0,
-+ *	the pull is disabled.
-  * @PIN_CONFIG_DRIVE_PUSH_PULL: the pin will be driven actively high and
-  *	low, this is the most typical case and is typically achieved with two
-  *	active transistors on the output. Setting this config will enable
-@@ -86,6 +90,7 @@ enum pin_config_param {
- 	PIN_CONFIG_BIAS_BUS_HOLD,
- 	PIN_CONFIG_BIAS_PULL_UP,
- 	PIN_CONFIG_BIAS_PULL_DOWN,
-+	PIN_CONFIG_BIAS_PULL_PIN_DEFAULT,
- 	PIN_CONFIG_DRIVE_PUSH_PULL,
- 	PIN_CONFIG_DRIVE_OPEN_DRAIN,
- 	PIN_CONFIG_DRIVE_OPEN_SOURCE,
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0303-pinctrl-add-function-to-parse-generic-pinconfig-prop.patch b/patches.renesas/0303-pinctrl-add-function-to-parse-generic-pinconfig-prop.patch
deleted file mode 100644
index 8b6995827084f..0000000000000
--- a/patches.renesas/0303-pinctrl-add-function-to-parse-generic-pinconfig-prop.patch
+++ /dev/null
@@ -1,182 +0,0 @@
-From 593ee60159355138352679fe7bb7ee4213ea2369 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?Heiko=20St=C3=BCbner?= <heiko@sntech.de>
-Date: Mon, 10 Jun 2013 21:40:29 +0200
-Subject: pinctrl: add function to parse generic pinconfig properties from a dt
- node
-
-pinconf_generic_parse_dt_config() takes a node as input and generates an
-array of generic pinconfig values from the properties of this node.
-
-As I couldn't find a mechanism to count the number of properties of a node
-the function uses internally an array to accept one of parameter and copies
-the real present options to a smaller variable at its end.
-
-Signed-off-by: Heiko Stuebner <heiko@sntech.de>
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-(cherry picked from commit 7db9af4b6e41be599e0fcd50d687138a5add428c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- .../bindings/pinctrl/pinctrl-bindings.txt          | 38 ++++++++++
- drivers/pinctrl/pinconf-generic.c                  | 81 ++++++++++++++++++++++
- drivers/pinctrl/pinconf.h                          |  6 ++
- 3 files changed, 125 insertions(+)
-
-diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt b/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
-index c95ea827..ef7cd572 100644
---- a/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
-+++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
-@@ -126,3 +126,41 @@ device; they may be grandchildren, for example. Whether this is legal, and
- whether there is any interaction between the child and intermediate parent
- nodes, is again defined entirely by the binding for the individual pin
- controller device.
-+
-+== Using generic pinconfig options ==
-+
-+Generic pinconfig parameters can be used by defining a separate node containing
-+the applicable parameters (and optional values), like:
-+
-+pcfg_pull_up: pcfg_pull_up {
-+	bias-pull-up;
-+	drive-strength = <20>;
-+};
-+
-+This node should then be referenced in the appropriate pinctrl node as a phandle
-+and parsed in the driver using the pinconf_generic_parse_dt_config function.
-+
-+Supported configuration parameters are:
-+
-+bias-disable		- disable any pin bias
-+bias-high-impedance	- high impedance mode ("third-state", "floating")
-+bias-bus-hold		- latch weakly
-+bias-pull-up		- pull up the pin
-+bias-pull-down		- pull down the pin
-+bias-pull-pin-default	- use pin-default pull state
-+drive-push-pull		- drive actively high and low
-+drive-open-drain	- drive with open drain
-+drive-open-source	- drive with open source
-+drive-strength		- sink or source at most X mA
-+input-schmitt-enable	- enable schmitt-trigger mode
-+input-schmitt-disable	- disable schmitt-trigger mode
-+input-schmitt		- run in schmitt-trigger mode with hysteresis X
-+input-debounce		- debounce mode with debound time X
-+power-source		- select power source X
-+slew-rate		- use slew-rate X
-+low-power-mode		- low power mode
-+output-low		- set the pin to output mode with low level
-+output-high		- set the pin to output mode with high level
-+
-+More in-depth documentation on these parameters can be found in
-+<include/linux/pinctrl/pinconfig-generic.h>
-diff --git a/drivers/pinctrl/pinconf-generic.c b/drivers/pinctrl/pinconf-generic.c
-index 5810d150..1ddddb95 100644
---- a/drivers/pinctrl/pinconf-generic.c
-+++ b/drivers/pinctrl/pinconf-generic.c
-@@ -21,6 +21,7 @@
- #include <linux/pinctrl/pinctrl.h>
- #include <linux/pinctrl/pinconf.h>
- #include <linux/pinctrl/pinconf-generic.h>
-+#include <linux/of.h>
- #include "core.h"
- #include "pinconf.h"
- 
-@@ -138,3 +139,83 @@ void pinconf_generic_dump_config(struct pinctrl_dev *pctldev,
- }
- EXPORT_SYMBOL_GPL(pinconf_generic_dump_config);
- #endif
-+
-+#ifdef CONFIG_OF
-+struct pinconf_generic_dt_params {
-+	const char * const property;
-+	enum pin_config_param param;
-+	u32 default_value;
-+};
-+
-+static struct pinconf_generic_dt_params dt_params[] = {
-+	{ "bias-disable", PIN_CONFIG_BIAS_DISABLE, 0 },
-+	{ "bias-high-impedance", PIN_CONFIG_BIAS_HIGH_IMPEDANCE, 0 },
-+	{ "bias-bus-hold", PIN_CONFIG_BIAS_BUS_HOLD, 0 },
-+	{ "bias-pull-up", PIN_CONFIG_BIAS_PULL_UP, 0 },
-+	{ "bias-pull-down", PIN_CONFIG_BIAS_PULL_DOWN, 0 },
-+	{ "bias-pull-pin-default", PIN_CONFIG_BIAS_PULL_PIN_DEFAULT, 0 },
-+	{ "drive-push-pull", PIN_CONFIG_DRIVE_PUSH_PULL, 0 },
-+	{ "drive-open-drain", PIN_CONFIG_DRIVE_OPEN_DRAIN, 0 },
-+	{ "drive-open-source", PIN_CONFIG_DRIVE_OPEN_SOURCE, 0 },
-+	{ "drive-strength", PIN_CONFIG_DRIVE_STRENGTH, 0 },
-+	{ "input-schmitt-enable", PIN_CONFIG_INPUT_SCHMITT_ENABLE, 1 },
-+	{ "input-schmitt-disable", PIN_CONFIG_INPUT_SCHMITT_ENABLE, 0 },
-+	{ "input-schmitt", PIN_CONFIG_INPUT_SCHMITT, 0 },
-+	{ "input-debounce", PIN_CONFIG_INPUT_DEBOUNCE, 0 },
-+	{ "power-source", PIN_CONFIG_POWER_SOURCE, 0 },
-+	{ "slew-rate", PIN_CONFIG_SLEW_RATE, 0 },
-+	{ "low-power-mode", PIN_CONFIG_LOW_POWER_MODE, 0 },
-+	{ "output-low", PIN_CONFIG_OUTPUT, 0, },
-+	{ "output-high", PIN_CONFIG_OUTPUT, 1, },
-+};
-+
-+/**
-+ * pinconf_generic_parse_dt_config()
-+ * parse the config properties into generic pinconfig values.
-+ * @np: node containing the pinconfig properties
-+ * @configs: array with nconfigs entries containing the generic pinconf values
-+ * @nconfigs: umber of configurations
-+ */
-+int pinconf_generic_parse_dt_config(struct device_node *np,
-+				    unsigned long **configs,
-+				    unsigned int *nconfigs)
-+{
-+	unsigned long cfg[ARRAY_SIZE(dt_params)];
-+	unsigned int ncfg = 0;
-+	int ret;
-+	int i;
-+	u32 val;
-+
-+	if (!np)
-+		return -EINVAL;
-+
-+	for (i = 0; i < ARRAY_SIZE(dt_params); i++) {
-+		struct pinconf_generic_dt_params *par = &dt_params[i];
-+		ret = of_property_read_u32(np, par->property, &val);
-+
-+		/* property not found */
-+		if (ret == -EINVAL)
-+			continue;
-+
-+		/* use default value, when no value is specified */
-+		if (ret)
-+			val = par->default_value;
-+
-+		pr_debug("found %s with value %u\n", par->property, val);
-+		cfg[ncfg] = pinconf_to_config_packed(par->param, val);
-+		ncfg++;
-+	}
-+
-+	/*
-+	 * Now limit the number of configs to the real number of
-+	 * found properties.
-+	 */
-+	*configs = kzalloc(ncfg * sizeof(unsigned long), GFP_KERNEL);
-+	if (!*configs)
-+		return -ENOMEM;
-+
-+	memcpy(*configs, &cfg, ncfg * sizeof(unsigned long));
-+	*nconfigs = ncfg;
-+	return 0;
-+}
-+#endif
-diff --git a/drivers/pinctrl/pinconf.h b/drivers/pinctrl/pinconf.h
-index 92c72672..a4a5417e 100644
---- a/drivers/pinctrl/pinconf.h
-+++ b/drivers/pinctrl/pinconf.h
-@@ -123,3 +123,9 @@ static inline void pinconf_generic_dump_config(struct pinctrl_dev *pctldev,
- 	return;
- }
- #endif
-+
-+#if defined(CONFIG_GENERIC_PINCONF) && defined(CONFIG_OF)
-+int pinconf_generic_parse_dt_config(struct device_node *np,
-+				    unsigned long **configs,
-+				    unsigned int *nconfigs);
-+#endif
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0304-sh-pfc-Add-pinconf-support-to-DT-bindings.patch b/patches.renesas/0304-sh-pfc-Add-pinconf-support-to-DT-bindings.patch
deleted file mode 100644
index 4302ec253bc72..0000000000000
--- a/patches.renesas/0304-sh-pfc-Add-pinconf-support-to-DT-bindings.patch
+++ /dev/null
@@ -1,253 +0,0 @@
-From 608fc77d559c960f4e0f68d5e218dc72815ebf41 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Mon, 17 Jun 2013 20:50:03 +0200
-Subject: sh-pfc: Add pinconf support to DT bindings
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Heiko Stuebner <heiko@sntech.de>
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-(cherry picked from commit 12f3ad8df7f58c61ff16ea851541583693d965e1)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- .../bindings/pinctrl/renesas,pfc-pinctrl.txt       |  36 +++++--
- drivers/pinctrl/sh-pfc/pinctrl.c                   | 109 ++++++++++++++++++---
- 2 files changed, 124 insertions(+), 21 deletions(-)
-
-diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt
-index 8264cbcd..d5dac7b8 100644
---- a/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt
-+++ b/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt
-@@ -30,20 +30,27 @@ The PFC node also acts as a container for pin configuration nodes. Please refer
- to pinctrl-bindings.txt in this directory for the definition of the term "pin
- configuration node" and for the common pinctrl bindings used by client devices.
- 
--Each pin configuration node represents desired functions to select on a pin
--group or a list of pin groups. The functions and pin groups can be specified
--directly in the pin configuration node, or grouped in child subnodes. Several
--functions can thus be referenced as a single pin configuration node by client
--devices.
-+Each pin configuration node represents a desired configuration for a pin, a
-+pin group, or a list of pins or pin groups. The configuration can include the
-+function to select on those pin(s) and pin configuration parameters (such as
-+pull-up and pull-down).
- 
--A configuration node or subnode must contain a function and reference at least
--one pin group.
-+Pin configuration nodes contain pin configuration properties, either directly
-+or grouped in child subnodes. Both pin muxing and configuration parameters can
-+be grouped in that way and referenced as a single pin configuration node by
-+client devices.
-+
-+A configuration node or subnode must reference at least one pin (through the
-+pins or pin groups properties) and contain at least a function or one
-+configuration parameter. When the function is present only pin groups can be
-+used to reference pins.
- 
- All pin configuration nodes and subnodes names are ignored. All of those nodes
- are parsed through phandles and processed purely based on their content.
- 
- Pin Configuration Node Properties:
- 
-+- renesas,pins : An array of strings, each string containing the name of a pin.
- - renesas,groups : An array of strings, each string containing the name of a pin
-   group.
- 
-@@ -54,6 +61,10 @@ Pin Configuration Node Properties:
-   function arrays of the PFC data file corresponding to the SoC
-   (drivers/pinctrl/sh-pfc/pfc-*.c)
- 
-+The pin configuration parameters use the generic pinconf bindings defined in
-+pinctrl-bindings.txt in this directory. The supported parameters are
-+bias-disable, bias-pull-up and bias-pull-down.
-+
- 
- GPIO
- ----
-@@ -113,8 +124,15 @@ Example 3: KZM-A9-GT (SH-Mobile AG5) default pin state hog and pin control maps
- 		pinctrl-names = "default";
- 
- 		mmcif_pins: mmcif {
--			renesas,groups = "mmc0_data8_0", "mmc0_ctrl_0";
--			renesas,function = "mmc0";
-+			mux {
-+				renesas,groups = "mmc0_data8_0", "mmc0_ctrl_0";
-+				renesas,function = "mmc0";
-+			};
-+			cfg {
-+				renesas,groups = "mmc0_data8_0";
-+				renesas,pins = "PORT279";
-+				bias-pull-up;
-+			};
- 		};
- 
- 		scifa4_pins: scifa4 {
-diff --git a/drivers/pinctrl/sh-pfc/pinctrl.c b/drivers/pinctrl/sh-pfc/pinctrl.c
-index 7e32bb8c..2cf23476 100644
---- a/drivers/pinctrl/sh-pfc/pinctrl.c
-+++ b/drivers/pinctrl/sh-pfc/pinctrl.c
-@@ -74,6 +74,27 @@ static void sh_pfc_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,
- 	seq_printf(s, "%s", DRV_NAME);
- }
- 
-+static int sh_pfc_map_add_config(struct pinctrl_map *map,
-+				 const char *group_or_pin,
-+				 enum pinctrl_map_type type,
-+				 unsigned long *configs,
-+				 unsigned int num_configs)
-+{
-+	unsigned long *cfgs;
-+
-+	cfgs = kmemdup(configs, num_configs * sizeof(*cfgs),
-+		       GFP_KERNEL);
-+	if (cfgs == NULL)
-+		return -ENOMEM;
-+
-+	map->type = type;
-+	map->data.configs.group_or_pin = group_or_pin;
-+	map->data.configs.configs = cfgs;
-+	map->data.configs.num_configs = num_configs;
-+
-+	return 0;
-+}
-+
- static int sh_pfc_dt_subnode_to_map(struct device *dev, struct device_node *np,
- 				    struct pinctrl_map **map,
- 				    unsigned int *num_maps, unsigned int *index)
-@@ -81,9 +102,14 @@ static int sh_pfc_dt_subnode_to_map(struct device *dev, struct device_node *np,
- 	struct pinctrl_map *maps = *map;
- 	unsigned int nmaps = *num_maps;
- 	unsigned int idx = *index;
-+	unsigned int num_configs;
- 	const char *function = NULL;
-+	unsigned long *configs;
- 	struct property *prop;
-+	unsigned int num_groups;
-+	unsigned int num_pins;
- 	const char *group;
-+	const char *pin;
- 	int ret;
- 
- 	/* Parse the function and configuration properties. At least a function
-@@ -95,25 +121,47 @@ static int sh_pfc_dt_subnode_to_map(struct device *dev, struct device_node *np,
- 		return ret;
- 	}
- 
--	if (!function) {
--		dev_err(dev, "DT node must contain at least one function\n");
-+	ret = pinconf_generic_parse_dt_config(np, &configs, &num_configs);
-+	if (ret < 0)
-+		return ret;
-+
-+	if (!function && num_configs == 0) {
-+		dev_err(dev,
-+			"DT node must contain at least a function or config\n");
- 		goto done;
- 	}
- 
--	/* Count the number of groups and reallocate mappings. */
-+	/* Count the number of pins and groups and reallocate mappings. */
-+	ret = of_property_count_strings(np, "renesas,pins");
-+	if (ret == -EINVAL) {
-+		num_pins = 0;
-+	} else if (ret < 0) {
-+		dev_err(dev, "Invalid pins list in DT\n");
-+		goto done;
-+	} else {
-+		num_pins = ret;
-+	}
-+
- 	ret = of_property_count_strings(np, "renesas,groups");
--	if (ret < 0 && ret != -EINVAL) {
-+	if (ret == -EINVAL) {
-+		num_groups = 0;
-+	} else if (ret < 0) {
- 		dev_err(dev, "Invalid pin groups list in DT\n");
- 		goto done;
-+	} else {
-+		num_groups = ret;
- 	}
- 
--	if (!ret) {
--		dev_err(dev, "No group provided in DT node\n");
-+	if (!num_pins && !num_groups) {
-+		dev_err(dev, "No pin or group provided in DT node\n");
- 		ret = -ENODEV;
- 		goto done;
- 	}
- 
--	nmaps += ret;
-+	if (function)
-+		nmaps += num_groups;
-+	if (configs)
-+		nmaps += num_pins + num_groups;
- 
- 	maps = krealloc(maps, sizeof(*maps) * nmaps, GFP_KERNEL);
- 	if (maps == NULL) {
-@@ -126,22 +174,59 @@ static int sh_pfc_dt_subnode_to_map(struct device *dev, struct device_node *np,
- 
- 	/* Iterate over pins and groups and create the mappings. */
- 	of_property_for_each_string(np, "renesas,groups", prop, group) {
--		maps[idx].type = PIN_MAP_TYPE_MUX_GROUP;
--		maps[idx].data.mux.group = group;
--		maps[idx].data.mux.function = function;
--		idx++;
-+		if (function) {
-+			maps[idx].type = PIN_MAP_TYPE_MUX_GROUP;
-+			maps[idx].data.mux.group = group;
-+			maps[idx].data.mux.function = function;
-+			idx++;
-+		}
-+
-+		if (configs) {
-+			ret = sh_pfc_map_add_config(&maps[idx], group,
-+						    PIN_MAP_TYPE_CONFIGS_GROUP,
-+						    configs, num_configs);
-+			if (ret < 0)
-+				goto done;
-+
-+			idx++;
-+		}
- 	}
- 
--	ret = 0;
-+	if (!configs) {
-+		ret = 0;
-+		goto done;
-+	}
-+
-+	of_property_for_each_string(np, "renesas,pins", prop, pin) {
-+		ret = sh_pfc_map_add_config(&maps[idx], pin,
-+					    PIN_MAP_TYPE_CONFIGS_PIN,
-+					    configs, num_configs);
-+		if (ret < 0)
-+			goto done;
-+
-+		idx++;
-+	}
- 
- done:
- 	*index = idx;
-+	kfree(configs);
- 	return ret;
- }
- 
- static void sh_pfc_dt_free_map(struct pinctrl_dev *pctldev,
- 			       struct pinctrl_map *map, unsigned num_maps)
- {
-+	unsigned int i;
-+
-+	if (map == NULL)
-+		return;
-+
-+	for (i = 0; i < num_maps; ++i) {
-+		if (map[i].type == PIN_MAP_TYPE_CONFIGS_GROUP ||
-+		    map[i].type == PIN_MAP_TYPE_CONFIGS_PIN)
-+			kfree(map[i].data.configs.configs);
-+	}
-+
- 	kfree(map);
- }
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0305-sh-pfc-Guard-DT-parsing-with-ifdef-CONFIG_OF.patch b/patches.renesas/0305-sh-pfc-Guard-DT-parsing-with-ifdef-CONFIG_OF.patch
deleted file mode 100644
index 2f1308a2d9fe5..0000000000000
--- a/patches.renesas/0305-sh-pfc-Guard-DT-parsing-with-ifdef-CONFIG_OF.patch
+++ /dev/null
@@ -1,55 +0,0 @@
-From 69e0bcaacadc2c58fc69d47d3178c2e525ddd248 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 19 Jun 2013 13:26:02 +0200
-Subject: sh-pfc: Guard DT parsing with #ifdef CONFIG_OF
-
-Fix a compilation error caused by pinconf_generic_parse_dt_config() not
-being defined on !CONFIG_OF platforms by guarding the whole DT node
-parsing code with #ifdef CONFIG_OF.
-
-Defining a pinconf_generic_parse_dt_config() on !CONFIG_OF would have
-been possible as well, but would have resulted in a larger code size on
-!CONFIG_OF platforms (such as arch/sh).
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-(cherry picked from commit 3a8d63d4b4fdfa2563b85b4a6db0119cbdb537d1)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pinctrl.c | 4 ++++
- 1 file changed, 4 insertions(+)
-
-diff --git a/drivers/pinctrl/sh-pfc/pinctrl.c b/drivers/pinctrl/sh-pfc/pinctrl.c
-index 2cf23476..bc8b028b 100644
---- a/drivers/pinctrl/sh-pfc/pinctrl.c
-+++ b/drivers/pinctrl/sh-pfc/pinctrl.c
-@@ -74,6 +74,7 @@ static void sh_pfc_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,
- 	seq_printf(s, "%s", DRV_NAME);
- }
- 
-+#ifdef CONFIG_OF
- static int sh_pfc_map_add_config(struct pinctrl_map *map,
- 				 const char *group_or_pin,
- 				 enum pinctrl_map_type type,
-@@ -270,14 +271,17 @@ done:
- 
- 	return ret;
- }
-+#endif /* CONFIG_OF */
- 
- static const struct pinctrl_ops sh_pfc_pinctrl_ops = {
- 	.get_groups_count	= sh_pfc_get_groups_count,
- 	.get_group_name		= sh_pfc_get_group_name,
- 	.get_group_pins		= sh_pfc_get_group_pins,
- 	.pin_dbg_show		= sh_pfc_pin_dbg_show,
-+#ifdef CONFIG_OF
- 	.dt_node_to_map		= sh_pfc_dt_node_to_map,
- 	.dt_free_map		= sh_pfc_dt_free_map,
-+#endif
- };
- 
- static int sh_pfc_get_functions_count(struct pinctrl_dev *pctldev)
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0306-pinctrl-sh-pfc-fix-SDHI0-VccQ-regulator-on-sh73a0-wi.patch b/patches.renesas/0306-pinctrl-sh-pfc-fix-SDHI0-VccQ-regulator-on-sh73a0-wi.patch
deleted file mode 100644
index 9cd3af574813a..0000000000000
--- a/patches.renesas/0306-pinctrl-sh-pfc-fix-SDHI0-VccQ-regulator-on-sh73a0-wi.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From 033fc4686772c06d5aa5ee9a050272f81ca9578c Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Tue, 9 Jul 2013 16:27:24 +0200
-Subject: pinctrl: sh-pfc: fix SDHI0 VccQ regulator on sh73a0 with DT
-
-The PFC pinctrl driver on sh73a0 is also regiatering a VccQ regulator for
-SDHI0. However, its consumers list only included the platform-data based
-SDHI device name. When booted with DT SDHI0 couldn't enable VccQ and
-therefore was unusable. Fix this by adding a consumer with DT-based name.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Acked-by: Simon Horman <horms+renesas@verge.net.au>
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-(cherry picked from commit 74b843512906e60be24ed6aafa2fa2876f294fab)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-sh73a0.c | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-sh73a0.c b/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
-index 7956df58..31f7d0e0 100644
---- a/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
-@@ -3785,6 +3785,7 @@ static const struct regulator_desc sh73a0_vccq_mc0_desc = {
- 
- static struct regulator_consumer_supply sh73a0_vccq_mc0_consumers[] = {
- 	REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"),
-+	REGULATOR_SUPPLY("vqmmc", "ee100000.sdhi"),
- };
- 
- static const struct regulator_init_data sh73a0_vccq_mc0_init_data = {
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0307-ARM-shmobile-armadillo800eva-Don-t-request-GPIO-166-.patch b/patches.renesas/0307-ARM-shmobile-armadillo800eva-Don-t-request-GPIO-166-.patch
deleted file mode 100644
index ad55cdcdc989b..0000000000000
--- a/patches.renesas/0307-ARM-shmobile-armadillo800eva-Don-t-request-GPIO-166-.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From 69dea236408297626e463a714bb59e639296e112 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Wed, 24 Jul 2013 17:50:50 -0700
-Subject: ARM: shmobile: armadillo800eva: Don't request GPIO 166 in board code
-
-89ae7b5bbd3e65bc6ab7a577ca5ec18569589c8c
-(ARM: shmobile: armadillo800eva: Register pinctrl mapping for INTC)
-mistakenly requests GPIO 166 in board code,
-most probably due to a wrong merge conflict resolution.
-As the GPIO is passed to the st1232 driver through platform
-data and requested by the driver,
-there's no need to request it in board code. Fix it.
-
-Tested by: Cao Minh Hiep <cm-hiep@jinso.co.jp>
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-(cherry picked from commit 16b551dd22cc7edacb952f7a2e175f36c3aa4bdb)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-armadillo800eva.c | 3 ---
- 1 file changed, 3 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c
-index 44a62150..e80088d1 100644
---- a/arch/arm/mach-shmobile/board-armadillo800eva.c
-+++ b/arch/arm/mach-shmobile/board-armadillo800eva.c
-@@ -1161,9 +1161,6 @@ static void __init eva_init(void)
- 	gpio_request_one(61, GPIOF_OUT_INIT_HIGH, NULL); /* LCDDON */
- 	gpio_request_one(202, GPIOF_OUT_INIT_LOW, NULL); /* LCD0_LED_CONT */
- 
--	/* Touchscreen */
--	gpio_request_one(166, GPIOF_OUT_INIT_HIGH, NULL); /* TP_RST_B */
--
- 	/* GETHER */
- 	gpio_request_one(18, GPIOF_OUT_INIT_HIGH, NULL); /* PHY_RST */
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0308-ARM-shmobile-BOCK-W-fix-SDHI0-PFC-settings.patch b/patches.renesas/0308-ARM-shmobile-BOCK-W-fix-SDHI0-PFC-settings.patch
deleted file mode 100644
index 707b5f7c6583a..0000000000000
--- a/patches.renesas/0308-ARM-shmobile-BOCK-W-fix-SDHI0-PFC-settings.patch
+++ /dev/null
@@ -1,47 +0,0 @@
-From 930f1337cf779ba1e69a516e8c70a6270413fa6f Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Sat, 27 Jul 2013 03:46:33 +0400
-Subject: ARM: shmobile: BOCK-W: fix SDHI0 PFC settings
-
-The following message is printed on the BOCK-W kernel bootup:
-
-sh-pfc pfc-r8a7778: invalid group "sdhi0" for function "sdhi0"
-
-In addition, SD card cannot be detected.  The reason is apparently that commit
-ca7bb309485e4ec89a9addd47bea (ARM: shmobile: bockw: add SDHI0 support) matched
-the previous version of commit 564617d2f92473031d035deb273da5 (sh-pfc: r8a7778:
-add SDHI support).
-
-Add the missing pin groups according to the BOCK-W board schematics.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit fa3e0cee12fbdd9e0b03470b2b8cf968f537c161)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-bockw.c | 8 +++++++-
- 1 file changed, 7 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/board-bockw.c b/arch/arm/mach-shmobile/board-bockw.c
-index 9936ad2e..c7a0f9ba 100644
---- a/arch/arm/mach-shmobile/board-bockw.c
-+++ b/arch/arm/mach-shmobile/board-bockw.c
-@@ -165,7 +165,13 @@ static const struct pinctrl_map bockw_pinctrl_map[] = {
- 				  "usb1", "usb1"),
- 	/* SDHI0 */
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
--				  "sdhi0", "sdhi0"),
-+				  "sdhi0_data4", "sdhi0"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
-+				  "sdhi0_ctrl", "sdhi0"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
-+				  "sdhi0_cd", "sdhi0"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
-+				  "sdhi0_wp", "sdhi0"),
- };
- 
- #define FPGA	0x18200000
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0309-ARM-shmobile-lager-do-not-annotate-gpio_buttons-as-_.patch b/patches.renesas/0309-ARM-shmobile-lager-do-not-annotate-gpio_buttons-as-_.patch
deleted file mode 100644
index d786c572b8b0a..0000000000000
--- a/patches.renesas/0309-ARM-shmobile-lager-do-not-annotate-gpio_buttons-as-_.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From 95b769e4ccef2f79cdf01b467ea1696fcbafedf1 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Fri, 26 Jul 2013 17:53:42 +0900
-Subject: ARM: shmobile: lager: do not annotate gpio_buttons as __initdata
-
-When the gpio-keys device is registered using
-platform_device_register_data() the platform data argument,
-lager_keys_pdata is duplicated and thus should be marked as __initdata
-to avoid wasting memory. However, this is not true of gpio_buttons,
-a reference to it rather than its value is duplicated when lager_keys_pdata
-is duplicated.
-
-This avoids accessing freed memory if gpio-key events occur
-after unused kernel memory is freed late in the kernel's boot.
-
-This but was added when support for gpio-keys was added to lager
-in c3842e4fcbb7664276443b79187b7808c2e80a35
-("ARM: shmobile: lager: support GPIO switches") which was included
-in v3.11-rc1.
-
-Tested-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit a601469386b543df2a4d97ad7d524716945278a3)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-lager.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
-index d73e21d3..8d6bd5c5 100644
---- a/arch/arm/mach-shmobile/board-lager.c
-+++ b/arch/arm/mach-shmobile/board-lager.c
-@@ -59,7 +59,7 @@ static __initdata struct gpio_led_platform_data lager_leds_pdata = {
- #define GPIO_KEY(c, g, d, ...) \
- 	{ .code = c, .gpio = g, .desc = d, .active_low = 1 }
- 
--static __initdata struct gpio_keys_button gpio_buttons[] = {
-+static struct gpio_keys_button gpio_buttons[] = {
- 	GPIO_KEY(KEY_4,		RCAR_GP_PIN(1, 28),	"SW2-pin4"),
- 	GPIO_KEY(KEY_3,		RCAR_GP_PIN(1, 26),	"SW2-pin3"),
- 	GPIO_KEY(KEY_2,		RCAR_GP_PIN(1, 24),	"SW2-pin2"),
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0310-ARM-shmobile-r8a7778-correct-model-name-in-Kconfig.patch b/patches.renesas/0310-ARM-shmobile-r8a7778-correct-model-name-in-Kconfig.patch
deleted file mode 100644
index 59f2c19896445..0000000000000
--- a/patches.renesas/0310-ARM-shmobile-r8a7778-correct-model-name-in-Kconfig.patch
+++ /dev/null
@@ -1,38 +0,0 @@
-From 008c5734c22eaeec3ff9d2b9e8f09e18b8486f84 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Thu, 9 May 2013 00:05:40 +0000
-Subject: ARM: shmobile: r8a7778: correct model name in Kconfig
-
-The correct model name is R-Car M1A or R8A77781; R8A77780 corresponds to R-Car
-M1S which is a SH based SoC.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-[horms+renesas@verge.net.au: manually applied]
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-(cherry picked from commit 45fa9295a0215c99019653b06f11dcda0340a7f7)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-	arch/arm/mach-shmobile/Kconfig
----
- arch/arm/mach-shmobile/Kconfig | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
-index 4b172453..3912ce91 100644
---- a/arch/arm/mach-shmobile/Kconfig
-+++ b/arch/arm/mach-shmobile/Kconfig
-@@ -36,7 +36,7 @@ config ARCH_R8A7740
- 	select RENESAS_INTC_IRQPIN
- 
- config ARCH_R8A7778
--	bool "R-Car M1 (R8A777801)"
-+	bool "R-Car M1A (R8A77781)"
- 	select ARCH_WANT_OPTIONAL_GPIOLIB
- 	select CPU_V7
- 	select SH_CLK_CPG
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0311-ARM-shmobile-armadillo800eva-remove-left-overs.patch b/patches.renesas/0311-ARM-shmobile-armadillo800eva-remove-left-overs.patch
deleted file mode 100644
index adac3b9bf1bb4..0000000000000
--- a/patches.renesas/0311-ARM-shmobile-armadillo800eva-remove-left-overs.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From a064e9ee82d776558c3c17bc5e147af65bb6e932 Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Thu, 6 Jun 2013 17:38:11 +0200
-Subject: ARM: shmobile: armadillo800eva: remove left-overs
-
-A comment and a #define in board-armadillo800eva.c have been left over
-after recent changes and are no longer relevant or needed, remove them.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit bcfed2a8a61a0f6ee7769f5093a8279a9e50c526)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-armadillo800eva.c | 9 ---------
- 1 file changed, 9 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c
-index e80088d1..99cea1ee 100644
---- a/arch/arm/mach-shmobile/board-armadillo800eva.c
-+++ b/arch/arm/mach-shmobile/board-armadillo800eva.c
-@@ -678,15 +678,6 @@ static struct platform_device vcc_sdhi1 = {
- };
- 
- /* SDHI0 */
--/*
-- * FIXME
-- *
-- * It use polling mode here, since
-- * CD (= Card Detect) pin is not connected to SDHI0_CD.
-- * We can use IRQ31 as card detect irq,
-- * but it needs chattering removal operation
-- */
--#define IRQ31	irq_pin(31)
- static struct sh_mobile_sdhi_info sdhi0_info = {
- 	.dma_slave_tx	= SHDMA_SLAVE_SDHI0_TX,
- 	.dma_slave_rx	= SHDMA_SLAVE_SDHI0_RX,
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0312-ARM-shmobile-r8a7778-add-__initdata-on-resource-and-.patch b/patches.renesas/0312-ARM-shmobile-r8a7778-add-__initdata-on-resource-and-.patch
deleted file mode 100644
index bc11ba969b5b0..0000000000000
--- a/patches.renesas/0312-ARM-shmobile-r8a7778-add-__initdata-on-resource-and-.patch
+++ /dev/null
@@ -1,115 +0,0 @@
-From 08b9f323311f7def6a7630f0373b35cd48293c51 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Sun, 26 May 2013 17:53:37 -0700
-Subject: ARM: shmobile: r8a7778: add __initdata on resource and device data
-
-These data will be kmemdup()'ed on
-platform_device_add_resources() and platform_device_add_data()
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms@verge.net.au>
-(cherry picked from commit c9031fbb35bd44d99c5cfe7d3c97ec238d63643a)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-r8a7778.c | 24 ++++++++++++------------
- 1 file changed, 12 insertions(+), 12 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-r8a7778.c b/arch/arm/mach-shmobile/setup-r8a7778.c
-index 80c20392..b70bfeef 100644
---- a/arch/arm/mach-shmobile/setup-r8a7778.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7778.c
-@@ -53,7 +53,7 @@
- 	.irqs		= SCIx_IRQ_MUXED(irq),			\
- }
- 
--static struct plat_sci_port scif_platform_data[] = {
-+static struct plat_sci_port scif_platform_data[] __initdata = {
- 	SCIF_INFO(0xffe40000, gic_iid(0x66)),
- 	SCIF_INFO(0xffe41000, gic_iid(0x67)),
- 	SCIF_INFO(0xffe42000, gic_iid(0x68)),
-@@ -63,24 +63,24 @@ static struct plat_sci_port scif_platform_data[] = {
- };
- 
- /* TMU */
--static struct resource sh_tmu0_resources[] = {
-+static struct resource sh_tmu0_resources[] __initdata = {
- 	DEFINE_RES_MEM(0xffd80008, 12),
- 	DEFINE_RES_IRQ(gic_iid(0x40)),
- };
- 
--static struct sh_timer_config sh_tmu0_platform_data = {
-+static struct sh_timer_config sh_tmu0_platform_data __initdata = {
- 	.name			= "TMU00",
- 	.channel_offset		= 0x4,
- 	.timer_bit		= 0,
- 	.clockevent_rating	= 200,
- };
- 
--static struct resource sh_tmu1_resources[] = {
-+static struct resource sh_tmu1_resources[] __initdata = {
- 	DEFINE_RES_MEM(0xffd80014, 12),
- 	DEFINE_RES_IRQ(gic_iid(0x41)),
- };
- 
--static struct sh_timer_config sh_tmu1_platform_data = {
-+static struct sh_timer_config sh_tmu1_platform_data __initdata = {
- 	.name			= "TMU01",
- 	.channel_offset		= 0x10,
- 	.timer_bit		= 1,
-@@ -189,7 +189,7 @@ USB_PLATFORM_INFO(ehci);
- USB_PLATFORM_INFO(ohci);
- 
- /* Ether */
--static struct resource ether_resources[] = {
-+static struct resource ether_resources[] __initdata = {
- 	DEFINE_RES_MEM(0xfde00000, 0x400),
- 	DEFINE_RES_IRQ(gic_iid(0x89)),
- };
-@@ -203,17 +203,17 @@ void __init r8a7778_add_ether_device(struct sh_eth_plat_data *pdata)
- }
- 
- /* PFC/GPIO */
--static struct resource pfc_resources[] = {
-+static struct resource pfc_resources[] __initdata = {
- 	DEFINE_RES_MEM(0xfffc0000, 0x118),
- };
- 
- #define R8A7778_GPIO(idx)						\
--static struct resource r8a7778_gpio##idx##_resources[] = {		\
-+static struct resource r8a7778_gpio##idx##_resources[] __initdata = {	\
- 	DEFINE_RES_MEM(0xffc40000 + 0x1000 * (idx), 0x30),		\
- 	DEFINE_RES_IRQ(gic_iid(0x87)),					\
- };									\
- 									\
--static struct gpio_rcar_config r8a7778_gpio##idx##_platform_data = {	\
-+static struct gpio_rcar_config r8a7778_gpio##idx##_platform_data __initdata = { \
- 	.gpio_base	= 32 * (idx),					\
- 	.irq_base	= GPIO_IRQ_BASE(idx),				\
- 	.number_of_pins	= 32,						\
-@@ -249,7 +249,7 @@ void __init r8a7778_pinmux_init(void)
- };
- 
- /* SDHI */
--static struct resource sdhi_resources[] = {
-+static struct resource sdhi_resources[] __initdata = {
- 	/* SDHI0 */
- 	DEFINE_RES_MEM(0xFFE4C000, 0x100),
- 	DEFINE_RES_IRQ(gic_iid(0x77)),
-@@ -365,12 +365,12 @@ void __init r8a7778_init_late(void)
- 	platform_device_register_full(&ohci_info);
- }
- 
--static struct renesas_intc_irqpin_config irqpin_platform_data = {
-+static struct renesas_intc_irqpin_config irqpin_platform_data __initdata = {
- 	.irq_base = irq_pin(0), /* IRQ0 -> IRQ3 */
- 	.sense_bitfield_width = 2,
- };
- 
--static struct resource irqpin_resources[] = {
-+static struct resource irqpin_resources[] __initdata = {
- 	DEFINE_RES_MEM(0xfe78001c, 4), /* ICR1 */
- 	DEFINE_RES_MEM(0xfe780010, 4), /* INTPRI */
- 	DEFINE_RES_MEM(0xfe780024, 4), /* INTREQ */
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0313-ARM-shmobile-sh73a0-pinmux-platform-device-cleanup.patch b/patches.renesas/0313-ARM-shmobile-sh73a0-pinmux-platform-device-cleanup.patch
deleted file mode 100644
index b1488f24b62e3..0000000000000
--- a/patches.renesas/0313-ARM-shmobile-sh73a0-pinmux-platform-device-cleanup.patch
+++ /dev/null
@@ -1,63 +0,0 @@
-From 72b99e0dd14dccab90e7926f3774f96154c4346f Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Thu, 27 Jun 2013 17:09:01 +0900
-Subject: ARM: shmobile: sh73a0 pinmux platform device cleanup
-
-Use DEFINE_RES_MEM() and platform_device_register_simple()
-to save a couple of lines of code.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-[ remove const from resource pfc_resources to avoid section miss-match
-  reported by 4.4.5 ]
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-(cherry picked from commit 474f67587345bf7b32bbd9d2b5621e85500103c5)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-sh73a0.c | 25 ++++++-------------------
- 1 file changed, 6 insertions(+), 19 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c
-index 96e7ca1e..79a60407 100644
---- a/arch/arm/mach-shmobile/setup-sh73a0.c
-+++ b/arch/arm/mach-shmobile/setup-sh73a0.c
-@@ -61,29 +61,16 @@ void __init sh73a0_map_io(void)
- 	iotable_init(sh73a0_io_desc, ARRAY_SIZE(sh73a0_io_desc));
- }
- 
--static struct resource sh73a0_pfc_resources[] = {
--	[0] = {
--		.start	= 0xe6050000,
--		.end	= 0xe6057fff,
--		.flags	= IORESOURCE_MEM,
--	},
--	[1] = {
--		.start	= 0xe605801c,
--		.end	= 0xe6058027,
--		.flags	= IORESOURCE_MEM,
--	}
--};
--
--static struct platform_device sh73a0_pfc_device = {
--	.name		= "pfc-sh73a0",
--	.id		= -1,
--	.resource	= sh73a0_pfc_resources,
--	.num_resources	= ARRAY_SIZE(sh73a0_pfc_resources),
-+/* PFC */
-+static struct resource pfc_resources[] __initdata = {
-+	DEFINE_RES_MEM(0xe6050000, 0x8000),
-+	DEFINE_RES_MEM(0xe605801c, 0x000c),
- };
- 
- void __init sh73a0_pinmux_init(void)
- {
--	platform_device_register(&sh73a0_pfc_device);
-+	platform_device_register_simple("pfc-sh73a0", -1, pfc_resources,
-+					ARRAY_SIZE(pfc_resources));
- }
- 
- static struct plat_sci_port scif0_platform_data = {
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0314-ARM-shmobile-emev2-Remove-init_irq-declaration-in-ma.patch b/patches.renesas/0314-ARM-shmobile-emev2-Remove-init_irq-declaration-in-ma.patch
deleted file mode 100644
index d6b2c45d0b7d0..0000000000000
--- a/patches.renesas/0314-ARM-shmobile-emev2-Remove-init_irq-declaration-in-ma.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From d5f8176271e63798d7de990e25df5ec3fa1d79d1 Mon Sep 17 00:00:00 2001
-From: Maxime Ripard <maxime.ripard@free-electrons.com>
-Date: Sun, 26 May 2013 22:05:23 +0900
-Subject: ARM: shmobile: emev2: Remove init_irq declaration in machine
- description
-
-Commit ebafed7a ("ARM: irq: Call irqchip_init if no init_irq function is
-specified") removed the need to explictly setup the init_irq field in
-the machine description when using only irqchip_init. Remove that
-declaration for shmobile as well.
-
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 34dd9fc04a028edad7658006764c4d18ac3dca73)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-emev2.c | 2 --
- 1 file changed, 2 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-emev2.c b/arch/arm/mach-shmobile/setup-emev2.c
-index 1ccddd22..6e8b6ac3 100644
---- a/arch/arm/mach-shmobile/setup-emev2.c
-+++ b/arch/arm/mach-shmobile/setup-emev2.c
-@@ -20,7 +20,6 @@
- #include <linux/init.h>
- #include <linux/interrupt.h>
- #include <linux/irq.h>
--#include <linux/irqchip.h>
- #include <linux/platform_device.h>
- #include <linux/platform_data/gpio-em.h>
- #include <linux/of_platform.h>
-@@ -454,7 +453,6 @@ DT_MACHINE_START(EMEV2_DT, "Generic Emma Mobile EV2 (Flattened Device Tree)")
- 	.smp		= smp_ops(emev2_smp_ops),
- 	.init_early	= emev2_init_delay,
- 	.nr_irqs	= NR_IRQS_LEGACY,
--	.init_irq	= irqchip_init,
- 	.init_machine	= emev2_add_standard_devices_dt,
- 	.dt_compat	= emev2_boards_compat_dt,
- MACHINE_END
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0315-ARM-shmobile-r8a73a4-Remove-init_irq-declaration-in-.patch b/patches.renesas/0315-ARM-shmobile-r8a73a4-Remove-init_irq-declaration-in-.patch
deleted file mode 100644
index 7490efe533e4d..0000000000000
--- a/patches.renesas/0315-ARM-shmobile-r8a73a4-Remove-init_irq-declaration-in-.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From 50537521dd9e19af55208f0a6320b086a43d3c86 Mon Sep 17 00:00:00 2001
-From: Maxime Ripard <maxime.ripard@free-electrons.com>
-Date: Sun, 26 May 2013 22:05:56 +0900
-Subject: ARM: shmobile: r8a73a4: Remove init_irq declaration in machine
- description
-
-Commit ebafed7a ("ARM: irq: Call irqchip_init if no init_irq function is
-specified") removed the need to explictly setup the init_irq field in
-the machine description when using only irqchip_init. Remove that
-declaration for shmobile as well.
-
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 0bdbe04db005e025d3522ad3ae9797a4954528e9)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-r8a73a4.c | 2 --
- 1 file changed, 2 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-r8a73a4.c b/arch/arm/mach-shmobile/setup-r8a73a4.c
-index 7f45c2ed..a8c4e41b 100644
---- a/arch/arm/mach-shmobile/setup-r8a73a4.c
-+++ b/arch/arm/mach-shmobile/setup-r8a73a4.c
-@@ -18,7 +18,6 @@
-  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
-  */
- #include <linux/irq.h>
--#include <linux/irqchip.h>
- #include <linux/kernel.h>
- #include <linux/of_platform.h>
- #include <linux/platform_data/irq-renesas-irqc.h>
-@@ -194,7 +193,6 @@ static const char *r8a73a4_boards_compat_dt[] __initdata = {
- };
- 
- DT_MACHINE_START(R8A73A4_DT, "Generic R8A73A4 (Flattened Device Tree)")
--	.init_irq	= irqchip_init,
- 	.init_machine	= r8a73a4_add_standard_devices_dt,
- 	.init_time	= shmobile_timer_init,
- 	.dt_compat	= r8a73a4_boards_compat_dt,
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0316-ARM-shmobile-ape6evm-Remove-init_irq-declaration-in-.patch b/patches.renesas/0316-ARM-shmobile-ape6evm-Remove-init_irq-declaration-in-.patch
deleted file mode 100644
index 971df0f8489d7..0000000000000
--- a/patches.renesas/0316-ARM-shmobile-ape6evm-Remove-init_irq-declaration-in-.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From a7020cfc29743e8187b8a7ae4a51f9cdc6fa6c6c Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Mon, 1 Jul 2013 15:01:21 +0900
-Subject: ARM: shmobile: ape6evm: Remove init_irq declaration in machine
- description
-
-Remove redundant irqchip_init() callback. The default case
-of NULL will result in invoking irqchip_init() anyway.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-[ horms+renesas@verge.net.au: Trimmed patch to remove portion
-  that updates the r8a73a4 SoC and altered the subject to
-  use the same format as the patch that updates the r8a73a4. ]
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-(cherry picked from commit c7f6085f6ea7b7cf155f470431cf1b12cd999450)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-ape6evm.c | 2 --
- 1 file changed, 2 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-ape6evm.c b/arch/arm/mach-shmobile/board-ape6evm.c
-index 5eb0caa6..1fbc39a1 100644
---- a/arch/arm/mach-shmobile/board-ape6evm.c
-+++ b/arch/arm/mach-shmobile/board-ape6evm.c
-@@ -20,7 +20,6 @@
- 
- #include <linux/gpio.h>
- #include <linux/interrupt.h>
--#include <linux/irqchip.h>
- #include <linux/kernel.h>
- #include <linux/pinctrl/machine.h>
- #include <linux/platform_device.h>
-@@ -102,7 +101,6 @@ static const char *ape6evm_boards_compat_dt[] __initdata = {
- };
- 
- DT_MACHINE_START(APE6EVM_DT, "ape6evm")
--	.init_irq	= irqchip_init,
- 	.init_time	= shmobile_timer_init,
- 	.init_machine	= ape6evm_add_standard_devices,
- 	.dt_compat	= ape6evm_boards_compat_dt,
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0317-ARM-shmobile-r8a7790-Remove-init_irq-declaration-in-.patch b/patches.renesas/0317-ARM-shmobile-r8a7790-Remove-init_irq-declaration-in-.patch
deleted file mode 100644
index 4c688089be40e..0000000000000
--- a/patches.renesas/0317-ARM-shmobile-r8a7790-Remove-init_irq-declaration-in-.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From 24451c0ccc09a408a7337f3afaf7e85f075aa7d6 Mon Sep 17 00:00:00 2001
-From: Maxime Ripard <maxime.ripard@free-electrons.com>
-Date: Mon, 27 May 2013 18:00:22 +0900
-Subject: ARM: shmobile: r8a7790: Remove init_irq declaration in machine
- description
-
-Commit ebafed7a ("ARM: irq: Call irqchip_init if no init_irq function is
-specified") removed the need to explictly setup the init_irq field in
-the machine description when using only irqchip_init. Remove that
-declaration for shmobile as well.
-
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 125332daf2e4119614c561bc8cbf1f49cd243023)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-r8a7790.c | 2 --
- 1 file changed, 2 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c
-index 28f94752..d405dbd4 100644
---- a/arch/arm/mach-shmobile/setup-r8a7790.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7790.c
-@@ -19,7 +19,6 @@
-  */
- 
- #include <linux/irq.h>
--#include <linux/irqchip.h>
- #include <linux/kernel.h>
- #include <linux/of_platform.h>
- #include <linux/serial_sci.h>
-@@ -188,7 +187,6 @@ static const char *r8a7790_boards_compat_dt[] __initdata = {
- };
- 
- DT_MACHINE_START(R8A7790_DT, "Generic R8A7790 (Flattened Device Tree)")
--	.init_irq	= irqchip_init,
- 	.init_machine	= r8a7790_add_standard_devices_dt,
- 	.init_time	= r8a7790_timer_init,
- 	.dt_compat	= r8a7790_boards_compat_dt,
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0318-ARM-shmobile-lager-Remove-init_irq-declaration-in-ma.patch b/patches.renesas/0318-ARM-shmobile-lager-Remove-init_irq-declaration-in-ma.patch
deleted file mode 100644
index 30a22621d0298..0000000000000
--- a/patches.renesas/0318-ARM-shmobile-lager-Remove-init_irq-declaration-in-ma.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From 0cadc7b2f86565454ea75ddf8a6ec34c83aba1dd Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Mon, 1 Jul 2013 15:01:31 +0900
-Subject: ARM: shmobile: lager: Remove init_irq declaration in machine
- description
-
-Remove redundant irqchip_init() callback. The default case
-of NULL will result in invoking irqchip_init() anyway.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-[ horms+renesas@verge.net.au: Trimmed patch to remove portion
-  that updates the r8a7790 SoC and altered the subject to
-  use the same format as the patch that updates the r8a7790. ]
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-(cherry picked from commit 5f85052c606e38c98de28170a2df72f78931aa30)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-lager.c | 2 --
- 1 file changed, 2 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
-index 8d6bd5c5..78d92d34 100644
---- a/arch/arm/mach-shmobile/board-lager.c
-+++ b/arch/arm/mach-shmobile/board-lager.c
-@@ -22,7 +22,6 @@
- #include <linux/gpio_keys.h>
- #include <linux/input.h>
- #include <linux/interrupt.h>
--#include <linux/irqchip.h>
- #include <linux/kernel.h>
- #include <linux/leds.h>
- #include <linux/pinctrl/machine.h>
-@@ -103,7 +102,6 @@ static const char *lager_boards_compat_dt[] __initdata = {
- };
- 
- DT_MACHINE_START(LAGER_DT, "lager")
--	.init_irq	= irqchip_init,
- 	.init_time	= r8a7790_timer_init,
- 	.init_machine	= lager_add_standard_devices,
- 	.dt_compat	= lager_boards_compat_dt,
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0319-ARM-shmobile-sh73a0-Remove-init_irq-declaration-in-m.patch b/patches.renesas/0319-ARM-shmobile-sh73a0-Remove-init_irq-declaration-in-m.patch
deleted file mode 100644
index 50552acde49a1..0000000000000
--- a/patches.renesas/0319-ARM-shmobile-sh73a0-Remove-init_irq-declaration-in-m.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From 89921647f8cf27d8bf49b706cc9ac3334ccf1756 Mon Sep 17 00:00:00 2001
-From: Maxime Ripard <maxime.ripard@free-electrons.com>
-Date: Mon, 27 May 2013 18:00:49 +0900
-Subject: ARM: shmobile: sh73a0: Remove init_irq declaration in machine
- description
-
-Commit ebafed7a ("ARM: irq: Call irqchip_init if no init_irq function is
-specified") removed the need to explictly setup the init_irq field in
-the machine description when using only irqchip_init. Remove that
-declaration for shmobile as well.
-
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 7d6b8883547feacc705c476cdb7f272e309d9fb0)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-sh73a0.c | 2 --
- 1 file changed, 2 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c
-index 79a60407..bd9370f2 100644
---- a/arch/arm/mach-shmobile/setup-sh73a0.c
-+++ b/arch/arm/mach-shmobile/setup-sh73a0.c
-@@ -22,7 +22,6 @@
- #include <linux/init.h>
- #include <linux/interrupt.h>
- #include <linux/irq.h>
--#include <linux/irqchip.h>
- #include <linux/platform_device.h>
- #include <linux/of_platform.h>
- #include <linux/delay.h>
-@@ -975,7 +974,6 @@ DT_MACHINE_START(SH73A0_DT, "Generic SH73A0 (Flattened Device Tree)")
- 	.map_io		= sh73a0_map_io,
- 	.init_early	= sh73a0_init_delay,
- 	.nr_irqs	= NR_IRQS_LEGACY,
--	.init_irq	= irqchip_init,
- 	.init_machine	= sh73a0_add_standard_devices_dt,
- 	.dt_compat	= sh73a0_boards_compat_dt,
- MACHINE_END
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0320-ARM-shmobile-kzm9g-Remove-init_irq-declaration-in-ma.patch b/patches.renesas/0320-ARM-shmobile-kzm9g-Remove-init_irq-declaration-in-ma.patch
deleted file mode 100644
index f7688dc89b0cb..0000000000000
--- a/patches.renesas/0320-ARM-shmobile-kzm9g-Remove-init_irq-declaration-in-ma.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From 633e3548f60e716dd726af48cea453556f7b1f55 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Mon, 1 Jul 2013 15:01:40 +0900
-Subject: ARM: shmobile: kzm9g: Remove init_irq declaration in machine
- description
-
-Remove redundant irqchip_init() callback. The default case
-of NULL will result in invoking irqchip_init() anyway.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-[ horms+renesas@verge.net.au: Trimmed patch to remove portion
-  that updates the sh73a0 SoC and altered the subject to
-  use the same format as the patch that updates the sh73a0. ]
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-(cherry picked from commit fc492ba58aa6642f34eba716daf6ec4d2715e492)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-kzm9g-reference.c | 2 --
- 1 file changed, 2 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-kzm9g-reference.c b/arch/arm/mach-shmobile/board-kzm9g-reference.c
-index 44055fe8..41092bb0 100644
---- a/arch/arm/mach-shmobile/board-kzm9g-reference.c
-+++ b/arch/arm/mach-shmobile/board-kzm9g-reference.c
-@@ -24,7 +24,6 @@
- #include <linux/gpio.h>
- #include <linux/io.h>
- #include <linux/irq.h>
--#include <linux/irqchip.h>
- #include <linux/input.h>
- #include <linux/of_platform.h>
- #include <linux/pinctrl/machine.h>
-@@ -99,7 +98,6 @@ DT_MACHINE_START(KZM9G_DT, "kzm9g-reference")
- 	.map_io		= sh73a0_map_io,
- 	.init_early	= sh73a0_init_delay,
- 	.nr_irqs	= NR_IRQS_LEGACY,
--	.init_irq	= irqchip_init,
- 	.init_machine	= kzm_init,
- 	.init_time	= shmobile_timer_init,
- 	.dt_compat	= kzm9g_boards_compat_dt,
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0321-ARM-shmobile-Remove-unused-EMEV2-auxdata-and-callbac.patch b/patches.renesas/0321-ARM-shmobile-Remove-unused-EMEV2-auxdata-and-callbac.patch
deleted file mode 100644
index 8898c510660d6..0000000000000
--- a/patches.renesas/0321-ARM-shmobile-Remove-unused-EMEV2-auxdata-and-callbac.patch
+++ /dev/null
@@ -1,48 +0,0 @@
-From ee1fbd49bb33d4b6847d4d8bad551d1780c2c637 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Mon, 1 Jul 2013 14:41:15 +0900
-Subject: ARM: shmobile: Remove unused EMEV2 auxdata and callback
-
-Replace the SoC-specific callback init_machine() with
-a NULL to use the default code. This cleans up the code
-and reduces the number of lines.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit a597d8df88143f7a409b260b1e89735eb0bdca05)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-emev2.c | 10 ----------
- 1 file changed, 10 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-emev2.c b/arch/arm/mach-shmobile/setup-emev2.c
-index 6e8b6ac3..b0564ce1 100644
---- a/arch/arm/mach-shmobile/setup-emev2.c
-+++ b/arch/arm/mach-shmobile/setup-emev2.c
-@@ -434,15 +434,6 @@ void __init emev2_init_irq(void)
- }
- 
- #ifdef CONFIG_USE_OF
--static const struct of_dev_auxdata emev2_auxdata_lookup[] __initconst = {
--	{ }
--};
--
--static void __init emev2_add_standard_devices_dt(void)
--{
--	of_platform_populate(NULL, of_default_bus_match_table,
--			     emev2_auxdata_lookup, NULL);
--}
- 
- static const char *emev2_boards_compat_dt[] __initdata = {
- 	"renesas,emev2",
-@@ -453,7 +444,6 @@ DT_MACHINE_START(EMEV2_DT, "Generic Emma Mobile EV2 (Flattened Device Tree)")
- 	.smp		= smp_ops(emev2_smp_ops),
- 	.init_early	= emev2_init_delay,
- 	.nr_irqs	= NR_IRQS_LEGACY,
--	.init_machine	= emev2_add_standard_devices_dt,
- 	.dt_compat	= emev2_boards_compat_dt,
- MACHINE_END
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0322-ARM-shmobile-Remove-unused-r8a7740-auxdata-table.patch b/patches.renesas/0322-ARM-shmobile-Remove-unused-r8a7740-auxdata-table.patch
deleted file mode 100644
index 4747e0b00f212..0000000000000
--- a/patches.renesas/0322-ARM-shmobile-Remove-unused-r8a7740-auxdata-table.patch
+++ /dev/null
@@ -1,52 +0,0 @@
-From b306d0cedc421e0cb3e21b42d48cafd9f1409bd7 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Mon, 1 Jul 2013 14:41:24 +0900
-Subject: ARM: shmobile: Remove unused r8a7740 auxdata table
-
-Pass NULL to of_platform_populate instead of passing
-an empty list. This cleans up the code and reduces the
-number of lines.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 88378837780166d67a11142cd6f76596c0a2d8c3)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-r8a7740.c | 16 +++++++++++-----
- 1 file changed, 11 insertions(+), 5 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-r8a7740.c b/arch/arm/mach-shmobile/setup-r8a7740.c
-index 00c5a707..ac29c2ee 100644
---- a/arch/arm/mach-shmobile/setup-r8a7740.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7740.c
-@@ -986,16 +986,22 @@ void __init r8a7740_add_early_devices(void)
- 
- #ifdef CONFIG_USE_OF
- 
--static const struct of_dev_auxdata r8a7740_auxdata_lookup[] __initconst = {
--	{ }
--};
-+void __init r8a7740_add_early_devices_dt(void)
-+{
-+	shmobile_setup_delay(800, 1, 3); /* Cortex-A9 @ 800MHz */
-+
-+	early_platform_add_devices(r8a7740_early_devices,
-+				   ARRAY_SIZE(r8a7740_early_devices));
-+
-+	/* setup early console here as well */
-+	shmobile_setup_console();
-+}
- 
- void __init r8a7740_add_standard_devices_dt(void)
- {
- 	platform_add_devices(r8a7740_devices_dt,
- 			    ARRAY_SIZE(r8a7740_devices_dt));
--	of_platform_populate(NULL, of_default_bus_match_table,
--			     r8a7740_auxdata_lookup, NULL);
-+	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
- }
- 
- void __init r8a7740_init_delay(void)
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0323-ARM-shmobile-Remove-unused-r8a7778-auxdata-and-callb.patch b/patches.renesas/0323-ARM-shmobile-Remove-unused-r8a7778-auxdata-and-callb.patch
deleted file mode 100644
index bc4841e36c0fd..0000000000000
--- a/patches.renesas/0323-ARM-shmobile-Remove-unused-r8a7778-auxdata-and-callb.patch
+++ /dev/null
@@ -1,49 +0,0 @@
-From 5df0763f88fbf629404113aed711b3c3b3b81ccc Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Mon, 1 Jul 2013 14:41:33 +0900
-Subject: ARM: shmobile: Remove unused r8a7778 auxdata and callback
-
-Replace the SoC-specific callback init_machine() with
-a NULL to use the default code. This cleans up the code
-and reduces the number of lines.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 40216263d3d0b9b46688a28a96daf66fe75caa28)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-r8a7778.c | 11 -----------
- 1 file changed, 11 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-r8a7778.c b/arch/arm/mach-shmobile/setup-r8a7778.c
-index b70bfeef..2a101ebd 100644
---- a/arch/arm/mach-shmobile/setup-r8a7778.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7778.c
-@@ -457,16 +457,6 @@ void __init r8a7778_init_irq_dt(void)
- 	r8a7778_init_irq_common();
- }
- 
--static const struct of_dev_auxdata r8a7778_auxdata_lookup[] __initconst = {
--	{},
--};
--
--void __init r8a7778_add_standard_devices_dt(void)
--{
--	of_platform_populate(NULL, of_default_bus_match_table,
--			     r8a7778_auxdata_lookup, NULL);
--}
--
- static const char *r8a7778_compat_dt[] __initdata = {
- 	"renesas,r8a7778",
- 	NULL,
-@@ -475,7 +465,6 @@ static const char *r8a7778_compat_dt[] __initdata = {
- DT_MACHINE_START(R8A7778_DT, "Generic R8A7778 (Flattened Device Tree)")
- 	.init_early	= r8a7778_init_delay,
- 	.init_irq	= r8a7778_init_irq_dt,
--	.init_machine	= r8a7778_add_standard_devices_dt,
- 	.init_time	= shmobile_timer_init,
- 	.dt_compat	= r8a7778_compat_dt,
- 	.init_late      = r8a7778_init_late,
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0324-ARM-shmobile-Remove-unused-r8a7779-auxdata-table.patch b/patches.renesas/0324-ARM-shmobile-Remove-unused-r8a7779-auxdata-table.patch
deleted file mode 100644
index 7521bbaeddf1b..0000000000000
--- a/patches.renesas/0324-ARM-shmobile-Remove-unused-r8a7779-auxdata-table.patch
+++ /dev/null
@@ -1,45 +0,0 @@
-From b43f133f7119e116c86f2088652b270b4d782b53 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Mon, 1 Jul 2013 14:41:46 +0900
-Subject: ARM: shmobile: Remove unused r8a7779 auxdata table
-
-Pass NULL to of_platform_populate instead of passing
-an empty list. This cleans up the code and reduces the
-number of lines.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 41b0156ca5a1460f8f6dde7e57baf1b80d6a7030)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-r8a7779.c | 7 +------
- 1 file changed, 1 insertion(+), 6 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c
-index 39868776..66d38261 100644
---- a/arch/arm/mach-shmobile/setup-r8a7779.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7779.c
-@@ -665,10 +665,6 @@ void __init r8a7779_init_delay(void)
- 	shmobile_setup_delay(1000, 2, 4); /* Cortex-A9 @ 1000MHz */
- }
- 
--static const struct of_dev_auxdata r8a7779_auxdata_lookup[] __initconst = {
--	{},
--};
--
- void __init r8a7779_add_standard_devices_dt(void)
- {
- 	/* clocks are setup late during boot in the case of DT */
-@@ -676,8 +672,7 @@ void __init r8a7779_add_standard_devices_dt(void)
- 
- 	platform_add_devices(r8a7779_devices_dt,
- 			     ARRAY_SIZE(r8a7779_devices_dt));
--	of_platform_populate(NULL, of_default_bus_match_table,
--			     r8a7779_auxdata_lookup, NULL);
-+	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
- }
- 
- static const char *r8a7779_compat_dt[] __initdata = {
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0325-ARM-shmobile-Remove-unused-sh7372-auxdata-table.patch b/patches.renesas/0325-ARM-shmobile-Remove-unused-sh7372-auxdata-table.patch
deleted file mode 100644
index 3b5a6e9d9f2d0..0000000000000
--- a/patches.renesas/0325-ARM-shmobile-Remove-unused-sh7372-auxdata-table.patch
+++ /dev/null
@@ -1,45 +0,0 @@
-From 176ee5ef359f332b98ef1de3bc72e28016a3cc79 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Mon, 1 Jul 2013 14:41:55 +0900
-Subject: ARM: shmobile: Remove unused sh7372 auxdata table
-
-Pass NULL to of_platform_populate instead of passing
-an empty list. This cleans up the code and reduces the
-number of lines.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 975e5af958916f8b76a8926cd4d50c04936d7079)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-sh7372.c | 7 +------
- 1 file changed, 1 insertion(+), 6 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c
-index 5502d624..13e6fdbd 100644
---- a/arch/arm/mach-shmobile/setup-sh7372.c
-+++ b/arch/arm/mach-shmobile/setup-sh7372.c
-@@ -1147,10 +1147,6 @@ void __init sh7372_add_early_devices_dt(void)
- 	shmobile_setup_console();
- }
- 
--static const struct of_dev_auxdata sh7372_auxdata_lookup[] __initconst = {
--	{ }
--};
--
- void __init sh7372_add_standard_devices_dt(void)
- {
- 	/* clocks are setup late during boot in the case of DT */
-@@ -1159,8 +1155,7 @@ void __init sh7372_add_standard_devices_dt(void)
- 	platform_add_devices(sh7372_early_devices,
- 			    ARRAY_SIZE(sh7372_early_devices));
- 
--	of_platform_populate(NULL, of_default_bus_match_table,
--			     sh7372_auxdata_lookup, NULL);
-+	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
- }
- 
- static const char *sh7372_boards_compat_dt[] __initdata = {
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0326-ARM-shmobile-Remove-unused-sh73a0-auxdata-table.patch b/patches.renesas/0326-ARM-shmobile-Remove-unused-sh73a0-auxdata-table.patch
deleted file mode 100644
index 0551a7c54ad79..0000000000000
--- a/patches.renesas/0326-ARM-shmobile-Remove-unused-sh73a0-auxdata-table.patch
+++ /dev/null
@@ -1,45 +0,0 @@
-From 177c8a2f3dde5153a399c10a9eab752376d45185 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Mon, 1 Jul 2013 14:42:04 +0900
-Subject: ARM: shmobile: Remove unused sh73a0 auxdata table
-
-Pass NULL to of_platform_populate instead of passing
-an empty list. This cleans up the code and reduces the
-number of lines.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit ea31597fe72245985e9d2521ea7e87acf2f14252)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-sh73a0.c | 7 +------
- 1 file changed, 1 insertion(+), 6 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c
-index bd9370f2..516c2391 100644
---- a/arch/arm/mach-shmobile/setup-sh73a0.c
-+++ b/arch/arm/mach-shmobile/setup-sh73a0.c
-@@ -944,10 +944,6 @@ void __init sh73a0_add_early_devices(void)
- 
- #ifdef CONFIG_USE_OF
- 
--static const struct of_dev_auxdata sh73a0_auxdata_lookup[] __initconst = {
--	{},
--};
--
- void __init sh73a0_add_standard_devices_dt(void)
- {
- 	struct platform_device_info devinfo = { .name = "cpufreq-cpu0", .id = -1, };
-@@ -957,8 +953,7 @@ void __init sh73a0_add_standard_devices_dt(void)
- 
- 	platform_add_devices(sh73a0_devices_dt,
- 			     ARRAY_SIZE(sh73a0_devices_dt));
--	of_platform_populate(NULL, of_default_bus_match_table,
--			     sh73a0_auxdata_lookup, NULL);
-+	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
- 
- 	/* Instantiate cpufreq-cpu0 */
- 	platform_device_register_full(&devinfo);
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0327-ARM-shmobile-Remove-redundant-r8a7790-callback.patch b/patches.renesas/0327-ARM-shmobile-Remove-redundant-r8a7790-callback.patch
deleted file mode 100644
index c5815d588ef68..0000000000000
--- a/patches.renesas/0327-ARM-shmobile-Remove-redundant-r8a7790-callback.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-From 0347449bd0c863b480048ef365a9d3abbccc64d5 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Mon, 1 Jul 2013 14:42:13 +0900
-Subject: ARM: shmobile: Remove redundant r8a7790 callback
-
-Replace the SoC-specific callback init_machine() with
-a NULL to use the default code. This cleans up the code
-and reduces the number of lines.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit fdbc45dbbe5a69a2c665630ab577726e01eadf23)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-r8a7790.c | 5 -----
- 1 file changed, 5 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c
-index d405dbd4..b7e78b9a 100644
---- a/arch/arm/mach-shmobile/setup-r8a7790.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7790.c
-@@ -176,10 +176,6 @@ void __init r8a7790_timer_init(void)
- }
- 
- #ifdef CONFIG_USE_OF
--void __init r8a7790_add_standard_devices_dt(void)
--{
--	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
--}
- 
- static const char *r8a7790_boards_compat_dt[] __initdata = {
- 	"renesas,r8a7790",
-@@ -187,7 +183,6 @@ static const char *r8a7790_boards_compat_dt[] __initdata = {
- };
- 
- DT_MACHINE_START(R8A7790_DT, "Generic R8A7790 (Flattened Device Tree)")
--	.init_machine	= r8a7790_add_standard_devices_dt,
- 	.init_time	= r8a7790_timer_init,
- 	.dt_compat	= r8a7790_boards_compat_dt,
- MACHINE_END
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0328-ARM-shmobile-Remove-unused-EMEV2-KZM9D-early-console.patch b/patches.renesas/0328-ARM-shmobile-Remove-unused-EMEV2-KZM9D-early-console.patch
deleted file mode 100644
index 259d0470b4f35..0000000000000
--- a/patches.renesas/0328-ARM-shmobile-Remove-unused-EMEV2-KZM9D-early-console.patch
+++ /dev/null
@@ -1,102 +0,0 @@
-From a3d7e5372efaeeffdf4de806edf62b8d945232c5 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Tue, 2 Jul 2013 18:27:33 +0900
-Subject: ARM: shmobile: Remove unused EMEV2/KZM9D early console
-
-Remove EMEV2 early console code from KZM9D and instead
-rely on console setup during regular platform device
-probe time. This makes the DT code and the KZM9D board
-support behave the same.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Acked-by: Arnd Bergmann <arnd@arndb.de>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 4146fa8861419ac0d2c3607168339621586f6c03)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-kzm9d.c        |  2 +-
- arch/arm/mach-shmobile/include/mach/emev2.h |  2 +-
- arch/arm/mach-shmobile/setup-emev2.c        | 24 +++---------------------
- 3 files changed, 5 insertions(+), 23 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-kzm9d.c b/arch/arm/mach-shmobile/board-kzm9d.c
-index 4368000e..15900f1f 100644
---- a/arch/arm/mach-shmobile/board-kzm9d.c
-+++ b/arch/arm/mach-shmobile/board-kzm9d.c
-@@ -85,7 +85,7 @@ static const char *kzm9d_boards_compat_dt[] __initdata = {
- DT_MACHINE_START(KZM9D_DT, "kzm9d")
- 	.smp		= smp_ops(emev2_smp_ops),
- 	.map_io		= emev2_map_io,
--	.init_early	= emev2_add_early_devices,
-+	.init_early	= emev2_init_delay,
- 	.nr_irqs	= NR_IRQS_LEGACY,
- 	.init_irq	= emev2_init_irq,
- 	.init_machine	= kzm9d_add_standard_devices,
-diff --git a/arch/arm/mach-shmobile/include/mach/emev2.h b/arch/arm/mach-shmobile/include/mach/emev2.h
-index ac375170..3e0c0441 100644
---- a/arch/arm/mach-shmobile/include/mach/emev2.h
-+++ b/arch/arm/mach-shmobile/include/mach/emev2.h
-@@ -3,7 +3,7 @@
- 
- extern void emev2_map_io(void);
- extern void emev2_init_irq(void);
--extern void emev2_add_early_devices(void);
-+extern void emev2_init_delay(void);
- extern void emev2_add_standard_devices(void);
- extern void emev2_clock_init(void);
- extern void emev2_set_boot_vector(unsigned long value);
-diff --git a/arch/arm/mach-shmobile/setup-emev2.c b/arch/arm/mach-shmobile/setup-emev2.c
-index b0564ce1..f6edd190 100644
---- a/arch/arm/mach-shmobile/setup-emev2.c
-+++ b/arch/arm/mach-shmobile/setup-emev2.c
-@@ -375,14 +375,11 @@ static struct platform_device pmu_device = {
- 	.resource	= pmu_resources,
- };
- 
--static struct platform_device *emev2_early_devices[] __initdata = {
-+static struct platform_device *emev2_devices[] __initdata = {
- 	&uart0_device,
- 	&uart1_device,
- 	&uart2_device,
- 	&uart3_device,
--};
--
--static struct platform_device *emev2_late_devices[] __initdata = {
- 	&sti_device,
- 	&gio0_device,
- 	&gio1_device,
-@@ -396,29 +393,14 @@ void __init emev2_add_standard_devices(void)
- {
- 	emev2_clock_init();
- 
--	platform_add_devices(emev2_early_devices,
--			     ARRAY_SIZE(emev2_early_devices));
--
--	platform_add_devices(emev2_late_devices,
--			     ARRAY_SIZE(emev2_late_devices));
-+	platform_add_devices(emev2_devices, ARRAY_SIZE(emev2_devices));
- }
- 
--static void __init emev2_init_delay(void)
-+void __init emev2_init_delay(void)
- {
- 	shmobile_setup_delay(533, 1, 3); /* Cortex-A9 @ 533MHz */
- }
- 
--void __init emev2_add_early_devices(void)
--{
--	emev2_init_delay();
--
--	early_platform_add_devices(emev2_early_devices,
--				   ARRAY_SIZE(emev2_early_devices));
--
--	/* setup early console here as well */
--	shmobile_setup_console();
--}
--
- void __init emev2_init_irq(void)
- {
- 	void __iomem *gic_dist_base;
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0329-ARM-shmobile-Make-EMEV2-platform-devices-more-compac.patch b/patches.renesas/0329-ARM-shmobile-Make-EMEV2-platform-devices-more-compac.patch
deleted file mode 100644
index 9846fb68e5b6b..0000000000000
--- a/patches.renesas/0329-ARM-shmobile-Make-EMEV2-platform-devices-more-compac.patch
+++ /dev/null
@@ -1,416 +0,0 @@
-From c97dd1598688341fc1c62d3e172ea7ea58d67fe6 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Tue, 2 Jul 2013 18:27:49 +0900
-Subject: ARM: shmobile: Make EMEV2 platform devices more compact
-
-Convert the EMEV2 SoC device setup code from using very
-verbose resources and static platform devices to the
-same style as more recent boards. This reduces the size
-of the code.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Acked-by: Arnd Bergmann <arnd@arndb.de>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 210e179da2e39c965872b941a36e55ab78328e49)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-emev2.c | 321 +++++++----------------------------
- 1 file changed, 61 insertions(+), 260 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-emev2.c b/arch/arm/mach-shmobile/setup-emev2.c
-index f6edd190..e4b46930 100644
---- a/arch/arm/mach-shmobile/setup-emev2.c
-+++ b/arch/arm/mach-shmobile/setup-emev2.c
-@@ -62,102 +62,40 @@ void __init emev2_map_io(void)
- 
- /* UART */
- static struct resource uart0_resources[] = {
--	[0]	= {
--		.start	= 0xe1020000,
--		.end	= 0xe1020037,
--		.flags	= IORESOURCE_MEM,
--	},
--	[1]	= {
--		.start	= 40,
--		.flags	= IORESOURCE_IRQ,
--	}
--};
--
--static struct platform_device uart0_device = {
--	.name		= "serial8250-em",
--	.id		= 0,
--	.num_resources	= ARRAY_SIZE(uart0_resources),
--	.resource	= uart0_resources,
-+	DEFINE_RES_MEM(0xe1020000, 0x38),
-+	DEFINE_RES_IRQ(40),
- };
- 
- static struct resource uart1_resources[] = {
--	[0]	= {
--		.start	= 0xe1030000,
--		.end	= 0xe1030037,
--		.flags	= IORESOURCE_MEM,
--	},
--	[1]	= {
--		.start	= 41,
--		.flags	= IORESOURCE_IRQ,
--	}
--};
--
--static struct platform_device uart1_device = {
--	.name		= "serial8250-em",
--	.id		= 1,
--	.num_resources	= ARRAY_SIZE(uart1_resources),
--	.resource	= uart1_resources,
-+	DEFINE_RES_MEM(0xe1030000, 0x38),
-+	DEFINE_RES_IRQ(41),
- };
- 
- static struct resource uart2_resources[] = {
--	[0]	= {
--		.start	= 0xe1040000,
--		.end	= 0xe1040037,
--		.flags	= IORESOURCE_MEM,
--	},
--	[1]	= {
--		.start	= 42,
--		.flags	= IORESOURCE_IRQ,
--	}
--};
--
--static struct platform_device uart2_device = {
--	.name		= "serial8250-em",
--	.id		= 2,
--	.num_resources	= ARRAY_SIZE(uart2_resources),
--	.resource	= uart2_resources,
-+	DEFINE_RES_MEM(0xe1040000, 0x38),
-+	DEFINE_RES_IRQ(42),
- };
- 
- static struct resource uart3_resources[] = {
--	[0]	= {
--		.start	= 0xe1050000,
--		.end	= 0xe1050037,
--		.flags	= IORESOURCE_MEM,
--	},
--	[1]	= {
--		.start	= 43,
--		.flags	= IORESOURCE_IRQ,
--	}
-+	DEFINE_RES_MEM(0xe1050000, 0x38),
-+	DEFINE_RES_IRQ(43),
- };
- 
--static struct platform_device uart3_device = {
--	.name		= "serial8250-em",
--	.id		= 3,
--	.num_resources	= ARRAY_SIZE(uart3_resources),
--	.resource	= uart3_resources,
--};
-+#define emev2_register_uart(idx)					\
-+	platform_device_register_simple("serial8250-em", idx,		\
-+					uart##idx##_resources,		\
-+					ARRAY_SIZE(uart##idx##_resources))
- 
- /* STI */
- static struct resource sti_resources[] = {
--	[0] = {
--		.name	= "STI",
--		.start	= 0xe0180000,
--		.end	= 0xe0180053,
--		.flags	= IORESOURCE_MEM,
--	},
--	[1] = {
--		.start	= 157,
--		.flags	= IORESOURCE_IRQ,
--	},
--};
--
--static struct platform_device sti_device = {
--	.name		= "em_sti",
--	.id		= 0,
--	.resource	= sti_resources,
--	.num_resources	= ARRAY_SIZE(sti_resources),
-+	DEFINE_RES_MEM(0xe0180000, 0x54),
-+	DEFINE_RES_IRQ(157),
- };
- 
-+#define emev2_register_sti()					\
-+	platform_device_register_simple("em_sti", 0,		\
-+					sti_resources,		\
-+					ARRAY_SIZE(sti_resources))
- 
- /* GIO */
- static struct gpio_em_config gio0_config = {
-@@ -167,36 +105,10 @@ static struct gpio_em_config gio0_config = {
- };
- 
- static struct resource gio0_resources[] = {
--	[0] = {
--		.name	= "GIO_000",
--		.start	= 0xe0050000,
--		.end	= 0xe005002b,
--		.flags	= IORESOURCE_MEM,
--	},
--	[1] = {
--		.name	= "GIO_000",
--		.start	= 0xe0050040,
--		.end	= 0xe005005f,
--		.flags	= IORESOURCE_MEM,
--	},
--	[2] = {
--		.start	= 99,
--		.flags	= IORESOURCE_IRQ,
--	},
--	[3] = {
--		.start	= 100,
--		.flags	= IORESOURCE_IRQ,
--	},
--};
--
--static struct platform_device gio0_device = {
--	.name		= "em_gio",
--	.id		= 0,
--	.resource	= gio0_resources,
--	.num_resources	= ARRAY_SIZE(gio0_resources),
--	.dev		= {
--		.platform_data	= &gio0_config,
--	},
-+	DEFINE_RES_MEM(0xe0050000, 0x2c),
-+	DEFINE_RES_MEM(0xe0050040, 0x20),
-+	DEFINE_RES_IRQ(99),
-+	DEFINE_RES_IRQ(100),
- };
- 
- static struct gpio_em_config gio1_config = {
-@@ -206,36 +118,10 @@ static struct gpio_em_config gio1_config = {
- };
- 
- static struct resource gio1_resources[] = {
--	[0] = {
--		.name	= "GIO_032",
--		.start	= 0xe0050080,
--		.end	= 0xe00500ab,
--		.flags	= IORESOURCE_MEM,
--	},
--	[1] = {
--		.name	= "GIO_032",
--		.start	= 0xe00500c0,
--		.end	= 0xe00500df,
--		.flags	= IORESOURCE_MEM,
--	},
--	[2] = {
--		.start	= 101,
--		.flags	= IORESOURCE_IRQ,
--	},
--	[3] = {
--		.start	= 102,
--		.flags	= IORESOURCE_IRQ,
--	},
--};
--
--static struct platform_device gio1_device = {
--	.name		= "em_gio",
--	.id		= 1,
--	.resource	= gio1_resources,
--	.num_resources	= ARRAY_SIZE(gio1_resources),
--	.dev		= {
--		.platform_data	= &gio1_config,
--	},
-+	DEFINE_RES_MEM(0xe0050080, 0x2c),
-+	DEFINE_RES_MEM(0xe00500c0, 0x20),
-+	DEFINE_RES_IRQ(101),
-+	DEFINE_RES_IRQ(102),
- };
- 
- static struct gpio_em_config gio2_config = {
-@@ -245,36 +131,10 @@ static struct gpio_em_config gio2_config = {
- };
- 
- static struct resource gio2_resources[] = {
--	[0] = {
--		.name	= "GIO_064",
--		.start	= 0xe0050100,
--		.end	= 0xe005012b,
--		.flags	= IORESOURCE_MEM,
--	},
--	[1] = {
--		.name	= "GIO_064",
--		.start	= 0xe0050140,
--		.end	= 0xe005015f,
--		.flags	= IORESOURCE_MEM,
--	},
--	[2] = {
--		.start	= 103,
--		.flags	= IORESOURCE_IRQ,
--	},
--	[3] = {
--		.start	= 104,
--		.flags	= IORESOURCE_IRQ,
--	},
--};
--
--static struct platform_device gio2_device = {
--	.name		= "em_gio",
--	.id		= 2,
--	.resource	= gio2_resources,
--	.num_resources	= ARRAY_SIZE(gio2_resources),
--	.dev		= {
--		.platform_data	= &gio2_config,
--	},
-+	DEFINE_RES_MEM(0xe0050100, 0x2c),
-+	DEFINE_RES_MEM(0xe0050140, 0x20),
-+	DEFINE_RES_IRQ(103),
-+	DEFINE_RES_IRQ(104),
- };
- 
- static struct gpio_em_config gio3_config = {
-@@ -284,36 +144,10 @@ static struct gpio_em_config gio3_config = {
- };
- 
- static struct resource gio3_resources[] = {
--	[0] = {
--		.name	= "GIO_096",
--		.start	= 0xe0050180,
--		.end	= 0xe00501ab,
--		.flags	= IORESOURCE_MEM,
--	},
--	[1] = {
--		.name	= "GIO_096",
--		.start	= 0xe00501c0,
--		.end	= 0xe00501df,
--		.flags	= IORESOURCE_MEM,
--	},
--	[2] = {
--		.start	= 105,
--		.flags	= IORESOURCE_IRQ,
--	},
--	[3] = {
--		.start	= 106,
--		.flags	= IORESOURCE_IRQ,
--	},
--};
--
--static struct platform_device gio3_device = {
--	.name		= "em_gio",
--	.id		= 3,
--	.resource	= gio3_resources,
--	.num_resources	= ARRAY_SIZE(gio3_resources),
--	.dev		= {
--		.platform_data	= &gio3_config,
--	},
-+	DEFINE_RES_MEM(0xe0050180, 0x2c),
-+	DEFINE_RES_MEM(0xe00501c0, 0x20),
-+	DEFINE_RES_IRQ(105),
-+	DEFINE_RES_IRQ(106),
- };
- 
- static struct gpio_em_config gio4_config = {
-@@ -323,77 +157,44 @@ static struct gpio_em_config gio4_config = {
- };
- 
- static struct resource gio4_resources[] = {
--	[0] = {
--		.name	= "GIO_128",
--		.start	= 0xe0050200,
--		.end	= 0xe005022b,
--		.flags	= IORESOURCE_MEM,
--	},
--	[1] = {
--		.name	= "GIO_128",
--		.start	= 0xe0050240,
--		.end	= 0xe005025f,
--		.flags	= IORESOURCE_MEM,
--	},
--	[2] = {
--		.start	= 107,
--		.flags	= IORESOURCE_IRQ,
--	},
--	[3] = {
--		.start	= 108,
--		.flags	= IORESOURCE_IRQ,
--	},
-+	DEFINE_RES_MEM(0xe0050200, 0x2c),
-+	DEFINE_RES_MEM(0xe0050240, 0x20),
-+	DEFINE_RES_IRQ(107),
-+	DEFINE_RES_IRQ(108),
- };
- 
--static struct platform_device gio4_device = {
--	.name		= "em_gio",
--	.id		= 4,
--	.resource	= gio4_resources,
--	.num_resources	= ARRAY_SIZE(gio4_resources),
--	.dev		= {
--		.platform_data	= &gio4_config,
--	},
--};
-+#define emev2_register_gio(idx)						\
-+	platform_device_register_resndata(&platform_bus, "em_gio",	\
-+					  idx, gio##idx##_resources,	\
-+					  ARRAY_SIZE(gio##idx##_resources), \
-+					  &gio##idx##_config,		\
-+					  sizeof(struct gpio_em_config))
- 
- static struct resource pmu_resources[] = {
--	[0] = {
--		.start	= 152,
--		.end	= 152,
--		.flags	= IORESOURCE_IRQ,
--	},
--	[1] = {
--		.start	= 153,
--		.end	= 153,
--		.flags	= IORESOURCE_IRQ,
--	},
-+	DEFINE_RES_IRQ(152),
-+	DEFINE_RES_IRQ(153),
- };
- 
--static struct platform_device pmu_device = {
--	.name		= "arm-pmu",
--	.id		= -1,
--	.num_resources	= ARRAY_SIZE(pmu_resources),
--	.resource	= pmu_resources,
--};
--
--static struct platform_device *emev2_devices[] __initdata = {
--	&uart0_device,
--	&uart1_device,
--	&uart2_device,
--	&uart3_device,
--	&sti_device,
--	&gio0_device,
--	&gio1_device,
--	&gio2_device,
--	&gio3_device,
--	&gio4_device,
--	&pmu_device,
--};
-+#define emev2_register_pmu()					\
-+	platform_device_register_simple("arm-pmu", -1,		\
-+					pmu_resources,		\
-+					ARRAY_SIZE(pmu_resources))
- 
- void __init emev2_add_standard_devices(void)
- {
- 	emev2_clock_init();
- 
--	platform_add_devices(emev2_devices, ARRAY_SIZE(emev2_devices));
-+	emev2_register_uart(0);
-+	emev2_register_uart(1);
-+	emev2_register_uart(2);
-+	emev2_register_uart(3);
-+	emev2_register_sti();
-+	emev2_register_gio(0);
-+	emev2_register_gio(1);
-+	emev2_register_gio(2);
-+	emev2_register_gio(3);
-+	emev2_register_gio(4);
-+	emev2_register_pmu();
- }
- 
- void __init emev2_init_delay(void)
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0330-ARM-shmobile-Fix-EMEV2-clock-comment-typo.patch b/patches.renesas/0330-ARM-shmobile-Fix-EMEV2-clock-comment-typo.patch
deleted file mode 100644
index e1a5ca82a452a..0000000000000
--- a/patches.renesas/0330-ARM-shmobile-Fix-EMEV2-clock-comment-typo.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From 4bb8bf0a1b3ae2064604bef04e50a5beb096b705 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Mon, 8 Jul 2013 15:20:05 +0900
-Subject: ARM: shmobile: Fix EMEV2 clock comment typo
-
-Update the STI timer frequency comment to 32.768 kHz to
-fix 37 kHz typo.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 09cb2e366737ac70f1d7c6c0a3747a75c8f90f1e)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-emev2.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/clock-emev2.c b/arch/arm/mach-shmobile/clock-emev2.c
-index 4710f184..56dd0cfc 100644
---- a/arch/arm/mach-shmobile/clock-emev2.c
-+++ b/arch/arm/mach-shmobile/clock-emev2.c
-@@ -221,7 +221,7 @@ void __init emev2_clock_init(void)
- 	smu_base = ioremap(EMEV2_SMU_BASE, PAGE_SIZE);
- 	BUG_ON(!smu_base);
- 
--	/* setup STI timer to run on 37.768 kHz and deassert reset */
-+	/* setup STI timer to run on 32.768 kHz and deassert reset */
- 	emev2_smu_write(0, STI_CLKSEL);
- 	emev2_smu_write(1, STI_RSTCTRL);
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0331-ARM-shmobile-r8a7778-remove-r8a7778_init_irq.patch b/patches.renesas/0331-ARM-shmobile-r8a7778-remove-r8a7778_init_irq.patch
deleted file mode 100644
index 59cdd4f2bce17..0000000000000
--- a/patches.renesas/0331-ARM-shmobile-r8a7778-remove-r8a7778_init_irq.patch
+++ /dev/null
@@ -1,99 +0,0 @@
-From a4b90b94740c37bab74fd467ab2344e656cc9b92 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Tue, 9 Jul 2013 01:48:34 -0700
-Subject: ARM: shmobile: r8a7778: remove r8a7778_init_irq()
-
-This patch removes r8a7778_init_irq(), since no-one is using it.
-And now, there is no reason to have r8a7778_init_irq_common().
-r8a7778_init_irq_dt() includes it.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Acked-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 54aa4c48bc0d364565e7d1c722b07314efdc2a10)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/include/mach/r8a7778.h |  1 -
- arch/arm/mach-shmobile/setup-r8a7778.c        | 37 +++++++--------------------
- 2 files changed, 9 insertions(+), 29 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/include/mach/r8a7778.h b/arch/arm/mach-shmobile/include/mach/r8a7778.h
-index 851d027a..9b561bf4 100644
---- a/arch/arm/mach-shmobile/include/mach/r8a7778.h
-+++ b/arch/arm/mach-shmobile/include/mach/r8a7778.h
-@@ -33,7 +33,6 @@ extern void r8a7778_add_mmc_device(struct sh_mmcif_plat_data *info);
- 
- extern void r8a7778_init_late(void);
- extern void r8a7778_init_delay(void);
--extern void r8a7778_init_irq(void);
- extern void r8a7778_init_irq_dt(void);
- extern void r8a7778_clock_init(void);
- extern void r8a7778_init_irq_extpin(int irlm);
-diff --git a/arch/arm/mach-shmobile/setup-r8a7778.c b/arch/arm/mach-shmobile/setup-r8a7778.c
-index 2a101ebd..a3a2e37b 100644
---- a/arch/arm/mach-shmobile/setup-r8a7778.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7778.c
-@@ -408,17 +408,25 @@ void __init r8a7778_init_irq_extpin(int irlm)
- 			&irqpin_platform_data, sizeof(irqpin_platform_data));
- }
- 
-+void __init r8a7778_init_delay(void)
-+{
-+	shmobile_setup_delay(800, 1, 3); /* Cortex-A9 @ 800MHz */
-+}
-+
-+#ifdef CONFIG_USE_OF
- #define INT2SMSKCR0	0x82288 /* 0xfe782288 */
- #define INT2SMSKCR1	0x8228c /* 0xfe78228c */
- 
- #define INT2NTSR0	0x00018 /* 0xfe700018 */
- #define INT2NTSR1	0x0002c /* 0xfe70002c */
--static void __init r8a7778_init_irq_common(void)
-+void __init r8a7778_init_irq_dt(void)
- {
- 	void __iomem *base = ioremap_nocache(0xfe700000, 0x00100000);
- 
- 	BUG_ON(!base);
- 
-+	irqchip_init();
-+
- 	/* route all interrupts to ARM */
- 	__raw_writel(0x73ffffff, base + INT2NTSR0);
- 	__raw_writel(0xffffffff, base + INT2NTSR1);
-@@ -430,33 +438,6 @@ static void __init r8a7778_init_irq_common(void)
- 	iounmap(base);
- }
- 
--void __init r8a7778_init_irq(void)
--{
--	void __iomem *gic_dist_base;
--	void __iomem *gic_cpu_base;
--
--	gic_dist_base = ioremap_nocache(0xfe438000, PAGE_SIZE);
--	gic_cpu_base  = ioremap_nocache(0xfe430000, PAGE_SIZE);
--	BUG_ON(!gic_dist_base || !gic_cpu_base);
--
--	/* use GIC to handle interrupts */
--	gic_init(0, 29, gic_dist_base, gic_cpu_base);
--
--	r8a7778_init_irq_common();
--}
--
--void __init r8a7778_init_delay(void)
--{
--	shmobile_setup_delay(800, 1, 3); /* Cortex-A9 @ 800MHz */
--}
--
--#ifdef CONFIG_USE_OF
--void __init r8a7778_init_irq_dt(void)
--{
--	irqchip_init();
--	r8a7778_init_irq_common();
--}
--
- static const char *r8a7778_compat_dt[] __initdata = {
- 	"renesas,r8a7778",
- 	NULL,
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0332-ARM-shmobile-Remove-unused-mach-dma.h.patch b/patches.renesas/0332-ARM-shmobile-Remove-unused-mach-dma.h.patch
deleted file mode 100644
index 807191a45a454..0000000000000
--- a/patches.renesas/0332-ARM-shmobile-Remove-unused-mach-dma.h.patch
+++ /dev/null
@@ -1,27 +0,0 @@
-From 34b1ce5b204fa48dac0f9c2fb36ace5f3f3dc8e5 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Tue, 9 Jul 2013 19:40:16 +0900
-Subject: ARM: shmobile: Remove unused mach/dma.h
-
-Remove mach-shmobile mach/dma.h since it only
-seems to be used on non-mach-shmobile platforms.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit ebd9616f439a8a46b9dca9a272b342f34c5f3614)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/include/mach/dma.h | 1 -
- 1 file changed, 1 deletion(-)
- delete mode 100644 arch/arm/mach-shmobile/include/mach/dma.h
-
-diff --git a/arch/arm/mach-shmobile/include/mach/dma.h b/arch/arm/mach-shmobile/include/mach/dma.h
-deleted file mode 100644
-index 40a8c178..00000000
---- a/arch/arm/mach-shmobile/include/mach/dma.h
-+++ /dev/null
-@@ -1 +0,0 @@
--/* empty */
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0333-ARM-shmobile-Update-romImage-to-relocate-appended-DT.patch b/patches.renesas/0333-ARM-shmobile-Update-romImage-to-relocate-appended-DT.patch
deleted file mode 100644
index 1236fae51dd2f..0000000000000
--- a/patches.renesas/0333-ARM-shmobile-Update-romImage-to-relocate-appended-DT.patch
+++ /dev/null
@@ -1,105 +0,0 @@
-From a525334825811a408225b449440a19fc42af42b7 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Thu, 27 Jun 2013 08:48:07 +0900
-Subject: ARM: shmobile: Update romImage to relocate appended DTB
-
-Instead of relying of MACH_TYPE for board identification,
-update the romImage code to relocate an appended DTB to
-the beginning of RAM. This implementation is independent
-of ARM_APPENDED_DTB, this because it is necessary to copy
-the DTB to memory so the kernel can access it.
-
-Without this patch Mackerel does not boot via the Mask ROM
-over USB (r_usb_boot) - this since non-DT boot was broken
-ages ago in commit:
-
-0ce53cd ARM: mach-shmobile: Use DT_MACHINE for mackerel
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 2c408d149299e99c89fc4be80fb4fe00a7016f02)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/compressed/head-shmobile.S    | 43 ++++++++++++++++++++++++++---
- arch/arm/mach-shmobile/include/mach/zboot.h |  2 --
- 2 files changed, 39 insertions(+), 6 deletions(-)
-
-diff --git a/arch/arm/boot/compressed/head-shmobile.S b/arch/arm/boot/compressed/head-shmobile.S
-index e2d63633..e7f80928 100644
---- a/arch/arm/boot/compressed/head-shmobile.S
-+++ b/arch/arm/boot/compressed/head-shmobile.S
-@@ -55,12 +55,47 @@ __tmp_stack:
- __continue:
- #endif /* CONFIG_ZBOOT_ROM_MMC || CONFIG_ZBOOT_ROM_SH_MOBILE_SDHI */
- 
--	/* Set board ID necessary for boot */
--	ldr	r7, 1f				@ Set machine type register
--	mov	r8, #0				@ pass null pointer as atag
-+	adr	r0, dtb_info
-+	ldmia	r0, {r1, r3, r4, r5, r7}
-+
-+	sub	r0, r0, r1		@ calculate the delta offset
-+	add	r5, r5, r0		@ _edata
-+
-+	ldr	lr, [r5, #0]		@ check if valid DTB is present
-+	cmp	lr, r3
-+	bne	0f
-+
-+	add	r9, r7, #31		@ rounded up to a multiple
-+	bic	r9, r9, #31		@ ... of 32 bytes
-+
-+	add	r6, r9, r5		@ copy from _edata
-+	add	r9, r9, r4		@ to MEMORY_START
-+
-+1:	ldmdb	r6!, {r0 - r3, r10 - r12, lr}
-+	cmp	r6, r5
-+	stmdb	r9!, {r0 - r3, r10 - r12, lr}
-+	bhi	1b
-+
-+	/* Success: Zero board ID, pointer to start of memory for atag/dtb */
-+	mov	r7, #0
-+	mov	r8, r4
- 	b	2f
- 
--1 :	.long MACH_TYPE
-+	.align	2
-+dtb_info:
-+	.word	dtb_info
-+#ifndef __ARMEB__
-+	.word	0xedfe0dd0		@ sig is 0xd00dfeed big endian
-+#else
-+	.word	0xd00dfeed
-+#endif
-+	.word	MEMORY_START
-+	.word	_edata
-+	.word	0x4000			@ maximum DTB size
-+0:
-+	/* Failure: Zero board ID, NULL atag/dtb */
-+	mov 	r7, #0
-+	mov	r8, #0			@ pass null pointer as atag
- 2 :
- 
- #endif /* CONFIG_ZBOOT_ROM */
-diff --git a/arch/arm/mach-shmobile/include/mach/zboot.h b/arch/arm/mach-shmobile/include/mach/zboot.h
-index f2d8744c..c3c4669a 100644
---- a/arch/arm/mach-shmobile/include/mach/zboot.h
-+++ b/arch/arm/mach-shmobile/include/mach/zboot.h
-@@ -1,7 +1,6 @@
- #ifndef ZBOOT_H
- #define ZBOOT_H
- 
--#include <asm/mach-types.h>
- #include <mach/zboot_macros.h>
- 
- /**************************************************
-@@ -11,7 +10,6 @@
-  **************************************************/
- 
- #ifdef CONFIG_MACH_MACKEREL
--#define MACH_TYPE	MACH_TYPE_MACKEREL
- #define MEMORY_START	0x40000000
- #include "mach/head-mackerel.txt"
- #else
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0334-ARM-mach-shmobile-mackerel-Use-gpio-backlight.patch b/patches.renesas/0334-ARM-mach-shmobile-mackerel-Use-gpio-backlight.patch
deleted file mode 100644
index ce0be98d5b82b..0000000000000
--- a/patches.renesas/0334-ARM-mach-shmobile-mackerel-Use-gpio-backlight.patch
+++ /dev/null
@@ -1,112 +0,0 @@
-From 2b661778a8ceeb1b6f6beccfb52fc711c25e2ae7 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 4 Jul 2013 21:13:27 +0200
-Subject: ARM: mach-shmobile: mackerel: Use gpio-backlight
-
-Replace the backlight callback with a gpio-backlight platform device.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 14bd03e08831a52035e601ae85b05a4849214ec4)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-mackerel.c | 34 ++++++++++++++++-----------------
- 1 file changed, 17 insertions(+), 17 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c
-index 85f51a84..af06753e 100644
---- a/arch/arm/mach-shmobile/board-mackerel.c
-+++ b/arch/arm/mach-shmobile/board-mackerel.c
-@@ -41,6 +41,7 @@
- #include <linux/mtd/physmap.h>
- #include <linux/mtd/sh_flctl.h>
- #include <linux/pinctrl/machine.h>
-+#include <linux/platform_data/gpio_backlight.h>
- #include <linux/pm_clock.h>
- #include <linux/regulator/fixed.h>
- #include <linux/regulator/machine.h>
-@@ -49,7 +50,6 @@
- #include <linux/tca6416_keypad.h>
- #include <linux/usb/renesas_usbhs.h>
- #include <linux/dma-mapping.h>
--
- #include <video/sh_mobile_hdmi.h>
- #include <video/sh_mobile_lcdc.h>
- #include <media/sh_mobile_ceu.h>
-@@ -346,7 +346,7 @@ static struct platform_device meram_device = {
- 	},
- };
- 
--/* LCDC */
-+/* LCDC and backlight */
- static struct fb_videomode mackerel_lcdc_modes[] = {
- 	{
- 		.name		= "WVGA Panel",
-@@ -362,13 +362,6 @@ static struct fb_videomode mackerel_lcdc_modes[] = {
- 	},
- };
- 
--static int mackerel_set_brightness(int brightness)
--{
--	gpio_set_value(31, brightness);
--
--	return 0;
--}
--
- static const struct sh_mobile_meram_cfg lcd_meram_cfg = {
- 	.icb[0] = {
- 		.meram_size     = 0x40,
-@@ -393,11 +386,6 @@ static struct sh_mobile_lcdc_info lcdc_info = {
- 			.width		= 152,
- 			.height		= 91,
- 		},
--		.bl_info = {
--			.name = "sh_mobile_lcdc_bl",
--			.max_brightness = 1,
--			.set_brightness = mackerel_set_brightness,
--		},
- 		.meram_cfg = &lcd_meram_cfg,
- 	}
- };
-@@ -425,6 +413,20 @@ static struct platform_device lcdc_device = {
- 	},
- };
- 
-+static struct gpio_backlight_platform_data gpio_backlight_data = {
-+	.fbdev = &lcdc_device.dev,
-+	.gpio = 31,
-+	.def_value = 1,
-+	.name = "backlight",
-+};
-+
-+static struct platform_device gpio_backlight_device = {
-+	.name = "gpio-backlight",
-+	.dev = {
-+		.platform_data = &gpio_backlight_data,
-+	},
-+};
-+
- /* HDMI */
- static struct sh_mobile_hdmi_info hdmi_info = {
- 	.flags		= HDMI_SND_SRC_SPDIF,
-@@ -1231,6 +1233,7 @@ static struct platform_device *mackerel_devices[] __initdata = {
- 	&nor_flash_device,
- 	&smc911x_device,
- 	&lcdc_device,
-+	&gpio_backlight_device,
- 	&usbhs0_device,
- 	&usbhs1_device,
- 	&leds_device,
-@@ -1441,9 +1444,6 @@ static void __init mackerel_init(void)
- 				  ARRAY_SIZE(mackerel_pinctrl_map));
- 	sh7372_pinmux_init();
- 
--	/* backlight, off by default */
--	gpio_request_one(31, GPIOF_OUT_INIT_LOW, NULL);
--
- 	gpio_request_one(151, GPIOF_OUT_INIT_HIGH, NULL); /* LCDDON */
- 
- 	/* USBHS0 */
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0335-ARM-mach-shmobile-ag5evm-Use-bd6107-backlight-driver.patch b/patches.renesas/0335-ARM-mach-shmobile-ag5evm-Use-bd6107-backlight-driver.patch
deleted file mode 100644
index a85540b9b9faa..0000000000000
--- a/patches.renesas/0335-ARM-mach-shmobile-ag5evm-Use-bd6107-backlight-driver.patch
+++ /dev/null
@@ -1,128 +0,0 @@
-From 7933f07ae617c0a58033375d471b513da4341ca7 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 4 Jul 2013 21:13:30 +0200
-Subject: ARM: mach-shmobile: ag5evm: Use bd6107 backlight driver
-
-Replace the backlight callback with a bd6107 backlight platform device.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 0fb19cdabfc3f8884bac53fd81b02bf61c7904af)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-ag5evm.c | 65 +++++++++--------------------------
- 1 file changed, 16 insertions(+), 49 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-ag5evm.c b/arch/arm/mach-shmobile/board-ag5evm.c
-index c7540710..f6d64495 100644
---- a/arch/arm/mach-shmobile/board-ag5evm.c
-+++ b/arch/arm/mach-shmobile/board-ag5evm.c
-@@ -41,6 +41,7 @@
- #include <linux/mmc/sh_mmcif.h>
- #include <linux/mmc/sh_mobile_sdhi.h>
- #include <linux/mfd/tmio.h>
-+#include <linux/platform_data/bd6107.h>
- #include <linux/sh_clk.h>
- #include <linux/irqchip/arm-gic.h>
- #include <video/sh_mobile_lcdc.h>
-@@ -291,47 +292,7 @@ static struct platform_device mipidsi0_device = {
- 	},
- };
- 
--static unsigned char lcd_backlight_seq[3][2] = {
--	{ 0x04, 0x07 },
--	{ 0x23, 0x80 },
--	{ 0x03, 0x01 },
--};
--
--static int lcd_backlight_set_brightness(int brightness)
--{
--	struct i2c_adapter *adap;
--	struct i2c_msg msg;
--	unsigned int i;
--	int ret;
--
--	if (brightness == 0) {
--		/* Reset the chip */
--		gpio_set_value(235, 0);
--		mdelay(24);
--		gpio_set_value(235, 1);
--		return 0;
--	}
--
--	adap = i2c_get_adapter(1);
--	if (adap == NULL)
--		return -ENODEV;
--
--	for (i = 0; i < ARRAY_SIZE(lcd_backlight_seq); i++) {
--		msg.addr = 0x6d;
--		msg.buf = &lcd_backlight_seq[i][0];
--		msg.len = 2;
--		msg.flags = 0;
--
--		ret = i2c_transfer(adap, &msg, 1);
--		if (ret < 0)
--			break;
--	}
--
--	i2c_put_adapter(adap);
--	return ret < 0 ? ret : 0;
--}
--
--/* LCDC0 */
-+/* LCDC0 and backlight */
- static const struct fb_videomode lcdc0_modes[] = {
- 	{
- 		.name		= "R63302(QHD)",
-@@ -361,11 +322,6 @@ static struct sh_mobile_lcdc_info lcdc0_info = {
- 			.width = 44,
- 			.height = 79,
- 		},
--		.bl_info = {
--			.name = "sh_mobile_lcdc_bl",
--			.max_brightness = 1,
--			.set_brightness = lcd_backlight_set_brightness,
--		},
- 		.tx_dev = &mipidsi0_device,
- 	}
- };
-@@ -394,6 +350,17 @@ static struct platform_device lcdc0_device = {
- 	},
- };
- 
-+static struct bd6107_platform_data backlight_data = {
-+	.fbdev = &lcdc0_device.dev,
-+	.reset = 235,
-+	.def_value = 0,
-+};
-+
-+static struct i2c_board_info backlight_board_info = {
-+	I2C_BOARD_INFO("bd6107", 0x6d),
-+	.platform_data = &backlight_data,
-+};
-+
- /* Fixed 2.8V regulators to be used by SDHI0 */
- static struct regulator_consumer_supply fixed2v8_power_consumers[] =
- {
-@@ -648,15 +615,15 @@ static void __init ag5evm_init(void)
- 	gpio_set_value(217, 1);
- 	mdelay(100);
- 
--	/* LCD backlight controller */
--	gpio_request_one(235, GPIOF_OUT_INIT_LOW, NULL); /* RESET */
--	lcd_backlight_set_brightness(0);
- 
- #ifdef CONFIG_CACHE_L2X0
- 	/* Shared attribute override enable, 64K*8way */
- 	l2x0_init(IOMEM(0xf0100000), 0x00460000, 0xc2000fff);
- #endif
- 	sh73a0_add_standard_devices();
-+
-+	i2c_register_board_info(1, &backlight_board_info, 1);
-+
- 	platform_add_devices(ag5evm_devices, ARRAY_SIZE(ag5evm_devices));
- }
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0336-ARM-shmobile-r8a73a4-add-I2C-controller-DT-nodes.patch b/patches.renesas/0336-ARM-shmobile-r8a73a4-add-I2C-controller-DT-nodes.patch
deleted file mode 100644
index 3d8473d038586..0000000000000
--- a/patches.renesas/0336-ARM-shmobile-r8a73a4-add-I2C-controller-DT-nodes.patch
+++ /dev/null
@@ -1,110 +0,0 @@
-From 1f17000eead4e767cdad8058c93b49e36886ef6a Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Thu, 27 Jun 2013 11:47:57 +0200
-Subject: ARM: shmobile: r8a73a4: add I2C controller DT nodes
-
-Add Device Tree nodes for the 9 I2C controllers on r8a73a4, compatible with
-the i2c-sh_mobile.c driver.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit f98c1069bf1748ffa18cbebbc3a9f88dfc19a631)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a73a4.dtsi | 81 ++++++++++++++++++++++++++++++++++++++++++
- 1 file changed, 81 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a73a4.dtsi b/arch/arm/boot/dts/r8a73a4.dtsi
-index 4ff2019c..4e1ddf0d 100644
---- a/arch/arm/boot/dts/r8a73a4.dtsi
-+++ b/arch/arm/boot/dts/r8a73a4.dtsi
-@@ -85,4 +85,85 @@
- 		interrupt-parent = <&gic>;
- 		interrupts = <0 69 4>;
- 	};
-+
-+	i2c0: i2c@e6500000 {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		compatible = "renesas,rmobile-iic";
-+		reg = <0 0xe6500000 0 0x428>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 174 0x4>;
-+	};
-+
-+	i2c1: i2c@e6510000 {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		compatible = "renesas,rmobile-iic";
-+		reg = <0 0xe6510000 0 0x428>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 175 0x4>;
-+	};
-+
-+	i2c2: i2c@e6520000 {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		compatible = "renesas,rmobile-iic";
-+		reg = <0 0xe6520000 0 0x428>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 176 0x4>;
-+	};
-+
-+	i2c3: i2c@e6530000 {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		compatible = "renesas,rmobile-iic";
-+		reg = <0 0xe6530000 0 0x428>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 177 0x4>;
-+	};
-+
-+	i2c4: i2c@e6540000 {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		compatible = "renesas,rmobile-iic";
-+		reg = <0 0xe6540000 0 0x428>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 178 0x4>;
-+	};
-+
-+	i2c5: i2c@e60b0000 {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		compatible = "renesas,rmobile-iic";
-+		reg = <0 0xe60b0000 0 0x428>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 179 0x4>;
-+	};
-+
-+	i2c6: i2c@e6550000 {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		compatible = "renesas,rmobile-iic";
-+		reg = <0 0xe6550000 0 0x428>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 184 0x4>;
-+	};
-+
-+	i2c7: i2c@e6560000 {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		compatible = "renesas,rmobile-iic";
-+		reg = <0 0xe6560000 0 0x428>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 185 0x4>;
-+	};
-+
-+	i2c8: i2c@e6570000 {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		compatible = "renesas,rmobile-iic";
-+		reg = <0 0xe6570000 0 0x428>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 173 0x4>;
-+	};
- };
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0337-ARM-shmobile-ape6evm-add-CPUFreq-support.patch b/patches.renesas/0337-ARM-shmobile-ape6evm-add-CPUFreq-support.patch
deleted file mode 100644
index a832a2720a641..0000000000000
--- a/patches.renesas/0337-ARM-shmobile-ape6evm-add-CPUFreq-support.patch
+++ /dev/null
@@ -1,50 +0,0 @@
-From c0a11a29c12ed10a9922b3a7972ad7ddc6ce9898 Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Thu, 27 Jun 2013 11:47:58 +0200
-Subject: ARM: shmobile: ape6evm: add CPUFreq support
-
-This patch adds OPPs to the CA15 DT node and a max8973 DT node to support
-clock and voltage scaling, using the cpufreq-cpu0 CPUFreq driver.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 463a2432a435ea3eda4714626f231b7b22f0ac3d)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a73a4-ape6evm.dts | 22 ++++++++++++++++++++++
- 1 file changed, 22 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a73a4-ape6evm.dts b/arch/arm/boot/dts/r8a73a4-ape6evm.dts
-index f603c694..e657a9db 100644
---- a/arch/arm/boot/dts/r8a73a4-ape6evm.dts
-+++ b/arch/arm/boot/dts/r8a73a4-ape6evm.dts
-@@ -50,3 +50,25 @@
- 		};
- 	};
- };
-+
-+&i2c5 {
-+	vdd_dvfs: max8973@1b {
-+		compatible = "maxim,max8973";
-+		reg = <0x1b>;
-+
-+		regulator-min-microvolt = <935000>;
-+		regulator-max-microvolt = <1200000>;
-+		regulator-boot-on;
-+		regulator-always-on;
-+	};
-+};
-+
-+&cpu0 {
-+	cpu0-supply = <&vdd_dvfs>;
-+	operating-points = <
-+		/* kHz  uV */
-+		1950000 1115000
-+		1462500  995000
-+	>;
-+	voltage-tolerance = <1>; /* 1% */
-+};
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0338-ARM-shmobile-Update-KZM9D-dts-command-line.patch b/patches.renesas/0338-ARM-shmobile-Update-KZM9D-dts-command-line.patch
deleted file mode 100644
index 49e2a5e60cf99..0000000000000
--- a/patches.renesas/0338-ARM-shmobile-Update-KZM9D-dts-command-line.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From b1418a0eea00131ebb8893be810ab0dcb7a90cad Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Tue, 2 Jul 2013 18:27:41 +0900
-Subject: ARM: shmobile: Update KZM9D dts command line
-
-Update the KZM9D DTS command line to remove following cruft:
- - console=tty0 - no graphic support upstream anyway
- - earlyprintk= - not supported by the 8250-em driver anyway
- - mem= - this is provided via DT anyway
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Acked-by: Arnd Bergmann <arnd@arndb.de>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 8f675493f4706a9f92a822121fe38892a08e0161)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/emev2-kzm9d.dts | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/arch/arm/boot/dts/emev2-kzm9d.dts b/arch/arm/boot/dts/emev2-kzm9d.dts
-index b9b3241f..dda13bc0 100644
---- a/arch/arm/boot/dts/emev2-kzm9d.dts
-+++ b/arch/arm/boot/dts/emev2-kzm9d.dts
-@@ -21,6 +21,6 @@
- 	};
- 
- 	chosen {
--		bootargs = "console=tty0 console=ttyS1,115200n81 earlyprintk=serial8250-em.1,115200n81 mem=128M@0x40000000 ignore_loglevel root=/dev/nfs ip=dhcp nfsroot=,rsize=4096,wsize=4096";
-+		bootargs = "console=ttyS1,115200n81 ignore_loglevel root=/dev/nfs ip=dhcp nfsroot=,rsize=4096,wsize=4096";
- 	};
- };
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0339-ARM-shmobile-Add-GIO-to-EMEV2-dtsi.patch b/patches.renesas/0339-ARM-shmobile-Add-GIO-to-EMEV2-dtsi.patch
deleted file mode 100644
index 84ccc040c9856..0000000000000
--- a/patches.renesas/0339-ARM-shmobile-Add-GIO-to-EMEV2-dtsi.patch
+++ /dev/null
@@ -1,94 +0,0 @@
-From 9583d010e5d626e50778fc8056855ddc86c18bd0 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Tue, 2 Jul 2013 18:27:57 +0900
-Subject: ARM: shmobile: Add GIO to EMEV2 dtsi
-
-Add GIO0->GIO4 device nodes to the EMEV2 dtsi file.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Acked-by: Arnd Bergmann <arnd@arndb.de>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 12d035b13b224ee69886b64fd33d1c1224e79187)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/emev2.dtsi | 59 ++++++++++++++++++++++++++++++++++++++++++++
- 1 file changed, 59 insertions(+)
-
-diff --git a/arch/arm/boot/dts/emev2.dtsi b/arch/arm/boot/dts/emev2.dtsi
-index c8a8c08b..99ad2b2e 100644
---- a/arch/arm/boot/dts/emev2.dtsi
-+++ b/arch/arm/boot/dts/emev2.dtsi
-@@ -14,6 +14,14 @@
- 	compatible = "renesas,emev2";
- 	interrupt-parent = <&gic>;
- 
-+	aliases {
-+		gpio0 = &gpio0;
-+		gpio1 = &gpio1;
-+		gpio2 = &gpio2;
-+		gpio3 = &gpio3;
-+		gpio4 = &gpio4;
-+	};
-+
- 	cpus {
- 		#address-cells = <1>;
- 		#size-cells = <0>;
-@@ -67,4 +75,55 @@
- 		reg = <0xe1050000 0x38>;
- 		interrupts = <0 11 0>;
- 	};
-+
-+	gpio0: gpio@e0050000 {
-+		compatible = "renesas,em-gio";
-+		reg = <0xe0050000 0x2c>, <0xe0050040 0x20>;
-+		interrupts = <0 67 0>, <0 68 0>;
-+		gpio-controller;
-+		#gpio-cells = <2>;
-+		ngpios = <32>;
-+		interrupt-controller;
-+		#interrupt-cells = <2>;
-+	};
-+	gpio1: gpio@e0050080 {
-+		compatible = "renesas,em-gio";
-+		reg = <0xe0050080 0x2c>, <0xe00500c0 0x20>;
-+		interrupts = <0 69 0>, <0 70 0>;
-+		gpio-controller;
-+		#gpio-cells = <2>;
-+		ngpios = <32>;
-+		interrupt-controller;
-+		#interrupt-cells = <2>;
-+	};
-+	gpio2: gpio@e0050100 {
-+		compatible = "renesas,em-gio";
-+		reg = <0xe0050100 0x2c>, <0xe0050140 0x20>;
-+		interrupts = <0 71 0>, <0 72 0>;
-+		gpio-controller;
-+		#gpio-cells = <2>;
-+		ngpios = <32>;
-+		interrupt-controller;
-+		#interrupt-cells = <2>;
-+	};
-+	gpio3: gpio@e0050180 {
-+		compatible = "renesas,em-gio";
-+		reg = <0xe0050180 0x2c>, <0xe00501c0 0x20>;
-+		interrupts = <0 73 0>, <0 74 0>;
-+		gpio-controller;
-+		#gpio-cells = <2>;
-+		ngpios = <32>;
-+		interrupt-controller;
-+		#interrupt-cells = <2>;
-+	};
-+	gpio4: gpio@e0050200 {
-+		compatible = "renesas,em-gio";
-+		reg = <0xe0050200 0x2c>, <0xe0050240 0x20>;
-+		interrupts = <0 75 0>, <0 76 0>;
-+		gpio-controller;
-+		#gpio-cells = <2>;
-+		ngpios = <31>;
-+		interrupt-controller;
-+		#interrupt-cells = <2>;
-+	};
- };
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0340-ARM-shmobile-Use-DT-for-GIC-on-EMEV2-and-KZM9D.patch b/patches.renesas/0340-ARM-shmobile-Use-DT-for-GIC-on-EMEV2-and-KZM9D.patch
deleted file mode 100644
index a79a5f6e44cd7..0000000000000
--- a/patches.renesas/0340-ARM-shmobile-Use-DT-for-GIC-on-EMEV2-and-KZM9D.patch
+++ /dev/null
@@ -1,80 +0,0 @@
-From a06bfc9f3212d5a57302b6b1028b3c90e562ed64 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Tue, 2 Jul 2013 18:28:06 +0900
-Subject: ARM: shmobile: Use DT for GIC on EMEV2 and KZM9D
-
-Remove the C version of the EMEV2 GIC setup code,
-instead rely on GIC information provided by DT.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Acked-by: Arnd Bergmann <arnd@arndb.de>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 23260e1b417843ea875bd7b21f17c5c80031c4cd)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-kzm9d.c        |  2 --
- arch/arm/mach-shmobile/include/mach/emev2.h |  1 -
- arch/arm/mach-shmobile/setup-emev2.c        | 15 ---------------
- 3 files changed, 18 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-kzm9d.c b/arch/arm/mach-shmobile/board-kzm9d.c
-index 15900f1f..30c2cc69 100644
---- a/arch/arm/mach-shmobile/board-kzm9d.c
-+++ b/arch/arm/mach-shmobile/board-kzm9d.c
-@@ -86,8 +86,6 @@ DT_MACHINE_START(KZM9D_DT, "kzm9d")
- 	.smp		= smp_ops(emev2_smp_ops),
- 	.map_io		= emev2_map_io,
- 	.init_early	= emev2_init_delay,
--	.nr_irqs	= NR_IRQS_LEGACY,
--	.init_irq	= emev2_init_irq,
- 	.init_machine	= kzm9d_add_standard_devices,
- 	.init_late	= shmobile_init_late,
- 	.dt_compat	= kzm9d_boards_compat_dt,
-diff --git a/arch/arm/mach-shmobile/include/mach/emev2.h b/arch/arm/mach-shmobile/include/mach/emev2.h
-index 3e0c0441..b0ab4b72 100644
---- a/arch/arm/mach-shmobile/include/mach/emev2.h
-+++ b/arch/arm/mach-shmobile/include/mach/emev2.h
-@@ -2,7 +2,6 @@
- #define __ASM_EMEV2_H__
- 
- extern void emev2_map_io(void);
--extern void emev2_init_irq(void);
- extern void emev2_init_delay(void);
- extern void emev2_add_standard_devices(void);
- extern void emev2_clock_init(void);
-diff --git a/arch/arm/mach-shmobile/setup-emev2.c b/arch/arm/mach-shmobile/setup-emev2.c
-index e4b46930..6fa485da 100644
---- a/arch/arm/mach-shmobile/setup-emev2.c
-+++ b/arch/arm/mach-shmobile/setup-emev2.c
-@@ -202,20 +202,6 @@ void __init emev2_init_delay(void)
- 	shmobile_setup_delay(533, 1, 3); /* Cortex-A9 @ 533MHz */
- }
- 
--void __init emev2_init_irq(void)
--{
--	void __iomem *gic_dist_base;
--	void __iomem *gic_cpu_base;
--
--	/* Static mappings, never released */
--	gic_dist_base = ioremap(0xe0028000, PAGE_SIZE);
--	gic_cpu_base = ioremap(0xe0020000, PAGE_SIZE);
--	BUG_ON(!gic_dist_base || !gic_cpu_base);
--
--	/* Use GIC to handle interrupts */
--	gic_init(0, 29, gic_dist_base, gic_cpu_base);
--}
--
- #ifdef CONFIG_USE_OF
- 
- static const char *emev2_boards_compat_dt[] __initdata = {
-@@ -226,7 +212,6 @@ static const char *emev2_boards_compat_dt[] __initdata = {
- DT_MACHINE_START(EMEV2_DT, "Generic Emma Mobile EV2 (Flattened Device Tree)")
- 	.smp		= smp_ops(emev2_smp_ops),
- 	.init_early	= emev2_init_delay,
--	.nr_irqs	= NR_IRQS_LEGACY,
- 	.dt_compat	= emev2_boards_compat_dt,
- MACHINE_END
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0341-ARM-shmobile-Use-DT-for-SMP-on-EMEV2-and-KZM9D.patch b/patches.renesas/0341-ARM-shmobile-Use-DT-for-SMP-on-EMEV2-and-KZM9D.patch
deleted file mode 100644
index b54fc7f7af0d9..0000000000000
--- a/patches.renesas/0341-ARM-shmobile-Use-DT-for-SMP-on-EMEV2-and-KZM9D.patch
+++ /dev/null
@@ -1,59 +0,0 @@
-From 8ee97c3dfe2c8d004a29f1508cefabb67c94856c Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Tue, 2 Jul 2013 18:28:14 +0900
-Subject: ARM: shmobile: Use DT for SMP on EMEV2 and KZM9D
-
-Rework the EMEV2 SMP code to rely on DT for CPU information
-instead of reading out number of CPU cores from the SCU.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Acked-by: Arnd Bergmann <arnd@arndb.de>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 683101a66203149da96e93fb8c0740c726bc114f)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/smp-emev2.c | 17 +++--------------
- 1 file changed, 3 insertions(+), 14 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/smp-emev2.c b/arch/arm/mach-shmobile/smp-emev2.c
-index 80991b35..97871655 100644
---- a/arch/arm/mach-shmobile/smp-emev2.c
-+++ b/arch/arm/mach-shmobile/smp-emev2.c
-@@ -38,9 +38,12 @@ static int __cpuinit emev2_boot_secondary(unsigned int cpu, struct task_struct *
- 
- static void __init emev2_smp_prepare_cpus(unsigned int max_cpus)
- {
-+	/* setup EMEV2 specific SCU base, enable */
-+	shmobile_scu_base = ioremap(EMEV2_SCU_BASE, PAGE_SIZE);
- 	scu_enable(shmobile_scu_base);
- 
- 	/* Tell ROM loader about our vector (in headsmp-scu.S, headsmp.S) */
-+	emev2_clock_init(); /* need ioremapped SMU */
- 	emev2_set_boot_vector(__pa(shmobile_boot_vector));
- 	shmobile_boot_fn = virt_to_phys(shmobile_boot_scu);
- 	shmobile_boot_arg = (unsigned long)shmobile_scu_base;
-@@ -49,21 +52,7 @@ static void __init emev2_smp_prepare_cpus(unsigned int max_cpus)
- 	scu_power_mode(shmobile_scu_base, SCU_PM_NORMAL);
- }
- 
--static void __init emev2_smp_init_cpus(void)
--{
--	unsigned int ncores;
--
--	/* setup EMEV2 specific SCU base */
--	shmobile_scu_base = ioremap(EMEV2_SCU_BASE, PAGE_SIZE);
--	emev2_clock_init(); /* need ioremapped SMU */
--
--	ncores = shmobile_scu_base ? scu_get_core_count(shmobile_scu_base) : 1;
--
--	shmobile_smp_init_cpus(ncores);
--}
--
- struct smp_operations emev2_smp_ops __initdata = {
--	.smp_init_cpus		= emev2_smp_init_cpus,
- 	.smp_prepare_cpus	= emev2_smp_prepare_cpus,
- 	.smp_boot_secondary	= emev2_boot_secondary,
- };
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0342-ARM-shmobile-EMEV2-map_io-update.patch b/patches.renesas/0342-ARM-shmobile-EMEV2-map_io-update.patch
deleted file mode 100644
index 53f323b23f24a..0000000000000
--- a/patches.renesas/0342-ARM-shmobile-EMEV2-map_io-update.patch
+++ /dev/null
@@ -1,53 +0,0 @@
-From 4488e71e979312d1be60a082997f73d8ea3e35c7 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Tue, 2 Jul 2013 18:28:22 +0900
-Subject: ARM: shmobile: EMEV2 map_io update
-
-Update the EMEV2 struct map_desc to exclude the SMU
-and also include the ->map_io() callback in the DT
-version of EMEV2 board support.
-
-The EMEV2 SMP code can these days perform ioremap()
-early on without the SMU information in the io_desc[].
-
-To correctly support SMP in case of DT-only board
-support then the ->map_io() callback is needed.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Acked-by: Arnd Bergmann <arnd@arndb.de>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 0ea2b5389ab1b63aa880c5735c15be0b26b91b1a)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-emev2.c | 8 +-------
- 1 file changed, 1 insertion(+), 7 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-emev2.c b/arch/arm/mach-shmobile/setup-emev2.c
-index 6fa485da..19980be7 100644
---- a/arch/arm/mach-shmobile/setup-emev2.c
-+++ b/arch/arm/mach-shmobile/setup-emev2.c
-@@ -38,13 +38,6 @@
- 
- static struct map_desc emev2_io_desc[] __initdata = {
- #ifdef CONFIG_SMP
--	/* 128K entity map for 0xe0100000 (SMU) */
--	{
--		.virtual	= 0xe0100000,
--		.pfn		= __phys_to_pfn(0xe0100000),
--		.length		= SZ_128K,
--		.type		= MT_DEVICE
--	},
- 	/* 2M mapping for SCU + L2 controller */
- 	{
- 		.virtual	= 0xf0000000,
-@@ -211,6 +204,7 @@ static const char *emev2_boards_compat_dt[] __initdata = {
- 
- DT_MACHINE_START(EMEV2_DT, "Generic Emma Mobile EV2 (Flattened Device Tree)")
- 	.smp		= smp_ops(emev2_smp_ops),
-+	.map_io		= emev2_map_io,
- 	.init_early	= emev2_init_delay,
- 	.dt_compat	= emev2_boards_compat_dt,
- MACHINE_END
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0343-ARM-shmobile-r8a73a4-add-MMCIF-and-SDHI-DT-templates.patch b/patches.renesas/0343-ARM-shmobile-r8a73a4-add-MMCIF-and-SDHI-DT-templates.patch
deleted file mode 100644
index eb85c83e585a3..0000000000000
--- a/patches.renesas/0343-ARM-shmobile-r8a73a4-add-MMCIF-and-SDHI-DT-templates.patch
+++ /dev/null
@@ -1,74 +0,0 @@
-From 8dec1e8ce2890c27ae05bfcbce4d6865f20b7f36 Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Mon, 8 Jul 2013 17:54:45 +0200
-Subject: ARM: shmobile: r8a73a4: add MMCIF and SDHI DT templates
-
-This adds DT templates for all MMCIF and SDHI controllers on r8a73a4.
-They are added with status="disabled". To use them platform-specific
-DTs have to enable the required ones.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 369ee2db438cc0adc6952b424743e9ed21a0edee)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a73a4.dtsi | 45 ++++++++++++++++++++++++++++++++++++++++++
- 1 file changed, 45 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a73a4.dtsi b/arch/arm/boot/dts/r8a73a4.dtsi
-index 4e1ddf0d..6ce699be 100644
---- a/arch/arm/boot/dts/r8a73a4.dtsi
-+++ b/arch/arm/boot/dts/r8a73a4.dtsi
-@@ -166,4 +166,49 @@
- 		interrupt-parent = <&gic>;
- 		interrupts = <0 173 0x4>;
- 	};
-+
-+	mmcif0: mmcif@ee200000 {
-+		compatible = "renesas,sh-mmcif";
-+		reg = <0 0xee200000 0 0x80>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 169 0x4>;
-+		reg-io-width = <4>;
-+		status = "disabled";
-+	};
-+
-+	mmcif1: mmcif@ee220000 {
-+		compatible = "renesas,sh-mmcif";
-+		reg = <0 0xee220000 0 0x80>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 170 0x4>;
-+		reg-io-width = <4>;
-+		status = "disabled";
-+	};
-+
-+	sdhi0: sdhi@ee100000 {
-+		compatible = "renesas,r8a73a4-sdhi";
-+		reg = <0 0xee100000 0 0x100>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 165 4>;
-+		cap-sd-highspeed;
-+		status = "disabled";
-+	};
-+
-+	sdhi1: sdhi@ee120000 {
-+		compatible = "renesas,r8a73a4-sdhi";
-+		reg = <0 0xee120000 0 0x100>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 166 4>;
-+		cap-sd-highspeed;
-+		status = "disabled";
-+	};
-+
-+	sdhi2: sdhi@ee140000 {
-+		compatible = "renesas,r8a73a4-sdhi";
-+		reg = <0 0xee140000 0 0x100>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 167 4>;
-+		cap-sd-highspeed;
-+		status = "disabled";
-+	};
- };
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0344-ARM-shmobile-r8a7790-add-MMCIF-and-SDHI-DT-templates.patch b/patches.renesas/0344-ARM-shmobile-r8a7790-add-MMCIF-and-SDHI-DT-templates.patch
deleted file mode 100644
index 3112c211143f0..0000000000000
--- a/patches.renesas/0344-ARM-shmobile-r8a7790-add-MMCIF-and-SDHI-DT-templates.patch
+++ /dev/null
@@ -1,83 +0,0 @@
-From c245ab06ef594187df2b948242fe281d17b6c290 Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Mon, 8 Jul 2013 17:54:46 +0200
-Subject: ARM: shmobile: r8a7790: add MMCIF and SDHI DT templates
-
-This adds DT templates for all MMCIF and SDHI controllers on r8a7790.
-They are added with status="disabled". To use them platform-specific
-DTs have to enable the required ones.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 8c9b1aa41853272adf505cc22be541f1eac2f94c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7790.dtsi | 54 ++++++++++++++++++++++++++++++++++++++++++
- 1 file changed, 54 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
-index 339d9b11..9cd88202 100644
---- a/arch/arm/boot/dts/r8a7790.dtsi
-+++ b/arch/arm/boot/dts/r8a7790.dtsi
-@@ -54,4 +54,58 @@
- 		interrupt-parent = <&gic>;
- 		interrupts = <0 0 4>, <0 1 4>, <0 2 4>,	<0 3 4>;
- 	};
-+
-+	mmcif0: mmcif@ee200000 {
-+		compatible = "renesas,sh-mmcif";
-+		reg = <0 0xee200000 0 0x80>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 169 0x4>;
-+		reg-io-width = <4>;
-+		status = "disabled";
-+	};
-+
-+	mmcif1: mmcif@ee220000 {
-+		compatible = "renesas,sh-mmcif";
-+		reg = <0 0xee220000 0 0x80>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 170 0x4>;
-+		reg-io-width = <4>;
-+		status = "disabled";
-+	};
-+
-+	sdhi0: sdhi@ee100000 {
-+		compatible = "renesas,r8a7790-sdhi";
-+		reg = <0 0xee100000 0 0x100>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 165 4>;
-+		cap-sd-highspeed;
-+		status = "disabled";
-+	};
-+
-+	sdhi1: sdhi@ee120000 {
-+		compatible = "renesas,r8a7790-sdhi";
-+		reg = <0 0xee120000 0 0x100>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 166 4>;
-+		cap-sd-highspeed;
-+		status = "disabled";
-+	};
-+
-+	sdhi2: sdhi@ee140000 {
-+		compatible = "renesas,r8a7790-sdhi";
-+		reg = <0 0xee140000 0 0x100>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 167 4>;
-+		cap-sd-highspeed;
-+		status = "disabled";
-+	};
-+
-+	sdhi3: sdhi@ee160000 {
-+		compatible = "renesas,r8a7790-sdhi";
-+		reg = <0 0xee160000 0 0x100>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 168 4>;
-+		cap-sd-highspeed;
-+		status = "disabled";
-+	};
- };
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0345-ARM-shmobile-KZM9D-DT-reference-implementation.patch b/patches.renesas/0345-ARM-shmobile-KZM9D-DT-reference-implementation.patch
deleted file mode 100644
index 3149586128311..0000000000000
--- a/patches.renesas/0345-ARM-shmobile-KZM9D-DT-reference-implementation.patch
+++ /dev/null
@@ -1,178 +0,0 @@
-From f951af65ec627cfef358c74ec5b5ac9eb56571a6 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Mon, 8 Jul 2013 15:00:30 +0900
-Subject: ARM: shmobile: KZM9D DT reference implementation
-
-Add a DT reference implementation for the KZM9D board.
-
-Only DT devices are used in this case. UART, STI, GPIO
-and SMP / GIC are all provided by emev2.dtsi.
-
-There is still a board specific C file used for enabling
-legacy SH clocks. This file will be removed after we have
-moved over to common clocks.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-[horms+renesas@verge.net.au: Do not include trailing blank line in
- board-kzm9d-reference.c ]
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-(cherry picked from commit 03393e8fe651aaf8824c519effbb51bf460ca57f)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/Makefile                     |  1 +
- arch/arm/boot/dts/emev2-kzm9d-reference.dts    | 26 +++++++++++++++
- arch/arm/mach-shmobile/Kconfig                 | 12 +++++++
- arch/arm/mach-shmobile/Makefile                |  1 +
- arch/arm/mach-shmobile/Makefile.boot           |  1 +
- arch/arm/mach-shmobile/board-kzm9d-reference.c | 46 ++++++++++++++++++++++++++
- 6 files changed, 87 insertions(+)
- create mode 100644 arch/arm/boot/dts/emev2-kzm9d-reference.dts
- create mode 100644 arch/arm/mach-shmobile/board-kzm9d-reference.c
-
-diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
-index 389725e5..a77ed45c 100644
---- a/arch/arm/boot/dts/Makefile
-+++ b/arch/arm/boot/dts/Makefile
-@@ -160,6 +160,7 @@ dtb-$(CONFIG_ARCH_U8500) += snowball.dtb \
- 	hrefv60plus.dtb \
- 	ccu9540.dtb
- dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \
-+	emev2-kzm9d-reference.dtb \
- 	r8a7740-armadillo800eva.dtb \
- 	r8a7778-bockw.dtb \
- 	r8a7740-armadillo800eva-reference.dtb \
-diff --git a/arch/arm/boot/dts/emev2-kzm9d-reference.dts b/arch/arm/boot/dts/emev2-kzm9d-reference.dts
-new file mode 100644
-index 00000000..5ec065ed
---- /dev/null
-+++ b/arch/arm/boot/dts/emev2-kzm9d-reference.dts
-@@ -0,0 +1,26 @@
-+/*
-+ * Device Tree Source for the KZM9D board
-+ *
-+ * Copyright (C) 2013 Renesas Solutions Corp.
-+ *
-+ * This file is licensed under the terms of the GNU General Public License
-+ * version 2.  This program is licensed "as is" without any warranty of any
-+ * kind, whether express or implied.
-+ */
-+/dts-v1/;
-+
-+/include/ "emev2.dtsi"
-+
-+/ {
-+	model = "EMEV2 KZM9D Board";
-+	compatible = "renesas,kzm9d-reference", "renesas,emev2";
-+
-+	memory {
-+		device_type = "memory";
-+		reg = <0x40000000 0x8000000>;
-+	};
-+
-+	chosen {
-+		bootargs = "console=ttyS1,115200n81 ignore_loglevel root=/dev/nfs ip=dhcp nfsroot=,rsize=4096,wsize=4096";
-+	};
-+};
-diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
-index 3912ce91..7c5034aa 100644
---- a/arch/arm/mach-shmobile/Kconfig
-+++ b/arch/arm/mach-shmobile/Kconfig
-@@ -156,6 +156,18 @@ config MACH_KZM9D
- 	select REGULATOR_FIXED_VOLTAGE if REGULATOR
- 	select USE_OF
- 
-+config MACH_KZM9D_REFERENCE
-+	bool "KZM9D board - Reference Device Tree Implementation"
-+	depends on ARCH_EMEV2
-+	select REGULATOR_FIXED_VOLTAGE if REGULATOR
-+	select USE_OF
-+	---help---
-+	   Use reference implementation of KZM9D board support
-+	   which makes a greater use of device tree at the expense
-+	   of not supporting a number of devices.
-+
-+	   This is intended to aid developers
-+
- config MACH_KZM9G
- 	bool "KZM-A9-GT board"
- 	depends on ARCH_SH73A0
-diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
-index 6165a517..e8d0a2c9 100644
---- a/arch/arm/mach-shmobile/Makefile
-+++ b/arch/arm/mach-shmobile/Makefile
-@@ -46,6 +46,7 @@ obj-$(CONFIG_MACH_LAGER)	+= board-lager.o
- obj-$(CONFIG_MACH_ARMADILLO800EVA)	+= board-armadillo800eva.o
- obj-$(CONFIG_MACH_ARMADILLO800EVA_REFERENCE)	+= board-armadillo800eva-reference.o
- obj-$(CONFIG_MACH_KZM9D)	+= board-kzm9d.o
-+obj-$(CONFIG_MACH_KZM9D_REFERENCE)	+= board-kzm9d-reference.o
- obj-$(CONFIG_MACH_KZM9G)	+= board-kzm9g.o
- obj-$(CONFIG_MACH_KZM9G_REFERENCE)	+= board-kzm9g-reference.o
- 
-diff --git a/arch/arm/mach-shmobile/Makefile.boot b/arch/arm/mach-shmobile/Makefile.boot
-index 84c68685..7785c52b 100644
---- a/arch/arm/mach-shmobile/Makefile.boot
-+++ b/arch/arm/mach-shmobile/Makefile.boot
-@@ -7,6 +7,7 @@ loadaddr-$(CONFIG_MACH_ARMADILLO800EVA_REFERENCE) += 0x40008000
- loadaddr-$(CONFIG_MACH_BOCKW) += 0x60008000
- loadaddr-$(CONFIG_MACH_KOTA2) += 0x41008000
- loadaddr-$(CONFIG_MACH_KZM9D) += 0x40008000
-+loadaddr-$(CONFIG_MACH_KZM9D_REFERENCE) += 0x40008000
- loadaddr-$(CONFIG_MACH_KZM9G) += 0x41008000
- loadaddr-$(CONFIG_MACH_KZM9G_REFERENCE) += 0x41008000
- loadaddr-$(CONFIG_MACH_LAGER) += 0x40008000
-diff --git a/arch/arm/mach-shmobile/board-kzm9d-reference.c b/arch/arm/mach-shmobile/board-kzm9d-reference.c
-new file mode 100644
-index 00000000..a7b28b24
---- /dev/null
-+++ b/arch/arm/mach-shmobile/board-kzm9d-reference.c
-@@ -0,0 +1,46 @@
-+/*
-+ * kzm9d board support - Reference DT implementation
-+ *
-+ * Copyright (C) 2013  Renesas Solutions Corp.
-+ * Copyright (C) 2013  Magnus Damm
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; version 2 of the License.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
-+ */
-+
-+#include <linux/init.h>
-+#include <linux/of_platform.h>
-+#include <mach/emev2.h>
-+#include <mach/common.h>
-+#include <asm/mach/arch.h>
-+
-+static void __init kzm9d_add_standard_devices(void)
-+{
-+	emev2_clock_init();
-+
-+	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
-+}
-+
-+static const char *kzm9d_boards_compat_dt[] __initdata = {
-+	"renesas,kzm9d-reference",
-+	NULL,
-+};
-+
-+DT_MACHINE_START(KZM9D_DT, "kzm9d")
-+	.smp		= smp_ops(emev2_smp_ops),
-+	.map_io		= emev2_map_io,
-+	.init_early	= emev2_init_delay,
-+	.init_machine	= kzm9d_add_standard_devices,
-+	.init_late	= shmobile_init_late,
-+	.dt_compat	= kzm9d_boards_compat_dt,
-+MACHINE_END
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0346-ARM-shmobile-Add-SMSC-ethernet-chip-to-KZM9D-DT-refe.patch b/patches.renesas/0346-ARM-shmobile-Add-SMSC-ethernet-chip-to-KZM9D-DT-refe.patch
deleted file mode 100644
index f22d6e12c6fb1..0000000000000
--- a/patches.renesas/0346-ARM-shmobile-Add-SMSC-ethernet-chip-to-KZM9D-DT-refe.patch
+++ /dev/null
@@ -1,59 +0,0 @@
-From 95290c24f8bf0c5fcdb4a767c3c6810f44cecb14 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Tue, 9 Jul 2013 13:26:54 +0900
-Subject: ARM: shmobile: Add SMSC ethernet chip to KZM9D DT reference
-
-Add support for the SMSC ethernet controller found
-on the KZM9D board to the KZM9D DT Reference code.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 66a5cab04d339d02b93a4671eadf8e251dbfdc2c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/emev2-kzm9d-reference.dts | 31 +++++++++++++++++++++++++++++
- 1 file changed, 31 insertions(+)
-
-diff --git a/arch/arm/boot/dts/emev2-kzm9d-reference.dts b/arch/arm/boot/dts/emev2-kzm9d-reference.dts
-index 5ec065ed..bed676b9 100644
---- a/arch/arm/boot/dts/emev2-kzm9d-reference.dts
-+++ b/arch/arm/boot/dts/emev2-kzm9d-reference.dts
-@@ -23,4 +23,35 @@
- 	chosen {
- 		bootargs = "console=ttyS1,115200n81 ignore_loglevel root=/dev/nfs ip=dhcp nfsroot=,rsize=4096,wsize=4096";
- 	};
-+
-+	reg_1p8v: regulator@0 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "fixed-1.8V";
-+		regulator-min-microvolt = <1800000>;
-+		regulator-max-microvolt = <1800000>;
-+		regulator-always-on;
-+		regulator-boot-on;
-+	};
-+
-+	reg_3p3v: regulator@1 {
-+		compatible = "regulator-fixed";
-+		regulator-name = "fixed-3.3V";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+		regulator-always-on;
-+		regulator-boot-on;
-+	};
-+
-+	lan9220@20000000 {
-+		compatible = "smsc,lan9220", "smsc,lan9115";
-+		reg = <0x20000000 0x10000>;
-+		phy-mode = "mii";
-+		interrupt-parent = <&gpio0>;
-+		interrupts = <1 1>;	/* active high */
-+		reg-io-width = <4>;
-+		smsc,irq-active-high;
-+		smsc,irq-push-pull;
-+		vddvario-supply = <&reg_1p8v>;
-+		vdd33a-supply = <&reg_3p3v>;
-+	};
- };
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0347-ARM-shmobile-r8a7790-add-clocks-for-thermal.patch b/patches.renesas/0347-ARM-shmobile-r8a7790-add-clocks-for-thermal.patch
deleted file mode 100644
index dddbae9bbe1c0..0000000000000
--- a/patches.renesas/0347-ARM-shmobile-r8a7790-add-clocks-for-thermal.patch
+++ /dev/null
@@ -1,52 +0,0 @@
-From d0ea31e836a58e9432cdb58f4f5d2998e525cb44 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Wed, 26 Jun 2013 17:34:34 +0900
-Subject: ARM: shmobile: r8a7790: add clocks for thermal
-
-Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit a4b91be0b607ffecf6cf9dacdefcaa0797340e3c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r8a7790.c | 4 ++++
- 1 file changed, 4 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
-index 5d71313d..28eccd11 100644
---- a/arch/arm/mach-shmobile/clock-r8a7790.c
-+++ b/arch/arm/mach-shmobile/clock-r8a7790.c
-@@ -49,6 +49,7 @@
- 
- #define SMSTPCR2 0xe6150138
- #define SMSTPCR3 0xe615013c
-+#define SMSTPCR5 0xe6150144
- #define SMSTPCR7 0xe615014c
- 
- #define MODEMR		0xE6160060
-@@ -182,6 +183,7 @@ static struct clk div6_clks[DIV6_NR] = {
- enum {
- 	MSTP721, MSTP720,
- 	MSTP717, MSTP716,
-+	MSTP522,
- 	MSTP315, MSTP314, MSTP313, MSTP312, MSTP311, MSTP305, MSTP304,
- 	MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202,
- 	MSTP_NR
-@@ -203,6 +205,7 @@ static struct clk mstp_clks[MSTP_NR] = {
- 	[MSTP204] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 4, 0), /* SCIFA0 */
- 	[MSTP203] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 3, 0), /* SCIFA1 */
- 	[MSTP202] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 2, 0), /* SCIFA2 */
-+	[MSTP522] = SH_CLK_MSTP32(&extal_clk, SMSTPCR5, 22, 0), /* Thermal */
- 	[MSTP717] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 17, 0), /* HSCIF0 */
- 	[MSTP716] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 16, 0), /* HSCIF1 */
- };
-@@ -254,6 +257,7 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP720]),
- 	CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP717]),
- 	CLKDEV_DEV_ID("sh-sci.9", &mstp_clks[MSTP716]),
-+	CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
- 	CLKDEV_DEV_ID("ee200000.mmcif", &mstp_clks[MSTP315]),
- 	CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP315]),
- 	CLKDEV_DEV_ID("ee100000.sdhi", &mstp_clks[MSTP314]),
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0348-ARM-shmobile-r8a7790-add-thermal-driver-support.patch b/patches.renesas/0348-ARM-shmobile-r8a7790-add-thermal-driver-support.patch
deleted file mode 100644
index 872f46f6aabe5..0000000000000
--- a/patches.renesas/0348-ARM-shmobile-r8a7790-add-thermal-driver-support.patch
+++ /dev/null
@@ -1,51 +0,0 @@
-From 095346f86fa0820bc67ae05ba268ac4d285a67c9 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Wed, 26 Jun 2013 16:22:21 +0900
-Subject: ARM: shmobile: r8a7790: add thermal driver support
-
-The current temperature may be read using:
-cat /sys/class/thermal/thermal_zone0/temp
-
-Based on similar work for the r8a73a4 by Kuninori Morimoto.
-
-Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 0b8eeba45143030e29ec39c43daa1383146581e6)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-r8a7790.c | 12 ++++++++++++
- 1 file changed, 12 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c
-index b7e78b9a..bc40a44d 100644
---- a/arch/arm/mach-shmobile/setup-r8a7790.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7790.c
-@@ -148,6 +148,17 @@ static struct resource irqc0_resources[] __initdata = {
- 					  &irqc##idx##_data,		\
- 					  sizeof(struct renesas_irqc_config))
- 
-+static struct resource thermal_resources[] __initdata = {
-+	DEFINE_RES_MEM(0xe61f0000, 0x14),
-+	DEFINE_RES_MEM(0xe61f0100, 0x38),
-+	DEFINE_RES_IRQ(gic_spi(69)),
-+};
-+
-+#define r8a7790_register_thermal()					\
-+	platform_device_register_simple("rcar_thermal", -1,		\
-+					thermal_resources,		\
-+					ARRAY_SIZE(thermal_resources))
-+
- void __init r8a7790_add_standard_devices(void)
- {
- 	r8a7790_register_scif(SCIFA0);
-@@ -161,6 +172,7 @@ void __init r8a7790_add_standard_devices(void)
- 	r8a7790_register_scif(HSCIF0);
- 	r8a7790_register_scif(HSCIF1);
- 	r8a7790_register_irqc(0);
-+	r8a7790_register_thermal();
- }
- 
- void __init r8a7790_timer_init(void)
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0349-ARM-shmobile-r8a73a4-wait-for-completion-when-kickin.patch b/patches.renesas/0349-ARM-shmobile-r8a73a4-wait-for-completion-when-kickin.patch
deleted file mode 100644
index 6751caf2e05f3..0000000000000
--- a/patches.renesas/0349-ARM-shmobile-r8a73a4-wait-for-completion-when-kickin.patch
+++ /dev/null
@@ -1,62 +0,0 @@
-From 51236622278ba440fdc9332bd63faefa21493d58 Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Wed, 22 May 2013 11:12:33 +0200
-Subject: ARM: shmobile: r8a73a4: wait for completion when kicking the clock
-
-To reconfigure clocks, controlled by FRQCRA and FRQCRB, a kick bit has to
-be set and to make sure the setting has taken effect, it has to be read
-back repeatedly until it is cleared by the hardware. This patch adds the
-waiting part, that was missing until now.
-
-Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 8d27657286a1e9e6ee7adaf4d0638cefd708a6fa)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r8a73a4.c | 22 ++++++++++++++++------
- 1 file changed, 16 insertions(+), 6 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a73a4.c b/arch/arm/mach-shmobile/clock-r8a73a4.c
-index 5f7fe628..d5176d08 100644
---- a/arch/arm/mach-shmobile/clock-r8a73a4.c
-+++ b/arch/arm/mach-shmobile/clock-r8a73a4.c
-@@ -184,6 +184,21 @@ PLL_CLOCK(pll2h_clk, &main_div2_clk, pll_parent_main_extal, 3, 5, PLL2HCR, 5);
- 
- SH_FIXED_RATIO_CLK(pll1_div2_clk,	pll1_clk,	div2);
- 
-+static int frqcr_kick_do(struct clk *clk)
-+{
-+	int i;
-+
-+	/* set KICK bit in FRQCRB to update hardware setting, check success */
-+	iowrite32(ioread32(CPG_MAP(FRQCRB)) | BIT(31), CPG_MAP(FRQCRB));
-+	for (i = 1000; i; i--)
-+		if (ioread32(CPG_MAP(FRQCRB)) & BIT(31))
-+			cpu_relax();
-+		else
-+			return 0;
-+
-+	return -ETIMEDOUT;
-+}
-+
- static struct clk *main_clks[] = {
- 	&extalr_clk,
- 	&extal1_clk,
-@@ -205,12 +220,7 @@ static struct clk *main_clks[] = {
- /* DIV4 */
- static void div4_kick(struct clk *clk)
- {
--	unsigned long value;
--
--	/* set KICK bit in FRQCRB to update hardware setting */
--	value = ioread32(CPG_MAP(FRQCRB));
--	value |= (1 << 31);
--	iowrite32(value, CPG_MAP(FRQCRB));
-+	frqcr_kick_do(clk);
- }
- 
- static int divisors[] = { 2, 3, 4, 6, 8, 12, 16, 18, 24, 0, 36, 48, 10};
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0350-ARM-shmobile-r8a73a4-implement-CPU-clock-scaling-for.patch b/patches.renesas/0350-ARM-shmobile-r8a73a4-implement-CPU-clock-scaling-for.patch
deleted file mode 100644
index 1b20e4adbe01d..0000000000000
--- a/patches.renesas/0350-ARM-shmobile-r8a73a4-implement-CPU-clock-scaling-for.patch
+++ /dev/null
@@ -1,243 +0,0 @@
-From 5827424148199c559c8145e540f5be9f32927154 Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Wed, 22 May 2013 11:12:37 +0200
-Subject: ARM: shmobile: r8a73a4: implement CPU clock scaling for CPUFreq
-
-This patch adds support for the Z-clock on r8a73a4 SoCs, which is driving
-the Cortex A15 core, and a "cpufreq-cpu0" platform device. Adding an
-"operating-points" property to the CPU0 DT node and a regulator, this
-patch allows platforms to use the generic cpufreq-cpu0 driver to use
-SoC's DVFS capabilities.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 181135e0b7f58735969619c89548f6a37cd0ee36)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/Kconfig         |   2 +
- arch/arm/mach-shmobile/clock-r8a73a4.c | 123 ++++++++++++++++++++++++++++++++-
- arch/arm/mach-shmobile/setup-r8a73a4.c |   1 +
- 3 files changed, 125 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
-index 7c5034aa..734b3eec 100644
---- a/arch/arm/mach-shmobile/Kconfig
-+++ b/arch/arm/mach-shmobile/Kconfig
-@@ -26,6 +26,8 @@ config ARCH_R8A73A4
- 	select HAVE_ARM_ARCH_TIMER
- 	select SH_CLK_CPG
- 	select RENESAS_IRQC
-+	select ARCH_HAS_CPUFREQ
-+	select ARCH_HAS_OPP
- 
- config ARCH_R8A7740
- 	bool "R-Mobile A1 (R8A77400)"
-diff --git a/arch/arm/mach-shmobile/clock-r8a73a4.c b/arch/arm/mach-shmobile/clock-r8a73a4.c
-index d5176d08..824789c2 100644
---- a/arch/arm/mach-shmobile/clock-r8a73a4.c
-+++ b/arch/arm/mach-shmobile/clock-r8a73a4.c
-@@ -34,6 +34,7 @@
- 
- #define FRQCRA		0xE6150000
- #define FRQCRB		0xE6150004
-+#define FRQCRC		0xE61500E0
- #define VCLKCR1		0xE6150008
- #define VCLKCR2		0xE615000C
- #define VCLKCR3		0xE615001C
-@@ -52,6 +53,7 @@
- #define HSICKCR		0xE615026C
- #define M4CKCR		0xE6150098
- #define PLLECR		0xE61500D0
-+#define PLL0CR		0xE61500D8
- #define PLL1CR		0xE6150028
- #define PLL2CR		0xE615002C
- #define PLL2SCR		0xE61501F4
-@@ -177,6 +179,7 @@ static struct sh_clk_ops pll_clk_ops = {
- 		.mapping	= &cpg_mapping,		\
- 	}
- 
-+PLL_CLOCK(pll0_clk,  &main_clk,      pll_parent_main,      1, 20, PLL0CR,  0);
- PLL_CLOCK(pll1_clk,  &main_clk,      pll_parent_main,       1, 7, PLL1CR,  1);
- PLL_CLOCK(pll2_clk,  &main_div2_clk, pll_parent_main_extal, 3, 5, PLL2CR,  2);
- PLL_CLOCK(pll2s_clk, &main_div2_clk, pll_parent_main_extal, 3, 5, PLL2SCR, 4);
-@@ -184,6 +187,14 @@ PLL_CLOCK(pll2h_clk, &main_div2_clk, pll_parent_main_extal, 3, 5, PLL2HCR, 5);
- 
- SH_FIXED_RATIO_CLK(pll1_div2_clk,	pll1_clk,	div2);
- 
-+static atomic_t frqcr_lock;
-+
-+/* Several clocks need to access FRQCRB, have to lock */
-+static bool frqcr_kick_check(struct clk *clk)
-+{
-+	return !(ioread32(CPG_MAP(FRQCRB)) & BIT(31));
-+}
-+
- static int frqcr_kick_do(struct clk *clk)
- {
- 	int i;
-@@ -199,6 +210,107 @@ static int frqcr_kick_do(struct clk *clk)
- 	return -ETIMEDOUT;
- }
- 
-+static int zclk_set_rate(struct clk *clk, unsigned long rate)
-+{
-+	void __iomem *frqcrc;
-+	int ret;
-+	unsigned long step, p_rate;
-+	u32 val;
-+
-+	if (!clk->parent || !__clk_get(clk->parent))
-+		return -ENODEV;
-+
-+	if (!atomic_inc_and_test(&frqcr_lock) || !frqcr_kick_check(clk)) {
-+		ret = -EBUSY;
-+		goto done;
-+	}
-+
-+	frqcrc = clk->mapped_reg + (FRQCRC - (u32)clk->enable_reg);
-+
-+	p_rate = clk_get_rate(clk->parent);
-+	if (rate == p_rate) {
-+		val = 0;
-+	} else {
-+		step = DIV_ROUND_CLOSEST(p_rate, 32);
-+		val = 32 - rate / step;
-+	}
-+
-+	iowrite32((ioread32(frqcrc) & ~(clk->div_mask << clk->enable_bit)) |
-+		  (val << clk->enable_bit), frqcrc);
-+
-+	ret = frqcr_kick_do(clk);
-+
-+done:
-+	atomic_dec(&frqcr_lock);
-+	__clk_put(clk->parent);
-+	return ret;
-+}
-+
-+static long zclk_round_rate(struct clk *clk, unsigned long rate)
-+{
-+	/*
-+	 * theoretical rate = parent rate * multiplier / 32,
-+	 * where 1 <= multiplier <= 32. Therefore we should do
-+	 * multiplier = rate * 32 / parent rate
-+	 * rounded rate = parent rate * multiplier / 32.
-+	 * However, multiplication before division won't fit in 32 bits, so
-+	 * we sacrifice some precision by first dividing and then multiplying.
-+	 * To find the nearest divisor we calculate both and pick up the best
-+	 * one. This avoids 64-bit arithmetics.
-+	 */
-+	unsigned long step, mul_min, mul_max, rate_min, rate_max;
-+
-+	rate_max = clk_get_rate(clk->parent);
-+
-+	/* output freq <= parent */
-+	if (rate >= rate_max)
-+		return rate_max;
-+
-+	step = DIV_ROUND_CLOSEST(rate_max, 32);
-+	/* output freq >= parent / 32 */
-+	if (step >= rate)
-+		return step;
-+
-+	mul_min = rate / step;
-+	mul_max = DIV_ROUND_UP(rate, step);
-+	rate_min = step * mul_min;
-+	if (mul_max == mul_min)
-+		return rate_min;
-+
-+	rate_max = step * mul_max;
-+
-+	if (rate_max - rate <  rate - rate_min)
-+		return rate_max;
-+
-+	return rate_min;
-+}
-+
-+static unsigned long zclk_recalc(struct clk *clk)
-+{
-+	void __iomem *frqcrc = FRQCRC - (u32)clk->enable_reg + clk->mapped_reg;
-+	unsigned int max = clk->div_mask + 1;
-+	unsigned long val = ((ioread32(frqcrc) >> clk->enable_bit) &
-+			     clk->div_mask);
-+
-+	return DIV_ROUND_CLOSEST(clk_get_rate(clk->parent), max) *
-+		(max - val);
-+}
-+
-+static struct sh_clk_ops zclk_ops = {
-+	.recalc = zclk_recalc,
-+	.set_rate = zclk_set_rate,
-+	.round_rate = zclk_round_rate,
-+};
-+
-+static struct clk z_clk = {
-+	.parent = &pll0_clk,
-+	.div_mask = 0x1f,
-+	.enable_bit = 8,
-+	/* We'll need to access FRQCRB and FRQCRC */
-+	.enable_reg = (void __iomem *)FRQCRB,
-+	.ops = &zclk_ops,
-+};
-+
- static struct clk *main_clks[] = {
- 	&extalr_clk,
- 	&extal1_clk,
-@@ -210,17 +322,21 @@ static struct clk *main_clks[] = {
- 	&main_div2_clk,
- 	&fsiack_clk,
- 	&fsibck_clk,
-+	&pll0_clk,
- 	&pll1_clk,
- 	&pll1_div2_clk,
- 	&pll2_clk,
- 	&pll2s_clk,
- 	&pll2h_clk,
-+	&z_clk,
- };
- 
- /* DIV4 */
- static void div4_kick(struct clk *clk)
- {
--	frqcr_kick_do(clk);
-+	if (!WARN(!atomic_inc_and_test(&frqcr_lock), "FRQCR* lock broken!\n"))
-+		frqcr_kick_do(clk);
-+	atomic_dec(&frqcr_lock);
- }
- 
- static int divisors[] = { 2, 3, 4, 6, 8, 12, 16, 18, 24, 0, 36, 48, 10};
-@@ -396,6 +512,9 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_CON_ID("pll2s",			&pll2s_clk),
- 	CLKDEV_CON_ID("pll2h",			&pll2h_clk),
- 
-+	/* CPU clock */
-+	CLKDEV_DEV_ID("cpufreq-cpu0",		&z_clk),
-+
- 	/* DIV6 */
- 	CLKDEV_CON_ID("zb",			&div6_clks[DIV6_ZB]),
- 	CLKDEV_CON_ID("vck1",			&div6_clks[DIV6_VCK1]),
-@@ -439,6 +558,8 @@ void __init r8a73a4_clock_init(void)
- 	int k, ret = 0;
- 	u32 ckscr;
- 
-+	atomic_set(&frqcr_lock, -1);
-+
- 	reg = ioremap_nocache(CKSCR, PAGE_SIZE);
- 	BUG_ON(!reg);
- 	ckscr = ioread32(reg);
-diff --git a/arch/arm/mach-shmobile/setup-r8a73a4.c b/arch/arm/mach-shmobile/setup-r8a73a4.c
-index a8c4e41b..9c52096a 100644
---- a/arch/arm/mach-shmobile/setup-r8a73a4.c
-+++ b/arch/arm/mach-shmobile/setup-r8a73a4.c
-@@ -184,6 +184,7 @@ void __init r8a73a4_add_standard_devices(void)
- #ifdef CONFIG_USE_OF
- void __init r8a73a4_add_standard_devices_dt(void)
- {
-+	platform_device_register_simple("cpufreq-cpu0", -1, NULL, 0);
- 	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
- }
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0351-ARM-shmobile-r8a73a4-safeguard-against-wrong-clk_set.patch b/patches.renesas/0351-ARM-shmobile-r8a73a4-safeguard-against-wrong-clk_set.patch
deleted file mode 100644
index 46caff28cc189..0000000000000
--- a/patches.renesas/0351-ARM-shmobile-r8a73a4-safeguard-against-wrong-clk_set.patch
+++ /dev/null
@@ -1,56 +0,0 @@
-From 7f23ada85cac9bd9892c5571a62dfb2cebe1dc53 Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Fri, 21 Jun 2013 09:10:35 +0200
-Subject: ARM: shmobile: r8a73a4: safeguard against wrong clk_set_rate() uses
-
-clk_set_rate() should only be called with exact rates, returned by
-clk_round_rate(). However, it is still good to verify, that the value,
-passed to clock's .set_rate() method is at least valid. This patch adds
-such a check for the Z-clock on r8a73a4.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit d1c3c959f2206dad0582876af2510aded4f9eac5)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r8a73a4.c | 14 +++++++++++++-
- 1 file changed, 13 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a73a4.c b/arch/arm/mach-shmobile/clock-r8a73a4.c
-index 824789c2..22f10ff4 100644
---- a/arch/arm/mach-shmobile/clock-r8a73a4.c
-+++ b/arch/arm/mach-shmobile/clock-r8a73a4.c
-@@ -225,16 +225,28 @@ static int zclk_set_rate(struct clk *clk, unsigned long rate)
- 		goto done;
- 	}
- 
--	frqcrc = clk->mapped_reg + (FRQCRC - (u32)clk->enable_reg);
-+	/*
-+	 * Users are supposed to first call clk_set_rate() only with
-+	 * clk_round_rate() results. So, we don't fix wrong rates here, but
-+	 * guard against them anyway
-+	 */
- 
- 	p_rate = clk_get_rate(clk->parent);
- 	if (rate == p_rate) {
- 		val = 0;
- 	} else {
- 		step = DIV_ROUND_CLOSEST(p_rate, 32);
-+
-+		if (rate > p_rate || rate < step) {
-+			ret = -EINVAL;
-+			goto done;
-+		}
-+
- 		val = 32 - rate / step;
- 	}
- 
-+	frqcrc = clk->mapped_reg + (FRQCRC - (u32)clk->enable_reg);
-+
- 	iowrite32((ioread32(frqcrc) & ~(clk->div_mask << clk->enable_bit)) |
- 		  (val << clk->enable_bit), frqcrc);
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0352-ARM-shmobile-r8a73a4-add-Z2-clock-support.patch b/patches.renesas/0352-ARM-shmobile-r8a73a4-add-Z2-clock-support.patch
deleted file mode 100644
index 0a427ef04d7a4..0000000000000
--- a/patches.renesas/0352-ARM-shmobile-r8a73a4-add-Z2-clock-support.patch
+++ /dev/null
@@ -1,56 +0,0 @@
-From 1180be9d70666cf7ebeae0a7a16342e4eecd2bb1 Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Fri, 21 Jun 2013 09:10:38 +0200
-Subject: ARM: shmobile: r8a73a4: add Z2 clock support
-
-The Z2 clock on r8a73a4 is used to clock the 4 Cortex A7 cores on the SoC.
-Add a definition for this clock to later use it from the arm_big_little
-CPUFreq driver.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit a040f22d2c2e82347f978b52e7402a7387e5dee5)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r8a73a4.c | 17 +++++++++++++++++
- 1 file changed, 17 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a73a4.c b/arch/arm/mach-shmobile/clock-r8a73a4.c
-index 22f10ff4..27ff58c8 100644
---- a/arch/arm/mach-shmobile/clock-r8a73a4.c
-+++ b/arch/arm/mach-shmobile/clock-r8a73a4.c
-@@ -323,6 +323,21 @@ static struct clk z_clk = {
- 	.ops = &zclk_ops,
- };
- 
-+/*
-+ * It seems only 1/2 divider is usable in manual mode. 1/2 / 2/3
-+ * switching is only available in auto-DVFS mode
-+ */
-+SH_FIXED_RATIO_CLK(pll0_div2_clk,	pll0_clk,		div2);
-+
-+static struct clk z2_clk = {
-+	.parent = &pll0_div2_clk,
-+	.div_mask = 0x1f,
-+	.enable_bit = 0,
-+	/* We'll need to access FRQCRB and FRQCRC */
-+	.enable_reg = (void __iomem *)FRQCRB,
-+	.ops = &zclk_ops,
-+};
-+
- static struct clk *main_clks[] = {
- 	&extalr_clk,
- 	&extal1_clk,
-@@ -341,6 +356,8 @@ static struct clk *main_clks[] = {
- 	&pll2s_clk,
- 	&pll2h_clk,
- 	&z_clk,
-+	&pll0_div2_clk,
-+	&z2_clk,
- };
- 
- /* DIV4 */
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0353-ARM-shmobile-r8a73a4-add-clocks-for-I2C-controllers.patch b/patches.renesas/0353-ARM-shmobile-r8a73a4-add-clocks-for-I2C-controllers.patch
deleted file mode 100644
index f538e988c0b8f..0000000000000
--- a/patches.renesas/0353-ARM-shmobile-r8a73a4-add-clocks-for-I2C-controllers.patch
+++ /dev/null
@@ -1,90 +0,0 @@
-From e76146f8a0c60e6a3d33a992cdab1ab362d71d30 Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Thu, 27 Jun 2013 11:47:56 +0200
-Subject: ARM: shmobile: r8a73a4: add clocks for I2C controllers
-
-r8a73a4 SoCs have numerous I2C controllers, of which 9 are compatible with
-the i2c-sh_mobile.c driver. This patch adds clock definitions for them.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 1e453df90047f052cdce2041a572830c8eb32084)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r8a73a4.c | 25 +++++++++++++++++++++++--
- 1 file changed, 23 insertions(+), 2 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a73a4.c b/arch/arm/mach-shmobile/clock-r8a73a4.c
-index 27ff58c8..f831b3bb 100644
---- a/arch/arm/mach-shmobile/clock-r8a73a4.c
-+++ b/arch/arm/mach-shmobile/clock-r8a73a4.c
-@@ -30,6 +30,7 @@
- 
- #define SMSTPCR2 0xe6150138
- #define SMSTPCR3 0xe615013c
-+#define SMSTPCR4 0xe6150140
- #define SMSTPCR5 0xe6150144
- 
- #define FRQCRA		0xE6150000
-@@ -504,8 +505,10 @@ static struct clk div6_clks[DIV6_NR] = {
- /* MSTP */
- enum {
- 	MSTP217, MSTP216, MSTP207, MSTP206, MSTP204, MSTP203,
--	MSTP315, MSTP314, MSTP313, MSTP312, MSTP305,
--	MSTP522,
-+	MSTP323, MSTP318, MSTP317, MSTP316,
-+	MSTP315, MSTP314, MSTP313, MSTP312, MSTP305, MSTP300,
-+	MSTP411, MSTP410, MSTP409,
-+	MSTP522, MSTP515,
- 	MSTP_NR
- };
- 
-@@ -516,12 +519,21 @@ static struct clk mstp_clks[MSTP_NR] = {
- 	[MSTP207] = SH_CLK_MSTP32(&div6_clks[DIV6_MP],	SMSTPCR2, 7, 0), /* SCIFB1 */
- 	[MSTP216] = SH_CLK_MSTP32(&div6_clks[DIV6_MP],	SMSTPCR2, 16, 0), /* SCIFB2 */
- 	[MSTP217] = SH_CLK_MSTP32(&div6_clks[DIV6_MP],	SMSTPCR2, 17, 0), /* SCIFB3 */
-+	[MSTP300] = SH_CLK_MSTP32(&div4_clks[DIV4_HP],	SMSTPCR3, 0, 0), /* IIC2 */
- 	[MSTP305] = SH_CLK_MSTP32(&div6_clks[DIV6_MMC1],SMSTPCR3, 5, 0), /* MMCIF1 */
- 	[MSTP312] = SH_CLK_MSTP32(&div6_clks[DIV6_SDHI2],SMSTPCR3, 12, 0), /* SDHI2 */
- 	[MSTP313] = SH_CLK_MSTP32(&div6_clks[DIV6_SDHI1],SMSTPCR3, 13, 0), /* SDHI1 */
- 	[MSTP314] = SH_CLK_MSTP32(&div6_clks[DIV6_SDHI0],SMSTPCR3, 14, 0), /* SDHI0 */
- 	[MSTP315] = SH_CLK_MSTP32(&div6_clks[DIV6_MMC0],SMSTPCR3, 15, 0), /* MMCIF0 */
-+	[MSTP316] = SH_CLK_MSTP32(&div4_clks[DIV4_HP],	SMSTPCR3, 16, 0), /* IIC6 */
-+	[MSTP317] = SH_CLK_MSTP32(&div4_clks[DIV4_HP],	SMSTPCR3, 17, 0), /* IIC7 */
-+	[MSTP318] = SH_CLK_MSTP32(&div4_clks[DIV4_HP],	SMSTPCR3, 18, 0), /* IIC0 */
-+	[MSTP323] = SH_CLK_MSTP32(&div4_clks[DIV4_HP],	SMSTPCR3, 23, 0), /* IIC1 */
-+	[MSTP409] = SH_CLK_MSTP32(&main_div2_clk,	SMSTPCR4, 9, 0), /* IIC5 */
-+	[MSTP410] = SH_CLK_MSTP32(&div4_clks[DIV4_HP],	SMSTPCR4, 10, 0), /* IIC4 */
-+	[MSTP411] = SH_CLK_MSTP32(&div4_clks[DIV4_HP],	SMSTPCR4, 11, 0), /* IIC3 */
- 	[MSTP522] = SH_CLK_MSTP32(&extal2_clk, SMSTPCR5, 22, 0), /* Thermal */
-+	[MSTP515] = SH_CLK_MSTP32(&div4_clks[DIV4_HP],	SMSTPCR5, 15, 0), /* IIC8 */
- };
- 
- static struct clk_lookup lookups[] = {
-@@ -566,6 +578,7 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP216]),
- 	CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP217]),
- 	CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
-+	CLKDEV_DEV_ID("e6520000.i2c", &mstp_clks[MSTP300]),
- 	CLKDEV_DEV_ID("sh_mmcif.1", &mstp_clks[MSTP305]),
- 	CLKDEV_DEV_ID("ee220000.mmcif", &mstp_clks[MSTP305]),
- 	CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP312]),
-@@ -576,6 +589,14 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_DEV_ID("ee100000.sdhi", &mstp_clks[MSTP314]),
- 	CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP315]),
- 	CLKDEV_DEV_ID("ee200000.mmcif", &mstp_clks[MSTP315]),
-+	CLKDEV_DEV_ID("e6550000.i2c", &mstp_clks[MSTP316]),
-+	CLKDEV_DEV_ID("e6560000.i2c", &mstp_clks[MSTP317]),
-+	CLKDEV_DEV_ID("e6500000.i2c", &mstp_clks[MSTP318]),
-+	CLKDEV_DEV_ID("e6510000.i2c", &mstp_clks[MSTP323]),
-+	CLKDEV_DEV_ID("e60b0000.i2c", &mstp_clks[MSTP409]),
-+	CLKDEV_DEV_ID("e6540000.i2c", &mstp_clks[MSTP410]),
-+	CLKDEV_DEV_ID("e6530000.i2c", &mstp_clks[MSTP411]),
-+	CLKDEV_DEV_ID("e6570000.i2c", &mstp_clks[MSTP515]),
- 
- 	/* for DT */
- 	CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]),
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0354-ARM-shmobile-Sort-r8a7790-MSTP-entries.patch b/patches.renesas/0354-ARM-shmobile-Sort-r8a7790-MSTP-entries.patch
deleted file mode 100644
index 0f976bc700d3b..0000000000000
--- a/patches.renesas/0354-ARM-shmobile-Sort-r8a7790-MSTP-entries.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From fe46e52c8414a492b22c2f29c0eee12f9813c490 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Fri, 28 Jun 2013 19:13:27 +0900
-Subject: ARM: shmobile: Sort r8a7790 MSTP entries
-
-The r8a7790 MSTP bits should be kept sorted in the same way
-as on other mach-shmobile SoCs. Move the HSCIF and thermal
-bits to clean up the current state.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 29eb2ba89c63c6f57dc3a8b1a89241c7a877a3c8)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r8a7790.c | 6 +++---
- 1 file changed, 3 insertions(+), 3 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
-index 28eccd11..10d99b3f 100644
---- a/arch/arm/mach-shmobile/clock-r8a7790.c
-+++ b/arch/arm/mach-shmobile/clock-r8a7790.c
-@@ -192,6 +192,9 @@ enum {
- static struct clk mstp_clks[MSTP_NR] = {
- 	[MSTP721] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 21, 0), /* SCIF0 */
- 	[MSTP720] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 20, 0), /* SCIF1 */
-+	[MSTP717] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 17, 0), /* HSCIF0 */
-+	[MSTP716] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 16, 0), /* HSCIF1 */
-+	[MSTP522] = SH_CLK_MSTP32(&extal_clk, SMSTPCR5, 22, 0), /* Thermal */
- 	[MSTP315] = SH_CLK_MSTP32(&div6_clks[DIV6_MMC0], SMSTPCR3, 15, 0), /* MMC0 */
- 	[MSTP314] = SH_CLK_MSTP32(&div4_clks[DIV4_SD0], SMSTPCR3, 14, 0), /* SDHI0 */
- 	[MSTP313] = SH_CLK_MSTP32(&div4_clks[DIV4_SD1], SMSTPCR3, 13, 0), /* SDHI1 */
-@@ -205,9 +208,6 @@ static struct clk mstp_clks[MSTP_NR] = {
- 	[MSTP204] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 4, 0), /* SCIFA0 */
- 	[MSTP203] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 3, 0), /* SCIFA1 */
- 	[MSTP202] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 2, 0), /* SCIFA2 */
--	[MSTP522] = SH_CLK_MSTP32(&extal_clk, SMSTPCR5, 22, 0), /* Thermal */
--	[MSTP717] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 17, 0), /* HSCIF0 */
--	[MSTP716] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 16, 0), /* HSCIF1 */
- };
- 
- static struct clk_lookup lookups[] = {
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0355-ARM-shmobile-Add-r8a7790-CMT00-clock-event.patch b/patches.renesas/0355-ARM-shmobile-Add-r8a7790-CMT00-clock-event.patch
deleted file mode 100644
index c434f32939b9e..0000000000000
--- a/patches.renesas/0355-ARM-shmobile-Add-r8a7790-CMT00-clock-event.patch
+++ /dev/null
@@ -1,108 +0,0 @@
-From 50efb77ed7baaa141ebd65c3a1fe41fe1e86aea8 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Fri, 28 Jun 2013 20:27:04 +0900
-Subject: ARM: shmobile: Add r8a7790 CMT00 clock event
-
-Add clock event support for CMT0 timer channel 0
-to the r8a7790 SoC code. On most ARM mach-shmobile
-the CMT is hooked up to a 32KHz clock but on r8a7790
-a 31.7KHz clock is instead used.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 99ade1a0f02e086248874d9908def3e8e4539418)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r8a7790.c |  4 ++++
- arch/arm/mach-shmobile/setup-r8a7790.c | 23 ++++++++++++++++++++++-
- 2 files changed, 26 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
-index 10d99b3f..62d8162c 100644
---- a/arch/arm/mach-shmobile/clock-r8a7790.c
-+++ b/arch/arm/mach-shmobile/clock-r8a7790.c
-@@ -47,6 +47,7 @@
- #define CPG_BASE 0xe6150000
- #define CPG_LEN 0x1000
- 
-+#define SMSTPCR1 0xe6150134
- #define SMSTPCR2 0xe6150138
- #define SMSTPCR3 0xe615013c
- #define SMSTPCR5 0xe6150144
-@@ -186,6 +187,7 @@ enum {
- 	MSTP522,
- 	MSTP315, MSTP314, MSTP313, MSTP312, MSTP311, MSTP305, MSTP304,
- 	MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202,
-+	MSTP124,
- 	MSTP_NR
- };
- 
-@@ -208,6 +210,7 @@ static struct clk mstp_clks[MSTP_NR] = {
- 	[MSTP204] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 4, 0), /* SCIFA0 */
- 	[MSTP203] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 3, 0), /* SCIFA1 */
- 	[MSTP202] = SH_CLK_MSTP32(&mp_clk, SMSTPCR2, 2, 0), /* SCIFA2 */
-+	[MSTP124] = SH_CLK_MSTP32(&rclk_clk, SMSTPCR1, 24, 0), /* CMT0 */
- };
- 
- static struct clk_lookup lookups[] = {
-@@ -270,6 +273,7 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_DEV_ID("sh_mobile_sdhi.3", &mstp_clks[MSTP311]),
- 	CLKDEV_DEV_ID("ee220000.mmcif", &mstp_clks[MSTP305]),
- 	CLKDEV_DEV_ID("sh_mmcif.1", &mstp_clks[MSTP305]),
-+	CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]),
- };
- 
- #define R8A7790_CLOCK_ROOT(e, m, p0, p1, p30, p31)		\
-diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c
-index bc40a44d..ece60c63 100644
---- a/arch/arm/mach-shmobile/setup-r8a7790.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7790.c
-@@ -21,9 +21,10 @@
- #include <linux/irq.h>
- #include <linux/kernel.h>
- #include <linux/of_platform.h>
--#include <linux/serial_sci.h>
- #include <linux/platform_data/gpio-rcar.h>
- #include <linux/platform_data/irq-renesas-irqc.h>
-+#include <linux/serial_sci.h>
-+#include <linux/sh_timer.h>
- #include <mach/common.h>
- #include <mach/irqs.h>
- #include <mach/r8a7790.h>
-@@ -159,6 +160,25 @@ static struct resource thermal_resources[] __initdata = {
- 					thermal_resources,		\
- 					ARRAY_SIZE(thermal_resources))
- 
-+static struct sh_timer_config cmt00_platform_data = {
-+	.name = "CMT00",
-+	.timer_bit = 0,
-+	.clockevent_rating = 80,
-+};
-+
-+static struct resource cmt00_resources[] = {
-+	DEFINE_RES_MEM(0xffca0510, 0x0c),
-+	DEFINE_RES_MEM(0xffca0500, 0x04),
-+	DEFINE_RES_IRQ(gic_spi(142)), /* CMT0_0 */
-+};
-+
-+#define r8a7790_register_cmt(idx)					\
-+	platform_device_register_resndata(&platform_bus, "sh_cmt",	\
-+					  idx, cmt##idx##_resources,	\
-+					  ARRAY_SIZE(cmt##idx##_resources), \
-+					  &cmt##idx##_platform_data,	\
-+					  sizeof(struct sh_timer_config))
-+
- void __init r8a7790_add_standard_devices(void)
- {
- 	r8a7790_register_scif(SCIFA0);
-@@ -173,6 +193,7 @@ void __init r8a7790_add_standard_devices(void)
- 	r8a7790_register_scif(HSCIF1);
- 	r8a7790_register_irqc(0);
- 	r8a7790_register_thermal();
-+	r8a7790_register_cmt(00);
- }
- 
- void __init r8a7790_timer_init(void)
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0356-ARM-shmobile-Make-r8a7790-Arch-timer-optional.patch b/patches.renesas/0356-ARM-shmobile-Make-r8a7790-Arch-timer-optional.patch
deleted file mode 100644
index 6754189f74cc1..0000000000000
--- a/patches.renesas/0356-ARM-shmobile-Make-r8a7790-Arch-timer-optional.patch
+++ /dev/null
@@ -1,84 +0,0 @@
-From b8ee7a5e2aa957955a7ef1d0c6587c242d5852d8 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Fri, 28 Jun 2013 20:27:13 +0900
-Subject: ARM: shmobile: Make r8a7790 Arch timer optional
-
-Update the r8a7790 code to allow using other
-timers than Arch timer for clock events.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 8333d8c995169e489a81241bd632a4b9370ed7c3)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/Kconfig                | 1 -
- arch/arm/mach-shmobile/board-lager.c          | 1 +
- arch/arm/mach-shmobile/include/mach/r8a7790.h | 1 +
- arch/arm/mach-shmobile/setup-r8a7790.c        | 8 ++++++++
- 4 files changed, 10 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
-index 734b3eec..406077c9 100644
---- a/arch/arm/mach-shmobile/Kconfig
-+++ b/arch/arm/mach-shmobile/Kconfig
-@@ -61,7 +61,6 @@ config ARCH_R8A7790
- 	select ARCH_WANT_OPTIONAL_GPIOLIB
- 	select ARM_GIC
- 	select CPU_V7
--	select HAVE_ARM_ARCH_TIMER
- 	select SH_CLK_CPG
- 	select RENESAS_IRQC
- 
-diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
-index 78d92d34..f89f1665 100644
---- a/arch/arm/mach-shmobile/board-lager.c
-+++ b/arch/arm/mach-shmobile/board-lager.c
-@@ -102,6 +102,7 @@ static const char *lager_boards_compat_dt[] __initdata = {
- };
- 
- DT_MACHINE_START(LAGER_DT, "lager")
-+	.init_early	= r8a7790_init_delay,
- 	.init_time	= r8a7790_timer_init,
- 	.init_machine	= lager_add_standard_devices,
- 	.dt_compat	= lager_boards_compat_dt,
-diff --git a/arch/arm/mach-shmobile/include/mach/r8a7790.h b/arch/arm/mach-shmobile/include/mach/r8a7790.h
-index 2e919e61..7851cc1b 100644
---- a/arch/arm/mach-shmobile/include/mach/r8a7790.h
-+++ b/arch/arm/mach-shmobile/include/mach/r8a7790.h
-@@ -4,6 +4,7 @@
- void r8a7790_add_standard_devices(void);
- void r8a7790_clock_init(void);
- void r8a7790_pinmux_init(void);
-+void r8a7790_init_delay(void);
- void r8a7790_timer_init(void);
- 
- #endif /* __ASM_R8A7790_H__ */
-diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c
-index ece60c63..f01542e1 100644
---- a/arch/arm/mach-shmobile/setup-r8a7790.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7790.c
-@@ -208,6 +208,13 @@ void __init r8a7790_timer_init(void)
- 	shmobile_timer_init();
- }
- 
-+void __init r8a7790_init_delay(void)
-+{
-+#ifndef CONFIG_ARM_ARCH_TIMER
-+	shmobile_setup_delay(1300, 2, 4); /* Cortex-A15 @ 1300MHz */
-+#endif
-+}
-+
- #ifdef CONFIG_USE_OF
- 
- static const char *r8a7790_boards_compat_dt[] __initdata = {
-@@ -216,6 +223,7 @@ static const char *r8a7790_boards_compat_dt[] __initdata = {
- };
- 
- DT_MACHINE_START(R8A7790_DT, "Generic R8A7790 (Flattened Device Tree)")
-+	.init_early	= r8a7790_init_delay,
- 	.init_time	= r8a7790_timer_init,
- 	.dt_compat	= r8a7790_boards_compat_dt,
- MACHINE_END
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0357-ARM-shmobile-Add-r8a73a4-CMT10-clock-event.patch b/patches.renesas/0357-ARM-shmobile-Add-r8a73a4-CMT10-clock-event.patch
deleted file mode 100644
index 3aaafed1f7d32..0000000000000
--- a/patches.renesas/0357-ARM-shmobile-Add-r8a73a4-CMT10-clock-event.patch
+++ /dev/null
@@ -1,96 +0,0 @@
-From d4be3c3523518a0a56d7d7f39dd0c13e6b7828ba Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Fri, 28 Jun 2013 20:27:23 +0900
-Subject: ARM: shmobile: Add r8a73a4 CMT10 clock event
-
-Add clock event support for CMT1 timer channel 0
-to the r8a73a4 SoC code. The CMT is used together
-with a 32KHz clock in this case.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit a7b99f27a260a25f856ea37090cea997d50fe112)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r8a73a4.c |  4 +++-
- arch/arm/mach-shmobile/setup-r8a73a4.c | 21 +++++++++++++++++++++
- 2 files changed, 24 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a73a4.c b/arch/arm/mach-shmobile/clock-r8a73a4.c
-index f831b3bb..8ea5ef6c 100644
---- a/arch/arm/mach-shmobile/clock-r8a73a4.c
-+++ b/arch/arm/mach-shmobile/clock-r8a73a4.c
-@@ -505,7 +505,7 @@ static struct clk div6_clks[DIV6_NR] = {
- /* MSTP */
- enum {
- 	MSTP217, MSTP216, MSTP207, MSTP206, MSTP204, MSTP203,
--	MSTP323, MSTP318, MSTP317, MSTP316,
-+	MSTP329, MSTP323, MSTP318, MSTP317, MSTP316,
- 	MSTP315, MSTP314, MSTP313, MSTP312, MSTP305, MSTP300,
- 	MSTP411, MSTP410, MSTP409,
- 	MSTP522, MSTP515,
-@@ -529,6 +529,7 @@ static struct clk mstp_clks[MSTP_NR] = {
- 	[MSTP317] = SH_CLK_MSTP32(&div4_clks[DIV4_HP],	SMSTPCR3, 17, 0), /* IIC7 */
- 	[MSTP318] = SH_CLK_MSTP32(&div4_clks[DIV4_HP],	SMSTPCR3, 18, 0), /* IIC0 */
- 	[MSTP323] = SH_CLK_MSTP32(&div4_clks[DIV4_HP],	SMSTPCR3, 23, 0), /* IIC1 */
-+	[MSTP329] = SH_CLK_MSTP32(&extalr_clk, SMSTPCR3, 29, 0), /* CMT10 */
- 	[MSTP409] = SH_CLK_MSTP32(&main_div2_clk,	SMSTPCR4, 9, 0), /* IIC5 */
- 	[MSTP410] = SH_CLK_MSTP32(&div4_clks[DIV4_HP],	SMSTPCR4, 10, 0), /* IIC4 */
- 	[MSTP411] = SH_CLK_MSTP32(&div4_clks[DIV4_HP],	SMSTPCR4, 11, 0), /* IIC3 */
-@@ -593,6 +594,7 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_DEV_ID("e6560000.i2c", &mstp_clks[MSTP317]),
- 	CLKDEV_DEV_ID("e6500000.i2c", &mstp_clks[MSTP318]),
- 	CLKDEV_DEV_ID("e6510000.i2c", &mstp_clks[MSTP323]),
-+	CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]),
- 	CLKDEV_DEV_ID("e60b0000.i2c", &mstp_clks[MSTP409]),
- 	CLKDEV_DEV_ID("e6540000.i2c", &mstp_clks[MSTP410]),
- 	CLKDEV_DEV_ID("e6530000.i2c", &mstp_clks[MSTP411]),
-diff --git a/arch/arm/mach-shmobile/setup-r8a73a4.c b/arch/arm/mach-shmobile/setup-r8a73a4.c
-index 9c52096a..b8dddf4a 100644
---- a/arch/arm/mach-shmobile/setup-r8a73a4.c
-+++ b/arch/arm/mach-shmobile/setup-r8a73a4.c
-@@ -22,6 +22,7 @@
- #include <linux/of_platform.h>
- #include <linux/platform_data/irq-renesas-irqc.h>
- #include <linux/serial_sci.h>
-+#include <linux/sh_timer.h>
- #include <mach/common.h>
- #include <mach/irqs.h>
- #include <mach/r8a73a4.h>
-@@ -168,6 +169,25 @@ static const struct resource thermal0_resources[] = {
- 					thermal0_resources,		\
- 					ARRAY_SIZE(thermal0_resources))
- 
-+static struct sh_timer_config cmt10_platform_data = {
-+	.name = "CMT10",
-+	.timer_bit = 0,
-+	.clockevent_rating = 80,
-+};
-+
-+static struct resource cmt10_resources[] = {
-+	DEFINE_RES_MEM(0xe6130010, 0x0c),
-+	DEFINE_RES_MEM(0xe6130000, 0x04),
-+	DEFINE_RES_IRQ(gic_spi(120)), /* CMT1_0 */
-+};
-+
-+#define r8a7790_register_cmt(idx)					\
-+	platform_device_register_resndata(&platform_bus, "sh_cmt",	\
-+					  idx, cmt##idx##_resources,	\
-+					  ARRAY_SIZE(cmt##idx##_resources), \
-+					  &cmt##idx##_platform_data,	\
-+					  sizeof(struct sh_timer_config))
-+
- void __init r8a73a4_add_standard_devices(void)
- {
- 	r8a73a4_register_scif(SCIFA0);
-@@ -179,6 +199,7 @@ void __init r8a73a4_add_standard_devices(void)
- 	r8a73a4_register_irqc(0);
- 	r8a73a4_register_irqc(1);
- 	r8a73a4_register_thermal();
-+	r8a7790_register_cmt(10);
- }
- 
- #ifdef CONFIG_USE_OF
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0358-ARM-shmobile-Make-r8a73a4-Arch-timer-optional.patch b/patches.renesas/0358-ARM-shmobile-Make-r8a73a4-Arch-timer-optional.patch
deleted file mode 100644
index dbaa6a13414a0..0000000000000
--- a/patches.renesas/0358-ARM-shmobile-Make-r8a73a4-Arch-timer-optional.patch
+++ /dev/null
@@ -1,83 +0,0 @@
-From f27a8753c74c940e0e60fac7f3a0df2bab61a094 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Fri, 28 Jun 2013 20:27:32 +0900
-Subject: ARM: shmobile: Make r8a73a4 Arch timer optional
-
-Update the r8a73a4 code to allow using other
-timers than Arch timer for clock event
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit b9a30ef1d354c0bc0cc6d973bbe7ede9f00716ee)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/Kconfig                | 1 -
- arch/arm/mach-shmobile/board-ape6evm.c        | 1 +
- arch/arm/mach-shmobile/include/mach/r8a73a4.h | 1 +
- arch/arm/mach-shmobile/setup-r8a73a4.c        | 8 ++++++++
- 4 files changed, 10 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
-index 406077c9..dd80f215 100644
---- a/arch/arm/mach-shmobile/Kconfig
-+++ b/arch/arm/mach-shmobile/Kconfig
-@@ -23,7 +23,6 @@ config ARCH_R8A73A4
- 	select ARCH_WANT_OPTIONAL_GPIOLIB
- 	select ARM_GIC
- 	select CPU_V7
--	select HAVE_ARM_ARCH_TIMER
- 	select SH_CLK_CPG
- 	select RENESAS_IRQC
- 	select ARCH_HAS_CPUFREQ
-diff --git a/arch/arm/mach-shmobile/board-ape6evm.c b/arch/arm/mach-shmobile/board-ape6evm.c
-index 1fbc39a1..af6dd39d 100644
---- a/arch/arm/mach-shmobile/board-ape6evm.c
-+++ b/arch/arm/mach-shmobile/board-ape6evm.c
-@@ -101,6 +101,7 @@ static const char *ape6evm_boards_compat_dt[] __initdata = {
- };
- 
- DT_MACHINE_START(APE6EVM_DT, "ape6evm")
-+	.init_early	= r8a73a4_init_delay,
- 	.init_time	= shmobile_timer_init,
- 	.init_machine	= ape6evm_add_standard_devices,
- 	.dt_compat	= ape6evm_boards_compat_dt,
-diff --git a/arch/arm/mach-shmobile/include/mach/r8a73a4.h b/arch/arm/mach-shmobile/include/mach/r8a73a4.h
-index f043103e..144a85e2 100644
---- a/arch/arm/mach-shmobile/include/mach/r8a73a4.h
-+++ b/arch/arm/mach-shmobile/include/mach/r8a73a4.h
-@@ -4,5 +4,6 @@
- void r8a73a4_add_standard_devices(void);
- void r8a73a4_clock_init(void);
- void r8a73a4_pinmux_init(void);
-+void r8a73a4_init_delay(void);
- 
- #endif /* __ASM_R8A73A4_H__ */
-diff --git a/arch/arm/mach-shmobile/setup-r8a73a4.c b/arch/arm/mach-shmobile/setup-r8a73a4.c
-index b8dddf4a..d533bd23 100644
---- a/arch/arm/mach-shmobile/setup-r8a73a4.c
-+++ b/arch/arm/mach-shmobile/setup-r8a73a4.c
-@@ -202,6 +202,13 @@ void __init r8a73a4_add_standard_devices(void)
- 	r8a7790_register_cmt(10);
- }
- 
-+void __init r8a73a4_init_delay(void)
-+{
-+#ifndef CONFIG_ARM_ARCH_TIMER
-+	shmobile_setup_delay(1500, 2, 4); /* Cortex-A15 @ 1500MHz */
-+#endif
-+}
-+
- #ifdef CONFIG_USE_OF
- void __init r8a73a4_add_standard_devices_dt(void)
- {
-@@ -215,6 +222,7 @@ static const char *r8a73a4_boards_compat_dt[] __initdata = {
- };
- 
- DT_MACHINE_START(R8A73A4_DT, "Generic R8A73A4 (Flattened Device Tree)")
-+	.init_early	= r8a73a4_init_delay,
- 	.init_machine	= r8a73a4_add_standard_devices_dt,
- 	.init_time	= shmobile_timer_init,
- 	.dt_compat	= r8a73a4_boards_compat_dt,
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0359-ARM-shmobile-Disconnect-EMEV2-SMP-code-from-clocks.patch b/patches.renesas/0359-ARM-shmobile-Disconnect-EMEV2-SMP-code-from-clocks.patch
deleted file mode 100644
index db230353d4b49..0000000000000
--- a/patches.renesas/0359-ARM-shmobile-Disconnect-EMEV2-SMP-code-from-clocks.patch
+++ /dev/null
@@ -1,113 +0,0 @@
-From 6905b38094d7507b74837742f21a2ff03f1803c3 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Tue, 2 Jul 2013 18:28:30 +0900
-Subject: ARM: shmobile: Disconnect EMEV2 SMP code from clocks
-
-Update the EMEV2 SMP code to access the SMU directly
-instead of relying on help from the legacy clock code.
-
-This change moves us one step closer to common clocks.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Acked-by: Arnd Bergmann <arnd@arndb.de>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 8d7217e5d74966e1016dad1f48fdaebb85deb685)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-emev2.c        | 18 ------------------
- arch/arm/mach-shmobile/include/mach/emev2.h |  1 -
- arch/arm/mach-shmobile/smp-emev2.c          | 11 +++++++++--
- 3 files changed, 9 insertions(+), 21 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/clock-emev2.c b/arch/arm/mach-shmobile/clock-emev2.c
-index 56dd0cfc..5ac13ba7 100644
---- a/arch/arm/mach-shmobile/clock-emev2.c
-+++ b/arch/arm/mach-shmobile/clock-emev2.c
-@@ -40,7 +40,6 @@
- #define USIB2SCLKDIV 0x65c
- #define USIB3SCLKDIV 0x660
- #define STI_CLKSEL 0x688
--#define SMU_GENERAL_REG0 0x7c0
- 
- /* not pretty, but hey */
- static void __iomem *smu_base;
-@@ -51,11 +50,6 @@ static void emev2_smu_write(unsigned long value, int offs)
- 	iowrite32(value, smu_base + offs);
- }
- 
--void emev2_set_boot_vector(unsigned long value)
--{
--	emev2_smu_write(value, SMU_GENERAL_REG0);
--}
--
- static struct clk_mapping smu_mapping = {
- 	.phys	= EMEV2_SMU_BASE,
- 	.len	= PAGE_SIZE,
-@@ -205,18 +199,6 @@ static struct clk_lookup lookups[] = {
- void __init emev2_clock_init(void)
- {
- 	int k, ret = 0;
--	static int is_setup;
--
--	/* yuck, this is ugly as hell, but the non-smp case of clocks
--	 * code is now designed to rely on ioremap() instead of static
--	 * entity maps. in the case of smp we need access to the SMU
--	 * register earlier than ioremap() is actually working without
--	 * any static maps. to enable SMP in ugly but with dynamic
--	 * mappings we have to call emev2_clock_init() from different
--	 * places depending on UP and SMP...
--	 */
--	if (is_setup++)
--		return;
- 
- 	smu_base = ioremap(EMEV2_SMU_BASE, PAGE_SIZE);
- 	BUG_ON(!smu_base);
-diff --git a/arch/arm/mach-shmobile/include/mach/emev2.h b/arch/arm/mach-shmobile/include/mach/emev2.h
-index b0ab4b72..c2eb7568 100644
---- a/arch/arm/mach-shmobile/include/mach/emev2.h
-+++ b/arch/arm/mach-shmobile/include/mach/emev2.h
-@@ -5,7 +5,6 @@ extern void emev2_map_io(void);
- extern void emev2_init_delay(void);
- extern void emev2_add_standard_devices(void);
- extern void emev2_clock_init(void);
--extern void emev2_set_boot_vector(unsigned long value);
- 
- #define EMEV2_GPIO_BASE 200
- #define EMEV2_GPIO_IRQ(n) (EMEV2_GPIO_BASE + (n))
-diff --git a/arch/arm/mach-shmobile/smp-emev2.c b/arch/arm/mach-shmobile/smp-emev2.c
-index 97871655..1bf8bc7e 100644
---- a/arch/arm/mach-shmobile/smp-emev2.c
-+++ b/arch/arm/mach-shmobile/smp-emev2.c
-@@ -29,6 +29,8 @@
- #include <asm/smp_scu.h>
- 
- #define EMEV2_SCU_BASE 0x1e000000
-+#define EMEV2_SMU_BASE 0xe0110000
-+#define SMU_GENERAL_REG0 0x7c0
- 
- static int __cpuinit emev2_boot_secondary(unsigned int cpu, struct task_struct *idle)
- {
-@@ -38,13 +40,18 @@ static int __cpuinit emev2_boot_secondary(unsigned int cpu, struct task_struct *
- 
- static void __init emev2_smp_prepare_cpus(unsigned int max_cpus)
- {
-+	void __iomem *smu;
-+
- 	/* setup EMEV2 specific SCU base, enable */
- 	shmobile_scu_base = ioremap(EMEV2_SCU_BASE, PAGE_SIZE);
- 	scu_enable(shmobile_scu_base);
- 
- 	/* Tell ROM loader about our vector (in headsmp-scu.S, headsmp.S) */
--	emev2_clock_init(); /* need ioremapped SMU */
--	emev2_set_boot_vector(__pa(shmobile_boot_vector));
-+	smu = ioremap(EMEV2_SMU_BASE, PAGE_SIZE);
-+	if (smu) {
-+		iowrite32(__pa(shmobile_boot_vector), smu + SMU_GENERAL_REG0);
-+		iounmap(smu);
-+	}
- 	shmobile_boot_fn = virt_to_phys(shmobile_boot_scu);
- 	shmobile_boot_arg = (unsigned long)shmobile_scu_base;
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0360-ARM-shmobile-r8a7740-add-MMCIF-DMA-definitions.patch b/patches.renesas/0360-ARM-shmobile-r8a7740-add-MMCIF-DMA-definitions.patch
deleted file mode 100644
index c1eac8a0591e2..0000000000000
--- a/patches.renesas/0360-ARM-shmobile-r8a7740-add-MMCIF-DMA-definitions.patch
+++ /dev/null
@@ -1,54 +0,0 @@
-From 5c54840b58b58565e6d512901dbf2bbc2fdccfcd Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Wed, 26 Jun 2013 16:40:53 +0200
-Subject: ARM: shmobile: r8a7740: add MMCIF DMA definitions
-
-Add DMA channel slave IDs and configuration entries for the r8a7740
-MMCIF controller.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 9a1456242c7c644d0032032ba80e8538b8322d3c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/include/mach/r8a7740.h |  2 ++
- arch/arm/mach-shmobile/setup-r8a7740.c        | 10 ++++++++++
- 2 files changed, 12 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/include/mach/r8a7740.h b/arch/arm/mach-shmobile/include/mach/r8a7740.h
-index b34d19b5..56f37500 100644
---- a/arch/arm/mach-shmobile/include/mach/r8a7740.h
-+++ b/arch/arm/mach-shmobile/include/mach/r8a7740.h
-@@ -42,6 +42,8 @@ enum {
- 	SHDMA_SLAVE_FSIB_TX,
- 	SHDMA_SLAVE_USBHS_TX,
- 	SHDMA_SLAVE_USBHS_RX,
-+	SHDMA_SLAVE_MMCIF_TX,
-+	SHDMA_SLAVE_MMCIF_RX,
- };
- 
- extern void r8a7740_meram_workaround(void);
-diff --git a/arch/arm/mach-shmobile/setup-r8a7740.c b/arch/arm/mach-shmobile/setup-r8a7740.c
-index ac29c2ee..84c5bb6d 100644
---- a/arch/arm/mach-shmobile/setup-r8a7740.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7740.c
-@@ -588,6 +588,16 @@ static const struct sh_dmae_slave_config r8a7740_dmae_slaves[] = {
- 		.addr		= 0xfe1f0064,
- 		.chcr		= CHCR_TX(XMIT_SZ_32BIT),
- 		.mid_rid	= 0xb5,
-+	}, {
-+		.slave_id	= SHDMA_SLAVE_MMCIF_TX,
-+		.addr		= 0xe6bd0034,
-+		.chcr		= CHCR_TX(XMIT_SZ_32BIT),
-+		.mid_rid	= 0xd1,
-+	}, {
-+		.slave_id	= SHDMA_SLAVE_MMCIF_RX,
-+		.addr		= 0xe6bd0034,
-+		.chcr		= CHCR_RX(XMIT_SZ_32BIT),
-+		.mid_rid	= 0xd2,
- 	},
- };
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0361-ARM-shmobile-Introduce-r8a7790_read_mode_pins.patch b/patches.renesas/0361-ARM-shmobile-Introduce-r8a7790_read_mode_pins.patch
deleted file mode 100644
index da79106ace9b7..0000000000000
--- a/patches.renesas/0361-ARM-shmobile-Introduce-r8a7790_read_mode_pins.patch
+++ /dev/null
@@ -1,103 +0,0 @@
-From 48400473eeacd7901ad1769c70c84d095ab37941 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Fri, 12 Jul 2013 01:22:19 +0900
-Subject: ARM: shmobile: Introduce r8a7790_read_mode_pins()
-
-Break out the r8a7790 boot mode code into a separate
-function so it can be shared by multiple users.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 512e53bc7f0088e3adfd89b3fea3447495fc8423)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r8a7790.c        | 11 ++---------
- arch/arm/mach-shmobile/include/mach/r8a7790.h |  3 +++
- arch/arm/mach-shmobile/setup-r8a7790.c        | 14 ++++++++++++++
- 3 files changed, 19 insertions(+), 9 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
-index 62d8162c..50d96f9c 100644
---- a/arch/arm/mach-shmobile/clock-r8a7790.c
-+++ b/arch/arm/mach-shmobile/clock-r8a7790.c
-@@ -24,6 +24,7 @@
- #include <linux/clkdev.h>
- #include <mach/clock.h>
- #include <mach/common.h>
-+#include <mach/r8a7790.h>
- 
- /*
-  *   MD		EXTAL		PLL0	PLL1	PLL3
-@@ -42,8 +43,6 @@
-  *	see "p1 / 2" on R8A7790_CLOCK_ROOT() below
-  */
- 
--#define MD(nr)	(1 << nr)
--
- #define CPG_BASE 0xe6150000
- #define CPG_LEN 0x1000
- 
-@@ -53,7 +52,6 @@
- #define SMSTPCR5 0xe6150144
- #define SMSTPCR7 0xe615014c
- 
--#define MODEMR		0xE6160060
- #define SDCKCR		0xE6150074
- #define SD2CKCR		0xE6150078
- #define SD3CKCR		0xE615007C
-@@ -288,14 +286,9 @@ static struct clk_lookup lookups[] = {
- 
- void __init r8a7790_clock_init(void)
- {
--	void __iomem *modemr = ioremap_nocache(MODEMR, PAGE_SIZE);
--	u32 mode;
-+	u32 mode = r8a7790_read_mode_pins();
- 	int k, ret = 0;
- 
--	BUG_ON(!modemr);
--	mode = ioread32(modemr);
--	iounmap(modemr);
--
- 	switch (mode & (MD(14) | MD(13))) {
- 	case 0:
- 		R8A7790_CLOCK_ROOT(15, &extal_clk, 172, 208, 106, 88);
-diff --git a/arch/arm/mach-shmobile/include/mach/r8a7790.h b/arch/arm/mach-shmobile/include/mach/r8a7790.h
-index 7851cc1b..7aaef409 100644
---- a/arch/arm/mach-shmobile/include/mach/r8a7790.h
-+++ b/arch/arm/mach-shmobile/include/mach/r8a7790.h
-@@ -7,4 +7,7 @@ void r8a7790_pinmux_init(void);
- void r8a7790_init_delay(void);
- void r8a7790_timer_init(void);
- 
-+#define MD(nr) BIT(nr)
-+u32 r8a7790_read_mode_pins(void);
-+
- #endif /* __ASM_R8A7790_H__ */
-diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c
-index f01542e1..6acddc13 100644
---- a/arch/arm/mach-shmobile/setup-r8a7790.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7790.c
-@@ -196,6 +196,20 @@ void __init r8a7790_add_standard_devices(void)
- 	r8a7790_register_cmt(00);
- }
- 
-+#define MODEMR 0xe6160060
-+
-+u32 __init r8a7790_read_mode_pins(void)
-+{
-+	void __iomem *modemr = ioremap_nocache(MODEMR, 4);
-+	u32 mode;
-+
-+	BUG_ON(!modemr);
-+	mode = ioread32(modemr);
-+	iounmap(modemr);
-+
-+	return mode;
-+}
-+
- void __init r8a7790_timer_init(void)
- {
- 	void __iomem *cntcr;
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0362-ARM-shmobile-Setup-r8a7790-arch-timer-based-on-MD-pi.patch b/patches.renesas/0362-ARM-shmobile-Setup-r8a7790-arch-timer-based-on-MD-pi.patch
deleted file mode 100644
index a7c5102945c91..0000000000000
--- a/patches.renesas/0362-ARM-shmobile-Setup-r8a7790-arch-timer-based-on-MD-pi.patch
+++ /dev/null
@@ -1,97 +0,0 @@
-From 9ea08ecbad130d0c15b42d494cbf80760eb18efe Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Fri, 12 Jul 2013 01:22:29 +0900
-Subject: ARM: shmobile: Setup r8a7790 arch timer based on MD pins
-
-Update the r8a7790 arch timer setup code to configure the
-frequency dynamically at boot time. This means that the arch
-timer driver will be able to detect a timer frequency that
-has been calculated based on the MD pins instead of a fixed
-and potentially incorrect 13 MHz.
-
-With this patch applied the Linux kernel will correctly
-support the r8a7790 Lager board that uses a 20 Mhz EXTAL.
-The arch timer will operate on 10 MHz and the Linux arch
-timer driver will be correctly configured to use 10 MHz.
-
-Without this patch the 20 MHz EXTAL will be used to drive
-the arch timer at 10 MHz, but the Linux arch timer driver
-will believe it is counting at 13 Mhz.
-
-Reported-by: Ulrich Hecht <ulrich.hecht@gmail.com>
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Tested-by: Ulrich Hecht <ulrich.hecht@gmail.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 81b9d5351fa96caad4accc6711bc1b9342927d4a)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-r8a7790.c | 51 ++++++++++++++++++++++++++++++----
- 1 file changed, 45 insertions(+), 6 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c
-index 6acddc13..4c96dad2 100644
---- a/arch/arm/mach-shmobile/setup-r8a7790.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7790.c
-@@ -210,14 +210,53 @@ u32 __init r8a7790_read_mode_pins(void)
- 	return mode;
- }
- 
-+#define CNTCR 0
-+#define CNTFID0 0x20
-+
- void __init r8a7790_timer_init(void)
- {
--	void __iomem *cntcr;
--
--	/* make sure arch timer is started by setting bit 0 of CNTCT */
--	cntcr = ioremap(0xe6080000, PAGE_SIZE);
--	iowrite32(1, cntcr);
--	iounmap(cntcr);
-+#ifdef CONFIG_ARM_ARCH_TIMER
-+	u32 mode = r8a7790_read_mode_pins();
-+	void __iomem *base;
-+	int extal_mhz = 0;
-+	u32 freq;
-+
-+	/* At Linux boot time the r8a7790 arch timer comes up
-+	 * with the counter disabled. Moreover, it may also report
-+	 * a potentially incorrect fixed 13 MHz frequency. To be
-+	 * correct these registers need to be updated to use the
-+	 * frequency EXTAL / 2 which can be determined by the MD pins.
-+	 */
-+
-+	switch (mode & (MD(14) | MD(13))) {
-+	case 0:
-+		extal_mhz = 15;
-+		break;
-+	case MD(13):
-+		extal_mhz = 20;
-+		break;
-+	case MD(14):
-+		extal_mhz = 26;
-+		break;
-+	case MD(13) | MD(14):
-+		extal_mhz = 30;
-+		break;
-+	}
-+
-+	/* The arch timer frequency equals EXTAL / 2 */
-+	freq = extal_mhz * (1000000 / 2);
-+
-+	/* Remap "armgcnt address map" space */
-+	base = ioremap(0xe6080000, PAGE_SIZE);
-+
-+	/* Update registers with correct frequency */
-+	iowrite32(freq, base + CNTFID0);
-+	asm volatile("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq));
-+
-+	/* make sure arch timer is started by setting bit 0 of CNTCR */
-+	iowrite32(1, base + CNTCR);
-+	iounmap(base);
-+#endif /* CONFIG_ARM_ARCH_TIMER */
- 
- 	shmobile_timer_init();
- }
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0363-ARM-shmobile-ape6evm-add-DT-reference.patch b/patches.renesas/0363-ARM-shmobile-ape6evm-add-DT-reference.patch
deleted file mode 100644
index c3fe2764e45a1..0000000000000
--- a/patches.renesas/0363-ARM-shmobile-ape6evm-add-DT-reference.patch
+++ /dev/null
@@ -1,246 +0,0 @@
-From 3e0f1839de7e3ee5320e8dc9c8720c51f2a449a2 Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Mon, 8 Jul 2013 18:04:57 +0200
-Subject: ARM: shmobile: ape6evm: add DT reference
-
-This patch adds a sample DT-based APE6EVM "reference" implementation. The
-use of platform-specific C-code should be avoided with this configuration
-as much as possible.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Acked-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 69f366615e950cb0d5af89da228796af5208ad8f)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/Makefile                       |  1 +
- arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts  | 33 +++++++++++
- arch/arm/mach-shmobile/Kconfig                   | 11 ++++
- arch/arm/mach-shmobile/Makefile                  |  1 +
- arch/arm/mach-shmobile/Makefile.boot             |  1 +
- arch/arm/mach-shmobile/board-ape6evm-reference.c | 71 ++++++++++++++++++++++++
- arch/arm/mach-shmobile/include/mach/r8a73a4.h    |  1 +
- arch/arm/mach-shmobile/setup-r8a73a4.c           |  9 ++-
- 8 files changed, 126 insertions(+), 2 deletions(-)
- create mode 100644 arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts
- create mode 100644 arch/arm/mach-shmobile/board-ape6evm-reference.c
-
-diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
-index a77ed45c..1f8d1e4c 100644
---- a/arch/arm/boot/dts/Makefile
-+++ b/arch/arm/boot/dts/Makefile
-@@ -169,6 +169,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \
- 	sh73a0-kzm9g.dtb \
- 	sh73a0-kzm9g-reference.dtb \
- 	r8a73a4-ape6evm.dtb \
-+	r8a73a4-ape6evm-reference.dtb \
- 	sh7372-mackerel.dtb
- dtb-$(CONFIG_ARCH_SOCFPGA) += socfpga_cyclone5.dtb \
- 	socfpga_vt.dtb
-diff --git a/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts b/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts
-new file mode 100644
-index 00000000..3251f059
---- /dev/null
-+++ b/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts
-@@ -0,0 +1,33 @@
-+/*
-+ * Device Tree Source for the APE6EVM board
-+ *
-+ * Copyright (C) 2013 Renesas Solutions Corp.
-+ *
-+ * This file is licensed under the terms of the GNU General Public License
-+ * version 2.  This program is licensed "as is" without any warranty of any
-+ * kind, whether express or implied.
-+ */
-+
-+/dts-v1/;
-+/include/ "r8a73a4.dtsi"
-+
-+/ {
-+	model = "APE6EVM";
-+	compatible = "renesas,ape6evm-reference", "renesas,r8a73a4";
-+
-+	chosen {
-+		bootargs = "console=ttySC0,115200 ignore_loglevel";
-+	};
-+
-+	memory@40000000 {
-+		device_type = "memory";
-+		reg = <0 0x40000000 0 0x40000000>;
-+	};
-+
-+	lbsc {
-+		compatible = "simple-bus";
-+		#address-cells = <1>;
-+		#size-cells = <1>;
-+		ranges = <0 0 0 0x80000000>;
-+	};
-+};
-diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
-index dd80f215..ad28f91b 100644
---- a/arch/arm/mach-shmobile/Kconfig
-+++ b/arch/arm/mach-shmobile/Kconfig
-@@ -83,6 +83,17 @@ config MACH_APE6EVM
- 	depends on ARCH_R8A73A4
- 	select USE_OF
- 
-+config MACH_APE6EVM_REFERENCE
-+	bool "APE6EVM board - Reference Device Tree Implementation"
-+	depends on ARCH_R8A73A4
-+	select USE_OF
-+	---help---
-+	   Use reference implementation of APE6EVM board support
-+	   which makes a greater use of device tree at the expense
-+	   of not supporting a number of devices.
-+
-+	   This is intended to aid developers
-+
- config MACH_MACKEREL
- 	bool "mackerel board"
- 	depends on ARCH_SH7372
-diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
-index e8d0a2c9..26a57842 100644
---- a/arch/arm/mach-shmobile/Makefile
-+++ b/arch/arm/mach-shmobile/Makefile
-@@ -37,6 +37,7 @@ obj-$(CONFIG_ARCH_SH73A0)	+= pm-sh73a0.o
- # Board objects
- obj-$(CONFIG_MACH_AG5EVM)	+= board-ag5evm.o
- obj-$(CONFIG_MACH_APE6EVM)	+= board-ape6evm.o
-+obj-$(CONFIG_MACH_APE6EVM_REFERENCE)	+= board-ape6evm-reference.o
- obj-$(CONFIG_MACH_MACKEREL)	+= board-mackerel.o
- obj-$(CONFIG_MACH_KOTA2)	+= board-kota2.o
- obj-$(CONFIG_MACH_BOCKW)	+= board-bockw.o
-diff --git a/arch/arm/mach-shmobile/Makefile.boot b/arch/arm/mach-shmobile/Makefile.boot
-index 7785c52b..c938b58f 100644
---- a/arch/arm/mach-shmobile/Makefile.boot
-+++ b/arch/arm/mach-shmobile/Makefile.boot
-@@ -2,6 +2,7 @@
- loadaddr-y	:=
- loadaddr-$(CONFIG_MACH_AG5EVM) += 0x40008000
- loadaddr-$(CONFIG_MACH_APE6EVM) += 0x40008000
-+loadaddr-$(CONFIG_MACH_APE6EVM_REFERENCE) += 0x40008000
- loadaddr-$(CONFIG_MACH_ARMADILLO800EVA) += 0x40008000
- loadaddr-$(CONFIG_MACH_ARMADILLO800EVA_REFERENCE) += 0x40008000
- loadaddr-$(CONFIG_MACH_BOCKW) += 0x60008000
-diff --git a/arch/arm/mach-shmobile/board-ape6evm-reference.c b/arch/arm/mach-shmobile/board-ape6evm-reference.c
-new file mode 100644
-index 00000000..c8288749
---- /dev/null
-+++ b/arch/arm/mach-shmobile/board-ape6evm-reference.c
-@@ -0,0 +1,71 @@
-+/*
-+ * APE6EVM board support
-+ *
-+ * Copyright (C) 2013  Renesas Solutions Corp.
-+ * Copyright (C) 2013  Magnus Damm
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; version 2 of the License.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
-+ */
-+
-+#include <linux/gpio.h>
-+#include <linux/kernel.h>
-+#include <linux/of_platform.h>
-+#include <linux/pinctrl/machine.h>
-+#include <linux/sh_clk.h>
-+#include <mach/common.h>
-+#include <mach/r8a73a4.h>
-+#include <asm/mach-types.h>
-+#include <asm/mach/arch.h>
-+
-+static const struct pinctrl_map ape6evm_pinctrl_map[] = {
-+	/* SCIFA0 console */
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a73a4",
-+				  "scifa0_data", "scifa0"),
-+};
-+
-+static void __init ape6evm_add_standard_devices(void)
-+{
-+
-+	struct clk *parent;
-+	struct clk *mp;
-+
-+	r8a73a4_clock_init();
-+
-+	/* MP clock parent = extal2 */
-+	parent      = clk_get(NULL, "extal2");
-+	mp          = clk_get(NULL, "mp");
-+	BUG_ON(IS_ERR(parent) || IS_ERR(mp));
-+
-+	clk_set_parent(mp, parent);
-+	clk_put(parent);
-+	clk_put(mp);
-+
-+	pinctrl_register_mappings(ape6evm_pinctrl_map,
-+				  ARRAY_SIZE(ape6evm_pinctrl_map));
-+	r8a73a4_pinmux_init();
-+	r8a73a4_add_dt_devices();
-+	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
-+}
-+
-+static const char *ape6evm_boards_compat_dt[] __initdata = {
-+	"renesas,ape6evm-reference",
-+	NULL,
-+};
-+
-+DT_MACHINE_START(APE6EVM_DT, "ape6evm")
-+	.init_early	= r8a73a4_init_delay,
-+	.init_time	= shmobile_timer_init,
-+	.init_machine	= ape6evm_add_standard_devices,
-+	.dt_compat	= ape6evm_boards_compat_dt,
-+MACHINE_END
-diff --git a/arch/arm/mach-shmobile/include/mach/r8a73a4.h b/arch/arm/mach-shmobile/include/mach/r8a73a4.h
-index 144a85e2..f3a9b702 100644
---- a/arch/arm/mach-shmobile/include/mach/r8a73a4.h
-+++ b/arch/arm/mach-shmobile/include/mach/r8a73a4.h
-@@ -2,6 +2,7 @@
- #define __ASM_R8A73A4_H__
- 
- void r8a73a4_add_standard_devices(void);
-+void r8a73a4_add_dt_devices(void);
- void r8a73a4_clock_init(void);
- void r8a73a4_pinmux_init(void);
- void r8a73a4_init_delay(void);
-diff --git a/arch/arm/mach-shmobile/setup-r8a73a4.c b/arch/arm/mach-shmobile/setup-r8a73a4.c
-index d533bd23..630ea4eb 100644
---- a/arch/arm/mach-shmobile/setup-r8a73a4.c
-+++ b/arch/arm/mach-shmobile/setup-r8a73a4.c
-@@ -188,7 +188,7 @@ static struct resource cmt10_resources[] = {
- 					  &cmt##idx##_platform_data,	\
- 					  sizeof(struct sh_timer_config))
- 
--void __init r8a73a4_add_standard_devices(void)
-+void __init r8a73a4_add_dt_devices(void)
- {
- 	r8a73a4_register_scif(SCIFA0);
- 	r8a73a4_register_scif(SCIFA1);
-@@ -196,10 +196,15 @@ void __init r8a73a4_add_standard_devices(void)
- 	r8a73a4_register_scif(SCIFB1);
- 	r8a73a4_register_scif(SCIFB2);
- 	r8a73a4_register_scif(SCIFB3);
-+	r8a7790_register_cmt(10);
-+}
-+
-+void __init r8a73a4_add_standard_devices(void)
-+{
-+	r8a73a4_add_dt_devices();
- 	r8a73a4_register_irqc(0);
- 	r8a73a4_register_irqc(1);
- 	r8a73a4_register_thermal();
--	r8a7790_register_cmt(10);
- }
- 
- void __init r8a73a4_init_delay(void)
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0364-ARM-shmobile-ape6evm-reference-add-CPUFreq-support.patch b/patches.renesas/0364-ARM-shmobile-ape6evm-reference-add-CPUFreq-support.patch
deleted file mode 100644
index 8ed9aec62ef90..0000000000000
--- a/patches.renesas/0364-ARM-shmobile-ape6evm-reference-add-CPUFreq-support.patch
+++ /dev/null
@@ -1,71 +0,0 @@
-From ffe4d831f81e1bbb396173ca2146bfb7fefcf562 Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Mon, 8 Jul 2013 18:04:58 +0200
-Subject: ARM: shmobile: ape6evm-reference: add CPUFreq support
-
-Add CPUFreq support to ape6evm-reference, using a max8973 regulator, that
-is supplying V_DVFS for the 4 CA15 cores on r8a73a4.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Acked-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit b88cf6f732946874aaf3e0528459e0f0271dfcec)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts  | 22 ++++++++++++++++++++++
- arch/arm/mach-shmobile/board-ape6evm-reference.c |  2 ++
- 2 files changed, 24 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts b/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts
-index 3251f059..6f4506e7 100644
---- a/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts
-+++ b/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts
-@@ -31,3 +31,25 @@
- 		ranges = <0 0 0 0x80000000>;
- 	};
- };
-+
-+&i2c5 {
-+	vdd_dvfs: max8973@1b {
-+		compatible = "maxim,max8973";
-+		reg = <0x1b>;
-+
-+		regulator-min-microvolt = <935000>;
-+		regulator-max-microvolt = <1200000>;
-+		regulator-boot-on;
-+		regulator-always-on;
-+	};
-+};
-+
-+&cpu0 {
-+	cpu0-supply = <&vdd_dvfs>;
-+	operating-points = <
-+		/* kHz  uV */
-+		1950000 1115000
-+		1462500  995000
-+	>;
-+	voltage-tolerance = <1>; /* 1% */
-+};
-diff --git a/arch/arm/mach-shmobile/board-ape6evm-reference.c b/arch/arm/mach-shmobile/board-ape6evm-reference.c
-index c8288749..46b41dec 100644
---- a/arch/arm/mach-shmobile/board-ape6evm-reference.c
-+++ b/arch/arm/mach-shmobile/board-ape6evm-reference.c
-@@ -22,6 +22,7 @@
- #include <linux/kernel.h>
- #include <linux/of_platform.h>
- #include <linux/pinctrl/machine.h>
-+#include <linux/platform_device.h>
- #include <linux/sh_clk.h>
- #include <mach/common.h>
- #include <mach/r8a73a4.h>
-@@ -56,6 +57,7 @@ static void __init ape6evm_add_standard_devices(void)
- 	r8a73a4_pinmux_init();
- 	r8a73a4_add_dt_devices();
- 	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
-+	platform_device_register_simple("cpufreq-cpu0", -1, NULL, 0);
- }
- 
- static const char *ape6evm_boards_compat_dt[] __initdata = {
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0365-ARM-shmobile-lager-Add-DT-reference.patch b/patches.renesas/0365-ARM-shmobile-lager-Add-DT-reference.patch
deleted file mode 100644
index 17dcab471a9ac..0000000000000
--- a/patches.renesas/0365-ARM-shmobile-lager-Add-DT-reference.patch
+++ /dev/null
@@ -1,223 +0,0 @@
-From 4e656ba16c58f61c6ef8942827a22d06a576f6c3 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Fri, 28 Jun 2013 13:42:16 +0900
-Subject: ARM: shmobile: lager: Add DT reference
-
-This is sufficient to allow boot of the Lager board with
-a console without boards-lager.c compiled into the kernel.
-This is an example of a minimal but still useful initialisation
-of the board using DT as much as possible.
-
-As such it is the same as the boot of Lager that can be achieved
-without a board file. The intention of adding this file
-is to facilitate further work to allow board specific devices to be
-initialised via DT.
-
-Acked-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 6dace67f9bd43cdfc2de3ff1a573420ecfc33390)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/Makefile                     |  1 +
- arch/arm/boot/dts/r8a7790-lager-reference.dts  | 31 +++++++++++++++++
- arch/arm/mach-shmobile/Kconfig                 | 11 ++++++
- arch/arm/mach-shmobile/Makefile                |  1 +
- arch/arm/mach-shmobile/Makefile.boot           |  1 +
- arch/arm/mach-shmobile/board-lager-reference.c | 46 ++++++++++++++++++++++++++
- arch/arm/mach-shmobile/include/mach/r8a7790.h  |  1 +
- arch/arm/mach-shmobile/setup-r8a7790.c         |  9 +++--
- 8 files changed, 99 insertions(+), 2 deletions(-)
- create mode 100644 arch/arm/boot/dts/r8a7790-lager-reference.dts
- create mode 100644 arch/arm/mach-shmobile/board-lager-reference.c
-
-diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
-index 1f8d1e4c..7c9fddc7 100644
---- a/arch/arm/boot/dts/Makefile
-+++ b/arch/arm/boot/dts/Makefile
-@@ -166,6 +166,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \
- 	r8a7740-armadillo800eva-reference.dtb \
- 	r8a7779-marzen-reference.dtb \
- 	r8a7790-lager.dtb \
-+	r8a7790-lager-reference.dtb \
- 	sh73a0-kzm9g.dtb \
- 	sh73a0-kzm9g-reference.dtb \
- 	r8a73a4-ape6evm.dtb \
-diff --git a/arch/arm/boot/dts/r8a7790-lager-reference.dts b/arch/arm/boot/dts/r8a7790-lager-reference.dts
-new file mode 100644
-index 00000000..fa5b81bd
---- /dev/null
-+++ b/arch/arm/boot/dts/r8a7790-lager-reference.dts
-@@ -0,0 +1,31 @@
-+/*
-+ * Device Tree Source for the Lager board
-+ *
-+ * Copyright (C) 2013 Renesas Solutions Corp.
-+ *
-+ * This file is licensed under the terms of the GNU General Public License
-+ * version 2.  This program is licensed "as is" without any warranty of any
-+ * kind, whether express or implied.
-+ */
-+
-+/dts-v1/;
-+/include/ "r8a7790.dtsi"
-+
-+/ {
-+	model = "Lager";
-+	compatible = "renesas,lager-reference", "renesas,r8a7790";
-+
-+	chosen {
-+		bootargs = "console=ttySC6,115200 ignore_loglevel";
-+	};
-+
-+	memory@40000000 {
-+		device_type = "memory";
-+		reg = <0 0x40000000 0 0x80000000>;
-+	};
-+
-+	lbsc {
-+		#address-cells = <1>;
-+		#size-cells = <1>;
-+	};
-+};
-diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
-index ad28f91b..05ea1031 100644
---- a/arch/arm/mach-shmobile/Kconfig
-+++ b/arch/arm/mach-shmobile/Kconfig
-@@ -161,6 +161,17 @@ config MACH_LAGER
- 	depends on ARCH_R8A7790
- 	select USE_OF
- 
-+config MACH_LAGER_REFERENCE
-+	bool "Lager board - Reference Device Tree Implementation"
-+	depends on ARCH_R8A7790
-+	select USE_OF
-+	---help---
-+	   Use reference implementation of Lager board support
-+	   which makes use of device tree at the expense
-+	   of not supporting a number of devices.
-+
-+	   This is intended to aid developers
-+
- config MACH_KZM9D
- 	bool "KZM9D board"
- 	depends on ARCH_EMEV2
-diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
-index 26a57842..397bb360 100644
---- a/arch/arm/mach-shmobile/Makefile
-+++ b/arch/arm/mach-shmobile/Makefile
-@@ -44,6 +44,7 @@ obj-$(CONFIG_MACH_BOCKW)	+= board-bockw.o
- obj-$(CONFIG_MACH_MARZEN)	+= board-marzen.o
- obj-$(CONFIG_MACH_MARZEN_REFERENCE)	+= board-marzen-reference.o
- obj-$(CONFIG_MACH_LAGER)	+= board-lager.o
-+obj-$(CONFIG_MACH_LAGER_REFERENCE)	+= board-lager-reference.o
- obj-$(CONFIG_MACH_ARMADILLO800EVA)	+= board-armadillo800eva.o
- obj-$(CONFIG_MACH_ARMADILLO800EVA_REFERENCE)	+= board-armadillo800eva-reference.o
- obj-$(CONFIG_MACH_KZM9D)	+= board-kzm9d.o
-diff --git a/arch/arm/mach-shmobile/Makefile.boot b/arch/arm/mach-shmobile/Makefile.boot
-index c938b58f..761d7b14 100644
---- a/arch/arm/mach-shmobile/Makefile.boot
-+++ b/arch/arm/mach-shmobile/Makefile.boot
-@@ -12,6 +12,7 @@ loadaddr-$(CONFIG_MACH_KZM9D_REFERENCE) += 0x40008000
- loadaddr-$(CONFIG_MACH_KZM9G) += 0x41008000
- loadaddr-$(CONFIG_MACH_KZM9G_REFERENCE) += 0x41008000
- loadaddr-$(CONFIG_MACH_LAGER) += 0x40008000
-+loadaddr-$(CONFIG_MACH_LAGER_REFERENCE) += 0x40008000
- loadaddr-$(CONFIG_MACH_MACKEREL) += 0x40008000
- loadaddr-$(CONFIG_MACH_MARZEN) += 0x60008000
- loadaddr-$(CONFIG_MACH_MARZEN_REFERENCE) += 0x60008000
-diff --git a/arch/arm/mach-shmobile/board-lager-reference.c b/arch/arm/mach-shmobile/board-lager-reference.c
-new file mode 100644
-index 00000000..eb6c55e1
---- /dev/null
-+++ b/arch/arm/mach-shmobile/board-lager-reference.c
-@@ -0,0 +1,46 @@
-+/*
-+ * Lager board support - Reference DT implementation
-+ *
-+ * Copyright (C) 2013  Renesas Solutions Corp.
-+ * Copyright (C) 2013  Simon Horman
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; version 2 of the License.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
-+ */
-+
-+#include <linux/init.h>
-+#include <linux/irqchip.h>
-+#include <linux/of_platform.h>
-+#include <mach/r8a7790.h>
-+#include <asm/mach/arch.h>
-+
-+void __init lager_add_standard_devices(void)
-+{
-+	/* clocks are setup late during boot in the case of DT */
-+	r8a7790_clock_init();
-+
-+	r8a7790_add_dt_devices();
-+        of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
-+}
-+
-+static const char *lager_boards_compat_dt[] __initdata = {
-+	"renesas,lager-reference",
-+	NULL,
-+};
-+
-+DT_MACHINE_START(LAGER_DT, "lager")
-+	.init_early	= r8a7790_init_delay,
-+	.init_machine	= lager_add_standard_devices,
-+	.init_time	= r8a7790_timer_init,
-+	.dt_compat	= lager_boards_compat_dt,
-+MACHINE_END
-diff --git a/arch/arm/mach-shmobile/include/mach/r8a7790.h b/arch/arm/mach-shmobile/include/mach/r8a7790.h
-index 7aaef409..788d5595 100644
---- a/arch/arm/mach-shmobile/include/mach/r8a7790.h
-+++ b/arch/arm/mach-shmobile/include/mach/r8a7790.h
-@@ -2,6 +2,7 @@
- #define __ASM_R8A7790_H__
- 
- void r8a7790_add_standard_devices(void);
-+void r8a7790_add_dt_devices(void);
- void r8a7790_clock_init(void);
- void r8a7790_pinmux_init(void);
- void r8a7790_init_delay(void);
-diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c
-index 4c96dad2..86cf507b 100644
---- a/arch/arm/mach-shmobile/setup-r8a7790.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7790.c
-@@ -179,7 +179,7 @@ static struct resource cmt00_resources[] = {
- 					  &cmt##idx##_platform_data,	\
- 					  sizeof(struct sh_timer_config))
- 
--void __init r8a7790_add_standard_devices(void)
-+void __init r8a7790_add_dt_devices(void)
- {
- 	r8a7790_register_scif(SCIFA0);
- 	r8a7790_register_scif(SCIFA1);
-@@ -191,9 +191,14 @@ void __init r8a7790_add_standard_devices(void)
- 	r8a7790_register_scif(SCIF1);
- 	r8a7790_register_scif(HSCIF0);
- 	r8a7790_register_scif(HSCIF1);
-+	r8a7790_register_cmt(00);
-+}
-+
-+void __init r8a7790_add_standard_devices(void)
-+{
-+	r8a7790_add_dt_devices();
- 	r8a7790_register_irqc(0);
- 	r8a7790_register_thermal();
--	r8a7790_register_cmt(00);
- }
- 
- #define MODEMR 0xe6160060
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0366-ARM-shmobile-Minor-update-for-the-Lager-DT-reference.patch b/patches.renesas/0366-ARM-shmobile-Minor-update-for-the-Lager-DT-reference.patch
deleted file mode 100644
index 7a9cfb20646da..0000000000000
--- a/patches.renesas/0366-ARM-shmobile-Minor-update-for-the-Lager-DT-reference.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 1c9ac4183c200e7c70ea26e90379f365387d0d2f Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Mon, 8 Jul 2013 15:16:46 +0900
-Subject: ARM: shmobile: Minor update for the Lager DT reference code
-
-Update the Lager DT reference code to get rid of the redundant
-irqchip header and also make lager_add_standard_devices() static.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit d144f3623ab37c8cd8365533217e9059d8eb4636)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-lager-reference.c | 3 +--
- 1 file changed, 1 insertion(+), 2 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-lager-reference.c b/arch/arm/mach-shmobile/board-lager-reference.c
-index eb6c55e1..9c316a1b 100644
---- a/arch/arm/mach-shmobile/board-lager-reference.c
-+++ b/arch/arm/mach-shmobile/board-lager-reference.c
-@@ -19,12 +19,11 @@
-  */
- 
- #include <linux/init.h>
--#include <linux/irqchip.h>
- #include <linux/of_platform.h>
- #include <mach/r8a7790.h>
- #include <asm/mach/arch.h>
- 
--void __init lager_add_standard_devices(void)
-+static void __init lager_add_standard_devices(void)
- {
- 	/* clocks are setup late during boot in the case of DT */
- 	r8a7790_clock_init();
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0367-ARM-shmobile-armadillo800eva-add-DMA-support-to-MMCI.patch b/patches.renesas/0367-ARM-shmobile-armadillo800eva-add-DMA-support-to-MMCI.patch
deleted file mode 100644
index af790f6277d65..0000000000000
--- a/patches.renesas/0367-ARM-shmobile-armadillo800eva-add-DMA-support-to-MMCI.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From 21816af89dcc9ebbf8c84bf02d0d89f1e69cbd43 Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Tue, 2 Jul 2013 17:24:58 +0200
-Subject: ARM: shmobile: armadillo800eva: add DMA support to MMCIF
-
-Add DMA slave IDs to MMCIF Tx and Rx channels.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 872842084c6f01d5f9d1a4c9b7e39a3d68d0630d)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-armadillo800eva.c | 2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c
-index 99cea1ee..701104c9 100644
---- a/arch/arm/mach-shmobile/board-armadillo800eva.c
-+++ b/arch/arm/mach-shmobile/board-armadillo800eva.c
-@@ -778,6 +778,8 @@ static struct sh_mmcif_plat_data sh_mmcif_plat = {
- 	.caps		= MMC_CAP_4_BIT_DATA |
- 			  MMC_CAP_8_BIT_DATA |
- 			  MMC_CAP_NONREMOVABLE,
-+	.slave_id_tx	= SHDMA_SLAVE_MMCIF_TX,
-+	.slave_id_rx	= SHDMA_SLAVE_MMCIF_RX,
- };
- 
- static struct resource sh_mmcif_resources[] = {
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0368-ARM-shmobile-lager-add-MMCIF-support.patch b/patches.renesas/0368-ARM-shmobile-lager-add-MMCIF-support.patch
deleted file mode 100644
index 175b4d274a17f..0000000000000
--- a/patches.renesas/0368-ARM-shmobile-lager-add-MMCIF-support.patch
+++ /dev/null
@@ -1,85 +0,0 @@
-From f270c5341eadccb0d9ae0cb074ecf02ce5bdbe3e Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Mon, 8 Jul 2013 17:54:43 +0200
-Subject: ARM: shmobile: lager: add MMCIF support
-
-Add support for the MMCIF1 interface on Lager.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 63d0539e5466e1c5765b9dfdffafd619d4115ba5)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-lager.c | 31 +++++++++++++++++++++++++++++++
- 1 file changed, 31 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
-index f89f1665..3a1a6fdc 100644
---- a/arch/arm/mach-shmobile/board-lager.c
-+++ b/arch/arm/mach-shmobile/board-lager.c
-@@ -24,10 +24,15 @@
- #include <linux/interrupt.h>
- #include <linux/kernel.h>
- #include <linux/leds.h>
-+#include <linux/mmc/host.h>
-+#include <linux/mmc/sh_mmcif.h>
- #include <linux/pinctrl/machine.h>
- #include <linux/platform_data/gpio-rcar.h>
- #include <linux/platform_device.h>
-+#include <linux/regulator/fixed.h>
-+#include <linux/regulator/machine.h>
- #include <mach/common.h>
-+#include <mach/irqs.h>
- #include <mach/r8a7790.h>
- #include <asm/mach-types.h>
- #include <asm/mach/arch.h>
-@@ -70,6 +75,22 @@ static __initdata struct gpio_keys_platform_data lager_keys_pdata = {
- 	.nbuttons	= ARRAY_SIZE(gpio_buttons),
- };
- 
-+/* Fixed 3.3V regulator to be used by MMCIF */
-+static struct regulator_consumer_supply fixed3v3_power_consumers[] =
-+{
-+	REGULATOR_SUPPLY("vmmc", "sh_mmcif.1"),
-+};
-+
-+/* MMCIF */
-+static struct sh_mmcif_plat_data mmcif1_pdata = {
-+	.caps		= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
-+};
-+
-+static struct resource mmcif1_resources[] = {
-+	DEFINE_RES_MEM_NAMED(0xee220000, 0x80, "MMCIF1"),
-+	DEFINE_RES_IRQ(gic_spi(170)),
-+};
-+
- static const struct pinctrl_map lager_pinctrl_map[] = {
- 	/* SCIF0 (CN19: DEBUG SERIAL0) */
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.6", "pfc-r8a7790",
-@@ -77,6 +98,11 @@ static const struct pinctrl_map lager_pinctrl_map[] = {
- 	/* SCIF1 (CN20: DEBUG SERIAL1) */
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.7", "pfc-r8a7790",
- 				  "scif1_data", "scif1"),
-+	/* MMCIF1 */
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.1", "pfc-r8a7790",
-+				  "mmc1_data8", "mmc1"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.1", "pfc-r8a7790",
-+				  "mmc1_ctrl", "mmc1"),
- };
- 
- static void __init lager_add_standard_devices(void)
-@@ -94,6 +120,11 @@ static void __init lager_add_standard_devices(void)
- 	platform_device_register_data(&platform_bus, "gpio-keys", -1,
- 				      &lager_keys_pdata,
- 				      sizeof(lager_keys_pdata));
-+	regulator_register_always_on(0, "fixed-3.3V", fixed3v3_power_consumers,
-+				     ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
-+	platform_device_register_resndata(&platform_bus, "sh_mmcif", 1,
-+					  mmcif1_resources, ARRAY_SIZE(mmcif1_resources),
-+					  &mmcif1_pdata, sizeof(mmcif1_pdata));
- }
- 
- static const char *lager_boards_compat_dt[] __initdata = {
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0369-ARM-shmobile-select-the-fixed-regulator-driver-on-Bo.patch b/patches.renesas/0369-ARM-shmobile-select-the-fixed-regulator-driver-on-Bo.patch
deleted file mode 100644
index cd471263b5d77..0000000000000
--- a/patches.renesas/0369-ARM-shmobile-select-the-fixed-regulator-driver-on-Bo.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From 636925d15a3633fc4be2a23748538cdd623bcde3 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Tue, 9 Jul 2013 02:07:13 -0700
-Subject: ARM: shmobile: select the fixed regulator driver on BockW
-
-34767f8dccc326026f97cd63f759dd36bd83502d
-(ARM: mach-shmobile: select the fixed regulator driver on several boards)
-decided to select fixed regulator driver on Kconfig.
-BockW follows same style.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-[horms+renesas@verge.net.au: Change mach-shmobile to shmobile in changelog]
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-(cherry picked from commit c9996e51e45df0630cf5493fa0359a257a191eee)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/Kconfig | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
-index 05ea1031..5ae27f21 100644
---- a/arch/arm/mach-shmobile/Kconfig
-+++ b/arch/arm/mach-shmobile/Kconfig
-@@ -135,6 +135,7 @@ config MACH_BOCKW
- 	depends on ARCH_R8A7778
- 	select ARCH_REQUIRE_GPIOLIB
- 	select RENESAS_INTC_IRQPIN
-+	select REGULATOR_FIXED_VOLTAGE if REGULATOR
- 	select USE_OF
- 
- config MACH_MARZEN
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0370-ARM-shmobile-fix-compile-error-when-CONFIG_THUMB2_KE.patch b/patches.renesas/0370-ARM-shmobile-fix-compile-error-when-CONFIG_THUMB2_KE.patch
deleted file mode 100644
index 8068d2d40b042..0000000000000
--- a/patches.renesas/0370-ARM-shmobile-fix-compile-error-when-CONFIG_THUMB2_KE.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From 52a6d690e864068808500eb47a2503b4c3bc8b80 Mon Sep 17 00:00:00 2001
-From: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
-Date: Wed, 10 Jul 2013 10:56:35 +0900
-Subject: ARM: shmobile: fix compile error when CONFIG_THUMB2_KERNEL=y
-
-On KZM-A9-GT board (SMP), when CONFIG_THUMB2_KERNEL=y it fails to compile
-
-  AS      arch/arm/mach-shmobile/headsmp-scu.o
-/proj/koba/kernel/arm-soc/arch/arm/mach-shmobile/headsmp-scu.S: Assembler messages:
-/proj/koba/kernel/arm-soc/arch/arm/mach-shmobile/headsmp-scu.S:41: Error: shift must be constant -- `bic r2,r2,r3,lsl r1'
-make[2]: *** [arch/arm/mach-shmobile/headsmp-scu.o] Error 1
-make[1]: *** [arch/arm/mach-shmobile] Error 2
-make: *** [sub-make] Error 2
-
-Instruction `bic r2,r2,r3,lsl r1' is not supported in thumb mode. This patch split it into 2 instructions.
-
-Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
-Acked-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit bdea6c657e15a709e666ea707e72327c555e8e04)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/headsmp-scu.S | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/headsmp-scu.S b/arch/arm/mach-shmobile/headsmp-scu.S
-index 6f986546..5ce416c0 100644
---- a/arch/arm/mach-shmobile/headsmp-scu.S
-+++ b/arch/arm/mach-shmobile/headsmp-scu.S
-@@ -38,7 +38,8 @@ ENTRY(shmobile_boot_scu)
- 	lsl	r1, r1, #3		@ we will shift by cpu_id * 8 bits
- 	ldr	r2, [r0, #8]		@ SCU Power Status Register
- 	mov	r3, #3
--	bic	r2, r2, r3, lsl r1	@ Clear bits of our CPU (Run Mode)
-+	lsl	r3, r3, r1
-+	bic	r2, r2, r3		@ Clear bits of our CPU (Run Mode)
- 	str	r2, [r0, #8]		@ write back
- 
- 	b	shmobile_invalidate_start
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0371-ARM-shmobile-Force-ARM-mode-to-compile-reset-vector-.patch b/patches.renesas/0371-ARM-shmobile-Force-ARM-mode-to-compile-reset-vector-.patch
deleted file mode 100644
index 8ee91fbdc4393..0000000000000
--- a/patches.renesas/0371-ARM-shmobile-Force-ARM-mode-to-compile-reset-vector-.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From 6f1dd5532f13e37764869c1c040fb327e2bb74e1 Mon Sep 17 00:00:00 2001
-From: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
-Date: Wed, 10 Jul 2013 10:56:36 +0900
-Subject: ARM: shmobile: Force ARM mode to compile reset vector for secondary
- CPUs
-
-Instructions start from boot vector must be ARM mode.
-This patch specify ARM mode explicitly and use 'bx' instruction to be
-able to change to Thumb mode.
-
-Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
-Acked-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit c1d7e2e80079148626e6c411e56708d86311d31a)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/headsmp.S | 5 ++++-
- 1 file changed, 4 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/headsmp.S b/arch/arm/mach-shmobile/headsmp.S
-index 559d1ce5..afed58e5 100644
---- a/arch/arm/mach-shmobile/headsmp.S
-+++ b/arch/arm/mach-shmobile/headsmp.S
-@@ -26,10 +26,13 @@ ENDPROC(shmobile_invalidate_start)
-  * This will be mapped at address 0 by SBAR register.
-  * We need _long_ jump to the physical address.
-  */
-+	.arm
- 	.align  12
- ENTRY(shmobile_boot_vector)
- 	ldr     r0, 2f
--	ldr     pc, 1f
-+	ldr     r1, 1f
-+	bx	r1
-+
- ENDPROC(shmobile_boot_vector)
- 
- 	.globl	shmobile_boot_fn
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0372-ARM-shmobile-Insert-align-directives-before-4-bytes-.patch b/patches.renesas/0372-ARM-shmobile-Insert-align-directives-before-4-bytes-.patch
deleted file mode 100644
index 2a04b7226b0b9..0000000000000
--- a/patches.renesas/0372-ARM-shmobile-Insert-align-directives-before-4-bytes-.patch
+++ /dev/null
@@ -1,66 +0,0 @@
-From 329755966b87202b0df59c1b8a9a04d500a31098 Mon Sep 17 00:00:00 2001
-From: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
-Date: Wed, 10 Jul 2013 10:56:37 +0900
-Subject: ARM: shmobile: Insert align directives before 4 bytes data
-
-In thumb2 mode instructions are not align to 4 byte. This patch insert
-align directives before putting 4 byte data.
-
-Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
-Acked-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 0b933cb305e7a987e0a711ee15457bd70055d682)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/headsmp-scu.S  | 1 +
- arch/arm/mach-shmobile/headsmp.S      | 1 +
- arch/arm/mach-shmobile/sleep-sh7372.S | 2 ++
- 3 files changed, 4 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/headsmp-scu.S b/arch/arm/mach-shmobile/headsmp-scu.S
-index 5ce416c0..0a77488d 100644
---- a/arch/arm/mach-shmobile/headsmp-scu.S
-+++ b/arch/arm/mach-shmobile/headsmp-scu.S
-@@ -46,6 +46,7 @@ ENTRY(shmobile_boot_scu)
- ENDPROC(shmobile_boot_scu)
- 
- 	.text
-+	.align	2
- 	.globl	shmobile_scu_base
- shmobile_scu_base:
- 	.space	4
-diff --git a/arch/arm/mach-shmobile/headsmp.S b/arch/arm/mach-shmobile/headsmp.S
-index afed58e5..dfb41dfc 100644
---- a/arch/arm/mach-shmobile/headsmp.S
-+++ b/arch/arm/mach-shmobile/headsmp.S
-@@ -35,6 +35,7 @@ ENTRY(shmobile_boot_vector)
- 
- ENDPROC(shmobile_boot_vector)
- 
-+	.align	2
- 	.globl	shmobile_boot_fn
- shmobile_boot_fn:
- 1:	.space	4
-diff --git a/arch/arm/mach-shmobile/sleep-sh7372.S b/arch/arm/mach-shmobile/sleep-sh7372.S
-index 53f4840e..97828628 100644
---- a/arch/arm/mach-shmobile/sleep-sh7372.S
-+++ b/arch/arm/mach-shmobile/sleep-sh7372.S
-@@ -41,6 +41,7 @@
- sh7372_resume_core_standby_sysc:
- 	ldr     pc, 1f
- 
-+	.align	2
- 	.globl	sh7372_cpu_resume
- sh7372_cpu_resume:
- 1:	.space	4
-@@ -96,6 +97,7 @@ sh7372_do_idle_sysc:
- 1:
- 	b      1b
- 
-+	.align	2
- kernel_flush:
- 	.word v7_flush_dcache_all
- #endif
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0373-ARM-shmobile-r8a7740-Fix-TPU-clock-name.patch b/patches.renesas/0373-ARM-shmobile-r8a7740-Fix-TPU-clock-name.patch
deleted file mode 100644
index bfafda680bab9..0000000000000
--- a/patches.renesas/0373-ARM-shmobile-r8a7740-Fix-TPU-clock-name.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From 9a15ea1be9a9c13413313c7036742c1736ff80b5 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 16 Jul 2013 12:32:04 +0200
-Subject: ARM: shmobile: r8a7740: Fix TPU clock name
-
-The TPU device is called renesas-tpu-pwm, not renesas_tpu_pwm. Fix the
-clock name accordingly.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 93d8a6fbe69a629a7bb37bb546699a5c49963dc5)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r8a7740.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c
-index 7fd32d60..f5b7bbe4 100644
---- a/arch/arm/mach-shmobile/clock-r8a7740.c
-+++ b/arch/arm/mach-shmobile/clock-r8a7740.c
-@@ -596,7 +596,7 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_DEV_ID("e6bd0000.mmcif",         &mstp_clks[MSTP312]),
- 	CLKDEV_DEV_ID("sh-eth",			&mstp_clks[MSTP309]),
- 	CLKDEV_DEV_ID("e9a00000.sh-eth",	&mstp_clks[MSTP309]),
--	CLKDEV_DEV_ID("renesas_tpu_pwm",	&mstp_clks[MSTP304]),
-+	CLKDEV_DEV_ID("renesas-tpu-pwm",	&mstp_clks[MSTP304]),
- 
- 	CLKDEV_DEV_ID("sh_mobile_sdhi.2",	&mstp_clks[MSTP415]),
- 	CLKDEV_DEV_ID("e6870000.sdhi",          &mstp_clks[MSTP415]),
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0374-ARM-shmobile-armadillo800eva-Add-backlight-support.patch b/patches.renesas/0374-ARM-shmobile-armadillo800eva-Add-backlight-support.patch
deleted file mode 100644
index 98fbff363f5d1..0000000000000
--- a/patches.renesas/0374-ARM-shmobile-armadillo800eva-Add-backlight-support.patch
+++ /dev/null
@@ -1,119 +0,0 @@
-From 2dcfe97aea7f6c061b4b0d3045d8c64feaaac1bb Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 16 Jul 2013 12:32:05 +0200
-Subject: ARM: shmobile: armadillo800eva: Add backlight support
-
-The flat panel backlight on the Armadillo 800 EVA board is driven by the
-TPU PWM output.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Tested-by: Simon Horman <horms@verge.net.au>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit d58226a21a7b84a3f82265821f24ce2aad267f1c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-armadillo800eva.c | 54 +++++++++++++++++++++++++-
- 1 file changed, 52 insertions(+), 2 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c
-index 701104c9..9bb74729 100644
---- a/arch/arm/mach-shmobile/board-armadillo800eva.c
-+++ b/arch/arm/mach-shmobile/board-armadillo800eva.c
-@@ -31,6 +31,8 @@
- #include <linux/gpio_keys.h>
- #include <linux/regulator/driver.h>
- #include <linux/pinctrl/machine.h>
-+#include <linux/platform_data/pwm-renesas-tpu.h>
-+#include <linux/pwm_backlight.h>
- #include <linux/regulator/fixed.h>
- #include <linux/regulator/gpio-regulator.h>
- #include <linux/regulator/machine.h>
-@@ -386,7 +388,50 @@ static struct platform_device sh_eth_device = {
- 	.num_resources = ARRAY_SIZE(sh_eth_resources),
- };
- 
--/* LCDC */
-+/* PWM */
-+static struct resource pwm_resources[] = {
-+	[0] = {
-+		.start = 0xe6600000,
-+		.end = 0xe66000ff,
-+		.flags = IORESOURCE_MEM,
-+	},
-+};
-+
-+static struct tpu_pwm_platform_data pwm_device_data = {
-+	.channels[2] = {
-+		.polarity = PWM_POLARITY_INVERSED,
-+	}
-+};
-+
-+static struct platform_device pwm_device = {
-+	.name = "renesas-tpu-pwm",
-+	.id = -1,
-+	.dev = {
-+		.platform_data = &pwm_device_data,
-+	},
-+	.num_resources = ARRAY_SIZE(pwm_resources),
-+	.resource = pwm_resources,
-+};
-+
-+static struct pwm_lookup pwm_lookup[] = {
-+	PWM_LOOKUP("renesas-tpu-pwm", 2, "pwm-backlight.0", NULL),
-+};
-+
-+/* LCDC and backlight */
-+static struct platform_pwm_backlight_data pwm_backlight_data = {
-+	.lth_brightness = 50,
-+	.max_brightness = 255,
-+	.dft_brightness = 255,
-+	.pwm_period_ns = 33333, /* 30kHz */
-+};
-+
-+static struct platform_device pwm_backlight_device = {
-+	.name = "pwm-backlight",
-+	.dev = {
-+		.platform_data = &pwm_backlight_data,
-+	},
-+};
-+
- static struct fb_videomode lcdc0_mode = {
- 	.name		= "AMPIER/AM-800480",
- 	.xres		= 800,
-@@ -1022,6 +1067,8 @@ static struct i2c_board_info i2c2_devices[] = {
-  */
- static struct platform_device *eva_devices[] __initdata = {
- 	&lcdc0_device,
-+	&pwm_device,
-+	&pwm_backlight_device,
- 	&gpio_keys_device,
- 	&sh_eth_device,
- 	&vcc_sdhi0,
-@@ -1093,6 +1140,9 @@ static const struct pinctrl_map eva_pinctrl_map[] = {
- 	/* ST1232 */
- 	PIN_MAP_MUX_GROUP_DEFAULT("0-0055", "pfc-r8a7740",
- 				  "intc_irq10", "intc"),
-+	/* TPU0 */
-+	PIN_MAP_MUX_GROUP_DEFAULT("renesas-tpu-pwm", "pfc-r8a7740",
-+				  "tpu0_to2_1", "tpu0"),
- 	/* USBHS */
- 	PIN_MAP_MUX_GROUP_DEFAULT("renesas_usbhs", "pfc-r8a7740",
- 				  "intc_irq7_1", "intc"),
-@@ -1146,13 +1196,13 @@ static void __init eva_init(void)
- 				     ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
- 
- 	pinctrl_register_mappings(eva_pinctrl_map, ARRAY_SIZE(eva_pinctrl_map));
-+	pwm_add_table(pwm_lookup, ARRAY_SIZE(pwm_lookup));
- 
- 	r8a7740_pinmux_init();
- 	r8a7740_meram_workaround();
- 
- 	/* LCDC0 */
- 	gpio_request_one(61, GPIOF_OUT_INIT_HIGH, NULL); /* LCDDON */
--	gpio_request_one(202, GPIOF_OUT_INIT_LOW, NULL); /* LCD0_LED_CONT */
- 
- 	/* GETHER */
- 	gpio_request_one(18, GPIOF_OUT_INIT_HIGH, NULL); /* PHY_RST */
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0375-ARM-shmobile-kota2-Use-leds-pwm-pwm-rmob.patch b/patches.renesas/0375-ARM-shmobile-kota2-Use-leds-pwm-pwm-rmob.patch
deleted file mode 100644
index 4ae838bcd9835..0000000000000
--- a/patches.renesas/0375-ARM-shmobile-kota2-Use-leds-pwm-pwm-rmob.patch
+++ /dev/null
@@ -1,302 +0,0 @@
-From 8fa9b9d29518469fd9d401be2888339b04259f77 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 16 Jul 2013 12:32:06 +0200
-Subject: ARM: shmobile: kota2: Use leds-pwm + pwm-rmob
-
-Instead of using the LED-specific TPU PWM driver, switch to the generic
-TPU PWM driver with leds-pwm.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit b885966f61b349baccf5c8c266f03407cfcea5ea)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-kota2.c  | 169 +++++++++++++++++-----------------
- arch/arm/mach-shmobile/clock-sh73a0.c |  12 ++-
- 2 files changed, 90 insertions(+), 91 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-kota2.c b/arch/arm/mach-shmobile/board-kota2.c
-index ef5ca0ef..6af20d90 100644
---- a/arch/arm/mach-shmobile/board-kota2.c
-+++ b/arch/arm/mach-shmobile/board-kota2.c
-@@ -26,6 +26,7 @@
- #include <linux/irq.h>
- #include <linux/pinctrl/machine.h>
- #include <linux/pinctrl/pinconf-generic.h>
-+#include <linux/platform_data/pwm-renesas-tpu.h>
- #include <linux/platform_device.h>
- #include <linux/delay.h>
- #include <linux/io.h>
-@@ -37,8 +38,8 @@
- #include <linux/input/sh_keysc.h>
- #include <linux/gpio_keys.h>
- #include <linux/leds.h>
-+#include <linux/leds_pwm.h>
- #include <linux/irqchip/arm-gic.h>
--#include <linux/platform_data/leds-renesas-tpu.h>
- #include <linux/mmc/host.h>
- #include <linux/mmc/sh_mmcif.h>
- #include <linux/mfd/tmio.h>
-@@ -186,116 +187,100 @@ static struct platform_device gpio_leds_device = {
- };
- 
- /* TPU LED */
--static struct led_renesas_tpu_config led_renesas_tpu12_pdata = {
--	.name		= "V2513",
--	.pin_gpio_fn	= GPIO_FN_TPU1TO2,
--	.pin_gpio	= 153,
--	.channel_offset = 0x90,
--	.timer_bit = 2,
--	.max_brightness = 1000,
--};
--
--static struct resource tpu12_resources[] = {
-+static struct resource tpu1_pwm_resources[] = {
- 	[0] = {
--		.name	= "TPU12",
--		.start	= 0xe6610090,
--		.end	= 0xe66100b5,
-+		.start	= 0xe6610000,
-+		.end	= 0xe66100ff,
- 		.flags	= IORESOURCE_MEM,
- 	},
- };
- 
--static struct platform_device leds_tpu12_device = {
--	.name = "leds-renesas-tpu",
--	.id = 12,
--	.dev = {
--		.platform_data  = &led_renesas_tpu12_pdata,
--	},
--	.num_resources	= ARRAY_SIZE(tpu12_resources),
--	.resource	= tpu12_resources,
-+static struct platform_device tpu1_pwm_device = {
-+	.name = "renesas-tpu-pwm",
-+	.id = 1,
-+	.num_resources	= ARRAY_SIZE(tpu1_pwm_resources),
-+	.resource	= tpu1_pwm_resources,
- };
- 
--static struct led_renesas_tpu_config led_renesas_tpu41_pdata = {
--	.name		= "V2514",
--	.pin_gpio_fn	= GPIO_FN_TPU4TO1,
--	.pin_gpio	= 199,
--	.channel_offset = 0x50,
--	.timer_bit = 1,
--	.max_brightness = 1000,
--};
--
--static struct resource tpu41_resources[] = {
-+static struct resource tpu2_pwm_resources[] = {
- 	[0] = {
--		.name	= "TPU41",
--		.start	= 0xe6640050,
--		.end	= 0xe6640075,
-+		.start	= 0xe6620000,
-+		.end	= 0xe66200ff,
- 		.flags	= IORESOURCE_MEM,
- 	},
- };
- 
--static struct platform_device leds_tpu41_device = {
--	.name = "leds-renesas-tpu",
--	.id = 41,
--	.dev = {
--		.platform_data  = &led_renesas_tpu41_pdata,
-+static struct platform_device tpu2_pwm_device = {
-+	.name = "renesas-tpu-pwm",
-+	.id = 2,
-+	.num_resources	= ARRAY_SIZE(tpu2_pwm_resources),
-+	.resource	= tpu2_pwm_resources,
-+};
-+
-+static struct resource tpu3_pwm_resources[] = {
-+	[0] = {
-+		.start	= 0xe6630000,
-+		.end	= 0xe66300ff,
-+		.flags	= IORESOURCE_MEM,
- 	},
--	.num_resources	= ARRAY_SIZE(tpu41_resources),
--	.resource	= tpu41_resources,
- };
- 
--static struct led_renesas_tpu_config led_renesas_tpu21_pdata = {
--	.name		= "V2515",
--	.pin_gpio_fn	= GPIO_FN_TPU2TO1,
--	.pin_gpio	= 197,
--	.channel_offset = 0x50,
--	.timer_bit = 1,
--	.max_brightness = 1000,
-+static struct platform_device tpu3_pwm_device = {
-+	.name = "renesas-tpu-pwm",
-+	.id = 3,
-+	.num_resources	= ARRAY_SIZE(tpu3_pwm_resources),
-+	.resource	= tpu3_pwm_resources,
- };
- 
--static struct resource tpu21_resources[] = {
-+static struct resource tpu4_pwm_resources[] = {
- 	[0] = {
--		.name	= "TPU21",
--		.start	= 0xe6620050,
--		.end	= 0xe6620075,
-+		.start	= 0xe6640000,
-+		.end	= 0xe66400ff,
- 		.flags	= IORESOURCE_MEM,
- 	},
- };
- 
--static struct platform_device leds_tpu21_device = {
--	.name = "leds-renesas-tpu",
--	.id = 21,
--	.dev = {
--		.platform_data  = &led_renesas_tpu21_pdata,
-+static struct platform_device tpu4_pwm_device = {
-+	.name = "renesas-tpu-pwm",
-+	.id = 4,
-+	.num_resources	= ARRAY_SIZE(tpu4_pwm_resources),
-+	.resource	= tpu4_pwm_resources,
-+};
-+
-+static struct pwm_lookup pwm_lookup[] = {
-+	PWM_LOOKUP("renesas-tpu-pwm.1", 2, "leds-pwm.0", "V2513"),
-+	PWM_LOOKUP("renesas-tpu-pwm.2", 1, "leds-pwm.0", "V2515"),
-+	PWM_LOOKUP("renesas-tpu-pwm.3", 0, "leds-pwm.0", "KEYLED"),
-+	PWM_LOOKUP("renesas-tpu-pwm.4", 1, "leds-pwm.0", "V2514"),
-+};
-+
-+static struct led_pwm tpu_pwm_leds[] = {
-+	{
-+		.name		= "V2513",
-+		.max_brightness	= 1000,
-+	}, {
-+		.name		= "V2515",
-+		.max_brightness	= 1000,
-+	}, {
-+		.name		= "KEYLED",
-+		.max_brightness	= 1000,
-+	}, {
-+		.name		= "V2514",
-+		.max_brightness	= 1000,
- 	},
--	.num_resources	= ARRAY_SIZE(tpu21_resources),
--	.resource	= tpu21_resources,
- };
- 
--static struct led_renesas_tpu_config led_renesas_tpu30_pdata = {
--	.name		= "KEYLED",
--	.pin_gpio_fn	= GPIO_FN_TPU3TO0,
--	.pin_gpio	= 163,
--	.channel_offset = 0x10,
--	.timer_bit = 0,
--	.max_brightness = 1000,
-+static struct led_pwm_platform_data leds_pwm_pdata = {
-+	.num_leds = ARRAY_SIZE(tpu_pwm_leds),
-+	.leds = tpu_pwm_leds,
- };
- 
--static struct resource tpu30_resources[] = {
--	[0] = {
--		.name	= "TPU30",
--		.start	= 0xe6630010,
--		.end	= 0xe6630035,
--		.flags	= IORESOURCE_MEM,
--	},
--};
--
--static struct platform_device leds_tpu30_device = {
--	.name = "leds-renesas-tpu",
--	.id = 30,
-+static struct platform_device leds_pwm_device = {
-+	.name = "leds-pwm",
-+	.id = 0,
- 	.dev = {
--		.platform_data  = &led_renesas_tpu30_pdata,
-+		.platform_data = &leds_pwm_pdata,
- 	},
--	.num_resources	= ARRAY_SIZE(tpu30_resources),
--	.resource	= tpu30_resources,
- };
- 
- /* Fixed 1.8V regulator to be used by MMCIF */
-@@ -426,10 +411,11 @@ static struct platform_device *kota2_devices[] __initdata = {
- 	&keysc_device,
- 	&gpio_keys_device,
- 	&gpio_leds_device,
--	&leds_tpu12_device,
--	&leds_tpu41_device,
--	&leds_tpu21_device,
--	&leds_tpu30_device,
-+	&tpu1_pwm_device,
-+	&tpu2_pwm_device,
-+	&tpu3_pwm_device,
-+	&tpu4_pwm_device,
-+	&leds_pwm_device,
- 	&mmcif_device,
- 	&sdhi0_device,
- 	&sdhi1_device,
-@@ -512,6 +498,15 @@ static const struct pinctrl_map kota2_pinctrl_map[] = {
- 				  "bsc_cs5_a", "bsc"),
- 	PIN_MAP_MUX_GROUP_DEFAULT("smsc911x.0", "pfc-sh73a0",
- 				  "bsc_we0", "bsc"),
-+	/* TPU */
-+	PIN_MAP_MUX_GROUP_DEFAULT("renesas-tpu-pwm.1", "pfc-sh73a0",
-+				  "tpu1_to2", "tpu1"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("renesas-tpu-pwm.2", "pfc-sh73a0",
-+				  "tpu2_to1", "tpu2"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("renesas-tpu-pwm.3", "pfc-sh73a0",
-+				  "tpu3_to0", "tpu3"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("renesas-tpu-pwm.4", "pfc-sh73a0",
-+				  "tpu4_to1", "tpu4"),
- };
- 
- static void __init kota2_init(void)
-@@ -524,6 +519,8 @@ static void __init kota2_init(void)
- 
- 	pinctrl_register_mappings(kota2_pinctrl_map,
- 				  ARRAY_SIZE(kota2_pinctrl_map));
-+	pwm_add_table(pwm_lookup, ARRAY_SIZE(pwm_lookup));
-+
- 	sh73a0_pinmux_init();
- 
- 	/* SMSC911X */
-diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c
-index d9fd0336..1942eaef 100644
---- a/arch/arm/mach-shmobile/clock-sh73a0.c
-+++ b/arch/arm/mach-shmobile/clock-sh73a0.c
-@@ -555,7 +555,7 @@ enum { MSTP001,
- 	MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,
- 	MSTP331, MSTP329, MSTP328, MSTP325, MSTP323, MSTP322,
- 	MSTP314, MSTP313, MSTP312, MSTP311,
--	MSTP303, MSTP302, MSTP301, MSTP300,
-+	MSTP304, MSTP303, MSTP302, MSTP301, MSTP300,
- 	MSTP411, MSTP410, MSTP403,
- 	MSTP_NR };
- 
-@@ -593,6 +593,7 @@ static struct clk mstp_clks[MSTP_NR] = {
- 	[MSTP313] = MSTP(&div6_clks[DIV6_SDHI1], SMSTPCR3, 13, 0), /* SDHI1 */
- 	[MSTP312] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 12, 0), /* MMCIF0 */
- 	[MSTP311] = MSTP(&div6_clks[DIV6_SDHI2], SMSTPCR3, 11, 0), /* SDHI2 */
-+	[MSTP304] = MSTP(&main_div2_clk, SMSTPCR3, 4, 0), /* TPU0 */
- 	[MSTP303] = MSTP(&main_div2_clk, SMSTPCR3, 3, 0), /* TPU1 */
- 	[MSTP302] = MSTP(&main_div2_clk, SMSTPCR3, 2, 0), /* TPU2 */
- 	[MSTP301] = MSTP(&main_div2_clk, SMSTPCR3, 1, 0), /* TPU3 */
-@@ -669,10 +670,11 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_DEV_ID("e6bd0000.mmcif", &mstp_clks[MSTP312]), /* MMCIF0 */
- 	CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP311]), /* SDHI2 */
- 	CLKDEV_DEV_ID("ee140000.sdhi", &mstp_clks[MSTP311]), /* SDHI2 */
--	CLKDEV_DEV_ID("leds-renesas-tpu.12", &mstp_clks[MSTP303]), /* TPU1 */
--	CLKDEV_DEV_ID("leds-renesas-tpu.21", &mstp_clks[MSTP302]), /* TPU2 */
--	CLKDEV_DEV_ID("leds-renesas-tpu.30", &mstp_clks[MSTP301]), /* TPU3 */
--	CLKDEV_DEV_ID("leds-renesas-tpu.41", &mstp_clks[MSTP300]), /* TPU4 */
-+	CLKDEV_DEV_ID("renesas-tpu-pwm.0", &mstp_clks[MSTP304]), /* TPU0 */
-+	CLKDEV_DEV_ID("renesas-tpu-pwm.1", &mstp_clks[MSTP303]), /* TPU1 */
-+	CLKDEV_DEV_ID("renesas-tpu-pwm.2", &mstp_clks[MSTP302]), /* TPU2 */
-+	CLKDEV_DEV_ID("renesas-tpu-pwm.3", &mstp_clks[MSTP301]), /* TPU3 */
-+	CLKDEV_DEV_ID("renesas-tpu-pwm.4", &mstp_clks[MSTP300]), /* TPU4 */
- 	CLKDEV_DEV_ID("i2c-sh_mobile.3", &mstp_clks[MSTP411]), /* I2C3 */
- 	CLKDEV_DEV_ID("e6826000.i2c", &mstp_clks[MSTP411]), /* I2C3 */
- 	CLKDEV_DEV_ID("i2c-sh_mobile.4", &mstp_clks[MSTP410]), /* I2C4 */
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0376-ARM-shmobile-sh73a0-Remove-all-GPIOs.patch b/patches.renesas/0376-ARM-shmobile-sh73a0-Remove-all-GPIOs.patch
deleted file mode 100644
index 8de0376213068..0000000000000
--- a/patches.renesas/0376-ARM-shmobile-sh73a0-Remove-all-GPIOs.patch
+++ /dev/null
@@ -1,403 +0,0 @@
-From 7724b0e8f9f3c1e3826db8d9d205e8bbbe3ed730 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 16 Jul 2013 12:32:07 +0200
-Subject: ARM: shmobile: sh73a0: Remove all GPIOs
-
-Function GPIOs are not used anymore, and all code use the GPIO numbers
-directly. Remove the GPIOs enumeration.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit e6909dcedb55b8790f5b79599987d84eea5888b1)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/include/mach/sh73a0.h | 373 +--------------------------
- 1 file changed, 1 insertion(+), 372 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/include/mach/sh73a0.h b/arch/arm/mach-shmobile/include/mach/sh73a0.h
-index eb7a4320..680dc5f1 100644
---- a/arch/arm/mach-shmobile/include/mach/sh73a0.h
-+++ b/arch/arm/mach-shmobile/include/mach/sh73a0.h
-@@ -1,378 +1,7 @@
- #ifndef __ASM_SH73A0_H__
- #define __ASM_SH73A0_H__
- 
--/* Pin Function Controller:
-- * GPIO_FN_xx - GPIO used to select pin function and MSEL switch
-- * GPIO_PORTxx - GPIO mapped to real I/O pin on CPU
-- */
--enum {
--	/* Hardware manual Table 25-1 (GPIO) */
--	GPIO_PORT0, GPIO_PORT1, GPIO_PORT2, GPIO_PORT3, GPIO_PORT4,
--	GPIO_PORT5, GPIO_PORT6, GPIO_PORT7, GPIO_PORT8, GPIO_PORT9,
--
--	GPIO_PORT10, GPIO_PORT11, GPIO_PORT12, GPIO_PORT13, GPIO_PORT14,
--	GPIO_PORT15, GPIO_PORT16, GPIO_PORT17, GPIO_PORT18, GPIO_PORT19,
--
--	GPIO_PORT20, GPIO_PORT21, GPIO_PORT22, GPIO_PORT23, GPIO_PORT24,
--	GPIO_PORT25, GPIO_PORT26, GPIO_PORT27, GPIO_PORT28, GPIO_PORT29,
--
--	GPIO_PORT30, GPIO_PORT31, GPIO_PORT32, GPIO_PORT33, GPIO_PORT34,
--	GPIO_PORT35, GPIO_PORT36, GPIO_PORT37, GPIO_PORT38, GPIO_PORT39,
--
--	GPIO_PORT40, GPIO_PORT41, GPIO_PORT42, GPIO_PORT43, GPIO_PORT44,
--	GPIO_PORT45, GPIO_PORT46, GPIO_PORT47, GPIO_PORT48, GPIO_PORT49,
--
--	GPIO_PORT50, GPIO_PORT51, GPIO_PORT52, GPIO_PORT53, GPIO_PORT54,
--	GPIO_PORT55, GPIO_PORT56, GPIO_PORT57, GPIO_PORT58, GPIO_PORT59,
--
--	GPIO_PORT60, GPIO_PORT61, GPIO_PORT62, GPIO_PORT63, GPIO_PORT64,
--	GPIO_PORT65, GPIO_PORT66, GPIO_PORT67, GPIO_PORT68, GPIO_PORT69,
--
--	GPIO_PORT70, GPIO_PORT71, GPIO_PORT72, GPIO_PORT73, GPIO_PORT74,
--	GPIO_PORT75, GPIO_PORT76, GPIO_PORT77, GPIO_PORT78, GPIO_PORT79,
--
--	GPIO_PORT80, GPIO_PORT81, GPIO_PORT82, GPIO_PORT83, GPIO_PORT84,
--	GPIO_PORT85, GPIO_PORT86, GPIO_PORT87, GPIO_PORT88, GPIO_PORT89,
--
--	GPIO_PORT90, GPIO_PORT91, GPIO_PORT92, GPIO_PORT93, GPIO_PORT94,
--	GPIO_PORT95, GPIO_PORT96, GPIO_PORT97, GPIO_PORT98, GPIO_PORT99,
--
--	GPIO_PORT100, GPIO_PORT101, GPIO_PORT102, GPIO_PORT103, GPIO_PORT104,
--	GPIO_PORT105, GPIO_PORT106, GPIO_PORT107, GPIO_PORT108, GPIO_PORT109,
--
--	GPIO_PORT110, GPIO_PORT111, GPIO_PORT112, GPIO_PORT113, GPIO_PORT114,
--	GPIO_PORT115, GPIO_PORT116, GPIO_PORT117, GPIO_PORT118,
--
--	GPIO_PORT128, GPIO_PORT129,
--
--	GPIO_PORT130, GPIO_PORT131, GPIO_PORT132, GPIO_PORT133, GPIO_PORT134,
--	GPIO_PORT135, GPIO_PORT136, GPIO_PORT137, GPIO_PORT138, GPIO_PORT139,
--
--	GPIO_PORT140, GPIO_PORT141, GPIO_PORT142, GPIO_PORT143, GPIO_PORT144,
--	GPIO_PORT145, GPIO_PORT146, GPIO_PORT147, GPIO_PORT148, GPIO_PORT149,
--
--	GPIO_PORT150, GPIO_PORT151, GPIO_PORT152, GPIO_PORT153, GPIO_PORT154,
--	GPIO_PORT155, GPIO_PORT156, GPIO_PORT157, GPIO_PORT158, GPIO_PORT159,
--
--	GPIO_PORT160, GPIO_PORT161, GPIO_PORT162, GPIO_PORT163, GPIO_PORT164,
--
--	GPIO_PORT192, GPIO_PORT193, GPIO_PORT194,
--	GPIO_PORT195, GPIO_PORT196, GPIO_PORT197, GPIO_PORT198, GPIO_PORT199,
--
--	GPIO_PORT200, GPIO_PORT201, GPIO_PORT202, GPIO_PORT203, GPIO_PORT204,
--	GPIO_PORT205, GPIO_PORT206, GPIO_PORT207, GPIO_PORT208, GPIO_PORT209,
--
--	GPIO_PORT210, GPIO_PORT211, GPIO_PORT212, GPIO_PORT213, GPIO_PORT214,
--	GPIO_PORT215, GPIO_PORT216, GPIO_PORT217, GPIO_PORT218, GPIO_PORT219,
--
--	GPIO_PORT220, GPIO_PORT221, GPIO_PORT222, GPIO_PORT223, GPIO_PORT224,
--	GPIO_PORT225, GPIO_PORT226, GPIO_PORT227, GPIO_PORT228, GPIO_PORT229,
--
--	GPIO_PORT230, GPIO_PORT231, GPIO_PORT232, GPIO_PORT233, GPIO_PORT234,
--	GPIO_PORT235, GPIO_PORT236, GPIO_PORT237, GPIO_PORT238, GPIO_PORT239,
--
--	GPIO_PORT240, GPIO_PORT241, GPIO_PORT242, GPIO_PORT243, GPIO_PORT244,
--	GPIO_PORT245, GPIO_PORT246, GPIO_PORT247, GPIO_PORT248, GPIO_PORT249,
--
--	GPIO_PORT250, GPIO_PORT251, GPIO_PORT252, GPIO_PORT253, GPIO_PORT254,
--	GPIO_PORT255, GPIO_PORT256, GPIO_PORT257, GPIO_PORT258, GPIO_PORT259,
--
--	GPIO_PORT260, GPIO_PORT261, GPIO_PORT262, GPIO_PORT263, GPIO_PORT264,
--	GPIO_PORT265, GPIO_PORT266, GPIO_PORT267, GPIO_PORT268, GPIO_PORT269,
--
--	GPIO_PORT270, GPIO_PORT271, GPIO_PORT272, GPIO_PORT273, GPIO_PORT274,
--	GPIO_PORT275, GPIO_PORT276, GPIO_PORT277, GPIO_PORT278, GPIO_PORT279,
--
--	GPIO_PORT280, GPIO_PORT281, GPIO_PORT282,
--
--	GPIO_PORT288, GPIO_PORT289,
--
--	GPIO_PORT290, GPIO_PORT291, GPIO_PORT292, GPIO_PORT293, GPIO_PORT294,
--	GPIO_PORT295, GPIO_PORT296, GPIO_PORT297, GPIO_PORT298, GPIO_PORT299,
--
--	GPIO_PORT300, GPIO_PORT301, GPIO_PORT302, GPIO_PORT303, GPIO_PORT304,
--	GPIO_PORT305, GPIO_PORT306, GPIO_PORT307, GPIO_PORT308, GPIO_PORT309,
--
--	/* Table 25-1 (Function 0-7) */
--	GPIO_FN_GPI0 = 310,
--	GPIO_FN_GPI1,
--	GPIO_FN_GPI2,
--	GPIO_FN_GPI3,
--	GPIO_FN_GPI4,
--	GPIO_FN_GPI5,
--	GPIO_FN_GPI6,
--	GPIO_FN_GPI7,
--	GPIO_FN_GPO7, GPIO_FN_MFG0_OUT2,
--	GPIO_FN_GPO6, GPIO_FN_MFG1_OUT2,
--	GPIO_FN_GPO5,
--	GPIO_FN_PORT16_VIO_CKOR,
--	GPIO_FN_PORT19_VIO_CKO2,
--	GPIO_FN_GPO0,
--	GPIO_FN_GPO1,
--	GPIO_FN_GPO2, GPIO_FN_STATUS0,
--	GPIO_FN_GPO3, GPIO_FN_STATUS1,
--	GPIO_FN_GPO4, GPIO_FN_STATUS2,
--	GPIO_FN_VINT,
--	GPIO_FN_TCKON,
--	GPIO_FN_XDVFS1,
--	GPIO_FN_MFG0_OUT1, GPIO_FN_PORT27_IROUT,
--	GPIO_FN_XDVFS2,
--	GPIO_FN_PORT28_TPU1TO1,
--	GPIO_FN_SIM_RST, GPIO_FN_PORT29_TPU1TO1,
--	GPIO_FN_SIM_CLK, GPIO_FN_PORT30_VIO_CKOR,
--	GPIO_FN_SIM_D, GPIO_FN_PORT31_IROUT,
--	GPIO_FN_XWUP,
--	GPIO_FN_VACK,
--	GPIO_FN_XTAL1L,
--	GPIO_FN_PORT49_IROUT,
--	GPIO_FN_BBIF2_TSYNC2, GPIO_FN_TPU2TO2,
--
--	GPIO_FN_BBIF2_TSCK2, GPIO_FN_TPU2TO3,
--	GPIO_FN_BBIF2_TXD2,
--	GPIO_FN_TPU3TO3,
--	GPIO_FN_TPU3TO2,
--	GPIO_FN_TPU0TO0,
--	GPIO_FN_A0, GPIO_FN_BS_,
--	GPIO_FN_A12, GPIO_FN_TPU4TO2,
--	GPIO_FN_A13, GPIO_FN_TPU0TO1,
--	GPIO_FN_A14,
--	GPIO_FN_A15,
--	GPIO_FN_A16, GPIO_FN_MSIOF0_SS1,
--	GPIO_FN_A17, GPIO_FN_MSIOF0_TSYNC,
--	GPIO_FN_A18, GPIO_FN_MSIOF0_TSCK,
--	GPIO_FN_A19, GPIO_FN_MSIOF0_TXD,
--	GPIO_FN_A20, GPIO_FN_MSIOF0_RSCK,
--	GPIO_FN_A21, GPIO_FN_MSIOF0_RSYNC,
--	GPIO_FN_A22, GPIO_FN_MSIOF0_MCK0,
--	GPIO_FN_A23, GPIO_FN_MSIOF0_MCK1,
--	GPIO_FN_A24, GPIO_FN_MSIOF0_RXD,
--	GPIO_FN_A25, GPIO_FN_MSIOF0_SS2,
--	GPIO_FN_A26,
--	GPIO_FN_FCE1_,
--	GPIO_FN_DACK0,
--	GPIO_FN_FCE0_,
--	GPIO_FN_WAIT_, GPIO_FN_DREQ0,
--	GPIO_FN_FRB,
--	GPIO_FN_CKO,
--	GPIO_FN_NBRSTOUT_,
--	GPIO_FN_NBRST_,
--	GPIO_FN_BBIF2_TXD,
--	GPIO_FN_BBIF2_RXD,
--	GPIO_FN_BBIF2_SYNC,
--	GPIO_FN_BBIF2_SCK,
--	GPIO_FN_MFG3_IN2,
--	GPIO_FN_MFG3_IN1,
--	GPIO_FN_BBIF1_SS2, GPIO_FN_MFG3_OUT1,
--	GPIO_FN_HSI_RX_DATA, GPIO_FN_BBIF1_RXD,
--	GPIO_FN_HSI_TX_WAKE, GPIO_FN_BBIF1_TSCK,
--	GPIO_FN_HSI_TX_DATA, GPIO_FN_BBIF1_TSYNC,
--	GPIO_FN_HSI_TX_READY, GPIO_FN_BBIF1_TXD,
--	GPIO_FN_HSI_RX_READY, GPIO_FN_BBIF1_RSCK,
--	GPIO_FN_HSI_RX_WAKE, GPIO_FN_BBIF1_RSYNC,
--	GPIO_FN_HSI_RX_FLAG, GPIO_FN_BBIF1_SS1, GPIO_FN_BBIF1_FLOW,
--	GPIO_FN_HSI_TX_FLAG,
--	GPIO_FN_VIO_VD, GPIO_FN_VIO2_VD,
--
--	GPIO_FN_VIO_HD,
--	GPIO_FN_VIO2_HD,
--	GPIO_FN_VIO_D0, GPIO_FN_PORT130_MSIOF2_RXD,
--	GPIO_FN_VIO_D1, GPIO_FN_PORT131_MSIOF2_SS1,
--	GPIO_FN_VIO_D2, GPIO_FN_PORT132_MSIOF2_SS2,
--	GPIO_FN_VIO_D3, GPIO_FN_MSIOF2_TSYNC,
--	GPIO_FN_VIO_D4, GPIO_FN_MSIOF2_TXD,
--	GPIO_FN_VIO_D5, GPIO_FN_MSIOF2_TSCK,
--	GPIO_FN_VIO_D6,
--	GPIO_FN_VIO_D7,
--	GPIO_FN_VIO_D8, GPIO_FN_VIO2_D0,
--	GPIO_FN_VIO_D9, GPIO_FN_VIO2_D1,
--	GPIO_FN_VIO_D10, GPIO_FN_TPU0TO2, GPIO_FN_VIO2_D2,
--	GPIO_FN_VIO_D11, GPIO_FN_TPU0TO3, GPIO_FN_VIO2_D3,
--	GPIO_FN_VIO_D12, GPIO_FN_VIO2_D4,
--	GPIO_FN_VIO_D13,
--	GPIO_FN_VIO2_D5,
--	GPIO_FN_VIO_D14, GPIO_FN_VIO2_D6,
--	GPIO_FN_VIO_D15, GPIO_FN_TPU1TO3,
--	GPIO_FN_VIO2_D7,
--	GPIO_FN_VIO_CLK,
--	GPIO_FN_VIO2_CLK,
--	GPIO_FN_VIO_FIELD, GPIO_FN_VIO2_FIELD,
--	GPIO_FN_VIO_CKO,
--	GPIO_FN_A27, GPIO_FN_MFG0_IN1,
--	GPIO_FN_MFG0_IN2,
--	GPIO_FN_TS_SPSYNC3, GPIO_FN_MSIOF2_RSCK,
--	GPIO_FN_TS_SDAT3, GPIO_FN_MSIOF2_RSYNC,
--	GPIO_FN_TPU1TO2, GPIO_FN_TS_SDEN3, GPIO_FN_PORT153_MSIOF2_SS1,
--	GPIO_FN_MSIOF2_MCK0,
--	GPIO_FN_MSIOF2_MCK1,
--	GPIO_FN_PORT156_MSIOF2_SS2,
--	GPIO_FN_PORT157_MSIOF2_RXD,
--	GPIO_FN_DINT_, GPIO_FN_TS_SCK3,
--	GPIO_FN_NMI,
--	GPIO_FN_TPU3TO0,
--	GPIO_FN_BBIF2_TSYNC1,
--	GPIO_FN_BBIF2_TSCK1,
--	GPIO_FN_BBIF2_TXD1,
--	GPIO_FN_MFG2_OUT2,
--	GPIO_FN_TPU2TO1,
--	GPIO_FN_TPU4TO1, GPIO_FN_MFG4_OUT2,
--	GPIO_FN_D16,
--	GPIO_FN_D17,
--	GPIO_FN_D18,
--	GPIO_FN_D19,
--	GPIO_FN_D20,
--	GPIO_FN_D21,
--	GPIO_FN_D22,
--	GPIO_FN_PORT207_MSIOF0L_SS1, GPIO_FN_D23,
--	GPIO_FN_PORT208_MSIOF0L_SS2, GPIO_FN_D24,
--	GPIO_FN_D25,
--	GPIO_FN_DREQ2, GPIO_FN_PORT210_MSIOF0L_SS1, GPIO_FN_D26,
--	GPIO_FN_PORT211_MSIOF0L_SS2, GPIO_FN_D27,
--	GPIO_FN_TS_SPSYNC1, GPIO_FN_MSIOF0L_MCK0, GPIO_FN_D28,
--	GPIO_FN_TS_SDAT1, GPIO_FN_MSIOF0L_MCK1, GPIO_FN_D29,
--	GPIO_FN_TS_SDEN1, GPIO_FN_MSIOF0L_RSCK, GPIO_FN_D30,
--	GPIO_FN_TS_SCK1, GPIO_FN_MSIOF0L_RSYNC, GPIO_FN_D31,
--	GPIO_FN_DACK2,
--	GPIO_FN_MSIOF0L_TSYNC, GPIO_FN_VIO2_FIELD3,
--	GPIO_FN_DACK3,
--	GPIO_FN_PORT218_VIO_CKOR,
--	GPIO_FN_DREQ3, GPIO_FN_MSIOF0L_TSCK, GPIO_FN_VIO2_CLK3, \
--	GPIO_FN_DREQ1,
--	GPIO_FN_PWEN, GPIO_FN_MSIOF0L_RXD, GPIO_FN_VIO2_HD3, \
--	GPIO_FN_DACK1, GPIO_FN_OVCN,
--	GPIO_FN_MSIOF0L_TXD, GPIO_FN_VIO2_VD3,
--
--	GPIO_FN_OVCN2,
--	GPIO_FN_EXTLP, GPIO_FN_PORT226_VIO_CKO2,
--	GPIO_FN_IDIN,
--	GPIO_FN_MFG1_IN1,
--	GPIO_FN_MSIOF1_TXD,
--	GPIO_FN_MSIOF1_TSYNC,
--	GPIO_FN_MSIOF1_TSCK,
--	GPIO_FN_MSIOF1_RXD,
--	GPIO_FN_MSIOF1_RSCK, GPIO_FN_VIO2_CLK2,
--	GPIO_FN_MSIOF1_RSYNC, GPIO_FN_MFG1_IN2, GPIO_FN_VIO2_VD2, \
--	GPIO_FN_MSIOF1_MCK0,
--	GPIO_FN_MSIOF1_MCK1,
--	GPIO_FN_MSIOF1_SS1, GPIO_FN_VIO2_FIELD2,
--	GPIO_FN_MSIOF1_SS2, GPIO_FN_VIO2_HD2,
--	GPIO_FN_PORT241_IROUT, GPIO_FN_MFG4_OUT1, \
--	GPIO_FN_TPU4TO0,
--	GPIO_FN_MFG4_IN2,
--	GPIO_FN_PORT243_VIO_CKO2,
--	GPIO_FN_MFG2_IN1,
--	GPIO_FN_MSIOF2R_RXD,
--	GPIO_FN_MFG2_IN2,
--	GPIO_FN_MSIOF2R_TXD,
--	GPIO_FN_MFG1_OUT1,
--	GPIO_FN_TPU1TO0,
--	GPIO_FN_MFG3_OUT2,
--	GPIO_FN_TPU3TO1,
--	GPIO_FN_MFG2_OUT1,
--	GPIO_FN_TPU2TO0,
--	GPIO_FN_MSIOF2R_TSCK,
--	GPIO_FN_PORT249_IROUT, GPIO_FN_MFG4_IN1, \
--	GPIO_FN_MSIOF2R_TSYNC,
--	GPIO_FN_SDHICLK0,
--	GPIO_FN_SDHICD0,
--	GPIO_FN_SDHID0_0,
--	GPIO_FN_SDHID0_1,
--	GPIO_FN_SDHID0_2,
--	GPIO_FN_SDHID0_3,
--	GPIO_FN_SDHICMD0,
--	GPIO_FN_SDHIWP0,
--	GPIO_FN_SDHICLK1,
--	GPIO_FN_SDHID1_0, GPIO_FN_TS_SPSYNC2,
--	GPIO_FN_SDHID1_1, GPIO_FN_TS_SDAT2,
--	GPIO_FN_SDHID1_2, GPIO_FN_TS_SDEN2,
--	GPIO_FN_SDHID1_3, GPIO_FN_TS_SCK2,
--	GPIO_FN_SDHICMD1,
--	GPIO_FN_SDHICLK2,
--	GPIO_FN_SDHID2_0, GPIO_FN_TS_SPSYNC4,
--	GPIO_FN_SDHID2_1, GPIO_FN_TS_SDAT4,
--	GPIO_FN_SDHID2_2, GPIO_FN_TS_SDEN4,
--	GPIO_FN_SDHID2_3, GPIO_FN_TS_SCK4,
--	GPIO_FN_SDHICMD2,
--	GPIO_FN_MMCCLK0,
--	GPIO_FN_MMCD0_0,
--	GPIO_FN_MMCD0_1,
--	GPIO_FN_MMCD0_2,
--	GPIO_FN_MMCD0_3,
--	GPIO_FN_MMCD0_4, GPIO_FN_TS_SPSYNC5,
--	GPIO_FN_MMCD0_5, GPIO_FN_TS_SDAT5,
--	GPIO_FN_MMCD0_6, GPIO_FN_TS_SDEN5,
--	GPIO_FN_MMCD0_7, GPIO_FN_TS_SCK5,
--	GPIO_FN_MMCCMD0,
--	GPIO_FN_RESETOUTS_, GPIO_FN_EXTAL2OUT,
--	GPIO_FN_MCP_WAIT__MCP_FRB,
--	GPIO_FN_MCP_CKO, GPIO_FN_MMCCLK1,
--	GPIO_FN_MCP_D15_MCP_NAF15,
--	GPIO_FN_MCP_D14_MCP_NAF14,
--	GPIO_FN_MCP_D13_MCP_NAF13,
--	GPIO_FN_MCP_D12_MCP_NAF12,
--	GPIO_FN_MCP_D11_MCP_NAF11,
--	GPIO_FN_MCP_D10_MCP_NAF10,
--	GPIO_FN_MCP_D9_MCP_NAF9,
--	GPIO_FN_MCP_D8_MCP_NAF8, GPIO_FN_MMCCMD1,
--	GPIO_FN_MCP_D7_MCP_NAF7, GPIO_FN_MMCD1_7,
--
--	GPIO_FN_MCP_D6_MCP_NAF6, GPIO_FN_MMCD1_6,
--	GPIO_FN_MCP_D5_MCP_NAF5, GPIO_FN_MMCD1_5,
--	GPIO_FN_MCP_D4_MCP_NAF4, GPIO_FN_MMCD1_4,
--	GPIO_FN_MCP_D3_MCP_NAF3, GPIO_FN_MMCD1_3,
--	GPIO_FN_MCP_D2_MCP_NAF2, GPIO_FN_MMCD1_2,
--	GPIO_FN_MCP_D1_MCP_NAF1, GPIO_FN_MMCD1_1,
--	GPIO_FN_MCP_D0_MCP_NAF0, GPIO_FN_MMCD1_0,
--	GPIO_FN_MCP_NBRSTOUT_,
--	GPIO_FN_MCP_WE0__MCP_FWE, GPIO_FN_MCP_RDWR_MCP_FWE,
--
--	/* MSEL2 special case */
--	GPIO_FN_TSIF2_TS_XX1,
--	GPIO_FN_TSIF2_TS_XX2,
--	GPIO_FN_TSIF2_TS_XX3,
--	GPIO_FN_TSIF2_TS_XX4,
--	GPIO_FN_TSIF2_TS_XX5,
--	GPIO_FN_TSIF1_TS_XX1,
--	GPIO_FN_TSIF1_TS_XX2,
--	GPIO_FN_TSIF1_TS_XX3,
--	GPIO_FN_TSIF1_TS_XX4,
--	GPIO_FN_TSIF1_TS_XX5,
--	GPIO_FN_TSIF0_TS_XX1,
--	GPIO_FN_TSIF0_TS_XX2,
--	GPIO_FN_TSIF0_TS_XX3,
--	GPIO_FN_TSIF0_TS_XX4,
--	GPIO_FN_TSIF0_TS_XX5,
--	GPIO_FN_MST1_TS_XX1,
--	GPIO_FN_MST1_TS_XX2,
--	GPIO_FN_MST1_TS_XX3,
--	GPIO_FN_MST1_TS_XX4,
--	GPIO_FN_MST1_TS_XX5,
--	GPIO_FN_MST0_TS_XX1,
--	GPIO_FN_MST0_TS_XX2,
--	GPIO_FN_MST0_TS_XX3,
--	GPIO_FN_MST0_TS_XX4,
--	GPIO_FN_MST0_TS_XX5,
--
--	/* MSEL3 special cases */
--	GPIO_FN_SDHI0_VCCQ_MC0_ON,
--	GPIO_FN_SDHI0_VCCQ_MC0_OFF,
--	GPIO_FN_DEBUG_MON_VIO,
--	GPIO_FN_DEBUG_MON_LCDD,
--	GPIO_FN_LCDC_LCDC0,
--	GPIO_FN_LCDC_LCDC1,
--
--	/* MSEL4 special cases */
--	GPIO_FN_IRQ9_MEM_INT,
--	GPIO_FN_IRQ9_MCP_INT,
--	GPIO_FN_A11,
--	GPIO_FN_TPU4TO3,
--	GPIO_FN_RESETA_N_PU_ON,
--	GPIO_FN_RESETA_N_PU_OFF,
--	GPIO_FN_EDBGREQ_PD,
--	GPIO_FN_EDBGREQ_PU,
--
--	/* end of GPIO */
--	GPIO_NR,
--};
-+#define GPIO_NR			310
- 
- /* DMA slave IDs */
- enum {
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0377-ARM-shmobile-r8a73a4-Add-pin-control-device-to-devic.patch b/patches.renesas/0377-ARM-shmobile-r8a73a4-Add-pin-control-device-to-devic.patch
deleted file mode 100644
index 78895e984b302..0000000000000
--- a/patches.renesas/0377-ARM-shmobile-r8a73a4-Add-pin-control-device-to-devic.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From 19c094af67dc56268d8961d19056fb3cf8fef0ed Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 9 May 2013 15:05:57 +0200
-Subject: ARM: shmobile: r8a73a4: Add pin control device to device tree
-
-Add a pfc node to the r8a73a4 device tree.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-[g.liakhovetski+renesas@gmail.com use 2 nodes for address and size]
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-(cherry picked from commit 803d319cb2fb41e646669061b45701f3ea78e611)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-	arch/arm/boot/dts/r8a73a4.dtsi
----
- arch/arm/boot/dts/r8a73a4.dtsi | 7 +++++++
- 1 file changed, 7 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a73a4.dtsi b/arch/arm/boot/dts/r8a73a4.dtsi
-index 6ce699be..6c26caa8 100644
---- a/arch/arm/boot/dts/r8a73a4.dtsi
-+++ b/arch/arm/boot/dts/r8a73a4.dtsi
-@@ -185,6 +185,13 @@
- 		status = "disabled";
- 	};
- 
-+	pfc: pfc@e6050000 {
-+		compatible = "renesas,pfc-r8a73a4";
-+		reg = <0 0xe6050000 0 0x9000>;
-+		gpio-controller;
-+		#gpio-cells = <2>;
-+	};
-+
- 	sdhi0: sdhi@ee100000 {
- 		compatible = "renesas,r8a73a4-sdhi";
- 		reg = <0 0xee100000 0 0x100>;
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0378-ARM-shmobile-r8a7740-Add-pin-control-device-to-devic.patch b/patches.renesas/0378-ARM-shmobile-r8a7740-Add-pin-control-device-to-devic.patch
deleted file mode 100644
index d110fb5fb2b45..0000000000000
--- a/patches.renesas/0378-ARM-shmobile-r8a7740-Add-pin-control-device-to-devic.patch
+++ /dev/null
@@ -1,80 +0,0 @@
-From 2bc32d05a584a7b8675f2445c1275b9b29f94f2b Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 20 Nov 2012 14:02:54 +0100
-Subject: ARM: shmobile: r8a7740: Add pin control device to device tree
-
-Add a pfc node to the r8a7740 device tree and remove manual pinmux
-initialization from the corresponding board files.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit f36218d25f2388775a06b6091d881b7a45b7595f)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7740.dtsi                           |  8 ++++++++
- arch/arm/mach-shmobile/board-armadillo800eva-reference.c | 16 ++++++++--------
- 2 files changed, 16 insertions(+), 8 deletions(-)
-
-diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi
-index 24e93064..e18a195b 100644
---- a/arch/arm/boot/dts/r8a7740.dtsi
-+++ b/arch/arm/boot/dts/r8a7740.dtsi
-@@ -139,4 +139,12 @@
- 			      0 72 0x4
- 			      0 73 0x4>;
- 	};
-+
-+	pfc: pfc@e6050000 {
-+		compatible = "renesas,pfc-r8a7740";
-+		reg = <0xe6050000 0x8000>,
-+		      <0xe605800c 0x20>;
-+		gpio-controller;
-+		#gpio-cells = <2>;
-+	};
- };
-diff --git a/arch/arm/mach-shmobile/board-armadillo800eva-reference.c b/arch/arm/mach-shmobile/board-armadillo800eva-reference.c
-index 03b85fec..f25b6aab 100644
---- a/arch/arm/mach-shmobile/board-armadillo800eva-reference.c
-+++ b/arch/arm/mach-shmobile/board-armadillo800eva-reference.c
-@@ -121,7 +121,7 @@
- 
- static const struct pinctrl_map eva_pinctrl_map[] = {
- 	/* SCIFA1 */
--	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.1", "pfc-r8a7740",
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.1", "e6050000.pfc",
- 				  "scifa1_data", "scifa1"),
- };
- 
-@@ -170,22 +170,22 @@ static void __init eva_init(void)
- 	eva_clock_init();
- 
- 	pinctrl_register_mappings(eva_pinctrl_map, ARRAY_SIZE(eva_pinctrl_map));
--	r8a7740_pinmux_init();
- 
- 	r8a7740_meram_workaround();
- 
--	/*
--	 * Touchscreen
--	 * TODO: Move reset GPIO over to .dts when we can reference it
--	 */
--	gpio_request_one(166, GPIOF_OUT_INIT_HIGH, NULL); /* TP_RST_B */
--
- #ifdef CONFIG_CACHE_L2X0
- 	/* Early BRESP enable, Shared attribute override enable, 32K*8way */
- 	l2x0_init(IOMEM(0xf0002000), 0x40440000, 0x82000fff);
- #endif
- 
- 	r8a7740_add_standard_devices_dt();
-+
-+	/*
-+	 * Touchscreen
-+	 * TODO: Move reset GPIO over to .dts when we can reference it
-+	 */
-+	gpio_request_one(166, GPIOF_OUT_INIT_HIGH, NULL); /* TP_RST_B */
-+
- 	r8a7740_pm_init();
- }
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0379-ARM-shmobile-r8a7778-Add-pin-control-device-to-devic.patch b/patches.renesas/0379-ARM-shmobile-r8a7778-Add-pin-control-device-to-devic.patch
deleted file mode 100644
index 70fbf07b5a857..0000000000000
--- a/patches.renesas/0379-ARM-shmobile-r8a7778-Add-pin-control-device-to-devic.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From c245ba45297170a5bcd8e6acfc0089fa71ab653e Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 9 May 2013 15:05:57 +0200
-Subject: ARM: shmobile: r8a7778: Add pin control device to device tree
-
-Add a pfc node to the r8a7778 device tree.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 0697ccc05473083cb9e1cdf16cd1f425f0f9395f)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7778.dtsi | 5 +++++
- 1 file changed, 5 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi
-index 47437355..c8dbf148 100644
---- a/arch/arm/boot/dts/r8a7778.dtsi
-+++ b/arch/arm/boot/dts/r8a7778.dtsi
-@@ -32,4 +32,9 @@
- 		reg = <0xfe438000 0x1000>,
- 		      <0xfe430000 0x100>;
- 	};
-+
-+	pfc: pfc@fffc0000 {
-+		compatible = "renesas,pfc-r8a7778";
-+		reg = <0xfffc000 0x118>;
-+	};
- };
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0380-ARM-shmobile-r8a7778-Add-GPIO-controller-devices-to-.patch b/patches.renesas/0380-ARM-shmobile-r8a7778-Add-GPIO-controller-devices-to-.patch
deleted file mode 100644
index f171b1ca2b720..0000000000000
--- a/patches.renesas/0380-ARM-shmobile-r8a7778-Add-GPIO-controller-devices-to-.patch
+++ /dev/null
@@ -1,92 +0,0 @@
-From 7a973614a011511d43ea63fe33a7a4f3114178f9 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 10 May 2013 15:51:14 +0200
-Subject: ARM: shmobile: r8a7778: Add GPIO controller devices to device tree
-
-Add GPIO controller nodes to the r8a7778 core device tree.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit aaf7eda80cb8371bbf26d7171241cfb94b787b0f)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7778.dtsi | 61 ++++++++++++++++++++++++++++++++++++++++++
- 1 file changed, 61 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi
-index c8dbf148..45ac404a 100644
---- a/arch/arm/boot/dts/r8a7778.dtsi
-+++ b/arch/arm/boot/dts/r8a7778.dtsi
-@@ -33,8 +33,69 @@
- 		      <0xfe430000 0x100>;
- 	};
- 
-+	gpio0: gpio@ffc40000 {
-+		compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
-+		reg = <0xffc40000 0x2c>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 103 0x4>;
-+		#gpio-cells = <2>;
-+		gpio-controller;
-+		gpio-ranges = <&pfc 0 0 32>;
-+		#interrupt-cells = <2>;
-+		interrupt-controller;
-+	};
-+
-+	gpio1: gpio@ffc41000 {
-+		compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
-+		reg = <0xffc41000 0x2c>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 103 0x4>;
-+		#gpio-cells = <2>;
-+		gpio-controller;
-+		gpio-ranges = <&pfc 0 32 32>;
-+		#interrupt-cells = <2>;
-+		interrupt-controller;
-+	};
-+
-+	gpio2: gpio@ffc42000 {
-+		compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
-+		reg = <0xffc42000 0x2c>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 103 0x4>;
-+		#gpio-cells = <2>;
-+		gpio-controller;
-+		gpio-ranges = <&pfc 0 64 32>;
-+		#interrupt-cells = <2>;
-+		interrupt-controller;
-+	};
-+
-+	gpio3: gpio@ffc43000 {
-+		compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
-+		reg = <0xffc43000 0x2c>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 103 0x4>;
-+		#gpio-cells = <2>;
-+		gpio-controller;
-+		gpio-ranges = <&pfc 0 96 32>;
-+		#interrupt-cells = <2>;
-+		interrupt-controller;
-+	};
-+
-+	gpio4: gpio@ffc44000 {
-+		compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
-+		reg = <0xffc44000 0x2c>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 103 0x4>;
-+		#gpio-cells = <2>;
-+		gpio-controller;
-+		gpio-ranges = <&pfc 0 128 27>;
-+		#interrupt-cells = <2>;
-+		interrupt-controller;
-+	};
-+
- 	pfc: pfc@fffc0000 {
- 		compatible = "renesas,pfc-r8a7778";
- 		reg = <0xfffc000 0x118>;
-+		#gpio-range-cells = <3>;
- 	};
- };
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0381-ARM-shmobile-r8a7779-Add-pin-control-device-to-devic.patch b/patches.renesas/0381-ARM-shmobile-r8a7779-Add-pin-control-device-to-devic.patch
deleted file mode 100644
index 82ab0c2a37a8a..0000000000000
--- a/patches.renesas/0381-ARM-shmobile-r8a7779-Add-pin-control-device-to-devic.patch
+++ /dev/null
@@ -1,81 +0,0 @@
-From 89da1f26fca254c66b79499c6f40aab8edab274b Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 9 May 2013 15:05:57 +0200
-Subject: ARM: shmobile: r8a7779: Add pin control device to device tree
-
-Add a pfc node to the r8a7779 device tree and remove manual pinmux
-initialization from the corresponding board files.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 3ab03d01a989e4d77ed6ba0bc8c2efd9211df7c8)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7779.dtsi                  |  5 +++++
- arch/arm/mach-shmobile/board-marzen-reference.c | 17 ++++++++---------
- 2 files changed, 13 insertions(+), 9 deletions(-)
-
-diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi
-index 7f146c6b..9dfc4384 100644
---- a/arch/arm/boot/dts/r8a7779.dtsi
-+++ b/arch/arm/boot/dts/r8a7779.dtsi
-@@ -101,6 +101,11 @@
- 		interrupts = <0 81 0x4>;
- 	};
- 
-+	pfc: pfc@fffc0000 {
-+		compatible = "renesas,pfc-r8a7779";
-+		reg = <0xfffc0000 0x23c>;
-+	};
-+
- 	thermal@ffc48000 {
- 		compatible = "renesas,rcar-thermal";
- 		reg = <0xffc48000 0x38>;
-diff --git a/arch/arm/mach-shmobile/board-marzen-reference.c b/arch/arm/mach-shmobile/board-marzen-reference.c
-index 480d882e..94804f3c 100644
---- a/arch/arm/mach-shmobile/board-marzen-reference.c
-+++ b/arch/arm/mach-shmobile/board-marzen-reference.c
-@@ -28,24 +28,24 @@
- 
- static const struct pinctrl_map marzen_pinctrl_map[] = {
- 	/* SCIF2 (CN18: DEBUG0) */
--	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.2", "pfc-r8a7779",
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.2", "fffc0000.pfc",
- 				  "scif2_data_c", "scif2"),
- 	/* SCIF4 (CN19: DEBUG1) */
--	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.4", "pfc-r8a7779",
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.4", "fffc0000.pfc",
- 				  "scif4_data", "scif4"),
- 	/* SDHI0 */
--	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7779",
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "fffc0000.pfc",
- 				  "sdhi0_data4", "sdhi0"),
--	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7779",
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "fffc0000.pfc",
- 				  "sdhi0_ctrl", "sdhi0"),
--	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7779",
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "fffc0000.pfc",
- 				  "sdhi0_cd", "sdhi0"),
--	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7779",
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "fffc0000.pfc",
- 				  "sdhi0_wp", "sdhi0"),
- 	/* SMSC */
--	PIN_MAP_MUX_GROUP_DEFAULT("smsc911x", "pfc-r8a7779",
-+	PIN_MAP_MUX_GROUP_DEFAULT("smsc911x", "fffc0000.pfc",
- 				  "intc_irq1_b", "intc"),
--	PIN_MAP_MUX_GROUP_DEFAULT("smsc911x", "pfc-r8a7779",
-+	PIN_MAP_MUX_GROUP_DEFAULT("smsc911x", "fffc0000.pfc",
- 				  "lbsc_ex_cs0", "lbsc"),
- };
- 
-@@ -53,7 +53,6 @@ static void __init marzen_init(void)
- {
- 	pinctrl_register_mappings(marzen_pinctrl_map,
- 				  ARRAY_SIZE(marzen_pinctrl_map));
--	r8a7779_pinmux_init();
- 
- 	r8a7779_add_standard_devices_dt();
- }
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0382-ARM-shmobile-r8a7779-Add-GPIO-controller-devices-to-.patch b/patches.renesas/0382-ARM-shmobile-r8a7779-Add-GPIO-controller-devices-to-.patch
deleted file mode 100644
index b5cb7de73fe87..0000000000000
--- a/patches.renesas/0382-ARM-shmobile-r8a7779-Add-GPIO-controller-devices-to-.patch
+++ /dev/null
@@ -1,121 +0,0 @@
-From 715096510f91ca13452eac4757466a900add4aac Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 10 May 2013 15:51:14 +0200
-Subject: ARM: shmobile: r8a7779: Add GPIO controller devices to device tree
-
-Add GPIO controller nodes to the r8a7779 core device tree.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit f5c771b5610b4c0d4daf9729aa03539ef1779a92)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7779.dtsi | 85 ++++++++++++++++++++++++++++++++++++++++++
- 1 file changed, 85 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi
-index 9dfc4384..e9fbe3d5 100644
---- a/arch/arm/boot/dts/r8a7779.dtsi
-+++ b/arch/arm/boot/dts/r8a7779.dtsi
-@@ -48,6 +48,90 @@
-                       <0xf0000100 0x100>;
-         };
- 
-+	gpio0: gpio@ffc40000 {
-+		compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
-+		reg = <0xffc40000 0x2c>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 141 0x4>;
-+		#gpio-cells = <2>;
-+		gpio-controller;
-+		gpio-ranges = <&pfc 0 0 32>;
-+		#interrupt-cells = <2>;
-+		interrupt-controller;
-+	};
-+
-+	gpio1: gpio@ffc41000 {
-+		compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
-+		reg = <0xffc41000 0x2c>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 142 0x4>;
-+		#gpio-cells = <2>;
-+		gpio-controller;
-+		gpio-ranges = <&pfc 0 32 32>;
-+		#interrupt-cells = <2>;
-+		interrupt-controller;
-+	};
-+
-+	gpio2: gpio@ffc42000 {
-+		compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
-+		reg = <0xffc42000 0x2c>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 143 0x4>;
-+		#gpio-cells = <2>;
-+		gpio-controller;
-+		gpio-ranges = <&pfc 0 64 32>;
-+		#interrupt-cells = <2>;
-+		interrupt-controller;
-+	};
-+
-+	gpio3: gpio@ffc43000 {
-+		compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
-+		reg = <0xffc43000 0x2c>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 144 0x4>;
-+		#gpio-cells = <2>;
-+		gpio-controller;
-+		gpio-ranges = <&pfc 0 96 32>;
-+		#interrupt-cells = <2>;
-+		interrupt-controller;
-+	};
-+
-+	gpio4: gpio@ffc44000 {
-+		compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
-+		reg = <0xffc44000 0x2c>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 145 0x4>;
-+		#gpio-cells = <2>;
-+		gpio-controller;
-+		gpio-ranges = <&pfc 0 128 32>;
-+		#interrupt-cells = <2>;
-+		interrupt-controller;
-+	};
-+
-+	gpio5: gpio@ffc45000 {
-+		compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
-+		reg = <0xffc45000 0x2c>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 146 0x4>;
-+		#gpio-cells = <2>;
-+		gpio-controller;
-+		gpio-ranges = <&pfc 0 160 32>;
-+		#interrupt-cells = <2>;
-+		interrupt-controller;
-+	};
-+
-+	gpio6: gpio@ffc46000 {
-+		compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
-+		reg = <0xffc46000 0x2c>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 147 0x4>;
-+		#gpio-cells = <2>;
-+		gpio-controller;
-+		gpio-ranges = <&pfc 0 192 9>;
-+		#interrupt-cells = <2>;
-+		interrupt-controller;
-+	};
-+
- 	irqpin0: irqpin@fe780010 {
- 		compatible = "renesas,intc-irqpin";
- 		#interrupt-cells = <2>;
-@@ -104,6 +188,7 @@
- 	pfc: pfc@fffc0000 {
- 		compatible = "renesas,pfc-r8a7779";
- 		reg = <0xfffc0000 0x23c>;
-+		#gpio-range-cells = <3>;
- 	};
- 
- 	thermal@ffc48000 {
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0383-ARM-shmobile-r8a7790-Add-pin-control-device-to-devic.patch b/patches.renesas/0383-ARM-shmobile-r8a7790-Add-pin-control-device-to-devic.patch
deleted file mode 100644
index 019fb366555ac..0000000000000
--- a/patches.renesas/0383-ARM-shmobile-r8a7790-Add-pin-control-device-to-devic.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 60180ae7107aaf7d87d6fff5b52070f3e3f88492 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 9 May 2013 15:05:57 +0200
-Subject: ARM: shmobile: r8a7790: Add pin control device to device tree
-
-Add a pfc node to the r8a7790 device tree.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 9694c778048e006604c3fbade6b0aefa5dd0b516)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-	arch/arm/boot/dts/r8a7790.dtsi
----
- arch/arm/boot/dts/r8a7790.dtsi | 5 +++++
- 1 file changed, 5 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
-index 9cd88202..bfe93128 100644
---- a/arch/arm/boot/dts/r8a7790.dtsi
-+++ b/arch/arm/boot/dts/r8a7790.dtsi
-@@ -73,6 +73,11 @@
- 		status = "disabled";
- 	};
- 
-+	pfc: pfc@e6060000 {
-+		compatible = "renesas,pfc-r8a7790";
-+		reg = <0 0xe6060000 0 0x250>;
-+	};
-+
- 	sdhi0: sdhi@ee100000 {
- 		compatible = "renesas,r8a7790-sdhi";
- 		reg = <0 0xee100000 0 0x100>;
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0384-ARM-shmobile-r8a7790-Add-GPIO-controller-devices-to-.patch b/patches.renesas/0384-ARM-shmobile-r8a7790-Add-GPIO-controller-devices-to-.patch
deleted file mode 100644
index b36dfeaba251a..0000000000000
--- a/patches.renesas/0384-ARM-shmobile-r8a7790-Add-GPIO-controller-devices-to-.patch
+++ /dev/null
@@ -1,109 +0,0 @@
-From d8db1ec2607c33d70ad6355c8b35c3cfda426b9f Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 10 May 2013 15:51:14 +0200
-Subject: ARM: shmobile: r8a7790: Add GPIO controller devices to device tree
-
-Add GPIO controller nodes to the r8a7790 core device tree.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit f98e10c88aa95bf7d37cce6dbacec0820dd6ecc2)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7790.dtsi | 73 ++++++++++++++++++++++++++++++++++++++++++
- 1 file changed, 73 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
-index bfe93128..3b879e7c 100644
---- a/arch/arm/boot/dts/r8a7790.dtsi
-+++ b/arch/arm/boot/dts/r8a7790.dtsi
-@@ -38,6 +38,78 @@
- 		interrupts = <1 9 0xf04>;
- 	};
- 
-+	gpio0: gpio@ffc40000 {
-+		compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
-+		reg = <0 0xffc40000 0 0x2c>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 4 0x4>;
-+		#gpio-cells = <2>;
-+		gpio-controller;
-+		gpio-ranges = <&pfc 0 0 32>;
-+		#interrupt-cells = <2>;
-+		interrupt-controller;
-+	};
-+
-+	gpio1: gpio@ffc41000 {
-+		compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
-+		reg = <0 0xffc41000 0 0x2c>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 5 0x4>;
-+		#gpio-cells = <2>;
-+		gpio-controller;
-+		gpio-ranges = <&pfc 0 32 32>;
-+		#interrupt-cells = <2>;
-+		interrupt-controller;
-+	};
-+
-+	gpio2: gpio@ffc42000 {
-+		compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
-+		reg = <0 0xffc42000 0 0x2c>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 6 0x4>;
-+		#gpio-cells = <2>;
-+		gpio-controller;
-+		gpio-ranges = <&pfc 0 64 32>;
-+		#interrupt-cells = <2>;
-+		interrupt-controller;
-+	};
-+
-+	gpio3: gpio@ffc43000 {
-+		compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
-+		reg = <0 0xffc43000 0 0x2c>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 7 0x4>;
-+		#gpio-cells = <2>;
-+		gpio-controller;
-+		gpio-ranges = <&pfc 0 96 32>;
-+		#interrupt-cells = <2>;
-+		interrupt-controller;
-+	};
-+
-+	gpio4: gpio@ffc44000 {
-+		compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
-+		reg = <0 0xffc44000 0 0x2c>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 8 0x4>;
-+		#gpio-cells = <2>;
-+		gpio-controller;
-+		gpio-ranges = <&pfc 0 128 32>;
-+		#interrupt-cells = <2>;
-+		interrupt-controller;
-+	};
-+
-+	gpio5: gpio@ffc45000 {
-+		compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
-+		reg = <0 0xffc45000 0 0x2c>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 9 0x4>;
-+		#gpio-cells = <2>;
-+		gpio-controller;
-+		gpio-ranges = <&pfc 0 160 32>;
-+		#interrupt-cells = <2>;
-+		interrupt-controller;
-+	};
-+
- 	timer {
- 		compatible = "arm,armv7-timer";
- 		interrupts = <1 13 0xf08>,
-@@ -76,6 +148,7 @@
- 	pfc: pfc@e6060000 {
- 		compatible = "renesas,pfc-r8a7790";
- 		reg = <0 0xe6060000 0 0x250>;
-+		#gpio-range-cells = <3>;
- 	};
- 
- 	sdhi0: sdhi@ee100000 {
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0385-ARM-shmobile-sh7372-Add-pin-control-device-to-device.patch b/patches.renesas/0385-ARM-shmobile-sh7372-Add-pin-control-device-to-device.patch
deleted file mode 100644
index abc69ce958668..0000000000000
--- a/patches.renesas/0385-ARM-shmobile-sh7372-Add-pin-control-device-to-device.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From 5b383754ce4e62d383824fcf631715399b27a2bb Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 9 May 2013 15:05:57 +0200
-Subject: ARM: shmobile: sh7372: Add pin control device to device tree
-
-Add a pfc node to the sh7372 device tree.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 871e4b3e9e437b48287c635c5e66ba80b5cd365a)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/sh7372.dtsi | 8 ++++++++
- 1 file changed, 8 insertions(+)
-
-diff --git a/arch/arm/boot/dts/sh7372.dtsi b/arch/arm/boot/dts/sh7372.dtsi
-index 7bf020ec..249f65be2 100644
---- a/arch/arm/boot/dts/sh7372.dtsi
-+++ b/arch/arm/boot/dts/sh7372.dtsi
-@@ -23,4 +23,12 @@
- 			reg = <0x0>;
- 		};
- 	};
-+
-+	pfc: pfc@e6050000 {
-+		compatible = "renesas,pfc-sh7372";
-+		reg = <0xe6050000 0x8000>,
-+		      <0xe605801c 0x1c>;
-+		gpio-controller;
-+		#gpio-cells = <2>;
-+	};
- };
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0386-ARM-shmobile-sh73a0-Add-pin-control-device-to-device.patch b/patches.renesas/0386-ARM-shmobile-sh73a0-Add-pin-control-device-to-device.patch
deleted file mode 100644
index d995a3fb31fce..0000000000000
--- a/patches.renesas/0386-ARM-shmobile-sh73a0-Add-pin-control-device-to-device.patch
+++ /dev/null
@@ -1,98 +0,0 @@
-From 2f7570dfc3ef469b67d2825ad73b2546f6cc66ae Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 20 Nov 2012 14:02:54 +0100
-Subject: ARM: shmobile: sh73a0: Add pin control device to device tree
-
-Add a pfc node to the sh73a0 device tree and remove manual pinmux
-initialization from the corresponding board files.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 3f59007e8efc29bb6cce08329bf010bcd9b19101)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/sh73a0.dtsi                  |  8 ++++++++
- arch/arm/mach-shmobile/board-kzm9g-reference.c | 27 +++++++++++++-------------
- 2 files changed, 21 insertions(+), 14 deletions(-)
-
-diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi
-index b9775025..86e79feb 100644
---- a/arch/arm/boot/dts/sh73a0.dtsi
-+++ b/arch/arm/boot/dts/sh73a0.dtsi
-@@ -222,4 +222,12 @@
- 		cap-sd-highspeed;
- 		status = "disabled";
- 	};
-+
-+	pfc: pfc@e6050000 {
-+		compatible = "renesas,pfc-sh73a0";
-+		reg = <0xe6050000 0x8000>,
-+		      <0xe605801c 0x1c>;
-+		gpio-controller;
-+		#gpio-cells = <2>;
-+	};
- };
-diff --git a/arch/arm/mach-shmobile/board-kzm9g-reference.c b/arch/arm/mach-shmobile/board-kzm9g-reference.c
-index 41092bb0..d7bbd29a 100644
---- a/arch/arm/mach-shmobile/board-kzm9g-reference.c
-+++ b/arch/arm/mach-shmobile/board-kzm9g-reference.c
-@@ -39,35 +39,35 @@ static unsigned long pin_pullup_conf[] = {
- };
- 
- static const struct pinctrl_map kzm_pinctrl_map[] = {
--	PIN_MAP_MUX_GROUP_DEFAULT("e6826000.i2c", "pfc-sh73a0",
-+	PIN_MAP_MUX_GROUP_DEFAULT("e6826000.i2c", "e6050000.pfc",
- 				  "i2c3_1", "i2c3"),
- 	/* MMCIF */
--	PIN_MAP_MUX_GROUP_DEFAULT("e6bd0000.mmcif", "pfc-sh73a0",
-+	PIN_MAP_MUX_GROUP_DEFAULT("e6bd0000.mmcif", "e6050000.pfc",
- 				  "mmc0_data8_0", "mmc0"),
--	PIN_MAP_MUX_GROUP_DEFAULT("e6bd0000.mmcif", "pfc-sh73a0",
-+	PIN_MAP_MUX_GROUP_DEFAULT("e6bd0000.mmcif", "e6050000.pfc",
- 				  "mmc0_ctrl_0", "mmc0"),
--	PIN_MAP_CONFIGS_PIN_DEFAULT("e6bd0000.mmcif", "pfc-sh73a0",
-+	PIN_MAP_CONFIGS_PIN_DEFAULT("e6bd0000.mmcif", "e6050000.pfc",
- 				    "PORT279", pin_pullup_conf),
--	PIN_MAP_CONFIGS_GROUP_DEFAULT("e6bd0000.mmcif", "pfc-sh73a0",
-+	PIN_MAP_CONFIGS_GROUP_DEFAULT("e6bd0000.mmcif", "e6050000.pfc",
- 				      "mmc0_data8_0", pin_pullup_conf),
- 	/* SCIFA4 */
--	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.4", "pfc-sh73a0",
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.4", "e6050000.pfc",
- 				  "scifa4_data", "scifa4"),
--	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.4", "pfc-sh73a0",
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.4", "e6050000.pfc",
- 				  "scifa4_ctrl", "scifa4"),
- 	/* SDHI0 */
--	PIN_MAP_MUX_GROUP_DEFAULT("ee100000.sdhi", "pfc-sh73a0",
-+	PIN_MAP_MUX_GROUP_DEFAULT("ee100000.sdhi", "e6050000.pfc",
- 				  "sdhi0_data4", "sdhi0"),
--	PIN_MAP_MUX_GROUP_DEFAULT("ee100000.sdhi", "pfc-sh73a0",
-+	PIN_MAP_MUX_GROUP_DEFAULT("ee100000.sdhi", "e6050000.pfc",
- 				  "sdhi0_ctrl", "sdhi0"),
--	PIN_MAP_MUX_GROUP_DEFAULT("ee100000.sdhi", "pfc-sh73a0",
-+	PIN_MAP_MUX_GROUP_DEFAULT("ee100000.sdhi", "e6050000.pfc",
- 				  "sdhi0_cd", "sdhi0"),
--	PIN_MAP_MUX_GROUP_DEFAULT("ee100000.sdhi", "pfc-sh73a0",
-+	PIN_MAP_MUX_GROUP_DEFAULT("ee100000.sdhi", "e6050000.pfc",
- 				  "sdhi0_wp", "sdhi0"),
- 	/* SDHI2 */
--	PIN_MAP_MUX_GROUP_DEFAULT("ee140000.sdhi", "pfc-sh73a0",
-+	PIN_MAP_MUX_GROUP_DEFAULT("ee140000.sdhi", "e6050000.pfc",
- 				  "sdhi2_data4", "sdhi2"),
--	PIN_MAP_MUX_GROUP_DEFAULT("ee140000.sdhi", "pfc-sh73a0",
-+	PIN_MAP_MUX_GROUP_DEFAULT("ee140000.sdhi", "e6050000.pfc",
- 				  "sdhi2_ctrl", "sdhi2"),
- };
- 
-@@ -75,7 +75,6 @@ static void __init kzm_init(void)
- {
- 	sh73a0_add_standard_devices_dt();
- 	pinctrl_register_mappings(kzm_pinctrl_map, ARRAY_SIZE(kzm_pinctrl_map));
--	sh73a0_pinmux_init();
- 
- 	/* enable SD */
- 	gpio_request_one(15, GPIOF_OUT_INIT_HIGH, NULL); /* power */
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0387-ARM-shmobile-armadillo-reference-Move-pinctrl-mappin.patch b/patches.renesas/0387-ARM-shmobile-armadillo-reference-Move-pinctrl-mappin.patch
deleted file mode 100644
index 5011df5e0d0f5..0000000000000
--- a/patches.renesas/0387-ARM-shmobile-armadillo-reference-Move-pinctrl-mappin.patch
+++ /dev/null
@@ -1,74 +0,0 @@
-From c0159f812437f5eec1f4743ca954c58a12a928b0 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 9 May 2013 17:41:59 +0200
-Subject: ARM: shmobile: armadillo-reference: Move pinctrl mappings to device
- tree
-
-Replace the pinctrl mappings in board code by device tree mappings.
-For devices that are still instantiated from board code reference the
-mappings as the default pin controller state to apply them at boot time.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 5d244563da5326d66ca839b06dbc6f632d2f24df)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts  | 10 ++++++++++
- arch/arm/mach-shmobile/board-armadillo800eva-reference.c |  9 ---------
- 2 files changed, 10 insertions(+), 9 deletions(-)
-
-diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
-index 09ea22c2..4a7ae32d 100644
---- a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
-+++ b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
-@@ -43,3 +43,13 @@
- 		interrupts = <2 0>; /* IRQ10: hwirq 2 on irqpin1 */
- 	};
- };
-+
-+&pfc {
-+	pinctrl-0 = <&scifa1_pins>;
-+	pinctrl-names = "default";
-+
-+	scifa1_pins: scifa1 {
-+		renesas,groups = "scifa1_data";
-+		renesas,function = "scifa1";
-+	};
-+};
-diff --git a/arch/arm/mach-shmobile/board-armadillo800eva-reference.c b/arch/arm/mach-shmobile/board-armadillo800eva-reference.c
-index f25b6aab..4ddd2999 100644
---- a/arch/arm/mach-shmobile/board-armadillo800eva-reference.c
-+++ b/arch/arm/mach-shmobile/board-armadillo800eva-reference.c
-@@ -24,7 +24,6 @@
- #include <linux/kernel.h>
- #include <linux/gpio.h>
- #include <linux/io.h>
--#include <linux/pinctrl/machine.h>
- #include <mach/common.h>
- #include <mach/r8a7740.h>
- #include <asm/mach/arch.h>
-@@ -119,12 +118,6 @@
-  *	usbhsf_power_ctrl()
-  */
- 
--static const struct pinctrl_map eva_pinctrl_map[] = {
--	/* SCIFA1 */
--	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.1", "e6050000.pfc",
--				  "scifa1_data", "scifa1"),
--};
--
- static void __init eva_clock_init(void)
- {
- 	struct clk *system	= clk_get(NULL, "system_clk");
-@@ -169,8 +162,6 @@ static void __init eva_init(void)
- 	r8a7740_clock_init(MD_CK0 | MD_CK2);
- 	eva_clock_init();
- 
--	pinctrl_register_mappings(eva_pinctrl_map, ARRAY_SIZE(eva_pinctrl_map));
--
- 	r8a7740_meram_workaround();
- 
- #ifdef CONFIG_CACHE_L2X0
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0388-ARM-shmobile-armadillo-reference-Add-st1232-pin-mapp.patch b/patches.renesas/0388-ARM-shmobile-armadillo-reference-Add-st1232-pin-mapp.patch
deleted file mode 100644
index e50469cd2b12c..0000000000000
--- a/patches.renesas/0388-ARM-shmobile-armadillo-reference-Add-st1232-pin-mapp.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From 8c14344f519d8573b70dbe802518fdb97d8301db Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 9 May 2013 17:41:59 +0200
-Subject: ARM: shmobile: armadillo-reference: Add st1232 pin mappings
-
-Add pin mappings for the st1232 device to the device tree and reference
-them as the default state for the device.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit f46a6b0f6a54e80ebf1003134f2e6f4258e53688)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts | 7 +++++++
- 1 file changed, 7 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
-index 4a7ae32d..a6c6606d 100644
---- a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
-+++ b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
-@@ -41,6 +41,8 @@
- 		reg = <0x55>;
- 		interrupt-parent = <&irqpin1>;
- 		interrupts = <2 0>; /* IRQ10: hwirq 2 on irqpin1 */
-+		pinctrl-0 = <&st1232_pins>;
-+		pinctrl-names = "default";
- 	};
- };
- 
-@@ -52,4 +54,9 @@
- 		renesas,groups = "scifa1_data";
- 		renesas,function = "scifa1";
- 	};
-+
-+	st1232_pins: st1232 {
-+		renesas,groups = "intc_irq10";
-+		renesas,function = "intc";
-+	};
- };
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0389-ARM-shmobile-armadillo-reference-Move-st1232-reset-G.patch b/patches.renesas/0389-ARM-shmobile-armadillo-reference-Move-st1232-reset-G.patch
deleted file mode 100644
index 692b2622ec717..0000000000000
--- a/patches.renesas/0389-ARM-shmobile-armadillo-reference-Move-st1232-reset-G.patch
+++ /dev/null
@@ -1,65 +0,0 @@
-From 54aabbfc65940d556b0392a0eec2e2d52196a513 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 9 May 2013 17:41:59 +0200
-Subject: ARM: shmobile: armadillo-reference: Move st1232 reset GPIO to DT
-
-Reference the st1232 reset GPIO from the device tree and remove it from
-board code.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 14d0a2b79623e4773e5fc78950dadac213a30400)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts  | 2 ++
- arch/arm/mach-shmobile/board-armadillo800eva-reference.c | 7 -------
- 2 files changed, 2 insertions(+), 7 deletions(-)
-
-diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
-index a6c6606d..8ec4cd17 100644
---- a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
-+++ b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
-@@ -10,6 +10,7 @@
- 
- /dts-v1/;
- /include/ "r8a7740.dtsi"
-+#include <dt-bindings/gpio/gpio.h>
- 
- / {
- 	model = "armadillo 800 eva reference";
-@@ -43,6 +44,7 @@
- 		interrupts = <2 0>; /* IRQ10: hwirq 2 on irqpin1 */
- 		pinctrl-0 = <&st1232_pins>;
- 		pinctrl-names = "default";
-+		gpios = <&pfc 166 GPIO_ACTIVE_LOW>;
- 	};
- };
- 
-diff --git a/arch/arm/mach-shmobile/board-armadillo800eva-reference.c b/arch/arm/mach-shmobile/board-armadillo800eva-reference.c
-index 4ddd2999..002d8d3d 100644
---- a/arch/arm/mach-shmobile/board-armadillo800eva-reference.c
-+++ b/arch/arm/mach-shmobile/board-armadillo800eva-reference.c
-@@ -158,7 +158,6 @@ clock_error:
-  */
- static void __init eva_init(void)
- {
--
- 	r8a7740_clock_init(MD_CK0 | MD_CK2);
- 	eva_clock_init();
- 
-@@ -171,12 +170,6 @@ static void __init eva_init(void)
- 
- 	r8a7740_add_standard_devices_dt();
- 
--	/*
--	 * Touchscreen
--	 * TODO: Move reset GPIO over to .dts when we can reference it
--	 */
--	gpio_request_one(166, GPIOF_OUT_INIT_HIGH, NULL); /* TP_RST_B */
--
- 	r8a7740_pm_init();
- }
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0390-ARM-shmobile-armadillo-reference-Add-LED1-LED4-to-th.patch b/patches.renesas/0390-ARM-shmobile-armadillo-reference-Add-LED1-LED4-to-th.patch
deleted file mode 100644
index 1a449b2b09577..0000000000000
--- a/patches.renesas/0390-ARM-shmobile-armadillo-reference-Add-LED1-LED4-to-th.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From 8313d7175a1ee2cb2adf6f2002c975bb4a2b0494 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 10 May 2013 00:23:04 +0200
-Subject: ARM: shmobile: armadillo-reference: Add LED1-LED4 to the device tree
-
-LED1 to LED4 are GPIO LEDs. Add corresponding DT nodes.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 0a4f788961f196baa3e8ffd840a2c5931434854e)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts | 15 +++++++++++++++
- 1 file changed, 15 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
-index 8ec4cd17..366f7298 100644
---- a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
-+++ b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
-@@ -34,6 +34,21 @@
- 		regulator-boot-on;
- 	};
- 
-+	leds {
-+		compatible = "gpio-leds";
-+		led1 {
-+			gpios = <&pfc 102 GPIO_ACTIVE_HIGH>;
-+		};
-+		led2 {
-+			gpios = <&pfc 111 GPIO_ACTIVE_HIGH>;
-+		};
-+		led3 {
-+			gpios = <&pfc 110 GPIO_ACTIVE_HIGH>;
-+		};
-+		led4 {
-+			gpios = <&pfc 177 GPIO_ACTIVE_HIGH>;
-+		};
-+	};
- };
- 
- &i2c0 {
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0391-ARM-shmobile-marzen-reference-Move-pinctrl-mappings-.patch b/patches.renesas/0391-ARM-shmobile-marzen-reference-Move-pinctrl-mappings-.patch
deleted file mode 100644
index 80c12bd66575e..0000000000000
--- a/patches.renesas/0391-ARM-shmobile-marzen-reference-Move-pinctrl-mappings-.patch
+++ /dev/null
@@ -1,117 +0,0 @@
-From 69a3b0876a79563f51d026ca653f15eea8c91489 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 9 May 2013 17:41:59 +0200
-Subject: ARM: shmobile: marzen-reference: Move pinctrl mappings to device tree
-
-Replace the pinctrl mappings in board code by device tree mappings.
-For devices that are still instantiated from board code reference the
-mappings as the default pin controller state to apply them at boot time.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit c4a003f6075c8e3e4e5a0d8958518882d779ef74)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7779-marzen-reference.dts  | 35 +++++++++++++++++++++++++
- arch/arm/mach-shmobile/board-marzen-reference.c | 27 -------------------
- 2 files changed, 35 insertions(+), 27 deletions(-)
-
-diff --git a/arch/arm/boot/dts/r8a7779-marzen-reference.dts b/arch/arm/boot/dts/r8a7779-marzen-reference.dts
-index 72be4c87..6d202478 100644
---- a/arch/arm/boot/dts/r8a7779-marzen-reference.dts
-+++ b/arch/arm/boot/dts/r8a7779-marzen-reference.dts
-@@ -37,6 +37,9 @@
- 	lan0@18000000 {
- 		compatible = "smsc,lan9220", "smsc,lan9115";
- 		reg = <0x18000000 0x100>;
-+		pinctrl-0 = <&lan0_pins>;
-+		pinctrl-names = "default";
-+
- 		phy-mode = "mii";
- 		interrupt-parent = <&gic>;
- 		interrupts = <0 28 0x4>;
-@@ -45,3 +48,35 @@
- 		vdd33a-supply = <&fixedregulator3v3>;
- 	};
- };
-+
-+&pfc {
-+	pinctrl-0 = <&scif2_pins &scif4_pins &sdhi0_pins>;
-+	pinctrl-names = "default";
-+
-+	lan0_pins: lan0 {
-+		intc {
-+			renesas,groups = "intc_irq1_b";
-+			renesas,function = "intc";
-+		};
-+		lbsc {
-+			renesas,groups = "lbsc_ex_cs0";
-+			renesas,function = "lbsc";
-+		};
-+	};
-+
-+	scif2_pins: scif2 {
-+		renesas,groups = "scif2_data_c";
-+		renesas,function = "scif2";
-+	};
-+
-+	scif4_pins: scif4 {
-+		renesas,groups = "scif4_data";
-+		renesas,function = "scif4";
-+	};
-+
-+	sdhi0_pins: sdhi0 {
-+		renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_cd",
-+				 "sdhi0_wp";
-+		renesas,function = "sdhi0";
-+	};
-+};
-diff --git a/arch/arm/mach-shmobile/board-marzen-reference.c b/arch/arm/mach-shmobile/board-marzen-reference.c
-index 94804f3c..3d1c439b 100644
---- a/arch/arm/mach-shmobile/board-marzen-reference.c
-+++ b/arch/arm/mach-shmobile/board-marzen-reference.c
-@@ -19,41 +19,14 @@
-  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
-  */
- 
--#include <linux/pinctrl/machine.h>
- #include <mach/r8a7779.h>
- #include <mach/common.h>
- #include <mach/irqs.h>
- #include <asm/irq.h>
- #include <asm/mach/arch.h>
- 
--static const struct pinctrl_map marzen_pinctrl_map[] = {
--	/* SCIF2 (CN18: DEBUG0) */
--	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.2", "fffc0000.pfc",
--				  "scif2_data_c", "scif2"),
--	/* SCIF4 (CN19: DEBUG1) */
--	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.4", "fffc0000.pfc",
--				  "scif4_data", "scif4"),
--	/* SDHI0 */
--	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "fffc0000.pfc",
--				  "sdhi0_data4", "sdhi0"),
--	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "fffc0000.pfc",
--				  "sdhi0_ctrl", "sdhi0"),
--	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "fffc0000.pfc",
--				  "sdhi0_cd", "sdhi0"),
--	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "fffc0000.pfc",
--				  "sdhi0_wp", "sdhi0"),
--	/* SMSC */
--	PIN_MAP_MUX_GROUP_DEFAULT("smsc911x", "fffc0000.pfc",
--				  "intc_irq1_b", "intc"),
--	PIN_MAP_MUX_GROUP_DEFAULT("smsc911x", "fffc0000.pfc",
--				  "lbsc_ex_cs0", "lbsc"),
--};
--
- static void __init marzen_init(void)
- {
--	pinctrl_register_mappings(marzen_pinctrl_map,
--				  ARRAY_SIZE(marzen_pinctrl_map));
--
- 	r8a7779_add_standard_devices_dt();
- }
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0392-ARM-shmobile-marzen-reference-Add-LED2-LED4-to-the-d.patch b/patches.renesas/0392-ARM-shmobile-marzen-reference-Add-LED2-LED4-to-the-d.patch
deleted file mode 100644
index d5482d2dfe5e2..0000000000000
--- a/patches.renesas/0392-ARM-shmobile-marzen-reference-Add-LED2-LED4-to-the-d.patch
+++ /dev/null
@@ -1,50 +0,0 @@
-From 527945dc6673dc8cef67a0cdf3ec9c4976280a29 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 10 May 2013 00:23:04 +0200
-Subject: ARM: shmobile: marzen-reference: Add LED2-LED4 to the device tree
-
-LED2 to LED4 are GPIO LEDs. Add corresponding DT nodes.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 80d1126fae07fd4bd6a93ad626ad14e753f9d892)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7779-marzen-reference.dts | 14 ++++++++++++++
- 1 file changed, 14 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a7779-marzen-reference.dts b/arch/arm/boot/dts/r8a7779-marzen-reference.dts
-index 6d202478..b64705be 100644
---- a/arch/arm/boot/dts/r8a7779-marzen-reference.dts
-+++ b/arch/arm/boot/dts/r8a7779-marzen-reference.dts
-@@ -11,6 +11,7 @@
- 
- /dts-v1/;
- /include/ "r8a7779.dtsi"
-+#include <dt-bindings/gpio/gpio.h>
- 
- / {
- 	model = "marzen";
-@@ -47,6 +48,19 @@
- 		vddvario-supply = <&fixedregulator3v3>;
- 		vdd33a-supply = <&fixedregulator3v3>;
- 	};
-+
-+	leds {
-+		compatible = "gpio-leds";
-+		led2 {
-+			gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
-+		};
-+		led3 {
-+			gpios = <&gpio4 30 GPIO_ACTIVE_HIGH>;
-+		};
-+		led4 {
-+			gpios = <&gpio4 31 GPIO_ACTIVE_HIGH>;
-+		};
-+	};
- };
- 
- &pfc {
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0393-ARM-shmobile-kzm9g-reference-Move-pinctrl-mappings-t.patch b/patches.renesas/0393-ARM-shmobile-kzm9g-reference-Move-pinctrl-mappings-t.patch
deleted file mode 100644
index 0d2378c8924e1..0000000000000
--- a/patches.renesas/0393-ARM-shmobile-kzm9g-reference-Move-pinctrl-mappings-t.patch
+++ /dev/null
@@ -1,156 +0,0 @@
-From e1e53987e8f32e8b1289e950be498934e1b99a88 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 9 May 2013 17:41:59 +0200
-Subject: ARM: shmobile: kzm9g-reference: Move pinctrl mappings to device tree
-
-Replace the pinctrl mappings in board code by device tree mappings.
-For devices that are still instantiated from board code reference the
-mappings as the default pin controller state to apply them at boot time.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit ec028600f4a4bd1b272465caea3e2ff066e40377)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/sh73a0-kzm9g-reference.dts   | 51 ++++++++++++++++++++++++++
- arch/arm/mach-shmobile/board-kzm9g-reference.c | 40 --------------------
- 2 files changed, 51 insertions(+), 40 deletions(-)
-
-diff --git a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
-index b6f759e8..11ae9ade 100644
---- a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
-+++ b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
-@@ -145,19 +145,70 @@
- 	};
- };
- 
-+&i2c3 {
-+	pinctrl-0 = <&i2c3_pins>;
-+	pinctrl-names = "default";
-+};
-+
- &mmcif {
-+	pinctrl-0 = <&mmcif_pins>;
-+	pinctrl-names = "default";
-+
- 	bus-width = <8>;
- 	vmmc-supply = <&reg_1p8v>;
- 	status = "okay";
- };
- 
-+&pfc {
-+	pinctrl-0 = <&scifa4_pins>;
-+	pinctrl-names = "default";
-+
-+	i2c3_pins: i2c3 {
-+		renesas,groups = "i2c3_1";
-+		renesas,function = "i2c3";
-+	};
-+
-+	mmcif_pins: mmcif {
-+		mux {
-+			renesas,groups = "mmc0_data8_0", "mmc0_ctrl_0";
-+			renesas,function = "mmc0";
-+		};
-+		cfg {
-+			renesas,groups = "mmc0_data8_0";
-+			renesas,pins = "PORT279";
-+			bias-pull-up;
-+		};
-+	};
-+
-+	scifa4_pins: scifa4 {
-+		renesas,groups = "scifa4_data", "scifa4_ctrl";
-+		renesas,function = "scifa4";
-+	};
-+
-+	sdhi0_pins: sdhi0 {
-+		renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_cd", "sdhi0_wp";
-+		renesas,function = "sdhi0";
-+	};
-+
-+	sdhi2_pins: sdhi2 {
-+		renesas,groups = "sdhi2_data4", "sdhi2_ctrl";
-+		renesas,function = "sdhi2";
-+	};
-+};
-+
- &sdhi0 {
-+	pinctrl-0 = <&sdhi0_pins>;
-+	pinctrl-names = "default";
-+
- 	vmmc-supply = <&reg_3p3v>;
- 	bus-width = <4>;
- 	status = "okay";
- };
- 
- &sdhi2 {
-+	pinctrl-0 = <&sdhi2_pins>;
-+	pinctrl-names = "default";
-+
- 	vmmc-supply = <&reg_3p3v>;
- 	bus-width = <4>;
- 	broken-cd;
-diff --git a/arch/arm/mach-shmobile/board-kzm9g-reference.c b/arch/arm/mach-shmobile/board-kzm9g-reference.c
-index d7bbd29a..6a9f6a3a 100644
---- a/arch/arm/mach-shmobile/board-kzm9g-reference.c
-+++ b/arch/arm/mach-shmobile/board-kzm9g-reference.c
-@@ -26,55 +26,15 @@
- #include <linux/irq.h>
- #include <linux/input.h>
- #include <linux/of_platform.h>
--#include <linux/pinctrl/machine.h>
--#include <linux/pinctrl/pinconf-generic.h>
- #include <mach/sh73a0.h>
- #include <mach/common.h>
- #include <asm/hardware/cache-l2x0.h>
- #include <asm/mach-types.h>
- #include <asm/mach/arch.h>
- 
--static unsigned long pin_pullup_conf[] = {
--	PIN_CONF_PACKED(PIN_CONFIG_BIAS_PULL_UP, 0),
--};
--
--static const struct pinctrl_map kzm_pinctrl_map[] = {
--	PIN_MAP_MUX_GROUP_DEFAULT("e6826000.i2c", "e6050000.pfc",
--				  "i2c3_1", "i2c3"),
--	/* MMCIF */
--	PIN_MAP_MUX_GROUP_DEFAULT("e6bd0000.mmcif", "e6050000.pfc",
--				  "mmc0_data8_0", "mmc0"),
--	PIN_MAP_MUX_GROUP_DEFAULT("e6bd0000.mmcif", "e6050000.pfc",
--				  "mmc0_ctrl_0", "mmc0"),
--	PIN_MAP_CONFIGS_PIN_DEFAULT("e6bd0000.mmcif", "e6050000.pfc",
--				    "PORT279", pin_pullup_conf),
--	PIN_MAP_CONFIGS_GROUP_DEFAULT("e6bd0000.mmcif", "e6050000.pfc",
--				      "mmc0_data8_0", pin_pullup_conf),
--	/* SCIFA4 */
--	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.4", "e6050000.pfc",
--				  "scifa4_data", "scifa4"),
--	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.4", "e6050000.pfc",
--				  "scifa4_ctrl", "scifa4"),
--	/* SDHI0 */
--	PIN_MAP_MUX_GROUP_DEFAULT("ee100000.sdhi", "e6050000.pfc",
--				  "sdhi0_data4", "sdhi0"),
--	PIN_MAP_MUX_GROUP_DEFAULT("ee100000.sdhi", "e6050000.pfc",
--				  "sdhi0_ctrl", "sdhi0"),
--	PIN_MAP_MUX_GROUP_DEFAULT("ee100000.sdhi", "e6050000.pfc",
--				  "sdhi0_cd", "sdhi0"),
--	PIN_MAP_MUX_GROUP_DEFAULT("ee100000.sdhi", "e6050000.pfc",
--				  "sdhi0_wp", "sdhi0"),
--	/* SDHI2 */
--	PIN_MAP_MUX_GROUP_DEFAULT("ee140000.sdhi", "e6050000.pfc",
--				  "sdhi2_data4", "sdhi2"),
--	PIN_MAP_MUX_GROUP_DEFAULT("ee140000.sdhi", "e6050000.pfc",
--				  "sdhi2_ctrl", "sdhi2"),
--};
--
- static void __init kzm_init(void)
- {
- 	sh73a0_add_standard_devices_dt();
--	pinctrl_register_mappings(kzm_pinctrl_map, ARRAY_SIZE(kzm_pinctrl_map));
- 
- 	/* enable SD */
- 	gpio_request_one(15, GPIOF_OUT_INIT_HIGH, NULL); /* power */
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0394-ARM-shmobile-kzm9g-reference-Move-SDHI-regulators-to.patch b/patches.renesas/0394-ARM-shmobile-kzm9g-reference-Move-SDHI-regulators-to.patch
deleted file mode 100644
index 5e94d20c147d2..0000000000000
--- a/patches.renesas/0394-ARM-shmobile-kzm9g-reference-Move-SDHI-regulators-to.patch
+++ /dev/null
@@ -1,100 +0,0 @@
-From aa354ccaba22f862b9d293817bd308f96463332d Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 9 May 2013 17:41:59 +0200
-Subject: ARM: shmobile: kzm9g-reference: Move SDHI regulators to DT
-
-Create two GPIO-controlled fixed-voltage regulators in the
-kzm9g-reference DT and remove manual configuration of the corresponding
-GPIOs from board code.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit f8f77ce940b84c17378db432a05186476bd8dd04)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/sh73a0-kzm9g-reference.dts   | 23 +++++++++++++++++++++--
- arch/arm/mach-shmobile/board-kzm9g-reference.c |  6 ------
- 2 files changed, 21 insertions(+), 8 deletions(-)
-
-diff --git a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
-index 11ae9ade..d2b2c9f5 100644
---- a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
-+++ b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
-@@ -13,6 +13,7 @@
- 
- /dts-v1/;
- /include/ "sh73a0.dtsi"
-+#include <dt-bindings/gpio/gpio.h>
- 
- / {
- 	model = "KZM-A9-GT";
-@@ -58,6 +59,24 @@
- 		regulator-boot-on;
- 	};
- 
-+	vmmc_sdhi0: regulator@2 {
-+	        compatible = "regulator-fixed";
-+		regulator-name = "SDHI0 Vcc";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+		gpio = <&pfc 15 GPIO_ACTIVE_HIGH>;
-+		enable-active-high;
-+	};
-+
-+	vmmc_sdhi2: regulator@3 {
-+	        compatible = "regulator-fixed";
-+		regulator-name = "SDHI2 Vcc";
-+		regulator-min-microvolt = <3300000>;
-+		regulator-max-microvolt = <3300000>;
-+		gpio = <&pfc 14 GPIO_ACTIVE_HIGH>;
-+		enable-active-high;
-+	};
-+
- 	lan9220@10000000 {
- 		compatible = "smsc,lan9220", "smsc,lan9115";
- 		reg = <0x10000000 0x100>;
-@@ -200,7 +219,7 @@
- 	pinctrl-0 = <&sdhi0_pins>;
- 	pinctrl-names = "default";
- 
--	vmmc-supply = <&reg_3p3v>;
-+	vmmc-supply = <&vmmc_sdhi0>;
- 	bus-width = <4>;
- 	status = "okay";
- };
-@@ -209,7 +228,7 @@
- 	pinctrl-0 = <&sdhi2_pins>;
- 	pinctrl-names = "default";
- 
--	vmmc-supply = <&reg_3p3v>;
-+	vmmc-supply = <&vmmc_sdhi2>;
- 	bus-width = <4>;
- 	broken-cd;
- 	status = "okay";
-diff --git a/arch/arm/mach-shmobile/board-kzm9g-reference.c b/arch/arm/mach-shmobile/board-kzm9g-reference.c
-index 6a9f6a3a..a66a808d 100644
---- a/arch/arm/mach-shmobile/board-kzm9g-reference.c
-+++ b/arch/arm/mach-shmobile/board-kzm9g-reference.c
-@@ -21,7 +21,6 @@
-  */
- 
- #include <linux/delay.h>
--#include <linux/gpio.h>
- #include <linux/io.h>
- #include <linux/irq.h>
- #include <linux/input.h>
-@@ -36,11 +35,6 @@ static void __init kzm_init(void)
- {
- 	sh73a0_add_standard_devices_dt();
- 
--	/* enable SD */
--	gpio_request_one(15, GPIOF_OUT_INIT_HIGH, NULL); /* power */
--
--	gpio_request_one(14, GPIOF_OUT_INIT_HIGH, NULL); /* power */
--
- #ifdef CONFIG_CACHE_L2X0
- 	/* Early BRESP enable, Shared attribute override enable, 64K*8way */
- 	l2x0_init(IOMEM(0xf0100000), 0x40460000, 0x82000fff);
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0395-ARM-shmobile-kzm9g-reference-Add-LED1-LED4-to-the-de.patch b/patches.renesas/0395-ARM-shmobile-kzm9g-reference-Add-LED1-LED4-to-the-de.patch
deleted file mode 100644
index 55ab864731686..0000000000000
--- a/patches.renesas/0395-ARM-shmobile-kzm9g-reference-Add-LED1-LED4-to-the-de.patch
+++ /dev/null
@@ -1,45 +0,0 @@
-From 825dd228ed6e5692ed0ba8001107ef7e2752569e Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 10 May 2013 00:23:04 +0200
-Subject: ARM: shmobile: kzm9g-reference: Add LED1-LED4 to the device tree
-
-LED1 to LED4 are GPIO LEDs. Add corresponding DT nodes.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 1469273960de45275f33276c7254456edcba9da2)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/sh73a0-kzm9g-reference.dts | 16 ++++++++++++++++
- 1 file changed, 16 insertions(+)
-
-diff --git a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
-index d2b2c9f5..b99e890d 100644
---- a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
-+++ b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
-@@ -89,6 +89,22 @@
- 		vddvario-supply = <&reg_1p8v>;
- 		vdd33a-supply = <&reg_3p3v>;
- 	};
-+
-+	leds {
-+		compatible = "gpio-leds";
-+		led1 {
-+			gpios = <&pfc 20 GPIO_ACTIVE_LOW>;
-+		};
-+		led2 {
-+			gpios = <&pfc 21 GPIO_ACTIVE_LOW>;
-+		};
-+		led3 {
-+			gpios = <&pfc 22 GPIO_ACTIVE_LOW>;
-+		};
-+		led4 {
-+			gpios = <&pfc 23 GPIO_ACTIVE_LOW>;
-+		};
-+	};
- };
- 
- &i2c0 {
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0396-ARM-shmobile-Only-build-clocks-when-COMMON_CLK-n.patch b/patches.renesas/0396-ARM-shmobile-Only-build-clocks-when-COMMON_CLK-n.patch
deleted file mode 100644
index 202de79a28b3a..0000000000000
--- a/patches.renesas/0396-ARM-shmobile-Only-build-clocks-when-COMMON_CLK-n.patch
+++ /dev/null
@@ -1,67 +0,0 @@
-From 4c63a361723a55126c0e06542e20aed37a2850fe Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Thu, 18 Jul 2013 05:30:59 +0900
-Subject: ARM: shmobile: Only build clocks when COMMON_CLK=n
-
-Move shared clock.c file and per-SoC clock-xxx.c files
-to only build when CONFIG_COMMON_CLK != y.
-
-The regular ARCH_SHMOBILE case with legacy SH clock framework
-will build just as before with this patch applied, however
-the case when COMMON_CLK=y will exclude all the clock files.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit a360feb9e9e6cc36d61e683c03dc13974663298b)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/Makefile | 31 ++++++++++++++++++++++---------
- 1 file changed, 22 insertions(+), 9 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
-index 397bb360..28dc9ab3 100644
---- a/arch/arm/mach-shmobile/Makefile
-+++ b/arch/arm/mach-shmobile/Makefile
-@@ -3,17 +3,30 @@
- #
- 
- # Common objects
--obj-y				:= timer.o console.o clock.o
-+obj-y				:= timer.o console.o
- 
- # CPU objects
--obj-$(CONFIG_ARCH_SH7372)	+= setup-sh7372.o clock-sh7372.o intc-sh7372.o
--obj-$(CONFIG_ARCH_SH73A0)	+= setup-sh73a0.o clock-sh73a0.o intc-sh73a0.o
--obj-$(CONFIG_ARCH_R8A73A4)	+= setup-r8a73a4.o clock-r8a73a4.o
--obj-$(CONFIG_ARCH_R8A7740)	+= setup-r8a7740.o clock-r8a7740.o intc-r8a7740.o
--obj-$(CONFIG_ARCH_R8A7778)	+= setup-r8a7778.o clock-r8a7778.o
--obj-$(CONFIG_ARCH_R8A7779)	+= setup-r8a7779.o clock-r8a7779.o intc-r8a7779.o
--obj-$(CONFIG_ARCH_R8A7790)	+= setup-r8a7790.o clock-r8a7790.o
--obj-$(CONFIG_ARCH_EMEV2)	+= setup-emev2.o clock-emev2.o
-+obj-$(CONFIG_ARCH_SH7372)	+= setup-sh7372.o intc-sh7372.o
-+obj-$(CONFIG_ARCH_SH73A0)	+= setup-sh73a0.o intc-sh73a0.o
-+obj-$(CONFIG_ARCH_R8A73A4)	+= setup-r8a73a4.o
-+obj-$(CONFIG_ARCH_R8A7740)	+= setup-r8a7740.o intc-r8a7740.o
-+obj-$(CONFIG_ARCH_R8A7778)	+= setup-r8a7778.o
-+obj-$(CONFIG_ARCH_R8A7779)	+= setup-r8a7779.o intc-r8a7779.o
-+obj-$(CONFIG_ARCH_R8A7790)	+= setup-r8a7790.o
-+obj-$(CONFIG_ARCH_EMEV2)	+= setup-emev2.o
-+
-+# Clock objects
-+ifndef CONFIG_COMMON_CLK
-+obj-y				+= clock.o
-+obj-$(CONFIG_ARCH_SH7372)	+= clock-sh7372.o
-+obj-$(CONFIG_ARCH_SH73A0)	+= clock-sh73a0.o
-+obj-$(CONFIG_ARCH_R8A73A4)	+= clock-r8a73a4.o
-+obj-$(CONFIG_ARCH_R8A7740)	+= clock-r8a7740.o
-+obj-$(CONFIG_ARCH_R8A7778)	+= clock-r8a7778.o
-+obj-$(CONFIG_ARCH_R8A7779)	+= clock-r8a7779.o
-+obj-$(CONFIG_ARCH_R8A7790)	+= clock-r8a7790.o
-+obj-$(CONFIG_ARCH_EMEV2)	+= clock-emev2.o
-+endif
- 
- # SMP objects
- smp-y				:= platsmp.o headsmp.o
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0397-ARM-shmobile-Introduce-ARCH_SHMOBILE_MULTI.patch b/patches.renesas/0397-ARM-shmobile-Introduce-ARCH_SHMOBILE_MULTI.patch
deleted file mode 100644
index 9f183422f0202..0000000000000
--- a/patches.renesas/0397-ARM-shmobile-Introduce-ARCH_SHMOBILE_MULTI.patch
+++ /dev/null
@@ -1,78 +0,0 @@
-From c22d03e14635ecd4200062fa4fbd777754eb46db Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Thu, 18 Jul 2013 05:31:09 +0900
-Subject: ARM: shmobile: Introduce ARCH_SHMOBILE_MULTI
-
-Add ARCH_SHMOBILE_MULTI to mach-shmobile that can be used
-to enable ARCH_MULTIPLATFORM on selected SoCs and boards.
-
-The headers stay under arch/arm/mach-shmobile/include/mach/
-for now, they can and will be migrated independently over time.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit efacfce5f8a523457e9419a25d52fe39db00b26a)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/Makefile               |  1 +
- arch/arm/mach-shmobile/Kconfig  | 21 +++++++++++++++++++++
- arch/arm/mach-shmobile/Makefile |  2 ++
- 3 files changed, 24 insertions(+)
-
-diff --git a/arch/arm/Makefile b/arch/arm/Makefile
-index 1ba358ba..f56df13d 100644
---- a/arch/arm/Makefile
-+++ b/arch/arm/Makefile
-@@ -181,6 +181,7 @@ machine-$(CONFIG_ARCH_EXYNOS)		+= exynos
- machine-$(CONFIG_ARCH_SA1100)		+= sa1100
- machine-$(CONFIG_ARCH_SHARK)		+= shark
- machine-$(CONFIG_ARCH_SHMOBILE) 	+= shmobile
-+machine-$(CONFIG_ARCH_SHMOBILE_MULTI) 	+= shmobile
- machine-$(CONFIG_ARCH_TEGRA)		+= tegra
- machine-$(CONFIG_ARCH_U300)		+= u300
- machine-$(CONFIG_ARCH_U8500)		+= ux500
-diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
-index 5ae27f21..b6ba366a 100644
---- a/arch/arm/mach-shmobile/Kconfig
-+++ b/arch/arm/mach-shmobile/Kconfig
-@@ -1,3 +1,24 @@
-+config ARCH_SHMOBILE_MULTI
-+	bool "SH-Mobile Series" if ARCH_MULTI_V7
-+	depends on MMU
-+	select CPU_V7
-+	select GENERIC_CLOCKEVENTS
-+	select HAVE_ARM_SCU if SMP
-+	select HAVE_ARM_TWD if LOCAL_TIMERS
-+	select HAVE_SMP
-+	select ARM_GIC
-+	select MIGHT_HAVE_CACHE_L2X0
-+	select NO_IOPORT
-+	select PINCTRL
-+	select ARCH_REQUIRE_GPIOLIB
-+	select CLKDEV_LOOKUP
-+
-+if ARCH_SHMOBILE_MULTI
-+
-+comment "SH-Mobile System Type"
-+
-+endif
-+
- if ARCH_SHMOBILE
- 
- comment "SH-Mobile System Type"
-diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
-index 28dc9ab3..8bda014c 100644
---- a/arch/arm/mach-shmobile/Makefile
-+++ b/arch/arm/mach-shmobile/Makefile
-@@ -2,6 +2,8 @@
- # Makefile for the linux kernel.
- #
- 
-+ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/arch/arm/mach-shmobile/include
-+
- # Common objects
- obj-y				:= timer.o console.o
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0398-ARM-shmobile-Add-EMEV2-and-KZM9D-to-ARCH_SHMOBILE_MU.patch b/patches.renesas/0398-ARM-shmobile-Add-EMEV2-and-KZM9D-to-ARCH_SHMOBILE_MU.patch
deleted file mode 100644
index 4d505529b57d8..0000000000000
--- a/patches.renesas/0398-ARM-shmobile-Add-EMEV2-and-KZM9D-to-ARCH_SHMOBILE_MU.patch
+++ /dev/null
@@ -1,91 +0,0 @@
-From 9077cc954932805e7e9dbba6c91f7a261b42896b Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Thu, 18 Jul 2013 05:31:18 +0900
-Subject: ARM: shmobile: Add EMEV2 and KZM9D to ARCH_SHMOBILE_MULTI
-
-Enable build of EMEV2 and KZM9D DT Reference in
-case of ARCH_MULTIPLATFORM and ARCH_SHMOBILE_MULTI.
-
-IS_ENABLED() is leaves the clock-emev2.c file out
-in case of COMMON_CLK=y.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit cbc60e7c04f3c1390144d4a881f0a7b98b49da98)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/Makefile                     |  1 +
- arch/arm/mach-shmobile/Kconfig                 | 15 +++++++++++++++
- arch/arm/mach-shmobile/board-kzm9d-reference.c |  3 ++-
- arch/arm/mach-shmobile/setup-emev2.c           |  3 ++-
- 4 files changed, 20 insertions(+), 2 deletions(-)
-
-diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
-index 7c9fddc7..1d38ff07 100644
---- a/arch/arm/boot/dts/Makefile
-+++ b/arch/arm/boot/dts/Makefile
-@@ -172,6 +172,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \
- 	r8a73a4-ape6evm.dtb \
- 	r8a73a4-ape6evm-reference.dtb \
- 	sh7372-mackerel.dtb
-+dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += emev2-kzm9d-reference.dtb
- dtb-$(CONFIG_ARCH_SOCFPGA) += socfpga_cyclone5.dtb \
- 	socfpga_vt.dtb
- dtb-$(CONFIG_ARCH_SPEAR13XX) += spear1310-evb.dtb \
-diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
-index b6ba366a..e7c399c1 100644
---- a/arch/arm/mach-shmobile/Kconfig
-+++ b/arch/arm/mach-shmobile/Kconfig
-@@ -17,6 +17,21 @@ if ARCH_SHMOBILE_MULTI
- 
- comment "SH-Mobile System Type"
- 
-+config ARCH_EMEV2
-+	bool "Emma Mobile EV2"
-+
-+comment "SH-Mobile Board Type"
-+
-+config MACH_KZM9D_REFERENCE
-+	bool "KZM9D board - Reference Device Tree Implementation"
-+	depends on ARCH_EMEV2
-+	select REGULATOR_FIXED_VOLTAGE if REGULATOR
-+	---help---
-+	   Use reference implementation of KZM9D board support
-+	   which makes a greater use of device tree at the expense
-+	   of not supporting a number of devices.
-+
-+	   This is intended to aid developers
- endif
- 
- if ARCH_SHMOBILE
-diff --git a/arch/arm/mach-shmobile/board-kzm9d-reference.c b/arch/arm/mach-shmobile/board-kzm9d-reference.c
-index a7b28b24..8f8bb2fa 100644
---- a/arch/arm/mach-shmobile/board-kzm9d-reference.c
-+++ b/arch/arm/mach-shmobile/board-kzm9d-reference.c
-@@ -26,7 +26,8 @@
- 
- static void __init kzm9d_add_standard_devices(void)
- {
--	emev2_clock_init();
-+	if (!IS_ENABLED(CONFIG_COMMON_CLK))
-+		emev2_clock_init();
- 
- 	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
- }
-diff --git a/arch/arm/mach-shmobile/setup-emev2.c b/arch/arm/mach-shmobile/setup-emev2.c
-index 19980be7..1553af8e 100644
---- a/arch/arm/mach-shmobile/setup-emev2.c
-+++ b/arch/arm/mach-shmobile/setup-emev2.c
-@@ -175,7 +175,8 @@ static struct resource pmu_resources[] = {
- 
- void __init emev2_add_standard_devices(void)
- {
--	emev2_clock_init();
-+	if (!IS_ENABLED(CONFIG_COMMON_CLK))
-+		emev2_clock_init();
- 
- 	emev2_register_uart(0);
- 	emev2_register_uart(1);
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0399-ARM-shmobile-Allow-ARCH_SHMOBILE_MULTI-timer-configu.patch b/patches.renesas/0399-ARM-shmobile-Allow-ARCH_SHMOBILE_MULTI-timer-configu.patch
deleted file mode 100644
index ba778c74e5115..0000000000000
--- a/patches.renesas/0399-ARM-shmobile-Allow-ARCH_SHMOBILE_MULTI-timer-configu.patch
+++ /dev/null
@@ -1,61 +0,0 @@
-From 85724d89ea3373bff63887efcfb17f94b95a1e28 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Thu, 18 Jul 2013 05:31:27 +0900
-Subject: ARM: shmobile: Allow ARCH_SHMOBILE_MULTI timer configuration
-
-Move the timer configuration bits to allow use in
-case of ARCH_SHMOBILE or ARCH_SHMOBILE_MULTI.
-
-The timers all make use of the regular driver model
-so they are safe to enable for ARCH_MULTIPLATFORM.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit fd071b669ee2405e986636e389a3d1b6776e50a0)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/Kconfig | 16 +++++++++++-----
- 1 file changed, 11 insertions(+), 5 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
-index e7c399c1..af946061 100644
---- a/arch/arm/mach-shmobile/Kconfig
-+++ b/arch/arm/mach-shmobile/Kconfig
-@@ -32,6 +32,8 @@ config MACH_KZM9D_REFERENCE
- 	   of not supporting a number of devices.
- 
- 	   This is intended to aid developers
-+
-+comment "SH-Mobile System Configuration"
- endif
- 
- if ARCH_SHMOBILE
-@@ -257,6 +259,15 @@ config CPU_HAS_INTEVT
-         bool
- 	default y
- 
-+config SH_CLK_CPG
-+	bool
-+
-+source "drivers/sh/Kconfig"
-+
-+endif
-+
-+if ARCH_SHMOBILE || ARCH_SHMOBILE_MULTI
-+
- menu "Timer and clock configuration"
- 
- config SHMOBILE_TIMER_HZ
-@@ -291,9 +302,4 @@ config EM_TIMER_STI
- 
- endmenu
- 
--config SH_CLK_CPG
--	bool
--
--source "drivers/sh/Kconfig"
--
- endif
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0400-ARM-shmobile-lager-reference-Add-LED6-LED8-to-the-de.patch b/patches.renesas/0400-ARM-shmobile-lager-reference-Add-LED6-LED8-to-the-de.patch
deleted file mode 100644
index 13bf48421e929..0000000000000
--- a/patches.renesas/0400-ARM-shmobile-lager-reference-Add-LED6-LED8-to-the-de.patch
+++ /dev/null
@@ -1,48 +0,0 @@
-From 6600086d728fa905fe3ade165cfb977be5178f80 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 16 Jul 2013 11:45:56 +0200
-Subject: ARM: shmobile: lager-reference: Add LED6-LED8 to the device tree
-
-LED6 to LED8 are GPIO LEDs. Add corresponding DT nodes.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 466f302e076236a4796079681ca2a2f34a5792a3)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7790-lager-reference.dts | 14 ++++++++++++++
- 1 file changed, 14 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a7790-lager-reference.dts b/arch/arm/boot/dts/r8a7790-lager-reference.dts
-index fa5b81bd..5ee71cf5 100644
---- a/arch/arm/boot/dts/r8a7790-lager-reference.dts
-+++ b/arch/arm/boot/dts/r8a7790-lager-reference.dts
-@@ -10,6 +10,7 @@
- 
- /dts-v1/;
- /include/ "r8a7790.dtsi"
-+#include <dt-bindings/gpio/gpio.h>
- 
- / {
- 	model = "Lager";
-@@ -28,4 +29,17 @@
- 		#address-cells = <1>;
- 		#size-cells = <1>;
- 	};
-+
-+	leds {
-+		compatible = "gpio-leds";
-+		led6 {
-+			gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>;
-+		};
-+		led7 {
-+			gpios = <&gpio4 23 GPIO_ACTIVE_HIGH>;
-+		};
-+		led8 {
-+			gpios = <&gpio5 17 GPIO_ACTIVE_HIGH>;
-+		};
-+	};
- };
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0401-ARCH-ARM-shmobile-Remove-kota2-board-support.patch b/patches.renesas/0401-ARCH-ARM-shmobile-Remove-kota2-board-support.patch
deleted file mode 100644
index 796952aeb55f1..0000000000000
--- a/patches.renesas/0401-ARCH-ARM-shmobile-Remove-kota2-board-support.patch
+++ /dev/null
@@ -1,751 +0,0 @@
-From 8d25a0766302eb96ce9a4f25d1cb67ceb068d867 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Mon, 22 Jul 2013 10:23:09 +0900
-Subject: ARCH: ARM: shmobile: Remove kota2 board support
-
-Remove support for the sh73a0 based kota2 board.
-
-The sh73a0 SoC is continued to be supported using
-the kzm9g board.
-
-Acked-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 5fa6d27612635f4b3e6c19d763c0a65275933898)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/configs/kota2_defconfig     | 121 --------
- arch/arm/mach-shmobile/Kconfig       |   6 -
- arch/arm/mach-shmobile/Makefile      |   1 -
- arch/arm/mach-shmobile/Makefile.boot |   1 -
- arch/arm/mach-shmobile/board-kota2.c | 550 -----------------------------------
- 5 files changed, 679 deletions(-)
- delete mode 100644 arch/arm/configs/kota2_defconfig
- delete mode 100644 arch/arm/mach-shmobile/board-kota2.c
-
-diff --git a/arch/arm/configs/kota2_defconfig b/arch/arm/configs/kota2_defconfig
-deleted file mode 100644
-index 57ad3d47..00000000
---- a/arch/arm/configs/kota2_defconfig
-+++ /dev/null
-@@ -1,121 +0,0 @@
--# CONFIG_ARM_PATCH_PHYS_VIRT is not set
--CONFIG_EXPERIMENTAL=y
--CONFIG_SYSVIPC=y
--CONFIG_IKCONFIG=y
--CONFIG_IKCONFIG_PROC=y
--CONFIG_LOG_BUF_SHIFT=16
--CONFIG_CGROUPS=y
--CONFIG_CPUSETS=y
--CONFIG_NAMESPACES=y
--# CONFIG_UTS_NS is not set
--# CONFIG_IPC_NS is not set
--# CONFIG_USER_NS is not set
--# CONFIG_PID_NS is not set
--CONFIG_SYSCTL_SYSCALL=y
--CONFIG_EMBEDDED=y
--CONFIG_SLAB=y
--# CONFIG_BLK_DEV_BSG is not set
--# CONFIG_IOSCHED_DEADLINE is not set
--# CONFIG_IOSCHED_CFQ is not set
--CONFIG_ARCH_SHMOBILE=y
--CONFIG_KEYBOARD_GPIO_POLLED=y
--CONFIG_ARCH_SH73A0=y
--CONFIG_MACH_KOTA2=y
--CONFIG_MEMORY_SIZE=0x1e000000
--# CONFIG_SH_TIMER_TMU is not set
--# CONFIG_SWP_EMULATE is not set
--CONFIG_CPU_BPREDICT_DISABLE=y
--CONFIG_ARM_ERRATA_460075=y
--CONFIG_ARM_ERRATA_742230=y
--CONFIG_ARM_ERRATA_742231=y
--CONFIG_PL310_ERRATA_588369=y
--CONFIG_ARM_ERRATA_720789=y
--CONFIG_PL310_ERRATA_727915=y
--CONFIG_ARM_ERRATA_743622=y
--CONFIG_ARM_ERRATA_751472=y
--CONFIG_PL310_ERRATA_753970=y
--CONFIG_ARM_ERRATA_754322=y
--CONFIG_PL310_ERRATA_769419=y
--CONFIG_NO_HZ=y
--CONFIG_SMP=y
--CONFIG_AEABI=y
--# CONFIG_OABI_COMPAT is not set
--CONFIG_HIGHMEM=y
--CONFIG_ZBOOT_ROM_TEXT=0x0
--CONFIG_ZBOOT_ROM_BSS=0x0
--CONFIG_CMDLINE="console=ttySC2,115200 earlyprintk=sh-sci.2,115200 ignore_loglevel"
--CONFIG_CMDLINE_FORCE=y
--CONFIG_KEXEC=y
--CONFIG_CPU_IDLE=y
--# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
--CONFIG_PM_RUNTIME=y
--CONFIG_NET=y
--CONFIG_PACKET=y
--CONFIG_UNIX=y
--CONFIG_INET=y
--CONFIG_IP_PNP=y
--CONFIG_IP_PNP_DHCP=y
--# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
--# CONFIG_INET_XFRM_MODE_TUNNEL is not set
--# CONFIG_INET_XFRM_MODE_BEET is not set
--# CONFIG_INET_LRO is not set
--# CONFIG_INET_DIAG is not set
--# CONFIG_IPV6 is not set
--CONFIG_CFG80211=y
--CONFIG_WIRELESS_EXT_SYSFS=y
--CONFIG_MAC80211=y
--CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
--# CONFIG_BLK_DEV is not set
--CONFIG_NETDEVICES=y
--# CONFIG_NET_VENDOR_BROADCOM is not set
--# CONFIG_NET_VENDOR_CHELSIO is not set
--# CONFIG_NET_VENDOR_FARADAY is not set
--# CONFIG_NET_VENDOR_INTEL is not set
--# CONFIG_NET_VENDOR_MARVELL is not set
--# CONFIG_NET_VENDOR_MICREL is not set
--# CONFIG_NET_VENDOR_NATSEMI is not set
--# CONFIG_NET_VENDOR_SEEQ is not set
--CONFIG_SMSC911X=y
--# CONFIG_NET_VENDOR_STMICRO is not set
--CONFIG_B43=y
--CONFIG_B43_PHY_N=y
--CONFIG_B43_DEBUG=y
--CONFIG_INPUT_SPARSEKMAP=y
--# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
--CONFIG_INPUT_EVDEV=y
--# CONFIG_KEYBOARD_ATKBD is not set
--CONFIG_KEYBOARD_GPIO=y
--CONFIG_KEYBOARD_SH_KEYSC=y
--# CONFIG_INPUT_MOUSE is not set
--# CONFIG_LEGACY_PTYS is not set
--CONFIG_SERIAL_SH_SCI=y
--CONFIG_SERIAL_SH_SCI_NR_UARTS=9
--CONFIG_SERIAL_SH_SCI_CONSOLE=y
--# CONFIG_HW_RANDOM is not set
--CONFIG_I2C_SH_MOBILE=y
--# CONFIG_HWMON is not set
--CONFIG_BCMA=y
--CONFIG_BCMA_DEBUG=y
--CONFIG_FB=y
--CONFIG_FB_SH_MOBILE_LCDC=y
--CONFIG_LCD_PLATFORM=y
--CONFIG_FRAMEBUFFER_CONSOLE=y
--CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
--# CONFIG_HID_SUPPORT is not set
--# CONFIG_USB_SUPPORT is not set
--CONFIG_MMC=y
--CONFIG_MMC_SDHI=y
--CONFIG_MMC_SH_MMCIF=y
--CONFIG_NEW_LEDS=y
--CONFIG_LEDS_CLASS=y
--CONFIG_LEDS_GPIO=y
--CONFIG_LEDS_RENESAS_TPU=y
--CONFIG_LEDS_TRIGGERS=y
--# CONFIG_DNOTIFY is not set
--CONFIG_TMPFS=y
--# CONFIG_MISC_FILESYSTEMS is not set
--CONFIG_MAGIC_SYSRQ=y
--CONFIG_DEBUG_INFO=y
--CONFIG_DEBUG_INFO_REDUCED=y
--# CONFIG_FTRACE is not set
--CONFIG_DEBUG_USER=y
-diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
-index af946061..e14cd2a0 100644
---- a/arch/arm/mach-shmobile/Kconfig
-+++ b/arch/arm/mach-shmobile/Kconfig
-@@ -140,12 +140,6 @@ config MACH_MACKEREL
- 	select SND_SOC_AK4642 if SND_SIMPLE_CARD
- 	select USE_OF
- 
--config MACH_KOTA2
--	bool "KOTA2 board"
--	depends on ARCH_SH73A0
--	select ARCH_REQUIRE_GPIOLIB
--	select REGULATOR_FIXED_VOLTAGE if REGULATOR
--
- config MACH_ARMADILLO800EVA
- 	bool "Armadillo-800 EVA board"
- 	depends on ARCH_R8A7740
-diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
-index 8bda014c..de530b2f 100644
---- a/arch/arm/mach-shmobile/Makefile
-+++ b/arch/arm/mach-shmobile/Makefile
-@@ -54,7 +54,6 @@ obj-$(CONFIG_MACH_AG5EVM)	+= board-ag5evm.o
- obj-$(CONFIG_MACH_APE6EVM)	+= board-ape6evm.o
- obj-$(CONFIG_MACH_APE6EVM_REFERENCE)	+= board-ape6evm-reference.o
- obj-$(CONFIG_MACH_MACKEREL)	+= board-mackerel.o
--obj-$(CONFIG_MACH_KOTA2)	+= board-kota2.o
- obj-$(CONFIG_MACH_BOCKW)	+= board-bockw.o
- obj-$(CONFIG_MACH_MARZEN)	+= board-marzen.o
- obj-$(CONFIG_MACH_MARZEN_REFERENCE)	+= board-marzen-reference.o
-diff --git a/arch/arm/mach-shmobile/Makefile.boot b/arch/arm/mach-shmobile/Makefile.boot
-index 761d7b14..0930c683 100644
---- a/arch/arm/mach-shmobile/Makefile.boot
-+++ b/arch/arm/mach-shmobile/Makefile.boot
-@@ -6,7 +6,6 @@ loadaddr-$(CONFIG_MACH_APE6EVM_REFERENCE) += 0x40008000
- loadaddr-$(CONFIG_MACH_ARMADILLO800EVA) += 0x40008000
- loadaddr-$(CONFIG_MACH_ARMADILLO800EVA_REFERENCE) += 0x40008000
- loadaddr-$(CONFIG_MACH_BOCKW) += 0x60008000
--loadaddr-$(CONFIG_MACH_KOTA2) += 0x41008000
- loadaddr-$(CONFIG_MACH_KZM9D) += 0x40008000
- loadaddr-$(CONFIG_MACH_KZM9D_REFERENCE) += 0x40008000
- loadaddr-$(CONFIG_MACH_KZM9G) += 0x41008000
-diff --git a/arch/arm/mach-shmobile/board-kota2.c b/arch/arm/mach-shmobile/board-kota2.c
-deleted file mode 100644
-index 6af20d90..00000000
---- a/arch/arm/mach-shmobile/board-kota2.c
-+++ /dev/null
-@@ -1,550 +0,0 @@
--/*
-- * kota2 board support
-- *
-- * Copyright (C) 2011  Renesas Solutions Corp.
-- * Copyright (C) 2011  Magnus Damm
-- * Copyright (C) 2010  Takashi Yoshii <yoshii.takashi.zj@renesas.com>
-- * Copyright (C) 2009  Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
-- *
-- * This program is free software; you can redistribute it and/or modify
-- * it under the terms of the GNU General Public License as published by
-- * the Free Software Foundation; version 2 of the License.
-- *
-- * This program is distributed in the hope that it will be useful,
-- * but WITHOUT ANY WARRANTY; without even the implied warranty of
-- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-- * GNU General Public License for more details.
-- *
-- * You should have received a copy of the GNU General Public License
-- * along with this program; if not, write to the Free Software
-- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
-- */
--
--#include <linux/kernel.h>
--#include <linux/init.h>
--#include <linux/interrupt.h>
--#include <linux/irq.h>
--#include <linux/pinctrl/machine.h>
--#include <linux/pinctrl/pinconf-generic.h>
--#include <linux/platform_data/pwm-renesas-tpu.h>
--#include <linux/platform_device.h>
--#include <linux/delay.h>
--#include <linux/io.h>
--#include <linux/regulator/fixed.h>
--#include <linux/regulator/machine.h>
--#include <linux/smsc911x.h>
--#include <linux/gpio.h>
--#include <linux/input.h>
--#include <linux/input/sh_keysc.h>
--#include <linux/gpio_keys.h>
--#include <linux/leds.h>
--#include <linux/leds_pwm.h>
--#include <linux/irqchip/arm-gic.h>
--#include <linux/mmc/host.h>
--#include <linux/mmc/sh_mmcif.h>
--#include <linux/mfd/tmio.h>
--#include <linux/mmc/sh_mobile_sdhi.h>
--#include <mach/hardware.h>
--#include <mach/irqs.h>
--#include <mach/sh73a0.h>
--#include <mach/common.h>
--#include <asm/mach-types.h>
--#include <asm/mach/arch.h>
--#include <asm/mach/time.h>
--#include <asm/hardware/cache-l2x0.h>
--#include <asm/traps.h>
--
--/* Dummy supplies, where voltage doesn't matter */
--static struct regulator_consumer_supply dummy_supplies[] = {
--	REGULATOR_SUPPLY("vddvario", "smsc911x"),
--	REGULATOR_SUPPLY("vdd33a", "smsc911x"),
--};
--
--/* SMSC 9220 */
--static struct resource smsc9220_resources[] = {
--	[0] = {
--		.start		= 0x14000000, /* CS5A */
--		.end		= 0x140000ff, /* A1->A7 */
--		.flags		= IORESOURCE_MEM,
--	},
--	[1] = {
--		.start		= SH73A0_PINT0_IRQ(2), /* PINTA2 */
--		.flags		= IORESOURCE_IRQ,
--	},
--};
--
--static struct smsc911x_platform_config smsc9220_platdata = {
--	.flags		= SMSC911X_USE_32BIT, /* 32-bit SW on 16-bit HW bus */
--	.phy_interface	= PHY_INTERFACE_MODE_MII,
--	.irq_polarity	= SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
--	.irq_type	= SMSC911X_IRQ_TYPE_PUSH_PULL,
--};
--
--static struct platform_device eth_device = {
--	.name		= "smsc911x",
--	.id		= 0,
--	.dev  = {
--		.platform_data = &smsc9220_platdata,
--	},
--	.resource	= smsc9220_resources,
--	.num_resources	= ARRAY_SIZE(smsc9220_resources),
--};
--
--/* KEYSC */
--static struct sh_keysc_info keysc_platdata = {
--	.mode		= SH_KEYSC_MODE_6,
--	.scan_timing	= 3,
--	.delay		= 100,
--	.keycodes	= {
--		KEY_NUMERIC_STAR, KEY_NUMERIC_0, KEY_NUMERIC_POUND,
--		0, 0, 0, 0, 0,
--		KEY_NUMERIC_7, KEY_NUMERIC_8, KEY_NUMERIC_9,
--		0, KEY_DOWN, 0, 0, 0,
--		KEY_NUMERIC_4, KEY_NUMERIC_5, KEY_NUMERIC_6,
--		KEY_LEFT, KEY_ENTER, KEY_RIGHT, 0, 0,
--		KEY_NUMERIC_1, KEY_NUMERIC_2, KEY_NUMERIC_3,
--		0, KEY_UP, 0, 0, 0,
--		0, 0, 0, 0, 0, 0, 0, 0,
--		0, 0, 0, 0, 0, 0, 0, 0,
--		0, 0, 0, 0, 0, 0, 0, 0,
--		0, 0, 0, 0, 0, 0, 0, 0,
--	},
--};
--
--static struct resource keysc_resources[] = {
--	[0] = {
--		.name	= "KEYSC",
--		.start	= 0xe61b0000,
--		.end	= 0xe61b0098 - 1,
--		.flags	= IORESOURCE_MEM,
--	},
--	[1] = {
--		.start	= gic_spi(71),
--		.flags	= IORESOURCE_IRQ,
--	},
--};
--
--static struct platform_device keysc_device = {
--	.name		= "sh_keysc",
--	.id		= 0,
--	.num_resources	= ARRAY_SIZE(keysc_resources),
--	.resource	= keysc_resources,
--	.dev		= {
--		.platform_data	= &keysc_platdata,
--	},
--};
--
--/* GPIO KEY */
--#define GPIO_KEY(c, g, d) { .code = c, .gpio = g, .desc = d, .active_low = 1 }
--
--static struct gpio_keys_button gpio_buttons[] = {
--	GPIO_KEY(KEY_VOLUMEUP, 56, "+"), /* S2: VOL+ [IRQ9] */
--	GPIO_KEY(KEY_VOLUMEDOWN, 54, "-"), /* S3: VOL- [IRQ10] */
--	GPIO_KEY(KEY_MENU, 27, "Menu"), /* S4: MENU [IRQ30] */
--	GPIO_KEY(KEY_HOMEPAGE, 26, "Home"), /* S5: HOME [IRQ31] */
--	GPIO_KEY(KEY_BACK, 11, "Back"), /* S6: BACK [IRQ0] */
--	GPIO_KEY(KEY_PHONE, 238, "Tel"), /* S7: TEL [IRQ11] */
--	GPIO_KEY(KEY_POWER, 239, "C1"), /* S8: CAM [IRQ13] */
--	GPIO_KEY(KEY_MAIL, 224, "Mail"), /* S9: MAIL [IRQ3] */
--	/* Omitted button "C3?": 223 - S10: CUST [IRQ8] */
--	GPIO_KEY(KEY_CAMERA, 164, "C2"), /* S11: CAM_HALF [IRQ25] */
--	/* Omitted button "?": 152 - S12: CAM_FULL [No IRQ] */
--};
--
--static struct gpio_keys_platform_data gpio_key_info = {
--	.buttons        = gpio_buttons,
--	.nbuttons       = ARRAY_SIZE(gpio_buttons),
--};
--
--static struct platform_device gpio_keys_device = {
--	.name   = "gpio-keys",
--	.id     = -1,
--	.dev    = {
--		.platform_data  = &gpio_key_info,
--	},
--};
--
--/* GPIO LED */
--#define GPIO_LED(n, g) { .name = n, .gpio = g }
--
--static struct gpio_led gpio_leds[] = {
--	GPIO_LED("G", 20), /* PORT20 [GPO0] -> LED7 -> "G" */
--	GPIO_LED("H", 21), /* PORT21 [GPO1] -> LED8 -> "H" */
--	GPIO_LED("J", 22), /* PORT22 [GPO2] -> LED9 -> "J" */
--};
--
--static struct gpio_led_platform_data gpio_leds_info = {
--	.leds		= gpio_leds,
--	.num_leds	= ARRAY_SIZE(gpio_leds),
--};
--
--static struct platform_device gpio_leds_device = {
--	.name   = "leds-gpio",
--	.id     = -1,
--	.dev    = {
--		.platform_data  = &gpio_leds_info,
--	},
--};
--
--/* TPU LED */
--static struct resource tpu1_pwm_resources[] = {
--	[0] = {
--		.start	= 0xe6610000,
--		.end	= 0xe66100ff,
--		.flags	= IORESOURCE_MEM,
--	},
--};
--
--static struct platform_device tpu1_pwm_device = {
--	.name = "renesas-tpu-pwm",
--	.id = 1,
--	.num_resources	= ARRAY_SIZE(tpu1_pwm_resources),
--	.resource	= tpu1_pwm_resources,
--};
--
--static struct resource tpu2_pwm_resources[] = {
--	[0] = {
--		.start	= 0xe6620000,
--		.end	= 0xe66200ff,
--		.flags	= IORESOURCE_MEM,
--	},
--};
--
--static struct platform_device tpu2_pwm_device = {
--	.name = "renesas-tpu-pwm",
--	.id = 2,
--	.num_resources	= ARRAY_SIZE(tpu2_pwm_resources),
--	.resource	= tpu2_pwm_resources,
--};
--
--static struct resource tpu3_pwm_resources[] = {
--	[0] = {
--		.start	= 0xe6630000,
--		.end	= 0xe66300ff,
--		.flags	= IORESOURCE_MEM,
--	},
--};
--
--static struct platform_device tpu3_pwm_device = {
--	.name = "renesas-tpu-pwm",
--	.id = 3,
--	.num_resources	= ARRAY_SIZE(tpu3_pwm_resources),
--	.resource	= tpu3_pwm_resources,
--};
--
--static struct resource tpu4_pwm_resources[] = {
--	[0] = {
--		.start	= 0xe6640000,
--		.end	= 0xe66400ff,
--		.flags	= IORESOURCE_MEM,
--	},
--};
--
--static struct platform_device tpu4_pwm_device = {
--	.name = "renesas-tpu-pwm",
--	.id = 4,
--	.num_resources	= ARRAY_SIZE(tpu4_pwm_resources),
--	.resource	= tpu4_pwm_resources,
--};
--
--static struct pwm_lookup pwm_lookup[] = {
--	PWM_LOOKUP("renesas-tpu-pwm.1", 2, "leds-pwm.0", "V2513"),
--	PWM_LOOKUP("renesas-tpu-pwm.2", 1, "leds-pwm.0", "V2515"),
--	PWM_LOOKUP("renesas-tpu-pwm.3", 0, "leds-pwm.0", "KEYLED"),
--	PWM_LOOKUP("renesas-tpu-pwm.4", 1, "leds-pwm.0", "V2514"),
--};
--
--static struct led_pwm tpu_pwm_leds[] = {
--	{
--		.name		= "V2513",
--		.max_brightness	= 1000,
--	}, {
--		.name		= "V2515",
--		.max_brightness	= 1000,
--	}, {
--		.name		= "KEYLED",
--		.max_brightness	= 1000,
--	}, {
--		.name		= "V2514",
--		.max_brightness	= 1000,
--	},
--};
--
--static struct led_pwm_platform_data leds_pwm_pdata = {
--	.num_leds = ARRAY_SIZE(tpu_pwm_leds),
--	.leds = tpu_pwm_leds,
--};
--
--static struct platform_device leds_pwm_device = {
--	.name = "leds-pwm",
--	.id = 0,
--	.dev = {
--		.platform_data = &leds_pwm_pdata,
--	},
--};
--
--/* Fixed 1.8V regulator to be used by MMCIF */
--static struct regulator_consumer_supply fixed1v8_power_consumers[] =
--{
--	REGULATOR_SUPPLY("vmmc", "sh_mmcif.0"),
--	REGULATOR_SUPPLY("vqmmc", "sh_mmcif.0"),
--};
--
--/* MMCIF */
--static struct resource mmcif_resources[] = {
--	[0] = {
--		.name   = "MMCIF",
--		.start  = 0xe6bd0000,
--		.end    = 0xe6bd00ff,
--		.flags  = IORESOURCE_MEM,
--	},
--	[1] = {
--		.start  = gic_spi(140),
--		.flags  = IORESOURCE_IRQ,
--	},
--	[2] = {
--		.start  = gic_spi(141),
--		.flags  = IORESOURCE_IRQ,
--	},
--};
--
--static struct sh_mmcif_plat_data mmcif_info = {
--	.ocr            = MMC_VDD_165_195,
--	.caps           = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
--};
--
--static struct platform_device mmcif_device = {
--	.name           = "sh_mmcif",
--	.id             = 0,
--	.dev            = {
--		.platform_data          = &mmcif_info,
--	},
--	.num_resources  = ARRAY_SIZE(mmcif_resources),
--	.resource       = mmcif_resources,
--};
--
--/* Fixed 3.3V regulator to be used by SDHI0 and SDHI1 */
--static struct regulator_consumer_supply fixed3v3_power_consumers[] =
--{
--	REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"),
--	REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"),
--	REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.1"),
--	REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.1"),
--};
--
--/* SDHI0 */
--static struct sh_mobile_sdhi_info sdhi0_info = {
--	.tmio_caps      = MMC_CAP_SD_HIGHSPEED,
--	.tmio_flags     = TMIO_MMC_WRPROTECT_DISABLE | TMIO_MMC_HAS_IDLE_WAIT,
--};
--
--static struct resource sdhi0_resources[] = {
--	[0] = {
--		.name   = "SDHI0",
--		.start  = 0xee100000,
--		.end    = 0xee1000ff,
--		.flags  = IORESOURCE_MEM,
--	},
--	[1] = {
--		.start  = gic_spi(83),
--		.flags  = IORESOURCE_IRQ,
--	},
--	[2] = {
--		.start  = gic_spi(84),
--		.flags  = IORESOURCE_IRQ,
--	},
--	[3] = {
--		.start	= gic_spi(85),
--		.flags	= IORESOURCE_IRQ,
--	},
--};
--
--static struct platform_device sdhi0_device = {
--	.name           = "sh_mobile_sdhi",
--	.id             = 0,
--	.num_resources  = ARRAY_SIZE(sdhi0_resources),
--	.resource       = sdhi0_resources,
--	.dev    = {
--		.platform_data  = &sdhi0_info,
--	},
--};
--
--/* SDHI1 */
--static struct sh_mobile_sdhi_info sdhi1_info = {
--	.tmio_caps      = MMC_CAP_NONREMOVABLE | MMC_CAP_SDIO_IRQ,
--	.tmio_flags     = TMIO_MMC_WRPROTECT_DISABLE | TMIO_MMC_HAS_IDLE_WAIT,
--};
--
--static struct resource sdhi1_resources[] = {
--	[0] = {
--		.name   = "SDHI1",
--		.start  = 0xee120000,
--		.end    = 0xee1200ff,
--		.flags  = IORESOURCE_MEM,
--	},
--	[1] = {
--		.start  = gic_spi(87),
--		.flags  = IORESOURCE_IRQ,
--	},
--	[2] = {
--		.start  = gic_spi(88),
--		.flags  = IORESOURCE_IRQ,
--	},
--	[3] = {
--		.start	= gic_spi(89),
--		.flags	= IORESOURCE_IRQ,
--	},
--};
--
--static struct platform_device sdhi1_device = {
--	.name           = "sh_mobile_sdhi",
--	.id             = 1,
--	.num_resources  = ARRAY_SIZE(sdhi1_resources),
--	.resource       = sdhi1_resources,
--	.dev    = {
--		.platform_data  = &sdhi1_info,
--	},
--};
--
--static struct platform_device *kota2_devices[] __initdata = {
--	&eth_device,
--	&keysc_device,
--	&gpio_keys_device,
--	&gpio_leds_device,
--	&tpu1_pwm_device,
--	&tpu2_pwm_device,
--	&tpu3_pwm_device,
--	&tpu4_pwm_device,
--	&leds_pwm_device,
--	&mmcif_device,
--	&sdhi0_device,
--	&sdhi1_device,
--};
--
--static unsigned long pin_pullup_conf[] = {
--	PIN_CONF_PACKED(PIN_CONFIG_BIAS_PULL_UP, 0),
--};
--
--static const struct pinctrl_map kota2_pinctrl_map[] = {
--	/* KEYSC */
--	PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0",
--				  "keysc_in8", "keysc"),
--	PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0",
--				  "keysc_out04", "keysc"),
--	PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0",
--				  "keysc_out5", "keysc"),
--	PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0",
--				  "keysc_out6_0", "keysc"),
--	PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0",
--				  "keysc_out7_0", "keysc"),
--	PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0",
--				  "keysc_out8_0", "keysc"),
--	PIN_MAP_CONFIGS_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0",
--				      "keysc_in8", pin_pullup_conf),
--	/* MMCIF */
--	PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh73a0",
--				  "mmc0_data8_0", "mmc0"),
--	PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh73a0",
--				  "mmc0_ctrl_0", "mmc0"),
--	PIN_MAP_CONFIGS_PIN_DEFAULT("sh_mmcif.0", "pfc-sh73a0",
--				    "PORT279", pin_pullup_conf),
--	PIN_MAP_CONFIGS_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh73a0",
--				      "mmc0_data8_0", pin_pullup_conf),
--	/* SCIFA2 (UART2) */
--	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.2", "pfc-sh73a0",
--				  "scifa2_data_0", "scifa2"),
--	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.2", "pfc-sh73a0",
--				  "scifa2_ctrl_0", "scifa2"),
--	/* SCIFA4 (UART1) */
--	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.4", "pfc-sh73a0",
--				  "scifa4_data", "scifa4"),
--	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.4", "pfc-sh73a0",
--				  "scifa4_ctrl", "scifa4"),
--	/* SCIFB (BT) */
--	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.8", "pfc-sh73a0",
--				  "scifb_data_0", "scifb"),
--	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.8", "pfc-sh73a0",
--				  "scifb_clk_0", "scifb"),
--	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.8", "pfc-sh73a0",
--				  "scifb_ctrl_0", "scifb"),
--	/* SDHI0 (microSD) */
--	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh73a0",
--				  "sdhi0_data4", "sdhi0"),
--	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh73a0",
--				  "sdhi0_ctrl", "sdhi0"),
--	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh73a0",
--				  "sdhi0_cd", "sdhi0"),
--	PIN_MAP_CONFIGS_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh73a0",
--				      "sdhi0_data4", pin_pullup_conf),
--	PIN_MAP_CONFIGS_PIN_DEFAULT("sh_mobile_sdhi.0", "pfc-sh73a0",
--				    "PORT256", pin_pullup_conf),
--	PIN_MAP_CONFIGS_PIN_DEFAULT("sh_mobile_sdhi.0", "pfc-sh73a0",
--				    "PORT251", pin_pullup_conf),
--	/* SDHI1 (BCM4330) */
--	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-sh73a0",
--				  "sdhi1_data4", "sdhi1"),
--	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-sh73a0",
--				  "sdhi1_ctrl", "sdhi1"),
--	PIN_MAP_CONFIGS_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-sh73a0",
--				      "sdhi1_data4", pin_pullup_conf),
--	PIN_MAP_CONFIGS_PIN_DEFAULT("sh_mobile_sdhi.1", "pfc-sh73a0",
--				    "PORT263", pin_pullup_conf),
--	/* SMSC911X */
--	PIN_MAP_MUX_GROUP_DEFAULT("smsc911x.0", "pfc-sh73a0",
--				  "bsc_data_0_7", "bsc"),
--	PIN_MAP_MUX_GROUP_DEFAULT("smsc911x.0", "pfc-sh73a0",
--				  "bsc_data_8_15", "bsc"),
--	PIN_MAP_MUX_GROUP_DEFAULT("smsc911x.0", "pfc-sh73a0",
--				  "bsc_cs5_a", "bsc"),
--	PIN_MAP_MUX_GROUP_DEFAULT("smsc911x.0", "pfc-sh73a0",
--				  "bsc_we0", "bsc"),
--	/* TPU */
--	PIN_MAP_MUX_GROUP_DEFAULT("renesas-tpu-pwm.1", "pfc-sh73a0",
--				  "tpu1_to2", "tpu1"),
--	PIN_MAP_MUX_GROUP_DEFAULT("renesas-tpu-pwm.2", "pfc-sh73a0",
--				  "tpu2_to1", "tpu2"),
--	PIN_MAP_MUX_GROUP_DEFAULT("renesas-tpu-pwm.3", "pfc-sh73a0",
--				  "tpu3_to0", "tpu3"),
--	PIN_MAP_MUX_GROUP_DEFAULT("renesas-tpu-pwm.4", "pfc-sh73a0",
--				  "tpu4_to1", "tpu4"),
--};
--
--static void __init kota2_init(void)
--{
--	regulator_register_always_on(0, "fixed-1.8V", fixed1v8_power_consumers,
--				     ARRAY_SIZE(fixed1v8_power_consumers), 1800000);
--	regulator_register_always_on(1, "fixed-3.3V", fixed3v3_power_consumers,
--				     ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
--	regulator_register_fixed(2, dummy_supplies, ARRAY_SIZE(dummy_supplies));
--
--	pinctrl_register_mappings(kota2_pinctrl_map,
--				  ARRAY_SIZE(kota2_pinctrl_map));
--	pwm_add_table(pwm_lookup, ARRAY_SIZE(pwm_lookup));
--
--	sh73a0_pinmux_init();
--
--	/* SMSC911X */
--	gpio_request_one(144, GPIOF_IN, NULL); /* PINTA2 */
--	gpio_request_one(145, GPIOF_OUT_INIT_HIGH, NULL); /* RESET */
--
--	/* MMCIF */
--	gpio_request_one(208, GPIOF_OUT_INIT_HIGH, NULL); /* Reset */
--
--#ifdef CONFIG_CACHE_L2X0
--	/* Early BRESP enable, Shared attribute override enable, 64K*8way */
--	l2x0_init(IOMEM(0xf0100000), 0x40460000, 0x82000fff);
--#endif
--	sh73a0_add_standard_devices();
--	platform_add_devices(kota2_devices, ARRAY_SIZE(kota2_devices));
--}
--
--MACHINE_START(KOTA2, "kota2")
--	.smp		= smp_ops(sh73a0_smp_ops),
--	.map_io		= sh73a0_map_io,
--	.init_early	= sh73a0_add_early_devices,
--	.nr_irqs	= NR_IRQS_LEGACY,
--	.init_irq	= sh73a0_init_irq,
--	.init_machine	= kota2_init,
--	.init_late	= shmobile_init_late,
--	.init_time	= sh73a0_earlytimer_init,
--MACHINE_END
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0402-ARCH-ARM-shmobile-Remove-ag5evm-board-support.patch b/patches.renesas/0402-ARCH-ARM-shmobile-Remove-ag5evm-board-support.patch
deleted file mode 100644
index c456a87855673..0000000000000
--- a/patches.renesas/0402-ARCH-ARM-shmobile-Remove-ag5evm-board-support.patch
+++ /dev/null
@@ -1,802 +0,0 @@
-From 7ec795033fa4821e91978394a4d5adbc98f73bc9 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Mon, 22 Jul 2013 10:23:09 +0900
-Subject: ARCH: ARM: shmobile: Remove ag5evm board support
-
-Remove support for the sh73a0 based ag5evm board.
-
-The sh73a0 SoC is continued to be supported using
-the kzm9g board.
-
-Acked-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit c0bb9b3027690e10cf8f20a027039db3c7a50d98)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/configs/ag5evm_defconfig     |  83 -----
- arch/arm/mach-shmobile/Kconfig        |   7 -
- arch/arm/mach-shmobile/Makefile       |   1 -
- arch/arm/mach-shmobile/Makefile.boot  |   1 -
- arch/arm/mach-shmobile/board-ag5evm.c | 639 ----------------------------------
- 5 files changed, 731 deletions(-)
- delete mode 100644 arch/arm/configs/ag5evm_defconfig
- delete mode 100644 arch/arm/mach-shmobile/board-ag5evm.c
-
-diff --git a/arch/arm/configs/ag5evm_defconfig b/arch/arm/configs/ag5evm_defconfig
-deleted file mode 100644
-index 212ead35..00000000
---- a/arch/arm/configs/ag5evm_defconfig
-+++ /dev/null
-@@ -1,83 +0,0 @@
--CONFIG_EXPERIMENTAL=y
--CONFIG_SYSVIPC=y
--CONFIG_IKCONFIG=y
--CONFIG_IKCONFIG_PROC=y
--CONFIG_LOG_BUF_SHIFT=16
--CONFIG_NAMESPACES=y
--# CONFIG_UTS_NS is not set
--# CONFIG_IPC_NS is not set
--# CONFIG_USER_NS is not set
--# CONFIG_PID_NS is not set
--CONFIG_BLK_DEV_INITRD=y
--CONFIG_INITRAMFS_SOURCE=""
--CONFIG_EXPERT=y
--CONFIG_SLAB=y
--# CONFIG_BLK_DEV_BSG is not set
--# CONFIG_IOSCHED_DEADLINE is not set
--# CONFIG_IOSCHED_CFQ is not set
--CONFIG_ARCH_SHMOBILE=y
--CONFIG_ARCH_SH73A0=y
--CONFIG_MACH_AG5EVM=y
--CONFIG_MEMORY_SIZE=0x10000000
--CONFIG_CPU_BPREDICT_DISABLE=y
--CONFIG_ARM_ERRATA_430973=y
--CONFIG_ARM_ERRATA_458693=y
--CONFIG_NO_HZ=y
--CONFIG_AEABI=y
--# CONFIG_OABI_COMPAT is not set
--CONFIG_HIGHMEM=y
--CONFIG_ZBOOT_ROM_TEXT=0x0
--CONFIG_ZBOOT_ROM_BSS=0x0
--CONFIG_CMDLINE="console=tty0 console=ttySC2,115200 earlyprintk=sh-sci.2,115200 ignore_loglevel"
--CONFIG_CMDLINE_FORCE=y
--CONFIG_KEXEC=y
--# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
--CONFIG_PM=y
--# CONFIG_SUSPEND is not set
--CONFIG_PM_RUNTIME=y
--CONFIG_NET=y
--CONFIG_PACKET=y
--CONFIG_UNIX=y
--CONFIG_INET=y
--# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
--# CONFIG_INET_XFRM_MODE_TUNNEL is not set
--# CONFIG_INET_XFRM_MODE_BEET is not set
--# CONFIG_INET_LRO is not set
--# CONFIG_INET_DIAG is not set
--# CONFIG_IPV6 is not set
--# CONFIG_WIRELESS is not set
--CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
--# CONFIG_BLK_DEV is not set
--CONFIG_NETDEVICES=y
--CONFIG_NET_ETHERNET=y
--CONFIG_SMSC911X=y
--# CONFIG_NETDEV_1000 is not set
--# CONFIG_NETDEV_10000 is not set
--# CONFIG_WLAN is not set
--CONFIG_INPUT_SPARSEKMAP=y
--# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
--CONFIG_INPUT_EVDEV=y
--# CONFIG_INPUT_KEYBOARD is not set
--# CONFIG_INPUT_MOUSE is not set
--CONFIG_SERIAL_SH_SCI=y
--CONFIG_SERIAL_SH_SCI_NR_UARTS=9
--CONFIG_SERIAL_SH_SCI_CONSOLE=y
--# CONFIG_LEGACY_PTYS is not set
--# CONFIG_HW_RANDOM is not set
--CONFIG_I2C=y
--CONFIG_I2C_SH_MOBILE=y
--# CONFIG_HWMON is not set
--# CONFIG_MFD_SUPPORT is not set
--CONFIG_FB=y
--CONFIG_FB_SH_MOBILE_LCDC=y
--CONFIG_FRAMEBUFFER_CONSOLE=y
--CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
--# CONFIG_HID_SUPPORT is not set
--# CONFIG_USB_SUPPORT is not set
--# CONFIG_DNOTIFY is not set
--# CONFIG_INOTIFY_USER is not set
--CONFIG_TMPFS=y
--# CONFIG_MISC_FILESYSTEMS is not set
--CONFIG_MAGIC_SYSRQ=y
--CONFIG_DEBUG_KERNEL=y
--# CONFIG_FTRACE is not set
-diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
-index e14cd2a0..6f71c94c 100644
---- a/arch/arm/mach-shmobile/Kconfig
-+++ b/arch/arm/mach-shmobile/Kconfig
-@@ -109,13 +109,6 @@ config ARCH_EMEV2
- 
- comment "SH-Mobile Board Type"
- 
--config MACH_AG5EVM
--	bool "AG5EVM board"
--	depends on ARCH_SH73A0
--	select ARCH_REQUIRE_GPIOLIB
--	select REGULATOR_FIXED_VOLTAGE if REGULATOR
--	select SH_LCD_MIPI_DSI
--
- config MACH_APE6EVM
- 	bool "APE6EVM board"
- 	depends on ARCH_R8A73A4
-diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
-index de530b2f..91b4958b 100644
---- a/arch/arm/mach-shmobile/Makefile
-+++ b/arch/arm/mach-shmobile/Makefile
-@@ -50,7 +50,6 @@ obj-$(CONFIG_ARCH_R8A7779)	+= pm-r8a7779.o
- obj-$(CONFIG_ARCH_SH73A0)	+= pm-sh73a0.o
- 
- # Board objects
--obj-$(CONFIG_MACH_AG5EVM)	+= board-ag5evm.o
- obj-$(CONFIG_MACH_APE6EVM)	+= board-ape6evm.o
- obj-$(CONFIG_MACH_APE6EVM_REFERENCE)	+= board-ape6evm-reference.o
- obj-$(CONFIG_MACH_MACKEREL)	+= board-mackerel.o
-diff --git a/arch/arm/mach-shmobile/Makefile.boot b/arch/arm/mach-shmobile/Makefile.boot
-index 0930c683..c20435ef 100644
---- a/arch/arm/mach-shmobile/Makefile.boot
-+++ b/arch/arm/mach-shmobile/Makefile.boot
-@@ -1,6 +1,5 @@
- # per-board load address for uImage
- loadaddr-y	:=
--loadaddr-$(CONFIG_MACH_AG5EVM) += 0x40008000
- loadaddr-$(CONFIG_MACH_APE6EVM) += 0x40008000
- loadaddr-$(CONFIG_MACH_APE6EVM_REFERENCE) += 0x40008000
- loadaddr-$(CONFIG_MACH_ARMADILLO800EVA) += 0x40008000
-diff --git a/arch/arm/mach-shmobile/board-ag5evm.c b/arch/arm/mach-shmobile/board-ag5evm.c
-deleted file mode 100644
-index f6d64495..00000000
---- a/arch/arm/mach-shmobile/board-ag5evm.c
-+++ /dev/null
-@@ -1,639 +0,0 @@
--/*
-- * arch/arm/mach-shmobile/board-ag5evm.c
-- *
-- * Copyright (C) 2010  Takashi Yoshii <yoshii.takashi.zj@renesas.com>
-- * Copyright (C) 2009  Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
-- *
-- * This program is free software; you can redistribute it and/or modify
-- * it under the terms of the GNU General Public License as published by
-- * the Free Software Foundation; version 2 of the License.
-- *
-- * This program is distributed in the hope that it will be useful,
-- * but WITHOUT ANY WARRANTY; without even the implied warranty of
-- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-- * GNU General Public License for more details.
-- *
-- * You should have received a copy of the GNU General Public License
-- * along with this program; if not, write to the Free Software
-- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
-- *
-- */
--
--#include <linux/kernel.h>
--#include <linux/init.h>
--#include <linux/interrupt.h>
--#include <linux/irq.h>
--#include <linux/pinctrl/machine.h>
--#include <linux/pinctrl/pinconf-generic.h>
--#include <linux/platform_device.h>
--#include <linux/delay.h>
--#include <linux/io.h>
--#include <linux/dma-mapping.h>
--#include <linux/regulator/fixed.h>
--#include <linux/regulator/machine.h>
--#include <linux/serial_sci.h>
--#include <linux/smsc911x.h>
--#include <linux/gpio.h>
--#include <linux/videodev2.h>
--#include <linux/input.h>
--#include <linux/input/sh_keysc.h>
--#include <linux/mmc/host.h>
--#include <linux/mmc/sh_mmcif.h>
--#include <linux/mmc/sh_mobile_sdhi.h>
--#include <linux/mfd/tmio.h>
--#include <linux/platform_data/bd6107.h>
--#include <linux/sh_clk.h>
--#include <linux/irqchip/arm-gic.h>
--#include <video/sh_mobile_lcdc.h>
--#include <video/sh_mipi_dsi.h>
--#include <sound/sh_fsi.h>
--#include <mach/hardware.h>
--#include <mach/irqs.h>
--#include <mach/sh73a0.h>
--#include <mach/common.h>
--#include <asm/mach-types.h>
--#include <asm/mach/arch.h>
--#include <asm/hardware/cache-l2x0.h>
--#include <asm/traps.h>
--
--/* Dummy supplies, where voltage doesn't matter */
--static struct regulator_consumer_supply dummy_supplies[] = {
--	REGULATOR_SUPPLY("vddvario", "smsc911x"),
--	REGULATOR_SUPPLY("vdd33a", "smsc911x"),
--};
--
--static struct resource smsc9220_resources[] = {
--	[0] = {
--		.start		= 0x14000000,
--		.end		= 0x14000000 + SZ_64K - 1,
--		.flags		= IORESOURCE_MEM,
--	},
--	[1] = {
--		.start		= SH73A0_PINT0_IRQ(2), /* PINTA2 */
--		.flags		= IORESOURCE_IRQ,
--	},
--};
--
--static struct smsc911x_platform_config smsc9220_platdata = {
--	.flags		= SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
--	.phy_interface	= PHY_INTERFACE_MODE_MII,
--	.irq_polarity	= SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
--	.irq_type	= SMSC911X_IRQ_TYPE_PUSH_PULL,
--};
--
--static struct platform_device eth_device = {
--	.name		= "smsc911x",
--	.id		= 0,
--	.dev  = {
--		.platform_data = &smsc9220_platdata,
--	},
--	.resource	= smsc9220_resources,
--	.num_resources	= ARRAY_SIZE(smsc9220_resources),
--};
--
--static struct sh_keysc_info keysc_platdata = {
--	.mode		= SH_KEYSC_MODE_6,
--	.scan_timing	= 3,
--	.delay		= 100,
--	.keycodes	= {
--		KEY_A, KEY_B, KEY_C, KEY_D, KEY_E, KEY_F, KEY_G,
--		KEY_H, KEY_I, KEY_J, KEY_K, KEY_L, KEY_M, KEY_N,
--		KEY_O, KEY_P, KEY_Q, KEY_R, KEY_S, KEY_T, KEY_U,
--		KEY_V, KEY_W, KEY_X, KEY_Y, KEY_Z, KEY_HOME, KEY_SLEEP,
--		KEY_SPACE, KEY_9, KEY_6, KEY_3, KEY_WAKEUP, KEY_RIGHT, \
--		KEY_COFFEE,
--		KEY_0, KEY_8, KEY_5, KEY_2, KEY_DOWN, KEY_ENTER, KEY_UP,
--		KEY_KPASTERISK, KEY_7, KEY_4, KEY_1, KEY_STOP, KEY_LEFT, \
--		KEY_COMPUTER,
--	},
--};
--
--static struct resource keysc_resources[] = {
--	[0] = {
--		.name	= "KEYSC",
--		.start	= 0xe61b0000,
--		.end	= 0xe61b0098 - 1,
--		.flags	= IORESOURCE_MEM,
--	},
--	[1] = {
--		.start	= gic_spi(71),
--		.flags	= IORESOURCE_IRQ,
--	},
--};
--
--static struct platform_device keysc_device = {
--	.name		= "sh_keysc",
--	.id		= 0,
--	.num_resources	= ARRAY_SIZE(keysc_resources),
--	.resource	= keysc_resources,
--	.dev		= {
--		.platform_data	= &keysc_platdata,
--	},
--};
--
--/* FSI A */
--static struct resource fsi_resources[] = {
--	[0] = {
--		.name	= "FSI",
--		.start	= 0xEC230000,
--		.end	= 0xEC230400 - 1,
--		.flags	= IORESOURCE_MEM,
--	},
--	[1] = {
--		.start  = gic_spi(146),
--		.flags  = IORESOURCE_IRQ,
--	},
--};
--
--static struct platform_device fsi_device = {
--	.name		= "sh_fsi2",
--	.id		= -1,
--	.num_resources	= ARRAY_SIZE(fsi_resources),
--	.resource	= fsi_resources,
--};
--
--/* Fixed 1.8V regulator to be used by MMCIF */
--static struct regulator_consumer_supply fixed1v8_power_consumers[] =
--{
--	REGULATOR_SUPPLY("vmmc", "sh_mmcif.0"),
--	REGULATOR_SUPPLY("vqmmc", "sh_mmcif.0"),
--};
--
--static struct resource sh_mmcif_resources[] = {
--	[0] = {
--		.name	= "MMCIF",
--		.start	= 0xe6bd0000,
--		.end	= 0xe6bd00ff,
--		.flags	= IORESOURCE_MEM,
--	},
--	[1] = {
--		.start	= gic_spi(141),
--		.flags	= IORESOURCE_IRQ,
--	},
--	[2] = {
--		.start	= gic_spi(140),
--		.flags	= IORESOURCE_IRQ,
--	},
--};
--
--static struct sh_mmcif_plat_data sh_mmcif_platdata = {
--	.sup_pclk	= 0,
--	.ocr		= MMC_VDD_165_195,
--	.caps		= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
--	.slave_id_tx	= SHDMA_SLAVE_MMCIF_TX,
--	.slave_id_rx	= SHDMA_SLAVE_MMCIF_RX,
--};
--
--static struct platform_device mmc_device = {
--	.name		= "sh_mmcif",
--	.id		= 0,
--	.dev		= {
--		.dma_mask		= NULL,
--		.coherent_dma_mask	= 0xffffffff,
--		.platform_data		= &sh_mmcif_platdata,
--	},
--	.num_resources	= ARRAY_SIZE(sh_mmcif_resources),
--	.resource	= sh_mmcif_resources,
--};
--
--/* IrDA */
--static struct resource irda_resources[] = {
--	[0] = {
--		.start	= 0xE6D00000,
--		.end	= 0xE6D01FD4 - 1,
--		.flags  = IORESOURCE_MEM,
--	},
--	[1] = {
--		.start	= gic_spi(95),
--		.flags  = IORESOURCE_IRQ,
--	},
--};
--
--static struct platform_device irda_device = {
--	.name           = "sh_irda",
--	.id		= 0,
--	.resource       = irda_resources,
--	.num_resources  = ARRAY_SIZE(irda_resources),
--};
--
--/* MIPI-DSI */
--static struct resource mipidsi0_resources[] = {
--	[0] = {
--		.name	= "DSI0",
--		.start  = 0xfeab0000,
--		.end    = 0xfeab3fff,
--		.flags  = IORESOURCE_MEM,
--	},
--	[1] = {
--		.name	= "DSI0",
--		.start  = 0xfeab4000,
--		.end    = 0xfeab7fff,
--		.flags  = IORESOURCE_MEM,
--	},
--};
--
--static int sh_mipi_set_dot_clock(struct platform_device *pdev,
--				 void __iomem *base,
--				 int enable)
--{
--	struct clk *pck, *phy;
--	int ret;
--
--	pck = clk_get(&pdev->dev, "dsip_clk");
--	if (IS_ERR(pck)) {
--		ret = PTR_ERR(pck);
--		goto sh_mipi_set_dot_clock_pck_err;
--	}
--
--	phy = clk_get(&pdev->dev, "dsiphy_clk");
--	if (IS_ERR(phy)) {
--		ret = PTR_ERR(phy);
--		goto sh_mipi_set_dot_clock_phy_err;
--	}
--
--	if (enable) {
--		clk_set_rate(pck, clk_round_rate(pck,  24000000));
--		clk_set_rate(phy, clk_round_rate(pck, 510000000));
--		clk_enable(pck);
--		clk_enable(phy);
--	} else {
--		clk_disable(pck);
--		clk_disable(phy);
--	}
--
--	ret = 0;
--
--	clk_put(phy);
--sh_mipi_set_dot_clock_phy_err:
--	clk_put(pck);
--sh_mipi_set_dot_clock_pck_err:
--	return ret;
--}
--
--static struct sh_mipi_dsi_info mipidsi0_info = {
--	.data_format	= MIPI_RGB888,
--	.channel	= LCDC_CHAN_MAINLCD,
--	.lane		= 2,
--	.vsynw_offset	= 20,
--	.clksrc		= 1,
--	.flags		= SH_MIPI_DSI_HSABM		|
--			  SH_MIPI_DSI_SYNC_PULSES_MODE	|
--			  SH_MIPI_DSI_HSbyteCLK,
--	.set_dot_clock	= sh_mipi_set_dot_clock,
--};
--
--static struct platform_device mipidsi0_device = {
--	.name           = "sh-mipi-dsi",
--	.num_resources  = ARRAY_SIZE(mipidsi0_resources),
--	.resource       = mipidsi0_resources,
--	.id             = 0,
--	.dev	= {
--		.platform_data	= &mipidsi0_info,
--	},
--};
--
--/* LCDC0 and backlight */
--static const struct fb_videomode lcdc0_modes[] = {
--	{
--		.name		= "R63302(QHD)",
--		.xres		= 544,
--		.yres		= 961,
--		.left_margin	= 72,
--		.right_margin	= 600,
--		.hsync_len	= 16,
--		.upper_margin	= 8,
--		.lower_margin	= 8,
--		.vsync_len	= 2,
--		.sync		= FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
--	},
--};
--
--static struct sh_mobile_lcdc_info lcdc0_info = {
--	.clock_source = LCDC_CLK_PERIPHERAL,
--	.ch[0] = {
--		.chan = LCDC_CHAN_MAINLCD,
--		.interface_type = RGB24,
--		.clock_divider = 1,
--		.flags = LCDC_FLAGS_DWPOL,
--		.fourcc = V4L2_PIX_FMT_RGB565,
--		.lcd_modes = lcdc0_modes,
--		.num_modes = ARRAY_SIZE(lcdc0_modes),
--		.panel_cfg = {
--			.width = 44,
--			.height = 79,
--		},
--		.tx_dev = &mipidsi0_device,
--	}
--};
--
--static struct resource lcdc0_resources[] = {
--	[0] = {
--		.name	= "LCDC0",
--		.start	= 0xfe940000, /* P4-only space */
--		.end	= 0xfe943fff,
--		.flags	= IORESOURCE_MEM,
--	},
--	[1] = {
--		.start	= intcs_evt2irq(0x580),
--		.flags	= IORESOURCE_IRQ,
--	},
--};
--
--static struct platform_device lcdc0_device = {
--	.name		= "sh_mobile_lcdc_fb",
--	.num_resources	= ARRAY_SIZE(lcdc0_resources),
--	.resource	= lcdc0_resources,
--	.id             = 0,
--	.dev	= {
--		.platform_data	= &lcdc0_info,
--		.coherent_dma_mask = ~0,
--	},
--};
--
--static struct bd6107_platform_data backlight_data = {
--	.fbdev = &lcdc0_device.dev,
--	.reset = 235,
--	.def_value = 0,
--};
--
--static struct i2c_board_info backlight_board_info = {
--	I2C_BOARD_INFO("bd6107", 0x6d),
--	.platform_data = &backlight_data,
--};
--
--/* Fixed 2.8V regulators to be used by SDHI0 */
--static struct regulator_consumer_supply fixed2v8_power_consumers[] =
--{
--	REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"),
--	REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"),
--};
--
--/* SDHI0 */
--static struct sh_mobile_sdhi_info sdhi0_info = {
--	.dma_slave_tx	= SHDMA_SLAVE_SDHI0_TX,
--	.dma_slave_rx	= SHDMA_SLAVE_SDHI0_RX,
--	.tmio_flags	= TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_USE_GPIO_CD,
--	.tmio_caps	= MMC_CAP_SD_HIGHSPEED,
--	.tmio_ocr_mask	= MMC_VDD_27_28 | MMC_VDD_28_29,
--	.cd_gpio	= 251,
--};
--
--static struct resource sdhi0_resources[] = {
--	[0] = {
--		.name	= "SDHI0",
--		.start	= 0xee100000,
--		.end	= 0xee1000ff,
--		.flags	= IORESOURCE_MEM,
--	},
--	[1] = {
--		.name	= SH_MOBILE_SDHI_IRQ_CARD_DETECT,
--		.start	= gic_spi(83),
--		.flags	= IORESOURCE_IRQ,
--	},
--	[2] = {
--		.name	= SH_MOBILE_SDHI_IRQ_SDCARD,
--		.start	= gic_spi(84),
--		.flags	= IORESOURCE_IRQ,
--	},
--	[3] = {
--		.name	= SH_MOBILE_SDHI_IRQ_SDIO,
--		.start	= gic_spi(85),
--		.flags	= IORESOURCE_IRQ,
--	},
--};
--
--static struct platform_device sdhi0_device = {
--	.name		= "sh_mobile_sdhi",
--	.id		= 0,
--	.num_resources	= ARRAY_SIZE(sdhi0_resources),
--	.resource	= sdhi0_resources,
--	.dev	= {
--		.platform_data	= &sdhi0_info,
--	},
--};
--
--/* Fixed 3.3V regulator to be used by SDHI1 */
--static struct regulator_consumer_supply cn4_power_consumers[] =
--{
--	REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.1"),
--	REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.1"),
--};
--
--static struct regulator_init_data cn4_power_init_data = {
--	.constraints = {
--		.valid_ops_mask = REGULATOR_CHANGE_STATUS,
--	},
--	.num_consumer_supplies  = ARRAY_SIZE(cn4_power_consumers),
--	.consumer_supplies      = cn4_power_consumers,
--};
--
--static struct fixed_voltage_config cn4_power_info = {
--	.supply_name = "CN4 SD/MMC Vdd",
--	.microvolts = 3300000,
--	.gpio = 114,
--	.enable_high = 1,
--	.init_data = &cn4_power_init_data,
--};
--
--static struct platform_device cn4_power = {
--	.name = "reg-fixed-voltage",
--	.id   = 2,
--	.dev  = {
--		.platform_data = &cn4_power_info,
--	},
--};
--
--static void ag5evm_sdhi1_set_pwr(struct platform_device *pdev, int state)
--{
--	static int power_gpio = -EINVAL;
--
--	if (power_gpio < 0) {
--		int ret = gpio_request_one(114, GPIOF_OUT_INIT_LOW,
--					   "sdhi1_power");
--		if (!ret)
--			power_gpio = 114;
--	}
--
--	/*
--	 * If requesting the GPIO above failed, it means, that the regulator got
--	 * probed and grabbed the GPIO, but we don't know, whether the sdhi
--	 * driver already uses the regulator. If it doesn't, we have to toggle
--	 * the GPIO ourselves, even though it is now owned by the fixed
--	 * regulator driver. We have to live with the race in case the driver
--	 * gets unloaded and the GPIO freed between these two steps.
--	 */
--	gpio_set_value(114, state);
--}
--
--static struct sh_mobile_sdhi_info sh_sdhi1_info = {
--	.tmio_flags	= TMIO_MMC_WRPROTECT_DISABLE | TMIO_MMC_HAS_IDLE_WAIT,
--	.tmio_caps	= MMC_CAP_NONREMOVABLE | MMC_CAP_SDIO_IRQ,
--	.tmio_ocr_mask	= MMC_VDD_32_33 | MMC_VDD_33_34,
--	.set_pwr	= ag5evm_sdhi1_set_pwr,
--};
--
--static struct resource sdhi1_resources[] = {
--	[0] = {
--		.name	= "SDHI1",
--		.start	= 0xee120000,
--		.end	= 0xee1200ff,
--		.flags	= IORESOURCE_MEM,
--	},
--	[1] = {
--		.name	= SH_MOBILE_SDHI_IRQ_CARD_DETECT,
--		.start	= gic_spi(87),
--		.flags	= IORESOURCE_IRQ,
--	},
--	[2] = {
--		.name	= SH_MOBILE_SDHI_IRQ_SDCARD,
--		.start	= gic_spi(88),
--		.flags	= IORESOURCE_IRQ,
--	},
--	[3] = {
--		.name	= SH_MOBILE_SDHI_IRQ_SDIO,
--		.start	= gic_spi(89),
--		.flags	= IORESOURCE_IRQ,
--	},
--};
--
--static struct platform_device sdhi1_device = {
--	.name		= "sh_mobile_sdhi",
--	.id		= 1,
--	.dev		= {
--		.platform_data	= &sh_sdhi1_info,
--	},
--	.num_resources	= ARRAY_SIZE(sdhi1_resources),
--	.resource	= sdhi1_resources,
--};
--
--static struct platform_device *ag5evm_devices[] __initdata = {
--	&cn4_power,
--	&eth_device,
--	&keysc_device,
--	&fsi_device,
--	&mmc_device,
--	&irda_device,
--	&mipidsi0_device,
--	&lcdc0_device,
--	&sdhi0_device,
--	&sdhi1_device,
--};
--
--static unsigned long pin_pullup_conf[] = {
--	PIN_CONF_PACKED(PIN_CONFIG_BIAS_PULL_UP, 0),
--};
--
--static const struct pinctrl_map ag5evm_pinctrl_map[] = {
--	/* FSIA */
--	PIN_MAP_MUX_GROUP_DEFAULT("sh_fsi2.0", "pfc-sh73a0",
--				  "fsia_mclk_in", "fsia"),
--	PIN_MAP_MUX_GROUP_DEFAULT("sh_fsi2.0", "pfc-sh73a0",
--				  "fsia_sclk_in", "fsia"),
--	PIN_MAP_MUX_GROUP_DEFAULT("sh_fsi2.0", "pfc-sh73a0",
--				  "fsia_data_in", "fsia"),
--	PIN_MAP_MUX_GROUP_DEFAULT("sh_fsi2.0", "pfc-sh73a0",
--				  "fsia_data_out", "fsia"),
--	/* I2C2 & I2C3 */
--	PIN_MAP_MUX_GROUP_DEFAULT("i2c-sh_mobile.2", "pfc-sh73a0",
--				  "i2c2_0", "i2c2"),
--	PIN_MAP_MUX_GROUP_DEFAULT("i2c-sh_mobile.3", "pfc-sh73a0",
--				  "i2c3_0", "i2c3"),
--	/* IrDA */
--	PIN_MAP_MUX_GROUP_DEFAULT("sh_irda.0", "pfc-sh73a0",
--				  "irda_0", "irda"),
--	/* KEYSC */
--	PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0",
--				  "keysc_in8", "keysc"),
--	PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0",
--				  "keysc_out04", "keysc"),
--	PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0",
--				  "keysc_out5", "keysc"),
--	PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0",
--				  "keysc_out6_0", "keysc"),
--	PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0",
--				  "keysc_out7_0", "keysc"),
--	PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0",
--				  "keysc_out8_0", "keysc"),
--	PIN_MAP_MUX_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0",
--				  "keysc_out9_2", "keysc"),
--	PIN_MAP_CONFIGS_GROUP_DEFAULT("sh_keysc.0", "pfc-sh73a0",
--				      "keysc_in8", pin_pullup_conf),
--	/* MMCIF */
--	PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh73a0",
--				  "mmc0_data8_0", "mmc0"),
--	PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh73a0",
--				  "mmc0_ctrl_0", "mmc0"),
--	PIN_MAP_CONFIGS_PIN_DEFAULT("sh_mmcif.0", "pfc-sh73a0",
--				    "PORT279", pin_pullup_conf),
--	PIN_MAP_CONFIGS_GROUP_DEFAULT("sh_mmcif.0", "pfc-sh73a0",
--				      "mmc0_data8_0", pin_pullup_conf),
--	/* SCIFA2 */
--	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.2", "pfc-sh73a0",
--				  "scifa2_data_0", "scifa2"),
--	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.2", "pfc-sh73a0",
--				  "scifa2_ctrl_0", "scifa2"),
--	/* SDHI0 (CN15 [SD I/F]) */
--	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh73a0",
--				  "sdhi0_data4", "sdhi0"),
--	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh73a0",
--				  "sdhi0_ctrl", "sdhi0"),
--	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-sh73a0",
--				  "sdhi0_wp", "sdhi0"),
--	/* SDHI1 (CN4 [WLAN I/F]) */
--	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-sh73a0",
--				  "sdhi1_data4", "sdhi1"),
--	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-sh73a0",
--				  "sdhi1_ctrl", "sdhi1"),
--	PIN_MAP_CONFIGS_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-sh73a0",
--				      "sdhi1_data4", pin_pullup_conf),
--	PIN_MAP_CONFIGS_PIN_DEFAULT("sh_mobile_sdhi.1", "pfc-sh73a0",
--				    "PORT263", pin_pullup_conf),
--};
--
--static void __init ag5evm_init(void)
--{
--	regulator_register_always_on(0, "fixed-1.8V", fixed1v8_power_consumers,
--				     ARRAY_SIZE(fixed1v8_power_consumers), 1800000);
--	regulator_register_always_on(1, "fixed-2.8V", fixed2v8_power_consumers,
--				     ARRAY_SIZE(fixed2v8_power_consumers), 3300000);
--	regulator_register_fixed(3, dummy_supplies, ARRAY_SIZE(dummy_supplies));
--
--	pinctrl_register_mappings(ag5evm_pinctrl_map,
--				  ARRAY_SIZE(ag5evm_pinctrl_map));
--	sh73a0_pinmux_init();
--
--	/* enable MMCIF */
--	gpio_request_one(208, GPIOF_OUT_INIT_HIGH, NULL); /* Reset */
--
--	/* enable SMSC911X */
--	gpio_request_one(144, GPIOF_IN, NULL); /* PINTA2 */
--	gpio_request_one(145, GPIOF_OUT_INIT_HIGH, NULL); /* RESET */
--
--	/* LCD panel */
--	gpio_request_one(217, GPIOF_OUT_INIT_LOW, NULL); /* RESET */
--	mdelay(1);
--	gpio_set_value(217, 1);
--	mdelay(100);
--
--
--#ifdef CONFIG_CACHE_L2X0
--	/* Shared attribute override enable, 64K*8way */
--	l2x0_init(IOMEM(0xf0100000), 0x00460000, 0xc2000fff);
--#endif
--	sh73a0_add_standard_devices();
--
--	i2c_register_board_info(1, &backlight_board_info, 1);
--
--	platform_add_devices(ag5evm_devices, ARRAY_SIZE(ag5evm_devices));
--}
--
--MACHINE_START(AG5EVM, "ag5evm")
--	.smp		= smp_ops(sh73a0_smp_ops),
--	.map_io		= sh73a0_map_io,
--	.init_early	= sh73a0_add_early_devices,
--	.nr_irqs	= NR_IRQS_LEGACY,
--	.init_irq	= sh73a0_init_irq,
--	.init_machine	= ag5evm_init,
--	.init_late	= shmobile_init_late,
--	.init_time	= sh73a0_earlytimer_init,
--MACHINE_END
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0403-ARM-shmobile-Remove-sh73a0-use-of-mach-hardware.h.patch b/patches.renesas/0403-ARM-shmobile-Remove-sh73a0-use-of-mach-hardware.h.patch
deleted file mode 100644
index b28eefb005cc4..0000000000000
--- a/patches.renesas/0403-ARM-shmobile-Remove-sh73a0-use-of-mach-hardware.h.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From b6f396f53a78937442f146d31ecdfde22fface2b Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Wed, 24 Jul 2013 12:37:24 +0900
-Subject: ARM: shmobile: Remove sh73a0 use of <mach/hardware.h>
-
-Remove unused <mach/hardware.h> on sh73a0.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit fb0724805eb7369a75a434873f409b42e33ecb85)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-sh73a0.c | 1 -
- 1 file changed, 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c
-index 516c2391..22de1741 100644
---- a/arch/arm/mach-shmobile/setup-sh73a0.c
-+++ b/arch/arm/mach-shmobile/setup-sh73a0.c
-@@ -34,7 +34,6 @@
- #include <linux/platform_data/sh_ipmmu.h>
- #include <linux/platform_data/irq-renesas-intc-irqpin.h>
- #include <mach/dma-register.h>
--#include <mach/hardware.h>
- #include <mach/irqs.h>
- #include <mach/sh73a0.h>
- #include <mach/common.h>
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0404-ARM-shmobile-Remove-sh7372-use-of-mach-hardware.h.patch b/patches.renesas/0404-ARM-shmobile-Remove-sh7372-use-of-mach-hardware.h.patch
deleted file mode 100644
index 0be9c64766999..0000000000000
--- a/patches.renesas/0404-ARM-shmobile-Remove-sh7372-use-of-mach-hardware.h.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From 4361cbb013d32f22e087baf31c71ef460621cb62 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Wed, 24 Jul 2013 12:37:34 +0900
-Subject: ARM: shmobile: Remove sh7372 use of <mach/hardware.h>
-
-Remove unused <mach/hardware.h> on sh7372.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 3a8e257f2464870cff1c4257838af2698b9e23fd)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-sh7372.c | 1 -
- 1 file changed, 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c
-index 13e6fdbd..31187839 100644
---- a/arch/arm/mach-shmobile/setup-sh7372.c
-+++ b/arch/arm/mach-shmobile/setup-sh7372.c
-@@ -35,7 +35,6 @@
- #include <linux/dma-mapping.h>
- #include <linux/platform_data/sh_ipmmu.h>
- #include <mach/dma-register.h>
--#include <mach/hardware.h>
- #include <mach/irqs.h>
- #include <mach/sh7372.h>
- #include <mach/common.h>
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0405-ARM-shmobile-Remove-EMEV2-use-of-mach-hardware.h.patch b/patches.renesas/0405-ARM-shmobile-Remove-EMEV2-use-of-mach-hardware.h.patch
deleted file mode 100644
index 49191c17ef311..0000000000000
--- a/patches.renesas/0405-ARM-shmobile-Remove-EMEV2-use-of-mach-hardware.h.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From 4c4880ffc785525d4ff2f8b3dfd33c755706c22b Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Wed, 24 Jul 2013 12:37:43 +0900
-Subject: ARM: shmobile: Remove EMEV2 use of <mach/hardware.h>
-
-Remove unused <mach/hardware.h> on EMEV2.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 7ffdc70e14756135da5949a6c9bc32e2086f3d02)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-emev2.c | 1 -
- 1 file changed, 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-emev2.c b/arch/arm/mach-shmobile/setup-emev2.c
-index 1553af8e..3ad531ca 100644
---- a/arch/arm/mach-shmobile/setup-emev2.c
-+++ b/arch/arm/mach-shmobile/setup-emev2.c
-@@ -27,7 +27,6 @@
- #include <linux/input.h>
- #include <linux/io.h>
- #include <linux/irqchip/arm-gic.h>
--#include <mach/hardware.h>
- #include <mach/common.h>
- #include <mach/emev2.h>
- #include <mach/irqs.h>
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0406-ARM-shmobile-Remove-r8a7779-use-of-mach-hardware.h.patch b/patches.renesas/0406-ARM-shmobile-Remove-r8a7779-use-of-mach-hardware.h.patch
deleted file mode 100644
index 9ccde6621170b..0000000000000
--- a/patches.renesas/0406-ARM-shmobile-Remove-r8a7779-use-of-mach-hardware.h.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From df76c4a3f2251848c9e9f635015f9f5001753164 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Wed, 24 Jul 2013 12:37:52 +0900
-Subject: ARM: shmobile: Remove r8a7779 use of <mach/hardware.h>
-
-Remove unused <mach/hardware.h> on r8a7779.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 603e45827b4a565506417fbdc3400eedf8846c3d)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-r8a7779.c | 1 -
- 1 file changed, 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c
-index 66d38261..6ab7405e 100644
---- a/arch/arm/mach-shmobile/setup-r8a7779.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7779.c
-@@ -37,7 +37,6 @@
- #include <linux/usb/ehci_pdriver.h>
- #include <linux/usb/ohci_pdriver.h>
- #include <linux/pm_runtime.h>
--#include <mach/hardware.h>
- #include <mach/irqs.h>
- #include <mach/r8a7779.h>
- #include <mach/common.h>
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0407-ARM-shmobile-Remove-Marzen-use-of-mach-hardware.h.patch b/patches.renesas/0407-ARM-shmobile-Remove-Marzen-use-of-mach-hardware.h.patch
deleted file mode 100644
index 37512d4609b0a..0000000000000
--- a/patches.renesas/0407-ARM-shmobile-Remove-Marzen-use-of-mach-hardware.h.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From 8bebaab70d21de53914e0b14113fc5ab047d0519 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Wed, 24 Jul 2013 12:38:20 +0900
-Subject: ARM: shmobile: Remove Marzen use of <mach/hardware.h>
-
-Remove unused <mach/hardware.h> on Marzen.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 85469abe4930fb001c79ac5f0ca17b65c7b2580d)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-marzen.c | 1 -
- 1 file changed, 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/board-marzen.c b/arch/arm/mach-shmobile/board-marzen.c
-index a7d10105..1f57865a 100644
---- a/arch/arm/mach-shmobile/board-marzen.c
-+++ b/arch/arm/mach-shmobile/board-marzen.c
-@@ -37,7 +37,6 @@
- #include <linux/mmc/host.h>
- #include <linux/mmc/sh_mobile_sdhi.h>
- #include <linux/mfd/tmio.h>
--#include <mach/hardware.h>
- #include <mach/r8a7779.h>
- #include <mach/common.h>
- #include <mach/irqs.h>
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0408-ARM-shmobile-Remove-include-mach-hardware.h.patch b/patches.renesas/0408-ARM-shmobile-Remove-include-mach-hardware.h.patch
deleted file mode 100644
index 3840485893158..0000000000000
--- a/patches.renesas/0408-ARM-shmobile-Remove-include-mach-hardware.h.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From 90964f5418e4c5ca5149f5fde43f29aa7af373cb Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Wed, 24 Jul 2013 12:38:29 +0900
-Subject: ARM: shmobile: Remove include <mach/hardware.h>
-
-Now when no one is using this file, remove <mach/hardware.h>.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 5717bcf3712fc30c8b4b7f714ebbf0bfcb922bb6)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/include/mach/hardware.h | 4 ----
- 1 file changed, 4 deletions(-)
- delete mode 100644 arch/arm/mach-shmobile/include/mach/hardware.h
-
-diff --git a/arch/arm/mach-shmobile/include/mach/hardware.h b/arch/arm/mach-shmobile/include/mach/hardware.h
-deleted file mode 100644
-index 99264a5c..00000000
---- a/arch/arm/mach-shmobile/include/mach/hardware.h
-+++ /dev/null
-@@ -1,4 +0,0 @@
--#ifndef __ASM_MACH_HARDWARE_H
--#define __ASM_MACH_HARDWARE_H
--
--#endif /* __ASM_MACH_HARDWARE_H */
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0409-ARM-shmobile-r8a73a4-Remove-init_machine-special-cas.patch b/patches.renesas/0409-ARM-shmobile-r8a73a4-Remove-init_machine-special-cas.patch
deleted file mode 100644
index d6a69fe8e3094..0000000000000
--- a/patches.renesas/0409-ARM-shmobile-r8a73a4-Remove-init_machine-special-cas.patch
+++ /dev/null
@@ -1,54 +0,0 @@
-From 28be204d7e76fb1b22a3d7ce1f6412af1363c513 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Wed, 24 Jul 2013 12:53:15 +0900
-Subject: ARM: shmobile: r8a73a4: Remove ->init_machine() special case
-
-No need to special case r8a73a4 ->init_machine(),
-so get rid of undesired cpufreq platform device
-from the generic long term r8a73a4 DT support code.
-
-For short term support on APE6EVM the DT reference
-implementation already adds a "cpufreq-cpu0" platform
-device so that can be used for development.
-
-Regarding more long term cpufreq support, perhaps
-it makes sense to adjust the cpufreq driver to check
-for DT information directly instead of using a
-platform device for software configuration and DT
-for hardware parameters.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 67fde41ea4251f722b4466597c479fb42fccac2c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-r8a73a4.c | 6 ------
- 1 file changed, 6 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-r8a73a4.c b/arch/arm/mach-shmobile/setup-r8a73a4.c
-index 630ea4eb..2ee45d52 100644
---- a/arch/arm/mach-shmobile/setup-r8a73a4.c
-+++ b/arch/arm/mach-shmobile/setup-r8a73a4.c
-@@ -215,11 +215,6 @@ void __init r8a73a4_init_delay(void)
- }
- 
- #ifdef CONFIG_USE_OF
--void __init r8a73a4_add_standard_devices_dt(void)
--{
--	platform_device_register_simple("cpufreq-cpu0", -1, NULL, 0);
--	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
--}
- 
- static const char *r8a73a4_boards_compat_dt[] __initdata = {
- 	"renesas,r8a73a4",
-@@ -228,7 +223,6 @@ static const char *r8a73a4_boards_compat_dt[] __initdata = {
- 
- DT_MACHINE_START(R8A73A4_DT, "Generic R8A73A4 (Flattened Device Tree)")
- 	.init_early	= r8a73a4_init_delay,
--	.init_machine	= r8a73a4_add_standard_devices_dt,
- 	.init_time	= shmobile_timer_init,
- 	.dt_compat	= r8a73a4_boards_compat_dt,
- MACHINE_END
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0410-ARM-shmobile-Use-pm-rmobile-on-sh7372-and-r8a7740-on.patch b/patches.renesas/0410-ARM-shmobile-Use-pm-rmobile-on-sh7372-and-r8a7740-on.patch
deleted file mode 100644
index da0c60ac9fa03..0000000000000
--- a/patches.renesas/0410-ARM-shmobile-Use-pm-rmobile-on-sh7372-and-r8a7740-on.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From 7933e1448d7db55dda80976636f6373f971ece8d Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Tue, 9 Jul 2013 19:40:01 +0900
-Subject: ARM: shmobile: Use pm-rmobile on sh7372 and r8a7740 only
-
-The functions in pm-rmobile.c are only used on sh7372 and
-r8a7740, so adjust the Makefile to only link in that file
-in case those SoCs are selected.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 0173a741e19e072ae34fda4a32d004e52c9da8e7)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/Makefile | 7 +++----
- 1 file changed, 3 insertions(+), 4 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
-index 91b4958b..2afab454 100644
---- a/arch/arm/mach-shmobile/Makefile
-+++ b/arch/arm/mach-shmobile/Makefile
-@@ -43,11 +43,10 @@ obj-$(CONFIG_ARCH_R8A7740)	+= entry-intc.o
- # PM objects
- obj-$(CONFIG_SUSPEND)		+= suspend.o
- obj-$(CONFIG_CPU_IDLE)		+= cpuidle.o
--obj-$(CONFIG_ARCH_SHMOBILE)	+= pm-rmobile.o
--obj-$(CONFIG_ARCH_SH7372)	+= pm-sh7372.o sleep-sh7372.o
--obj-$(CONFIG_ARCH_R8A7740)	+= pm-r8a7740.o
--obj-$(CONFIG_ARCH_R8A7779)	+= pm-r8a7779.o
-+obj-$(CONFIG_ARCH_SH7372)	+= pm-sh7372.o sleep-sh7372.o pm-rmobile.o
- obj-$(CONFIG_ARCH_SH73A0)	+= pm-sh73a0.o
-+obj-$(CONFIG_ARCH_R8A7740)	+= pm-r8a7740.o pm-rmobile.o
-+obj-$(CONFIG_ARCH_R8A7779)	+= pm-r8a7779.o
- 
- # Board objects
- obj-$(CONFIG_MACH_APE6EVM)	+= board-ape6evm.o
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0411-ARM-shmobile-No-need-to-use-INTC-demux-on-r8a7740.patch b/patches.renesas/0411-ARM-shmobile-No-need-to-use-INTC-demux-on-r8a7740.patch
deleted file mode 100644
index 07b18dc38d990..0000000000000
--- a/patches.renesas/0411-ARM-shmobile-No-need-to-use-INTC-demux-on-r8a7740.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From e1b43909b5afc8fa97e232e750d336751c3d22f9 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Tue, 9 Jul 2013 19:40:08 +0900
-Subject: ARM: shmobile: No need to use INTC demux on r8a7740
-
-Now when the r8a7740 code has been converted to make use of
-GIC instead of INTC for root interrupt controller it is
-possible to exclude the low level INTC demux function
-shmobile_handle_irq_intc from linking.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit d76c626d31d5632aa0ee02fc3e99087070cd556e)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/Makefile | 1 -
- 1 file changed, 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
-index 2afab454..ec38a16b 100644
---- a/arch/arm/mach-shmobile/Makefile
-+++ b/arch/arm/mach-shmobile/Makefile
-@@ -38,7 +38,6 @@ smp-$(CONFIG_ARCH_EMEV2)	+= smp-emev2.o headsmp-scu.o
- 
- # IRQ objects
- obj-$(CONFIG_ARCH_SH7372)	+= entry-intc.o
--obj-$(CONFIG_ARCH_R8A7740)	+= entry-intc.o
- 
- # PM objects
- obj-$(CONFIG_SUSPEND)		+= suspend.o
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0412-ARM-shmobile-ape6evm-add-MMCIF-support.patch b/patches.renesas/0412-ARM-shmobile-ape6evm-add-MMCIF-support.patch
deleted file mode 100644
index 9950f09373540..0000000000000
--- a/patches.renesas/0412-ARM-shmobile-ape6evm-add-MMCIF-support.patch
+++ /dev/null
@@ -1,84 +0,0 @@
-From 04d1e7771f90d3688b9a6bca2cac7a277aa92658 Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Wed, 10 Jul 2013 10:13:08 +0200
-Subject: ARM: shmobile: ape6evm: add MMCIF support
-
-Add MMCIF support to the APE6EVM board in PIO mode only. Power supply is
-fixed for now, eventually support for the tps80032 regulator, also
-supplying both VDD and VccQ to the MMCIF slot should be added to APE6EVM.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Acked-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 8711613252ed931037f9e9f8646935519dd8f362)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-ape6evm.c | 31 +++++++++++++++++++++++++++++++
- 1 file changed, 31 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/board-ape6evm.c b/arch/arm/mach-shmobile/board-ape6evm.c
-index af6dd39d..8c7529cc 100644
---- a/arch/arm/mach-shmobile/board-ape6evm.c
-+++ b/arch/arm/mach-shmobile/board-ape6evm.c
-@@ -21,6 +21,8 @@
- #include <linux/gpio.h>
- #include <linux/interrupt.h>
- #include <linux/kernel.h>
-+#include <linux/mmc/host.h>
-+#include <linux/mmc/sh_mmcif.h>
- #include <linux/pinctrl/machine.h>
- #include <linux/platform_device.h>
- #include <linux/regulator/fixed.h>
-@@ -54,6 +56,25 @@ static const struct smsc911x_platform_config lan9220_data = {
- 	.irq_polarity	= SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
- };
- 
-+/*
-+ * On APE6EVM power is supplied to MMCIF by a tps80032 regulator. For now we
-+ * model a VDD supply to MMCIF, using a fixed 3.3V regulator.
-+ */
-+static struct regulator_consumer_supply fixed3v3_power_consumers[] =
-+{
-+	REGULATOR_SUPPLY("vmmc", "sh_mmcif.0"),
-+};
-+
-+/* MMCIF */
-+static struct sh_mmcif_plat_data mmcif0_pdata = {
-+	.caps		= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
-+};
-+
-+static struct resource mmcif0_resources[] = {
-+	DEFINE_RES_MEM_NAMED(0xee200000, 0x100, "MMCIF0"),
-+	DEFINE_RES_IRQ(gic_spi(169)),
-+};
-+
- static const struct pinctrl_map ape6evm_pinctrl_map[] = {
- 	/* SCIFA0 console */
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a73a4",
-@@ -61,6 +82,11 @@ static const struct pinctrl_map ape6evm_pinctrl_map[] = {
- 	/* SMSC */
- 	PIN_MAP_MUX_GROUP_DEFAULT("smsc911x", "pfc-r8a73a4",
- 				  "irqc_irq40", "irqc"),
-+	/* MMCIF0 */
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-r8a73a4",
-+				  "mmc0_data8", "mmc0"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-r8a73a4",
-+				  "mmc0_ctrl", "mmc0"),
- };
- 
- static void __init ape6evm_add_standard_devices(void)
-@@ -93,6 +119,11 @@ static void __init ape6evm_add_standard_devices(void)
- 	platform_device_register_resndata(&platform_bus, "smsc911x", -1,
- 					  lan9220_res, ARRAY_SIZE(lan9220_res),
- 					  &lan9220_data, sizeof(lan9220_data));
-+	regulator_register_always_on(1, "fixed-3.3V", fixed3v3_power_consumers,
-+				     ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
-+	platform_device_register_resndata(&platform_bus, "sh_mmcif", 0,
-+					  mmcif0_resources, ARRAY_SIZE(mmcif0_resources),
-+					  &mmcif0_pdata, sizeof(mmcif0_pdata));
- }
- 
- static const char *ape6evm_boards_compat_dt[] __initdata = {
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0413-ARM-shmobile-ape6evm-add-SDHI-interfaces.patch b/patches.renesas/0413-ARM-shmobile-ape6evm-add-SDHI-interfaces.patch
deleted file mode 100644
index 05355e87c08fe..0000000000000
--- a/patches.renesas/0413-ARM-shmobile-ape6evm-add-SDHI-interfaces.patch
+++ /dev/null
@@ -1,113 +0,0 @@
-From c0764ee7be5c4be0c14135da6a720dc066ea74e6 Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Mon, 8 Jul 2013 17:54:42 +0200
-Subject: ARM: shmobile: ape6evm: add SDHI interfaces
-
-Add support for SDHI0 and SDHI1 on APE6EVM in PIO mode only.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit f79d68da510bf1b95beff4d556b78d06801f11dc)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-ape6evm.c | 50 +++++++++++++++++++++++++++++++++-
- 1 file changed, 49 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/board-ape6evm.c b/arch/arm/mach-shmobile/board-ape6evm.c
-index 8c7529cc..ccf8b042 100644
---- a/arch/arm/mach-shmobile/board-ape6evm.c
-+++ b/arch/arm/mach-shmobile/board-ape6evm.c
-@@ -21,8 +21,10 @@
- #include <linux/gpio.h>
- #include <linux/interrupt.h>
- #include <linux/kernel.h>
-+#include <linux/mfd/tmio.h>
- #include <linux/mmc/host.h>
- #include <linux/mmc/sh_mmcif.h>
-+#include <linux/mmc/sh_mobile_sdhi.h>
- #include <linux/pinctrl/machine.h>
- #include <linux/platform_device.h>
- #include <linux/regulator/fixed.h>
-@@ -58,11 +60,16 @@ static const struct smsc911x_platform_config lan9220_data = {
- 
- /*
-  * On APE6EVM power is supplied to MMCIF by a tps80032 regulator. For now we
-- * model a VDD supply to MMCIF, using a fixed 3.3V regulator.
-+ * model a VDD supply to MMCIF, using a fixed 3.3V regulator. Also use the
-+ * static power supply for SDHI0 and SDHI1, whereas SDHI0's VccQ is also
-+ * supplied by the same tps80032 regulator and thus can also be adjusted
-+ * dynamically.
-  */
- static struct regulator_consumer_supply fixed3v3_power_consumers[] =
- {
- 	REGULATOR_SUPPLY("vmmc", "sh_mmcif.0"),
-+	REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"),
-+	REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.1"),
- };
- 
- /* MMCIF */
-@@ -75,6 +82,29 @@ static struct resource mmcif0_resources[] = {
- 	DEFINE_RES_IRQ(gic_spi(169)),
- };
- 
-+/* SDHI0 */
-+static struct sh_mobile_sdhi_info sdhi0_pdata = {
-+	.tmio_flags	= TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_WRPROTECT_DISABLE,
-+	.tmio_caps	= MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
-+};
-+
-+static struct resource sdhi0_resources[] = {
-+	DEFINE_RES_MEM_NAMED(0xee100000, 0x100, "SDHI0"),
-+	DEFINE_RES_IRQ(gic_spi(165)),
-+};
-+
-+/* SDHI1 */
-+static struct sh_mobile_sdhi_info sdhi1_pdata = {
-+	.tmio_flags	= TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_WRPROTECT_DISABLE,
-+	.tmio_caps	= MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
-+			  MMC_CAP_NEEDS_POLL,
-+};
-+
-+static struct resource sdhi1_resources[] = {
-+	DEFINE_RES_MEM_NAMED(0xee120000, 0x100, "SDHI1"),
-+	DEFINE_RES_IRQ(gic_spi(166)),
-+};
-+
- static const struct pinctrl_map ape6evm_pinctrl_map[] = {
- 	/* SCIFA0 console */
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a73a4",
-@@ -87,6 +117,18 @@ static const struct pinctrl_map ape6evm_pinctrl_map[] = {
- 				  "mmc0_data8", "mmc0"),
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.0", "pfc-r8a73a4",
- 				  "mmc0_ctrl", "mmc0"),
-+	/* SDHI0: uSD: no WP */
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a73a4",
-+				  "sdhi0_data4", "sdhi0"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a73a4",
-+				  "sdhi0_ctrl", "sdhi0"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a73a4",
-+				  "sdhi0_cd", "sdhi0"),
-+	/* SDHI1 */
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-r8a73a4",
-+				  "sdhi1_data4", "sdhi1"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.1", "pfc-r8a73a4",
-+				  "sdhi1_ctrl", "sdhi1"),
- };
- 
- static void __init ape6evm_add_standard_devices(void)
-@@ -124,6 +166,12 @@ static void __init ape6evm_add_standard_devices(void)
- 	platform_device_register_resndata(&platform_bus, "sh_mmcif", 0,
- 					  mmcif0_resources, ARRAY_SIZE(mmcif0_resources),
- 					  &mmcif0_pdata, sizeof(mmcif0_pdata));
-+	platform_device_register_resndata(&platform_bus, "sh_mobile_sdhi", 0,
-+					  sdhi0_resources, ARRAY_SIZE(sdhi0_resources),
-+					  &sdhi0_pdata, sizeof(sdhi0_pdata));
-+	platform_device_register_resndata(&platform_bus, "sh_mobile_sdhi", 1,
-+					  sdhi1_resources, ARRAY_SIZE(sdhi1_resources),
-+					  &sdhi1_pdata, sizeof(sdhi1_pdata));
- }
- 
- static const char *ape6evm_boards_compat_dt[] __initdata = {
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0414-ARM-shmobile-No-need-to-use-INTC-header-on-r8a7779.patch b/patches.renesas/0414-ARM-shmobile-No-need-to-use-INTC-header-on-r8a7779.patch
deleted file mode 100644
index dea3e9437f25c..0000000000000
--- a/patches.renesas/0414-ARM-shmobile-No-need-to-use-INTC-header-on-r8a7779.patch
+++ /dev/null
@@ -1,45 +0,0 @@
-From e45d294b314f1a8b4e93cb8c89e01b0c1b7c93ff Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Tue, 9 Jul 2013 19:39:52 +0900
-Subject: ARM: shmobile: No need to use INTC header on r8a7779
-
-Now when the intc-irqpin driver is used for external
-IRQ pins on r8a7779 it possible to get rid of unused
-INTC headers mach/intc.h and linux/sh_intc.h.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit d2ef0b9a5192e921490d2f66f4467f26235412bd)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/intc-r8a7779.c  | 1 -
- arch/arm/mach-shmobile/setup-r8a7779.c | 1 -
- 2 files changed, 2 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/intc-r8a7779.c b/arch/arm/mach-shmobile/intc-r8a7779.c
-index b86dc890..5f9e5dc0 100644
---- a/arch/arm/mach-shmobile/intc-r8a7779.c
-+++ b/arch/arm/mach-shmobile/intc-r8a7779.c
-@@ -27,7 +27,6 @@
- #include <linux/platform_data/irq-renesas-intc-irqpin.h>
- #include <linux/irqchip.h>
- #include <mach/common.h>
--#include <mach/intc.h>
- #include <mach/irqs.h>
- #include <mach/r8a7779.h>
- #include <asm/mach-types.h>
-diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c
-index 6ab7405e..bb8b9678 100644
---- a/arch/arm/mach-shmobile/setup-r8a7779.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7779.c
-@@ -29,7 +29,6 @@
- #include <linux/input.h>
- #include <linux/io.h>
- #include <linux/serial_sci.h>
--#include <linux/sh_intc.h>
- #include <linux/sh_timer.h>
- #include <linux/dma-mapping.h>
- #include <linux/usb/otg.h>
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0415-ARM-shmobile-bockw-add-DT-reference.patch b/patches.renesas/0415-ARM-shmobile-bockw-add-DT-reference.patch
deleted file mode 100644
index aa4976500b2bc..0000000000000
--- a/patches.renesas/0415-ARM-shmobile-bockw-add-DT-reference.patch
+++ /dev/null
@@ -1,240 +0,0 @@
-From 844b157cbb1249e29fed8e3aeaf11ad9c79dad10 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Wed, 24 Jul 2013 00:36:51 -0700
-Subject: ARM: shmobile: bockw: add DT reference
-
-This patch adds a sample DT-based Bock-W "reference" implementation.
-The use of platform-specific C-code should be avoided
-with this configuration as much as possible.
-
-This patch adds new r8a7778_add_dt_devices() which was same stance
-of r8a7790_add_dt_devices()
-
-Acked-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit cfa66a81621d0e85ac03c0de25adc7edd7f2649e)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-	arch/arm/mach-shmobile/Makefile.boot
----
- arch/arm/boot/dts/Makefile                     |  1 +
- arch/arm/boot/dts/r8a7778-bockw-reference.dts  | 32 +++++++++++++
- arch/arm/mach-shmobile/Kconfig                 | 14 ++++++
- arch/arm/mach-shmobile/Makefile                |  1 +
- arch/arm/mach-shmobile/Makefile.boot           |  1 +
- arch/arm/mach-shmobile/board-bockw-reference.c | 62 ++++++++++++++++++++++++++
- arch/arm/mach-shmobile/include/mach/r8a7778.h  |  1 +
- arch/arm/mach-shmobile/setup-r8a7778.c         |  7 ++-
- 8 files changed, 118 insertions(+), 1 deletion(-)
- create mode 100644 arch/arm/boot/dts/r8a7778-bockw-reference.dts
- create mode 100644 arch/arm/mach-shmobile/board-bockw-reference.c
-
-diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
-index 1d38ff07..471bed78 100644
---- a/arch/arm/boot/dts/Makefile
-+++ b/arch/arm/boot/dts/Makefile
-@@ -163,6 +163,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \
- 	emev2-kzm9d-reference.dtb \
- 	r8a7740-armadillo800eva.dtb \
- 	r8a7778-bockw.dtb \
-+	r8a7778-bockw-reference.dtb \
- 	r8a7740-armadillo800eva-reference.dtb \
- 	r8a7779-marzen-reference.dtb \
- 	r8a7790-lager.dtb \
-diff --git a/arch/arm/boot/dts/r8a7778-bockw-reference.dts b/arch/arm/boot/dts/r8a7778-bockw-reference.dts
-new file mode 100644
-index 00000000..f5b8d774
---- /dev/null
-+++ b/arch/arm/boot/dts/r8a7778-bockw-reference.dts
-@@ -0,0 +1,32 @@
-+/*
-+ * Reference Device Tree Source for the Bock-W board
-+ *
-+ * Copyright (C) 2013  Renesas Solutions Corp.
-+ * Copyright (C) 2013  Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-+ *
-+ * based on r8a7779
-+ *
-+ * Copyright (C) 2013 Renesas Solutions Corp.
-+ * Copyright (C) 2013 Simon Horman
-+ *
-+ * This file is licensed under the terms of the GNU General Public License
-+ * version 2.  This program is licensed "as is" without any warranty of any
-+ * kind, whether express or implied.
-+ */
-+
-+/dts-v1/;
-+/include/ "r8a7778.dtsi"
-+
-+/ {
-+	model = "bockw";
-+	compatible = "renesas,bockw-reference", "renesas,r8a7778";
-+
-+	chosen {
-+		bootargs = "console=ttySC0,115200 ignore_loglevel";
-+	};
-+
-+	memory {
-+		device_type = "memory";
-+		reg = <0x60000000 0x10000000>;
-+	};
-+};
-diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
-index 6f71c94c..01308056 100644
---- a/arch/arm/mach-shmobile/Kconfig
-+++ b/arch/arm/mach-shmobile/Kconfig
-@@ -163,6 +163,20 @@ config MACH_BOCKW
- 	select REGULATOR_FIXED_VOLTAGE if REGULATOR
- 	select USE_OF
- 
-+config MACH_BOCKW_REFERENCE
-+	bool "BOCK-W  - Reference Device Tree Implementation"
-+	depends on ARCH_R8A7778
-+	select ARCH_REQUIRE_GPIOLIB
-+	select RENESAS_INTC_IRQPIN
-+	select REGULATOR_FIXED_VOLTAGE if REGULATOR
-+	select USE_OF
-+	---help---
-+	   Use reference implementation of BockW board support
-+	   which makes use of device tree at the expense
-+	   of not supporting a number of devices.
-+
-+	   This is intended to aid developers
-+
- config MACH_MARZEN
- 	bool "MARZEN board"
- 	depends on ARCH_R8A7779
-diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
-index ec38a16b..6f44c51b 100644
---- a/arch/arm/mach-shmobile/Makefile
-+++ b/arch/arm/mach-shmobile/Makefile
-@@ -52,6 +52,7 @@ obj-$(CONFIG_MACH_APE6EVM)	+= board-ape6evm.o
- obj-$(CONFIG_MACH_APE6EVM_REFERENCE)	+= board-ape6evm-reference.o
- obj-$(CONFIG_MACH_MACKEREL)	+= board-mackerel.o
- obj-$(CONFIG_MACH_BOCKW)	+= board-bockw.o
-+obj-$(CONFIG_MACH_BOCKW_REFERENCE)	+= board-bockw-reference.o
- obj-$(CONFIG_MACH_MARZEN)	+= board-marzen.o
- obj-$(CONFIG_MACH_MARZEN_REFERENCE)	+= board-marzen-reference.o
- obj-$(CONFIG_MACH_LAGER)	+= board-lager.o
-diff --git a/arch/arm/mach-shmobile/Makefile.boot b/arch/arm/mach-shmobile/Makefile.boot
-index c20435ef..6a504fe7 100644
---- a/arch/arm/mach-shmobile/Makefile.boot
-+++ b/arch/arm/mach-shmobile/Makefile.boot
-@@ -5,6 +5,7 @@ loadaddr-$(CONFIG_MACH_APE6EVM_REFERENCE) += 0x40008000
- loadaddr-$(CONFIG_MACH_ARMADILLO800EVA) += 0x40008000
- loadaddr-$(CONFIG_MACH_ARMADILLO800EVA_REFERENCE) += 0x40008000
- loadaddr-$(CONFIG_MACH_BOCKW) += 0x60008000
-+loadaddr-$(CONFIG_MACH_BOCKW_REFERENCE) += 0x60008000
- loadaddr-$(CONFIG_MACH_KZM9D) += 0x40008000
- loadaddr-$(CONFIG_MACH_KZM9D_REFERENCE) += 0x40008000
- loadaddr-$(CONFIG_MACH_KZM9G) += 0x41008000
-diff --git a/arch/arm/mach-shmobile/board-bockw-reference.c b/arch/arm/mach-shmobile/board-bockw-reference.c
-new file mode 100644
-index 00000000..24db8de7
---- /dev/null
-+++ b/arch/arm/mach-shmobile/board-bockw-reference.c
-@@ -0,0 +1,62 @@
-+/*
-+ * Bock-W board support
-+ *
-+ * Copyright (C) 2013  Renesas Solutions Corp.
-+ * Copyright (C) 2013  Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; version 2 of the License.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
-+ */
-+
-+#include <linux/of_platform.h>
-+#include <linux/pinctrl/machine.h>
-+#include <mach/common.h>
-+#include <mach/r8a7778.h>
-+#include <asm/mach/arch.h>
-+
-+/*
-+ *	see board-bock.c for checking detail of dip-switch
-+ */
-+
-+static const struct pinctrl_map bockw_pinctrl_map[] = {
-+	/* SCIF0 */
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
-+				  "scif0_data_a", "scif0"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
-+				  "scif0_ctrl", "scif0"),
-+};
-+
-+static void __init bockw_init(void)
-+{
-+	r8a7778_clock_init();
-+
-+	pinctrl_register_mappings(bockw_pinctrl_map,
-+				  ARRAY_SIZE(bockw_pinctrl_map));
-+	r8a7778_pinmux_init();
-+	r8a7778_add_dt_devices();
-+
-+	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
-+}
-+
-+static const char *bockw_boards_compat_dt[] __initdata = {
-+	"renesas,bockw-reference",
-+	NULL,
-+};
-+
-+DT_MACHINE_START(BOCKW_DT, "bockw")
-+	.init_early	= r8a7778_init_delay,
-+	.init_irq	= r8a7778_init_irq_dt,
-+	.init_machine	= bockw_init,
-+	.init_time	= shmobile_timer_init,
-+	.dt_compat	= bockw_boards_compat_dt,
-+MACHINE_END
-diff --git a/arch/arm/mach-shmobile/include/mach/r8a7778.h b/arch/arm/mach-shmobile/include/mach/r8a7778.h
-index 9b561bf4..8d24f73d 100644
---- a/arch/arm/mach-shmobile/include/mach/r8a7778.h
-+++ b/arch/arm/mach-shmobile/include/mach/r8a7778.h
-@@ -30,6 +30,7 @@ extern void r8a7778_add_usb_phy_device(struct rcar_phy_platform_data *pdata);
- extern void r8a7778_add_i2c_device(int id);
- extern void r8a7778_add_hspi_device(int id);
- extern void r8a7778_add_mmc_device(struct sh_mmcif_plat_data *info);
-+extern void r8a7778_add_dt_devices(void);
- 
- extern void r8a7778_init_late(void);
- extern void r8a7778_init_delay(void);
-diff --git a/arch/arm/mach-shmobile/setup-r8a7778.c b/arch/arm/mach-shmobile/setup-r8a7778.c
-index a3a2e37b..9d4b6bf4 100644
---- a/arch/arm/mach-shmobile/setup-r8a7778.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7778.c
-@@ -333,7 +333,7 @@ void __init r8a7778_add_mmc_device(struct sh_mmcif_plat_data *info)
- 		info, sizeof(*info));
- }
- 
--void __init r8a7778_add_standard_devices(void)
-+void __init r8a7778_add_dt_devices(void)
- {
- 	int i;
- 
-@@ -357,6 +357,11 @@ void __init r8a7778_add_standard_devices(void)
- 	r8a7778_register_tmu(1);
- }
- 
-+void __init r8a7778_add_standard_devices(void)
-+{
-+	r8a7778_add_dt_devices();
-+}
-+
- void __init r8a7778_init_late(void)
- {
- 	phy = usb_get_phy(USB_PHY_TYPE_USB2);
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0416-ARM-shmobile-sh73a0-Rely-on-DT-for-SMP-CPU-info.patch b/patches.renesas/0416-ARM-shmobile-sh73a0-Rely-on-DT-for-SMP-CPU-info.patch
deleted file mode 100644
index 202b2a910430e..0000000000000
--- a/patches.renesas/0416-ARM-shmobile-sh73a0-Rely-on-DT-for-SMP-CPU-info.patch
+++ /dev/null
@@ -1,59 +0,0 @@
-From eea1c90ec457f62220be101368a213e24e33e992 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Wed, 24 Jul 2013 16:27:39 +0900
-Subject: ARM: shmobile: sh73a0: Rely on DT for SMP CPU info
-
-Remove sh73a0 specific ->smp_init_cpus() callback and
-instead of relying on shmobile_smp_init_cpus() simply
-use DT for CPU core information.
-
-This assumes that DT_MACHINE_START is used which is
-the case when AG5EVM and Kota2 are removed.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 5489cde560f2b13dc9fb34e2d7dfd09a69fa21b1)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/smp-sh73a0.c | 11 ++---------
- 1 file changed, 2 insertions(+), 9 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/smp-sh73a0.c b/arch/arm/mach-shmobile/smp-sh73a0.c
-index d613113a..1b3dc7c1 100644
---- a/arch/arm/mach-shmobile/smp-sh73a0.c
-+++ b/arch/arm/mach-shmobile/smp-sh73a0.c
-@@ -62,6 +62,8 @@ static int __cpuinit sh73a0_boot_secondary(unsigned int cpu, struct task_struct
- 
- static void __init sh73a0_smp_prepare_cpus(unsigned int max_cpus)
- {
-+	/* setup sh73a0 specific SCU base */
-+	shmobile_scu_base = IOMEM(SH73A0_SCU_BASE);
- 	scu_enable(shmobile_scu_base);
- 
- 	/* Map the reset vector (in headsmp-scu.S, headsmp.S) */
-@@ -74,14 +76,6 @@ static void __init sh73a0_smp_prepare_cpus(unsigned int max_cpus)
- 	scu_power_mode(shmobile_scu_base, SCU_PM_NORMAL);
- }
- 
--static void __init sh73a0_smp_init_cpus(void)
--{
--	/* setup sh73a0 specific SCU base */
--	shmobile_scu_base = IOMEM(SH73A0_SCU_BASE);
--
--	shmobile_smp_init_cpus(scu_get_core_count(shmobile_scu_base));
--}
--
- #ifdef CONFIG_HOTPLUG_CPU
- static int sh73a0_cpu_kill(unsigned int cpu)
- {
-@@ -120,7 +114,6 @@ static int sh73a0_cpu_disable(unsigned int cpu)
- #endif /* CONFIG_HOTPLUG_CPU */
- 
- struct smp_operations sh73a0_smp_ops __initdata = {
--	.smp_init_cpus		= sh73a0_smp_init_cpus,
- 	.smp_prepare_cpus	= sh73a0_smp_prepare_cpus,
- 	.smp_boot_secondary	= sh73a0_boot_secondary,
- #ifdef CONFIG_HOTPLUG_CPU
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0417-ARM-shmobile-ape6evm-reference-switch-PFC-to-DT.patch b/patches.renesas/0417-ARM-shmobile-ape6evm-reference-switch-PFC-to-DT.patch
deleted file mode 100644
index 8f9c2a9044e2d..0000000000000
--- a/patches.renesas/0417-ARM-shmobile-ape6evm-reference-switch-PFC-to-DT.patch
+++ /dev/null
@@ -1,66 +0,0 @@
-From b58c1bdb9cd986fbc3f42004e8909652f6a4ba17 Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Tue, 23 Jul 2013 13:19:07 +0200
-Subject: ARM: shmobile: ape6evm-reference: switch PFC to DT
-
-PFC pinctrl configuration can now be performed via DT. Update
-ape6evm-reference to use this.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 59b2bc34aaa5d4c85c5c868ea6da42c1d06ff27c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts  | 10 ++++++++++
- arch/arm/mach-shmobile/board-ape6evm-reference.c |  9 ---------
- 2 files changed, 10 insertions(+), 9 deletions(-)
-
-diff --git a/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts b/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts
-index 6f4506e7..bbd09d8c 100644
---- a/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts
-+++ b/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts
-@@ -53,3 +53,13 @@
- 	>;
- 	voltage-tolerance = <1>; /* 1% */
- };
-+
-+&pfc {
-+	pinctrl-0 = <&scifa0_pins>;
-+	pinctrl-names = "default";
-+
-+	scifa0_pins: scifa0 {
-+		renesas,groups = "scifa0_data";
-+		renesas,function = "scifa0";
-+	};
-+};
-diff --git a/arch/arm/mach-shmobile/board-ape6evm-reference.c b/arch/arm/mach-shmobile/board-ape6evm-reference.c
-index 46b41dec..52cc5fa5 100644
---- a/arch/arm/mach-shmobile/board-ape6evm-reference.c
-+++ b/arch/arm/mach-shmobile/board-ape6evm-reference.c
-@@ -29,12 +29,6 @@
- #include <asm/mach-types.h>
- #include <asm/mach/arch.h>
- 
--static const struct pinctrl_map ape6evm_pinctrl_map[] = {
--	/* SCIFA0 console */
--	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a73a4",
--				  "scifa0_data", "scifa0"),
--};
--
- static void __init ape6evm_add_standard_devices(void)
- {
- 
-@@ -52,9 +46,6 @@ static void __init ape6evm_add_standard_devices(void)
- 	clk_put(parent);
- 	clk_put(mp);
- 
--	pinctrl_register_mappings(ape6evm_pinctrl_map,
--				  ARRAY_SIZE(ape6evm_pinctrl_map));
--	r8a73a4_pinmux_init();
- 	r8a73a4_add_dt_devices();
- 	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
- 	platform_device_register_simple("cpufreq-cpu0", -1, NULL, 0);
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0418-ARM-shmobile-r8a7779-cleanup-registration-of-usb-phy.patch b/patches.renesas/0418-ARM-shmobile-r8a7779-cleanup-registration-of-usb-phy.patch
deleted file mode 100644
index 9be1a3a411659..0000000000000
--- a/patches.renesas/0418-ARM-shmobile-r8a7779-cleanup-registration-of-usb-phy.patch
+++ /dev/null
@@ -1,140 +0,0 @@
-From 445c61bd440c584ff2996d49611d1c8a74c918fe Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Fri, 26 Jul 2013 00:35:29 -0700
-Subject: ARM: shmobile: r8a7779: cleanup registration of usb phy
-
-usb phy driver which needs platform data at the time of
-registration is used from Marzen only.
-Now, ARM/shmobile aims to support DT,
-and the C code base board support will be removed
-if DT support is completed.
-Current driver registration method which needs platform data
-and which is not shared complicates codes.
-This means legacy C code cleanup after DT supporting
-will be more complicated
-This patch registers it on board code as cleanup C code
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit fee529df76ffb95ede5020266820f2a0e1f64adc)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-marzen.c         | 24 ++++++++++++++++++++++--
- arch/arm/mach-shmobile/include/mach/r8a7779.h |  2 --
- arch/arm/mach-shmobile/setup-r8a7779.c        | 17 -----------------
- 3 files changed, 22 insertions(+), 21 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-marzen.c b/arch/arm/mach-shmobile/board-marzen.c
-index 1f57865a..7474a60f 100644
---- a/arch/arm/mach-shmobile/board-marzen.c
-+++ b/arch/arm/mach-shmobile/board-marzen.c
-@@ -29,6 +29,7 @@
- #include <linux/dma-mapping.h>
- #include <linux/pinctrl/machine.h>
- #include <linux/platform_data/gpio-rcar.h>
-+#include <linux/platform_data/usb-rcar-phy.h>
- #include <linux/regulator/fixed.h>
- #include <linux/regulator/machine.h>
- #include <linux/smsc911x.h>
-@@ -56,7 +57,26 @@ static struct regulator_consumer_supply dummy_supplies[] = {
- 	REGULATOR_SUPPLY("vdd33a", "smsc911x"),
- };
- 
--static struct rcar_phy_platform_data usb_phy_platform_data __initdata;
-+/* USB PHY */
-+static struct resource usb_phy_resources[] = {
-+	[0] = {
-+		.start		= 0xffe70800,
-+		.end		= 0xffe70900 - 1,
-+		.flags		= IORESOURCE_MEM,
-+	},
-+};
-+
-+static struct rcar_phy_platform_data usb_phy_platform_data;
-+
-+static struct platform_device usb_phy = {
-+	.name		= "rcar_usb_phy",
-+	.id		= -1,
-+	.dev  = {
-+		.platform_data = &usb_phy_platform_data,
-+	},
-+	.resource	= usb_phy_resources,
-+	.num_resources	= ARRAY_SIZE(usb_phy_resources),
-+};
- 
- /* SMSC LAN89218 */
- static struct resource smsc911x_resources[] = {
-@@ -183,6 +203,7 @@ static struct platform_device *marzen_devices[] __initdata = {
- 	&thermal_device,
- 	&hspi_device,
- 	&leds_device,
-+	&usb_phy,
- };
- 
- static const struct pinctrl_map marzen_pinctrl_map[] = {
-@@ -233,7 +254,6 @@ static void __init marzen_init(void)
- 	r8a7779_init_irq_extpin(1); /* IRQ1 as individual interrupt */
- 
- 	r8a7779_add_standard_devices();
--	r8a7779_add_usb_phy_device(&usb_phy_platform_data);
- 	platform_add_devices(marzen_devices, ARRAY_SIZE(marzen_devices));
- }
- 
-diff --git a/arch/arm/mach-shmobile/include/mach/r8a7779.h b/arch/arm/mach-shmobile/include/mach/r8a7779.h
-index fc47073c..f10727f7 100644
---- a/arch/arm/mach-shmobile/include/mach/r8a7779.h
-+++ b/arch/arm/mach-shmobile/include/mach/r8a7779.h
-@@ -4,7 +4,6 @@
- #include <linux/sh_clk.h>
- #include <linux/pm_domain.h>
- #include <linux/sh_eth.h>
--#include <linux/platform_data/usb-rcar-phy.h>
- 
- struct platform_device;
- 
-@@ -34,7 +33,6 @@ extern void r8a7779_add_early_devices(void);
- extern void r8a7779_add_standard_devices(void);
- extern void r8a7779_add_standard_devices_dt(void);
- extern void r8a7779_add_ether_device(struct sh_eth_plat_data *pdata);
--extern void r8a7779_add_usb_phy_device(struct rcar_phy_platform_data *pdata);
- extern void r8a7779_init_late(void);
- extern void r8a7779_clock_init(void);
- extern void r8a7779_pinmux_init(void);
-diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c
-index bb8b9678..ddee4aa8 100644
---- a/arch/arm/mach-shmobile/setup-r8a7779.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7779.c
-@@ -386,15 +386,6 @@ static struct platform_device sata_device = {
- 	},
- };
- 
--/* USB PHY */
--static struct resource usb_phy_resources[] __initdata = {
--	[0] = {
--		.start		= 0xffe70800,
--		.end		= 0xffe70900 - 1,
--		.flags		= IORESOURCE_MEM,
--	},
--};
--
- /* USB */
- static struct usb_phy *phy;
- 
-@@ -600,14 +591,6 @@ void __init r8a7779_add_ether_device(struct sh_eth_plat_data *pdata)
- 					  pdata, sizeof(*pdata));
- }
- 
--void __init r8a7779_add_usb_phy_device(struct rcar_phy_platform_data *pdata)
--{
--	platform_device_register_resndata(&platform_bus, "rcar_usb_phy", -1,
--					  usb_phy_resources,
--					  ARRAY_SIZE(usb_phy_resources),
--					  pdata, sizeof(*pdata));
--}
--
- /* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */
- void __init __weak r8a7779_register_twd(void) { }
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0419-ARM-shmobile-marzen-Add-r8a7779-marzen.dtb.patch b/patches.renesas/0419-ARM-shmobile-marzen-Add-r8a7779-marzen.dtb.patch
deleted file mode 100644
index 3a4f760b27f80..0000000000000
--- a/patches.renesas/0419-ARM-shmobile-marzen-Add-r8a7779-marzen.dtb.patch
+++ /dev/null
@@ -1,66 +0,0 @@
-From 476a1eb2537347af585431878be032e63992d23a Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Fri, 26 Jul 2013 09:36:16 +0900
-Subject: ARM: shmobile: marzen: Add  r8a7779-marzen.dtb
-
-This is in preparation for converting the marzen board to
-use DT_MACHINE_START.
-
-Acked-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit d6b51d6b6a33974dfa7b091f61e7a2bedd62f298)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/Makefile           |  1 +
- arch/arm/boot/dts/r8a7779-marzen.dts | 27 +++++++++++++++++++++++++++
- 2 files changed, 28 insertions(+)
- create mode 100644 arch/arm/boot/dts/r8a7779-marzen.dts
-
-diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
-index 471bed78..fa0ae75f 100644
---- a/arch/arm/boot/dts/Makefile
-+++ b/arch/arm/boot/dts/Makefile
-@@ -165,6 +165,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \
- 	r8a7778-bockw.dtb \
- 	r8a7778-bockw-reference.dtb \
- 	r8a7740-armadillo800eva-reference.dtb \
-+	r8a7779-marzen.dtb \
- 	r8a7779-marzen-reference.dtb \
- 	r8a7790-lager.dtb \
- 	r8a7790-lager-reference.dtb \
-diff --git a/arch/arm/boot/dts/r8a7779-marzen.dts b/arch/arm/boot/dts/r8a7779-marzen.dts
-new file mode 100644
-index 00000000..f3f7f799
---- /dev/null
-+++ b/arch/arm/boot/dts/r8a7779-marzen.dts
-@@ -0,0 +1,27 @@
-+/*
-+ * Device Tree Source for the Marzen board
-+ *
-+ * Copyright (C) 2013 Renesas Solutions Corp.
-+ * Copyright (C) 2013 Simon Horman
-+ *
-+ * This file is licensed under the terms of the GNU General Public License
-+ * version 2.  This program is licensed "as is" without any warranty of any
-+ * kind, whether express or implied.
-+ */
-+
-+/dts-v1/;
-+/include/ "r8a7779.dtsi"
-+
-+/ {
-+	model = "marzen";
-+	compatible = "renesas,marzen", "renesas,r8a7779";
-+
-+	chosen {
-+		bootargs = "console=ttySC2,115200 earlyprintk=sh-sci.2,115200 ignore_loglevel root=/dev/nfs ip=on";
-+	};
-+
-+	memory {
-+		device_type = "memory";
-+		reg = <0x60000000 0x40000000>;
-+	};
-+};
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0420-ARM-shmobile-marzen-Switch-to-DT_MACHINE_START.patch b/patches.renesas/0420-ARM-shmobile-marzen-Switch-to-DT_MACHINE_START.patch
deleted file mode 100644
index 6a30ad0cb6ec4..0000000000000
--- a/patches.renesas/0420-ARM-shmobile-marzen-Switch-to-DT_MACHINE_START.patch
+++ /dev/null
@@ -1,61 +0,0 @@
-From d32a6be473e6f924ef1b546ccf612da961757db9 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Wed, 24 Jul 2013 16:30:42 +0900
-Subject: ARM: shmobile: marzen: Switch to DT_MACHINE_START
-
-Convert the marzen board to use DT_MACHINE_START. With this in
-place all mach-shmobile boards use DT_MACHINE_START. Also, this
-makes it possible for the r8a7779 SMP code to use DT for CPUs.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-[horms+renesas@verge.net.au: Select USE_OF in Kconfig]
-[horms+renesas@verge.net.au: Provide dt_compat in DT_MACHINE_START]
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-(cherry picked from commit 7ebbb4ae6f2d6242178d332c67ad49772f9fe88d)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/Kconfig        | 1 +
- arch/arm/mach-shmobile/board-marzen.c | 8 +++++++-
- 2 files changed, 8 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
-index 01308056..1f94c310 100644
---- a/arch/arm/mach-shmobile/Kconfig
-+++ b/arch/arm/mach-shmobile/Kconfig
-@@ -182,6 +182,7 @@ config MACH_MARZEN
- 	depends on ARCH_R8A7779
- 	select ARCH_REQUIRE_GPIOLIB
- 	select REGULATOR_FIXED_VOLTAGE if REGULATOR
-+	select USE_OF
- 
- config MACH_MARZEN_REFERENCE
- 	bool "MARZEN board - Reference Device Tree Implementation"
-diff --git a/arch/arm/mach-shmobile/board-marzen.c b/arch/arm/mach-shmobile/board-marzen.c
-index 7474a60f..2bf86c41 100644
---- a/arch/arm/mach-shmobile/board-marzen.c
-+++ b/arch/arm/mach-shmobile/board-marzen.c
-@@ -257,7 +257,12 @@ static void __init marzen_init(void)
- 	platform_add_devices(marzen_devices, ARRAY_SIZE(marzen_devices));
- }
- 
--MACHINE_START(MARZEN, "marzen")
-+static const char *marzen_boards_compat_dt[] __initdata = {
-+        "renesas,marzen",
-+        NULL,
-+};
-+
-+DT_MACHINE_START(MARZEN, "marzen")
- 	.smp		= smp_ops(r8a7779_smp_ops),
- 	.map_io		= r8a7779_map_io,
- 	.init_early	= r8a7779_add_early_devices,
-@@ -265,5 +270,6 @@ MACHINE_START(MARZEN, "marzen")
- 	.init_irq	= r8a7779_init_irq,
- 	.init_machine	= marzen_init,
- 	.init_late	= r8a7779_init_late,
-+	.dt_compat	= marzen_boards_compat_dt,
- 	.init_time	= r8a7779_earlytimer_init,
- MACHINE_END
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0421-ARM-shmobile-r8a7779-Rely-on-DT-for-SMP-CPU-info.patch b/patches.renesas/0421-ARM-shmobile-r8a7779-Rely-on-DT-for-SMP-CPU-info.patch
deleted file mode 100644
index 408c55cda9a7c..0000000000000
--- a/patches.renesas/0421-ARM-shmobile-r8a7779-Rely-on-DT-for-SMP-CPU-info.patch
+++ /dev/null
@@ -1,59 +0,0 @@
-From 4d8e6c8f5d6b4de942a2653f1fd3128059bb8be7 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Wed, 24 Jul 2013 17:11:46 +0900
-Subject: ARM: shmobile: r8a7779: Rely on DT for SMP CPU info
-
-Remove r8a7779 specific ->smp_init_cpus() callback and
-instead of relying on shmobile_smp_init_cpus() simply
-use DT for CPU core information.
-
-Based on work for the sh73a0 by Magnus Damm.
-
-Acked-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit afad20105a58c06407ad9ad85c1cd9ca79d99e00)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/smp-r8a7779.c | 12 +++---------
- 1 file changed, 3 insertions(+), 9 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/smp-r8a7779.c b/arch/arm/mach-shmobile/smp-r8a7779.c
-index 526cfaae..bb3adae7 100644
---- a/arch/arm/mach-shmobile/smp-r8a7779.c
-+++ b/arch/arm/mach-shmobile/smp-r8a7779.c
-@@ -99,6 +99,9 @@ static int __cpuinit r8a7779_boot_secondary(unsigned int cpu, struct task_struct
- 
- static void __init r8a7779_smp_prepare_cpus(unsigned int max_cpus)
- {
-+
-+	/* setup r8a7779 specific SCU base */
-+	shmobile_scu_base = IOMEM(R8A7779_SCU_BASE);
- 	scu_enable(shmobile_scu_base);
- 
- 	/* Map the reset vector (in headsmp-scu.S, headsmp.S) */
-@@ -117,14 +120,6 @@ static void __init r8a7779_smp_prepare_cpus(unsigned int max_cpus)
- 	r8a7779_platform_cpu_kill(3);
- }
- 
--static void __init r8a7779_smp_init_cpus(void)
--{
--	/* setup r8a7779 specific SCU base */
--	shmobile_scu_base = IOMEM(R8A7779_SCU_BASE);
--
--	shmobile_smp_init_cpus(scu_get_core_count(shmobile_scu_base));
--}
--
- #ifdef CONFIG_HOTPLUG_CPU
- static int r8a7779_scu_psr_core_disabled(int cpu)
- {
-@@ -175,7 +170,6 @@ static int r8a7779_cpu_disable(unsigned int cpu)
- #endif /* CONFIG_HOTPLUG_CPU */
- 
- struct smp_operations r8a7779_smp_ops  __initdata = {
--	.smp_init_cpus		= r8a7779_smp_init_cpus,
- 	.smp_prepare_cpus	= r8a7779_smp_prepare_cpus,
- 	.smp_boot_secondary	= r8a7779_boot_secondary,
- #ifdef CONFIG_HOTPLUG_CPU
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0422-ARM-shmobile-marzen-Enable-ARM_APPENDED_DTB-in-defco.patch b/patches.renesas/0422-ARM-shmobile-marzen-Enable-ARM_APPENDED_DTB-in-defco.patch
deleted file mode 100644
index f27bf2e83da86..0000000000000
--- a/patches.renesas/0422-ARM-shmobile-marzen-Enable-ARM_APPENDED_DTB-in-defco.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From 54fcb50948ce582390fc075be072d3715b007b94 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Wed, 24 Jul 2013 17:36:29 +0900
-Subject: ARM: shmobile: marzen: Enable ARM_APPENDED_DTB in defconfig
-
-"ARM: shmobile: marzen: Switch to DT_MACHINE_START" moves marzen
-over to use DT_MACHINE_START, however, the prevalent boot loader
-does not support booting with a separate dtb. Thus, it makes
-sense to use ARM_APPENDED_DTB by default.
-
-This is consistent with other shmobile defconfigs.
-
-Acked-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 8c167a825d56e9946bb54d91017a53efb04ffdaf)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/configs/marzen_defconfig | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/arch/arm/configs/marzen_defconfig b/arch/arm/configs/marzen_defconfig
-index 494e70ae..82e4040b 100644
---- a/arch/arm/configs/marzen_defconfig
-+++ b/arch/arm/configs/marzen_defconfig
-@@ -29,6 +29,7 @@ CONFIG_AEABI=y
- CONFIG_HIGHMEM=y
- CONFIG_ZBOOT_ROM_TEXT=0x0
- CONFIG_ZBOOT_ROM_BSS=0x0
-+CONFIG_ARM_APPENDED_DTB=y
- CONFIG_CMDLINE="console=ttySC2,115200 earlyprintk=sh-sci.2,115200 ignore_loglevel root=/dev/nfs ip=on"
- CONFIG_CMDLINE_FORCE=y
- CONFIG_KEXEC=y
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0423-ARM-shmobile-r8a7779-Remove-0x-s-from-R8A7779-DTS-fi.patch b/patches.renesas/0423-ARM-shmobile-r8a7779-Remove-0x-s-from-R8A7779-DTS-fi.patch
deleted file mode 100644
index 6b8d68607159a..0000000000000
--- a/patches.renesas/0423-ARM-shmobile-r8a7779-Remove-0x-s-from-R8A7779-DTS-fi.patch
+++ /dev/null
@@ -1,56 +0,0 @@
-From 02f012add0d17aa0980470d261b86c97f8604f09 Mon Sep 17 00:00:00 2001
-From: Lee Jones <lee.jones@linaro.org>
-Date: Mon, 22 Jul 2013 11:52:38 +0100
-Subject: ARM: shmobile: r8a7779: Remove '0x's from R8A7779 DTS file
-
-Signed-off-by: Lee Jones <lee.jones@linaro.org>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 98724b7ec9d34d875fc193660c87d6dd0d17ceb7)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7779.dtsi | 8 ++++----
- 1 file changed, 4 insertions(+), 4 deletions(-)
-
-diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi
-index e9fbe3d5..23a62447 100644
---- a/arch/arm/boot/dts/r8a7779.dtsi
-+++ b/arch/arm/boot/dts/r8a7779.dtsi
-@@ -149,7 +149,7 @@
- 		sense-bitfield-width = <2>;
- 	};
- 
--	i2c0: i2c@0xffc70000 {
-+	i2c0: i2c@ffc70000 {
- 		#address-cells = <1>;
- 		#size-cells = <0>;
- 		compatible = "renesas,rmobile-iic";
-@@ -158,7 +158,7 @@
- 		interrupts = <0 79 0x4>;
- 	};
- 
--	i2c1: i2c@0xffc71000 {
-+	i2c1: i2c@ffc71000 {
- 		#address-cells = <1>;
- 		#size-cells = <0>;
- 		compatible = "renesas,rmobile-iic";
-@@ -167,7 +167,7 @@
- 		interrupts = <0 82 0x4>;
- 	};
- 
--	i2c2: i2c@0xffc72000 {
-+	i2c2: i2c@ffc72000 {
- 		#address-cells = <1>;
- 		#size-cells = <0>;
- 		compatible = "renesas,rmobile-iic";
-@@ -176,7 +176,7 @@
- 		interrupts = <0 80 0x4>;
- 	};
- 
--	i2c3: i2c@0xffc73000 {
-+	i2c3: i2c@ffc73000 {
- 		#address-cells = <1>;
- 		#size-cells = <0>;
- 		compatible = "renesas,rmobile-iic";
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0424-ARM-shmobile-r8a7740-add-PMU-information-to-r8a7740..patch b/patches.renesas/0424-ARM-shmobile-r8a7740-add-PMU-information-to-r8a7740..patch
deleted file mode 100644
index 778ec308880f6..0000000000000
--- a/patches.renesas/0424-ARM-shmobile-r8a7740-add-PMU-information-to-r8a7740..patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From e7f58a38be2f3fffff97c79d45e92542064c1118 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Wed, 24 Jul 2013 12:59:09 +0900
-Subject: ARM: shmobile: r8a7740: add PMU information to r8a7740.dtsi
-
-Add PMU information to r8a7740.dtsi. With this
-included Armadillo800eva DT reference may use the PMU.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit b21ed4eb948e6c59dea30a7102d9736903bff26e)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7740.dtsi | 5 +++++
- 1 file changed, 5 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi
-index e18a195b..1d1aeb6d 100644
---- a/arch/arm/boot/dts/r8a7740.dtsi
-+++ b/arch/arm/boot/dts/r8a7740.dtsi
-@@ -32,6 +32,11 @@
- 		      <0xc2000000 0x1000>;
- 	};
- 
-+	pmu {
-+		compatible = "arm,cortex-a9-pmu";
-+		interrupts = <0 83 4>;
-+	};
-+
- 	/* irqpin0: IRQ0 - IRQ7 */
- 	irqpin0: irqpin@e6900000 {
- 		compatible = "renesas,intc-irqpin";
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0425-ARM-shmobile-sh73a0-add-PMU-information-to-sh73a0.dt.patch b/patches.renesas/0425-ARM-shmobile-sh73a0-add-PMU-information-to-sh73a0.dt.patch
deleted file mode 100644
index de1bbfb6619d1..0000000000000
--- a/patches.renesas/0425-ARM-shmobile-sh73a0-add-PMU-information-to-sh73a0.dt.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From e74cceba6b0221267d967c8eab37a5022efbce3d Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Wed, 24 Jul 2013 12:45:03 +0900
-Subject: ARM: shmobile: sh73a0: add PMU information to sh73a0.dtsi
-
-Add PMU information to sh73a0.dtsi. With this
-included KZM9G DT reference may use the PMU.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 4c90483a9c09ac8c18df43901c493e546bdaaabe)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/sh73a0.dtsi | 6 ++++++
- 1 file changed, 6 insertions(+)
-
-diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi
-index 86e79feb..ba59a587 100644
---- a/arch/arm/boot/dts/sh73a0.dtsi
-+++ b/arch/arm/boot/dts/sh73a0.dtsi
-@@ -38,6 +38,12 @@
- 		      <0xf0000100 0x100>;
- 	};
- 
-+	pmu {
-+		compatible = "arm,cortex-a9-pmu";
-+		interrupts = <0 55 4>,
-+			     <0 56 4>;
-+	};
-+
- 	irqpin0: irqpin@e6900000 {
- 		compatible = "renesas,intc-irqpin";
- 		#interrupt-cells = <2>;
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0426-ARM-shmobile-emev2-add-PMU-information-to-emev2.dtsi.patch b/patches.renesas/0426-ARM-shmobile-emev2-add-PMU-information-to-emev2.dtsi.patch
deleted file mode 100644
index 1638c10c36001..0000000000000
--- a/patches.renesas/0426-ARM-shmobile-emev2-add-PMU-information-to-emev2.dtsi.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From 49e213828c11c83528f85ba6251bf20f5ce8482c Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Wed, 24 Jul 2013 12:42:40 +0900
-Subject: ARM: shmobile: emev2: add PMU information to emev2.dtsi
-
-Add PMU information to emev2.dtsi. With this
-included KZM9D DT reference may use the PMU.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit c95ebbb298e698836979ab28ce49383402c22d93)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/emev2.dtsi | 6 ++++++
- 1 file changed, 6 insertions(+)
-
-diff --git a/arch/arm/boot/dts/emev2.dtsi b/arch/arm/boot/dts/emev2.dtsi
-index 99ad2b2e..9063a443 100644
---- a/arch/arm/boot/dts/emev2.dtsi
-+++ b/arch/arm/boot/dts/emev2.dtsi
-@@ -46,6 +46,12 @@
- 		      <0xe0020000 0x0100>;
- 	};
- 
-+	pmu {
-+		compatible = "arm,cortex-a9-pmu";
-+		interrupts = <0 120 4>,
-+			     <0 121 4>;
-+	};
-+
- 	sti@e0180000 {
- 		compatible = "renesas,em-sti";
- 		reg = <0xe0180000 0x54>;
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0427-ARM-shmobile-Add-lager-defconfig.patch b/patches.renesas/0427-ARM-shmobile-Add-lager-defconfig.patch
deleted file mode 100644
index b7ca7c2123515..0000000000000
--- a/patches.renesas/0427-ARM-shmobile-Add-lager-defconfig.patch
+++ /dev/null
@@ -1,147 +0,0 @@
-From 2ac3c2f45d04e03586f3fe9982aa12753cd0d4fb Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Wed, 31 Jul 2013 15:29:25 +0900
-Subject: ARM: shmobile: Add lager defconfig
-
-This is intended to be used until multi-arch is able to be
-used for the lager board at which time a more generic configuration
-will be used in place of this one.
-
-Acked-by: Magnus Damm <magnus.damm@gmail.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 7c7d3d596c33f5cde22fd5744b6c9bb571637715)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/configs/lager_defconfig | 120 +++++++++++++++++++++++++++++++++++++++
- 1 file changed, 120 insertions(+)
- create mode 100644 arch/arm/configs/lager_defconfig
-
-diff --git a/arch/arm/configs/lager_defconfig b/arch/arm/configs/lager_defconfig
-new file mode 100644
-index 00000000..e777ef22
---- /dev/null
-+++ b/arch/arm/configs/lager_defconfig
-@@ -0,0 +1,120 @@
-+CONFIG_SYSVIPC=y
-+CONFIG_NO_HZ=y
-+CONFIG_IKCONFIG=y
-+CONFIG_IKCONFIG_PROC=y
-+CONFIG_LOG_BUF_SHIFT=16
-+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
-+CONFIG_SYSCTL_SYSCALL=y
-+CONFIG_EMBEDDED=y
-+CONFIG_PERF_EVENTS=y
-+CONFIG_SLAB=y
-+# CONFIG_LBDAF is not set
-+# CONFIG_BLK_DEV_BSG is not set
-+# CONFIG_IOSCHED_DEADLINE is not set
-+# CONFIG_IOSCHED_CFQ is not set
-+CONFIG_ARCH_SHMOBILE=y
-+CONFIG_ARCH_R8A7790=y
-+CONFIG_MACH_LAGER=y
-+# CONFIG_SH_TIMER_TMU is not set
-+# CONFIG_EM_TIMER_STI is not set
-+CONFIG_ARM_ERRATA_430973=y
-+CONFIG_ARM_ERRATA_458693=y
-+CONFIG_ARM_ERRATA_460075=y
-+CONFIG_ARM_ERRATA_743622=y
-+CONFIG_ARM_ERRATA_754322=y
-+CONFIG_HAVE_ARM_ARCH_TIMER=y
-+CONFIG_AEABI=y
-+# CONFIG_OABI_COMPAT is not set
-+CONFIG_FORCE_MAX_ZONEORDER=13
-+CONFIG_ZBOOT_ROM_TEXT=0x0
-+CONFIG_ZBOOT_ROM_BSS=0x0
-+CONFIG_ARM_APPENDED_DTB=y
-+CONFIG_KEXEC=y
-+CONFIG_AUTO_ZRELADDR=y
-+CONFIG_VFP=y
-+CONFIG_NEON=y
-+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
-+CONFIG_PM_RUNTIME=y
-+CONFIG_NET=y
-+CONFIG_PACKET=y
-+CONFIG_UNIX=y
-+CONFIG_INET=y
-+CONFIG_IP_PNP=y
-+CONFIG_IP_PNP_DHCP=y
-+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-+# CONFIG_INET_XFRM_MODE_BEET is not set
-+# CONFIG_INET_LRO is not set
-+# CONFIG_INET_DIAG is not set
-+# CONFIG_IPV6 is not set
-+# CONFIG_WIRELESS is not set
-+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-+CONFIG_NETDEVICES=y
-+# CONFIG_NET_CORE is not set
-+# CONFIG_NET_VENDOR_ARC is not set
-+# CONFIG_NET_CADENCE is not set
-+# CONFIG_NET_VENDOR_BROADCOM is not set
-+# CONFIG_NET_VENDOR_CIRRUS is not set
-+# CONFIG_NET_VENDOR_FARADAY is not set
-+# CONFIG_NET_VENDOR_INTEL is not set
-+# CONFIG_NET_VENDOR_MARVELL is not set
-+# CONFIG_NET_VENDOR_MICREL is not set
-+# CONFIG_NET_VENDOR_NATSEMI is not set
-+CONFIG_SH_ETH=y
-+# CONFIG_NET_VENDOR_SEEQ is not set
-+# CONFIG_NET_VENDOR_SMSC is not set
-+# CONFIG_NET_VENDOR_STMICRO is not set
-+# CONFIG_NET_VENDOR_VIA is not set
-+# CONFIG_NET_VENDOR_WIZNET is not set
-+# CONFIG_WLAN is not set
-+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-+CONFIG_INPUT_EVDEV=y
-+# CONFIG_KEYBOARD_ATKBD is not set
-+CONFIG_KEYBOARD_GPIO=y
-+# CONFIG_INPUT_MOUSE is not set
-+# CONFIG_SERIO is not set
-+# CONFIG_LEGACY_PTYS is not set
-+CONFIG_SERIAL_SH_SCI=y
-+CONFIG_SERIAL_SH_SCI_NR_UARTS=10
-+CONFIG_SERIAL_SH_SCI_CONSOLE=y
-+# CONFIG_HW_RANDOM is not set
-+CONFIG_I2C=y
-+CONFIG_I2C_GPIO=y
-+CONFIG_I2C_SH_MOBILE=y
-+CONFIG_GPIO_SH_PFC=y
-+CONFIG_GPIOLIB=y
-+CONFIG_GPIO_RCAR=y
-+# CONFIG_HWMON is not set
-+CONFIG_THERMAL=y
-+CONFIG_RCAR_THERMAL=y
-+CONFIG_REGULATOR=y
-+CONFIG_REGULATOR_FIXED_VOLTAGE=y
-+# CONFIG_USB_SUPPORT is not set
-+CONFIG_MMC=y
-+CONFIG_MMC_SDHI=y
-+CONFIG_MMC_SH_MMCIF=y
-+CONFIG_NEW_LEDS=y
-+CONFIG_LEDS_CLASS=y
-+CONFIG_LEDS_GPIO=y
-+CONFIG_RTC_CLASS=y
-+CONFIG_DMADEVICES=y
-+CONFIG_SH_DMAE=y
-+# CONFIG_IOMMU_SUPPORT is not set
-+# CONFIG_DNOTIFY is not set
-+CONFIG_MSDOS_FS=y
-+CONFIG_VFAT_FS=y
-+CONFIG_TMPFS=y
-+CONFIG_CONFIGFS_FS=y
-+# CONFIG_MISC_FILESYSTEMS is not set
-+CONFIG_NFS_FS=y
-+CONFIG_NFS_V3_ACL=y
-+CONFIG_NFS_V4=y
-+CONFIG_NFS_V4_1=y
-+CONFIG_ROOT_NFS=y
-+CONFIG_NLS_CODEPAGE_437=y
-+CONFIG_NLS_ISO8859_1=y
-+# CONFIG_ENABLE_WARN_DEPRECATED is not set
-+# CONFIG_ENABLE_MUST_CHECK is not set
-+# CONFIG_ARM_UNWIND is not set
-+# CONFIG_CRYPTO_ANSI_CPRNG is not set
-+# CONFIG_CRYPTO_HW is not set
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0428-ARM-shmobile-ape6evm-add-__initconst-annotations-whe.patch b/patches.renesas/0428-ARM-shmobile-ape6evm-add-__initconst-annotations-whe.patch
deleted file mode 100644
index 1dcdbc2140d47..0000000000000
--- a/patches.renesas/0428-ARM-shmobile-ape6evm-add-__initconst-annotations-whe.patch
+++ /dev/null
@@ -1,91 +0,0 @@
-From 5b64006979c3399eeee0dc07c7b1035f609dc707 Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Wed, 31 Jul 2013 14:40:14 +0200
-Subject: ARM: shmobile: ape6evm: add "__initconst" annotations where needed
-
-This patch adds __initconst markers to the platform data and resources,
-used on ape6evm as parameters to platform_device_register_resndata().
-The data is duplicated inside that function, therefore original data
-can be discarded after initialisation is completed.
-
-Reported-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 23f1751c5fef5c33e6a58ed2448774aeae436a39)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-ape6evm.c | 18 +++++++++---------
- 1 file changed, 9 insertions(+), 9 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-ape6evm.c b/arch/arm/mach-shmobile/board-ape6evm.c
-index ccf8b042..c5e6cba8 100644
---- a/arch/arm/mach-shmobile/board-ape6evm.c
-+++ b/arch/arm/mach-shmobile/board-ape6evm.c
-@@ -44,7 +44,7 @@ static struct regulator_consumer_supply dummy_supplies[] = {
- };
- 
- /* SMSC LAN9220 */
--static const struct resource lan9220_res[] = {
-+static const struct resource lan9220_res[] __initconst = {
- 	DEFINE_RES_MEM(0x08000000, 0x1000),
- 	{
- 		.start	= irq_pin(40), /* IRQ40 */
-@@ -52,7 +52,7 @@ static const struct resource lan9220_res[] = {
- 	},
- };
- 
--static const struct smsc911x_platform_config lan9220_data = {
-+static const struct smsc911x_platform_config lan9220_data __initconst = {
- 	.flags		= SMSC911X_USE_32BIT,
- 	.irq_type	= SMSC911X_IRQ_TYPE_PUSH_PULL,
- 	.irq_polarity	= SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
-@@ -73,39 +73,39 @@ static struct regulator_consumer_supply fixed3v3_power_consumers[] =
- };
- 
- /* MMCIF */
--static struct sh_mmcif_plat_data mmcif0_pdata = {
-+static const struct sh_mmcif_plat_data mmcif0_pdata __initconst = {
- 	.caps		= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
- };
- 
--static struct resource mmcif0_resources[] = {
-+static const struct resource mmcif0_resources[] __initconst = {
- 	DEFINE_RES_MEM_NAMED(0xee200000, 0x100, "MMCIF0"),
- 	DEFINE_RES_IRQ(gic_spi(169)),
- };
- 
- /* SDHI0 */
--static struct sh_mobile_sdhi_info sdhi0_pdata = {
-+static const struct sh_mobile_sdhi_info sdhi0_pdata __initconst = {
- 	.tmio_flags	= TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_WRPROTECT_DISABLE,
- 	.tmio_caps	= MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
- };
- 
--static struct resource sdhi0_resources[] = {
-+static const struct resource sdhi0_resources[] __initconst = {
- 	DEFINE_RES_MEM_NAMED(0xee100000, 0x100, "SDHI0"),
- 	DEFINE_RES_IRQ(gic_spi(165)),
- };
- 
- /* SDHI1 */
--static struct sh_mobile_sdhi_info sdhi1_pdata = {
-+static const struct sh_mobile_sdhi_info sdhi1_pdata __initconst = {
- 	.tmio_flags	= TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_WRPROTECT_DISABLE,
- 	.tmio_caps	= MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
- 			  MMC_CAP_NEEDS_POLL,
- };
- 
--static struct resource sdhi1_resources[] = {
-+static const struct resource sdhi1_resources[] __initconst = {
- 	DEFINE_RES_MEM_NAMED(0xee120000, 0x100, "SDHI1"),
- 	DEFINE_RES_IRQ(gic_spi(166)),
- };
- 
--static const struct pinctrl_map ape6evm_pinctrl_map[] = {
-+static const struct pinctrl_map ape6evm_pinctrl_map[] __initconst = {
- 	/* SCIFA0 console */
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a73a4",
- 				  "scifa0_data", "scifa0"),
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0429-ARM-shmobile-Mount-root-file-systems-in-r-w-mode-for.patch b/patches.renesas/0429-ARM-shmobile-Mount-root-file-systems-in-r-w-mode-for.patch
deleted file mode 100644
index 911e022166d1e..0000000000000
--- a/patches.renesas/0429-ARM-shmobile-Mount-root-file-systems-in-r-w-mode-for.patch
+++ /dev/null
@@ -1,147 +0,0 @@
-From 52a1befa5e65569f9e5a79ae2944cbefbffa9957 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Mon, 29 Jul 2013 22:31:41 +0200
-Subject: ARM: shmobile: Mount root file systems in r/w mode for all DT
- platforms
-
-The shmobile DT files available in the kernel are reference
-implementations intended to be used as sample code, as well as for
-development. As such, it makes sense to mount the root file system in
-read/write mode by default.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit d2f463a66abb1edc3b0ab6cc8252d9fa4e3d30e8)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts | 2 +-
- arch/arm/boot/dts/r8a73a4-ape6evm.dts           | 2 +-
- arch/arm/boot/dts/r8a7778-bockw-reference.dts   | 2 +-
- arch/arm/boot/dts/r8a7778-bockw.dts             | 2 +-
- arch/arm/boot/dts/r8a7779-marzen-reference.dts  | 2 +-
- arch/arm/boot/dts/r8a7790-lager-reference.dts   | 2 +-
- arch/arm/boot/dts/r8a7790-lager.dts             | 2 +-
- arch/arm/boot/dts/sh73a0-kzm9g-reference.dts    | 2 +-
- arch/arm/boot/dts/sh73a0-kzm9g.dts              | 2 +-
- 9 files changed, 9 insertions(+), 9 deletions(-)
-
-diff --git a/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts b/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts
-index bbd09d8c..f444624e 100644
---- a/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts
-+++ b/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts
-@@ -16,7 +16,7 @@
- 	compatible = "renesas,ape6evm-reference", "renesas,r8a73a4";
- 
- 	chosen {
--		bootargs = "console=ttySC0,115200 ignore_loglevel";
-+		bootargs = "console=ttySC0,115200 ignore_loglevel rw";
- 	};
- 
- 	memory@40000000 {
-diff --git a/arch/arm/boot/dts/r8a73a4-ape6evm.dts b/arch/arm/boot/dts/r8a73a4-ape6evm.dts
-index e657a9db..72f867e6 100644
---- a/arch/arm/boot/dts/r8a73a4-ape6evm.dts
-+++ b/arch/arm/boot/dts/r8a73a4-ape6evm.dts
-@@ -16,7 +16,7 @@
- 	compatible = "renesas,ape6evm", "renesas,r8a73a4";
- 
- 	chosen {
--		bootargs = "console=ttySC0,115200 ignore_loglevel root=/dev/nfs ip=dhcp";
-+		bootargs = "console=ttySC0,115200 ignore_loglevel root=/dev/nfs ip=dhcp rw";
- 	};
- 
- 	memory@40000000 {
-diff --git a/arch/arm/boot/dts/r8a7778-bockw-reference.dts b/arch/arm/boot/dts/r8a7778-bockw-reference.dts
-index f5b8d774..9bb903a3 100644
---- a/arch/arm/boot/dts/r8a7778-bockw-reference.dts
-+++ b/arch/arm/boot/dts/r8a7778-bockw-reference.dts
-@@ -22,7 +22,7 @@
- 	compatible = "renesas,bockw-reference", "renesas,r8a7778";
- 
- 	chosen {
--		bootargs = "console=ttySC0,115200 ignore_loglevel";
-+		bootargs = "console=ttySC0,115200 ignore_loglevel rw";
- 	};
- 
- 	memory {
-diff --git a/arch/arm/boot/dts/r8a7778-bockw.dts b/arch/arm/boot/dts/r8a7778-bockw.dts
-index 0076b1e8..12bbebc9 100644
---- a/arch/arm/boot/dts/r8a7778-bockw.dts
-+++ b/arch/arm/boot/dts/r8a7778-bockw.dts
-@@ -22,7 +22,7 @@
- 	compatible = "renesas,bockw", "renesas,r8a7778";
- 
- 	chosen {
--		bootargs = "console=ttySC0,115200 ignore_loglevel ip=dhcp root=/dev/nfs";
-+		bootargs = "console=ttySC0,115200 ignore_loglevel ip=dhcp root=/dev/nfs rw";
- 	};
- 
- 	memory {
-diff --git a/arch/arm/boot/dts/r8a7779-marzen-reference.dts b/arch/arm/boot/dts/r8a7779-marzen-reference.dts
-index b64705be..6d550839 100644
---- a/arch/arm/boot/dts/r8a7779-marzen-reference.dts
-+++ b/arch/arm/boot/dts/r8a7779-marzen-reference.dts
-@@ -18,7 +18,7 @@
- 	compatible = "renesas,marzen-reference", "renesas,r8a7779";
- 
- 	chosen {
--		bootargs = "console=ttySC2,115200 earlyprintk=sh-sci.2,115200 ignore_loglevel root=/dev/nfs ip=on";
-+		bootargs = "console=ttySC2,115200 earlyprintk=sh-sci.2,115200 ignore_loglevel root=/dev/nfs ip=on rw";
- 	};
- 
- 	memory {
-diff --git a/arch/arm/boot/dts/r8a7790-lager-reference.dts b/arch/arm/boot/dts/r8a7790-lager-reference.dts
-index 5ee71cf5..c462ef13 100644
---- a/arch/arm/boot/dts/r8a7790-lager-reference.dts
-+++ b/arch/arm/boot/dts/r8a7790-lager-reference.dts
-@@ -17,7 +17,7 @@
- 	compatible = "renesas,lager-reference", "renesas,r8a7790";
- 
- 	chosen {
--		bootargs = "console=ttySC6,115200 ignore_loglevel";
-+		bootargs = "console=ttySC6,115200 ignore_loglevel rw";
- 	};
- 
- 	memory@40000000 {
-diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts
-index 09a84fce..631b93bc 100644
---- a/arch/arm/boot/dts/r8a7790-lager.dts
-+++ b/arch/arm/boot/dts/r8a7790-lager.dts
-@@ -16,7 +16,7 @@
- 	compatible = "renesas,lager", "renesas,r8a7790";
- 
- 	chosen {
--		bootargs = "console=ttySC6,115200 ignore_loglevel";
-+		bootargs = "console=ttySC6,115200 ignore_loglevel rw";
- 	};
- 
- 	memory@40000000 {
-diff --git a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
-index b99e890d..21223062 100644
---- a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
-+++ b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
-@@ -33,7 +33,7 @@
- 	};
- 
- 	chosen {
--		bootargs = "console=tty0 console=ttySC4,115200 root=/dev/nfs ip=dhcp ignore_loglevel earlyprintk=sh-sci.4,115200";
-+		bootargs = "console=tty0 console=ttySC4,115200 root=/dev/nfs ip=dhcp ignore_loglevel earlyprintk=sh-sci.4,115200 rw";
- 	};
- 
- 	memory {
-diff --git a/arch/arm/boot/dts/sh73a0-kzm9g.dts b/arch/arm/boot/dts/sh73a0-kzm9g.dts
-index 7c4071e7..0f1ca779 100644
---- a/arch/arm/boot/dts/sh73a0-kzm9g.dts
-+++ b/arch/arm/boot/dts/sh73a0-kzm9g.dts
-@@ -16,7 +16,7 @@
- 	compatible = "renesas,kzm9g", "renesas,sh73a0";
- 
- 	chosen {
--		bootargs = "console=tty0 console=ttySC4,115200 root=/dev/nfs ip=dhcp ignore_loglevel earlyprintk=sh-sci.4,115200";
-+		bootargs = "console=tty0 console=ttySC4,115200 root=/dev/nfs ip=dhcp ignore_loglevel earlyprintk=sh-sci.4,115200 rw";
- 	};
- 
- 	memory {
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0430-ARM-shmobile-lager-add-missing-__initdata.patch b/patches.renesas/0430-ARM-shmobile-lager-add-missing-__initdata.patch
deleted file mode 100644
index e7b827934b2a6..0000000000000
--- a/patches.renesas/0430-ARM-shmobile-lager-add-missing-__initdata.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 283809123ae34d23446ca1d691746c393ebda009 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Thu, 1 Aug 2013 18:34:37 -0700
-Subject: ARM: shmobile: lager: add missing __initdata
-
-This patch adds missing __initdata to driver data/resource
-which are used from platform_device_register_xxx()
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 8c8881b50691e17864cc54e5824b140e62fc2035)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-lager.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
-index 3a1a6fdc..aa8be240 100644
---- a/arch/arm/mach-shmobile/board-lager.c
-+++ b/arch/arm/mach-shmobile/board-lager.c
-@@ -82,11 +82,11 @@ static struct regulator_consumer_supply fixed3v3_power_consumers[] =
- };
- 
- /* MMCIF */
--static struct sh_mmcif_plat_data mmcif1_pdata = {
-+static struct sh_mmcif_plat_data mmcif1_pdata __initdata = {
- 	.caps		= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
- };
- 
--static struct resource mmcif1_resources[] = {
-+static struct resource mmcif1_resources[] __initdata = {
- 	DEFINE_RES_MEM_NAMED(0xee220000, 0x80, "MMCIF1"),
- 	DEFINE_RES_IRQ(gic_spi(170)),
- };
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0431-ARM-shmobile-ape6evm-Enable-gpio-keys-in-defconfig.patch b/patches.renesas/0431-ARM-shmobile-ape6evm-Enable-gpio-keys-in-defconfig.patch
deleted file mode 100644
index f46e1751e9c92..0000000000000
--- a/patches.renesas/0431-ARM-shmobile-ape6evm-Enable-gpio-keys-in-defconfig.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From 754b82dedea3db5adf5c38dde8c9d89089cf9cb0 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Tue, 30 Jul 2013 10:59:01 +0900
-Subject: ARM: shmobile: ape6evm: Enable gpio-keys in defconfig
-
-Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit ab4d2cd1c9543efdf7e9bf942c0199d199abf3e0)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/configs/ape6evm_defconfig | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/configs/ape6evm_defconfig b/arch/arm/configs/ape6evm_defconfig
-index dab5a7df..e4359c7e 100644
---- a/arch/arm/configs/ape6evm_defconfig
-+++ b/arch/arm/configs/ape6evm_defconfig
-@@ -54,7 +54,8 @@ CONFIG_NETDEVICES=y
- CONFIG_SMC91X=y
- CONFIG_SMSC911X=y
- # CONFIG_INPUT_MOUSEDEV is not set
--# CONFIG_INPUT_KEYBOARD is not set
-+CONFIG_INPUT_EVDEV=y
-+CONFIG_KEYBOARD_GPIO=y
- # CONFIG_INPUT_MOUSE is not set
- # CONFIG_SERIO is not set
- CONFIG_SERIAL_NONSTANDARD=y
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0432-ARM-shmobile-ape6evm-Enable-gpio-leds-in-defconfig.patch b/patches.renesas/0432-ARM-shmobile-ape6evm-Enable-gpio-leds-in-defconfig.patch
deleted file mode 100644
index c125ffbf28d33..0000000000000
--- a/patches.renesas/0432-ARM-shmobile-ape6evm-Enable-gpio-leds-in-defconfig.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From 6afee03fbbcb417c1afc64218ca08908c405c924 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Tue, 30 Jul 2013 10:59:03 +0900
-Subject: ARM: shmobile: ape6evm: Enable gpio-leds in defconfig
-
-Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 461cd47a65f5d8513a983ebd21ef7c23d4b4730f)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/configs/ape6evm_defconfig | 3 +++
- 1 file changed, 3 insertions(+)
-
-diff --git a/arch/arm/configs/ape6evm_defconfig b/arch/arm/configs/ape6evm_defconfig
-index e4359c7e..1ce39940 100644
---- a/arch/arm/configs/ape6evm_defconfig
-+++ b/arch/arm/configs/ape6evm_defconfig
-@@ -72,6 +72,9 @@ CONFIG_REGULATOR_FIXED_VOLTAGE=y
- CONFIG_REGULATOR_GPIO=y
- # CONFIG_HID is not set
- # CONFIG_USB_SUPPORT is not set
-+CONFIG_NEW_LEDS=y
-+CONFIG_LEDS_CLASS=y
-+CONFIG_LEDS_GPIO=y
- # CONFIG_IOMMU_SUPPORT is not set
- # CONFIG_DNOTIFY is not set
- CONFIG_TMPFS=y
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0433-ARM-shmobile-armadillo800eva-Use-DT-for-GIC.patch b/patches.renesas/0433-ARM-shmobile-armadillo800eva-Use-DT-for-GIC.patch
deleted file mode 100644
index 859eab0a208f3..0000000000000
--- a/patches.renesas/0433-ARM-shmobile-armadillo800eva-Use-DT-for-GIC.patch
+++ /dev/null
@@ -1,93 +0,0 @@
-From c70cb4f3542000200273579d887bf786d3b51079 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Thu, 1 Aug 2013 23:39:13 -0700
-Subject: ARM: shmobile: armadillo800eva: Use DT for GIC
-
-Current Armadillo800eva is using DT booting,
-and r8a7740.dtsi already has GIC settings.
-
-So, we can remove the C version of the GIC setup code,
-instead rely on GIC information provided by DT.
-
-This patch removes r8a7740_init_irq() which has
-no user any more
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Acked-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 15645581a9401cf2370d2c975e2673d289d5e561)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-armadillo800eva.c |  2 +-
- arch/arm/mach-shmobile/include/mach/r8a7740.h  |  1 -
- arch/arm/mach-shmobile/intc-r8a7740.c          | 20 +++-----------------
- 3 files changed, 4 insertions(+), 19 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c
-index 9bb74729..471440ba 100644
---- a/arch/arm/mach-shmobile/board-armadillo800eva.c
-+++ b/arch/arm/mach-shmobile/board-armadillo800eva.c
-@@ -1313,7 +1313,7 @@ static const char *eva_boards_compat_dt[] __initdata = {
- DT_MACHINE_START(ARMADILLO800EVA_DT, "armadillo800eva")
- 	.map_io		= r8a7740_map_io,
- 	.init_early	= eva_add_early_devices,
--	.init_irq	= r8a7740_init_irq,
-+	.init_irq	= r8a7740_init_irq_of,
- 	.init_machine	= eva_init,
- 	.init_late	= shmobile_init_late,
- 	.init_time	= eva_earlytimer_init,
-diff --git a/arch/arm/mach-shmobile/include/mach/r8a7740.h b/arch/arm/mach-shmobile/include/mach/r8a7740.h
-index 56f37500..d07932f8 100644
---- a/arch/arm/mach-shmobile/include/mach/r8a7740.h
-+++ b/arch/arm/mach-shmobile/include/mach/r8a7740.h
-@@ -48,7 +48,6 @@ enum {
- 
- extern void r8a7740_meram_workaround(void);
- extern void r8a7740_init_delay(void);
--extern void r8a7740_init_irq(void);
- extern void r8a7740_init_irq_of(void);
- extern void r8a7740_map_io(void);
- extern void r8a7740_add_early_devices(void);
-diff --git a/arch/arm/mach-shmobile/intc-r8a7740.c b/arch/arm/mach-shmobile/intc-r8a7740.c
-index 8871f771..75193539 100644
---- a/arch/arm/mach-shmobile/intc-r8a7740.c
-+++ b/arch/arm/mach-shmobile/intc-r8a7740.c
-@@ -23,12 +23,14 @@
- #include <linux/irqchip.h>
- #include <linux/irqchip/arm-gic.h>
- 
--static void __init r8a7740_init_irq_common(void)
-+void __init r8a7740_init_irq_of(void)
- {
- 	void __iomem *intc_prio_base = ioremap_nocache(0xe6900010, 0x10);
- 	void __iomem *intc_msk_base = ioremap_nocache(0xe6900040, 0x10);
- 	void __iomem *pfc_inta_ctrl = ioremap_nocache(0xe605807c, 0x4);
- 
-+	irqchip_init();
-+
- 	/* route signals to GIC */
- 	iowrite32(0x0, pfc_inta_ctrl);
- 
-@@ -50,19 +52,3 @@ static void __init r8a7740_init_irq_common(void)
- 	iounmap(intc_msk_base);
- 	iounmap(pfc_inta_ctrl);
- }
--
--void __init r8a7740_init_irq_of(void)
--{
--	irqchip_init();
--	r8a7740_init_irq_common();
--}
--
--void __init r8a7740_init_irq(void)
--{
--	void __iomem *gic_dist_base = ioremap_nocache(0xc2800000, 0x1000);
--	void __iomem *gic_cpu_base = ioremap_nocache(0xc2000000, 0x1000);
--
--	/* initialize the Generic Interrupt Controller PL390 r0p0 */
--	gic_init(0, 29, gic_dist_base, gic_cpu_base);
--	r8a7740_init_irq_common();
--}
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0434-ARM-shmobile-marzen-Use-DT-for-GIC.patch b/patches.renesas/0434-ARM-shmobile-marzen-Use-DT-for-GIC.patch
deleted file mode 100644
index d0f53ef0c4504..0000000000000
--- a/patches.renesas/0434-ARM-shmobile-marzen-Use-DT-for-GIC.patch
+++ /dev/null
@@ -1,99 +0,0 @@
-From 336ee8f2e1854cb249182f6834dc82d824c67706 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Thu, 1 Aug 2013 23:39:34 -0700
-Subject: ARM: shmobile: marzen: Use DT for GIC
-
-Current Marzen is using DT booting,
-and r8a7779.dtsi already has GIC settings.
-
-So, we can remove the C version of the GIC setup code,
-instead rely on GIC information provided by DT.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Acked-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 693ac41df314289d655123e6ded519244fa1d951)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-marzen.c         |  3 +--
- arch/arm/mach-shmobile/include/mach/r8a7779.h |  1 -
- arch/arm/mach-shmobile/intc-r8a7779.c         | 22 ++++------------------
- 3 files changed, 5 insertions(+), 21 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-marzen.c b/arch/arm/mach-shmobile/board-marzen.c
-index 2bf86c41..3551b548 100644
---- a/arch/arm/mach-shmobile/board-marzen.c
-+++ b/arch/arm/mach-shmobile/board-marzen.c
-@@ -266,8 +266,7 @@ DT_MACHINE_START(MARZEN, "marzen")
- 	.smp		= smp_ops(r8a7779_smp_ops),
- 	.map_io		= r8a7779_map_io,
- 	.init_early	= r8a7779_add_early_devices,
--	.nr_irqs	= NR_IRQS_LEGACY,
--	.init_irq	= r8a7779_init_irq,
-+	.init_irq	= r8a7779_init_irq_dt,
- 	.init_machine	= marzen_init,
- 	.init_late	= r8a7779_init_late,
- 	.dt_compat	= marzen_boards_compat_dt,
-diff --git a/arch/arm/mach-shmobile/include/mach/r8a7779.h b/arch/arm/mach-shmobile/include/mach/r8a7779.h
-index f10727f7..f08d6ecf 100644
---- a/arch/arm/mach-shmobile/include/mach/r8a7779.h
-+++ b/arch/arm/mach-shmobile/include/mach/r8a7779.h
-@@ -24,7 +24,6 @@ static inline struct r8a7779_pm_ch *to_r8a7779_ch(struct generic_pm_domain *d)
- }
- 
- extern void r8a7779_init_delay(void);
--extern void r8a7779_init_irq(void);
- extern void r8a7779_init_irq_extpin(int irlm);
- extern void r8a7779_init_irq_dt(void);
- extern void r8a7779_map_io(void);
-diff --git a/arch/arm/mach-shmobile/intc-r8a7779.c b/arch/arm/mach-shmobile/intc-r8a7779.c
-index 5f9e5dc0..e992a68b 100644
---- a/arch/arm/mach-shmobile/intc-r8a7779.c
-+++ b/arch/arm/mach-shmobile/intc-r8a7779.c
-@@ -89,15 +89,18 @@ void __init r8a7779_init_irq_extpin(int irlm)
- 		pr_warn("r8a7779: unable to setup external irq pin mode\n");
- }
- 
-+#ifdef CONFIG_OF
- static int r8a7779_set_wake(struct irq_data *data, unsigned int on)
- {
- 	return 0; /* always allow wakeup */
- }
- 
--static void __init r8a7779_init_irq_common(void)
-+void __init r8a7779_init_irq_dt(void)
- {
- 	gic_arch_extn.irq_set_wake = r8a7779_set_wake;
- 
-+	irqchip_init();
-+
- 	/* route all interrupts to ARM */
- 	__raw_writel(0xffffffff, INT2NTSR0);
- 	__raw_writel(0x3fffffff, INT2NTSR1);
-@@ -108,23 +111,6 @@ static void __init r8a7779_init_irq_common(void)
- 	__raw_writel(0xfffbffdf, INT2SMSKCR2);
- 	__raw_writel(0xbffffffc, INT2SMSKCR3);
- 	__raw_writel(0x003fee3f, INT2SMSKCR4);
--}
--
--void __init r8a7779_init_irq(void)
--{
--	void __iomem *gic_dist_base = IOMEM(0xf0001000);
--	void __iomem *gic_cpu_base = IOMEM(0xf0000100);
- 
--	/* use GIC to handle interrupts */
--	gic_init(0, 29, gic_dist_base, gic_cpu_base);
--
--	r8a7779_init_irq_common();
--}
--
--#ifdef CONFIG_OF
--void __init r8a7779_init_irq_dt(void)
--{
--	irqchip_init();
--	r8a7779_init_irq_common();
- }
- #endif
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0435-ARM-shmobile-r8a7790-clocks-for-Ether-support.patch b/patches.renesas/0435-ARM-shmobile-r8a7790-clocks-for-Ether-support.patch
deleted file mode 100644
index b10a4e3c31e53..0000000000000
--- a/patches.renesas/0435-ARM-shmobile-r8a7790-clocks-for-Ether-support.patch
+++ /dev/null
@@ -1,52 +0,0 @@
-From 1e4ea70025568e90cd1c03cfcc0b66e86c153c44 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Tue, 6 Aug 2013 16:50:09 +0900
-Subject: ARM: shmobile: r8a7790: clocks for Ether support
-
-Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 9b0b9c0151a8e7d263cee180857068940463bd5f)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r8a7790.c | 4 ++++
- 1 file changed, 4 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
-index 50d96f9c..fc36d3db 100644
---- a/arch/arm/mach-shmobile/clock-r8a7790.c
-+++ b/arch/arm/mach-shmobile/clock-r8a7790.c
-@@ -51,6 +51,7 @@
- #define SMSTPCR3 0xe615013c
- #define SMSTPCR5 0xe6150144
- #define SMSTPCR7 0xe615014c
-+#define SMSTPCR8 0xe6150990
- 
- #define SDCKCR		0xE6150074
- #define SD2CKCR		0xE6150078
-@@ -180,6 +181,7 @@ static struct clk div6_clks[DIV6_NR] = {
- 
- /* MSTP */
- enum {
-+	MSTP813,
- 	MSTP721, MSTP720,
- 	MSTP717, MSTP716,
- 	MSTP522,
-@@ -190,6 +192,7 @@ enum {
- };
- 
- static struct clk mstp_clks[MSTP_NR] = {
-+	[MSTP813] = SH_CLK_MSTP32(&p_clk, SMSTPCR8, 13, 0), /* Ether */
- 	[MSTP721] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 21, 0), /* SCIF0 */
- 	[MSTP720] = SH_CLK_MSTP32(&p_clk, SMSTPCR7, 20, 0), /* SCIF1 */
- 	[MSTP717] = SH_CLK_MSTP32(&zs_clk, SMSTPCR7, 17, 0), /* HSCIF0 */
-@@ -258,6 +261,7 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP720]),
- 	CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP717]),
- 	CLKDEV_DEV_ID("sh-sci.9", &mstp_clks[MSTP716]),
-+	CLKDEV_DEV_ID("r8a7790-ether", &mstp_clks[MSTP813]),
- 	CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
- 	CLKDEV_DEV_ID("ee200000.mmcif", &mstp_clks[MSTP315]),
- 	CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP315]),
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0436-ARM-shmobile-r8a7740-Add-TPU-clock-entry-for-DT-plat.patch b/patches.renesas/0436-ARM-shmobile-r8a7740-Add-TPU-clock-entry-for-DT-plat.patch
deleted file mode 100644
index 691c240007a87..0000000000000
--- a/patches.renesas/0436-ARM-shmobile-r8a7740-Add-TPU-clock-entry-for-DT-plat.patch
+++ /dev/null
@@ -1,28 +0,0 @@
-From a87b3e4698f7c14b9747e0daca28064572fc9fd4 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 26 Jul 2013 00:50:59 +0200
-Subject: ARM: shmobile: r8a7740: Add TPU clock entry for DT platforms
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit d687f4d1993fa046171dbb1ca1970a3172ce11b9)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r8a7740.c | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c
-index f5b7bbe4..664321c8 100644
---- a/arch/arm/mach-shmobile/clock-r8a7740.c
-+++ b/arch/arm/mach-shmobile/clock-r8a7740.c
-@@ -597,6 +597,7 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_DEV_ID("sh-eth",			&mstp_clks[MSTP309]),
- 	CLKDEV_DEV_ID("e9a00000.sh-eth",	&mstp_clks[MSTP309]),
- 	CLKDEV_DEV_ID("renesas-tpu-pwm",	&mstp_clks[MSTP304]),
-+	CLKDEV_DEV_ID("e6600000.pwm",		&mstp_clks[MSTP304]),
- 
- 	CLKDEV_DEV_ID("sh_mobile_sdhi.2",	&mstp_clks[MSTP415]),
- 	CLKDEV_DEV_ID("e6870000.sdhi",          &mstp_clks[MSTP415]),
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0437-ARM-shmobile-lager-enable-nfsroot-in-DTS.patch b/patches.renesas/0437-ARM-shmobile-lager-enable-nfsroot-in-DTS.patch
deleted file mode 100644
index 38f0572504bb2..0000000000000
--- a/patches.renesas/0437-ARM-shmobile-lager-enable-nfsroot-in-DTS.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From 41b5ad51fe3c931278ef144ba601094d347b4132 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Tue, 6 Aug 2013 16:50:11 +0900
-Subject: ARM: shmobile: lager: enable nfsroot in DTS
-
-Now that Ether support has been added to the lager board
-it is possible to use nfsroot. This configuration is
-in line with that of other shmobile boards.
-
-Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit dcbbbaf2ca8bd25c5cfad1396a01495760261e47)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7790-lager.dts | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts
-index 631b93bc..203bd089 100644
---- a/arch/arm/boot/dts/r8a7790-lager.dts
-+++ b/arch/arm/boot/dts/r8a7790-lager.dts
-@@ -16,7 +16,7 @@
- 	compatible = "renesas,lager", "renesas,r8a7790";
- 
- 	chosen {
--		bootargs = "console=ttySC6,115200 ignore_loglevel rw";
-+		bootargs = "console=ttySC6,115200 ignore_loglevel rw root=/dev/nfs ip=dhcp";
- 	};
- 
- 	memory@40000000 {
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0438-ARM-shmobile-r8a7740-Add-TPU-node-to-the-device-tree.patch b/patches.renesas/0438-ARM-shmobile-r8a7740-Add-TPU-node-to-the-device-tree.patch
deleted file mode 100644
index 6941944a7689a..0000000000000
--- a/patches.renesas/0438-ARM-shmobile-r8a7740-Add-TPU-node-to-the-device-tree.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From 35c6ac2e0dcfd136ec2cf5f5f5b49afbe6e5d0e7 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Fri, 26 Jul 2013 00:51:00 +0200
-Subject: ARM: shmobile: r8a7740: Add TPU node to the device tree
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 8b3e32c1fe5dce55e28e76b20361841dc863ec17)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-	arch/arm/boot/dts/r8a7740.dtsi
----
- arch/arm/boot/dts/r8a7740.dtsi | 7 +++++++
- 1 file changed, 7 insertions(+)
-
-diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi
-index 1d1aeb6d..44d3d520 100644
---- a/arch/arm/boot/dts/r8a7740.dtsi
-+++ b/arch/arm/boot/dts/r8a7740.dtsi
-@@ -152,4 +152,11 @@
- 		gpio-controller;
- 		#gpio-cells = <2>;
- 	};
-+
-+	tpu: pwm@e6600000 {
-+		compatible = "renesas,tpu-r8a7740", "renesas,tpu";
-+		reg = <0xe6600000 0x100>;
-+		status = "disabled";
-+		#pwm-cells = <3>;
-+	};
- };
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0439-ARM-shmobile-r8a7778-cleanup-registration-of-mmcif.patch b/patches.renesas/0439-ARM-shmobile-r8a7778-cleanup-registration-of-mmcif.patch
deleted file mode 100644
index 4c6c76b20a001..0000000000000
--- a/patches.renesas/0439-ARM-shmobile-r8a7778-cleanup-registration-of-mmcif.patch
+++ /dev/null
@@ -1,118 +0,0 @@
-From 33fb167dfec0eded9f33dca7b61f07178b801c2f Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Fri, 26 Jul 2013 00:33:48 -0700
-Subject: ARM: shmobile: r8a7778: cleanup registration of mmcif
-
-sh_mmcif driver which needs platform data at the time of
-registration is used from BockW only.
-Now, ARM/shmobile aims to support DT,
-and the C code base board support will be removed
-if DT support is completed.
-Current driver registration method which needs platform data
-and which is not shared complicates codes.
-This means legacy C code cleanup after DT supporting
-will be more complicated
-This patch registers it on board code as cleanup C code
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit a66c9744574c0e7b5c935c7c1ec84e0e741fb725)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-bockw.c          | 12 +++++++++++-
- arch/arm/mach-shmobile/include/mach/r8a7778.h |  2 --
- arch/arm/mach-shmobile/setup-r8a7778.c        | 14 --------------
- 3 files changed, 11 insertions(+), 17 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-bockw.c b/arch/arm/mach-shmobile/board-bockw.c
-index c7a0f9ba..5add79c9 100644
---- a/arch/arm/mach-shmobile/board-bockw.c
-+++ b/arch/arm/mach-shmobile/board-bockw.c
-@@ -20,6 +20,7 @@
- 
- #include <linux/mfd/tmio.h>
- #include <linux/mmc/host.h>
-+#include <linux/mmc/sh_mmcif.h>
- #include <linux/mtd/partitions.h>
- #include <linux/pinctrl/machine.h>
- #include <linux/platform_device.h>
-@@ -134,6 +135,11 @@ static struct spi_board_info spi_board_info[] __initdata = {
- };
- 
- /* MMC */
-+static struct resource mmc_resources[] __initdata = {
-+	DEFINE_RES_MEM(0xffe4e000, 0x100),
-+	DEFINE_RES_IRQ(gic_iid(0x5d)),
-+};
-+
- static struct sh_mmcif_plat_data sh_mmcif_plat = {
- 	.sup_pclk	= 0,
- 	.ocr		= MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
-@@ -189,7 +195,6 @@ static void __init bockw_init(void)
- 	r8a7778_add_ether_device(&ether_platform_data);
- 	r8a7778_add_i2c_device(0);
- 	r8a7778_add_hspi_device(0);
--	r8a7778_add_mmc_device(&sh_mmcif_plat);
- 
- 	i2c_register_board_info(0, i2c0_devices,
- 				ARRAY_SIZE(i2c0_devices));
-@@ -199,6 +204,11 @@ static void __init bockw_init(void)
- 				  ARRAY_SIZE(bockw_pinctrl_map));
- 	r8a7778_pinmux_init();
- 
-+	platform_device_register_resndata(
-+		&platform_bus, "sh_mmcif", -1,
-+		mmc_resources, ARRAY_SIZE(mmc_resources),
-+		&sh_mmcif_plat, sizeof(struct sh_mmcif_plat_data));
-+
- 	/* for SMSC */
- 	base = ioremap_nocache(FPGA, SZ_1M);
- 	if (base) {
-diff --git a/arch/arm/mach-shmobile/include/mach/r8a7778.h b/arch/arm/mach-shmobile/include/mach/r8a7778.h
-index 8d24f73d..2f456071 100644
---- a/arch/arm/mach-shmobile/include/mach/r8a7778.h
-+++ b/arch/arm/mach-shmobile/include/mach/r8a7778.h
-@@ -18,7 +18,6 @@
- #ifndef __ASM_R8A7778_H__
- #define __ASM_R8A7778_H__
- 
--#include <linux/mmc/sh_mmcif.h>
- #include <linux/mmc/sh_mobile_sdhi.h>
- #include <linux/sh_eth.h>
- #include <linux/platform_data/usb-rcar-phy.h>
-@@ -29,7 +28,6 @@ extern void r8a7778_add_ether_device(struct sh_eth_plat_data *pdata);
- extern void r8a7778_add_usb_phy_device(struct rcar_phy_platform_data *pdata);
- extern void r8a7778_add_i2c_device(int id);
- extern void r8a7778_add_hspi_device(int id);
--extern void r8a7778_add_mmc_device(struct sh_mmcif_plat_data *info);
- extern void r8a7778_add_dt_devices(void);
- 
- extern void r8a7778_init_late(void);
-diff --git a/arch/arm/mach-shmobile/setup-r8a7778.c b/arch/arm/mach-shmobile/setup-r8a7778.c
-index 9d4b6bf4..96008462 100644
---- a/arch/arm/mach-shmobile/setup-r8a7778.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7778.c
-@@ -319,20 +319,6 @@ void __init r8a7778_add_hspi_device(int id)
- 		hspi_resources + (2 * id), 2);
- }
- 
--/* MMC */
--static struct resource mmc_resources[] __initdata = {
--	DEFINE_RES_MEM(0xffe4e000, 0x100),
--	DEFINE_RES_IRQ(gic_iid(0x5d)),
--};
--
--void __init r8a7778_add_mmc_device(struct sh_mmcif_plat_data *info)
--{
--	platform_device_register_resndata(
--		&platform_bus, "sh_mmcif", -1,
--		mmc_resources, ARRAY_SIZE(mmc_resources),
--		info, sizeof(*info));
--}
--
- void __init r8a7778_add_dt_devices(void)
- {
- 	int i;
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0440-ARM-shmobile-r8a7778-cleanup-registration-of-usb-phy.patch b/patches.renesas/0440-ARM-shmobile-r8a7778-cleanup-registration-of-usb-phy.patch
deleted file mode 100644
index 47a1c44c657b1..0000000000000
--- a/patches.renesas/0440-ARM-shmobile-r8a7778-cleanup-registration-of-usb-phy.patch
+++ /dev/null
@@ -1,130 +0,0 @@
-From de99ca4a76025a704cf74705de310181be44867a Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Fri, 26 Jul 2013 15:54:44 +0900
-Subject: ARM: shmobile: r8a7778: cleanup registration of usb phy
-
-usb phy driver which needs platform data at the time of
-registration is used from BockW only.
-Now, ARM/shmobile aims to support DT,
-and the C code base board support will be removed
-if DT support is completed.
-Current driver registration method which needs platform data
-and which is not shared complicates codes.
-This means legacy C code cleanup after DT supporting
-will be more complicated
-This patch registers it on board code as cleanup C code
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 044e2121466a2bf528aeb91099df7e37723fb36b)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-	arch/arm/mach-shmobile/board-bockw.c
----
- arch/arm/mach-shmobile/board-bockw.c          | 17 ++++++++++++++++-
- arch/arm/mach-shmobile/include/mach/r8a7778.h |  2 --
- arch/arm/mach-shmobile/setup-r8a7778.c        | 14 --------------
- 3 files changed, 16 insertions(+), 17 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-bockw.c b/arch/arm/mach-shmobile/board-bockw.c
-index 5add79c9..d6270c6a 100644
---- a/arch/arm/mach-shmobile/board-bockw.c
-+++ b/arch/arm/mach-shmobile/board-bockw.c
-@@ -23,6 +23,7 @@
- #include <linux/mmc/sh_mmcif.h>
- #include <linux/mtd/partitions.h>
- #include <linux/pinctrl/machine.h>
-+#include <linux/platform_data/usb-rcar-phy.h>
- #include <linux/platform_device.h>
- #include <linux/regulator/fixed.h>
- #include <linux/regulator/machine.h>
-@@ -77,6 +78,12 @@ static struct resource smsc911x_resources[] = {
- 	DEFINE_RES_IRQ(irq_pin(0)), /* IRQ 0 */
- };
- 
-+/* USB */
-+static struct resource usb_phy_resources[] __initdata = {
-+	DEFINE_RES_MEM(0xffe70800, 0x100),
-+	DEFINE_RES_MEM(0xffe76000, 0x100),
-+};
-+
- static struct rcar_phy_platform_data usb_phy_platform_data __initdata;
- 
- /* SDHI */
-@@ -165,6 +172,7 @@ static const struct pinctrl_map bockw_pinctrl_map[] = {
- 				  "scif0_data_a", "scif0"),
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
- 				  "scif0_ctrl", "scif0"),
-+	/* USB */
- 	PIN_MAP_MUX_GROUP_DEFAULT("ehci-platform", "pfc-r8a7778",
- 				  "usb0", "usb0"),
- 	PIN_MAP_MUX_GROUP_DEFAULT("ehci-platform", "pfc-r8a7778",
-@@ -191,7 +199,6 @@ static void __init bockw_init(void)
- 	r8a7778_clock_init();
- 	r8a7778_init_irq_extpin(1);
- 	r8a7778_add_standard_devices();
--	r8a7778_add_usb_phy_device(&usb_phy_platform_data);
- 	r8a7778_add_ether_device(&ether_platform_data);
- 	r8a7778_add_i2c_device(0);
- 	r8a7778_add_hspi_device(0);
-@@ -209,6 +216,14 @@ static void __init bockw_init(void)
- 		mmc_resources, ARRAY_SIZE(mmc_resources),
- 		&sh_mmcif_plat, sizeof(struct sh_mmcif_plat_data));
- 
-+	platform_device_register_resndata(
-+		&platform_bus, "rcar_usb_phy", -1,
-+		usb_phy_resources,
-+		ARRAY_SIZE(usb_phy_resources),
-+		&usb_phy_platform_data,
-+		sizeof(struct rcar_phy_platform_data));
-+
-+
- 	/* for SMSC */
- 	base = ioremap_nocache(FPGA, SZ_1M);
- 	if (base) {
-diff --git a/arch/arm/mach-shmobile/include/mach/r8a7778.h b/arch/arm/mach-shmobile/include/mach/r8a7778.h
-index 2f456071..a184a133 100644
---- a/arch/arm/mach-shmobile/include/mach/r8a7778.h
-+++ b/arch/arm/mach-shmobile/include/mach/r8a7778.h
-@@ -20,12 +20,10 @@
- 
- #include <linux/mmc/sh_mobile_sdhi.h>
- #include <linux/sh_eth.h>
--#include <linux/platform_data/usb-rcar-phy.h>
- 
- extern void r8a7778_add_standard_devices(void);
- extern void r8a7778_add_standard_devices_dt(void);
- extern void r8a7778_add_ether_device(struct sh_eth_plat_data *pdata);
--extern void r8a7778_add_usb_phy_device(struct rcar_phy_platform_data *pdata);
- extern void r8a7778_add_i2c_device(int id);
- extern void r8a7778_add_hspi_device(int id);
- extern void r8a7778_add_dt_devices(void);
-diff --git a/arch/arm/mach-shmobile/setup-r8a7778.c b/arch/arm/mach-shmobile/setup-r8a7778.c
-index 96008462..89475079 100644
---- a/arch/arm/mach-shmobile/setup-r8a7778.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7778.c
-@@ -95,20 +95,6 @@ static struct sh_timer_config sh_tmu1_platform_data __initdata = {
- 		&sh_tmu##idx##_platform_data,		\
- 		sizeof(sh_tmu##idx##_platform_data))
- 
--/* USB PHY */
--static struct resource usb_phy_resources[] __initdata = {
--	DEFINE_RES_MEM(0xffe70800, 0x100),
--	DEFINE_RES_MEM(0xffe76000, 0x100),
--};
--
--void __init r8a7778_add_usb_phy_device(struct rcar_phy_platform_data *pdata)
--{
--	platform_device_register_resndata(&platform_bus, "rcar_usb_phy", -1,
--					  usb_phy_resources,
--					  ARRAY_SIZE(usb_phy_resources),
--					  pdata, sizeof(*pdata));
--}
--
- /* USB */
- static struct usb_phy *phy;
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0441-ARM-shmobile-r8a7778-cleanup-registration-of-sdhi.patch b/patches.renesas/0441-ARM-shmobile-r8a7778-cleanup-registration-of-sdhi.patch
deleted file mode 100644
index 1738356c54e77..0000000000000
--- a/patches.renesas/0441-ARM-shmobile-r8a7778-cleanup-registration-of-sdhi.patch
+++ /dev/null
@@ -1,119 +0,0 @@
-From 260bb68c12e23e88ba4c20452c8e45fe367c6930 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Fri, 26 Jul 2013 00:34:58 -0700
-Subject: ARM: shmobile: r8a7778: cleanup registration of sdhi
-
-sdhi driver which needs platform data at the time of
-registration is used from BockW only.
-Now, ARM/shmobile aims to support DT,
-and the C code base board support will be removed
-if DT support is completed.
-Current driver registration method which needs platform data
-and which is not shared complicates codes.
-This means legacy C code cleanup after DT supporting
-will be more complicated
-This patch registers it on board code as cleanup C code
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit fc55190835e02ba5ae23dff40c92ea96db8ec8b6)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-bockw.c          | 11 ++++++++++-
- arch/arm/mach-shmobile/include/mach/r8a7778.h |  2 --
- arch/arm/mach-shmobile/setup-r8a7778.c        | 24 ------------------------
- 3 files changed, 10 insertions(+), 27 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-bockw.c b/arch/arm/mach-shmobile/board-bockw.c
-index d6270c6a..959ccc86 100644
---- a/arch/arm/mach-shmobile/board-bockw.c
-+++ b/arch/arm/mach-shmobile/board-bockw.c
-@@ -20,6 +20,7 @@
- 
- #include <linux/mfd/tmio.h>
- #include <linux/mmc/host.h>
-+#include <linux/mmc/sh_mobile_sdhi.h>
- #include <linux/mmc/sh_mmcif.h>
- #include <linux/mtd/partitions.h>
- #include <linux/pinctrl/machine.h>
-@@ -93,6 +94,11 @@ static struct sh_mobile_sdhi_info sdhi0_info = {
- 	.tmio_flags	= TMIO_MMC_HAS_IDLE_WAIT,
- };
- 
-+static struct resource sdhi0_resources[] __initdata = {
-+	DEFINE_RES_MEM(0xFFE4C000, 0x100),
-+	DEFINE_RES_IRQ(gic_iid(0x77)),
-+};
-+
- static struct sh_eth_plat_data ether_platform_data __initdata = {
- 	.phy		= 0x01,
- 	.edmac_endian	= EDMAC_LITTLE_ENDIAN,
-@@ -259,7 +265,10 @@ static void __init bockw_init(void)
- 		iowrite32(ioread32(base + PUPR4) | (3 << 26), base + PUPR4);
- 		iounmap(base);
- 
--		r8a7778_sdhi_init(0, &sdhi0_info);
-+		platform_device_register_resndata(
-+			&platform_bus, "sh_mobile_sdhi", 0,
-+			sdhi0_resources, ARRAY_SIZE(sdhi0_resources),
-+			&sdhi0_info, sizeof(struct sh_mobile_sdhi_info));
- 	}
- }
- 
-diff --git a/arch/arm/mach-shmobile/include/mach/r8a7778.h b/arch/arm/mach-shmobile/include/mach/r8a7778.h
-index a184a133..aaa05449 100644
---- a/arch/arm/mach-shmobile/include/mach/r8a7778.h
-+++ b/arch/arm/mach-shmobile/include/mach/r8a7778.h
-@@ -18,7 +18,6 @@
- #ifndef __ASM_R8A7778_H__
- #define __ASM_R8A7778_H__
- 
--#include <linux/mmc/sh_mobile_sdhi.h>
- #include <linux/sh_eth.h>
- 
- extern void r8a7778_add_standard_devices(void);
-@@ -34,6 +33,5 @@ extern void r8a7778_init_irq_dt(void);
- extern void r8a7778_clock_init(void);
- extern void r8a7778_init_irq_extpin(int irlm);
- extern void r8a7778_pinmux_init(void);
--extern void r8a7778_sdhi_init(int id, struct sh_mobile_sdhi_info *info);
- 
- #endif /* __ASM_R8A7778_H__ */
-diff --git a/arch/arm/mach-shmobile/setup-r8a7778.c b/arch/arm/mach-shmobile/setup-r8a7778.c
-index 89475079..c585ee0e 100644
---- a/arch/arm/mach-shmobile/setup-r8a7778.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7778.c
-@@ -234,30 +234,6 @@ void __init r8a7778_pinmux_init(void)
- 	r8a7778_register_gpio(4);
- };
- 
--/* SDHI */
--static struct resource sdhi_resources[] __initdata = {
--	/* SDHI0 */
--	DEFINE_RES_MEM(0xFFE4C000, 0x100),
--	DEFINE_RES_IRQ(gic_iid(0x77)),
--	/* SDHI1 */
--	DEFINE_RES_MEM(0xFFE4D000, 0x100),
--	DEFINE_RES_IRQ(gic_iid(0x78)),
--	/* SDHI2 */
--	DEFINE_RES_MEM(0xFFE4F000, 0x100),
--	DEFINE_RES_IRQ(gic_iid(0x76)),
--};
--
--void __init r8a7778_sdhi_init(int id,
--			      struct sh_mobile_sdhi_info *info)
--{
--	BUG_ON(id < 0 || id > 2);
--
--	platform_device_register_resndata(
--		&platform_bus, "sh_mobile_sdhi", id,
--		sdhi_resources + (2 * id), 2,
--		info, sizeof(*info));
--}
--
- /* I2C */
- static struct resource i2c_resources[] __initdata = {
- 	/* I2C0 */
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0442-ARM-shmobile-r8a7778-cleanup-registration-of-i2c.patch b/patches.renesas/0442-ARM-shmobile-r8a7778-cleanup-registration-of-i2c.patch
deleted file mode 100644
index f0dc1c3b57def..0000000000000
--- a/patches.renesas/0442-ARM-shmobile-r8a7778-cleanup-registration-of-i2c.patch
+++ /dev/null
@@ -1,73 +0,0 @@
-From 8b583af5ba17545306bf4d52f629a65f0b9b5350 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Fri, 26 Jul 2013 00:35:08 -0700
-Subject: ARM: shmobile: r8a7778: cleanup registration of i2c
-
-i2c-rcar driver which doesn't need platform data at the time of
-registration can be registerd on SoC.
-And, registering these drivers in the SoC code can avoid
-unwanted device numbering issue.
-(ex. the i2c3 device number will be i2c.0 if i2c3 only registered)
-This patch registers it on SoC code as cleanup C code
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 1fd4eecd480b82e11900ae6a8f44d92efeb96004)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-bockw.c          | 1 -
- arch/arm/mach-shmobile/include/mach/r8a7778.h | 1 -
- arch/arm/mach-shmobile/setup-r8a7778.c        | 6 +++++-
- 3 files changed, 5 insertions(+), 3 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-bockw.c b/arch/arm/mach-shmobile/board-bockw.c
-index 959ccc86..12b7396b 100644
---- a/arch/arm/mach-shmobile/board-bockw.c
-+++ b/arch/arm/mach-shmobile/board-bockw.c
-@@ -206,7 +206,6 @@ static void __init bockw_init(void)
- 	r8a7778_init_irq_extpin(1);
- 	r8a7778_add_standard_devices();
- 	r8a7778_add_ether_device(&ether_platform_data);
--	r8a7778_add_i2c_device(0);
- 	r8a7778_add_hspi_device(0);
- 
- 	i2c_register_board_info(0, i2c0_devices,
-diff --git a/arch/arm/mach-shmobile/include/mach/r8a7778.h b/arch/arm/mach-shmobile/include/mach/r8a7778.h
-index aaa05449..9874511b 100644
---- a/arch/arm/mach-shmobile/include/mach/r8a7778.h
-+++ b/arch/arm/mach-shmobile/include/mach/r8a7778.h
-@@ -23,7 +23,6 @@
- extern void r8a7778_add_standard_devices(void);
- extern void r8a7778_add_standard_devices_dt(void);
- extern void r8a7778_add_ether_device(struct sh_eth_plat_data *pdata);
--extern void r8a7778_add_i2c_device(int id);
- extern void r8a7778_add_hspi_device(int id);
- extern void r8a7778_add_dt_devices(void);
- 
-diff --git a/arch/arm/mach-shmobile/setup-r8a7778.c b/arch/arm/mach-shmobile/setup-r8a7778.c
-index c585ee0e..ce3b54df 100644
---- a/arch/arm/mach-shmobile/setup-r8a7778.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7778.c
-@@ -250,7 +250,7 @@ static struct resource i2c_resources[] __initdata = {
- 	DEFINE_RES_IRQ(gic_iid(0x6d)),
- };
- 
--void __init r8a7778_add_i2c_device(int id)
-+static void __init r8a7778_register_i2c(int id)
- {
- 	BUG_ON(id < 0 || id > 3);
- 
-@@ -308,6 +308,10 @@ void __init r8a7778_add_dt_devices(void)
- void __init r8a7778_add_standard_devices(void)
- {
- 	r8a7778_add_dt_devices();
-+	r8a7778_register_i2c(0);
-+	r8a7778_register_i2c(1);
-+	r8a7778_register_i2c(2);
-+	r8a7778_register_i2c(3);
- }
- 
- void __init r8a7778_init_late(void)
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0443-ARM-shmobile-r8a7778-cleanup-registration-of-hspi.patch b/patches.renesas/0443-ARM-shmobile-r8a7778-cleanup-registration-of-hspi.patch
deleted file mode 100644
index e0e5edbc87d95..0000000000000
--- a/patches.renesas/0443-ARM-shmobile-r8a7778-cleanup-registration-of-hspi.patch
+++ /dev/null
@@ -1,72 +0,0 @@
-From d1f52e9b9408ad362c1aa5b208ba02161ca886c3 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Tue, 30 Jul 2013 00:02:24 -0700
-Subject: ARM: shmobile: r8a7778: cleanup registration of hspi
-
-sh-hspi driver which doesn't need platform data at the time of
-registration can be registerd on SoC.
-And, registering these drivers in the SoC code can avoid
-unwanted device numbering issue.
-(ex. the hspi2 device number will be spi.0 if hspi2 only registered)
-This patch registers it on SoC code as cleanup C code
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 3c7b5362323cd4b5d09a5b21ba8e74b3de05fc73)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-bockw.c          | 1 -
- arch/arm/mach-shmobile/include/mach/r8a7778.h | 1 -
- arch/arm/mach-shmobile/setup-r8a7778.c        | 5 ++++-
- 3 files changed, 4 insertions(+), 3 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-bockw.c b/arch/arm/mach-shmobile/board-bockw.c
-index 12b7396b..07009f5f 100644
---- a/arch/arm/mach-shmobile/board-bockw.c
-+++ b/arch/arm/mach-shmobile/board-bockw.c
-@@ -206,7 +206,6 @@ static void __init bockw_init(void)
- 	r8a7778_init_irq_extpin(1);
- 	r8a7778_add_standard_devices();
- 	r8a7778_add_ether_device(&ether_platform_data);
--	r8a7778_add_hspi_device(0);
- 
- 	i2c_register_board_info(0, i2c0_devices,
- 				ARRAY_SIZE(i2c0_devices));
-diff --git a/arch/arm/mach-shmobile/include/mach/r8a7778.h b/arch/arm/mach-shmobile/include/mach/r8a7778.h
-index 9874511b..41fd6da2 100644
---- a/arch/arm/mach-shmobile/include/mach/r8a7778.h
-+++ b/arch/arm/mach-shmobile/include/mach/r8a7778.h
-@@ -23,7 +23,6 @@
- extern void r8a7778_add_standard_devices(void);
- extern void r8a7778_add_standard_devices_dt(void);
- extern void r8a7778_add_ether_device(struct sh_eth_plat_data *pdata);
--extern void r8a7778_add_hspi_device(int id);
- extern void r8a7778_add_dt_devices(void);
- 
- extern void r8a7778_init_late(void);
-diff --git a/arch/arm/mach-shmobile/setup-r8a7778.c b/arch/arm/mach-shmobile/setup-r8a7778.c
-index ce3b54df..1a154d4a 100644
---- a/arch/arm/mach-shmobile/setup-r8a7778.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7778.c
-@@ -272,7 +272,7 @@ static struct resource hspi_resources[] __initdata = {
- 	DEFINE_RES_IRQ(gic_iid(0x75)),
- };
- 
--void __init r8a7778_add_hspi_device(int id)
-+void __init r8a7778_register_hspi(int id)
- {
- 	BUG_ON(id < 0 || id > 2);
- 
-@@ -312,6 +312,9 @@ void __init r8a7778_add_standard_devices(void)
- 	r8a7778_register_i2c(1);
- 	r8a7778_register_i2c(2);
- 	r8a7778_register_i2c(3);
-+	r8a7778_register_hspi(0);
-+	r8a7778_register_hspi(1);
-+	r8a7778_register_hspi(2);
- }
- 
- void __init r8a7778_init_late(void)
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0444-ARM-shmobile-Use-default-init_time-on-r8a73a4.patch b/patches.renesas/0444-ARM-shmobile-Use-default-init_time-on-r8a73a4.patch
deleted file mode 100644
index 9a2e1b848d8b4..0000000000000
--- a/patches.renesas/0444-ARM-shmobile-Use-default-init_time-on-r8a73a4.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From 07a20856cca0417ede8bed05c65cdd997d4e8908 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Thu, 1 Aug 2013 04:01:19 +0900
-Subject: ARM: shmobile: Use default ->init_time() on r8a73a4
-
-Leave ->init_time() set to NULL to use the default ARM behaviour.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 58909ae593e8e6fc7e89d88ffe61effedf09389a)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-r8a73a4.c | 1 -
- 1 file changed, 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-r8a73a4.c b/arch/arm/mach-shmobile/setup-r8a73a4.c
-index 2ee45d52..89491700 100644
---- a/arch/arm/mach-shmobile/setup-r8a73a4.c
-+++ b/arch/arm/mach-shmobile/setup-r8a73a4.c
-@@ -223,7 +223,6 @@ static const char *r8a73a4_boards_compat_dt[] __initdata = {
- 
- DT_MACHINE_START(R8A73A4_DT, "Generic R8A73A4 (Flattened Device Tree)")
- 	.init_early	= r8a73a4_init_delay,
--	.init_time	= shmobile_timer_init,
- 	.dt_compat	= r8a73a4_boards_compat_dt,
- MACHINE_END
- #endif /* CONFIG_USE_OF */
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0445-ARM-shmobile-Use-default-init_time-on-r8a7740.patch b/patches.renesas/0445-ARM-shmobile-Use-default-init_time-on-r8a7740.patch
deleted file mode 100644
index 5a11c9bfd13e7..0000000000000
--- a/patches.renesas/0445-ARM-shmobile-Use-default-init_time-on-r8a7740.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From ca04d8268799850eaa7e52ab1dbdc758f4358a78 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Thu, 1 Aug 2013 04:01:28 +0900
-Subject: ARM: shmobile: Use default ->init_time() on r8a7740
-
-Leave ->init_time() set to NULL to use the default ARM behaviour.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 8adacad26f1db14dd3a5bc08f632e74ba7ed7b8b)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-r8a7740.c | 1 -
- 1 file changed, 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-r8a7740.c b/arch/arm/mach-shmobile/setup-r8a7740.c
-index 84c5bb6d..21026b34 100644
---- a/arch/arm/mach-shmobile/setup-r8a7740.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7740.c
-@@ -1035,7 +1035,6 @@ DT_MACHINE_START(R8A7740_DT, "Generic R8A7740 (Flattened Device Tree)")
- 	.init_early	= r8a7740_init_delay,
- 	.init_irq	= r8a7740_init_irq_of,
- 	.init_machine	= r8a7740_generic_init,
--	.init_time	= shmobile_timer_init,
- 	.dt_compat	= r8a7740_boards_compat_dt,
- MACHINE_END
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0446-ARM-shmobile-Use-default-init_time-on-r8a7778.patch b/patches.renesas/0446-ARM-shmobile-Use-default-init_time-on-r8a7778.patch
deleted file mode 100644
index 94d052470e934..0000000000000
--- a/patches.renesas/0446-ARM-shmobile-Use-default-init_time-on-r8a7778.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From 46de344f345a6d62ab1340132dcdd0d0099047e6 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Thu, 1 Aug 2013 04:01:37 +0900
-Subject: ARM: shmobile: Use default ->init_time() on r8a7778
-
-Leave ->init_time() set to NULL to use the default ARM behaviour.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 0765f48a214af1ea9dd5ac7e3804c00ad6d16e15)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-r8a7778.c | 1 -
- 1 file changed, 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-r8a7778.c b/arch/arm/mach-shmobile/setup-r8a7778.c
-index 1a154d4a..604cf36b 100644
---- a/arch/arm/mach-shmobile/setup-r8a7778.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7778.c
-@@ -406,7 +406,6 @@ static const char *r8a7778_compat_dt[] __initdata = {
- DT_MACHINE_START(R8A7778_DT, "Generic R8A7778 (Flattened Device Tree)")
- 	.init_early	= r8a7778_init_delay,
- 	.init_irq	= r8a7778_init_irq_dt,
--	.init_time	= shmobile_timer_init,
- 	.dt_compat	= r8a7778_compat_dt,
- 	.init_late      = r8a7778_init_late,
- MACHINE_END
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0447-ARM-shmobile-Use-default-init_time-on-r8a7779.patch b/patches.renesas/0447-ARM-shmobile-Use-default-init_time-on-r8a7779.patch
deleted file mode 100644
index f23c84a61cd87..0000000000000
--- a/patches.renesas/0447-ARM-shmobile-Use-default-init_time-on-r8a7779.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From fb035223e3a6b2a0a66805108d2fbbe5dfc6054a Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Thu, 1 Aug 2013 04:01:46 +0900
-Subject: ARM: shmobile: Use default ->init_time() on r8a7779
-
-Leave ->init_time() set to NULL to use the default ARM behaviour.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 67ac21f65fc45a016fd999c67ff4a6a7a452bf58)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-r8a7779.c | 1 -
- 1 file changed, 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c
-index ddee4aa8..111e953a 100644
---- a/arch/arm/mach-shmobile/setup-r8a7779.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7779.c
-@@ -667,7 +667,6 @@ DT_MACHINE_START(R8A7779_DT, "Generic R8A7779 (Flattened Device Tree)")
- 	.nr_irqs	= NR_IRQS_LEGACY,
- 	.init_irq	= r8a7779_init_irq_dt,
- 	.init_machine	= r8a7779_add_standard_devices_dt,
--	.init_time	= shmobile_timer_init,
- 	.init_late	= r8a7779_init_late,
- 	.dt_compat	= r8a7779_compat_dt,
- MACHINE_END
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0448-ARM-shmobile-Use-default-init_time-on-Bockw.patch b/patches.renesas/0448-ARM-shmobile-Use-default-init_time-on-Bockw.patch
deleted file mode 100644
index a0000faaea41f..0000000000000
--- a/patches.renesas/0448-ARM-shmobile-Use-default-init_time-on-Bockw.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From 25407b8fb8f8f541c394b5b2854a5557391b14d4 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Thu, 1 Aug 2013 04:01:55 +0900
-Subject: ARM: shmobile: Use default ->init_time() on Bockw
-
-Leave ->init_time() set to NULL to use the default ARM behaviour.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 9808f79327806e00e681c18ac84e8abfa4373dbf)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-bockw.c | 1 -
- 1 file changed, 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/board-bockw.c b/arch/arm/mach-shmobile/board-bockw.c
-index 07009f5f..adf054d8 100644
---- a/arch/arm/mach-shmobile/board-bockw.c
-+++ b/arch/arm/mach-shmobile/board-bockw.c
-@@ -279,7 +279,6 @@ DT_MACHINE_START(BOCKW_DT, "bockw")
- 	.init_early	= r8a7778_init_delay,
- 	.init_irq	= r8a7778_init_irq_dt,
- 	.init_machine	= bockw_init,
--	.init_time	= shmobile_timer_init,
- 	.dt_compat	= bockw_boards_compat_dt,
- 	.init_late      = r8a7778_init_late,
- MACHINE_END
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0449-ARM-shmobile-Use-default-init_time-on-Bockw-DT-ref.patch b/patches.renesas/0449-ARM-shmobile-Use-default-init_time-on-Bockw-DT-ref.patch
deleted file mode 100644
index 0f31707d3eadc..0000000000000
--- a/patches.renesas/0449-ARM-shmobile-Use-default-init_time-on-Bockw-DT-ref.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From 5f817e136747ab0a3dbaf80e3dcb7901405c5f5d Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Thu, 1 Aug 2013 04:02:05 +0900
-Subject: ARM: shmobile: Use default ->init_time() on Bockw DT ref
-
-Leave ->init_time() set to NULL to use the default ARM behaviour.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 3bdbd1c9dbff686e375696543577c8a7ad6ef801)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-bockw-reference.c | 1 -
- 1 file changed, 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/board-bockw-reference.c b/arch/arm/mach-shmobile/board-bockw-reference.c
-index 24db8de7..1a7c893e 100644
---- a/arch/arm/mach-shmobile/board-bockw-reference.c
-+++ b/arch/arm/mach-shmobile/board-bockw-reference.c
-@@ -57,6 +57,5 @@ DT_MACHINE_START(BOCKW_DT, "bockw")
- 	.init_early	= r8a7778_init_delay,
- 	.init_irq	= r8a7778_init_irq_dt,
- 	.init_machine	= bockw_init,
--	.init_time	= shmobile_timer_init,
- 	.dt_compat	= bockw_boards_compat_dt,
- MACHINE_END
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0450-ARM-shmobile-Use-default-init_time-on-Armadillo-DT-r.patch b/patches.renesas/0450-ARM-shmobile-Use-default-init_time-on-Armadillo-DT-r.patch
deleted file mode 100644
index 5cc607d807e86..0000000000000
--- a/patches.renesas/0450-ARM-shmobile-Use-default-init_time-on-Armadillo-DT-r.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From cecf59a130d602a3278a0e12dcfa13ad9decdf2d Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Thu, 1 Aug 2013 04:02:14 +0900
-Subject: ARM: shmobile: Use default ->init_time() on Armadillo DT ref
-
-Leave ->init_time() set to NULL to use the default ARM behaviour.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 70ce77f77ea4d768074ef9a2549a3a6f627d7241)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-armadillo800eva-reference.c | 1 -
- 1 file changed, 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/board-armadillo800eva-reference.c b/arch/arm/mach-shmobile/board-armadillo800eva-reference.c
-index 002d8d3d..e30af4ce5 100644
---- a/arch/arm/mach-shmobile/board-armadillo800eva-reference.c
-+++ b/arch/arm/mach-shmobile/board-armadillo800eva-reference.c
-@@ -190,7 +190,6 @@ DT_MACHINE_START(ARMADILLO800EVA_DT, "armadillo800eva-reference")
- 	.init_early	= r8a7740_init_delay,
- 	.init_irq	= r8a7740_init_irq_of,
- 	.init_machine	= eva_init,
--	.init_time	= shmobile_timer_init,
- 	.init_late	= shmobile_init_late,
- 	.dt_compat	= eva_boards_compat_dt,
- 	.restart	= eva_restart,
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0451-ARM-shmobile-Use-default-init_time-on-APE6EVM.patch b/patches.renesas/0451-ARM-shmobile-Use-default-init_time-on-APE6EVM.patch
deleted file mode 100644
index 3c444173265ba..0000000000000
--- a/patches.renesas/0451-ARM-shmobile-Use-default-init_time-on-APE6EVM.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From d5f27fd305d0e26a9f11868ec0a9258b467bfadb Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Thu, 1 Aug 2013 04:02:24 +0900
-Subject: ARM: shmobile: Use default ->init_time() on APE6EVM
-
-Leave ->init_time() set to NULL to use the default ARM behaviour.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit fb185bcb892875c56edc50f5d82d4a8eac90f0d8)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-ape6evm.c | 1 -
- 1 file changed, 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/board-ape6evm.c b/arch/arm/mach-shmobile/board-ape6evm.c
-index c5e6cba8..7f3d85bc 100644
---- a/arch/arm/mach-shmobile/board-ape6evm.c
-+++ b/arch/arm/mach-shmobile/board-ape6evm.c
-@@ -181,7 +181,6 @@ static const char *ape6evm_boards_compat_dt[] __initdata = {
- 
- DT_MACHINE_START(APE6EVM_DT, "ape6evm")
- 	.init_early	= r8a73a4_init_delay,
--	.init_time	= shmobile_timer_init,
- 	.init_machine	= ape6evm_add_standard_devices,
- 	.dt_compat	= ape6evm_boards_compat_dt,
- MACHINE_END
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0452-ARM-shmobile-Use-default-init_time-on-APE6EVM-DT-ref.patch b/patches.renesas/0452-ARM-shmobile-Use-default-init_time-on-APE6EVM-DT-ref.patch
deleted file mode 100644
index 74c3408940451..0000000000000
--- a/patches.renesas/0452-ARM-shmobile-Use-default-init_time-on-APE6EVM-DT-ref.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From 87dd269d08ef633fb89b37bfcd9c55dd528e71fe Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Thu, 1 Aug 2013 04:02:33 +0900
-Subject: ARM: shmobile: Use default ->init_time() on APE6EVM DT ref
-
-Leave ->init_time() set to NULL to use the default ARM behaviour.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 364185f3ceab16db80a4cf9f8022ae5684700723)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-ape6evm-reference.c | 1 -
- 1 file changed, 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/board-ape6evm-reference.c b/arch/arm/mach-shmobile/board-ape6evm-reference.c
-index 52cc5fa5..a23fa714 100644
---- a/arch/arm/mach-shmobile/board-ape6evm-reference.c
-+++ b/arch/arm/mach-shmobile/board-ape6evm-reference.c
-@@ -58,7 +58,6 @@ static const char *ape6evm_boards_compat_dt[] __initdata = {
- 
- DT_MACHINE_START(APE6EVM_DT, "ape6evm")
- 	.init_early	= r8a73a4_init_delay,
--	.init_time	= shmobile_timer_init,
- 	.init_machine	= ape6evm_add_standard_devices,
- 	.dt_compat	= ape6evm_boards_compat_dt,
- MACHINE_END
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0453-ARM-shmobile-Use-default-init_time-on-Marzen-DT-ref.patch b/patches.renesas/0453-ARM-shmobile-Use-default-init_time-on-Marzen-DT-ref.patch
deleted file mode 100644
index 0c7cc14196b67..0000000000000
--- a/patches.renesas/0453-ARM-shmobile-Use-default-init_time-on-Marzen-DT-ref.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From 410859a0a0aee43e016051882f3bdd99f520e45e Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Thu, 1 Aug 2013 04:02:42 +0900
-Subject: ARM: shmobile: Use default ->init_time() on Marzen DT ref
-
-Leave ->init_time() set to NULL to use the default ARM behaviour.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 3b2e2aa319a886ab15052b513813ced39503dfa7)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-marzen-reference.c | 1 -
- 1 file changed, 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/board-marzen-reference.c b/arch/arm/mach-shmobile/board-marzen-reference.c
-index 3d1c439b..3f4250a2 100644
---- a/arch/arm/mach-shmobile/board-marzen-reference.c
-+++ b/arch/arm/mach-shmobile/board-marzen-reference.c
-@@ -42,6 +42,5 @@ DT_MACHINE_START(MARZEN, "marzen")
- 	.nr_irqs	= NR_IRQS_LEGACY,
- 	.init_irq	= r8a7779_init_irq_dt,
- 	.init_machine	= marzen_init,
--	.init_time	= shmobile_timer_init,
- 	.dt_compat	= marzen_boards_compat_dt,
- MACHINE_END
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0454-ARM-shmobile-Use-default-init_time-on-KZM9G-DT-ref.patch b/patches.renesas/0454-ARM-shmobile-Use-default-init_time-on-KZM9G-DT-ref.patch
deleted file mode 100644
index b08ff239d6005..0000000000000
--- a/patches.renesas/0454-ARM-shmobile-Use-default-init_time-on-KZM9G-DT-ref.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From 718fc8c1080a88c8a1a9e876ee07351244c8ef9e Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Thu, 1 Aug 2013 04:02:51 +0900
-Subject: ARM: shmobile: Use default ->init_time() on KZM9G DT ref
-
-Leave ->init_time() set to NULL to use the default ARM behaviour.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit f6110210347fea5599223fba6ecce14f1683f510)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-kzm9g-reference.c | 1 -
- 1 file changed, 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/board-kzm9g-reference.c b/arch/arm/mach-shmobile/board-kzm9g-reference.c
-index a66a808d..598e3248 100644
---- a/arch/arm/mach-shmobile/board-kzm9g-reference.c
-+++ b/arch/arm/mach-shmobile/board-kzm9g-reference.c
-@@ -52,6 +52,5 @@ DT_MACHINE_START(KZM9G_DT, "kzm9g-reference")
- 	.init_early	= sh73a0_init_delay,
- 	.nr_irqs	= NR_IRQS_LEGACY,
- 	.init_machine	= kzm_init,
--	.init_time	= shmobile_timer_init,
- 	.dt_compat	= kzm9g_boards_compat_dt,
- MACHINE_END
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0455-ARM-shmobile-Use-clocksource_of_init-on-r8a7790.patch b/patches.renesas/0455-ARM-shmobile-Use-clocksource_of_init-on-r8a7790.patch
deleted file mode 100644
index 7bbe3db9a5f5c..0000000000000
--- a/patches.renesas/0455-ARM-shmobile-Use-clocksource_of_init-on-r8a7790.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-From da1efd252d3c839c3b3cf4b4bfd8332fcb1db7cc Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Thu, 1 Aug 2013 04:03:00 +0900
-Subject: ARM: shmobile: Use clocksource_of_init() on r8a7790
-
-Replace the call to shmobile_timer_init() with
-clocksource_of_init(). This will allow us to
-get rid of shmobile_timer_init().
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-[horms+renesas@verge.net.au: include linux/clocksource.h]
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-(cherry picked from commit c4a62a5f79f515056d9293ee0e9ce0869a326021)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-r8a7790.c | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c
-index 86cf507b..6d4aa041 100644
---- a/arch/arm/mach-shmobile/setup-r8a7790.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7790.c
-@@ -18,6 +18,7 @@
-  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
-  */
- 
-+#include <linux/clocksource.h>
- #include <linux/irq.h>
- #include <linux/kernel.h>
- #include <linux/of_platform.h>
-@@ -263,7 +264,7 @@ void __init r8a7790_timer_init(void)
- 	iounmap(base);
- #endif /* CONFIG_ARM_ARCH_TIMER */
- 
--	shmobile_timer_init();
-+	clocksource_of_init();
- }
- 
- void __init r8a7790_init_delay(void)
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0456-ARM-shmobile-Remove-unused-shmobile_init_time.patch b/patches.renesas/0456-ARM-shmobile-Remove-unused-shmobile_init_time.patch
deleted file mode 100644
index 986800a4e009c..0000000000000
--- a/patches.renesas/0456-ARM-shmobile-Remove-unused-shmobile_init_time.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-From c299a947f65212d1e6a6fff60e93c4a42d2b478c Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Thu, 1 Aug 2013 04:03:09 +0900
-Subject: ARM: shmobile: Remove unused shmobile_init_time()
-
-Remove shmobile_timer_init() since it now is unused.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 13eb604665c94d4cd9d7e2aeceef974cf1f30701)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/include/mach/common.h | 1 -
- arch/arm/mach-shmobile/timer.c               | 4 ----
- 2 files changed, 5 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h
-index e818f029..18a76f91 100644
---- a/arch/arm/mach-shmobile/include/mach/common.h
-+++ b/arch/arm/mach-shmobile/include/mach/common.h
-@@ -2,7 +2,6 @@
- #define __ARCH_MACH_COMMON_H
- 
- extern void shmobile_earlytimer_init(void);
--extern void shmobile_timer_init(void);
- extern void shmobile_setup_delay(unsigned int max_cpu_core_mhz,
- 			 unsigned int mult, unsigned int div);
- struct twd_local_timer;
-diff --git a/arch/arm/mach-shmobile/timer.c b/arch/arm/mach-shmobile/timer.c
-index f321dbeb..62d7052d 100644
---- a/arch/arm/mach-shmobile/timer.c
-+++ b/arch/arm/mach-shmobile/timer.c
-@@ -59,7 +59,3 @@ void __init shmobile_earlytimer_init(void)
- 	late_time_init = shmobile_late_time_init;
- }
- 
--void __init shmobile_timer_init(void)
--{
--	clocksource_of_init();
--}
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0457-ARM-shmobile-r8a7779-add-missing-__initdata.patch b/patches.renesas/0457-ARM-shmobile-r8a7779-add-missing-__initdata.patch
deleted file mode 100644
index efc258aa1fd3c..0000000000000
--- a/patches.renesas/0457-ARM-shmobile-r8a7779-add-missing-__initdata.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From b075ceed35a3ff05a258e026669ecf7018204726 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Thu, 1 Aug 2013 18:33:38 -0700
-Subject: ARM: shmobile: r8a7779: add missing __initdata
-
-This patch adds missing __initdata to driver data/resource
-which are used from platform_device_register_xxx()
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit c7537655c6ce1d769bd6d4ec368cdf8c36ebb6ea)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-r8a7779.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c
-index 111e953a..f0b6c7de 100644
---- a/arch/arm/mach-shmobile/setup-r8a7779.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7779.c
-@@ -537,7 +537,7 @@ static struct platform_device ohci1_device = {
- };
- 
- /* Ether */
--static struct resource ether_resources[] = {
-+static struct resource ether_resources[] __initdata = {
- 	{
- 		.start	= 0xfde00000,
- 		.end	= 0xfde003ff,
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0458-ARM-shmobile-r8a7790-add-missing-__initdata.patch b/patches.renesas/0458-ARM-shmobile-r8a7790-add-missing-__initdata.patch
deleted file mode 100644
index 5e1a024cce034..0000000000000
--- a/patches.renesas/0458-ARM-shmobile-r8a7790-add-missing-__initdata.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From cdd99ac6f8772f4f0ef1cd7b703e5728bf6f36ae Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Thu, 1 Aug 2013 18:33:48 -0700
-Subject: ARM: shmobile: r8a7790: add missing __initdata
-
-This patch adds missing __initdata to driver data/resource
-which are used from platform_device_register_xxx()
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 163a2a6cf1fa1d20c6c9e89d358180f409bcc7ce)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-r8a7790.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c
-index 6d4aa041..d0f5c9f9 100644
---- a/arch/arm/mach-shmobile/setup-r8a7790.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7790.c
-@@ -161,13 +161,13 @@ static struct resource thermal_resources[] __initdata = {
- 					thermal_resources,		\
- 					ARRAY_SIZE(thermal_resources))
- 
--static struct sh_timer_config cmt00_platform_data = {
-+static struct sh_timer_config cmt00_platform_data __initdata = {
- 	.name = "CMT00",
- 	.timer_bit = 0,
- 	.clockevent_rating = 80,
- };
- 
--static struct resource cmt00_resources[] = {
-+static struct resource cmt00_resources[] __initdata = {
- 	DEFINE_RES_MEM(0xffca0510, 0x0c),
- 	DEFINE_RES_MEM(0xffca0500, 0x04),
- 	DEFINE_RES_IRQ(gic_spi(142)), /* CMT0_0 */
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0459-ARM-shmobile-bockw-add-missing-__initdata.patch b/patches.renesas/0459-ARM-shmobile-bockw-add-missing-__initdata.patch
deleted file mode 100644
index b2aa88575f602..0000000000000
--- a/patches.renesas/0459-ARM-shmobile-bockw-add-missing-__initdata.patch
+++ /dev/null
@@ -1,58 +0,0 @@
-From afeb55f87706319f5ecd01474f9500ab438b5fde Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Thu, 1 Aug 2013 18:34:09 -0700
-Subject: ARM: shmobile: bockw: add missing __initdata
-
-This patch adds missing __initdata to driver data/resource
-which are used from platform_device_register_xxx()
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 8c23c7caeb5750fcf6d7a0258692071b06fdc772)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-bockw.c | 8 ++++----
- 1 file changed, 4 insertions(+), 4 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-bockw.c b/arch/arm/mach-shmobile/board-bockw.c
-index adf054d8..255e97e5 100644
---- a/arch/arm/mach-shmobile/board-bockw.c
-+++ b/arch/arm/mach-shmobile/board-bockw.c
-@@ -67,14 +67,14 @@ static struct regulator_consumer_supply dummy_supplies[] = {
- 	REGULATOR_SUPPLY("vdd33a", "smsc911x"),
- };
- 
--static struct smsc911x_platform_config smsc911x_data = {
-+static struct smsc911x_platform_config smsc911x_data __initdata = {
- 	.irq_polarity	= SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
- 	.irq_type	= SMSC911X_IRQ_TYPE_PUSH_PULL,
- 	.flags		= SMSC911X_USE_32BIT,
- 	.phy_interface	= PHY_INTERFACE_MODE_MII,
- };
- 
--static struct resource smsc911x_resources[] = {
-+static struct resource smsc911x_resources[] __initdata = {
- 	DEFINE_RES_MEM(0x18300000, 0x1000),
- 	DEFINE_RES_IRQ(irq_pin(0)), /* IRQ 0 */
- };
-@@ -88,7 +88,7 @@ static struct resource usb_phy_resources[] __initdata = {
- static struct rcar_phy_platform_data usb_phy_platform_data __initdata;
- 
- /* SDHI */
--static struct sh_mobile_sdhi_info sdhi0_info = {
-+static struct sh_mobile_sdhi_info sdhi0_info __initdata = {
- 	.tmio_caps	= MMC_CAP_SD_HIGHSPEED,
- 	.tmio_ocr_mask	= MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
- 	.tmio_flags	= TMIO_MMC_HAS_IDLE_WAIT,
-@@ -153,7 +153,7 @@ static struct resource mmc_resources[] __initdata = {
- 	DEFINE_RES_IRQ(gic_iid(0x5d)),
- };
- 
--static struct sh_mmcif_plat_data sh_mmcif_plat = {
-+static struct sh_mmcif_plat_data sh_mmcif_plat __initdata = {
- 	.sup_pclk	= 0,
- 	.ocr		= MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
- 	.caps		= MMC_CAP_4_BIT_DATA |
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0460-ARM-shmobile-r8a7740-move-r8a7740_init_irq_of-to-set.patch b/patches.renesas/0460-ARM-shmobile-r8a7740-move-r8a7740_init_irq_of-to-set.patch
deleted file mode 100644
index 3793a2ade97ac..0000000000000
--- a/patches.renesas/0460-ARM-shmobile-r8a7740-move-r8a7740_init_irq_of-to-set.patch
+++ /dev/null
@@ -1,148 +0,0 @@
-From 6e5ce7f3ed1cee9e902967112e311052c0e19c69 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Thu, 1 Aug 2013 23:39:44 -0700
-Subject: ARM: shmobile: r8a7740: move r8a7740_init_irq_of() to setup
-
-This patch moves r8a7740_init_irq_of() to setup code,
-and remove intc-r8a7740
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 70e3f3d4f40fe5ecdb351acf33db06df077fb0c1)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-	arch/arm/mach-shmobile/Makefile
----
- arch/arm/mach-shmobile/Makefile        |  2 +-
- arch/arm/mach-shmobile/intc-r8a7740.c  | 54 ----------------------------------
- arch/arm/mach-shmobile/setup-r8a7740.c | 32 ++++++++++++++++++++
- 3 files changed, 33 insertions(+), 55 deletions(-)
- delete mode 100644 arch/arm/mach-shmobile/intc-r8a7740.c
-
-diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
-index 6f44c51b..25d88900 100644
---- a/arch/arm/mach-shmobile/Makefile
-+++ b/arch/arm/mach-shmobile/Makefile
-@@ -11,7 +11,7 @@ obj-y				:= timer.o console.o
- obj-$(CONFIG_ARCH_SH7372)	+= setup-sh7372.o intc-sh7372.o
- obj-$(CONFIG_ARCH_SH73A0)	+= setup-sh73a0.o intc-sh73a0.o
- obj-$(CONFIG_ARCH_R8A73A4)	+= setup-r8a73a4.o
--obj-$(CONFIG_ARCH_R8A7740)	+= setup-r8a7740.o intc-r8a7740.o
-+obj-$(CONFIG_ARCH_R8A7740)	+= setup-r8a7740.o
- obj-$(CONFIG_ARCH_R8A7778)	+= setup-r8a7778.o
- obj-$(CONFIG_ARCH_R8A7779)	+= setup-r8a7779.o intc-r8a7779.o
- obj-$(CONFIG_ARCH_R8A7790)	+= setup-r8a7790.o
-diff --git a/arch/arm/mach-shmobile/intc-r8a7740.c b/arch/arm/mach-shmobile/intc-r8a7740.c
-deleted file mode 100644
-index 75193539..00000000
---- a/arch/arm/mach-shmobile/intc-r8a7740.c
-+++ /dev/null
-@@ -1,54 +0,0 @@
--/*
-- * R8A7740 processor support
-- *
-- * Copyright (C) 2011  Renesas Solutions Corp.
-- * Copyright (C) 2011  Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-- *
-- * This program is free software; you can redistribute it and/or modify
-- * it under the terms of the GNU General Public License as published by
-- * the Free Software Foundation; version 2 of the License.
-- *
-- * This program is distributed in the hope that it will be useful,
-- * but WITHOUT ANY WARRANTY; without even the implied warranty of
-- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-- * GNU General Public License for more details.
-- *
-- * You should have received a copy of the GNU General Public License
-- * along with this program; if not, write to the Free Software
-- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
-- */
--
--#include <linux/init.h>
--#include <linux/io.h>
--#include <linux/irqchip.h>
--#include <linux/irqchip/arm-gic.h>
--
--void __init r8a7740_init_irq_of(void)
--{
--	void __iomem *intc_prio_base = ioremap_nocache(0xe6900010, 0x10);
--	void __iomem *intc_msk_base = ioremap_nocache(0xe6900040, 0x10);
--	void __iomem *pfc_inta_ctrl = ioremap_nocache(0xe605807c, 0x4);
--
--	irqchip_init();
--
--	/* route signals to GIC */
--	iowrite32(0x0, pfc_inta_ctrl);
--
--	/*
--	 * To mask the shared interrupt to SPI 149 we must ensure to set
--	 * PRIO *and* MASK. Else we run into IRQ floods when registering
--	 * the intc_irqpin devices
--	 */
--	iowrite32(0x0, intc_prio_base + 0x0);
--	iowrite32(0x0, intc_prio_base + 0x4);
--	iowrite32(0x0, intc_prio_base + 0x8);
--	iowrite32(0x0, intc_prio_base + 0xc);
--	iowrite8(0xff, intc_msk_base + 0x0);
--	iowrite8(0xff, intc_msk_base + 0x4);
--	iowrite8(0xff, intc_msk_base + 0x8);
--	iowrite8(0xff, intc_msk_base + 0xc);
--
--	iounmap(intc_prio_base);
--	iounmap(intc_msk_base);
--	iounmap(pfc_inta_ctrl);
--}
-diff --git a/arch/arm/mach-shmobile/setup-r8a7740.c b/arch/arm/mach-shmobile/setup-r8a7740.c
-index 21026b34..b7d4b2c3 100644
---- a/arch/arm/mach-shmobile/setup-r8a7740.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7740.c
-@@ -22,6 +22,8 @@
- #include <linux/kernel.h>
- #include <linux/init.h>
- #include <linux/io.h>
-+#include <linux/irqchip.h>
-+#include <linux/irqchip/arm-gic.h>
- #include <linux/platform_data/irq-renesas-intc-irqpin.h>
- #include <linux/platform_device.h>
- #include <linux/of_platform.h>
-@@ -1019,6 +1021,36 @@ void __init r8a7740_init_delay(void)
- 	shmobile_setup_delay(800, 1, 3); /* Cortex-A9 @ 800MHz */
- };
- 
-+void __init r8a7740_init_irq_of(void)
-+{
-+	void __iomem *intc_prio_base = ioremap_nocache(0xe6900010, 0x10);
-+	void __iomem *intc_msk_base = ioremap_nocache(0xe6900040, 0x10);
-+	void __iomem *pfc_inta_ctrl = ioremap_nocache(0xe605807c, 0x4);
-+
-+	irqchip_init();
-+
-+	/* route signals to GIC */
-+	iowrite32(0x0, pfc_inta_ctrl);
-+
-+	/*
-+	 * To mask the shared interrupt to SPI 149 we must ensure to set
-+	 * PRIO *and* MASK. Else we run into IRQ floods when registering
-+	 * the intc_irqpin devices
-+	 */
-+	iowrite32(0x0, intc_prio_base + 0x0);
-+	iowrite32(0x0, intc_prio_base + 0x4);
-+	iowrite32(0x0, intc_prio_base + 0x8);
-+	iowrite32(0x0, intc_prio_base + 0xc);
-+	iowrite8(0xff, intc_msk_base + 0x0);
-+	iowrite8(0xff, intc_msk_base + 0x4);
-+	iowrite8(0xff, intc_msk_base + 0x8);
-+	iowrite8(0xff, intc_msk_base + 0xc);
-+
-+	iounmap(intc_prio_base);
-+	iounmap(intc_msk_base);
-+	iounmap(pfc_inta_ctrl);
-+}
-+
- static void __init r8a7740_generic_init(void)
- {
- 	r8a7740_clock_init(0);
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0461-ARM-shmobile-r8a7779-move-r8a7779_init_irq_xxx-to-se.patch b/patches.renesas/0461-ARM-shmobile-r8a7779-move-r8a7779_init_irq_xxx-to-se.patch
deleted file mode 100644
index 974e4f09d92f8..0000000000000
--- a/patches.renesas/0461-ARM-shmobile-r8a7779-move-r8a7779_init_irq_xxx-to-se.patch
+++ /dev/null
@@ -1,271 +0,0 @@
-From be5afe19e89af3b13813fcdcac9d0f7653ed052a Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Thu, 1 Aug 2013 23:39:56 -0700
-Subject: ARM: shmobile: r8a7779: move r8a7779_init_irq_xxx() to setup
-
-This patch moves r8a7779_init_irq_xxx() to setup code,
-and remove intc-r8a7779.
-
-Now, r8a7779_init_irq_extpin() uses
-platform_device_register_resndata() instead of
-platform_device_register()
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 5b3859d7b2c10419e1cc7ce6c456995e757f4390)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-	arch/arm/mach-shmobile/Makefile
----
- arch/arm/mach-shmobile/Makefile        |   2 +-
- arch/arm/mach-shmobile/intc-r8a7779.c  | 116 ---------------------------------
- arch/arm/mach-shmobile/setup-r8a7779.c |  80 +++++++++++++++++++++++
- 3 files changed, 81 insertions(+), 117 deletions(-)
- delete mode 100644 arch/arm/mach-shmobile/intc-r8a7779.c
-
-diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
-index 25d88900..c30867cc 100644
---- a/arch/arm/mach-shmobile/Makefile
-+++ b/arch/arm/mach-shmobile/Makefile
-@@ -13,7 +13,7 @@ obj-$(CONFIG_ARCH_SH73A0)	+= setup-sh73a0.o intc-sh73a0.o
- obj-$(CONFIG_ARCH_R8A73A4)	+= setup-r8a73a4.o
- obj-$(CONFIG_ARCH_R8A7740)	+= setup-r8a7740.o
- obj-$(CONFIG_ARCH_R8A7778)	+= setup-r8a7778.o
--obj-$(CONFIG_ARCH_R8A7779)	+= setup-r8a7779.o intc-r8a7779.o
-+obj-$(CONFIG_ARCH_R8A7779)	+= setup-r8a7779.o
- obj-$(CONFIG_ARCH_R8A7790)	+= setup-r8a7790.o
- obj-$(CONFIG_ARCH_EMEV2)	+= setup-emev2.o
- 
-diff --git a/arch/arm/mach-shmobile/intc-r8a7779.c b/arch/arm/mach-shmobile/intc-r8a7779.c
-deleted file mode 100644
-index e992a68b..00000000
---- a/arch/arm/mach-shmobile/intc-r8a7779.c
-+++ /dev/null
-@@ -1,116 +0,0 @@
--/*
-- * r8a7779 processor support - INTC hardware block
-- *
-- * Copyright (C) 2011  Renesas Solutions Corp.
-- * Copyright (C) 2011  Magnus Damm
-- *
-- * This program is free software; you can redistribute it and/or modify
-- * it under the terms of the GNU General Public License as published by
-- * the Free Software Foundation; version 2 of the License.
-- *
-- * This program is distributed in the hope that it will be useful,
-- * but WITHOUT ANY WARRANTY; without even the implied warranty of
-- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-- * GNU General Public License for more details.
-- *
-- * You should have received a copy of the GNU General Public License
-- * along with this program; if not, write to the Free Software
-- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
-- */
--#include <linux/kernel.h>
--#include <linux/init.h>
--#include <linux/platform_device.h>
--#include <linux/interrupt.h>
--#include <linux/irq.h>
--#include <linux/io.h>
--#include <linux/irqchip/arm-gic.h>
--#include <linux/platform_data/irq-renesas-intc-irqpin.h>
--#include <linux/irqchip.h>
--#include <mach/common.h>
--#include <mach/irqs.h>
--#include <mach/r8a7779.h>
--#include <asm/mach-types.h>
--#include <asm/mach/arch.h>
--
--#define INT2SMSKCR0 IOMEM(0xfe7822a0)
--#define INT2SMSKCR1 IOMEM(0xfe7822a4)
--#define INT2SMSKCR2 IOMEM(0xfe7822a8)
--#define INT2SMSKCR3 IOMEM(0xfe7822ac)
--#define INT2SMSKCR4 IOMEM(0xfe7822b0)
--
--#define INT2NTSR0 IOMEM(0xfe700060)
--#define INT2NTSR1 IOMEM(0xfe700064)
--
--static struct renesas_intc_irqpin_config irqpin0_platform_data = {
--	.irq_base = irq_pin(0), /* IRQ0 -> IRQ3 */
--	.sense_bitfield_width = 2,
--};
--
--static struct resource irqpin0_resources[] = {
--	DEFINE_RES_MEM(0xfe78001c, 4), /* ICR1 */
--	DEFINE_RES_MEM(0xfe780010, 4), /* INTPRI */
--	DEFINE_RES_MEM(0xfe780024, 4), /* INTREQ */
--	DEFINE_RES_MEM(0xfe780044, 4), /* INTMSK0 */
--	DEFINE_RES_MEM(0xfe780064, 4), /* INTMSKCLR0 */
--	DEFINE_RES_IRQ(gic_spi(27)), /* IRQ0 */
--	DEFINE_RES_IRQ(gic_spi(28)), /* IRQ1 */
--	DEFINE_RES_IRQ(gic_spi(29)), /* IRQ2 */
--	DEFINE_RES_IRQ(gic_spi(30)), /* IRQ3 */
--};
--
--static struct platform_device irqpin0_device = {
--	.name		= "renesas_intc_irqpin",
--	.id		= 0,
--	.resource	= irqpin0_resources,
--	.num_resources	= ARRAY_SIZE(irqpin0_resources),
--	.dev		= {
--		.platform_data	= &irqpin0_platform_data,
--	},
--};
--
--void __init r8a7779_init_irq_extpin(int irlm)
--{
--	void __iomem *icr0 = ioremap_nocache(0xfe780000, PAGE_SIZE);
--	unsigned long tmp;
--
--	if (icr0) {
--		tmp = ioread32(icr0);
--		if (irlm)
--			tmp |= 1 << 23; /* IRQ0 -> IRQ3 as individual pins */
--		else
--			tmp &= ~(1 << 23); /* IRL mode - not supported */
--		tmp |= (1 << 21); /* LVLMODE = 1 */
--		iowrite32(tmp, icr0);
--		iounmap(icr0);
--
--		if (irlm)
--			platform_device_register(&irqpin0_device);
--	} else
--		pr_warn("r8a7779: unable to setup external irq pin mode\n");
--}
--
--#ifdef CONFIG_OF
--static int r8a7779_set_wake(struct irq_data *data, unsigned int on)
--{
--	return 0; /* always allow wakeup */
--}
--
--void __init r8a7779_init_irq_dt(void)
--{
--	gic_arch_extn.irq_set_wake = r8a7779_set_wake;
--
--	irqchip_init();
--
--	/* route all interrupts to ARM */
--	__raw_writel(0xffffffff, INT2NTSR0);
--	__raw_writel(0x3fffffff, INT2NTSR1);
--
--	/* unmask all known interrupts in INTCS2 */
--	__raw_writel(0xfffffff0, INT2SMSKCR0);
--	__raw_writel(0xfff7ffff, INT2SMSKCR1);
--	__raw_writel(0xfffbffdf, INT2SMSKCR2);
--	__raw_writel(0xbffffffc, INT2SMSKCR3);
--	__raw_writel(0x003fee3f, INT2SMSKCR4);
--
--}
--#endif
-diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c
-index f0b6c7de..6a993339 100644
---- a/arch/arm/mach-shmobile/setup-r8a7779.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7779.c
-@@ -22,8 +22,11 @@
- #include <linux/init.h>
- #include <linux/interrupt.h>
- #include <linux/irq.h>
-+#include <linux/irqchip.h>
-+#include <linux/irqchip/arm-gic.h>
- #include <linux/of_platform.h>
- #include <linux/platform_data/gpio-rcar.h>
-+#include <linux/platform_data/irq-renesas-intc-irqpin.h>
- #include <linux/platform_device.h>
- #include <linux/delay.h>
- #include <linux/input.h>
-@@ -67,6 +70,60 @@ void __init r8a7779_map_io(void)
- 	iotable_init(r8a7779_io_desc, ARRAY_SIZE(r8a7779_io_desc));
- }
- 
-+/* IRQ */
-+#define INT2SMSKCR0 IOMEM(0xfe7822a0)
-+#define INT2SMSKCR1 IOMEM(0xfe7822a4)
-+#define INT2SMSKCR2 IOMEM(0xfe7822a8)
-+#define INT2SMSKCR3 IOMEM(0xfe7822ac)
-+#define INT2SMSKCR4 IOMEM(0xfe7822b0)
-+
-+#define INT2NTSR0 IOMEM(0xfe700060)
-+#define INT2NTSR1 IOMEM(0xfe700064)
-+
-+static struct renesas_intc_irqpin_config irqpin0_platform_data __initdata = {
-+	.irq_base = irq_pin(0), /* IRQ0 -> IRQ3 */
-+	.sense_bitfield_width = 2,
-+};
-+
-+static struct resource irqpin0_resources[] __initdata = {
-+	DEFINE_RES_MEM(0xfe78001c, 4), /* ICR1 */
-+	DEFINE_RES_MEM(0xfe780010, 4), /* INTPRI */
-+	DEFINE_RES_MEM(0xfe780024, 4), /* INTREQ */
-+	DEFINE_RES_MEM(0xfe780044, 4), /* INTMSK0 */
-+	DEFINE_RES_MEM(0xfe780064, 4), /* INTMSKCLR0 */
-+	DEFINE_RES_IRQ(gic_spi(27)), /* IRQ0 */
-+	DEFINE_RES_IRQ(gic_spi(28)), /* IRQ1 */
-+	DEFINE_RES_IRQ(gic_spi(29)), /* IRQ2 */
-+	DEFINE_RES_IRQ(gic_spi(30)), /* IRQ3 */
-+};
-+
-+void __init r8a7779_init_irq_extpin(int irlm)
-+{
-+	void __iomem *icr0 = ioremap_nocache(0xfe780000, PAGE_SIZE);
-+	u32 tmp;
-+
-+	if (!icr0) {
-+		pr_warn("r8a7779: unable to setup external irq pin mode\n");
-+		return;
-+	}
-+
-+	tmp = ioread32(icr0);
-+	if (irlm)
-+		tmp |= 1 << 23; /* IRQ0 -> IRQ3 as individual pins */
-+	else
-+		tmp &= ~(1 << 23); /* IRL mode - not supported */
-+	tmp |= (1 << 21); /* LVLMODE = 1 */
-+	iowrite32(tmp, icr0);
-+	iounmap(icr0);
-+
-+	if (irlm)
-+		platform_device_register_resndata(
-+			&platform_bus, "renesas_intc_irqpin", -1,
-+			irqpin0_resources, ARRAY_SIZE(irqpin0_resources),
-+			&irqpin0_platform_data, sizeof(irqpin0_platform_data));
-+}
-+
-+/* PFC/GPIO */
- static struct resource r8a7779_pfc_resources[] = {
- 	DEFINE_RES_MEM(0xfffc0000, 0x023c),
- };
-@@ -641,6 +698,29 @@ void __init r8a7779_init_late(void)
- }
- 
- #ifdef CONFIG_USE_OF
-+static int r8a7779_set_wake(struct irq_data *data, unsigned int on)
-+{
-+	return 0; /* always allow wakeup */
-+}
-+
-+void __init r8a7779_init_irq_dt(void)
-+{
-+	gic_arch_extn.irq_set_wake = r8a7779_set_wake;
-+
-+	irqchip_init();
-+
-+	/* route all interrupts to ARM */
-+	__raw_writel(0xffffffff, INT2NTSR0);
-+	__raw_writel(0x3fffffff, INT2NTSR1);
-+
-+	/* unmask all known interrupts in INTCS2 */
-+	__raw_writel(0xfffffff0, INT2SMSKCR0);
-+	__raw_writel(0xfff7ffff, INT2SMSKCR1);
-+	__raw_writel(0xfffbffdf, INT2SMSKCR2);
-+	__raw_writel(0xbffffffc, INT2SMSKCR3);
-+	__raw_writel(0x003fee3f, INT2SMSKCR4);
-+}
-+
- void __init r8a7779_init_delay(void)
- {
- 	shmobile_setup_delay(1000, 2, 4); /* Cortex-A9 @ 1000MHz */
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0462-ARM-shmobile-armadillo800eva-remove-nfsroot-settings.patch b/patches.renesas/0462-ARM-shmobile-armadillo800eva-remove-nfsroot-settings.patch
deleted file mode 100644
index e6886554ad4e7..0000000000000
--- a/patches.renesas/0462-ARM-shmobile-armadillo800eva-remove-nfsroot-settings.patch
+++ /dev/null
@@ -1,45 +0,0 @@
-From 6649f5c17f0cd975568abf3cc662ce2179c37e23 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Mon, 5 Aug 2013 20:17:06 -0700
-Subject: ARM: shmobile: armadillo800eva: remove nfsroot settings from bootargs
-
-NFS detail settings like "nfsroot=,rsize=4096,wsize=4096" are no longer needed
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 3d814499ad80d7876d6d484e4d37fae79cb403c6)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts | 2 +-
- arch/arm/boot/dts/r8a7740-armadillo800eva.dts           | 2 +-
- 2 files changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
-index 366f7298..c638e4ab 100644
---- a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
-+++ b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
-@@ -17,7 +17,7 @@
- 	compatible = "renesas,armadillo800eva-reference", "renesas,r8a7740";
- 
- 	chosen {
--		bootargs = "console=tty0 console=ttySC1,115200 earlyprintk=sh-sci.1,115200 ignore_loglevel root=/dev/nfs ip=dhcp nfsroot=,rsize=4096,wsize=4096 rw";
-+		bootargs = "console=tty0 console=ttySC1,115200 earlyprintk=sh-sci.1,115200 ignore_loglevel root=/dev/nfs ip=dhcp rw";
- 	};
- 
- 	memory {
-diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva.dts
-index 93da655b..426cd9c3 100644
---- a/arch/arm/boot/dts/r8a7740-armadillo800eva.dts
-+++ b/arch/arm/boot/dts/r8a7740-armadillo800eva.dts
-@@ -16,7 +16,7 @@
- 	compatible = "renesas,armadillo800eva";
- 
- 	chosen {
--		bootargs = "console=tty0 console=ttySC1,115200 earlyprintk=sh-sci.1,115200 ignore_loglevel root=/dev/nfs ip=dhcp nfsroot=,rsize=4096,wsize=4096 rw";
-+		bootargs = "console=tty0 console=ttySC1,115200 earlyprintk=sh-sci.1,115200 ignore_loglevel root=/dev/nfs ip=dhcp rw";
- 	};
- 
- 	memory {
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0463-ARM-shmobile-kzm9d-remove-nfsroot-settings-from-boot.patch b/patches.renesas/0463-ARM-shmobile-kzm9d-remove-nfsroot-settings-from-boot.patch
deleted file mode 100644
index 94e93f3d2ca22..0000000000000
--- a/patches.renesas/0463-ARM-shmobile-kzm9d-remove-nfsroot-settings-from-boot.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From d6c4beb3c6ff439199a643bd173f2f1bd1175ef2 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Mon, 5 Aug 2013 20:17:33 -0700
-Subject: ARM: shmobile: kzm9d: remove nfsroot settings from bootargs
-
-NFS detail settings like "nfsroot=,rsize=4096,wsize=4096" are no longer needed
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 6de69131854501dcc9585d44087430584f8ccdf4)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/emev2-kzm9d-reference.dts | 2 +-
- arch/arm/boot/dts/emev2-kzm9d.dts           | 2 +-
- 2 files changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/arch/arm/boot/dts/emev2-kzm9d-reference.dts b/arch/arm/boot/dts/emev2-kzm9d-reference.dts
-index bed676b9..cceefda2 100644
---- a/arch/arm/boot/dts/emev2-kzm9d-reference.dts
-+++ b/arch/arm/boot/dts/emev2-kzm9d-reference.dts
-@@ -21,7 +21,7 @@
- 	};
- 
- 	chosen {
--		bootargs = "console=ttyS1,115200n81 ignore_loglevel root=/dev/nfs ip=dhcp nfsroot=,rsize=4096,wsize=4096";
-+		bootargs = "console=ttyS1,115200n81 ignore_loglevel root=/dev/nfs ip=dhcp";
- 	};
- 
- 	reg_1p8v: regulator@0 {
-diff --git a/arch/arm/boot/dts/emev2-kzm9d.dts b/arch/arm/boot/dts/emev2-kzm9d.dts
-index dda13bc0..f92e812f 100644
---- a/arch/arm/boot/dts/emev2-kzm9d.dts
-+++ b/arch/arm/boot/dts/emev2-kzm9d.dts
-@@ -21,6 +21,6 @@
- 	};
- 
- 	chosen {
--		bootargs = "console=ttyS1,115200n81 ignore_loglevel root=/dev/nfs ip=dhcp nfsroot=,rsize=4096,wsize=4096";
-+		bootargs = "console=ttyS1,115200n81 ignore_loglevel root=/dev/nfs ip=dhcp";
- 	};
- };
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0464-ARM-shmobile-sh73a0-Remove-global-GPIO_NR-definition.patch b/patches.renesas/0464-ARM-shmobile-sh73a0-Remove-global-GPIO_NR-definition.patch
deleted file mode 100644
index c7ad140e06a07..0000000000000
--- a/patches.renesas/0464-ARM-shmobile-sh73a0-Remove-global-GPIO_NR-definition.patch
+++ /dev/null
@@ -1,63 +0,0 @@
-From c3a441172b4d1d2dca11583c4bfde0cbed085c55 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Mon, 29 Jul 2013 21:33:54 +0200
-Subject: ARM: shmobile: sh73a0: Remove global GPIO_NR definition
-
-The total number of SoC GPIOs is only used to compute the base GPIO
-number of th PCF8575 GPIO extender on the KZM9G board. As GPIO
-allocation became fully dynamic with DT, no other SH73A0 board will use
-the GPIO_NR macro. Move it to the KZM9G board file.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 282b583f752f996ee5c33b0cdc18adf3b5094ee0)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-kzm9g.c         | 16 ++++++++--------
- arch/arm/mach-shmobile/include/mach/sh73a0.h |  2 --
- 2 files changed, 8 insertions(+), 10 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-kzm9g.c b/arch/arm/mach-shmobile/board-kzm9g.c
-index 165483c9..b30ef47d 100644
---- a/arch/arm/mach-shmobile/board-kzm9g.c
-+++ b/arch/arm/mach-shmobile/board-kzm9g.c
-@@ -53,14 +53,14 @@
- /*
-  * external GPIO
-  */
--#define GPIO_PCF8575_BASE	(GPIO_NR)
--#define GPIO_PCF8575_PORT10	(GPIO_NR + 8)
--#define GPIO_PCF8575_PORT11	(GPIO_NR + 9)
--#define GPIO_PCF8575_PORT12	(GPIO_NR + 10)
--#define GPIO_PCF8575_PORT13	(GPIO_NR + 11)
--#define GPIO_PCF8575_PORT14	(GPIO_NR + 12)
--#define GPIO_PCF8575_PORT15	(GPIO_NR + 13)
--#define GPIO_PCF8575_PORT16	(GPIO_NR + 14)
-+#define GPIO_PCF8575_BASE	(310)
-+#define GPIO_PCF8575_PORT10	(GPIO_PCF8575_BASE + 8)
-+#define GPIO_PCF8575_PORT11	(GPIO_PCF8575_BASE + 9)
-+#define GPIO_PCF8575_PORT12	(GPIO_PCF8575_BASE + 10)
-+#define GPIO_PCF8575_PORT13	(GPIO_PCF8575_BASE + 11)
-+#define GPIO_PCF8575_PORT14	(GPIO_PCF8575_BASE + 12)
-+#define GPIO_PCF8575_PORT15	(GPIO_PCF8575_BASE + 13)
-+#define GPIO_PCF8575_PORT16	(GPIO_PCF8575_BASE + 14)
- 
- /* Dummy supplies, where voltage doesn't matter */
- static struct regulator_consumer_supply dummy_supplies[] = {
-diff --git a/arch/arm/mach-shmobile/include/mach/sh73a0.h b/arch/arm/mach-shmobile/include/mach/sh73a0.h
-index 680dc5f1..359b582d 100644
---- a/arch/arm/mach-shmobile/include/mach/sh73a0.h
-+++ b/arch/arm/mach-shmobile/include/mach/sh73a0.h
-@@ -1,8 +1,6 @@
- #ifndef __ASM_SH73A0_H__
- #define __ASM_SH73A0_H__
- 
--#define GPIO_NR			310
--
- /* DMA slave IDs */
- enum {
- 	SHDMA_SLAVE_INVALID,
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0465-ARM-shmobile-Introduce-shared-SCU-SMP-boot-code.patch b/patches.renesas/0465-ARM-shmobile-Introduce-shared-SCU-SMP-boot-code.patch
deleted file mode 100644
index 0bb2460a6bd7a..0000000000000
--- a/patches.renesas/0465-ARM-shmobile-Introduce-shared-SCU-SMP-boot-code.patch
+++ /dev/null
@@ -1,77 +0,0 @@
-From 5481c5987c45b2c5592b3665c130897c08ebef3e Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Wed, 31 Jul 2013 16:07:12 +0900
-Subject: ARM: shmobile: Introduce shared SCU SMP boot code
-
-Add SMP boot functions for SCU equipped mach-shmobile SoCs.
-
-At this point shmobile_smp_scu_prepare_cpus() controls the SCU and
-installs boot fn and arg, while shmobile_smp_scu_boot_secondary()
-currently does nothing. In the future the boot function and arg
-install code will be reworked, so the empty function is ground
-work for that.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit c970d4ef3ac6d56f5fd02902ad2ad80377c0bca1)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/include/mach/common.h |  3 +++
- arch/arm/mach-shmobile/platsmp-scu.c         | 31 ++++++++++++++++++++++++++++
- 2 files changed, 34 insertions(+)
- create mode 100644 arch/arm/mach-shmobile/platsmp-scu.c
-
-diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h
-index 18a76f91..08d7cacc 100644
---- a/arch/arm/mach-shmobile/include/mach/common.h
-+++ b/arch/arm/mach-shmobile/include/mach/common.h
-@@ -10,6 +10,9 @@ extern void shmobile_boot_vector(void);
- extern unsigned long shmobile_boot_fn;
- extern unsigned long shmobile_boot_arg;
- extern void shmobile_boot_scu(void);
-+extern void shmobile_smp_scu_prepare_cpus(unsigned int max_cpus);
-+extern int shmobile_smp_scu_boot_secondary(unsigned int cpu,
-+					   struct task_struct *idle);
- struct clk;
- extern int shmobile_clk_init(void);
- extern void shmobile_handle_irq_intc(struct pt_regs *);
-diff --git a/arch/arm/mach-shmobile/platsmp-scu.c b/arch/arm/mach-shmobile/platsmp-scu.c
-new file mode 100644
-index 00000000..8f478e4d
---- /dev/null
-+++ b/arch/arm/mach-shmobile/platsmp-scu.c
-@@ -0,0 +1,31 @@
-+/*
-+ * SMP support for SoCs with SCU covered by mach-shmobile
-+ *
-+ * Copyright (C) 2013  Magnus Damm
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+#include <linux/init.h>
-+#include <linux/io.h>
-+#include <linux/smp.h>
-+#include <asm/smp_plat.h>
-+#include <asm/smp_scu.h>
-+#include <mach/common.h>
-+
-+void __init shmobile_smp_scu_prepare_cpus(unsigned int max_cpus)
-+{
-+	shmobile_boot_fn = virt_to_phys(shmobile_boot_scu);
-+	shmobile_boot_arg = (unsigned long)shmobile_scu_base;
-+
-+	/* enable SCU and cache coherency on booting CPU */
-+	scu_enable(shmobile_scu_base);
-+	scu_power_mode(shmobile_scu_base, SCU_PM_NORMAL);
-+}
-+
-+int shmobile_smp_scu_boot_secondary(unsigned int cpu, struct task_struct *idle)
-+{
-+	/* do nothing for now */
-+	return 0;
-+}
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0466-ARM-shmobile-Use-shared-SCU-SMP-boot-code-on-sh73a0.patch b/patches.renesas/0466-ARM-shmobile-Use-shared-SCU-SMP-boot-code-on-sh73a0.patch
deleted file mode 100644
index 892a397377822..0000000000000
--- a/patches.renesas/0466-ARM-shmobile-Use-shared-SCU-SMP-boot-code-on-sh73a0.patch
+++ /dev/null
@@ -1,80 +0,0 @@
-From e7b8d48fe8d27bb35c03f110bb88ca7e82517d0b Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Wed, 31 Jul 2013 16:07:21 +0900
-Subject: ARM: shmobile: Use shared SCU SMP boot code on sh73a0
-
-Use shared SCU code on sh73a0 for SMP boot.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 12eb8474386228c91e35be031d7c3eaa1318b5cf)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/Makefile     |  2 +-
- arch/arm/mach-shmobile/smp-sh73a0.c | 26 +++++++++++++-------------
- 2 files changed, 14 insertions(+), 14 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
-index c30867cc..af7c6ccb 100644
---- a/arch/arm/mach-shmobile/Makefile
-+++ b/arch/arm/mach-shmobile/Makefile
-@@ -32,7 +32,7 @@ endif
- 
- # SMP objects
- smp-y				:= platsmp.o headsmp.o
--smp-$(CONFIG_ARCH_SH73A0)	+= smp-sh73a0.o headsmp-scu.o
-+smp-$(CONFIG_ARCH_SH73A0)	+= smp-sh73a0.o headsmp-scu.o platsmp-scu.o
- smp-$(CONFIG_ARCH_R8A7779)	+= smp-r8a7779.o headsmp-scu.o
- smp-$(CONFIG_ARCH_EMEV2)	+= smp-emev2.o headsmp-scu.o
- 
-diff --git a/arch/arm/mach-shmobile/smp-sh73a0.c b/arch/arm/mach-shmobile/smp-sh73a0.c
-index 1b3dc7c1..1096b0eb 100644
---- a/arch/arm/mach-shmobile/smp-sh73a0.c
-+++ b/arch/arm/mach-shmobile/smp-sh73a0.c
-@@ -50,30 +50,30 @@ void __init sh73a0_register_twd(void)
- 
- static int __cpuinit sh73a0_boot_secondary(unsigned int cpu, struct task_struct *idle)
- {
--	cpu = cpu_logical_map(cpu);
-+	unsigned int lcpu = cpu_logical_map(cpu);
-+	int ret;
- 
--	if (((__raw_readl(PSTR) >> (4 * cpu)) & 3) == 3)
--		__raw_writel(1 << cpu, WUPCR);	/* wake up */
-+	ret = shmobile_smp_scu_boot_secondary(cpu, idle);
-+	if (ret)
-+		return ret;
-+
-+	if (((__raw_readl(PSTR) >> (4 * lcpu)) & 3) == 3)
-+		__raw_writel(1 << lcpu, WUPCR);	/* wake up */
- 	else
--		__raw_writel(1 << cpu, SRESCR);	/* reset */
-+		__raw_writel(1 << lcpu, SRESCR);	/* reset */
- 
- 	return 0;
- }
- 
- static void __init sh73a0_smp_prepare_cpus(unsigned int max_cpus)
- {
--	/* setup sh73a0 specific SCU base */
--	shmobile_scu_base = IOMEM(SH73A0_SCU_BASE);
--	scu_enable(shmobile_scu_base);
--
--	/* Map the reset vector (in headsmp-scu.S, headsmp.S) */
-+	/* Map the reset vector (in headsmp.S) */
- 	__raw_writel(0, APARMBAREA);      /* 4k */
- 	__raw_writel(__pa(shmobile_boot_vector), SBAR);
--	shmobile_boot_fn = virt_to_phys(shmobile_boot_scu);
--	shmobile_boot_arg = (unsigned long)shmobile_scu_base;
- 
--	/* enable cache coherency on booting CPU */
--	scu_power_mode(shmobile_scu_base, SCU_PM_NORMAL);
-+	/* setup sh73a0 specific SCU bits */
-+	shmobile_scu_base = IOMEM(SH73A0_SCU_BASE);
-+	shmobile_smp_scu_prepare_cpus(max_cpus);
- }
- 
- #ifdef CONFIG_HOTPLUG_CPU
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0467-ARM-shmobile-Use-shared-SCU-SMP-boot-code-on-r8a7779.patch b/patches.renesas/0467-ARM-shmobile-Use-shared-SCU-SMP-boot-code-on-r8a7779.patch
deleted file mode 100644
index 798214b774fb1..0000000000000
--- a/patches.renesas/0467-ARM-shmobile-Use-shared-SCU-SMP-boot-code-on-r8a7779.patch
+++ /dev/null
@@ -1,82 +0,0 @@
-From 3540a0ddf4af5a4e1782baf21d9d9dd153f075ad Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Wed, 31 Jul 2013 16:07:31 +0900
-Subject: ARM: shmobile: Use shared SCU SMP boot code on r8a7779
-
-Use shared SCU code on r8a7779 for SMP boot.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 0ca2894b5a9007091ad1a4d82b9f3132d4dd9410)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/Makefile      |  2 +-
- arch/arm/mach-shmobile/smp-r8a7779.c | 23 ++++++++++++-----------
- 2 files changed, 13 insertions(+), 12 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
-index af7c6ccb..1682b9d3 100644
---- a/arch/arm/mach-shmobile/Makefile
-+++ b/arch/arm/mach-shmobile/Makefile
-@@ -33,7 +33,7 @@ endif
- # SMP objects
- smp-y				:= platsmp.o headsmp.o
- smp-$(CONFIG_ARCH_SH73A0)	+= smp-sh73a0.o headsmp-scu.o platsmp-scu.o
--smp-$(CONFIG_ARCH_R8A7779)	+= smp-r8a7779.o headsmp-scu.o
-+smp-$(CONFIG_ARCH_R8A7779)	+= smp-r8a7779.o headsmp-scu.o platsmp-scu.o
- smp-$(CONFIG_ARCH_EMEV2)	+= smp-emev2.o headsmp-scu.o
- 
- # IRQ objects
-diff --git a/arch/arm/mach-shmobile/smp-r8a7779.c b/arch/arm/mach-shmobile/smp-r8a7779.c
-index bb3adae7..1963d0d4 100644
---- a/arch/arm/mach-shmobile/smp-r8a7779.c
-+++ b/arch/arm/mach-shmobile/smp-r8a7779.c
-@@ -84,33 +84,34 @@ static int r8a7779_platform_cpu_kill(unsigned int cpu)
- static int __cpuinit r8a7779_boot_secondary(unsigned int cpu, struct task_struct *idle)
- {
- 	struct r8a7779_pm_ch *ch = NULL;
--	int ret = -EIO;
-+	unsigned int lcpu = cpu_logical_map(cpu);
-+	int ret;
- 
--	cpu = cpu_logical_map(cpu);
-+	ret = shmobile_smp_scu_boot_secondary(cpu, idle);
-+	if (ret)
-+		return ret;
- 
--	if (cpu < ARRAY_SIZE(r8a7779_ch_cpu))
--		ch = r8a7779_ch_cpu[cpu];
-+	if (lcpu < ARRAY_SIZE(r8a7779_ch_cpu))
-+		ch = r8a7779_ch_cpu[lcpu];
- 
- 	if (ch)
- 		ret = r8a7779_sysc_power_up(ch);
-+	else
-+		ret = -EIO;
- 
- 	return ret;
- }
- 
- static void __init r8a7779_smp_prepare_cpus(unsigned int max_cpus)
- {
--
--	/* setup r8a7779 specific SCU base */
--	shmobile_scu_base = IOMEM(R8A7779_SCU_BASE);
--	scu_enable(shmobile_scu_base);
--
- 	/* Map the reset vector (in headsmp-scu.S, headsmp.S) */
- 	__raw_writel(__pa(shmobile_boot_vector), AVECR);
- 	shmobile_boot_fn = virt_to_phys(shmobile_boot_scu);
- 	shmobile_boot_arg = (unsigned long)shmobile_scu_base;
- 
--	/* enable cache coherency on booting CPU */
--	scu_power_mode(shmobile_scu_base, SCU_PM_NORMAL);
-+	/* setup r8a7779 specific SCU bits */
-+	shmobile_scu_base = IOMEM(R8A7779_SCU_BASE);
-+	shmobile_smp_scu_prepare_cpus(max_cpus);
- 
- 	r8a7779_pm_init();
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0468-ARM-shmobile-Use-shared-SCU-SMP-boot-code-on-emev2.patch b/patches.renesas/0468-ARM-shmobile-Use-shared-SCU-SMP-boot-code-on-emev2.patch
deleted file mode 100644
index 5192f1582bafb..0000000000000
--- a/patches.renesas/0468-ARM-shmobile-Use-shared-SCU-SMP-boot-code-on-emev2.patch
+++ /dev/null
@@ -1,75 +0,0 @@
-From d8400d1035ed052c5beaf750e3381a75a1ac8798 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Wed, 31 Jul 2013 16:07:40 +0900
-Subject: ARM: shmobile: Use shared SCU SMP boot code on emev2
-
-Use shared SCU code on emev2 for SMP boot.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 0da60225dee270a4a4b86c08509e772e78961b82)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/Makefile    |  2 +-
- arch/arm/mach-shmobile/smp-emev2.c | 19 ++++++++++---------
- 2 files changed, 11 insertions(+), 10 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
-index 1682b9d3..2705bfa8 100644
---- a/arch/arm/mach-shmobile/Makefile
-+++ b/arch/arm/mach-shmobile/Makefile
-@@ -34,7 +34,7 @@ endif
- smp-y				:= platsmp.o headsmp.o
- smp-$(CONFIG_ARCH_SH73A0)	+= smp-sh73a0.o headsmp-scu.o platsmp-scu.o
- smp-$(CONFIG_ARCH_R8A7779)	+= smp-r8a7779.o headsmp-scu.o platsmp-scu.o
--smp-$(CONFIG_ARCH_EMEV2)	+= smp-emev2.o headsmp-scu.o
-+smp-$(CONFIG_ARCH_EMEV2)	+= smp-emev2.o headsmp-scu.o platsmp-scu.o
- 
- # IRQ objects
- obj-$(CONFIG_ARCH_SH7372)	+= entry-intc.o
-diff --git a/arch/arm/mach-shmobile/smp-emev2.c b/arch/arm/mach-shmobile/smp-emev2.c
-index 1bf8bc7e..d1c101db 100644
---- a/arch/arm/mach-shmobile/smp-emev2.c
-+++ b/arch/arm/mach-shmobile/smp-emev2.c
-@@ -34,6 +34,12 @@
- 
- static int __cpuinit emev2_boot_secondary(unsigned int cpu, struct task_struct *idle)
- {
-+	int ret;
-+
-+	ret = shmobile_smp_scu_boot_secondary(cpu, idle);
-+	if (ret)
-+		return ret;
-+
- 	arch_send_wakeup_ipi_mask(cpumask_of(cpu_logical_map(cpu)));
- 	return 0;
- }
-@@ -42,21 +48,16 @@ static void __init emev2_smp_prepare_cpus(unsigned int max_cpus)
- {
- 	void __iomem *smu;
- 
--	/* setup EMEV2 specific SCU base, enable */
--	shmobile_scu_base = ioremap(EMEV2_SCU_BASE, PAGE_SIZE);
--	scu_enable(shmobile_scu_base);
--
--	/* Tell ROM loader about our vector (in headsmp-scu.S, headsmp.S) */
-+	/* Tell ROM loader about our vector (in headsmp.S) */
- 	smu = ioremap(EMEV2_SMU_BASE, PAGE_SIZE);
- 	if (smu) {
- 		iowrite32(__pa(shmobile_boot_vector), smu + SMU_GENERAL_REG0);
- 		iounmap(smu);
- 	}
--	shmobile_boot_fn = virt_to_phys(shmobile_boot_scu);
--	shmobile_boot_arg = (unsigned long)shmobile_scu_base;
- 
--	/* enable cache coherency on booting CPU */
--	scu_power_mode(shmobile_scu_base, SCU_PM_NORMAL);
-+	/* setup EMEV2 specific SCU bits */
-+	shmobile_scu_base = ioremap(EMEV2_SCU_BASE, PAGE_SIZE);
-+	shmobile_smp_scu_prepare_cpus(max_cpus);
- }
- 
- struct smp_operations emev2_smp_ops __initdata = {
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0469-ARM-shmobile-Add-shared-SCU-CPU-Hotplug-code.patch b/patches.renesas/0469-ARM-shmobile-Add-shared-SCU-CPU-Hotplug-code.patch
deleted file mode 100644
index affcee4284646..0000000000000
--- a/patches.renesas/0469-ARM-shmobile-Add-shared-SCU-CPU-Hotplug-code.patch
+++ /dev/null
@@ -1,100 +0,0 @@
-From ae7f732e421913a955120f5f221fd6917cd87fde Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Wed, 31 Jul 2013 16:07:49 +0900
-Subject: ARM: shmobile: Add shared SCU CPU Hotplug code
-
-Add CPU Hotplug functions for SCU equipped mach-shmobile SoCs.
-
-The functions shmobile_smp_scu_cpu_die() together with
-shmobile_smp_scu_cpu_kill() perform basic shutdown and
-allows checking of shutdown status. These are written
-to work together with SMP boot code in  headsmp-scu.S.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit e7b1c96384181d690950530f5a64167965226744)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/include/mach/common.h |  2 ++
- arch/arm/mach-shmobile/platsmp-scu.c         | 45 ++++++++++++++++++++++++++++
- 2 files changed, 47 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h
-index 08d7cacc..2731dd71 100644
---- a/arch/arm/mach-shmobile/include/mach/common.h
-+++ b/arch/arm/mach-shmobile/include/mach/common.h
-@@ -13,6 +13,8 @@ extern void shmobile_boot_scu(void);
- extern void shmobile_smp_scu_prepare_cpus(unsigned int max_cpus);
- extern int shmobile_smp_scu_boot_secondary(unsigned int cpu,
- 					   struct task_struct *idle);
-+extern void shmobile_smp_scu_cpu_die(unsigned int cpu);
-+extern int shmobile_smp_scu_cpu_kill(unsigned int cpu);
- struct clk;
- extern int shmobile_clk_init(void);
- extern void shmobile_handle_irq_intc(struct pt_regs *);
-diff --git a/arch/arm/mach-shmobile/platsmp-scu.c b/arch/arm/mach-shmobile/platsmp-scu.c
-index 8f478e4d..7a0c066d 100644
---- a/arch/arm/mach-shmobile/platsmp-scu.c
-+++ b/arch/arm/mach-shmobile/platsmp-scu.c
-@@ -7,9 +7,11 @@
-  * it under the terms of the GNU General Public License version 2 as
-  * published by the Free Software Foundation.
-  */
-+#include <linux/delay.h>
- #include <linux/init.h>
- #include <linux/io.h>
- #include <linux/smp.h>
-+#include <asm/cacheflush.h>
- #include <asm/smp_plat.h>
- #include <asm/smp_scu.h>
- #include <mach/common.h>
-@@ -29,3 +31,46 @@ int shmobile_smp_scu_boot_secondary(unsigned int cpu, struct task_struct *idle)
- 	/* do nothing for now */
- 	return 0;
- }
-+
-+#ifdef CONFIG_HOTPLUG_CPU
-+void shmobile_smp_scu_cpu_die(unsigned int cpu)
-+{
-+	dsb();
-+	flush_cache_all();
-+
-+	/* disable cache coherency */
-+	scu_power_mode(shmobile_scu_base, SCU_PM_POWEROFF);
-+
-+	/* Endless loop until reset */
-+	while (1)
-+		cpu_do_idle();
-+}
-+
-+static int shmobile_smp_scu_psr_core_disabled(int cpu)
-+{
-+	unsigned long mask = SCU_PM_POWEROFF << (cpu * 8);
-+
-+	if ((__raw_readl(shmobile_scu_base + 8) & mask) == mask)
-+		return 1;
-+
-+	return 0;
-+}
-+
-+int shmobile_smp_scu_cpu_kill(unsigned int cpu)
-+{
-+	int k;
-+
-+	/* this function is running on another CPU than the offline target,
-+	 * here we need wait for shutdown code in platform_cpu_die() to
-+	 * finish before asking SoC-specific code to power off the CPU core.
-+	 */
-+	for (k = 0; k < 1000; k++) {
-+		if (shmobile_smp_scu_psr_core_disabled(cpu))
-+			return 1;
-+
-+		mdelay(1);
-+	}
-+
-+	return 0;
-+}
-+#endif
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0470-ARM-shmobile-Use-shared-SCU-CPU-Hotplug-code-on-sh73.patch b/patches.renesas/0470-ARM-shmobile-Use-shared-SCU-CPU-Hotplug-code-on-sh73.patch
deleted file mode 100644
index 79e2b8e444760..0000000000000
--- a/patches.renesas/0470-ARM-shmobile-Use-shared-SCU-CPU-Hotplug-code-on-sh73.patch
+++ /dev/null
@@ -1,99 +0,0 @@
-From 3d30ea697e0684c8780cad1e8d0f86f6ee137e53 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Wed, 31 Jul 2013 16:07:59 +0900
-Subject: ARM: shmobile: Use shared SCU CPU Hotplug code on sh73a0
-
-Update the sh73a0 specific CPU Hotplug code to make use of
-the recently introduced shared SCU functions. The sh73a0
-power control hardware relies on SCU_PM_POWEROFF with WFI
-so the shared SCU code will as-is power down the hardware
-as expected.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 352e57a3af195825767d0f638cb9ec3517f93de4)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/smp-sh73a0.c | 41 +++----------------------------------
- 1 file changed, 3 insertions(+), 38 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/smp-sh73a0.c b/arch/arm/mach-shmobile/smp-sh73a0.c
-index 1096b0eb..8b3b9777 100644
---- a/arch/arm/mach-shmobile/smp-sh73a0.c
-+++ b/arch/arm/mach-shmobile/smp-sh73a0.c
-@@ -20,14 +20,11 @@
- #include <linux/kernel.h>
- #include <linux/init.h>
- #include <linux/smp.h>
--#include <linux/spinlock.h>
- #include <linux/io.h>
- #include <linux/delay.h>
- #include <mach/common.h>
--#include <asm/cacheflush.h>
--#include <asm/smp_plat.h>
- #include <mach/sh73a0.h>
--#include <asm/smp_scu.h>
-+#include <asm/smp_plat.h>
- #include <asm/smp_twd.h>
- 
- #define WUPCR		IOMEM(0xe6151010)
-@@ -36,8 +33,6 @@
- #define SBAR		IOMEM(0xe6180020)
- #define APARMBAREA	IOMEM(0xe6f10020)
- 
--#define PSTR_SHUTDOWN_MODE	3
--
- #define SH73A0_SCU_BASE 0xf0000000
- 
- #ifdef CONFIG_HAVE_ARM_TWD
-@@ -77,36 +72,6 @@ static void __init sh73a0_smp_prepare_cpus(unsigned int max_cpus)
- }
- 
- #ifdef CONFIG_HOTPLUG_CPU
--static int sh73a0_cpu_kill(unsigned int cpu)
--{
--
--	int k;
--	u32 pstr;
--
--	/*
--	 * wait until the power status register confirms the shutdown of the
--	 * offline target
--	 */
--	for (k = 0; k < 1000; k++) {
--		pstr = (__raw_readl(PSTR) >> (4 * cpu)) & 3;
--		if (pstr == PSTR_SHUTDOWN_MODE)
--			return 1;
--
--		mdelay(1);
--	}
--
--	return 0;
--}
--
--static void sh73a0_cpu_die(unsigned int cpu)
--{
--	/* Set power off mode. This takes the CPU out of the MP cluster */
--	scu_power_mode(shmobile_scu_base, SCU_PM_POWEROFF);
--
--	/* Enter shutdown mode */
--	cpu_do_idle();
--}
--
- static int sh73a0_cpu_disable(unsigned int cpu)
- {
- 	return 0; /* CPU0 and CPU1 supported */
-@@ -117,8 +82,8 @@ struct smp_operations sh73a0_smp_ops __initdata = {
- 	.smp_prepare_cpus	= sh73a0_smp_prepare_cpus,
- 	.smp_boot_secondary	= sh73a0_boot_secondary,
- #ifdef CONFIG_HOTPLUG_CPU
--	.cpu_kill		= sh73a0_cpu_kill,
--	.cpu_die		= sh73a0_cpu_die,
- 	.cpu_disable		= sh73a0_cpu_disable,
-+	.cpu_die		= shmobile_smp_scu_cpu_die,
-+	.cpu_kill		= shmobile_smp_scu_cpu_kill,
- #endif
- };
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0471-ARM-shmobile-Use-shared-SCU-CPU-Hotplug-code-on-r8a7.patch b/patches.renesas/0471-ARM-shmobile-Use-shared-SCU-CPU-Hotplug-code-on-r8a7.patch
deleted file mode 100644
index 264f15d99c6f6..0000000000000
--- a/patches.renesas/0471-ARM-shmobile-Use-shared-SCU-CPU-Hotplug-code-on-r8a7.patch
+++ /dev/null
@@ -1,86 +0,0 @@
-From 10b1cbc230430b5fc09df5ec5c7c78a0643b928d Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Wed, 31 Jul 2013 16:08:09 +0900
-Subject: ARM: shmobile: Use shared SCU CPU Hotplug code on r8a7779
-
-Update the r8a7779 specific CPU Hotplug code to make use of
-the recently introduced shared SCU functions. The r8a7779
-power domain hardware requires special power down handling
-at ->kill() time.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit e9e7c4fbf468e205387b21463dddacfe44da2d9a)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/smp-r8a7779.c | 41 ++++--------------------------------
- 1 file changed, 4 insertions(+), 37 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/smp-r8a7779.c b/arch/arm/mach-shmobile/smp-r8a7779.c
-index 1963d0d4..c159964e 100644
---- a/arch/arm/mach-shmobile/smp-r8a7779.c
-+++ b/arch/arm/mach-shmobile/smp-r8a7779.c
-@@ -122,47 +122,14 @@ static void __init r8a7779_smp_prepare_cpus(unsigned int max_cpus)
- }
- 
- #ifdef CONFIG_HOTPLUG_CPU
--static int r8a7779_scu_psr_core_disabled(int cpu)
--{
--	unsigned long mask = 3 << (cpu * 8);
--
--	if ((__raw_readl(shmobile_scu_base + 8) & mask) == mask)
--		return 1;
--
--	return 0;
--}
--
- static int r8a7779_cpu_kill(unsigned int cpu)
- {
--	int k;
--
--	/* this function is running on another CPU than the offline target,
--	 * here we need wait for shutdown code in platform_cpu_die() to
--	 * finish before asking SoC-specific code to power off the CPU core.
--	 */
--	for (k = 0; k < 1000; k++) {
--		if (r8a7779_scu_psr_core_disabled(cpu))
--			return r8a7779_platform_cpu_kill(cpu);
--
--		mdelay(1);
--	}
-+	if (shmobile_smp_scu_cpu_kill(cpu))
-+		return r8a7779_platform_cpu_kill(cpu);
- 
- 	return 0;
- }
- 
--static void r8a7779_cpu_die(unsigned int cpu)
--{
--	dsb();
--	flush_cache_all();
--
--	/* disable cache coherency */
--	scu_power_mode(shmobile_scu_base, SCU_PM_POWEROFF);
--
--	/* Endless loop until power off from r8a7779_cpu_kill() */
--	while (1)
--		cpu_do_idle();
--}
--
- static int r8a7779_cpu_disable(unsigned int cpu)
- {
- 	/* only CPU1->3 have power domains, do not allow hotplug of CPU0 */
-@@ -174,8 +141,8 @@ struct smp_operations r8a7779_smp_ops  __initdata = {
- 	.smp_prepare_cpus	= r8a7779_smp_prepare_cpus,
- 	.smp_boot_secondary	= r8a7779_boot_secondary,
- #ifdef CONFIG_HOTPLUG_CPU
--	.cpu_kill		= r8a7779_cpu_kill,
--	.cpu_die		= r8a7779_cpu_die,
- 	.cpu_disable		= r8a7779_cpu_disable,
-+	.cpu_die		= shmobile_smp_scu_cpu_die,
-+	.cpu_kill		= r8a7779_cpu_kill,
- #endif
- };
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0472-ARM-shmobile-Introduce-per-CPU-SMP-boot-sleep-code.patch b/patches.renesas/0472-ARM-shmobile-Introduce-per-CPU-SMP-boot-sleep-code.patch
deleted file mode 100644
index da3f0db28c3c0..0000000000000
--- a/patches.renesas/0472-ARM-shmobile-Introduce-per-CPU-SMP-boot-sleep-code.patch
+++ /dev/null
@@ -1,137 +0,0 @@
-From 53bc71f8c9ec057982e54804e0bab75e34f33d38 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Thu, 1 Aug 2013 03:38:18 +0900
-Subject: ARM: shmobile: Introduce per-CPU SMP boot / sleep code
-
-Add per-CPU SMP boot / sleep code that can be used by all
-SoCs included in mach-shmobile.
-
-The boot code reads out the per-CPU MPIDR id value and
-matches it with the value stored for any CPU number, and
-if there is a match and the boot function is set as well
-then the boot function will be executed.
-
-The sleep code simply uses WFI and then jumps back to the
-boot code to see if anyone has asked to wake up that CPU,
-if not it will sleep again.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-[horms+renesas@verge.net.au: Remove trailing whitespace]
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-(cherry picked from commit cc61591e45c0457139ddd4cd7e57f75928acaaf2)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/headsmp.S             | 49 ++++++++++++++++++++++++++++
- arch/arm/mach-shmobile/include/mach/common.h |  4 +++
- arch/arm/mach-shmobile/platsmp.c             | 18 ++++++++++
- 3 files changed, 71 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/headsmp.S b/arch/arm/mach-shmobile/headsmp.S
-index dfb41dfc..a8cabee4 100644
---- a/arch/arm/mach-shmobile/headsmp.S
-+++ b/arch/arm/mach-shmobile/headsmp.S
-@@ -42,3 +42,52 @@ shmobile_boot_fn:
- 	.globl	shmobile_boot_arg
- shmobile_boot_arg:
- 2:	.space	4
-+
-+/*
-+ * Per-CPU SMP boot function/argument selection code based on MPIDR
-+ */
-+
-+ENTRY(shmobile_smp_boot)
-+						@ r0 = MPIDR_HWID_BITMASK
-+	mrc	p15, 0, r1, c0, c0, 5		@ r1 = MPIDR
-+	and	r0, r1, r0			@ r0 = cpu_logical_map() value
-+	mov	r1, #0				@ r1 = CPU index
-+	adr	r5, 1f				@ array of per-cpu mpidr values
-+	adr	r6, 2f				@ array of per-cpu functions
-+	adr	r7, 3f				@ array of per-cpu arguments
-+
-+shmobile_smp_boot_find_mpidr:
-+	ldr	r8, [r5, r1, lsl #2]
-+	cmp	r8, r0
-+	bne	shmobile_smp_boot_next
-+
-+	ldr	r9, [r6, r1, lsl #2]
-+	cmp	r9, #0
-+	bne	shmobile_smp_boot_found
-+
-+shmobile_smp_boot_next:
-+	add	r1, r1, #1
-+	cmp	r1, #CONFIG_NR_CPUS
-+	blo	shmobile_smp_boot_find_mpidr
-+
-+	b	shmobile_smp_sleep
-+
-+shmobile_smp_boot_found:
-+	ldr	r0, [r7, r1, lsl #2]
-+	mov	pc, r9
-+ENDPROC(shmobile_smp_boot)
-+
-+ENTRY(shmobile_smp_sleep)
-+	wfi
-+	b	shmobile_smp_boot
-+ENDPROC(shmobile_smp_sleep)
-+
-+	.globl	shmobile_smp_mpidr
-+shmobile_smp_mpidr:
-+1:	.space	CONFIG_NR_CPUS * 4
-+	.globl	shmobile_smp_fn
-+shmobile_smp_fn:
-+2:	.space	CONFIG_NR_CPUS * 4
-+	.globl	shmobile_smp_arg
-+shmobile_smp_arg:
-+3:	.space	CONFIG_NR_CPUS * 4
-diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h
-index 2731dd71..7b938681 100644
---- a/arch/arm/mach-shmobile/include/mach/common.h
-+++ b/arch/arm/mach-shmobile/include/mach/common.h
-@@ -9,6 +9,10 @@ extern void shmobile_setup_console(void);
- extern void shmobile_boot_vector(void);
- extern unsigned long shmobile_boot_fn;
- extern unsigned long shmobile_boot_arg;
-+extern void shmobile_smp_boot(void);
-+extern void shmobile_smp_sleep(void);
-+extern void shmobile_smp_hook(unsigned int cpu, unsigned long fn,
-+			      unsigned long arg);
- extern void shmobile_boot_scu(void);
- extern void shmobile_smp_scu_prepare_cpus(unsigned int max_cpus);
- extern int shmobile_smp_scu_boot_secondary(unsigned int cpu,
-diff --git a/arch/arm/mach-shmobile/platsmp.c b/arch/arm/mach-shmobile/platsmp.c
-index 1f958d7b..d4ae616b 100644
---- a/arch/arm/mach-shmobile/platsmp.c
-+++ b/arch/arm/mach-shmobile/platsmp.c
-@@ -12,6 +12,9 @@
-  */
- #include <linux/init.h>
- #include <linux/smp.h>
-+#include <asm/cacheflush.h>
-+#include <asm/smp_plat.h>
-+#include <mach/common.h>
- 
- void __init shmobile_smp_init_cpus(unsigned int ncores)
- {
-@@ -26,3 +29,18 @@ void __init shmobile_smp_init_cpus(unsigned int ncores)
- 	for (i = 0; i < ncores; i++)
- 		set_cpu_possible(i, true);
- }
-+
-+extern unsigned long shmobile_smp_fn[];
-+extern unsigned long shmobile_smp_arg[];
-+extern unsigned long shmobile_smp_mpidr[];
-+
-+void shmobile_smp_hook(unsigned int cpu, unsigned long fn, unsigned long arg)
-+{
-+	shmobile_smp_fn[cpu] = 0;
-+	flush_cache_all();
-+
-+	shmobile_smp_mpidr[cpu] = cpu_logical_map(cpu);
-+	shmobile_smp_fn[cpu] = fn;
-+	shmobile_smp_arg[cpu] = arg;
-+	flush_cache_all();
-+}
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0473-ARM-shmobile-Per-CPU-SMP-boot-sleep-code-for-SCU-SoC.patch b/patches.renesas/0473-ARM-shmobile-Per-CPU-SMP-boot-sleep-code-for-SCU-SoC.patch
deleted file mode 100644
index 94cf95bcfcc10..0000000000000
--- a/patches.renesas/0473-ARM-shmobile-Per-CPU-SMP-boot-sleep-code-for-SCU-SoC.patch
+++ /dev/null
@@ -1,69 +0,0 @@
-From 48fff0acf4211af07e5f7cf4fe66d695ec7628f2 Mon Sep 17 00:00:00 2001
-From: Magnus Damm <damm@opensource.se>
-Date: Thu, 1 Aug 2013 03:38:27 +0900
-Subject: ARM: shmobile: Per-CPU SMP boot / sleep code for SCU SoCs
-
-Hook in the per-CPU boot and sleep code in the shared
-mach-shmobile SCU code. CPUs may be kept in the asm
-routine until ->boot_secondary() when the per-CPU
-boot vector is installed. At the end of ->die() the
-asm sleep routine is invoked.
-
-Signed-off-by: Magnus Damm <damm@opensource.se>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 1d33a354bbb618ba578bb372ebc18fe58457f6f3)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/platsmp-scu.c | 17 +++++++++++------
- 1 file changed, 11 insertions(+), 6 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/platsmp-scu.c b/arch/arm/mach-shmobile/platsmp-scu.c
-index 7a0c066d..c96f5016 100644
---- a/arch/arm/mach-shmobile/platsmp-scu.c
-+++ b/arch/arm/mach-shmobile/platsmp-scu.c
-@@ -18,8 +18,9 @@
- 
- void __init shmobile_smp_scu_prepare_cpus(unsigned int max_cpus)
- {
--	shmobile_boot_fn = virt_to_phys(shmobile_boot_scu);
--	shmobile_boot_arg = (unsigned long)shmobile_scu_base;
-+	/* install boot code shared by all CPUs */
-+	shmobile_boot_fn = virt_to_phys(shmobile_smp_boot);
-+	shmobile_boot_arg = MPIDR_HWID_BITMASK;
- 
- 	/* enable SCU and cache coherency on booting CPU */
- 	scu_enable(shmobile_scu_base);
-@@ -28,22 +29,26 @@ void __init shmobile_smp_scu_prepare_cpus(unsigned int max_cpus)
- 
- int shmobile_smp_scu_boot_secondary(unsigned int cpu, struct task_struct *idle)
- {
--	/* do nothing for now */
-+	/* For this particular CPU register SCU boot vector */
-+	shmobile_smp_hook(cpu, virt_to_phys(shmobile_boot_scu),
-+			  (unsigned long)shmobile_scu_base);
- 	return 0;
- }
- 
- #ifdef CONFIG_HOTPLUG_CPU
- void shmobile_smp_scu_cpu_die(unsigned int cpu)
- {
-+	/* For this particular CPU deregister boot vector */
-+	shmobile_smp_hook(cpu, 0, 0);
-+
- 	dsb();
- 	flush_cache_all();
- 
- 	/* disable cache coherency */
- 	scu_power_mode(shmobile_scu_base, SCU_PM_POWEROFF);
- 
--	/* Endless loop until reset */
--	while (1)
--		cpu_do_idle();
-+	/* jump to shared mach-shmobile sleep / reset code */
-+	shmobile_smp_sleep();
- }
- 
- static int shmobile_smp_scu_psr_core_disabled(int cpu)
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0474-ARM-shmobile-ape6evm-support-GPIO-switches.patch b/patches.renesas/0474-ARM-shmobile-ape6evm-support-GPIO-switches.patch
deleted file mode 100644
index 291660f8f230c..0000000000000
--- a/patches.renesas/0474-ARM-shmobile-ape6evm-support-GPIO-switches.patch
+++ /dev/null
@@ -1,67 +0,0 @@
-From 5abcb2fab84d9514f3a009d65ed997e1af986955 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Tue, 30 Jul 2013 10:59:00 +0900
-Subject: ARM: shmobile: ape6evm: support GPIO switches
-
-The ape6evm board has switches S16 - S23 wired up to GPIO pins.
-This patch allows access to those pins as gpio-keys.
-
-Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 5c6db1a421c6ceef199a956c7e0c1244ea6dfef7)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-ape6evm.c | 23 +++++++++++++++++++++++
- 1 file changed, 23 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/board-ape6evm.c b/arch/arm/mach-shmobile/board-ape6evm.c
-index 7f3d85bc..19394286 100644
---- a/arch/arm/mach-shmobile/board-ape6evm.c
-+++ b/arch/arm/mach-shmobile/board-ape6evm.c
-@@ -19,6 +19,8 @@
-  */
- 
- #include <linux/gpio.h>
-+#include <linux/gpio_keys.h>
-+#include <linux/input.h>
- #include <linux/interrupt.h>
- #include <linux/kernel.h>
- #include <linux/mfd/tmio.h>
-@@ -37,6 +39,24 @@
- #include <asm/mach-types.h>
- #include <asm/mach/arch.h>
- 
-+/* GPIO KEY */
-+#define GPIO_KEY(c, g, d, ...) \
-+	{ .code = c, .gpio = g, .desc = d, .active_low = 1 }
-+
-+static struct gpio_keys_button gpio_buttons[] = {
-+	GPIO_KEY(KEY_0,			324,	"S16"),
-+	GPIO_KEY(KEY_MENU,		325,	"S17"),
-+	GPIO_KEY(KEY_HOME,		326,	"S18"),
-+	GPIO_KEY(KEY_BACK,		327,	"S19"),
-+	GPIO_KEY(KEY_VOLUMEUP,		328,	"S20"),
-+	GPIO_KEY(KEY_VOLUMEDOWN,	329,	"S21"),
-+};
-+
-+static struct __initdata gpio_keys_platform_data ape6evm_keys_pdata = {
-+	.buttons	= gpio_buttons,
-+	.nbuttons	= ARRAY_SIZE(gpio_buttons),
-+};
-+
- /* Dummy supplies, where voltage doesn't matter */
- static struct regulator_consumer_supply dummy_supplies[] = {
- 	REGULATOR_SUPPLY("vddvario", "smsc911x"),
-@@ -172,6 +192,9 @@ static void __init ape6evm_add_standard_devices(void)
- 	platform_device_register_resndata(&platform_bus, "sh_mobile_sdhi", 1,
- 					  sdhi1_resources, ARRAY_SIZE(sdhi1_resources),
- 					  &sdhi1_pdata, sizeof(sdhi1_pdata));
-+	platform_device_register_data(&platform_bus, "gpio-keys", -1,
-+				      &ape6evm_keys_pdata,
-+				      sizeof(ape6evm_keys_pdata));
- }
- 
- static const char *ape6evm_boards_compat_dt[] __initdata = {
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0475-ARM-shmobile-ape6evm-Add-GPIO-LEDs.patch b/patches.renesas/0475-ARM-shmobile-ape6evm-Add-GPIO-LEDs.patch
deleted file mode 100644
index a833a4d41b9eb..0000000000000
--- a/patches.renesas/0475-ARM-shmobile-ape6evm-Add-GPIO-LEDs.patch
+++ /dev/null
@@ -1,74 +0,0 @@
-From eb0a75cb81fae8eea8edab7df90c3d4e5c3ee82f Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Tue, 30 Jul 2013 10:59:02 +0900
-Subject: ARM: shmobile: ape6evm: Add GPIO LEDs
-
-The board has 6 LEDs connected to GPIOs. Add a led-gpio device to
-support them.
-
-Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 9adad788583c735eb14ddd5cca79a4e2ca2d707c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-ape6evm.c | 37 ++++++++++++++++++++++++++++++++++
- 1 file changed, 37 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/board-ape6evm.c b/arch/arm/mach-shmobile/board-ape6evm.c
-index 19394286..24b87eea 100644
---- a/arch/arm/mach-shmobile/board-ape6evm.c
-+++ b/arch/arm/mach-shmobile/board-ape6evm.c
-@@ -39,6 +39,40 @@
- #include <asm/mach-types.h>
- #include <asm/mach/arch.h>
- 
-+/* LEDS */
-+static struct gpio_led ape6evm_leds[] = {
-+	{
-+		.name		= "gnss-en",
-+		.gpio		= 28,
-+		.default_state	= LEDS_GPIO_DEFSTATE_OFF,
-+	}, {
-+		.name		= "nfc-nrst",
-+		.gpio		= 126,
-+		.default_state	= LEDS_GPIO_DEFSTATE_OFF,
-+	}, {
-+		.name		= "gnss-nrst",
-+		.gpio		= 132,
-+		.default_state	= LEDS_GPIO_DEFSTATE_OFF,
-+	}, {
-+		.name		= "bt-wakeup",
-+		.gpio		= 232,
-+		.default_state	= LEDS_GPIO_DEFSTATE_OFF,
-+	}, {
-+		.name		= "strobe",
-+		.gpio		= 250,
-+		.default_state	= LEDS_GPIO_DEFSTATE_OFF,
-+	}, {
-+		.name		= "bbresetout",
-+		.gpio		= 288,
-+		.default_state	= LEDS_GPIO_DEFSTATE_OFF,
-+	},
-+};
-+
-+static __initdata struct gpio_led_platform_data ape6evm_leds_pdata = {
-+	.leds		= ape6evm_leds,
-+	.num_leds	= ARRAY_SIZE(ape6evm_leds),
-+};
-+
- /* GPIO KEY */
- #define GPIO_KEY(c, g, d, ...) \
- 	{ .code = c, .gpio = g, .desc = d, .active_low = 1 }
-@@ -195,6 +229,9 @@ static void __init ape6evm_add_standard_devices(void)
- 	platform_device_register_data(&platform_bus, "gpio-keys", -1,
- 				      &ape6evm_keys_pdata,
- 				      sizeof(ape6evm_keys_pdata));
-+	platform_device_register_data(&platform_bus, "leds-gpio", -1,
-+				      &ape6evm_leds_pdata,
-+				      sizeof(ape6evm_leds_pdata));
- }
- 
- static const char *ape6evm_boards_compat_dt[] __initdata = {
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0476-ARM-shmobile-lager-enable-Ether.patch b/patches.renesas/0476-ARM-shmobile-lager-enable-Ether.patch
deleted file mode 100644
index 5c6285f8b0c64..0000000000000
--- a/patches.renesas/0476-ARM-shmobile-lager-enable-Ether.patch
+++ /dev/null
@@ -1,77 +0,0 @@
-From 5513c831f7f4e16340e1ea0dee037ef1fbf5a833 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Tue, 6 Aug 2013 16:50:10 +0900
-Subject: ARM: shmobile: lager: enable Ether
-
-Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 4901e136aa5c35873701156c4c0af5b3c2c8faee)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-lager.c | 29 +++++++++++++++++++++++++++++
- 1 file changed, 29 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
-index aa8be240..4872939c 100644
---- a/arch/arm/mach-shmobile/board-lager.c
-+++ b/arch/arm/mach-shmobile/board-lager.c
-@@ -31,6 +31,7 @@
- #include <linux/platform_device.h>
- #include <linux/regulator/fixed.h>
- #include <linux/regulator/machine.h>
-+#include <linux/sh_eth.h>
- #include <mach/common.h>
- #include <mach/irqs.h>
- #include <mach/r8a7790.h>
-@@ -91,6 +92,20 @@ static struct resource mmcif1_resources[] __initdata = {
- 	DEFINE_RES_IRQ(gic_spi(170)),
- };
- 
-+/* Ether */
-+static struct sh_eth_plat_data ether_pdata __initdata = {
-+	.phy			= 0x1,
-+	.edmac_endian		= EDMAC_LITTLE_ENDIAN,
-+	.register_type		= SH_ETH_REG_FAST_RCAR,
-+	.phy_interface		= PHY_INTERFACE_MODE_RMII,
-+	.ether_link_active_low	= 1,
-+};
-+
-+static struct resource ether_resources[] __initdata = {
-+	DEFINE_RES_MEM(0xee700000, 0x400),
-+	DEFINE_RES_IRQ(gic_spi(162)),
-+};
-+
- static const struct pinctrl_map lager_pinctrl_map[] = {
- 	/* SCIF0 (CN19: DEBUG SERIAL0) */
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.6", "pfc-r8a7790",
-@@ -103,6 +118,15 @@ static const struct pinctrl_map lager_pinctrl_map[] = {
- 				  "mmc1_data8", "mmc1"),
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.1", "pfc-r8a7790",
- 				  "mmc1_ctrl", "mmc1"),
-+	/* Ether */
-+	PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
-+				  "eth_link", "eth"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
-+				  "eth_mdio", "eth"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
-+				  "eth_rmii", "eth"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
-+				  "intc_irq0", "intc"),
- };
- 
- static void __init lager_add_standard_devices(void)
-@@ -125,6 +149,11 @@ static void __init lager_add_standard_devices(void)
- 	platform_device_register_resndata(&platform_bus, "sh_mmcif", 1,
- 					  mmcif1_resources, ARRAY_SIZE(mmcif1_resources),
- 					  &mmcif1_pdata, sizeof(mmcif1_pdata));
-+
-+	platform_device_register_resndata(&platform_bus, "r8a7790-ether", -1,
-+					  ether_resources,
-+					  ARRAY_SIZE(ether_resources),
-+					  &ether_pdata, sizeof(ether_pdata));
- }
- 
- static const char *lager_boards_compat_dt[] __initdata = {
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0477-media-ARM-shmobile-r8a7778-add-VIN-support.patch b/patches.renesas/0477-media-ARM-shmobile-r8a7778-add-VIN-support.patch
deleted file mode 100644
index 0579aeb89b21c..0000000000000
--- a/patches.renesas/0477-media-ARM-shmobile-r8a7778-add-VIN-support.patch
+++ /dev/null
@@ -1,124 +0,0 @@
-From b103f1c92961ce58578d075876d16a06fd7504c1 Mon Sep 17 00:00:00 2001
-From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
-Date: Thu, 22 Aug 2013 17:36:36 -0300
-Subject: [media] ARM: shmobile: r8a7778: add VIN support
-
-Add VIN clocks and platform devices on R8A7778 SoC; add function to register
-the VIN platform devices.
-[Sergei: added 'id' parameter check to r8a7778_add_vin_device(), used '*pdata'
-in *sizeof* operator, and added an empty line there; renamed some variables,
-annotated 'vin[01]_info' and vin[01]_resources[] as '__initdata'.]
-
-Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Acked-by: Simon Horman <horms+renesas@verge.net.au>
-Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
-(cherry picked from commit 803c2df217525495fc440fc9b314b22427dc5db6)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-	arch/arm/mach-shmobile/clock-r8a7778.c
-	arch/arm/mach-shmobile/include/mach/r8a7778.h
-	arch/arm/mach-shmobile/setup-r8a7778.c
----
- arch/arm/mach-shmobile/clock-r8a7778.c        |  5 ++++
- arch/arm/mach-shmobile/include/mach/r8a7778.h |  3 +++
- arch/arm/mach-shmobile/setup-r8a7778.c        | 34 +++++++++++++++++++++++++++
- 3 files changed, 42 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a7778.c b/arch/arm/mach-shmobile/clock-r8a7778.c
-index 53798e50..dea199d4 100644
---- a/arch/arm/mach-shmobile/clock-r8a7778.c
-+++ b/arch/arm/mach-shmobile/clock-r8a7778.c
-@@ -106,6 +106,7 @@ enum {
- 	MSTP331,
- 	MSTP323, MSTP322, MSTP321,
- 	MSTP114,
-+	MSTP110, MSTP109,
- 	MSTP100,
- 	MSTP030,
- 	MSTP029, MSTP028, MSTP027, MSTP026, MSTP025, MSTP024, MSTP023, MSTP022, MSTP021,
-@@ -119,6 +120,8 @@ static struct clk mstp_clks[MSTP_NR] = {
- 	[MSTP322] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 22, 0), /* SDHI1 */
- 	[MSTP321] = SH_CLK_MSTP32(&p_clk, MSTPCR3, 21, 0), /* SDHI2 */
- 	[MSTP114] = SH_CLK_MSTP32(&p_clk, MSTPCR1, 14, 0), /* Ether */
-+	[MSTP110] = SH_CLK_MSTP32(&s_clk, MSTPCR1, 10, 0), /* VIN0 */
-+	[MSTP109] = SH_CLK_MSTP32(&s_clk, MSTPCR1,  9, 0), /* VIN1 */
- 	[MSTP100] = SH_CLK_MSTP32(&p_clk, MSTPCR1,  0, 0), /* USB0/1 */
- 	[MSTP030] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 30, 0), /* I2C0 */
- 	[MSTP029] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 29, 0), /* I2C1 */
-@@ -146,6 +149,8 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP322]), /* SDHI1 */
- 	CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP321]), /* SDHI2 */
- 	CLKDEV_DEV_ID("sh-eth",	&mstp_clks[MSTP114]), /* Ether */
-+	CLKDEV_DEV_ID("r8a7778-vin.0", &mstp_clks[MSTP110]), /* VIN0 */
-+	CLKDEV_DEV_ID("r8a7778-vin.1", &mstp_clks[MSTP109]), /* VIN1 */
- 	CLKDEV_DEV_ID("ehci-platform", &mstp_clks[MSTP100]), /* USB EHCI port0/1 */
- 	CLKDEV_DEV_ID("ohci-platform", &mstp_clks[MSTP100]), /* USB OHCI port0/1 */
- 	CLKDEV_DEV_ID("i2c-rcar.0", &mstp_clks[MSTP030]), /* I2C0 */
-diff --git a/arch/arm/mach-shmobile/include/mach/r8a7778.h b/arch/arm/mach-shmobile/include/mach/r8a7778.h
-index 41fd6da2..adfcf51b 100644
---- a/arch/arm/mach-shmobile/include/mach/r8a7778.h
-+++ b/arch/arm/mach-shmobile/include/mach/r8a7778.h
-@@ -19,10 +19,13 @@
- #define __ASM_R8A7778_H__
- 
- #include <linux/sh_eth.h>
-+#include <linux/platform_data/camera-rcar.h>
- 
- extern void r8a7778_add_standard_devices(void);
- extern void r8a7778_add_standard_devices_dt(void);
- extern void r8a7778_add_ether_device(struct sh_eth_plat_data *pdata);
-+extern void r8a7778_add_vin_device(int id,
-+				   struct rcar_vin_platform_data *pdata);
- extern void r8a7778_add_dt_devices(void);
- 
- extern void r8a7778_init_late(void);
-diff --git a/arch/arm/mach-shmobile/setup-r8a7778.c b/arch/arm/mach-shmobile/setup-r8a7778.c
-index 604cf36b..6a2657eb 100644
---- a/arch/arm/mach-shmobile/setup-r8a7778.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7778.c
-@@ -281,6 +281,40 @@ void __init r8a7778_register_hspi(int id)
- 		hspi_resources + (2 * id), 2);
- }
- 
-+/* VIN */
-+#define R8A7778_VIN(idx)						\
-+static struct resource vin##idx##_resources[] __initdata = {		\
-+	DEFINE_RES_MEM(0xffc50000 + 0x1000 * (idx), 0x1000),		\
-+	DEFINE_RES_IRQ(gic_iid(0x5a)),					\
-+};									\
-+									\
-+static struct platform_device_info vin##idx##_info __initdata = {	\
-+	.parent		= &platform_bus,				\
-+	.name		= "r8a7778-vin",				\
-+	.id		= idx,						\
-+	.res		= vin##idx##_resources,				\
-+	.num_res	= ARRAY_SIZE(vin##idx##_resources),		\
-+	.dma_mask	= DMA_BIT_MASK(32),				\
-+}
-+
-+R8A7778_VIN(0);
-+R8A7778_VIN(1);
-+
-+static struct platform_device_info *vin_info_table[] __initdata = {
-+	&vin0_info,
-+	&vin1_info,
-+};
-+
-+void __init r8a7778_add_vin_device(int id, struct rcar_vin_platform_data *pdata)
-+{
-+	BUG_ON(id < 0 || id > 1);
-+
-+	vin_info_table[id]->data = pdata;
-+	vin_info_table[id]->size_data = sizeof(*pdata);
-+
-+	platform_device_register_full(vin_info_table[id]);
-+}
-+
- void __init r8a7778_add_dt_devices(void)
- {
- 	int i;
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0478-media-ARM-shmobile-BOCK-W-add-VIN-and-ML86V7667-supp.patch b/patches.renesas/0478-media-ARM-shmobile-BOCK-W-add-VIN-and-ML86V7667-supp.patch
deleted file mode 100644
index 3c053bd1026bf..0000000000000
--- a/patches.renesas/0478-media-ARM-shmobile-BOCK-W-add-VIN-and-ML86V7667-supp.patch
+++ /dev/null
@@ -1,107 +0,0 @@
-From 9cc7aa635dc2095543a2dcc9570477164cf07477 Mon Sep 17 00:00:00 2001
-From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
-Date: Thu, 22 Aug 2013 17:38:50 -0300
-Subject: [media] ARM: shmobile: BOCK-W: add VIN and ML86V7667 support
-
-Add ML86V7667 platform devices on BOCK-W board, configure VIN0/1 pins, and
-register VIN0/1 devices with the ML86V7667 specific platform data.
-[Sergei: some macro/comment cleanup; updated the copyrights, removed duplicate
-'sh_eth' driver being enabled before registering VIN1 due to a pin conflict,
-removed superfluous semicolon after iclink[01]_ml86v7667' initializer.]
-
-Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Acked-by: Simon Horman <horms+renesas@verge.net.au>
-Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
-(cherry picked from commit 9c43952d0f1e7da943cb697f902e5a0e62abfc63)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-	arch/arm/mach-shmobile/board-bockw.c
----
- arch/arm/mach-shmobile/board-bockw.c | 41 ++++++++++++++++++++++++++++++++++++
- 1 file changed, 41 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/board-bockw.c b/arch/arm/mach-shmobile/board-bockw.c
-index 255e97e5..127ad3a0 100644
---- a/arch/arm/mach-shmobile/board-bockw.c
-+++ b/arch/arm/mach-shmobile/board-bockw.c
-@@ -3,6 +3,7 @@
-  *
-  * Copyright (C) 2013  Renesas Solutions Corp.
-  * Copyright (C) 2013  Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-+ * Copyright (C) 2013  Cogent Embedded, Inc.
-  *
-  * This program is free software; you can redistribute it and/or modify
-  * it under the terms of the GNU General Public License as published by
-@@ -31,6 +32,7 @@
- #include <linux/smsc911x.h>
- #include <linux/spi/spi.h>
- #include <linux/spi/flash.h>
-+#include <media/soc_camera.h>
- #include <mach/common.h>
- #include <mach/irqs.h>
- #include <mach/r8a7778.h>
-@@ -161,6 +163,25 @@ static struct sh_mmcif_plat_data sh_mmcif_plat __initdata = {
- 			  MMC_CAP_NEEDS_POLL,
- };
- 
-+static struct rcar_vin_platform_data vin_platform_data __initdata = {
-+	.flags	= RCAR_VIN_BT656,
-+};
-+
-+/* In the default configuration both decoders reside on I2C bus 0 */
-+#define BOCKW_CAMERA(idx)						\
-+static struct i2c_board_info camera##idx##_info = {			\
-+	I2C_BOARD_INFO("ml86v7667", 0x41 + 2 * (idx)),			\
-+};									\
-+									\
-+static struct soc_camera_link iclink##idx##_ml86v7667 __initdata = {	\
-+	.bus_id		= idx,						\
-+	.i2c_adapter_id	= 0,						\
-+	.board_info	= &camera##idx##_info,				\
-+}
-+
-+BOCKW_CAMERA(0);
-+BOCKW_CAMERA(1);
-+
- static const struct pinctrl_map bockw_pinctrl_map[] = {
- 	/* Ether */
- 	PIN_MAP_MUX_GROUP_DEFAULT("r8a777x-ether", "pfc-r8a7778",
-@@ -192,6 +213,16 @@ static const struct pinctrl_map bockw_pinctrl_map[] = {
- 				  "sdhi0_cd", "sdhi0"),
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
- 				  "sdhi0_wp", "sdhi0"),
-+	/* VIN0 */
-+	PIN_MAP_MUX_GROUP_DEFAULT("r8a7778-vin.0", "pfc-r8a7778",
-+				  "vin0_clk", "vin0"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("r8a7778-vin.0", "pfc-r8a7778",
-+				  "vin0_data8", "vin0"),
-+	/* VIN1 */
-+	PIN_MAP_MUX_GROUP_DEFAULT("r8a7778-vin.1", "pfc-r8a7778",
-+				  "vin1_clk", "vin1"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("r8a7778-vin.1", "pfc-r8a7778",
-+				  "vin1_data8", "vin1"),
- };
- 
- #define FPGA	0x18200000
-@@ -206,6 +237,16 @@ static void __init bockw_init(void)
- 	r8a7778_init_irq_extpin(1);
- 	r8a7778_add_standard_devices();
- 	r8a7778_add_ether_device(&ether_platform_data);
-+	r8a7778_add_vin_device(0, &vin_platform_data);
-+	/* VIN1 has a pin conflict with Ether */
-+	if (!IS_ENABLED(CONFIG_SH_ETH))
-+		r8a7778_add_vin_device(1, &vin_platform_data);
-+	platform_device_register_data(&platform_bus, "soc-camera-pdrv", 0,
-+				      &iclink0_ml86v7667,
-+				      sizeof(iclink0_ml86v7667));
-+	platform_device_register_data(&platform_bus, "soc-camera-pdrv", 1,
-+				      &iclink1_ml86v7667,
-+				      sizeof(iclink1_ml86v7667));
- 
- 	i2c_register_board_info(0, i2c0_devices,
- 				ARRAY_SIZE(i2c0_devices));
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0479-media-ARM-shmobile-BOCK-W-enable-VIN-and-ML86V7667-i.patch b/patches.renesas/0479-media-ARM-shmobile-BOCK-W-enable-VIN-and-ML86V7667-i.patch
deleted file mode 100644
index e79e1650c85f1..0000000000000
--- a/patches.renesas/0479-media-ARM-shmobile-BOCK-W-enable-VIN-and-ML86V7667-i.patch
+++ /dev/null
@@ -1,38 +0,0 @@
-From bd72a6d8bdd24d2109a8da077cd9c4d7399651fc Mon Sep 17 00:00:00 2001
-From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
-Date: Thu, 22 Aug 2013 17:40:36 -0300
-Subject: [media] ARM: shmobile: BOCK-W: enable VIN and ML86V7667 in defconfig
-
-Add the VIN and ML86V7667 drivers to 'bockw_defconfig'.
-
-Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Acked-by: Simon Horman <horms+renesas@verge.net.au>
-Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
-(cherry picked from commit a3fbba0e39de102bcc65bcc66abeb73d3cf7f633)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/configs/bockw_defconfig | 7 +++++++
- 1 file changed, 7 insertions(+)
-
-diff --git a/arch/arm/configs/bockw_defconfig b/arch/arm/configs/bockw_defconfig
-index 845f5cdf..e7e94948 100644
---- a/arch/arm/configs/bockw_defconfig
-+++ b/arch/arm/configs/bockw_defconfig
-@@ -82,6 +82,13 @@ CONFIG_SERIAL_SH_SCI_CONSOLE=y
- # CONFIG_HWMON is not set
- CONFIG_I2C=y
- CONFIG_I2C_RCAR=y
-+CONFIG_MEDIA_SUPPORT=y
-+CONFIG_MEDIA_CAMERA_SUPPORT=y
-+CONFIG_V4L_PLATFORM_DRIVERS=y
-+CONFIG_SOC_CAMERA=y
-+CONFIG_VIDEO_RCAR_VIN=y
-+# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set
-+CONFIG_VIDEO_ML86V7667=y
- CONFIG_SPI=y
- CONFIG_SPI_SH_HSPI=y
- CONFIG_USB=y
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0480-media-ARM-shmobile-r8a7779-add-VIN-support.patch b/patches.renesas/0480-media-ARM-shmobile-r8a7779-add-VIN-support.patch
deleted file mode 100644
index 6f1102e8cff8e..0000000000000
--- a/patches.renesas/0480-media-ARM-shmobile-r8a7779-add-VIN-support.patch
+++ /dev/null
@@ -1,150 +0,0 @@
-From d70c8d1f461a5e8aed417399c7900883be15dac0 Mon Sep 17 00:00:00 2001
-From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
-Date: Thu, 22 Aug 2013 17:23:13 -0300
-Subject: [media] ARM: shmobile: r8a7779: add VIN support
-
-Add VIN clocks and platform devices for R8A7779 SoC; add function to register
-the VIN platform devices.
-[Sergei: added 'id' parameter check to r8a7779_add_vin_device(), used '*pdata'
-in *sizeof* operator there, renamed some variables, annotated vin[0-3]_resources
-[] and 'vin[0-3]_info' as '__initdata'.]
-
-Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Acked-by: Simon Horman <horms+renesas@verge.net.au>
-Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
-(cherry picked from commit 4714a0255eee45b87634ab28f8a7e66038f645ba)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-	arch/arm/mach-shmobile/clock-r8a7779.c
-	arch/arm/mach-shmobile/include/mach/r8a7779.h
-	arch/arm/mach-shmobile/setup-r8a7779.c
----
- arch/arm/mach-shmobile/clock-r8a7779.c        | 10 ++++++++
- arch/arm/mach-shmobile/include/mach/r8a7779.h |  3 +++
- arch/arm/mach-shmobile/setup-r8a7779.c        | 37 +++++++++++++++++++++++++++
- 3 files changed, 50 insertions(+)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a7779.c b/arch/arm/mach-shmobile/clock-r8a7779.c
-index 9daeb8c3..6070f3a4 100644
---- a/arch/arm/mach-shmobile/clock-r8a7779.c
-+++ b/arch/arm/mach-shmobile/clock-r8a7779.c
-@@ -112,7 +112,9 @@ static struct clk *main_clks[] = {
- };
- 
- enum { MSTP323, MSTP322, MSTP321, MSTP320,
-+	MSTP120,
- 	MSTP116, MSTP115, MSTP114,
-+	MSTP110, MSTP109, MSTP108,
- 	MSTP103, MSTP101, MSTP100,
- 	MSTP030,
- 	MSTP029, MSTP028, MSTP027, MSTP026, MSTP025, MSTP024, MSTP023, MSTP022, MSTP021,
-@@ -125,9 +127,13 @@ static struct clk mstp_clks[MSTP_NR] = {
- 	[MSTP322] = SH_CLK_MSTP32(&clkp_clk, MSTPCR3, 22, 0), /* SDHI1 */
- 	[MSTP321] = SH_CLK_MSTP32(&clkp_clk, MSTPCR3, 21, 0), /* SDHI2 */
- 	[MSTP320] = SH_CLK_MSTP32(&clkp_clk, MSTPCR3, 20, 0), /* SDHI3 */
-+	[MSTP120] = SH_CLK_MSTP32(&clks_clk, MSTPCR1, 20, 0), /* VIN3 */
- 	[MSTP116] = SH_CLK_MSTP32(&clkp_clk, MSTPCR1, 16, 0), /* PCIe */
- 	[MSTP115] = SH_CLK_MSTP32(&clkp_clk, MSTPCR1, 15, 0), /* SATA */
- 	[MSTP114] = SH_CLK_MSTP32(&clkp_clk, MSTPCR1, 14, 0), /* Ether */
-+	[MSTP110] = SH_CLK_MSTP32(&clks_clk, MSTPCR1, 10, 0), /* VIN0 */
-+	[MSTP109] = SH_CLK_MSTP32(&clks_clk, MSTPCR1,  9, 0), /* VIN1 */
-+	[MSTP108] = SH_CLK_MSTP32(&clks_clk, MSTPCR1,  8, 0), /* VIN2 */
- 	[MSTP103] = SH_CLK_MSTP32(&clks_clk, MSTPCR1,  3, 0), /* DU */
- 	[MSTP101] = SH_CLK_MSTP32(&clkp_clk, MSTPCR1,  1, 0), /* USB2 */
- 	[MSTP100] = SH_CLK_MSTP32(&clkp_clk, MSTPCR1,  0, 0), /* USB0/1 */
-@@ -162,10 +168,14 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_CON_ID("peripheral_clk",	&clkp_clk),
- 
- 	/* MSTP32 clocks */
-+	CLKDEV_DEV_ID("r8a7779-vin.3", &mstp_clks[MSTP120]), /* VIN3 */
- 	CLKDEV_DEV_ID("rcar-pcie", &mstp_clks[MSTP116]), /* PCIe */
- 	CLKDEV_DEV_ID("sata_rcar", &mstp_clks[MSTP115]), /* SATA */
- 	CLKDEV_DEV_ID("fc600000.sata", &mstp_clks[MSTP115]), /* SATA w/DT */
- 	CLKDEV_DEV_ID("sh-eth", &mstp_clks[MSTP114]), /* Ether */
-+	CLKDEV_DEV_ID("r8a7779-vin.0", &mstp_clks[MSTP110]), /* VIN0 */
-+	CLKDEV_DEV_ID("r8a7779-vin.1", &mstp_clks[MSTP109]), /* VIN1 */
-+	CLKDEV_DEV_ID("r8a7779-vin.2", &mstp_clks[MSTP108]), /* VIN2 */
- 	CLKDEV_DEV_ID("ehci-platform.1", &mstp_clks[MSTP101]), /* USB EHCI port2 */
- 	CLKDEV_DEV_ID("ohci-platform.1", &mstp_clks[MSTP101]), /* USB OHCI port2 */
- 	CLKDEV_DEV_ID("ehci-platform.0", &mstp_clks[MSTP100]), /* USB EHCI port0/1 */
-diff --git a/arch/arm/mach-shmobile/include/mach/r8a7779.h b/arch/arm/mach-shmobile/include/mach/r8a7779.h
-index f08d6ecf..11c74004 100644
---- a/arch/arm/mach-shmobile/include/mach/r8a7779.h
-+++ b/arch/arm/mach-shmobile/include/mach/r8a7779.h
-@@ -4,6 +4,7 @@
- #include <linux/sh_clk.h>
- #include <linux/pm_domain.h>
- #include <linux/sh_eth.h>
-+#include <linux/platform_data/camera-rcar.h>
- 
- struct platform_device;
- 
-@@ -32,6 +33,8 @@ extern void r8a7779_add_early_devices(void);
- extern void r8a7779_add_standard_devices(void);
- extern void r8a7779_add_standard_devices_dt(void);
- extern void r8a7779_add_ether_device(struct sh_eth_plat_data *pdata);
-+extern void r8a7779_add_vin_device(int idx,
-+				   struct rcar_vin_platform_data *pdata);
- extern void r8a7779_init_late(void);
- extern void r8a7779_clock_init(void);
- extern void r8a7779_pinmux_init(void);
-diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c
-index 6a993339..b5b2f787 100644
---- a/arch/arm/mach-shmobile/setup-r8a7779.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7779.c
-@@ -605,6 +605,33 @@ static struct resource ether_resources[] __initdata = {
- 	},
- };
- 
-+#define R8A7779_VIN(idx) \
-+static struct resource vin##idx##_resources[] __initdata = {		\
-+	DEFINE_RES_MEM(0xffc50000 + 0x1000 * (idx), 0x1000),		\
-+	DEFINE_RES_IRQ(gic_iid(0x5f + (idx))),				\
-+};									\
-+									\
-+static struct platform_device_info vin##idx##_info __initdata = {	\
-+	.parent		= &platform_bus,				\
-+	.name		= "r8a7779-vin",				\
-+	.id		= idx,						\
-+	.res		= vin##idx##_resources,				\
-+	.num_res	= ARRAY_SIZE(vin##idx##_resources),		\
-+	.dma_mask	= DMA_BIT_MASK(32),				\
-+}
-+
-+R8A7779_VIN(0);
-+R8A7779_VIN(1);
-+R8A7779_VIN(2);
-+R8A7779_VIN(3);
-+
-+static struct platform_device_info *vin_info_table[] __initdata = {
-+	&vin0_info,
-+	&vin1_info,
-+	&vin2_info,
-+	&vin3_info,
-+};
-+
- static struct platform_device *r8a7779_devices_dt[] __initdata = {
- 	&scif0_device,
- 	&scif1_device,
-@@ -648,6 +675,16 @@ void __init r8a7779_add_ether_device(struct sh_eth_plat_data *pdata)
- 					  pdata, sizeof(*pdata));
- }
- 
-+void __init r8a7779_add_vin_device(int id, struct rcar_vin_platform_data *pdata)
-+{
-+	BUG_ON(id < 0 || id > 3);
-+
-+	vin_info_table[id]->data = pdata;
-+	vin_info_table[id]->size_data = sizeof(*pdata);
-+
-+	platform_device_register_full(vin_info_table[id]);
-+}
-+
- /* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */
- void __init __weak r8a7779_register_twd(void) { }
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0481-media-ARM-shmobile-Marzen-add-VIN-and-ADV7180-suppor.patch b/patches.renesas/0481-media-ARM-shmobile-Marzen-add-VIN-and-ADV7180-suppor.patch
deleted file mode 100644
index 07fe4f310b9a2..0000000000000
--- a/patches.renesas/0481-media-ARM-shmobile-Marzen-add-VIN-and-ADV7180-suppor.patch
+++ /dev/null
@@ -1,117 +0,0 @@
-From 1219a94a13e065ee56bd0c6c863225a00c5c7409 Mon Sep 17 00:00:00 2001
-From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
-Date: Thu, 22 Aug 2013 17:25:25 -0300
-Subject: [media] ARM: shmobile: Marzen: add VIN and ADV7180 support
-
-Add ADV7180 platform devices on the Marzen board, configure VIN1/3 pins, and
-register VIN1/3 devices with the ADV7180 specific platform data.
-[Sergei: removed superfluous tabulation and inserted empty lines in the  macro
-definition, updated the copyrights, annotated VIN platform data as '__initdata']
-
-Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Acked-by: Simon Horman <horms+renesas@verge.net.au>
-Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
-(cherry picked from commit 7cef5e7fd1ab891bc59c269a1a55b8e8d8ca5bc8)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-	arch/arm/mach-shmobile/board-marzen.c
----
- arch/arm/mach-shmobile/board-marzen.c | 44 ++++++++++++++++++++++++++++++++++-
- 1 file changed, 43 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/board-marzen.c b/arch/arm/mach-shmobile/board-marzen.c
-index 3551b548..3f5044fd 100644
---- a/arch/arm/mach-shmobile/board-marzen.c
-+++ b/arch/arm/mach-shmobile/board-marzen.c
-@@ -1,8 +1,9 @@
- /*
-  * marzen board support
-  *
-- * Copyright (C) 2011  Renesas Solutions Corp.
-+ * Copyright (C) 2011, 2013  Renesas Solutions Corp.
-  * Copyright (C) 2011  Magnus Damm
-+ * Copyright (C) 2013  Cogent Embedded, Inc.
-  *
-  * This program is free software; you can redistribute it and/or modify
-  * it under the terms of the GNU General Public License as published by
-@@ -38,6 +39,7 @@
- #include <linux/mmc/host.h>
- #include <linux/mmc/sh_mobile_sdhi.h>
- #include <linux/mfd/tmio.h>
-+#include <media/soc_camera.h>
- #include <mach/r8a7779.h>
- #include <mach/common.h>
- #include <mach/irqs.h>
-@@ -197,6 +199,32 @@ static struct platform_device leds_device = {
- 	},
- };
- 
-+static struct rcar_vin_platform_data vin_platform_data __initdata = {
-+	.flags	= RCAR_VIN_BT656,
-+};
-+
-+#define MARZEN_CAMERA(idx)					\
-+static struct i2c_board_info camera##idx##_info = {		\
-+	I2C_BOARD_INFO("adv7180", 0x20 + (idx)),		\
-+};								\
-+								\
-+static struct soc_camera_link iclink##idx##_adv7180 = {		\
-+	.bus_id		= 1 + 2 * (idx),			\
-+	.i2c_adapter_id	= 0,					\
-+	.board_info	= &camera##idx##_info,			\
-+};								\
-+								\
-+static struct platform_device camera##idx##_device = {		\
-+	.name	= "soc-camera-pdrv",				\
-+	.id	= idx,						\
-+	.dev	= {						\
-+		.platform_data	= &iclink##idx##_adv7180,	\
-+	},							\
-+};
-+
-+MARZEN_CAMERA(0);
-+MARZEN_CAMERA(1);
-+
- static struct platform_device *marzen_devices[] __initdata = {
- 	&eth_device,
- 	&sdhi0_device,
-@@ -204,6 +232,8 @@ static struct platform_device *marzen_devices[] __initdata = {
- 	&hspi_device,
- 	&leds_device,
- 	&usb_phy,
-+	&camera0_device,
-+	&camera1_device,
- };
- 
- static const struct pinctrl_map marzen_pinctrl_map[] = {
-@@ -239,6 +269,16 @@ static const struct pinctrl_map marzen_pinctrl_map[] = {
- 	/* USB2 */
- 	PIN_MAP_MUX_GROUP_DEFAULT("ehci-platform.1", "pfc-r8a7779",
- 				  "usb2", "usb2"),
-+	/* VIN1 */
-+	PIN_MAP_MUX_GROUP_DEFAULT("r8a7779-vin.1", "pfc-r8a7779",
-+				  "vin1_clk", "vin1"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("r8a7779-vin.1", "pfc-r8a7779",
-+				  "vin1_data8", "vin1"),
-+	/* VIN3 */
-+	PIN_MAP_MUX_GROUP_DEFAULT("r8a7779-vin.3", "pfc-r8a7779",
-+				  "vin3_clk", "vin3"),
-+	PIN_MAP_MUX_GROUP_DEFAULT("r8a7779-vin.3", "pfc-r8a7779",
-+				  "vin3_data8", "vin3"),
- };
- 
- static void __init marzen_init(void)
-@@ -254,6 +294,8 @@ static void __init marzen_init(void)
- 	r8a7779_init_irq_extpin(1); /* IRQ1 as individual interrupt */
- 
- 	r8a7779_add_standard_devices();
-+	r8a7779_add_vin_device(1, &vin_platform_data);
-+	r8a7779_add_vin_device(3, &vin_platform_data);
- 	platform_add_devices(marzen_devices, ARRAY_SIZE(marzen_devices));
- }
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0482-media-ARM-shmobile-Marzen-enable-VIN-and-ADV7180-in-.patch b/patches.renesas/0482-media-ARM-shmobile-Marzen-enable-VIN-and-ADV7180-in-.patch
deleted file mode 100644
index fbb52d2ab812d..0000000000000
--- a/patches.renesas/0482-media-ARM-shmobile-Marzen-enable-VIN-and-ADV7180-in-.patch
+++ /dev/null
@@ -1,38 +0,0 @@
-From aa14a1a19729de1a8f9ad889306bd0a54bc333ee Mon Sep 17 00:00:00 2001
-From: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
-Date: Thu, 22 Aug 2013 17:27:08 -0300
-Subject: [media] ARM: shmobile: Marzen: enable VIN and ADV7180 in defconfig
-
-Add the VIN and ADV7180 drivers to 'marzen_defconfig'.
-
-Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Acked-by: Simon Horman <horms+renesas@verge.net.au>
-Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
-(cherry picked from commit e0c332c671e71941e0bd4a339972ee4af15df676)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/configs/marzen_defconfig | 7 +++++++
- 1 file changed, 7 insertions(+)
-
-diff --git a/arch/arm/configs/marzen_defconfig b/arch/arm/configs/marzen_defconfig
-index 82e4040b..000e9205 100644
---- a/arch/arm/configs/marzen_defconfig
-+++ b/arch/arm/configs/marzen_defconfig
-@@ -85,6 +85,13 @@ CONFIG_GPIO_RCAR=y
- CONFIG_THERMAL=y
- CONFIG_RCAR_THERMAL=y
- CONFIG_SSB=y
-+CONFIG_MEDIA_SUPPORT=y
-+CONFIG_MEDIA_CAMERA_SUPPORT=y
-+CONFIG_V4L_PLATFORM_DRIVERS=y
-+CONFIG_SOC_CAMERA=y
-+CONFIG_VIDEO_RCAR_VIN=y
-+# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set
-+CONFIG_VIDEO_ADV7180=y
- CONFIG_USB=y
- CONFIG_USB_RCAR_PHY=y
- CONFIG_MMC=y
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0483-ARM-shmobile-r8a7779-Update-early-timer-initialisati.patch b/patches.renesas/0483-ARM-shmobile-r8a7779-Update-early-timer-initialisati.patch
deleted file mode 100644
index 18ff2dc1e9c2a..0000000000000
--- a/patches.renesas/0483-ARM-shmobile-r8a7779-Update-early-timer-initialisati.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From b26590879c16fd9a9575d36796899d4cb73f4b99 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Thu, 8 Aug 2013 17:59:17 +0900
-Subject: ARM: shmobile: r8a7779: Update early timer initialisation order
-
-a894fcc2d01a89e6fe3da0845a4d80a5312e1124 ("ARM: smp_twd: Divorce smp_twd
-from local timer API") altered twd_local_timer_common_register() so that it
-may make use of late_timer_init.
-
-This is problematic on marzen with Magnus's recent patch "ARM: shmobile:
-marzen: Switch to DT_MACHINE_START" which switches marzen around to enable
-USE_OF and thus shmobile_timer_init(), which is registered as
-late_time_init by shmobile_earlytimer_init() stops being a no-op.
-
-As a work-around I have updated r8a7779_earlytimer_init() so that
-shmobile_earlytimer_init() is called after r8a7779_register_twd().
-Or in other words, the shmobile_earlytimer_init() setting of
-late_time_init overwrites that of twd_local_timer_common_register().
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Acked-by: Magnus Damm <damm@opensource.se>
-(cherry picked from commit 7658ea2fb57831c6836ffcfb20bcb84f3ff55dfb)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/setup-r8a7779.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c
-index b5b2f787..ecd0148e 100644
---- a/arch/arm/mach-shmobile/setup-r8a7779.c
-+++ b/arch/arm/mach-shmobile/setup-r8a7779.c
-@@ -691,8 +691,8 @@ void __init __weak r8a7779_register_twd(void) { }
- void __init r8a7779_earlytimer_init(void)
- {
- 	r8a7779_clock_init();
--	shmobile_earlytimer_init();
- 	r8a7779_register_twd();
-+	shmobile_earlytimer_init();
- }
- 
- void __init r8a7779_add_early_devices(void)
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0484-ARM-shmobile-lager-Do-not-use-register_type-field-of.patch b/patches.renesas/0484-ARM-shmobile-lager-Do-not-use-register_type-field-of.patch
deleted file mode 100644
index 8f234626479f3..0000000000000
--- a/patches.renesas/0484-ARM-shmobile-lager-Do-not-use-register_type-field-of.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From 30ffc33137dc46b2d6014ef8b50ba3907544dbd8 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Thu, 22 Aug 2013 16:36:38 +0900
-Subject: ARM: shmobile: lager: Do not use register_type field of struct
- sh_eth_plat_data
-
-As of 8d3214c ("sh_eth: remove 'register_type' field from 'struct
-sh_eth_plat_data'") is is no longer necessary or correct to use the
-'register_type' field from 'struct sh_eth_plat_data' and doing so results
-in a build error.
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Signed-off-by: Olof Johansson <olof@lixom.net>
-(cherry picked from commit 3a116a5eaa68046646e557b4988a49e18f129ce8)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-lager.c | 1 -
- 1 file changed, 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
-index 4872939c..ffb6f0ac 100644
---- a/arch/arm/mach-shmobile/board-lager.c
-+++ b/arch/arm/mach-shmobile/board-lager.c
-@@ -96,7 +96,6 @@ static struct resource mmcif1_resources[] __initdata = {
- static struct sh_eth_plat_data ether_pdata __initdata = {
- 	.phy			= 0x1,
- 	.edmac_endian		= EDMAC_LITTLE_ENDIAN,
--	.register_type		= SH_ETH_REG_FAST_RCAR,
- 	.phy_interface		= PHY_INTERFACE_MODE_RMII,
- 	.ether_link_active_low	= 1,
- };
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0485-ARM-shmobile-change-dev_id-to-cpu0-while-registering.patch b/patches.renesas/0485-ARM-shmobile-change-dev_id-to-cpu0-while-registering.patch
deleted file mode 100644
index e35de449b5bc0..0000000000000
--- a/patches.renesas/0485-ARM-shmobile-change-dev_id-to-cpu0-while-registering.patch
+++ /dev/null
@@ -1,52 +0,0 @@
-From 5c8722c5f7bceb1577c42b03cdd04bb441f55ecd Mon Sep 17 00:00:00 2001
-From: Sudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com>
-Date: Tue, 10 Sep 2013 18:59:49 +0100
-Subject: ARM: shmobile: change dev_id to cpu0 while registering cpu clock
-
-Currently all clkdev registration use "cpufreq-cpu0.0" as dev_id
-for cpu clock which refers to virtual platform device. It needs to
-be "cpu0" instead which is actual cpu0 device id.
-
-This patch changes the dev_id from "cpufreq-cpu0.0" to "cpu0".
-
-Reported-and-tested-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Cc: Shawn Guo <shawn.guo@linaro.org>
-Cc: Magnus Damm <damm@opensource.se>
-Signed-off-by: Sudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com>
-Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
-(cherry picked from commit e4a6a29d1250022a885123cc0a04bd176b508854)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/clock-r8a73a4.c | 2 +-
- arch/arm/mach-shmobile/clock-sh73a0.c  | 2 +-
- 2 files changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a73a4.c b/arch/arm/mach-shmobile/clock-r8a73a4.c
-index 8ea5ef6c..5bd2e851 100644
---- a/arch/arm/mach-shmobile/clock-r8a73a4.c
-+++ b/arch/arm/mach-shmobile/clock-r8a73a4.c
-@@ -555,7 +555,7 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_CON_ID("pll2h",			&pll2h_clk),
- 
- 	/* CPU clock */
--	CLKDEV_DEV_ID("cpufreq-cpu0",		&z_clk),
-+	CLKDEV_DEV_ID("cpu0",			&z_clk),
- 
- 	/* DIV6 */
- 	CLKDEV_CON_ID("zb",			&div6_clks[DIV6_ZB]),
-diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c
-index 1942eaef..c92c023f 100644
---- a/arch/arm/mach-shmobile/clock-sh73a0.c
-+++ b/arch/arm/mach-shmobile/clock-sh73a0.c
-@@ -616,7 +616,7 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_DEV_ID("smp_twd", &twd_clk), /* smp_twd */
- 
- 	/* DIV4 clocks */
--	CLKDEV_DEV_ID("cpufreq-cpu0", &div4_clks[DIV4_Z]),
-+	CLKDEV_DEV_ID("cpu0", &div4_clks[DIV4_Z]),
- 
- 	/* DIV6 clocks */
- 	CLKDEV_CON_ID("vck1_clk", &div6_clks[DIV6_VCK1]),
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0486-ARM-shmobile-Lager-add-Micrel-KSZ8041-PHY-fixup.patch b/patches.renesas/0486-ARM-shmobile-Lager-add-Micrel-KSZ8041-PHY-fixup.patch
deleted file mode 100644
index 75814c31147e9..0000000000000
--- a/patches.renesas/0486-ARM-shmobile-Lager-add-Micrel-KSZ8041-PHY-fixup.patch
+++ /dev/null
@@ -1,77 +0,0 @@
-From 10a564a4c2b4ec90b1cb77f15a229e46f7af02e7 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Sat, 14 Sep 2013 04:29:22 +0400
-Subject: ARM: shmobile: Lager: add Micrel KSZ8041 PHY fixup
-
-Currently on the Lager board NFS timeouts/delays are seen when booting.  That
-turned out to happen because the SoC's ETH_LINK signal turns on and off after
-each packet.  It is connected to Micrel KSZ8041 PHY's LED0 signal. Ether LEDs
-on the Lager board are named LINK and ACTIVE which corresponds to non-default
-01 setting of the PHY control register 1 bits 14-15. The 'sh_eth' driver resets
-the PHY when opening the network device, so we have to set the mentioned bits
-back to 01 from the default 00 value which causes bouncing of ETH_LINK.  That
-can be achieved using the PHY platform fixup mechanism if we also modify the
-driver to use it..
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 48c8b96f21817aad695246ef020b849d466cc502)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-lager.c | 27 ++++++++++++++++++++++++++-
- 1 file changed, 26 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c
-index ffb6f0ac..5930af8d 100644
---- a/arch/arm/mach-shmobile/board-lager.c
-+++ b/arch/arm/mach-shmobile/board-lager.c
-@@ -29,6 +29,7 @@
- #include <linux/pinctrl/machine.h>
- #include <linux/platform_data/gpio-rcar.h>
- #include <linux/platform_device.h>
-+#include <linux/phy.h>
- #include <linux/regulator/fixed.h>
- #include <linux/regulator/machine.h>
- #include <linux/sh_eth.h>
-@@ -155,6 +156,30 @@ static void __init lager_add_standard_devices(void)
- 					  &ether_pdata, sizeof(ether_pdata));
- }
- 
-+/*
-+ * Ether LEDs on the Lager board are named LINK and ACTIVE which corresponds
-+ * to non-default 01 setting of the Micrel KSZ8041 PHY control register 1 bits
-+ * 14-15. We have to set them back to 01 from the default 00 value each time
-+ * the PHY is reset. It's also important because the PHY's LED0 signal is
-+ * connected to SoC's ETH_LINK signal and in the PHY's default mode it will
-+ * bounce on and off after each packet, which we apparently want to avoid.
-+ */
-+static int lager_ksz8041_fixup(struct phy_device *phydev)
-+{
-+	u16 phyctrl1 = phy_read(phydev, 0x1e);
-+
-+	phyctrl1 &= ~0xc000;
-+	phyctrl1 |= 0x4000;
-+	return phy_write(phydev, 0x1e, phyctrl1);
-+}
-+
-+static void __init lager_init(void)
-+{
-+	lager_add_standard_devices();
-+
-+	phy_register_fixup_for_id("r8a7790-ether-ff:01", lager_ksz8041_fixup);
-+}
-+
- static const char *lager_boards_compat_dt[] __initdata = {
- 	"renesas,lager",
- 	NULL,
-@@ -163,6 +188,6 @@ static const char *lager_boards_compat_dt[] __initdata = {
- DT_MACHINE_START(LAGER_DT, "lager")
- 	.init_early	= r8a7790_init_delay,
- 	.init_time	= r8a7790_timer_init,
--	.init_machine	= lager_add_standard_devices,
-+	.init_machine	= lager_init,
- 	.dt_compat	= lager_boards_compat_dt,
- MACHINE_END
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0487-ARM-shmobile-armadillo-fixup-ether-pinctrl-naming.patch b/patches.renesas/0487-ARM-shmobile-armadillo-fixup-ether-pinctrl-naming.patch
deleted file mode 100644
index 567f0ec34944f..0000000000000
--- a/patches.renesas/0487-ARM-shmobile-armadillo-fixup-ether-pinctrl-naming.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 645c7ecb2552808a939ef8ae54d5f917991a15e2 Mon Sep 17 00:00:00 2001
-From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Date: Sun, 1 Sep 2013 20:33:49 -0700
-Subject: ARM: shmobile: armadillo: fixup ether pinctrl naming
-
-e5c9b4cd665106d9b5397114ea81a53059410b6a ("sh_eth: get R8A7740 support
-out of #ifdef") exchanged sh-eth driver name to r8a7740-gether, but,
-eva_pinctrl_map[] didn't follow it. Fixes it.
-
-Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 7cd402b30a701c2b4d38a98281a00fc5e3680b13)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/mach-shmobile/board-armadillo800eva.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c
-index 471440ba..2ef31a69 100644
---- a/arch/arm/mach-shmobile/board-armadillo800eva.c
-+++ b/arch/arm/mach-shmobile/board-armadillo800eva.c
-@@ -1108,9 +1108,9 @@ static const struct pinctrl_map eva_pinctrl_map[] = {
- 	PIN_MAP_MUX_GROUP_DEFAULT("asoc-simple-card.1", "pfc-r8a7740",
- 				  "fsib_mclk_in", "fsib"),
- 	/* GETHER */
--	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7740",
-+	PIN_MAP_MUX_GROUP_DEFAULT("r8a7740-gether", "pfc-r8a7740",
- 				  "gether_mii", "gether"),
--	PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7740",
-+	PIN_MAP_MUX_GROUP_DEFAULT("r8a7740-gether", "pfc-r8a7740",
- 				  "gether_int", "gether"),
- 	/* HDMI */
- 	PIN_MAP_MUX_GROUP_DEFAULT("sh-mobile-hdmi", "pfc-r8a7740",
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0488-ARM-shmobile-Remove-gpio-ranges-cells-DT-property.patch b/patches.renesas/0488-ARM-shmobile-Remove-gpio-ranges-cells-DT-property.patch
deleted file mode 100644
index 52eab1414eb28..0000000000000
--- a/patches.renesas/0488-ARM-shmobile-Remove-gpio-ranges-cells-DT-property.patch
+++ /dev/null
@@ -1,55 +0,0 @@
-From 85519ebc6a3e57a4d2bc00d184b6a615fa8f39d3 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 11 Sep 2013 15:51:02 +0200
-Subject: ARM: shmobile: Remove #gpio-ranges-cells DT property
-
-This property is no longer required by the GPIO binding. Remove it.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-(cherry picked from commit 3786f86b60833f32e3eeb016fcf8c324f8147e00)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/arm/boot/dts/r8a7778.dtsi | 1 -
- arch/arm/boot/dts/r8a7779.dtsi | 1 -
- arch/arm/boot/dts/r8a7790.dtsi | 1 -
- 3 files changed, 3 deletions(-)
-
-diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi
-index 45ac404a..3577aba8 100644
---- a/arch/arm/boot/dts/r8a7778.dtsi
-+++ b/arch/arm/boot/dts/r8a7778.dtsi
-@@ -96,6 +96,5 @@
- 	pfc: pfc@fffc0000 {
- 		compatible = "renesas,pfc-r8a7778";
- 		reg = <0xfffc000 0x118>;
--		#gpio-range-cells = <3>;
- 	};
- };
-diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi
-index 23a62447..ebbe507f 100644
---- a/arch/arm/boot/dts/r8a7779.dtsi
-+++ b/arch/arm/boot/dts/r8a7779.dtsi
-@@ -188,7 +188,6 @@
- 	pfc: pfc@fffc0000 {
- 		compatible = "renesas,pfc-r8a7779";
- 		reg = <0xfffc0000 0x23c>;
--		#gpio-range-cells = <3>;
- 	};
- 
- 	thermal@ffc48000 {
-diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
-index 3b879e7c..98513984 100644
---- a/arch/arm/boot/dts/r8a7790.dtsi
-+++ b/arch/arm/boot/dts/r8a7790.dtsi
-@@ -148,7 +148,6 @@
- 	pfc: pfc@e6060000 {
- 		compatible = "renesas,pfc-r8a7790";
- 		reg = <0 0xe6060000 0 0x250>;
--		#gpio-range-cells = <3>;
- 	};
- 
- 	sdhi0: sdhi@ee100000 {
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0489-sh_eth-remove-ifdef-around-EDSR-and-GECMR-bit-defini.patch b/patches.renesas/0489-sh_eth-remove-ifdef-around-EDSR-and-GECMR-bit-defini.patch
deleted file mode 100644
index 05c1d6cdce385..0000000000000
--- a/patches.renesas/0489-sh_eth-remove-ifdef-around-EDSR-and-GECMR-bit-defini.patch
+++ /dev/null
@@ -1,51 +0,0 @@
-From 9206105698487d79571b34225455363f8eaaf371 Mon Sep 17 00:00:00 2001
-From: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
-Date: Thu, 6 Jun 2013 09:43:16 +0000
-Subject: sh_eth: remove #ifdef around EDSR and GECMR bit definitions
-
-Remove #ifdef around 'enum EDSR_BIT' and 'enum GECMR_BIT', replacing it with the
-comments on which SoCs these registers exist.
-
-SH7757 also has EDSR, so add a comment about it to 'enum EDSR_BIT'.
-
-Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
-[Sergei: folded in the former patch #2, updated the changelog, reworded the
-subject, changing the prefix.]
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-
-(cherry picked from commit 41d5ffeb9d12f760722f00ba0756389d32435124)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/net/ethernet/renesas/sh_eth.h | 7 ++-----
- 1 file changed, 2 insertions(+), 5 deletions(-)
-
-diff --git a/drivers/net/ethernet/renesas/sh_eth.h b/drivers/net/ethernet/renesas/sh_eth.h
-index 62689a58..034bee94 100644
---- a/drivers/net/ethernet/renesas/sh_eth.h
-+++ b/drivers/net/ethernet/renesas/sh_eth.h
-@@ -166,19 +166,16 @@ enum {
- /*
-  * Register's bits
-  */
--#if defined(CONFIG_CPU_SUBTYPE_SH7734) || defined(CONFIG_CPU_SUBTYPE_SH7763) ||\
--    defined(CONFIG_ARCH_R8A7740)
--/* EDSR */
-+/* EDSR : sh7734, sh7757, sh7763, and r8a7740 only */
- enum EDSR_BIT {
- 	EDSR_ENT = 0x01, EDSR_ENR = 0x02,
- };
- #define EDSR_ENALL (EDSR_ENT|EDSR_ENR)
- 
--/* GECMR */
-+/* GECMR : sh7734, sh7763 and r8a7740 only */
- enum GECMR_BIT {
- 	GECMR_10 = 0x0, GECMR_100 = 0x04, GECMR_1000 = 0x01,
- };
--#endif
- 
- /* EDMR */
- enum DMAC_M_BIT {
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0490-sh_eth-use-EDSR_ENALL-to-set-EDSR.patch b/patches.renesas/0490-sh_eth-use-EDSR_ENALL-to-set-EDSR.patch
deleted file mode 100644
index 4dc8a306d417a..0000000000000
--- a/patches.renesas/0490-sh_eth-use-EDSR_ENALL-to-set-EDSR.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From 48b354ed45d89cc15417e4c15ca71985c96b7370 Mon Sep 17 00:00:00 2001
-From: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
-Date: Thu, 6 Jun 2013 09:44:27 +0000
-Subject: sh_eth: use EDSR_ENALL to set EDSR
-
-Use now always available EDSR_ENALL instead of the bare number to set EDSR.
-
-Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
-[Sergei: added the changelog, reworded the subject, changing the prefix.]
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-
-(cherry picked from commit ddcd91c6b8ec60a6bd5d3691d2cfaf4447215da1)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/net/ethernet/renesas/sh_eth.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
-index e29fe8db..fd3f99f8 100644
---- a/drivers/net/ethernet/renesas/sh_eth.c
-+++ b/drivers/net/ethernet/renesas/sh_eth.c
-@@ -526,7 +526,7 @@ static int sh_eth_reset(struct net_device *ndev)
- 	int ret = 0;
- 
- 	if (sh_eth_is_gether(mdp)) {
--		sh_eth_write(ndev, 0x03, EDSR);
-+		sh_eth_write(ndev, EDSR_ENALL, EDSR);
- 		sh_eth_write(ndev, sh_eth_read(ndev, EDMR) | EDMR_SRST_GETHER,
- 				EDMR);
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0491-sh_eth-remove-duplicate-sh_eth_set_duplex-definition.patch b/patches.renesas/0491-sh_eth-remove-duplicate-sh_eth_set_duplex-definition.patch
deleted file mode 100644
index e74cd0ebe16cf..0000000000000
--- a/patches.renesas/0491-sh_eth-remove-duplicate-sh_eth_set_duplex-definition.patch
+++ /dev/null
@@ -1,143 +0,0 @@
-From e2ccda73a0d8f4ada60370ed9d08973976605cbf Mon Sep 17 00:00:00 2001
-From: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
-Date: Thu, 6 Jun 2013 09:45:25 +0000
-Subject: sh_eth: remove duplicate sh_eth_set_duplex() definitions
-
-Remove all the duplicate definitions of sh_eth_set_duplex() under  different
-#ifdef's, leaving only one outside the #ifdef's. We have to annotate it with
-'__maybe_unused' since it's called not from all SoC #ifdef blocks.
-
-Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
-[Sergei: annotated sh_eth_set_duplex() as '__maybe_unused', added the changelog,
-reworded the subject, changing the prefix.]
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-
-(cherry picked from commit 04b0ed2ad49834fe47d3c4171ad189c688a222b9)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/net/ethernet/renesas/sh_eth.c | 59 +++--------------------------------
- 1 file changed, 5 insertions(+), 54 deletions(-)
-
-diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
-index fd3f99f8..1dba3c9d 100644
---- a/drivers/net/ethernet/renesas/sh_eth.c
-+++ b/drivers/net/ethernet/renesas/sh_eth.c
-@@ -341,10 +341,7 @@ static void sh_eth_select_mii(struct net_device *ndev)
- }
- #endif
- 
--/* There is CPU dependent code */
--#if defined(CONFIG_ARCH_R8A7778) || defined(CONFIG_ARCH_R8A7779)
--#define SH_ETH_RESET_DEFAULT	1
--static void sh_eth_set_duplex(struct net_device *ndev)
-+static void __maybe_unused sh_eth_set_duplex(struct net_device *ndev)
- {
- 	struct sh_eth_private *mdp = netdev_priv(ndev);
- 
-@@ -354,6 +351,9 @@ static void sh_eth_set_duplex(struct net_device *ndev)
- 		sh_eth_write(ndev, sh_eth_read(ndev, ECMR) & ~ECMR_DM, ECMR);
- }
- 
-+/* There is CPU dependent code */
-+#if defined(CONFIG_ARCH_R8A7778) || defined(CONFIG_ARCH_R8A7779)
-+#define SH_ETH_RESET_DEFAULT	1
- static void sh_eth_set_rate(struct net_device *ndev)
- {
- 	struct sh_eth_private *mdp = netdev_priv(ndev);
-@@ -392,15 +392,6 @@ static struct sh_eth_cpu_data sh_eth_my_cpu_data = {
- };
- #elif defined(CONFIG_CPU_SUBTYPE_SH7724)
- #define SH_ETH_RESET_DEFAULT	1
--static void sh_eth_set_duplex(struct net_device *ndev)
--{
--	struct sh_eth_private *mdp = netdev_priv(ndev);
--
--	if (mdp->duplex) /* Full */
--		sh_eth_write(ndev, sh_eth_read(ndev, ECMR) | ECMR_DM, ECMR);
--	else		/* Half */
--		sh_eth_write(ndev, sh_eth_read(ndev, ECMR) & ~ECMR_DM, ECMR);
--}
- 
- static void sh_eth_set_rate(struct net_device *ndev)
- {
-@@ -445,16 +436,6 @@ static struct sh_eth_cpu_data sh_eth_my_cpu_data = {
- #define SH_ETH_HAS_TSU	1
- static int sh_eth_check_reset(struct net_device *ndev);
- 
--static void sh_eth_set_duplex(struct net_device *ndev)
--{
--	struct sh_eth_private *mdp = netdev_priv(ndev);
--
--	if (mdp->duplex) /* Full */
--		sh_eth_write(ndev, sh_eth_read(ndev, ECMR) | ECMR_DM, ECMR);
--	else		/* Half */
--		sh_eth_write(ndev, sh_eth_read(ndev, ECMR) & ~ECMR_DM, ECMR);
--}
--
- static void sh_eth_set_rate(struct net_device *ndev)
- {
- 	struct sh_eth_private *mdp = netdev_priv(ndev);
-@@ -555,16 +536,6 @@ out:
- 	return ret;
- }
- 
--static void sh_eth_set_duplex_giga(struct net_device *ndev)
--{
--	struct sh_eth_private *mdp = netdev_priv(ndev);
--
--	if (mdp->duplex) /* Full */
--		sh_eth_write(ndev, sh_eth_read(ndev, ECMR) | ECMR_DM, ECMR);
--	else		/* Half */
--		sh_eth_write(ndev, sh_eth_read(ndev, ECMR) & ~ECMR_DM, ECMR);
--}
--
- static void sh_eth_set_rate_giga(struct net_device *ndev)
- {
- 	struct sh_eth_private *mdp = netdev_priv(ndev);
-@@ -587,7 +558,7 @@ static void sh_eth_set_rate_giga(struct net_device *ndev)
- /* SH7757(GETHERC) */
- static struct sh_eth_cpu_data sh_eth_my_cpu_data_giga = {
- 	.chip_reset	= sh_eth_chip_reset_giga,
--	.set_duplex	= sh_eth_set_duplex_giga,
-+	.set_duplex	= sh_eth_set_duplex,
- 	.set_rate	= sh_eth_set_rate_giga,
- 
- 	.ecsr_value	= ECSR_ICD | ECSR_MPD,
-@@ -637,16 +608,6 @@ static void sh_eth_chip_reset(struct net_device *ndev)
- 	mdelay(1);
- }
- 
--static void sh_eth_set_duplex(struct net_device *ndev)
--{
--	struct sh_eth_private *mdp = netdev_priv(ndev);
--
--	if (mdp->duplex) /* Full */
--		sh_eth_write(ndev, sh_eth_read(ndev, ECMR) | ECMR_DM, ECMR);
--	else		/* Half */
--		sh_eth_write(ndev, sh_eth_read(ndev, ECMR) & ~ECMR_DM, ECMR);
--}
--
- static void sh_eth_set_rate(struct net_device *ndev)
- {
- 	struct sh_eth_private *mdp = netdev_priv(ndev);
-@@ -774,16 +735,6 @@ out:
- 	return ret;
- }
- 
--static void sh_eth_set_duplex(struct net_device *ndev)
--{
--	struct sh_eth_private *mdp = netdev_priv(ndev);
--
--	if (mdp->duplex) /* Full */
--		sh_eth_write(ndev, sh_eth_read(ndev, ECMR) | ECMR_DM, ECMR);
--	else		/* Half */
--		sh_eth_write(ndev, sh_eth_read(ndev, ECMR) & ~ECMR_DM, ECMR);
--}
--
- static void sh_eth_set_rate(struct net_device *ndev)
- {
- 	struct sh_eth_private *mdp = netdev_priv(ndev);
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0492-sh_eth-remove-SH_ETH_HAS_TSU.patch b/patches.renesas/0492-sh_eth-remove-SH_ETH_HAS_TSU.patch
deleted file mode 100644
index 3567ab2c1c4ef..0000000000000
--- a/patches.renesas/0492-sh_eth-remove-SH_ETH_HAS_TSU.patch
+++ /dev/null
@@ -1,108 +0,0 @@
-From f034001aeab26d3c9a71bf136dac4878ec8f4011 Mon Sep 17 00:00:00 2001
-From: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
-Date: Thu, 6 Jun 2013 09:48:09 +0000
-Subject: sh_eth: remove SH_ETH_HAS_TSU
-
-Remove SH_ETH_HAS_TSU #define's and #ifdef's. Set three 'struct net_device_ops'
-methods that depend on the presence of TSU basing on the 'tsu' field of 'struct
-sh_eth_cpu_data'.
-
-Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
-[Sergei: made two method assignments one-liners, added the changelog, reworded
-the subject, changing the prefix.]
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-
-(cherry picked from commit 9f86134155047720a3685cda21467f68695152d2)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/net/ethernet/renesas/sh_eth.c | 20 ++++++++------------
- 1 file changed, 8 insertions(+), 12 deletions(-)
-
-diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
-index 1dba3c9d..c821339a 100644
---- a/drivers/net/ethernet/renesas/sh_eth.c
-+++ b/drivers/net/ethernet/renesas/sh_eth.c
-@@ -433,7 +433,6 @@ static struct sh_eth_cpu_data sh_eth_my_cpu_data = {
- };
- #elif defined(CONFIG_CPU_SUBTYPE_SH7757)
- #define SH_ETH_HAS_BOTH_MODULES	1
--#define SH_ETH_HAS_TSU	1
- static int sh_eth_check_reset(struct net_device *ndev);
- 
- static void sh_eth_set_rate(struct net_device *ndev)
-@@ -595,7 +594,6 @@ static struct sh_eth_cpu_data *sh_eth_get_cpu_data(struct sh_eth_private *mdp)
- }
- 
- #elif defined(CONFIG_CPU_SUBTYPE_SH7734) || defined(CONFIG_CPU_SUBTYPE_SH7763)
--#define SH_ETH_HAS_TSU	1
- static int sh_eth_check_reset(struct net_device *ndev);
- static void sh_eth_reset_hw_crc(struct net_device *ndev);
- 
-@@ -696,7 +694,6 @@ static void sh_eth_reset_hw_crc(struct net_device *ndev)
- }
- 
- #elif defined(CONFIG_ARCH_R8A7740)
--#define SH_ETH_HAS_TSU	1
- static int sh_eth_check_reset(struct net_device *ndev);
- 
- static void sh_eth_chip_reset(struct net_device *ndev)
-@@ -794,7 +791,6 @@ static struct sh_eth_cpu_data sh_eth_my_cpu_data = {
- };
- #elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
- #define SH_ETH_RESET_DEFAULT	1
--#define SH_ETH_HAS_TSU	1
- static struct sh_eth_cpu_data sh_eth_my_cpu_data = {
- 	.eesipr_value	= DMAC_M_RFRMER | DMAC_M_ECI | 0x003fffff,
- 	.tsu		= 1,
-@@ -2116,7 +2112,6 @@ static int sh_eth_do_ioctl(struct net_device *ndev, struct ifreq *rq,
- 	return phy_mii_ioctl(phydev, rq, cmd);
- }
- 
--#if defined(SH_ETH_HAS_TSU)
- /* For TSU_POSTn. Please refer to the manual about this (strange) bitfields */
- static void *sh_eth_tsu_get_post_reg_offset(struct sh_eth_private *mdp,
- 					    int entry)
-@@ -2459,7 +2454,6 @@ static int sh_eth_vlan_rx_kill_vid(struct net_device *ndev,
- 
- 	return 0;
- }
--#endif /* SH_ETH_HAS_TSU */
- 
- /* SuperH's TSU register init function */
- static void sh_eth_tsu_init(struct sh_eth_private *mdp)
-@@ -2598,16 +2592,11 @@ static const u16 *sh_eth_get_register_offset(int register_type)
- 	return reg_offset;
- }
- 
--static const struct net_device_ops sh_eth_netdev_ops = {
-+static struct net_device_ops sh_eth_netdev_ops = {
- 	.ndo_open		= sh_eth_open,
- 	.ndo_stop		= sh_eth_close,
- 	.ndo_start_xmit		= sh_eth_start_xmit,
- 	.ndo_get_stats		= sh_eth_get_stats,
--#if defined(SH_ETH_HAS_TSU)
--	.ndo_set_rx_mode	= sh_eth_set_multicast_list,
--	.ndo_vlan_rx_add_vid	= sh_eth_vlan_rx_add_vid,
--	.ndo_vlan_rx_kill_vid	= sh_eth_vlan_rx_kill_vid,
--#endif
- 	.ndo_tx_timeout		= sh_eth_tx_timeout,
- 	.ndo_do_ioctl		= sh_eth_do_ioctl,
- 	.ndo_validate_addr	= eth_validate_addr,
-@@ -2688,6 +2677,13 @@ static int sh_eth_drv_probe(struct platform_device *pdev)
- 	sh_eth_set_default_cpu_data(mdp->cd);
- 
- 	/* set function */
-+	if (mdp->cd->tsu) {
-+		sh_eth_netdev_ops.ndo_set_rx_mode = sh_eth_set_multicast_list;
-+		sh_eth_netdev_ops.ndo_vlan_rx_add_vid = sh_eth_vlan_rx_add_vid;
-+		sh_eth_netdev_ops.ndo_vlan_rx_kill_vid =
-+			sh_eth_vlan_rx_kill_vid;
-+	}
-+
- 	ndev->netdev_ops = &sh_eth_netdev_ops;
- 	SET_ETHTOOL_OPS(ndev, &sh_eth_ethtool_ops);
- 	ndev->watchdog_timeo = TX_TIMEOUT;
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0493-sh_eth-add-IRQ-flags-to-struct-sh_eth_cpu_data.patch b/patches.renesas/0493-sh_eth-add-IRQ-flags-to-struct-sh_eth_cpu_data.patch
deleted file mode 100644
index 62a121cbf7022..0000000000000
--- a/patches.renesas/0493-sh_eth-add-IRQ-flags-to-struct-sh_eth_cpu_data.patch
+++ /dev/null
@@ -1,82 +0,0 @@
-From eab7fbe5159409031d16a41f59e674c46f55a8bf Mon Sep 17 00:00:00 2001
-From: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
-Date: Thu, 6 Jun 2013 09:49:30 +0000
-Subject: sh_eth: add IRQ flags to 'struct sh_eth_cpu_data'
-
-The driver supports some SH and SH-Mobile SOCs. There are SOCs with two or more
-Ethernet devices, for these we need to pass IRQF_SHARED to request_irq().  Add
-the 'irq_flags' field to the 'struct sh_eth_cpu_data' instead of #ifdef'fery.
-
-Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
-[Sergei: properly aligned request_irq() call continuation line, reworded the
-changelog, reworded the subject, changing the prefix.]
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-
-(cherry picked from commit 5b3dfd13ae8bdebea67c02612fe282baff850bb0)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/net/ethernet/renesas/sh_eth.c | 13 +++++--------
- drivers/net/ethernet/renesas/sh_eth.h |  1 +
- 2 files changed, 6 insertions(+), 8 deletions(-)
-
-diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
-index c821339a..7ca34a52 100644
---- a/drivers/net/ethernet/renesas/sh_eth.c
-+++ b/drivers/net/ethernet/renesas/sh_eth.c
-@@ -465,6 +465,7 @@ static struct sh_eth_cpu_data sh_eth_my_cpu_data = {
- 			  EESR_ECI,
- 	.tx_error_check	= EESR_TWB | EESR_TABT | EESR_TDE | EESR_TFE,
- 
-+	.irq_flags	= IRQF_SHARED,
- 	.apr		= 1,
- 	.mpr		= 1,
- 	.tpauser	= 1,
-@@ -573,6 +574,7 @@ static struct sh_eth_cpu_data sh_eth_my_cpu_data_giga = {
- 	.fdr_value	= 0x0000072f,
- 	.rmcr_value	= 0x00000001,
- 
-+	.irq_flags	= IRQF_SHARED,
- 	.apr		= 1,
- 	.mpr		= 1,
- 	.tpauser	= 1,
-@@ -653,6 +655,8 @@ static struct sh_eth_cpu_data sh_eth_my_cpu_data = {
- #if defined(CONFIG_CPU_SUBTYPE_SH7734)
- 	.hw_crc     = 1,
- 	.select_mii = 1,
-+#else
-+	.irq_flags	= IRQF_SHARED,
- #endif
- };
- 
-@@ -1919,14 +1923,7 @@ static int sh_eth_open(struct net_device *ndev)
- 	pm_runtime_get_sync(&mdp->pdev->dev);
- 
- 	ret = request_irq(ndev->irq, sh_eth_interrupt,
--#if defined(CONFIG_CPU_SUBTYPE_SH7763) || \
--	defined(CONFIG_CPU_SUBTYPE_SH7764) || \
--	defined(CONFIG_CPU_SUBTYPE_SH7757)
--				IRQF_SHARED,
--#else
--				0,
--#endif
--				ndev->name, ndev);
-+			  mdp->cd->irq_flags, ndev->name, ndev);
- 	if (ret) {
- 		dev_err(&ndev->dev, "Can not assign IRQ number\n");
- 		return ret;
-diff --git a/drivers/net/ethernet/renesas/sh_eth.h b/drivers/net/ethernet/renesas/sh_eth.h
-index 034bee94..040d010b 100644
---- a/drivers/net/ethernet/renesas/sh_eth.h
-+++ b/drivers/net/ethernet/renesas/sh_eth.h
-@@ -463,6 +463,7 @@ struct sh_eth_cpu_data {
- 	unsigned long tx_error_check;
- 
- 	/* hardware features */
-+	unsigned long irq_flags;	/* IRQ configuration flags */
- 	unsigned no_psr:1;		/* EtherC DO NOT have PSR */
- 	unsigned apr:1;			/* EtherC have APR */
- 	unsigned mpr:1;			/* EtherC have MPR */
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0494-sh_eth-remove-ifdef-around-sh_eth_select_mii.patch b/patches.renesas/0494-sh_eth-remove-ifdef-around-sh_eth_select_mii.patch
deleted file mode 100644
index 7ca777d88c594..0000000000000
--- a/patches.renesas/0494-sh_eth-remove-ifdef-around-sh_eth_select_mii.patch
+++ /dev/null
@@ -1,46 +0,0 @@
-From 0f4dfed19a45fb9f470eb56f6a840a8b7d9164fb Mon Sep 17 00:00:00 2001
-From: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
-Date: Thu, 6 Jun 2013 09:50:30 +0000
-Subject: sh_eth: remove #ifdef around sh_eth_select_mii()
-
-We can simply remove #ifdef'fery around sh_eth_select_mii(). We have to annotate
-it with '__maybe_unused' then.
-
-Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
-[Sergei: added the changelog, reworded the subject, changing the prefix.]
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-
-(cherry picked from commit b7feacf1ee6944fc571802d58dcffaf13b4fb4cc)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/net/ethernet/renesas/sh_eth.c | 6 +-----
- 1 file changed, 1 insertion(+), 5 deletions(-)
-
-diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
-index 7ca34a52..2dd7be1f 100644
---- a/drivers/net/ethernet/renesas/sh_eth.c
-+++ b/drivers/net/ethernet/renesas/sh_eth.c
-@@ -313,10 +313,7 @@ static const u16 sh_eth_offset_fast_sh3_sh2[SH_ETH_MAX_REGISTER_OFFSET] = {
- 	[TSU_ADRL31]	= 0x01fc,
- };
- 
--#if defined(CONFIG_CPU_SUBTYPE_SH7734) || \
--	defined(CONFIG_CPU_SUBTYPE_SH7763) || \
--	defined(CONFIG_ARCH_R8A7740)
--static void sh_eth_select_mii(struct net_device *ndev)
-+static void __maybe_unused sh_eth_select_mii(struct net_device *ndev)
- {
- 	u32 value = 0x0;
- 	struct sh_eth_private *mdp = netdev_priv(ndev);
-@@ -339,7 +336,6 @@ static void sh_eth_select_mii(struct net_device *ndev)
- 
- 	sh_eth_write(ndev, value, RMII_MII);
- }
--#endif
- 
- static void __maybe_unused sh_eth_set_duplex(struct net_device *ndev)
- {
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0495-sh_eth-consolidate-sh_eth_reset.patch b/patches.renesas/0495-sh_eth-consolidate-sh_eth_reset.patch
deleted file mode 100644
index cfb9c394adeb4..0000000000000
--- a/patches.renesas/0495-sh_eth-consolidate-sh_eth_reset.patch
+++ /dev/null
@@ -1,299 +0,0 @@
-From d09388fe7133cac585f16ec3d53b2c99787d5bf5 Mon Sep 17 00:00:00 2001
-From: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
-Date: Thu, 6 Jun 2013 09:51:39 +0000
-Subject: sh_eth: consolidate sh_eth_reset()
-
-This driver has sh_eth_reset() function for each SoC and this function is almost
-always the same, except for the several a bit different variations for Gigabit
-Ethernet.  Consolidate every variation into a single function -- which allows
-us to get  rid of some more #ifdef'fery.
-
-Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
-[Sergei: moved the new sh_eth_reset() and sh_eth_is_gether() up to decrease the
-patch size, fixed function call continuation lines' indentation, reworded the
-changelog, reworded the subject, changing the prefix.]
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-
-(cherry picked from commit dabdde9ea77d4a77094726c82468a3bd767fb29b)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/net/ethernet/renesas/sh_eth.c | 176 ++++++++++------------------------
- 1 file changed, 51 insertions(+), 125 deletions(-)
-
-diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
-index 2dd7be1f..cae8576a 100644
---- a/drivers/net/ethernet/renesas/sh_eth.c
-+++ b/drivers/net/ethernet/renesas/sh_eth.c
-@@ -313,6 +313,14 @@ static const u16 sh_eth_offset_fast_sh3_sh2[SH_ETH_MAX_REGISTER_OFFSET] = {
- 	[TSU_ADRL31]	= 0x01fc,
- };
- 
-+static int sh_eth_is_gether(struct sh_eth_private *mdp)
-+{
-+	if (mdp->reg_offset == sh_eth_offset_gigabit)
-+		return 1;
-+	else
-+		return 0;
-+}
-+
- static void __maybe_unused sh_eth_select_mii(struct net_device *ndev)
- {
- 	u32 value = 0x0;
-@@ -349,7 +357,6 @@ static void __maybe_unused sh_eth_set_duplex(struct net_device *ndev)
- 
- /* There is CPU dependent code */
- #if defined(CONFIG_ARCH_R8A7778) || defined(CONFIG_ARCH_R8A7779)
--#define SH_ETH_RESET_DEFAULT	1
- static void sh_eth_set_rate(struct net_device *ndev)
- {
- 	struct sh_eth_private *mdp = netdev_priv(ndev);
-@@ -387,7 +394,6 @@ static struct sh_eth_cpu_data sh_eth_my_cpu_data = {
- 	.hw_swap	= 1,
- };
- #elif defined(CONFIG_CPU_SUBTYPE_SH7724)
--#define SH_ETH_RESET_DEFAULT	1
- 
- static void sh_eth_set_rate(struct net_device *ndev)
- {
-@@ -429,7 +435,6 @@ static struct sh_eth_cpu_data sh_eth_my_cpu_data = {
- };
- #elif defined(CONFIG_CPU_SUBTYPE_SH7757)
- #define SH_ETH_HAS_BOTH_MODULES	1
--static int sh_eth_check_reset(struct net_device *ndev);
- 
- static void sh_eth_set_rate(struct net_device *ndev)
- {
-@@ -496,42 +501,6 @@ static void sh_eth_chip_reset_giga(struct net_device *ndev)
- 	}
- }
- 
--static int sh_eth_is_gether(struct sh_eth_private *mdp);
--static int sh_eth_reset(struct net_device *ndev)
--{
--	struct sh_eth_private *mdp = netdev_priv(ndev);
--	int ret = 0;
--
--	if (sh_eth_is_gether(mdp)) {
--		sh_eth_write(ndev, EDSR_ENALL, EDSR);
--		sh_eth_write(ndev, sh_eth_read(ndev, EDMR) | EDMR_SRST_GETHER,
--				EDMR);
--
--		ret = sh_eth_check_reset(ndev);
--		if (ret)
--			goto out;
--
--		/* Table Init */
--		sh_eth_write(ndev, 0x0, TDLAR);
--		sh_eth_write(ndev, 0x0, TDFAR);
--		sh_eth_write(ndev, 0x0, TDFXR);
--		sh_eth_write(ndev, 0x0, TDFFR);
--		sh_eth_write(ndev, 0x0, RDLAR);
--		sh_eth_write(ndev, 0x0, RDFAR);
--		sh_eth_write(ndev, 0x0, RDFXR);
--		sh_eth_write(ndev, 0x0, RDFFR);
--	} else {
--		sh_eth_write(ndev, sh_eth_read(ndev, EDMR) | EDMR_SRST_ETHER,
--				EDMR);
--		mdelay(3);
--		sh_eth_write(ndev, sh_eth_read(ndev, EDMR) & ~EDMR_SRST_ETHER,
--				EDMR);
--	}
--
--out:
--	return ret;
--}
--
- static void sh_eth_set_rate_giga(struct net_device *ndev)
- {
- 	struct sh_eth_private *mdp = netdev_priv(ndev);
-@@ -592,8 +561,6 @@ static struct sh_eth_cpu_data *sh_eth_get_cpu_data(struct sh_eth_private *mdp)
- }
- 
- #elif defined(CONFIG_CPU_SUBTYPE_SH7734) || defined(CONFIG_CPU_SUBTYPE_SH7763)
--static int sh_eth_check_reset(struct net_device *ndev);
--static void sh_eth_reset_hw_crc(struct net_device *ndev);
- 
- static void sh_eth_chip_reset(struct net_device *ndev)
- {
-@@ -656,45 +623,8 @@ static struct sh_eth_cpu_data sh_eth_my_cpu_data = {
- #endif
- };
- 
--static int sh_eth_reset(struct net_device *ndev)
--{
--	int ret = 0;
--
--	sh_eth_write(ndev, EDSR_ENALL, EDSR);
--	sh_eth_write(ndev, sh_eth_read(ndev, EDMR) | EDMR_SRST_GETHER, EDMR);
--
--	ret = sh_eth_check_reset(ndev);
--	if (ret)
--		goto out;
--
--	/* Table Init */
--	sh_eth_write(ndev, 0x0, TDLAR);
--	sh_eth_write(ndev, 0x0, TDFAR);
--	sh_eth_write(ndev, 0x0, TDFXR);
--	sh_eth_write(ndev, 0x0, TDFFR);
--	sh_eth_write(ndev, 0x0, RDLAR);
--	sh_eth_write(ndev, 0x0, RDFAR);
--	sh_eth_write(ndev, 0x0, RDFXR);
--	sh_eth_write(ndev, 0x0, RDFFR);
--
--	/* Reset HW CRC register */
--	sh_eth_reset_hw_crc(ndev);
--
--	/* Select MII mode */
--	if (sh_eth_my_cpu_data.select_mii)
--		sh_eth_select_mii(ndev);
--out:
--	return ret;
--}
--
--static void sh_eth_reset_hw_crc(struct net_device *ndev)
--{
--	if (sh_eth_my_cpu_data.hw_crc)
--		sh_eth_write(ndev, 0x0, CSMR);
--}
- 
- #elif defined(CONFIG_ARCH_R8A7740)
--static int sh_eth_check_reset(struct net_device *ndev);
- 
- static void sh_eth_chip_reset(struct net_device *ndev)
- {
-@@ -707,31 +637,6 @@ static void sh_eth_chip_reset(struct net_device *ndev)
- 	sh_eth_select_mii(ndev);
- }
- 
--static int sh_eth_reset(struct net_device *ndev)
--{
--	int ret = 0;
--
--	sh_eth_write(ndev, EDSR_ENALL, EDSR);
--	sh_eth_write(ndev, sh_eth_read(ndev, EDMR) | EDMR_SRST_GETHER, EDMR);
--
--	ret = sh_eth_check_reset(ndev);
--	if (ret)
--		goto out;
--
--	/* Table Init */
--	sh_eth_write(ndev, 0x0, TDLAR);
--	sh_eth_write(ndev, 0x0, TDFAR);
--	sh_eth_write(ndev, 0x0, TDFXR);
--	sh_eth_write(ndev, 0x0, TDFFR);
--	sh_eth_write(ndev, 0x0, RDLAR);
--	sh_eth_write(ndev, 0x0, RDFAR);
--	sh_eth_write(ndev, 0x0, RDFXR);
--	sh_eth_write(ndev, 0x0, RDFFR);
--
--out:
--	return ret;
--}
--
- static void sh_eth_set_rate(struct net_device *ndev)
- {
- 	struct sh_eth_private *mdp = netdev_priv(ndev);
-@@ -780,7 +685,6 @@ static struct sh_eth_cpu_data sh_eth_my_cpu_data = {
- };
- 
- #elif defined(CONFIG_CPU_SUBTYPE_SH7619)
--#define SH_ETH_RESET_DEFAULT	1
- static struct sh_eth_cpu_data sh_eth_my_cpu_data = {
- 	.eesipr_value	= DMAC_M_RFRMER | DMAC_M_ECI | 0x003fffff,
- 
-@@ -790,7 +694,6 @@ static struct sh_eth_cpu_data sh_eth_my_cpu_data = {
- 	.hw_swap	= 1,
- };
- #elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
--#define SH_ETH_RESET_DEFAULT	1
- static struct sh_eth_cpu_data sh_eth_my_cpu_data = {
- 	.eesipr_value	= DMAC_M_RFRMER | DMAC_M_ECI | 0x003fffff,
- 	.tsu		= 1,
-@@ -825,17 +728,6 @@ static void sh_eth_set_default_cpu_data(struct sh_eth_cpu_data *cd)
- 		cd->tx_error_check = DEFAULT_TX_ERROR_CHECK;
- }
- 
--#if defined(SH_ETH_RESET_DEFAULT)
--/* Chip Reset */
--static int  sh_eth_reset(struct net_device *ndev)
--{
--	sh_eth_write(ndev, sh_eth_read(ndev, EDMR) | EDMR_SRST_ETHER, EDMR);
--	mdelay(3);
--	sh_eth_write(ndev, sh_eth_read(ndev, EDMR) & ~EDMR_SRST_ETHER, EDMR);
--
--	return 0;
--}
--#else
- static int sh_eth_check_reset(struct net_device *ndev)
- {
- 	int ret = 0;
-@@ -853,7 +745,49 @@ static int sh_eth_check_reset(struct net_device *ndev)
- 	}
- 	return ret;
- }
--#endif
-+
-+static int sh_eth_reset(struct net_device *ndev)
-+{
-+	struct sh_eth_private *mdp = netdev_priv(ndev);
-+	int ret = 0;
-+
-+	if (sh_eth_is_gether(mdp)) {
-+		sh_eth_write(ndev, EDSR_ENALL, EDSR);
-+		sh_eth_write(ndev, sh_eth_read(ndev, EDMR) | EDMR_SRST_GETHER,
-+			     EDMR);
-+
-+		ret = sh_eth_check_reset(ndev);
-+		if (ret)
-+			goto out;
-+
-+		/* Table Init */
-+		sh_eth_write(ndev, 0x0, TDLAR);
-+		sh_eth_write(ndev, 0x0, TDFAR);
-+		sh_eth_write(ndev, 0x0, TDFXR);
-+		sh_eth_write(ndev, 0x0, TDFFR);
-+		sh_eth_write(ndev, 0x0, RDLAR);
-+		sh_eth_write(ndev, 0x0, RDFAR);
-+		sh_eth_write(ndev, 0x0, RDFXR);
-+		sh_eth_write(ndev, 0x0, RDFFR);
-+
-+		/* Reset HW CRC register */
-+		if (mdp->cd->hw_crc)
-+			sh_eth_write(ndev, 0x0, CSMR);
-+
-+		/* Select MII mode */
-+		if (mdp->cd->select_mii)
-+			sh_eth_select_mii(ndev);
-+	} else {
-+		sh_eth_write(ndev, sh_eth_read(ndev, EDMR) | EDMR_SRST_ETHER,
-+			     EDMR);
-+		mdelay(3);
-+		sh_eth_write(ndev, sh_eth_read(ndev, EDMR) & ~EDMR_SRST_ETHER,
-+			     EDMR);
-+	}
-+
-+out:
-+	return ret;
-+}
- 
- #if defined(CONFIG_CPU_SH4) || defined(CONFIG_ARCH_SHMOBILE)
- static void sh_eth_set_receive_align(struct sk_buff *skb)
-@@ -929,14 +863,6 @@ static void read_mac_address(struct net_device *ndev, unsigned char *mac)
- 	}
- }
- 
--static int sh_eth_is_gether(struct sh_eth_private *mdp)
--{
--	if (mdp->reg_offset == sh_eth_offset_gigabit)
--		return 1;
--	else
--		return 0;
--}
--
- static unsigned long sh_eth_get_edtrr_trns(struct sh_eth_private *mdp)
- {
- 	if (sh_eth_is_gether(mdp))
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0496-sh_eth-enclose-PM-code-into-ifdef-CONFIG_PM.patch b/patches.renesas/0496-sh_eth-enclose-PM-code-into-ifdef-CONFIG_PM.patch
deleted file mode 100644
index 465fe83578394..0000000000000
--- a/patches.renesas/0496-sh_eth-enclose-PM-code-into-ifdef-CONFIG_PM.patch
+++ /dev/null
@@ -1,59 +0,0 @@
-From 6da0c0140db880075424d043c5ce6055421c3c74 Mon Sep 17 00:00:00 2001
-From: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
-Date: Thu, 6 Jun 2013 09:52:37 +0000
-Subject: sh_eth: enclose PM code into #ifdef CONFIG_PM
-
-Put '#ifdef CONFIG_PM' around sh_eth_runtime_nop() and 'sh_eth_dev_pm_ops'.
-Add '#define SH_ETH_PM_OPS' to facilitate initialization of driver's 'pm' field
-depending on whether CONFIG_PM is enabled.
-
-Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
-[Sergei: added the changelog, reworded the subject, changing the prefix.]
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-
-(cherry picked from commit 540ad1b888ad9564520c1c8c48ad675f76ffce62)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/net/ethernet/renesas/sh_eth.c | 9 +++++++--
- 1 file changed, 7 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
-index cae8576a..0a7990a1 100644
---- a/drivers/net/ethernet/renesas/sh_eth.c
-+++ b/drivers/net/ethernet/renesas/sh_eth.c
-@@ -2685,6 +2685,7 @@ static int sh_eth_drv_remove(struct platform_device *pdev)
- 	return 0;
- }
- 
-+#ifdef CONFIG_PM
- static int sh_eth_runtime_nop(struct device *dev)
- {
- 	/*
-@@ -2698,17 +2699,21 @@ static int sh_eth_runtime_nop(struct device *dev)
- 	return 0;
- }
- 
--static struct dev_pm_ops sh_eth_dev_pm_ops = {
-+static const struct dev_pm_ops sh_eth_dev_pm_ops = {
- 	.runtime_suspend = sh_eth_runtime_nop,
- 	.runtime_resume = sh_eth_runtime_nop,
- };
-+#define SH_ETH_PM_OPS (&sh_eth_dev_pm_ops)
-+#else
-+#define SH_ETH_PM_OPS NULL
-+#endif
- 
- static struct platform_driver sh_eth_driver = {
- 	.probe = sh_eth_drv_probe,
- 	.remove = sh_eth_drv_remove,
- 	.driver = {
- 		   .name = CARDNAME,
--		   .pm = &sh_eth_dev_pm_ops,
-+		   .pm = SH_ETH_PM_OPS,
- 	},
- };
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0497-sh_eth-create-initial-ID-table.patch b/patches.renesas/0497-sh_eth-create-initial-ID-table.patch
deleted file mode 100644
index bf835f4bbdce0..0000000000000
--- a/patches.renesas/0497-sh_eth-create-initial-ID-table.patch
+++ /dev/null
@@ -1,61 +0,0 @@
-From 87248a9cf0a516e4100e13d2adb90e75be32576b Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Fri, 7 Jun 2013 13:54:02 +0000
-Subject: sh_eth: create initial ID table
-
-We are trying to get away from the current driver's scheme of identifying a SoC
-based on #ifdef's and the platform device ID table matching seems to be a good
-replacement -- we can use the 'driver_data' field of 'struct platform_device_id'
-as a pointer to a 'struct sh_eth_cpu_data'. Start by creating the initial table
-with driver's name as the only entry without the driver data. Check  the driver
-data in the probe() method and if it's not NULL override 'mdp->cd' from it.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit afe391ad4b05f8f00ca955e165f3b37b480506b7)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/net/ethernet/renesas/sh_eth.c | 10 ++++++++++
- 1 file changed, 10 insertions(+)
-
-diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
-index 0a7990a1..ede2db2e 100644
---- a/drivers/net/ethernet/renesas/sh_eth.c
-+++ b/drivers/net/ethernet/renesas/sh_eth.c
-@@ -2530,6 +2530,7 @@ static int sh_eth_drv_probe(struct platform_device *pdev)
- 	struct net_device *ndev = NULL;
- 	struct sh_eth_private *mdp = NULL;
- 	struct sh_eth_plat_data *pd = pdev->dev.platform_data;
-+	const struct platform_device_id *id = platform_get_device_id(pdev);
- 
- 	/* get base addr */
- 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-@@ -2593,6 +2594,8 @@ static int sh_eth_drv_probe(struct platform_device *pdev)
- #else
- 	mdp->cd = &sh_eth_my_cpu_data;
- #endif
-+	if (id->driver_data)
-+		mdp->cd = (struct sh_eth_cpu_data *)id->driver_data;
- 	sh_eth_set_default_cpu_data(mdp->cd);
- 
- 	/* set function */
-@@ -2708,9 +2711,16 @@ static const struct dev_pm_ops sh_eth_dev_pm_ops = {
- #define SH_ETH_PM_OPS NULL
- #endif
- 
-+static struct platform_device_id sh_eth_id_table[] = {
-+	{ CARDNAME },
-+	{ }
-+};
-+MODULE_DEVICE_TABLE(platform, sh_eth_id_table);
-+
- static struct platform_driver sh_eth_driver = {
- 	.probe = sh_eth_drv_probe,
- 	.remove = sh_eth_drv_remove,
-+	.id_table = sh_eth_id_table,
- 	.driver = {
- 		   .name = CARDNAME,
- 		   .pm = SH_ETH_PM_OPS,
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0498-sh_eth-get-SH771x-support-out-of-ifdef.patch b/patches.renesas/0498-sh_eth-get-SH771x-support-out-of-ifdef.patch
deleted file mode 100644
index b013a0eb84608..0000000000000
--- a/patches.renesas/0498-sh_eth-get-SH771x-support-out-of-ifdef.patch
+++ /dev/null
@@ -1,75 +0,0 @@
-From 6b19db4f2c460792dda88c47d2290c4120ecab05 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Fri, 7 Jun 2013 13:55:08 +0000
-Subject: sh_eth: get SH771x support out of #ifdef
-
-Get the SH771[02] data in the driver out of #ifdef by adding "sh771x-ether" to
-the platform driver's ID table. Change the Ether platform device's name in the
-SH platform code accordingly.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit 7bbe150d8c57c59689c8c50fd7b9915f4a7e10da)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/sh/boards/mach-se/770x/setup.c   | 8 ++++----
- drivers/net/ethernet/renesas/sh_eth.c | 7 ++++---
- 2 files changed, 8 insertions(+), 7 deletions(-)
-
-diff --git a/arch/sh/boards/mach-se/770x/setup.c b/arch/sh/boards/mach-se/770x/setup.c
-index 9759d6ba..658326f4 100644
---- a/arch/sh/boards/mach-se/770x/setup.c
-+++ b/arch/sh/boards/mach-se/770x/setup.c
-@@ -128,8 +128,8 @@ static struct resource sh_eth0_resources[] = {
- };
- 
- static struct platform_device sh_eth0_device = {
--	.name = "sh-eth",
--	.id	= 0,
-+	.name = "sh771x-ether",
-+	.id = 0,
- 	.dev = {
- 		.platform_data = PHY_ID,
- 	},
-@@ -151,8 +151,8 @@ static struct resource sh_eth1_resources[] = {
- };
- 
- static struct platform_device sh_eth1_device = {
--	.name = "sh-eth",
--	.id	= 1,
-+	.name = "sh771x-ether",
-+	.id = 1,
- 	.dev = {
- 		.platform_data = PHY_ID,
- 	},
-diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
-index ede2db2e..bb83b116 100644
---- a/drivers/net/ethernet/renesas/sh_eth.c
-+++ b/drivers/net/ethernet/renesas/sh_eth.c
-@@ -693,12 +693,12 @@ static struct sh_eth_cpu_data sh_eth_my_cpu_data = {
- 	.tpauser	= 1,
- 	.hw_swap	= 1,
- };
--#elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
--static struct sh_eth_cpu_data sh_eth_my_cpu_data = {
-+#endif
-+
-+static struct sh_eth_cpu_data sh771x_data = {
- 	.eesipr_value	= DMAC_M_RFRMER | DMAC_M_ECI | 0x003fffff,
- 	.tsu		= 1,
- };
--#endif
- 
- static void sh_eth_set_default_cpu_data(struct sh_eth_cpu_data *cd)
- {
-@@ -2712,6 +2712,7 @@ static const struct dev_pm_ops sh_eth_dev_pm_ops = {
- #endif
- 
- static struct platform_device_id sh_eth_id_table[] = {
-+	{ "sh771x-ether", (kernel_ulong_t)&sh771x_data },
- 	{ CARDNAME },
- 	{ }
- };
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0499-sh_eth-get-SH7619-support-out-of-ifdef.patch b/patches.renesas/0499-sh_eth-get-SH7619-support-out-of-ifdef.patch
deleted file mode 100644
index ea39fccbbe5ef..0000000000000
--- a/patches.renesas/0499-sh_eth-get-SH7619-support-out-of-ifdef.patch
+++ /dev/null
@@ -1,68 +0,0 @@
-From da28d65329053e276847c7cbc3ad6f9534bc65d7 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Fri, 7 Jun 2013 13:56:05 +0000
-Subject: sh_eth: get SH7619 support out of #ifdef
-
-Get  the SH7619 data in the driver out of #ifdef by adding "sh7619-ether" to the
-platform driver's ID table. Change the Ether platform device's name  in  the SH
-platform code accordingly.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit c18a79abe31f555ec3b363b5b8c1d003230053b6)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/sh/kernel/cpu/sh2/setup-sh7619.c | 4 ++--
- drivers/net/ethernet/renesas/sh_eth.c | 6 +++---
- 2 files changed, 5 insertions(+), 5 deletions(-)
-
-diff --git a/arch/sh/kernel/cpu/sh2/setup-sh7619.c b/arch/sh/kernel/cpu/sh2/setup-sh7619.c
-index e0b740c8..bb11e192 100644
---- a/arch/sh/kernel/cpu/sh2/setup-sh7619.c
-+++ b/arch/sh/kernel/cpu/sh2/setup-sh7619.c
-@@ -124,8 +124,8 @@ static struct resource eth_resources[] = {
- };
- 
- static struct platform_device eth_device = {
--	.name = "sh-eth",
--	.id	= -1,
-+	.name = "sh7619-ether",
-+	.id = -1,
- 	.dev = {
- 		.platform_data = (void *)1,
- 	},
-diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
-index bb83b116..96ec5783 100644
---- a/drivers/net/ethernet/renesas/sh_eth.c
-+++ b/drivers/net/ethernet/renesas/sh_eth.c
-@@ -683,9 +683,9 @@ static struct sh_eth_cpu_data sh_eth_my_cpu_data = {
- 	.tsu		= 1,
- 	.select_mii	= 1,
- };
-+#endif
- 
--#elif defined(CONFIG_CPU_SUBTYPE_SH7619)
--static struct sh_eth_cpu_data sh_eth_my_cpu_data = {
-+static struct sh_eth_cpu_data sh7619_data = {
- 	.eesipr_value	= DMAC_M_RFRMER | DMAC_M_ECI | 0x003fffff,
- 
- 	.apr		= 1,
-@@ -693,7 +693,6 @@ static struct sh_eth_cpu_data sh_eth_my_cpu_data = {
- 	.tpauser	= 1,
- 	.hw_swap	= 1,
- };
--#endif
- 
- static struct sh_eth_cpu_data sh771x_data = {
- 	.eesipr_value	= DMAC_M_RFRMER | DMAC_M_ECI | 0x003fffff,
-@@ -2712,6 +2711,7 @@ static const struct dev_pm_ops sh_eth_dev_pm_ops = {
- #endif
- 
- static struct platform_device_id sh_eth_id_table[] = {
-+	{ "sh7619-ether", (kernel_ulong_t)&sh7619_data },
- 	{ "sh771x-ether", (kernel_ulong_t)&sh771x_data },
- 	{ CARDNAME },
- 	{ }
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0500-sh_eth-get-R8A7740-support-out-of-ifdef.patch b/patches.renesas/0500-sh_eth-get-R8A7740-support-out-of-ifdef.patch
deleted file mode 100644
index a7952f572b0d7..0000000000000
--- a/patches.renesas/0500-sh_eth-get-R8A7740-support-out-of-ifdef.patch
+++ /dev/null
@@ -1,108 +0,0 @@
-From 8448f88cf46ac5d2b771073b913733d1be639c30 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Fri, 7 Jun 2013 13:57:12 +0000
-Subject: sh_eth: get R8A7740 support out of #ifdef
-
-Get the R8A7740 code/data in the driver out of #ifdef by adding "r8a7740-gether"
-to the platform driver's ID table.  Change the GEther platform device's name in
-the ARM platform code accordingly.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit e5c9b4cd665106d9b5397114ea81a53059410b6a)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-	arch/arm/mach-shmobile/clock-r8a7740.c
----
- arch/arm/mach-shmobile/board-armadillo800eva.c |  2 +-
- arch/arm/mach-shmobile/clock-r8a7740.c         |  2 +-
- drivers/net/ethernet/renesas/sh_eth.c          | 16 +++++++---------
- 3 files changed, 9 insertions(+), 11 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c
-index 2ef31a69..4b247407 100644
---- a/arch/arm/mach-shmobile/board-armadillo800eva.c
-+++ b/arch/arm/mach-shmobile/board-armadillo800eva.c
-@@ -379,7 +379,7 @@ static struct resource sh_eth_resources[] = {
- };
- 
- static struct platform_device sh_eth_device = {
--	.name = "sh-eth",
-+	.name = "r8a7740-gether",
- 	.id = -1,
- 	.dev = {
- 		.platform_data = &sh_eth_platdata,
-diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c
-index 664321c8..c826bca4 100644
---- a/arch/arm/mach-shmobile/clock-r8a7740.c
-+++ b/arch/arm/mach-shmobile/clock-r8a7740.c
-@@ -594,7 +594,7 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_DEV_ID("e6860000.sdhi",          &mstp_clks[MSTP313]),
- 	CLKDEV_DEV_ID("sh_mmcif",		&mstp_clks[MSTP312]),
- 	CLKDEV_DEV_ID("e6bd0000.mmcif",         &mstp_clks[MSTP312]),
--	CLKDEV_DEV_ID("sh-eth",			&mstp_clks[MSTP309]),
-+	CLKDEV_DEV_ID("r8a7740-gether",		&mstp_clks[MSTP309]),
- 	CLKDEV_DEV_ID("e9a00000.sh-eth",	&mstp_clks[MSTP309]),
- 	CLKDEV_DEV_ID("renesas-tpu-pwm",	&mstp_clks[MSTP304]),
- 	CLKDEV_DEV_ID("e6600000.pwm",		&mstp_clks[MSTP304]),
-diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
-index 96ec5783..403b055f 100644
---- a/drivers/net/ethernet/renesas/sh_eth.c
-+++ b/drivers/net/ethernet/renesas/sh_eth.c
-@@ -622,11 +622,9 @@ static struct sh_eth_cpu_data sh_eth_my_cpu_data = {
- 	.irq_flags	= IRQF_SHARED,
- #endif
- };
-+#endif
- 
--
--#elif defined(CONFIG_ARCH_R8A7740)
--
--static void sh_eth_chip_reset(struct net_device *ndev)
-+static void sh_eth_chip_reset_r8a7740(struct net_device *ndev)
- {
- 	struct sh_eth_private *mdp = netdev_priv(ndev);
- 
-@@ -637,7 +635,7 @@ static void sh_eth_chip_reset(struct net_device *ndev)
- 	sh_eth_select_mii(ndev);
- }
- 
--static void sh_eth_set_rate(struct net_device *ndev)
-+static void sh_eth_set_rate_gether(struct net_device *ndev)
- {
- 	struct sh_eth_private *mdp = netdev_priv(ndev);
- 
-@@ -657,10 +655,10 @@ static void sh_eth_set_rate(struct net_device *ndev)
- }
- 
- /* R8A7740 */
--static struct sh_eth_cpu_data sh_eth_my_cpu_data = {
--	.chip_reset	= sh_eth_chip_reset,
-+static struct sh_eth_cpu_data r8a7740_data = {
-+	.chip_reset	= sh_eth_chip_reset_r8a7740,
- 	.set_duplex	= sh_eth_set_duplex,
--	.set_rate	= sh_eth_set_rate,
-+	.set_rate	= sh_eth_set_rate_gether,
- 
- 	.ecsr_value	= ECSR_ICD | ECSR_MPD,
- 	.ecsipr_value	= ECSIPR_LCHNGIP | ECSIPR_ICDIP | ECSIPR_MPDIP,
-@@ -683,7 +681,6 @@ static struct sh_eth_cpu_data sh_eth_my_cpu_data = {
- 	.tsu		= 1,
- 	.select_mii	= 1,
- };
--#endif
- 
- static struct sh_eth_cpu_data sh7619_data = {
- 	.eesipr_value	= DMAC_M_RFRMER | DMAC_M_ECI | 0x003fffff,
-@@ -2713,6 +2710,7 @@ static const struct dev_pm_ops sh_eth_dev_pm_ops = {
- static struct platform_device_id sh_eth_id_table[] = {
- 	{ "sh7619-ether", (kernel_ulong_t)&sh7619_data },
- 	{ "sh771x-ether", (kernel_ulong_t)&sh771x_data },
-+	{ "r8a7740-gether", (kernel_ulong_t)&r8a7740_data },
- 	{ CARDNAME },
- 	{ }
- };
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0501-sh_eth-get-SH77-34-63-support-out-of-ifdef.patch b/patches.renesas/0501-sh_eth-get-SH77-34-63-support-out-of-ifdef.patch
deleted file mode 100644
index 1abe852dbc13c..0000000000000
--- a/patches.renesas/0501-sh_eth-get-SH77-34-63-support-out-of-ifdef.patch
+++ /dev/null
@@ -1,181 +0,0 @@
-From 1a92651a9dd29f035ce933d7d28ed800596d8acb Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Fri, 7 Jun 2013 13:58:18 +0000
-Subject: sh_eth: get SH77{34|63} support out of #ifdef
-
-Get the SH77{34|63} specific code/data in the driver out of #ifdef by adding
-"sh7734-gether" and "sh7763-gether" to the platform driver's ID table.  Note
-that we have to split the 'struct sh_eth_cpu_data' instance into two due to
-#ifdef inside it; note that we can kill the duplicate sh_eth_set_rate_gether().
-Change the GEther platform device's name in the SH platform code accordingly.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit f5d12767c8fd77e29d3d6771de59fd9ac3e540bb)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/sh/boards/board-espt.c            |  2 +-
- arch/sh/boards/mach-sh7763rdp/setup.c  |  2 +-
- arch/sh/kernel/cpu/sh4a/clock-sh7734.c |  2 +-
- drivers/net/ethernet/renesas/sh_eth.c  | 67 ++++++++++++++++++----------------
- 4 files changed, 39 insertions(+), 34 deletions(-)
-
-diff --git a/arch/sh/boards/board-espt.c b/arch/sh/boards/board-espt.c
-index d71a0bcf..4d94dff9 100644
---- a/arch/sh/boards/board-espt.c
-+++ b/arch/sh/boards/board-espt.c
-@@ -85,7 +85,7 @@ static struct sh_eth_plat_data sh7763_eth_pdata = {
- };
- 
- static struct platform_device espt_eth_device = {
--	.name       = "sh-eth",
-+	.name       = "sh7763-gether",
- 	.resource   = sh_eth_resources,
- 	.num_resources  = ARRAY_SIZE(sh_eth_resources),
- 	.dev        = {
-diff --git a/arch/sh/boards/mach-sh7763rdp/setup.c b/arch/sh/boards/mach-sh7763rdp/setup.c
-index b7c75298..50ba481f 100644
---- a/arch/sh/boards/mach-sh7763rdp/setup.c
-+++ b/arch/sh/boards/mach-sh7763rdp/setup.c
-@@ -93,7 +93,7 @@ static struct sh_eth_plat_data sh7763_eth_pdata = {
- };
- 
- static struct platform_device sh7763rdp_eth_device = {
--	.name       = "sh-eth",
-+	.name       = "sh7763-gether",
- 	.resource   = sh_eth_resources,
- 	.num_resources  = ARRAY_SIZE(sh_eth_resources),
- 	.dev        = {
-diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7734.c b/arch/sh/kernel/cpu/sh4a/clock-sh7734.c
-index deb683ab..ed950151 100644
---- a/arch/sh/kernel/cpu/sh4a/clock-sh7734.c
-+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7734.c
-@@ -238,7 +238,7 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_CON_ID("adc0", &mstp_clks[MSTP313]),
- 	CLKDEV_CON_ID("mtu0", &mstp_clks[MSTP312]),
- 	CLKDEV_CON_ID("iebus0", &mstp_clks[MSTP304]),
--	CLKDEV_DEV_ID("sh-eth.0", &mstp_clks[MSTP114]),
-+	CLKDEV_DEV_ID("sh7734-gether.0", &mstp_clks[MSTP114]),
- 	CLKDEV_CON_ID("rtc0", &mstp_clks[MSTP303]),
- 	CLKDEV_CON_ID("hif0", &mstp_clks[MSTP302]),
- 	CLKDEV_CON_ID("stif0", &mstp_clks[MSTP301]),
-diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
-index 403b055f..bdc3f20f 100644
---- a/drivers/net/ethernet/renesas/sh_eth.c
-+++ b/drivers/net/ethernet/renesas/sh_eth.c
-@@ -559,8 +559,7 @@ static struct sh_eth_cpu_data *sh_eth_get_cpu_data(struct sh_eth_private *mdp)
- 	else
- 		return &sh_eth_my_cpu_data;
- }
--
--#elif defined(CONFIG_CPU_SUBTYPE_SH7734) || defined(CONFIG_CPU_SUBTYPE_SH7763)
-+#endif
- 
- static void sh_eth_chip_reset(struct net_device *ndev)
- {
-@@ -571,7 +570,7 @@ static void sh_eth_chip_reset(struct net_device *ndev)
- 	mdelay(1);
- }
- 
--static void sh_eth_set_rate(struct net_device *ndev)
-+static void sh_eth_set_rate_gether(struct net_device *ndev)
- {
- 	struct sh_eth_private *mdp = netdev_priv(ndev);
- 
-@@ -590,11 +589,40 @@ static void sh_eth_set_rate(struct net_device *ndev)
- 	}
- }
- 
--/* sh7763 */
--static struct sh_eth_cpu_data sh_eth_my_cpu_data = {
-+/* SH7734 */
-+static struct sh_eth_cpu_data sh7734_data = {
- 	.chip_reset	= sh_eth_chip_reset,
- 	.set_duplex	= sh_eth_set_duplex,
--	.set_rate	= sh_eth_set_rate,
-+	.set_rate	= sh_eth_set_rate_gether,
-+
-+	.ecsr_value	= ECSR_ICD | ECSR_MPD,
-+	.ecsipr_value	= ECSIPR_LCHNGIP | ECSIPR_ICDIP | ECSIPR_MPDIP,
-+	.eesipr_value	= DMAC_M_RFRMER | DMAC_M_ECI | 0x003fffff,
-+
-+	.tx_check	= EESR_TC1 | EESR_FTC,
-+	.eesr_err_check	= EESR_TWB1 | EESR_TWB | EESR_TABT | EESR_RABT | \
-+			  EESR_RDE | EESR_RFRMER | EESR_TFE | EESR_TDE | \
-+			  EESR_ECI,
-+	.tx_error_check	= EESR_TWB1 | EESR_TWB | EESR_TABT | EESR_TDE | \
-+			  EESR_TFE,
-+
-+	.apr		= 1,
-+	.mpr		= 1,
-+	.tpauser	= 1,
-+	.bculr		= 1,
-+	.hw_swap	= 1,
-+	.no_trimd	= 1,
-+	.no_ade		= 1,
-+	.tsu		= 1,
-+	.hw_crc		= 1,
-+	.select_mii	= 1,
-+};
-+
-+/* SH7763 */
-+static struct sh_eth_cpu_data sh7763_data = {
-+	.chip_reset	= sh_eth_chip_reset,
-+	.set_duplex	= sh_eth_set_duplex,
-+	.set_rate	= sh_eth_set_rate_gether,
- 
- 	.ecsr_value	= ECSR_ICD | ECSR_MPD,
- 	.ecsipr_value	= ECSIPR_LCHNGIP | ECSIPR_ICDIP | ECSIPR_MPDIP,
-@@ -615,14 +643,8 @@ static struct sh_eth_cpu_data sh_eth_my_cpu_data = {
- 	.no_trimd	= 1,
- 	.no_ade		= 1,
- 	.tsu		= 1,
--#if defined(CONFIG_CPU_SUBTYPE_SH7734)
--	.hw_crc     = 1,
--	.select_mii = 1,
--#else
- 	.irq_flags	= IRQF_SHARED,
--#endif
- };
--#endif
- 
- static void sh_eth_chip_reset_r8a7740(struct net_device *ndev)
- {
-@@ -635,25 +657,6 @@ static void sh_eth_chip_reset_r8a7740(struct net_device *ndev)
- 	sh_eth_select_mii(ndev);
- }
- 
--static void sh_eth_set_rate_gether(struct net_device *ndev)
--{
--	struct sh_eth_private *mdp = netdev_priv(ndev);
--
--	switch (mdp->speed) {
--	case 10: /* 10BASE */
--		sh_eth_write(ndev, GECMR_10, GECMR);
--		break;
--	case 100:/* 100BASE */
--		sh_eth_write(ndev, GECMR_100, GECMR);
--		break;
--	case 1000: /* 1000BASE */
--		sh_eth_write(ndev, GECMR_1000, GECMR);
--		break;
--	default:
--		break;
--	}
--}
--
- /* R8A7740 */
- static struct sh_eth_cpu_data r8a7740_data = {
- 	.chip_reset	= sh_eth_chip_reset_r8a7740,
-@@ -2710,6 +2713,8 @@ static const struct dev_pm_ops sh_eth_dev_pm_ops = {
- static struct platform_device_id sh_eth_id_table[] = {
- 	{ "sh7619-ether", (kernel_ulong_t)&sh7619_data },
- 	{ "sh771x-ether", (kernel_ulong_t)&sh771x_data },
-+	{ "sh7734-gether", (kernel_ulong_t)&sh7734_data },
-+	{ "sh7763-gether", (kernel_ulong_t)&sh7763_data },
- 	{ "r8a7740-gether", (kernel_ulong_t)&r8a7740_data },
- 	{ CARDNAME },
- 	{ }
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0502-sh_eth-get-SH7757-support-out-of-ifdef.patch b/patches.renesas/0502-sh_eth-get-SH7757-support-out-of-ifdef.patch
deleted file mode 100644
index 67314cb5739f8..0000000000000
--- a/patches.renesas/0502-sh_eth-get-SH7757-support-out-of-ifdef.patch
+++ /dev/null
@@ -1,139 +0,0 @@
-From bdd0eb06ad089d1dbdf30e0709bed488224faa9a Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Fri, 7 Jun 2013 13:59:21 +0000
-Subject: sh_eth: get SH7757 support out of #ifdef
-
-Get the SH7757 code/data in the driver out of #ifdef by adding "sh7757-ether"
-and "sh7757-gether" to the platform driver's ID table.  Note that we can remove
-SH_ETH_HAS_BOTH_MODULES and sh_eth_get_cpu_data().
-Change the Ether/GEther platform devices' names in the SH platform code
-accordingly.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit 24549e2a0f33628b5160eac16c6aebf1cfaf22f1)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/sh/boards/board-sh7757lcr.c      |  8 ++++----
- drivers/net/ethernet/renesas/sh_eth.c | 28 ++++++++--------------------
- 2 files changed, 12 insertions(+), 24 deletions(-)
-
-diff --git a/arch/sh/boards/board-sh7757lcr.c b/arch/sh/boards/board-sh7757lcr.c
-index 41f86702..4f114d1c 100644
---- a/arch/sh/boards/board-sh7757lcr.c
-+++ b/arch/sh/boards/board-sh7757lcr.c
-@@ -82,7 +82,7 @@ static struct sh_eth_plat_data sh7757_eth0_pdata = {
- };
- 
- static struct platform_device sh7757_eth0_device = {
--	.name		= "sh-eth",
-+	.name		= "sh7757-ether",
- 	.resource	= sh_eth0_resources,
- 	.id		= 0,
- 	.num_resources	= ARRAY_SIZE(sh_eth0_resources),
-@@ -111,7 +111,7 @@ static struct sh_eth_plat_data sh7757_eth1_pdata = {
- };
- 
- static struct platform_device sh7757_eth1_device = {
--	.name		= "sh-eth",
-+	.name		= "sh7757-ether",
- 	.resource	= sh_eth1_resources,
- 	.id		= 1,
- 	.num_resources	= ARRAY_SIZE(sh_eth1_resources),
-@@ -157,7 +157,7 @@ static struct sh_eth_plat_data sh7757_eth_giga0_pdata = {
- };
- 
- static struct platform_device sh7757_eth_giga0_device = {
--	.name		= "sh-eth",
-+	.name		= "sh7757-gether",
- 	.resource	= sh_eth_giga0_resources,
- 	.id		= 2,
- 	.num_resources	= ARRAY_SIZE(sh_eth_giga0_resources),
-@@ -192,7 +192,7 @@ static struct sh_eth_plat_data sh7757_eth_giga1_pdata = {
- };
- 
- static struct platform_device sh7757_eth_giga1_device = {
--	.name		= "sh-eth",
-+	.name		= "sh7757-gether",
- 	.resource	= sh_eth_giga1_resources,
- 	.id		= 3,
- 	.num_resources	= ARRAY_SIZE(sh_eth_giga1_resources),
-diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
-index bdc3f20f..9da357f1 100644
---- a/drivers/net/ethernet/renesas/sh_eth.c
-+++ b/drivers/net/ethernet/renesas/sh_eth.c
-@@ -433,10 +433,9 @@ static struct sh_eth_cpu_data sh_eth_my_cpu_data = {
- 	.rpadir		= 1,
- 	.rpadir_value	= 0x00020000, /* NET_IP_ALIGN assumed to be 2 */
- };
--#elif defined(CONFIG_CPU_SUBTYPE_SH7757)
--#define SH_ETH_HAS_BOTH_MODULES	1
-+#endif
- 
--static void sh_eth_set_rate(struct net_device *ndev)
-+static void sh_eth_set_rate_sh7757(struct net_device *ndev)
- {
- 	struct sh_eth_private *mdp = netdev_priv(ndev);
- 
-@@ -453,9 +452,9 @@ static void sh_eth_set_rate(struct net_device *ndev)
- }
- 
- /* SH7757 */
--static struct sh_eth_cpu_data sh_eth_my_cpu_data = {
--	.set_duplex		= sh_eth_set_duplex,
--	.set_rate		= sh_eth_set_rate,
-+static struct sh_eth_cpu_data sh7757_data = {
-+	.set_duplex	= sh_eth_set_duplex,
-+	.set_rate	= sh_eth_set_rate_sh7757,
- 
- 	.eesipr_value	= DMAC_M_RFRMER | DMAC_M_ECI | 0x003fffff,
- 	.rmcr_value	= 0x00000001,
-@@ -521,7 +520,7 @@ static void sh_eth_set_rate_giga(struct net_device *ndev)
- }
- 
- /* SH7757(GETHERC) */
--static struct sh_eth_cpu_data sh_eth_my_cpu_data_giga = {
-+static struct sh_eth_cpu_data sh7757_data_giga = {
- 	.chip_reset	= sh_eth_chip_reset_giga,
- 	.set_duplex	= sh_eth_set_duplex,
- 	.set_rate	= sh_eth_set_rate_giga,
-@@ -552,15 +551,6 @@ static struct sh_eth_cpu_data sh_eth_my_cpu_data_giga = {
- 	.tsu		= 1,
- };
- 
--static struct sh_eth_cpu_data *sh_eth_get_cpu_data(struct sh_eth_private *mdp)
--{
--	if (sh_eth_is_gether(mdp))
--		return &sh_eth_my_cpu_data_giga;
--	else
--		return &sh_eth_my_cpu_data;
--}
--#endif
--
- static void sh_eth_chip_reset(struct net_device *ndev)
- {
- 	struct sh_eth_private *mdp = netdev_priv(ndev);
-@@ -2588,11 +2578,7 @@ static int sh_eth_drv_probe(struct platform_device *pdev)
- 	mdp->reg_offset = sh_eth_get_register_offset(pd->register_type);
- 
- 	/* set cpu data */
--#if defined(SH_ETH_HAS_BOTH_MODULES)
--	mdp->cd = sh_eth_get_cpu_data(mdp);
--#else
- 	mdp->cd = &sh_eth_my_cpu_data;
--#endif
- 	if (id->driver_data)
- 		mdp->cd = (struct sh_eth_cpu_data *)id->driver_data;
- 	sh_eth_set_default_cpu_data(mdp->cd);
-@@ -2714,6 +2700,8 @@ static struct platform_device_id sh_eth_id_table[] = {
- 	{ "sh7619-ether", (kernel_ulong_t)&sh7619_data },
- 	{ "sh771x-ether", (kernel_ulong_t)&sh771x_data },
- 	{ "sh7734-gether", (kernel_ulong_t)&sh7734_data },
-+	{ "sh7757-ether", (kernel_ulong_t)&sh7757_data },
-+	{ "sh7757-gether", (kernel_ulong_t)&sh7757_data_giga },
- 	{ "sh7763-gether", (kernel_ulong_t)&sh7763_data },
- 	{ "r8a7740-gether", (kernel_ulong_t)&r8a7740_data },
- 	{ CARDNAME },
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0503-sh_eth-get-SH7724-support-out-of-ifdef.patch b/patches.renesas/0503-sh_eth-get-SH7724-support-out-of-ifdef.patch
deleted file mode 100644
index c2d4c3f74cb18..0000000000000
--- a/patches.renesas/0503-sh_eth-get-SH7724-support-out-of-ifdef.patch
+++ /dev/null
@@ -1,110 +0,0 @@
-From 3a58fc67a2e4db1db7540517306c68580a8e5513 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Fri, 7 Jun 2013 14:03:37 +0000
-Subject: sh_eth: get SH7724 support out of #ifdef
-
-Get the SH7724 code/data in the driver out of #ifdef by adding "r8a7724-ether"
-to the platform driver's ID table. Change the Ether platform device's name in
-the SH platform code accordingly.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit 9c3beaabb951d672b1534c7f56f84054b088f879)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- arch/sh/boards/mach-ecovec24/setup.c   |  4 ++--
- arch/sh/boards/mach-se/7724/setup.c    |  4 ++--
- arch/sh/kernel/cpu/sh4a/clock-sh7724.c |  2 +-
- drivers/net/ethernet/renesas/sh_eth.c  | 10 +++++-----
- 4 files changed, 10 insertions(+), 10 deletions(-)
-
-diff --git a/arch/sh/boards/mach-ecovec24/setup.c b/arch/sh/boards/mach-ecovec24/setup.c
-index 764530c8..61fade0f 100644
---- a/arch/sh/boards/mach-ecovec24/setup.c
-+++ b/arch/sh/boards/mach-ecovec24/setup.c
-@@ -165,8 +165,8 @@ static struct sh_eth_plat_data sh_eth_plat = {
- };
- 
- static struct platform_device sh_eth_device = {
--	.name = "sh-eth",
--	.id	= 0,
-+	.name = "sh7724-ether",
-+	.id = 0,
- 	.dev = {
- 		.platform_data = &sh_eth_plat,
- 	},
-diff --git a/arch/sh/boards/mach-se/7724/setup.c b/arch/sh/boards/mach-se/7724/setup.c
-index 4010e63e..b70180ef 100644
---- a/arch/sh/boards/mach-se/7724/setup.c
-+++ b/arch/sh/boards/mach-se/7724/setup.c
-@@ -380,8 +380,8 @@ static struct sh_eth_plat_data sh_eth_plat = {
- };
- 
- static struct platform_device sh_eth_device = {
--	.name = "sh-eth",
--	.id	= 0,
-+	.name = "sh7724-ether",
-+	.id = 0,
- 	.dev = {
- 		.platform_data = &sh_eth_plat,
- 	},
-diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
-index 5f30f805..0128af33 100644
---- a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
-+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
-@@ -329,7 +329,7 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[HWBLK_IIC0]),
- 	CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[HWBLK_IIC1]),
- 	CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[HWBLK_MMC]),
--	CLKDEV_DEV_ID("sh-eth.0", &mstp_clks[HWBLK_ETHER]),
-+	CLKDEV_DEV_ID("sh7724-ether.0", &mstp_clks[HWBLK_ETHER]),
- 	CLKDEV_CON_ID("atapi0", &mstp_clks[HWBLK_ATAPI]),
- 	CLKDEV_CON_ID("tpu0", &mstp_clks[HWBLK_TPU]),
- 	CLKDEV_CON_ID("irda0", &mstp_clks[HWBLK_IRDA]),
-diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
-index 9da357f1..4af9cdba 100644
---- a/drivers/net/ethernet/renesas/sh_eth.c
-+++ b/drivers/net/ethernet/renesas/sh_eth.c
-@@ -393,9 +393,9 @@ static struct sh_eth_cpu_data sh_eth_my_cpu_data = {
- 	.tpauser	= 1,
- 	.hw_swap	= 1,
- };
--#elif defined(CONFIG_CPU_SUBTYPE_SH7724)
-+#endif
- 
--static void sh_eth_set_rate(struct net_device *ndev)
-+static void sh_eth_set_rate_sh7724(struct net_device *ndev)
- {
- 	struct sh_eth_private *mdp = netdev_priv(ndev);
- 
-@@ -412,9 +412,9 @@ static void sh_eth_set_rate(struct net_device *ndev)
- }
- 
- /* SH7724 */
--static struct sh_eth_cpu_data sh_eth_my_cpu_data = {
-+static struct sh_eth_cpu_data sh7724_data = {
- 	.set_duplex	= sh_eth_set_duplex,
--	.set_rate	= sh_eth_set_rate,
-+	.set_rate	= sh_eth_set_rate_sh7724,
- 
- 	.ecsr_value	= ECSR_PSRTO | ECSR_LCHNG | ECSR_ICD,
- 	.ecsipr_value	= ECSIPR_PSRTOIP | ECSIPR_LCHNGIP | ECSIPR_ICDIP,
-@@ -433,7 +433,6 @@ static struct sh_eth_cpu_data sh_eth_my_cpu_data = {
- 	.rpadir		= 1,
- 	.rpadir_value	= 0x00020000, /* NET_IP_ALIGN assumed to be 2 */
- };
--#endif
- 
- static void sh_eth_set_rate_sh7757(struct net_device *ndev)
- {
-@@ -2699,6 +2698,7 @@ static const struct dev_pm_ops sh_eth_dev_pm_ops = {
- static struct platform_device_id sh_eth_id_table[] = {
- 	{ "sh7619-ether", (kernel_ulong_t)&sh7619_data },
- 	{ "sh771x-ether", (kernel_ulong_t)&sh771x_data },
-+	{ "sh7724-ether", (kernel_ulong_t)&sh7724_data },
- 	{ "sh7734-gether", (kernel_ulong_t)&sh7734_data },
- 	{ "sh7757-ether", (kernel_ulong_t)&sh7757_data },
- 	{ "sh7757-gether", (kernel_ulong_t)&sh7757_data_giga },
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0504-sh_eth-get-R8A777x-support-out-of-ifdef.patch b/patches.renesas/0504-sh_eth-get-R8A777x-support-out-of-ifdef.patch
deleted file mode 100644
index 2c148baa9de1d..0000000000000
--- a/patches.renesas/0504-sh_eth-get-R8A777x-support-out-of-ifdef.patch
+++ /dev/null
@@ -1,108 +0,0 @@
-From b065eb241bb4db6c028fe7a0b37c438038664cca Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Fri, 7 Jun 2013 14:05:59 +0000
-Subject: sh_eth: get R8A777x support out of #ifdef
-
-Get the R-Car code/data in the driver out of #ifdef by adding "r8a777x-ether" to
-the platfrom driver's  ID table; since it's the last #ifdef, we remove CARDNAME
-from the  ID table and no longer check  the driver data before  assigning it to
-'mdp->cd'...
-Change the Ether platform device's name in the ARM platform code accordingly.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit 589ebdef7e3107401bf96a9c660753d397329ee9)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-	arch/arm/mach-shmobile/clock-r8a7778.c
-	arch/arm/mach-shmobile/clock-r8a7779.c
----
- arch/arm/mach-shmobile/clock-r8a7778.c |  2 +-
- arch/arm/mach-shmobile/clock-r8a7779.c |  2 +-
- drivers/net/ethernet/renesas/sh_eth.c  | 14 +++++---------
- 3 files changed, 7 insertions(+), 11 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/clock-r8a7778.c b/arch/arm/mach-shmobile/clock-r8a7778.c
-index dea199d4..c4bf2d8f 100644
---- a/arch/arm/mach-shmobile/clock-r8a7778.c
-+++ b/arch/arm/mach-shmobile/clock-r8a7778.c
-@@ -148,7 +148,7 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP323]), /* SDHI0 */
- 	CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP322]), /* SDHI1 */
- 	CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP321]), /* SDHI2 */
--	CLKDEV_DEV_ID("sh-eth",	&mstp_clks[MSTP114]), /* Ether */
-+	CLKDEV_DEV_ID("r8a777x-ether", &mstp_clks[MSTP114]), /* Ether */
- 	CLKDEV_DEV_ID("r8a7778-vin.0", &mstp_clks[MSTP110]), /* VIN0 */
- 	CLKDEV_DEV_ID("r8a7778-vin.1", &mstp_clks[MSTP109]), /* VIN1 */
- 	CLKDEV_DEV_ID("ehci-platform", &mstp_clks[MSTP100]), /* USB EHCI port0/1 */
-diff --git a/arch/arm/mach-shmobile/clock-r8a7779.c b/arch/arm/mach-shmobile/clock-r8a7779.c
-index 6070f3a4..bd6ad922 100644
---- a/arch/arm/mach-shmobile/clock-r8a7779.c
-+++ b/arch/arm/mach-shmobile/clock-r8a7779.c
-@@ -172,7 +172,7 @@ static struct clk_lookup lookups[] = {
- 	CLKDEV_DEV_ID("rcar-pcie", &mstp_clks[MSTP116]), /* PCIe */
- 	CLKDEV_DEV_ID("sata_rcar", &mstp_clks[MSTP115]), /* SATA */
- 	CLKDEV_DEV_ID("fc600000.sata", &mstp_clks[MSTP115]), /* SATA w/DT */
--	CLKDEV_DEV_ID("sh-eth", &mstp_clks[MSTP114]), /* Ether */
-+	CLKDEV_DEV_ID("r8a777x-ether", &mstp_clks[MSTP114]), /* Ether */
- 	CLKDEV_DEV_ID("r8a7779-vin.0", &mstp_clks[MSTP110]), /* VIN0 */
- 	CLKDEV_DEV_ID("r8a7779-vin.1", &mstp_clks[MSTP109]), /* VIN1 */
- 	CLKDEV_DEV_ID("r8a7779-vin.2", &mstp_clks[MSTP108]), /* VIN2 */
-diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
-index 4af9cdba..0e1f89bb 100644
---- a/drivers/net/ethernet/renesas/sh_eth.c
-+++ b/drivers/net/ethernet/renesas/sh_eth.c
-@@ -356,8 +356,7 @@ static void __maybe_unused sh_eth_set_duplex(struct net_device *ndev)
- }
- 
- /* There is CPU dependent code */
--#if defined(CONFIG_ARCH_R8A7778) || defined(CONFIG_ARCH_R8A7779)
--static void sh_eth_set_rate(struct net_device *ndev)
-+static void sh_eth_set_rate_r8a777x(struct net_device *ndev)
- {
- 	struct sh_eth_private *mdp = netdev_priv(ndev);
- 
-@@ -374,9 +373,9 @@ static void sh_eth_set_rate(struct net_device *ndev)
- }
- 
- /* R8A7778/9 */
--static struct sh_eth_cpu_data sh_eth_my_cpu_data = {
-+static struct sh_eth_cpu_data r8a777x_data = {
- 	.set_duplex	= sh_eth_set_duplex,
--	.set_rate	= sh_eth_set_rate,
-+	.set_rate	= sh_eth_set_rate_r8a777x,
- 
- 	.ecsr_value	= ECSR_PSRTO | ECSR_LCHNG | ECSR_ICD,
- 	.ecsipr_value	= ECSIPR_PSRTOIP | ECSIPR_LCHNGIP | ECSIPR_ICDIP,
-@@ -393,7 +392,6 @@ static struct sh_eth_cpu_data sh_eth_my_cpu_data = {
- 	.tpauser	= 1,
- 	.hw_swap	= 1,
- };
--#endif
- 
- static void sh_eth_set_rate_sh7724(struct net_device *ndev)
- {
-@@ -2577,9 +2575,7 @@ static int sh_eth_drv_probe(struct platform_device *pdev)
- 	mdp->reg_offset = sh_eth_get_register_offset(pd->register_type);
- 
- 	/* set cpu data */
--	mdp->cd = &sh_eth_my_cpu_data;
--	if (id->driver_data)
--		mdp->cd = (struct sh_eth_cpu_data *)id->driver_data;
-+	mdp->cd = (struct sh_eth_cpu_data *)id->driver_data;
- 	sh_eth_set_default_cpu_data(mdp->cd);
- 
- 	/* set function */
-@@ -2704,7 +2700,7 @@ static struct platform_device_id sh_eth_id_table[] = {
- 	{ "sh7757-gether", (kernel_ulong_t)&sh7757_data_giga },
- 	{ "sh7763-gether", (kernel_ulong_t)&sh7763_data },
- 	{ "r8a7740-gether", (kernel_ulong_t)&r8a7740_data },
--	{ CARDNAME },
-+	{ "r8a777x-ether", (kernel_ulong_t)&r8a777x_data },
- 	{ }
- };
- MODULE_DEVICE_TABLE(platform, sh_eth_id_table);
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0505-sh_eth-remove-dependencies-from-Kconfig.patch b/patches.renesas/0505-sh_eth-remove-dependencies-from-Kconfig.patch
deleted file mode 100644
index 5c61790c7c5fc..0000000000000
--- a/patches.renesas/0505-sh_eth-remove-dependencies-from-Kconfig.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 999239629ebad32a58535b0ffb225c1827675ce8 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Fri, 7 Jun 2013 14:07:13 +0000
-Subject: sh_eth: remove dependencies from Kconfig
-
-Since dependence on the certain SoCs is no  longer  necessary to compile the
-driver, remove the dependency list from its Kconfig entry which is a popular
-demand anyway...
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit eb770bf430bc1d4e1d23af353a80cfae2b237e66)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/net/ethernet/renesas/Kconfig | 6 ------
- 1 file changed, 6 deletions(-)
-
-diff --git a/drivers/net/ethernet/renesas/Kconfig b/drivers/net/ethernet/renesas/Kconfig
-index bed9841d..267eac05 100644
---- a/drivers/net/ethernet/renesas/Kconfig
-+++ b/drivers/net/ethernet/renesas/Kconfig
-@@ -4,12 +4,6 @@
- 
- config SH_ETH
- 	tristate "Renesas SuperH Ethernet support"
--	depends on (SUPERH || ARCH_SHMOBILE) && \
--		(CPU_SUBTYPE_SH7710 || CPU_SUBTYPE_SH7712 || \
--		 CPU_SUBTYPE_SH7763 || CPU_SUBTYPE_SH7619 || \
--		 CPU_SUBTYPE_SH7724 || CPU_SUBTYPE_SH7734 || \
--		 CPU_SUBTYPE_SH7757 || ARCH_R8A7740 || \
--		 ARCH_R8A7778 || ARCH_R8A7779)
- 	select CRC32
- 	select NET_CORE
- 	select MII
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0506-sh_eth-Fix-warnings-on-64-bit.patch b/patches.renesas/0506-sh_eth-Fix-warnings-on-64-bit.patch
deleted file mode 100644
index 8481c979c1956..0000000000000
--- a/patches.renesas/0506-sh_eth-Fix-warnings-on-64-bit.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From f2649bdb1df6020e1c10d4cf8a0b7553a6db8ea4 Mon Sep 17 00:00:00 2001
-From: "David S. Miller" <davem@davemloft.net>
-Date: Fri, 7 Jun 2013 23:40:41 -0700
-Subject: sh_eth: Fix warnings on 64-bit.
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Don't cast a plain integer to a pointer.
-
-drivers/net/ethernet/renesas/sh_eth.c: In function ‘sh_eth_chip_reset_giga’:
-drivers/net/ethernet/renesas/sh_eth.c:482:22: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
-drivers/net/ethernet/renesas/sh_eth.c:483:22: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
-drivers/net/ethernet/renesas/sh_eth.c:492:22: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
-drivers/net/ethernet/renesas/sh_eth.c:493:22: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
-
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit e403d295817cf9f8be3110eb7ee1a03981287495)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/net/ethernet/renesas/sh_eth.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
-index 0e1f89bb..f5cb5416 100644
---- a/drivers/net/ethernet/renesas/sh_eth.c
-+++ b/drivers/net/ethernet/renesas/sh_eth.c
-@@ -472,7 +472,7 @@ static struct sh_eth_cpu_data sh7757_data = {
- 	.rpadir_value   = 2 << 16,
- };
- 
--#define SH_GIGA_ETH_BASE	0xfee00000
-+#define SH_GIGA_ETH_BASE	0xfee00000UL
- #define GIGA_MALR(port)		(SH_GIGA_ETH_BASE + 0x800 * (port) + 0x05c8)
- #define GIGA_MAHR(port)		(SH_GIGA_ETH_BASE + 0x800 * (port) + 0x05c0)
- static void sh_eth_chip_reset_giga(struct net_device *ndev)
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0507-sh_eth-split-sh_eth_netdev_ops.patch b/patches.renesas/0507-sh_eth-split-sh_eth_netdev_ops.patch
deleted file mode 100644
index 5cb7c487056b7..0000000000000
--- a/patches.renesas/0507-sh_eth-split-sh_eth_netdev_ops.patch
+++ /dev/null
@@ -1,77 +0,0 @@
-From 14983cd66d94a51d6bc3eab41f8069979c8037c4 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Thu, 13 Jun 2013 00:55:34 +0400
-Subject: sh_eth: split 'sh_eth_netdev_ops'
-
-Commit 9f86134155047720a3685cda21467f68695152d2 (sh_eth: remove SH_ETH_HAS_TSU)
-removes 'const' from 'sh_eth_netdev_ops'  and modifies it in case TSU registers
-are present. I've originally suggested to Iwamatsu-san to split  this structure
-in two instead and afterwards Dave M. suggested doing the same.
-Split 'sh_eth_netdev_ops_tsu' from 'sh_eth_netdev_ops', making both 'const', and
-assigning 'ndev->detdev_ops'  depending on the presence of TSU registers.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit 8f728d7934c77f63e89abcc96b46a7a98416d5c1)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/net/ethernet/renesas/sh_eth.c | 29 ++++++++++++++++++++---------
- 1 file changed, 20 insertions(+), 9 deletions(-)
-
-diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
-index f5cb5416..a651f766 100644
---- a/drivers/net/ethernet/renesas/sh_eth.c
-+++ b/drivers/net/ethernet/renesas/sh_eth.c
-@@ -2497,7 +2497,7 @@ static const u16 *sh_eth_get_register_offset(int register_type)
- 	return reg_offset;
- }
- 
--static struct net_device_ops sh_eth_netdev_ops = {
-+static const struct net_device_ops sh_eth_netdev_ops = {
- 	.ndo_open		= sh_eth_open,
- 	.ndo_stop		= sh_eth_close,
- 	.ndo_start_xmit		= sh_eth_start_xmit,
-@@ -2509,6 +2509,21 @@ static struct net_device_ops sh_eth_netdev_ops = {
- 	.ndo_change_mtu		= eth_change_mtu,
- };
- 
-+static const struct net_device_ops sh_eth_netdev_ops_tsu = {
-+	.ndo_open		= sh_eth_open,
-+	.ndo_stop		= sh_eth_close,
-+	.ndo_start_xmit		= sh_eth_start_xmit,
-+	.ndo_get_stats		= sh_eth_get_stats,
-+	.ndo_set_rx_mode	= sh_eth_set_multicast_list,
-+	.ndo_vlan_rx_add_vid	= sh_eth_vlan_rx_add_vid,
-+	.ndo_vlan_rx_kill_vid	= sh_eth_vlan_rx_kill_vid,
-+	.ndo_tx_timeout		= sh_eth_tx_timeout,
-+	.ndo_do_ioctl		= sh_eth_do_ioctl,
-+	.ndo_validate_addr	= eth_validate_addr,
-+	.ndo_set_mac_address	= eth_mac_addr,
-+	.ndo_change_mtu		= eth_change_mtu,
-+};
-+
- static int sh_eth_drv_probe(struct platform_device *pdev)
- {
- 	int ret, devno = 0;
-@@ -2579,14 +2594,10 @@ static int sh_eth_drv_probe(struct platform_device *pdev)
- 	sh_eth_set_default_cpu_data(mdp->cd);
- 
- 	/* set function */
--	if (mdp->cd->tsu) {
--		sh_eth_netdev_ops.ndo_set_rx_mode = sh_eth_set_multicast_list;
--		sh_eth_netdev_ops.ndo_vlan_rx_add_vid = sh_eth_vlan_rx_add_vid;
--		sh_eth_netdev_ops.ndo_vlan_rx_kill_vid =
--			sh_eth_vlan_rx_kill_vid;
--	}
--
--	ndev->netdev_ops = &sh_eth_netdev_ops;
-+	if (mdp->cd->tsu)
-+		ndev->netdev_ops = &sh_eth_netdev_ops_tsu;
-+	else
-+		ndev->netdev_ops = &sh_eth_netdev_ops;
- 	SET_ETHTOOL_OPS(ndev, &sh_eth_ethtool_ops);
- 	ndev->watchdog_timeo = TX_TIMEOUT;
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0508-sh_eth-remove-__maybe_unused-annotations.patch b/patches.renesas/0508-sh_eth-remove-__maybe_unused-annotations.patch
deleted file mode 100644
index 0dd9c5775972b..0000000000000
--- a/patches.renesas/0508-sh_eth-remove-__maybe_unused-annotations.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From 5a9bf69e708354c299191567802f47586b5bf6b1 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Wed, 12 Jun 2013 03:07:29 +0400
-Subject: sh_eth: remove '__maybe_unused' annotations
-
-Now that  the SoC specific support is no longer done with help of #ifdef'fery,
-we  no longer need '__maybe_unused' annotations to sh_eth_select_mii() and
-sh_eth_set_duplex()...
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit 8e994402ad5e6ae3d391c0935f9f1dc2eeb92a5e)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/net/ethernet/renesas/sh_eth.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
-index a651f766..56de4a6b 100644
---- a/drivers/net/ethernet/renesas/sh_eth.c
-+++ b/drivers/net/ethernet/renesas/sh_eth.c
-@@ -321,7 +321,7 @@ static int sh_eth_is_gether(struct sh_eth_private *mdp)
- 		return 0;
- }
- 
--static void __maybe_unused sh_eth_select_mii(struct net_device *ndev)
-+static void sh_eth_select_mii(struct net_device *ndev)
- {
- 	u32 value = 0x0;
- 	struct sh_eth_private *mdp = netdev_priv(ndev);
-@@ -345,7 +345,7 @@ static void __maybe_unused sh_eth_select_mii(struct net_device *ndev)
- 	sh_eth_write(ndev, value, RMII_MII);
- }
- 
--static void __maybe_unused sh_eth_set_duplex(struct net_device *ndev)
-+static void sh_eth_set_duplex(struct net_device *ndev)
- {
- 	struct sh_eth_private *mdp = netdev_priv(ndev);
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0509-sh_eth-define-use-EESR_RX_CHECK-macro.patch b/patches.renesas/0509-sh_eth-define-use-EESR_RX_CHECK-macro.patch
deleted file mode 100644
index 0bd2165a804b2..0000000000000
--- a/patches.renesas/0509-sh_eth-define-use-EESR_RX_CHECK-macro.patch
+++ /dev/null
@@ -1,69 +0,0 @@
-From 3d2dbcaa3c5537719dee8411c7e6df892f1f7c97 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Wed, 19 Jun 2013 23:29:23 +0400
-Subject: sh_eth: define/use EESR_RX_CHECK macro
-
-sh_eth_interrupt() uses the same Rx interrupt mask twice to check the interrupt
-status register -- #define EESR_RX_CHECK  and use it instead.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit ea7d69e75ac06daa7bc2fca2a8317197e5e3c81c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/net/ethernet/renesas/sh_eth.c | 13 ++-----------
- drivers/net/ethernet/renesas/sh_eth.h |  8 ++++++++
- 2 files changed, 10 insertions(+), 11 deletions(-)
-
-diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
-index 56de4a6b..cc9886cb 100644
---- a/drivers/net/ethernet/renesas/sh_eth.c
-+++ b/drivers/net/ethernet/renesas/sh_eth.c
-@@ -1508,23 +1508,14 @@ static irqreturn_t sh_eth_interrupt(int irq, void *netdev)
- 	 */
- 	intr_status &= sh_eth_read(ndev, EESIPR) | DMAC_M_ECI;
- 	/* Clear interrupt */
--	if (intr_status & (EESR_FRC | EESR_RMAF | EESR_RRF |
--			EESR_RTLF | EESR_RTSF | EESR_PRE | EESR_CERF |
--			cd->tx_check | cd->eesr_err_check)) {
-+	if (intr_status & (EESR_RX_CHECK | cd->tx_check | cd->eesr_err_check)) {
- 		sh_eth_write(ndev, intr_status, EESR);
- 		ret = IRQ_HANDLED;
- 	} else
- 		goto other_irq;
- 
--	if (intr_status & (EESR_FRC | /* Frame recv*/
--			EESR_RMAF | /* Multi cast address recv*/
--			EESR_RRF  | /* Bit frame recv */
--			EESR_RTLF | /* Long frame recv*/
--			EESR_RTSF | /* short frame recv */
--			EESR_PRE  | /* PHY-LSI recv error */
--			EESR_CERF)){ /* recv frame CRC error */
-+	if (intr_status & EESR_RX_CHECK)
- 		sh_eth_rx(ndev, intr_status);
--	}
- 
- 	/* Tx Check */
- 	if (intr_status & cd->tx_check) {
-diff --git a/drivers/net/ethernet/renesas/sh_eth.h b/drivers/net/ethernet/renesas/sh_eth.h
-index 040d010b..117b3241 100644
---- a/drivers/net/ethernet/renesas/sh_eth.h
-+++ b/drivers/net/ethernet/renesas/sh_eth.h
-@@ -248,6 +248,14 @@ enum EESR_BIT {
- 	EESR_CERF	= 0x00000001,
- };
- 
-+#define EESR_RX_CHECK		(EESR_FRC  | /* Frame recv */		\
-+				 EESR_RMAF | /* Multicast address recv */ \
-+				 EESR_RRF  | /* Bit frame recv */	\
-+				 EESR_RTLF | /* Long frame recv */	\
-+				 EESR_RTSF | /* Short frame recv */	\
-+				 EESR_PRE  | /* PHY-LSI recv error */	\
-+				 EESR_CERF)  /* Recv frame CRC error */
-+
- #define DEFAULT_TX_CHECK	(EESR_FTC | EESR_CND | EESR_DLC | EESR_CD | \
- 				 EESR_RTO)
- #define DEFAULT_EESR_ERR_CHECK	(EESR_TWB | EESR_TABT | EESR_RABT | EESR_RFE | \
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0510-sh_eth-add-NAPI-support.patch b/patches.renesas/0510-sh_eth-add-NAPI-support.patch
deleted file mode 100644
index 58a7b8f8cceab..0000000000000
--- a/patches.renesas/0510-sh_eth-add-NAPI-support.patch
+++ /dev/null
@@ -1,223 +0,0 @@
-From 23522967989e4c40e5757c4e123362cad09a38cc Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Wed, 19 Jun 2013 23:30:23 +0400
-Subject: sh_eth: add NAPI support
-
-The driver hasn't used NAPI so far; implement its support at last...
-
-The patch was tested on Renesas R8A77781 BOCK-W board.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit 3719109d61ca96746c733538ec776d02a6952640)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/net/ethernet/renesas/sh_eth.c | 85 ++++++++++++++++++++++++++++++-----
- drivers/net/ethernet/renesas/sh_eth.h |  1 +
- 2 files changed, 74 insertions(+), 12 deletions(-)
-
-diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
-index cc9886cb..0389ac0e 100644
---- a/drivers/net/ethernet/renesas/sh_eth.c
-+++ b/drivers/net/ethernet/renesas/sh_eth.c
-@@ -1247,7 +1247,7 @@ static int sh_eth_txfree(struct net_device *ndev)
- }
- 
- /* Packet receive function */
--static int sh_eth_rx(struct net_device *ndev, u32 intr_status)
-+static int sh_eth_rx(struct net_device *ndev, u32 intr_status, int *quota)
- {
- 	struct sh_eth_private *mdp = netdev_priv(ndev);
- 	struct sh_eth_rxdesc *rxdesc;
-@@ -1255,6 +1255,7 @@ static int sh_eth_rx(struct net_device *ndev, u32 intr_status)
- 	int entry = mdp->cur_rx % mdp->num_rx_ring;
- 	int boguscnt = (mdp->dirty_rx + mdp->num_rx_ring) - mdp->cur_rx;
- 	struct sk_buff *skb;
-+	int exceeded = 0;
- 	u16 pkt_len = 0;
- 	u32 desc_status;
- 
-@@ -1266,6 +1267,12 @@ static int sh_eth_rx(struct net_device *ndev, u32 intr_status)
- 		if (--boguscnt < 0)
- 			break;
- 
-+		if (*quota <= 0) {
-+			exceeded = 1;
-+			break;
-+		}
-+		(*quota)--;
-+
- 		if (!(desc_status & RDFEND))
- 			ndev->stats.rx_length_errors++;
- 
-@@ -1353,7 +1360,7 @@ static int sh_eth_rx(struct net_device *ndev, u32 intr_status)
- 		sh_eth_write(ndev, EDRRR_R, EDRRR);
- 	}
- 
--	return 0;
-+	return exceeded;
- }
- 
- static void sh_eth_rcv_snd_disable(struct net_device *ndev)
-@@ -1495,7 +1502,7 @@ static irqreturn_t sh_eth_interrupt(int irq, void *netdev)
- 	struct sh_eth_private *mdp = netdev_priv(ndev);
- 	struct sh_eth_cpu_data *cd = mdp->cd;
- 	irqreturn_t ret = IRQ_NONE;
--	unsigned long intr_status;
-+	unsigned long intr_status, intr_enable;
- 
- 	spin_lock(&mdp->lock);
- 
-@@ -1506,25 +1513,41 @@ static irqreturn_t sh_eth_interrupt(int irq, void *netdev)
- 	 * and we need to fully handle it in sh_eth_error() in order to quench
- 	 * it as it doesn't get cleared by just writing 1 to the ECI bit...
- 	 */
--	intr_status &= sh_eth_read(ndev, EESIPR) | DMAC_M_ECI;
--	/* Clear interrupt */
--	if (intr_status & (EESR_RX_CHECK | cd->tx_check | cd->eesr_err_check)) {
--		sh_eth_write(ndev, intr_status, EESR);
-+	intr_enable = sh_eth_read(ndev, EESIPR);
-+	intr_status &= intr_enable | DMAC_M_ECI;
-+	if (intr_status & (EESR_RX_CHECK | cd->tx_check | cd->eesr_err_check))
- 		ret = IRQ_HANDLED;
--	} else
-+	else
- 		goto other_irq;
- 
--	if (intr_status & EESR_RX_CHECK)
--		sh_eth_rx(ndev, intr_status);
-+	if (intr_status & EESR_RX_CHECK) {
-+		if (napi_schedule_prep(&mdp->napi)) {
-+			/* Mask Rx interrupts */
-+			sh_eth_write(ndev, intr_enable & ~EESR_RX_CHECK,
-+				     EESIPR);
-+			__napi_schedule(&mdp->napi);
-+		} else {
-+			dev_warn(&ndev->dev,
-+				 "ignoring interrupt, status 0x%08lx, mask 0x%08lx.\n",
-+				 intr_status, intr_enable);
-+		}
-+	}
- 
- 	/* Tx Check */
- 	if (intr_status & cd->tx_check) {
-+		/* Clear Tx interrupts */
-+		sh_eth_write(ndev, intr_status & cd->tx_check, EESR);
-+
- 		sh_eth_txfree(ndev);
- 		netif_wake_queue(ndev);
- 	}
- 
--	if (intr_status & cd->eesr_err_check)
-+	if (intr_status & cd->eesr_err_check) {
-+		/* Clear error interrupts */
-+		sh_eth_write(ndev, intr_status & cd->eesr_err_check, EESR);
-+
- 		sh_eth_error(ndev, intr_status);
-+	}
- 
- other_irq:
- 	spin_unlock(&mdp->lock);
-@@ -1532,6 +1555,33 @@ other_irq:
- 	return ret;
- }
- 
-+static int sh_eth_poll(struct napi_struct *napi, int budget)
-+{
-+	struct sh_eth_private *mdp = container_of(napi, struct sh_eth_private,
-+						  napi);
-+	struct net_device *ndev = napi->dev;
-+	int quota = budget;
-+	unsigned long intr_status;
-+
-+	for (;;) {
-+		intr_status = sh_eth_read(ndev, EESR);
-+		if (!(intr_status & EESR_RX_CHECK))
-+			break;
-+		/* Clear Rx interrupts */
-+		sh_eth_write(ndev, intr_status & EESR_RX_CHECK, EESR);
-+
-+		if (sh_eth_rx(ndev, intr_status, &quota))
-+			goto out;
-+	}
-+
-+	napi_complete(napi);
-+
-+	/* Reenable Rx interrupts */
-+	sh_eth_write(ndev, mdp->cd->eesipr_value, EESIPR);
-+out:
-+	return budget - quota;
-+}
-+
- /* PHY state control function */
- static void sh_eth_adjust_link(struct net_device *ndev)
- {
-@@ -1843,6 +1893,8 @@ static int sh_eth_open(struct net_device *ndev)
- 	if (ret)
- 		goto out_free_irq;
- 
-+	napi_enable(&mdp->napi);
-+
- 	return ret;
- 
- out_free_irq:
-@@ -1938,6 +1990,8 @@ static int sh_eth_close(struct net_device *ndev)
- {
- 	struct sh_eth_private *mdp = netdev_priv(ndev);
- 
-+	napi_disable(&mdp->napi);
-+
- 	netif_stop_queue(ndev);
- 
- 	/* Disable interrupts by clearing the interrupt mask. */
-@@ -2627,10 +2681,12 @@ static int sh_eth_drv_probe(struct platform_device *pdev)
- 		}
- 	}
- 
-+	netif_napi_add(ndev, &mdp->napi, sh_eth_poll, 64);
-+
- 	/* network device register */
- 	ret = register_netdev(ndev);
- 	if (ret)
--		goto out_release;
-+		goto out_napi_del;
- 
- 	/* mdio bus init */
- 	ret = sh_mdio_init(ndev, pdev->id, pd);
-@@ -2648,6 +2704,9 @@ static int sh_eth_drv_probe(struct platform_device *pdev)
- out_unregister:
- 	unregister_netdev(ndev);
- 
-+out_napi_del:
-+	netif_napi_del(&mdp->napi);
-+
- out_release:
- 	/* net_dev free */
- 	if (ndev)
-@@ -2660,9 +2719,11 @@ out:
- static int sh_eth_drv_remove(struct platform_device *pdev)
- {
- 	struct net_device *ndev = platform_get_drvdata(pdev);
-+	struct sh_eth_private *mdp = netdev_priv(ndev);
- 
- 	sh_mdio_release(ndev);
- 	unregister_netdev(ndev);
-+	netif_napi_del(&mdp->napi);
- 	pm_runtime_disable(&pdev->dev);
- 	free_netdev(ndev);
- 	platform_set_drvdata(pdev, NULL);
-diff --git a/drivers/net/ethernet/renesas/sh_eth.h b/drivers/net/ethernet/renesas/sh_eth.h
-index 117b3241..99beb393 100644
---- a/drivers/net/ethernet/renesas/sh_eth.h
-+++ b/drivers/net/ethernet/renesas/sh_eth.h
-@@ -505,6 +505,7 @@ struct sh_eth_private {
- 	u32 cur_tx, dirty_tx;
- 	u32 rx_buf_sz;		/* Based on MTU+slack. */
- 	int edmac_endian;
-+	struct napi_struct napi;
- 	/* MII transceiver section. */
- 	u32 phy_id;					/* PHY ID */
- 	struct mii_bus *mii_bus;	/* MDIO bus control */
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0511-sh_eth-remove-tx_error_check-field-of-struct-sh_eth_.patch b/patches.renesas/0511-sh_eth-remove-tx_error_check-field-of-struct-sh_eth_.patch
deleted file mode 100644
index 4be0a72fb1bf8..0000000000000
--- a/patches.renesas/0511-sh_eth-remove-tx_error_check-field-of-struct-sh_eth_.patch
+++ /dev/null
@@ -1,118 +0,0 @@
-From b26562eed71621d335808185a2b467a62ef01827 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Thu, 20 Jun 2013 02:22:56 +0400
-Subject: sh_eth: remove 'tx_error_check' field of 'struct sh_eth_cpu_data'
-
-The 'tx_error_check' field of 'struct sh_eth_cpu_data' is write-only, so remove
-it along with the DEFAULT_TX_ERROR_CHECK macro.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit 8f80899665c4baca5fe18e919a18db818c3e11fa)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-	drivers/net/ethernet/renesas/sh_eth.c
----
- drivers/net/ethernet/renesas/sh_eth.c | 14 --------------
- drivers/net/ethernet/renesas/sh_eth.h |  3 ---
- 2 files changed, 17 deletions(-)
-
-diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
-index 0389ac0e..d8899f63 100644
---- a/drivers/net/ethernet/renesas/sh_eth.c
-+++ b/drivers/net/ethernet/renesas/sh_eth.c
-@@ -385,7 +385,6 @@ static struct sh_eth_cpu_data r8a777x_data = {
- 	.eesr_err_check	= EESR_TWB | EESR_TABT | EESR_RABT | EESR_RFE |
- 			  EESR_RDE | EESR_RFRMER | EESR_TFE | EESR_TDE |
- 			  EESR_ECI,
--	.tx_error_check	= EESR_TWB | EESR_TABT | EESR_TDE | EESR_TFE,
- 
- 	.apr		= 1,
- 	.mpr		= 1,
-@@ -422,7 +421,6 @@ static struct sh_eth_cpu_data sh7724_data = {
- 	.eesr_err_check	= EESR_TWB | EESR_TABT | EESR_RABT | EESR_RFE |
- 			  EESR_RDE | EESR_RFRMER | EESR_TFE | EESR_TDE |
- 			  EESR_ECI,
--	.tx_error_check	= EESR_TWB | EESR_TABT | EESR_TDE | EESR_TFE,
- 
- 	.apr		= 1,
- 	.mpr		= 1,
-@@ -460,7 +458,6 @@ static struct sh_eth_cpu_data sh7757_data = {
- 	.eesr_err_check	= EESR_TWB | EESR_TABT | EESR_RABT | EESR_RFE |
- 			  EESR_RDE | EESR_RFRMER | EESR_TFE | EESR_TDE |
- 			  EESR_ECI,
--	.tx_error_check	= EESR_TWB | EESR_TABT | EESR_TDE | EESR_TFE,
- 
- 	.irq_flags	= IRQF_SHARED,
- 	.apr		= 1,
-@@ -530,8 +527,6 @@ static struct sh_eth_cpu_data sh7757_data_giga = {
- 	.eesr_err_check	= EESR_TWB1 | EESR_TWB | EESR_TABT | EESR_RABT |
- 			  EESR_RFE | EESR_RDE | EESR_RFRMER | EESR_TFE |
- 			  EESR_TDE | EESR_ECI,
--	.tx_error_check	= EESR_TWB1 | EESR_TWB | EESR_TABT | EESR_TDE | \
--			  EESR_TFE,
- 	.fdr_value	= 0x0000072f,
- 	.rmcr_value	= 0x00000001,
- 
-@@ -590,8 +585,6 @@ static struct sh_eth_cpu_data sh7734_data = {
- 	.eesr_err_check	= EESR_TWB1 | EESR_TWB | EESR_TABT | EESR_RABT | \
- 			  EESR_RDE | EESR_RFRMER | EESR_TFE | EESR_TDE | \
- 			  EESR_ECI,
--	.tx_error_check	= EESR_TWB1 | EESR_TWB | EESR_TABT | EESR_TDE | \
--			  EESR_TFE,
- 
- 	.apr		= 1,
- 	.mpr		= 1,
-@@ -619,8 +612,6 @@ static struct sh_eth_cpu_data sh7763_data = {
- 	.eesr_err_check	= EESR_TWB1 | EESR_TWB | EESR_TABT | EESR_RABT |
- 			  EESR_RFE | EESR_RDE | EESR_RFRMER | EESR_TFE |
- 			  EESR_TDE | EESR_ECI,
--	.tx_error_check	= EESR_TWB1 | EESR_TWB | EESR_TABT | EESR_TDE | \
--			  EESR_TFE,
- 
- 	.apr		= 1,
- 	.mpr		= 1,
-@@ -658,8 +649,6 @@ static struct sh_eth_cpu_data r8a7740_data = {
- 	.eesr_err_check	= EESR_TWB1 | EESR_TWB | EESR_TABT | EESR_RABT |
- 			  EESR_RFE | EESR_RDE | EESR_RFRMER | EESR_TFE |
- 			  EESR_TDE | EESR_ECI,
--	.tx_error_check	= EESR_TWB1 | EESR_TWB | EESR_TABT | EESR_TDE | \
--			  EESR_TFE,
- 
- 	.apr		= 1,
- 	.mpr		= 1,
-@@ -709,9 +698,6 @@ static void sh_eth_set_default_cpu_data(struct sh_eth_cpu_data *cd)
- 
- 	if (!cd->eesr_err_check)
- 		cd->eesr_err_check = DEFAULT_EESR_ERR_CHECK;
--
--	if (!cd->tx_error_check)
--		cd->tx_error_check = DEFAULT_TX_ERROR_CHECK;
- }
- 
- static int sh_eth_check_reset(struct net_device *ndev)
-diff --git a/drivers/net/ethernet/renesas/sh_eth.h b/drivers/net/ethernet/renesas/sh_eth.h
-index 99beb393..5a06aaf1 100644
---- a/drivers/net/ethernet/renesas/sh_eth.h
-+++ b/drivers/net/ethernet/renesas/sh_eth.h
-@@ -261,8 +261,6 @@ enum EESR_BIT {
- #define DEFAULT_EESR_ERR_CHECK	(EESR_TWB | EESR_TABT | EESR_RABT | EESR_RFE | \
- 				 EESR_RDE | EESR_RFRMER | EESR_ADE | \
- 				 EESR_TFE | EESR_TDE | EESR_ECI)
--#define DEFAULT_TX_ERROR_CHECK	(EESR_TWB | EESR_TABT | EESR_ADE | EESR_TDE | \
--				 EESR_TFE)
- 
- /* EESIPR */
- enum DMAC_IM_BIT {
-@@ -468,7 +466,6 @@ struct sh_eth_cpu_data {
- 	/* interrupt checking mask */
- 	unsigned long tx_check;
- 	unsigned long eesr_err_check;
--	unsigned long tx_error_check;
- 
- 	/* hardware features */
- 	unsigned long irq_flags;	/* IRQ configuration flags */
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0512-sh_eth-remove-redundant-bits-from-eesipr_value-field.patch b/patches.renesas/0512-sh_eth-remove-redundant-bits-from-eesipr_value-field.patch
deleted file mode 100644
index ba46ecde43178..0000000000000
--- a/patches.renesas/0512-sh_eth-remove-redundant-bits-from-eesipr_value-field.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From 2cd11e0ae55bac093bb99ab311d4a82d3295e77d Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Thu, 20 Jun 2013 02:24:54 +0400
-Subject: sh_eth: remove redundant bits from 'eesipr_value' field initializer
-
-For SH7724 'eesipr_value' field initializer includes DMAC_M_RFRMER & DMAC_M_ECI
-bits which are already contained in 0x01ff009f -- remove them.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit a80c3de714bc4855747faf5f00e8203fb800e6bb)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/net/ethernet/renesas/sh_eth.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
-index d8899f63..110aa717 100644
---- a/drivers/net/ethernet/renesas/sh_eth.c
-+++ b/drivers/net/ethernet/renesas/sh_eth.c
-@@ -415,7 +415,7 @@ static struct sh_eth_cpu_data sh7724_data = {
- 
- 	.ecsr_value	= ECSR_PSRTO | ECSR_LCHNG | ECSR_ICD,
- 	.ecsipr_value	= ECSIPR_PSRTOIP | ECSIPR_LCHNGIP | ECSIPR_ICDIP,
--	.eesipr_value	= DMAC_M_RFRMER | DMAC_M_ECI | 0x01ff009f,
-+	.eesipr_value	= 0x01ff009f,
- 
- 	.tx_check	= EESR_FTC | EESR_CND | EESR_DLC | EESR_CD | EESR_RTO,
- 	.eesr_err_check	= EESR_TWB | EESR_TABT | EESR_RABT | EESR_RFE |
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0513-sh_eth-cleanup-enum-TD_STS_BIT.patch b/patches.renesas/0513-sh_eth-cleanup-enum-TD_STS_BIT.patch
deleted file mode 100644
index afd8d43cffcc0..0000000000000
--- a/patches.renesas/0513-sh_eth-cleanup-enum-TD_STS_BIT.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From 56c2d49912b76156790a726de1ab39cca150e463 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Thu, 20 Jun 2013 02:26:14 +0400
-Subject: sh_eth: cleanup 'enum TD_STS_BIT'
-
-Fix the comment to 'enum TD_STS_BIT', reformat the values, and add a couple of
-values missing before (though unused by the driver).
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit c8bbe37aa60a3ef694df65fed4e905bd4b1bd73c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/net/ethernet/renesas/sh_eth.h | 8 ++++----
- 1 file changed, 4 insertions(+), 4 deletions(-)
-
-diff --git a/drivers/net/ethernet/renesas/sh_eth.h b/drivers/net/ethernet/renesas/sh_eth.h
-index 5a06aaf1..a0257f40 100644
---- a/drivers/net/ethernet/renesas/sh_eth.h
-+++ b/drivers/net/ethernet/renesas/sh_eth.h
-@@ -302,11 +302,11 @@ enum FCFTR_BIT {
- #define DEFAULT_FIFO_F_D_RFF	(FCFTR_RFF2 | FCFTR_RFF1 | FCFTR_RFF0)
- #define DEFAULT_FIFO_F_D_RFD	(FCFTR_RFD2 | FCFTR_RFD1 | FCFTR_RFD0)
- 
--/* Transfer descriptor bit */
-+/* Transmit descriptor bit */
- enum TD_STS_BIT {
--	TD_TACT = 0x80000000,
--	TD_TDLE = 0x40000000, TD_TFP1 = 0x20000000,
--	TD_TFP0 = 0x10000000,
-+	TD_TACT = 0x80000000, TD_TDLE = 0x40000000,
-+	TD_TFP1 = 0x20000000, TD_TFP0 = 0x10000000,
-+	TD_TFE  = 0x08000000, TD_TWBI = 0x04000000,
- };
- #define TDF1ST	TD_TFP1
- #define TDFEND	TD_TFP0
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0514-sh_eth-get-R8A7740-Rx-descriptor-word-0-shift-out-of.patch b/patches.renesas/0514-sh_eth-get-R8A7740-Rx-descriptor-word-0-shift-out-of.patch
deleted file mode 100644
index f84b3c3a27152..0000000000000
--- a/patches.renesas/0514-sh_eth-get-R8A7740-Rx-descriptor-word-0-shift-out-of.patch
+++ /dev/null
@@ -1,65 +0,0 @@
-From 3d60fb22bd1b426f26924810233909d1610e9cbc Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Thu, 13 Jun 2013 22:12:45 +0400
-Subject: sh_eth: get R8A7740 Rx descriptor word 0 shift out of #ifdef
-
-The only R8A7740 specific #ifdef hindering  ARM multiplatform build is  left in
-sh_eth_rx(): it covers the code shifting Rx buffer descriptor word 0 by 16. Get
-rid of the #ifdef by adding 'shift_rd0' field to the  'struct sh_eth_cpu_data',
-making the shift dependent on it, and setting it to 1 for the R8A7740 case...
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit ac8025a643a0e0beb81f3f37ca693364c6b77858)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/net/ethernet/renesas/sh_eth.c | 6 +++---
- drivers/net/ethernet/renesas/sh_eth.h | 1 +
- 2 files changed, 4 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
-index 110aa717..6ea2b9c4 100644
---- a/drivers/net/ethernet/renesas/sh_eth.c
-+++ b/drivers/net/ethernet/renesas/sh_eth.c
-@@ -659,6 +659,7 @@ static struct sh_eth_cpu_data r8a7740_data = {
- 	.no_ade		= 1,
- 	.tsu		= 1,
- 	.select_mii	= 1,
-+	.shift_rd0	= 1,
- };
- 
- static struct sh_eth_cpu_data sh7619_data = {
-@@ -1262,7 +1263,6 @@ static int sh_eth_rx(struct net_device *ndev, u32 intr_status, int *quota)
- 		if (!(desc_status & RDFEND))
- 			ndev->stats.rx_length_errors++;
- 
--#if defined(CONFIG_ARCH_R8A7740)
- 		/*
- 		 * In case of almost all GETHER/ETHERs, the Receive Frame State
- 		 * (RFS) bits in the Receive Descriptor 0 are from bit 9 to
-@@ -1270,8 +1270,8 @@ static int sh_eth_rx(struct net_device *ndev, u32 intr_status, int *quota)
- 		 * bits are from bit 25 to bit 16. So, the driver needs right
- 		 * shifting by 16.
- 		 */
--		desc_status >>= 16;
--#endif
-+		if (mdp->cd->shift_rd0)
-+			desc_status >>= 16;
- 
- 		if (desc_status & (RD_RFS1 | RD_RFS2 | RD_RFS3 | RD_RFS4 |
- 				   RD_RFS5 | RD_RFS6 | RD_RFS10)) {
-diff --git a/drivers/net/ethernet/renesas/sh_eth.h b/drivers/net/ethernet/renesas/sh_eth.h
-index a0257f40..99995bf3 100644
---- a/drivers/net/ethernet/renesas/sh_eth.h
-+++ b/drivers/net/ethernet/renesas/sh_eth.h
-@@ -481,6 +481,7 @@ struct sh_eth_cpu_data {
- 	unsigned no_ade:1;	/* E-DMAC DO NOT have ADE bit in EESR */
- 	unsigned hw_crc:1;	/* E-DMAC have CSMR */
- 	unsigned select_mii:1;	/* EtherC have RMII_MII (MII select register) */
-+	unsigned shift_rd0:1;	/* shift Rx descriptor word 0 right by 16 */
- };
- 
- struct sh_eth_private {
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0515-sh_eth-SH_ETH-should-depend-on-HAS_DMA.patch b/patches.renesas/0515-sh_eth-SH_ETH-should-depend-on-HAS_DMA.patch
deleted file mode 100644
index eae6fe81ed3fb..0000000000000
--- a/patches.renesas/0515-sh_eth-SH_ETH-should-depend-on-HAS_DMA.patch
+++ /dev/null
@@ -1,45 +0,0 @@
-From 66e48a0d668ae8bc3c4acb8de00b192ae6d9d55d Mon Sep 17 00:00:00 2001
-From: Geert Uytterhoeven <geert@linux-m68k.org>
-Date: Wed, 10 Jul 2013 23:03:34 +0200
-Subject: sh_eth: SH_ETH should depend on HAS_DMA
-
-If NO_DMA=y:
-
-drivers/built-in.o: In function `sh_eth_free_dma_buffer':
-drivers/net/ethernet/renesas/sh_eth.c:1103: undefined reference to `dma_free_coherent'
-drivers/net/ethernet/renesas/sh_eth.c:1110: undefined reference to `dma_free_coherent'
-drivers/built-in.o: In function `sh_eth_ring_init':
-drivers/net/ethernet/renesas/sh_eth.c:1065: undefined reference to `dma_alloc_coherent'
-drivers/net/ethernet/renesas/sh_eth.c:1086: undefined reference to `dma_free_coherent'
-drivers/built-in.o: In function `sh_eth_ring_format':
-drivers/net/ethernet/renesas/sh_eth.c:988: undefined reference to `dma_map_single'
-drivers/built-in.o: In function `sh_eth_txfree':
-drivers/net/ethernet/renesas/sh_eth.c:1220: undefined reference to `dma_unmap_single'
-drivers/built-in.o: In function `sh_eth_rx':
-drivers/net/ethernet/renesas/sh_eth.c:1323: undefined reference to `dma_map_single'
-drivers/built-in.o: In function `sh_eth_start_xmit':
-drivers/net/ethernet/renesas/sh_eth.c:1954: undefined reference to `dma_map_single'
-
-Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit b41e6a51d57e231d2ed237f17f002cc536c0987c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/net/ethernet/renesas/Kconfig | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/drivers/net/ethernet/renesas/Kconfig b/drivers/net/ethernet/renesas/Kconfig
-index 267eac05..55527a12 100644
---- a/drivers/net/ethernet/renesas/Kconfig
-+++ b/drivers/net/ethernet/renesas/Kconfig
-@@ -4,6 +4,7 @@
- 
- config SH_ETH
- 	tristate "Renesas SuperH Ethernet support"
-+	depends on HAS_DMA
- 	select CRC32
- 	select NET_CORE
- 	select MII
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0516-sh_eth-add-support-for-RMIIMODE-register.patch b/patches.renesas/0516-sh_eth-add-support-for-RMIIMODE-register.patch
deleted file mode 100644
index 1d3671345bdba..0000000000000
--- a/patches.renesas/0516-sh_eth-add-support-for-RMIIMODE-register.patch
+++ /dev/null
@@ -1,61 +0,0 @@
-From f11cc108bccc4550276fd532b587669366459d9a Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Tue, 23 Jul 2013 10:18:04 +0900
-Subject: sh_eth: add support for RMIIMODE register
-
-This register is prsent on the r8a7790 SoC.
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit 55754f19d7ee4fa3633f55a4a084af8590c35efa)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/net/ethernet/renesas/sh_eth.c | 4 ++++
- drivers/net/ethernet/renesas/sh_eth.h | 2 ++
- 2 files changed, 6 insertions(+)
-
-diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
-index 6ea2b9c4..fb1c8c75 100644
---- a/drivers/net/ethernet/renesas/sh_eth.c
-+++ b/drivers/net/ethernet/renesas/sh_eth.c
-@@ -189,6 +189,7 @@ static const u16 sh_eth_offset_fast_rcar[SH_ETH_MAX_REGISTER_OFFSET] = {
- 	[RMCR]		= 0x0258,
- 	[TFUCR]		= 0x0264,
- 	[RFOCR]		= 0x0268,
-+	[RMIIMODE]      = 0x026c,
- 	[FCFTR]		= 0x0270,
- 	[TRIMD]		= 0x027c,
- };
-@@ -1124,6 +1125,9 @@ static int sh_eth_dev_init(struct net_device *ndev, bool start)
- 	if (ret)
- 		goto out;
- 
-+	if (mdp->cd->rmiimode)
-+		sh_eth_write(ndev, 0x1, RMIIMODE);
-+
- 	/* Descriptor format */
- 	sh_eth_ring_format(ndev);
- 	if (mdp->cd->rpadir)
-diff --git a/drivers/net/ethernet/renesas/sh_eth.h b/drivers/net/ethernet/renesas/sh_eth.h
-index 99995bf3..da93f5cf 100644
---- a/drivers/net/ethernet/renesas/sh_eth.h
-+++ b/drivers/net/ethernet/renesas/sh_eth.h
-@@ -60,6 +60,7 @@ enum {
- 	EDOCR,
- 	TFUCR,
- 	RFOCR,
-+	RMIIMODE,
- 	FCFTR,
- 	RPADIR,
- 	TRIMD,
-@@ -482,6 +483,7 @@ struct sh_eth_cpu_data {
- 	unsigned hw_crc:1;	/* E-DMAC have CSMR */
- 	unsigned select_mii:1;	/* EtherC have RMII_MII (MII select register) */
- 	unsigned shift_rd0:1;	/* shift Rx descriptor word 0 right by 16 */
-+	unsigned rmiimode:1;	/* EtherC has RMIIMODE register */
- };
- 
- struct sh_eth_private {
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0517-sh_eth-Add-support-for-r8a7790-SoC.patch b/patches.renesas/0517-sh_eth-Add-support-for-r8a7790-SoC.patch
deleted file mode 100644
index 99f56ee01c4c9..0000000000000
--- a/patches.renesas/0517-sh_eth-Add-support-for-r8a7790-SoC.patch
+++ /dev/null
@@ -1,71 +0,0 @@
-From 405cab1f5ee97b031d3f7e2b840aa1626591f1eb Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Tue, 23 Jul 2013 10:18:05 +0900
-Subject: sh_eth: Add support for r8a7790 SoC
-
-This is a copy of support for r8a7778/9 with the .rmiimode mode bit
-of struct sh_eth_cpu_data set.
-
-Also update R8A7779 to R8A777x.
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit e18dbf7efcb7a727e5db773597ddfd6981a530e6)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/net/ethernet/renesas/Kconfig  |  2 +-
- drivers/net/ethernet/renesas/sh_eth.c | 21 +++++++++++++++++++++
- 2 files changed, 22 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/net/ethernet/renesas/Kconfig b/drivers/net/ethernet/renesas/Kconfig
-index 55527a12..c299e7f0 100644
---- a/drivers/net/ethernet/renesas/Kconfig
-+++ b/drivers/net/ethernet/renesas/Kconfig
-@@ -14,4 +14,4 @@ config SH_ETH
- 	  Renesas SuperH Ethernet device driver.
- 	  This driver supporting CPUs are:
- 		- SH7619, SH7710, SH7712, SH7724, SH7734, SH7763, SH7757,
--		  R8A7740 and R8A7779.
-+		  R8A7740, R8A777x and R8A7790.
-diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
-index fb1c8c75..9427ed9c 100644
---- a/drivers/net/ethernet/renesas/sh_eth.c
-+++ b/drivers/net/ethernet/renesas/sh_eth.c
-@@ -393,6 +393,26 @@ static struct sh_eth_cpu_data r8a777x_data = {
- 	.hw_swap	= 1,
- };
- 
-+/* R8A7790 */
-+static struct sh_eth_cpu_data r8a7790_data = {
-+	.set_duplex	= sh_eth_set_duplex,
-+	.set_rate	= sh_eth_set_rate_r8a777x,
-+
-+	.ecsr_value	= ECSR_PSRTO | ECSR_LCHNG | ECSR_ICD,
-+	.ecsipr_value	= ECSIPR_PSRTOIP | ECSIPR_LCHNGIP | ECSIPR_ICDIP,
-+	.eesipr_value	= 0x01ff009f,
-+
-+	.tx_check	= EESR_FTC | EESR_CND | EESR_DLC | EESR_CD | EESR_RTO,
-+	.eesr_err_check	= EESR_TWB | EESR_TABT | EESR_RABT | EESR_RDE |
-+			  EESR_RFRMER | EESR_TFE | EESR_TDE | EESR_ECI,
-+
-+	.apr		= 1,
-+	.mpr		= 1,
-+	.tpauser	= 1,
-+	.hw_swap	= 1,
-+	.rmiimode	= 1,
-+};
-+
- static void sh_eth_set_rate_sh7724(struct net_device *ndev)
- {
- 	struct sh_eth_private *mdp = netdev_priv(ndev);
-@@ -2754,6 +2774,7 @@ static struct platform_device_id sh_eth_id_table[] = {
- 	{ "sh7763-gether", (kernel_ulong_t)&sh7763_data },
- 	{ "r8a7740-gether", (kernel_ulong_t)&r8a7740_data },
- 	{ "r8a777x-ether", (kernel_ulong_t)&r8a777x_data },
-+	{ "r8a7790-ether", (kernel_ulong_t)&r8a7790_data },
- 	{ }
- };
- MODULE_DEVICE_TABLE(platform, sh_eth_id_table);
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0518-sh_eth-r8a7790-Handle-the-RFE-Receive-FIFO-overflow-.patch b/patches.renesas/0518-sh_eth-r8a7790-Handle-the-RFE-Receive-FIFO-overflow-.patch
deleted file mode 100644
index fc2365e3cb222..0000000000000
--- a/patches.renesas/0518-sh_eth-r8a7790-Handle-the-RFE-Receive-FIFO-overflow-.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From 11011706857d4f65a3273f5c3584d76abbca1561 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 31 Jul 2013 16:42:11 +0900
-Subject: sh_eth: r8a7790: Handle the RFE (Receive FIFO overflow Error)
- interrupt
-
-The RFE interrupt is enabled for the r8a7790 but isn't handled,
-resulting in the interrupts core noticing unhandled interrupts, and
-eventually disabling the ethernet IRQ.
-
-Fix it by adding RFE to the bitmask of error interrupts to be handled
-for r8a7790.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit ba361cb3d4c977e2b94b5d97905f66b4d48964de)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/net/ethernet/renesas/sh_eth.c | 5 +++--
- 1 file changed, 3 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
-index 9427ed9c..52ab996a 100644
---- a/drivers/net/ethernet/renesas/sh_eth.c
-+++ b/drivers/net/ethernet/renesas/sh_eth.c
-@@ -403,8 +403,9 @@ static struct sh_eth_cpu_data r8a7790_data = {
- 	.eesipr_value	= 0x01ff009f,
- 
- 	.tx_check	= EESR_FTC | EESR_CND | EESR_DLC | EESR_CD | EESR_RTO,
--	.eesr_err_check	= EESR_TWB | EESR_TABT | EESR_RABT | EESR_RDE |
--			  EESR_RFRMER | EESR_TFE | EESR_TDE | EESR_ECI,
-+	.eesr_err_check	= EESR_TWB | EESR_TABT | EESR_RABT | EESR_RFE |
-+			  EESR_RDE | EESR_RFRMER | EESR_TFE | EESR_TDE |
-+			  EESR_ECI,
- 
- 	.apr		= 1,
- 	.mpr		= 1,
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0519-sh_eth-get-register-layout-from-struct-sh_eth_cpu_da.patch b/patches.renesas/0519-sh_eth-get-register-layout-from-struct-sh_eth_cpu_da.patch
deleted file mode 100644
index 32f3b5e0cd75d..0000000000000
--- a/patches.renesas/0519-sh_eth-get-register-layout-from-struct-sh_eth_cpu_da.patch
+++ /dev/null
@@ -1,140 +0,0 @@
-From 3ff32b6164d7bb13e58ec52c4a8d40e2e787605a Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Sun, 18 Aug 2013 03:11:28 +0400
-Subject: sh_eth: get register layout from 'struct sh_eth_cpu_data'
-
-The register layout is a SoC characteristic, so it's wrong that it's stored
-in the otherwise board specific platform data. Add 'register_type' field to
-'struct sh_eth_cpu_data', initialize it properly for each SoC, and read  it
-from this structure instead of the platfrom data from now on...
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit a3153d8c41132d6fda080a4b3e53b7ee25d3c125)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/net/ethernet/renesas/sh_eth.c | 22 +++++++++++++++++++++-
- drivers/net/ethernet/renesas/sh_eth.h |  1 +
- 2 files changed, 22 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
-index 52ab996a..ebce05b1 100644
---- a/drivers/net/ethernet/renesas/sh_eth.c
-+++ b/drivers/net/ethernet/renesas/sh_eth.c
-@@ -378,6 +378,8 @@ static struct sh_eth_cpu_data r8a777x_data = {
- 	.set_duplex	= sh_eth_set_duplex,
- 	.set_rate	= sh_eth_set_rate_r8a777x,
- 
-+	.register_type	= SH_ETH_REG_FAST_RCAR,
-+
- 	.ecsr_value	= ECSR_PSRTO | ECSR_LCHNG | ECSR_ICD,
- 	.ecsipr_value	= ECSIPR_PSRTOIP | ECSIPR_LCHNGIP | ECSIPR_ICDIP,
- 	.eesipr_value	= 0x01ff009f,
-@@ -398,6 +400,8 @@ static struct sh_eth_cpu_data r8a7790_data = {
- 	.set_duplex	= sh_eth_set_duplex,
- 	.set_rate	= sh_eth_set_rate_r8a777x,
- 
-+	.register_type	= SH_ETH_REG_FAST_RCAR,
-+
- 	.ecsr_value	= ECSR_PSRTO | ECSR_LCHNG | ECSR_ICD,
- 	.ecsipr_value	= ECSIPR_PSRTOIP | ECSIPR_LCHNGIP | ECSIPR_ICDIP,
- 	.eesipr_value	= 0x01ff009f,
-@@ -435,6 +439,8 @@ static struct sh_eth_cpu_data sh7724_data = {
- 	.set_duplex	= sh_eth_set_duplex,
- 	.set_rate	= sh_eth_set_rate_sh7724,
- 
-+	.register_type	= SH_ETH_REG_FAST_SH4,
-+
- 	.ecsr_value	= ECSR_PSRTO | ECSR_LCHNG | ECSR_ICD,
- 	.ecsipr_value	= ECSIPR_PSRTOIP | ECSIPR_LCHNGIP | ECSIPR_ICDIP,
- 	.eesipr_value	= 0x01ff009f,
-@@ -473,6 +479,8 @@ static struct sh_eth_cpu_data sh7757_data = {
- 	.set_duplex	= sh_eth_set_duplex,
- 	.set_rate	= sh_eth_set_rate_sh7757,
- 
-+	.register_type	= SH_ETH_REG_FAST_SH4,
-+
- 	.eesipr_value	= DMAC_M_RFRMER | DMAC_M_ECI | 0x003fffff,
- 	.rmcr_value	= 0x00000001,
- 
-@@ -541,6 +549,8 @@ static struct sh_eth_cpu_data sh7757_data_giga = {
- 	.set_duplex	= sh_eth_set_duplex,
- 	.set_rate	= sh_eth_set_rate_giga,
- 
-+	.register_type	= SH_ETH_REG_GIGABIT,
-+
- 	.ecsr_value	= ECSR_ICD | ECSR_MPD,
- 	.ecsipr_value	= ECSIPR_LCHNGIP | ECSIPR_ICDIP | ECSIPR_MPDIP,
- 	.eesipr_value	= DMAC_M_RFRMER | DMAC_M_ECI | 0x003fffff,
-@@ -599,6 +609,8 @@ static struct sh_eth_cpu_data sh7734_data = {
- 	.set_duplex	= sh_eth_set_duplex,
- 	.set_rate	= sh_eth_set_rate_gether,
- 
-+	.register_type	= SH_ETH_REG_GIGABIT,
-+
- 	.ecsr_value	= ECSR_ICD | ECSR_MPD,
- 	.ecsipr_value	= ECSIPR_LCHNGIP | ECSIPR_ICDIP | ECSIPR_MPDIP,
- 	.eesipr_value	= DMAC_M_RFRMER | DMAC_M_ECI | 0x003fffff,
-@@ -626,6 +638,8 @@ static struct sh_eth_cpu_data sh7763_data = {
- 	.set_duplex	= sh_eth_set_duplex,
- 	.set_rate	= sh_eth_set_rate_gether,
- 
-+	.register_type	= SH_ETH_REG_GIGABIT,
-+
- 	.ecsr_value	= ECSR_ICD | ECSR_MPD,
- 	.ecsipr_value	= ECSIPR_LCHNGIP | ECSIPR_ICDIP | ECSIPR_MPDIP,
- 	.eesipr_value	= DMAC_M_RFRMER | DMAC_M_ECI | 0x003fffff,
-@@ -663,6 +677,8 @@ static struct sh_eth_cpu_data r8a7740_data = {
- 	.set_duplex	= sh_eth_set_duplex,
- 	.set_rate	= sh_eth_set_rate_gether,
- 
-+	.register_type	= SH_ETH_REG_GIGABIT,
-+
- 	.ecsr_value	= ECSR_ICD | ECSR_MPD,
- 	.ecsipr_value	= ECSIPR_LCHNGIP | ECSIPR_ICDIP | ECSIPR_MPDIP,
- 	.eesipr_value	= DMAC_M_RFRMER | DMAC_M_ECI | 0x003fffff,
-@@ -685,6 +701,8 @@ static struct sh_eth_cpu_data r8a7740_data = {
- };
- 
- static struct sh_eth_cpu_data sh7619_data = {
-+	.register_type	= SH_ETH_REG_FAST_SH3_SH2,
-+
- 	.eesipr_value	= DMAC_M_RFRMER | DMAC_M_ECI | 0x003fffff,
- 
- 	.apr		= 1,
-@@ -694,6 +712,8 @@ static struct sh_eth_cpu_data sh7619_data = {
- };
- 
- static struct sh_eth_cpu_data sh771x_data = {
-+	.register_type	= SH_ETH_REG_FAST_SH3_SH2,
-+
- 	.eesipr_value	= DMAC_M_RFRMER | DMAC_M_ECI | 0x003fffff,
- 	.tsu		= 1,
- };
-@@ -2643,10 +2663,10 @@ static int sh_eth_drv_probe(struct platform_device *pdev)
- 	mdp->edmac_endian = pd->edmac_endian;
- 	mdp->no_ether_link = pd->no_ether_link;
- 	mdp->ether_link_active_low = pd->ether_link_active_low;
--	mdp->reg_offset = sh_eth_get_register_offset(pd->register_type);
- 
- 	/* set cpu data */
- 	mdp->cd = (struct sh_eth_cpu_data *)id->driver_data;
-+	mdp->reg_offset = sh_eth_get_register_offset(mdp->cd->register_type);
- 	sh_eth_set_default_cpu_data(mdp->cd);
- 
- 	/* set function */
-diff --git a/drivers/net/ethernet/renesas/sh_eth.h b/drivers/net/ethernet/renesas/sh_eth.h
-index da93f5cf..1e785281 100644
---- a/drivers/net/ethernet/renesas/sh_eth.h
-+++ b/drivers/net/ethernet/renesas/sh_eth.h
-@@ -454,6 +454,7 @@ struct sh_eth_cpu_data {
- 	void (*set_rate)(struct net_device *ndev);
- 
- 	/* mandatory initialize value */
-+	int register_type;
- 	unsigned long eesipr_value;
- 
- 	/* optional initialize value */
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0520-sh_eth-remove-register_type-field-from-struct-sh_eth.patch b/patches.renesas/0520-sh_eth-remove-register_type-field-from-struct-sh_eth.patch
deleted file mode 100644
index 8f75984af18ca..0000000000000
--- a/patches.renesas/0520-sh_eth-remove-register_type-field-from-struct-sh_eth.patch
+++ /dev/null
@@ -1,169 +0,0 @@
-From 17c1ddfff070927bd8b1d07d6b4ce2bd84ef2918 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Sun, 18 Aug 2013 03:13:26 +0400
-Subject: sh_eth: remove 'register_type' field from 'struct sh_eth_plat_data'
-
-Now that the 'register_type' field of the 'sh_eth' driver's platform data is not
-used by the driver anymore, it's time to remove it and  its initializers from
-the SH platform code. Also  move *enum* declaring values for this  field from
-<linux/sh_eth.h>  to  the  local driver's  header file as they're only needed
-by the driver itself  now...
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit 8d3214c4e8c8be6efd8ec7a172239ebbd4deb04b)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-	arch/sh/boards/mach-se/7724/setup.c
-	arch/sh/kernel/cpu/sh2/setup-sh7619.c
----
- arch/arm/mach-shmobile/board-armadillo800eva.c | 1 -
- arch/arm/mach-shmobile/board-bockw.c           | 1 -
- arch/sh/boards/board-espt.c                    | 1 -
- arch/sh/boards/board-sh7757lcr.c               | 4 ----
- arch/sh/boards/mach-ecovec24/setup.c           | 1 -
- arch/sh/boards/mach-sh7763rdp/setup.c          | 1 -
- drivers/net/ethernet/renesas/sh_eth.h          | 7 +++++++
- include/linux/sh_eth.h                         | 7 -------
- 8 files changed, 7 insertions(+), 16 deletions(-)
-
-diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c
-index 4b247407..06802584 100644
---- a/arch/arm/mach-shmobile/board-armadillo800eva.c
-+++ b/arch/arm/mach-shmobile/board-armadillo800eva.c
-@@ -359,7 +359,6 @@ static struct platform_device usbhsf_device = {
- static struct sh_eth_plat_data sh_eth_platdata = {
- 	.phy			= 0x00, /* LAN8710A */
- 	.edmac_endian		= EDMAC_LITTLE_ENDIAN,
--	.register_type		= SH_ETH_REG_GIGABIT,
- 	.phy_interface		= PHY_INTERFACE_MODE_MII,
- };
- 
-diff --git a/arch/arm/mach-shmobile/board-bockw.c b/arch/arm/mach-shmobile/board-bockw.c
-index 127ad3a0..6b9faf39 100644
---- a/arch/arm/mach-shmobile/board-bockw.c
-+++ b/arch/arm/mach-shmobile/board-bockw.c
-@@ -104,7 +104,6 @@ static struct resource sdhi0_resources[] __initdata = {
- static struct sh_eth_plat_data ether_platform_data __initdata = {
- 	.phy		= 0x01,
- 	.edmac_endian	= EDMAC_LITTLE_ENDIAN,
--	.register_type	= SH_ETH_REG_FAST_RCAR,
- 	.phy_interface	= PHY_INTERFACE_MODE_RMII,
- 	/*
- 	 * Although the LINK signal is available on the board, it's connected to
-diff --git a/arch/sh/boards/board-espt.c b/arch/sh/boards/board-espt.c
-index 4d94dff9..7291e2f1 100644
---- a/arch/sh/boards/board-espt.c
-+++ b/arch/sh/boards/board-espt.c
-@@ -80,7 +80,6 @@ static struct resource sh_eth_resources[] = {
- static struct sh_eth_plat_data sh7763_eth_pdata = {
- 	.phy = 0,
- 	.edmac_endian = EDMAC_LITTLE_ENDIAN,
--	.register_type = SH_ETH_REG_GIGABIT,
- 	.phy_interface = PHY_INTERFACE_MODE_MII,
- };
- 
-diff --git a/arch/sh/boards/board-sh7757lcr.c b/arch/sh/boards/board-sh7757lcr.c
-index 4f114d1c..25c5a932 100644
---- a/arch/sh/boards/board-sh7757lcr.c
-+++ b/arch/sh/boards/board-sh7757lcr.c
-@@ -77,7 +77,6 @@ static struct resource sh_eth0_resources[] = {
- static struct sh_eth_plat_data sh7757_eth0_pdata = {
- 	.phy = 1,
- 	.edmac_endian = EDMAC_LITTLE_ENDIAN,
--	.register_type = SH_ETH_REG_FAST_SH4,
- 	.set_mdio_gate = sh7757_eth_set_mdio_gate,
- };
- 
-@@ -106,7 +105,6 @@ static struct resource sh_eth1_resources[] = {
- static struct sh_eth_plat_data sh7757_eth1_pdata = {
- 	.phy = 1,
- 	.edmac_endian = EDMAC_LITTLE_ENDIAN,
--	.register_type = SH_ETH_REG_FAST_SH4,
- 	.set_mdio_gate = sh7757_eth_set_mdio_gate,
- };
- 
-@@ -151,7 +149,6 @@ static struct resource sh_eth_giga0_resources[] = {
- static struct sh_eth_plat_data sh7757_eth_giga0_pdata = {
- 	.phy = 18,
- 	.edmac_endian = EDMAC_LITTLE_ENDIAN,
--	.register_type = SH_ETH_REG_GIGABIT,
- 	.set_mdio_gate = sh7757_eth_giga_set_mdio_gate,
- 	.phy_interface = PHY_INTERFACE_MODE_RGMII_ID,
- };
-@@ -186,7 +183,6 @@ static struct resource sh_eth_giga1_resources[] = {
- static struct sh_eth_plat_data sh7757_eth_giga1_pdata = {
- 	.phy = 19,
- 	.edmac_endian = EDMAC_LITTLE_ENDIAN,
--	.register_type = SH_ETH_REG_GIGABIT,
- 	.set_mdio_gate = sh7757_eth_giga_set_mdio_gate,
- 	.phy_interface = PHY_INTERFACE_MODE_RGMII_ID,
- };
-diff --git a/arch/sh/boards/mach-ecovec24/setup.c b/arch/sh/boards/mach-ecovec24/setup.c
-index 61fade0f..a4f630f0 100644
---- a/arch/sh/boards/mach-ecovec24/setup.c
-+++ b/arch/sh/boards/mach-ecovec24/setup.c
-@@ -159,7 +159,6 @@ static struct resource sh_eth_resources[] = {
- static struct sh_eth_plat_data sh_eth_plat = {
- 	.phy = 0x1f, /* SMSC LAN8700 */
- 	.edmac_endian = EDMAC_LITTLE_ENDIAN,
--	.register_type = SH_ETH_REG_FAST_SH4,
- 	.phy_interface = PHY_INTERFACE_MODE_MII,
- 	.ether_link_active_low = 1
- };
-diff --git a/arch/sh/boards/mach-sh7763rdp/setup.c b/arch/sh/boards/mach-sh7763rdp/setup.c
-index 50ba481f..2c8fb046 100644
---- a/arch/sh/boards/mach-sh7763rdp/setup.c
-+++ b/arch/sh/boards/mach-sh7763rdp/setup.c
-@@ -88,7 +88,6 @@ static struct resource sh_eth_resources[] = {
- static struct sh_eth_plat_data sh7763_eth_pdata = {
- 	.phy = 1,
- 	.edmac_endian = EDMAC_LITTLE_ENDIAN,
--	.register_type = SH_ETH_REG_GIGABIT,
- 	.phy_interface = PHY_INTERFACE_MODE_MII,
- };
- 
-diff --git a/drivers/net/ethernet/renesas/sh_eth.h b/drivers/net/ethernet/renesas/sh_eth.h
-index 1e785281..a0db02c6 100644
---- a/drivers/net/ethernet/renesas/sh_eth.h
-+++ b/drivers/net/ethernet/renesas/sh_eth.h
-@@ -157,6 +157,13 @@ enum {
- 	SH_ETH_MAX_REGISTER_OFFSET,
- };
- 
-+enum {
-+	SH_ETH_REG_GIGABIT,
-+	SH_ETH_REG_FAST_RCAR,
-+	SH_ETH_REG_FAST_SH4,
-+	SH_ETH_REG_FAST_SH3_SH2
-+};
-+
- /* Driver's parameters */
- #if defined(CONFIG_CPU_SH4) || defined(CONFIG_ARCH_SHMOBILE)
- #define SH4_SKB_RX_ALIGN	32
-diff --git a/include/linux/sh_eth.h b/include/linux/sh_eth.h
-index fc305713..15b2ea93 100644
---- a/include/linux/sh_eth.h
-+++ b/include/linux/sh_eth.h
-@@ -4,17 +4,10 @@
- #include <linux/phy.h>
- 
- enum {EDMAC_LITTLE_ENDIAN, EDMAC_BIG_ENDIAN};
--enum {
--	SH_ETH_REG_GIGABIT,
--	SH_ETH_REG_FAST_RCAR,
--	SH_ETH_REG_FAST_SH4,
--	SH_ETH_REG_FAST_SH3_SH2
--};
- 
- struct sh_eth_plat_data {
- 	int phy;
- 	int edmac_endian;
--	int register_type;
- 	phy_interface_t phy_interface;
- 	void (*set_mdio_gate)(void *addr);
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0521-sh_eth-no-need-to-call-ether_setup.patch b/patches.renesas/0521-sh_eth-no-need-to-call-ether_setup.patch
deleted file mode 100644
index 4ad9e06645ec2..0000000000000
--- a/patches.renesas/0521-sh_eth-no-need-to-call-ether_setup.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From a8d83262c60b31c311400349d1a32e2e92da9981 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Fri, 30 Aug 2013 00:24:47 +0400
-Subject: sh_eth: no need to call ether_setup()
-
-There's no need to call ether_setup() in the driver since prior alloc_etherdev()
-call already arranges for it.
-
-Suggested-by: Denis Kirjanov <kda@linux-powerpc.org>
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit 488594883e25cc6e40df067a9a7b39737ebb18d8)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/net/ethernet/renesas/sh_eth.c | 3 ---
- 1 file changed, 3 deletions(-)
-
-diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
-index ebce05b1..c6dad5f6 100644
---- a/drivers/net/ethernet/renesas/sh_eth.c
-+++ b/drivers/net/ethernet/renesas/sh_eth.c
-@@ -2639,9 +2639,6 @@ static int sh_eth_drv_probe(struct platform_device *pdev)
- 
- 	SET_NETDEV_DEV(ndev, &pdev->dev);
- 
--	/* Fill in the fields of the device structure with ethernet values. */
--	ether_setup(ndev);
--
- 	mdp = netdev_priv(ndev);
- 	mdp->num_tx_ring = TX_RING_SIZE;
- 	mdp->num_rx_ring = RX_RING_SIZE;
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0522-sh_eth-Fix-cache-invalidation-omission-of-receive-bu.patch b/patches.renesas/0522-sh_eth-Fix-cache-invalidation-omission-of-receive-bu.patch
deleted file mode 100644
index 663eb11bfcfbe..0000000000000
--- a/patches.renesas/0522-sh_eth-Fix-cache-invalidation-omission-of-receive-bu.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From 1ae0eaf241bcf29e94ade3007d7dbf61801c4309 Mon Sep 17 00:00:00 2001
-From: Kouei Abe <kouei.abe.cp@renesas.com>
-Date: Fri, 30 Aug 2013 12:41:07 +0900
-Subject: sh_eth: Fix cache invalidation omission of receive buffer
-
-Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit 7db8e0c14c9cb4adb667b4c558d8ffec8d5b40f2)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/net/ethernet/renesas/sh_eth.c | 3 +++
- 1 file changed, 3 insertions(+)
-
-diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
-index c6dad5f6..fb8479f4 100644
---- a/drivers/net/ethernet/renesas/sh_eth.c
-+++ b/drivers/net/ethernet/renesas/sh_eth.c
-@@ -1342,6 +1342,9 @@ static int sh_eth_rx(struct net_device *ndev, u32 intr_status, int *quota)
- 			mdp->rx_skbuff[entry] = NULL;
- 			if (mdp->cd->rpadir)
- 				skb_reserve(skb, NET_IP_ALIGN);
-+			dma_sync_single_for_cpu(&ndev->dev, rxdesc->addr,
-+						mdp->rx_buf_sz,
-+						DMA_FROM_DEVICE);
- 			skb_put(skb, pkt_len);
- 			skb->protocol = eth_type_trans(skb, ndev);
- 			netif_rx(skb);
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0523-sh_eth-Enable-Rx-descriptor-word-0-shift-for-r8a7790.patch b/patches.renesas/0523-sh_eth-Enable-Rx-descriptor-word-0-shift-for-r8a7790.patch
deleted file mode 100644
index 7123953e45254..0000000000000
--- a/patches.renesas/0523-sh_eth-Enable-Rx-descriptor-word-0-shift-for-r8a7790.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From 24f39918b5018f1228e7913a2587057ae7a50054 Mon Sep 17 00:00:00 2001
-From: Kouei Abe <kouei.abe.cp@renesas.com>
-Date: Fri, 30 Aug 2013 12:41:08 +0900
-Subject: sh_eth: Enable Rx descriptor word 0 shift for r8a7790
-
-This corrects an oversight when r8a7790 support was added to sh_eth.
-
-Signed-off-by: Kouei Abe <kouei.abe.cp@renesas.com>
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit fd9af07c3404ac9ecbd0d859563360f51ce1ffde)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/net/ethernet/renesas/sh_eth.c | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
-index fb8479f4..08b3050e 100644
---- a/drivers/net/ethernet/renesas/sh_eth.c
-+++ b/drivers/net/ethernet/renesas/sh_eth.c
-@@ -416,6 +416,7 @@ static struct sh_eth_cpu_data r8a7790_data = {
- 	.tpauser	= 1,
- 	.hw_swap	= 1,
- 	.rmiimode	= 1,
-+	.shift_rd0	= 1,
- };
- 
- static void sh_eth_set_rate_sh7724(struct net_device *ndev)
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0524-sh_eth-NAPI-requires-netif_receive_skb.patch b/patches.renesas/0524-sh_eth-NAPI-requires-netif_receive_skb.patch
deleted file mode 100644
index 30b8a3fa83088..0000000000000
--- a/patches.renesas/0524-sh_eth-NAPI-requires-netif_receive_skb.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From a5cb389053b00c663f46403cc9cb5d53a89f8135 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Tue, 3 Sep 2013 03:03:10 +0400
-Subject: sh_eth: NAPI requires netif_receive_skb()
-
-Driver supporting NAPI should use NAPI-specific function for receiving packets,
-so netif_rx() should be changed to netif_receive_skb().
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit a8e9fd0f7462f5cada5189513d12fe6c9cce2105)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/net/ethernet/renesas/sh_eth.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
-index 08b3050e..16e7b9b5 100644
---- a/drivers/net/ethernet/renesas/sh_eth.c
-+++ b/drivers/net/ethernet/renesas/sh_eth.c
-@@ -1348,7 +1348,7 @@ static int sh_eth_rx(struct net_device *ndev, u32 intr_status, int *quota)
- 						DMA_FROM_DEVICE);
- 			skb_put(skb, pkt_len);
- 			skb->protocol = eth_type_trans(skb, ndev);
--			netif_rx(skb);
-+			netif_receive_skb(skb);
- 			ndev->stats.rx_packets++;
- 			ndev->stats.rx_bytes += pkt_len;
- 		}
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0525-sh_eth-fix-napi_-en-dis-able-calls-racing-against-in.patch b/patches.renesas/0525-sh_eth-fix-napi_-en-dis-able-calls-racing-against-in.patch
deleted file mode 100644
index ba319addfbec7..0000000000000
--- a/patches.renesas/0525-sh_eth-fix-napi_-en-dis-able-calls-racing-against-in.patch
+++ /dev/null
@@ -1,81 +0,0 @@
-From 63a25646ed48425f7cfd4bd4f8d77db134e50a80 Mon Sep 17 00:00:00 2001
-From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Date: Wed, 4 Sep 2013 02:41:27 +0400
-Subject: sh_eth: fix napi_{en|dis}able() calls racing against interrupts
-
-While implementing NAPI for the driver, I overlooked the race conditions where
-interrupt  handler might have called napi_schedule_prep() before napi_enable()
-was called or after napi_disable() was called. If RX interrupt happens, this
-would cause the endless interrupts and messages like:
-
-sh-eth eth0: ignoring interrupt, status 0x00040000, mask 0x01ff009f.
-
-The interrupt wouldn't even be masked by the kernel eventually since the handler
-would return IRQ_HANDLED all the time.
-
-As a fix, move napi_enable() call before request_irq() call and napi_disable()
-call after free_irq() call.
-
-Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit d2779e99468fd83ef1493c34f3803fec9aad8345)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/net/ethernet/renesas/sh_eth.c | 12 +++++++-----
- 1 file changed, 7 insertions(+), 5 deletions(-)
-
-diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
-index 16e7b9b5..dfb208f0 100644
---- a/drivers/net/ethernet/renesas/sh_eth.c
-+++ b/drivers/net/ethernet/renesas/sh_eth.c
-@@ -1906,11 +1906,13 @@ static int sh_eth_open(struct net_device *ndev)
- 
- 	pm_runtime_get_sync(&mdp->pdev->dev);
- 
-+	napi_enable(&mdp->napi);
-+
- 	ret = request_irq(ndev->irq, sh_eth_interrupt,
- 			  mdp->cd->irq_flags, ndev->name, ndev);
- 	if (ret) {
- 		dev_err(&ndev->dev, "Can not assign IRQ number\n");
--		return ret;
-+		goto out_napi_off;
- 	}
- 
- 	/* Descriptor set */
-@@ -1928,12 +1930,12 @@ static int sh_eth_open(struct net_device *ndev)
- 	if (ret)
- 		goto out_free_irq;
- 
--	napi_enable(&mdp->napi);
--
- 	return ret;
- 
- out_free_irq:
- 	free_irq(ndev->irq, ndev);
-+out_napi_off:
-+	napi_disable(&mdp->napi);
- 	pm_runtime_put_sync(&mdp->pdev->dev);
- 	return ret;
- }
-@@ -2025,8 +2027,6 @@ static int sh_eth_close(struct net_device *ndev)
- {
- 	struct sh_eth_private *mdp = netdev_priv(ndev);
- 
--	napi_disable(&mdp->napi);
--
- 	netif_stop_queue(ndev);
- 
- 	/* Disable interrupts by clearing the interrupt mask. */
-@@ -2044,6 +2044,8 @@ static int sh_eth_close(struct net_device *ndev)
- 
- 	free_irq(ndev->irq, ndev);
- 
-+	napi_disable(&mdp->napi);
-+
- 	/* Free all the skbuffs in the Rx queue. */
- 	sh_eth_ring_free(ndev);
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0526-net-sh_eth-Fix-RX-packets-errors-on-R8A7740.patch b/patches.renesas/0526-net-sh_eth-Fix-RX-packets-errors-on-R8A7740.patch
deleted file mode 100644
index 832da8e90cd6b..0000000000000
--- a/patches.renesas/0526-net-sh_eth-Fix-RX-packets-errors-on-R8A7740.patch
+++ /dev/null
@@ -1,58 +0,0 @@
-From 6dbc5cc93029eb031a1bcae8690392f5e39065f4 Mon Sep 17 00:00:00 2001
-From: Nguyen Hong Ky <nh-ky@jinso.co.jp>
-Date: Mon, 7 Oct 2013 15:29:25 +0900
-Subject: net: sh_eth: Fix RX packets errors on R8A7740
-
-This patch will fix RX packets errors when receiving big size
-of data by set bit RNC = 1.
-
-RNC - Receive Enable Control
-
-0: Upon completion of reception of one frame, the E-DMAC writes
-the receive status to the descriptor and clears the RR bit in
-EDRRR to 0.
-
-1: Upon completion of reception of one frame, the E-DMAC writes
-(writes back) the receive status to the descriptor. In addition,
-the E-DMAC reads the next descriptor and prepares for reception
-of the next frame.
-
-In addition, for get more stable when receiving packets, I set
-maximum size for the transmit/receive FIFO and inserts padding
-in receive data.
-
-Signed-off-by: Nguyen Hong Ky <nh-ky@jinso.co.jp>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit 2c6221e4a5aab417cb18bef6f1130d1374240258)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-	drivers/net/ethernet/renesas/sh_eth.c
----
- drivers/net/ethernet/renesas/sh_eth.c | 4 ++++
- 1 file changed, 4 insertions(+)
-
-diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
-index dfb208f0..bfa7a201 100644
---- a/drivers/net/ethernet/renesas/sh_eth.c
-+++ b/drivers/net/ethernet/renesas/sh_eth.c
-@@ -620,12 +620,16 @@ static struct sh_eth_cpu_data sh7734_data = {
- 	.eesr_err_check	= EESR_TWB1 | EESR_TWB | EESR_TABT | EESR_RABT | \
- 			  EESR_RDE | EESR_RFRMER | EESR_TFE | EESR_TDE | \
- 			  EESR_ECI,
-+	.fdr_value	= 0x0000070f,
-+	.rmcr_value	= 0x00000001,
- 
- 	.apr		= 1,
- 	.mpr		= 1,
- 	.tpauser	= 1,
- 	.bculr		= 1,
- 	.hw_swap	= 1,
-+	.rpadir		= 1,
-+	.rpadir_value   = 2 << 16,
- 	.no_trimd	= 1,
- 	.no_ade		= 1,
- 	.tsu		= 1,
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0527-net-sh_eth-Correct-fix-for-RX-packet-errors-on-R8A77.patch b/patches.renesas/0527-net-sh_eth-Correct-fix-for-RX-packet-errors-on-R8A77.patch
deleted file mode 100644
index 4f399155c3b05..0000000000000
--- a/patches.renesas/0527-net-sh_eth-Correct-fix-for-RX-packet-errors-on-R8A77.patch
+++ /dev/null
@@ -1,67 +0,0 @@
-From 810e035088db52878190eb438d157d3a9a243fa0 Mon Sep 17 00:00:00 2001
-From: Simon Horman <horms+renesas@verge.net.au>
-Date: Thu, 10 Oct 2013 14:51:16 +0900
-Subject: net: sh_eth: Correct fix for RX packet errors on R8A7740
-
-Nguyen Hong Ky posted a patch to correct RX packet errors on R8A7740 which
-was applied as 2c6221e4a5aab417 ("net: sh_eth: Fix RX packets errors on
-R8A7740"). Unfortunately sh_eth.c contains many similar instances
-of struct sh_eth_cpu_data and the patch was miss-applied, updating
-sh7734_data instead of r8a7740_data.
-
-This patch corrects this problem by.
-1. Reverting the change to sh7734_data and;
-2. Applying the change to r8a7740_data.
-
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit cc23528db0300d5c8c0b98670a577bf1dc3e0e82)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-Conflicts:
-	drivers/net/ethernet/renesas/sh_eth.c
----
- drivers/net/ethernet/renesas/sh_eth.c | 8 ++++----
- 1 file changed, 4 insertions(+), 4 deletions(-)
-
-diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
-index bfa7a201..b54bbbd5 100644
---- a/drivers/net/ethernet/renesas/sh_eth.c
-+++ b/drivers/net/ethernet/renesas/sh_eth.c
-@@ -620,16 +620,12 @@ static struct sh_eth_cpu_data sh7734_data = {
- 	.eesr_err_check	= EESR_TWB1 | EESR_TWB | EESR_TABT | EESR_RABT | \
- 			  EESR_RDE | EESR_RFRMER | EESR_TFE | EESR_TDE | \
- 			  EESR_ECI,
--	.fdr_value	= 0x0000070f,
--	.rmcr_value	= 0x00000001,
- 
- 	.apr		= 1,
- 	.mpr		= 1,
- 	.tpauser	= 1,
- 	.bculr		= 1,
- 	.hw_swap	= 1,
--	.rpadir		= 1,
--	.rpadir_value   = 2 << 16,
- 	.no_trimd	= 1,
- 	.no_ade		= 1,
- 	.tsu		= 1,
-@@ -692,12 +688,16 @@ static struct sh_eth_cpu_data r8a7740_data = {
- 	.eesr_err_check	= EESR_TWB1 | EESR_TWB | EESR_TABT | EESR_RABT |
- 			  EESR_RFE | EESR_RDE | EESR_RFRMER | EESR_TFE |
- 			  EESR_TDE | EESR_ECI,
-+	.fdr_value	= 0x0000070f,
-+	.rmcr_value	= 0x00000001,
- 
- 	.apr		= 1,
- 	.mpr		= 1,
- 	.tpauser	= 1,
- 	.bculr		= 1,
- 	.hw_swap	= 1,
-+	.rpadir		= 1,
-+	.rpadir_value   = 2 << 16,
- 	.no_trimd	= 1,
- 	.no_ade		= 1,
- 	.tsu		= 1,
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0528-sh-pfc-sh7720-Remove-unused-input_pu-range.patch b/patches.renesas/0528-sh-pfc-sh7720-Remove-unused-input_pu-range.patch
deleted file mode 100644
index bd2d48fd922d8..0000000000000
--- a/patches.renesas/0528-sh-pfc-sh7720-Remove-unused-input_pu-range.patch
+++ /dev/null
@@ -1,625 +0,0 @@
-From 975b2a9770e516fa369a57af073c750ed8cd6b87 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 16 Jul 2013 01:54:13 +0200
-Subject: sh-pfc: sh7720: Remove unused input_pu range
-
-The PFC SH7720 SoC data contains a input_pu range used to configure
-pull-up resistors using the legacy non-pinconf API. That API has been
-removed from the driver, the range is thus not used anymore. Remove it.
-
-If required, configuring pull-up resistors for the SH7720 can be
-implemented using the pinconf API, as done for the SH-Mobile, R-Mobile
-and R-Car platforms.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit 7f975b3f1e2b1416d02863fb10e0f69f3d668c77)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-sh7720.c | 465 +++++++++++++++++-------------------
- 1 file changed, 217 insertions(+), 248 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7720.c b/drivers/pinctrl/sh-pfc/pfc-sh7720.c
-index 52e9f6be..3b96d612 100644
---- a/drivers/pinctrl/sh-pfc/pfc-sh7720.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-sh7720.c
-@@ -81,36 +81,6 @@ enum {
- 	PTV4_IN, PTV3_IN, PTV2_IN, PTV1_IN, PTV0_IN,
- 	PINMUX_INPUT_END,
- 
--	PINMUX_INPUT_PULLUP_BEGIN,
--	PTA7_IN_PU, PTA6_IN_PU, PTA5_IN_PU, PTA4_IN_PU,
--	PTA3_IN_PU, PTA2_IN_PU, PTA1_IN_PU, PTA0_IN_PU,
--	PTB7_IN_PU, PTB6_IN_PU, PTB5_IN_PU, PTB4_IN_PU,
--	PTB3_IN_PU, PTB2_IN_PU, PTB1_IN_PU, PTB0_IN_PU,
--	PTC7_IN_PU, PTC6_IN_PU, PTC5_IN_PU, PTC4_IN_PU,
--	PTC3_IN_PU, PTC2_IN_PU, PTC1_IN_PU, PTC0_IN_PU,
--	PTD7_IN_PU, PTD6_IN_PU, PTD5_IN_PU, PTD4_IN_PU,
--	PTD3_IN_PU, PTD2_IN_PU, PTD1_IN_PU, PTD0_IN_PU,
--	PTE4_IN_PU, PTE3_IN_PU, PTE2_IN_PU, PTE1_IN_PU, PTE0_IN_PU,
--	PTF0_IN_PU,
--	PTG6_IN_PU, PTG5_IN_PU, PTG4_IN_PU,
--	PTG3_IN_PU, PTG2_IN_PU, PTG1_IN_PU, PTG0_IN_PU,
--	PTH6_IN_PU, PTH5_IN_PU, PTH4_IN_PU,
--	PTH3_IN_PU, PTH2_IN_PU, PTH1_IN_PU, PTH0_IN_PU,
--	PTJ6_IN_PU, PTJ5_IN_PU, PTJ4_IN_PU,
--	PTJ3_IN_PU, PTJ2_IN_PU, PTJ1_IN_PU, PTJ0_IN_PU,
--	PTK3_IN_PU, PTK2_IN_PU, PTK1_IN_PU, PTK0_IN_PU,
--	PTL7_IN_PU, PTL6_IN_PU, PTL5_IN_PU, PTL4_IN_PU, PTL3_IN_PU,
--	PTM7_IN_PU, PTM6_IN_PU, PTM5_IN_PU, PTM4_IN_PU,
--	PTM3_IN_PU, PTM2_IN_PU, PTM1_IN_PU, PTM0_IN_PU,
--	PTP4_IN_PU, PTP3_IN_PU, PTP2_IN_PU, PTP1_IN_PU, PTP0_IN_PU,
--	PTR7_IN_PU, PTR6_IN_PU, PTR5_IN_PU, PTR4_IN_PU,
--	PTR3_IN_PU, PTR2_IN_PU, PTR1_IN_PU, PTR0_IN_PU,
--	PTS4_IN_PU, PTS3_IN_PU, PTS2_IN_PU, PTS1_IN_PU, PTS0_IN_PU,
--	PTT4_IN_PU, PTT3_IN_PU, PTT2_IN_PU, PTT1_IN_PU, PTT0_IN_PU,
--	PTU4_IN_PU, PTU3_IN_PU, PTU2_IN_PU, PTU1_IN_PU, PTU0_IN_PU,
--	PTV4_IN_PU, PTV3_IN_PU, PTV2_IN_PU, PTV1_IN_PU, PTV0_IN_PU,
--	PINMUX_INPUT_PULLUP_END,
--
- 	PINMUX_OUTPUT_BEGIN,
- 	PTA7_OUT, PTA6_OUT, PTA5_OUT, PTA4_OUT,
- 	PTA3_OUT, PTA2_OUT, PTA1_OUT, PTA0_OUT,
-@@ -264,53 +234,53 @@ enum {
- 
- static const pinmux_enum_t pinmux_data[] = {
- 	/* PTA GPIO */
--	PINMUX_DATA(PTA7_DATA, PTA7_IN, PTA7_OUT, PTA7_IN_PU),
--	PINMUX_DATA(PTA6_DATA, PTA6_IN, PTA6_OUT, PTA6_IN_PU),
--	PINMUX_DATA(PTA5_DATA, PTA5_IN, PTA5_OUT, PTA5_IN_PU),
--	PINMUX_DATA(PTA4_DATA, PTA4_IN, PTA4_OUT, PTA4_IN_PU),
--	PINMUX_DATA(PTA3_DATA, PTA3_IN, PTA3_OUT, PTA3_IN_PU),
--	PINMUX_DATA(PTA2_DATA, PTA2_IN, PTA2_OUT, PTA2_IN_PU),
--	PINMUX_DATA(PTA1_DATA, PTA1_IN, PTA1_OUT, PTA1_IN_PU),
--	PINMUX_DATA(PTA0_DATA, PTA0_IN, PTA0_OUT, PTA0_IN_PU),
-+	PINMUX_DATA(PTA7_DATA, PTA7_IN, PTA7_OUT),
-+	PINMUX_DATA(PTA6_DATA, PTA6_IN, PTA6_OUT),
-+	PINMUX_DATA(PTA5_DATA, PTA5_IN, PTA5_OUT),
-+	PINMUX_DATA(PTA4_DATA, PTA4_IN, PTA4_OUT),
-+	PINMUX_DATA(PTA3_DATA, PTA3_IN, PTA3_OUT),
-+	PINMUX_DATA(PTA2_DATA, PTA2_IN, PTA2_OUT),
-+	PINMUX_DATA(PTA1_DATA, PTA1_IN, PTA1_OUT),
-+	PINMUX_DATA(PTA0_DATA, PTA0_IN, PTA0_OUT),
- 
- 	/* PTB GPIO */
--	PINMUX_DATA(PTB7_DATA, PTB7_IN, PTB7_OUT, PTB7_IN_PU),
--	PINMUX_DATA(PTB6_DATA, PTB6_IN, PTB6_OUT, PTB6_IN_PU),
--	PINMUX_DATA(PTB5_DATA, PTB5_IN, PTB5_OUT, PTB5_IN_PU),
--	PINMUX_DATA(PTB4_DATA, PTB4_IN, PTB4_OUT, PTB4_IN_PU),
--	PINMUX_DATA(PTB3_DATA, PTB3_IN, PTB3_OUT, PTB3_IN_PU),
--	PINMUX_DATA(PTB2_DATA, PTB2_IN, PTB2_OUT, PTB2_IN_PU),
--	PINMUX_DATA(PTB1_DATA, PTB1_IN, PTB1_OUT, PTB1_IN_PU),
--	PINMUX_DATA(PTB0_DATA, PTB0_IN, PTB0_OUT, PTB0_IN_PU),
-+	PINMUX_DATA(PTB7_DATA, PTB7_IN, PTB7_OUT),
-+	PINMUX_DATA(PTB6_DATA, PTB6_IN, PTB6_OUT),
-+	PINMUX_DATA(PTB5_DATA, PTB5_IN, PTB5_OUT),
-+	PINMUX_DATA(PTB4_DATA, PTB4_IN, PTB4_OUT),
-+	PINMUX_DATA(PTB3_DATA, PTB3_IN, PTB3_OUT),
-+	PINMUX_DATA(PTB2_DATA, PTB2_IN, PTB2_OUT),
-+	PINMUX_DATA(PTB1_DATA, PTB1_IN, PTB1_OUT),
-+	PINMUX_DATA(PTB0_DATA, PTB0_IN, PTB0_OUT),
- 
- 	/* PTC GPIO */
--	PINMUX_DATA(PTC7_DATA, PTC7_IN, PTC7_OUT, PTC7_IN_PU),
--	PINMUX_DATA(PTC6_DATA, PTC6_IN, PTC6_OUT, PTC6_IN_PU),
--	PINMUX_DATA(PTC5_DATA, PTC5_IN, PTC5_OUT, PTC5_IN_PU),
--	PINMUX_DATA(PTC4_DATA, PTC4_IN, PTC4_OUT, PTC4_IN_PU),
--	PINMUX_DATA(PTC3_DATA, PTC3_IN, PTC3_OUT, PTC3_IN_PU),
--	PINMUX_DATA(PTC2_DATA, PTC2_IN, PTC2_OUT, PTC2_IN_PU),
--	PINMUX_DATA(PTC1_DATA, PTC1_IN, PTC1_OUT, PTC1_IN_PU),
--	PINMUX_DATA(PTC0_DATA, PTC0_IN, PTC0_OUT, PTC0_IN_PU),
-+	PINMUX_DATA(PTC7_DATA, PTC7_IN, PTC7_OUT),
-+	PINMUX_DATA(PTC6_DATA, PTC6_IN, PTC6_OUT),
-+	PINMUX_DATA(PTC5_DATA, PTC5_IN, PTC5_OUT),
-+	PINMUX_DATA(PTC4_DATA, PTC4_IN, PTC4_OUT),
-+	PINMUX_DATA(PTC3_DATA, PTC3_IN, PTC3_OUT),
-+	PINMUX_DATA(PTC2_DATA, PTC2_IN, PTC2_OUT),
-+	PINMUX_DATA(PTC1_DATA, PTC1_IN, PTC1_OUT),
-+	PINMUX_DATA(PTC0_DATA, PTC0_IN, PTC0_OUT),
- 
- 	/* PTD GPIO */
--	PINMUX_DATA(PTD7_DATA, PTD7_IN, PTD7_OUT, PTD7_IN_PU),
--	PINMUX_DATA(PTD6_DATA, PTD6_IN, PTD6_OUT, PTD6_IN_PU),
--	PINMUX_DATA(PTD5_DATA, PTD5_IN, PTD5_OUT, PTD5_IN_PU),
--	PINMUX_DATA(PTD4_DATA, PTD4_IN, PTD4_OUT, PTD4_IN_PU),
--	PINMUX_DATA(PTD3_DATA, PTD3_IN, PTD3_OUT, PTD3_IN_PU),
--	PINMUX_DATA(PTD2_DATA, PTD2_IN, PTD2_OUT, PTD2_IN_PU),
--	PINMUX_DATA(PTD1_DATA, PTD1_IN, PTD1_OUT, PTD1_IN_PU),
--	PINMUX_DATA(PTD0_DATA, PTD0_IN, PTD0_OUT, PTD0_IN_PU),
-+	PINMUX_DATA(PTD7_DATA, PTD7_IN, PTD7_OUT),
-+	PINMUX_DATA(PTD6_DATA, PTD6_IN, PTD6_OUT),
-+	PINMUX_DATA(PTD5_DATA, PTD5_IN, PTD5_OUT),
-+	PINMUX_DATA(PTD4_DATA, PTD4_IN, PTD4_OUT),
-+	PINMUX_DATA(PTD3_DATA, PTD3_IN, PTD3_OUT),
-+	PINMUX_DATA(PTD2_DATA, PTD2_IN, PTD2_OUT),
-+	PINMUX_DATA(PTD1_DATA, PTD1_IN, PTD1_OUT),
-+	PINMUX_DATA(PTD0_DATA, PTD0_IN, PTD0_OUT),
- 
- 	/* PTE GPIO */
- 	PINMUX_DATA(PTE6_DATA, PTE6_IN),
- 	PINMUX_DATA(PTE5_DATA, PTE5_IN),
--	PINMUX_DATA(PTE4_DATA, PTE4_IN, PTE4_OUT, PTE4_IN_PU),
--	PINMUX_DATA(PTE3_DATA, PTE3_IN, PTE3_OUT, PTE3_IN_PU),
--	PINMUX_DATA(PTE2_DATA, PTE2_IN, PTE2_OUT, PTE2_IN_PU),
--	PINMUX_DATA(PTE1_DATA, PTE1_IN, PTE1_OUT, PTE1_IN_PU),
--	PINMUX_DATA(PTE0_DATA, PTE0_IN, PTE0_OUT, PTE0_IN_PU),
-+	PINMUX_DATA(PTE4_DATA, PTE4_IN, PTE4_OUT),
-+	PINMUX_DATA(PTE3_DATA, PTE3_IN, PTE3_OUT),
-+	PINMUX_DATA(PTE2_DATA, PTE2_IN, PTE2_OUT),
-+	PINMUX_DATA(PTE1_DATA, PTE1_IN, PTE1_OUT),
-+	PINMUX_DATA(PTE0_DATA, PTE0_IN, PTE0_OUT),
- 
- 	/* PTF GPIO */
- 	PINMUX_DATA(PTF6_DATA, PTF6_IN),
-@@ -319,102 +289,102 @@ static const pinmux_enum_t pinmux_data[] = {
- 	PINMUX_DATA(PTF3_DATA, PTF3_IN),
- 	PINMUX_DATA(PTF2_DATA, PTF2_IN),
- 	PINMUX_DATA(PTF1_DATA, PTF1_IN),
--	PINMUX_DATA(PTF0_DATA, PTF0_IN, PTF0_OUT, PTF0_IN_PU),
-+	PINMUX_DATA(PTF0_DATA, PTF0_IN, PTF0_OUT),
- 
- 	/* PTG GPIO */
--	PINMUX_DATA(PTG6_DATA, PTG6_IN, PTG6_OUT, PTG6_IN_PU),
--	PINMUX_DATA(PTG5_DATA, PTG5_IN, PTG5_OUT, PTG5_IN_PU),
--	PINMUX_DATA(PTG4_DATA, PTG4_IN, PTG4_OUT, PTG4_IN_PU),
--	PINMUX_DATA(PTG3_DATA, PTG3_IN, PTG3_OUT, PTG3_IN_PU),
--	PINMUX_DATA(PTG2_DATA, PTG2_IN, PTG2_OUT, PTG2_IN_PU),
--	PINMUX_DATA(PTG1_DATA, PTG1_IN, PTG1_OUT, PTG1_IN_PU),
--	PINMUX_DATA(PTG0_DATA, PTG0_IN, PTG0_OUT, PTG0_IN_PU),
-+	PINMUX_DATA(PTG6_DATA, PTG6_IN, PTG6_OUT),
-+	PINMUX_DATA(PTG5_DATA, PTG5_IN, PTG5_OUT),
-+	PINMUX_DATA(PTG4_DATA, PTG4_IN, PTG4_OUT),
-+	PINMUX_DATA(PTG3_DATA, PTG3_IN, PTG3_OUT),
-+	PINMUX_DATA(PTG2_DATA, PTG2_IN, PTG2_OUT),
-+	PINMUX_DATA(PTG1_DATA, PTG1_IN, PTG1_OUT),
-+	PINMUX_DATA(PTG0_DATA, PTG0_IN, PTG0_OUT),
- 
- 	/* PTH GPIO */
--	PINMUX_DATA(PTH6_DATA, PTH6_IN, PTH6_OUT, PTH6_IN_PU),
--	PINMUX_DATA(PTH5_DATA, PTH5_IN, PTH5_OUT, PTH5_IN_PU),
--	PINMUX_DATA(PTH4_DATA, PTH4_IN, PTH4_OUT, PTH4_IN_PU),
--	PINMUX_DATA(PTH3_DATA, PTH3_IN, PTH3_OUT, PTH3_IN_PU),
--	PINMUX_DATA(PTH2_DATA, PTH2_IN, PTH2_OUT, PTH2_IN_PU),
--	PINMUX_DATA(PTH1_DATA, PTH1_IN, PTH1_OUT, PTH1_IN_PU),
--	PINMUX_DATA(PTH0_DATA, PTH0_IN, PTH0_OUT, PTH0_IN_PU),
-+	PINMUX_DATA(PTH6_DATA, PTH6_IN, PTH6_OUT),
-+	PINMUX_DATA(PTH5_DATA, PTH5_IN, PTH5_OUT),
-+	PINMUX_DATA(PTH4_DATA, PTH4_IN, PTH4_OUT),
-+	PINMUX_DATA(PTH3_DATA, PTH3_IN, PTH3_OUT),
-+	PINMUX_DATA(PTH2_DATA, PTH2_IN, PTH2_OUT),
-+	PINMUX_DATA(PTH1_DATA, PTH1_IN, PTH1_OUT),
-+	PINMUX_DATA(PTH0_DATA, PTH0_IN, PTH0_OUT),
- 
- 	/* PTJ GPIO */
--	PINMUX_DATA(PTJ6_DATA, PTJ6_IN, PTJ6_OUT, PTJ6_IN_PU),
--	PINMUX_DATA(PTJ5_DATA, PTJ5_IN, PTJ5_OUT, PTJ5_IN_PU),
--	PINMUX_DATA(PTJ4_DATA, PTJ4_IN, PTJ4_OUT, PTJ4_IN_PU),
--	PINMUX_DATA(PTJ3_DATA, PTJ3_IN, PTJ3_OUT, PTJ3_IN_PU),
--	PINMUX_DATA(PTJ2_DATA, PTJ2_IN, PTJ2_OUT, PTJ2_IN_PU),
--	PINMUX_DATA(PTJ1_DATA, PTJ1_IN, PTJ1_OUT, PTJ1_IN_PU),
--	PINMUX_DATA(PTJ0_DATA, PTJ0_IN, PTJ0_OUT, PTJ0_IN_PU),
-+	PINMUX_DATA(PTJ6_DATA, PTJ6_IN, PTJ6_OUT),
-+	PINMUX_DATA(PTJ5_DATA, PTJ5_IN, PTJ5_OUT),
-+	PINMUX_DATA(PTJ4_DATA, PTJ4_IN, PTJ4_OUT),
-+	PINMUX_DATA(PTJ3_DATA, PTJ3_IN, PTJ3_OUT),
-+	PINMUX_DATA(PTJ2_DATA, PTJ2_IN, PTJ2_OUT),
-+	PINMUX_DATA(PTJ1_DATA, PTJ1_IN, PTJ1_OUT),
-+	PINMUX_DATA(PTJ0_DATA, PTJ0_IN, PTJ0_OUT),
- 
- 	/* PTK GPIO */
--	PINMUX_DATA(PTK3_DATA, PTK3_IN, PTK3_OUT, PTK3_IN_PU),
--	PINMUX_DATA(PTK2_DATA, PTK2_IN, PTK2_OUT, PTK2_IN_PU),
--	PINMUX_DATA(PTK1_DATA, PTK1_IN, PTK1_OUT, PTK1_IN_PU),
--	PINMUX_DATA(PTK0_DATA, PTK0_IN, PTK0_OUT, PTK0_IN_PU),
-+	PINMUX_DATA(PTK3_DATA, PTK3_IN, PTK3_OUT),
-+	PINMUX_DATA(PTK2_DATA, PTK2_IN, PTK2_OUT),
-+	PINMUX_DATA(PTK1_DATA, PTK1_IN, PTK1_OUT),
-+	PINMUX_DATA(PTK0_DATA, PTK0_IN, PTK0_OUT),
- 
- 	/* PTL GPIO */
--	PINMUX_DATA(PTL7_DATA, PTL7_IN, PTL7_OUT, PTL7_IN_PU),
--	PINMUX_DATA(PTL6_DATA, PTL6_IN, PTL6_OUT, PTL6_IN_PU),
--	PINMUX_DATA(PTL5_DATA, PTL5_IN, PTL5_OUT, PTL5_IN_PU),
--	PINMUX_DATA(PTL4_DATA, PTL4_IN, PTL4_OUT, PTL4_IN_PU),
--	PINMUX_DATA(PTL3_DATA, PTL3_IN, PTL3_OUT, PTL3_IN_PU),
-+	PINMUX_DATA(PTL7_DATA, PTL7_IN, PTL7_OUT),
-+	PINMUX_DATA(PTL6_DATA, PTL6_IN, PTL6_OUT),
-+	PINMUX_DATA(PTL5_DATA, PTL5_IN, PTL5_OUT),
-+	PINMUX_DATA(PTL4_DATA, PTL4_IN, PTL4_OUT),
-+	PINMUX_DATA(PTL3_DATA, PTL3_IN, PTL3_OUT),
- 
- 	/* PTM GPIO */
--	PINMUX_DATA(PTM7_DATA, PTM7_IN, PTM7_OUT, PTM7_IN_PU),
--	PINMUX_DATA(PTM6_DATA, PTM6_IN, PTM6_OUT, PTM6_IN_PU),
--	PINMUX_DATA(PTM5_DATA, PTM5_IN, PTM5_OUT, PTM5_IN_PU),
--	PINMUX_DATA(PTM4_DATA, PTM4_IN, PTM4_OUT, PTM4_IN_PU),
--	PINMUX_DATA(PTM3_DATA, PTM3_IN, PTM3_OUT, PTM3_IN_PU),
--	PINMUX_DATA(PTM2_DATA, PTM2_IN, PTM2_OUT, PTM2_IN_PU),
--	PINMUX_DATA(PTM1_DATA, PTM1_IN, PTM1_OUT, PTM1_IN_PU),
--	PINMUX_DATA(PTM0_DATA, PTM0_IN, PTM0_OUT, PTM0_IN_PU),
-+	PINMUX_DATA(PTM7_DATA, PTM7_IN, PTM7_OUT),
-+	PINMUX_DATA(PTM6_DATA, PTM6_IN, PTM6_OUT),
-+	PINMUX_DATA(PTM5_DATA, PTM5_IN, PTM5_OUT),
-+	PINMUX_DATA(PTM4_DATA, PTM4_IN, PTM4_OUT),
-+	PINMUX_DATA(PTM3_DATA, PTM3_IN, PTM3_OUT),
-+	PINMUX_DATA(PTM2_DATA, PTM2_IN, PTM2_OUT),
-+	PINMUX_DATA(PTM1_DATA, PTM1_IN, PTM1_OUT),
-+	PINMUX_DATA(PTM0_DATA, PTM0_IN, PTM0_OUT),
- 
- 	/* PTP GPIO */
--	PINMUX_DATA(PTP4_DATA, PTP4_IN, PTP4_OUT, PTP4_IN_PU),
--	PINMUX_DATA(PTP3_DATA, PTP3_IN, PTP3_OUT, PTP3_IN_PU),
--	PINMUX_DATA(PTP2_DATA, PTP2_IN, PTP2_OUT, PTP2_IN_PU),
--	PINMUX_DATA(PTP1_DATA, PTP1_IN, PTP1_OUT, PTP1_IN_PU),
--	PINMUX_DATA(PTP0_DATA, PTP0_IN, PTP0_OUT, PTP0_IN_PU),
-+	PINMUX_DATA(PTP4_DATA, PTP4_IN, PTP4_OUT),
-+	PINMUX_DATA(PTP3_DATA, PTP3_IN, PTP3_OUT),
-+	PINMUX_DATA(PTP2_DATA, PTP2_IN, PTP2_OUT),
-+	PINMUX_DATA(PTP1_DATA, PTP1_IN, PTP1_OUT),
-+	PINMUX_DATA(PTP0_DATA, PTP0_IN, PTP0_OUT),
- 
- 	/* PTR GPIO */
--	PINMUX_DATA(PTR7_DATA, PTR7_IN, PTR7_OUT, PTR7_IN_PU),
--	PINMUX_DATA(PTR6_DATA, PTR6_IN, PTR6_OUT, PTR6_IN_PU),
--	PINMUX_DATA(PTR5_DATA, PTR5_IN, PTR5_OUT, PTR5_IN_PU),
--	PINMUX_DATA(PTR4_DATA, PTR4_IN, PTR4_OUT, PTR4_IN_PU),
--	PINMUX_DATA(PTR3_DATA, PTR3_IN, PTR3_OUT, PTR3_IN_PU),
--	PINMUX_DATA(PTR2_DATA, PTR2_IN, PTR2_OUT, PTR2_IN_PU),
--	PINMUX_DATA(PTR1_DATA, PTR1_IN, PTR1_OUT, PTR1_IN_PU),
--	PINMUX_DATA(PTR0_DATA, PTR0_IN, PTR0_OUT, PTR0_IN_PU),
-+	PINMUX_DATA(PTR7_DATA, PTR7_IN, PTR7_OUT),
-+	PINMUX_DATA(PTR6_DATA, PTR6_IN, PTR6_OUT),
-+	PINMUX_DATA(PTR5_DATA, PTR5_IN, PTR5_OUT),
-+	PINMUX_DATA(PTR4_DATA, PTR4_IN, PTR4_OUT),
-+	PINMUX_DATA(PTR3_DATA, PTR3_IN, PTR3_OUT),
-+	PINMUX_DATA(PTR2_DATA, PTR2_IN, PTR2_OUT),
-+	PINMUX_DATA(PTR1_DATA, PTR1_IN, PTR1_OUT),
-+	PINMUX_DATA(PTR0_DATA, PTR0_IN, PTR0_OUT),
- 
- 	/* PTS GPIO */
--	PINMUX_DATA(PTS4_DATA, PTS4_IN, PTS4_OUT, PTS4_IN_PU),
--	PINMUX_DATA(PTS3_DATA, PTS3_IN, PTS3_OUT, PTS3_IN_PU),
--	PINMUX_DATA(PTS2_DATA, PTS2_IN, PTS2_OUT, PTS2_IN_PU),
--	PINMUX_DATA(PTS1_DATA, PTS1_IN, PTS1_OUT, PTS1_IN_PU),
--	PINMUX_DATA(PTS0_DATA, PTS0_IN, PTS0_OUT, PTS0_IN_PU),
-+	PINMUX_DATA(PTS4_DATA, PTS4_IN, PTS4_OUT),
-+	PINMUX_DATA(PTS3_DATA, PTS3_IN, PTS3_OUT),
-+	PINMUX_DATA(PTS2_DATA, PTS2_IN, PTS2_OUT),
-+	PINMUX_DATA(PTS1_DATA, PTS1_IN, PTS1_OUT),
-+	PINMUX_DATA(PTS0_DATA, PTS0_IN, PTS0_OUT),
- 
- 	/* PTT GPIO */
--	PINMUX_DATA(PTT4_DATA, PTT4_IN, PTT4_OUT, PTT4_IN_PU),
--	PINMUX_DATA(PTT3_DATA, PTT3_IN, PTT3_OUT, PTT3_IN_PU),
--	PINMUX_DATA(PTT2_DATA, PTT2_IN, PTT2_OUT, PTT2_IN_PU),
--	PINMUX_DATA(PTT1_DATA, PTT1_IN, PTT1_OUT, PTT1_IN_PU),
--	PINMUX_DATA(PTT0_DATA, PTT0_IN, PTT0_OUT, PTT0_IN_PU),
-+	PINMUX_DATA(PTT4_DATA, PTT4_IN, PTT4_OUT),
-+	PINMUX_DATA(PTT3_DATA, PTT3_IN, PTT3_OUT),
-+	PINMUX_DATA(PTT2_DATA, PTT2_IN, PTT2_OUT),
-+	PINMUX_DATA(PTT1_DATA, PTT1_IN, PTT1_OUT),
-+	PINMUX_DATA(PTT0_DATA, PTT0_IN, PTT0_OUT),
- 
- 	/* PTU GPIO */
--	PINMUX_DATA(PTU4_DATA, PTU4_IN, PTU4_OUT, PTU4_IN_PU),
--	PINMUX_DATA(PTU3_DATA, PTU3_IN, PTU3_OUT, PTU3_IN_PU),
--	PINMUX_DATA(PTU2_DATA, PTU2_IN, PTU2_OUT, PTU2_IN_PU),
--	PINMUX_DATA(PTU1_DATA, PTU1_IN, PTU1_OUT, PTU1_IN_PU),
--	PINMUX_DATA(PTU0_DATA, PTU0_IN, PTU0_OUT, PTU0_IN_PU),
-+	PINMUX_DATA(PTU4_DATA, PTU4_IN, PTU4_OUT),
-+	PINMUX_DATA(PTU3_DATA, PTU3_IN, PTU3_OUT),
-+	PINMUX_DATA(PTU2_DATA, PTU2_IN, PTU2_OUT),
-+	PINMUX_DATA(PTU1_DATA, PTU1_IN, PTU1_OUT),
-+	PINMUX_DATA(PTU0_DATA, PTU0_IN, PTU0_OUT),
- 
- 	/* PTV GPIO */
--	PINMUX_DATA(PTV4_DATA, PTV4_IN, PTV4_OUT, PTV4_IN_PU),
--	PINMUX_DATA(PTV3_DATA, PTV3_IN, PTV3_OUT, PTV3_IN_PU),
--	PINMUX_DATA(PTV2_DATA, PTV2_IN, PTV2_OUT, PTV2_IN_PU),
--	PINMUX_DATA(PTV1_DATA, PTV1_IN, PTV1_OUT, PTV1_IN_PU),
--	PINMUX_DATA(PTV0_DATA, PTV0_IN, PTV0_OUT, PTV0_IN_PU),
-+	PINMUX_DATA(PTV4_DATA, PTV4_IN, PTV4_OUT),
-+	PINMUX_DATA(PTV3_DATA, PTV3_IN, PTV3_OUT),
-+	PINMUX_DATA(PTV2_DATA, PTV2_IN, PTV2_OUT),
-+	PINMUX_DATA(PTV1_DATA, PTV1_IN, PTV1_OUT),
-+	PINMUX_DATA(PTV0_DATA, PTV0_IN, PTV0_OUT),
- 
- 	/* PTA FN */
- 	PINMUX_DATA(D23_MARK, PTA7_FN),
-@@ -959,54 +929,54 @@ static const struct pinmux_func pinmux_func_gpios[] = {
- 
- static const struct pinmux_cfg_reg pinmux_config_regs[] = {
- 	{ PINMUX_CFG_REG("PACR", 0xa4050100, 16, 2) {
--		PTA7_FN, PTA7_OUT, PTA7_IN_PU, PTA7_IN,
--		PTA6_FN, PTA6_OUT, PTA6_IN_PU, PTA6_IN,
--		PTA5_FN, PTA5_OUT, PTA5_IN_PU, PTA5_IN,
--		PTA4_FN, PTA4_OUT, PTA4_IN_PU, PTA4_IN,
--		PTA3_FN, PTA3_OUT, PTA3_IN_PU, PTA3_IN,
--		PTA2_FN, PTA2_OUT, PTA2_IN_PU, PTA2_IN,
--		PTA1_FN, PTA1_OUT, PTA1_IN_PU, PTA1_IN,
--		PTA0_FN, PTA0_OUT, PTA0_IN_PU, PTA0_IN }
-+		PTA7_FN, PTA7_OUT, 0, PTA7_IN,
-+		PTA6_FN, PTA6_OUT, 0, PTA6_IN,
-+		PTA5_FN, PTA5_OUT, 0, PTA5_IN,
-+		PTA4_FN, PTA4_OUT, 0, PTA4_IN,
-+		PTA3_FN, PTA3_OUT, 0, PTA3_IN,
-+		PTA2_FN, PTA2_OUT, 0, PTA2_IN,
-+		PTA1_FN, PTA1_OUT, 0, PTA1_IN,
-+		PTA0_FN, PTA0_OUT, 0, PTA0_IN }
- 	},
- 	{ PINMUX_CFG_REG("PBCR", 0xa4050102, 16, 2) {
--		PTB7_FN, PTB7_OUT, PTB7_IN_PU, PTB7_IN,
--		PTB6_FN, PTB6_OUT, PTB6_IN_PU, PTB6_IN,
--		PTB5_FN, PTB5_OUT, PTB5_IN_PU, PTB5_IN,
--		PTB4_FN, PTB4_OUT, PTB4_IN_PU, PTB4_IN,
--		PTB3_FN, PTB3_OUT, PTB3_IN_PU, PTB3_IN,
--		PTB2_FN, PTB2_OUT, PTB2_IN_PU, PTB2_IN,
--		PTB1_FN, PTB1_OUT, PTB1_IN_PU, PTB1_IN,
--		PTB0_FN, PTB0_OUT, PTB0_IN_PU, PTB0_IN }
-+		PTB7_FN, PTB7_OUT, 0, PTB7_IN,
-+		PTB6_FN, PTB6_OUT, 0, PTB6_IN,
-+		PTB5_FN, PTB5_OUT, 0, PTB5_IN,
-+		PTB4_FN, PTB4_OUT, 0, PTB4_IN,
-+		PTB3_FN, PTB3_OUT, 0, PTB3_IN,
-+		PTB2_FN, PTB2_OUT, 0, PTB2_IN,
-+		PTB1_FN, PTB1_OUT, 0, PTB1_IN,
-+		PTB0_FN, PTB0_OUT, 0, PTB0_IN }
- 	},
- 	{ PINMUX_CFG_REG("PCCR", 0xa4050104, 16, 2) {
--		PTC7_FN, PTC7_OUT, PTC7_IN_PU, PTC7_IN,
--		PTC6_FN, PTC6_OUT, PTC6_IN_PU, PTC6_IN,
--		PTC5_FN, PTC5_OUT, PTC5_IN_PU, PTC5_IN,
--		PTC4_FN, PTC4_OUT, PTC4_IN_PU, PTC4_IN,
--		PTC3_FN, PTC3_OUT, PTC3_IN_PU, PTC3_IN,
--		PTC2_FN, PTC2_OUT, PTC2_IN_PU, PTC2_IN,
--		PTC1_FN, PTC1_OUT, PTC1_IN_PU, PTC1_IN,
--		PTC0_FN, PTC0_OUT, PTC0_IN_PU, PTC0_IN }
-+		PTC7_FN, PTC7_OUT, 0, PTC7_IN,
-+		PTC6_FN, PTC6_OUT, 0, PTC6_IN,
-+		PTC5_FN, PTC5_OUT, 0, PTC5_IN,
-+		PTC4_FN, PTC4_OUT, 0, PTC4_IN,
-+		PTC3_FN, PTC3_OUT, 0, PTC3_IN,
-+		PTC2_FN, PTC2_OUT, 0, PTC2_IN,
-+		PTC1_FN, PTC1_OUT, 0, PTC1_IN,
-+		PTC0_FN, PTC0_OUT, 0, PTC0_IN }
- 	},
- 	{ PINMUX_CFG_REG("PDCR", 0xa4050106, 16, 2) {
--		PTD7_FN, PTD7_OUT, PTD7_IN_PU, PTD7_IN,
--		PTD6_FN, PTD6_OUT, PTD6_IN_PU, PTD6_IN,
--		PTD5_FN, PTD5_OUT, PTD5_IN_PU, PTD5_IN,
--		PTD4_FN, PTD4_OUT, PTD4_IN_PU, PTD4_IN,
--		PTD3_FN, PTD3_OUT, PTD3_IN_PU, PTD3_IN,
--		PTD2_FN, PTD2_OUT, PTD2_IN_PU, PTD2_IN,
--		PTD1_FN, PTD1_OUT, PTD1_IN_PU, PTD1_IN,
--		PTD0_FN, PTD0_OUT, PTD0_IN_PU, PTD0_IN }
-+		PTD7_FN, PTD7_OUT, 0, PTD7_IN,
-+		PTD6_FN, PTD6_OUT, 0, PTD6_IN,
-+		PTD5_FN, PTD5_OUT, 0, PTD5_IN,
-+		PTD4_FN, PTD4_OUT, 0, PTD4_IN,
-+		PTD3_FN, PTD3_OUT, 0, PTD3_IN,
-+		PTD2_FN, PTD2_OUT, 0, PTD2_IN,
-+		PTD1_FN, PTD1_OUT, 0, PTD1_IN,
-+		PTD0_FN, PTD0_OUT, 0, PTD0_IN }
- 	},
- 	{ PINMUX_CFG_REG("PECR", 0xa4050108, 16, 2) {
- 		0, 0, 0, 0,
- 		PTE6_FN, 0, 0, PTE6_IN,
- 		PTE5_FN, 0, 0, PTE5_IN,
--		PTE4_FN, PTE4_OUT, PTE4_IN_PU, PTE4_IN,
--		PTE3_FN, PTE3_OUT, PTE3_IN_PU, PTE3_IN,
--		PTE2_FN, PTE2_OUT, PTE2_IN_PU, PTE2_IN,
--		PTE1_FN, PTE1_OUT, PTE1_IN_PU, PTE1_IN,
--		PTE0_FN, PTE0_OUT, PTE0_IN_PU, PTE0_IN }
-+		PTE4_FN, PTE4_OUT, 0, PTE4_IN,
-+		PTE3_FN, PTE3_OUT, 0, PTE3_IN,
-+		PTE2_FN, PTE2_OUT, 0, PTE2_IN,
-+		PTE1_FN, PTE1_OUT, 0, PTE1_IN,
-+		PTE0_FN, PTE0_OUT, 0, PTE0_IN }
- 	},
- 	{ PINMUX_CFG_REG("PFCR", 0xa405010a, 16, 2) {
- 		0, 0, 0, 0,
-@@ -1020,123 +990,123 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
- 	},
- 	{ PINMUX_CFG_REG("PGCR", 0xa405010c, 16, 2) {
- 		0, 0, 0, 0,
--		PTG6_FN, PTG6_OUT, PTG6_IN_PU, PTG6_IN,
--		PTG5_FN, PTG5_OUT, PTG5_IN_PU, PTG5_IN,
--		PTG4_FN, PTG4_OUT, PTG4_IN_PU, PTG4_IN,
--		PTG3_FN, PTG3_OUT, PTG3_IN_PU, PTG3_IN,
--		PTG2_FN, PTG2_OUT, PTG2_IN_PU, PTG2_IN,
--		PTG1_FN, PTG1_OUT, PTG1_IN_PU, PTG1_IN,
--		PTG0_FN, PTG0_OUT, PTG0_IN_PU, PTG0_IN }
-+		PTG6_FN, PTG6_OUT, 0, PTG6_IN,
-+		PTG5_FN, PTG5_OUT, 0, PTG5_IN,
-+		PTG4_FN, PTG4_OUT, 0, PTG4_IN,
-+		PTG3_FN, PTG3_OUT, 0, PTG3_IN,
-+		PTG2_FN, PTG2_OUT, 0, PTG2_IN,
-+		PTG1_FN, PTG1_OUT, 0, PTG1_IN,
-+		PTG0_FN, PTG0_OUT, 0, PTG0_IN }
- 	},
- 	{ PINMUX_CFG_REG("PHCR", 0xa405010e, 16, 2) {
- 		0, 0, 0, 0,
--		PTH6_FN, PTH6_OUT, PTH6_IN_PU, PTH6_IN,
--		PTH5_FN, PTH5_OUT, PTH5_IN_PU, PTH5_IN,
--		PTH4_FN, PTH4_OUT, PTH4_IN_PU, PTH4_IN,
--		PTH3_FN, PTH3_OUT, PTH3_IN_PU, PTH3_IN,
--		PTH2_FN, PTH2_OUT, PTH2_IN_PU, PTH2_IN,
--		PTH1_FN, PTH1_OUT, PTH1_IN_PU, PTH1_IN,
--		PTH0_FN, PTH0_OUT, PTH0_IN_PU, PTH0_IN }
-+		PTH6_FN, PTH6_OUT, 0, PTH6_IN,
-+		PTH5_FN, PTH5_OUT, 0, PTH5_IN,
-+		PTH4_FN, PTH4_OUT, 0, PTH4_IN,
-+		PTH3_FN, PTH3_OUT, 0, PTH3_IN,
-+		PTH2_FN, PTH2_OUT, 0, PTH2_IN,
-+		PTH1_FN, PTH1_OUT, 0, PTH1_IN,
-+		PTH0_FN, PTH0_OUT, 0, PTH0_IN }
- 	},
- 	{ PINMUX_CFG_REG("PJCR", 0xa4050110, 16, 2) {
- 		0, 0, 0, 0,
--		PTJ6_FN, PTJ6_OUT, PTJ6_IN_PU, PTJ6_IN,
--		PTJ5_FN, PTJ5_OUT, PTJ5_IN_PU, PTJ5_IN,
--		PTJ4_FN, PTJ4_OUT, PTJ4_IN_PU, PTJ4_IN,
--		PTJ3_FN, PTJ3_OUT, PTJ3_IN_PU, PTJ3_IN,
--		PTJ2_FN, PTJ2_OUT, PTJ2_IN_PU, PTJ2_IN,
--		PTJ1_FN, PTJ1_OUT, PTJ1_IN_PU, PTJ1_IN,
--		PTJ0_FN, PTJ0_OUT, PTJ0_IN_PU, PTJ0_IN }
-+		PTJ6_FN, PTJ6_OUT, 0, PTJ6_IN,
-+		PTJ5_FN, PTJ5_OUT, 0, PTJ5_IN,
-+		PTJ4_FN, PTJ4_OUT, 0, PTJ4_IN,
-+		PTJ3_FN, PTJ3_OUT, 0, PTJ3_IN,
-+		PTJ2_FN, PTJ2_OUT, 0, PTJ2_IN,
-+		PTJ1_FN, PTJ1_OUT, 0, PTJ1_IN,
-+		PTJ0_FN, PTJ0_OUT, 0, PTJ0_IN }
- 	},
- 	{ PINMUX_CFG_REG("PKCR", 0xa4050112, 16, 2) {
- 		0, 0, 0, 0,
- 		0, 0, 0, 0,
- 		0, 0, 0, 0,
- 		0, 0, 0, 0,
--		PTK3_FN, PTK3_OUT, PTK3_IN_PU, PTK3_IN,
--		PTK2_FN, PTK2_OUT, PTK2_IN_PU, PTK2_IN,
--		PTK1_FN, PTK1_OUT, PTK1_IN_PU, PTK1_IN,
--		PTK0_FN, PTK0_OUT, PTK0_IN_PU, PTK0_IN }
-+		PTK3_FN, PTK3_OUT, 0, PTK3_IN,
-+		PTK2_FN, PTK2_OUT, 0, PTK2_IN,
-+		PTK1_FN, PTK1_OUT, 0, PTK1_IN,
-+		PTK0_FN, PTK0_OUT, 0, PTK0_IN }
- 	},
- 	{ PINMUX_CFG_REG("PLCR", 0xa4050114, 16, 2) {
--		PTL7_FN, PTL7_OUT, PTL7_IN_PU, PTL7_IN,
--		PTL6_FN, PTL6_OUT, PTL6_IN_PU, PTL6_IN,
--		PTL5_FN, PTL5_OUT, PTL5_IN_PU, PTL5_IN,
--		PTL4_FN, PTL4_OUT, PTL4_IN_PU, PTL4_IN,
--		PTL3_FN, PTL3_OUT, PTL3_IN_PU, PTL3_IN,
-+		PTL7_FN, PTL7_OUT, 0, PTL7_IN,
-+		PTL6_FN, PTL6_OUT, 0, PTL6_IN,
-+		PTL5_FN, PTL5_OUT, 0, PTL5_IN,
-+		PTL4_FN, PTL4_OUT, 0, PTL4_IN,
-+		PTL3_FN, PTL3_OUT, 0, PTL3_IN,
- 		0, 0, 0, 0,
- 		0, 0, 0, 0,
- 		0, 0, 0, 0 }
- 	},
- 	{ PINMUX_CFG_REG("PMCR", 0xa4050116, 16, 2) {
--		PTM7_FN, PTM7_OUT, PTM7_IN_PU, PTM7_IN,
--		PTM6_FN, PTM6_OUT, PTM6_IN_PU, PTM6_IN,
--		PTM5_FN, PTM5_OUT, PTM5_IN_PU, PTM5_IN,
--		PTM4_FN, PTM4_OUT, PTM4_IN_PU, PTM4_IN,
--		PTM3_FN, PTM3_OUT, PTM3_IN_PU, PTM3_IN,
--		PTM2_FN, PTM2_OUT, PTM2_IN_PU, PTM2_IN,
--		PTM1_FN, PTM1_OUT, PTM1_IN_PU, PTM1_IN,
--		PTM0_FN, PTM0_OUT, PTM0_IN_PU, PTM0_IN }
-+		PTM7_FN, PTM7_OUT, 0, PTM7_IN,
-+		PTM6_FN, PTM6_OUT, 0, PTM6_IN,
-+		PTM5_FN, PTM5_OUT, 0, PTM5_IN,
-+		PTM4_FN, PTM4_OUT, 0, PTM4_IN,
-+		PTM3_FN, PTM3_OUT, 0, PTM3_IN,
-+		PTM2_FN, PTM2_OUT, 0, PTM2_IN,
-+		PTM1_FN, PTM1_OUT, 0, PTM1_IN,
-+		PTM0_FN, PTM0_OUT, 0, PTM0_IN }
- 	},
- 	{ PINMUX_CFG_REG("PPCR", 0xa4050118, 16, 2) {
- 		0, 0, 0, 0,
- 		0, 0, 0, 0,
- 		0, 0, 0, 0,
--		PTP4_FN, PTP4_OUT, PTP4_IN_PU, PTP4_IN,
--		PTP3_FN, PTP3_OUT, PTP3_IN_PU, PTP3_IN,
--		PTP2_FN, PTP2_OUT, PTP2_IN_PU, PTP2_IN,
--		PTP1_FN, PTP1_OUT, PTP1_IN_PU, PTP1_IN,
--		PTP0_FN, PTP0_OUT, PTP0_IN_PU, PTP0_IN }
-+		PTP4_FN, PTP4_OUT, 0, PTP4_IN,
-+		PTP3_FN, PTP3_OUT, 0, PTP3_IN,
-+		PTP2_FN, PTP2_OUT, 0, PTP2_IN,
-+		PTP1_FN, PTP1_OUT, 0, PTP1_IN,
-+		PTP0_FN, PTP0_OUT, 0, PTP0_IN }
- 	},
- 	{ PINMUX_CFG_REG("PRCR", 0xa405011a, 16, 2) {
--		PTR7_FN, PTR7_OUT, PTR7_IN_PU, PTR7_IN,
--		PTR6_FN, PTR6_OUT, PTR6_IN_PU, PTR6_IN,
--		PTR5_FN, PTR5_OUT, PTR5_IN_PU, PTR5_IN,
--		PTR4_FN, PTR4_OUT, PTR4_IN_PU, PTR4_IN,
--		PTR3_FN, PTR3_OUT, PTR3_IN_PU, PTR3_IN,
--		PTR2_FN, PTR2_OUT, PTR2_IN_PU, PTR2_IN,
--		PTR1_FN, PTR1_OUT, PTR1_IN_PU, PTR1_IN,
--		PTR0_FN, PTR0_OUT, PTR0_IN_PU, PTR0_IN }
-+		PTR7_FN, PTR7_OUT, 0, PTR7_IN,
-+		PTR6_FN, PTR6_OUT, 0, PTR6_IN,
-+		PTR5_FN, PTR5_OUT, 0, PTR5_IN,
-+		PTR4_FN, PTR4_OUT, 0, PTR4_IN,
-+		PTR3_FN, PTR3_OUT, 0, PTR3_IN,
-+		PTR2_FN, PTR2_OUT, 0, PTR2_IN,
-+		PTR1_FN, PTR1_OUT, 0, PTR1_IN,
-+		PTR0_FN, PTR0_OUT, 0, PTR0_IN }
- 	},
- 	{ PINMUX_CFG_REG("PSCR", 0xa405011c, 16, 2) {
- 		0, 0, 0, 0,
- 		0, 0, 0, 0,
- 		0, 0, 0, 0,
--		PTS4_FN, PTS4_OUT, PTS4_IN_PU, PTS4_IN,
--		PTS3_FN, PTS3_OUT, PTS3_IN_PU, PTS3_IN,
--		PTS2_FN, PTS2_OUT, PTS2_IN_PU, PTS2_IN,
--		PTS1_FN, PTS1_OUT, PTS1_IN_PU, PTS1_IN,
--		PTS0_FN, PTS0_OUT, PTS0_IN_PU, PTS0_IN }
-+		PTS4_FN, PTS4_OUT, 0, PTS4_IN,
-+		PTS3_FN, PTS3_OUT, 0, PTS3_IN,
-+		PTS2_FN, PTS2_OUT, 0, PTS2_IN,
-+		PTS1_FN, PTS1_OUT, 0, PTS1_IN,
-+		PTS0_FN, PTS0_OUT, 0, PTS0_IN }
- 	},
- 	{ PINMUX_CFG_REG("PTCR", 0xa405011e, 16, 2) {
- 		0, 0, 0, 0,
- 		0, 0, 0, 0,
- 		0, 0, 0, 0,
--		PTT4_FN, PTT4_OUT, PTT4_IN_PU, PTT4_IN,
--		PTT3_FN, PTT3_OUT, PTT3_IN_PU, PTT3_IN,
--		PTT2_FN, PTT2_OUT, PTT2_IN_PU, PTT2_IN,
--		PTT1_FN, PTT1_OUT, PTT1_IN_PU, PTT1_IN,
--		PTT0_FN, PTT0_OUT, PTT0_IN_PU, PTT0_IN }
-+		PTT4_FN, PTT4_OUT, 0, PTT4_IN,
-+		PTT3_FN, PTT3_OUT, 0, PTT3_IN,
-+		PTT2_FN, PTT2_OUT, 0, PTT2_IN,
-+		PTT1_FN, PTT1_OUT, 0, PTT1_IN,
-+		PTT0_FN, PTT0_OUT, 0, PTT0_IN }
- 	},
- 	{ PINMUX_CFG_REG("PUCR", 0xa4050120, 16, 2) {
- 		0, 0, 0, 0,
- 		0, 0, 0, 0,
- 		0, 0, 0, 0,
--		PTU4_FN, PTU4_OUT, PTU4_IN_PU, PTU4_IN,
--		PTU3_FN, PTU3_OUT, PTU3_IN_PU, PTU3_IN,
--		PTU2_FN, PTU2_OUT, PTU2_IN_PU, PTU2_IN,
--		PTU1_FN, PTU1_OUT, PTU1_IN_PU, PTU1_IN,
--		PTU0_FN, PTU0_OUT, PTU0_IN_PU, PTU0_IN }
-+		PTU4_FN, PTU4_OUT, 0, PTU4_IN,
-+		PTU3_FN, PTU3_OUT, 0, PTU3_IN,
-+		PTU2_FN, PTU2_OUT, 0, PTU2_IN,
-+		PTU1_FN, PTU1_OUT, 0, PTU1_IN,
-+		PTU0_FN, PTU0_OUT, 0, PTU0_IN }
- 	},
- 	{ PINMUX_CFG_REG("PVCR", 0xa4050122, 16, 2) {
- 		0, 0, 0, 0,
- 		0, 0, 0, 0,
- 		0, 0, 0, 0,
--		PTV4_FN, PTV4_OUT, PTV4_IN_PU, PTV4_IN,
--		PTV3_FN, PTV3_OUT, PTV3_IN_PU, PTV3_IN,
--		PTV2_FN, PTV2_OUT, PTV2_IN_PU, PTV2_IN,
--		PTV1_FN, PTV1_OUT, PTV1_IN_PU, PTV1_IN,
--		PTV0_FN, PTV0_OUT, PTV0_IN_PU, PTV0_IN }
-+		PTV4_FN, PTV4_OUT, 0, PTV4_IN,
-+		PTV3_FN, PTV3_OUT, 0, PTV3_IN,
-+		PTV2_FN, PTV2_OUT, 0, PTV2_IN,
-+		PTV1_FN, PTV1_OUT, 0, PTV1_IN,
-+		PTV0_FN, PTV0_OUT, 0, PTV0_IN }
- 	},
- 	{}
- };
-@@ -1220,7 +1190,6 @@ static const struct pinmux_data_reg pinmux_data_regs[] = {
- const struct sh_pfc_soc_info sh7720_pinmux_info = {
- 	.name = "sh7720_pfc",
- 	.input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
--	.input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END },
- 	.output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
- 	.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0529-sh-pfc-sh7722-Remove-unused-input_pd-and-input_pu-ra.patch b/patches.renesas/0529-sh-pfc-sh7722-Remove-unused-input_pd-and-input_pu-ra.patch
deleted file mode 100644
index 646dc44c06cb9..0000000000000
--- a/patches.renesas/0529-sh-pfc-sh7722-Remove-unused-input_pd-and-input_pu-ra.patch
+++ /dev/null
@@ -1,682 +0,0 @@
-From 7b4c073619d7e34a62e5715aa878307adae09c1d Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Sun, 14 Jul 2013 19:56:02 +0200
-Subject: sh-pfc: sh7722: Remove unused input_pd and input_pu ranges
-
-The PFC SH7722 SoC data contains input_pd and input_pu ranges used to
-configure pull-down and pull-up resistors using the legacy non-pinconf
-API. That API has been removed from the driver, the ranges are thus not
-used anymore. Remove them.
-
-If required, configuring pull-down and pull-up resistors for the SH7722
-can be implemented using the pinconf API, as done for the SH-Mobile,
-R-Mobile and R-Car platforms.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit 48b888b17fb1387b264b24083206db73fbad8fdd)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-sh7722.c | 447 +++++++++++++++++-------------------
- 1 file changed, 206 insertions(+), 241 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7722.c b/drivers/pinctrl/sh-pfc/pfc-sh7722.c
-index 32034387..0982c4ff 100644
---- a/drivers/pinctrl/sh-pfc/pfc-sh7722.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-sh7722.c
-@@ -77,39 +77,6 @@ enum {
- 	PTZ5_IN, PTZ4_IN, PTZ3_IN, PTZ2_IN, PTZ1_IN,
- 	PINMUX_INPUT_END,
- 
--	PINMUX_INPUT_PULLDOWN_BEGIN,
--	PTA7_IN_PD, PTA6_IN_PD, PTA5_IN_PD, PTA4_IN_PD,
--	PTA3_IN_PD, PTA2_IN_PD, PTA1_IN_PD, PTA0_IN_PD,
--	PTE7_IN_PD, PTE6_IN_PD, PTE5_IN_PD, PTE4_IN_PD,	PTE1_IN_PD, PTE0_IN_PD,
--	PTF6_IN_PD, PTF5_IN_PD, PTF4_IN_PD, PTF3_IN_PD, PTF2_IN_PD, PTF1_IN_PD,
--	PTH6_IN_PD, PTH5_IN_PD, PTH1_IN_PD, PTH0_IN_PD,
--	PTK6_IN_PD, PTK5_IN_PD, PTK4_IN_PD, PTK3_IN_PD, PTK2_IN_PD, PTK0_IN_PD,
--	PTL7_IN_PD, PTL6_IN_PD, PTL5_IN_PD, PTL4_IN_PD,
--	PTL3_IN_PD, PTL2_IN_PD, PTL1_IN_PD, PTL0_IN_PD,
--	PTM7_IN_PD, PTM6_IN_PD, PTM5_IN_PD, PTM4_IN_PD,
--	PTM3_IN_PD, PTM2_IN_PD, PTM1_IN_PD, PTM0_IN_PD,
--	PTQ5_IN_PD, PTQ4_IN_PD, PTQ3_IN_PD, PTQ2_IN_PD,
--	PTS4_IN_PD, PTS2_IN_PD, PTS1_IN_PD,
--	PTT4_IN_PD, PTT3_IN_PD, PTT2_IN_PD, PTT1_IN_PD,
--	PTU4_IN_PD, PTU3_IN_PD, PTU2_IN_PD, PTU1_IN_PD, PTU0_IN_PD,
--	PTV4_IN_PD, PTV3_IN_PD, PTV2_IN_PD, PTV1_IN_PD, PTV0_IN_PD,
--	PTW6_IN_PD, PTW4_IN_PD,	PTW3_IN_PD, PTW2_IN_PD, PTW1_IN_PD, PTW0_IN_PD,
--	PTX6_IN_PD, PTX5_IN_PD, PTX4_IN_PD,
--	PTX3_IN_PD, PTX2_IN_PD, PTX1_IN_PD, PTX0_IN_PD,
--	PINMUX_INPUT_PULLDOWN_END,
--
--	PINMUX_INPUT_PULLUP_BEGIN,
--	PTC7_IN_PU, PTC5_IN_PU,
--	PTD7_IN_PU, PTD6_IN_PU, PTD5_IN_PU, PTD4_IN_PU,
--	PTD3_IN_PU, PTD2_IN_PU, PTD1_IN_PU,
--	PTJ1_IN_PU, PTJ0_IN_PU,
--	PTQ0_IN_PU,
--	PTR2_IN_PU,
--	PTX6_IN_PU,
--	PTY5_IN_PU, PTY4_IN_PU, PTY3_IN_PU, PTY2_IN_PU, PTY0_IN_PU,
--	PTZ5_IN_PU, PTZ4_IN_PU, PTZ3_IN_PU, PTZ2_IN_PU, PTZ1_IN_PU,
--	PINMUX_INPUT_PULLUP_END,
--
- 	PINMUX_OUTPUT_BEGIN,
- 	PTA7_OUT, PTA5_OUT,
- 	PTB7_OUT, PTB6_OUT, PTB5_OUT, PTB4_OUT,
-@@ -298,14 +265,14 @@ enum {
- 
- static const pinmux_enum_t pinmux_data[] = {
- 	/* PTA */
--	PINMUX_DATA(PTA7_DATA, PTA7_IN, PTA7_IN_PD, PTA7_OUT),
--	PINMUX_DATA(PTA6_DATA, PTA6_IN, PTA6_IN_PD),
--	PINMUX_DATA(PTA5_DATA, PTA5_IN, PTA5_IN_PD, PTA5_OUT),
--	PINMUX_DATA(PTA4_DATA, PTA4_IN, PTA4_IN_PD),
--	PINMUX_DATA(PTA3_DATA, PTA3_IN, PTA3_IN_PD),
--	PINMUX_DATA(PTA2_DATA, PTA2_IN, PTA2_IN_PD),
--	PINMUX_DATA(PTA1_DATA, PTA1_IN, PTA1_IN_PD),
--	PINMUX_DATA(PTA0_DATA, PTA0_IN, PTA0_IN_PD),
-+	PINMUX_DATA(PTA7_DATA, PTA7_IN, PTA7_OUT),
-+	PINMUX_DATA(PTA6_DATA, PTA6_IN),
-+	PINMUX_DATA(PTA5_DATA, PTA5_IN, PTA5_OUT),
-+	PINMUX_DATA(PTA4_DATA, PTA4_IN),
-+	PINMUX_DATA(PTA3_DATA, PTA3_IN),
-+	PINMUX_DATA(PTA2_DATA, PTA2_IN),
-+	PINMUX_DATA(PTA1_DATA, PTA1_IN),
-+	PINMUX_DATA(PTA0_DATA, PTA0_IN),
- 
- 	/* PTB */
- 	PINMUX_DATA(PTB7_DATA, PTB7_IN, PTB7_OUT),
-@@ -318,38 +285,38 @@ static const pinmux_enum_t pinmux_data[] = {
- 	PINMUX_DATA(PTB0_DATA, PTB0_IN, PTB0_OUT),
- 
- 	/* PTC */
--	PINMUX_DATA(PTC7_DATA, PTC7_IN, PTC7_IN_PU),
--	PINMUX_DATA(PTC5_DATA, PTC5_IN, PTC5_IN_PU),
-+	PINMUX_DATA(PTC7_DATA, PTC7_IN),
-+	PINMUX_DATA(PTC5_DATA, PTC5_IN),
- 	PINMUX_DATA(PTC4_DATA, PTC4_IN, PTC4_OUT),
- 	PINMUX_DATA(PTC3_DATA, PTC3_IN, PTC3_OUT),
- 	PINMUX_DATA(PTC2_DATA, PTC2_IN, PTC2_OUT),
- 	PINMUX_DATA(PTC0_DATA, PTC0_IN, PTC0_OUT),
- 
- 	/* PTD */
--	PINMUX_DATA(PTD7_DATA, PTD7_IN, PTD7_IN_PU),
--	PINMUX_DATA(PTD6_DATA, PTD6_OUT, PTD6_IN, PTD6_IN_PU),
--	PINMUX_DATA(PTD5_DATA, PTD5_OUT, PTD5_IN, PTD5_IN_PU),
--	PINMUX_DATA(PTD4_DATA, PTD4_OUT, PTD4_IN, PTD4_IN_PU),
--	PINMUX_DATA(PTD3_DATA, PTD3_OUT, PTD3_IN, PTD3_IN_PU),
--	PINMUX_DATA(PTD2_DATA, PTD2_OUT, PTD2_IN, PTD2_IN_PU),
--	PINMUX_DATA(PTD1_DATA, PTD1_OUT, PTD1_IN, PTD1_IN_PU),
-+	PINMUX_DATA(PTD7_DATA, PTD7_IN),
-+	PINMUX_DATA(PTD6_DATA, PTD6_OUT, PTD6_IN),
-+	PINMUX_DATA(PTD5_DATA, PTD5_OUT, PTD5_IN),
-+	PINMUX_DATA(PTD4_DATA, PTD4_OUT, PTD4_IN),
-+	PINMUX_DATA(PTD3_DATA, PTD3_OUT, PTD3_IN),
-+	PINMUX_DATA(PTD2_DATA, PTD2_OUT, PTD2_IN),
-+	PINMUX_DATA(PTD1_DATA, PTD1_OUT, PTD1_IN),
- 	PINMUX_DATA(PTD0_DATA, PTD0_OUT),
- 
- 	/* PTE */
--	PINMUX_DATA(PTE7_DATA, PTE7_OUT, PTE7_IN, PTE7_IN_PD),
--	PINMUX_DATA(PTE6_DATA, PTE6_OUT, PTE6_IN, PTE6_IN_PD),
--	PINMUX_DATA(PTE5_DATA, PTE5_OUT, PTE5_IN, PTE5_IN_PD),
--	PINMUX_DATA(PTE4_DATA, PTE4_OUT, PTE4_IN, PTE4_IN_PD),
--	PINMUX_DATA(PTE1_DATA, PTE1_OUT, PTE1_IN, PTE1_IN_PD),
--	PINMUX_DATA(PTE0_DATA, PTE0_OUT, PTE0_IN, PTE0_IN_PD),
-+	PINMUX_DATA(PTE7_DATA, PTE7_OUT, PTE7_IN),
-+	PINMUX_DATA(PTE6_DATA, PTE6_OUT, PTE6_IN),
-+	PINMUX_DATA(PTE5_DATA, PTE5_OUT, PTE5_IN),
-+	PINMUX_DATA(PTE4_DATA, PTE4_OUT, PTE4_IN),
-+	PINMUX_DATA(PTE1_DATA, PTE1_OUT, PTE1_IN),
-+	PINMUX_DATA(PTE0_DATA, PTE0_OUT, PTE0_IN),
- 
- 	/* PTF */
--	PINMUX_DATA(PTF6_DATA, PTF6_OUT, PTF6_IN, PTF6_IN_PD),
--	PINMUX_DATA(PTF5_DATA, PTF5_OUT, PTF5_IN, PTF5_IN_PD),
--	PINMUX_DATA(PTF4_DATA, PTF4_OUT, PTF4_IN, PTF4_IN_PD),
--	PINMUX_DATA(PTF3_DATA, PTF3_OUT, PTF3_IN, PTF3_IN_PD),
--	PINMUX_DATA(PTF2_DATA, PTF2_OUT, PTF2_IN, PTF2_IN_PD),
--	PINMUX_DATA(PTF1_DATA, PTF1_IN, PTF1_IN_PD),
-+	PINMUX_DATA(PTF6_DATA, PTF6_OUT, PTF6_IN),
-+	PINMUX_DATA(PTF5_DATA, PTF5_OUT, PTF5_IN),
-+	PINMUX_DATA(PTF4_DATA, PTF4_OUT, PTF4_IN),
-+	PINMUX_DATA(PTF3_DATA, PTF3_OUT, PTF3_IN),
-+	PINMUX_DATA(PTF2_DATA, PTF2_OUT, PTF2_IN),
-+	PINMUX_DATA(PTF1_DATA, PTF1_IN),
- 	PINMUX_DATA(PTF0_DATA, PTF0_OUT),
- 
- 	/* PTG */
-@@ -361,49 +328,49 @@ static const pinmux_enum_t pinmux_data[] = {
- 
- 	/* PTH */
- 	PINMUX_DATA(PTH7_DATA, PTH7_OUT),
--	PINMUX_DATA(PTH6_DATA, PTH6_OUT, PTH6_IN, PTH6_IN_PD),
--	PINMUX_DATA(PTH5_DATA, PTH5_OUT, PTH5_IN, PTH5_IN_PD),
-+	PINMUX_DATA(PTH6_DATA, PTH6_OUT, PTH6_IN),
-+	PINMUX_DATA(PTH5_DATA, PTH5_OUT, PTH5_IN),
- 	PINMUX_DATA(PTH4_DATA, PTH4_OUT),
- 	PINMUX_DATA(PTH3_DATA, PTH3_OUT),
- 	PINMUX_DATA(PTH2_DATA, PTH2_OUT),
--	PINMUX_DATA(PTH1_DATA, PTH1_OUT, PTH1_IN, PTH1_IN_PD),
--	PINMUX_DATA(PTH0_DATA, PTH0_OUT, PTH0_IN, PTH0_IN_PD),
-+	PINMUX_DATA(PTH1_DATA, PTH1_OUT, PTH1_IN),
-+	PINMUX_DATA(PTH0_DATA, PTH0_OUT, PTH0_IN),
- 
- 	/* PTJ */
- 	PINMUX_DATA(PTJ7_DATA, PTJ7_OUT),
- 	PINMUX_DATA(PTJ6_DATA, PTJ6_OUT),
- 	PINMUX_DATA(PTJ5_DATA, PTJ5_OUT),
--	PINMUX_DATA(PTJ1_DATA, PTJ1_OUT, PTJ1_IN, PTJ1_IN_PU),
--	PINMUX_DATA(PTJ0_DATA, PTJ0_OUT, PTJ0_IN, PTJ0_IN_PU),
-+	PINMUX_DATA(PTJ1_DATA, PTJ1_OUT, PTJ1_IN),
-+	PINMUX_DATA(PTJ0_DATA, PTJ0_OUT, PTJ0_IN),
- 
- 	/* PTK */
--	PINMUX_DATA(PTK6_DATA, PTK6_OUT, PTK6_IN, PTK6_IN_PD),
--	PINMUX_DATA(PTK5_DATA, PTK5_OUT, PTK5_IN, PTK5_IN_PD),
--	PINMUX_DATA(PTK4_DATA, PTK4_OUT, PTK4_IN, PTK4_IN_PD),
--	PINMUX_DATA(PTK3_DATA, PTK3_OUT, PTK3_IN, PTK3_IN_PD),
--	PINMUX_DATA(PTK2_DATA, PTK2_IN, PTK2_IN_PD),
-+	PINMUX_DATA(PTK6_DATA, PTK6_OUT, PTK6_IN),
-+	PINMUX_DATA(PTK5_DATA, PTK5_OUT, PTK5_IN),
-+	PINMUX_DATA(PTK4_DATA, PTK4_OUT, PTK4_IN),
-+	PINMUX_DATA(PTK3_DATA, PTK3_OUT, PTK3_IN),
-+	PINMUX_DATA(PTK2_DATA, PTK2_IN),
- 	PINMUX_DATA(PTK1_DATA, PTK1_OUT),
--	PINMUX_DATA(PTK0_DATA, PTK0_OUT, PTK0_IN, PTK0_IN_PD),
-+	PINMUX_DATA(PTK0_DATA, PTK0_OUT, PTK0_IN),
- 
- 	/* PTL */
--	PINMUX_DATA(PTL7_DATA, PTL7_OUT, PTL7_IN, PTL7_IN_PD),
--	PINMUX_DATA(PTL6_DATA, PTL6_OUT, PTL6_IN, PTL6_IN_PD),
--	PINMUX_DATA(PTL5_DATA, PTL5_OUT, PTL5_IN, PTL5_IN_PD),
--	PINMUX_DATA(PTL4_DATA, PTL4_OUT, PTL4_IN, PTL4_IN_PD),
--	PINMUX_DATA(PTL3_DATA, PTL3_OUT, PTL3_IN, PTL3_IN_PD),
--	PINMUX_DATA(PTL2_DATA, PTL2_OUT, PTL2_IN, PTL2_IN_PD),
--	PINMUX_DATA(PTL1_DATA, PTL1_OUT, PTL1_IN, PTL1_IN_PD),
--	PINMUX_DATA(PTL0_DATA, PTL0_OUT, PTL0_IN, PTL0_IN_PD),
-+	PINMUX_DATA(PTL7_DATA, PTL7_OUT, PTL7_IN),
-+	PINMUX_DATA(PTL6_DATA, PTL6_OUT, PTL6_IN),
-+	PINMUX_DATA(PTL5_DATA, PTL5_OUT, PTL5_IN),
-+	PINMUX_DATA(PTL4_DATA, PTL4_OUT, PTL4_IN),
-+	PINMUX_DATA(PTL3_DATA, PTL3_OUT, PTL3_IN),
-+	PINMUX_DATA(PTL2_DATA, PTL2_OUT, PTL2_IN),
-+	PINMUX_DATA(PTL1_DATA, PTL1_OUT, PTL1_IN),
-+	PINMUX_DATA(PTL0_DATA, PTL0_OUT, PTL0_IN),
- 
- 	/* PTM */
--	PINMUX_DATA(PTM7_DATA, PTM7_OUT, PTM7_IN, PTM7_IN_PD),
--	PINMUX_DATA(PTM6_DATA, PTM6_OUT, PTM6_IN, PTM6_IN_PD),
--	PINMUX_DATA(PTM5_DATA, PTM5_OUT, PTM5_IN, PTM5_IN_PD),
--	PINMUX_DATA(PTM4_DATA, PTM4_OUT, PTM4_IN, PTM4_IN_PD),
--	PINMUX_DATA(PTM3_DATA, PTM3_OUT, PTM3_IN, PTM3_IN_PD),
--	PINMUX_DATA(PTM2_DATA, PTM2_OUT, PTM2_IN, PTM2_IN_PD),
--	PINMUX_DATA(PTM1_DATA, PTM1_OUT, PTM1_IN, PTM1_IN_PD),
--	PINMUX_DATA(PTM0_DATA, PTM0_OUT, PTM0_IN, PTM0_IN_PD),
-+	PINMUX_DATA(PTM7_DATA, PTM7_OUT, PTM7_IN),
-+	PINMUX_DATA(PTM6_DATA, PTM6_OUT, PTM6_IN),
-+	PINMUX_DATA(PTM5_DATA, PTM5_OUT, PTM5_IN),
-+	PINMUX_DATA(PTM4_DATA, PTM4_OUT, PTM4_IN),
-+	PINMUX_DATA(PTM3_DATA, PTM3_OUT, PTM3_IN),
-+	PINMUX_DATA(PTM2_DATA, PTM2_OUT, PTM2_IN),
-+	PINMUX_DATA(PTM1_DATA, PTM1_OUT, PTM1_IN),
-+	PINMUX_DATA(PTM0_DATA, PTM0_OUT, PTM0_IN),
- 
- 	/* PTN */
- 	PINMUX_DATA(PTN7_DATA, PTN7_OUT, PTN7_IN),
-@@ -417,80 +384,80 @@ static const pinmux_enum_t pinmux_data[] = {
- 
- 	/* PTQ */
- 	PINMUX_DATA(PTQ6_DATA, PTQ6_OUT),
--	PINMUX_DATA(PTQ5_DATA, PTQ5_OUT, PTQ5_IN, PTQ5_IN_PD),
--	PINMUX_DATA(PTQ4_DATA, PTQ4_OUT, PTQ4_IN, PTQ4_IN_PD),
--	PINMUX_DATA(PTQ3_DATA, PTQ3_OUT, PTQ3_IN, PTQ3_IN_PD),
--	PINMUX_DATA(PTQ2_DATA, PTQ2_IN, PTQ2_IN_PD),
-+	PINMUX_DATA(PTQ5_DATA, PTQ5_OUT, PTQ5_IN),
-+	PINMUX_DATA(PTQ4_DATA, PTQ4_OUT, PTQ4_IN),
-+	PINMUX_DATA(PTQ3_DATA, PTQ3_OUT, PTQ3_IN),
-+	PINMUX_DATA(PTQ2_DATA, PTQ2_IN),
- 	PINMUX_DATA(PTQ1_DATA, PTQ1_OUT),
--	PINMUX_DATA(PTQ0_DATA, PTQ0_OUT, PTQ0_IN, PTQ0_IN_PU),
-+	PINMUX_DATA(PTQ0_DATA, PTQ0_OUT, PTQ0_IN),
- 
- 	/* PTR */
- 	PINMUX_DATA(PTR4_DATA, PTR4_OUT),
- 	PINMUX_DATA(PTR3_DATA, PTR3_OUT),
--	PINMUX_DATA(PTR2_DATA, PTR2_IN, PTR2_IN_PU),
-+	PINMUX_DATA(PTR2_DATA, PTR2_IN),
- 	PINMUX_DATA(PTR1_DATA, PTR1_OUT),
- 	PINMUX_DATA(PTR0_DATA, PTR0_OUT),
- 
- 	/* PTS */
--	PINMUX_DATA(PTS4_DATA, PTS4_IN, PTS4_IN_PD),
-+	PINMUX_DATA(PTS4_DATA, PTS4_IN),
- 	PINMUX_DATA(PTS3_DATA, PTS3_OUT),
--	PINMUX_DATA(PTS2_DATA, PTS2_OUT, PTS2_IN, PTS2_IN_PD),
--	PINMUX_DATA(PTS1_DATA, PTS1_IN, PTS1_IN_PD),
-+	PINMUX_DATA(PTS2_DATA, PTS2_OUT, PTS2_IN),
-+	PINMUX_DATA(PTS1_DATA, PTS1_IN),
- 	PINMUX_DATA(PTS0_DATA, PTS0_OUT),
- 
- 	/* PTT */
--	PINMUX_DATA(PTT4_DATA, PTT4_OUT, PTT4_IN, PTT4_IN_PD),
--	PINMUX_DATA(PTT3_DATA, PTT3_OUT, PTT3_IN, PTT3_IN_PD),
--	PINMUX_DATA(PTT2_DATA, PTT2_OUT, PTT2_IN, PTT2_IN_PD),
--	PINMUX_DATA(PTT1_DATA, PTT1_IN, PTT1_IN_PD),
-+	PINMUX_DATA(PTT4_DATA, PTT4_OUT, PTT4_IN),
-+	PINMUX_DATA(PTT3_DATA, PTT3_OUT, PTT3_IN),
-+	PINMUX_DATA(PTT2_DATA, PTT2_OUT, PTT2_IN),
-+	PINMUX_DATA(PTT1_DATA, PTT1_IN),
- 	PINMUX_DATA(PTT0_DATA, PTT0_OUT),
- 
- 	/* PTU */
--	PINMUX_DATA(PTU4_DATA, PTU4_OUT, PTU4_IN, PTU4_IN_PD),
--	PINMUX_DATA(PTU3_DATA, PTU3_OUT, PTU3_IN, PTU3_IN_PD),
--	PINMUX_DATA(PTU2_DATA, PTU2_OUT, PTU2_IN, PTU2_IN_PD),
--	PINMUX_DATA(PTU1_DATA, PTU1_IN, PTU1_IN_PD),
--	PINMUX_DATA(PTU0_DATA, PTU0_OUT, PTU0_IN, PTU0_IN_PD),
-+	PINMUX_DATA(PTU4_DATA, PTU4_OUT, PTU4_IN),
-+	PINMUX_DATA(PTU3_DATA, PTU3_OUT, PTU3_IN),
-+	PINMUX_DATA(PTU2_DATA, PTU2_OUT, PTU2_IN),
-+	PINMUX_DATA(PTU1_DATA, PTU1_IN),
-+	PINMUX_DATA(PTU0_DATA, PTU0_OUT, PTU0_IN),
- 
- 	/* PTV */
--	PINMUX_DATA(PTV4_DATA, PTV4_OUT, PTV4_IN, PTV4_IN_PD),
--	PINMUX_DATA(PTV3_DATA, PTV3_OUT, PTV3_IN, PTV3_IN_PD),
--	PINMUX_DATA(PTV2_DATA, PTV2_OUT, PTV2_IN, PTV2_IN_PD),
--	PINMUX_DATA(PTV1_DATA, PTV1_OUT, PTV1_IN, PTV1_IN_PD),
--	PINMUX_DATA(PTV0_DATA, PTV0_OUT, PTV0_IN, PTV0_IN_PD),
-+	PINMUX_DATA(PTV4_DATA, PTV4_OUT, PTV4_IN),
-+	PINMUX_DATA(PTV3_DATA, PTV3_OUT, PTV3_IN),
-+	PINMUX_DATA(PTV2_DATA, PTV2_OUT, PTV2_IN),
-+	PINMUX_DATA(PTV1_DATA, PTV1_OUT, PTV1_IN),
-+	PINMUX_DATA(PTV0_DATA, PTV0_OUT, PTV0_IN),
- 
- 	/* PTW */
--	PINMUX_DATA(PTW6_DATA, PTW6_IN, PTW6_IN_PD),
-+	PINMUX_DATA(PTW6_DATA, PTW6_IN),
- 	PINMUX_DATA(PTW5_DATA, PTW5_OUT),
--	PINMUX_DATA(PTW4_DATA, PTW4_OUT, PTW4_IN, PTW4_IN_PD),
--	PINMUX_DATA(PTW3_DATA, PTW3_OUT, PTW3_IN, PTW3_IN_PD),
--	PINMUX_DATA(PTW2_DATA, PTW2_OUT, PTW2_IN, PTW2_IN_PD),
--	PINMUX_DATA(PTW1_DATA, PTW1_OUT, PTW1_IN, PTW1_IN_PD),
--	PINMUX_DATA(PTW0_DATA, PTW0_OUT, PTW0_IN, PTW0_IN_PD),
-+	PINMUX_DATA(PTW4_DATA, PTW4_OUT, PTW4_IN),
-+	PINMUX_DATA(PTW3_DATA, PTW3_OUT, PTW3_IN),
-+	PINMUX_DATA(PTW2_DATA, PTW2_OUT, PTW2_IN),
-+	PINMUX_DATA(PTW1_DATA, PTW1_OUT, PTW1_IN),
-+	PINMUX_DATA(PTW0_DATA, PTW0_OUT, PTW0_IN),
- 
- 	/* PTX */
--	PINMUX_DATA(PTX6_DATA, PTX6_OUT, PTX6_IN, PTX6_IN_PD),
--	PINMUX_DATA(PTX5_DATA, PTX5_OUT, PTX5_IN, PTX5_IN_PD),
--	PINMUX_DATA(PTX4_DATA, PTX4_OUT, PTX4_IN, PTX4_IN_PD),
--	PINMUX_DATA(PTX3_DATA, PTX3_OUT, PTX3_IN, PTX3_IN_PD),
--	PINMUX_DATA(PTX2_DATA, PTX2_OUT, PTX2_IN, PTX2_IN_PD),
--	PINMUX_DATA(PTX1_DATA, PTX1_OUT, PTX1_IN, PTX1_IN_PD),
--	PINMUX_DATA(PTX0_DATA, PTX0_OUT, PTX0_IN, PTX0_IN_PD),
-+	PINMUX_DATA(PTX6_DATA, PTX6_OUT, PTX6_IN),
-+	PINMUX_DATA(PTX5_DATA, PTX5_OUT, PTX5_IN),
-+	PINMUX_DATA(PTX4_DATA, PTX4_OUT, PTX4_IN),
-+	PINMUX_DATA(PTX3_DATA, PTX3_OUT, PTX3_IN),
-+	PINMUX_DATA(PTX2_DATA, PTX2_OUT, PTX2_IN),
-+	PINMUX_DATA(PTX1_DATA, PTX1_OUT, PTX1_IN),
-+	PINMUX_DATA(PTX0_DATA, PTX0_OUT, PTX0_IN),
- 
- 	/* PTY */
--	PINMUX_DATA(PTY5_DATA, PTY5_OUT, PTY5_IN, PTY5_IN_PU),
--	PINMUX_DATA(PTY4_DATA, PTY4_OUT, PTY4_IN, PTY4_IN_PU),
--	PINMUX_DATA(PTY3_DATA, PTY3_OUT, PTY3_IN, PTY3_IN_PU),
--	PINMUX_DATA(PTY2_DATA, PTY2_OUT, PTY2_IN, PTY2_IN_PU),
-+	PINMUX_DATA(PTY5_DATA, PTY5_OUT, PTY5_IN),
-+	PINMUX_DATA(PTY4_DATA, PTY4_OUT, PTY4_IN),
-+	PINMUX_DATA(PTY3_DATA, PTY3_OUT, PTY3_IN),
-+	PINMUX_DATA(PTY2_DATA, PTY2_OUT, PTY2_IN),
- 	PINMUX_DATA(PTY1_DATA, PTY1_OUT),
--	PINMUX_DATA(PTY0_DATA, PTY0_OUT, PTY0_IN, PTY0_IN_PU),
-+	PINMUX_DATA(PTY0_DATA, PTY0_OUT, PTY0_IN),
- 
- 	/* PTZ */
--	PINMUX_DATA(PTZ5_DATA, PTZ5_IN, PTZ5_IN_PU),
--	PINMUX_DATA(PTZ4_DATA, PTZ4_IN, PTZ4_IN_PU),
--	PINMUX_DATA(PTZ3_DATA, PTZ3_IN, PTZ3_IN_PU),
--	PINMUX_DATA(PTZ2_DATA, PTZ2_IN, PTZ2_IN_PU),
--	PINMUX_DATA(PTZ1_DATA, PTZ1_IN, PTZ1_IN_PU),
-+	PINMUX_DATA(PTZ5_DATA, PTZ5_IN),
-+	PINMUX_DATA(PTZ4_DATA, PTZ4_IN),
-+	PINMUX_DATA(PTZ3_DATA, PTZ3_IN),
-+	PINMUX_DATA(PTZ2_DATA, PTZ2_IN),
-+	PINMUX_DATA(PTZ1_DATA, PTZ1_IN),
- 
- 	/* SCIF0 */
- 	PINMUX_DATA(SCIF0_TXD_MARK, SCIF0_TXD),
-@@ -1270,14 +1237,14 @@ static const struct pinmux_func pinmux_func_gpios[] = {
- 
- static const struct pinmux_cfg_reg pinmux_config_regs[] = {
- 	{ PINMUX_CFG_REG("PACR", 0xa4050100, 16, 2) {
--		VIO_D7_SCIF1_SCK, PTA7_OUT, PTA7_IN_PD, PTA7_IN,
--		VIO_D6_SCIF1_RXD, 0, PTA6_IN_PD, PTA6_IN,
--		VIO_D5_SCIF1_TXD, PTA5_OUT, PTA5_IN_PD, PTA5_IN,
--		VIO_D4, 0, PTA4_IN_PD, PTA4_IN,
--		VIO_D3, 0, PTA3_IN_PD, PTA3_IN,
--		VIO_D2, 0, PTA2_IN_PD, PTA2_IN,
--		VIO_D1, 0, PTA1_IN_PD, PTA1_IN,
--		VIO_D0_LCDLCLK, 0, PTA0_IN_PD, PTA0_IN }
-+		VIO_D7_SCIF1_SCK, PTA7_OUT, 0, PTA7_IN,
-+		VIO_D6_SCIF1_RXD, 0, 0, PTA6_IN,
-+		VIO_D5_SCIF1_TXD, PTA5_OUT, 0, PTA5_IN,
-+		VIO_D4, 0, 0, PTA4_IN,
-+		VIO_D3, 0, 0, PTA3_IN,
-+		VIO_D2, 0, 0, PTA2_IN,
-+		VIO_D1, 0, 0, PTA1_IN,
-+		VIO_D0_LCDLCLK, 0, 0, PTA0_IN }
- 	},
- 	{ PINMUX_CFG_REG("PBCR", 0xa4050102, 16, 2) {
- 		HPD55, PTB7_OUT, 0, PTB7_IN,
-@@ -1290,9 +1257,9 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
- 		HPD48, PTB0_OUT, 0, PTB0_IN }
- 	},
- 	{ PINMUX_CFG_REG("PCCR", 0xa4050104, 16, 2) {
--		0, 0, PTC7_IN_PU, PTC7_IN,
-+		0, 0, 0, PTC7_IN,
- 		0, 0, 0, 0,
--		IOIS16, 0, PTC5_IN_PU, PTC5_IN,
-+		IOIS16, 0, 0, PTC5_IN,
- 		HPDQM7, PTC4_OUT, 0, PTC4_IN,
- 		HPDQM6, PTC3_OUT, 0, PTC3_IN,
- 		HPDQM5, PTC2_OUT, 0, PTC2_IN,
-@@ -1300,33 +1267,33 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
- 		HPDQM4, PTC0_OUT, 0, PTC0_IN }
- 	},
- 	{ PINMUX_CFG_REG("PDCR", 0xa4050106, 16, 2) {
--		SDHICD, 0, PTD7_IN_PU, PTD7_IN,
--		SDHIWP, PTD6_OUT, PTD6_IN_PU, PTD6_IN,
--		SDHID3, PTD5_OUT, PTD5_IN_PU, PTD5_IN,
--		IRQ2_SDHID2, PTD4_OUT, PTD4_IN_PU, PTD4_IN,
--		SDHID1, PTD3_OUT, PTD3_IN_PU, PTD3_IN,
--		SDHID0, PTD2_OUT, PTD2_IN_PU, PTD2_IN,
--		SDHICMD, PTD1_OUT, PTD1_IN_PU, PTD1_IN,
-+		SDHICD, 0, 0, PTD7_IN,
-+		SDHIWP, PTD6_OUT, 0, PTD6_IN,
-+		SDHID3, PTD5_OUT, 0, PTD5_IN,
-+		IRQ2_SDHID2, PTD4_OUT, 0, PTD4_IN,
-+		SDHID1, PTD3_OUT, 0, PTD3_IN,
-+		SDHID0, PTD2_OUT, 0, PTD2_IN,
-+		SDHICMD, PTD1_OUT, 0, PTD1_IN,
- 		SDHICLK, PTD0_OUT, 0, 0 }
- 	},
- 	{ PINMUX_CFG_REG("PECR", 0xa4050108, 16, 2) {
--		A25, PTE7_OUT, PTE7_IN_PD, PTE7_IN,
--		A24, PTE6_OUT, PTE6_IN_PD, PTE6_IN,
--		A23, PTE5_OUT, PTE5_IN_PD, PTE5_IN,
--		A22, PTE4_OUT, PTE4_IN_PD, PTE4_IN,
-+		A25, PTE7_OUT, 0, PTE7_IN,
-+		A24, PTE6_OUT, 0, PTE6_IN,
-+		A23, PTE5_OUT, 0, PTE5_IN,
-+		A22, PTE4_OUT, 0, PTE4_IN,
- 		0, 0, 0, 0,
- 		0, 0, 0, 0,
--		IRQ5, PTE1_OUT, PTE1_IN_PD, PTE1_IN,
--		IRQ4_BS, PTE0_OUT, PTE0_IN_PD, PTE0_IN }
-+		IRQ5, PTE1_OUT, 0, PTE1_IN,
-+		IRQ4_BS, PTE0_OUT, 0, PTE0_IN }
- 	},
- 	{ PINMUX_CFG_REG("PFCR", 0xa405010a, 16, 2) {
- 		0, 0, 0, 0,
--		PTF6, PTF6_OUT, PTF6_IN_PD, PTF6_IN,
--		SIOSCK_SIUBOBT, PTF5_OUT, PTF5_IN_PD, PTF5_IN,
--		SIOSTRB1_SIUBOLR, PTF4_OUT, PTF4_IN_PD, PTF4_IN,
--		SIOSTRB0_SIUBIBT, PTF3_OUT, PTF3_IN_PD, PTF3_IN,
--		SIOD_SIUBILR, PTF2_OUT, PTF2_IN_PD, PTF2_IN,
--		SIORXD_SIUBISLD, 0, PTF1_IN_PD, PTF1_IN,
-+		PTF6, PTF6_OUT, 0, PTF6_IN,
-+		SIOSCK_SIUBOBT, PTF5_OUT, 0, PTF5_IN,
-+		SIOSTRB1_SIUBOLR, PTF4_OUT, 0, PTF4_IN,
-+		SIOSTRB0_SIUBIBT, PTF3_OUT, 0, PTF3_IN,
-+		SIOD_SIUBILR, PTF2_OUT, 0, PTF2_IN,
-+		SIORXD_SIUBISLD, 0, 0, PTF1_IN,
- 		SIOTXD_SIUBOSLD, PTF0_OUT, 0, 0 }
- 	},
- 	{ PINMUX_CFG_REG("PGCR", 0xa405010c, 16, 2) {
-@@ -1341,13 +1308,13 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
- 	},
- 	{ PINMUX_CFG_REG("PHCR", 0xa405010e, 16, 2) {
- 		LCDVCPWC_LCDVCPWC2, PTH7_OUT, 0, 0,
--		LCDVSYN2_DACK, PTH6_OUT, PTH6_IN_PD, PTH6_IN,
--		LCDVSYN, PTH5_OUT, PTH5_IN_PD, PTH5_IN,
-+		LCDVSYN2_DACK, PTH6_OUT, 0, PTH6_IN,
-+		LCDVSYN, PTH5_OUT, 0, PTH5_IN,
- 		LCDDISP_LCDRS, PTH4_OUT, 0, 0,
- 		LCDHSYN_LCDCS, PTH3_OUT, 0, 0,
- 		LCDDON_LCDDON2, PTH2_OUT, 0, 0,
--		LCDD17_DV_HSYNC, PTH1_OUT, PTH1_IN_PD, PTH1_IN,
--		LCDD16_DV_VSYNC, PTH0_OUT, PTH0_IN_PD, PTH0_IN }
-+		LCDD17_DV_HSYNC, PTH1_OUT, 0, PTH1_IN,
-+		LCDD16_DV_VSYNC, PTH0_OUT, 0, PTH0_IN }
- 	},
- 	{ PINMUX_CFG_REG("PJCR", 0xa4050110, 16, 2) {
- 		STATUS0, PTJ7_OUT, 0, 0,
-@@ -1356,38 +1323,38 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
- 		0, 0, 0, 0,
- 		0, 0, 0, 0,
- 		0, 0, 0, 0,
--		IRQ1, PTJ1_OUT, PTJ1_IN_PU, PTJ1_IN,
--		IRQ0, PTJ0_OUT, PTJ0_IN_PU, PTJ0_IN }
-+		IRQ1, PTJ1_OUT, 0, PTJ1_IN,
-+		IRQ0, PTJ0_OUT, 0, PTJ0_IN }
- 	},
- 	{ PINMUX_CFG_REG("PKCR", 0xa4050112, 16, 2) {
- 		0, 0, 0, 0,
--		SIUAILR_SIOF1_SS2, PTK6_OUT, PTK6_IN_PD, PTK6_IN,
--		SIUAIBT_SIOF1_SS1, PTK5_OUT, PTK5_IN_PD, PTK5_IN,
--		SIUAOLR_SIOF1_SYNC, PTK4_OUT, PTK4_IN_PD, PTK4_IN,
--		SIUAOBT_SIOF1_SCK, PTK3_OUT, PTK3_IN_PD, PTK3_IN,
--		SIUAISLD_SIOF1_RXD, 0, PTK2_IN_PD, PTK2_IN,
-+		SIUAILR_SIOF1_SS2, PTK6_OUT, 0, PTK6_IN,
-+		SIUAIBT_SIOF1_SS1, PTK5_OUT, 0, PTK5_IN,
-+		SIUAOLR_SIOF1_SYNC, PTK4_OUT, 0, PTK4_IN,
-+		SIUAOBT_SIOF1_SCK, PTK3_OUT, 0, PTK3_IN,
-+		SIUAISLD_SIOF1_RXD, 0, 0, PTK2_IN,
- 		SIUAOSLD_SIOF1_TXD, PTK1_OUT, 0, 0,
--		PTK0, PTK0_OUT, PTK0_IN_PD, PTK0_IN }
-+		PTK0, PTK0_OUT, 0, PTK0_IN }
- 	},
- 	{ PINMUX_CFG_REG("PLCR", 0xa4050114, 16, 2) {
--		LCDD15_DV_D15, PTL7_OUT, PTL7_IN_PD, PTL7_IN,
--		LCDD14_DV_D14, PTL6_OUT, PTL6_IN_PD, PTL6_IN,
--		LCDD13_DV_D13, PTL5_OUT, PTL5_IN_PD, PTL5_IN,
--		LCDD12_DV_D12, PTL4_OUT, PTL4_IN_PD, PTL4_IN,
--		LCDD11_DV_D11, PTL3_OUT, PTL3_IN_PD, PTL3_IN,
--		LCDD10_DV_D10, PTL2_OUT, PTL2_IN_PD, PTL2_IN,
--		LCDD9_DV_D9, PTL1_OUT, PTL1_IN_PD, PTL1_IN,
--		LCDD8_DV_D8, PTL0_OUT, PTL0_IN_PD, PTL0_IN }
-+		LCDD15_DV_D15, PTL7_OUT, 0, PTL7_IN,
-+		LCDD14_DV_D14, PTL6_OUT, 0, PTL6_IN,
-+		LCDD13_DV_D13, PTL5_OUT, 0, PTL5_IN,
-+		LCDD12_DV_D12, PTL4_OUT, 0, PTL4_IN,
-+		LCDD11_DV_D11, PTL3_OUT, 0, PTL3_IN,
-+		LCDD10_DV_D10, PTL2_OUT, 0, PTL2_IN,
-+		LCDD9_DV_D9, PTL1_OUT, 0, PTL1_IN,
-+		LCDD8_DV_D8, PTL0_OUT, 0, PTL0_IN }
- 	},
- 	{ PINMUX_CFG_REG("PMCR", 0xa4050116, 16, 2) {
--		LCDD7_DV_D7, PTM7_OUT, PTM7_IN_PD, PTM7_IN,
--		LCDD6_DV_D6, PTM6_OUT, PTM6_IN_PD, PTM6_IN,
--		LCDD5_DV_D5, PTM5_OUT, PTM5_IN_PD, PTM5_IN,
--		LCDD4_DV_D4, PTM4_OUT, PTM4_IN_PD, PTM4_IN,
--		LCDD3_DV_D3, PTM3_OUT, PTM3_IN_PD, PTM3_IN,
--		LCDD2_DV_D2, PTM2_OUT, PTM2_IN_PD, PTM2_IN,
--		LCDD1_DV_D1, PTM1_OUT, PTM1_IN_PD, PTM1_IN,
--		LCDD0_DV_D0, PTM0_OUT, PTM0_IN_PD, PTM0_IN }
-+		LCDD7_DV_D7, PTM7_OUT, 0, PTM7_IN,
-+		LCDD6_DV_D6, PTM6_OUT, 0, PTM6_IN,
-+		LCDD5_DV_D5, PTM5_OUT, 0, PTM5_IN,
-+		LCDD4_DV_D4, PTM4_OUT, 0, PTM4_IN,
-+		LCDD3_DV_D3, PTM3_OUT, 0, PTM3_IN,
-+		LCDD2_DV_D2, PTM2_OUT, 0, PTM2_IN,
-+		LCDD1_DV_D1, PTM1_OUT, 0, PTM1_IN,
-+		LCDD0_DV_D0, PTM0_OUT, 0, PTM0_IN }
- 	},
- 	{ PINMUX_CFG_REG("PNCR", 0xa4050118, 16, 2) {
- 		HPD63, PTN7_OUT, 0, PTN7_IN,
-@@ -1402,12 +1369,12 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
- 	{ PINMUX_CFG_REG("PQCR", 0xa405011a, 16, 2) {
- 		0, 0, 0, 0,
- 		SIOF0_SS2_SIM_RST, PTQ6_OUT, 0, 0,
--		SIOF0_SS1_TS_SPSYNC, PTQ5_OUT, PTQ5_IN_PD, PTQ5_IN,
--		SIOF0_SYNC_TS_SDEN, PTQ4_OUT, PTQ4_IN_PD, PTQ4_IN,
--		SIOF0_SCK_TS_SCK, PTQ3_OUT, PTQ3_IN_PD, PTQ3_IN,
--		PTQ2, 0, PTQ2_IN_PD, PTQ2_IN,
-+		SIOF0_SS1_TS_SPSYNC, PTQ5_OUT, 0, PTQ5_IN,
-+		SIOF0_SYNC_TS_SDEN, PTQ4_OUT, 0, PTQ4_IN,
-+		SIOF0_SCK_TS_SCK, PTQ3_OUT, 0, PTQ3_IN,
-+		PTQ2, 0, 0, PTQ2_IN,
- 		PTQ1, PTQ1_OUT, 0, 0,
--		PTQ0, PTQ0_OUT, PTQ0_IN_PU, PTQ0_IN }
-+		PTQ0, PTQ0_OUT, 0, PTQ0_IN }
- 	},
- 	{ PINMUX_CFG_REG("PRCR", 0xa405011c, 16, 2) {
- 		0, 0, 0, 0,
-@@ -1415,7 +1382,7 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
- 		0, 0, 0, 0,
- 		LCDRD, PTR4_OUT, 0, 0,
- 		CS6B_CE1B_LCDCS2, PTR3_OUT, 0, 0,
--		WAIT, 0, PTR2_IN_PU, PTR2_IN,
-+		WAIT, 0, 0, PTR2_IN,
- 		LCDDCK_LCDWR, PTR1_OUT, 0, 0,
- 		LCDVEPWC_LCDVEPWC2, PTR0_OUT, 0, 0 }
- 	},
-@@ -1423,80 +1390,80 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
- 		0, 0, 0, 0,
- 		0, 0, 0, 0,
- 		0, 0, 0, 0,
--		SCIF0_CTS_SIUAISPD, 0, PTS4_IN_PD, PTS4_IN,
-+		SCIF0_CTS_SIUAISPD, 0, 0, PTS4_IN,
- 		SCIF0_RTS_SIUAOSPD, PTS3_OUT, 0, 0,
--		SCIF0_SCK_TPUTO, PTS2_OUT, PTS2_IN_PD, PTS2_IN,
--		SCIF0_RXD, 0, PTS1_IN_PD, PTS1_IN,
-+		SCIF0_SCK_TPUTO, PTS2_OUT, 0, PTS2_IN,
-+		SCIF0_RXD, 0, 0, PTS1_IN,
- 		SCIF0_TXD, PTS0_OUT, 0, 0 }
- 	},
- 	{ PINMUX_CFG_REG("PTCR", 0xa4050140, 16, 2) {
- 		0, 0, 0, 0,
- 		0, 0, 0, 0,
- 		0, 0, 0, 0,
--		FOE_VIO_VD2, PTT4_OUT, PTT4_IN_PD, PTT4_IN,
--		FWE, PTT3_OUT, PTT3_IN_PD, PTT3_IN,
--		FSC, PTT2_OUT, PTT2_IN_PD, PTT2_IN,
--		DREQ0, 0, PTT1_IN_PD, PTT1_IN,
-+		FOE_VIO_VD2, PTT4_OUT, 0, PTT4_IN,
-+		FWE, PTT3_OUT, 0, PTT3_IN,
-+		FSC, PTT2_OUT, 0, PTT2_IN,
-+		DREQ0, 0, 0, PTT1_IN,
- 		FCDE, PTT0_OUT, 0, 0 }
- 	},
- 	{ PINMUX_CFG_REG("PUCR", 0xa4050142, 16, 2) {
- 		0, 0, 0, 0,
- 		0, 0, 0, 0,
- 		0, 0, 0, 0,
--		NAF2_VIO_D10, PTU4_OUT, PTU4_IN_PD, PTU4_IN,
--		NAF1_VIO_D9, PTU3_OUT, PTU3_IN_PD, PTU3_IN,
--		NAF0_VIO_D8, PTU2_OUT, PTU2_IN_PD, PTU2_IN,
--		FRB_VIO_CLK2, 0, PTU1_IN_PD, PTU1_IN,
--		FCE_VIO_HD2, PTU0_OUT, PTU0_IN_PD, PTU0_IN }
-+		NAF2_VIO_D10, PTU4_OUT, 0, PTU4_IN,
-+		NAF1_VIO_D9, PTU3_OUT, 0, PTU3_IN,
-+		NAF0_VIO_D8, PTU2_OUT, 0, PTU2_IN,
-+		FRB_VIO_CLK2, 0, 0, PTU1_IN,
-+		FCE_VIO_HD2, PTU0_OUT, 0, PTU0_IN }
- 	},
- 	{ PINMUX_CFG_REG("PVCR", 0xa4050144, 16, 2) {
- 		0, 0, 0, 0,
- 		0, 0, 0, 0,
- 		0, 0, 0, 0,
--		NAF7_VIO_D15, PTV4_OUT, PTV4_IN_PD, PTV4_IN,
--		NAF6_VIO_D14, PTV3_OUT, PTV3_IN_PD, PTV3_IN,
--		NAF5_VIO_D13, PTV2_OUT, PTV2_IN_PD, PTV2_IN,
--		NAF4_VIO_D12, PTV1_OUT, PTV1_IN_PD, PTV1_IN,
--		NAF3_VIO_D11, PTV0_OUT, PTV0_IN_PD, PTV0_IN }
-+		NAF7_VIO_D15, PTV4_OUT, 0, PTV4_IN,
-+		NAF6_VIO_D14, PTV3_OUT, 0, PTV3_IN,
-+		NAF5_VIO_D13, PTV2_OUT, 0, PTV2_IN,
-+		NAF4_VIO_D12, PTV1_OUT, 0, PTV1_IN,
-+		NAF3_VIO_D11, PTV0_OUT, 0, PTV0_IN }
- 	},
- 	{ PINMUX_CFG_REG("PWCR", 0xa4050146, 16, 2) {
- 		0, 0, 0, 0,
--		VIO_FLD_SCIF2_CTS, 0, PTW6_IN_PD, PTW6_IN,
-+		VIO_FLD_SCIF2_CTS, 0, 0, PTW6_IN,
- 		VIO_CKO_SCIF2_RTS, PTW5_OUT, 0, 0,
--		VIO_STEX_SCIF2_SCK, PTW4_OUT, PTW4_IN_PD, PTW4_IN,
--		VIO_STEM_SCIF2_TXD, PTW3_OUT, PTW3_IN_PD, PTW3_IN,
--		VIO_HD_SCIF2_RXD, PTW2_OUT, PTW2_IN_PD, PTW2_IN,
--		VIO_VD_SCIF1_CTS, PTW1_OUT, PTW1_IN_PD, PTW1_IN,
--		VIO_CLK_SCIF1_RTS, PTW0_OUT, PTW0_IN_PD, PTW0_IN }
-+		VIO_STEX_SCIF2_SCK, PTW4_OUT, 0, PTW4_IN,
-+		VIO_STEM_SCIF2_TXD, PTW3_OUT, 0, PTW3_IN,
-+		VIO_HD_SCIF2_RXD, PTW2_OUT, 0, PTW2_IN,
-+		VIO_VD_SCIF1_CTS, PTW1_OUT, 0, PTW1_IN,
-+		VIO_CLK_SCIF1_RTS, PTW0_OUT, 0, PTW0_IN }
- 	},
- 	{ PINMUX_CFG_REG("PXCR", 0xa4050148, 16, 2) {
- 		0, 0, 0, 0,
--		CS6A_CE2B, PTX6_OUT, PTX6_IN_PU, PTX6_IN,
--		LCDD23, PTX5_OUT, PTX5_IN_PD, PTX5_IN,
--		LCDD22, PTX4_OUT, PTX4_IN_PD, PTX4_IN,
--		LCDD21, PTX3_OUT, PTX3_IN_PD, PTX3_IN,
--		LCDD20, PTX2_OUT, PTX2_IN_PD, PTX2_IN,
--		LCDD19_DV_CLKI, PTX1_OUT, PTX1_IN_PD, PTX1_IN,
--		LCDD18_DV_CLK, PTX0_OUT, PTX0_IN_PD, PTX0_IN }
-+		CS6A_CE2B, PTX6_OUT, 0, PTX6_IN,
-+		LCDD23, PTX5_OUT, 0, PTX5_IN,
-+		LCDD22, PTX4_OUT, 0, PTX4_IN,
-+		LCDD21, PTX3_OUT, 0, PTX3_IN,
-+		LCDD20, PTX2_OUT, 0, PTX2_IN,
-+		LCDD19_DV_CLKI, PTX1_OUT, 0, PTX1_IN,
-+		LCDD18_DV_CLK, PTX0_OUT, 0, PTX0_IN }
- 	},
- 	{ PINMUX_CFG_REG("PYCR", 0xa405014a, 16, 2) {
- 		0, 0, 0, 0,
- 		0, 0, 0, 0,
--		KEYOUT5_IN5, PTY5_OUT, PTY5_IN_PU, PTY5_IN,
--		KEYOUT4_IN6, PTY4_OUT, PTY4_IN_PU, PTY4_IN,
--		KEYOUT3, PTY3_OUT, PTY3_IN_PU, PTY3_IN,
--		KEYOUT2, PTY2_OUT, PTY2_IN_PU, PTY2_IN,
-+		KEYOUT5_IN5, PTY5_OUT, 0, PTY5_IN,
-+		KEYOUT4_IN6, PTY4_OUT, 0, PTY4_IN,
-+		KEYOUT3, PTY3_OUT, 0, PTY3_IN,
-+		KEYOUT2, PTY2_OUT, 0, PTY2_IN,
- 		KEYOUT1, PTY1_OUT, 0, 0,
--		KEYOUT0, PTY0_OUT, PTY0_IN_PU, PTY0_IN }
-+		KEYOUT0, PTY0_OUT, 0, PTY0_IN }
- 	},
- 	{ PINMUX_CFG_REG("PZCR", 0xa405014c, 16, 2) {
- 		0, 0, 0, 0,
- 		0, 0, 0, 0,
--		KEYIN4_IRQ7, 0, PTZ5_IN_PU, PTZ5_IN,
--		KEYIN3, 0, PTZ4_IN_PU, PTZ4_IN,
--		KEYIN2, 0, PTZ3_IN_PU, PTZ3_IN,
--		KEYIN1, 0, PTZ2_IN_PU, PTZ2_IN,
--		KEYIN0_IRQ6, 0, PTZ1_IN_PU, PTZ1_IN,
-+		KEYIN4_IRQ7, 0, 0, PTZ5_IN,
-+		KEYIN3, 0, 0, PTZ4_IN,
-+		KEYIN2, 0, 0, PTZ3_IN,
-+		KEYIN1, 0, 0, PTZ2_IN,
-+		KEYIN0_IRQ6, 0, 0, PTZ1_IN,
- 		0, 0, 0, 0 }
- 	},
- 	{ PINMUX_CFG_REG("PSELA", 0xa405014e, 16, 1) {
-@@ -1763,8 +1730,6 @@ static const struct pinmux_data_reg pinmux_data_regs[] = {
- const struct sh_pfc_soc_info sh7722_pinmux_info = {
- 	.name = "sh7722_pfc",
- 	.input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
--	.input_pd = { PINMUX_INPUT_PULLDOWN_BEGIN, PINMUX_INPUT_PULLDOWN_END },
--	.input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END },
- 	.output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
- 	.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0530-sh-pfc-sh7723-Remove-unused-input_pu-range.patch b/patches.renesas/0530-sh-pfc-sh7723-Remove-unused-input_pu-range.patch
deleted file mode 100644
index 3264be630b321..0000000000000
--- a/patches.renesas/0530-sh-pfc-sh7723-Remove-unused-input_pu-range.patch
+++ /dev/null
@@ -1,122 +0,0 @@
-From 761c3d73e73e404c86765afe4cb3797e6b246b30 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 16 Jul 2013 01:54:13 +0200
-Subject: sh-pfc: sh7723: Remove unused input_pu range
-
-The PFC SH7723 SoC data contains a input_pu range used to configure
-pull-up resistors using the legacy non-pinconf API. That API has been
-removed from the driver, the range is thus not used anymore. Remove it.
-
-If required, configuring pull-up resistors for the SH7723 can be
-implemented using the pinconf API, as done for the SH-Mobile, R-Mobile
-and R-Car platforms.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit 52331350b47daf0d7718cb9ee983f9e4b0318758)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-sh7723.c | 39 +++++++++++++++----------------------
- 1 file changed, 16 insertions(+), 23 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7723.c b/drivers/pinctrl/sh-pfc/pfc-sh7723.c
-index 07ad1d8d..da0dbb0b 100644
---- a/drivers/pinctrl/sh-pfc/pfc-sh7723.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-sh7723.c
-@@ -102,12 +102,6 @@ enum {
- 	PTZ3_IN, PTZ2_IN, PTZ1_IN, PTZ0_IN,
- 	PINMUX_INPUT_END,
- 
--	PINMUX_INPUT_PULLUP_BEGIN,
--	PTA4_IN_PU, PTA3_IN_PU, PTA2_IN_PU, PTA1_IN_PU, PTA0_IN_PU,
--	PTB2_IN_PU, PTB1_IN_PU,
--	PTR2_IN_PU,
--	PINMUX_INPUT_PULLUP_END,
--
- 	PINMUX_OUTPUT_BEGIN,
- 	PTA7_OUT, PTA6_OUT, PTA5_OUT, PTA4_OUT,
- 	PTA3_OUT, PTA2_OUT, PTA1_OUT, PTA0_OUT,
-@@ -355,11 +349,11 @@ static const pinmux_enum_t pinmux_data[] = {
- 	PINMUX_DATA(PTA7_DATA, PTA7_IN, PTA7_OUT),
- 	PINMUX_DATA(PTA6_DATA, PTA6_IN, PTA6_OUT),
- 	PINMUX_DATA(PTA5_DATA, PTA5_IN, PTA5_OUT),
--	PINMUX_DATA(PTA4_DATA, PTA4_IN, PTA4_OUT, PTA4_IN_PU),
--	PINMUX_DATA(PTA3_DATA, PTA3_IN, PTA3_OUT, PTA3_IN_PU),
--	PINMUX_DATA(PTA2_DATA, PTA2_IN, PTA2_OUT, PTA2_IN_PU),
--	PINMUX_DATA(PTA1_DATA, PTA1_IN, PTA1_OUT, PTA1_IN_PU),
--	PINMUX_DATA(PTA0_DATA, PTA0_IN, PTA0_OUT, PTA0_IN_PU),
-+	PINMUX_DATA(PTA4_DATA, PTA4_IN, PTA4_OUT),
-+	PINMUX_DATA(PTA3_DATA, PTA3_IN, PTA3_OUT),
-+	PINMUX_DATA(PTA2_DATA, PTA2_IN, PTA2_OUT),
-+	PINMUX_DATA(PTA1_DATA, PTA1_IN, PTA1_OUT),
-+	PINMUX_DATA(PTA0_DATA, PTA0_IN, PTA0_OUT),
- 
- 	/* PTB GPIO */
- 	PINMUX_DATA(PTB7_DATA, PTB7_IN, PTB7_OUT),
-@@ -367,8 +361,8 @@ static const pinmux_enum_t pinmux_data[] = {
- 	PINMUX_DATA(PTB5_DATA, PTB5_IN, PTB5_OUT),
- 	PINMUX_DATA(PTB4_DATA, PTB4_IN, PTB4_OUT),
- 	PINMUX_DATA(PTB3_DATA, PTB3_IN, PTB3_OUT),
--	PINMUX_DATA(PTB2_DATA, PTB2_IN, PTB2_OUT, PTB2_IN_PU),
--	PINMUX_DATA(PTB1_DATA, PTB1_IN, PTB1_OUT, PTB1_IN_PU),
-+	PINMUX_DATA(PTB2_DATA, PTB2_IN, PTB2_OUT),
-+	PINMUX_DATA(PTB1_DATA, PTB1_IN, PTB1_OUT),
- 	PINMUX_DATA(PTB0_DATA, PTB0_IN, PTB0_OUT),
- 
- 	/* PTC GPIO */
-@@ -487,7 +481,7 @@ static const pinmux_enum_t pinmux_data[] = {
- 	PINMUX_DATA(PTR5_DATA, PTR5_IN, PTR5_OUT),
- 	PINMUX_DATA(PTR4_DATA, PTR4_IN, PTR4_OUT),
- 	PINMUX_DATA(PTR3_DATA, PTR3_IN),
--	PINMUX_DATA(PTR2_DATA, PTR2_IN, PTR2_IN_PU),
-+	PINMUX_DATA(PTR2_DATA, PTR2_IN),
- 	PINMUX_DATA(PTR1_DATA, PTR1_IN, PTR1_OUT),
- 	PINMUX_DATA(PTR0_DATA, PTR0_IN, PTR0_OUT),
- 
-@@ -1520,11 +1514,11 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
- 		PTA7_FN, PTA7_OUT, 0, PTA7_IN,
- 		PTA6_FN, PTA6_OUT, 0, PTA6_IN,
- 		PTA5_FN, PTA5_OUT, 0, PTA5_IN,
--		PTA4_FN, PTA4_OUT, PTA4_IN_PU, PTA4_IN,
--		PTA3_FN, PTA3_OUT, PTA3_IN_PU, PTA3_IN,
--		PTA2_FN, PTA2_OUT, PTA2_IN_PU, PTA2_IN,
--		PTA1_FN, PTA1_OUT, PTA1_IN_PU, PTA1_IN,
--		PTA0_FN, PTA0_OUT, PTA0_IN_PU, PTA0_IN }
-+		PTA4_FN, PTA4_OUT, 0, PTA4_IN,
-+		PTA3_FN, PTA3_OUT, 0, PTA3_IN,
-+		PTA2_FN, PTA2_OUT, 0, PTA2_IN,
-+		PTA1_FN, PTA1_OUT, 0, PTA1_IN,
-+		PTA0_FN, PTA0_OUT, 0, PTA0_IN }
- 	},
- 	{ PINMUX_CFG_REG("PBCR", 0xa4050102, 16, 2) {
- 		PTB7_FN, PTB7_OUT, 0, PTB7_IN,
-@@ -1532,8 +1526,8 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
- 		PTB5_FN, PTB5_OUT, 0, PTB5_IN,
- 		PTB4_FN, PTB4_OUT, 0, PTB4_IN,
- 		PTB3_FN, PTB3_OUT, 0, PTB3_IN,
--		PTB2_FN, PTB2_OUT, PTB2_IN_PU, PTB2_IN,
--		PTB1_FN, PTB1_OUT, PTB1_IN_PU, PTB1_IN,
-+		PTB2_FN, PTB2_OUT, 0, PTB2_IN,
-+		PTB1_FN, PTB1_OUT, 0, PTB1_IN,
- 		PTB0_FN, PTB0_OUT, 0, PTB0_IN }
- 	},
- 	{ PINMUX_CFG_REG("PCCR", 0xa4050104, 16, 2) {
-@@ -1662,7 +1656,7 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
- 		PTR5_FN, PTR5_OUT, 0, PTR5_IN,
- 		PTR4_FN, PTR4_OUT, 0, PTR4_IN,
- 		PTR3_FN, 0, 0, PTR3_IN,
--		PTR2_FN, 0, PTR2_IN_PU, PTR2_IN,
-+		PTR2_FN, 0, 0, PTR2_IN,
- 		PTR1_FN, PTR1_OUT, 0, PTR1_IN,
- 		PTR0_FN, PTR0_OUT, 0, PTR0_IN }
- 	},
-@@ -1888,7 +1882,6 @@ static const struct pinmux_data_reg pinmux_data_regs[] = {
- const struct sh_pfc_soc_info sh7723_pinmux_info = {
- 	.name = "sh7723_pfc",
- 	.input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
--	.input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END },
- 	.output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
- 	.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0531-sh-pfc-sh7724-Remove-unused-input_pu-range.patch b/patches.renesas/0531-sh-pfc-sh7724-Remove-unused-input_pu-range.patch
deleted file mode 100644
index 34cc3a357411f..0000000000000
--- a/patches.renesas/0531-sh-pfc-sh7724-Remove-unused-input_pu-range.patch
+++ /dev/null
@@ -1,888 +0,0 @@
-From 9444e0b675afad1e34be924c5fc6da62869a5481 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 16 Jul 2013 01:54:13 +0200
-Subject: sh-pfc: sh7724: Remove unused input_pu range
-
-The PFC SH7724 SoC data contains a input_pu range used to configure
-pull-up resistors using the legacy non-pinconf API. That API has been
-removed from the driver, the range is thus not used anymore. Remove it.
-
-If required, configuring pull-up resistors for the SH7724 can be
-implemented using the pinconf API, as done for the SH-Mobile, R-Mobile
-and R-Car platforms.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit c5361517bbd494d1c268ac06d022f8da08da89b4)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-sh7724.c | 731 +++++++++++++++++-------------------
- 1 file changed, 342 insertions(+), 389 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7724.c b/drivers/pinctrl/sh-pfc/pfc-sh7724.c
-index 35e55160..e8563cf6 100644
---- a/drivers/pinctrl/sh-pfc/pfc-sh7724.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-sh7724.c
-@@ -117,52 +117,6 @@ enum {
- 	PTZ3_IN, PTZ2_IN, PTZ1_IN, PTZ0_IN,
- 	PINMUX_INPUT_END,
- 
--	PINMUX_INPUT_PULLUP_BEGIN,
--	PTA7_IN_PU, PTA6_IN_PU, PTA5_IN_PU, PTA4_IN_PU,
--	PTA3_IN_PU, PTA2_IN_PU, PTA1_IN_PU, PTA0_IN_PU,
--	PTB7_IN_PU, PTB6_IN_PU, PTB5_IN_PU, PTB4_IN_PU,
--	PTB3_IN_PU, PTB2_IN_PU, PTB1_IN_PU, PTB0_IN_PU,
--	PTC7_IN_PU, PTC6_IN_PU, PTC5_IN_PU, PTC4_IN_PU,
--	PTC3_IN_PU, PTC2_IN_PU, PTC1_IN_PU, PTC0_IN_PU,
--	PTD7_IN_PU, PTD6_IN_PU, PTD5_IN_PU, PTD4_IN_PU,
--	PTD3_IN_PU, PTD2_IN_PU, PTD1_IN_PU, PTD0_IN_PU,
--	PTE7_IN_PU, PTE6_IN_PU, PTE5_IN_PU, PTE4_IN_PU,
--	PTE3_IN_PU, PTE2_IN_PU, PTE1_IN_PU, PTE0_IN_PU,
--	PTF7_IN_PU, PTF6_IN_PU, PTF5_IN_PU, PTF4_IN_PU,
--	PTF3_IN_PU, PTF2_IN_PU, PTF1_IN_PU, PTF0_IN_PU,
--	PTH7_IN_PU, PTH6_IN_PU, PTH5_IN_PU, PTH4_IN_PU,
--	PTH3_IN_PU, PTH2_IN_PU, PTH1_IN_PU, PTH0_IN_PU,
--	PTJ3_IN_PU, PTJ2_IN_PU, PTJ1_IN_PU, PTJ0_IN_PU,
--	PTK7_IN_PU, PTK6_IN_PU, PTK5_IN_PU, PTK4_IN_PU,
--	PTK3_IN_PU, PTK2_IN_PU, PTK1_IN_PU, PTK0_IN_PU,
--	PTL7_IN_PU, PTL6_IN_PU, PTL5_IN_PU, PTL4_IN_PU,
--	PTL3_IN_PU, PTL2_IN_PU, PTL1_IN_PU, PTL0_IN_PU,
--	PTM7_IN_PU, PTM6_IN_PU, PTM5_IN_PU, PTM4_IN_PU,
--	PTM3_IN_PU, PTM2_IN_PU, PTM1_IN_PU, PTM0_IN_PU,
--	PTN7_IN_PU, PTN6_IN_PU, PTN5_IN_PU, PTN4_IN_PU,
--	PTN3_IN_PU, PTN2_IN_PU, PTN1_IN_PU, PTN0_IN_PU,
--	PTQ7_IN_PU, PTQ6_IN_PU, PTQ5_IN_PU, PTQ4_IN_PU,
--	PTQ3_IN_PU, PTQ2_IN_PU, PTQ1_IN_PU, PTQ0_IN_PU,
--	PTR7_IN_PU, PTR6_IN_PU, PTR5_IN_PU, PTR4_IN_PU,
--	PTR3_IN_PU, PTR2_IN_PU, PTR1_IN_PU, PTR0_IN_PU,
--		    PTS6_IN_PU, PTS5_IN_PU, PTS4_IN_PU,
--	PTS3_IN_PU, PTS2_IN_PU, PTS1_IN_PU, PTS0_IN_PU,
--	PTT7_IN_PU, PTT6_IN_PU, PTT5_IN_PU, PTT4_IN_PU,
--	PTT3_IN_PU, PTT2_IN_PU, PTT1_IN_PU, PTT0_IN_PU,
--	PTU7_IN_PU, PTU6_IN_PU, PTU5_IN_PU, PTU4_IN_PU,
--	PTU3_IN_PU, PTU2_IN_PU, PTU1_IN_PU, PTU0_IN_PU,
--	PTV7_IN_PU, PTV6_IN_PU, PTV5_IN_PU, PTV4_IN_PU,
--	PTV3_IN_PU, PTV2_IN_PU, PTV1_IN_PU, PTV0_IN_PU,
--	PTW7_IN_PU, PTW6_IN_PU, PTW5_IN_PU, PTW4_IN_PU,
--	PTW3_IN_PU, PTW2_IN_PU, PTW1_IN_PU, PTW0_IN_PU,
--	PTX7_IN_PU, PTX6_IN_PU, PTX5_IN_PU, PTX4_IN_PU,
--	PTX3_IN_PU, PTX2_IN_PU, PTX1_IN_PU, PTX0_IN_PU,
--	PTY7_IN_PU, PTY6_IN_PU, PTY5_IN_PU, PTY4_IN_PU,
--	PTY3_IN_PU, PTY2_IN_PU, PTY1_IN_PU, PTY0_IN_PU,
--	PTZ7_IN_PU, PTZ6_IN_PU, PTZ5_IN_PU, PTZ4_IN_PU,
--	PTZ3_IN_PU, PTZ2_IN_PU, PTZ1_IN_PU, PTZ0_IN_PU,
--	PINMUX_INPUT_PULLUP_END,
--
- 	PINMUX_OUTPUT_BEGIN,
- 	PTA7_OUT, PTA6_OUT, PTA5_OUT, PTA4_OUT,
- 	PTA3_OUT, PTA2_OUT, PTA1_OUT, PTA0_OUT,
-@@ -574,64 +528,64 @@ enum {
- 
- static const pinmux_enum_t pinmux_data[] = {
- 	/* PTA GPIO */
--	PINMUX_DATA(PTA7_DATA, PTA7_IN, PTA7_OUT, PTA7_IN_PU),
--	PINMUX_DATA(PTA6_DATA, PTA6_IN, PTA6_OUT, PTA6_IN_PU),
--	PINMUX_DATA(PTA5_DATA, PTA5_IN, PTA5_OUT, PTA5_IN_PU),
--	PINMUX_DATA(PTA4_DATA, PTA4_IN, PTA4_OUT, PTA4_IN_PU),
--	PINMUX_DATA(PTA3_DATA, PTA3_IN, PTA3_OUT, PTA3_IN_PU),
--	PINMUX_DATA(PTA2_DATA, PTA2_IN, PTA2_OUT, PTA2_IN_PU),
--	PINMUX_DATA(PTA1_DATA, PTA1_IN, PTA1_OUT, PTA1_IN_PU),
--	PINMUX_DATA(PTA0_DATA, PTA0_IN, PTA0_OUT, PTA0_IN_PU),
-+	PINMUX_DATA(PTA7_DATA, PTA7_IN, PTA7_OUT),
-+	PINMUX_DATA(PTA6_DATA, PTA6_IN, PTA6_OUT),
-+	PINMUX_DATA(PTA5_DATA, PTA5_IN, PTA5_OUT),
-+	PINMUX_DATA(PTA4_DATA, PTA4_IN, PTA4_OUT),
-+	PINMUX_DATA(PTA3_DATA, PTA3_IN, PTA3_OUT),
-+	PINMUX_DATA(PTA2_DATA, PTA2_IN, PTA2_OUT),
-+	PINMUX_DATA(PTA1_DATA, PTA1_IN, PTA1_OUT),
-+	PINMUX_DATA(PTA0_DATA, PTA0_IN, PTA0_OUT),
- 
- 	/* PTB GPIO */
--	PINMUX_DATA(PTB7_DATA, PTB7_IN, PTB7_OUT, PTB7_IN_PU),
--	PINMUX_DATA(PTB6_DATA, PTB6_IN, PTB6_OUT, PTB6_IN_PU),
--	PINMUX_DATA(PTB5_DATA, PTB5_IN, PTB5_OUT, PTB5_IN_PU),
--	PINMUX_DATA(PTB4_DATA, PTB4_IN, PTB4_OUT, PTB4_IN_PU),
--	PINMUX_DATA(PTB3_DATA, PTB3_IN, PTB3_OUT, PTB3_IN_PU),
--	PINMUX_DATA(PTB2_DATA, PTB2_IN, PTB2_OUT, PTB2_IN_PU),
--	PINMUX_DATA(PTB1_DATA, PTB1_IN, PTB1_OUT, PTB1_IN_PU),
--	PINMUX_DATA(PTB0_DATA, PTB0_IN, PTB0_OUT, PTB0_IN_PU),
-+	PINMUX_DATA(PTB7_DATA, PTB7_IN, PTB7_OUT),
-+	PINMUX_DATA(PTB6_DATA, PTB6_IN, PTB6_OUT),
-+	PINMUX_DATA(PTB5_DATA, PTB5_IN, PTB5_OUT),
-+	PINMUX_DATA(PTB4_DATA, PTB4_IN, PTB4_OUT),
-+	PINMUX_DATA(PTB3_DATA, PTB3_IN, PTB3_OUT),
-+	PINMUX_DATA(PTB2_DATA, PTB2_IN, PTB2_OUT),
-+	PINMUX_DATA(PTB1_DATA, PTB1_IN, PTB1_OUT),
-+	PINMUX_DATA(PTB0_DATA, PTB0_IN, PTB0_OUT),
- 
- 	/* PTC GPIO */
--	PINMUX_DATA(PTC7_DATA, PTC7_IN, PTC7_OUT, PTC7_IN_PU),
--	PINMUX_DATA(PTC6_DATA, PTC6_IN, PTC6_OUT, PTC6_IN_PU),
--	PINMUX_DATA(PTC5_DATA, PTC5_IN, PTC5_OUT, PTC5_IN_PU),
--	PINMUX_DATA(PTC4_DATA, PTC4_IN, PTC4_OUT, PTC4_IN_PU),
--	PINMUX_DATA(PTC3_DATA, PTC3_IN, PTC3_OUT, PTC3_IN_PU),
--	PINMUX_DATA(PTC2_DATA, PTC2_IN, PTC2_OUT, PTC2_IN_PU),
--	PINMUX_DATA(PTC1_DATA, PTC1_IN, PTC1_OUT, PTC1_IN_PU),
--	PINMUX_DATA(PTC0_DATA, PTC0_IN, PTC0_OUT, PTC0_IN_PU),
-+	PINMUX_DATA(PTC7_DATA, PTC7_IN, PTC7_OUT),
-+	PINMUX_DATA(PTC6_DATA, PTC6_IN, PTC6_OUT),
-+	PINMUX_DATA(PTC5_DATA, PTC5_IN, PTC5_OUT),
-+	PINMUX_DATA(PTC4_DATA, PTC4_IN, PTC4_OUT),
-+	PINMUX_DATA(PTC3_DATA, PTC3_IN, PTC3_OUT),
-+	PINMUX_DATA(PTC2_DATA, PTC2_IN, PTC2_OUT),
-+	PINMUX_DATA(PTC1_DATA, PTC1_IN, PTC1_OUT),
-+	PINMUX_DATA(PTC0_DATA, PTC0_IN, PTC0_OUT),
- 
- 	/* PTD GPIO */
--	PINMUX_DATA(PTD7_DATA, PTD7_IN, PTD7_OUT, PTD7_IN_PU),
--	PINMUX_DATA(PTD6_DATA, PTD6_IN, PTD6_OUT, PTD6_IN_PU),
--	PINMUX_DATA(PTD5_DATA, PTD5_IN, PTD5_OUT, PTD5_IN_PU),
--	PINMUX_DATA(PTD4_DATA, PTD4_IN, PTD4_OUT, PTD4_IN_PU),
--	PINMUX_DATA(PTD3_DATA, PTD3_IN, PTD3_OUT, PTD3_IN_PU),
--	PINMUX_DATA(PTD2_DATA, PTD2_IN, PTD2_OUT, PTD2_IN_PU),
--	PINMUX_DATA(PTD1_DATA, PTD1_IN, PTD1_OUT, PTD1_IN_PU),
--	PINMUX_DATA(PTD0_DATA, PTD0_IN, PTD0_OUT, PTD0_IN_PU),
-+	PINMUX_DATA(PTD7_DATA, PTD7_IN, PTD7_OUT),
-+	PINMUX_DATA(PTD6_DATA, PTD6_IN, PTD6_OUT),
-+	PINMUX_DATA(PTD5_DATA, PTD5_IN, PTD5_OUT),
-+	PINMUX_DATA(PTD4_DATA, PTD4_IN, PTD4_OUT),
-+	PINMUX_DATA(PTD3_DATA, PTD3_IN, PTD3_OUT),
-+	PINMUX_DATA(PTD2_DATA, PTD2_IN, PTD2_OUT),
-+	PINMUX_DATA(PTD1_DATA, PTD1_IN, PTD1_OUT),
-+	PINMUX_DATA(PTD0_DATA, PTD0_IN, PTD0_OUT),
- 
- 	/* PTE GPIO */
--	PINMUX_DATA(PTE7_DATA, PTE7_IN, PTE7_OUT, PTE7_IN_PU),
--	PINMUX_DATA(PTE6_DATA, PTE6_IN, PTE6_OUT, PTE6_IN_PU),
--	PINMUX_DATA(PTE5_DATA, PTE5_IN, PTE5_OUT, PTE5_IN_PU),
--	PINMUX_DATA(PTE4_DATA, PTE4_IN, PTE4_OUT, PTE4_IN_PU),
--	PINMUX_DATA(PTE3_DATA, PTE3_IN, PTE3_OUT, PTE3_IN_PU),
--	PINMUX_DATA(PTE2_DATA, PTE2_IN, PTE2_OUT, PTE2_IN_PU),
--	PINMUX_DATA(PTE1_DATA, PTE1_IN, PTE1_OUT, PTE1_IN_PU),
--	PINMUX_DATA(PTE0_DATA, PTE0_IN, PTE0_OUT, PTE0_IN_PU),
-+	PINMUX_DATA(PTE7_DATA, PTE7_IN, PTE7_OUT),
-+	PINMUX_DATA(PTE6_DATA, PTE6_IN, PTE6_OUT),
-+	PINMUX_DATA(PTE5_DATA, PTE5_IN, PTE5_OUT),
-+	PINMUX_DATA(PTE4_DATA, PTE4_IN, PTE4_OUT),
-+	PINMUX_DATA(PTE3_DATA, PTE3_IN, PTE3_OUT),
-+	PINMUX_DATA(PTE2_DATA, PTE2_IN, PTE2_OUT),
-+	PINMUX_DATA(PTE1_DATA, PTE1_IN, PTE1_OUT),
-+	PINMUX_DATA(PTE0_DATA, PTE0_IN, PTE0_OUT),
- 
- 	/* PTF GPIO */
--	PINMUX_DATA(PTF7_DATA, PTF7_IN, PTF7_OUT, PTF7_IN_PU),
--	PINMUX_DATA(PTF6_DATA, PTF6_IN, PTF6_OUT, PTF6_IN_PU),
--	PINMUX_DATA(PTF5_DATA, PTF5_IN, PTF5_OUT, PTF5_IN_PU),
--	PINMUX_DATA(PTF4_DATA, PTF4_IN, PTF4_OUT, PTF4_IN_PU),
--	PINMUX_DATA(PTF3_DATA, PTF3_IN, PTF3_OUT, PTF3_IN_PU),
--	PINMUX_DATA(PTF2_DATA, PTF2_IN, PTF2_OUT, PTF2_IN_PU),
--	PINMUX_DATA(PTF1_DATA, PTF1_IN, PTF1_OUT, PTF1_IN_PU),
--	PINMUX_DATA(PTF0_DATA, PTF0_IN, PTF0_OUT, PTF0_IN_PU),
-+	PINMUX_DATA(PTF7_DATA, PTF7_IN, PTF7_OUT),
-+	PINMUX_DATA(PTF6_DATA, PTF6_IN, PTF6_OUT),
-+	PINMUX_DATA(PTF5_DATA, PTF5_IN, PTF5_OUT),
-+	PINMUX_DATA(PTF4_DATA, PTF4_IN, PTF4_OUT),
-+	PINMUX_DATA(PTF3_DATA, PTF3_IN, PTF3_OUT),
-+	PINMUX_DATA(PTF2_DATA, PTF2_IN, PTF2_OUT),
-+	PINMUX_DATA(PTF1_DATA, PTF1_IN, PTF1_OUT),
-+	PINMUX_DATA(PTF0_DATA, PTF0_IN, PTF0_OUT),
- 
- 	/* PTG GPIO */
- 	PINMUX_DATA(PTG5_DATA, PTG5_OUT),
-@@ -642,162 +596,162 @@ static const pinmux_enum_t pinmux_data[] = {
- 	PINMUX_DATA(PTG0_DATA, PTG0_OUT),
- 
- 	/* PTH GPIO */
--	PINMUX_DATA(PTH7_DATA, PTH7_IN, PTH7_OUT, PTH7_IN_PU),
--	PINMUX_DATA(PTH6_DATA, PTH6_IN, PTH6_OUT, PTH6_IN_PU),
--	PINMUX_DATA(PTH5_DATA, PTH5_IN, PTH5_OUT, PTH5_IN_PU),
--	PINMUX_DATA(PTH4_DATA, PTH4_IN, PTH4_OUT, PTH4_IN_PU),
--	PINMUX_DATA(PTH3_DATA, PTH3_IN, PTH3_OUT, PTH3_IN_PU),
--	PINMUX_DATA(PTH2_DATA, PTH2_IN, PTH2_OUT, PTH2_IN_PU),
--	PINMUX_DATA(PTH1_DATA, PTH1_IN, PTH1_OUT, PTH1_IN_PU),
--	PINMUX_DATA(PTH0_DATA, PTH0_IN, PTH0_OUT, PTH0_IN_PU),
-+	PINMUX_DATA(PTH7_DATA, PTH7_IN, PTH7_OUT),
-+	PINMUX_DATA(PTH6_DATA, PTH6_IN, PTH6_OUT),
-+	PINMUX_DATA(PTH5_DATA, PTH5_IN, PTH5_OUT),
-+	PINMUX_DATA(PTH4_DATA, PTH4_IN, PTH4_OUT),
-+	PINMUX_DATA(PTH3_DATA, PTH3_IN, PTH3_OUT),
-+	PINMUX_DATA(PTH2_DATA, PTH2_IN, PTH2_OUT),
-+	PINMUX_DATA(PTH1_DATA, PTH1_IN, PTH1_OUT),
-+	PINMUX_DATA(PTH0_DATA, PTH0_IN, PTH0_OUT),
- 
- 	/* PTJ GPIO */
- 	PINMUX_DATA(PTJ7_DATA, PTJ7_OUT),
- 	PINMUX_DATA(PTJ6_DATA, PTJ6_OUT),
- 	PINMUX_DATA(PTJ5_DATA, PTJ5_OUT),
--	PINMUX_DATA(PTJ3_DATA, PTJ3_IN, PTJ3_OUT, PTJ3_IN_PU),
--	PINMUX_DATA(PTJ2_DATA, PTJ2_IN, PTJ2_OUT, PTJ2_IN_PU),
--	PINMUX_DATA(PTJ1_DATA, PTJ1_IN, PTJ1_OUT, PTJ1_IN_PU),
--	PINMUX_DATA(PTJ0_DATA, PTJ0_IN, PTJ0_OUT, PTJ0_IN_PU),
-+	PINMUX_DATA(PTJ3_DATA, PTJ3_IN, PTJ3_OUT),
-+	PINMUX_DATA(PTJ2_DATA, PTJ2_IN, PTJ2_OUT),
-+	PINMUX_DATA(PTJ1_DATA, PTJ1_IN, PTJ1_OUT),
-+	PINMUX_DATA(PTJ0_DATA, PTJ0_IN, PTJ0_OUT),
- 
- 	/* PTK GPIO */
--	PINMUX_DATA(PTK7_DATA, PTK7_IN, PTK7_OUT, PTK7_IN_PU),
--	PINMUX_DATA(PTK6_DATA, PTK6_IN, PTK6_OUT, PTK6_IN_PU),
--	PINMUX_DATA(PTK5_DATA, PTK5_IN, PTK5_OUT, PTK5_IN_PU),
--	PINMUX_DATA(PTK4_DATA, PTK4_IN, PTK4_OUT, PTK4_IN_PU),
--	PINMUX_DATA(PTK3_DATA, PTK3_IN, PTK3_OUT, PTK3_IN_PU),
--	PINMUX_DATA(PTK2_DATA, PTK2_IN, PTK2_OUT, PTK2_IN_PU),
--	PINMUX_DATA(PTK1_DATA, PTK1_IN, PTK1_OUT, PTK1_IN_PU),
--	PINMUX_DATA(PTK0_DATA, PTK0_IN, PTK0_OUT, PTK0_IN_PU),
-+	PINMUX_DATA(PTK7_DATA, PTK7_IN, PTK7_OUT),
-+	PINMUX_DATA(PTK6_DATA, PTK6_IN, PTK6_OUT),
-+	PINMUX_DATA(PTK5_DATA, PTK5_IN, PTK5_OUT),
-+	PINMUX_DATA(PTK4_DATA, PTK4_IN, PTK4_OUT),
-+	PINMUX_DATA(PTK3_DATA, PTK3_IN, PTK3_OUT),
-+	PINMUX_DATA(PTK2_DATA, PTK2_IN, PTK2_OUT),
-+	PINMUX_DATA(PTK1_DATA, PTK1_IN, PTK1_OUT),
-+	PINMUX_DATA(PTK0_DATA, PTK0_IN, PTK0_OUT),
- 
- 	/* PTL GPIO */
--	PINMUX_DATA(PTL7_DATA, PTL7_IN, PTL7_OUT, PTL7_IN_PU),
--	PINMUX_DATA(PTL6_DATA, PTL6_IN, PTL6_OUT, PTL6_IN_PU),
--	PINMUX_DATA(PTL5_DATA, PTL5_IN, PTL5_OUT, PTL5_IN_PU),
--	PINMUX_DATA(PTL4_DATA, PTL4_IN, PTL4_OUT, PTL4_IN_PU),
--	PINMUX_DATA(PTL3_DATA, PTL3_IN, PTL3_OUT, PTL3_IN_PU),
--	PINMUX_DATA(PTL2_DATA, PTL2_IN, PTL2_OUT, PTL2_IN_PU),
--	PINMUX_DATA(PTL1_DATA, PTL1_IN, PTL1_OUT, PTL1_IN_PU),
--	PINMUX_DATA(PTL0_DATA, PTL0_IN, PTL0_OUT, PTL0_IN_PU),
-+	PINMUX_DATA(PTL7_DATA, PTL7_IN, PTL7_OUT),
-+	PINMUX_DATA(PTL6_DATA, PTL6_IN, PTL6_OUT),
-+	PINMUX_DATA(PTL5_DATA, PTL5_IN, PTL5_OUT),
-+	PINMUX_DATA(PTL4_DATA, PTL4_IN, PTL4_OUT),
-+	PINMUX_DATA(PTL3_DATA, PTL3_IN, PTL3_OUT),
-+	PINMUX_DATA(PTL2_DATA, PTL2_IN, PTL2_OUT),
-+	PINMUX_DATA(PTL1_DATA, PTL1_IN, PTL1_OUT),
-+	PINMUX_DATA(PTL0_DATA, PTL0_IN, PTL0_OUT),
- 
- 	/* PTM GPIO */
--	PINMUX_DATA(PTM7_DATA, PTM7_IN, PTM7_OUT, PTM7_IN_PU),
--	PINMUX_DATA(PTM6_DATA, PTM6_IN, PTM6_OUT, PTM6_IN_PU),
--	PINMUX_DATA(PTM5_DATA, PTM5_IN, PTM5_OUT, PTM5_IN_PU),
--	PINMUX_DATA(PTM4_DATA, PTM4_IN, PTM4_OUT, PTM4_IN_PU),
--	PINMUX_DATA(PTM3_DATA, PTM3_IN, PTM3_OUT, PTM3_IN_PU),
--	PINMUX_DATA(PTM2_DATA, PTM2_IN, PTM2_OUT, PTM2_IN_PU),
--	PINMUX_DATA(PTM1_DATA, PTM1_IN, PTM1_OUT, PTM1_IN_PU),
--	PINMUX_DATA(PTM0_DATA, PTM0_IN, PTM0_OUT, PTM0_IN_PU),
-+	PINMUX_DATA(PTM7_DATA, PTM7_IN, PTM7_OUT),
-+	PINMUX_DATA(PTM6_DATA, PTM6_IN, PTM6_OUT),
-+	PINMUX_DATA(PTM5_DATA, PTM5_IN, PTM5_OUT),
-+	PINMUX_DATA(PTM4_DATA, PTM4_IN, PTM4_OUT),
-+	PINMUX_DATA(PTM3_DATA, PTM3_IN, PTM3_OUT),
-+	PINMUX_DATA(PTM2_DATA, PTM2_IN, PTM2_OUT),
-+	PINMUX_DATA(PTM1_DATA, PTM1_IN, PTM1_OUT),
-+	PINMUX_DATA(PTM0_DATA, PTM0_IN, PTM0_OUT),
- 
- 	/* PTN GPIO */
--	PINMUX_DATA(PTN7_DATA, PTN7_IN, PTN7_OUT, PTN7_IN_PU),
--	PINMUX_DATA(PTN6_DATA, PTN6_IN, PTN6_OUT, PTN6_IN_PU),
--	PINMUX_DATA(PTN5_DATA, PTN5_IN, PTN5_OUT, PTN5_IN_PU),
--	PINMUX_DATA(PTN4_DATA, PTN4_IN, PTN4_OUT, PTN4_IN_PU),
--	PINMUX_DATA(PTN3_DATA, PTN3_IN, PTN3_OUT, PTN3_IN_PU),
--	PINMUX_DATA(PTN2_DATA, PTN2_IN, PTN2_OUT, PTN2_IN_PU),
--	PINMUX_DATA(PTN1_DATA, PTN1_IN, PTN1_OUT, PTN1_IN_PU),
--	PINMUX_DATA(PTN0_DATA, PTN0_IN, PTN0_OUT, PTN0_IN_PU),
-+	PINMUX_DATA(PTN7_DATA, PTN7_IN, PTN7_OUT),
-+	PINMUX_DATA(PTN6_DATA, PTN6_IN, PTN6_OUT),
-+	PINMUX_DATA(PTN5_DATA, PTN5_IN, PTN5_OUT),
-+	PINMUX_DATA(PTN4_DATA, PTN4_IN, PTN4_OUT),
-+	PINMUX_DATA(PTN3_DATA, PTN3_IN, PTN3_OUT),
-+	PINMUX_DATA(PTN2_DATA, PTN2_IN, PTN2_OUT),
-+	PINMUX_DATA(PTN1_DATA, PTN1_IN, PTN1_OUT),
-+	PINMUX_DATA(PTN0_DATA, PTN0_IN, PTN0_OUT),
- 
- 	/* PTQ GPIO */
--	PINMUX_DATA(PTQ7_DATA, PTQ7_IN, PTQ7_OUT, PTQ7_IN_PU),
--	PINMUX_DATA(PTQ6_DATA, PTQ6_IN, PTQ6_OUT, PTQ6_IN_PU),
--	PINMUX_DATA(PTQ5_DATA, PTQ5_IN, PTQ5_OUT, PTQ5_IN_PU),
--	PINMUX_DATA(PTQ4_DATA, PTQ4_IN, PTQ4_OUT, PTQ4_IN_PU),
--	PINMUX_DATA(PTQ3_DATA, PTQ3_IN, PTQ3_OUT, PTQ3_IN_PU),
--	PINMUX_DATA(PTQ2_DATA, PTQ2_IN, PTQ2_OUT, PTQ2_IN_PU),
--	PINMUX_DATA(PTQ1_DATA, PTQ1_IN, PTQ1_OUT, PTQ1_IN_PU),
--	PINMUX_DATA(PTQ0_DATA, PTQ0_IN, PTQ0_OUT, PTQ0_IN_PU),
-+	PINMUX_DATA(PTQ7_DATA, PTQ7_IN, PTQ7_OUT),
-+	PINMUX_DATA(PTQ6_DATA, PTQ6_IN, PTQ6_OUT),
-+	PINMUX_DATA(PTQ5_DATA, PTQ5_IN, PTQ5_OUT),
-+	PINMUX_DATA(PTQ4_DATA, PTQ4_IN, PTQ4_OUT),
-+	PINMUX_DATA(PTQ3_DATA, PTQ3_IN, PTQ3_OUT),
-+	PINMUX_DATA(PTQ2_DATA, PTQ2_IN, PTQ2_OUT),
-+	PINMUX_DATA(PTQ1_DATA, PTQ1_IN, PTQ1_OUT),
-+	PINMUX_DATA(PTQ0_DATA, PTQ0_IN, PTQ0_OUT),
- 
- 	/* PTR GPIO */
--	PINMUX_DATA(PTR7_DATA, PTR7_IN, PTR7_OUT, PTR7_IN_PU),
--	PINMUX_DATA(PTR6_DATA, PTR6_IN, PTR6_OUT, PTR6_IN_PU),
--	PINMUX_DATA(PTR5_DATA, PTR5_IN, PTR5_OUT, PTR5_IN_PU),
--	PINMUX_DATA(PTR4_DATA, PTR4_IN, PTR4_OUT, PTR4_IN_PU),
--	PINMUX_DATA(PTR3_DATA, PTR3_IN,           PTR3_IN_PU),
--	PINMUX_DATA(PTR2_DATA, PTR2_IN,           PTR2_IN_PU),
--	PINMUX_DATA(PTR1_DATA, PTR1_IN, PTR1_OUT, PTR1_IN_PU),
--	PINMUX_DATA(PTR0_DATA, PTR0_IN, PTR0_OUT, PTR0_IN_PU),
-+	PINMUX_DATA(PTR7_DATA, PTR7_IN, PTR7_OUT),
-+	PINMUX_DATA(PTR6_DATA, PTR6_IN, PTR6_OUT),
-+	PINMUX_DATA(PTR5_DATA, PTR5_IN, PTR5_OUT),
-+	PINMUX_DATA(PTR4_DATA, PTR4_IN, PTR4_OUT),
-+	PINMUX_DATA(PTR3_DATA, PTR3_IN),
-+	PINMUX_DATA(PTR2_DATA, PTR2_IN),
-+	PINMUX_DATA(PTR1_DATA, PTR1_IN, PTR1_OUT),
-+	PINMUX_DATA(PTR0_DATA, PTR0_IN, PTR0_OUT),
- 
- 	/* PTS GPIO */
--	PINMUX_DATA(PTS6_DATA, PTS6_IN, PTS6_OUT, PTS6_IN_PU),
--	PINMUX_DATA(PTS5_DATA, PTS5_IN, PTS5_OUT, PTS5_IN_PU),
--	PINMUX_DATA(PTS4_DATA, PTS4_IN, PTS4_OUT, PTS4_IN_PU),
--	PINMUX_DATA(PTS3_DATA, PTS3_IN, PTS3_OUT, PTS3_IN_PU),
--	PINMUX_DATA(PTS2_DATA, PTS2_IN, PTS2_OUT, PTS2_IN_PU),
--	PINMUX_DATA(PTS1_DATA, PTS1_IN, PTS1_OUT, PTS1_IN_PU),
--	PINMUX_DATA(PTS0_DATA, PTS0_IN, PTS0_OUT, PTS0_IN_PU),
-+	PINMUX_DATA(PTS6_DATA, PTS6_IN, PTS6_OUT),
-+	PINMUX_DATA(PTS5_DATA, PTS5_IN, PTS5_OUT),
-+	PINMUX_DATA(PTS4_DATA, PTS4_IN, PTS4_OUT),
-+	PINMUX_DATA(PTS3_DATA, PTS3_IN, PTS3_OUT),
-+	PINMUX_DATA(PTS2_DATA, PTS2_IN, PTS2_OUT),
-+	PINMUX_DATA(PTS1_DATA, PTS1_IN, PTS1_OUT),
-+	PINMUX_DATA(PTS0_DATA, PTS0_IN, PTS0_OUT),
- 
- 	/* PTT GPIO */
--	PINMUX_DATA(PTT7_DATA, PTT7_IN, PTT7_OUT, PTT7_IN_PU),
--	PINMUX_DATA(PTT6_DATA, PTT6_IN, PTT6_OUT, PTT6_IN_PU),
--	PINMUX_DATA(PTT5_DATA, PTT5_IN, PTT5_OUT, PTT5_IN_PU),
--	PINMUX_DATA(PTT4_DATA, PTT4_IN, PTT4_OUT, PTT4_IN_PU),
--	PINMUX_DATA(PTT3_DATA, PTT3_IN, PTT3_OUT, PTT3_IN_PU),
--	PINMUX_DATA(PTT2_DATA, PTT2_IN, PTT2_OUT, PTT2_IN_PU),
--	PINMUX_DATA(PTT1_DATA, PTT1_IN, PTT1_OUT, PTT1_IN_PU),
--	PINMUX_DATA(PTT0_DATA, PTT0_IN, PTT0_OUT, PTT0_IN_PU),
-+	PINMUX_DATA(PTT7_DATA, PTT7_IN, PTT7_OUT),
-+	PINMUX_DATA(PTT6_DATA, PTT6_IN, PTT6_OUT),
-+	PINMUX_DATA(PTT5_DATA, PTT5_IN, PTT5_OUT),
-+	PINMUX_DATA(PTT4_DATA, PTT4_IN, PTT4_OUT),
-+	PINMUX_DATA(PTT3_DATA, PTT3_IN, PTT3_OUT),
-+	PINMUX_DATA(PTT2_DATA, PTT2_IN, PTT2_OUT),
-+	PINMUX_DATA(PTT1_DATA, PTT1_IN, PTT1_OUT),
-+	PINMUX_DATA(PTT0_DATA, PTT0_IN, PTT0_OUT),
- 
- 	/* PTU GPIO */
--	PINMUX_DATA(PTU7_DATA, PTU7_IN, PTU7_OUT, PTU7_IN_PU),
--	PINMUX_DATA(PTU6_DATA, PTU6_IN, PTU6_OUT, PTU6_IN_PU),
--	PINMUX_DATA(PTU5_DATA, PTU5_IN, PTU5_OUT, PTU5_IN_PU),
--	PINMUX_DATA(PTU4_DATA, PTU4_IN, PTU4_OUT, PTU4_IN_PU),
--	PINMUX_DATA(PTU3_DATA, PTU3_IN, PTU3_OUT, PTU3_IN_PU),
--	PINMUX_DATA(PTU2_DATA, PTU2_IN, PTU2_OUT, PTU2_IN_PU),
--	PINMUX_DATA(PTU1_DATA, PTU1_IN, PTU1_OUT, PTU1_IN_PU),
--	PINMUX_DATA(PTU0_DATA, PTU0_IN, PTU0_OUT, PTU0_IN_PU),
-+	PINMUX_DATA(PTU7_DATA, PTU7_IN, PTU7_OUT),
-+	PINMUX_DATA(PTU6_DATA, PTU6_IN, PTU6_OUT),
-+	PINMUX_DATA(PTU5_DATA, PTU5_IN, PTU5_OUT),
-+	PINMUX_DATA(PTU4_DATA, PTU4_IN, PTU4_OUT),
-+	PINMUX_DATA(PTU3_DATA, PTU3_IN, PTU3_OUT),
-+	PINMUX_DATA(PTU2_DATA, PTU2_IN, PTU2_OUT),
-+	PINMUX_DATA(PTU1_DATA, PTU1_IN, PTU1_OUT),
-+	PINMUX_DATA(PTU0_DATA, PTU0_IN, PTU0_OUT),
- 
- 	/* PTV GPIO */
--	PINMUX_DATA(PTV7_DATA, PTV7_IN, PTV7_OUT, PTV7_IN_PU),
--	PINMUX_DATA(PTV6_DATA, PTV6_IN, PTV6_OUT, PTV6_IN_PU),
--	PINMUX_DATA(PTV5_DATA, PTV5_IN, PTV5_OUT, PTV5_IN_PU),
--	PINMUX_DATA(PTV4_DATA, PTV4_IN, PTV4_OUT, PTV4_IN_PU),
--	PINMUX_DATA(PTV3_DATA, PTV3_IN, PTV3_OUT, PTV3_IN_PU),
--	PINMUX_DATA(PTV2_DATA, PTV2_IN, PTV2_OUT, PTV2_IN_PU),
--	PINMUX_DATA(PTV1_DATA, PTV1_IN, PTV1_OUT, PTV1_IN_PU),
--	PINMUX_DATA(PTV0_DATA, PTV0_IN, PTV0_OUT, PTV0_IN_PU),
-+	PINMUX_DATA(PTV7_DATA, PTV7_IN, PTV7_OUT),
-+	PINMUX_DATA(PTV6_DATA, PTV6_IN, PTV6_OUT),
-+	PINMUX_DATA(PTV5_DATA, PTV5_IN, PTV5_OUT),
-+	PINMUX_DATA(PTV4_DATA, PTV4_IN, PTV4_OUT),
-+	PINMUX_DATA(PTV3_DATA, PTV3_IN, PTV3_OUT),
-+	PINMUX_DATA(PTV2_DATA, PTV2_IN, PTV2_OUT),
-+	PINMUX_DATA(PTV1_DATA, PTV1_IN, PTV1_OUT),
-+	PINMUX_DATA(PTV0_DATA, PTV0_IN, PTV0_OUT),
- 
- 	/* PTW GPIO */
--	PINMUX_DATA(PTW7_DATA, PTW7_IN, PTW7_OUT, PTW7_IN_PU),
--	PINMUX_DATA(PTW6_DATA, PTW6_IN, PTW6_OUT, PTW6_IN_PU),
--	PINMUX_DATA(PTW5_DATA, PTW5_IN, PTW5_OUT, PTW5_IN_PU),
--	PINMUX_DATA(PTW4_DATA, PTW4_IN, PTW4_OUT, PTW4_IN_PU),
--	PINMUX_DATA(PTW3_DATA, PTW3_IN, PTW3_OUT, PTW3_IN_PU),
--	PINMUX_DATA(PTW2_DATA, PTW2_IN, PTW2_OUT, PTW2_IN_PU),
--	PINMUX_DATA(PTW1_DATA, PTW1_IN, PTW1_OUT, PTW1_IN_PU),
--	PINMUX_DATA(PTW0_DATA, PTW0_IN, PTW0_OUT, PTW0_IN_PU),
-+	PINMUX_DATA(PTW7_DATA, PTW7_IN, PTW7_OUT),
-+	PINMUX_DATA(PTW6_DATA, PTW6_IN, PTW6_OUT),
-+	PINMUX_DATA(PTW5_DATA, PTW5_IN, PTW5_OUT),
-+	PINMUX_DATA(PTW4_DATA, PTW4_IN, PTW4_OUT),
-+	PINMUX_DATA(PTW3_DATA, PTW3_IN, PTW3_OUT),
-+	PINMUX_DATA(PTW2_DATA, PTW2_IN, PTW2_OUT),
-+	PINMUX_DATA(PTW1_DATA, PTW1_IN, PTW1_OUT),
-+	PINMUX_DATA(PTW0_DATA, PTW0_IN, PTW0_OUT),
- 
- 	/* PTX GPIO */
--	PINMUX_DATA(PTX7_DATA, PTX7_IN, PTX7_OUT, PTX7_IN_PU),
--	PINMUX_DATA(PTX6_DATA, PTX6_IN, PTX6_OUT, PTX6_IN_PU),
--	PINMUX_DATA(PTX5_DATA, PTX5_IN, PTX5_OUT, PTX5_IN_PU),
--	PINMUX_DATA(PTX4_DATA, PTX4_IN, PTX4_OUT, PTX4_IN_PU),
--	PINMUX_DATA(PTX3_DATA, PTX3_IN, PTX3_OUT, PTX3_IN_PU),
--	PINMUX_DATA(PTX2_DATA, PTX2_IN, PTX2_OUT, PTX2_IN_PU),
--	PINMUX_DATA(PTX1_DATA, PTX1_IN, PTX1_OUT, PTX1_IN_PU),
--	PINMUX_DATA(PTX0_DATA, PTX0_IN, PTX0_OUT, PTX0_IN_PU),
-+	PINMUX_DATA(PTX7_DATA, PTX7_IN, PTX7_OUT),
-+	PINMUX_DATA(PTX6_DATA, PTX6_IN, PTX6_OUT),
-+	PINMUX_DATA(PTX5_DATA, PTX5_IN, PTX5_OUT),
-+	PINMUX_DATA(PTX4_DATA, PTX4_IN, PTX4_OUT),
-+	PINMUX_DATA(PTX3_DATA, PTX3_IN, PTX3_OUT),
-+	PINMUX_DATA(PTX2_DATA, PTX2_IN, PTX2_OUT),
-+	PINMUX_DATA(PTX1_DATA, PTX1_IN, PTX1_OUT),
-+	PINMUX_DATA(PTX0_DATA, PTX0_IN, PTX0_OUT),
- 
- 	/* PTY GPIO */
--	PINMUX_DATA(PTY7_DATA, PTY7_IN, PTY7_OUT, PTY7_IN_PU),
--	PINMUX_DATA(PTY6_DATA, PTY6_IN, PTY6_OUT, PTY6_IN_PU),
--	PINMUX_DATA(PTY5_DATA, PTY5_IN, PTY5_OUT, PTY5_IN_PU),
--	PINMUX_DATA(PTY4_DATA, PTY4_IN, PTY4_OUT, PTY4_IN_PU),
--	PINMUX_DATA(PTY3_DATA, PTY3_IN, PTY3_OUT, PTY3_IN_PU),
--	PINMUX_DATA(PTY2_DATA, PTY2_IN, PTY2_OUT, PTY2_IN_PU),
--	PINMUX_DATA(PTY1_DATA, PTY1_IN, PTY1_OUT, PTY1_IN_PU),
--	PINMUX_DATA(PTY0_DATA, PTY0_IN, PTY0_OUT, PTY0_IN_PU),
-+	PINMUX_DATA(PTY7_DATA, PTY7_IN, PTY7_OUT),
-+	PINMUX_DATA(PTY6_DATA, PTY6_IN, PTY6_OUT),
-+	PINMUX_DATA(PTY5_DATA, PTY5_IN, PTY5_OUT),
-+	PINMUX_DATA(PTY4_DATA, PTY4_IN, PTY4_OUT),
-+	PINMUX_DATA(PTY3_DATA, PTY3_IN, PTY3_OUT),
-+	PINMUX_DATA(PTY2_DATA, PTY2_IN, PTY2_OUT),
-+	PINMUX_DATA(PTY1_DATA, PTY1_IN, PTY1_OUT),
-+	PINMUX_DATA(PTY0_DATA, PTY0_IN, PTY0_OUT),
- 
- 	/* PTZ GPIO */
--	PINMUX_DATA(PTZ7_DATA, PTZ7_IN, PTZ7_OUT, PTZ7_IN_PU),
--	PINMUX_DATA(PTZ6_DATA, PTZ6_IN, PTZ6_OUT, PTZ6_IN_PU),
--	PINMUX_DATA(PTZ5_DATA, PTZ5_IN, PTZ5_OUT, PTZ5_IN_PU),
--	PINMUX_DATA(PTZ4_DATA, PTZ4_IN, PTZ4_OUT, PTZ4_IN_PU),
--	PINMUX_DATA(PTZ3_DATA, PTZ3_IN, PTZ3_OUT, PTZ3_IN_PU),
--	PINMUX_DATA(PTZ2_DATA, PTZ2_IN, PTZ2_OUT, PTZ2_IN_PU),
--	PINMUX_DATA(PTZ1_DATA, PTZ1_IN, PTZ1_OUT, PTZ1_IN_PU),
--	PINMUX_DATA(PTZ0_DATA, PTZ0_IN, PTZ0_OUT, PTZ0_IN_PU),
-+	PINMUX_DATA(PTZ7_DATA, PTZ7_IN, PTZ7_OUT),
-+	PINMUX_DATA(PTZ6_DATA, PTZ6_IN, PTZ6_OUT),
-+	PINMUX_DATA(PTZ5_DATA, PTZ5_IN, PTZ5_OUT),
-+	PINMUX_DATA(PTZ4_DATA, PTZ4_IN, PTZ4_OUT),
-+	PINMUX_DATA(PTZ3_DATA, PTZ3_IN, PTZ3_OUT),
-+	PINMUX_DATA(PTZ2_DATA, PTZ2_IN, PTZ2_OUT),
-+	PINMUX_DATA(PTZ1_DATA, PTZ1_IN, PTZ1_OUT),
-+	PINMUX_DATA(PTZ0_DATA, PTZ0_IN, PTZ0_OUT),
- 
- 	/* PTA FN */
- 	PINMUX_DATA(D23_MARK,	PSA15_0, PSA14_0, PTA7_FN),
-@@ -1789,64 +1743,64 @@ static const struct pinmux_func pinmux_func_gpios[] = {
- 
- static const struct pinmux_cfg_reg pinmux_config_regs[] = {
- 	{ PINMUX_CFG_REG("PACR", 0xa4050100, 16, 2) {
--		PTA7_FN, PTA7_OUT, PTA7_IN_PU, PTA7_IN,
--		PTA6_FN, PTA6_OUT, PTA6_IN_PU, PTA6_IN,
--		PTA5_FN, PTA5_OUT, PTA5_IN_PU, PTA5_IN,
--		PTA4_FN, PTA4_OUT, PTA4_IN_PU, PTA4_IN,
--		PTA3_FN, PTA3_OUT, PTA3_IN_PU, PTA3_IN,
--		PTA2_FN, PTA2_OUT, PTA2_IN_PU, PTA2_IN,
--		PTA1_FN, PTA1_OUT, PTA1_IN_PU, PTA1_IN,
--		PTA0_FN, PTA0_OUT, PTA0_IN_PU, PTA0_IN }
-+		PTA7_FN, PTA7_OUT, 0, PTA7_IN,
-+		PTA6_FN, PTA6_OUT, 0, PTA6_IN,
-+		PTA5_FN, PTA5_OUT, 0, PTA5_IN,
-+		PTA4_FN, PTA4_OUT, 0, PTA4_IN,
-+		PTA3_FN, PTA3_OUT, 0, PTA3_IN,
-+		PTA2_FN, PTA2_OUT, 0, PTA2_IN,
-+		PTA1_FN, PTA1_OUT, 0, PTA1_IN,
-+		PTA0_FN, PTA0_OUT, 0, PTA0_IN }
- 	},
- 	{ PINMUX_CFG_REG("PBCR", 0xa4050102, 16, 2) {
--		PTB7_FN, PTB7_OUT, PTB7_IN_PU, PTB7_IN,
--		PTB6_FN, PTB6_OUT, PTB6_IN_PU, PTB6_IN,
--		PTB5_FN, PTB5_OUT, PTB5_IN_PU, PTB5_IN,
--		PTB4_FN, PTB4_OUT, PTB4_IN_PU, PTB4_IN,
--		PTB3_FN, PTB3_OUT, PTB3_IN_PU, PTB3_IN,
--		PTB2_FN, PTB2_OUT, PTB2_IN_PU, PTB2_IN,
--		PTB1_FN, PTB1_OUT, PTB1_IN_PU, PTB1_IN,
--		PTB0_FN, PTB0_OUT, PTB0_IN_PU, PTB0_IN }
-+		PTB7_FN, PTB7_OUT, 0, PTB7_IN,
-+		PTB6_FN, PTB6_OUT, 0, PTB6_IN,
-+		PTB5_FN, PTB5_OUT, 0, PTB5_IN,
-+		PTB4_FN, PTB4_OUT, 0, PTB4_IN,
-+		PTB3_FN, PTB3_OUT, 0, PTB3_IN,
-+		PTB2_FN, PTB2_OUT, 0, PTB2_IN,
-+		PTB1_FN, PTB1_OUT, 0, PTB1_IN,
-+		PTB0_FN, PTB0_OUT, 0, PTB0_IN }
- 	},
- 	{ PINMUX_CFG_REG("PCCR", 0xa4050104, 16, 2) {
--		PTC7_FN, PTC7_OUT, PTC7_IN_PU, PTC7_IN,
--		PTC6_FN, PTC6_OUT, PTC6_IN_PU, PTC6_IN,
--		PTC5_FN, PTC5_OUT, PTC5_IN_PU, PTC5_IN,
--		PTC4_FN, PTC4_OUT, PTC4_IN_PU, PTC4_IN,
--		PTC3_FN, PTC3_OUT, PTC3_IN_PU, PTC3_IN,
--		PTC2_FN, PTC2_OUT, PTC2_IN_PU, PTC2_IN,
--		PTC1_FN, PTC1_OUT, PTC1_IN_PU, PTC1_IN,
--		PTC0_FN, PTC0_OUT, PTC0_IN_PU, PTC0_IN }
-+		PTC7_FN, PTC7_OUT, 0, PTC7_IN,
-+		PTC6_FN, PTC6_OUT, 0, PTC6_IN,
-+		PTC5_FN, PTC5_OUT, 0, PTC5_IN,
-+		PTC4_FN, PTC4_OUT, 0, PTC4_IN,
-+		PTC3_FN, PTC3_OUT, 0, PTC3_IN,
-+		PTC2_FN, PTC2_OUT, 0, PTC2_IN,
-+		PTC1_FN, PTC1_OUT, 0, PTC1_IN,
-+		PTC0_FN, PTC0_OUT, 0, PTC0_IN }
- 	},
- 	{ PINMUX_CFG_REG("PDCR", 0xa4050106, 16, 2) {
--		PTD7_FN, PTD7_OUT, PTD7_IN_PU, PTD7_IN,
--		PTD6_FN, PTD6_OUT, PTD6_IN_PU, PTD6_IN,
--		PTD5_FN, PTD5_OUT, PTD5_IN_PU, PTD5_IN,
--		PTD4_FN, PTD4_OUT, PTD4_IN_PU, PTD4_IN,
--		PTD3_FN, PTD3_OUT, PTD3_IN_PU, PTD3_IN,
--		PTD2_FN, PTD2_OUT, PTD2_IN_PU, PTD2_IN,
--		PTD1_FN, PTD1_OUT, PTD1_IN_PU, PTD1_IN,
--		PTD0_FN, PTD0_OUT, PTD0_IN_PU, PTD0_IN }
-+		PTD7_FN, PTD7_OUT, 0, PTD7_IN,
-+		PTD6_FN, PTD6_OUT, 0, PTD6_IN,
-+		PTD5_FN, PTD5_OUT, 0, PTD5_IN,
-+		PTD4_FN, PTD4_OUT, 0, PTD4_IN,
-+		PTD3_FN, PTD3_OUT, 0, PTD3_IN,
-+		PTD2_FN, PTD2_OUT, 0, PTD2_IN,
-+		PTD1_FN, PTD1_OUT, 0, PTD1_IN,
-+		PTD0_FN, PTD0_OUT, 0, PTD0_IN }
- 	},
- 	{ PINMUX_CFG_REG("PECR", 0xa4050108, 16, 2) {
--		PTE7_FN, PTE7_OUT, PTE7_IN_PU, PTE7_IN,
--		PTE6_FN, PTE6_OUT, PTE6_IN_PU, PTE6_IN,
--		PTE5_FN, PTE5_OUT, PTE5_IN_PU, PTE5_IN,
--		PTE4_FN, PTE4_OUT, PTE4_IN_PU, PTE4_IN,
--		PTE3_FN, PTE3_OUT, PTE3_IN_PU, PTE3_IN,
--		PTE2_FN, PTE2_OUT, PTE2_IN_PU, PTE2_IN,
--		PTE1_FN, PTE1_OUT, PTE1_IN_PU, PTE1_IN,
--		PTE0_FN, PTE0_OUT, PTE0_IN_PU, PTE0_IN }
-+		PTE7_FN, PTE7_OUT, 0, PTE7_IN,
-+		PTE6_FN, PTE6_OUT, 0, PTE6_IN,
-+		PTE5_FN, PTE5_OUT, 0, PTE5_IN,
-+		PTE4_FN, PTE4_OUT, 0, PTE4_IN,
-+		PTE3_FN, PTE3_OUT, 0, PTE3_IN,
-+		PTE2_FN, PTE2_OUT, 0, PTE2_IN,
-+		PTE1_FN, PTE1_OUT, 0, PTE1_IN,
-+		PTE0_FN, PTE0_OUT, 0, PTE0_IN }
- 	},
- 	{ PINMUX_CFG_REG("PFCR", 0xa405010a, 16, 2) {
--		PTF7_FN, PTF7_OUT, PTF7_IN_PU, PTF7_IN,
--		PTF6_FN, PTF6_OUT, PTF6_IN_PU, PTF6_IN,
--		PTF5_FN, PTF5_OUT, PTF5_IN_PU, PTF5_IN,
--		PTF4_FN, PTF4_OUT, PTF4_IN_PU, PTF4_IN,
--		PTF3_FN, PTF3_OUT, PTF3_IN_PU, PTF3_IN,
--		PTF2_FN, PTF2_OUT, PTF2_IN_PU, PTF2_IN,
--		PTF1_FN, PTF1_OUT, PTF1_IN_PU, PTF1_IN,
--		PTF0_FN, PTF0_OUT, PTF0_IN_PU, PTF0_IN }
-+		PTF7_FN, PTF7_OUT, 0, PTF7_IN,
-+		PTF6_FN, PTF6_OUT, 0, PTF6_IN,
-+		PTF5_FN, PTF5_OUT, 0, PTF5_IN,
-+		PTF4_FN, PTF4_OUT, 0, PTF4_IN,
-+		PTF3_FN, PTF3_OUT, 0, PTF3_IN,
-+		PTF2_FN, PTF2_OUT, 0, PTF2_IN,
-+		PTF1_FN, PTF1_OUT, 0, PTF1_IN,
-+		PTF0_FN, PTF0_OUT, 0, PTF0_IN }
- 	},
- 	{ PINMUX_CFG_REG("PGCR", 0xa405010c, 16, 2) {
- 		0, 0, 0, 0,
-@@ -1859,164 +1813,164 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
- 		PTG0_FN, PTG0_OUT, 0, 0 }
- 	},
- 	{ PINMUX_CFG_REG("PHCR", 0xa405010e, 16, 2) {
--		PTH7_FN, PTH7_OUT, PTH7_IN_PU, PTH7_IN,
--		PTH6_FN, PTH6_OUT, PTH6_IN_PU, PTH6_IN,
--		PTH5_FN, PTH5_OUT, PTH5_IN_PU, PTH5_IN,
--		PTH4_FN, PTH4_OUT, PTH4_IN_PU, PTH4_IN,
--		PTH3_FN, PTH3_OUT, PTH3_IN_PU, PTH3_IN,
--		PTH2_FN, PTH2_OUT, PTH2_IN_PU, PTH2_IN,
--		PTH1_FN, PTH1_OUT, PTH1_IN_PU, PTH1_IN,
--		PTH0_FN, PTH0_OUT, PTH0_IN_PU, PTH0_IN }
-+		PTH7_FN, PTH7_OUT, 0, PTH7_IN,
-+		PTH6_FN, PTH6_OUT, 0, PTH6_IN,
-+		PTH5_FN, PTH5_OUT, 0, PTH5_IN,
-+		PTH4_FN, PTH4_OUT, 0, PTH4_IN,
-+		PTH3_FN, PTH3_OUT, 0, PTH3_IN,
-+		PTH2_FN, PTH2_OUT, 0, PTH2_IN,
-+		PTH1_FN, PTH1_OUT, 0, PTH1_IN,
-+		PTH0_FN, PTH0_OUT, 0, PTH0_IN }
- 	},
- 	{ PINMUX_CFG_REG("PJCR", 0xa4050110, 16, 2) {
- 		PTJ7_FN, PTJ7_OUT, 0, 0,
- 		PTJ6_FN, PTJ6_OUT, 0, 0,
- 		PTJ5_FN, PTJ5_OUT, 0, 0,
- 		0, 0, 0, 0,
--		PTJ3_FN, PTJ3_OUT, PTJ3_IN_PU, PTJ3_IN,
--		PTJ2_FN, PTJ2_OUT, PTJ2_IN_PU, PTJ2_IN,
--		PTJ1_FN, PTJ1_OUT, PTJ1_IN_PU, PTJ1_IN,
--		PTJ0_FN, PTJ0_OUT, PTJ0_IN_PU, PTJ0_IN }
-+		PTJ3_FN, PTJ3_OUT, 0, PTJ3_IN,
-+		PTJ2_FN, PTJ2_OUT, 0, PTJ2_IN,
-+		PTJ1_FN, PTJ1_OUT, 0, PTJ1_IN,
-+		PTJ0_FN, PTJ0_OUT, 0, PTJ0_IN }
- 	},
- 	{ PINMUX_CFG_REG("PKCR", 0xa4050112, 16, 2) {
--		PTK7_FN, PTK7_OUT, PTK7_IN_PU, PTK7_IN,
--		PTK6_FN, PTK6_OUT, PTK6_IN_PU, PTK6_IN,
--		PTK5_FN, PTK5_OUT, PTK5_IN_PU, PTK5_IN,
--		PTK4_FN, PTK4_OUT, PTK4_IN_PU, PTK4_IN,
--		PTK3_FN, PTK3_OUT, PTK3_IN_PU, PTK3_IN,
--		PTK2_FN, PTK2_OUT, PTK2_IN_PU, PTK2_IN,
--		PTK1_FN, PTK1_OUT, PTK1_IN_PU, PTK1_IN,
--		PTK0_FN, PTK0_OUT, PTK0_IN_PU, PTK0_IN }
-+		PTK7_FN, PTK7_OUT, 0, PTK7_IN,
-+		PTK6_FN, PTK6_OUT, 0, PTK6_IN,
-+		PTK5_FN, PTK5_OUT, 0, PTK5_IN,
-+		PTK4_FN, PTK4_OUT, 0, PTK4_IN,
-+		PTK3_FN, PTK3_OUT, 0, PTK3_IN,
-+		PTK2_FN, PTK2_OUT, 0, PTK2_IN,
-+		PTK1_FN, PTK1_OUT, 0, PTK1_IN,
-+		PTK0_FN, PTK0_OUT, 0, PTK0_IN }
- 	},
- 	{ PINMUX_CFG_REG("PLCR", 0xa4050114, 16, 2) {
--		PTL7_FN, PTL7_OUT, PTL7_IN_PU, PTL7_IN,
--		PTL6_FN, PTL6_OUT, PTL6_IN_PU, PTL6_IN,
--		PTL5_FN, PTL5_OUT, PTL5_IN_PU, PTL5_IN,
--		PTL4_FN, PTL4_OUT, PTL4_IN_PU, PTL4_IN,
--		PTL3_FN, PTL3_OUT, PTL3_IN_PU, PTL3_IN,
--		PTL2_FN, PTL2_OUT, PTL2_IN_PU, PTL2_IN,
--		PTL1_FN, PTL1_OUT, PTL1_IN_PU, PTL1_IN,
--		PTL0_FN, PTL0_OUT, PTL0_IN_PU, PTL0_IN }
-+		PTL7_FN, PTL7_OUT, 0, PTL7_IN,
-+		PTL6_FN, PTL6_OUT, 0, PTL6_IN,
-+		PTL5_FN, PTL5_OUT, 0, PTL5_IN,
-+		PTL4_FN, PTL4_OUT, 0, PTL4_IN,
-+		PTL3_FN, PTL3_OUT, 0, PTL3_IN,
-+		PTL2_FN, PTL2_OUT, 0, PTL2_IN,
-+		PTL1_FN, PTL1_OUT, 0, PTL1_IN,
-+		PTL0_FN, PTL0_OUT, 0, PTL0_IN }
- 	},
- 	{ PINMUX_CFG_REG("PMCR", 0xa4050116, 16, 2) {
--		PTM7_FN, PTM7_OUT, PTM7_IN_PU, PTM7_IN,
--		PTM6_FN, PTM6_OUT, PTM6_IN_PU, PTM6_IN,
--		PTM5_FN, PTM5_OUT, PTM5_IN_PU, PTM5_IN,
--		PTM4_FN, PTM4_OUT, PTM4_IN_PU, PTM4_IN,
--		PTM3_FN, PTM3_OUT, PTM3_IN_PU, PTM3_IN,
--		PTM2_FN, PTM2_OUT, PTM2_IN_PU, PTM2_IN,
--		PTM1_FN, PTM1_OUT, PTM1_IN_PU, PTM1_IN,
--		PTM0_FN, PTM0_OUT, PTM0_IN_PU, PTM0_IN }
-+		PTM7_FN, PTM7_OUT, 0, PTM7_IN,
-+		PTM6_FN, PTM6_OUT, 0, PTM6_IN,
-+		PTM5_FN, PTM5_OUT, 0, PTM5_IN,
-+		PTM4_FN, PTM4_OUT, 0, PTM4_IN,
-+		PTM3_FN, PTM3_OUT, 0, PTM3_IN,
-+		PTM2_FN, PTM2_OUT, 0, PTM2_IN,
-+		PTM1_FN, PTM1_OUT, 0, PTM1_IN,
-+		PTM0_FN, PTM0_OUT, 0, PTM0_IN }
- 	},
- 	{ PINMUX_CFG_REG("PNCR", 0xa4050118, 16, 2) {
--		PTN7_FN, PTN7_OUT, PTN7_IN_PU, PTN7_IN,
--		PTN6_FN, PTN6_OUT, PTN6_IN_PU, PTN6_IN,
--		PTN5_FN, PTN5_OUT, PTN5_IN_PU, PTN5_IN,
--		PTN4_FN, PTN4_OUT, PTN4_IN_PU, PTN4_IN,
--		PTN3_FN, PTN3_OUT, PTN3_IN_PU, PTN3_IN,
--		PTN2_FN, PTN2_OUT, PTN2_IN_PU, PTN2_IN,
--		PTN1_FN, PTN1_OUT, PTN1_IN_PU, PTN1_IN,
--		PTN0_FN, PTN0_OUT, PTN0_IN_PU, PTN0_IN }
-+		PTN7_FN, PTN7_OUT, 0, PTN7_IN,
-+		PTN6_FN, PTN6_OUT, 0, PTN6_IN,
-+		PTN5_FN, PTN5_OUT, 0, PTN5_IN,
-+		PTN4_FN, PTN4_OUT, 0, PTN4_IN,
-+		PTN3_FN, PTN3_OUT, 0, PTN3_IN,
-+		PTN2_FN, PTN2_OUT, 0, PTN2_IN,
-+		PTN1_FN, PTN1_OUT, 0, PTN1_IN,
-+		PTN0_FN, PTN0_OUT, 0, PTN0_IN }
- 	},
- 	{ PINMUX_CFG_REG("PQCR", 0xa405011a, 16, 2) {
--		PTQ7_FN, PTQ7_OUT, PTQ7_IN_PU, PTQ7_IN,
--		PTQ6_FN, PTQ6_OUT, PTQ6_IN_PU, PTQ6_IN,
--		PTQ5_FN, PTQ5_OUT, PTQ5_IN_PU, PTQ5_IN,
--		PTQ4_FN, PTQ4_OUT, PTQ4_IN_PU, PTQ4_IN,
--		PTQ3_FN, PTQ3_OUT, PTQ3_IN_PU, PTQ3_IN,
--		PTQ2_FN, PTQ2_OUT, PTQ2_IN_PU, PTQ2_IN,
--		PTQ1_FN, PTQ1_OUT, PTQ1_IN_PU, PTQ1_IN,
--		PTQ0_FN, PTQ0_OUT, PTQ0_IN_PU, PTQ0_IN }
-+		PTQ7_FN, PTQ7_OUT, 0, PTQ7_IN,
-+		PTQ6_FN, PTQ6_OUT, 0, PTQ6_IN,
-+		PTQ5_FN, PTQ5_OUT, 0, PTQ5_IN,
-+		PTQ4_FN, PTQ4_OUT, 0, PTQ4_IN,
-+		PTQ3_FN, PTQ3_OUT, 0, PTQ3_IN,
-+		PTQ2_FN, PTQ2_OUT, 0, PTQ2_IN,
-+		PTQ1_FN, PTQ1_OUT, 0, PTQ1_IN,
-+		PTQ0_FN, PTQ0_OUT, 0, PTQ0_IN }
- 	},
- 	{ PINMUX_CFG_REG("PRCR", 0xa405011c, 16, 2) {
--		PTR7_FN, PTR7_OUT, PTR7_IN_PU, PTR7_IN,
--		PTR6_FN, PTR6_OUT, PTR6_IN_PU, PTR6_IN,
--		PTR5_FN, PTR5_OUT, PTR5_IN_PU, PTR5_IN,
--		PTR4_FN, PTR4_OUT, PTR4_IN_PU, PTR4_IN,
--		PTR3_FN, 0,        PTR3_IN_PU, PTR3_IN,
--		PTR2_FN, 0,        PTR2_IN_PU, PTR2_IN,
--		PTR1_FN, PTR1_OUT, PTR1_IN_PU, PTR1_IN,
--		PTR0_FN, PTR0_OUT, PTR0_IN_PU, PTR0_IN }
-+		PTR7_FN, PTR7_OUT, 0, PTR7_IN,
-+		PTR6_FN, PTR6_OUT, 0, PTR6_IN,
-+		PTR5_FN, PTR5_OUT, 0, PTR5_IN,
-+		PTR4_FN, PTR4_OUT, 0, PTR4_IN,
-+		PTR3_FN, 0,        0, PTR3_IN,
-+		PTR2_FN, 0,        0, PTR2_IN,
-+		PTR1_FN, PTR1_OUT, 0, PTR1_IN,
-+		PTR0_FN, PTR0_OUT, 0, PTR0_IN }
- 	},
- 	{ PINMUX_CFG_REG("PSCR", 0xa405011e, 16, 2) {
- 		0, 0, 0, 0,
--		PTS6_FN, PTS6_OUT, PTS6_IN_PU, PTS6_IN,
--		PTS5_FN, PTS5_OUT, PTS5_IN_PU, PTS5_IN,
--		PTS4_FN, PTS4_OUT, PTS4_IN_PU, PTS4_IN,
--		PTS3_FN, PTS3_OUT, PTS3_IN_PU, PTS3_IN,
--		PTS2_FN, PTS2_OUT, PTS2_IN_PU, PTS2_IN,
--		PTS1_FN, PTS1_OUT, PTS1_IN_PU, PTS1_IN,
--		PTS0_FN, PTS0_OUT, PTS0_IN_PU, PTS0_IN }
-+		PTS6_FN, PTS6_OUT, 0, PTS6_IN,
-+		PTS5_FN, PTS5_OUT, 0, PTS5_IN,
-+		PTS4_FN, PTS4_OUT, 0, PTS4_IN,
-+		PTS3_FN, PTS3_OUT, 0, PTS3_IN,
-+		PTS2_FN, PTS2_OUT, 0, PTS2_IN,
-+		PTS1_FN, PTS1_OUT, 0, PTS1_IN,
-+		PTS0_FN, PTS0_OUT, 0, PTS0_IN }
- 	},
- 	{ PINMUX_CFG_REG("PTCR", 0xa4050140, 16, 2) {
--		PTT7_FN, PTT7_OUT, PTT7_IN_PU, PTT7_IN,
--		PTT6_FN, PTT6_OUT, PTT6_IN_PU, PTT6_IN,
--		PTT5_FN, PTT5_OUT, PTT5_IN_PU, PTT5_IN,
--		PTT4_FN, PTT4_OUT, PTT4_IN_PU, PTT4_IN,
--		PTT3_FN, PTT3_OUT, PTT3_IN_PU, PTT3_IN,
--		PTT2_FN, PTT2_OUT, PTT2_IN_PU, PTT2_IN,
--		PTT1_FN, PTT1_OUT, PTT1_IN_PU, PTT1_IN,
--		PTT0_FN, PTT0_OUT, PTT0_IN_PU, PTT0_IN }
-+		PTT7_FN, PTT7_OUT, 0, PTT7_IN,
-+		PTT6_FN, PTT6_OUT, 0, PTT6_IN,
-+		PTT5_FN, PTT5_OUT, 0, PTT5_IN,
-+		PTT4_FN, PTT4_OUT, 0, PTT4_IN,
-+		PTT3_FN, PTT3_OUT, 0, PTT3_IN,
-+		PTT2_FN, PTT2_OUT, 0, PTT2_IN,
-+		PTT1_FN, PTT1_OUT, 0, PTT1_IN,
-+		PTT0_FN, PTT0_OUT, 0, PTT0_IN }
- 	},
- 	{ PINMUX_CFG_REG("PUCR", 0xa4050142, 16, 2) {
--		PTU7_FN, PTU7_OUT, PTU7_IN_PU, PTU7_IN,
--		PTU6_FN, PTU6_OUT, PTU6_IN_PU, PTU6_IN,
--		PTU5_FN, PTU5_OUT, PTU5_IN_PU, PTU5_IN,
--		PTU4_FN, PTU4_OUT, PTU4_IN_PU, PTU4_IN,
--		PTU3_FN, PTU3_OUT, PTU3_IN_PU, PTU3_IN,
--		PTU2_FN, PTU2_OUT, PTU2_IN_PU, PTU2_IN,
--		PTU1_FN, PTU1_OUT, PTU1_IN_PU, PTU1_IN,
--		PTU0_FN, PTU0_OUT, PTU0_IN_PU, PTU0_IN }
-+		PTU7_FN, PTU7_OUT, 0, PTU7_IN,
-+		PTU6_FN, PTU6_OUT, 0, PTU6_IN,
-+		PTU5_FN, PTU5_OUT, 0, PTU5_IN,
-+		PTU4_FN, PTU4_OUT, 0, PTU4_IN,
-+		PTU3_FN, PTU3_OUT, 0, PTU3_IN,
-+		PTU2_FN, PTU2_OUT, 0, PTU2_IN,
-+		PTU1_FN, PTU1_OUT, 0, PTU1_IN,
-+		PTU0_FN, PTU0_OUT, 0, PTU0_IN }
- 	},
- 	{ PINMUX_CFG_REG("PVCR", 0xa4050144, 16, 2) {
--		PTV7_FN, PTV7_OUT, PTV7_IN_PU, PTV7_IN,
--		PTV6_FN, PTV6_OUT, PTV6_IN_PU, PTV6_IN,
--		PTV5_FN, PTV5_OUT, PTV5_IN_PU, PTV5_IN,
--		PTV4_FN, PTV4_OUT, PTV4_IN_PU, PTV4_IN,
--		PTV3_FN, PTV3_OUT, PTV3_IN_PU, PTV3_IN,
--		PTV2_FN, PTV2_OUT, PTV2_IN_PU, PTV2_IN,
--		PTV1_FN, PTV1_OUT, PTV1_IN_PU, PTV1_IN,
--		PTV0_FN, PTV0_OUT, PTV0_IN_PU, PTV0_IN }
-+		PTV7_FN, PTV7_OUT, 0, PTV7_IN,
-+		PTV6_FN, PTV6_OUT, 0, PTV6_IN,
-+		PTV5_FN, PTV5_OUT, 0, PTV5_IN,
-+		PTV4_FN, PTV4_OUT, 0, PTV4_IN,
-+		PTV3_FN, PTV3_OUT, 0, PTV3_IN,
-+		PTV2_FN, PTV2_OUT, 0, PTV2_IN,
-+		PTV1_FN, PTV1_OUT, 0, PTV1_IN,
-+		PTV0_FN, PTV0_OUT, 0, PTV0_IN }
- 	},
- 	{ PINMUX_CFG_REG("PWCR", 0xa4050146, 16, 2) {
--		PTW7_FN, PTW7_OUT, PTW7_IN_PU, PTW7_IN,
--		PTW6_FN, PTW6_OUT, PTW6_IN_PU, PTW6_IN,
--		PTW5_FN, PTW5_OUT, PTW5_IN_PU, PTW5_IN,
--		PTW4_FN, PTW4_OUT, PTW4_IN_PU, PTW4_IN,
--		PTW3_FN, PTW3_OUT, PTW3_IN_PU, PTW3_IN,
--		PTW2_FN, PTW2_OUT, PTW2_IN_PU, PTW2_IN,
--		PTW1_FN, PTW1_OUT, PTW1_IN_PU, PTW1_IN,
--		PTW0_FN, PTW0_OUT, PTW0_IN_PU, PTW0_IN }
-+		PTW7_FN, PTW7_OUT, 0, PTW7_IN,
-+		PTW6_FN, PTW6_OUT, 0, PTW6_IN,
-+		PTW5_FN, PTW5_OUT, 0, PTW5_IN,
-+		PTW4_FN, PTW4_OUT, 0, PTW4_IN,
-+		PTW3_FN, PTW3_OUT, 0, PTW3_IN,
-+		PTW2_FN, PTW2_OUT, 0, PTW2_IN,
-+		PTW1_FN, PTW1_OUT, 0, PTW1_IN,
-+		PTW0_FN, PTW0_OUT, 0, PTW0_IN }
- 	},
- 	{ PINMUX_CFG_REG("PXCR", 0xa4050148, 16, 2) {
--		PTX7_FN, PTX7_OUT, PTX7_IN_PU, PTX7_IN,
--		PTX6_FN, PTX6_OUT, PTX6_IN_PU, PTX6_IN,
--		PTX5_FN, PTX5_OUT, PTX5_IN_PU, PTX5_IN,
--		PTX4_FN, PTX4_OUT, PTX4_IN_PU, PTX4_IN,
--		PTX3_FN, PTX3_OUT, PTX3_IN_PU, PTX3_IN,
--		PTX2_FN, PTX2_OUT, PTX2_IN_PU, PTX2_IN,
--		PTX1_FN, PTX1_OUT, PTX1_IN_PU, PTX1_IN,
--		PTX0_FN, PTX0_OUT, PTX0_IN_PU, PTX0_IN }
-+		PTX7_FN, PTX7_OUT, 0, PTX7_IN,
-+		PTX6_FN, PTX6_OUT, 0, PTX6_IN,
-+		PTX5_FN, PTX5_OUT, 0, PTX5_IN,
-+		PTX4_FN, PTX4_OUT, 0, PTX4_IN,
-+		PTX3_FN, PTX3_OUT, 0, PTX3_IN,
-+		PTX2_FN, PTX2_OUT, 0, PTX2_IN,
-+		PTX1_FN, PTX1_OUT, 0, PTX1_IN,
-+		PTX0_FN, PTX0_OUT, 0, PTX0_IN }
- 	},
- 	{ PINMUX_CFG_REG("PYCR", 0xa405014a, 16, 2) {
--		PTY7_FN, PTY7_OUT, PTY7_IN_PU, PTY7_IN,
--		PTY6_FN, PTY6_OUT, PTY6_IN_PU, PTY6_IN,
--		PTY5_FN, PTY5_OUT, PTY5_IN_PU, PTY5_IN,
--		PTY4_FN, PTY4_OUT, PTY4_IN_PU, PTY4_IN,
--		PTY3_FN, PTY3_OUT, PTY3_IN_PU, PTY3_IN,
--		PTY2_FN, PTY2_OUT, PTY2_IN_PU, PTY2_IN,
--		PTY1_FN, PTY1_OUT, PTY1_IN_PU, PTY1_IN,
--		PTY0_FN, PTY0_OUT, PTY0_IN_PU, PTY0_IN }
-+		PTY7_FN, PTY7_OUT, 0, PTY7_IN,
-+		PTY6_FN, PTY6_OUT, 0, PTY6_IN,
-+		PTY5_FN, PTY5_OUT, 0, PTY5_IN,
-+		PTY4_FN, PTY4_OUT, 0, PTY4_IN,
-+		PTY3_FN, PTY3_OUT, 0, PTY3_IN,
-+		PTY2_FN, PTY2_OUT, 0, PTY2_IN,
-+		PTY1_FN, PTY1_OUT, 0, PTY1_IN,
-+		PTY0_FN, PTY0_OUT, 0, PTY0_IN }
- 	},
- 	{ PINMUX_CFG_REG("PZCR", 0xa405014c, 16, 2) {
--		PTZ7_FN, PTZ7_OUT, PTZ7_IN_PU, PTZ7_IN,
--		PTZ6_FN, PTZ6_OUT, PTZ6_IN_PU, PTZ6_IN,
--		PTZ5_FN, PTZ5_OUT, PTZ5_IN_PU, PTZ5_IN,
--		PTZ4_FN, PTZ4_OUT, PTZ4_IN_PU, PTZ4_IN,
--		PTZ3_FN, PTZ3_OUT, PTZ3_IN_PU, PTZ3_IN,
--		PTZ2_FN, PTZ2_OUT, PTZ2_IN_PU, PTZ2_IN,
--		PTZ1_FN, PTZ1_OUT, PTZ1_IN_PU, PTZ1_IN,
--		PTZ0_FN, PTZ0_OUT, PTZ0_IN_PU, PTZ0_IN }
-+		PTZ7_FN, PTZ7_OUT, 0, PTZ7_IN,
-+		PTZ6_FN, PTZ6_OUT, 0, PTZ6_IN,
-+		PTZ5_FN, PTZ5_OUT, 0, PTZ5_IN,
-+		PTZ4_FN, PTZ4_OUT, 0, PTZ4_IN,
-+		PTZ3_FN, PTZ3_OUT, 0, PTZ3_IN,
-+		PTZ2_FN, PTZ2_OUT, 0, PTZ2_IN,
-+		PTZ1_FN, PTZ1_OUT, 0, PTZ1_IN,
-+		PTZ0_FN, PTZ0_OUT, 0, PTZ0_IN }
- 	},
- 	{ PINMUX_CFG_REG("PSELA", 0xa405014e, 16, 1) {
- 		PSA15_0, PSA15_1,
-@@ -2210,7 +2164,6 @@ static const struct pinmux_data_reg pinmux_data_regs[] = {
- const struct sh_pfc_soc_info sh7724_pinmux_info = {
- 	.name = "sh7724_pfc",
- 	.input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
--	.input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END },
- 	.output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
- 	.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0532-sh-pfc-sh7757-Remove-unused-input_pu-range.patch b/patches.renesas/0532-sh-pfc-sh7757-Remove-unused-input_pu-range.patch
deleted file mode 100644
index c4a649c9c90e7..0000000000000
--- a/patches.renesas/0532-sh-pfc-sh7757-Remove-unused-input_pu-range.patch
+++ /dev/null
@@ -1,411 +0,0 @@
-From 2fc345b3b8a83f8853ab1048db7259ab90b4d083 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 16 Jul 2013 01:54:13 +0200
-Subject: sh-pfc: sh7757: Remove unused input_pu range
-
-The PFC SH7757 SoC data contains a input_pu range used to configure
-pull-up resistors using the legacy non-pinconf API. That API has been
-removed from the driver, the range is thus not used anymore. Remove it.
-
-If required, configuring pull-up resistors for the SH7757 can be
-implemented using the pinconf API, as done for the SH-Mobile, R-Mobile
-and R-Car platforms.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit 5f86072afb29519deb3f14bee52ccc6e3f997991)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-sh7757.c | 299 ++++++++++++++++--------------------
- 1 file changed, 129 insertions(+), 170 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7757.c b/drivers/pinctrl/sh-pfc/pfc-sh7757.c
-index e074230e..d974b085 100644
---- a/drivers/pinctrl/sh-pfc/pfc-sh7757.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-sh7757.c
-@@ -132,46 +132,6 @@ enum {
- 	PTZ3_IN, PTZ2_IN, PTZ1_IN, PTZ0_IN,
- 	PINMUX_INPUT_END,
- 
--	PINMUX_INPUT_PULLUP_BEGIN,
--	PTA7_IN_PU, PTA6_IN_PU, PTA5_IN_PU, PTA4_IN_PU,
--	PTA3_IN_PU, PTA2_IN_PU, PTA1_IN_PU, PTA0_IN_PU,
--	PTD7_IN_PU, PTD6_IN_PU, PTD5_IN_PU, PTD4_IN_PU,
--	PTD3_IN_PU, PTD2_IN_PU, PTD1_IN_PU, PTD0_IN_PU,
--	PTE7_IN_PU, PTE6_IN_PU, PTE5_IN_PU, PTE4_IN_PU,
--	PTE3_IN_PU, PTE2_IN_PU, PTE1_IN_PU, PTE0_IN_PU,
--	PTF7_IN_PU, PTF6_IN_PU, PTF5_IN_PU, PTF4_IN_PU,
--	PTF3_IN_PU, PTF2_IN_PU, PTF1_IN_PU, PTF0_IN_PU,
--	PTG7_IN_PU, PTG6_IN_PU,		    PTG4_IN_PU,
--	PTH7_IN_PU, PTH6_IN_PU, PTH5_IN_PU, PTH4_IN_PU,
--	PTH3_IN_PU, PTH2_IN_PU, PTH1_IN_PU, PTH0_IN_PU,
--	PTI7_IN_PU, PTI6_IN_PU,		    PTI4_IN_PU,
--	PTI3_IN_PU, PTI2_IN_PU, PTI1_IN_PU, PTI0_IN_PU,
--		    PTJ6_IN_PU, PTJ5_IN_PU, PTJ4_IN_PU,
--	PTJ3_IN_PU, PTJ2_IN_PU, PTJ1_IN_PU, PTJ0_IN_PU,
--	PTK7_IN_PU, PTK6_IN_PU, PTK5_IN_PU, PTK4_IN_PU,
--	PTK3_IN_PU, PTK2_IN_PU, PTK1_IN_PU, PTK0_IN_PU,
--		    PTL6_IN_PU, PTL5_IN_PU, PTL4_IN_PU,
--	PTL3_IN_PU, PTL2_IN_PU, PTL1_IN_PU, PTL0_IN_PU,
--	PTM7_IN_PU, PTM6_IN_PU, PTM5_IN_PU, PTM4_IN_PU,
--					    PTN4_IN_PU,
--	PTN3_IN_PU, PTN2_IN_PU, PTN1_IN_PU, PTN0_IN_PU,
--	PTO7_IN_PU, PTO6_IN_PU, PTO5_IN_PU, PTO4_IN_PU,
--	PTO3_IN_PU, PTO2_IN_PU, PTO1_IN_PU, PTO0_IN_PU,
--	PTT7_IN_PU, PTT6_IN_PU, PTT5_IN_PU, PTT4_IN_PU,
--	PTT3_IN_PU, PTT2_IN_PU, PTT1_IN_PU, PTT0_IN_PU,
--	PTU7_IN_PU, PTU6_IN_PU, PTU5_IN_PU, PTU4_IN_PU,
--	PTU3_IN_PU, PTU2_IN_PU, PTU1_IN_PU, PTU0_IN_PU,
--	PTV7_IN_PU, PTV6_IN_PU, PTV5_IN_PU, PTV4_IN_PU,
--	PTV3_IN_PU, PTV2_IN_PU,
--				PTW1_IN_PU, PTW0_IN_PU,
--	PTX7_IN_PU, PTX6_IN_PU, PTX5_IN_PU, PTX4_IN_PU,
--	PTX3_IN_PU, PTX2_IN_PU, PTX1_IN_PU, PTX0_IN_PU,
--	PTY7_IN_PU, PTY6_IN_PU, PTY5_IN_PU, PTY4_IN_PU,
--	PTY3_IN_PU, PTY2_IN_PU, PTY1_IN_PU, PTY0_IN_PU,
--	PTZ7_IN_PU, PTZ6_IN_PU, PTZ5_IN_PU, PTZ4_IN_PU,
--	PTZ3_IN_PU, PTZ2_IN_PU, PTZ1_IN_PU, PTZ0_IN_PU,
--	PINMUX_INPUT_PULLUP_END,
--
- 	PINMUX_OUTPUT_BEGIN,
- 	PTA7_OUT, PTA6_OUT, PTA5_OUT, PTA4_OUT,
- 	PTA3_OUT, PTA2_OUT, PTA1_OUT, PTA0_OUT,
-@@ -1728,14 +1688,14 @@ static const struct pinmux_func pinmux_func_gpios[] = {
- 
- static const struct pinmux_cfg_reg pinmux_config_regs[] = {
- 	{ PINMUX_CFG_REG("PACR", 0xffec0000, 16, 2) {
--		PTA7_FN, PTA7_OUT, PTA7_IN, PTA7_IN_PU,
--		PTA6_FN, PTA6_OUT, PTA6_IN, PTA6_IN_PU,
--		PTA5_FN, PTA5_OUT, PTA5_IN, PTA5_IN_PU,
--		PTA4_FN, PTA4_OUT, PTA4_IN, PTA4_IN_PU,
--		PTA3_FN, PTA3_OUT, PTA3_IN, PTA3_IN_PU,
--		PTA2_FN, PTA2_OUT, PTA2_IN, PTA2_IN_PU,
--		PTA1_FN, PTA1_OUT, PTA1_IN, PTA1_IN_PU,
--		PTA0_FN, PTA0_OUT, PTA0_IN, PTA0_IN_PU }
-+		PTA7_FN, PTA7_OUT, PTA7_IN, 0,
-+		PTA6_FN, PTA6_OUT, PTA6_IN, 0,
-+		PTA5_FN, PTA5_OUT, PTA5_IN, 0,
-+		PTA4_FN, PTA4_OUT, PTA4_IN, 0,
-+		PTA3_FN, PTA3_OUT, PTA3_IN, 0,
-+		PTA2_FN, PTA2_OUT, PTA2_IN, 0,
-+		PTA1_FN, PTA1_OUT, PTA1_IN, 0,
-+		PTA0_FN, PTA0_OUT, PTA0_IN, 0 }
- 	},
- 	{ PINMUX_CFG_REG("PBCR", 0xffec0002, 16, 2) {
- 		PTB7_FN, PTB7_OUT, PTB7_IN, 0,
-@@ -1758,100 +1718,100 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
- 		PTC0_FN, PTC0_OUT, PTC0_IN, 0 }
- 	},
- 	{ PINMUX_CFG_REG("PDCR", 0xffec0006, 16, 2) {
--		PTD7_FN, PTD7_OUT, PTD7_IN, PTD7_IN_PU,
--		PTD6_FN, PTD6_OUT, PTD6_IN, PTD6_IN_PU,
--		PTD5_FN, PTD5_OUT, PTD5_IN, PTD5_IN_PU,
--		PTD4_FN, PTD4_OUT, PTD4_IN, PTD4_IN_PU,
--		PTD3_FN, PTD3_OUT, PTD3_IN, PTD3_IN_PU,
--		PTD2_FN, PTD2_OUT, PTD2_IN, PTD2_IN_PU,
--		PTD1_FN, PTD1_OUT, PTD1_IN, PTD1_IN_PU,
--		PTD0_FN, PTD0_OUT, PTD0_IN, PTD0_IN_PU }
-+		PTD7_FN, PTD7_OUT, PTD7_IN, 0,
-+		PTD6_FN, PTD6_OUT, PTD6_IN, 0,
-+		PTD5_FN, PTD5_OUT, PTD5_IN, 0,
-+		PTD4_FN, PTD4_OUT, PTD4_IN, 0,
-+		PTD3_FN, PTD3_OUT, PTD3_IN, 0,
-+		PTD2_FN, PTD2_OUT, PTD2_IN, 0,
-+		PTD1_FN, PTD1_OUT, PTD1_IN, 0,
-+		PTD0_FN, PTD0_OUT, PTD0_IN, 0 }
- 	},
- 	{ PINMUX_CFG_REG("PECR", 0xffec0008, 16, 2) {
--		PTE7_FN, PTE7_OUT, PTE7_IN, PTE7_IN_PU,
--		PTE6_FN, PTE6_OUT, PTE6_IN, PTE6_IN_PU,
--		PTE5_FN, PTE5_OUT, PTE5_IN, PTE5_IN_PU,
--		PTE4_FN, PTE4_OUT, PTE4_IN, PTE4_IN_PU,
--		PTE3_FN, PTE3_OUT, PTE3_IN, PTE3_IN_PU,
--		PTE2_FN, PTE2_OUT, PTE2_IN, PTE2_IN_PU,
--		PTE1_FN, PTE1_OUT, PTE1_IN, PTE1_IN_PU,
--		PTE0_FN, PTE0_OUT, PTE0_IN, PTE0_IN_PU }
-+		PTE7_FN, PTE7_OUT, PTE7_IN, 0,
-+		PTE6_FN, PTE6_OUT, PTE6_IN, 0,
-+		PTE5_FN, PTE5_OUT, PTE5_IN, 0,
-+		PTE4_FN, PTE4_OUT, PTE4_IN, 0,
-+		PTE3_FN, PTE3_OUT, PTE3_IN, 0,
-+		PTE2_FN, PTE2_OUT, PTE2_IN, 0,
-+		PTE1_FN, PTE1_OUT, PTE1_IN, 0,
-+		PTE0_FN, PTE0_OUT, PTE0_IN, 0 }
- 	},
- 	{ PINMUX_CFG_REG("PFCR", 0xffec000a, 16, 2) {
--		PTF7_FN, PTF7_OUT, PTF7_IN, PTF7_IN_PU,
--		PTF6_FN, PTF6_OUT, PTF6_IN, PTF6_IN_PU,
--		PTF5_FN, PTF5_OUT, PTF5_IN, PTF5_IN_PU,
--		PTF4_FN, PTF4_OUT, PTF4_IN, PTF4_IN_PU,
--		PTF3_FN, PTF3_OUT, PTF3_IN, PTF3_IN_PU,
--		PTF2_FN, PTF2_OUT, PTF2_IN, PTF2_IN_PU,
--		PTF1_FN, PTF1_OUT, PTF1_IN, PTF1_IN_PU,
--		PTF0_FN, PTF0_OUT, PTF0_IN, PTF0_IN_PU }
-+		PTF7_FN, PTF7_OUT, PTF7_IN, 0,
-+		PTF6_FN, PTF6_OUT, PTF6_IN, 0,
-+		PTF5_FN, PTF5_OUT, PTF5_IN, 0,
-+		PTF4_FN, PTF4_OUT, PTF4_IN, 0,
-+		PTF3_FN, PTF3_OUT, PTF3_IN, 0,
-+		PTF2_FN, PTF2_OUT, PTF2_IN, 0,
-+		PTF1_FN, PTF1_OUT, PTF1_IN, 0,
-+		PTF0_FN, PTF0_OUT, PTF0_IN, 0 }
- 	},
- 	{ PINMUX_CFG_REG("PGCR", 0xffec000c, 16, 2) {
--		PTG7_FN, PTG7_OUT, PTG7_IN, PTG7_IN_PU ,
--		PTG6_FN, PTG6_OUT, PTG6_IN, PTG6_IN_PU ,
-+		PTG7_FN, PTG7_OUT, PTG7_IN, 0,
-+		PTG6_FN, PTG6_OUT, PTG6_IN, 0,
- 		PTG5_FN, PTG5_OUT, PTG5_IN, 0,
--		PTG4_FN, PTG4_OUT, PTG4_IN, PTG4_IN_PU ,
-+		PTG4_FN, PTG4_OUT, PTG4_IN, 0,
- 		PTG3_FN, PTG3_OUT, PTG3_IN, 0,
- 		PTG2_FN, PTG2_OUT, PTG2_IN, 0,
- 		PTG1_FN, PTG1_OUT, PTG1_IN, 0,
- 		PTG0_FN, PTG0_OUT, PTG0_IN, 0 }
- 	},
- 	{ PINMUX_CFG_REG("PHCR", 0xffec000e, 16, 2) {
--		PTH7_FN, PTH7_OUT, PTH7_IN, PTH7_IN_PU,
--		PTH6_FN, PTH6_OUT, PTH6_IN, PTH6_IN_PU,
--		PTH5_FN, PTH5_OUT, PTH5_IN, PTH5_IN_PU,
--		PTH4_FN, PTH4_OUT, PTH4_IN, PTH4_IN_PU,
--		PTH3_FN, PTH3_OUT, PTH3_IN, PTH3_IN_PU,
--		PTH2_FN, PTH2_OUT, PTH2_IN, PTH2_IN_PU,
--		PTH1_FN, PTH1_OUT, PTH1_IN, PTH1_IN_PU,
--		PTH0_FN, PTH0_OUT, PTH0_IN, PTH0_IN_PU }
-+		PTH7_FN, PTH7_OUT, PTH7_IN, 0,
-+		PTH6_FN, PTH6_OUT, PTH6_IN, 0,
-+		PTH5_FN, PTH5_OUT, PTH5_IN, 0,
-+		PTH4_FN, PTH4_OUT, PTH4_IN, 0,
-+		PTH3_FN, PTH3_OUT, PTH3_IN, 0,
-+		PTH2_FN, PTH2_OUT, PTH2_IN, 0,
-+		PTH1_FN, PTH1_OUT, PTH1_IN, 0,
-+		PTH0_FN, PTH0_OUT, PTH0_IN, 0 }
- 	},
- 	{ PINMUX_CFG_REG("PICR", 0xffec0010, 16, 2) {
--		PTI7_FN, PTI7_OUT, PTI7_IN, PTI7_IN_PU,
--		PTI6_FN, PTI6_OUT, PTI6_IN, PTI6_IN_PU,
-+		PTI7_FN, PTI7_OUT, PTI7_IN, 0,
-+		PTI6_FN, PTI6_OUT, PTI6_IN, 0,
- 		PTI5_FN, PTI5_OUT, PTI5_IN, 0,
--		PTI4_FN, PTI4_OUT, PTI4_IN, PTI4_IN_PU,
--		PTI3_FN, PTI3_OUT, PTI3_IN, PTI3_IN_PU,
--		PTI2_FN, PTI2_OUT, PTI2_IN, PTI2_IN_PU,
--		PTI1_FN, PTI1_OUT, PTI1_IN, PTI1_IN_PU,
--		PTI0_FN, PTI0_OUT, PTI0_IN, PTI0_IN_PU }
-+		PTI4_FN, PTI4_OUT, PTI4_IN, 0,
-+		PTI3_FN, PTI3_OUT, PTI3_IN, 0,
-+		PTI2_FN, PTI2_OUT, PTI2_IN, 0,
-+		PTI1_FN, PTI1_OUT, PTI1_IN, 0,
-+		PTI0_FN, PTI0_OUT, PTI0_IN, 0 }
- 	},
- 	{ PINMUX_CFG_REG("PJCR", 0xffec0012, 16, 2) {
- 		0, 0, 0, 0,	/* reserved: always set 1 */
--		PTJ6_FN, PTJ6_OUT, PTJ6_IN, PTJ6_IN_PU,
--		PTJ5_FN, PTJ5_OUT, PTJ5_IN, PTJ5_IN_PU,
--		PTJ4_FN, PTJ4_OUT, PTJ4_IN, PTJ4_IN_PU,
--		PTJ3_FN, PTJ3_OUT, PTJ3_IN, PTJ3_IN_PU,
--		PTJ2_FN, PTJ2_OUT, PTJ2_IN, PTJ2_IN_PU,
--		PTJ1_FN, PTJ1_OUT, PTJ1_IN, PTJ1_IN_PU,
--		PTJ0_FN, PTJ0_OUT, PTJ0_IN, PTJ0_IN_PU }
-+		PTJ6_FN, PTJ6_OUT, PTJ6_IN, 0,
-+		PTJ5_FN, PTJ5_OUT, PTJ5_IN, 0,
-+		PTJ4_FN, PTJ4_OUT, PTJ4_IN, 0,
-+		PTJ3_FN, PTJ3_OUT, PTJ3_IN, 0,
-+		PTJ2_FN, PTJ2_OUT, PTJ2_IN, 0,
-+		PTJ1_FN, PTJ1_OUT, PTJ1_IN, 0,
-+		PTJ0_FN, PTJ0_OUT, PTJ0_IN, 0 }
- 	},
- 	{ PINMUX_CFG_REG("PKCR", 0xffec0014, 16, 2) {
--		PTK7_FN, PTK7_OUT, PTK7_IN, PTK7_IN_PU,
--		PTK6_FN, PTK6_OUT, PTK6_IN, PTK6_IN_PU,
--		PTK5_FN, PTK5_OUT, PTK5_IN, PTK5_IN_PU,
--		PTK4_FN, PTK4_OUT, PTK4_IN, PTK4_IN_PU,
--		PTK3_FN, PTK3_OUT, PTK3_IN, PTK3_IN_PU,
--		PTK2_FN, PTK2_OUT, PTK2_IN, PTK2_IN_PU,
--		PTK1_FN, PTK1_OUT, PTK1_IN, PTK1_IN_PU,
--		PTK0_FN, PTK0_OUT, PTK0_IN, PTK0_IN_PU }
-+		PTK7_FN, PTK7_OUT, PTK7_IN, 0,
-+		PTK6_FN, PTK6_OUT, PTK6_IN, 0,
-+		PTK5_FN, PTK5_OUT, PTK5_IN, 0,
-+		PTK4_FN, PTK4_OUT, PTK4_IN, 0,
-+		PTK3_FN, PTK3_OUT, PTK3_IN, 0,
-+		PTK2_FN, PTK2_OUT, PTK2_IN, 0,
-+		PTK1_FN, PTK1_OUT, PTK1_IN, 0,
-+		PTK0_FN, PTK0_OUT, PTK0_IN, 0 }
- 	},
- 	{ PINMUX_CFG_REG("PLCR", 0xffec0016, 16, 2) {
- 		0, 0, 0, 0,	/* reserved: always set 1 */
--		PTL6_FN, PTL6_OUT, PTL6_IN, PTL6_IN_PU,
--		PTL5_FN, PTL5_OUT, PTL5_IN, PTL5_IN_PU,
--		PTL4_FN, PTL4_OUT, PTL4_IN, PTL4_IN_PU,
--		PTL3_FN, PTL3_OUT, PTL3_IN, PTL3_IN_PU,
--		PTL2_FN, PTL2_OUT, PTL2_IN, PTL2_IN_PU,
--		PTL1_FN, PTL1_OUT, PTL1_IN, PTL1_IN_PU,
--		PTL0_FN, PTL0_OUT, PTL0_IN, PTL0_IN_PU }
-+		PTL6_FN, PTL6_OUT, PTL6_IN, 0,
-+		PTL5_FN, PTL5_OUT, PTL5_IN, 0,
-+		PTL4_FN, PTL4_OUT, PTL4_IN, 0,
-+		PTL3_FN, PTL3_OUT, PTL3_IN, 0,
-+		PTL2_FN, PTL2_OUT, PTL2_IN, 0,
-+		PTL1_FN, PTL1_OUT, PTL1_IN, 0,
-+		PTL0_FN, PTL0_OUT, PTL0_IN, 0 }
- 	},
- 	{ PINMUX_CFG_REG("PMCR", 0xffec0018, 16, 2) {
--		PTM7_FN, PTM7_OUT, PTM7_IN, PTM7_IN_PU,
--		PTM6_FN, PTM6_OUT, PTM6_IN, PTM6_IN_PU,
--		PTM5_FN, PTM5_OUT, PTM5_IN, PTM5_IN_PU,
--		PTM4_FN, PTM4_OUT, PTM4_IN, PTM4_IN_PU,
-+		PTM7_FN, PTM7_OUT, PTM7_IN, 0,
-+		PTM6_FN, PTM6_OUT, PTM6_IN, 0,
-+		PTM5_FN, PTM5_OUT, PTM5_IN, 0,
-+		PTM4_FN, PTM4_OUT, PTM4_IN, 0,
- 		PTM3_FN, PTM3_OUT, PTM3_IN, 0,
- 		PTM2_FN, PTM2_OUT, PTM2_IN, 0,
- 		PTM1_FN, PTM1_OUT, PTM1_IN, 0,
-@@ -1861,21 +1821,21 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
- 		0, 0, 0, 0,	/* reserved: always set 1 */
- 		PTN6_FN, PTN6_OUT, PTN6_IN, 0,
- 		PTN5_FN, PTN5_OUT, PTN5_IN, 0,
--		PTN4_FN, PTN4_OUT, PTN4_IN, PTN4_IN_PU,
--		PTN3_FN, PTN3_OUT, PTN3_IN, PTN3_IN_PU,
--		PTN2_FN, PTN2_OUT, PTN2_IN, PTN2_IN_PU,
--		PTN1_FN, PTN1_OUT, PTN1_IN, PTN1_IN_PU,
--		PTN0_FN, PTN0_OUT, PTN0_IN, PTN0_IN_PU }
-+		PTN4_FN, PTN4_OUT, PTN4_IN, 0,
-+		PTN3_FN, PTN3_OUT, PTN3_IN, 0,
-+		PTN2_FN, PTN2_OUT, PTN2_IN, 0,
-+		PTN1_FN, PTN1_OUT, PTN1_IN, 0,
-+		PTN0_FN, PTN0_OUT, PTN0_IN, 0 }
- 	},
- 	{ PINMUX_CFG_REG("POCR", 0xffec001c, 16, 2) {
--		PTO7_FN, PTO7_OUT, PTO7_IN, PTO7_IN_PU,
--		PTO6_FN, PTO6_OUT, PTO6_IN, PTO6_IN_PU,
--		PTO5_FN, PTO5_OUT, PTO5_IN, PTO5_IN_PU,
--		PTO4_FN, PTO4_OUT, PTO4_IN, PTO4_IN_PU,
--		PTO3_FN, PTO3_OUT, PTO3_IN, PTO3_IN_PU,
--		PTO2_FN, PTO2_OUT, PTO2_IN, PTO2_IN_PU,
--		PTO1_FN, PTO1_OUT, PTO1_IN, PTO1_IN_PU,
--		PTO0_FN, PTO0_OUT, PTO0_IN, PTO0_IN_PU }
-+		PTO7_FN, PTO7_OUT, PTO7_IN, 0,
-+		PTO6_FN, PTO6_OUT, PTO6_IN, 0,
-+		PTO5_FN, PTO5_OUT, PTO5_IN, 0,
-+		PTO4_FN, PTO4_OUT, PTO4_IN, 0,
-+		PTO3_FN, PTO3_OUT, PTO3_IN, 0,
-+		PTO2_FN, PTO2_OUT, PTO2_IN, 0,
-+		PTO1_FN, PTO1_OUT, PTO1_IN, 0,
-+		PTO0_FN, PTO0_OUT, PTO0_IN, 0 }
- 	},
- #if 0	/* FIXME: Remove it? */
- 	{ PINMUX_CFG_REG("PPCR", 0xffec001e, 16, 2) {
-@@ -1920,32 +1880,32 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
- 		PTS0_FN, PTS0_OUT, PTS0_IN, 0 }
- 	},
- 	{ PINMUX_CFG_REG("PTCR", 0xffec0026, 16, 2) {
--		PTT7_FN, PTT7_OUT, PTT7_IN, PTO7_IN_PU,
--		PTT6_FN, PTT6_OUT, PTT6_IN, PTO6_IN_PU,
--		PTT5_FN, PTT5_OUT, PTT5_IN, PTO5_IN_PU,
--		PTT4_FN, PTT4_OUT, PTT4_IN, PTO4_IN_PU,
--		PTT3_FN, PTT3_OUT, PTT3_IN, PTO3_IN_PU,
--		PTT2_FN, PTT2_OUT, PTT2_IN, PTO2_IN_PU,
--		PTT1_FN, PTT1_OUT, PTT1_IN, PTO1_IN_PU,
--		PTT0_FN, PTT0_OUT, PTT0_IN, PTO0_IN_PU }
-+		PTT7_FN, PTT7_OUT, PTT7_IN, 0,
-+		PTT6_FN, PTT6_OUT, PTT6_IN, 0,
-+		PTT5_FN, PTT5_OUT, PTT5_IN, 0,
-+		PTT4_FN, PTT4_OUT, PTT4_IN, 0,
-+		PTT3_FN, PTT3_OUT, PTT3_IN, 0,
-+		PTT2_FN, PTT2_OUT, PTT2_IN, 0,
-+		PTT1_FN, PTT1_OUT, PTT1_IN, 0,
-+		PTT0_FN, PTT0_OUT, PTT0_IN, 0 }
- 	},
- 	{ PINMUX_CFG_REG("PUCR", 0xffec0028, 16, 2) {
--		PTU7_FN, PTU7_OUT, PTU7_IN, PTU7_IN_PU,
--		PTU6_FN, PTU6_OUT, PTU6_IN, PTU6_IN_PU,
--		PTU5_FN, PTU5_OUT, PTU5_IN, PTU5_IN_PU,
--		PTU4_FN, PTU4_OUT, PTU4_IN, PTU4_IN_PU,
--		PTU3_FN, PTU3_OUT, PTU3_IN, PTU3_IN_PU,
--		PTU2_FN, PTU2_OUT, PTU2_IN, PTU2_IN_PU,
--		PTU1_FN, PTU1_OUT, PTU1_IN, PTU1_IN_PU,
--		PTU0_FN, PTU0_OUT, PTU0_IN, PTU0_IN_PU }
-+		PTU7_FN, PTU7_OUT, PTU7_IN, 0,
-+		PTU6_FN, PTU6_OUT, PTU6_IN, 0,
-+		PTU5_FN, PTU5_OUT, PTU5_IN, 0,
-+		PTU4_FN, PTU4_OUT, PTU4_IN, 0,
-+		PTU3_FN, PTU3_OUT, PTU3_IN, 0,
-+		PTU2_FN, PTU2_OUT, PTU2_IN, 0,
-+		PTU1_FN, PTU1_OUT, PTU1_IN, 0,
-+		PTU0_FN, PTU0_OUT, PTU0_IN, 0 }
- 	},
- 	{ PINMUX_CFG_REG("PVCR", 0xffec002a, 16, 2) {
--		PTV7_FN, PTV7_OUT, PTV7_IN, PTV7_IN_PU,
--		PTV6_FN, PTV6_OUT, PTV6_IN, PTV6_IN_PU,
--		PTV5_FN, PTV5_OUT, PTV5_IN, PTV5_IN_PU,
--		PTV4_FN, PTV4_OUT, PTV4_IN, PTV4_IN_PU,
--		PTV3_FN, PTV3_OUT, PTV3_IN, PTV3_IN_PU,
--		PTV2_FN, PTV2_OUT, PTV2_IN, PTV2_IN_PU,
-+		PTV7_FN, PTV7_OUT, PTV7_IN, 0,
-+		PTV6_FN, PTV6_OUT, PTV6_IN, 0,
-+		PTV5_FN, PTV5_OUT, PTV5_IN, 0,
-+		PTV4_FN, PTV4_OUT, PTV4_IN, 0,
-+		PTV3_FN, PTV3_OUT, PTV3_IN, 0,
-+		PTV2_FN, PTV2_OUT, PTV2_IN, 0,
- 		PTV1_FN, PTV1_OUT, PTV1_IN, 0,
- 		PTV0_FN, PTV0_OUT, PTV0_IN, 0 }
- 	},
-@@ -1956,28 +1916,28 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
- 		PTW4_FN, PTW4_OUT, PTW4_IN, 0,
- 		PTW3_FN, PTW3_OUT, PTW3_IN, 0,
- 		PTW2_FN, PTW2_OUT, PTW2_IN, 0,
--		PTW1_FN, PTW1_OUT, PTW1_IN, PTW1_IN_PU,
--		PTW0_FN, PTW0_OUT, PTW0_IN, PTW0_IN_PU }
-+		PTW1_FN, PTW1_OUT, PTW1_IN, 0,
-+		PTW0_FN, PTW0_OUT, PTW0_IN, 0 }
- 	},
- 	{ PINMUX_CFG_REG("PXCR", 0xffec002e, 16, 2) {
--		PTX7_FN, PTX7_OUT, PTX7_IN, PTX7_IN_PU,
--		PTX6_FN, PTX6_OUT, PTX6_IN, PTX6_IN_PU,
--		PTX5_FN, PTX5_OUT, PTX5_IN, PTX5_IN_PU,
--		PTX4_FN, PTX4_OUT, PTX4_IN, PTX4_IN_PU,
--		PTX3_FN, PTX3_OUT, PTX3_IN, PTX3_IN_PU,
--		PTX2_FN, PTX2_OUT, PTX2_IN, PTX2_IN_PU,
--		PTX1_FN, PTX1_OUT, PTX1_IN, PTX1_IN_PU,
--		PTX0_FN, PTX0_OUT, PTX0_IN, PTX0_IN_PU }
-+		PTX7_FN, PTX7_OUT, PTX7_IN, 0,
-+		PTX6_FN, PTX6_OUT, PTX6_IN, 0,
-+		PTX5_FN, PTX5_OUT, PTX5_IN, 0,
-+		PTX4_FN, PTX4_OUT, PTX4_IN, 0,
-+		PTX3_FN, PTX3_OUT, PTX3_IN, 0,
-+		PTX2_FN, PTX2_OUT, PTX2_IN, 0,
-+		PTX1_FN, PTX1_OUT, PTX1_IN, 0,
-+		PTX0_FN, PTX0_OUT, PTX0_IN, 0 }
- 	},
- 	{ PINMUX_CFG_REG("PYCR", 0xffec0030, 16, 2) {
--		PTY7_FN, PTY7_OUT, PTY7_IN, PTY7_IN_PU,
--		PTY6_FN, PTY6_OUT, PTY6_IN, PTY6_IN_PU,
--		PTY5_FN, PTY5_OUT, PTY5_IN, PTY5_IN_PU,
--		PTY4_FN, PTY4_OUT, PTY4_IN, PTY4_IN_PU,
--		PTY3_FN, PTY3_OUT, PTY3_IN, PTY3_IN_PU,
--		PTY2_FN, PTY2_OUT, PTY2_IN, PTY2_IN_PU,
--		PTY1_FN, PTY1_OUT, PTY1_IN, PTY1_IN_PU,
--		PTY0_FN, PTY0_OUT, PTY0_IN, PTY0_IN_PU }
-+		PTY7_FN, PTY7_OUT, PTY7_IN, 0,
-+		PTY6_FN, PTY6_OUT, PTY6_IN, 0,
-+		PTY5_FN, PTY5_OUT, PTY5_IN, 0,
-+		PTY4_FN, PTY4_OUT, PTY4_IN, 0,
-+		PTY3_FN, PTY3_OUT, PTY3_IN, 0,
-+		PTY2_FN, PTY2_OUT, PTY2_IN, 0,
-+		PTY1_FN, PTY1_OUT, PTY1_IN, 0,
-+		PTY0_FN, PTY0_OUT, PTY0_IN, 0 }
- 	},
- 	{ PINMUX_CFG_REG("PZCR", 0xffec0032, 16, 2) {
- 		PTZ7_FN, PTZ7_OUT, PTZ7_IN, 0,
-@@ -2267,7 +2227,6 @@ static const struct pinmux_data_reg pinmux_data_regs[] = {
- const struct sh_pfc_soc_info sh7757_pinmux_info = {
- 	.name = "sh7757_pfc",
- 	.input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
--	.input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END },
- 	.output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
- 	.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0533-sh-pfc-sh7785-Remove-unused-input_pu-range.patch b/patches.renesas/0533-sh-pfc-sh7785-Remove-unused-input_pu-range.patch
deleted file mode 100644
index a474b7da051f1..0000000000000
--- a/patches.renesas/0533-sh-pfc-sh7785-Remove-unused-input_pu-range.patch
+++ /dev/null
@@ -1,606 +0,0 @@
-From 2ee40bc5874be45180a19655aa4e7ea7eda3eb2e Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 16 Jul 2013 01:54:13 +0200
-Subject: sh-pfc: sh7785: Remove unused input_pu range
-
-The PFC SH7785 SoC data contains a input_pu range used to configure
-pull-up resistors using the legacy non-pinconf API. That API has been
-removed from the driver, the range is thus not used anymore. Remove it.
-
-If required, configuring pull-up resistors for the SH7785 can be
-implemented using the pinconf API, as done for the SH-Mobile, R-Mobile
-and R-Car platforms.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit 2afb9681265c1f63e9ee7a1bfdd0f118bce68e3f)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-sh7785.c | 475 +++++++++++++++++-------------------
- 1 file changed, 222 insertions(+), 253 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7785.c b/drivers/pinctrl/sh-pfc/pfc-sh7785.c
-index c176b794..ddae4260 100644
---- a/drivers/pinctrl/sh-pfc/pfc-sh7785.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-sh7785.c
-@@ -77,36 +77,6 @@ enum {
- 	PR3_IN, PR2_IN, PR1_IN, PR0_IN,
- 	PINMUX_INPUT_END,
- 
--	PINMUX_INPUT_PULLUP_BEGIN,
--	PA7_IN_PU, PA6_IN_PU, PA5_IN_PU, PA4_IN_PU,
--	PA3_IN_PU, PA2_IN_PU, PA1_IN_PU, PA0_IN_PU,
--	PB7_IN_PU, PB6_IN_PU, PB5_IN_PU, PB4_IN_PU,
--	PB3_IN_PU, PB2_IN_PU, PB1_IN_PU, PB0_IN_PU,
--	PC7_IN_PU, PC6_IN_PU, PC5_IN_PU, PC4_IN_PU,
--	PC3_IN_PU, PC2_IN_PU, PC1_IN_PU, PC0_IN_PU,
--	PD7_IN_PU, PD6_IN_PU, PD5_IN_PU, PD4_IN_PU,
--	PD3_IN_PU, PD2_IN_PU, PD1_IN_PU, PD0_IN_PU,
--	PE5_IN_PU, PE4_IN_PU, PE3_IN_PU, PE2_IN_PU, PE1_IN_PU, PE0_IN_PU,
--	PF7_IN_PU, PF6_IN_PU, PF5_IN_PU, PF4_IN_PU,
--	PF3_IN_PU, PF2_IN_PU, PF1_IN_PU, PF0_IN_PU,
--	PG7_IN_PU, PG6_IN_PU, PG5_IN_PU, PG4_IN_PU,
--	PG3_IN_PU, PG2_IN_PU, PG1_IN_PU, PG0_IN_PU,
--	PH7_IN_PU, PH6_IN_PU, PH5_IN_PU, PH4_IN_PU,
--	PH3_IN_PU, PH2_IN_PU, PH1_IN_PU, PH0_IN_PU,
--	PJ7_IN_PU, PJ6_IN_PU, PJ5_IN_PU, PJ4_IN_PU,
--	PJ3_IN_PU, PJ2_IN_PU, PJ1_IN_PU, PJ0_IN_PU,
--	PK7_IN_PU, PK6_IN_PU, PK5_IN_PU, PK4_IN_PU,
--	PK3_IN_PU, PK2_IN_PU, PK1_IN_PU, PK0_IN_PU,
--	PL7_IN_PU, PL6_IN_PU, PL5_IN_PU, PL4_IN_PU,
--	PL3_IN_PU, PL2_IN_PU, PL1_IN_PU, PL0_IN_PU,
--	PM1_IN_PU, PM0_IN_PU,
--	PN7_IN_PU, PN6_IN_PU, PN5_IN_PU, PN4_IN_PU,
--	PN3_IN_PU, PN2_IN_PU, PN1_IN_PU, PN0_IN_PU,
--	PP5_IN_PU, PP4_IN_PU, PP3_IN_PU, PP2_IN_PU, PP1_IN_PU, PP0_IN_PU,
--	PQ4_IN_PU, PQ3_IN_PU, PQ2_IN_PU, PQ1_IN_PU, PQ0_IN_PU,
--	PR3_IN_PU, PR2_IN_PU, PR1_IN_PU, PR0_IN_PU,
--	PINMUX_INPUT_PULLUP_END,
--
- 	PINMUX_OUTPUT_BEGIN,
- 	PA7_OUT, PA6_OUT, PA5_OUT, PA4_OUT,
- 	PA3_OUT, PA2_OUT, PA1_OUT, PA0_OUT,
-@@ -358,147 +328,147 @@ enum {
- static const pinmux_enum_t pinmux_data[] = {
- 
- 	/* PA GPIO */
--	PINMUX_DATA(PA7_DATA, PA7_IN, PA7_OUT, PA7_IN_PU),
--	PINMUX_DATA(PA6_DATA, PA6_IN, PA6_OUT, PA6_IN_PU),
--	PINMUX_DATA(PA5_DATA, PA5_IN, PA5_OUT, PA5_IN_PU),
--	PINMUX_DATA(PA4_DATA, PA4_IN, PA4_OUT, PA4_IN_PU),
--	PINMUX_DATA(PA3_DATA, PA3_IN, PA3_OUT, PA3_IN_PU),
--	PINMUX_DATA(PA2_DATA, PA2_IN, PA2_OUT, PA2_IN_PU),
--	PINMUX_DATA(PA1_DATA, PA1_IN, PA1_OUT, PA1_IN_PU),
--	PINMUX_DATA(PA0_DATA, PA0_IN, PA0_OUT, PA0_IN_PU),
-+	PINMUX_DATA(PA7_DATA, PA7_IN, PA7_OUT),
-+	PINMUX_DATA(PA6_DATA, PA6_IN, PA6_OUT),
-+	PINMUX_DATA(PA5_DATA, PA5_IN, PA5_OUT),
-+	PINMUX_DATA(PA4_DATA, PA4_IN, PA4_OUT),
-+	PINMUX_DATA(PA3_DATA, PA3_IN, PA3_OUT),
-+	PINMUX_DATA(PA2_DATA, PA2_IN, PA2_OUT),
-+	PINMUX_DATA(PA1_DATA, PA1_IN, PA1_OUT),
-+	PINMUX_DATA(PA0_DATA, PA0_IN, PA0_OUT),
- 
- 	/* PB GPIO */
--	PINMUX_DATA(PB7_DATA, PB7_IN, PB7_OUT, PB7_IN_PU),
--	PINMUX_DATA(PB6_DATA, PB6_IN, PB6_OUT, PB6_IN_PU),
--	PINMUX_DATA(PB5_DATA, PB5_IN, PB5_OUT, PB5_IN_PU),
--	PINMUX_DATA(PB4_DATA, PB4_IN, PB4_OUT, PB4_IN_PU),
--	PINMUX_DATA(PB3_DATA, PB3_IN, PB3_OUT, PB3_IN_PU),
--	PINMUX_DATA(PB2_DATA, PB2_IN, PB2_OUT, PB2_IN_PU),
--	PINMUX_DATA(PB1_DATA, PB1_IN, PB1_OUT, PB1_IN_PU),
--	PINMUX_DATA(PB0_DATA, PB0_IN, PB0_OUT, PB0_IN_PU),
-+	PINMUX_DATA(PB7_DATA, PB7_IN, PB7_OUT),
-+	PINMUX_DATA(PB6_DATA, PB6_IN, PB6_OUT),
-+	PINMUX_DATA(PB5_DATA, PB5_IN, PB5_OUT),
-+	PINMUX_DATA(PB4_DATA, PB4_IN, PB4_OUT),
-+	PINMUX_DATA(PB3_DATA, PB3_IN, PB3_OUT),
-+	PINMUX_DATA(PB2_DATA, PB2_IN, PB2_OUT),
-+	PINMUX_DATA(PB1_DATA, PB1_IN, PB1_OUT),
-+	PINMUX_DATA(PB0_DATA, PB0_IN, PB0_OUT),
- 
- 	/* PC GPIO */
--	PINMUX_DATA(PC7_DATA, PC7_IN, PC7_OUT, PC7_IN_PU),
--	PINMUX_DATA(PC6_DATA, PC6_IN, PC6_OUT, PC6_IN_PU),
--	PINMUX_DATA(PC5_DATA, PC5_IN, PC5_OUT, PC5_IN_PU),
--	PINMUX_DATA(PC4_DATA, PC4_IN, PC4_OUT, PC4_IN_PU),
--	PINMUX_DATA(PC3_DATA, PC3_IN, PC3_OUT, PC3_IN_PU),
--	PINMUX_DATA(PC2_DATA, PC2_IN, PC2_OUT, PC2_IN_PU),
--	PINMUX_DATA(PC1_DATA, PC1_IN, PC1_OUT, PC1_IN_PU),
--	PINMUX_DATA(PC0_DATA, PC0_IN, PC0_OUT, PC0_IN_PU),
-+	PINMUX_DATA(PC7_DATA, PC7_IN, PC7_OUT),
-+	PINMUX_DATA(PC6_DATA, PC6_IN, PC6_OUT),
-+	PINMUX_DATA(PC5_DATA, PC5_IN, PC5_OUT),
-+	PINMUX_DATA(PC4_DATA, PC4_IN, PC4_OUT),
-+	PINMUX_DATA(PC3_DATA, PC3_IN, PC3_OUT),
-+	PINMUX_DATA(PC2_DATA, PC2_IN, PC2_OUT),
-+	PINMUX_DATA(PC1_DATA, PC1_IN, PC1_OUT),
-+	PINMUX_DATA(PC0_DATA, PC0_IN, PC0_OUT),
- 
- 	/* PD GPIO */
--	PINMUX_DATA(PD7_DATA, PD7_IN, PD7_OUT, PD7_IN_PU),
--	PINMUX_DATA(PD6_DATA, PD6_IN, PD6_OUT, PD6_IN_PU),
--	PINMUX_DATA(PD5_DATA, PD5_IN, PD5_OUT, PD5_IN_PU),
--	PINMUX_DATA(PD4_DATA, PD4_IN, PD4_OUT, PD4_IN_PU),
--	PINMUX_DATA(PD3_DATA, PD3_IN, PD3_OUT, PD3_IN_PU),
--	PINMUX_DATA(PD2_DATA, PD2_IN, PD2_OUT, PD2_IN_PU),
--	PINMUX_DATA(PD1_DATA, PD1_IN, PD1_OUT, PD1_IN_PU),
--	PINMUX_DATA(PD0_DATA, PD0_IN, PD0_OUT, PD0_IN_PU),
-+	PINMUX_DATA(PD7_DATA, PD7_IN, PD7_OUT),
-+	PINMUX_DATA(PD6_DATA, PD6_IN, PD6_OUT),
-+	PINMUX_DATA(PD5_DATA, PD5_IN, PD5_OUT),
-+	PINMUX_DATA(PD4_DATA, PD4_IN, PD4_OUT),
-+	PINMUX_DATA(PD3_DATA, PD3_IN, PD3_OUT),
-+	PINMUX_DATA(PD2_DATA, PD2_IN, PD2_OUT),
-+	PINMUX_DATA(PD1_DATA, PD1_IN, PD1_OUT),
-+	PINMUX_DATA(PD0_DATA, PD0_IN, PD0_OUT),
- 
- 	/* PE GPIO */
--	PINMUX_DATA(PE5_DATA, PE5_IN, PE5_OUT, PE5_IN_PU),
--	PINMUX_DATA(PE4_DATA, PE4_IN, PE4_OUT, PE4_IN_PU),
--	PINMUX_DATA(PE3_DATA, PE3_IN, PE3_OUT, PE3_IN_PU),
--	PINMUX_DATA(PE2_DATA, PE2_IN, PE2_OUT, PE2_IN_PU),
--	PINMUX_DATA(PE1_DATA, PE1_IN, PE1_OUT, PE1_IN_PU),
--	PINMUX_DATA(PE0_DATA, PE0_IN, PE0_OUT, PE0_IN_PU),
-+	PINMUX_DATA(PE5_DATA, PE5_IN, PE5_OUT),
-+	PINMUX_DATA(PE4_DATA, PE4_IN, PE4_OUT),
-+	PINMUX_DATA(PE3_DATA, PE3_IN, PE3_OUT),
-+	PINMUX_DATA(PE2_DATA, PE2_IN, PE2_OUT),
-+	PINMUX_DATA(PE1_DATA, PE1_IN, PE1_OUT),
-+	PINMUX_DATA(PE0_DATA, PE0_IN, PE0_OUT),
- 
- 	/* PF GPIO */
--	PINMUX_DATA(PF7_DATA, PF7_IN, PF7_OUT, PF7_IN_PU),
--	PINMUX_DATA(PF6_DATA, PF6_IN, PF6_OUT, PF6_IN_PU),
--	PINMUX_DATA(PF5_DATA, PF5_IN, PF5_OUT, PF5_IN_PU),
--	PINMUX_DATA(PF4_DATA, PF4_IN, PF4_OUT, PF4_IN_PU),
--	PINMUX_DATA(PF3_DATA, PF3_IN, PF3_OUT, PF3_IN_PU),
--	PINMUX_DATA(PF2_DATA, PF2_IN, PF2_OUT, PF2_IN_PU),
--	PINMUX_DATA(PF1_DATA, PF1_IN, PF1_OUT, PF1_IN_PU),
--	PINMUX_DATA(PF0_DATA, PF0_IN, PF0_OUT, PF0_IN_PU),
-+	PINMUX_DATA(PF7_DATA, PF7_IN, PF7_OUT),
-+	PINMUX_DATA(PF6_DATA, PF6_IN, PF6_OUT),
-+	PINMUX_DATA(PF5_DATA, PF5_IN, PF5_OUT),
-+	PINMUX_DATA(PF4_DATA, PF4_IN, PF4_OUT),
-+	PINMUX_DATA(PF3_DATA, PF3_IN, PF3_OUT),
-+	PINMUX_DATA(PF2_DATA, PF2_IN, PF2_OUT),
-+	PINMUX_DATA(PF1_DATA, PF1_IN, PF1_OUT),
-+	PINMUX_DATA(PF0_DATA, PF0_IN, PF0_OUT),
- 
- 	/* PG GPIO */
--	PINMUX_DATA(PG7_DATA, PG7_IN, PG7_OUT, PG7_IN_PU),
--	PINMUX_DATA(PG6_DATA, PG6_IN, PG6_OUT, PG6_IN_PU),
--	PINMUX_DATA(PG5_DATA, PG5_IN, PG5_OUT, PG5_IN_PU),
--	PINMUX_DATA(PG4_DATA, PG4_IN, PG4_OUT, PG4_IN_PU),
--	PINMUX_DATA(PG3_DATA, PG3_IN, PG3_OUT, PG3_IN_PU),
--	PINMUX_DATA(PG2_DATA, PG2_IN, PG2_OUT, PG2_IN_PU),
--	PINMUX_DATA(PG1_DATA, PG1_IN, PG1_OUT, PG1_IN_PU),
--	PINMUX_DATA(PG0_DATA, PG0_IN, PG0_OUT, PG0_IN_PU),
-+	PINMUX_DATA(PG7_DATA, PG7_IN, PG7_OUT),
-+	PINMUX_DATA(PG6_DATA, PG6_IN, PG6_OUT),
-+	PINMUX_DATA(PG5_DATA, PG5_IN, PG5_OUT),
-+	PINMUX_DATA(PG4_DATA, PG4_IN, PG4_OUT),
-+	PINMUX_DATA(PG3_DATA, PG3_IN, PG3_OUT),
-+	PINMUX_DATA(PG2_DATA, PG2_IN, PG2_OUT),
-+	PINMUX_DATA(PG1_DATA, PG1_IN, PG1_OUT),
-+	PINMUX_DATA(PG0_DATA, PG0_IN, PG0_OUT),
- 
- 	/* PH GPIO */
--	PINMUX_DATA(PH7_DATA, PH7_IN, PH7_OUT, PH7_IN_PU),
--	PINMUX_DATA(PH6_DATA, PH6_IN, PH6_OUT, PH6_IN_PU),
--	PINMUX_DATA(PH5_DATA, PH5_IN, PH5_OUT, PH5_IN_PU),
--	PINMUX_DATA(PH4_DATA, PH4_IN, PH4_OUT, PH4_IN_PU),
--	PINMUX_DATA(PH3_DATA, PH3_IN, PH3_OUT, PH3_IN_PU),
--	PINMUX_DATA(PH2_DATA, PH2_IN, PH2_OUT, PH2_IN_PU),
--	PINMUX_DATA(PH1_DATA, PH1_IN, PH1_OUT, PH1_IN_PU),
--	PINMUX_DATA(PH0_DATA, PH0_IN, PH0_OUT, PH0_IN_PU),
-+	PINMUX_DATA(PH7_DATA, PH7_IN, PH7_OUT),
-+	PINMUX_DATA(PH6_DATA, PH6_IN, PH6_OUT),
-+	PINMUX_DATA(PH5_DATA, PH5_IN, PH5_OUT),
-+	PINMUX_DATA(PH4_DATA, PH4_IN, PH4_OUT),
-+	PINMUX_DATA(PH3_DATA, PH3_IN, PH3_OUT),
-+	PINMUX_DATA(PH2_DATA, PH2_IN, PH2_OUT),
-+	PINMUX_DATA(PH1_DATA, PH1_IN, PH1_OUT),
-+	PINMUX_DATA(PH0_DATA, PH0_IN, PH0_OUT),
- 
- 	/* PJ GPIO */
--	PINMUX_DATA(PJ7_DATA, PJ7_IN, PJ7_OUT, PJ7_IN_PU),
--	PINMUX_DATA(PJ6_DATA, PJ6_IN, PJ6_OUT, PJ6_IN_PU),
--	PINMUX_DATA(PJ5_DATA, PJ5_IN, PJ5_OUT, PJ5_IN_PU),
--	PINMUX_DATA(PJ4_DATA, PJ4_IN, PJ4_OUT, PJ4_IN_PU),
--	PINMUX_DATA(PJ3_DATA, PJ3_IN, PJ3_OUT, PJ3_IN_PU),
--	PINMUX_DATA(PJ2_DATA, PJ2_IN, PJ2_OUT, PJ2_IN_PU),
--	PINMUX_DATA(PJ1_DATA, PJ1_IN, PJ1_OUT, PJ1_IN_PU),
--	PINMUX_DATA(PJ0_DATA, PJ0_IN, PJ0_OUT, PJ0_IN_PU),
-+	PINMUX_DATA(PJ7_DATA, PJ7_IN, PJ7_OUT),
-+	PINMUX_DATA(PJ6_DATA, PJ6_IN, PJ6_OUT),
-+	PINMUX_DATA(PJ5_DATA, PJ5_IN, PJ5_OUT),
-+	PINMUX_DATA(PJ4_DATA, PJ4_IN, PJ4_OUT),
-+	PINMUX_DATA(PJ3_DATA, PJ3_IN, PJ3_OUT),
-+	PINMUX_DATA(PJ2_DATA, PJ2_IN, PJ2_OUT),
-+	PINMUX_DATA(PJ1_DATA, PJ1_IN, PJ1_OUT),
-+	PINMUX_DATA(PJ0_DATA, PJ0_IN, PJ0_OUT),
- 
- 	/* PK GPIO */
--	PINMUX_DATA(PK7_DATA, PK7_IN, PK7_OUT, PK7_IN_PU),
--	PINMUX_DATA(PK6_DATA, PK6_IN, PK6_OUT, PK6_IN_PU),
--	PINMUX_DATA(PK5_DATA, PK5_IN, PK5_OUT, PK5_IN_PU),
--	PINMUX_DATA(PK4_DATA, PK4_IN, PK4_OUT, PK4_IN_PU),
--	PINMUX_DATA(PK3_DATA, PK3_IN, PK3_OUT, PK3_IN_PU),
--	PINMUX_DATA(PK2_DATA, PK2_IN, PK2_OUT, PK2_IN_PU),
--	PINMUX_DATA(PK1_DATA, PK1_IN, PK1_OUT, PK1_IN_PU),
--	PINMUX_DATA(PK0_DATA, PK0_IN, PK0_OUT, PK0_IN_PU),
-+	PINMUX_DATA(PK7_DATA, PK7_IN, PK7_OUT),
-+	PINMUX_DATA(PK6_DATA, PK6_IN, PK6_OUT),
-+	PINMUX_DATA(PK5_DATA, PK5_IN, PK5_OUT),
-+	PINMUX_DATA(PK4_DATA, PK4_IN, PK4_OUT),
-+	PINMUX_DATA(PK3_DATA, PK3_IN, PK3_OUT),
-+	PINMUX_DATA(PK2_DATA, PK2_IN, PK2_OUT),
-+	PINMUX_DATA(PK1_DATA, PK1_IN, PK1_OUT),
-+	PINMUX_DATA(PK0_DATA, PK0_IN, PK0_OUT),
- 
- 	/* PL GPIO */
--	PINMUX_DATA(PL7_DATA, PL7_IN, PL7_OUT, PL7_IN_PU),
--	PINMUX_DATA(PL6_DATA, PL6_IN, PL6_OUT, PL6_IN_PU),
--	PINMUX_DATA(PL5_DATA, PL5_IN, PL5_OUT, PL5_IN_PU),
--	PINMUX_DATA(PL4_DATA, PL4_IN, PL4_OUT, PL4_IN_PU),
--	PINMUX_DATA(PL3_DATA, PL3_IN, PL3_OUT, PL3_IN_PU),
--	PINMUX_DATA(PL2_DATA, PL2_IN, PL2_OUT, PL2_IN_PU),
--	PINMUX_DATA(PL1_DATA, PL1_IN, PL1_OUT, PL1_IN_PU),
--	PINMUX_DATA(PL0_DATA, PL0_IN, PL0_OUT, PL0_IN_PU),
-+	PINMUX_DATA(PL7_DATA, PL7_IN, PL7_OUT),
-+	PINMUX_DATA(PL6_DATA, PL6_IN, PL6_OUT),
-+	PINMUX_DATA(PL5_DATA, PL5_IN, PL5_OUT),
-+	PINMUX_DATA(PL4_DATA, PL4_IN, PL4_OUT),
-+	PINMUX_DATA(PL3_DATA, PL3_IN, PL3_OUT),
-+	PINMUX_DATA(PL2_DATA, PL2_IN, PL2_OUT),
-+	PINMUX_DATA(PL1_DATA, PL1_IN, PL1_OUT),
-+	PINMUX_DATA(PL0_DATA, PL0_IN, PL0_OUT),
- 
- 	/* PM GPIO */
--	PINMUX_DATA(PM1_DATA, PM1_IN, PM1_OUT, PM1_IN_PU),
--	PINMUX_DATA(PM0_DATA, PM0_IN, PM0_OUT, PM0_IN_PU),
-+	PINMUX_DATA(PM1_DATA, PM1_IN, PM1_OUT),
-+	PINMUX_DATA(PM0_DATA, PM0_IN, PM0_OUT),
- 
- 	/* PN GPIO */
--	PINMUX_DATA(PN7_DATA, PN7_IN, PN7_OUT, PN7_IN_PU),
--	PINMUX_DATA(PN6_DATA, PN6_IN, PN6_OUT, PN6_IN_PU),
--	PINMUX_DATA(PN5_DATA, PN5_IN, PN5_OUT, PN5_IN_PU),
--	PINMUX_DATA(PN4_DATA, PN4_IN, PN4_OUT, PN4_IN_PU),
--	PINMUX_DATA(PN3_DATA, PN3_IN, PN3_OUT, PN3_IN_PU),
--	PINMUX_DATA(PN2_DATA, PN2_IN, PN2_OUT, PN2_IN_PU),
--	PINMUX_DATA(PN1_DATA, PN1_IN, PN1_OUT, PN1_IN_PU),
--	PINMUX_DATA(PN0_DATA, PN0_IN, PN0_OUT, PN0_IN_PU),
-+	PINMUX_DATA(PN7_DATA, PN7_IN, PN7_OUT),
-+	PINMUX_DATA(PN6_DATA, PN6_IN, PN6_OUT),
-+	PINMUX_DATA(PN5_DATA, PN5_IN, PN5_OUT),
-+	PINMUX_DATA(PN4_DATA, PN4_IN, PN4_OUT),
-+	PINMUX_DATA(PN3_DATA, PN3_IN, PN3_OUT),
-+	PINMUX_DATA(PN2_DATA, PN2_IN, PN2_OUT),
-+	PINMUX_DATA(PN1_DATA, PN1_IN, PN1_OUT),
-+	PINMUX_DATA(PN0_DATA, PN0_IN, PN0_OUT),
- 
- 	/* PP GPIO */
--	PINMUX_DATA(PP5_DATA, PP5_IN, PP5_OUT, PP5_IN_PU),
--	PINMUX_DATA(PP4_DATA, PP4_IN, PP4_OUT, PP4_IN_PU),
--	PINMUX_DATA(PP3_DATA, PP3_IN, PP3_OUT, PP3_IN_PU),
--	PINMUX_DATA(PP2_DATA, PP2_IN, PP2_OUT, PP2_IN_PU),
--	PINMUX_DATA(PP1_DATA, PP1_IN, PP1_OUT, PP1_IN_PU),
--	PINMUX_DATA(PP0_DATA, PP0_IN, PP0_OUT, PP0_IN_PU),
-+	PINMUX_DATA(PP5_DATA, PP5_IN, PP5_OUT),
-+	PINMUX_DATA(PP4_DATA, PP4_IN, PP4_OUT),
-+	PINMUX_DATA(PP3_DATA, PP3_IN, PP3_OUT),
-+	PINMUX_DATA(PP2_DATA, PP2_IN, PP2_OUT),
-+	PINMUX_DATA(PP1_DATA, PP1_IN, PP1_OUT),
-+	PINMUX_DATA(PP0_DATA, PP0_IN, PP0_OUT),
- 
- 	/* PQ GPIO */
--	PINMUX_DATA(PQ4_DATA, PQ4_IN, PQ4_OUT, PQ4_IN_PU),
--	PINMUX_DATA(PQ3_DATA, PQ3_IN, PQ3_OUT, PQ3_IN_PU),
--	PINMUX_DATA(PQ2_DATA, PQ2_IN, PQ2_OUT, PQ2_IN_PU),
--	PINMUX_DATA(PQ1_DATA, PQ1_IN, PQ1_OUT, PQ1_IN_PU),
--	PINMUX_DATA(PQ0_DATA, PQ0_IN, PQ0_OUT, PQ0_IN_PU),
-+	PINMUX_DATA(PQ4_DATA, PQ4_IN, PQ4_OUT),
-+	PINMUX_DATA(PQ3_DATA, PQ3_IN, PQ3_OUT),
-+	PINMUX_DATA(PQ2_DATA, PQ2_IN, PQ2_OUT),
-+	PINMUX_DATA(PQ1_DATA, PQ1_IN, PQ1_OUT),
-+	PINMUX_DATA(PQ0_DATA, PQ0_IN, PQ0_OUT),
- 
- 	/* PR GPIO */
--	PINMUX_DATA(PR3_DATA, PR3_IN, PR3_OUT, PR3_IN_PU),
--	PINMUX_DATA(PR2_DATA, PR2_IN, PR2_OUT, PR2_IN_PU),
--	PINMUX_DATA(PR1_DATA, PR1_IN, PR1_OUT, PR1_IN_PU),
--	PINMUX_DATA(PR0_DATA, PR0_IN, PR0_OUT, PR0_IN_PU),
-+	PINMUX_DATA(PR3_DATA, PR3_IN, PR3_OUT),
-+	PINMUX_DATA(PR2_DATA, PR2_IN, PR2_OUT),
-+	PINMUX_DATA(PR1_DATA, PR1_IN, PR1_OUT),
-+	PINMUX_DATA(PR0_DATA, PR0_IN, PR0_OUT),
- 
- 	/* PA FN */
- 	PINMUX_DATA(D63_AD31_MARK, PA7_FN),
-@@ -1020,114 +990,114 @@ static const struct pinmux_func pinmux_func_gpios[] = {
- 
- static const struct pinmux_cfg_reg pinmux_config_regs[] = {
- 	{ PINMUX_CFG_REG("PACR", 0xffe70000, 16, 2) {
--		PA7_FN, PA7_OUT, PA7_IN, PA7_IN_PU,
--		PA6_FN, PA6_OUT, PA6_IN, PA6_IN_PU,
--		PA5_FN, PA5_OUT, PA5_IN, PA5_IN_PU,
--		PA4_FN, PA4_OUT, PA4_IN, PA4_IN_PU,
--		PA3_FN, PA3_OUT, PA3_IN, PA3_IN_PU,
--		PA2_FN, PA2_OUT, PA2_IN, PA2_IN_PU,
--		PA1_FN, PA1_OUT, PA1_IN, PA1_IN_PU,
--		PA0_FN, PA0_OUT, PA0_IN, PA0_IN_PU }
-+		PA7_FN, PA7_OUT, PA7_IN, 0,
-+		PA6_FN, PA6_OUT, PA6_IN, 0,
-+		PA5_FN, PA5_OUT, PA5_IN, 0,
-+		PA4_FN, PA4_OUT, PA4_IN, 0,
-+		PA3_FN, PA3_OUT, PA3_IN, 0,
-+		PA2_FN, PA2_OUT, PA2_IN, 0,
-+		PA1_FN, PA1_OUT, PA1_IN, 0,
-+		PA0_FN, PA0_OUT, PA0_IN, 0 }
- 	},
- 	{ PINMUX_CFG_REG("PBCR", 0xffe70002, 16, 2) {
--		PB7_FN, PB7_OUT, PB7_IN, PB7_IN_PU,
--		PB6_FN, PB6_OUT, PB6_IN, PB6_IN_PU,
--		PB5_FN, PB5_OUT, PB5_IN, PB5_IN_PU,
--		PB4_FN, PB4_OUT, PB4_IN, PB4_IN_PU,
--		PB3_FN, PB3_OUT, PB3_IN, PB3_IN_PU,
--		PB2_FN, PB2_OUT, PB2_IN, PB2_IN_PU,
--		PB1_FN, PB1_OUT, PB1_IN, PB1_IN_PU,
--		PB0_FN, PB0_OUT, PB0_IN, PB0_IN_PU }
-+		PB7_FN, PB7_OUT, PB7_IN, 0,
-+		PB6_FN, PB6_OUT, PB6_IN, 0,
-+		PB5_FN, PB5_OUT, PB5_IN, 0,
-+		PB4_FN, PB4_OUT, PB4_IN, 0,
-+		PB3_FN, PB3_OUT, PB3_IN, 0,
-+		PB2_FN, PB2_OUT, PB2_IN, 0,
-+		PB1_FN, PB1_OUT, PB1_IN, 0,
-+		PB0_FN, PB0_OUT, PB0_IN, 0 }
- 	},
- 	{ PINMUX_CFG_REG("PCCR", 0xffe70004, 16, 2) {
--		PC7_FN, PC7_OUT, PC7_IN, PC7_IN_PU,
--		PC6_FN, PC6_OUT, PC6_IN, PC6_IN_PU,
--		PC5_FN, PC5_OUT, PC5_IN, PC5_IN_PU,
--		PC4_FN, PC4_OUT, PC4_IN, PC4_IN_PU,
--		PC3_FN, PC3_OUT, PC3_IN, PC3_IN_PU,
--		PC2_FN, PC2_OUT, PC2_IN, PC2_IN_PU,
--		PC1_FN, PC1_OUT, PC1_IN, PC1_IN_PU,
--		PC0_FN, PC0_OUT, PC0_IN, PC0_IN_PU }
-+		PC7_FN, PC7_OUT, PC7_IN, 0,
-+		PC6_FN, PC6_OUT, PC6_IN, 0,
-+		PC5_FN, PC5_OUT, PC5_IN, 0,
-+		PC4_FN, PC4_OUT, PC4_IN, 0,
-+		PC3_FN, PC3_OUT, PC3_IN, 0,
-+		PC2_FN, PC2_OUT, PC2_IN, 0,
-+		PC1_FN, PC1_OUT, PC1_IN, 0,
-+		PC0_FN, PC0_OUT, PC0_IN, 0 }
- 	},
- 	{ PINMUX_CFG_REG("PDCR", 0xffe70006, 16, 2) {
--		PD7_FN, PD7_OUT, PD7_IN, PD7_IN_PU,
--		PD6_FN, PD6_OUT, PD6_IN, PD6_IN_PU,
--		PD5_FN, PD5_OUT, PD5_IN, PD5_IN_PU,
--		PD4_FN, PD4_OUT, PD4_IN, PD4_IN_PU,
--		PD3_FN, PD3_OUT, PD3_IN, PD3_IN_PU,
--		PD2_FN, PD2_OUT, PD2_IN, PD2_IN_PU,
--		PD1_FN, PD1_OUT, PD1_IN, PD1_IN_PU,
--		PD0_FN, PD0_OUT, PD0_IN, PD0_IN_PU }
-+		PD7_FN, PD7_OUT, PD7_IN, 0,
-+		PD6_FN, PD6_OUT, PD6_IN, 0,
-+		PD5_FN, PD5_OUT, PD5_IN, 0,
-+		PD4_FN, PD4_OUT, PD4_IN, 0,
-+		PD3_FN, PD3_OUT, PD3_IN, 0,
-+		PD2_FN, PD2_OUT, PD2_IN, 0,
-+		PD1_FN, PD1_OUT, PD1_IN, 0,
-+		PD0_FN, PD0_OUT, PD0_IN, 0 }
- 	},
- 	{ PINMUX_CFG_REG("PECR", 0xffe70008, 16, 2) {
- 		0, 0, 0, 0,
- 		0, 0, 0, 0,
--		PE5_FN, PE5_OUT, PE5_IN, PE5_IN_PU,
--		PE4_FN, PE4_OUT, PE4_IN, PE4_IN_PU,
--		PE3_FN, PE3_OUT, PE3_IN, PE3_IN_PU,
--		PE2_FN, PE2_OUT, PE2_IN, PE2_IN_PU,
--		PE1_FN, PE1_OUT, PE1_IN, PE1_IN_PU,
--		PE0_FN, PE0_OUT, PE0_IN, PE0_IN_PU }
-+		PE5_FN, PE5_OUT, PE5_IN, 0,
-+		PE4_FN, PE4_OUT, PE4_IN, 0,
-+		PE3_FN, PE3_OUT, PE3_IN, 0,
-+		PE2_FN, PE2_OUT, PE2_IN, 0,
-+		PE1_FN, PE1_OUT, PE1_IN, 0,
-+		PE0_FN, PE0_OUT, PE0_IN, 0 }
- 	},
- 	{ PINMUX_CFG_REG("PFCR", 0xffe7000a, 16, 2) {
--		PF7_FN, PF7_OUT, PF7_IN, PF7_IN_PU,
--		PF6_FN, PF6_OUT, PF6_IN, PF6_IN_PU,
--		PF5_FN, PF5_OUT, PF5_IN, PF5_IN_PU,
--		PF4_FN, PF4_OUT, PF4_IN, PF4_IN_PU,
--		PF3_FN, PF3_OUT, PF3_IN, PF3_IN_PU,
--		PF2_FN, PF2_OUT, PF2_IN, PF2_IN_PU,
--		PF1_FN, PF1_OUT, PF1_IN, PF1_IN_PU,
--		PF0_FN, PF0_OUT, PF0_IN, PF0_IN_PU }
-+		PF7_FN, PF7_OUT, PF7_IN, 0,
-+		PF6_FN, PF6_OUT, PF6_IN, 0,
-+		PF5_FN, PF5_OUT, PF5_IN, 0,
-+		PF4_FN, PF4_OUT, PF4_IN, 0,
-+		PF3_FN, PF3_OUT, PF3_IN, 0,
-+		PF2_FN, PF2_OUT, PF2_IN, 0,
-+		PF1_FN, PF1_OUT, PF1_IN, 0,
-+		PF0_FN, PF0_OUT, PF0_IN, 0 }
- 	},
- 	{ PINMUX_CFG_REG("PGCR", 0xffe7000c, 16, 2) {
--		PG7_FN, PG7_OUT, PG7_IN, PG7_IN_PU,
--		PG6_FN, PG6_OUT, PG6_IN, PG6_IN_PU,
--		PG5_FN, PG5_OUT, PG5_IN, PG5_IN_PU,
--		PG4_FN, PG4_OUT, PG4_IN, PG4_IN_PU,
--		PG3_FN, PG3_OUT, PG3_IN, PG3_IN_PU,
--		PG2_FN, PG2_OUT, PG2_IN, PG2_IN_PU,
--		PG1_FN, PG1_OUT, PG1_IN, PG1_IN_PU,
--		PG0_FN, PG0_OUT, PG0_IN, PG0_IN_PU }
-+		PG7_FN, PG7_OUT, PG7_IN, 0,
-+		PG6_FN, PG6_OUT, PG6_IN, 0,
-+		PG5_FN, PG5_OUT, PG5_IN, 0,
-+		PG4_FN, PG4_OUT, PG4_IN, 0,
-+		PG3_FN, PG3_OUT, PG3_IN, 0,
-+		PG2_FN, PG2_OUT, PG2_IN, 0,
-+		PG1_FN, PG1_OUT, PG1_IN, 0,
-+		PG0_FN, PG0_OUT, PG0_IN, 0 }
- 	},
- 	{ PINMUX_CFG_REG("PHCR", 0xffe7000e, 16, 2) {
--		PH7_FN, PH7_OUT, PH7_IN, PH7_IN_PU,
--		PH6_FN, PH6_OUT, PH6_IN, PH6_IN_PU,
--		PH5_FN, PH5_OUT, PH5_IN, PH5_IN_PU,
--		PH4_FN, PH4_OUT, PH4_IN, PH4_IN_PU,
--		PH3_FN, PH3_OUT, PH3_IN, PH3_IN_PU,
--		PH2_FN, PH2_OUT, PH2_IN, PH2_IN_PU,
--		PH1_FN, PH1_OUT, PH1_IN, PH1_IN_PU,
--		PH0_FN, PH0_OUT, PH0_IN, PH0_IN_PU }
-+		PH7_FN, PH7_OUT, PH7_IN, 0,
-+		PH6_FN, PH6_OUT, PH6_IN, 0,
-+		PH5_FN, PH5_OUT, PH5_IN, 0,
-+		PH4_FN, PH4_OUT, PH4_IN, 0,
-+		PH3_FN, PH3_OUT, PH3_IN, 0,
-+		PH2_FN, PH2_OUT, PH2_IN, 0,
-+		PH1_FN, PH1_OUT, PH1_IN, 0,
-+		PH0_FN, PH0_OUT, PH0_IN, 0 }
- 	},
- 	{ PINMUX_CFG_REG("PJCR", 0xffe70010, 16, 2) {
--		PJ7_FN, PJ7_OUT, PJ7_IN, PJ7_IN_PU,
--		PJ6_FN, PJ6_OUT, PJ6_IN, PJ6_IN_PU,
--		PJ5_FN, PJ5_OUT, PJ5_IN, PJ5_IN_PU,
--		PJ4_FN, PJ4_OUT, PJ4_IN, PJ4_IN_PU,
--		PJ3_FN, PJ3_OUT, PJ3_IN, PJ3_IN_PU,
--		PJ2_FN, PJ2_OUT, PJ2_IN, PJ2_IN_PU,
--		PJ1_FN, PJ1_OUT, PJ1_IN, PJ1_IN_PU,
--		PJ0_FN, PJ0_OUT, PJ0_IN, PJ0_IN_PU }
-+		PJ7_FN, PJ7_OUT, PJ7_IN, 0,
-+		PJ6_FN, PJ6_OUT, PJ6_IN, 0,
-+		PJ5_FN, PJ5_OUT, PJ5_IN, 0,
-+		PJ4_FN, PJ4_OUT, PJ4_IN, 0,
-+		PJ3_FN, PJ3_OUT, PJ3_IN, 0,
-+		PJ2_FN, PJ2_OUT, PJ2_IN, 0,
-+		PJ1_FN, PJ1_OUT, PJ1_IN, 0,
-+		PJ0_FN, PJ0_OUT, PJ0_IN, 0 }
- 	},
- 	{ PINMUX_CFG_REG("PKCR", 0xffe70012, 16, 2) {
--		PK7_FN, PK7_OUT, PK7_IN, PK7_IN_PU,
--		PK6_FN, PK6_OUT, PK6_IN, PK6_IN_PU,
--		PK5_FN, PK5_OUT, PK5_IN, PK5_IN_PU,
--		PK4_FN, PK4_OUT, PK4_IN, PK4_IN_PU,
--		PK3_FN, PK3_OUT, PK3_IN, PK3_IN_PU,
--		PK2_FN, PK2_OUT, PK2_IN, PK2_IN_PU,
--		PK1_FN, PK1_OUT, PK1_IN, PK1_IN_PU,
--		PK0_FN, PK0_OUT, PK0_IN, PK0_IN_PU }
-+		PK7_FN, PK7_OUT, PK7_IN, 0,
-+		PK6_FN, PK6_OUT, PK6_IN, 0,
-+		PK5_FN, PK5_OUT, PK5_IN, 0,
-+		PK4_FN, PK4_OUT, PK4_IN, 0,
-+		PK3_FN, PK3_OUT, PK3_IN, 0,
-+		PK2_FN, PK2_OUT, PK2_IN, 0,
-+		PK1_FN, PK1_OUT, PK1_IN, 0,
-+		PK0_FN, PK0_OUT, PK0_IN, 0 }
- 	},
- 	{ PINMUX_CFG_REG("PLCR", 0xffe70014, 16, 2) {
--		PL7_FN, PL7_OUT, PL7_IN, PL7_IN_PU,
--		PL6_FN, PL6_OUT, PL6_IN, PL6_IN_PU,
--		PL5_FN, PL5_OUT, PL5_IN, PL5_IN_PU,
--		PL4_FN, PL4_OUT, PL4_IN, PL4_IN_PU,
--		PL3_FN, PL3_OUT, PL3_IN, PL3_IN_PU,
--		PL2_FN, PL2_OUT, PL2_IN, PL2_IN_PU,
--		PL1_FN, PL1_OUT, PL1_IN, PL1_IN_PU,
--		PL0_FN, PL0_OUT, PL0_IN, PL0_IN_PU }
-+		PL7_FN, PL7_OUT, PL7_IN, 0,
-+		PL6_FN, PL6_OUT, PL6_IN, 0,
-+		PL5_FN, PL5_OUT, PL5_IN, 0,
-+		PL4_FN, PL4_OUT, PL4_IN, 0,
-+		PL3_FN, PL3_OUT, PL3_IN, 0,
-+		PL2_FN, PL2_OUT, PL2_IN, 0,
-+		PL1_FN, PL1_OUT, PL1_IN, 0,
-+		PL0_FN, PL0_OUT, PL0_IN, 0 }
- 	},
- 	{ PINMUX_CFG_REG("PMCR", 0xffe70016, 16, 2) {
- 		0, 0, 0, 0,
-@@ -1136,48 +1106,48 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
- 		0, 0, 0, 0,
- 		0, 0, 0, 0,
- 		0, 0, 0, 0,
--		PM1_FN, PM1_OUT, PM1_IN, PM1_IN_PU,
--		PM0_FN, PM0_OUT, PM0_IN, PM0_IN_PU }
-+		PM1_FN, PM1_OUT, PM1_IN, 0,
-+		PM0_FN, PM0_OUT, PM0_IN, 0 }
- 	},
- 	{ PINMUX_CFG_REG("PNCR", 0xffe70018, 16, 2) {
--		PN7_FN, PN7_OUT, PN7_IN, PN7_IN_PU,
--		PN6_FN, PN6_OUT, PN6_IN, PN6_IN_PU,
--		PN5_FN, PN5_OUT, PN5_IN, PN5_IN_PU,
--		PN4_FN, PN4_OUT, PN4_IN, PN4_IN_PU,
--		PN3_FN, PN3_OUT, PN3_IN, PN3_IN_PU,
--		PN2_FN, PN2_OUT, PN2_IN, PN2_IN_PU,
--		PN1_FN, PN1_OUT, PN1_IN, PN1_IN_PU,
--		PN0_FN, PN0_OUT, PN0_IN, PN0_IN_PU }
-+		PN7_FN, PN7_OUT, PN7_IN, 0,
-+		PN6_FN, PN6_OUT, PN6_IN, 0,
-+		PN5_FN, PN5_OUT, PN5_IN, 0,
-+		PN4_FN, PN4_OUT, PN4_IN, 0,
-+		PN3_FN, PN3_OUT, PN3_IN, 0,
-+		PN2_FN, PN2_OUT, PN2_IN, 0,
-+		PN1_FN, PN1_OUT, PN1_IN, 0,
-+		PN0_FN, PN0_OUT, PN0_IN, 0 }
- 	},
- 	{ PINMUX_CFG_REG("PPCR", 0xffe7001a, 16, 2) {
- 		0, 0, 0, 0,
- 		0, 0, 0, 0,
--		PP5_FN, PP5_OUT, PP5_IN, PP5_IN_PU,
--		PP4_FN, PP4_OUT, PP4_IN, PP4_IN_PU,
--		PP3_FN, PP3_OUT, PP3_IN, PP3_IN_PU,
--		PP2_FN, PP2_OUT, PP2_IN, PP2_IN_PU,
--		PP1_FN, PP1_OUT, PP1_IN, PP1_IN_PU,
--		PP0_FN, PP0_OUT, PP0_IN, PP0_IN_PU }
-+		PP5_FN, PP5_OUT, PP5_IN, 0,
-+		PP4_FN, PP4_OUT, PP4_IN, 0,
-+		PP3_FN, PP3_OUT, PP3_IN, 0,
-+		PP2_FN, PP2_OUT, PP2_IN, 0,
-+		PP1_FN, PP1_OUT, PP1_IN, 0,
-+		PP0_FN, PP0_OUT, PP0_IN, 0 }
- 	},
- 	{ PINMUX_CFG_REG("PQCR", 0xffe7001c, 16, 2) {
- 		0, 0, 0, 0,
- 		0, 0, 0, 0,
- 		0, 0, 0, 0,
--		PQ4_FN, PQ4_OUT, PQ4_IN, PQ4_IN_PU,
--		PQ3_FN, PQ3_OUT, PQ3_IN, PQ3_IN_PU,
--		PQ2_FN, PQ2_OUT, PQ2_IN, PQ2_IN_PU,
--		PQ1_FN, PQ1_OUT, PQ1_IN, PQ1_IN_PU,
--		PQ0_FN, PQ0_OUT, PQ0_IN, PQ0_IN_PU }
-+		PQ4_FN, PQ4_OUT, PQ4_IN, 0,
-+		PQ3_FN, PQ3_OUT, PQ3_IN, 0,
-+		PQ2_FN, PQ2_OUT, PQ2_IN, 0,
-+		PQ1_FN, PQ1_OUT, PQ1_IN, 0,
-+		PQ0_FN, PQ0_OUT, PQ0_IN, 0 }
- 	},
- 	{ PINMUX_CFG_REG("PRCR", 0xffe7001e, 16, 2) {
- 		0, 0, 0, 0,
- 		0, 0, 0, 0,
- 		0, 0, 0, 0,
- 		0, 0, 0, 0,
--		PR3_FN, PR3_OUT, PR3_IN, PR3_IN_PU,
--		PR2_FN, PR2_OUT, PR2_IN, PR2_IN_PU,
--		PR1_FN, PR1_OUT, PR1_IN, PR1_IN_PU,
--		PR0_FN, PR0_OUT, PR0_IN, PR0_IN_PU }
-+		PR3_FN, PR3_OUT, PR3_IN, 0,
-+		PR2_FN, PR2_OUT, PR2_IN, 0,
-+		PR1_FN, PR1_OUT, PR1_IN, 0,
-+		PR0_FN, PR0_OUT, PR0_IN, 0 }
- 	},
- 	{ PINMUX_CFG_REG("P1MSELR", 0xffe70080, 16, 1) {
- 		P1MSEL15_0, P1MSEL15_1,
-@@ -1289,7 +1259,6 @@ static const struct pinmux_data_reg pinmux_data_regs[] = {
- const struct sh_pfc_soc_info sh7785_pinmux_info = {
- 	.name = "sh7785_pfc",
- 	.input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
--	.input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END },
- 	.output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
- 	.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0534-sh-pfc-sh7786-Remove-unused-input_pu-range.patch b/patches.renesas/0534-sh-pfc-sh7786-Remove-unused-input_pu-range.patch
deleted file mode 100644
index e8d85fbcb677a..0000000000000
--- a/patches.renesas/0534-sh-pfc-sh7786-Remove-unused-input_pu-range.patch
+++ /dev/null
@@ -1,357 +0,0 @@
-From 893aed6ea107ac691fdc22d5b20315ccfb3b68c8 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 16 Jul 2013 01:54:13 +0200
-Subject: sh-pfc: sh7786: Remove unused input_pu range
-
-The PFC SH7786 SoC data contains a input_pu range used to configure
-pull-up resistors using the legacy non-pinconf API. That API has been
-removed from the driver, the range is thus not used anymore. Remove it.
-
-If required, configuring pull-up resistors for the SH7786 can be
-implemented using the pinconf API, as done for the SH-Mobile, R-Mobile
-and R-Car platforms.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit 082ab8ff33f250c519b364224263b44a86c71c2d)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-sh7786.c | 260 +++++++++++++++++-------------------
- 1 file changed, 120 insertions(+), 140 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7786.c b/drivers/pinctrl/sh-pfc/pfc-sh7786.c
-index 8ae0e328..c855fca5 100644
---- a/drivers/pinctrl/sh-pfc/pfc-sh7786.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-sh7786.c
-@@ -60,25 +60,6 @@ enum {
- 	PJ3_IN, PJ2_IN, PJ1_IN,
- 	PINMUX_INPUT_END,
- 
--	PINMUX_INPUT_PULLUP_BEGIN,
--	PA7_IN_PU, PA6_IN_PU, PA5_IN_PU, PA4_IN_PU,
--	PA3_IN_PU, PA2_IN_PU, PA1_IN_PU, PA0_IN_PU,
--	PB7_IN_PU, PB6_IN_PU, PB5_IN_PU, PB4_IN_PU,
--	PB3_IN_PU, PB2_IN_PU, PB1_IN_PU, PB0_IN_PU,
--	PC7_IN_PU, PC6_IN_PU, PC5_IN_PU, PC4_IN_PU,
--	PC3_IN_PU, PC2_IN_PU, PC1_IN_PU, PC0_IN_PU,
--	PD7_IN_PU, PD6_IN_PU, PD5_IN_PU, PD4_IN_PU,
--	PD3_IN_PU, PD2_IN_PU, PD1_IN_PU, PD0_IN_PU,
--	PE7_IN_PU, PE6_IN_PU,
--	PF7_IN_PU, PF6_IN_PU, PF5_IN_PU, PF4_IN_PU,
--	PF3_IN_PU, PF2_IN_PU, PF1_IN_PU, PF0_IN_PU,
--	PG7_IN_PU, PG6_IN_PU, PG5_IN_PU,
--	PH7_IN_PU, PH6_IN_PU, PH5_IN_PU, PH4_IN_PU,
--	PH3_IN_PU, PH2_IN_PU, PH1_IN_PU, PH0_IN_PU,
--	PJ7_IN_PU, PJ6_IN_PU, PJ5_IN_PU, PJ4_IN_PU,
--	PJ3_IN_PU, PJ2_IN_PU, PJ1_IN_PU,
--	PINMUX_INPUT_PULLUP_END,
--
- 	PINMUX_OUTPUT_BEGIN,
- 	PA7_OUT, PA6_OUT, PA5_OUT, PA4_OUT,
- 	PA3_OUT, PA2_OUT, PA1_OUT, PA0_OUT,
-@@ -194,82 +175,82 @@ enum {
- static const pinmux_enum_t pinmux_data[] = {
- 
- 	/* PA GPIO */
--	PINMUX_DATA(PA7_DATA, PA7_IN, PA7_OUT, PA7_IN_PU),
--	PINMUX_DATA(PA6_DATA, PA6_IN, PA6_OUT, PA6_IN_PU),
--	PINMUX_DATA(PA5_DATA, PA5_IN, PA5_OUT, PA5_IN_PU),
--	PINMUX_DATA(PA4_DATA, PA4_IN, PA4_OUT, PA4_IN_PU),
--	PINMUX_DATA(PA3_DATA, PA3_IN, PA3_OUT, PA3_IN_PU),
--	PINMUX_DATA(PA2_DATA, PA2_IN, PA2_OUT, PA2_IN_PU),
--	PINMUX_DATA(PA1_DATA, PA1_IN, PA1_OUT, PA1_IN_PU),
--	PINMUX_DATA(PA0_DATA, PA0_IN, PA0_OUT, PA0_IN_PU),
-+	PINMUX_DATA(PA7_DATA, PA7_IN, PA7_OUT),
-+	PINMUX_DATA(PA6_DATA, PA6_IN, PA6_OUT),
-+	PINMUX_DATA(PA5_DATA, PA5_IN, PA5_OUT),
-+	PINMUX_DATA(PA4_DATA, PA4_IN, PA4_OUT),
-+	PINMUX_DATA(PA3_DATA, PA3_IN, PA3_OUT),
-+	PINMUX_DATA(PA2_DATA, PA2_IN, PA2_OUT),
-+	PINMUX_DATA(PA1_DATA, PA1_IN, PA1_OUT),
-+	PINMUX_DATA(PA0_DATA, PA0_IN, PA0_OUT),
- 
- 	/* PB GPIO */
--	PINMUX_DATA(PB7_DATA, PB7_IN, PB7_OUT, PB7_IN_PU),
--	PINMUX_DATA(PB6_DATA, PB6_IN, PB6_OUT, PB6_IN_PU),
--	PINMUX_DATA(PB5_DATA, PB5_IN, PB5_OUT, PB5_IN_PU),
--	PINMUX_DATA(PB4_DATA, PB4_IN, PB4_OUT, PB4_IN_PU),
--	PINMUX_DATA(PB3_DATA, PB3_IN, PB3_OUT, PB3_IN_PU),
--	PINMUX_DATA(PB2_DATA, PB2_IN, PB2_OUT, PB2_IN_PU),
--	PINMUX_DATA(PB1_DATA, PB1_IN, PB1_OUT, PB1_IN_PU),
--	PINMUX_DATA(PB0_DATA, PB0_IN, PB0_OUT, PB0_IN_PU),
-+	PINMUX_DATA(PB7_DATA, PB7_IN, PB7_OUT),
-+	PINMUX_DATA(PB6_DATA, PB6_IN, PB6_OUT),
-+	PINMUX_DATA(PB5_DATA, PB5_IN, PB5_OUT),
-+	PINMUX_DATA(PB4_DATA, PB4_IN, PB4_OUT),
-+	PINMUX_DATA(PB3_DATA, PB3_IN, PB3_OUT),
-+	PINMUX_DATA(PB2_DATA, PB2_IN, PB2_OUT),
-+	PINMUX_DATA(PB1_DATA, PB1_IN, PB1_OUT),
-+	PINMUX_DATA(PB0_DATA, PB0_IN, PB0_OUT),
- 
- 	/* PC GPIO */
--	PINMUX_DATA(PC7_DATA, PC7_IN, PC7_OUT, PC7_IN_PU),
--	PINMUX_DATA(PC6_DATA, PC6_IN, PC6_OUT, PC6_IN_PU),
--	PINMUX_DATA(PC5_DATA, PC5_IN, PC5_OUT, PC5_IN_PU),
--	PINMUX_DATA(PC4_DATA, PC4_IN, PC4_OUT, PC4_IN_PU),
--	PINMUX_DATA(PC3_DATA, PC3_IN, PC3_OUT, PC3_IN_PU),
--	PINMUX_DATA(PC2_DATA, PC2_IN, PC2_OUT, PC2_IN_PU),
--	PINMUX_DATA(PC1_DATA, PC1_IN, PC1_OUT, PC1_IN_PU),
--	PINMUX_DATA(PC0_DATA, PC0_IN, PC0_OUT, PC0_IN_PU),
-+	PINMUX_DATA(PC7_DATA, PC7_IN, PC7_OUT),
-+	PINMUX_DATA(PC6_DATA, PC6_IN, PC6_OUT),
-+	PINMUX_DATA(PC5_DATA, PC5_IN, PC5_OUT),
-+	PINMUX_DATA(PC4_DATA, PC4_IN, PC4_OUT),
-+	PINMUX_DATA(PC3_DATA, PC3_IN, PC3_OUT),
-+	PINMUX_DATA(PC2_DATA, PC2_IN, PC2_OUT),
-+	PINMUX_DATA(PC1_DATA, PC1_IN, PC1_OUT),
-+	PINMUX_DATA(PC0_DATA, PC0_IN, PC0_OUT),
- 
- 	/* PD GPIO */
--	PINMUX_DATA(PD7_DATA, PD7_IN, PD7_OUT, PD7_IN_PU),
--	PINMUX_DATA(PD6_DATA, PD6_IN, PD6_OUT, PD6_IN_PU),
--	PINMUX_DATA(PD5_DATA, PD5_IN, PD5_OUT, PD5_IN_PU),
--	PINMUX_DATA(PD4_DATA, PD4_IN, PD4_OUT, PD4_IN_PU),
--	PINMUX_DATA(PD3_DATA, PD3_IN, PD3_OUT, PD3_IN_PU),
--	PINMUX_DATA(PD2_DATA, PD2_IN, PD2_OUT, PD2_IN_PU),
--	PINMUX_DATA(PD1_DATA, PD1_IN, PD1_OUT, PD1_IN_PU),
--	PINMUX_DATA(PD0_DATA, PD0_IN, PD0_OUT, PD0_IN_PU),
-+	PINMUX_DATA(PD7_DATA, PD7_IN, PD7_OUT),
-+	PINMUX_DATA(PD6_DATA, PD6_IN, PD6_OUT),
-+	PINMUX_DATA(PD5_DATA, PD5_IN, PD5_OUT),
-+	PINMUX_DATA(PD4_DATA, PD4_IN, PD4_OUT),
-+	PINMUX_DATA(PD3_DATA, PD3_IN, PD3_OUT),
-+	PINMUX_DATA(PD2_DATA, PD2_IN, PD2_OUT),
-+	PINMUX_DATA(PD1_DATA, PD1_IN, PD1_OUT),
-+	PINMUX_DATA(PD0_DATA, PD0_IN, PD0_OUT),
- 
- 	/* PE GPIO */
--	PINMUX_DATA(PE7_DATA, PE7_IN, PE7_OUT, PE7_IN_PU),
--	PINMUX_DATA(PE6_DATA, PE6_IN, PE6_OUT, PE6_IN_PU),
-+	PINMUX_DATA(PE7_DATA, PE7_IN, PE7_OUT),
-+	PINMUX_DATA(PE6_DATA, PE6_IN, PE6_OUT),
- 
- 	/* PF GPIO */
--	PINMUX_DATA(PF7_DATA, PF7_IN, PF7_OUT, PF7_IN_PU),
--	PINMUX_DATA(PF6_DATA, PF6_IN, PF6_OUT, PF6_IN_PU),
--	PINMUX_DATA(PF5_DATA, PF5_IN, PF5_OUT, PF5_IN_PU),
--	PINMUX_DATA(PF4_DATA, PF4_IN, PF4_OUT, PF4_IN_PU),
--	PINMUX_DATA(PF3_DATA, PF3_IN, PF3_OUT, PF3_IN_PU),
--	PINMUX_DATA(PF2_DATA, PF2_IN, PF2_OUT, PF2_IN_PU),
--	PINMUX_DATA(PF1_DATA, PF1_IN, PF1_OUT, PF1_IN_PU),
--	PINMUX_DATA(PF0_DATA, PF0_IN, PF0_OUT, PF0_IN_PU),
-+	PINMUX_DATA(PF7_DATA, PF7_IN, PF7_OUT),
-+	PINMUX_DATA(PF6_DATA, PF6_IN, PF6_OUT),
-+	PINMUX_DATA(PF5_DATA, PF5_IN, PF5_OUT),
-+	PINMUX_DATA(PF4_DATA, PF4_IN, PF4_OUT),
-+	PINMUX_DATA(PF3_DATA, PF3_IN, PF3_OUT),
-+	PINMUX_DATA(PF2_DATA, PF2_IN, PF2_OUT),
-+	PINMUX_DATA(PF1_DATA, PF1_IN, PF1_OUT),
-+	PINMUX_DATA(PF0_DATA, PF0_IN, PF0_OUT),
- 
- 	/* PG GPIO */
--	PINMUX_DATA(PG7_DATA, PG7_IN, PG7_OUT, PG7_IN_PU),
--	PINMUX_DATA(PG6_DATA, PG6_IN, PG6_OUT, PG6_IN_PU),
--	PINMUX_DATA(PG5_DATA, PG5_IN, PG5_OUT, PG5_IN_PU),
-+	PINMUX_DATA(PG7_DATA, PG7_IN, PG7_OUT),
-+	PINMUX_DATA(PG6_DATA, PG6_IN, PG6_OUT),
-+	PINMUX_DATA(PG5_DATA, PG5_IN, PG5_OUT),
- 
- 	/* PH GPIO */
--	PINMUX_DATA(PH7_DATA, PH7_IN, PH7_OUT, PH7_IN_PU),
--	PINMUX_DATA(PH6_DATA, PH6_IN, PH6_OUT, PH6_IN_PU),
--	PINMUX_DATA(PH5_DATA, PH5_IN, PH5_OUT, PH5_IN_PU),
--	PINMUX_DATA(PH4_DATA, PH4_IN, PH4_OUT, PH4_IN_PU),
--	PINMUX_DATA(PH3_DATA, PH3_IN, PH3_OUT, PH3_IN_PU),
--	PINMUX_DATA(PH2_DATA, PH2_IN, PH2_OUT, PH2_IN_PU),
--	PINMUX_DATA(PH1_DATA, PH1_IN, PH1_OUT, PH1_IN_PU),
--	PINMUX_DATA(PH0_DATA, PH0_IN, PH0_OUT, PH0_IN_PU),
-+	PINMUX_DATA(PH7_DATA, PH7_IN, PH7_OUT),
-+	PINMUX_DATA(PH6_DATA, PH6_IN, PH6_OUT),
-+	PINMUX_DATA(PH5_DATA, PH5_IN, PH5_OUT),
-+	PINMUX_DATA(PH4_DATA, PH4_IN, PH4_OUT),
-+	PINMUX_DATA(PH3_DATA, PH3_IN, PH3_OUT),
-+	PINMUX_DATA(PH2_DATA, PH2_IN, PH2_OUT),
-+	PINMUX_DATA(PH1_DATA, PH1_IN, PH1_OUT),
-+	PINMUX_DATA(PH0_DATA, PH0_IN, PH0_OUT),
- 
- 	/* PJ GPIO */
--	PINMUX_DATA(PJ7_DATA, PJ7_IN, PJ7_OUT, PJ7_IN_PU),
--	PINMUX_DATA(PJ6_DATA, PJ6_IN, PJ6_OUT, PJ6_IN_PU),
--	PINMUX_DATA(PJ5_DATA, PJ5_IN, PJ5_OUT, PJ5_IN_PU),
--	PINMUX_DATA(PJ4_DATA, PJ4_IN, PJ4_OUT, PJ4_IN_PU),
--	PINMUX_DATA(PJ3_DATA, PJ3_IN, PJ3_OUT, PJ3_IN_PU),
--	PINMUX_DATA(PJ2_DATA, PJ2_IN, PJ2_OUT, PJ2_IN_PU),
--	PINMUX_DATA(PJ1_DATA, PJ1_IN, PJ1_OUT, PJ1_IN_PU),
-+	PINMUX_DATA(PJ7_DATA, PJ7_IN, PJ7_OUT),
-+	PINMUX_DATA(PJ6_DATA, PJ6_IN, PJ6_OUT),
-+	PINMUX_DATA(PJ5_DATA, PJ5_IN, PJ5_OUT),
-+	PINMUX_DATA(PJ4_DATA, PJ4_IN, PJ4_OUT),
-+	PINMUX_DATA(PJ3_DATA, PJ3_IN, PJ3_OUT),
-+	PINMUX_DATA(PJ2_DATA, PJ2_IN, PJ2_OUT),
-+	PINMUX_DATA(PJ1_DATA, PJ1_IN, PJ1_OUT),
- 
- 	/* PA FN */
- 	PINMUX_DATA(CDE_MARK,		P1MSEL2_0, PA7_FN),
-@@ -651,48 +632,48 @@ static const struct pinmux_func pinmux_func_gpios[] = {
- 
- static const struct pinmux_cfg_reg pinmux_config_regs[] = {
- 	{ PINMUX_CFG_REG("PACR", 0xffcc0000, 16, 2) {
--		PA7_FN, PA7_OUT, PA7_IN, PA7_IN_PU,
--		PA6_FN, PA6_OUT, PA6_IN, PA6_IN_PU,
--		PA5_FN, PA5_OUT, PA5_IN, PA5_IN_PU,
--		PA4_FN, PA4_OUT, PA4_IN, PA4_IN_PU,
--		PA3_FN, PA3_OUT, PA3_IN, PA3_IN_PU,
--		PA2_FN, PA2_OUT, PA2_IN, PA2_IN_PU,
--		PA1_FN, PA1_OUT, PA1_IN, PA1_IN_PU,
--		PA0_FN, PA0_OUT, PA0_IN, PA0_IN_PU }
-+		PA7_FN, PA7_OUT, PA7_IN, 0,
-+		PA6_FN, PA6_OUT, PA6_IN, 0,
-+		PA5_FN, PA5_OUT, PA5_IN, 0,
-+		PA4_FN, PA4_OUT, PA4_IN, 0,
-+		PA3_FN, PA3_OUT, PA3_IN, 0,
-+		PA2_FN, PA2_OUT, PA2_IN, 0,
-+		PA1_FN, PA1_OUT, PA1_IN, 0,
-+		PA0_FN, PA0_OUT, PA0_IN, 0 }
- 	},
- 	{ PINMUX_CFG_REG("PBCR", 0xffcc0002, 16, 2) {
--		PB7_FN, PB7_OUT, PB7_IN, PB7_IN_PU,
--		PB6_FN, PB6_OUT, PB6_IN, PB6_IN_PU,
--		PB5_FN, PB5_OUT, PB5_IN, PB5_IN_PU,
--		PB4_FN, PB4_OUT, PB4_IN, PB4_IN_PU,
--		PB3_FN, PB3_OUT, PB3_IN, PB3_IN_PU,
--		PB2_FN, PB2_OUT, PB2_IN, PB2_IN_PU,
--		PB1_FN, PB1_OUT, PB1_IN, PB1_IN_PU,
--		PB0_FN, PB0_OUT, PB0_IN, PB0_IN_PU }
-+		PB7_FN, PB7_OUT, PB7_IN, 0,
-+		PB6_FN, PB6_OUT, PB6_IN, 0,
-+		PB5_FN, PB5_OUT, PB5_IN, 0,
-+		PB4_FN, PB4_OUT, PB4_IN, 0,
-+		PB3_FN, PB3_OUT, PB3_IN, 0,
-+		PB2_FN, PB2_OUT, PB2_IN, 0,
-+		PB1_FN, PB1_OUT, PB1_IN, 0,
-+		PB0_FN, PB0_OUT, PB0_IN, 0 }
- 	},
- 	{ PINMUX_CFG_REG("PCCR", 0xffcc0004, 16, 2) {
--		PC7_FN, PC7_OUT, PC7_IN, PC7_IN_PU,
--		PC6_FN, PC6_OUT, PC6_IN, PC6_IN_PU,
--		PC5_FN, PC5_OUT, PC5_IN, PC5_IN_PU,
--		PC4_FN, PC4_OUT, PC4_IN, PC4_IN_PU,
--		PC3_FN, PC3_OUT, PC3_IN, PC3_IN_PU,
--		PC2_FN, PC2_OUT, PC2_IN, PC2_IN_PU,
--		PC1_FN, PC1_OUT, PC1_IN, PC1_IN_PU,
--		PC0_FN, PC0_OUT, PC0_IN, PC0_IN_PU }
-+		PC7_FN, PC7_OUT, PC7_IN, 0,
-+		PC6_FN, PC6_OUT, PC6_IN, 0,
-+		PC5_FN, PC5_OUT, PC5_IN, 0,
-+		PC4_FN, PC4_OUT, PC4_IN, 0,
-+		PC3_FN, PC3_OUT, PC3_IN, 0,
-+		PC2_FN, PC2_OUT, PC2_IN, 0,
-+		PC1_FN, PC1_OUT, PC1_IN, 0,
-+		PC0_FN, PC0_OUT, PC0_IN, 0 }
- 	},
- 	{ PINMUX_CFG_REG("PDCR", 0xffcc0006, 16, 2) {
--		PD7_FN, PD7_OUT, PD7_IN, PD7_IN_PU,
--		PD6_FN, PD6_OUT, PD6_IN, PD6_IN_PU,
--		PD5_FN, PD5_OUT, PD5_IN, PD5_IN_PU,
--		PD4_FN, PD4_OUT, PD4_IN, PD4_IN_PU,
--		PD3_FN, PD3_OUT, PD3_IN, PD3_IN_PU,
--		PD2_FN, PD2_OUT, PD2_IN, PD2_IN_PU,
--		PD1_FN, PD1_OUT, PD1_IN, PD1_IN_PU,
--		PD0_FN, PD0_OUT, PD0_IN, PD0_IN_PU }
-+		PD7_FN, PD7_OUT, PD7_IN, 0,
-+		PD6_FN, PD6_OUT, PD6_IN, 0,
-+		PD5_FN, PD5_OUT, PD5_IN, 0,
-+		PD4_FN, PD4_OUT, PD4_IN, 0,
-+		PD3_FN, PD3_OUT, PD3_IN, 0,
-+		PD2_FN, PD2_OUT, PD2_IN, 0,
-+		PD1_FN, PD1_OUT, PD1_IN, 0,
-+		PD0_FN, PD0_OUT, PD0_IN, 0 }
- 	},
- 	{ PINMUX_CFG_REG("PECR", 0xffcc0008, 16, 2) {
--		PE7_FN, PE7_OUT, PE7_IN, PE7_IN_PU,
--		PE6_FN, PE6_OUT, PE6_IN, PE6_IN_PU,
-+		PE7_FN, PE7_OUT, PE7_IN, 0,
-+		PE6_FN, PE6_OUT, PE6_IN, 0,
- 		0, 0, 0, 0,
- 		0, 0, 0, 0,
- 		0, 0, 0, 0,
-@@ -701,19 +682,19 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
- 		0, 0, 0, 0, }
- 	},
- 	{ PINMUX_CFG_REG("PFCR", 0xffcc000a, 16, 2) {
--		PF7_FN, PF7_OUT, PF7_IN, PF7_IN_PU,
--		PF6_FN, PF6_OUT, PF6_IN, PF6_IN_PU,
--		PF5_FN, PF5_OUT, PF5_IN, PF5_IN_PU,
--		PF4_FN, PF4_OUT, PF4_IN, PF4_IN_PU,
--		PF3_FN, PF3_OUT, PF3_IN, PF3_IN_PU,
--		PF2_FN, PF2_OUT, PF2_IN, PF2_IN_PU,
--		PF1_FN, PF1_OUT, PF1_IN, PF1_IN_PU,
--		PF0_FN, PF0_OUT, PF0_IN, PF0_IN_PU }
-+		PF7_FN, PF7_OUT, PF7_IN, 0,
-+		PF6_FN, PF6_OUT, PF6_IN, 0,
-+		PF5_FN, PF5_OUT, PF5_IN, 0,
-+		PF4_FN, PF4_OUT, PF4_IN, 0,
-+		PF3_FN, PF3_OUT, PF3_IN, 0,
-+		PF2_FN, PF2_OUT, PF2_IN, 0,
-+		PF1_FN, PF1_OUT, PF1_IN, 0,
-+		PF0_FN, PF0_OUT, PF0_IN, 0 }
- 	},
- 	{ PINMUX_CFG_REG("PGCR", 0xffcc000c, 16, 2) {
--		PG7_FN, PG7_OUT, PG7_IN, PG7_IN_PU,
--		PG6_FN, PG6_OUT, PG6_IN, PG6_IN_PU,
--		PG5_FN, PG5_OUT, PG5_IN, PG5_IN_PU,
-+		PG7_FN, PG7_OUT, PG7_IN, 0,
-+		PG6_FN, PG6_OUT, PG6_IN, 0,
-+		PG5_FN, PG5_OUT, PG5_IN, 0,
- 		0, 0, 0, 0,
- 		0, 0, 0, 0,
- 		0, 0, 0, 0,
-@@ -721,23 +702,23 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
- 		0, 0, 0, 0, }
- 	},
- 	{ PINMUX_CFG_REG("PHCR", 0xffcc000e, 16, 2) {
--		PH7_FN, PH7_OUT, PH7_IN, PH7_IN_PU,
--		PH6_FN, PH6_OUT, PH6_IN, PH6_IN_PU,
--		PH5_FN, PH5_OUT, PH5_IN, PH5_IN_PU,
--		PH4_FN, PH4_OUT, PH4_IN, PH4_IN_PU,
--		PH3_FN, PH3_OUT, PH3_IN, PH3_IN_PU,
--		PH2_FN, PH2_OUT, PH2_IN, PH2_IN_PU,
--		PH1_FN, PH1_OUT, PH1_IN, PH1_IN_PU,
--		PH0_FN, PH0_OUT, PH0_IN, PH0_IN_PU }
-+		PH7_FN, PH7_OUT, PH7_IN, 0,
-+		PH6_FN, PH6_OUT, PH6_IN, 0,
-+		PH5_FN, PH5_OUT, PH5_IN, 0,
-+		PH4_FN, PH4_OUT, PH4_IN, 0,
-+		PH3_FN, PH3_OUT, PH3_IN, 0,
-+		PH2_FN, PH2_OUT, PH2_IN, 0,
-+		PH1_FN, PH1_OUT, PH1_IN, 0,
-+		PH0_FN, PH0_OUT, PH0_IN, 0 }
- 	},
- 	{ PINMUX_CFG_REG("PJCR", 0xffcc0010, 16, 2) {
--		PJ7_FN, PJ7_OUT, PJ7_IN, PJ7_IN_PU,
--		PJ6_FN, PJ6_OUT, PJ6_IN, PJ6_IN_PU,
--		PJ5_FN, PJ5_OUT, PJ5_IN, PJ5_IN_PU,
--		PJ4_FN, PJ4_OUT, PJ4_IN, PJ4_IN_PU,
--		PJ3_FN, PJ3_OUT, PJ3_IN, PJ3_IN_PU,
--		PJ2_FN, PJ2_OUT, PJ2_IN, PJ2_IN_PU,
--		PJ1_FN, PJ1_OUT, PJ1_IN, PJ1_IN_PU,
-+		PJ7_FN, PJ7_OUT, PJ7_IN, 0,
-+		PJ6_FN, PJ6_OUT, PJ6_IN, 0,
-+		PJ5_FN, PJ5_OUT, PJ5_IN, 0,
-+		PJ4_FN, PJ4_OUT, PJ4_IN, 0,
-+		PJ3_FN, PJ3_OUT, PJ3_IN, 0,
-+		PJ2_FN, PJ2_OUT, PJ2_IN, 0,
-+		PJ1_FN, PJ1_OUT, PJ1_IN, 0,
- 		0, 0, 0, 0, }
- 	},
- 	{ PINMUX_CFG_REG("P1MSELR", 0xffcc0080, 16, 1) {
-@@ -822,7 +803,6 @@ static const struct pinmux_data_reg pinmux_data_regs[] = {
- const struct sh_pfc_soc_info sh7786_pinmux_info = {
- 	.name = "sh7786_pfc",
- 	.input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
--	.input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END },
- 	.output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
- 	.function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0535-sh-pfc-shx3-Remove-unused-input_pu-range.patch b/patches.renesas/0535-sh-pfc-shx3-Remove-unused-input_pu-range.patch
deleted file mode 100644
index 6ee768352579a..0000000000000
--- a/patches.renesas/0535-sh-pfc-shx3-Remove-unused-input_pu-range.patch
+++ /dev/null
@@ -1,347 +0,0 @@
-From a5a537442dd969813778ef269b4ff370879bcb32 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 16 Jul 2013 01:54:13 +0200
-Subject: sh-pfc: shx3: Remove unused input_pu range
-
-The PFC SHX3 SoC data contains a input_pu range used to configure
-pull-up resistors using the legacy non-pinconf API. That API has been
-removed from the driver, the range is thus not used anymore. Remove it.
-
-If required, configuring pull-up resistors for the SHX3 can be
-implemented using the pinconf API, as done for the SH-Mobile, R-Mobile
-and R-Car platforms.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit 4e5ca4a1e65d6c9f7a26b8af26ec6cf1c516f31b)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-shx3.c | 270 +++++++++++++++++---------------------
- 1 file changed, 124 insertions(+), 146 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-shx3.c b/drivers/pinctrl/sh-pfc/pfc-shx3.c
-index 6594c8c4..50d9c5d8 100644
---- a/drivers/pinctrl/sh-pfc/pfc-shx3.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-shx3.c
-@@ -56,26 +56,6 @@ enum {
- 	PH3_IN, PH2_IN, PH1_IN, PH0_IN,
- 	PINMUX_INPUT_END,
- 
--	PINMUX_INPUT_PULLUP_BEGIN,
--	PA7_IN_PU, PA6_IN_PU, PA5_IN_PU, PA4_IN_PU,
--	PA3_IN_PU, PA2_IN_PU, PA1_IN_PU, PA0_IN_PU,
--	PB7_IN_PU, PB6_IN_PU, PB5_IN_PU, PB4_IN_PU,
--	PB3_IN_PU, PB2_IN_PU, PB1_IN_PU, PB0_IN_PU,
--	PC7_IN_PU, PC6_IN_PU, PC5_IN_PU, PC4_IN_PU,
--	PC3_IN_PU, PC2_IN_PU, PC1_IN_PU, PC0_IN_PU,
--	PD7_IN_PU, PD6_IN_PU, PD5_IN_PU, PD4_IN_PU,
--	PD3_IN_PU, PD2_IN_PU, PD1_IN_PU, PD0_IN_PU,
--	PE7_IN_PU, PE6_IN_PU, PE5_IN_PU, PE4_IN_PU,
--	PE3_IN_PU, PE2_IN_PU, PE1_IN_PU, PE0_IN_PU,
--	PF7_IN_PU, PF6_IN_PU, PF5_IN_PU, PF4_IN_PU,
--	PF3_IN_PU, PF2_IN_PU, PF1_IN_PU, PF0_IN_PU,
--	PG7_IN_PU, PG6_IN_PU, PG5_IN_PU, PG4_IN_PU,
--	PG3_IN_PU, PG2_IN_PU, PG1_IN_PU, PG0_IN_PU,
--
--	PH5_IN_PU, PH4_IN_PU,
--	PH3_IN_PU, PH2_IN_PU, PH1_IN_PU, PH0_IN_PU,
--	PINMUX_INPUT_PULLUP_END,
--
- 	PINMUX_OUTPUT_BEGIN,
- 	PA7_OUT, PA6_OUT, PA5_OUT, PA4_OUT,
- 	PA3_OUT, PA2_OUT, PA1_OUT, PA0_OUT,
-@@ -150,82 +130,82 @@ enum {
- static const pinmux_enum_t shx3_pinmux_data[] = {
- 
- 	/* PA GPIO */
--	PINMUX_DATA(PA7_DATA, PA7_IN, PA7_OUT, PA7_IN_PU),
--	PINMUX_DATA(PA6_DATA, PA6_IN, PA6_OUT, PA6_IN_PU),
--	PINMUX_DATA(PA5_DATA, PA5_IN, PA5_OUT, PA5_IN_PU),
--	PINMUX_DATA(PA4_DATA, PA4_IN, PA4_OUT, PA4_IN_PU),
--	PINMUX_DATA(PA3_DATA, PA3_IN, PA3_OUT, PA3_IN_PU),
--	PINMUX_DATA(PA2_DATA, PA2_IN, PA2_OUT, PA2_IN_PU),
--	PINMUX_DATA(PA1_DATA, PA1_IN, PA1_OUT, PA1_IN_PU),
--	PINMUX_DATA(PA0_DATA, PA0_IN, PA0_OUT, PA0_IN_PU),
-+	PINMUX_DATA(PA7_DATA, PA7_IN, PA7_OUT),
-+	PINMUX_DATA(PA6_DATA, PA6_IN, PA6_OUT),
-+	PINMUX_DATA(PA5_DATA, PA5_IN, PA5_OUT),
-+	PINMUX_DATA(PA4_DATA, PA4_IN, PA4_OUT),
-+	PINMUX_DATA(PA3_DATA, PA3_IN, PA3_OUT),
-+	PINMUX_DATA(PA2_DATA, PA2_IN, PA2_OUT),
-+	PINMUX_DATA(PA1_DATA, PA1_IN, PA1_OUT),
-+	PINMUX_DATA(PA0_DATA, PA0_IN, PA0_OUT),
- 
- 	/* PB GPIO */
--	PINMUX_DATA(PB7_DATA, PB7_IN, PB7_OUT, PB7_IN_PU),
--	PINMUX_DATA(PB6_DATA, PB6_IN, PB6_OUT, PB6_IN_PU),
--	PINMUX_DATA(PB5_DATA, PB5_IN, PB5_OUT, PB5_IN_PU),
--	PINMUX_DATA(PB4_DATA, PB4_IN, PB4_OUT, PB4_IN_PU),
--	PINMUX_DATA(PB3_DATA, PB3_IN, PB3_OUT, PB3_IN_PU),
--	PINMUX_DATA(PB2_DATA, PB2_IN, PB2_OUT, PB2_IN_PU),
--	PINMUX_DATA(PB1_DATA, PB1_IN, PB1_OUT, PB1_IN_PU),
--	PINMUX_DATA(PB0_DATA, PB0_IN, PB0_OUT, PB0_IN_PU),
-+	PINMUX_DATA(PB7_DATA, PB7_IN, PB7_OUT),
-+	PINMUX_DATA(PB6_DATA, PB6_IN, PB6_OUT),
-+	PINMUX_DATA(PB5_DATA, PB5_IN, PB5_OUT),
-+	PINMUX_DATA(PB4_DATA, PB4_IN, PB4_OUT),
-+	PINMUX_DATA(PB3_DATA, PB3_IN, PB3_OUT),
-+	PINMUX_DATA(PB2_DATA, PB2_IN, PB2_OUT),
-+	PINMUX_DATA(PB1_DATA, PB1_IN, PB1_OUT),
-+	PINMUX_DATA(PB0_DATA, PB0_IN, PB0_OUT),
- 
- 	/* PC GPIO */
--	PINMUX_DATA(PC7_DATA, PC7_IN, PC7_OUT, PC7_IN_PU),
--	PINMUX_DATA(PC6_DATA, PC6_IN, PC6_OUT, PC6_IN_PU),
--	PINMUX_DATA(PC5_DATA, PC5_IN, PC5_OUT, PC5_IN_PU),
--	PINMUX_DATA(PC4_DATA, PC4_IN, PC4_OUT, PC4_IN_PU),
--	PINMUX_DATA(PC3_DATA, PC3_IN, PC3_OUT, PC3_IN_PU),
--	PINMUX_DATA(PC2_DATA, PC2_IN, PC2_OUT, PC2_IN_PU),
--	PINMUX_DATA(PC1_DATA, PC1_IN, PC1_OUT, PC1_IN_PU),
--	PINMUX_DATA(PC0_DATA, PC0_IN, PC0_OUT, PC0_IN_PU),
-+	PINMUX_DATA(PC7_DATA, PC7_IN, PC7_OUT),
-+	PINMUX_DATA(PC6_DATA, PC6_IN, PC6_OUT),
-+	PINMUX_DATA(PC5_DATA, PC5_IN, PC5_OUT),
-+	PINMUX_DATA(PC4_DATA, PC4_IN, PC4_OUT),
-+	PINMUX_DATA(PC3_DATA, PC3_IN, PC3_OUT),
-+	PINMUX_DATA(PC2_DATA, PC2_IN, PC2_OUT),
-+	PINMUX_DATA(PC1_DATA, PC1_IN, PC1_OUT),
-+	PINMUX_DATA(PC0_DATA, PC0_IN, PC0_OUT),
- 
- 	/* PD GPIO */
--	PINMUX_DATA(PD7_DATA, PD7_IN, PD7_OUT, PD7_IN_PU),
--	PINMUX_DATA(PD6_DATA, PD6_IN, PD6_OUT, PD6_IN_PU),
--	PINMUX_DATA(PD5_DATA, PD5_IN, PD5_OUT, PD5_IN_PU),
--	PINMUX_DATA(PD4_DATA, PD4_IN, PD4_OUT, PD4_IN_PU),
--	PINMUX_DATA(PD3_DATA, PD3_IN, PD3_OUT, PD3_IN_PU),
--	PINMUX_DATA(PD2_DATA, PD2_IN, PD2_OUT, PD2_IN_PU),
--	PINMUX_DATA(PD1_DATA, PD1_IN, PD1_OUT, PD1_IN_PU),
--	PINMUX_DATA(PD0_DATA, PD0_IN, PD0_OUT, PD0_IN_PU),
-+	PINMUX_DATA(PD7_DATA, PD7_IN, PD7_OUT),
-+	PINMUX_DATA(PD6_DATA, PD6_IN, PD6_OUT),
-+	PINMUX_DATA(PD5_DATA, PD5_IN, PD5_OUT),
-+	PINMUX_DATA(PD4_DATA, PD4_IN, PD4_OUT),
-+	PINMUX_DATA(PD3_DATA, PD3_IN, PD3_OUT),
-+	PINMUX_DATA(PD2_DATA, PD2_IN, PD2_OUT),
-+	PINMUX_DATA(PD1_DATA, PD1_IN, PD1_OUT),
-+	PINMUX_DATA(PD0_DATA, PD0_IN, PD0_OUT),
- 
- 	/* PE GPIO */
--	PINMUX_DATA(PE7_DATA, PE7_IN, PE7_OUT, PE7_IN_PU),
--	PINMUX_DATA(PE6_DATA, PE6_IN, PE6_OUT, PE6_IN_PU),
--	PINMUX_DATA(PE5_DATA, PE5_IN, PE5_OUT, PE5_IN_PU),
--	PINMUX_DATA(PE4_DATA, PE4_IN, PE4_OUT, PE4_IN_PU),
--	PINMUX_DATA(PE3_DATA, PE3_IN, PE3_OUT, PE3_IN_PU),
--	PINMUX_DATA(PE2_DATA, PE2_IN, PE2_OUT, PE2_IN_PU),
--	PINMUX_DATA(PE1_DATA, PE1_IN, PE1_OUT, PE1_IN_PU),
--	PINMUX_DATA(PE0_DATA, PE0_IN, PE0_OUT, PE0_IN_PU),
-+	PINMUX_DATA(PE7_DATA, PE7_IN, PE7_OUT),
-+	PINMUX_DATA(PE6_DATA, PE6_IN, PE6_OUT),
-+	PINMUX_DATA(PE5_DATA, PE5_IN, PE5_OUT),
-+	PINMUX_DATA(PE4_DATA, PE4_IN, PE4_OUT),
-+	PINMUX_DATA(PE3_DATA, PE3_IN, PE3_OUT),
-+	PINMUX_DATA(PE2_DATA, PE2_IN, PE2_OUT),
-+	PINMUX_DATA(PE1_DATA, PE1_IN, PE1_OUT),
-+	PINMUX_DATA(PE0_DATA, PE0_IN, PE0_OUT),
- 
- 	/* PF GPIO */
--	PINMUX_DATA(PF7_DATA, PF7_IN, PF7_OUT, PF7_IN_PU),
--	PINMUX_DATA(PF6_DATA, PF6_IN, PF6_OUT, PF6_IN_PU),
--	PINMUX_DATA(PF5_DATA, PF5_IN, PF5_OUT, PF5_IN_PU),
--	PINMUX_DATA(PF4_DATA, PF4_IN, PF4_OUT, PF4_IN_PU),
--	PINMUX_DATA(PF3_DATA, PF3_IN, PF3_OUT, PF3_IN_PU),
--	PINMUX_DATA(PF2_DATA, PF2_IN, PF2_OUT, PF2_IN_PU),
--	PINMUX_DATA(PF1_DATA, PF1_IN, PF1_OUT, PF1_IN_PU),
--	PINMUX_DATA(PF0_DATA, PF0_IN, PF0_OUT, PF0_IN_PU),
-+	PINMUX_DATA(PF7_DATA, PF7_IN, PF7_OUT),
-+	PINMUX_DATA(PF6_DATA, PF6_IN, PF6_OUT),
-+	PINMUX_DATA(PF5_DATA, PF5_IN, PF5_OUT),
-+	PINMUX_DATA(PF4_DATA, PF4_IN, PF4_OUT),
-+	PINMUX_DATA(PF3_DATA, PF3_IN, PF3_OUT),
-+	PINMUX_DATA(PF2_DATA, PF2_IN, PF2_OUT),
-+	PINMUX_DATA(PF1_DATA, PF1_IN, PF1_OUT),
-+	PINMUX_DATA(PF0_DATA, PF0_IN, PF0_OUT),
- 
- 	/* PG GPIO */
--	PINMUX_DATA(PG7_DATA, PG7_IN, PG7_OUT, PG7_IN_PU),
--	PINMUX_DATA(PG6_DATA, PG6_IN, PG6_OUT, PG6_IN_PU),
--	PINMUX_DATA(PG5_DATA, PG5_IN, PG5_OUT, PG5_IN_PU),
--	PINMUX_DATA(PG4_DATA, PG4_IN, PG4_OUT, PG4_IN_PU),
--	PINMUX_DATA(PG3_DATA, PG3_IN, PG3_OUT, PG3_IN_PU),
--	PINMUX_DATA(PG2_DATA, PG2_IN, PG2_OUT, PG2_IN_PU),
--	PINMUX_DATA(PG1_DATA, PG1_IN, PG1_OUT, PG1_IN_PU),
--	PINMUX_DATA(PG0_DATA, PG0_IN, PG0_OUT, PG0_IN_PU),
-+	PINMUX_DATA(PG7_DATA, PG7_IN, PG7_OUT),
-+	PINMUX_DATA(PG6_DATA, PG6_IN, PG6_OUT),
-+	PINMUX_DATA(PG5_DATA, PG5_IN, PG5_OUT),
-+	PINMUX_DATA(PG4_DATA, PG4_IN, PG4_OUT),
-+	PINMUX_DATA(PG3_DATA, PG3_IN, PG3_OUT),
-+	PINMUX_DATA(PG2_DATA, PG2_IN, PG2_OUT),
-+	PINMUX_DATA(PG1_DATA, PG1_IN, PG1_OUT),
-+	PINMUX_DATA(PG0_DATA, PG0_IN, PG0_OUT),
- 
- 	/* PH GPIO */
--	PINMUX_DATA(PH5_DATA, PH5_IN, PH5_OUT, PH5_IN_PU),
--	PINMUX_DATA(PH4_DATA, PH4_IN, PH4_OUT, PH4_IN_PU),
--	PINMUX_DATA(PH3_DATA, PH3_IN, PH3_OUT, PH3_IN_PU),
--	PINMUX_DATA(PH2_DATA, PH2_IN, PH2_OUT, PH2_IN_PU),
--	PINMUX_DATA(PH1_DATA, PH1_IN, PH1_OUT, PH1_IN_PU),
--	PINMUX_DATA(PH0_DATA, PH0_IN, PH0_OUT, PH0_IN_PU),
-+	PINMUX_DATA(PH5_DATA, PH5_IN, PH5_OUT),
-+	PINMUX_DATA(PH4_DATA, PH4_IN, PH4_OUT),
-+	PINMUX_DATA(PH3_DATA, PH3_IN, PH3_OUT),
-+	PINMUX_DATA(PH2_DATA, PH2_IN, PH2_OUT),
-+	PINMUX_DATA(PH1_DATA, PH1_IN, PH1_OUT),
-+	PINMUX_DATA(PH0_DATA, PH0_IN, PH0_OUT),
- 
- 	/* PA FN */
- 	PINMUX_DATA(D31_MARK, PA7_FN),
-@@ -456,76 +436,76 @@ static const struct pinmux_func shx3_pinmux_func_gpios[] = {
- 
- static const struct pinmux_cfg_reg shx3_pinmux_config_regs[] = {
- 	{ PINMUX_CFG_REG("PABCR", 0xffc70000, 32, 2) {
--		PA7_FN, PA7_OUT, PA7_IN, PA7_IN_PU,
--		PA6_FN, PA6_OUT, PA6_IN, PA6_IN_PU,
--		PA5_FN, PA5_OUT, PA5_IN, PA5_IN_PU,
--		PA4_FN, PA4_OUT, PA4_IN, PA4_IN_PU,
--		PA3_FN, PA3_OUT, PA3_IN, PA3_IN_PU,
--		PA2_FN, PA2_OUT, PA2_IN, PA2_IN_PU,
--		PA1_FN, PA1_OUT, PA1_IN, PA1_IN_PU,
--		PA0_FN, PA0_OUT, PA0_IN, PA0_IN_PU,
--		PB7_FN, PB7_OUT, PB7_IN, PB7_IN_PU,
--		PB6_FN, PB6_OUT, PB6_IN, PB6_IN_PU,
--		PB5_FN, PB5_OUT, PB5_IN, PB5_IN_PU,
--		PB4_FN, PB4_OUT, PB4_IN, PB4_IN_PU,
--		PB3_FN, PB3_OUT, PB3_IN, PB3_IN_PU,
--		PB2_FN, PB2_OUT, PB2_IN, PB2_IN_PU,
--		PB1_FN, PB1_OUT, PB1_IN, PB1_IN_PU,
--		PB0_FN, PB0_OUT, PB0_IN, PB0_IN_PU, },
-+		PA7_FN, PA7_OUT, PA7_IN, 0,
-+		PA6_FN, PA6_OUT, PA6_IN, 0,
-+		PA5_FN, PA5_OUT, PA5_IN, 0,
-+		PA4_FN, PA4_OUT, PA4_IN, 0,
-+		PA3_FN, PA3_OUT, PA3_IN, 0,
-+		PA2_FN, PA2_OUT, PA2_IN, 0,
-+		PA1_FN, PA1_OUT, PA1_IN, 0,
-+		PA0_FN, PA0_OUT, PA0_IN, 0,
-+		PB7_FN, PB7_OUT, PB7_IN, 0,
-+		PB6_FN, PB6_OUT, PB6_IN, 0,
-+		PB5_FN, PB5_OUT, PB5_IN, 0,
-+		PB4_FN, PB4_OUT, PB4_IN, 0,
-+		PB3_FN, PB3_OUT, PB3_IN, 0,
-+		PB2_FN, PB2_OUT, PB2_IN, 0,
-+		PB1_FN, PB1_OUT, PB1_IN, 0,
-+		PB0_FN, PB0_OUT, PB0_IN, 0, },
- 	},
- 	{ PINMUX_CFG_REG("PCDCR", 0xffc70004, 32, 2) {
--		PC7_FN, PC7_OUT, PC7_IN, PC7_IN_PU,
--		PC6_FN, PC6_OUT, PC6_IN, PC6_IN_PU,
--		PC5_FN, PC5_OUT, PC5_IN, PC5_IN_PU,
--		PC4_FN, PC4_OUT, PC4_IN, PC4_IN_PU,
--		PC3_FN, PC3_OUT, PC3_IN, PC3_IN_PU,
--		PC2_FN, PC2_OUT, PC2_IN, PC2_IN_PU,
--		PC1_FN, PC1_OUT, PC1_IN, PC1_IN_PU,
--		PC0_FN, PC0_OUT, PC0_IN, PC0_IN_PU,
--		PD7_FN, PD7_OUT, PD7_IN, PD7_IN_PU,
--		PD6_FN, PD6_OUT, PD6_IN, PD6_IN_PU,
--		PD5_FN, PD5_OUT, PD5_IN, PD5_IN_PU,
--		PD4_FN, PD4_OUT, PD4_IN, PD4_IN_PU,
--		PD3_FN, PD3_OUT, PD3_IN, PD3_IN_PU,
--		PD2_FN, PD2_OUT, PD2_IN, PD2_IN_PU,
--		PD1_FN, PD1_OUT, PD1_IN, PD1_IN_PU,
--		PD0_FN, PD0_OUT, PD0_IN, PD0_IN_PU, },
-+		PC7_FN, PC7_OUT, PC7_IN, 0,
-+		PC6_FN, PC6_OUT, PC6_IN, 0,
-+		PC5_FN, PC5_OUT, PC5_IN, 0,
-+		PC4_FN, PC4_OUT, PC4_IN, 0,
-+		PC3_FN, PC3_OUT, PC3_IN, 0,
-+		PC2_FN, PC2_OUT, PC2_IN, 0,
-+		PC1_FN, PC1_OUT, PC1_IN, 0,
-+		PC0_FN, PC0_OUT, PC0_IN, 0,
-+		PD7_FN, PD7_OUT, PD7_IN, 0,
-+		PD6_FN, PD6_OUT, PD6_IN, 0,
-+		PD5_FN, PD5_OUT, PD5_IN, 0,
-+		PD4_FN, PD4_OUT, PD4_IN, 0,
-+		PD3_FN, PD3_OUT, PD3_IN, 0,
-+		PD2_FN, PD2_OUT, PD2_IN, 0,
-+		PD1_FN, PD1_OUT, PD1_IN, 0,
-+		PD0_FN, PD0_OUT, PD0_IN, 0, },
- 	},
- 	{ PINMUX_CFG_REG("PEFCR", 0xffc70008, 32, 2) {
--		PE7_FN, PE7_OUT, PE7_IN, PE7_IN_PU,
--		PE6_FN, PE6_OUT, PE6_IN, PE6_IN_PU,
--		PE5_FN, PE5_OUT, PE5_IN, PE5_IN_PU,
--		PE4_FN, PE4_OUT, PE4_IN, PE4_IN_PU,
--		PE3_FN, PE3_OUT, PE3_IN, PE3_IN_PU,
--		PE2_FN, PE2_OUT, PE2_IN, PE2_IN_PU,
--		PE1_FN, PE1_OUT, PE1_IN, PE1_IN_PU,
--		PE0_FN, PE0_OUT, PE0_IN, PE0_IN_PU,
--		PF7_FN, PF7_OUT, PF7_IN, PF7_IN_PU,
--		PF6_FN, PF6_OUT, PF6_IN, PF6_IN_PU,
--		PF5_FN, PF5_OUT, PF5_IN, PF5_IN_PU,
--		PF4_FN, PF4_OUT, PF4_IN, PF4_IN_PU,
--		PF3_FN, PF3_OUT, PF3_IN, PF3_IN_PU,
--		PF2_FN, PF2_OUT, PF2_IN, PF2_IN_PU,
--		PF1_FN, PF1_OUT, PF1_IN, PF1_IN_PU,
--		PF0_FN, PF0_OUT, PF0_IN, PF0_IN_PU, },
-+		PE7_FN, PE7_OUT, PE7_IN, 0,
-+		PE6_FN, PE6_OUT, PE6_IN, 0,
-+		PE5_FN, PE5_OUT, PE5_IN, 0,
-+		PE4_FN, PE4_OUT, PE4_IN, 0,
-+		PE3_FN, PE3_OUT, PE3_IN, 0,
-+		PE2_FN, PE2_OUT, PE2_IN, 0,
-+		PE1_FN, PE1_OUT, PE1_IN, 0,
-+		PE0_FN, PE0_OUT, PE0_IN, 0,
-+		PF7_FN, PF7_OUT, PF7_IN, 0,
-+		PF6_FN, PF6_OUT, PF6_IN, 0,
-+		PF5_FN, PF5_OUT, PF5_IN, 0,
-+		PF4_FN, PF4_OUT, PF4_IN, 0,
-+		PF3_FN, PF3_OUT, PF3_IN, 0,
-+		PF2_FN, PF2_OUT, PF2_IN, 0,
-+		PF1_FN, PF1_OUT, PF1_IN, 0,
-+		PF0_FN, PF0_OUT, PF0_IN, 0, },
- 	},
- 	{ PINMUX_CFG_REG("PGHCR", 0xffc7000c, 32, 2) {
--		PG7_FN, PG7_OUT, PG7_IN, PG7_IN_PU,
--		PG6_FN, PG6_OUT, PG6_IN, PG6_IN_PU,
--		PG5_FN, PG5_OUT, PG5_IN, PG5_IN_PU,
--		PG4_FN, PG4_OUT, PG4_IN, PG4_IN_PU,
--		PG3_FN, PG3_OUT, PG3_IN, PG3_IN_PU,
--		PG2_FN, PG2_OUT, PG2_IN, PG2_IN_PU,
--		PG1_FN, PG1_OUT, PG1_IN, PG1_IN_PU,
--		PG0_FN, PG0_OUT, PG0_IN, PG0_IN_PU,
-+		PG7_FN, PG7_OUT, PG7_IN, 0,
-+		PG6_FN, PG6_OUT, PG6_IN, 0,
-+		PG5_FN, PG5_OUT, PG5_IN, 0,
-+		PG4_FN, PG4_OUT, PG4_IN, 0,
-+		PG3_FN, PG3_OUT, PG3_IN, 0,
-+		PG2_FN, PG2_OUT, PG2_IN, 0,
-+		PG1_FN, PG1_OUT, PG1_IN, 0,
-+		PG0_FN, PG0_OUT, PG0_IN, 0,
- 		0, 0, 0, 0,
- 		0, 0, 0, 0,
--		PH5_FN, PH5_OUT, PH5_IN, PH5_IN_PU,
--		PH4_FN, PH4_OUT, PH4_IN, PH4_IN_PU,
--		PH3_FN, PH3_OUT, PH3_IN, PH3_IN_PU,
--		PH2_FN, PH2_OUT, PH2_IN, PH2_IN_PU,
--		PH1_FN, PH1_OUT, PH1_IN, PH1_IN_PU,
--		PH0_FN, PH0_OUT, PH0_IN, PH0_IN_PU, },
-+		PH5_FN, PH5_OUT, PH5_IN, 0,
-+		PH4_FN, PH4_OUT, PH4_IN, 0,
-+		PH3_FN, PH3_OUT, PH3_IN, 0,
-+		PH2_FN, PH2_OUT, PH2_IN, 0,
-+		PH1_FN, PH1_OUT, PH1_IN, 0,
-+		PH0_FN, PH0_OUT, PH0_IN, 0, },
- 	},
- 	{ },
- };
-@@ -569,8 +549,6 @@ static const struct pinmux_data_reg shx3_pinmux_data_regs[] = {
- const struct sh_pfc_soc_info shx3_pinmux_info = {
- 	.name		= "shx3_pfc",
- 	.input		= { PINMUX_INPUT_BEGIN,	   PINMUX_INPUT_END },
--	.input_pu	= { PINMUX_INPUT_PULLUP_BEGIN,
--			    PINMUX_INPUT_PULLUP_END },
- 	.output		= { PINMUX_OUTPUT_BEGIN,   PINMUX_OUTPUT_END },
- 	.function	= { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
- 	.pins		= shx3_pinmux_pins,
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0536-sh-pfc-Remove-unused-input_pd-and-input_pu-ranges.patch b/patches.renesas/0536-sh-pfc-Remove-unused-input_pd-and-input_pu-ranges.patch
deleted file mode 100644
index 87db9ef7e6ded..0000000000000
--- a/patches.renesas/0536-sh-pfc-Remove-unused-input_pd-and-input_pu-ranges.patch
+++ /dev/null
@@ -1,60 +0,0 @@
-From 1ad4494de598849e03e68aed52ffe43cdc4874f3 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 16 Jul 2013 02:01:00 +0200
-Subject: sh-pfc: Remove unused input_pd and input_pu ranges
-
-The ranges are not used anymore, remove them.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
-(cherry picked from commit 75906431564c85738189a000e6e81c29123c61da)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/core.c   | 8 --------
- drivers/pinctrl/sh-pfc/sh_pfc.h | 4 ----
- 2 files changed, 12 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/core.c b/drivers/pinctrl/sh-pfc/core.c
-index f3fc66b2..1c8597cf 100644
---- a/drivers/pinctrl/sh-pfc/core.c
-+++ b/drivers/pinctrl/sh-pfc/core.c
-@@ -283,14 +283,6 @@ int sh_pfc_config_mux(struct sh_pfc *pfc, unsigned mark, int pinmux_type)
- 		range = &pfc->info->input;
- 		break;
- 
--	case PINMUX_TYPE_INPUT_PULLUP:
--		range = &pfc->info->input_pu;
--		break;
--
--	case PINMUX_TYPE_INPUT_PULLDOWN:
--		range = &pfc->info->input_pd;
--		break;
--
- 	default:
- 		return -EINVAL;
- 	}
-diff --git a/drivers/pinctrl/sh-pfc/sh_pfc.h b/drivers/pinctrl/sh-pfc/sh_pfc.h
-index 830ae1ff..64219f6b 100644
---- a/drivers/pinctrl/sh-pfc/sh_pfc.h
-+++ b/drivers/pinctrl/sh-pfc/sh_pfc.h
-@@ -25,8 +25,6 @@ enum {
- 	PINMUX_TYPE_GPIO,
- 	PINMUX_TYPE_OUTPUT,
- 	PINMUX_TYPE_INPUT,
--	PINMUX_TYPE_INPUT_PULLUP,
--	PINMUX_TYPE_INPUT_PULLDOWN,
- 
- 	PINMUX_FLAG_TYPE,	/* must be last */
- };
-@@ -141,8 +139,6 @@ struct sh_pfc_soc_info {
- 	const struct sh_pfc_soc_operations *ops;
- 
- 	struct pinmux_range input;
--	struct pinmux_range input_pd;
--	struct pinmux_range input_pu;
- 	struct pinmux_range output;
- 	struct pinmux_range function;
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0537-sh-pfc-Remove-unused-PORT_DATA_-macros.patch b/patches.renesas/0537-sh-pfc-Remove-unused-PORT_DATA_-macros.patch
deleted file mode 100644
index 9e0b2b053cd6c..0000000000000
--- a/patches.renesas/0537-sh-pfc-Remove-unused-PORT_DATA_-macros.patch
+++ /dev/null
@@ -1,63 +0,0 @@
-From 2d01248af781e3a88a679ae9c56e66e5991965ae Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Sun, 14 Jul 2013 19:58:57 +0200
-Subject: sh-pfc: Remove unused PORT_DATA_* macros
-
-Most of the PORT_DATA_* macros are not used, remove them.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
-(cherry picked from commit b7e760e0b80ba236b5db96e921c5a8fc3d61f2af)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/sh_pfc.h | 30 ------------------------------
- 1 file changed, 30 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/sh_pfc.h b/drivers/pinctrl/sh-pfc/sh_pfc.h
-index 64219f6b..0e3e00fa 100644
---- a/drivers/pinctrl/sh-pfc/sh_pfc.h
-+++ b/drivers/pinctrl/sh-pfc/sh_pfc.h
-@@ -209,40 +209,10 @@ enum { GPIO_CFG_REQ, GPIO_CFG_FREE };
- #define GPIO_FN(str) PINMUX_GPIO_FN(GPIO_FN_##str, PINMUX_FN_BASE, str##_MARK)
- 
- /* helper macro for pinmux_enum_t */
--#define PORT_DATA_I(nr)	\
--	PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_IN)
--
--#define PORT_DATA_I_PD(nr)	\
--	PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0,	\
--		    PORT##nr##_IN, PORT##nr##_IN_PD)
--
--#define PORT_DATA_I_PU(nr)	\
--	PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0,	\
--		    PORT##nr##_IN, PORT##nr##_IN_PU)
--
--#define PORT_DATA_I_PU_PD(nr)	\
--	PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0,			\
--		    PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
--
--#define PORT_DATA_O(nr)		\
--	PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT)
--
- #define PORT_DATA_IO(nr)	\
- 	PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT,	\
- 		    PORT##nr##_IN)
- 
--#define PORT_DATA_IO_PD(nr)	\
--	PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT,	\
--		    PORT##nr##_IN, PORT##nr##_IN_PD)
--
--#define PORT_DATA_IO_PU(nr)	\
--	PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT,	\
--		    PORT##nr##_IN, PORT##nr##_IN_PU)
--
--#define PORT_DATA_IO_PU_PD(nr)	\
--	PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT,	\
--		    PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
--
- /* helper macro for top 4 bits in PORTnCR */
- #define _PCRH(in, in_pd, in_pu, out)	\
- 	0, (out), (in), 0,		\
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0538-sh-pfc-Remove-unused-macro-and-enum-entries.patch b/patches.renesas/0538-sh-pfc-Remove-unused-macro-and-enum-entries.patch
deleted file mode 100644
index a84e51a8bbc96..0000000000000
--- a/patches.renesas/0538-sh-pfc-Remove-unused-macro-and-enum-entries.patch
+++ /dev/null
@@ -1,50 +0,0 @@
-From d90b807f45429fd19ea5be604e73d3457d83c921 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Sun, 14 Jul 2013 19:59:50 +0200
-Subject: sh-pfc: Remove unused macro and enum entries
-
-The SH_PFC_MARK_INVALID macro and the PINMUX_FLAG_TYPE, GPIO_CFG_REQ and
-GPIO_CFG_FREE enum entries are used, remove them.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
-(cherry picked from commit 487bca0390ad8f78ab9e885897e72218ef704ff5)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/sh_pfc.h | 7 -------
- 1 file changed, 7 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/sh_pfc.h b/drivers/pinctrl/sh-pfc/sh_pfc.h
-index 0e3e00fa..d0a8ff8d 100644
---- a/drivers/pinctrl/sh-pfc/sh_pfc.h
-+++ b/drivers/pinctrl/sh-pfc/sh_pfc.h
-@@ -16,17 +16,12 @@
- 
- typedef unsigned short pinmux_enum_t;
- 
--#define SH_PFC_MARK_INVALID	((pinmux_enum_t)-1)
--
- enum {
- 	PINMUX_TYPE_NONE,
--
- 	PINMUX_TYPE_FUNCTION,
- 	PINMUX_TYPE_GPIO,
- 	PINMUX_TYPE_OUTPUT,
- 	PINMUX_TYPE_INPUT,
--
--	PINMUX_FLAG_TYPE,	/* must be last */
- };
- 
- #define SH_PFC_PIN_CFG_INPUT		(1 << 0)
-@@ -166,8 +161,6 @@ struct sh_pfc_soc_info {
- 	unsigned long unlock_reg;
- };
- 
--enum { GPIO_CFG_REQ, GPIO_CFG_FREE };
--
- /* helper macro for port */
- #define PORT_1(fn, pfx, sfx) fn(pfx, sfx)
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0539-sh-pfc-Remove-unneeded-const-keywords.patch b/patches.renesas/0539-sh-pfc-Remove-unneeded-const-keywords.patch
deleted file mode 100644
index 1c611aeba4e27..0000000000000
--- a/patches.renesas/0539-sh-pfc-Remove-unneeded-const-keywords.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From b88e8e5782a03c7a22ab5ea705eaa224eab0bfe4 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Sun, 14 Jul 2013 20:04:53 +0200
-Subject: sh-pfc: Remove unneeded const keywords
-
-Two integer field structures are needlesly defined as const. Remove the
-const keyword.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
-(cherry picked from commit 94e74601384da5605087c176501e4fb17d7c4252)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/sh_pfc.h | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/sh_pfc.h b/drivers/pinctrl/sh-pfc/sh_pfc.h
-index d0a8ff8d..2105487d 100644
---- a/drivers/pinctrl/sh-pfc/sh_pfc.h
-+++ b/drivers/pinctrl/sh-pfc/sh_pfc.h
-@@ -30,7 +30,7 @@ enum {
- #define SH_PFC_PIN_CFG_PULL_DOWN	(1 << 3)
- 
- struct sh_pfc_pin {
--	const pinmux_enum_t enum_id;
-+	pinmux_enum_t enum_id;
- 	const char *name;
- 	unsigned int configs;
- };
-@@ -64,7 +64,7 @@ struct sh_pfc_function {
- };
- 
- struct pinmux_func {
--	const pinmux_enum_t enum_id;
-+	pinmux_enum_t enum_id;
- 	const char *name;
- };
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0540-sh-pfc-Remove-unused-GPIO_PORT_ALL-macro.patch b/patches.renesas/0540-sh-pfc-Remove-unused-GPIO_PORT_ALL-macro.patch
deleted file mode 100644
index bc30fefd1595d..0000000000000
--- a/patches.renesas/0540-sh-pfc-Remove-unused-GPIO_PORT_ALL-macro.patch
+++ /dev/null
@@ -1,70 +0,0 @@
-From 213552740f10bd12e534291c9433f42034c8bf4b Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Mon, 15 Jul 2013 15:21:28 +0200
-Subject: sh-pfc: Remove unused GPIO_PORT_ALL macro
-
-The macro isn't used, remove it.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
-(cherry picked from commit 08d3868ec7644e142a63652b01bc7c12b0f6ed75)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7740.c | 7 -------
- drivers/pinctrl/sh-pfc/pfc-sh7372.c  | 7 -------
- drivers/pinctrl/sh-pfc/sh_pfc.h      | 2 --
- 3 files changed, 16 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-index f6ea47c4..3fb1e0b4 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-@@ -34,13 +34,6 @@
- 	PORT_10(fn, pfx##20, sfx),					\
- 	PORT_1(fn, pfx##210, sfx),	PORT_1(fn, pfx##211, sfx)
- 
--#undef _GPIO_PORT
--#define _GPIO_PORT(gpio, sfx)						\
--	[gpio] = {							\
--		.name = __stringify(PORT##gpio),			\
--		.enum_id = PORT##gpio##_DATA,				\
--	}
--
- #define IRQC_PIN_MUX(irq, pin)						\
- static const unsigned int intc_irq##irq##_pins[] = {			\
- 	pin,								\
-diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7372.c b/drivers/pinctrl/sh-pfc/pfc-sh7372.c
-index 6dfb1877..cd431e45 100644
---- a/drivers/pinctrl/sh-pfc/pfc-sh7372.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-sh7372.c
-@@ -38,13 +38,6 @@
- 	PORT_10(fn, pfx##16, sfx),	PORT_10(fn, pfx##17, sfx), \
- 	PORT_10(fn, pfx##18, sfx),	PORT_1(fn, pfx##190, sfx)
- 
--#undef _GPIO_PORT
--#define _GPIO_PORT(gpio, sfx)						\
--	[gpio] = {							\
--		.name = __stringify(PORT##gpio),			\
--		.enum_id = PORT##gpio##_DATA,				\
--	}
--
- #define IRQC_PIN_MUX(irq, pin)						\
- static const unsigned int intc_irq##irq##_pins[] = {			\
- 	pin,								\
-diff --git a/drivers/pinctrl/sh-pfc/sh_pfc.h b/drivers/pinctrl/sh-pfc/sh_pfc.h
-index 2105487d..363ea8cb 100644
---- a/drivers/pinctrl/sh-pfc/sh_pfc.h
-+++ b/drivers/pinctrl/sh-pfc/sh_pfc.h
-@@ -196,9 +196,7 @@ struct sh_pfc_soc_info {
- 	PORT_10(fn, pfx##9, sfx)
- 
- #define _PORT_ALL(pfx, sfx) pfx##_##sfx
--#define _GPIO_PORT(pfx, sfx) PINMUX_GPIO(GPIO_PORT##pfx, PORT##pfx##_DATA)
- #define PORT_ALL(str)	CPU_ALL_PORT(_PORT_ALL, PORT, str)
--#define GPIO_PORT_ALL()	CPU_ALL_PORT(_GPIO_PORT, , unused)
- #define GPIO_FN(str) PINMUX_GPIO_FN(GPIO_FN_##str, PINMUX_FN_BASE, str##_MARK)
- 
- /* helper macro for pinmux_enum_t */
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0541-sh-pfc-Don-t-overallocate-memory-for-the-GPIO-chip-p.patch b/patches.renesas/0541-sh-pfc-Don-t-overallocate-memory-for-the-GPIO-chip-p.patch
deleted file mode 100644
index c73006ab1cd01..0000000000000
--- a/patches.renesas/0541-sh-pfc-Don-t-overallocate-memory-for-the-GPIO-chip-p.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From 3aaf4b15a4e3d742d2206a0ae15c7480caccc38e Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Mon, 15 Jul 2013 13:36:39 +0200
-Subject: sh-pfc: Don't overallocate memory for the GPIO chip pins array
-
-The GPIO driver uses an array of sh_pfc_gpio_pin structures to store
-per-GPIO pin data. The array size is miscomputed at allocation time by
-using the number of the last pin instead of the number of pins. When the
-pin space contains holes this leads to memory overallocation. Fix it.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
-(cherry picked from commit a1a3580cb322f71cc5aa7e9180ffb6df609b530d)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/gpio.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/gpio.c b/drivers/pinctrl/sh-pfc/gpio.c
-index d37efa7d..3620bd84 100644
---- a/drivers/pinctrl/sh-pfc/gpio.c
-+++ b/drivers/pinctrl/sh-pfc/gpio.c
-@@ -224,8 +224,8 @@ static int gpio_pin_setup(struct sh_pfc_chip *chip)
- 	struct gpio_chip *gc = &chip->gpio_chip;
- 	int ret;
- 
--	chip->pins = devm_kzalloc(pfc->dev, pfc->nr_pins * sizeof(*chip->pins),
--				  GFP_KERNEL);
-+	chip->pins = devm_kzalloc(pfc->dev, pfc->info->nr_pins *
-+				  sizeof(*chip->pins), GFP_KERNEL);
- 	if (chip->pins == NULL)
- 		return -ENOMEM;
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0542-sh-pfc-Replace-pinmux_enum_id-typedef-with-u16.patch b/patches.renesas/0542-sh-pfc-Replace-pinmux_enum_id-typedef-with-u16.patch
deleted file mode 100644
index 5cd6637c8aaaa..0000000000000
--- a/patches.renesas/0542-sh-pfc-Replace-pinmux_enum_id-typedef-with-u16.patch
+++ /dev/null
@@ -1,435 +0,0 @@
-From 3bc0be9adb3e83cd2f4518569fbdfb521973a80c Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Mon, 15 Jul 2013 13:03:20 +0200
-Subject: sh-pfc: Replace pinmux_enum_id typedef with u16
-
-The typedef only conceals the real variable type without bringing any
-additional value (see Documentation/CodingStyle, section 5.b). Moreover,
-it polutes the pinmux namespace. Replace it with the integer type it
-used to hide.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
-(cherry picked from commit 533743dccb517b0331eccc111e3c2b8f021559b5)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/core.c        | 13 ++++++-------
- drivers/pinctrl/sh-pfc/pfc-r8a73a4.c |  2 +-
- drivers/pinctrl/sh-pfc/pfc-r8a7740.c |  2 +-
- drivers/pinctrl/sh-pfc/pfc-r8a7778.c |  2 +-
- drivers/pinctrl/sh-pfc/pfc-r8a7779.c |  2 +-
- drivers/pinctrl/sh-pfc/pfc-r8a7790.c |  2 +-
- drivers/pinctrl/sh-pfc/pfc-sh7203.c  |  3 +--
- drivers/pinctrl/sh-pfc/pfc-sh7264.c  |  3 +--
- drivers/pinctrl/sh-pfc/pfc-sh7269.c  |  3 +--
- drivers/pinctrl/sh-pfc/pfc-sh7372.c  |  2 +-
- drivers/pinctrl/sh-pfc/pfc-sh73a0.c  |  2 +-
- drivers/pinctrl/sh-pfc/pfc-sh7720.c  |  2 +-
- drivers/pinctrl/sh-pfc/pfc-sh7722.c  |  2 +-
- drivers/pinctrl/sh-pfc/pfc-sh7723.c  |  2 +-
- drivers/pinctrl/sh-pfc/pfc-sh7724.c  |  2 +-
- drivers/pinctrl/sh-pfc/pfc-sh7734.c  |  2 +-
- drivers/pinctrl/sh-pfc/pfc-sh7757.c  |  2 +-
- drivers/pinctrl/sh-pfc/pfc-sh7785.c  |  3 +--
- drivers/pinctrl/sh-pfc/pfc-sh7786.c  |  3 +--
- drivers/pinctrl/sh-pfc/pfc-shx3.c    |  3 +--
- drivers/pinctrl/sh-pfc/sh_pfc.h      | 26 ++++++++++++--------------
- 21 files changed, 37 insertions(+), 46 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/core.c b/drivers/pinctrl/sh-pfc/core.c
-index 1c8597cf..96b02246 100644
---- a/drivers/pinctrl/sh-pfc/core.c
-+++ b/drivers/pinctrl/sh-pfc/core.c
-@@ -98,8 +98,7 @@ int sh_pfc_get_pin_index(struct sh_pfc *pfc, unsigned int pin)
- 	return -EINVAL;
- }
- 
--static int sh_pfc_enum_in_range(pinmux_enum_t enum_id,
--				const struct pinmux_range *r)
-+static int sh_pfc_enum_in_range(u16 enum_id, const struct pinmux_range *r)
- {
- 	if (enum_id < r->begin)
- 		return 0;
-@@ -194,7 +193,7 @@ static void sh_pfc_write_config_reg(struct sh_pfc *pfc,
- 	sh_pfc_write_raw_reg(mapped_reg, crp->reg_width, data);
- }
- 
--static int sh_pfc_get_config_reg(struct sh_pfc *pfc, pinmux_enum_t enum_id,
-+static int sh_pfc_get_config_reg(struct sh_pfc *pfc, u16 enum_id,
- 				 const struct pinmux_cfg_reg **crp, int *fieldp,
- 				 int *valuep)
- {
-@@ -238,10 +237,10 @@ static int sh_pfc_get_config_reg(struct sh_pfc *pfc, pinmux_enum_t enum_id,
- 	return -EINVAL;
- }
- 
--static int sh_pfc_mark_to_enum(struct sh_pfc *pfc, pinmux_enum_t mark, int pos,
--			      pinmux_enum_t *enum_idp)
-+static int sh_pfc_mark_to_enum(struct sh_pfc *pfc, u16 mark, int pos,
-+			      u16 *enum_idp)
- {
--	const pinmux_enum_t *data = pfc->info->gpio_data;
-+	const u16 *data = pfc->info->gpio_data;
- 	int k;
- 
- 	if (pos) {
-@@ -264,7 +263,7 @@ static int sh_pfc_mark_to_enum(struct sh_pfc *pfc, pinmux_enum_t mark, int pos,
- int sh_pfc_config_mux(struct sh_pfc *pfc, unsigned mark, int pinmux_type)
- {
- 	const struct pinmux_cfg_reg *cr = NULL;
--	pinmux_enum_t enum_id;
-+	u16 enum_id;
- 	const struct pinmux_range *range;
- 	int in_range, pos, field, value;
- 	int ret;
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a73a4.c b/drivers/pinctrl/sh-pfc/pfc-r8a73a4.c
-index 82bf6aba..d5cbbc72 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a73a4.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a73a4.c
-@@ -431,7 +431,7 @@ enum {
- #define _PORT_DATA(pfx, sfx)	PORT_DATA_IO(pfx)
- #define PINMUX_DATA_ALL()    CPU_ALL_PORT(_PORT_DATA, , unused)
- 
--static const pinmux_enum_t pinmux_data[] = {
-+static const u16 pinmux_data[] = {
- 	/* specify valid pin states for each pin in GPIO mode */
- 	PINMUX_DATA_ALL(),
- 
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-index 3fb1e0b4..214ac6ce 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-@@ -586,7 +586,7 @@ enum {
- #define _PORT_DATA(pfx, sfx)	PORT_DATA_IO(pfx)
- #define PINMUX_DATA_GP_ALL()	CPU_ALL_PORT(_PORT_DATA, , unused)
- 
--static const pinmux_enum_t pinmux_data[] = {
-+static const u16 pinmux_data[] = {
- 	PINMUX_DATA_GP_ALL(),
- 
- 	/* Port0 */
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7778.c b/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
-index f9039102..018d8bcb 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
-@@ -579,7 +579,7 @@ enum {
- 	PINMUX_MARK_END,
- };
- 
--static const pinmux_enum_t pinmux_data[] = {
-+static const u16 pinmux_data[] = {
- 	PINMUX_DATA_GP_ALL(), /* PINMUX_DATA(GP_M_N_DATA, GP_M_N_FN...), */
- 
- 	PINMUX_DATA(PENC0_MARK,		FN_PENC0),
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7779.c b/drivers/pinctrl/sh-pfc/pfc-r8a7779.c
-index 8e22ca6c..290de9a9 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7779.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7779.c
-@@ -664,7 +664,7 @@ enum {
- 	PINMUX_MARK_END,
- };
- 
--static const pinmux_enum_t pinmux_data[] = {
-+static const u16 pinmux_data[] = {
- 	PINMUX_DATA_GP_ALL(), /* PINMUX_DATA(GP_M_N_DATA, GP_M_N_FN...), */
- 
- 	PINMUX_DATA(AVS1_MARK, FN_AVS1),
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-index 14f3ec26..3713c008 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-@@ -844,7 +844,7 @@ enum {
- 	PINMUX_MARK_END,
- };
- 
--static const pinmux_enum_t pinmux_data[] = {
-+static const u16 pinmux_data[] = {
- 	PINMUX_DATA_GP_ALL(), /* PINMUX_DATA(GP_M_N_DATA, GP_M_N_FN...), */
- 
- 	PINMUX_DATA(VI1_DATA7_VI1_B7_MARK, FN_VI1_DATA7_VI1_B7),
-diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7203.c b/drivers/pinctrl/sh-pfc/pfc-sh7203.c
-index f63d51dc..44878140 100644
---- a/drivers/pinctrl/sh-pfc/pfc-sh7203.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-sh7203.c
-@@ -272,8 +272,7 @@ enum {
- 	PINMUX_MARK_END,
- };
- 
--static const pinmux_enum_t pinmux_data[] = {
--
-+static const u16 pinmux_data[] = {
- 	/* PA */
- 	PINMUX_DATA(PA7_DATA, PA7_IN),
- 	PINMUX_DATA(PA6_DATA, PA6_IN),
-diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7264.c b/drivers/pinctrl/sh-pfc/pfc-sh7264.c
-index 28467524..641c6af3 100644
---- a/drivers/pinctrl/sh-pfc/pfc-sh7264.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-sh7264.c
-@@ -604,8 +604,7 @@ enum {
- 	PINMUX_MARK_END,
- };
- 
--static const pinmux_enum_t pinmux_data[] = {
--
-+static const u16 pinmux_data[] = {
- 	/* Port A */
- 	PINMUX_DATA(PA3_DATA, PA3_IN),
- 	PINMUX_DATA(PA2_DATA, PA2_IN),
-diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7269.c b/drivers/pinctrl/sh-pfc/pfc-sh7269.c
-index 4c401a74..415812ff 100644
---- a/drivers/pinctrl/sh-pfc/pfc-sh7269.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-sh7269.c
-@@ -781,8 +781,7 @@ enum {
- 	PINMUX_MARK_END,
- };
- 
--static const pinmux_enum_t pinmux_data[] = {
--
-+static const u16 pinmux_data[] = {
- 	/* Port A */
- 	PINMUX_DATA(PA1_DATA, PA1_IN),
- 	PINMUX_DATA(PA0_DATA, PA0_IN),
-diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7372.c b/drivers/pinctrl/sh-pfc/pfc-sh7372.c
-index cd431e45..f269c46a 100644
---- a/drivers/pinctrl/sh-pfc/pfc-sh7372.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-sh7372.c
-@@ -387,7 +387,7 @@ enum {
- #define _PORT_DATA(pfx, sfx)	PORT_DATA_IO(pfx)
- #define PINMUX_DATA_GP_ALL()	CPU_ALL_PORT(_PORT_DATA, , unused)
- 
--static const pinmux_enum_t pinmux_data[] = {
-+static const u16 pinmux_data[] = {
- 	PINMUX_DATA_GP_ALL(),
- 
- 	/* IRQ */
-diff --git a/drivers/pinctrl/sh-pfc/pfc-sh73a0.c b/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
-index 31f7d0e0..7935afbe 100644
---- a/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
-@@ -469,7 +469,7 @@ enum {
- #define _PORT_DATA(pfx, sfx)	PORT_DATA_IO(pfx)
- #define PINMUX_DATA_GP_ALL()    CPU_ALL_PORT(_PORT_DATA, , unused)
- 
--static const pinmux_enum_t pinmux_data[] = {
-+static const u16 pinmux_data[] = {
- 	/* specify valid pin states for each pin in GPIO mode */
- 	PINMUX_DATA_GP_ALL(),
- 
-diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7720.c b/drivers/pinctrl/sh-pfc/pfc-sh7720.c
-index 3b96d612..1009fc9c 100644
---- a/drivers/pinctrl/sh-pfc/pfc-sh7720.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-sh7720.c
-@@ -232,7 +232,7 @@ enum {
- 	PINMUX_MARK_END,
- };
- 
--static const pinmux_enum_t pinmux_data[] = {
-+static const u16 pinmux_data[] = {
- 	/* PTA GPIO */
- 	PINMUX_DATA(PTA7_DATA, PTA7_IN, PTA7_OUT),
- 	PINMUX_DATA(PTA6_DATA, PTA6_IN, PTA6_OUT),
-diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7722.c b/drivers/pinctrl/sh-pfc/pfc-sh7722.c
-index 0982c4ff..0c8d011f 100644
---- a/drivers/pinctrl/sh-pfc/pfc-sh7722.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-sh7722.c
-@@ -263,7 +263,7 @@ enum {
- 	PINMUX_FUNCTION_END,
- };
- 
--static const pinmux_enum_t pinmux_data[] = {
-+static const u16 pinmux_data[] = {
- 	/* PTA */
- 	PINMUX_DATA(PTA7_DATA, PTA7_IN, PTA7_OUT),
- 	PINMUX_DATA(PTA6_DATA, PTA6_IN),
-diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7723.c b/drivers/pinctrl/sh-pfc/pfc-sh7723.c
-index da0dbb0b..853093ef 100644
---- a/drivers/pinctrl/sh-pfc/pfc-sh7723.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-sh7723.c
-@@ -344,7 +344,7 @@ enum {
- 	PINMUX_MARK_END,
- };
- 
--static const pinmux_enum_t pinmux_data[] = {
-+static const u16 pinmux_data[] = {
- 	/* PTA GPIO */
- 	PINMUX_DATA(PTA7_DATA, PTA7_IN, PTA7_OUT),
- 	PINMUX_DATA(PTA6_DATA, PTA6_IN, PTA6_OUT),
-diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7724.c b/drivers/pinctrl/sh-pfc/pfc-sh7724.c
-index e8563cf6..fe2693f6 100644
---- a/drivers/pinctrl/sh-pfc/pfc-sh7724.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-sh7724.c
-@@ -526,7 +526,7 @@ enum {
- 	PINMUX_MARK_END,
- };
- 
--static const pinmux_enum_t pinmux_data[] = {
-+static const u16 pinmux_data[] = {
- 	/* PTA GPIO */
- 	PINMUX_DATA(PTA7_DATA, PTA7_IN, PTA7_OUT),
- 	PINMUX_DATA(PTA6_DATA, PTA6_IN, PTA6_OUT),
-diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7734.c b/drivers/pinctrl/sh-pfc/pfc-sh7734.c
-index 2fd5b7d4..1e1e3e02 100644
---- a/drivers/pinctrl/sh-pfc/pfc-sh7734.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-sh7734.c
-@@ -592,7 +592,7 @@ enum {
- 	PINMUX_MARK_END,
- };
- 
--static const pinmux_enum_t pinmux_data[] = {
-+static const u16 pinmux_data[] = {
- 	PINMUX_DATA_GP_ALL(), /* PINMUX_DATA(GP_M_N_DATA, GP_M_N_FN...), */
- 
- 	PINMUX_DATA(CLKOUT_MARK, FN_CLKOUT),
-diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7757.c b/drivers/pinctrl/sh-pfc/pfc-sh7757.c
-index d974b085..f4271167 100644
---- a/drivers/pinctrl/sh-pfc/pfc-sh7757.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-sh7757.c
-@@ -486,7 +486,7 @@ enum {
- 	PINMUX_MARK_END,
- };
- 
--static const pinmux_enum_t pinmux_data[] = {
-+static const u16 pinmux_data[] = {
- 	/* PTA GPIO */
- 	PINMUX_DATA(PTA7_DATA, PTA7_IN, PTA7_OUT),
- 	PINMUX_DATA(PTA6_DATA, PTA6_IN, PTA6_OUT),
-diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7785.c b/drivers/pinctrl/sh-pfc/pfc-sh7785.c
-index ddae4260..209289c8 100644
---- a/drivers/pinctrl/sh-pfc/pfc-sh7785.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-sh7785.c
-@@ -325,8 +325,7 @@ enum {
- 	PINMUX_MARK_END,
- };
- 
--static const pinmux_enum_t pinmux_data[] = {
--
-+static const u16 pinmux_data[] = {
- 	/* PA GPIO */
- 	PINMUX_DATA(PA7_DATA, PA7_IN, PA7_OUT),
- 	PINMUX_DATA(PA6_DATA, PA6_IN, PA6_OUT),
-diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7786.c b/drivers/pinctrl/sh-pfc/pfc-sh7786.c
-index c855fca5..353fde1f 100644
---- a/drivers/pinctrl/sh-pfc/pfc-sh7786.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-sh7786.c
-@@ -172,8 +172,7 @@ enum {
- 	PINMUX_MARK_END,
- };
- 
--static const pinmux_enum_t pinmux_data[] = {
--
-+static const u16 pinmux_data[] = {
- 	/* PA GPIO */
- 	PINMUX_DATA(PA7_DATA, PA7_IN, PA7_OUT),
- 	PINMUX_DATA(PA6_DATA, PA6_IN, PA6_OUT),
-diff --git a/drivers/pinctrl/sh-pfc/pfc-shx3.c b/drivers/pinctrl/sh-pfc/pfc-shx3.c
-index 50d9c5d8..48a6c60f 100644
---- a/drivers/pinctrl/sh-pfc/pfc-shx3.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-shx3.c
-@@ -127,8 +127,7 @@ enum {
- 	PINMUX_MARK_END,
- };
- 
--static const pinmux_enum_t shx3_pinmux_data[] = {
--
-+static const u16 shx3_pinmux_data[] = {
- 	/* PA GPIO */
- 	PINMUX_DATA(PA7_DATA, PA7_IN, PA7_OUT),
- 	PINMUX_DATA(PA6_DATA, PA6_IN, PA6_OUT),
-diff --git a/drivers/pinctrl/sh-pfc/sh_pfc.h b/drivers/pinctrl/sh-pfc/sh_pfc.h
-index 363ea8cb..7ad1b040 100644
---- a/drivers/pinctrl/sh-pfc/sh_pfc.h
-+++ b/drivers/pinctrl/sh-pfc/sh_pfc.h
-@@ -14,8 +14,6 @@
- #include <linux/bug.h>
- #include <linux/stringify.h>
- 
--typedef unsigned short pinmux_enum_t;
--
- enum {
- 	PINMUX_TYPE_NONE,
- 	PINMUX_TYPE_FUNCTION,
-@@ -30,7 +28,7 @@ enum {
- #define SH_PFC_PIN_CFG_PULL_DOWN	(1 << 3)
- 
- struct sh_pfc_pin {
--	pinmux_enum_t enum_id;
-+	u16 enum_id;
- 	const char *name;
- 	unsigned int configs;
- };
-@@ -64,7 +62,7 @@ struct sh_pfc_function {
- };
- 
- struct pinmux_func {
--	pinmux_enum_t enum_id;
-+	u16 enum_id;
- 	const char *name;
- };
- 
-@@ -83,27 +81,27 @@ struct pinmux_func {
- 
- struct pinmux_cfg_reg {
- 	unsigned long reg, reg_width, field_width;
--	const pinmux_enum_t *enum_ids;
-+	const u16 *enum_ids;
- 	const unsigned long *var_field_width;
- };
- 
- #define PINMUX_CFG_REG(name, r, r_width, f_width) \
- 	.reg = r, .reg_width = r_width, .field_width = f_width,		\
--	.enum_ids = (pinmux_enum_t [(r_width / f_width) * (1 << f_width)])
-+	.enum_ids = (u16 [(r_width / f_width) * (1 << f_width)])
- 
- #define PINMUX_CFG_REG_VAR(name, r, r_width, var_fw0, var_fwn...) \
- 	.reg = r, .reg_width = r_width,	\
- 	.var_field_width = (unsigned long [r_width]) { var_fw0, var_fwn, 0 }, \
--	.enum_ids = (pinmux_enum_t [])
-+	.enum_ids = (u16 [])
- 
- struct pinmux_data_reg {
- 	unsigned long reg, reg_width;
--	const pinmux_enum_t *enum_ids;
-+	const u16 *enum_ids;
- };
- 
- #define PINMUX_DATA_REG(name, r, r_width) \
- 	.reg = r, .reg_width = r_width,	\
--	.enum_ids = (pinmux_enum_t [r_width]) \
-+	.enum_ids = (u16 [r_width]) \
- 
- struct pinmux_irq {
- 	int irq;
-@@ -114,9 +112,9 @@ struct pinmux_irq {
- 	{ .irq = irq_nr, .gpios = (unsigned short []) { ids, 0 } }	\
- 
- struct pinmux_range {
--	pinmux_enum_t begin;
--	pinmux_enum_t end;
--	pinmux_enum_t force;
-+	u16 begin;
-+	u16 end;
-+	u16 force;
- };
- 
- struct sh_pfc;
-@@ -152,7 +150,7 @@ struct sh_pfc_soc_info {
- 	const struct pinmux_cfg_reg *cfg_regs;
- 	const struct pinmux_data_reg *data_regs;
- 
--	const pinmux_enum_t *gpio_data;
-+	const u16 *gpio_data;
- 	unsigned int gpio_data_size;
- 
- 	const struct pinmux_irq *gpio_irq;
-@@ -199,7 +197,7 @@ struct sh_pfc_soc_info {
- #define PORT_ALL(str)	CPU_ALL_PORT(_PORT_ALL, PORT, str)
- #define GPIO_FN(str) PINMUX_GPIO_FN(GPIO_FN_##str, PINMUX_FN_BASE, str##_MARK)
- 
--/* helper macro for pinmux_enum_t */
-+/* helper macro for pinmux data arrays */
- #define PORT_DATA_IO(nr)	\
- 	PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT,	\
- 		    PORT##nr##_IN)
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0543-sh-pfc-Rename-gpio-arguments-to-be-consistent-with-t.patch b/patches.renesas/0543-sh-pfc-Rename-gpio-arguments-to-be-consistent-with-t.patch
deleted file mode 100644
index 55c471e525118..0000000000000
--- a/patches.renesas/0543-sh-pfc-Rename-gpio-arguments-to-be-consistent-with-t.patch
+++ /dev/null
@@ -1,55 +0,0 @@
-From 564b6f12caff523266575f11ffbab8c6a57b239e Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Mon, 15 Jul 2013 13:25:08 +0200
-Subject: sh-pfc: Rename gpio arguments to be consistent with the rest of the
- code
-
-The gpio_get_data_reg() and gpio_setup_data_reg() functions both take an
-argument named gpio. The argument contains a GPIO offset for the first
-function and a pin index for the second one. Rename them to offset and
-idx respectively to match the rest of the code.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
-(cherry picked from commit 757b055a65c5e0f84185012ef45cc2e15a337b63)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/gpio.c | 10 +++++-----
- 1 file changed, 5 insertions(+), 5 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/gpio.c b/drivers/pinctrl/sh-pfc/gpio.c
-index 3620bd84..87ae38b9 100644
---- a/drivers/pinctrl/sh-pfc/gpio.c
-+++ b/drivers/pinctrl/sh-pfc/gpio.c
-@@ -48,11 +48,11 @@ static struct sh_pfc *gpio_to_pfc(struct gpio_chip *gc)
- 	return gpio_to_pfc_chip(gc)->pfc;
- }
- 
--static void gpio_get_data_reg(struct sh_pfc_chip *chip, unsigned int gpio,
-+static void gpio_get_data_reg(struct sh_pfc_chip *chip, unsigned int offset,
- 			      struct sh_pfc_gpio_data_reg **reg,
- 			      unsigned int *bit)
- {
--	int idx = sh_pfc_get_pin_index(chip->pfc, gpio);
-+	int idx = sh_pfc_get_pin_index(chip->pfc, offset);
- 	struct sh_pfc_gpio_pin *gpio_pin = &chip->pins[idx];
- 
- 	*reg = &chip->regs[gpio_pin->dreg];
-@@ -76,11 +76,11 @@ static void gpio_write_data_reg(struct sh_pfc_chip *chip,
- 	sh_pfc_write_raw_reg(mem, dreg->reg_width, value);
- }
- 
--static void gpio_setup_data_reg(struct sh_pfc_chip *chip, unsigned gpio)
-+static void gpio_setup_data_reg(struct sh_pfc_chip *chip, unsigned idx)
- {
- 	struct sh_pfc *pfc = chip->pfc;
--	struct sh_pfc_gpio_pin *gpio_pin = &chip->pins[gpio];
--	const struct sh_pfc_pin *pin = &pfc->info->pins[gpio];
-+	struct sh_pfc_gpio_pin *gpio_pin = &chip->pins[idx];
-+	const struct sh_pfc_pin *pin = &pfc->info->pins[idx];
- 	const struct pinmux_data_reg *dreg;
- 	unsigned int bit;
- 	unsigned int i;
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0544-sh-pfc-Consolidate-PFC-SoC-data-macros.patch b/patches.renesas/0544-sh-pfc-Consolidate-PFC-SoC-data-macros.patch
deleted file mode 100644
index f0cfba807663c..0000000000000
--- a/patches.renesas/0544-sh-pfc-Consolidate-PFC-SoC-data-macros.patch
+++ /dev/null
@@ -1,542 +0,0 @@
-From 72e83481d1fd361df8bbac5874cc25121d6b2682 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Mon, 15 Jul 2013 15:14:22 +0200
-Subject: sh-pfc: Consolidate PFC SoC data macros
-
-Move macros defined in several SoC data files to a common location and
-document them.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
-(cherry picked from commit e3d93b46718f12924128e5e70e2f3f992a95fa3b)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a73a4.c |   3 -
- drivers/pinctrl/sh-pfc/pfc-r8a7740.c |   5 +-
- drivers/pinctrl/sh-pfc/pfc-r8a7778.c |  40 ---------
- drivers/pinctrl/sh-pfc/pfc-r8a7779.c |  61 +------------
- drivers/pinctrl/sh-pfc/pfc-r8a7790.c |  57 ------------
- drivers/pinctrl/sh-pfc/pfc-sh7372.c  |   5 +-
- drivers/pinctrl/sh-pfc/pfc-sh73a0.c  |   5 +-
- drivers/pinctrl/sh-pfc/pfc-sh7734.c  |  10 ++-
- drivers/pinctrl/sh-pfc/sh_pfc.h      | 168 +++++++++++++++++++++++++++--------
- 9 files changed, 140 insertions(+), 214 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a73a4.c b/drivers/pinctrl/sh-pfc/pfc-r8a73a4.c
-index d5cbbc72..d8115331 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a73a4.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a73a4.c
-@@ -428,9 +428,6 @@ enum {
- 	PINMUX_MARK_END,
- };
- 
--#define _PORT_DATA(pfx, sfx)	PORT_DATA_IO(pfx)
--#define PINMUX_DATA_ALL()    CPU_ALL_PORT(_PORT_DATA, , unused)
--
- static const u16 pinmux_data[] = {
- 	/* specify valid pin states for each pin in GPIO mode */
- 	PINMUX_DATA_ALL(),
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-index 214ac6ce..e6900511 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-@@ -583,11 +583,8 @@ enum {
- 	PINMUX_MARK_END,
- };
- 
--#define _PORT_DATA(pfx, sfx)	PORT_DATA_IO(pfx)
--#define PINMUX_DATA_GP_ALL()	CPU_ALL_PORT(_PORT_DATA, , unused)
--
- static const u16 pinmux_data[] = {
--	PINMUX_DATA_GP_ALL(),
-+	PINMUX_DATA_ALL(),
- 
- 	/* Port0 */
- 	PINMUX_DATA(DBGMDT2_MARK,		PORT0_FN1),
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7778.c b/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
-index 018d8bcb..40aecfee 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
-@@ -23,26 +23,6 @@
- #include <linux/kernel.h>
- #include "sh_pfc.h"
- 
--#define PORT_GP_1(bank, pin, fn, sfx) fn(bank, pin, GP_##bank##_##pin, sfx)
--
--#define PORT_GP_32(bank, fn, sfx)					\
--	PORT_GP_1(bank, 0,  fn, sfx), PORT_GP_1(bank, 1,  fn, sfx),	\
--	PORT_GP_1(bank, 2,  fn, sfx), PORT_GP_1(bank, 3,  fn, sfx),	\
--	PORT_GP_1(bank, 4,  fn, sfx), PORT_GP_1(bank, 5,  fn, sfx),	\
--	PORT_GP_1(bank, 6,  fn, sfx), PORT_GP_1(bank, 7,  fn, sfx),	\
--	PORT_GP_1(bank, 8,  fn, sfx), PORT_GP_1(bank, 9,  fn, sfx),	\
--	PORT_GP_1(bank, 10, fn, sfx), PORT_GP_1(bank, 11, fn, sfx),	\
--	PORT_GP_1(bank, 12, fn, sfx), PORT_GP_1(bank, 13, fn, sfx),	\
--	PORT_GP_1(bank, 14, fn, sfx), PORT_GP_1(bank, 15, fn, sfx),	\
--	PORT_GP_1(bank, 16, fn, sfx), PORT_GP_1(bank, 17, fn, sfx),	\
--	PORT_GP_1(bank, 18, fn, sfx), PORT_GP_1(bank, 19, fn, sfx),	\
--	PORT_GP_1(bank, 20, fn, sfx), PORT_GP_1(bank, 21, fn, sfx),	\
--	PORT_GP_1(bank, 22, fn, sfx), PORT_GP_1(bank, 23, fn, sfx),	\
--	PORT_GP_1(bank, 24, fn, sfx), PORT_GP_1(bank, 25, fn, sfx),	\
--	PORT_GP_1(bank, 26, fn, sfx), PORT_GP_1(bank, 27, fn, sfx),	\
--	PORT_GP_1(bank, 28, fn, sfx), PORT_GP_1(bank, 29, fn, sfx),	\
--	PORT_GP_1(bank, 30, fn, sfx), PORT_GP_1(bank, 31, fn, sfx)
--
- #define PORT_GP_27(bank, fn, sfx)					\
- 	PORT_GP_1(bank, 0,  fn, sfx), PORT_GP_1(bank, 1,  fn, sfx),	\
- 	PORT_GP_1(bank, 2,  fn, sfx), PORT_GP_1(bank, 3,  fn, sfx),	\
-@@ -66,26 +46,6 @@
- 	PORT_GP_32(3, fn, sfx),		\
- 	PORT_GP_27(4, fn, sfx)
- 
--#define _GP_PORT_ALL(bank, pin, name, sfx)	name##_##sfx
--
--#define _GP_GPIO(bank, pin, _name, sfx)		\
--	[RCAR_GP_PIN(bank, pin)] = {		\
--		.name = __stringify(_name),	\
--		.enum_id = _name##_DATA,	\
--	}
--
--#define _GP_DATA(bank, pin, name, sfx)		\
--	PINMUX_DATA(name##_DATA, name##_FN)
--
--#define GP_ALL(str)		CPU_ALL_PORT(_GP_PORT_ALL, str)
--#define PINMUX_GPIO_GP_ALL()	CPU_ALL_PORT(_GP_GPIO, unused)
--#define PINMUX_DATA_GP_ALL()	CPU_ALL_PORT(_GP_DATA, unused)
--
--#define PINMUX_IPSR_NOGP(ispr, fn)	PINMUX_DATA(fn##_MARK, FN_##fn)
--#define PINMUX_IPSR_DATA(ipsr, fn)	PINMUX_DATA(fn##_MARK, FN_##fn, FN_##ipsr)
--#define PINMUX_IPSR_MSEL(ipsr, fn, ms)	PINMUX_DATA(fn##_MARK, FN_##fn, FN_##ipsr, FN_##ms)
--#define PINMUX_IPSR_NOGM(ispr, fn, ms)	PINMUX_DATA(fn##_MARK, FN_##fn,            FN_##ms)
--
- enum {
- 	PINMUX_RESERVED = 0,
- 
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7779.c b/drivers/pinctrl/sh-pfc/pfc-r8a7779.c
-index 290de9a9..be832dcd 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7779.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7779.c
-@@ -24,51 +24,13 @@
- 
- #include "sh_pfc.h"
- 
--#define PORT_GP_1(bank, pin, fn, sfx) fn(bank, pin, GP_##bank##_##pin, sfx)
--
--#define PORT_GP_32(bank, fn, sfx)					\
--	PORT_GP_1(bank, 0,  fn, sfx), PORT_GP_1(bank, 1,  fn, sfx),	\
--	PORT_GP_1(bank, 2,  fn, sfx), PORT_GP_1(bank, 3,  fn, sfx),	\
--	PORT_GP_1(bank, 4,  fn, sfx), PORT_GP_1(bank, 5,  fn, sfx),	\
--	PORT_GP_1(bank, 6,  fn, sfx), PORT_GP_1(bank, 7,  fn, sfx),	\
--	PORT_GP_1(bank, 8,  fn, sfx), PORT_GP_1(bank, 9,  fn, sfx),	\
--	PORT_GP_1(bank, 10, fn, sfx), PORT_GP_1(bank, 11, fn, sfx),	\
--	PORT_GP_1(bank, 12, fn, sfx), PORT_GP_1(bank, 13, fn, sfx),	\
--	PORT_GP_1(bank, 14, fn, sfx), PORT_GP_1(bank, 15, fn, sfx),	\
--	PORT_GP_1(bank, 16, fn, sfx), PORT_GP_1(bank, 17, fn, sfx),	\
--	PORT_GP_1(bank, 18, fn, sfx), PORT_GP_1(bank, 19, fn, sfx),	\
--	PORT_GP_1(bank, 20, fn, sfx), PORT_GP_1(bank, 21, fn, sfx),	\
--	PORT_GP_1(bank, 22, fn, sfx), PORT_GP_1(bank, 23, fn, sfx),	\
--	PORT_GP_1(bank, 24, fn, sfx), PORT_GP_1(bank, 25, fn, sfx),	\
--	PORT_GP_1(bank, 26, fn, sfx), PORT_GP_1(bank, 27, fn, sfx),	\
--	PORT_GP_1(bank, 28, fn, sfx), PORT_GP_1(bank, 29, fn, sfx),	\
--	PORT_GP_1(bank, 30, fn, sfx), PORT_GP_1(bank, 31, fn, sfx)
--
--#define PORT_GP_32_9(bank, fn, sfx)					\
-+#define PORT_GP_9(bank, fn, sfx)					\
- 	PORT_GP_1(bank, 0, fn, sfx), PORT_GP_1(bank, 1, fn, sfx),	\
- 	PORT_GP_1(bank, 2, fn, sfx), PORT_GP_1(bank, 3, fn, sfx),	\
- 	PORT_GP_1(bank, 4, fn, sfx), PORT_GP_1(bank, 5, fn, sfx),	\
- 	PORT_GP_1(bank, 6, fn, sfx), PORT_GP_1(bank, 7, fn, sfx),	\
- 	PORT_GP_1(bank, 8, fn, sfx)
- 
--#define PORT_GP_32_REV(bank, fn, sfx)					\
--	PORT_GP_1(bank, 31, fn, sfx), PORT_GP_1(bank, 30, fn, sfx),	\
--	PORT_GP_1(bank, 29, fn, sfx), PORT_GP_1(bank, 28, fn, sfx),	\
--	PORT_GP_1(bank, 27, fn, sfx), PORT_GP_1(bank, 26, fn, sfx),	\
--	PORT_GP_1(bank, 25, fn, sfx), PORT_GP_1(bank, 24, fn, sfx),	\
--	PORT_GP_1(bank, 23, fn, sfx), PORT_GP_1(bank, 22, fn, sfx),	\
--	PORT_GP_1(bank, 21, fn, sfx), PORT_GP_1(bank, 20, fn, sfx),	\
--	PORT_GP_1(bank, 19, fn, sfx), PORT_GP_1(bank, 18, fn, sfx),	\
--	PORT_GP_1(bank, 17, fn, sfx), PORT_GP_1(bank, 16, fn, sfx),	\
--	PORT_GP_1(bank, 15, fn, sfx), PORT_GP_1(bank, 14, fn, sfx),	\
--	PORT_GP_1(bank, 13, fn, sfx), PORT_GP_1(bank, 12, fn, sfx),	\
--	PORT_GP_1(bank, 11, fn, sfx), PORT_GP_1(bank, 10, fn, sfx),	\
--	PORT_GP_1(bank, 9,  fn, sfx), PORT_GP_1(bank, 8,  fn, sfx),	\
--	PORT_GP_1(bank, 7,  fn, sfx), PORT_GP_1(bank, 6,  fn, sfx),	\
--	PORT_GP_1(bank, 5,  fn, sfx), PORT_GP_1(bank, 4,  fn, sfx),	\
--	PORT_GP_1(bank, 3,  fn, sfx), PORT_GP_1(bank, 2,  fn, sfx),	\
--	PORT_GP_1(bank, 1,  fn, sfx), PORT_GP_1(bank, 0,  fn, sfx)
--
- #define CPU_ALL_PORT(fn, sfx)						\
- 	PORT_GP_32(0, fn, sfx),						\
- 	PORT_GP_32(1, fn, sfx),						\
-@@ -76,26 +38,7 @@
- 	PORT_GP_32(3, fn, sfx),						\
- 	PORT_GP_32(4, fn, sfx),						\
- 	PORT_GP_32(5, fn, sfx),						\
--	PORT_GP_32_9(6, fn, sfx)
--
--#define _GP_PORT_ALL(bank, pin, name, sfx)	name##_##sfx
--
--#define _GP_GPIO(bank, pin, _name, sfx)					\
--	[RCAR_GP_PIN(bank, pin)] = {					\
--		.name = __stringify(_name),				\
--		.enum_id = _name##_DATA,				\
--	}
--
--#define _GP_DATA(bank, pin, name, sfx)					\
--	PINMUX_DATA(name##_DATA, name##_FN)
--
--#define GP_ALL(str)		CPU_ALL_PORT(_GP_PORT_ALL, str)
--#define PINMUX_GPIO_GP_ALL()	CPU_ALL_PORT(_GP_GPIO, unused)
--#define PINMUX_DATA_GP_ALL()	CPU_ALL_PORT(_GP_DATA, unused)
--
--#define PINMUX_IPSR_DATA(ipsr, fn) PINMUX_DATA(fn##_MARK, FN_##ipsr, FN_##fn)
--#define PINMUX_IPSR_MODSEL_DATA(ipsr, fn, ms) PINMUX_DATA(fn##_MARK, FN_##ms, \
--							  FN_##ipsr, FN_##fn)
-+	PORT_GP_9(6, fn, sfx)
- 
- enum {
- 	PINMUX_RESERVED = 0,
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-index 3713c008..95b38faf 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-@@ -27,44 +27,6 @@
- #include "core.h"
- #include "sh_pfc.h"
- 
--#define PORT_GP_1(bank, pin, fn, sfx) fn(bank, pin, GP_##bank##_##pin, sfx)
--
--#define PORT_GP_32(bank, fn, sfx)					\
--	PORT_GP_1(bank, 0,  fn, sfx), PORT_GP_1(bank, 1,  fn, sfx),	\
--	PORT_GP_1(bank, 2,  fn, sfx), PORT_GP_1(bank, 3,  fn, sfx),	\
--	PORT_GP_1(bank, 4,  fn, sfx), PORT_GP_1(bank, 5,  fn, sfx),	\
--	PORT_GP_1(bank, 6,  fn, sfx), PORT_GP_1(bank, 7,  fn, sfx),	\
--	PORT_GP_1(bank, 8,  fn, sfx), PORT_GP_1(bank, 9,  fn, sfx),	\
--	PORT_GP_1(bank, 10, fn, sfx), PORT_GP_1(bank, 11, fn, sfx),	\
--	PORT_GP_1(bank, 12, fn, sfx), PORT_GP_1(bank, 13, fn, sfx),	\
--	PORT_GP_1(bank, 14, fn, sfx), PORT_GP_1(bank, 15, fn, sfx),	\
--	PORT_GP_1(bank, 16, fn, sfx), PORT_GP_1(bank, 17, fn, sfx),	\
--	PORT_GP_1(bank, 18, fn, sfx), PORT_GP_1(bank, 19, fn, sfx),	\
--	PORT_GP_1(bank, 20, fn, sfx), PORT_GP_1(bank, 21, fn, sfx),	\
--	PORT_GP_1(bank, 22, fn, sfx), PORT_GP_1(bank, 23, fn, sfx),	\
--	PORT_GP_1(bank, 24, fn, sfx), PORT_GP_1(bank, 25, fn, sfx),	\
--	PORT_GP_1(bank, 26, fn, sfx), PORT_GP_1(bank, 27, fn, sfx),	\
--	PORT_GP_1(bank, 28, fn, sfx), PORT_GP_1(bank, 29, fn, sfx),	\
--	PORT_GP_1(bank, 30, fn, sfx), PORT_GP_1(bank, 31, fn, sfx)
--
--#define PORT_GP_32_REV(bank, fn, sfx)					\
--	PORT_GP_1(bank, 31, fn, sfx), PORT_GP_1(bank, 30, fn, sfx),	\
--	PORT_GP_1(bank, 29, fn, sfx), PORT_GP_1(bank, 28, fn, sfx),	\
--	PORT_GP_1(bank, 27, fn, sfx), PORT_GP_1(bank, 26, fn, sfx),	\
--	PORT_GP_1(bank, 25, fn, sfx), PORT_GP_1(bank, 24, fn, sfx),	\
--	PORT_GP_1(bank, 23, fn, sfx), PORT_GP_1(bank, 22, fn, sfx),	\
--	PORT_GP_1(bank, 21, fn, sfx), PORT_GP_1(bank, 20, fn, sfx),	\
--	PORT_GP_1(bank, 19, fn, sfx), PORT_GP_1(bank, 18, fn, sfx),	\
--	PORT_GP_1(bank, 17, fn, sfx), PORT_GP_1(bank, 16, fn, sfx),	\
--	PORT_GP_1(bank, 15, fn, sfx), PORT_GP_1(bank, 14, fn, sfx),	\
--	PORT_GP_1(bank, 13, fn, sfx), PORT_GP_1(bank, 12, fn, sfx),	\
--	PORT_GP_1(bank, 11, fn, sfx), PORT_GP_1(bank, 10, fn, sfx),	\
--	PORT_GP_1(bank, 9,  fn, sfx), PORT_GP_1(bank, 8,  fn, sfx),	\
--	PORT_GP_1(bank, 7,  fn, sfx), PORT_GP_1(bank, 6,  fn, sfx),	\
--	PORT_GP_1(bank, 5,  fn, sfx), PORT_GP_1(bank, 4,  fn, sfx),	\
--	PORT_GP_1(bank, 3,  fn, sfx), PORT_GP_1(bank, 2,  fn, sfx),	\
--	PORT_GP_1(bank, 1,  fn, sfx), PORT_GP_1(bank, 0,  fn, sfx)
--
- #define CPU_ALL_PORT(fn, sfx)						\
- 	PORT_GP_32(0, fn, sfx),						\
- 	PORT_GP_32(1, fn, sfx),						\
-@@ -73,25 +35,6 @@
- 	PORT_GP_32(4, fn, sfx),						\
- 	PORT_GP_32(5, fn, sfx)
- 
--#define _GP_PORT_ALL(bank, pin, name, sfx)	name##_##sfx
--
--#define _GP_GPIO(bank, pin, _name, sfx)					\
--	[(bank * 32) + pin] = {						\
--		.name = __stringify(_name),				\
--		.enum_id = _name##_DATA,				\
--	}
--
--#define _GP_DATA(bank, pin, name, sfx)					\
--	PINMUX_DATA(name##_DATA, name##_FN)
--
--#define GP_ALL(str)		CPU_ALL_PORT(_GP_PORT_ALL, str)
--#define PINMUX_GPIO_GP_ALL()	CPU_ALL_PORT(_GP_GPIO, unused)
--#define PINMUX_DATA_GP_ALL()	CPU_ALL_PORT(_GP_DATA, unused)
--
--#define PINMUX_IPSR_DATA(ipsr, fn) PINMUX_DATA(fn##_MARK, FN_##ipsr, FN_##fn)
--#define PINMUX_IPSR_MODSEL_DATA(ipsr, fn, ms) PINMUX_DATA(fn##_MARK, FN_##ms, \
--							  FN_##ipsr, FN_##fn)
--
- enum {
- 	PINMUX_RESERVED = 0,
- 
-diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7372.c b/drivers/pinctrl/sh-pfc/pfc-sh7372.c
-index f269c46a..9174ff26 100644
---- a/drivers/pinctrl/sh-pfc/pfc-sh7372.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-sh7372.c
-@@ -384,11 +384,8 @@ enum {
- 	PINMUX_MARK_END,
- };
- 
--#define _PORT_DATA(pfx, sfx)	PORT_DATA_IO(pfx)
--#define PINMUX_DATA_GP_ALL()	CPU_ALL_PORT(_PORT_DATA, , unused)
--
- static const u16 pinmux_data[] = {
--	PINMUX_DATA_GP_ALL(),
-+	PINMUX_DATA_ALL(),
- 
- 	/* IRQ */
- 	PINMUX_DATA(IRQ0_6_MARK,	PORT6_FN0, 	MSEL1CR_0_0),
-diff --git a/drivers/pinctrl/sh-pfc/pfc-sh73a0.c b/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
-index 7935afbe..b275e507 100644
---- a/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
-@@ -466,12 +466,9 @@ enum {
- 	PINMUX_MARK_END,
- };
- 
--#define _PORT_DATA(pfx, sfx)	PORT_DATA_IO(pfx)
--#define PINMUX_DATA_GP_ALL()    CPU_ALL_PORT(_PORT_DATA, , unused)
--
- static const u16 pinmux_data[] = {
- 	/* specify valid pin states for each pin in GPIO mode */
--	PINMUX_DATA_GP_ALL(),
-+	PINMUX_DATA_ALL(),
- 
- 	/* Table 25-1 (Function 0-7) */
- 	PINMUX_DATA(VBUS_0_MARK, PORT0_FN1),
-diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7734.c b/drivers/pinctrl/sh-pfc/pfc-sh7734.c
-index 1e1e3e02..537a639e 100644
---- a/drivers/pinctrl/sh-pfc/pfc-sh7734.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-sh7734.c
-@@ -31,6 +31,12 @@
- 	PORT_32(fn, pfx##_4_, sfx),				\
- 	CPU_32_PORT5(fn, pfx##_5_, sfx)
- 
-+#undef _GP_GPIO
-+#undef _GP_DATA
-+#undef GP_ALL
-+#undef PINMUX_GPIO_GP_ALL
-+#undef PINMUX_DATA_GP_ALL
-+
- #define _GP_GPIO(pfx, sfx) PINMUX_GPIO(GPIO_GP##pfx, GP##pfx##_DATA)
- #define _GP_DATA(pfx, sfx) PINMUX_DATA(GP##pfx##_DATA, GP##pfx##_FN,	\
- 				       GP##pfx##_IN, GP##pfx##_OUT)
-@@ -45,10 +51,6 @@
- #define GP_INOUTSEL(bank) PORT_32_REV(_GP_INOUTSEL, _##bank##_, unused)
- #define GP_INDT(bank) PORT_32_REV(_GP_INDT, _##bank##_, unused)
- 
--#define PINMUX_IPSR_DATA(ipsr, fn) PINMUX_DATA(fn##_MARK, FN_##ipsr, FN_##fn)
--#define PINMUX_IPSR_MODSEL_DATA(ipsr, fn, ms) PINMUX_DATA(fn##_MARK, FN_##ms, \
--							  FN_##ipsr, FN_##fn)
--
- enum {
- 	PINMUX_RESERVED = 0,
- 
-diff --git a/drivers/pinctrl/sh-pfc/sh_pfc.h b/drivers/pinctrl/sh-pfc/sh_pfc.h
-index 7ad1b040..ebddfe03 100644
---- a/drivers/pinctrl/sh-pfc/sh_pfc.h
-+++ b/drivers/pinctrl/sh-pfc/sh_pfc.h
-@@ -66,19 +66,6 @@ struct pinmux_func {
- 	const char *name;
- };
- 
--#define PINMUX_GPIO(gpio, data_or_mark)			\
--	[gpio] = {					\
--		.name = __stringify(gpio),		\
--		.enum_id = data_or_mark,		\
--	}
--#define PINMUX_GPIO_FN(gpio, base, data_or_mark)	\
--	[gpio - (base)] = {				\
--		.name = __stringify(gpio),		\
--		.enum_id = data_or_mark,		\
--	}
--
--#define PINMUX_DATA(data_or_mark, ids...) data_or_mark, ids, 0
--
- struct pinmux_cfg_reg {
- 	unsigned long reg, reg_width, field_width;
- 	const u16 *enum_ids;
-@@ -159,26 +146,108 @@ struct sh_pfc_soc_info {
- 	unsigned long unlock_reg;
- };
- 
--/* helper macro for port */
-+/* -----------------------------------------------------------------------------
-+ * Helper macros to create pin and port lists
-+ */
-+
-+/*
-+ * sh_pfc_soc_info gpio_data array macros
-+ */
-+
-+#define PINMUX_DATA(data_or_mark, ids...)	data_or_mark, ids, 0
-+
-+#define PINMUX_IPSR_NOGP(ispr, fn)					\
-+	PINMUX_DATA(fn##_MARK, FN_##fn)
-+#define PINMUX_IPSR_DATA(ipsr, fn)					\
-+	PINMUX_DATA(fn##_MARK, FN_##fn, FN_##ipsr)
-+#define PINMUX_IPSR_NOGM(ispr, fn, ms)					\
-+	PINMUX_DATA(fn##_MARK, FN_##fn, FN_##ms)
-+#define PINMUX_IPSR_MSEL(ipsr, fn, ms)					\
-+	PINMUX_DATA(fn##_MARK, FN_##fn, FN_##ipsr, FN_##ms)
-+#define PINMUX_IPSR_MODSEL_DATA(ipsr, fn, ms)				\
-+	PINMUX_DATA(fn##_MARK, FN_##ms, FN_##ipsr, FN_##fn)
-+
-+/*
-+ * GP port style (32 ports banks)
-+ */
-+
-+#define PORT_GP_1(bank, pin, fn, sfx) fn(bank, pin, GP_##bank##_##pin, sfx)
-+
-+#define PORT_GP_32(bank, fn, sfx)					\
-+	PORT_GP_1(bank, 0,  fn, sfx), PORT_GP_1(bank, 1,  fn, sfx),	\
-+	PORT_GP_1(bank, 2,  fn, sfx), PORT_GP_1(bank, 3,  fn, sfx),	\
-+	PORT_GP_1(bank, 4,  fn, sfx), PORT_GP_1(bank, 5,  fn, sfx),	\
-+	PORT_GP_1(bank, 6,  fn, sfx), PORT_GP_1(bank, 7,  fn, sfx),	\
-+	PORT_GP_1(bank, 8,  fn, sfx), PORT_GP_1(bank, 9,  fn, sfx),	\
-+	PORT_GP_1(bank, 10, fn, sfx), PORT_GP_1(bank, 11, fn, sfx),	\
-+	PORT_GP_1(bank, 12, fn, sfx), PORT_GP_1(bank, 13, fn, sfx),	\
-+	PORT_GP_1(bank, 14, fn, sfx), PORT_GP_1(bank, 15, fn, sfx),	\
-+	PORT_GP_1(bank, 16, fn, sfx), PORT_GP_1(bank, 17, fn, sfx),	\
-+	PORT_GP_1(bank, 18, fn, sfx), PORT_GP_1(bank, 19, fn, sfx),	\
-+	PORT_GP_1(bank, 20, fn, sfx), PORT_GP_1(bank, 21, fn, sfx),	\
-+	PORT_GP_1(bank, 22, fn, sfx), PORT_GP_1(bank, 23, fn, sfx),	\
-+	PORT_GP_1(bank, 24, fn, sfx), PORT_GP_1(bank, 25, fn, sfx),	\
-+	PORT_GP_1(bank, 26, fn, sfx), PORT_GP_1(bank, 27, fn, sfx),	\
-+	PORT_GP_1(bank, 28, fn, sfx), PORT_GP_1(bank, 29, fn, sfx),	\
-+	PORT_GP_1(bank, 30, fn, sfx), PORT_GP_1(bank, 31, fn, sfx)
-+
-+#define PORT_GP_32_REV(bank, fn, sfx)					\
-+	PORT_GP_1(bank, 31, fn, sfx), PORT_GP_1(bank, 30, fn, sfx),	\
-+	PORT_GP_1(bank, 29, fn, sfx), PORT_GP_1(bank, 28, fn, sfx),	\
-+	PORT_GP_1(bank, 27, fn, sfx), PORT_GP_1(bank, 26, fn, sfx),	\
-+	PORT_GP_1(bank, 25, fn, sfx), PORT_GP_1(bank, 24, fn, sfx),	\
-+	PORT_GP_1(bank, 23, fn, sfx), PORT_GP_1(bank, 22, fn, sfx),	\
-+	PORT_GP_1(bank, 21, fn, sfx), PORT_GP_1(bank, 20, fn, sfx),	\
-+	PORT_GP_1(bank, 19, fn, sfx), PORT_GP_1(bank, 18, fn, sfx),	\
-+	PORT_GP_1(bank, 17, fn, sfx), PORT_GP_1(bank, 16, fn, sfx),	\
-+	PORT_GP_1(bank, 15, fn, sfx), PORT_GP_1(bank, 14, fn, sfx),	\
-+	PORT_GP_1(bank, 13, fn, sfx), PORT_GP_1(bank, 12, fn, sfx),	\
-+	PORT_GP_1(bank, 11, fn, sfx), PORT_GP_1(bank, 10, fn, sfx),	\
-+	PORT_GP_1(bank, 9,  fn, sfx), PORT_GP_1(bank, 8,  fn, sfx),	\
-+	PORT_GP_1(bank, 7,  fn, sfx), PORT_GP_1(bank, 6,  fn, sfx),	\
-+	PORT_GP_1(bank, 5,  fn, sfx), PORT_GP_1(bank, 4,  fn, sfx),	\
-+	PORT_GP_1(bank, 3,  fn, sfx), PORT_GP_1(bank, 2,  fn, sfx),	\
-+	PORT_GP_1(bank, 1,  fn, sfx), PORT_GP_1(bank, 0,  fn, sfx)
-+
-+/* GP_ALL(suffix) - Expand to a list of GP_#_#_suffix */
-+#define _GP_ALL(bank, pin, name, sfx)	name##_##sfx
-+#define GP_ALL(str)			CPU_ALL_PORT(_GP_ALL, str)
-+
-+/* PINMUX_GPIO_GP_ALL - Expand to a list of sh_pfc_pin entries */
-+#define _GP_GPIO(bank, pin, _name, sfx)					\
-+	[(bank * 32) + pin] = {						\
-+		.name = __stringify(_name),				\
-+		.enum_id = _name##_DATA,				\
-+	}
-+#define PINMUX_GPIO_GP_ALL()		CPU_ALL_PORT(_GP_GPIO, unused)
-+
-+/* PINMUX_DATA_GP_ALL -  Expand to a list of name_DATA, name_FN marks */
-+#define _GP_DATA(bank, pin, name, sfx)	PINMUX_DATA(name##_DATA, name##_FN)
-+#define PINMUX_DATA_GP_ALL()		CPU_ALL_PORT(_GP_DATA, unused)
-+
-+/*
-+ * PORT style (linear pin space)
-+ */
-+
- #define PORT_1(fn, pfx, sfx) fn(pfx, sfx)
- 
--#define PORT_10(fn, pfx, sfx) \
--	PORT_1(fn, pfx##0, sfx), PORT_1(fn, pfx##1, sfx),	\
--	PORT_1(fn, pfx##2, sfx), PORT_1(fn, pfx##3, sfx),	\
--	PORT_1(fn, pfx##4, sfx), PORT_1(fn, pfx##5, sfx),	\
--	PORT_1(fn, pfx##6, sfx), PORT_1(fn, pfx##7, sfx),	\
-+#define PORT_10(fn, pfx, sfx)						\
-+	PORT_1(fn, pfx##0, sfx), PORT_1(fn, pfx##1, sfx),		\
-+	PORT_1(fn, pfx##2, sfx), PORT_1(fn, pfx##3, sfx),		\
-+	PORT_1(fn, pfx##4, sfx), PORT_1(fn, pfx##5, sfx),		\
-+	PORT_1(fn, pfx##6, sfx), PORT_1(fn, pfx##7, sfx),		\
- 	PORT_1(fn, pfx##8, sfx), PORT_1(fn, pfx##9, sfx)
- 
--#define PORT_10_REV(fn, pfx, sfx)	\
--	PORT_1(fn, pfx##9, sfx), PORT_1(fn, pfx##8, sfx),	\
--	PORT_1(fn, pfx##7, sfx), PORT_1(fn, pfx##6, sfx),	\
--	PORT_1(fn, pfx##5, sfx), PORT_1(fn, pfx##4, sfx),	\
--	PORT_1(fn, pfx##3, sfx), PORT_1(fn, pfx##2, sfx),	\
-+#define PORT_10_REV(fn, pfx, sfx)					\
-+	PORT_1(fn, pfx##9, sfx), PORT_1(fn, pfx##8, sfx),		\
-+	PORT_1(fn, pfx##7, sfx), PORT_1(fn, pfx##6, sfx),		\
-+	PORT_1(fn, pfx##5, sfx), PORT_1(fn, pfx##4, sfx),		\
-+	PORT_1(fn, pfx##3, sfx), PORT_1(fn, pfx##2, sfx),		\
- 	PORT_1(fn, pfx##1, sfx), PORT_1(fn, pfx##0, sfx)
- 
--#define PORT_32(fn, pfx, sfx)					\
--	PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx),	\
--	PORT_10(fn, pfx##2, sfx), PORT_1(fn, pfx##30, sfx),	\
-+#define PORT_32(fn, pfx, sfx)						\
-+	PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx),		\
-+	PORT_10(fn, pfx##2, sfx), PORT_1(fn, pfx##30, sfx),		\
- 	PORT_1(fn, pfx##31, sfx)
- 
- #define PORT_32_REV(fn, pfx, sfx)					\
-@@ -187,22 +256,43 @@ struct sh_pfc_soc_info {
- 	PORT_10_REV(fn, pfx, sfx)
- 
- #define PORT_90(fn, pfx, sfx) \
--	PORT_10(fn, pfx##1, sfx), PORT_10(fn, pfx##2, sfx),	\
--	PORT_10(fn, pfx##3, sfx), PORT_10(fn, pfx##4, sfx),	\
--	PORT_10(fn, pfx##5, sfx), PORT_10(fn, pfx##6, sfx),	\
--	PORT_10(fn, pfx##7, sfx), PORT_10(fn, pfx##8, sfx),	\
-+	PORT_10(fn, pfx##1, sfx), PORT_10(fn, pfx##2, sfx),		\
-+	PORT_10(fn, pfx##3, sfx), PORT_10(fn, pfx##4, sfx),		\
-+	PORT_10(fn, pfx##5, sfx), PORT_10(fn, pfx##6, sfx),		\
-+	PORT_10(fn, pfx##7, sfx), PORT_10(fn, pfx##8, sfx),		\
- 	PORT_10(fn, pfx##9, sfx)
- 
--#define _PORT_ALL(pfx, sfx) pfx##_##sfx
--#define PORT_ALL(str)	CPU_ALL_PORT(_PORT_ALL, PORT, str)
--#define GPIO_FN(str) PINMUX_GPIO_FN(GPIO_FN_##str, PINMUX_FN_BASE, str##_MARK)
-+/* PORT_ALL(suffix) - Expand to a list of PORT_#_suffix */
-+#define _PORT_ALL(pfx, sfx)		pfx##_##sfx
-+#define PORT_ALL(str)			CPU_ALL_PORT(_PORT_ALL, PORT, str)
- 
--/* helper macro for pinmux data arrays */
--#define PORT_DATA_IO(nr)	\
--	PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT,	\
--		    PORT##nr##_IN)
-+/* PINMUX_GPIO - Expand to a sh_pfc_pin entry */
-+#define PINMUX_GPIO(gpio, data_or_mark)					\
-+	[gpio] = {							\
-+		.name = __stringify(gpio),				\
-+		.enum_id = data_or_mark,				\
-+	}
-+
-+/* PINMUX_DATA_ALL - Expand to a list of PORT_name_DATA, PORT_name_FN0,
-+ *		     PORT_name_OUT, PORT_name_IN marks
-+ */
-+#define _PORT_DATA(pfx, sfx)						\
-+	PINMUX_DATA(PORT##pfx##_DATA, PORT##pfx##_FN0,			\
-+		    PORT##pfx##_OUT, PORT##pfx##_IN)
-+#define PINMUX_DATA_ALL()		CPU_ALL_PORT(_PORT_DATA, , unused)
-+
-+/* GPIO_FN(name) - Expand to a sh_pfc_pin entry for a function GPIO */
-+#define PINMUX_GPIO_FN(gpio, base, data_or_mark)			\
-+	[gpio - (base)] = {						\
-+		.name = __stringify(gpio),				\
-+		.enum_id = data_or_mark,				\
-+	}
-+#define GPIO_FN(str)							\
-+	PINMUX_GPIO_FN(GPIO_FN_##str, PINMUX_FN_BASE, str##_MARK)
- 
--/* helper macro for top 4 bits in PORTnCR */
-+/*
-+ * PORTnCR macro
-+ */
- #define _PCRH(in, in_pd, in_pu, out)	\
- 	0, (out), (in), 0,		\
- 	0, 0, 0, 0,			\
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0545-sh-pfc-Consolidate-pin-definition-macros.patch b/patches.renesas/0545-sh-pfc-Consolidate-pin-definition-macros.patch
deleted file mode 100644
index d3ca3a428b337..0000000000000
--- a/patches.renesas/0545-sh-pfc-Consolidate-pin-definition-macros.patch
+++ /dev/null
@@ -1,194 +0,0 @@
-From b457ae8c115a7bd5c8fbe9bc741dd8ac95c20502 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Mon, 15 Jul 2013 17:42:48 +0200
-Subject: sh-pfc: Consolidate pin definition macros
-
-Move the pin definition macros to a common header file.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
-(cherry picked from commit df020272abd6e30673f397fea31e5e133a87c0fe)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a73a4.c | 11 ++---------
- drivers/pinctrl/sh-pfc/pfc-r8a7740.c | 25 +++++++++----------------
- drivers/pinctrl/sh-pfc/pfc-sh7372.c  | 25 +++++++++----------------
- drivers/pinctrl/sh-pfc/pfc-sh73a0.c  | 23 ++++++++---------------
- drivers/pinctrl/sh-pfc/sh_pfc.h      |  8 ++++++++
- 5 files changed, 36 insertions(+), 56 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a73a4.c b/drivers/pinctrl/sh-pfc/pfc-r8a73a4.c
-index d8115331..288821b6 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a73a4.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a73a4.c
-@@ -1266,19 +1266,12 @@ static const u16 pinmux_data[] = {
- 	PINMUX_DATA(IRQ57_MARK,			PORT329_FN0),
- };
- 
--#define R8A73A4_PIN(pin, cfgs)			\
--	{					\
--		.name = __stringify(PORT##pin),	\
--		.enum_id = PORT##pin##_DATA,	\
--		.configs = cfgs,		\
--	}
--
- #define __O	(SH_PFC_PIN_CFG_OUTPUT)
- #define __IO	(SH_PFC_PIN_CFG_INPUT | SH_PFC_PIN_CFG_OUTPUT)
- #define __PUD	(SH_PFC_PIN_CFG_PULL_DOWN | SH_PFC_PIN_CFG_PULL_UP)
- 
--#define R8A73A4_PIN_IO_PU_PD(pin)       R8A73A4_PIN(pin, __IO | __PUD)
--#define R8A73A4_PIN_O(pin)              R8A73A4_PIN(pin, __O)
-+#define R8A73A4_PIN_IO_PU_PD(pin)       SH_PFC_PIN_CFG(pin, __IO | __PUD)
-+#define R8A73A4_PIN_O(pin)              SH_PFC_PIN_CFG(pin, __O)
- 
- static struct sh_pfc_pin pinmux_pins[] = {
- 	R8A73A4_PIN_IO_PU_PD(0), R8A73A4_PIN_IO_PU_PD(1),
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-index e6900511..b5bc1d09 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-@@ -1527,13 +1527,6 @@ static const u16 pinmux_data[] = {
- 	PINMUX_DATA(TRACEAUD_FROM_MEMC_MARK,			MSEL5CR_30_1,	MSEL5CR_29_0),
- };
- 
--#define R8A7740_PIN(pin, cfgs)						\
--	{								\
--		.name = __stringify(PORT##pin),				\
--		.enum_id = PORT##pin##_DATA,				\
--		.configs = cfgs,					\
--	}
--
- #define __I		(SH_PFC_PIN_CFG_INPUT)
- #define __O		(SH_PFC_PIN_CFG_OUTPUT)
- #define __IO		(SH_PFC_PIN_CFG_INPUT | SH_PFC_PIN_CFG_OUTPUT)
-@@ -1541,15 +1534,15 @@ static const u16 pinmux_data[] = {
- #define __PU		(SH_PFC_PIN_CFG_PULL_UP)
- #define __PUD		(SH_PFC_PIN_CFG_PULL_DOWN | SH_PFC_PIN_CFG_PULL_UP)
- 
--#define R8A7740_PIN_I_PD(pin)		R8A7740_PIN(pin, __I | __PD)
--#define R8A7740_PIN_I_PU(pin)		R8A7740_PIN(pin, __I | __PU)
--#define R8A7740_PIN_I_PU_PD(pin)		R8A7740_PIN(pin, __I | __PUD)
--#define R8A7740_PIN_IO(pin)		R8A7740_PIN(pin, __IO)
--#define R8A7740_PIN_IO_PD(pin)		R8A7740_PIN(pin, __IO | __PD)
--#define R8A7740_PIN_IO_PU(pin)		R8A7740_PIN(pin, __IO | __PU)
--#define R8A7740_PIN_IO_PU_PD(pin)	R8A7740_PIN(pin, __IO | __PUD)
--#define R8A7740_PIN_O(pin)		R8A7740_PIN(pin, __O)
--#define R8A7740_PIN_O_PU_PD(pin)		R8A7740_PIN(pin, __O | __PUD)
-+#define R8A7740_PIN_I_PD(pin)		SH_PFC_PIN_CFG(pin, __I | __PD)
-+#define R8A7740_PIN_I_PU(pin)		SH_PFC_PIN_CFG(pin, __I | __PU)
-+#define R8A7740_PIN_I_PU_PD(pin)	SH_PFC_PIN_CFG(pin, __I | __PUD)
-+#define R8A7740_PIN_IO(pin)		SH_PFC_PIN_CFG(pin, __IO)
-+#define R8A7740_PIN_IO_PD(pin)		SH_PFC_PIN_CFG(pin, __IO | __PD)
-+#define R8A7740_PIN_IO_PU(pin)		SH_PFC_PIN_CFG(pin, __IO | __PU)
-+#define R8A7740_PIN_IO_PU_PD(pin)	SH_PFC_PIN_CFG(pin, __IO | __PUD)
-+#define R8A7740_PIN_O(pin)		SH_PFC_PIN_CFG(pin, __O)
-+#define R8A7740_PIN_O_PU_PD(pin)	SH_PFC_PIN_CFG(pin, __O | __PUD)
- 
- static struct sh_pfc_pin pinmux_pins[] = {
- 	/* Table 56-1 (I/O and Pull U/D) */
-diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7372.c b/drivers/pinctrl/sh-pfc/pfc-sh7372.c
-index 9174ff26..17f1c179 100644
---- a/drivers/pinctrl/sh-pfc/pfc-sh7372.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-sh7372.c
-@@ -829,13 +829,6 @@ static const u16 pinmux_data[] = {
- 	PINMUX_DATA(MFIv4_MARK,		MSEL4CR_6_1),
- };
- 
--#define SH7372_PIN(pin, cfgs)						\
--	{								\
--		.name = __stringify(PORT##pin),				\
--		.enum_id = PORT##pin##_DATA,				\
--		.configs = cfgs,					\
--	}
--
- #define __I		(SH_PFC_PIN_CFG_INPUT)
- #define __O		(SH_PFC_PIN_CFG_OUTPUT)
- #define __IO		(SH_PFC_PIN_CFG_INPUT | SH_PFC_PIN_CFG_OUTPUT)
-@@ -843,15 +836,15 @@ static const u16 pinmux_data[] = {
- #define __PU		(SH_PFC_PIN_CFG_PULL_UP)
- #define __PUD		(SH_PFC_PIN_CFG_PULL_DOWN | SH_PFC_PIN_CFG_PULL_UP)
- 
--#define SH7372_PIN_I_PD(pin)		SH7372_PIN(pin, __I | __PD)
--#define SH7372_PIN_I_PU(pin)		SH7372_PIN(pin, __I | __PU)
--#define SH7372_PIN_I_PU_PD(pin)		SH7372_PIN(pin, __I | __PUD)
--#define SH7372_PIN_IO(pin)		SH7372_PIN(pin, __IO)
--#define SH7372_PIN_IO_PD(pin)		SH7372_PIN(pin, __IO | __PD)
--#define SH7372_PIN_IO_PU(pin)		SH7372_PIN(pin, __IO | __PU)
--#define SH7372_PIN_IO_PU_PD(pin)	SH7372_PIN(pin, __IO | __PUD)
--#define SH7372_PIN_O(pin)		SH7372_PIN(pin, __O)
--#define SH7372_PIN_O_PU_PD(pin)		SH7372_PIN(pin, __O | __PUD)
-+#define SH7372_PIN_I_PD(pin)		SH_PFC_PIN_CFG(pin, __I | __PD)
-+#define SH7372_PIN_I_PU(pin)		SH_PFC_PIN_CFG(pin, __I | __PU)
-+#define SH7372_PIN_I_PU_PD(pin)		SH_PFC_PIN_CFG(pin, __I | __PUD)
-+#define SH7372_PIN_IO(pin)		SH_PFC_PIN_CFG(pin, __IO)
-+#define SH7372_PIN_IO_PD(pin)		SH_PFC_PIN_CFG(pin, __IO | __PD)
-+#define SH7372_PIN_IO_PU(pin)		SH_PFC_PIN_CFG(pin, __IO | __PU)
-+#define SH7372_PIN_IO_PU_PD(pin)	SH_PFC_PIN_CFG(pin, __IO | __PUD)
-+#define SH7372_PIN_O(pin)		SH_PFC_PIN_CFG(pin, __O)
-+#define SH7372_PIN_O_PU_PD(pin)		SH_PFC_PIN_CFG(pin, __O | __PUD)
- 
- static struct sh_pfc_pin pinmux_pins[] = {
- 	/* Table 57-1 (I/O and Pull U/D) */
-diff --git a/drivers/pinctrl/sh-pfc/pfc-sh73a0.c b/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
-index b275e507..21d2726c 100644
---- a/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
-@@ -1157,13 +1157,6 @@ static const u16 pinmux_data[] = {
- 	PINMUX_DATA(EDBGREQ_PU_MARK, MSEL4CR_MSEL1_1),
- };
- 
--#define SH73A0_PIN(pin, cfgs)						\
--	{								\
--		.name = __stringify(PORT##pin),				\
--		.enum_id = PORT##pin##_DATA,				\
--		.configs = cfgs,					\
--	}
--
- #define __I		(SH_PFC_PIN_CFG_INPUT)
- #define __O		(SH_PFC_PIN_CFG_OUTPUT)
- #define __IO		(SH_PFC_PIN_CFG_INPUT | SH_PFC_PIN_CFG_OUTPUT)
-@@ -1171,14 +1164,14 @@ static const u16 pinmux_data[] = {
- #define __PU		(SH_PFC_PIN_CFG_PULL_UP)
- #define __PUD		(SH_PFC_PIN_CFG_PULL_DOWN | SH_PFC_PIN_CFG_PULL_UP)
- 
--#define SH73A0_PIN_I_PD(pin)		SH73A0_PIN(pin, __I | __PD)
--#define SH73A0_PIN_I_PU(pin)		SH73A0_PIN(pin, __I | __PU)
--#define SH73A0_PIN_I_PU_PD(pin)		SH73A0_PIN(pin, __I | __PUD)
--#define SH73A0_PIN_IO(pin)		SH73A0_PIN(pin, __IO)
--#define SH73A0_PIN_IO_PD(pin)		SH73A0_PIN(pin, __IO | __PD)
--#define SH73A0_PIN_IO_PU(pin)		SH73A0_PIN(pin, __IO | __PU)
--#define SH73A0_PIN_IO_PU_PD(pin)	SH73A0_PIN(pin, __IO | __PUD)
--#define SH73A0_PIN_O(pin)		SH73A0_PIN(pin, __O)
-+#define SH73A0_PIN_I_PD(pin)		SH_PFC_PIN_CFG(pin, __I | __PD)
-+#define SH73A0_PIN_I_PU(pin)		SH_PFC_PIN_CFG(pin, __I | __PU)
-+#define SH73A0_PIN_I_PU_PD(pin)		SH_PFC_PIN_CFG(pin, __I | __PUD)
-+#define SH73A0_PIN_IO(pin)		SH_PFC_PIN_CFG(pin, __IO)
-+#define SH73A0_PIN_IO_PD(pin)		SH_PFC_PIN_CFG(pin, __IO | __PD)
-+#define SH73A0_PIN_IO_PU(pin)		SH_PFC_PIN_CFG(pin, __IO | __PU)
-+#define SH73A0_PIN_IO_PU_PD(pin)	SH_PFC_PIN_CFG(pin, __IO | __PUD)
-+#define SH73A0_PIN_O(pin)		SH_PFC_PIN_CFG(pin, __O)
- 
- static struct sh_pfc_pin pinmux_pins[] = {
- 	/* Table 25-1 (I/O and Pull U/D) */
-diff --git a/drivers/pinctrl/sh-pfc/sh_pfc.h b/drivers/pinctrl/sh-pfc/sh_pfc.h
-index ebddfe03..f7c5b808 100644
---- a/drivers/pinctrl/sh-pfc/sh_pfc.h
-+++ b/drivers/pinctrl/sh-pfc/sh_pfc.h
-@@ -273,6 +273,14 @@ struct sh_pfc_soc_info {
- 		.enum_id = data_or_mark,				\
- 	}
- 
-+/* SH_PFC_PIN_CFG - Expand to a sh_pfc_pin entry (named PORT#) with config */
-+#define SH_PFC_PIN_CFG(pin, cfgs)					\
-+	{								\
-+		.name = __stringify(PORT##pin),				\
-+		.enum_id = PORT##pin##_DATA,				\
-+		.configs = cfgs,					\
-+	}
-+
- /* PINMUX_DATA_ALL - Expand to a list of PORT_name_DATA, PORT_name_FN0,
-  *		     PORT_name_OUT, PORT_name_IN marks
-  */
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0546-sh-pfc-sh7734-Use-the-common-GP-port-style-macros.patch b/patches.renesas/0546-sh-pfc-sh7734-Use-the-common-GP-port-style-macros.patch
deleted file mode 100644
index 75bc86c58887e..0000000000000
--- a/patches.renesas/0546-sh-pfc-sh7734-Use-the-common-GP-port-style-macros.patch
+++ /dev/null
@@ -1,116 +0,0 @@
-From 42ae8487b3ab16f4e96a19191affc44e128edde9 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Mon, 15 Jul 2013 16:07:08 +0200
-Subject: sh-pfc: sh7734: Use the common GP port style macros
-
-The SoC has a bank-style PFC. Replace the custom-defined macros with
-common macros from sh-pfc.h.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit 8157b964290ae7483ea67cf65c3707b23a8be5c0)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-sh7734.c | 56 +++++++++++++++----------------------
- drivers/pinctrl/sh-pfc/sh_pfc.h     | 17 -----------
- 2 files changed, 22 insertions(+), 51 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7734.c b/drivers/pinctrl/sh-pfc/pfc-sh7734.c
-index 537a639e..ec0c47c4 100644
---- a/drivers/pinctrl/sh-pfc/pfc-sh7734.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-sh7734.c
-@@ -14,42 +14,30 @@
- 
- #include "sh_pfc.h"
- 
--#define CPU_32_PORT5(fn, pfx, sfx)				\
--	PORT_1(fn, pfx##0, sfx), PORT_1(fn, pfx##1, sfx),	\
--	PORT_1(fn, pfx##2, sfx), PORT_1(fn, pfx##3, sfx),	\
--	PORT_1(fn, pfx##4, sfx), PORT_1(fn, pfx##5, sfx),	\
--	PORT_1(fn, pfx##6, sfx), PORT_1(fn, pfx##7, sfx),	\
--	PORT_1(fn, pfx##8, sfx), PORT_1(fn, pfx##9, sfx),	\
--	PORT_1(fn, pfx##10, sfx), PORT_1(fn, pfx##11, sfx)
--
--/* GPSR0 - GPSR5 */
--#define CPU_ALL_PORT(fn, pfx, sfx)				\
--	PORT_32(fn, pfx##_0_, sfx),			\
--	PORT_32(fn, pfx##_1_, sfx),				\
--	PORT_32(fn, pfx##_2_, sfx),				\
--	PORT_32(fn, pfx##_3_, sfx),				\
--	PORT_32(fn, pfx##_4_, sfx),				\
--	CPU_32_PORT5(fn, pfx##_5_, sfx)
--
--#undef _GP_GPIO
--#undef _GP_DATA
--#undef GP_ALL
--#undef PINMUX_GPIO_GP_ALL
--#undef PINMUX_DATA_GP_ALL
--
--#define _GP_GPIO(pfx, sfx) PINMUX_GPIO(GPIO_GP##pfx, GP##pfx##_DATA)
--#define _GP_DATA(pfx, sfx) PINMUX_DATA(GP##pfx##_DATA, GP##pfx##_FN,	\
--				       GP##pfx##_IN, GP##pfx##_OUT)
-+#define PORT_GP_12(bank, fn, sfx)					\
-+	PORT_GP_1(bank, 0, fn, sfx),  PORT_GP_1(bank, 1, fn, sfx),	\
-+	PORT_GP_1(bank, 2, fn, sfx),  PORT_GP_1(bank, 3, fn, sfx),	\
-+	PORT_GP_1(bank, 4, fn, sfx),  PORT_GP_1(bank, 5, fn, sfx),	\
-+	PORT_GP_1(bank, 6, fn, sfx),  PORT_GP_1(bank, 7, fn, sfx),	\
-+	PORT_GP_1(bank, 8, fn, sfx),  PORT_GP_1(bank, 9, fn, sfx),	\
-+	PORT_GP_1(bank, 10, fn, sfx), PORT_GP_1(bank, 11, fn, sfx)
-+
-+#define CPU_ALL_PORT(fn, sfx)						\
-+	PORT_GP_32(0, fn, sfx),						\
-+	PORT_GP_32(1, fn, sfx),						\
-+	PORT_GP_32(2, fn, sfx),						\
-+	PORT_GP_32(3, fn, sfx),						\
-+	PORT_GP_32(4, fn, sfx),						\
-+	PORT_GP_12(5, fn, sfx)
- 
--#define _GP_INOUTSEL(pfx, sfx) GP##pfx##_IN, GP##pfx##_OUT
--#define _GP_INDT(pfx, sfx) GP##pfx##_DATA
--
--#define GP_ALL(str)	CPU_ALL_PORT(_PORT_ALL, GP, str)
--#define PINMUX_GPIO_GP_ALL()	CPU_ALL_PORT(_GP_GPIO, , unused)
--#define PINMUX_DATA_GP_ALL()	CPU_ALL_PORT(_GP_DATA, , unused)
-+#undef _GP_DATA
-+#define _GP_DATA(bank, pin, name, sfx)					\
-+	PINMUX_DATA(name##_DATA, name##_FN, name##_IN, name##_OUT)
- 
--#define GP_INOUTSEL(bank) PORT_32_REV(_GP_INOUTSEL, _##bank##_, unused)
--#define GP_INDT(bank) PORT_32_REV(_GP_INDT, _##bank##_, unused)
-+#define _GP_INOUTSEL(bank, pin, name, sfx)	name##_IN, name##_OUT
-+#define _GP_INDT(bank, pin, name, sfx)		name##_DATA
-+#define GP_INOUTSEL(bank)	PORT_GP_32_REV(bank, _GP_INOUTSEL, unused)
-+#define GP_INDT(bank)		PORT_GP_32_REV(bank, _GP_INDT, unused)
- 
- enum {
- 	PINMUX_RESERVED = 0,
-diff --git a/drivers/pinctrl/sh-pfc/sh_pfc.h b/drivers/pinctrl/sh-pfc/sh_pfc.h
-index f7c5b808..05b905fa 100644
---- a/drivers/pinctrl/sh-pfc/sh_pfc.h
-+++ b/drivers/pinctrl/sh-pfc/sh_pfc.h
-@@ -238,23 +238,6 @@ struct sh_pfc_soc_info {
- 	PORT_1(fn, pfx##6, sfx), PORT_1(fn, pfx##7, sfx),		\
- 	PORT_1(fn, pfx##8, sfx), PORT_1(fn, pfx##9, sfx)
- 
--#define PORT_10_REV(fn, pfx, sfx)					\
--	PORT_1(fn, pfx##9, sfx), PORT_1(fn, pfx##8, sfx),		\
--	PORT_1(fn, pfx##7, sfx), PORT_1(fn, pfx##6, sfx),		\
--	PORT_1(fn, pfx##5, sfx), PORT_1(fn, pfx##4, sfx),		\
--	PORT_1(fn, pfx##3, sfx), PORT_1(fn, pfx##2, sfx),		\
--	PORT_1(fn, pfx##1, sfx), PORT_1(fn, pfx##0, sfx)
--
--#define PORT_32(fn, pfx, sfx)						\
--	PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx),		\
--	PORT_10(fn, pfx##2, sfx), PORT_1(fn, pfx##30, sfx),		\
--	PORT_1(fn, pfx##31, sfx)
--
--#define PORT_32_REV(fn, pfx, sfx)					\
--	PORT_1(fn, pfx##31, sfx), PORT_1(fn, pfx##30, sfx),		\
--	PORT_10_REV(fn, pfx##2, sfx), PORT_10_REV(fn, pfx##1, sfx),	\
--	PORT_10_REV(fn, pfx, sfx)
--
- #define PORT_90(fn, pfx, sfx) \
- 	PORT_10(fn, pfx##1, sfx), PORT_10(fn, pfx##2, sfx),		\
- 	PORT_10(fn, pfx##3, sfx), PORT_10(fn, pfx##4, sfx),		\
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0547-sh-pfc-shx3-Remove-shx3_-prefix-from-static-symbols.patch b/patches.renesas/0547-sh-pfc-shx3-Remove-shx3_-prefix-from-static-symbols.patch
deleted file mode 100644
index 6b2fabadb8089..0000000000000
--- a/patches.renesas/0547-sh-pfc-shx3-Remove-shx3_-prefix-from-static-symbols.patch
+++ /dev/null
@@ -1,92 +0,0 @@
-From e84ae7155faca785eb8fba9a97f46f26102b6544 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Mon, 15 Jul 2013 17:13:51 +0200
-Subject: sh-pfc: shx3: Remove shx3_ prefix from static symbols
-
-Unlike all other PFC SoC data, the shx3 data prefix all static symbols
-with shx3_. Remove the prefix to be consistent with the other source
-files.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit 18dcc58341e4094a2799acfd1e8779a94e97fd13)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-shx3.c | 28 ++++++++++++++--------------
- 1 file changed, 14 insertions(+), 14 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-shx3.c b/drivers/pinctrl/sh-pfc/pfc-shx3.c
-index 48a6c60f..775a622b 100644
---- a/drivers/pinctrl/sh-pfc/pfc-shx3.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-shx3.c
-@@ -127,7 +127,7 @@ enum {
- 	PINMUX_MARK_END,
- };
- 
--static const u16 shx3_pinmux_data[] = {
-+static const u16 pinmux_data[] = {
- 	/* PA GPIO */
- 	PINMUX_DATA(PA7_DATA, PA7_IN, PA7_OUT),
- 	PINMUX_DATA(PA6_DATA, PA6_IN, PA6_OUT),
-@@ -285,7 +285,7 @@ static const u16 shx3_pinmux_data[] = {
- 	PINMUX_DATA(IRQOUT_MARK,	PH0_FN),
- };
- 
--static struct sh_pfc_pin shx3_pinmux_pins[] = {
-+static struct sh_pfc_pin pinmux_pins[] = {
- 	/* PA */
- 	PINMUX_GPIO(GPIO_PA7, PA7_DATA),
- 	PINMUX_GPIO(GPIO_PA6, PA6_DATA),
-@@ -365,9 +365,9 @@ static struct sh_pfc_pin shx3_pinmux_pins[] = {
- 	PINMUX_GPIO(GPIO_PH0, PH0_DATA),
- };
- 
--#define PINMUX_FN_BASE	ARRAY_SIZE(shx3_pinmux_pins)
-+#define PINMUX_FN_BASE	ARRAY_SIZE(pinmux_pins)
- 
--static const struct pinmux_func shx3_pinmux_func_gpios[] = {
-+static const struct pinmux_func pinmux_func_gpios[] = {
- 	/* FN */
- 	GPIO_FN(D31),
- 	GPIO_FN(D30),
-@@ -433,7 +433,7 @@ static const struct pinmux_func shx3_pinmux_func_gpios[] = {
- 	GPIO_FN(IRQOUT),
- };
- 
--static const struct pinmux_cfg_reg shx3_pinmux_config_regs[] = {
-+static const struct pinmux_cfg_reg pinmux_config_regs[] = {
- 	{ PINMUX_CFG_REG("PABCR", 0xffc70000, 32, 2) {
- 		PA7_FN, PA7_OUT, PA7_IN, 0,
- 		PA6_FN, PA6_OUT, PA6_IN, 0,
-@@ -509,7 +509,7 @@ static const struct pinmux_cfg_reg shx3_pinmux_config_regs[] = {
- 	{ },
- };
- 
--static const struct pinmux_data_reg shx3_pinmux_data_regs[] = {
-+static const struct pinmux_data_reg pinmux_data_regs[] = {
- 	{ PINMUX_DATA_REG("PABDR", 0xffc70010, 32) {
- 		0, 0, 0, 0, 0, 0, 0, 0,
- 		PA7_DATA, PA6_DATA, PA5_DATA, PA4_DATA,
-@@ -550,12 +550,12 @@ const struct sh_pfc_soc_info shx3_pinmux_info = {
- 	.input		= { PINMUX_INPUT_BEGIN,	   PINMUX_INPUT_END },
- 	.output		= { PINMUX_OUTPUT_BEGIN,   PINMUX_OUTPUT_END },
- 	.function	= { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
--	.pins		= shx3_pinmux_pins,
--	.nr_pins	= ARRAY_SIZE(shx3_pinmux_pins),
--	.func_gpios	= shx3_pinmux_func_gpios,
--	.nr_func_gpios	= ARRAY_SIZE(shx3_pinmux_func_gpios),
--	.gpio_data	= shx3_pinmux_data,
--	.gpio_data_size	= ARRAY_SIZE(shx3_pinmux_data),
--	.cfg_regs	= shx3_pinmux_config_regs,
--	.data_regs	= shx3_pinmux_data_regs,
-+	.pins		= pinmux_pins,
-+	.nr_pins	= ARRAY_SIZE(pinmux_pins),
-+	.func_gpios	= pinmux_func_gpios,
-+	.nr_func_gpios	= ARRAY_SIZE(pinmux_func_gpios),
-+	.gpio_data	= pinmux_data,
-+	.gpio_data_size	= ARRAY_SIZE(pinmux_data),
-+	.cfg_regs	= pinmux_config_regs,
-+	.data_regs	= pinmux_data_regs,
- };
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0548-sh-pfc-Don-t-duplicate-argument-to-PINMUX_GPIO-macro.patch b/patches.renesas/0548-sh-pfc-Don-t-duplicate-argument-to-PINMUX_GPIO-macro.patch
deleted file mode 100644
index e1e181971f9ce..0000000000000
--- a/patches.renesas/0548-sh-pfc-Don-t-duplicate-argument-to-PINMUX_GPIO-macro.patch
+++ /dev/null
@@ -1,3327 +0,0 @@
-From 48271b576b56606ed0d572cfe838b6f415acfc28 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Mon, 15 Jul 2013 21:16:25 +0200
-Subject: sh-pfc: Don't duplicate argument to PINMUX_GPIO macro
-
-The PINMUX_GPIO macro takes a port name and a data mark, respectively of
-the form GPIO_name and name_DATA. Modify the macro to take the name as a
-single argument and derive the port name and data mark from it.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
-(cherry picked from commit 7cbb0e55e27e6b8134813849f0cb899773d59548)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-sh7203.c | 199 +++++++++---------
- drivers/pinctrl/sh-pfc/pfc-sh7264.c | 243 +++++++++++----------
- drivers/pinctrl/sh-pfc/pfc-sh7269.c | 282 ++++++++++++-------------
- drivers/pinctrl/sh-pfc/pfc-sh7720.c | 234 ++++++++++-----------
- drivers/pinctrl/sh-pfc/pfc-sh7722.c | 298 +++++++++++++-------------
- drivers/pinctrl/sh-pfc/pfc-sh7723.c | 340 +++++++++++++++---------------
- drivers/pinctrl/sh-pfc/pfc-sh7724.c | 360 +++++++++++++++----------------
- drivers/pinctrl/sh-pfc/pfc-sh7757.c | 408 ++++++++++++++++++------------------
- drivers/pinctrl/sh-pfc/pfc-sh7785.c | 222 ++++++++++----------
- drivers/pinctrl/sh-pfc/pfc-sh7786.c | 120 +++++------
- drivers/pinctrl/sh-pfc/pfc-shx3.c   | 124 +++++------
- drivers/pinctrl/sh-pfc/sh_pfc.h     |   8 +-
- 12 files changed, 1418 insertions(+), 1420 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7203.c b/drivers/pinctrl/sh-pfc/pfc-sh7203.c
-index 44878140..bf3d8f28 100644
---- a/drivers/pinctrl/sh-pfc/pfc-sh7203.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-sh7203.c
-@@ -703,117 +703,116 @@ static const u16 pinmux_data[] = {
- };
- 
- static struct sh_pfc_pin pinmux_pins[] = {
--
- 	/* PA */
--	PINMUX_GPIO(GPIO_PA7, PA7_DATA),
--	PINMUX_GPIO(GPIO_PA6, PA6_DATA),
--	PINMUX_GPIO(GPIO_PA5, PA5_DATA),
--	PINMUX_GPIO(GPIO_PA4, PA4_DATA),
--	PINMUX_GPIO(GPIO_PA3, PA3_DATA),
--	PINMUX_GPIO(GPIO_PA2, PA2_DATA),
--	PINMUX_GPIO(GPIO_PA1, PA1_DATA),
--	PINMUX_GPIO(GPIO_PA0, PA0_DATA),
-+	PINMUX_GPIO(PA7),
-+	PINMUX_GPIO(PA6),
-+	PINMUX_GPIO(PA5),
-+	PINMUX_GPIO(PA4),
-+	PINMUX_GPIO(PA3),
-+	PINMUX_GPIO(PA2),
-+	PINMUX_GPIO(PA1),
-+	PINMUX_GPIO(PA0),
- 
- 	/* PB */
--	PINMUX_GPIO(GPIO_PB12, PB12_DATA),
--	PINMUX_GPIO(GPIO_PB11, PB11_DATA),
--	PINMUX_GPIO(GPIO_PB10, PB10_DATA),
--	PINMUX_GPIO(GPIO_PB9, PB9_DATA),
--	PINMUX_GPIO(GPIO_PB8, PB8_DATA),
--	PINMUX_GPIO(GPIO_PB7, PB7_DATA),
--	PINMUX_GPIO(GPIO_PB6, PB6_DATA),
--	PINMUX_GPIO(GPIO_PB5, PB5_DATA),
--	PINMUX_GPIO(GPIO_PB4, PB4_DATA),
--	PINMUX_GPIO(GPIO_PB3, PB3_DATA),
--	PINMUX_GPIO(GPIO_PB2, PB2_DATA),
--	PINMUX_GPIO(GPIO_PB1, PB1_DATA),
--	PINMUX_GPIO(GPIO_PB0, PB0_DATA),
-+	PINMUX_GPIO(PB12),
-+	PINMUX_GPIO(PB11),
-+	PINMUX_GPIO(PB10),
-+	PINMUX_GPIO(PB9),
-+	PINMUX_GPIO(PB8),
-+	PINMUX_GPIO(PB7),
-+	PINMUX_GPIO(PB6),
-+	PINMUX_GPIO(PB5),
-+	PINMUX_GPIO(PB4),
-+	PINMUX_GPIO(PB3),
-+	PINMUX_GPIO(PB2),
-+	PINMUX_GPIO(PB1),
-+	PINMUX_GPIO(PB0),
- 
- 	/* PC */
--	PINMUX_GPIO(GPIO_PC14, PC14_DATA),
--	PINMUX_GPIO(GPIO_PC13, PC13_DATA),
--	PINMUX_GPIO(GPIO_PC12, PC12_DATA),
--	PINMUX_GPIO(GPIO_PC11, PC11_DATA),
--	PINMUX_GPIO(GPIO_PC10, PC10_DATA),
--	PINMUX_GPIO(GPIO_PC9, PC9_DATA),
--	PINMUX_GPIO(GPIO_PC8, PC8_DATA),
--	PINMUX_GPIO(GPIO_PC7, PC7_DATA),
--	PINMUX_GPIO(GPIO_PC6, PC6_DATA),
--	PINMUX_GPIO(GPIO_PC5, PC5_DATA),
--	PINMUX_GPIO(GPIO_PC4, PC4_DATA),
--	PINMUX_GPIO(GPIO_PC3, PC3_DATA),
--	PINMUX_GPIO(GPIO_PC2, PC2_DATA),
--	PINMUX_GPIO(GPIO_PC1, PC1_DATA),
--	PINMUX_GPIO(GPIO_PC0, PC0_DATA),
-+	PINMUX_GPIO(PC14),
-+	PINMUX_GPIO(PC13),
-+	PINMUX_GPIO(PC12),
-+	PINMUX_GPIO(PC11),
-+	PINMUX_GPIO(PC10),
-+	PINMUX_GPIO(PC9),
-+	PINMUX_GPIO(PC8),
-+	PINMUX_GPIO(PC7),
-+	PINMUX_GPIO(PC6),
-+	PINMUX_GPIO(PC5),
-+	PINMUX_GPIO(PC4),
-+	PINMUX_GPIO(PC3),
-+	PINMUX_GPIO(PC2),
-+	PINMUX_GPIO(PC1),
-+	PINMUX_GPIO(PC0),
- 
- 	/* PD */
--	PINMUX_GPIO(GPIO_PD15, PD15_DATA),
--	PINMUX_GPIO(GPIO_PD14, PD14_DATA),
--	PINMUX_GPIO(GPIO_PD13, PD13_DATA),
--	PINMUX_GPIO(GPIO_PD12, PD12_DATA),
--	PINMUX_GPIO(GPIO_PD11, PD11_DATA),
--	PINMUX_GPIO(GPIO_PD10, PD10_DATA),
--	PINMUX_GPIO(GPIO_PD9, PD9_DATA),
--	PINMUX_GPIO(GPIO_PD8, PD8_DATA),
--	PINMUX_GPIO(GPIO_PD7, PD7_DATA),
--	PINMUX_GPIO(GPIO_PD6, PD6_DATA),
--	PINMUX_GPIO(GPIO_PD5, PD5_DATA),
--	PINMUX_GPIO(GPIO_PD4, PD4_DATA),
--	PINMUX_GPIO(GPIO_PD3, PD3_DATA),
--	PINMUX_GPIO(GPIO_PD2, PD2_DATA),
--	PINMUX_GPIO(GPIO_PD1, PD1_DATA),
--	PINMUX_GPIO(GPIO_PD0, PD0_DATA),
-+	PINMUX_GPIO(PD15),
-+	PINMUX_GPIO(PD14),
-+	PINMUX_GPIO(PD13),
-+	PINMUX_GPIO(PD12),
-+	PINMUX_GPIO(PD11),
-+	PINMUX_GPIO(PD10),
-+	PINMUX_GPIO(PD9),
-+	PINMUX_GPIO(PD8),
-+	PINMUX_GPIO(PD7),
-+	PINMUX_GPIO(PD6),
-+	PINMUX_GPIO(PD5),
-+	PINMUX_GPIO(PD4),
-+	PINMUX_GPIO(PD3),
-+	PINMUX_GPIO(PD2),
-+	PINMUX_GPIO(PD1),
-+	PINMUX_GPIO(PD0),
- 
- 	/* PE */
--	PINMUX_GPIO(GPIO_PE15, PE15_DATA),
--	PINMUX_GPIO(GPIO_PE14, PE14_DATA),
--	PINMUX_GPIO(GPIO_PE13, PE13_DATA),
--	PINMUX_GPIO(GPIO_PE12, PE12_DATA),
--	PINMUX_GPIO(GPIO_PE11, PE11_DATA),
--	PINMUX_GPIO(GPIO_PE10, PE10_DATA),
--	PINMUX_GPIO(GPIO_PE9, PE9_DATA),
--	PINMUX_GPIO(GPIO_PE8, PE8_DATA),
--	PINMUX_GPIO(GPIO_PE7, PE7_DATA),
--	PINMUX_GPIO(GPIO_PE6, PE6_DATA),
--	PINMUX_GPIO(GPIO_PE5, PE5_DATA),
--	PINMUX_GPIO(GPIO_PE4, PE4_DATA),
--	PINMUX_GPIO(GPIO_PE3, PE3_DATA),
--	PINMUX_GPIO(GPIO_PE2, PE2_DATA),
--	PINMUX_GPIO(GPIO_PE1, PE1_DATA),
--	PINMUX_GPIO(GPIO_PE0, PE0_DATA),
-+	PINMUX_GPIO(PE15),
-+	PINMUX_GPIO(PE14),
-+	PINMUX_GPIO(PE13),
-+	PINMUX_GPIO(PE12),
-+	PINMUX_GPIO(PE11),
-+	PINMUX_GPIO(PE10),
-+	PINMUX_GPIO(PE9),
-+	PINMUX_GPIO(PE8),
-+	PINMUX_GPIO(PE7),
-+	PINMUX_GPIO(PE6),
-+	PINMUX_GPIO(PE5),
-+	PINMUX_GPIO(PE4),
-+	PINMUX_GPIO(PE3),
-+	PINMUX_GPIO(PE2),
-+	PINMUX_GPIO(PE1),
-+	PINMUX_GPIO(PE0),
- 
- 	/* PF */
--	PINMUX_GPIO(GPIO_PF30, PF30_DATA),
--	PINMUX_GPIO(GPIO_PF29, PF29_DATA),
--	PINMUX_GPIO(GPIO_PF28, PF28_DATA),
--	PINMUX_GPIO(GPIO_PF27, PF27_DATA),
--	PINMUX_GPIO(GPIO_PF26, PF26_DATA),
--	PINMUX_GPIO(GPIO_PF25, PF25_DATA),
--	PINMUX_GPIO(GPIO_PF24, PF24_DATA),
--	PINMUX_GPIO(GPIO_PF23, PF23_DATA),
--	PINMUX_GPIO(GPIO_PF22, PF22_DATA),
--	PINMUX_GPIO(GPIO_PF21, PF21_DATA),
--	PINMUX_GPIO(GPIO_PF20, PF20_DATA),
--	PINMUX_GPIO(GPIO_PF19, PF19_DATA),
--	PINMUX_GPIO(GPIO_PF18, PF18_DATA),
--	PINMUX_GPIO(GPIO_PF17, PF17_DATA),
--	PINMUX_GPIO(GPIO_PF16, PF16_DATA),
--	PINMUX_GPIO(GPIO_PF15, PF15_DATA),
--	PINMUX_GPIO(GPIO_PF14, PF14_DATA),
--	PINMUX_GPIO(GPIO_PF13, PF13_DATA),
--	PINMUX_GPIO(GPIO_PF12, PF12_DATA),
--	PINMUX_GPIO(GPIO_PF11, PF11_DATA),
--	PINMUX_GPIO(GPIO_PF10, PF10_DATA),
--	PINMUX_GPIO(GPIO_PF9, PF9_DATA),
--	PINMUX_GPIO(GPIO_PF8, PF8_DATA),
--	PINMUX_GPIO(GPIO_PF7, PF7_DATA),
--	PINMUX_GPIO(GPIO_PF6, PF6_DATA),
--	PINMUX_GPIO(GPIO_PF5, PF5_DATA),
--	PINMUX_GPIO(GPIO_PF4, PF4_DATA),
--	PINMUX_GPIO(GPIO_PF3, PF3_DATA),
--	PINMUX_GPIO(GPIO_PF2, PF2_DATA),
--	PINMUX_GPIO(GPIO_PF1, PF1_DATA),
--	PINMUX_GPIO(GPIO_PF0, PF0_DATA),
-+	PINMUX_GPIO(PF30),
-+	PINMUX_GPIO(PF29),
-+	PINMUX_GPIO(PF28),
-+	PINMUX_GPIO(PF27),
-+	PINMUX_GPIO(PF26),
-+	PINMUX_GPIO(PF25),
-+	PINMUX_GPIO(PF24),
-+	PINMUX_GPIO(PF23),
-+	PINMUX_GPIO(PF22),
-+	PINMUX_GPIO(PF21),
-+	PINMUX_GPIO(PF20),
-+	PINMUX_GPIO(PF19),
-+	PINMUX_GPIO(PF18),
-+	PINMUX_GPIO(PF17),
-+	PINMUX_GPIO(PF16),
-+	PINMUX_GPIO(PF15),
-+	PINMUX_GPIO(PF14),
-+	PINMUX_GPIO(PF13),
-+	PINMUX_GPIO(PF12),
-+	PINMUX_GPIO(PF11),
-+	PINMUX_GPIO(PF10),
-+	PINMUX_GPIO(PF9),
-+	PINMUX_GPIO(PF8),
-+	PINMUX_GPIO(PF7),
-+	PINMUX_GPIO(PF6),
-+	PINMUX_GPIO(PF5),
-+	PINMUX_GPIO(PF4),
-+	PINMUX_GPIO(PF3),
-+	PINMUX_GPIO(PF2),
-+	PINMUX_GPIO(PF1),
-+	PINMUX_GPIO(PF0),
- };
- 
- #define PINMUX_FN_BASE	ARRAY_SIZE(pinmux_pins)
-diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7264.c b/drivers/pinctrl/sh-pfc/pfc-sh7264.c
-index 641c6af3..673a5950 100644
---- a/drivers/pinctrl/sh-pfc/pfc-sh7264.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-sh7264.c
-@@ -1072,149 +1072,148 @@ static const u16 pinmux_data[] = {
- };
- 
- static struct sh_pfc_pin pinmux_pins[] = {
--
- 	/* Port A */
--	PINMUX_GPIO(GPIO_PA3, PA3_DATA),
--	PINMUX_GPIO(GPIO_PA2, PA2_DATA),
--	PINMUX_GPIO(GPIO_PA1, PA1_DATA),
--	PINMUX_GPIO(GPIO_PA0, PA0_DATA),
-+	PINMUX_GPIO(PA3),
-+	PINMUX_GPIO(PA2),
-+	PINMUX_GPIO(PA1),
-+	PINMUX_GPIO(PA0),
- 
- 	/* Port B */
--	PINMUX_GPIO(GPIO_PB22, PB22_DATA),
--	PINMUX_GPIO(GPIO_PB21, PB21_DATA),
--	PINMUX_GPIO(GPIO_PB20, PB20_DATA),
--	PINMUX_GPIO(GPIO_PB19, PB19_DATA),
--	PINMUX_GPIO(GPIO_PB18, PB18_DATA),
--	PINMUX_GPIO(GPIO_PB17, PB17_DATA),
--	PINMUX_GPIO(GPIO_PB16, PB16_DATA),
--	PINMUX_GPIO(GPIO_PB15, PB15_DATA),
--	PINMUX_GPIO(GPIO_PB14, PB14_DATA),
--	PINMUX_GPIO(GPIO_PB13, PB13_DATA),
--	PINMUX_GPIO(GPIO_PB12, PB12_DATA),
--	PINMUX_GPIO(GPIO_PB11, PB11_DATA),
--	PINMUX_GPIO(GPIO_PB10, PB10_DATA),
--	PINMUX_GPIO(GPIO_PB9, PB9_DATA),
--	PINMUX_GPIO(GPIO_PB8, PB8_DATA),
--	PINMUX_GPIO(GPIO_PB7, PB7_DATA),
--	PINMUX_GPIO(GPIO_PB6, PB6_DATA),
--	PINMUX_GPIO(GPIO_PB5, PB5_DATA),
--	PINMUX_GPIO(GPIO_PB4, PB4_DATA),
--	PINMUX_GPIO(GPIO_PB3, PB3_DATA),
--	PINMUX_GPIO(GPIO_PB2, PB2_DATA),
--	PINMUX_GPIO(GPIO_PB1, PB1_DATA),
-+	PINMUX_GPIO(PB22),
-+	PINMUX_GPIO(PB21),
-+	PINMUX_GPIO(PB20),
-+	PINMUX_GPIO(PB19),
-+	PINMUX_GPIO(PB18),
-+	PINMUX_GPIO(PB17),
-+	PINMUX_GPIO(PB16),
-+	PINMUX_GPIO(PB15),
-+	PINMUX_GPIO(PB14),
-+	PINMUX_GPIO(PB13),
-+	PINMUX_GPIO(PB12),
-+	PINMUX_GPIO(PB11),
-+	PINMUX_GPIO(PB10),
-+	PINMUX_GPIO(PB9),
-+	PINMUX_GPIO(PB8),
-+	PINMUX_GPIO(PB7),
-+	PINMUX_GPIO(PB6),
-+	PINMUX_GPIO(PB5),
-+	PINMUX_GPIO(PB4),
-+	PINMUX_GPIO(PB3),
-+	PINMUX_GPIO(PB2),
-+	PINMUX_GPIO(PB1),
- 
- 	/* Port C */
--	PINMUX_GPIO(GPIO_PC10, PC10_DATA),
--	PINMUX_GPIO(GPIO_PC9, PC9_DATA),
--	PINMUX_GPIO(GPIO_PC8, PC8_DATA),
--	PINMUX_GPIO(GPIO_PC7, PC7_DATA),
--	PINMUX_GPIO(GPIO_PC6, PC6_DATA),
--	PINMUX_GPIO(GPIO_PC5, PC5_DATA),
--	PINMUX_GPIO(GPIO_PC4, PC4_DATA),
--	PINMUX_GPIO(GPIO_PC3, PC3_DATA),
--	PINMUX_GPIO(GPIO_PC2, PC2_DATA),
--	PINMUX_GPIO(GPIO_PC1, PC1_DATA),
--	PINMUX_GPIO(GPIO_PC0, PC0_DATA),
-+	PINMUX_GPIO(PC10),
-+	PINMUX_GPIO(PC9),
-+	PINMUX_GPIO(PC8),
-+	PINMUX_GPIO(PC7),
-+	PINMUX_GPIO(PC6),
-+	PINMUX_GPIO(PC5),
-+	PINMUX_GPIO(PC4),
-+	PINMUX_GPIO(PC3),
-+	PINMUX_GPIO(PC2),
-+	PINMUX_GPIO(PC1),
-+	PINMUX_GPIO(PC0),
- 
- 	/* Port D */
--	PINMUX_GPIO(GPIO_PD15, PD15_DATA),
--	PINMUX_GPIO(GPIO_PD14, PD14_DATA),
--	PINMUX_GPIO(GPIO_PD13, PD13_DATA),
--	PINMUX_GPIO(GPIO_PD12, PD12_DATA),
--	PINMUX_GPIO(GPIO_PD11, PD11_DATA),
--	PINMUX_GPIO(GPIO_PD10, PD10_DATA),
--	PINMUX_GPIO(GPIO_PD9, PD9_DATA),
--	PINMUX_GPIO(GPIO_PD8, PD8_DATA),
--	PINMUX_GPIO(GPIO_PD7, PD7_DATA),
--	PINMUX_GPIO(GPIO_PD6, PD6_DATA),
--	PINMUX_GPIO(GPIO_PD5, PD5_DATA),
--	PINMUX_GPIO(GPIO_PD4, PD4_DATA),
--	PINMUX_GPIO(GPIO_PD3, PD3_DATA),
--	PINMUX_GPIO(GPIO_PD2, PD2_DATA),
--	PINMUX_GPIO(GPIO_PD1, PD1_DATA),
--	PINMUX_GPIO(GPIO_PD0, PD0_DATA),
-+	PINMUX_GPIO(PD15),
-+	PINMUX_GPIO(PD14),
-+	PINMUX_GPIO(PD13),
-+	PINMUX_GPIO(PD12),
-+	PINMUX_GPIO(PD11),
-+	PINMUX_GPIO(PD10),
-+	PINMUX_GPIO(PD9),
-+	PINMUX_GPIO(PD8),
-+	PINMUX_GPIO(PD7),
-+	PINMUX_GPIO(PD6),
-+	PINMUX_GPIO(PD5),
-+	PINMUX_GPIO(PD4),
-+	PINMUX_GPIO(PD3),
-+	PINMUX_GPIO(PD2),
-+	PINMUX_GPIO(PD1),
-+	PINMUX_GPIO(PD0),
- 
- 	/* Port E */
--	PINMUX_GPIO(GPIO_PE5, PE5_DATA),
--	PINMUX_GPIO(GPIO_PE4, PE4_DATA),
--	PINMUX_GPIO(GPIO_PE3, PE3_DATA),
--	PINMUX_GPIO(GPIO_PE2, PE2_DATA),
--	PINMUX_GPIO(GPIO_PE1, PE1_DATA),
--	PINMUX_GPIO(GPIO_PE0, PE0_DATA),
-+	PINMUX_GPIO(PE5),
-+	PINMUX_GPIO(PE4),
-+	PINMUX_GPIO(PE3),
-+	PINMUX_GPIO(PE2),
-+	PINMUX_GPIO(PE1),
-+	PINMUX_GPIO(PE0),
- 
- 	/* Port F */
--	PINMUX_GPIO(GPIO_PF12, PF12_DATA),
--	PINMUX_GPIO(GPIO_PF11, PF11_DATA),
--	PINMUX_GPIO(GPIO_PF10, PF10_DATA),
--	PINMUX_GPIO(GPIO_PF9, PF9_DATA),
--	PINMUX_GPIO(GPIO_PF8, PF8_DATA),
--	PINMUX_GPIO(GPIO_PF7, PF7_DATA),
--	PINMUX_GPIO(GPIO_PF6, PF6_DATA),
--	PINMUX_GPIO(GPIO_PF5, PF5_DATA),
--	PINMUX_GPIO(GPIO_PF4, PF4_DATA),
--	PINMUX_GPIO(GPIO_PF3, PF3_DATA),
--	PINMUX_GPIO(GPIO_PF2, PF2_DATA),
--	PINMUX_GPIO(GPIO_PF1, PF1_DATA),
--	PINMUX_GPIO(GPIO_PF0, PF0_DATA),
-+	PINMUX_GPIO(PF12),
-+	PINMUX_GPIO(PF11),
-+	PINMUX_GPIO(PF10),
-+	PINMUX_GPIO(PF9),
-+	PINMUX_GPIO(PF8),
-+	PINMUX_GPIO(PF7),
-+	PINMUX_GPIO(PF6),
-+	PINMUX_GPIO(PF5),
-+	PINMUX_GPIO(PF4),
-+	PINMUX_GPIO(PF3),
-+	PINMUX_GPIO(PF2),
-+	PINMUX_GPIO(PF1),
-+	PINMUX_GPIO(PF0),
- 
- 	/* Port G */
--	PINMUX_GPIO(GPIO_PG24, PG24_DATA),
--	PINMUX_GPIO(GPIO_PG23, PG23_DATA),
--	PINMUX_GPIO(GPIO_PG22, PG22_DATA),
--	PINMUX_GPIO(GPIO_PG21, PG21_DATA),
--	PINMUX_GPIO(GPIO_PG20, PG20_DATA),
--	PINMUX_GPIO(GPIO_PG19, PG19_DATA),
--	PINMUX_GPIO(GPIO_PG18, PG18_DATA),
--	PINMUX_GPIO(GPIO_PG17, PG17_DATA),
--	PINMUX_GPIO(GPIO_PG16, PG16_DATA),
--	PINMUX_GPIO(GPIO_PG15, PG15_DATA),
--	PINMUX_GPIO(GPIO_PG14, PG14_DATA),
--	PINMUX_GPIO(GPIO_PG13, PG13_DATA),
--	PINMUX_GPIO(GPIO_PG12, PG12_DATA),
--	PINMUX_GPIO(GPIO_PG11, PG11_DATA),
--	PINMUX_GPIO(GPIO_PG10, PG10_DATA),
--	PINMUX_GPIO(GPIO_PG9, PG9_DATA),
--	PINMUX_GPIO(GPIO_PG8, PG8_DATA),
--	PINMUX_GPIO(GPIO_PG7, PG7_DATA),
--	PINMUX_GPIO(GPIO_PG6, PG6_DATA),
--	PINMUX_GPIO(GPIO_PG5, PG5_DATA),
--	PINMUX_GPIO(GPIO_PG4, PG4_DATA),
--	PINMUX_GPIO(GPIO_PG3, PG3_DATA),
--	PINMUX_GPIO(GPIO_PG2, PG2_DATA),
--	PINMUX_GPIO(GPIO_PG1, PG1_DATA),
--	PINMUX_GPIO(GPIO_PG0, PG0_DATA),
-+	PINMUX_GPIO(PG24),
-+	PINMUX_GPIO(PG23),
-+	PINMUX_GPIO(PG22),
-+	PINMUX_GPIO(PG21),
-+	PINMUX_GPIO(PG20),
-+	PINMUX_GPIO(PG19),
-+	PINMUX_GPIO(PG18),
-+	PINMUX_GPIO(PG17),
-+	PINMUX_GPIO(PG16),
-+	PINMUX_GPIO(PG15),
-+	PINMUX_GPIO(PG14),
-+	PINMUX_GPIO(PG13),
-+	PINMUX_GPIO(PG12),
-+	PINMUX_GPIO(PG11),
-+	PINMUX_GPIO(PG10),
-+	PINMUX_GPIO(PG9),
-+	PINMUX_GPIO(PG8),
-+	PINMUX_GPIO(PG7),
-+	PINMUX_GPIO(PG6),
-+	PINMUX_GPIO(PG5),
-+	PINMUX_GPIO(PG4),
-+	PINMUX_GPIO(PG3),
-+	PINMUX_GPIO(PG2),
-+	PINMUX_GPIO(PG1),
-+	PINMUX_GPIO(PG0),
- 
- 	/* Port H - Port H does not have a Data Register */
- 
- 	/* Port I - not on device */
- 
- 	/* Port J */
--	PINMUX_GPIO(GPIO_PJ11, PJ11_DATA),
--	PINMUX_GPIO(GPIO_PJ10, PJ10_DATA),
--	PINMUX_GPIO(GPIO_PJ9, PJ9_DATA),
--	PINMUX_GPIO(GPIO_PJ8, PJ8_DATA),
--	PINMUX_GPIO(GPIO_PJ7, PJ7_DATA),
--	PINMUX_GPIO(GPIO_PJ6, PJ6_DATA),
--	PINMUX_GPIO(GPIO_PJ5, PJ5_DATA),
--	PINMUX_GPIO(GPIO_PJ4, PJ4_DATA),
--	PINMUX_GPIO(GPIO_PJ3, PJ3_DATA),
--	PINMUX_GPIO(GPIO_PJ2, PJ2_DATA),
--	PINMUX_GPIO(GPIO_PJ1, PJ1_DATA),
--	PINMUX_GPIO(GPIO_PJ0, PJ0_DATA),
-+	PINMUX_GPIO(PJ11),
-+	PINMUX_GPIO(PJ10),
-+	PINMUX_GPIO(PJ9),
-+	PINMUX_GPIO(PJ8),
-+	PINMUX_GPIO(PJ7),
-+	PINMUX_GPIO(PJ6),
-+	PINMUX_GPIO(PJ5),
-+	PINMUX_GPIO(PJ4),
-+	PINMUX_GPIO(PJ3),
-+	PINMUX_GPIO(PJ2),
-+	PINMUX_GPIO(PJ1),
-+	PINMUX_GPIO(PJ0),
- 
- 	/* Port K */
--	PINMUX_GPIO(GPIO_PK11, PK11_DATA),
--	PINMUX_GPIO(GPIO_PK10, PK10_DATA),
--	PINMUX_GPIO(GPIO_PK9, PK9_DATA),
--	PINMUX_GPIO(GPIO_PK8, PK8_DATA),
--	PINMUX_GPIO(GPIO_PK7, PK7_DATA),
--	PINMUX_GPIO(GPIO_PK6, PK6_DATA),
--	PINMUX_GPIO(GPIO_PK5, PK5_DATA),
--	PINMUX_GPIO(GPIO_PK4, PK4_DATA),
--	PINMUX_GPIO(GPIO_PK3, PK3_DATA),
--	PINMUX_GPIO(GPIO_PK2, PK2_DATA),
--	PINMUX_GPIO(GPIO_PK1, PK1_DATA),
--	PINMUX_GPIO(GPIO_PK0, PK0_DATA),
-+	PINMUX_GPIO(PK11),
-+	PINMUX_GPIO(PK10),
-+	PINMUX_GPIO(PK9),
-+	PINMUX_GPIO(PK8),
-+	PINMUX_GPIO(PK7),
-+	PINMUX_GPIO(PK6),
-+	PINMUX_GPIO(PK5),
-+	PINMUX_GPIO(PK4),
-+	PINMUX_GPIO(PK3),
-+	PINMUX_GPIO(PK2),
-+	PINMUX_GPIO(PK1),
-+	PINMUX_GPIO(PK0),
- };
- 
- #define PINMUX_FN_BASE	ARRAY_SIZE(pinmux_pins)
-diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7269.c b/drivers/pinctrl/sh-pfc/pfc-sh7269.c
-index 415812ff..a19b60f7 100644
---- a/drivers/pinctrl/sh-pfc/pfc-sh7269.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-sh7269.c
-@@ -1453,165 +1453,165 @@ static const u16 pinmux_data[] = {
- 
- static struct sh_pfc_pin pinmux_pins[] = {
- 	/* Port A */
--	PINMUX_GPIO(GPIO_PA1, PA1_DATA),
--	PINMUX_GPIO(GPIO_PA0, PA0_DATA),
-+	PINMUX_GPIO(PA1),
-+	PINMUX_GPIO(PA0),
- 
- 	/* Port B */
--	PINMUX_GPIO(GPIO_PB22, PB22_DATA),
--	PINMUX_GPIO(GPIO_PB21, PB21_DATA),
--	PINMUX_GPIO(GPIO_PB20, PB20_DATA),
--	PINMUX_GPIO(GPIO_PB19, PB19_DATA),
--	PINMUX_GPIO(GPIO_PB18, PB18_DATA),
--	PINMUX_GPIO(GPIO_PB17, PB17_DATA),
--	PINMUX_GPIO(GPIO_PB16, PB16_DATA),
--	PINMUX_GPIO(GPIO_PB15, PB15_DATA),
--	PINMUX_GPIO(GPIO_PB14, PB14_DATA),
--	PINMUX_GPIO(GPIO_PB13, PB13_DATA),
--	PINMUX_GPIO(GPIO_PB12, PB12_DATA),
--	PINMUX_GPIO(GPIO_PB11, PB11_DATA),
--	PINMUX_GPIO(GPIO_PB10, PB10_DATA),
--	PINMUX_GPIO(GPIO_PB9, PB9_DATA),
--	PINMUX_GPIO(GPIO_PB8, PB8_DATA),
--	PINMUX_GPIO(GPIO_PB7, PB7_DATA),
--	PINMUX_GPIO(GPIO_PB6, PB6_DATA),
--	PINMUX_GPIO(GPIO_PB5, PB5_DATA),
--	PINMUX_GPIO(GPIO_PB4, PB4_DATA),
--	PINMUX_GPIO(GPIO_PB3, PB3_DATA),
--	PINMUX_GPIO(GPIO_PB2, PB2_DATA),
--	PINMUX_GPIO(GPIO_PB1, PB1_DATA),
-+	PINMUX_GPIO(PB22),
-+	PINMUX_GPIO(PB21),
-+	PINMUX_GPIO(PB20),
-+	PINMUX_GPIO(PB19),
-+	PINMUX_GPIO(PB18),
-+	PINMUX_GPIO(PB17),
-+	PINMUX_GPIO(PB16),
-+	PINMUX_GPIO(PB15),
-+	PINMUX_GPIO(PB14),
-+	PINMUX_GPIO(PB13),
-+	PINMUX_GPIO(PB12),
-+	PINMUX_GPIO(PB11),
-+	PINMUX_GPIO(PB10),
-+	PINMUX_GPIO(PB9),
-+	PINMUX_GPIO(PB8),
-+	PINMUX_GPIO(PB7),
-+	PINMUX_GPIO(PB6),
-+	PINMUX_GPIO(PB5),
-+	PINMUX_GPIO(PB4),
-+	PINMUX_GPIO(PB3),
-+	PINMUX_GPIO(PB2),
-+	PINMUX_GPIO(PB1),
- 
- 	/* Port C */
--	PINMUX_GPIO(GPIO_PC8, PC8_DATA),
--	PINMUX_GPIO(GPIO_PC7, PC7_DATA),
--	PINMUX_GPIO(GPIO_PC6, PC6_DATA),
--	PINMUX_GPIO(GPIO_PC5, PC5_DATA),
--	PINMUX_GPIO(GPIO_PC4, PC4_DATA),
--	PINMUX_GPIO(GPIO_PC3, PC3_DATA),
--	PINMUX_GPIO(GPIO_PC2, PC2_DATA),
--	PINMUX_GPIO(GPIO_PC1, PC1_DATA),
--	PINMUX_GPIO(GPIO_PC0, PC0_DATA),
-+	PINMUX_GPIO(PC8),
-+	PINMUX_GPIO(PC7),
-+	PINMUX_GPIO(PC6),
-+	PINMUX_GPIO(PC5),
-+	PINMUX_GPIO(PC4),
-+	PINMUX_GPIO(PC3),
-+	PINMUX_GPIO(PC2),
-+	PINMUX_GPIO(PC1),
-+	PINMUX_GPIO(PC0),
- 
- 	/* Port D */
--	PINMUX_GPIO(GPIO_PD15, PD15_DATA),
--	PINMUX_GPIO(GPIO_PD14, PD14_DATA),
--	PINMUX_GPIO(GPIO_PD13, PD13_DATA),
--	PINMUX_GPIO(GPIO_PD12, PD12_DATA),
--	PINMUX_GPIO(GPIO_PD11, PD11_DATA),
--	PINMUX_GPIO(GPIO_PD10, PD10_DATA),
--	PINMUX_GPIO(GPIO_PD9, PD9_DATA),
--	PINMUX_GPIO(GPIO_PD8, PD8_DATA),
--	PINMUX_GPIO(GPIO_PD7, PD7_DATA),
--	PINMUX_GPIO(GPIO_PD6, PD6_DATA),
--	PINMUX_GPIO(GPIO_PD5, PD5_DATA),
--	PINMUX_GPIO(GPIO_PD4, PD4_DATA),
--	PINMUX_GPIO(GPIO_PD3, PD3_DATA),
--	PINMUX_GPIO(GPIO_PD2, PD2_DATA),
--	PINMUX_GPIO(GPIO_PD1, PD1_DATA),
--	PINMUX_GPIO(GPIO_PD0, PD0_DATA),
-+	PINMUX_GPIO(PD15),
-+	PINMUX_GPIO(PD14),
-+	PINMUX_GPIO(PD13),
-+	PINMUX_GPIO(PD12),
-+	PINMUX_GPIO(PD11),
-+	PINMUX_GPIO(PD10),
-+	PINMUX_GPIO(PD9),
-+	PINMUX_GPIO(PD8),
-+	PINMUX_GPIO(PD7),
-+	PINMUX_GPIO(PD6),
-+	PINMUX_GPIO(PD5),
-+	PINMUX_GPIO(PD4),
-+	PINMUX_GPIO(PD3),
-+	PINMUX_GPIO(PD2),
-+	PINMUX_GPIO(PD1),
-+	PINMUX_GPIO(PD0),
- 
- 	/* Port E */
--	PINMUX_GPIO(GPIO_PE7, PE7_DATA),
--	PINMUX_GPIO(GPIO_PE6, PE6_DATA),
--	PINMUX_GPIO(GPIO_PE5, PE5_DATA),
--	PINMUX_GPIO(GPIO_PE4, PE4_DATA),
--	PINMUX_GPIO(GPIO_PE3, PE3_DATA),
--	PINMUX_GPIO(GPIO_PE2, PE2_DATA),
--	PINMUX_GPIO(GPIO_PE1, PE1_DATA),
--	PINMUX_GPIO(GPIO_PE0, PE0_DATA),
-+	PINMUX_GPIO(PE7),
-+	PINMUX_GPIO(PE6),
-+	PINMUX_GPIO(PE5),
-+	PINMUX_GPIO(PE4),
-+	PINMUX_GPIO(PE3),
-+	PINMUX_GPIO(PE2),
-+	PINMUX_GPIO(PE1),
-+	PINMUX_GPIO(PE0),
- 
- 	/* Port F */
--	PINMUX_GPIO(GPIO_PF23, PF23_DATA),
--	PINMUX_GPIO(GPIO_PF22, PF22_DATA),
--	PINMUX_GPIO(GPIO_PF21, PF21_DATA),
--	PINMUX_GPIO(GPIO_PF20, PF20_DATA),
--	PINMUX_GPIO(GPIO_PF19, PF19_DATA),
--	PINMUX_GPIO(GPIO_PF18, PF18_DATA),
--	PINMUX_GPIO(GPIO_PF17, PF17_DATA),
--	PINMUX_GPIO(GPIO_PF16, PF16_DATA),
--	PINMUX_GPIO(GPIO_PF15, PF15_DATA),
--	PINMUX_GPIO(GPIO_PF14, PF14_DATA),
--	PINMUX_GPIO(GPIO_PF13, PF13_DATA),
--	PINMUX_GPIO(GPIO_PF12, PF12_DATA),
--	PINMUX_GPIO(GPIO_PF11, PF11_DATA),
--	PINMUX_GPIO(GPIO_PF10, PF10_DATA),
--	PINMUX_GPIO(GPIO_PF9, PF9_DATA),
--	PINMUX_GPIO(GPIO_PF8, PF8_DATA),
--	PINMUX_GPIO(GPIO_PF7, PF7_DATA),
--	PINMUX_GPIO(GPIO_PF6, PF6_DATA),
--	PINMUX_GPIO(GPIO_PF5, PF5_DATA),
--	PINMUX_GPIO(GPIO_PF4, PF4_DATA),
--	PINMUX_GPIO(GPIO_PF3, PF3_DATA),
--	PINMUX_GPIO(GPIO_PF2, PF2_DATA),
--	PINMUX_GPIO(GPIO_PF1, PF1_DATA),
--	PINMUX_GPIO(GPIO_PF0, PF0_DATA),
-+	PINMUX_GPIO(PF23),
-+	PINMUX_GPIO(PF22),
-+	PINMUX_GPIO(PF21),
-+	PINMUX_GPIO(PF20),
-+	PINMUX_GPIO(PF19),
-+	PINMUX_GPIO(PF18),
-+	PINMUX_GPIO(PF17),
-+	PINMUX_GPIO(PF16),
-+	PINMUX_GPIO(PF15),
-+	PINMUX_GPIO(PF14),
-+	PINMUX_GPIO(PF13),
-+	PINMUX_GPIO(PF12),
-+	PINMUX_GPIO(PF11),
-+	PINMUX_GPIO(PF10),
-+	PINMUX_GPIO(PF9),
-+	PINMUX_GPIO(PF8),
-+	PINMUX_GPIO(PF7),
-+	PINMUX_GPIO(PF6),
-+	PINMUX_GPIO(PF5),
-+	PINMUX_GPIO(PF4),
-+	PINMUX_GPIO(PF3),
-+	PINMUX_GPIO(PF2),
-+	PINMUX_GPIO(PF1),
-+	PINMUX_GPIO(PF0),
- 
- 	/* Port G */
--	PINMUX_GPIO(GPIO_PG27, PG27_DATA),
--	PINMUX_GPIO(GPIO_PG26, PG26_DATA),
--	PINMUX_GPIO(GPIO_PG25, PG25_DATA),
--	PINMUX_GPIO(GPIO_PG24, PG24_DATA),
--	PINMUX_GPIO(GPIO_PG23, PG23_DATA),
--	PINMUX_GPIO(GPIO_PG22, PG22_DATA),
--	PINMUX_GPIO(GPIO_PG21, PG21_DATA),
--	PINMUX_GPIO(GPIO_PG20, PG20_DATA),
--	PINMUX_GPIO(GPIO_PG19, PG19_DATA),
--	PINMUX_GPIO(GPIO_PG18, PG18_DATA),
--	PINMUX_GPIO(GPIO_PG17, PG17_DATA),
--	PINMUX_GPIO(GPIO_PG16, PG16_DATA),
--	PINMUX_GPIO(GPIO_PG15, PG15_DATA),
--	PINMUX_GPIO(GPIO_PG14, PG14_DATA),
--	PINMUX_GPIO(GPIO_PG13, PG13_DATA),
--	PINMUX_GPIO(GPIO_PG12, PG12_DATA),
--	PINMUX_GPIO(GPIO_PG11, PG11_DATA),
--	PINMUX_GPIO(GPIO_PG10, PG10_DATA),
--	PINMUX_GPIO(GPIO_PG9, PG9_DATA),
--	PINMUX_GPIO(GPIO_PG8, PG8_DATA),
--	PINMUX_GPIO(GPIO_PG7, PG7_DATA),
--	PINMUX_GPIO(GPIO_PG6, PG6_DATA),
--	PINMUX_GPIO(GPIO_PG5, PG5_DATA),
--	PINMUX_GPIO(GPIO_PG4, PG4_DATA),
--	PINMUX_GPIO(GPIO_PG3, PG3_DATA),
--	PINMUX_GPIO(GPIO_PG2, PG2_DATA),
--	PINMUX_GPIO(GPIO_PG1, PG1_DATA),
--	PINMUX_GPIO(GPIO_PG0, PG0_DATA),
-+	PINMUX_GPIO(PG27),
-+	PINMUX_GPIO(PG26),
-+	PINMUX_GPIO(PG25),
-+	PINMUX_GPIO(PG24),
-+	PINMUX_GPIO(PG23),
-+	PINMUX_GPIO(PG22),
-+	PINMUX_GPIO(PG21),
-+	PINMUX_GPIO(PG20),
-+	PINMUX_GPIO(PG19),
-+	PINMUX_GPIO(PG18),
-+	PINMUX_GPIO(PG17),
-+	PINMUX_GPIO(PG16),
-+	PINMUX_GPIO(PG15),
-+	PINMUX_GPIO(PG14),
-+	PINMUX_GPIO(PG13),
-+	PINMUX_GPIO(PG12),
-+	PINMUX_GPIO(PG11),
-+	PINMUX_GPIO(PG10),
-+	PINMUX_GPIO(PG9),
-+	PINMUX_GPIO(PG8),
-+	PINMUX_GPIO(PG7),
-+	PINMUX_GPIO(PG6),
-+	PINMUX_GPIO(PG5),
-+	PINMUX_GPIO(PG4),
-+	PINMUX_GPIO(PG3),
-+	PINMUX_GPIO(PG2),
-+	PINMUX_GPIO(PG1),
-+	PINMUX_GPIO(PG0),
- 
- 	/* Port H - Port H does not have a Data Register */
- 
- 	/* Port I - not on device */
- 
- 	/* Port J */
--	PINMUX_GPIO(GPIO_PJ31, PJ31_DATA),
--	PINMUX_GPIO(GPIO_PJ30, PJ30_DATA),
--	PINMUX_GPIO(GPIO_PJ29, PJ29_DATA),
--	PINMUX_GPIO(GPIO_PJ28, PJ28_DATA),
--	PINMUX_GPIO(GPIO_PJ27, PJ27_DATA),
--	PINMUX_GPIO(GPIO_PJ26, PJ26_DATA),
--	PINMUX_GPIO(GPIO_PJ25, PJ25_DATA),
--	PINMUX_GPIO(GPIO_PJ24, PJ24_DATA),
--	PINMUX_GPIO(GPIO_PJ23, PJ23_DATA),
--	PINMUX_GPIO(GPIO_PJ22, PJ22_DATA),
--	PINMUX_GPIO(GPIO_PJ21, PJ21_DATA),
--	PINMUX_GPIO(GPIO_PJ20, PJ20_DATA),
--	PINMUX_GPIO(GPIO_PJ19, PJ19_DATA),
--	PINMUX_GPIO(GPIO_PJ18, PJ18_DATA),
--	PINMUX_GPIO(GPIO_PJ17, PJ17_DATA),
--	PINMUX_GPIO(GPIO_PJ16, PJ16_DATA),
--	PINMUX_GPIO(GPIO_PJ15, PJ15_DATA),
--	PINMUX_GPIO(GPIO_PJ14, PJ14_DATA),
--	PINMUX_GPIO(GPIO_PJ13, PJ13_DATA),
--	PINMUX_GPIO(GPIO_PJ12, PJ12_DATA),
--	PINMUX_GPIO(GPIO_PJ11, PJ11_DATA),
--	PINMUX_GPIO(GPIO_PJ10, PJ10_DATA),
--	PINMUX_GPIO(GPIO_PJ9, PJ9_DATA),
--	PINMUX_GPIO(GPIO_PJ8, PJ8_DATA),
--	PINMUX_GPIO(GPIO_PJ7, PJ7_DATA),
--	PINMUX_GPIO(GPIO_PJ6, PJ6_DATA),
--	PINMUX_GPIO(GPIO_PJ5, PJ5_DATA),
--	PINMUX_GPIO(GPIO_PJ4, PJ4_DATA),
--	PINMUX_GPIO(GPIO_PJ3, PJ3_DATA),
--	PINMUX_GPIO(GPIO_PJ2, PJ2_DATA),
--	PINMUX_GPIO(GPIO_PJ1, PJ1_DATA),
--	PINMUX_GPIO(GPIO_PJ0, PJ0_DATA),
-+	PINMUX_GPIO(PJ31),
-+	PINMUX_GPIO(PJ30),
-+	PINMUX_GPIO(PJ29),
-+	PINMUX_GPIO(PJ28),
-+	PINMUX_GPIO(PJ27),
-+	PINMUX_GPIO(PJ26),
-+	PINMUX_GPIO(PJ25),
-+	PINMUX_GPIO(PJ24),
-+	PINMUX_GPIO(PJ23),
-+	PINMUX_GPIO(PJ22),
-+	PINMUX_GPIO(PJ21),
-+	PINMUX_GPIO(PJ20),
-+	PINMUX_GPIO(PJ19),
-+	PINMUX_GPIO(PJ18),
-+	PINMUX_GPIO(PJ17),
-+	PINMUX_GPIO(PJ16),
-+	PINMUX_GPIO(PJ15),
-+	PINMUX_GPIO(PJ14),
-+	PINMUX_GPIO(PJ13),
-+	PINMUX_GPIO(PJ12),
-+	PINMUX_GPIO(PJ11),
-+	PINMUX_GPIO(PJ10),
-+	PINMUX_GPIO(PJ9),
-+	PINMUX_GPIO(PJ8),
-+	PINMUX_GPIO(PJ7),
-+	PINMUX_GPIO(PJ6),
-+	PINMUX_GPIO(PJ5),
-+	PINMUX_GPIO(PJ4),
-+	PINMUX_GPIO(PJ3),
-+	PINMUX_GPIO(PJ2),
-+	PINMUX_GPIO(PJ1),
-+	PINMUX_GPIO(PJ0),
- };
- 
- #define PINMUX_FN_BASE	ARRAY_SIZE(pinmux_pins)
-diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7720.c b/drivers/pinctrl/sh-pfc/pfc-sh7720.c
-index 1009fc9c..7a26809e 100644
---- a/drivers/pinctrl/sh-pfc/pfc-sh7720.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-sh7720.c
-@@ -578,157 +578,157 @@ static const u16 pinmux_data[] = {
- 
- static struct sh_pfc_pin pinmux_pins[] = {
- 	/* PTA */
--	PINMUX_GPIO(GPIO_PTA7, PTA7_DATA),
--	PINMUX_GPIO(GPIO_PTA6, PTA6_DATA),
--	PINMUX_GPIO(GPIO_PTA5, PTA5_DATA),
--	PINMUX_GPIO(GPIO_PTA4, PTA4_DATA),
--	PINMUX_GPIO(GPIO_PTA3, PTA3_DATA),
--	PINMUX_GPIO(GPIO_PTA2, PTA2_DATA),
--	PINMUX_GPIO(GPIO_PTA1, PTA1_DATA),
--	PINMUX_GPIO(GPIO_PTA0, PTA0_DATA),
-+	PINMUX_GPIO(PTA7),
-+	PINMUX_GPIO(PTA6),
-+	PINMUX_GPIO(PTA5),
-+	PINMUX_GPIO(PTA4),
-+	PINMUX_GPIO(PTA3),
-+	PINMUX_GPIO(PTA2),
-+	PINMUX_GPIO(PTA1),
-+	PINMUX_GPIO(PTA0),
- 
- 	/* PTB */
--	PINMUX_GPIO(GPIO_PTB7, PTB7_DATA),
--	PINMUX_GPIO(GPIO_PTB6, PTB6_DATA),
--	PINMUX_GPIO(GPIO_PTB5, PTB5_DATA),
--	PINMUX_GPIO(GPIO_PTB4, PTB4_DATA),
--	PINMUX_GPIO(GPIO_PTB3, PTB3_DATA),
--	PINMUX_GPIO(GPIO_PTB2, PTB2_DATA),
--	PINMUX_GPIO(GPIO_PTB1, PTB1_DATA),
--	PINMUX_GPIO(GPIO_PTB0, PTB0_DATA),
-+	PINMUX_GPIO(PTB7),
-+	PINMUX_GPIO(PTB6),
-+	PINMUX_GPIO(PTB5),
-+	PINMUX_GPIO(PTB4),
-+	PINMUX_GPIO(PTB3),
-+	PINMUX_GPIO(PTB2),
-+	PINMUX_GPIO(PTB1),
-+	PINMUX_GPIO(PTB0),
- 
- 	/* PTC */
--	PINMUX_GPIO(GPIO_PTC7, PTC7_DATA),
--	PINMUX_GPIO(GPIO_PTC6, PTC6_DATA),
--	PINMUX_GPIO(GPIO_PTC5, PTC5_DATA),
--	PINMUX_GPIO(GPIO_PTC4, PTC4_DATA),
--	PINMUX_GPIO(GPIO_PTC3, PTC3_DATA),
--	PINMUX_GPIO(GPIO_PTC2, PTC2_DATA),
--	PINMUX_GPIO(GPIO_PTC1, PTC1_DATA),
--	PINMUX_GPIO(GPIO_PTC0, PTC0_DATA),
-+	PINMUX_GPIO(PTC7),
-+	PINMUX_GPIO(PTC6),
-+	PINMUX_GPIO(PTC5),
-+	PINMUX_GPIO(PTC4),
-+	PINMUX_GPIO(PTC3),
-+	PINMUX_GPIO(PTC2),
-+	PINMUX_GPIO(PTC1),
-+	PINMUX_GPIO(PTC0),
- 
- 	/* PTD */
--	PINMUX_GPIO(GPIO_PTD7, PTD7_DATA),
--	PINMUX_GPIO(GPIO_PTD6, PTD6_DATA),
--	PINMUX_GPIO(GPIO_PTD5, PTD5_DATA),
--	PINMUX_GPIO(GPIO_PTD4, PTD4_DATA),
--	PINMUX_GPIO(GPIO_PTD3, PTD3_DATA),
--	PINMUX_GPIO(GPIO_PTD2, PTD2_DATA),
--	PINMUX_GPIO(GPIO_PTD1, PTD1_DATA),
--	PINMUX_GPIO(GPIO_PTD0, PTD0_DATA),
-+	PINMUX_GPIO(PTD7),
-+	PINMUX_GPIO(PTD6),
-+	PINMUX_GPIO(PTD5),
-+	PINMUX_GPIO(PTD4),
-+	PINMUX_GPIO(PTD3),
-+	PINMUX_GPIO(PTD2),
-+	PINMUX_GPIO(PTD1),
-+	PINMUX_GPIO(PTD0),
- 
- 	/* PTE */
--	PINMUX_GPIO(GPIO_PTE6, PTE6_DATA),
--	PINMUX_GPIO(GPIO_PTE5, PTE5_DATA),
--	PINMUX_GPIO(GPIO_PTE4, PTE4_DATA),
--	PINMUX_GPIO(GPIO_PTE3, PTE3_DATA),
--	PINMUX_GPIO(GPIO_PTE2, PTE2_DATA),
--	PINMUX_GPIO(GPIO_PTE1, PTE1_DATA),
--	PINMUX_GPIO(GPIO_PTE0, PTE0_DATA),
-+	PINMUX_GPIO(PTE6),
-+	PINMUX_GPIO(PTE5),
-+	PINMUX_GPIO(PTE4),
-+	PINMUX_GPIO(PTE3),
-+	PINMUX_GPIO(PTE2),
-+	PINMUX_GPIO(PTE1),
-+	PINMUX_GPIO(PTE0),
- 
- 	/* PTF */
--	PINMUX_GPIO(GPIO_PTF6, PTF6_DATA),
--	PINMUX_GPIO(GPIO_PTF5, PTF5_DATA),
--	PINMUX_GPIO(GPIO_PTF4, PTF4_DATA),
--	PINMUX_GPIO(GPIO_PTF3, PTF3_DATA),
--	PINMUX_GPIO(GPIO_PTF2, PTF2_DATA),
--	PINMUX_GPIO(GPIO_PTF1, PTF1_DATA),
--	PINMUX_GPIO(GPIO_PTF0, PTF0_DATA),
-+	PINMUX_GPIO(PTF6),
-+	PINMUX_GPIO(PTF5),
-+	PINMUX_GPIO(PTF4),
-+	PINMUX_GPIO(PTF3),
-+	PINMUX_GPIO(PTF2),
-+	PINMUX_GPIO(PTF1),
-+	PINMUX_GPIO(PTF0),
- 
- 	/* PTG */
--	PINMUX_GPIO(GPIO_PTG6, PTG6_DATA),
--	PINMUX_GPIO(GPIO_PTG5, PTG5_DATA),
--	PINMUX_GPIO(GPIO_PTG4, PTG4_DATA),
--	PINMUX_GPIO(GPIO_PTG3, PTG3_DATA),
--	PINMUX_GPIO(GPIO_PTG2, PTG2_DATA),
--	PINMUX_GPIO(GPIO_PTG1, PTG1_DATA),
--	PINMUX_GPIO(GPIO_PTG0, PTG0_DATA),
-+	PINMUX_GPIO(PTG6),
-+	PINMUX_GPIO(PTG5),
-+	PINMUX_GPIO(PTG4),
-+	PINMUX_GPIO(PTG3),
-+	PINMUX_GPIO(PTG2),
-+	PINMUX_GPIO(PTG1),
-+	PINMUX_GPIO(PTG0),
- 
- 	/* PTH */
--	PINMUX_GPIO(GPIO_PTH6, PTH6_DATA),
--	PINMUX_GPIO(GPIO_PTH5, PTH5_DATA),
--	PINMUX_GPIO(GPIO_PTH4, PTH4_DATA),
--	PINMUX_GPIO(GPIO_PTH3, PTH3_DATA),
--	PINMUX_GPIO(GPIO_PTH2, PTH2_DATA),
--	PINMUX_GPIO(GPIO_PTH1, PTH1_DATA),
--	PINMUX_GPIO(GPIO_PTH0, PTH0_DATA),
-+	PINMUX_GPIO(PTH6),
-+	PINMUX_GPIO(PTH5),
-+	PINMUX_GPIO(PTH4),
-+	PINMUX_GPIO(PTH3),
-+	PINMUX_GPIO(PTH2),
-+	PINMUX_GPIO(PTH1),
-+	PINMUX_GPIO(PTH0),
- 
- 	/* PTJ */
--	PINMUX_GPIO(GPIO_PTJ6, PTJ6_DATA),
--	PINMUX_GPIO(GPIO_PTJ5, PTJ5_DATA),
--	PINMUX_GPIO(GPIO_PTJ4, PTJ4_DATA),
--	PINMUX_GPIO(GPIO_PTJ3, PTJ3_DATA),
--	PINMUX_GPIO(GPIO_PTJ2, PTJ2_DATA),
--	PINMUX_GPIO(GPIO_PTJ1, PTJ1_DATA),
--	PINMUX_GPIO(GPIO_PTJ0, PTJ0_DATA),
-+	PINMUX_GPIO(PTJ6),
-+	PINMUX_GPIO(PTJ5),
-+	PINMUX_GPIO(PTJ4),
-+	PINMUX_GPIO(PTJ3),
-+	PINMUX_GPIO(PTJ2),
-+	PINMUX_GPIO(PTJ1),
-+	PINMUX_GPIO(PTJ0),
- 
- 	/* PTK */
--	PINMUX_GPIO(GPIO_PTK3, PTK3_DATA),
--	PINMUX_GPIO(GPIO_PTK2, PTK2_DATA),
--	PINMUX_GPIO(GPIO_PTK1, PTK1_DATA),
--	PINMUX_GPIO(GPIO_PTK0, PTK0_DATA),
-+	PINMUX_GPIO(PTK3),
-+	PINMUX_GPIO(PTK2),
-+	PINMUX_GPIO(PTK1),
-+	PINMUX_GPIO(PTK0),
- 
- 	/* PTL */
--	PINMUX_GPIO(GPIO_PTL7, PTL7_DATA),
--	PINMUX_GPIO(GPIO_PTL6, PTL6_DATA),
--	PINMUX_GPIO(GPIO_PTL5, PTL5_DATA),
--	PINMUX_GPIO(GPIO_PTL4, PTL4_DATA),
--	PINMUX_GPIO(GPIO_PTL3, PTL3_DATA),
-+	PINMUX_GPIO(PTL7),
-+	PINMUX_GPIO(PTL6),
-+	PINMUX_GPIO(PTL5),
-+	PINMUX_GPIO(PTL4),
-+	PINMUX_GPIO(PTL3),
- 
- 	/* PTM */
--	PINMUX_GPIO(GPIO_PTM7, PTM7_DATA),
--	PINMUX_GPIO(GPIO_PTM6, PTM6_DATA),
--	PINMUX_GPIO(GPIO_PTM5, PTM5_DATA),
--	PINMUX_GPIO(GPIO_PTM4, PTM4_DATA),
--	PINMUX_GPIO(GPIO_PTM3, PTM3_DATA),
--	PINMUX_GPIO(GPIO_PTM2, PTM2_DATA),
--	PINMUX_GPIO(GPIO_PTM1, PTM1_DATA),
--	PINMUX_GPIO(GPIO_PTM0, PTM0_DATA),
-+	PINMUX_GPIO(PTM7),
-+	PINMUX_GPIO(PTM6),
-+	PINMUX_GPIO(PTM5),
-+	PINMUX_GPIO(PTM4),
-+	PINMUX_GPIO(PTM3),
-+	PINMUX_GPIO(PTM2),
-+	PINMUX_GPIO(PTM1),
-+	PINMUX_GPIO(PTM0),
- 
- 	/* PTP */
--	PINMUX_GPIO(GPIO_PTP4, PTP4_DATA),
--	PINMUX_GPIO(GPIO_PTP3, PTP3_DATA),
--	PINMUX_GPIO(GPIO_PTP2, PTP2_DATA),
--	PINMUX_GPIO(GPIO_PTP1, PTP1_DATA),
--	PINMUX_GPIO(GPIO_PTP0, PTP0_DATA),
-+	PINMUX_GPIO(PTP4),
-+	PINMUX_GPIO(PTP3),
-+	PINMUX_GPIO(PTP2),
-+	PINMUX_GPIO(PTP1),
-+	PINMUX_GPIO(PTP0),
- 
- 	/* PTR */
--	PINMUX_GPIO(GPIO_PTR7, PTR7_DATA),
--	PINMUX_GPIO(GPIO_PTR6, PTR6_DATA),
--	PINMUX_GPIO(GPIO_PTR5, PTR5_DATA),
--	PINMUX_GPIO(GPIO_PTR4, PTR4_DATA),
--	PINMUX_GPIO(GPIO_PTR3, PTR3_DATA),
--	PINMUX_GPIO(GPIO_PTR2, PTR2_DATA),
--	PINMUX_GPIO(GPIO_PTR1, PTR1_DATA),
--	PINMUX_GPIO(GPIO_PTR0, PTR0_DATA),
-+	PINMUX_GPIO(PTR7),
-+	PINMUX_GPIO(PTR6),
-+	PINMUX_GPIO(PTR5),
-+	PINMUX_GPIO(PTR4),
-+	PINMUX_GPIO(PTR3),
-+	PINMUX_GPIO(PTR2),
-+	PINMUX_GPIO(PTR1),
-+	PINMUX_GPIO(PTR0),
- 
- 	/* PTS */
--	PINMUX_GPIO(GPIO_PTS4, PTS4_DATA),
--	PINMUX_GPIO(GPIO_PTS3, PTS3_DATA),
--	PINMUX_GPIO(GPIO_PTS2, PTS2_DATA),
--	PINMUX_GPIO(GPIO_PTS1, PTS1_DATA),
--	PINMUX_GPIO(GPIO_PTS0, PTS0_DATA),
-+	PINMUX_GPIO(PTS4),
-+	PINMUX_GPIO(PTS3),
-+	PINMUX_GPIO(PTS2),
-+	PINMUX_GPIO(PTS1),
-+	PINMUX_GPIO(PTS0),
- 
- 	/* PTT */
--	PINMUX_GPIO(GPIO_PTT4, PTT4_DATA),
--	PINMUX_GPIO(GPIO_PTT3, PTT3_DATA),
--	PINMUX_GPIO(GPIO_PTT2, PTT2_DATA),
--	PINMUX_GPIO(GPIO_PTT1, PTT1_DATA),
--	PINMUX_GPIO(GPIO_PTT0, PTT0_DATA),
-+	PINMUX_GPIO(PTT4),
-+	PINMUX_GPIO(PTT3),
-+	PINMUX_GPIO(PTT2),
-+	PINMUX_GPIO(PTT1),
-+	PINMUX_GPIO(PTT0),
- 
- 	/* PTU */
--	PINMUX_GPIO(GPIO_PTU4, PTU4_DATA),
--	PINMUX_GPIO(GPIO_PTU3, PTU3_DATA),
--	PINMUX_GPIO(GPIO_PTU2, PTU2_DATA),
--	PINMUX_GPIO(GPIO_PTU1, PTU1_DATA),
--	PINMUX_GPIO(GPIO_PTU0, PTU0_DATA),
-+	PINMUX_GPIO(PTU4),
-+	PINMUX_GPIO(PTU3),
-+	PINMUX_GPIO(PTU2),
-+	PINMUX_GPIO(PTU1),
-+	PINMUX_GPIO(PTU0),
- 
- 	/* PTV */
--	PINMUX_GPIO(GPIO_PTV4, PTV4_DATA),
--	PINMUX_GPIO(GPIO_PTV3, PTV3_DATA),
--	PINMUX_GPIO(GPIO_PTV2, PTV2_DATA),
--	PINMUX_GPIO(GPIO_PTV1, PTV1_DATA),
--	PINMUX_GPIO(GPIO_PTV0, PTV0_DATA),
-+	PINMUX_GPIO(PTV4),
-+	PINMUX_GPIO(PTV3),
-+	PINMUX_GPIO(PTV2),
-+	PINMUX_GPIO(PTV1),
-+	PINMUX_GPIO(PTV0),
- };
- 
- #define PINMUX_FN_BASE	ARRAY_SIZE(pinmux_pins)
-diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7722.c b/drivers/pinctrl/sh-pfc/pfc-sh7722.c
-index 0c8d011f..add30934 100644
---- a/drivers/pinctrl/sh-pfc/pfc-sh7722.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-sh7722.c
-@@ -756,199 +756,199 @@ static const u16 pinmux_data[] = {
- 
- static struct sh_pfc_pin pinmux_pins[] = {
- 	/* PTA */
--	PINMUX_GPIO(GPIO_PTA7, PTA7_DATA),
--	PINMUX_GPIO(GPIO_PTA6, PTA6_DATA),
--	PINMUX_GPIO(GPIO_PTA5, PTA5_DATA),
--	PINMUX_GPIO(GPIO_PTA4, PTA4_DATA),
--	PINMUX_GPIO(GPIO_PTA3, PTA3_DATA),
--	PINMUX_GPIO(GPIO_PTA2, PTA2_DATA),
--	PINMUX_GPIO(GPIO_PTA1, PTA1_DATA),
--	PINMUX_GPIO(GPIO_PTA0, PTA0_DATA),
-+	PINMUX_GPIO(PTA7),
-+	PINMUX_GPIO(PTA6),
-+	PINMUX_GPIO(PTA5),
-+	PINMUX_GPIO(PTA4),
-+	PINMUX_GPIO(PTA3),
-+	PINMUX_GPIO(PTA2),
-+	PINMUX_GPIO(PTA1),
-+	PINMUX_GPIO(PTA0),
- 
- 	/* PTB */
--	PINMUX_GPIO(GPIO_PTB7, PTB7_DATA),
--	PINMUX_GPIO(GPIO_PTB6, PTB6_DATA),
--	PINMUX_GPIO(GPIO_PTB5, PTB5_DATA),
--	PINMUX_GPIO(GPIO_PTB4, PTB4_DATA),
--	PINMUX_GPIO(GPIO_PTB3, PTB3_DATA),
--	PINMUX_GPIO(GPIO_PTB2, PTB2_DATA),
--	PINMUX_GPIO(GPIO_PTB1, PTB1_DATA),
--	PINMUX_GPIO(GPIO_PTB0, PTB0_DATA),
-+	PINMUX_GPIO(PTB7),
-+	PINMUX_GPIO(PTB6),
-+	PINMUX_GPIO(PTB5),
-+	PINMUX_GPIO(PTB4),
-+	PINMUX_GPIO(PTB3),
-+	PINMUX_GPIO(PTB2),
-+	PINMUX_GPIO(PTB1),
-+	PINMUX_GPIO(PTB0),
- 
- 	/* PTC */
--	PINMUX_GPIO(GPIO_PTC7, PTC7_DATA),
--	PINMUX_GPIO(GPIO_PTC5, PTC5_DATA),
--	PINMUX_GPIO(GPIO_PTC4, PTC4_DATA),
--	PINMUX_GPIO(GPIO_PTC3, PTC3_DATA),
--	PINMUX_GPIO(GPIO_PTC2, PTC2_DATA),
--	PINMUX_GPIO(GPIO_PTC0, PTC0_DATA),
-+	PINMUX_GPIO(PTC7),
-+	PINMUX_GPIO(PTC5),
-+	PINMUX_GPIO(PTC4),
-+	PINMUX_GPIO(PTC3),
-+	PINMUX_GPIO(PTC2),
-+	PINMUX_GPIO(PTC0),
- 
- 	/* PTD */
--	PINMUX_GPIO(GPIO_PTD7, PTD7_DATA),
--	PINMUX_GPIO(GPIO_PTD6, PTD6_DATA),
--	PINMUX_GPIO(GPIO_PTD5, PTD5_DATA),
--	PINMUX_GPIO(GPIO_PTD4, PTD4_DATA),
--	PINMUX_GPIO(GPIO_PTD3, PTD3_DATA),
--	PINMUX_GPIO(GPIO_PTD2, PTD2_DATA),
--	PINMUX_GPIO(GPIO_PTD1, PTD1_DATA),
--	PINMUX_GPIO(GPIO_PTD0, PTD0_DATA),
-+	PINMUX_GPIO(PTD7),
-+	PINMUX_GPIO(PTD6),
-+	PINMUX_GPIO(PTD5),
-+	PINMUX_GPIO(PTD4),
-+	PINMUX_GPIO(PTD3),
-+	PINMUX_GPIO(PTD2),
-+	PINMUX_GPIO(PTD1),
-+	PINMUX_GPIO(PTD0),
- 
- 	/* PTE */
--	PINMUX_GPIO(GPIO_PTE7, PTE7_DATA),
--	PINMUX_GPIO(GPIO_PTE6, PTE6_DATA),
--	PINMUX_GPIO(GPIO_PTE5, PTE5_DATA),
--	PINMUX_GPIO(GPIO_PTE4, PTE4_DATA),
--	PINMUX_GPIO(GPIO_PTE1, PTE1_DATA),
--	PINMUX_GPIO(GPIO_PTE0, PTE0_DATA),
-+	PINMUX_GPIO(PTE7),
-+	PINMUX_GPIO(PTE6),
-+	PINMUX_GPIO(PTE5),
-+	PINMUX_GPIO(PTE4),
-+	PINMUX_GPIO(PTE1),
-+	PINMUX_GPIO(PTE0),
- 
- 	/* PTF */
--	PINMUX_GPIO(GPIO_PTF6, PTF6_DATA),
--	PINMUX_GPIO(GPIO_PTF5, PTF5_DATA),
--	PINMUX_GPIO(GPIO_PTF4, PTF4_DATA),
--	PINMUX_GPIO(GPIO_PTF3, PTF3_DATA),
--	PINMUX_GPIO(GPIO_PTF2, PTF2_DATA),
--	PINMUX_GPIO(GPIO_PTF1, PTF1_DATA),
--	PINMUX_GPIO(GPIO_PTF0, PTF0_DATA),
-+	PINMUX_GPIO(PTF6),
-+	PINMUX_GPIO(PTF5),
-+	PINMUX_GPIO(PTF4),
-+	PINMUX_GPIO(PTF3),
-+	PINMUX_GPIO(PTF2),
-+	PINMUX_GPIO(PTF1),
-+	PINMUX_GPIO(PTF0),
- 
- 	/* PTG */
--	PINMUX_GPIO(GPIO_PTG4, PTG4_DATA),
--	PINMUX_GPIO(GPIO_PTG3, PTG3_DATA),
--	PINMUX_GPIO(GPIO_PTG2, PTG2_DATA),
--	PINMUX_GPIO(GPIO_PTG1, PTG1_DATA),
--	PINMUX_GPIO(GPIO_PTG0, PTG0_DATA),
-+	PINMUX_GPIO(PTG4),
-+	PINMUX_GPIO(PTG3),
-+	PINMUX_GPIO(PTG2),
-+	PINMUX_GPIO(PTG1),
-+	PINMUX_GPIO(PTG0),
- 
- 	/* PTH */
--	PINMUX_GPIO(GPIO_PTH7, PTH7_DATA),
--	PINMUX_GPIO(GPIO_PTH6, PTH6_DATA),
--	PINMUX_GPIO(GPIO_PTH5, PTH5_DATA),
--	PINMUX_GPIO(GPIO_PTH4, PTH4_DATA),
--	PINMUX_GPIO(GPIO_PTH3, PTH3_DATA),
--	PINMUX_GPIO(GPIO_PTH2, PTH2_DATA),
--	PINMUX_GPIO(GPIO_PTH1, PTH1_DATA),
--	PINMUX_GPIO(GPIO_PTH0, PTH0_DATA),
-+	PINMUX_GPIO(PTH7),
-+	PINMUX_GPIO(PTH6),
-+	PINMUX_GPIO(PTH5),
-+	PINMUX_GPIO(PTH4),
-+	PINMUX_GPIO(PTH3),
-+	PINMUX_GPIO(PTH2),
-+	PINMUX_GPIO(PTH1),
-+	PINMUX_GPIO(PTH0),
- 
- 	/* PTJ */
--	PINMUX_GPIO(GPIO_PTJ7, PTJ7_DATA),
--	PINMUX_GPIO(GPIO_PTJ6, PTJ6_DATA),
--	PINMUX_GPIO(GPIO_PTJ5, PTJ5_DATA),
--	PINMUX_GPIO(GPIO_PTJ1, PTJ1_DATA),
--	PINMUX_GPIO(GPIO_PTJ0, PTJ0_DATA),
-+	PINMUX_GPIO(PTJ7),
-+	PINMUX_GPIO(PTJ6),
-+	PINMUX_GPIO(PTJ5),
-+	PINMUX_GPIO(PTJ1),
-+	PINMUX_GPIO(PTJ0),
- 
- 	/* PTK */
--	PINMUX_GPIO(GPIO_PTK6, PTK6_DATA),
--	PINMUX_GPIO(GPIO_PTK5, PTK5_DATA),
--	PINMUX_GPIO(GPIO_PTK4, PTK4_DATA),
--	PINMUX_GPIO(GPIO_PTK3, PTK3_DATA),
--	PINMUX_GPIO(GPIO_PTK2, PTK2_DATA),
--	PINMUX_GPIO(GPIO_PTK1, PTK1_DATA),
--	PINMUX_GPIO(GPIO_PTK0, PTK0_DATA),
-+	PINMUX_GPIO(PTK6),
-+	PINMUX_GPIO(PTK5),
-+	PINMUX_GPIO(PTK4),
-+	PINMUX_GPIO(PTK3),
-+	PINMUX_GPIO(PTK2),
-+	PINMUX_GPIO(PTK1),
-+	PINMUX_GPIO(PTK0),
- 
- 	/* PTL */
--	PINMUX_GPIO(GPIO_PTL7, PTL7_DATA),
--	PINMUX_GPIO(GPIO_PTL6, PTL6_DATA),
--	PINMUX_GPIO(GPIO_PTL5, PTL5_DATA),
--	PINMUX_GPIO(GPIO_PTL4, PTL4_DATA),
--	PINMUX_GPIO(GPIO_PTL3, PTL3_DATA),
--	PINMUX_GPIO(GPIO_PTL2, PTL2_DATA),
--	PINMUX_GPIO(GPIO_PTL1, PTL1_DATA),
--	PINMUX_GPIO(GPIO_PTL0, PTL0_DATA),
-+	PINMUX_GPIO(PTL7),
-+	PINMUX_GPIO(PTL6),
-+	PINMUX_GPIO(PTL5),
-+	PINMUX_GPIO(PTL4),
-+	PINMUX_GPIO(PTL3),
-+	PINMUX_GPIO(PTL2),
-+	PINMUX_GPIO(PTL1),
-+	PINMUX_GPIO(PTL0),
- 
- 	/* PTM */
--	PINMUX_GPIO(GPIO_PTM7, PTM7_DATA),
--	PINMUX_GPIO(GPIO_PTM6, PTM6_DATA),
--	PINMUX_GPIO(GPIO_PTM5, PTM5_DATA),
--	PINMUX_GPIO(GPIO_PTM4, PTM4_DATA),
--	PINMUX_GPIO(GPIO_PTM3, PTM3_DATA),
--	PINMUX_GPIO(GPIO_PTM2, PTM2_DATA),
--	PINMUX_GPIO(GPIO_PTM1, PTM1_DATA),
--	PINMUX_GPIO(GPIO_PTM0, PTM0_DATA),
-+	PINMUX_GPIO(PTM7),
-+	PINMUX_GPIO(PTM6),
-+	PINMUX_GPIO(PTM5),
-+	PINMUX_GPIO(PTM4),
-+	PINMUX_GPIO(PTM3),
-+	PINMUX_GPIO(PTM2),
-+	PINMUX_GPIO(PTM1),
-+	PINMUX_GPIO(PTM0),
- 
- 	/* PTN */
--	PINMUX_GPIO(GPIO_PTN7, PTN7_DATA),
--	PINMUX_GPIO(GPIO_PTN6, PTN6_DATA),
--	PINMUX_GPIO(GPIO_PTN5, PTN5_DATA),
--	PINMUX_GPIO(GPIO_PTN4, PTN4_DATA),
--	PINMUX_GPIO(GPIO_PTN3, PTN3_DATA),
--	PINMUX_GPIO(GPIO_PTN2, PTN2_DATA),
--	PINMUX_GPIO(GPIO_PTN1, PTN1_DATA),
--	PINMUX_GPIO(GPIO_PTN0, PTN0_DATA),
-+	PINMUX_GPIO(PTN7),
-+	PINMUX_GPIO(PTN6),
-+	PINMUX_GPIO(PTN5),
-+	PINMUX_GPIO(PTN4),
-+	PINMUX_GPIO(PTN3),
-+	PINMUX_GPIO(PTN2),
-+	PINMUX_GPIO(PTN1),
-+	PINMUX_GPIO(PTN0),
- 
- 	/* PTQ */
--	PINMUX_GPIO(GPIO_PTQ6, PTQ6_DATA),
--	PINMUX_GPIO(GPIO_PTQ5, PTQ5_DATA),
--	PINMUX_GPIO(GPIO_PTQ4, PTQ4_DATA),
--	PINMUX_GPIO(GPIO_PTQ3, PTQ3_DATA),
--	PINMUX_GPIO(GPIO_PTQ2, PTQ2_DATA),
--	PINMUX_GPIO(GPIO_PTQ1, PTQ1_DATA),
--	PINMUX_GPIO(GPIO_PTQ0, PTQ0_DATA),
-+	PINMUX_GPIO(PTQ6),
-+	PINMUX_GPIO(PTQ5),
-+	PINMUX_GPIO(PTQ4),
-+	PINMUX_GPIO(PTQ3),
-+	PINMUX_GPIO(PTQ2),
-+	PINMUX_GPIO(PTQ1),
-+	PINMUX_GPIO(PTQ0),
- 
- 	/* PTR */
--	PINMUX_GPIO(GPIO_PTR4, PTR4_DATA),
--	PINMUX_GPIO(GPIO_PTR3, PTR3_DATA),
--	PINMUX_GPIO(GPIO_PTR2, PTR2_DATA),
--	PINMUX_GPIO(GPIO_PTR1, PTR1_DATA),
--	PINMUX_GPIO(GPIO_PTR0, PTR0_DATA),
-+	PINMUX_GPIO(PTR4),
-+	PINMUX_GPIO(PTR3),
-+	PINMUX_GPIO(PTR2),
-+	PINMUX_GPIO(PTR1),
-+	PINMUX_GPIO(PTR0),
- 
- 	/* PTS */
--	PINMUX_GPIO(GPIO_PTS4, PTS4_DATA),
--	PINMUX_GPIO(GPIO_PTS3, PTS3_DATA),
--	PINMUX_GPIO(GPIO_PTS2, PTS2_DATA),
--	PINMUX_GPIO(GPIO_PTS1, PTS1_DATA),
--	PINMUX_GPIO(GPIO_PTS0, PTS0_DATA),
-+	PINMUX_GPIO(PTS4),
-+	PINMUX_GPIO(PTS3),
-+	PINMUX_GPIO(PTS2),
-+	PINMUX_GPIO(PTS1),
-+	PINMUX_GPIO(PTS0),
- 
- 	/* PTT */
--	PINMUX_GPIO(GPIO_PTT4, PTT4_DATA),
--	PINMUX_GPIO(GPIO_PTT3, PTT3_DATA),
--	PINMUX_GPIO(GPIO_PTT2, PTT2_DATA),
--	PINMUX_GPIO(GPIO_PTT1, PTT1_DATA),
--	PINMUX_GPIO(GPIO_PTT0, PTT0_DATA),
-+	PINMUX_GPIO(PTT4),
-+	PINMUX_GPIO(PTT3),
-+	PINMUX_GPIO(PTT2),
-+	PINMUX_GPIO(PTT1),
-+	PINMUX_GPIO(PTT0),
- 
- 	/* PTU */
--	PINMUX_GPIO(GPIO_PTU4, PTU4_DATA),
--	PINMUX_GPIO(GPIO_PTU3, PTU3_DATA),
--	PINMUX_GPIO(GPIO_PTU2, PTU2_DATA),
--	PINMUX_GPIO(GPIO_PTU1, PTU1_DATA),
--	PINMUX_GPIO(GPIO_PTU0, PTU0_DATA),
-+	PINMUX_GPIO(PTU4),
-+	PINMUX_GPIO(PTU3),
-+	PINMUX_GPIO(PTU2),
-+	PINMUX_GPIO(PTU1),
-+	PINMUX_GPIO(PTU0),
- 
- 	/* PTV */
--	PINMUX_GPIO(GPIO_PTV4, PTV4_DATA),
--	PINMUX_GPIO(GPIO_PTV3, PTV3_DATA),
--	PINMUX_GPIO(GPIO_PTV2, PTV2_DATA),
--	PINMUX_GPIO(GPIO_PTV1, PTV1_DATA),
--	PINMUX_GPIO(GPIO_PTV0, PTV0_DATA),
-+	PINMUX_GPIO(PTV4),
-+	PINMUX_GPIO(PTV3),
-+	PINMUX_GPIO(PTV2),
-+	PINMUX_GPIO(PTV1),
-+	PINMUX_GPIO(PTV0),
- 
- 	/* PTW */
--	PINMUX_GPIO(GPIO_PTW6, PTW6_DATA),
--	PINMUX_GPIO(GPIO_PTW5, PTW5_DATA),
--	PINMUX_GPIO(GPIO_PTW4, PTW4_DATA),
--	PINMUX_GPIO(GPIO_PTW3, PTW3_DATA),
--	PINMUX_GPIO(GPIO_PTW2, PTW2_DATA),
--	PINMUX_GPIO(GPIO_PTW1, PTW1_DATA),
--	PINMUX_GPIO(GPIO_PTW0, PTW0_DATA),
-+	PINMUX_GPIO(PTW6),
-+	PINMUX_GPIO(PTW5),
-+	PINMUX_GPIO(PTW4),
-+	PINMUX_GPIO(PTW3),
-+	PINMUX_GPIO(PTW2),
-+	PINMUX_GPIO(PTW1),
-+	PINMUX_GPIO(PTW0),
- 
- 	/* PTX */
--	PINMUX_GPIO(GPIO_PTX6, PTX6_DATA),
--	PINMUX_GPIO(GPIO_PTX5, PTX5_DATA),
--	PINMUX_GPIO(GPIO_PTX4, PTX4_DATA),
--	PINMUX_GPIO(GPIO_PTX3, PTX3_DATA),
--	PINMUX_GPIO(GPIO_PTX2, PTX2_DATA),
--	PINMUX_GPIO(GPIO_PTX1, PTX1_DATA),
--	PINMUX_GPIO(GPIO_PTX0, PTX0_DATA),
-+	PINMUX_GPIO(PTX6),
-+	PINMUX_GPIO(PTX5),
-+	PINMUX_GPIO(PTX4),
-+	PINMUX_GPIO(PTX3),
-+	PINMUX_GPIO(PTX2),
-+	PINMUX_GPIO(PTX1),
-+	PINMUX_GPIO(PTX0),
- 
- 	/* PTY */
--	PINMUX_GPIO(GPIO_PTY5, PTY5_DATA),
--	PINMUX_GPIO(GPIO_PTY4, PTY4_DATA),
--	PINMUX_GPIO(GPIO_PTY3, PTY3_DATA),
--	PINMUX_GPIO(GPIO_PTY2, PTY2_DATA),
--	PINMUX_GPIO(GPIO_PTY1, PTY1_DATA),
--	PINMUX_GPIO(GPIO_PTY0, PTY0_DATA),
-+	PINMUX_GPIO(PTY5),
-+	PINMUX_GPIO(PTY4),
-+	PINMUX_GPIO(PTY3),
-+	PINMUX_GPIO(PTY2),
-+	PINMUX_GPIO(PTY1),
-+	PINMUX_GPIO(PTY0),
- 
- 	/* PTZ */
--	PINMUX_GPIO(GPIO_PTZ5, PTZ5_DATA),
--	PINMUX_GPIO(GPIO_PTZ4, PTZ4_DATA),
--	PINMUX_GPIO(GPIO_PTZ3, PTZ3_DATA),
--	PINMUX_GPIO(GPIO_PTZ2, PTZ2_DATA),
--	PINMUX_GPIO(GPIO_PTZ1, PTZ1_DATA),
-+	PINMUX_GPIO(PTZ5),
-+	PINMUX_GPIO(PTZ4),
-+	PINMUX_GPIO(PTZ3),
-+	PINMUX_GPIO(PTZ2),
-+	PINMUX_GPIO(PTZ1),
- };
- 
- #define PINMUX_FN_BASE	ARRAY_SIZE(pinmux_pins)
-diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7723.c b/drivers/pinctrl/sh-pfc/pfc-sh7723.c
-index 853093ef..1cecc910 100644
---- a/drivers/pinctrl/sh-pfc/pfc-sh7723.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-sh7723.c
-@@ -919,220 +919,220 @@ static const u16 pinmux_data[] = {
- 
- static struct sh_pfc_pin pinmux_pins[] = {
- 	/* PTA */
--	PINMUX_GPIO(GPIO_PTA7, PTA7_DATA),
--	PINMUX_GPIO(GPIO_PTA6, PTA6_DATA),
--	PINMUX_GPIO(GPIO_PTA5, PTA5_DATA),
--	PINMUX_GPIO(GPIO_PTA4, PTA4_DATA),
--	PINMUX_GPIO(GPIO_PTA3, PTA3_DATA),
--	PINMUX_GPIO(GPIO_PTA2, PTA2_DATA),
--	PINMUX_GPIO(GPIO_PTA1, PTA1_DATA),
--	PINMUX_GPIO(GPIO_PTA0, PTA0_DATA),
-+	PINMUX_GPIO(PTA7),
-+	PINMUX_GPIO(PTA6),
-+	PINMUX_GPIO(PTA5),
-+	PINMUX_GPIO(PTA4),
-+	PINMUX_GPIO(PTA3),
-+	PINMUX_GPIO(PTA2),
-+	PINMUX_GPIO(PTA1),
-+	PINMUX_GPIO(PTA0),
- 
- 	/* PTB */
--	PINMUX_GPIO(GPIO_PTB7, PTB7_DATA),
--	PINMUX_GPIO(GPIO_PTB6, PTB6_DATA),
--	PINMUX_GPIO(GPIO_PTB5, PTB5_DATA),
--	PINMUX_GPIO(GPIO_PTB4, PTB4_DATA),
--	PINMUX_GPIO(GPIO_PTB3, PTB3_DATA),
--	PINMUX_GPIO(GPIO_PTB2, PTB2_DATA),
--	PINMUX_GPIO(GPIO_PTB1, PTB1_DATA),
--	PINMUX_GPIO(GPIO_PTB0, PTB0_DATA),
-+	PINMUX_GPIO(PTB7),
-+	PINMUX_GPIO(PTB6),
-+	PINMUX_GPIO(PTB5),
-+	PINMUX_GPIO(PTB4),
-+	PINMUX_GPIO(PTB3),
-+	PINMUX_GPIO(PTB2),
-+	PINMUX_GPIO(PTB1),
-+	PINMUX_GPIO(PTB0),
- 
- 	/* PTC */
--	PINMUX_GPIO(GPIO_PTC7, PTC7_DATA),
--	PINMUX_GPIO(GPIO_PTC6, PTC6_DATA),
--	PINMUX_GPIO(GPIO_PTC5, PTC5_DATA),
--	PINMUX_GPIO(GPIO_PTC4, PTC4_DATA),
--	PINMUX_GPIO(GPIO_PTC3, PTC3_DATA),
--	PINMUX_GPIO(GPIO_PTC2, PTC2_DATA),
--	PINMUX_GPIO(GPIO_PTC1, PTC1_DATA),
--	PINMUX_GPIO(GPIO_PTC0, PTC0_DATA),
-+	PINMUX_GPIO(PTC7),
-+	PINMUX_GPIO(PTC6),
-+	PINMUX_GPIO(PTC5),
-+	PINMUX_GPIO(PTC4),
-+	PINMUX_GPIO(PTC3),
-+	PINMUX_GPIO(PTC2),
-+	PINMUX_GPIO(PTC1),
-+	PINMUX_GPIO(PTC0),
- 
- 	/* PTD */
--	PINMUX_GPIO(GPIO_PTD7, PTD7_DATA),
--	PINMUX_GPIO(GPIO_PTD6, PTD6_DATA),
--	PINMUX_GPIO(GPIO_PTD5, PTD5_DATA),
--	PINMUX_GPIO(GPIO_PTD4, PTD4_DATA),
--	PINMUX_GPIO(GPIO_PTD3, PTD3_DATA),
--	PINMUX_GPIO(GPIO_PTD2, PTD2_DATA),
--	PINMUX_GPIO(GPIO_PTD1, PTD1_DATA),
--	PINMUX_GPIO(GPIO_PTD0, PTD0_DATA),
-+	PINMUX_GPIO(PTD7),
-+	PINMUX_GPIO(PTD6),
-+	PINMUX_GPIO(PTD5),
-+	PINMUX_GPIO(PTD4),
-+	PINMUX_GPIO(PTD3),
-+	PINMUX_GPIO(PTD2),
-+	PINMUX_GPIO(PTD1),
-+	PINMUX_GPIO(PTD0),
- 
- 	/* PTE */
--	PINMUX_GPIO(GPIO_PTE5, PTE5_DATA),
--	PINMUX_GPIO(GPIO_PTE4, PTE4_DATA),
--	PINMUX_GPIO(GPIO_PTE3, PTE3_DATA),
--	PINMUX_GPIO(GPIO_PTE2, PTE2_DATA),
--	PINMUX_GPIO(GPIO_PTE1, PTE1_DATA),
--	PINMUX_GPIO(GPIO_PTE0, PTE0_DATA),
-+	PINMUX_GPIO(PTE5),
-+	PINMUX_GPIO(PTE4),
-+	PINMUX_GPIO(PTE3),
-+	PINMUX_GPIO(PTE2),
-+	PINMUX_GPIO(PTE1),
-+	PINMUX_GPIO(PTE0),
- 
- 	/* PTF */
--	PINMUX_GPIO(GPIO_PTF7, PTF7_DATA),
--	PINMUX_GPIO(GPIO_PTF6, PTF6_DATA),
--	PINMUX_GPIO(GPIO_PTF5, PTF5_DATA),
--	PINMUX_GPIO(GPIO_PTF4, PTF4_DATA),
--	PINMUX_GPIO(GPIO_PTF3, PTF3_DATA),
--	PINMUX_GPIO(GPIO_PTF2, PTF2_DATA),
--	PINMUX_GPIO(GPIO_PTF1, PTF1_DATA),
--	PINMUX_GPIO(GPIO_PTF0, PTF0_DATA),
-+	PINMUX_GPIO(PTF7),
-+	PINMUX_GPIO(PTF6),
-+	PINMUX_GPIO(PTF5),
-+	PINMUX_GPIO(PTF4),
-+	PINMUX_GPIO(PTF3),
-+	PINMUX_GPIO(PTF2),
-+	PINMUX_GPIO(PTF1),
-+	PINMUX_GPIO(PTF0),
- 
- 	/* PTG */
--	PINMUX_GPIO(GPIO_PTG5, PTG5_DATA),
--	PINMUX_GPIO(GPIO_PTG4, PTG4_DATA),
--	PINMUX_GPIO(GPIO_PTG3, PTG3_DATA),
--	PINMUX_GPIO(GPIO_PTG2, PTG2_DATA),
--	PINMUX_GPIO(GPIO_PTG1, PTG1_DATA),
--	PINMUX_GPIO(GPIO_PTG0, PTG0_DATA),
-+	PINMUX_GPIO(PTG5),
-+	PINMUX_GPIO(PTG4),
-+	PINMUX_GPIO(PTG3),
-+	PINMUX_GPIO(PTG2),
-+	PINMUX_GPIO(PTG1),
-+	PINMUX_GPIO(PTG0),
- 
- 	/* PTH */
--	PINMUX_GPIO(GPIO_PTH7, PTH7_DATA),
--	PINMUX_GPIO(GPIO_PTH6, PTH6_DATA),
--	PINMUX_GPIO(GPIO_PTH5, PTH5_DATA),
--	PINMUX_GPIO(GPIO_PTH4, PTH4_DATA),
--	PINMUX_GPIO(GPIO_PTH3, PTH3_DATA),
--	PINMUX_GPIO(GPIO_PTH2, PTH2_DATA),
--	PINMUX_GPIO(GPIO_PTH1, PTH1_DATA),
--	PINMUX_GPIO(GPIO_PTH0, PTH0_DATA),
-+	PINMUX_GPIO(PTH7),
-+	PINMUX_GPIO(PTH6),
-+	PINMUX_GPIO(PTH5),
-+	PINMUX_GPIO(PTH4),
-+	PINMUX_GPIO(PTH3),
-+	PINMUX_GPIO(PTH2),
-+	PINMUX_GPIO(PTH1),
-+	PINMUX_GPIO(PTH0),
- 
- 	/* PTJ */
--	PINMUX_GPIO(GPIO_PTJ7, PTJ7_DATA),
--	PINMUX_GPIO(GPIO_PTJ5, PTJ5_DATA),
--	PINMUX_GPIO(GPIO_PTJ3, PTJ3_DATA),
--	PINMUX_GPIO(GPIO_PTJ2, PTJ2_DATA),
--	PINMUX_GPIO(GPIO_PTJ1, PTJ1_DATA),
--	PINMUX_GPIO(GPIO_PTJ0, PTJ0_DATA),
-+	PINMUX_GPIO(PTJ7),
-+	PINMUX_GPIO(PTJ5),
-+	PINMUX_GPIO(PTJ3),
-+	PINMUX_GPIO(PTJ2),
-+	PINMUX_GPIO(PTJ1),
-+	PINMUX_GPIO(PTJ0),
- 
- 	/* PTK */
--	PINMUX_GPIO(GPIO_PTK7, PTK7_DATA),
--	PINMUX_GPIO(GPIO_PTK6, PTK6_DATA),
--	PINMUX_GPIO(GPIO_PTK5, PTK5_DATA),
--	PINMUX_GPIO(GPIO_PTK4, PTK4_DATA),
--	PINMUX_GPIO(GPIO_PTK3, PTK3_DATA),
--	PINMUX_GPIO(GPIO_PTK2, PTK2_DATA),
--	PINMUX_GPIO(GPIO_PTK1, PTK1_DATA),
--	PINMUX_GPIO(GPIO_PTK0, PTK0_DATA),
-+	PINMUX_GPIO(PTK7),
-+	PINMUX_GPIO(PTK6),
-+	PINMUX_GPIO(PTK5),
-+	PINMUX_GPIO(PTK4),
-+	PINMUX_GPIO(PTK3),
-+	PINMUX_GPIO(PTK2),
-+	PINMUX_GPIO(PTK1),
-+	PINMUX_GPIO(PTK0),
- 
- 	/* PTL */
--	PINMUX_GPIO(GPIO_PTL7, PTL7_DATA),
--	PINMUX_GPIO(GPIO_PTL6, PTL6_DATA),
--	PINMUX_GPIO(GPIO_PTL5, PTL5_DATA),
--	PINMUX_GPIO(GPIO_PTL4, PTL4_DATA),
--	PINMUX_GPIO(GPIO_PTL3, PTL3_DATA),
--	PINMUX_GPIO(GPIO_PTL2, PTL2_DATA),
--	PINMUX_GPIO(GPIO_PTL1, PTL1_DATA),
--	PINMUX_GPIO(GPIO_PTL0, PTL0_DATA),
-+	PINMUX_GPIO(PTL7),
-+	PINMUX_GPIO(PTL6),
-+	PINMUX_GPIO(PTL5),
-+	PINMUX_GPIO(PTL4),
-+	PINMUX_GPIO(PTL3),
-+	PINMUX_GPIO(PTL2),
-+	PINMUX_GPIO(PTL1),
-+	PINMUX_GPIO(PTL0),
- 
- 	/* PTM */
--	PINMUX_GPIO(GPIO_PTM7, PTM7_DATA),
--	PINMUX_GPIO(GPIO_PTM6, PTM6_DATA),
--	PINMUX_GPIO(GPIO_PTM5, PTM5_DATA),
--	PINMUX_GPIO(GPIO_PTM4, PTM4_DATA),
--	PINMUX_GPIO(GPIO_PTM3, PTM3_DATA),
--	PINMUX_GPIO(GPIO_PTM2, PTM2_DATA),
--	PINMUX_GPIO(GPIO_PTM1, PTM1_DATA),
--	PINMUX_GPIO(GPIO_PTM0, PTM0_DATA),
-+	PINMUX_GPIO(PTM7),
-+	PINMUX_GPIO(PTM6),
-+	PINMUX_GPIO(PTM5),
-+	PINMUX_GPIO(PTM4),
-+	PINMUX_GPIO(PTM3),
-+	PINMUX_GPIO(PTM2),
-+	PINMUX_GPIO(PTM1),
-+	PINMUX_GPIO(PTM0),
- 
- 	/* PTN */
--	PINMUX_GPIO(GPIO_PTN7, PTN7_DATA),
--	PINMUX_GPIO(GPIO_PTN6, PTN6_DATA),
--	PINMUX_GPIO(GPIO_PTN5, PTN5_DATA),
--	PINMUX_GPIO(GPIO_PTN4, PTN4_DATA),
--	PINMUX_GPIO(GPIO_PTN3, PTN3_DATA),
--	PINMUX_GPIO(GPIO_PTN2, PTN2_DATA),
--	PINMUX_GPIO(GPIO_PTN1, PTN1_DATA),
--	PINMUX_GPIO(GPIO_PTN0, PTN0_DATA),
-+	PINMUX_GPIO(PTN7),
-+	PINMUX_GPIO(PTN6),
-+	PINMUX_GPIO(PTN5),
-+	PINMUX_GPIO(PTN4),
-+	PINMUX_GPIO(PTN3),
-+	PINMUX_GPIO(PTN2),
-+	PINMUX_GPIO(PTN1),
-+	PINMUX_GPIO(PTN0),
- 
- 	/* PTQ */
--	PINMUX_GPIO(GPIO_PTQ3, PTQ3_DATA),
--	PINMUX_GPIO(GPIO_PTQ2, PTQ2_DATA),
--	PINMUX_GPIO(GPIO_PTQ1, PTQ1_DATA),
--	PINMUX_GPIO(GPIO_PTQ0, PTQ0_DATA),
-+	PINMUX_GPIO(PTQ3),
-+	PINMUX_GPIO(PTQ2),
-+	PINMUX_GPIO(PTQ1),
-+	PINMUX_GPIO(PTQ0),
- 
- 	/* PTR */
--	PINMUX_GPIO(GPIO_PTR7, PTR7_DATA),
--	PINMUX_GPIO(GPIO_PTR6, PTR6_DATA),
--	PINMUX_GPIO(GPIO_PTR5, PTR5_DATA),
--	PINMUX_GPIO(GPIO_PTR4, PTR4_DATA),
--	PINMUX_GPIO(GPIO_PTR3, PTR3_DATA),
--	PINMUX_GPIO(GPIO_PTR2, PTR2_DATA),
--	PINMUX_GPIO(GPIO_PTR1, PTR1_DATA),
--	PINMUX_GPIO(GPIO_PTR0, PTR0_DATA),
-+	PINMUX_GPIO(PTR7),
-+	PINMUX_GPIO(PTR6),
-+	PINMUX_GPIO(PTR5),
-+	PINMUX_GPIO(PTR4),
-+	PINMUX_GPIO(PTR3),
-+	PINMUX_GPIO(PTR2),
-+	PINMUX_GPIO(PTR1),
-+	PINMUX_GPIO(PTR0),
- 
- 	/* PTS */
--	PINMUX_GPIO(GPIO_PTS7, PTS7_DATA),
--	PINMUX_GPIO(GPIO_PTS6, PTS6_DATA),
--	PINMUX_GPIO(GPIO_PTS5, PTS5_DATA),
--	PINMUX_GPIO(GPIO_PTS4, PTS4_DATA),
--	PINMUX_GPIO(GPIO_PTS3, PTS3_DATA),
--	PINMUX_GPIO(GPIO_PTS2, PTS2_DATA),
--	PINMUX_GPIO(GPIO_PTS1, PTS1_DATA),
--	PINMUX_GPIO(GPIO_PTS0, PTS0_DATA),
-+	PINMUX_GPIO(PTS7),
-+	PINMUX_GPIO(PTS6),
-+	PINMUX_GPIO(PTS5),
-+	PINMUX_GPIO(PTS4),
-+	PINMUX_GPIO(PTS3),
-+	PINMUX_GPIO(PTS2),
-+	PINMUX_GPIO(PTS1),
-+	PINMUX_GPIO(PTS0),
- 
- 	/* PTT */
--	PINMUX_GPIO(GPIO_PTT5, PTT5_DATA),
--	PINMUX_GPIO(GPIO_PTT4, PTT4_DATA),
--	PINMUX_GPIO(GPIO_PTT3, PTT3_DATA),
--	PINMUX_GPIO(GPIO_PTT2, PTT2_DATA),
--	PINMUX_GPIO(GPIO_PTT1, PTT1_DATA),
--	PINMUX_GPIO(GPIO_PTT0, PTT0_DATA),
-+	PINMUX_GPIO(PTT5),
-+	PINMUX_GPIO(PTT4),
-+	PINMUX_GPIO(PTT3),
-+	PINMUX_GPIO(PTT2),
-+	PINMUX_GPIO(PTT1),
-+	PINMUX_GPIO(PTT0),
- 
- 	/* PTU */
--	PINMUX_GPIO(GPIO_PTU5, PTU5_DATA),
--	PINMUX_GPIO(GPIO_PTU4, PTU4_DATA),
--	PINMUX_GPIO(GPIO_PTU3, PTU3_DATA),
--	PINMUX_GPIO(GPIO_PTU2, PTU2_DATA),
--	PINMUX_GPIO(GPIO_PTU1, PTU1_DATA),
--	PINMUX_GPIO(GPIO_PTU0, PTU0_DATA),
-+	PINMUX_GPIO(PTU5),
-+	PINMUX_GPIO(PTU4),
-+	PINMUX_GPIO(PTU3),
-+	PINMUX_GPIO(PTU2),
-+	PINMUX_GPIO(PTU1),
-+	PINMUX_GPIO(PTU0),
- 
- 	/* PTV */
--	PINMUX_GPIO(GPIO_PTV7, PTV7_DATA),
--	PINMUX_GPIO(GPIO_PTV6, PTV6_DATA),
--	PINMUX_GPIO(GPIO_PTV5, PTV5_DATA),
--	PINMUX_GPIO(GPIO_PTV4, PTV4_DATA),
--	PINMUX_GPIO(GPIO_PTV3, PTV3_DATA),
--	PINMUX_GPIO(GPIO_PTV2, PTV2_DATA),
--	PINMUX_GPIO(GPIO_PTV1, PTV1_DATA),
--	PINMUX_GPIO(GPIO_PTV0, PTV0_DATA),
-+	PINMUX_GPIO(PTV7),
-+	PINMUX_GPIO(PTV6),
-+	PINMUX_GPIO(PTV5),
-+	PINMUX_GPIO(PTV4),
-+	PINMUX_GPIO(PTV3),
-+	PINMUX_GPIO(PTV2),
-+	PINMUX_GPIO(PTV1),
-+	PINMUX_GPIO(PTV0),
- 
- 	/* PTW */
--	PINMUX_GPIO(GPIO_PTW7, PTW7_DATA),
--	PINMUX_GPIO(GPIO_PTW6, PTW6_DATA),
--	PINMUX_GPIO(GPIO_PTW5, PTW5_DATA),
--	PINMUX_GPIO(GPIO_PTW4, PTW4_DATA),
--	PINMUX_GPIO(GPIO_PTW3, PTW3_DATA),
--	PINMUX_GPIO(GPIO_PTW2, PTW2_DATA),
--	PINMUX_GPIO(GPIO_PTW1, PTW1_DATA),
--	PINMUX_GPIO(GPIO_PTW0, PTW0_DATA),
-+	PINMUX_GPIO(PTW7),
-+	PINMUX_GPIO(PTW6),
-+	PINMUX_GPIO(PTW5),
-+	PINMUX_GPIO(PTW4),
-+	PINMUX_GPIO(PTW3),
-+	PINMUX_GPIO(PTW2),
-+	PINMUX_GPIO(PTW1),
-+	PINMUX_GPIO(PTW0),
- 
- 	/* PTX */
--	PINMUX_GPIO(GPIO_PTX7, PTX7_DATA),
--	PINMUX_GPIO(GPIO_PTX6, PTX6_DATA),
--	PINMUX_GPIO(GPIO_PTX5, PTX5_DATA),
--	PINMUX_GPIO(GPIO_PTX4, PTX4_DATA),
--	PINMUX_GPIO(GPIO_PTX3, PTX3_DATA),
--	PINMUX_GPIO(GPIO_PTX2, PTX2_DATA),
--	PINMUX_GPIO(GPIO_PTX1, PTX1_DATA),
--	PINMUX_GPIO(GPIO_PTX0, PTX0_DATA),
-+	PINMUX_GPIO(PTX7),
-+	PINMUX_GPIO(PTX6),
-+	PINMUX_GPIO(PTX5),
-+	PINMUX_GPIO(PTX4),
-+	PINMUX_GPIO(PTX3),
-+	PINMUX_GPIO(PTX2),
-+	PINMUX_GPIO(PTX1),
-+	PINMUX_GPIO(PTX0),
- 
- 	/* PTY */
--	PINMUX_GPIO(GPIO_PTY7, PTY7_DATA),
--	PINMUX_GPIO(GPIO_PTY6, PTY6_DATA),
--	PINMUX_GPIO(GPIO_PTY5, PTY5_DATA),
--	PINMUX_GPIO(GPIO_PTY4, PTY4_DATA),
--	PINMUX_GPIO(GPIO_PTY3, PTY3_DATA),
--	PINMUX_GPIO(GPIO_PTY2, PTY2_DATA),
--	PINMUX_GPIO(GPIO_PTY1, PTY1_DATA),
--	PINMUX_GPIO(GPIO_PTY0, PTY0_DATA),
-+	PINMUX_GPIO(PTY7),
-+	PINMUX_GPIO(PTY6),
-+	PINMUX_GPIO(PTY5),
-+	PINMUX_GPIO(PTY4),
-+	PINMUX_GPIO(PTY3),
-+	PINMUX_GPIO(PTY2),
-+	PINMUX_GPIO(PTY1),
-+	PINMUX_GPIO(PTY0),
- 
- 	/* PTZ */
--	PINMUX_GPIO(GPIO_PTZ7, PTZ7_DATA),
--	PINMUX_GPIO(GPIO_PTZ6, PTZ6_DATA),
--	PINMUX_GPIO(GPIO_PTZ5, PTZ5_DATA),
--	PINMUX_GPIO(GPIO_PTZ4, PTZ4_DATA),
--	PINMUX_GPIO(GPIO_PTZ3, PTZ3_DATA),
--	PINMUX_GPIO(GPIO_PTZ2, PTZ2_DATA),
--	PINMUX_GPIO(GPIO_PTZ1, PTZ1_DATA),
--	PINMUX_GPIO(GPIO_PTZ0, PTZ0_DATA),
-+	PINMUX_GPIO(PTZ7),
-+	PINMUX_GPIO(PTZ6),
-+	PINMUX_GPIO(PTZ5),
-+	PINMUX_GPIO(PTZ4),
-+	PINMUX_GPIO(PTZ3),
-+	PINMUX_GPIO(PTZ2),
-+	PINMUX_GPIO(PTZ1),
-+	PINMUX_GPIO(PTZ0),
- };
- 
- #define PINMUX_FN_BASE	ARRAY_SIZE(pinmux_pins)
-diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7724.c b/drivers/pinctrl/sh-pfc/pfc-sh7724.c
-index fe2693f6..1085ab55 100644
---- a/drivers/pinctrl/sh-pfc/pfc-sh7724.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-sh7724.c
-@@ -1148,230 +1148,230 @@ static const u16 pinmux_data[] = {
- 
- static struct sh_pfc_pin pinmux_pins[] = {
- 	/* PTA */
--	PINMUX_GPIO(GPIO_PTA7, PTA7_DATA),
--	PINMUX_GPIO(GPIO_PTA6, PTA6_DATA),
--	PINMUX_GPIO(GPIO_PTA5, PTA5_DATA),
--	PINMUX_GPIO(GPIO_PTA4, PTA4_DATA),
--	PINMUX_GPIO(GPIO_PTA3, PTA3_DATA),
--	PINMUX_GPIO(GPIO_PTA2, PTA2_DATA),
--	PINMUX_GPIO(GPIO_PTA1, PTA1_DATA),
--	PINMUX_GPIO(GPIO_PTA0, PTA0_DATA),
-+	PINMUX_GPIO(PTA7),
-+	PINMUX_GPIO(PTA6),
-+	PINMUX_GPIO(PTA5),
-+	PINMUX_GPIO(PTA4),
-+	PINMUX_GPIO(PTA3),
-+	PINMUX_GPIO(PTA2),
-+	PINMUX_GPIO(PTA1),
-+	PINMUX_GPIO(PTA0),
- 
- 	/* PTB */
--	PINMUX_GPIO(GPIO_PTB7, PTB7_DATA),
--	PINMUX_GPIO(GPIO_PTB6, PTB6_DATA),
--	PINMUX_GPIO(GPIO_PTB5, PTB5_DATA),
--	PINMUX_GPIO(GPIO_PTB4, PTB4_DATA),
--	PINMUX_GPIO(GPIO_PTB3, PTB3_DATA),
--	PINMUX_GPIO(GPIO_PTB2, PTB2_DATA),
--	PINMUX_GPIO(GPIO_PTB1, PTB1_DATA),
--	PINMUX_GPIO(GPIO_PTB0, PTB0_DATA),
-+	PINMUX_GPIO(PTB7),
-+	PINMUX_GPIO(PTB6),
-+	PINMUX_GPIO(PTB5),
-+	PINMUX_GPIO(PTB4),
-+	PINMUX_GPIO(PTB3),
-+	PINMUX_GPIO(PTB2),
-+	PINMUX_GPIO(PTB1),
-+	PINMUX_GPIO(PTB0),
- 
- 	/* PTC */
--	PINMUX_GPIO(GPIO_PTC7, PTC7_DATA),
--	PINMUX_GPIO(GPIO_PTC6, PTC6_DATA),
--	PINMUX_GPIO(GPIO_PTC5, PTC5_DATA),
--	PINMUX_GPIO(GPIO_PTC4, PTC4_DATA),
--	PINMUX_GPIO(GPIO_PTC3, PTC3_DATA),
--	PINMUX_GPIO(GPIO_PTC2, PTC2_DATA),
--	PINMUX_GPIO(GPIO_PTC1, PTC1_DATA),
--	PINMUX_GPIO(GPIO_PTC0, PTC0_DATA),
-+	PINMUX_GPIO(PTC7),
-+	PINMUX_GPIO(PTC6),
-+	PINMUX_GPIO(PTC5),
-+	PINMUX_GPIO(PTC4),
-+	PINMUX_GPIO(PTC3),
-+	PINMUX_GPIO(PTC2),
-+	PINMUX_GPIO(PTC1),
-+	PINMUX_GPIO(PTC0),
- 
- 	/* PTD */
--	PINMUX_GPIO(GPIO_PTD7, PTD7_DATA),
--	PINMUX_GPIO(GPIO_PTD6, PTD6_DATA),
--	PINMUX_GPIO(GPIO_PTD5, PTD5_DATA),
--	PINMUX_GPIO(GPIO_PTD4, PTD4_DATA),
--	PINMUX_GPIO(GPIO_PTD3, PTD3_DATA),
--	PINMUX_GPIO(GPIO_PTD2, PTD2_DATA),
--	PINMUX_GPIO(GPIO_PTD1, PTD1_DATA),
--	PINMUX_GPIO(GPIO_PTD0, PTD0_DATA),
-+	PINMUX_GPIO(PTD7),
-+	PINMUX_GPIO(PTD6),
-+	PINMUX_GPIO(PTD5),
-+	PINMUX_GPIO(PTD4),
-+	PINMUX_GPIO(PTD3),
-+	PINMUX_GPIO(PTD2),
-+	PINMUX_GPIO(PTD1),
-+	PINMUX_GPIO(PTD0),
- 
- 	/* PTE */
--	PINMUX_GPIO(GPIO_PTE7, PTE7_DATA),
--	PINMUX_GPIO(GPIO_PTE6, PTE6_DATA),
--	PINMUX_GPIO(GPIO_PTE5, PTE5_DATA),
--	PINMUX_GPIO(GPIO_PTE4, PTE4_DATA),
--	PINMUX_GPIO(GPIO_PTE3, PTE3_DATA),
--	PINMUX_GPIO(GPIO_PTE2, PTE2_DATA),
--	PINMUX_GPIO(GPIO_PTE1, PTE1_DATA),
--	PINMUX_GPIO(GPIO_PTE0, PTE0_DATA),
-+	PINMUX_GPIO(PTE7),
-+	PINMUX_GPIO(PTE6),
-+	PINMUX_GPIO(PTE5),
-+	PINMUX_GPIO(PTE4),
-+	PINMUX_GPIO(PTE3),
-+	PINMUX_GPIO(PTE2),
-+	PINMUX_GPIO(PTE1),
-+	PINMUX_GPIO(PTE0),
- 
- 	/* PTF */
--	PINMUX_GPIO(GPIO_PTF7, PTF7_DATA),
--	PINMUX_GPIO(GPIO_PTF6, PTF6_DATA),
--	PINMUX_GPIO(GPIO_PTF5, PTF5_DATA),
--	PINMUX_GPIO(GPIO_PTF4, PTF4_DATA),
--	PINMUX_GPIO(GPIO_PTF3, PTF3_DATA),
--	PINMUX_GPIO(GPIO_PTF2, PTF2_DATA),
--	PINMUX_GPIO(GPIO_PTF1, PTF1_DATA),
--	PINMUX_GPIO(GPIO_PTF0, PTF0_DATA),
-+	PINMUX_GPIO(PTF7),
-+	PINMUX_GPIO(PTF6),
-+	PINMUX_GPIO(PTF5),
-+	PINMUX_GPIO(PTF4),
-+	PINMUX_GPIO(PTF3),
-+	PINMUX_GPIO(PTF2),
-+	PINMUX_GPIO(PTF1),
-+	PINMUX_GPIO(PTF0),
- 
- 	/* PTG */
--	PINMUX_GPIO(GPIO_PTG5, PTG5_DATA),
--	PINMUX_GPIO(GPIO_PTG4, PTG4_DATA),
--	PINMUX_GPIO(GPIO_PTG3, PTG3_DATA),
--	PINMUX_GPIO(GPIO_PTG2, PTG2_DATA),
--	PINMUX_GPIO(GPIO_PTG1, PTG1_DATA),
--	PINMUX_GPIO(GPIO_PTG0, PTG0_DATA),
-+	PINMUX_GPIO(PTG5),
-+	PINMUX_GPIO(PTG4),
-+	PINMUX_GPIO(PTG3),
-+	PINMUX_GPIO(PTG2),
-+	PINMUX_GPIO(PTG1),
-+	PINMUX_GPIO(PTG0),
- 
- 	/* PTH */
--	PINMUX_GPIO(GPIO_PTH7, PTH7_DATA),
--	PINMUX_GPIO(GPIO_PTH6, PTH6_DATA),
--	PINMUX_GPIO(GPIO_PTH5, PTH5_DATA),
--	PINMUX_GPIO(GPIO_PTH4, PTH4_DATA),
--	PINMUX_GPIO(GPIO_PTH3, PTH3_DATA),
--	PINMUX_GPIO(GPIO_PTH2, PTH2_DATA),
--	PINMUX_GPIO(GPIO_PTH1, PTH1_DATA),
--	PINMUX_GPIO(GPIO_PTH0, PTH0_DATA),
-+	PINMUX_GPIO(PTH7),
-+	PINMUX_GPIO(PTH6),
-+	PINMUX_GPIO(PTH5),
-+	PINMUX_GPIO(PTH4),
-+	PINMUX_GPIO(PTH3),
-+	PINMUX_GPIO(PTH2),
-+	PINMUX_GPIO(PTH1),
-+	PINMUX_GPIO(PTH0),
- 
- 	/* PTJ */
--	PINMUX_GPIO(GPIO_PTJ7, PTJ7_DATA),
--	PINMUX_GPIO(GPIO_PTJ6, PTJ6_DATA),
--	PINMUX_GPIO(GPIO_PTJ5, PTJ5_DATA),
--	PINMUX_GPIO(GPIO_PTJ3, PTJ3_DATA),
--	PINMUX_GPIO(GPIO_PTJ2, PTJ2_DATA),
--	PINMUX_GPIO(GPIO_PTJ1, PTJ1_DATA),
--	PINMUX_GPIO(GPIO_PTJ0, PTJ0_DATA),
-+	PINMUX_GPIO(PTJ7),
-+	PINMUX_GPIO(PTJ6),
-+	PINMUX_GPIO(PTJ5),
-+	PINMUX_GPIO(PTJ3),
-+	PINMUX_GPIO(PTJ2),
-+	PINMUX_GPIO(PTJ1),
-+	PINMUX_GPIO(PTJ0),
- 
- 	/* PTK */
--	PINMUX_GPIO(GPIO_PTK7, PTK7_DATA),
--	PINMUX_GPIO(GPIO_PTK6, PTK6_DATA),
--	PINMUX_GPIO(GPIO_PTK5, PTK5_DATA),
--	PINMUX_GPIO(GPIO_PTK4, PTK4_DATA),
--	PINMUX_GPIO(GPIO_PTK3, PTK3_DATA),
--	PINMUX_GPIO(GPIO_PTK2, PTK2_DATA),
--	PINMUX_GPIO(GPIO_PTK1, PTK1_DATA),
--	PINMUX_GPIO(GPIO_PTK0, PTK0_DATA),
-+	PINMUX_GPIO(PTK7),
-+	PINMUX_GPIO(PTK6),
-+	PINMUX_GPIO(PTK5),
-+	PINMUX_GPIO(PTK4),
-+	PINMUX_GPIO(PTK3),
-+	PINMUX_GPIO(PTK2),
-+	PINMUX_GPIO(PTK1),
-+	PINMUX_GPIO(PTK0),
- 
- 	/* PTL */
--	PINMUX_GPIO(GPIO_PTL7, PTL7_DATA),
--	PINMUX_GPIO(GPIO_PTL6, PTL6_DATA),
--	PINMUX_GPIO(GPIO_PTL5, PTL5_DATA),
--	PINMUX_GPIO(GPIO_PTL4, PTL4_DATA),
--	PINMUX_GPIO(GPIO_PTL3, PTL3_DATA),
--	PINMUX_GPIO(GPIO_PTL2, PTL2_DATA),
--	PINMUX_GPIO(GPIO_PTL1, PTL1_DATA),
--	PINMUX_GPIO(GPIO_PTL0, PTL0_DATA),
-+	PINMUX_GPIO(PTL7),
-+	PINMUX_GPIO(PTL6),
-+	PINMUX_GPIO(PTL5),
-+	PINMUX_GPIO(PTL4),
-+	PINMUX_GPIO(PTL3),
-+	PINMUX_GPIO(PTL2),
-+	PINMUX_GPIO(PTL1),
-+	PINMUX_GPIO(PTL0),
- 
- 	/* PTM */
--	PINMUX_GPIO(GPIO_PTM7, PTM7_DATA),
--	PINMUX_GPIO(GPIO_PTM6, PTM6_DATA),
--	PINMUX_GPIO(GPIO_PTM5, PTM5_DATA),
--	PINMUX_GPIO(GPIO_PTM4, PTM4_DATA),
--	PINMUX_GPIO(GPIO_PTM3, PTM3_DATA),
--	PINMUX_GPIO(GPIO_PTM2, PTM2_DATA),
--	PINMUX_GPIO(GPIO_PTM1, PTM1_DATA),
--	PINMUX_GPIO(GPIO_PTM0, PTM0_DATA),
-+	PINMUX_GPIO(PTM7),
-+	PINMUX_GPIO(PTM6),
-+	PINMUX_GPIO(PTM5),
-+	PINMUX_GPIO(PTM4),
-+	PINMUX_GPIO(PTM3),
-+	PINMUX_GPIO(PTM2),
-+	PINMUX_GPIO(PTM1),
-+	PINMUX_GPIO(PTM0),
- 
- 	/* PTN */
--	PINMUX_GPIO(GPIO_PTN7, PTN7_DATA),
--	PINMUX_GPIO(GPIO_PTN6, PTN6_DATA),
--	PINMUX_GPIO(GPIO_PTN5, PTN5_DATA),
--	PINMUX_GPIO(GPIO_PTN4, PTN4_DATA),
--	PINMUX_GPIO(GPIO_PTN3, PTN3_DATA),
--	PINMUX_GPIO(GPIO_PTN2, PTN2_DATA),
--	PINMUX_GPIO(GPIO_PTN1, PTN1_DATA),
--	PINMUX_GPIO(GPIO_PTN0, PTN0_DATA),
-+	PINMUX_GPIO(PTN7),
-+	PINMUX_GPIO(PTN6),
-+	PINMUX_GPIO(PTN5),
-+	PINMUX_GPIO(PTN4),
-+	PINMUX_GPIO(PTN3),
-+	PINMUX_GPIO(PTN2),
-+	PINMUX_GPIO(PTN1),
-+	PINMUX_GPIO(PTN0),
- 
- 	/* PTQ */
--	PINMUX_GPIO(GPIO_PTQ7, PTQ7_DATA),
--	PINMUX_GPIO(GPIO_PTQ6, PTQ6_DATA),
--	PINMUX_GPIO(GPIO_PTQ5, PTQ5_DATA),
--	PINMUX_GPIO(GPIO_PTQ4, PTQ4_DATA),
--	PINMUX_GPIO(GPIO_PTQ3, PTQ3_DATA),
--	PINMUX_GPIO(GPIO_PTQ2, PTQ2_DATA),
--	PINMUX_GPIO(GPIO_PTQ1, PTQ1_DATA),
--	PINMUX_GPIO(GPIO_PTQ0, PTQ0_DATA),
-+	PINMUX_GPIO(PTQ7),
-+	PINMUX_GPIO(PTQ6),
-+	PINMUX_GPIO(PTQ5),
-+	PINMUX_GPIO(PTQ4),
-+	PINMUX_GPIO(PTQ3),
-+	PINMUX_GPIO(PTQ2),
-+	PINMUX_GPIO(PTQ1),
-+	PINMUX_GPIO(PTQ0),
- 
- 	/* PTR */
--	PINMUX_GPIO(GPIO_PTR7, PTR7_DATA),
--	PINMUX_GPIO(GPIO_PTR6, PTR6_DATA),
--	PINMUX_GPIO(GPIO_PTR5, PTR5_DATA),
--	PINMUX_GPIO(GPIO_PTR4, PTR4_DATA),
--	PINMUX_GPIO(GPIO_PTR3, PTR3_DATA),
--	PINMUX_GPIO(GPIO_PTR2, PTR2_DATA),
--	PINMUX_GPIO(GPIO_PTR1, PTR1_DATA),
--	PINMUX_GPIO(GPIO_PTR0, PTR0_DATA),
-+	PINMUX_GPIO(PTR7),
-+	PINMUX_GPIO(PTR6),
-+	PINMUX_GPIO(PTR5),
-+	PINMUX_GPIO(PTR4),
-+	PINMUX_GPIO(PTR3),
-+	PINMUX_GPIO(PTR2),
-+	PINMUX_GPIO(PTR1),
-+	PINMUX_GPIO(PTR0),
- 
- 	/* PTS */
--	PINMUX_GPIO(GPIO_PTS6, PTS6_DATA),
--	PINMUX_GPIO(GPIO_PTS5, PTS5_DATA),
--	PINMUX_GPIO(GPIO_PTS4, PTS4_DATA),
--	PINMUX_GPIO(GPIO_PTS3, PTS3_DATA),
--	PINMUX_GPIO(GPIO_PTS2, PTS2_DATA),
--	PINMUX_GPIO(GPIO_PTS1, PTS1_DATA),
--	PINMUX_GPIO(GPIO_PTS0, PTS0_DATA),
-+	PINMUX_GPIO(PTS6),
-+	PINMUX_GPIO(PTS5),
-+	PINMUX_GPIO(PTS4),
-+	PINMUX_GPIO(PTS3),
-+	PINMUX_GPIO(PTS2),
-+	PINMUX_GPIO(PTS1),
-+	PINMUX_GPIO(PTS0),
- 
- 	/* PTT */
--	PINMUX_GPIO(GPIO_PTT7, PTT7_DATA),
--	PINMUX_GPIO(GPIO_PTT6, PTT6_DATA),
--	PINMUX_GPIO(GPIO_PTT5, PTT5_DATA),
--	PINMUX_GPIO(GPIO_PTT4, PTT4_DATA),
--	PINMUX_GPIO(GPIO_PTT3, PTT3_DATA),
--	PINMUX_GPIO(GPIO_PTT2, PTT2_DATA),
--	PINMUX_GPIO(GPIO_PTT1, PTT1_DATA),
--	PINMUX_GPIO(GPIO_PTT0, PTT0_DATA),
-+	PINMUX_GPIO(PTT7),
-+	PINMUX_GPIO(PTT6),
-+	PINMUX_GPIO(PTT5),
-+	PINMUX_GPIO(PTT4),
-+	PINMUX_GPIO(PTT3),
-+	PINMUX_GPIO(PTT2),
-+	PINMUX_GPIO(PTT1),
-+	PINMUX_GPIO(PTT0),
- 
- 	/* PTU */
--	PINMUX_GPIO(GPIO_PTU7, PTU7_DATA),
--	PINMUX_GPIO(GPIO_PTU6, PTU6_DATA),
--	PINMUX_GPIO(GPIO_PTU5, PTU5_DATA),
--	PINMUX_GPIO(GPIO_PTU4, PTU4_DATA),
--	PINMUX_GPIO(GPIO_PTU3, PTU3_DATA),
--	PINMUX_GPIO(GPIO_PTU2, PTU2_DATA),
--	PINMUX_GPIO(GPIO_PTU1, PTU1_DATA),
--	PINMUX_GPIO(GPIO_PTU0, PTU0_DATA),
-+	PINMUX_GPIO(PTU7),
-+	PINMUX_GPIO(PTU6),
-+	PINMUX_GPIO(PTU5),
-+	PINMUX_GPIO(PTU4),
-+	PINMUX_GPIO(PTU3),
-+	PINMUX_GPIO(PTU2),
-+	PINMUX_GPIO(PTU1),
-+	PINMUX_GPIO(PTU0),
- 
- 	/* PTV */
--	PINMUX_GPIO(GPIO_PTV7, PTV7_DATA),
--	PINMUX_GPIO(GPIO_PTV6, PTV6_DATA),
--	PINMUX_GPIO(GPIO_PTV5, PTV5_DATA),
--	PINMUX_GPIO(GPIO_PTV4, PTV4_DATA),
--	PINMUX_GPIO(GPIO_PTV3, PTV3_DATA),
--	PINMUX_GPIO(GPIO_PTV2, PTV2_DATA),
--	PINMUX_GPIO(GPIO_PTV1, PTV1_DATA),
--	PINMUX_GPIO(GPIO_PTV0, PTV0_DATA),
-+	PINMUX_GPIO(PTV7),
-+	PINMUX_GPIO(PTV6),
-+	PINMUX_GPIO(PTV5),
-+	PINMUX_GPIO(PTV4),
-+	PINMUX_GPIO(PTV3),
-+	PINMUX_GPIO(PTV2),
-+	PINMUX_GPIO(PTV1),
-+	PINMUX_GPIO(PTV0),
- 
- 	/* PTW */
--	PINMUX_GPIO(GPIO_PTW7, PTW7_DATA),
--	PINMUX_GPIO(GPIO_PTW6, PTW6_DATA),
--	PINMUX_GPIO(GPIO_PTW5, PTW5_DATA),
--	PINMUX_GPIO(GPIO_PTW4, PTW4_DATA),
--	PINMUX_GPIO(GPIO_PTW3, PTW3_DATA),
--	PINMUX_GPIO(GPIO_PTW2, PTW2_DATA),
--	PINMUX_GPIO(GPIO_PTW1, PTW1_DATA),
--	PINMUX_GPIO(GPIO_PTW0, PTW0_DATA),
-+	PINMUX_GPIO(PTW7),
-+	PINMUX_GPIO(PTW6),
-+	PINMUX_GPIO(PTW5),
-+	PINMUX_GPIO(PTW4),
-+	PINMUX_GPIO(PTW3),
-+	PINMUX_GPIO(PTW2),
-+	PINMUX_GPIO(PTW1),
-+	PINMUX_GPIO(PTW0),
- 
- 	/* PTX */
--	PINMUX_GPIO(GPIO_PTX7, PTX7_DATA),
--	PINMUX_GPIO(GPIO_PTX6, PTX6_DATA),
--	PINMUX_GPIO(GPIO_PTX5, PTX5_DATA),
--	PINMUX_GPIO(GPIO_PTX4, PTX4_DATA),
--	PINMUX_GPIO(GPIO_PTX3, PTX3_DATA),
--	PINMUX_GPIO(GPIO_PTX2, PTX2_DATA),
--	PINMUX_GPIO(GPIO_PTX1, PTX1_DATA),
--	PINMUX_GPIO(GPIO_PTX0, PTX0_DATA),
-+	PINMUX_GPIO(PTX7),
-+	PINMUX_GPIO(PTX6),
-+	PINMUX_GPIO(PTX5),
-+	PINMUX_GPIO(PTX4),
-+	PINMUX_GPIO(PTX3),
-+	PINMUX_GPIO(PTX2),
-+	PINMUX_GPIO(PTX1),
-+	PINMUX_GPIO(PTX0),
- 
- 	/* PTY */
--	PINMUX_GPIO(GPIO_PTY7, PTY7_DATA),
--	PINMUX_GPIO(GPIO_PTY6, PTY6_DATA),
--	PINMUX_GPIO(GPIO_PTY5, PTY5_DATA),
--	PINMUX_GPIO(GPIO_PTY4, PTY4_DATA),
--	PINMUX_GPIO(GPIO_PTY3, PTY3_DATA),
--	PINMUX_GPIO(GPIO_PTY2, PTY2_DATA),
--	PINMUX_GPIO(GPIO_PTY1, PTY1_DATA),
--	PINMUX_GPIO(GPIO_PTY0, PTY0_DATA),
-+	PINMUX_GPIO(PTY7),
-+	PINMUX_GPIO(PTY6),
-+	PINMUX_GPIO(PTY5),
-+	PINMUX_GPIO(PTY4),
-+	PINMUX_GPIO(PTY3),
-+	PINMUX_GPIO(PTY2),
-+	PINMUX_GPIO(PTY1),
-+	PINMUX_GPIO(PTY0),
- 
- 	/* PTZ */
--	PINMUX_GPIO(GPIO_PTZ7, PTZ7_DATA),
--	PINMUX_GPIO(GPIO_PTZ6, PTZ6_DATA),
--	PINMUX_GPIO(GPIO_PTZ5, PTZ5_DATA),
--	PINMUX_GPIO(GPIO_PTZ4, PTZ4_DATA),
--	PINMUX_GPIO(GPIO_PTZ3, PTZ3_DATA),
--	PINMUX_GPIO(GPIO_PTZ2, PTZ2_DATA),
--	PINMUX_GPIO(GPIO_PTZ1, PTZ1_DATA),
--	PINMUX_GPIO(GPIO_PTZ0, PTZ0_DATA),
-+	PINMUX_GPIO(PTZ7),
-+	PINMUX_GPIO(PTZ6),
-+	PINMUX_GPIO(PTZ5),
-+	PINMUX_GPIO(PTZ4),
-+	PINMUX_GPIO(PTZ3),
-+	PINMUX_GPIO(PTZ2),
-+	PINMUX_GPIO(PTZ1),
-+	PINMUX_GPIO(PTZ0),
- };
- 
- #define PINMUX_FN_BASE	ARRAY_SIZE(pinmux_pins)
-diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7757.c b/drivers/pinctrl/sh-pfc/pfc-sh7757.c
-index f4271167..33d75e51 100644
---- a/drivers/pinctrl/sh-pfc/pfc-sh7757.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-sh7757.c
-@@ -1076,260 +1076,260 @@ static const u16 pinmux_data[] = {
- 
- static struct sh_pfc_pin pinmux_pins[] = {
- 	/* PTA */
--	PINMUX_GPIO(GPIO_PTA7, PTA7_DATA),
--	PINMUX_GPIO(GPIO_PTA6, PTA6_DATA),
--	PINMUX_GPIO(GPIO_PTA5, PTA5_DATA),
--	PINMUX_GPIO(GPIO_PTA4, PTA4_DATA),
--	PINMUX_GPIO(GPIO_PTA3, PTA3_DATA),
--	PINMUX_GPIO(GPIO_PTA2, PTA2_DATA),
--	PINMUX_GPIO(GPIO_PTA1, PTA1_DATA),
--	PINMUX_GPIO(GPIO_PTA0, PTA0_DATA),
-+	PINMUX_GPIO(PTA7),
-+	PINMUX_GPIO(PTA6),
-+	PINMUX_GPIO(PTA5),
-+	PINMUX_GPIO(PTA4),
-+	PINMUX_GPIO(PTA3),
-+	PINMUX_GPIO(PTA2),
-+	PINMUX_GPIO(PTA1),
-+	PINMUX_GPIO(PTA0),
- 
- 	/* PTB */
--	PINMUX_GPIO(GPIO_PTB7, PTB7_DATA),
--	PINMUX_GPIO(GPIO_PTB6, PTB6_DATA),
--	PINMUX_GPIO(GPIO_PTB5, PTB5_DATA),
--	PINMUX_GPIO(GPIO_PTB4, PTB4_DATA),
--	PINMUX_GPIO(GPIO_PTB3, PTB3_DATA),
--	PINMUX_GPIO(GPIO_PTB2, PTB2_DATA),
--	PINMUX_GPIO(GPIO_PTB1, PTB1_DATA),
--	PINMUX_GPIO(GPIO_PTB0, PTB0_DATA),
-+	PINMUX_GPIO(PTB7),
-+	PINMUX_GPIO(PTB6),
-+	PINMUX_GPIO(PTB5),
-+	PINMUX_GPIO(PTB4),
-+	PINMUX_GPIO(PTB3),
-+	PINMUX_GPIO(PTB2),
-+	PINMUX_GPIO(PTB1),
-+	PINMUX_GPIO(PTB0),
- 
- 	/* PTC */
--	PINMUX_GPIO(GPIO_PTC7, PTC7_DATA),
--	PINMUX_GPIO(GPIO_PTC6, PTC6_DATA),
--	PINMUX_GPIO(GPIO_PTC5, PTC5_DATA),
--	PINMUX_GPIO(GPIO_PTC4, PTC4_DATA),
--	PINMUX_GPIO(GPIO_PTC3, PTC3_DATA),
--	PINMUX_GPIO(GPIO_PTC2, PTC2_DATA),
--	PINMUX_GPIO(GPIO_PTC1, PTC1_DATA),
--	PINMUX_GPIO(GPIO_PTC0, PTC0_DATA),
-+	PINMUX_GPIO(PTC7),
-+	PINMUX_GPIO(PTC6),
-+	PINMUX_GPIO(PTC5),
-+	PINMUX_GPIO(PTC4),
-+	PINMUX_GPIO(PTC3),
-+	PINMUX_GPIO(PTC2),
-+	PINMUX_GPIO(PTC1),
-+	PINMUX_GPIO(PTC0),
- 
- 	/* PTD */
--	PINMUX_GPIO(GPIO_PTD7, PTD7_DATA),
--	PINMUX_GPIO(GPIO_PTD6, PTD6_DATA),
--	PINMUX_GPIO(GPIO_PTD5, PTD5_DATA),
--	PINMUX_GPIO(GPIO_PTD4, PTD4_DATA),
--	PINMUX_GPIO(GPIO_PTD3, PTD3_DATA),
--	PINMUX_GPIO(GPIO_PTD2, PTD2_DATA),
--	PINMUX_GPIO(GPIO_PTD1, PTD1_DATA),
--	PINMUX_GPIO(GPIO_PTD0, PTD0_DATA),
-+	PINMUX_GPIO(PTD7),
-+	PINMUX_GPIO(PTD6),
-+	PINMUX_GPIO(PTD5),
-+	PINMUX_GPIO(PTD4),
-+	PINMUX_GPIO(PTD3),
-+	PINMUX_GPIO(PTD2),
-+	PINMUX_GPIO(PTD1),
-+	PINMUX_GPIO(PTD0),
- 
- 	/* PTE */
--	PINMUX_GPIO(GPIO_PTE7, PTE7_DATA),
--	PINMUX_GPIO(GPIO_PTE6, PTE6_DATA),
--	PINMUX_GPIO(GPIO_PTE5, PTE5_DATA),
--	PINMUX_GPIO(GPIO_PTE4, PTE4_DATA),
--	PINMUX_GPIO(GPIO_PTE3, PTE3_DATA),
--	PINMUX_GPIO(GPIO_PTE2, PTE2_DATA),
--	PINMUX_GPIO(GPIO_PTE1, PTE1_DATA),
--	PINMUX_GPIO(GPIO_PTE0, PTE0_DATA),
-+	PINMUX_GPIO(PTE7),
-+	PINMUX_GPIO(PTE6),
-+	PINMUX_GPIO(PTE5),
-+	PINMUX_GPIO(PTE4),
-+	PINMUX_GPIO(PTE3),
-+	PINMUX_GPIO(PTE2),
-+	PINMUX_GPIO(PTE1),
-+	PINMUX_GPIO(PTE0),
- 
- 	/* PTF */
--	PINMUX_GPIO(GPIO_PTF7, PTF7_DATA),
--	PINMUX_GPIO(GPIO_PTF6, PTF6_DATA),
--	PINMUX_GPIO(GPIO_PTF5, PTF5_DATA),
--	PINMUX_GPIO(GPIO_PTF4, PTF4_DATA),
--	PINMUX_GPIO(GPIO_PTF3, PTF3_DATA),
--	PINMUX_GPIO(GPIO_PTF2, PTF2_DATA),
--	PINMUX_GPIO(GPIO_PTF1, PTF1_DATA),
--	PINMUX_GPIO(GPIO_PTF0, PTF0_DATA),
-+	PINMUX_GPIO(PTF7),
-+	PINMUX_GPIO(PTF6),
-+	PINMUX_GPIO(PTF5),
-+	PINMUX_GPIO(PTF4),
-+	PINMUX_GPIO(PTF3),
-+	PINMUX_GPIO(PTF2),
-+	PINMUX_GPIO(PTF1),
-+	PINMUX_GPIO(PTF0),
- 
- 	/* PTG */
--	PINMUX_GPIO(GPIO_PTG7, PTG7_DATA),
--	PINMUX_GPIO(GPIO_PTG6, PTG6_DATA),
--	PINMUX_GPIO(GPIO_PTG5, PTG5_DATA),
--	PINMUX_GPIO(GPIO_PTG4, PTG4_DATA),
--	PINMUX_GPIO(GPIO_PTG3, PTG3_DATA),
--	PINMUX_GPIO(GPIO_PTG2, PTG2_DATA),
--	PINMUX_GPIO(GPIO_PTG1, PTG1_DATA),
--	PINMUX_GPIO(GPIO_PTG0, PTG0_DATA),
-+	PINMUX_GPIO(PTG7),
-+	PINMUX_GPIO(PTG6),
-+	PINMUX_GPIO(PTG5),
-+	PINMUX_GPIO(PTG4),
-+	PINMUX_GPIO(PTG3),
-+	PINMUX_GPIO(PTG2),
-+	PINMUX_GPIO(PTG1),
-+	PINMUX_GPIO(PTG0),
- 
- 	/* PTH */
--	PINMUX_GPIO(GPIO_PTH7, PTH7_DATA),
--	PINMUX_GPIO(GPIO_PTH6, PTH6_DATA),
--	PINMUX_GPIO(GPIO_PTH5, PTH5_DATA),
--	PINMUX_GPIO(GPIO_PTH4, PTH4_DATA),
--	PINMUX_GPIO(GPIO_PTH3, PTH3_DATA),
--	PINMUX_GPIO(GPIO_PTH2, PTH2_DATA),
--	PINMUX_GPIO(GPIO_PTH1, PTH1_DATA),
--	PINMUX_GPIO(GPIO_PTH0, PTH0_DATA),
-+	PINMUX_GPIO(PTH7),
-+	PINMUX_GPIO(PTH6),
-+	PINMUX_GPIO(PTH5),
-+	PINMUX_GPIO(PTH4),
-+	PINMUX_GPIO(PTH3),
-+	PINMUX_GPIO(PTH2),
-+	PINMUX_GPIO(PTH1),
-+	PINMUX_GPIO(PTH0),
- 
- 	/* PTI */
--	PINMUX_GPIO(GPIO_PTI7, PTI7_DATA),
--	PINMUX_GPIO(GPIO_PTI6, PTI6_DATA),
--	PINMUX_GPIO(GPIO_PTI5, PTI5_DATA),
--	PINMUX_GPIO(GPIO_PTI4, PTI4_DATA),
--	PINMUX_GPIO(GPIO_PTI3, PTI3_DATA),
--	PINMUX_GPIO(GPIO_PTI2, PTI2_DATA),
--	PINMUX_GPIO(GPIO_PTI1, PTI1_DATA),
--	PINMUX_GPIO(GPIO_PTI0, PTI0_DATA),
-+	PINMUX_GPIO(PTI7),
-+	PINMUX_GPIO(PTI6),
-+	PINMUX_GPIO(PTI5),
-+	PINMUX_GPIO(PTI4),
-+	PINMUX_GPIO(PTI3),
-+	PINMUX_GPIO(PTI2),
-+	PINMUX_GPIO(PTI1),
-+	PINMUX_GPIO(PTI0),
- 
- 	/* PTJ */
--	PINMUX_GPIO(GPIO_PTJ6, PTJ6_DATA),
--	PINMUX_GPIO(GPIO_PTJ5, PTJ5_DATA),
--	PINMUX_GPIO(GPIO_PTJ4, PTJ4_DATA),
--	PINMUX_GPIO(GPIO_PTJ3, PTJ3_DATA),
--	PINMUX_GPIO(GPIO_PTJ2, PTJ2_DATA),
--	PINMUX_GPIO(GPIO_PTJ1, PTJ1_DATA),
--	PINMUX_GPIO(GPIO_PTJ0, PTJ0_DATA),
-+	PINMUX_GPIO(PTJ6),
-+	PINMUX_GPIO(PTJ5),
-+	PINMUX_GPIO(PTJ4),
-+	PINMUX_GPIO(PTJ3),
-+	PINMUX_GPIO(PTJ2),
-+	PINMUX_GPIO(PTJ1),
-+	PINMUX_GPIO(PTJ0),
- 
- 	/* PTK */
--	PINMUX_GPIO(GPIO_PTK7, PTK7_DATA),
--	PINMUX_GPIO(GPIO_PTK6, PTK6_DATA),
--	PINMUX_GPIO(GPIO_PTK5, PTK5_DATA),
--	PINMUX_GPIO(GPIO_PTK4, PTK4_DATA),
--	PINMUX_GPIO(GPIO_PTK3, PTK3_DATA),
--	PINMUX_GPIO(GPIO_PTK2, PTK2_DATA),
--	PINMUX_GPIO(GPIO_PTK1, PTK1_DATA),
--	PINMUX_GPIO(GPIO_PTK0, PTK0_DATA),
-+	PINMUX_GPIO(PTK7),
-+	PINMUX_GPIO(PTK6),
-+	PINMUX_GPIO(PTK5),
-+	PINMUX_GPIO(PTK4),
-+	PINMUX_GPIO(PTK3),
-+	PINMUX_GPIO(PTK2),
-+	PINMUX_GPIO(PTK1),
-+	PINMUX_GPIO(PTK0),
- 
- 	/* PTL */
--	PINMUX_GPIO(GPIO_PTL6, PTL6_DATA),
--	PINMUX_GPIO(GPIO_PTL5, PTL5_DATA),
--	PINMUX_GPIO(GPIO_PTL4, PTL4_DATA),
--	PINMUX_GPIO(GPIO_PTL3, PTL3_DATA),
--	PINMUX_GPIO(GPIO_PTL2, PTL2_DATA),
--	PINMUX_GPIO(GPIO_PTL1, PTL1_DATA),
--	PINMUX_GPIO(GPIO_PTL0, PTL0_DATA),
-+	PINMUX_GPIO(PTL6),
-+	PINMUX_GPIO(PTL5),
-+	PINMUX_GPIO(PTL4),
-+	PINMUX_GPIO(PTL3),
-+	PINMUX_GPIO(PTL2),
-+	PINMUX_GPIO(PTL1),
-+	PINMUX_GPIO(PTL0),
- 
- 	/* PTM */
--	PINMUX_GPIO(GPIO_PTM7, PTM7_DATA),
--	PINMUX_GPIO(GPIO_PTM6, PTM6_DATA),
--	PINMUX_GPIO(GPIO_PTM5, PTM5_DATA),
--	PINMUX_GPIO(GPIO_PTM4, PTM4_DATA),
--	PINMUX_GPIO(GPIO_PTM3, PTM3_DATA),
--	PINMUX_GPIO(GPIO_PTM2, PTM2_DATA),
--	PINMUX_GPIO(GPIO_PTM1, PTM1_DATA),
--	PINMUX_GPIO(GPIO_PTM0, PTM0_DATA),
-+	PINMUX_GPIO(PTM7),
-+	PINMUX_GPIO(PTM6),
-+	PINMUX_GPIO(PTM5),
-+	PINMUX_GPIO(PTM4),
-+	PINMUX_GPIO(PTM3),
-+	PINMUX_GPIO(PTM2),
-+	PINMUX_GPIO(PTM1),
-+	PINMUX_GPIO(PTM0),
- 
- 	/* PTN */
--	PINMUX_GPIO(GPIO_PTN6, PTN6_DATA),
--	PINMUX_GPIO(GPIO_PTN5, PTN5_DATA),
--	PINMUX_GPIO(GPIO_PTN4, PTN4_DATA),
--	PINMUX_GPIO(GPIO_PTN3, PTN3_DATA),
--	PINMUX_GPIO(GPIO_PTN2, PTN2_DATA),
--	PINMUX_GPIO(GPIO_PTN1, PTN1_DATA),
--	PINMUX_GPIO(GPIO_PTN0, PTN0_DATA),
-+	PINMUX_GPIO(PTN6),
-+	PINMUX_GPIO(PTN5),
-+	PINMUX_GPIO(PTN4),
-+	PINMUX_GPIO(PTN3),
-+	PINMUX_GPIO(PTN2),
-+	PINMUX_GPIO(PTN1),
-+	PINMUX_GPIO(PTN0),
- 
- 	/* PTO */
--	PINMUX_GPIO(GPIO_PTO7, PTO7_DATA),
--	PINMUX_GPIO(GPIO_PTO6, PTO6_DATA),
--	PINMUX_GPIO(GPIO_PTO5, PTO5_DATA),
--	PINMUX_GPIO(GPIO_PTO4, PTO4_DATA),
--	PINMUX_GPIO(GPIO_PTO3, PTO3_DATA),
--	PINMUX_GPIO(GPIO_PTO2, PTO2_DATA),
--	PINMUX_GPIO(GPIO_PTO1, PTO1_DATA),
--	PINMUX_GPIO(GPIO_PTO0, PTO0_DATA),
-+	PINMUX_GPIO(PTO7),
-+	PINMUX_GPIO(PTO6),
-+	PINMUX_GPIO(PTO5),
-+	PINMUX_GPIO(PTO4),
-+	PINMUX_GPIO(PTO3),
-+	PINMUX_GPIO(PTO2),
-+	PINMUX_GPIO(PTO1),
-+	PINMUX_GPIO(PTO0),
- 
- 	/* PTP */
--	PINMUX_GPIO(GPIO_PTP7, PTP7_DATA),
--	PINMUX_GPIO(GPIO_PTP6, PTP6_DATA),
--	PINMUX_GPIO(GPIO_PTP5, PTP5_DATA),
--	PINMUX_GPIO(GPIO_PTP4, PTP4_DATA),
--	PINMUX_GPIO(GPIO_PTP3, PTP3_DATA),
--	PINMUX_GPIO(GPIO_PTP2, PTP2_DATA),
--	PINMUX_GPIO(GPIO_PTP1, PTP1_DATA),
--	PINMUX_GPIO(GPIO_PTP0, PTP0_DATA),
-+	PINMUX_GPIO(PTP7),
-+	PINMUX_GPIO(PTP6),
-+	PINMUX_GPIO(PTP5),
-+	PINMUX_GPIO(PTP4),
-+	PINMUX_GPIO(PTP3),
-+	PINMUX_GPIO(PTP2),
-+	PINMUX_GPIO(PTP1),
-+	PINMUX_GPIO(PTP0),
- 
- 	/* PTQ */
--	PINMUX_GPIO(GPIO_PTQ6, PTQ6_DATA),
--	PINMUX_GPIO(GPIO_PTQ5, PTQ5_DATA),
--	PINMUX_GPIO(GPIO_PTQ4, PTQ4_DATA),
--	PINMUX_GPIO(GPIO_PTQ3, PTQ3_DATA),
--	PINMUX_GPIO(GPIO_PTQ2, PTQ2_DATA),
--	PINMUX_GPIO(GPIO_PTQ1, PTQ1_DATA),
--	PINMUX_GPIO(GPIO_PTQ0, PTQ0_DATA),
-+	PINMUX_GPIO(PTQ6),
-+	PINMUX_GPIO(PTQ5),
-+	PINMUX_GPIO(PTQ4),
-+	PINMUX_GPIO(PTQ3),
-+	PINMUX_GPIO(PTQ2),
-+	PINMUX_GPIO(PTQ1),
-+	PINMUX_GPIO(PTQ0),
- 
- 	/* PTR */
--	PINMUX_GPIO(GPIO_PTR7, PTR7_DATA),
--	PINMUX_GPIO(GPIO_PTR6, PTR6_DATA),
--	PINMUX_GPIO(GPIO_PTR5, PTR5_DATA),
--	PINMUX_GPIO(GPIO_PTR4, PTR4_DATA),
--	PINMUX_GPIO(GPIO_PTR3, PTR3_DATA),
--	PINMUX_GPIO(GPIO_PTR2, PTR2_DATA),
--	PINMUX_GPIO(GPIO_PTR1, PTR1_DATA),
--	PINMUX_GPIO(GPIO_PTR0, PTR0_DATA),
-+	PINMUX_GPIO(PTR7),
-+	PINMUX_GPIO(PTR6),
-+	PINMUX_GPIO(PTR5),
-+	PINMUX_GPIO(PTR4),
-+	PINMUX_GPIO(PTR3),
-+	PINMUX_GPIO(PTR2),
-+	PINMUX_GPIO(PTR1),
-+	PINMUX_GPIO(PTR0),
- 
- 	/* PTS */
--	PINMUX_GPIO(GPIO_PTS7, PTS7_DATA),
--	PINMUX_GPIO(GPIO_PTS6, PTS6_DATA),
--	PINMUX_GPIO(GPIO_PTS5, PTS5_DATA),
--	PINMUX_GPIO(GPIO_PTS4, PTS4_DATA),
--	PINMUX_GPIO(GPIO_PTS3, PTS3_DATA),
--	PINMUX_GPIO(GPIO_PTS2, PTS2_DATA),
--	PINMUX_GPIO(GPIO_PTS1, PTS1_DATA),
--	PINMUX_GPIO(GPIO_PTS0, PTS0_DATA),
-+	PINMUX_GPIO(PTS7),
-+	PINMUX_GPIO(PTS6),
-+	PINMUX_GPIO(PTS5),
-+	PINMUX_GPIO(PTS4),
-+	PINMUX_GPIO(PTS3),
-+	PINMUX_GPIO(PTS2),
-+	PINMUX_GPIO(PTS1),
-+	PINMUX_GPIO(PTS0),
- 
- 	/* PTT */
--	PINMUX_GPIO(GPIO_PTT7, PTT7_DATA),
--	PINMUX_GPIO(GPIO_PTT6, PTT6_DATA),
--	PINMUX_GPIO(GPIO_PTT5, PTT5_DATA),
--	PINMUX_GPIO(GPIO_PTT4, PTT4_DATA),
--	PINMUX_GPIO(GPIO_PTT3, PTT3_DATA),
--	PINMUX_GPIO(GPIO_PTT2, PTT2_DATA),
--	PINMUX_GPIO(GPIO_PTT1, PTT1_DATA),
--	PINMUX_GPIO(GPIO_PTT0, PTT0_DATA),
-+	PINMUX_GPIO(PTT7),
-+	PINMUX_GPIO(PTT6),
-+	PINMUX_GPIO(PTT5),
-+	PINMUX_GPIO(PTT4),
-+	PINMUX_GPIO(PTT3),
-+	PINMUX_GPIO(PTT2),
-+	PINMUX_GPIO(PTT1),
-+	PINMUX_GPIO(PTT0),
- 
- 	/* PTU */
--	PINMUX_GPIO(GPIO_PTU7, PTU7_DATA),
--	PINMUX_GPIO(GPIO_PTU6, PTU6_DATA),
--	PINMUX_GPIO(GPIO_PTU5, PTU5_DATA),
--	PINMUX_GPIO(GPIO_PTU4, PTU4_DATA),
--	PINMUX_GPIO(GPIO_PTU3, PTU3_DATA),
--	PINMUX_GPIO(GPIO_PTU2, PTU2_DATA),
--	PINMUX_GPIO(GPIO_PTU1, PTU1_DATA),
--	PINMUX_GPIO(GPIO_PTU0, PTU0_DATA),
-+	PINMUX_GPIO(PTU7),
-+	PINMUX_GPIO(PTU6),
-+	PINMUX_GPIO(PTU5),
-+	PINMUX_GPIO(PTU4),
-+	PINMUX_GPIO(PTU3),
-+	PINMUX_GPIO(PTU2),
-+	PINMUX_GPIO(PTU1),
-+	PINMUX_GPIO(PTU0),
- 
- 	/* PTV */
--	PINMUX_GPIO(GPIO_PTV7, PTV7_DATA),
--	PINMUX_GPIO(GPIO_PTV6, PTV6_DATA),
--	PINMUX_GPIO(GPIO_PTV5, PTV5_DATA),
--	PINMUX_GPIO(GPIO_PTV4, PTV4_DATA),
--	PINMUX_GPIO(GPIO_PTV3, PTV3_DATA),
--	PINMUX_GPIO(GPIO_PTV2, PTV2_DATA),
--	PINMUX_GPIO(GPIO_PTV1, PTV1_DATA),
--	PINMUX_GPIO(GPIO_PTV0, PTV0_DATA),
-+	PINMUX_GPIO(PTV7),
-+	PINMUX_GPIO(PTV6),
-+	PINMUX_GPIO(PTV5),
-+	PINMUX_GPIO(PTV4),
-+	PINMUX_GPIO(PTV3),
-+	PINMUX_GPIO(PTV2),
-+	PINMUX_GPIO(PTV1),
-+	PINMUX_GPIO(PTV0),
- 
- 	/* PTW */
--	PINMUX_GPIO(GPIO_PTW7, PTW7_DATA),
--	PINMUX_GPIO(GPIO_PTW6, PTW6_DATA),
--	PINMUX_GPIO(GPIO_PTW5, PTW5_DATA),
--	PINMUX_GPIO(GPIO_PTW4, PTW4_DATA),
--	PINMUX_GPIO(GPIO_PTW3, PTW3_DATA),
--	PINMUX_GPIO(GPIO_PTW2, PTW2_DATA),
--	PINMUX_GPIO(GPIO_PTW1, PTW1_DATA),
--	PINMUX_GPIO(GPIO_PTW0, PTW0_DATA),
-+	PINMUX_GPIO(PTW7),
-+	PINMUX_GPIO(PTW6),
-+	PINMUX_GPIO(PTW5),
-+	PINMUX_GPIO(PTW4),
-+	PINMUX_GPIO(PTW3),
-+	PINMUX_GPIO(PTW2),
-+	PINMUX_GPIO(PTW1),
-+	PINMUX_GPIO(PTW0),
- 
- 	/* PTX */
--	PINMUX_GPIO(GPIO_PTX7, PTX7_DATA),
--	PINMUX_GPIO(GPIO_PTX6, PTX6_DATA),
--	PINMUX_GPIO(GPIO_PTX5, PTX5_DATA),
--	PINMUX_GPIO(GPIO_PTX4, PTX4_DATA),
--	PINMUX_GPIO(GPIO_PTX3, PTX3_DATA),
--	PINMUX_GPIO(GPIO_PTX2, PTX2_DATA),
--	PINMUX_GPIO(GPIO_PTX1, PTX1_DATA),
--	PINMUX_GPIO(GPIO_PTX0, PTX0_DATA),
-+	PINMUX_GPIO(PTX7),
-+	PINMUX_GPIO(PTX6),
-+	PINMUX_GPIO(PTX5),
-+	PINMUX_GPIO(PTX4),
-+	PINMUX_GPIO(PTX3),
-+	PINMUX_GPIO(PTX2),
-+	PINMUX_GPIO(PTX1),
-+	PINMUX_GPIO(PTX0),
- 
- 	/* PTY */
--	PINMUX_GPIO(GPIO_PTY7, PTY7_DATA),
--	PINMUX_GPIO(GPIO_PTY6, PTY6_DATA),
--	PINMUX_GPIO(GPIO_PTY5, PTY5_DATA),
--	PINMUX_GPIO(GPIO_PTY4, PTY4_DATA),
--	PINMUX_GPIO(GPIO_PTY3, PTY3_DATA),
--	PINMUX_GPIO(GPIO_PTY2, PTY2_DATA),
--	PINMUX_GPIO(GPIO_PTY1, PTY1_DATA),
--	PINMUX_GPIO(GPIO_PTY0, PTY0_DATA),
-+	PINMUX_GPIO(PTY7),
-+	PINMUX_GPIO(PTY6),
-+	PINMUX_GPIO(PTY5),
-+	PINMUX_GPIO(PTY4),
-+	PINMUX_GPIO(PTY3),
-+	PINMUX_GPIO(PTY2),
-+	PINMUX_GPIO(PTY1),
-+	PINMUX_GPIO(PTY0),
- 
- 	/* PTZ */
--	PINMUX_GPIO(GPIO_PTZ7, PTZ7_DATA),
--	PINMUX_GPIO(GPIO_PTZ6, PTZ6_DATA),
--	PINMUX_GPIO(GPIO_PTZ5, PTZ5_DATA),
--	PINMUX_GPIO(GPIO_PTZ4, PTZ4_DATA),
--	PINMUX_GPIO(GPIO_PTZ3, PTZ3_DATA),
--	PINMUX_GPIO(GPIO_PTZ2, PTZ2_DATA),
--	PINMUX_GPIO(GPIO_PTZ1, PTZ1_DATA),
--	PINMUX_GPIO(GPIO_PTZ0, PTZ0_DATA),
-+	PINMUX_GPIO(PTZ7),
-+	PINMUX_GPIO(PTZ6),
-+	PINMUX_GPIO(PTZ5),
-+	PINMUX_GPIO(PTZ4),
-+	PINMUX_GPIO(PTZ3),
-+	PINMUX_GPIO(PTZ2),
-+	PINMUX_GPIO(PTZ1),
-+	PINMUX_GPIO(PTZ0),
- };
- 
- #define PINMUX_FN_BASE	ARRAY_SIZE(pinmux_pins)
-diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7785.c b/drivers/pinctrl/sh-pfc/pfc-sh7785.c
-index 209289c8..517eb49d 100644
---- a/drivers/pinctrl/sh-pfc/pfc-sh7785.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-sh7785.c
-@@ -673,147 +673,147 @@ static const u16 pinmux_data[] = {
- 
- static struct sh_pfc_pin pinmux_pins[] = {
- 	/* PA */
--	PINMUX_GPIO(GPIO_PA7, PA7_DATA),
--	PINMUX_GPIO(GPIO_PA6, PA6_DATA),
--	PINMUX_GPIO(GPIO_PA5, PA5_DATA),
--	PINMUX_GPIO(GPIO_PA4, PA4_DATA),
--	PINMUX_GPIO(GPIO_PA3, PA3_DATA),
--	PINMUX_GPIO(GPIO_PA2, PA2_DATA),
--	PINMUX_GPIO(GPIO_PA1, PA1_DATA),
--	PINMUX_GPIO(GPIO_PA0, PA0_DATA),
-+	PINMUX_GPIO(PA7),
-+	PINMUX_GPIO(PA6),
-+	PINMUX_GPIO(PA5),
-+	PINMUX_GPIO(PA4),
-+	PINMUX_GPIO(PA3),
-+	PINMUX_GPIO(PA2),
-+	PINMUX_GPIO(PA1),
-+	PINMUX_GPIO(PA0),
- 
- 	/* PB */
--	PINMUX_GPIO(GPIO_PB7, PB7_DATA),
--	PINMUX_GPIO(GPIO_PB6, PB6_DATA),
--	PINMUX_GPIO(GPIO_PB5, PB5_DATA),
--	PINMUX_GPIO(GPIO_PB4, PB4_DATA),
--	PINMUX_GPIO(GPIO_PB3, PB3_DATA),
--	PINMUX_GPIO(GPIO_PB2, PB2_DATA),
--	PINMUX_GPIO(GPIO_PB1, PB1_DATA),
--	PINMUX_GPIO(GPIO_PB0, PB0_DATA),
-+	PINMUX_GPIO(PB7),
-+	PINMUX_GPIO(PB6),
-+	PINMUX_GPIO(PB5),
-+	PINMUX_GPIO(PB4),
-+	PINMUX_GPIO(PB3),
-+	PINMUX_GPIO(PB2),
-+	PINMUX_GPIO(PB1),
-+	PINMUX_GPIO(PB0),
- 
- 	/* PC */
--	PINMUX_GPIO(GPIO_PC7, PC7_DATA),
--	PINMUX_GPIO(GPIO_PC6, PC6_DATA),
--	PINMUX_GPIO(GPIO_PC5, PC5_DATA),
--	PINMUX_GPIO(GPIO_PC4, PC4_DATA),
--	PINMUX_GPIO(GPIO_PC3, PC3_DATA),
--	PINMUX_GPIO(GPIO_PC2, PC2_DATA),
--	PINMUX_GPIO(GPIO_PC1, PC1_DATA),
--	PINMUX_GPIO(GPIO_PC0, PC0_DATA),
-+	PINMUX_GPIO(PC7),
-+	PINMUX_GPIO(PC6),
-+	PINMUX_GPIO(PC5),
-+	PINMUX_GPIO(PC4),
-+	PINMUX_GPIO(PC3),
-+	PINMUX_GPIO(PC2),
-+	PINMUX_GPIO(PC1),
-+	PINMUX_GPIO(PC0),
- 
- 	/* PD */
--	PINMUX_GPIO(GPIO_PD7, PD7_DATA),
--	PINMUX_GPIO(GPIO_PD6, PD6_DATA),
--	PINMUX_GPIO(GPIO_PD5, PD5_DATA),
--	PINMUX_GPIO(GPIO_PD4, PD4_DATA),
--	PINMUX_GPIO(GPIO_PD3, PD3_DATA),
--	PINMUX_GPIO(GPIO_PD2, PD2_DATA),
--	PINMUX_GPIO(GPIO_PD1, PD1_DATA),
--	PINMUX_GPIO(GPIO_PD0, PD0_DATA),
-+	PINMUX_GPIO(PD7),
-+	PINMUX_GPIO(PD6),
-+	PINMUX_GPIO(PD5),
-+	PINMUX_GPIO(PD4),
-+	PINMUX_GPIO(PD3),
-+	PINMUX_GPIO(PD2),
-+	PINMUX_GPIO(PD1),
-+	PINMUX_GPIO(PD0),
- 
- 	/* PE */
--	PINMUX_GPIO(GPIO_PE5, PE5_DATA),
--	PINMUX_GPIO(GPIO_PE4, PE4_DATA),
--	PINMUX_GPIO(GPIO_PE3, PE3_DATA),
--	PINMUX_GPIO(GPIO_PE2, PE2_DATA),
--	PINMUX_GPIO(GPIO_PE1, PE1_DATA),
--	PINMUX_GPIO(GPIO_PE0, PE0_DATA),
-+	PINMUX_GPIO(PE5),
-+	PINMUX_GPIO(PE4),
-+	PINMUX_GPIO(PE3),
-+	PINMUX_GPIO(PE2),
-+	PINMUX_GPIO(PE1),
-+	PINMUX_GPIO(PE0),
- 
- 	/* PF */
--	PINMUX_GPIO(GPIO_PF7, PF7_DATA),
--	PINMUX_GPIO(GPIO_PF6, PF6_DATA),
--	PINMUX_GPIO(GPIO_PF5, PF5_DATA),
--	PINMUX_GPIO(GPIO_PF4, PF4_DATA),
--	PINMUX_GPIO(GPIO_PF3, PF3_DATA),
--	PINMUX_GPIO(GPIO_PF2, PF2_DATA),
--	PINMUX_GPIO(GPIO_PF1, PF1_DATA),
--	PINMUX_GPIO(GPIO_PF0, PF0_DATA),
-+	PINMUX_GPIO(PF7),
-+	PINMUX_GPIO(PF6),
-+	PINMUX_GPIO(PF5),
-+	PINMUX_GPIO(PF4),
-+	PINMUX_GPIO(PF3),
-+	PINMUX_GPIO(PF2),
-+	PINMUX_GPIO(PF1),
-+	PINMUX_GPIO(PF0),
- 
- 	/* PG */
--	PINMUX_GPIO(GPIO_PG7, PG7_DATA),
--	PINMUX_GPIO(GPIO_PG6, PG6_DATA),
--	PINMUX_GPIO(GPIO_PG5, PG5_DATA),
--	PINMUX_GPIO(GPIO_PG4, PG4_DATA),
--	PINMUX_GPIO(GPIO_PG3, PG3_DATA),
--	PINMUX_GPIO(GPIO_PG2, PG2_DATA),
--	PINMUX_GPIO(GPIO_PG1, PG1_DATA),
--	PINMUX_GPIO(GPIO_PG0, PG0_DATA),
-+	PINMUX_GPIO(PG7),
-+	PINMUX_GPIO(PG6),
-+	PINMUX_GPIO(PG5),
-+	PINMUX_GPIO(PG4),
-+	PINMUX_GPIO(PG3),
-+	PINMUX_GPIO(PG2),
-+	PINMUX_GPIO(PG1),
-+	PINMUX_GPIO(PG0),
- 
- 	/* PH */
--	PINMUX_GPIO(GPIO_PH7, PH7_DATA),
--	PINMUX_GPIO(GPIO_PH6, PH6_DATA),
--	PINMUX_GPIO(GPIO_PH5, PH5_DATA),
--	PINMUX_GPIO(GPIO_PH4, PH4_DATA),
--	PINMUX_GPIO(GPIO_PH3, PH3_DATA),
--	PINMUX_GPIO(GPIO_PH2, PH2_DATA),
--	PINMUX_GPIO(GPIO_PH1, PH1_DATA),
--	PINMUX_GPIO(GPIO_PH0, PH0_DATA),
-+	PINMUX_GPIO(PH7),
-+	PINMUX_GPIO(PH6),
-+	PINMUX_GPIO(PH5),
-+	PINMUX_GPIO(PH4),
-+	PINMUX_GPIO(PH3),
-+	PINMUX_GPIO(PH2),
-+	PINMUX_GPIO(PH1),
-+	PINMUX_GPIO(PH0),
- 
- 	/* PJ */
--	PINMUX_GPIO(GPIO_PJ7, PJ7_DATA),
--	PINMUX_GPIO(GPIO_PJ6, PJ6_DATA),
--	PINMUX_GPIO(GPIO_PJ5, PJ5_DATA),
--	PINMUX_GPIO(GPIO_PJ4, PJ4_DATA),
--	PINMUX_GPIO(GPIO_PJ3, PJ3_DATA),
--	PINMUX_GPIO(GPIO_PJ2, PJ2_DATA),
--	PINMUX_GPIO(GPIO_PJ1, PJ1_DATA),
--	PINMUX_GPIO(GPIO_PJ0, PJ0_DATA),
-+	PINMUX_GPIO(PJ7),
-+	PINMUX_GPIO(PJ6),
-+	PINMUX_GPIO(PJ5),
-+	PINMUX_GPIO(PJ4),
-+	PINMUX_GPIO(PJ3),
-+	PINMUX_GPIO(PJ2),
-+	PINMUX_GPIO(PJ1),
-+	PINMUX_GPIO(PJ0),
- 
- 	/* PK */
--	PINMUX_GPIO(GPIO_PK7, PK7_DATA),
--	PINMUX_GPIO(GPIO_PK6, PK6_DATA),
--	PINMUX_GPIO(GPIO_PK5, PK5_DATA),
--	PINMUX_GPIO(GPIO_PK4, PK4_DATA),
--	PINMUX_GPIO(GPIO_PK3, PK3_DATA),
--	PINMUX_GPIO(GPIO_PK2, PK2_DATA),
--	PINMUX_GPIO(GPIO_PK1, PK1_DATA),
--	PINMUX_GPIO(GPIO_PK0, PK0_DATA),
-+	PINMUX_GPIO(PK7),
-+	PINMUX_GPIO(PK6),
-+	PINMUX_GPIO(PK5),
-+	PINMUX_GPIO(PK4),
-+	PINMUX_GPIO(PK3),
-+	PINMUX_GPIO(PK2),
-+	PINMUX_GPIO(PK1),
-+	PINMUX_GPIO(PK0),
- 
- 	/* PL */
--	PINMUX_GPIO(GPIO_PL7, PL7_DATA),
--	PINMUX_GPIO(GPIO_PL6, PL6_DATA),
--	PINMUX_GPIO(GPIO_PL5, PL5_DATA),
--	PINMUX_GPIO(GPIO_PL4, PL4_DATA),
--	PINMUX_GPIO(GPIO_PL3, PL3_DATA),
--	PINMUX_GPIO(GPIO_PL2, PL2_DATA),
--	PINMUX_GPIO(GPIO_PL1, PL1_DATA),
--	PINMUX_GPIO(GPIO_PL0, PL0_DATA),
-+	PINMUX_GPIO(PL7),
-+	PINMUX_GPIO(PL6),
-+	PINMUX_GPIO(PL5),
-+	PINMUX_GPIO(PL4),
-+	PINMUX_GPIO(PL3),
-+	PINMUX_GPIO(PL2),
-+	PINMUX_GPIO(PL1),
-+	PINMUX_GPIO(PL0),
- 
- 	/* PM */
--	PINMUX_GPIO(GPIO_PM1, PM1_DATA),
--	PINMUX_GPIO(GPIO_PM0, PM0_DATA),
-+	PINMUX_GPIO(PM1),
-+	PINMUX_GPIO(PM0),
- 
- 	/* PN */
--	PINMUX_GPIO(GPIO_PN7, PN7_DATA),
--	PINMUX_GPIO(GPIO_PN6, PN6_DATA),
--	PINMUX_GPIO(GPIO_PN5, PN5_DATA),
--	PINMUX_GPIO(GPIO_PN4, PN4_DATA),
--	PINMUX_GPIO(GPIO_PN3, PN3_DATA),
--	PINMUX_GPIO(GPIO_PN2, PN2_DATA),
--	PINMUX_GPIO(GPIO_PN1, PN1_DATA),
--	PINMUX_GPIO(GPIO_PN0, PN0_DATA),
-+	PINMUX_GPIO(PN7),
-+	PINMUX_GPIO(PN6),
-+	PINMUX_GPIO(PN5),
-+	PINMUX_GPIO(PN4),
-+	PINMUX_GPIO(PN3),
-+	PINMUX_GPIO(PN2),
-+	PINMUX_GPIO(PN1),
-+	PINMUX_GPIO(PN0),
- 
- 	/* PP */
--	PINMUX_GPIO(GPIO_PP5, PP5_DATA),
--	PINMUX_GPIO(GPIO_PP4, PP4_DATA),
--	PINMUX_GPIO(GPIO_PP3, PP3_DATA),
--	PINMUX_GPIO(GPIO_PP2, PP2_DATA),
--	PINMUX_GPIO(GPIO_PP1, PP1_DATA),
--	PINMUX_GPIO(GPIO_PP0, PP0_DATA),
-+	PINMUX_GPIO(PP5),
-+	PINMUX_GPIO(PP4),
-+	PINMUX_GPIO(PP3),
-+	PINMUX_GPIO(PP2),
-+	PINMUX_GPIO(PP1),
-+	PINMUX_GPIO(PP0),
- 
- 	/* PQ */
--	PINMUX_GPIO(GPIO_PQ4, PQ4_DATA),
--	PINMUX_GPIO(GPIO_PQ3, PQ3_DATA),
--	PINMUX_GPIO(GPIO_PQ2, PQ2_DATA),
--	PINMUX_GPIO(GPIO_PQ1, PQ1_DATA),
--	PINMUX_GPIO(GPIO_PQ0, PQ0_DATA),
-+	PINMUX_GPIO(PQ4),
-+	PINMUX_GPIO(PQ3),
-+	PINMUX_GPIO(PQ2),
-+	PINMUX_GPIO(PQ1),
-+	PINMUX_GPIO(PQ0),
- 
- 	/* PR */
--	PINMUX_GPIO(GPIO_PR3, PR3_DATA),
--	PINMUX_GPIO(GPIO_PR2, PR2_DATA),
--	PINMUX_GPIO(GPIO_PR1, PR1_DATA),
--	PINMUX_GPIO(GPIO_PR0, PR0_DATA),
-+	PINMUX_GPIO(PR3),
-+	PINMUX_GPIO(PR2),
-+	PINMUX_GPIO(PR1),
-+	PINMUX_GPIO(PR0),
- };
- 
- #define PINMUX_FN_BASE	ARRAY_SIZE(pinmux_pins)
-diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7786.c b/drivers/pinctrl/sh-pfc/pfc-sh7786.c
-index 353fde1f..623345fa 100644
---- a/drivers/pinctrl/sh-pfc/pfc-sh7786.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-sh7786.c
-@@ -409,82 +409,82 @@ static const u16 pinmux_data[] = {
- 
- static struct sh_pfc_pin pinmux_pins[] = {
- 	/* PA */
--	PINMUX_GPIO(GPIO_PA7, PA7_DATA),
--	PINMUX_GPIO(GPIO_PA6, PA6_DATA),
--	PINMUX_GPIO(GPIO_PA5, PA5_DATA),
--	PINMUX_GPIO(GPIO_PA4, PA4_DATA),
--	PINMUX_GPIO(GPIO_PA3, PA3_DATA),
--	PINMUX_GPIO(GPIO_PA2, PA2_DATA),
--	PINMUX_GPIO(GPIO_PA1, PA1_DATA),
--	PINMUX_GPIO(GPIO_PA0, PA0_DATA),
-+	PINMUX_GPIO(PA7),
-+	PINMUX_GPIO(PA6),
-+	PINMUX_GPIO(PA5),
-+	PINMUX_GPIO(PA4),
-+	PINMUX_GPIO(PA3),
-+	PINMUX_GPIO(PA2),
-+	PINMUX_GPIO(PA1),
-+	PINMUX_GPIO(PA0),
- 
- 	/* PB */
--	PINMUX_GPIO(GPIO_PB7, PB7_DATA),
--	PINMUX_GPIO(GPIO_PB6, PB6_DATA),
--	PINMUX_GPIO(GPIO_PB5, PB5_DATA),
--	PINMUX_GPIO(GPIO_PB4, PB4_DATA),
--	PINMUX_GPIO(GPIO_PB3, PB3_DATA),
--	PINMUX_GPIO(GPIO_PB2, PB2_DATA),
--	PINMUX_GPIO(GPIO_PB1, PB1_DATA),
--	PINMUX_GPIO(GPIO_PB0, PB0_DATA),
-+	PINMUX_GPIO(PB7),
-+	PINMUX_GPIO(PB6),
-+	PINMUX_GPIO(PB5),
-+	PINMUX_GPIO(PB4),
-+	PINMUX_GPIO(PB3),
-+	PINMUX_GPIO(PB2),
-+	PINMUX_GPIO(PB1),
-+	PINMUX_GPIO(PB0),
- 
- 	/* PC */
--	PINMUX_GPIO(GPIO_PC7, PC7_DATA),
--	PINMUX_GPIO(GPIO_PC6, PC6_DATA),
--	PINMUX_GPIO(GPIO_PC5, PC5_DATA),
--	PINMUX_GPIO(GPIO_PC4, PC4_DATA),
--	PINMUX_GPIO(GPIO_PC3, PC3_DATA),
--	PINMUX_GPIO(GPIO_PC2, PC2_DATA),
--	PINMUX_GPIO(GPIO_PC1, PC1_DATA),
--	PINMUX_GPIO(GPIO_PC0, PC0_DATA),
-+	PINMUX_GPIO(PC7),
-+	PINMUX_GPIO(PC6),
-+	PINMUX_GPIO(PC5),
-+	PINMUX_GPIO(PC4),
-+	PINMUX_GPIO(PC3),
-+	PINMUX_GPIO(PC2),
-+	PINMUX_GPIO(PC1),
-+	PINMUX_GPIO(PC0),
- 
- 	/* PD */
--	PINMUX_GPIO(GPIO_PD7, PD7_DATA),
--	PINMUX_GPIO(GPIO_PD6, PD6_DATA),
--	PINMUX_GPIO(GPIO_PD5, PD5_DATA),
--	PINMUX_GPIO(GPIO_PD4, PD4_DATA),
--	PINMUX_GPIO(GPIO_PD3, PD3_DATA),
--	PINMUX_GPIO(GPIO_PD2, PD2_DATA),
--	PINMUX_GPIO(GPIO_PD1, PD1_DATA),
--	PINMUX_GPIO(GPIO_PD0, PD0_DATA),
-+	PINMUX_GPIO(PD7),
-+	PINMUX_GPIO(PD6),
-+	PINMUX_GPIO(PD5),
-+	PINMUX_GPIO(PD4),
-+	PINMUX_GPIO(PD3),
-+	PINMUX_GPIO(PD2),
-+	PINMUX_GPIO(PD1),
-+	PINMUX_GPIO(PD0),
- 
- 	/* PE */
--	PINMUX_GPIO(GPIO_PE7, PE7_DATA),
--	PINMUX_GPIO(GPIO_PE6, PE6_DATA),
-+	PINMUX_GPIO(PE7),
-+	PINMUX_GPIO(PE6),
- 
- 	/* PF */
--	PINMUX_GPIO(GPIO_PF7, PF7_DATA),
--	PINMUX_GPIO(GPIO_PF6, PF6_DATA),
--	PINMUX_GPIO(GPIO_PF5, PF5_DATA),
--	PINMUX_GPIO(GPIO_PF4, PF4_DATA),
--	PINMUX_GPIO(GPIO_PF3, PF3_DATA),
--	PINMUX_GPIO(GPIO_PF2, PF2_DATA),
--	PINMUX_GPIO(GPIO_PF1, PF1_DATA),
--	PINMUX_GPIO(GPIO_PF0, PF0_DATA),
-+	PINMUX_GPIO(PF7),
-+	PINMUX_GPIO(PF6),
-+	PINMUX_GPIO(PF5),
-+	PINMUX_GPIO(PF4),
-+	PINMUX_GPIO(PF3),
-+	PINMUX_GPIO(PF2),
-+	PINMUX_GPIO(PF1),
-+	PINMUX_GPIO(PF0),
- 
- 	/* PG */
--	PINMUX_GPIO(GPIO_PG7, PG7_DATA),
--	PINMUX_GPIO(GPIO_PG6, PG6_DATA),
--	PINMUX_GPIO(GPIO_PG5, PG5_DATA),
-+	PINMUX_GPIO(PG7),
-+	PINMUX_GPIO(PG6),
-+	PINMUX_GPIO(PG5),
- 
- 	/* PH */
--	PINMUX_GPIO(GPIO_PH7, PH7_DATA),
--	PINMUX_GPIO(GPIO_PH6, PH6_DATA),
--	PINMUX_GPIO(GPIO_PH5, PH5_DATA),
--	PINMUX_GPIO(GPIO_PH4, PH4_DATA),
--	PINMUX_GPIO(GPIO_PH3, PH3_DATA),
--	PINMUX_GPIO(GPIO_PH2, PH2_DATA),
--	PINMUX_GPIO(GPIO_PH1, PH1_DATA),
--	PINMUX_GPIO(GPIO_PH0, PH0_DATA),
-+	PINMUX_GPIO(PH7),
-+	PINMUX_GPIO(PH6),
-+	PINMUX_GPIO(PH5),
-+	PINMUX_GPIO(PH4),
-+	PINMUX_GPIO(PH3),
-+	PINMUX_GPIO(PH2),
-+	PINMUX_GPIO(PH1),
-+	PINMUX_GPIO(PH0),
- 
- 	/* PJ */
--	PINMUX_GPIO(GPIO_PJ7, PJ7_DATA),
--	PINMUX_GPIO(GPIO_PJ6, PJ6_DATA),
--	PINMUX_GPIO(GPIO_PJ5, PJ5_DATA),
--	PINMUX_GPIO(GPIO_PJ4, PJ4_DATA),
--	PINMUX_GPIO(GPIO_PJ3, PJ3_DATA),
--	PINMUX_GPIO(GPIO_PJ2, PJ2_DATA),
--	PINMUX_GPIO(GPIO_PJ1, PJ1_DATA),
-+	PINMUX_GPIO(PJ7),
-+	PINMUX_GPIO(PJ6),
-+	PINMUX_GPIO(PJ5),
-+	PINMUX_GPIO(PJ4),
-+	PINMUX_GPIO(PJ3),
-+	PINMUX_GPIO(PJ2),
-+	PINMUX_GPIO(PJ1),
- };
- 
- #define PINMUX_FN_BASE	ARRAY_SIZE(pinmux_pins)
-diff --git a/drivers/pinctrl/sh-pfc/pfc-shx3.c b/drivers/pinctrl/sh-pfc/pfc-shx3.c
-index 775a622b..55262bd8 100644
---- a/drivers/pinctrl/sh-pfc/pfc-shx3.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-shx3.c
-@@ -287,82 +287,82 @@ static const u16 pinmux_data[] = {
- 
- static struct sh_pfc_pin pinmux_pins[] = {
- 	/* PA */
--	PINMUX_GPIO(GPIO_PA7, PA7_DATA),
--	PINMUX_GPIO(GPIO_PA6, PA6_DATA),
--	PINMUX_GPIO(GPIO_PA5, PA5_DATA),
--	PINMUX_GPIO(GPIO_PA4, PA4_DATA),
--	PINMUX_GPIO(GPIO_PA3, PA3_DATA),
--	PINMUX_GPIO(GPIO_PA2, PA2_DATA),
--	PINMUX_GPIO(GPIO_PA1, PA1_DATA),
--	PINMUX_GPIO(GPIO_PA0, PA0_DATA),
-+	PINMUX_GPIO(PA7),
-+	PINMUX_GPIO(PA6),
-+	PINMUX_GPIO(PA5),
-+	PINMUX_GPIO(PA4),
-+	PINMUX_GPIO(PA3),
-+	PINMUX_GPIO(PA2),
-+	PINMUX_GPIO(PA1),
-+	PINMUX_GPIO(PA0),
- 
- 	/* PB */
--	PINMUX_GPIO(GPIO_PB7, PB7_DATA),
--	PINMUX_GPIO(GPIO_PB6, PB6_DATA),
--	PINMUX_GPIO(GPIO_PB5, PB5_DATA),
--	PINMUX_GPIO(GPIO_PB4, PB4_DATA),
--	PINMUX_GPIO(GPIO_PB3, PB3_DATA),
--	PINMUX_GPIO(GPIO_PB2, PB2_DATA),
--	PINMUX_GPIO(GPIO_PB1, PB1_DATA),
--	PINMUX_GPIO(GPIO_PB0, PB0_DATA),
-+	PINMUX_GPIO(PB7),
-+	PINMUX_GPIO(PB6),
-+	PINMUX_GPIO(PB5),
-+	PINMUX_GPIO(PB4),
-+	PINMUX_GPIO(PB3),
-+	PINMUX_GPIO(PB2),
-+	PINMUX_GPIO(PB1),
-+	PINMUX_GPIO(PB0),
- 
- 	/* PC */
--	PINMUX_GPIO(GPIO_PC7, PC7_DATA),
--	PINMUX_GPIO(GPIO_PC6, PC6_DATA),
--	PINMUX_GPIO(GPIO_PC5, PC5_DATA),
--	PINMUX_GPIO(GPIO_PC4, PC4_DATA),
--	PINMUX_GPIO(GPIO_PC3, PC3_DATA),
--	PINMUX_GPIO(GPIO_PC2, PC2_DATA),
--	PINMUX_GPIO(GPIO_PC1, PC1_DATA),
--	PINMUX_GPIO(GPIO_PC0, PC0_DATA),
-+	PINMUX_GPIO(PC7),
-+	PINMUX_GPIO(PC6),
-+	PINMUX_GPIO(PC5),
-+	PINMUX_GPIO(PC4),
-+	PINMUX_GPIO(PC3),
-+	PINMUX_GPIO(PC2),
-+	PINMUX_GPIO(PC1),
-+	PINMUX_GPIO(PC0),
- 
- 	/* PD */
--	PINMUX_GPIO(GPIO_PD7, PD7_DATA),
--	PINMUX_GPIO(GPIO_PD6, PD6_DATA),
--	PINMUX_GPIO(GPIO_PD5, PD5_DATA),
--	PINMUX_GPIO(GPIO_PD4, PD4_DATA),
--	PINMUX_GPIO(GPIO_PD3, PD3_DATA),
--	PINMUX_GPIO(GPIO_PD2, PD2_DATA),
--	PINMUX_GPIO(GPIO_PD1, PD1_DATA),
--	PINMUX_GPIO(GPIO_PD0, PD0_DATA),
-+	PINMUX_GPIO(PD7),
-+	PINMUX_GPIO(PD6),
-+	PINMUX_GPIO(PD5),
-+	PINMUX_GPIO(PD4),
-+	PINMUX_GPIO(PD3),
-+	PINMUX_GPIO(PD2),
-+	PINMUX_GPIO(PD1),
-+	PINMUX_GPIO(PD0),
- 
- 	/* PE */
--	PINMUX_GPIO(GPIO_PE7, PE7_DATA),
--	PINMUX_GPIO(GPIO_PE6, PE6_DATA),
--	PINMUX_GPIO(GPIO_PE5, PE5_DATA),
--	PINMUX_GPIO(GPIO_PE4, PE4_DATA),
--	PINMUX_GPIO(GPIO_PE3, PE3_DATA),
--	PINMUX_GPIO(GPIO_PE2, PE2_DATA),
--	PINMUX_GPIO(GPIO_PE1, PE1_DATA),
--	PINMUX_GPIO(GPIO_PE0, PE0_DATA),
-+	PINMUX_GPIO(PE7),
-+	PINMUX_GPIO(PE6),
-+	PINMUX_GPIO(PE5),
-+	PINMUX_GPIO(PE4),
-+	PINMUX_GPIO(PE3),
-+	PINMUX_GPIO(PE2),
-+	PINMUX_GPIO(PE1),
-+	PINMUX_GPIO(PE0),
- 
- 	/* PF */
--	PINMUX_GPIO(GPIO_PF7, PF7_DATA),
--	PINMUX_GPIO(GPIO_PF6, PF6_DATA),
--	PINMUX_GPIO(GPIO_PF5, PF5_DATA),
--	PINMUX_GPIO(GPIO_PF4, PF4_DATA),
--	PINMUX_GPIO(GPIO_PF3, PF3_DATA),
--	PINMUX_GPIO(GPIO_PF2, PF2_DATA),
--	PINMUX_GPIO(GPIO_PF1, PF1_DATA),
--	PINMUX_GPIO(GPIO_PF0, PF0_DATA),
-+	PINMUX_GPIO(PF7),
-+	PINMUX_GPIO(PF6),
-+	PINMUX_GPIO(PF5),
-+	PINMUX_GPIO(PF4),
-+	PINMUX_GPIO(PF3),
-+	PINMUX_GPIO(PF2),
-+	PINMUX_GPIO(PF1),
-+	PINMUX_GPIO(PF0),
- 
- 	/* PG */
--	PINMUX_GPIO(GPIO_PG7, PG7_DATA),
--	PINMUX_GPIO(GPIO_PG6, PG6_DATA),
--	PINMUX_GPIO(GPIO_PG5, PG5_DATA),
--	PINMUX_GPIO(GPIO_PG4, PG4_DATA),
--	PINMUX_GPIO(GPIO_PG3, PG3_DATA),
--	PINMUX_GPIO(GPIO_PG2, PG2_DATA),
--	PINMUX_GPIO(GPIO_PG1, PG1_DATA),
--	PINMUX_GPIO(GPIO_PG0, PG0_DATA),
-+	PINMUX_GPIO(PG7),
-+	PINMUX_GPIO(PG6),
-+	PINMUX_GPIO(PG5),
-+	PINMUX_GPIO(PG4),
-+	PINMUX_GPIO(PG3),
-+	PINMUX_GPIO(PG2),
-+	PINMUX_GPIO(PG1),
-+	PINMUX_GPIO(PG0),
- 
- 	/* PH */
--	PINMUX_GPIO(GPIO_PH5, PH5_DATA),
--	PINMUX_GPIO(GPIO_PH4, PH4_DATA),
--	PINMUX_GPIO(GPIO_PH3, PH3_DATA),
--	PINMUX_GPIO(GPIO_PH2, PH2_DATA),
--	PINMUX_GPIO(GPIO_PH1, PH1_DATA),
--	PINMUX_GPIO(GPIO_PH0, PH0_DATA),
-+	PINMUX_GPIO(PH5),
-+	PINMUX_GPIO(PH4),
-+	PINMUX_GPIO(PH3),
-+	PINMUX_GPIO(PH2),
-+	PINMUX_GPIO(PH1),
-+	PINMUX_GPIO(PH0),
- };
- 
- #define PINMUX_FN_BASE	ARRAY_SIZE(pinmux_pins)
-diff --git a/drivers/pinctrl/sh-pfc/sh_pfc.h b/drivers/pinctrl/sh-pfc/sh_pfc.h
-index 05b905fa..61205fbf 100644
---- a/drivers/pinctrl/sh-pfc/sh_pfc.h
-+++ b/drivers/pinctrl/sh-pfc/sh_pfc.h
-@@ -250,10 +250,10 @@ struct sh_pfc_soc_info {
- #define PORT_ALL(str)			CPU_ALL_PORT(_PORT_ALL, PORT, str)
- 
- /* PINMUX_GPIO - Expand to a sh_pfc_pin entry */
--#define PINMUX_GPIO(gpio, data_or_mark)					\
--	[gpio] = {							\
--		.name = __stringify(gpio),				\
--		.enum_id = data_or_mark,				\
-+#define PINMUX_GPIO(pin)						\
-+	[GPIO_##pin] = {						\
-+		.name = __stringify(name),				\
-+		.enum_id = pin##_DATA,					\
- 	}
- 
- /* SH_PFC_PIN_CFG - Expand to a sh_pfc_pin entry (named PORT#) with config */
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0549-sh-pfc-Add-port-numbers-to-the-CPU_ALL_PORT-macro.patch b/patches.renesas/0549-sh-pfc-Add-port-numbers-to-the-CPU_ALL_PORT-macro.patch
deleted file mode 100644
index 5eb312ae22291..0000000000000
--- a/patches.renesas/0549-sh-pfc-Add-port-numbers-to-the-CPU_ALL_PORT-macro.patch
+++ /dev/null
@@ -1,316 +0,0 @@
-From 393b888bd96635f5309c1e5d414986ffd4056b5f Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 14 Feb 2013 00:24:32 +0100
-Subject: sh-pfc: Add port numbers to the CPU_ALL_PORT macro
-
-Pass down the port number down to the PORT_1 macro. The port number will
-be used to compute the pin ranges automatically.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
-(cherry picked from commit 16b915e4389ba8f55df31b03d9de973a3d014cf7)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a73a4.c | 124 +++++++++++++++++------------------
- drivers/pinctrl/sh-pfc/pfc-r8a7740.c |   8 +--
- drivers/pinctrl/sh-pfc/pfc-sh7372.c  |  14 ++--
- drivers/pinctrl/sh-pfc/pfc-sh73a0.c  |  52 +++++++--------
- drivers/pinctrl/sh-pfc/sh_pfc.h      |  30 ++++-----
- 5 files changed, 114 insertions(+), 114 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a73a4.c b/drivers/pinctrl/sh-pfc/pfc-r8a73a4.c
-index 288821b6..04ecb5e9 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a73a4.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a73a4.c
-@@ -28,78 +28,78 @@
- 
- #define CPU_ALL_PORT(fn, pfx, sfx)					\
- 	/*  Port0 - Port30 */						\
--	PORT_10(fn, pfx, sfx),						\
--	PORT_10(fn, pfx##1, sfx),					\
--	PORT_10(fn, pfx##2, sfx),					\
--	PORT_1(fn,  pfx##30, sfx),					\
-+	PORT_10(0, fn, pfx, sfx),					\
-+	PORT_10(10, fn, pfx##1, sfx),					\
-+	PORT_10(20, fn, pfx##2, sfx),					\
-+	PORT_1(30, fn, pfx##30, sfx),					\
- 	/* Port32 - Port40 */						\
--	PORT_1(fn,  pfx##32, sfx),	PORT_1(fn,  pfx##33, sfx),	\
--	PORT_1(fn,  pfx##34, sfx),	PORT_1(fn,  pfx##35, sfx),	\
--	PORT_1(fn,  pfx##36, sfx),	PORT_1(fn,  pfx##37, sfx),	\
--	PORT_1(fn,  pfx##38, sfx),	PORT_1(fn,  pfx##39, sfx),	\
--	PORT_1(fn,  pfx##40, sfx),					\
-+	PORT_1(32, fn, pfx##32, sfx),	PORT_1(33, fn, pfx##33, sfx),	\
-+	PORT_1(34, fn, pfx##34, sfx),	PORT_1(35, fn, pfx##35, sfx),	\
-+	PORT_1(36, fn, pfx##36, sfx),	PORT_1(37, fn, pfx##37, sfx),	\
-+	PORT_1(38, fn, pfx##38, sfx),	PORT_1(39, fn, pfx##39, sfx),	\
-+	PORT_1(40, fn, pfx##40, sfx),					\
- 	/* Port64  - Port85 */						\
--	PORT_1(fn, pfx##64, sfx),	PORT_1(fn, pfx##65, sfx),	\
--	PORT_1(fn, pfx##66, sfx),	PORT_1(fn, pfx##67, sfx),	\
--	PORT_1(fn, pfx##68, sfx),	PORT_1(fn, pfx##69, sfx),	\
--	PORT_10(fn, pfx##7, sfx),					\
--	PORT_1(fn, pfx##80, sfx),	PORT_1(fn, pfx##81, sfx),	\
--	PORT_1(fn, pfx##82, sfx),	PORT_1(fn, pfx##83, sfx),	\
--	PORT_1(fn, pfx##84, sfx),	PORT_1(fn, pfx##85, sfx),	\
-+	PORT_1(64, fn, pfx##64, sfx),	PORT_1(65, fn, pfx##65, sfx),	\
-+	PORT_1(66, fn, pfx##66, sfx),	PORT_1(67, fn, pfx##67, sfx),	\
-+	PORT_1(68, fn, pfx##68, sfx),	PORT_1(69, fn, pfx##69, sfx),	\
-+	PORT_10(70, fn, pfx##7, sfx),					\
-+	PORT_1(80, fn, pfx##80, sfx),	PORT_1(81, fn, pfx##81, sfx),	\
-+	PORT_1(82, fn, pfx##82, sfx),	PORT_1(83, fn, pfx##83, sfx),	\
-+	PORT_1(84, fn, pfx##84, sfx),	PORT_1(85, fn, pfx##85, sfx),	\
- 	/* Port96  - Port126 */						\
--	PORT_1(fn, pfx##96, sfx),	PORT_1(fn, pfx##97, sfx),	\
--	PORT_1(fn, pfx##98, sfx),	PORT_1(fn, pfx##99, sfx),	\
--	PORT_10(fn, pfx##10, sfx),					\
--	PORT_10(fn, pfx##11, sfx),					\
--	PORT_1(fn, pfx##120, sfx),	PORT_1(fn, pfx##121, sfx),	\
--	PORT_1(fn, pfx##122, sfx),	PORT_1(fn, pfx##123, sfx),	\
--	PORT_1(fn, pfx##124, sfx),	PORT_1(fn, pfx##125, sfx),	\
--	PORT_1(fn, pfx##126, sfx),					\
-+	PORT_1(96, fn, pfx##96, sfx),	PORT_1(97, fn, pfx##97, sfx),	\
-+	PORT_1(98, fn, pfx##98, sfx),	PORT_1(99, fn, pfx##99, sfx),	\
-+	PORT_10(100, fn, pfx##10, sfx),					\
-+	PORT_10(110, fn, pfx##11, sfx),					\
-+	PORT_1(120, fn, pfx##120, sfx),	PORT_1(121, fn, pfx##121, sfx),	\
-+	PORT_1(122, fn, pfx##122, sfx),	PORT_1(123, fn, pfx##123, sfx),	\
-+	PORT_1(124, fn, pfx##124, sfx),	PORT_1(125, fn, pfx##125, sfx),	\
-+	PORT_1(126, fn, pfx##126, sfx),					\
- 	/* Port128 - Port134 */						\
--	PORT_1(fn, pfx##128, sfx),	PORT_1(fn, pfx##129, sfx),	\
--	PORT_1(fn, pfx##130, sfx),	PORT_1(fn, pfx##131, sfx),	\
--	PORT_1(fn, pfx##132, sfx),	PORT_1(fn, pfx##133, sfx),	\
--	PORT_1(fn, pfx##134, sfx),					\
-+	PORT_1(128, fn, pfx##128, sfx),	PORT_1(129, fn, pfx##129, sfx),	\
-+	PORT_1(130, fn, pfx##130, sfx),	PORT_1(131, fn, pfx##131, sfx),	\
-+	PORT_1(132, fn, pfx##132, sfx),	PORT_1(133, fn, pfx##133, sfx),	\
-+	PORT_1(134, fn, pfx##134, sfx),					\
- 	/* Port160 - Port178 */						\
--	PORT_10(fn, pfx##16, sfx),					\
--	PORT_1(fn, pfx##170, sfx),	PORT_1(fn, pfx##171, sfx),	\
--	PORT_1(fn, pfx##172, sfx),	PORT_1(fn, pfx##173, sfx),	\
--	PORT_1(fn, pfx##174, sfx),	PORT_1(fn, pfx##175, sfx),	\
--	PORT_1(fn, pfx##176, sfx),	PORT_1(fn, pfx##177, sfx),	\
--	PORT_1(fn, pfx##178, sfx),					\
-+	PORT_10(160, fn, pfx##16, sfx),					\
-+	PORT_1(170, fn, pfx##170, sfx),	PORT_1(171, fn, pfx##171, sfx),	\
-+	PORT_1(172, fn, pfx##172, sfx),	PORT_1(173, fn, pfx##173, sfx),	\
-+	PORT_1(174, fn, pfx##174, sfx),	PORT_1(175, fn, pfx##175, sfx),	\
-+	PORT_1(176, fn, pfx##176, sfx),	PORT_1(177, fn, pfx##177, sfx),	\
-+	PORT_1(178, fn, pfx##178, sfx),					\
- 	/* Port192 - Port222 */						\
--	PORT_1(fn, pfx##192, sfx),	PORT_1(fn, pfx##193, sfx),	\
--	PORT_1(fn, pfx##194, sfx),	PORT_1(fn, pfx##195, sfx),	\
--	PORT_1(fn, pfx##196, sfx),	PORT_1(fn, pfx##197, sfx),	\
--	PORT_1(fn, pfx##198, sfx),	PORT_1(fn, pfx##199, sfx),	\
--	PORT_10(fn, pfx##20, sfx),					\
--	PORT_10(fn, pfx##21, sfx),					\
--	PORT_1(fn, pfx##220, sfx),	PORT_1(fn, pfx##221, sfx),	\
--	PORT_1(fn, pfx##222, sfx),					\
-+	PORT_1(192, fn, pfx##192, sfx),	PORT_1(193, fn, pfx##193, sfx),	\
-+	PORT_1(194, fn, pfx##194, sfx),	PORT_1(195, fn, pfx##195, sfx),	\
-+	PORT_1(196, fn, pfx##196, sfx),	PORT_1(197, fn, pfx##197, sfx),	\
-+	PORT_1(198, fn, pfx##198, sfx),	PORT_1(199, fn, pfx##199, sfx),	\
-+	PORT_10(200, fn, pfx##20, sfx),					\
-+	PORT_10(210, fn, pfx##21, sfx),					\
-+	PORT_1(220, fn, pfx##220, sfx),	PORT_1(221, fn, pfx##221, sfx),	\
-+	PORT_1(222, fn, pfx##222, sfx),					\
- 	/* Port224 - Port250 */						\
--	PORT_1(fn, pfx##224, sfx),	PORT_1(fn, pfx##225, sfx),	\
--	PORT_1(fn, pfx##226, sfx),	PORT_1(fn, pfx##227, sfx),	\
--	PORT_1(fn, pfx##228, sfx),	PORT_1(fn, pfx##229, sfx),	\
--	PORT_10(fn, pfx##23, sfx),					\
--	PORT_10(fn, pfx##24, sfx),					\
--	PORT_1(fn, pfx##250, sfx),					\
-+	PORT_1(224, fn, pfx##224, sfx),	PORT_1(225, fn, pfx##225, sfx),	\
-+	PORT_1(226, fn, pfx##226, sfx),	PORT_1(227, fn, pfx##227, sfx),	\
-+	PORT_1(228, fn, pfx##228, sfx),	PORT_1(229, fn, pfx##229, sfx),	\
-+	PORT_10(230, fn, pfx##23, sfx),					\
-+	PORT_10(240, fn, pfx##24, sfx),					\
-+	PORT_1(250, fn, pfx##250, sfx),					\
- 	/* Port256 - Port283 */						\
--	PORT_1(fn, pfx##256, sfx),	PORT_1(fn, pfx##257, sfx),	\
--	PORT_1(fn, pfx##258, sfx),	PORT_1(fn, pfx##259, sfx),	\
--	PORT_10(fn, pfx##26, sfx),					\
--	PORT_10(fn, pfx##27, sfx),					\
--	PORT_1(fn, pfx##280, sfx),	PORT_1(fn, pfx##281, sfx),	\
--	PORT_1(fn, pfx##282, sfx),	PORT_1(fn, pfx##283, sfx),	\
-+	PORT_1(256, fn, pfx##256, sfx),	PORT_1(257, fn, pfx##257, sfx),	\
-+	PORT_1(258, fn, pfx##258, sfx),	PORT_1(259, fn, pfx##259, sfx),	\
-+	PORT_10(260, fn, pfx##26, sfx),					\
-+	PORT_10(270, fn, pfx##27, sfx),					\
-+	PORT_1(280, fn, pfx##280, sfx),	PORT_1(281, fn, pfx##281, sfx),	\
-+	PORT_1(282, fn, pfx##282, sfx),	PORT_1(283, fn, pfx##283, sfx),	\
- 	/* Port288 - Port308 */						\
--	PORT_1(fn, pfx##288, sfx),	PORT_1(fn, pfx##289, sfx),	\
--	PORT_10(fn, pfx##29, sfx),					\
--	PORT_1(fn, pfx##300, sfx),	PORT_1(fn, pfx##301, sfx),	\
--	PORT_1(fn, pfx##302, sfx),	PORT_1(fn, pfx##303, sfx),	\
--	PORT_1(fn, pfx##304, sfx),	PORT_1(fn, pfx##305, sfx),	\
--	PORT_1(fn, pfx##306, sfx),	PORT_1(fn, pfx##307, sfx),	\
--	PORT_1(fn, pfx##308, sfx),					\
-+	PORT_1(288, fn, pfx##288, sfx),	PORT_1(289, fn, pfx##289, sfx),	\
-+	PORT_10(290, fn, pfx##29, sfx),					\
-+	PORT_1(300, fn, pfx##300, sfx),	PORT_1(301, fn, pfx##301, sfx),	\
-+	PORT_1(302, fn, pfx##302, sfx),	PORT_1(303, fn, pfx##303, sfx),	\
-+	PORT_1(304, fn, pfx##304, sfx),	PORT_1(305, fn, pfx##305, sfx),	\
-+	PORT_1(306, fn, pfx##306, sfx),	PORT_1(307, fn, pfx##307, sfx),	\
-+	PORT_1(308, fn, pfx##308, sfx),					\
- 	/* Port320 - Port329 */						\
--	PORT_10(fn, pfx##32, sfx)
-+	PORT_10(320, fn, pfx##32, sfx)
- 
- 
- enum {
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-index b5bc1d09..2c745368 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-@@ -29,10 +29,10 @@
- #include "sh_pfc.h"
- 
- #define CPU_ALL_PORT(fn, pfx, sfx)					\
--	PORT_10(fn, pfx, sfx),		PORT_90(fn, pfx, sfx),		\
--	PORT_10(fn, pfx##10, sfx),	PORT_90(fn, pfx##1, sfx),	\
--	PORT_10(fn, pfx##20, sfx),					\
--	PORT_1(fn, pfx##210, sfx),	PORT_1(fn, pfx##211, sfx)
-+	PORT_10(0,  fn, pfx, sfx),	PORT_90(0,   fn, pfx, sfx),	\
-+	PORT_10(100, fn, pfx##10, sfx),	PORT_90(100, fn, pfx##1, sfx),	\
-+	PORT_10(200, fn, pfx##20, sfx),					\
-+	PORT_1(210, fn, pfx##210, sfx),	PORT_1(211, fn, pfx##211, sfx)
- 
- #define IRQC_PIN_MUX(irq, pin)						\
- static const unsigned int intc_irq##irq##_pins[] = {			\
-diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7372.c b/drivers/pinctrl/sh-pfc/pfc-sh7372.c
-index 17f1c179..02526df3 100644
---- a/drivers/pinctrl/sh-pfc/pfc-sh7372.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-sh7372.c
-@@ -30,13 +30,13 @@
- #include "core.h"
- #include "sh_pfc.h"
- 
--#define CPU_ALL_PORT(fn, pfx, sfx) \
--	PORT_10(fn, pfx, sfx),		PORT_90(fn, pfx, sfx), \
--	PORT_10(fn, pfx##10, sfx),	PORT_10(fn, pfx##11, sfx), \
--	PORT_10(fn, pfx##12, sfx),	PORT_10(fn, pfx##13, sfx), \
--	PORT_10(fn, pfx##14, sfx),	PORT_10(fn, pfx##15, sfx), \
--	PORT_10(fn, pfx##16, sfx),	PORT_10(fn, pfx##17, sfx), \
--	PORT_10(fn, pfx##18, sfx),	PORT_1(fn, pfx##190, sfx)
-+#define CPU_ALL_PORT(fn, pfx, sfx)					\
-+	PORT_10(0,  fn, pfx, sfx),	PORT_90(0,  fn, pfx, sfx),	\
-+	PORT_10(100, fn, pfx##10, sfx),	PORT_10(110, fn, pfx##11, sfx),	\
-+	PORT_10(120, fn, pfx##12, sfx),	PORT_10(130, fn, pfx##13, sfx),	\
-+	PORT_10(140, fn, pfx##14, sfx),	PORT_10(150, fn, pfx##15, sfx),	\
-+	PORT_10(160, fn, pfx##16, sfx),	PORT_10(170, fn, pfx##17, sfx),	\
-+	PORT_10(180, fn, pfx##18, sfx),	PORT_1(190, fn, pfx##190, sfx)
- 
- #define IRQC_PIN_MUX(irq, pin)						\
- static const unsigned int intc_irq##irq##_pins[] = {			\
-diff --git a/drivers/pinctrl/sh-pfc/pfc-sh73a0.c b/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
-index 21d2726c..918bad5f 100644
---- a/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
-@@ -31,32 +31,32 @@
- #include "core.h"
- #include "sh_pfc.h"
- 
--#define CPU_ALL_PORT(fn, pfx, sfx)				\
--	PORT_10(fn, pfx,    sfx), PORT_90(fn, pfx, sfx),	\
--	PORT_10(fn, pfx##10, sfx),				\
--	PORT_1(fn, pfx##110, sfx), PORT_1(fn, pfx##111, sfx),	\
--	PORT_1(fn, pfx##112, sfx), PORT_1(fn, pfx##113, sfx),	\
--	PORT_1(fn, pfx##114, sfx), PORT_1(fn, pfx##115, sfx),	\
--	PORT_1(fn, pfx##116, sfx), PORT_1(fn, pfx##117, sfx),	\
--	PORT_1(fn, pfx##118, sfx),				\
--	PORT_1(fn, pfx##128, sfx), PORT_1(fn, pfx##129, sfx),	\
--	PORT_10(fn, pfx##13, sfx), PORT_10(fn, pfx##14, sfx),	\
--	PORT_10(fn, pfx##15, sfx),				\
--	PORT_1(fn, pfx##160, sfx), PORT_1(fn, pfx##161, sfx),	\
--	PORT_1(fn, pfx##162, sfx), PORT_1(fn, pfx##163, sfx),	\
--	PORT_1(fn, pfx##164, sfx),				\
--	PORT_1(fn, pfx##192, sfx), PORT_1(fn, pfx##193, sfx),	\
--	PORT_1(fn, pfx##194, sfx), PORT_1(fn, pfx##195, sfx),	\
--	PORT_1(fn, pfx##196, sfx), PORT_1(fn, pfx##197, sfx),	\
--	PORT_1(fn, pfx##198, sfx), PORT_1(fn, pfx##199, sfx),	\
--	PORT_10(fn, pfx##20, sfx), PORT_10(fn, pfx##21, sfx),	\
--	PORT_10(fn, pfx##22, sfx), PORT_10(fn, pfx##23, sfx),	\
--	PORT_10(fn, pfx##24, sfx), PORT_10(fn, pfx##25, sfx),	\
--	PORT_10(fn, pfx##26, sfx), PORT_10(fn, pfx##27, sfx),	\
--	PORT_1(fn, pfx##280, sfx), PORT_1(fn, pfx##281, sfx),	\
--	PORT_1(fn, pfx##282, sfx),				\
--	PORT_1(fn, pfx##288, sfx), PORT_1(fn, pfx##289, sfx),	\
--	PORT_10(fn, pfx##29, sfx), PORT_10(fn, pfx##30, sfx)
-+#define CPU_ALL_PORT(fn, pfx, sfx)					\
-+	PORT_10(0,  fn, pfx, sfx), PORT_90(0, fn, pfx, sfx),		\
-+	PORT_10(100, fn, pfx##10, sfx),					\
-+	PORT_1(110, fn, pfx##110, sfx), PORT_1(111, fn, pfx##111, sfx),	\
-+	PORT_1(112, fn, pfx##112, sfx), PORT_1(113, fn, pfx##113, sfx),	\
-+	PORT_1(114, fn, pfx##114, sfx), PORT_1(115, fn, pfx##115, sfx),	\
-+	PORT_1(116, fn, pfx##116, sfx), PORT_1(117, fn, pfx##117, sfx),	\
-+	PORT_1(118, fn, pfx##118, sfx),					\
-+	PORT_1(128, fn, pfx##128, sfx), PORT_1(129, fn, pfx##129, sfx),	\
-+	PORT_10(130, fn, pfx##13, sfx), PORT_10(140, fn, pfx##14, sfx),	\
-+	PORT_10(150, fn, pfx##15, sfx),					\
-+	PORT_1(160, fn, pfx##160, sfx), PORT_1(161, fn, pfx##161, sfx),	\
-+	PORT_1(162, fn, pfx##162, sfx), PORT_1(163, fn, pfx##163, sfx),	\
-+	PORT_1(164, fn, pfx##164, sfx),					\
-+	PORT_1(192, fn, pfx##192, sfx), PORT_1(193, fn, pfx##193, sfx),	\
-+	PORT_1(194, fn, pfx##194, sfx), PORT_1(195, fn, pfx##195, sfx),	\
-+	PORT_1(196, fn, pfx##196, sfx), PORT_1(197, fn, pfx##197, sfx),	\
-+	PORT_1(198, fn, pfx##198, sfx), PORT_1(199, fn, pfx##199, sfx),	\
-+	PORT_10(200, fn, pfx##20, sfx), PORT_10(210, fn, pfx##21, sfx),	\
-+	PORT_10(220, fn, pfx##22, sfx), PORT_10(230, fn, pfx##23, sfx),	\
-+	PORT_10(240, fn, pfx##24, sfx), PORT_10(250, fn, pfx##25, sfx),	\
-+	PORT_10(260, fn, pfx##26, sfx), PORT_10(270, fn, pfx##27, sfx),	\
-+	PORT_1(280, fn, pfx##280, sfx), PORT_1(281, fn, pfx##281, sfx),	\
-+	PORT_1(282, fn, pfx##282, sfx),					\
-+	PORT_1(288, fn, pfx##288, sfx), PORT_1(289, fn, pfx##289, sfx),	\
-+	PORT_10(290, fn, pfx##29, sfx), PORT_10(300, fn, pfx##30, sfx)
- 
- enum {
- 	PINMUX_RESERVED = 0,
-diff --git a/drivers/pinctrl/sh-pfc/sh_pfc.h b/drivers/pinctrl/sh-pfc/sh_pfc.h
-index 61205fbf..005b4822 100644
---- a/drivers/pinctrl/sh-pfc/sh_pfc.h
-+++ b/drivers/pinctrl/sh-pfc/sh_pfc.h
-@@ -229,21 +229,21 @@ struct sh_pfc_soc_info {
-  * PORT style (linear pin space)
-  */
- 
--#define PORT_1(fn, pfx, sfx) fn(pfx, sfx)
--
--#define PORT_10(fn, pfx, sfx)						\
--	PORT_1(fn, pfx##0, sfx), PORT_1(fn, pfx##1, sfx),		\
--	PORT_1(fn, pfx##2, sfx), PORT_1(fn, pfx##3, sfx),		\
--	PORT_1(fn, pfx##4, sfx), PORT_1(fn, pfx##5, sfx),		\
--	PORT_1(fn, pfx##6, sfx), PORT_1(fn, pfx##7, sfx),		\
--	PORT_1(fn, pfx##8, sfx), PORT_1(fn, pfx##9, sfx)
--
--#define PORT_90(fn, pfx, sfx) \
--	PORT_10(fn, pfx##1, sfx), PORT_10(fn, pfx##2, sfx),		\
--	PORT_10(fn, pfx##3, sfx), PORT_10(fn, pfx##4, sfx),		\
--	PORT_10(fn, pfx##5, sfx), PORT_10(fn, pfx##6, sfx),		\
--	PORT_10(fn, pfx##7, sfx), PORT_10(fn, pfx##8, sfx),		\
--	PORT_10(fn, pfx##9, sfx)
-+#define PORT_1(pn, fn, pfx, sfx) fn(pfx, sfx)
-+
-+#define PORT_10(pn, fn, pfx, sfx)					  \
-+	PORT_1(pn,   fn, pfx##0, sfx), PORT_1(pn+1, fn, pfx##1, sfx),	  \
-+	PORT_1(pn+2, fn, pfx##2, sfx), PORT_1(pn+3, fn, pfx##3, sfx),	  \
-+	PORT_1(pn+4, fn, pfx##4, sfx), PORT_1(pn+5, fn, pfx##5, sfx),	  \
-+	PORT_1(pn+6, fn, pfx##6, sfx), PORT_1(pn+7, fn, pfx##7, sfx),	  \
-+	PORT_1(pn+8, fn, pfx##8, sfx), PORT_1(pn+9, fn, pfx##9, sfx)
-+
-+#define PORT_90(pn, fn, pfx, sfx)					  \
-+	PORT_10(pn+10, fn, pfx##1, sfx), PORT_10(pn+20, fn, pfx##2, sfx), \
-+	PORT_10(pn+30, fn, pfx##3, sfx), PORT_10(pn+40, fn, pfx##4, sfx), \
-+	PORT_10(pn+50, fn, pfx##5, sfx), PORT_10(pn+60, fn, pfx##6, sfx), \
-+	PORT_10(pn+70, fn, pfx##7, sfx), PORT_10(pn+80, fn, pfx##8, sfx), \
-+	PORT_10(pn+90, fn, pfx##9, sfx)
- 
- /* PORT_ALL(suffix) - Expand to a list of PORT_#_suffix */
- #define _PORT_ALL(pfx, sfx)		pfx##_##sfx
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0550-sh-pfc-Pass-the-pin-number-down-to-the-port-function.patch b/patches.renesas/0550-sh-pfc-Pass-the-pin-number-down-to-the-port-function.patch
deleted file mode 100644
index 772dca5ac80af..0000000000000
--- a/patches.renesas/0550-sh-pfc-Pass-the-pin-number-down-to-the-port-function.patch
+++ /dev/null
@@ -1,51 +0,0 @@
-From 79d84c1a1e7b1f5b66cc2e7edb394b8e3db2fac3 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 14 Feb 2013 00:41:57 +0100
-Subject: sh-pfc: Pass the pin number down to the port function macro
-
-The PORT_1 macro invokes a macro passed as a parameter. Pass the pin
-number down to that macro at the bottom of the call stack. This will be
-used to compute the pin ranges automatically.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
-(cherry picked from commit 3ce0d7eba042b186cdf9e50f53320240ae36cf6b)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/sh_pfc.h | 6 +++---
- 1 file changed, 3 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/sh_pfc.h b/drivers/pinctrl/sh-pfc/sh_pfc.h
-index 005b4822..596ceb7f 100644
---- a/drivers/pinctrl/sh-pfc/sh_pfc.h
-+++ b/drivers/pinctrl/sh-pfc/sh_pfc.h
-@@ -229,7 +229,7 @@ struct sh_pfc_soc_info {
-  * PORT style (linear pin space)
-  */
- 
--#define PORT_1(pn, fn, pfx, sfx) fn(pfx, sfx)
-+#define PORT_1(pn, fn, pfx, sfx) fn(pn, pfx, sfx)
- 
- #define PORT_10(pn, fn, pfx, sfx)					  \
- 	PORT_1(pn,   fn, pfx##0, sfx), PORT_1(pn+1, fn, pfx##1, sfx),	  \
-@@ -246,7 +246,7 @@ struct sh_pfc_soc_info {
- 	PORT_10(pn+90, fn, pfx##9, sfx)
- 
- /* PORT_ALL(suffix) - Expand to a list of PORT_#_suffix */
--#define _PORT_ALL(pfx, sfx)		pfx##_##sfx
-+#define _PORT_ALL(pn, pfx, sfx)		pfx##_##sfx
- #define PORT_ALL(str)			CPU_ALL_PORT(_PORT_ALL, PORT, str)
- 
- /* PINMUX_GPIO - Expand to a sh_pfc_pin entry */
-@@ -267,7 +267,7 @@ struct sh_pfc_soc_info {
- /* PINMUX_DATA_ALL - Expand to a list of PORT_name_DATA, PORT_name_FN0,
-  *		     PORT_name_OUT, PORT_name_IN marks
-  */
--#define _PORT_DATA(pfx, sfx)						\
-+#define _PORT_DATA(pn, pfx, sfx)					\
- 	PINMUX_DATA(PORT##pfx##_DATA, PORT##pfx##_FN0,			\
- 		    PORT##pfx##_OUT, PORT##pfx##_IN)
- #define PINMUX_DATA_ALL()		CPU_ALL_PORT(_PORT_DATA, , unused)
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0551-sh-pfc-Add-pin-number-to-struct-sh_pfc_pin.patch b/patches.renesas/0551-sh-pfc-Add-pin-number-to-struct-sh_pfc_pin.patch
deleted file mode 100644
index cbc4eb8911b0a..0000000000000
--- a/patches.renesas/0551-sh-pfc-Add-pin-number-to-struct-sh_pfc_pin.patch
+++ /dev/null
@@ -1,69 +0,0 @@
-From f3067c4516c2bb946af95508be928b0fadb5b676 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 14 Feb 2013 00:59:49 +0100
-Subject: sh-pfc: Add pin number to struct sh_pfc_pin
-
-The pin number is usually equal to the GPIO number but can differ when
-GPIO numbering is sparse.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
-(cherry picked from commit 9689896cb106bf756ec3616beaeb57da6e39a6a0)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/sh_pfc.h | 20 ++++++++++++--------
- 1 file changed, 12 insertions(+), 8 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/sh_pfc.h b/drivers/pinctrl/sh-pfc/sh_pfc.h
-index 596ceb7f..839e6954 100644
---- a/drivers/pinctrl/sh-pfc/sh_pfc.h
-+++ b/drivers/pinctrl/sh-pfc/sh_pfc.h
-@@ -28,6 +28,7 @@ enum {
- #define SH_PFC_PIN_CFG_PULL_DOWN	(1 << 3)
- 
- struct sh_pfc_pin {
-+	u16 pin;
- 	u16 enum_id;
- 	const char *name;
- 	unsigned int configs;
-@@ -214,8 +215,9 @@ struct sh_pfc_soc_info {
- #define GP_ALL(str)			CPU_ALL_PORT(_GP_ALL, str)
- 
- /* PINMUX_GPIO_GP_ALL - Expand to a list of sh_pfc_pin entries */
--#define _GP_GPIO(bank, pin, _name, sfx)					\
--	[(bank * 32) + pin] = {						\
-+#define _GP_GPIO(bank, _pin, _name, sfx)				\
-+	[(bank * 32) + _pin] = {					\
-+		.pin = (bank * 32) + _pin,				\
- 		.name = __stringify(_name),				\
- 		.enum_id = _name##_DATA,				\
- 	}
-@@ -250,17 +252,19 @@ struct sh_pfc_soc_info {
- #define PORT_ALL(str)			CPU_ALL_PORT(_PORT_ALL, PORT, str)
- 
- /* PINMUX_GPIO - Expand to a sh_pfc_pin entry */
--#define PINMUX_GPIO(pin)						\
--	[GPIO_##pin] = {						\
-+#define PINMUX_GPIO(_pin)						\
-+	[GPIO_##_pin] = {						\
-+		.pin = (u16)-1,						\
- 		.name = __stringify(name),				\
--		.enum_id = pin##_DATA,					\
-+		.enum_id = _pin##_DATA,					\
- 	}
- 
- /* SH_PFC_PIN_CFG - Expand to a sh_pfc_pin entry (named PORT#) with config */
--#define SH_PFC_PIN_CFG(pin, cfgs)					\
-+#define SH_PFC_PIN_CFG(_pin, cfgs)					\
- 	{								\
--		.name = __stringify(PORT##pin),				\
--		.enum_id = PORT##pin##_DATA,				\
-+		.pin = _pin,						\
-+		.name = __stringify(PORT##_pin),			\
-+		.enum_id = PORT##_pin##_DATA,				\
- 		.configs = cfgs,					\
- 	}
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0552-sh-pfc-Rename-struct-sh_pfc-nr_pins-field-to-nr_gpio.patch b/patches.renesas/0552-sh-pfc-Rename-struct-sh_pfc-nr_pins-field-to-nr_gpio.patch
deleted file mode 100644
index 9d33d0feb5e63..0000000000000
--- a/patches.renesas/0552-sh-pfc-Rename-struct-sh_pfc-nr_pins-field-to-nr_gpio.patch
+++ /dev/null
@@ -1,71 +0,0 @@
-From 05219fc0af04f8f2874eaa3f1343230a4b9c27aa Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Mon, 15 Jul 2013 13:48:56 +0200
-Subject: sh-pfc: Rename struct sh_pfc nr_pins field to nr_gpio_pins
-
-The field contains the number of pins with an associated GPIO port. This
-is currently equal to the total number of pins but will be modified when
-adding support for pins without a GPIO port. Rename the field
-accordingly.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
-(cherry picked from commit 28818fa5dadfd458fa7e17c8be26b2d7edffa8bf)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/core.h    | 2 +-
- drivers/pinctrl/sh-pfc/gpio.c    | 4 ++--
- drivers/pinctrl/sh-pfc/pinctrl.c | 2 +-
- 3 files changed, 4 insertions(+), 4 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/core.h b/drivers/pinctrl/sh-pfc/core.h
-index f02ba1dd..93963a19 100644
---- a/drivers/pinctrl/sh-pfc/core.h
-+++ b/drivers/pinctrl/sh-pfc/core.h
-@@ -34,7 +34,7 @@ struct sh_pfc {
- 	unsigned int num_windows;
- 	struct sh_pfc_window *window;
- 
--	unsigned int nr_pins;
-+	unsigned int nr_gpio_pins;
- 
- 	struct sh_pfc_chip *gpio;
- 	struct sh_pfc_chip *func;
-diff --git a/drivers/pinctrl/sh-pfc/gpio.c b/drivers/pinctrl/sh-pfc/gpio.c
-index 87ae38b9..7661be50 100644
---- a/drivers/pinctrl/sh-pfc/gpio.c
-+++ b/drivers/pinctrl/sh-pfc/gpio.c
-@@ -245,7 +245,7 @@ static int gpio_pin_setup(struct sh_pfc_chip *chip)
- 	gc->dev = pfc->dev;
- 	gc->owner = THIS_MODULE;
- 	gc->base = 0;
--	gc->ngpio = pfc->nr_pins;
-+	gc->ngpio = pfc->nr_gpio_pins;
- 
- 	return 0;
- }
-@@ -293,7 +293,7 @@ static int gpio_function_setup(struct sh_pfc_chip *chip)
- 
- 	gc->label = pfc->info->name;
- 	gc->owner = THIS_MODULE;
--	gc->base = pfc->nr_pins;
-+	gc->base = pfc->nr_gpio_pins;
- 	gc->ngpio = pfc->info->nr_func_gpios;
- 
- 	return 0;
-diff --git a/drivers/pinctrl/sh-pfc/pinctrl.c b/drivers/pinctrl/sh-pfc/pinctrl.c
-index bc8b028b..314255d7 100644
---- a/drivers/pinctrl/sh-pfc/pinctrl.c
-+++ b/drivers/pinctrl/sh-pfc/pinctrl.c
-@@ -632,7 +632,7 @@ static int sh_pfc_map_pins(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx)
- 		}
- 	}
- 
--	pfc->nr_pins = ranges[nr_ranges-1].end + 1;
-+	pfc->nr_gpio_pins = ranges[nr_ranges-1].end + 1;
- 
- 	return nr_ranges;
- }
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0553-sh-pfc-Compute-pin-ranges-automatically.patch b/patches.renesas/0553-sh-pfc-Compute-pin-ranges-automatically.patch
deleted file mode 100644
index fdb7d49a57cf1..0000000000000
--- a/patches.renesas/0553-sh-pfc-Compute-pin-ranges-automatically.patch
+++ /dev/null
@@ -1,352 +0,0 @@
-From 76f65da95b5d72b75cd55d4d8f5d0638a793aadf Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Mon, 15 Jul 2013 18:38:30 +0200
-Subject: sh-pfc: Compute pin ranges automatically
-
-Remove the manually specified ranges from PFC SoC data and compute the
-ranges automatically. This prevents ranges from being out-of-sync with
-pins definitions.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
-(cherry picked from commit acac8ed5e2aa2c0d364d06f364fd9ed0dc27d28a)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/core.c        | 70 +++++++++++++++++++++++++++++++-----
- drivers/pinctrl/sh-pfc/core.h        |  8 +++++
- drivers/pinctrl/sh-pfc/gpio.c        | 21 +++--------
- drivers/pinctrl/sh-pfc/pfc-r8a73a4.c | 17 ---------
- drivers/pinctrl/sh-pfc/pfc-sh73a0.c  |  9 -----
- drivers/pinctrl/sh-pfc/pinctrl.c     | 49 ++++++++-----------------
- drivers/pinctrl/sh-pfc/sh_pfc.h      |  2 --
- 7 files changed, 88 insertions(+), 88 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/core.c b/drivers/pinctrl/sh-pfc/core.c
-index 96b02246..cb47bcee 100644
---- a/drivers/pinctrl/sh-pfc/core.c
-+++ b/drivers/pinctrl/sh-pfc/core.c
-@@ -82,17 +82,14 @@ int sh_pfc_get_pin_index(struct sh_pfc *pfc, unsigned int pin)
- 	unsigned int offset;
- 	unsigned int i;
- 
--	if (pfc->info->ranges == NULL)
--		return pin;
--
--	for (i = 0, offset = 0; i < pfc->info->nr_ranges; ++i) {
--		const struct pinmux_range *range = &pfc->info->ranges[i];
-+	for (i = 0, offset = 0; i < pfc->nr_ranges; ++i) {
-+		const struct sh_pfc_pin_range *range = &pfc->ranges[i];
- 
- 		if (pin <= range->end)
--			return pin >= range->begin
--			     ? offset + pin - range->begin : -1;
-+			return pin >= range->start
-+			     ? offset + pin - range->start : -1;
- 
--		offset += range->end - range->begin + 1;
-+		offset += range->end - range->start + 1;
- 	}
- 
- 	return -EINVAL;
-@@ -341,6 +338,59 @@ int sh_pfc_config_mux(struct sh_pfc *pfc, unsigned mark, int pinmux_type)
- 	return 0;
- }
- 
-+static int sh_pfc_init_ranges(struct sh_pfc *pfc)
-+{
-+	struct sh_pfc_pin_range *range;
-+	unsigned int nr_ranges;
-+	unsigned int i;
-+
-+	if (pfc->info->pins[0].pin == (u16)-1) {
-+		/* Pin number -1 denotes that the SoC doesn't report pin numbers
-+		 * in its pin arrays yet. Consider the pin numbers range as
-+		 * continuous and allocate a single range.
-+		 */
-+		pfc->nr_ranges = 1;
-+		pfc->ranges = devm_kzalloc(pfc->dev, sizeof(*pfc->ranges),
-+					   GFP_KERNEL);
-+		if (pfc->ranges == NULL)
-+			return -ENOMEM;
-+
-+		pfc->ranges->start = 0;
-+		pfc->ranges->end = pfc->info->nr_pins - 1;
-+		pfc->nr_gpio_pins = pfc->info->nr_pins;
-+
-+		return 0;
-+	}
-+
-+	/* Count, allocate and fill the ranges. */
-+	for (i = 1, nr_ranges = 1; i < pfc->info->nr_pins; ++i) {
-+		if (pfc->info->pins[i-1].pin != pfc->info->pins[i].pin - 1)
-+			nr_ranges++;
-+	}
-+
-+	pfc->nr_ranges = nr_ranges;
-+	pfc->ranges = devm_kzalloc(pfc->dev, sizeof(*pfc->ranges) * nr_ranges,
-+				   GFP_KERNEL);
-+	if (pfc->ranges == NULL)
-+		return -ENOMEM;
-+
-+	range = pfc->ranges;
-+	range->start = pfc->info->pins[0].pin;
-+
-+	for (i = 1; i < pfc->info->nr_pins; ++i) {
-+		if (pfc->info->pins[i-1].pin != pfc->info->pins[i].pin - 1) {
-+			range->end = pfc->info->pins[i-1].pin;
-+			range++;
-+			range->start = pfc->info->pins[i].pin;
-+		}
-+	}
-+
-+	range->end = pfc->info->pins[i-1].pin;
-+	pfc->nr_gpio_pins = range->end + 1;
-+
-+	return 0;
-+}
-+
- #ifdef CONFIG_OF
- static const struct of_device_id sh_pfc_of_table[] = {
- #ifdef CONFIG_PINCTRL_PFC_R8A73A4
-@@ -431,6 +481,10 @@ static int sh_pfc_probe(struct platform_device *pdev)
- 
- 	pinctrl_provide_dummies();
- 
-+	ret = sh_pfc_init_ranges(pfc);
-+	if (ret < 0)
-+		return ret;
-+
- 	/*
- 	 * Initialize pinctrl bindings first
- 	 */
-diff --git a/drivers/pinctrl/sh-pfc/core.h b/drivers/pinctrl/sh-pfc/core.h
-index 93963a19..a1b23762 100644
---- a/drivers/pinctrl/sh-pfc/core.h
-+++ b/drivers/pinctrl/sh-pfc/core.h
-@@ -25,6 +25,11 @@ struct sh_pfc_window {
- struct sh_pfc_chip;
- struct sh_pfc_pinctrl;
- 
-+struct sh_pfc_pin_range {
-+	u16 start;
-+	u16 end;
-+};
-+
- struct sh_pfc {
- 	struct device *dev;
- 	const struct sh_pfc_soc_info *info;
-@@ -34,6 +39,9 @@ struct sh_pfc {
- 	unsigned int num_windows;
- 	struct sh_pfc_window *window;
- 
-+	struct sh_pfc_pin_range *ranges;
-+	unsigned int nr_ranges;
-+
- 	unsigned int nr_gpio_pins;
- 
- 	struct sh_pfc_chip *gpio;
-diff --git a/drivers/pinctrl/sh-pfc/gpio.c b/drivers/pinctrl/sh-pfc/gpio.c
-index 7661be50..78fcb802 100644
---- a/drivers/pinctrl/sh-pfc/gpio.c
-+++ b/drivers/pinctrl/sh-pfc/gpio.c
-@@ -334,10 +334,7 @@ sh_pfc_add_gpiochip(struct sh_pfc *pfc, int(*setup)(struct sh_pfc_chip *),
- 
- int sh_pfc_register_gpiochip(struct sh_pfc *pfc)
- {
--	const struct pinmux_range *ranges;
--	struct pinmux_range def_range;
- 	struct sh_pfc_chip *chip;
--	unsigned int nr_ranges;
- 	unsigned int i;
- 	int ret;
- 
-@@ -368,23 +365,13 @@ int sh_pfc_register_gpiochip(struct sh_pfc *pfc)
- 	pfc->gpio = chip;
- 
- 	/* Register the GPIO to pin mappings. */
--	if (pfc->info->ranges == NULL) {
--		def_range.begin = 0;
--		def_range.end = pfc->info->nr_pins - 1;
--		ranges = &def_range;
--		nr_ranges = 1;
--	} else {
--		ranges = pfc->info->ranges;
--		nr_ranges = pfc->info->nr_ranges;
--	}
--
--	for (i = 0; i < nr_ranges; ++i) {
--		const struct pinmux_range *range = &ranges[i];
-+	for (i = 0; i < pfc->nr_ranges; ++i) {
-+		const struct sh_pfc_pin_range *range = &pfc->ranges[i];
- 
- 		ret = gpiochip_add_pin_range(&chip->gpio_chip,
- 					     dev_name(pfc->dev),
--					     range->begin, range->begin,
--					     range->end - range->begin + 1);
-+					     range->start, range->start,
-+					     range->end - range->start + 1);
- 		if (ret < 0)
- 			return ret;
- 	}
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a73a4.c b/drivers/pinctrl/sh-pfc/pfc-r8a73a4.c
-index 04ecb5e9..05d96ae3 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a73a4.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a73a4.c
-@@ -1398,20 +1398,6 @@ static struct sh_pfc_pin pinmux_pins[] = {
- 	R8A73A4_PIN_IO_PU_PD(328), R8A73A4_PIN_IO_PU_PD(329),
- };
- 
--static const struct pinmux_range pinmux_ranges[] = {
--	{.begin = 0, .end = 30,},
--	{.begin = 32, .end = 40,},
--	{.begin = 64, .end = 85,},
--	{.begin = 96, .end = 126,},
--	{.begin = 128, .end = 134,},
--	{.begin = 160, .end = 178,},
--	{.begin = 192, .end = 222,},
--	{.begin = 224, .end = 250,},
--	{.begin = 256, .end = 283,},
--	{.begin = 288, .end = 308,},
--	{.begin = 320, .end = 329,},
--};
--
- /* - IRQC ------------------------------------------------------------------- */
- #define IRQC_PINS_MUX(pin, irq_mark)				\
- static const unsigned int irqc_irq##irq_mark##_pins[] = {	\
-@@ -2756,9 +2742,6 @@ const struct sh_pfc_soc_info r8a73a4_pinmux_info = {
- 	.pins = pinmux_pins,
- 	.nr_pins = ARRAY_SIZE(pinmux_pins),
- 
--	.ranges = pinmux_ranges,
--	.nr_ranges = ARRAY_SIZE(pinmux_ranges),
--
- 	.groups = pinmux_groups,
- 	.nr_groups = ARRAY_SIZE(pinmux_groups),
- 	.functions = pinmux_functions,
-diff --git a/drivers/pinctrl/sh-pfc/pfc-sh73a0.c b/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
-index 918bad5f..6a26946d 100644
---- a/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
-@@ -1446,13 +1446,6 @@ static struct sh_pfc_pin pinmux_pins[] = {
- 	SH73A0_PIN_O(309),
- };
- 
--static const struct pinmux_range pinmux_ranges[] = {
--	{.begin = 0, .end = 118,},
--	{.begin = 128, .end = 164,},
--	{.begin = 192, .end = 282,},
--	{.begin = 288, .end = 309,},
--};
--
- /* Pin numbers for pins without a corresponding GPIO port number are computed
-  * from the row and column numbers with a 1000 offset to avoid collisions with
-  * GPIO port numbers.
-@@ -3895,8 +3888,6 @@ const struct sh_pfc_soc_info sh73a0_pinmux_info = {
- 
- 	.pins = pinmux_pins,
- 	.nr_pins = ARRAY_SIZE(pinmux_pins),
--	.ranges = pinmux_ranges,
--	.nr_ranges = ARRAY_SIZE(pinmux_ranges),
- 	.groups = pinmux_groups,
- 	.nr_groups = ARRAY_SIZE(pinmux_groups),
- 	.functions = pinmux_functions,
-diff --git a/drivers/pinctrl/sh-pfc/pinctrl.c b/drivers/pinctrl/sh-pfc/pinctrl.c
-index 314255d7..8649ec39 100644
---- a/drivers/pinctrl/sh-pfc/pinctrl.c
-+++ b/drivers/pinctrl/sh-pfc/pinctrl.c
-@@ -587,22 +587,9 @@ static const struct pinconf_ops sh_pfc_pinconf_ops = {
- /* PFC ranges -> pinctrl pin descs */
- static int sh_pfc_map_pins(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx)
- {
--	const struct pinmux_range *ranges;
--	struct pinmux_range def_range;
--	unsigned int nr_ranges;
--	unsigned int nr_pins;
- 	unsigned int i;
- 
--	if (pfc->info->ranges == NULL) {
--		def_range.begin = 0;
--		def_range.end = pfc->info->nr_pins - 1;
--		ranges = &def_range;
--		nr_ranges = 1;
--	} else {
--		ranges = pfc->info->ranges;
--		nr_ranges = pfc->info->nr_ranges;
--	}
--
-+	/* Allocate and initialize the pins and configs arrays. */
- 	pmx->pins = devm_kzalloc(pfc->dev,
- 				 sizeof(*pmx->pins) * pfc->info->nr_pins,
- 				 GFP_KERNEL);
-@@ -615,32 +602,24 @@ static int sh_pfc_map_pins(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx)
- 	if (unlikely(!pmx->configs))
- 		return -ENOMEM;
- 
--	for (i = 0, nr_pins = 0; i < nr_ranges; ++i) {
--		const struct pinmux_range *range = &ranges[i];
--		unsigned int number;
-+	for (i = 0; i < pfc->info->nr_pins; ++i) {
-+		const struct sh_pfc_pin *info = &pfc->info->pins[i];
-+		struct sh_pfc_pin_config *cfg = &pmx->configs[i];
-+		struct pinctrl_pin_desc *pin = &pmx->pins[i];
- 
--		for (number = range->begin; number <= range->end;
--		     number++, nr_pins++) {
--			struct sh_pfc_pin_config *cfg = &pmx->configs[nr_pins];
--			struct pinctrl_pin_desc *pin = &pmx->pins[nr_pins];
--			const struct sh_pfc_pin *info =
--				&pfc->info->pins[nr_pins];
--
--			pin->number = number;
--			pin->name = info->name;
--			cfg->type = PINMUX_TYPE_NONE;
--		}
-+		/* If the pin number is equal to -1 all pins are considered */
-+		pin->number = info->pin != (u16)-1 ? info->pin : i;
-+		pin->name = info->name;
-+		cfg->type = PINMUX_TYPE_NONE;
- 	}
- 
--	pfc->nr_gpio_pins = ranges[nr_ranges-1].end + 1;
--
--	return nr_ranges;
-+	return 0;
- }
- 
- int sh_pfc_register_pinctrl(struct sh_pfc *pfc)
- {
- 	struct sh_pfc_pinctrl *pmx;
--	int nr_ranges;
-+	int ret;
- 
- 	pmx = devm_kzalloc(pfc->dev, sizeof(*pmx), GFP_KERNEL);
- 	if (unlikely(!pmx))
-@@ -649,9 +628,9 @@ int sh_pfc_register_pinctrl(struct sh_pfc *pfc)
- 	pmx->pfc = pfc;
- 	pfc->pinctrl = pmx;
- 
--	nr_ranges = sh_pfc_map_pins(pfc, pmx);
--	if (unlikely(nr_ranges < 0))
--		return nr_ranges;
-+	ret = sh_pfc_map_pins(pfc, pmx);
-+	if (ret < 0)
-+		return ret;
- 
- 	pmx->pctl_desc.name = DRV_NAME;
- 	pmx->pctl_desc.owner = THIS_MODULE;
-diff --git a/drivers/pinctrl/sh-pfc/sh_pfc.h b/drivers/pinctrl/sh-pfc/sh_pfc.h
-index 839e6954..2469b35c 100644
---- a/drivers/pinctrl/sh-pfc/sh_pfc.h
-+++ b/drivers/pinctrl/sh-pfc/sh_pfc.h
-@@ -125,8 +125,6 @@ struct sh_pfc_soc_info {
- 
- 	const struct sh_pfc_pin *pins;
- 	unsigned int nr_pins;
--	const struct pinmux_range *ranges;
--	unsigned int nr_ranges;
- 	const struct sh_pfc_pin_group *groups;
- 	unsigned int nr_groups;
- 	const struct sh_pfc_function *functions;
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0554-sh-pfc-Support-pins-not-associated-with-a-GPIO-port.patch b/patches.renesas/0554-sh-pfc-Support-pins-not-associated-with-a-GPIO-port.patch
deleted file mode 100644
index 0d6fd1684636d..0000000000000
--- a/patches.renesas/0554-sh-pfc-Support-pins-not-associated-with-a-GPIO-port.patch
+++ /dev/null
@@ -1,184 +0,0 @@
-From 16933164311228f10beb90ba453461e9c292a112 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Mon, 15 Jul 2013 21:10:54 +0200
-Subject: sh-pfc: Support pins not associated with a GPIO port
-
-Pins with selectable functions but without a GPIO port can't be named
-PORT_# or GP_#_#. Add a SH_PFC_PIN_NAMED macro to declare such pins in
-the pinmux pins array, naming them with the PIN_ prefix followed by the
-pin physical position.
-
-In order to make sure not to register those pins as GPIOs, add a
-SH_PFC_PIN_CFG_NO_GPIO pin flag to denote pins without a GPIO port.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
-(cherry picked from commit 4f82e3ee724f1712f9e84b8802e24ea096a6089f)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/core.c        | 22 +++++++++++++++-------
- drivers/pinctrl/sh-pfc/gpio.c        |  8 +++++++-
- drivers/pinctrl/sh-pfc/pfc-r8a7778.c | 13 +++++++++----
- drivers/pinctrl/sh-pfc/pfc-sh73a0.c  | 15 +++++++++------
- drivers/pinctrl/sh-pfc/sh_pfc.h      |  9 +++++++++
- 5 files changed, 49 insertions(+), 18 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/core.c b/drivers/pinctrl/sh-pfc/core.c
-index cb47bcee..9e66614b 100644
---- a/drivers/pinctrl/sh-pfc/core.c
-+++ b/drivers/pinctrl/sh-pfc/core.c
-@@ -362,7 +362,10 @@ static int sh_pfc_init_ranges(struct sh_pfc *pfc)
- 		return 0;
- 	}
- 
--	/* Count, allocate and fill the ranges. */
-+	/* Count, allocate and fill the ranges. The PFC SoC data pins array must
-+	 * be sorted by pin numbers, and pins without a GPIO port must come
-+	 * last.
-+	 */
- 	for (i = 1, nr_ranges = 1; i < pfc->info->nr_pins; ++i) {
- 		if (pfc->info->pins[i-1].pin != pfc->info->pins[i].pin - 1)
- 			nr_ranges++;
-@@ -378,15 +381,20 @@ static int sh_pfc_init_ranges(struct sh_pfc *pfc)
- 	range->start = pfc->info->pins[0].pin;
- 
- 	for (i = 1; i < pfc->info->nr_pins; ++i) {
--		if (pfc->info->pins[i-1].pin != pfc->info->pins[i].pin - 1) {
--			range->end = pfc->info->pins[i-1].pin;
--			range++;
--			range->start = pfc->info->pins[i].pin;
--		}
-+		if (pfc->info->pins[i-1].pin == pfc->info->pins[i].pin - 1)
-+			continue;
-+
-+		range->end = pfc->info->pins[i-1].pin;
-+		if (!(pfc->info->pins[i-1].configs & SH_PFC_PIN_CFG_NO_GPIO))
-+			pfc->nr_gpio_pins = range->end + 1;
-+
-+		range++;
-+		range->start = pfc->info->pins[i].pin;
- 	}
- 
- 	range->end = pfc->info->pins[i-1].pin;
--	pfc->nr_gpio_pins = range->end + 1;
-+	if (!(pfc->info->pins[i-1].configs & SH_PFC_PIN_CFG_NO_GPIO))
-+		pfc->nr_gpio_pins = range->end + 1;
- 
- 	return 0;
- }
-diff --git a/drivers/pinctrl/sh-pfc/gpio.c b/drivers/pinctrl/sh-pfc/gpio.c
-index 78fcb802..04bf52b6 100644
---- a/drivers/pinctrl/sh-pfc/gpio.c
-+++ b/drivers/pinctrl/sh-pfc/gpio.c
-@@ -364,10 +364,16 @@ int sh_pfc_register_gpiochip(struct sh_pfc *pfc)
- 
- 	pfc->gpio = chip;
- 
--	/* Register the GPIO to pin mappings. */
-+	/* Register the GPIO to pin mappings. As pins with GPIO ports must come
-+	 * first in the ranges, skip the pins without GPIO ports by stopping at
-+	 * the first range that contains such a pin.
-+	 */
- 	for (i = 0; i < pfc->nr_ranges; ++i) {
- 		const struct sh_pfc_pin_range *range = &pfc->ranges[i];
- 
-+		if (range->start >= pfc->nr_gpio_pins)
-+			break;
-+
- 		ret = gpiochip_add_pin_range(&chip->gpio_chip,
- 					     dev_name(pfc->dev),
- 					     range->start, range->start,
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7778.c b/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
-index 40aecfee..428d2a68 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
-@@ -1254,16 +1254,21 @@ static const u16 pinmux_data[] = {
- 	PINMUX_IPSR_MSEL(IP10_24_22,	CAN_CLK_C,	SEL_CANCLK_C),
- };
- 
--static struct sh_pfc_pin pinmux_pins[] = {
--	PINMUX_GPIO_GP_ALL(),
--};
--
- /* Pin numbers for pins without a corresponding GPIO port number are computed
-  * from the row and column numbers with a 1000 offset to avoid collisions with
-  * GPIO port numbers.
-  */
- #define PIN_NUMBER(row, col)		(1000+((row)-1)*25+(col)-1)
- 
-+static struct sh_pfc_pin pinmux_pins[] = {
-+	PINMUX_GPIO_GP_ALL(),
-+
-+	/* Pins not associated with a GPIO port */
-+	SH_PFC_PIN_NAMED(3, 20, C20),
-+	SH_PFC_PIN_NAMED(20, 1, T1),
-+	SH_PFC_PIN_NAMED(25, 2, Y2),
-+};
-+
- /* - macro */
- #define SH_PFC_PINS(name, args...) \
- 	static const unsigned int name ##_pins[] = { args }
-diff --git a/drivers/pinctrl/sh-pfc/pfc-sh73a0.c b/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
-index 6a26946d..9a42c52b 100644
---- a/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
-@@ -1173,6 +1173,12 @@ static const u16 pinmux_data[] = {
- #define SH73A0_PIN_IO_PU_PD(pin)	SH_PFC_PIN_CFG(pin, __IO | __PUD)
- #define SH73A0_PIN_O(pin)		SH_PFC_PIN_CFG(pin, __O)
- 
-+/* Pin numbers for pins without a corresponding GPIO port number are computed
-+ * from the row and column numbers with a 1000 offset to avoid collisions with
-+ * GPIO port numbers.
-+ */
-+#define PIN_NUMBER(row, col)		(1000+((row)-1)*34+(col)-1)
-+
- static struct sh_pfc_pin pinmux_pins[] = {
- 	/* Table 25-1 (I/O and Pull U/D) */
- 	SH73A0_PIN_I_PD(0),
-@@ -1444,13 +1450,10 @@ static struct sh_pfc_pin pinmux_pins[] = {
- 	SH73A0_PIN_O(307),
- 	SH73A0_PIN_I_PU(308),
- 	SH73A0_PIN_O(309),
--};
- 
--/* Pin numbers for pins without a corresponding GPIO port number are computed
-- * from the row and column numbers with a 1000 offset to avoid collisions with
-- * GPIO port numbers.
-- */
--#define PIN_NUMBER(row, col)		(1000+((row)-1)*34+(col)-1)
-+	/* Pins not associated with a GPIO port */
-+	SH_PFC_PIN_NAMED(6, 26, F26),
-+};
- 
- /* - BSC -------------------------------------------------------------------- */
- static const unsigned int bsc_data_0_7_pins[] = {
-diff --git a/drivers/pinctrl/sh-pfc/sh_pfc.h b/drivers/pinctrl/sh-pfc/sh_pfc.h
-index 2469b35c..11bd0d97 100644
---- a/drivers/pinctrl/sh-pfc/sh_pfc.h
-+++ b/drivers/pinctrl/sh-pfc/sh_pfc.h
-@@ -26,6 +26,7 @@ enum {
- #define SH_PFC_PIN_CFG_OUTPUT		(1 << 1)
- #define SH_PFC_PIN_CFG_PULL_UP		(1 << 2)
- #define SH_PFC_PIN_CFG_PULL_DOWN	(1 << 3)
-+#define SH_PFC_PIN_CFG_NO_GPIO		(1 << 31)
- 
- struct sh_pfc_pin {
- 	u16 pin;
-@@ -266,6 +267,14 @@ struct sh_pfc_soc_info {
- 		.configs = cfgs,					\
- 	}
- 
-+/* SH_PFC_PIN_NAMED - Expand to a sh_pfc_pin entry with the given name */
-+#define SH_PFC_PIN_NAMED(row, col, _name)				\
-+	{								\
-+		.pin = PIN_NUMBER(row, col),				\
-+		.name = __stringify(PIN_##_name),			\
-+		.configs = SH_PFC_PIN_CFG_NO_GPIO,			\
-+	}
-+
- /* PINMUX_DATA_ALL - Expand to a list of PORT_name_DATA, PORT_name_FN0,
-  *		     PORT_name_OUT, PORT_name_IN marks
-  */
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0555-sh-pfc-Remove-unneeded-mach-soc-.h-includes.patch b/patches.renesas/0555-sh-pfc-Remove-unneeded-mach-soc-.h-includes.patch
deleted file mode 100644
index 6ab52f23e4a31..0000000000000
--- a/patches.renesas/0555-sh-pfc-Remove-unneeded-mach-soc-.h-includes.patch
+++ /dev/null
@@ -1,57 +0,0 @@
-From 75814d9432685c805f60b915fb7bde2fd45e0e1d Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Tue, 23 Jul 2013 23:08:10 +0200
-Subject: sh-pfc: Remove unneeded mach/<soc>.h includes
-
-The SoC-specific mach/<soc>.h headers are included needlesly. Don't
-include them.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Magnus Damm <damm@opensource.se>
-(cherry picked from commit e7004440907cc4c6130f23920a694fce2625acc9)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a73a4.c | 1 -
- drivers/pinctrl/sh-pfc/pfc-r8a7740.c | 1 -
- drivers/pinctrl/sh-pfc/pfc-sh7372.c  | 1 -
- 3 files changed, 3 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a73a4.c b/drivers/pinctrl/sh-pfc/pfc-r8a73a4.c
-index 05d96ae3..d25fd4ea 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a73a4.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a73a4.c
-@@ -21,7 +21,6 @@
- #include <linux/kernel.h>
- #include <linux/pinctrl/pinconf-generic.h>
- #include <mach/irqs.h>
--#include <mach/r8a73a4.h>
- 
- #include "core.h"
- #include "sh_pfc.h"
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-index 2c745368..009174d0 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
-@@ -22,7 +22,6 @@
- #include <linux/kernel.h>
- #include <linux/pinctrl/pinconf-generic.h>
- 
--#include <mach/r8a7740.h>
- #include <mach/irqs.h>
- 
- #include "core.h"
-diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7372.c b/drivers/pinctrl/sh-pfc/pfc-sh7372.c
-index 02526df3..d546c478 100644
---- a/drivers/pinctrl/sh-pfc/pfc-sh7372.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-sh7372.c
-@@ -25,7 +25,6 @@
- #include <linux/pinctrl/pinconf-generic.h>
- 
- #include <mach/irqs.h>
--#include <mach/sh7372.h>
- 
- #include "core.h"
- #include "sh_pfc.h"
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0556-sh-pfc-sh7372-Replace-mach-irqs.h-with-linux-sh_intc.patch b/patches.renesas/0556-sh-pfc-sh7372-Replace-mach-irqs.h-with-linux-sh_intc.patch
deleted file mode 100644
index 95ebd27775ef2..0000000000000
--- a/patches.renesas/0556-sh-pfc-sh7372-Replace-mach-irqs.h-with-linux-sh_intc.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From 9fa283265f0c45f5c99253e9698ac77fef3bd403 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 24 Jul 2013 00:25:16 +0200
-Subject: sh-pfc: sh7372: Replace <mach/irqs.h> with <linux/sh_intc.h>
-
-The mach/irqs.h header is included only to get the evt2irq macro
-definition. The macro is defined in linux/sh_intc.h, include it directly
-instead of the mach-specific header.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Magnus Damm <damm@opensource.se>
-(cherry picked from commit f3dcc9ffadea53e355e7d94cf9930898fc6a4b67)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-sh7372.c | 3 +--
- 1 file changed, 1 insertion(+), 2 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7372.c b/drivers/pinctrl/sh-pfc/pfc-sh7372.c
-index d546c478..70b522d3 100644
---- a/drivers/pinctrl/sh-pfc/pfc-sh7372.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-sh7372.c
-@@ -23,8 +23,7 @@
- #include <linux/io.h>
- #include <linux/kernel.h>
- #include <linux/pinctrl/pinconf-generic.h>
--
--#include <mach/irqs.h>
-+#include <linux/sh_intc.h>
- 
- #include "core.h"
- #include "sh_pfc.h"
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0557-sh-pfc-sh73a0-Remove-EXT_IRQ16L-and-EXT_IRQ16H-macro.patch b/patches.renesas/0557-sh-pfc-sh73a0-Remove-EXT_IRQ16L-and-EXT_IRQ16H-macro.patch
deleted file mode 100644
index 4ee576e069a61..0000000000000
--- a/patches.renesas/0557-sh-pfc-sh73a0-Remove-EXT_IRQ16L-and-EXT_IRQ16H-macro.patch
+++ /dev/null
@@ -1,99 +0,0 @@
-From 500c6fc974eb3f9521f00fc67f45f93609548445 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 24 Jul 2013 01:24:15 +0200
-Subject: sh-pfc: sh73a0: Remove EXT_IRQ16L and EXT_IRQ16H macros
-
-The macros expand to irq_pin() calls and where most probably introduced
-from a copy&paste of the sh7372 PFC data. Replace them with irq_pin().
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Magnus Damm <damm@opensource.se>
-(cherry picked from commit deeb6d3f1fce7e2269462eaa7cfe1ea426857d89)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-sh73a0.c | 68 +++++++++++++++++--------------------
- 1 file changed, 32 insertions(+), 36 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-sh73a0.c b/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
-index 9a42c52b..7e278a97 100644
---- a/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
-@@ -3660,43 +3660,39 @@ static const struct pinmux_data_reg pinmux_data_regs[] = {
- 	{ },
- };
- 
--/* External IRQ pins mapped at IRQPIN_BASE */
--#define EXT_IRQ16L(n) irq_pin(n)
--#define EXT_IRQ16H(n) irq_pin(n)
--
- static const struct pinmux_irq pinmux_irqs[] = {
--	PINMUX_IRQ(EXT_IRQ16H(19), 9),
--	PINMUX_IRQ(EXT_IRQ16L(1), 10),
--	PINMUX_IRQ(EXT_IRQ16L(0), 11),
--	PINMUX_IRQ(EXT_IRQ16H(18), 13),
--	PINMUX_IRQ(EXT_IRQ16H(20), 14),
--	PINMUX_IRQ(EXT_IRQ16H(21), 15),
--	PINMUX_IRQ(EXT_IRQ16H(31), 26),
--	PINMUX_IRQ(EXT_IRQ16H(30), 27),
--	PINMUX_IRQ(EXT_IRQ16H(29), 28),
--	PINMUX_IRQ(EXT_IRQ16H(22), 40),
--	PINMUX_IRQ(EXT_IRQ16H(23), 53),
--	PINMUX_IRQ(EXT_IRQ16L(10), 54),
--	PINMUX_IRQ(EXT_IRQ16L(9), 56),
--	PINMUX_IRQ(EXT_IRQ16H(26), 115),
--	PINMUX_IRQ(EXT_IRQ16H(27), 116),
--	PINMUX_IRQ(EXT_IRQ16H(28), 117),
--	PINMUX_IRQ(EXT_IRQ16H(24), 118),
--	PINMUX_IRQ(EXT_IRQ16L(6), 147),
--	PINMUX_IRQ(EXT_IRQ16L(2), 149),
--	PINMUX_IRQ(EXT_IRQ16L(7), 150),
--	PINMUX_IRQ(EXT_IRQ16L(12), 156),
--	PINMUX_IRQ(EXT_IRQ16L(4), 159),
--	PINMUX_IRQ(EXT_IRQ16H(25), 164),
--	PINMUX_IRQ(EXT_IRQ16L(8), 223),
--	PINMUX_IRQ(EXT_IRQ16L(3), 224),
--	PINMUX_IRQ(EXT_IRQ16L(5), 227),
--	PINMUX_IRQ(EXT_IRQ16H(17), 234),
--	PINMUX_IRQ(EXT_IRQ16L(11), 238),
--	PINMUX_IRQ(EXT_IRQ16L(13), 239),
--	PINMUX_IRQ(EXT_IRQ16H(16), 249),
--	PINMUX_IRQ(EXT_IRQ16L(14), 251),
--	PINMUX_IRQ(EXT_IRQ16L(9), 308),
-+	PINMUX_IRQ(irq_pin(19), 9),
-+	PINMUX_IRQ(irq_pin(1), 10),
-+	PINMUX_IRQ(irq_pin(0), 11),
-+	PINMUX_IRQ(irq_pin(18), 13),
-+	PINMUX_IRQ(irq_pin(20), 14),
-+	PINMUX_IRQ(irq_pin(21), 15),
-+	PINMUX_IRQ(irq_pin(31), 26),
-+	PINMUX_IRQ(irq_pin(30), 27),
-+	PINMUX_IRQ(irq_pin(29), 28),
-+	PINMUX_IRQ(irq_pin(22), 40),
-+	PINMUX_IRQ(irq_pin(23), 53),
-+	PINMUX_IRQ(irq_pin(10), 54),
-+	PINMUX_IRQ(irq_pin(9), 56),
-+	PINMUX_IRQ(irq_pin(26), 115),
-+	PINMUX_IRQ(irq_pin(27), 116),
-+	PINMUX_IRQ(irq_pin(28), 117),
-+	PINMUX_IRQ(irq_pin(24), 118),
-+	PINMUX_IRQ(irq_pin(6), 147),
-+	PINMUX_IRQ(irq_pin(2), 149),
-+	PINMUX_IRQ(irq_pin(7), 150),
-+	PINMUX_IRQ(irq_pin(12), 156),
-+	PINMUX_IRQ(irq_pin(4), 159),
-+	PINMUX_IRQ(irq_pin(25), 164),
-+	PINMUX_IRQ(irq_pin(8), 223),
-+	PINMUX_IRQ(irq_pin(3), 224),
-+	PINMUX_IRQ(irq_pin(5), 227),
-+	PINMUX_IRQ(irq_pin(17), 234),
-+	PINMUX_IRQ(irq_pin(11), 238),
-+	PINMUX_IRQ(irq_pin(13), 239),
-+	PINMUX_IRQ(irq_pin(16), 249),
-+	PINMUX_IRQ(irq_pin(14), 251),
-+	PINMUX_IRQ(irq_pin(9), 308),
- };
- 
- /* -----------------------------------------------------------------------------
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0558-sh-pfc-r8a7779-Add-I2C-pin-groups.patch b/patches.renesas/0558-sh-pfc-r8a7779-Add-I2C-pin-groups.patch
deleted file mode 100644
index 817dd5cbbc882..0000000000000
--- a/patches.renesas/0558-sh-pfc-r8a7779-Add-I2C-pin-groups.patch
+++ /dev/null
@@ -1,155 +0,0 @@
-From 3c60160b7123ea36e676a12f49deda44566f8632 Mon Sep 17 00:00:00 2001
-From: Phil Edworthy <phil.edworthy@renesas.com>
-Date: Wed, 17 Jul 2013 12:00:48 +0100
-Subject: sh-pfc: r8a7779: Add I2C pin groups
-
-Add all I2C pin groups to R8A7779 PFC driver.
-
-Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit 528e94773907b86adfd778019a9b7d35a7ab431e)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7779.c | 105 +++++++++++++++++++++++++++++++++++
- 1 file changed, 105 insertions(+)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7779.c b/drivers/pinctrl/sh-pfc/pfc-r8a7779.c
-index be832dcd..d3e94e30 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7779.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7779.c
-@@ -1674,6 +1674,79 @@ static const unsigned int hspi2_b_pins[] = {
- static const unsigned int hspi2_b_mux[] = {
- 	HSPI_CLK2_B_MARK, HSPI_CS2_B_MARK, HSPI_RX2_B_MARK, HSPI_TX2_B_MARK,
- };
-+/* - I2C1 ------------------------------------------------------------------ */
-+static const unsigned int i2c1_pins[] = {
-+	/* SCL, SDA, */
-+	RCAR_GP_PIN(0, 27), RCAR_GP_PIN(0, 28),
-+};
-+static const unsigned int i2c1_mux[] = {
-+	SCL1_MARK, SDA1_MARK,
-+};
-+static const unsigned int i2c1_b_pins[] = {
-+	/* SCL, SDA, */
-+	RCAR_GP_PIN(1, 10), RCAR_GP_PIN(1, 11),
-+};
-+static const unsigned int i2c1_b_mux[] = {
-+	SCL1_B_MARK, SDA1_B_MARK,
-+};
-+static const unsigned int i2c1_c_pins[] = {
-+	/* SCL, SDA, */
-+	RCAR_GP_PIN(3, 12), RCAR_GP_PIN(3, 13),
-+};
-+static const unsigned int i2c1_c_mux[] = {
-+	SCL1_C_MARK, SDA1_C_MARK,
-+};
-+static const unsigned int i2c1_d_pins[] = {
-+	/* SCL, SDA, */
-+	RCAR_GP_PIN(1, 26), RCAR_GP_PIN(1, 27),
-+};
-+static const unsigned int i2c1_d_mux[] = {
-+	SCL1_D_MARK, SDA1_D_MARK,
-+};
-+/* - I2C2 ------------------------------------------------------------------ */
-+static const unsigned int i2c2_pins[] = {
-+	/* SCL, SDA, */
-+	RCAR_GP_PIN(0, 25), RCAR_GP_PIN(0, 26),
-+};
-+static const unsigned int i2c2_mux[] = {
-+	SCL2_MARK, SDA2_MARK,
-+};
-+static const unsigned int i2c2_b_pins[] = {
-+	/* SCL, SDA, */
-+	RCAR_GP_PIN(1, 18), RCAR_GP_PIN(1, 19),
-+};
-+static const unsigned int i2c2_b_mux[] = {
-+	SCL2_B_MARK, SDA2_B_MARK,
-+};
-+static const unsigned int i2c2_c_pins[] = {
-+	/* SCL, SDA */
-+	RCAR_GP_PIN(0, 31), RCAR_GP_PIN(0, 30),
-+};
-+static const unsigned int i2c2_c_mux[] = {
-+	SCL2_C_MARK, SDA2_C_MARK,
-+};
-+static const unsigned int i2c2_d_pins[] = {
-+	/* SCL, SDA */
-+	RCAR_GP_PIN(1, 24), RCAR_GP_PIN(1, 25),
-+};
-+static const unsigned int i2c2_d_mux[] = {
-+	SCL2_D_MARK, SDA2_D_MARK,
-+};
-+/* - I2C3 ------------------------------------------------------------------ */
-+static const unsigned int i2c3_pins[] = {
-+	/* SCL, SDA, */
-+	RCAR_GP_PIN(3, 0), RCAR_GP_PIN(2, 30),
-+};
-+static const unsigned int i2c3_mux[] = {
-+	SCL3_MARK, SDA3_MARK,
-+};
-+static const unsigned int i2c3_b_pins[] = {
-+	/* SCL, SDA, */
-+	RCAR_GP_PIN(0, 29), RCAR_GP_PIN(0, 30),
-+};
-+static const unsigned int i2c3_b_mux[] = {
-+	SCL3_B_MARK, SDA3_B_MARK,
-+};
- /* - INTC ------------------------------------------------------------------- */
- static const unsigned int intc_irq0_pins[] = {
- 	/* IRQ */
-@@ -2543,6 +2616,16 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(hspi1_d),
- 	SH_PFC_PIN_GROUP(hspi2),
- 	SH_PFC_PIN_GROUP(hspi2_b),
-+	SH_PFC_PIN_GROUP(i2c1),
-+	SH_PFC_PIN_GROUP(i2c1_b),
-+	SH_PFC_PIN_GROUP(i2c1_c),
-+	SH_PFC_PIN_GROUP(i2c1_d),
-+	SH_PFC_PIN_GROUP(i2c2),
-+	SH_PFC_PIN_GROUP(i2c2_b),
-+	SH_PFC_PIN_GROUP(i2c2_c),
-+	SH_PFC_PIN_GROUP(i2c2_d),
-+	SH_PFC_PIN_GROUP(i2c3),
-+	SH_PFC_PIN_GROUP(i2c3_b),
- 	SH_PFC_PIN_GROUP(intc_irq0),
- 	SH_PFC_PIN_GROUP(intc_irq0_b),
- 	SH_PFC_PIN_GROUP(intc_irq1),
-@@ -2703,6 +2786,25 @@ static const char * const hspi2_groups[] = {
- 	"hspi2_b",
- };
- 
-+static const char * const i2c1_groups[] = {
-+	"i2c1",
-+	"i2c1_b",
-+	"i2c1_c",
-+	"i2c1_d",
-+};
-+
-+static const char * const i2c2_groups[] = {
-+	"i2c2",
-+	"i2c2_b",
-+	"i2c2_c",
-+	"i2c2_d",
-+};
-+
-+static const char * const i2c3_groups[] = {
-+	"i2c3",
-+	"i2c3_b",
-+};
-+
- static const char * const intc_groups[] = {
- 	"intc_irq0",
- 	"intc_irq0_b",
-@@ -2886,6 +2988,9 @@ static const struct sh_pfc_function pinmux_functions[] = {
- 	SH_PFC_FUNCTION(hspi0),
- 	SH_PFC_FUNCTION(hspi1),
- 	SH_PFC_FUNCTION(hspi2),
-+	SH_PFC_FUNCTION(i2c1),
-+	SH_PFC_FUNCTION(i2c2),
-+	SH_PFC_FUNCTION(i2c3),
- 	SH_PFC_FUNCTION(intc),
- 	SH_PFC_FUNCTION(lbsc),
- 	SH_PFC_FUNCTION(mmc0),
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0559-sh-pfc-r8a7790-Rename-I2C-SDA-SCL-pins.patch b/patches.renesas/0559-sh-pfc-r8a7790-Rename-I2C-SDA-SCL-pins.patch
deleted file mode 100644
index e5a1872047dd2..0000000000000
--- a/patches.renesas/0559-sh-pfc-r8a7790-Rename-I2C-SDA-SCL-pins.patch
+++ /dev/null
@@ -1,558 +0,0 @@
-From a3b3f6c7149a441940602b15e3b7ccf0ffb02d72 Mon Sep 17 00:00:00 2001
-From: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
-Date: Wed, 22 May 2013 19:46:16 +0900
-Subject: sh-pfc: r8a7790: Rename I2C SDA/SCL pins
-
-The I2C pins have been renamed in the datasheet, rename them here as
-well.
-
-Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit c4721249dd15684d97af76b2b10073baff90959e)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 208 +++++++++++++++++------------------
- 1 file changed, 104 insertions(+), 104 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-index 95b38faf..3ddebc6b 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-@@ -111,9 +111,9 @@ enum {
- 	FN_VI0_R0, FN_VI0_R0_B, FN_RX0_B, FN_D5,
- 	FN_SCIFB1_TXD_F, FN_SCIFB0_TXD_C, FN_VI3_DATA5,
- 	FN_VI0_R1, FN_VI0_R1_B, FN_TX0_B, FN_D6,
--	FN_SCL2_C, FN_VI3_DATA6, FN_VI0_R2, FN_VI0_R2_B,
--	FN_SCL2_CIS_C, FN_D7, FN_AD_DI_B, FN_SDA2_C,
--	FN_VI3_DATA7, FN_VI0_R3, FN_VI0_R3_B, FN_SDA2_CIS_C,
-+	FN_IIC2_SCL_C, FN_VI3_DATA6, FN_VI0_R2, FN_VI0_R2_B,
-+	FN_I2C2_SCL_C, FN_D7, FN_AD_DI_B, FN_IIC2_SDA_C,
-+	FN_VI3_DATA7, FN_VI0_R3, FN_VI0_R3_B, FN_I2C2_SDA_C,
- 	FN_D8, FN_SCIFA1_SCK_C, FN_AVB_TXD0, FN_MII_TXD0,
- 	FN_VI0_G0, FN_VI0_G0_B, FN_VI2_DATA0_VI2_B0,
- 
-@@ -182,11 +182,11 @@ enum {
- 	/* IPSR5 */
- 	FN_EX_CS3_N, FN_GPS_MAG, FN_VI3_FIELD, FN_VI1_G1, FN_VI1_G1_B,
- 	FN_VI2_R3, FN_EX_CS4_N, FN_MSIOF1_SCK_B, FN_VI3_HSYNC_N,
--	FN_VI2_HSYNC_N, FN_SCL1, FN_VI2_HSYNC_N_B,
--	FN_INTC_EN0_N, FN_SCL1_CIS, FN_EX_CS5_N, FN_CAN0_RX,
-+	FN_VI2_HSYNC_N, FN_IIC1_SCL, FN_VI2_HSYNC_N_B,
-+	FN_INTC_EN0_N, FN_I2C1_SCL, FN_EX_CS5_N, FN_CAN0_RX,
- 	FN_MSIOF1_RXD_B, FN_VI3_VSYNC_N, FN_VI1_G2,
--	FN_VI1_G2_B, FN_VI2_R4, FN_SDA1, FN_INTC_EN1_N,
--	FN_SDA1_CIS, FN_BS_N, FN_IETX, FN_HTX1_B,
-+	FN_VI1_G2_B, FN_VI2_R4, FN_IIC1_SDA, FN_INTC_EN1_N,
-+	FN_I2C1_SDA, FN_BS_N, FN_IETX, FN_HTX1_B,
- 	FN_CAN1_TX, FN_DRACK0, FN_IETX_C, FN_RD_N,
- 	FN_CAN0_TX, FN_SCIFA0_SCK_B, FN_RD_WR_N, FN_VI1_G3,
- 	FN_VI1_G3_B, FN_VI2_R5, FN_SCIFA0_RXD_B,
-@@ -210,10 +210,10 @@ enum {
- 	FN_MSIOF0_TXD_B, FN_DACK2, FN_IRQ2, FN_INTC_IRQ2_N,
- 	FN_SSI_SDATA6_B, FN_HRTS0_N_B, FN_MSIOF0_RXD_B,
- 	FN_ETH_CRS_DV, FN_RMII_CRS_DV, FN_STP_ISCLK_0_B,
--	FN_TS_SDEN0_D, FN_GLO_Q0_C, FN_SCL2_E,
--	FN_SCL2_CIS_E, FN_ETH_RX_ER, FN_RMII_RX_ER,
-+	FN_TS_SDEN0_D, FN_GLO_Q0_C, FN_IIC2_SCL_E,
-+	FN_I2C2_SCL_E, FN_ETH_RX_ER, FN_RMII_RX_ER,
- 	FN_STP_ISD_0_B, FN_TS_SPSYNC0_D, FN_GLO_Q1_C,
--	FN_SDA2_E, FN_SDA2_CIS_E, FN_ETH_RXD0, FN_RMII_RXD0,
-+	FN_IIC2_SDA_E, FN_I2C2_SDA_E, FN_ETH_RXD0, FN_RMII_RXD0,
- 	FN_STP_ISEN_0_B, FN_TS_SDAT0_D, FN_GLO_I0_C,
- 	FN_SCIFB1_SCK_G, FN_SCK1_E, FN_ETH_RXD1,
- 	FN_RMII_RXD1, FN_HRX0_E, FN_STP_ISSYNC_0_B,
-@@ -269,11 +269,11 @@ enum {
- 	FN_SD0_DAT2, FN_SCIFB1_CTS_N_B, FN_VI1_DATA4_VI1_B4_B,
- 	FN_SD0_DAT3, FN_SCIFB1_RTS_N_B, FN_VI1_DATA5_VI1_B5_B,
- 	FN_SD0_CD, FN_MMC0_D6, FN_TS_SDEN0_B, FN_USB0_EXTP,
--	FN_GLO_SCLK, FN_VI1_DATA6_VI1_B6_B, FN_SCL1_B,
--	FN_SCL1_CIS_B, FN_VI2_DATA6_VI2_B6_B, FN_SD0_WP,
-+	FN_GLO_SCLK, FN_VI1_DATA6_VI1_B6_B, FN_IIC1_SCL_B,
-+	FN_I2C1_SCL_B, FN_VI2_DATA6_VI2_B6_B, FN_SD0_WP,
- 	FN_MMC0_D7, FN_TS_SPSYNC0_B, FN_USB0_IDIN,
--	FN_GLO_SDATA, FN_VI1_DATA7_VI1_B7_B, FN_SDA1_B,
--	FN_SDA1_CIS_B, FN_VI2_DATA7_VI2_B7_B, FN_SD1_CLK,
-+	FN_GLO_SDATA, FN_VI1_DATA7_VI1_B7_B, FN_IIC1_SDA_B,
-+	FN_I2C1_SDA_B, FN_VI2_DATA7_VI2_B7_B, FN_SD1_CLK,
- 	FN_AVB_TX_EN, FN_MII_TX_EN, FN_SD1_CMD,
- 	FN_AVB_TX_ER, FN_MII_TX_ER, FN_SCIFB0_SCK_B,
- 	FN_SD1_DAT0, FN_AVB_TX_CLK, FN_MII_TX_CLK,
-@@ -283,12 +283,12 @@ enum {
- 	FN_SD1_DAT3, FN_AVB_RXD0, FN_MII_RXD0,
- 	FN_SCIFB0_RTS_N_B, FN_SD1_CD, FN_MMC1_D6,
- 	FN_TS_SDEN1, FN_USB1_EXTP, FN_GLO_SS, FN_VI0_CLK_B,
--	FN_SCL2_D, FN_SCL2_CIS_D, FN_SIM0_CLK_B,
-+	FN_IIC2_SCL_D, FN_I2C2_SCL_D, FN_SIM0_CLK_B,
- 	FN_VI3_CLK_B,
- 
- 	/* IPSR10 */
- 	FN_SD1_WP, FN_MMC1_D7, FN_TS_SPSYNC1, FN_USB1_IDIN,
--	FN_GLO_RFON, FN_VI1_CLK_B, FN_SDA2_D, FN_SDA2_CIS_D,
-+	FN_GLO_RFON, FN_VI1_CLK_B, FN_IIC2_SDA_D, FN_I2C2_SDA_D,
- 	FN_SIM0_D_B, FN_SD2_CLK, FN_MMC0_CLK, FN_SIM0_CLK,
- 	FN_VI0_DATA0_VI0_B0_B, FN_TS_SDEN0_C, FN_GLO_SCLK_B,
- 	FN_VI3_DATA0_B, FN_SD2_CMD, FN_MMC0_CMD, FN_SIM0_D,
-@@ -322,9 +322,9 @@ enum {
- 	FN_VSP, FN_GLO_Q0, FN_SIM0_RST_B, FN_SD3_WP,
- 	FN_MMC1_D5, FN_TS_SCK1, FN_GLO_Q1, FN_FMIN_C,
- 	FN_RDS_DATA_B, FN_FMIN_E, FN_RDS_DATA_D, FN_FMIN_F,
--	FN_RDS_DATA_E, FN_MLB_CLK, FN_SCL2_B, FN_SCL2_CIS_B,
--	FN_MLB_SIG, FN_SCIFB1_RXD_D, FN_RX1_C, FN_SDA2_B,
--	FN_SDA2_CIS_B, FN_MLB_DAT, FN_SPV_EVEN,
-+	FN_RDS_DATA_E, FN_MLB_CLK, FN_IIC2_SCL_B, FN_I2C2_SCL_B,
-+	FN_MLB_SIG, FN_SCIFB1_RXD_D, FN_RX1_C, FN_IIC2_SDA_B,
-+	FN_I2C2_SDA_B, FN_MLB_DAT, FN_SPV_EVEN,
- 	FN_SCIFB1_TXD_D, FN_TX1_C, FN_BPFCLK_C,
- 	FN_RDS_CLK_B, FN_SSI_SCK0129, FN_CAN_CLK_B,
- 	FN_MOUT0,
-@@ -378,12 +378,12 @@ enum {
- 	FN_AUDIO_CLKB, FN_SCIF_CLK, FN_CAN0_RX_D,
- 	FN_DVC_MUTE, FN_CAN0_RX_C, FN_CAN_DEBUGOUT15,
- 	FN_REMOCON, FN_SCIFA0_SCK, FN_HSCK1, FN_SCK0,
--	FN_MSIOF3_SS2, FN_DU2_DG2, FN_LCDOUT10, FN_SDA1_C,
--	FN_SDA1_CIS_C, FN_SCIFA0_RXD, FN_HRX1, FN_RX0,
-+	FN_MSIOF3_SS2, FN_DU2_DG2, FN_LCDOUT10, FN_IIC1_SDA_C,
-+	FN_I2C1_SDA_C, FN_SCIFA0_RXD, FN_HRX1, FN_RX0,
- 	FN_DU2_DR0, FN_LCDOUT0, FN_SCIFA0_TXD, FN_HTX1,
- 	FN_TX0, FN_DU2_DR1, FN_LCDOUT1, FN_SCIFA0_CTS_N,
- 	FN_HCTS1_N, FN_CTS0_N, FN_MSIOF3_SYNC, FN_DU2_DG3,
--	FN_LCDOUT11, FN_PWM0_B, FN_SCL1_C, FN_SCL1_CIS_C,
-+	FN_LCDOUT11, FN_PWM0_B, FN_IIC1_SCL_C, FN_I2C1_SCL_C,
- 	FN_SCIFA0_RTS_N, FN_HRTS1_N, FN_RTS0_N_TANS,
- 	FN_MSIOF3_SS1, FN_DU2_DG0, FN_LCDOUT8, FN_PWM1_B,
- 	FN_SCIFA1_RXD, FN_AD_DI, FN_RX1,
-@@ -398,9 +398,9 @@ enum {
- 	/* IPSR15 */
- 	FN_SCIFA2_SCK, FN_FMCLK, FN_MSIOF3_SCK, FN_DU2_DG7,
- 	FN_LCDOUT15, FN_SCIF_CLK_B, FN_SCIFA2_RXD, FN_FMIN,
--	FN_DU2_DB0, FN_LCDOUT16, FN_SCL2, FN_SCL2_CIS,
-+	FN_DU2_DB0, FN_LCDOUT16, FN_IIC2_SCL, FN_I2C2_SCL,
- 	FN_SCIFA2_TXD, FN_BPFCLK, FN_DU2_DB1, FN_LCDOUT17,
--	FN_SDA2, FN_SDA2_CIS, FN_HSCK0, FN_TS_SDEN0,
-+	FN_IIC2_SDA, FN_I2C2_SDA, FN_HSCK0, FN_TS_SDEN0,
- 	FN_DU2_DG4, FN_LCDOUT12, FN_HCTS0_N_C, FN_HRX0,
- 	FN_DU2_DB2, FN_LCDOUT18, FN_HTX0, FN_DU2_DB3,
- 	FN_LCDOUT19, FN_HCTS0_N, FN_SSI_SCK9, FN_DU2_DB4,
-@@ -491,9 +491,9 @@ enum {
- 	VI0_R0_MARK, VI0_R0_B_MARK, RX0_B_MARK, D5_MARK,
- 	SCIFB1_TXD_F_MARK, SCIFB0_TXD_C_MARK, VI3_DATA5_MARK,
- 	VI0_R1_MARK, VI0_R1_B_MARK, TX0_B_MARK, D6_MARK,
--	SCL2_C_MARK, VI3_DATA6_MARK, VI0_R2_MARK, VI0_R2_B_MARK,
--	SCL2_CIS_C_MARK, D7_MARK, AD_DI_B_MARK, SDA2_C_MARK,
--	VI3_DATA7_MARK, VI0_R3_MARK, VI0_R3_B_MARK, SDA2_CIS_C_MARK,
-+	IIC2_SCL_C_MARK, VI3_DATA6_MARK, VI0_R2_MARK, VI0_R2_B_MARK,
-+	I2C2_SCL_C_MARK, D7_MARK, AD_DI_B_MARK, IIC2_SDA_C_MARK,
-+	VI3_DATA7_MARK, VI0_R3_MARK, VI0_R3_B_MARK, I2C2_SDA_C_MARK,
- 	D8_MARK, SCIFA1_SCK_C_MARK, AVB_TXD0_MARK, MII_TXD0_MARK,
- 	VI0_G0_MARK, VI0_G0_B_MARK, VI2_DATA0_VI2_B0_MARK,
- 
-@@ -558,11 +558,11 @@ enum {
- 	EX_CS3_N_MARK, GPS_MAG_MARK, VI3_FIELD_MARK,
- 	VI1_G1_MARK, VI1_G1_B_MARK, VI2_R3_MARK,
- 	EX_CS4_N_MARK, MSIOF1_SCK_B_MARK, VI3_HSYNC_N_MARK,
--	VI2_HSYNC_N_MARK, SCL1_MARK, VI2_HSYNC_N_B_MARK,
--	INTC_EN0_N_MARK, SCL1_CIS_MARK, EX_CS5_N_MARK, CAN0_RX_MARK,
-+	VI2_HSYNC_N_MARK, IIC1_SCL_MARK, VI2_HSYNC_N_B_MARK,
-+	INTC_EN0_N_MARK, I2C1_SCL_MARK, EX_CS5_N_MARK, CAN0_RX_MARK,
- 	MSIOF1_RXD_B_MARK, VI3_VSYNC_N_MARK, VI1_G2_MARK,
--	VI1_G2_B_MARK, VI2_R4_MARK, SDA1_MARK, INTC_EN1_N_MARK,
--	SDA1_CIS_MARK, BS_N_MARK, IETX_MARK, HTX1_B_MARK,
-+	VI1_G2_B_MARK, VI2_R4_MARK, IIC1_SDA_MARK, INTC_EN1_N_MARK,
-+	I2C1_SDA_MARK, BS_N_MARK, IETX_MARK, HTX1_B_MARK,
- 	CAN1_TX_MARK, DRACK0_MARK, IETX_C_MARK, RD_N_MARK,
- 	CAN0_TX_MARK, SCIFA0_SCK_B_MARK, RD_WR_N_MARK, VI1_G3_MARK,
- 	VI1_G3_B_MARK, VI2_R5_MARK, SCIFA0_RXD_B_MARK,
-@@ -585,10 +585,10 @@ enum {
- 	MSIOF0_TXD_B_MARK, DACK2_MARK, IRQ2_MARK, INTC_IRQ2_N_MARK,
- 	SSI_SDATA6_B_MARK, HRTS0_N_B_MARK, MSIOF0_RXD_B_MARK,
- 	ETH_CRS_DV_MARK, RMII_CRS_DV_MARK, STP_ISCLK_0_B_MARK,
--	TS_SDEN0_D_MARK, GLO_Q0_C_MARK, SCL2_E_MARK,
--	SCL2_CIS_E_MARK, ETH_RX_ER_MARK, RMII_RX_ER_MARK,
-+	TS_SDEN0_D_MARK, GLO_Q0_C_MARK, IIC2_SCL_E_MARK,
-+	I2C2_SCL_E_MARK, ETH_RX_ER_MARK, RMII_RX_ER_MARK,
- 	STP_ISD_0_B_MARK, TS_SPSYNC0_D_MARK, GLO_Q1_C_MARK,
--	SDA2_E_MARK, SDA2_CIS_E_MARK, ETH_RXD0_MARK, RMII_RXD0_MARK,
-+	IIC2_SDA_E_MARK, I2C2_SDA_E_MARK, ETH_RXD0_MARK, RMII_RXD0_MARK,
- 	STP_ISEN_0_B_MARK, TS_SDAT0_D_MARK, GLO_I0_C_MARK,
- 	SCIFB1_SCK_G_MARK, SCK1_E_MARK, ETH_RXD1_MARK,
- 	RMII_RXD1_MARK, HRX0_E_MARK, STP_ISSYNC_0_B_MARK,
-@@ -641,11 +641,11 @@ enum {
- 	SD0_DAT2_MARK, SCIFB1_CTS_N_B_MARK, VI1_DATA4_VI1_B4_B_MARK,
- 	SD0_DAT3_MARK, SCIFB1_RTS_N_B_MARK, VI1_DATA5_VI1_B5_B_MARK,
- 	SD0_CD_MARK, MMC0_D6_MARK, TS_SDEN0_B_MARK, USB0_EXTP_MARK,
--	GLO_SCLK_MARK, VI1_DATA6_VI1_B6_B_MARK, SCL1_B_MARK,
--	SCL1_CIS_B_MARK, VI2_DATA6_VI2_B6_B_MARK, SD0_WP_MARK,
-+	GLO_SCLK_MARK, VI1_DATA6_VI1_B6_B_MARK, IIC1_SCL_B_MARK,
-+	I2C1_SCL_B_MARK, VI2_DATA6_VI2_B6_B_MARK, SD0_WP_MARK,
- 	MMC0_D7_MARK, TS_SPSYNC0_B_MARK, USB0_IDIN_MARK,
--	GLO_SDATA_MARK, VI1_DATA7_VI1_B7_B_MARK, SDA1_B_MARK,
--	SDA1_CIS_B_MARK, VI2_DATA7_VI2_B7_B_MARK, SD1_CLK_MARK,
-+	GLO_SDATA_MARK, VI1_DATA7_VI1_B7_B_MARK, IIC1_SDA_B_MARK,
-+	I2C1_SDA_B_MARK, VI2_DATA7_VI2_B7_B_MARK, SD1_CLK_MARK,
- 	AVB_TX_EN_MARK, MII_TX_EN_MARK, SD1_CMD_MARK,
- 	AVB_TX_ER_MARK, MII_TX_ER_MARK, SCIFB0_SCK_B_MARK,
- 	SD1_DAT0_MARK, AVB_TX_CLK_MARK, MII_TX_CLK_MARK,
-@@ -655,11 +655,11 @@ enum {
- 	SD1_DAT3_MARK, AVB_RXD0_MARK, MII_RXD0_MARK,
- 	SCIFB0_RTS_N_B_MARK, SD1_CD_MARK, MMC1_D6_MARK,
- 	TS_SDEN1_MARK, USB1_EXTP_MARK, GLO_SS_MARK, VI0_CLK_B_MARK,
--	SCL2_D_MARK, SCL2_CIS_D_MARK, SIM0_CLK_B_MARK,
-+	IIC2_SCL_D_MARK, I2C2_SCL_D_MARK, SIM0_CLK_B_MARK,
- 	VI3_CLK_B_MARK,
- 
- 	SD1_WP_MARK, MMC1_D7_MARK, TS_SPSYNC1_MARK, USB1_IDIN_MARK,
--	GLO_RFON_MARK, VI1_CLK_B_MARK, SDA2_D_MARK, SDA2_CIS_D_MARK,
-+	GLO_RFON_MARK, VI1_CLK_B_MARK, IIC2_SDA_D_MARK, I2C2_SDA_D_MARK,
- 	SIM0_D_B_MARK, SD2_CLK_MARK, MMC0_CLK_MARK, SIM0_CLK_MARK,
- 	VI0_DATA0_VI0_B0_B_MARK, TS_SDEN0_C_MARK, GLO_SCLK_B_MARK,
- 	VI3_DATA0_B_MARK, SD2_CMD_MARK, MMC0_CMD_MARK, SIM0_D_MARK,
-@@ -692,9 +692,9 @@ enum {
- 	VSP_MARK, GLO_Q0_MARK, SIM0_RST_B_MARK, SD3_WP_MARK,
- 	MMC1_D5_MARK, TS_SCK1_MARK, GLO_Q1_MARK, FMIN_C_MARK,
- 	RDS_DATA_B_MARK, FMIN_E_MARK, RDS_DATA_D_MARK, FMIN_F_MARK,
--	RDS_DATA_E_MARK, MLB_CLK_MARK, SCL2_B_MARK, SCL2_CIS_B_MARK,
--	MLB_SIG_MARK, SCIFB1_RXD_D_MARK, RX1_C_MARK, SDA2_B_MARK,
--	SDA2_CIS_B_MARK, MLB_DAT_MARK, SPV_EVEN_MARK,
-+	RDS_DATA_E_MARK, MLB_CLK_MARK, IIC2_SCL_B_MARK, I2C2_SCL_B_MARK,
-+	MLB_SIG_MARK, SCIFB1_RXD_D_MARK, RX1_C_MARK, IIC2_SDA_B_MARK,
-+	I2C2_SDA_B_MARK, MLB_DAT_MARK, SPV_EVEN_MARK,
- 	SCIFB1_TXD_D_MARK, TX1_C_MARK, BPFCLK_C_MARK,
- 	RDS_CLK_B_MARK, SSI_SCK0129_MARK, CAN_CLK_B_MARK,
- 	MOUT0_MARK,
-@@ -745,12 +745,12 @@ enum {
- 	AUDIO_CLKB_MARK, SCIF_CLK_MARK, CAN0_RX_D_MARK,
- 	DVC_MUTE_MARK, CAN0_RX_C_MARK, CAN_DEBUGOUT15_MARK,
- 	REMOCON_MARK, SCIFA0_SCK_MARK, HSCK1_MARK, SCK0_MARK,
--	MSIOF3_SS2_MARK, DU2_DG2_MARK, LCDOUT10_MARK, SDA1_C_MARK,
--	SDA1_CIS_C_MARK, SCIFA0_RXD_MARK, HRX1_MARK, RX0_MARK,
-+	MSIOF3_SS2_MARK, DU2_DG2_MARK, LCDOUT10_MARK, IIC1_SDA_C_MARK,
-+	I2C1_SDA_C_MARK, SCIFA0_RXD_MARK, HRX1_MARK, RX0_MARK,
- 	DU2_DR0_MARK, LCDOUT0_MARK, SCIFA0_TXD_MARK, HTX1_MARK,
- 	TX0_MARK, DU2_DR1_MARK, LCDOUT1_MARK, SCIFA0_CTS_N_MARK,
- 	HCTS1_N_MARK, CTS0_N_MARK, MSIOF3_SYNC_MARK, DU2_DG3_MARK,
--	LCDOUT11_MARK, PWM0_B_MARK, SCL1_C_MARK, SCL1_CIS_C_MARK,
-+	LCDOUT11_MARK, PWM0_B_MARK, IIC1_SCL_C_MARK, I2C1_SCL_C_MARK,
- 	SCIFA0_RTS_N_MARK, HRTS1_N_MARK, RTS0_N_TANS_MARK,
- 	MSIOF3_SS1_MARK, DU2_DG0_MARK, LCDOUT8_MARK, PWM1_B_MARK,
- 	SCIFA1_RXD_MARK, AD_DI_MARK, RX1_MARK,
-@@ -764,9 +764,9 @@ enum {
- 
- 	SCIFA2_SCK_MARK, FMCLK_MARK, MSIOF3_SCK_MARK, DU2_DG7_MARK,
- 	LCDOUT15_MARK, SCIF_CLK_B_MARK, SCIFA2_RXD_MARK, FMIN_MARK,
--	DU2_DB0_MARK, LCDOUT16_MARK, SCL2_MARK, SCL2_CIS_MARK,
-+	DU2_DB0_MARK, LCDOUT16_MARK, IIC2_SCL_MARK, I2C2_SCL_MARK,
- 	SCIFA2_TXD_MARK, BPFCLK_MARK, DU2_DB1_MARK, LCDOUT17_MARK,
--	SDA2_MARK, SDA2_CIS_MARK, HSCK0_MARK, TS_SDEN0_MARK,
-+	IIC2_SDA_MARK, I2C2_SDA_MARK, HSCK0_MARK, TS_SDEN0_MARK,
- 	DU2_DG4_MARK, LCDOUT12_MARK, HCTS0_N_C_MARK, HRX0_MARK,
- 	DU2_DB2_MARK, LCDOUT18_MARK, HTX0_MARK, DU2_DB3_MARK,
- 	LCDOUT19_MARK, HCTS0_N_MARK, SSI_SCK9_MARK, DU2_DB4_MARK,
-@@ -835,18 +835,18 @@ static const u16 pinmux_data[] = {
- 	PINMUX_IPSR_MODSEL_DATA(IP0_19_16, VI0_R1_B, SEL_VI0_1),
- 	PINMUX_IPSR_MODSEL_DATA(IP0_19_16, TX0_B, SEL_SCIF0_1),
- 	PINMUX_IPSR_DATA(IP0_22_20, D6),
--	PINMUX_IPSR_MODSEL_DATA(IP0_22_20, SCL2_C, SEL_IIC2_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP0_22_20, IIC2_SCL_C, SEL_IIC2_2),
- 	PINMUX_IPSR_MODSEL_DATA(IP0_22_20, VI3_DATA6, SEL_VI3_0),
- 	PINMUX_IPSR_MODSEL_DATA(IP0_22_20, VI0_R2, SEL_VI0_0),
- 	PINMUX_IPSR_MODSEL_DATA(IP0_22_20, VI0_R2_B, SEL_VI0_1),
--	PINMUX_IPSR_MODSEL_DATA(IP0_22_20, SCL2_CIS_C, SEL_I2C2_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP0_22_20, I2C2_SCL_C, SEL_I2C2_2),
- 	PINMUX_IPSR_DATA(IP0_26_23, D7),
- 	PINMUX_IPSR_MODSEL_DATA(IP0_26_23, AD_DI_B, SEL_ADI_1),
--	PINMUX_IPSR_MODSEL_DATA(IP0_26_23, SDA2_C, SEL_IIC2_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP0_26_23, IIC2_SDA_C, SEL_IIC2_2),
- 	PINMUX_IPSR_MODSEL_DATA(IP0_26_23, VI3_DATA7, SEL_VI3_0),
- 	PINMUX_IPSR_MODSEL_DATA(IP0_26_23, VI0_R3, SEL_VI0_0),
- 	PINMUX_IPSR_MODSEL_DATA(IP0_26_23, VI0_R3_B, SEL_VI0_1),
--	PINMUX_IPSR_MODSEL_DATA(IP0_26_23, SDA2_CIS_C, SEL_I2C2_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP0_26_23, I2C2_SDA_C, SEL_I2C2_2),
- 	PINMUX_IPSR_DATA(IP0_30_27, D8),
- 	PINMUX_IPSR_MODSEL_DATA(IP0_30_27, SCIFA1_SCK_C, SEL_SCIFA1_2),
- 	PINMUX_IPSR_DATA(IP0_30_27, AVB_TXD0),
-@@ -1063,10 +1063,10 @@ static const u16 pinmux_data[] = {
- 	PINMUX_IPSR_MODSEL_DATA(IP5_5_3, MSIOF1_SCK_B, SEL_SOF1_1),
- 	PINMUX_IPSR_DATA(IP5_5_3, VI3_HSYNC_N),
- 	PINMUX_IPSR_MODSEL_DATA(IP5_5_3, VI2_HSYNC_N, SEL_VI2_0),
--	PINMUX_IPSR_MODSEL_DATA(IP5_5_3, SCL1, SEL_IIC1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_5_3, IIC1_SCL, SEL_IIC1_0),
- 	PINMUX_IPSR_MODSEL_DATA(IP5_5_3, VI2_HSYNC_N_B, SEL_VI2_1),
- 	PINMUX_IPSR_DATA(IP5_5_3, INTC_EN0_N),
--	PINMUX_IPSR_MODSEL_DATA(IP5_5_3, SCL1_CIS, SEL_I2C1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_5_3, I2C1_SCL, SEL_I2C1_0),
- 	PINMUX_IPSR_DATA(IP5_9_6, EX_CS5_N),
- 	PINMUX_IPSR_MODSEL_DATA(IP5_9_6, CAN0_RX, SEL_CAN0_0),
- 	PINMUX_IPSR_MODSEL_DATA(IP5_9_6, MSIOF1_RXD_B, SEL_SOF1_1),
-@@ -1074,9 +1074,9 @@ static const u16 pinmux_data[] = {
- 	PINMUX_IPSR_MODSEL_DATA(IP5_9_6, VI1_G2, SEL_VI1_0),
- 	PINMUX_IPSR_MODSEL_DATA(IP5_9_6, VI1_G2_B, SEL_VI1_1),
- 	PINMUX_IPSR_DATA(IP5_9_6, VI2_R4),
--	PINMUX_IPSR_MODSEL_DATA(IP5_9_6, SDA1, SEL_IIC1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_9_6, IIC1_SDA, SEL_IIC1_0),
- 	PINMUX_IPSR_DATA(IP5_9_6, INTC_EN1_N),
--	PINMUX_IPSR_MODSEL_DATA(IP5_9_6, SDA1_CIS, SEL_I2C1_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_9_6, I2C1_SDA, SEL_I2C1_0),
- 	PINMUX_IPSR_DATA(IP5_12_10, BS_N),
- 	PINMUX_IPSR_MODSEL_DATA(IP5_12_10, IETX, SEL_IEB_0),
- 	PINMUX_IPSR_MODSEL_DATA(IP5_12_10, HTX1_B, SEL_HSCIF1_1),
-@@ -1152,15 +1152,15 @@ static const u16 pinmux_data[] = {
- 	PINMUX_IPSR_MODSEL_DATA(IP6_16_14, STP_ISCLK_0_B, SEL_SSP_1),
- 	PINMUX_IPSR_MODSEL_DATA(IP6_16_14, TS_SDEN0_D, SEL_TSIF0_3),
- 	PINMUX_IPSR_MODSEL_DATA(IP6_16_14, GLO_Q0_C, SEL_GPS_2),
--	PINMUX_IPSR_MODSEL_DATA(IP6_16_14, SCL2_E, SEL_IIC2_4),
--	PINMUX_IPSR_MODSEL_DATA(IP6_16_14, SCL2_CIS_E, SEL_I2C2_4),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_16_14, IIC2_SCL_E, SEL_IIC2_4),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_16_14, I2C2_SCL_E, SEL_I2C2_4),
- 	PINMUX_IPSR_DATA(IP6_19_17, ETH_RX_ER),
- 	PINMUX_IPSR_DATA(IP6_19_17, RMII_RX_ER),
- 	PINMUX_IPSR_MODSEL_DATA(IP6_19_17, STP_ISD_0_B, SEL_SSP_1),
- 	PINMUX_IPSR_MODSEL_DATA(IP6_19_17, TS_SPSYNC0_D, SEL_TSIF0_3),
- 	PINMUX_IPSR_MODSEL_DATA(IP6_19_17, GLO_Q1_C, SEL_GPS_2),
--	PINMUX_IPSR_MODSEL_DATA(IP6_19_17, SDA2_E, SEL_IIC2_4),
--	PINMUX_IPSR_MODSEL_DATA(IP6_19_17, SDA2_CIS_E, SEL_I2C2_4),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_19_17, IIC2_SDA_E, SEL_IIC2_4),
-+	PINMUX_IPSR_MODSEL_DATA(IP6_19_17, I2C2_SDA_E, SEL_I2C2_4),
- 	PINMUX_IPSR_DATA(IP6_22_20, ETH_RXD0),
- 	PINMUX_IPSR_DATA(IP6_22_20, RMII_RXD0),
- 	PINMUX_IPSR_MODSEL_DATA(IP6_22_20, STP_ISEN_0_B, SEL_SSP_1),
-@@ -1315,8 +1315,8 @@ static const u16 pinmux_data[] = {
- 	PINMUX_IPSR_DATA(IP9_11_8, USB0_EXTP),
- 	PINMUX_IPSR_MODSEL_DATA(IP9_11_8, GLO_SCLK, SEL_GPS_0),
- 	PINMUX_IPSR_MODSEL_DATA(IP9_11_8, VI1_DATA6_VI1_B6_B, SEL_VI1_1),
--	PINMUX_IPSR_MODSEL_DATA(IP9_11_8, SCL1_B, SEL_IIC1_1),
--	PINMUX_IPSR_MODSEL_DATA(IP9_11_8, SCL1_CIS_B, SEL_I2C1_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_11_8, IIC1_SCL_B, SEL_IIC1_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_11_8, I2C1_SCL_B, SEL_I2C1_1),
- 	PINMUX_IPSR_MODSEL_DATA(IP9_11_8, VI2_DATA6_VI2_B6_B, SEL_VI2_1),
- 	PINMUX_IPSR_DATA(IP9_15_12, SD0_WP),
- 	PINMUX_IPSR_DATA(IP9_15_12, MMC0_D7),
-@@ -1324,8 +1324,8 @@ static const u16 pinmux_data[] = {
- 	PINMUX_IPSR_DATA(IP9_15_12, USB0_IDIN),
- 	PINMUX_IPSR_MODSEL_DATA(IP9_15_12, GLO_SDATA, SEL_GPS_0),
- 	PINMUX_IPSR_MODSEL_DATA(IP9_15_12, VI1_DATA7_VI1_B7_B, SEL_VI1_1),
--	PINMUX_IPSR_MODSEL_DATA(IP9_15_12, SDA1_B, SEL_IIC1_1),
--	PINMUX_IPSR_MODSEL_DATA(IP9_15_12, SDA1_CIS_B, SEL_I2C1_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_15_12, IIC1_SDA_B, SEL_IIC1_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_15_12, I2C1_SDA_B, SEL_I2C1_1),
- 	PINMUX_IPSR_MODSEL_DATA(IP9_15_12, VI2_DATA7_VI2_B7_B, SEL_VI2_1),
- 	PINMUX_IPSR_DATA(IP9_17_16, SD1_CLK),
- 	PINMUX_IPSR_DATA(IP9_17_16, AVB_TX_EN),
-@@ -1356,8 +1356,8 @@ static const u16 pinmux_data[] = {
- 	PINMUX_IPSR_DATA(IP9_31_28, USB1_EXTP),
- 	PINMUX_IPSR_MODSEL_DATA(IP9_31_28, GLO_SS, SEL_GPS_0),
- 	PINMUX_IPSR_MODSEL_DATA(IP9_31_28, VI0_CLK_B, SEL_VI0_1),
--	PINMUX_IPSR_MODSEL_DATA(IP9_31_28, SCL2_D, SEL_IIC2_3),
--	PINMUX_IPSR_MODSEL_DATA(IP9_31_28, SCL2_CIS_D, SEL_I2C2_3),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_31_28, IIC2_SCL_D, SEL_IIC2_3),
-+	PINMUX_IPSR_MODSEL_DATA(IP9_31_28, I2C2_SCL_D, SEL_I2C2_3),
- 	PINMUX_IPSR_MODSEL_DATA(IP9_31_28, SIM0_CLK_B, SEL_SIM_1),
- 	PINMUX_IPSR_MODSEL_DATA(IP9_31_28, VI3_CLK_B, SEL_VI3_1),
- 
-@@ -1367,8 +1367,8 @@ static const u16 pinmux_data[] = {
- 	PINMUX_IPSR_DATA(IP10_3_0, USB1_IDIN),
- 	PINMUX_IPSR_MODSEL_DATA(IP10_3_0, GLO_RFON, SEL_GPS_0),
- 	PINMUX_IPSR_MODSEL_DATA(IP10_3_0, VI1_CLK_B, SEL_VI1_1),
--	PINMUX_IPSR_MODSEL_DATA(IP10_3_0, SDA2_D, SEL_IIC2_3),
--	PINMUX_IPSR_MODSEL_DATA(IP10_3_0, SDA2_CIS_D, SEL_I2C2_3),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_3_0, IIC2_SDA_D, SEL_IIC2_3),
-+	PINMUX_IPSR_MODSEL_DATA(IP10_3_0, I2C2_SDA_D, SEL_I2C2_3),
- 	PINMUX_IPSR_MODSEL_DATA(IP10_3_0, SIM0_D_B, SEL_SIM_1),
- 	PINMUX_IPSR_DATA(IP10_6_4, SD2_CLK),
- 	PINMUX_IPSR_DATA(IP10_6_4, MMC0_CLK),
-@@ -1477,13 +1477,13 @@ static const u16 pinmux_data[] = {
- 	PINMUX_IPSR_MODSEL_DATA(IP11_21_18, FMIN_F, SEL_FM_5),
- 	PINMUX_IPSR_MODSEL_DATA(IP11_21_18, RDS_DATA_E, SEL_RDS_4),
- 	PINMUX_IPSR_DATA(IP11_23_22, MLB_CLK),
--	PINMUX_IPSR_MODSEL_DATA(IP11_23_22, SCL2_B, SEL_IIC2_1),
--	PINMUX_IPSR_MODSEL_DATA(IP11_23_22, SCL2_CIS_B, SEL_I2C2_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_23_22, IIC2_SCL_B, SEL_IIC2_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_23_22, I2C2_SCL_B, SEL_I2C2_1),
- 	PINMUX_IPSR_DATA(IP11_26_24, MLB_SIG),
- 	PINMUX_IPSR_MODSEL_DATA(IP11_26_24, SCIFB1_RXD_D, SEL_SCIFB1_3),
- 	PINMUX_IPSR_MODSEL_DATA(IP11_26_24, RX1_C, SEL_SCIF1_2),
--	PINMUX_IPSR_MODSEL_DATA(IP11_26_24, SDA2_B, SEL_IIC2_1),
--	PINMUX_IPSR_MODSEL_DATA(IP11_26_24, SDA2_CIS_B, SEL_I2C2_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_26_24, IIC2_SDA_B, SEL_IIC2_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP11_26_24, I2C2_SDA_B, SEL_I2C2_1),
- 	PINMUX_IPSR_DATA(IP11_29_27, MLB_DAT),
- 	PINMUX_IPSR_DATA(IP11_29_27, SPV_EVEN),
- 	PINMUX_IPSR_MODSEL_DATA(IP11_29_27, SCIFB1_TXD_D, SEL_SCIFB1_3),
-@@ -1633,8 +1633,8 @@ static const u16 pinmux_data[] = {
- 	PINMUX_IPSR_DATA(IP14_5_3, MSIOF3_SS2),
- 	PINMUX_IPSR_DATA(IP14_5_3, DU2_DG2),
- 	PINMUX_IPSR_DATA(IP14_5_3, LCDOUT10),
--	PINMUX_IPSR_MODSEL_DATA(IP14_5_3, SDA1_C, SEL_IIC1_2),
--	PINMUX_IPSR_MODSEL_DATA(IP14_5_3, SDA1_CIS_C, SEL_I2C1_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_5_3, IIC1_SDA_C, SEL_IIC1_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_5_3, I2C1_SDA_C, SEL_I2C1_2),
- 	PINMUX_IPSR_MODSEL_DATA(IP14_8_6, SCIFA0_RXD, SEL_SCFA_0),
- 	PINMUX_IPSR_MODSEL_DATA(IP14_8_6, HRX1, SEL_HSCIF1_0),
- 	PINMUX_IPSR_MODSEL_DATA(IP14_8_6, RX0, SEL_SCIF0_0),
-@@ -1652,8 +1652,8 @@ static const u16 pinmux_data[] = {
- 	PINMUX_IPSR_DATA(IP14_15_12, DU2_DG3),
- 	PINMUX_IPSR_MODSEL_DATA(IP14_15_12, LCDOUT11, SEL_HSCIF1_0),
- 	PINMUX_IPSR_MODSEL_DATA(IP14_15_12, PWM0_B, SEL_SCIF0_0),
--	PINMUX_IPSR_MODSEL_DATA(IP14_15_12, SCL1_C, SEL_IIC1_2),
--	PINMUX_IPSR_MODSEL_DATA(IP14_15_12, SCL1_CIS_C, SEL_I2C1_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_15_12, IIC1_SCL_C, SEL_IIC1_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP14_15_12, I2C1_SCL_C, SEL_I2C1_2),
- 	PINMUX_IPSR_MODSEL_DATA(IP14_18_16, SCIFA0_RTS_N, SEL_SCFA_0),
- 	PINMUX_IPSR_MODSEL_DATA(IP14_18_16, HRTS1_N, SEL_HSCIF1_0),
- 	PINMUX_IPSR_DATA(IP14_18_16, RTS0_N_TANS),
-@@ -1695,20 +1695,20 @@ static const u16 pinmux_data[] = {
- 	PINMUX_IPSR_MODSEL_DATA(IP15_5_3, FMIN, SEL_FM_0),
- 	PINMUX_IPSR_DATA(IP15_5_3, DU2_DB0),
- 	PINMUX_IPSR_DATA(IP15_5_3, LCDOUT16),
--	PINMUX_IPSR_MODSEL_DATA(IP15_5_3, SCL2, SEL_IIC2_0),
--	PINMUX_IPSR_MODSEL_DATA(IP15_5_3, SCL2_CIS, SEL_I2C2_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_5_3, IIC2_SCL, SEL_IIC2_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_5_3, I2C2_SCL, SEL_I2C2_0),
- 	PINMUX_IPSR_MODSEL_DATA(IP15_8_6, SCIFA2_TXD, SEL_SCIFA2_0),
- 	PINMUX_IPSR_MODSEL_DATA(IP15_8_6, BPFCLK, SEL_FM_0),
- 	PINMUX_IPSR_DATA(IP15_8_6, DU2_DB1),
- 	PINMUX_IPSR_DATA(IP15_8_6, LCDOUT17),
--	PINMUX_IPSR_MODSEL_DATA(IP15_8_6, SDA2, SEL_IIC2_0),
--	PINMUX_IPSR_MODSEL_DATA(IP15_8_6, SDA2_CIS, SEL_I2C2_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_8_6, IIC2_SDA, SEL_IIC2_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_8_6, I2C2_SDA, SEL_I2C2_0),
- 	PINMUX_IPSR_DATA(IP15_11_9, HSCK0),
- 	PINMUX_IPSR_MODSEL_DATA(IP15_11_9, TS_SDEN0, SEL_TSIF0_0),
- 	PINMUX_IPSR_DATA(IP15_11_9, DU2_DG4),
- 	PINMUX_IPSR_DATA(IP15_11_9, LCDOUT12),
- 	PINMUX_IPSR_MODSEL_DATA(IP15_11_9, HCTS0_N_C, SEL_IIC2_0),
--	PINMUX_IPSR_MODSEL_DATA(IP15_11_9, SDA2_CIS, SEL_I2C2_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_11_9, I2C2_SDA, SEL_I2C2_0),
- 	PINMUX_IPSR_MODSEL_DATA(IP15_13_12, HRX0, SEL_HSCIF0_0),
- 	PINMUX_IPSR_DATA(IP15_13_12, DU2_DB2),
- 	PINMUX_IPSR_DATA(IP15_13_12, LCDOUT18),
-@@ -3204,12 +3204,12 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
- 		FN_VI0_G0, FN_VI0_G0_B, FN_VI2_DATA0_VI2_B0,
- 		0, 0, 0, 0, 0, 0, 0, 0, 0,
- 		/* IP0_26_23 [4] */
--		FN_D7, FN_AD_DI_B, FN_SDA2_C,
--		FN_VI3_DATA7, FN_VI0_R3, FN_VI0_R3_B, FN_SDA2_CIS_C,
-+		FN_D7, FN_AD_DI_B, FN_IIC2_SDA_C,
-+		FN_VI3_DATA7, FN_VI0_R3, FN_VI0_R3_B, FN_I2C2_SDA_C,
- 		0, 0, 0, 0, 0, 0, 0, 0, 0,
- 		/* IP0_22_20 [3] */
--		FN_D6, FN_SCL2_C, FN_VI3_DATA6, FN_VI0_R2, FN_VI0_R2_B,
--		FN_SCL2_CIS_C, 0, 0,
-+		FN_D6, FN_IIC2_SCL_C, FN_VI3_DATA6, FN_VI0_R2, FN_VI0_R2_B,
-+		FN_I2C2_SCL_C, 0, 0,
- 		/* IP0_19_16 [4] */
- 		FN_D5, FN_SCIFB1_TXD_F, FN_SCIFB0_TXD_C, FN_VI3_DATA5,
- 		FN_VI0_R1, FN_VI0_R1_B, FN_TX0_B,
-@@ -3391,12 +3391,12 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
- 		0, 0,
- 		/* IP5_9_6 [4] */
- 		FN_EX_CS5_N, FN_CAN0_RX, FN_MSIOF1_RXD_B, FN_VI3_VSYNC_N,
--		FN_VI1_G2, FN_VI1_G2_B, FN_VI2_R4, FN_SDA1, FN_INTC_EN1_N,
--		FN_SDA1_CIS, 0, 0, 0, 0, 0, 0,
-+		FN_VI1_G2, FN_VI1_G2_B, FN_VI2_R4, FN_IIC1_SDA, FN_INTC_EN1_N,
-+		FN_I2C1_SDA, 0, 0, 0, 0, 0, 0,
- 		/* IP5_5_3 [3] */
- 		FN_EX_CS4_N, FN_MSIOF1_SCK_B, FN_VI3_HSYNC_N,
--		FN_VI2_HSYNC_N, FN_SCL1, FN_VI2_HSYNC_N_B,
--		FN_INTC_EN0_N, FN_SCL1_CIS,
-+		FN_VI2_HSYNC_N, FN_IIC1_SCL, FN_VI2_HSYNC_N_B,
-+		FN_INTC_EN0_N, FN_I2C1_SCL,
- 		/* IP5_2_0 [3] */
- 		FN_EX_CS3_N, FN_GPS_MAG, FN_VI3_FIELD, FN_VI1_G1, FN_VI1_G1_B,
- 		FN_VI2_R3, 0, 0, }
-@@ -3417,11 +3417,11 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
- 		FN_GLO_I0_C, FN_SCIFB1_SCK_G, FN_SCK1_E, 0,
- 		/* IP6_19_17 [3] */
- 		FN_ETH_RX_ER, FN_RMII_RX_ER, FN_STP_ISD_0_B,
--		FN_TS_SPSYNC0_D, FN_GLO_Q1_C, FN_SDA2_E, FN_SDA2_CIS_E, 0,
-+		FN_TS_SPSYNC0_D, FN_GLO_Q1_C, FN_IIC2_SDA_E, FN_I2C2_SDA_E, 0,
- 		/* IP6_16_14 [3] */
- 		FN_ETH_CRS_DV, FN_RMII_CRS_DV, FN_STP_ISCLK_0_B,
--		FN_TS_SDEN0_D, FN_GLO_Q0_C, FN_SCL2_E,
--		FN_SCL2_CIS_E, 0,
-+		FN_TS_SDEN0_D, FN_GLO_Q0_C, FN_IIC2_SCL_E,
-+		FN_I2C2_SCL_E, 0,
- 		/* IP6_13_11 [3] */
- 		FN_DACK2, FN_IRQ2, FN_INTC_IRQ2_N,
- 		FN_SSI_SDATA6_B, FN_HRTS0_N_B, FN_MSIOF0_RXD_B, 0, 0,
-@@ -3520,7 +3520,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
- 			     4, 2, 2, 2, 2, 2, 2, 4, 4, 2, 2, 2, 2) {
- 		/* IP9_31_28 [4] */
- 		FN_SD1_CD, FN_MMC1_D6, FN_TS_SDEN1, FN_USB1_EXTP,
--		FN_GLO_SS, FN_VI0_CLK_B, FN_SCL2_D, FN_SCL2_CIS_D,
-+		FN_GLO_SS, FN_VI0_CLK_B, FN_IIC2_SCL_D, FN_I2C2_SCL_D,
- 		FN_SIM0_CLK_B, FN_VI3_CLK_B, 0, 0, 0, 0, 0, 0,
- 		/* IP9_27_26 [2] */
- 		FN_SD1_DAT3, FN_AVB_RXD0, FN_MII_RXD0, FN_SCIFB0_RTS_N_B,
-@@ -3536,12 +3536,12 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
- 		FN_SD1_CLK, FN_AVB_TX_EN, FN_MII_TX_EN, 0,
- 		/* IP9_15_12 [4] */
- 		FN_SD0_WP, FN_MMC0_D7, FN_TS_SPSYNC0_B, FN_USB0_IDIN,
--		FN_GLO_SDATA, FN_VI1_DATA7_VI1_B7_B, FN_SDA1_B,
--		FN_SDA1_CIS_B, FN_VI2_DATA7_VI2_B7_B, 0, 0, 0, 0, 0, 0, 0,
-+		FN_GLO_SDATA, FN_VI1_DATA7_VI1_B7_B, FN_IIC1_SDA_B,
-+		FN_I2C1_SDA_B, FN_VI2_DATA7_VI2_B7_B, 0, 0, 0, 0, 0, 0, 0,
- 		/* IP9_11_8 [4] */
- 		FN_SD0_CD, FN_MMC0_D6, FN_TS_SDEN0_B, FN_USB0_EXTP,
--		FN_GLO_SCLK, FN_VI1_DATA6_VI1_B6_B, FN_SCL1_B,
--		FN_SCL1_CIS_B, FN_VI2_DATA6_VI2_B6_B, 0, 0, 0, 0, 0, 0, 0,
-+		FN_GLO_SCLK, FN_VI1_DATA6_VI1_B6_B, FN_IIC1_SCL_B,
-+		FN_I2C1_SCL_B, FN_VI2_DATA6_VI2_B6_B, 0, 0, 0, 0, 0, 0, 0,
- 		/* IP9_7_6 [2] */
- 		FN_SD0_DAT3, FN_SCIFB1_RTS_N_B, FN_VI1_DATA5_VI1_B5_B, 0,
- 		/* IP9_5_4 [2] */
-@@ -3587,7 +3587,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
- 		FN_VI3_DATA0_B, 0,
- 		/* IP10_3_0 [4] */
- 		FN_SD1_WP, FN_MMC1_D7, FN_TS_SPSYNC1, FN_USB1_IDIN,
--		FN_GLO_RFON, FN_VI1_CLK_B, FN_SDA2_D, FN_SDA2_CIS_D,
-+		FN_GLO_RFON, FN_VI1_CLK_B, FN_IIC2_SDA_D, FN_I2C2_SDA_D,
- 		FN_SIM0_D_B, 0, 0, 0, 0, 0, 0, 0, }
- 	},
- 	{ PINMUX_CFG_REG_VAR("IPSR11", 0xE606004C, 32,
-@@ -3598,10 +3598,10 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
- 		FN_MLB_DAT, FN_SPV_EVEN, FN_SCIFB1_TXD_D, FN_TX1_C, FN_BPFCLK_C,
- 		FN_RDS_CLK_B, 0, 0,
- 		/* IP11_26_24 [3] */
--		FN_MLB_SIG, FN_SCIFB1_RXD_D, FN_RX1_C, FN_SDA2_B, FN_SDA2_CIS_B,
-+		FN_MLB_SIG, FN_SCIFB1_RXD_D, FN_RX1_C, FN_IIC2_SDA_B, FN_I2C2_SDA_B,
- 		0, 0, 0,
- 		/* IP11_23_22 [2] */
--		FN_MLB_CLK, FN_SCL2_B, FN_SCL2_CIS_B, 0,
-+		FN_MLB_CLK, FN_IIC2_SCL_B, FN_I2C2_SCL_B, 0,
- 		/* IP11_21_18 [4] */
- 		FN_SD3_WP, FN_MMC1_D5, FN_TS_SCK1, FN_GLO_Q1, FN_FMIN_C,
- 		FN_RDS_DATA_B, FN_FMIN_E, FN_RDS_DATA_D, FN_FMIN_F,
-@@ -3724,7 +3724,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
- 		FN_MSIOF3_SS1, FN_DU2_DG0, FN_LCDOUT8, FN_PWM1_B, 0,
- 		/* IP14_15_12 [4] */
- 		FN_SCIFA0_CTS_N, FN_HCTS1_N, FN_CTS0_N, FN_MSIOF3_SYNC,
--		FN_DU2_DG3, FN_LCDOUT11, FN_PWM0_B, FN_SCL1_C, FN_SCL1_CIS_C,
-+		FN_DU2_DG3, FN_LCDOUT11, FN_PWM0_B, FN_IIC1_SCL_C, FN_I2C1_SCL_C,
- 		0, 0, 0, 0, 0, 0, 0,
- 		/* IP14_11_9 [3] */
- 		FN_SCIFA0_TXD, FN_HTX1, FN_TX0, FN_DU2_DR1, FN_LCDOUT1,
-@@ -3734,7 +3734,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
- 		0, 0, 0,
- 		/* IP14_5_3 [3] */
- 		FN_SCIFA0_SCK, FN_HSCK1, FN_SCK0, FN_MSIOF3_SS2, FN_DU2_DG2,
--		FN_LCDOUT10, FN_SDA1_C, FN_SDA1_CIS_C,
-+		FN_LCDOUT10, FN_IIC1_SDA_C, FN_I2C1_SDA_C,
- 		/* IP14_2_0 [3] */
- 		FN_AUDIO_CLKB, FN_SCIF_CLK, FN_CAN0_RX_D,
- 		FN_DVC_MUTE, FN_CAN0_RX_C, FN_CAN_DEBUGOUT15,
-@@ -3767,10 +3767,10 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
- 		0, 0, 0,
- 		/* IP15_8_6 [3] */
- 		FN_SCIFA2_TXD, FN_BPFCLK, 0, FN_DU2_DB1, FN_LCDOUT17,
--		FN_SDA2, FN_SDA2_CIS, 0,
-+		FN_IIC2_SDA, FN_I2C2_SDA, 0,
- 		/* IP15_5_3 [3] */
- 		FN_SCIFA2_RXD, FN_FMIN, 0, FN_DU2_DB0, FN_LCDOUT16,
--		FN_SCL2, FN_SCL2_CIS, 0,
-+		FN_IIC2_SCL, FN_I2C2_SCL, 0,
- 		/* IP15_2_0 [3] */
- 		FN_SCIFA2_SCK, FN_FMCLK, 0, FN_MSIOF3_SCK, FN_DU2_DG7,
- 		FN_LCDOUT15, FN_SCIF_CLK_B, 0, }
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0560-sh-pfc-r8a7790-Remove-trailing-_TANS-string-from-RTS.patch b/patches.renesas/0560-sh-pfc-r8a7790-Remove-trailing-_TANS-string-from-RTS.patch
deleted file mode 100644
index 83e3cc66c9161..0000000000000
--- a/patches.renesas/0560-sh-pfc-r8a7790-Remove-trailing-_TANS-string-from-RTS.patch
+++ /dev/null
@@ -1,111 +0,0 @@
-From 5c71f2209ad503afc2c822c9d99b2a1168171afc Mon Sep 17 00:00:00 2001
-From: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
-Date: Fri, 24 May 2013 17:28:17 +0900
-Subject: sh-pfc: r8a7790: Remove trailing '_TANS' string from RTS/CTS pins
-
-The RTS/CTS pins have been renamed in the datasheet, rename them here as
-well.
-
-Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit bcec7475d84c16c62d5310da96d1e34b9edc750a)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 20 ++++++++++----------
- 1 file changed, 10 insertions(+), 10 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-index 3ddebc6b..55827243 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-@@ -384,14 +384,14 @@ enum {
- 	FN_TX0, FN_DU2_DR1, FN_LCDOUT1, FN_SCIFA0_CTS_N,
- 	FN_HCTS1_N, FN_CTS0_N, FN_MSIOF3_SYNC, FN_DU2_DG3,
- 	FN_LCDOUT11, FN_PWM0_B, FN_IIC1_SCL_C, FN_I2C1_SCL_C,
--	FN_SCIFA0_RTS_N, FN_HRTS1_N, FN_RTS0_N_TANS,
-+	FN_SCIFA0_RTS_N, FN_HRTS1_N, FN_RTS0_N,
- 	FN_MSIOF3_SS1, FN_DU2_DG0, FN_LCDOUT8, FN_PWM1_B,
- 	FN_SCIFA1_RXD, FN_AD_DI, FN_RX1,
- 	FN_DU2_EXODDF_DU2_ODDF_DISP_CDE, FN_QCPV_QDE,
- 	FN_SCIFA1_TXD, FN_AD_DO, FN_TX1, FN_DU2_DG1,
- 	FN_LCDOUT9, FN_SCIFA1_CTS_N, FN_AD_CLK,
- 	FN_CTS1_N, FN_MSIOF3_RXD, FN_DU0_DOTCLKOUT, FN_QCLK,
--	FN_SCIFA1_RTS_N, FN_AD_NCS_N, FN_RTS1_N_TANS,
-+	FN_SCIFA1_RTS_N, FN_AD_NCS_N, FN_RTS1_N,
- 	FN_MSIOF3_TXD, FN_DU1_DOTCLKOUT, FN_QSTVB_QVE,
- 	FN_HRTS0_N_C,
- 
-@@ -751,14 +751,14 @@ enum {
- 	TX0_MARK, DU2_DR1_MARK, LCDOUT1_MARK, SCIFA0_CTS_N_MARK,
- 	HCTS1_N_MARK, CTS0_N_MARK, MSIOF3_SYNC_MARK, DU2_DG3_MARK,
- 	LCDOUT11_MARK, PWM0_B_MARK, IIC1_SCL_C_MARK, I2C1_SCL_C_MARK,
--	SCIFA0_RTS_N_MARK, HRTS1_N_MARK, RTS0_N_TANS_MARK,
-+	SCIFA0_RTS_N_MARK, HRTS1_N_MARK, RTS0_N_MARK,
- 	MSIOF3_SS1_MARK, DU2_DG0_MARK, LCDOUT8_MARK, PWM1_B_MARK,
- 	SCIFA1_RXD_MARK, AD_DI_MARK, RX1_MARK,
- 	DU2_EXODDF_DU2_ODDF_DISP_CDE_MARK, QCPV_QDE_MARK,
- 	SCIFA1_TXD_MARK, AD_DO_MARK, TX1_MARK, DU2_DG1_MARK,
- 	LCDOUT9_MARK, SCIFA1_CTS_N_MARK, AD_CLK_MARK,
- 	CTS1_N_MARK, MSIOF3_RXD_MARK, DU0_DOTCLKOUT_MARK, QCLK_MARK,
--	SCIFA1_RTS_N_MARK, AD_NCS_N_MARK, RTS1_N_TANS_MARK,
-+	SCIFA1_RTS_N_MARK, AD_NCS_N_MARK, RTS1_N_MARK,
- 	MSIOF3_TXD_MARK, DU1_DOTCLKOUT_MARK, QSTVB_QVE_MARK,
- 	HRTS0_N_C_MARK,
- 
-@@ -1656,7 +1656,7 @@ static const u16 pinmux_data[] = {
- 	PINMUX_IPSR_MODSEL_DATA(IP14_15_12, I2C1_SCL_C, SEL_I2C1_2),
- 	PINMUX_IPSR_MODSEL_DATA(IP14_18_16, SCIFA0_RTS_N, SEL_SCFA_0),
- 	PINMUX_IPSR_MODSEL_DATA(IP14_18_16, HRTS1_N, SEL_HSCIF1_0),
--	PINMUX_IPSR_DATA(IP14_18_16, RTS0_N_TANS),
-+	PINMUX_IPSR_DATA(IP14_18_16, RTS0_N),
- 	PINMUX_IPSR_DATA(IP14_18_16, MSIOF3_SS1),
- 	PINMUX_IPSR_DATA(IP14_18_16, DU2_DG0),
- 	PINMUX_IPSR_DATA(IP14_18_16, LCDOUT8),
-@@ -1679,7 +1679,7 @@ static const u16 pinmux_data[] = {
- 	PINMUX_IPSR_DATA(IP14_27_25, QCLK),
- 	PINMUX_IPSR_MODSEL_DATA(IP14_30_28, SCIFA1_RTS_N, SEL_SCIFA1_0),
- 	PINMUX_IPSR_MODSEL_DATA(IP14_30_28, AD_NCS_N, SEL_ADI_0),
--	PINMUX_IPSR_DATA(IP14_30_28, RTS1_N_TANS),
-+	PINMUX_IPSR_DATA(IP14_30_28, RTS1_N),
- 	PINMUX_IPSR_MODSEL_DATA(IP14_30_28, MSIOF3_TXD, SEL_SOF3_0),
- 	PINMUX_IPSR_DATA(IP14_30_28, DU1_DOTCLKOUT),
- 	PINMUX_IPSR_DATA(IP14_30_28, QSTVB_QVE),
-@@ -1849,7 +1849,7 @@ static const unsigned int scif0_ctrl_pins[] = {
- 	RCAR_GP_PIN(4, 31), RCAR_GP_PIN(4, 30),
- };
- static const unsigned int scif0_ctrl_mux[] = {
--	RTS0_N_TANS_MARK, CTS0_N_MARK,
-+	RTS0_N_MARK, CTS0_N_MARK,
- };
- static const unsigned int scif0_data_b_pins[] = {
- 	/* RX, TX */
-@@ -1878,7 +1878,7 @@ static const unsigned int scif1_ctrl_pins[] = {
- 	RCAR_GP_PIN(5, 3), RCAR_GP_PIN(5, 2),
- };
- static const unsigned int scif1_ctrl_mux[] = {
--	RTS1_N_TANS_MARK, CTS1_N_MARK,
-+	RTS1_N_MARK, CTS1_N_MARK,
- };
- static const unsigned int scif1_data_b_pins[] = {
- 	/* RX, TX */
-@@ -3707,7 +3707,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
- 		/* IP14_30 [1] */
- 		0, 0,
- 		/* IP14_30_28 [3] */
--		FN_SCIFA1_RTS_N, FN_AD_NCS_N, FN_RTS1_N_TANS,
-+		FN_SCIFA1_RTS_N, FN_AD_NCS_N, FN_RTS1_N,
- 		FN_MSIOF3_TXD, FN_DU1_DOTCLKOUT, FN_QSTVB_QVE,
- 		FN_HRTS0_N_C, 0,
- 		/* IP14_27_25 [3] */
-@@ -3720,7 +3720,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
- 		FN_SCIFA1_RXD, FN_AD_DI, FN_RX1,
- 		FN_DU2_EXODDF_DU2_ODDF_DISP_CDE, FN_QCPV_QDE, 0, 0, 0,
- 		/* IP14_18_16 [3] */
--		FN_SCIFA0_RTS_N, FN_HRTS1_N, FN_RTS0_N_TANS,
-+		FN_SCIFA0_RTS_N, FN_HRTS1_N, FN_RTS0_N,
- 		FN_MSIOF3_SS1, FN_DU2_DG0, FN_LCDOUT8, FN_PWM1_B, 0,
- 		/* IP14_15_12 [4] */
- 		FN_SCIFA0_CTS_N, FN_HCTS1_N, FN_CTS0_N, FN_MSIOF3_SYNC,
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0561-sh-pfc-r8a7790-Remove-deprecated-Ethernet-MII-RMII-p.patch b/patches.renesas/0561-sh-pfc-r8a7790-Remove-deprecated-Ethernet-MII-RMII-p.patch
deleted file mode 100644
index 023f47e228c26..0000000000000
--- a/patches.renesas/0561-sh-pfc-r8a7790-Remove-deprecated-Ethernet-MII-RMII-p.patch
+++ /dev/null
@@ -1,593 +0,0 @@
-From 32402952533b2049e44420c70d31ba8dfbcceee0 Mon Sep 17 00:00:00 2001
-From: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
-Date: Wed, 22 May 2013 19:55:08 +0900
-Subject: sh-pfc: r8a7790: Remove deprecated Ethernet MII/RMII pins
-
-The pins have been removed from the datasheet, remove them here as well.
-
-Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit 9f2edd4113daefb5280fb5f06085fa2069ba0d2b)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 224 +++++++++++++++--------------------
- 1 file changed, 94 insertions(+), 130 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-index 55827243..5ddc19a3 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-@@ -114,15 +114,15 @@ enum {
- 	FN_IIC2_SCL_C, FN_VI3_DATA6, FN_VI0_R2, FN_VI0_R2_B,
- 	FN_I2C2_SCL_C, FN_D7, FN_AD_DI_B, FN_IIC2_SDA_C,
- 	FN_VI3_DATA7, FN_VI0_R3, FN_VI0_R3_B, FN_I2C2_SDA_C,
--	FN_D8, FN_SCIFA1_SCK_C, FN_AVB_TXD0, FN_MII_TXD0,
-+	FN_D8, FN_SCIFA1_SCK_C, FN_AVB_TXD0,
- 	FN_VI0_G0, FN_VI0_G0_B, FN_VI2_DATA0_VI2_B0,
- 
- 	/* IPSR1 */
--	FN_D9, FN_SCIFA1_RXD_C, FN_AVB_TXD1, FN_MII_TXD1,
-+	FN_D9, FN_SCIFA1_RXD_C, FN_AVB_TXD1,
- 	FN_VI0_G1, FN_VI0_G1_B, FN_VI2_DATA1_VI2_B1, FN_D10,
--	FN_SCIFA1_TXD_C, FN_AVB_TXD2, FN_MII_TXD2,
-+	FN_SCIFA1_TXD_C, FN_AVB_TXD2,
- 	FN_VI0_G2, FN_VI0_G2_B, FN_VI2_DATA2_VI2_B2, FN_D11,
--	FN_SCIFA1_CTS_N_C, FN_AVB_TXD3, FN_MII_TXD3,
-+	FN_SCIFA1_CTS_N_C, FN_AVB_TXD3,
- 	FN_VI0_G3, FN_VI0_G3_B, FN_VI2_DATA3_VI2_B3,
- 	FN_D12, FN_SCIFA1_RTS_N_C, FN_AVB_TXD4,
- 	FN_VI0_HSYNC_N, FN_VI0_HSYNC_N_B, FN_VI2_DATA4_VI2_B4,
-@@ -209,29 +209,29 @@ enum {
- 	FN_DREQ2_N, FN_HSCK1_B, FN_HCTS0_N_B,
- 	FN_MSIOF0_TXD_B, FN_DACK2, FN_IRQ2, FN_INTC_IRQ2_N,
- 	FN_SSI_SDATA6_B, FN_HRTS0_N_B, FN_MSIOF0_RXD_B,
--	FN_ETH_CRS_DV, FN_RMII_CRS_DV, FN_STP_ISCLK_0_B,
-+	FN_ETH_CRS_DV, FN_STP_ISCLK_0_B,
- 	FN_TS_SDEN0_D, FN_GLO_Q0_C, FN_IIC2_SCL_E,
--	FN_I2C2_SCL_E, FN_ETH_RX_ER, FN_RMII_RX_ER,
-+	FN_I2C2_SCL_E, FN_ETH_RX_ER,
- 	FN_STP_ISD_0_B, FN_TS_SPSYNC0_D, FN_GLO_Q1_C,
--	FN_IIC2_SDA_E, FN_I2C2_SDA_E, FN_ETH_RXD0, FN_RMII_RXD0,
-+	FN_IIC2_SDA_E, FN_I2C2_SDA_E, FN_ETH_RXD0,
- 	FN_STP_ISEN_0_B, FN_TS_SDAT0_D, FN_GLO_I0_C,
- 	FN_SCIFB1_SCK_G, FN_SCK1_E, FN_ETH_RXD1,
--	FN_RMII_RXD1, FN_HRX0_E, FN_STP_ISSYNC_0_B,
-+	FN_HRX0_E, FN_STP_ISSYNC_0_B,
- 	FN_TS_SCK0_D, FN_GLO_I1_C, FN_SCIFB1_RXD_G,
--	FN_RX1_E, FN_ETH_LINK, FN_RMII_LINK, FN_HTX0_E,
-+	FN_RX1_E, FN_ETH_LINK, FN_HTX0_E,
- 	FN_STP_IVCXO27_0_B, FN_SCIFB1_TXD_G, FN_TX1_E,
--	FN_ETH_REF_CLK, FN_RMII_REF_CLK, FN_HCTS0_N_E,
-+	FN_ETH_REF_CLK, FN_HCTS0_N_E,
- 	FN_STP_IVCXO27_1_B, FN_HRX0_F,
- 
- 	/* IPSR7 */
--	FN_ETH_MDIO, FN_RMII_MDIO, FN_HRTS0_N_E,
-+	FN_ETH_MDIO, FN_HRTS0_N_E,
- 	FN_SIM0_D_C, FN_HCTS0_N_F, FN_ETH_TXD1,
--	FN_RMII_TXD1, FN_HTX0_F, FN_BPFCLK_G, FN_RDS_CLK_F,
--	FN_ETH_TX_EN, FN_RMII_TX_EN, FN_SIM0_CLK_C,
--	FN_HRTS0_N_F, FN_ETH_MAGIC, FN_RMII_MAGIC,
--	FN_SIM0_RST_C, FN_ETH_TXD0, FN_RMII_TXD0,
-+	FN_HTX0_F, FN_BPFCLK_G, FN_RDS_CLK_F,
-+	FN_ETH_TX_EN, FN_SIM0_CLK_C,
-+	FN_HRTS0_N_F, FN_ETH_MAGIC,
-+	FN_SIM0_RST_C, FN_ETH_TXD0,
- 	FN_STP_ISCLK_1_B, FN_TS_SDEN1_C, FN_GLO_SCLK_C,
--	FN_ETH_MDC, FN_RMII_MDC, FN_STP_ISD_1_B,
-+	FN_ETH_MDC, FN_STP_ISD_1_B,
- 	FN_TS_SPSYNC1_C, FN_GLO_SDATA_C, FN_PWM0,
- 	FN_SCIFA2_SCK_C, FN_STP_ISEN_1_B, FN_TS_SDAT1_C,
- 	FN_GLO_SS_C, FN_PWM1, FN_SCIFA2_TXD_C,
-@@ -239,26 +239,25 @@ enum {
- 	FN_PCMOE_N, FN_PWM2, FN_PWMFSW0, FN_SCIFA2_RXD_C,
- 	FN_PCMWE_N, FN_IECLK_C, FN_DU1_DOTCLKIN,
- 	FN_AUDIO_CLKC, FN_AUDIO_CLKOUT_C, FN_VI0_CLK,
--	FN_ATACS00_N, FN_AVB_RXD1, FN_MII_RXD1,
-+	FN_ATACS00_N, FN_AVB_RXD1,
- 	FN_VI0_DATA0_VI0_B0, FN_ATACS10_N, FN_AVB_RXD2,
--	FN_MII_RXD2,
- 
- 	/* IPSR8 */
- 	FN_VI0_DATA1_VI0_B1, FN_ATARD0_N, FN_AVB_RXD3,
--	FN_MII_RXD3, FN_VI0_DATA2_VI0_B2, FN_ATAWR0_N,
-+	FN_VI0_DATA2_VI0_B2, FN_ATAWR0_N,
- 	FN_AVB_RXD4, FN_VI0_DATA3_VI0_B3, FN_ATADIR0_N,
- 	FN_AVB_RXD5, FN_VI0_DATA4_VI0_B4, FN_ATAG0_N,
- 	FN_AVB_RXD6, FN_VI0_DATA5_VI0_B5, FN_EX_WAIT1,
- 	FN_AVB_RXD7, FN_VI0_DATA6_VI0_B6, FN_AVB_RX_ER,
--	FN_MII_RX_ER, FN_VI0_DATA7_VI0_B7, FN_AVB_RX_CLK,
--	FN_MII_RX_CLK, FN_VI1_CLK, FN_AVB_RX_DV,
--	FN_MII_RX_DV, FN_VI1_DATA0_VI1_B0, FN_SCIFA1_SCK_D,
--	FN_AVB_CRS, FN_MII_CRS, FN_VI1_DATA1_VI1_B1,
--	FN_SCIFA1_RXD_D, FN_AVB_MDC, FN_MII_MDC,
-+	FN_VI0_DATA7_VI0_B7, FN_AVB_RX_CLK,
-+	FN_VI1_CLK, FN_AVB_RX_DV,
-+	FN_VI1_DATA0_VI1_B0, FN_SCIFA1_SCK_D,
-+	FN_AVB_CRS, FN_VI1_DATA1_VI1_B1,
-+	FN_SCIFA1_RXD_D, FN_AVB_MDC,
- 	FN_VI1_DATA2_VI1_B2, FN_SCIFA1_TXD_D, FN_AVB_MDIO,
--	FN_MII_MDIO, FN_VI1_DATA3_VI1_B3, FN_SCIFA1_CTS_N_D,
-+	FN_VI1_DATA3_VI1_B3, FN_SCIFA1_CTS_N_D,
- 	FN_AVB_GTX_CLK, FN_VI1_DATA4_VI1_B4, FN_SCIFA1_RTS_N_D,
--	FN_AVB_MAGIC, FN_MII_MAGIC, FN_VI1_DATA5_VI1_B5,
-+	FN_AVB_MAGIC, FN_VI1_DATA5_VI1_B5,
- 	FN_AVB_PHY_INT, FN_VI1_DATA6_VI1_B6, FN_AVB_GTXREFCLK,
- 	FN_SD0_CLK, FN_VI1_DATA0_VI1_B0_B, FN_SD0_CMD,
- 	FN_SCIFB1_SCK_B, FN_VI1_DATA1_VI1_B1_B,
-@@ -274,13 +273,13 @@ enum {
- 	FN_MMC0_D7, FN_TS_SPSYNC0_B, FN_USB0_IDIN,
- 	FN_GLO_SDATA, FN_VI1_DATA7_VI1_B7_B, FN_IIC1_SDA_B,
- 	FN_I2C1_SDA_B, FN_VI2_DATA7_VI2_B7_B, FN_SD1_CLK,
--	FN_AVB_TX_EN, FN_MII_TX_EN, FN_SD1_CMD,
--	FN_AVB_TX_ER, FN_MII_TX_ER, FN_SCIFB0_SCK_B,
--	FN_SD1_DAT0, FN_AVB_TX_CLK, FN_MII_TX_CLK,
-+	FN_AVB_TX_EN, FN_SD1_CMD,
-+	FN_AVB_TX_ER, FN_SCIFB0_SCK_B,
-+	FN_SD1_DAT0, FN_AVB_TX_CLK,
- 	FN_SCIFB0_RXD_B, FN_SD1_DAT1, FN_AVB_LINK,
--	FN_MII_LINK, FN_SCIFB0_TXD_B, FN_SD1_DAT2,
--	FN_AVB_COL, FN_MII_COL, FN_SCIFB0_CTS_N_B,
--	FN_SD1_DAT3, FN_AVB_RXD0, FN_MII_RXD0,
-+	FN_SCIFB0_TXD_B, FN_SD1_DAT2,
-+	FN_AVB_COL, FN_SCIFB0_CTS_N_B,
-+	FN_SD1_DAT3, FN_AVB_RXD0,
- 	FN_SCIFB0_RTS_N_B, FN_SD1_CD, FN_MMC1_D6,
- 	FN_TS_SDEN1, FN_USB1_EXTP, FN_GLO_SS, FN_VI0_CLK_B,
- 	FN_IIC2_SCL_D, FN_I2C2_SCL_D, FN_SIM0_CLK_B,
-@@ -494,14 +493,14 @@ enum {
- 	IIC2_SCL_C_MARK, VI3_DATA6_MARK, VI0_R2_MARK, VI0_R2_B_MARK,
- 	I2C2_SCL_C_MARK, D7_MARK, AD_DI_B_MARK, IIC2_SDA_C_MARK,
- 	VI3_DATA7_MARK, VI0_R3_MARK, VI0_R3_B_MARK, I2C2_SDA_C_MARK,
--	D8_MARK, SCIFA1_SCK_C_MARK, AVB_TXD0_MARK, MII_TXD0_MARK,
-+	D8_MARK, SCIFA1_SCK_C_MARK, AVB_TXD0_MARK,
- 	VI0_G0_MARK, VI0_G0_B_MARK, VI2_DATA0_VI2_B0_MARK,
- 
--	D9_MARK, SCIFA1_RXD_C_MARK, AVB_TXD1_MARK, MII_TXD1_MARK,
-+	D9_MARK, SCIFA1_RXD_C_MARK, AVB_TXD1_MARK,
- 	VI0_G1_MARK, VI0_G1_B_MARK, VI2_DATA1_VI2_B1_MARK, D10_MARK,
--	SCIFA1_TXD_C_MARK, AVB_TXD2_MARK, MII_TXD2_MARK,
-+	SCIFA1_TXD_C_MARK, AVB_TXD2_MARK,
- 	VI0_G2_MARK, VI0_G2_B_MARK, VI2_DATA2_VI2_B2_MARK, D11_MARK,
--	SCIFA1_CTS_N_C_MARK, AVB_TXD3_MARK, MII_TXD3_MARK,
-+	SCIFA1_CTS_N_C_MARK, AVB_TXD3_MARK,
- 	VI0_G3_MARK, VI0_G3_B_MARK, VI2_DATA3_VI2_B3_MARK,
- 	D12_MARK, SCIFA1_RTS_N_C_MARK, AVB_TXD4_MARK,
- 	VI0_HSYNC_N_MARK, VI0_HSYNC_N_B_MARK, VI2_DATA4_VI2_B4_MARK,
-@@ -584,28 +583,28 @@ enum {
- 	DREQ2_N_MARK, HSCK1_B_MARK, HCTS0_N_B_MARK,
- 	MSIOF0_TXD_B_MARK, DACK2_MARK, IRQ2_MARK, INTC_IRQ2_N_MARK,
- 	SSI_SDATA6_B_MARK, HRTS0_N_B_MARK, MSIOF0_RXD_B_MARK,
--	ETH_CRS_DV_MARK, RMII_CRS_DV_MARK, STP_ISCLK_0_B_MARK,
-+	ETH_CRS_DV_MARK, STP_ISCLK_0_B_MARK,
- 	TS_SDEN0_D_MARK, GLO_Q0_C_MARK, IIC2_SCL_E_MARK,
--	I2C2_SCL_E_MARK, ETH_RX_ER_MARK, RMII_RX_ER_MARK,
-+	I2C2_SCL_E_MARK, ETH_RX_ER_MARK,
- 	STP_ISD_0_B_MARK, TS_SPSYNC0_D_MARK, GLO_Q1_C_MARK,
--	IIC2_SDA_E_MARK, I2C2_SDA_E_MARK, ETH_RXD0_MARK, RMII_RXD0_MARK,
-+	IIC2_SDA_E_MARK, I2C2_SDA_E_MARK, ETH_RXD0_MARK,
- 	STP_ISEN_0_B_MARK, TS_SDAT0_D_MARK, GLO_I0_C_MARK,
- 	SCIFB1_SCK_G_MARK, SCK1_E_MARK, ETH_RXD1_MARK,
--	RMII_RXD1_MARK, HRX0_E_MARK, STP_ISSYNC_0_B_MARK,
-+	HRX0_E_MARK, STP_ISSYNC_0_B_MARK,
- 	TS_SCK0_D_MARK, GLO_I1_C_MARK, SCIFB1_RXD_G_MARK,
--	RX1_E_MARK, ETH_LINK_MARK, RMII_LINK_MARK, HTX0_E_MARK,
-+	RX1_E_MARK, ETH_LINK_MARK, HTX0_E_MARK,
- 	STP_IVCXO27_0_B_MARK, SCIFB1_TXD_G_MARK, TX1_E_MARK,
--	ETH_REF_CLK_MARK, RMII_REF_CLK_MARK, HCTS0_N_E_MARK,
-+	ETH_REF_CLK_MARK, HCTS0_N_E_MARK,
- 	STP_IVCXO27_1_B_MARK, HRX0_F_MARK,
- 
--	ETH_MDIO_MARK, RMII_MDIO_MARK, HRTS0_N_E_MARK,
-+	ETH_MDIO_MARK, HRTS0_N_E_MARK,
- 	SIM0_D_C_MARK, HCTS0_N_F_MARK, ETH_TXD1_MARK,
--	RMII_TXD1_MARK, HTX0_F_MARK, BPFCLK_G_MARK, RDS_CLK_F_MARK,
--	ETH_TX_EN_MARK, RMII_TX_EN_MARK, SIM0_CLK_C_MARK,
--	HRTS0_N_F_MARK, ETH_MAGIC_MARK, RMII_MAGIC_MARK,
--	SIM0_RST_C_MARK, ETH_TXD0_MARK, RMII_TXD0_MARK,
-+	HTX0_F_MARK, BPFCLK_G_MARK, RDS_CLK_F_MARK,
-+	ETH_TX_EN_MARK, SIM0_CLK_C_MARK,
-+	HRTS0_N_F_MARK, ETH_MAGIC_MARK,
-+	SIM0_RST_C_MARK, ETH_TXD0_MARK,
- 	STP_ISCLK_1_B_MARK, TS_SDEN1_C_MARK, GLO_SCLK_C_MARK,
--	ETH_MDC_MARK, RMII_MDC_MARK, STP_ISD_1_B_MARK,
-+	ETH_MDC_MARK, STP_ISD_1_B_MARK,
- 	TS_SPSYNC1_C_MARK, GLO_SDATA_C_MARK, PWM0_MARK,
- 	SCIFA2_SCK_C_MARK, STP_ISEN_1_B_MARK, TS_SDAT1_C_MARK,
- 	GLO_SS_C_MARK, PWM1_MARK, SCIFA2_TXD_C_MARK,
-@@ -613,25 +612,24 @@ enum {
- 	PCMOE_N_MARK, PWM2_MARK, PWMFSW0_MARK, SCIFA2_RXD_C_MARK,
- 	PCMWE_N_MARK, IECLK_C_MARK, DU1_DOTCLKIN_MARK,
- 	AUDIO_CLKC_MARK, AUDIO_CLKOUT_C_MARK, VI0_CLK_MARK,
--	ATACS00_N_MARK, AVB_RXD1_MARK, MII_RXD1_MARK,
-+	ATACS00_N_MARK, AVB_RXD1_MARK,
- 	VI0_DATA0_VI0_B0_MARK, ATACS10_N_MARK, AVB_RXD2_MARK,
--	MII_RXD2_MARK,
- 
- 	VI0_DATA1_VI0_B1_MARK, ATARD0_N_MARK, AVB_RXD3_MARK,
--	MII_RXD3_MARK, VI0_DATA2_VI0_B2_MARK, ATAWR0_N_MARK,
-+	VI0_DATA2_VI0_B2_MARK, ATAWR0_N_MARK,
- 	AVB_RXD4_MARK, VI0_DATA3_VI0_B3_MARK, ATADIR0_N_MARK,
- 	AVB_RXD5_MARK, VI0_DATA4_VI0_B4_MARK, ATAG0_N_MARK,
- 	AVB_RXD6_MARK, VI0_DATA5_VI0_B5_MARK, EX_WAIT1_MARK,
- 	AVB_RXD7_MARK, VI0_DATA6_VI0_B6_MARK, AVB_RX_ER_MARK,
--	MII_RX_ER_MARK, VI0_DATA7_VI0_B7_MARK, AVB_RX_CLK_MARK,
--	MII_RX_CLK_MARK, VI1_CLK_MARK, AVB_RX_DV_MARK,
--	MII_RX_DV_MARK, VI1_DATA0_VI1_B0_MARK, SCIFA1_SCK_D_MARK,
--	AVB_CRS_MARK, MII_CRS_MARK, VI1_DATA1_VI1_B1_MARK,
--	SCIFA1_RXD_D_MARK, AVB_MDC_MARK, MII_MDC_MARK,
-+	VI0_DATA7_VI0_B7_MARK, AVB_RX_CLK_MARK,
-+	VI1_CLK_MARK, AVB_RX_DV_MARK,
-+	VI1_DATA0_VI1_B0_MARK, SCIFA1_SCK_D_MARK,
-+	AVB_CRS_MARK, VI1_DATA1_VI1_B1_MARK,
-+	SCIFA1_RXD_D_MARK, AVB_MDC_MARK,
- 	VI1_DATA2_VI1_B2_MARK, SCIFA1_TXD_D_MARK, AVB_MDIO_MARK,
--	MII_MDIO_MARK, VI1_DATA3_VI1_B3_MARK, SCIFA1_CTS_N_D_MARK,
-+	VI1_DATA3_VI1_B3_MARK, SCIFA1_CTS_N_D_MARK,
- 	AVB_GTX_CLK_MARK, VI1_DATA4_VI1_B4_MARK, SCIFA1_RTS_N_D_MARK,
--	AVB_MAGIC_MARK, MII_MAGIC_MARK, VI1_DATA5_VI1_B5_MARK,
-+	AVB_MAGIC_MARK, VI1_DATA5_VI1_B5_MARK,
- 	AVB_PHY_INT_MARK, VI1_DATA6_VI1_B6_MARK, AVB_GTXREFCLK_MARK,
- 	SD0_CLK_MARK, VI1_DATA0_VI1_B0_B_MARK, SD0_CMD_MARK,
- 	SCIFB1_SCK_B_MARK, VI1_DATA1_VI1_B1_B_MARK,
-@@ -646,13 +644,13 @@ enum {
- 	MMC0_D7_MARK, TS_SPSYNC0_B_MARK, USB0_IDIN_MARK,
- 	GLO_SDATA_MARK, VI1_DATA7_VI1_B7_B_MARK, IIC1_SDA_B_MARK,
- 	I2C1_SDA_B_MARK, VI2_DATA7_VI2_B7_B_MARK, SD1_CLK_MARK,
--	AVB_TX_EN_MARK, MII_TX_EN_MARK, SD1_CMD_MARK,
--	AVB_TX_ER_MARK, MII_TX_ER_MARK, SCIFB0_SCK_B_MARK,
--	SD1_DAT0_MARK, AVB_TX_CLK_MARK, MII_TX_CLK_MARK,
-+	AVB_TX_EN_MARK, SD1_CMD_MARK,
-+	AVB_TX_ER_MARK, SCIFB0_SCK_B_MARK,
-+	SD1_DAT0_MARK, AVB_TX_CLK_MARK,
- 	SCIFB0_RXD_B_MARK, SD1_DAT1_MARK, AVB_LINK_MARK,
--	MII_LINK_MARK, SCIFB0_TXD_B_MARK, SD1_DAT2_MARK,
--	AVB_COL_MARK, MII_COL_MARK, SCIFB0_CTS_N_B_MARK,
--	SD1_DAT3_MARK, AVB_RXD0_MARK, MII_RXD0_MARK,
-+	SCIFB0_TXD_B_MARK, SD1_DAT2_MARK,
-+	AVB_COL_MARK, SCIFB0_CTS_N_B_MARK,
-+	SD1_DAT3_MARK, AVB_RXD0_MARK,
- 	SCIFB0_RTS_N_B_MARK, SD1_CD_MARK, MMC1_D6_MARK,
- 	TS_SDEN1_MARK, USB1_EXTP_MARK, GLO_SS_MARK, VI0_CLK_B_MARK,
- 	IIC2_SCL_D_MARK, I2C2_SCL_D_MARK, SIM0_CLK_B_MARK,
-@@ -850,7 +848,6 @@ static const u16 pinmux_data[] = {
- 	PINMUX_IPSR_DATA(IP0_30_27, D8),
- 	PINMUX_IPSR_MODSEL_DATA(IP0_30_27, SCIFA1_SCK_C, SEL_SCIFA1_2),
- 	PINMUX_IPSR_DATA(IP0_30_27, AVB_TXD0),
--	PINMUX_IPSR_DATA(IP0_30_27, MII_TXD0),
- 	PINMUX_IPSR_MODSEL_DATA(IP0_30_27, VI0_G0, SEL_VI0_0),
- 	PINMUX_IPSR_MODSEL_DATA(IP0_30_27, VI0_G0_B, SEL_VI0_1),
- 	PINMUX_IPSR_MODSEL_DATA(IP0_30_27, VI2_DATA0_VI2_B0, SEL_VI2_0),
-@@ -858,21 +855,18 @@ static const u16 pinmux_data[] = {
- 	PINMUX_IPSR_DATA(IP1_3_0, D9),
- 	PINMUX_IPSR_MODSEL_DATA(IP1_3_0, SCIFA1_RXD_C, SEL_SCIFA1_2),
- 	PINMUX_IPSR_DATA(IP1_3_0, AVB_TXD1),
--	PINMUX_IPSR_DATA(IP1_3_0, MII_TXD1),
- 	PINMUX_IPSR_MODSEL_DATA(IP1_3_0, VI0_G1, SEL_VI0_0),
- 	PINMUX_IPSR_MODSEL_DATA(IP1_3_0, VI0_G1_B, SEL_VI0_1),
- 	PINMUX_IPSR_MODSEL_DATA(IP1_3_0, VI2_DATA1_VI2_B1, SEL_VI2_0),
- 	PINMUX_IPSR_DATA(IP1_7_4, D10),
- 	PINMUX_IPSR_MODSEL_DATA(IP1_7_4, SCIFA1_TXD_C, SEL_SCIFA1_2),
- 	PINMUX_IPSR_DATA(IP1_7_4, AVB_TXD2),
--	PINMUX_IPSR_DATA(IP1_7_4, MII_TXD2),
- 	PINMUX_IPSR_MODSEL_DATA(IP1_7_4, VI0_G2, SEL_VI0_0),
- 	PINMUX_IPSR_MODSEL_DATA(IP1_7_4, VI0_G2_B, SEL_VI0_1),
- 	PINMUX_IPSR_MODSEL_DATA(IP1_7_4, VI2_DATA2_VI2_B2, SEL_VI2_0),
- 	PINMUX_IPSR_DATA(IP1_11_8, D11),
- 	PINMUX_IPSR_MODSEL_DATA(IP1_11_8, SCIFA1_CTS_N_C, SEL_SCIFA1_2),
- 	PINMUX_IPSR_DATA(IP1_11_8, AVB_TXD3),
--	PINMUX_IPSR_DATA(IP1_11_8, MII_TXD3),
- 	PINMUX_IPSR_MODSEL_DATA(IP1_11_8, VI0_G3, SEL_VI0_0),
- 	PINMUX_IPSR_MODSEL_DATA(IP1_11_8, VI0_G3_B, SEL_VI0_1),
- 	PINMUX_IPSR_MODSEL_DATA(IP1_11_8, VI2_DATA3_VI2_B3, SEL_VI2_0),
-@@ -1148,28 +1142,24 @@ static const u16 pinmux_data[] = {
- 	PINMUX_IPSR_MODSEL_DATA(IP6_13_11, HRTS0_N_B, SEL_HSCIF0_1),
- 	PINMUX_IPSR_MODSEL_DATA(IP6_13_11, MSIOF0_RXD_B, SEL_SOF0_1),
- 	PINMUX_IPSR_DATA(IP6_16_14, ETH_CRS_DV),
--	PINMUX_IPSR_DATA(IP6_16_14, RMII_CRS_DV),
- 	PINMUX_IPSR_MODSEL_DATA(IP6_16_14, STP_ISCLK_0_B, SEL_SSP_1),
- 	PINMUX_IPSR_MODSEL_DATA(IP6_16_14, TS_SDEN0_D, SEL_TSIF0_3),
- 	PINMUX_IPSR_MODSEL_DATA(IP6_16_14, GLO_Q0_C, SEL_GPS_2),
- 	PINMUX_IPSR_MODSEL_DATA(IP6_16_14, IIC2_SCL_E, SEL_IIC2_4),
- 	PINMUX_IPSR_MODSEL_DATA(IP6_16_14, I2C2_SCL_E, SEL_I2C2_4),
- 	PINMUX_IPSR_DATA(IP6_19_17, ETH_RX_ER),
--	PINMUX_IPSR_DATA(IP6_19_17, RMII_RX_ER),
- 	PINMUX_IPSR_MODSEL_DATA(IP6_19_17, STP_ISD_0_B, SEL_SSP_1),
- 	PINMUX_IPSR_MODSEL_DATA(IP6_19_17, TS_SPSYNC0_D, SEL_TSIF0_3),
- 	PINMUX_IPSR_MODSEL_DATA(IP6_19_17, GLO_Q1_C, SEL_GPS_2),
- 	PINMUX_IPSR_MODSEL_DATA(IP6_19_17, IIC2_SDA_E, SEL_IIC2_4),
- 	PINMUX_IPSR_MODSEL_DATA(IP6_19_17, I2C2_SDA_E, SEL_I2C2_4),
- 	PINMUX_IPSR_DATA(IP6_22_20, ETH_RXD0),
--	PINMUX_IPSR_DATA(IP6_22_20, RMII_RXD0),
- 	PINMUX_IPSR_MODSEL_DATA(IP6_22_20, STP_ISEN_0_B, SEL_SSP_1),
- 	PINMUX_IPSR_MODSEL_DATA(IP6_22_20, TS_SDAT0_D, SEL_TSIF0_3),
- 	PINMUX_IPSR_MODSEL_DATA(IP6_22_20, GLO_I0_C, SEL_GPS_2),
- 	PINMUX_IPSR_MODSEL_DATA(IP6_22_20, SCIFB1_SCK_G, SEL_SCIFB1_6),
- 	PINMUX_IPSR_MODSEL_DATA(IP6_22_20, SCK1_E, SEL_SCIF1_4),
- 	PINMUX_IPSR_DATA(IP6_25_23, ETH_RXD1),
--	PINMUX_IPSR_DATA(IP6_25_23, RMII_RXD1),
- 	PINMUX_IPSR_MODSEL_DATA(IP6_25_23, HRX0_E, SEL_HSCIF0_4),
- 	PINMUX_IPSR_MODSEL_DATA(IP6_25_23, STP_ISSYNC_0_B, SEL_SSP_1),
- 	PINMUX_IPSR_MODSEL_DATA(IP6_25_23, TS_SCK0_D, SEL_TSIF0_3),
-@@ -1177,41 +1167,33 @@ static const u16 pinmux_data[] = {
- 	PINMUX_IPSR_MODSEL_DATA(IP6_25_23, SCIFB1_RXD_G, SEL_SCIFB1_6),
- 	PINMUX_IPSR_MODSEL_DATA(IP6_25_23, RX1_E, SEL_SCIF1_4),
- 	PINMUX_IPSR_DATA(IP6_28_26, ETH_LINK),
--	PINMUX_IPSR_DATA(IP6_28_26, RMII_LINK),
- 	PINMUX_IPSR_MODSEL_DATA(IP6_28_26, HTX0_E, SEL_HSCIF0_4),
- 	PINMUX_IPSR_MODSEL_DATA(IP6_28_26, STP_IVCXO27_0_B, SEL_SSP_1),
- 	PINMUX_IPSR_MODSEL_DATA(IP6_28_26, SCIFB1_TXD_G, SEL_SCIFB1_6),
- 	PINMUX_IPSR_MODSEL_DATA(IP6_28_26, TX1_E, SEL_SCIF1_4),
- 	PINMUX_IPSR_DATA(IP6_31_29, ETH_REF_CLK),
--	PINMUX_IPSR_DATA(IP6_31_29, RMII_REF_CLK),
- 	PINMUX_IPSR_MODSEL_DATA(IP6_31_29, HCTS0_N_E, SEL_HSCIF0_4),
- 	PINMUX_IPSR_MODSEL_DATA(IP6_31_29, STP_IVCXO27_1_B, SEL_SSP_1),
- 	PINMUX_IPSR_MODSEL_DATA(IP6_31_29, HRX0_F, SEL_HSCIF0_5),
- 
- 	PINMUX_IPSR_DATA(IP7_2_0, ETH_MDIO),
--	PINMUX_IPSR_DATA(IP7_2_0, RMII_MDIO),
- 	PINMUX_IPSR_MODSEL_DATA(IP7_2_0, HRTS0_N_E, SEL_HSCIF0_4),
- 	PINMUX_IPSR_MODSEL_DATA(IP7_2_0, SIM0_D_C, SEL_SIM_2),
- 	PINMUX_IPSR_MODSEL_DATA(IP7_2_0, HCTS0_N_F, SEL_HSCIF0_5),
- 	PINMUX_IPSR_DATA(IP7_5_3, ETH_TXD1),
--	PINMUX_IPSR_DATA(IP7_5_3, RMII_TXD1),
- 	PINMUX_IPSR_MODSEL_DATA(IP7_5_3, HTX0_F, SEL_HSCIF0_4),
- 	PINMUX_IPSR_MODSEL_DATA(IP7_5_3, BPFCLK_G, SEL_SIM_2),
- 	PINMUX_IPSR_MODSEL_DATA(IP7_5_3, RDS_CLK_F, SEL_HSCIF0_5),
- 	PINMUX_IPSR_DATA(IP7_7_6, ETH_TX_EN),
--	PINMUX_IPSR_DATA(IP7_7_6, RMII_TX_EN),
- 	PINMUX_IPSR_MODSEL_DATA(IP7_7_6, SIM0_CLK_C, SEL_SIM_2),
- 	PINMUX_IPSR_MODSEL_DATA(IP7_7_6, HRTS0_N_F, SEL_HSCIF0_5),
- 	PINMUX_IPSR_DATA(IP7_9_8, ETH_MAGIC),
--	PINMUX_IPSR_DATA(IP7_9_8, RMII_MAGIC),
- 	PINMUX_IPSR_MODSEL_DATA(IP7_9_8, SIM0_RST_C, SEL_SIM_2),
- 	PINMUX_IPSR_DATA(IP7_12_10, ETH_TXD0),
--	PINMUX_IPSR_DATA(IP7_12_10, RMII_TXD0),
- 	PINMUX_IPSR_MODSEL_DATA(IP7_12_10, STP_ISCLK_1_B, SEL_SSP_1),
- 	PINMUX_IPSR_MODSEL_DATA(IP7_12_10, TS_SDEN1_C, SEL_TSIF1_2),
- 	PINMUX_IPSR_MODSEL_DATA(IP7_12_10, GLO_SCLK_C, SEL_GPS_2),
- 	PINMUX_IPSR_DATA(IP7_15_13, ETH_MDC),
--	PINMUX_IPSR_DATA(IP7_15_13, RMII_MDC),
- 	PINMUX_IPSR_MODSEL_DATA(IP7_15_13, STP_ISD_1_B, SEL_SSP_1),
- 	PINMUX_IPSR_MODSEL_DATA(IP7_15_13, TS_SPSYNC1_C, SEL_TSIF1_2),
- 	PINMUX_IPSR_MODSEL_DATA(IP7_15_13, GLO_SDATA_C, SEL_GPS_2),
-@@ -1237,16 +1219,13 @@ static const u16 pinmux_data[] = {
- 	PINMUX_IPSR_MODSEL_DATA(IP7_28_27, VI0_CLK, SEL_VI0_0),
- 	PINMUX_IPSR_DATA(IP7_28_27, ATACS00_N),
- 	PINMUX_IPSR_DATA(IP7_28_27, AVB_RXD1),
--	PINMUX_IPSR_DATA(IP7_28_27, MII_RXD1),
- 	PINMUX_IPSR_MODSEL_DATA(IP7_30_29, VI0_DATA0_VI0_B0, SEL_VI0_0),
- 	PINMUX_IPSR_DATA(IP7_30_29, ATACS10_N),
- 	PINMUX_IPSR_DATA(IP7_30_29, AVB_RXD2),
--	PINMUX_IPSR_DATA(IP7_30_29, MII_RXD2),
- 
- 	PINMUX_IPSR_MODSEL_DATA(IP8_1_0, VI0_DATA1_VI0_B1, SEL_VI0_0),
- 	PINMUX_IPSR_DATA(IP8_1_0, ATARD0_N),
- 	PINMUX_IPSR_DATA(IP8_1_0, AVB_RXD3),
--	PINMUX_IPSR_DATA(IP8_1_0, MII_RXD3),
- 	PINMUX_IPSR_MODSEL_DATA(IP8_3_2, VI0_DATA2_VI0_B2, SEL_VI0_0),
- 	PINMUX_IPSR_DATA(IP8_3_2, ATAWR0_N),
- 	PINMUX_IPSR_DATA(IP8_3_2, AVB_RXD4),
-@@ -1261,32 +1240,25 @@ static const u16 pinmux_data[] = {
- 	PINMUX_IPSR_DATA(IP8_9_8, AVB_RXD7),
- 	PINMUX_IPSR_MODSEL_DATA(IP8_11_10, VI0_DATA6_VI0_B6, SEL_VI0_0),
- 	PINMUX_IPSR_DATA(IP8_11_10, AVB_RX_ER),
--	PINMUX_IPSR_DATA(IP8_11_10, MII_RX_ER),
- 	PINMUX_IPSR_MODSEL_DATA(IP8_13_12, VI0_DATA7_VI0_B7, SEL_VI0_0),
- 	PINMUX_IPSR_DATA(IP8_13_12, AVB_RX_CLK),
--	PINMUX_IPSR_DATA(IP8_13_12, MII_RX_CLK),
- 	PINMUX_IPSR_MODSEL_DATA(IP8_15_14, VI1_CLK, SEL_VI1_0),
- 	PINMUX_IPSR_DATA(IP8_15_14, AVB_RX_DV),
--	PINMUX_IPSR_DATA(IP8_15_14, MII_RX_DV),
- 	PINMUX_IPSR_MODSEL_DATA(IP8_17_16, VI1_DATA0_VI1_B0, SEL_VI1_0),
- 	PINMUX_IPSR_MODSEL_DATA(IP8_17_16, SCIFA1_SCK_D, SEL_SCIFA1_3),
- 	PINMUX_IPSR_DATA(IP8_17_16, AVB_CRS),
--	PINMUX_IPSR_DATA(IP8_17_16, MII_CRS),
- 	PINMUX_IPSR_MODSEL_DATA(IP8_19_18, VI1_DATA1_VI1_B1, SEL_VI1_0),
- 	PINMUX_IPSR_MODSEL_DATA(IP8_19_18, SCIFA1_RXD_D, SEL_SCIFA1_3),
- 	PINMUX_IPSR_DATA(IP8_19_18, AVB_MDC),
--	PINMUX_IPSR_DATA(IP8_19_18, MII_MDC),
- 	PINMUX_IPSR_MODSEL_DATA(IP8_21_20, VI1_DATA2_VI1_B2, SEL_VI1_0),
- 	PINMUX_IPSR_MODSEL_DATA(IP8_21_20, SCIFA1_TXD_D, SEL_SCIFA1_3),
- 	PINMUX_IPSR_DATA(IP8_21_20, AVB_MDIO),
--	PINMUX_IPSR_DATA(IP8_21_20, MII_MDIO),
- 	PINMUX_IPSR_MODSEL_DATA(IP8_23_22, VI1_DATA3_VI1_B3, SEL_VI1_0),
- 	PINMUX_IPSR_MODSEL_DATA(IP8_23_22, SCIFA1_CTS_N_D, SEL_SCIFA1_3),
- 	PINMUX_IPSR_DATA(IP8_23_22, AVB_GTX_CLK),
- 	PINMUX_IPSR_MODSEL_DATA(IP8_25_24, VI1_DATA4_VI1_B4, SEL_VI1_0),
- 	PINMUX_IPSR_MODSEL_DATA(IP8_25_24, SCIFA1_RTS_N_D, SEL_SCIFA1_3),
- 	PINMUX_IPSR_DATA(IP8_25_24, AVB_MAGIC),
--	PINMUX_IPSR_DATA(IP8_25_24, MII_MAGIC),
- 	PINMUX_IPSR_MODSEL_DATA(IP8_26, VI1_DATA5_VI1_B5, SEL_VI1_0),
- 	PINMUX_IPSR_MODSEL_DATA(IP8_26, AVB_PHY_INT, SEL_SCIFA1_3),
- 	PINMUX_IPSR_MODSEL_DATA(IP8_27, VI1_DATA6_VI1_B6, SEL_VI1_0),
-@@ -1329,26 +1301,20 @@ static const u16 pinmux_data[] = {
- 	PINMUX_IPSR_MODSEL_DATA(IP9_15_12, VI2_DATA7_VI2_B7_B, SEL_VI2_1),
- 	PINMUX_IPSR_DATA(IP9_17_16, SD1_CLK),
- 	PINMUX_IPSR_DATA(IP9_17_16, AVB_TX_EN),
--	PINMUX_IPSR_DATA(IP9_17_16, MII_TX_EN),
- 	PINMUX_IPSR_DATA(IP9_19_18, SD1_CMD),
- 	PINMUX_IPSR_DATA(IP9_19_18, AVB_TX_ER),
--	PINMUX_IPSR_DATA(IP9_19_18, MII_TX_ER),
- 	PINMUX_IPSR_MODSEL_DATA(IP9_19_18, SCIFB0_SCK_B, SEL_SCIFB_1),
- 	PINMUX_IPSR_DATA(IP9_21_20, SD1_DAT0),
- 	PINMUX_IPSR_DATA(IP9_21_20, AVB_TX_CLK),
--	PINMUX_IPSR_DATA(IP9_21_20, MII_TX_CLK),
- 	PINMUX_IPSR_MODSEL_DATA(IP9_21_20, SCIFB0_RXD_B, SEL_SCIFB_1),
- 	PINMUX_IPSR_DATA(IP9_23_22, SD1_DAT1),
- 	PINMUX_IPSR_DATA(IP9_23_22, AVB_LINK),
--	PINMUX_IPSR_DATA(IP9_23_22, MII_LINK),
- 	PINMUX_IPSR_MODSEL_DATA(IP9_23_22, SCIFB0_TXD_B, SEL_SCIFB_1),
- 	PINMUX_IPSR_DATA(IP9_25_24, SD1_DAT2),
- 	PINMUX_IPSR_DATA(IP9_25_24, AVB_COL),
--	PINMUX_IPSR_DATA(IP9_25_24, MII_COL),
- 	PINMUX_IPSR_MODSEL_DATA(IP9_25_24, SCIFB0_CTS_N_B, SEL_SCIFB_1),
- 	PINMUX_IPSR_DATA(IP9_27_26, SD1_DAT3),
- 	PINMUX_IPSR_DATA(IP9_27_26, AVB_RXD0),
--	PINMUX_IPSR_DATA(IP9_27_26, MII_RXD0),
- 	PINMUX_IPSR_MODSEL_DATA(IP9_27_26, SCIFB0_RTS_N_B, SEL_SCIFB_1),
- 	PINMUX_IPSR_DATA(IP9_31_28, SD1_CD),
- 	PINMUX_IPSR_DATA(IP9_31_28, MMC1_D6),
-@@ -3200,7 +3166,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
- 		/* IP0_31 [1] */
- 		0, 0,
- 		/* IP0_30_27 [4] */
--		FN_D8, FN_SCIFA1_SCK_C, FN_AVB_TXD0, FN_MII_TXD0,
-+		FN_D8, FN_SCIFA1_SCK_C, FN_AVB_TXD0, 0,
- 		FN_VI0_G0, FN_VI0_G0_B, FN_VI2_DATA0_VI2_B0,
- 		0, 0, 0, 0, 0, 0, 0, 0, 0,
- 		/* IP0_26_23 [4] */
-@@ -3256,15 +3222,15 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
- 		FN_VI0_HSYNC_N, FN_VI0_HSYNC_N_B, FN_VI2_DATA4_VI2_B4,
- 		0, 0,
- 		/* IP1_11_8 [4] */
--		FN_D11, FN_SCIFA1_CTS_N_C, FN_AVB_TXD3, FN_MII_TXD3,
-+		FN_D11, FN_SCIFA1_CTS_N_C, FN_AVB_TXD3, 0,
- 		FN_VI0_G3, FN_VI0_G3_B, FN_VI2_DATA3_VI2_B3,
- 		0, 0, 0, 0, 0, 0, 0, 0, 0,
- 		/* IP1_7_4 [4] */
--		FN_D10, FN_SCIFA1_TXD_C, FN_AVB_TXD2, FN_MII_TXD2,
-+		FN_D10, FN_SCIFA1_TXD_C, FN_AVB_TXD2, 0,
- 		FN_VI0_G2, FN_VI0_G2_B, FN_VI2_DATA2_VI2_B2,
- 		0, 0, 0, 0, 0, 0, 0, 0, 0,
- 		/* IP1_3_0 [4] */
--		FN_D9, FN_SCIFA1_RXD_C, FN_AVB_TXD1, FN_MII_TXD1,
-+		FN_D9, FN_SCIFA1_RXD_C, FN_AVB_TXD1, 0,
- 		FN_VI0_G1, FN_VI0_G1_B, FN_VI2_DATA1_VI2_B1,
- 		0, 0, 0, 0, 0, 0, 0, 0, 0, }
- 	},
-@@ -3404,22 +3370,22 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
- 	{ PINMUX_CFG_REG_VAR("IPSR6", 0xE6060038, 32,
- 			     3, 3, 3, 3, 3, 3, 3, 2, 3, 3, 3) {
- 		/* IP6_31_29 [3] */
--		FN_ETH_REF_CLK, FN_RMII_REF_CLK, FN_HCTS0_N_E,
-+		FN_ETH_REF_CLK, 0, FN_HCTS0_N_E,
- 		FN_STP_IVCXO27_1_B, FN_HRX0_F, 0, 0, 0,
- 		/* IP6_28_26 [3] */
--		FN_ETH_LINK, FN_RMII_LINK, FN_HTX0_E,
-+		FN_ETH_LINK, 0, FN_HTX0_E,
- 		FN_STP_IVCXO27_0_B, FN_SCIFB1_TXD_G, FN_TX1_E, 0, 0,
- 		/* IP6_25_23 [3] */
--		FN_ETH_RXD1, FN_RMII_RXD1, FN_HRX0_E, FN_STP_ISSYNC_0_B,
-+		FN_ETH_RXD1, 0, FN_HRX0_E, FN_STP_ISSYNC_0_B,
- 		FN_TS_SCK0_D, FN_GLO_I1_C, FN_SCIFB1_RXD_G, FN_RX1_E,
- 		/* IP6_22_20 [3] */
--		FN_ETH_RXD0, FN_RMII_RXD0, FN_STP_ISEN_0_B, FN_TS_SDAT0_D,
-+		FN_ETH_RXD0, 0, FN_STP_ISEN_0_B, FN_TS_SDAT0_D,
- 		FN_GLO_I0_C, FN_SCIFB1_SCK_G, FN_SCK1_E, 0,
- 		/* IP6_19_17 [3] */
--		FN_ETH_RX_ER, FN_RMII_RX_ER, FN_STP_ISD_0_B,
-+		FN_ETH_RX_ER, 0, FN_STP_ISD_0_B,
- 		FN_TS_SPSYNC0_D, FN_GLO_Q1_C, FN_IIC2_SDA_E, FN_I2C2_SDA_E, 0,
- 		/* IP6_16_14 [3] */
--		FN_ETH_CRS_DV, FN_RMII_CRS_DV, FN_STP_ISCLK_0_B,
-+		FN_ETH_CRS_DV, 0, FN_STP_ISCLK_0_B,
- 		FN_TS_SDEN0_D, FN_GLO_Q0_C, FN_IIC2_SCL_E,
- 		FN_I2C2_SCL_E, 0,
- 		/* IP6_13_11 [3] */
-@@ -3442,10 +3408,9 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
- 		/* IP7_31 [1] */
- 		0, 0,
- 		/* IP7_30_29 [2] */
--		FN_VI0_DATA0_VI0_B0, FN_ATACS10_N, FN_AVB_RXD2,
--		FN_MII_RXD2,
-+		FN_VI0_DATA0_VI0_B0, FN_ATACS10_N, FN_AVB_RXD2, 0,
- 		/* IP7_28_27 [2] */
--		FN_VI0_CLK, FN_ATACS00_N, FN_AVB_RXD1, FN_MII_RXD1,
-+		FN_VI0_CLK, FN_ATACS00_N, FN_AVB_RXD1, 0,
- 		/* IP7_26_25 [2] */
- 		FN_DU1_DOTCLKIN, FN_AUDIO_CLKC, FN_AUDIO_CLKOUT_C, 0,
- 		/* IP7_24_22 [3] */
-@@ -3458,20 +3423,20 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
- 		FN_PWM0, FN_SCIFA2_SCK_C, FN_STP_ISEN_1_B, FN_TS_SDAT1_C,
- 		FN_GLO_SS_C, 0, 0, 0,
- 		/* IP7_15_13 [3] */
--		FN_ETH_MDC, FN_RMII_MDC, FN_STP_ISD_1_B,
-+		FN_ETH_MDC, 0, FN_STP_ISD_1_B,
- 		FN_TS_SPSYNC1_C, FN_GLO_SDATA_C, 0, 0, 0,
- 		/* IP7_12_10 [3] */
--		FN_ETH_TXD0, FN_RMII_TXD0, FN_STP_ISCLK_1_B, FN_TS_SDEN1_C,
-+		FN_ETH_TXD0, 0, FN_STP_ISCLK_1_B, FN_TS_SDEN1_C,
- 		FN_GLO_SCLK_C, 0, 0, 0,
- 		/* IP7_9_8 [2] */
--		FN_ETH_MAGIC, FN_RMII_MAGIC, FN_SIM0_RST_C, 0,
-+		FN_ETH_MAGIC, 0, FN_SIM0_RST_C, 0,
- 		/* IP7_7_6 [2] */
--		FN_ETH_TX_EN, FN_RMII_TX_EN, FN_SIM0_CLK_C, FN_HRTS0_N_F,
-+		FN_ETH_TX_EN, 0, FN_SIM0_CLK_C, FN_HRTS0_N_F,
- 		/* IP7_5_3 [3] */
--		FN_ETH_TXD1, FN_RMII_TXD1, FN_HTX0_F, FN_BPFCLK_G, FN_RDS_CLK_F,
-+		FN_ETH_TXD1, 0, FN_HTX0_F, FN_BPFCLK_G, FN_RDS_CLK_F,
- 		0, 0, 0,
- 		/* IP7_2_0 [3] */
--		FN_ETH_MDIO, FN_RMII_MDIO, FN_HRTS0_N_E,
-+		FN_ETH_MDIO, 0, FN_HRTS0_N_E,
- 		FN_SIM0_D_C, FN_HCTS0_N_F, 0, 0, 0, }
- 	},
- 	{ PINMUX_CFG_REG_VAR("IPSR8", 0xE6060040, 32,
-@@ -3489,22 +3454,21 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
- 		FN_VI1_DATA5_VI1_B5, FN_AVB_PHY_INT,
- 		/* IP8_25_24 [2] */
- 		FN_VI1_DATA4_VI1_B4, FN_SCIFA1_RTS_N_D,
--		FN_AVB_MAGIC, FN_MII_MAGIC,
-+		FN_AVB_MAGIC, 0,
- 		/* IP8_23_22 [2] */
- 		FN_VI1_DATA3_VI1_B3, FN_SCIFA1_CTS_N_D, FN_AVB_GTX_CLK, 0,
- 		/* IP8_21_20 [2] */
--		FN_VI1_DATA2_VI1_B2, FN_SCIFA1_TXD_D, FN_AVB_MDIO,
--		FN_MII_MDIO,
-+		FN_VI1_DATA2_VI1_B2, FN_SCIFA1_TXD_D, FN_AVB_MDIO, 0,
- 		/* IP8_19_18 [2] */
--		FN_VI1_DATA1_VI1_B1, FN_SCIFA1_RXD_D, FN_AVB_MDC, FN_MII_MDC,
-+		FN_VI1_DATA1_VI1_B1, FN_SCIFA1_RXD_D, FN_AVB_MDC, 0,
- 		/* IP8_17_16 [2] */
--		FN_VI1_DATA0_VI1_B0, FN_SCIFA1_SCK_D, FN_AVB_CRS, FN_MII_CRS,
-+		FN_VI1_DATA0_VI1_B0, FN_SCIFA1_SCK_D, FN_AVB_CRS, 0,
- 		/* IP8_15_14 [2] */
--		FN_VI1_CLK, FN_AVB_RX_DV, FN_MII_RX_DV, 0,
-+		FN_VI1_CLK, FN_AVB_RX_DV, 0, 0,
- 		/* IP8_13_12 [2] */
--		FN_VI0_DATA7_VI0_B7, FN_AVB_RX_CLK, FN_MII_RX_CLK, 0,
-+		FN_VI0_DATA7_VI0_B7, FN_AVB_RX_CLK, 0, 0,
- 		/* IP8_11_10 [2] */
--		FN_VI0_DATA6_VI0_B6, FN_AVB_RX_ER, FN_MII_RX_ER, 0,
-+		FN_VI0_DATA6_VI0_B6, FN_AVB_RX_ER, 0, 0,
- 		/* IP8_9_8 [2] */
- 		FN_VI0_DATA5_VI0_B5, FN_EX_WAIT1, FN_AVB_RXD7, 0,
- 		/* IP8_7_6 [2] */
-@@ -3514,7 +3478,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
- 		/* IP8_3_2 [2] */
- 		FN_VI0_DATA2_VI0_B2, FN_ATAWR0_N, FN_AVB_RXD4, 0,
- 		/* IP8_1_0 [2] */
--		FN_VI0_DATA1_VI0_B1, FN_ATARD0_N, FN_AVB_RXD3, FN_MII_RXD3, }
-+		FN_VI0_DATA1_VI0_B1, FN_ATARD0_N, FN_AVB_RXD3, 0, }
- 	},
- 	{ PINMUX_CFG_REG_VAR("IPSR9", 0xE6060044, 32,
- 			     4, 2, 2, 2, 2, 2, 2, 4, 4, 2, 2, 2, 2) {
-@@ -3523,17 +3487,17 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
- 		FN_GLO_SS, FN_VI0_CLK_B, FN_IIC2_SCL_D, FN_I2C2_SCL_D,
- 		FN_SIM0_CLK_B, FN_VI3_CLK_B, 0, 0, 0, 0, 0, 0,
- 		/* IP9_27_26 [2] */
--		FN_SD1_DAT3, FN_AVB_RXD0, FN_MII_RXD0, FN_SCIFB0_RTS_N_B,
-+		FN_SD1_DAT3, FN_AVB_RXD0, 0, FN_SCIFB0_RTS_N_B,
- 		/* IP9_25_24 [2] */
--		FN_SD1_DAT2, FN_AVB_COL, FN_MII_COL, FN_SCIFB0_CTS_N_B,
-+		FN_SD1_DAT2, FN_AVB_COL, 0, FN_SCIFB0_CTS_N_B,
- 		/* IP9_23_22 [2] */
--		FN_SD1_DAT1, FN_AVB_LINK, FN_MII_LINK, FN_SCIFB0_TXD_B,
-+		FN_SD1_DAT1, FN_AVB_LINK, 0, FN_SCIFB0_TXD_B,
- 		/* IP9_21_20 [2] */
--		FN_SD1_DAT0, FN_AVB_TX_CLK, FN_MII_TX_CLK, FN_SCIFB0_RXD_B,
-+		FN_SD1_DAT0, FN_AVB_TX_CLK, 0, FN_SCIFB0_RXD_B,
- 		/* IP9_19_18 [2] */
--		FN_SD1_CMD, FN_AVB_TX_ER, FN_MII_TX_ER, FN_SCIFB0_SCK_B,
-+		FN_SD1_CMD, FN_AVB_TX_ER, 0, FN_SCIFB0_SCK_B,
- 		/* IP9_17_16 [2] */
--		FN_SD1_CLK, FN_AVB_TX_EN, FN_MII_TX_EN, 0,
-+		FN_SD1_CLK, FN_AVB_TX_EN, 0, 0,
- 		/* IP9_15_12 [4] */
- 		FN_SD0_WP, FN_MMC0_D7, FN_TS_SPSYNC0_B, FN_USB0_IDIN,
- 		FN_GLO_SDATA, FN_VI1_DATA7_VI1_B7_B, FN_IIC1_SDA_B,
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0562-sh-pfc-r8a7790-Remove-deprecated-RDS-pins.patch b/patches.renesas/0562-sh-pfc-r8a7790-Remove-deprecated-RDS-pins.patch
deleted file mode 100644
index 020f506e5e359..0000000000000
--- a/patches.renesas/0562-sh-pfc-r8a7790-Remove-deprecated-RDS-pins.patch
+++ /dev/null
@@ -1,321 +0,0 @@
-From b27d6f120c36b6dd8a79b1b2ff30105a2ede371f Mon Sep 17 00:00:00 2001
-From: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
-Date: Fri, 24 May 2013 16:14:24 +0900
-Subject: sh-pfc: r8a7790: Remove deprecated RDS pins
-
-The pins have been removed from the datasheet, remove them here as well.
-
-Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit 14da999bd69c3bc1f4b1066306d5b268d3dcb57c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 84 ++++++++++++++----------------------
- 1 file changed, 33 insertions(+), 51 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-index 5ddc19a3..ba6ea425 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-@@ -226,7 +226,7 @@ enum {
- 	/* IPSR7 */
- 	FN_ETH_MDIO, FN_HRTS0_N_E,
- 	FN_SIM0_D_C, FN_HCTS0_N_F, FN_ETH_TXD1,
--	FN_HTX0_F, FN_BPFCLK_G, FN_RDS_CLK_F,
-+	FN_HTX0_F, FN_BPFCLK_G,
- 	FN_ETH_TX_EN, FN_SIM0_CLK_C,
- 	FN_HRTS0_N_F, FN_ETH_MAGIC,
- 	FN_SIM0_RST_C, FN_ETH_TXD0,
-@@ -296,10 +296,10 @@ enum {
- 	FN_SD2_DAT0, FN_MMC0_D0, FN_FMCLK_B,
- 	FN_VI0_DATA2_VI0_B2_B, FN_SCIFB1_RXD_E, FN_RX1_D,
- 	FN_TS_SDAT0_C, FN_GLO_SS_B, FN_VI3_DATA2_B,
--	FN_SD2_DAT1, FN_MMC0_D1, FN_FMIN_B, FN_RDS_DATA,
-+	FN_SD2_DAT1, FN_MMC0_D1, FN_FMIN_B,
- 	FN_VI0_DATA3_VI0_B3_B, FN_SCIFB1_TXD_E, FN_TX1_D,
- 	FN_TS_SCK0_C, FN_GLO_RFON_B, FN_VI3_DATA3_B,
--	FN_SD2_DAT2, FN_MMC0_D2, FN_BPFCLK_B, FN_RDS_CLK,
-+	FN_SD2_DAT2, FN_MMC0_D2, FN_BPFCLK_B,
- 	FN_VI0_DATA4_VI0_B4_B, FN_HRX0_D, FN_TS_SDEN1_B,
- 	FN_GLO_Q0_B, FN_VI3_DATA4_B, FN_SD2_DAT3,
- 	FN_MMC0_D3, FN_SIM0_RST, FN_VI0_DATA5_VI0_B5_B,
-@@ -320,12 +320,12 @@ enum {
- 	FN_SCKZ, FN_SD3_CD, FN_MMC1_D4, FN_TS_SDAT1,
- 	FN_VSP, FN_GLO_Q0, FN_SIM0_RST_B, FN_SD3_WP,
- 	FN_MMC1_D5, FN_TS_SCK1, FN_GLO_Q1, FN_FMIN_C,
--	FN_RDS_DATA_B, FN_FMIN_E, FN_RDS_DATA_D, FN_FMIN_F,
--	FN_RDS_DATA_E, FN_MLB_CLK, FN_IIC2_SCL_B, FN_I2C2_SCL_B,
-+	FN_FMIN_E, FN_FMIN_F,
-+	FN_MLB_CLK, FN_IIC2_SCL_B, FN_I2C2_SCL_B,
- 	FN_MLB_SIG, FN_SCIFB1_RXD_D, FN_RX1_C, FN_IIC2_SDA_B,
- 	FN_I2C2_SDA_B, FN_MLB_DAT, FN_SPV_EVEN,
- 	FN_SCIFB1_TXD_D, FN_TX1_C, FN_BPFCLK_C,
--	FN_RDS_CLK_B, FN_SSI_SCK0129, FN_CAN_CLK_B,
-+	FN_SSI_SCK0129, FN_CAN_CLK_B,
- 	FN_MOUT0,
- 
- 	/* IPSR12 */
-@@ -352,12 +352,12 @@ enum {
- 	/* IPSR13 */
- 	FN_SSI_SDATA5, FN_SCIFB1_TXD, FN_IETX_B, FN_DU2_DR2,
- 	FN_LCDOUT2, FN_CAN_DEBUGOUT5, FN_SSI_SCK6,
--	FN_SCIFB1_CTS_N, FN_BPFCLK_D, FN_RDS_CLK_C,
-+	FN_SCIFB1_CTS_N, FN_BPFCLK_D,
- 	FN_DU2_DR3, FN_LCDOUT3, FN_CAN_DEBUGOUT6,
--	FN_BPFCLK_F, FN_RDS_CLK_E, FN_SSI_WS6,
-+	FN_BPFCLK_F, FN_SSI_WS6,
- 	FN_SCIFB1_RTS_N, FN_CAN0_TX_D, FN_DU2_DR4,
- 	FN_LCDOUT4, FN_CAN_DEBUGOUT7, FN_SSI_SDATA6,
--	FN_FMIN_D, FN_RDS_DATA_C, FN_DU2_DR5, FN_LCDOUT5,
-+	FN_FMIN_D, FN_DU2_DR5, FN_LCDOUT5,
- 	FN_CAN_DEBUGOUT8, FN_SSI_SCK78, FN_STP_IVCXO27_1,
- 	FN_SCK1, FN_SCIFA1_SCK, FN_DU2_DR6, FN_LCDOUT6,
- 	FN_CAN_DEBUGOUT9, FN_SSI_WS78, FN_STP_ISCLK_1,
-@@ -365,8 +365,8 @@ enum {
- 	FN_LCDOUT7, FN_CAN_DEBUGOUT10, FN_SSI_SDATA7,
- 	FN_STP_ISD_1, FN_SCIFB2_RXD, FN_SCIFA2_RTS_N,
- 	FN_TCLK2, FN_QSTVA_QVS, FN_CAN_DEBUGOUT11,
--	FN_BPFCLK_E, FN_RDS_CLK_D, FN_SSI_SDATA7_B,
--	FN_FMIN_G, FN_RDS_DATA_F, FN_SSI_SDATA8,
-+	FN_BPFCLK_E, FN_SSI_SDATA7_B,
-+	FN_FMIN_G, FN_SSI_SDATA8,
- 	FN_STP_ISEN_1, FN_SCIFB2_TXD, FN_CAN0_TX_C,
- 	FN_CAN_DEBUGOUT12, FN_SSI_SDATA8_B, FN_SSI_SDATA9,
- 	FN_STP_ISSYNC_1, FN_SCIFB2_CTS_N, FN_SSI_WS1,
-@@ -457,8 +457,6 @@ enum {
- 	FN_SEL_HSCIF0_0, FN_SEL_HSCIF0_1, FN_SEL_HSCIF0_2, FN_SEL_HSCIF0_3,
- 	FN_SEL_HSCIF0_4, FN_SEL_HSCIF0_5,
- 	FN_SEL_GPS_0, FN_SEL_GPS_1, FN_SEL_GPS_2,
--	FN_SEL_RDS_0, FN_SEL_RDS_1, FN_SEL_RDS_2,
--	FN_SEL_RDS_3, FN_SEL_RDS_4, FN_SEL_RDS_5,
- 	FN_SEL_SIM_0, FN_SEL_SIM_1, FN_SEL_SIM_2,
- 	FN_SEL_SSI8_0, FN_SEL_SSI8_1, FN_SEL_SSI8_2,
- 
-@@ -599,7 +597,7 @@ enum {
- 
- 	ETH_MDIO_MARK, HRTS0_N_E_MARK,
- 	SIM0_D_C_MARK, HCTS0_N_F_MARK, ETH_TXD1_MARK,
--	HTX0_F_MARK, BPFCLK_G_MARK, RDS_CLK_F_MARK,
-+	HTX0_F_MARK, BPFCLK_G_MARK,
- 	ETH_TX_EN_MARK, SIM0_CLK_C_MARK,
- 	HRTS0_N_F_MARK, ETH_MAGIC_MARK,
- 	SIM0_RST_C_MARK, ETH_TXD0_MARK,
-@@ -666,10 +664,10 @@ enum {
- 	SD2_DAT0_MARK, MMC0_D0_MARK, FMCLK_B_MARK,
- 	VI0_DATA2_VI0_B2_B_MARK, SCIFB1_RXD_E_MARK, RX1_D_MARK,
- 	TS_SDAT0_C_MARK, GLO_SS_B_MARK, VI3_DATA2_B_MARK,
--	SD2_DAT1_MARK, MMC0_D1_MARK, FMIN_B_MARK, RDS_DATA_MARK,
-+	SD2_DAT1_MARK, MMC0_D1_MARK, FMIN_B_MARK,
- 	VI0_DATA3_VI0_B3_B_MARK, SCIFB1_TXD_E_MARK, TX1_D_MARK,
- 	TS_SCK0_C_MARK, GLO_RFON_B_MARK, VI3_DATA3_B_MARK,
--	SD2_DAT2_MARK, MMC0_D2_MARK, BPFCLK_B_MARK, RDS_CLK_MARK,
-+	SD2_DAT2_MARK, MMC0_D2_MARK, BPFCLK_B_MARK,
- 	VI0_DATA4_VI0_B4_B_MARK, HRX0_D_MARK, TS_SDEN1_B_MARK,
- 	GLO_Q0_B_MARK, VI3_DATA4_B_MARK, SD2_DAT3_MARK,
- 	MMC0_D3_MARK, SIM0_RST_MARK, VI0_DATA5_VI0_B5_B_MARK,
-@@ -689,12 +687,12 @@ enum {
- 	SCKZ_MARK, SD3_CD_MARK, MMC1_D4_MARK, TS_SDAT1_MARK,
- 	VSP_MARK, GLO_Q0_MARK, SIM0_RST_B_MARK, SD3_WP_MARK,
- 	MMC1_D5_MARK, TS_SCK1_MARK, GLO_Q1_MARK, FMIN_C_MARK,
--	RDS_DATA_B_MARK, FMIN_E_MARK, RDS_DATA_D_MARK, FMIN_F_MARK,
--	RDS_DATA_E_MARK, MLB_CLK_MARK, IIC2_SCL_B_MARK, I2C2_SCL_B_MARK,
-+	FMIN_E_MARK, FMIN_F_MARK,
-+	MLB_CLK_MARK, IIC2_SCL_B_MARK, I2C2_SCL_B_MARK,
- 	MLB_SIG_MARK, SCIFB1_RXD_D_MARK, RX1_C_MARK, IIC2_SDA_B_MARK,
- 	I2C2_SDA_B_MARK, MLB_DAT_MARK, SPV_EVEN_MARK,
- 	SCIFB1_TXD_D_MARK, TX1_C_MARK, BPFCLK_C_MARK,
--	RDS_CLK_B_MARK, SSI_SCK0129_MARK, CAN_CLK_B_MARK,
-+	SSI_SCK0129_MARK, CAN_CLK_B_MARK,
- 	MOUT0_MARK,
- 
- 	SSI_WS0129_MARK, CAN0_TX_B_MARK, MOUT1_MARK,
-@@ -719,12 +717,12 @@ enum {
- 
- 	SSI_SDATA5_MARK, SCIFB1_TXD_MARK, IETX_B_MARK, DU2_DR2_MARK,
- 	LCDOUT2_MARK, CAN_DEBUGOUT5_MARK, SSI_SCK6_MARK,
--	SCIFB1_CTS_N_MARK, BPFCLK_D_MARK, RDS_CLK_C_MARK,
-+	SCIFB1_CTS_N_MARK, BPFCLK_D_MARK,
- 	DU2_DR3_MARK, LCDOUT3_MARK, CAN_DEBUGOUT6_MARK,
--	BPFCLK_F_MARK, RDS_CLK_E_MARK, SSI_WS6_MARK,
-+	BPFCLK_F_MARK, SSI_WS6_MARK,
- 	SCIFB1_RTS_N_MARK, CAN0_TX_D_MARK, DU2_DR4_MARK,
- 	LCDOUT4_MARK, CAN_DEBUGOUT7_MARK, SSI_SDATA6_MARK,
--	FMIN_D_MARK, RDS_DATA_C_MARK, DU2_DR5_MARK, LCDOUT5_MARK,
-+	FMIN_D_MARK, DU2_DR5_MARK, LCDOUT5_MARK,
- 	CAN_DEBUGOUT8_MARK, SSI_SCK78_MARK, STP_IVCXO27_1_MARK,
- 	SCK1_MARK, SCIFA1_SCK_MARK, DU2_DR6_MARK, LCDOUT6_MARK,
- 	CAN_DEBUGOUT9_MARK, SSI_WS78_MARK, STP_ISCLK_1_MARK,
-@@ -732,8 +730,8 @@ enum {
- 	LCDOUT7_MARK, CAN_DEBUGOUT10_MARK, SSI_SDATA7_MARK,
- 	STP_ISD_1_MARK, SCIFB2_RXD_MARK, SCIFA2_RTS_N_MARK,
- 	TCLK2_MARK, QSTVA_QVS_MARK, CAN_DEBUGOUT11_MARK,
--	BPFCLK_E_MARK, RDS_CLK_D_MARK, SSI_SDATA7_B_MARK,
--	FMIN_G_MARK, RDS_DATA_F_MARK, SSI_SDATA8_MARK,
-+	BPFCLK_E_MARK, SSI_SDATA7_B_MARK,
-+	FMIN_G_MARK, SSI_SDATA8_MARK,
- 	STP_ISEN_1_MARK, SCIFB2_TXD_MARK, CAN0_TX_C_MARK,
- 	CAN_DEBUGOUT12_MARK, SSI_SDATA8_B_MARK, SSI_SDATA9_MARK,
- 	STP_ISSYNC_1_MARK, SCIFB2_CTS_N_MARK, SSI_WS1_MARK,
-@@ -1183,7 +1181,6 @@ static const u16 pinmux_data[] = {
- 	PINMUX_IPSR_DATA(IP7_5_3, ETH_TXD1),
- 	PINMUX_IPSR_MODSEL_DATA(IP7_5_3, HTX0_F, SEL_HSCIF0_4),
- 	PINMUX_IPSR_MODSEL_DATA(IP7_5_3, BPFCLK_G, SEL_SIM_2),
--	PINMUX_IPSR_MODSEL_DATA(IP7_5_3, RDS_CLK_F, SEL_HSCIF0_5),
- 	PINMUX_IPSR_DATA(IP7_7_6, ETH_TX_EN),
- 	PINMUX_IPSR_MODSEL_DATA(IP7_7_6, SIM0_CLK_C, SEL_SIM_2),
- 	PINMUX_IPSR_MODSEL_DATA(IP7_7_6, HRTS0_N_F, SEL_HSCIF0_5),
-@@ -1364,7 +1361,6 @@ static const u16 pinmux_data[] = {
- 	PINMUX_IPSR_DATA(IP10_18_15, SD2_DAT1),
- 	PINMUX_IPSR_DATA(IP10_18_15, MMC0_D1),
- 	PINMUX_IPSR_MODSEL_DATA(IP10_18_15, FMIN_B, SEL_FM_1),
--	PINMUX_IPSR_MODSEL_DATA(IP10_18_15, RDS_DATA, SEL_RDS_0),
- 	PINMUX_IPSR_MODSEL_DATA(IP10_18_15, VI0_DATA3_VI0_B3_B, SEL_VI0_1),
- 	PINMUX_IPSR_MODSEL_DATA(IP10_18_15, SCIFB1_TXD_E, SEL_SCIFB1_4),
- 	PINMUX_IPSR_MODSEL_DATA(IP10_18_15, TX1_D, SEL_SCIF1_3),
-@@ -1374,7 +1370,6 @@ static const u16 pinmux_data[] = {
- 	PINMUX_IPSR_DATA(IP10_22_19, SD2_DAT2),
- 	PINMUX_IPSR_DATA(IP10_22_19, MMC0_D2),
- 	PINMUX_IPSR_MODSEL_DATA(IP10_22_19, BPFCLK_B, SEL_FM_1),
--	PINMUX_IPSR_MODSEL_DATA(IP10_22_19, RDS_CLK, SEL_RDS_0),
- 	PINMUX_IPSR_MODSEL_DATA(IP10_22_19, VI0_DATA4_VI0_B4_B, SEL_VI0_1),
- 	PINMUX_IPSR_MODSEL_DATA(IP10_22_19, HRX0_D, SEL_HSCIF0_3),
- 	PINMUX_IPSR_MODSEL_DATA(IP10_22_19, TS_SDEN1_B, SEL_TSIF1_1),
-@@ -1437,11 +1432,8 @@ static const u16 pinmux_data[] = {
- 	PINMUX_IPSR_MODSEL_DATA(IP11_21_18, TS_SCK1, SEL_TSIF1_0),
- 	PINMUX_IPSR_MODSEL_DATA(IP11_21_18, GLO_Q1, SEL_GPS_0),
- 	PINMUX_IPSR_MODSEL_DATA(IP11_21_18, FMIN_C, SEL_FM_2),
--	PINMUX_IPSR_MODSEL_DATA(IP11_21_18, RDS_DATA_B, SEL_RDS_1),
- 	PINMUX_IPSR_MODSEL_DATA(IP11_21_18, FMIN_E, SEL_FM_4),
--	PINMUX_IPSR_MODSEL_DATA(IP11_21_18, RDS_DATA_D, SEL_RDS_3),
- 	PINMUX_IPSR_MODSEL_DATA(IP11_21_18, FMIN_F, SEL_FM_5),
--	PINMUX_IPSR_MODSEL_DATA(IP11_21_18, RDS_DATA_E, SEL_RDS_4),
- 	PINMUX_IPSR_DATA(IP11_23_22, MLB_CLK),
- 	PINMUX_IPSR_MODSEL_DATA(IP11_23_22, IIC2_SCL_B, SEL_IIC2_1),
- 	PINMUX_IPSR_MODSEL_DATA(IP11_23_22, I2C2_SCL_B, SEL_I2C2_1),
-@@ -1455,7 +1447,6 @@ static const u16 pinmux_data[] = {
- 	PINMUX_IPSR_MODSEL_DATA(IP11_29_27, SCIFB1_TXD_D, SEL_SCIFB1_3),
- 	PINMUX_IPSR_MODSEL_DATA(IP11_29_27, TX1_C, SEL_SCIF1_2),
- 	PINMUX_IPSR_MODSEL_DATA(IP11_29_27, BPFCLK_C, SEL_FM_2),
--	PINMUX_IPSR_MODSEL_DATA(IP11_29_27, RDS_CLK_B, SEL_RDS_1),
- 	PINMUX_IPSR_DATA(IP11_31_30, SSI_SCK0129),
- 	PINMUX_IPSR_MODSEL_DATA(IP11_31_30, CAN_CLK_B, SEL_CANCLK_1),
- 	PINMUX_IPSR_DATA(IP11_31_30, MOUT0),
-@@ -1526,12 +1517,10 @@ static const u16 pinmux_data[] = {
- 	PINMUX_IPSR_MODSEL_DATA(IP13_6_3, SSI_SCK6, SEL_SSI6_0),
- 	PINMUX_IPSR_MODSEL_DATA(IP13_6_3, SCIFB1_CTS_N, SEL_SCIFB1_0),
- 	PINMUX_IPSR_MODSEL_DATA(IP13_6_3, BPFCLK_D, SEL_FM_3),
--	PINMUX_IPSR_MODSEL_DATA(IP13_6_3, RDS_CLK_C, SEL_RDS_2),
- 	PINMUX_IPSR_DATA(IP13_6_3, DU2_DR3),
- 	PINMUX_IPSR_DATA(IP13_6_3, LCDOUT3),
- 	PINMUX_IPSR_DATA(IP13_6_3, CAN_DEBUGOUT6),
- 	PINMUX_IPSR_MODSEL_DATA(IP13_6_3, BPFCLK_F, SEL_FM_5),
--	PINMUX_IPSR_MODSEL_DATA(IP13_6_3, RDS_CLK_E, SEL_RDS_4),
- 	PINMUX_IPSR_MODSEL_DATA(IP13_9_7, SSI_WS6, SEL_SSI6_0),
- 	PINMUX_IPSR_MODSEL_DATA(IP13_9_7, SCIFB1_RTS_N, SEL_SCIFB1_0),
- 	PINMUX_IPSR_MODSEL_DATA(IP13_9_7, CAN0_TX_D, SEL_CAN0_3),
-@@ -1540,7 +1529,6 @@ static const u16 pinmux_data[] = {
- 	PINMUX_IPSR_DATA(IP13_9_7, CAN_DEBUGOUT7),
- 	PINMUX_IPSR_MODSEL_DATA(IP13_12_10, SSI_SDATA6, SEL_SSI6_0),
- 	PINMUX_IPSR_MODSEL_DATA(IP13_12_10, FMIN_D, SEL_FM_3),
--	PINMUX_IPSR_MODSEL_DATA(IP13_12_10, RDS_DATA_C, SEL_RDS_2),
- 	PINMUX_IPSR_DATA(IP13_12_10, DU2_DR5),
- 	PINMUX_IPSR_DATA(IP13_12_10, LCDOUT5),
- 	PINMUX_IPSR_DATA(IP13_12_10, CAN_DEBUGOUT8),
-@@ -1566,10 +1554,8 @@ static const u16 pinmux_data[] = {
- 	PINMUX_IPSR_DATA(IP13_22_19, QSTVA_QVS),
- 	PINMUX_IPSR_DATA(IP13_22_19, CAN_DEBUGOUT11),
- 	PINMUX_IPSR_MODSEL_DATA(IP13_22_19, BPFCLK_E, SEL_FM_4),
--	PINMUX_IPSR_MODSEL_DATA(IP13_22_19, RDS_CLK_D, SEL_RDS_3),
- 	PINMUX_IPSR_MODSEL_DATA(IP13_22_19, SSI_SDATA7_B, SEL_SSI7_1),
- 	PINMUX_IPSR_MODSEL_DATA(IP13_22_19, FMIN_G, SEL_FM_6),
--	PINMUX_IPSR_MODSEL_DATA(IP13_22_19, RDS_DATA_F, SEL_RDS_5),
- 	PINMUX_IPSR_MODSEL_DATA(IP13_25_23, SSI_SDATA8, SEL_SSI8_0),
- 	PINMUX_IPSR_MODSEL_DATA(IP13_25_23, STP_ISEN_1, SEL_SSP_0),
- 	PINMUX_IPSR_MODSEL_DATA(IP13_25_23, SCIFB2_TXD, SEL_SCIFB2_0),
-@@ -3433,8 +3419,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
- 		/* IP7_7_6 [2] */
- 		FN_ETH_TX_EN, 0, FN_SIM0_CLK_C, FN_HRTS0_N_F,
- 		/* IP7_5_3 [3] */
--		FN_ETH_TXD1, 0, FN_HTX0_F, FN_BPFCLK_G, FN_RDS_CLK_F,
--		0, 0, 0,
-+		FN_ETH_TXD1, 0, FN_HTX0_F, FN_BPFCLK_G, 0, 0, 0, 0,
- 		/* IP7_2_0 [3] */
- 		FN_ETH_MDIO, 0, FN_HRTS0_N_E,
- 		FN_SIM0_D_C, FN_HCTS0_N_F, 0, 0, 0, }
-@@ -3527,11 +3512,11 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
- 		FN_SD2_DAT3, FN_MMC0_D3, FN_SIM0_RST, FN_VI0_DATA5_VI0_B5_B,
- 		FN_HTX0_D, FN_TS_SPSYNC1_B, FN_GLO_Q1_B, FN_VI3_DATA5_B,
- 		/* IP10_22_19 [4] */
--		FN_SD2_DAT2, FN_MMC0_D2, FN_BPFCLK_B, FN_RDS_CLK,
-+		FN_SD2_DAT2, FN_MMC0_D2, FN_BPFCLK_B, 0,
- 		FN_VI0_DATA4_VI0_B4_B, FN_HRX0_D, FN_TS_SDEN1_B,
- 		FN_GLO_Q0_B, FN_VI3_DATA4_B, 0, 0, 0, 0, 0, 0, 0,
- 		/* IP10_18_15 [4] */
--		FN_SD2_DAT1, FN_MMC0_D1, FN_FMIN_B, FN_RDS_DATA,
-+		FN_SD2_DAT1, FN_MMC0_D1, FN_FMIN_B, 0,
- 		FN_VI0_DATA3_VI0_B3_B, FN_SCIFB1_TXD_E, FN_TX1_D,
- 		FN_TS_SCK0_C, FN_GLO_RFON_B, FN_VI3_DATA3_B,
- 		0, 0, 0, 0, 0, 0,
-@@ -3560,7 +3545,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
- 		FN_SSI_SCK0129, FN_CAN_CLK_B, FN_MOUT0, 0,
- 		/* IP11_29_27 [3] */
- 		FN_MLB_DAT, FN_SPV_EVEN, FN_SCIFB1_TXD_D, FN_TX1_C, FN_BPFCLK_C,
--		FN_RDS_CLK_B, 0, 0,
-+		0, 0, 0,
- 		/* IP11_26_24 [3] */
- 		FN_MLB_SIG, FN_SCIFB1_RXD_D, FN_RX1_C, FN_IIC2_SDA_B, FN_I2C2_SDA_B,
- 		0, 0, 0,
-@@ -3568,8 +3553,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
- 		FN_MLB_CLK, FN_IIC2_SCL_B, FN_I2C2_SCL_B, 0,
- 		/* IP11_21_18 [4] */
- 		FN_SD3_WP, FN_MMC1_D5, FN_TS_SCK1, FN_GLO_Q1, FN_FMIN_C,
--		FN_RDS_DATA_B, FN_FMIN_E, FN_RDS_DATA_D, FN_FMIN_F,
--		FN_RDS_DATA_E, 0, 0, 0, 0, 0, 0,
-+		0, FN_FMIN_E, 0, FN_FMIN_F, 0, 0, 0, 0, 0, 0, 0,
- 		/* IP11_17_15 [3] */
- 		FN_SD3_CD, FN_MMC1_D4, FN_TS_SDAT1,
- 		FN_VSP, FN_GLO_Q0, FN_SIM0_RST_B, 0, 0,
-@@ -3644,8 +3628,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
- 		/* IP13_22_19 [4] */
- 		FN_SSI_SDATA7, FN_STP_ISD_1, FN_SCIFB2_RXD, FN_SCIFA2_RTS_N,
- 		FN_TCLK2, FN_QSTVA_QVS, FN_CAN_DEBUGOUT11, FN_BPFCLK_E,
--		FN_RDS_CLK_D, FN_SSI_SDATA7_B, FN_FMIN_G, FN_RDS_DATA_F,
--		0, 0, 0, 0,
-+		0, FN_SSI_SDATA7_B, FN_FMIN_G, 0, 0, 0, 0, 0,
- 		/* IP13_18_16 [3] */
- 		FN_SSI_WS78, FN_STP_ISCLK_1, FN_SCIFB2_SCK, FN_SCIFA2_CTS_N,
- 		FN_DU2_DR7, FN_LCDOUT7, FN_CAN_DEBUGOUT10, 0,
-@@ -3653,15 +3636,15 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
- 		FN_SSI_SCK78, FN_STP_IVCXO27_1, FN_SCK1, FN_SCIFA1_SCK,
- 		FN_DU2_DR6, FN_LCDOUT6, FN_CAN_DEBUGOUT9, 0,
- 		/* IP13_12_10 [3] */
--		FN_SSI_SDATA6, FN_FMIN_D, FN_RDS_DATA_C, FN_DU2_DR5, FN_LCDOUT5,
-+		FN_SSI_SDATA6, FN_FMIN_D, 0, FN_DU2_DR5, FN_LCDOUT5,
- 		FN_CAN_DEBUGOUT8, 0, 0,
- 		/* IP13_9_7 [3] */
- 		FN_SSI_WS6, FN_SCIFB1_RTS_N, FN_CAN0_TX_D, FN_DU2_DR4,
- 		FN_LCDOUT4, FN_CAN_DEBUGOUT7, 0, 0,
- 		/* IP13_6_3 [4] */
--		FN_SSI_SCK6, FN_SCIFB1_CTS_N, FN_BPFCLK_D, FN_RDS_CLK_C,
-+		FN_SSI_SCK6, FN_SCIFB1_CTS_N, FN_BPFCLK_D, 0,
- 		FN_DU2_DR3, FN_LCDOUT3, FN_CAN_DEBUGOUT6,
--		FN_BPFCLK_F, FN_RDS_CLK_E, 0, 0, 0, 0, 0, 0, 0,
-+		FN_BPFCLK_F, 0, 0, 0, 0, 0, 0, 0, 0,
- 		/* IP13_2_0 [3] */
- 		FN_SSI_SDATA5, FN_SCIFB1_TXD, FN_IETX_B, FN_DU2_DR2,
- 		FN_LCDOUT2, FN_CAN_DEBUGOUT5, 0, 0, }
-@@ -3855,9 +3838,8 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
- 		FN_SEL_HSCIF0_3, FN_SEL_HSCIF0_4, FN_SEL_HSCIF0_5, 0, 0,
- 		/* SEL_GPS [2] */
- 		FN_SEL_GPS_0, FN_SEL_GPS_1, FN_SEL_GPS_2, 0,
--		/* SEL_RDS [3] */
--		FN_SEL_RDS_0, FN_SEL_RDS_1, FN_SEL_RDS_2,
--		FN_SEL_RDS_3, FN_SEL_RDS_4, FN_SEL_RDS_5, 0, 0,
-+		/* RESERVED [3] */
-+		0, 0, 0, 0, 0, 0, 0, 0,
- 		/* SEL_SIM [2] */
- 		FN_SEL_SIM_0, FN_SEL_SIM_1, FN_SEL_SIM_2, 0,
- 		/* SEL_SSI8 [2] */
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0563-sh-pfc-r8a7790-Remove-deprecated-SPV_EVEN-pin.patch b/patches.renesas/0563-sh-pfc-r8a7790-Remove-deprecated-SPV_EVEN-pin.patch
deleted file mode 100644
index aca78964da26f..0000000000000
--- a/patches.renesas/0563-sh-pfc-r8a7790-Remove-deprecated-SPV_EVEN-pin.patch
+++ /dev/null
@@ -1,57 +0,0 @@
-From 6a252a5e5ba6465dfb6fba5ec607438a0d2a6a61 Mon Sep 17 00:00:00 2001
-From: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
-Date: Fri, 24 May 2013 17:26:08 +0900
-Subject: sh-pfc: r8a7790: Remove deprecated SPV_EVEN pin
-
-The pins have been removed from the datasheet, remove them here as well.
-
-Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit 7d2b2854c665ff1bcbf0e740c30bf3fc4dc760bf)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 7 +++----
- 1 file changed, 3 insertions(+), 4 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-index ba6ea425..be19b25e 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-@@ -323,7 +323,7 @@ enum {
- 	FN_FMIN_E, FN_FMIN_F,
- 	FN_MLB_CLK, FN_IIC2_SCL_B, FN_I2C2_SCL_B,
- 	FN_MLB_SIG, FN_SCIFB1_RXD_D, FN_RX1_C, FN_IIC2_SDA_B,
--	FN_I2C2_SDA_B, FN_MLB_DAT, FN_SPV_EVEN,
-+	FN_I2C2_SDA_B, FN_MLB_DAT,
- 	FN_SCIFB1_TXD_D, FN_TX1_C, FN_BPFCLK_C,
- 	FN_SSI_SCK0129, FN_CAN_CLK_B,
- 	FN_MOUT0,
-@@ -690,7 +690,7 @@ enum {
- 	FMIN_E_MARK, FMIN_F_MARK,
- 	MLB_CLK_MARK, IIC2_SCL_B_MARK, I2C2_SCL_B_MARK,
- 	MLB_SIG_MARK, SCIFB1_RXD_D_MARK, RX1_C_MARK, IIC2_SDA_B_MARK,
--	I2C2_SDA_B_MARK, MLB_DAT_MARK, SPV_EVEN_MARK,
-+	I2C2_SDA_B_MARK, MLB_DAT_MARK,
- 	SCIFB1_TXD_D_MARK, TX1_C_MARK, BPFCLK_C_MARK,
- 	SSI_SCK0129_MARK, CAN_CLK_B_MARK,
- 	MOUT0_MARK,
-@@ -1443,7 +1443,6 @@ static const u16 pinmux_data[] = {
- 	PINMUX_IPSR_MODSEL_DATA(IP11_26_24, IIC2_SDA_B, SEL_IIC2_1),
- 	PINMUX_IPSR_MODSEL_DATA(IP11_26_24, I2C2_SDA_B, SEL_I2C2_1),
- 	PINMUX_IPSR_DATA(IP11_29_27, MLB_DAT),
--	PINMUX_IPSR_DATA(IP11_29_27, SPV_EVEN),
- 	PINMUX_IPSR_MODSEL_DATA(IP11_29_27, SCIFB1_TXD_D, SEL_SCIFB1_3),
- 	PINMUX_IPSR_MODSEL_DATA(IP11_29_27, TX1_C, SEL_SCIF1_2),
- 	PINMUX_IPSR_MODSEL_DATA(IP11_29_27, BPFCLK_C, SEL_FM_2),
-@@ -3544,7 +3543,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
- 		/* IP11_31_30 [2] */
- 		FN_SSI_SCK0129, FN_CAN_CLK_B, FN_MOUT0, 0,
- 		/* IP11_29_27 [3] */
--		FN_MLB_DAT, FN_SPV_EVEN, FN_SCIFB1_TXD_D, FN_TX1_C, FN_BPFCLK_C,
-+		FN_MLB_DAT, 0, FN_SCIFB1_TXD_D, FN_TX1_C, FN_BPFCLK_C,
- 		0, 0, 0,
- 		/* IP11_26_24 [3] */
- 		FN_MLB_SIG, FN_SCIFB1_RXD_D, FN_RX1_C, FN_IIC2_SDA_B, FN_I2C2_SDA_B,
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0564-sh-pfc-r8a7790-Swap-SCIFA2_RXD_B-and-HRX0_C-configur.patch b/patches.renesas/0564-sh-pfc-r8a7790-Swap-SCIFA2_RXD_B-and-HRX0_C-configur.patch
deleted file mode 100644
index 2e61103a08dfa..0000000000000
--- a/patches.renesas/0564-sh-pfc-r8a7790-Swap-SCIFA2_RXD_B-and-HRX0_C-configur.patch
+++ /dev/null
@@ -1,94 +0,0 @@
-From a37c7e191c20ef11a2981f93e97fdc373abca1aa Mon Sep 17 00:00:00 2001
-From: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
-Date: Fri, 24 May 2013 17:50:44 +0900
-Subject: sh-pfc: r8a7790: Swap SCIFA2_RXD_B and HRX0_C configurations
-
-The SCIFA2 RXD_B and HRX0_C pins have their pinmux configuration data
-swapped, fix it.
-
-Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit 5de880dd953ebb5b5d7852ce568608e828a7217e)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 16 ++++++++--------
- 1 file changed, 8 insertions(+), 8 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-index be19b25e..1507d3e6 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-@@ -407,7 +407,7 @@ enum {
- 	FN_LCDOUT21, FN_MSIOF0_SCK, FN_TS_SDAT0, FN_ADICLK,
- 	FN_DU2_DB6, FN_LCDOUT22, FN_MSIOF0_SYNC, FN_TS_SCK0,
- 	FN_SSI_SCK2, FN_ADIDATA, FN_DU2_DB7, FN_LCDOUT23,
--	FN_SCIFA2_RXD_B, FN_MSIOF0_SS1, FN_ADICHS0,
-+	FN_HRX0_C, FN_MSIOF0_SS1, FN_ADICHS0,
- 	FN_DU2_DG5, FN_LCDOUT13, FN_MSIOF0_TXD, FN_ADICHS1,
- 	FN_DU2_DG6, FN_LCDOUT14,
- 
-@@ -415,7 +415,7 @@ enum {
- 	FN_MSIOF0_SS2, FN_AUDIO_CLKOUT, FN_ADICHS2,
- 	FN_DU2_DISP, FN_QPOLA, FN_HTX0_C, FN_SCIFA2_TXD_B,
- 	FN_MSIOF0_RXD, FN_TS_SPSYNC0, FN_SSI_WS2,
--	FN_ADICS_SAMP, FN_DU2_CDE, FN_QPOLB, FN_HRX0_C,
-+	FN_ADICS_SAMP, FN_DU2_CDE, FN_QPOLB, FN_SCIFA2_RXD_B,
- 	FN_USB1_PWEN, FN_AUDIO_CLKOUT_D, FN_USB1_OVC,
- 	FN_TCLK1_B,
- 
-@@ -770,14 +770,14 @@ enum {
- 	LCDOUT21_MARK, MSIOF0_SCK_MARK, TS_SDAT0_MARK, ADICLK_MARK,
- 	DU2_DB6_MARK, LCDOUT22_MARK, MSIOF0_SYNC_MARK, TS_SCK0_MARK,
- 	SSI_SCK2_MARK, ADIDATA_MARK, DU2_DB7_MARK, LCDOUT23_MARK,
--	SCIFA2_RXD_B_MARK, MSIOF0_SS1_MARK, ADICHS0_MARK,
-+	HRX0_C_MARK, MSIOF0_SS1_MARK, ADICHS0_MARK,
- 	DU2_DG5_MARK, LCDOUT13_MARK, MSIOF0_TXD_MARK, ADICHS1_MARK,
- 	DU2_DG6_MARK, LCDOUT14_MARK,
- 
- 	MSIOF0_SS2_MARK, AUDIO_CLKOUT_MARK, ADICHS2_MARK,
- 	DU2_DISP_MARK, QPOLA_MARK, HTX0_C_MARK, SCIFA2_TXD_B_MARK,
- 	MSIOF0_RXD_MARK, TS_SPSYNC0_MARK, SSI_WS2_MARK,
--	ADICS_SAMP_MARK, DU2_CDE_MARK, QPOLB_MARK, HRX0_C_MARK,
-+	ADICS_SAMP_MARK, DU2_CDE_MARK, QPOLB_MARK, SCIFA2_RXD_B_MARK,
- 	USB1_PWEN_MARK, AUDIO_CLKOUT_D_MARK, USB1_OVC_MARK,
- 	TCLK1_B_MARK,
- 	PINMUX_MARK_END,
-@@ -1685,7 +1685,7 @@ static const u16 pinmux_data[] = {
- 	PINMUX_IPSR_DATA(IP15_25_23, ADIDATA),
- 	PINMUX_IPSR_DATA(IP15_25_23, DU2_DB7),
- 	PINMUX_IPSR_DATA(IP15_25_23, LCDOUT23),
--	PINMUX_IPSR_MODSEL_DATA(IP15_25_23, SCIFA2_RXD_B, SEL_SCIFA2_1),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_25_23, HRX0_C, SEL_SCIFA2_1),
- 	PINMUX_IPSR_MODSEL_DATA(IP15_27_26, MSIOF0_SS1, SEL_SOF0_0),
- 	PINMUX_IPSR_DATA(IP15_27_26, ADICHS0),
- 	PINMUX_IPSR_DATA(IP15_27_26, DU2_DG5),
-@@ -1708,7 +1708,7 @@ static const u16 pinmux_data[] = {
- 	PINMUX_IPSR_DATA(IP16_5_3, ADICS_SAMP),
- 	PINMUX_IPSR_DATA(IP16_5_3, DU2_CDE),
- 	PINMUX_IPSR_DATA(IP16_5_3, QPOLB),
--	PINMUX_IPSR_MODSEL_DATA(IP16_5_3, HRX0_C, SEL_HSCIF0_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP16_5_3, SCIFA2_RXD_B, SEL_HSCIF0_2),
- 	PINMUX_IPSR_DATA(IP16_6, USB1_PWEN),
- 	PINMUX_IPSR_DATA(IP16_6, AUDIO_CLKOUT_D),
- 	PINMUX_IPSR_DATA(IP16_7, USB1_OVC),
-@@ -3696,7 +3696,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
- 		FN_MSIOF0_SS1, FN_ADICHS0, FN_DU2_DG5, FN_LCDOUT13,
- 		/* IP15_25_23 [3] */
- 		FN_MSIOF0_SYNC, FN_TS_SCK0, FN_SSI_SCK2, FN_ADIDATA,
--		FN_DU2_DB7, FN_LCDOUT23, FN_SCIFA2_RXD_B, 0,
-+		FN_DU2_DB7, FN_LCDOUT23, FN_HRX0_C, 0,
- 		/* IP15_22_20 [3] */
- 		FN_MSIOF0_SCK, FN_TS_SDAT0, FN_ADICLK,
- 		FN_DU2_DB6, FN_LCDOUT22, 0, 0, 0,
-@@ -3747,7 +3747,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
- 		FN_USB1_PWEN, FN_AUDIO_CLKOUT_D,
- 		/* IP16_5_3 [3] */
- 		FN_MSIOF0_RXD, FN_TS_SPSYNC0, FN_SSI_WS2,
--		FN_ADICS_SAMP, FN_DU2_CDE, FN_QPOLB, FN_HRX0_C, 0,
-+		FN_ADICS_SAMP, FN_DU2_CDE, FN_QPOLB, FN_SCIFA2_RXD_B, 0,
- 		/* IP16_2_0 [3] */
- 		FN_MSIOF0_SS2, FN_AUDIO_CLKOUT, FN_ADICHS2,
- 		FN_DU2_DISP, FN_QPOLA, FN_HTX0_C, FN_SCIFA2_TXD_B, 0, }
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0565-sh-pfc-r8a7790-Add-TCLK1-pin-configuration-support.patch b/patches.renesas/0565-sh-pfc-r8a7790-Add-TCLK1-pin-configuration-support.patch
deleted file mode 100644
index 8615ef1ecd7ea..0000000000000
--- a/patches.renesas/0565-sh-pfc-r8a7790-Add-TCLK1-pin-configuration-support.patch
+++ /dev/null
@@ -1,57 +0,0 @@
-From 562d63b0a26c69d27adc7a93f6970c828f0e1fbb Mon Sep 17 00:00:00 2001
-From: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
-Date: Fri, 24 May 2013 16:31:32 +0900
-Subject: sh-pfc: r8a7790: Add TCLK1 pin configuration support
-
-Update the pinmux configuration tables to support the TCLK1 pin.
-
-Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit 05bcb07bc8dd5f185e9f6568866e7b1abdc60e82)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 7 ++++---
- 1 file changed, 4 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-index 1507d3e6..1ae1dc75 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-@@ -113,7 +113,7 @@ enum {
- 	FN_VI0_R1, FN_VI0_R1_B, FN_TX0_B, FN_D6,
- 	FN_IIC2_SCL_C, FN_VI3_DATA6, FN_VI0_R2, FN_VI0_R2_B,
- 	FN_I2C2_SCL_C, FN_D7, FN_AD_DI_B, FN_IIC2_SDA_C,
--	FN_VI3_DATA7, FN_VI0_R3, FN_VI0_R3_B, FN_I2C2_SDA_C,
-+	FN_VI3_DATA7, FN_VI0_R3, FN_VI0_R3_B, FN_I2C2_SDA_C, FN_TCLK1,
- 	FN_D8, FN_SCIFA1_SCK_C, FN_AVB_TXD0,
- 	FN_VI0_G0, FN_VI0_G0_B, FN_VI2_DATA0_VI2_B0,
- 
-@@ -490,7 +490,7 @@ enum {
- 	VI0_R1_MARK, VI0_R1_B_MARK, TX0_B_MARK, D6_MARK,
- 	IIC2_SCL_C_MARK, VI3_DATA6_MARK, VI0_R2_MARK, VI0_R2_B_MARK,
- 	I2C2_SCL_C_MARK, D7_MARK, AD_DI_B_MARK, IIC2_SDA_C_MARK,
--	VI3_DATA7_MARK, VI0_R3_MARK, VI0_R3_B_MARK, I2C2_SDA_C_MARK,
-+	VI3_DATA7_MARK, VI0_R3_MARK, VI0_R3_B_MARK, I2C2_SDA_C_MARK, TCLK1_MARK,
- 	D8_MARK, SCIFA1_SCK_C_MARK, AVB_TXD0_MARK,
- 	VI0_G0_MARK, VI0_G0_B_MARK, VI2_DATA0_VI2_B0_MARK,
- 
-@@ -843,6 +843,7 @@ static const u16 pinmux_data[] = {
- 	PINMUX_IPSR_MODSEL_DATA(IP0_26_23, VI0_R3, SEL_VI0_0),
- 	PINMUX_IPSR_MODSEL_DATA(IP0_26_23, VI0_R3_B, SEL_VI0_1),
- 	PINMUX_IPSR_MODSEL_DATA(IP0_26_23, I2C2_SDA_C, SEL_I2C2_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP0_26_23, TCLK1, SEL_TMU1_0),
- 	PINMUX_IPSR_DATA(IP0_30_27, D8),
- 	PINMUX_IPSR_MODSEL_DATA(IP0_30_27, SCIFA1_SCK_C, SEL_SCIFA1_2),
- 	PINMUX_IPSR_DATA(IP0_30_27, AVB_TXD0),
-@@ -3157,7 +3158,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
- 		/* IP0_26_23 [4] */
- 		FN_D7, FN_AD_DI_B, FN_IIC2_SDA_C,
- 		FN_VI3_DATA7, FN_VI0_R3, FN_VI0_R3_B, FN_I2C2_SDA_C,
--		0, 0, 0, 0, 0, 0, 0, 0, 0,
-+		FN_TCLK1, 0, 0, 0, 0, 0, 0, 0, 0,
- 		/* IP0_22_20 [3] */
- 		FN_D6, FN_IIC2_SCL_C, FN_VI3_DATA6, FN_VI0_R2, FN_VI0_R2_B,
- 		FN_I2C2_SCL_C, 0, 0,
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0566-sh-pfc-r8a7790-Add-SCIF2-pins-configuration-support.patch b/patches.renesas/0566-sh-pfc-r8a7790-Add-SCIF2-pins-configuration-support.patch
deleted file mode 100644
index efc895b76ec3d..0000000000000
--- a/patches.renesas/0566-sh-pfc-r8a7790-Add-SCIF2-pins-configuration-support.patch
+++ /dev/null
@@ -1,163 +0,0 @@
-From 56d947d068e57efc226bdaf981e6e1909cf1c90b Mon Sep 17 00:00:00 2001
-From: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
-Date: Fri, 24 May 2013 16:56:54 +0900
-Subject: sh-pfc: r8a7790: Add SCIF2 pins configuration support
-
-Update the pinmux configuration tables to support the SCIF2 pins
-(TX2/TX2_B, RX2/RX2_B, SCK2).
-
-Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit 1ddb66cd6f337e3df5d51d0d3cdfd4507d9199c3)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 40 +++++++++++++++++++++---------------
- 1 file changed, 23 insertions(+), 17 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-index 1ae1dc75..344be5e3 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-@@ -141,9 +141,9 @@ enum {
- 	FN_A6, FN_SCIFA1_RTS_N_B, FN_TPU0TO2, FN_A7,
- 	FN_SCIFA1_SCK_B, FN_AUDIO_CLKOUT_B, FN_TPU0TO3,
- 	FN_A8, FN_SCIFA1_RXD_B, FN_SSI_SCK5_B, FN_VI0_R4,
--	FN_VI0_R4_B, FN_SCIFB2_RXD_C, FN_VI2_DATA0_VI2_B0_B,
-+	FN_VI0_R4_B, FN_SCIFB2_RXD_C, FN_RX2_B, FN_VI2_DATA0_VI2_B0_B,
- 	FN_A9, FN_SCIFA1_CTS_N_B, FN_SSI_WS5_B, FN_VI0_R5,
--	FN_VI0_R5_B, FN_SCIFB2_TXD_C, FN_VI2_DATA1_VI2_B1_B,
-+	FN_VI0_R5_B, FN_SCIFB2_TXD_C, FN_TX2_B, FN_VI2_DATA1_VI2_B1_B,
- 	FN_A10, FN_SSI_SDATA5_B, FN_MSIOF2_SYNC, FN_VI0_R6,
- 	FN_VI0_R6_B, FN_VI2_DATA2_VI2_B2_B,
- 
-@@ -395,10 +395,10 @@ enum {
- 	FN_HRTS0_N_C,
- 
- 	/* IPSR15 */
--	FN_SCIFA2_SCK, FN_FMCLK, FN_MSIOF3_SCK, FN_DU2_DG7,
-+	FN_SCIFA2_SCK, FN_FMCLK, FN_SCK2, FN_MSIOF3_SCK, FN_DU2_DG7,
- 	FN_LCDOUT15, FN_SCIF_CLK_B, FN_SCIFA2_RXD, FN_FMIN,
--	FN_DU2_DB0, FN_LCDOUT16, FN_IIC2_SCL, FN_I2C2_SCL,
--	FN_SCIFA2_TXD, FN_BPFCLK, FN_DU2_DB1, FN_LCDOUT17,
-+	FN_TX2, FN_DU2_DB0, FN_LCDOUT16, FN_IIC2_SCL, FN_I2C2_SCL,
-+	FN_SCIFA2_TXD, FN_BPFCLK, FN_RX2, FN_DU2_DB1, FN_LCDOUT17,
- 	FN_IIC2_SDA, FN_I2C2_SDA, FN_HSCK0, FN_TS_SDEN0,
- 	FN_DU2_DG4, FN_LCDOUT12, FN_HCTS0_N_C, FN_HRX0,
- 	FN_DU2_DB2, FN_LCDOUT18, FN_HTX0, FN_DU2_DB3,
-@@ -450,6 +450,7 @@ enum {
- 	FN_SEL_CANCLK_0, FN_SEL_CANCLK_1,
- 	FN_SEL_SCIFA2_0, FN_SEL_SCIFA2_1, FN_SEL_SCIFA2_2,
- 	FN_SEL_CAN1_0, FN_SEL_CAN1_1,
-+	FN_SEL_SCIF2_0, FN_SEL_SCIF2_1,
- 	FN_SEL_ADI_0, FN_SEL_ADI_1,
- 	FN_SEL_SSP_0, FN_SEL_SSP_1,
- 	FN_SEL_FM_0, FN_SEL_FM_1, FN_SEL_FM_2, FN_SEL_FM_3,
-@@ -516,9 +517,9 @@ enum {
- 	A6_MARK, SCIFA1_RTS_N_B_MARK, TPU0TO2_MARK, A7_MARK,
- 	SCIFA1_SCK_B_MARK, AUDIO_CLKOUT_B_MARK, TPU0TO3_MARK,
- 	A8_MARK, SCIFA1_RXD_B_MARK, SSI_SCK5_B_MARK, VI0_R4_MARK,
--	VI0_R4_B_MARK, SCIFB2_RXD_C_MARK, VI2_DATA0_VI2_B0_B_MARK,
-+	VI0_R4_B_MARK, SCIFB2_RXD_C_MARK, RX2_B_MARK, VI2_DATA0_VI2_B0_B_MARK,
- 	A9_MARK, SCIFA1_CTS_N_B_MARK, SSI_WS5_B_MARK, VI0_R5_MARK,
--	VI0_R5_B_MARK, SCIFB2_TXD_C_MARK, VI2_DATA1_VI2_B1_B_MARK,
-+	VI0_R5_B_MARK, SCIFB2_TXD_C_MARK, TX2_B_MARK, VI2_DATA1_VI2_B1_B_MARK,
- 	A10_MARK, SSI_SDATA5_B_MARK, MSIOF2_SYNC_MARK, VI0_R6_MARK,
- 	VI0_R6_B_MARK, VI2_DATA2_VI2_B2_B_MARK,
- 
-@@ -758,10 +759,10 @@ enum {
- 	MSIOF3_TXD_MARK, DU1_DOTCLKOUT_MARK, QSTVB_QVE_MARK,
- 	HRTS0_N_C_MARK,
- 
--	SCIFA2_SCK_MARK, FMCLK_MARK, MSIOF3_SCK_MARK, DU2_DG7_MARK,
-+	SCIFA2_SCK_MARK, FMCLK_MARK, SCK2_MARK, MSIOF3_SCK_MARK, DU2_DG7_MARK,
- 	LCDOUT15_MARK, SCIF_CLK_B_MARK, SCIFA2_RXD_MARK, FMIN_MARK,
--	DU2_DB0_MARK, LCDOUT16_MARK, IIC2_SCL_MARK, I2C2_SCL_MARK,
--	SCIFA2_TXD_MARK, BPFCLK_MARK, DU2_DB1_MARK, LCDOUT17_MARK,
-+	TX2_MARK, DU2_DB0_MARK, LCDOUT16_MARK, IIC2_SCL_MARK, I2C2_SCL_MARK,
-+	SCIFA2_TXD_MARK, BPFCLK_MARK, RX2_MARK, DU2_DB1_MARK, LCDOUT17_MARK,
- 	IIC2_SDA_MARK, I2C2_SDA_MARK, HSCK0_MARK, TS_SDEN0_MARK,
- 	DU2_DG4_MARK, LCDOUT12_MARK, HCTS0_N_C_MARK, HRX0_MARK,
- 	DU2_DB2_MARK, LCDOUT18_MARK, HTX0_MARK, DU2_DB3_MARK,
-@@ -924,6 +925,7 @@ static const u16 pinmux_data[] = {
- 	PINMUX_IPSR_MODSEL_DATA(IP2_21_18, VI0_R4, SEL_VI0_0),
- 	PINMUX_IPSR_MODSEL_DATA(IP2_21_18, VI0_R4_B, SEL_VI0_1),
- 	PINMUX_IPSR_MODSEL_DATA(IP2_21_18, SCIFB2_RXD_C, SEL_SCIFB2_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP2_21_18, RX2_B, SEL_SCIF2_1),
- 	PINMUX_IPSR_MODSEL_DATA(IP2_21_18, VI2_DATA0_VI2_B0_B, SEL_VI2_1),
- 	PINMUX_IPSR_DATA(IP2_25_22, A9),
- 	PINMUX_IPSR_MODSEL_DATA(IP2_25_22, SCIFA1_CTS_N_B, SEL_SCIFA1_1),
-@@ -931,6 +933,7 @@ static const u16 pinmux_data[] = {
- 	PINMUX_IPSR_MODSEL_DATA(IP2_25_22, VI0_R5, SEL_VI0_0),
- 	PINMUX_IPSR_MODSEL_DATA(IP2_25_22, VI0_R5_B, SEL_VI0_1),
- 	PINMUX_IPSR_MODSEL_DATA(IP2_25_22, SCIFB2_TXD_C, SEL_SCIFB2_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP2_25_22, TX2_B, SEL_SCIF2_1),
- 	PINMUX_IPSR_MODSEL_DATA(IP2_25_22, VI2_DATA1_VI2_B1_B, SEL_VI2_1),
- 	PINMUX_IPSR_DATA(IP2_28_26, A10),
- 	PINMUX_IPSR_MODSEL_DATA(IP2_28_26, SSI_SDATA5_B, SEL_SSI5_1),
-@@ -1639,18 +1642,21 @@ static const u16 pinmux_data[] = {
- 
- 	PINMUX_IPSR_MODSEL_DATA(IP15_2_0, SCIFA2_SCK, SEL_SCIFA2_0),
- 	PINMUX_IPSR_MODSEL_DATA(IP15_2_0, FMCLK, SEL_FM_0),
-+	PINMUX_IPSR_DATA(IP15_2_0, SCK2),
- 	PINMUX_IPSR_MODSEL_DATA(IP15_2_0, MSIOF3_SCK, SEL_SOF3_0),
- 	PINMUX_IPSR_DATA(IP15_2_0, DU2_DG7),
- 	PINMUX_IPSR_DATA(IP15_2_0, LCDOUT15),
- 	PINMUX_IPSR_MODSEL_DATA(IP15_2_0, SCIF_CLK_B, SEL_SCIFCLK_0),
- 	PINMUX_IPSR_MODSEL_DATA(IP15_5_3, SCIFA2_RXD, SEL_SCIFA2_0),
- 	PINMUX_IPSR_MODSEL_DATA(IP15_5_3, FMIN, SEL_FM_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_5_3, TX2, SEL_SCIF2_0),
- 	PINMUX_IPSR_DATA(IP15_5_3, DU2_DB0),
- 	PINMUX_IPSR_DATA(IP15_5_3, LCDOUT16),
- 	PINMUX_IPSR_MODSEL_DATA(IP15_5_3, IIC2_SCL, SEL_IIC2_0),
- 	PINMUX_IPSR_MODSEL_DATA(IP15_5_3, I2C2_SCL, SEL_I2C2_0),
- 	PINMUX_IPSR_MODSEL_DATA(IP15_8_6, SCIFA2_TXD, SEL_SCIFA2_0),
- 	PINMUX_IPSR_MODSEL_DATA(IP15_8_6, BPFCLK, SEL_FM_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_8_6, RX2, SEL_SCIF2_0),
- 	PINMUX_IPSR_DATA(IP15_8_6, DU2_DB1),
- 	PINMUX_IPSR_DATA(IP15_8_6, LCDOUT17),
- 	PINMUX_IPSR_MODSEL_DATA(IP15_8_6, IIC2_SDA, SEL_IIC2_0),
-@@ -3229,11 +3235,11 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
- 		FN_VI0_R6_B, FN_VI2_DATA2_VI2_B2_B, 0, 0,
- 		/* IP2_25_22 [4] */
- 		FN_A9, FN_SCIFA1_CTS_N_B, FN_SSI_WS5_B, FN_VI0_R5,
--		FN_VI0_R5_B, FN_SCIFB2_TXD_C, 0, FN_VI2_DATA1_VI2_B1_B,
-+		FN_VI0_R5_B, FN_SCIFB2_TXD_C, FN_TX2_B, FN_VI2_DATA1_VI2_B1_B,
- 		0, 0, 0, 0, 0, 0, 0, 0,
- 		/* IP2_21_18 [4] */
- 		FN_A8, FN_SCIFA1_RXD_B, FN_SSI_SCK5_B, FN_VI0_R4,
--		FN_VI0_R4_B, FN_SCIFB2_RXD_C, 0, FN_VI2_DATA0_VI2_B0_B,
-+		FN_VI0_R4_B, FN_SCIFB2_RXD_C, FN_RX2_B, FN_VI2_DATA0_VI2_B0_B,
- 		0, 0, 0, 0, 0, 0, 0, 0,
- 		/* IP2_17_15 [3] */
- 		FN_A7, FN_SCIFA1_SCK_B, FN_AUDIO_CLKOUT_B, FN_TPU0TO3,
-@@ -3713,13 +3719,13 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
- 		FN_HSCK0, FN_TS_SDEN0, FN_DU2_DG4, FN_LCDOUT12, FN_HCTS0_N_C,
- 		0, 0, 0,
- 		/* IP15_8_6 [3] */
--		FN_SCIFA2_TXD, FN_BPFCLK, 0, FN_DU2_DB1, FN_LCDOUT17,
-+		FN_SCIFA2_TXD, FN_BPFCLK, FN_RX2, FN_DU2_DB1, FN_LCDOUT17,
- 		FN_IIC2_SDA, FN_I2C2_SDA, 0,
- 		/* IP15_5_3 [3] */
--		FN_SCIFA2_RXD, FN_FMIN, 0, FN_DU2_DB0, FN_LCDOUT16,
-+		FN_SCIFA2_RXD, FN_FMIN, FN_TX2, FN_DU2_DB0, FN_LCDOUT16,
- 		FN_IIC2_SCL, FN_I2C2_SCL, 0,
- 		/* IP15_2_0 [3] */
--		FN_SCIFA2_SCK, FN_FMCLK, 0, FN_MSIOF3_SCK, FN_DU2_DG7,
-+		FN_SCIFA2_SCK, FN_FMCLK, FN_SCK2, FN_MSIOF3_SCK, FN_DU2_DG7,
- 		FN_LCDOUT15, FN_SCIF_CLK_B, 0, }
- 	},
- 	{ PINMUX_CFG_REG_VAR("IPSR16", 0xE6060160, 32,
-@@ -3824,8 +3830,8 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
- 		FN_SEL_CAN1_0, FN_SEL_CAN1_1,
- 		/* RESERVED [2] */
- 		0, 0, 0, 0,
--		/* RESERVED [1] (actually TX2, RX2 vs. TX2_B, RX2_B of SCIF2) */
--		0, 0,
-+		/* SEL_SCIF2 [1] */
-+		FN_SEL_SCIF2_0, FN_SEL_SCIF2_1,
- 		/* SEL_ADI [1] */
- 		FN_SEL_ADI_0, FN_SEL_ADI_1,
- 		/* SEL_SSP [1] */
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0567-sh-pfc-r8a7790-Fix-miscellaneous-pinmux-configuratio.patch b/patches.renesas/0567-sh-pfc-r8a7790-Fix-miscellaneous-pinmux-configuratio.patch
deleted file mode 100644
index f3370ca184094..0000000000000
--- a/patches.renesas/0567-sh-pfc-r8a7790-Fix-miscellaneous-pinmux-configuratio.patch
+++ /dev/null
@@ -1,140 +0,0 @@
-From 46ca753fea157c3bfe024cd040d3e1556a29adea Mon Sep 17 00:00:00 2001
-From: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
-Date: Mon, 27 May 2013 17:10:11 +0900
-Subject: sh-pfc: r8a7790: Fix miscellaneous pinmux configuration tables
- mistakes
-
-Fix erroneous entries in the pinmux configuration tables that affect
-HSCIF, I2C, LBSC, SCIF, SSI and VIN operation.
-
-Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit 0a664e3d7978f54af72277a969245ac5e6418cd9)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 31 +++++++++++++++----------------
- 1 file changed, 15 insertions(+), 16 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-index 344be5e3..93d4f788 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-@@ -877,7 +877,7 @@ static const u16 pinmux_data[] = {
- 	PINMUX_IPSR_MODSEL_DATA(IP1_14_12, VI0_HSYNC_N_B, SEL_VI0_1),
- 	PINMUX_IPSR_MODSEL_DATA(IP1_14_12, VI2_DATA4_VI2_B4, SEL_VI2_0),
- 	PINMUX_IPSR_DATA(IP1_17_15, D13),
--	PINMUX_IPSR_MODSEL_DATA(IP1_17_15, AVB_TXD5, SEL_SCIFA1_2),
-+	PINMUX_IPSR_DATA(IP1_17_15, AVB_TXD5),
- 	PINMUX_IPSR_MODSEL_DATA(IP1_17_15, VI0_VSYNC_N, SEL_VI0_0),
- 	PINMUX_IPSR_MODSEL_DATA(IP1_17_15, VI0_VSYNC_N_B, SEL_VI0_1),
- 	PINMUX_IPSR_MODSEL_DATA(IP1_17_15, VI2_DATA5_VI2_B5, SEL_VI2_0),
-@@ -948,14 +948,14 @@ static const u16 pinmux_data[] = {
- 	PINMUX_IPSR_MODSEL_DATA(IP3_3_0, VI1_R0, SEL_VI1_0),
- 	PINMUX_IPSR_MODSEL_DATA(IP3_3_0, VI1_R0_B, SEL_VI1_1),
- 	PINMUX_IPSR_DATA(IP3_3_0, VI2_G0),
--	PINMUX_IPSR_DATA(IP3_3_0, VI2_DATA3_VI2_B3_B),
-+	PINMUX_IPSR_MODSEL_DATA(IP3_3_0, VI2_DATA3_VI2_B3_B, SEL_VI2_1),
- 	PINMUX_IPSR_DATA(IP3_7_4, A12),
- 	PINMUX_IPSR_MODSEL_DATA(IP3_7_4, SCIFB2_RXD_B, SEL_SCIFB2_1),
- 	PINMUX_IPSR_DATA(IP3_7_4, MSIOF2_TXD),
- 	PINMUX_IPSR_MODSEL_DATA(IP3_7_4, VI1_R1, SEL_VI1_0),
- 	PINMUX_IPSR_MODSEL_DATA(IP3_7_4, VI1_R1_B, SEL_VI1_1),
- 	PINMUX_IPSR_DATA(IP3_7_4, VI2_G1),
--	PINMUX_IPSR_DATA(IP3_7_4, VI2_DATA4_VI2_B4_B),
-+	PINMUX_IPSR_MODSEL_DATA(IP3_7_4, VI2_DATA4_VI2_B4_B, SEL_VI2_1),
- 	PINMUX_IPSR_DATA(IP3_11_8, A13),
- 	PINMUX_IPSR_MODSEL_DATA(IP3_11_8, SCIFB2_RTS_N_B, SEL_SCIFB2_1),
- 	PINMUX_IPSR_DATA(IP3_11_8, EX_WAIT2),
-@@ -963,7 +963,7 @@ static const u16 pinmux_data[] = {
- 	PINMUX_IPSR_MODSEL_DATA(IP3_11_8, VI1_R2, SEL_VI1_0),
- 	PINMUX_IPSR_MODSEL_DATA(IP3_11_8, VI1_R2_B, SEL_VI1_1),
- 	PINMUX_IPSR_DATA(IP3_11_8, VI2_G2),
--	PINMUX_IPSR_MODSEL_DATA(IP3_11_8, VI2_DATA5_VI2_B5_B, SEL_VI2_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP3_11_8, VI2_DATA5_VI2_B5_B, SEL_VI2_1),
- 	PINMUX_IPSR_DATA(IP3_14_12, A14),
- 	PINMUX_IPSR_MODSEL_DATA(IP3_14_12, SCIFB2_TXD_B, SEL_SCIFB2_1),
- 	PINMUX_IPSR_DATA(IP3_14_12, ATACS11_N),
-@@ -1055,7 +1055,7 @@ static const u16 pinmux_data[] = {
- 	PINMUX_IPSR_MODSEL_DATA(IP5_2_0, VI1_G1, SEL_VI1_0),
- 	PINMUX_IPSR_MODSEL_DATA(IP5_2_0, VI1_G1_B, SEL_VI1_1),
- 	PINMUX_IPSR_DATA(IP5_2_0, VI2_R3),
--	PINMUX_IPSR_MODSEL_DATA(IP5_5_3, EX_CS4_N, SEL_I2C1_0),
-+	PINMUX_IPSR_DATA(IP5_5_3, EX_CS4_N),
- 	PINMUX_IPSR_MODSEL_DATA(IP5_5_3, MSIOF1_SCK_B, SEL_SOF1_1),
- 	PINMUX_IPSR_DATA(IP5_5_3, VI3_HSYNC_N),
- 	PINMUX_IPSR_MODSEL_DATA(IP5_5_3, VI2_HSYNC_N, SEL_VI2_0),
-@@ -1102,7 +1102,7 @@ static const u16 pinmux_data[] = {
- 	PINMUX_IPSR_DATA(IP5_23_21, VI2_R6),
- 	PINMUX_IPSR_MODSEL_DATA(IP5_23_21, SCIFA0_CTS_N_B, SEL_SCFA_1),
- 	PINMUX_IPSR_MODSEL_DATA(IP5_23_21, IERX_C, SEL_IEB_2),
--	PINMUX_IPSR_DATA(IP5_26_24, EX_WAIT0),
-+	PINMUX_IPSR_MODSEL_DATA(IP5_26_24, EX_WAIT0, SEL_LBS_0),
- 	PINMUX_IPSR_DATA(IP5_26_24, IRQ3),
- 	PINMUX_IPSR_DATA(IP5_26_24, INTC_IRQ3_N),
- 	PINMUX_IPSR_MODSEL_DATA(IP5_26_24, VI3_CLK, SEL_VI3_0),
-@@ -1183,8 +1183,8 @@ static const u16 pinmux_data[] = {
- 	PINMUX_IPSR_MODSEL_DATA(IP7_2_0, SIM0_D_C, SEL_SIM_2),
- 	PINMUX_IPSR_MODSEL_DATA(IP7_2_0, HCTS0_N_F, SEL_HSCIF0_5),
- 	PINMUX_IPSR_DATA(IP7_5_3, ETH_TXD1),
--	PINMUX_IPSR_MODSEL_DATA(IP7_5_3, HTX0_F, SEL_HSCIF0_4),
--	PINMUX_IPSR_MODSEL_DATA(IP7_5_3, BPFCLK_G, SEL_SIM_2),
-+	PINMUX_IPSR_MODSEL_DATA(IP7_5_3, HTX0_F, SEL_HSCIF0_5),
-+	PINMUX_IPSR_MODSEL_DATA(IP7_5_3, BPFCLK_G, SEL_FM_6),
- 	PINMUX_IPSR_DATA(IP7_7_6, ETH_TX_EN),
- 	PINMUX_IPSR_MODSEL_DATA(IP7_7_6, SIM0_CLK_C, SEL_SIM_2),
- 	PINMUX_IPSR_MODSEL_DATA(IP7_7_6, HRTS0_N_F, SEL_HSCIF0_5),
-@@ -1261,7 +1261,7 @@ static const u16 pinmux_data[] = {
- 	PINMUX_IPSR_MODSEL_DATA(IP8_25_24, SCIFA1_RTS_N_D, SEL_SCIFA1_3),
- 	PINMUX_IPSR_DATA(IP8_25_24, AVB_MAGIC),
- 	PINMUX_IPSR_MODSEL_DATA(IP8_26, VI1_DATA5_VI1_B5, SEL_VI1_0),
--	PINMUX_IPSR_MODSEL_DATA(IP8_26, AVB_PHY_INT, SEL_SCIFA1_3),
-+	PINMUX_IPSR_DATA(IP8_26, AVB_PHY_INT),
- 	PINMUX_IPSR_MODSEL_DATA(IP8_27, VI1_DATA6_VI1_B6, SEL_VI1_0),
- 	PINMUX_IPSR_DATA(IP8_27, AVB_GTXREFCLK),
- 	PINMUX_IPSR_DATA(IP8_28, SD0_CLK),
-@@ -1465,7 +1465,7 @@ static const u16 pinmux_data[] = {
- 	PINMUX_IPSR_DATA(IP12_5_4, MOUT5),
- 	PINMUX_IPSR_DATA(IP12_7_6, SSI_SDATA2),
- 	PINMUX_IPSR_MODSEL_DATA(IP12_7_6, CAN1_RX_B, SEL_CAN1_1),
--	PINMUX_IPSR_MODSEL_DATA(IP12_7_6, CAN1_TX_B, SEL_CAN1_1),
-+	PINMUX_IPSR_DATA(IP12_7_6, SSI_SCK1),
- 	PINMUX_IPSR_DATA(IP12_7_6, MOUT6),
- 	PINMUX_IPSR_DATA(IP12_10_8, SSI_SCK34),
- 	PINMUX_IPSR_DATA(IP12_10_8, STP_OPWM_0),
-@@ -1602,11 +1602,11 @@ static const u16 pinmux_data[] = {
- 	PINMUX_IPSR_DATA(IP14_11_9, LCDOUT1),
- 	PINMUX_IPSR_MODSEL_DATA(IP14_15_12, SCIFA0_CTS_N, SEL_SCFA_0),
- 	PINMUX_IPSR_MODSEL_DATA(IP14_15_12, HCTS1_N, SEL_HSCIF1_0),
--	PINMUX_IPSR_MODSEL_DATA(IP14_15_12, CTS0_N, SEL_SCIF0_0),
-+	PINMUX_IPSR_DATA(IP14_15_12, CTS0_N),
- 	PINMUX_IPSR_MODSEL_DATA(IP14_15_12, MSIOF3_SYNC, SEL_SOF3_0),
- 	PINMUX_IPSR_DATA(IP14_15_12, DU2_DG3),
--	PINMUX_IPSR_MODSEL_DATA(IP14_15_12, LCDOUT11, SEL_HSCIF1_0),
--	PINMUX_IPSR_MODSEL_DATA(IP14_15_12, PWM0_B, SEL_SCIF0_0),
-+	PINMUX_IPSR_DATA(IP14_15_12, LCDOUT11),
-+	PINMUX_IPSR_DATA(IP14_15_12, PWM0_B),
- 	PINMUX_IPSR_MODSEL_DATA(IP14_15_12, IIC1_SCL_C, SEL_IIC1_2),
- 	PINMUX_IPSR_MODSEL_DATA(IP14_15_12, I2C1_SCL_C, SEL_I2C1_2),
- 	PINMUX_IPSR_MODSEL_DATA(IP14_18_16, SCIFA0_RTS_N, SEL_SCFA_0),
-@@ -1646,7 +1646,7 @@ static const u16 pinmux_data[] = {
- 	PINMUX_IPSR_MODSEL_DATA(IP15_2_0, MSIOF3_SCK, SEL_SOF3_0),
- 	PINMUX_IPSR_DATA(IP15_2_0, DU2_DG7),
- 	PINMUX_IPSR_DATA(IP15_2_0, LCDOUT15),
--	PINMUX_IPSR_MODSEL_DATA(IP15_2_0, SCIF_CLK_B, SEL_SCIFCLK_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_2_0, SCIF_CLK_B, SEL_SCIFCLK_1),
- 	PINMUX_IPSR_MODSEL_DATA(IP15_5_3, SCIFA2_RXD, SEL_SCIFA2_0),
- 	PINMUX_IPSR_MODSEL_DATA(IP15_5_3, FMIN, SEL_FM_0),
- 	PINMUX_IPSR_MODSEL_DATA(IP15_5_3, TX2, SEL_SCIF2_0),
-@@ -1665,8 +1665,7 @@ static const u16 pinmux_data[] = {
- 	PINMUX_IPSR_MODSEL_DATA(IP15_11_9, TS_SDEN0, SEL_TSIF0_0),
- 	PINMUX_IPSR_DATA(IP15_11_9, DU2_DG4),
- 	PINMUX_IPSR_DATA(IP15_11_9, LCDOUT12),
--	PINMUX_IPSR_MODSEL_DATA(IP15_11_9, HCTS0_N_C, SEL_IIC2_0),
--	PINMUX_IPSR_MODSEL_DATA(IP15_11_9, I2C2_SDA, SEL_I2C2_0),
-+	PINMUX_IPSR_MODSEL_DATA(IP15_11_9, HCTS0_N_C, SEL_HSCIF0_2),
- 	PINMUX_IPSR_MODSEL_DATA(IP15_13_12, HRX0, SEL_HSCIF0_0),
- 	PINMUX_IPSR_DATA(IP15_13_12, DU2_DB2),
- 	PINMUX_IPSR_DATA(IP15_13_12, LCDOUT18),
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0568-sh-pfc-r8a7790-Sort-pin-groups-and-functions-alphabe.patch b/patches.renesas/0568-sh-pfc-r8a7790-Sort-pin-groups-and-functions-alphabe.patch
deleted file mode 100644
index be3a8f9b110ee..0000000000000
--- a/patches.renesas/0568-sh-pfc-r8a7790-Sort-pin-groups-and-functions-alphabe.patch
+++ /dev/null
@@ -1,653 +0,0 @@
-From 96045f7ed964adc331e3850dc56190a930a2bd81 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 24 Jul 2013 01:47:29 +0200
-Subject: sh-pfc: r8a7790: Sort pin groups and functions alphabetically
-
-Navigating through the source code is hard enough without having to
-manually search for groups and functions.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit 457c11d3e89f7c874d793b05a1c808f64d5f896f)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 560 +++++++++++++++++------------------
- 1 file changed, 280 insertions(+), 280 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-index 93d4f788..e0337832 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-@@ -1757,128 +1757,6 @@ static const unsigned int eth_rmii_mux[] = {
- 	ETH_RXD0_MARK, ETH_RXD1_MARK, ETH_RX_ER_MARK, ETH_CRS_DV_MARK,
- 	ETH_TXD0_MARK, ETH_TXD1_MARK, ETH_TX_EN_MARK, ETH_REF_CLK_MARK,
- };
--/* - INTC ------------------------------------------------------------------- */
--static const unsigned int intc_irq0_pins[] = {
--	/* IRQ */
--	RCAR_GP_PIN(1, 25),
--};
--static const unsigned int intc_irq0_mux[] = {
--	IRQ0_MARK,
--};
--static const unsigned int intc_irq1_pins[] = {
--	/* IRQ */
--	RCAR_GP_PIN(1, 27),
--};
--static const unsigned int intc_irq1_mux[] = {
--	IRQ1_MARK,
--};
--static const unsigned int intc_irq2_pins[] = {
--	/* IRQ */
--	RCAR_GP_PIN(1, 29),
--};
--static const unsigned int intc_irq2_mux[] = {
--	IRQ2_MARK,
--};
--static const unsigned int intc_irq3_pins[] = {
--	/* IRQ */
--	RCAR_GP_PIN(1, 23),
--};
--static const unsigned int intc_irq3_mux[] = {
--	IRQ3_MARK,
--};
--/* - SCIF0 ----------------------------------------------------------------- */
--static const unsigned int scif0_data_pins[] = {
--	/* RX, TX */
--	RCAR_GP_PIN(4, 28), RCAR_GP_PIN(4, 29),
--};
--static const unsigned int scif0_data_mux[] = {
--	RX0_MARK, TX0_MARK,
--};
--static const unsigned int scif0_clk_pins[] = {
--	/* SCK */
--	RCAR_GP_PIN(4, 27),
--};
--static const unsigned int scif0_clk_mux[] = {
--	SCK0_MARK,
--};
--static const unsigned int scif0_ctrl_pins[] = {
--	/* RTS, CTS */
--	RCAR_GP_PIN(4, 31), RCAR_GP_PIN(4, 30),
--};
--static const unsigned int scif0_ctrl_mux[] = {
--	RTS0_N_MARK, CTS0_N_MARK,
--};
--static const unsigned int scif0_data_b_pins[] = {
--	/* RX, TX */
--	RCAR_GP_PIN(0, 4), RCAR_GP_PIN(0, 5),
--};
--static const unsigned int scif0_data_b_mux[] = {
--	RX0_B_MARK, TX0_B_MARK,
--};
--/* - SCIF1 ----------------------------------------------------------------- */
--static const unsigned int scif1_data_pins[] = {
--	/* RX, TX */
--	RCAR_GP_PIN(5, 0), RCAR_GP_PIN(5, 1),
--};
--static const unsigned int scif1_data_mux[] = {
--	RX1_MARK, TX1_MARK,
--};
--static const unsigned int scif1_clk_pins[] = {
--	/* SCK */
--	RCAR_GP_PIN(4, 20),
--};
--static const unsigned int scif1_clk_mux[] = {
--	SCK1_MARK,
--};
--static const unsigned int scif1_ctrl_pins[] = {
--	/* RTS, CTS */
--	RCAR_GP_PIN(5, 3), RCAR_GP_PIN(5, 2),
--};
--static const unsigned int scif1_ctrl_mux[] = {
--	RTS1_N_MARK, CTS1_N_MARK,
--};
--static const unsigned int scif1_data_b_pins[] = {
--	/* RX, TX */
--	RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 15),
--};
--static const unsigned int scif1_data_b_mux[] = {
--	RX1_B_MARK, TX1_B_MARK,
--};
--static const unsigned int scif1_data_c_pins[] = {
--	/* RX, TX */
--	RCAR_GP_PIN(4, 1), RCAR_GP_PIN(4, 2),
--};
--static const unsigned int scif1_data_c_mux[] = {
--	RX1_C_MARK, TX1_C_MARK,
--};
--static const unsigned int scif1_data_d_pins[] = {
--	/* RX, TX */
--	RCAR_GP_PIN(3, 18), RCAR_GP_PIN(3, 19),
--};
--static const unsigned int scif1_data_d_mux[] = {
--	RX1_D_MARK, TX1_D_MARK,
--};
--static const unsigned int scif1_clk_d_pins[] = {
--	/* SCK */
--	RCAR_GP_PIN(3, 17),
--};
--static const unsigned int scif1_clk_d_mux[] = {
--	SCK1_D_MARK,
--};
--static const unsigned int scif1_data_e_pins[] = {
--	/* RX, TX */
--	RCAR_GP_PIN(2, 21), RCAR_GP_PIN(2, 22),
--};
--static const unsigned int scif1_data_e_mux[] = {
--	RX1_E_MARK, TX1_E_MARK,
--};
--static const unsigned int scif1_clk_e_pins[] = {
--	/* SCK */
--	RCAR_GP_PIN(2, 20),
--};
--static const unsigned int scif1_clk_e_mux[] = {
--	SCK1_E_MARK,
--};
- /* - HSCIF0 ----------------------------------------------------------------- */
- static const unsigned int hscif0_data_pins[] = {
- 	/* RX, TX */
-@@ -1990,29 +1868,219 @@ static const unsigned int hscif1_ctrl_pins[] = {
- 	/* RTS, CTS */
- 	RCAR_GP_PIN(4, 31), RCAR_GP_PIN(4, 30),
- };
--static const unsigned int hscif1_ctrl_mux[] = {
--	HRTS1_N_MARK, HCTS1_N_MARK,
-+static const unsigned int hscif1_ctrl_mux[] = {
-+	HRTS1_N_MARK, HCTS1_N_MARK,
-+};
-+static const unsigned int hscif1_data_b_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 18),
-+};
-+static const unsigned int hscif1_data_b_mux[] = {
-+	HRX1_B_MARK, HTX1_B_MARK,
-+};
-+static const unsigned int hscif1_clk_b_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(1, 28),
-+};
-+static const unsigned int hscif1_clk_b_mux[] = {
-+	HSCK1_B_MARK,
-+};
-+static const unsigned int hscif1_ctrl_b_pins[] = {
-+	/* RTS, CTS */
-+	RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 13),
-+};
-+static const unsigned int hscif1_ctrl_b_mux[] = {
-+	HRTS1_N_B_MARK, HCTS1_N_B_MARK,
-+};
-+/* - INTC ------------------------------------------------------------------- */
-+static const unsigned int intc_irq0_pins[] = {
-+	/* IRQ */
-+	RCAR_GP_PIN(1, 25),
-+};
-+static const unsigned int intc_irq0_mux[] = {
-+	IRQ0_MARK,
-+};
-+static const unsigned int intc_irq1_pins[] = {
-+	/* IRQ */
-+	RCAR_GP_PIN(1, 27),
-+};
-+static const unsigned int intc_irq1_mux[] = {
-+	IRQ1_MARK,
-+};
-+static const unsigned int intc_irq2_pins[] = {
-+	/* IRQ */
-+	RCAR_GP_PIN(1, 29),
-+};
-+static const unsigned int intc_irq2_mux[] = {
-+	IRQ2_MARK,
-+};
-+static const unsigned int intc_irq3_pins[] = {
-+	/* IRQ */
-+	RCAR_GP_PIN(1, 23),
-+};
-+static const unsigned int intc_irq3_mux[] = {
-+	IRQ3_MARK,
-+};
-+/* - MMCIF0 ----------------------------------------------------------------- */
-+static const unsigned int mmc0_data1_pins[] = {
-+	/* D[0] */
-+	RCAR_GP_PIN(3, 18),
-+};
-+static const unsigned int mmc0_data1_mux[] = {
-+	MMC0_D0_MARK,
-+};
-+static const unsigned int mmc0_data4_pins[] = {
-+	/* D[0:3] */
-+	RCAR_GP_PIN(3, 18), RCAR_GP_PIN(3, 19),
-+	RCAR_GP_PIN(3, 20), RCAR_GP_PIN(3, 21),
-+};
-+static const unsigned int mmc0_data4_mux[] = {
-+	MMC0_D0_MARK, MMC0_D1_MARK, MMC0_D2_MARK, MMC0_D3_MARK,
-+};
-+static const unsigned int mmc0_data8_pins[] = {
-+	/* D[0:7] */
-+	RCAR_GP_PIN(3, 18), RCAR_GP_PIN(3, 19),
-+	RCAR_GP_PIN(3, 20), RCAR_GP_PIN(3, 21),
-+	RCAR_GP_PIN(3, 22), RCAR_GP_PIN(3, 23),
-+	RCAR_GP_PIN(3, 6), RCAR_GP_PIN(3, 7),
-+};
-+static const unsigned int mmc0_data8_mux[] = {
-+	MMC0_D0_MARK, MMC0_D1_MARK, MMC0_D2_MARK, MMC0_D3_MARK,
-+	MMC0_D4_MARK, MMC0_D5_MARK, MMC0_D6_MARK, MMC0_D7_MARK,
-+};
-+static const unsigned int mmc0_ctrl_pins[] = {
-+	/* CLK, CMD */
-+	RCAR_GP_PIN(3, 16), RCAR_GP_PIN(3, 17),
-+};
-+static const unsigned int mmc0_ctrl_mux[] = {
-+	MMC0_CLK_MARK, MMC0_CMD_MARK,
-+};
-+/* - MMCIF1 ----------------------------------------------------------------- */
-+static const unsigned int mmc1_data1_pins[] = {
-+	/* D[0] */
-+	RCAR_GP_PIN(3, 26),
-+};
-+static const unsigned int mmc1_data1_mux[] = {
-+	MMC1_D0_MARK,
-+};
-+static const unsigned int mmc1_data4_pins[] = {
-+	/* D[0:3] */
-+	RCAR_GP_PIN(3, 26), RCAR_GP_PIN(3, 27),
-+	RCAR_GP_PIN(3, 28), RCAR_GP_PIN(3, 29),
-+};
-+static const unsigned int mmc1_data4_mux[] = {
-+	MMC1_D0_MARK, MMC1_D1_MARK, MMC1_D2_MARK, MMC1_D3_MARK,
-+};
-+static const unsigned int mmc1_data8_pins[] = {
-+	/* D[0:7] */
-+	RCAR_GP_PIN(3, 26), RCAR_GP_PIN(3, 27),
-+	RCAR_GP_PIN(3, 28), RCAR_GP_PIN(3, 29),
-+	RCAR_GP_PIN(3, 30), RCAR_GP_PIN(3, 31),
-+	RCAR_GP_PIN(3, 14), RCAR_GP_PIN(3, 15),
-+};
-+static const unsigned int mmc1_data8_mux[] = {
-+	MMC1_D0_MARK, MMC1_D1_MARK, MMC1_D2_MARK, MMC1_D3_MARK,
-+	MMC1_D4_MARK, MMC1_D5_MARK, MMC1_D6_MARK, MMC1_D7_MARK,
-+};
-+static const unsigned int mmc1_ctrl_pins[] = {
-+	/* CLK, CMD */
-+	RCAR_GP_PIN(3, 24), RCAR_GP_PIN(3, 25),
-+};
-+static const unsigned int mmc1_ctrl_mux[] = {
-+	MMC1_CLK_MARK, MMC1_CMD_MARK,
-+};
-+/* - SCIF0 ------------------------------------------------------------------ */
-+static const unsigned int scif0_data_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(4, 28), RCAR_GP_PIN(4, 29),
-+};
-+static const unsigned int scif0_data_mux[] = {
-+	RX0_MARK, TX0_MARK,
-+};
-+static const unsigned int scif0_clk_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(4, 27),
-+};
-+static const unsigned int scif0_clk_mux[] = {
-+	SCK0_MARK,
-+};
-+static const unsigned int scif0_ctrl_pins[] = {
-+	/* RTS, CTS */
-+	RCAR_GP_PIN(4, 31), RCAR_GP_PIN(4, 30),
-+};
-+static const unsigned int scif0_ctrl_mux[] = {
-+	RTS0_N_MARK, CTS0_N_MARK,
-+};
-+static const unsigned int scif0_data_b_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(0, 4), RCAR_GP_PIN(0, 5),
-+};
-+static const unsigned int scif0_data_b_mux[] = {
-+	RX0_B_MARK, TX0_B_MARK,
-+};
-+/* - SCIF1 ------------------------------------------------------------------ */
-+static const unsigned int scif1_data_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(5, 0), RCAR_GP_PIN(5, 1),
-+};
-+static const unsigned int scif1_data_mux[] = {
-+	RX1_MARK, TX1_MARK,
-+};
-+static const unsigned int scif1_clk_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(4, 20),
-+};
-+static const unsigned int scif1_clk_mux[] = {
-+	SCK1_MARK,
-+};
-+static const unsigned int scif1_ctrl_pins[] = {
-+	/* RTS, CTS */
-+	RCAR_GP_PIN(5, 3), RCAR_GP_PIN(5, 2),
-+};
-+static const unsigned int scif1_ctrl_mux[] = {
-+	RTS1_N_MARK, CTS1_N_MARK,
-+};
-+static const unsigned int scif1_data_b_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 15),
-+};
-+static const unsigned int scif1_data_b_mux[] = {
-+	RX1_B_MARK, TX1_B_MARK,
-+};
-+static const unsigned int scif1_data_c_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(4, 1), RCAR_GP_PIN(4, 2),
-+};
-+static const unsigned int scif1_data_c_mux[] = {
-+	RX1_C_MARK, TX1_C_MARK,
- };
--static const unsigned int hscif1_data_b_pins[] = {
-+static const unsigned int scif1_data_d_pins[] = {
- 	/* RX, TX */
--	RCAR_GP_PIN(1, 12), RCAR_GP_PIN(1, 18),
-+	RCAR_GP_PIN(3, 18), RCAR_GP_PIN(3, 19),
- };
--static const unsigned int hscif1_data_b_mux[] = {
--	HRX1_B_MARK, HTX1_B_MARK,
-+static const unsigned int scif1_data_d_mux[] = {
-+	RX1_D_MARK, TX1_D_MARK,
- };
--static const unsigned int hscif1_clk_b_pins[] = {
-+static const unsigned int scif1_clk_d_pins[] = {
- 	/* SCK */
--	RCAR_GP_PIN(1, 28),
-+	RCAR_GP_PIN(3, 17),
- };
--static const unsigned int hscif1_clk_b_mux[] = {
--	HSCK1_B_MARK,
-+static const unsigned int scif1_clk_d_mux[] = {
-+	SCK1_D_MARK,
- };
--static const unsigned int hscif1_ctrl_b_pins[] = {
--	/* RTS, CTS */
--	RCAR_GP_PIN(1, 14), RCAR_GP_PIN(1, 13),
-+static const unsigned int scif1_data_e_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(2, 21), RCAR_GP_PIN(2, 22),
- };
--static const unsigned int hscif1_ctrl_b_mux[] = {
--	HRTS1_N_B_MARK, HCTS1_N_B_MARK,
-+static const unsigned int scif1_data_e_mux[] = {
-+	RX1_E_MARK, TX1_E_MARK,
-+};
-+static const unsigned int scif1_clk_e_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(2, 20),
-+};
-+static const unsigned int scif1_clk_e_mux[] = {
-+	SCK1_E_MARK,
- };
- /* - SCIFA0 ----------------------------------------------------------------- */
- static const unsigned int scifa0_data_pins[] = {
-@@ -2377,103 +2445,6 @@ static const unsigned int scifb2_data_c_pins[] = {
- static const unsigned int scifb2_data_c_mux[] = {
- 	SCIFB2_RXD_C_MARK, SCIFB2_TXD_C_MARK,
- };
--/* - TPU0 ------------------------------------------------------------------- */
--static const unsigned int tpu0_to0_pins[] = {
--	/* TO */
--	RCAR_GP_PIN(0, 20),
--};
--static const unsigned int tpu0_to0_mux[] = {
--	TPU0TO0_MARK,
--};
--static const unsigned int tpu0_to1_pins[] = {
--	/* TO */
--	RCAR_GP_PIN(0, 21),
--};
--static const unsigned int tpu0_to1_mux[] = {
--	TPU0TO1_MARK,
--};
--static const unsigned int tpu0_to2_pins[] = {
--	/* TO */
--	RCAR_GP_PIN(0, 22),
--};
--static const unsigned int tpu0_to2_mux[] = {
--	TPU0TO2_MARK,
--};
--static const unsigned int tpu0_to3_pins[] = {
--	/* TO */
--	RCAR_GP_PIN(0, 23),
--};
--static const unsigned int tpu0_to3_mux[] = {
--	TPU0TO3_MARK,
--};
--/* - MMCIF0 ----------------------------------------------------------------- */
--static const unsigned int mmc0_data1_pins[] = {
--	/* D[0] */
--	RCAR_GP_PIN(3, 18),
--};
--static const unsigned int mmc0_data1_mux[] = {
--	MMC0_D0_MARK,
--};
--static const unsigned int mmc0_data4_pins[] = {
--	/* D[0:3] */
--	RCAR_GP_PIN(3, 18), RCAR_GP_PIN(3, 19),
--	RCAR_GP_PIN(3, 20), RCAR_GP_PIN(3, 21),
--};
--static const unsigned int mmc0_data4_mux[] = {
--	MMC0_D0_MARK, MMC0_D1_MARK, MMC0_D2_MARK, MMC0_D3_MARK,
--};
--static const unsigned int mmc0_data8_pins[] = {
--	/* D[0:7] */
--	RCAR_GP_PIN(3, 18), RCAR_GP_PIN(3, 19),
--	RCAR_GP_PIN(3, 20), RCAR_GP_PIN(3, 21),
--	RCAR_GP_PIN(3, 22), RCAR_GP_PIN(3, 23),
--	RCAR_GP_PIN(3, 6), RCAR_GP_PIN(3, 7),
--};
--static const unsigned int mmc0_data8_mux[] = {
--	MMC0_D0_MARK, MMC0_D1_MARK, MMC0_D2_MARK, MMC0_D3_MARK,
--	MMC0_D4_MARK, MMC0_D5_MARK, MMC0_D6_MARK, MMC0_D7_MARK,
--};
--static const unsigned int mmc0_ctrl_pins[] = {
--	/* CLK, CMD */
--	RCAR_GP_PIN(3, 16), RCAR_GP_PIN(3, 17),
--};
--static const unsigned int mmc0_ctrl_mux[] = {
--	MMC0_CLK_MARK, MMC0_CMD_MARK,
--};
--/* - MMCIF1 ----------------------------------------------------------------- */
--static const unsigned int mmc1_data1_pins[] = {
--	/* D[0] */
--	RCAR_GP_PIN(3, 26),
--};
--static const unsigned int mmc1_data1_mux[] = {
--	MMC1_D0_MARK,
--};
--static const unsigned int mmc1_data4_pins[] = {
--	/* D[0:3] */
--	RCAR_GP_PIN(3, 26), RCAR_GP_PIN(3, 27),
--	RCAR_GP_PIN(3, 28), RCAR_GP_PIN(3, 29),
--};
--static const unsigned int mmc1_data4_mux[] = {
--	MMC1_D0_MARK, MMC1_D1_MARK, MMC1_D2_MARK, MMC1_D3_MARK,
--};
--static const unsigned int mmc1_data8_pins[] = {
--	/* D[0:7] */
--	RCAR_GP_PIN(3, 26), RCAR_GP_PIN(3, 27),
--	RCAR_GP_PIN(3, 28), RCAR_GP_PIN(3, 29),
--	RCAR_GP_PIN(3, 30), RCAR_GP_PIN(3, 31),
--	RCAR_GP_PIN(3, 14), RCAR_GP_PIN(3, 15),
--};
--static const unsigned int mmc1_data8_mux[] = {
--	MMC1_D0_MARK, MMC1_D1_MARK, MMC1_D2_MARK, MMC1_D3_MARK,
--	MMC1_D4_MARK, MMC1_D5_MARK, MMC1_D6_MARK, MMC1_D7_MARK,
--};
--static const unsigned int mmc1_ctrl_pins[] = {
--	/* CLK, CMD */
--	RCAR_GP_PIN(3, 24), RCAR_GP_PIN(3, 25),
--};
--static const unsigned int mmc1_ctrl_mux[] = {
--	MMC1_CLK_MARK, MMC1_CMD_MARK,
--};
- /* - SDHI0 ------------------------------------------------------------------ */
- static const unsigned int sdhi0_data1_pins[] = {
- 	/* D0 */
-@@ -2618,6 +2589,35 @@ static const unsigned int sdhi3_wp_pins[] = {
- static const unsigned int sdhi3_wp_mux[] = {
- 	SD3_WP_MARK,
- };
-+/* - TPU0 ------------------------------------------------------------------- */
-+static const unsigned int tpu0_to0_pins[] = {
-+	/* TO */
-+	RCAR_GP_PIN(0, 20),
-+};
-+static const unsigned int tpu0_to0_mux[] = {
-+	TPU0TO0_MARK,
-+};
-+static const unsigned int tpu0_to1_pins[] = {
-+	/* TO */
-+	RCAR_GP_PIN(0, 21),
-+};
-+static const unsigned int tpu0_to1_mux[] = {
-+	TPU0TO1_MARK,
-+};
-+static const unsigned int tpu0_to2_pins[] = {
-+	/* TO */
-+	RCAR_GP_PIN(0, 22),
-+};
-+static const unsigned int tpu0_to2_mux[] = {
-+	TPU0TO2_MARK,
-+};
-+static const unsigned int tpu0_to3_pins[] = {
-+	/* TO */
-+	RCAR_GP_PIN(0, 23),
-+};
-+static const unsigned int tpu0_to3_mux[] = {
-+	TPU0TO3_MARK,
-+};
- 
- static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(eth_link),
-@@ -2752,6 +2752,31 @@ static const char * const eth_groups[] = {
- 	"eth_rmii",
- };
- 
-+static const char * const hscif0_groups[] = {
-+	"hscif0_data",
-+	"hscif0_clk",
-+	"hscif0_ctrl",
-+	"hscif0_data_b",
-+	"hscif0_ctrl_b",
-+	"hscif0_data_c",
-+	"hscif0_ctrl_c",
-+	"hscif0_data_d",
-+	"hscif0_ctrl_d",
-+	"hscif0_data_e",
-+	"hscif0_ctrl_e",
-+	"hscif0_data_f",
-+	"hscif0_ctrl_f",
-+};
-+
-+static const char * const hscif1_groups[] = {
-+	"hscif1_data",
-+	"hscif1_clk",
-+	"hscif1_ctrl",
-+	"hscif1_data_b",
-+	"hscif1_clk_b",
-+	"hscif1_ctrl_b",
-+};
-+
- static const char * const intc_groups[] = {
- 	"intc_irq0",
- 	"intc_irq1",
-@@ -2759,6 +2784,20 @@ static const char * const intc_groups[] = {
- 	"intc_irq3",
- };
- 
-+static const char * const mmc0_groups[] = {
-+	"mmc0_data1",
-+	"mmc0_data4",
-+	"mmc0_data8",
-+	"mmc0_ctrl",
-+};
-+
-+static const char * const mmc1_groups[] = {
-+	"mmc1_data1",
-+	"mmc1_data4",
-+	"mmc1_data8",
-+	"mmc1_ctrl",
-+};
-+
- static const char * const scif0_groups[] = {
- 	"scif0_data",
- 	"scif0_clk",
-@@ -2778,31 +2817,6 @@ static const char * const scif1_groups[] = {
- 	"scif1_clk_e",
- };
- 
--static const char * const hscif0_groups[] = {
--	"hscif0_data",
--	"hscif0_clk",
--	"hscif0_ctrl",
--	"hscif0_data_b",
--	"hscif0_ctrl_b",
--	"hscif0_data_c",
--	"hscif0_ctrl_c",
--	"hscif0_data_d",
--	"hscif0_ctrl_d",
--	"hscif0_data_e",
--	"hscif0_ctrl_e",
--	"hscif0_data_f",
--	"hscif0_ctrl_f",
--};
--
--static const char * const hscif1_groups[] = {
--	"hscif1_data",
--	"hscif1_clk",
--	"hscif1_ctrl",
--	"hscif1_data_b",
--	"hscif1_clk_b",
--	"hscif1_ctrl_b",
--};
--
- static const char * const scifa0_groups[] = {
- 	"scifa0_data",
- 	"scifa0_clk",
-@@ -2872,27 +2886,6 @@ static const char * const scifb2_groups[] = {
- 	"scifb2_data_c",
- };
- 
--static const char * const tpu0_groups[] = {
--	"tpu0_to0",
--	"tpu0_to1",
--	"tpu0_to2",
--	"tpu0_to3",
--};
--
--static const char * const mmc0_groups[] = {
--	"mmc0_data1",
--	"mmc0_data4",
--	"mmc0_data8",
--	"mmc0_ctrl",
--};
--
--static const char * const mmc1_groups[] = {
--	"mmc1_data1",
--	"mmc1_data4",
--	"mmc1_data8",
--	"mmc1_ctrl",
--};
--
- static const char * const sdhi0_groups[] = {
- 	"sdhi0_data1",
- 	"sdhi0_data4",
-@@ -2925,6 +2918,13 @@ static const char * const sdhi3_groups[] = {
- 	"sdhi3_wp",
- };
- 
-+static const char * const tpu0_groups[] = {
-+	"tpu0_to0",
-+	"tpu0_to1",
-+	"tpu0_to2",
-+	"tpu0_to3",
-+};
-+
- static const struct sh_pfc_function pinmux_functions[] = {
- 	SH_PFC_FUNCTION(eth),
- 	SH_PFC_FUNCTION(hscif0),
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0569-sh-pfc-r8a7790-Add-MSIOF-pin-groups-and-functions.patch b/patches.renesas/0569-sh-pfc-r8a7790-Add-MSIOF-pin-groups-and-functions.patch
deleted file mode 100644
index e1b84ffac854f..0000000000000
--- a/patches.renesas/0569-sh-pfc-r8a7790-Add-MSIOF-pin-groups-and-functions.patch
+++ /dev/null
@@ -1,285 +0,0 @@
-From 58b9dde799cd3f3c6ccecb901611efdc50566ab0 Mon Sep 17 00:00:00 2001
-From: Kunihito Higashiyama <kunihito.higashiyama.ur@renesas.com>
-Date: Fri, 28 Jun 2013 09:36:09 +0900
-Subject: sh-pfc: r8a7790: Add MSIOF pin groups and functions
-
-Signed-off-by: Kunihito Higashiyama <kunihito.higashiyama.ur@renesas.com>
-Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit 4f47cc5e307db4b7219012878cb3f7a65eaa2f7c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 236 +++++++++++++++++++++++++++++++++++
- 1 file changed, 236 insertions(+)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-index e0337832..8e61ba0c 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-@@ -1989,6 +1989,178 @@ static const unsigned int mmc1_ctrl_pins[] = {
- static const unsigned int mmc1_ctrl_mux[] = {
- 	MMC1_CLK_MARK, MMC1_CMD_MARK,
- };
-+/* - MSIOF0 ----------------------------------------------------------------- */
-+static const unsigned int msiof0_clk_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(5, 12),
-+};
-+static const unsigned int msiof0_clk_mux[] = {
-+	MSIOF0_SCK_MARK,
-+};
-+static const unsigned int msiof0_sync_pins[] = {
-+	/* SYNC */
-+	RCAR_GP_PIN(5, 13),
-+};
-+static const unsigned int msiof0_sync_mux[] = {
-+	MSIOF0_SYNC_MARK,
-+};
-+static const unsigned int msiof0_ss1_pins[] = {
-+	/* SS1 */
-+	RCAR_GP_PIN(5, 14),
-+};
-+static const unsigned int msiof0_ss1_mux[] = {
-+	MSIOF0_SS1_MARK,
-+};
-+static const unsigned int msiof0_ss2_pins[] = {
-+	/* SS2 */
-+	RCAR_GP_PIN(5, 16),
-+};
-+static const unsigned int msiof0_ss2_mux[] = {
-+	MSIOF0_SS2_MARK,
-+};
-+static const unsigned int msiof0_rx_pins[] = {
-+	/* RXD */
-+	RCAR_GP_PIN(5, 17),
-+};
-+static const unsigned int msiof0_rx_mux[] = {
-+	MSIOF0_RXD_MARK,
-+};
-+static const unsigned int msiof0_tx_pins[] = {
-+	/* TXD */
-+	RCAR_GP_PIN(5, 15),
-+};
-+static const unsigned int msiof0_tx_mux[] = {
-+	MSIOF0_TXD_MARK,
-+};
-+/* - MSIOF1 ----------------------------------------------------------------- */
-+static const unsigned int msiof1_clk_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(4, 8),
-+};
-+static const unsigned int msiof1_clk_mux[] = {
-+	MSIOF1_SCK_MARK,
-+};
-+static const unsigned int msiof1_sync_pins[] = {
-+	/* SYNC */
-+	RCAR_GP_PIN(4, 9),
-+};
-+static const unsigned int msiof1_sync_mux[] = {
-+	MSIOF1_SYNC_MARK,
-+};
-+static const unsigned int msiof1_ss1_pins[] = {
-+	/* SS1 */
-+	RCAR_GP_PIN(4, 10),
-+};
-+static const unsigned int msiof1_ss1_mux[] = {
-+	MSIOF1_SS1_MARK,
-+};
-+static const unsigned int msiof1_ss2_pins[] = {
-+	/* SS2 */
-+	RCAR_GP_PIN(4, 11),
-+};
-+static const unsigned int msiof1_ss2_mux[] = {
-+	MSIOF1_SS2_MARK,
-+};
-+static const unsigned int msiof1_rx_pins[] = {
-+	/* RXD */
-+	RCAR_GP_PIN(4, 13),
-+};
-+static const unsigned int msiof1_rx_mux[] = {
-+	MSIOF1_RXD_MARK,
-+};
-+static const unsigned int msiof1_tx_pins[] = {
-+	/* TXD */
-+	RCAR_GP_PIN(4, 12),
-+};
-+static const unsigned int msiof1_tx_mux[] = {
-+	MSIOF1_TXD_MARK,
-+};
-+/* - MSIOF2 ----------------------------------------------------------------- */
-+static const unsigned int msiof2_clk_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(0, 27),
-+};
-+static const unsigned int msiof2_clk_mux[] = {
-+	MSIOF2_SCK_MARK,
-+};
-+static const unsigned int msiof2_sync_pins[] = {
-+	/* SYNC */
-+	RCAR_GP_PIN(0, 26),
-+};
-+static const unsigned int msiof2_sync_mux[] = {
-+	MSIOF2_SYNC_MARK,
-+};
-+static const unsigned int msiof2_ss1_pins[] = {
-+	/* SS1 */
-+	RCAR_GP_PIN(0, 30),
-+};
-+static const unsigned int msiof2_ss1_mux[] = {
-+	MSIOF2_SS1_MARK,
-+};
-+static const unsigned int msiof2_ss2_pins[] = {
-+	/* SS2 */
-+	RCAR_GP_PIN(0, 31),
-+};
-+static const unsigned int msiof2_ss2_mux[] = {
-+	MSIOF2_SS2_MARK,
-+};
-+static const unsigned int msiof2_rx_pins[] = {
-+	/* RXD */
-+	RCAR_GP_PIN(0, 29),
-+};
-+static const unsigned int msiof2_rx_mux[] = {
-+	MSIOF2_RXD_MARK,
-+};
-+static const unsigned int msiof2_tx_pins[] = {
-+	/* TXD */
-+	RCAR_GP_PIN(0, 28),
-+};
-+static const unsigned int msiof2_tx_mux[] = {
-+	MSIOF2_TXD_MARK,
-+};
-+/* - MSIOF3 ----------------------------------------------------------------- */
-+static const unsigned int msiof3_clk_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(5, 4),
-+};
-+static const unsigned int msiof3_clk_mux[] = {
-+	MSIOF3_SCK_MARK,
-+};
-+static const unsigned int msiof3_sync_pins[] = {
-+	/* SYNC */
-+	RCAR_GP_PIN(4, 30),
-+};
-+static const unsigned int msiof3_sync_mux[] = {
-+	MSIOF3_SYNC_MARK,
-+};
-+static const unsigned int msiof3_ss1_pins[] = {
-+	/* SS1 */
-+	RCAR_GP_PIN(4, 31),
-+};
-+static const unsigned int msiof3_ss1_mux[] = {
-+	MSIOF3_SS1_MARK,
-+};
-+static const unsigned int msiof3_ss2_pins[] = {
-+	/* SS2 */
-+	RCAR_GP_PIN(4, 27),
-+};
-+static const unsigned int msiof3_ss2_mux[] = {
-+	MSIOF3_SS2_MARK,
-+};
-+static const unsigned int msiof3_rx_pins[] = {
-+	/* RXD */
-+	RCAR_GP_PIN(5, 2),
-+};
-+static const unsigned int msiof3_rx_mux[] = {
-+	MSIOF3_RXD_MARK,
-+};
-+static const unsigned int msiof3_tx_pins[] = {
-+	/* TXD */
-+	RCAR_GP_PIN(5, 3),
-+};
-+static const unsigned int msiof3_tx_mux[] = {
-+	MSIOF3_TXD_MARK,
-+};
- /* - SCIF0 ------------------------------------------------------------------ */
- static const unsigned int scif0_data_pins[] = {
- 	/* RX, TX */
-@@ -2655,6 +2827,30 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(mmc1_data4),
- 	SH_PFC_PIN_GROUP(mmc1_data8),
- 	SH_PFC_PIN_GROUP(mmc1_ctrl),
-+	SH_PFC_PIN_GROUP(msiof0_clk),
-+	SH_PFC_PIN_GROUP(msiof0_sync),
-+	SH_PFC_PIN_GROUP(msiof0_ss1),
-+	SH_PFC_PIN_GROUP(msiof0_ss2),
-+	SH_PFC_PIN_GROUP(msiof0_rx),
-+	SH_PFC_PIN_GROUP(msiof0_tx),
-+	SH_PFC_PIN_GROUP(msiof1_clk),
-+	SH_PFC_PIN_GROUP(msiof1_sync),
-+	SH_PFC_PIN_GROUP(msiof1_ss1),
-+	SH_PFC_PIN_GROUP(msiof1_ss2),
-+	SH_PFC_PIN_GROUP(msiof1_rx),
-+	SH_PFC_PIN_GROUP(msiof1_tx),
-+	SH_PFC_PIN_GROUP(msiof2_clk),
-+	SH_PFC_PIN_GROUP(msiof2_sync),
-+	SH_PFC_PIN_GROUP(msiof2_ss1),
-+	SH_PFC_PIN_GROUP(msiof2_ss2),
-+	SH_PFC_PIN_GROUP(msiof2_rx),
-+	SH_PFC_PIN_GROUP(msiof2_tx),
-+	SH_PFC_PIN_GROUP(msiof3_clk),
-+	SH_PFC_PIN_GROUP(msiof3_sync),
-+	SH_PFC_PIN_GROUP(msiof3_ss1),
-+	SH_PFC_PIN_GROUP(msiof3_ss2),
-+	SH_PFC_PIN_GROUP(msiof3_rx),
-+	SH_PFC_PIN_GROUP(msiof3_tx),
- 	SH_PFC_PIN_GROUP(scif0_data),
- 	SH_PFC_PIN_GROUP(scif0_clk),
- 	SH_PFC_PIN_GROUP(scif0_ctrl),
-@@ -2798,6 +2994,42 @@ static const char * const mmc1_groups[] = {
- 	"mmc1_ctrl",
- };
- 
-+static const char * const msiof0_groups[] = {
-+	"msiof0_clk",
-+	"msiof0_sync",
-+	"msiof0_ss1",
-+	"msiof0_ss2",
-+	"msiof0_rx",
-+	"msiof0_tx",
-+};
-+
-+static const char * const msiof1_groups[] = {
-+	"msiof1_clk",
-+	"msiof1_sync",
-+	"msiof1_ss1",
-+	"msiof1_ss2",
-+	"msiof1_rx",
-+	"msiof1_tx",
-+};
-+
-+static const char * const msiof2_groups[] = {
-+	"msiof2_clk",
-+	"msiof2_sync",
-+	"msiof2_ss1",
-+	"msiof2_ss2",
-+	"msiof2_rx",
-+	"msiof2_tx",
-+};
-+
-+static const char * const msiof3_groups[] = {
-+	"msiof3_clk",
-+	"msiof3_sync",
-+	"msiof3_ss1",
-+	"msiof3_ss2",
-+	"msiof3_rx",
-+	"msiof3_tx",
-+};
-+
- static const char * const scif0_groups[] = {
- 	"scif0_data",
- 	"scif0_clk",
-@@ -2932,6 +3164,10 @@ static const struct sh_pfc_function pinmux_functions[] = {
- 	SH_PFC_FUNCTION(intc),
- 	SH_PFC_FUNCTION(mmc0),
- 	SH_PFC_FUNCTION(mmc1),
-+	SH_PFC_FUNCTION(msiof0),
-+	SH_PFC_FUNCTION(msiof1),
-+	SH_PFC_FUNCTION(msiof2),
-+	SH_PFC_FUNCTION(msiof3),
- 	SH_PFC_FUNCTION(scif0),
- 	SH_PFC_FUNCTION(scif1),
- 	SH_PFC_FUNCTION(scifa0),
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0570-sh-pfc-r8a7790-Add-SCIF2-pin-groups-and-functions.patch b/patches.renesas/0570-sh-pfc-r8a7790-Add-SCIF2-pin-groups-and-functions.patch
deleted file mode 100644
index b37e5f5e20e84..0000000000000
--- a/patches.renesas/0570-sh-pfc-r8a7790-Add-SCIF2-pin-groups-and-functions.patch
+++ /dev/null
@@ -1,79 +0,0 @@
-From 9ca134ca36d1bb919aeb3b36bc47090973776b94 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 24 Jul 2013 02:02:58 +0200
-Subject: sh-pfc: r8a7790: Add SCIF2 pin groups and functions
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit 2dbe7f2cc91d679cdf6290b53f76f763802224cd)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 32 ++++++++++++++++++++++++++++++++
- 1 file changed, 32 insertions(+)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-index 8e61ba0c..6fc99fcb 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-@@ -2254,6 +2254,28 @@ static const unsigned int scif1_clk_e_pins[] = {
- static const unsigned int scif1_clk_e_mux[] = {
- 	SCK1_E_MARK,
- };
-+/* - SCIF2 ------------------------------------------------------------------ */
-+static const unsigned int scif2_data_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(5, 6), RCAR_GP_PIN(5, 5),
-+};
-+static const unsigned int scif2_data_mux[] = {
-+	RX2_MARK, TX2_MARK,
-+};
-+static const unsigned int scif2_clk_pins[] = {
-+	/* SCK */
-+	RCAR_GP_PIN(5, 4),
-+};
-+static const unsigned int scif2_clk_mux[] = {
-+	SCK2_MARK,
-+};
-+static const unsigned int scif2_data_b_pins[] = {
-+	/* RX, TX */
-+	RCAR_GP_PIN(0, 24), RCAR_GP_PIN(0, 25),
-+};
-+static const unsigned int scif2_data_b_mux[] = {
-+	RX2_B_MARK, TX2_B_MARK,
-+};
- /* - SCIFA0 ----------------------------------------------------------------- */
- static const unsigned int scifa0_data_pins[] = {
- 	/* RXD, TXD */
-@@ -2864,6 +2886,9 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(scif1_clk_d),
- 	SH_PFC_PIN_GROUP(scif1_data_e),
- 	SH_PFC_PIN_GROUP(scif1_clk_e),
-+	SH_PFC_PIN_GROUP(scif2_data),
-+	SH_PFC_PIN_GROUP(scif2_clk),
-+	SH_PFC_PIN_GROUP(scif2_data_b),
- 	SH_PFC_PIN_GROUP(scifa0_data),
- 	SH_PFC_PIN_GROUP(scifa0_clk),
- 	SH_PFC_PIN_GROUP(scifa0_ctrl),
-@@ -3049,6 +3074,12 @@ static const char * const scif1_groups[] = {
- 	"scif1_clk_e",
- };
- 
-+static const char * const scif2_groups[] = {
-+	"scif2_data",
-+	"scif2_clk",
-+	"scif2_data_b",
-+};
-+
- static const char * const scifa0_groups[] = {
- 	"scifa0_data",
- 	"scifa0_clk",
-@@ -3170,6 +3201,7 @@ static const struct sh_pfc_function pinmux_functions[] = {
- 	SH_PFC_FUNCTION(msiof3),
- 	SH_PFC_FUNCTION(scif0),
- 	SH_PFC_FUNCTION(scif1),
-+	SH_PFC_FUNCTION(scif2),
- 	SH_PFC_FUNCTION(scifa0),
- 	SH_PFC_FUNCTION(scifa1),
- 	SH_PFC_FUNCTION(scifa2),
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0571-sh-pfc-r8a7790-Add-USB-pin-groups-and-functions.patch b/patches.renesas/0571-sh-pfc-r8a7790-Add-USB-pin-groups-and-functions.patch
deleted file mode 100644
index a33f3b611f0dd..0000000000000
--- a/patches.renesas/0571-sh-pfc-r8a7790-Add-USB-pin-groups-and-functions.patch
+++ /dev/null
@@ -1,91 +0,0 @@
-From c68bac96b78409beb08dcaf2c3769ea5805d0f4f Mon Sep 17 00:00:00 2001
-From: Shinobu Uehara <shinobu.uehara.xc@renesas.com>
-Date: Wed, 26 Jun 2013 09:39:34 +0900
-Subject: sh-pfc: r8a7790: Add USB pin groups and functions
-
-Signed-off-by: Shinobu Uehara <shinobu.uehara.xc@renesas.com>
-Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit dac896e221d42316059fb87eb4b7bee226e7da5d)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 42 ++++++++++++++++++++++++++++++++++++
- 1 file changed, 42 insertions(+)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-index 6fc99fcb..f789dbd7 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-@@ -2812,6 +2812,30 @@ static const unsigned int tpu0_to3_pins[] = {
- static const unsigned int tpu0_to3_mux[] = {
- 	TPU0TO3_MARK,
- };
-+/* - USB0 ------------------------------------------------------------------- */
-+static const unsigned int usb0_pins[] = {
-+	/* PWEN, OVC/VBUS */
-+	RCAR_GP_PIN(5, 18), RCAR_GP_PIN(5, 19),
-+};
-+static const unsigned int usb0_mux[] = {
-+	USB0_PWEN_MARK, USB0_OVC_VBUS_MARK,
-+};
-+/* - USB1 ------------------------------------------------------------------- */
-+static const unsigned int usb1_pins[] = {
-+	/* PWEN, OVC */
-+	RCAR_GP_PIN(5, 20), RCAR_GP_PIN(5, 21),
-+};
-+static const unsigned int usb1_mux[] = {
-+	USB1_PWEN_MARK, USB1_OVC_MARK,
-+};
-+/* - USB2 ------------------------------------------------------------------- */
-+static const unsigned int usb2_pins[] = {
-+	/* PWEN, OVC */
-+	RCAR_GP_PIN(5, 22), RCAR_GP_PIN(5, 23),
-+};
-+static const unsigned int usb2_mux[] = {
-+	USB2_PWEN_MARK, USB2_OVC_MARK,
-+};
- 
- static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(eth_link),
-@@ -2964,6 +2988,9 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(tpu0_to1),
- 	SH_PFC_PIN_GROUP(tpu0_to2),
- 	SH_PFC_PIN_GROUP(tpu0_to3),
-+	SH_PFC_PIN_GROUP(usb0),
-+	SH_PFC_PIN_GROUP(usb1),
-+	SH_PFC_PIN_GROUP(usb2),
- };
- 
- static const char * const eth_groups[] = {
-@@ -3188,6 +3215,18 @@ static const char * const tpu0_groups[] = {
- 	"tpu0_to3",
- };
- 
-+static const char * const usb0_groups[] = {
-+	"usb0",
-+};
-+
-+static const char * const usb1_groups[] = {
-+	"usb1",
-+};
-+
-+static const char * const usb2_groups[] = {
-+	"usb2",
-+};
-+
- static const struct sh_pfc_function pinmux_functions[] = {
- 	SH_PFC_FUNCTION(eth),
- 	SH_PFC_FUNCTION(hscif0),
-@@ -3213,6 +3252,9 @@ static const struct sh_pfc_function pinmux_functions[] = {
- 	SH_PFC_FUNCTION(sdhi2),
- 	SH_PFC_FUNCTION(sdhi3),
- 	SH_PFC_FUNCTION(tpu0),
-+	SH_PFC_FUNCTION(usb0),
-+	SH_PFC_FUNCTION(usb1),
-+	SH_PFC_FUNCTION(usb2),
- };
- 
- static struct pinmux_cfg_reg pinmux_config_regs[] = {
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0572-sh-pfc-r8a7790-Add-VIN-pin-groups-and-functions.patch b/patches.renesas/0572-sh-pfc-r8a7790-Add-VIN-pin-groups-and-functions.patch
deleted file mode 100644
index dafa4388b4bd6..0000000000000
--- a/patches.renesas/0572-sh-pfc-r8a7790-Add-VIN-pin-groups-and-functions.patch
+++ /dev/null
@@ -1,155 +0,0 @@
-From 3156bc0250eb2b27fd1ddfe2b4f404067d3c40db Mon Sep 17 00:00:00 2001
-From: Shinobu Uehara <shinobu.uehara.xc@renesas.com>
-Date: Thu, 27 Jun 2013 19:38:02 +0900
-Subject: sh-pfc: r8a7790: Add VIN pin groups and functions
-
-Signed-off-by: Shinobu Uehara <shinobu.uehara.xc@renesas.com>
-Signed-off-by: Ryo Kataoka <ryo.kataoka.wt@renesas.com>
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-(cherry picked from commit e120cacfaac24d4de31b181371daaef6a5773ee3)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 106 +++++++++++++++++++++++++++++++++++
- 1 file changed, 106 insertions(+)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-index f789dbd7..763c031e 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-@@ -2836,6 +2836,84 @@ static const unsigned int usb2_pins[] = {
- static const unsigned int usb2_mux[] = {
- 	USB2_PWEN_MARK, USB2_OVC_MARK,
- };
-+/* - VIN0 ------------------------------------------------------------------- */
-+static const unsigned int vin0_data_g_pins[] = {
-+	RCAR_GP_PIN(0, 8), RCAR_GP_PIN(0, 9), RCAR_GP_PIN(0, 10),
-+	RCAR_GP_PIN(0, 11), RCAR_GP_PIN(0, 0), RCAR_GP_PIN(0, 1),
-+	RCAR_GP_PIN(0, 2), RCAR_GP_PIN(0, 3),
-+};
-+static const unsigned int vin0_data_g_mux[] = {
-+	VI0_G0_MARK, VI0_G1_MARK, VI0_G2_MARK,
-+	VI0_G3_MARK, VI0_G4_MARK, VI0_G5_MARK,
-+	VI0_G6_MARK, VI0_G7_MARK,
-+};
-+static const unsigned int vin0_data_r_pins[] = {
-+	RCAR_GP_PIN(0, 4), RCAR_GP_PIN(0, 5), RCAR_GP_PIN(0, 6),
-+	RCAR_GP_PIN(0, 7), RCAR_GP_PIN(0, 24), RCAR_GP_PIN(0, 25),
-+	RCAR_GP_PIN(0, 26), RCAR_GP_PIN(1, 11),
-+};
-+static const unsigned int vin0_data_r_mux[] = {
-+	VI0_R0_MARK, VI0_R1_MARK, VI0_R2_MARK,
-+	VI0_R3_MARK, VI0_R4_MARK, VI0_R5_MARK,
-+	VI0_R6_MARK, VI0_R7_MARK,
-+};
-+static const unsigned int vin0_data_b_pins[] = {
-+	RCAR_GP_PIN(2, 1), RCAR_GP_PIN(2, 2), RCAR_GP_PIN(2, 3),
-+	RCAR_GP_PIN(2, 4), RCAR_GP_PIN(2, 5), RCAR_GP_PIN(2, 6),
-+	RCAR_GP_PIN(2, 7), RCAR_GP_PIN(2, 8),
-+};
-+static const unsigned int vin0_data_b_mux[] = {
-+	VI0_DATA0_VI0_B0_MARK, VI0_DATA1_VI0_B1_MARK, VI0_DATA2_VI0_B2_MARK,
-+	VI0_DATA3_VI0_B3_MARK, VI0_DATA4_VI0_B4_MARK, VI0_DATA5_VI0_B5_MARK,
-+	VI0_DATA6_VI0_B6_MARK, VI0_DATA7_VI0_B7_MARK,
-+};
-+static const unsigned int vin0_hsync_signal_pins[] = {
-+	RCAR_GP_PIN(0, 12),
-+};
-+static const unsigned int vin0_hsync_signal_mux[] = {
-+	VI0_HSYNC_N_MARK,
-+};
-+static const unsigned int vin0_vsync_signal_pins[] = {
-+	RCAR_GP_PIN(0, 13),
-+};
-+static const unsigned int vin0_vsync_signal_mux[] = {
-+	VI0_VSYNC_N_MARK,
-+};
-+static const unsigned int vin0_field_signal_pins[] = {
-+	RCAR_GP_PIN(0, 15),
-+};
-+static const unsigned int vin0_field_signal_mux[] = {
-+	VI0_FIELD_MARK,
-+};
-+static const unsigned int vin0_data_enable_pins[] = {
-+	RCAR_GP_PIN(0, 14),
-+};
-+static const unsigned int vin0_data_enable_mux[] = {
-+	VI0_CLKENB_MARK,
-+};
-+static const unsigned int vin0_clk_pins[] = {
-+	RCAR_GP_PIN(2, 0),
-+};
-+static const unsigned int vin0_clk_mux[] = {
-+	VI0_CLK_MARK,
-+};
-+/* - VIN1 ------------------------------------------------------------------- */
-+static const unsigned int vin1_data_pins[] = {
-+	RCAR_GP_PIN(2, 10), RCAR_GP_PIN(2, 11), RCAR_GP_PIN(2, 12),
-+	RCAR_GP_PIN(2, 13), RCAR_GP_PIN(2, 14), RCAR_GP_PIN(2, 15),
-+	RCAR_GP_PIN(2, 16), RCAR_GP_PIN(2, 17),
-+};
-+static const unsigned int vin1_data_mux[] = {
-+	VI1_DATA0_VI1_B0_MARK, VI1_DATA1_VI1_B1_MARK, VI1_DATA2_VI1_B2_MARK,
-+	VI1_DATA3_VI1_B3_MARK, VI1_DATA4_VI1_B4_MARK, VI1_DATA5_VI1_B5_MARK,
-+	VI1_DATA6_VI1_B6_MARK, VI1_DATA7_VI1_B7_MARK,
-+};
-+static const unsigned int vin1_clk_pins[] = {
-+	RCAR_GP_PIN(2, 9),
-+};
-+static const unsigned int vin1_clk_mux[] = {
-+	VI1_CLK_MARK,
-+};
- 
- static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(eth_link),
-@@ -2991,6 +3069,16 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(usb0),
- 	SH_PFC_PIN_GROUP(usb1),
- 	SH_PFC_PIN_GROUP(usb2),
-+	SH_PFC_PIN_GROUP(vin0_data_g),
-+	SH_PFC_PIN_GROUP(vin0_data_r),
-+	SH_PFC_PIN_GROUP(vin0_data_b),
-+	SH_PFC_PIN_GROUP(vin0_hsync_signal),
-+	SH_PFC_PIN_GROUP(vin0_vsync_signal),
-+	SH_PFC_PIN_GROUP(vin0_field_signal),
-+	SH_PFC_PIN_GROUP(vin0_data_enable),
-+	SH_PFC_PIN_GROUP(vin0_clk),
-+	SH_PFC_PIN_GROUP(vin1_data),
-+	SH_PFC_PIN_GROUP(vin1_clk),
- };
- 
- static const char * const eth_groups[] = {
-@@ -3227,6 +3315,22 @@ static const char * const usb2_groups[] = {
- 	"usb2",
- };
- 
-+static const char * const vin0_groups[] = {
-+	"vin0_data_g",
-+	"vin0_data_r",
-+	"vin0_data_b",
-+	"vin0_hsync_signal",
-+	"vin0_vsync_signal",
-+	"vin0_field_signal",
-+	"vin0_data_enable",
-+	"vin0_clk",
-+};
-+
-+static const char * const vin1_groups[] = {
-+	"vin1_data",
-+	"vin1_clk",
-+};
-+
- static const struct sh_pfc_function pinmux_functions[] = {
- 	SH_PFC_FUNCTION(eth),
- 	SH_PFC_FUNCTION(hscif0),
-@@ -3255,6 +3359,8 @@ static const struct sh_pfc_function pinmux_functions[] = {
- 	SH_PFC_FUNCTION(usb0),
- 	SH_PFC_FUNCTION(usb1),
- 	SH_PFC_FUNCTION(usb2),
-+	SH_PFC_FUNCTION(vin0),
-+	SH_PFC_FUNCTION(vin1),
- };
- 
- static struct pinmux_cfg_reg pinmux_config_regs[] = {
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0573-sh-pfc-r8a7790-Rename-DU1_DOTCLKIN-to-DU_DOTCLKIN1.patch b/patches.renesas/0573-sh-pfc-r8a7790-Rename-DU1_DOTCLKIN-to-DU_DOTCLKIN1.patch
deleted file mode 100644
index d706adefe73f5..0000000000000
--- a/patches.renesas/0573-sh-pfc-r8a7790-Rename-DU1_DOTCLKIN-to-DU_DOTCLKIN1.patch
+++ /dev/null
@@ -1,58 +0,0 @@
-From c741fe4a50708738a1a235bd7cac43c134c5c62e Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 7 Aug 2013 14:02:22 +0200
-Subject: sh-pfc: r8a7790: Rename DU1_DOTCLKIN to DU_DOTCLKIN1
-
-Name the DU clock input 1 consistently with clock inputs 0 and 2.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-(cherry picked from commit f06812095e97af956c9fe8e0f82a5f6d5a26e5d2)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 8 ++++----
- 1 file changed, 4 insertions(+), 4 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-index 763c031e..da3aaeb5 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-@@ -237,7 +237,7 @@ enum {
- 	FN_GLO_SS_C, FN_PWM1, FN_SCIFA2_TXD_C,
- 	FN_STP_ISSYNC_1_B, FN_TS_SCK1_C, FN_GLO_RFON_C,
- 	FN_PCMOE_N, FN_PWM2, FN_PWMFSW0, FN_SCIFA2_RXD_C,
--	FN_PCMWE_N, FN_IECLK_C, FN_DU1_DOTCLKIN,
-+	FN_PCMWE_N, FN_IECLK_C, FN_DU_DOTCLKIN1,
- 	FN_AUDIO_CLKC, FN_AUDIO_CLKOUT_C, FN_VI0_CLK,
- 	FN_ATACS00_N, FN_AVB_RXD1,
- 	FN_VI0_DATA0_VI0_B0, FN_ATACS10_N, FN_AVB_RXD2,
-@@ -609,7 +609,7 @@ enum {
- 	GLO_SS_C_MARK, PWM1_MARK, SCIFA2_TXD_C_MARK,
- 	STP_ISSYNC_1_B_MARK, TS_SCK1_C_MARK, GLO_RFON_C_MARK,
- 	PCMOE_N_MARK, PWM2_MARK, PWMFSW0_MARK, SCIFA2_RXD_C_MARK,
--	PCMWE_N_MARK, IECLK_C_MARK, DU1_DOTCLKIN_MARK,
-+	PCMWE_N_MARK, IECLK_C_MARK, DU_DOTCLKIN1_MARK,
- 	AUDIO_CLKC_MARK, AUDIO_CLKOUT_C_MARK, VI0_CLK_MARK,
- 	ATACS00_N_MARK, AVB_RXD1_MARK,
- 	VI0_DATA0_VI0_B0_MARK, ATACS10_N_MARK, AVB_RXD2_MARK,
-@@ -1214,7 +1214,7 @@ static const u16 pinmux_data[] = {
- 	PINMUX_IPSR_MODSEL_DATA(IP7_24_22, SCIFA2_RXD_C, SEL_SCIFA2_2),
- 	PINMUX_IPSR_DATA(IP7_24_22, PCMWE_N),
- 	PINMUX_IPSR_MODSEL_DATA(IP7_24_22, IECLK_C, SEL_IEB_2),
--	PINMUX_IPSR_DATA(IP7_26_25, DU1_DOTCLKIN),
-+	PINMUX_IPSR_DATA(IP7_26_25, DU_DOTCLKIN1),
- 	PINMUX_IPSR_DATA(IP7_26_25, AUDIO_CLKC),
- 	PINMUX_IPSR_DATA(IP7_26_25, AUDIO_CLKOUT_C),
- 	PINMUX_IPSR_MODSEL_DATA(IP7_28_27, VI0_CLK, SEL_VI0_0),
-@@ -3819,7 +3819,7 @@ static struct pinmux_cfg_reg pinmux_config_regs[] = {
- 		/* IP7_28_27 [2] */
- 		FN_VI0_CLK, FN_ATACS00_N, FN_AVB_RXD1, 0,
- 		/* IP7_26_25 [2] */
--		FN_DU1_DOTCLKIN, FN_AUDIO_CLKC, FN_AUDIO_CLKOUT_C, 0,
-+		FN_DU_DOTCLKIN1, FN_AUDIO_CLKC, FN_AUDIO_CLKOUT_C, 0,
- 		/* IP7_24_22 [3] */
- 		FN_PWM2, FN_PWMFSW0, FN_SCIFA2_RXD_C, FN_PCMWE_N, FN_IECLK_C,
- 		0, 0, 0,
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0574-sh-pfc-r8a7790-Add-DU-pin-groups-and-functions.patch b/patches.renesas/0574-sh-pfc-r8a7790-Add-DU-pin-groups-and-functions.patch
deleted file mode 100644
index 4d749346f84e7..0000000000000
--- a/patches.renesas/0574-sh-pfc-r8a7790-Add-DU-pin-groups-and-functions.patch
+++ /dev/null
@@ -1,182 +0,0 @@
-From a91129c353a70be41082050aad7a8c468c5924f9 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Wed, 7 Aug 2013 14:02:23 +0200
-Subject: sh-pfc: r8a7790: Add DU pin groups and functions
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-(cherry picked from commit 62783b714f21a08b20acfaab1c13679e887ab66c)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 134 +++++++++++++++++++++++++++++++++++
- 1 file changed, 134 insertions(+)
-
-diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-index da3aaeb5..64fcc006 100644
---- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
-@@ -1725,6 +1725,104 @@ static struct sh_pfc_pin pinmux_pins[] = {
- 	PINMUX_GPIO_GP_ALL(),
- };
- 
-+/* - DU RGB ----------------------------------------------------------------- */
-+static const unsigned int du_rgb666_pins[] = {
-+	/* R[7:2], G[7:2], B[7:2] */
-+	RCAR_GP_PIN(4, 21), RCAR_GP_PIN(4, 20), RCAR_GP_PIN(4, 19),
-+	RCAR_GP_PIN(4, 18), RCAR_GP_PIN(4, 17), RCAR_GP_PIN(4, 16),
-+	RCAR_GP_PIN(5, 4),  RCAR_GP_PIN(5, 15), RCAR_GP_PIN(5, 14),
-+	RCAR_GP_PIN(5, 7),  RCAR_GP_PIN(4, 30), RCAR_GP_PIN(4, 27),
-+	RCAR_GP_PIN(5, 13), RCAR_GP_PIN(5, 12), RCAR_GP_PIN(5, 11),
-+	RCAR_GP_PIN(5, 10), RCAR_GP_PIN(5, 9),  RCAR_GP_PIN(5, 8),
-+};
-+static const unsigned int du_rgb666_mux[] = {
-+	DU2_DR7_MARK, DU2_DR6_MARK, DU2_DR5_MARK, DU2_DR4_MARK,
-+	DU2_DR3_MARK, DU2_DR2_MARK,
-+	DU2_DG7_MARK, DU2_DG6_MARK, DU2_DG5_MARK, DU2_DG4_MARK,
-+	DU2_DG3_MARK, DU2_DG2_MARK,
-+	DU2_DB7_MARK, DU2_DB6_MARK, DU2_DB5_MARK, DU2_DB4_MARK,
-+	DU2_DB3_MARK, DU2_DB2_MARK,
-+};
-+static const unsigned int du_rgb888_pins[] = {
-+	/* R[7:0], G[7:0], B[7:0] */
-+	RCAR_GP_PIN(4, 21), RCAR_GP_PIN(4, 20), RCAR_GP_PIN(4, 19),
-+	RCAR_GP_PIN(4, 18), RCAR_GP_PIN(4, 17), RCAR_GP_PIN(4, 16),
-+	RCAR_GP_PIN(4, 29), RCAR_GP_PIN(4, 28), RCAR_GP_PIN(5, 4),
-+	RCAR_GP_PIN(5, 15), RCAR_GP_PIN(5, 14), RCAR_GP_PIN(5, 7),
-+	RCAR_GP_PIN(4, 30), RCAR_GP_PIN(4, 27), RCAR_GP_PIN(5, 1),
-+	RCAR_GP_PIN(4, 31), RCAR_GP_PIN(5, 13), RCAR_GP_PIN(5, 12),
-+	RCAR_GP_PIN(5, 11), RCAR_GP_PIN(5, 10), RCAR_GP_PIN(5, 9),
-+	RCAR_GP_PIN(5, 8),  RCAR_GP_PIN(5, 6),  RCAR_GP_PIN(5, 5),
-+};
-+static const unsigned int du_rgb888_mux[] = {
-+	DU2_DR7_MARK, DU2_DR6_MARK, DU2_DR5_MARK, DU2_DR4_MARK,
-+	DU2_DR3_MARK, DU2_DR2_MARK, DU2_DR1_MARK, DU2_DR0_MARK,
-+	DU2_DG7_MARK, DU2_DG6_MARK, DU2_DG5_MARK, DU2_DG4_MARK,
-+	DU2_DG3_MARK, DU2_DG2_MARK, DU2_DG1_MARK, DU2_DG0_MARK,
-+	DU2_DB7_MARK, DU2_DB6_MARK, DU2_DB5_MARK, DU2_DB4_MARK,
-+	DU2_DB3_MARK, DU2_DB2_MARK, DU2_DB1_MARK, DU2_DB0_MARK,
-+};
-+static const unsigned int du_clk_out_0_pins[] = {
-+	/* CLKOUT */
-+	RCAR_GP_PIN(5, 2),
-+};
-+static const unsigned int du_clk_out_0_mux[] = {
-+	DU0_DOTCLKOUT_MARK
-+};
-+static const unsigned int du_clk_out_1_pins[] = {
-+	/* CLKOUT */
-+	RCAR_GP_PIN(5, 3),
-+};
-+static const unsigned int du_clk_out_1_mux[] = {
-+	DU1_DOTCLKOUT_MARK
-+};
-+static const unsigned int du_sync_0_pins[] = {
-+	/* VSYNC, HSYNC, DISP */
-+	RCAR_GP_PIN(4, 15), RCAR_GP_PIN(4, 14), RCAR_GP_PIN(5, 0),
-+};
-+static const unsigned int du_sync_0_mux[] = {
-+	DU2_EXVSYNC_DU2_VSYNC_MARK, DU2_EXHSYNC_DU2_HSYNC_MARK,
-+	DU2_EXODDF_DU2_ODDF_DISP_CDE_MARK
-+};
-+static const unsigned int du_sync_1_pins[] = {
-+	/* VSYNC, HSYNC, DISP */
-+	RCAR_GP_PIN(4, 15), RCAR_GP_PIN(4, 14), RCAR_GP_PIN(5, 16),
-+};
-+static const unsigned int du_sync_1_mux[] = {
-+	DU2_EXVSYNC_DU2_VSYNC_MARK, DU2_EXHSYNC_DU2_HSYNC_MARK,
-+	DU2_DISP_MARK
-+};
-+static const unsigned int du_cde_pins[] = {
-+	/* CDE */
-+	RCAR_GP_PIN(5, 17),
-+};
-+static const unsigned int du_cde_mux[] = {
-+	DU2_CDE_MARK,
-+};
-+/* - DU0 -------------------------------------------------------------------- */
-+static const unsigned int du0_clk_in_pins[] = {
-+	/* CLKIN */
-+	RCAR_GP_PIN(5, 26),
-+};
-+static const unsigned int du0_clk_in_mux[] = {
-+	DU_DOTCLKIN0_MARK
-+};
-+/* - DU1 -------------------------------------------------------------------- */
-+static const unsigned int du1_clk_in_pins[] = {
-+	/* CLKIN */
-+	RCAR_GP_PIN(5, 27),
-+};
-+static const unsigned int du1_clk_in_mux[] = {
-+	DU_DOTCLKIN1_MARK,
-+};
-+/* - DU2 -------------------------------------------------------------------- */
-+static const unsigned int du2_clk_in_pins[] = {
-+	/* CLKIN */
-+	RCAR_GP_PIN(5, 28),
-+};
-+static const unsigned int du2_clk_in_mux[] = {
-+	DU_DOTCLKIN2_MARK,
-+};
- /* - ETH -------------------------------------------------------------------- */
- static const unsigned int eth_link_pins[] = {
- 	/* LINK */
-@@ -2916,6 +3014,16 @@ static const unsigned int vin1_clk_mux[] = {
- };
- 
- static const struct sh_pfc_pin_group pinmux_groups[] = {
-+	SH_PFC_PIN_GROUP(du_rgb666),
-+	SH_PFC_PIN_GROUP(du_rgb888),
-+	SH_PFC_PIN_GROUP(du_clk_out_0),
-+	SH_PFC_PIN_GROUP(du_clk_out_1),
-+	SH_PFC_PIN_GROUP(du_sync_0),
-+	SH_PFC_PIN_GROUP(du_sync_1),
-+	SH_PFC_PIN_GROUP(du_cde),
-+	SH_PFC_PIN_GROUP(du0_clk_in),
-+	SH_PFC_PIN_GROUP(du1_clk_in),
-+	SH_PFC_PIN_GROUP(du2_clk_in),
- 	SH_PFC_PIN_GROUP(eth_link),
- 	SH_PFC_PIN_GROUP(eth_magic),
- 	SH_PFC_PIN_GROUP(eth_mdio),
-@@ -3081,6 +3189,28 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
- 	SH_PFC_PIN_GROUP(vin1_clk),
- };
- 
-+static const char * const du_groups[] = {
-+	"du_rgb666",
-+	"du_rgb888",
-+	"du_clk_out_0",
-+	"du_clk_out_1",
-+	"du_sync_0",
-+	"du_sync_1",
-+	"du_cde",
-+};
-+
-+static const char * const du0_groups[] = {
-+	"du0_clk_in",
-+};
-+
-+static const char * const du1_groups[] = {
-+	"du1_clk_in",
-+};
-+
-+static const char * const du2_groups[] = {
-+	"du2_clk_in",
-+};
-+
- static const char * const eth_groups[] = {
- 	"eth_link",
- 	"eth_magic",
-@@ -3332,6 +3462,10 @@ static const char * const vin1_groups[] = {
- };
- 
- static const struct sh_pfc_function pinmux_functions[] = {
-+	SH_PFC_FUNCTION(du),
-+	SH_PFC_FUNCTION(du0),
-+	SH_PFC_FUNCTION(du1),
-+	SH_PFC_FUNCTION(du2),
- 	SH_PFC_FUNCTION(eth),
- 	SH_PFC_FUNCTION(hscif0),
- 	SH_PFC_FUNCTION(hscif1),
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0575-pinctrl-sh-pfc-remove-unnecessary-platform_set_drvda.patch b/patches.renesas/0575-pinctrl-sh-pfc-remove-unnecessary-platform_set_drvda.patch
deleted file mode 100644
index 9f951b8c03447..0000000000000
--- a/patches.renesas/0575-pinctrl-sh-pfc-remove-unnecessary-platform_set_drvda.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From 8ef5c5eca6e3ea29f45d86605d6b9ecd1795bc3f Mon Sep 17 00:00:00 2001
-From: Jingoo Han <jg1.han@samsung.com>
-Date: Thu, 22 Aug 2013 11:00:55 +0900
-Subject: pinctrl: sh-pfc: remove unnecessary platform_set_drvdata()
-
-The driver core clears the driver data to NULL after device_release
-or on probe failure. Thus, it is not needed to manually clear the
-device driver data to NULL.
-
-Signed-off-by: Jingoo Han <jg1.han@samsung.com>
-Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-(cherry picked from commit db8ed174295f33e7c3441557a0caf296399ddea5)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/pinctrl/sh-pfc/core.c | 2 --
- 1 file changed, 2 deletions(-)
-
-diff --git a/drivers/pinctrl/sh-pfc/core.c b/drivers/pinctrl/sh-pfc/core.c
-index 9e66614b..738f14f6 100644
---- a/drivers/pinctrl/sh-pfc/core.c
-+++ b/drivers/pinctrl/sh-pfc/core.c
-@@ -539,8 +539,6 @@ static int sh_pfc_remove(struct platform_device *pdev)
- 	if (pfc->info->ops && pfc->info->ops->exit)
- 		pfc->info->ops->exit(pfc);
- 
--	platform_set_drvdata(pdev, NULL);
--
- 	return 0;
- }
- 
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0576-mmc-sdhi-tmio-make-DMA-filter-implementation-specifi.patch b/patches.renesas/0576-mmc-sdhi-tmio-make-DMA-filter-implementation-specifi.patch
deleted file mode 100644
index de979a53dba6a..0000000000000
--- a/patches.renesas/0576-mmc-sdhi-tmio-make-DMA-filter-implementation-specifi.patch
+++ /dev/null
@@ -1,114 +0,0 @@
-From 857b84b21a9cc7e80ce10849bcbf565faa0e6098 Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Fri, 26 Apr 2013 17:47:17 +0200
-Subject: mmc: sdhi/tmio: make DMA filter implementation specific
-
-So far only the SDHI implementation uses TMIO MMC with DMA. That way a DMA
-channel filter function, defined in the TMIO driver wasn't a problem.
-However, such a filter function is DMA controller specific. Since the SDHI
-glue is only running on systems with the SHDMA DMA controller, the filter
-function can safely be provided by it. Move it into SDHI.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Acked-by: Samuel Ortiz <sameo@linux.intel.com>
-Signed-off-by: Chris Ball <cjb@laptop.org>
-(cherry picked from commit 03a0675b2a112038a8a5078d8815e3f7356c7064)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/mmc/host/sh_mobile_sdhi.c |  9 +++++++++
- drivers/mmc/host/tmio_mmc_dma.c   | 12 ++----------
- include/linux/mfd/tmio.h          |  3 +++
- 3 files changed, 14 insertions(+), 10 deletions(-)
-
-diff --git a/drivers/mmc/host/sh_mobile_sdhi.c b/drivers/mmc/host/sh_mobile_sdhi.c
-index fe908539..e0088d7f 100644
---- a/drivers/mmc/host/sh_mobile_sdhi.c
-+++ b/drivers/mmc/host/sh_mobile_sdhi.c
-@@ -20,6 +20,7 @@
- 
- #include <linux/kernel.h>
- #include <linux/clk.h>
-+#include <linux/dmaengine.h>
- #include <linux/slab.h>
- #include <linux/mod_devicetable.h>
- #include <linux/module.h>
-@@ -124,6 +125,13 @@ static void sh_mobile_sdhi_cd_wakeup(const struct platform_device *pdev)
- 	mmc_detect_change(dev_get_drvdata(&pdev->dev), msecs_to_jiffies(100));
- }
- 
-+static bool sh_mobile_sdhi_filter(struct dma_chan *chan, void *arg)
-+{
-+	dev_dbg(chan->device->dev, "%s: slave data %p\n", __func__, arg);
-+	chan->private = arg;
-+	return true;
-+}
-+
- static const struct sh_mobile_sdhi_ops sdhi_ops = {
- 	.cd_wakeup = sh_mobile_sdhi_cd_wakeup,
- };
-@@ -191,6 +199,7 @@ static int sh_mobile_sdhi_probe(struct platform_device *pdev)
- 			priv->dma_priv.chan_priv_tx = &priv->param_tx.shdma_slave;
- 			priv->dma_priv.chan_priv_rx = &priv->param_rx.shdma_slave;
- 			priv->dma_priv.alignment_shift = 1; /* 2-byte alignment */
-+			priv->dma_priv.filter = sh_mobile_sdhi_filter;
- 			mmc_data->dma = &priv->dma_priv;
- 		}
- 	}
-diff --git a/drivers/mmc/host/tmio_mmc_dma.c b/drivers/mmc/host/tmio_mmc_dma.c
-index 491e9ecc..de1264da 100644
---- a/drivers/mmc/host/tmio_mmc_dma.c
-+++ b/drivers/mmc/host/tmio_mmc_dma.c
-@@ -261,14 +261,6 @@ out:
- 	spin_unlock_irq(&host->lock);
- }
- 
--/* It might be necessary to make filter MFD specific */
--static bool tmio_mmc_filter(struct dma_chan *chan, void *arg)
--{
--	dev_dbg(chan->device->dev, "%s: slave data %p\n", __func__, arg);
--	chan->private = arg;
--	return true;
--}
--
- void tmio_mmc_request_dma(struct tmio_mmc_host *host, struct tmio_mmc_data *pdata)
- {
- 	/* We can only either use DMA for both Tx and Rx or not use it at all */
-@@ -281,7 +273,7 @@ void tmio_mmc_request_dma(struct tmio_mmc_host *host, struct tmio_mmc_data *pdat
- 		dma_cap_zero(mask);
- 		dma_cap_set(DMA_SLAVE, mask);
- 
--		host->chan_tx = dma_request_channel(mask, tmio_mmc_filter,
-+		host->chan_tx = dma_request_channel(mask, pdata->dma->filter,
- 						    pdata->dma->chan_priv_tx);
- 		dev_dbg(&host->pdev->dev, "%s: TX: got channel %p\n", __func__,
- 			host->chan_tx);
-@@ -289,7 +281,7 @@ void tmio_mmc_request_dma(struct tmio_mmc_host *host, struct tmio_mmc_data *pdat
- 		if (!host->chan_tx)
- 			return;
- 
--		host->chan_rx = dma_request_channel(mask, tmio_mmc_filter,
-+		host->chan_rx = dma_request_channel(mask, pdata->dma->filter,
- 						    pdata->dma->chan_priv_rx);
- 		dev_dbg(&host->pdev->dev, "%s: RX: got channel %p\n", __func__,
- 			host->chan_rx);
-diff --git a/include/linux/mfd/tmio.h b/include/linux/mfd/tmio.h
-index 99bf3e66..0990d8a2 100644
---- a/include/linux/mfd/tmio.h
-+++ b/include/linux/mfd/tmio.h
-@@ -81,10 +81,13 @@ int tmio_core_mmc_resume(void __iomem *cnf, int shift, unsigned long base);
- void tmio_core_mmc_pwr(void __iomem *cnf, int shift, int state);
- void tmio_core_mmc_clk_div(void __iomem *cnf, int shift, int state);
- 
-+struct dma_chan;
-+
- struct tmio_mmc_dma {
- 	void *chan_priv_tx;
- 	void *chan_priv_rx;
- 	int alignment_shift;
-+	bool (*filter)(struct dma_chan *chan, void *arg);
- };
- 
- struct tmio_mmc_host;
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0577-DMA-shdma-shdma_chan_filter-has-to-be-in-shdma-base..patch b/patches.renesas/0577-DMA-shdma-shdma_chan_filter-has-to-be-in-shdma-base..patch
deleted file mode 100644
index 422bf957ef642..0000000000000
--- a/patches.renesas/0577-DMA-shdma-shdma_chan_filter-has-to-be-in-shdma-base..patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From 4f0502400a61a53dc0fb0bb73a15a45eb6eb2605 Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Thu, 6 Jun 2013 17:37:14 +0200
-Subject: DMA: shdma: shdma_chan_filter() has to be in shdma-base.h
-
-shdma_chan_filter() is a function, provided by the shdma-base.c module,
-move its declaration to the appropriate header.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Signed-off-by: Vinod Koul <vinod.koul@intel.com>
-(cherry picked from commit d0951a23383d09276f7976ed34d8f1cede629b48)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- include/linux/sh_dma.h     | 2 --
- include/linux/shdma-base.h | 1 +
- 2 files changed, 1 insertion(+), 2 deletions(-)
-
-diff --git a/include/linux/sh_dma.h b/include/linux/sh_dma.h
-index b64d6bec..4e83f3e0 100644
---- a/include/linux/sh_dma.h
-+++ b/include/linux/sh_dma.h
-@@ -99,6 +99,4 @@ struct sh_dmae_pdata {
- #define CHCR_TE	0x00000002
- #define CHCR_IE	0x00000004
- 
--bool shdma_chan_filter(struct dma_chan *chan, void *arg);
--
- #endif
-diff --git a/include/linux/shdma-base.h b/include/linux/shdma-base.h
-index a3728bf6..9a938971 100644
---- a/include/linux/shdma-base.h
-+++ b/include/linux/shdma-base.h
-@@ -122,5 +122,6 @@ void shdma_chan_remove(struct shdma_chan *schan);
- int shdma_init(struct device *dev, struct shdma_dev *sdev,
- 		    int chan_num);
- void shdma_cleanup(struct shdma_dev *sdev);
-+bool shdma_chan_filter(struct dma_chan *chan, void *arg);
- 
- #endif
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0578-dmaengine-shdma-fix-a-build-failure-on-platforms-wit.patch b/patches.renesas/0578-dmaengine-shdma-fix-a-build-failure-on-platforms-wit.patch
deleted file mode 100644
index fd9d502b7b557..0000000000000
--- a/patches.renesas/0578-dmaengine-shdma-fix-a-build-failure-on-platforms-wit.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From f9a419ae072591d1b554fe98134d4e11b20b1f4b Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Wed, 10 Jul 2013 11:09:12 +0900
-Subject: dmaengine: shdma: fix a build failure on platforms with no DMA
- support
-
-On platforms with no support for the shdma dmaengine driver build is
-currently failing with
-
-drivers/built-in.o: In function `sh_mobile_sdhi_probe':
-drivers/mmc/host/sh_mobile_sdhi.c:170: undefined reference to`shdma_chan_filter'
-
-Fix the breakage by defining shdma_chan_filter to NULL in such
-configurations.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-[horms+renesas@verge.net.au: Apply change to shdma-base.h instead of sh_dma.h]
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-Signed-off-by: Olof Johansson <olof@lixom.net>
-
-(cherry picked from commit ab116a4df4942c78c189d9b0744dd940ab9e00b9)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- include/linux/shdma-base.h | 4 ++++
- 1 file changed, 4 insertions(+)
-
-diff --git a/include/linux/shdma-base.h b/include/linux/shdma-base.h
-index 9a938971..e2127205 100644
---- a/include/linux/shdma-base.h
-+++ b/include/linux/shdma-base.h
-@@ -122,6 +122,10 @@ void shdma_chan_remove(struct shdma_chan *schan);
- int shdma_init(struct device *dev, struct shdma_dev *sdev,
- 		    int chan_num);
- void shdma_cleanup(struct shdma_dev *sdev);
-+#if IS_ENABLED(CONFIG_SH_DMAE_BASE)
- bool shdma_chan_filter(struct dma_chan *chan, void *arg);
-+#else
-+#define shdma_chan_filter NULL
-+#endif
- 
- #endif
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0579-mmc-sdhi-tmio-switch-to-using-dmaengine_slave_config.patch b/patches.renesas/0579-mmc-sdhi-tmio-switch-to-using-dmaengine_slave_config.patch
deleted file mode 100644
index 426ae0465cd44..0000000000000
--- a/patches.renesas/0579-mmc-sdhi-tmio-switch-to-using-dmaengine_slave_config.patch
+++ /dev/null
@@ -1,162 +0,0 @@
-From 336d66a028afeefd95bfc12e7408d1daa489f618 Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Fri, 26 Apr 2013 17:47:18 +0200
-Subject: mmc: sdhi/tmio: switch to using dmaengine_slave_config()
-
-This removes the deprecated use of the .private member of struct dma_chan
-and switches the sdhi / tmio mmc driver to using the
-dmaengine_slave_config() channel configuration method.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Acked-by: Samuel Ortiz <sameo@linux.intel.com>
-Signed-off-by: Chris Ball <cjb@laptop.org>
-(cherry picked from commit eec95ee22611f2207bd991d63a07884de28e6f56)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/mmc/host/sh_mobile_sdhi.c | 33 ++++++++++++++++-----------------
- drivers/mmc/host/tmio_mmc_dma.c   | 25 +++++++++++++++++++++++++
- include/linux/mfd/tmio.h          |  2 ++
- 3 files changed, 43 insertions(+), 17 deletions(-)
-
-diff --git a/drivers/mmc/host/sh_mobile_sdhi.c b/drivers/mmc/host/sh_mobile_sdhi.c
-index e0088d7f..7f45f628 100644
---- a/drivers/mmc/host/sh_mobile_sdhi.c
-+++ b/drivers/mmc/host/sh_mobile_sdhi.c
-@@ -20,7 +20,6 @@
- 
- #include <linux/kernel.h>
- #include <linux/clk.h>
--#include <linux/dmaengine.h>
- #include <linux/slab.h>
- #include <linux/mod_devicetable.h>
- #include <linux/module.h>
-@@ -47,8 +46,6 @@ static const struct sh_mobile_sdhi_of_data sh_mobile_sdhi_of_cfg[] = {
- struct sh_mobile_sdhi {
- 	struct clk *clk;
- 	struct tmio_mmc_data mmc_data;
--	struct sh_dmae_slave param_tx;
--	struct sh_dmae_slave param_rx;
- 	struct tmio_mmc_dma dma_priv;
- };
- 
-@@ -125,13 +122,6 @@ static void sh_mobile_sdhi_cd_wakeup(const struct platform_device *pdev)
- 	mmc_detect_change(dev_get_drvdata(&pdev->dev), msecs_to_jiffies(100));
- }
- 
--static bool sh_mobile_sdhi_filter(struct dma_chan *chan, void *arg)
--{
--	dev_dbg(chan->device->dev, "%s: slave data %p\n", __func__, arg);
--	chan->private = arg;
--	return true;
--}
--
- static const struct sh_mobile_sdhi_ops sdhi_ops = {
- 	.cd_wakeup = sh_mobile_sdhi_cd_wakeup,
- };
-@@ -194,13 +184,22 @@ static int sh_mobile_sdhi_probe(struct platform_device *pdev)
- 			mmc_data->get_cd = sh_mobile_sdhi_get_cd;
- 
- 		if (p->dma_slave_tx > 0 && p->dma_slave_rx > 0) {
--			priv->param_tx.shdma_slave.slave_id = p->dma_slave_tx;
--			priv->param_rx.shdma_slave.slave_id = p->dma_slave_rx;
--			priv->dma_priv.chan_priv_tx = &priv->param_tx.shdma_slave;
--			priv->dma_priv.chan_priv_rx = &priv->param_rx.shdma_slave;
--			priv->dma_priv.alignment_shift = 1; /* 2-byte alignment */
--			priv->dma_priv.filter = sh_mobile_sdhi_filter;
--			mmc_data->dma = &priv->dma_priv;
-+			struct tmio_mmc_dma *dma_priv = &priv->dma_priv;
-+
-+			/*
-+			 * Yes, we have to provide slave IDs twice to TMIO:
-+			 * once as a filter parameter and once for channel
-+			 * configuration as an explicit slave ID
-+			 */
-+			dma_priv->chan_priv_tx = (void *)p->dma_slave_tx;
-+			dma_priv->chan_priv_rx = (void *)p->dma_slave_rx;
-+			dma_priv->slave_id_tx = p->dma_slave_tx;
-+			dma_priv->slave_id_rx = p->dma_slave_rx;
-+
-+			dma_priv->alignment_shift = 1; /* 2-byte alignment */
-+			dma_priv->filter = shdma_chan_filter;
-+
-+			mmc_data->dma = dma_priv;
- 		}
- 	}
- 
-diff --git a/drivers/mmc/host/tmio_mmc_dma.c b/drivers/mmc/host/tmio_mmc_dma.c
-index de1264da..a8aaa787 100644
---- a/drivers/mmc/host/tmio_mmc_dma.c
-+++ b/drivers/mmc/host/tmio_mmc_dma.c
-@@ -268,7 +268,14 @@ void tmio_mmc_request_dma(struct tmio_mmc_host *host, struct tmio_mmc_data *pdat
- 		return;
- 
- 	if (!host->chan_tx && !host->chan_rx) {
-+		struct resource *res = platform_get_resource(host->pdev,
-+							     IORESOURCE_MEM, 0);
-+		struct dma_slave_config cfg = {};
- 		dma_cap_mask_t mask;
-+		int ret;
-+
-+		if (!res)
-+			return;
- 
- 		dma_cap_zero(mask);
- 		dma_cap_set(DMA_SLAVE, mask);
-@@ -281,6 +288,14 @@ void tmio_mmc_request_dma(struct tmio_mmc_host *host, struct tmio_mmc_data *pdat
- 		if (!host->chan_tx)
- 			return;
- 
-+		cfg.slave_id = pdata->dma->slave_id_tx;
-+		cfg.direction = DMA_MEM_TO_DEV;
-+		cfg.dst_addr = res->start + (CTL_SD_DATA_PORT << host->bus_shift);
-+		cfg.src_addr = 0;
-+		ret = dmaengine_slave_config(host->chan_tx, &cfg);
-+		if (ret < 0)
-+			goto ecfgtx;
-+
- 		host->chan_rx = dma_request_channel(mask, pdata->dma->filter,
- 						    pdata->dma->chan_priv_rx);
- 		dev_dbg(&host->pdev->dev, "%s: RX: got channel %p\n", __func__,
-@@ -289,6 +304,14 @@ void tmio_mmc_request_dma(struct tmio_mmc_host *host, struct tmio_mmc_data *pdat
- 		if (!host->chan_rx)
- 			goto ereqrx;
- 
-+		cfg.slave_id = pdata->dma->slave_id_rx;
-+		cfg.direction = DMA_DEV_TO_MEM;
-+		cfg.src_addr = cfg.dst_addr;
-+		cfg.dst_addr = 0;
-+		ret = dmaengine_slave_config(host->chan_rx, &cfg);
-+		if (ret < 0)
-+			goto ecfgrx;
-+
- 		host->bounce_buf = (u8 *)__get_free_page(GFP_KERNEL | GFP_DMA);
- 		if (!host->bounce_buf)
- 			goto ebouncebuf;
-@@ -302,9 +325,11 @@ void tmio_mmc_request_dma(struct tmio_mmc_host *host, struct tmio_mmc_data *pdat
- 	return;
- 
- ebouncebuf:
-+ecfgrx:
- 	dma_release_channel(host->chan_rx);
- 	host->chan_rx = NULL;
- ereqrx:
-+ecfgtx:
- 	dma_release_channel(host->chan_tx);
- 	host->chan_tx = NULL;
- }
-diff --git a/include/linux/mfd/tmio.h b/include/linux/mfd/tmio.h
-index 0990d8a2..ce351132 100644
---- a/include/linux/mfd/tmio.h
-+++ b/include/linux/mfd/tmio.h
-@@ -86,6 +86,8 @@ struct dma_chan;
- struct tmio_mmc_dma {
- 	void *chan_priv_tx;
- 	void *chan_priv_rx;
-+	int slave_id_tx;
-+	int slave_id_rx;
- 	int alignment_shift;
- 	bool (*filter)(struct dma_chan *chan, void *arg);
- };
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0580-mmc-sdhi-tmio-add-DT-DMA-support.patch b/patches.renesas/0580-mmc-sdhi-tmio-add-DT-DMA-support.patch
deleted file mode 100644
index 83d76bb748e2a..0000000000000
--- a/patches.renesas/0580-mmc-sdhi-tmio-add-DT-DMA-support.patch
+++ /dev/null
@@ -1,124 +0,0 @@
-From 54f5a1e20c0a7f6aa135dee201fe13a3e3eb508e Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Fri, 26 Apr 2013 17:47:19 +0200
-Subject: mmc: sdhi/tmio: add DT DMA support
-
-Add support for initialising DMA from the Device Tree.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Signed-off-by: Chris Ball <cjb@laptop.org>
-(cherry picked from commit 87ae7bbebd9c9b32ad49dde1742aa68b5a86caf8)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/mmc/host/sh_mobile_sdhi.c | 14 +++++++-------
- drivers/mmc/host/tmio_mmc_dma.c   | 19 ++++++++++++-------
- 2 files changed, 19 insertions(+), 14 deletions(-)
-
-diff --git a/drivers/mmc/host/sh_mobile_sdhi.c b/drivers/mmc/host/sh_mobile_sdhi.c
-index 7f45f628..cc4c872c 100644
---- a/drivers/mmc/host/sh_mobile_sdhi.c
-+++ b/drivers/mmc/host/sh_mobile_sdhi.c
-@@ -144,6 +144,7 @@ static int sh_mobile_sdhi_probe(struct platform_device *pdev)
- 	struct tmio_mmc_host *host;
- 	int irq, ret, i = 0;
- 	bool multiplexed_isr = true;
-+	struct tmio_mmc_dma *dma_priv;
- 
- 	priv = devm_kzalloc(&pdev->dev, sizeof(struct sh_mobile_sdhi), GFP_KERNEL);
- 	if (priv == NULL) {
-@@ -152,6 +153,7 @@ static int sh_mobile_sdhi_probe(struct platform_device *pdev)
- 	}
- 
- 	mmc_data = &priv->mmc_data;
-+	dma_priv = &priv->dma_priv;
- 
- 	if (p) {
- 		if (p->init) {
-@@ -184,8 +186,6 @@ static int sh_mobile_sdhi_probe(struct platform_device *pdev)
- 			mmc_data->get_cd = sh_mobile_sdhi_get_cd;
- 
- 		if (p->dma_slave_tx > 0 && p->dma_slave_rx > 0) {
--			struct tmio_mmc_dma *dma_priv = &priv->dma_priv;
--
- 			/*
- 			 * Yes, we have to provide slave IDs twice to TMIO:
- 			 * once as a filter parameter and once for channel
-@@ -195,14 +195,14 @@ static int sh_mobile_sdhi_probe(struct platform_device *pdev)
- 			dma_priv->chan_priv_rx = (void *)p->dma_slave_rx;
- 			dma_priv->slave_id_tx = p->dma_slave_tx;
- 			dma_priv->slave_id_rx = p->dma_slave_rx;
--
--			dma_priv->alignment_shift = 1; /* 2-byte alignment */
--			dma_priv->filter = shdma_chan_filter;
--
--			mmc_data->dma = dma_priv;
- 		}
- 	}
- 
-+	dma_priv->alignment_shift = 1; /* 2-byte alignment */
-+	dma_priv->filter = shdma_chan_filter;
-+
-+	mmc_data->dma = dma_priv;
-+
- 	/*
- 	 * All SDHI blocks support 2-byte and larger block sizes in 4-bit
- 	 * bus width mode.
-diff --git a/drivers/mmc/host/tmio_mmc_dma.c b/drivers/mmc/host/tmio_mmc_dma.c
-index a8aaa787..65edb4a6 100644
---- a/drivers/mmc/host/tmio_mmc_dma.c
-+++ b/drivers/mmc/host/tmio_mmc_dma.c
-@@ -264,7 +264,8 @@ out:
- void tmio_mmc_request_dma(struct tmio_mmc_host *host, struct tmio_mmc_data *pdata)
- {
- 	/* We can only either use DMA for both Tx and Rx or not use it at all */
--	if (!pdata->dma)
-+	if (!pdata->dma || (!host->pdev->dev.of_node &&
-+		(!pdata->dma->chan_priv_tx || !pdata->dma->chan_priv_rx)))
- 		return;
- 
- 	if (!host->chan_tx && !host->chan_rx) {
-@@ -280,15 +281,17 @@ void tmio_mmc_request_dma(struct tmio_mmc_host *host, struct tmio_mmc_data *pdat
- 		dma_cap_zero(mask);
- 		dma_cap_set(DMA_SLAVE, mask);
- 
--		host->chan_tx = dma_request_channel(mask, pdata->dma->filter,
--						    pdata->dma->chan_priv_tx);
-+		host->chan_tx = dma_request_slave_channel_compat(mask,
-+					pdata->dma->filter, pdata->dma->chan_priv_tx,
-+					&host->pdev->dev, "tx");
- 		dev_dbg(&host->pdev->dev, "%s: TX: got channel %p\n", __func__,
- 			host->chan_tx);
- 
- 		if (!host->chan_tx)
- 			return;
- 
--		cfg.slave_id = pdata->dma->slave_id_tx;
-+		if (pdata->dma->chan_priv_tx)
-+			cfg.slave_id = pdata->dma->slave_id_tx;
- 		cfg.direction = DMA_MEM_TO_DEV;
- 		cfg.dst_addr = res->start + (CTL_SD_DATA_PORT << host->bus_shift);
- 		cfg.src_addr = 0;
-@@ -296,15 +299,17 @@ void tmio_mmc_request_dma(struct tmio_mmc_host *host, struct tmio_mmc_data *pdat
- 		if (ret < 0)
- 			goto ecfgtx;
- 
--		host->chan_rx = dma_request_channel(mask, pdata->dma->filter,
--						    pdata->dma->chan_priv_rx);
-+		host->chan_rx = dma_request_slave_channel_compat(mask,
-+					pdata->dma->filter, pdata->dma->chan_priv_rx,
-+					&host->pdev->dev, "rx");
- 		dev_dbg(&host->pdev->dev, "%s: RX: got channel %p\n", __func__,
- 			host->chan_rx);
- 
- 		if (!host->chan_rx)
- 			goto ereqrx;
- 
--		cfg.slave_id = pdata->dma->slave_id_rx;
-+		if (pdata->dma->chan_priv_rx)
-+			cfg.slave_id = pdata->dma->slave_id_rx;
- 		cfg.direction = DMA_DEV_TO_MEM;
- 		cfg.src_addr = cfg.dst_addr;
- 		cfg.dst_addr = 0;
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0581-mmc-remove-unnecessary-platform_set_drvdata.patch b/patches.renesas/0581-mmc-remove-unnecessary-platform_set_drvdata.patch
deleted file mode 100644
index a8715fb091821..0000000000000
--- a/patches.renesas/0581-mmc-remove-unnecessary-platform_set_drvdata.patch
+++ /dev/null
@@ -1,323 +0,0 @@
-From 43bbfa109a44c217889a72041060f570a2f92ffe Mon Sep 17 00:00:00 2001
-From: Jingoo Han <jg1.han@samsung.com>
-Date: Mon, 6 May 2013 15:05:21 +0900
-Subject: mmc: remove unnecessary platform_set_drvdata()
-
-The driver core clears the driver data to NULL after device_release
-or on probe failure, since commit 0998d0631001288a5974afc0b2a5f568bcdecb4d
-(device-core: Ensure drvdata = NULL when no driver is bound).
-Thus, it is not needed to manually clear the device driver data to NULL.
-
-Signed-off-by: Jingoo Han <jg1.han@samsung.com>
-Acked-by: Sonic Zhang <sonic.zhang@analog.com>
-Acked-by: Seungwon Jeon <tgih.jun@samsung.com>
-Acked-by: Shawn Guo <shawn.guo@linaro.org>
-Acked-by: Adrian Hunter <adrian.hunter@intel.com>
-Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
-Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
-Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
-Acked-by: Tony Prisk <linux@prisktech.co.nz>
-Signed-off-by: Chris Ball <cjb@laptop.org>
-(cherry picked from commit 113a87f868b2f2e086790a68e8b9e41d8f0c3295)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/mmc/host/android-goldfish.c |    2 --
- drivers/mmc/host/atmel-mci.c        |    2 --
- drivers/mmc/host/au1xmmc.c          |    1 -
- drivers/mmc/host/bfin_sdh.c         |    2 --
- drivers/mmc/host/davinci_mmc.c      |    1 -
- drivers/mmc/host/dw_mmc-pltfm.c     |    1 -
- drivers/mmc/host/jz4740_mmc.c       |    2 --
- drivers/mmc/host/mvsdio.c           |    1 -
- drivers/mmc/host/mxcmmc.c           |    2 --
- drivers/mmc/host/mxs-mmc.c          |    2 --
- drivers/mmc/host/omap.c             |    2 --
- drivers/mmc/host/omap_hsmmc.c       |    2 --
- drivers/mmc/host/pxamci.c           |    2 --
- drivers/mmc/host/rtsx_pci_sdmmc.c   |    2 --
- drivers/mmc/host/sdhci-acpi.c       |    2 --
- drivers/mmc/host/sdhci-pltfm.c      |    1 -
- drivers/mmc/host/sdhci-pxav2.c      |    2 --
- drivers/mmc/host/sdhci-pxav3.c      |    2 --
- drivers/mmc/host/sdhci-s3c.c        |    1 -
- drivers/mmc/host/sdhci-spear.c      |    2 --
- drivers/mmc/host/sh_mmcif.c         |    2 --
- drivers/mmc/host/tmio_mmc.c         |    2 --
- drivers/mmc/host/wmt-sdmmc.c        |    2 --
- 23 files changed, 40 deletions(-)
-
---- a/drivers/mmc/host/android-goldfish.c
-+++ b/drivers/mmc/host/android-goldfish.c
-@@ -546,8 +546,6 @@ static int goldfish_mmc_remove(struct pl
- {
- 	struct goldfish_mmc_host *host = platform_get_drvdata(pdev);
- 
--	platform_set_drvdata(pdev, NULL);
--
- 	BUG_ON(host == NULL);
- 
- 	mmc_remove_host(host->mmc);
---- a/drivers/mmc/host/atmel-mci.c
-+++ b/drivers/mmc/host/atmel-mci.c
-@@ -2495,8 +2495,6 @@ static int __exit atmci_remove(struct pl
- 	struct atmel_mci	*host = platform_get_drvdata(pdev);
- 	unsigned int		i;
- 
--	platform_set_drvdata(pdev, NULL);
--
- 	if (host->buffer)
- 		dma_free_coherent(&pdev->dev, host->buf_size,
- 		                  host->buffer, host->buf_phys_addr);
---- a/drivers/mmc/host/au1xmmc.c
-+++ b/drivers/mmc/host/au1xmmc.c
-@@ -1149,7 +1149,6 @@ static int au1xmmc_remove(struct platfor
- 		kfree(host->ioarea);
- 
- 		mmc_free_host(host->mmc);
--		platform_set_drvdata(pdev, NULL);
- 	}
- 	return 0;
- }
---- a/drivers/mmc/host/bfin_sdh.c
-+++ b/drivers/mmc/host/bfin_sdh.c
-@@ -621,8 +621,6 @@ static int sdh_remove(struct platform_de
- {
- 	struct mmc_host *mmc = platform_get_drvdata(pdev);
- 
--	platform_set_drvdata(pdev, NULL);
--
- 	if (mmc) {
- 		struct sdh_host *host = mmc_priv(mmc);
- 
---- a/drivers/mmc/host/davinci_mmc.c
-+++ b/drivers/mmc/host/davinci_mmc.c
-@@ -1406,7 +1406,6 @@ static int __exit davinci_mmcsd_remove(s
- {
- 	struct mmc_davinci_host *host = platform_get_drvdata(pdev);
- 
--	platform_set_drvdata(pdev, NULL);
- 	if (host) {
- 		mmc_davinci_cpufreq_deregister(host);
- 
---- a/drivers/mmc/host/dw_mmc-pltfm.c
-+++ b/drivers/mmc/host/dw_mmc-pltfm.c
-@@ -72,7 +72,6 @@ static int dw_mci_pltfm_remove(struct pl
- {
- 	struct dw_mci *host = platform_get_drvdata(pdev);
- 
--	platform_set_drvdata(pdev, NULL);
- 	dw_mci_remove(host);
- 	return 0;
- }
---- a/drivers/mmc/host/jz4740_mmc.c
-+++ b/drivers/mmc/host/jz4740_mmc.c
-@@ -932,7 +932,6 @@ err_release_mem_region:
- err_clk_put:
- 	clk_put(host->clk);
- err_free_host:
--	platform_set_drvdata(pdev, NULL);
- 	mmc_free_host(mmc);
- 
- 	return ret;
-@@ -960,7 +959,6 @@ static int jz4740_mmc_remove(struct plat
- 
- 	clk_put(host->clk);
- 
--	platform_set_drvdata(pdev, NULL);
- 	mmc_free_host(host->mmc);
- 
- 	return 0;
---- a/drivers/mmc/host/mvsdio.c
-+++ b/drivers/mmc/host/mvsdio.c
-@@ -827,7 +827,6 @@ static int __exit mvsd_remove(struct pla
- 		clk_disable_unprepare(host->clk);
- 	mmc_free_host(mmc);
- 
--	platform_set_drvdata(pdev, NULL);
- 	return 0;
- }
- 
---- a/drivers/mmc/host/mxcmmc.c
-+++ b/drivers/mmc/host/mxcmmc.c
-@@ -1219,8 +1219,6 @@ static int mxcmci_remove(struct platform
- 	struct mmc_host *mmc = platform_get_drvdata(pdev);
- 	struct mxcmci_host *host = mmc_priv(mmc);
- 
--	platform_set_drvdata(pdev, NULL);
--
- 	mmc_remove_host(mmc);
- 
- 	if (host->vcc)
---- a/drivers/mmc/host/mxs-mmc.c
-+++ b/drivers/mmc/host/mxs-mmc.c
-@@ -708,8 +708,6 @@ static int mxs_mmc_remove(struct platfor
- 
- 	mmc_remove_host(mmc);
- 
--	platform_set_drvdata(pdev, NULL);
--
- 	if (ssp->dmach)
- 		dma_release_channel(ssp->dmach);
- 
---- a/drivers/mmc/host/omap.c
-+++ b/drivers/mmc/host/omap.c
-@@ -1500,8 +1500,6 @@ static int mmc_omap_remove(struct platfo
- 	struct mmc_omap_host *host = platform_get_drvdata(pdev);
- 	int i;
- 
--	platform_set_drvdata(pdev, NULL);
--
- 	BUG_ON(host == NULL);
- 
- 	for (i = 0; i < host->nr_slots; i++)
---- a/drivers/mmc/host/omap_hsmmc.c
-+++ b/drivers/mmc/host/omap_hsmmc.c
-@@ -2047,7 +2047,6 @@ err_irq:
- 	}
- err1:
- 	iounmap(host->base);
--	platform_set_drvdata(pdev, NULL);
- 	mmc_free_host(mmc);
- err_alloc:
- 	omap_hsmmc_gpio_free(pdata);
-@@ -2093,7 +2092,6 @@ static int omap_hsmmc_remove(struct plat
- 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- 	if (res)
- 		release_mem_region(res->start, resource_size(res));
--	platform_set_drvdata(pdev, NULL);
- 
- 	return 0;
- }
---- a/drivers/mmc/host/pxamci.c
-+++ b/drivers/mmc/host/pxamci.c
-@@ -834,8 +834,6 @@ static int pxamci_remove(struct platform
- 	struct mmc_host *mmc = platform_get_drvdata(pdev);
- 	int gpio_cd = -1, gpio_ro = -1, gpio_power = -1;
- 
--	platform_set_drvdata(pdev, NULL);
--
- 	if (mmc) {
- 		struct pxamci_host *host = mmc_priv(mmc);
- 
---- a/drivers/mmc/host/rtsx_pci_sdmmc.c
-+++ b/drivers/mmc/host/rtsx_pci_sdmmc.c
-@@ -1316,8 +1316,6 @@ static int rtsx_pci_sdmmc_drv_remove(str
- 	mmc_remove_host(mmc);
- 	mmc_free_host(mmc);
- 
--	platform_set_drvdata(pdev, NULL);
--
- 	dev_dbg(&(pdev->dev),
- 		": Realtek PCI-E SDMMC controller has been removed\n");
- 
---- a/drivers/mmc/host/sdhci-acpi.c
-+++ b/drivers/mmc/host/sdhci-acpi.c
-@@ -262,7 +262,6 @@ static int sdhci_acpi_probe(struct platf
- 	return 0;
- 
- err_free:
--	platform_set_drvdata(pdev, NULL);
- 	sdhci_free_host(c->host);
- 	return err;
- }
-@@ -281,7 +280,6 @@ static int sdhci_acpi_remove(struct plat
- 
- 	dead = (sdhci_readl(c->host, SDHCI_INT_STATUS) == ~0);
- 	sdhci_remove_host(c->host, dead);
--	platform_set_drvdata(pdev, NULL);
- 	sdhci_free_host(c->host);
- 
- 	return 0;
---- a/drivers/mmc/host/sdhci-pltfm.c
-+++ b/drivers/mmc/host/sdhci-pltfm.c
-@@ -197,7 +197,6 @@ void sdhci_pltfm_free(struct platform_de
- 	iounmap(host->ioaddr);
- 	release_mem_region(iomem->start, resource_size(iomem));
- 	sdhci_free_host(host);
--	platform_set_drvdata(pdev, NULL);
- }
- EXPORT_SYMBOL_GPL(sdhci_pltfm_free);
- 
---- a/drivers/mmc/host/sdhci-pxav2.c
-+++ b/drivers/mmc/host/sdhci-pxav2.c
-@@ -253,8 +253,6 @@ static int sdhci_pxav2_remove(struct pla
- 	sdhci_pltfm_free(pdev);
- 	kfree(pxa);
- 
--	platform_set_drvdata(pdev, NULL);
--
- 	return 0;
- }
- 
---- a/drivers/mmc/host/sdhci-pxav3.c
-+++ b/drivers/mmc/host/sdhci-pxav3.c
-@@ -340,8 +340,6 @@ static int sdhci_pxav3_remove(struct pla
- 	sdhci_pltfm_free(pdev);
- 	kfree(pxa);
- 
--	platform_set_drvdata(pdev, NULL);
--
- 	return 0;
- }
- 
---- a/drivers/mmc/host/sdhci-s3c.c
-+++ b/drivers/mmc/host/sdhci-s3c.c
-@@ -745,7 +745,6 @@ static int sdhci_s3c_remove(struct platf
- 	clk_disable_unprepare(sc->clk_io);
- 
- 	sdhci_free_host(host);
--	platform_set_drvdata(pdev, NULL);
- 
- 	return 0;
- }
---- a/drivers/mmc/host/sdhci-spear.c
-+++ b/drivers/mmc/host/sdhci-spear.c
-@@ -258,7 +258,6 @@ static int sdhci_probe(struct platform_d
- 	return 0;
- 
- set_drvdata:
--	platform_set_drvdata(pdev, NULL);
- 	sdhci_remove_host(host, 1);
- free_host:
- 	sdhci_free_host(host);
-@@ -278,7 +277,6 @@ static int sdhci_remove(struct platform_
- 	int dead = 0;
- 	u32 scratch;
- 
--	platform_set_drvdata(pdev, NULL);
- 	scratch = readl(host->ioaddr + SDHCI_INT_STATUS);
- 	if (scratch == (u32)-1)
- 		dead = 1;
---- a/drivers/mmc/host/sh_mmcif.c
-+++ b/drivers/mmc/host/sh_mmcif.c
-@@ -1530,8 +1530,6 @@ static int sh_mmcif_remove(struct platfo
- 	if (irq[1] >= 0)
- 		free_irq(irq[1], host);
- 
--	platform_set_drvdata(pdev, NULL);
--
- 	clk_disable(host->hclk);
- 	mmc_free_host(host->mmc);
- 	pm_runtime_put_sync(&pdev->dev);
---- a/drivers/mmc/host/tmio_mmc.c
-+++ b/drivers/mmc/host/tmio_mmc.c
-@@ -112,8 +112,6 @@ static int tmio_mmc_remove(struct platfo
- 	const struct mfd_cell *cell = mfd_get_cell(pdev);
- 	struct mmc_host *mmc = platform_get_drvdata(pdev);
- 
--	platform_set_drvdata(pdev, NULL);
--
- 	if (mmc) {
- 		struct tmio_mmc_host *host = mmc_priv(mmc);
- 		free_irq(platform_get_irq(pdev, 0), host);
---- a/drivers/mmc/host/wmt-sdmmc.c
-+++ b/drivers/mmc/host/wmt-sdmmc.c
-@@ -927,8 +927,6 @@ static int wmt_mci_remove(struct platfor
- 
- 	mmc_free_host(mmc);
- 
--	platform_set_drvdata(pdev, NULL);
--
- 	dev_info(&pdev->dev, "WMT MCI device removed\n");
- 
- 	return 0;
diff --git a/patches.renesas/0582-mmc-tmio-postpone-controller-reset-during-resume.patch b/patches.renesas/0582-mmc-tmio-postpone-controller-reset-during-resume.patch
deleted file mode 100644
index eb41e25cac853..0000000000000
--- a/patches.renesas/0582-mmc-tmio-postpone-controller-reset-during-resume.patch
+++ /dev/null
@@ -1,62 +0,0 @@
-From 6fa5c9807b85480145cbdcd4eb14844181a09117 Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Mon, 22 Apr 2013 10:29:26 +0200
-Subject: mmc: tmio: postpone controller reset during resume
-
-When resuming, the tmio_mmc_host_resume() function is run when the
-controller might still be powered down. Issuing a reset command to it at
-that time has no effect. This patch postpones resetting the controller
-until the first powering-up .set_ios() call.
-
-Reported-by: Nguyen Viet Dung <nv-dung@jinso.co.jp>
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Signed-off-by: Chris Ball <cjb@laptop.org>
-(cherry picked from commit b22ffdcd25d67a07f2b5a75a7805826bfe8597f1)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/mmc/host/tmio_mmc.h     | 1 +
- drivers/mmc/host/tmio_mmc_pio.c | 6 +++++-
- 2 files changed, 6 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/mmc/host/tmio_mmc.h b/drivers/mmc/host/tmio_mmc.h
-index d857f5c6..759d8f4f 100644
---- a/drivers/mmc/host/tmio_mmc.h
-+++ b/drivers/mmc/host/tmio_mmc.h
-@@ -85,6 +85,7 @@ struct tmio_mmc_host {
- 	unsigned long		last_req_ts;
- 	struct mutex		ios_lock;	/* protect set_ios() context */
- 	bool			native_hotplug;
-+	bool			resuming;
- };
- 
- int tmio_mmc_host_probe(struct tmio_mmc_host **host,
-diff --git a/drivers/mmc/host/tmio_mmc_pio.c b/drivers/mmc/host/tmio_mmc_pio.c
-index 5a1bc3b4..7e644da0 100644
---- a/drivers/mmc/host/tmio_mmc_pio.c
-+++ b/drivers/mmc/host/tmio_mmc_pio.c
-@@ -862,6 +862,10 @@ static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
- 		if (!host->power) {
- 			tmio_mmc_clk_update(mmc);
- 			pm_runtime_get_sync(dev);
-+			if (host->resuming) {
-+				tmio_mmc_reset(host);
-+				host->resuming = false;
-+			}
- 		}
- 		tmio_mmc_set_clock(host, ios->clock);
- 		if (!host->power) {
-@@ -1154,10 +1158,10 @@ int tmio_mmc_host_resume(struct device *dev)
- 	struct mmc_host *mmc = dev_get_drvdata(dev);
- 	struct tmio_mmc_host *host = mmc_priv(mmc);
- 
--	tmio_mmc_reset(host);
- 	tmio_mmc_enable_dma(host, true);
- 
- 	/* The MMC core will perform the complete set up */
-+	host->resuming = true;
- 	return mmc_resume_host(mmc);
- }
- EXPORT_SYMBOL(tmio_mmc_host_resume);
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0583-mmc-tmio-fix-unbalanced-power-on-calls-with-clock-ga.patch b/patches.renesas/0583-mmc-tmio-fix-unbalanced-power-on-calls-with-clock-ga.patch
deleted file mode 100644
index 7e9bf492118dc..0000000000000
--- a/patches.renesas/0583-mmc-tmio-fix-unbalanced-power-on-calls-with-clock-ga.patch
+++ /dev/null
@@ -1,128 +0,0 @@
-From 77b18fbebc4caf64698f6eea433f2e57f384441d Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Thu, 6 Jun 2013 16:35:44 +0200
-Subject: mmc: tmio: fix unbalanced power-on calls with clock-gating enabled
-
-With MMC clock gating enabled the MMC core currently calls MMC host driver's
-.set_ios() method with .power_mode == MMC_POWER_ON and the clock value set
-either to 0 or to the target rate. The tmio MMC driver then wrongly
-translates the latter calls to card slot power-on requests, even when the
-slot already was on. This patch fixes the driver to avoid needlessly
-incrementing power-supplying regulator's use count.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Tested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
-Signed-off-by: Chris Ball <cjb@laptop.org>
-(cherry picked from commit e83b7a8acc420923cbe8a30901d9eb60677f54fb)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/mmc/host/tmio_mmc.h     | 20 ++++++++++++++++++--
- drivers/mmc/host/tmio_mmc_pio.c | 27 +++++++++++++++++----------
- 2 files changed, 35 insertions(+), 12 deletions(-)
-
-diff --git a/drivers/mmc/host/tmio_mmc.h b/drivers/mmc/host/tmio_mmc.h
-index 759d8f4f..86fd21e0 100644
---- a/drivers/mmc/host/tmio_mmc.h
-+++ b/drivers/mmc/host/tmio_mmc.h
-@@ -40,6 +40,22 @@
- 
- struct tmio_mmc_data;
- 
-+/*
-+ * We differentiate between the following 3 power states:
-+ * 1. card slot powered off, controller stopped. This is used, when either there
-+ *    is no card in the slot, or the card really has to be powered down.
-+ * 2. card slot powered on, controller stopped. This is used, when a card is in
-+ *    the slot, but no activity is currently taking place. This is a power-
-+ *    saving mode with card-state preserved. This state can be entered, e.g.
-+ *    when MMC clock-gating is used.
-+ * 3. card slot powered on, controller running. This is the actual active state.
-+ */
-+enum tmio_mmc_power {
-+	TMIO_MMC_OFF_STOP,	/* card power off, controller stopped */
-+	TMIO_MMC_ON_STOP,	/* card power on, controller stopped */
-+	TMIO_MMC_ON_RUN,	/* card power on, controller running */
-+};
-+
- struct tmio_mmc_host {
- 	void __iomem *ctl;
- 	unsigned long bus_shift;
-@@ -48,8 +64,8 @@ struct tmio_mmc_host {
- 	struct mmc_data         *data;
- 	struct mmc_host         *mmc;
- 
--	/* Controller power state */
--	bool			power;
-+	/* Controller and card power state */
-+	enum tmio_mmc_power	power;
- 
- 	/* Callbacks for clock / power control */
- 	void (*set_pwr)(struct platform_device *host, int state);
-diff --git a/drivers/mmc/host/tmio_mmc_pio.c b/drivers/mmc/host/tmio_mmc_pio.c
-index 7e644da0..8e955ce2 100644
---- a/drivers/mmc/host/tmio_mmc_pio.c
-+++ b/drivers/mmc/host/tmio_mmc_pio.c
-@@ -859,7 +859,7 @@ static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
- 	 * is kept positive, so no suspending actually takes place.
- 	 */
- 	if (ios->power_mode == MMC_POWER_ON && ios->clock) {
--		if (!host->power) {
-+		if (host->power != TMIO_MMC_ON_RUN) {
- 			tmio_mmc_clk_update(mmc);
- 			pm_runtime_get_sync(dev);
- 			if (host->resuming) {
-@@ -868,27 +868,34 @@ static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
- 			}
- 		}
- 		tmio_mmc_set_clock(host, ios->clock);
--		if (!host->power) {
-+		if (host->power == TMIO_MMC_OFF_STOP)
- 			/* power up SD card and the bus */
- 			tmio_mmc_power_on(host, ios->vdd);
--			host->power = true;
--		}
-+		host->power = TMIO_MMC_ON_RUN;
- 		/* start bus clock */
- 		tmio_mmc_clk_start(host);
- 	} else if (ios->power_mode != MMC_POWER_UP) {
--		if (host->power) {
--			struct tmio_mmc_data *pdata = host->pdata;
--			if (ios->power_mode == MMC_POWER_OFF)
-+		struct tmio_mmc_data *pdata = host->pdata;
-+		unsigned int old_power = host->power;
-+
-+		if (old_power != TMIO_MMC_OFF_STOP) {
-+			if (ios->power_mode == MMC_POWER_OFF) {
- 				tmio_mmc_power_off(host);
-+				host->power = TMIO_MMC_OFF_STOP;
-+			} else {
-+				host->power = TMIO_MMC_ON_STOP;
-+			}
-+		}
-+
-+		if (old_power == TMIO_MMC_ON_RUN) {
- 			tmio_mmc_clk_stop(host);
--			host->power = false;
- 			pm_runtime_put(dev);
- 			if (pdata->clk_disable)
- 				pdata->clk_disable(host->pdev);
- 		}
- 	}
- 
--	if (host->power) {
-+	if (host->power != TMIO_MMC_OFF_STOP) {
- 		switch (ios->bus_width) {
- 		case MMC_BUS_WIDTH_1:
- 			sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x80e0);
-@@ -1029,7 +1036,7 @@ int tmio_mmc_host_probe(struct tmio_mmc_host **host,
- 				  mmc->caps & MMC_CAP_NONREMOVABLE ||
- 				  mmc->slot.cd_irq >= 0);
- 
--	_host->power = false;
-+	_host->power = TMIO_MMC_OFF_STOP;
- 	pm_runtime_enable(&pdev->dev);
- 	ret = pm_runtime_resume(&pdev->dev);
- 	if (ret < 0)
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0584-mmc-tmio-reset-the-controller-after-power-up.patch b/patches.renesas/0584-mmc-tmio-reset-the-controller-after-power-up.patch
deleted file mode 100644
index bc51fef9ed43f..0000000000000
--- a/patches.renesas/0584-mmc-tmio-reset-the-controller-after-power-up.patch
+++ /dev/null
@@ -1,47 +0,0 @@
-From d85ca2c63ef14f0af1ff528911fedc74bf22b0c6 Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Thu, 6 Jun 2013 16:35:48 +0200
-Subject: mmc: tmio: reset the controller after power-up
-
-This fixes two reported problems:
-1. after a system resume the controller isn't functioning until a command
-   runs on a timeout and a controller reset is performed.
-2. if a card is ejected during a running write operation, its re-insertion
-   isn't detected.
-
-Reported-by: Nguyen Viet Dung <nv-dung@jinso.co.jp>
-Reported-by: Nguyen Hong Ky <nh-ky@jinso.co.jp>
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Tested-by: Nguyen Viet Dung <nv-dung@jinso.co.jp>
-Tested-by: Nguyen Hong Ky <nh-ky@jinso.co.jp>
-Signed-off-by: Chris Ball <cjb@laptop.org>
-(cherry picked from commit b9ec2744128d0940342b236e9018614ba8848118)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/mmc/host/tmio_mmc_pio.c | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/mmc/host/tmio_mmc_pio.c b/drivers/mmc/host/tmio_mmc_pio.c
-index 8e955ce2..1912d6f4 100644
---- a/drivers/mmc/host/tmio_mmc_pio.c
-+++ b/drivers/mmc/host/tmio_mmc_pio.c
-@@ -867,6 +867,8 @@ static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
- 				host->resuming = false;
- 			}
- 		}
-+		if (host->power == TMIO_MMC_OFF_STOP)
-+			tmio_mmc_reset(host);
- 		tmio_mmc_set_clock(host, ios->clock);
- 		if (host->power == TMIO_MMC_OFF_STOP)
- 			/* power up SD card and the bus */
-@@ -1186,7 +1188,6 @@ int tmio_mmc_host_runtime_resume(struct device *dev)
- 	struct mmc_host *mmc = dev_get_drvdata(dev);
- 	struct tmio_mmc_host *host = mmc_priv(mmc);
- 
--	tmio_mmc_reset(host);
- 	tmio_mmc_enable_dma(host, true);
- 
- 	return 0;
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0585-mmc-tmio-mmc-handle-mmc_of_parse-errors-during-probe.patch b/patches.renesas/0585-mmc-tmio-mmc-handle-mmc_of_parse-errors-during-probe.patch
deleted file mode 100644
index 8d571c7c92bb4..0000000000000
--- a/patches.renesas/0585-mmc-tmio-mmc-handle-mmc_of_parse-errors-during-probe.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From e6115a664d26ca3e5a7935712d8a1de54aca4c74 Mon Sep 17 00:00:00 2001
-From: Simon Baatz <gmbnomis@gmail.com>
-Date: Sun, 9 Jun 2013 22:14:13 +0200
-Subject: mmc: tmio-mmc: handle mmc_of_parse() errors during probe
-
-Signed-off-by: Simon Baatz <gmbnomis@gmail.com>
-Acked-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Signed-off-by: Chris Ball <cjb@laptop.org>
-(cherry picked from commit 274a752b1adc7e756acb283edc188f27fb3be6f8)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/mmc/host/tmio_mmc_pio.c | 4 +++-
- 1 file changed, 3 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/mmc/host/tmio_mmc_pio.c b/drivers/mmc/host/tmio_mmc_pio.c
-index 1912d6f4..8486a22a 100644
---- a/drivers/mmc/host/tmio_mmc_pio.c
-+++ b/drivers/mmc/host/tmio_mmc_pio.c
-@@ -1001,7 +1001,9 @@ int tmio_mmc_host_probe(struct tmio_mmc_host **host,
- 	if (!mmc)
- 		return -ENOMEM;
- 
--	mmc_of_parse(mmc);
-+	ret = mmc_of_parse(mmc);
-+	if (ret < 0)
-+		goto host_free;
- 
- 	pdata->dev = &pdev->dev;
- 	_host = mmc_priv(mmc);
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0586-mmc-sh_mobile_sdhi-fix-error-return-code-in-sh_mobil.patch b/patches.renesas/0586-mmc-sh_mobile_sdhi-fix-error-return-code-in-sh_mobil.patch
deleted file mode 100644
index 0def3c35d19ee..0000000000000
--- a/patches.renesas/0586-mmc-sh_mobile_sdhi-fix-error-return-code-in-sh_mobil.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From 7de148776354cc4f743f5d999db427169f7d0d60 Mon Sep 17 00:00:00 2001
-From: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
-Date: Tue, 28 May 2013 13:26:50 +0800
-Subject: mmc: sh_mobile_sdhi: fix error return code in sh_mobile_sdhi_probe()
-
-Fix to return a negative error code instead of 0 when we cannot get
-IRQ source by platform_get_irq(), as done elsewhere in this function.
-
-Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
-Acked-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Signed-off-by: Chris Ball <cjb@laptop.org>
-(cherry picked from commit 7913ae7d10d82bf9d9af6be6c20281fceb695ec0)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/mmc/host/sh_mobile_sdhi.c | 4 +++-
- 1 file changed, 3 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/mmc/host/sh_mobile_sdhi.c b/drivers/mmc/host/sh_mobile_sdhi.c
-index cc4c872c..a4316b34 100644
---- a/drivers/mmc/host/sh_mobile_sdhi.c
-+++ b/drivers/mmc/host/sh_mobile_sdhi.c
-@@ -273,8 +273,10 @@ static int sh_mobile_sdhi_probe(struct platform_device *pdev)
- 		}
- 
- 		/* There must be at least one IRQ source */
--		if (!i)
-+		if (!i) {
-+			ret = irq;
- 			goto eirq;
-+		}
- 	}
- 
- 	dev_info(&pdev->dev, "%s base at 0x%08lx clock rate %u MHz\n",
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0587-mmc-host-use-platform_-get-set-_drvdata.patch b/patches.renesas/0587-mmc-host-use-platform_-get-set-_drvdata.patch
deleted file mode 100644
index 6d64c037a3c32..0000000000000
--- a/patches.renesas/0587-mmc-host-use-platform_-get-set-_drvdata.patch
+++ /dev/null
@@ -1,83 +0,0 @@
-From 520ac2583bb4f2690dc1c30ffdbd67e9a72afd7a Mon Sep 17 00:00:00 2001
-From: Jingoo Han <jg1.han@samsung.com>
-Date: Mon, 3 Jun 2013 13:41:03 +0900
-Subject: mmc: host: use platform_{get,set}_drvdata()
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Use the wrapper functions for getting and setting the driver data using
-platform_device instead of using dev_{get,set}_drvdata() with &pdev->dev,
-so we can directly pass a struct platform_device.
-
-Signed-off-by: Jingoo Han <jg1.han@samsung.com>
-Acked-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
-Signed-off-by: Chris Ball <cjb@laptop.org>
-(cherry picked from commit 6e2c0f3ffbb54547edcf1dd92a120ff37988a4d8)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/mmc/host/cb710-mmc.c      | 2 +-
- drivers/mmc/host/cb710-mmc.h      | 2 +-
- drivers/mmc/host/sh_mobile_sdhi.c | 6 +++---
- 3 files changed, 5 insertions(+), 5 deletions(-)
-
-diff --git a/drivers/mmc/host/cb710-mmc.c b/drivers/mmc/host/cb710-mmc.c
-index 777ca204..9d6e2b84 100644
---- a/drivers/mmc/host/cb710-mmc.c
-+++ b/drivers/mmc/host/cb710-mmc.c
-@@ -703,7 +703,7 @@ static int cb710_mmc_init(struct platform_device *pdev)
- 	if (!mmc)
- 		return -ENOMEM;
- 
--	dev_set_drvdata(&pdev->dev, mmc);
-+	platform_set_drvdata(pdev, mmc);
- 
- 	/* harmless (maybe) magic */
- 	pci_read_config_dword(chip->pdev, 0x48, &val);
-diff --git a/drivers/mmc/host/cb710-mmc.h b/drivers/mmc/host/cb710-mmc.h
-index e845c776..8984ec87 100644
---- a/drivers/mmc/host/cb710-mmc.h
-+++ b/drivers/mmc/host/cb710-mmc.h
-@@ -24,7 +24,7 @@ struct cb710_mmc_reader {
- 
- static inline struct mmc_host *cb710_slot_to_mmc(struct cb710_slot *slot)
- {
--	return dev_get_drvdata(&slot->pdev.dev);
-+	return platform_get_drvdata(&slot->pdev);
- }
- 
- static inline struct cb710_slot *cb710_mmc_to_slot(struct mmc_host *mmc)
-diff --git a/drivers/mmc/host/sh_mobile_sdhi.c b/drivers/mmc/host/sh_mobile_sdhi.c
-index a4316b34..ebea7492 100644
---- a/drivers/mmc/host/sh_mobile_sdhi.c
-+++ b/drivers/mmc/host/sh_mobile_sdhi.c
-@@ -51,7 +51,7 @@ struct sh_mobile_sdhi {
- 
- static int sh_mobile_sdhi_clk_enable(struct platform_device *pdev, unsigned int *f)
- {
--	struct mmc_host *mmc = dev_get_drvdata(&pdev->dev);
-+	struct mmc_host *mmc = platform_get_drvdata(pdev);
- 	struct tmio_mmc_host *host = mmc_priv(mmc);
- 	struct sh_mobile_sdhi *priv = container_of(host->pdata, struct sh_mobile_sdhi, mmc_data);
- 	int ret = clk_enable(priv->clk);
-@@ -64,7 +64,7 @@ static int sh_mobile_sdhi_clk_enable(struct platform_device *pdev, unsigned int
- 
- static void sh_mobile_sdhi_clk_disable(struct platform_device *pdev)
- {
--	struct mmc_host *mmc = dev_get_drvdata(&pdev->dev);
-+	struct mmc_host *mmc = platform_get_drvdata(pdev);
- 	struct tmio_mmc_host *host = mmc_priv(mmc);
- 	struct sh_mobile_sdhi *priv = container_of(host->pdata, struct sh_mobile_sdhi, mmc_data);
- 	clk_disable(priv->clk);
-@@ -119,7 +119,7 @@ static int sh_mobile_sdhi_write16_hook(struct tmio_mmc_host *host, int addr)
- 
- static void sh_mobile_sdhi_cd_wakeup(const struct platform_device *pdev)
- {
--	mmc_detect_change(dev_get_drvdata(&pdev->dev), msecs_to_jiffies(100));
-+	mmc_detect_change(platform_get_drvdata(pdev), msecs_to_jiffies(100));
- }
- 
- static const struct sh_mobile_sdhi_ops sdhi_ops = {
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0588-mmc-tmio-fix-compiler-warning.patch b/patches.renesas/0588-mmc-tmio-fix-compiler-warning.patch
deleted file mode 100644
index 51a5fc391d6d1..0000000000000
--- a/patches.renesas/0588-mmc-tmio-fix-compiler-warning.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From 93c91e46ee06be1c10699765409debf224b90bf8 Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Mon, 8 Jul 2013 11:38:09 +0200
-Subject: mmc: tmio: fix compiler warning
-
-This patch fixes a compiler warning:
-
-drivers/mmc/host/tmio_mmc_pio.c: In function 'tmio_mmc_power_on':
-drivers/mmc/host/tmio_mmc_pio.c:798:19: warning: ignoring return value of
-'regulator_enable', declared with attribute warn_unused_result [-Wunused-result]
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Signed-off-by: Chris Ball <cjb@laptop.org>
-(cherry picked from commit 6d1d6b4759112acf4c079eb3a0dd296bdbf61cf5)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/mmc/host/tmio_mmc_pio.c | 6 +++++-
- 1 file changed, 5 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/mmc/host/tmio_mmc_pio.c b/drivers/mmc/host/tmio_mmc_pio.c
-index 8486a22a..17f7fa99 100644
---- a/drivers/mmc/host/tmio_mmc_pio.c
-+++ b/drivers/mmc/host/tmio_mmc_pio.c
-@@ -795,9 +795,13 @@ static void tmio_mmc_power_on(struct tmio_mmc_host *host, unsigned short vdd)
- 	 * omap_hsmmc.c driver does.
- 	 */
- 	if (!IS_ERR(mmc->supply.vqmmc) && !ret) {
--		regulator_enable(mmc->supply.vqmmc);
-+		ret = regulator_enable(mmc->supply.vqmmc);
- 		udelay(200);
- 	}
-+
-+	if (ret < 0)
-+		dev_dbg(&host->pdev->dev, "Regulators failed to power up: %d\n",
-+			ret);
- }
- 
- static void tmio_mmc_power_off(struct tmio_mmc_host *host)
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0589-mmc-sh_mobile_sdhi-Remove-.get_cd-callback-from-plat.patch b/patches.renesas/0589-mmc-sh_mobile_sdhi-Remove-.get_cd-callback-from-plat.patch
deleted file mode 100644
index 011b6489917f6..0000000000000
--- a/patches.renesas/0589-mmc-sh_mobile_sdhi-Remove-.get_cd-callback-from-plat.patch
+++ /dev/null
@@ -1,60 +0,0 @@
-From f26deeb9727c142a5fd85ce4baa4ca6d127a4842 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 8 Aug 2013 12:38:41 +0200
-Subject: mmc: sh_mobile_sdhi: Remove .get_cd() callback from platform data
-
-All platforms pass the CD GPIO number to the driver in the .cd_gpio
-field. The .get_cd() callback isn't used anymore, remove it.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Signed-off-by: Chris Ball <cjb@laptop.org>
-(cherry picked from commit 57fcb523e5fce1c24e9c28b64f6e6dc3edf55073)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/mmc/host/sh_mobile_sdhi.c  | 9 ---------
- include/linux/mmc/sh_mobile_sdhi.h | 1 -
- 2 files changed, 10 deletions(-)
-
-diff --git a/drivers/mmc/host/sh_mobile_sdhi.c b/drivers/mmc/host/sh_mobile_sdhi.c
-index ebea7492..663a6727 100644
---- a/drivers/mmc/host/sh_mobile_sdhi.c
-+++ b/drivers/mmc/host/sh_mobile_sdhi.c
-@@ -77,13 +77,6 @@ static void sh_mobile_sdhi_set_pwr(struct platform_device *pdev, int state)
- 	p->set_pwr(pdev, state);
- }
- 
--static int sh_mobile_sdhi_get_cd(struct platform_device *pdev)
--{
--	struct sh_mobile_sdhi_info *p = pdev->dev.platform_data;
--
--	return p->get_cd(pdev);
--}
--
- static int sh_mobile_sdhi_wait_idle(struct tmio_mmc_host *host)
- {
- 	int timeout = 1000;
-@@ -182,8 +175,6 @@ static int sh_mobile_sdhi_probe(struct platform_device *pdev)
- 		mmc_data->cd_gpio = p->cd_gpio;
- 		if (p->set_pwr)
- 			mmc_data->set_pwr = sh_mobile_sdhi_set_pwr;
--		if (p->get_cd)
--			mmc_data->get_cd = sh_mobile_sdhi_get_cd;
- 
- 		if (p->dma_slave_tx > 0 && p->dma_slave_rx > 0) {
- 			/*
-diff --git a/include/linux/mmc/sh_mobile_sdhi.h b/include/linux/mmc/sh_mobile_sdhi.h
-index b76bcf06..f31c6926 100644
---- a/include/linux/mmc/sh_mobile_sdhi.h
-+++ b/include/linux/mmc/sh_mobile_sdhi.h
-@@ -26,7 +26,6 @@ struct sh_mobile_sdhi_info {
- 	u32 tmio_ocr_mask;	/* available MMC voltages */
- 	unsigned int cd_gpio;
- 	void (*set_pwr)(struct platform_device *pdev, int state);
--	int (*get_cd)(struct platform_device *pdev);
- 
- 	/* callbacks for board specific setup code */
- 	int (*init)(struct platform_device *pdev,
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0590-mmc-sh_mobile_sdhi-Remove-.set_pwr-callback-from-pla.patch b/patches.renesas/0590-mmc-sh_mobile_sdhi-Remove-.set_pwr-callback-from-pla.patch
deleted file mode 100644
index ba2e797d9f53f..0000000000000
--- a/patches.renesas/0590-mmc-sh_mobile_sdhi-Remove-.set_pwr-callback-from-pla.patch
+++ /dev/null
@@ -1,60 +0,0 @@
-From 49d88ee21980f7ea5fde142e0585226d25d227d1 Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 8 Aug 2013 12:38:42 +0200
-Subject: mmc: sh_mobile_sdhi: Remove .set_pwr() callback from platform data
-
-The .set_pwr() callback isn't used anymore as all platforms register
-GPIO-controlled regulators. Remove it.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Signed-off-by: Chris Ball <cjb@laptop.org>
-(cherry picked from commit 1036563e1417c050993bbd48f20a84ff7c7cef99)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/mmc/host/sh_mobile_sdhi.c  | 9 ---------
- include/linux/mmc/sh_mobile_sdhi.h | 1 -
- 2 files changed, 10 deletions(-)
-
-diff --git a/drivers/mmc/host/sh_mobile_sdhi.c b/drivers/mmc/host/sh_mobile_sdhi.c
-index 663a6727..b3fd2c36 100644
---- a/drivers/mmc/host/sh_mobile_sdhi.c
-+++ b/drivers/mmc/host/sh_mobile_sdhi.c
-@@ -70,13 +70,6 @@ static void sh_mobile_sdhi_clk_disable(struct platform_device *pdev)
- 	clk_disable(priv->clk);
- }
- 
--static void sh_mobile_sdhi_set_pwr(struct platform_device *pdev, int state)
--{
--	struct sh_mobile_sdhi_info *p = pdev->dev.platform_data;
--
--	p->set_pwr(pdev, state);
--}
--
- static int sh_mobile_sdhi_wait_idle(struct tmio_mmc_host *host)
- {
- 	int timeout = 1000;
-@@ -173,8 +166,6 @@ static int sh_mobile_sdhi_probe(struct platform_device *pdev)
- 		mmc_data->capabilities |= p->tmio_caps;
- 		mmc_data->capabilities2 |= p->tmio_caps2;
- 		mmc_data->cd_gpio = p->cd_gpio;
--		if (p->set_pwr)
--			mmc_data->set_pwr = sh_mobile_sdhi_set_pwr;
- 
- 		if (p->dma_slave_tx > 0 && p->dma_slave_rx > 0) {
- 			/*
-diff --git a/include/linux/mmc/sh_mobile_sdhi.h b/include/linux/mmc/sh_mobile_sdhi.h
-index f31c6926..68927ae5 100644
---- a/include/linux/mmc/sh_mobile_sdhi.h
-+++ b/include/linux/mmc/sh_mobile_sdhi.h
-@@ -25,7 +25,6 @@ struct sh_mobile_sdhi_info {
- 	unsigned long tmio_caps2;
- 	u32 tmio_ocr_mask;	/* available MMC voltages */
- 	unsigned int cd_gpio;
--	void (*set_pwr)(struct platform_device *pdev, int state);
- 
- 	/* callbacks for board specific setup code */
- 	int (*init)(struct platform_device *pdev,
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0591-mmc-tmio-mmc-Remove-.get_cd-callback-from-platform-d.patch b/patches.renesas/0591-mmc-tmio-mmc-Remove-.get_cd-callback-from-platform-d.patch
deleted file mode 100644
index 937199061b8bf..0000000000000
--- a/patches.renesas/0591-mmc-tmio-mmc-Remove-.get_cd-callback-from-platform-d.patch
+++ /dev/null
@@ -1,64 +0,0 @@
-From 64d8f15c333fd6f609770cccce9bbc7b2e7b472a Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 8 Aug 2013 12:38:43 +0200
-Subject: mmc: tmio-mmc: Remove .get_cd() callback from platform data
-
-All platforms pass the CD GPIO number to the driver in the .cd_gpio
-field. The .get_cd() callback isn't used anymore, remove it
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Signed-off-by: Chris Ball <cjb@laptop.org>
-(cherry picked from commit 2b63b341d42cd64ff40062447320d46cf3e7f0bb)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/mmc/host/tmio_mmc_pio.c | 16 +---------------
- include/linux/mfd/tmio.h        |  1 -
- 2 files changed, 1 insertion(+), 16 deletions(-)
-
-diff --git a/drivers/mmc/host/tmio_mmc_pio.c b/drivers/mmc/host/tmio_mmc_pio.c
-index 17f7fa99..b3802256 100644
---- a/drivers/mmc/host/tmio_mmc_pio.c
-+++ b/drivers/mmc/host/tmio_mmc_pio.c
-@@ -936,25 +936,11 @@ static int tmio_mmc_get_ro(struct mmc_host *mmc)
- 		 (sd_ctrl_read32(host, CTL_STATUS) & TMIO_STAT_WRPROTECT));
- }
- 
--static int tmio_mmc_get_cd(struct mmc_host *mmc)
--{
--	struct tmio_mmc_host *host = mmc_priv(mmc);
--	struct tmio_mmc_data *pdata = host->pdata;
--	int ret = mmc_gpio_get_cd(mmc);
--	if (ret >= 0)
--		return ret;
--
--	if (!pdata->get_cd)
--		return -ENOSYS;
--	else
--		return pdata->get_cd(host->pdev);
--}
--
- static const struct mmc_host_ops tmio_mmc_ops = {
- 	.request	= tmio_mmc_request,
- 	.set_ios	= tmio_mmc_set_ios,
- 	.get_ro         = tmio_mmc_get_ro,
--	.get_cd		= tmio_mmc_get_cd,
-+	.get_cd		= mmc_gpio_get_cd,
- 	.enable_sdio_irq = tmio_mmc_enable_sdio_irq,
- };
- 
-diff --git a/include/linux/mfd/tmio.h b/include/linux/mfd/tmio.h
-index ce351132..b22883d6 100644
---- a/include/linux/mfd/tmio.h
-+++ b/include/linux/mfd/tmio.h
-@@ -108,7 +108,6 @@ struct tmio_mmc_data {
- 	unsigned int			cd_gpio;
- 	void (*set_pwr)(struct platform_device *host, int state);
- 	void (*set_clk_div)(struct platform_device *host, int state);
--	int (*get_cd)(struct platform_device *host);
- 	int (*write16_hook)(struct tmio_mmc_host *host, int addr);
- 	/* clock management callbacks */
- 	int (*clk_enable)(struct platform_device *pdev, unsigned int *f);
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0592-mmc-tmio-mmc-Remove-.set_pwr-callback-from-platform-.patch b/patches.renesas/0592-mmc-tmio-mmc-Remove-.set_pwr-callback-from-platform-.patch
deleted file mode 100644
index 229f70ce4ace9..0000000000000
--- a/patches.renesas/0592-mmc-tmio-mmc-Remove-.set_pwr-callback-from-platform-.patch
+++ /dev/null
@@ -1,78 +0,0 @@
-From 7e4e70d40fedf15556f00e0274114bec69d51f2a Mon Sep 17 00:00:00 2001
-From: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Date: Thu, 8 Aug 2013 12:38:44 +0200
-Subject: mmc: tmio-mmc: Remove .set_pwr() callback from platform data
-
-The .set_pwr() callback isn't used anymore as all platforms register
-GPIO-controlled regulators. Remove it.
-
-Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
-Acked-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Signed-off-by: Chris Ball <cjb@laptop.org>
-(cherry picked from commit 3af9d15c719017feb63fa99f89ac6009a5a3d467)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/mmc/host/tmio_mmc.h     | 1 -
- drivers/mmc/host/tmio_mmc_pio.c | 7 -------
- include/linux/mfd/tmio.h        | 1 -
- 3 files changed, 9 deletions(-)
-
-diff --git a/drivers/mmc/host/tmio_mmc.h b/drivers/mmc/host/tmio_mmc.h
-index 86fd21e0..39c2f451 100644
---- a/drivers/mmc/host/tmio_mmc.h
-+++ b/drivers/mmc/host/tmio_mmc.h
-@@ -68,7 +68,6 @@ struct tmio_mmc_host {
- 	enum tmio_mmc_power	power;
- 
- 	/* Callbacks for clock / power control */
--	void (*set_pwr)(struct platform_device *host, int state);
- 	void (*set_clk_div)(struct platform_device *host, int state);
- 
- 	/* pio related stuff */
-diff --git a/drivers/mmc/host/tmio_mmc_pio.c b/drivers/mmc/host/tmio_mmc_pio.c
-index b3802256..67a3bf12 100644
---- a/drivers/mmc/host/tmio_mmc_pio.c
-+++ b/drivers/mmc/host/tmio_mmc_pio.c
-@@ -777,9 +777,6 @@ static void tmio_mmc_power_on(struct tmio_mmc_host *host, unsigned short vdd)
- 
- 	/* .set_ios() is returning void, so, no chance to report an error */
- 
--	if (host->set_pwr)
--		host->set_pwr(host->pdev, 1);
--
- 	if (!IS_ERR(mmc->supply.vmmc)) {
- 		ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd);
- 		/*
-@@ -813,9 +810,6 @@ static void tmio_mmc_power_off(struct tmio_mmc_host *host)
- 
- 	if (!IS_ERR(mmc->supply.vmmc))
- 		mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0);
--
--	if (host->set_pwr)
--		host->set_pwr(host->pdev, 0);
- }
- 
- /* Set MMC clock / power.
-@@ -1002,7 +996,6 @@ int tmio_mmc_host_probe(struct tmio_mmc_host **host,
- 	_host->pdev = pdev;
- 	platform_set_drvdata(pdev, mmc);
- 
--	_host->set_pwr = pdata->set_pwr;
- 	_host->set_clk_div = pdata->set_clk_div;
- 
- 	/* SD control register space size is 0x200, 0x400 for bus_shift=1 */
-diff --git a/include/linux/mfd/tmio.h b/include/linux/mfd/tmio.h
-index b22883d6..baa23464 100644
---- a/include/linux/mfd/tmio.h
-+++ b/include/linux/mfd/tmio.h
-@@ -106,7 +106,6 @@ struct tmio_mmc_data {
- 	struct tmio_mmc_dma		*dma;
- 	struct device			*dev;
- 	unsigned int			cd_gpio;
--	void (*set_pwr)(struct platform_device *host, int state);
- 	void (*set_clk_div)(struct platform_device *host, int state);
- 	int (*write16_hook)(struct tmio_mmc_host *host, int addr);
- 	/* clock management callbacks */
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0593-mmc-SDHI-add-DT-compatibility-strings-for-further-So.patch b/patches.renesas/0593-mmc-SDHI-add-DT-compatibility-strings-for-further-So.patch
deleted file mode 100644
index baecb6c28b255..0000000000000
--- a/patches.renesas/0593-mmc-SDHI-add-DT-compatibility-strings-for-further-So.patch
+++ /dev/null
@@ -1,38 +0,0 @@
-From 86ff130cadc66806ab681cf6b122ae6ec58de81f Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Wed, 17 Jul 2013 10:22:50 +0900
-Subject: mmc: SDHI: add DT compatibility strings for further SoCs
-
-Add further OF compatibility strings to the SDHI driver to be able to
-precisely control driver's behaviour on each of them.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Acked-by: Magnus Damm <damm@opensource.se>
-Acked-by: Simon Horman <horms@verge.net.au>
-Signed-off-by: Chris Ball <cjb@laptop.org>
-(cherry picked from commit af99106ee9231b5382ee8c9a38899c5758bd6298)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/mmc/host/sh_mobile_sdhi.c | 5 +++++
- 1 file changed, 5 insertions(+)
-
-diff --git a/drivers/mmc/host/sh_mobile_sdhi.c b/drivers/mmc/host/sh_mobile_sdhi.c
-index b3fd2c36..87ed3fb5 100644
---- a/drivers/mmc/host/sh_mobile_sdhi.c
-+++ b/drivers/mmc/host/sh_mobile_sdhi.c
-@@ -115,7 +115,12 @@ static const struct sh_mobile_sdhi_ops sdhi_ops = {
- static const struct of_device_id sh_mobile_sdhi_of_match[] = {
- 	{ .compatible = "renesas,shmobile-sdhi" },
- 	{ .compatible = "renesas,sh7372-sdhi" },
-+	{ .compatible = "renesas,sh73a0-sdhi", .data = &sh_mobile_sdhi_of_cfg[0], },
-+	{ .compatible = "renesas,r8a73a4-sdhi", .data = &sh_mobile_sdhi_of_cfg[0], },
- 	{ .compatible = "renesas,r8a7740-sdhi", .data = &sh_mobile_sdhi_of_cfg[0], },
-+	{ .compatible = "renesas,r8a7778-sdhi", .data = &sh_mobile_sdhi_of_cfg[0], },
-+	{ .compatible = "renesas,r8a7779-sdhi", .data = &sh_mobile_sdhi_of_cfg[0], },
-+	{ .compatible = "renesas,r8a7790-sdhi", .data = &sh_mobile_sdhi_of_cfg[0], },
- 	{},
- };
- MODULE_DEVICE_TABLE(of, sh_mobile_sdhi_of_match);
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0594-Revert-mmc-tmio-mmc-Remove-.set_pwr-callback-from-pl.patch b/patches.renesas/0594-Revert-mmc-tmio-mmc-Remove-.set_pwr-callback-from-pl.patch
deleted file mode 100644
index 6150791ad14da..0000000000000
--- a/patches.renesas/0594-Revert-mmc-tmio-mmc-Remove-.set_pwr-callback-from-pl.patch
+++ /dev/null
@@ -1,77 +0,0 @@
-From 4b27b3333d50a9a453ed10b60847e9d4f488ea22 Mon Sep 17 00:00:00 2001
-From: Chris Ball <cjb@laptop.org>
-Date: Fri, 6 Sep 2013 07:29:05 -0400
-Subject: Revert "mmc: tmio-mmc: Remove .set_pwr() callback from platform data"
-
-This reverts commit 3af9d15c719017feb63fa99f89ac6009a5a3d467, which
-causes a build failure:
-
-drivers/mfd/asic3.c:724:2: error: unknown field 'set_pwr' specified in initializer
-
-(cherry picked from commit 9d731e7539713acc0ec7b67a5a91357c455d2334)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- drivers/mmc/host/tmio_mmc.h     | 1 +
- drivers/mmc/host/tmio_mmc_pio.c | 7 +++++++
- include/linux/mfd/tmio.h        | 1 +
- 3 files changed, 9 insertions(+)
-
-diff --git a/drivers/mmc/host/tmio_mmc.h b/drivers/mmc/host/tmio_mmc.h
-index 39c2f451..86fd21e0 100644
---- a/drivers/mmc/host/tmio_mmc.h
-+++ b/drivers/mmc/host/tmio_mmc.h
-@@ -68,6 +68,7 @@ struct tmio_mmc_host {
- 	enum tmio_mmc_power	power;
- 
- 	/* Callbacks for clock / power control */
-+	void (*set_pwr)(struct platform_device *host, int state);
- 	void (*set_clk_div)(struct platform_device *host, int state);
- 
- 	/* pio related stuff */
-diff --git a/drivers/mmc/host/tmio_mmc_pio.c b/drivers/mmc/host/tmio_mmc_pio.c
-index 67a3bf12..b3802256 100644
---- a/drivers/mmc/host/tmio_mmc_pio.c
-+++ b/drivers/mmc/host/tmio_mmc_pio.c
-@@ -777,6 +777,9 @@ static void tmio_mmc_power_on(struct tmio_mmc_host *host, unsigned short vdd)
- 
- 	/* .set_ios() is returning void, so, no chance to report an error */
- 
-+	if (host->set_pwr)
-+		host->set_pwr(host->pdev, 1);
-+
- 	if (!IS_ERR(mmc->supply.vmmc)) {
- 		ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd);
- 		/*
-@@ -810,6 +813,9 @@ static void tmio_mmc_power_off(struct tmio_mmc_host *host)
- 
- 	if (!IS_ERR(mmc->supply.vmmc))
- 		mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0);
-+
-+	if (host->set_pwr)
-+		host->set_pwr(host->pdev, 0);
- }
- 
- /* Set MMC clock / power.
-@@ -996,6 +1002,7 @@ int tmio_mmc_host_probe(struct tmio_mmc_host **host,
- 	_host->pdev = pdev;
- 	platform_set_drvdata(pdev, mmc);
- 
-+	_host->set_pwr = pdata->set_pwr;
- 	_host->set_clk_div = pdata->set_clk_div;
- 
- 	/* SD control register space size is 0x200, 0x400 for bus_shift=1 */
-diff --git a/include/linux/mfd/tmio.h b/include/linux/mfd/tmio.h
-index baa23464..b22883d6 100644
---- a/include/linux/mfd/tmio.h
-+++ b/include/linux/mfd/tmio.h
-@@ -106,6 +106,7 @@ struct tmio_mmc_data {
- 	struct tmio_mmc_dma		*dma;
- 	struct device			*dev;
- 	unsigned int			cd_gpio;
-+	void (*set_pwr)(struct platform_device *host, int state);
- 	void (*set_clk_div)(struct platform_device *host, int state);
- 	int (*write16_hook)(struct tmio_mmc_host *host, int addr);
- 	/* clock management callbacks */
--- 
-1.8.4.3.gca3854a
-
diff --git a/patches.renesas/0595-ARM-shmobile-update-SDHI-DT-compatibility-string-to-.patch b/patches.renesas/0595-ARM-shmobile-update-SDHI-DT-compatibility-string-to-.patch
deleted file mode 100644
index 4509f3000981b..0000000000000
--- a/patches.renesas/0595-ARM-shmobile-update-SDHI-DT-compatibility-string-to-.patch
+++ /dev/null
@@ -1,173 +0,0 @@
-From 9a0abd69551523478851347de9c18a038357241e Mon Sep 17 00:00:00 2001
-From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
-Date: Thu, 29 Aug 2013 17:14:49 +0200
-Subject: ARM: shmobile: update SDHI DT compatibility string to the
- <unit>-<soc> format
-
-Currently DT compatibility strings of both types can be found in the kernel
-sources: <unit>-<soc> and <soc>-<unit>, whereas a unique format should be
-followed and the former one is preferred. This patch converts the SDHI
-MMC driver and its users to the common standard. This is safe for now, since
-ATM no real products are using this driver with DT.
-
-Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
-Acked-by: Chris Ball <cjb@laptop.org>
-[Removed r8a7740.dtsi portion as it is not applicable]
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-
-(cherry picked from commit df1d0584b2292df5b9d576d7e5246e94616220a1)
-Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
----
- Documentation/devicetree/bindings/mmc/tmio_mmc.txt |   17 ++++++++++-------
- arch/arm/boot/dts/r8a73a4.dtsi                     |    6 +++---
- arch/arm/boot/dts/r8a7790.dtsi                     |    8 ++++----
- arch/arm/boot/dts/sh73a0.dtsi                      |    6 +++---
- drivers/mmc/host/sh_mobile_sdhi.c                  |   16 ++++++++--------
- 5 files changed, 28 insertions(+), 25 deletions(-)
-
---- a/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
-+++ b/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
-@@ -9,12 +9,15 @@ compulsory and any optional properties,
- described in mmc.txt, can be used. Additionally the following tmio_mmc-specific
- optional bindings can be used.
- 
-+Required properties:
-+- compatible:	"renesas,sdhi-shmobile" - a generic sh-mobile SDHI unit
-+		"renesas,sdhi-sh7372" - SDHI IP on SH7372 SoC
-+		"renesas,sdhi-sh73a0" - SDHI IP on SH73A0 SoC
-+		"renesas,sdhi-r8a73a4" - SDHI IP on R8A73A4 SoC
-+		"renesas,sdhi-r8a7740" - SDHI IP on R8A7740 SoC
-+		"renesas,sdhi-r8a7778" - SDHI IP on R8A7778 SoC
-+		"renesas,sdhi-r8a7779" - SDHI IP on R8A7779 SoC
-+		"renesas,sdhi-r8a7790" - SDHI IP on R8A7790 SoC
-+
- Optional properties:
- - toshiba,mmc-wrprotect-disable: write-protect detection is unavailable
--
--When used with Renesas SDHI hardware, the following compatibility strings
--configure various model-specific properties:
--
--"renesas,sh7372-sdhi":	(default) compatible with SH7372
--"renesas,r8a7740-sdhi":	compatible with R8A7740: certain MMC/SD commands have to
--			wait for the interface to become idle.
---- a/arch/arm/boot/dts/r8a73a4.dtsi
-+++ b/arch/arm/boot/dts/r8a73a4.dtsi
-@@ -193,7 +193,7 @@
- 	};
- 
- 	sdhi0: sdhi@ee100000 {
--		compatible = "renesas,r8a73a4-sdhi";
-+		compatible = "renesas,sdhi-r8a73a4";
- 		reg = <0 0xee100000 0 0x100>;
- 		interrupt-parent = <&gic>;
- 		interrupts = <0 165 4>;
-@@ -202,7 +202,7 @@
- 	};
- 
- 	sdhi1: sdhi@ee120000 {
--		compatible = "renesas,r8a73a4-sdhi";
-+		compatible = "renesas,sdhi-r8a73a4";
- 		reg = <0 0xee120000 0 0x100>;
- 		interrupt-parent = <&gic>;
- 		interrupts = <0 166 4>;
-@@ -211,7 +211,7 @@
- 	};
- 
- 	sdhi2: sdhi@ee140000 {
--		compatible = "renesas,r8a73a4-sdhi";
-+		compatible = "renesas,sdhi-r8a73a4";
- 		reg = <0 0xee140000 0 0x100>;
- 		interrupt-parent = <&gic>;
- 		interrupts = <0 167 4>;
---- a/arch/arm/boot/dts/r8a7790.dtsi
-+++ b/arch/arm/boot/dts/r8a7790.dtsi
-@@ -151,7 +151,7 @@
- 	};
- 
- 	sdhi0: sdhi@ee100000 {
--		compatible = "renesas,r8a7790-sdhi";
-+		compatible = "renesas,sdhi-r8a7790";
- 		reg = <0 0xee100000 0 0x100>;
- 		interrupt-parent = <&gic>;
- 		interrupts = <0 165 4>;
-@@ -160,7 +160,7 @@
- 	};
- 
- 	sdhi1: sdhi@ee120000 {
--		compatible = "renesas,r8a7790-sdhi";
-+		compatible = "renesas,sdhi-r8a7790";
- 		reg = <0 0xee120000 0 0x100>;
- 		interrupt-parent = <&gic>;
- 		interrupts = <0 166 4>;
-@@ -169,7 +169,7 @@
- 	};
- 
- 	sdhi2: sdhi@ee140000 {
--		compatible = "renesas,r8a7790-sdhi";
-+		compatible = "renesas,sdhi-r8a7790";
- 		reg = <0 0xee140000 0 0x100>;
- 		interrupt-parent = <&gic>;
- 		interrupts = <0 167 4>;
-@@ -178,7 +178,7 @@
- 	};
- 
- 	sdhi3: sdhi@ee160000 {
--		compatible = "renesas,r8a7790-sdhi";
-+		compatible = "renesas,sdhi-r8a7790";
- 		reg = <0 0xee160000 0 0x100>;
- 		interrupt-parent = <&gic>;
- 		interrupts = <0 168 4>;
---- a/arch/arm/boot/dts/sh73a0.dtsi
-+++ b/arch/arm/boot/dts/sh73a0.dtsi
-@@ -196,7 +196,7 @@
- 	};
- 
- 	sdhi0: sdhi@ee100000 {
--		compatible = "renesas,r8a7740-sdhi";
-+		compatible = "renesas,sdhi-r8a7740";
- 		reg = <0xee100000 0x100>;
- 		interrupt-parent = <&gic>;
- 		interrupts = <0 83 4
-@@ -208,7 +208,7 @@
- 
- 	/* SDHI1 and SDHI2 have no CD pins, no need for CD IRQ */
- 	sdhi1: sdhi@ee120000 {
--		compatible = "renesas,r8a7740-sdhi";
-+		compatible = "renesas,sdhi-r8a7740";
- 		reg = <0xee120000 0x100>;
- 		interrupt-parent = <&gic>;
- 		interrupts = <0 88 4
-@@ -219,7 +219,7 @@
- 	};
- 
- 	sdhi2: sdhi@ee140000 {
--		compatible = "renesas,r8a7740-sdhi";
-+		compatible = "renesas,sdhi-r8a7740";
- 		reg = <0xee140000 0x100>;
- 		interrupt-parent = <&gic>;
- 		interrupts = <0 104 4
---- a/drivers/mmc/host/sh_mobile_sdhi.c
-+++ b/drivers/mmc/host/sh_mobile_sdhi.c
-@@ -113,14 +113,14 @@ static const struct sh_mobile_sdhi_ops s
- };
- 
- static const struct of_device_id sh_mobile_sdhi_of_match[] = {
--	{ .compatible = "renesas,shmobile-sdhi" },
--	{ .compatible = "renesas,sh7372-sdhi" },
--	{ .compatible = "renesas,sh73a0-sdhi", .data = &sh_mobile_sdhi_of_cfg[0], },
--	{ .compatible = "renesas,r8a73a4-sdhi", .data = &sh_mobile_sdhi_of_cfg[0], },
--	{ .compatible = "renesas,r8a7740-sdhi", .data = &sh_mobile_sdhi_of_cfg[0], },
--	{ .compatible = "renesas,r8a7778-sdhi", .data = &sh_mobile_sdhi_of_cfg[0], },
--	{ .compatible = "renesas,r8a7779-sdhi", .data = &sh_mobile_sdhi_of_cfg[0], },
--	{ .compatible = "renesas,r8a7790-sdhi", .data = &sh_mobile_sdhi_of_cfg[0], },
-+	{ .compatible = "renesas,sdhi-shmobile" },
-+	{ .compatible = "renesas,sdhi-sh7372" },
-+	{ .compatible = "renesas,sdhi-sh73a0", .data = &sh_mobile_sdhi_of_cfg[0], },
-+	{ .compatible = "renesas,sdhi-r8a73a4", .data = &sh_mobile_sdhi_of_cfg[0], },
-+	{ .compatible = "renesas,sdhi-r8a7740", .data = &sh_mobile_sdhi_of_cfg[0], },
-+	{ .compatible = "renesas,sdhi-r8a7778", .data = &sh_mobile_sdhi_of_cfg[0], },
-+	{ .compatible = "renesas,sdhi-r8a7779", .data = &sh_mobile_sdhi_of_cfg[0], },
-+	{ .compatible = "renesas,sdhi-r8a7790", .data = &sh_mobile_sdhi_of_cfg[0], },
- 	{},
- };
- MODULE_DEVICE_TABLE(of, sh_mobile_sdhi_of_match);
diff --git a/patches.workqueues/0001-workqueues-Introduce-new-flag-WQ_POWER_EFFICIENT-for.patch b/patches.workqueues/0001-workqueues-Introduce-new-flag-WQ_POWER_EFFICIENT-for.patch
deleted file mode 100644
index 6a1ed1b93eb2f..0000000000000
--- a/patches.workqueues/0001-workqueues-Introduce-new-flag-WQ_POWER_EFFICIENT-for.patch
+++ /dev/null
@@ -1,152 +0,0 @@
-From 61a10f9763d989e6716fe35030951f2ccfca822a Mon Sep 17 00:00:00 2001
-From: Viresh Kumar <viresh.kumar@linaro.org>
-Date: Mon, 8 Apr 2013 16:45:40 +0530
-Subject: workqueues: Introduce new flag WQ_POWER_EFFICIENT for power oriented
- workqueues
-
-Workqueues can be performance or power-oriented. Currently, most workqueues are
-bound to the CPU they were created on. This gives good performance (due to cache
-effects) at the cost of potentially waking up otherwise idle cores (Idle from
-scheduler's perspective. Which may or may not be physically idle) just to
-process some work. To save power, we can allow the work to be rescheduled on a
-core that is already awake.
-
-Workqueues created with the WQ_UNBOUND flag will allow some power savings.
-However, we don't change the default behaviour of the system.  To enable
-power-saving behaviour, a new config option CONFIG_WQ_POWER_EFFICIENT needs to
-be turned on. This option can also be overridden by the
-workqueue.power_efficient boot parameter.
-
-tj: Updated config description and comments.  Renamed
-    CONFIG_WQ_POWER_EFFICIENT to CONFIG_WQ_POWER_EFFICIENT_DEFAULT.
-
-Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
-Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org>
-Signed-off-by: Tejun Heo <tj@kernel.org>
-(cherry picked from commit cee22a15052faa817e3ec8985a28154d3fabc7aa)
-Signed-off-by: Mark Brown <broonie@linaro.org>
----
- Documentation/kernel-parameters.txt |   15 +++++++++++++++
- include/linux/workqueue.h           |   27 +++++++++++++++++++++++++++
- kernel/power/Kconfig                |   20 ++++++++++++++++++++
- kernel/workqueue.c                  |   13 +++++++++++++
- 4 files changed, 75 insertions(+)
-
---- a/Documentation/kernel-parameters.txt
-+++ b/Documentation/kernel-parameters.txt
-@@ -3345,6 +3345,21 @@ bytes respectively. Such letter suffixes
- 			that this also can be controlled per-workqueue for
- 			workqueues visible under /sys/bus/workqueue/.
- 
-+	workqueue.power_efficient
-+			Per-cpu workqueues are generally preferred because
-+			they show better performance thanks to cache
-+			locality; unfortunately, per-cpu workqueues tend to
-+			be more power hungry than unbound workqueues.
-+
-+			Enabling this makes the per-cpu workqueues which
-+			were observed to contribute significantly to power
-+			consumption unbound, leading to measurably lower
-+			power usage at the cost of small performance
-+			overhead.
-+
-+			The default value of this parameter is determined by
-+			the config option CONFIG_WQ_POWER_EFFICIENT_DEFAULT.
-+
- 	x2apic_phys	[X86-64,APIC] Use x2apic physical mode instead of
- 			default x2apic cluster mode on platforms
- 			supporting x2apic.
---- a/include/linux/workqueue.h
-+++ b/include/linux/workqueue.h
-@@ -303,6 +303,33 @@ enum {
- 	WQ_CPU_INTENSIVE	= 1 << 5, /* cpu instensive workqueue */
- 	WQ_SYSFS		= 1 << 6, /* visible in sysfs, see wq_sysfs_register() */
- 
-+	/*
-+	 * Per-cpu workqueues are generally preferred because they tend to
-+	 * show better performance thanks to cache locality.  Per-cpu
-+	 * workqueues exclude the scheduler from choosing the CPU to
-+	 * execute the worker threads, which has an unfortunate side effect
-+	 * of increasing power consumption.
-+	 *
-+	 * The scheduler considers a CPU idle if it doesn't have any task
-+	 * to execute and tries to keep idle cores idle to conserve power;
-+	 * however, for example, a per-cpu work item scheduled from an
-+	 * interrupt handler on an idle CPU will force the scheduler to
-+	 * excute the work item on that CPU breaking the idleness, which in
-+	 * turn may lead to more scheduling choices which are sub-optimal
-+	 * in terms of power consumption.
-+	 *
-+	 * Workqueues marked with WQ_POWER_EFFICIENT are per-cpu by default
-+	 * but become unbound if workqueue.power_efficient kernel param is
-+	 * specified.  Per-cpu workqueues which are identified to
-+	 * contribute significantly to power-consumption are identified and
-+	 * marked with this flag and enabling the power_efficient mode
-+	 * leads to noticeable power saving at the cost of small
-+	 * performance disadvantage.
-+	 *
-+	 * http://thread.gmane.org/gmane.linux.kernel/1480396
-+	 */
-+	WQ_POWER_EFFICIENT	= 1 << 7,
-+
- 	__WQ_DRAINING		= 1 << 16, /* internal: workqueue is draining */
- 	__WQ_ORDERED		= 1 << 17, /* internal: workqueue is ordered */
- 
---- a/kernel/power/Kconfig
-+++ b/kernel/power/Kconfig
-@@ -263,6 +263,26 @@ config PM_GENERIC_DOMAINS
- 	bool
- 	depends on PM
- 
-+config WQ_POWER_EFFICIENT_DEFAULT
-+	bool "Enable workqueue power-efficient mode by default"
-+	depends on PM
-+	default n
-+	help
-+	  Per-cpu workqueues are generally preferred because they show
-+	  better performance thanks to cache locality; unfortunately,
-+	  per-cpu workqueues tend to be more power hungry than unbound
-+	  workqueues.
-+
-+	  Enabling workqueue.power_efficient kernel parameter makes the
-+	  per-cpu workqueues which were observed to contribute
-+	  significantly to power consumption unbound, leading to measurably
-+	  lower power usage at the cost of small performance overhead.
-+
-+	  This config option determines whether workqueue.power_efficient
-+	  is enabled by default.
-+
-+	  If in doubt, say N.
-+
- config PM_GENERIC_DOMAINS_SLEEP
- 	def_bool y
- 	depends on PM_SLEEP && PM_GENERIC_DOMAINS
---- a/kernel/workqueue.c
-+++ b/kernel/workqueue.c
-@@ -272,6 +272,15 @@ static cpumask_var_t *wq_numa_possible_c
- static bool wq_disable_numa;
- module_param_named(disable_numa, wq_disable_numa, bool, 0444);
- 
-+/* see the comment above the definition of WQ_POWER_EFFICIENT */
-+#ifdef CONFIG_WQ_POWER_EFFICIENT_DEFAULT
-+static bool wq_power_efficient = true;
-+#else
-+static bool wq_power_efficient;
-+#endif
-+
-+module_param_named(power_efficient, wq_power_efficient, bool, 0444);
-+
- static bool wq_numa_enabled;		/* unbound NUMA affinity enabled */
- 
- /* buf for wq_update_unbound_numa_attrs(), protected by CPU hotplug exclusion */
-@@ -4117,6 +4126,10 @@ struct workqueue_struct *__alloc_workque
- 	struct workqueue_struct *wq;
- 	struct pool_workqueue *pwq;
- 
-+	/* see the comment above the definition of WQ_POWER_EFFICIENT */
-+	if ((flags & WQ_POWER_EFFICIENT) && wq_power_efficient)
-+		flags |= WQ_UNBOUND;
-+
- 	/* allocate wq and format name */
- 	if (flags & WQ_UNBOUND)
- 		tbl_size = wq_numa_tbl_len * sizeof(wq->numa_pwq_tbl[0]);
diff --git a/patches.workqueues/0002-workqueue-Add-system-wide-power_efficient-workqueues.patch b/patches.workqueues/0002-workqueue-Add-system-wide-power_efficient-workqueues.patch
deleted file mode 100644
index 8af7d85373619..0000000000000
--- a/patches.workqueues/0002-workqueue-Add-system-wide-power_efficient-workqueues.patch
+++ /dev/null
@@ -1,72 +0,0 @@
-From 7399c448c57c930a065e0ab77870ab84dc0dbf61 Mon Sep 17 00:00:00 2001
-From: Viresh Kumar <viresh.kumar@linaro.org>
-Date: Wed, 24 Apr 2013 17:12:54 +0530
-Subject: workqueue: Add system wide power_efficient workqueues
-
-This patch adds system wide workqueues aligned towards power saving. This is
-done by allocating them with WQ_UNBOUND flag if 'wq_power_efficient' is set to
-'true'.
-
-tj: updated comments a bit.
-
-Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
-Signed-off-by: Tejun Heo <tj@kernel.org>
-(cherry picked from commit 0668106ca3865ba945e155097fb042bf66d364d3)
-Signed-off-by: Mark Brown <broonie@linaro.org>
----
- include/linux/workqueue.h |    8 ++++++++
- kernel/workqueue.c        |   13 ++++++++++++-
- 2 files changed, 20 insertions(+), 1 deletion(-)
-
---- a/include/linux/workqueue.h
-+++ b/include/linux/workqueue.h
-@@ -360,11 +360,19 @@ enum {
-  *
-  * system_freezable_wq is equivalent to system_wq except that it's
-  * freezable.
-+ *
-+ * *_power_efficient_wq are inclined towards saving power and converted
-+ * into WQ_UNBOUND variants if 'wq_power_efficient' is enabled; otherwise,
-+ * they are same as their non-power-efficient counterparts - e.g.
-+ * system_power_efficient_wq is identical to system_wq if
-+ * 'wq_power_efficient' is disabled.  See WQ_POWER_EFFICIENT for more info.
-  */
- extern struct workqueue_struct *system_wq;
- extern struct workqueue_struct *system_long_wq;
- extern struct workqueue_struct *system_unbound_wq;
- extern struct workqueue_struct *system_freezable_wq;
-+extern struct workqueue_struct *system_power_efficient_wq;
-+extern struct workqueue_struct *system_freezable_power_efficient_wq;
- 
- static inline struct workqueue_struct * __deprecated __system_nrt_wq(void)
- {
---- a/kernel/workqueue.c
-+++ b/kernel/workqueue.c
-@@ -317,6 +317,10 @@ struct workqueue_struct *system_unbound_
- EXPORT_SYMBOL_GPL(system_unbound_wq);
- struct workqueue_struct *system_freezable_wq __read_mostly;
- EXPORT_SYMBOL_GPL(system_freezable_wq);
-+struct workqueue_struct *system_power_efficient_wq __read_mostly;
-+EXPORT_SYMBOL_GPL(system_power_efficient_wq);
-+struct workqueue_struct *system_freezable_power_efficient_wq __read_mostly;
-+EXPORT_SYMBOL_GPL(system_freezable_power_efficient_wq);
- 
- static int worker_thread(void *__worker);
- static void copy_workqueue_attrs(struct workqueue_attrs *to,
-@@ -5039,8 +5043,15 @@ static int __init init_workqueues(void)
- 					    WQ_UNBOUND_MAX_ACTIVE);
- 	system_freezable_wq = alloc_workqueue("events_freezable",
- 					      WQ_FREEZABLE, 0);
-+	system_power_efficient_wq = alloc_workqueue("events_power_efficient",
-+					      WQ_POWER_EFFICIENT, 0);
-+	system_freezable_power_efficient_wq = alloc_workqueue("events_freezable_power_efficient",
-+					      WQ_FREEZABLE | WQ_POWER_EFFICIENT,
-+					      0);
- 	BUG_ON(!system_wq || !system_highpri_wq || !system_long_wq ||
--	       !system_unbound_wq || !system_freezable_wq);
-+	       !system_unbound_wq || !system_freezable_wq ||
-+	       !system_power_efficient_wq ||
-+	       !system_freezable_power_efficient_wq);
- 	return 0;
- }
- early_initcall(init_workqueues);
diff --git a/patches.workqueues/0003-PHYLIB-queue-work-on-system_power_efficient_wq.patch b/patches.workqueues/0003-PHYLIB-queue-work-on-system_power_efficient_wq.patch
deleted file mode 100644
index 0db668bce346f..0000000000000
--- a/patches.workqueues/0003-PHYLIB-queue-work-on-system_power_efficient_wq.patch
+++ /dev/null
@@ -1,64 +0,0 @@
-From bbe9f36ad93d3404e4c99509f6d13aed67fce02e Mon Sep 17 00:00:00 2001
-From: Viresh Kumar <viresh.kumar@linaro.org>
-Date: Wed, 24 Apr 2013 17:12:55 +0530
-Subject: PHYLIB: queue work on system_power_efficient_wq
-
-Phylib uses workqueues for multiple purposes. There is no real dependency of
-scheduling these on the cpu which scheduled them.
-
-On a idle system, it is observed that and idle cpu wakes up many times just to
-service this work. It would be better if we can schedule it on a cpu which the
-scheduler believes to be the most appropriate one.
-
-This patch replaces system_wq with system_power_efficient_wq for PHYLIB.
-
-Cc: David S. Miller <davem@davemloft.net>
-Cc: netdev@vger.kernel.org
-Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
-Acked-by: David S. Miller <davem@davemloft.net>
-Signed-off-by: Tejun Heo <tj@kernel.org>
-(cherry picked from commit bbb47bdeae756f04b896b55b51f230f3eb21f207)
-Signed-off-by: Mark Brown <broonie@linaro.org>
----
- drivers/net/phy/phy.c |    9 +++++----
- 1 file changed, 5 insertions(+), 4 deletions(-)
-
---- a/drivers/net/phy/phy.c
-+++ b/drivers/net/phy/phy.c
-@@ -439,7 +439,7 @@ void phy_start_machine(struct phy_device
- {
- 	phydev->adjust_state = handler;
- 
--	schedule_delayed_work(&phydev->state_queue, HZ);
-+	queue_delayed_work(system_power_efficient_wq, &phydev->state_queue, HZ);
- }
- 
- /**
-@@ -500,7 +500,7 @@ static irqreturn_t phy_interrupt(int irq
- 	disable_irq_nosync(irq);
- 	atomic_inc(&phydev->irq_disable);
- 
--	schedule_work(&phydev->phy_queue);
-+	queue_work(system_power_efficient_wq, &phydev->phy_queue);
- 
- 	return IRQ_HANDLED;
- }
-@@ -655,7 +655,7 @@ static void phy_change(struct work_struc
- 
- 	/* reschedule state queue work to run as soon as possible */
- 	cancel_delayed_work_sync(&phydev->state_queue);
--	schedule_delayed_work(&phydev->state_queue, 0);
-+	queue_delayed_work(system_power_efficient_wq, &phydev->state_queue, 0);
- 
- 	return;
- 
-@@ -918,7 +918,8 @@ void phy_state_machine(struct work_struc
- 	if (err < 0)
- 		phy_error(phydev);
- 
--	schedule_delayed_work(&phydev->state_queue, PHY_STATE_TIME * HZ);
-+	queue_delayed_work(system_power_efficient_wq, &phydev->state_queue,
-+			PHY_STATE_TIME * HZ);
- }
- 
- static inline void mmd_phy_indirect(struct mii_bus *bus, int prtad, int devad,
diff --git a/patches.workqueues/0004-block-queue-work-on-power-efficient-wq.patch b/patches.workqueues/0004-block-queue-work-on-power-efficient-wq.patch
deleted file mode 100644
index 4fa9c4ea1fb69..0000000000000
--- a/patches.workqueues/0004-block-queue-work-on-power-efficient-wq.patch
+++ /dev/null
@@ -1,85 +0,0 @@
-From 4d5c9ea3313e410686855496f556d90e589ed2e2 Mon Sep 17 00:00:00 2001
-From: Viresh Kumar <viresh.kumar@linaro.org>
-Date: Wed, 24 Apr 2013 17:12:56 +0530
-Subject: block: queue work on power efficient wq
-
-Block layer uses workqueues for multiple purposes. There is no real dependency
-of scheduling these on the cpu which scheduled them.
-
-On a idle system, it is observed that and idle cpu wakes up many times just to
-service this work. It would be better if we can schedule it on a cpu which the
-scheduler believes to be the most appropriate one.
-
-This patch replaces normal workqueues with power efficient versions.
-
-Cc: Jens Axboe <axboe@kernel.dk>
-Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
-Signed-off-by: Tejun Heo <tj@kernel.org>
-(cherry picked from commit 695588f9454bdbc7c1a2fbb8a6bfdcfba6183348)
-Signed-off-by: Mark Brown <broonie@linaro.org>
----
- block/blk-core.c |    3 ++-
- block/blk-ioc.c  |    3 ++-
- block/genhd.c    |   12 ++++++++----
- 3 files changed, 12 insertions(+), 6 deletions(-)
-
---- a/block/blk-core.c
-+++ b/block/blk-core.c
-@@ -3191,7 +3191,8 @@ int __init blk_dev_init(void)
- 
- 	/* used for unplugging and affects IO latency/throughput - HIGHPRI */
- 	kblockd_workqueue = alloc_workqueue("kblockd",
--					    WQ_MEM_RECLAIM | WQ_HIGHPRI, 0);
-+					    WQ_MEM_RECLAIM | WQ_HIGHPRI |
-+					    WQ_POWER_EFFICIENT, 0);
- 	if (!kblockd_workqueue)
- 		panic("Failed to create kblockd\n");
- 
---- a/block/blk-ioc.c
-+++ b/block/blk-ioc.c
-@@ -144,7 +144,8 @@ void put_io_context(struct io_context *i
- 	if (atomic_long_dec_and_test(&ioc->refcount)) {
- 		spin_lock_irqsave(&ioc->lock, flags);
- 		if (!hlist_empty(&ioc->icq_list))
--			schedule_work(&ioc->release_work);
-+			queue_work(system_power_efficient_wq,
-+					&ioc->release_work);
- 		else
- 			free_ioc = true;
- 		spin_unlock_irqrestore(&ioc->lock, flags);
---- a/block/genhd.c
-+++ b/block/genhd.c
-@@ -1489,9 +1489,11 @@ static void __disk_unblock_events(struct
- 	intv = disk_events_poll_jiffies(disk);
- 	set_timer_slack(&ev->dwork.timer, intv / 4);
- 	if (check_now)
--		queue_delayed_work(system_freezable_wq, &ev->dwork, 0);
-+		queue_delayed_work(system_freezable_power_efficient_wq,
-+				&ev->dwork, 0);
- 	else if (intv)
--		queue_delayed_work(system_freezable_wq, &ev->dwork, intv);
-+		queue_delayed_work(system_freezable_power_efficient_wq,
-+				&ev->dwork, intv);
- out_unlock:
- 	spin_unlock_irqrestore(&ev->lock, flags);
- }
-@@ -1534,7 +1536,8 @@ void disk_flush_events(struct gendisk *d
- 	spin_lock_irq(&ev->lock);
- 	ev->clearing |= mask;
- 	if (!ev->block)
--		mod_delayed_work(system_freezable_wq, &ev->dwork, 0);
-+		mod_delayed_work(system_freezable_power_efficient_wq,
-+				&ev->dwork, 0);
- 	spin_unlock_irq(&ev->lock);
- }
- 
-@@ -1627,7 +1630,8 @@ static void disk_check_events(struct dis
- 
- 	intv = disk_events_poll_jiffies(disk);
- 	if (!ev->block && intv)
--		queue_delayed_work(system_freezable_wq, &ev->dwork, intv);
-+		queue_delayed_work(system_freezable_power_efficient_wq,
-+				&ev->dwork, intv);
- 
- 	spin_unlock_irq(&ev->lock);
- 
diff --git a/patches.workqueues/0005-fbcon-queue-work-on-power-efficient-wq.patch b/patches.workqueues/0005-fbcon-queue-work-on-power-efficient-wq.patch
deleted file mode 100644
index 17f469e80f7de..0000000000000
--- a/patches.workqueues/0005-fbcon-queue-work-on-power-efficient-wq.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From 3e9dc2afddfc1d76719f84ab5ea6b37e0fff5c46 Mon Sep 17 00:00:00 2001
-From: Viresh Kumar <viresh.kumar@linaro.org>
-Date: Wed, 24 Apr 2013 17:12:57 +0530
-Subject: fbcon: queue work on power efficient wq
-
-fbcon uses workqueues and it has no real dependency of scheduling these on the
-cpu which scheduled them.
-
-On a idle system, it is observed that and idle cpu wakes up many times just to
-service this work. It would be better if we can schedule it on a cpu which the
-scheduler believes to be the most appropriate one.
-
-This patch replaces system_wq with system_power_efficient_wq.
-
-Cc: Dave Airlie <airlied@redhat.com>
-Cc: linux-fbdev@vger.kernel.org
-Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
-Signed-off-by: Tejun Heo <tj@kernel.org>
-(cherry picked from commit a85f1a41f020bc2c97611060bcfae6f48a1db28d)
-Signed-off-by: Mark Brown <broonie@linaro.org>
----
- drivers/video/console/fbcon.c |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/video/console/fbcon.c
-+++ b/drivers/video/console/fbcon.c
-@@ -404,7 +404,7 @@ static void cursor_timer_handler(unsigne
- 	struct fb_info *info = (struct fb_info *) dev_addr;
- 	struct fbcon_ops *ops = info->fbcon_par;
- 
--	schedule_work(&info->queue);
-+	queue_work(system_power_efficient_wq, &info->queue);
- 	mod_timer(&ops->cursor_timer, jiffies + HZ/5);
- }
- 
diff --git a/patches.workqueues/0006-ASoC-pcm-Use-the-power-efficient-workqueue-for-delay.patch b/patches.workqueues/0006-ASoC-pcm-Use-the-power-efficient-workqueue-for-delay.patch
deleted file mode 100644
index 07e0a7664de53..0000000000000
--- a/patches.workqueues/0006-ASoC-pcm-Use-the-power-efficient-workqueue-for-delay.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From 605791a1741b2a9055e60b9fb59e3d3e679e40d2 Mon Sep 17 00:00:00 2001
-From: Mark Brown <broonie@linaro.org>
-Date: Thu, 18 Jul 2013 11:52:17 +0100
-Subject: ASoC: pcm: Use the power efficient workqueue for delayed powerdown
-
-There is no need to use a normal per-CPU workqueue for delayed power downs
-as they're not timing or performance critical and waking up a core for them
-would defeat some of the point.
-
-Signed-off-by: Mark Brown <broonie@linaro.org>
-Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org>
-(cherry picked from commit d4e1a73acd4e894f8332f2093bceaef585cfab67)
----
- sound/soc/soc-pcm.c |    5 +++--
- 1 file changed, 3 insertions(+), 2 deletions(-)
-
---- a/sound/soc/soc-pcm.c
-+++ b/sound/soc/soc-pcm.c
-@@ -408,8 +408,9 @@ static int soc_pcm_close(struct snd_pcm_
- 		} else {
- 			/* start delayed pop wq here for playback streams */
- 			rtd->pop_wait = 1;
--			schedule_delayed_work(&rtd->delayed_work,
--				msecs_to_jiffies(rtd->pmdown_time));
-+			queue_delayed_work(system_power_efficient_wq,
-+					   &rtd->delayed_work,
-+					   msecs_to_jiffies(rtd->pmdown_time));
- 		}
- 	} else {
- 		/* capture streams can be powered down now */
diff --git a/patches.workqueues/0007-regulator-core-Use-the-power-efficient-workqueue-for.patch b/patches.workqueues/0007-regulator-core-Use-the-power-efficient-workqueue-for.patch
deleted file mode 100644
index 3774c99d2c60c..0000000000000
--- a/patches.workqueues/0007-regulator-core-Use-the-power-efficient-workqueue-for.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From fbcfea7d98897a48ac8cc6b6cf7eb597a6946669 Mon Sep 17 00:00:00 2001
-From: Mark Brown <broonie@linaro.org>
-Date: Thu, 18 Jul 2013 11:52:04 +0100
-Subject: regulator: core: Use the power efficient workqueue for delayed
- powerdown
-
-There is no need to use a normal per-CPU workqueue for delayed power downs
-as they're not timing or performance critical and waking up a core for them
-would defeat some of the point.
-
-Signed-off-by: Mark Brown <broonie@linaro.org>
-Reviewed-by: Viresh Kumar <viresh.kumar@linaro.org>
-Acked-by: Liam Girdwood <liam.r.girdwood@intel.com>
-(cherry picked from commit 070260f07c7daec311f2466eb9d1df475d5a46f8)
----
- drivers/regulator/core.c |    5 +++--
- 1 file changed, 3 insertions(+), 2 deletions(-)
-
---- a/drivers/regulator/core.c
-+++ b/drivers/regulator/core.c
-@@ -1890,8 +1890,9 @@ int regulator_disable_deferred(struct re
- 	rdev->deferred_disables++;
- 	mutex_unlock(&rdev->mutex);
- 
--	ret = schedule_delayed_work(&rdev->disable_work,
--				    msecs_to_jiffies(ms));
-+	ret = queue_delayed_work(system_power_efficient_wq,
-+				 &rdev->disable_work,
-+				 msecs_to_jiffies(ms));
- 	if (ret < 0)
- 		return ret;
- 	else
diff --git a/patches.workqueues/0008-ASoC-jack-Use-power-efficient-workqueue.patch b/patches.workqueues/0008-ASoC-jack-Use-power-efficient-workqueue.patch
deleted file mode 100644
index 2b826274ab362..0000000000000
--- a/patches.workqueues/0008-ASoC-jack-Use-power-efficient-workqueue.patch
+++ /dev/null
@@ -1,27 +0,0 @@
-From 98fe237d868087d7108fde3da27fcbb531d25ca9 Mon Sep 17 00:00:00 2001
-From: Mark Brown <broonie@linaro.org>
-Date: Thu, 18 Jul 2013 22:47:10 +0100
-Subject: ASoC: jack: Use power efficient workqueue
-
-The accessory detect debounce work is not performance sensitive so let
-the scheduler run it wherever is most efficient rather than in a per CPU
-workqueue by using the system power efficient workqueue.
-
-Signed-off-by: Mark Brown <broonie@linaro.org>
-Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
-(cherry picked from commit e6058aaadcd473e5827720dc143af56aabbeecc7)
----
- sound/soc/soc-jack.c |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/sound/soc/soc-jack.c
-+++ b/sound/soc/soc-jack.c
-@@ -263,7 +263,7 @@ static irqreturn_t gpio_handler(int irq,
- 	if (device_may_wakeup(dev))
- 		pm_wakeup_event(dev, gpio->debounce_time + 50);
- 
--	schedule_delayed_work(&gpio->work,
-+	queue_delayed_work(system_power_efficient_wq, &gpio->work,
- 			      msecs_to_jiffies(gpio->debounce_time));
- 
- 	return IRQ_HANDLED;
diff --git a/patches.workqueues/0009-extcon-gpio-Use-power-efficient-workqueue-for-deboun.patch b/patches.workqueues/0009-extcon-gpio-Use-power-efficient-workqueue-for-deboun.patch
deleted file mode 100644
index 49b59b6c4d4ca..0000000000000
--- a/patches.workqueues/0009-extcon-gpio-Use-power-efficient-workqueue-for-deboun.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From d3a177c71852d2eac42c74a6b2cb7af242061d21 Mon Sep 17 00:00:00 2001
-From: Mark Brown <broonie@linaro.org>
-Date: Fri, 19 Jul 2013 18:47:34 +0100
-Subject: extcon: gpio: Use power efficient workqueue for debounce
-
-The debounce timeout is generally quite long and the work not performance
-critical so allow the scheduler to run the work anywhere rather than in
-the normal per-CPU workqueue.
-
-Signed-off-by: Mark Brown <broonie@linaro.org>
-Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
-Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
-Signed-off-by: Myungjoo Ham <myungjoo.ham@samsung.com>
-(cherry picked from commit d0db2e7ae788d84ff6d0a1cd4dc935282db29073)
----
- drivers/extcon/extcon-gpio.c |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/extcon/extcon-gpio.c
-+++ b/drivers/extcon/extcon-gpio.c
-@@ -56,7 +56,7 @@ static irqreturn_t gpio_irq_handler(int
- {
- 	struct gpio_extcon_data *extcon_data = dev_id;
- 
--	schedule_delayed_work(&extcon_data->work,
-+	queue_delayed_work(system_power_efficient_wq, &extcon_data->work,
- 			      extcon_data->debounce_jiffies);
- 	return IRQ_HANDLED;
- }
diff --git a/patches.workqueues/0010-extcon-adc-jack-Use-power-efficient-workqueue.patch b/patches.workqueues/0010-extcon-adc-jack-Use-power-efficient-workqueue.patch
deleted file mode 100644
index f2d34b3977813..0000000000000
--- a/patches.workqueues/0010-extcon-adc-jack-Use-power-efficient-workqueue.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From df08b04c9a3f2925e34f778bf20d37623635c306 Mon Sep 17 00:00:00 2001
-From: Mark Brown <broonie@linaro.org>
-Date: Fri, 19 Jul 2013 18:47:35 +0100
-Subject: extcon: adc-jack: Use power efficient workqueue
-
-The debounce timeout is generally quite long and the work not performance
-critical so allow the scheduler to run the work anywhere rather than in
-the normal per-CPU workqueue.
-
-Signed-off-by: Mark Brown <broonie@linaro.org>
-Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
-Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
-Signed-off-by: Myungjoo Ham <myungjoo.ham@samsung.com>
-(cherry picked from commit 1a82e81e0ede6955684397ffbc0964191ef13cba)
----
- drivers/extcon/extcon-adc-jack.c |    3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
---- a/drivers/extcon/extcon-adc-jack.c
-+++ b/drivers/extcon/extcon-adc-jack.c
-@@ -87,7 +87,8 @@ static irqreturn_t adc_jack_irq_thread(i
- {
- 	struct adc_jack_data *data = _data;
- 
--	schedule_delayed_work(&data->handler, data->handling_delay);
-+	queue_delayed_work(system_power_efficient_wq,
-+			   &data->handler, data->handling_delay);
- 	return IRQ_HANDLED;
- }
- 
diff --git a/patches.workqueues/0011-ASoC-compress-Use-power-efficient-workqueue.patch b/patches.workqueues/0011-ASoC-compress-Use-power-efficient-workqueue.patch
deleted file mode 100644
index 0d678f6f20062..0000000000000
--- a/patches.workqueues/0011-ASoC-compress-Use-power-efficient-workqueue.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From 03bc67f592760de5b16a48cb07ca02ecedf5fa11 Mon Sep 17 00:00:00 2001
-From: Mark Brown <broonie@linaro.org>
-Date: Fri, 9 Aug 2013 18:12:29 +0100
-Subject: ASoC: compress: Use power efficient workqueue
-
-There is no need for the power down work to be done on a per CPU workqueue
-especially considering the fairly long delay before powerdown.
-
-Signed-off-by: Mark Brown <broonie@linaro.org>
-Acked-by: Vinod Koul <vinod.koul@intel.com>
-(cherry picked from commit 3d24cfe485e2750cc209a77dd62fa1fe004fc6c7)
----
- sound/soc/soc-compress.c |    5 +++--
- 1 file changed, 3 insertions(+), 2 deletions(-)
-
---- a/sound/soc/soc-compress.c
-+++ b/sound/soc/soc-compress.c
-@@ -149,8 +149,9 @@ static int soc_compr_free(struct snd_com
- 					SND_SOC_DAPM_STREAM_STOP);
- 		} else {
- 			rtd->pop_wait = 1;
--			schedule_delayed_work(&rtd->delayed_work,
--				msecs_to_jiffies(rtd->pmdown_time));
-+			queue_delayed_work(system_power_efficient_wq,
-+					   &rtd->delayed_work,
-+					   msecs_to_jiffies(rtd->pmdown_time));
- 		}
- 	} else {
- 		/* capture streams can be powered down now */
diff --git a/patches.zynq/0001-ARM-zynq-Remove-init_irq-declaration-in-machine-desc.patch b/patches.zynq/0001-ARM-zynq-Remove-init_irq-declaration-in-machine-desc.patch
deleted file mode 100644
index 27cd187239fb5..0000000000000
--- a/patches.zynq/0001-ARM-zynq-Remove-init_irq-declaration-in-machine-desc.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-From 3126ef4e090161d7a9dfcde771a5819ca050232e Mon Sep 17 00:00:00 2001
-From: Maxime Ripard <maxime.ripard@free-electrons.com>
-Date: Tue, 14 May 2013 17:38:35 +0200
-Subject: ARM: zynq: Remove init_irq declaration in machine description
-
-Commit ebafed7a ("ARM: irq: Call irqchip_init if no init_irq function is
-specified") removed the need to explictly setup the init_irq field in
-the machine description when using only irqchip_init. Remove that
-declaration for zynq as well.
-
-Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-Acked-by: Michal Simek <monstr@monstr.eu>
-Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-(cherry picked from commit 7ac161c43506f60b07684bc8a98eeb50d8e8664c)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- arch/arm/mach-zynq/common.c | 2 --
- 1 file changed, 2 deletions(-)
-
-diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c
-index 5bfe7035b73d..4c0199b88a04 100644
---- a/arch/arm/mach-zynq/common.c
-+++ b/arch/arm/mach-zynq/common.c
-@@ -25,7 +25,6 @@
- #include <linux/of_irq.h>
- #include <linux/of_platform.h>
- #include <linux/of.h>
--#include <linux/irqchip.h>
- 
- #include <asm/mach/arch.h>
- #include <asm/mach/map.h>
-@@ -106,7 +105,6 @@ static const char * const zynq_dt_match[] = {
- MACHINE_START(XILINX_EP107, "Xilinx Zynq Platform")
- 	.smp		= smp_ops(zynq_smp_ops),
- 	.map_io		= zynq_map_io,
--	.init_irq	= irqchip_init,
- 	.init_machine	= zynq_init_machine,
- 	.init_time	= zynq_timer_init,
- 	.dt_compat	= zynq_dt_match,
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0001-i2c-xilinx-merge-i2c-driver-from-Xilinx-repository-i.patch b/patches.zynq/0001-i2c-xilinx-merge-i2c-driver-from-Xilinx-repository-i.patch
deleted file mode 100644
index bc5213ae582e8..0000000000000
--- a/patches.zynq/0001-i2c-xilinx-merge-i2c-driver-from-Xilinx-repository-i.patch
+++ /dev/null
@@ -1,1012 +0,0 @@
-From b23b4c001f284dba44b70ba7d2d88b0f9b7d5c71 Mon Sep 17 00:00:00 2001
-From: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Date: Fri, 20 Dec 2013 15:57:55 +0900
-Subject: i2c: xilinx: merge i2c driver from Xilinx repository into LTSI
-
-This merges i2c functionality from Xilinx repository (commit
-efc27505715e64526653f35274717c0fc56491e3 in master branch). It has
-been tested to read the eeprom on a zc702 board.
-
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/i2c/busses/Kconfig         |    9 
- drivers/i2c/busses/Makefile        |    1 
- drivers/i2c/busses/i2c-xilinx_ps.c |  963 +++++++++++++++++++++++++++++++++++++
- 3 files changed, 973 insertions(+)
- create mode 100644 drivers/i2c/busses/i2c-xilinx_ps.c
-
---- a/drivers/i2c/busses/Kconfig
-+++ b/drivers/i2c/busses/Kconfig
-@@ -737,6 +737,15 @@ config I2C_WMT
- 	  This driver can also be built as a module. If so, the module will be
- 	  called i2c-wmt.
- 
-+config I2C_XILINX_PS
-+	tristate "XILINX PS I2C Controller"
-+	depends on ARCH_ZYNQ
-+	help
-+	  Say yes here to select Xilnx PS I2C Host Controller
-+
-+	  This driver can also be built as a module.  If so, the module
-+	  will be called i2c-xilinx_ps.
-+
- config I2C_OCTEON
- 	tristate "Cavium OCTEON I2C bus support"
- 	depends on CPU_CAVIUM_OCTEON
---- a/drivers/i2c/busses/Makefile
-+++ b/drivers/i2c/busses/Makefile
-@@ -72,6 +72,7 @@ obj-$(CONFIG_I2C_STU300)	+= i2c-stu300.o
- obj-$(CONFIG_I2C_TEGRA)		+= i2c-tegra.o
- obj-$(CONFIG_I2C_VERSATILE)	+= i2c-versatile.o
- obj-$(CONFIG_I2C_WMT)		+= i2c-wmt.o
-+obj-$(CONFIG_I2C_XILINX_PS)	+= i2c-xilinx_ps.o
- obj-$(CONFIG_I2C_OCTEON)	+= i2c-octeon.o
- obj-$(CONFIG_I2C_XILINX)	+= i2c-xiic.o
- obj-$(CONFIG_I2C_XLR)		+= i2c-xlr.o
---- /dev/null
-+++ b/drivers/i2c/busses/i2c-xilinx_ps.c
-@@ -0,0 +1,963 @@
-+/*
-+ * Xilinx I2C bus driver for the PS I2C Interfaces.
-+ *
-+ * 2009-2011 (c) Xilinx, Inc.
-+ *
-+ * This program is free software; you can redistribute it
-+ * and/or modify it under the terms of the GNU General Public
-+ * License as published by the Free Software Foundation;
-+ * either version 2 of the License, or (at your option) any
-+ * later version.
-+ *
-+ * You should have received a copy of the GNU General Public
-+ * License along with this program; if not, write to the Free
-+ * Software Foundation, Inc., 675 Mass Ave, Cambridge, MA
-+ * 02139, USA.
-+ *
-+ *
-+ * Workaround in Receive Mode
-+ *	If there is only one message to be processed, then based on length of
-+ *	the message we set the HOLD bit.
-+ *	If the length is less than the FIFO depth, then we will directly
-+ *	receive a COMP interrupt and the transaction is done.
-+ *	If the length is more than the FIFO depth, then we enable the HOLD bit.
-+ *	if the requested data is greater than the  max transfer size(252 bytes)
-+ *	update the transfer size register with max transfer size else update
-+ *	with the requested size.
-+ *	We will receive the DATA interrupt, if the transfer size register value
-+ *	is zero then repeat the above step for the remaining bytes (if any) and
-+ *	process the data in the fifo.
-+ *
-+ *	The bus hold flag logic provides support for repeated start.
-+ *
-+ */
-+
-+#include <linux/clk.h>
-+#include <linux/delay.h>
-+#include <linux/err.h>
-+#include <linux/export.h>
-+#include <linux/i2c.h>
-+#include <linux/interrupt.h>
-+#include <linux/io.h>
-+#include <linux/module.h>
-+#include <linux/platform_device.h>
-+#include <linux/slab.h>
-+
-+/*
-+ * Register Map
-+ * Register offsets for the I2C device.
-+ */
-+#define XI2CPS_CR_OFFSET	0x00 /* Control Register, RW */
-+#define XI2CPS_SR_OFFSET	0x04 /* Status Register, RO */
-+#define XI2CPS_ADDR_OFFSET	0x08 /* I2C Address Register, RW */
-+#define XI2CPS_DATA_OFFSET	0x0C /* I2C Data Register, RW */
-+#define XI2CPS_ISR_OFFSET	0x10 /* Interrupt Status Register, RW */
-+#define XI2CPS_XFER_SIZE_OFFSET 0x14 /* Transfer Size Register, RW */
-+#define XI2CPS_SLV_PAUSE_OFFSET 0x18 /* Slave monitor pause Register, RW */
-+#define XI2CPS_TIME_OUT_OFFSET	0x1C /* Time Out Register, RW */
-+#define XI2CPS_IMR_OFFSET	0x20 /* Interrupt Mask Register, RO */
-+#define XI2CPS_IER_OFFSET	0x24 /* Interrupt Enable Register, WO */
-+#define XI2CPS_IDR_OFFSET	0x28 /* Interrupt Disable Register, WO */
-+
-+/*
-+ * Control Register Bit mask definitions
-+ * This register contains various control bits that affect the operation of the
-+ * I2C controller.
-+ */
-+#define XI2CPS_CR_HOLD_BUS_MASK 0x00000010 /* Hold Bus bit */
-+#define XI2CPS_CR_RW_MASK	0x00000001 /* Read or Write Master transfer
-+					    * 0= Transmitter, 1= Receiver */
-+#define XI2CPS_CR_CLR_FIFO_MASK 0x00000040 /* 1 = Auto init FIFO to zeroes */
-+
-+/*
-+ * I2C Address Register Bit mask definitions
-+ * Normal addressing mode uses [6:0] bits. Extended addressing mode uses [9:0]
-+ * bits. A write access to this register always initiates a transfer if the I2C
-+ * is in master mode.
-+ */
-+#define XI2CPS_ADDR_MASK	0x000003FF /* I2C Address Mask */
-+
-+/*
-+ * I2C Interrupt Registers Bit mask definitions
-+ * All the four interrupt registers (Status/Mask/Enable/Disable) have the same
-+ * bit definitions.
-+ */
-+#define XI2CPS_IXR_ALL_INTR_MASK 0x000002FF /* All ISR Mask */
-+
-+#define XI2CPS_FIFO_DEPTH	16		/* FIFO Depth */
-+#define XI2CPS_TIMEOUT		(50 * HZ)	/* Timeout for bus busy check */
-+#define XI2CPS_ENABLED_INTR	0x2EF		/* Enabled Interrupts */
-+
-+#define XI2CPS_DATA_INTR_DEPTH (XI2CPS_FIFO_DEPTH - 2)/* FIFO depth at which
-+							 * the DATA interrupt
-+							 * occurs
-+							 */
-+#define XI2CPS_MAX_TRANSFER_SIZE	255 /* Max transfer size */
-+#define XI2CPS_TRANSFER_SIZE	(XI2CPS_MAX_TRANSFER_SIZE - 3) /* Transfer size
-+					in multiples of data interrupt depth */
-+
-+#define DRIVER_NAME		"xi2cps"
-+
-+#define xi2cps_readreg(offset)		__raw_readl(id->membase + offset)
-+#define xi2cps_writereg(val, offset)	__raw_writel(val, id->membase + offset)
-+
-+/**
-+ * struct xi2cps - I2C device private data structure
-+ * @membase:		Base address of the I2C device
-+ * @adap:		I2C adapter instance
-+ * @p_msg:		Message pointer
-+ * @err_status:		Error status in Interrupt Status Register
-+ * @xfer_done:		Transfer complete status
-+ * @p_send_buf:		Pointer to transmit buffer
-+ * @p_recv_buf:		Pointer to receive buffer
-+ * @suspended:		Flag holding the device's PM status
-+ * @send_count:		Number of bytes still expected to send
-+ * @recv_count:		Number of bytes still expected to receive
-+ * @irq:		IRQ number
-+ * @cur_timeout:	The current timeout value used by the device
-+ * @input_clk:		Input clock to I2C controller
-+ * @i2c_clk:		Current I2C frequency
-+ * @bus_hold_flag:	Flag used in repeated start for clearing HOLD bit
-+ * @clk:		Pointer to struct clk
-+ * @clk_rate_change_nb:	Notifier block for clock rate changes
-+ */
-+struct xi2cps {
-+	void __iomem *membase;
-+	struct i2c_adapter adap;
-+	struct i2c_msg	*p_msg;
-+	int err_status;
-+	struct completion xfer_done;
-+	unsigned char *p_send_buf;
-+	unsigned char *p_recv_buf;
-+	u8 suspended;
-+	int send_count;
-+	int recv_count;
-+	int irq;
-+	int cur_timeout;
-+	unsigned int input_clk;
-+	unsigned int i2c_clk;
-+	unsigned int bus_hold_flag;
-+	struct clk	*clk;
-+	struct notifier_block	clk_rate_change_nb;
-+};
-+
-+#define to_xi2cps(_nb)	container_of(_nb, struct xi2cps,\
-+		clk_rate_change_nb)
-+#define MAX_F_ERR 10000
-+
-+/**
-+ * xi2cps_isr - Interrupt handler for the I2C device
-+ * @irq:	irq number for the I2C device
-+ * @ptr:	void pointer to xi2cps structure
-+ *
-+ * Returns IRQ_HANDLED always
-+ *
-+ * This function handles the data interrupt, transfer complete interrupt and
-+ * the error interrupts of the I2C device.
-+ */
-+static irqreturn_t xi2cps_isr(int irq, void *ptr)
-+{
-+	unsigned int isr_status, avail_bytes;
-+	unsigned int bytes_to_recv, bytes_to_send;
-+	unsigned int ctrl_reg = 0;
-+	struct xi2cps *id = ptr;
-+
-+	isr_status = xi2cps_readreg(XI2CPS_ISR_OFFSET);
-+
-+	/* Handling Nack interrupt */
-+	if (isr_status & 0x00000004)
-+		complete(&id->xfer_done);
-+
-+	/* Handling Arbitration lost interrupt */
-+	if (isr_status & 0x00000200)
-+		complete(&id->xfer_done);
-+
-+	/* Handling Data interrupt */
-+	if (isr_status & 0x00000002) {
-+		if (id->recv_count >= XI2CPS_DATA_INTR_DEPTH) {
-+			/* Always read data interrupt threshold bytes */
-+			bytes_to_recv = XI2CPS_DATA_INTR_DEPTH;
-+			id->recv_count = id->recv_count -
-+						XI2CPS_DATA_INTR_DEPTH;
-+			avail_bytes = xi2cps_readreg(XI2CPS_XFER_SIZE_OFFSET);
-+			/*
-+			 * if the tranfer size register value is zero, then
-+			 * check for the remaining bytes and update the
-+			 * transfer size register.
-+			 */
-+			if (avail_bytes == 0) {
-+				if (id->recv_count  > XI2CPS_TRANSFER_SIZE)
-+					xi2cps_writereg(XI2CPS_TRANSFER_SIZE,
-+						XI2CPS_XFER_SIZE_OFFSET);
-+				else
-+					xi2cps_writereg(id->recv_count,
-+						XI2CPS_XFER_SIZE_OFFSET);
-+			}
-+			/* Process the data received */
-+			while (bytes_to_recv) {
-+				*(id->p_recv_buf)++ =
-+					xi2cps_readreg(XI2CPS_DATA_OFFSET);
-+				bytes_to_recv = bytes_to_recv - 1;
-+			}
-+
-+			if ((id->bus_hold_flag == 0) &&
-+				(id->recv_count <= XI2CPS_FIFO_DEPTH)) {
-+				/* Clear the hold bus bit */
-+				xi2cps_writereg(
-+					(xi2cps_readreg(XI2CPS_CR_OFFSET) &
-+					(~XI2CPS_CR_HOLD_BUS_MASK)),
-+					XI2CPS_CR_OFFSET);
-+			}
-+		}
-+	}
-+
-+	/* Handling Transfer Complete interrupt */
-+	if (isr_status & 0x00000001) {
-+		if ((id->p_recv_buf) == NULL) {
-+			/*
-+			 * If the device is sending data If there is further
-+			 * data to be sent. Calculate the available space
-+			 * in FIFO and fill the FIFO with that many bytes.
-+			 */
-+			if (id->send_count > 0) {
-+				avail_bytes = XI2CPS_FIFO_DEPTH -
-+				xi2cps_readreg(XI2CPS_XFER_SIZE_OFFSET);
-+				if (id->send_count > avail_bytes)
-+					bytes_to_send = avail_bytes;
-+				else
-+					bytes_to_send = id->send_count;
-+
-+				while (bytes_to_send--) {
-+					xi2cps_writereg(
-+						(*(id->p_send_buf)++),
-+						 XI2CPS_DATA_OFFSET);
-+					id->send_count--;
-+				}
-+			} else {
-+		/*
-+		 * Signal the completion of transaction and clear the hold bus
-+		 * bit if there are no further messages to be processed.
-+		 */
-+				complete(&id->xfer_done);
-+			}
-+			if (id->send_count == 0) {
-+				if (id->bus_hold_flag == 0) {
-+					/* Clear the hold bus bit */
-+					ctrl_reg =
-+					xi2cps_readreg(XI2CPS_CR_OFFSET);
-+					if ((ctrl_reg & XI2CPS_CR_HOLD_BUS_MASK)
-+						== XI2CPS_CR_HOLD_BUS_MASK)
-+						xi2cps_writereg(
-+						(ctrl_reg &
-+						(~XI2CPS_CR_HOLD_BUS_MASK)),
-+						XI2CPS_CR_OFFSET);
-+				}
-+			}
-+		} else {
-+			if (id->bus_hold_flag == 0) {
-+				/* Clear the hold bus bit */
-+				ctrl_reg =
-+				xi2cps_readreg(XI2CPS_CR_OFFSET);
-+				if ((ctrl_reg & XI2CPS_CR_HOLD_BUS_MASK)
-+					== XI2CPS_CR_HOLD_BUS_MASK)
-+					xi2cps_writereg(
-+					(ctrl_reg &
-+					(~XI2CPS_CR_HOLD_BUS_MASK)),
-+					XI2CPS_CR_OFFSET);
-+			}
-+		/*
-+		 * If the device is receiving data, then signal the completion
-+		 * of transaction and read the data present in the FIFO.
-+		 * Signal the completion of transaction.
-+		 */
-+			while (xi2cps_readreg(XI2CPS_SR_OFFSET)
-+							& 0x00000020) {
-+				*(id->p_recv_buf)++ =
-+					xi2cps_readreg(XI2CPS_DATA_OFFSET);
-+				id->recv_count--;
-+			}
-+			complete(&id->xfer_done);
-+		}
-+	}
-+
-+	/* Update the status for errors */
-+	id->err_status = isr_status & 0x000002EC;
-+	xi2cps_writereg(isr_status, XI2CPS_ISR_OFFSET);
-+	return IRQ_HANDLED;
-+}
-+
-+/**
-+ * xi2cps_mrecv - Prepare and start a master receive operation
-+ * @id:		pointer to the i2c device structure
-+ *
-+ */
-+static void xi2cps_mrecv(struct xi2cps *id)
-+{
-+	unsigned int ctrl_reg;
-+	unsigned int isr_status;
-+
-+	id->p_recv_buf = id->p_msg->buf;
-+	id->recv_count = id->p_msg->len;
-+
-+	/*
-+	 * Set the controller in master receive mode and clear the FIFO.
-+	 * Set the slave address in address register.
-+	 * Check for the message size against FIFO depth and set the
-+	 * HOLD bus bit if it is more than FIFO depth.
-+	 * Clear the interrupts in interrupt status register.
-+	 */
-+	ctrl_reg = xi2cps_readreg(XI2CPS_CR_OFFSET);
-+	ctrl_reg |= (XI2CPS_CR_RW_MASK | XI2CPS_CR_CLR_FIFO_MASK);
-+
-+	if ((id->p_msg->flags & I2C_M_RECV_LEN) == I2C_M_RECV_LEN)
-+		id->recv_count = I2C_SMBUS_BLOCK_MAX + 1;
-+
-+	if (id->recv_count > XI2CPS_FIFO_DEPTH)
-+		ctrl_reg |= XI2CPS_CR_HOLD_BUS_MASK;
-+
-+	xi2cps_writereg(ctrl_reg, XI2CPS_CR_OFFSET);
-+
-+	isr_status = xi2cps_readreg(XI2CPS_ISR_OFFSET);
-+	xi2cps_writereg(isr_status, XI2CPS_ISR_OFFSET);
-+
-+	xi2cps_writereg((id->p_msg->addr & XI2CPS_ADDR_MASK),
-+						XI2CPS_ADDR_OFFSET);
-+	/*
-+	 * The no. of bytes to receive is checked against the limit of
-+	 * max transfer size. Set transfer size register with no of bytes
-+	 * receive if it is less than transfer size and transfer size if
-+	 * it is more. Enable the interrupts.
-+	 */
-+	if (id->recv_count > XI2CPS_TRANSFER_SIZE)
-+		xi2cps_writereg(XI2CPS_TRANSFER_SIZE, XI2CPS_XFER_SIZE_OFFSET);
-+	else
-+		xi2cps_writereg(id->recv_count, XI2CPS_XFER_SIZE_OFFSET);
-+	/*
-+	 * Clear the bus hold flag if bytes to receive is less than FIFO size.
-+	 */
-+	if (id->bus_hold_flag == 0 &&
-+		((id->p_msg->flags & I2C_M_RECV_LEN) != I2C_M_RECV_LEN) &&
-+		(id->recv_count <= XI2CPS_FIFO_DEPTH)) {
-+			/* Clear the hold bus bit */
-+			ctrl_reg = xi2cps_readreg(XI2CPS_CR_OFFSET);
-+			if ((ctrl_reg & XI2CPS_CR_HOLD_BUS_MASK) ==
-+					XI2CPS_CR_HOLD_BUS_MASK)
-+				xi2cps_writereg(
-+					(ctrl_reg & (~XI2CPS_CR_HOLD_BUS_MASK)),
-+					XI2CPS_CR_OFFSET);
-+	}
-+	xi2cps_writereg(XI2CPS_ENABLED_INTR, XI2CPS_IER_OFFSET);
-+}
-+
-+/**
-+ * xi2cps_msend - Prepare and start a master send operation
-+ * @id:		pointer to the i2c device
-+ *
-+ */
-+static void xi2cps_msend(struct xi2cps *id)
-+{
-+	unsigned int avail_bytes;
-+	unsigned int bytes_to_send;
-+	unsigned int ctrl_reg;
-+	unsigned int isr_status;
-+
-+	id->p_recv_buf = NULL;
-+	id->p_send_buf = id->p_msg->buf;
-+	id->send_count = id->p_msg->len;
-+
-+	/*
-+	 * Set the controller in Master transmit mode and clear the FIFO.
-+	 * Set the slave address in address register.
-+	 * Check for the message size against FIFO depth and set the
-+	 * HOLD bus bit if it is more than FIFO depth.
-+	 * Clear the interrupts in interrupt status register.
-+	 */
-+	ctrl_reg = xi2cps_readreg(XI2CPS_CR_OFFSET);
-+	ctrl_reg &= ~XI2CPS_CR_RW_MASK;
-+	ctrl_reg |= XI2CPS_CR_CLR_FIFO_MASK;
-+
-+	if ((id->send_count) > XI2CPS_FIFO_DEPTH)
-+		ctrl_reg |= XI2CPS_CR_HOLD_BUS_MASK;
-+	xi2cps_writereg(ctrl_reg, XI2CPS_CR_OFFSET);
-+
-+	isr_status = xi2cps_readreg(XI2CPS_ISR_OFFSET);
-+	xi2cps_writereg(isr_status, XI2CPS_ISR_OFFSET);
-+
-+	/*
-+	 * Calculate the space available in FIFO. Check the message length
-+	 * against the space available, and fill the FIFO accordingly.
-+	 * Enable the interrupts.
-+	 */
-+	avail_bytes = XI2CPS_FIFO_DEPTH -
-+				xi2cps_readreg(XI2CPS_XFER_SIZE_OFFSET);
-+
-+	if (id->send_count > avail_bytes)
-+		bytes_to_send = avail_bytes;
-+	else
-+		bytes_to_send = id->send_count;
-+
-+	while (bytes_to_send--) {
-+		xi2cps_writereg((*(id->p_send_buf)++), XI2CPS_DATA_OFFSET);
-+		id->send_count--;
-+	}
-+
-+	xi2cps_writereg((id->p_msg->addr & XI2CPS_ADDR_MASK),
-+						XI2CPS_ADDR_OFFSET);
-+
-+	/*
-+	 * Clear the bus hold flag if there is no more data
-+	 * and if it is the last message.
-+	 */
-+	if (id->bus_hold_flag == 0 && id->send_count == 0) {
-+		/* Clear the hold bus bit */
-+		ctrl_reg = xi2cps_readreg(XI2CPS_CR_OFFSET);
-+		if ((ctrl_reg & XI2CPS_CR_HOLD_BUS_MASK) ==
-+				XI2CPS_CR_HOLD_BUS_MASK)
-+			xi2cps_writereg(
-+				(ctrl_reg & (~XI2CPS_CR_HOLD_BUS_MASK)),
-+				XI2CPS_CR_OFFSET);
-+	}
-+	xi2cps_writereg(XI2CPS_ENABLED_INTR, XI2CPS_IER_OFFSET);
-+}
-+
-+/**
-+ * xi2cps_master_reset - Reset the interface
-+ * @adap:	pointer to the i2c adapter driver instance
-+ *
-+ * Returns none
-+ *
-+ * This function cleanup the fifos, clear the hold bit and status
-+ * and disable the interrupts.
-+ */
-+static void xi2cps_master_reset(struct i2c_adapter *adap)
-+{
-+	struct xi2cps *id = adap->algo_data;
-+	u32 regval;
-+
-+	/* Disable the interrupts */
-+	xi2cps_writereg(XI2CPS_IXR_ALL_INTR_MASK, XI2CPS_IDR_OFFSET);
-+	/* Clear the hold bit and fifos */
-+	regval = xi2cps_readreg(XI2CPS_CR_OFFSET);
-+	regval &= ~XI2CPS_CR_HOLD_BUS_MASK;
-+	regval |= XI2CPS_CR_CLR_FIFO_MASK;
-+	xi2cps_writereg(regval, XI2CPS_CR_OFFSET);
-+	/* Update the transfercount register to zero */
-+	xi2cps_writereg(0x0, XI2CPS_XFER_SIZE_OFFSET);
-+	/* Clear the interupt status register */
-+	regval = xi2cps_readreg(XI2CPS_ISR_OFFSET);
-+	xi2cps_writereg(regval, XI2CPS_ISR_OFFSET);
-+	/* Clear the status register */
-+	regval =  xi2cps_readreg(XI2CPS_SR_OFFSET);
-+	xi2cps_writereg(regval, XI2CPS_SR_OFFSET);
-+}
-+
-+/**
-+ * xi2cps_master_xfer - The main i2c transfer function
-+ * @adap:	pointer to the i2c adapter driver instance
-+ * @msgs:	pointer to the i2c message structure
-+ * @num:	the number of messages to transfer
-+ *
-+ * Returns number of msgs processed on success, negative error otherwise
-+ *
-+ * This function waits for the bus idle condition and updates the timeout if
-+ * modified by user. Then initiates the send/recv activity based on the
-+ * transfer message received.
-+ */
-+static int xi2cps_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs,
-+				int num)
-+{
-+	struct xi2cps *id = adap->algo_data;
-+	unsigned int count, retries;
-+	unsigned long timeout;
-+	int ret;
-+
-+	/* Waiting for bus-ready. If bus not ready, it returns after timeout */
-+	timeout = jiffies + XI2CPS_TIMEOUT;
-+	while ((xi2cps_readreg(XI2CPS_SR_OFFSET)) & 0x00000100) {
-+		if (time_after(jiffies, timeout)) {
-+			dev_warn(id->adap.dev.parent,
-+					"timedout waiting for bus ready\n");
-+			xi2cps_master_reset(adap);
-+			return -ETIMEDOUT;
-+		}
-+		schedule_timeout(1);
-+	}
-+
-+
-+	/* The bus is free. Set the new timeout value if updated */
-+	if (id->adap.timeout != id->cur_timeout) {
-+		xi2cps_writereg((id->adap.timeout & 0xFF),
-+					XI2CPS_TIME_OUT_OFFSET);
-+		id->cur_timeout = id->adap.timeout;
-+	}
-+
-+	/*
-+	 * Set the flag to one when multiple messages are to be
-+	 * processed with a repeated start.
-+	 */
-+	if (num > 1) {
-+		id->bus_hold_flag = 1;
-+		xi2cps_writereg((xi2cps_readreg(XI2CPS_CR_OFFSET) |
-+				XI2CPS_CR_HOLD_BUS_MASK), XI2CPS_CR_OFFSET);
-+	} else {
-+		id->bus_hold_flag = 0;
-+	}
-+
-+	/* Process the msg one by one */
-+	for (count = 0; count < num; count++, msgs++) {
-+
-+		if (count == (num - 1))
-+			id->bus_hold_flag = 0;
-+		retries = adap->retries;
-+retry:
-+		id->err_status = 0;
-+		id->p_msg = msgs;
-+		init_completion(&id->xfer_done);
-+
-+		/* Check for the TEN Bit mode on each msg */
-+		if (msgs->flags & I2C_M_TEN) {
-+			xi2cps_writereg((xi2cps_readreg(XI2CPS_CR_OFFSET) &
-+					(~0x00000004)), XI2CPS_CR_OFFSET);
-+		} else {
-+			if ((xi2cps_readreg(XI2CPS_CR_OFFSET) & 0x00000004)
-+								== 0)
-+				xi2cps_writereg(
-+					(xi2cps_readreg(XI2CPS_CR_OFFSET) |
-+					 (0x00000004)), XI2CPS_CR_OFFSET);
-+		}
-+
-+		/* Check for the R/W flag on each msg */
-+		if (msgs->flags & I2C_M_RD)
-+			xi2cps_mrecv(id);
-+		else
-+			xi2cps_msend(id);
-+
-+		/* Wait for the signal of completion */
-+		ret = wait_for_completion_interruptible_timeout(
-+							&id->xfer_done, HZ);
-+		if (ret == 0) {
-+			dev_err(id->adap.dev.parent,
-+				 "timeout waiting on completion\n");
-+			xi2cps_master_reset(adap);
-+			return -ETIMEDOUT;
-+		}
-+		xi2cps_writereg(XI2CPS_IXR_ALL_INTR_MASK, XI2CPS_IDR_OFFSET);
-+
-+		/* If it is bus arbitration error, try again */
-+		if (id->err_status & 0x00000200) {
-+			dev_dbg(id->adap.dev.parent,
-+				 "Lost ownership on bus, trying again\n");
-+			if (retries--) {
-+				mdelay(2);
-+				goto retry;
-+			}
-+			dev_err(id->adap.dev.parent,
-+					 "Retries completed, exit\n");
-+			num = -EREMOTEIO;
-+			break;
-+		}
-+		/* Report the other error interrupts to application as EIO */
-+		if (id->err_status & 0x000000E4) {
-+			xi2cps_master_reset(adap);
-+			num = -EIO;
-+			break;
-+		}
-+	}
-+
-+	id->p_msg = NULL;
-+	id->err_status = 0;
-+
-+	return num;
-+}
-+
-+/**
-+ * xi2cps_func - Returns the supported features of the I2C driver
-+ * @adap:	pointer to the i2c adapter structure
-+ *
-+ * Returns 32 bit value, each bit corresponding to a feature
-+ */
-+static u32 xi2cps_func(struct i2c_adapter *adap)
-+{
-+	return I2C_FUNC_I2C | I2C_FUNC_10BIT_ADDR |
-+		(I2C_FUNC_SMBUS_EMUL & ~I2C_FUNC_SMBUS_QUICK) |
-+		I2C_FUNC_SMBUS_BLOCK_DATA;
-+}
-+
-+static const struct i2c_algorithm xi2cps_algo = {
-+	.master_xfer	= xi2cps_master_xfer,
-+	.functionality	= xi2cps_func,
-+};
-+
-+/**
-+ * xi2cps_calc_divs() - Calculate clock dividers
-+ * @f:		I2C clock frequency
-+ * @input_clk:	Input clock frequency
-+ * @a:		First divider (return value)
-+ * @b:		Second divider (return value)
-+ * @err:	Frequency error
-+ * Return 0 on success, negative errno otherwise.
-+ *
-+ * f is used as input and output variable. As input it is used as target I2C
-+ * frequency. On function exit f holds the actually resulting I2C frequency.
-+ */
-+static int xi2cps_calc_divs(unsigned int *f, unsigned int input_clk,
-+		unsigned int *a, unsigned int *b, unsigned int *err)
-+{
-+	unsigned int fscl = *f;
-+	unsigned int div_a, div_b, calc_div_a = 0, calc_div_b = 0;
-+	unsigned int last_error, current_error;
-+	unsigned int best_fscl = *f, actual_fscl, temp;
-+
-+	/* calculate (divisor_a+1) x (divisor_b+1) */
-+	temp = input_clk / (22 * fscl);
-+
-+	/*
-+	 * If the calculated value is negative or 0, the fscl input is out of
-+	 * range. Return error.
-+	 */
-+	if (!temp)
-+		return -EINVAL;
-+
-+	last_error = -1;
-+	for (div_b = 0; div_b < 64; div_b++) {
-+		div_a = input_clk / (22 * fscl * (div_b + 1));
-+
-+		if (div_a != 0)
-+			div_a = div_a - 1;
-+
-+		if (div_a > 3)
-+			continue;
-+
-+		actual_fscl = input_clk / (22 * (div_a + 1) * (div_b + 1));
-+
-+		current_error = ((actual_fscl > fscl) ? (actual_fscl - fscl) :
-+							(fscl - actual_fscl));
-+
-+		if (last_error > current_error) {
-+			calc_div_a = div_a;
-+			calc_div_b = div_b;
-+			best_fscl = actual_fscl;
-+			last_error = current_error;
-+		}
-+	}
-+
-+	*err = last_error;
-+	*a = calc_div_a;
-+	*b = calc_div_b;
-+	*f = best_fscl;
-+
-+	return 0;
-+}
-+
-+/**
-+ * xi2cps_setclk - This function sets the serial clock rate for the I2C device
-+ * @fscl:	The clock frequency in Hz
-+ * @id:		Pointer to the I2C device structure
-+ *
-+ * Returns zero on success, negative error otherwise
-+ *
-+ * The device must be idle rather than busy transferring data before setting
-+ * these device options.
-+ * The data rate is set by values in the control register.
-+ * The formula for determining the correct register values is
-+ *	Fscl = Fpclk/(22 x (divisor_a+1) x (divisor_b+1))
-+ * See the hardware data sheet for a full explanation of setting the serial
-+ * clock rate. The clock can not be faster than the input clock divide by 22.
-+ * The two most common clock rates are 100KHz and 400KHz.
-+ */
-+static int xi2cps_setclk(unsigned int fscl, struct xi2cps *id)
-+{
-+	unsigned int div_a, div_b;
-+	unsigned int ctrl_reg;
-+	unsigned int err;
-+	int ret = 0;
-+
-+	ret = xi2cps_calc_divs(&fscl, id->input_clk, &div_a, &div_b, &err);
-+	if (ret)
-+		return ret;
-+
-+	ctrl_reg = xi2cps_readreg(XI2CPS_CR_OFFSET);
-+	ctrl_reg &= ~(0x0000C000 | 0x00003F00);
-+	ctrl_reg |= ((div_a << 14) | (div_b << 8));
-+	xi2cps_writereg(ctrl_reg, XI2CPS_CR_OFFSET);
-+
-+	return 0;
-+}
-+
-+/**
-+ * xi2cps_clk_notifier_cb - Clock rate change callback
-+ * @nb:		Pointer to notifier block
-+ * @event:	Notification reason
-+ * @data:	Pointer to notification data object
-+ * Returns NOTIFY_STOP if the rate change should be aborted, NOTIFY_OK
-+ * otherwise.
-+ *
-+ * This function is called when the xi2cps input clock frequency changes. In the
-+ * pre-rate change notification here it is determined if the rate change may be
-+ * allowed or not.
-+ * In th post-change case necessary adjustments are conducted.
-+ */
-+static int xi2cps_clk_notifier_cb(struct notifier_block *nb, unsigned long
-+		event, void *data)
-+{
-+	struct clk_notifier_data *ndata = data;
-+	struct xi2cps *id = to_xi2cps(nb);
-+
-+	if (id->suspended)
-+		return NOTIFY_OK;
-+
-+	switch (event) {
-+	case PRE_RATE_CHANGE:
-+	{
-+		/*
-+		 * if a rate change is announced we need to check whether we can
-+		 * maintain the current frequency by changing the clock
-+		 * dividers. Probably we could also define an acceptable
-+		 * frequency range.
-+		 */
-+		unsigned int input_clk = (unsigned int)ndata->new_rate;
-+		unsigned int fscl = id->i2c_clk;
-+		unsigned int div_a, div_b;
-+		unsigned int err = 0;
-+		int ret;
-+
-+		ret = xi2cps_calc_divs(&fscl, input_clk, &div_a, &div_b, &err);
-+		if (ret)
-+			return NOTIFY_STOP;
-+		if (err > MAX_F_ERR)
-+			return NOTIFY_STOP;
-+
-+		return NOTIFY_OK;
-+	}
-+	case POST_RATE_CHANGE:
-+		id->input_clk = ndata->new_rate;
-+		/* We probably need to stop the HW before this and restart
-+		 * afterwards */
-+		xi2cps_setclk(id->i2c_clk, id);
-+		return NOTIFY_OK;
-+	case ABORT_RATE_CHANGE:
-+	default:
-+		return NOTIFY_DONE;
-+	}
-+}
-+
-+#ifdef CONFIG_PM_SLEEP
-+/**
-+ * xi2cps_suspend - Suspend method for the driver
-+ * @_dev:	Address of the platform_device structure
-+ * Returns 0 on success and error value on error
-+ *
-+ * Put the driver into low power mode.
-+ */
-+static int xi2cps_suspend(struct device *_dev)
-+{
-+	struct platform_device *pdev = container_of(_dev,
-+			struct platform_device, dev);
-+	struct xi2cps *xi2c = platform_get_drvdata(pdev);
-+
-+	clk_disable(xi2c->clk);
-+	xi2c->suspended = 1;
-+
-+	return 0;
-+}
-+
-+/**
-+ * xi2cps_resume - Resume from suspend
-+ * @_dev:	Address of the platform_device structure
-+ * Returns 0 on success and error value on error
-+ *
-+ * Resume operation after suspend.
-+ */
-+static int xi2cps_resume(struct device *_dev)
-+{
-+	struct platform_device *pdev = container_of(_dev,
-+			struct platform_device, dev);
-+	struct xi2cps *xi2c = platform_get_drvdata(pdev);
-+	int ret;
-+
-+	ret = clk_enable(xi2c->clk);
-+	if (ret) {
-+		dev_err(_dev, "Cannot enable clock.\n");
-+		return ret;
-+	}
-+
-+	xi2c->suspended = 0;
-+
-+	return 0;
-+}
-+
-+static const struct dev_pm_ops xi2cps_dev_pm_ops = {
-+	SET_SYSTEM_SLEEP_PM_OPS(xi2cps_suspend, xi2cps_resume)
-+};
-+#define XI2CPS_PM	(&xi2cps_dev_pm_ops)
-+
-+#else /* ! CONFIG_PM_SLEEP */
-+#define XI2CPS_PM	NULL
-+#endif /* ! CONFIG_PM_SLEEP */
-+
-+/************************/
-+/* Platform bus binding */
-+/************************/
-+
-+/**
-+ * xi2cps_probe - Platform registration call
-+ * @pdev:	Handle to the platform device structure
-+ *
-+ * Returns zero on success, negative error otherwise
-+ *
-+ * This function does all the memory allocation and registration for the i2c
-+ * device. User can modify the address mode to 10 bit address mode using the
-+ * ioctl call with option I2C_TENBIT.
-+ */
-+static int xi2cps_probe(struct platform_device *pdev)
-+{
-+	struct resource *r_mem = NULL;
-+	struct xi2cps *id;
-+	int ret = 0;
-+	const unsigned int *prop;
-+	/*
-+	 * Allocate memory for xi2cps structure.
-+	 * Initialize the structure to zero and set the platform data.
-+	 * Obtain the resource base address from platform data and remap it.
-+	 * Get the irq resource from platform data.Initialize the adapter
-+	 * structure members and also xi2cps structure.
-+	 */
-+	id = devm_kzalloc(&pdev->dev, sizeof(*id), GFP_KERNEL);
-+	if (!id)
-+		return -ENOMEM;
-+
-+	platform_set_drvdata(pdev, id);
-+
-+	r_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+	id->membase = devm_ioremap_resource(&pdev->dev, r_mem);
-+	if (IS_ERR(id->membase)) {
-+		dev_err(&pdev->dev, "ioremap failed\n");
-+		return PTR_ERR(id->membase);
-+	}
-+
-+	id->irq = platform_get_irq(pdev, 0);
-+
-+	prop = of_get_property(pdev->dev.of_node, "bus-id", NULL);
-+	if (prop) {
-+		id->adap.nr = be32_to_cpup(prop);
-+	} else {
-+		dev_err(&pdev->dev, "couldn't determine bus-id\n");
-+		return -ENXIO;
-+	}
-+	id->adap.dev.of_node = pdev->dev.of_node;
-+	id->adap.algo = (struct i2c_algorithm *) &xi2cps_algo;
-+	id->adap.timeout = 0x1F;	/* Default timeout value */
-+	id->adap.retries = 3;		/* Default retry value. */
-+	id->adap.algo_data = id;
-+	id->adap.dev.parent = &pdev->dev;
-+	snprintf(id->adap.name, sizeof(id->adap.name),
-+		 "XILINX I2C at %08lx", (unsigned long)r_mem->start);
-+
-+	id->cur_timeout = id->adap.timeout;
-+	id->clk = devm_clk_get(&pdev->dev, NULL);
-+	if (IS_ERR(id->clk)) {
-+		dev_err(&pdev->dev, "input clock not found.\n");
-+		return PTR_ERR(id->clk);
-+	}
-+	ret = clk_prepare_enable(id->clk);
-+	if (ret) {
-+		dev_err(&pdev->dev, "Unable to enable clock.\n");
-+		return ret;
-+	}
-+	id->clk_rate_change_nb.notifier_call = xi2cps_clk_notifier_cb;
-+	id->clk_rate_change_nb.next = NULL;
-+	if (clk_notifier_register(id->clk, &id->clk_rate_change_nb))
-+		dev_warn(&pdev->dev, "Unable to register clock notifier.\n");
-+	id->input_clk = (unsigned int)clk_get_rate(id->clk);
-+
-+	prop = of_get_property(pdev->dev.of_node, "i2c-clk", NULL);
-+	if (prop) {
-+		id->i2c_clk = be32_to_cpup(prop);
-+	} else {
-+		ret = -ENXIO;
-+		dev_err(&pdev->dev, "couldn't determine i2c-clk\n");
-+		goto err_clk_dis;
-+	}
-+
-+	/*
-+	 * Set Master Mode,Normal addressing mode (7 bit address),
-+	 * Enable Transmission of Ack in Control Register.
-+	 * Set the timeout and I2C clock and request the IRQ(ISR mapped).
-+	 * Call to the i2c_add_numbered_adapter registers the adapter.
-+	 */
-+	xi2cps_writereg(0x0000000E, XI2CPS_CR_OFFSET);
-+	xi2cps_writereg(id->adap.timeout, XI2CPS_TIME_OUT_OFFSET);
-+
-+	ret = xi2cps_setclk(id->i2c_clk, id);
-+	if (ret < 0) {
-+		dev_err(&pdev->dev, "invalid SCL clock: %dkHz\n", id->i2c_clk);
-+		ret = -EINVAL;
-+		goto err_clk_dis;
-+	}
-+
-+	ret = devm_request_irq(&pdev->dev, id->irq, xi2cps_isr, 0,
-+				 DRIVER_NAME, id);
-+	if (ret) {
-+		dev_err(&pdev->dev, "cannot get irq %d\n", id->irq);
-+		goto err_clk_dis;
-+	}
-+
-+	ret = i2c_add_numbered_adapter(&id->adap);
-+	if (ret < 0) {
-+		dev_err(&pdev->dev, "reg adap failed: %d\n", ret);
-+		goto err_clk_dis;
-+	}
-+
-+	dev_info(&pdev->dev, "%d kHz mmio %08lx irq %d\n",
-+		 id->i2c_clk/1000, (unsigned long)r_mem->start, id->irq);
-+
-+	return 0;
-+
-+err_clk_dis:
-+	clk_disable_unprepare(id->clk);
-+	return ret;
-+}
-+
-+/**
-+ * xi2cps_remove - Unregister the device after releasing the resources
-+ * @pdev:	Handle to the platform device structure
-+ *
-+ * Returns zero always
-+ *
-+ * This function frees all the resources allocated to the device.
-+ */
-+static int xi2cps_remove(struct platform_device *pdev)
-+{
-+	struct xi2cps *id = platform_get_drvdata(pdev);
-+
-+	i2c_del_adapter(&id->adap);
-+	clk_notifier_unregister(id->clk, &id->clk_rate_change_nb);
-+	clk_disable_unprepare(id->clk);
-+	platform_set_drvdata(pdev, NULL);
-+
-+	return 0;
-+}
-+
-+static const struct of_device_id xi2cps_of_match[] = {
-+	{ .compatible = "xlnx,ps7-i2c-1.00.a", },
-+	{ /* end of table */}
-+};
-+MODULE_DEVICE_TABLE(of, xi2cps_of_match);
-+
-+static struct platform_driver xi2cps_drv = {
-+	.driver = {
-+		.name  = DRIVER_NAME,
-+		.owner = THIS_MODULE,
-+		.of_match_table = xi2cps_of_match,
-+		.pm = XI2CPS_PM,
-+	},
-+	.probe  = xi2cps_probe,
-+	.remove = xi2cps_remove,
-+};
-+
-+module_platform_driver(xi2cps_drv);
-+
-+MODULE_AUTHOR("Xilinx, Inc.");
-+MODULE_DESCRIPTION("Xilinx PS I2C bus driver");
-+MODULE_LICENSE("GPL");
-+MODULE_ALIAS("platform:" DRIVER_NAME);
diff --git a/patches.zynq/0002-ARM-zynq-Not-to-rewrite-jump-code-when-starting-addr.patch b/patches.zynq/0002-ARM-zynq-Not-to-rewrite-jump-code-when-starting-addr.patch
deleted file mode 100644
index 675801e0a0631..0000000000000
--- a/patches.zynq/0002-ARM-zynq-Not-to-rewrite-jump-code-when-starting-addr.patch
+++ /dev/null
@@ -1,83 +0,0 @@
-From 8dd1075f90304e8e02a60da019f44e511c98ef12 Mon Sep 17 00:00:00 2001
-From: Michal Simek <michal.simek@xilinx.com>
-Date: Fri, 24 May 2013 17:58:55 +0200
-Subject: ARM: zynq: Not to rewrite jump code when starting address is 0x0
-
-This configuration is used by remoteproc.
-
-Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-(cherry picked from commit 88cd4e882de73c2e62c38591abfe8c13fcc8386a)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- arch/arm/mach-zynq/platsmp.c | 52 ++++++++++++++++++++++----------------------
- 1 file changed, 26 insertions(+), 26 deletions(-)
-
-diff --git a/arch/arm/mach-zynq/platsmp.c b/arch/arm/mach-zynq/platsmp.c
-index 5fc167e07619..023f225493f2 100644
---- a/arch/arm/mach-zynq/platsmp.c
-+++ b/arch/arm/mach-zynq/platsmp.c
-@@ -53,34 +53,34 @@ int __cpuinit zynq_cpun_start(u32 address, int cpu)
- 						&zynq_secondary_trampoline;
- 
- 		zynq_slcr_cpu_stop(cpu);
--
--		if (__pa(PAGE_OFFSET)) {
--			zero = ioremap(0, trampoline_code_size);
--			if (!zero) {
--				pr_warn("BOOTUP jump vectors not accessible\n");
--				return -1;
-+		if (address) {
-+			if (__pa(PAGE_OFFSET)) {
-+				zero = ioremap(0, trampoline_code_size);
-+				if (!zero) {
-+					pr_warn("BOOTUP jump vectors not accessible\n");
-+					return -1;
-+				}
-+			} else {
-+				zero = (__force u8 __iomem *)PAGE_OFFSET;
- 			}
--		} else {
--			zero = (__force u8 __iomem *)PAGE_OFFSET;
--		}
--
--		/*
--		 * This is elegant way how to jump to any address
--		 * 0x0: Load address at 0x8 to r0
--		 * 0x4: Jump by mov instruction
--		 * 0x8: Jumping address
--		 */
--		memcpy((__force void *)zero, &zynq_secondary_trampoline,
--						trampoline_size);
--		writel(address, zero + trampoline_size);
--
--		flush_cache_all();
--		outer_flush_range(0, trampoline_code_size);
--		smp_wmb();
--
--		if (__pa(PAGE_OFFSET))
--			iounmap(zero);
- 
-+			/*
-+			* This is elegant way how to jump to any address
-+			* 0x0: Load address at 0x8 to r0
-+			* 0x4: Jump by mov instruction
-+			* 0x8: Jumping address
-+			*/
-+			memcpy((__force void *)zero, &zynq_secondary_trampoline,
-+							trampoline_size);
-+			writel(address, zero + trampoline_size);
-+
-+			flush_cache_all();
-+			outer_flush_range(0, trampoline_code_size);
-+			smp_wmb();
-+
-+			if (__pa(PAGE_OFFSET))
-+				iounmap(zero);
-+		}
- 		zynq_slcr_cpu_start(cpu);
- 
- 		return 0;
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0003-arm-zynq-Remove-board-specific-compatibility-string.patch b/patches.zynq/0003-arm-zynq-Remove-board-specific-compatibility-string.patch
deleted file mode 100644
index d9ba446bd563e..0000000000000
--- a/patches.zynq/0003-arm-zynq-Remove-board-specific-compatibility-string.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From 11eab4485cd8a4466acfc3c36837d2e4fcac78ba Mon Sep 17 00:00:00 2001
-From: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Date: Thu, 13 Jun 2013 09:37:15 -0700
-Subject: arm: zynq: Remove board specific compatibility string
-
-It is not necessary to have board specific compatibility strings
-in the platform code. The board dts files can use the more generic
-'xlnx,zynq-7000' string.
-
-Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Reviewed-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
-Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-(cherry picked from commit 7fa5ac3fa2103ad4f8334373e786857ee6a3ba9f)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- arch/arm/mach-zynq/common.c | 1 -
- 1 file changed, 1 deletion(-)
-
-diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c
-index 4c0199b88a04..4130e65a0e3f 100644
---- a/arch/arm/mach-zynq/common.c
-+++ b/arch/arm/mach-zynq/common.c
-@@ -97,7 +97,6 @@ static void zynq_system_reset(char mode, const char *cmd)
- }
- 
- static const char * const zynq_dt_match[] = {
--	"xlnx,zynq-zc702",
- 	"xlnx,zynq-7000",
- 	NULL
- };
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0003-mmc-arasan-add-a-driver-for-Arasan-s-SDHCI-controlle.patch b/patches.zynq/0003-mmc-arasan-add-a-driver-for-Arasan-s-SDHCI-controlle.patch
deleted file mode 100644
index e312ac48e52c5..0000000000000
--- a/patches.zynq/0003-mmc-arasan-add-a-driver-for-Arasan-s-SDHCI-controlle.patch
+++ /dev/null
@@ -1,327 +0,0 @@
-From 85d930d0b091235da43623db984ef49b982f9881 Mon Sep 17 00:00:00 2001
-From: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Date: Fri, 20 Dec 2013 09:23:18 +0900
-Subject: mmc: arasan: add a driver for Arasan's SDHCI controller core.
-
-As discussed, I left binding and license header as is and fixed the typos.
-v3:
- - fix typo in binding documentation
- - add missing '>' in MODULE_AUTHOR string
-v2:
- - document 'interrupts' and 'interrupt-parent' properties in the driver
-   bindings
- - append '-8.9a' IP version specifier to comaptibility string
-
-Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Acked-by: Rob Herring <rob.herring@calxeda.com> [binding]
-(patch from https://lkml.org/lkml/2013/12/2/413)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- Documentation/devicetree/bindings/mmc/arasan,sdhci.txt |   27 ++
- MAINTAINERS                                            |    1 
- drivers/mmc/host/Kconfig                               |   12 
- drivers/mmc/host/Makefile                              |    1 
- drivers/mmc/host/sdhci-of-arasan.c                     |  224 +++++++++++++++++
- 5 files changed, 265 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/mmc/arasan,sdhci.txt
- create mode 100644 drivers/mmc/host/sdhci-of-arasan.c
-
---- /dev/null
-+++ b/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt
-@@ -0,0 +1,27 @@
-+Device Tree Bindings for the Arasan SDHCI Controller
-+
-+  The bindings follow the mmc[1], clock[2] and interrupt[3] bindings. Only
-+  deviations are documented here.
-+
-+  [1] Documentation/devicetree/bindings/mmc/mmc.txt
-+  [2] Documentation/devicetree/bindings/clock/clock-bindings.txt
-+  [3] Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
-+
-+Required Properties:
-+  - compatible: Compatibility string. Must be 'arasan,sdhci-8.9a'
-+  - reg: From mmc bindings: Register location and length.
-+  - clocks: From clock bindings: Handles to clock inputs.
-+  - clock-names: From clock bindings: Tuple including "clk_xin" and "clk_ahb"
-+  - interrupts: Interrupt specifier
-+  - interrupt-parent: Phandle for the interrupt controller that services
-+		      interrupts for this device.
-+
-+Example:
-+	sdhci@e0100000 {
-+		compatible = "arasan,sdhci-8.9a";
-+		reg = <0xe0100000 0x1000>;
-+		clock-names = "clk_xin", "clk_ahb";
-+		clocks = <&clkc 21>, <&clkc 32>;
-+		interrupt-parent = <&gic>;
-+		interrupts = <0 24 4>;
-+	} ;
---- a/MAINTAINERS
-+++ b/MAINTAINERS
-@@ -1311,6 +1311,7 @@ T:	git git://git.xilinx.com/linux-xlnx.g
- S:	Supported
- F:	arch/arm/mach-zynq/
- F:	drivers/cpuidle/cpuidle-zynq.c
-+F:	drivers/mmc/host/sdhci-of-arasan.c
- 
- ARM64 PORT (AARCH64 ARCHITECTURE)
- M:	Catalin Marinas <catalin.marinas@arm.com>
---- a/drivers/mmc/host/Kconfig
-+++ b/drivers/mmc/host/Kconfig
-@@ -104,6 +104,18 @@ config MMC_SDHCI_PLTFM
- 
- 	  If unsure, say N.
- 
-+config MMC_SDHCI_OF_ARASAN
-+	tristate "SDHCI OF support for the Arasan SDHCI controllers"
-+	depends on MMC_SDHCI_PLTFM
-+	depends on OF
-+	help
-+	  This selects the Arasan Secure Digital Host Controller Interface
-+	  (SDHCI). This hardware is found e.g. in Xilinx' Zynq SoC.
-+
-+	  If you have a controller with this interface, say Y or M here.
-+
-+	  If unsure, say N.
-+
- config MMC_SDHCI_OF_ESDHC
- 	tristate "SDHCI OF support for the Freescale eSDHC controller"
- 	depends on MMC_SDHCI_PLTFM
---- a/drivers/mmc/host/Makefile
-+++ b/drivers/mmc/host/Makefile
-@@ -58,6 +58,7 @@ obj-$(CONFIG_MMC_SDHCI_CNS3XXX)		+= sdhc
- obj-$(CONFIG_MMC_SDHCI_ESDHC_IMX)	+= sdhci-esdhc-imx.o
- obj-$(CONFIG_MMC_SDHCI_DOVE)		+= sdhci-dove.o
- obj-$(CONFIG_MMC_SDHCI_TEGRA)		+= sdhci-tegra.o
-+obj-$(CONFIG_MMC_SDHCI_OF_ARASAN)	+= sdhci-of-arasan.o
- obj-$(CONFIG_MMC_SDHCI_OF_ESDHC)	+= sdhci-of-esdhc.o
- obj-$(CONFIG_MMC_SDHCI_OF_HLWD)		+= sdhci-of-hlwd.o
- obj-$(CONFIG_MMC_SDHCI_BCM2835)		+= sdhci-bcm2835.o
---- /dev/null
-+++ b/drivers/mmc/host/sdhci-of-arasan.c
-@@ -0,0 +1,224 @@
-+/*
-+ * Arasan Secure Digital Host Controller Interface.
-+ * Copyright (C) 2011 - 2012 Michal Simek <monstr@monstr.eu>
-+ * Copyright (c) 2012 Wind River Systems, Inc.
-+ * Copyright (C) 2013 Pengutronix e.K.
-+ * Copyright (C) 2013 Xilinx Inc.
-+ *
-+ * Based on sdhci-of-esdhc.c
-+ *
-+ * Copyright (c) 2007 Freescale Semiconductor, Inc.
-+ * Copyright (c) 2009 MontaVista Software, Inc.
-+ *
-+ * Authors: Xiaobo Xie <X.Xie@freescale.com>
-+ *	    Anton Vorontsov <avorontsov@ru.mvista.com>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or (at
-+ * your option) any later version.
-+ */
-+
-+#include <linux/module.h>
-+#include "sdhci-pltfm.h"
-+
-+#define SDHCI_ARASAN_CLK_CTRL_OFFSET	0x2c
-+
-+#define CLK_CTRL_TIMEOUT_SHIFT		16
-+#define CLK_CTRL_TIMEOUT_MASK		(0xf << CLK_CTRL_TIMEOUT_SHIFT)
-+#define CLK_CTRL_TIMEOUT_MIN_EXP	13
-+
-+/**
-+ * struct sdhci_arasan_data
-+ * @clk_ahb:	Pointer to the AHB clock
-+ */
-+struct sdhci_arasan_data {
-+	struct clk	*clk_ahb;
-+};
-+
-+static unsigned int sdhci_arasan_get_timeout_clock(struct sdhci_host *host)
-+{
-+	u32 div;
-+	unsigned long freq;
-+	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
-+
-+	div = readl(host->ioaddr + SDHCI_ARASAN_CLK_CTRL_OFFSET);
-+	div = (div & CLK_CTRL_TIMEOUT_MASK) >> CLK_CTRL_TIMEOUT_SHIFT;
-+
-+	freq = clk_get_rate(pltfm_host->clk);
-+	freq /= 1 << (CLK_CTRL_TIMEOUT_MIN_EXP + div);
-+
-+	return freq;
-+}
-+
-+static struct sdhci_ops sdhci_arasan_ops = {
-+	.get_max_clock = sdhci_pltfm_clk_get_max_clock,
-+	.get_timeout_clock = sdhci_arasan_get_timeout_clock,
-+};
-+
-+static struct sdhci_pltfm_data sdhci_arasan_pdata = {
-+	.ops = &sdhci_arasan_ops,
-+};
-+
-+#ifdef CONFIG_PM_SLEEP
-+/**
-+ * sdhci_arasan_suspend - Suspend method for the driver
-+ * @dev:	Address of the device structure
-+ * Returns 0 on success and error value on error
-+ *
-+ * Put the device in a low power state.
-+ */
-+static int sdhci_arasan_suspend(struct device *dev)
-+{
-+	struct platform_device *pdev = to_platform_device(dev);
-+	struct sdhci_host *host = platform_get_drvdata(pdev);
-+	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
-+	struct sdhci_arasan_data *sdhci_arasan = pltfm_host->priv;
-+	int ret;
-+
-+	ret = sdhci_suspend_host(host);
-+	if (ret)
-+		return ret;
-+
-+	clk_disable(pltfm_host->clk);
-+	clk_disable(sdhci_arasan->clk_ahb);
-+
-+	return 0;
-+}
-+
-+/**
-+ * sdhci_arasan_resume - Resume method for the driver
-+ * @dev:	Address of the device structure
-+ * Returns 0 on success and error value on error
-+ *
-+ * Resume operation after suspend
-+ */
-+static int sdhci_arasan_resume(struct device *dev)
-+{
-+	struct platform_device *pdev = to_platform_device(dev);
-+	struct sdhci_host *host = platform_get_drvdata(pdev);
-+	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
-+	struct sdhci_arasan_data *sdhci_arasan = pltfm_host->priv;
-+	int ret;
-+
-+	ret = clk_enable(sdhci_arasan->clk_ahb);
-+	if (ret) {
-+		dev_err(dev, "Cannot enable AHB clock.\n");
-+		return ret;
-+	}
-+
-+	ret = clk_enable(pltfm_host->clk);
-+	if (ret) {
-+		dev_err(dev, "Cannot enable SD clock.\n");
-+		clk_disable(sdhci_arasan->clk_ahb);
-+		return ret;
-+	}
-+
-+	return sdhci_resume_host(host);
-+}
-+#endif /* ! CONFIG_PM_SLEEP */
-+
-+static SIMPLE_DEV_PM_OPS(sdhci_arasan_dev_pm_ops, sdhci_arasan_suspend,
-+			 sdhci_arasan_resume);
-+
-+static int sdhci_arasan_probe(struct platform_device *pdev)
-+{
-+	int ret;
-+	struct clk *clk_xin;
-+	struct sdhci_host *host;
-+	struct sdhci_pltfm_host *pltfm_host;
-+	struct sdhci_arasan_data *sdhci_arasan;
-+
-+	sdhci_arasan = devm_kzalloc(&pdev->dev, sizeof(*sdhci_arasan),
-+			GFP_KERNEL);
-+	if (!sdhci_arasan)
-+		return -ENOMEM;
-+
-+	sdhci_arasan->clk_ahb = devm_clk_get(&pdev->dev, "clk_ahb");
-+	if (IS_ERR(sdhci_arasan->clk_ahb)) {
-+		dev_err(&pdev->dev, "clk_ahb clock not found.\n");
-+		return PTR_ERR(sdhci_arasan->clk_ahb);
-+	}
-+
-+	clk_xin = devm_clk_get(&pdev->dev, "clk_xin");
-+	if (IS_ERR(clk_xin)) {
-+		dev_err(&pdev->dev, "clk_xin clock not found.\n");
-+		return PTR_ERR(clk_xin);
-+	}
-+
-+	ret = clk_prepare_enable(sdhci_arasan->clk_ahb);
-+	if (ret) {
-+		dev_err(&pdev->dev, "Unable to enable AHB clock.\n");
-+		return ret;
-+	}
-+
-+	ret = clk_prepare_enable(clk_xin);
-+	if (ret) {
-+		dev_err(&pdev->dev, "Unable to enable SD clock.\n");
-+		goto clk_dis_ahb;
-+	}
-+
-+	host = sdhci_pltfm_init(pdev, &sdhci_arasan_pdata);
-+	if (IS_ERR(host)) {
-+		ret = PTR_ERR(host);
-+		dev_err(&pdev->dev, "platform init failed (%u)\n", ret);
-+		goto clk_disable_all;
-+	}
-+
-+	sdhci_get_of_property(pdev);
-+	pltfm_host = sdhci_priv(host);
-+	pltfm_host->priv = sdhci_arasan;
-+	pltfm_host->clk = clk_xin;
-+
-+	ret = sdhci_add_host(host);
-+	if (ret) {
-+		dev_err(&pdev->dev, "platform register failed (%u)\n", ret);
-+		goto err_pltfm_free;
-+	}
-+
-+	return 0;
-+
-+err_pltfm_free:
-+	sdhci_pltfm_free(pdev);
-+clk_disable_all:
-+	clk_disable_unprepare(clk_xin);
-+clk_dis_ahb:
-+	clk_disable_unprepare(sdhci_arasan->clk_ahb);
-+
-+	return ret;
-+}
-+
-+static int sdhci_arasan_remove(struct platform_device *pdev)
-+{
-+	struct sdhci_host *host = platform_get_drvdata(pdev);
-+	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
-+	struct sdhci_arasan_data *sdhci_arasan = pltfm_host->priv;
-+
-+	clk_disable_unprepare(pltfm_host->clk);
-+	clk_disable_unprepare(sdhci_arasan->clk_ahb);
-+
-+	return sdhci_pltfm_unregister(pdev);
-+}
-+
-+static const struct of_device_id sdhci_arasan_of_match[] = {
-+	{ .compatible = "arasan,sdhci-8.9a" },
-+	{ }
-+};
-+MODULE_DEVICE_TABLE(of, sdhci_arasan_of_match);
-+
-+static struct platform_driver sdhci_arasan_driver = {
-+	.driver = {
-+		.name = "sdhci-arasan",
-+		.owner = THIS_MODULE,
-+		.of_match_table = sdhci_arasan_of_match,
-+		.pm = &sdhci_arasan_dev_pm_ops,
-+	},
-+	.probe = sdhci_arasan_probe,
-+	.remove = sdhci_arasan_remove,
-+};
-+
-+module_platform_driver(sdhci_arasan_driver);
-+
-+MODULE_DESCRIPTION("Driver for the Arasan SDHCI Controller");
-+MODULE_AUTHOR("Soeren Brinkmann <soren.brinkmann@xilinx.com>");
-+MODULE_LICENSE("GPL");
diff --git a/patches.zynq/0004-ARM-zynq-use-DT_MACHINE_START.patch b/patches.zynq/0004-ARM-zynq-use-DT_MACHINE_START.patch
deleted file mode 100644
index 88311bb374e39..0000000000000
--- a/patches.zynq/0004-ARM-zynq-use-DT_MACHINE_START.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From cf5f4028141186f861bb0a32d50258d53f059b23 Mon Sep 17 00:00:00 2001
-From: Arnd Bergmann <arnd@arndb.de>
-Date: Thu, 13 Jun 2013 14:13:37 +0200
-Subject: ARM: zynq: use DT_MACHINE_START
-
-The zynq platform code only supports DT based booting, so we
-should use DT_MACHINE_START rather than MACHINE_START.
-
-Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-Cc: Michal Simek <michal.simek@xilinx.com>
-(cherry picked from commit 514a590847ff42dc00ba6c6165736128ad7730a8)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- arch/arm/mach-zynq/common.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c
-index 4130e65a0e3f..5b799c29886e 100644
---- a/arch/arm/mach-zynq/common.c
-+++ b/arch/arm/mach-zynq/common.c
-@@ -101,7 +101,7 @@ static const char * const zynq_dt_match[] = {
- 	NULL
- };
- 
--MACHINE_START(XILINX_EP107, "Xilinx Zynq Platform")
-+DT_MACHINE_START(XILINX_EP107, "Xilinx Zynq Platform")
- 	.smp		= smp_ops(zynq_smp_ops),
- 	.map_io		= zynq_map_io,
- 	.init_machine	= zynq_init_machine,
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0004-net-ethernet-xilinx-Merge-driver-from-Xilinx-reposit.patch b/patches.zynq/0004-net-ethernet-xilinx-Merge-driver-from-Xilinx-reposit.patch
deleted file mode 100644
index fad08ef0bd8e8..0000000000000
--- a/patches.zynq/0004-net-ethernet-xilinx-Merge-driver-from-Xilinx-reposit.patch
+++ /dev/null
@@ -1,4349 +0,0 @@
-From 4158b8d5c7b3e5a2af192c9790a7c759834f8852 Mon Sep 17 00:00:00 2001
-From: Michal Simek <michal.simek@xilinx.com>
-Date: Fri, 20 Dec 2013 10:18:12 +0900
-Subject: net: ethernet: xilinx: Merge driver from Xilinx repository
-
-Update the Xilinx ethernet driver used in ZYNQ to the one in the
-Xilinx repository.
-(commit efc27505715e64526653f35274717c0fc56491e3 in master branch).
-
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/net/ethernet/xilinx/Kconfig               |   19 
- drivers/net/ethernet/xilinx/Makefile              |    1 
- drivers/net/ethernet/xilinx/ll_temac_main.c       |   48 
- drivers/net/ethernet/xilinx/ll_temac_mdio.c       |    5 
- drivers/net/ethernet/xilinx/xilinx_axienet.h      |   78 
- drivers/net/ethernet/xilinx/xilinx_axienet_main.c |  336 +-
- drivers/net/ethernet/xilinx/xilinx_axienet_mdio.c |   86 
- drivers/net/ethernet/xilinx/xilinx_emaclite.c     |   51 
- drivers/net/ethernet/xilinx/xilinx_emacps.c       | 2912 ++++++++++++++++++++++
- 9 files changed, 3261 insertions(+), 275 deletions(-)
- create mode 100644 drivers/net/ethernet/xilinx/xilinx_emacps.c
-
---- a/drivers/net/ethernet/xilinx/Kconfig
-+++ b/drivers/net/ethernet/xilinx/Kconfig
-@@ -27,18 +27,25 @@ config XILINX_EMACLITE
- 
- config XILINX_AXI_EMAC
- 	tristate "Xilinx 10/100/1000 AXI Ethernet support"
--	depends on MICROBLAZE
-+	depends on (MICROBLAZE || ARCH_ZYNQ)
- 	select PHYLIB
- 	---help---
- 	  This driver supports the 10/100/1000 Ethernet from Xilinx for the
- 	  AXI bus interface used in Xilinx Virtex FPGAs.
- 
--config XILINX_LL_TEMAC
--	tristate "Xilinx LL TEMAC (LocalLink Tri-mode Ethernet MAC) driver"
--	depends on (PPC || MICROBLAZE)
-+config XILINX_PS_EMAC
-+	tristate "Xilinx PS tri-speed EMAC support"
-+	depends on ARCH_ZYNQ
- 	select PHYLIB
- 	---help---
--	  This driver supports the Xilinx 10/100/1000 LocalLink TEMAC
--	  core used in Xilinx Spartan and Virtex FPGAs
-+	  This driver supports tri-speed EMAC.
-+
-+config XILINX_PS_EMAC_HWTSTAMP
-+	bool "Generate hardware packet timestamps"
-+	depends on XILINX_PS_EMAC
-+	default n
-+	---help---
-+	  Generate hardare packet timestamps. This is to facilitate IEE 1588.
-+
- 
- endif # NET_VENDOR_XILINX
---- a/drivers/net/ethernet/xilinx/Makefile
-+++ b/drivers/net/ethernet/xilinx/Makefile
-@@ -5,5 +5,6 @@
- ll_temac-objs := ll_temac_main.o ll_temac_mdio.o
- obj-$(CONFIG_XILINX_LL_TEMAC) += ll_temac.o
- obj-$(CONFIG_XILINX_EMACLITE) += xilinx_emaclite.o
-+obj-$(CONFIG_XILINX_PS_EMAC) += xilinx_emacps.o
- xilinx_emac-objs := xilinx_axienet_main.o xilinx_axienet_mdio.o
- obj-$(CONFIG_XILINX_AXI_EMAC) += xilinx_emac.o
---- a/drivers/net/ethernet/xilinx/ll_temac_main.c
-+++ b/drivers/net/ethernet/xilinx/ll_temac_main.c
-@@ -36,7 +36,6 @@
- #include <linux/netdevice.h>
- #include <linux/of.h>
- #include <linux/of_device.h>
--#include <linux/of_irq.h>
- #include <linux/of_mdio.h>
- #include <linux/of_platform.h>
- #include <linux/of_address.h>
-@@ -244,15 +243,15 @@ static int temac_dma_bd_init(struct net_
- 
- 	/* allocate the tx and rx ring buffer descriptors. */
- 	/* returns a virtual address and a physical address. */
--	lp->tx_bd_v = dma_zalloc_coherent(ndev->dev.parent,
--					  sizeof(*lp->tx_bd_v) * TX_BD_NUM,
--					  &lp->tx_bd_p, GFP_KERNEL);
-+	lp->tx_bd_v = dma_alloc_coherent(ndev->dev.parent,
-+					 sizeof(*lp->tx_bd_v) * TX_BD_NUM,
-+					 &lp->tx_bd_p, GFP_KERNEL | __GFP_ZERO);
- 	if (!lp->tx_bd_v)
- 		goto out;
- 
--	lp->rx_bd_v = dma_zalloc_coherent(ndev->dev.parent,
--					  sizeof(*lp->rx_bd_v) * RX_BD_NUM,
--					  &lp->rx_bd_p, GFP_KERNEL);
-+	lp->rx_bd_v = dma_alloc_coherent(ndev->dev.parent,
-+					 sizeof(*lp->rx_bd_v) * RX_BD_NUM,
-+					 &lp->rx_bd_p, GFP_KERNEL | __GFP_ZERO);
- 	if (!lp->rx_bd_v)
- 		goto out;
- 
-@@ -298,12 +297,6 @@ static int temac_dma_bd_init(struct net_
- 		       lp->rx_bd_p + (sizeof(*lp->rx_bd_v) * (RX_BD_NUM - 1)));
- 	lp->dma_out(lp, TX_CURDESC_PTR, lp->tx_bd_p);
- 
--	/* Init descriptor indexes */
--	lp->tx_bd_ci = 0;
--	lp->tx_bd_next = 0;
--	lp->tx_bd_tail = 0;
--	lp->rx_bd_ci = 0;
--
- 	return 0;
- 
- out:
-@@ -685,15 +678,12 @@ static int temac_start_xmit(struct sk_bu
- 	skb_frag_t *frag;
- 
- 	num_frag = skb_shinfo(skb)->nr_frags;
--	frag = &skb_shinfo(skb)->frags[0];
- 	start_p = lp->tx_bd_p + sizeof(*lp->tx_bd_v) * lp->tx_bd_tail;
- 	cur_p = &lp->tx_bd_v[lp->tx_bd_tail];
- 
- 	if (temac_check_tx_bd_space(lp, num_frag)) {
--		if (!netif_queue_stopped(ndev)) {
-+		if (!netif_queue_stopped(ndev))
- 			netif_stop_queue(ndev);
--			return NETDEV_TX_BUSY;
--		}
- 		return NETDEV_TX_BUSY;
- 	}
- 
-@@ -709,11 +699,12 @@ static int temac_start_xmit(struct sk_bu
- 
- 	cur_p->app0 |= STS_CTRL_APP0_SOP;
- 	cur_p->len = skb_headlen(skb);
--	cur_p->phys = dma_map_single(ndev->dev.parent, skb->data, skb->len,
--				     DMA_TO_DEVICE);
-+	cur_p->phys = dma_map_single(ndev->dev.parent, skb->data,
-+				skb_headlen(skb), DMA_TO_DEVICE);
- 	cur_p->app4 = (unsigned long)skb;
- 
- 	for (ii = 0; ii < num_frag; ii++) {
-+		frag = &skb_shinfo(skb)->frags[ii];
- 		lp->tx_bd_tail++;
- 		if (lp->tx_bd_tail >= TX_BD_NUM)
- 			lp->tx_bd_tail = 0;
-@@ -724,7 +715,6 @@ static int temac_start_xmit(struct sk_bu
- 					     skb_frag_size(frag), DMA_TO_DEVICE);
- 		cur_p->len = skb_frag_size(frag);
- 		cur_p->app0 = 0;
--		frag++;
- 	}
- 	cur_p->app0 |= STS_CTRL_APP0_EOP;
- 
-@@ -1014,7 +1004,7 @@ static int temac_of_probe(struct platfor
- 		return -ENOMEM;
- 
- 	ether_setup(ndev);
--	platform_set_drvdata(op, ndev);
-+	dev_set_drvdata(&op->dev, ndev);
- 	SET_NETDEV_DEV(ndev, &op->dev);
- 	ndev->flags &= ~IFF_MULTICAST;  /* clear multicast */
- 	ndev->features = NETIF_F_SG;
-@@ -1052,12 +1042,14 @@ static int temac_of_probe(struct platfor
- 	/* Setup checksum offload, but default to off if not specified */
- 	lp->temac_features = 0;
- 	p = (__be32 *)of_get_property(op->dev.of_node, "xlnx,txcsum", NULL);
-+	dev_info(&op->dev, "TX_CSUM %d\n", be32_to_cpup(p));
- 	if (p && be32_to_cpu(*p)) {
- 		lp->temac_features |= TEMAC_FEATURE_TX_CSUM;
- 		/* Can checksum TCP/UDP over IPv4. */
- 		ndev->features |= NETIF_F_IP_CSUM;
- 	}
- 	p = (__be32 *)of_get_property(op->dev.of_node, "xlnx,rxcsum", NULL);
-+	dev_info(&op->dev, "RX_CSUM %d\n", be32_to_cpup(p));
- 	if (p && be32_to_cpu(*p))
- 		lp->temac_features |= TEMAC_FEATURE_RX_CSUM;
- 
-@@ -1105,14 +1097,15 @@ static int temac_of_probe(struct platfor
- 	}
- 	temac_init_mac_address(ndev, (void *)addr);
- 
--	rc = temac_mdio_setup(lp, op->dev.of_node);
--	if (rc)
--		dev_warn(&op->dev, "error registering MDIO bus\n");
--
- 	lp->phy_node = of_parse_phandle(op->dev.of_node, "phy-handle", 0);
--	if (lp->phy_node)
-+	if (lp->phy_node) {
- 		dev_dbg(lp->dev, "using PHY node %s (%p)\n", np->full_name, np);
- 
-+		rc = temac_mdio_setup(lp, op->dev.of_node);
-+		if (rc)
-+			dev_warn(&op->dev, "error registering MDIO bus\n");
-+	}
-+
- 	/* Add the device attributes */
- 	rc = sysfs_create_group(&lp->dev->kobj, &temac_attr_group);
- 	if (rc) {
-@@ -1143,7 +1136,7 @@ static int temac_of_probe(struct platfor
- 
- static int temac_of_remove(struct platform_device *op)
- {
--	struct net_device *ndev = platform_get_drvdata(op);
-+	struct net_device *ndev = dev_get_drvdata(&op->dev);
- 	struct temac_local *lp = netdev_priv(ndev);
- 
- 	temac_mdio_teardown(lp);
-@@ -1152,6 +1145,7 @@ static int temac_of_remove(struct platfo
- 	if (lp->phy_node)
- 		of_node_put(lp->phy_node);
- 	lp->phy_node = NULL;
-+	dev_set_drvdata(&op->dev, NULL);
- 	iounmap(lp->regs);
- 	if (lp->sdma_regs)
- 		iounmap(lp->sdma_regs);
---- a/drivers/net/ethernet/xilinx/ll_temac_mdio.c
-+++ b/drivers/net/ethernet/xilinx/ll_temac_mdio.c
-@@ -63,6 +63,7 @@ int temac_mdio_setup(struct temac_local
- 	int clk_div;
- 	int rc, size;
- 	struct resource res;
-+	struct device_node *np1 = of_get_parent(lp->phy_node);
- 
- 	/* Calculate a reasonable divisor for the clock rate */
- 	clk_div = 0x3f; /* worst-case default setting */
-@@ -85,7 +86,7 @@ int temac_mdio_setup(struct temac_local
- 	if (!bus)
- 		return -ENOMEM;
- 
--	of_address_to_resource(np, 0, &res);
-+	of_address_to_resource(np1, 0, &res);
- 	snprintf(bus->id, MII_BUS_ID_SIZE, "%.8llx",
- 		 (unsigned long long)res.start);
- 	bus->priv = lp;
-@@ -97,7 +98,7 @@ int temac_mdio_setup(struct temac_local
- 
- 	lp->mii_bus = bus;
- 
--	rc = of_mdiobus_register(bus, np);
-+	rc = of_mdiobus_register(bus, np1);
- 	if (rc)
- 		goto err_register;
- 
---- a/drivers/net/ethernet/xilinx/xilinx_axienet.h
-+++ b/drivers/net/ethernet/xilinx/xilinx_axienet.h
-@@ -9,18 +9,19 @@
- #define XILINX_AXIENET_H
- 
- #include <linux/netdevice.h>
-+#include <linux/of_irq.h>
- #include <linux/spinlock.h>
- #include <linux/interrupt.h>
-+#include <linux/if_vlan.h>
- 
- /* Packet size info */
- #define XAE_HDR_SIZE			14 /* Size of Ethernet header */
--#define XAE_HDR_VLAN_SIZE		18 /* Size of an Ethernet hdr + VLAN */
- #define XAE_TRL_SIZE			 4 /* Size of Ethernet trailer (FCS) */
- #define XAE_MTU			      1500 /* Max MTU of an Ethernet frame */
- #define XAE_JUMBO_MTU		      9000 /* Max MTU of a jumbo Eth. frame */
- 
- #define XAE_MAX_FRAME_SIZE	 (XAE_MTU + XAE_HDR_SIZE + XAE_TRL_SIZE)
--#define XAE_MAX_VLAN_FRAME_SIZE  (XAE_MTU + XAE_HDR_VLAN_SIZE + XAE_TRL_SIZE)
-+#define XAE_MAX_VLAN_FRAME_SIZE  (XAE_MTU + VLAN_ETH_HLEN + XAE_TRL_SIZE)
- #define XAE_MAX_JUMBO_FRAME_SIZE (XAE_JUMBO_MTU + XAE_HDR_SIZE + XAE_TRL_SIZE)
- 
- /* Configuration options */
-@@ -66,20 +67,20 @@
- 
- /* Axi DMA Register definitions */
- 
--#define XAXIDMA_TX_CR_OFFSET	0x00000000 /* Channel control */
--#define XAXIDMA_TX_SR_OFFSET	0x00000004 /* Status */
--#define XAXIDMA_TX_CDESC_OFFSET	0x00000008 /* Current descriptor pointer */
--#define XAXIDMA_TX_TDESC_OFFSET	0x00000010 /* Tail descriptor pointer */
--
--#define XAXIDMA_RX_CR_OFFSET	0x00000030 /* Channel control */
--#define XAXIDMA_RX_SR_OFFSET	0x00000034 /* Status */
--#define XAXIDMA_RX_CDESC_OFFSET	0x00000038 /* Current descriptor pointer */
--#define XAXIDMA_RX_TDESC_OFFSET	0x00000040 /* Tail descriptor pointer */
-+#define XAXIDMA_TX_CR_OFFSET    0x00000000 /* Channel control */
-+#define XAXIDMA_TX_SR_OFFSET    0x00000004 /* Status */
-+#define XAXIDMA_TX_CDESC_OFFSET 0x00000008 /* Current descriptor pointer */
-+#define XAXIDMA_TX_TDESC_OFFSET 0x00000010 /* Tail descriptor pointer */
-+
-+#define XAXIDMA_RX_CR_OFFSET    0x00000030 /* Channel control */
-+#define XAXIDMA_RX_SR_OFFSET    0x00000034 /* Status */
-+#define XAXIDMA_RX_CDESC_OFFSET 0x00000038 /* Current descriptor pointer */
-+#define XAXIDMA_RX_TDESC_OFFSET 0x00000040 /* Tail descriptor pointer */
- 
--#define XAXIDMA_CR_RUNSTOP_MASK	0x00000001 /* Start/stop DMA channel */
--#define XAXIDMA_CR_RESET_MASK	0x00000004 /* Reset DMA engine */
-+#define XAXIDMA_CR_RUNSTOP_MASK 0x00000001 /* Start/stop DMA channel */
-+#define XAXIDMA_CR_RESET_MASK   0x00000004 /* Reset DMA engine */
- 
--#define XAXIDMA_BD_NDESC_OFFSET		0x00 /* Next descriptor pointer */
-+#define XAXIDMA_BD_NDESC_OFFSET	0x00 /* Next descriptor pointer */
- #define XAXIDMA_BD_BUFA_OFFSET		0x08 /* Buffer address */
- #define XAXIDMA_BD_CTRL_LEN_OFFSET	0x18 /* Control/buffer length */
- #define XAXIDMA_BD_STS_OFFSET		0x1C /* Status */
-@@ -93,8 +94,8 @@
- #define XAXIDMA_BD_HAS_DRE_OFFSET	0x3C /* Whether has DRE */
- 
- #define XAXIDMA_BD_HAS_DRE_SHIFT	8 /* Whether has DRE shift */
--#define XAXIDMA_BD_HAS_DRE_MASK		0xF00 /* Whether has DRE mask */
--#define XAXIDMA_BD_WORDLEN_MASK		0xFF /* Whether has DRE mask */
-+#define XAXIDMA_BD_HAS_DRE_MASK	0xF00 /* Whether has DRE mask */
-+#define XAXIDMA_BD_WORDLEN_MASK	0xFF /* Whether has DRE mask */
- 
- #define XAXIDMA_BD_CTRL_LENGTH_MASK	0x007FFFFF /* Requested len */
- #define XAXIDMA_BD_CTRL_TXSOF_MASK	0x08000000 /* First tx packet */
-@@ -130,7 +131,7 @@
- #define XAXIDMA_BD_STS_ALL_ERR_MASK	0x70000000 /* All errors */
- #define XAXIDMA_BD_STS_RXSOF_MASK	0x08000000 /* First rx pkt */
- #define XAXIDMA_BD_STS_RXEOF_MASK	0x04000000 /* Last rx pkt */
--#define XAXIDMA_BD_STS_ALL_MASK		0xFC000000 /* All status bits */
-+#define XAXIDMA_BD_STS_ALL_MASK	0xFC000000 /* All status bits */
- 
- #define XAXIDMA_BD_MINIMUM_ALIGNMENT	0x40
- 
-@@ -158,7 +159,7 @@
- #define XAE_MDIO_MCR_OFFSET	0x00000504 /* MII Management Control */
- #define XAE_MDIO_MWD_OFFSET	0x00000508 /* MII Management Write Data */
- #define XAE_MDIO_MRD_OFFSET	0x0000050C /* MII Management Read Data */
--#define XAE_MDIO_MIS_OFFSET	0x00000600 /* MII Management Interrupt Status */
-+#define XAE_MDIO_MIS_OFFSET	0x00000600 /* MII Management Int. Status */
- #define XAE_MDIO_MIP_OFFSET	0x00000620 /* MII Mgmt Interrupt Pending
- 					    * register offset */
- #define XAE_MDIO_MIE_OFFSET	0x00000640 /* MII Management Interrupt Enable
-@@ -180,16 +181,16 @@
- 						    * destination address */
- #define XAE_RAF_BCSTREJ_MASK		0x00000004 /* Reject receive broadcast
- 						    * destination address */
--#define XAE_RAF_TXVTAGMODE_MASK		0x00000018 /* Tx VLAN TAG mode */
--#define XAE_RAF_RXVTAGMODE_MASK		0x00000060 /* Rx VLAN TAG mode */
-+#define XAE_RAF_TXVTAGMODE_MASK	0x00000018 /* Tx VLAN TAG mode */
-+#define XAE_RAF_RXVTAGMODE_MASK	0x00000060 /* Rx VLAN TAG mode */
- #define XAE_RAF_TXVSTRPMODE_MASK	0x00000180 /* Tx VLAN STRIP mode */
- #define XAE_RAF_RXVSTRPMODE_MASK	0x00000600 /* Rx VLAN STRIP mode */
--#define XAE_RAF_NEWFNCENBL_MASK		0x00000800 /* New function mode */
-+#define XAE_RAF_NEWFNCENBL_MASK	0x00000800 /* New function mode */
- #define XAE_RAF_EMULTIFLTRENBL_MASK	0x00001000 /* Exteneded Multicast
- 						    * Filtering mode
- 						    */
- #define XAE_RAF_STATSRST_MASK		0x00002000 /* Stats. Counter Reset */
--#define XAE_RAF_RXBADFRMEN_MASK		0x00004000 /* Recv Bad Frame Enable */
-+#define XAE_RAF_RXBADFRMEN_MASK	0x00004000 /* Recv Bad Frame Enable */
- #define XAE_RAF_TXVTAGMODE_SHIFT	3 /* Tx Tag mode shift bits */
- #define XAE_RAF_RXVTAGMODE_SHIFT	5 /* Rx Tag mode shift bits */
- #define XAE_RAF_TXVSTRPMODE_SHIFT	7 /* Tx strip mode shift bits*/
-@@ -273,22 +274,22 @@
- #define XAE_PHYC_SGMIILINKSPEED_MASK	0xC0000000 /* SGMII link speed mask*/
- #define XAE_PHYC_RGMIILINKSPEED_MASK	0x0000000C /* RGMII link speed */
- #define XAE_PHYC_RGMIIHD_MASK		0x00000002 /* RGMII Half-duplex */
--#define XAE_PHYC_RGMIILINK_MASK		0x00000001 /* RGMII link status */
-+#define XAE_PHYC_RGMIILINK_MASK	0x00000001 /* RGMII link status */
- #define XAE_PHYC_RGLINKSPD_10		0x00000000 /* RGMII link 10 Mbit */
- #define XAE_PHYC_RGLINKSPD_100		0x00000004 /* RGMII link 100 Mbit */
--#define XAE_PHYC_RGLINKSPD_1000		0x00000008 /* RGMII link 1000 Mbit */
-+#define XAE_PHYC_RGLINKSPD_1000	0x00000008 /* RGMII link 1000 Mbit */
- #define XAE_PHYC_SGLINKSPD_10		0x00000000 /* SGMII link 10 Mbit */
- #define XAE_PHYC_SGLINKSPD_100		0x40000000 /* SGMII link 100 Mbit */
--#define XAE_PHYC_SGLINKSPD_1000		0x80000000 /* SGMII link 1000 Mbit */
-+#define XAE_PHYC_SGLINKSPD_1000	0x80000000 /* SGMII link 1000 Mbit */
- 
- /* Bit masks for Axi Ethernet MDIO interface MC register */
--#define XAE_MDIO_MC_MDIOEN_MASK		0x00000040 /* MII management enable */
-+#define XAE_MDIO_MC_MDIOEN_MASK	0x00000040 /* MII management enable */
- #define XAE_MDIO_MC_CLOCK_DIVIDE_MAX	0x3F	   /* Maximum MDIO divisor */
- 
- /* Bit masks for Axi Ethernet MDIO interface MCR register */
--#define XAE_MDIO_MCR_PHYAD_MASK		0x1F000000 /* Phy Address Mask */
-+#define XAE_MDIO_MCR_PHYAD_MASK	0x1F000000 /* Phy Address Mask */
- #define XAE_MDIO_MCR_PHYAD_SHIFT	24	   /* Phy Address Shift */
--#define XAE_MDIO_MCR_REGAD_MASK		0x001F0000 /* Reg Address Mask */
-+#define XAE_MDIO_MCR_REGAD_MASK	0x001F0000 /* Reg Address Mask */
- #define XAE_MDIO_MCR_REGAD_SHIFT	16	   /* Reg Address Shift */
- #define XAE_MDIO_MCR_OP_MASK		0x0000C000 /* Operation Code Mask */
- #define XAE_MDIO_MCR_OP_SHIFT		13	   /* Operation Code Shift */
-@@ -312,13 +313,13 @@
- 
- #define XAE_MDIO_DIV_DFT		29 /* Default MDIO clock divisor */
- 
--/* Defines for different options for C_PHY_TYPE parameter in Axi Ethernet IP */
-+/* Defines different options for C_PHY_TYPE parameter in Axi Ethernet IP */
- #define XAE_PHY_TYPE_MII		0
- #define XAE_PHY_TYPE_GMII		1
- #define XAE_PHY_TYPE_RGMII_1_3		2
- #define XAE_PHY_TYPE_RGMII_2_0		3
- #define XAE_PHY_TYPE_SGMII		4
--#define XAE_PHY_TYPE_1000BASE_X		5
-+#define XAE_PHY_TYPE_1000BASE_X	5
- 
- #define XAE_MULTICAST_CAM_TABLE_NUM	4 /* Total number of entries in the
- 					   * hardware multicast table. */
-@@ -337,6 +338,14 @@
- 
- #define DELAY_OF_ONE_MILLISEC		1000
- 
-+/* Read/Write access to the registers */
-+#ifndef out_be32
-+#ifdef CONFIG_ARCH_ZYNQ
-+#define in_be32(offset)		__raw_readl(offset)
-+#define out_be32(offset, val)	__raw_writel(val, offset)
-+#endif
-+#endif
-+
- /**
-  * struct axidma_bd - Axi Dma buffer descriptor layout
-  * @next:         MM2S/S2MM Next Descriptor Pointer
-@@ -408,8 +417,9 @@ struct axidma_bd {
-  *		  Txed/Rxed in the existing hardware. If jumbo option is
-  *		  supported, the maximum frame size would be 9k. Else it is
-  *		  1522 bytes (assuming support for basic VLAN)
-- * @jumbo_support: Stores hardware configuration for jumbo support. If hardware
-- *		   can handle jumbo packets, this entry will be 1, else 0.
-+ * @jumbo_support: Stores hardware configuration for jumbo support. If
-+ *		hardware can handle jumbo packets, this entry will be 1,
-+ *		else 0.
-  */
- struct axienet_local {
- 	struct net_device *ndev;
-@@ -434,7 +444,7 @@ struct axienet_local {
- 	u32 temac_type;
- 	u32 phy_type;
- 
--	u32 options;			/* Current options word */
-+	u32 options; /* Current options word */
- 	u32 last_link;
- 	u32 features;
- 
-@@ -448,7 +458,7 @@ struct axienet_local {
- 	u32 rx_bd_ci;
- 
- 	u32 max_frm_size;
--	u32 jumbo_support;
-+	u32 rxmem;
- 
- 	int csum_offload_on_tx_path;
- 	int csum_offload_on_rx_path;
---- a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
-+++ b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
-@@ -201,15 +201,17 @@ static int axienet_dma_bd_init(struct ne
- 	/*
- 	 * Allocate the Tx and Rx buffer descriptors.
- 	 */
--	lp->tx_bd_v = dma_zalloc_coherent(ndev->dev.parent,
--					  sizeof(*lp->tx_bd_v) * TX_BD_NUM,
--					  &lp->tx_bd_p, GFP_KERNEL);
-+	lp->tx_bd_v = dma_alloc_coherent(ndev->dev.parent,
-+					 sizeof(*lp->tx_bd_v) * TX_BD_NUM,
-+					 &lp->tx_bd_p,
-+					 GFP_KERNEL | __GFP_ZERO);
- 	if (!lp->tx_bd_v)
- 		goto out;
- 
--	lp->rx_bd_v = dma_zalloc_coherent(ndev->dev.parent,
--					  sizeof(*lp->rx_bd_v) * RX_BD_NUM,
--					  &lp->rx_bd_p, GFP_KERNEL);
-+	lp->rx_bd_v = dma_alloc_coherent(ndev->dev.parent,
-+					 sizeof(*lp->rx_bd_v) * RX_BD_NUM,
-+					 &lp->rx_bd_p,
-+					 GFP_KERNEL | __GFP_ZERO);
- 	if (!lp->rx_bd_v)
- 		goto out;
- 
-@@ -263,7 +265,8 @@ static int axienet_dma_bd_init(struct ne
- 	axienet_dma_out32(lp, XAXIDMA_TX_CR_OFFSET, cr);
- 
- 	/* Populate the tail pointer and bring the Rx Axi DMA engine out of
--	 * halted state. This will make the Rx side ready for reception.*/
-+	 * halted state. This will make the Rx side ready for reception.
-+	 */
- 	axienet_dma_out32(lp, XAXIDMA_RX_CDESC_OFFSET, lp->rx_bd_p);
- 	cr = axienet_dma_in32(lp, XAXIDMA_RX_CR_OFFSET);
- 	axienet_dma_out32(lp, XAXIDMA_RX_CR_OFFSET,
-@@ -273,7 +276,8 @@ static int axienet_dma_bd_init(struct ne
- 
- 	/* Write to the RS (Run-stop) bit in the Tx channel control register.
- 	 * Tx channel is now ready to run. But only after we write to the
--	 * tail pointer register that the Tx channel will start transmitting */
-+	 * tail pointer register that the Tx channel will start transmitting.
-+	 */
- 	axienet_dma_out32(lp, XAXIDMA_TX_CDESC_OFFSET, lp->tx_bd_p);
- 	cr = axienet_dma_in32(lp, XAXIDMA_TX_CR_OFFSET);
- 	axienet_dma_out32(lp, XAXIDMA_TX_CR_OFFSET,
-@@ -354,7 +358,8 @@ static void axienet_set_multicast_list(s
- 	    netdev_mc_count(ndev) > XAE_MULTICAST_CAM_TABLE_NUM) {
- 		/* We must make the kernel realize we had to move into
- 		 * promiscuous mode. If it was a promiscuous mode request
--		 * the flag is already set. If not we set it. */
-+		 * the flag is already set. If not we set it.
-+		 */
- 		ndev->flags |= IFF_PROMISC;
- 		reg = axienet_ior(lp, XAE_FMI_OFFSET);
- 		reg |= XAE_FMI_PM_MASK;
-@@ -438,14 +443,15 @@ static void __axienet_device_reset(struc
- 	/* Reset Axi DMA. This would reset Axi Ethernet core as well. The reset
- 	 * process of Axi DMA takes a while to complete as all pending
- 	 * commands/transfers will be flushed or completed during this
--	 * reset process. */
-+	 * reset process.
-+	 */
- 	axienet_dma_out32(lp, offset, XAXIDMA_CR_RESET_MASK);
- 	timeout = DELAY_OF_ONE_MILLISEC;
- 	while (axienet_dma_in32(lp, offset) & XAXIDMA_CR_RESET_MASK) {
- 		udelay(1);
- 		if (--timeout == 0) {
--			dev_err(dev, "axienet_device_reset DMA "
--				"reset timeout!\n");
-+			dev_err(dev,
-+				"axienet_device_reset DMA reset timeout!\n");
- 			break;
- 		}
- 	}
-@@ -471,18 +477,21 @@ static void axienet_device_reset(struct
- 	__axienet_device_reset(lp, &ndev->dev, XAXIDMA_RX_CR_OFFSET);
- 
- 	lp->max_frm_size = XAE_MAX_VLAN_FRAME_SIZE;
-+	lp->options |= XAE_OPTION_VLAN;
- 	lp->options &= (~XAE_OPTION_JUMBO);
- 
- 	if ((ndev->mtu > XAE_MTU) &&
--	    (ndev->mtu <= XAE_JUMBO_MTU) &&
--	    (lp->jumbo_support)) {
--		lp->max_frm_size = ndev->mtu + XAE_HDR_VLAN_SIZE +
--				   XAE_TRL_SIZE;
--		lp->options |= XAE_OPTION_JUMBO;
-+		(ndev->mtu <= XAE_JUMBO_MTU)) {
-+		lp->max_frm_size = ndev->mtu + VLAN_ETH_HLEN +
-+					XAE_TRL_SIZE;
-+
-+		if (lp->max_frm_size <= lp->rxmem)
-+			lp->options |= XAE_OPTION_JUMBO;
- 	}
- 
- 	if (axienet_dma_bd_init(ndev)) {
--		dev_err(&ndev->dev, "axienet_device_reset descriptor "
-+		dev_err(&ndev->dev,
-+			"axienet_device_reset descriptor "
- 			"allocation failed\n");
- 	}
- 
-@@ -497,7 +506,8 @@ static void axienet_device_reset(struct
- 	axienet_iow(lp, XAE_FCC_OFFSET, XAE_FCC_FCRX_MASK);
- 
- 	/* Sync default options with HW but leave receiver and
--	 * transmitter disabled.*/
-+	 * transmitter disabled.
-+	 */
- 	axienet_setoptions(ndev, lp->options &
- 			   ~(XAE_OPTION_TXEN | XAE_OPTION_RXEN));
- 	axienet_set_mac_address(ndev, NULL);
-@@ -549,7 +559,8 @@ static void axienet_adjust_link(struct n
- 				emmc_reg |= XAE_EMMC_LINKSPD_10;
- 				break;
- 			default:
--				dev_err(&ndev->dev, "Speed other than 10, 100 "
-+				dev_err(&ndev->dev,
-+					"Speed other than 10, 100 "
- 					"or 1Gbps is not supported\n");
- 				break;
- 			}
-@@ -558,8 +569,8 @@ static void axienet_adjust_link(struct n
- 			lp->last_link = link_state;
- 			phy_print_status(phy);
- 		} else {
--			dev_err(&ndev->dev, "Error setting Axi Ethernet "
--				"mac speed\n");
-+			dev_err(&ndev->dev,
-+				"Error setting Axi Ethernet mac speed\n");
- 		}
- 	}
- }
-@@ -601,7 +612,8 @@ static void axienet_start_xmit_done(stru
- 		size += status & XAXIDMA_BD_STS_ACTUAL_LEN_MASK;
- 		packets++;
- 
--		lp->tx_bd_ci = ++lp->tx_bd_ci % TX_BD_NUM;
-+		++lp->tx_bd_ci;
-+		lp->tx_bd_ci %= TX_BD_NUM;
- 		cur_p = &lp->tx_bd_v[lp->tx_bd_ci];
- 		status = cur_p->status;
- 	}
-@@ -687,7 +699,8 @@ static int axienet_start_xmit(struct sk_
- 				     skb_headlen(skb), DMA_TO_DEVICE);
- 
- 	for (ii = 0; ii < num_frag; ii++) {
--		lp->tx_bd_tail = ++lp->tx_bd_tail % TX_BD_NUM;
-+		++lp->tx_bd_tail;
-+		lp->tx_bd_tail %= TX_BD_NUM;
- 		cur_p = &lp->tx_bd_v[lp->tx_bd_tail];
- 		frag = &skb_shinfo(skb)->frags[ii];
- 		cur_p->phys = dma_map_single(ndev->dev.parent,
-@@ -701,9 +714,12 @@ static int axienet_start_xmit(struct sk_
- 	cur_p->app4 = (unsigned long)skb;
- 
- 	tail_p = lp->tx_bd_p + sizeof(*lp->tx_bd_v) * lp->tx_bd_tail;
-+	wmb();
-+
- 	/* Start the transfer */
- 	axienet_dma_out32(lp, XAXIDMA_TX_TDESC_OFFSET, tail_p);
--	lp->tx_bd_tail = ++lp->tx_bd_tail % TX_BD_NUM;
-+	++lp->tx_bd_tail;
-+	lp->tx_bd_tail %= TX_BD_NUM;
- 
- 	return NETDEV_TX_OK;
- }
-@@ -723,15 +739,16 @@ static void axienet_recv(struct net_devi
- 	u32 csumstatus;
- 	u32 size = 0;
- 	u32 packets = 0;
--	dma_addr_t tail_p;
-+	dma_addr_t tail_p = 0;
- 	struct axienet_local *lp = netdev_priv(ndev);
- 	struct sk_buff *skb, *new_skb;
- 	struct axidma_bd *cur_p;
- 
--	tail_p = lp->rx_bd_p + sizeof(*lp->rx_bd_v) * lp->rx_bd_ci;
-+	rmb();
- 	cur_p = &lp->rx_bd_v[lp->rx_bd_ci];
- 
- 	while ((cur_p->status & XAXIDMA_BD_STS_COMPLETE_MASK)) {
-+		tail_p = lp->rx_bd_p + sizeof(*lp->rx_bd_v) * lp->rx_bd_ci;
- 		skb = (struct sk_buff *) (cur_p->sw_id_offset);
- 		length = cur_p->app4 & 0x0000FFFF;
- 
-@@ -775,14 +792,16 @@ static void axienet_recv(struct net_devi
- 		cur_p->status = 0;
- 		cur_p->sw_id_offset = (u32) new_skb;
- 
--		lp->rx_bd_ci = ++lp->rx_bd_ci % RX_BD_NUM;
-+		++lp->rx_bd_ci;
-+		lp->rx_bd_ci %= RX_BD_NUM;
- 		cur_p = &lp->rx_bd_v[lp->rx_bd_ci];
- 	}
- 
- 	ndev->stats.rx_packets += packets;
- 	ndev->stats.rx_bytes += size;
- 
--	axienet_dma_out32(lp, XAXIDMA_RX_TDESC_OFFSET, tail_p);
-+	if (tail_p)
-+		axienet_dma_out32(lp, XAXIDMA_RX_TDESC_OFFSET, tail_p);
- }
- 
- /**
-@@ -804,6 +823,7 @@ static irqreturn_t axienet_tx_irq(int ir
- 
- 	status = axienet_dma_in32(lp, XAXIDMA_TX_SR_OFFSET);
- 	if (status & (XAXIDMA_IRQ_IOC_MASK | XAXIDMA_IRQ_DELAY_MASK)) {
-+		axienet_dma_out32(lp, XAXIDMA_TX_SR_OFFSET, status);
- 		axienet_start_xmit_done(lp->ndev);
- 		goto out;
- 	}
-@@ -827,9 +847,9 @@ static irqreturn_t axienet_tx_irq(int ir
- 		axienet_dma_out32(lp, XAXIDMA_RX_CR_OFFSET, cr);
- 
- 		tasklet_schedule(&lp->dma_err_tasklet);
-+		axienet_dma_out32(lp, XAXIDMA_TX_SR_OFFSET, status);
- 	}
- out:
--	axienet_dma_out32(lp, XAXIDMA_TX_SR_OFFSET, status);
- 	return IRQ_HANDLED;
- }
- 
-@@ -852,6 +872,7 @@ static irqreturn_t axienet_rx_irq(int ir
- 
- 	status = axienet_dma_in32(lp, XAXIDMA_RX_SR_OFFSET);
- 	if (status & (XAXIDMA_IRQ_IOC_MASK | XAXIDMA_IRQ_DELAY_MASK)) {
-+		axienet_dma_out32(lp, XAXIDMA_RX_SR_OFFSET, status);
- 		axienet_recv(lp->ndev);
- 		goto out;
- 	}
-@@ -875,9 +896,9 @@ static irqreturn_t axienet_rx_irq(int ir
- 		axienet_dma_out32(lp, XAXIDMA_RX_CR_OFFSET, cr);
- 
- 		tasklet_schedule(&lp->dma_err_tasklet);
-+		axienet_dma_out32(lp, XAXIDMA_RX_SR_OFFSET, status);
- 	}
- out:
--	axienet_dma_out32(lp, XAXIDMA_RX_SR_OFFSET, status);
- 	return IRQ_HANDLED;
- }
- 
-@@ -891,10 +912,10 @@ static void axienet_dma_err_handler(unsi
-  *	    -ENODEV, if PHY cannot be connected to
-  *	    non-zero error value on failure
-  *
-- * This is the driver open routine. It calls phy_start to start the PHY device.
-- * It also allocates interrupt service routines, enables the interrupt lines
-- * and ISR handling. Axi Ethernet core is reset through Axi DMA core. Buffer
-- * descriptors are initialized.
-+ * This is the driver open routine. It calls phy_start to start the PHY
-+ * device. It also allocates interrupt service routines, enables the
-+ * interrupt lines and ISR handling. Axi Ethernet core is reset through Axi
-+ * DMA core. Buffer descriptors are initialized.
-  */
- static int axienet_open(struct net_device *ndev)
- {
-@@ -910,7 +931,8 @@ static int axienet_open(struct net_devic
- 	/* Disable the MDIO interface till Axi Ethernet Reset is completed.
- 	 * When we do an Axi Ethernet reset, it resets the complete core
- 	 * including the MDIO. If MDIO is not disabled when the reset
--	 * process is started, MDIO will be broken afterwards. */
-+	 * process is started, MDIO will be broken afterwards.
-+	 */
- 	axienet_iow(lp, XAE_MDIO_MC_OFFSET,
- 		    (mdio_mcreg & (~XAE_MDIO_MC_MDIOEN_MASK)));
- 	axienet_device_reset(ndev);
-@@ -921,14 +943,20 @@ static int axienet_open(struct net_devic
- 		return ret;
- 
- 	if (lp->phy_node) {
--		lp->phy_dev = of_phy_connect(lp->ndev, lp->phy_node,
-+		if (lp->phy_type == XAE_PHY_TYPE_GMII) {
-+			lp->phy_dev = of_phy_connect(lp->ndev, lp->phy_node,
- 					     axienet_adjust_link, 0,
- 					     PHY_INTERFACE_MODE_GMII);
--		if (!lp->phy_dev) {
--			dev_err(lp->dev, "of_phy_connect() failed\n");
--			return -ENODEV;
-+		} else if (lp->phy_type == XAE_PHY_TYPE_RGMII_2_0) {
-+			lp->phy_dev = of_phy_connect(lp->ndev, lp->phy_node,
-+					     axienet_adjust_link, 0,
-+					     PHY_INTERFACE_MODE_RGMII_ID);
- 		}
--		phy_start(lp->phy_dev);
-+
-+		if (!lp->phy_dev)
-+			dev_err(lp->dev, "of_phy_connect() failed\n");
-+		else
-+			phy_start(lp->phy_dev);
- 	}
- 
- 	/* Enable tasklets for Axi DMA error handling */
-@@ -1013,15 +1041,15 @@ static int axienet_change_mtu(struct net
- 
- 	if (netif_running(ndev))
- 		return -EBUSY;
--	if (lp->jumbo_support) {
--		if ((new_mtu > XAE_JUMBO_MTU) || (new_mtu < 64))
--			return -EINVAL;
--		ndev->mtu = new_mtu;
--	} else {
--		if ((new_mtu > XAE_MTU) || (new_mtu < 64))
--			return -EINVAL;
--		ndev->mtu = new_mtu;
--	}
-+
-+	if ((new_mtu + VLAN_ETH_HLEN +
-+		XAE_TRL_SIZE) > lp->rxmem)
-+		return -EINVAL;
-+
-+	if ((new_mtu > XAE_JUMBO_MTU) || (new_mtu < 64))
-+		return -EINVAL;
-+
-+	ndev->mtu = new_mtu;
- 
- 	return 0;
- }
-@@ -1031,8 +1059,8 @@ static int axienet_change_mtu(struct net
-  * axienet_poll_controller - Axi Ethernet poll mechanism.
-  * @ndev:	Pointer to net_device structure
-  *
-- * This implements Rx/Tx ISR poll mechanisms. The interrupts are disabled prior
-- * to polling the ISRs and are enabled back after the polling is done.
-+ * This implements Rx/Tx ISR poll mechanisms. The interrupts are disabled
-+ * prior to polling the ISRs and are enabled back after the polling is done.
-  */
- static void axienet_poll_controller(struct net_device *ndev)
- {
-@@ -1046,6 +1074,20 @@ static void axienet_poll_controller(stru
- }
- #endif
- 
-+/* Ioctl MII Interface */
-+static int axienet_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
-+{
-+	struct axienet_local *priv = netdev_priv(dev);
-+
-+	if (!netif_running(dev))
-+		return -EINVAL;
-+
-+	if (!priv->phy_dev)
-+		return -EOPNOTSUPP;
-+
-+	return phy_mii_ioctl(priv->phy_dev, rq, cmd);
-+}
-+
- static const struct net_device_ops axienet_netdev_ops = {
- 	.ndo_open = axienet_open,
- 	.ndo_stop = axienet_stop,
-@@ -1054,6 +1096,7 @@ static const struct net_device_ops axien
- 	.ndo_set_mac_address = netdev_set_mac_address,
- 	.ndo_validate_addr = eth_validate_addr,
- 	.ndo_set_rx_mode = axienet_set_multicast_list,
-+	.ndo_do_ioctl = axienet_ioctl,
- #ifdef CONFIG_NET_POLL_CONTROLLER
- 	.ndo_poll_controller = axienet_poll_controller,
- #endif
-@@ -1209,7 +1252,7 @@ axienet_ethtools_get_pauseparam(struct n
-  * axienet_ethtools_set_pauseparam - Set device pause parameter(flow control)
-  *				     settings.
-  * @ndev:	Pointer to net_device structure
-- * @epauseparam:Pointer to ethtool_pauseparam structure
-+ * @epauseparm:Pointer to ethtool_pauseparam structure
-  *
-  * This implements ethtool command for enabling flow control on Rx and Tx
-  * paths. Issue "ethtool -A ethX tx on|off" under linux prompt to execute this
-@@ -1223,8 +1266,9 @@ axienet_ethtools_set_pauseparam(struct n
- 	struct axienet_local *lp = netdev_priv(ndev);
- 
- 	if (netif_running(ndev)) {
--		printk(KERN_ERR	"%s: Please stop netif before applying "
--		       "configruation\n", ndev->name);
-+		dev_err(&ndev->dev,
-+			"%s: Please stop netif before configuration\n",
-+			ndev->name);
- 		return -EFAULT;
- 	}
- 
-@@ -1280,8 +1324,9 @@ static int axienet_ethtools_set_coalesce
- 	struct axienet_local *lp = netdev_priv(ndev);
- 
- 	if (netif_running(ndev)) {
--		printk(KERN_ERR	"%s: Please stop netif before applying "
--		       "configruation\n", ndev->name);
-+		dev_err(&ndev->dev,
-+			"%s: Please stop netif before configuration\n",
-+			ndev->name);
- 		return -EFAULT;
- 	}
- 
-@@ -1350,7 +1395,8 @@ static void axienet_dma_err_handler(unsi
- 	/* Disable the MDIO interface till Axi Ethernet Reset is completed.
- 	 * When we do an Axi Ethernet reset, it resets the complete core
- 	 * including the MDIO. So if MDIO is not disabled when the reset
--	 * process is started, MDIO will be broken afterwards. */
-+	 * process is started, MDIO will be broken afterwards.
-+	 */
- 	axienet_iow(lp, XAE_MDIO_MC_OFFSET, (mdio_mcreg &
- 		    ~XAE_MDIO_MC_MDIOEN_MASK));
- 
-@@ -1421,7 +1467,8 @@ static void axienet_dma_err_handler(unsi
- 	axienet_dma_out32(lp, XAXIDMA_TX_CR_OFFSET, cr);
- 
- 	/* Populate the tail pointer and bring the Rx Axi DMA engine out of
--	 * halted state. This will make the Rx side ready for reception.*/
-+	 * halted state. This will make the Rx side ready for reception.
-+	 */
- 	axienet_dma_out32(lp, XAXIDMA_RX_CDESC_OFFSET, lp->rx_bd_p);
- 	cr = axienet_dma_in32(lp, XAXIDMA_RX_CR_OFFSET);
- 	axienet_dma_out32(lp, XAXIDMA_RX_CR_OFFSET,
-@@ -1431,7 +1478,8 @@ static void axienet_dma_err_handler(unsi
- 
- 	/* Write to the RS (Run-stop) bit in the Tx channel control register.
- 	 * Tx channel is now ready to run. But only after we write to the
--	 * tail pointer register that the Tx channel will start transmitting */
-+	 * tail pointer register that the Tx channel will start transmitting
-+	 */
- 	axienet_dma_out32(lp, XAXIDMA_TX_CDESC_OFFSET, lp->tx_bd_p);
- 	cr = axienet_dma_in32(lp, XAXIDMA_TX_CR_OFFSET);
- 	axienet_dma_out32(lp, XAXIDMA_TX_CR_OFFSET,
-@@ -1447,7 +1495,8 @@ static void axienet_dma_err_handler(unsi
- 	axienet_iow(lp, XAE_FCC_OFFSET, XAE_FCC_FCRX_MASK);
- 
- 	/* Sync default options with HW but leave receiver and
--	 * transmitter disabled.*/
-+	 * transmitter disabled.
-+	 */
- 	axienet_setoptions(ndev, lp->options &
- 			   ~(XAE_OPTION_TXEN | XAE_OPTION_RXEN));
- 	axienet_set_mac_address(ndev, NULL);
-@@ -1456,77 +1505,84 @@ static void axienet_dma_err_handler(unsi
- }
- 
- /**
-- * axienet_of_probe - Axi Ethernet probe function.
-- * @op:		Pointer to platform device structure.
-- * @match:	Pointer to device id structure
-+ * axienet_probe - Axi Ethernet probe function.
-+ * @pdev:		Pointer to platform device structure.
-  *
-  * returns: 0, on success
-  *	    Non-zero error value on failure.
-  *
-  * This is the probe routine for Axi Ethernet driver. This is called before
-- * any other driver routines are invoked. It allocates and sets up the Ethernet
-- * device. Parses through device tree and populates fields of
-+ * any other driver routines are invoked. It allocates and sets up the
-+ * Ethernet device. Parses through device tree and populates fields of
-  * axienet_local. It registers the Ethernet device.
-  */
--static int axienet_of_probe(struct platform_device *op)
-+static int axienet_probe(struct platform_device *pdev)
- {
--	__be32 *p;
--	int size, ret = 0;
-+	int ret;
- 	struct device_node *np;
- 	struct axienet_local *lp;
- 	struct net_device *ndev;
--	const void *addr;
-+	u8 mac_addr[6];
-+	struct resource *ethres, dmares;
-+	u32 value;
- 
- 	ndev = alloc_etherdev(sizeof(*lp));
- 	if (!ndev)
- 		return -ENOMEM;
- 
- 	ether_setup(ndev);
--	platform_set_drvdata(op, ndev);
-+	platform_set_drvdata(pdev, ndev);
- 
--	SET_NETDEV_DEV(ndev, &op->dev);
-+	SET_NETDEV_DEV(ndev, &pdev->dev);
- 	ndev->flags &= ~IFF_MULTICAST;  /* clear multicast */
--	ndev->features = NETIF_F_SG;
-+	ndev->features = 0;
- 	ndev->netdev_ops = &axienet_netdev_ops;
- 	ndev->ethtool_ops = &axienet_ethtool_ops;
- 
- 	lp = netdev_priv(ndev);
- 	lp->ndev = ndev;
--	lp->dev = &op->dev;
-+	lp->dev = &pdev->dev;
- 	lp->options = XAE_OPTION_DEFAULTS;
- 	/* Map device registers */
--	lp->regs = of_iomap(op->dev.of_node, 0);
-+	ethres = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+	lp->regs = devm_ioremap_resource(&pdev->dev, ethres);
- 	if (!lp->regs) {
--		dev_err(&op->dev, "could not map Axi Ethernet regs.\n");
--		goto nodev;
-+		dev_err(&pdev->dev, "could not map Axi Ethernet regs.\n");
-+		ret = -ENOMEM;
-+		goto free_netdev;
- 	}
-+
- 	/* Setup checksum offload, but default to off if not specified */
- 	lp->features = 0;
- 
--	p = (__be32 *) of_get_property(op->dev.of_node, "xlnx,txcsum", NULL);
--	if (p) {
--		switch (be32_to_cpup(p)) {
-+	ret = of_property_read_u32(pdev->dev.of_node, "xlnx,txcsum", &value);
-+	if (!ret) {
-+		dev_info(&pdev->dev, "TX_CSUM %d\n", value);
-+
-+		switch (value) {
- 		case 1:
- 			lp->csum_offload_on_tx_path =
- 				XAE_FEATURE_PARTIAL_TX_CSUM;
- 			lp->features |= XAE_FEATURE_PARTIAL_TX_CSUM;
- 			/* Can checksum TCP/UDP over IPv4. */
--			ndev->features |= NETIF_F_IP_CSUM;
-+			ndev->features |= NETIF_F_IP_CSUM | NETIF_F_SG;
- 			break;
- 		case 2:
- 			lp->csum_offload_on_tx_path =
- 				XAE_FEATURE_FULL_TX_CSUM;
- 			lp->features |= XAE_FEATURE_FULL_TX_CSUM;
- 			/* Can checksum TCP/UDP over IPv4. */
--			ndev->features |= NETIF_F_IP_CSUM;
-+			ndev->features |= NETIF_F_IP_CSUM | NETIF_F_SG;
- 			break;
- 		default:
- 			lp->csum_offload_on_tx_path = XAE_NO_CSUM_OFFLOAD;
- 		}
- 	}
--	p = (__be32 *) of_get_property(op->dev.of_node, "xlnx,rxcsum", NULL);
--	if (p) {
--		switch (be32_to_cpup(p)) {
-+	ret = of_property_read_u32(pdev->dev.of_node, "xlnx,rxcsum", &value);
-+	if (!ret) {
-+		dev_info(&pdev->dev, "RX_CSUM %d\n", value);
-+
-+		switch (value) {
- 		case 1:
- 			lp->csum_offload_on_rx_path =
- 				XAE_FEATURE_PARTIAL_RX_CSUM;
-@@ -1542,85 +1598,80 @@ static int axienet_of_probe(struct platf
- 		}
- 	}
- 	/* For supporting jumbo frames, the Axi Ethernet hardware must have
--	 * a larger Rx/Tx Memory. Typically, the size must be more than or
--	 * equal to 16384 bytes, so that we can enable jumbo option and start
--	 * supporting jumbo frames. Here we check for memory allocated for
--	 * Rx/Tx in the hardware from the device-tree and accordingly set
--	 * flags. */
--	p = (__be32 *) of_get_property(op->dev.of_node, "xlnx,rxmem", NULL);
--	if (p) {
--		if ((be32_to_cpup(p)) >= 0x4000)
--			lp->jumbo_support = 1;
--	}
--	p = (__be32 *) of_get_property(op->dev.of_node, "xlnx,temac-type",
--				       NULL);
--	if (p)
--		lp->temac_type = be32_to_cpup(p);
--	p = (__be32 *) of_get_property(op->dev.of_node, "xlnx,phy-type", NULL);
--	if (p)
--		lp->phy_type = be32_to_cpup(p);
--
--	/* Find the DMA node, map the DMA registers, and decode the DMA IRQs */
--	np = of_parse_phandle(op->dev.of_node, "axistream-connected", 0);
--	if (!np) {
--		dev_err(&op->dev, "could not find DMA node\n");
--		goto err_iounmap;
--	}
--	lp->dma_regs = of_iomap(np, 0);
--	if (lp->dma_regs) {
--		dev_dbg(&op->dev, "MEM base: %p\n", lp->dma_regs);
--	} else {
--		dev_err(&op->dev, "unable to map DMA registers\n");
--		of_node_put(np);
-+	 * a larger Rx/Tx Memory. Typically, the size must be large so that
-+	 * we can enable jumbo option and start supporting jumbo frames.
-+	 * Here we check for memory allocated for Rx/Tx in the hardware from
-+	 * the device-tree and accordingly set flags.
-+	 */
-+	of_property_read_u32(pdev->dev.of_node, "xlnx,rxmem", &lp->rxmem);
-+	of_property_read_u32(pdev->dev.of_node, "xlnx,temac-type",
-+					&lp->temac_type);
-+	of_property_read_u32(pdev->dev.of_node, "xlnx,phy-type",
-+					&lp->phy_type);
-+
-+	/* Find the DMA node, map the DMA registers, and decode DMA IRQs */
-+	np = of_parse_phandle(pdev->dev.of_node, "axistream-connected", 0);
-+	if (IS_ERR(np)) {
-+		dev_err(&pdev->dev, "could not find DMA node\n");
-+		ret = PTR_ERR(np);
-+		goto free_netdev;
-+	}
-+	ret = of_address_to_resource(np, 0, &dmares);
-+	if (ret) {
-+		dev_err(&pdev->dev, "unable to get DMA resource\n");
-+		goto free_netdev;
-+	}
-+	lp->dma_regs = devm_ioremap_resource(&pdev->dev, &dmares);
-+	if (!lp->dma_regs) {
-+		dev_err(&pdev->dev, "could not map DMA regs\n");
-+		ret = -ENOMEM;
-+		goto free_netdev;
- 	}
- 	lp->rx_irq = irq_of_parse_and_map(np, 1);
- 	lp->tx_irq = irq_of_parse_and_map(np, 0);
- 	of_node_put(np);
- 	if ((lp->rx_irq <= 0) || (lp->tx_irq <= 0)) {
--		dev_err(&op->dev, "could not determine irqs\n");
-+		dev_err(&pdev->dev, "could not determine irqs\n");
- 		ret = -ENOMEM;
--		goto err_iounmap_2;
-+		goto free_netdev;
- 	}
- 
- 	/* Retrieve the MAC address */
--	addr = of_get_property(op->dev.of_node, "local-mac-address", &size);
--	if ((!addr) || (size != 6)) {
--		dev_err(&op->dev, "could not find MAC address\n");
--		ret = -ENODEV;
--		goto err_iounmap_2;
-+	ret = of_property_read_u8_array(pdev->dev.of_node,
-+			"local-mac-address", mac_addr, 6);
-+	if (ret) {
-+		dev_err(&pdev->dev, "could not find MAC address\n");
-+		goto free_netdev;
- 	}
--	axienet_set_mac_address(ndev, (void *) addr);
-+	axienet_set_mac_address(ndev, (void *) mac_addr);
- 
- 	lp->coalesce_count_rx = XAXIDMA_DFT_RX_THRESHOLD;
- 	lp->coalesce_count_tx = XAXIDMA_DFT_TX_THRESHOLD;
- 
--	lp->phy_node = of_parse_phandle(op->dev.of_node, "phy-handle", 0);
--	ret = axienet_mdio_setup(lp, op->dev.of_node);
--	if (ret)
--		dev_warn(&op->dev, "error registering MDIO bus\n");
-+	lp->phy_node = of_parse_phandle(pdev->dev.of_node, "phy-handle", 0);
-+	if (lp->phy_node) {
-+		ret = axienet_mdio_setup(lp, pdev->dev.of_node);
-+		if (ret)
-+			dev_warn(&pdev->dev, "error registering MDIO bus\n");
-+	}
- 
- 	ret = register_netdev(lp->ndev);
- 	if (ret) {
- 		dev_err(lp->dev, "register_netdev() error (%i)\n", ret);
--		goto err_iounmap_2;
-+		goto free_netdev;
- 	}
- 
- 	return 0;
- 
--err_iounmap_2:
--	if (lp->dma_regs)
--		iounmap(lp->dma_regs);
--err_iounmap:
--	iounmap(lp->regs);
--nodev:
-+free_netdev:
- 	free_netdev(ndev);
--	ndev = NULL;
-+
- 	return ret;
- }
- 
--static int axienet_of_remove(struct platform_device *op)
-+static int axienet_remove(struct platform_device *pdev)
- {
--	struct net_device *ndev = platform_get_drvdata(op);
-+	struct net_device *ndev = platform_get_drvdata(pdev);
- 	struct axienet_local *lp = netdev_priv(ndev);
- 
- 	axienet_mdio_teardown(lp);
-@@ -1630,17 +1681,14 @@ static int axienet_of_remove(struct plat
- 		of_node_put(lp->phy_node);
- 	lp->phy_node = NULL;
- 
--	iounmap(lp->regs);
--	if (lp->dma_regs)
--		iounmap(lp->dma_regs);
- 	free_netdev(ndev);
- 
- 	return 0;
- }
- 
--static struct platform_driver axienet_of_driver = {
--	.probe = axienet_of_probe,
--	.remove = axienet_of_remove,
-+static struct platform_driver axienet_driver = {
-+	.probe = axienet_probe,
-+	.remove = axienet_remove,
- 	.driver = {
- 		 .owner = THIS_MODULE,
- 		 .name = "xilinx_axienet",
-@@ -1648,7 +1696,7 @@ static struct platform_driver axienet_of
- 	},
- };
- 
--module_platform_driver(axienet_of_driver);
-+module_platform_driver(axienet_driver);
- 
- MODULE_DESCRIPTION("Xilinx Axi Ethernet driver");
- MODULE_AUTHOR("Xilinx");
---- a/drivers/net/ethernet/xilinx/xilinx_axienet_mdio.c
-+++ b/drivers/net/ethernet/xilinx/xilinx_axienet_mdio.c
-@@ -120,7 +120,8 @@ static int axienet_mdio_write(struct mii
-  * @np:		Pointer to device node
-  *
-  * returns:	0 on success, -ETIMEDOUT on a timeout, -ENOMEM when
-- *		mdiobus_alloc (to allocate memory for mii bus structure) fails.
-+ *		mdiobus_alloc (to allocate memory for mii bus structure)
-+ *		fails.
-  *
-  * Sets up the MDIO interface by initializing the MDIO clock and enabling the
-  * MDIO interface in hardware. Register the MDIO interface.
-@@ -128,11 +129,12 @@ static int axienet_mdio_write(struct mii
- int axienet_mdio_setup(struct axienet_local *lp, struct device_node *np)
- {
- 	int ret;
--	u32 clk_div, host_clock;
--	u32 *property_p;
-+	u32 clk_div;
- 	struct mii_bus *bus;
- 	struct resource res;
- 	struct device_node *np1;
-+	/* the ethernet controller device node */
-+	struct device_node *npp = NULL;
- 
- 	/* clk_div can be calculated by deriving it from the equation:
- 	 * fMDIO = fHOST / ((1 + clk_div) * 2)
-@@ -158,42 +160,50 @@ int axienet_mdio_setup(struct axienet_lo
- 	 * fHOST can be read from the flattened device tree as property
- 	 * "clock-frequency" from the CPU
- 	 */
--
--	np1 = of_find_node_by_name(NULL, "cpu");
--	if (!np1) {
--		printk(KERN_WARNING "%s(): Could not find CPU device node.",
--		       __func__);
--		printk(KERN_WARNING "Setting MDIO clock divisor to "
--		       "default %d\n", DEFAULT_CLOCK_DIVISOR);
--		clk_div = DEFAULT_CLOCK_DIVISOR;
--		goto issue;
--	}
--	property_p = (u32 *) of_get_property(np1, "clock-frequency", NULL);
--	if (!property_p) {
--		printk(KERN_WARNING "%s(): Could not find CPU property: "
--		       "clock-frequency.", __func__);
--		printk(KERN_WARNING "Setting MDIO clock divisor to "
--		       "default %d\n", DEFAULT_CLOCK_DIVISOR);
-+	np1 = of_get_parent(lp->phy_node);
-+	if (np1)
-+		npp = of_get_parent(np1);
-+	if (!npp) {
-+		dev_warn(lp->dev,
-+			"Could not find ethernet controller device node.");
-+		dev_warn(lp->dev,
-+			 "Setting MDIO clock divisor to default %d\n",
-+			DEFAULT_CLOCK_DIVISOR);
- 		clk_div = DEFAULT_CLOCK_DIVISOR;
--		of_node_put(np1);
--		goto issue;
-+	} else {
-+		u32 *property_p;
-+
-+		property_p = (uint32_t *)of_get_property(npp,
-+						"clock-frequency", NULL);
-+		if (!property_p) {
-+			dev_warn(lp->dev,
-+				"Could not find clock ethernet "
-+				"controller property.");
-+			dev_warn(lp->dev,
-+				 "Setting MDIO clock divisor to default %d\n",
-+							DEFAULT_CLOCK_DIVISOR);
-+			clk_div = DEFAULT_CLOCK_DIVISOR;
-+		} else {
-+			u32 host_clock = be32_to_cpup(property_p);
-+
-+			clk_div = (host_clock / (MAX_MDIO_FREQ * 2)) - 1;
-+
-+			/* If there is any remainder from the division of
-+			 * fHOST / (MAX_MDIO_FREQ * 2), then we need to add 1
-+			 * to the clock divisor or we will surely be
-+			 * above 2.5 MHz
-+			 */
-+			if (host_clock % (MAX_MDIO_FREQ * 2))
-+				clk_div++;
-+			dev_dbg(lp->dev,
-+				"Setting MDIO clock divisor to %u "
-+				"based on %u Hz host clock.\n",
-+				clk_div, host_clock);
-+		}
- 	}
- 
--	host_clock = be32_to_cpup(property_p);
--	clk_div = (host_clock / (MAX_MDIO_FREQ * 2)) - 1;
--	/* If there is any remainder from the division of
--	 * fHOST / (MAX_MDIO_FREQ * 2), then we need to add
--	 * 1 to the clock divisor or we will surely be above 2.5 MHz */
--	if (host_clock % (MAX_MDIO_FREQ * 2))
--		clk_div++;
--
--	printk(KERN_DEBUG "%s(): Setting MDIO clock divisor to %u based "
--	       "on %u Hz host clock.\n", __func__, clk_div, host_clock);
--
--	of_node_put(np1);
--issue:
--	axienet_iow(lp, XAE_MDIO_MC_OFFSET,
--		    (((u32) clk_div) | XAE_MDIO_MC_MDIOEN_MASK));
-+	axienet_iow(lp, XAE_MDIO_MC_OFFSET, (((u32)clk_div) |
-+						XAE_MDIO_MC_MDIOEN_MASK));
- 
- 	ret = axienet_mdio_wait_until_ready(lp);
- 	if (ret < 0)
-@@ -203,8 +213,7 @@ issue:
- 	if (!bus)
- 		return -ENOMEM;
- 
--	np1 = of_get_parent(lp->phy_node);
--	of_address_to_resource(np1, 0, &res);
-+	of_address_to_resource(npp, 0, &res);
- 	snprintf(bus->id, MII_BUS_ID_SIZE, "%.8llx",
- 		 (unsigned long long) res.start);
- 
-@@ -233,7 +242,6 @@ issue:
- void axienet_mdio_teardown(struct axienet_local *lp)
- {
- 	mdiobus_unregister(lp->mii_bus);
--	kfree(lp->mii_bus->irq);
- 	mdiobus_free(lp->mii_bus);
- 	lp->mii_bus = NULL;
- }
---- a/drivers/net/ethernet/xilinx/xilinx_emaclite.c
-+++ b/drivers/net/ethernet/xilinx/xilinx_emaclite.c
-@@ -22,6 +22,7 @@
- #include <linux/slab.h>
- #include <linux/of_address.h>
- #include <linux/of_device.h>
-+#include <linux/of_irq.h>
- #include <linux/of_platform.h>
- #include <linux/of_mdio.h>
- #include <linux/of_net.h>
-@@ -44,7 +45,7 @@
- #define XEL_RPLR_OFFSET		0x100C		/* Rx packet length */
- #define XEL_RSR_OFFSET		0x17FC		/* Rx status */
- 
--#define XEL_BUFFER_OFFSET	0x0800		/* Next Tx/Rx buffer's offset */
-+#define XEL_BUFFER_OFFSET	0x0800		/* Next Tx/Rx buffer offset */
- 
- /* MDIO Address Register Bit Masks */
- #define XEL_MDIOADDR_REGADR_MASK  0x0000001F	/* Register Address */
-@@ -110,8 +111,8 @@
-  * @next_rx_buf_to_use:	next Rx buffer to read from
-  * @base_addr:		base address of the Emaclite device
-  * @reset_lock:		lock used for synchronization
-- * @deferred_skb:	holds an skb (for transmission at a later time) when the
-- *			Tx buffer is not free
-+ * @deferred_skb:	holds an skb (for transmission at a later time) when
-+ *			the Tx buffer is not free
-  * @phy_dev:		pointer to the PHY device
-  * @phy_node:		pointer to the PHY device node
-  * @mii_bus:		pointer to the MII bus
-@@ -151,8 +152,8 @@ struct net_local {
-  * xemaclite_enable_interrupts - Enable the interrupts for the EmacLite device
-  * @drvdata:	Pointer to the Emaclite device private data
-  *
-- * This function enables the Tx and Rx interrupts for the Emaclite device along
-- * with the Global Interrupt Enable.
-+ * This function enables the Tx and Rx interrupts for the Emaclite device
-+ * along with the Global Interrupt Enable.
-  */
- static void xemaclite_enable_interrupts(struct net_local *drvdata)
- {
-@@ -174,7 +175,8 @@ static void xemaclite_enable_interrupts(
- 	}
- 
- 	/* Enable the Rx interrupts for the first buffer */
--	__raw_writel(XEL_RSR_RECV_IE_MASK, drvdata->base_addr + XEL_RSR_OFFSET);
-+	__raw_writel(XEL_RSR_RECV_IE_MASK, drvdata->base_addr +
-+			XEL_RSR_OFFSET);
- 
- 	/* Enable the Rx interrupts for the second Buffer if
- 	 * configured in HW */
-@@ -188,7 +190,8 @@ static void xemaclite_enable_interrupts(
- }
- 
- /**
-- * xemaclite_disable_interrupts - Disable the interrupts for the EmacLite device
-+ * xemaclite_disable_interrupts - Disable the interrupts for the EmacLite
-+ * device.
-  * @drvdata:	Pointer to the Emaclite device private data
-  *
-  * This function disables the Tx and Rx interrupts for the Emaclite device,
-@@ -209,8 +212,8 @@ static void xemaclite_disable_interrupts
- 	/* Disable the Tx interrupts for the second Buffer
- 	 * if configured in HW */
- 	if (drvdata->tx_ping_pong != 0) {
--		reg_data = __raw_readl(drvdata->base_addr + XEL_BUFFER_OFFSET +
--				   XEL_TSR_OFFSET);
-+		reg_data = __raw_readl(drvdata->base_addr +
-+			XEL_BUFFER_OFFSET + XEL_TSR_OFFSET);
- 		__raw_writel(reg_data & (~XEL_TSR_XMIT_IE_MASK),
- 			     drvdata->base_addr + XEL_BUFFER_OFFSET +
- 			     XEL_TSR_OFFSET);
-@@ -225,8 +228,8 @@ static void xemaclite_disable_interrupts
- 	 * if configured in HW */
- 	if (drvdata->rx_ping_pong != 0) {
- 
--		reg_data = __raw_readl(drvdata->base_addr + XEL_BUFFER_OFFSET +
--				   XEL_RSR_OFFSET);
-+		reg_data = __raw_readl(drvdata->base_addr +
-+			XEL_BUFFER_OFFSET + XEL_RSR_OFFSET);
- 		__raw_writel(reg_data & (~XEL_RSR_RECV_IE_MASK),
- 			     drvdata->base_addr + XEL_BUFFER_OFFSET +
- 			     XEL_RSR_OFFSET);
-@@ -234,7 +237,8 @@ static void xemaclite_disable_interrupts
- }
- 
- /**
-- * xemaclite_aligned_write - Write from 16-bit aligned to 32-bit aligned address
-+ * xemaclite_aligned_write - Write from 16-bit aligned to 32-bit aligned
-+ * address.
-  * @src_ptr:	Void pointer to the 16-bit aligned source address
-  * @dest_ptr:	Pointer to the 32-bit aligned destination address
-  * @length:	Number bytes to write from source to destination
-@@ -283,8 +287,8 @@ static void xemaclite_aligned_write(void
-  * @dest_ptr:	Pointer to the 16-bit aligned destination address
-  * @length:	Number bytes to read from source to destination
-  *
-- * This function reads data from a 32-bit aligned address in the EmacLite device
-- * to a 16-bit aligned buffer.
-+ * This function reads data from a 32-bit aligned address in the EmacLite
-+ * device to a 16-bit aligned buffer.
-  */
- static void xemaclite_aligned_read(u32 *src_ptr, u8 *dest_ptr,
- 				   unsigned length)
-@@ -326,14 +330,14 @@ static void xemaclite_aligned_read(u32 *
-  * @data:	Pointer to the data to be sent
-  * @byte_count:	Total frame size, including header
-  *
-- * This function checks if the Tx buffer of the Emaclite device is free to send
-- * data. If so, it fills the Tx buffer with data for transmission. Otherwise, it
-- * returns an error.
-+ * This function checks if the Tx buffer of the Emaclite device is free to
-+ * send data. If so, it fills the Tx buffer with data for transmission.
-+ * Otherwise, it returns an error.
-  *
-  * Return:	0 upon success or -1 if the buffer(s) are full.
-  *
-- * Note:	The maximum Tx packet size can not be more than Ethernet header
-- *		(14 Bytes) + Maximum MTU (1500 bytes). This is excluding FCS.
-+ * Note: The maximum Tx packet size can not be more than Ethernet header
-+ *	(14 Bytes) + Maximum MTU (1500 bytes). This is excluding FCS.
-  */
- static int xemaclite_send_data(struct net_local *drvdata, u8 *data,
- 			       unsigned int byte_count)
-@@ -687,7 +691,8 @@ static irqreturn_t xemaclite_interrupt(i
- 	}
- 
- 	/* Check if the Transmission for the second buffer is completed */
--	tx_status = __raw_readl(base_addr + XEL_BUFFER_OFFSET + XEL_TSR_OFFSET);
-+	tx_status = __raw_readl(base_addr + XEL_BUFFER_OFFSET +
-+				XEL_TSR_OFFSET);
- 	if (((tx_status & XEL_TSR_XMIT_BUSY_MASK) == 0) &&
- 		(tx_status & XEL_TSR_XMIT_ACTIVE_MASK) != 0) {
- 
-@@ -1053,7 +1058,7 @@ static int xemaclite_send(struct sk_buff
- 		 * current transmission is complete */
- 		netif_stop_queue(dev);
- 		lp->deferred_skb = new_skb;
--		/* Take the time stamp now, since we can't do this in an ISR. */
-+		/* Take the time stamp now, since we can't do this in an ISR */
- 		skb_tx_timestamp(new_skb);
- 		spin_unlock_irqrestore(&lp->reset_lock, flags);
- 		return 0;
-@@ -1090,7 +1095,7 @@ static void xemaclite_remove_ndev(struct
-  * This function looks for a property in the device node and returns the value
-  * of the property if its found or 0 if the property is not found.
-  *
-- * Return:	Value of the parameter if the parameter is found, or 0 otherwise
-+ * Return: Value of the parameter if the parameter is found, or 0 otherwise
-  */
- static bool get_bool(struct platform_device *ofdev, const char *s)
- {
-@@ -1172,7 +1177,7 @@ static int xemaclite_of_probe(struct pla
- 
- 	if (mac_address)
- 		/* Set the MAC address. */
--		memcpy(ndev->dev_addr, mac_address, ETH_ALEN);
-+		memcpy(ndev->dev_addr, mac_address, 6);
- 	else
- 		dev_warn(dev, "No MAC address found\n");
- 
---- /dev/null
-+++ b/drivers/net/ethernet/xilinx/xilinx_emacps.c
-@@ -0,0 +1,2912 @@
-+/*
-+ * Xilinx Ethernet: Linux driver for Ethernet.
-+ *
-+ * Author: Xilinx, Inc.
-+ *
-+ * 2010 (c) Xilinx, Inc. This file is licensed uner the terms of the GNU
-+ * General Public License version 2. This program is licensed "as is"
-+ * without any warranty of any kind, whether express or implied.
-+ *
-+ * This is a driver for xilinx processor sub-system (ps) ethernet device.
-+ * This driver is mainly used in Linux 2.6.30 and above and it does _not_
-+ * support Linux 2.4 kernel due to certain new features (e.g. NAPI) is
-+ * introduced in this driver.
-+ *
-+ * TODO:
-+ * 1. JUMBO frame is not enabled per EPs spec. Please update it if this
-+ *    support is added in and set MAX_MTU to 9000.
-+ */
-+
-+#include <linux/module.h>
-+#include <linux/kernel.h>
-+#include <linux/init.h>
-+#include <linux/mm.h>
-+#include <linux/netdevice.h>
-+#include <linux/etherdevice.h>
-+#include <linux/platform_device.h>
-+#include <linux/phy.h>
-+#include <linux/mii.h>
-+#include <linux/delay.h>
-+#include <linux/dma-mapping.h>
-+#include <linux/io.h>
-+#include <linux/ethtool.h>
-+#include <linux/vmalloc.h>
-+#include <linux/version.h>
-+#include <linux/of.h>
-+#include <linux/interrupt.h>
-+#include <linux/clocksource.h>
-+#include <linux/net_tstamp.h>
-+#include <linux/pm_runtime.h>
-+#include <linux/clk.h>
-+#include <linux/of_net.h>
-+#include <linux/of_address.h>
-+#include <linux/of_mdio.h>
-+#include <linux/timer.h>
-+
-+/************************** Constant Definitions *****************************/
-+
-+/* Must be shorter than length of ethtool_drvinfo.driver field to fit */
-+#define DRIVER_NAME			"xemacps"
-+#define DRIVER_DESCRIPTION		"Xilinx Tri-Mode Ethernet MAC driver"
-+#define DRIVER_VERSION			"1.00a"
-+
-+/* Transmission timeout is 3 seconds. */
-+#define TX_TIMEOUT			(3*HZ)
-+
-+/* for RX skb IP header word-aligned */
-+#define RX_IP_ALIGN_OFFSET		2
-+
-+/* DMA buffer descriptors must be aligned on a 4-byte boundary. */
-+#define ALIGNMENT_BD			8
-+
-+/* Maximum value for hash bits. 2**6 */
-+#define XEMACPS_MAX_HASH_BITS		64
-+
-+/* MDC clock division
-+ * currently supporting 8, 16, 32, 48, 64, 96, 128, 224.
-+ */
-+enum { MDC_DIV_8 = 0, MDC_DIV_16, MDC_DIV_32, MDC_DIV_48,
-+MDC_DIV_64, MDC_DIV_96, MDC_DIV_128, MDC_DIV_224 };
-+
-+/* Specify the receive buffer size in bytes, 64, 128, 192, 10240 */
-+#define XEMACPS_RX_BUF_SIZE		1536
-+
-+/* Number of receive buffer bytes as a unit, this is HW setup */
-+#define XEMACPS_RX_BUF_UNIT		64
-+
-+/* Default SEND and RECV buffer descriptors (BD) numbers.
-+ * BD Space needed is (XEMACPS_SEND_BD_CNT+XEMACPS_RECV_BD_CNT)*8
-+ */
-+#undef  DEBUG
-+#define DEBUG
-+
-+#define XEMACPS_SEND_BD_CNT		256
-+#define XEMACPS_RECV_BD_CNT		256
-+
-+#define XEMACPS_NAPI_WEIGHT		64
-+
-+/* Register offset definitions. Unless otherwise noted, register access is
-+ * 32 bit. Names are self explained here.
-+ */
-+#define XEMACPS_NWCTRL_OFFSET		0x00000000 /* Network Control reg */
-+#define XEMACPS_NWCFG_OFFSET		0x00000004 /* Network Config reg */
-+#define XEMACPS_NWSR_OFFSET		0x00000008 /* Network Status reg */
-+#define XEMACPS_USERIO_OFFSET		0x0000000C /* User IO reg */
-+#define XEMACPS_DMACR_OFFSET		0x00000010 /* DMA Control reg */
-+#define XEMACPS_TXSR_OFFSET		0x00000014 /* TX Status reg */
-+#define XEMACPS_RXQBASE_OFFSET		0x00000018 /* RX Q Base address reg */
-+#define XEMACPS_TXQBASE_OFFSET		0x0000001C /* TX Q Base address reg */
-+#define XEMACPS_RXSR_OFFSET		0x00000020 /* RX Status reg */
-+#define XEMACPS_ISR_OFFSET		0x00000024 /* Interrupt Status reg */
-+#define XEMACPS_IER_OFFSET		0x00000028 /* Interrupt Enable reg */
-+#define XEMACPS_IDR_OFFSET		0x0000002C /* Interrupt Disable reg */
-+#define XEMACPS_IMR_OFFSET		0x00000030 /* Interrupt Mask reg */
-+#define XEMACPS_PHYMNTNC_OFFSET	0x00000034 /* Phy Maintaince reg */
-+#define XEMACPS_RXPAUSE_OFFSET		0x00000038 /* RX Pause Time reg */
-+#define XEMACPS_TXPAUSE_OFFSET		0x0000003C /* TX Pause Time reg */
-+#define XEMACPS_HASHL_OFFSET		0x00000080 /* Hash Low address reg */
-+#define XEMACPS_HASHH_OFFSET		0x00000084 /* Hash High address reg */
-+#define XEMACPS_LADDR1L_OFFSET		0x00000088 /* Specific1 addr low */
-+#define XEMACPS_LADDR1H_OFFSET		0x0000008C /* Specific1 addr high */
-+#define XEMACPS_LADDR2L_OFFSET		0x00000090 /* Specific2 addr low */
-+#define XEMACPS_LADDR2H_OFFSET		0x00000094 /* Specific2 addr high */
-+#define XEMACPS_LADDR3L_OFFSET		0x00000098 /* Specific3 addr low */
-+#define XEMACPS_LADDR3H_OFFSET		0x0000009C /* Specific3 addr high */
-+#define XEMACPS_LADDR4L_OFFSET		0x000000A0 /* Specific4 addr low */
-+#define XEMACPS_LADDR4H_OFFSET		0x000000A4 /* Specific4 addr high */
-+#define XEMACPS_MATCH1_OFFSET		0x000000A8 /* Type ID1 Match reg */
-+#define XEMACPS_MATCH2_OFFSET		0x000000AC /* Type ID2 Match reg */
-+#define XEMACPS_MATCH3_OFFSET		0x000000B0 /* Type ID3 Match reg */
-+#define XEMACPS_MATCH4_OFFSET		0x000000B4 /* Type ID4 Match reg */
-+#define XEMACPS_WOL_OFFSET		0x000000B8 /* Wake on LAN reg */
-+#define XEMACPS_STRETCH_OFFSET		0x000000BC /* IPG Stretch reg */
-+#define XEMACPS_SVLAN_OFFSET		0x000000C0 /* Stacked VLAN reg */
-+#define XEMACPS_MODID_OFFSET		0x000000FC /* Module ID reg */
-+#define XEMACPS_OCTTXL_OFFSET		0x00000100 /* Octects transmitted Low
-+						reg */
-+#define XEMACPS_OCTTXH_OFFSET		0x00000104 /* Octects transmitted High
-+						reg */
-+#define XEMACPS_TXCNT_OFFSET		0x00000108 /* Error-free Frmaes
-+						transmitted counter */
-+#define XEMACPS_TXBCCNT_OFFSET		0x0000010C /* Error-free Broadcast
-+						Frames counter*/
-+#define XEMACPS_TXMCCNT_OFFSET		0x00000110 /* Error-free Multicast
-+						Frame counter */
-+#define XEMACPS_TXPAUSECNT_OFFSET	0x00000114 /* Pause Frames Transmitted
-+						Counter */
-+#define XEMACPS_TX64CNT_OFFSET		0x00000118 /* Error-free 64 byte Frames
-+						Transmitted counter */
-+#define XEMACPS_TX65CNT_OFFSET		0x0000011C /* Error-free 65-127 byte
-+						Frames Transmitted counter */
-+#define XEMACPS_TX128CNT_OFFSET	0x00000120 /* Error-free 128-255 byte
-+						Frames Transmitted counter */
-+#define XEMACPS_TX256CNT_OFFSET	0x00000124 /* Error-free 256-511 byte
-+						Frames transmitted counter */
-+#define XEMACPS_TX512CNT_OFFSET	0x00000128 /* Error-free 512-1023 byte
-+						Frames transmitted counter */
-+#define XEMACPS_TX1024CNT_OFFSET	0x0000012C /* Error-free 1024-1518 byte
-+						Frames transmitted counter */
-+#define XEMACPS_TX1519CNT_OFFSET	0x00000130 /* Error-free larger than
-+						1519 byte Frames transmitted
-+						Counter */
-+#define XEMACPS_TXURUNCNT_OFFSET	0x00000134 /* TX under run error
-+						Counter */
-+#define XEMACPS_SNGLCOLLCNT_OFFSET	0x00000138 /* Single Collision Frame
-+						Counter */
-+#define XEMACPS_MULTICOLLCNT_OFFSET	0x0000013C /* Multiple Collision Frame
-+						Counter */
-+#define XEMACPS_EXCESSCOLLCNT_OFFSET	0x00000140 /* Excessive Collision Frame
-+						Counter */
-+#define XEMACPS_LATECOLLCNT_OFFSET	0x00000144 /* Late Collision Frame
-+						Counter */
-+#define XEMACPS_TXDEFERCNT_OFFSET	0x00000148 /* Deferred Transmission
-+						Frame Counter */
-+#define XEMACPS_CSENSECNT_OFFSET	0x0000014C /* Carrier Sense Error
-+						Counter */
-+#define XEMACPS_OCTRXL_OFFSET		0x00000150 /* Octects Received register
-+						Low */
-+#define XEMACPS_OCTRXH_OFFSET		0x00000154 /* Octects Received register
-+						High */
-+#define XEMACPS_RXCNT_OFFSET		0x00000158 /* Error-free Frames
-+						Received Counter */
-+#define XEMACPS_RXBROADCNT_OFFSET	0x0000015C /* Error-free Broadcast
-+						Frames Received Counter */
-+#define XEMACPS_RXMULTICNT_OFFSET	0x00000160 /* Error-free Multicast
-+						Frames Received Counter */
-+#define XEMACPS_RXPAUSECNT_OFFSET	0x00000164 /* Pause Frames
-+						Received Counter */
-+#define XEMACPS_RX64CNT_OFFSET		0x00000168 /* Error-free 64 byte Frames
-+						Received Counter */
-+#define XEMACPS_RX65CNT_OFFSET		0x0000016C /* Error-free 65-127 byte
-+						Frames Received Counter */
-+#define XEMACPS_RX128CNT_OFFSET	0x00000170 /* Error-free 128-255 byte
-+						Frames Received Counter */
-+#define XEMACPS_RX256CNT_OFFSET	0x00000174 /* Error-free 256-512 byte
-+						Frames Received Counter */
-+#define XEMACPS_RX512CNT_OFFSET	0x00000178 /* Error-free 512-1023 byte
-+						Frames Received Counter */
-+#define XEMACPS_RX1024CNT_OFFSET	0x0000017C /* Error-free 1024-1518 byte
-+						Frames Received Counter */
-+#define XEMACPS_RX1519CNT_OFFSET	0x00000180 /* Error-free 1519-max byte
-+						Frames Received Counter */
-+#define XEMACPS_RXUNDRCNT_OFFSET	0x00000184 /* Undersize Frames Received
-+						Counter */
-+#define XEMACPS_RXOVRCNT_OFFSET	0x00000188 /* Oversize Frames Received
-+						Counter */
-+#define XEMACPS_RXJABCNT_OFFSET	0x0000018C /* Jabbers Received
-+						Counter */
-+#define XEMACPS_RXFCSCNT_OFFSET	0x00000190 /* Frame Check Sequence
-+						Error Counter */
-+#define XEMACPS_RXLENGTHCNT_OFFSET	0x00000194 /* Length Field Error
-+						Counter */
-+#define XEMACPS_RXSYMBCNT_OFFSET	0x00000198 /* Symbol Error Counter */
-+#define XEMACPS_RXALIGNCNT_OFFSET	0x0000019C /* Alignment Error
-+						Counter */
-+#define XEMACPS_RXRESERRCNT_OFFSET	0x000001A0 /* Receive Resource Error
-+						Counter */
-+#define XEMACPS_RXORCNT_OFFSET		0x000001A4 /* Receive Overrun */
-+#define XEMACPS_RXIPCCNT_OFFSET	0x000001A8 /* IP header Checksum Error
-+						Counter */
-+#define XEMACPS_RXTCPCCNT_OFFSET	0x000001AC /* TCP Checksum Error
-+						Counter */
-+#define XEMACPS_RXUDPCCNT_OFFSET	0x000001B0 /* UDP Checksum Error
-+						Counter */
-+
-+#define XEMACPS_1588S_OFFSET		0x000001D0 /* 1588 Timer Seconds */
-+#define XEMACPS_1588NS_OFFSET		0x000001D4 /* 1588 Timer Nanoseconds */
-+#define XEMACPS_1588ADJ_OFFSET		0x000001D8 /* 1588 Timer Adjust */
-+#define XEMACPS_1588INC_OFFSET		0x000001DC /* 1588 Timer Increment */
-+#define XEMACPS_PTPETXS_OFFSET		0x000001E0 /* PTP Event Frame
-+						Transmitted Seconds */
-+#define XEMACPS_PTPETXNS_OFFSET	0x000001E4 /* PTP Event Frame
-+						Transmitted Nanoseconds */
-+#define XEMACPS_PTPERXS_OFFSET		0x000001E8 /* PTP Event Frame Received
-+						Seconds */
-+#define XEMACPS_PTPERXNS_OFFSET	0x000001EC /* PTP Event Frame Received
-+						Nanoseconds */
-+#define XEMACPS_PTPPTXS_OFFSET		0x000001E0 /* PTP Peer Frame
-+						Transmitted Seconds */
-+#define XEMACPS_PTPPTXNS_OFFSET	0x000001E4 /* PTP Peer Frame
-+						Transmitted Nanoseconds */
-+#define XEMACPS_PTPPRXS_OFFSET		0x000001E8 /* PTP Peer Frame Received
-+						Seconds */
-+#define XEMACPS_PTPPRXNS_OFFSET	0x000001EC /* PTP Peer Frame Received
-+						Nanoseconds */
-+
-+/* network control register bit definitions */
-+#define XEMACPS_NWCTRL_FLUSH_DPRAM_MASK	0x00040000
-+#define XEMACPS_NWCTRL_RXTSTAMP_MASK	0x00008000 /* RX Timestamp in CRC */
-+#define XEMACPS_NWCTRL_ZEROPAUSETX_MASK 0x00001000 /* Transmit zero quantum
-+						pause frame */
-+#define XEMACPS_NWCTRL_PAUSETX_MASK	0x00000800 /* Transmit pause frame */
-+#define XEMACPS_NWCTRL_HALTTX_MASK	0x00000400 /* Halt transmission
-+						after current frame */
-+#define XEMACPS_NWCTRL_STARTTX_MASK	0x00000200 /* Start tx (tx_go) */
-+
-+#define XEMACPS_NWCTRL_STATWEN_MASK	0x00000080 /* Enable writing to
-+						stat counters */
-+#define XEMACPS_NWCTRL_STATINC_MASK	0x00000040 /* Increment statistic
-+						registers */
-+#define XEMACPS_NWCTRL_STATCLR_MASK	0x00000020 /* Clear statistic
-+						registers */
-+#define XEMACPS_NWCTRL_MDEN_MASK	0x00000010 /* Enable MDIO port */
-+#define XEMACPS_NWCTRL_TXEN_MASK	0x00000008 /* Enable transmit */
-+#define XEMACPS_NWCTRL_RXEN_MASK	0x00000004 /* Enable receive */
-+#define XEMACPS_NWCTRL_LOOPEN_MASK	0x00000002 /* local loopback */
-+
-+/* name network configuration register bit definitions */
-+#define XEMACPS_NWCFG_BADPREAMBEN_MASK	0x20000000 /* disable rejection of
-+						non-standard preamble */
-+#define XEMACPS_NWCFG_IPDSTRETCH_MASK	0x10000000 /* enable transmit IPG */
-+#define XEMACPS_NWCFG_FCSIGNORE_MASK	0x04000000 /* disable rejection of
-+						FCS error */
-+#define XEMACPS_NWCFG_HDRXEN_MASK	0x02000000 /* RX half duplex */
-+#define XEMACPS_NWCFG_RXCHKSUMEN_MASK	0x01000000 /* enable RX checksum
-+						offload */
-+#define XEMACPS_NWCFG_PAUSECOPYDI_MASK	0x00800000 /* Do not copy pause
-+						Frames to memory */
-+#define XEMACPS_NWCFG_MDC_SHIFT_MASK	18 /* shift bits for MDC */
-+#define XEMACPS_NWCFG_MDCCLKDIV_MASK	0x001C0000 /* MDC Mask PCLK divisor */
-+#define XEMACPS_NWCFG_FCSREM_MASK	0x00020000 /* Discard FCS from
-+						received frames */
-+#define XEMACPS_NWCFG_LENGTHERRDSCRD_MASK 0x00010000
-+/* RX length error discard */
-+#define XEMACPS_NWCFG_RXOFFS_MASK	0x0000C000 /* RX buffer offset */
-+#define XEMACPS_NWCFG_PAUSEEN_MASK	0x00002000 /* Enable pause TX */
-+#define XEMACPS_NWCFG_RETRYTESTEN_MASK	0x00001000 /* Retry test */
-+#define XEMACPS_NWCFG_1000_MASK		0x00000400 /* Gigbit mode */
-+#define XEMACPS_NWCFG_EXTADDRMATCHEN_MASK	0x00000200
-+/* External address match enable */
-+#define XEMACPS_NWCFG_UCASTHASHEN_MASK	0x00000080 /* Receive unicast hash
-+						frames */
-+#define XEMACPS_NWCFG_MCASTHASHEN_MASK	0x00000040 /* Receive multicast hash
-+						frames */
-+#define XEMACPS_NWCFG_BCASTDI_MASK	0x00000020 /* Do not receive
-+						broadcast frames */
-+#define XEMACPS_NWCFG_COPYALLEN_MASK	0x00000010 /* Copy all frames */
-+
-+#define XEMACPS_NWCFG_NVLANDISC_MASK	0x00000004 /* Receive only VLAN
-+						frames */
-+#define XEMACPS_NWCFG_FDEN_MASK		0x00000002 /* Full duplex */
-+#define XEMACPS_NWCFG_100_MASK		0x00000001 /* 10 or 100 Mbs */
-+
-+/* network status register bit definitaions */
-+#define XEMACPS_NWSR_MDIOIDLE_MASK	0x00000004 /* PHY management idle */
-+#define XEMACPS_NWSR_MDIO_MASK		0x00000002 /* Status of mdio_in */
-+
-+/* MAC address register word 1 mask */
-+#define XEMACPS_LADDR_MACH_MASK	0x0000FFFF /* Address bits[47:32]
-+						bit[31:0] are in BOTTOM */
-+
-+/* DMA control register bit definitions */
-+#define XEMACPS_DMACR_RXBUF_MASK	0x00FF0000 /* Mask bit for RX buffer
-+						size */
-+#define XEMACPS_DMACR_RXBUF_SHIFT	16 /* Shift bit for RX buffer
-+						size */
-+#define XEMACPS_DMACR_TCPCKSUM_MASK	0x00000800 /* enable/disable TX
-+						checksum offload */
-+#define XEMACPS_DMACR_TXSIZE_MASK	0x00000400 /* TX buffer memory size */
-+#define XEMACPS_DMACR_RXSIZE_MASK	0x00000300 /* RX buffer memory size */
-+#define XEMACPS_DMACR_ENDIAN_MASK	0x00000080 /* Endian configuration */
-+#define XEMACPS_DMACR_BLENGTH_MASK	0x0000001F /* Buffer burst length */
-+#define XEMACPS_DMACR_BLENGTH_INCR16	0x00000010 /* Buffer burst length */
-+#define XEMACPS_DMACR_BLENGTH_INCR8	0x00000008 /* Buffer burst length */
-+#define XEMACPS_DMACR_BLENGTH_INCR4	0x00000004 /* Buffer burst length */
-+#define XEMACPS_DMACR_BLENGTH_SINGLE	0x00000002 /* Buffer burst length */
-+
-+/* transmit status register bit definitions */
-+#define XEMACPS_TXSR_HRESPNOK_MASK	0x00000100 /* Transmit hresp not OK */
-+#define XEMACPS_TXSR_COL1000_MASK	0x00000080 /* Collision Gbs mode */
-+#define XEMACPS_TXSR_URUN_MASK		0x00000040 /* Transmit underrun */
-+#define XEMACPS_TXSR_TXCOMPL_MASK	0x00000020 /* Transmit completed OK */
-+#define XEMACPS_TXSR_BUFEXH_MASK	0x00000010 /* Transmit buffs exhausted
-+						mid frame */
-+#define XEMACPS_TXSR_TXGO_MASK		0x00000008 /* Status of go flag */
-+#define XEMACPS_TXSR_RXOVR_MASK	0x00000004 /* Retry limit exceeded */
-+#define XEMACPS_TXSR_COL100_MASK	0x00000002 /* Collision 10/100  mode */
-+#define XEMACPS_TXSR_USEDREAD_MASK	0x00000001 /* TX buffer used bit set */
-+
-+#define XEMACPS_TXSR_ERROR_MASK	(XEMACPS_TXSR_HRESPNOK_MASK |	\
-+					XEMACPS_TXSR_COL1000_MASK |	\
-+					XEMACPS_TXSR_URUN_MASK |	\
-+					XEMACPS_TXSR_BUFEXH_MASK |	\
-+					XEMACPS_TXSR_RXOVR_MASK |	\
-+					XEMACPS_TXSR_COL100_MASK |	\
-+					XEMACPS_TXSR_USEDREAD_MASK)
-+
-+/* receive status register bit definitions */
-+#define XEMACPS_RXSR_HRESPNOK_MASK	0x00000008 /* Receive hresp not OK */
-+#define XEMACPS_RXSR_RXOVR_MASK	0x00000004 /* Receive overrun */
-+#define XEMACPS_RXSR_FRAMERX_MASK	0x00000002 /* Frame received OK */
-+#define XEMACPS_RXSR_BUFFNA_MASK	0x00000001 /* RX buffer used bit set */
-+
-+#define XEMACPS_RXSR_ERROR_MASK	(XEMACPS_RXSR_HRESPNOK_MASK | \
-+					XEMACPS_RXSR_RXOVR_MASK | \
-+					XEMACPS_RXSR_BUFFNA_MASK)
-+
-+/* interrupts bit definitions
-+ * Bits definitions are same in XEMACPS_ISR_OFFSET,
-+ * XEMACPS_IER_OFFSET, XEMACPS_IDR_OFFSET, and XEMACPS_IMR_OFFSET
-+ */
-+#define XEMACPS_IXR_PTPPSTX_MASK	0x02000000 /* PTP Psync transmitted */
-+#define XEMACPS_IXR_PTPPDRTX_MASK	0x01000000 /* PTP Pdelay_req
-+							transmitted */
-+#define XEMACPS_IXR_PTPSTX_MASK	0x00800000 /* PTP Sync transmitted */
-+#define XEMACPS_IXR_PTPDRTX_MASK	0x00400000 /* PTP Delay_req
-+							transmitted */
-+#define XEMACPS_IXR_PTPPSRX_MASK	0x00200000 /* PTP Psync received */
-+#define XEMACPS_IXR_PTPPDRRX_MASK	0x00100000 /* PTP Pdelay_req
-+							received */
-+#define XEMACPS_IXR_PTPSRX_MASK	0x00080000 /* PTP Sync received */
-+#define XEMACPS_IXR_PTPDRRX_MASK	0x00040000 /* PTP Delay_req received */
-+#define XEMACPS_IXR_PAUSETX_MASK	0x00004000 /* Pause frame
-+							transmitted */
-+#define XEMACPS_IXR_PAUSEZERO_MASK	0x00002000 /* Pause time has reached
-+							zero */
-+#define XEMACPS_IXR_PAUSENZERO_MASK	0x00001000 /* Pause frame received */
-+#define XEMACPS_IXR_HRESPNOK_MASK	0x00000800 /* hresp not ok */
-+#define XEMACPS_IXR_RXOVR_MASK		0x00000400 /* Receive overrun
-+							occurred */
-+#define XEMACPS_IXR_TXCOMPL_MASK	0x00000080 /* Frame transmitted ok */
-+#define XEMACPS_IXR_TXEXH_MASK		0x00000040 /* Transmit err occurred or
-+							no buffers*/
-+#define XEMACPS_IXR_RETRY_MASK		0x00000020 /* Retry limit exceeded */
-+#define XEMACPS_IXR_URUN_MASK		0x00000010 /* Transmit underrun */
-+#define XEMACPS_IXR_TXUSED_MASK	0x00000008 /* Tx buffer used bit read */
-+#define XEMACPS_IXR_RXUSED_MASK	0x00000004 /* Rx buffer used bit read */
-+#define XEMACPS_IXR_FRAMERX_MASK	0x00000002 /* Frame received ok */
-+#define XEMACPS_IXR_MGMNT_MASK		0x00000001 /* PHY management complete */
-+#define XEMACPS_IXR_ALL_MASK		0x03FC7FFE /* Everything except MDIO */
-+
-+#define XEMACPS_IXR_TX_ERR_MASK	(XEMACPS_IXR_TXEXH_MASK |	\
-+					XEMACPS_IXR_RETRY_MASK |	\
-+					XEMACPS_IXR_URUN_MASK |		\
-+					XEMACPS_IXR_TXUSED_MASK)
-+
-+#define XEMACPS_IXR_RX_ERR_MASK	(XEMACPS_IXR_HRESPNOK_MASK |	\
-+					XEMACPS_IXR_RXUSED_MASK |	\
-+					XEMACPS_IXR_RXOVR_MASK)
-+/* PHY Maintenance bit definitions */
-+#define XEMACPS_PHYMNTNC_OP_MASK	0x40020000 /* operation mask bits */
-+#define XEMACPS_PHYMNTNC_OP_R_MASK	0x20000000 /* read operation */
-+#define XEMACPS_PHYMNTNC_OP_W_MASK	0x10000000 /* write operation */
-+#define XEMACPS_PHYMNTNC_ADDR_MASK	0x0F800000 /* Address bits */
-+#define XEMACPS_PHYMNTNC_REG_MASK	0x007C0000 /* register bits */
-+#define XEMACPS_PHYMNTNC_DATA_MASK	0x0000FFFF /* data bits */
-+#define XEMACPS_PHYMNTNC_PHYAD_SHIFT_MASK	23 /* Shift bits for PHYAD */
-+#define XEMACPS_PHYMNTNC_PHREG_SHIFT_MASK	18 /* Shift bits for PHREG */
-+
-+/* Wake on LAN bit definition */
-+#define XEMACPS_WOL_MCAST_MASK		0x00080000
-+#define XEMACPS_WOL_SPEREG1_MASK	0x00040000
-+#define XEMACPS_WOL_ARP_MASK		0x00020000
-+#define XEMACPS_WOL_MAGIC_MASK		0x00010000
-+#define XEMACPS_WOL_ARP_ADDR_MASK	0x0000FFFF
-+
-+/* Buffer descriptor status words offset */
-+#define XEMACPS_BD_ADDR_OFFSET		0x00000000 /**< word 0/addr of BDs */
-+#define XEMACPS_BD_STAT_OFFSET		0x00000004 /**< word 1/status of BDs */
-+
-+/* Transmit buffer descriptor status words bit positions.
-+ * Transmit buffer descriptor consists of two 32-bit registers,
-+ * the first - word0 contains a 32-bit address pointing to the location of
-+ * the transmit data.
-+ * The following register - word1, consists of various information to
-+ * control transmit process.  After transmit, this is updated with status
-+ * information, whether the frame was transmitted OK or why it had failed.
-+ */
-+#define XEMACPS_TXBUF_USED_MASK	0x80000000 /* Used bit. */
-+#define XEMACPS_TXBUF_WRAP_MASK	0x40000000 /* Wrap bit, last
-+							descriptor */
-+#define XEMACPS_TXBUF_RETRY_MASK	0x20000000 /* Retry limit exceeded */
-+#define XEMACPS_TXBUF_EXH_MASK		0x08000000 /* Buffers exhausted */
-+#define XEMACPS_TXBUF_LAC_MASK		0x04000000 /* Late collision. */
-+#define XEMACPS_TXBUF_NOCRC_MASK	0x00010000 /* No CRC */
-+#define XEMACPS_TXBUF_LAST_MASK	0x00008000 /* Last buffer */
-+#define XEMACPS_TXBUF_LEN_MASK		0x00003FFF /* Mask for length field */
-+
-+#define XEMACPS_TXBUF_ERR_MASK		0x3C000000 /* Mask for length field */
-+
-+/* Receive buffer descriptor status words bit positions.
-+ * Receive buffer descriptor consists of two 32-bit registers,
-+ * the first - word0 contains a 32-bit word aligned address pointing to the
-+ * address of the buffer. The lower two bits make up the wrap bit indicating
-+ * the last descriptor and the ownership bit to indicate it has been used.
-+ * The following register - word1, contains status information regarding why
-+ * the frame was received (the filter match condition) as well as other
-+ * useful info.
-+ */
-+#define XEMACPS_RXBUF_BCAST_MASK	0x80000000 /* Broadcast frame */
-+#define XEMACPS_RXBUF_MULTIHASH_MASK	0x40000000 /* Multicast hashed frame */
-+#define XEMACPS_RXBUF_UNIHASH_MASK	0x20000000 /* Unicast hashed frame */
-+#define XEMACPS_RXBUF_EXH_MASK		0x08000000 /* buffer exhausted */
-+#define XEMACPS_RXBUF_AMATCH_MASK	0x06000000 /* Specific address
-+						matched */
-+#define XEMACPS_RXBUF_IDFOUND_MASK	0x01000000 /* Type ID matched */
-+#define XEMACPS_RXBUF_IDMATCH_MASK	0x00C00000 /* ID matched mask */
-+#define XEMACPS_RXBUF_VLAN_MASK	0x00200000 /* VLAN tagged */
-+#define XEMACPS_RXBUF_PRI_MASK		0x00100000 /* Priority tagged */
-+#define XEMACPS_RXBUF_VPRI_MASK		0x000E0000 /* Vlan priority */
-+#define XEMACPS_RXBUF_CFI_MASK		0x00010000 /* CFI frame */
-+#define XEMACPS_RXBUF_EOF_MASK		0x00008000 /* End of frame. */
-+#define XEMACPS_RXBUF_SOF_MASK		0x00004000 /* Start of frame. */
-+#define XEMACPS_RXBUF_LEN_MASK		0x00003FFF /* Mask for length field */
-+
-+#define XEMACPS_RXBUF_WRAP_MASK	0x00000002 /* Wrap bit, last BD */
-+#define XEMACPS_RXBUF_NEW_MASK		0x00000001 /* Used bit.. */
-+#define XEMACPS_RXBUF_ADD_MASK		0xFFFFFFFC /* Mask for address */
-+
-+#define XEAMCPS_GEN_PURPOSE_TIMER_LOAD	100 /* timeout value is msecs */
-+
-+#define XEMACPS_GMII2RGMII_FULLDPLX		BMCR_FULLDPLX
-+#define XEMACPS_GMII2RGMII_SPEED1000		BMCR_SPEED1000
-+#define XEMACPS_GMII2RGMII_SPEED100		BMCR_SPEED100
-+#define XEMACPS_GMII2RGMII_REG_NUM			0x10
-+
-+#ifdef CONFIG_XILINX_PS_EMAC_HWTSTAMP
-+#define NS_PER_SEC			1000000000ULL /* Nanoseconds per
-+							second */
-+#endif
-+
-+#define xemacps_read(base, reg)					\
-+	__raw_readl(((void __iomem *)(base)) + (reg))
-+#define xemacps_write(base, reg, val)					\
-+	__raw_writel((val), ((void __iomem *)(base)) + (reg))
-+
-+struct ring_info {
-+	struct sk_buff *skb;
-+	dma_addr_t mapping;
-+	size_t len;
-+};
-+
-+/* DMA buffer descriptor structure. Each BD is two words */
-+struct xemacps_bd {
-+	u32 addr;
-+	u32 ctrl;
-+};
-+
-+
-+/* Our private device data. */
-+struct net_local {
-+	void __iomem *baseaddr;
-+	struct clk *devclk;
-+	struct clk *aperclk;
-+	struct notifier_block clk_rate_change_nb;
-+
-+	struct device_node *phy_node;
-+	struct device_node *gmii2rgmii_phy_node;
-+	struct ring_info *tx_skb;
-+	struct ring_info *rx_skb;
-+
-+	struct xemacps_bd *rx_bd;
-+	struct xemacps_bd *tx_bd;
-+
-+	dma_addr_t rx_bd_dma; /* physical address */
-+	dma_addr_t tx_bd_dma; /* physical address */
-+
-+	u32 tx_bd_ci;
-+	u32 tx_bd_tail;
-+	u32 rx_bd_ci;
-+
-+	u32 tx_bd_freecnt;
-+
-+	spinlock_t tx_lock;
-+	spinlock_t rx_lock;
-+	spinlock_t nwctrlreg_lock;
-+
-+	struct platform_device *pdev;
-+	struct net_device *ndev; /* this device */
-+	struct tasklet_struct tx_bdreclaim_tasklet;
-+	struct workqueue_struct *txtimeout_handler_wq;
-+	struct work_struct txtimeout_reinit;
-+
-+	struct napi_struct napi; /* napi information for device */
-+	struct net_device_stats stats; /* Statistics for this device */
-+
-+	struct timer_list gen_purpose_timer; /* Used for stats update */
-+
-+	/* Manage internal timer for packet timestamping */
-+	struct cyclecounter cycles;
-+	struct timecounter clock;
-+	struct hwtstamp_config hwtstamp_config;
-+
-+	struct mii_bus *mii_bus;
-+	struct phy_device *phy_dev;
-+	struct phy_device *gmii2rgmii_phy_dev;
-+	phy_interface_t phy_interface;
-+	unsigned int link;
-+	unsigned int speed;
-+	unsigned int duplex;
-+	/* RX ip/tcp/udp checksum */
-+	unsigned ip_summed;
-+	unsigned int enetnum;
-+	unsigned int lastrxfrmscntr;
-+#ifdef CONFIG_XILINX_PS_EMAC_HWTSTAMP
-+	unsigned int ptpenetclk;
-+#endif
-+};
-+#define to_net_local(_nb)	container_of(_nb, struct net_local,\
-+		clk_rate_change_nb)
-+
-+static struct net_device_ops netdev_ops;
-+
-+/**
-+ * xemacps_mdio_read - Read current value of phy register indicated by
-+ * phyreg.
-+ * @bus: mdio bus
-+ * @mii_id: mii id
-+ * @phyreg: phy register to be read
-+ *
-+ * @return: value read from specified phy register.
-+ *
-+ * note: This is for 802.3 clause 22 phys access. For 802.3 clause 45 phys
-+ * access, set bit 30 to be 1. e.g. change XEMACPS_PHYMNTNC_OP_MASK to
-+ * 0x00020000.
-+ */
-+static int xemacps_mdio_read(struct mii_bus *bus, int mii_id, int phyreg)
-+{
-+	struct net_local *lp = bus->priv;
-+	u32 regval;
-+	int value;
-+	volatile u32 ipisr;
-+
-+	regval  = XEMACPS_PHYMNTNC_OP_MASK;
-+	regval |= XEMACPS_PHYMNTNC_OP_R_MASK;
-+	regval |= (mii_id << XEMACPS_PHYMNTNC_PHYAD_SHIFT_MASK);
-+	regval |= (phyreg << XEMACPS_PHYMNTNC_PHREG_SHIFT_MASK);
-+
-+	xemacps_write(lp->baseaddr, XEMACPS_PHYMNTNC_OFFSET, regval);
-+
-+	/* wait for end of transfer */
-+	do {
-+		cpu_relax();
-+		ipisr = xemacps_read(lp->baseaddr, XEMACPS_NWSR_OFFSET);
-+	} while ((ipisr & XEMACPS_NWSR_MDIOIDLE_MASK) == 0);
-+
-+	value = xemacps_read(lp->baseaddr, XEMACPS_PHYMNTNC_OFFSET) &
-+			XEMACPS_PHYMNTNC_DATA_MASK;
-+
-+	return value;
-+}
-+
-+/**
-+ * xemacps_mdio_write - Write passed in value to phy register indicated
-+ * by phyreg.
-+ * @bus: mdio bus
-+ * @mii_id: mii id
-+ * @phyreg: phy register to be configured.
-+ * @value: value to be written to phy register.
-+ * return 0. This API requires to be int type or compile warning generated
-+ *
-+ * note: This is for 802.3 clause 22 phys access. For 802.3 clause 45 phys
-+ * access, set bit 30 to be 1. e.g. change XEMACPS_PHYMNTNC_OP_MASK to
-+ * 0x00020000.
-+ */
-+static int xemacps_mdio_write(struct mii_bus *bus, int mii_id, int phyreg,
-+	u16 value)
-+{
-+	struct net_local *lp = bus->priv;
-+	u32 regval;
-+	volatile u32 ipisr;
-+
-+	regval  = XEMACPS_PHYMNTNC_OP_MASK;
-+	regval |= XEMACPS_PHYMNTNC_OP_W_MASK;
-+	regval |= (mii_id << XEMACPS_PHYMNTNC_PHYAD_SHIFT_MASK);
-+	regval |= (phyreg << XEMACPS_PHYMNTNC_PHREG_SHIFT_MASK);
-+	regval |= value;
-+
-+	xemacps_write(lp->baseaddr, XEMACPS_PHYMNTNC_OFFSET, regval);
-+
-+	/* wait for end of transfer */
-+	do {
-+		cpu_relax();
-+		ipisr = xemacps_read(lp->baseaddr, XEMACPS_NWSR_OFFSET);
-+	} while ((ipisr & XEMACPS_NWSR_MDIOIDLE_MASK) == 0);
-+
-+	return 0;
-+}
-+
-+
-+/**
-+ * xemacps_mdio_reset - mdio reset. It seems to be required per open
-+ * source documentation phy.txt. But there is no reset in this device.
-+ * Provide function API for now.
-+ * @bus: mdio bus
-+ **/
-+static int xemacps_mdio_reset(struct mii_bus *bus)
-+{
-+	return 0;
-+}
-+
-+/**
-+ * xemacps_set_freq() - Set a clock to a new frequency
-+ * @clk		Pointer to the clock to change
-+ * @rate	New frequency in Hz
-+ * @dev		Pointer to the struct device
-+ */
-+static void xemacps_set_freq(struct clk *clk, long rate, struct device *dev)
-+{
-+	rate = clk_round_rate(clk, rate);
-+	if (rate < 0)
-+		return;
-+
-+	dev_info(dev, "Set clk to %ld Hz\n", rate);
-+	if (clk_set_rate(clk, rate))
-+		dev_err(dev, "Setting new clock rate failed.\n");
-+}
-+
-+/**
-+ * xemacps_adjust_link - handles link status changes, such as speed,
-+ * duplex, up/down, ...
-+ * @ndev: network device
-+ */
-+static void xemacps_adjust_link(struct net_device *ndev)
-+{
-+	struct net_local *lp = netdev_priv(ndev);
-+	struct phy_device *phydev = lp->phy_dev;
-+	struct phy_device *gmii2rgmii_phydev = lp->gmii2rgmii_phy_dev;
-+	int status_change = 0;
-+	u32 regval;
-+	u16 gmii2rgmii_reg = 0;
-+
-+	if (phydev->link) {
-+		if ((lp->speed != phydev->speed) ||
-+			(lp->duplex != phydev->duplex)) {
-+			regval = xemacps_read(lp->baseaddr,
-+				XEMACPS_NWCFG_OFFSET);
-+			regval &= ~(XEMACPS_NWCFG_FDEN_MASK |
-+					XEMACPS_NWCFG_1000_MASK |
-+					XEMACPS_NWCFG_100_MASK);
-+
-+			if (phydev->duplex) {
-+				regval |= XEMACPS_NWCFG_FDEN_MASK;
-+				gmii2rgmii_reg |= XEMACPS_GMII2RGMII_FULLDPLX;
-+			}
-+
-+			if (phydev->speed == SPEED_1000) {
-+				regval |= XEMACPS_NWCFG_1000_MASK;
-+				gmii2rgmii_reg |= XEMACPS_GMII2RGMII_SPEED1000;
-+				xemacps_set_freq(lp->devclk, 125000000,
-+						&lp->pdev->dev);
-+			} else if (phydev->speed == SPEED_100) {
-+				regval |= XEMACPS_NWCFG_100_MASK;
-+				gmii2rgmii_reg |= XEMACPS_GMII2RGMII_SPEED100;
-+				xemacps_set_freq(lp->devclk, 25000000,
-+						&lp->pdev->dev);
-+			} else if (phydev->speed == SPEED_10) {
-+				xemacps_set_freq(lp->devclk, 2500000,
-+						&lp->pdev->dev);
-+			} else {
-+				dev_err(&lp->pdev->dev,
-+					"%s: unknown PHY speed %d\n",
-+					__func__, phydev->speed);
-+				return;
-+			}
-+
-+			xemacps_write(lp->baseaddr, XEMACPS_NWCFG_OFFSET,
-+			regval);
-+
-+			if (gmii2rgmii_phydev != NULL) {
-+				xemacps_mdio_write(lp->mii_bus,
-+					gmii2rgmii_phydev->addr,
-+					XEMACPS_GMII2RGMII_REG_NUM,
-+					gmii2rgmii_reg);
-+			}
-+
-+			lp->speed = phydev->speed;
-+			lp->duplex = phydev->duplex;
-+			status_change = 1;
-+		}
-+	}
-+
-+	if (phydev->link != lp->link) {
-+		lp->link = phydev->link;
-+		status_change = 1;
-+	}
-+
-+	if (status_change) {
-+		if (phydev->link)
-+			dev_info(&lp->pdev->dev, "link up (%d/%s)\n",
-+				phydev->speed,
-+				DUPLEX_FULL == phydev->duplex ?
-+				"FULL" : "HALF");
-+		else
-+			dev_info(&lp->pdev->dev, "link down\n");
-+	}
-+}
-+
-+static int xemacps_clk_notifier_cb(struct notifier_block *nb, unsigned long
-+		event, void *data)
-+{
-+/*
-+	struct clk_notifier_data *ndata = data;
-+	struct net_local *nl = to_net_local(nb);
-+*/
-+
-+	switch (event) {
-+	case PRE_RATE_CHANGE:
-+		/* if a rate change is announced we need to check whether we
-+		 * can maintain the current frequency by changing the clock
-+		 * dividers.
-+		 * I don't see how this can be done using the current fmwk!?
-+		 * For now we always allow the rate change. Otherwise we would
-+		 * even prevent ourself to change the rate.
-+		 */
-+		return NOTIFY_OK;
-+	case POST_RATE_CHANGE:
-+		/* not sure this will work. actually i'm sure it does not. this
-+		 * callback is not allowed to call back into COMMON_CLK, what
-+		 * adjust_link() does...
-+		 */
-+		/*xemacps_adjust_link(nl->ndev); would likely lock up kernel */
-+		return NOTIFY_OK;
-+	case ABORT_RATE_CHANGE:
-+	default:
-+		return NOTIFY_DONE;
-+	}
-+}
-+
-+/**
-+ * xemacps_mii_probe - probe mii bus, find the right bus_id to register
-+ * phy callback function.
-+ * @ndev: network interface device structure
-+ * return 0 on success, negative value if error
-+ **/
-+static int xemacps_mii_probe(struct net_device *ndev)
-+{
-+	struct net_local *lp = netdev_priv(ndev);
-+	struct phy_device *phydev = NULL;
-+
-+	if (lp->phy_node) {
-+		phydev = of_phy_connect(lp->ndev,
-+					lp->phy_node,
-+					&xemacps_adjust_link,
-+					0,
-+					lp->phy_interface);
-+	}
-+	if (!phydev) {
-+		dev_err(&lp->pdev->dev, "%s: no PHY found\n", ndev->name);
-+		return -1;
-+	}
-+
-+	dev_dbg(&lp->pdev->dev,
-+		"GEM: phydev %p, phydev->phy_id 0x%x, phydev->addr 0x%x\n",
-+		phydev, phydev->phy_id, phydev->addr);
-+
-+	phydev->supported &= (PHY_GBIT_FEATURES | SUPPORTED_Pause |
-+							SUPPORTED_Asym_Pause);
-+	phydev->advertising = phydev->supported;
-+
-+	lp->link    = 0;
-+	lp->speed   = 0;
-+	lp->duplex  = -1;
-+	lp->phy_dev = phydev;
-+
-+	phy_start(lp->phy_dev);
-+
-+	dev_dbg(&lp->pdev->dev, "phy_addr 0x%x, phy_id 0x%08x\n",
-+			lp->phy_dev->addr, lp->phy_dev->phy_id);
-+
-+	dev_dbg(&lp->pdev->dev, "attach [%s] phy driver\n",
-+			lp->phy_dev->drv->name);
-+
-+	if (lp->gmii2rgmii_phy_node) {
-+		phydev = of_phy_connect(lp->ndev,
-+					lp->gmii2rgmii_phy_node,
-+					NULL,
-+					0, 0);
-+		if (!phydev) {
-+			dev_err(&lp->pdev->dev,
-+				"%s: no gmii to rgmii converter found\n",
-+			ndev->name);
-+			return -1;
-+		}
-+		lp->gmii2rgmii_phy_dev = phydev;
-+	} else
-+		lp->gmii2rgmii_phy_dev = NULL;
-+
-+	return 0;
-+}
-+
-+/**
-+ * xemacps_mii_init - Initialize and register mii bus to network device
-+ * @lp: local device instance pointer
-+ * return 0 on success, negative value if error
-+ **/
-+static int xemacps_mii_init(struct net_local *lp)
-+{
-+	int rc = -ENXIO, i;
-+	struct resource res;
-+	struct device_node *np = of_get_parent(lp->phy_node);
-+	struct device_node *npp;
-+
-+	lp->mii_bus = mdiobus_alloc();
-+	if (lp->mii_bus == NULL) {
-+		rc = -ENOMEM;
-+		goto err_out;
-+	}
-+
-+	lp->mii_bus->name  = "XEMACPS mii bus";
-+	lp->mii_bus->read  = &xemacps_mdio_read;
-+	lp->mii_bus->write = &xemacps_mdio_write;
-+	lp->mii_bus->reset = &xemacps_mdio_reset;
-+	lp->mii_bus->priv = lp;
-+	lp->mii_bus->parent = &lp->ndev->dev;
-+
-+	lp->mii_bus->irq = kmalloc(sizeof(int)*PHY_MAX_ADDR, GFP_KERNEL);
-+	if (!lp->mii_bus->irq) {
-+		rc = -ENOMEM;
-+		goto err_out_free_mdiobus;
-+	}
-+
-+	for (i = 0; i < PHY_MAX_ADDR; i++)
-+		lp->mii_bus->irq[i] = PHY_POLL;
-+	npp = of_get_parent(np);
-+	of_address_to_resource(npp, 0, &res);
-+	snprintf(lp->mii_bus->id, MII_BUS_ID_SIZE, "%.8llx",
-+		 (unsigned long long)res.start);
-+	if (of_mdiobus_register(lp->mii_bus, np))
-+		goto err_out_free_mdio_irq;
-+
-+	return 0;
-+
-+err_out_free_mdio_irq:
-+	kfree(lp->mii_bus->irq);
-+err_out_free_mdiobus:
-+	mdiobus_free(lp->mii_bus);
-+err_out:
-+	return rc;
-+}
-+
-+/**
-+ * xemacps_update_hdaddr - Update device's MAC address when configured
-+ * MAC address is not valid, reconfigure with a good one.
-+ * @lp: local device instance pointer
-+ **/
-+static void xemacps_update_hwaddr(struct net_local *lp)
-+{
-+	u32 regvall;
-+	u16 regvalh;
-+	u8  addr[6];
-+
-+	regvall = xemacps_read(lp->baseaddr, XEMACPS_LADDR1L_OFFSET);
-+	regvalh = xemacps_read(lp->baseaddr, XEMACPS_LADDR1H_OFFSET);
-+	addr[0] = regvall & 0xFF;
-+	addr[1] = (regvall >> 8) & 0xFF;
-+	addr[2] = (regvall >> 16) & 0xFF;
-+	addr[3] = (regvall >> 24) & 0xFF;
-+	addr[4] = regvalh & 0xFF;
-+	addr[5] = (regvalh >> 8) & 0xFF;
-+
-+	if (is_valid_ether_addr(addr)) {
-+		memcpy(lp->ndev->dev_addr, addr, sizeof(addr));
-+	} else {
-+		dev_info(&lp->pdev->dev, "invalid address, use assigned\n");
-+		random_ether_addr(lp->ndev->dev_addr);
-+		dev_info(&lp->pdev->dev,
-+				"MAC updated %02x:%02x:%02x:%02x:%02x:%02x\n",
-+				lp->ndev->dev_addr[0], lp->ndev->dev_addr[1],
-+				lp->ndev->dev_addr[2], lp->ndev->dev_addr[3],
-+				lp->ndev->dev_addr[4], lp->ndev->dev_addr[5]);
-+	}
-+}
-+
-+/**
-+ * xemacps_set_hwaddr - Set device's MAC address from ndev->dev_addr
-+ * @lp: local device instance pointer
-+ **/
-+static void xemacps_set_hwaddr(struct net_local *lp)
-+{
-+	u32 regvall = 0;
-+	u16 regvalh = 0;
-+#ifdef __LITTLE_ENDIAN
-+	regvall = cpu_to_le32(*((u32 *)lp->ndev->dev_addr));
-+	regvalh = cpu_to_le16(*((u16 *)(lp->ndev->dev_addr + 4)));
-+#endif
-+#ifdef __BIG_ENDIAN
-+	regvall = cpu_to_be32(*((u32 *)lp->ndev->dev_addr));
-+	regvalh = cpu_to_be16(*((u16 *)(lp->ndev->dev_addr + 4)));
-+#endif
-+	/* LADDRXH has to be wriiten latter than LADDRXL to enable
-+	 * this address even if these 16 bits are zeros.
-+	 */
-+	xemacps_write(lp->baseaddr, XEMACPS_LADDR1L_OFFSET, regvall);
-+	xemacps_write(lp->baseaddr, XEMACPS_LADDR1H_OFFSET, regvalh);
-+#ifdef DEBUG
-+	regvall = xemacps_read(lp->baseaddr, XEMACPS_LADDR1L_OFFSET);
-+	regvalh = xemacps_read(lp->baseaddr, XEMACPS_LADDR1H_OFFSET);
-+	dev_dbg(&lp->pdev->dev,
-+			"MAC 0x%08x, 0x%08x, %02x:%02x:%02x:%02x:%02x:%02x\n",
-+		regvall, regvalh,
-+		(regvall & 0xff), ((regvall >> 8) & 0xff),
-+		((regvall >> 16) & 0xff), (regvall >> 24),
-+		(regvalh & 0xff), (regvalh >> 8));
-+#endif
-+}
-+
-+/**
-+ * xemacps_reset_hw - Helper function to reset the underlying hardware.
-+ * This is called when we get into such deep trouble that we don't know
-+ * how to handle otherwise.
-+ * @lp: local device instance pointer
-+ */
-+static void xemacps_reset_hw(struct net_local *lp)
-+{
-+	u32 regisr;
-+	/* make sure we have the buffer for ourselves */
-+	wmb();
-+
-+	/* Have a clean start */
-+	xemacps_write(lp->baseaddr, XEMACPS_NWCTRL_OFFSET, 0);
-+
-+	/* Clear statistic counters */
-+	xemacps_write(lp->baseaddr, XEMACPS_NWCTRL_OFFSET,
-+		XEMACPS_NWCTRL_STATCLR_MASK);
-+
-+	/* Clear TX and RX status */
-+	xemacps_write(lp->baseaddr, XEMACPS_TXSR_OFFSET, ~0UL);
-+	xemacps_write(lp->baseaddr, XEMACPS_RXSR_OFFSET, ~0UL);
-+
-+	/* Disable all interrupts */
-+	xemacps_write(lp->baseaddr, XEMACPS_IDR_OFFSET, ~0UL);
-+	synchronize_irq(lp->ndev->irq);
-+	regisr = xemacps_read(lp->baseaddr, XEMACPS_ISR_OFFSET);
-+	xemacps_write(lp->baseaddr, XEMACPS_ISR_OFFSET, regisr);
-+}
-+
-+#ifdef CONFIG_XILINX_PS_EMAC_HWTSTAMP
-+
-+/**
-+ * xemacps_get_hwticks - get the current value of the GEM internal timer
-+ * @lp: local device instance pointer
-+ * return: nothing
-+ **/
-+static inline void
-+xemacps_get_hwticks(struct net_local *lp, u64 *sec, u64 *nsec)
-+{
-+	do {
-+		*nsec = xemacps_read(lp->baseaddr, XEMACPS_1588NS_OFFSET);
-+		*sec = xemacps_read(lp->baseaddr, XEMACPS_1588S_OFFSET);
-+	} while (*nsec > xemacps_read(lp->baseaddr, XEMACPS_1588NS_OFFSET));
-+}
-+
-+/**
-+ * xemacps_read_clock - read raw cycle counter (to be used by time counter)
-+ */
-+static cycle_t xemacps_read_clock(const struct cyclecounter *tc)
-+{
-+	struct net_local *lp =
-+			container_of(tc, struct net_local, cycles);
-+	u64 stamp;
-+	u64 sec, nsec;
-+
-+	xemacps_get_hwticks(lp, &sec, &nsec);
-+	stamp = (sec << 32) | nsec;
-+
-+	return stamp;
-+}
-+
-+
-+/**
-+ * xemacps_systim_to_hwtstamp - convert system time value to hw timestamp
-+ * @adapter: board private structure
-+ * @shhwtstamps: timestamp structure to update
-+ * @regval: unsigned 64bit system time value.
-+ *
-+ * We need to convert the system time value stored in the RX/TXSTMP registers
-+ * into a hwtstamp which can be used by the upper level timestamping functions
-+ */
-+static void xemacps_systim_to_hwtstamp(struct net_local *lp,
-+				struct skb_shared_hwtstamps *shhwtstamps,
-+				u64 regval)
-+{
-+	u64 ns;
-+
-+	ns = timecounter_cyc2time(&lp->clock, regval);
-+	timecompare_update(&lp->compare, ns);
-+	memset(shhwtstamps, 0, sizeof(struct skb_shared_hwtstamps));
-+	shhwtstamps->hwtstamp = ns_to_ktime(ns);
-+	shhwtstamps->syststamp = timecompare_transform(&lp->compare, ns);
-+}
-+
-+static void
-+xemacps_rx_hwtstamp(struct net_local *lp,
-+			struct sk_buff *skb, unsigned msg_type)
-+{
-+	u64 time64, sec, nsec;
-+
-+	if (!msg_type) {
-+		/* PTP Event Frame packets */
-+		sec = xemacps_read(lp->baseaddr, XEMACPS_PTPERXS_OFFSET);
-+		nsec = xemacps_read(lp->baseaddr, XEMACPS_PTPERXNS_OFFSET);
-+	} else {
-+		/* PTP Peer Event Frame packets */
-+		sec = xemacps_read(lp->baseaddr, XEMACPS_PTPPRXS_OFFSET);
-+		nsec = xemacps_read(lp->baseaddr, XEMACPS_PTPPRXNS_OFFSET);
-+	}
-+	time64 = (sec << 32) | nsec;
-+	xemacps_systim_to_hwtstamp(lp, skb_hwtstamps(skb), time64);
-+}
-+
-+static void
-+xemacps_tx_hwtstamp(struct net_local *lp,
-+			struct sk_buff *skb, unsigned msg_type)
-+{
-+	u64 time64, sec, nsec;
-+
-+	if (!msg_type) {
-+		/* PTP Event Frame packets */
-+		sec = xemacps_read(lp->baseaddr, XEMACPS_PTPETXS_OFFSET);
-+		nsec = xemacps_read(lp->baseaddr, XEMACPS_PTPETXNS_OFFSET);
-+	} else {
-+		/* PTP Peer Event Frame packets */
-+		sec = xemacps_read(lp->baseaddr, XEMACPS_PTPPTXS_OFFSET);
-+		nsec = xemacps_read(lp->baseaddr, XEMACPS_PTPPTXNS_OFFSET);
-+	}
-+
-+	time64 = (sec << 32) | nsec;
-+	xemacps_systim_to_hwtstamp(lp, skb_hwtstamps(skb), time64);
-+	skb_tstamp_tx(skb, skb_hwtstamps(skb));
-+}
-+
-+#endif /* CONFIG_XILINX_PS_EMAC_HWTSTAMP */
-+
-+/**
-+ * xemacps_rx - process received packets when napi called
-+ * @lp: local device instance pointer
-+ * @budget: NAPI budget
-+ * return: number of BDs processed
-+ **/
-+static int xemacps_rx(struct net_local *lp, int budget)
-+{
-+	struct xemacps_bd *cur_p;
-+	u32 len;
-+	struct sk_buff *skb;
-+	struct sk_buff *new_skb;
-+	u32 new_skb_baddr;
-+	unsigned int numbdfree = 0;
-+	u32 size = 0;
-+	u32 packets = 0;
-+	u32 regval;
-+
-+	cur_p = &lp->rx_bd[lp->rx_bd_ci];
-+	regval = cur_p->addr;
-+	rmb();
-+	while (numbdfree < budget) {
-+		if (!(regval & XEMACPS_RXBUF_NEW_MASK))
-+			break;
-+
-+		new_skb = netdev_alloc_skb(lp->ndev, XEMACPS_RX_BUF_SIZE);
-+		if (new_skb == NULL) {
-+			dev_err(&lp->ndev->dev, "no memory for new sk_buff\n");
-+			break;
-+		}
-+		/* Get dma handle of skb->data */
-+		new_skb_baddr = (u32) dma_map_single(lp->ndev->dev.parent,
-+					new_skb->data,
-+					XEMACPS_RX_BUF_SIZE,
-+					DMA_FROM_DEVICE);
-+
-+		/* the packet length */
-+		len = cur_p->ctrl & XEMACPS_RXBUF_LEN_MASK;
-+		rmb();
-+		skb = lp->rx_skb[lp->rx_bd_ci].skb;
-+		dma_unmap_single(lp->ndev->dev.parent,
-+				lp->rx_skb[lp->rx_bd_ci].mapping,
-+				lp->rx_skb[lp->rx_bd_ci].len,
-+				DMA_FROM_DEVICE);
-+
-+		/* setup received skb and send it upstream */
-+		skb_put(skb, len);  /* Tell the skb how much data we got. */
-+		skb->protocol = eth_type_trans(skb, lp->ndev);
-+
-+		skb->ip_summed = lp->ip_summed;
-+
-+#ifdef CONFIG_XILINX_PS_EMAC_HWTSTAMP
-+		if ((lp->hwtstamp_config.rx_filter == HWTSTAMP_FILTER_ALL) &&
-+		    (ntohs(skb->protocol) == 0x800)) {
-+			unsigned ip_proto, dest_port, msg_type;
-+
-+			/* While the GEM can timestamp PTP packets, it does
-+			 * not mark the RX descriptor to identify them.  This
-+			 * is entirely the wrong place to be parsing UDP
-+			 * headers, but some minimal effort must be made.
-+			 * NOTE: the below parsing of ip_proto and dest_port
-+			 * depend on the use of Ethernet_II encapsulation,
-+			 * IPv4 without any options.
-+			 */
-+			ip_proto = *((u8 *)skb->mac_header + 14 + 9);
-+			dest_port = ntohs(*(((u16 *)skb->mac_header) +
-+						((14 + 20 + 2)/2)));
-+			msg_type = *((u8 *)skb->mac_header + 42);
-+			if ((ip_proto == IPPROTO_UDP) &&
-+			    (dest_port == 0x13F)) {
-+				/* Timestamp this packet */
-+				xemacps_rx_hwtstamp(lp, skb, msg_type & 0x2);
-+			}
-+		}
-+#endif /* CONFIG_XILINX_PS_EMAC_HWTSTAMP */
-+		size += len;
-+		packets++;
-+		netif_receive_skb(skb);
-+
-+		cur_p->addr = (cur_p->addr & ~XEMACPS_RXBUF_ADD_MASK)
-+					| (new_skb_baddr);
-+		lp->rx_skb[lp->rx_bd_ci].skb = new_skb;
-+		lp->rx_skb[lp->rx_bd_ci].mapping = new_skb_baddr;
-+		lp->rx_skb[lp->rx_bd_ci].len = XEMACPS_RX_BUF_SIZE;
-+
-+		cur_p->ctrl = 0;
-+		cur_p->addr &= (~XEMACPS_RXBUF_NEW_MASK);
-+		wmb();
-+
-+		lp->rx_bd_ci++;
-+		lp->rx_bd_ci = lp->rx_bd_ci % XEMACPS_RECV_BD_CNT;
-+		cur_p = &lp->rx_bd[lp->rx_bd_ci];
-+		regval = cur_p->addr;
-+		rmb();
-+		numbdfree++;
-+	}
-+	wmb();
-+	lp->stats.rx_packets += packets;
-+	lp->stats.rx_bytes += size;
-+	return numbdfree;
-+}
-+
-+/**
-+ * xemacps_rx_poll - NAPI poll routine
-+ * napi: pointer to napi struct
-+ * budget:
-+ **/
-+static int xemacps_rx_poll(struct napi_struct *napi, int budget)
-+{
-+	struct net_local *lp = container_of(napi, struct net_local, napi);
-+	int work_done = 0;
-+	u32 regval;
-+
-+	spin_lock(&lp->rx_lock);
-+	while (1) {
-+		regval = xemacps_read(lp->baseaddr, XEMACPS_RXSR_OFFSET);
-+		xemacps_write(lp->baseaddr, XEMACPS_RXSR_OFFSET, regval);
-+		if (regval & XEMACPS_RXSR_HRESPNOK_MASK)
-+			dev_err(&lp->pdev->dev, "RX error 0x%x\n", regval);
-+
-+		work_done += xemacps_rx(lp, budget - work_done);
-+		if (work_done >= budget)
-+			break;
-+
-+		napi_complete(napi);
-+		/* We disabled RX interrupts in interrupt service
-+		 * routine, now it is time to enable it back.
-+		 */
-+		xemacps_write(lp->baseaddr,
-+			XEMACPS_IER_OFFSET, XEMACPS_IXR_FRAMERX_MASK);
-+
-+		/* If a packet has come in between the last check of the BD
-+		 * list and unmasking the interrupts, we may have missed the
-+		 * interrupt, so reschedule here.
-+		 */
-+		if ((lp->rx_bd[lp->rx_bd_ci].addr & XEMACPS_RXBUF_NEW_MASK)
-+		&&  napi_reschedule(napi)) {
-+			xemacps_write(lp->baseaddr,
-+				XEMACPS_IDR_OFFSET, XEMACPS_IXR_FRAMERX_MASK);
-+			continue;
-+		}
-+		break;
-+	}
-+	spin_unlock(&lp->rx_lock);
-+	return work_done;
-+}
-+
-+/**
-+ * xemacps_tx_poll - tx bd reclaim tasklet handler
-+ * @data: pointer to network interface device structure
-+ **/
-+static void xemacps_tx_poll(unsigned long data)
-+{
-+	struct net_device *ndev = (struct net_device *)data;
-+	struct net_local *lp = netdev_priv(ndev);
-+	u32 regval;
-+	u32 len = 0;
-+	unsigned int bdcount = 0;
-+	unsigned int bdpartialcount = 0;
-+	unsigned int sop = 0;
-+	struct xemacps_bd *cur_p;
-+	u32 cur_i;
-+	u32 numbdstofree;
-+	u32 numbdsinhw;
-+	struct ring_info *rp;
-+	struct sk_buff *skb;
-+	unsigned long flags;
-+
-+	spin_lock(&lp->tx_lock);
-+	regval = xemacps_read(lp->baseaddr, XEMACPS_TXSR_OFFSET);
-+	xemacps_write(lp->baseaddr, XEMACPS_TXSR_OFFSET, regval);
-+	dev_dbg(&lp->pdev->dev, "TX status 0x%x\n", regval);
-+	if (regval & (XEMACPS_TXSR_HRESPNOK_MASK | XEMACPS_TXSR_BUFEXH_MASK))
-+		dev_err(&lp->pdev->dev, "TX error 0x%x\n", regval);
-+
-+	cur_i = lp->tx_bd_ci;
-+	cur_p = &lp->tx_bd[cur_i];
-+	numbdsinhw = XEMACPS_SEND_BD_CNT - lp->tx_bd_freecnt;
-+	while (bdcount < numbdsinhw) {
-+		if (sop == 0) {
-+			if (cur_p->ctrl & XEMACPS_TXBUF_USED_MASK)
-+				sop = 1;
-+			else
-+				break;
-+		}
-+
-+		bdcount++;
-+		bdpartialcount++;
-+
-+		/* hardware has processed this BD so check the "last" bit.
-+		 * If it is clear, then there are more BDs for the current
-+		 * packet. Keep a count of these partial packet BDs.
-+		 */
-+		if (cur_p->ctrl & XEMACPS_TXBUF_LAST_MASK) {
-+			sop = 0;
-+			bdpartialcount = 0;
-+		}
-+
-+		cur_i++;
-+		cur_i = cur_i % XEMACPS_SEND_BD_CNT;
-+		cur_p = &lp->tx_bd[cur_i];
-+	}
-+	numbdstofree = bdcount - bdpartialcount;
-+	lp->tx_bd_freecnt += numbdstofree;
-+	numbdsinhw -= numbdstofree;
-+	if (!numbdstofree)
-+		goto tx_poll_out;
-+
-+	cur_p = &lp->tx_bd[lp->tx_bd_ci];
-+	while (numbdstofree) {
-+		rp = &lp->tx_skb[lp->tx_bd_ci];
-+		skb = rp->skb;
-+
-+		len += (cur_p->ctrl & XEMACPS_TXBUF_LEN_MASK);
-+
-+#ifdef CONFIG_XILINX_PS_EMAC_HWTSTAMP
-+		if ((lp->hwtstamp_config.tx_type == HWTSTAMP_TX_ON) &&
-+			(ntohs(skb->protocol) == 0x800)) {
-+			unsigned ip_proto, dest_port, msg_type;
-+
-+			skb_reset_mac_header(skb);
-+
-+			ip_proto = *((u8 *)skb->mac_header + 14 + 9);
-+			dest_port = ntohs(*(((u16 *)skb->mac_header) +
-+					((14 + 20 + 2)/2)));
-+			msg_type = *((u8 *)skb->mac_header + 42);
-+			if ((ip_proto == IPPROTO_UDP) &&
-+				(dest_port == 0x13F)) {
-+				/* Timestamp this packet */
-+				xemacps_tx_hwtstamp(lp, skb, msg_type & 0x2);
-+			}
-+		}
-+#endif /* CONFIG_XILINX_PS_EMAC_HWTSTAMP */
-+
-+		dma_unmap_single(&lp->pdev->dev, rp->mapping, rp->len,
-+			DMA_TO_DEVICE);
-+		rp->skb = NULL;
-+		dev_kfree_skb(skb);
-+		/* log tx completed packets and bytes, errors logs
-+		 * are in other error counters.
-+		 */
-+		if (cur_p->ctrl & XEMACPS_TXBUF_LAST_MASK) {
-+			lp->stats.tx_packets++;
-+			lp->stats.tx_bytes += len;
-+			len = 0;
-+		}
-+
-+		/* Set used bit, preserve wrap bit; clear everything else. */
-+		cur_p->ctrl |= XEMACPS_TXBUF_USED_MASK;
-+		cur_p->ctrl &= (XEMACPS_TXBUF_USED_MASK |
-+					XEMACPS_TXBUF_WRAP_MASK);
-+
-+		lp->tx_bd_ci++;
-+		lp->tx_bd_ci = lp->tx_bd_ci % XEMACPS_SEND_BD_CNT;
-+		cur_p = &lp->tx_bd[lp->tx_bd_ci];
-+		numbdstofree--;
-+	}
-+	wmb();
-+
-+	if (numbdsinhw) {
-+		spin_lock_irqsave(&lp->nwctrlreg_lock, flags);
-+		regval = xemacps_read(lp->baseaddr, XEMACPS_NWCTRL_OFFSET);
-+		regval |= XEMACPS_NWCTRL_STARTTX_MASK;
-+		xemacps_write(lp->baseaddr, XEMACPS_NWCTRL_OFFSET, regval);
-+		spin_unlock_irqrestore(&lp->nwctrlreg_lock, flags);
-+	}
-+
-+	netif_wake_queue(ndev);
-+
-+tx_poll_out:
-+	spin_unlock(&lp->tx_lock);
-+}
-+
-+/**
-+ * xemacps_interrupt - interrupt main service routine
-+ * @irq: interrupt number
-+ * @dev_id: pointer to a network device structure
-+ * return IRQ_HANDLED or IRQ_NONE
-+ **/
-+static irqreturn_t xemacps_interrupt(int irq, void *dev_id)
-+{
-+	struct net_device *ndev = dev_id;
-+	struct net_local *lp = netdev_priv(ndev);
-+	u32 regisr;
-+	u32 regctrl;
-+
-+	regisr = xemacps_read(lp->baseaddr, XEMACPS_ISR_OFFSET);
-+	if (unlikely(!regisr))
-+		return IRQ_NONE;
-+
-+	xemacps_write(lp->baseaddr, XEMACPS_ISR_OFFSET, regisr);
-+
-+	while (regisr) {
-+		if (regisr & (XEMACPS_IXR_TXCOMPL_MASK |
-+				XEMACPS_IXR_TX_ERR_MASK)) {
-+			tasklet_schedule(&lp->tx_bdreclaim_tasklet);
-+		}
-+
-+		if (regisr & XEMACPS_IXR_RXUSED_MASK) {
-+			spin_lock(&lp->nwctrlreg_lock);
-+			regctrl = xemacps_read(lp->baseaddr,
-+					XEMACPS_NWCTRL_OFFSET);
-+			regctrl |= XEMACPS_NWCTRL_FLUSH_DPRAM_MASK;
-+			xemacps_write(lp->baseaddr,
-+					XEMACPS_NWCTRL_OFFSET, regctrl);
-+			spin_unlock(&lp->nwctrlreg_lock);
-+		}
-+
-+		if (regisr & XEMACPS_IXR_FRAMERX_MASK) {
-+			xemacps_write(lp->baseaddr,
-+				XEMACPS_IDR_OFFSET, XEMACPS_IXR_FRAMERX_MASK);
-+			napi_schedule(&lp->napi);
-+		}
-+		regisr = xemacps_read(lp->baseaddr, XEMACPS_ISR_OFFSET);
-+		xemacps_write(lp->baseaddr, XEMACPS_ISR_OFFSET, regisr);
-+	}
-+
-+	return IRQ_HANDLED;
-+}
-+
-+/* Free all packets presently in the descriptor rings. */
-+static void xemacps_clean_rings(struct net_local *lp)
-+{
-+	int i;
-+
-+	for (i = 0; i < XEMACPS_RECV_BD_CNT; i++) {
-+		if (lp->rx_skb && lp->rx_skb[i].skb) {
-+			dma_unmap_single(lp->ndev->dev.parent,
-+					 lp->rx_skb[i].mapping,
-+					 lp->rx_skb[i].len,
-+					 DMA_FROM_DEVICE);
-+
-+			dev_kfree_skb(lp->rx_skb[i].skb);
-+			lp->rx_skb[i].skb = NULL;
-+			lp->rx_skb[i].mapping = 0;
-+		}
-+	}
-+
-+	for (i = 0; i < XEMACPS_SEND_BD_CNT; i++) {
-+		if (lp->tx_skb && lp->tx_skb[i].skb) {
-+			dma_unmap_single(lp->ndev->dev.parent,
-+					 lp->tx_skb[i].mapping,
-+					 lp->tx_skb[i].len,
-+					 DMA_TO_DEVICE);
-+
-+			dev_kfree_skb(lp->tx_skb[i].skb);
-+			lp->tx_skb[i].skb = NULL;
-+			lp->tx_skb[i].mapping = 0;
-+		}
-+	}
-+}
-+
-+/**
-+ * xemacps_descriptor_free - Free allocated TX and RX BDs
-+ * @lp: local device instance pointer
-+ **/
-+static void xemacps_descriptor_free(struct net_local *lp)
-+{
-+	int size;
-+
-+	xemacps_clean_rings(lp);
-+
-+	/* kfree(NULL) is safe, no need to check here */
-+	kfree(lp->tx_skb);
-+	lp->tx_skb = NULL;
-+	kfree(lp->rx_skb);
-+	lp->rx_skb = NULL;
-+
-+	size = XEMACPS_RECV_BD_CNT * sizeof(struct xemacps_bd);
-+	if (lp->rx_bd) {
-+		dma_free_coherent(&lp->pdev->dev, size,
-+			lp->rx_bd, lp->rx_bd_dma);
-+		lp->rx_bd = NULL;
-+	}
-+
-+	size = XEMACPS_SEND_BD_CNT * sizeof(struct xemacps_bd);
-+	if (lp->tx_bd) {
-+		dma_free_coherent(&lp->pdev->dev, size,
-+			lp->tx_bd, lp->tx_bd_dma);
-+		lp->tx_bd = NULL;
-+	}
-+}
-+
-+/**
-+ * xemacps_descriptor_init - Allocate both TX and RX BDs
-+ * @lp: local device instance pointer
-+ * return 0 on success, negative value if error
-+ **/
-+static int xemacps_descriptor_init(struct net_local *lp)
-+{
-+	int size;
-+	struct sk_buff *new_skb;
-+	u32 new_skb_baddr;
-+	u32 i;
-+	struct xemacps_bd *cur_p;
-+	u32 regval;
-+
-+	lp->tx_skb = NULL;
-+	lp->rx_skb = NULL;
-+	lp->rx_bd = NULL;
-+	lp->tx_bd = NULL;
-+
-+	/* Reset the indexes which are used for accessing the BDs */
-+	lp->tx_bd_ci = 0;
-+	lp->tx_bd_tail = 0;
-+	lp->rx_bd_ci = 0;
-+
-+	size = XEMACPS_SEND_BD_CNT * sizeof(struct ring_info);
-+	lp->tx_skb = kzalloc(size, GFP_KERNEL);
-+	if (!lp->tx_skb)
-+		goto err_out;
-+	size = XEMACPS_RECV_BD_CNT * sizeof(struct ring_info);
-+	lp->rx_skb = kzalloc(size, GFP_KERNEL);
-+	if (!lp->rx_skb)
-+		goto err_out;
-+
-+	/* Set up RX buffer descriptors. */
-+
-+	size = XEMACPS_RECV_BD_CNT * sizeof(struct xemacps_bd);
-+	lp->rx_bd = dma_alloc_coherent(&lp->pdev->dev, size,
-+			&lp->rx_bd_dma, GFP_KERNEL);
-+	if (!lp->rx_bd)
-+		goto err_out;
-+	dev_dbg(&lp->pdev->dev, "RX ring %d bytes at 0x%x mapped %p\n",
-+			size, lp->rx_bd_dma, lp->rx_bd);
-+
-+	for (i = 0; i < XEMACPS_RECV_BD_CNT; i++) {
-+		cur_p = &lp->rx_bd[i];
-+
-+		new_skb = netdev_alloc_skb(lp->ndev, XEMACPS_RX_BUF_SIZE);
-+		if (new_skb == NULL) {
-+			dev_err(&lp->ndev->dev, "alloc_skb error %d\n", i);
-+			goto err_out;
-+		}
-+
-+		/* Get dma handle of skb->data */
-+		new_skb_baddr = (u32) dma_map_single(lp->ndev->dev.parent,
-+							new_skb->data,
-+							XEMACPS_RX_BUF_SIZE,
-+							DMA_FROM_DEVICE);
-+
-+		/* set wrap bit for last BD */
-+		regval = (new_skb_baddr & XEMACPS_RXBUF_ADD_MASK);
-+		if (i == XEMACPS_RECV_BD_CNT - 1)
-+			regval |= XEMACPS_RXBUF_WRAP_MASK;
-+		cur_p->addr = regval;
-+		cur_p->ctrl = 0;
-+		wmb();
-+
-+		lp->rx_skb[i].skb = new_skb;
-+		lp->rx_skb[i].mapping = new_skb_baddr;
-+		lp->rx_skb[i].len = XEMACPS_RX_BUF_SIZE;
-+	}
-+
-+	/* Set up TX buffer descriptors. */
-+
-+	size = XEMACPS_SEND_BD_CNT * sizeof(struct xemacps_bd);
-+	lp->tx_bd = dma_alloc_coherent(&lp->pdev->dev, size,
-+			&lp->tx_bd_dma, GFP_KERNEL);
-+	if (!lp->tx_bd)
-+		goto err_out;
-+	dev_dbg(&lp->pdev->dev, "TX ring %d bytes at 0x%x mapped %p\n",
-+			size, lp->tx_bd_dma, lp->tx_bd);
-+
-+	for (i = 0; i < XEMACPS_SEND_BD_CNT; i++) {
-+		cur_p = &lp->tx_bd[i];
-+		/* set wrap bit for last BD */
-+		cur_p->addr = 0;
-+		regval = XEMACPS_TXBUF_USED_MASK;
-+		if (i == XEMACPS_SEND_BD_CNT - 1)
-+			regval |= XEMACPS_TXBUF_WRAP_MASK;
-+		cur_p->ctrl = regval;
-+	}
-+	wmb();
-+
-+	lp->tx_bd_freecnt = XEMACPS_SEND_BD_CNT;
-+
-+	dev_dbg(&lp->pdev->dev,
-+		"lp->tx_bd %p lp->tx_bd_dma %p lp->tx_skb %p\n",
-+		lp->tx_bd, (void *)lp->tx_bd_dma, lp->tx_skb);
-+	dev_dbg(&lp->pdev->dev,
-+		"lp->rx_bd %p lp->rx_bd_dma %p lp->rx_skb %p\n",
-+		lp->rx_bd, (void *)lp->rx_bd_dma, lp->rx_skb);
-+
-+	return 0;
-+
-+err_out:
-+	xemacps_descriptor_free(lp);
-+	return -ENOMEM;
-+}
-+
-+#ifdef CONFIG_XILINX_PS_EMAC_HWTSTAMP
-+/*
-+ * Initialize the GEM Time Stamp Unit
-+ */
-+static void xemacps_init_tsu(struct net_local *lp)
-+{
-+
-+	memset(&lp->cycles, 0, sizeof(lp->cycles));
-+	lp->cycles.read = xemacps_read_clock;
-+	lp->cycles.mask = CLOCKSOURCE_MASK(64);
-+	lp->cycles.mult = 1;
-+	lp->cycles.shift = 0;
-+
-+	/* Set registers so that rollover occurs soon to test this. */
-+	xemacps_write(lp->baseaddr, XEMACPS_1588NS_OFFSET, 0x00000000);
-+	xemacps_write(lp->baseaddr, XEMACPS_1588S_OFFSET, 0xFF800000);
-+
-+	/* program the timer increment register with the numer of nanoseconds
-+	 * per clock tick.
-+	 *
-+	 * Note: The value is calculated based on the current operating
-+	 * frequency 50MHz
-+	 */
-+	xemacps_write(lp->baseaddr, XEMACPS_1588INC_OFFSET,
-+			(NS_PER_SEC/lp->ptpenetclk));
-+
-+	timecounter_init(&lp->clock, &lp->cycles,
-+				ktime_to_ns(ktime_get_real()));
-+	/*
-+	 * Synchronize our NIC clock against system wall clock.
-+	 */
-+	memset(&lp->compare, 0, sizeof(lp->compare));
-+	lp->compare.source = &lp->clock;
-+	lp->compare.target = ktime_get_real;
-+	lp->compare.num_samples = 10;
-+	timecompare_update(&lp->compare, 0);
-+
-+	/* Initialize hwstamp config */
-+	lp->hwtstamp_config.rx_filter = HWTSTAMP_FILTER_NONE;
-+	lp->hwtstamp_config.tx_type = HWTSTAMP_TX_OFF;
-+
-+}
-+#endif /* CONFIG_XILINX_PS_EMAC_HWTSTAMP */
-+
-+/**
-+ * xemacps_init_hw - Initialize hardware to known good state
-+ * @lp: local device instance pointer
-+ **/
-+static void xemacps_init_hw(struct net_local *lp)
-+{
-+	u32 regval;
-+
-+	xemacps_reset_hw(lp);
-+	xemacps_set_hwaddr(lp);
-+
-+	/* network configuration */
-+	regval  = 0;
-+	regval |= XEMACPS_NWCFG_FDEN_MASK;
-+	regval |= XEMACPS_NWCFG_RXCHKSUMEN_MASK;
-+	regval |= XEMACPS_NWCFG_PAUSECOPYDI_MASK;
-+	regval |= XEMACPS_NWCFG_FCSREM_MASK;
-+	regval |= XEMACPS_NWCFG_PAUSEEN_MASK;
-+	regval |= XEMACPS_NWCFG_100_MASK;
-+	regval |= XEMACPS_NWCFG_HDRXEN_MASK;
-+
-+	regval |= (MDC_DIV_224 << XEMACPS_NWCFG_MDC_SHIFT_MASK);
-+	if (lp->ndev->flags & IFF_PROMISC)	/* copy all */
-+		regval |= XEMACPS_NWCFG_COPYALLEN_MASK;
-+	if (!(lp->ndev->flags & IFF_BROADCAST))	/* No broadcast */
-+		regval |= XEMACPS_NWCFG_BCASTDI_MASK;
-+	xemacps_write(lp->baseaddr, XEMACPS_NWCFG_OFFSET, regval);
-+
-+	/* Init TX and RX DMA Q address */
-+	xemacps_write(lp->baseaddr, XEMACPS_RXQBASE_OFFSET, lp->rx_bd_dma);
-+	xemacps_write(lp->baseaddr, XEMACPS_TXQBASE_OFFSET, lp->tx_bd_dma);
-+
-+	/* DMACR configurations */
-+	regval  = (((XEMACPS_RX_BUF_SIZE / XEMACPS_RX_BUF_UNIT) +
-+		((XEMACPS_RX_BUF_SIZE % XEMACPS_RX_BUF_UNIT) ? 1 : 0)) <<
-+		XEMACPS_DMACR_RXBUF_SHIFT);
-+	regval |= XEMACPS_DMACR_RXSIZE_MASK;
-+	regval |= XEMACPS_DMACR_TXSIZE_MASK;
-+	regval |= XEMACPS_DMACR_TCPCKSUM_MASK;
-+#ifdef __LITTLE_ENDIAN
-+	regval &= ~XEMACPS_DMACR_ENDIAN_MASK;
-+#endif
-+#ifdef __BIG_ENDIAN
-+	regval |= XEMACPS_DMACR_ENDIAN_MASK;
-+#endif
-+	regval |= XEMACPS_DMACR_BLENGTH_INCR16;
-+	xemacps_write(lp->baseaddr, XEMACPS_DMACR_OFFSET, regval);
-+
-+	/* Enable TX, RX and MDIO port */
-+	regval  = 0;
-+	regval |= XEMACPS_NWCTRL_MDEN_MASK;
-+	regval |= XEMACPS_NWCTRL_TXEN_MASK;
-+	regval |= XEMACPS_NWCTRL_RXEN_MASK;
-+	xemacps_write(lp->baseaddr, XEMACPS_NWCTRL_OFFSET, regval);
-+
-+#ifdef CONFIG_XILINX_PS_EMAC_HWTSTAMP
-+	/* Initialize the Time Stamp Unit */
-+	xemacps_init_tsu(lp);
-+#endif
-+
-+	/* Enable interrupts */
-+	regval  = XEMACPS_IXR_ALL_MASK;
-+	xemacps_write(lp->baseaddr, XEMACPS_IER_OFFSET, regval);
-+}
-+
-+/**
-+ * xemacps_resetrx_for_no_rxdata - Resets the Rx if there is no data
-+ * for a while (presently 100 msecs)
-+ * @data: Used for net_local instance pointer
-+ **/
-+static void xemacps_resetrx_for_no_rxdata(unsigned long data)
-+{
-+	struct net_local *lp = (struct net_local *)data;
-+	unsigned long regctrl;
-+	unsigned long tempcntr;
-+	unsigned long flags;
-+
-+	tempcntr = xemacps_read(lp->baseaddr, XEMACPS_RXCNT_OFFSET);
-+	if ((!tempcntr) && (!(lp->lastrxfrmscntr))) {
-+		spin_lock_irqsave(&lp->nwctrlreg_lock, flags);
-+		regctrl = xemacps_read(lp->baseaddr,
-+				XEMACPS_NWCTRL_OFFSET);
-+		regctrl &= (~XEMACPS_NWCTRL_RXEN_MASK);
-+		xemacps_write(lp->baseaddr,
-+				XEMACPS_NWCTRL_OFFSET, regctrl);
-+		regctrl = xemacps_read(lp->baseaddr, XEMACPS_NWCTRL_OFFSET);
-+		regctrl |= (XEMACPS_NWCTRL_RXEN_MASK);
-+		xemacps_write(lp->baseaddr, XEMACPS_NWCTRL_OFFSET, regctrl);
-+		spin_unlock_irqrestore(&lp->nwctrlreg_lock, flags);
-+	}
-+	lp->lastrxfrmscntr = tempcntr;
-+}
-+
-+/**
-+ * xemacps_update_stats - Update the statistic structure entries from
-+ * the corresponding emacps hardware statistic registers
-+ * @data: Used for net_local instance pointer
-+ **/
-+static void xemacps_update_stats(unsigned long data)
-+{
-+	struct net_local *lp = (struct net_local *)data;
-+	struct net_device_stats *nstat = &lp->stats;
-+	u32 cnt;
-+
-+	cnt = xemacps_read(lp->baseaddr, XEMACPS_RXUNDRCNT_OFFSET);
-+	nstat->rx_errors += cnt;
-+	nstat->rx_length_errors += cnt;
-+
-+	cnt = xemacps_read(lp->baseaddr, XEMACPS_RXOVRCNT_OFFSET);
-+	nstat->rx_errors += cnt;
-+	nstat->rx_length_errors += cnt;
-+
-+	cnt = xemacps_read(lp->baseaddr, XEMACPS_RXJABCNT_OFFSET);
-+	nstat->rx_errors += cnt;
-+	nstat->rx_length_errors += cnt;
-+
-+	cnt = xemacps_read(lp->baseaddr, XEMACPS_RXFCSCNT_OFFSET);
-+	nstat->rx_errors += cnt;
-+	nstat->rx_crc_errors += cnt;
-+
-+	cnt = xemacps_read(lp->baseaddr, XEMACPS_RXLENGTHCNT_OFFSET);
-+	nstat->rx_errors += cnt;
-+	nstat->rx_length_errors += cnt;
-+
-+	cnt = xemacps_read(lp->baseaddr, XEMACPS_RXALIGNCNT_OFFSET);
-+	nstat->rx_errors += cnt;
-+	nstat->rx_frame_errors += cnt;
-+
-+	cnt = xemacps_read(lp->baseaddr, XEMACPS_RXRESERRCNT_OFFSET);
-+	nstat->rx_errors += cnt;
-+	nstat->rx_missed_errors += cnt;
-+
-+	cnt = xemacps_read(lp->baseaddr, XEMACPS_RXORCNT_OFFSET);
-+	nstat->rx_errors += cnt;
-+	nstat->rx_fifo_errors += cnt;
-+
-+	cnt = xemacps_read(lp->baseaddr, XEMACPS_TXURUNCNT_OFFSET);
-+	nstat->tx_errors += cnt;
-+	nstat->tx_fifo_errors += cnt;
-+
-+	cnt = xemacps_read(lp->baseaddr, XEMACPS_SNGLCOLLCNT_OFFSET);
-+	nstat->collisions += cnt;
-+
-+	cnt = xemacps_read(lp->baseaddr, XEMACPS_MULTICOLLCNT_OFFSET);
-+	nstat->collisions += cnt;
-+
-+	cnt = xemacps_read(lp->baseaddr, XEMACPS_EXCESSCOLLCNT_OFFSET);
-+	nstat->tx_errors += cnt;
-+	nstat->tx_aborted_errors += cnt;
-+	nstat->collisions += cnt;
-+
-+	cnt = xemacps_read(lp->baseaddr, XEMACPS_LATECOLLCNT_OFFSET);
-+	nstat->tx_errors += cnt;
-+	nstat->collisions += cnt;
-+
-+	cnt = xemacps_read(lp->baseaddr, XEMACPS_CSENSECNT_OFFSET);
-+	nstat->tx_errors += cnt;
-+	nstat->tx_carrier_errors += cnt;
-+}
-+
-+/**
-+ * xemacps_gen_purpose_timerhandler - Timer handler that is called at regular
-+ * intervals upon expiry of the gen_purpose_timer defined in net_local struct.
-+ * @data: Used for net_local instance pointer
-+ *
-+ * This timer handler is used to update the statistics by calling the API
-+ * xemacps_update_stats. The statistics register can typically overflow pretty
-+ * quickly under heavy load conditions. This timer is used to periodically
-+ * read the stats registers and update the corresponding stats structure
-+ * entries. The stats registers when read reset to 0.
-+ **/
-+static void xemacps_gen_purpose_timerhandler(unsigned long data)
-+{
-+	struct net_local *lp = (struct net_local *)data;
-+
-+	xemacps_update_stats(data);
-+	xemacps_resetrx_for_no_rxdata(data);
-+	mod_timer(&(lp->gen_purpose_timer),
-+		jiffies + msecs_to_jiffies(XEAMCPS_GEN_PURPOSE_TIMER_LOAD));
-+}
-+
-+/**
-+ * xemacps_open - Called when a network device is made active
-+ * @ndev: network interface device structure
-+ * return 0 on success, negative value if error
-+ *
-+ * The open entry point is called when a network interface is made active
-+ * by the system (IFF_UP). At this point all resources needed for transmit
-+ * and receive operations are allocated, the interrupt handler is
-+ * registered with OS, the watchdog timer is started, and the stack is
-+ * notified that the interface is ready.
-+ *
-+ * note: if error(s), allocated resources before error require to be
-+ * released or system issues (such as memory) leak might happen.
-+ **/
-+static int xemacps_open(struct net_device *ndev)
-+{
-+	struct net_local *lp = netdev_priv(ndev);
-+	int rc;
-+
-+	dev_dbg(&lp->pdev->dev, "open\n");
-+	if (!is_valid_ether_addr(ndev->dev_addr))
-+		return  -EADDRNOTAVAIL;
-+
-+	rc = xemacps_descriptor_init(lp);
-+	if (rc) {
-+		dev_err(&lp->pdev->dev,
-+			"Unable to allocate DMA memory, rc %d\n", rc);
-+		return rc;
-+	}
-+
-+	rc = pm_runtime_get_sync(&lp->pdev->dev);
-+	if (rc < 0) {
-+		dev_err(&lp->pdev->dev,
-+			"pm_runtime_get_sync() failed, rc %d\n", rc);
-+		goto err_free_rings;
-+	}
-+
-+	xemacps_init_hw(lp);
-+	rc = xemacps_mii_probe(ndev);
-+	if (rc != 0) {
-+		dev_err(&lp->pdev->dev,
-+			"%s mii_probe fail.\n", lp->mii_bus->name);
-+		if (rc == (-2)) {
-+			mdiobus_unregister(lp->mii_bus);
-+			kfree(lp->mii_bus->irq);
-+			mdiobus_free(lp->mii_bus);
-+		}
-+		rc = -ENXIO;
-+		goto err_pm_put;
-+	}
-+
-+	setup_timer(&(lp->gen_purpose_timer), xemacps_gen_purpose_timerhandler,
-+							(unsigned long)lp);
-+	mod_timer(&(lp->gen_purpose_timer),
-+		jiffies + msecs_to_jiffies(XEAMCPS_GEN_PURPOSE_TIMER_LOAD));
-+
-+	napi_enable(&lp->napi);
-+	netif_carrier_on(ndev);
-+	netif_start_queue(ndev);
-+	tasklet_enable(&lp->tx_bdreclaim_tasklet);
-+
-+	return 0;
-+
-+err_pm_put:
-+	xemacps_reset_hw(lp);
-+	pm_runtime_put(&lp->pdev->dev);
-+err_free_rings:
-+	xemacps_descriptor_free(lp);
-+
-+	return rc;
-+}
-+
-+/**
-+ * xemacps_close - disable a network interface
-+ * @ndev: network interface device structure
-+ * return 0
-+ *
-+ * The close entry point is called when a network interface is de-activated
-+ * by OS. The hardware is still under the driver control, but needs to be
-+ * disabled. A global MAC reset is issued to stop the hardware, and all
-+ * transmit and receive resources are freed.
-+ **/
-+static int xemacps_close(struct net_device *ndev)
-+{
-+	struct net_local *lp = netdev_priv(ndev);
-+
-+	del_timer_sync(&(lp->gen_purpose_timer));
-+	netif_stop_queue(ndev);
-+	napi_disable(&lp->napi);
-+	tasklet_disable(&lp->tx_bdreclaim_tasklet);
-+	netif_carrier_off(ndev);
-+	if (lp->phy_dev)
-+		phy_disconnect(lp->phy_dev);
-+	if (lp->gmii2rgmii_phy_node)
-+		phy_disconnect(lp->gmii2rgmii_phy_dev);
-+	xemacps_reset_hw(lp);
-+	mdelay(500);
-+	xemacps_descriptor_free(lp);
-+
-+	pm_runtime_put(&lp->pdev->dev);
-+
-+	return 0;
-+}
-+
-+/**
-+ * xemacps_reinit_for_txtimeout - work queue scheduled for the tx timeout
-+ * handling.
-+ * @ndev: queue work structure
-+ **/
-+static void xemacps_reinit_for_txtimeout(struct work_struct *data)
-+{
-+	struct net_local *lp = container_of(data, struct net_local,
-+		txtimeout_reinit);
-+	int rc;
-+
-+	netif_stop_queue(lp->ndev);
-+	napi_disable(&lp->napi);
-+	tasklet_disable(&lp->tx_bdreclaim_tasklet);
-+	spin_lock_bh(&lp->tx_lock);
-+	xemacps_reset_hw(lp);
-+	spin_unlock_bh(&lp->tx_lock);
-+
-+	if (lp->phy_dev)
-+		phy_stop(lp->phy_dev);
-+
-+	xemacps_descriptor_free(lp);
-+	rc = xemacps_descriptor_init(lp);
-+	if (rc) {
-+		dev_err(&lp->pdev->dev,
-+			"Unable to allocate DMA memory, rc %d\n", rc);
-+		return;
-+	}
-+
-+	xemacps_init_hw(lp);
-+
-+	lp->link    = 0;
-+	lp->speed   = 0;
-+	lp->duplex  = -1;
-+
-+	if (lp->phy_dev)
-+		phy_start(lp->phy_dev);
-+
-+	napi_enable(&lp->napi);
-+	tasklet_enable(&lp->tx_bdreclaim_tasklet);
-+	lp->ndev->trans_start = jiffies;
-+	netif_wake_queue(lp->ndev);
-+}
-+
-+/**
-+ * xemacps_tx_timeout - callback used when the transmitter has not made
-+ * any progress for dev->watchdog ticks.
-+ * @ndev: network interface device structure
-+ **/
-+static void xemacps_tx_timeout(struct net_device *ndev)
-+{
-+	struct net_local *lp = netdev_priv(ndev);
-+
-+	dev_err(&lp->pdev->dev, "transmit timeout %lu ms, reseting...\n",
-+		TX_TIMEOUT * 1000UL / HZ);
-+	queue_work(lp->txtimeout_handler_wq, &lp->txtimeout_reinit);
-+}
-+
-+/**
-+ * xemacps_set_mac_address - set network interface mac address
-+ * @ndev: network interface device structure
-+ * @addr: pointer to MAC address
-+ * return 0 on success, negative value if error
-+ **/
-+static int xemacps_set_mac_address(struct net_device *ndev, void *addr)
-+{
-+	struct net_local *lp = netdev_priv(ndev);
-+	struct sockaddr *hwaddr = (struct sockaddr *)addr;
-+
-+	if (netif_running(ndev))
-+		return -EBUSY;
-+
-+	if (!is_valid_ether_addr(hwaddr->sa_data))
-+		return -EADDRNOTAVAIL;
-+
-+	dev_dbg(&lp->pdev->dev, "hwaddr 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n",
-+		hwaddr->sa_data[0], hwaddr->sa_data[1], hwaddr->sa_data[2],
-+		hwaddr->sa_data[3], hwaddr->sa_data[4], hwaddr->sa_data[5]);
-+
-+	memcpy(ndev->dev_addr, hwaddr->sa_data, ndev->addr_len);
-+
-+	xemacps_set_hwaddr(lp);
-+	return 0;
-+}
-+
-+/**
-+ * xemacps_clear_csum - Clear the csum field for  transport protocols
-+ * @skb: socket buffer
-+ * @ndev: network interface device structure
-+ * return 0 on success, other value if error
-+ **/
-+static int xemacps_clear_csum(struct sk_buff *skb, struct net_device *ndev)
-+{
-+	/* Only run for packets requiring a checksum. */
-+	if (skb->ip_summed != CHECKSUM_PARTIAL)
-+		return 0;
-+
-+	if (unlikely(skb_cow_head(skb, 0)))
-+		return -1;
-+
-+	*(__sum16 *)(skb->head + skb->csum_start + skb->csum_offset) = 0;
-+
-+	return 0;
-+}
-+
-+/**
-+ * xemacps_start_xmit - transmit a packet (called by kernel)
-+ * @skb: socket buffer
-+ * @ndev: network interface device structure
-+ * return 0 on success, other value if error
-+ **/
-+static int xemacps_start_xmit(struct sk_buff *skb, struct net_device *ndev)
-+{
-+	struct net_local *lp = netdev_priv(ndev);
-+	dma_addr_t  mapping;
-+	unsigned int nr_frags, len;
-+	int i;
-+	u32 regval;
-+	void       *virt_addr;
-+	skb_frag_t *frag;
-+	struct xemacps_bd *cur_p;
-+	unsigned long flags;
-+	u32 bd_tail;
-+
-+	nr_frags = skb_shinfo(skb)->nr_frags + 1;
-+	spin_lock_bh(&lp->tx_lock);
-+
-+	if (nr_frags > lp->tx_bd_freecnt) {
-+		netif_stop_queue(ndev); /* stop send queue */
-+		spin_unlock_bh(&lp->tx_lock);
-+		return NETDEV_TX_BUSY;
-+	}
-+
-+	if (xemacps_clear_csum(skb, ndev)) {
-+		spin_unlock_bh(&lp->tx_lock);
-+		kfree(skb);
-+		return NETDEV_TX_OK;
-+	}
-+
-+	bd_tail = lp->tx_bd_tail;
-+	cur_p = &lp->tx_bd[bd_tail];
-+	lp->tx_bd_freecnt -= nr_frags;
-+	frag = &skb_shinfo(skb)->frags[0];
-+
-+	for (i = 0; i < nr_frags; i++) {
-+		if (i == 0) {
-+			len = skb_headlen(skb);
-+			mapping = dma_map_single(&lp->pdev->dev, skb->data,
-+				len, DMA_TO_DEVICE);
-+		} else {
-+			len = skb_frag_size(frag);
-+			virt_addr = skb_frag_address(frag);
-+			mapping = dma_map_single(&lp->pdev->dev, virt_addr,
-+				len, DMA_TO_DEVICE);
-+			frag++;
-+			skb_get(skb);
-+		}
-+
-+		lp->tx_skb[lp->tx_bd_tail].skb = skb;
-+		lp->tx_skb[lp->tx_bd_tail].mapping = mapping;
-+		lp->tx_skb[lp->tx_bd_tail].len = len;
-+		cur_p->addr = mapping;
-+
-+		/* preserve critical status bits */
-+		regval = cur_p->ctrl;
-+		regval &= (XEMACPS_TXBUF_USED_MASK | XEMACPS_TXBUF_WRAP_MASK);
-+		/* update length field */
-+		regval |= ((regval & ~XEMACPS_TXBUF_LEN_MASK) | len);
-+		/* commit second to last buffer to hardware */
-+		if (i != 0)
-+			regval &= ~XEMACPS_TXBUF_USED_MASK;
-+		/* last fragment of this packet? */
-+		if (i == (nr_frags - 1))
-+			regval |= XEMACPS_TXBUF_LAST_MASK;
-+		cur_p->ctrl = regval;
-+
-+		lp->tx_bd_tail++;
-+		lp->tx_bd_tail = lp->tx_bd_tail % XEMACPS_SEND_BD_CNT;
-+		cur_p = &(lp->tx_bd[lp->tx_bd_tail]);
-+	}
-+	wmb();
-+
-+	/* commit first buffer to hardware -- do this after
-+	 * committing the other buffers to avoid an underrun */
-+	cur_p = &lp->tx_bd[bd_tail];
-+	regval = cur_p->ctrl;
-+	regval &= ~XEMACPS_TXBUF_USED_MASK;
-+	cur_p->ctrl = regval;
-+	wmb();
-+
-+	spin_lock_irqsave(&lp->nwctrlreg_lock, flags);
-+	regval = xemacps_read(lp->baseaddr, XEMACPS_NWCTRL_OFFSET);
-+	xemacps_write(lp->baseaddr, XEMACPS_NWCTRL_OFFSET,
-+			(regval | XEMACPS_NWCTRL_STARTTX_MASK));
-+	spin_unlock_irqrestore(&lp->nwctrlreg_lock, flags);
-+
-+	spin_unlock_bh(&lp->tx_lock);
-+	ndev->trans_start = jiffies;
-+	return 0;
-+}
-+
-+/* Get the MAC Address bit from the specified position */
-+static unsigned get_bit(u8 *mac, unsigned bit)
-+{
-+	unsigned byte;
-+
-+	byte = mac[bit / 8];
-+	byte >>= (bit & 0x7);
-+	byte &= 1;
-+
-+	return byte;
-+}
-+
-+/* Calculate a GEM MAC Address hash index */
-+static unsigned calc_mac_hash(u8 *mac)
-+{
-+	int index_bit, mac_bit;
-+	unsigned hash_index;
-+
-+	hash_index = 0;
-+	mac_bit = 5;
-+	for (index_bit = 5; index_bit >= 0; index_bit--) {
-+		hash_index |= (get_bit(mac,  mac_bit) ^
-+					get_bit(mac, mac_bit + 6) ^
-+					get_bit(mac, mac_bit + 12) ^
-+					get_bit(mac, mac_bit + 18) ^
-+					get_bit(mac, mac_bit + 24) ^
-+					get_bit(mac, mac_bit + 30) ^
-+					get_bit(mac, mac_bit + 36) ^
-+					get_bit(mac, mac_bit + 42))
-+						<< index_bit;
-+		mac_bit--;
-+	}
-+
-+	return hash_index;
-+}
-+
-+/**
-+ * xemacps_set_hashtable - Add multicast addresses to the internal
-+ * multicast-hash table. Called from xemac_set_rx_mode().
-+ * @ndev: network interface device structure
-+ *
-+ * The hash address register is 64 bits long and takes up two
-+ * locations in the memory map.  The least significant bits are stored
-+ * in EMAC_HSL and the most significant bits in EMAC_HSH.
-+ *
-+ * The unicast hash enable and the multicast hash enable bits in the
-+ * network configuration register enable the reception of hash matched
-+ * frames. The destination address is reduced to a 6 bit index into
-+ * the 64 bit hash register using the following hash function.  The
-+ * hash function is an exclusive or of every sixth bit of the
-+ * destination address.
-+ *
-+ * hi[5] = da[5] ^ da[11] ^ da[17] ^ da[23] ^ da[29] ^ da[35] ^ da[41] ^ da[47]
-+ * hi[4] = da[4] ^ da[10] ^ da[16] ^ da[22] ^ da[28] ^ da[34] ^ da[40] ^ da[46]
-+ * hi[3] = da[3] ^ da[09] ^ da[15] ^ da[21] ^ da[27] ^ da[33] ^ da[39] ^ da[45]
-+ * hi[2] = da[2] ^ da[08] ^ da[14] ^ da[20] ^ da[26] ^ da[32] ^ da[38] ^ da[44]
-+ * hi[1] = da[1] ^ da[07] ^ da[13] ^ da[19] ^ da[25] ^ da[31] ^ da[37] ^ da[43]
-+ * hi[0] = da[0] ^ da[06] ^ da[12] ^ da[18] ^ da[24] ^ da[30] ^ da[36] ^ da[42]
-+ *
-+ * da[0] represents the least significant bit of the first byte
-+ * received, that is, the multicast/unicast indicator, and da[47]
-+ * represents the most significant bit of the last byte received.  If
-+ * the hash index, hi[n], points to a bit that is set in the hash
-+ * register then the frame will be matched according to whether the
-+ * frame is multicast or unicast.  A multicast match will be signalled
-+ * if the multicast hash enable bit is set, da[0] is 1 and the hash
-+ * index points to a bit set in the hash register.  A unicast match
-+ * will be signalled if the unicast hash enable bit is set, da[0] is 0
-+ * and the hash index points to a bit set in the hash register.  To
-+ * receive all multicast frames, the hash register should be set with
-+ * all ones and the multicast hash enable bit should be set in the
-+ * network configuration register.
-+ **/
-+static void xemacps_set_hashtable(struct net_device *ndev)
-+{
-+	struct netdev_hw_addr *curr;
-+	u32 regvalh, regvall, hash_index;
-+	u8 *mc_addr;
-+	struct net_local *lp;
-+
-+	lp = netdev_priv(ndev);
-+
-+	regvalh = regvall = 0;
-+
-+	netdev_for_each_mc_addr(curr, ndev) {
-+		if (!curr)	/* end of list */
-+			break;
-+		mc_addr = curr->addr;
-+		hash_index = calc_mac_hash(mc_addr);
-+
-+		if (hash_index >= XEMACPS_MAX_HASH_BITS) {
-+			dev_err(&lp->pdev->dev,
-+					"hash calculation out of range %d\n",
-+					hash_index);
-+			break;
-+		}
-+		if (hash_index < 32)
-+			regvall |= (1 << hash_index);
-+		else
-+			regvalh |= (1 << (hash_index - 32));
-+	}
-+
-+	xemacps_write(lp->baseaddr, XEMACPS_HASHL_OFFSET, regvall);
-+	xemacps_write(lp->baseaddr, XEMACPS_HASHH_OFFSET, regvalh);
-+}
-+
-+/**
-+ * xemacps_set_rx_mode - enable/disable promiscuous and multicast modes
-+ * @ndev: network interface device structure
-+ **/
-+static void xemacps_set_rx_mode(struct net_device *ndev)
-+{
-+	struct net_local *lp = netdev_priv(ndev);
-+	u32 regval;
-+
-+	regval = xemacps_read(lp->baseaddr, XEMACPS_NWCFG_OFFSET);
-+
-+	/* promisc mode */
-+	if (ndev->flags & IFF_PROMISC)
-+		regval |= XEMACPS_NWCFG_COPYALLEN_MASK;
-+	if (!(ndev->flags & IFF_PROMISC))
-+		regval &= ~XEMACPS_NWCFG_COPYALLEN_MASK;
-+
-+	/* All multicast mode */
-+	if (ndev->flags & IFF_ALLMULTI) {
-+		regval |= XEMACPS_NWCFG_MCASTHASHEN_MASK;
-+		xemacps_write(lp->baseaddr, XEMACPS_HASHL_OFFSET, ~0UL);
-+		xemacps_write(lp->baseaddr, XEMACPS_HASHH_OFFSET, ~0UL);
-+	/* Specific multicast mode */
-+	} else if ((ndev->flags & IFF_MULTICAST)
-+			&& (netdev_mc_count(ndev) > 0)) {
-+		regval |= XEMACPS_NWCFG_MCASTHASHEN_MASK;
-+		xemacps_set_hashtable(ndev);
-+	/* Disable multicast mode */
-+	} else {
-+		xemacps_write(lp->baseaddr, XEMACPS_HASHL_OFFSET, 0x0);
-+		xemacps_write(lp->baseaddr, XEMACPS_HASHH_OFFSET, 0x0);
-+		regval &= ~XEMACPS_NWCFG_MCASTHASHEN_MASK;
-+	}
-+
-+	/* broadcast mode */
-+	if (ndev->flags & IFF_BROADCAST)
-+		regval &= ~XEMACPS_NWCFG_BCASTDI_MASK;
-+	/* No broadcast */
-+	if (!(ndev->flags & IFF_BROADCAST))
-+		regval |= XEMACPS_NWCFG_BCASTDI_MASK;
-+
-+	xemacps_write(lp->baseaddr, XEMACPS_NWCFG_OFFSET, regval);
-+}
-+
-+#define MIN_MTU 60
-+#define MAX_MTU 1500
-+/**
-+ * xemacps_change_mtu - Change maximum transfer unit
-+ * @ndev: network interface device structure
-+ * @new_mtu: new vlaue for maximum frame size
-+ * return: 0 on success, negative value if error.
-+ **/
-+static int xemacps_change_mtu(struct net_device *ndev, int new_mtu)
-+{
-+	if ((new_mtu < MIN_MTU) ||
-+		((new_mtu + ndev->hard_header_len) > MAX_MTU))
-+		return -EINVAL;
-+
-+	ndev->mtu = new_mtu;	/* change mtu in net_device structure */
-+	return 0;
-+}
-+
-+/**
-+ * xemacps_get_settings - get device specific settings.
-+ * Usage: Issue "ethtool ethX" under linux prompt.
-+ * @ndev: network device
-+ * @ecmd: ethtool command structure
-+ * return: 0 on success, negative value if error.
-+ **/
-+static int
-+xemacps_get_settings(struct net_device *ndev, struct ethtool_cmd *ecmd)
-+{
-+	struct net_local *lp = netdev_priv(ndev);
-+	struct phy_device *phydev = lp->phy_dev;
-+
-+	if (!phydev)
-+		return -ENODEV;
-+
-+	return phy_ethtool_gset(phydev, ecmd);
-+}
-+
-+/**
-+ * xemacps_set_settings - set device specific settings.
-+ * Usage: Issue "ethtool -s ethX speed 1000" under linux prompt
-+ * to change speed
-+ * @ndev: network device
-+ * @ecmd: ethtool command structure
-+ * return: 0 on success, negative value if error.
-+ **/
-+static int
-+xemacps_set_settings(struct net_device *ndev, struct ethtool_cmd *ecmd)
-+{
-+	struct net_local *lp = netdev_priv(ndev);
-+	struct phy_device *phydev = lp->phy_dev;
-+
-+	if (!phydev)
-+		return -ENODEV;
-+
-+	return phy_ethtool_sset(phydev, ecmd);
-+}
-+
-+/**
-+ * xemacps_get_drvinfo - report driver information
-+ * Usage: Issue "ethtool -i ethX" under linux prompt
-+ * @ndev: network device
-+ * @ed: device driver information structure
-+ **/
-+static void
-+xemacps_get_drvinfo(struct net_device *ndev, struct ethtool_drvinfo *ed)
-+{
-+	struct net_local *lp = netdev_priv(ndev);
-+
-+	memset(ed, 0, sizeof(struct ethtool_drvinfo));
-+	strcpy(ed->driver, lp->pdev->dev.driver->name);
-+	strcpy(ed->version, DRIVER_VERSION);
-+}
-+
-+/**
-+ * xemacps_get_ringparam - get device dma ring information.
-+ * Usage: Issue "ethtool -g ethX" under linux prompt
-+ * @ndev: network device
-+ * @erp: ethtool ring parameter structure
-+ **/
-+static void
-+xemacps_get_ringparam(struct net_device *ndev, struct ethtool_ringparam *erp)
-+{
-+	memset(erp, 0, sizeof(struct ethtool_ringparam));
-+
-+	erp->rx_max_pending = XEMACPS_RECV_BD_CNT;
-+	erp->tx_max_pending = XEMACPS_SEND_BD_CNT;
-+	erp->rx_pending = 0;
-+	erp->tx_pending = 0;
-+}
-+
-+/**
-+ * xemacps_get_wol - get device wake on lan status
-+ * Usage: Issue "ethtool ethX" under linux prompt
-+ * @ndev: network device
-+ * @ewol: wol status
-+ **/
-+static void
-+xemacps_get_wol(struct net_device *ndev, struct ethtool_wolinfo *ewol)
-+{
-+	struct net_local *lp = netdev_priv(ndev);
-+	u32 regval;
-+
-+	ewol->supported = WAKE_MAGIC | WAKE_ARP | WAKE_UCAST | WAKE_MCAST;
-+
-+	regval = xemacps_read(lp->baseaddr, XEMACPS_WOL_OFFSET);
-+	if (regval | XEMACPS_WOL_MCAST_MASK)
-+		ewol->wolopts |= WAKE_MCAST;
-+	if (regval | XEMACPS_WOL_ARP_MASK)
-+		ewol->wolopts |= WAKE_ARP;
-+	if (regval | XEMACPS_WOL_SPEREG1_MASK)
-+		ewol->wolopts |= WAKE_UCAST;
-+	if (regval | XEMACPS_WOL_MAGIC_MASK)
-+		ewol->wolopts |= WAKE_MAGIC;
-+
-+}
-+
-+/**
-+ * xemacps_set_wol - set device wake on lan configuration
-+ * Usage: Issue "ethtool -s ethX wol u|m|b|g" under linux prompt to enable
-+ * specified type of packet.
-+ * Usage: Issue "ethtool -s ethX wol d" under linux prompt to disable
-+ * this feature.
-+ * @ndev: network device
-+ * @ewol: wol status
-+ * return 0 on success, negative value if not supported
-+ **/
-+static int
-+xemacps_set_wol(struct net_device *ndev, struct ethtool_wolinfo *ewol)
-+{
-+	struct net_local *lp = netdev_priv(ndev);
-+	u32 regval;
-+
-+	if (ewol->wolopts & ~(WAKE_MAGIC | WAKE_ARP | WAKE_UCAST | WAKE_MCAST))
-+		return -EOPNOTSUPP;
-+
-+	regval  = xemacps_read(lp->baseaddr, XEMACPS_WOL_OFFSET);
-+	regval &= ~(XEMACPS_WOL_MCAST_MASK | XEMACPS_WOL_ARP_MASK |
-+		XEMACPS_WOL_SPEREG1_MASK | XEMACPS_WOL_MAGIC_MASK);
-+
-+	if (ewol->wolopts & WAKE_MAGIC)
-+		regval |= XEMACPS_WOL_MAGIC_MASK;
-+	if (ewol->wolopts & WAKE_ARP)
-+		regval |= XEMACPS_WOL_ARP_MASK;
-+	if (ewol->wolopts & WAKE_UCAST)
-+		regval |= XEMACPS_WOL_SPEREG1_MASK;
-+	if (ewol->wolopts & WAKE_MCAST)
-+		regval |= XEMACPS_WOL_MCAST_MASK;
-+
-+	xemacps_write(lp->baseaddr, XEMACPS_WOL_OFFSET, regval);
-+
-+	return 0;
-+}
-+
-+/**
-+ * xemacps_get_pauseparam - get device pause status
-+ * Usage: Issue "ethtool -a ethX" under linux prompt
-+ * @ndev: network device
-+ * @epauseparam: pause parameter
-+ *
-+ * note: hardware supports only tx flow control
-+ **/
-+static void
-+xemacps_get_pauseparam(struct net_device *ndev,
-+		struct ethtool_pauseparam *epauseparm)
-+{
-+	struct net_local *lp = netdev_priv(ndev);
-+	u32 regval;
-+
-+	epauseparm->autoneg  = 0;
-+	epauseparm->rx_pause = 0;
-+
-+	regval = xemacps_read(lp->baseaddr, XEMACPS_NWCFG_OFFSET);
-+	epauseparm->tx_pause = regval & XEMACPS_NWCFG_PAUSEEN_MASK;
-+}
-+
-+/**
-+ * xemacps_set_pauseparam - set device pause parameter(flow control)
-+ * Usage: Issue "ethtool -A ethX tx on|off" under linux prompt
-+ * @ndev: network device
-+ * @epauseparam: pause parameter
-+ * return 0 on success, negative value if not supported
-+ *
-+ * note: hardware supports only tx flow control
-+ **/
-+static int
-+xemacps_set_pauseparam(struct net_device *ndev,
-+		struct ethtool_pauseparam *epauseparm)
-+{
-+	struct net_local *lp = netdev_priv(ndev);
-+	u32 regval;
-+
-+	if (netif_running(ndev)) {
-+		dev_err(&lp->pdev->dev,
-+			"Please stop netif before apply configruation\n");
-+		return -EFAULT;
-+	}
-+
-+	regval = xemacps_read(lp->baseaddr, XEMACPS_NWCFG_OFFSET);
-+
-+	if (epauseparm->tx_pause)
-+		regval |= XEMACPS_NWCFG_PAUSEEN_MASK;
-+	if (!(epauseparm->tx_pause))
-+		regval &= ~XEMACPS_NWCFG_PAUSEEN_MASK;
-+
-+	xemacps_write(lp->baseaddr, XEMACPS_NWCFG_OFFSET, regval);
-+	return 0;
-+}
-+
-+/**
-+ * xemacps_get_stats - get device statistic raw data in 64bit mode
-+ * @ndev: network device
-+ **/
-+static struct net_device_stats
-+*xemacps_get_stats(struct net_device *ndev)
-+{
-+	struct net_local *lp = netdev_priv(ndev);
-+	struct net_device_stats *nstat = &lp->stats;
-+
-+	xemacps_update_stats((unsigned long)lp);
-+	return nstat;
-+}
-+
-+static struct ethtool_ops xemacps_ethtool_ops = {
-+	.get_settings   = xemacps_get_settings,
-+	.set_settings   = xemacps_set_settings,
-+	.get_drvinfo    = xemacps_get_drvinfo,
-+	.get_link       = ethtool_op_get_link, /* ethtool default */
-+	.get_ringparam  = xemacps_get_ringparam,
-+	.get_wol        = xemacps_get_wol,
-+	.set_wol        = xemacps_set_wol,
-+	.get_pauseparam = xemacps_get_pauseparam,
-+	.set_pauseparam = xemacps_set_pauseparam,
-+};
-+
-+#ifdef CONFIG_XILINX_PS_EMAC_HWTSTAMP
-+static int xemacps_hwtstamp_ioctl(struct net_device *netdev,
-+				struct ifreq *ifr, int cmd)
-+{
-+	struct hwtstamp_config config;
-+	struct net_local *lp;
-+	u32 regval;
-+
-+	lp = netdev_priv(netdev);
-+
-+	if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
-+		return -EFAULT;
-+
-+	/* reserved for future extensions */
-+	if (config.flags)
-+		return -EINVAL;
-+
-+	if ((config.tx_type != HWTSTAMP_TX_OFF) &&
-+		(config.tx_type != HWTSTAMP_TX_ON))
-+		return -ERANGE;
-+
-+	switch (config.rx_filter) {
-+	case HWTSTAMP_FILTER_NONE:
-+		break;
-+	case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
-+	case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
-+	case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
-+	case HWTSTAMP_FILTER_ALL:
-+	case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
-+	case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
-+	case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
-+	case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
-+	case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
-+	case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
-+	case HWTSTAMP_FILTER_PTP_V2_EVENT:
-+	case HWTSTAMP_FILTER_PTP_V2_SYNC:
-+	case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
-+		config.rx_filter = HWTSTAMP_FILTER_ALL;
-+		regval = xemacps_read(lp->baseaddr, XEMACPS_NWCTRL_OFFSET);
-+		xemacps_write(lp->baseaddr, XEMACPS_NWCTRL_OFFSET,
-+			(regval | XEMACPS_NWCTRL_RXTSTAMP_MASK));
-+		break;
-+	default:
-+		return -ERANGE;
-+	}
-+
-+	config.tx_type = HWTSTAMP_TX_ON;
-+	lp->hwtstamp_config = config;
-+
-+	return copy_to_user(ifr->ifr_data, &config, sizeof(config)) ?
-+		-EFAULT : 0;
-+}
-+#endif /* CONFIG_XILINX_PS_EMAC_HWTSTAMP */
-+
-+/**
-+ * xemacps_ioctl - ioctl entry point
-+ * @ndev: network device
-+ * @rq: interface request ioctl
-+ * @cmd: command code
-+ *
-+ * Called when user issues an ioctl request to the network device.
-+ **/
-+static int xemacps_ioctl(struct net_device *ndev, struct ifreq *rq, int cmd)
-+{
-+	struct net_local *lp = netdev_priv(ndev);
-+	struct phy_device *phydev = lp->phy_dev;
-+
-+	if (!netif_running(ndev))
-+		return -EINVAL;
-+
-+	if (!phydev)
-+		return -ENODEV;
-+
-+	switch (cmd) {
-+	case SIOCGMIIPHY:
-+	case SIOCGMIIREG:
-+	case SIOCSMIIREG:
-+		return phy_mii_ioctl(phydev, rq, cmd);
-+#ifdef CONFIG_XILINX_PS_EMAC_HWTSTAMP
-+	case SIOCSHWTSTAMP:
-+		return xemacps_hwtstamp_ioctl(ndev, rq, cmd);
-+#endif
-+	default:
-+		dev_info(&lp->pdev->dev, "ioctl %d not implemented.\n", cmd);
-+		return -EOPNOTSUPP;
-+	}
-+
-+}
-+
-+/**
-+ * xemacps_probe - Platform driver probe
-+ * @pdev: Pointer to platform device structure
-+ *
-+ * Return 0 on success, negative value if error
-+ */
-+static int xemacps_probe(struct platform_device *pdev)
-+{
-+	struct resource *r_mem = NULL;
-+	struct resource *r_irq = NULL;
-+	struct net_device *ndev;
-+	struct net_local *lp;
-+	u32 regval = 0;
-+	int rc = -ENXIO;
-+
-+	r_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+	r_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
-+	if (!r_mem || !r_irq) {
-+		dev_err(&pdev->dev, "no IO resource defined.\n");
-+		return -ENXIO;
-+	}
-+
-+	ndev = alloc_etherdev(sizeof(*lp));
-+	if (!ndev) {
-+		dev_err(&pdev->dev, "etherdev allocation failed.\n");
-+		return -ENOMEM;
-+	}
-+
-+	SET_NETDEV_DEV(ndev, &pdev->dev);
-+
-+	lp = netdev_priv(ndev);
-+	lp->pdev = pdev;
-+	lp->ndev = ndev;
-+
-+	spin_lock_init(&lp->tx_lock);
-+	spin_lock_init(&lp->rx_lock);
-+	spin_lock_init(&lp->nwctrlreg_lock);
-+
-+	lp->baseaddr = devm_ioremap_resource(&pdev->dev, r_mem);
-+	if (IS_ERR(lp->baseaddr)) {
-+		dev_err(&pdev->dev, "failed to map baseaddress.\n");
-+		rc = PTR_ERR(lp->baseaddr);
-+		goto err_out_free_netdev;
-+	}
-+
-+	dev_dbg(&lp->pdev->dev, "BASEADDRESS hw: %p virt: %p\n",
-+			(void *)r_mem->start, lp->baseaddr);
-+
-+	ndev->irq = platform_get_irq(pdev, 0);
-+
-+	ndev->netdev_ops = &netdev_ops;
-+	ndev->watchdog_timeo = TX_TIMEOUT;
-+	ndev->ethtool_ops = &xemacps_ethtool_ops;
-+	ndev->base_addr = r_mem->start;
-+	ndev->features = NETIF_F_IP_CSUM | NETIF_F_SG;
-+	netif_napi_add(ndev, &lp->napi, xemacps_rx_poll, XEMACPS_NAPI_WEIGHT);
-+
-+	lp->ip_summed = CHECKSUM_UNNECESSARY;
-+
-+	rc = register_netdev(ndev);
-+	if (rc) {
-+		dev_err(&pdev->dev, "Cannot register net device, aborting.\n");
-+		goto err_out_free_netdev;
-+	}
-+
-+	if (ndev->irq == 54)
-+		lp->enetnum = 0;
-+	else
-+		lp->enetnum = 1;
-+
-+	lp->aperclk = devm_clk_get(&pdev->dev, "aper_clk");
-+	if (IS_ERR(lp->aperclk)) {
-+		dev_err(&pdev->dev, "aper_clk clock not found.\n");
-+		rc = PTR_ERR(lp->aperclk);
-+		goto err_out_unregister_netdev;
-+	}
-+	lp->devclk = devm_clk_get(&pdev->dev, "ref_clk");
-+	if (IS_ERR(lp->devclk)) {
-+		dev_err(&pdev->dev, "ref_clk clock not found.\n");
-+		rc = PTR_ERR(lp->devclk);
-+		goto err_out_unregister_netdev;
-+	}
-+
-+	rc = clk_prepare_enable(lp->aperclk);
-+	if (rc) {
-+		dev_err(&pdev->dev, "Unable to enable APER clock.\n");
-+		goto err_out_unregister_netdev;
-+	}
-+	rc = clk_prepare_enable(lp->devclk);
-+	if (rc) {
-+		dev_err(&pdev->dev, "Unable to enable device clock.\n");
-+		goto err_out_clk_dis_aper;
-+	}
-+
-+	lp->clk_rate_change_nb.notifier_call = xemacps_clk_notifier_cb;
-+	lp->clk_rate_change_nb.next = NULL;
-+	if (clk_notifier_register(lp->devclk, &lp->clk_rate_change_nb))
-+		dev_warn(&pdev->dev,
-+			"Unable to register clock notifier.\n");
-+
-+#ifdef CONFIG_XILINX_PS_EMAC_HWTSTAMP
-+	prop = of_get_property(lp->pdev->dev.of_node,
-+				"xlnx,ptp-enet-clock", NULL);
-+	if (prop)
-+		lp->ptpenetclk = (u32)be32_to_cpup(prop);
-+	else
-+		lp->ptpenetclk = 133333328;
-+#endif
-+
-+	lp->phy_node = of_parse_phandle(lp->pdev->dev.of_node,
-+						"phy-handle", 0);
-+	lp->gmii2rgmii_phy_node = of_parse_phandle(lp->pdev->dev.of_node,
-+						"gmii2rgmii-phy-handle", 0);
-+	rc = of_get_phy_mode(lp->pdev->dev.of_node);
-+	if (rc < 0) {
-+		dev_err(&lp->pdev->dev, "error in getting phy i/f\n");
-+		goto err_out_unregister_clk_notifier;
-+	}
-+
-+	lp->phy_interface = rc;
-+
-+	/* Set MDIO clock divider */
-+	regval = (MDC_DIV_224 << XEMACPS_NWCFG_MDC_SHIFT_MASK);
-+	xemacps_write(lp->baseaddr, XEMACPS_NWCFG_OFFSET, regval);
-+
-+
-+	regval = XEMACPS_NWCTRL_MDEN_MASK;
-+	xemacps_write(lp->baseaddr, XEMACPS_NWCTRL_OFFSET, regval);
-+
-+	rc = xemacps_mii_init(lp);
-+	if (rc) {
-+		dev_err(&lp->pdev->dev, "error in xemacps_mii_init\n");
-+		goto err_out_unregister_clk_notifier;
-+	}
-+
-+	xemacps_update_hwaddr(lp);
-+	tasklet_init(&lp->tx_bdreclaim_tasklet, xemacps_tx_poll,
-+		     (unsigned long) ndev);
-+	tasklet_disable(&lp->tx_bdreclaim_tasklet);
-+
-+	lp->txtimeout_handler_wq = create_singlethread_workqueue(DRIVER_NAME);
-+	INIT_WORK(&lp->txtimeout_reinit, xemacps_reinit_for_txtimeout);
-+
-+	platform_set_drvdata(pdev, ndev);
-+	pm_runtime_set_active(&pdev->dev);
-+	pm_runtime_enable(&pdev->dev);
-+
-+	dev_info(&lp->pdev->dev, "pdev->id %d, baseaddr 0x%08lx, irq %d\n",
-+		pdev->id, ndev->base_addr, ndev->irq);
-+
-+	rc = devm_request_irq(&pdev->dev, ndev->irq, &xemacps_interrupt, 0,
-+		ndev->name, ndev);
-+	if (rc) {
-+		dev_err(&lp->pdev->dev, "Unable to request IRQ %p, error %d\n",
-+				r_irq, rc);
-+		goto err_out_unregister_clk_notifier;
-+	}
-+
-+	return 0;
-+
-+err_out_unregister_clk_notifier:
-+	clk_notifier_unregister(lp->devclk, &lp->clk_rate_change_nb);
-+	clk_disable_unprepare(lp->devclk);
-+err_out_clk_dis_aper:
-+	clk_disable_unprepare(lp->aperclk);
-+err_out_unregister_netdev:
-+	unregister_netdev(ndev);
-+err_out_free_netdev:
-+	free_netdev(ndev);
-+	platform_set_drvdata(pdev, NULL);
-+	return rc;
-+}
-+
-+/**
-+ * xemacps_remove - called when platform driver is unregistered
-+ * @pdev: Pointer to the platform device structure
-+ *
-+ * return: 0 on success
-+ */
-+static int xemacps_remove(struct platform_device *pdev)
-+{
-+	struct net_device *ndev = platform_get_drvdata(pdev);
-+	struct net_local *lp;
-+
-+	if (ndev) {
-+		lp = netdev_priv(ndev);
-+
-+		mdiobus_unregister(lp->mii_bus);
-+		kfree(lp->mii_bus->irq);
-+		mdiobus_free(lp->mii_bus);
-+		unregister_netdev(ndev);
-+
-+		clk_notifier_unregister(lp->devclk, &lp->clk_rate_change_nb);
-+		if (!pm_runtime_suspended(&pdev->dev)) {
-+			clk_disable_unprepare(lp->devclk);
-+			clk_disable_unprepare(lp->aperclk);
-+		} else {
-+			clk_unprepare(lp->devclk);
-+			clk_unprepare(lp->aperclk);
-+		}
-+
-+		free_netdev(ndev);
-+	}
-+
-+	return 0;
-+}
-+
-+#ifdef CONFIG_PM
-+#ifdef CONFIG_PM_SLEEP
-+/**
-+ * xemacps_suspend - Suspend event
-+ * @device: Pointer to device structure
-+ *
-+ * Return 0
-+ */
-+static int xemacps_suspend(struct device *device)
-+{
-+	struct platform_device *pdev = container_of(device,
-+			struct platform_device, dev);
-+	struct net_device *ndev = platform_get_drvdata(pdev);
-+	struct net_local *lp = netdev_priv(ndev);
-+
-+	netif_device_detach(ndev);
-+	if (!pm_runtime_suspended(device)) {
-+		clk_disable(lp->devclk);
-+		clk_disable(lp->aperclk);
-+	}
-+	return 0;
-+}
-+
-+/**
-+ * xemacps_resume - Resume after previous suspend
-+ * @pdev: Pointer to platform device structure
-+ *
-+ * Returns 0 on success, errno otherwise.
-+ */
-+static int xemacps_resume(struct device *device)
-+{
-+	struct platform_device *pdev = container_of(device,
-+			struct platform_device, dev);
-+	struct net_device *ndev = platform_get_drvdata(pdev);
-+	struct net_local *lp = netdev_priv(ndev);
-+
-+	if (!pm_runtime_suspended(device)) {
-+		int ret;
-+
-+		ret = clk_enable(lp->aperclk);
-+		if (ret)
-+			return ret;
-+
-+		ret = clk_enable(lp->devclk);
-+		if (ret) {
-+			clk_disable(lp->aperclk);
-+			return ret;
-+		}
-+	}
-+	netif_device_attach(ndev);
-+	return 0;
-+}
-+#endif /* ! CONFIG_PM_SLEEP */
-+
-+#ifdef CONFIG_PM_RUNTIME
-+static int xemacps_runtime_idle(struct device *dev)
-+{
-+	return pm_schedule_suspend(dev, 1);
-+}
-+
-+static int xemacps_runtime_resume(struct device *device)
-+{
-+	int ret;
-+	struct platform_device *pdev = container_of(device,
-+			struct platform_device, dev);
-+	struct net_device *ndev = platform_get_drvdata(pdev);
-+	struct net_local *lp = netdev_priv(ndev);
-+
-+	ret = clk_enable(lp->aperclk);
-+	if (ret)
-+		return ret;
-+
-+	ret = clk_enable(lp->devclk);
-+	if (ret) {
-+		clk_disable(lp->aperclk);
-+		return ret;
-+	}
-+
-+	return 0;
-+}
-+
-+static int xemacps_runtime_suspend(struct device *device)
-+{
-+	struct platform_device *pdev = container_of(device,
-+			struct platform_device, dev);
-+	struct net_device *ndev = platform_get_drvdata(pdev);
-+	struct net_local *lp = netdev_priv(ndev);
-+
-+	clk_disable(lp->devclk);
-+	clk_disable(lp->aperclk);
-+	return 0;
-+}
-+#endif /* CONFIG_PM_RUNTIME */
-+
-+static const struct dev_pm_ops xemacps_dev_pm_ops = {
-+	SET_SYSTEM_SLEEP_PM_OPS(xemacps_suspend, xemacps_resume)
-+	SET_RUNTIME_PM_OPS(xemacps_runtime_suspend, xemacps_runtime_resume,
-+			xemacps_runtime_idle)
-+};
-+#define XEMACPS_PM	(&xemacps_dev_pm_ops)
-+#else /* ! CONFIG_PM */
-+#define XEMACPS_PM	NULL
-+#endif /* ! CONFIG_PM */
-+
-+static struct net_device_ops netdev_ops = {
-+	.ndo_open		= xemacps_open,
-+	.ndo_stop		= xemacps_close,
-+	.ndo_start_xmit		= xemacps_start_xmit,
-+	.ndo_set_rx_mode	= xemacps_set_rx_mode,
-+	.ndo_set_mac_address    = xemacps_set_mac_address,
-+	.ndo_do_ioctl		= xemacps_ioctl,
-+	.ndo_change_mtu		= xemacps_change_mtu,
-+	.ndo_tx_timeout		= xemacps_tx_timeout,
-+	.ndo_get_stats		= xemacps_get_stats,
-+};
-+
-+static struct of_device_id xemacps_of_match[] = {
-+	{ .compatible = "xlnx,ps7-ethernet-1.00.a", },
-+	{ /* end of table */}
-+};
-+MODULE_DEVICE_TABLE(of, xemacps_of_match);
-+
-+static struct platform_driver xemacps_driver = {
-+	.probe   = xemacps_probe,
-+	.remove  = xemacps_remove,
-+	.driver  = {
-+		.name  = DRIVER_NAME,
-+		.owner = THIS_MODULE,
-+		.of_match_table = xemacps_of_match,
-+		.pm = XEMACPS_PM,
-+	},
-+};
-+
-+module_platform_driver(xemacps_driver);
-+
-+MODULE_AUTHOR("Xilinx, Inc.");
-+MODULE_DESCRIPTION("Xilinx Ethernet driver");
-+MODULE_LICENSE("GPL v2");
diff --git a/patches.zynq/0005-arm-zynq-slcr-Remove-redundant-header-includes.patch b/patches.zynq/0005-arm-zynq-slcr-Remove-redundant-header-includes.patch
deleted file mode 100644
index e81ae28452551..0000000000000
--- a/patches.zynq/0005-arm-zynq-slcr-Remove-redundant-header-includes.patch
+++ /dev/null
@@ -1,40 +0,0 @@
-From b6557492b29644237eda88551d2e09cb21769ae4 Mon Sep 17 00:00:00 2001
-From: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Date: Wed, 17 Jul 2013 10:10:13 -0700
-Subject: arm: zynq: slcr: Remove redundant header #includes
-
-Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-(cherry picked from commit c323f2a188e333a6d8ee5ebb7cd2460020459f74)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- arch/arm/mach-zynq/slcr.c | 10 ----------
- 1 file changed, 10 deletions(-)
-
-diff --git a/arch/arm/mach-zynq/slcr.c b/arch/arm/mach-zynq/slcr.c
-index c70969b9c258..ee1128998d6b 100644
---- a/arch/arm/mach-zynq/slcr.c
-+++ b/arch/arm/mach-zynq/slcr.c
-@@ -14,18 +14,8 @@
-  * 02139, USA.
-  */
- 
--#include <linux/export.h>
- #include <linux/io.h>
--#include <linux/fs.h>
--#include <linux/interrupt.h>
--#include <linux/init.h>
--#include <linux/kernel.h>
--#include <linux/module.h>
- #include <linux/of_address.h>
--#include <linux/uaccess.h>
--#include <linux/platform_device.h>
--#include <linux/slab.h>
--#include <linux/string.h>
- #include <linux/clk/zynq.h>
- #include "common.h"
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0005-gpio-xilinx-merge-Xilinx-gpio-support-into-LTSI-3.10.patch b/patches.zynq/0005-gpio-xilinx-merge-Xilinx-gpio-support-into-LTSI-3.10.patch
deleted file mode 100644
index f7d7d0dd71f97..0000000000000
--- a/patches.zynq/0005-gpio-xilinx-merge-Xilinx-gpio-support-into-LTSI-3.10.patch
+++ /dev/null
@@ -1,1207 +0,0 @@
-From 142b902012ca81b1dfb65700f203aab9be6929aa Mon Sep 17 00:00:00 2001
-From: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Date: Fri, 20 Dec 2013 15:24:18 +0900
-Subject: gpio: xilinx: merge Xilinx gpio support into LTSI 3.10.y
-
-This commits merges support for the GPIO bus from the Xilinx
-master branch (commit efc27505715e64526653f35274717c0fc56491e3 in
-master branch).
-
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/gpio/Kconfig         |   12 
- drivers/gpio/Makefile        |    1 
- drivers/gpio/gpio-xilinx.c   |  321 +++++++++++++++++--
- drivers/gpio/gpio-xilinxps.c |  722 +++++++++++++++++++++++++++++++++++++++++++
- 4 files changed, 1026 insertions(+), 30 deletions(-)
- create mode 100644 drivers/gpio/gpio-xilinxps.c
-
---- a/drivers/gpio/Kconfig
-+++ b/drivers/gpio/Kconfig
-@@ -234,9 +234,17 @@ config GPIO_TS5500
- 
- config GPIO_XILINX
- 	bool "Xilinx GPIO support"
--	depends on PPC_OF || MICROBLAZE
-+	depends on PPC_OF || MICROBLAZE || ARCH_ZYNQ
-+	select GENERIC_IRQ_CHIP
- 	help
--	  Say yes here to support the Xilinx FPGA GPIO device
-+	  Say yes here to support the Xilinx AXI/XPS GPIO device
-+
-+config GPIO_XILINX_PS
-+	tristate "Xilinx GPIO PS"
-+	depends on ARCH_ZYNQ
-+	select GENERIC_IRQ_CHIP
-+	help
-+	  Say yes here to support Xilinx GPIO PS controller
- 
- config GPIO_VR41XX
- 	tristate "NEC VR4100 series General-purpose I/O Uint support"
---- a/drivers/gpio/Makefile
-+++ b/drivers/gpio/Makefile
-@@ -87,3 +87,4 @@ obj-$(CONFIG_GPIO_WM831X)	+= gpio-wm831x
- obj-$(CONFIG_GPIO_WM8350)	+= gpio-wm8350.o
- obj-$(CONFIG_GPIO_WM8994)	+= gpio-wm8994.o
- obj-$(CONFIG_GPIO_XILINX)	+= gpio-xilinx.o
-+obj-$(CONFIG_GPIO_XILINX_PS)	+= gpio-xilinxps.o
---- a/drivers/gpio/gpio-xilinx.c
-+++ b/drivers/gpio/gpio-xilinx.c
-@@ -17,15 +17,25 @@
- #include <linux/errno.h>
- #include <linux/module.h>
- #include <linux/of_device.h>
-+#include <linux/of_irq.h>
- #include <linux/of_platform.h>
- #include <linux/of_gpio.h>
-+#include <linux/interrupt.h>
- #include <linux/io.h>
-+#include <linux/irq.h>
-+#include <linux/irqchip/chained_irq.h>
-+#include <linux/irqdomain.h>
- #include <linux/gpio.h>
- #include <linux/slab.h>
- 
- /* Register Offset Definitions */
--#define XGPIO_DATA_OFFSET   (0x0)	/* Data register  */
--#define XGPIO_TRI_OFFSET    (0x4)	/* I/O direction register  */
-+#define XGPIO_DATA_OFFSET	0x0 /* Data register */
-+#define XGPIO_TRI_OFFSET	0x4 /* I/O direction register */
-+#define XGPIO_GIER_OFFSET	0x11c /* Global Interrupt Enable */
-+#define XGPIO_GIER_IE		BIT(31)
-+
-+#define XGPIO_IPISR_OFFSET	0x120 /* IP Interrupt Status */
-+#define XGPIO_IPIER_OFFSET	0x128 /* IP Interrupt Enable */
- 
- #define XGPIO_CHANNEL_OFFSET	0x8
- 
-@@ -40,18 +50,24 @@
- 
- /**
-  * struct xgpio_instance - Stores information about GPIO device
-- * struct of_mm_gpio_chip mmchip: OF GPIO chip for memory mapped banks
-- * gpio_state: GPIO state shadow register
-- * gpio_dir: GPIO direction shadow register
-- * offset: GPIO channel offset
-- * gpio_lock: Lock used for synchronization
-+ * @mmchip: OF GPIO chip for memory mapped banks
-+ * @gpio_state: GPIO state shadow register
-+ * @gpio_dir: GPIO direction shadow register
-+ * @offset: GPIO channel offset
-+ * @irq_base: GPIO channel irq base address
-+ * @irq_enable: GPIO irq enable/disable bitfield
-+ * @gpio_lock: Lock used for synchronization
-+ * @irq_domain: irq_domain of the controller
-  */
- struct xgpio_instance {
- 	struct of_mm_gpio_chip mmchip;
- 	u32 gpio_state;
- 	u32 gpio_dir;
- 	u32 offset;
-+	int irq_base;
-+	u32 irq_enable;
- 	spinlock_t gpio_lock;
-+	struct irq_domain *irq_domain;
- };
- 
- /**
-@@ -59,8 +75,11 @@ struct xgpio_instance {
-  * @gc:     Pointer to gpio_chip device structure.
-  * @gpio:   GPIO signal number.
-  *
-- * This function reads the specified signal of the GPIO device. It returns 0 if
-- * the signal clear, 1 if signal is set or negative value on error.
-+ * This function reads the specified signal of the GPIO device.
-+ *
-+ * Return:
-+ * 0 if direction of GPIO signals is set as input otherwise it
-+ * returns negative error value.
-  */
- static int xgpio_get(struct gpio_chip *gc, unsigned int gpio)
- {
-@@ -110,8 +129,10 @@ static void xgpio_set(struct gpio_chip *
-  * @gpio:   GPIO signal number.
-  *
-  * This function sets the direction of specified GPIO signal as input.
-- * It returns 0 if direction of GPIO signals is set as input otherwise it
-- * returns negative error value.
-+ *
-+ * Return:
-+ * 0 - if direction of GPIO signals is set as input
-+ * otherwise it returns negative error value.
-  */
- static int xgpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
- {
-@@ -138,8 +159,10 @@ static int xgpio_dir_in(struct gpio_chip
-  * @gpio:   GPIO signal number.
-  * @val:    Value to be written to specified signal.
-  *
-- * This function sets the direction of specified GPIO signal as output. If all
-- * GPIO signals of GPIO chip is configured as input then it returns
-+ * This function sets the direction of specified GPIO signal as output.
-+ *
-+ * Return:
-+ * If all GPIO signals of GPIO chip is configured as input then it returns
-  * error otherwise it returns 0.
-  */
- static int xgpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
-@@ -171,7 +194,7 @@ static int xgpio_dir_out(struct gpio_chi
- 
- /**
-  * xgpio_save_regs - Set initial values of GPIO pins
-- * @mm_gc: pointer to memory mapped GPIO chip structure
-+ * @mm_gc: Pointer to memory mapped GPIO chip structure
-  */
- static void xgpio_save_regs(struct of_mm_gpio_chip *mm_gc)
- {
-@@ -185,20 +208,245 @@ static void xgpio_save_regs(struct of_mm
- }
- 
- /**
-+ * xgpio_xlate - Set initial values of GPIO pins
-+ * @gc: Pointer to gpio_chip device structure.
-+ * @gpiospec:  gpio specifier as found in the device tree
-+ * @flags: A flags pointer based on binding
-+ *
-+ * Return:
-+ * irq number otherwise -EINVAL
-+ */
-+static int xgpio_xlate(struct gpio_chip *gc,
-+		       const struct of_phandle_args *gpiospec, u32 *flags)
-+{
-+	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
-+	struct xgpio_instance *chip = container_of(mm_gc, struct xgpio_instance,
-+						   mmchip);
-+
-+	if (gpiospec->args[1] == chip->offset)
-+		return gpiospec->args[0];
-+
-+	return -EINVAL;
-+}
-+
-+/**
-+ * xgpio_irq_mask - Write the specified signal of the GPIO device.
-+ * @irq_data: per irq and chip data passed down to chip functions
-+ */
-+static void xgpio_irq_mask(struct irq_data *irq_data)
-+{
-+	unsigned long flags;
-+	struct xgpio_instance *chip = irq_data_get_irq_chip_data(irq_data);
-+	struct of_mm_gpio_chip *mm_gc = &chip->mmchip;
-+	u32 offset = irq_data->irq - chip->irq_base;
-+	u32 temp;
-+
-+	pr_debug("%s: Disable %d irq, irq_enable_mask 0x%x\n",
-+		__func__, offset, chip->irq_enable);
-+
-+	spin_lock_irqsave(&chip->gpio_lock, flags);
-+
-+	chip->irq_enable &= ~BIT(offset);
-+
-+	if (!chip->irq_enable) {
-+		/* Enable per channel interrupt */
-+		temp = xgpio_readreg(mm_gc->regs + XGPIO_IPIER_OFFSET);
-+		temp &= chip->offset / XGPIO_CHANNEL_OFFSET + 1;
-+		xgpio_writereg(mm_gc->regs + XGPIO_IPIER_OFFSET, temp);
-+
-+		/* Disable global interrupt if channel interrupts are unused */
-+		temp = xgpio_readreg(mm_gc->regs + XGPIO_IPIER_OFFSET);
-+		if (!temp)
-+			xgpio_writereg(mm_gc->regs + XGPIO_GIER_OFFSET,
-+				       ~XGPIO_GIER_IE);
-+
-+	}
-+	spin_unlock_irqrestore(&chip->gpio_lock, flags);
-+}
-+
-+/**
-+ * xgpio_irq_unmask - Write the specified signal of the GPIO device.
-+ * @irq_data: per irq and chip data passed down to chip functions
-+ */
-+static void xgpio_irq_unmask(struct irq_data *irq_data)
-+{
-+	unsigned long flags;
-+	struct xgpio_instance *chip = irq_data_get_irq_chip_data(irq_data);
-+	struct of_mm_gpio_chip *mm_gc = &chip->mmchip;
-+	u32 offset = irq_data->irq - chip->irq_base;
-+	u32 temp;
-+
-+	pr_debug("%s: Enable %d irq, irq_enable_mask 0x%x\n",
-+		__func__, offset, chip->irq_enable);
-+
-+	/* Setup pin as input */
-+	xgpio_dir_in(&mm_gc->gc, offset);
-+
-+	spin_lock_irqsave(&chip->gpio_lock, flags);
-+
-+	chip->irq_enable |= BIT(offset);
-+
-+	if (chip->irq_enable) {
-+
-+		/* Enable per channel interrupt */
-+		temp = xgpio_readreg(mm_gc->regs + XGPIO_IPIER_OFFSET);
-+		temp |= chip->offset / XGPIO_CHANNEL_OFFSET + 1;
-+		xgpio_writereg(mm_gc->regs + XGPIO_IPIER_OFFSET, temp);
-+
-+		/* Enable global interrupts */
-+		xgpio_writereg(mm_gc->regs + XGPIO_GIER_OFFSET, XGPIO_GIER_IE);
-+	}
-+
-+	spin_unlock_irqrestore(&chip->gpio_lock, flags);
-+}
-+
-+/**
-+ * xgpio_set_irq_type - Write the specified signal of the GPIO device.
-+ * @irq_data: Per irq and chip data passed down to chip functions
-+ * @type: Interrupt type that is to be set for the gpio pin
-+ *
-+ * Return:
-+ * 0 if interrupt type is supported otherwise otherwise -EINVAL
-+ */
-+static int xgpio_set_irq_type(struct irq_data *irq_data, unsigned int type)
-+{
-+	/* Only rising edge case is supported now */
-+	if (type == IRQ_TYPE_EDGE_RISING)
-+		return 0;
-+
-+	return -EINVAL;
-+}
-+
-+/* irq chip descriptor */
-+static struct irq_chip xgpio_irqchip = {
-+	.name		= "xgpio",
-+	.irq_mask	= xgpio_irq_mask,
-+	.irq_unmask	= xgpio_irq_unmask,
-+	.irq_set_type	= xgpio_set_irq_type,
-+};
-+
-+/**
-+ * xgpio_to_irq - Find out gpio to Linux irq mapping
-+ * @gc: Pointer to gpio_chip device structure.
-+ * @offset: Gpio pin offset
-+ *
-+ * Return:
-+ * irq number otherwise -EINVAL
-+ */
-+static int xgpio_to_irq(struct gpio_chip *gc, unsigned offset)
-+{
-+	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
-+	struct xgpio_instance *chip = container_of(mm_gc, struct xgpio_instance,
-+						   mmchip);
-+
-+	return irq_find_mapping(chip->irq_domain, offset);
-+}
-+
-+/**
-+ * xgpio_irqhandler - Gpio interrupt service routine
-+ * @irq: gpio irq number
-+ * @desc: Pointer to interrupt description
-+ */
-+static void xgpio_irqhandler(unsigned int irq, struct irq_desc *desc)
-+{
-+	struct xgpio_instance *chip = (struct xgpio_instance *)
-+						irq_get_handler_data(irq);
-+	struct of_mm_gpio_chip *mm_gc = &chip->mmchip;
-+	struct irq_chip *irqchip = irq_desc_get_chip(desc);
-+	int offset;
-+	unsigned long val;
-+
-+	chained_irq_enter(irqchip, desc);
-+
-+	val = xgpio_readreg(mm_gc->regs + chip->offset);
-+	/* Only rising edge is supported */
-+	val &= chip->irq_enable;
-+
-+	for_each_set_bit(offset, &val, chip->mmchip.gc.ngpio) {
-+		generic_handle_irq(chip->irq_base + offset);
-+	}
-+
-+	xgpio_writereg(mm_gc->regs + XGPIO_IPISR_OFFSET,
-+		       chip->offset / XGPIO_CHANNEL_OFFSET + 1);
-+
-+	chained_irq_exit(irqchip, desc);
-+}
-+
-+static struct lock_class_key gpio_lock_class;
-+
-+/**
-+ * xgpio_irq_setup - Allocate irq for gpio and setup appropriate functions
-+ * @np: Device node of the GPIO chip
-+ * @chip: Pointer to private gpio channel structure
-+ *
-+ * Return:
-+ * 0 if success, otherwise -1
-+ */
-+static int xgpio_irq_setup(struct device_node *np, struct xgpio_instance *chip)
-+{
-+	u32 pin_num;
-+	struct resource res;
-+
-+	int ret = of_irq_to_resource(np, 0, &res);
-+	if (!ret) {
-+		pr_info("GPIO IRQ not connected\n");
-+		return 0;
-+	}
-+
-+	chip->mmchip.gc.of_xlate = xgpio_xlate;
-+	chip->mmchip.gc.of_gpio_n_cells = 2;
-+	chip->mmchip.gc.to_irq = xgpio_to_irq;
-+
-+	chip->irq_base = irq_alloc_descs(-1, 0, chip->mmchip.gc.ngpio, 0);
-+	if (chip->irq_base < 0) {
-+		pr_err("Couldn't allocate IRQ numbers\n");
-+		return -1;
-+	}
-+	chip->irq_domain = irq_domain_add_legacy(np, chip->mmchip.gc.ngpio,
-+						 chip->irq_base, 0,
-+						 &irq_domain_simple_ops, NULL);
-+
-+	/*
-+	 * set the irq chip, handler and irq chip data for callbacks for
-+	 * each pin
-+	 */
-+	for (pin_num = 0; pin_num < chip->mmchip.gc.ngpio; pin_num++) {
-+		u32 gpio_irq = irq_find_mapping(chip->irq_domain, pin_num);
-+		irq_set_lockdep_class(gpio_irq, &gpio_lock_class);
-+		pr_debug("IRQ Base: %d, Pin %d = IRQ %d\n",
-+			chip->irq_base,	pin_num, gpio_irq);
-+		irq_set_chip_and_handler(gpio_irq, &xgpio_irqchip,
-+					 handle_simple_irq);
-+		irq_set_chip_data(gpio_irq, (void *)chip);
-+#ifdef CONFIG_ARCH_ZYNQ
-+		set_irq_flags(gpio_irq, IRQF_VALID);
-+#endif
-+	}
-+	irq_set_handler_data(res.start, (void *)chip);
-+	irq_set_chained_handler(res.start, xgpio_irqhandler);
-+
-+	return 0;
-+}
-+
-+/**
-  * xgpio_of_probe - Probe method for the GPIO device.
-  * @np: pointer to device tree node
-  *
-  * This function probes the GPIO device in the device tree. It initializes the
-- * driver data structure. It returns 0, if the driver is bound to the GPIO
-- * device, or a negative value if there is an error.
-+ * driver data structure.
-+ *
-+ * Return:
-+ * It returns 0, if the driver is bound to the GPIO device, or
-+ * a negative value if there is an error.
-  */
--static int xgpio_of_probe(struct device_node *np)
-+static int xgpio_of_probe(struct platform_device *pdev)
- {
-+	struct device_node *np = pdev->dev.of_node;
- 	struct xgpio_instance *chip;
- 	int status = 0;
- 	const u32 *tree_info;
- 
--	chip = kzalloc(sizeof(*chip), GFP_KERNEL);
-+	chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL);
- 	if (!chip)
- 		return -ENOMEM;
- 
-@@ -230,18 +478,24 @@ static int xgpio_of_probe(struct device_
- 	/* Call the OF gpio helper to setup and register the GPIO device */
- 	status = of_mm_gpiochip_add(np, &chip->mmchip);
- 	if (status) {
--		kfree(chip);
- 		pr_err("%s: error in probe function with status %d\n",
- 		       np->full_name, status);
- 		return status;
- 	}
- 
-+	status = xgpio_irq_setup(np, chip);
-+	if (status) {
-+		pr_err("%s: GPIO IRQ initialization failed %d\n",
-+		       np->full_name, status);
-+		return status;
-+	}
-+
- 	pr_info("XGpio: %s: registered, base is %d\n", np->full_name,
- 							chip->mmchip.gc.base);
- 
- 	tree_info = of_get_property(np, "xlnx,is-dual", NULL);
- 	if (tree_info && be32_to_cpup(tree_info)) {
--		chip = kzalloc(sizeof(*chip), GFP_KERNEL);
-+		chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL);
- 		if (!chip)
- 			return -ENOMEM;
- 
-@@ -274,12 +528,18 @@ static int xgpio_of_probe(struct device_
- 
- 		chip->mmchip.save_regs = xgpio_save_regs;
- 
-+		status = xgpio_irq_setup(np, chip);
-+		if (status) {
-+			pr_err("%s: GPIO IRQ initialization failed %d\n",
-+			      np->full_name, status);
-+			return status;
-+		}
-+
- 		/* Call the OF gpio helper to setup and register the GPIO dev */
- 		status = of_mm_gpiochip_add(np, &chip->mmchip);
- 		if (status) {
--			kfree(chip);
- 			pr_err("%s: error in probe function with status %d\n",
--			np->full_name, status);
-+			       np->full_name, status);
- 			return status;
- 		}
- 		pr_info("XGpio: %s: dual channel registered, base is %d\n",
-@@ -293,15 +553,20 @@ static struct of_device_id xgpio_of_matc
- 	{ .compatible = "xlnx,xps-gpio-1.00.a", },
- 	{ /* end of list */ },
- };
-+MODULE_DEVICE_TABLE(of, xgpio_of_match);
-+
-+static struct platform_driver xilinx_gpio_driver = {
-+	.probe = xgpio_of_probe,
-+	.driver = {
-+		.owner = THIS_MODULE,
-+		.name = "xilinx-gpio",
-+		.of_match_table = xgpio_of_match,
-+	},
-+};
- 
- static int __init xgpio_init(void)
- {
--	struct device_node *np;
--
--	for_each_matching_node(np, xgpio_of_match)
--		xgpio_of_probe(np);
--
--	return 0;
-+	return platform_driver_register(&xilinx_gpio_driver);
- }
- 
- /* Make sure we get initialized before anyone else tries to use us */
---- /dev/null
-+++ b/drivers/gpio/gpio-xilinxps.c
-@@ -0,0 +1,722 @@
-+/*
-+ * Xilinx PS GPIO device driver
-+ *
-+ * 2009-2011 (c) Xilinx, Inc.
-+ *
-+ * This program is free software; you can redistribute it and/or modify it under
-+ * the terms of the GNU General Public License as published by the Free Software
-+ * Foundation; either version 2 of the License, or (at your option) any later
-+ * version.
-+ *
-+ * You should have received a copy of the GNU General Public License along with
-+ * this program; if not, write to the Free Software Foundation, Inc., 675 Mass
-+ * Ave, Cambridge, MA 02139, USA.
-+ */
-+
-+#include <linux/clk.h>
-+#include <linux/err.h>
-+#include <linux/export.h>
-+#include <linux/gpio.h>
-+#include <linux/init.h>
-+#include <linux/interrupt.h>
-+#include <linux/io.h>
-+#include <linux/irq.h>
-+#include <linux/module.h>
-+#include <linux/platform_device.h>
-+#include <linux/pm_runtime.h>
-+#include <linux/pm_wakeup.h>
-+#include <linux/slab.h>
-+#include <asm/mach/irq.h>
-+#include <linux/irqdomain.h>
-+#include <linux/irqchip/chained_irq.h>
-+
-+#define DRIVER_NAME "xgpiops"
-+#define XGPIOPS_NR_GPIOS	118
-+
-+static struct irq_domain *irq_domain;
-+
-+/* Register offsets for the GPIO device */
-+
-+#define XGPIOPS_DATA_LSW_OFFSET(BANK)	(0x000 + (8 * BANK)) /* LSW Mask &
-+								Data -WO */
-+#define XGPIOPS_DATA_MSW_OFFSET(BANK)	(0x004 + (8 * BANK)) /* MSW Mask &
-+								Data -WO */
-+#define XGPIOPS_DATA_OFFSET(BANK)	(0x040 + (4 * BANK)) /* Data Register
-+								-RW */
-+#define XGPIOPS_DIRM_OFFSET(BANK)	(0x204 + (0x40 * BANK)) /* Direction
-+								mode reg-RW */
-+#define XGPIOPS_OUTEN_OFFSET(BANK)	(0x208 + (0x40 * BANK)) /* Output
-+								enable reg-RW
-+								 */
-+#define XGPIOPS_INTMASK_OFFSET(BANK)	(0x20C + (0x40 * BANK)) /* Interrupt
-+								mask reg-RO */
-+#define XGPIOPS_INTEN_OFFSET(BANK)	(0x210 + (0x40 * BANK)) /* Interrupt
-+								enable reg-WO
-+								 */
-+#define XGPIOPS_INTDIS_OFFSET(BANK)	(0x214 + (0x40 * BANK)) /* Interrupt
-+								disable reg-WO
-+								 */
-+#define XGPIOPS_INTSTS_OFFSET(BANK)	(0x218 + (0x40 * BANK)) /* Interrupt
-+								status reg-RO
-+								 */
-+#define XGPIOPS_INTTYPE_OFFSET(BANK)	(0x21C + (0x40 * BANK)) /* Interrupt
-+								type reg-RW
-+								 */
-+#define XGPIOPS_INTPOL_OFFSET(BANK)	(0x220 + (0x40 * BANK)) /* Interrupt
-+								polarity reg
-+								-RW */
-+#define XGPIOPS_INTANY_OFFSET(BANK)	(0x224 + (0x40 * BANK)) /* Interrupt on
-+								any, reg-RW */
-+
-+/* Read/Write access to the GPIO PS registers */
-+#define xgpiops_readreg(offset)		__raw_readl(offset)
-+#define xgpiops_writereg(val, offset)	__raw_writel(val, offset)
-+
-+static unsigned int xgpiops_pin_table[] = {
-+	31, /* 0 - 31 */
-+	53, /* 32 - 53 */
-+	85, /* 54 - 85 */
-+	117 /* 86 - 117 */
-+};
-+
-+/**
-+ * struct xgpiops - gpio device private data structure
-+ * @chip:	instance of the gpio_chip
-+ * @base_addr:	base address of the GPIO device
-+ * @gpio_lock:	lock used for synchronization
-+ */
-+struct xgpiops {
-+	struct gpio_chip chip;
-+	void __iomem *base_addr;
-+	unsigned int irq;
-+	unsigned int irq_base;
-+	struct clk *clk;
-+	spinlock_t gpio_lock;
-+};
-+
-+/**
-+ * xgpiops_get_bank_pin - Get the bank number and pin number within that bank
-+ * for a given pin in the GPIO device
-+ * @pin_num:	gpio pin number within the device
-+ * @bank_num:	an output parameter used to return the bank number of the gpio
-+ *		pin
-+ * @bank_pin_num: an output parameter used to return pin number within a bank
-+ *		  for the given gpio pin
-+ *
-+ * Returns the bank number.
-+ */
-+static inline void xgpiops_get_bank_pin(unsigned int pin_num,
-+					 unsigned int *bank_num,
-+					 unsigned int *bank_pin_num)
-+{
-+	for (*bank_num = 0; *bank_num < 4; (*bank_num)++)
-+		if (pin_num <= xgpiops_pin_table[*bank_num])
-+			break;
-+
-+	if (*bank_num == 0)
-+		*bank_pin_num = pin_num;
-+	else
-+		*bank_pin_num = pin_num %
-+					(xgpiops_pin_table[*bank_num - 1] + 1);
-+}
-+
-+/**
-+ * xgpiops_get_value - Get the state of the specified pin of GPIO device
-+ * @chip:	gpio_chip instance to be worked on
-+ * @pin:	gpio pin number within the device
-+ *
-+ * This function reads the state of the specified pin of the GPIO device.
-+ * It returns 0 if the pin is low, 1 if pin is high.
-+ */
-+static int xgpiops_get_value(struct gpio_chip *chip, unsigned int pin)
-+{
-+	unsigned int bank_num, bank_pin_num;
-+	struct xgpiops *gpio = container_of(chip, struct xgpiops, chip);
-+
-+	xgpiops_get_bank_pin(pin, &bank_num, &bank_pin_num);
-+
-+	return (xgpiops_readreg(gpio->base_addr +
-+				 XGPIOPS_DATA_OFFSET(bank_num)) >>
-+		bank_pin_num) & 1;
-+}
-+
-+/**
-+ * xgpiops_set_value - Modify the state of the pin with specified value
-+ * @chip:	gpio_chip instance to be worked on
-+ * @pin:	gpio pin number within the device
-+ * @state:	value used to modify the state of the specified pin
-+ *
-+ * This function calculates the register offset (i.e to lower 16 bits or
-+ * upper 16 bits) based on the given pin number and sets the state of a
-+ * gpio pin to the specified value. The state is either 0 or non-zero.
-+ */
-+static void xgpiops_set_value(struct gpio_chip *chip, unsigned int pin,
-+			       int state)
-+{
-+	unsigned long flags;
-+	unsigned int reg_offset;
-+	unsigned int bank_num, bank_pin_num;
-+	struct xgpiops *gpio = container_of(chip, struct xgpiops, chip);
-+
-+	xgpiops_get_bank_pin(pin, &bank_num, &bank_pin_num);
-+
-+	if (bank_pin_num >= 16) {
-+		bank_pin_num -= 16; /* only 16 data bits in bit maskable reg */
-+		reg_offset = XGPIOPS_DATA_MSW_OFFSET(bank_num);
-+	} else {
-+		reg_offset = XGPIOPS_DATA_LSW_OFFSET(bank_num);
-+	}
-+
-+	/*
-+	 * get the 32 bit value to be written to the mask/data register where
-+	 * the upper 16 bits is the mask and lower 16 bits is the data
-+	 */
-+	if (state)
-+		state = 1;
-+	state = ~(1 << (bank_pin_num + 16)) & ((state << bank_pin_num) |
-+					       0xFFFF0000);
-+
-+	spin_lock_irqsave(&gpio->gpio_lock, flags);
-+	xgpiops_writereg(state, gpio->base_addr + reg_offset);
-+	spin_unlock_irqrestore(&gpio->gpio_lock, flags);
-+}
-+
-+/**
-+ * xgpiops_dir_in - Set the direction of the specified GPIO pin as input
-+ * @chip:	gpio_chip instance to be worked on
-+ * @pin:	gpio pin number within the device
-+ *
-+ * This function uses the read-modify-write sequence to set the direction of
-+ * the gpio pin as input. Returns 0 always.
-+ */
-+static int xgpiops_dir_in(struct gpio_chip *chip, unsigned int pin)
-+{
-+	unsigned int reg, bank_num, bank_pin_num;
-+	struct xgpiops *gpio = container_of(chip, struct xgpiops, chip);
-+
-+	xgpiops_get_bank_pin(pin, &bank_num, &bank_pin_num);
-+	/* clear the bit in direction mode reg to set the pin as input */
-+	reg = xgpiops_readreg(gpio->base_addr + XGPIOPS_DIRM_OFFSET(bank_num));
-+	reg &= ~(1 << bank_pin_num);
-+	xgpiops_writereg(reg, gpio->base_addr + XGPIOPS_DIRM_OFFSET(bank_num));
-+
-+	return 0;
-+}
-+
-+/**
-+ * xgpiops_dir_out - Set the direction of the specified GPIO pin as output
-+ * @chip:	gpio_chip instance to be worked on
-+ * @pin:	gpio pin number within the device
-+ * @state:	value to be written to specified pin
-+ *
-+ * This function sets the direction of specified GPIO pin as output, configures
-+ * the Output Enable register for the pin and uses xgpiops_set to set the state
-+ * of the pin to the value specified. Returns 0 always.
-+ */
-+static int xgpiops_dir_out(struct gpio_chip *chip, unsigned int pin, int state)
-+{
-+	struct xgpiops *gpio = container_of(chip, struct xgpiops, chip);
-+	unsigned int reg, bank_num, bank_pin_num;
-+
-+	xgpiops_get_bank_pin(pin, &bank_num, &bank_pin_num);
-+
-+	/* set the GPIO pin as output */
-+	reg = xgpiops_readreg(gpio->base_addr + XGPIOPS_DIRM_OFFSET(bank_num));
-+	reg |= 1 << bank_pin_num;
-+	xgpiops_writereg(reg, gpio->base_addr + XGPIOPS_DIRM_OFFSET(bank_num));
-+
-+	/* configure the output enable reg for the pin */
-+	reg = xgpiops_readreg(gpio->base_addr + XGPIOPS_OUTEN_OFFSET(bank_num));
-+	reg |= 1 << bank_pin_num;
-+	xgpiops_writereg(reg, gpio->base_addr + XGPIOPS_OUTEN_OFFSET(bank_num));
-+
-+	/* set the state of the pin */
-+	xgpiops_set_value(chip, pin, state);
-+	return 0;
-+}
-+
-+static int xgpiops_to_irq(struct gpio_chip *chip, unsigned offset)
-+{
-+	return irq_find_mapping(irq_domain, offset);
-+}
-+
-+/**
-+ * xgpiops_irq_ack - Acknowledge the interrupt of a gpio pin
-+ * @irq_data: irq data containing irq number of gpio pin for the irq to ack
-+ *
-+ * This function calculates gpio pin number from irq number and sets the bit
-+ * in the Interrupt Status Register of the corresponding bank, to ACK the irq.
-+ */
-+static void xgpiops_irq_ack(struct irq_data *irq_data)
-+{
-+	struct xgpiops *gpio = (struct xgpiops *)
-+				irq_data_get_irq_chip_data(irq_data);
-+	unsigned int device_pin_num, bank_num, bank_pin_num;
-+
-+	device_pin_num = irq_data->hwirq;
-+	xgpiops_get_bank_pin(device_pin_num, &bank_num, &bank_pin_num);
-+	xgpiops_writereg(1 << bank_pin_num, gpio->base_addr +
-+			(XGPIOPS_INTSTS_OFFSET(bank_num)));
-+}
-+
-+/**
-+ * xgpiops_irq_mask - Disable the interrupts for a gpio pin
-+ * @irq:	irq number of gpio pin for which interrupt is to be disabled
-+ *
-+ * This function calculates gpio pin number from irq number and sets the
-+ * bit in the Interrupt Disable register of the corresponding bank to disable
-+ * interrupts for that pin.
-+ */
-+static void xgpiops_irq_mask(struct irq_data *irq_data)
-+{
-+	struct xgpiops *gpio = (struct xgpiops *)
-+				irq_data_get_irq_chip_data(irq_data);
-+	unsigned int device_pin_num, bank_num, bank_pin_num;
-+
-+	device_pin_num = irq_data->hwirq;
-+	xgpiops_get_bank_pin(device_pin_num, &bank_num, &bank_pin_num);
-+	xgpiops_writereg(1 << bank_pin_num,
-+			  gpio->base_addr + XGPIOPS_INTDIS_OFFSET(bank_num));
-+}
-+
-+/**
-+ * xgpiops_irq_unmask - Enable the interrupts for a gpio pin
-+ * @irq_data: irq data containing irq number of gpio pin for the irq to enable
-+ *
-+ * This function calculates the gpio pin number from irq number and sets the
-+ * bit in the Interrupt Enable register of the corresponding bank to enable
-+ * interrupts for that pin.
-+ */
-+static void xgpiops_irq_unmask(struct irq_data *irq_data)
-+{
-+	struct xgpiops *gpio = irq_data_get_irq_chip_data(irq_data);
-+	unsigned int device_pin_num, bank_num, bank_pin_num;
-+
-+	device_pin_num = irq_data->hwirq;
-+	xgpiops_get_bank_pin(device_pin_num, &bank_num, &bank_pin_num);
-+	xgpiops_writereg(1 << bank_pin_num,
-+			  gpio->base_addr + XGPIOPS_INTEN_OFFSET(bank_num));
-+}
-+
-+/**
-+ * xgpiops_set_irq_type - Set the irq type for a gpio pin
-+ * @irq_data:	irq data containing irq number of gpio pin
-+ * @type:	interrupt type that is to be set for the gpio pin
-+ *
-+ * This function gets the gpio pin number and its bank from the gpio pin number
-+ * and configures the INT_TYPE, INT_POLARITY and INT_ANY registers. Returns 0,
-+ * negative error otherwise.
-+ * TYPE-EDGE_RISING,  INT_TYPE - 1, INT_POLARITY - 1,  INT_ANY - 0;
-+ * TYPE-EDGE_FALLING, INT_TYPE - 1, INT_POLARITY - 0,  INT_ANY - 0;
-+ * TYPE-EDGE_BOTH,    INT_TYPE - 1, INT_POLARITY - NA, INT_ANY - 1;
-+ * TYPE-LEVEL_HIGH,   INT_TYPE - 0, INT_POLARITY - 1,  INT_ANY - NA;
-+ * TYPE-LEVEL_LOW,    INT_TYPE - 0, INT_POLARITY - 0,  INT_ANY - NA
-+ */
-+static int xgpiops_set_irq_type(struct irq_data *irq_data, unsigned int type)
-+{
-+	struct xgpiops *gpio = irq_data_get_irq_chip_data(irq_data);
-+	unsigned int device_pin_num, bank_num, bank_pin_num;
-+	unsigned int int_type, int_pol, int_any;
-+
-+	device_pin_num = irq_data->hwirq;
-+	xgpiops_get_bank_pin(device_pin_num, &bank_num, &bank_pin_num);
-+
-+	int_type = xgpiops_readreg(gpio->base_addr +
-+				    XGPIOPS_INTTYPE_OFFSET(bank_num));
-+	int_pol = xgpiops_readreg(gpio->base_addr +
-+				   XGPIOPS_INTPOL_OFFSET(bank_num));
-+	int_any = xgpiops_readreg(gpio->base_addr +
-+				   XGPIOPS_INTANY_OFFSET(bank_num));
-+
-+	/*
-+	 * based on the type requested, configure the INT_TYPE, INT_POLARITY
-+	 * and INT_ANY registers
-+	 */
-+	switch (type) {
-+	case IRQ_TYPE_EDGE_RISING:
-+		int_type |= (1 << bank_pin_num);
-+		int_pol |= (1 << bank_pin_num);
-+		int_any &= ~(1 << bank_pin_num);
-+		break;
-+	case IRQ_TYPE_EDGE_FALLING:
-+		int_type |= (1 << bank_pin_num);
-+		int_pol &= ~(1 << bank_pin_num);
-+		int_any &= ~(1 << bank_pin_num);
-+		break;
-+	case IRQ_TYPE_EDGE_BOTH:
-+		int_type |= (1 << bank_pin_num);
-+		int_any |= (1 << bank_pin_num);
-+		break;
-+	case IRQ_TYPE_LEVEL_HIGH:
-+		int_type &= ~(1 << bank_pin_num);
-+		int_pol |= (1 << bank_pin_num);
-+		break;
-+	case IRQ_TYPE_LEVEL_LOW:
-+		int_type &= ~(1 << bank_pin_num);
-+		int_pol &= ~(1 << bank_pin_num);
-+		break;
-+	default:
-+		return -EINVAL;
-+	}
-+
-+	xgpiops_writereg(int_type,
-+			  gpio->base_addr + XGPIOPS_INTTYPE_OFFSET(bank_num));
-+	xgpiops_writereg(int_pol,
-+			  gpio->base_addr + XGPIOPS_INTPOL_OFFSET(bank_num));
-+	xgpiops_writereg(int_any,
-+			  gpio->base_addr + XGPIOPS_INTANY_OFFSET(bank_num));
-+	return 0;
-+}
-+
-+static int xgpiops_set_wake(struct irq_data *data, unsigned int on)
-+{
-+	if (on)
-+		xgpiops_irq_unmask(data);
-+	else
-+		xgpiops_irq_mask(data);
-+
-+	return 0;
-+}
-+
-+/* irq chip descriptor */
-+static struct irq_chip xgpiops_irqchip = {
-+	.name		= DRIVER_NAME,
-+	.irq_ack	= xgpiops_irq_ack,
-+	.irq_mask	= xgpiops_irq_mask,
-+	.irq_unmask	= xgpiops_irq_unmask,
-+	.irq_set_type	= xgpiops_set_irq_type,
-+	.irq_set_wake	= xgpiops_set_wake,
-+};
-+
-+/**
-+ * xgpiops_irqhandler - IRQ handler for the gpio banks of a gpio device
-+ * @irq:	irq number of the gpio bank where interrupt has occurred
-+ * @desc:	irq descriptor instance of the 'irq'
-+ *
-+ * This function reads the Interrupt Status Register of each bank to get the
-+ * gpio pin number which has triggered an interrupt. It then acks the triggered
-+ * interrupt and calls the pin specific handler set by the higher layer
-+ * application for that pin.
-+ * Note: A bug is reported if no handler is set for the gpio pin.
-+ */
-+static void xgpiops_irqhandler(unsigned int irq, struct irq_desc *desc)
-+{
-+	struct xgpiops *gpio = (struct xgpiops *)irq_get_handler_data(irq);
-+	int gpio_irq = gpio->irq_base;
-+	unsigned int int_sts, int_enb, bank_num;
-+	struct irq_desc *gpio_irq_desc;
-+	struct irq_chip *chip = irq_desc_get_chip(desc);
-+
-+	chained_irq_enter(chip, desc);
-+
-+	for (bank_num = 0; bank_num < 4; bank_num++) {
-+		int_sts = xgpiops_readreg(gpio->base_addr +
-+					   XGPIOPS_INTSTS_OFFSET(bank_num));
-+		int_enb = xgpiops_readreg(gpio->base_addr +
-+					   XGPIOPS_INTMASK_OFFSET(bank_num));
-+		int_sts &= ~int_enb;
-+
-+		for (; int_sts != 0; int_sts >>= 1, gpio_irq++) {
-+			if ((int_sts & 1) == 0)
-+				continue;
-+			gpio_irq_desc = irq_to_desc(gpio_irq);
-+			BUG_ON(!gpio_irq_desc);
-+			chip = irq_desc_get_chip(gpio_irq_desc);
-+			BUG_ON(!chip);
-+			chip->irq_ack(&gpio_irq_desc->irq_data);
-+
-+			/* call the pin specific handler */
-+			generic_handle_irq(gpio_irq);
-+		}
-+		/* shift to first virtual irq of next bank */
-+		gpio_irq = gpio->irq_base + xgpiops_pin_table[bank_num] + 1;
-+	}
-+
-+	chip = irq_desc_get_chip(desc);
-+	chained_irq_exit(chip, desc);
-+}
-+
-+#ifdef CONFIG_PM_SLEEP
-+static int xgpiops_suspend(struct device *dev)
-+{
-+	struct platform_device *pdev = to_platform_device(dev);
-+	struct xgpiops *gpio = platform_get_drvdata(pdev);
-+
-+	if (!device_may_wakeup(dev)) {
-+		if (!pm_runtime_suspended(dev))
-+			clk_disable(gpio->clk);
-+		return 0;
-+	}
-+
-+	return 0;
-+}
-+
-+static int xgpiops_resume(struct device *dev)
-+{
-+	struct platform_device *pdev = to_platform_device(dev);
-+	struct xgpiops *gpio = platform_get_drvdata(pdev);
-+
-+	if (!device_may_wakeup(dev)) {
-+		if (!pm_runtime_suspended(dev))
-+			return clk_enable(gpio->clk);
-+	}
-+
-+	return 0;
-+}
-+#endif
-+
-+#ifdef CONFIG_PM_RUNTIME
-+static int xgpiops_runtime_suspend(struct device *dev)
-+{
-+	struct platform_device *pdev = to_platform_device(dev);
-+	struct xgpiops *gpio = platform_get_drvdata(pdev);
-+
-+	clk_disable(gpio->clk);
-+
-+	return 0;
-+}
-+
-+static int xgpiops_runtime_resume(struct device *dev)
-+{
-+	struct platform_device *pdev = to_platform_device(dev);
-+	struct xgpiops *gpio = platform_get_drvdata(pdev);
-+
-+	return clk_enable(gpio->clk);
-+}
-+
-+static int xgpiops_idle(struct device *dev)
-+{
-+	return pm_schedule_suspend(dev, 1);
-+}
-+
-+static int xgpiops_request(struct gpio_chip *chip, unsigned offset)
-+{
-+	int ret;
-+
-+	ret = pm_runtime_get_sync(chip->dev);
-+
-+	/*
-+	 * If the device is already active pm_runtime_get() will return 1 on
-+	 * success, but gpio_request still needs to return 0.
-+	 */
-+	return ret < 0 ? ret : 0;
-+}
-+
-+static void xgpiops_free(struct gpio_chip *chip, unsigned offset)
-+{
-+	pm_runtime_put_sync(chip->dev);
-+}
-+
-+static void xgpiops_pm_runtime_init(struct platform_device *pdev)
-+{
-+	struct xgpiops *gpio = platform_get_drvdata(pdev);
-+
-+	clk_disable(gpio->clk);
-+	pm_runtime_enable(&pdev->dev);
-+}
-+
-+#else /* ! CONFIG_PM_RUNTIME */
-+#define xgpiops_request	NULL
-+#define xgpiops_free	NULL
-+static void xgpiops_pm_runtime_init(struct platform_device *pdev) {}
-+#endif /* ! CONFIG_PM_RUNTIME */
-+
-+#if defined(CONFIG_PM_RUNTIME) || defined(CONFIG_PM_SLEEP)
-+static const struct dev_pm_ops xgpiops_dev_pm_ops = {
-+	SET_SYSTEM_SLEEP_PM_OPS(xgpiops_suspend, xgpiops_resume)
-+	SET_RUNTIME_PM_OPS(xgpiops_runtime_suspend, xgpiops_runtime_resume,
-+			xgpiops_idle)
-+};
-+#define XGPIOPS_PM	(&xgpiops_dev_pm_ops)
-+
-+#else /*! CONFIG_PM_RUNTIME || ! CONFIG_PM_SLEEP */
-+#define XGPIOPS_PM	NULL
-+#endif /*! CONFIG_PM_RUNTIME */
-+
-+/**
-+ * xgpiops_probe - Initialization method for a xgpiops device
-+ * @pdev:	platform device instance
-+ *
-+ * This function allocates memory resources for the gpio device and registers
-+ * all the banks of the device. It will also set up interrupts for the gpio
-+ * pins.
-+ * Note: Interrupts are disabled for all the banks during initialization.
-+ * Returns 0 on success, negative error otherwise.
-+ */
-+static int xgpiops_probe(struct platform_device *pdev)
-+{
-+	int ret;
-+	unsigned int irq_num;
-+	struct xgpiops *gpio;
-+	struct gpio_chip *chip;
-+	resource_size_t remap_size;
-+	struct resource *mem_res = NULL;
-+	int pin_num, bank_num, gpio_irq;
-+
-+	gpio = kzalloc(sizeof(struct xgpiops), GFP_KERNEL);
-+	if (!gpio) {
-+		dev_err(&pdev->dev,
-+			"couldn't allocate memory for gpio private data\n");
-+		return -ENOMEM;
-+	}
-+
-+	spin_lock_init(&gpio->gpio_lock);
-+
-+	platform_set_drvdata(pdev, gpio);
-+
-+	mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+	if (!mem_res) {
-+		dev_err(&pdev->dev, "No memory resource\n");
-+		ret = -ENODEV;
-+		goto err_free_gpio;
-+	}
-+
-+	remap_size = mem_res->end - mem_res->start + 1;
-+	if (!request_mem_region(mem_res->start, remap_size, pdev->name)) {
-+		dev_err(&pdev->dev, "Cannot request IO\n");
-+		ret = -ENXIO;
-+		goto err_free_gpio;
-+	}
-+
-+	gpio->base_addr = ioremap(mem_res->start, remap_size);
-+	if (gpio->base_addr == NULL) {
-+		dev_err(&pdev->dev, "Couldn't ioremap memory at 0x%08lx\n",
-+			(unsigned long)mem_res->start);
-+		ret = -ENOMEM;
-+		goto err_release_region;
-+	}
-+
-+	irq_num = platform_get_irq(pdev, 0);
-+	gpio->irq = irq_num;
-+
-+	/* configure the gpio chip */
-+	chip = &gpio->chip;
-+	chip->label = "xgpiops";
-+	chip->owner = THIS_MODULE;
-+	chip->dev = &pdev->dev;
-+	chip->get = xgpiops_get_value;
-+	chip->set = xgpiops_set_value;
-+	chip->request = xgpiops_request;
-+	chip->free = xgpiops_free;
-+	chip->direction_input = xgpiops_dir_in;
-+	chip->direction_output = xgpiops_dir_out;
-+	chip->to_irq = xgpiops_to_irq;
-+	chip->dbg_show = NULL;
-+	chip->base = 0;		/* default pin base */
-+	chip->ngpio = XGPIOPS_NR_GPIOS;
-+	chip->can_sleep = 0;
-+
-+	gpio->irq_base = irq_alloc_descs(-1, 0, chip->ngpio, 0);
-+	if (gpio->irq_base < 0) {
-+		dev_err(&pdev->dev, "Couldn't allocate IRQ numbers\n");
-+		ret = -ENODEV;
-+		goto err_iounmap;
-+	}
-+
-+	irq_domain = irq_domain_add_legacy(pdev->dev.of_node,
-+					   chip->ngpio, gpio->irq_base, 0,
-+					   &irq_domain_simple_ops, NULL);
-+
-+	/* report a bug if gpio chip registration fails */
-+	ret = gpiochip_add(chip);
-+	if (ret < 0) {
-+		dev_err(&pdev->dev, "gpio chip registration failed\n");
-+		goto err_iounmap;
-+	} else {
-+		dev_info(&pdev->dev, "gpio at 0x%08lx mapped to 0x%08lx\n",
-+			 (unsigned long)mem_res->start,
-+			 (unsigned long)gpio->base_addr);
-+	}
-+
-+	/* Enable GPIO clock */
-+	gpio->clk = clk_get(&pdev->dev, NULL);
-+	if (IS_ERR(gpio->clk)) {
-+		dev_err(&pdev->dev, "input clock not found.\n");
-+		ret = PTR_ERR(gpio->clk);
-+		goto err_chip_remove;
-+	}
-+	ret = clk_prepare_enable(gpio->clk);
-+	if (ret) {
-+		dev_err(&pdev->dev, "Unable to enable clock.\n");
-+		goto err_clk_put;
-+	}
-+
-+	/* disable interrupts for all banks */
-+	for (bank_num = 0; bank_num < 4; bank_num++) {
-+		xgpiops_writereg(0xffffffff, gpio->base_addr +
-+				  XGPIOPS_INTDIS_OFFSET(bank_num));
-+	}
-+
-+	/*
-+	 * set the irq chip, handler and irq chip data for callbacks for
-+	 * each pin
-+	 */
-+	for (pin_num = 0; pin_num < min_t(int, XGPIOPS_NR_GPIOS,
-+						(int)chip->ngpio); pin_num++) {
-+		gpio_irq = irq_find_mapping(irq_domain, pin_num);
-+		irq_set_chip_and_handler(gpio_irq, &xgpiops_irqchip,
-+							handle_simple_irq);
-+		irq_set_chip_data(gpio_irq, (void *)gpio);
-+		set_irq_flags(gpio_irq, IRQF_VALID);
-+	}
-+
-+	irq_set_handler_data(irq_num, (void *)gpio);
-+	irq_set_chained_handler(irq_num, xgpiops_irqhandler);
-+
-+	xgpiops_pm_runtime_init(pdev);
-+
-+	device_set_wakeup_capable(&pdev->dev, 1);
-+
-+	return 0;
-+
-+err_clk_put:
-+	clk_put(gpio->clk);
-+err_chip_remove:
-+	gpiochip_remove(chip);
-+err_iounmap:
-+	iounmap(gpio->base_addr);
-+err_release_region:
-+	release_mem_region(mem_res->start, remap_size);
-+err_free_gpio:
-+	platform_set_drvdata(pdev, NULL);
-+	kfree(gpio);
-+
-+	return ret;
-+}
-+
-+static int xgpiops_remove(struct platform_device *pdev)
-+{
-+	struct xgpiops *gpio = platform_get_drvdata(pdev);
-+
-+	clk_disable_unprepare(gpio->clk);
-+	clk_put(gpio->clk);
-+	device_set_wakeup_capable(&pdev->dev, 0);
-+	return 0;
-+}
-+
-+static struct of_device_id xgpiops_of_match[] = {
-+	{ .compatible = "xlnx,ps7-gpio-1.00.a", },
-+	{ /* end of table */}
-+};
-+MODULE_DEVICE_TABLE(of, xgpiops_of_match);
-+
-+static struct platform_driver xgpiops_driver = {
-+	.driver	= {
-+		.name	= DRIVER_NAME,
-+		.owner	= THIS_MODULE,
-+		.pm	= XGPIOPS_PM,
-+		.of_match_table = xgpiops_of_match,
-+	},
-+	.probe		= xgpiops_probe,
-+	.remove		= xgpiops_remove,
-+};
-+
-+/**
-+ * xgpiops_init - Initial driver registration call
-+ */
-+static int __init xgpiops_init(void)
-+{
-+	return platform_driver_register(&xgpiops_driver);
-+}
-+
-+postcore_initcall(xgpiops_init);
diff --git a/patches.zynq/0006-arm-zynq-slcr-Clean-up-defines.patch b/patches.zynq/0006-arm-zynq-slcr-Clean-up-defines.patch
deleted file mode 100644
index d9f188c9cfd34..0000000000000
--- a/patches.zynq/0006-arm-zynq-slcr-Clean-up-defines.patch
+++ /dev/null
@@ -1,100 +0,0 @@
-From ff9feda6e107182a66031c7c4f269c8ab733bab1 Mon Sep 17 00:00:00 2001
-From: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Date: Wed, 17 Jul 2013 10:10:14 -0700
-Subject: arm: zynq: slcr: Clean up #defines
-
-Use a common naming scheme for register offset #defines:
-Some of those used a '_OFFSET' suffix to distinguish them from others.
-This scheme is used for all register offsets now.
-
-Separate the register offset #defines from others and sort them in
-increasing order.
-
-Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-(cherry picked from commit b5f177ff305b3db63b5ea273e6471708790133f2)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- arch/arm/mach-zynq/slcr.c | 25 ++++++++++++-------------
- 1 file changed, 12 insertions(+), 13 deletions(-)
-
-diff --git a/arch/arm/mach-zynq/slcr.c b/arch/arm/mach-zynq/slcr.c
-index ee1128998d6b..743b4825ebf5 100644
---- a/arch/arm/mach-zynq/slcr.c
-+++ b/arch/arm/mach-zynq/slcr.c
-@@ -19,17 +19,16 @@
- #include <linux/clk/zynq.h>
- #include "common.h"
- 
--#define SLCR_UNLOCK_MAGIC		0xDF0D
--#define SLCR_UNLOCK			0x8   /* SCLR unlock register */
--
-+/* register offsets */
-+#define SLCR_UNLOCK_OFFSET		0x8   /* SCLR unlock register */
- #define SLCR_PS_RST_CTRL_OFFSET		0x200 /* PS Software Reset Control */
-+#define SLCR_A9_CPU_RST_CTRL_OFFSET	0x244 /* CPU Software Reset Control */
-+#define SLCR_REBOOT_STATUS_OFFSET	0x258 /* PS Reboot Status */
- 
-+#define SLCR_UNLOCK_MAGIC		0xDF0D
- #define SLCR_A9_CPU_CLKSTOP		0x10
- #define SLCR_A9_CPU_RST			0x1
- 
--#define SLCR_A9_CPU_RST_CTRL		0x244 /* CPU Software Reset Control */
--#define SLCR_REBOOT_STATUS		0x258 /* PS Reboot Status */
--
- void __iomem *zynq_slcr_base;
- 
- /**
-@@ -44,15 +43,15 @@ void zynq_slcr_system_reset(void)
- 	 * Note that this seems to require raw i/o
- 	 * functions or there's a lockup?
- 	 */
--	writel(SLCR_UNLOCK_MAGIC, zynq_slcr_base + SLCR_UNLOCK);
-+	writel(SLCR_UNLOCK_MAGIC, zynq_slcr_base + SLCR_UNLOCK_OFFSET);
- 
- 	/*
- 	 * Clear 0x0F000000 bits of reboot status register to workaround
- 	 * the FSBL not loading the bitstream after soft-reboot
- 	 * This is a temporary solution until we know more.
- 	 */
--	reboot = readl(zynq_slcr_base + SLCR_REBOOT_STATUS);
--	writel(reboot & 0xF0FFFFFF, zynq_slcr_base + SLCR_REBOOT_STATUS);
-+	reboot = readl(zynq_slcr_base + SLCR_REBOOT_STATUS_OFFSET);
-+	writel(reboot & 0xF0FFFFFF, zynq_slcr_base + SLCR_REBOOT_STATUS_OFFSET);
- 	writel(1, zynq_slcr_base + SLCR_PS_RST_CTRL_OFFSET);
- }
- 
-@@ -64,9 +63,9 @@ void zynq_slcr_cpu_start(int cpu)
- {
- 	/* enable CPUn */
- 	writel(SLCR_A9_CPU_CLKSTOP << cpu,
--	       zynq_slcr_base + SLCR_A9_CPU_RST_CTRL);
-+	       zynq_slcr_base + SLCR_A9_CPU_RST_CTRL_OFFSET);
- 	/* enable CLK for CPUn */
--	writel(0x0 << cpu, zynq_slcr_base + SLCR_A9_CPU_RST_CTRL);
-+	writel(0x0 << cpu, zynq_slcr_base + SLCR_A9_CPU_RST_CTRL_OFFSET);
- }
- 
- /**
-@@ -77,7 +76,7 @@ void zynq_slcr_cpu_stop(int cpu)
- {
- 	/* stop CLK and reset CPUn */
- 	writel((SLCR_A9_CPU_CLKSTOP | SLCR_A9_CPU_RST) << cpu,
--	       zynq_slcr_base + SLCR_A9_CPU_RST_CTRL);
-+	       zynq_slcr_base + SLCR_A9_CPU_RST_CTRL_OFFSET);
- }
- 
- /**
-@@ -103,7 +102,7 @@ int __init zynq_slcr_init(void)
- 	}
- 
- 	/* unlock the SLCR so that registers can be changed */
--	writel(SLCR_UNLOCK_MAGIC, zynq_slcr_base + SLCR_UNLOCK);
-+	writel(SLCR_UNLOCK_MAGIC, zynq_slcr_base + SLCR_UNLOCK_OFFSET);
- 
- 	pr_info("%s mapped to %p\n", np->name, zynq_slcr_base);
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0006-spi-xilinx-merge-qspi-support-from-xilinx-repository.patch b/patches.zynq/0006-spi-xilinx-merge-qspi-support-from-xilinx-repository.patch
deleted file mode 100644
index bb8e527d1baa2..0000000000000
--- a/patches.zynq/0006-spi-xilinx-merge-qspi-support-from-xilinx-repository.patch
+++ /dev/null
@@ -1,2303 +0,0 @@
-From 99e292bf8f472ce9475a68b37eb89ef201ff8acb Mon Sep 17 00:00:00 2001
-From: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Date: Tue, 24 Dec 2013 09:10:07 +0900
-Subject: spi: xilinx: merge qspi support from xilinx repository
-
-This merges support for Xilinx QSPI from the Xilinx repository
-(based on commit efc27505715e64526653f35274717c0fc56491e3 in master
-branch). This has been tested to read the QSPI flash in the
-Zynq 702 board.
-
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/spi/Kconfig          |   24 
- drivers/spi/Makefile         |    2 
- drivers/spi/spi-xilinx-ps.c  |  927 ++++++++++++++++++++++++++++++++
- drivers/spi/spi-xilinx-qps.c | 1220 +++++++++++++++++++++++++++++++++++++++++++
- drivers/spi/spi-xilinx.c     |   27 
- include/linux/spi/spi.h      |    2 
- 6 files changed, 2196 insertions(+), 6 deletions(-)
- create mode 100644 drivers/spi/spi-xilinx-ps.c
- create mode 100644 drivers/spi/spi-xilinx-qps.c
-
---- a/drivers/spi/Kconfig
-+++ b/drivers/spi/Kconfig
-@@ -474,12 +474,32 @@ config SPI_XILINX
- 	select SPI_BITBANG
- 	help
- 	  This exposes the SPI controller IP from the Xilinx EDK.
--
- 	  See the "OPB Serial Peripheral Interface (SPI) (v1.00e)"
- 	  Product Specification document (DS464) for hardware details.
--
- 	  Or for the DS570, see "XPS Serial Peripheral Interface (SPI) (v2.00b)"
- 
-+config SPI_XILINX_PS_QSPI
-+	tristate "Xilinx PS QSPI controller"
-+	depends on ARCH_ZYNQ
-+	depends on SPI_MASTER
-+	help
-+	  This selects the PS Quad SPI controller master driver from the Xilinx.
-+
-+config SPI_XILINX_PS_QSPI_DUAL_STACKED
-+	bool "Xilinx PS QSPI Dual stacked configuration"
-+	depends on SPI_XILINX_PS_QSPI
-+	help
-+	  This selects the PS Quad SPI controller in dual stacked mode.
-+	  Enable this option if your hw design is using dual stacked
-+	  configuration.
-+
-+config SPI_XILINX_PS_SPI
-+	tristate "Xilinx PS SPI controller"
-+	depends on ARCH_ZYNQ
-+	depends on SPI_MASTER
-+	help
-+	  This selects the PS SPI controller master driver from the Xilinx.
-+
- config SPI_NUC900
- 	tristate "Nuvoton NUC900 series SPI"
- 	depends on ARCH_W90X900
---- a/drivers/spi/Makefile
-+++ b/drivers/spi/Makefile
-@@ -74,3 +74,5 @@ obj-$(CONFIG_SPI_TOPCLIFF_PCH)		+= spi-t
- obj-$(CONFIG_SPI_TXX9)			+= spi-txx9.o
- obj-$(CONFIG_SPI_XCOMM)		+= spi-xcomm.o
- obj-$(CONFIG_SPI_XILINX)		+= spi-xilinx.o
-+obj-$(CONFIG_SPI_XILINX_PS_SPI)	+= spi-xilinx-ps.o
-+obj-$(CONFIG_SPI_XILINX_PS_QSPI)	+= spi-xilinx-qps.o
---- /dev/null
-+++ b/drivers/spi/spi-xilinx-ps.c
-@@ -0,0 +1,927 @@
-+/*
-+ *
-+ * Xilinx PS SPI controller driver (master mode only)
-+ *
-+ * (c) 2008-2011 Xilinx, Inc.
-+ *
-+ * based on Blackfin On-Chip SPI Driver (spi_bfin5xx.c)
-+ *
-+ * This program is free software; you can redistribute it and/or modify it under
-+ * the terms of the GNU General Public License version 2 as published by the
-+ * Free Software Foundation; either version 2 of the License, or (at your
-+ * option) any later version.
-+ *
-+ * You should have received a copy of the GNU General Public License along with
-+ * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
-+ * Place, Suite 330, Boston, MA  02111-1307  USA
-+ */
-+
-+
-+#include <linux/clk.h>
-+#include <linux/delay.h>
-+#include <linux/init.h>
-+#include <linux/interrupt.h>
-+#include <linux/io.h>
-+#include <linux/module.h>
-+#include <linux/of_irq.h>
-+#include <linux/of_address.h>
-+#include <linux/platform_device.h>
-+#include <linux/spi/spi.h>
-+#include <linux/spinlock.h>
-+#include <linux/workqueue.h>
-+
-+/*
-+ * Name of this driver
-+ */
-+#define XSPIPS_NAME		"xspips"
-+
-+/*
-+ * Register offset definitions
-+ */
-+#define XSPIPS_CR_OFFSET	0x00 /* Configuration  Register, RW */
-+#define XSPIPS_ISR_OFFSET	0x04 /* Interrupt Status Register, RO */
-+#define XSPIPS_IER_OFFSET	0x08 /* Interrupt Enable Register, WO */
-+#define XSPIPS_IDR_OFFSET	0x0c /* Interrupt Disable Register, WO */
-+#define XSPIPS_IMR_OFFSET	0x10 /* Interrupt Enabled Mask Register, RO */
-+#define XSPIPS_ER_OFFSET	0x14 /* Enable/Disable Register, RW */
-+#define XSPIPS_DR_OFFSET	0x18 /* Delay Register, RW */
-+#define XSPIPS_TXD_OFFSET	0x1C /* Data Transmit Register, WO */
-+#define XSPIPS_RXD_OFFSET	0x20 /* Data Receive Register, RO */
-+#define XSPIPS_SICR_OFFSET	0x24 /* Slave Idle Count Register, RW */
-+#define XSPIPS_THLD_OFFSET	0x28 /* Transmit FIFO Watermark Register,RW */
-+
-+/*
-+ * SPI Configuration Register bit Masks
-+ *
-+ * This register contains various control bits that affect the operation
-+ * of the SPI controller
-+ */
-+#define XSPIPS_CR_MANSTRT_MASK	0x00010000 /* Manual TX Start */
-+#define XSPIPS_CR_CPHA_MASK	0x00000004 /* Clock Phase Control */
-+#define XSPIPS_CR_CPOL_MASK	0x00000002 /* Clock Polarity Control */
-+#define XSPIPS_CR_SSCTRL_MASK	0x00003C00 /* Slave Select Mask */
-+
-+/*
-+ * SPI Interrupt Registers bit Masks
-+ *
-+ * All the four interrupt registers (Status/Mask/Enable/Disable) have the same
-+ * bit definitions.
-+ */
-+#define XSPIPS_IXR_TXOW_MASK	0x00000004 /* SPI TX FIFO Overwater */
-+#define XSPIPS_IXR_MODF_MASK	0x00000002 /* SPI Mode Fault */
-+#define XSPIPS_IXR_RXNEMTY_MASK 0x00000010 /* SPI RX FIFO Not Empty */
-+#define XSPIPS_IXR_ALL_MASK	(XSPIPS_IXR_TXOW_MASK | XSPIPS_IXR_MODF_MASK)
-+
-+/*
-+ * SPI Enable Register bit Masks
-+ *
-+ * This register is used to enable or disable the SPI controller
-+ */
-+#define XSPIPS_ER_ENABLE_MASK	0x00000001 /* SPI Enable Bit Mask */
-+
-+/*
-+ * Definitions for the status of queue
-+ */
-+#define XSPIPS_QUEUE_STOPPED	0
-+#define XSPIPS_QUEUE_RUNNING	1
-+
-+/*
-+ * Macros for the SPI controller read/write
-+ */
-+#define xspips_read(addr)	__raw_readl(addr)
-+#define xspips_write(addr, val)	__raw_writel((val), (addr))
-+
-+
-+/**
-+ * struct xspips - This definition defines spi driver instance
-+ * @workqueue:		Queue of all the transfers
-+ * @work:		Information about current transfer
-+ * @queue:		Head of the queue
-+ * @queue_state:	Queue status
-+ * @regs:		Virtual address of the SPI controller registers
-+ * @devclk:		Pointer to the peripheral clock
-+ * @aperclk:		Pointer to the APER clock
-+ * @clk_rate_change_nb:	Notifier block for clock frequency change callback
-+ * @irq:		IRQ number
-+ * @speed_hz:		Current SPI bus clock speed in Hz
-+ * @trans_queue_lock:	Lock used for accessing transfer queue
-+ * @ctrl_reg_lock:	Lock used for accessing configuration register
-+ * @txbuf:		Pointer	to the TX buffer
-+ * @rxbuf:		Pointer to the RX buffer
-+ * @remaining_bytes:	Number of bytes left to transfer
-+ * @dev_busy:		Device busy flag
-+ * @done:		Transfer complete status
-+ */
-+struct xspips {
-+	struct workqueue_struct *workqueue;
-+	struct work_struct work;
-+	struct list_head queue;
-+	int queue_state;
-+	void __iomem *regs;
-+	struct clk *devclk;
-+	struct clk *aperclk;
-+	struct notifier_block clk_rate_change_nb;
-+	int irq;
-+	u32 speed_hz;
-+	spinlock_t trans_queue_lock;
-+	spinlock_t ctrl_reg_lock;
-+	const u8 *txbuf;
-+	u8 *rxbuf;
-+	int remaining_bytes;
-+	u8 dev_busy;
-+	struct completion done;
-+};
-+
-+
-+/**
-+ * xspips_init_hw - Initialize the hardware and configure the SPI controller
-+ * @regs_base:		Base address of SPI controller
-+ *
-+ * On reset the SPI controller is configured to be in master mode, baud rate
-+ * divisor is set to 2, threshold value for TX FIFO not full interrupt is set
-+ * to 1 and size of the word to be transferred as 8 bit.
-+ * This function initializes the SPI controller to disable and clear all the
-+ * interrupts, enable manual slave select and manual start, deselect all the
-+ * chip select lines, and enable the SPI controller.
-+ */
-+static void xspips_init_hw(void __iomem *regs_base)
-+{
-+	xspips_write(regs_base + XSPIPS_ER_OFFSET, ~XSPIPS_ER_ENABLE_MASK);
-+	xspips_write(regs_base + XSPIPS_IDR_OFFSET, 0x7F);
-+
-+	/* Clear the RX FIFO */
-+	while (xspips_read(regs_base + XSPIPS_ISR_OFFSET) &
-+			XSPIPS_IXR_RXNEMTY_MASK)
-+		xspips_read(regs_base + XSPIPS_RXD_OFFSET);
-+
-+	xspips_write(regs_base + XSPIPS_ISR_OFFSET, 0x7F);
-+	xspips_write(regs_base + XSPIPS_CR_OFFSET, 0x0000FC01);
-+	xspips_write(regs_base + XSPIPS_ER_OFFSET, XSPIPS_ER_ENABLE_MASK);
-+}
-+
-+/**
-+ * xspips_chipselect - Select or deselect the chip select line
-+ * @spi:	Pointer to the spi_device structure
-+ * @is_on:	Select(1) or deselect (0) the chip select line
-+ */
-+static void xspips_chipselect(struct spi_device *spi, int is_on)
-+{
-+	struct xspips *xspi = spi_master_get_devdata(spi->master);
-+	u32 ctrl_reg;
-+	unsigned long flags;
-+
-+	spin_lock_irqsave(&xspi->ctrl_reg_lock, flags);
-+
-+	ctrl_reg = xspips_read(xspi->regs + XSPIPS_CR_OFFSET);
-+
-+	if (is_on) {
-+		/* Select the slave */
-+		ctrl_reg &= ~XSPIPS_CR_SSCTRL_MASK;
-+		ctrl_reg |= (((~(0x0001 << spi->chip_select)) << 10) &
-+				XSPIPS_CR_SSCTRL_MASK);
-+	} else {
-+		/* Deselect the slave */
-+		ctrl_reg |= XSPIPS_CR_SSCTRL_MASK;
-+	}
-+
-+	xspips_write(xspi->regs + XSPIPS_CR_OFFSET, ctrl_reg);
-+
-+	spin_unlock_irqrestore(&xspi->ctrl_reg_lock, flags);
-+}
-+
-+/**
-+ * xspips_setup_transfer - Configure SPI controller for specified transfer
-+ * @spi:	Pointer to the spi_device structure
-+ * @transfer:	Pointer to the spi_transfer structure which provides information
-+ *		about next transfer setup parameters
-+ *
-+ * Sets the operational mode of SPI controller for the next SPI transfer and
-+ * sets the requested clock frequency.
-+ *
-+ * returns:	0 on success and error value on error
-+ *
-+ * Note: If the requested frequency is not an exact match with what can be
-+ * obtained using the prescalar value the driver sets the clock frequency which
-+ * is lower than the requested frequency (maximum lower) for the transfer. If
-+ * the requested frequency is higher or lower than that is supported by the SPI
-+ * controller the driver will set the highest or lowest frequency supported by
-+ * controller.
-+ */
-+static int xspips_setup_transfer(struct spi_device *spi,
-+		struct spi_transfer *transfer)
-+{
-+	struct xspips *xspi = spi_master_get_devdata(spi->master);
-+	u8 bits_per_word;
-+	u32 ctrl_reg;
-+	u32 req_hz;
-+	u32 baud_rate_val;
-+	unsigned long flags, frequency;
-+
-+	bits_per_word = (transfer) ?
-+			transfer->bits_per_word : spi->bits_per_word;
-+	req_hz = (transfer) ? transfer->speed_hz : spi->max_speed_hz;
-+
-+	if (bits_per_word != 8) {
-+		dev_err(&spi->dev, "%s, unsupported bits per word %x\n",
-+			__func__, spi->bits_per_word);
-+		return -EINVAL;
-+	}
-+
-+	frequency = clk_get_rate(xspi->devclk);
-+
-+	spin_lock_irqsave(&xspi->ctrl_reg_lock, flags);
-+
-+	xspips_write(xspi->regs + XSPIPS_ER_OFFSET, ~XSPIPS_ER_ENABLE_MASK);
-+	ctrl_reg = xspips_read(xspi->regs + XSPIPS_CR_OFFSET);
-+
-+	/* Set the SPI clock phase and clock polarity */
-+	ctrl_reg &= (~XSPIPS_CR_CPHA_MASK) & (~XSPIPS_CR_CPOL_MASK);
-+	if (spi->mode & SPI_CPHA)
-+		ctrl_reg |= XSPIPS_CR_CPHA_MASK;
-+	if (spi->mode & SPI_CPOL)
-+		ctrl_reg |= XSPIPS_CR_CPOL_MASK;
-+
-+	/* Set the clock frequency */
-+	if (xspi->speed_hz != req_hz) {
-+		baud_rate_val = 0;
-+		while ((baud_rate_val < 8) && (frequency /
-+					(2 << baud_rate_val)) > req_hz)
-+			baud_rate_val++;
-+
-+		ctrl_reg &= 0xFFFFFFC7;
-+		ctrl_reg |= (baud_rate_val << 3);
-+
-+		xspi->speed_hz = (frequency / (2 << baud_rate_val));
-+	}
-+
-+	xspips_write(xspi->regs + XSPIPS_CR_OFFSET, ctrl_reg);
-+	xspips_write(xspi->regs + XSPIPS_ER_OFFSET, XSPIPS_ER_ENABLE_MASK);
-+
-+	spin_unlock_irqrestore(&xspi->ctrl_reg_lock, flags);
-+
-+	dev_dbg(&spi->dev, "%s, mode %d, %u bits/w, %u clock speed\n",
-+		__func__, spi->mode, spi->bits_per_word,
-+		xspi->speed_hz);
-+
-+	return 0;
-+}
-+
-+/**
-+ * xspips_setup - Configure the SPI controller
-+ * @spi:	Pointer to the spi_device structure
-+ *
-+ * Sets the operational mode of SPI controller for the next SPI transfer, sets
-+ * the baud rate and divisor value to setup the requested spi clock.
-+ *
-+ * returns:	0 on success and error value on error
-+ */
-+static int xspips_setup(struct spi_device *spi)
-+{
-+	if (!spi->max_speed_hz)
-+		return -EINVAL;
-+
-+	if (!spi->bits_per_word)
-+		spi->bits_per_word = 8;
-+
-+	return xspips_setup_transfer(spi, NULL);
-+}
-+
-+/**
-+ * xspips_fill_tx_fifo - Fills the TX FIFO with as many bytes as possible
-+ * @xspi:	Pointer to the xspips structure
-+ */
-+static void xspips_fill_tx_fifo(struct xspips *xspi)
-+{
-+	while ((xspips_read(xspi->regs + XSPIPS_ISR_OFFSET) & 0x00000008) == 0
-+		&& (xspi->remaining_bytes > 0)) {
-+		if (xspi->txbuf)
-+			xspips_write(xspi->regs + XSPIPS_TXD_OFFSET,
-+					*xspi->txbuf++);
-+		else
-+			xspips_write(xspi->regs + XSPIPS_TXD_OFFSET, 0);
-+
-+		xspi->remaining_bytes--;
-+	}
-+}
-+
-+/**
-+ * xspips_irq - Interrupt service routine of the SPI controller
-+ * @irq:	IRQ number
-+ * @dev_id:	Pointer to the xspi structure
-+ *
-+ * This function handles TX empty and Mode Fault interrupts only.
-+ * On TX empty interrupt this function reads the received data from RX FIFO and
-+ * fills the TX FIFO if there is any data remaining to be transferred.
-+ * On Mode Fault interrupt this function indicates that transfer is completed,
-+ * the SPI subsystem will identify the error as the remaining bytes to be
-+ * transferred is non-zero.
-+ *
-+ * returns:	IRQ_HANDLED always
-+ */
-+static irqreturn_t xspips_irq(int irq, void *dev_id)
-+{
-+	struct xspips *xspi = dev_id;
-+	u32 intr_status;
-+
-+	intr_status = xspips_read(xspi->regs + XSPIPS_ISR_OFFSET);
-+	xspips_write(xspi->regs + XSPIPS_ISR_OFFSET, intr_status);
-+	xspips_write(xspi->regs + XSPIPS_IDR_OFFSET, XSPIPS_IXR_ALL_MASK);
-+
-+	if (intr_status & XSPIPS_IXR_MODF_MASK) {
-+		/* Indicate that transfer is completed, the SPI subsystem will
-+		 * identify the error as the remaining bytes to be
-+		 * transferred is non-zero */
-+		complete(&xspi->done);
-+	} else if (intr_status & XSPIPS_IXR_TXOW_MASK) {
-+		u32 ctrl_reg;
-+
-+		/* Read out the data from the RX FIFO */
-+		while (xspips_read(xspi->regs + XSPIPS_ISR_OFFSET) &
-+				XSPIPS_IXR_RXNEMTY_MASK) {
-+			u8 data;
-+
-+			data = xspips_read(xspi->regs + XSPIPS_RXD_OFFSET);
-+			if (xspi->rxbuf)
-+				*xspi->rxbuf++ = data;
-+
-+			/* Data memory barrier is placed here to ensure that
-+			 * data read operation is completed before the status
-+			 * read is initiated. Without dmb, there are chances
-+			 * that data and status reads will appear at the SPI
-+			 * peripheral back-to-back which results in an
-+			 * incorrect status read.
-+			 */
-+			dmb();
-+		}
-+
-+		if (xspi->remaining_bytes) {
-+			/* There is more data to send */
-+			xspips_fill_tx_fifo(xspi);
-+
-+			xspips_write(xspi->regs + XSPIPS_IER_OFFSET,
-+					XSPIPS_IXR_ALL_MASK);
-+
-+			spin_lock(&xspi->ctrl_reg_lock);
-+
-+			ctrl_reg = xspips_read(xspi->regs + XSPIPS_CR_OFFSET);
-+			ctrl_reg |= XSPIPS_CR_MANSTRT_MASK;
-+			xspips_write(xspi->regs + XSPIPS_CR_OFFSET, ctrl_reg);
-+
-+			spin_unlock(&xspi->ctrl_reg_lock);
-+		} else {
-+			/* Transfer is completed */
-+			complete(&xspi->done);
-+		}
-+	}
-+
-+	return IRQ_HANDLED;
-+}
-+
-+/**
-+ * xspips_start_transfer - Initiates the SPI transfer
-+ * @spi:	Pointer to the spi_device structure
-+ * @transfer:	Pointer to the spi_transfer structure which provide information
-+ *		about next transfer parameters
-+ *
-+ * This function fills the TX FIFO, starts the SPI transfer, and waits for the
-+ * transfer to be completed.
-+ *
-+ * returns:	Number of bytes transferred in the last transfer
-+ */
-+static int xspips_start_transfer(struct spi_device *spi,
-+			struct spi_transfer *transfer)
-+{
-+	struct xspips *xspi = spi_master_get_devdata(spi->master);
-+	u32 ctrl_reg;
-+	unsigned long flags;
-+
-+	xspi->txbuf = transfer->tx_buf;
-+	xspi->rxbuf = transfer->rx_buf;
-+	xspi->remaining_bytes = transfer->len;
-+	INIT_COMPLETION(xspi->done);
-+
-+	xspips_fill_tx_fifo(xspi);
-+
-+	xspips_write(xspi->regs + XSPIPS_IER_OFFSET, XSPIPS_IXR_ALL_MASK);
-+
-+	spin_lock_irqsave(&xspi->ctrl_reg_lock, flags);
-+
-+	/* Start the transfer by enabling manual start bit */
-+	ctrl_reg = xspips_read(xspi->regs + XSPIPS_CR_OFFSET);
-+	ctrl_reg |= XSPIPS_CR_MANSTRT_MASK;
-+	xspips_write(xspi->regs + XSPIPS_CR_OFFSET, ctrl_reg);
-+
-+	spin_unlock_irqrestore(&xspi->ctrl_reg_lock, flags);
-+
-+	wait_for_completion(&xspi->done);
-+
-+	return (transfer->len) - (xspi->remaining_bytes);
-+}
-+
-+/**
-+ * xspips_work_queue - Get the transfer request from queue to perform transfers
-+ * @work:	Pointer to the work_struct structure
-+ */
-+static void xspips_work_queue(struct work_struct *work)
-+{
-+	struct xspips *xspi = container_of(work, struct xspips, work);
-+	unsigned long flags;
-+
-+	spin_lock_irqsave(&xspi->trans_queue_lock, flags);
-+	xspi->dev_busy = 1;
-+
-+	if (list_empty(&xspi->queue) ||
-+		xspi->queue_state == XSPIPS_QUEUE_STOPPED) {
-+		xspi->dev_busy = 0;
-+		spin_unlock_irqrestore(&xspi->trans_queue_lock, flags);
-+		return;
-+	}
-+
-+	while (!list_empty(&xspi->queue)) {
-+		struct spi_message *msg;
-+		struct spi_device *spi;
-+		struct spi_transfer *transfer = NULL;
-+		unsigned cs_change = 1;
-+		int status = 0;
-+
-+		msg = container_of(xspi->queue.next, struct spi_message, queue);
-+		list_del_init(&msg->queue);
-+		spin_unlock_irqrestore(&xspi->trans_queue_lock, flags);
-+		spi = msg->spi;
-+
-+		list_for_each_entry(transfer, &msg->transfers, transfer_list) {
-+			if ((transfer->bits_per_word || transfer->speed_hz) &&
-+								cs_change) {
-+				status = xspips_setup_transfer(spi, transfer);
-+				if (status < 0)
-+					break;
-+			}
-+
-+			if (cs_change)
-+				xspips_chipselect(spi, 1);
-+
-+			cs_change = transfer->cs_change;
-+
-+			if (!transfer->tx_buf && !transfer->rx_buf &&
-+				transfer->len) {
-+				status = -EINVAL;
-+				break;
-+			}
-+
-+			if (transfer->len)
-+				status = xspips_start_transfer(spi, transfer);
-+
-+			if (status != transfer->len) {
-+				if (status > 0)
-+					status = -EMSGSIZE;
-+				break;
-+			}
-+			msg->actual_length += status;
-+			status = 0;
-+
-+			if (transfer->delay_usecs)
-+				udelay(transfer->delay_usecs);
-+
-+			if (!cs_change)
-+				continue;
-+			if (transfer->transfer_list.next == &msg->transfers)
-+				break;
-+
-+			xspips_chipselect(spi, 0);
-+		}
-+
-+		msg->status = status;
-+		msg->complete(msg->context);
-+
-+		if (!(status == 0 && cs_change))
-+			xspips_chipselect(spi, 0);
-+
-+		spin_lock_irqsave(&xspi->trans_queue_lock, flags);
-+	}
-+	xspi->dev_busy = 0;
-+	spin_unlock_irqrestore(&xspi->trans_queue_lock, flags);
-+}
-+
-+/**
-+ * xspips_transfer - Add a new transfer request at the tail of work queue
-+ * @spi:	Pointer to the spi_device structure
-+ * @message:	Pointer to the spi_transfer structure which provide information
-+ *		about next transfer parameters
-+ *
-+ * returns:	0 on success and error value on error
-+ */
-+static int xspips_transfer(struct spi_device *spi, struct spi_message *message)
-+{
-+	struct xspips *xspi = spi_master_get_devdata(spi->master);
-+	struct spi_transfer *transfer;
-+	unsigned long flags;
-+
-+	if (xspi->queue_state == XSPIPS_QUEUE_STOPPED)
-+		return -ESHUTDOWN;
-+
-+	message->actual_length = 0;
-+	message->status = -EINPROGRESS;
-+
-+	/* Check each transfer's parameters */
-+	list_for_each_entry(transfer, &message->transfers, transfer_list) {
-+		u8 bits_per_word =
-+			transfer->bits_per_word ? : spi->bits_per_word;
-+
-+		bits_per_word = bits_per_word ? : 8;
-+		if (!transfer->tx_buf && !transfer->rx_buf && transfer->len)
-+			return -EINVAL;
-+		if (bits_per_word != 8)
-+			return -EINVAL;
-+	}
-+
-+	spin_lock_irqsave(&xspi->trans_queue_lock, flags);
-+	list_add_tail(&message->queue, &xspi->queue);
-+	if (!xspi->dev_busy)
-+		queue_work(xspi->workqueue, &xspi->work);
-+	spin_unlock_irqrestore(&xspi->trans_queue_lock, flags);
-+
-+	return 0;
-+}
-+
-+/**
-+ * xspips_start_queue - Starts the queue of the SPI driver
-+ * @xspi:	Pointer to the xspips structure
-+ *
-+ * returns:	0 on success and error value on error
-+ */
-+static inline int xspips_start_queue(struct xspips *xspi)
-+{
-+	unsigned long flags;
-+
-+	spin_lock_irqsave(&xspi->trans_queue_lock, flags);
-+
-+	if (xspi->queue_state == XSPIPS_QUEUE_RUNNING || xspi->dev_busy) {
-+		spin_unlock_irqrestore(&xspi->trans_queue_lock, flags);
-+		return -EBUSY;
-+	}
-+
-+	xspi->queue_state = XSPIPS_QUEUE_RUNNING;
-+	spin_unlock_irqrestore(&xspi->trans_queue_lock, flags);
-+
-+	return 0;
-+}
-+
-+/**
-+ * xspips_stop_queue - Stops the queue of the SPI driver
-+ * @xspi:	Pointer to the xspips structure
-+ *
-+ * This function waits till queue is empty and then stops the queue.
-+ * Maximum time out is set to 5 seconds.
-+ *
-+ * returns:	0 on success and error value on error
-+ */
-+static inline int xspips_stop_queue(struct xspips *xspi)
-+{
-+	unsigned long flags;
-+	unsigned limit = 500;
-+	int ret = 0;
-+
-+	if (xspi->queue_state != XSPIPS_QUEUE_RUNNING)
-+		return ret;
-+
-+	spin_lock_irqsave(&xspi->trans_queue_lock, flags);
-+
-+	while ((!list_empty(&xspi->queue) || xspi->dev_busy) && limit--) {
-+		spin_unlock_irqrestore(&xspi->trans_queue_lock, flags);
-+		msleep(10);
-+		spin_lock_irqsave(&xspi->trans_queue_lock, flags);
-+	}
-+
-+	if (!list_empty(&xspi->queue) || xspi->dev_busy)
-+		ret = -EBUSY;
-+
-+	if (ret == 0)
-+		xspi->queue_state = XSPIPS_QUEUE_STOPPED;
-+
-+	spin_unlock_irqrestore(&xspi->trans_queue_lock, flags);
-+
-+	return ret;
-+}
-+
-+/**
-+ * xspips_destroy_queue - Destroys the queue of the SPI driver
-+ * @xspi:	Pointer to the xspips structure
-+ *
-+ * returns:	0 on success and error value on error
-+ */
-+static inline int xspips_destroy_queue(struct xspips *xspi)
-+{
-+	int ret;
-+
-+	ret = xspips_stop_queue(xspi);
-+	if (ret != 0)
-+		return ret;
-+
-+	destroy_workqueue(xspi->workqueue);
-+
-+	return 0;
-+}
-+
-+static int xspips_clk_notifier_cb(struct notifier_block *nb,
-+		unsigned long event, void *data)
-+{
-+	switch (event) {
-+	case PRE_RATE_CHANGE:
-+		/* if a rate change is announced we need to check whether we can
-+		 * maintain the current frequency by changing the clock
-+		 * dividers. And we may have to suspend operation and return
-+		 * after the rate change or its abort
-+		 */
-+		return NOTIFY_OK;
-+	case POST_RATE_CHANGE:
-+		return NOTIFY_OK;
-+	case ABORT_RATE_CHANGE:
-+	default:
-+		return NOTIFY_DONE;
-+	}
-+}
-+
-+/**
-+ * xspips_probe - Probe method for the SPI driver
-+ * @pdev:	Pointer to the platform_device structure
-+ *
-+ * This function initializes the driver data structures and the hardware.
-+ *
-+ * returns:	0 on success and error value on error
-+ */
-+static int xspips_probe(struct platform_device *pdev)
-+{
-+	int ret = 0;
-+	struct spi_master *master;
-+	struct xspips *xspi;
-+	struct resource *res;
-+
-+	master = spi_alloc_master(&pdev->dev, sizeof(*xspi));
-+	if (master == NULL)
-+		return -ENOMEM;
-+
-+	xspi = spi_master_get_devdata(master);
-+	master->dev.of_node = pdev->dev.of_node;
-+	platform_set_drvdata(pdev, master);
-+
-+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+	xspi->regs = devm_ioremap_resource(&pdev->dev, res);
-+	if (IS_ERR(xspi->regs)) {
-+		ret = PTR_ERR(xspi->regs);
-+		dev_err(&pdev->dev, "ioremap failed\n");
-+		goto remove_master;
-+	}
-+
-+	xspi->irq = platform_get_irq(pdev, 0);
-+	if (xspi->irq < 0) {
-+		ret = -ENXIO;
-+		dev_err(&pdev->dev, "irq number is negative\n");
-+		goto remove_master;
-+	}
-+
-+	ret = devm_request_irq(&pdev->dev, xspi->irq, xspips_irq,
-+			       0, pdev->name, xspi);
-+	if (ret != 0) {
-+		ret = -ENXIO;
-+		dev_err(&pdev->dev, "request_irq failed\n");
-+		goto remove_master;
-+	}
-+
-+	xspi->aperclk = clk_get(&pdev->dev, "aper_clk");
-+	if (IS_ERR(xspi->aperclk)) {
-+		dev_err(&pdev->dev, "aper_clk clock not found.\n");
-+		ret = PTR_ERR(xspi->aperclk);
-+		goto remove_master;
-+	}
-+
-+	xspi->devclk = clk_get(&pdev->dev, "ref_clk");
-+	if (IS_ERR(xspi->devclk)) {
-+		dev_err(&pdev->dev, "ref_clk clock not found.\n");
-+		ret = PTR_ERR(xspi->devclk);
-+		goto clk_put_aper;
-+	}
-+
-+	ret = clk_prepare_enable(xspi->aperclk);
-+	if (ret) {
-+		dev_err(&pdev->dev, "Unable to enable APER clock.\n");
-+		goto clk_put;
-+	}
-+
-+	ret = clk_prepare_enable(xspi->devclk);
-+	if (ret) {
-+		dev_err(&pdev->dev, "Unable to enable device clock.\n");
-+		goto clk_dis_aper;
-+	}
-+
-+	xspi->clk_rate_change_nb.notifier_call = xspips_clk_notifier_cb;
-+	xspi->clk_rate_change_nb.next = NULL;
-+	if (clk_notifier_register(xspi->devclk, &xspi->clk_rate_change_nb))
-+		dev_warn(&pdev->dev, "Unable to register clock notifier.\n");
-+
-+	/* SPI controller initializations */
-+	xspips_init_hw(xspi->regs);
-+
-+	init_completion(&xspi->done);
-+
-+	ret = of_property_read_u32(pdev->dev.of_node, "num-chip-select",
-+				   (u32 *)&master->num_chipselect);
-+	if (ret < 0) {
-+		dev_err(&pdev->dev, "couldn't determine num-chip-select\n");
-+		goto clk_notif_unreg;
-+	}
-+	master->setup = xspips_setup;
-+	master->transfer = xspips_transfer;
-+	master->mode_bits = SPI_CPOL | SPI_CPHA;
-+
-+	xspi->speed_hz = clk_get_rate(xspi->devclk) / 2;
-+
-+	xspi->dev_busy = 0;
-+
-+	INIT_LIST_HEAD(&xspi->queue);
-+	spin_lock_init(&xspi->trans_queue_lock);
-+	spin_lock_init(&xspi->ctrl_reg_lock);
-+
-+	xspi->queue_state = XSPIPS_QUEUE_STOPPED;
-+	xspi->dev_busy = 0;
-+
-+	INIT_WORK(&xspi->work, xspips_work_queue);
-+	xspi->workqueue =
-+		create_singlethread_workqueue(dev_name(&pdev->dev));
-+	if (!xspi->workqueue) {
-+		ret = -ENOMEM;
-+		dev_err(&pdev->dev, "problem initializing queue\n");
-+		goto clk_notif_unreg;
-+	}
-+
-+	ret = xspips_start_queue(xspi);
-+	if (ret != 0) {
-+		dev_err(&pdev->dev, "problem starting queue\n");
-+		goto remove_queue;
-+	}
-+
-+	ret = spi_register_master(master);
-+	if (ret) {
-+		dev_err(&pdev->dev, "spi_register_master failed\n");
-+		goto remove_queue;
-+	}
-+
-+	dev_info(&pdev->dev, "at 0x%08X mapped to 0x%08X, irq=%d\n", res->start,
-+			(u32 __force)xspi->regs, xspi->irq);
-+
-+	return ret;
-+
-+remove_queue:
-+	(void)xspips_destroy_queue(xspi);
-+clk_notif_unreg:
-+	clk_notifier_unregister(xspi->devclk, &xspi->clk_rate_change_nb);
-+	clk_disable_unprepare(xspi->devclk);
-+clk_dis_aper:
-+	clk_disable_unprepare(xspi->aperclk);
-+clk_put:
-+	clk_put(xspi->devclk);
-+clk_put_aper:
-+	clk_put(xspi->aperclk);
-+remove_master:
-+	spi_master_put(master);
-+	return ret;
-+}
-+
-+/**
-+ * xspips_remove - Remove method for the SPI driver
-+ * @pdev:	Pointer to the platform_device structure
-+ *
-+ * This function is called if a device is physically removed from the system or
-+ * if the driver module is being unloaded. It frees all resources allocated to
-+ * the device.
-+ *
-+ * returns:	0 on success and error value on error
-+ */
-+static int xspips_remove(struct platform_device *pdev)
-+{
-+	struct spi_master *master = platform_get_drvdata(pdev);
-+	struct xspips *xspi = spi_master_get_devdata(master);
-+	int ret = 0;
-+
-+	ret = xspips_destroy_queue(xspi);
-+	if (ret != 0)
-+		return ret;
-+
-+	xspips_write(xspi->regs + XSPIPS_ER_OFFSET, ~XSPIPS_ER_ENABLE_MASK);
-+
-+	clk_notifier_unregister(xspi->devclk, &xspi->clk_rate_change_nb);
-+	clk_disable_unprepare(xspi->devclk);
-+	clk_disable_unprepare(xspi->aperclk);
-+	clk_put(xspi->devclk);
-+	clk_put(xspi->aperclk);
-+
-+	spi_unregister_master(master);
-+	spi_master_put(master);
-+
-+	dev_dbg(&pdev->dev, "remove succeeded\n");
-+	return 0;
-+
-+}
-+
-+#ifdef CONFIG_PM_SLEEP
-+/**
-+ * xspips_suspend - Suspend method for the SPI driver
-+ * @dev:	Address of the platform_device structure
-+ *
-+ * This function stops the SPI driver queue and disables the SPI controller
-+ *
-+ * returns:	0 on success and error value on error
-+ */
-+static int xspips_suspend(struct device *dev)
-+{
-+	struct platform_device *pdev = container_of(dev,
-+			struct platform_device, dev);
-+	struct spi_master *master = platform_get_drvdata(pdev);
-+	struct xspips *xspi = spi_master_get_devdata(master);
-+	int ret = 0;
-+
-+	ret = xspips_stop_queue(xspi);
-+	if (ret != 0)
-+		return ret;
-+
-+	xspips_write(xspi->regs + XSPIPS_ER_OFFSET, ~XSPIPS_ER_ENABLE_MASK);
-+
-+	clk_disable(xspi->devclk);
-+	clk_disable(xspi->aperclk);
-+
-+	dev_dbg(&pdev->dev, "suspend succeeded\n");
-+	return 0;
-+}
-+
-+/**
-+ * xspips_resume - Resume method for the SPI driver
-+ * @dev:	Address of the platform_device structure
-+ *
-+ * This function starts the SPI driver queue and initializes the SPI controller
-+ *
-+ * returns:	0 on success and error value on error
-+ */
-+static int xspips_resume(struct device *dev)
-+{
-+	struct platform_device *pdev = container_of(dev,
-+			struct platform_device, dev);
-+	struct spi_master *master = platform_get_drvdata(pdev);
-+	struct xspips *xspi = spi_master_get_devdata(master);
-+	int ret = 0;
-+
-+	ret = clk_enable(xspi->aperclk);
-+	if (ret) {
-+		dev_err(dev, "Cannot enable APER clock.\n");
-+		return ret;
-+	}
-+
-+	ret = clk_enable(xspi->devclk);
-+	if (ret) {
-+		dev_err(dev, "Cannot enable device clock.\n");
-+		clk_disable(xspi->aperclk);
-+		return ret;
-+	}
-+
-+	xspips_init_hw(xspi->regs);
-+
-+	ret = xspips_start_queue(xspi);
-+	if (ret != 0) {
-+		dev_err(&pdev->dev, "problem starting queue (%d)\n", ret);
-+		return ret;
-+	}
-+
-+	dev_dbg(&pdev->dev, "resume succeeded\n");
-+	return 0;
-+}
-+#endif /* ! CONFIG_PM_SLEEP */
-+
-+static SIMPLE_DEV_PM_OPS(xspips_dev_pm_ops, xspips_suspend, xspips_resume);
-+
-+/* Work with hotplug and coldplug */
-+MODULE_ALIAS("platform:" XSPIPS_NAME);
-+
-+static struct of_device_id xspips_of_match[] = {
-+	{ .compatible = "xlnx,ps7-spi-1.00.a", },
-+	{ /* end of table */}
-+};
-+MODULE_DEVICE_TABLE(of, xspips_of_match);
-+
-+/*
-+ * xspips_driver - This structure defines the SPI subsystem platform driver
-+ */
-+static struct platform_driver xspips_driver = {
-+	.probe	= xspips_probe,
-+	.remove	= xspips_remove,
-+	.driver = {
-+		.name = XSPIPS_NAME,
-+		.owner = THIS_MODULE,
-+		.of_match_table = xspips_of_match,
-+		.pm = &xspips_dev_pm_ops,
-+	},
-+};
-+
-+module_platform_driver(xspips_driver);
-+
-+MODULE_AUTHOR("Xilinx, Inc.");
-+MODULE_DESCRIPTION("Xilinx PS SPI driver");
-+MODULE_LICENSE("GPL");
-+
---- /dev/null
-+++ b/drivers/spi/spi-xilinx-qps.c
-@@ -0,0 +1,1220 @@
-+/*
-+ *
-+ * Xilinx PS Quad-SPI (QSPI) controller driver (master mode only)
-+ *
-+ * (c) 2009-2011 Xilinx, Inc.
-+ *
-+ * based on Xilinx PS SPI Driver (xspips.c)
-+ *
-+ * This program is free software; you can redistribute it and/or modify it under
-+ * the terms of the GNU General Public License version 2 as published by the
-+ * Free Software Foundation; either version 2 of the License, or (at your
-+ * option) any later version.
-+ *
-+ * You should have received a copy of the GNU General Public License along with
-+ * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
-+ * Place, Suite 330, Boston, MA  02111-1307  USA
-+ */
-+
-+
-+#include <linux/clk.h>
-+#include <linux/delay.h>
-+#include <linux/init.h>
-+#include <linux/interrupt.h>
-+#include <linux/io.h>
-+#include <linux/module.h>
-+#include <linux/of_irq.h>
-+#include <linux/of_address.h>
-+#include <linux/platform_device.h>
-+#include <linux/spi/spi.h>
-+#include <linux/spinlock.h>
-+#include <linux/workqueue.h>
-+
-+/*
-+ * Name of this driver
-+ */
-+#define DRIVER_NAME			"xqspips"
-+
-+/*
-+ * Register offset definitions
-+ */
-+#define XQSPIPS_CONFIG_OFFSET		0x00 /* Configuration  Register, RW */
-+#define XQSPIPS_STATUS_OFFSET		0x04 /* Interrupt Status Register, RO */
-+#define XQSPIPS_IEN_OFFSET		0x08 /* Interrupt Enable Register, WO */
-+#define XQSPIPS_IDIS_OFFSET		0x0C /* Interrupt Disable Reg, WO */
-+#define XQSPIPS_IMASK_OFFSET		0x10 /* Interrupt Enabled Mask Reg,RO */
-+#define XQSPIPS_ENABLE_OFFSET		0x14 /* Enable/Disable Register, RW */
-+#define XQSPIPS_DELAY_OFFSET		0x18 /* Delay Register, RW */
-+#define XQSPIPS_TXD_00_00_OFFSET	0x1C /* Transmit 4-byte inst, WO */
-+#define XQSPIPS_TXD_00_01_OFFSET	0x80 /* Transmit 1-byte inst, WO */
-+#define XQSPIPS_TXD_00_10_OFFSET	0x84 /* Transmit 2-byte inst, WO */
-+#define XQSPIPS_TXD_00_11_OFFSET	0x88 /* Transmit 3-byte inst, WO */
-+#define XQSPIPS_RXD_OFFSET		0x20 /* Data Receive Register, RO */
-+#define XQSPIPS_SIC_OFFSET		0x24 /* Slave Idle Count Register, RW */
-+#define XQSPIPS_TX_THRESH_OFFSET	0x28 /* TX FIFO Watermark Reg, RW */
-+#define XQSPIPS_RX_THRESH_OFFSET	0x2C /* RX FIFO Watermark Reg, RW */
-+#define XQSPIPS_GPIO_OFFSET		0x30 /* GPIO Register, RW */
-+#define XQSPIPS_LINEAR_CFG_OFFSET	0xA0 /* Linear Adapter Config Ref, RW */
-+#define XQSPIPS_MOD_ID_OFFSET		0xFC /* Module ID Register, RO */
-+
-+/*
-+ * QSPI Configuration Register bit Masks
-+ *
-+ * This register contains various control bits that effect the operation
-+ * of the QSPI controller
-+ */
-+#define XQSPIPS_CONFIG_MANSRT_MASK	0x00010000 /* Manual TX Start */
-+#define XQSPIPS_CONFIG_CPHA_MASK	0x00000004 /* Clock Phase Control */
-+#define XQSPIPS_CONFIG_CPOL_MASK	0x00000002 /* Clock Polarity Control */
-+#define XQSPIPS_CONFIG_SSCTRL_MASK	0x00003C00 /* Slave Select Mask */
-+
-+/*
-+ * QSPI Interrupt Registers bit Masks
-+ *
-+ * All the four interrupt registers (Status/Mask/Enable/Disable) have the same
-+ * bit definitions.
-+ */
-+#define XQSPIPS_IXR_TXNFULL_MASK	0x00000004 /* QSPI TX FIFO Overflow */
-+#define XQSPIPS_IXR_TXFULL_MASK		0x00000008 /* QSPI TX FIFO is full */
-+#define XQSPIPS_IXR_RXNEMTY_MASK	0x00000010 /* QSPI RX FIFO Not Empty */
-+#define XQSPIPS_IXR_ALL_MASK		(XQSPIPS_IXR_TXNFULL_MASK)
-+
-+/*
-+ * QSPI Enable Register bit Masks
-+ *
-+ * This register is used to enable or disable the QSPI controller
-+ */
-+#define XQSPIPS_ENABLE_ENABLE_MASK	0x00000001 /* QSPI Enable Bit Mask */
-+
-+/*
-+ * QSPI Linear Configuration Register
-+ *
-+ * It is named Linear Configuration but it controls other modes when not in
-+ * linear mode also.
-+ */
-+#define XQSPIPS_LCFG_TWO_MEM_MASK	0x40000000 /* LQSPI Two memories Mask */
-+#define XQSPIPS_LCFG_SEP_BUS_MASK	0x20000000 /* LQSPI Separate bus Mask */
-+#define XQSPIPS_LCFG_U_PAGE_MASK	0x10000000 /* LQSPI Upper Page Mask */
-+
-+#define XQSPIPS_LCFG_DUMMY_SHIFT	8
-+
-+#define XQSPIPS_FAST_READ_QOUT_CODE	0x6B	/* read instruction code */
-+
-+/*
-+ * The modebits configurable by the driver to make the SPI support different
-+ * data formats
-+ */
-+#define MODEBITS			(SPI_CPOL | SPI_CPHA)
-+
-+/*
-+ * Definitions for the status of queue
-+ */
-+#define XQSPIPS_QUEUE_STOPPED		0
-+#define XQSPIPS_QUEUE_RUNNING		1
-+
-+/*
-+ * Definitions of the flash commands
-+ */
-+/* Flash opcodes in ascending order */
-+#define	XQSPIPS_FLASH_OPCODE_WRSR	0x01	/* Write status register */
-+#define	XQSPIPS_FLASH_OPCODE_PP		0x02	/* Page program */
-+#define	XQSPIPS_FLASH_OPCODE_NORM_READ	0x03	/* Normal read data bytes */
-+#define	XQSPIPS_FLASH_OPCODE_WRDS	0x04	/* Write disable */
-+#define	XQSPIPS_FLASH_OPCODE_RDSR1	0x05	/* Read status register 1 */
-+#define	XQSPIPS_FLASH_OPCODE_WREN	0x06	/* Write enable */
-+#define	XQSPIPS_FLASH_OPCODE_BRRD	0x16	/* Bank Register Read */
-+#define	XQSPIPS_FLASH_OPCODE_BRWR	0x17	/* Bank Register Write */
-+#define	XQSPIPS_FLASH_OPCODE_EXTADRD	0xC8	/* Micron - Bank Reg Read */
-+#define	XQSPIPS_FLASH_OPCODE_EXTADWR	0xC5	/* Micron - Bank Reg Write */
-+#define	XQSPIPS_FLASH_OPCODE_FAST_READ	0x0B	/* Fast read data bytes */
-+#define	XQSPIPS_FLASH_OPCODE_BE_4K	0x20	/* Erase 4KiB block */
-+#define	XQSPIPS_FLASH_OPCODE_RDSR2	0x35	/* Read status register 2 */
-+#define	XQSPIPS_FLASH_OPCODE_RDFSR	0x70	/* Read flag status register */
-+#define	XQSPIPS_FLASH_OPCODE_DUAL_READ	0x3B	/* Dual read data bytes */
-+#define	XQSPIPS_FLASH_OPCODE_BE_32K	0x52	/* Erase 32KiB block */
-+#define	XQSPIPS_FLASH_OPCODE_QUAD_READ	0x6B	/* Quad read data bytes */
-+#define	XQSPIPS_FLASH_OPCODE_ERASE_SUS	0x75	/* Erase suspend */
-+#define	XQSPIPS_FLASH_OPCODE_ERASE_RES	0x7A	/* Erase resume */
-+#define	XQSPIPS_FLASH_OPCODE_RDID	0x9F	/* Read JEDEC ID */
-+#define	XQSPIPS_FLASH_OPCODE_BE		0xC7	/* Erase whole flash block */
-+#define	XQSPIPS_FLASH_OPCODE_SE		0xD8	/* Sector erase (usually 64KB)*/
-+#define XQSPIPS_FLASH_OPCODE_QPP	0x32	/* Quad page program */
-+
-+/*
-+ * Macros for the QSPI controller read/write
-+ */
-+#define xqspips_read(addr)		readl(addr)
-+#define xqspips_write(addr, val)	writel((val), (addr))
-+
-+/**
-+ * struct xqspips - Defines qspi driver instance
-+ * @workqueue:		Queue of all the transfers
-+ * @work:		Information about current transfer
-+ * @queue:		Head of the queue
-+ * @queue_state:	Queue status
-+ * @regs:		Virtual address of the QSPI controller registers
-+ * @devclk:		Pointer to the peripheral clock
-+ * @aperclk:		Pointer to the APER clock
-+ * @clk_rate_change_nb:	Notifier block for clock frequency change callback
-+ * @irq:		IRQ number
-+ * @speed_hz:		Current QSPI bus clock speed in Hz
-+ * @trans_queue_lock:	Lock used for accessing transfer queue
-+ * @config_reg_lock:	Lock used for accessing configuration register
-+ * @txbuf:		Pointer	to the TX buffer
-+ * @rxbuf:		Pointer to the RX buffer
-+ * @bytes_to_transfer:	Number of bytes left to transfer
-+ * @bytes_to_receive:	Number of bytes left to receive
-+ * @dev_busy:		Device busy flag
-+ * @done:		Transfer complete status
-+ * @is_inst:		Flag to indicate the first message in a Transfer request
-+ * @is_dual:		Flag to indicate whether dual flash memories are used
-+ */
-+struct xqspips {
-+	struct workqueue_struct *workqueue;
-+	struct work_struct work;
-+	struct list_head queue;
-+	u8 queue_state;
-+	void __iomem *regs;
-+	struct clk *devclk;
-+	struct clk *aperclk;
-+	struct notifier_block clk_rate_change_nb;
-+	int irq;
-+	u32 speed_hz;
-+	spinlock_t trans_queue_lock;
-+	spinlock_t config_reg_lock;
-+	const void *txbuf;
-+	void *rxbuf;
-+	int bytes_to_transfer;
-+	int bytes_to_receive;
-+	u8 dev_busy;
-+	struct completion done;
-+	bool is_inst;
-+	u32 is_dual;
-+};
-+
-+/**
-+ * struct xqspips_inst_format - Defines qspi flash instruction format
-+ * @opcode:		Operational code of instruction
-+ * @inst_size:		Size of the instruction including address bytes
-+ * @offset:		Register address where instruction has to be written
-+ */
-+struct xqspips_inst_format {
-+	u8 opcode;
-+	u8 inst_size;
-+	u8 offset;
-+};
-+
-+/*
-+ * List of all the QSPI instructions and its format
-+ */
-+static struct xqspips_inst_format flash_inst[] = {
-+	{ XQSPIPS_FLASH_OPCODE_WREN, 1, XQSPIPS_TXD_00_01_OFFSET },
-+	{ XQSPIPS_FLASH_OPCODE_WRDS, 1, XQSPIPS_TXD_00_01_OFFSET },
-+	{ XQSPIPS_FLASH_OPCODE_RDSR1, 1, XQSPIPS_TXD_00_01_OFFSET },
-+	{ XQSPIPS_FLASH_OPCODE_RDSR2, 1, XQSPIPS_TXD_00_01_OFFSET },
-+	{ XQSPIPS_FLASH_OPCODE_WRSR, 1, XQSPIPS_TXD_00_01_OFFSET },
-+	{ XQSPIPS_FLASH_OPCODE_RDFSR, 1, XQSPIPS_TXD_00_01_OFFSET },
-+	{ XQSPIPS_FLASH_OPCODE_PP, 4, XQSPIPS_TXD_00_00_OFFSET },
-+	{ XQSPIPS_FLASH_OPCODE_SE, 4, XQSPIPS_TXD_00_00_OFFSET },
-+	{ XQSPIPS_FLASH_OPCODE_BE_32K, 4, XQSPIPS_TXD_00_00_OFFSET },
-+	{ XQSPIPS_FLASH_OPCODE_BE_4K, 4, XQSPIPS_TXD_00_00_OFFSET },
-+	{ XQSPIPS_FLASH_OPCODE_BE, 1, XQSPIPS_TXD_00_01_OFFSET },
-+	{ XQSPIPS_FLASH_OPCODE_ERASE_SUS, 1, XQSPIPS_TXD_00_01_OFFSET },
-+	{ XQSPIPS_FLASH_OPCODE_ERASE_RES, 1, XQSPIPS_TXD_00_01_OFFSET },
-+	{ XQSPIPS_FLASH_OPCODE_RDID, 1, XQSPIPS_TXD_00_01_OFFSET },
-+	{ XQSPIPS_FLASH_OPCODE_NORM_READ, 4, XQSPIPS_TXD_00_00_OFFSET },
-+	{ XQSPIPS_FLASH_OPCODE_FAST_READ, 1, XQSPIPS_TXD_00_01_OFFSET },
-+	{ XQSPIPS_FLASH_OPCODE_DUAL_READ, 1, XQSPIPS_TXD_00_01_OFFSET },
-+	{ XQSPIPS_FLASH_OPCODE_QUAD_READ, 1, XQSPIPS_TXD_00_01_OFFSET },
-+	{ XQSPIPS_FLASH_OPCODE_BRRD, 1, XQSPIPS_TXD_00_01_OFFSET },
-+	{ XQSPIPS_FLASH_OPCODE_BRWR, 2, XQSPIPS_TXD_00_10_OFFSET },
-+	{ XQSPIPS_FLASH_OPCODE_EXTADRD, 1, XQSPIPS_TXD_00_01_OFFSET },
-+	{ XQSPIPS_FLASH_OPCODE_EXTADWR, 2, XQSPIPS_TXD_00_10_OFFSET },
-+	{ XQSPIPS_FLASH_OPCODE_QPP, 4, XQSPIPS_TXD_00_00_OFFSET },
-+	/* Add all the instructions supported by the flash device */
-+};
-+
-+/**
-+ * xqspips_init_hw - Initialize the hardware
-+ * @regs_base:	Base address of QSPI controller
-+ * @is_dual:	Indicates whether dual memories are used
-+ *
-+ * The default settings of the QSPI controller's configurable parameters on
-+ * reset are
-+ *	- Master mode
-+ *	- Baud rate divisor is set to 2
-+ *	- Threshold value for TX FIFO not full interrupt is set to 1
-+ *	- Flash memory interface mode enabled
-+ *	- Size of the word to be transferred as 8 bit
-+ * This function performs the following actions
-+ *	- Disable and clear all the interrupts
-+ *	- Enable manual slave select
-+ *	- Enable manual start
-+ *	- Deselect all the chip select lines
-+ *	- Set the size of the word to be transferred as 32 bit
-+ *	- Set the little endian mode of TX FIFO and
-+ *	- Enable the QSPI controller
-+ */
-+static void xqspips_init_hw(void __iomem *regs_base, int is_dual)
-+{
-+	u32 config_reg;
-+
-+	xqspips_write(regs_base + XQSPIPS_ENABLE_OFFSET,
-+		~XQSPIPS_ENABLE_ENABLE_MASK);
-+	xqspips_write(regs_base + XQSPIPS_IDIS_OFFSET, 0x7F);
-+
-+	/* Disable linear mode as the boot loader may have used it */
-+	xqspips_write(regs_base + XQSPIPS_LINEAR_CFG_OFFSET, 0);
-+
-+	/* Clear the RX FIFO */
-+	while (xqspips_read(regs_base + XQSPIPS_STATUS_OFFSET) &
-+			XQSPIPS_IXR_RXNEMTY_MASK)
-+		xqspips_read(regs_base + XQSPIPS_RXD_OFFSET);
-+
-+	xqspips_write(regs_base + XQSPIPS_STATUS_OFFSET , 0x7F);
-+	config_reg = xqspips_read(regs_base + XQSPIPS_CONFIG_OFFSET);
-+	config_reg &= 0xFBFFFFFF; /* Set little endian mode of TX FIFO */
-+	config_reg |= 0x8000FCC1;
-+	xqspips_write(regs_base + XQSPIPS_CONFIG_OFFSET, config_reg);
-+
-+	if (is_dual == 1)
-+		/* Enable two memories on seperate buses */
-+		xqspips_write(regs_base + XQSPIPS_LINEAR_CFG_OFFSET,
-+			(XQSPIPS_LCFG_TWO_MEM_MASK |
-+			 XQSPIPS_LCFG_SEP_BUS_MASK |
-+			 (1 << XQSPIPS_LCFG_DUMMY_SHIFT) |
-+			 XQSPIPS_FAST_READ_QOUT_CODE));
-+#ifdef CONFIG_SPI_XILINX_PS_QSPI_DUAL_STACKED
-+	/* Enable two memories on shared bus */
-+	xqspips_write(regs_base + XQSPIPS_LINEAR_CFG_OFFSET,
-+		 (XQSPIPS_LCFG_TWO_MEM_MASK |
-+		 (1 << XQSPIPS_LCFG_DUMMY_SHIFT) |
-+		 XQSPIPS_FAST_READ_QOUT_CODE));
-+#endif
-+	xqspips_write(regs_base + XQSPIPS_ENABLE_OFFSET,
-+			XQSPIPS_ENABLE_ENABLE_MASK);
-+}
-+
-+/**
-+ * xqspips_copy_read_data - Copy data to RX buffer
-+ * @xqspi:	Pointer to the xqspips structure
-+ * @data:	The 32 bit variable where data is stored
-+ * @size:	Number of bytes to be copied from data to RX buffer
-+ */
-+static void xqspips_copy_read_data(struct xqspips *xqspi, u32 data, u8 size)
-+{
-+	if (xqspi->rxbuf) {
-+		data >>= (4 - size) * 8;
-+		data = le32_to_cpu(data);
-+		memcpy((u8 *)xqspi->rxbuf, &data, size);
-+		xqspi->rxbuf += size;
-+	}
-+	xqspi->bytes_to_receive -= size;
-+	if (xqspi->bytes_to_receive < 0)
-+		xqspi->bytes_to_receive = 0;
-+}
-+
-+/**
-+ * xqspips_copy_write_data - Copy data from TX buffer
-+ * @xqspi:	Pointer to the xqspips structure
-+ * @data:	Pointer to the 32 bit variable where data is to be copied
-+ * @size:	Number of bytes to be copied from TX buffer to data
-+ */
-+static void xqspips_copy_write_data(struct xqspips *xqspi, u32 *data, u8 size)
-+{
-+
-+	if (xqspi->txbuf) {
-+		switch (size) {
-+		case 1:
-+			*data = *((u8 *)xqspi->txbuf);
-+			xqspi->txbuf += 1;
-+			*data |= 0xFFFFFF00;
-+			break;
-+		case 2:
-+			*data = *((u16 *)xqspi->txbuf);
-+			xqspi->txbuf += 2;
-+			*data |= 0xFFFF0000;
-+			break;
-+		case 3:
-+			*data = *((u16 *)xqspi->txbuf);
-+			xqspi->txbuf += 2;
-+			*data |= (*((u8 *)xqspi->txbuf) << 16);
-+			xqspi->txbuf += 1;
-+			*data |= 0xFF000000;
-+			break;
-+		case 4:
-+			*data = *((u32 *)xqspi->txbuf);
-+			xqspi->txbuf += 4;
-+			break;
-+		default:
-+			/* This will never execute */
-+			break;
-+		}
-+	} else {
-+		*data = 0;
-+	}
-+
-+	xqspi->bytes_to_transfer -= size;
-+	if (xqspi->bytes_to_transfer < 0)
-+		xqspi->bytes_to_transfer = 0;
-+}
-+
-+/**
-+ * xqspips_chipselect - Select or deselect the chip select line
-+ * @qspi:	Pointer to the spi_device structure
-+ * @is_on:	Select(1) or deselect (0) the chip select line
-+ */
-+static void xqspips_chipselect(struct spi_device *qspi, int is_on)
-+{
-+	struct xqspips *xqspi = spi_master_get_devdata(qspi->master);
-+	u32 config_reg;
-+	unsigned long flags;
-+
-+	spin_lock_irqsave(&xqspi->config_reg_lock, flags);
-+
-+	config_reg = xqspips_read(xqspi->regs + XQSPIPS_CONFIG_OFFSET);
-+
-+	if (is_on) {
-+		/* Select the slave */
-+		config_reg &= ~XQSPIPS_CONFIG_SSCTRL_MASK;
-+		config_reg |= (((~(0x0001 << qspi->chip_select)) << 10) &
-+				XQSPIPS_CONFIG_SSCTRL_MASK);
-+	} else {
-+		/* Deselect the slave */
-+		config_reg |= XQSPIPS_CONFIG_SSCTRL_MASK;
-+	}
-+
-+	xqspips_write(xqspi->regs + XQSPIPS_CONFIG_OFFSET, config_reg);
-+
-+	spin_unlock_irqrestore(&xqspi->config_reg_lock, flags);
-+}
-+
-+/**
-+ * xqspips_setup_transfer - Configure QSPI controller for specified transfer
-+ * @qspi:	Pointer to the spi_device structure
-+ * @transfer:	Pointer to the spi_transfer structure which provides information
-+ *		about next transfer setup parameters
-+ *
-+ * Sets the operational mode of QSPI controller for the next QSPI transfer and
-+ * sets the requested clock frequency.
-+ *
-+ * returns:	0 on success and -EINVAL on invalid input parameter
-+ *
-+ * Note: If the requested frequency is not an exact match with what can be
-+ * obtained using the prescalar value, the driver sets the clock frequency which
-+ * is lower than the requested frequency (maximum lower) for the transfer. If
-+ * the requested frequency is higher or lower than that is supported by the QSPI
-+ * controller the driver will set the highest or lowest frequency supported by
-+ * controller.
-+ */
-+static int xqspips_setup_transfer(struct spi_device *qspi,
-+		struct spi_transfer *transfer)
-+{
-+	struct xqspips *xqspi = spi_master_get_devdata(qspi->master);
-+	u32 config_reg;
-+	u32 req_hz;
-+	u32 baud_rate_val = 0;
-+	unsigned long flags;
-+	int update_baud = 0;
-+
-+	req_hz = (transfer) ? transfer->speed_hz : qspi->max_speed_hz;
-+
-+	if (qspi->mode & ~MODEBITS) {
-+		dev_err(&qspi->dev, "%s, unsupported mode bits %x\n",
-+			__func__, qspi->mode & ~MODEBITS);
-+		return -EINVAL;
-+	}
-+
-+	if (transfer && (transfer->speed_hz == 0))
-+		req_hz = qspi->max_speed_hz;
-+
-+	/* Set the clock frequency */
-+	if (xqspi->speed_hz != req_hz) {
-+		while ((baud_rate_val < 8)  &&
-+			(clk_get_rate(xqspi->devclk) / (2 << baud_rate_val)) >
-+			req_hz)
-+				baud_rate_val++;
-+		xqspi->speed_hz = req_hz;
-+		update_baud = 1;
-+	}
-+
-+	spin_lock_irqsave(&xqspi->config_reg_lock, flags);
-+
-+	config_reg = xqspips_read(xqspi->regs + XQSPIPS_CONFIG_OFFSET);
-+
-+	/* Set the QSPI clock phase and clock polarity */
-+	config_reg &= (~XQSPIPS_CONFIG_CPHA_MASK) &
-+				(~XQSPIPS_CONFIG_CPOL_MASK);
-+	if (qspi->mode & SPI_CPHA)
-+		config_reg |= XQSPIPS_CONFIG_CPHA_MASK;
-+	if (qspi->mode & SPI_CPOL)
-+		config_reg |= XQSPIPS_CONFIG_CPOL_MASK;
-+
-+	if (update_baud) {
-+		config_reg &= 0xFFFFFFC7;
-+		config_reg |= (baud_rate_val << 3);
-+	}
-+
-+	xqspips_write(xqspi->regs + XQSPIPS_CONFIG_OFFSET, config_reg);
-+
-+	spin_unlock_irqrestore(&xqspi->config_reg_lock, flags);
-+
-+	dev_dbg(&qspi->dev, "%s, mode %d, %u bits/w, %u clock speed\n",
-+		__func__, qspi->mode & MODEBITS, qspi->bits_per_word,
-+		xqspi->speed_hz);
-+
-+	return 0;
-+}
-+
-+/**
-+ * xqspips_setup - Configure the QSPI controller
-+ * @qspi:	Pointer to the spi_device structure
-+ *
-+ * Sets the operational mode of QSPI controller for the next QSPI transfer, baud
-+ * rate and divisor value to setup the requested qspi clock.
-+ *
-+ * returns:	0 on success and error value on failure
-+ */
-+static int xqspips_setup(struct spi_device *qspi)
-+{
-+
-+	if (qspi->mode & SPI_LSB_FIRST)
-+		return -EINVAL;
-+
-+	if (!qspi->max_speed_hz)
-+		return -EINVAL;
-+
-+	if (!qspi->bits_per_word)
-+		qspi->bits_per_word = 32;
-+
-+	return xqspips_setup_transfer(qspi, NULL);
-+}
-+
-+/**
-+ * xqspips_fill_tx_fifo - Fills the TX FIFO with as many bytes as possible
-+ * @xqspi:	Pointer to the xqspips structure
-+ */
-+static void xqspips_fill_tx_fifo(struct xqspips *xqspi)
-+{
-+	u32 data = 0;
-+
-+	while ((!(xqspips_read(xqspi->regs + XQSPIPS_STATUS_OFFSET) &
-+		XQSPIPS_IXR_TXFULL_MASK)) && (xqspi->bytes_to_transfer >= 4)) {
-+		xqspips_copy_write_data(xqspi, &data, 4);
-+		xqspips_write(xqspi->regs + XQSPIPS_TXD_00_00_OFFSET, data);
-+	}
-+}
-+
-+/**
-+ * xqspips_irq - Interrupt service routine of the QSPI controller
-+ * @irq:	IRQ number
-+ * @dev_id:	Pointer to the xqspi structure
-+ *
-+ * This function handles TX empty only.
-+ * On TX empty interrupt this function reads the received data from RX FIFO and
-+ * fills the TX FIFO if there is any data remaining to be transferred.
-+ *
-+ * returns:	IRQ_HANDLED always
-+ */
-+static irqreturn_t xqspips_irq(int irq, void *dev_id)
-+{
-+	struct xqspips *xqspi = dev_id;
-+	u32 intr_status;
-+	u8 offset[3] =	{XQSPIPS_TXD_00_01_OFFSET, XQSPIPS_TXD_00_10_OFFSET,
-+		XQSPIPS_TXD_00_11_OFFSET};
-+
-+	intr_status = xqspips_read(xqspi->regs + XQSPIPS_STATUS_OFFSET);
-+	xqspips_write(xqspi->regs + XQSPIPS_STATUS_OFFSET , intr_status);
-+	xqspips_write(xqspi->regs + XQSPIPS_IDIS_OFFSET,
-+			XQSPIPS_IXR_ALL_MASK);
-+
-+	if ((intr_status & XQSPIPS_IXR_TXNFULL_MASK) ||
-+		   (intr_status & XQSPIPS_IXR_RXNEMTY_MASK)) {
-+		/* This bit is set when Tx FIFO has < THRESHOLD entries. We have
-+		   the THRESHOLD value set to 1, so this bit indicates Tx FIFO
-+		   is empty */
-+		u32 config_reg;
-+		u32 data;
-+
-+		/* Read out the data from the RX FIFO */
-+		while (xqspips_read(xqspi->regs + XQSPIPS_STATUS_OFFSET) &
-+			XQSPIPS_IXR_RXNEMTY_MASK) {
-+
-+			data = xqspips_read(xqspi->regs + XQSPIPS_RXD_OFFSET);
-+
-+			if (xqspi->bytes_to_receive < 4 && !xqspi->is_dual)
-+				xqspips_copy_read_data(xqspi, data,
-+					xqspi->bytes_to_receive);
-+			else
-+				xqspips_copy_read_data(xqspi, data, 4);
-+		}
-+
-+		if (xqspi->bytes_to_transfer) {
-+			if (xqspi->bytes_to_transfer >= 4) {
-+				/* There is more data to send */
-+				xqspips_fill_tx_fifo(xqspi);
-+			} else {
-+				int tmp;
-+				tmp = xqspi->bytes_to_transfer;
-+				xqspips_copy_write_data(xqspi, &data,
-+					xqspi->bytes_to_transfer);
-+				if (xqspi->is_dual)
-+					xqspips_write(xqspi->regs +
-+						XQSPIPS_TXD_00_00_OFFSET, data);
-+				else
-+					xqspips_write(xqspi->regs +
-+						offset[tmp - 1], data);
-+			}
-+			xqspips_write(xqspi->regs + XQSPIPS_IEN_OFFSET,
-+					XQSPIPS_IXR_ALL_MASK);
-+
-+			spin_lock(&xqspi->config_reg_lock);
-+			config_reg = xqspips_read(xqspi->regs +
-+						XQSPIPS_CONFIG_OFFSET);
-+
-+			config_reg |= XQSPIPS_CONFIG_MANSRT_MASK;
-+			xqspips_write(xqspi->regs + XQSPIPS_CONFIG_OFFSET,
-+				config_reg);
-+			spin_unlock(&xqspi->config_reg_lock);
-+		} else {
-+			/* If transfer and receive is completed then only send
-+			 * complete signal */
-+			if (xqspi->bytes_to_receive) {
-+				/* There is still some data to be received.
-+				   Enable Rx not empty interrupt */
-+				xqspips_write(xqspi->regs + XQSPIPS_IEN_OFFSET,
-+						XQSPIPS_IXR_RXNEMTY_MASK);
-+			} else {
-+				xqspips_write(xqspi->regs + XQSPIPS_IDIS_OFFSET,
-+						XQSPIPS_IXR_RXNEMTY_MASK);
-+				complete(&xqspi->done);
-+			}
-+		}
-+	}
-+
-+	return IRQ_HANDLED;
-+}
-+
-+/**
-+ * xqspips_start_transfer - Initiates the QSPI transfer
-+ * @qspi:	Pointer to the spi_device structure
-+ * @transfer:	Pointer to the spi_transfer structure which provide information
-+ *		about next transfer parameters
-+ *
-+ * This function fills the TX FIFO, starts the QSPI transfer, and waits for the
-+ * transfer to be completed.
-+ *
-+ * returns:	Number of bytes transferred in the last transfer
-+ */
-+static int xqspips_start_transfer(struct spi_device *qspi,
-+			struct spi_transfer *transfer)
-+{
-+	struct xqspips *xqspi = spi_master_get_devdata(qspi->master);
-+	u32 config_reg;
-+	unsigned long flags;
-+	u32 data = 0;
-+	u8 instruction = 0;
-+	u8 index;
-+	struct xqspips_inst_format *curr_inst;
-+
-+	xqspi->txbuf = transfer->tx_buf;
-+	xqspi->rxbuf = transfer->rx_buf;
-+	xqspi->bytes_to_transfer = transfer->len;
-+	xqspi->bytes_to_receive = transfer->len;
-+
-+	if (xqspi->txbuf)
-+		instruction = *(u8 *)xqspi->txbuf;
-+
-+	INIT_COMPLETION(xqspi->done);
-+	if (instruction && xqspi->is_inst) {
-+		for (index = 0; index < ARRAY_SIZE(flash_inst); index++)
-+			if (instruction == flash_inst[index].opcode)
-+				break;
-+
-+		/* Instruction might have already been transmitted. This is a
-+		 * 'data only' transfer */
-+		if (index == ARRAY_SIZE(flash_inst))
-+			goto xfer_data;
-+
-+		curr_inst = &flash_inst[index];
-+
-+		/* Get the instruction */
-+		data = 0;
-+		xqspips_copy_write_data(xqspi, &data,
-+					curr_inst->inst_size);
-+
-+		/* Write the instruction to LSB of the FIFO. The core is
-+		 * designed such that it is not necessary to check whether the
-+		 * write FIFO is full before writing. However, write would be
-+		 * delayed if the user tries to write when write FIFO is full
-+		 */
-+		xqspips_write(xqspi->regs + curr_inst->offset, data);
-+		goto xfer_start;
-+	}
-+
-+xfer_data:
-+	/* In case of Fast, Dual and Quad reads, transmit the instruction first.
-+	 * Address and dummy byte will be transmitted in interrupt handler,
-+	 * after instruction is transmitted */
-+	if (((xqspi->is_inst == 0) && (xqspi->bytes_to_transfer >= 4)) ||
-+	     ((xqspi->bytes_to_transfer >= 4) &&
-+	      (instruction != XQSPIPS_FLASH_OPCODE_FAST_READ) &&
-+	      (instruction != XQSPIPS_FLASH_OPCODE_DUAL_READ) &&
-+	      (instruction != XQSPIPS_FLASH_OPCODE_QUAD_READ)))
-+		xqspips_fill_tx_fifo(xqspi);
-+
-+xfer_start:
-+	xqspips_write(xqspi->regs + XQSPIPS_IEN_OFFSET,
-+			XQSPIPS_IXR_ALL_MASK);
-+	/* Start the transfer by enabling manual start bit */
-+	spin_lock_irqsave(&xqspi->config_reg_lock, flags);
-+	config_reg = xqspips_read(xqspi->regs +
-+			XQSPIPS_CONFIG_OFFSET) | XQSPIPS_CONFIG_MANSRT_MASK;
-+	xqspips_write(xqspi->regs + XQSPIPS_CONFIG_OFFSET, config_reg);
-+	spin_unlock_irqrestore(&xqspi->config_reg_lock, flags);
-+
-+	wait_for_completion(&xqspi->done);
-+
-+	return (transfer->len) - (xqspi->bytes_to_transfer);
-+}
-+
-+/**
-+ * xqspips_work_queue - Get the request from queue to perform transfers
-+ * @work:	Pointer to the work_struct structure
-+ */
-+static void xqspips_work_queue(struct work_struct *work)
-+{
-+	struct xqspips *xqspi = container_of(work, struct xqspips, work);
-+	unsigned long flags;
-+#ifdef CONFIG_SPI_XILINX_PS_QSPI_DUAL_STACKED
-+	u32 lqspi_cfg_reg;
-+#endif
-+
-+	spin_lock_irqsave(&xqspi->trans_queue_lock, flags);
-+	xqspi->dev_busy = 1;
-+
-+	/* Check if list is empty or queue is stoped */
-+	if (list_empty(&xqspi->queue) ||
-+		xqspi->queue_state == XQSPIPS_QUEUE_STOPPED) {
-+		xqspi->dev_busy = 0;
-+		spin_unlock_irqrestore(&xqspi->trans_queue_lock, flags);
-+		return;
-+	}
-+
-+	/* Keep requesting transfer till list is empty */
-+	while (!list_empty(&xqspi->queue)) {
-+		struct spi_message *msg;
-+		struct spi_device *qspi;
-+		struct spi_transfer *transfer = NULL;
-+		unsigned cs_change = 1;
-+		int status = 0;
-+
-+		msg = container_of(xqspi->queue.next, struct spi_message,
-+					queue);
-+		list_del_init(&msg->queue);
-+		spin_unlock_irqrestore(&xqspi->trans_queue_lock, flags);
-+		qspi = msg->spi;
-+
-+#ifdef CONFIG_SPI_XILINX_PS_QSPI_DUAL_STACKED
-+		lqspi_cfg_reg = xqspips_read(xqspi->regs +
-+					XQSPIPS_LINEAR_CFG_OFFSET);
-+		if (qspi->master->flags & SPI_MASTER_U_PAGE)
-+			lqspi_cfg_reg |= XQSPIPS_LCFG_U_PAGE_MASK;
-+		else
-+			lqspi_cfg_reg &= ~XQSPIPS_LCFG_U_PAGE_MASK;
-+		xqspips_write(xqspi->regs + XQSPIPS_LINEAR_CFG_OFFSET,
-+			      lqspi_cfg_reg);
-+#endif
-+
-+		list_for_each_entry(transfer, &msg->transfers, transfer_list) {
-+			if (transfer->bits_per_word || transfer->speed_hz) {
-+				status = xqspips_setup_transfer(qspi, transfer);
-+				if (status < 0)
-+					break;
-+			}
-+
-+			/* Select the chip if required */
-+			if (cs_change) {
-+				xqspips_chipselect(qspi, 1);
-+				xqspi->is_inst = 1;
-+			}
-+
-+			cs_change = transfer->cs_change;
-+
-+			if (!transfer->tx_buf && !transfer->rx_buf &&
-+				transfer->len) {
-+				status = -EINVAL;
-+				break;
-+			}
-+
-+			/* Request the transfer */
-+			if (transfer->len) {
-+				status = xqspips_start_transfer(qspi, transfer);
-+				xqspi->is_inst = 0;
-+			}
-+
-+			if (status != transfer->len) {
-+				if (status > 0)
-+					status = -EMSGSIZE;
-+				break;
-+			}
-+			msg->actual_length += status;
-+			status = 0;
-+
-+			if (transfer->delay_usecs)
-+				udelay(transfer->delay_usecs);
-+
-+			if (cs_change)
-+				/* Deselect the chip */
-+				xqspips_chipselect(qspi, 0);
-+
-+			if (transfer->transfer_list.next == &msg->transfers)
-+				break;
-+		}
-+
-+		msg->status = status;
-+		msg->complete(msg->context);
-+
-+		xqspips_setup_transfer(qspi, NULL);
-+
-+		if (!(status == 0 && cs_change))
-+			xqspips_chipselect(qspi, 0);
-+
-+		spin_lock_irqsave(&xqspi->trans_queue_lock, flags);
-+	}
-+	xqspi->dev_busy = 0;
-+	spin_unlock_irqrestore(&xqspi->trans_queue_lock, flags);
-+}
-+
-+/**
-+ * xqspips_transfer - Add a new transfer request at the tail of work queue
-+ * @qspi:	Pointer to the spi_device structure
-+ * @message:	Pointer to the spi_transfer structure which provides information
-+ *		about next transfer parameters
-+ *
-+ * returns:	0 on success, -EINVAL on invalid input parameter and
-+ *		-ESHUTDOWN if queue is stopped by module unload function
-+ */
-+static int xqspips_transfer(struct spi_device *qspi,
-+			    struct spi_message *message)
-+{
-+	struct xqspips *xqspi = spi_master_get_devdata(qspi->master);
-+	struct spi_transfer *transfer;
-+	unsigned long flags;
-+
-+	if (xqspi->queue_state == XQSPIPS_QUEUE_STOPPED)
-+		return -ESHUTDOWN;
-+
-+	message->actual_length = 0;
-+	message->status = -EINPROGRESS;
-+
-+	/* Check each transfer's parameters */
-+	list_for_each_entry(transfer, &message->transfers, transfer_list) {
-+		if (!transfer->tx_buf && !transfer->rx_buf && transfer->len)
-+			return -EINVAL;
-+		/* QSPI controller supports only 32 bit transfers whereas higher
-+		 * layer drivers request 8 bit transfers. Re-visit at a later
-+		 * time */
-+		/* if (bits_per_word != 32)
-+			return -EINVAL; */
-+	}
-+
-+	spin_lock_irqsave(&xqspi->trans_queue_lock, flags);
-+	list_add_tail(&message->queue, &xqspi->queue);
-+	if (!xqspi->dev_busy)
-+		queue_work(xqspi->workqueue, &xqspi->work);
-+	spin_unlock_irqrestore(&xqspi->trans_queue_lock, flags);
-+
-+	return 0;
-+}
-+
-+/**
-+ * xqspips_start_queue - Starts the queue of the QSPI driver
-+ * @xqspi:	Pointer to the xqspips structure
-+ *
-+ * returns:	0 on success and -EBUSY if queue is already running or device is
-+ *		busy
-+ */
-+static inline int xqspips_start_queue(struct xqspips *xqspi)
-+{
-+	unsigned long flags;
-+
-+	spin_lock_irqsave(&xqspi->trans_queue_lock, flags);
-+
-+	if (xqspi->queue_state == XQSPIPS_QUEUE_RUNNING || xqspi->dev_busy) {
-+		spin_unlock_irqrestore(&xqspi->trans_queue_lock, flags);
-+		return -EBUSY;
-+	}
-+
-+	xqspi->queue_state = XQSPIPS_QUEUE_RUNNING;
-+	spin_unlock_irqrestore(&xqspi->trans_queue_lock, flags);
-+
-+	return 0;
-+}
-+
-+/**
-+ * xqspips_stop_queue - Stops the queue of the QSPI driver
-+ * @xqspi:	Pointer to the xqspips structure
-+ *
-+ * This function waits till queue is empty and then stops the queue.
-+ * Maximum time out is set to 5 seconds.
-+ *
-+ * returns:	0 on success and -EBUSY if queue is not empty or device is busy
-+ */
-+static inline int xqspips_stop_queue(struct xqspips *xqspi)
-+{
-+	unsigned long flags;
-+	unsigned limit = 500;
-+	int ret = 0;
-+
-+	if (xqspi->queue_state != XQSPIPS_QUEUE_RUNNING)
-+		return ret;
-+
-+	spin_lock_irqsave(&xqspi->trans_queue_lock, flags);
-+
-+	while ((!list_empty(&xqspi->queue) || xqspi->dev_busy) && limit--) {
-+		spin_unlock_irqrestore(&xqspi->trans_queue_lock, flags);
-+		msleep(10);
-+		spin_lock_irqsave(&xqspi->trans_queue_lock, flags);
-+	}
-+
-+	if (!list_empty(&xqspi->queue) || xqspi->dev_busy)
-+		ret = -EBUSY;
-+
-+	if (ret == 0)
-+		xqspi->queue_state = XQSPIPS_QUEUE_STOPPED;
-+
-+	spin_unlock_irqrestore(&xqspi->trans_queue_lock, flags);
-+
-+	return ret;
-+}
-+
-+/**
-+ * xqspips_destroy_queue - Destroys the queue of the QSPI driver
-+ * @xqspi:	Pointer to the xqspips structure
-+ *
-+ * returns:	0 on success and error value on failure
-+ */
-+static inline int xqspips_destroy_queue(struct xqspips *xqspi)
-+{
-+	int ret;
-+
-+	ret = xqspips_stop_queue(xqspi);
-+	if (ret != 0)
-+		return ret;
-+
-+	destroy_workqueue(xqspi->workqueue);
-+
-+	return 0;
-+}
-+
-+static int xqspips_clk_notifier_cb(struct notifier_block *nb,
-+		unsigned long event, void *data)
-+{
-+	switch (event) {
-+	case PRE_RATE_CHANGE:
-+		/* if a rate change is announced we need to check whether we can
-+		 * maintain the current frequency by changing the clock
-+		 * dividers. And we may have to suspend operation and return
-+		 * after the rate change or its abort
-+		 */
-+		return NOTIFY_OK;
-+	case POST_RATE_CHANGE:
-+		return NOTIFY_OK;
-+	case ABORT_RATE_CHANGE:
-+	default:
-+		return NOTIFY_DONE;
-+	}
-+}
-+
-+#ifdef CONFIG_PM_SLEEP
-+/**
-+ * xqspips_suspend - Suspend method for the QSPI driver
-+ * @_dev:	Address of the platform_device structure
-+ *
-+ * This function stops the QSPI driver queue and disables the QSPI controller
-+ *
-+ * returns:	0 on success and error value on error
-+ */
-+static int xqspips_suspend(struct device *_dev)
-+{
-+	struct platform_device *pdev = container_of(_dev,
-+			struct platform_device, dev);
-+	struct spi_master *master = platform_get_drvdata(pdev);
-+	struct xqspips *xqspi = spi_master_get_devdata(master);
-+	int ret = 0;
-+
-+	ret = xqspips_stop_queue(xqspi);
-+	if (ret != 0)
-+		return ret;
-+
-+	xqspips_write(xqspi->regs + XQSPIPS_ENABLE_OFFSET,
-+			~XQSPIPS_ENABLE_ENABLE_MASK);
-+
-+	clk_disable(xqspi->devclk);
-+	clk_disable(xqspi->aperclk);
-+
-+	dev_dbg(&pdev->dev, "suspend succeeded\n");
-+	return 0;
-+}
-+
-+/**
-+ * xqspips_resume - Resume method for the QSPI driver
-+ * @dev:	Address of the platform_device structure
-+ *
-+ * The function starts the QSPI driver queue and initializes the QSPI controller
-+ *
-+ * returns:	0 on success and error value on error
-+ */
-+static int xqspips_resume(struct device *dev)
-+{
-+	struct platform_device *pdev = container_of(dev,
-+			struct platform_device, dev);
-+	struct spi_master *master = platform_get_drvdata(pdev);
-+	struct xqspips *xqspi = spi_master_get_devdata(master);
-+	int ret = 0;
-+
-+	ret = clk_enable(xqspi->aperclk);
-+	if (ret) {
-+		dev_err(dev, "Cannot enable APER clock.\n");
-+		return ret;
-+	}
-+
-+	ret = clk_enable(xqspi->devclk);
-+	if (ret) {
-+		dev_err(dev, "Cannot enable device clock.\n");
-+		clk_disable(xqspi->aperclk);
-+		return ret;
-+	}
-+
-+	xqspips_init_hw(xqspi->regs, xqspi->is_dual);
-+
-+	ret = xqspips_start_queue(xqspi);
-+	if (ret != 0) {
-+		dev_err(&pdev->dev, "problem starting queue (%d)\n", ret);
-+		return ret;
-+	}
-+
-+	dev_dbg(&pdev->dev, "resume succeeded\n");
-+	return 0;
-+}
-+#endif /* ! CONFIG_PM_SLEEP */
-+
-+static SIMPLE_DEV_PM_OPS(xqspips_dev_pm_ops, xqspips_suspend, xqspips_resume);
-+
-+/**
-+ * xqspips_probe - Probe method for the QSPI driver
-+ * @pdev:	Pointer to the platform_device structure
-+ *
-+ * This function initializes the driver data structures and the hardware.
-+ *
-+ * returns:	0 on success and error value on failure
-+ */
-+static int xqspips_probe(struct platform_device *pdev)
-+{
-+	int ret = 0;
-+	struct spi_master *master;
-+	struct xqspips *xqspi;
-+	struct resource *res;
-+
-+	master = spi_alloc_master(&pdev->dev, sizeof(*xqspi));
-+	if (master == NULL)
-+		return -ENOMEM;
-+
-+	xqspi = spi_master_get_devdata(master);
-+	master->dev.of_node = pdev->dev.of_node;
-+	platform_set_drvdata(pdev, master);
-+
-+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+	xqspi->regs = devm_ioremap_resource(&pdev->dev, res);
-+	if (IS_ERR(xqspi->regs)) {
-+		ret = PTR_ERR(xqspi->regs);
-+		dev_err(&pdev->dev, "ioremap failed\n");
-+		goto remove_master;
-+	}
-+
-+	xqspi->irq = platform_get_irq(pdev, 0);
-+	if (xqspi->irq < 0) {
-+		ret = -ENXIO;
-+		dev_err(&pdev->dev, "irq resource not found\n");
-+		goto remove_master;
-+	}
-+	ret = devm_request_irq(&pdev->dev, xqspi->irq, xqspips_irq,
-+			       0, pdev->name, xqspi);
-+	if (ret != 0) {
-+		ret = -ENXIO;
-+		dev_err(&pdev->dev, "request_irq failed\n");
-+		goto remove_master;
-+	}
-+
-+	if (of_property_read_u32(pdev->dev.of_node, "is-dual", &xqspi->is_dual))
-+		dev_warn(&pdev->dev, "couldn't determine configuration info "
-+			 "about dual memories. defaulting to single memory\n");
-+
-+	xqspi->aperclk = clk_get(&pdev->dev, "aper_clk");
-+	if (IS_ERR(xqspi->aperclk)) {
-+		dev_err(&pdev->dev, "aper_clk clock not found.\n");
-+		ret = PTR_ERR(xqspi->aperclk);
-+		goto remove_master;
-+	}
-+
-+	xqspi->devclk = clk_get(&pdev->dev, "ref_clk");
-+	if (IS_ERR(xqspi->devclk)) {
-+		dev_err(&pdev->dev, "ref_clk clock not found.\n");
-+		ret = PTR_ERR(xqspi->devclk);
-+		goto clk_put_aper;
-+	}
-+
-+	ret = clk_prepare_enable(xqspi->aperclk);
-+	if (ret) {
-+		dev_err(&pdev->dev, "Unable to enable APER clock.\n");
-+		goto clk_put;
-+	}
-+
-+	ret = clk_prepare_enable(xqspi->devclk);
-+	if (ret) {
-+		dev_err(&pdev->dev, "Unable to enable device clock.\n");
-+		goto clk_dis_aper;
-+	}
-+
-+	xqspi->clk_rate_change_nb.notifier_call = xqspips_clk_notifier_cb;
-+	xqspi->clk_rate_change_nb.next = NULL;
-+	if (clk_notifier_register(xqspi->devclk, &xqspi->clk_rate_change_nb))
-+		dev_warn(&pdev->dev, "Unable to register clock notifier.\n");
-+
-+
-+	/* QSPI controller initializations */
-+	xqspips_init_hw(xqspi->regs, xqspi->is_dual);
-+
-+	init_completion(&xqspi->done);
-+
-+	ret = of_property_read_u32(pdev->dev.of_node, "num-chip-select",
-+				   (u32 *)&master->num_chipselect);
-+	if (ret < 0) {
-+		dev_err(&pdev->dev, "couldn't determine num-chip-select\n");
-+		goto clk_unreg_notif;
-+	}
-+
-+	master->setup = xqspips_setup;
-+	master->transfer = xqspips_transfer;
-+	master->flags = SPI_MASTER_QUAD_MODE;
-+
-+	xqspi->speed_hz = clk_get_rate(xqspi->devclk) / 2;
-+
-+	xqspi->dev_busy = 0;
-+
-+	INIT_LIST_HEAD(&xqspi->queue);
-+	spin_lock_init(&xqspi->trans_queue_lock);
-+	spin_lock_init(&xqspi->config_reg_lock);
-+
-+	xqspi->queue_state = XQSPIPS_QUEUE_STOPPED;
-+	xqspi->dev_busy = 0;
-+
-+	INIT_WORK(&xqspi->work, xqspips_work_queue);
-+	xqspi->workqueue =
-+		create_singlethread_workqueue(dev_name(&pdev->dev));
-+	if (!xqspi->workqueue) {
-+		ret = -ENOMEM;
-+		dev_err(&pdev->dev, "problem initializing queue\n");
-+		goto clk_unreg_notif;
-+	}
-+
-+	ret = xqspips_start_queue(xqspi);
-+	if (ret != 0) {
-+		dev_err(&pdev->dev, "problem starting queue\n");
-+		goto remove_queue;
-+	}
-+
-+	ret = spi_register_master(master);
-+	if (ret) {
-+		dev_err(&pdev->dev, "spi_register_master failed\n");
-+		goto remove_queue;
-+	}
-+
-+	dev_info(&pdev->dev, "at 0x%08X mapped to 0x%08X, irq=%d\n", res->start,
-+		 (u32 __force)xqspi->regs, xqspi->irq);
-+
-+	return ret;
-+
-+remove_queue:
-+	(void)xqspips_destroy_queue(xqspi);
-+clk_unreg_notif:
-+	clk_notifier_unregister(xqspi->devclk, &xqspi->clk_rate_change_nb);
-+	clk_disable_unprepare(xqspi->devclk);
-+clk_dis_aper:
-+	clk_disable_unprepare(xqspi->aperclk);
-+clk_put:
-+	clk_put(xqspi->devclk);
-+clk_put_aper:
-+	clk_put(xqspi->aperclk);
-+remove_master:
-+	spi_master_put(master);
-+	return ret;
-+}
-+
-+/**
-+ * xqspips_remove - Remove method for the QSPI driver
-+ * @pdev:	Pointer to the platform_device structure
-+ *
-+ * This function is called if a device is physically removed from the system or
-+ * if the driver module is being unloaded. It frees all resources allocated to
-+ * the device.
-+ *
-+ * returns:	0 on success and error value on failure
-+ */
-+static int xqspips_remove(struct platform_device *pdev)
-+{
-+	struct spi_master *master = platform_get_drvdata(pdev);
-+	struct xqspips *xqspi = spi_master_get_devdata(master);
-+	int ret = 0;
-+
-+	ret = xqspips_destroy_queue(xqspi);
-+	if (ret != 0)
-+		return ret;
-+
-+	xqspips_write(xqspi->regs + XQSPIPS_ENABLE_OFFSET,
-+			~XQSPIPS_ENABLE_ENABLE_MASK);
-+
-+	clk_notifier_unregister(xqspi->devclk, &xqspi->clk_rate_change_nb);
-+	clk_disable_unprepare(xqspi->devclk);
-+	clk_disable_unprepare(xqspi->aperclk);
-+	clk_put(xqspi->devclk);
-+	clk_put(xqspi->aperclk);
-+
-+
-+	spi_unregister_master(master);
-+	spi_master_put(master);
-+
-+
-+	dev_dbg(&pdev->dev, "remove succeeded\n");
-+	return 0;
-+}
-+
-+/* Work with hotplug and coldplug */
-+MODULE_ALIAS("platform:" DRIVER_NAME);
-+
-+static struct of_device_id xqspips_of_match[] = {
-+	{ .compatible = "xlnx,ps7-qspi-1.00.a", },
-+	{ /* end of table */}
-+};
-+MODULE_DEVICE_TABLE(of, xqspips_of_match);
-+
-+/*
-+ * xqspips_driver - This structure defines the QSPI platform driver
-+ */
-+static struct platform_driver xqspips_driver = {
-+	.probe	= xqspips_probe,
-+	.remove	= xqspips_remove,
-+	.driver = {
-+		.name = DRIVER_NAME,
-+		.owner = THIS_MODULE,
-+		.of_match_table = xqspips_of_match,
-+		.pm = &xqspips_dev_pm_ops,
-+	},
-+};
-+
-+module_platform_driver(xqspips_driver);
-+
-+MODULE_AUTHOR("Xilinx, Inc.");
-+MODULE_DESCRIPTION("Xilinx PS QSPI driver");
-+MODULE_LICENSE("GPL");
---- a/drivers/spi/spi-xilinx.c
-+++ b/drivers/spi/spi-xilinx.c
-@@ -82,7 +82,7 @@ struct xilinx_spi {
- 	struct completion done;
- 	void __iomem	*regs;	/* virt. address of the control registers */
- 
--	int		irq;
-+	int irq;
- 
- 	u8 *rx_ptr;		/* pointer in the Tx buffer */
- 	const u8 *tx_ptr;	/* pointer in the Rx buffer */
-@@ -232,6 +232,21 @@ static int xilinx_spi_setup_transfer(str
- 	return 0;
- }
- 
-+static int xilinx_spi_setup(struct spi_device *spi)
-+{
-+	/* always return 0, we can not check the number of bits.
-+	 * There are cases when SPI setup is called before any driver is
-+	 * there, in that case the SPI core defaults to 8 bits, which we
-+	 * do not support in some cases. But if we return an error, the
-+	 * SPI device would not be registered and no driver can get hold of it
-+	 * When the driver is there, it will call SPI setup again with the
-+	 * correct number of bits per transfer.
-+	 * If a driver setups with the wrong bit number, it will fail when
-+	 * it tries to do a transfer
-+	 */
-+	return 0;
-+}
-+
- static void xilinx_spi_fill_tx_fifo(struct xilinx_spi *xspi)
- {
- 	u8 sr;
-@@ -300,7 +315,7 @@ static int xilinx_spi_txrx_bufs(struct s
- 		}
- 
- 		/* See if there is more data to send */
--		if (xspi->remaining_bytes <= 0)
-+		if (!xspi->remaining_bytes > 0)
- 			break;
- 	}
- 
-@@ -349,7 +364,7 @@ static int xilinx_spi_probe(struct platf
- 	u32 tmp;
- 	u8 i;
- 
--	pdata = dev_get_platdata(&pdev->dev);
-+	pdata = pdev->dev.platform_data;
- 	if (pdata) {
- 		num_cs = pdata->num_chipselect;
- 		bits_per_word = pdata->bits_per_word;
-@@ -368,14 +383,18 @@ static int xilinx_spi_probe(struct platf
- 	if (!master)
- 		return -ENODEV;
- 
-+	/* clear the dma_mask, to try to disable use of dma */
-+	master->dev.dma_mask = 0;
-+
- 	/* the spi->mode bits understood by this driver: */
- 	master->mode_bits = SPI_CPOL | SPI_CPHA;
- 
- 	xspi = spi_master_get_devdata(master);
--	xspi->bitbang.master = master;
-+	xspi->bitbang.master = spi_master_get(master);
- 	xspi->bitbang.chipselect = xilinx_spi_chipselect;
- 	xspi->bitbang.setup_transfer = xilinx_spi_setup_transfer;
- 	xspi->bitbang.txrx_bufs = xilinx_spi_txrx_bufs;
-+	xspi->bitbang.master->setup = xilinx_spi_setup;
- 	init_completion(&xspi->done);
- 
- 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
---- a/include/linux/spi/spi.h
-+++ b/include/linux/spi/spi.h
-@@ -314,6 +314,8 @@ struct spi_master {
- #define SPI_MASTER_HALF_DUPLEX	BIT(0)		/* can't do full duplex */
- #define SPI_MASTER_NO_RX	BIT(1)		/* can't do buffer read */
- #define SPI_MASTER_NO_TX	BIT(2)		/* can't do buffer write */
-+#define SPI_MASTER_U_PAGE	BIT(3)		/* select upper flash */
-+#define SPI_MASTER_QUAD_MODE	BIT(4)		/* support quad mode */
- 
- 	/* lock and mutex for SPI bus locking */
- 	spinlock_t		bus_lock_spinlock;
diff --git a/patches.zynq/0007-arm-zynq-slcr-Use-read-modify-write-for-register-wri.patch b/patches.zynq/0007-arm-zynq-slcr-Use-read-modify-write-for-register-wri.patch
deleted file mode 100644
index 8d35b61388c11..0000000000000
--- a/patches.zynq/0007-arm-zynq-slcr-Use-read-modify-write-for-register-wri.patch
+++ /dev/null
@@ -1,55 +0,0 @@
-From d1413800f639ccb4577bfcd207f197575b5c845b Mon Sep 17 00:00:00 2001
-From: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Date: Wed, 17 Jul 2013 10:10:15 -0700
-Subject: arm: zynq: slcr: Use read-modify-write for register writes
-
-zynq_slcr_cpu_start/stop() ignored the current register state when
-writing to a register. Fixing this by implementing proper
-read-modify-write.
-
-Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-(cherry picked from commit 3db9e86029349c2c84928b5a0f7c7cf324243b4f)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- arch/arm/mach-zynq/slcr.c | 16 ++++++++--------
- 1 file changed, 8 insertions(+), 8 deletions(-)
-
-diff --git a/arch/arm/mach-zynq/slcr.c b/arch/arm/mach-zynq/slcr.c
-index 743b4825ebf5..884dace227d5 100644
---- a/arch/arm/mach-zynq/slcr.c
-+++ b/arch/arm/mach-zynq/slcr.c
-@@ -61,11 +61,11 @@ void zynq_slcr_system_reset(void)
-  */
- void zynq_slcr_cpu_start(int cpu)
- {
--	/* enable CPUn */
--	writel(SLCR_A9_CPU_CLKSTOP << cpu,
--	       zynq_slcr_base + SLCR_A9_CPU_RST_CTRL_OFFSET);
--	/* enable CLK for CPUn */
--	writel(0x0 << cpu, zynq_slcr_base + SLCR_A9_CPU_RST_CTRL_OFFSET);
-+	u32 reg = readl(zynq_slcr_base + SLCR_A9_CPU_RST_CTRL_OFFSET);
-+	reg &= ~(SLCR_A9_CPU_RST << cpu);
-+	writel(reg, zynq_slcr_base + SLCR_A9_CPU_RST_CTRL_OFFSET);
-+	reg &= ~(SLCR_A9_CPU_CLKSTOP << cpu);
-+	writel(reg, zynq_slcr_base + SLCR_A9_CPU_RST_CTRL_OFFSET);
- }
- 
- /**
-@@ -74,9 +74,9 @@ void zynq_slcr_cpu_start(int cpu)
-  */
- void zynq_slcr_cpu_stop(int cpu)
- {
--	/* stop CLK and reset CPUn */
--	writel((SLCR_A9_CPU_CLKSTOP | SLCR_A9_CPU_RST) << cpu,
--	       zynq_slcr_base + SLCR_A9_CPU_RST_CTRL_OFFSET);
-+	u32 reg = readl(zynq_slcr_base + SLCR_A9_CPU_RST_CTRL_OFFSET);
-+	reg |= (SLCR_A9_CPU_CLKSTOP | SLCR_A9_CPU_RST) << cpu;
-+	writel(reg, zynq_slcr_base + SLCR_A9_CPU_RST_CTRL_OFFSET);
- }
- 
- /**
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0007-mtd-xilinx-merge-nand-flash-support-from-xilinx-repo.patch b/patches.zynq/0007-mtd-xilinx-merge-nand-flash-support-from-xilinx-repo.patch
deleted file mode 100644
index 2f1c62fcfd127..0000000000000
--- a/patches.zynq/0007-mtd-xilinx-merge-nand-flash-support-from-xilinx-repo.patch
+++ /dev/null
@@ -1,1876 +0,0 @@
-From 74eaf4cb9dfdfc0deab5c9a1b8e3de82916ca94b Mon Sep 17 00:00:00 2001
-From: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Date: Tue, 24 Dec 2013 09:18:18 +0900
-Subject: mtd: xilinx: merge nand flash support from xilinx repository
-
-This merges support for the Xilinx nand flash support from the
-Xilinx repository (commit efc27505715e64526653f35274717c0fc56491e3
-in master branch). It has been tested by reading the QSPI flash
-in the Zynq 702 board.
-
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/mtd/devices/m25p80.c     |  417 +++++++++++++--
- drivers/mtd/nand/Kconfig         |    7 
- drivers/mtd/nand/Makefile        |    1 
- drivers/mtd/nand/nand_base.c     |   28 +
- drivers/mtd/nand/xilinx_nandps.c | 1064 +++++++++++++++++++++++++++++++++++++++
- 5 files changed, 1469 insertions(+), 48 deletions(-)
- create mode 100644 drivers/mtd/nand/xilinx_nandps.c
-
---- a/drivers/mtd/devices/m25p80.c
-+++ b/drivers/mtd/devices/m25p80.c
-@@ -41,12 +41,16 @@
- #define	OPCODE_WRSR		0x01	/* Write status register 1 byte */
- #define	OPCODE_NORM_READ	0x03	/* Read data bytes (low frequency) */
- #define	OPCODE_FAST_READ	0x0b	/* Read data bytes (high frequency) */
-+#define OPCODE_QUAD_READ	0x6b	/* Quad read command */
- #define	OPCODE_PP		0x02	/* Page program (up to 256 bytes) */
-+#define OPCODE_QPP		0x32	/* Quad page program */
- #define	OPCODE_BE_4K		0x20	/* Erase 4KiB block */
- #define	OPCODE_BE_32K		0x52	/* Erase 32KiB block */
- #define	OPCODE_CHIP_ERASE	0xc7	/* Erase whole flash chip */
- #define	OPCODE_SE		0xd8	/* Sector erase (usually 64KiB) */
- #define	OPCODE_RDID		0x9f	/* Read JEDEC ID */
-+#define OPCODE_RDFSR		0x70	/* Read Flag Status Register */
-+#define OPCODE_WREAR		0xc5	/* Write Extended Address Register */
- 
- /* Used for SST flashes only. */
- #define	OPCODE_BP		0x02	/* Byte program */
-@@ -59,6 +63,7 @@
- 
- /* Used for Spansion flashes only. */
- #define	OPCODE_BRWR		0x17	/* Bank register write */
-+#define	OPCODE_BRRD		0x16	/* Bank register read */
- 
- /* Status Register bits. */
- #define	SR_WIP			1	/* Write in progress */
-@@ -69,8 +74,11 @@
- #define	SR_BP2			0x10	/* Block protect 2 */
- #define	SR_SRWD			0x80	/* SR write protect */
- 
-+/* Flag Status Register bits. */
-+#define FSR_RDY			0x80	/* Ready/Busy program erase
-+					controller */
- /* Define max times to check status register before we give up. */
--#define	MAX_READY_WAIT_JIFFIES	(40 * HZ)	/* M25P16 specs 40s max chip erase */
-+#define	MAX_READY_WAIT_JIFFIES	(480 * HZ) /* N25Q specs 480s max chip erase */
- #define	MAX_CMD_SIZE		5
- 
- #define JEDEC_MFR(_jedec_id)	((_jedec_id) >> 16)
-@@ -86,6 +94,15 @@ struct m25p {
- 	u8			erase_opcode;
- 	u8			*command;
- 	bool			fast_read;
-+	u16			curbank;
-+	u32			jedec_id;
-+	bool			check_fsr;
-+	bool			shift;
-+	bool			isparallel;
-+	bool			isstacked;
-+	u8			read_opcode;
-+	u8			prog_opcode;
-+	u8			dummycount;
- };
- 
- static inline struct m25p *mtd_to_m25p(struct mtd_info *mtd)
-@@ -100,21 +117,19 @@ static inline struct m25p *mtd_to_m25p(s
-  */
- 
- /*
-- * Read the status register, returning its value in the location
-- * Return the status register value.
-+ * Read register, returning its value in the location
-  * Returns negative if error occurred.
-  */
--static int read_sr(struct m25p *flash)
-+static inline int read_spi_reg(struct m25p *flash, u8 code, const char *name)
- {
- 	ssize_t retval;
--	u8 code = OPCODE_RDSR;
- 	u8 val;
- 
- 	retval = spi_write_then_read(flash->spi, &code, 1, &val, 1);
- 
- 	if (retval < 0) {
--		dev_err(&flash->spi->dev, "error %d reading SR\n",
--				(int) retval);
-+		dev_err(&flash->spi->dev, "error %d reading %s\n",
-+				(int) retval, name);
- 		return retval;
- 	}
- 
-@@ -122,6 +137,26 @@ static int read_sr(struct m25p *flash)
- }
- 
- /*
-+ * Read flag status register, returning its value in the location
-+ * Return flag status register value.
-+ * Returns negative if error occurred.
-+ */
-+static int read_fsr(struct m25p *flash)
-+{
-+	return read_spi_reg(flash, OPCODE_RDFSR, "FSR");
-+}
-+
-+/*
-+ * Read the status register, returning its value in the location
-+ * Return the status register value.
-+ * Returns negative if error occurred.
-+ */
-+static int read_sr(struct m25p *flash)
-+{
-+	return read_spi_reg(flash, OPCODE_RDSR, "SR");
-+}
-+
-+/*
-  * Write status register 1 byte
-  * Returns negative if error occurred.
-  */
-@@ -159,6 +194,9 @@ static inline int write_disable(struct m
-  */
- static inline int set_4byte(struct m25p *flash, u32 jedec_id, int enable)
- {
-+	int ret;
-+	u8 val;
-+
- 	switch (JEDEC_MFR(jedec_id)) {
- 	case CFI_MFR_MACRONIX:
- 	case 0xEF /* winbond */:
-@@ -168,7 +206,19 @@ static inline int set_4byte(struct m25p
- 		/* Spansion style */
- 		flash->command[0] = OPCODE_BRWR;
- 		flash->command[1] = enable << 7;
--		return spi_write(flash->spi, flash->command, 2);
-+		ret = spi_write(flash->spi, flash->command, 2);
-+
-+		/* verify the 4 byte mode is enabled */
-+		flash->command[0] = OPCODE_BRRD;
-+		spi_write_then_read(flash->spi, flash->command, 1, &val, 1);
-+		if (val != enable << 7) {
-+			dev_warn(&flash->spi->dev,
-+				 "fallback to 3-byte address mode\n");
-+			dev_warn(&flash->spi->dev,
-+				 "maximum accessible size is 16MB\n");
-+			flash->addr_width = 3;
-+		}
-+		return ret;
- 	}
- }
- 
-@@ -179,15 +229,21 @@ static inline int set_4byte(struct m25p
- static int wait_till_ready(struct m25p *flash)
- {
- 	unsigned long deadline;
--	int sr;
-+	int sr, fsr;
- 
- 	deadline = jiffies + MAX_READY_WAIT_JIFFIES;
- 
- 	do {
- 		if ((sr = read_sr(flash)) < 0)
- 			break;
--		else if (!(sr & SR_WIP))
-+		else if (!(sr & SR_WIP)) {
-+			if (flash->check_fsr) {
-+				fsr = read_fsr(flash);
-+				if (!(fsr & FSR_RDY))
-+					return 1;
-+			}
- 			return 0;
-+		}
- 
- 		cond_resched();
- 
-@@ -197,6 +253,48 @@ static int wait_till_ready(struct m25p *
- }
- 
- /*
-+ * Update Extended Address/bank selection Register.
-+ * Call with flash->lock locked.
-+ */
-+static int write_ear(struct m25p *flash, u32 addr)
-+{
-+	u8 ear;
-+	int ret;
-+
-+	/* Wait until finished previous write command. */
-+	if (wait_till_ready(flash))
-+		return 1;
-+
-+	if (flash->mtd.size <= (0x1000000) << flash->shift)
-+		return 0;
-+
-+	addr = addr % (u32) flash->mtd.size;
-+	ear = addr >> 24;
-+
-+	if ((!flash->isstacked) && (ear == flash->curbank))
-+		return 0;
-+
-+	if (flash->isstacked && (flash->mtd.size <= 0x2000000))
-+		return 0;
-+
-+	if (JEDEC_MFR(flash->jedec_id) == 0x01)
-+		flash->command[0] = OPCODE_BRWR;
-+	if (JEDEC_MFR(flash->jedec_id) == 0x20) {
-+		write_enable(flash);
-+		flash->command[0] = OPCODE_WREAR;
-+	}
-+	flash->command[1] = ear;
-+
-+	ret = spi_write(flash->spi, flash->command, 2);
-+	if (ret)
-+		return ret;
-+
-+	flash->curbank = ear;
-+
-+	return 0;
-+}
-+
-+/*
-  * Erase the whole flash memory
-  *
-  * Returns 0 if successful, non-zero otherwise.
-@@ -210,6 +308,9 @@ static int erase_chip(struct m25p *flash
- 	if (wait_till_ready(flash))
- 		return 1;
- 
-+	if (flash->isstacked)
-+		flash->spi->master->flags &= ~SPI_MASTER_U_PAGE;
-+
- 	/* Send write enable, then erase commands. */
- 	write_enable(flash);
- 
-@@ -218,16 +319,32 @@ static int erase_chip(struct m25p *flash
- 
- 	spi_write(flash->spi, flash->command, 1);
- 
-+	if (flash->isstacked) {
-+		/* Wait until finished previous write command. */
-+		if (wait_till_ready(flash))
-+			return 1;
-+
-+		flash->spi->master->flags |= SPI_MASTER_U_PAGE;
-+
-+		/* Send write enable, then erase commands. */
-+		write_enable(flash);
-+
-+		/* Set up command buffer. */
-+		flash->command[0] = OPCODE_CHIP_ERASE;
-+
-+		spi_write(flash->spi, flash->command, 1);
-+	}
-+
- 	return 0;
- }
- 
- static void m25p_addr2cmd(struct m25p *flash, unsigned int addr, u8 *cmd)
- {
-+	int i;
-+
- 	/* opcode is in cmd[0] */
--	cmd[1] = addr >> (flash->addr_width * 8 -  8);
--	cmd[2] = addr >> (flash->addr_width * 8 - 16);
--	cmd[3] = addr >> (flash->addr_width * 8 - 24);
--	cmd[4] = addr >> (flash->addr_width * 8 - 32);
-+	for (i = 1; i <= flash->addr_width; i++)
-+		cmd[i] = addr >> (flash->addr_width * 8 - i * 8);
- }
- 
- static int m25p_cmdsz(struct m25p *flash)
-@@ -250,6 +367,10 @@ static int erase_sector(struct m25p *fla
- 	if (wait_till_ready(flash))
- 		return 1;
- 
-+	/* update Extended Address Register */
-+	if (write_ear(flash, offset))
-+		return 1;
-+
- 	/* Send write enable, then erase commands. */
- 	write_enable(flash);
- 
-@@ -275,7 +396,7 @@ static int erase_sector(struct m25p *fla
- static int m25p80_erase(struct mtd_info *mtd, struct erase_info *instr)
- {
- 	struct m25p *flash = mtd_to_m25p(mtd);
--	u32 addr,len;
-+	u32 addr, len, offset;
- 	uint32_t rem;
- 
- 	pr_debug("%s: %s at 0x%llx, len %lld\n", dev_name(&flash->spi->dev),
-@@ -307,7 +428,19 @@ static int m25p80_erase(struct mtd_info
- 	/* "sector"-at-a-time erase */
- 	} else {
- 		while (len) {
--			if (erase_sector(flash, addr)) {
-+			offset = addr;
-+			if (flash->isparallel == 1)
-+				offset /= 2;
-+			if (flash->isstacked == 1) {
-+				if (offset >= (flash->mtd.size / 2)) {
-+					offset = offset - (flash->mtd.size / 2);
-+					flash->spi->master->flags |=
-+							SPI_MASTER_U_PAGE;
-+				} else
-+					flash->spi->master->flags &=
-+							~SPI_MASTER_U_PAGE;
-+			}
-+			if (erase_sector(flash, offset)) {
- 				instr->state = MTD_ERASE_FAILED;
- 				mutex_unlock(&flash->lock);
- 				return -EIO;
-@@ -336,7 +469,6 @@ static int m25p80_read(struct mtd_info *
- 	struct m25p *flash = mtd_to_m25p(mtd);
- 	struct spi_transfer t[2];
- 	struct spi_message m;
--	uint8_t opcode;
- 
- 	pr_debug("%s: %s from 0x%08x, len %zd\n", dev_name(&flash->spi->dev),
- 			__func__, (u32)from, len);
-@@ -349,21 +481,17 @@ static int m25p80_read(struct mtd_info *
- 	 * Should add 1 byte DUMMY_BYTE.
- 	 */
- 	t[0].tx_buf = flash->command;
--	t[0].len = m25p_cmdsz(flash) + (flash->fast_read ? 1 : 0);
-+	t[0].len = m25p_cmdsz(flash) + flash->dummycount;
- 	spi_message_add_tail(&t[0], &m);
- 
- 	t[1].rx_buf = buf;
- 	t[1].len = len;
- 	spi_message_add_tail(&t[1], &m);
- 
--	mutex_lock(&flash->lock);
--
- 	/* Wait till previous write/erase is done. */
--	if (wait_till_ready(flash)) {
-+	if (wait_till_ready(flash))
- 		/* REVISIT status return?? */
--		mutex_unlock(&flash->lock);
- 		return 1;
--	}
- 
- 	/* FIXME switch to OPCODE_FAST_READ.  It's required for higher
- 	 * clocks; and at this writing, every chip this driver handles
-@@ -371,17 +499,65 @@ static int m25p80_read(struct mtd_info *
- 	 */
- 
- 	/* Set up the write data buffer. */
--	opcode = flash->fast_read ? OPCODE_FAST_READ : OPCODE_NORM_READ;
--	flash->command[0] = opcode;
-+	flash->command[0] = flash->read_opcode;
- 	m25p_addr2cmd(flash, from, flash->command);
- 
- 	spi_sync(flash->spi, &m);
- 
- 	*retlen = m.actual_length - m25p_cmdsz(flash) -
--			(flash->fast_read ? 1 : 0);
-+			flash->dummycount;
- 
--	mutex_unlock(&flash->lock);
-+	return 0;
-+}
-+
-+static int m25p80_read_ext(struct mtd_info *mtd, loff_t from, size_t len,
-+	size_t *retlen, u_char *buf)
-+{
-+	struct m25p *flash = mtd_to_m25p(mtd);
-+	u32 addr = from;
-+	u32 offset = from;
-+	u32 read_len = 0;
-+	u32 actual_len = 0;
-+	u32 read_count = 0;
-+	u32 rem_bank_len = 0;
-+	u8 bank = 0;
-+
-+#define OFFSET_16_MB 0x1000000
-+
-+	mutex_lock(&flash->lock);
-+
-+	while (len) {
-+		bank = addr / (OFFSET_16_MB << flash->shift);
-+		rem_bank_len = ((OFFSET_16_MB << flash->shift) * (bank + 1)) -
-+				addr;
-+		offset = addr;
-+		if (flash->isparallel == 1)
-+			offset /= 2;
-+		if (flash->isstacked == 1) {
-+			if (offset >= (flash->mtd.size / 2)) {
-+				offset = offset - (flash->mtd.size / 2);
-+				flash->spi->master->flags |= SPI_MASTER_U_PAGE;
-+			} else {
-+				flash->spi->master->flags &= ~SPI_MASTER_U_PAGE;
-+			}
-+		}
-+		write_ear(flash, offset);
-+		if (len < rem_bank_len)
-+			read_len = len;
-+		else
-+			read_len = rem_bank_len;
-+
-+		m25p80_read(mtd, offset, read_len, &actual_len, buf);
- 
-+		addr += actual_len;
-+		len -= actual_len;
-+		buf += actual_len;
-+		read_count += actual_len;
-+	}
-+
-+	*retlen = read_count;
-+
-+	mutex_unlock(&flash->lock);
- 	return 0;
- }
- 
-@@ -411,19 +587,15 @@ static int m25p80_write(struct mtd_info
- 	t[1].tx_buf = buf;
- 	spi_message_add_tail(&t[1], &m);
- 
--	mutex_lock(&flash->lock);
--
- 	/* Wait until finished previous write command. */
--	if (wait_till_ready(flash)) {
--		mutex_unlock(&flash->lock);
-+	if (wait_till_ready(flash))
- 		return 1;
--	}
- 
- 	write_enable(flash);
- 
- 	/* Set up the opcode in the write buffer. */
--	flash->command[0] = OPCODE_PP;
--	m25p_addr2cmd(flash, to, flash->command);
-+	flash->command[0] = flash->prog_opcode;
-+	m25p_addr2cmd(flash, (to >> flash->shift), flash->command);
- 
- 	page_offset = to & (flash->page_size - 1);
- 
-@@ -452,12 +624,14 @@ static int m25p80_write(struct mtd_info
- 				page_size = flash->page_size;
- 
- 			/* write the next page to flash */
--			m25p_addr2cmd(flash, to + i, flash->command);
-+			m25p_addr2cmd(flash, ((to + i) >> flash->shift),
-+					flash->command);
- 
- 			t[1].tx_buf = buf + i;
- 			t[1].len = page_size;
- 
--			wait_till_ready(flash);
-+			if (wait_till_ready(flash))
-+				return 1;
- 
- 			write_enable(flash);
- 
-@@ -467,8 +641,55 @@ static int m25p80_write(struct mtd_info
- 		}
- 	}
- 
--	mutex_unlock(&flash->lock);
-+	return 0;
-+}
-+
-+static int m25p80_write_ext(struct mtd_info *mtd, loff_t to, size_t len,
-+	size_t *retlen, const u_char *buf)
-+{
-+	struct m25p *flash = mtd_to_m25p(mtd);
-+	u32 addr = to;
-+	u32 offset = to;
-+	u32 write_len = 0;
-+	u32 actual_len = 0;
-+	u32 write_count = 0;
-+	u32 rem_bank_len = 0;
-+	u8 bank = 0;
-+
-+#define OFFSET_16_MB 0x1000000
-+
-+	mutex_lock(&flash->lock);
-+	while (len) {
-+		bank = addr / (OFFSET_16_MB << flash->shift);
-+		rem_bank_len = ((OFFSET_16_MB << flash->shift) * (bank + 1)) -
-+				addr;
-+		offset = addr;
-+
-+		if (flash->isstacked == 1) {
-+			if (offset >= (flash->mtd.size / 2)) {
-+				offset = offset - (flash->mtd.size / 2);
-+				flash->spi->master->flags |= SPI_MASTER_U_PAGE;
-+			} else {
-+				flash->spi->master->flags &= ~SPI_MASTER_U_PAGE;
-+			}
-+		}
-+		write_ear(flash, (offset >> flash->shift));
-+		if (len < rem_bank_len)
-+			write_len = len;
-+		else
-+			write_len = rem_bank_len;
- 
-+		m25p80_write(mtd, offset, write_len, &actual_len, buf);
-+
-+		addr += actual_len;
-+		len -= actual_len;
-+		buf += actual_len;
-+		write_count += actual_len;
-+	}
-+
-+	*retlen = write_count;
-+
-+	mutex_unlock(&flash->lock);
- 	return 0;
- }
- 
-@@ -682,6 +903,8 @@ struct flash_info {
- #define	SECT_4K		0x01		/* OPCODE_BE_4K works uniformly */
- #define	M25P_NO_ERASE	0x02		/* No erase command needed */
- #define	SST_WRITE	0x04		/* use SST byte programming */
-+#define	SECT_32K	0x10		/* OPCODE_BE_32K */
-+#define E_FSR		0x08		/* Flag SR exists for flash */
- };
- 
- #define INFO(_jedec_id, _ext_id, _sector_size, _n_sectors, _flags)	\
-@@ -761,6 +984,15 @@ static const struct spi_device_id m25p_i
- 	{ "n25q128a11",  INFO(0x20bb18, 0, 64 * 1024, 256, 0) },
- 	{ "n25q128a13",  INFO(0x20ba18, 0, 64 * 1024, 256, 0) },
- 	{ "n25q256a", INFO(0x20ba19, 0, 64 * 1024, 512, SECT_4K) },
-+	/* Numonyx flash n25q128 - FIXME check the name */
-+	{ "n25q128",   INFO(0x20bb18, 0, 64 * 1024, 256, 0) },
-+	{ "n25q128a11",  INFO(0x20bb18, 0, 64 * 1024, 256, E_FSR) },
-+	{ "n25q128a13",  INFO(0x20ba18, 0, 64 * 1024, 256, E_FSR) },
-+	{ "n25q256a13", INFO(0x20ba19,  0, 64 * 1024,  512, SECT_4K | E_FSR) },
-+	{ "n25q256a11", INFO(0x20bb19,  0, 64 * 1024,  512, SECT_4K | E_FSR) },
-+	{ "n25q512a13", INFO(0x20ba20,  0, 64 * 1024,  1024, SECT_4K | E_FSR) },
-+	{ "n25q512a11", INFO(0x20bb20,  0, 64 * 1024,  1024, SECT_4K | E_FSR) },
-+	{ "n25q00aa13", INFO(0x20ba21,  0, 64 * 1024,  2048, SECT_4K | E_FSR) },
- 
- 	/* Spansion -- single (large) sector size only, at least
- 	 * for the chips listed here (without boot sectors).
-@@ -781,7 +1013,11 @@ static const struct spi_device_id m25p_i
- 	{ "s25sl032a",  INFO(0x010215,      0,  64 * 1024,  64, 0) },
- 	{ "s25sl064a",  INFO(0x010216,      0,  64 * 1024, 128, 0) },
- 	{ "s25fl016k",  INFO(0xef4015,      0,  64 * 1024,  32, SECT_4K) },
--	{ "s25fl064k",  INFO(0xef4017,      0,  64 * 1024, 128, SECT_4K) },
-+	/* s25fl064k supports 4KiB, 32KiB and 64KiB sectors erase size. */
-+	/* To support JFFS2, the minimum erase size is 8KiB(>4KiB). */
-+	/* And thus, the sector size of s25fl064k is set to 32KiB for */
-+	/* JFFS2 support. */
-+	{ "s25fl064k",  INFO(0xef4017,      0,  64 * 1024, 128, SECT_32K) },
- 
- 	/* SST -- large erase sizes are "overlays", "sectors" are 4K */
- 	{ "sst25vf040b", INFO(0xbf258d, 0, 64 * 1024,  8, SECT_4K | SST_WRITE) },
-@@ -789,10 +1025,11 @@ static const struct spi_device_id m25p_i
- 	{ "sst25vf016b", INFO(0xbf2541, 0, 64 * 1024, 32, SECT_4K | SST_WRITE) },
- 	{ "sst25vf032b", INFO(0xbf254a, 0, 64 * 1024, 64, SECT_4K | SST_WRITE) },
- 	{ "sst25vf064c", INFO(0xbf254b, 0, 64 * 1024, 128, SECT_4K) },
--	{ "sst25wf512",  INFO(0xbf2501, 0, 64 * 1024,  1, SECT_4K | SST_WRITE) },
--	{ "sst25wf010",  INFO(0xbf2502, 0, 64 * 1024,  2, SECT_4K | SST_WRITE) },
--	{ "sst25wf020",  INFO(0xbf2503, 0, 64 * 1024,  4, SECT_4K | SST_WRITE) },
--	{ "sst25wf040",  INFO(0xbf2504, 0, 64 * 1024,  8, SECT_4K | SST_WRITE) },
-+	{ "sst25wf512", INFO(0xbf2501, 0, 64 * 1024,  1, SECT_4K | SST_WRITE) },
-+	{ "sst25wf010", INFO(0xbf2502, 0, 64 * 1024,  2, SECT_4K | SST_WRITE) },
-+	{ "sst25wf020", INFO(0xbf2503, 0, 64 * 1024,  4, SECT_4K | SST_WRITE) },
-+	{ "sst25wf040", INFO(0xbf2504, 0, 64 * 1024,  8, SECT_4K | SST_WRITE) },
-+	{ "sst25wf080", INFO(0xbf2505, 0, 64 * 1024, 16, SECT_4K | SST_WRITE) },
- 
- 	/* ST Microelectronics -- newer production may have feature updates */
- 	{ "m25p05",  INFO(0x202010,  0,  32 * 1024,   2, 0) },
-@@ -839,7 +1076,12 @@ static const struct spi_device_id m25p_i
- 	{ "w25q32", INFO(0xef4016, 0, 64 * 1024,  64, SECT_4K) },
- 	{ "w25q32dw", INFO(0xef6016, 0, 64 * 1024,  64, SECT_4K) },
- 	{ "w25x64", INFO(0xef3017, 0, 64 * 1024, 128, SECT_4K) },
--	{ "w25q64", INFO(0xef4017, 0, 64 * 1024, 128, SECT_4K) },
-+	/* Winbond -- w25q "blocks" are 64K, "sectors" are 32KiB */
-+	/* w25q64 supports 4KiB, 32KiB and 64KiB sectors erase size. */
-+	/* To support JFFS2, the minimum erase size is 8KiB(>4KiB). */
-+	/* And thus, the sector size of w25q64 is set to 32KiB for */
-+	/* JFFS2 support. */
-+	{ "w25q64", INFO(0xef4017, 0, 64 * 1024, 128, SECT_32K) },
- 	{ "w25q80", INFO(0xef5014, 0, 64 * 1024,  16, SECT_4K) },
- 	{ "w25q80bl", INFO(0xef4014, 0, 64 * 1024,  16, SECT_4K) },
- 	{ "w25q128", INFO(0xef4018, 0, 64 * 1024, 256, SECT_4K) },
-@@ -995,8 +1237,54 @@ static int m25p_probe(struct spi_device
- 	flash->mtd.writesize = 1;
- 	flash->mtd.flags = MTD_CAP_NORFLASH;
- 	flash->mtd.size = info->sector_size * info->n_sectors;
-+
-+	{
-+#ifdef CONFIG_OF
-+		const char *comp_str;
-+		u32 is_dual;
-+		np = of_get_next_parent(spi->dev.of_node);
-+		of_property_read_string(np, "compatible", &comp_str);
-+		if (!strcmp(comp_str, "xlnx,ps7-qspi-1.00.a")) {
-+			if (of_property_read_u32(np, "is-dual", &is_dual) < 0) {
-+				/* Default to single if prop not defined */
-+				flash->shift = 0;
-+				flash->isstacked = 0;
-+				flash->isparallel = 0;
-+			} else {
-+				if (is_dual == 1) {
-+					/* dual parallel */
-+					flash->shift = 1;
-+					info->sector_size <<= flash->shift;
-+					info->page_size <<= flash->shift;
-+					flash->mtd.size <<= flash->shift;
-+					flash->isparallel = 1;
-+					flash->isstacked = 0;
-+				} else {
-+#ifdef CONFIG_SPI_XILINX_PS_QSPI_DUAL_STACKED
-+					/* dual stacked */
-+					flash->shift = 0;
-+					flash->mtd.size <<= 1;
-+					flash->isstacked = 1;
-+					flash->isparallel = 0;
-+#else
-+					/* single */
-+					flash->shift = 0;
-+					flash->isstacked = 0;
-+					flash->isparallel = 0;
-+#endif
-+				}
-+			}
-+		}
-+#else
-+		/* Default to single */
-+		flash->shift = 0;
-+		flash->isstacked = 0;
-+		flash->isparallel = 0;
-+#endif
-+	}
-+
- 	flash->mtd._erase = m25p80_erase;
--	flash->mtd._read = m25p80_read;
-+	flash->mtd._read = m25p80_read_ext;
- 
- 	/* flash protection support for STmicro chips */
- 	if (JEDEC_MFR(info->jedec_id) == CFI_MFR_ST) {
-@@ -1008,20 +1296,31 @@ static int m25p_probe(struct spi_device
- 	if (info->flags & SST_WRITE)
- 		flash->mtd._write = sst_write;
- 	else
--		flash->mtd._write = m25p80_write;
-+		flash->mtd._write = m25p80_write_ext;
- 
- 	/* prefer "small sector" erase if possible */
- 	if (info->flags & SECT_4K) {
- 		flash->erase_opcode = OPCODE_BE_4K;
--		flash->mtd.erasesize = 4096;
-+		flash->mtd.erasesize = 4096 << flash->shift;
-+	} else if (info->flags & SECT_32K) {
-+		flash->erase_opcode = OPCODE_BE_32K;
-+		flash->mtd.erasesize = 32768 << flash->shift;
- 	} else {
- 		flash->erase_opcode = OPCODE_SE;
- 		flash->mtd.erasesize = info->sector_size;
- 	}
- 
-+	flash->read_opcode = OPCODE_NORM_READ;
-+	flash->prog_opcode = OPCODE_PP;
-+	flash->dummycount = 0;
-+
- 	if (info->flags & M25P_NO_ERASE)
- 		flash->mtd.flags |= MTD_NO_ERASE;
- 
-+	if (info->flags & E_FSR)
-+		flash->check_fsr = 1;
-+
-+	flash->jedec_id = info->jedec_id;
- 	ppdata.of_node = spi->dev.of_node;
- 	flash->mtd.dev.parent = &spi->dev;
- 	flash->page_size = info->page_size;
-@@ -1036,14 +1335,36 @@ static int m25p_probe(struct spi_device
- #ifdef CONFIG_M25PXX_USE_FAST_READ
- 	flash->fast_read = true;
- #endif
-+	if (flash->fast_read) {
-+		flash->read_opcode = OPCODE_FAST_READ;
-+		flash->dummycount = 1;
-+	}
-+
-+	if (spi->master->flags & SPI_MASTER_QUAD_MODE) {
-+		flash->read_opcode = OPCODE_QUAD_READ;
-+		flash->prog_opcode = OPCODE_QPP;
-+		flash->dummycount = 1;
-+	}
- 
- 	if (info->addr_width)
- 		flash->addr_width = info->addr_width;
- 	else {
- 		/* enable 4-byte addressing if the device exceeds 16MiB */
- 		if (flash->mtd.size > 0x1000000) {
--			flash->addr_width = 4;
--			set_4byte(flash, info->jedec_id, 1);
-+#ifdef CONFIG_OF
-+			const char *comp_str;
-+			np = of_get_next_parent(spi->dev.of_node);
-+			of_property_read_string(np, "compatible", &comp_str);
-+			if (!strcmp(comp_str, "xlnx,ps7-qspi-1.00.a")) {
-+				flash->addr_width = 3;
-+				set_4byte(flash, info->jedec_id, 0);
-+			} else {
-+#endif
-+				flash->addr_width = 4;
-+				set_4byte(flash, info->jedec_id, 1);
-+#ifdef CONFIG_OF
-+			}
-+#endif
- 		} else
- 			flash->addr_width = 3;
- 	}
---- a/drivers/mtd/nand/Kconfig
-+++ b/drivers/mtd/nand/Kconfig
-@@ -523,6 +523,13 @@ config MTD_NAND_NUC900
- 	  This enables the driver for the NAND Flash on evaluation board based
- 	  on w90p910 / NUC9xx.
- 
-+config MTD_NAND_XILINX_PS
-+	tristate "Xilinx Zynq NAND flash driver"
-+	depends on MTD_NAND && ARCH_ZYNQ
-+	select ZYNQ_SMC
-+	help
-+	  This enables access to the NAND flash device on Xilinx Zynq.
-+
- config MTD_NAND_JZ4740
- 	tristate "Support for JZ4740 SoC NAND controller"
- 	depends on MACH_JZ4740
---- a/drivers/mtd/nand/Makefile
-+++ b/drivers/mtd/nand/Makefile
-@@ -44,6 +44,7 @@ obj-$(CONFIG_MTD_NAND_MXC)		+= mxc_nand.
- obj-$(CONFIG_MTD_NAND_SOCRATES)		+= socrates_nand.o
- obj-$(CONFIG_MTD_NAND_TXX9NDFMC)	+= txx9ndfmc.o
- obj-$(CONFIG_MTD_NAND_NUC900)		+= nuc900_nand.o
-+obj-$(CONFIG_MTD_NAND_XILINX_PS)	+= xilinx_nandps.o
- obj-$(CONFIG_MTD_NAND_MPC5121_NFC)	+= mpc5121_nfc.o
- obj-$(CONFIG_MTD_NAND_RICOH)		+= r852.o
- obj-$(CONFIG_MTD_NAND_JZ4740)		+= jz4740_nand.o
---- a/drivers/mtd/nand/nand_base.c
-+++ b/drivers/mtd/nand/nand_base.c
-@@ -814,6 +814,11 @@ static int nand_wait(struct mtd_info *mt
- 	int status, state = chip->state;
- 	unsigned long timeo = (state == FL_ERASING ? 400 : 20);
- 
-+#if defined(ARCH_ZYNQ) && (CONFIG_HZ == 20)
-+		/* Xilinx Zynq NAND work around for HZ=20 */
-+		timeo += 1;
-+#endif
-+
- 	led_trigger_event(nand_led_trigger, LED_FULL);
- 
- 	/*
-@@ -2858,11 +2863,18 @@ static int nand_flash_detect_onfi(struct
- 	int i;
- 	int val;
- 
-+#ifdef CONFIG_MTD_NAND_XILINX_PS
-+	uint8_t *buf;
-+	unsigned int options;
-+	int j;
-+#endif
-+
- 	/* ONFI need to be probed in 8 bits mode, and 16 bits should be selected with NAND_BUSWIDTH_AUTO */
- 	if (chip->options & NAND_BUSWIDTH_16) {
- 		pr_err("Trying ONFI probe in 16 bits mode, aborting !\n");
- 		return 0;
- 	}
-+
- 	/* Try ONFI for unknown chip or LP */
- 	chip->cmdfunc(mtd, NAND_CMD_READID, 0x20, -1);
- 	if (chip->read_byte(mtd) != 'O' || chip->read_byte(mtd) != 'N' ||
-@@ -2871,7 +2883,13 @@ static int nand_flash_detect_onfi(struct
- 
- 	chip->cmdfunc(mtd, NAND_CMD_PARAM, 0, -1);
- 	for (i = 0; i < 3; i++) {
-+#ifdef CONFIG_MTD_NAND_XILINX_PS
-+		buf = (uint8_t *)p;
-+		for (j = 0; j < 256; j++)
-+			buf[j] = chip->read_byte(mtd);
-+#else
- 		chip->read_buf(mtd, (uint8_t *)p, sizeof(*p));
-+#endif
- 		if (onfi_crc16(ONFI_CRC_BASE, (uint8_t *)p, 254) ==
- 				le16_to_cpu(p->crc)) {
- 			pr_info("ONFI param page %d valid\n", i);
-@@ -2924,7 +2942,17 @@ static int nand_flash_detect_onfi(struct
- 	if (le16_to_cpu(p->features) & 1)
- 		*busw = NAND_BUSWIDTH_16;
- 
-+#ifdef CONFIG_MTD_NAND_XILINX_PS
-+	/* Read the chip options before clearing the bits */
-+	options = chip->options;
-+#endif
-+
- 	pr_info("ONFI flash detected\n");
-+#ifdef CONFIG_MTD_NAND_XILINX_PS
-+	/* set the bus width option */
-+	if (options & NAND_BUSWIDTH_16)
-+		chip->options |= NAND_BUSWIDTH_16;
-+#endif
- 	return 1;
- }
- 
---- /dev/null
-+++ b/drivers/mtd/nand/xilinx_nandps.c
-@@ -0,0 +1,1064 @@
-+/*
-+ * Xilinx Zynq NAND Flash Controller Driver
-+ *
-+ * Copyright (C) 2009 Xilinx, Inc.
-+ *
-+ * This program is free software; you can redistribute it and/or modify it under
-+ * the terms of the GNU General Public License version 2 as published by the
-+ * Free Software Foundation; either version 2 of the License, or (at your
-+ * option) any later version.
-+ *
-+ * You should have received a copy of the GNU General Public License along with
-+ * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
-+ * Place, Suite 330, Boston, MA  02111-1307  USA
-+ */
-+
-+/*
-+ * This driver is based on plat_nand.c and mxc_nand.c drivers
-+ */
-+
-+#include <linux/err.h>
-+#include <linux/delay.h>
-+#include <linux/init.h>
-+#include <linux/interrupt.h>
-+#include <linux/io.h>
-+#include <linux/ioport.h>
-+#include <linux/irq.h>
-+#include <linux/memory/zynq-smc.h>
-+#include <linux/module.h>
-+#include <linux/moduleparam.h>
-+#include <linux/mtd/mtd.h>
-+#include <linux/mtd/nand.h>
-+#include <linux/mtd/nand_ecc.h>
-+#include <linux/mtd/partitions.h>
-+#include <linux/of_address.h>
-+#include <linux/of_device.h>
-+#include <linux/of_platform.h>
-+#include <linux/platform_device.h>
-+#include <linux/slab.h>
-+
-+#define XNANDPS_DRIVER_NAME "xilinx_nandps"
-+
-+/* NAND flash driver defines */
-+#define XNANDPS_CMD_PHASE	1	/* End command valid in command phase */
-+#define XNANDPS_DATA_PHASE	2	/* End command valid in data phase */
-+#define XNANDPS_ECC_SIZE	512	/* Size of data for ECC operation */
-+
-+/* Flash memory controller operating parameters */
-+
-+#define XNANDPS_ECC_CONFIG	((1 << 4)  |	/* ECC read at end of page */ \
-+				 (0 << 5))	/* No Jumping */
-+
-+/* AXI Address definitions */
-+#define START_CMD_SHIFT		3
-+#define END_CMD_SHIFT		11
-+#define END_CMD_VALID_SHIFT	20
-+#define ADDR_CYCLES_SHIFT	21
-+#define CLEAR_CS_SHIFT		21
-+#define ECC_LAST_SHIFT		10
-+#define COMMAND_PHASE		(0 << 19)
-+#define DATA_PHASE		(1 << 19)
-+
-+#define XNANDPS_ECC_LAST	(1 << ECC_LAST_SHIFT)	/* Set ECC_Last */
-+#define XNANDPS_CLEAR_CS	(1 << CLEAR_CS_SHIFT)	/* Clear chip select */
-+
-+#define ONDIE_ECC_FEATURE_ADDR	0x90
-+
-+/* Macros for the NAND controller register read/write */
-+#define xnandps_write32(addr, val)	__raw_writel((val), (addr))
-+
-+
-+/**
-+ * struct xnandps_command_format - Defines NAND flash command format
-+ * @start_cmd:		First cycle command (Start command)
-+ * @end_cmd:		Second cycle command (Last command)
-+ * @addr_cycles:	Number of address cycles required to send the address
-+ * @end_cmd_valid:	The second cycle command is valid for cmd or data phase
-+ **/
-+struct xnandps_command_format {
-+	int start_cmd;
-+	int end_cmd;
-+	u8 addr_cycles;
-+	u8 end_cmd_valid;
-+};
-+
-+/**
-+ * struct xnandps_info - Defines the NAND flash driver instance
-+ * @chip:		NAND chip information structure
-+ * @mtd:		MTD information structure
-+ * @parts:		Pointer	to the mtd_partition structure
-+ * @nand_base:		Virtual address of the NAND flash device
-+ * @end_cmd_pending:	End command is pending
-+ * @end_cmd:		End command
-+ **/
-+struct xnandps_info {
-+	struct nand_chip	chip;
-+	struct mtd_info		mtd;
-+	struct mtd_partition	*parts;
-+	void __iomem		*nand_base;
-+	unsigned long		end_cmd_pending;
-+	unsigned long		end_cmd;
-+};
-+
-+/*
-+ * The NAND flash operations command format
-+ */
-+static const struct xnandps_command_format xnandps_commands[] = {
-+	{NAND_CMD_READ0, NAND_CMD_READSTART, 5, XNANDPS_CMD_PHASE},
-+	{NAND_CMD_RNDOUT, NAND_CMD_RNDOUTSTART, 2, XNANDPS_CMD_PHASE},
-+	{NAND_CMD_READID, NAND_CMD_NONE, 1, NAND_CMD_NONE},
-+	{NAND_CMD_STATUS, NAND_CMD_NONE, 0, NAND_CMD_NONE},
-+	{NAND_CMD_SEQIN, NAND_CMD_PAGEPROG, 5, XNANDPS_DATA_PHASE},
-+	{NAND_CMD_RNDIN, NAND_CMD_NONE, 2, NAND_CMD_NONE},
-+	{NAND_CMD_ERASE1, NAND_CMD_ERASE2, 3, XNANDPS_CMD_PHASE},
-+	{NAND_CMD_RESET, NAND_CMD_NONE, 0, NAND_CMD_NONE},
-+	{NAND_CMD_PARAM, NAND_CMD_NONE, 1, NAND_CMD_NONE},
-+	{NAND_CMD_GET_FEATURES, NAND_CMD_NONE, 1, NAND_CMD_NONE},
-+	{NAND_CMD_SET_FEATURES, NAND_CMD_NONE, 1, NAND_CMD_NONE},
-+	{NAND_CMD_NONE, NAND_CMD_NONE, 0, 0},
-+	/* Add all the flash commands supported by the flash device and Linux */
-+	/* The cache program command is not supported by driver because driver
-+	 * cant differentiate between page program and cached page program from
-+	 * start command, these commands can be differentiated through end
-+	 * command, which doesn't fit in to the driver design. The cache program
-+	 * command is not supported by NAND subsystem also, look at 1612 line
-+	 * number (in nand_write_page function) of nand_base.c file.
-+	 * {NAND_CMD_SEQIN, NAND_CMD_CACHEDPROG, 5, XNANDPS_YES}, */
-+};
-+
-+/* Define default oob placement schemes for large and small page devices */
-+static struct nand_ecclayout nand_oob_16 = {
-+	.eccbytes = 3,
-+	.eccpos = {0, 1, 2},
-+	.oobfree = {
-+		{.offset = 8,
-+		 . length = 8} }
-+};
-+
-+static struct nand_ecclayout nand_oob_64 = {
-+	.eccbytes = 12,
-+	.eccpos = {
-+		   52, 53, 54, 55, 56, 57,
-+		   58, 59, 60, 61, 62, 63},
-+	.oobfree = {
-+		{.offset = 2,
-+		 .length = 50} }
-+};
-+
-+static struct nand_ecclayout ondie_nand_oob_64 = {
-+	.eccbytes = 32,
-+
-+	.eccpos = {
-+		8, 9, 10, 11, 12, 13, 14, 15,
-+		24, 25, 26, 27, 28, 29, 30, 31,
-+		40, 41, 42, 43, 44, 45, 46, 47,
-+		56, 57, 58, 59, 60, 61, 62, 63
-+	},
-+
-+	.oobfree = {
-+		{ .offset = 4, .length = 4 },
-+		{ .offset = 20, .length = 4 },
-+		{ .offset = 36, .length = 4 },
-+		{ .offset = 52, .length = 4 }
-+	}
-+};
-+
-+/* Generic flash bbt decriptors
-+*/
-+static uint8_t bbt_pattern[] = {'B', 'b', 't', '0' };
-+static uint8_t mirror_pattern[] = {'1', 't', 'b', 'B' };
-+
-+static struct nand_bbt_descr bbt_main_descr = {
-+	.options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE
-+		| NAND_BBT_2BIT | NAND_BBT_VERSION | NAND_BBT_PERCHIP,
-+	.offs = 4,
-+	.len = 4,
-+	.veroffs = 20,
-+	.maxblocks = 4,
-+	.pattern = bbt_pattern
-+};
-+
-+static struct nand_bbt_descr bbt_mirror_descr = {
-+	.options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE
-+		| NAND_BBT_2BIT | NAND_BBT_VERSION | NAND_BBT_PERCHIP,
-+	.offs = 4,
-+	.len = 4,
-+	.veroffs = 20,
-+	.maxblocks = 4,
-+	.pattern = mirror_pattern
-+};
-+
-+/**
-+ * xnandps_calculate_hwecc - Calculate Hardware ECC
-+ * @mtd:	Pointer to the mtd_info structure
-+ * @data:	Pointer to the page data
-+ * @ecc_code:	Pointer to the ECC buffer where ECC data needs to be stored
-+ *
-+ * This function retrieves the Hardware ECC data from the controller and returns
-+ * ECC data back to the MTD subsystem.
-+ *
-+ * returns:	0 on success or error value on failure
-+ **/
-+static int
-+xnandps_calculate_hwecc(struct mtd_info *mtd, const u8 *data, u8 *ecc_code)
-+{
-+	u32 ecc_value = 0;
-+	u8 ecc_reg, ecc_byte;
-+	u32 ecc_status;
-+
-+	/* Wait till the ECC operation is complete */
-+	while (xsmcps_ecc_is_busy())
-+		cpu_relax();
-+
-+	for (ecc_reg = 0; ecc_reg < 4; ecc_reg++) {
-+		/* Read ECC value for each block */
-+		ecc_value = xsmcps_get_ecc_val(ecc_reg);
-+		ecc_status = (ecc_value >> 24) & 0xFF;
-+		/* ECC value valid */
-+		if (ecc_status & 0x40) {
-+			for (ecc_byte = 0; ecc_byte < 3; ecc_byte++) {
-+				/* Copy ECC bytes to MTD buffer */
-+				*ecc_code = ecc_value & 0xFF;
-+				ecc_value = ecc_value >> 8;
-+				ecc_code++;
-+			}
-+		} else {
-+			/* TO DO */
-+			/* dev_warn(&pdev->dev, "pl350: ecc status failed\n");
-+			* */
-+		}
-+	}
-+	return 0;
-+}
-+
-+/**
-+ * onehot - onehot function
-+ * @value:	value to check for onehot
-+ *
-+ * This function checks whether a value is onehot or not.
-+ * onehot is if and only if onebit is set.
-+ *
-+ **/
-+static int onehot(unsigned short value)
-+{
-+	return ((value & (value-1)) == 0);
-+}
-+
-+/**
-+ * xnandps_correct_data - ECC correction function
-+ * @mtd:	Pointer to the mtd_info structure
-+ * @buf:	Pointer to the page data
-+ * @read_ecc:	Pointer to the ECC value read from spare data area
-+ * @calc_ecc:	Pointer to the calculated ECC value
-+ *
-+ * This function corrects the ECC single bit errors & detects 2-bit errors.
-+ *
-+ * returns:	0 if no ECC errors found
-+ *		1 if single bit error found and corrected.
-+ *		-1 if multiple ECC errors found.
-+ **/
-+static int xnandps_correct_data(struct mtd_info *mtd, unsigned char *buf,
-+			unsigned char *read_ecc, unsigned char *calc_ecc)
-+{
-+	unsigned char bit_addr;
-+	unsigned int byte_addr;
-+	unsigned short ecc_odd, ecc_even;
-+	unsigned short read_ecc_lower, read_ecc_upper;
-+	unsigned short calc_ecc_lower, calc_ecc_upper;
-+
-+	read_ecc_lower = (read_ecc[0] | (read_ecc[1] << 8)) & 0xfff;
-+	read_ecc_upper = ((read_ecc[1] >> 4) | (read_ecc[2] << 4)) & 0xfff;
-+
-+	calc_ecc_lower = (calc_ecc[0] | (calc_ecc[1] << 8)) & 0xfff;
-+	calc_ecc_upper = ((calc_ecc[1] >> 4) | (calc_ecc[2] << 4)) & 0xfff;
-+
-+	ecc_odd = read_ecc_lower ^ calc_ecc_lower;
-+	ecc_even = read_ecc_upper ^ calc_ecc_upper;
-+
-+	if ((ecc_odd == 0) && (ecc_even == 0))
-+		return 0;       /* no error */
-+
-+	if (ecc_odd == (~ecc_even & 0xfff)) {
-+		/* bits [11:3] of error code is byte offset */
-+		byte_addr = (ecc_odd >> 3) & 0x1ff;
-+		/* bits [2:0] of error code is bit offset */
-+		bit_addr = ecc_odd & 0x7;
-+		/* Toggling error bit */
-+		buf[byte_addr] ^= (1 << bit_addr);
-+		return 1;
-+	}
-+
-+	if (onehot(ecc_odd | ecc_even) == 1)
-+		return 1; /* one error in parity */
-+
-+	return -1; /* Uncorrectable error */
-+}
-+
-+/**
-+ * xnandps_read_oob - [REPLACABLE] the most common OOB data read function
-+ * @mtd:	mtd info structure
-+ * @chip:	nand chip info structure
-+ * @page:	page number to read
-+ */
-+static int xnandps_read_oob(struct mtd_info *mtd, struct nand_chip *chip,
-+			int page)
-+{
-+	unsigned long data_width = 4;
-+	unsigned long data_phase_addr = 0;
-+	uint8_t *p;
-+
-+	chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page);
-+
-+	p = chip->oob_poi;
-+	chip->read_buf(mtd, p, (mtd->oobsize - data_width));
-+	p += (mtd->oobsize - data_width);
-+
-+	data_phase_addr = (unsigned long __force)chip->IO_ADDR_R;
-+	data_phase_addr |= XNANDPS_CLEAR_CS;
-+	chip->IO_ADDR_R = (void __iomem *__force)data_phase_addr;
-+	chip->read_buf(mtd, p, data_width);
-+
-+	return 0;
-+}
-+
-+/**
-+ * xnandps_write_oob - [REPLACABLE] the most common OOB data write function
-+ * @mtd:	mtd info structure
-+ * @chip:	nand chip info structure
-+ * @page:	page number to write
-+ */
-+static int xnandps_write_oob(struct mtd_info *mtd, struct nand_chip *chip,
-+			int page)
-+{
-+	int status = 0;
-+	const uint8_t *buf = chip->oob_poi;
-+	unsigned long data_width = 4;
-+	unsigned long data_phase_addr = 0;
-+
-+	chip->cmdfunc(mtd, NAND_CMD_SEQIN, mtd->writesize, page);
-+
-+	chip->write_buf(mtd, buf, (mtd->oobsize - data_width));
-+	buf += (mtd->oobsize - data_width);
-+
-+	data_phase_addr = (unsigned long __force)chip->IO_ADDR_W;
-+	data_phase_addr |= XNANDPS_CLEAR_CS;
-+	data_phase_addr |= (1 << END_CMD_VALID_SHIFT);
-+	chip->IO_ADDR_W = (void __iomem *__force)data_phase_addr;
-+	chip->write_buf(mtd, buf, data_width);
-+
-+	/* Send command to program the OOB data */
-+	chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
-+	status = chip->waitfunc(mtd, chip);
-+
-+	return status & NAND_STATUS_FAIL ? -EIO : 0;
-+}
-+
-+/**
-+ * xnandps_read_page_raw - [Intern] read raw page data without ecc
-+ * @mtd:        mtd info structure
-+ * @chip:       nand chip info structure
-+ * @buf:        buffer to store read data
-+ * @page:       page number to read
-+ *
-+ */
-+static int xnandps_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
-+			      uint8_t *buf, int oob_required, int page)
-+{
-+	unsigned long data_width = 4;
-+	unsigned long data_phase_addr = 0;
-+	uint8_t *p;
-+
-+	chip->read_buf(mtd, buf, mtd->writesize);
-+
-+	p = chip->oob_poi;
-+	chip->read_buf(mtd, p, (mtd->oobsize - data_width));
-+	p += (mtd->oobsize - data_width);
-+
-+	data_phase_addr = (unsigned long __force)chip->IO_ADDR_R;
-+	data_phase_addr |= XNANDPS_CLEAR_CS;
-+	chip->IO_ADDR_R = (void __iomem *__force)data_phase_addr;
-+
-+	chip->read_buf(mtd, p, data_width);
-+	return 0;
-+}
-+
-+/**
-+ * xnandps_write_page_raw - [Intern] raw page write function
-+ * @mtd:        mtd info structure
-+ * @chip:       nand chip info structure
-+ * @buf:        data buffer
-+ *
-+ */
-+static int xnandps_write_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
-+		const uint8_t *buf, int oob_required)
-+{
-+	unsigned long data_width = 4;
-+	unsigned long data_phase_addr = 0;
-+	uint8_t *p;
-+
-+	chip->write_buf(mtd, buf, mtd->writesize);
-+
-+	p = chip->oob_poi;
-+	chip->write_buf(mtd, p, (mtd->oobsize - data_width));
-+	p += (mtd->oobsize - data_width);
-+
-+	data_phase_addr = (unsigned long __force)chip->IO_ADDR_W;
-+	data_phase_addr |= XNANDPS_CLEAR_CS;
-+	data_phase_addr |= (1 << END_CMD_VALID_SHIFT);
-+	chip->IO_ADDR_W = (void __iomem *__force)data_phase_addr;
-+
-+	chip->write_buf(mtd, p, data_width);
-+
-+	return 0;
-+}
-+
-+/**
-+ * nand_write_page_hwecc - Hardware ECC based page write function
-+ * @mtd:	Pointer to the mtd info structure
-+ * @chip:	Pointer to the NAND chip info structure
-+ * @buf:	Pointer to the data buffer
-+ *
-+ * This functions writes data and hardware generated ECC values in to the page.
-+ */
-+static int xnandps_write_page_hwecc(struct mtd_info *mtd,
-+		struct nand_chip *chip, const uint8_t *buf, int oob_required)
-+{
-+	int i, eccsize = chip->ecc.size;
-+	int eccsteps = chip->ecc.steps;
-+	uint8_t *ecc_calc = chip->buffers->ecccalc;
-+	const uint8_t *p = buf;
-+	uint32_t *eccpos = chip->ecc.layout->eccpos;
-+	unsigned long data_phase_addr = 0;
-+	unsigned long data_width = 4;
-+	uint8_t *oob_ptr;
-+
-+	for (; (eccsteps - 1); eccsteps--) {
-+		chip->write_buf(mtd, p, eccsize);
-+		p += eccsize;
-+	}
-+	chip->write_buf(mtd, p, (eccsize - data_width));
-+	p += (eccsize - data_width);
-+
-+	/* Set ECC Last bit to 1 */
-+	data_phase_addr = (unsigned long __force)chip->IO_ADDR_W;
-+	data_phase_addr |= XNANDPS_ECC_LAST;
-+	chip->IO_ADDR_W = (void __iomem *__force)data_phase_addr;
-+	chip->write_buf(mtd, p, data_width);
-+
-+	/* Wait for ECC to be calculated and read the error values */
-+	p = buf;
-+	chip->ecc.calculate(mtd, p, &ecc_calc[0]);
-+
-+	for (i = 0; i < chip->ecc.total; i++)
-+		chip->oob_poi[eccpos[i]] = ~(ecc_calc[i]);
-+
-+	/* Clear ECC last bit */
-+	data_phase_addr = (unsigned long __force)chip->IO_ADDR_W;
-+	data_phase_addr &= ~XNANDPS_ECC_LAST;
-+	chip->IO_ADDR_W = (void __iomem *__force)data_phase_addr;
-+
-+	/* Write the spare area with ECC bytes */
-+	oob_ptr = chip->oob_poi;
-+	chip->write_buf(mtd, oob_ptr, (mtd->oobsize - data_width));
-+
-+	data_phase_addr = (unsigned long __force)chip->IO_ADDR_W;
-+	data_phase_addr |= XNANDPS_CLEAR_CS;
-+	data_phase_addr |= (1 << END_CMD_VALID_SHIFT);
-+	chip->IO_ADDR_W = (void __iomem *__force)data_phase_addr;
-+	oob_ptr += (mtd->oobsize - data_width);
-+	chip->write_buf(mtd, oob_ptr, data_width);
-+
-+	return 0;
-+}
-+
-+/**
-+ * xnandps_write_page_swecc - [REPLACABLE] software ecc based page write function
-+ * @mtd:	mtd info structure
-+ * @chip:	nand chip info structure
-+ * @buf:	data buffer
-+ */
-+static int xnandps_write_page_swecc(struct mtd_info *mtd,
-+		struct nand_chip *chip, const uint8_t *buf, int oob_required)
-+{
-+	int i, eccsize = chip->ecc.size;
-+	int eccbytes = chip->ecc.bytes;
-+	int eccsteps = chip->ecc.steps;
-+	uint8_t *ecc_calc = chip->buffers->ecccalc;
-+	const uint8_t *p = buf;
-+	uint32_t *eccpos = chip->ecc.layout->eccpos;
-+
-+	/* Software ecc calculation */
-+	for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize)
-+		chip->ecc.calculate(mtd, p, &ecc_calc[i]);
-+
-+	for (i = 0; i < chip->ecc.total; i++)
-+		chip->oob_poi[eccpos[i]] = ecc_calc[i];
-+
-+	chip->ecc.write_page_raw(mtd, chip, buf, 1);
-+
-+	return 0;
-+}
-+
-+/**
-+ * xnandps_read_page_hwecc - Hardware ECC based page read function
-+ * @mtd:	Pointer to the mtd info structure
-+ * @chip:	Pointer to the NAND chip info structure
-+ * @buf:	Pointer to the buffer to store read data
-+ * @page:	page number to read
-+ *
-+ * This functions reads data and checks the data integrity by comparing hardware
-+ * generated ECC values and read ECC values from spare area.
-+ *
-+ * returns:	0 always and updates ECC operation status in to MTD structure
-+ */
-+static int xnandps_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,
-+		uint8_t *buf, int oob_required, int page)
-+{
-+	int i, stat, eccsize = chip->ecc.size;
-+	int eccbytes = chip->ecc.bytes;
-+	int eccsteps = chip->ecc.steps;
-+	uint8_t *p = buf;
-+	uint8_t *ecc_calc = chip->buffers->ecccalc;
-+	uint8_t *ecc_code = chip->buffers->ecccode;
-+	uint32_t *eccpos = chip->ecc.layout->eccpos;
-+	unsigned long data_phase_addr = 0;
-+	unsigned long data_width = 4;
-+	uint8_t *oob_ptr;
-+
-+	for (; (eccsteps - 1); eccsteps--) {
-+		chip->read_buf(mtd, p, eccsize);
-+		p += eccsize;
-+	}
-+	chip->read_buf(mtd, p, (eccsize - data_width));
-+	p += (eccsize - data_width);
-+
-+	/* Set ECC Last bit to 1 */
-+	data_phase_addr = (unsigned long __force)chip->IO_ADDR_R;
-+	data_phase_addr |= XNANDPS_ECC_LAST;
-+	chip->IO_ADDR_R = (void __iomem *__force)data_phase_addr;
-+	chip->read_buf(mtd, p, data_width);
-+
-+	/* Read the calculated ECC value */
-+	p = buf;
-+	chip->ecc.calculate(mtd, p, &ecc_calc[0]);
-+
-+	/* Clear ECC last bit */
-+	data_phase_addr = (unsigned long __force)chip->IO_ADDR_R;
-+	data_phase_addr &= ~XNANDPS_ECC_LAST;
-+	chip->IO_ADDR_R = (void __iomem *__force)data_phase_addr;
-+
-+	/* Read the stored ECC value */
-+	oob_ptr = chip->oob_poi;
-+	chip->read_buf(mtd, oob_ptr, (mtd->oobsize - data_width));
-+
-+	/* de-assert chip select */
-+	data_phase_addr = (unsigned long __force)chip->IO_ADDR_R;
-+	data_phase_addr |= XNANDPS_CLEAR_CS;
-+	chip->IO_ADDR_R = (void __iomem *__force)data_phase_addr;
-+
-+	oob_ptr += (mtd->oobsize - data_width);
-+	chip->read_buf(mtd, oob_ptr, data_width);
-+
-+	for (i = 0; i < chip->ecc.total; i++)
-+		ecc_code[i] = ~(chip->oob_poi[eccpos[i]]);
-+
-+	eccsteps = chip->ecc.steps;
-+	p = buf;
-+
-+	/* Check ECC error for all blocks and correct if it is correctable */
-+	for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
-+		stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);
-+		if (stat < 0)
-+			mtd->ecc_stats.failed++;
-+		else
-+			mtd->ecc_stats.corrected += stat;
-+	}
-+	return 0;
-+}
-+
-+/**
-+ * xnandps_read_page_swecc - [REPLACABLE] software ecc based page read function
-+ * @mtd:	mtd info structure
-+ * @chip:	nand chip info structure
-+ * @buf:	buffer to store read data
-+ * @page:	page number to read
-+ */
-+static int xnandps_read_page_swecc(struct mtd_info *mtd, struct nand_chip *chip,
-+		uint8_t *buf,  int oob_required, int page)
-+{
-+	int i, eccsize = chip->ecc.size;
-+	int eccbytes = chip->ecc.bytes;
-+	int eccsteps = chip->ecc.steps;
-+	uint8_t *p = buf;
-+	uint8_t *ecc_calc = chip->buffers->ecccalc;
-+	uint8_t *ecc_code = chip->buffers->ecccode;
-+	uint32_t *eccpos = chip->ecc.layout->eccpos;
-+
-+	chip->ecc.read_page_raw(mtd, chip, buf, page, 1);
-+
-+	for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize)
-+		chip->ecc.calculate(mtd, p, &ecc_calc[i]);
-+
-+	for (i = 0; i < chip->ecc.total; i++)
-+		ecc_code[i] = chip->oob_poi[eccpos[i]];
-+
-+	eccsteps = chip->ecc.steps;
-+	p = buf;
-+
-+	for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
-+		int stat;
-+
-+		stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);
-+		if (stat < 0)
-+			mtd->ecc_stats.failed++;
-+		else
-+			mtd->ecc_stats.corrected += stat;
-+	}
-+	return 0;
-+}
-+
-+/**
-+ * xnandps_select_chip - Select the flash device
-+ * @mtd:	Pointer to the mtd_info structure
-+ * @chip:	Chip number to be selected
-+ *
-+ * This function is empty as the NAND controller handles chip select line
-+ * internally based on the chip address passed in command and data phase.
-+ **/
-+static void xnandps_select_chip(struct mtd_info *mtd, int chip)
-+{
-+	return;
-+}
-+
-+/**
-+ * xnandps_cmd_function - Send command to NAND device
-+ * @mtd:	Pointer to the mtd_info structure
-+ * @command:	The command to be sent to the flash device
-+ * @column:	The column address for this command, -1 if none
-+ * @page_addr:	The page address for this command, -1 if none
-+ */
-+static void xnandps_cmd_function(struct mtd_info *mtd, unsigned int command,
-+			    int column, int page_addr)
-+{
-+	struct nand_chip *chip = mtd->priv;
-+	const struct xnandps_command_format *curr_cmd = NULL;
-+	struct xnandps_info *xnand =
-+		container_of(mtd, struct xnandps_info, mtd);
-+	void __iomem *cmd_addr;
-+	unsigned long cmd_data = 0;
-+	unsigned long cmd_phase_addr = 0;
-+	unsigned long data_phase_addr = 0;
-+	unsigned long end_cmd = 0;
-+	unsigned long end_cmd_valid = 0;
-+	unsigned long i;
-+
-+	if (xnand->end_cmd_pending) {
-+		/* Check for end command if this command request is same as the
-+		 * pending command then return */
-+		if (xnand->end_cmd == command) {
-+			xnand->end_cmd = 0;
-+			xnand->end_cmd_pending = 0;
-+			return;
-+		}
-+	}
-+
-+	/* Emulate NAND_CMD_READOOB for large page device */
-+	if ((mtd->writesize > XNANDPS_ECC_SIZE) &&
-+		(command == NAND_CMD_READOOB)) {
-+		column += mtd->writesize;
-+		command = NAND_CMD_READ0;
-+	}
-+
-+	/* Get the command format */
-+	for (i = 0; (xnandps_commands[i].start_cmd != NAND_CMD_NONE ||
-+		xnandps_commands[i].end_cmd != NAND_CMD_NONE); i++) {
-+		if (command == xnandps_commands[i].start_cmd)
-+			curr_cmd = &xnandps_commands[i];
-+	}
-+
-+	if (curr_cmd == NULL)
-+		return;
-+
-+	/* Clear interrupt */
-+	xsmcps_clr_nand_int();
-+
-+	/* Get the command phase address */
-+	if (curr_cmd->end_cmd_valid == XNANDPS_CMD_PHASE)
-+		end_cmd_valid = 1;
-+
-+	if (curr_cmd->end_cmd == NAND_CMD_NONE)
-+		end_cmd = 0x0;
-+	else
-+		end_cmd = curr_cmd->end_cmd;
-+
-+	cmd_phase_addr = (unsigned long __force)xnand->nand_base	|
-+			(curr_cmd->addr_cycles << ADDR_CYCLES_SHIFT)	|
-+			(end_cmd_valid << END_CMD_VALID_SHIFT)		|
-+			(COMMAND_PHASE)					|
-+			(end_cmd << END_CMD_SHIFT)			|
-+			(curr_cmd->start_cmd << START_CMD_SHIFT);
-+
-+	cmd_addr = (void __iomem * __force)cmd_phase_addr;
-+
-+	/* Get the data phase address */
-+	end_cmd_valid = 0;
-+
-+	data_phase_addr = (unsigned long __force)xnand->nand_base	|
-+			(0x0 << CLEAR_CS_SHIFT)				|
-+			(end_cmd_valid << END_CMD_VALID_SHIFT)		|
-+			(DATA_PHASE)					|
-+			(end_cmd << END_CMD_SHIFT)			|
-+			(0x0 << ECC_LAST_SHIFT);
-+
-+	chip->IO_ADDR_R = (void __iomem * __force)data_phase_addr;
-+	chip->IO_ADDR_W = chip->IO_ADDR_R;
-+
-+	/* Command phase AXI write */
-+	/* Read & Write */
-+	if (column != -1 && page_addr != -1) {
-+		/* Adjust columns for 16 bit bus width */
-+		if (chip->options & NAND_BUSWIDTH_16)
-+			column >>= 1;
-+		cmd_data = column;
-+		if (mtd->writesize > XNANDPS_ECC_SIZE) {
-+			cmd_data |= page_addr << 16;
-+			/* Another address cycle for devices > 128MiB */
-+			if (chip->chipsize > (128 << 20)) {
-+				xnandps_write32(cmd_addr, cmd_data);
-+				cmd_data = (page_addr >> 16);
-+			}
-+		} else {
-+			cmd_data |= page_addr << 8;
-+		}
-+	} else if (page_addr != -1) {
-+		/* Erase */
-+		cmd_data = page_addr;
-+	} else if (column != -1) {
-+		/* Change read/write column, read id etc */
-+		/* Adjust columns for 16 bit bus width */
-+		if ((chip->options & NAND_BUSWIDTH_16) &&
-+			((command == NAND_CMD_READ0) ||
-+			(command == NAND_CMD_SEQIN) ||
-+			(command == NAND_CMD_RNDOUT) ||
-+			(command == NAND_CMD_RNDIN)))
-+				column >>= 1;
-+		cmd_data = column;
-+	}
-+
-+	xnandps_write32(cmd_addr, cmd_data);
-+
-+	if (curr_cmd->end_cmd_valid) {
-+		xnand->end_cmd = curr_cmd->end_cmd;
-+		xnand->end_cmd_pending = 1;
-+	}
-+
-+	ndelay(100);
-+
-+	if ((command == NAND_CMD_READ0) ||
-+		(command == NAND_CMD_RESET) ||
-+		(command == NAND_CMD_PARAM) ||
-+		(command == NAND_CMD_GET_FEATURES)) {
-+
-+		while (!chip->dev_ready(mtd))
-+			;
-+		return;
-+	}
-+}
-+
-+/**
-+ * xnandps_read_buf - read chip data into buffer
-+ * @mtd:        MTD device structure
-+ * @buf:        buffer to store date
-+ * @len:        number of bytes to read
-+ *
-+ */
-+static void xnandps_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
-+{
-+	int i;
-+	struct nand_chip *chip = mtd->priv;
-+	unsigned long *ptr = (unsigned long *)buf;
-+
-+	len >>= 2;
-+	for (i = 0; i < len; i++)
-+		ptr[i] = readl(chip->IO_ADDR_R);
-+}
-+
-+/**
-+ * xnandps_write_buf - write buffer to chip
-+ * @mtd:        MTD device structure
-+ * @buf:        data buffer
-+ * @len:        number of bytes to write
-+ *
-+ */
-+static void xnandps_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
-+{
-+	int i;
-+	struct nand_chip *chip = mtd->priv;
-+	unsigned long *ptr = (unsigned long *)buf;
-+	len >>= 2;
-+
-+	for (i = 0; i < len; i++)
-+		writel(ptr[i], chip->IO_ADDR_W);
-+}
-+
-+/**
-+ * xnandps_device_ready - Check device ready/busy line
-+ * @mtd:	Pointer to the mtd_info structure
-+ *
-+ * returns:	0 on busy or 1 on ready state
-+ **/
-+static int xnandps_device_ready(struct mtd_info *mtd)
-+{
-+	if (xsmcps_get_nand_int_status_raw()) {
-+		xsmcps_clr_nand_int();
-+		return 1;
-+	}
-+	return 0;
-+}
-+
-+/**
-+ * xnandps_probe - Probe method for the NAND driver
-+ * @pdev:	Pointer to the platform_device structure
-+ *
-+ * This function initializes the driver data structures and the hardware.
-+ *
-+ * returns:	0 on success or error value on failure
-+ **/
-+static int xnandps_probe(struct platform_device *pdev)
-+{
-+	struct xnandps_info *xnand;
-+	struct mtd_info *mtd;
-+	struct nand_chip *nand_chip;
-+	struct resource *nand_res;
-+	u8 maf_id, dev_id, i;
-+	u8 get_feature;
-+	u8 set_feature[4] = {0x08, 0x00, 0x00, 0x00};
-+	int ondie_ecc_enabled = 0;
-+	struct mtd_part_parser_data ppdata;
-+	const unsigned int *prop;
-+	u32 options = 0;
-+
-+	xnand = devm_kzalloc(&pdev->dev, sizeof(struct xnandps_info),
-+					GFP_KERNEL);
-+	if (!xnand)
-+		return -ENOMEM;
-+
-+	/* Map physical address of NAND flash */
-+	nand_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+	xnand->nand_base = devm_ioremap_resource(&pdev->dev, nand_res);
-+	if (IS_ERR(xnand->nand_base)) {
-+		dev_err(&pdev->dev, "ioremap for NAND failed\n");
-+		return PTR_ERR(xnand->nand_base);
-+	}
-+
-+	/* Get x8 or x16 mode from device tree */
-+	prop = of_get_property(pdev->dev.of_node, "xlnx,nand-width", NULL);
-+	if (prop) {
-+		if (be32_to_cpup(prop) == 16) {
-+			options |= NAND_BUSWIDTH_16;
-+		} else if (be32_to_cpup(prop) == 8) {
-+			options &= ~NAND_BUSWIDTH_16;
-+		} else {
-+			dev_info(&pdev->dev, "xlnx,nand-width not valid, using 8");
-+			options &= ~NAND_BUSWIDTH_16;
-+		}
-+	} else {
-+		dev_info(&pdev->dev, "xlnx,nand-width not in device tree, using 8");
-+		options &= ~NAND_BUSWIDTH_16;
-+	}
-+
-+	/* Link the private data with the MTD structure */
-+	mtd = &xnand->mtd;
-+	nand_chip = &xnand->chip;
-+
-+	nand_chip->priv = xnand;
-+	mtd->priv = nand_chip;
-+	mtd->owner = THIS_MODULE;
-+	mtd->name = "xilinx_nand";
-+
-+	/* Set address of NAND IO lines */
-+	nand_chip->IO_ADDR_R = xnand->nand_base;
-+	nand_chip->IO_ADDR_W = xnand->nand_base;
-+
-+	/* Set the driver entry points for MTD */
-+	nand_chip->cmdfunc = xnandps_cmd_function;
-+	nand_chip->dev_ready = xnandps_device_ready;
-+	nand_chip->select_chip = xnandps_select_chip;
-+
-+	/* If we don't set this delay driver sets 20us by default */
-+	nand_chip->chip_delay = 30;
-+
-+	/* Buffer read/write routines */
-+	nand_chip->read_buf = xnandps_read_buf;
-+	nand_chip->write_buf = xnandps_write_buf;
-+
-+	/* Set the device option and flash width */
-+	nand_chip->options = options;
-+	nand_chip->bbt_options = NAND_BBT_USE_FLASH;
-+
-+	platform_set_drvdata(pdev, xnand);
-+
-+	/* first scan to find the device and get the page size */
-+	if (nand_scan_ident(mtd, 1, NULL)) {
-+		dev_err(&pdev->dev, "nand_scan_ident for NAND failed\n");
-+		return -ENXIO;
-+	}
-+
-+	/* Check if On-Die ECC flash */
-+	nand_chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
-+	nand_chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
-+
-+	/* Read manufacturer and device IDs */
-+	maf_id = nand_chip->read_byte(mtd);
-+	dev_id = nand_chip->read_byte(mtd);
-+
-+	if ((maf_id == 0x2c) &&
-+				((dev_id == 0xf1) || (dev_id == 0xa1) ||
-+				(dev_id == 0xb1) ||
-+				(dev_id == 0xaa) || (dev_id == 0xba) ||
-+				(dev_id == 0xda) || (dev_id == 0xca) ||
-+				(dev_id == 0xac) || (dev_id == 0xbc) ||
-+				(dev_id == 0xdc) || (dev_id == 0xcc) ||
-+				(dev_id == 0xa3) || (dev_id == 0xb3) ||
-+				(dev_id == 0xd3) || (dev_id == 0xc3))) {
-+
-+		nand_chip->cmdfunc(mtd, NAND_CMD_GET_FEATURES,
-+						ONDIE_ECC_FEATURE_ADDR, -1);
-+		get_feature = nand_chip->read_byte(mtd);
-+
-+		if (get_feature & 0x08) {
-+			ondie_ecc_enabled = 1;
-+		} else {
-+			nand_chip->cmdfunc(mtd, NAND_CMD_SET_FEATURES,
-+						ONDIE_ECC_FEATURE_ADDR, -1);
-+			for (i = 0; i < 4; i++)
-+				writeb(set_feature[i], nand_chip->IO_ADDR_W);
-+
-+			ndelay(1000);
-+
-+			nand_chip->cmdfunc(mtd, NAND_CMD_GET_FEATURES,
-+						ONDIE_ECC_FEATURE_ADDR, -1);
-+			get_feature = nand_chip->read_byte(mtd);
-+
-+			if (get_feature & 0x08)
-+				ondie_ecc_enabled = 1;
-+		}
-+	}
-+
-+	nand_chip->ecc.mode = NAND_ECC_HW;
-+	nand_chip->ecc.read_oob = xnandps_read_oob;
-+	nand_chip->ecc.read_page_raw = xnandps_read_page_raw;
-+	nand_chip->ecc.strength = 1;
-+	nand_chip->ecc.write_oob = xnandps_write_oob;
-+	nand_chip->ecc.write_page_raw = xnandps_write_page_raw;
-+	if (ondie_ecc_enabled) {
-+		/* bypass the controller ECC block */
-+		xsmcps_set_ecc_mode(XSMCPS_ECCMODE_BYPASS);
-+
-+		/* The software ECC routines won't work with the
-+				SMC controller */
-+		nand_chip->ecc.bytes = 0;
-+		nand_chip->ecc.layout = &ondie_nand_oob_64;
-+		nand_chip->ecc.read_page = xnandps_read_page_raw;
-+		nand_chip->ecc.write_page = xnandps_write_page_raw;
-+		nand_chip->ecc.size = mtd->writesize;
-+		/* On-Die ECC spare bytes offset 8 is used for ECC codes */
-+		/* Use the BBT pattern descriptors */
-+		nand_chip->bbt_td = &bbt_main_descr;
-+		nand_chip->bbt_md = &bbt_mirror_descr;
-+	} else {
-+		/* Hardware ECC generates 3 bytes ECC code for each 512 bytes */
-+		nand_chip->ecc.bytes = 3;
-+		nand_chip->ecc.calculate = xnandps_calculate_hwecc;
-+		nand_chip->ecc.correct = xnandps_correct_data;
-+		nand_chip->ecc.hwctl = NULL;
-+		nand_chip->ecc.read_page = xnandps_read_page_hwecc;
-+		nand_chip->ecc.size = XNANDPS_ECC_SIZE;
-+		nand_chip->ecc.write_page = xnandps_write_page_hwecc;
-+
-+		xsmcps_set_ecc_pg_size(mtd->writesize);
-+		switch (mtd->writesize) {
-+		case 512:
-+		case 1024:
-+		case 2048:
-+			xsmcps_set_ecc_mode(XSMCPS_ECCMODE_APB);
-+			break;
-+		default:
-+			/* The software ECC routines won't work with the
-+				SMC controller */
-+			nand_chip->ecc.calculate = nand_calculate_ecc;
-+			nand_chip->ecc.correct = nand_correct_data;
-+			nand_chip->ecc.read_page = xnandps_read_page_swecc;
-+			/* nand_chip->ecc.read_subpage = nand_read_subpage; */
-+			nand_chip->ecc.write_page = xnandps_write_page_swecc;
-+			nand_chip->ecc.size = 256;
-+			break;
-+		}
-+
-+		if (mtd->oobsize == 16)
-+			nand_chip->ecc.layout = &nand_oob_16;
-+		else if (mtd->oobsize == 64)
-+			nand_chip->ecc.layout = &nand_oob_64;
-+	}
-+
-+	/* second phase scan */
-+	if (nand_scan_tail(mtd)) {
-+		dev_err(&pdev->dev, "nand_scan_tail for NAND failed\n");
-+		return -ENXIO;
-+	}
-+
-+	ppdata.of_node = pdev->dev.of_node;
-+
-+	mtd_device_parse_register(&xnand->mtd, NULL, &ppdata,
-+			NULL, 0);
-+
-+	return 0;
-+}
-+
-+/**
-+ * xnandps_remove - Remove method for the NAND driver
-+ * @pdev:	Pointer to the platform_device structure
-+ *
-+ * This function is called if the driver module is being unloaded. It frees all
-+ * resources allocated to the device.
-+ *
-+ * returns:	0 on success or error value on failure
-+ **/
-+static int xnandps_remove(struct platform_device *pdev)
-+{
-+	struct xnandps_info *xnand = platform_get_drvdata(pdev);
-+
-+	/* Release resources, unregister device */
-+	nand_release(&xnand->mtd);
-+	/* kfree(NULL) is safe */
-+	kfree(xnand->parts);
-+
-+	return 0;
-+}
-+
-+/* Match table for device tree binding */
-+static const struct of_device_id xnandps_of_match[] = {
-+	{ .compatible = "xlnx,ps7-nand-1.00.a" },
-+	{},
-+};
-+MODULE_DEVICE_TABLE(of, xnandps_of_match);
-+
-+/*
-+ * xnandps_driver - This structure defines the NAND subsystem platform driver
-+ */
-+static struct platform_driver xnandps_driver = {
-+	.probe		= xnandps_probe,
-+	.remove		= xnandps_remove,
-+	.driver		= {
-+		.name	= XNANDPS_DRIVER_NAME,
-+		.owner	= THIS_MODULE,
-+		.of_match_table = xnandps_of_match,
-+	},
-+};
-+
-+module_platform_driver(xnandps_driver);
-+
-+MODULE_AUTHOR("Xilinx, Inc.");
-+MODULE_ALIAS("platform:" XNANDPS_DRIVER_NAME);
-+MODULE_DESCRIPTION("Xilinx PS NAND Flash Driver");
-+MODULE_LICENSE("GPL");
diff --git a/patches.zynq/0008-arm-zynq-hotplug-Remove-unreachable-code.patch b/patches.zynq/0008-arm-zynq-hotplug-Remove-unreachable-code.patch
deleted file mode 100644
index c3f5cd5cff07d..0000000000000
--- a/patches.zynq/0008-arm-zynq-hotplug-Remove-unreachable-code.patch
+++ /dev/null
@@ -1,96 +0,0 @@
-From ffe4cca718489eddaa6a98f2587388b7e6539a35 Mon Sep 17 00:00:00 2001
-From: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Date: Thu, 1 Aug 2013 09:36:53 -0700
-Subject: arm: zynq: hotplug: Remove unreachable code
-
-zynq_platform_do_lowpower() does never return. Hence remove
-all code which relies on that function returning and consolidate the
-remains.
-
-Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-(cherry picked from commit b522877b53cf3f26d7f072616a45e10fe579cd19)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- arch/arm/mach-zynq/hotplug.c | 55 ++++----------------------------------------
- 1 file changed, 5 insertions(+), 50 deletions(-)
-
-diff --git a/arch/arm/mach-zynq/hotplug.c b/arch/arm/mach-zynq/hotplug.c
-index c89672bd1de2..5052c70326e4 100644
---- a/arch/arm/mach-zynq/hotplug.c
-+++ b/arch/arm/mach-zynq/hotplug.c
-@@ -40,44 +40,6 @@ static inline void zynq_cpu_enter_lowpower(void)
- 	  : "cc");
- }
- 
--static inline void zynq_cpu_leave_lowpower(void)
--{
--	unsigned int v;
--
--	asm volatile(
--	"	mrc	p15, 0, %0, c1, c0, 0\n"
--	"	orr	%0, %0, %1\n"
--	"	mcr	p15, 0, %0, c1, c0, 0\n"
--	"	mrc	p15, 0, %0, c1, c0, 1\n"
--	"	orr	%0, %0, #0x40\n"
--	"	mcr	p15, 0, %0, c1, c0, 1\n"
--	  : "=&r" (v)
--	  : "Ir" (CR_C)
--	  : "cc");
--}
--
--static inline void zynq_platform_do_lowpower(unsigned int cpu, int *spurious)
--{
--	/*
--	 * there is no power-control hardware on this platform, so all
--	 * we can do is put the core into WFI; this is safe as the calling
--	 * code will have already disabled interrupts
--	 */
--	for (;;) {
--		dsb();
--		wfi();
--
--		/*
--		 * Getting here, means that we have come out of WFI without
--		 * having been woken up - this shouldn't happen
--		 *
--		 * Just note it happening - when we're woken, we can report
--		 * its occurrence.
--		 */
--		(*spurious)++;
--	}
--}
--
- /*
-  * platform-specific code to shutdown a CPU
-  *
-@@ -85,20 +47,13 @@ static inline void zynq_platform_do_lowpower(unsigned int cpu, int *spurious)
-  */
- void zynq_platform_cpu_die(unsigned int cpu)
- {
--	int spurious = 0;
--
--	/*
--	 * we're ready for shutdown now, so do it
--	 */
- 	zynq_cpu_enter_lowpower();
--	zynq_platform_do_lowpower(cpu, &spurious);
- 
- 	/*
--	 * bring this CPU back into the world of cache
--	 * coherency, and then restore interrupts
-+	 * there is no power-control hardware on this platform, so all
-+	 * we can do is put the core into WFI; this is safe as the calling
-+	 * code will have already disabled interrupts
- 	 */
--	zynq_cpu_leave_lowpower();
--
--	if (spurious)
--		pr_warn("CPU%u: %u spurious wakeup calls\n", cpu, spurious);
-+	for (;;)
-+		cpu_do_idle();
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0008-watchdog-xilinx-merge-support-for-xilinx-watchdog.patch b/patches.zynq/0008-watchdog-xilinx-merge-support-for-xilinx-watchdog.patch
deleted file mode 100644
index 4e8af989cceb4..0000000000000
--- a/patches.zynq/0008-watchdog-xilinx-merge-support-for-xilinx-watchdog.patch
+++ /dev/null
@@ -1,619 +0,0 @@
-From 55f1815cb899dc0bb48c250bf753c12ead069f27 Mon Sep 17 00:00:00 2001
-From: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Date: Tue, 24 Dec 2013 09:22:35 +0900
-Subject: watchdog: xilinx: merge support for xilinx watchdog
-
-This merges support for the Xilinx watchdong from the Xilinx
-repository (commit efc27505715e64526653f35274717c0fc56491e3 in
-master branch). It has been tested by using the watchdog
-command.
-
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/watchdog/Kconfig         |   11 
- drivers/watchdog/Makefile        |    1 
- drivers/watchdog/of_xilinx_wdt.c |    1 
- drivers/watchdog/xilinx_wdtps.c  |  545 +++++++++++++++++++++++++++++++++++++++
- 4 files changed, 557 insertions(+), 1 deletion(-)
- create mode 100644 drivers/watchdog/xilinx_wdtps.c
-
---- a/drivers/watchdog/Kconfig
-+++ b/drivers/watchdog/Kconfig
-@@ -224,6 +224,7 @@ config DW_WATCHDOG
- config MPCORE_WATCHDOG
- 	tristate "MPcore watchdog"
- 	depends on HAVE_ARM_TWD
-+	select WATCHDOG_CORE
- 	help
- 	  Watchdog timer embedded into the MPcore system.
- 
-@@ -337,6 +338,14 @@ config NUC900_WATCHDOG
- 	  To compile this driver as a module, choose M here: the
- 	  module will be called nuc900_wdt.
- 
-+config XILINX_PS_WATCHDOG
-+	tristate "Xilinx PS Watchdog Timer"
-+	depends on ARCH_ZYNQ
-+	select WATCHDOG_CORE
-+	help
-+	  Say Y here if you want to include support for the watchdog
-+	  timer in the Xilinx PS.
-+
- config TS72XX_WATCHDOG
- 	tristate "TS-72XX SBC Watchdog"
- 	depends on MACH_TS72XX
-@@ -976,7 +985,7 @@ config M54xx_WATCHDOG
- 
- config XILINX_WATCHDOG
- 	tristate "Xilinx Watchdog timer"
--	depends on MICROBLAZE
-+	depends on MICROBLAZE || ARCH_ZYNQ
- 	---help---
- 	  Watchdog driver for the xps_timebase_wdt ip core.
- 
---- a/drivers/watchdog/Makefile
-+++ b/drivers/watchdog/Makefile
-@@ -50,6 +50,7 @@ obj-$(CONFIG_ORION_WATCHDOG) += orion_wd
- obj-$(CONFIG_COH901327_WATCHDOG) += coh901327_wdt.o
- obj-$(CONFIG_STMP3XXX_RTC_WATCHDOG) += stmp3xxx_rtc_wdt.o
- obj-$(CONFIG_NUC900_WATCHDOG) += nuc900_wdt.o
-+obj-$(CONFIG_XILINX_PS_WATCHDOG) += xilinx_wdtps.o
- obj-$(CONFIG_TS72XX_WATCHDOG) += ts72xx_wdt.o
- obj-$(CONFIG_IMX2_WDT) += imx2_wdt.o
- obj-$(CONFIG_UX500_WATCHDOG) += ux500_wdt.o
---- a/drivers/watchdog/of_xilinx_wdt.c
-+++ b/drivers/watchdog/of_xilinx_wdt.c
-@@ -405,3 +405,4 @@ module_platform_driver(xwdt_driver);
- MODULE_AUTHOR("Alejandro Cabrera <aldaya@gmail.com>");
- MODULE_DESCRIPTION("Xilinx Watchdog driver");
- MODULE_LICENSE("GPL v2");
-+MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
---- /dev/null
-+++ b/drivers/watchdog/xilinx_wdtps.c
-@@ -0,0 +1,545 @@
-+/*
-+ * Xilinx Zynq WDT driver
-+ *
-+ * Copyright (c) 2010-2013 Xilinx Inc.
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License
-+ * as published by the Free Software Foundation; either version
-+ * 2 of the License, or (at your option) any later version.
-+ *
-+ * You should have received a copy of the GNU General Public
-+ * License along with this program; if not, write to the Free
-+ * Software Foundation, Inc., 675 Mass Ave, Cambridge, MA
-+ * 02139, USA.
-+ */
-+
-+#include <linux/clk.h>
-+#include <linux/export.h>
-+#include <linux/fs.h>
-+#include <linux/init.h>
-+#include <linux/interrupt.h>
-+#include <linux/io.h>
-+#include <linux/irq.h>
-+#include <linux/kernel.h>
-+#include <linux/miscdevice.h>
-+#include <linux/module.h>
-+#include <linux/of.h>
-+#include <linux/platform_device.h>
-+#include <linux/reboot.h>
-+#include <linux/slab.h>
-+#include <linux/uaccess.h>
-+#include <linux/watchdog.h>
-+
-+#define XWDTPS_DEFAULT_TIMEOUT	10
-+/* Supports 1 - 516 sec */
-+#define XWDTPS_MIN_TIMEOUT	1
-+#define XWDTPS_MAX_TIMEOUT	516
-+
-+static int wdt_timeout = XWDTPS_DEFAULT_TIMEOUT;
-+static int nowayout = WATCHDOG_NOWAYOUT;
-+
-+module_param(wdt_timeout, int, 0);
-+MODULE_PARM_DESC(wdt_timeout,
-+		 "Watchdog time in seconds. (default="
-+		 __MODULE_STRING(XWDTPS_DEFAULT_TIMEOUT) ")");
-+
-+module_param(nowayout, int, 0);
-+MODULE_PARM_DESC(nowayout,
-+		 "Watchdog cannot be stopped once started (default="
-+		 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
-+
-+/**
-+ * struct xwdtps - Watchdog device structure.
-+ * @regs: baseaddress of device.
-+ * @busy: flag for the device.
-+ *
-+ * Structure containing parameters specific to ps watchdog.
-+ */
-+struct xwdtps {
-+	void __iomem		*regs;		/* Base address */
-+	unsigned long		busy;		/* Device Status */
-+	int			rst;		/* Reset flag */
-+	struct clk		*clk;
-+	u32			prescalar;
-+	u32			ctrl_clksel;
-+	spinlock_t		io_lock;
-+};
-+static struct xwdtps *wdt;
-+
-+/*
-+ * Info structure used to indicate the features supported by the device
-+ * to the upper layers. This is defined in watchdog.h header file.
-+ */
-+static struct watchdog_info xwdtps_info = {
-+	.identity	= "xwdtps watchdog",
-+	.options	= WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING |
-+				WDIOF_MAGICCLOSE,
-+};
-+
-+/* Write access to Registers */
-+#define xwdtps_writereg(val, offset) __raw_writel(val, (wdt->regs) + offset)
-+
-+/*************************Register Map**************************************/
-+
-+/* Register Offsets for the WDT */
-+#define XWDTPS_ZMR_OFFSET	0x0	/* Zero Mode Register */
-+#define XWDTPS_CCR_OFFSET	0x4	/* Counter Control Register */
-+#define XWDTPS_RESTART_OFFSET	0x8	/* Restart Register */
-+#define XWDTPS_SR_OFFSET	0xC	/* Status Register */
-+
-+/*
-+ * Zero Mode Register - This register controls how the time out is indicated
-+ * and also contains the access code to allow writes to the register (0xABC).
-+ */
-+#define XWDTPS_ZMR_WDEN_MASK	0x00000001 /* Enable the WDT */
-+#define XWDTPS_ZMR_RSTEN_MASK	0x00000002 /* Enable the reset output */
-+#define XWDTPS_ZMR_IRQEN_MASK	0x00000004 /* Enable IRQ output */
-+#define XWDTPS_ZMR_RSTLEN_16	0x00000030 /* Reset pulse of 16 pclk cycles */
-+#define XWDTPS_ZMR_ZKEY_VAL	0x00ABC000 /* Access key, 0xABC << 12 */
-+/*
-+ * Counter Control register - This register controls how fast the timer runs
-+ * and the reset value and also contains the access code to allow writes to
-+ * the register.
-+ */
-+#define XWDTPS_CCR_CRV_MASK	0x00003FFC /* Counter reset value */
-+
-+/**
-+ * xwdtps_stop -  Stop the watchdog.
-+ *
-+ * Read the contents of the ZMR register, clear the WDEN bit
-+ * in the register and set the access key for successful write.
-+ */
-+static int xwdtps_stop(struct watchdog_device *wdd)
-+{
-+	spin_lock(&wdt->io_lock);
-+	xwdtps_writereg((XWDTPS_ZMR_ZKEY_VAL & (~XWDTPS_ZMR_WDEN_MASK)),
-+			 XWDTPS_ZMR_OFFSET);
-+	spin_unlock(&wdt->io_lock);
-+	return 0;
-+}
-+
-+/**
-+ * xwdtps_reload -  Reload the watchdog timer (i.e. pat the watchdog).
-+ *
-+ * Write the restart key value (0x00001999) to the restart register.
-+ */
-+static int xwdtps_reload(struct watchdog_device *wdd)
-+{
-+	spin_lock(&wdt->io_lock);
-+	xwdtps_writereg(0x00001999, XWDTPS_RESTART_OFFSET);
-+	spin_unlock(&wdt->io_lock);
-+	return 0;
-+}
-+
-+/**
-+ * xwdtps_start -  Enable and start the watchdog.
-+ *
-+ * The counter value is calculated according to the formula:
-+ *		calculated count = (timeout * clock) / prescalar + 1.
-+ * The calculated count is divided by 0x1000 to obtain the field value
-+ * to write to counter control register.
-+ * Clears the contents of prescalar and counter reset value. Sets the
-+ * prescalar to 4096 and the calculated count and access key
-+ * to write to CCR Register.
-+ * Sets the WDT (WDEN bit) and either the Reset signal(RSTEN bit)
-+ * or Interrupt signal(IRQEN) with a specified cycles and the access
-+ * key to write to ZMR Register.
-+ */
-+static int xwdtps_start(struct watchdog_device *wdd)
-+{
-+	unsigned int data = 0;
-+	unsigned short count;
-+	unsigned long clock_f = clk_get_rate(wdt->clk);
-+
-+	/*
-+	 * 0x1000	- Counter Value Divide, to obtain the value of counter
-+	 *		  reset to write to control register.
-+	 */
-+	count = (wdd->timeout * (clock_f / (wdt->prescalar))) / 0x1000 + 1;
-+
-+	/* Check for boundary conditions of counter value */
-+	if (count > 0xFFF)
-+		count = 0xFFF;
-+
-+	spin_lock(&wdt->io_lock);
-+	xwdtps_writereg(XWDTPS_ZMR_ZKEY_VAL, XWDTPS_ZMR_OFFSET);
-+
-+	/* Shift the count value to correct bit positions */
-+	count = (count << 2) & XWDTPS_CCR_CRV_MASK;
-+
-+	/* 0x00920000 - Counter register key value. */
-+	data = (count | 0x00920000 | (wdt->ctrl_clksel));
-+	xwdtps_writereg(data, XWDTPS_CCR_OFFSET);
-+	data = XWDTPS_ZMR_WDEN_MASK | XWDTPS_ZMR_RSTLEN_16 |
-+			XWDTPS_ZMR_ZKEY_VAL;
-+
-+	/* Reset on timeout if specified in device tree. */
-+	if (wdt->rst) {
-+		data |= XWDTPS_ZMR_RSTEN_MASK;
-+		data &= ~XWDTPS_ZMR_IRQEN_MASK;
-+	} else {
-+		data &= ~XWDTPS_ZMR_RSTEN_MASK;
-+		data |= XWDTPS_ZMR_IRQEN_MASK;
-+	}
-+	xwdtps_writereg(data, XWDTPS_ZMR_OFFSET);
-+	spin_unlock(&wdt->io_lock);
-+	xwdtps_writereg(0x00001999, XWDTPS_RESTART_OFFSET);
-+	return 0;
-+}
-+
-+/**
-+ * xwdtps_settimeout -  Set a new timeout value for the watchdog device.
-+ *
-+ * @new_time: new timeout value that needs to be set.
-+ * Returns 0 on success.
-+ *
-+ * Update the watchdog_device timeout with new value which is used when
-+ * xwdtps_start is called.
-+ */
-+static int xwdtps_settimeout(struct watchdog_device *wdd, unsigned int new_time)
-+{
-+	wdd->timeout = new_time;
-+	return xwdtps_start(wdd);
-+}
-+
-+/**
-+ * xwdtps_irq_handler - Notifies of watchdog timeout.
-+ *
-+ * @irq: interrupt number
-+ * @dev_id: pointer to a platform device structure
-+ * Returns IRQ_HANDLED
-+ *
-+ * The handler is invoked when the watchdog times out and a
-+ * reset on timeout has not been enabled.
-+ */
-+static irqreturn_t xwdtps_irq_handler(int irq, void *dev_id)
-+{
-+	struct platform_device *pdev = dev_id;
-+	dev_info(&pdev->dev, "Watchdog timed out.\n");
-+	return IRQ_HANDLED;
-+}
-+
-+/* Watchdog Core Ops */
-+static struct watchdog_ops xwdtps_ops = {
-+	.owner = THIS_MODULE,
-+	.start = xwdtps_start,
-+	.stop = xwdtps_stop,
-+	.ping = xwdtps_reload,
-+	.set_timeout = xwdtps_settimeout,
-+};
-+
-+/* Watchdog Core Device */
-+static struct watchdog_device xwdtps_device = {
-+	.info = &xwdtps_info,
-+	.ops = &xwdtps_ops,
-+	.timeout = XWDTPS_DEFAULT_TIMEOUT,
-+	.min_timeout = XWDTPS_MIN_TIMEOUT,
-+	.max_timeout = XWDTPS_MAX_TIMEOUT,
-+};
-+
-+/**
-+ * xwdtps_notify_sys -  Notifier for reboot or shutdown.
-+ *
-+ * @this: handle to notifier block.
-+ * @code: turn off indicator.
-+ * @unused: unused.
-+ * Returns NOTIFY_DONE.
-+ *
-+ * This notifier is invoked whenever the system reboot or shutdown occur
-+ * because we need to disable the WDT before system goes down as WDT might
-+ * reset on the next boot.
-+ */
-+static int xwdtps_notify_sys(struct notifier_block *this, unsigned long code,
-+			      void *unused)
-+{
-+	if (code == SYS_DOWN || code == SYS_HALT)
-+		/* Stop the watchdog */
-+		xwdtps_stop(&xwdtps_device);
-+	return NOTIFY_DONE;
-+}
-+
-+/* Notifier Structure */
-+static struct notifier_block xwdtps_notifier = {
-+	.notifier_call = xwdtps_notify_sys,
-+};
-+
-+/************************Platform Operations*****************************/
-+/**
-+ * xwdtps_probe -  Probe call for the device.
-+ *
-+ * @pdev: handle to the platform device structure.
-+ * Returns 0 on success, negative error otherwise.
-+ *
-+ * It does all the memory allocation and registration for the device.
-+ */
-+static int xwdtps_probe(struct platform_device *pdev)
-+{
-+	struct resource *regs;
-+	int res;
-+	const void *prop;
-+	int irq;
-+	unsigned long clock_f;
-+
-+	/* Check whether WDT is in use, just for safety */
-+	if (wdt) {
-+		dev_err(&pdev->dev,
-+			    "Device Busy, only 1 xwdtps instance supported.\n");
-+		return -EBUSY;
-+	}
-+
-+	/* Get the device base address */
-+	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+	if (!regs) {
-+		dev_err(&pdev->dev, "Unable to locate mmio resource\n");
-+		return -ENODEV;
-+	}
-+
-+	/* Allocate an instance of the xwdtps structure */
-+	wdt = kzalloc(sizeof(*wdt), GFP_KERNEL);
-+	if (!wdt) {
-+		dev_err(&pdev->dev, "No memory for wdt structure\n");
-+		return -ENOMEM;
-+	}
-+
-+	wdt->regs = ioremap(regs->start, regs->end - regs->start + 1);
-+	if (!wdt->regs) {
-+		res = -ENOMEM;
-+		dev_err(&pdev->dev, "Could not map I/O memory\n");
-+		goto err_free;
-+	}
-+
-+	/* Register the reboot notifier */
-+	res = register_reboot_notifier(&xwdtps_notifier);
-+	if (res != 0) {
-+		dev_err(&pdev->dev, "cannot register reboot notifier err=%d)\n",
-+			res);
-+		goto err_iounmap;
-+	}
-+
-+	/* Register the interrupt */
-+	prop = of_get_property(pdev->dev.of_node, "reset", NULL);
-+	wdt->rst = prop ? be32_to_cpup(prop) : 0;
-+	irq = platform_get_irq(pdev, 0);
-+	if (!wdt->rst && irq >= 0) {
-+		res = request_irq(irq, xwdtps_irq_handler, 0, pdev->name, pdev);
-+		if (res) {
-+			dev_err(&pdev->dev,
-+				   "cannot register interrupt handler err=%d\n",
-+				   res);
-+			goto err_notifier;
-+		}
-+	}
-+
-+	/* Initialize the members of xwdtps structure */
-+	xwdtps_device.parent = &pdev->dev;
-+	prop = of_get_property(pdev->dev.of_node, "timeout", NULL);
-+	if (prop) {
-+		xwdtps_device.timeout = be32_to_cpup(prop);
-+	} else if (wdt_timeout < XWDTPS_MAX_TIMEOUT &&
-+			wdt_timeout > XWDTPS_MIN_TIMEOUT) {
-+		xwdtps_device.timeout = wdt_timeout;
-+	} else {
-+		dev_info(&pdev->dev,
-+			    "timeout limited to 1 - %d sec, using default=%d\n",
-+			    XWDTPS_MAX_TIMEOUT, XWDTPS_DEFAULT_TIMEOUT);
-+		xwdtps_device.timeout = XWDTPS_DEFAULT_TIMEOUT;
-+	}
-+
-+	watchdog_set_nowayout(&xwdtps_device, nowayout);
-+	watchdog_set_drvdata(&xwdtps_device, &wdt);
-+
-+	wdt->clk = clk_get(&pdev->dev, NULL);
-+	if (IS_ERR(wdt->clk)) {
-+		dev_err(&pdev->dev, "input clock not found\n");
-+		res = PTR_ERR(wdt->clk);
-+		goto err_irq;
-+	}
-+
-+	res = clk_prepare_enable(wdt->clk);
-+	if (res) {
-+		dev_err(&pdev->dev, "unable to enable clock\n");
-+		goto err_clk_put;
-+	}
-+
-+	clock_f = clk_get_rate(wdt->clk);
-+	if (clock_f <= 10000000) {/* For PEEP */
-+		wdt->prescalar = 64;
-+		wdt->ctrl_clksel = 1;
-+	} else if (clock_f <= 75000000) {
-+		wdt->prescalar = 256;
-+		wdt->ctrl_clksel = 2;
-+	} else { /* For Zynq */
-+		wdt->prescalar = 4096;
-+		wdt->ctrl_clksel = 3;
-+	}
-+
-+	/* Initialize the busy flag to zero */
-+	clear_bit(0, &wdt->busy);
-+	spin_lock_init(&wdt->io_lock);
-+
-+	/* Register the WDT */
-+	res = watchdog_register_device(&xwdtps_device);
-+	if (res) {
-+		dev_err(&pdev->dev, "Failed to register wdt device\n");
-+		goto err_clk_disable;
-+	}
-+	platform_set_drvdata(pdev, wdt);
-+
-+	dev_info(&pdev->dev, "Xilinx Watchdog Timer at %p with timeout %ds%s\n",
-+		wdt->regs, xwdtps_device.timeout, nowayout ? ", nowayout" : "");
-+
-+	return 0;
-+
-+err_clk_disable:
-+	clk_disable_unprepare(wdt->clk);
-+err_clk_put:
-+	clk_put(wdt->clk);
-+err_irq:
-+	free_irq(irq, pdev);
-+err_notifier:
-+	unregister_reboot_notifier(&xwdtps_notifier);
-+err_iounmap:
-+	iounmap(wdt->regs);
-+err_free:
-+	kfree(wdt);
-+	wdt = NULL;
-+	return res;
-+}
-+
-+/**
-+ * xwdtps_remove -  Probe call for the device.
-+ *
-+ * @pdev: handle to the platform device structure.
-+ * Returns 0 on success, otherwise negative error.
-+ *
-+ * Unregister the device after releasing the resources.
-+ * Stop is allowed only when nowayout is disabled.
-+ */
-+static int __exit xwdtps_remove(struct platform_device *pdev)
-+{
-+	int res = 0;
-+	int irq;
-+
-+	if (wdt && !nowayout) {
-+		xwdtps_stop(&xwdtps_device);
-+		watchdog_unregister_device(&xwdtps_device);
-+		unregister_reboot_notifier(&xwdtps_notifier);
-+		irq = platform_get_irq(pdev, 0);
-+		free_irq(irq, pdev);
-+		iounmap(wdt->regs);
-+		clk_disable_unprepare(wdt->clk);
-+		clk_put(wdt->clk);
-+		kfree(wdt);
-+		wdt = NULL;
-+		platform_set_drvdata(pdev, NULL);
-+	} else {
-+		dev_err(&pdev->dev, "Cannot stop watchdog, still ticking\n");
-+		return -ENOTSUPP;
-+	}
-+	return res;
-+}
-+
-+/**
-+ * xwdtps_shutdown -  Stop the device.
-+ *
-+ * @pdev: handle to the platform structure.
-+ *
-+ */
-+static void xwdtps_shutdown(struct platform_device *pdev)
-+{
-+	/* Stop the device */
-+	xwdtps_stop(&xwdtps_device);
-+	clk_disable_unprepare(wdt->clk);
-+	clk_put(wdt->clk);
-+}
-+
-+#ifdef CONFIG_PM_SLEEP
-+/**
-+ * xwdtps_suspend -  Stop the device.
-+ *
-+ * @dev: handle to the device structure.
-+ * Returns 0 always.
-+ */
-+static int xwdtps_suspend(struct device *dev)
-+{
-+	/* Stop the device */
-+	xwdtps_stop(&xwdtps_device);
-+	clk_disable(wdt->clk);
-+	return 0;
-+}
-+
-+/**
-+ * xwdtps_resume -  Resume the device.
-+ *
-+ * @dev: handle to the device structure.
-+ * Returns 0 on success, errno otherwise.
-+ */
-+static int xwdtps_resume(struct device *dev)
-+{
-+	int ret;
-+
-+	ret = clk_enable(wdt->clk);
-+	if (ret) {
-+		dev_err(dev, "unable to enable clock\n");
-+		return ret;
-+	}
-+	/* Start the device */
-+	xwdtps_start(&xwdtps_device);
-+	return 0;
-+}
-+#endif
-+
-+static SIMPLE_DEV_PM_OPS(xwdtps_pm_ops, xwdtps_suspend, xwdtps_resume);
-+
-+static struct of_device_id xwdtps_of_match[] = {
-+	{ .compatible = "xlnx,ps7-wdt-1.00.a", },
-+	{ /* end of table */}
-+};
-+MODULE_DEVICE_TABLE(of, xwdtps_of_match);
-+
-+/* Driver Structure */
-+static struct platform_driver xwdtps_driver = {
-+	.probe		= xwdtps_probe,
-+	.remove		= xwdtps_remove,
-+	.shutdown	= xwdtps_shutdown,
-+	.driver		= {
-+		.name	= "xwdtps",
-+		.owner	= THIS_MODULE,
-+		.of_match_table = xwdtps_of_match,
-+		.pm	= &xwdtps_pm_ops,
-+	},
-+};
-+
-+/**
-+ * xwdtps_init -  Register the WDT.
-+ *
-+ * Returns 0 on success, otherwise negative error.
-+ *
-+ * If using noway out, the use count will be incremented.
-+ * This will prevent unloading the module. An attempt to
-+ * unload the module will result in a warning from the kernel.
-+ */
-+static int __init xwdtps_init(void)
-+{
-+	int res = platform_driver_register(&xwdtps_driver);
-+	if (!res && nowayout)
-+		try_module_get(THIS_MODULE);
-+	return res;
-+}
-+
-+/**
-+ * xwdtps_exit -  Unregister the WDT.
-+ */
-+static void __exit xwdtps_exit(void)
-+{
-+	platform_driver_unregister(&xwdtps_driver);
-+}
-+
-+module_init(xwdtps_init);
-+module_exit(xwdtps_exit);
-+
-+MODULE_AUTHOR("Xilinx, Inc.");
-+MODULE_DESCRIPTION("Watchdog driver for PS WDT");
-+MODULE_LICENSE("GPL");
-+MODULE_ALIAS("platform: xwdtps");
diff --git a/patches.zynq/0009-arm-zynq-Enable-arm_global_timer.patch b/patches.zynq/0009-arm-zynq-Enable-arm_global_timer.patch
deleted file mode 100644
index 54cb4b6912325..0000000000000
--- a/patches.zynq/0009-arm-zynq-Enable-arm_global_timer.patch
+++ /dev/null
@@ -1,53 +0,0 @@
-From 226d0e6cf38882473183f833e8e78f84fc0c5cc5 Mon Sep 17 00:00:00 2001
-From: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Date: Wed, 18 Sep 2013 11:48:38 -0700
-Subject: arm: zynq: Enable arm_global_timer
-
-Zynq is based on an ARM Cortex-A9 MPCore, which features the
-arm_global_timer in its SCU. Therefore enable the timer for Zynq.
-
-Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
-Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
-Acked-by: Michal Simek <michal.simek@xilinx.com>
-(cherry picked from commit fa94bd57b5a5b2206e5fdd0ed2dbacff199121f2)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- arch/arm/boot/dts/zynq-7000.dtsi | 8 ++++++++
- arch/arm/mach-zynq/Kconfig       | 1 +
- 2 files changed, 9 insertions(+)
-
-diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi
-index 14fb2e609bab..4265b0fd1e20 100644
---- a/arch/arm/boot/dts/zynq-7000.dtsi
-+++ b/arch/arm/boot/dts/zynq-7000.dtsi
-@@ -117,6 +117,14 @@
- 			};
- 		};
- 
-+		global_timer: timer@f8f00200 {
-+			compatible = "arm,cortex-a9-global-timer";
-+			reg = <0xf8f00200 0x20>;
-+			interrupts = <1 11 0x301>;
-+			interrupt-parent = <&intc>;
-+			clocks = <&clkc 4>;
-+		};
-+
- 		ttc0: ttc0@f8001000 {
- 			interrupt-parent = <&intc>;
- 			interrupts = < 0 10 4 0 11 4 0 12 4 >;
-diff --git a/arch/arm/mach-zynq/Kconfig b/arch/arm/mach-zynq/Kconfig
-index c1d61f281e68..854575c18000 100644
---- a/arch/arm/mach-zynq/Kconfig
-+++ b/arch/arm/mach-zynq/Kconfig
-@@ -13,5 +13,6 @@ config ARCH_ZYNQ
- 	select HAVE_SMP
- 	select SPARSE_IRQ
- 	select CADENCE_TTC_TIMER
-+	select ARM_GLOBAL_TIMER
- 	help
- 	  Support for Xilinx Zynq ARM Cortex A9 Platform
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0009-usb-zynq-merge-usb-support-for-xilinx-zynq-soc.patch b/patches.zynq/0009-usb-zynq-merge-usb-support-for-xilinx-zynq-soc.patch
deleted file mode 100644
index 4686f90509c8f..0000000000000
--- a/patches.zynq/0009-usb-zynq-merge-usb-support-for-xilinx-zynq-soc.patch
+++ /dev/null
@@ -1,3821 +0,0 @@
-From 485381435a50c8de2cee2720cee12434437a9354 Mon Sep 17 00:00:00 2001
-From: Michal Simek <michal.simek@xilinx.com>
-Date: Tue, 24 Dec 2013 09:27:30 +0900
-Subject: usb: zynq: merge usb support for xilinx zynq soc
-
-This merges support for the Zynq's USB from the Xilinx repository
-(commit efc27505715e64526653f35274717c0fc56491e3 in master branch).
-It has been tested by connecting a USB storage device into a
-Zynq 702 board.
-
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/usb/Kconfig                  |    1 
- drivers/usb/core/hub.c               |    4 
- drivers/usb/host/Kconfig             |   15 
- drivers/usb/host/Makefile            |    1 
- drivers/usb/host/ehci-hcd.c          |   52 
- drivers/usb/host/ehci-hub.c          |   22 
- drivers/usb/host/ehci-xilinx-of.c    |   17 
- drivers/usb/host/ehci-xilinx-usbps.c |  531 ++++++++
- drivers/usb/host/ehci-xilinx-usbps.h |   33 
- drivers/usb/host/ehci.h              |    8 
- drivers/usb/host/xusbps-dr-of.c      |  331 +++++
- drivers/usb/phy/Kconfig              |   12 
- drivers/usb/phy/Makefile             |    1 
- drivers/usb/phy/phy-zynq-usb.c       | 2305 +++++++++++++++++++++++++++++++++++
- include/linux/usb/xilinx_usbps_otg.h |  216 +++
- include/linux/xilinx_devices.h       |   70 +
- 16 files changed, 3617 insertions(+), 2 deletions(-)
- create mode 100644 drivers/usb/host/ehci-xilinx-usbps.c
- create mode 100644 drivers/usb/host/ehci-xilinx-usbps.h
- create mode 100644 drivers/usb/host/xusbps-dr-of.c
- create mode 100644 drivers/usb/phy/phy-zynq-usb.c
- create mode 100644 include/linux/usb/xilinx_usbps_otg.h
- create mode 100644 include/linux/xilinx_devices.h
-
---- a/drivers/usb/Kconfig
-+++ b/drivers/usb/Kconfig
-@@ -45,6 +45,7 @@ config USB_ARCH_HAS_EHCI
- 	default y if PLAT_S5P
- 	default y if ARCH_MSM
- 	default y if MICROBLAZE
-+	default y if ARCH_ZYNQ
- 	default y if SPARC_LEON
- 	default y if ARCH_MMP
- 	default y if MACH_LOONGSON1
---- a/drivers/usb/core/hub.c
-+++ b/drivers/usb/core/hub.c
-@@ -1689,7 +1689,11 @@ static int hub_probe(struct usb_interfac
- 	pm_runtime_set_autosuspend_delay(&hdev->dev, 0);
- 
- 	/* Hubs have proper suspend/resume support. */
-+#ifdef CONFIG_USB_ZYNQ_PHY
-+	usb_disable_autosuspend(hdev);
-+#else
- 	usb_enable_autosuspend(hdev);
-+#endif
- 
- 	if (hdev->level == MAX_TOPO_LEVEL) {
- 		dev_err(&intf->dev,
---- a/drivers/usb/host/Kconfig
-+++ b/drivers/usb/host/Kconfig
-@@ -132,6 +132,21 @@ config XPS_USB_HCD_XILINX
- 		support both high speed and full speed devices, or high speed
- 		devices only.
- 
-+config USB_XUSBPS_DR_OF
-+	tristate
-+	select USB_PHY
-+	select USB_ULPI
-+	select USB_ULPI_VIEWPORT
-+
-+config USB_EHCI_XUSBPS
-+	bool "Support for Xilinx PS EHCI USB controller"
-+	depends on USB_EHCI_HCD && ARCH_ZYNQ
-+	select USB_EHCI_ROOT_HUB_TT
-+	select USB_XUSBPS_DR_OF
-+	---help---
-+		Xilinx PS USB host controller core is EHCI compilant and has
-+		transaction translator built-in.
-+
- config USB_EHCI_FSL
- 	bool "Support for Freescale PPC on-chip EHCI USB controller"
- 	depends on FSL_SOC
---- a/drivers/usb/host/Makefile
-+++ b/drivers/usb/host/Makefile
-@@ -49,6 +49,7 @@ obj-$(CONFIG_USB_ISP1760_HCD)	+= isp1760
- obj-$(CONFIG_USB_HWA_HCD)	+= hwa-hc.o
- obj-$(CONFIG_USB_IMX21_HCD)	+= imx21-hcd.o
- obj-$(CONFIG_USB_FSL_MPH_DR_OF)	+= fsl-mph-dr-of.o
-+obj-$(CONFIG_USB_XUSBPS_DR_OF)	+= xusbps-dr-of.o
- obj-$(CONFIG_USB_OCTEON2_COMMON) += octeon2-common.o
- obj-$(CONFIG_USB_HCD_BCMA)	+= bcma-hcd.o
- obj-$(CONFIG_USB_HCD_SSB)	+= ssb-hcd.o
---- a/drivers/usb/host/ehci-hcd.c
-+++ b/drivers/usb/host/ehci-hcd.c
-@@ -335,11 +335,21 @@ static void ehci_turn_off_all_ports(stru
-  */
- static void ehci_silence_controller(struct ehci_hcd *ehci)
- {
-+#ifdef CONFIG_USB_ZYNQ_PHY
-+	struct usb_hcd *hcd = ehci_to_hcd(ehci);
-+#endif
-+
- 	ehci_halt(ehci);
- 
- 	spin_lock_irq(&ehci->lock);
- 	ehci->rh_state = EHCI_RH_HALTED;
-+#ifdef CONFIG_USB_ZYNQ_PHY
-+	/* turn off for non-otg port */
-+	if (!hcd->phy)
-+		ehci_turn_off_all_ports(ehci);
-+#else
- 	ehci_turn_off_all_ports(ehci);
-+#endif
- 
- 	/* make BIOS/etc use companion controller during reboot */
- 	ehci_writel(ehci, 0, &ehci->regs->configured_flag);
-@@ -422,7 +432,12 @@ static void ehci_stop (struct usb_hcd *h
- 
- 	ehci_quiesce(ehci);
- 	ehci_silence_controller(ehci);
-+#ifdef CONFIG_USB_ZYNQ_PHY
-+	if (!hcd->phy)
-+		ehci_reset(ehci);
-+#else
- 	ehci_reset (ehci);
-+#endif
- 
- 	hrtimer_cancel(&ehci->hrtimer);
- 	remove_sysfs_files(ehci);
-@@ -569,6 +584,9 @@ static int ehci_run (struct usb_hcd *hcd
- 	struct ehci_hcd		*ehci = hcd_to_ehci (hcd);
- 	u32			temp;
- 	u32			hcc_params;
-+#if defined(CONFIG_ARCH_ZYNQ)
-+	void __iomem *non_ehci = hcd->regs;
-+#endif
- 
- 	hcd->uses_new_polling = 1;
- 
-@@ -638,7 +656,11 @@ static int ehci_run (struct usb_hcd *hcd
- 
- 	ehci_writel(ehci, INTR_MASK,
- 		    &ehci->regs->intr_enable); /* Turn On Interrupts */
--
-+#if defined(CONFIG_ARCH_ZYNQ)
-+	/* Modifying FIFO Burst Threshold value from 2 to 8 */
-+	temp = readl(non_ehci + 0x164);
-+	ehci_writel(ehci, 0x00080000, non_ehci + 0x164);
-+#endif
- 	/* GRR this is run-once init(), being done every time the HC starts.
- 	 * So long as they're part of class devices, we can't do it init()
- 	 * since the class device isn't created that early.
-@@ -691,6 +713,29 @@ static irqreturn_t ehci_irq (struct usb_
- 
- 	status = ehci_readl(ehci, &ehci->regs->status);
- 
-+#ifdef CONFIG_USB_ZYNQ_PHY
-+	if (hcd->phy) {
-+		/* A device */
-+		if (hcd->phy->otg->default_a &&
-+			(hcd->phy->state == OTG_STATE_A_PERIPHERAL)) {
-+			spin_unlock(&ehci->lock);
-+			return IRQ_NONE;
-+		}
-+		/* B device */
-+		if (!hcd->phy->otg->default_a &&
-+			((hcd->phy->state != OTG_STATE_B_WAIT_ACON) &&
-+			(hcd->phy->state != OTG_STATE_B_HOST))) {
-+			spin_unlock(&ehci->lock);
-+			return IRQ_NONE;
-+		}
-+		/* If HABA is set and B-disconnect occurs, don't process
-+		 * that interrupt */
-+		if (ehci_is_TDI(ehci) && tdi_in_host_mode(ehci) == 0) {
-+			spin_unlock(&ehci->lock);
-+			return IRQ_NONE;
-+		}
-+	}
-+#endif
- 	/* e.g. cardbus physical eject */
- 	if (status == ~(u32) 0) {
- 		ehci_dbg (ehci, "device removed\n");
-@@ -1246,6 +1291,11 @@ MODULE_LICENSE ("GPL");
- #define XILINX_OF_PLATFORM_DRIVER	ehci_hcd_xilinx_of_driver
- #endif
- 
-+#ifdef CONFIG_USB_EHCI_XUSBPS
-+#include "ehci-xilinx-usbps.c"
-+#define PLATFORM_DRIVER		ehci_xusbps_driver
-+#endif
-+
- #ifdef CONFIG_USB_W90X900_EHCI
- #include "ehci-w90x900.c"
- #define	PLATFORM_DRIVER		ehci_hcd_w90x900_driver
---- a/drivers/usb/host/ehci-hub.c
-+++ b/drivers/usb/host/ehci-hub.c
-@@ -1018,9 +1018,22 @@ static int ehci_hub_control (
- 			 * Set appropriate bit thus could put phy into low power
- 			 * mode if we have hostpc feature
- 			 */
-+#ifdef CONFIG_USB_ZYNQ_PHY
-+			if (hcd->phy && (hcd->self.otg_port == (wIndex + 1))
-+				&& (hcd->self.b_hnp_enable ||
-+				hcd->self.is_b_host))
-+				ehci->start_hnp(ehci);
-+			else {
-+				temp &= ~PORT_WKCONN_E;
-+				temp |= PORT_WKDISC_E | PORT_WKOC_E;
-+				ehci_writel(ehci, temp | PORT_SUSPEND,
-+					    status_reg);
-+			}
-+#else
- 			temp &= ~PORT_WKCONN_E;
- 			temp |= PORT_WKDISC_E | PORT_WKOC_E;
- 			ehci_writel(ehci, temp | PORT_SUSPEND, status_reg);
-+#endif
- 			if (ehci->has_hostpc) {
- 				spin_unlock_irqrestore(&ehci->lock, flags);
- 				msleep(5);/* 5ms for HCD enter low pwr mode */
-@@ -1036,9 +1049,18 @@ static int ehci_hub_control (
- 			set_bit(wIndex, &ehci->suspended_ports);
- 			break;
- 		case USB_PORT_FEAT_POWER:
-+#ifdef CONFIG_USB_ZYNQ_PHY
-+			/* Check if otg is enabled */
-+			if (!hcd->phy) {
-+				if (HCS_PPC(ehci->hcs_params))
-+					ehci_writel(ehci, temp | PORT_POWER,
-+							status_reg);
-+			}
-+#else
- 			if (HCS_PPC (ehci->hcs_params))
- 				ehci_writel(ehci, temp | PORT_POWER,
- 						status_reg);
-+#endif
- 			break;
- 		case USB_PORT_FEAT_RESET:
- 			if (temp & PORT_RESUME)
---- a/drivers/usb/host/ehci-xilinx-of.c
-+++ b/drivers/usb/host/ehci-xilinx-of.c
-@@ -220,6 +220,21 @@ static int ehci_hcd_xilinx_of_remove(str
- 	return 0;
- }
- 
-+/**
-+ * ehci_hcd_xilinx_of_shutdown - shutdown the hcd
-+ * @op:		pointer to platform_device structure that is to be removed
-+ *
-+ * Properly shutdown the hcd, call driver's shutdown routine.
-+ */
-+static void ehci_hcd_xilinx_of_shutdown(struct platform_device *op)
-+{
-+	struct usb_hcd *hcd = platform_get_drvdata(op);
-+
-+	if (hcd->driver->shutdown)
-+		hcd->driver->shutdown(hcd);
-+}
-+
-+
- static const struct of_device_id ehci_hcd_xilinx_of_match[] = {
- 		{.compatible = "xlnx,xps-usb-host-1.00.a",},
- 	{},
-@@ -229,7 +244,7 @@ MODULE_DEVICE_TABLE(of, ehci_hcd_xilinx_
- static struct platform_driver ehci_hcd_xilinx_of_driver = {
- 	.probe		= ehci_hcd_xilinx_of_probe,
- 	.remove		= ehci_hcd_xilinx_of_remove,
--	.shutdown	= usb_hcd_platform_shutdown,
-+	.shutdown	= ehci_hcd_xilinx_of_shutdown,
- 	.driver = {
- 		.name = "xilinx-of-ehci",
- 		.owner = THIS_MODULE,
---- /dev/null
-+++ b/drivers/usb/host/ehci-xilinx-usbps.c
-@@ -0,0 +1,531 @@
-+/*
-+ * Xilinx PS USB Host Controller Driver.
-+ *
-+ * Copyright (C) 2011 Xilinx, Inc.
-+ *
-+ * This file is based on ehci-fsl.c file with few minor modifications
-+ * to support Xilinx PS USB controller.
-+ *
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms of the GNU General Public License version 2 as published by
-+ * the Free Software Foundation; either version 2 of the License, or (at your
-+ * option) any later version.
-+ *
-+ * You should have received a copy of the GNU General Public License along with
-+ * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
-+ * Place, Suite 330, Boston, MA  02111-1307  USA
-+ */
-+
-+#include <linux/clk.h>
-+#include <linux/kernel.h>
-+#include <linux/types.h>
-+#include <linux/delay.h>
-+#include <linux/pm.h>
-+#include <linux/platform_device.h>
-+#include <linux/xilinx_devices.h>
-+#include <linux/usb/otg.h>
-+#include <linux/usb/xilinx_usbps_otg.h>
-+
-+#include "ehci-xilinx-usbps.h"
-+
-+#ifdef CONFIG_USB_ZYNQ_PHY
-+/********************************************************************
-+ * OTG related functions
-+ ********************************************************************/
-+static int ehci_xusbps_reinit(struct ehci_hcd *ehci);
-+
-+/* This connection event is useful when a OTG test device is connected.
-+   In that case, the device connect notify event will not be generated
-+   since the device will be suspended before complete enumeration.
-+*/
-+static int ehci_xusbps_update_device(struct usb_hcd *hcd, struct usb_device
-+		*udev)
-+{
-+	struct xusbps_otg *xotg = xceiv_to_xotg(hcd->phy);
-+
-+	if (udev->portnum == hcd->self.otg_port) {
-+		/* HNP test device */
-+		if ((le16_to_cpu(udev->descriptor.idVendor) == 0x1a0a &&
-+			le16_to_cpu(udev->descriptor.idProduct) == 0xbadd)) {
-+			if (xotg->otg.otg->default_a == 1)
-+				xotg->hsm.b_conn = 1;
-+			else
-+				xotg->hsm.a_conn = 1;
-+			xusbps_update_transceiver();
-+		}
-+	}
-+	return 0;
-+}
-+
-+static void ehci_xusbps_start_hnp(struct ehci_hcd *ehci)
-+{
-+	const unsigned	port = ehci_to_hcd(ehci)->self.otg_port - 1;
-+	struct usb_hcd *hcd = ehci_to_hcd(ehci);
-+	unsigned long	flags;
-+	u32 portsc;
-+
-+	local_irq_save(flags);
-+	portsc = ehci_readl(ehci, &ehci->regs->port_status[port]);
-+	portsc |= PORT_SUSPEND;
-+	ehci_writel(ehci, portsc, &ehci->regs->port_status[port]);
-+	local_irq_restore(flags);
-+
-+	otg_start_hnp(hcd->phy->otg);
-+}
-+
-+static int ehci_xusbps_otg_start_host(struct usb_phy *otg)
-+{
-+	struct usb_hcd		*hcd = bus_to_hcd(otg->otg->host);
-+	struct xusbps_otg *xotg =
-+			xceiv_to_xotg(hcd->phy);
-+
-+	usb_add_hcd(hcd, xotg->irq, IRQF_SHARED);
-+	return 0;
-+}
-+
-+static int ehci_xusbps_otg_stop_host(struct usb_phy *otg)
-+{
-+	struct usb_hcd		*hcd = bus_to_hcd(otg->otg->host);
-+
-+	usb_remove_hcd(hcd);
-+	return 0;
-+}
-+#endif
-+
-+static int xusbps_ehci_clk_notifier_cb(struct notifier_block *nb,
-+		unsigned long event, void *data)
-+{
-+
-+	switch (event) {
-+	case PRE_RATE_CHANGE:
-+		/* if a rate change is announced we need to check whether we can
-+		 * maintain the current frequency by changing the clock
-+		 * dividers.
-+		 */
-+		/* fall through */
-+	case POST_RATE_CHANGE:
-+		return NOTIFY_OK;
-+	case ABORT_RATE_CHANGE:
-+	default:
-+		return NOTIFY_DONE;
-+	}
-+}
-+
-+/* configure so an HC device and id are always provided */
-+/* always called with process context; sleeping is OK */
-+
-+/**
-+ * usb_hcd_xusbps_probe - initialize XUSBPS-based HCDs
-+ * @driver: Driver to be used for this HCD
-+ * @pdev: USB Host Controller being probed
-+ * Context: !in_interrupt()
-+ *
-+ * Allocates basic resources for this USB host controller.
-+ *
-+ */
-+static int usb_hcd_xusbps_probe(const struct hc_driver *driver,
-+			     struct platform_device *pdev)
-+{
-+	struct xusbps_usb2_platform_data *pdata;
-+	struct usb_hcd *hcd;
-+	int irq;
-+	int retval;
-+
-+	pr_debug("initializing XUSBPS-SOC USB Controller\n");
-+
-+	/* Need platform data for setup */
-+	pdata = (struct xusbps_usb2_platform_data *)pdev->dev.platform_data;
-+	if (!pdata) {
-+		dev_err(&pdev->dev,
-+			"No platform data for %s.\n", dev_name(&pdev->dev));
-+		return -ENODEV;
-+	}
-+
-+	/*
-+	 * This is a host mode driver, verify that we're supposed to be
-+	 * in host mode.
-+	 */
-+	if (!((pdata->operating_mode == XUSBPS_USB2_DR_HOST) ||
-+	      (pdata->operating_mode == XUSBPS_USB2_MPH_HOST) ||
-+	      (pdata->operating_mode == XUSBPS_USB2_DR_OTG))) {
-+		dev_err(&pdev->dev, "Non Host Mode configured for %s. Wrong \
-+				driver linked.\n", dev_name(&pdev->dev));
-+		return -ENODEV;
-+	}
-+
-+	hcd = usb_create_hcd(driver, &pdev->dev, dev_name(&pdev->dev));
-+	if (!hcd) {
-+		retval = -ENOMEM;
-+		goto err1;
-+	}
-+
-+	irq = pdata->irq;
-+	hcd->regs = pdata->regs;
-+
-+	if (hcd->regs == NULL) {
-+		dev_dbg(&pdev->dev, "error mapping memory\n");
-+		retval = -EFAULT;
-+		goto err2;
-+	}
-+
-+	retval = clk_prepare_enable(pdata->clk);
-+	if (retval) {
-+		dev_err(&pdev->dev, "Unable to enable APER clock.\n");
-+		goto err2;
-+	}
-+
-+	pdata->clk_rate_change_nb.notifier_call = xusbps_ehci_clk_notifier_cb;
-+	pdata->clk_rate_change_nb.next = NULL;
-+	if (clk_notifier_register(pdata->clk, &pdata->clk_rate_change_nb))
-+		dev_warn(&pdev->dev, "Unable to register clock notifier.\n");
-+
-+
-+	/*
-+	 * do platform specific init: check the clock, grab/config pins, etc.
-+	 */
-+	if (pdata->init && pdata->init(pdev)) {
-+		retval = -ENODEV;
-+		goto err_out_clk_unreg_notif;
-+	}
-+
-+#ifdef CONFIG_USB_ZYNQ_PHY
-+	if (pdata->otg) {
-+		struct xusbps_otg *xotg;
-+		struct ehci_hcd *ehci = hcd_to_ehci(hcd);
-+
-+		hcd->self.otg_port = 1;
-+		hcd->phy = pdata->otg;
-+		retval = otg_set_host(hcd->phy->otg,
-+				&ehci_to_hcd(ehci)->self);
-+		if (retval)
-+			goto err_out_clk_unreg_notif;
-+		xotg = xceiv_to_xotg(hcd->phy);
-+		ehci->start_hnp = ehci_xusbps_start_hnp;
-+		xotg->start_host = ehci_xusbps_otg_start_host;
-+		xotg->stop_host = ehci_xusbps_otg_stop_host;
-+		/* inform otg driver about host driver */
-+		xusbps_update_transceiver();
-+	} else {
-+		retval = usb_add_hcd(hcd, irq, IRQF_SHARED);
-+		if (retval)
-+			goto err_out_clk_unreg_notif;
-+
-+		/*
-+		 * Enable vbus on ULPI - zedboard requirement
-+		 * to get host mode to work
-+		 */
-+		if (pdata->ulpi)
-+			otg_set_vbus(pdata->ulpi->otg, 1);
-+	}
-+#else
-+	/* Don't need to set host mode here. It will be done by tdi_reset() */
-+	retval = usb_add_hcd(hcd, irq, IRQF_SHARED);
-+	if (retval)
-+		goto err_out_clk_unreg_notif;
-+#endif
-+	return retval;
-+
-+err_out_clk_unreg_notif:
-+	clk_notifier_unregister(pdata->clk, &pdata->clk_rate_change_nb);
-+	clk_disable_unprepare(pdata->clk);
-+err2:
-+	usb_put_hcd(hcd);
-+err1:
-+	dev_err(&pdev->dev, "init %s fail, %d\n", dev_name(&pdev->dev), retval);
-+	if (pdata->exit)
-+		pdata->exit(pdev);
-+
-+	return retval;
-+}
-+
-+/* may be called without controller electrically present */
-+/* may be called with controller, bus, and devices active */
-+
-+/**
-+ * usb_hcd_xusbps_remove - shutdown processing for XUSBPS-based HCDs
-+ * @dev: USB Host Controller being removed
-+ * Context: !in_interrupt()
-+ *
-+ * Reverses the effect of usb_hcd_xusbps_probe().
-+ *
-+ */
-+static void usb_hcd_xusbps_remove(struct usb_hcd *hcd,
-+			       struct platform_device *pdev)
-+{
-+	struct xusbps_usb2_platform_data *pdata = pdev->dev.platform_data;
-+
-+	usb_remove_hcd(hcd);
-+
-+	/*
-+	 * do platform specific un-initialization:
-+	 * release iomux pins, disable clock, etc.
-+	 */
-+	if (pdata->exit)
-+		pdata->exit(pdev);
-+	usb_put_hcd(hcd);
-+	clk_notifier_unregister(pdata->clk, &pdata->clk_rate_change_nb);
-+	clk_disable_unprepare(pdata->clk);
-+}
-+
-+static void ehci_xusbps_setup_phy(struct ehci_hcd *ehci,
-+			       enum xusbps_usb2_phy_modes phy_mode,
-+			       unsigned int port_offset)
-+{
-+	u32 portsc;
-+
-+	portsc = ehci_readl(ehci, &ehci->regs->port_status[port_offset]);
-+	portsc &= ~(PORT_PTS_MSK | PORT_PTS_PTW);
-+
-+	switch (phy_mode) {
-+	case XUSBPS_USB2_PHY_ULPI:
-+		portsc |= PORT_PTS_ULPI;
-+		break;
-+	case XUSBPS_USB2_PHY_SERIAL:
-+		portsc |= PORT_PTS_SERIAL;
-+		break;
-+	case XUSBPS_USB2_PHY_UTMI_WIDE:
-+		portsc |= PORT_PTS_PTW;
-+		/* fall through */
-+	case XUSBPS_USB2_PHY_UTMI:
-+		portsc |= PORT_PTS_UTMI;
-+		break;
-+	case XUSBPS_USB2_PHY_NONE:
-+		break;
-+	}
-+	ehci_writel(ehci, portsc, &ehci->regs->port_status[port_offset]);
-+}
-+
-+static void ehci_xusbps_usb_setup(struct ehci_hcd *ehci)
-+{
-+	struct usb_hcd *hcd = ehci_to_hcd(ehci);
-+	struct xusbps_usb2_platform_data *pdata;
-+
-+	pdata = hcd->self.controller->platform_data;
-+
-+	if ((pdata->operating_mode == XUSBPS_USB2_DR_HOST) ||
-+			(pdata->operating_mode == XUSBPS_USB2_DR_OTG))
-+		ehci_xusbps_setup_phy(ehci, pdata->phy_mode, 0);
-+
-+	if (pdata->operating_mode == XUSBPS_USB2_MPH_HOST) {
-+		if (pdata->port_enables & XUSBPS_USB2_PORT0_ENABLED)
-+			ehci_xusbps_setup_phy(ehci, pdata->phy_mode, 0);
-+		if (pdata->port_enables & XUSBPS_USB2_PORT1_ENABLED)
-+			ehci_xusbps_setup_phy(ehci, pdata->phy_mode, 1);
-+	}
-+}
-+
-+/*
-+ * FIXME USB: EHCI: remove ehci_port_power() routine
-+ *(sha1: c73cee717e7d5da0698acb720ad1219646fe4f46)
-+ */
-+static void ehci_port_power(struct ehci_hcd *ehci, int is_on)
-+{
-+	unsigned port;
-+
-+	if (!HCS_PPC(ehci->hcs_params))
-+		return;
-+
-+	ehci_dbg(ehci, "...power%s ports...\n", is_on ? "up" : "down");
-+	for (port = HCS_N_PORTS(ehci->hcs_params); port > 0; )
-+		(void) ehci_hub_control(ehci_to_hcd(ehci),
-+				is_on ? SetPortFeature : ClearPortFeature,
-+				USB_PORT_FEAT_POWER,
-+				port--, NULL, 0);
-+	/* Flush those writes */
-+	ehci_readl(ehci, &ehci->regs->command);
-+	msleep(20);
-+}
-+
-+/* called after powerup, by probe or system-pm "wakeup" */
-+static int ehci_xusbps_reinit(struct ehci_hcd *ehci)
-+{
-+#ifdef CONFIG_USB_ZYNQ_PHY
-+	struct usb_hcd *hcd = ehci_to_hcd(ehci);
-+#endif
-+
-+	ehci_xusbps_usb_setup(ehci);
-+#ifdef CONFIG_USB_ZYNQ_PHY
-+	/* Don't turn off port power in OTG mode */
-+	if (!hcd->phy)
-+#endif
-+		ehci_port_power(ehci, 0);
-+
-+	return 0;
-+}
-+
-+struct ehci_xusbps {
-+	struct ehci_hcd	ehci;
-+
-+#ifdef CONFIG_PM
-+	/* Saved USB PHY settings, need to restore after deep sleep. */
-+	u32 usb_ctrl;
-+#endif
-+};
-+
-+/* called during probe() after chip reset completes */
-+static int ehci_xusbps_setup(struct usb_hcd *hcd)
-+{
-+	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
-+	int retval;
-+
-+	/* EHCI registers start at offset 0x100 */
-+	ehci->caps = hcd->regs + 0x100;
-+	ehci->regs = hcd->regs + 0x100 +
-+	    HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
-+	dbg_hcs_params(ehci, "reset");
-+	dbg_hcc_params(ehci, "reset");
-+
-+	/* cache this readonly data; minimize chip reads */
-+	ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
-+
-+	hcd->has_tt = 1;
-+
-+	/* data structure init */
-+	retval = ehci_init(hcd);
-+	if (retval)
-+		return retval;
-+
-+	retval = ehci_halt(ehci);
-+	if (retval)
-+		return retval;
-+
-+	ehci->sbrn = 0x20;
-+
-+	ehci_reset(ehci);
-+
-+	retval = ehci_xusbps_reinit(ehci);
-+	return retval;
-+}
-+
-+static void ehci_xusbps_shutdown(struct usb_hcd *hcd)
-+{
-+	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
-+
-+	if (ehci->regs)
-+		ehci_shutdown(hcd);
-+}
-+
-+#ifdef CONFIG_PM_SLEEP
-+static int ehci_xusbps_drv_suspend(struct device *dev)
-+{
-+	struct usb_hcd *hcd = dev_get_drvdata(dev);
-+	struct xusbps_usb2_platform_data *pdata = dev->platform_data;
-+
-+	ehci_prepare_ports_for_controller_suspend(hcd_to_ehci(hcd),
-+			device_may_wakeup(dev));
-+
-+	clk_disable(pdata->clk);
-+
-+	return 0;
-+}
-+
-+static int ehci_xusbps_drv_resume(struct device *dev)
-+{
-+	struct usb_hcd *hcd = dev_get_drvdata(dev);
-+	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
-+	struct xusbps_usb2_platform_data *pdata = dev->platform_data;
-+	int ret;
-+
-+	ret = clk_enable(pdata->clk);
-+	if (ret) {
-+		dev_err(dev, "cannot enable clock. resume failed\n");
-+		return ret;
-+	}
-+
-+	ehci_prepare_ports_for_controller_resume(ehci);
-+
-+	usb_root_hub_lost_power(hcd->self.root_hub);
-+
-+	ehci_reset(ehci);
-+	ehci_xusbps_reinit(ehci);
-+
-+	return 0;
-+}
-+
-+static const struct dev_pm_ops ehci_xusbps_pm_ops = {
-+	SET_SYSTEM_SLEEP_PM_OPS(ehci_xusbps_drv_suspend, ehci_xusbps_drv_resume)
-+};
-+#define EHCI_XUSBPS_PM_OPS	(&ehci_xusbps_pm_ops)
-+
-+#else /* ! CONFIG_PM_SLEEP */
-+#define EHCI_XUSBPS_PM_OPS	NULL
-+#endif /* ! CONFIG_PM_SLEEP */
-+
-+
-+static const struct hc_driver ehci_xusbps_hc_driver = {
-+	.description = hcd_name,
-+	.product_desc = "Xilinx PS USB EHCI Host Controller",
-+	.hcd_priv_size = sizeof(struct ehci_xusbps),
-+
-+	/*
-+	 * generic hardware linkage
-+	 */
-+	.irq = ehci_irq,
-+	.flags = HCD_USB2 | HCD_MEMORY,
-+
-+	/*
-+	 * basic lifecycle operations
-+	 */
-+	.reset = ehci_xusbps_setup,
-+	.start = ehci_run,
-+	.stop = ehci_stop,
-+	.shutdown = ehci_xusbps_shutdown,
-+
-+	/*
-+	 * managing i/o requests and associated device resources
-+	 */
-+	.urb_enqueue = ehci_urb_enqueue,
-+	.urb_dequeue = ehci_urb_dequeue,
-+	.endpoint_disable = ehci_endpoint_disable,
-+	.endpoint_reset = ehci_endpoint_reset,
-+
-+	/*
-+	 * scheduling support
-+	 */
-+	.get_frame_number = ehci_get_frame,
-+
-+	/*
-+	 * root hub support
-+	 */
-+	.hub_status_data = ehci_hub_status_data,
-+	.hub_control = ehci_hub_control,
-+	.bus_suspend = ehci_bus_suspend,
-+	.bus_resume = ehci_bus_resume,
-+	.relinquish_port = ehci_relinquish_port,
-+	.port_handed_over = ehci_port_handed_over,
-+
-+	.clear_tt_buffer_complete = ehci_clear_tt_buffer_complete,
-+#ifdef CONFIG_USB_ZYNQ_PHY
-+	.update_device = ehci_xusbps_update_device,
-+#endif
-+};
-+
-+static int ehci_xusbps_drv_probe(struct platform_device *pdev)
-+{
-+	if (usb_disabled())
-+		return -ENODEV;
-+
-+	/* FIXME we only want one one probe() not two */
-+	return usb_hcd_xusbps_probe(&ehci_xusbps_hc_driver, pdev);
-+}
-+
-+static int ehci_xusbps_drv_remove(struct platform_device *pdev)
-+{
-+	struct usb_hcd *hcd = platform_get_drvdata(pdev);
-+
-+	/* FIXME we only want one one remove() not two */
-+	usb_hcd_xusbps_remove(hcd, pdev);
-+	return 0;
-+}
-+
-+MODULE_ALIAS("platform:xusbps-ehci");
-+
-+static struct platform_driver ehci_xusbps_driver = {
-+	.probe = ehci_xusbps_drv_probe,
-+	.remove = ehci_xusbps_drv_remove,
-+	.shutdown = usb_hcd_platform_shutdown,
-+	.driver = {
-+		.name = "xusbps-ehci",
-+		.pm = EHCI_XUSBPS_PM_OPS,
-+	},
-+};
---- /dev/null
-+++ b/drivers/usb/host/ehci-xilinx-usbps.h
-@@ -0,0 +1,33 @@
-+/*
-+ * Xilinx PS USB Host Controller Driver Header file.
-+ *
-+ * Copyright (C) 2011 Xilinx, Inc.
-+ *
-+ * This file is based on ehci-fsl.h file with few minor modifications
-+ * to support Xilinx PS USB controller.
-+ *
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms of the GNU General Public License version 2 as published by
-+ * the Free Software Foundation; either version 2 of the License, or (at your
-+ * option) any later version.
-+ *
-+ * You should have received a copy of the GNU General Public License along with
-+ * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
-+ * Place, Suite 330, Boston, MA  02111-1307  USA
-+ */
-+#ifndef _EHCI_XILINX_XUSBPS_H
-+#define _EHCI_XILINX_XUSBPS_H
-+
-+#include <linux/usb/xilinx_usbps_otg.h>
-+
-+/* offsets for the non-ehci registers in the XUSBPS SOC USB controller */
-+#define XUSBPS_SOC_USB_ULPIVP	0x170
-+#define XUSBPS_SOC_USB_PORTSC1	0x184
-+#define PORT_PTS_MSK		(3<<30)
-+#define PORT_PTS_UTMI		(0<<30)
-+#define PORT_PTS_ULPI		(2<<30)
-+#define	PORT_PTS_SERIAL		(3<<30)
-+#define PORT_PTS_PTW		(1<<28)
-+#define XUSBPS_SOC_USB_PORTSC2	0x188
-+
-+#endif				/* _EHCI_XILINX_XUSBPS_H */
---- a/drivers/usb/host/ehci.h
-+++ b/drivers/usb/host/ehci.h
-@@ -176,6 +176,14 @@ struct ehci_hcd {			/* one per controlle
- 	unsigned long		resuming_ports;		/* which ports have
- 			started to resume */
- 
-+#ifdef CONFIG_USB_ZYNQ_PHY
-+	/*
-+	 * OTG controllers and transceivers need software interaction;
-+	 * other external transceivers should be software-transparent
-+	 */
-+	void (*start_hnp)(struct ehci_hcd *ehci);
-+#endif
-+
- 	/* per-HC memory pools (could be per-bus, but ...) */
- 	struct dma_pool		*qh_pool;	/* qh per active urb */
- 	struct dma_pool		*qtd_pool;	/* one or more per qh */
---- /dev/null
-+++ b/drivers/usb/host/xusbps-dr-of.c
-@@ -0,0 +1,331 @@
-+/*
-+ * Xilinx PS USB Driver for device tree support.
-+ *
-+ * Copyright (C) 2011 Xilinx, Inc.
-+ *
-+ * This file is based on fsl-mph-dr-of.c file with few minor modifications
-+ * to support Xilinx PS USB controller.
-+ *
-+ * Setup platform devices needed by the dual-role USB controller modules
-+ * based on the description in flat device tree.
-+ *
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms of the GNU General Public License version 2 as published by
-+ * the Free Software Foundation; either version 2 of the License, or (at your
-+ * option) any later version.
-+ *
-+ * You should have received a copy of the GNU General Public License along with
-+ * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
-+ * Place, Suite 330, Boston, MA  02111-1307  USA
-+ */
-+#include <linux/kernel.h>
-+#include <linux/module.h>
-+#include <linux/platform_device.h>
-+#include <linux/xilinx_devices.h>
-+#include <linux/err.h>
-+#include <linux/io.h>
-+#include <linux/of_platform.h>
-+#include <linux/slab.h>
-+#include <linux/string.h>
-+#include <linux/clk.h>
-+#include <linux/usb/ulpi.h>
-+
-+#include "ehci-xilinx-usbps.h"
-+
-+static u64 dma_mask = 0xFFFFFFF0;
-+
-+struct xusbps_dev_data {
-+	char *dr_mode;		/* controller mode */
-+	char *drivers[3];	/* drivers to instantiate for this mode */
-+	enum xusbps_usb2_operating_modes op_mode;	/* operating mode */
-+};
-+
-+struct xusbps_host_data {
-+	struct clk *clk;
-+};
-+
-+static struct xusbps_dev_data dr_mode_data[] = {
-+	{
-+		.dr_mode = "host",
-+		.drivers = { "xusbps-ehci", NULL, NULL, },
-+		.op_mode = XUSBPS_USB2_DR_HOST,
-+	},
-+	{
-+		.dr_mode = "otg",
-+		.drivers = { "xusbps-otg", "xusbps-ehci", "xusbps-udc", },
-+		.op_mode = XUSBPS_USB2_DR_OTG,
-+	},
-+	{
-+		.dr_mode = "peripheral",
-+		.drivers = { "xusbps-udc", NULL, NULL, },
-+		.op_mode = XUSBPS_USB2_DR_DEVICE,
-+	},
-+};
-+
-+static struct xusbps_dev_data *get_dr_mode_data(
-+		struct device_node *np)
-+{
-+	const unsigned char *prop;
-+	int i;
-+
-+	prop = of_get_property(np, "dr_mode", NULL);
-+	if (prop) {
-+		for (i = 0; i < ARRAY_SIZE(dr_mode_data); i++) {
-+			if (!strcmp(prop, dr_mode_data[i].dr_mode))
-+				return &dr_mode_data[i];
-+		}
-+	}
-+	pr_warn("%s: Invalid 'dr_mode' property, fallback to host mode\n",
-+		np->full_name);
-+	return &dr_mode_data[0]; /* mode not specified, use host */
-+}
-+
-+static enum xusbps_usb2_phy_modes determine_usb_phy(const char *phy_type)
-+{
-+	if (!phy_type)
-+		return XUSBPS_USB2_PHY_NONE;
-+	if (!strcasecmp(phy_type, "ulpi"))
-+		return XUSBPS_USB2_PHY_ULPI;
-+	if (!strcasecmp(phy_type, "utmi"))
-+		return XUSBPS_USB2_PHY_UTMI;
-+	if (!strcasecmp(phy_type, "utmi_wide"))
-+		return XUSBPS_USB2_PHY_UTMI_WIDE;
-+	if (!strcasecmp(phy_type, "serial"))
-+		return XUSBPS_USB2_PHY_SERIAL;
-+
-+	return XUSBPS_USB2_PHY_NONE;
-+}
-+
-+static struct platform_device *xusbps_device_register(
-+					struct platform_device *ofdev,
-+					struct xusbps_usb2_platform_data *pdata,
-+					const char *name, int id)
-+{
-+	struct platform_device *pdev;
-+	const struct resource *res = ofdev->resource;
-+	unsigned int num = ofdev->num_resources;
-+	struct xusbps_usb2_platform_data *pdata1;
-+	int retval;
-+
-+	pdev = platform_device_alloc(name, id);
-+	if (!pdev) {
-+		retval = -ENOMEM;
-+		goto error;
-+	}
-+
-+	pdev->dev.parent = &ofdev->dev;
-+
-+	pdev->dev.coherent_dma_mask = ofdev->dev.coherent_dma_mask;
-+	pdev->dev.dma_mask = &dma_mask;
-+
-+	retval = platform_device_add_data(pdev, pdata, sizeof(*pdata));
-+	if (retval)
-+		goto error;
-+
-+	if (num) {
-+		retval = platform_device_add_resources(pdev, res, num);
-+		if (retval)
-+			goto error;
-+	}
-+
-+	retval = platform_device_add(pdev);
-+	if (retval)
-+		goto error;
-+
-+	pdata1 = pdev->dev.platform_data;
-+	/* Copy the otg transceiver pointer into host/device platform data */
-+	if (pdata1->otg)
-+		pdata->otg = pdata1->otg;
-+
-+	return pdev;
-+
-+error:
-+	platform_device_put(pdev);
-+	return ERR_PTR(retval);
-+}
-+
-+static int xusbps_dr_of_probe(struct platform_device *ofdev)
-+{
-+	struct device_node *np = ofdev->dev.of_node;
-+	struct platform_device *usb_dev;
-+	struct xusbps_usb2_platform_data data, *pdata;
-+	struct xusbps_dev_data *dev_data;
-+	struct xusbps_host_data *hdata;
-+	const unsigned char *prop;
-+	static unsigned int idx;
-+	struct resource *res;
-+	int i, phy_init;
-+	int ret;
-+
-+	pdata = &data;
-+	memset(pdata, 0, sizeof(data));
-+
-+	res = platform_get_resource(ofdev, IORESOURCE_IRQ, 0);
-+	if (IS_ERR(res)) {
-+		dev_err(&ofdev->dev,
-+			"IRQ not found\n");
-+		return PTR_ERR(res);
-+	}
-+	pdata->irq = res->start;
-+
-+	res = platform_get_resource(ofdev, IORESOURCE_MEM, 0);
-+	pdata->regs = devm_ioremap_resource(&ofdev->dev, res);
-+	if (IS_ERR(pdata->regs)) {
-+		dev_err(&ofdev->dev, "unable to iomap registers\n");
-+		return PTR_ERR(pdata->regs);
-+	}
-+
-+	dev_data = get_dr_mode_data(np);
-+	pdata->operating_mode = dev_data->op_mode;
-+
-+	prop = of_get_property(np, "phy_type", NULL);
-+	pdata->phy_mode = determine_usb_phy(prop);
-+
-+	hdata = devm_kzalloc(&ofdev->dev, sizeof(*hdata), GFP_KERNEL);
-+	if (!hdata)
-+		return -ENOMEM;
-+	platform_set_drvdata(ofdev, hdata);
-+
-+	hdata->clk = devm_clk_get(&ofdev->dev, NULL);
-+	if (IS_ERR(hdata->clk)) {
-+		dev_err(&ofdev->dev, "input clock not found.\n");
-+		return PTR_ERR(hdata->clk);
-+	}
-+
-+	ret = clk_prepare_enable(hdata->clk);
-+	if (ret) {
-+		dev_err(&ofdev->dev, "Unable to enable APER clock.\n");
-+		return ret;
-+	}
-+
-+	pdata->clk = hdata->clk;
-+
-+	/* If ULPI phy type, set it up */
-+	if (pdata->phy_mode == XUSBPS_USB2_PHY_ULPI) {
-+		pdata->ulpi = otg_ulpi_create(&ulpi_viewport_access_ops,
-+			ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT);
-+		if (pdata->ulpi) {
-+			pdata->ulpi->io_priv = pdata->regs +
-+							XUSBPS_SOC_USB_ULPIVP;
-+
-+			phy_init = usb_phy_init(pdata->ulpi);
-+			if (phy_init) {
-+				dev_err(&ofdev->dev,
-+					"Unable to init USB phy, missing?\n");
-+				ret = -ENODEV;
-+				goto err_out_clk_disable;
-+			}
-+		} else {
-+			dev_err(&ofdev->dev,
-+				"Unable to create ULPI transceiver\n");
-+		}
-+	}
-+
-+	for (i = 0; i < ARRAY_SIZE(dev_data->drivers); i++) {
-+		if (!dev_data->drivers[i])
-+			continue;
-+		usb_dev = xusbps_device_register(ofdev, pdata,
-+					dev_data->drivers[i], idx);
-+		if (IS_ERR(usb_dev)) {
-+			dev_err(&ofdev->dev, "Can't register usb device\n");
-+			ret = PTR_ERR(usb_dev);
-+			goto err_out_clk_disable;
-+		}
-+	}
-+	idx++;
-+	return 0;
-+
-+err_out_clk_disable:
-+	clk_disable_unprepare(hdata->clk);
-+
-+	return ret;
-+}
-+
-+static int __unregister_subdev(struct device *dev, void *d)
-+{
-+	platform_device_unregister(to_platform_device(dev));
-+	return 0;
-+}
-+
-+static int xusbps_dr_of_remove(struct platform_device *ofdev)
-+{
-+	struct xusbps_host_data *hdata = platform_get_drvdata(ofdev);
-+
-+	device_for_each_child(&ofdev->dev, NULL, __unregister_subdev);
-+	clk_disable_unprepare(hdata->clk);
-+	return 0;
-+}
-+
-+#ifdef CONFIG_PM_SLEEP
-+static int xusbps_dr_of_suspend(struct device *dev)
-+{
-+	struct xusbps_host_data *hdata = dev_get_drvdata(dev);
-+
-+	clk_disable(hdata->clk);
-+
-+	return 0;
-+}
-+
-+static int xusbps_dr_of_resume(struct device *dev)
-+{
-+	struct xusbps_host_data *hdata = dev_get_drvdata(dev);
-+	int ret;
-+
-+	ret = clk_enable(hdata->clk);
-+	if (ret) {
-+		dev_err(dev, "cannot enable clock. resume failed\n");
-+		return ret;
-+	}
-+
-+	return 0;
-+}
-+#endif /* CONFIG_PM_SLEEP */
-+
-+static SIMPLE_DEV_PM_OPS(xusbps_pm_ops, xusbps_dr_of_suspend,
-+		xusbps_dr_of_resume);
-+
-+static const struct of_device_id xusbps_dr_of_match[] = {
-+	{ .compatible = "xlnx,ps7-usb-1.00.a" },
-+	{},
-+};
-+MODULE_DEVICE_TABLE(of, xusbps_dr_of_match);
-+
-+static struct platform_driver xusbps_dr_driver = {
-+	.driver = {
-+		.name = "xusbps-dr",
-+		.owner = THIS_MODULE,
-+		.of_match_table = xusbps_dr_of_match,
-+		.pm = &xusbps_pm_ops,
-+	},
-+	.probe	= xusbps_dr_of_probe,
-+	.remove	= xusbps_dr_of_remove,
-+};
-+
-+#ifdef CONFIG_USB_ZYNQ_PHY
-+extern struct platform_driver xusbps_otg_driver;
-+
-+static int __init xusbps_dr_init(void)
-+{
-+	int retval;
-+
-+	/* Register otg driver first */
-+	retval = platform_driver_register(&xusbps_otg_driver);
-+	if (retval != 0)
-+		return retval;
-+
-+	return platform_driver_register(&xusbps_dr_driver);
-+}
-+module_init(xusbps_dr_init);
-+
-+static void __exit xusbps_dr_exit(void)
-+{
-+	platform_driver_unregister(&xusbps_dr_driver);
-+}
-+module_exit(xusbps_dr_exit);
-+#else
-+module_platform_driver(xusbps_dr_driver);
-+#endif
-+
-+MODULE_DESCRIPTION("XUSBPS DR OF devices driver");
-+MODULE_AUTHOR("Xilinx");
-+MODULE_LICENSE("GPL");
---- a/drivers/usb/phy/Kconfig
-+++ b/drivers/usb/phy/Kconfig
-@@ -210,4 +210,16 @@ config USB_ULPI_VIEWPORT
- 	  Provides read/write operations to the ULPI phy register set for
- 	  controllers with a viewport register (e.g. Chipidea/ARC controllers).
- 
-+config USB_ZYNQ_PHY
-+	tristate "Xilinx Zynq USB OTG dual-role support"
-+	depends on USB && ARCH_ZYNQ && USB_EHCI_XUSBPS && USB_GADGET_XUSBPS && USB_OTG
-+	select USB_OTG_UTILS
-+	help
-+	  Say Y here if you want to build Xilinx USB PS OTG
-+	  driver in kernel. This driver implements role
-+	  switch between EHCI host driver and USB gadget driver.
-+
-+	  To compile this driver as a module, choose M here: the
-+	  module will be called xilinx_usbps_otg.
-+
- endif # USB_PHY
---- a/drivers/usb/phy/Makefile
-+++ b/drivers/usb/phy/Makefile
-@@ -31,3 +31,4 @@ obj-$(CONFIG_USB_MXS_PHY)		+= phy-mxs-us
- obj-$(CONFIG_USB_RCAR_PHY)		+= phy-rcar-usb.o
- obj-$(CONFIG_USB_ULPI)			+= phy-ulpi.o
- obj-$(CONFIG_USB_ULPI_VIEWPORT)		+= phy-ulpi-viewport.o
-+obj-$(CONFIG_USB_ZYNQ_PHY)		+= phy-zynq-usb.o
---- /dev/null
-+++ b/drivers/usb/phy/phy-zynq-usb.c
-@@ -0,0 +1,2305 @@
-+/*
-+ * Xilinx PS USB otg driver.
-+ *
-+ * Copyright 2011 Xilinx, Inc.
-+ *
-+ * This file is based on langwell_otg.c file with few minor modifications
-+ * to support Xilinx PS USB controller.
-+ *
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms of the GNU General Public License version 2 as published by
-+ * the Free Software Foundation; either version 2 of the License, or (at your
-+ * option) any later version.
-+ *
-+ * You should have received a copy of the GNU General Public License along with
-+ * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
-+ * Place, Suite 330, Boston, MA  02111-1307  USA
-+ */
-+
-+/* This driver helps to switch Xilinx OTG controller function between host
-+ * and peripheral. It works with EHCI driver and Xilinx client controller
-+ * driver together.
-+ */
-+#include <linux/clk.h>
-+#include <linux/module.h>
-+#include <linux/init.h>
-+#include <linux/platform_device.h>
-+#include <linux/errno.h>
-+#include <linux/interrupt.h>
-+#include <linux/kernel.h>
-+#include <linux/device.h>
-+#include <linux/moduleparam.h>
-+#include <linux/usb/ch9.h>
-+#include <linux/usb/gadget.h>
-+#include <linux/usb.h>
-+#include <linux/usb/otg.h>
-+#include <linux/usb/hcd.h>
-+#include <linux/notifier.h>
-+#include <linux/delay.h>
-+#include <linux/pm.h>
-+#include <linux/io.h>
-+
-+#include "../core/usb.h"
-+
-+#include <linux/xilinx_devices.h>
-+#include <linux/usb/xilinx_usbps_otg.h>
-+
-+#define	DRIVER_NAME	"xusbps-otg"
-+
-+static const char driver_name[] = DRIVER_NAME;
-+
-+/* HSM timers */
-+static inline struct xusbps_otg_timer *otg_timer_initializer
-+(void (*function)(unsigned long), unsigned long expires, unsigned long data)
-+{
-+	struct xusbps_otg_timer *timer;
-+	timer = kmalloc(sizeof(struct xusbps_otg_timer), GFP_KERNEL);
-+	if (timer == NULL)
-+		return timer;
-+
-+	timer->function = function;
-+	timer->expires = expires;
-+	timer->data = data;
-+	return timer;
-+}
-+
-+static struct xusbps_otg_timer *a_wait_vrise_tmr, *a_aidl_bdis_tmr,
-+	*b_se0_srp_tmr, *b_srp_init_tmr;
-+
-+static struct list_head active_timers;
-+
-+static struct xusbps_otg *the_transceiver;
-+
-+/* host/client notify transceiver when event affects HNP state */
-+void xusbps_update_transceiver(void)
-+{
-+	struct xusbps_otg *xotg = the_transceiver;
-+
-+	dev_dbg(xotg->dev, "transceiver is updated\n");
-+
-+	if (!xotg->qwork)
-+		return;
-+
-+	queue_work(xotg->qwork, &xotg->work);
-+}
-+EXPORT_SYMBOL(xusbps_update_transceiver);
-+
-+static int xusbps_otg_set_host(struct usb_otg *otg,
-+					struct usb_bus *host)
-+{
-+	otg->host = host;
-+
-+	if (host) {
-+		if (otg->default_a)
-+			host->is_b_host = 0;
-+		else
-+			host->is_b_host = 1;
-+	}
-+
-+	return 0;
-+}
-+
-+static int xusbps_otg_set_peripheral(struct usb_otg *otg,
-+					struct usb_gadget *gadget)
-+{
-+	otg->gadget = gadget;
-+
-+	if (gadget) {
-+		if (otg->default_a)
-+			gadget->is_a_peripheral = 1;
-+		else
-+			gadget->is_a_peripheral = 0;
-+	}
-+
-+	return 0;
-+}
-+
-+static int xusbps_otg_set_power(struct usb_phy *otg,
-+				unsigned mA)
-+{
-+	return 0;
-+}
-+
-+/* A-device drives vbus, controlled through PMIC CHRGCNTL register*/
-+static int xusbps_otg_set_vbus(struct usb_otg *otg, bool enabled)
-+{
-+	struct xusbps_otg		*xotg = the_transceiver;
-+	u32 val;
-+
-+	dev_dbg(xotg->dev, "%s <--- %s\n", __func__, enabled ? "on" : "off");
-+
-+	/* Enable ulpi VBUS if required */
-+	if (xotg->ulpi)
-+		otg_set_vbus(xotg->ulpi->otg, enabled);
-+
-+	val = readl(xotg->base + CI_PORTSC1);
-+
-+	if (enabled)
-+		writel((val | PORTSC_PP), xotg->base + CI_PORTSC1);
-+	else
-+		writel((val & ~PORTSC_PP), xotg->base + CI_PORTSC1);
-+
-+	dev_dbg(xotg->dev, "%s --->\n", __func__);
-+
-+	return 0;
-+}
-+
-+/* Charge vbus for VBUS pulsing in SRP */
-+static void xusbps_otg_chrg_vbus(int on)
-+{
-+	struct xusbps_otg	*xotg = the_transceiver;
-+	u32	val;
-+
-+	val = readl(xotg->base + CI_OTGSC) & ~OTGSC_INTSTS_MASK;
-+
-+	if (on)
-+		/* stop discharging, start charging */
-+		val = (val & ~OTGSC_VD) | OTGSC_VC;
-+	else
-+		/* stop charging */
-+		val &= ~OTGSC_VC;
-+
-+	writel(val, xotg->base + CI_OTGSC);
-+}
-+
-+#if 0
-+
-+/* Discharge vbus through a resistor to ground */
-+static void xusbps_otg_dischrg_vbus(int on)
-+{
-+	struct xusbps_otg	*xotg = the_transceiver;
-+	u32	val;
-+
-+	val = readl(xotg->base + CI_OTGSC) & ~OTGSC_INTSTS_MASK;
-+
-+	if (on)
-+		/* stop charging, start discharging */
-+		val = (val & ~OTGSC_VC) | OTGSC_VD;
-+	else
-+		val &= ~OTGSC_VD;
-+
-+	writel(val, xotg->base + CI_OTGSC);
-+}
-+
-+#endif
-+
-+/* Start SRP */
-+static int xusbps_otg_start_srp(struct usb_otg *otg)
-+{
-+	struct xusbps_otg		*xotg = the_transceiver;
-+	u32				val;
-+
-+	dev_warn(xotg->dev, "Starting SRP...\n");
-+	dev_dbg(xotg->dev, "%s --->\n", __func__);
-+
-+	val = readl(xotg->base + CI_OTGSC);
-+
-+	writel((val & ~OTGSC_INTSTS_MASK) | OTGSC_HADP,
-+				xotg->base + CI_OTGSC);
-+
-+	/* Check if the data plus is finished or not */
-+	msleep(8);
-+	val = readl(xotg->base + CI_OTGSC);
-+	if (val & (OTGSC_HADP | OTGSC_DP))
-+		dev_dbg(xotg->dev, "DataLine SRP Error\n");
-+
-+	/* If Vbus is valid, then update the hsm */
-+	if (val & OTGSC_BSV) {
-+		dev_dbg(xotg->dev, "no b_sess_vld interrupt\n");
-+
-+		xotg->hsm.b_sess_vld = 1;
-+		xusbps_update_transceiver();
-+		return 0;
-+	}
-+
-+	dev_warn(xotg->dev, "Starting VBUS Pulsing...\n");
-+
-+	/* Disable interrupt - b_sess_vld */
-+	val = readl(xotg->base + CI_OTGSC);
-+	val &= (~(OTGSC_BSVIE | OTGSC_BSEIE));
-+	writel(val, xotg->base + CI_OTGSC);
-+
-+	/* Start VBus SRP, drive vbus to generate VBus pulse */
-+	xusbps_otg_chrg_vbus(1);
-+	msleep(15);
-+	xusbps_otg_chrg_vbus(0);
-+
-+	/* Enable interrupt - b_sess_vld*/
-+	val = readl(xotg->base + CI_OTGSC);
-+	dev_dbg(xotg->dev, "after VBUS pulse otgsc = %x\n", val);
-+
-+	val |= (OTGSC_BSVIE | OTGSC_BSEIE);
-+	writel(val, xotg->base + CI_OTGSC);
-+
-+	/* If Vbus is valid, then update the hsm */
-+	if (val & OTGSC_BSV) {
-+		dev_dbg(xotg->dev, "no b_sess_vld interrupt\n");
-+
-+		xotg->hsm.b_sess_vld = 1;
-+		xusbps_update_transceiver();
-+	}
-+
-+	dev_dbg(xotg->dev, "%s <---\n", __func__);
-+	return 0;
-+}
-+
-+/* Start HNP */
-+static int xusbps_otg_start_hnp(struct usb_otg *otg)
-+{
-+	struct xusbps_otg	*xotg = the_transceiver;
-+	unsigned long flag = 0;
-+
-+	dev_warn(xotg->dev, "Starting HNP...\n");
-+	dev_dbg(xotg->dev, "%s --->\n", __func__);
-+
-+	if (xotg->otg.otg->default_a && xotg->otg.otg->host &&
-+			xotg->otg.otg->host->b_hnp_enable) {
-+		xotg->hsm.a_suspend_req = 1;
-+		flag = 1;
-+	}
-+
-+	if (!xotg->otg.otg->default_a && xotg->otg.otg->host &&
-+			xotg->hsm.b_bus_req) {
-+		xotg->hsm.b_bus_req = 0;
-+		flag = 1;
-+	}
-+
-+	if (flag) {
-+		if (spin_trylock(&xotg->wq_lock)) {
-+			xusbps_update_transceiver();
-+			spin_unlock(&xotg->wq_lock);
-+		}
-+	} else
-+		dev_warn(xotg->dev, "HNP not supported\n");
-+
-+	dev_dbg(xotg->dev, "%s <---\n", __func__);
-+	return 0;
-+}
-+
-+/* stop SOF via bus_suspend */
-+static void xusbps_otg_loc_sof(int on)
-+{
-+	/* Not used */
-+}
-+
-+static void xusbps_otg_phy_low_power(int on)
-+{
-+	/* Not used */
-+}
-+
-+/* After drv vbus, add 2 ms delay to set PHCD */
-+static void xusbps_otg_phy_low_power_wait(int on)
-+{
-+	struct xusbps_otg	*xotg = the_transceiver;
-+
-+	dev_dbg(xotg->dev, "add 2ms delay before programing PHCD\n");
-+
-+	mdelay(2);
-+	xusbps_otg_phy_low_power(on);
-+}
-+
-+#ifdef CONFIG_PM_SLEEP
-+/* Enable/Disable OTG interrupt */
-+static void xusbps_otg_intr(int on)
-+{
-+	struct xusbps_otg		*xotg = the_transceiver;
-+	u32				val;
-+
-+	dev_dbg(xotg->dev, "%s ---> %s\n", __func__, on ? "on" : "off");
-+
-+	val = readl(xotg->base + CI_OTGSC);
-+
-+	/* OTGSC_INT_MASK doesn't contains 1msInt */
-+	if (on) {
-+		val = val | (OTGSC_INT_MASK);
-+		writel(val, xotg->base + CI_OTGSC);
-+	} else {
-+		val = val & ~(OTGSC_INT_MASK);
-+		writel(val, xotg->base + CI_OTGSC);
-+	}
-+
-+	dev_dbg(xotg->dev, "%s <---\n", __func__);
-+}
-+#endif
-+
-+/* set HAAR: Hardware Assist Auto-Reset */
-+static void xusbps_otg_HAAR(int on)
-+{
-+	/* Not used */
-+}
-+
-+/* set HABA: Hardware Assist B-Disconnect to A-Connect */
-+static void xusbps_otg_HABA(int on)
-+{
-+	struct xusbps_otg		*xotg = the_transceiver;
-+	u32				val;
-+
-+	dev_dbg(xotg->dev, "%s ---> %s\n", __func__, on ? "on" : "off");
-+
-+	val = readl(xotg->base + CI_OTGSC);
-+	if (on)
-+		writel((val & ~OTGSC_INTSTS_MASK) | OTGSC_HABA,
-+					xotg->base + CI_OTGSC);
-+	else
-+		writel((val & ~OTGSC_INTSTS_MASK) & ~OTGSC_HABA,
-+					xotg->base + CI_OTGSC);
-+
-+	dev_dbg(xotg->dev, "%s <---\n", __func__);
-+}
-+
-+static int xusbps_otg_check_se0_srp(int on)
-+{
-+	struct xusbps_otg	*xotg = the_transceiver;
-+	int			delay_time = TB_SE0_SRP * 10;
-+	u32			val;
-+
-+	dev_dbg(xotg->dev, "%s --->\n", __func__);
-+
-+	do {
-+		udelay(100);
-+		if (!delay_time--)
-+			break;
-+		val = readl(xotg->base + CI_PORTSC1);
-+		val &= PORTSC_LS;
-+	} while (!val);
-+
-+	dev_dbg(xotg->dev, "%s <---\n", __func__);
-+	return val;
-+}
-+
-+/* The timeout callback function to set time out bit */
-+static void set_tmout(unsigned long indicator)
-+{
-+	*(int *)indicator = 1;
-+}
-+
-+static void xusbps_otg_msg(unsigned long indicator)
-+{
-+	struct xusbps_otg	*xotg = the_transceiver;
-+
-+	switch (indicator) {
-+	case 2:
-+	case 4:
-+	case 6:
-+	case 7:
-+		dev_warn(xotg->dev,
-+			"OTG:%lu - deivce not responding\n", indicator);
-+		break;
-+	case 3:
-+		dev_warn(xotg->dev,
-+			"OTG:%lu - deivce not supported\n", indicator);
-+		break;
-+	default:
-+		dev_warn(xotg->dev, "Do not have this msg\n");
-+		break;
-+	}
-+}
-+
-+/* Initialize timers */
-+static int xusbps_otg_init_timers(struct otg_hsm *hsm)
-+{
-+	/* HSM used timers */
-+	a_wait_vrise_tmr = otg_timer_initializer(&set_tmout, TA_WAIT_VRISE,
-+				(unsigned long)&hsm->a_wait_vrise_tmout);
-+	if (a_wait_vrise_tmr == NULL)
-+		return -ENOMEM;
-+	a_aidl_bdis_tmr = otg_timer_initializer(&set_tmout, TA_AIDL_BDIS,
-+				(unsigned long)&hsm->a_aidl_bdis_tmout);
-+	if (a_aidl_bdis_tmr == NULL)
-+		return -ENOMEM;
-+	b_se0_srp_tmr = otg_timer_initializer(&set_tmout, TB_SE0_SRP,
-+				(unsigned long)&hsm->b_se0_srp);
-+	if (b_se0_srp_tmr == NULL)
-+		return -ENOMEM;
-+	b_srp_init_tmr = otg_timer_initializer(&set_tmout, TB_SRP_INIT,
-+				(unsigned long)&hsm->b_srp_init_tmout);
-+	if (b_srp_init_tmr == NULL)
-+		return -ENOMEM;
-+
-+	return 0;
-+}
-+
-+/* Free timers */
-+static void xusbps_otg_free_timers(void)
-+{
-+	kfree(a_wait_vrise_tmr);
-+	kfree(a_aidl_bdis_tmr);
-+	kfree(b_se0_srp_tmr);
-+	kfree(b_srp_init_tmr);
-+}
-+
-+/* The timeout callback function to set time out bit */
-+static void xusbps_otg_timer_fn(unsigned long indicator)
-+{
-+	struct xusbps_otg *xotg = the_transceiver;
-+
-+	*(int *)indicator = 1;
-+
-+	dev_dbg(xotg->dev, "kernel timer - timeout\n");
-+
-+	xusbps_update_transceiver();
-+}
-+
-+/* kernel timer used instead of HW based interrupt */
-+static void xusbps_otg_add_ktimer(enum xusbps_otg_timer_type timers)
-+{
-+	struct xusbps_otg		*xotg = the_transceiver;
-+	unsigned long		j = jiffies;
-+	unsigned long		data, time;
-+
-+	switch (timers) {
-+	case TA_WAIT_VRISE_TMR:
-+		xotg->hsm.a_wait_vrise_tmout = 0;
-+		data = (unsigned long)&xotg->hsm.a_wait_vrise_tmout;
-+		time = TA_WAIT_VRISE;
-+		break;
-+	case TA_WAIT_BCON_TMR:
-+		xotg->hsm.a_wait_bcon_tmout = 0;
-+		data = (unsigned long)&xotg->hsm.a_wait_bcon_tmout;
-+		time = TA_WAIT_BCON;
-+		break;
-+	case TA_AIDL_BDIS_TMR:
-+		xotg->hsm.a_aidl_bdis_tmout = 0;
-+		data = (unsigned long)&xotg->hsm.a_aidl_bdis_tmout;
-+		time = TA_AIDL_BDIS;
-+		break;
-+	case TB_ASE0_BRST_TMR:
-+		xotg->hsm.b_ase0_brst_tmout = 0;
-+		data = (unsigned long)&xotg->hsm.b_ase0_brst_tmout;
-+		time = TB_ASE0_BRST;
-+		break;
-+	case TB_SRP_INIT_TMR:
-+		xotg->hsm.b_srp_init_tmout = 0;
-+		data = (unsigned long)&xotg->hsm.b_srp_init_tmout;
-+		time = TB_SRP_INIT;
-+		break;
-+	case TB_SRP_FAIL_TMR:
-+		xotg->hsm.b_srp_fail_tmout = 0;
-+		data = (unsigned long)&xotg->hsm.b_srp_fail_tmout;
-+		time = TB_SRP_FAIL;
-+		break;
-+	case TB_BUS_SUSPEND_TMR:
-+		xotg->hsm.b_bus_suspend_tmout = 0;
-+		data = (unsigned long)&xotg->hsm.b_bus_suspend_tmout;
-+		time = TB_BUS_SUSPEND;
-+		break;
-+	default:
-+		dev_dbg(xotg->dev, "unkown timer, cannot enable it\n");
-+		return;
-+	}
-+
-+	xotg->hsm_timer.data = data;
-+	xotg->hsm_timer.function = xusbps_otg_timer_fn;
-+	xotg->hsm_timer.expires = j + time * HZ / 1000; /* milliseconds */
-+
-+	add_timer(&xotg->hsm_timer);
-+
-+	dev_dbg(xotg->dev, "add timer successfully\n");
-+}
-+
-+/* Add timer to timer list */
-+static void xusbps_otg_add_timer(void *gtimer)
-+{
-+	struct xusbps_otg *xotg = the_transceiver;
-+	struct xusbps_otg_timer *timer = (struct xusbps_otg_timer *)gtimer;
-+	struct xusbps_otg_timer *tmp_timer;
-+	u32	val32;
-+
-+	/* Check if the timer is already in the active list,
-+	 * if so update timer count
-+	 */
-+	list_for_each_entry(tmp_timer, &active_timers, list)
-+		if (tmp_timer == timer) {
-+			timer->count = timer->expires;
-+			return;
-+		}
-+	timer->count = timer->expires;
-+
-+	if (list_empty(&active_timers)) {
-+		val32 = readl(xotg->base + CI_OTGSC);
-+		writel(val32 | OTGSC_1MSE, xotg->base + CI_OTGSC);
-+	}
-+
-+	list_add_tail(&timer->list, &active_timers);
-+}
-+
-+/* Remove timer from the timer list; clear timeout status */
-+static void xusbps_otg_del_timer(void *gtimer)
-+{
-+	struct xusbps_otg *xotg = the_transceiver;
-+	struct xusbps_otg_timer *timer = (struct xusbps_otg_timer *)gtimer;
-+	struct xusbps_otg_timer *tmp_timer, *del_tmp;
-+	u32 val32;
-+
-+	list_for_each_entry_safe(tmp_timer, del_tmp, &active_timers, list)
-+		if (tmp_timer == timer)
-+			list_del(&timer->list);
-+
-+	if (list_empty(&active_timers)) {
-+		val32 = readl(xotg->base + CI_OTGSC);
-+		writel(val32 & ~OTGSC_1MSE, xotg->base + CI_OTGSC);
-+	}
-+}
-+
-+/* Reduce timer count by 1, and find timeout conditions.*/
-+static int xusbps_otg_tick_timer(u32 *int_sts)
-+{
-+	struct xusbps_otg	*xotg = the_transceiver;
-+	struct xusbps_otg_timer *tmp_timer, *del_tmp;
-+	int expired = 0;
-+
-+	list_for_each_entry_safe(tmp_timer, del_tmp, &active_timers, list) {
-+		tmp_timer->count--;
-+		/* check if timer expires */
-+		if (!tmp_timer->count) {
-+			list_del(&tmp_timer->list);
-+			tmp_timer->function(tmp_timer->data);
-+			expired = 1;
-+		}
-+	}
-+
-+	if (list_empty(&active_timers)) {
-+		dev_dbg(xotg->dev, "tick timer: disable 1ms int\n");
-+		*int_sts = *int_sts & ~OTGSC_1MSE;
-+	}
-+	return expired;
-+}
-+
-+static void reset_otg(void)
-+{
-+	struct xusbps_otg	*xotg = the_transceiver;
-+	int			delay_time = 1000;
-+	u32			val;
-+
-+	dev_dbg(xotg->dev, "reseting OTG controller ...\n");
-+	val = readl(xotg->base + CI_USBCMD);
-+	writel(val | USBCMD_RST, xotg->base + CI_USBCMD);
-+	do {
-+		udelay(100);
-+		if (!delay_time--)
-+			dev_dbg(xotg->dev, "reset timeout\n");
-+		val = readl(xotg->base + CI_USBCMD);
-+		val &= USBCMD_RST;
-+	} while (val != 0);
-+	dev_dbg(xotg->dev, "reset done.\n");
-+}
-+
-+static void set_host_mode(void)
-+{
-+	struct xusbps_otg	*xotg = the_transceiver;
-+	u32			val;
-+
-+	reset_otg();
-+	val = readl(xotg->base + CI_USBMODE);
-+	val = (val & (~USBMODE_CM)) | USBMODE_HOST;
-+	writel(val, xotg->base + CI_USBMODE);
-+}
-+
-+static void set_client_mode(void)
-+{
-+	struct xusbps_otg	*xotg = the_transceiver;
-+	u32			val;
-+
-+	reset_otg();
-+	val = readl(xotg->base + CI_USBMODE);
-+	val = (val & (~USBMODE_CM)) | USBMODE_DEVICE;
-+	writel(val, xotg->base + CI_USBMODE);
-+}
-+
-+static void init_hsm(void)
-+{
-+	struct xusbps_otg		*xotg = the_transceiver;
-+	u32				val32;
-+
-+	/* read OTGSC after reset */
-+	val32 = readl(xotg->base + CI_OTGSC);
-+
-+	/* set init state */
-+	if (val32 & OTGSC_ID) {
-+		xotg->hsm.id = 1;
-+		xotg->otg.otg->default_a = 0;
-+		set_client_mode();
-+		xotg->otg.state = OTG_STATE_B_IDLE;
-+	} else {
-+		xotg->hsm.id = 0;
-+		xotg->otg.otg->default_a = 1;
-+		set_host_mode();
-+		xotg->otg.state = OTG_STATE_A_IDLE;
-+	}
-+
-+	/* set session indicator */
-+	if (!xotg->otg.otg->default_a) {
-+		if (val32 & OTGSC_BSE)
-+			xotg->hsm.b_sess_end = 1;
-+		if (val32 & OTGSC_BSV)
-+			xotg->hsm.b_sess_vld = 1;
-+	} else {
-+		if (val32 & OTGSC_ASV)
-+			xotg->hsm.a_sess_vld = 1;
-+		if (val32 & OTGSC_AVV)
-+			xotg->hsm.a_vbus_vld = 1;
-+	}
-+
-+	/* defautly power the bus */
-+	xotg->hsm.a_bus_req = 0;
-+	xotg->hsm.a_bus_drop = 0;
-+	/* defautly don't request bus as B device */
-+	xotg->hsm.b_bus_req = 0;
-+	/* no system error */
-+	xotg->hsm.a_clr_err = 0;
-+
-+	xusbps_otg_phy_low_power_wait(1);
-+}
-+
-+#ifdef CONFIG_PM_SLEEP
-+static void update_hsm(void)
-+{
-+	struct xusbps_otg		*xotg = the_transceiver;
-+	u32				val32;
-+
-+	/* read OTGSC */
-+	val32 = readl(xotg->base + CI_OTGSC);
-+
-+	xotg->hsm.id = !!(val32 & OTGSC_ID);
-+	if (!xotg->otg.otg->default_a) {
-+		xotg->hsm.b_sess_end = !!(val32 & OTGSC_BSE);
-+		xotg->hsm.b_sess_vld = !!(val32 & OTGSC_BSV);
-+	} else {
-+		xotg->hsm.a_sess_vld = !!(val32 & OTGSC_ASV);
-+		xotg->hsm.a_vbus_vld = !!(val32 & OTGSC_AVV);
-+	}
-+}
-+#endif
-+
-+static irqreturn_t otg_dummy_irq(int irq, void *_dev)
-+{
-+	struct xusbps_otg	*xotg = the_transceiver;
-+	void __iomem		*reg_base = _dev;
-+	u32			val;
-+	u32			int_mask = 0;
-+
-+	val = readl(reg_base + CI_USBMODE);
-+	if ((val & USBMODE_CM) != USBMODE_DEVICE)
-+		return IRQ_NONE;
-+
-+	val = readl(reg_base + CI_USBSTS);
-+	int_mask = val & INTR_DUMMY_MASK;
-+
-+	if (int_mask == 0)
-+		return IRQ_NONE;
-+
-+	/* Clear interrupts */
-+	writel(int_mask, reg_base + CI_USBSTS);
-+
-+	/* clear hsm.b_conn here since host driver can't detect it
-+	*  otg_dummy_irq called means B-disconnect happened.
-+	*/
-+	if (xotg->hsm.b_conn) {
-+		xotg->hsm.b_conn = 0;
-+		if (spin_trylock(&xotg->wq_lock)) {
-+			xusbps_update_transceiver();
-+			spin_unlock(&xotg->wq_lock);
-+		}
-+	}
-+
-+	return IRQ_HANDLED;
-+}
-+
-+static irqreturn_t otg_irq(int irq, void *_dev)
-+{
-+	struct xusbps_otg		*xotg = _dev;
-+	u32				int_sts, int_en;
-+	u32				int_mask = 0;
-+	int				flag = 0;
-+	unsigned long flags;
-+
-+	spin_lock_irqsave(&xotg->lock, flags);
-+	int_sts = readl(xotg->base + CI_OTGSC);
-+	int_en = (int_sts & OTGSC_INTEN_MASK) >> 8;
-+	int_mask = int_sts & int_en;
-+
-+	if (int_mask == 0) {
-+		spin_unlock_irqrestore(&xotg->lock, flags);
-+		return IRQ_NONE;
-+	}
-+
-+	writel((int_sts & ~OTGSC_INTSTS_MASK) | int_mask,
-+					xotg->base + CI_OTGSC);
-+	if (int_mask & OTGSC_IDIS) {
-+		dev_dbg(xotg->dev, "%s: id change int\n", __func__);
-+		xotg->hsm.id = (int_sts & OTGSC_ID) ? 1 : 0;
-+		dev_dbg(xotg->dev, "id = %d\n", xotg->hsm.id);
-+		flag = 1;
-+	}
-+	if (int_mask & OTGSC_DPIS) {
-+		dev_dbg(xotg->dev, "%s: data pulse int\n", __func__);
-+		if (xotg->otg.otg->default_a)
-+			xotg->hsm.a_srp_det = (int_sts & OTGSC_DPS) ? 1 : 0;
-+		dev_dbg(xotg->dev, "data pulse = %d\n", xotg->hsm.a_srp_det);
-+		flag = 1;
-+	}
-+	if (int_mask & OTGSC_BSEIS) {
-+		dev_dbg(xotg->dev, "%s: b session end int\n", __func__);
-+		if (!xotg->otg.otg->default_a)
-+			xotg->hsm.b_sess_end = (int_sts & OTGSC_BSE) ? 1 : 0;
-+		dev_dbg(xotg->dev, "b_sess_end = %d\n", xotg->hsm.b_sess_end);
-+		flag = 1;
-+	}
-+	if (int_mask & OTGSC_BSVIS) {
-+		dev_dbg(xotg->dev, "%s: b session valid int\n", __func__);
-+		if (!xotg->otg.otg->default_a)
-+			xotg->hsm.b_sess_vld = (int_sts & OTGSC_BSV) ? 1 : 0;
-+		dev_dbg(xotg->dev, "b_sess_vld = %d\n", xotg->hsm.b_sess_vld);
-+		flag = 1;
-+	}
-+	if (int_mask & OTGSC_ASVIS) {
-+		dev_dbg(xotg->dev, "%s: a session valid int\n", __func__);
-+		if (xotg->otg.otg->default_a)
-+			xotg->hsm.a_sess_vld = (int_sts & OTGSC_ASV) ? 1 : 0;
-+		dev_dbg(xotg->dev, "a_sess_vld = %d\n", xotg->hsm.a_sess_vld);
-+		flag = 1;
-+	}
-+	if (int_mask & OTGSC_AVVIS) {
-+		dev_dbg(xotg->dev, "%s: a vbus valid int\n", __func__);
-+		if (xotg->otg.otg->default_a)
-+			xotg->hsm.a_vbus_vld = (int_sts & OTGSC_AVV) ? 1 : 0;
-+		dev_dbg(xotg->dev, "a_vbus_vld = %d\n", xotg->hsm.a_vbus_vld);
-+		flag = 1;
-+	}
-+
-+	if (int_mask & OTGSC_1MSS) {
-+		/* need to schedule otg_work if any timer is expired */
-+		if (xusbps_otg_tick_timer(&int_sts))
-+			flag = 1;
-+	}
-+
-+	if (flag)
-+		xusbps_update_transceiver();
-+
-+	spin_unlock_irqrestore(&xotg->lock, flags);
-+	return IRQ_HANDLED;
-+}
-+
-+/**
-+ * xotg_usbdev_notify - Notifier function called by usb core.
-+ * @self:	Pointer to notifier_block structure
-+ * @action:	action which caused the notifier function call.
-+ * @dev:	Pointer to the usb device structure.
-+ *
-+ * This function is a call back function used by usb core to notify
-+ * device attach/detach events. This is used by OTG state machine.
-+ *
-+ * returns:	Always returns NOTIFY_OK.
-+ **/
-+static int xotg_usbdev_notify(struct notifier_block *self,
-+			       unsigned long action, void *dev)
-+{
-+	struct xusbps_otg	*xotg = the_transceiver;
-+	struct usb_phy *otg = &xotg->otg;
-+	unsigned long otg_port;
-+	struct usb_device *udev_otg = NULL;
-+	struct usb_device *udev;
-+	u32 flag;
-+
-+	udev = (struct usb_device *)dev;
-+
-+	if (!otg->otg->host)
-+		return NOTIFY_OK;
-+
-+	otg_port = otg->otg->host->otg_port;
-+
-+	if (otg->otg->host->root_hub)
-+		udev_otg = usb_hub_find_child(otg->otg->host->root_hub,
-+								otg_port - 1);
-+
-+	/* Not otg device notification */
-+	if (udev != udev_otg)
-+		return NOTIFY_OK;
-+
-+	switch (action) {
-+	case USB_DEVICE_ADD:
-+		if (xotg->otg.otg->default_a == 1)
-+			xotg->hsm.b_conn = 1;
-+		else
-+			xotg->hsm.a_conn = 1;
-+		flag = 1;
-+		break;
-+	case USB_DEVICE_REMOVE:
-+		if (xotg->otg.otg->default_a == 1)
-+			xotg->hsm.b_conn = 0;
-+		else
-+			xotg->hsm.a_conn = 0;
-+		flag = 1;
-+		break;
-+	}
-+	if (flag)
-+		xusbps_update_transceiver();
-+
-+	return NOTIFY_OK;
-+}
-+
-+static void xusbps_otg_work(struct work_struct *work)
-+{
-+	struct xusbps_otg		*xotg;
-+	int				retval;
-+
-+	xotg = container_of(work, struct xusbps_otg, work);
-+
-+	dev_dbg(xotg->dev, "%s: old state = %s\n", __func__,
-+		usb_otg_state_string(xotg->otg.state));
-+
-+	switch (xotg->otg.state) {
-+	case OTG_STATE_UNDEFINED:
-+	case OTG_STATE_B_IDLE:
-+		if (!xotg->hsm.id) {
-+			xusbps_otg_del_timer(b_srp_init_tmr);
-+			del_timer_sync(&xotg->hsm_timer);
-+
-+			xotg->otg.otg->default_a = 1;
-+			xotg->hsm.a_srp_det = 0;
-+
-+			xusbps_otg_chrg_vbus(0);
-+			set_host_mode();
-+			xusbps_otg_phy_low_power(1);
-+
-+			xotg->otg.state = OTG_STATE_A_IDLE;
-+			xusbps_update_transceiver();
-+		} else if (xotg->hsm.b_sess_vld) {
-+			xusbps_otg_del_timer(b_srp_init_tmr);
-+			del_timer_sync(&xotg->hsm_timer);
-+			xotg->hsm.b_bus_req = 0;
-+			xotg->hsm.b_sess_end = 0;
-+			xotg->hsm.a_bus_suspend = 0;
-+			xusbps_otg_chrg_vbus(0);
-+
-+			if (xotg->start_peripheral) {
-+				xotg->start_peripheral(&xotg->otg);
-+				xotg->otg.state = OTG_STATE_B_PERIPHERAL;
-+			} else
-+				dev_dbg(xotg->dev,
-+					"client driver not loaded\n");
-+		} else if (xotg->hsm.b_srp_init_tmout) {
-+			xotg->hsm.b_srp_init_tmout = 0;
-+			dev_warn(xotg->dev, "SRP init timeout\n");
-+		} else if (xotg->hsm.b_srp_fail_tmout) {
-+			xotg->hsm.b_srp_fail_tmout = 0;
-+			xotg->hsm.b_bus_req = 0;
-+
-+			/* No silence failure */
-+			xusbps_otg_msg(6);
-+			dev_warn(xotg->dev, "SRP failed\n");
-+		} else if (xotg->hsm.b_bus_req && xotg->hsm.b_sess_end) {
-+			del_timer_sync(&xotg->hsm_timer);
-+			/* workaround for b_se0_srp detection */
-+			retval = xusbps_otg_check_se0_srp(0);
-+			if (retval) {
-+				xotg->hsm.b_bus_req = 0;
-+				dev_dbg(xotg->dev, "LS isn't SE0, try later\n");
-+			} else {
-+				/* clear the PHCD before start srp */
-+				xusbps_otg_phy_low_power(0);
-+
-+				/* Start SRP */
-+				xusbps_otg_add_timer(b_srp_init_tmr);
-+				xotg->otg.otg->start_srp(xotg->otg.otg);
-+				xusbps_otg_del_timer(b_srp_init_tmr);
-+				xusbps_otg_add_ktimer(TB_SRP_FAIL_TMR);
-+
-+				/* reset PHY low power mode here */
-+				xusbps_otg_phy_low_power_wait(1);
-+			}
-+		}
-+		break;
-+	case OTG_STATE_B_SRP_INIT:
-+		if (!xotg->hsm.id) {
-+			xotg->otg.otg->default_a = 1;
-+			xotg->hsm.a_srp_det = 0;
-+
-+			/* Turn off VBus */
-+			xotg->otg.otg->set_vbus(xotg->otg.otg, false);
-+			xusbps_otg_chrg_vbus(0);
-+			set_host_mode();
-+			xusbps_otg_phy_low_power(1);
-+			xotg->otg.state = OTG_STATE_A_IDLE;
-+			xusbps_update_transceiver();
-+		} else if (xotg->hsm.b_sess_vld) {
-+			xusbps_otg_chrg_vbus(0);
-+			if (xotg->start_peripheral) {
-+				xotg->start_peripheral(&xotg->otg);
-+				xotg->otg.state = OTG_STATE_B_PERIPHERAL;
-+			} else
-+				dev_dbg(xotg->dev,
-+					"client driver not loaded\n");
-+		}
-+		break;
-+	case OTG_STATE_B_PERIPHERAL:
-+		if (!xotg->hsm.id) {
-+			xotg->otg.otg->default_a = 1;
-+			xotg->hsm.a_srp_det = 0;
-+
-+			xusbps_otg_chrg_vbus(0);
-+
-+			if (xotg->stop_peripheral)
-+				xotg->stop_peripheral(&xotg->otg);
-+			else
-+				dev_dbg(xotg->dev,
-+					"client driver has been removed.\n");
-+
-+			set_host_mode();
-+			xusbps_otg_phy_low_power(1);
-+			xotg->otg.state = OTG_STATE_A_IDLE;
-+			xusbps_update_transceiver();
-+		} else if (!xotg->hsm.b_sess_vld) {
-+			xotg->hsm.b_hnp_enable = 0;
-+			xotg->hsm.b_bus_req = 0;
-+
-+			if (xotg->stop_peripheral)
-+				xotg->stop_peripheral(&xotg->otg);
-+			else
-+				dev_dbg(xotg->dev,
-+					"client driver has been removed.\n");
-+
-+			xotg->otg.state = OTG_STATE_B_IDLE;
-+		} else if (xotg->hsm.b_bus_req && xotg->otg.otg->gadget &&
-+					xotg->otg.otg->gadget->b_hnp_enable &&
-+					xotg->hsm.a_bus_suspend) {
-+			dev_warn(xotg->dev, "HNP detected\n");
-+
-+			if (xotg->stop_peripheral)
-+				xotg->stop_peripheral(&xotg->otg);
-+			else
-+				dev_dbg(xotg->dev,
-+					"client driver has been removed.\n");
-+
-+			xusbps_otg_HAAR(1);
-+			xotg->hsm.a_conn = 0;
-+
-+			xotg->otg.state = OTG_STATE_B_WAIT_ACON;
-+			if (xotg->start_host) {
-+				xotg->start_host(&xotg->otg);
-+			} else
-+				dev_dbg(xotg->dev,
-+						"host driver not loaded.\n");
-+
-+			xotg->hsm.a_bus_resume = 0;
-+			xusbps_otg_add_ktimer(TB_ASE0_BRST_TMR);
-+		}
-+		break;
-+
-+	case OTG_STATE_B_WAIT_ACON:
-+		if (!xotg->hsm.id) {
-+			/* delete hsm timer for b_ase0_brst_tmr */
-+			del_timer_sync(&xotg->hsm_timer);
-+
-+			xotg->otg.otg->default_a = 1;
-+			xotg->hsm.a_srp_det = 0;
-+
-+			xusbps_otg_chrg_vbus(0);
-+
-+			xusbps_otg_HAAR(0);
-+			if (xotg->stop_host)
-+				xotg->stop_host(&xotg->otg);
-+			else
-+				dev_dbg(xotg->dev,
-+					"host driver has been removed.\n");
-+
-+			set_host_mode();
-+			xusbps_otg_phy_low_power(1);
-+			xotg->otg.state = OTG_STATE_A_IDLE;
-+			xusbps_update_transceiver();
-+		} else if (!xotg->hsm.b_sess_vld) {
-+			/* delete hsm timer for b_ase0_brst_tmr */
-+			del_timer_sync(&xotg->hsm_timer);
-+
-+			xotg->hsm.b_hnp_enable = 0;
-+			xotg->hsm.b_bus_req = 0;
-+
-+			xusbps_otg_chrg_vbus(0);
-+			xusbps_otg_HAAR(0);
-+
-+			if (xotg->stop_host)
-+				xotg->stop_host(&xotg->otg);
-+			else
-+				dev_dbg(xotg->dev,
-+					"host driver has been removed.\n");
-+
-+			set_client_mode();
-+			xusbps_otg_phy_low_power(1);
-+			xotg->otg.state = OTG_STATE_B_IDLE;
-+		} else if (xotg->hsm.a_conn) {
-+			/* delete hsm timer for b_ase0_brst_tmr */
-+			del_timer_sync(&xotg->hsm_timer);
-+
-+			xusbps_otg_HAAR(0);
-+			xotg->otg.state = OTG_STATE_B_HOST;
-+			xusbps_update_transceiver();
-+		} else if (xotg->hsm.a_bus_resume ||
-+				xotg->hsm.b_ase0_brst_tmout) {
-+			dev_warn(xotg->dev, "A device connect failed\n");
-+			/* delete hsm timer for b_ase0_brst_tmr */
-+			del_timer_sync(&xotg->hsm_timer);
-+
-+			xusbps_otg_HAAR(0);
-+			xusbps_otg_msg(7);
-+
-+			if (xotg->stop_host)
-+				xotg->stop_host(&xotg->otg);
-+			else
-+				dev_dbg(xotg->dev,
-+					"host driver has been removed.\n");
-+
-+			xotg->hsm.a_bus_suspend = 0;
-+			xotg->hsm.b_bus_req = 0;
-+			xotg->otg.state = OTG_STATE_B_PERIPHERAL;
-+			if (xotg->start_peripheral)
-+				xotg->start_peripheral(&xotg->otg);
-+			else
-+				dev_dbg(xotg->dev,
-+					"client driver not loaded.\n");
-+		}
-+		break;
-+
-+	case OTG_STATE_B_HOST:
-+		if (!xotg->hsm.id) {
-+			xotg->otg.otg->default_a = 1;
-+			xotg->hsm.a_srp_det = 0;
-+
-+			xusbps_otg_chrg_vbus(0);
-+
-+			if (xotg->stop_host)
-+				xotg->stop_host(&xotg->otg);
-+			else
-+				dev_dbg(xotg->dev,
-+					"host driver has been removed.\n");
-+
-+			set_host_mode();
-+			xusbps_otg_phy_low_power(1);
-+			xotg->otg.state = OTG_STATE_A_IDLE;
-+			xusbps_update_transceiver();
-+		} else if (!xotg->hsm.b_sess_vld) {
-+			xotg->hsm.b_hnp_enable = 0;
-+			xotg->hsm.b_bus_req = 0;
-+
-+			xusbps_otg_chrg_vbus(0);
-+			if (xotg->stop_host)
-+				xotg->stop_host(&xotg->otg);
-+			else
-+				dev_dbg(xotg->dev,
-+					"host driver has been removed.\n");
-+
-+			set_client_mode();
-+			xusbps_otg_phy_low_power(1);
-+			xotg->otg.state = OTG_STATE_B_IDLE;
-+		} else if ((!xotg->hsm.b_bus_req) ||
-+				(!xotg->hsm.a_conn)) {
-+			xotg->hsm.b_bus_req = 0;
-+			xusbps_otg_loc_sof(0);
-+
-+			/* Fix: The kernel crash in usb_port_suspend
-+				during HNP */
-+			msleep(20);
-+
-+			if (xotg->stop_host)
-+				xotg->stop_host(&xotg->otg);
-+			else
-+				dev_dbg(xotg->dev,
-+					"host driver has been removed.\n");
-+
-+			xotg->hsm.a_bus_suspend = 0;
-+			xotg->otg.state = OTG_STATE_B_PERIPHERAL;
-+			if (xotg->start_peripheral)
-+				xotg->start_peripheral(&xotg->otg);
-+			else
-+				dev_dbg(xotg->dev,
-+						"client driver not loaded.\n");
-+		}
-+		break;
-+
-+	case OTG_STATE_A_IDLE:
-+		xotg->otg.otg->default_a = 1;
-+		if (xotg->hsm.id) {
-+			xotg->otg.otg->default_a = 0;
-+			xotg->hsm.b_bus_req = 0;
-+			xotg->hsm.vbus_srp_up = 0;
-+
-+			xusbps_otg_chrg_vbus(0);
-+			set_client_mode();
-+			xusbps_otg_phy_low_power(1);
-+			xotg->otg.state = OTG_STATE_B_IDLE;
-+			xusbps_update_transceiver();
-+		} else if (!xotg->hsm.a_bus_drop &&
-+			(xotg->hsm.a_srp_det || xotg->hsm.a_bus_req)) {
-+			dev_warn(xotg->dev,
-+			"SRP detected or User has requested for the Bus\n");
-+			xusbps_otg_phy_low_power(0);
-+
-+			/* Turn on VBus */
-+			xotg->otg.otg->set_vbus(xotg->otg.otg, true);
-+
-+			xotg->hsm.vbus_srp_up = 0;
-+			xotg->hsm.a_wait_vrise_tmout = 0;
-+			xusbps_otg_add_timer(a_wait_vrise_tmr);
-+			xotg->otg.state = OTG_STATE_A_WAIT_VRISE;
-+			xusbps_update_transceiver();
-+		} else if (!xotg->hsm.a_bus_drop && xotg->hsm.a_sess_vld) {
-+			xotg->hsm.vbus_srp_up = 1;
-+		} else if (!xotg->hsm.a_sess_vld && xotg->hsm.vbus_srp_up) {
-+			msleep(10);
-+			xusbps_otg_phy_low_power(0);
-+
-+			/* Turn on VBus */
-+			xotg->otg.otg->set_vbus(xotg->otg.otg, true);
-+			xotg->hsm.a_srp_det = 1;
-+			xotg->hsm.vbus_srp_up = 0;
-+			xotg->hsm.a_wait_vrise_tmout = 0;
-+			xusbps_otg_add_timer(a_wait_vrise_tmr);
-+			xotg->otg.state = OTG_STATE_A_WAIT_VRISE;
-+			xusbps_update_transceiver();
-+		} else if (!xotg->hsm.a_sess_vld &&
-+				!xotg->hsm.vbus_srp_up) {
-+			xusbps_otg_phy_low_power(1);
-+		}
-+		break;
-+	case OTG_STATE_A_WAIT_VRISE:
-+		if (xotg->hsm.id) {
-+			xusbps_otg_del_timer(a_wait_vrise_tmr);
-+			xotg->hsm.b_bus_req = 0;
-+			xotg->otg.otg->default_a = 0;
-+
-+			/* Turn off VBus */
-+			xotg->otg.otg->set_vbus(xotg->otg.otg, false);
-+			set_client_mode();
-+			xusbps_otg_phy_low_power_wait(1);
-+			xotg->otg.state = OTG_STATE_B_IDLE;
-+		} else if (xotg->hsm.a_vbus_vld) {
-+			xusbps_otg_del_timer(a_wait_vrise_tmr);
-+			xotg->hsm.b_conn = 0;
-+			if (xotg->start_host)
-+				xotg->start_host(&xotg->otg);
-+			else {
-+				dev_dbg(xotg->dev, "host driver not loaded.\n");
-+				break;
-+			}
-+			xusbps_otg_add_ktimer(TA_WAIT_BCON_TMR);
-+			xotg->otg.state = OTG_STATE_A_WAIT_BCON;
-+		} else if (xotg->hsm.a_wait_vrise_tmout) {
-+			xotg->hsm.b_conn = 0;
-+			if (xotg->hsm.a_vbus_vld) {
-+				if (xotg->start_host)
-+					xotg->start_host(&xotg->otg);
-+				else {
-+					dev_dbg(xotg->dev,
-+						"host driver not loaded.\n");
-+					break;
-+				}
-+				xusbps_otg_add_ktimer(TA_WAIT_BCON_TMR);
-+				xotg->otg.state = OTG_STATE_A_WAIT_BCON;
-+			} else {
-+
-+				/* Turn off VBus */
-+				xotg->otg.otg->set_vbus(xotg->otg.otg, false);
-+				xusbps_otg_phy_low_power_wait(1);
-+				xotg->otg.state = OTG_STATE_A_VBUS_ERR;
-+			}
-+		}
-+		break;
-+	case OTG_STATE_A_WAIT_BCON:
-+		if (xotg->hsm.id) {
-+			/* delete hsm timer for a_wait_bcon_tmr */
-+			del_timer_sync(&xotg->hsm_timer);
-+
-+			xotg->otg.otg->default_a = 0;
-+			xotg->hsm.b_bus_req = 0;
-+
-+			if (xotg->stop_host)
-+				xotg->stop_host(&xotg->otg);
-+			else
-+				dev_dbg(xotg->dev,
-+					"host driver has been removed.\n");
-+
-+			/* Turn off VBus */
-+			xotg->otg.otg->set_vbus(xotg->otg.otg, false);
-+			set_client_mode();
-+			xusbps_otg_phy_low_power_wait(1);
-+			xotg->otg.state = OTG_STATE_B_IDLE;
-+			xusbps_update_transceiver();
-+		} else if (!xotg->hsm.a_vbus_vld) {
-+			/* delete hsm timer for a_wait_bcon_tmr */
-+			del_timer_sync(&xotg->hsm_timer);
-+
-+			if (xotg->stop_host)
-+				xotg->stop_host(&xotg->otg);
-+			else
-+				dev_dbg(xotg->dev,
-+					"host driver has been removed.\n");
-+
-+			/* Turn off VBus */
-+			xotg->otg.otg->set_vbus(xotg->otg.otg, false);
-+			xusbps_otg_phy_low_power_wait(1);
-+			xotg->otg.state = OTG_STATE_A_VBUS_ERR;
-+		} else if (xotg->hsm.a_bus_drop ||
-+				(xotg->hsm.a_wait_bcon_tmout &&
-+				!xotg->hsm.a_bus_req)) {
-+			dev_warn(xotg->dev, "B connect timeout\n");
-+			/* delete hsm timer for a_wait_bcon_tmr */
-+			del_timer_sync(&xotg->hsm_timer);
-+
-+			if (xotg->stop_host)
-+				xotg->stop_host(&xotg->otg);
-+			else
-+				dev_dbg(xotg->dev,
-+					"host driver has been removed.\n");
-+
-+			/* Turn off VBus */
-+			xotg->otg.otg->set_vbus(xotg->otg.otg, false);
-+			xotg->otg.state = OTG_STATE_A_WAIT_VFALL;
-+		} else if (xotg->hsm.b_conn) {
-+			/* delete hsm timer for a_wait_bcon_tmr */
-+			del_timer_sync(&xotg->hsm_timer);
-+
-+			xotg->hsm.a_suspend_req = 0;
-+			/* Make it zero as it should not be used by driver */
-+			xotg->hsm.a_bus_req = 0;
-+			xotg->hsm.a_srp_det = 0;
-+			xotg->otg.state = OTG_STATE_A_HOST;
-+		}
-+		break;
-+	case OTG_STATE_A_HOST:
-+		if (xotg->hsm.id) {
-+			xotg->otg.otg->default_a = 0;
-+			xotg->hsm.b_bus_req = 0;
-+
-+			if (xotg->stop_host)
-+				xotg->stop_host(&xotg->otg);
-+			else
-+				dev_dbg(xotg->dev,
-+					"host driver has been removed.\n");
-+
-+			/* Turn off VBus */
-+			xotg->otg.otg->set_vbus(xotg->otg.otg, false);
-+			set_client_mode();
-+			xusbps_otg_phy_low_power_wait(1);
-+			xotg->otg.state = OTG_STATE_B_IDLE;
-+			xusbps_update_transceiver();
-+		} else if (xotg->hsm.a_bus_drop ||
-+				(xotg->otg.otg->host &&
-+				!xotg->otg.otg->host->b_hnp_enable &&
-+					!xotg->hsm.a_bus_req)) {
-+			if (xotg->stop_host)
-+				xotg->stop_host(&xotg->otg);
-+			else
-+				dev_dbg(xotg->dev,
-+					"host driver has been removed.\n");
-+
-+			/* Turn off VBus */
-+			xotg->otg.otg->set_vbus(xotg->otg.otg, false);
-+			xotg->otg.state = OTG_STATE_A_WAIT_VFALL;
-+		} else if (!xotg->hsm.a_vbus_vld) {
-+			if (xotg->stop_host)
-+				xotg->stop_host(&xotg->otg);
-+			else
-+				dev_dbg(xotg->dev,
-+					"host driver has been removed.\n");
-+
-+			/* Turn off VBus */
-+			xotg->otg.otg->set_vbus(xotg->otg.otg, false);
-+			xusbps_otg_phy_low_power_wait(1);
-+			xotg->otg.state = OTG_STATE_A_VBUS_ERR;
-+		} else if (xotg->otg.otg->host &&
-+				xotg->otg.otg->host->b_hnp_enable &&
-+				(!xotg->hsm.a_bus_req ||
-+					xotg->hsm.a_suspend_req)) {
-+			/* Set HABA to enable hardware assistance to signal
-+			 *  A-connect after receiver B-disconnect. Hardware
-+			 *  will then set client mode and enable URE, SLE and
-+			 *  PCE after the assistance. otg_dummy_irq is used to
-+			 *  clean these ints when client driver is not resumed.
-+			 */
-+			if (request_irq(xotg->irq, otg_dummy_irq, IRQF_SHARED,
-+					driver_name, xotg->base) != 0) {
-+				dev_dbg(xotg->dev,
-+					"request interrupt %d failed\n",
-+						xotg->irq);
-+			}
-+			/* set HABA */
-+			xusbps_otg_HABA(1);
-+			xotg->hsm.b_bus_resume = 0;
-+			xotg->hsm.a_aidl_bdis_tmout = 0;
-+			xusbps_otg_loc_sof(0);
-+			/* clear PHCD to enable HW timer */
-+			xusbps_otg_phy_low_power(0);
-+			xusbps_otg_add_timer(a_aidl_bdis_tmr);
-+			xotg->otg.state = OTG_STATE_A_SUSPEND;
-+		} else if (!xotg->hsm.b_conn || !xotg->hsm.a_bus_req) {
-+			xusbps_otg_add_ktimer(TA_WAIT_BCON_TMR);
-+			xotg->otg.state = OTG_STATE_A_WAIT_BCON;
-+		}
-+		break;
-+	case OTG_STATE_A_SUSPEND:
-+		if (xotg->hsm.id) {
-+			xusbps_otg_del_timer(a_aidl_bdis_tmr);
-+			xusbps_otg_HABA(0);
-+			free_irq(xotg->irq, xotg->base);
-+			xotg->otg.otg->default_a = 0;
-+			xotg->hsm.b_bus_req = 0;
-+
-+			if (xotg->stop_host)
-+				xotg->stop_host(&xotg->otg);
-+			else
-+				dev_dbg(xotg->dev,
-+					"host driver has been removed.\n");
-+
-+			/* Turn off VBus */
-+			xotg->otg.otg->set_vbus(xotg->otg.otg, false);
-+			set_client_mode();
-+			xusbps_otg_phy_low_power(1);
-+			xotg->otg.state = OTG_STATE_B_IDLE;
-+			xusbps_update_transceiver();
-+		} else if (xotg->hsm.a_bus_req ||
-+				xotg->hsm.b_bus_resume) {
-+			xusbps_otg_del_timer(a_aidl_bdis_tmr);
-+			xusbps_otg_HABA(0);
-+			free_irq(xotg->irq, xotg->base);
-+			xotg->hsm.a_suspend_req = 0;
-+			xusbps_otg_loc_sof(1);
-+			xotg->otg.state = OTG_STATE_A_HOST;
-+		} else if (xotg->hsm.a_aidl_bdis_tmout ||
-+				xotg->hsm.a_bus_drop) {
-+			dev_warn(xotg->dev, "B disconnect timeout\n");
-+			xusbps_otg_del_timer(a_aidl_bdis_tmr);
-+			xusbps_otg_HABA(0);
-+			free_irq(xotg->irq, xotg->base);
-+			if (xotg->stop_host)
-+				xotg->stop_host(&xotg->otg);
-+			else
-+				dev_dbg(xotg->dev,
-+					"host driver has been removed.\n");
-+
-+			/* Turn off VBus */
-+			xotg->otg.otg->set_vbus(xotg->otg.otg, false);
-+			xotg->otg.state = OTG_STATE_A_WAIT_VFALL;
-+		} else if (!xotg->hsm.b_conn && xotg->otg.otg->host &&
-+				xotg->otg.otg->host->b_hnp_enable) {
-+			xusbps_otg_del_timer(a_aidl_bdis_tmr);
-+			xusbps_otg_HABA(0);
-+			free_irq(xotg->irq, xotg->base);
-+
-+			if (xotg->stop_host)
-+				xotg->stop_host(&xotg->otg);
-+			else
-+				dev_dbg(xotg->dev,
-+					"host driver has been removed.\n");
-+
-+			xotg->hsm.b_bus_suspend = 0;
-+			xotg->hsm.b_bus_suspend_vld = 0;
-+
-+			xotg->otg.state = OTG_STATE_A_PERIPHERAL;
-+			/* msleep(200); */
-+			if (xotg->start_peripheral)
-+				xotg->start_peripheral(&xotg->otg);
-+			else
-+				dev_dbg(xotg->dev,
-+					"client driver not loaded.\n");
-+			xusbps_otg_add_ktimer(TB_BUS_SUSPEND_TMR);
-+			break;
-+		} else if (!xotg->hsm.a_vbus_vld) {
-+			xusbps_otg_del_timer(a_aidl_bdis_tmr);
-+			xusbps_otg_HABA(0);
-+			free_irq(xotg->irq, xotg->base);
-+			if (xotg->stop_host)
-+				xotg->stop_host(&xotg->otg);
-+			else
-+				dev_dbg(xotg->dev,
-+					"host driver has been removed.\n");
-+
-+			/* Turn off VBus */
-+			xotg->otg.otg->set_vbus(xotg->otg.otg, false);
-+			xusbps_otg_phy_low_power_wait(1);
-+			xotg->otg.state = OTG_STATE_A_VBUS_ERR;
-+		}
-+		break;
-+	case OTG_STATE_A_PERIPHERAL:
-+		if (xotg->hsm.id) {
-+			/* delete hsm timer for b_bus_suspend_tmr */
-+			del_timer_sync(&xotg->hsm_timer);
-+			xotg->otg.otg->default_a = 0;
-+			xotg->hsm.b_bus_req = 0;
-+			if (xotg->stop_peripheral)
-+				xotg->stop_peripheral(&xotg->otg);
-+			else
-+				dev_dbg(xotg->dev,
-+					"client driver has been removed.\n");
-+
-+			/* Turn off VBus */
-+			xotg->otg.otg->set_vbus(xotg->otg.otg, false);
-+			set_client_mode();
-+			xusbps_otg_phy_low_power_wait(1);
-+			xotg->otg.state = OTG_STATE_B_IDLE;
-+			xusbps_update_transceiver();
-+		} else if (!xotg->hsm.a_vbus_vld) {
-+			/* delete hsm timer for b_bus_suspend_tmr */
-+			del_timer_sync(&xotg->hsm_timer);
-+
-+			if (xotg->stop_peripheral)
-+				xotg->stop_peripheral(&xotg->otg);
-+			else
-+				dev_dbg(xotg->dev,
-+					"client driver has been removed.\n");
-+
-+			/* Turn off VBus */
-+			xotg->otg.otg->set_vbus(xotg->otg.otg, false);
-+			xusbps_otg_phy_low_power_wait(1);
-+			xotg->otg.state = OTG_STATE_A_VBUS_ERR;
-+		} else if (xotg->hsm.a_bus_drop) {
-+			/* delete hsm timer for b_bus_suspend_tmr */
-+			del_timer_sync(&xotg->hsm_timer);
-+
-+			if (xotg->stop_peripheral)
-+				xotg->stop_peripheral(&xotg->otg);
-+			else
-+				dev_dbg(xotg->dev,
-+					"client driver has been removed.\n");
-+
-+			/* Turn off VBus */
-+			xotg->otg.otg->set_vbus(xotg->otg.otg, false);
-+			xotg->otg.state = OTG_STATE_A_WAIT_VFALL;
-+		} else if (xotg->hsm.b_bus_suspend) {
-+			dev_warn(xotg->dev, "HNP detected\n");
-+			/* delete hsm timer for b_bus_suspend_tmr */
-+			del_timer_sync(&xotg->hsm_timer);
-+
-+			if (xotg->stop_peripheral)
-+				xotg->stop_peripheral(&xotg->otg);
-+			else
-+				dev_dbg(xotg->dev,
-+					"client driver has been removed.\n");
-+
-+			xotg->otg.state = OTG_STATE_A_WAIT_BCON;
-+			if (xotg->start_host)
-+				xotg->start_host(&xotg->otg);
-+			else
-+				dev_dbg(xotg->dev,
-+						"host driver not loaded.\n");
-+			xusbps_otg_add_ktimer(TA_WAIT_BCON_TMR);
-+		} else if (xotg->hsm.b_bus_suspend_tmout) {
-+			u32	val;
-+			val = readl(xotg->base + CI_PORTSC1);
-+			if (!(val & PORTSC_SUSP))
-+				break;
-+
-+			if (xotg->stop_peripheral)
-+				xotg->stop_peripheral(&xotg->otg);
-+			else
-+				dev_dbg(xotg->dev,
-+					"client driver has been removed.\n");
-+
-+			xotg->otg.state = OTG_STATE_A_WAIT_BCON;
-+			if (xotg->start_host)
-+				xotg->start_host(&xotg->otg);
-+			else
-+				dev_dbg(xotg->dev,
-+						"host driver not loaded.\n");
-+			xusbps_otg_add_ktimer(TA_WAIT_BCON_TMR);
-+		}
-+		break;
-+	case OTG_STATE_A_VBUS_ERR:
-+		if (xotg->hsm.id) {
-+			xotg->otg.otg->default_a = 0;
-+			xotg->hsm.a_clr_err = 0;
-+			xotg->hsm.a_srp_det = 0;
-+			set_client_mode();
-+			xusbps_otg_phy_low_power(1);
-+			xotg->otg.state = OTG_STATE_B_IDLE;
-+			xusbps_update_transceiver();
-+		} else if (xotg->hsm.a_clr_err) {
-+			xotg->hsm.a_clr_err = 0;
-+			xotg->hsm.a_srp_det = 0;
-+			reset_otg();
-+			init_hsm();
-+			if (xotg->otg.state == OTG_STATE_A_IDLE)
-+				xusbps_update_transceiver();
-+		} else {
-+			/* FW will clear PHCD bit when any VBus
-+			 * event detected. Reset PHCD to 1 again */
-+			xusbps_otg_phy_low_power(1);
-+		}
-+		break;
-+	case OTG_STATE_A_WAIT_VFALL:
-+		if (xotg->hsm.id) {
-+			xotg->otg.otg->default_a = 0;
-+			set_client_mode();
-+			xusbps_otg_phy_low_power(1);
-+			xotg->otg.state = OTG_STATE_B_IDLE;
-+			xusbps_update_transceiver();
-+		} else if (xotg->hsm.a_bus_req) {
-+
-+			/* Turn on VBus */
-+			xotg->otg.otg->set_vbus(xotg->otg.otg, true);
-+			xotg->hsm.a_wait_vrise_tmout = 0;
-+			xusbps_otg_add_timer(a_wait_vrise_tmr);
-+			xotg->otg.state = OTG_STATE_A_WAIT_VRISE;
-+		} else if (!xotg->hsm.a_sess_vld) {
-+			xotg->hsm.a_srp_det = 0;
-+			set_host_mode();
-+			xusbps_otg_phy_low_power(1);
-+			xotg->otg.state = OTG_STATE_A_IDLE;
-+		}
-+		break;
-+	default:
-+		break;
-+	}
-+
-+	dev_dbg(xotg->dev, "%s: new state = %s\n", __func__,
-+		usb_otg_state_string(xotg->otg.state));
-+}
-+
-+static ssize_t
-+show_registers(struct device *_dev, struct device_attribute *attr, char *buf)
-+{
-+	struct xusbps_otg	*xotg = the_transceiver;
-+	char			*next;
-+	unsigned		size, t;
-+
-+	next = buf;
-+	size = PAGE_SIZE;
-+
-+	t = scnprintf(next, size,
-+		"\n"
-+		"USBCMD = 0x%08x\n"
-+		"USBSTS = 0x%08x\n"
-+		"USBINTR = 0x%08x\n"
-+		"ASYNCLISTADDR = 0x%08x\n"
-+		"PORTSC1 = 0x%08x\n"
-+		"OTGSC = 0x%08x\n"
-+		"USBMODE = 0x%08x\n",
-+		readl(xotg->base + 0x140),
-+		readl(xotg->base + 0x144),
-+		readl(xotg->base + 0x148),
-+		readl(xotg->base + 0x158),
-+		readl(xotg->base + 0x184),
-+		readl(xotg->base + 0x1a4),
-+		readl(xotg->base + 0x1a8)
-+	     );
-+	size -= t;
-+	next += t;
-+
-+	return PAGE_SIZE - size;
-+}
-+static DEVICE_ATTR(registers, S_IRUGO, show_registers, NULL);
-+
-+static ssize_t
-+show_hsm(struct device *_dev, struct device_attribute *attr, char *buf)
-+{
-+	struct xusbps_otg		*xotg = the_transceiver;
-+	char				*next;
-+	unsigned			size, t;
-+
-+	next = buf;
-+	size = PAGE_SIZE;
-+
-+	if (xotg->otg.otg->host)
-+		xotg->hsm.a_set_b_hnp_en = xotg->otg.otg->host->b_hnp_enable;
-+
-+	if (xotg->otg.otg->gadget)
-+		xotg->hsm.b_hnp_enable = xotg->otg.otg->gadget->b_hnp_enable;
-+
-+	t = scnprintf(next, size,
-+		"\n"
-+		"current state = %s\n"
-+		"a_bus_resume = \t%d\n"
-+		"a_bus_suspend = \t%d\n"
-+		"a_conn = \t%d\n"
-+		"a_sess_vld = \t%d\n"
-+		"a_srp_det = \t%d\n"
-+		"a_vbus_vld = \t%d\n"
-+		"b_bus_resume = \t%d\n"
-+		"b_bus_suspend = \t%d\n"
-+		"b_conn = \t%d\n"
-+		"b_se0_srp = \t%d\n"
-+		"b_sess_end = \t%d\n"
-+		"b_sess_vld = \t%d\n"
-+		"id = \t%d\n"
-+		"a_set_b_hnp_en = \t%d\n"
-+		"b_srp_done = \t%d\n"
-+		"b_hnp_enable = \t%d\n"
-+		"a_wait_vrise_tmout = \t%d\n"
-+		"a_wait_bcon_tmout = \t%d\n"
-+		"a_aidl_bdis_tmout = \t%d\n"
-+		"b_ase0_brst_tmout = \t%d\n"
-+		"a_bus_drop = \t%d\n"
-+		"a_bus_req = \t%d\n"
-+		"a_clr_err = \t%d\n"
-+		"a_suspend_req = \t%d\n"
-+		"b_bus_req = \t%d\n"
-+		"b_bus_suspend_tmout = \t%d\n"
-+		"b_bus_suspend_vld = \t%d\n",
-+		usb_otg_state_string(xotg->otg.state),
-+		xotg->hsm.a_bus_resume,
-+		xotg->hsm.a_bus_suspend,
-+		xotg->hsm.a_conn,
-+		xotg->hsm.a_sess_vld,
-+		xotg->hsm.a_srp_det,
-+		xotg->hsm.a_vbus_vld,
-+		xotg->hsm.b_bus_resume,
-+		xotg->hsm.b_bus_suspend,
-+		xotg->hsm.b_conn,
-+		xotg->hsm.b_se0_srp,
-+		xotg->hsm.b_sess_end,
-+		xotg->hsm.b_sess_vld,
-+		xotg->hsm.id,
-+		xotg->hsm.a_set_b_hnp_en,
-+		xotg->hsm.b_srp_done,
-+		xotg->hsm.b_hnp_enable,
-+		xotg->hsm.a_wait_vrise_tmout,
-+		xotg->hsm.a_wait_bcon_tmout,
-+		xotg->hsm.a_aidl_bdis_tmout,
-+		xotg->hsm.b_ase0_brst_tmout,
-+		xotg->hsm.a_bus_drop,
-+		xotg->hsm.a_bus_req,
-+		xotg->hsm.a_clr_err,
-+		xotg->hsm.a_suspend_req,
-+		xotg->hsm.b_bus_req,
-+		xotg->hsm.b_bus_suspend_tmout,
-+		xotg->hsm.b_bus_suspend_vld
-+		);
-+	size -= t;
-+	next += t;
-+
-+	return PAGE_SIZE - size;
-+}
-+static DEVICE_ATTR(hsm, S_IRUGO, show_hsm, NULL);
-+
-+static ssize_t
-+get_a_bus_req(struct device *dev, struct device_attribute *attr, char *buf)
-+{
-+	struct xusbps_otg	*xotg = the_transceiver;
-+	char			*next;
-+	unsigned		size, t;
-+
-+	next = buf;
-+	size = PAGE_SIZE;
-+
-+	t = scnprintf(next, size, "%d", xotg->hsm.a_bus_req);
-+	size -= t;
-+	next += t;
-+
-+	return PAGE_SIZE - size;
-+}
-+
-+static ssize_t
-+set_a_bus_req(struct device *dev, struct device_attribute *attr,
-+		const char *buf, size_t count)
-+{
-+	struct xusbps_otg		*xotg = the_transceiver;
-+
-+	if (!xotg->otg.otg->default_a)
-+		return -1;
-+	if (count > 2)
-+		return -1;
-+
-+	if (buf[0] == '0') {
-+		xotg->hsm.a_bus_req = 0;
-+		dev_dbg(xotg->dev, "User request: a_bus_req = 0\n");
-+	} else if (buf[0] == '1') {
-+		/* If a_bus_drop is TRUE, a_bus_req can't be set */
-+		if (xotg->hsm.a_bus_drop)
-+			return -1;
-+		xotg->hsm.a_bus_req = 1;
-+		dev_dbg(xotg->dev, "User request: a_bus_req = 1\n");
-+	}
-+	if (spin_trylock(&xotg->wq_lock)) {
-+		xusbps_update_transceiver();
-+		spin_unlock(&xotg->wq_lock);
-+	}
-+	return count;
-+}
-+static DEVICE_ATTR(a_bus_req, S_IRUGO | S_IWUSR, get_a_bus_req, set_a_bus_req);
-+
-+static ssize_t
-+get_a_bus_drop(struct device *dev, struct device_attribute *attr, char *buf)
-+{
-+	struct xusbps_otg	*xotg = the_transceiver;
-+	char			*next;
-+	unsigned		size, t;
-+
-+	next = buf;
-+	size = PAGE_SIZE;
-+
-+	t = scnprintf(next, size, "%d", xotg->hsm.a_bus_drop);
-+	size -= t;
-+	next += t;
-+
-+	return PAGE_SIZE - size;
-+}
-+
-+static ssize_t
-+set_a_bus_drop(struct device *dev, struct device_attribute *attr,
-+		const char *buf, size_t count)
-+{
-+	struct xusbps_otg		*xotg = the_transceiver;
-+
-+	if (!xotg->otg.otg->default_a)
-+		return -1;
-+	if (count > 2)
-+		return -1;
-+
-+	if (buf[0] == '0') {
-+		xotg->hsm.a_bus_drop = 0;
-+		dev_dbg(xotg->dev, "User request: a_bus_drop = 0\n");
-+	} else if (buf[0] == '1') {
-+		xotg->hsm.a_bus_drop = 1;
-+		xotg->hsm.a_bus_req = 0;
-+		dev_dbg(xotg->dev, "User request: a_bus_drop = 1\n");
-+		dev_dbg(xotg->dev, "User request: and a_bus_req = 0\n");
-+	}
-+	if (spin_trylock(&xotg->wq_lock)) {
-+		xusbps_update_transceiver();
-+		spin_unlock(&xotg->wq_lock);
-+	}
-+	return count;
-+}
-+static DEVICE_ATTR(a_bus_drop, S_IRUGO | S_IWUSR, get_a_bus_drop,
-+		set_a_bus_drop);
-+
-+static ssize_t
-+get_b_bus_req(struct device *dev, struct device_attribute *attr, char *buf)
-+{
-+	struct xusbps_otg	*xotg = the_transceiver;
-+	char			*next;
-+	unsigned		size, t;
-+
-+	next = buf;
-+	size = PAGE_SIZE;
-+
-+	t = scnprintf(next, size, "%d", xotg->hsm.b_bus_req);
-+	size -= t;
-+	next += t;
-+
-+	return PAGE_SIZE - size;
-+}
-+
-+static ssize_t
-+set_b_bus_req(struct device *dev, struct device_attribute *attr,
-+		const char *buf, size_t count)
-+{
-+	struct xusbps_otg		*xotg = the_transceiver;
-+
-+	if (xotg->otg.otg->default_a)
-+		return -1;
-+
-+	if (count > 2)
-+		return -1;
-+
-+	if (buf[0] == '0') {
-+		xotg->hsm.b_bus_req = 0;
-+		dev_dbg(xotg->dev, "User request: b_bus_req = 0\n");
-+	} else if (buf[0] == '1') {
-+		xotg->hsm.b_bus_req = 1;
-+		dev_dbg(xotg->dev, "User request: b_bus_req = 1\n");
-+	}
-+	if (spin_trylock(&xotg->wq_lock)) {
-+		xusbps_update_transceiver();
-+		spin_unlock(&xotg->wq_lock);
-+	}
-+	return count;
-+}
-+static DEVICE_ATTR(b_bus_req, S_IRUGO | S_IWUSR, get_b_bus_req, set_b_bus_req);
-+
-+static ssize_t
-+set_a_clr_err(struct device *dev, struct device_attribute *attr,
-+		const char *buf, size_t count)
-+{
-+	struct xusbps_otg		*xotg = the_transceiver;
-+
-+	if (!xotg->otg.otg->default_a)
-+		return -1;
-+	if (count > 2)
-+		return -1;
-+
-+	if (buf[0] == '1') {
-+		xotg->hsm.a_clr_err = 1;
-+		dev_dbg(xotg->dev, "User request: a_clr_err = 1\n");
-+	}
-+	if (spin_trylock(&xotg->wq_lock)) {
-+		xusbps_update_transceiver();
-+		spin_unlock(&xotg->wq_lock);
-+	}
-+	return count;
-+}
-+static DEVICE_ATTR(a_clr_err, S_IWUSR, NULL, set_a_clr_err);
-+
-+/**
-+ * suspend_otg_device - suspend the otg device.
-+ *
-+ * @otg:	Pointer to the otg transceiver structure.
-+ *
-+ * This function suspends usb devices connected to the otg port
-+ * of the host controller.
-+ *
-+ * returns:	0 on success or error value on failure
-+ **/
-+static int suspend_otg_device(struct usb_phy *otg)
-+{
-+	struct xusbps_otg		*xotg = the_transceiver;
-+	unsigned long otg_port = otg->otg->host->otg_port;
-+	struct usb_device *udev;
-+	int err;
-+
-+	udev = usb_hub_find_child(otg->otg->host->root_hub, otg_port - 1);
-+
-+	if (udev) {
-+		err = usb_port_suspend(udev, PMSG_SUSPEND);
-+		if (err < 0)
-+			dev_dbg(xotg->dev, "HNP fail, %d\n", err);
-+
-+		/* Change the state of the usb device if HNP is successful */
-+		usb_set_device_state(udev, USB_STATE_NOTATTACHED);
-+	} else {
-+		err = -ENODEV;
-+		dev_dbg(xotg->dev, "No device connected to roothub\n");
-+	}
-+	return err;
-+}
-+
-+static ssize_t
-+do_hnp(struct device *dev, struct device_attribute *attr,
-+		const char *buf, size_t count)
-+{
-+	struct xusbps_otg		*xotg = the_transceiver;
-+	unsigned long ret;
-+
-+	if (count > 2)
-+		return -1;
-+
-+	if (buf[0] == '1') {
-+		if (xotg->otg.otg->default_a && xotg->otg.otg->host &&
-+				xotg->otg.otg->host->b_hnp_enable &&
-+				(xotg->otg.state == OTG_STATE_A_HOST)) {
-+			ret = suspend_otg_device(&xotg->otg);
-+			if (ret)
-+				return -1;
-+		}
-+
-+		if (!xotg->otg.otg->default_a && xotg->otg.otg->host &&
-+				xotg->hsm.b_bus_req) {
-+			ret = suspend_otg_device(&xotg->otg);
-+			if (ret)
-+				return -1;
-+		}
-+	}
-+	return count;
-+}
-+static DEVICE_ATTR(do_hnp, S_IWUSR, NULL, do_hnp);
-+
-+static int xusbps_otg_clk_notifier_cb(struct notifier_block *nb,
-+		unsigned long event, void *data)
-+{
-+
-+	switch (event) {
-+	case PRE_RATE_CHANGE:
-+		/* if a rate change is announced we need to check whether we can
-+		 * maintain the current frequency by changing the clock
-+		 * dividers.
-+		 */
-+		/* fall through */
-+	case POST_RATE_CHANGE:
-+		return NOTIFY_OK;
-+	case ABORT_RATE_CHANGE:
-+	default:
-+		return NOTIFY_DONE;
-+	}
-+}
-+
-+static struct attribute *inputs_attrs[] = {
-+	&dev_attr_a_bus_req.attr,
-+	&dev_attr_a_bus_drop.attr,
-+	&dev_attr_b_bus_req.attr,
-+	&dev_attr_a_clr_err.attr,
-+	&dev_attr_do_hnp.attr,
-+	NULL,
-+};
-+
-+static struct attribute_group debug_dev_attr_group = {
-+	.name = "inputs",
-+	.attrs = inputs_attrs,
-+};
-+
-+static int xusbps_otg_remove(struct platform_device *pdev)
-+{
-+	struct xusbps_otg *xotg = the_transceiver;
-+
-+	if (xotg->qwork) {
-+		flush_workqueue(xotg->qwork);
-+		destroy_workqueue(xotg->qwork);
-+	}
-+	xusbps_otg_free_timers();
-+
-+	/* disable OTGSC interrupt as OTGSC doesn't change in reset */
-+	writel(0, xotg->base + CI_OTGSC);
-+
-+	usb_remove_phy(&xotg->otg);
-+	sysfs_remove_group(&pdev->dev.kobj, &debug_dev_attr_group);
-+	device_remove_file(&pdev->dev, &dev_attr_hsm);
-+	device_remove_file(&pdev->dev, &dev_attr_registers);
-+	clk_notifier_unregister(xotg->clk, &xotg->clk_rate_change_nb);
-+	clk_disable_unprepare(xotg->clk);
-+
-+	return 0;
-+}
-+
-+static int xusbps_otg_probe(struct platform_device *pdev)
-+{
-+	int			retval;
-+	u32			val32;
-+	struct xusbps_otg	*xotg;
-+	char			qname[] = "xusbps_otg_queue";
-+	struct xusbps_usb2_platform_data *pdata;
-+
-+	pdata = pdev->dev.platform_data;
-+	if (!pdata)
-+		return -ENODEV;
-+
-+	dev_dbg(&pdev->dev, "\notg controller is detected.\n");
-+
-+	xotg = devm_kzalloc(&pdev->dev, sizeof(*xotg), GFP_KERNEL);
-+	if (xotg == NULL)
-+		return -ENOMEM;
-+
-+	the_transceiver = xotg;
-+
-+	/* Setup ulpi phy for OTG */
-+	xotg->ulpi = pdata->ulpi;
-+
-+	xotg->otg.otg = devm_kzalloc(sizeof(struct usb_otg), GFP_KERNEL);
-+	if (!xotg->otg.otg)
-+		return -ENOMEM;
-+
-+	xotg->base = pdata->regs;
-+	xotg->irq = pdata->irq;
-+	if (!xotg->base || !xotg->irq) {
-+		retval = -ENODEV;
-+		goto err;
-+	}
-+
-+	xotg->qwork = create_singlethread_workqueue(qname);
-+	if (!xotg->qwork) {
-+		dev_dbg(&pdev->dev, "cannot create workqueue %s\n", qname);
-+		retval = -ENOMEM;
-+		goto err;
-+	}
-+	INIT_WORK(&xotg->work, xusbps_otg_work);
-+
-+	xotg->clk = pdata->clk;
-+	retval = clk_prepare_enable(xotg->clk);
-+	if (retval) {
-+		dev_err(&pdev->dev, "Unable to enable APER clock.\n");
-+		goto err;
-+	}
-+
-+	xotg->clk_rate_change_nb.notifier_call = xusbps_otg_clk_notifier_cb;
-+	xotg->clk_rate_change_nb.next = NULL;
-+	if (clk_notifier_register(xotg->clk, &xotg->clk_rate_change_nb))
-+		dev_warn(&pdev->dev, "Unable to register clock notifier.\n");
-+
-+	/* OTG common part */
-+	xotg->dev = &pdev->dev;
-+	xotg->otg.dev = xotg->dev;
-+	xotg->otg.label = driver_name;
-+	xotg->otg.otg->set_host = xusbps_otg_set_host;
-+	xotg->otg.otg->set_peripheral = xusbps_otg_set_peripheral;
-+	xotg->otg.set_power = xusbps_otg_set_power;
-+	xotg->otg.otg->set_vbus = xusbps_otg_set_vbus;
-+	xotg->otg.otg->start_srp = xusbps_otg_start_srp;
-+	xotg->otg.otg->start_hnp = xusbps_otg_start_hnp;
-+	xotg->otg.state = OTG_STATE_UNDEFINED;
-+
-+	if (usb_add_phy(&xotg->otg, USB_PHY_TYPE_USB2)) {
-+		dev_dbg(xotg->dev, "can't set transceiver\n");
-+		retval = -EBUSY;
-+		goto err_out_clk_disable;
-+	}
-+
-+	pdata->otg = &xotg->otg;
-+	reset_otg();
-+	init_hsm();
-+
-+	spin_lock_init(&xotg->lock);
-+	spin_lock_init(&xotg->wq_lock);
-+	INIT_LIST_HEAD(&active_timers);
-+	retval = xusbps_otg_init_timers(&xotg->hsm);
-+	if (retval) {
-+		dev_dbg(&pdev->dev, "Failed to init timers\n");
-+		goto err_out_clk_disable;
-+	}
-+
-+	init_timer(&xotg->hsm_timer);
-+
-+	xotg->xotg_notifier.notifier_call = xotg_usbdev_notify;
-+	usb_register_notify((struct notifier_block *)
-+					&xotg->xotg_notifier.notifier_call);
-+
-+	retval = devm_request_irq(&pdev->dev, xotg->irq, otg_irq, IRQF_SHARED,
-+				driver_name, xotg);
-+	if (retval) {
-+		dev_dbg(xotg->dev, "request interrupt %d failed\n", xotg->irq);
-+		retval = -EBUSY;
-+		goto err_out_clk_disable;
-+	}
-+
-+	/* enable OTGSC int */
-+	val32 = OTGSC_DPIE | OTGSC_BSEIE | OTGSC_BSVIE |
-+		OTGSC_ASVIE | OTGSC_AVVIE | OTGSC_IDIE | OTGSC_IDPU;
-+	writel(val32, xotg->base + CI_OTGSC);
-+
-+	retval = device_create_file(&pdev->dev, &dev_attr_registers);
-+	if (retval < 0) {
-+		dev_dbg(xotg->dev,
-+			"Can't register sysfs attribute: %d\n", retval);
-+		goto err_out_clk_disable;
-+	}
-+
-+	retval = device_create_file(&pdev->dev, &dev_attr_hsm);
-+	if (retval < 0) {
-+		dev_dbg(xotg->dev, "Can't hsm sysfs attribute: %d\n", retval);
-+		goto err_out_clk_disable;
-+	}
-+
-+	retval = sysfs_create_group(&pdev->dev.kobj, &debug_dev_attr_group);
-+	if (retval < 0) {
-+		dev_dbg(xotg->dev,
-+			"Can't register sysfs attr group: %d\n", retval);
-+		goto err_out_clk_disable;
-+	}
-+
-+	if (xotg->otg.state == OTG_STATE_A_IDLE)
-+		xusbps_update_transceiver();
-+
-+	return 0;
-+
-+err_out_clk_disable:
-+	clk_notifier_unregister(xotg->clk, &xotg->clk_rate_change_nb);
-+	clk_disable_unprepare(xotg->clk);
-+err:
-+	xusbps_otg_remove(pdev);
-+
-+	return retval;
-+}
-+
-+#ifdef CONFIG_PM_SLEEP
-+static void transceiver_suspend(struct platform_device *pdev)
-+{
-+	xusbps_otg_phy_low_power(1);
-+}
-+
-+static int xusbps_otg_suspend(struct device *dev)
-+{
-+	struct platform_device *pdev = to_platform_device(dev);
-+	struct xusbps_otg		*xotg = the_transceiver;
-+	int				ret = 0;
-+
-+	/* Disbale OTG interrupts */
-+	xusbps_otg_intr(0);
-+
-+	if (xotg->irq)
-+		free_irq(xotg->irq, xotg);
-+
-+	/* Prevent more otg_work */
-+	flush_workqueue(xotg->qwork);
-+	destroy_workqueue(xotg->qwork);
-+	xotg->qwork = NULL;
-+
-+	/* start actions */
-+	switch (xotg->otg.state) {
-+	case OTG_STATE_A_WAIT_VFALL:
-+		xotg->otg.state = OTG_STATE_A_IDLE;
-+	case OTG_STATE_A_IDLE:
-+	case OTG_STATE_B_IDLE:
-+	case OTG_STATE_A_VBUS_ERR:
-+		transceiver_suspend(pdev);
-+		break;
-+	case OTG_STATE_A_WAIT_VRISE:
-+		xusbps_otg_del_timer(a_wait_vrise_tmr);
-+		xotg->hsm.a_srp_det = 0;
-+
-+		/* Turn off VBus */
-+		xotg->otg.otg->set_vbus(xotg->otg.otg, false);
-+		xotg->otg.state = OTG_STATE_A_IDLE;
-+		transceiver_suspend(pdev);
-+		break;
-+	case OTG_STATE_A_WAIT_BCON:
-+		del_timer_sync(&xotg->hsm_timer);
-+		if (xotg->stop_host)
-+			xotg->stop_host(&xotg->otg);
-+		else
-+			dev_dbg(&pdev->dev, "host driver has been removed.\n");
-+
-+		xotg->hsm.a_srp_det = 0;
-+
-+		/* Turn off VBus */
-+		xotg->otg.otg->set_vbus(xotg->otg.otg, false);
-+		xotg->otg.state = OTG_STATE_A_IDLE;
-+		transceiver_suspend(pdev);
-+		break;
-+	case OTG_STATE_A_HOST:
-+		if (xotg->stop_host)
-+			xotg->stop_host(&xotg->otg);
-+		else
-+			dev_dbg(&pdev->dev, "host driver has been removed.\n");
-+
-+		xotg->hsm.a_srp_det = 0;
-+
-+		/* Turn off VBus */
-+		xotg->otg.otg->set_vbus(xotg->otg.otg, false);
-+
-+		xotg->otg.state = OTG_STATE_A_IDLE;
-+		transceiver_suspend(pdev);
-+		break;
-+	case OTG_STATE_A_SUSPEND:
-+		xusbps_otg_del_timer(a_aidl_bdis_tmr);
-+		xusbps_otg_HABA(0);
-+		if (xotg->stop_host)
-+			xotg->stop_host(&xotg->otg);
-+		else
-+			dev_dbg(xotg->dev, "host driver has been removed.\n");
-+		xotg->hsm.a_srp_det = 0;
-+
-+		/* Turn off VBus */
-+		xotg->otg.otg->set_vbus(xotg->otg.otg, false);
-+		xotg->otg.state = OTG_STATE_A_IDLE;
-+		transceiver_suspend(pdev);
-+		break;
-+	case OTG_STATE_A_PERIPHERAL:
-+		del_timer_sync(&xotg->hsm_timer);
-+
-+		if (xotg->stop_peripheral)
-+			xotg->stop_peripheral(&xotg->otg);
-+		else
-+			dev_dbg(&pdev->dev,
-+				"client driver has been removed.\n");
-+		xotg->hsm.a_srp_det = 0;
-+
-+		/* Turn off VBus */
-+		xotg->otg.otg->set_vbus(xotg->otg.otg, false);
-+		xotg->otg.state = OTG_STATE_A_IDLE;
-+		transceiver_suspend(pdev);
-+		break;
-+	case OTG_STATE_B_HOST:
-+		if (xotg->stop_host)
-+			xotg->stop_host(&xotg->otg);
-+		else
-+			dev_dbg(&pdev->dev, "host driver has been removed.\n");
-+		xotg->hsm.b_bus_req = 0;
-+		xotg->otg.state = OTG_STATE_B_IDLE;
-+		transceiver_suspend(pdev);
-+		break;
-+	case OTG_STATE_B_PERIPHERAL:
-+		if (xotg->stop_peripheral)
-+			xotg->stop_peripheral(&xotg->otg);
-+		else
-+			dev_dbg(&pdev->dev,
-+				"client driver has been removed.\n");
-+		xotg->otg.state = OTG_STATE_B_IDLE;
-+		transceiver_suspend(pdev);
-+		break;
-+	case OTG_STATE_B_WAIT_ACON:
-+		/* delete hsm timer for b_ase0_brst_tmr */
-+		del_timer_sync(&xotg->hsm_timer);
-+
-+		xusbps_otg_HAAR(0);
-+
-+		if (xotg->stop_host)
-+			xotg->stop_host(&xotg->otg);
-+		else
-+			dev_dbg(&pdev->dev, "host driver has been removed.\n");
-+		xotg->hsm.b_bus_req = 0;
-+		xotg->otg.state = OTG_STATE_B_IDLE;
-+		transceiver_suspend(pdev);
-+		break;
-+	default:
-+		dev_dbg(xotg->dev, "error state before suspend\n");
-+		break;
-+	}
-+
-+	if (!ret)
-+		clk_disable(xotg->clk);
-+	return ret;
-+}
-+
-+static void transceiver_resume(struct platform_device *pdev)
-+{
-+	/* Not used */
-+}
-+
-+static int xusbps_otg_resume(struct device *dev)
-+{
-+	struct platform_device *pdev = to_platform_device(dev);
-+	struct xusbps_otg	*xotg = the_transceiver;
-+	int			ret = 0;
-+
-+	ret = clk_enable(xotg->clk);
-+	if (ret) {
-+		dev_err(&pdev->dev, "cannot enable clock. resume failed.\n");
-+		return ret;
-+	}
-+
-+	transceiver_resume(pdev);
-+
-+	xotg->qwork = create_singlethread_workqueue("xusbps_otg_queue");
-+	if (!xotg->qwork) {
-+		dev_dbg(&pdev->dev, "cannot create xusbps otg workqueuen");
-+		ret = -ENOMEM;
-+		goto error;
-+	}
-+
-+	if (request_irq(xotg->irq, otg_irq, IRQF_SHARED,
-+				driver_name, xotg) != 0) {
-+		dev_dbg(&pdev->dev, "request interrupt %d failed\n", xotg->irq);
-+		ret = -EBUSY;
-+		goto error;
-+	}
-+
-+	/* enable OTG interrupts */
-+	xusbps_otg_intr(1);
-+
-+	update_hsm();
-+
-+	xusbps_update_transceiver();
-+
-+	return ret;
-+error:
-+	xusbps_otg_intr(0);
-+	transceiver_suspend(pdev);
-+	return ret;
-+}
-+
-+static const struct dev_pm_ops xusbps_otg_dev_pm_ops = {
-+	SET_SYSTEM_SLEEP_PM_OPS(xusbps_otg_suspend, xusbps_otg_resume)
-+};
-+#define XUSBPS_OTG_PM	(&xusbps_otg_dev_pm_ops)
-+
-+#else /* ! CONFIG_PM_SLEEP */
-+#define XUSBPS_OTG_PM	NULL
-+#endif /* ! CONFIG_PM_SLEEP */
-+
-+#ifndef CONFIG_USB_XUSBPS_DR_OF
-+static struct platform_driver xusbps_otg_driver = {
-+#else
-+struct platform_driver xusbps_otg_driver = {
-+#endif
-+	.probe		= xusbps_otg_probe,
-+	.remove		= xusbps_otg_remove,
-+	.driver		= {
-+		.owner	= THIS_MODULE,
-+		.name	= DRIVER_NAME,
-+		.pm	= XUSBPS_OTG_PM,
-+	},
-+};
-+
-+#ifndef CONFIG_USB_XUSBPS_DR_OF
-+module_platform_driver(xusbps_otg_driver);
-+#endif
-+
-+MODULE_AUTHOR("Xilinx, Inc.");
-+MODULE_DESCRIPTION("Xilinx PS USB OTG driver");
-+MODULE_LICENSE("GPL");
-+MODULE_ALIAS("platform:" DRIVER_NAME);
---- /dev/null
-+++ b/include/linux/usb/xilinx_usbps_otg.h
-@@ -0,0 +1,216 @@
-+/*
-+ * Xilinx PS USB OTG Driver Header file.
-+ *
-+ * Copyright 2011 Xilinx, Inc.
-+ *
-+ * This file is based on langwell_otg.h file with few minor modifications
-+ * to support Xilinx PS USB controller.
-+ *
-+ * This program is free software; you can redistribute it and/or modify it under
-+ * the terms of the GNU General Public License version 2 as published by the
-+ * Free Software Foundation; either version 2 of the License, or (at your
-+ * option) any later version.
-+ *
-+ * You should have received a copy of the GNU General Public License along with
-+ * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
-+ * Place, Suite 330, Boston, MA  02111-1307  USA
-+ */
-+#ifndef __XILINX_XUSBPS_OTG_H
-+#define __XILINX_XUSBPS_OTG_H
-+
-+#define CI_USBCMD		0x140
-+#	define USBCMD_RST		BIT(1)
-+#	define USBCMD_RS		BIT(0)
-+#define CI_USBSTS		0x144
-+#	define USBSTS_SLI		BIT(8)
-+#	define USBSTS_URI		BIT(6)
-+#	define USBSTS_PCI		BIT(2)
-+#define CI_PORTSC1		0x184
-+#	define PORTSC_PP		BIT(12)
-+#	define PORTSC_LS		(BIT(11) | BIT(10))
-+#	define PORTSC_SUSP		BIT(7)
-+#	define PORTSC_CCS		BIT(0)
-+#define CI_OTGSC		0x1a4
-+#	define OTGSC_DPIE		BIT(30)
-+#	define OTGSC_1MSE		BIT(29)
-+#	define OTGSC_BSEIE		BIT(28)
-+#	define OTGSC_BSVIE		BIT(27)
-+#	define OTGSC_ASVIE		BIT(26)
-+#	define OTGSC_AVVIE		BIT(25)
-+#	define OTGSC_IDIE		BIT(24)
-+#	define OTGSC_DPIS		BIT(22)
-+#	define OTGSC_1MSS		BIT(21)
-+#	define OTGSC_BSEIS		BIT(20)
-+#	define OTGSC_BSVIS		BIT(19)
-+#	define OTGSC_ASVIS		BIT(18)
-+#	define OTGSC_AVVIS		BIT(17)
-+#	define OTGSC_IDIS		BIT(16)
-+#	define OTGSC_DPS		BIT(14)
-+#	define OTGSC_1MST		BIT(13)
-+#	define OTGSC_BSE		BIT(12)
-+#	define OTGSC_BSV		BIT(11)
-+#	define OTGSC_ASV		BIT(10)
-+#	define OTGSC_AVV		BIT(9)
-+#	define OTGSC_ID			BIT(8)
-+#	define OTGSC_HABA		BIT(7)
-+#	define OTGSC_HADP		BIT(6)
-+#	define OTGSC_IDPU		BIT(5)
-+#	define OTGSC_DP			BIT(4)
-+#	define OTGSC_OT			BIT(3)
-+#	define OTGSC_HAAR		BIT(2)
-+#	define OTGSC_VC			BIT(1)
-+#	define OTGSC_VD			BIT(0)
-+#	define OTGSC_INTEN_MASK		(0x7f << 24)
-+#	define OTGSC_INT_MASK		(0x5f << 24)
-+#	define OTGSC_INTSTS_MASK	(0x7f << 16)
-+#define CI_USBMODE		0x1a8
-+#	define USBMODE_CM		(BIT(1) | BIT(0))
-+#	define USBMODE_IDLE		0
-+#	define USBMODE_DEVICE		0x2
-+#	define USBMODE_HOST		0x3
-+
-+#define INTR_DUMMY_MASK (USBSTS_SLI | USBSTS_URI | USBSTS_PCI)
-+
-+enum xusbps_otg_timer_type {
-+	TA_WAIT_VRISE_TMR,
-+	TA_WAIT_BCON_TMR,
-+	TA_AIDL_BDIS_TMR,
-+	TB_ASE0_BRST_TMR,
-+	TB_SE0_SRP_TMR,
-+	TB_SRP_INIT_TMR,
-+	TB_SRP_FAIL_TMR,
-+	TB_BUS_SUSPEND_TMR
-+};
-+
-+#define TA_WAIT_VRISE	100
-+#define TA_WAIT_BCON	30000
-+#define TA_AIDL_BDIS	15000
-+#define TB_ASE0_BRST	5000
-+#define TB_SE0_SRP	2
-+#define TB_SRP_INIT	100
-+#define TB_SRP_FAIL	5500
-+#define TB_BUS_SUSPEND	500
-+
-+struct xusbps_otg_timer {
-+	unsigned long expires;	/* Number of count increase to timeout */
-+	unsigned long count;	/* Tick counter */
-+	void (*function)(unsigned long);	/* Timeout function */
-+	unsigned long data;	/* Data passed to function */
-+	struct list_head list;
-+};
-+
-+/* This is a common data structure to
-+ * save values of the OTG state machine */
-+struct otg_hsm {
-+	/* Input */
-+	int a_bus_resume;
-+	int a_bus_suspend;
-+	int a_conn;
-+	int a_sess_vld;
-+	int a_srp_det;
-+	int a_vbus_vld;
-+	int b_bus_resume;
-+	int b_bus_suspend;
-+	int b_conn;
-+	int b_se0_srp;
-+	int b_ssend_srp;
-+	int b_sess_end;
-+	int b_sess_vld;
-+	int id;
-+/* id values */
-+#define ID_B		0x05
-+#define ID_A		0x04
-+#define ID_ACA_C	0x03
-+#define ID_ACA_B	0x02
-+#define ID_ACA_A	0x01
-+	int power_up;
-+	int adp_change;
-+	int test_device;
-+
-+	/* Internal variables */
-+	int a_set_b_hnp_en;
-+	int b_srp_done;
-+	int b_hnp_enable;
-+	int hnp_poll_enable;
-+
-+	/* Timeout indicator for timers */
-+	int a_wait_vrise_tmout;
-+	int a_wait_bcon_tmout;
-+	int a_aidl_bdis_tmout;
-+	int a_bidl_adis_tmout;
-+	int a_bidl_adis_tmr;
-+	int a_wait_vfall_tmout;
-+	int b_ase0_brst_tmout;
-+	int b_bus_suspend_tmout;
-+	int b_srp_init_tmout;
-+	int b_srp_fail_tmout;
-+	int b_srp_fail_tmr;
-+	int b_adp_sense_tmout;
-+
-+	/* Informative variables */
-+	int a_bus_drop;
-+	int a_bus_req;
-+	int a_clr_err;
-+	int b_bus_req;
-+	int a_suspend_req;
-+	int b_bus_suspend_vld;
-+
-+	/* Output */
-+	int drv_vbus;
-+	int loc_conn;
-+	int loc_sof;
-+
-+	/* Others */
-+	int vbus_srp_up;
-+};
-+
-+struct xusbps_otg {
-+	struct usb_phy		otg;
-+	struct usb_phy		*ulpi;
-+
-+	struct otg_hsm		hsm;
-+
-+	/* base address */
-+	void __iomem		*base;
-+
-+	/* irq */
-+	int			irq;
-+
-+	/* clk */
-+	struct clk		*clk;
-+	struct notifier_block	clk_rate_change_nb;
-+
-+	/* atomic notifier for interrupt context */
-+	struct atomic_notifier_head	otg_notifier;
-+
-+	/* start/stop USB Host function */
-+	int	(*start_host)(struct usb_phy *otg);
-+	int	(*stop_host)(struct usb_phy *otg);
-+
-+	/* start/stop USB Peripheral function */
-+	int	(*start_peripheral)(struct usb_phy *otg);
-+	int	(*stop_peripheral)(struct usb_phy *otg);
-+
-+	struct device			*dev;
-+
-+	unsigned			region;
-+
-+	struct work_struct		work;
-+	struct workqueue_struct		*qwork;
-+	struct timer_list		hsm_timer;
-+
-+	spinlock_t			lock;
-+	spinlock_t			wq_lock;
-+
-+	struct notifier_block		xotg_notifier;
-+};
-+
-+static inline
-+struct xusbps_otg *xceiv_to_xotg(struct usb_phy *otg)
-+{
-+	return container_of(otg, struct xusbps_otg, otg);
-+}
-+
-+void xusbps_update_transceiver(void);
-+
-+#endif /* __XILINX_XUSBPS_OTG_H__ */
---- /dev/null
-+++ b/include/linux/xilinx_devices.h
-@@ -0,0 +1,70 @@
-+/*
-+ * include/linux/xilinx_devices.h
-+ *
-+ * Definitions for any platform device related flags or structures for
-+ * Xilinx EDK IPs
-+ *
-+ * Author: MontaVista Software, Inc.
-+ *         source@mvista.com
-+ *
-+ * 2002-2005 (c) MontaVista Software, Inc.  This file is licensed under the
-+ * terms of the GNU General Public License version 2.  This program is licensed
-+ * "as is" without any warranty of any kind, whether express or implied.
-+ */
-+
-+#ifdef __KERNEL__
-+#ifndef _XILINX_DEVICE_H_
-+#define _XILINX_DEVICE_H_
-+
-+#include <linux/types.h>
-+#include <linux/version.h>
-+#include <linux/platform_device.h>
-+
-+/*- PS USB Controller IP -*/
-+enum xusbps_usb2_operating_modes {
-+	XUSBPS_USB2_MPH_HOST,
-+	XUSBPS_USB2_DR_HOST,
-+	XUSBPS_USB2_DR_DEVICE,
-+	XUSBPS_USB2_DR_OTG,
-+};
-+
-+enum xusbps_usb2_phy_modes {
-+	XUSBPS_USB2_PHY_NONE,
-+	XUSBPS_USB2_PHY_ULPI,
-+	XUSBPS_USB2_PHY_UTMI,
-+	XUSBPS_USB2_PHY_UTMI_WIDE,
-+	XUSBPS_USB2_PHY_SERIAL,
-+};
-+
-+struct clk;
-+struct platform_device;
-+
-+struct xusbps_usb2_platform_data {
-+	/* board specific information */
-+	enum xusbps_usb2_operating_modes	operating_mode;
-+	enum xusbps_usb2_phy_modes	phy_mode;
-+	unsigned int			port_enables;
-+	unsigned int			workaround;
-+
-+	int		(*init)(struct platform_device *);
-+	void		(*exit)(struct platform_device *);
-+	void __iomem	*regs;		/* ioremap'd register base */
-+	struct usb_phy	*otg;
-+	struct usb_phy	*ulpi;
-+	int		irq;
-+	struct clk	*clk;
-+	struct notifier_block clk_rate_change_nb;
-+	unsigned	big_endian_mmio:1;
-+	unsigned	big_endian_desc:1;
-+	unsigned	es:1;		/* need USBMODE:ES */
-+	unsigned	le_setup_buf:1;
-+	unsigned	have_sysif_regs:1;
-+	unsigned	invert_drvvbus:1;
-+	unsigned	invert_pwr_fault:1;
-+};
-+
-+#define XUSBPS_USB2_PORT0_ENABLED	0x00000001
-+#define XUSBPS_USB2_PORT1_ENABLED	0x00000002
-+
-+#endif /* _XILINX_DEVICE_H_ */
-+#endif /* __KERNEL__ */
diff --git a/patches.zynq/0010-ARM-zynq-Add-cpuidle-support.patch b/patches.zynq/0010-ARM-zynq-Add-cpuidle-support.patch
deleted file mode 100644
index 286cad27debdf..0000000000000
--- a/patches.zynq/0010-ARM-zynq-Add-cpuidle-support.patch
+++ /dev/null
@@ -1,137 +0,0 @@
-From 162cdee2033c61c65064d72592d471b96611f212 Mon Sep 17 00:00:00 2001
-From: Michal Simek <michal.simek@xilinx.com>
-Date: Tue, 4 Jun 2013 07:17:39 +0000
-Subject: ARM: zynq: Add cpuidle support
-
-Add cpuidle support for Xilinx Zynq.
-
-Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
-Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
-(cherry picked from commit bd2a337a25dd22bcd6b3fb1f99461f6991773e68)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- MAINTAINERS                    |    1 
- drivers/cpuidle/Kconfig        |    6 ++
- drivers/cpuidle/Makefile       |    1 
- drivers/cpuidle/cpuidle-zynq.c |   83 +++++++++++++++++++++++++++++++++++++++++
- 4 files changed, 91 insertions(+)
- create mode 100644 drivers/cpuidle/cpuidle-zynq.c
-
---- a/MAINTAINERS
-+++ b/MAINTAINERS
-@@ -1310,6 +1310,7 @@ W:	http://wiki.xilinx.com
- T:	git git://git.xilinx.com/linux-xlnx.git
- S:	Supported
- F:	arch/arm/mach-zynq/
-+F:	drivers/cpuidle/cpuidle-zynq.c
- 
- ARM64 PORT (AARCH64 ARCHITECTURE)
- M:	Catalin Marinas <catalin.marinas@arm.com>
---- a/drivers/cpuidle/Kconfig
-+++ b/drivers/cpuidle/Kconfig
-@@ -39,4 +39,10 @@ config CPU_IDLE_CALXEDA
- 	help
- 	  Select this to enable cpuidle on Calxeda processors.
- 
-+config CPU_IDLE_ZYNQ
-+	bool "CPU Idle Driver for Xilinx Zynq processors"
-+	depends on ARCH_ZYNQ
-+	help
-+	  Select this to enable cpuidle on Xilinx Zynq processors.
-+
- endif
---- a/drivers/cpuidle/Makefile
-+++ b/drivers/cpuidle/Makefile
-@@ -7,3 +7,4 @@ obj-$(CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED
- 
- obj-$(CONFIG_CPU_IDLE_CALXEDA) += cpuidle-calxeda.o
- obj-$(CONFIG_ARCH_KIRKWOOD) += cpuidle-kirkwood.o
-+obj-$(CONFIG_CPU_IDLE_ZYNQ) += cpuidle-zynq.o
---- /dev/null
-+++ b/drivers/cpuidle/cpuidle-zynq.c
-@@ -0,0 +1,83 @@
-+/*
-+ * Copyright (C) 2012-2013 Xilinx
-+ *
-+ * CPU idle support for Xilinx Zynq
-+ *
-+ * based on arch/arm/mach-at91/cpuidle.c
-+ *
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms and conditions of the GNU General Public License,
-+ * version 2, as published by the Free Software Foundation.
-+ *
-+ * This program is distributed in the hope it will be useful, but WITHOUT
-+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
-+ * more details.
-+ *
-+ * You should have received a copy of the GNU General Public License along with
-+ * this program.  If not, see <http://www.gnu.org/licenses/>.
-+ *
-+ * The cpu idle uses wait-for-interrupt and RAM self refresh in order
-+ * to implement two idle states -
-+ * #1 wait-for-interrupt
-+ * #2 wait-for-interrupt and RAM self refresh
-+ *
-+ * Maintainer: Michal Simek <michal.simek@xilinx.com>
-+ */
-+
-+#include <linux/init.h>
-+#include <linux/cpu_pm.h>
-+#include <linux/cpuidle.h>
-+#include <linux/of.h>
-+#include <asm/proc-fns.h>
-+#include <asm/cpuidle.h>
-+
-+#define ZYNQ_MAX_STATES		2
-+
-+/* Actual code that puts the SoC in different idle states */
-+static int zynq_enter_idle(struct cpuidle_device *dev,
-+			   struct cpuidle_driver *drv, int index)
-+{
-+	/* Devices must be stopped here */
-+	cpu_pm_enter();
-+
-+	/* Add code for DDR self refresh start */
-+	cpu_do_idle();
-+
-+	/* Add code for DDR self refresh stop */
-+	cpu_pm_exit();
-+
-+	return index;
-+}
-+
-+static struct cpuidle_driver zynq_idle_driver = {
-+	.name = "zynq_idle",
-+	.owner = THIS_MODULE,
-+	.states = {
-+		ARM_CPUIDLE_WFI_STATE,
-+		{
-+			.enter			= zynq_enter_idle,
-+			.exit_latency		= 10,
-+			.target_residency	= 10000,
-+			.flags			= CPUIDLE_FLAG_TIME_VALID |
-+						  CPUIDLE_FLAG_TIMER_STOP,
-+			.name			= "RAM_SR",
-+			.desc			= "WFI and RAM Self Refresh",
-+		},
-+	},
-+	.safe_state_index = 0,
-+	.state_count = ZYNQ_MAX_STATES,
-+};
-+
-+/* Initialize CPU idle by registering the idle states */
-+static int __init zynq_cpuidle_init(void)
-+{
-+	if (!of_machine_is_compatible("xlnx,zynq-7000"))
-+		return -ENODEV;
-+
-+	pr_info("Xilinx Zynq CpuIdle Driver started\n");
-+
-+	return cpuidle_register(&zynq_idle_driver, NULL);
-+}
-+
-+device_initcall(zynq_cpuidle_init);
diff --git a/patches.zynq/0010-memory-zynq-merge-driver-for-Zynq-SMC.patch b/patches.zynq/0010-memory-zynq-merge-driver-for-Zynq-SMC.patch
deleted file mode 100644
index 26639459b9062..0000000000000
--- a/patches.zynq/0010-memory-zynq-merge-driver-for-Zynq-SMC.patch
+++ /dev/null
@@ -1,706 +0,0 @@
-From 010897260c3b143bb9a958fc4e5eeba9de07bdf2 Mon Sep 17 00:00:00 2001
-From: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Date: Tue, 24 Dec 2013 10:13:37 +0900
-Subject: memory: zynq: merge driver for Zynq SMC
-
-This adds a driver for Zynq's static memory controller.
-The SMC (compatible with ARM's PL353)  supports NAND, NOR and SRAM memory.
-(commit efc27505715e64526653f35274717c0fc56491e3 from master branch)
-
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/memory/Kconfig          |    7 
- drivers/memory/Makefile         |    1 
- drivers/memory/zynq-smc.c       |  627 ++++++++++++++++++++++++++++++++++++++++
- include/linux/memory/zynq-smc.h |   32 ++
- 4 files changed, 667 insertions(+)
- create mode 100644 drivers/memory/zynq-smc.c
- create mode 100644 include/linux/memory/zynq-smc.h
-
---- a/drivers/memory/Kconfig
-+++ b/drivers/memory/Kconfig
-@@ -40,4 +40,11 @@ config TEGRA30_MC
- 	  analysis, especially for IOMMU/SMMU(System Memory Management
- 	  Unit) module.
- 
-+config ZYNQ_SMC
-+	bool "Zynq Static Memory Controller(SMC) driver"
-+	default y
-+	depends on ARCH_ZYNQ
-+	help
-+	  This driver is for the Static Memory Controller(SMC) module available
-+	  in Zynq SoCs.
- endif
---- a/drivers/memory/Makefile
-+++ b/drivers/memory/Makefile
-@@ -8,3 +8,4 @@ endif
- obj-$(CONFIG_TI_EMIF)		+= emif.o
- obj-$(CONFIG_TEGRA20_MC)	+= tegra20-mc.o
- obj-$(CONFIG_TEGRA30_MC)	+= tegra30-mc.o
-+obj-$(CONFIG_ZYNQ_SMC)		+= zynq-smc.o
---- /dev/null
-+++ b/drivers/memory/zynq-smc.c
-@@ -0,0 +1,627 @@
-+/*
-+ * Xilinx Zynq SMC Driver
-+ *
-+ * Copyright (C) 2012 - 2013 Xilinx, Inc.
-+ *
-+ * This program is free software: you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation, either version 2 of the License, or
-+ * (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
-+ *
-+ * Currently only a single SMC instance is supported.
-+ */
-+
-+#include <linux/clk.h>
-+#include <linux/io.h>
-+#include <linux/kernel.h>
-+#include <linux/memory/zynq-smc.h>
-+#include <linux/module.h>
-+#include <linux/of_platform.h>
-+#include <linux/platform_device.h>
-+#include <linux/slab.h>
-+
-+/* Register definitions */
-+#define XSMCPS_MEMC_STATUS_OFFS		0	/* Controller status reg, RO */
-+#define XSMCPS_CFG_CLR_OFFS		0xC	/* Clear config reg, WO */
-+#define XSMCPS_DIRECT_CMD_OFFS		0x10	/* Direct command reg, WO */
-+#define XSMCPS_SET_CYCLES_OFFS		0x14	/* Set cycles register, WO */
-+#define XSMCPS_SET_OPMODE_OFFS		0x18	/* Set opmode register, WO */
-+#define XSMCPS_ECC_STATUS_OFFS		0x400	/* ECC status register */
-+#define XSMCPS_ECC_MEMCFG_OFFS		0x404	/* ECC mem config reg */
-+#define XSMCPS_ECC_MEMCMD1_OFFS		0x408	/* ECC mem cmd1 reg */
-+#define XSMCPS_ECC_MEMCMD2_OFFS		0x40C	/* ECC mem cmd2 reg */
-+#define XSMCPS_ECC_VALUE0_OFFS		0x418	/* ECC value 0 reg */
-+
-+#define XSMCPS_CFG_CLR_INT_1	0x10
-+#define XSMCPS_ECC_STATUS_BUSY	(1 << 6)
-+#define XSMCPS_DC_UPT_NAND_REGS	((4 << 23) |	/* CS: NAND chip */ \
-+				 (2 << 21))	/* UpdateRegs operation */
-+
-+#define XNANDPS_ECC_CMD1	((0x80)       |	/* Write command */ \
-+				 (0 << 8)     |	/* Read command */ \
-+				 (0x30 << 16) |	/* Read End command */ \
-+				 (1 << 24))	/* Read End command calid */
-+
-+#define XNANDPS_ECC_CMD2	((0x85)	      |	/* Write col change cmd */ \
-+				 (5 << 8)     |	/* Read col change cmd */ \
-+				 (0xE0 << 16) |	/* Read col change end cmd */ \
-+				 (1 << 24)) /* Read col change end cmd valid */
-+/**
-+ * struct xsmcps_data
-+ * @devclk		Pointer to the peripheral clock
-+ * @aperclk		Pointer to the APER clock
-+ * @clk_rate_change_nb	Notifier block for clock frequency change callback
-+ */
-+struct xsmcps_data {
-+	struct clk		*devclk;
-+	struct clk		*aperclk;
-+	struct notifier_block	clk_rate_change_nb;
-+	struct resource		*res;
-+};
-+
-+/* SMC virtual register base */
-+static void __iomem *xsmcps_base;
-+static DEFINE_SPINLOCK(xsmcps_lock);
-+
-+/**
-+ * xsmcps_set_buswidth - Set memory buswidth
-+ * @bw	Memory buswidth (8 | 16)
-+ * Returns 0 on success or negative errno.
-+ *
-+ * Must be called with xsmcps_lock held.
-+ */
-+static int xsmcps_set_buswidth(unsigned int bw)
-+{
-+	u32 reg;
-+
-+	if (bw != 8 && bw != 16)
-+		return -EINVAL;
-+
-+	reg = readl(xsmcps_base + XSMCPS_SET_OPMODE_OFFS);
-+	reg &= ~3;
-+	if (bw == 16)
-+		reg |= 1;
-+	writel(reg, xsmcps_base + XSMCPS_SET_OPMODE_OFFS);
-+
-+	return 0;
-+}
-+
-+/**
-+ * xsmcps_set_cycles - Set memory timing parameters
-+ * @t0	t_rc		read cycle time
-+ * @t1	t_wc		write cycle time
-+ * @t2	t_rea/t_ceoe	output enable assertion delay
-+ * @t3	t_wp		write enable deassertion delay
-+ * @t4	t_clr/t_pc	page cycle time
-+ * @t5	t_ar/t_ta	ID read time/turnaround time
-+ * @t6	t_rr		busy to RE timing
-+ *
-+ * Sets NAND chip specific timing parameters.
-+ *
-+ * Must be called with xsmcps_lock held.
-+ */
-+static void xsmcps_set_cycles(u32 t0, u32 t1, u32 t2, u32 t3, u32
-+		t4, u32 t5, u32 t6)
-+{
-+	t0 &= 0xf;
-+	t1 = (t1 & 0xf) << 4;
-+	t2 = (t2 & 7) << 8;
-+	t3 = (t3 & 7) << 11;
-+	t4 = (t4 & 7) << 14;
-+	t5 = (t5 & 7) << 17;
-+	t6 = (t6 & 0xf) << 20;
-+
-+	t0 |= t1 | t2 | t3 | t4 | t5 | t6;
-+
-+	writel(t0, xsmcps_base + XSMCPS_SET_CYCLES_OFFS);
-+}
-+
-+/**
-+ * xsmcps_ecc_is_busy_noirq - Read ecc busy flag
-+ * Returns the ecc_status bit from the ecc_status register. 1 = busy, 0 = idle
-+ *
-+ * Must be called with xsmcps_lock held.
-+ */
-+static int xsmcps_ecc_is_busy_noirq(void)
-+{
-+	return !!(readl(xsmcps_base + XSMCPS_ECC_STATUS_OFFS) &
-+			XSMCPS_ECC_STATUS_BUSY);
-+}
-+
-+/**
-+ * xsmcps_ecc_is_busy - Read ecc busy flag
-+ * Returns the ecc_status bit from the ecc_status register. 1 = busy, 0 = idle
-+ */
-+int xsmcps_ecc_is_busy(void)
-+{
-+	unsigned long flags;
-+	int ret;
-+
-+	spin_lock_irqsave(&xsmcps_lock, flags);
-+
-+	ret = xsmcps_ecc_is_busy_noirq();
-+
-+	spin_unlock_irqrestore(&xsmcps_lock, flags);
-+
-+	return ret;
-+}
-+EXPORT_SYMBOL_GPL(xsmcps_ecc_is_busy);
-+
-+/**
-+ * xsmcps_get_ecc_val - Read ecc_valueN registers
-+ * @ecc_reg	Index of the ecc_value reg (0..3)
-+ * Returns the content of the requested ecc_value register.
-+ *
-+ * There are four valid ecc_value registers. The argument is truncated to stay
-+ * within this valid boundary.
-+ */
-+u32 xsmcps_get_ecc_val(int ecc_reg)
-+{
-+	u32 reg;
-+	u32 addr;
-+	unsigned long flags;
-+
-+	ecc_reg &= 3;
-+	addr = XSMCPS_ECC_VALUE0_OFFS + (ecc_reg << 2);
-+
-+	spin_lock_irqsave(&xsmcps_lock, flags);
-+
-+	reg = readl(xsmcps_base + addr);
-+
-+	spin_unlock_irqrestore(&xsmcps_lock, flags);
-+
-+	return reg;
-+}
-+EXPORT_SYMBOL_GPL(xsmcps_get_ecc_val);
-+
-+/**
-+ * xsmcps_get_nand_int_status_raw - Get NAND interrupt status bit
-+ * Returns the raw_int_status1 bit from the memc_status register
-+ */
-+int xsmcps_get_nand_int_status_raw(void)
-+{
-+	u32 reg;
-+	unsigned long flags;
-+
-+	spin_lock_irqsave(&xsmcps_lock, flags);
-+
-+	reg = readl(xsmcps_base + XSMCPS_MEMC_STATUS_OFFS);
-+
-+	spin_unlock_irqrestore(&xsmcps_lock, flags);
-+
-+	reg >>= 6;
-+	reg &= 1;
-+
-+	return reg;
-+}
-+EXPORT_SYMBOL_GPL(xsmcps_get_nand_int_status_raw);
-+
-+/**
-+ * xsmcps_clr_nand_int - Clear NAND interrupt
-+ */
-+void xsmcps_clr_nand_int(void)
-+{
-+	unsigned long flags;
-+
-+	spin_lock_irqsave(&xsmcps_lock, flags);
-+
-+	writel(XSMCPS_CFG_CLR_INT_1, xsmcps_base + XSMCPS_CFG_CLR_OFFS);
-+
-+	spin_unlock_irqrestore(&xsmcps_lock, flags);
-+}
-+EXPORT_SYMBOL_GPL(xsmcps_clr_nand_int);
-+
-+/**
-+ * xsmcps_set_ecc_mode - Set SMC ECC mode
-+ * @mode	ECC mode (BYPASS, APB, MEM)
-+ * Returns 0 on success or negative errno.
-+ */
-+int xsmcps_set_ecc_mode(enum xsmcps_ecc_mode mode)
-+{
-+	u32 reg;
-+	unsigned long flags;
-+	int ret = 0;
-+
-+	switch (mode) {
-+	case XSMCPS_ECCMODE_BYPASS:
-+	case XSMCPS_ECCMODE_APB:
-+	case XSMCPS_ECCMODE_MEM:
-+		spin_lock_irqsave(&xsmcps_lock, flags);
-+
-+		reg = readl(xsmcps_base + XSMCPS_ECC_MEMCFG_OFFS);
-+		reg &= ~0xc;
-+		reg |= mode << 2;
-+		writel(reg, xsmcps_base + XSMCPS_ECC_MEMCFG_OFFS);
-+
-+		spin_unlock_irqrestore(&xsmcps_lock, flags);
-+		break;
-+	default:
-+		ret = -EINVAL;
-+	}
-+
-+	return ret;
-+}
-+EXPORT_SYMBOL_GPL(xsmcps_set_ecc_mode);
-+
-+/**
-+ * xsmcps_set_ecc_pg_size - Set SMC ECC page size
-+ * @pg_sz	ECC page size
-+ * Returns 0 on success or negative errno.
-+ */
-+int xsmcps_set_ecc_pg_size(unsigned int pg_sz)
-+{
-+	u32 reg;
-+	u32 sz;
-+	unsigned long flags;
-+
-+	switch (pg_sz) {
-+	case 0:
-+		sz = 0;
-+		break;
-+	case 512:
-+		sz = 1;
-+		break;
-+	case 1024:
-+		sz = 2;
-+		break;
-+	case 2048:
-+		sz = 3;
-+		break;
-+	default:
-+		return -EINVAL;
-+	}
-+
-+	spin_lock_irqsave(&xsmcps_lock, flags);
-+
-+	reg = readl(xsmcps_base + XSMCPS_ECC_MEMCFG_OFFS);
-+	reg &= ~3;
-+	reg |= sz;
-+	writel(reg, xsmcps_base + XSMCPS_ECC_MEMCFG_OFFS);
-+
-+	spin_unlock_irqrestore(&xsmcps_lock, flags);
-+
-+	return 0;
-+}
-+EXPORT_SYMBOL_GPL(xsmcps_set_ecc_pg_size);
-+
-+static int xsmcps_clk_notifier_cb(struct notifier_block *nb,
-+		unsigned long event, void *data)
-+{
-+
-+	switch (event) {
-+	case PRE_RATE_CHANGE:
-+		/*
-+		 * if a rate change is announced we need to check whether we can
-+		 * run under the changed conditions
-+		 */
-+		/* fall through */
-+	case POST_RATE_CHANGE:
-+		return NOTIFY_OK;
-+	case ABORT_RATE_CHANGE:
-+	default:
-+		return NOTIFY_DONE;
-+	}
-+}
-+
-+#ifdef CONFIG_PM_SLEEP
-+static int xsmcps_suspend(struct device *dev)
-+{
-+	struct xsmcps_data *xsmcps = dev_get_drvdata(dev);
-+
-+	clk_disable(xsmcps->devclk);
-+	clk_disable(xsmcps->aperclk);
-+
-+	return 0;
-+}
-+
-+static int xsmcps_resume(struct device *dev)
-+{
-+	int ret;
-+	struct xsmcps_data *xsmcps = dev_get_drvdata(dev);
-+
-+	ret = clk_enable(xsmcps->aperclk);
-+	if (ret) {
-+		dev_err(dev, "Cannot enable APER clock.\n");
-+		return ret;
-+	}
-+
-+	ret = clk_enable(xsmcps->devclk);
-+	if (ret) {
-+		dev_err(dev, "Cannot enable device clock.\n");
-+		clk_disable(xsmcps->aperclk);
-+		return ret;
-+	}
-+	return ret;
-+}
-+#endif
-+
-+static SIMPLE_DEV_PM_OPS(xsmcps_dev_pm_ops, xsmcps_suspend, xsmcps_resume);
-+
-+/**
-+ * xsmcps_init_nand_interface - Initialize the NAND interface
-+ * @pdev	Pointer to the platform_device struct
-+ * @nand_node	Pointer to the xnandps device_node struct
-+ */
-+static void xsmcps_init_nand_interface(struct platform_device *pdev,
-+		struct device_node *nand_node)
-+{
-+	u32 t_rc, t_wc, t_rea, t_wp, t_clr, t_ar, t_rr;
-+	unsigned int bw;
-+	int err;
-+	unsigned long flags;
-+
-+	err = of_property_read_u32(nand_node, "xlnx,nand-width", &bw);
-+	if (err) {
-+		dev_warn(&pdev->dev,
-+				"xlnx,nand-width not in device tree, using 8");
-+		bw = 8;
-+	}
-+	/* nand-cycle-<X> property is refer to the NAND flash timing
-+	 * mapping between dts and the NAND flash AC timing
-+	 *  X  : AC timing name
-+	 *  t0 : t_rc
-+	 *  t1 : t_wc
-+	 *  t2 : t_rea
-+	 *  t3 : t_wp
-+	 *  t4 : t_clr
-+	 *  t5 : t_ar
-+	 *  t6 : t_rr
-+	 */
-+	err = of_property_read_u32(nand_node, "xlnx,nand-cycle-t0", &t_rc);
-+	if (err) {
-+		dev_warn(&pdev->dev, "xlnx,nand-cycle-t0 not in device tree");
-+		goto default_nand_timing;
-+	}
-+	err = of_property_read_u32(nand_node, "xlnx,nand-cycle-t1", &t_wc);
-+	if (err) {
-+		dev_warn(&pdev->dev, "xlnx,nand-cycle-t1 not in device tree");
-+		goto default_nand_timing;
-+	}
-+	err = of_property_read_u32(nand_node, "xlnx,nand-cycle-t2", &t_rea);
-+	if (err) {
-+		dev_warn(&pdev->dev, "xlnx,nand-cycle-t2 not in device tree");
-+		goto default_nand_timing;
-+	}
-+	err = of_property_read_u32(nand_node, "xlnx,nand-cycle-t3", &t_wp);
-+	if (err) {
-+		dev_warn(&pdev->dev, "xlnx,nand-cycle-t3 not in device tree");
-+		goto default_nand_timing;
-+	}
-+	err = of_property_read_u32(nand_node, "xlnx,nand-cycle-t4", &t_clr);
-+	if (err) {
-+		dev_warn(&pdev->dev, "xlnx,nand-cycle-t4 not in device tree");
-+		goto default_nand_timing;
-+	}
-+	err = of_property_read_u32(nand_node, "xlnx,nand-cycle-t5", &t_ar);
-+	if (err) {
-+		dev_warn(&pdev->dev, "xlnx,nand-cycle-t5 not in device tree");
-+		goto default_nand_timing;
-+	}
-+	err = of_property_read_u32(nand_node, "xlnx,nand-cycle-t6", &t_rr);
-+	if (err) {
-+		dev_warn(&pdev->dev, "xlnx,nand-cycle-t6 not in device tree");
-+		goto default_nand_timing;
-+	}
-+
-+default_nand_timing:
-+	if (err) {
-+		/* set default NAND flash timing property */
-+		dev_warn(&pdev->dev, "Using default timing for");
-+		dev_warn(&pdev->dev, "2Gb Numonyx MT29F2G08ABAEAWP NAND flash");
-+		dev_warn(&pdev->dev, "t_wp, t_clr, t_ar are set to 4");
-+		dev_warn(&pdev->dev, "t_rc, t_wc, t_rr are set to 2");
-+		dev_warn(&pdev->dev, "t_rea is set to 1");
-+		t_rc = t_wc = t_rr = 4;
-+		t_rea = 1;
-+		t_wp = t_clr = t_ar = 2;
-+	}
-+
-+	spin_lock_irqsave(&xsmcps_lock, flags);
-+
-+	if (xsmcps_set_buswidth(bw)) {
-+		dev_warn(&pdev->dev, "xlnx,nand-width not valid, using 8");
-+		xsmcps_set_buswidth(8);
-+	}
-+
-+	/*
-+	 * Default assume 50MHz clock (20ns cycle time) and 3V operation
-+	 * The SET_CYCLES_REG register value depends on the flash device.
-+	 * Look in to the device datasheet and change its value, This value
-+	 * is for 2Gb Numonyx flash.
-+	 */
-+	xsmcps_set_cycles(t_rc, t_wc, t_rea, t_wp, t_clr, t_ar, t_rr);
-+	writel(XSMCPS_CFG_CLR_INT_1, xsmcps_base + XSMCPS_CFG_CLR_OFFS);
-+	writel(XSMCPS_DC_UPT_NAND_REGS, xsmcps_base + XSMCPS_DIRECT_CMD_OFFS);
-+	/* Wait till the ECC operation is complete */
-+	while (xsmcps_ecc_is_busy_noirq())
-+		cpu_relax();
-+	/* Set the command1 and command2 register */
-+	writel(XNANDPS_ECC_CMD1, xsmcps_base + XSMCPS_ECC_MEMCMD1_OFFS);
-+	writel(XNANDPS_ECC_CMD2, xsmcps_base + XSMCPS_ECC_MEMCMD2_OFFS);
-+
-+	spin_unlock_irqrestore(&xsmcps_lock, flags);
-+}
-+
-+const struct of_device_id matches_nor[] = {
-+	{.compatible = "cfi-flash"},
-+	{}
-+};
-+const struct of_device_id matches_nand[] = {
-+	{.compatible = "xlnx,ps7-nand-1.00.a"},
-+	{}
-+};
-+
-+static int xsmcps_probe(struct platform_device *pdev)
-+{
-+	struct xsmcps_data *xsmcps;
-+	struct device_node *child;
-+	unsigned long flags;
-+	int err;
-+	struct device_node *of_node = pdev->dev.of_node;
-+	const struct of_device_id *matches = NULL;
-+
-+	xsmcps = kzalloc(sizeof(*xsmcps), GFP_KERNEL);
-+	if (!xsmcps) {
-+		dev_err(&pdev->dev, "unable to allocate memory\n");
-+		return -ENOMEM;
-+	}
-+
-+	xsmcps->aperclk = clk_get(&pdev->dev, "aper_clk");
-+	if (IS_ERR(xsmcps->aperclk)) {
-+		dev_err(&pdev->dev, "aper_clk clock not found.\n");
-+		err = PTR_ERR(xsmcps->aperclk);
-+		goto out_free;
-+	}
-+
-+	xsmcps->devclk = clk_get(&pdev->dev, "ref_clk");
-+	if (IS_ERR(xsmcps->devclk)) {
-+		dev_err(&pdev->dev, "ref_clk clock not found.\n");
-+		err = PTR_ERR(xsmcps->devclk);
-+		goto out_clk_put_aper;
-+	}
-+
-+	err = clk_prepare_enable(xsmcps->aperclk);
-+	if (err) {
-+		dev_err(&pdev->dev, "Unable to enable APER clock.\n");
-+		goto out_clk_put;
-+	}
-+
-+	err = clk_prepare_enable(xsmcps->devclk);
-+	if (err) {
-+		dev_err(&pdev->dev, "Unable to enable device clock.\n");
-+		goto out_clk_dis_aper;
-+	}
-+
-+	platform_set_drvdata(pdev, xsmcps);
-+
-+	xsmcps->clk_rate_change_nb.notifier_call = xsmcps_clk_notifier_cb;
-+	if (clk_notifier_register(xsmcps->devclk, &xsmcps->clk_rate_change_nb))
-+		dev_warn(&pdev->dev, "Unable to register clock notifier.\n");
-+
-+	/* Get the NAND controller virtual address */
-+	xsmcps->res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+	if (!xsmcps->res) {
-+		err = -ENODEV;
-+		dev_err(&pdev->dev, "platform_get_resource failed\n");
-+		goto out_clk_disable;
-+	}
-+	xsmcps->res = request_mem_region(xsmcps->res->start,
-+			resource_size(xsmcps->res), pdev->name);
-+	if (!xsmcps->res) {
-+		err = -ENOMEM;
-+		dev_err(&pdev->dev, "request_mem_region failed\n");
-+		goto out_clk_disable;
-+	}
-+
-+	xsmcps_base = ioremap(xsmcps->res->start, resource_size(xsmcps->res));
-+	if (!xsmcps_base) {
-+		err = -EIO;
-+		dev_err(&pdev->dev, "ioremap failed\n");
-+		goto out_release_mem_region;
-+	}
-+
-+	/* clear interrupts */
-+	spin_lock_irqsave(&xsmcps_lock, flags);
-+
-+	writel(0x52, xsmcps_base + XSMCPS_CFG_CLR_OFFS);
-+
-+	spin_unlock_irqrestore(&xsmcps_lock, flags);
-+
-+	/* Find compatible children. Only a single child is supported */
-+	for_each_available_child_of_node(of_node, child) {
-+		if (of_match_node(matches_nand, child)) {
-+			xsmcps_init_nand_interface(pdev, child);
-+			if (!matches) {
-+				matches = matches_nand;
-+			} else {
-+				dev_err(&pdev->dev,
-+					"incompatible configuration\n");
-+				goto out_release_mem_region;
-+			}
-+		}
-+
-+		if (of_match_node(matches_nor, child)) {
-+			static int counts = 0;
-+			if (!matches) {
-+				matches = matches_nor;
-+			} else {
-+				if (matches != matches_nor || counts > 1) {
-+					dev_err(&pdev->dev,
-+						"incompatible configuration\n");
-+					goto out_release_mem_region;
-+				}
-+			}
-+			counts++;
-+		}
-+	}
-+
-+	if (matches)
-+		of_platform_populate(of_node, matches, NULL, &pdev->dev);
-+
-+	return 0;
-+
-+out_release_mem_region:
-+	release_mem_region(xsmcps->res->start, resource_size(xsmcps->res));
-+	kfree(xsmcps->res);
-+out_clk_disable:
-+	clk_disable_unprepare(xsmcps->devclk);
-+out_clk_dis_aper:
-+	clk_disable_unprepare(xsmcps->aperclk);
-+out_clk_put:
-+	clk_put(xsmcps->devclk);
-+out_clk_put_aper:
-+	clk_put(xsmcps->aperclk);
-+out_free:
-+	kfree(xsmcps);
-+
-+	return err;
-+}
-+
-+static int xsmcps_remove(struct platform_device *pdev)
-+{
-+	struct xsmcps_data *xsmcps = platform_get_drvdata(pdev);
-+
-+	clk_notifier_unregister(xsmcps->devclk, &xsmcps->clk_rate_change_nb);
-+	release_mem_region(xsmcps->res->start, resource_size(xsmcps->res));
-+	kfree(xsmcps->res);
-+	iounmap(xsmcps_base);
-+	clk_disable_unprepare(xsmcps->devclk);
-+	clk_disable_unprepare(xsmcps->aperclk);
-+	clk_put(xsmcps->devclk);
-+	clk_put(xsmcps->aperclk);
-+	kfree(xsmcps);
-+
-+	return 0;
-+}
-+
-+/* Match table for device tree binding */
-+static const struct of_device_id xsmcps_of_match[] = {
-+	{.compatible = "xlnx,ps7-smc"},
-+	{ },
-+};
-+MODULE_DEVICE_TABLE(of, xsmcps_of_match);
-+
-+static struct platform_driver xsmcps_driver = {
-+	.probe		= xsmcps_probe,
-+	.remove		= xsmcps_remove,
-+	.driver		= {
-+		.name	= "xsmcps",
-+		.owner	= THIS_MODULE,
-+		.pm	= &xsmcps_dev_pm_ops,
-+		.of_match_table = xsmcps_of_match,
-+	},
-+};
-+
-+module_platform_driver(xsmcps_driver);
-+
-+MODULE_AUTHOR("Xilinx, Inc.");
-+MODULE_DESCRIPTION("Xilinx PS SMC Driver");
-+MODULE_LICENSE("GPL");
---- /dev/null
-+++ b/include/linux/memory/zynq-smc.h
-@@ -0,0 +1,32 @@
-+/*
-+ * Xilinx Zynq SMC Driver Header
-+ *
-+ * Copyright (C) 2012 Xilinx, Inc.
-+ *
-+ * This program is free software; you can redistribute it and/or modify it under
-+ * the terms of the GNU General Public License version 2 as published by the
-+ * Free Software Foundation; either version 2 of the License, or (at your
-+ * option) any later version.
-+ *
-+ * You should have received a copy of the GNU General Public License along with
-+ * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
-+ * Place, Suite 330, Boston, MA  02111-1307  USA
-+ */
-+
-+#ifndef __LINUX_MEMORY_ZYNQ_SMC_H
-+#define __LINUX_MEMORY_ZYNQ_SMC_H
-+
-+enum xsmcps_ecc_mode {
-+	XSMCPS_ECCMODE_BYPASS = 0,
-+	XSMCPS_ECCMODE_APB = 1,
-+	XSMCPS_ECCMODE_MEM = 2
-+};
-+
-+u32 xsmcps_get_ecc_val(int ecc_reg);
-+int xsmcps_ecc_is_busy(void);
-+int xsmcps_get_nand_int_status_raw(void);
-+void xsmcps_clr_nand_int(void);
-+int xsmcps_set_ecc_mode(enum xsmcps_ecc_mode mode);
-+int xsmcps_set_ecc_pg_size(unsigned int pg_sz);
-+
-+#endif
diff --git a/patches.zynq/0011-ARM-zynq-cpuidle-Remove-useless-compatibility-string.patch b/patches.zynq/0011-ARM-zynq-cpuidle-Remove-useless-compatibility-string.patch
deleted file mode 100644
index dc537f9be0f14..0000000000000
--- a/patches.zynq/0011-ARM-zynq-cpuidle-Remove-useless-compatibility-string.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From fb90b2d616862222143739e23ddb11f37eb1b208 Mon Sep 17 00:00:00 2001
-From: Daniel Lezcano <daniel.lezcano@linaro.org>
-Date: Fri, 27 Sep 2013 09:46:09 +0200
-Subject: ARM: zynq: cpuidle: Remove useless compatibility string
-
-All zynq platforms have this compatibility string and there is no any other
-clone.
-
-Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
-Acked-by: Michal Simek <michal.simek@xilinx.com>
-(cherry picked from commit 4aa88fbe6d6f78a8a464445eb6b55a360e3d3733)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/cpuidle/cpuidle-zynq.c | 4 ----
- 1 file changed, 4 deletions(-)
-
-diff --git a/drivers/cpuidle/cpuidle-zynq.c b/drivers/cpuidle/cpuidle-zynq.c
-index 38e03a183591..ab6c4b4ffc7b 100644
---- a/drivers/cpuidle/cpuidle-zynq.c
-+++ b/drivers/cpuidle/cpuidle-zynq.c
-@@ -28,7 +28,6 @@
- #include <linux/init.h>
- #include <linux/cpu_pm.h>
- #include <linux/cpuidle.h>
--#include <linux/of.h>
- #include <asm/proc-fns.h>
- #include <asm/cpuidle.h>
- 
-@@ -72,9 +71,6 @@ static struct cpuidle_driver zynq_idle_driver = {
- /* Initialize CPU idle by registering the idle states */
- static int __init zynq_cpuidle_init(void)
- {
--	if (!of_machine_is_compatible("xlnx,zynq-7000"))
--		return -ENODEV;
--
- 	pr_info("Xilinx Zynq CpuIdle Driver started\n");
- 
- 	return cpuidle_register(&zynq_idle_driver, NULL);
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0011-arm-dts-zynq-Merge-zynq-zc702.dts-with-Xilinx-reposi.patch b/patches.zynq/0011-arm-dts-zynq-Merge-zynq-zc702.dts-with-Xilinx-reposi.patch
deleted file mode 100644
index 5c2182c690771..0000000000000
--- a/patches.zynq/0011-arm-dts-zynq-Merge-zynq-zc702.dts-with-Xilinx-reposi.patch
+++ /dev/null
@@ -1,418 +0,0 @@
-From 5bf18a6e06c0906459605ebb45077d8ab710ebde Mon Sep 17 00:00:00 2001
-From: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Date: Mon, 13 May 2013 10:46:38 -0700
-Subject: arm: dts: zynq: Merge zynq-zc702.dts with Xilinx repository
-
-This patch updates the zynq zc702 device tree by merging some parts
-from the corresponding file in the Xilinx repository
-(commit efc27505715e64526653f35274717c0fc56491e3 in master branch)
-
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- arch/arm/boot/dts/zynq-zc702.dts |  389 ++++++++++++++++++++++++++++++++++++---
- 1 file changed, 366 insertions(+), 23 deletions(-)
-
---- a/arch/arm/boot/dts/zynq-zc702.dts
-+++ b/arch/arm/boot/dts/zynq-zc702.dts
-@@ -1,34 +1,377 @@
- /*
-- *  Copyright (C) 2011 Xilinx
-- *  Copyright (C) 2012 National Instruments Corp.
-+ * Device Tree Generator version: 1.1
-  *
-- * This software is licensed under the terms of the GNU General Public
-- * License version 2, as published by the Free Software Foundation, and
-- * may be copied, distributed, and modified under those terms.
-+ * (C) Copyright 2007-2013 Xilinx, Inc.
-+ * (C) Copyright 2007-2013 Michal Simek
-+ * (C) Copyright 2007-2012 PetaLogix Qld Pty Ltd
-+ *
-+ * Michal SIMEK <monstr@monstr.eu>
-+ *
-+ * CAUTION: This file is automatically generated by libgen.
-+ * Version: Xilinx EDK 14.5 EDK_P.58f
-  *
-- * This program is distributed in the hope that it will be useful,
-- * but WITHOUT ANY WARRANTY; without even the implied warranty of
-- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-- * GNU General Public License for more details.
-  */
--/dts-v1/;
--/include/ "zynq-7000.dtsi"
- 
-+/dts-v1/;
- / {
--	model = "Zynq ZC702 Development Board";
--	compatible = "xlnx,zynq-zc702", "xlnx,zynq-7000";
--
--	memory {
-+	#address-cells = <1>;
-+	#size-cells = <1>;
-+	compatible = "xlnx,zynq-7000";
-+	model = "Xilinx Zynq";
-+	aliases {
-+		ethernet0 = &ps7_ethernet_0;
-+		i2c0 = &ps7_i2c_0;
-+		serial0 = &ps7_uart_1;
-+		spi0 = &ps7_qspi_0;
-+	} ;
-+	chosen {
-+		bootargs = "console=ttyPS0,115200 root=/dev/mmcblk0p2 initrd=0x2000000,8M rw rootwait earlyprintk";
-+		linux,stdout-path = "/amba@0/serial@e0001000";
-+	} ;
-+	cpus {
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		ps7_cortexa9_0: cpu@0 {
-+			bus-handle = <&ps7_axi_interconnect_0>;
-+			compatible = "arm,cortex-a9";
-+			d-cache-line-size = <0x20>;
-+			d-cache-size = <0x8000>;
-+			device_type = "cpu";
-+			i-cache-line-size = <0x20>;
-+			i-cache-size = <0x8000>;
-+			interrupt-handle = <&ps7_scugic_0>;
-+			reg = <0x0>;
-+		} ;
-+		ps7_cortexa9_1: cpu@1 {
-+			bus-handle = <&ps7_axi_interconnect_0>;
-+			compatible = "arm,cortex-a9";
-+			d-cache-line-size = <0x20>;
-+			d-cache-size = <0x8000>;
-+			device_type = "cpu";
-+			i-cache-line-size = <0x20>;
-+			i-cache-size = <0x8000>;
-+			interrupt-handle = <&ps7_scugic_0>;
-+			reg = <0x1>;
-+		} ;
-+	} ;
-+	pmu {
-+		compatible = "arm,cortex-a9-pmu";
-+		interrupt-parent = <&ps7_scugic_0>;
-+		interrupts = <0 5 4>, <0 6 4>;
-+		reg = <0xf8891000 0x1000>, <0xf8893000 0x1000>;
-+		reg-names = "cpu0", "cpu1";
-+	} ;
-+	ps7_ddr_0: memory@0 {
- 		device_type = "memory";
- 		reg = <0x0 0x40000000>;
--	};
-+	} ;
-+	ps7_axi_interconnect_0: amba@0 {
-+		#address-cells = <1>;
-+		#size-cells = <1>;
-+		compatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus";
-+		ranges ;
-+		ps7_dma_s: ps7-dma@f8003000 {
-+			#dma-cells = <1>;
-+			#dma-channels = <8>;
-+			#dma-requests = <4>;
-+			arm,primecell-periphid = <0x41330>;
-+			clock-names = "apb_pclk";
-+			clocks = <&clkc 27>;
-+			compatible = "xlnx,ps7-dma-1.00.a", "arm,primecell", "arm,pl330";
-+			interrupt-names = "abort", "dma0", "dma1", "dma2", "dma3",
-+				"dma4", "dma5", "dma6", "dma7";
-+			interrupt-parent = <&ps7_scugic_0>;
-+			interrupts = <0 13 4>, <0 14 4>, <0 15 4>, <0 16 4>, <0 17 4>, <0 40 4>, <0 41 4>, <0 42 4>, <0 43 4>;
-+			reg = <0xf8003000 0x1000>;
-+		} ;
-+		ps7_ethernet_0: ps7-ethernet@e000b000 {
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			clock-names = "ref_clk", "aper_clk";
-+			clocks = <&clkc 13>, <&clkc 30>;
-+			compatible = "xlnx,ps7-ethernet-1.00.a";
-+			interrupt-parent = <&ps7_scugic_0>;
-+			interrupts = <0 22 4>;
-+			local-mac-address = [00 0a 35 00 00 00];
-+			phy-handle = <&phy0>;
-+			phy-mode = "rgmii-id";
-+			reg = <0xe000b000 0x1000>;
-+			xlnx,enet-reset = "MIO 11";
-+			xlnx,eth-mode = <0x1>;
-+			xlnx,has-mdio = <0x1>;
-+			xlnx,ptp-enet-clock = <111111115>;
-+			mdio {
-+				#address-cells = <1>;
-+				#size-cells = <0>;
-+				phy0: phy@7 {
-+					compatible = "marvell,88e1116r";
-+					device_type = "ethernet-phy";
-+					reg = <7>;
-+				} ;
-+			} ;
-+		} ;
-+		ps7_gpio_0: ps7-gpio@e000a000 {
-+			#gpio-cells = <2>;
-+			clocks = <&clkc 42>;
-+			compatible = "xlnx,ps7-gpio-1.00.a";
-+			emio-gpio-width = <64>;
-+			gpio-controller ;
-+			gpio-mask-high = <0x0>;
-+			gpio-mask-low = <0x5600>;
-+			interrupt-parent = <&ps7_scugic_0>;
-+			interrupts = <0 20 4>;
-+			reg = <0xe000a000 0x1000>;
-+		} ;
-+		ps7_i2c_0: ps7-i2c@e0004000 {
-+			bus-id = <0>;
-+			clocks = <&clkc 38>;
-+			compatible = "xlnx,ps7-i2c-1.00.a";
-+			i2c-clk = <400000>;
-+			interrupt-parent = <&ps7_scugic_0>;
-+			interrupts = <0 25 4>;
-+			reg = <0xe0004000 0x1000>;
-+			xlnx,has-interrupt = <0x0>;
-+			xlnx,i2c-reset = "MIO 13";
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			i2cswitch@74 {
-+				compatible = "nxp,pca9548";
-+				#address-cells = <1>;
-+				#size-cells = <0>;
-+				reg = <0x74>;
- 
--	chosen {
--		bootargs = "console=ttyPS0,115200 earlyprintk";
--	};
-+				i2c@0 {
-+					#address-cells = <1>;
-+					#size-cells = <0>;
-+					reg = <0>;
-+					osc@5d {
-+						compatible = "si570";
-+						reg = <0x5d>;
-+						factory-fout = <156250000>;
-+						initial-fout = <148500000>;
-+					};
-+				};
-+
-+				i2c@2 {
-+					#address-cells = <1>;
-+					#size-cells = <0>;
-+					reg = <2>;
-+					eeprom@54 {
-+						compatible = "at,24c08";
-+						reg = <0x54>;
-+					};
-+				};
-+
-+				i2c@3 {
-+					#address-cells = <1>;
-+					#size-cells = <0>;
-+					reg = <3>;
-+					gpio@21 {
-+						compatible = "ti,tca6416";
-+						reg = <0x21>;
-+						gpio-controller;
-+						#gpio-cells = <2>;
-+					};
-+				};
-+
-+				i2c@4 {
-+					#address-cells = <1>;
-+					#size-cells = <0>;
-+					reg = <4>;
-+					rtc@54 {
-+						compatible = "nxp,pcf8563";
-+						reg = <0x51>;
-+					};
-+				};
-+
-+				i2c@7 {
-+					#address-cells = <1>;
-+					#size-cells = <0>;
-+					reg = <7>;
-+					hwmon@52 {
-+						compatible = "pmbus,ucd9248";
-+						reg = <52>;
-+					};
-+					hwmon@53 {
-+						compatible = "pmbus,ucd9248";
-+						reg = <53>;
-+					};
-+					hwmon@54 {
-+						compatible = "pmbus,ucd9248";
-+						reg = <54>;
-+					};
-+				};
-+			};
- 
--};
-+		} ;
-+		ps7_iop_bus_config_0: ps7-iop-bus-config@e0200000 {
-+			compatible = "xlnx,ps7-iop-bus-config-1.00.a";
-+			reg = <0xe0200000 0x1000>;
-+		} ;
-+		ps7_pl310_0: ps7-pl310@f8f02000 {
-+			arm,data-latency = <3 2 2>;
-+			arm,tag-latency = <2 2 2>;
-+			cache-level = <2>;
-+			cache-unified ;
-+			compatible = "xlnx,ps7-pl310-1.00.a", "arm,pl310-cache";
-+			interrupt-parent = <&ps7_scugic_0>;
-+			interrupts = <0 2 4>;
-+			reg = <0xf8f02000 0x1000>;
-+		} ;
-+		ps7_qspi_0: ps7-qspi@e000d000 {
-+			clock-names = "ref_clk", "aper_clk";
-+			clocks = <&clkc 10>, <&clkc 43>;
-+			compatible = "xlnx,ps7-qspi-1.00.a";
-+			interrupt-parent = <&ps7_scugic_0>;
-+			interrupts = <0 19 4>;
-+			is-dual = <0>;
-+			num-chip-select = <1>;
-+			reg = <0xe000d000 0x1000>;
-+			xlnx,fb-clk = <0x1>;
-+			xlnx,qspi-mode = <0x0>;
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			flash@0 {
-+				compatible = "n25q128";
-+				reg = <0x0>;
-+				spi-max-frequency = <50000000>;
-+				#address-cells = <1>;
-+				#size-cells = <1>;
-+				partition@qspi-fsbl-uboot {
-+					label = "qspi-fsbl-uboot";
-+					reg = <0x0 0x100000>;
-+				};
-+				partition@qspi-linux {
-+					label = "qspi-linux";
-+					reg = <0x100000 0x500000>;
-+				};
-+				partition@qspi-device-tree {
-+					label = "qspi-device-tree";
-+					reg = <0x600000 0x20000>;
-+				};
-+				partition@qspi-rootfs {
-+					label = "qspi-rootfs";
-+					reg = <0x620000 0x5E0000>;
-+				};
-+				partition@qspi-bitstream {
-+					label = "qspi-bitstream";
-+					reg = <0xC00000 0x400000>;
-+				};
-+			};
- 
--&uart1 {
--	status = "okay";
--};
-+		} ;
-+		ps7_qspi_linear_0: ps7-qspi-linear@fc000000 {
-+			clock-names = "ref_clk", "aper_clk";
-+			clocks = <&clkc 10>, <&clkc 43>;
-+			compatible = "xlnx,ps7-qspi-linear-1.00.a";
-+			reg = <0xfc000000 0x1000000>;
-+		} ;
-+		ps7_ram_0: ps7-ram@0 {
-+			compatible = "xlnx,ps7-ram-1.00.a", "xlnx,ps7-ocm";
-+			interrupt-parent = <&ps7_scugic_0>;
-+			interrupts = <0 3 4>;
-+			reg = <0xfffc0000 0x40000>;
-+		} ;
-+		ps7_scugic_0: ps7-scugic@f8f01000 {
-+			#address-cells = <2>;
-+			#interrupt-cells = <3>;
-+			#size-cells = <1>;
-+			compatible = "xlnx,ps7-scugic-1.00.a", "arm,cortex-a9-gic", "arm,gic";
-+			interrupt-controller ;
-+			num_cpus = <2>;
-+			num_interrupts = <96>;
-+			reg = <0xf8f01000 0x1000>, <0xf8f00100 0x100>;
-+		} ;
-+		ps7_scutimer_0: ps7-scutimer@f8f00600 {
-+			clocks = <&clkc 4>;
-+			compatible = "xlnx,ps7-scutimer-1.00.a", "arm,cortex-a9-twd-timer";
-+			interrupt-parent = <&ps7_scugic_0>;
-+			interrupts = <1 13 0x301>;
-+			reg = <0xf8f00600 0x20>;
-+		} ;
-+		ps7_scuwdt_0: ps7-scuwdt@f8f00620 {
-+			clocks = <&clkc 4>;
-+			compatible = "xlnx,ps7-scuwdt-1.00.a";
-+			device_type = "watchdog";
-+			interrupt-parent = <&ps7_scugic_0>;
-+			interrupts = <1 14 0x301>;
-+			reg = <0xf8f00620 0xe0>;
-+		} ;
-+		ps7_sd_0: ps7-sdio@e0100000 {
-+			clock-frequency = <50000000>;
-+			clock-names = "clk_xin", "clk_ahb";
-+			clocks = <&clkc 21>, <&clkc 32>;
-+			compatible = "xlnx,ps7-sdio-1.00.a", "generic-sdhci", "arasan,sdhci-8.9a";
-+			interrupt-parent = <&ps7_scugic_0>;
-+			interrupts = <0 24 4>;
-+			reg = <0xe0100000 0x1000>;
-+			xlnx,has-cd = <0x1>;
-+			xlnx,has-power = <0x0>;
-+			xlnx,has-wp = <0x1>;
-+		} ;
-+		ps7_slcr_0: ps7-slcr@f8000000 {
-+			compatible = "xlnx,ps7-slcr-1.00.a", "xlnx,zynq-slcr";
-+			reg = <0xf8000000 0x1000>;
-+			clocks {
-+				#address-cells = <1>;
-+				#size-cells = <0>;
-+				clkc: clkc {
-+					#clock-cells = <1>;
-+					clock-output-names = "armpll", "ddrpll", "iopll", "cpu_6or4x", "cpu_3or2x",
-+						"cpu_2x", "cpu_1x", "ddr2x", "ddr3x", "dci",
-+						"lqspi", "smc", "pcap", "gem0", "gem1",
-+						"fclk0", "fclk1", "fclk2", "fclk3", "can0",
-+						"can1", "sdio0", "sdio1", "uart0", "uart1",
-+						"spi0", "spi1", "dma", "usb0_aper", "usb1_aper",
-+						"gem0_aper", "gem1_aper", "sdio0_aper", "sdio1_aper", "spi0_aper",
-+						"spi1_aper", "can0_aper", "can1_aper", "i2c0_aper", "i2c1_aper",
-+						"uart0_aper", "uart1_aper", "gpio_aper", "lqspi_aper", "smc_aper",
-+						"swdt", "dbg_trc", "dbg_apb";
-+					compatible = "xlnx,ps7-clkc";
-+					fclk-enable = <0xf>;
-+					ps-clk-frequency = <33333333>;
-+				} ;
-+			} ;
-+		} ;
-+		ps7_ttc_0: ps7-ttc@f8001000 {
-+			clocks = <&clkc 6>;
-+			compatible = "xlnx,ps7-ttc-1.00.a", "cdns,ttc";
-+			interrupt-names = "ttc0", "ttc1", "ttc2";
-+			interrupt-parent = <&ps7_scugic_0>;
-+			interrupts = <0 10 4>, <0 11 4>, <0 12 4>;
-+			reg = <0xf8001000 0x1000>;
-+		} ;
-+		ps7_uart_1: serial@e0001000 {
-+			clock-names = "ref_clk", "aper_clk";
-+			clocks = <&clkc 24>, <&clkc 41>;
-+			compatible = "xlnx,ps7-uart-1.00.a", "xlnx,xuartps";
-+			current-speed = <115200>;
-+			device_type = "serial";
-+			interrupt-parent = <&ps7_scugic_0>;
-+			interrupts = <0 50 4>;
-+			port-number = <0>;
-+			reg = <0xe0001000 0x1000>;
-+			xlnx,has-modem = <0x0>;
-+		} ;
-+		ps7_usb_0: ps7-usb@e0002000 {
-+			clocks = <&clkc 28>;
-+			compatible = "xlnx,ps7-usb-1.00.a";
-+			dr_mode = "host";
-+			interrupt-parent = <&ps7_scugic_0>;
-+			interrupts = <0 21 4>;
-+			phy_type = "ulpi";
-+			reg = <0xe0002000 0x1000>;
-+			xlnx,usb-reset = "MIO 7";
-+		} ;
-+		ps7_wdt_0: ps7-wdt@f8005000 {
-+			clocks = <&clkc 45>;
-+			compatible = "xlnx,ps7-wdt-1.00.a";
-+			device_type = "watchdog";
-+			interrupt-parent = <&ps7_scugic_0>;
-+			interrupts = <0 9 1>;
-+			reg = <0xf8005000 0x1000>;
-+			reset = <0>;
-+			timeout = <10>;
-+		} ;
-+	} ;
-+} ;
diff --git a/patches.zynq/0012-ARM-zynq-cpuidle-convert-to-platform-driver.patch b/patches.zynq/0012-ARM-zynq-cpuidle-convert-to-platform-driver.patch
deleted file mode 100644
index 0a6475041ba0a..0000000000000
--- a/patches.zynq/0012-ARM-zynq-cpuidle-convert-to-platform-driver.patch
+++ /dev/null
@@ -1,79 +0,0 @@
-From e57006f7a0506afce94f5047f80a213312843097 Mon Sep 17 00:00:00 2001
-From: Daniel Lezcano <daniel.lezcano@linaro.org>
-Date: Sat, 21 Sep 2013 18:41:02 +0200
-Subject: ARM: zynq: cpuidle: convert to platform driver
-
-As the ux500 and the kirkwood driver, make the zynq driver a platform driver
-
-Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
-Acked-by: Michal Simek <michal.simek@xilinx.com>
-Tested-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
-(cherry picked from commit 3e8ceca6c76ec2d5ee47ece0420cf10d041cf58f)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- arch/arm/mach-zynq/common.c    |  6 ++++++
- drivers/cpuidle/cpuidle-zynq.c | 13 +++++++++++--
- 2 files changed, 17 insertions(+), 2 deletions(-)
-
-diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c
-index 5b799c29886e..94a248b3b89b 100644
---- a/arch/arm/mach-zynq/common.c
-+++ b/arch/arm/mach-zynq/common.c
-@@ -44,6 +44,10 @@ static struct of_device_id zynq_of_bus_ids[] __initdata = {
- 	{}
- };
- 
-+static struct platform_device zynq_cpuidle_device = {
-+	.name = "cpuidle-zynq",
-+};
-+
- /**
-  * zynq_init_machine - System specific initialization, intended to be
-  *		       called from board specific initialization.
-@@ -56,6 +60,8 @@ static void __init zynq_init_machine(void)
- 	l2x0_of_init(0x02060000, 0xF0F0FFFF);
- 
- 	of_platform_bus_probe(NULL, zynq_of_bus_ids, NULL);
-+
-+	platform_device_register(&zynq_cpuidle_device);
- }
- 
- static void __init zynq_timer_init(void)
-diff --git a/drivers/cpuidle/cpuidle-zynq.c b/drivers/cpuidle/cpuidle-zynq.c
-index ab6c4b4ffc7b..aded75928028 100644
---- a/drivers/cpuidle/cpuidle-zynq.c
-+++ b/drivers/cpuidle/cpuidle-zynq.c
-@@ -28,6 +28,7 @@
- #include <linux/init.h>
- #include <linux/cpu_pm.h>
- #include <linux/cpuidle.h>
-+#include <linux/platform_device.h>
- #include <asm/proc-fns.h>
- #include <asm/cpuidle.h>
- 
-@@ -69,11 +70,19 @@ static struct cpuidle_driver zynq_idle_driver = {
- };
- 
- /* Initialize CPU idle by registering the idle states */
--static int __init zynq_cpuidle_init(void)
-+static int zynq_cpuidle_probe(struct platform_device *pdev)
- {
- 	pr_info("Xilinx Zynq CpuIdle Driver started\n");
- 
- 	return cpuidle_register(&zynq_idle_driver, NULL);
- }
- 
--device_initcall(zynq_cpuidle_init);
-+static struct platform_driver zynq_cpuidle_driver = {
-+	.driver = {
-+		.name = "cpuidle-zynq",
-+		.owner = THIS_MODULE,
-+	},
-+	.probe = zynq_cpuidle_probe,
-+};
-+
-+module_platform_driver(zynq_cpuidle_driver);
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0012-defconfig-zynq-merge-xilinx-zynq-defconfig-from-xili.patch b/patches.zynq/0012-defconfig-zynq-merge-xilinx-zynq-defconfig-from-xili.patch
deleted file mode 100644
index 9fa92971048ad..0000000000000
--- a/patches.zynq/0012-defconfig-zynq-merge-xilinx-zynq-defconfig-from-xili.patch
+++ /dev/null
@@ -1,2477 +0,0 @@
-From cda1e37742c76b3dc9ca4154279c517c669dd1ba Mon Sep 17 00:00:00 2001
-From: Michal Simek <michal.simek@xilinx.com>
-Date: Tue, 24 Dec 2013 09:47:53 +0900
-Subject: defconfig: zynq: merge xilinx zynq defconfig from xilinx branch
-
-Copy the xilinx zynq defconfig from the Xilinx repository (commit
-efc27505715e64526653f35274717c0fc56491e3 in master branch) and select
-a few options for the LTSI 3.10.y kernel, such as the asaran SDCard
-driver. We have tested it on the Zynq 702 board.
-
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- arch/arm/configs/xilinx_zynq702_defconfig | 2457 ++++++++++++++++++++++++++++++
- 1 file changed, 2457 insertions(+)
- create mode 100644 arch/arm/configs/xilinx_zynq702_defconfig
-
---- /dev/null
-+++ b/arch/arm/configs/xilinx_zynq702_defconfig
-@@ -0,0 +1,2457 @@
-+#
-+# Automatically generated file; DO NOT EDIT.
-+# Linux/arm 3.10.24 Kernel Configuration
-+#
-+CONFIG_ARM=y
-+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
-+CONFIG_HAVE_PROC_CPU=y
-+CONFIG_NO_IOPORT=y
-+CONFIG_STACKTRACE_SUPPORT=y
-+CONFIG_LOCKDEP_SUPPORT=y
-+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
-+CONFIG_RWSEM_GENERIC_SPINLOCK=y
-+CONFIG_GENERIC_HWEIGHT=y
-+CONFIG_GENERIC_CALIBRATE_DELAY=y
-+CONFIG_NEED_DMA_MAP_STATE=y
-+CONFIG_VECTORS_BASE=0xffff0000
-+CONFIG_ARM_PATCH_PHYS_VIRT=y
-+CONFIG_GENERIC_BUG=y
-+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
-+CONFIG_IRQ_WORK=y
-+CONFIG_BUILDTIME_EXTABLE_SORT=y
-+
-+#
-+# General setup
-+#
-+CONFIG_INIT_ENV_ARG_LIMIT=32
-+CONFIG_CROSS_COMPILE=""
-+CONFIG_LOCALVERSION="-xilinx"
-+CONFIG_LOCALVERSION_AUTO=y
-+CONFIG_HAVE_KERNEL_GZIP=y
-+CONFIG_HAVE_KERNEL_LZMA=y
-+CONFIG_HAVE_KERNEL_XZ=y
-+CONFIG_HAVE_KERNEL_LZO=y
-+CONFIG_KERNEL_GZIP=y
-+# CONFIG_KERNEL_LZMA is not set
-+# CONFIG_KERNEL_XZ is not set
-+# CONFIG_KERNEL_LZO is not set
-+CONFIG_DEFAULT_HOSTNAME="(none)"
-+CONFIG_SWAP=y
-+CONFIG_SYSVIPC=y
-+CONFIG_SYSVIPC_SYSCTL=y
-+# CONFIG_POSIX_MQUEUE is not set
-+# CONFIG_FHANDLE is not set
-+# CONFIG_AUDIT is not set
-+CONFIG_HAVE_GENERIC_HARDIRQS=y
-+
-+#
-+# IRQ subsystem
-+#
-+CONFIG_GENERIC_HARDIRQS=y
-+CONFIG_GENERIC_IRQ_PROBE=y
-+CONFIG_GENERIC_IRQ_SHOW=y
-+CONFIG_HARDIRQS_SW_RESEND=y
-+CONFIG_GENERIC_IRQ_CHIP=y
-+CONFIG_IRQ_DOMAIN=y
-+CONFIG_IRQ_DOMAIN_DEBUG=y
-+CONFIG_SPARSE_IRQ=y
-+CONFIG_KTIME_SCALAR=y
-+CONFIG_GENERIC_CLOCKEVENTS=y
-+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
-+CONFIG_ARCH_HAS_TICK_BROADCAST=y
-+CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
-+
-+#
-+# Timers subsystem
-+#
-+CONFIG_TICK_ONESHOT=y
-+CONFIG_NO_HZ_COMMON=y
-+# CONFIG_HZ_PERIODIC is not set
-+CONFIG_NO_HZ_IDLE=y
-+CONFIG_NO_HZ=y
-+CONFIG_HIGH_RES_TIMERS=y
-+
-+#
-+# CPU/Task time and stats accounting
-+#
-+CONFIG_TICK_CPU_ACCOUNTING=y
-+# CONFIG_IRQ_TIME_ACCOUNTING is not set
-+# CONFIG_BSD_PROCESS_ACCT is not set
-+# CONFIG_TASKSTATS is not set
-+
-+#
-+# RCU Subsystem
-+#
-+CONFIG_TREE_PREEMPT_RCU=y
-+CONFIG_PREEMPT_RCU=y
-+CONFIG_RCU_STALL_COMMON=y
-+# CONFIG_RCU_USER_QS is not set
-+CONFIG_RCU_FANOUT=32
-+CONFIG_RCU_FANOUT_LEAF=16
-+# CONFIG_RCU_FANOUT_EXACT is not set
-+# CONFIG_RCU_FAST_NO_HZ is not set
-+# CONFIG_TREE_RCU_TRACE is not set
-+# CONFIG_RCU_BOOST is not set
-+# CONFIG_RCU_NOCB_CPU is not set
-+CONFIG_IKCONFIG=y
-+CONFIG_IKCONFIG_PROC=y
-+CONFIG_LOG_BUF_SHIFT=14
-+# CONFIG_CGROUPS is not set
-+# CONFIG_CHECKPOINT_RESTORE is not set
-+# CONFIG_NAMESPACES is not set
-+CONFIG_UIDGID_CONVERTED=y
-+# CONFIG_UIDGID_STRICT_TYPE_CHECKS is not set
-+# CONFIG_SCHED_AUTOGROUP is not set
-+CONFIG_SYSFS_DEPRECATED=y
-+CONFIG_SYSFS_DEPRECATED_V2=y
-+# CONFIG_RELAY is not set
-+CONFIG_BLK_DEV_INITRD=y
-+CONFIG_INITRAMFS_SOURCE=""
-+CONFIG_RD_GZIP=y
-+# CONFIG_RD_BZIP2 is not set
-+# CONFIG_RD_LZMA is not set
-+# CONFIG_RD_XZ is not set
-+# CONFIG_RD_LZO is not set
-+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
-+CONFIG_SYSCTL=y
-+CONFIG_ANON_INODES=y
-+CONFIG_HAVE_UID16=y
-+CONFIG_HOTPLUG=y
-+CONFIG_EXPERT=y
-+CONFIG_UID16=y
-+CONFIG_SYSCTL_SYSCALL=y
-+CONFIG_KALLSYMS=y
-+# CONFIG_KALLSYMS_ALL is not set
-+CONFIG_PRINTK=y
-+CONFIG_BUG=y
-+CONFIG_ELF_CORE=y
-+CONFIG_BASE_FULL=y
-+CONFIG_FUTEX=y
-+CONFIG_EPOLL=y
-+CONFIG_SIGNALFD=y
-+CONFIG_TIMERFD=y
-+CONFIG_EVENTFD=y
-+CONFIG_SHMEM=y
-+CONFIG_AIO=y
-+CONFIG_EMBEDDED=y
-+CONFIG_HAVE_PERF_EVENTS=y
-+CONFIG_PERF_USE_VMALLOC=y
-+
-+#
-+# Kernel Performance Events And Counters
-+#
-+CONFIG_PERF_EVENTS=y
-+# CONFIG_DEBUG_PERF_USE_VMALLOC is not set
-+CONFIG_VM_EVENT_COUNTERS=y
-+CONFIG_COMPAT_BRK=y
-+CONFIG_SLAB=y
-+# CONFIG_SLUB is not set
-+# CONFIG_SLOB is not set
-+# CONFIG_PROFILING is not set
-+CONFIG_HAVE_OPROFILE=y
-+# CONFIG_JUMP_LABEL is not set
-+# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
-+CONFIG_HAVE_KPROBES=y
-+CONFIG_HAVE_KRETPROBES=y
-+CONFIG_HAVE_ARCH_TRACEHOOK=y
-+CONFIG_HAVE_DMA_ATTRS=y
-+CONFIG_HAVE_DMA_CONTIGUOUS=y
-+CONFIG_USE_GENERIC_SMP_HELPERS=y
-+CONFIG_GENERIC_SMP_IDLE_THREAD=y
-+CONFIG_GENERIC_IDLE_POLL_SETUP=y
-+CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
-+CONFIG_HAVE_CLK=y
-+CONFIG_HAVE_DMA_API_DEBUG=y
-+CONFIG_HAVE_HW_BREAKPOINT=y
-+CONFIG_HAVE_ARCH_JUMP_LABEL=y
-+CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
-+CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
-+CONFIG_HAVE_CONTEXT_TRACKING=y
-+CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
-+CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
-+CONFIG_MODULES_USE_ELF_REL=y
-+CONFIG_CLONE_BACKWARDS=y
-+CONFIG_OLD_SIGSUSPEND3=y
-+CONFIG_OLD_SIGACTION=y
-+
-+#
-+# GCOV-based kernel profiling
-+#
-+# CONFIG_GCOV_KERNEL is not set
-+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
-+CONFIG_SLABINFO=y
-+CONFIG_RT_MUTEXES=y
-+CONFIG_BASE_SMALL=0
-+# CONFIG_MODULES is not set
-+CONFIG_STOP_MACHINE=y
-+CONFIG_BLOCK=y
-+CONFIG_LBDAF=y
-+# CONFIG_BLK_DEV_BSG is not set
-+# CONFIG_BLK_DEV_BSGLIB is not set
-+# CONFIG_BLK_DEV_INTEGRITY is not set
-+
-+#
-+# Partition Types
-+#
-+# CONFIG_PARTITION_ADVANCED is not set
-+CONFIG_MSDOS_PARTITION=y
-+CONFIG_EFI_PARTITION=y
-+
-+#
-+# IO Schedulers
-+#
-+CONFIG_IOSCHED_NOOP=y
-+CONFIG_IOSCHED_DEADLINE=y
-+CONFIG_IOSCHED_CFQ=y
-+# CONFIG_DEFAULT_DEADLINE is not set
-+CONFIG_DEFAULT_CFQ=y
-+# CONFIG_DEFAULT_NOOP is not set
-+CONFIG_DEFAULT_IOSCHED="cfq"
-+CONFIG_UNINLINE_SPIN_UNLOCK=y
-+CONFIG_MUTEX_SPIN_ON_OWNER=y
-+CONFIG_FREEZER=y
-+
-+#
-+# System Type
-+#
-+CONFIG_MMU=y
-+CONFIG_ARCH_MULTIPLATFORM=y
-+# CONFIG_ARCH_INTEGRATOR is not set
-+# CONFIG_ARCH_REALVIEW is not set
-+# CONFIG_ARCH_VERSATILE is not set
-+# CONFIG_ARCH_AT91 is not set
-+# CONFIG_ARCH_CLPS711X is not set
-+# CONFIG_ARCH_GEMINI is not set
-+# CONFIG_ARCH_EBSA110 is not set
-+# CONFIG_ARCH_EP93XX is not set
-+# CONFIG_ARCH_FOOTBRIDGE is not set
-+# CONFIG_ARCH_NETX is not set
-+# CONFIG_ARCH_IOP13XX is not set
-+# CONFIG_ARCH_IOP32X is not set
-+# CONFIG_ARCH_IOP33X is not set
-+# CONFIG_ARCH_IXP4XX is not set
-+# CONFIG_ARCH_DOVE is not set
-+# CONFIG_ARCH_KIRKWOOD is not set
-+# CONFIG_ARCH_MV78XX0 is not set
-+# CONFIG_ARCH_ORION5X is not set
-+# CONFIG_ARCH_MMP is not set
-+# CONFIG_ARCH_KS8695 is not set
-+# CONFIG_ARCH_W90X900 is not set
-+# CONFIG_ARCH_LPC32XX is not set
-+# CONFIG_ARCH_PXA is not set
-+# CONFIG_ARCH_MSM is not set
-+# CONFIG_ARCH_SHMOBILE is not set
-+# CONFIG_ARCH_RPC is not set
-+# CONFIG_ARCH_SA1100 is not set
-+# CONFIG_ARCH_S3C24XX is not set
-+# CONFIG_ARCH_S3C64XX is not set
-+# CONFIG_ARCH_S5P64X0 is not set
-+# CONFIG_ARCH_S5PC100 is not set
-+# CONFIG_ARCH_S5PV210 is not set
-+# CONFIG_ARCH_EXYNOS is not set
-+# CONFIG_ARCH_SHARK is not set
-+# CONFIG_ARCH_U300 is not set
-+# CONFIG_ARCH_DAVINCI is not set
-+# CONFIG_ARCH_OMAP1 is not set
-+
-+#
-+# Multiple platform selection
-+#
-+
-+#
-+# CPU Core family selection
-+#
-+# CONFIG_ARCH_MULTI_V6 is not set
-+CONFIG_ARCH_MULTI_V7=y
-+CONFIG_ARCH_MULTI_V6_V7=y
-+# CONFIG_ARCH_MULTI_CPU_AUTO is not set
-+# CONFIG_ARCH_MVEBU is not set
-+# CONFIG_ARCH_BCM is not set
-+# CONFIG_GPIO_PCA953X is not set
-+# CONFIG_KEYBOARD_GPIO_POLLED is not set
-+# CONFIG_ARCH_HIGHBANK is not set
-+# CONFIG_ARCH_MXC is not set
-+# CONFIG_ARCH_OMAP2PLUS is not set
-+# CONFIG_ARCH_SOCFPGA is not set
-+# CONFIG_PLAT_SPEAR is not set
-+# CONFIG_ARCH_SUNXI is not set
-+# CONFIG_ARCH_SIRF is not set
-+# CONFIG_ARCH_TEGRA is not set
-+# CONFIG_ARCH_U8500 is not set
-+CONFIG_ARCH_VEXPRESS=y
-+
-+#
-+# Versatile Express platform type
-+#
-+CONFIG_ARCH_VEXPRESS_CORTEX_A5_A9_ERRATA=y
-+# CONFIG_ARCH_VEXPRESS_CA9X4 is not set
-+CONFIG_PLAT_VERSATILE_CLCD=y
-+CONFIG_PLAT_VERSATILE_SCHED_CLOCK=y
-+# CONFIG_ARCH_VIRT is not set
-+# CONFIG_ARCH_WM8850 is not set
-+CONFIG_ARCH_ZYNQ=y
-+CONFIG_PLAT_VERSATILE=y
-+CONFIG_ARM_TIMER_SP804=y
-+
-+#
-+# Processor Type
-+#
-+CONFIG_CPU_V7=y
-+CONFIG_CPU_32v6K=y
-+CONFIG_CPU_32v7=y
-+CONFIG_CPU_ABRT_EV7=y
-+CONFIG_CPU_PABRT_V7=y
-+CONFIG_CPU_CACHE_V7=y
-+CONFIG_CPU_CACHE_VIPT=y
-+CONFIG_CPU_COPY_V6=y
-+CONFIG_CPU_TLB_V7=y
-+CONFIG_CPU_HAS_ASID=y
-+CONFIG_CPU_CP15=y
-+CONFIG_CPU_CP15_MMU=y
-+
-+#
-+# Processor Features
-+#
-+# CONFIG_ARM_LPAE is not set
-+# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set
-+CONFIG_ARM_THUMB=y
-+# CONFIG_ARM_THUMBEE is not set
-+CONFIG_ARM_VIRT_EXT=y
-+CONFIG_SWP_EMULATE=y
-+# CONFIG_CPU_ICACHE_DISABLE is not set
-+# CONFIG_CPU_DCACHE_DISABLE is not set
-+# CONFIG_CPU_BPREDICT_DISABLE is not set
-+CONFIG_KUSER_HELPERS=y
-+CONFIG_OUTER_CACHE=y
-+CONFIG_OUTER_CACHE_SYNC=y
-+CONFIG_MIGHT_HAVE_CACHE_L2X0=y
-+CONFIG_CACHE_L2X0=y
-+CONFIG_CACHE_PL310=y
-+CONFIG_ARM_L1_CACHE_SHIFT_6=y
-+CONFIG_ARM_L1_CACHE_SHIFT=6
-+CONFIG_ARM_DMA_MEM_BUFFERABLE=y
-+CONFIG_ARM_NR_BANKS=8
-+CONFIG_MULTI_IRQ_HANDLER=y
-+# CONFIG_ARM_ERRATA_430973 is not set
-+CONFIG_PL310_ERRATA_588369=y
-+# CONFIG_ARM_ERRATA_643719 is not set
-+CONFIG_ARM_ERRATA_720789=y
-+CONFIG_PL310_ERRATA_727915=y
-+CONFIG_PL310_ERRATA_753970=y
-+CONFIG_ARM_ERRATA_754322=y
-+CONFIG_ARM_ERRATA_754327=y
-+CONFIG_ARM_ERRATA_764369=y
-+CONFIG_PL310_ERRATA_769419=y
-+CONFIG_ARM_ERRATA_775420=y
-+# CONFIG_ARM_ERRATA_798181 is not set
-+CONFIG_ICST=y
-+
-+#
-+# Bus support
-+#
-+CONFIG_ARM_AMBA=y
-+# CONFIG_PCI_SYSCALL is not set
-+# CONFIG_PCCARD is not set
-+
-+#
-+# Kernel Features
-+#
-+CONFIG_HAVE_SMP=y
-+CONFIG_SMP=y
-+CONFIG_SMP_ON_UP=y
-+CONFIG_ARM_CPU_TOPOLOGY=y
-+CONFIG_SCHED_MC=y
-+CONFIG_SCHED_SMT=y
-+CONFIG_HAVE_ARM_SCU=y
-+# CONFIG_HAVE_ARM_ARCH_TIMER is not set
-+CONFIG_HAVE_ARM_TWD=y
-+# CONFIG_MCPM is not set
-+CONFIG_VMSPLIT_3G=y
-+# CONFIG_VMSPLIT_2G is not set
-+# CONFIG_VMSPLIT_1G is not set
-+CONFIG_PAGE_OFFSET=0xC0000000
-+CONFIG_NR_CPUS=4
-+CONFIG_HOTPLUG_CPU=y
-+# CONFIG_ARM_PSCI is not set
-+CONFIG_LOCAL_TIMERS=y
-+CONFIG_ARCH_NR_GPIO=0
-+# CONFIG_PREEMPT_NONE is not set
-+# CONFIG_PREEMPT_VOLUNTARY is not set
-+CONFIG_PREEMPT=y
-+CONFIG_PREEMPT_COUNT=y
-+CONFIG_HZ=100
-+CONFIG_SCHED_HRTICK=y
-+# CONFIG_THUMB2_KERNEL is not set
-+CONFIG_AEABI=y
-+# CONFIG_OABI_COMPAT is not set
-+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
-+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
-+CONFIG_HAVE_ARCH_PFN_VALID=y
-+CONFIG_HIGHMEM=y
-+# CONFIG_HIGHPTE is not set
-+CONFIG_HW_PERF_EVENTS=y
-+CONFIG_FLATMEM=y
-+CONFIG_FLAT_NODE_MEM_MAP=y
-+CONFIG_HAVE_MEMBLOCK=y
-+CONFIG_MEMORY_ISOLATION=y
-+# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
-+CONFIG_PAGEFLAGS_EXTENDED=y
-+CONFIG_SPLIT_PTLOCK_CPUS=4
-+# CONFIG_COMPACTION is not set
-+CONFIG_MIGRATION=y
-+# CONFIG_PHYS_ADDR_T_64BIT is not set
-+CONFIG_ZONE_DMA_FLAG=0
-+CONFIG_BOUNCE=y
-+# CONFIG_KSM is not set
-+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
-+CONFIG_CROSS_MEMORY_ATTACH=y
-+# CONFIG_CLEANCACHE is not set
-+# CONFIG_FRONTSWAP is not set
-+CONFIG_FORCE_MAX_ZONEORDER=11
-+CONFIG_ALIGNMENT_TRAP=y
-+# CONFIG_UACCESS_WITH_MEMCPY is not set
-+# CONFIG_SECCOMP is not set
-+# CONFIG_CC_STACKPROTECTOR is not set
-+# CONFIG_XEN is not set
-+
-+#
-+# Boot options
-+#
-+CONFIG_USE_OF=y
-+CONFIG_ATAGS=y
-+# CONFIG_DEPRECATED_PARAM_STRUCT is not set
-+CONFIG_ZBOOT_ROM_TEXT=0x0
-+CONFIG_ZBOOT_ROM_BSS=0x0
-+# CONFIG_ARM_APPENDED_DTB is not set
-+CONFIG_CMDLINE="console=ttyPS0,115200n8 root=/dev/ram rw initrd=0x00800000,16M earlyprintk mtdparts=physmap-flash.0:512K(nor-fsbl),512K(nor-u-boot),5M(nor-linux),9M(nor-user),1M(nor-scratch),-(nor-rootfs)"
-+CONFIG_CMDLINE_FROM_BOOTLOADER=y
-+# CONFIG_CMDLINE_EXTEND is not set
-+# CONFIG_CMDLINE_FORCE is not set
-+# CONFIG_KEXEC is not set
-+# CONFIG_CRASH_DUMP is not set
-+CONFIG_AUTO_ZRELADDR=y
-+
-+#
-+# CPU Power Management
-+#
-+# CONFIG_CPU_IDLE is not set
-+# CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED is not set
-+
-+#
-+# Floating point emulation
-+#
-+
-+#
-+# At least one emulation must be selected
-+#
-+CONFIG_VFP=y
-+CONFIG_VFPv3=y
-+CONFIG_NEON=y
-+
-+#
-+# Userspace binary formats
-+#
-+CONFIG_BINFMT_ELF=y
-+CONFIG_ARCH_BINFMT_ELF_RANDOMIZE_PIE=y
-+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
-+CONFIG_BINFMT_SCRIPT=y
-+# CONFIG_HAVE_AOUT is not set
-+# CONFIG_BINFMT_MISC is not set
-+CONFIG_COREDUMP=y
-+
-+#
-+# Power management options
-+#
-+CONFIG_SUSPEND=y
-+CONFIG_SUSPEND_FREEZER=y
-+CONFIG_PM_SLEEP=y
-+CONFIG_PM_SLEEP_SMP=y
-+# CONFIG_PM_AUTOSLEEP is not set
-+# CONFIG_PM_WAKELOCKS is not set
-+CONFIG_PM_RUNTIME=y
-+CONFIG_PM=y
-+# CONFIG_PM_DEBUG is not set
-+# CONFIG_APM_EMULATION is not set
-+CONFIG_PM_CLK=y
-+CONFIG_CPU_PM=y
-+CONFIG_ARCH_SUSPEND_POSSIBLE=y
-+CONFIG_ARM_CPU_SUSPEND=y
-+CONFIG_NET=y
-+
-+#
-+# Networking options
-+#
-+CONFIG_PACKET=y
-+# CONFIG_PACKET_DIAG is not set
-+CONFIG_UNIX=y
-+# CONFIG_UNIX_DIAG is not set
-+CONFIG_XFRM=y
-+# CONFIG_XFRM_USER is not set
-+# CONFIG_XFRM_SUB_POLICY is not set
-+# CONFIG_XFRM_MIGRATE is not set
-+# CONFIG_XFRM_STATISTICS is not set
-+# CONFIG_NET_KEY is not set
-+CONFIG_INET=y
-+CONFIG_IP_MULTICAST=y
-+# CONFIG_IP_ADVANCED_ROUTER is not set
-+CONFIG_IP_PNP=y
-+CONFIG_IP_PNP_DHCP=y
-+CONFIG_IP_PNP_BOOTP=y
-+CONFIG_IP_PNP_RARP=y
-+CONFIG_NET_IPIP=y
-+# CONFIG_NET_IPGRE_DEMUX is not set
-+CONFIG_NET_IP_TUNNEL=y
-+# CONFIG_IP_MROUTE is not set
-+# CONFIG_ARPD is not set
-+# CONFIG_SYN_COOKIES is not set
-+# CONFIG_NET_IPVTI is not set
-+# CONFIG_INET_AH is not set
-+# CONFIG_INET_ESP is not set
-+# CONFIG_INET_IPCOMP is not set
-+# CONFIG_INET_XFRM_TUNNEL is not set
-+CONFIG_INET_TUNNEL=y
-+CONFIG_INET_XFRM_MODE_TRANSPORT=y
-+CONFIG_INET_XFRM_MODE_TUNNEL=y
-+CONFIG_INET_XFRM_MODE_BEET=y
-+CONFIG_INET_LRO=y
-+CONFIG_INET_DIAG=y
-+CONFIG_INET_TCP_DIAG=y
-+# CONFIG_INET_UDP_DIAG is not set
-+# CONFIG_TCP_CONG_ADVANCED is not set
-+CONFIG_TCP_CONG_CUBIC=y
-+CONFIG_DEFAULT_TCP_CONG="cubic"
-+# CONFIG_TCP_MD5SIG is not set
-+CONFIG_IPV6=y
-+# CONFIG_IPV6_PRIVACY is not set
-+# CONFIG_IPV6_ROUTER_PREF is not set
-+# CONFIG_IPV6_OPTIMISTIC_DAD is not set
-+# CONFIG_INET6_AH is not set
-+# CONFIG_INET6_ESP is not set
-+# CONFIG_INET6_IPCOMP is not set
-+# CONFIG_IPV6_MIP6 is not set
-+# CONFIG_INET6_XFRM_TUNNEL is not set
-+# CONFIG_INET6_TUNNEL is not set
-+CONFIG_INET6_XFRM_MODE_TRANSPORT=y
-+CONFIG_INET6_XFRM_MODE_TUNNEL=y
-+CONFIG_INET6_XFRM_MODE_BEET=y
-+# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
-+CONFIG_IPV6_SIT=y
-+# CONFIG_IPV6_SIT_6RD is not set
-+CONFIG_IPV6_NDISC_NODETYPE=y
-+# CONFIG_IPV6_TUNNEL is not set
-+# CONFIG_IPV6_GRE is not set
-+# CONFIG_IPV6_MULTIPLE_TABLES is not set
-+# CONFIG_IPV6_MROUTE is not set
-+# CONFIG_NETWORK_SECMARK is not set
-+# CONFIG_NETWORK_PHY_TIMESTAMPING is not set
-+# CONFIG_NETFILTER is not set
-+# CONFIG_IP_DCCP is not set
-+# CONFIG_IP_SCTP is not set
-+# CONFIG_RDS is not set
-+# CONFIG_TIPC is not set
-+# CONFIG_ATM is not set
-+# CONFIG_L2TP is not set
-+# CONFIG_BRIDGE is not set
-+CONFIG_HAVE_NET_DSA=y
-+CONFIG_VLAN_8021Q=y
-+# CONFIG_VLAN_8021Q_GVRP is not set
-+# CONFIG_VLAN_8021Q_MVRP is not set
-+# CONFIG_DECNET is not set
-+# CONFIG_LLC2 is not set
-+# CONFIG_IPX is not set
-+# CONFIG_ATALK is not set
-+# CONFIG_X25 is not set
-+# CONFIG_LAPB is not set
-+# CONFIG_PHONET is not set
-+# CONFIG_IEEE802154 is not set
-+# CONFIG_NET_SCHED is not set
-+# CONFIG_DCB is not set
-+# CONFIG_BATMAN_ADV is not set
-+# CONFIG_OPENVSWITCH is not set
-+# CONFIG_VSOCKETS is not set
-+# CONFIG_NETLINK_MMAP is not set
-+# CONFIG_NETLINK_DIAG is not set
-+CONFIG_RPS=y
-+CONFIG_RFS_ACCEL=y
-+CONFIG_XPS=y
-+CONFIG_BQL=y
-+
-+#
-+# Network testing
-+#
-+# CONFIG_NET_PKTGEN is not set
-+# CONFIG_HAMRADIO is not set
-+# CONFIG_CAN is not set
-+# CONFIG_IRDA is not set
-+# CONFIG_BT is not set
-+# CONFIG_AF_RXRPC is not set
-+CONFIG_WIRELESS=y
-+# CONFIG_CFG80211 is not set
-+# CONFIG_LIB80211 is not set
-+
-+#
-+# CFG80211 needs to be enabled for MAC80211
-+#
-+# CONFIG_WIMAX is not set
-+# CONFIG_RFKILL is not set
-+# CONFIG_NET_9P is not set
-+# CONFIG_CAIF is not set
-+# CONFIG_CEPH_LIB is not set
-+# CONFIG_NFC is not set
-+CONFIG_HAVE_BPF_JIT=y
-+
-+#
-+# Device Drivers
-+#
-+
-+#
-+# Generic Driver Options
-+#
-+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-+CONFIG_DEVTMPFS=y
-+CONFIG_DEVTMPFS_MOUNT=y
-+CONFIG_STANDALONE=y
-+CONFIG_PREVENT_FIRMWARE_BUILD=y
-+CONFIG_FW_LOADER=y
-+CONFIG_FIRMWARE_IN_KERNEL=y
-+CONFIG_EXTRA_FIRMWARE=""
-+CONFIG_FW_LOADER_USER_HELPER=y
-+# CONFIG_DEBUG_DRIVER is not set
-+# CONFIG_DEBUG_DEVRES is not set
-+# CONFIG_SYS_HYPERVISOR is not set
-+# CONFIG_GENERIC_CPU_DEVICES is not set
-+# CONFIG_DMA_SHARED_BUFFER is not set
-+CONFIG_CMA=y
-+# CONFIG_CMA_DEBUG is not set
-+
-+#
-+# Default contiguous memory area size:
-+#
-+CONFIG_CMA_SIZE_MBYTES=16
-+CONFIG_CMA_SIZE_SEL_MBYTES=y
-+# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set
-+# CONFIG_CMA_SIZE_SEL_MIN is not set
-+# CONFIG_CMA_SIZE_SEL_MAX is not set
-+CONFIG_CMA_ALIGNMENT=8
-+CONFIG_CMA_AREAS=7
-+
-+#
-+# Bus devices
-+#
-+CONFIG_CONNECTOR=y
-+CONFIG_PROC_EVENTS=y
-+CONFIG_MTD=y
-+# CONFIG_MTD_REDBOOT_PARTS is not set
-+CONFIG_MTD_CMDLINE_PARTS=y
-+# CONFIG_MTD_AFS_PARTS is not set
-+CONFIG_MTD_OF_PARTS=y
-+# CONFIG_MTD_AR7_PARTS is not set
-+
-+#
-+# User Modules And Translation Layers
-+#
-+CONFIG_MTD_BLKDEVS=y
-+CONFIG_MTD_BLOCK=y
-+# CONFIG_FTL is not set
-+# CONFIG_NFTL is not set
-+# CONFIG_INFTL is not set
-+# CONFIG_RFD_FTL is not set
-+# CONFIG_SSFDC is not set
-+# CONFIG_SM_FTL is not set
-+# CONFIG_MTD_OOPS is not set
-+# CONFIG_MTD_SWAP is not set
-+
-+#
-+# RAM/ROM/Flash chip drivers
-+#
-+CONFIG_MTD_CFI=y
-+# CONFIG_MTD_JEDECPROBE is not set
-+CONFIG_MTD_GEN_PROBE=y
-+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
-+CONFIG_MTD_MAP_BANK_WIDTH_1=y
-+CONFIG_MTD_MAP_BANK_WIDTH_2=y
-+CONFIG_MTD_MAP_BANK_WIDTH_4=y
-+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
-+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
-+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
-+CONFIG_MTD_CFI_I1=y
-+CONFIG_MTD_CFI_I2=y
-+# CONFIG_MTD_CFI_I4 is not set
-+# CONFIG_MTD_CFI_I8 is not set
-+# CONFIG_MTD_CFI_INTELEXT is not set
-+CONFIG_MTD_CFI_AMDSTD=y
-+# CONFIG_MTD_CFI_STAA is not set
-+CONFIG_MTD_CFI_UTIL=y
-+# CONFIG_MTD_RAM is not set
-+# CONFIG_MTD_ROM is not set
-+# CONFIG_MTD_ABSENT is not set
-+
-+#
-+# Mapping drivers for chip access
-+#
-+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
-+CONFIG_MTD_PHYSMAP=y
-+# CONFIG_MTD_PHYSMAP_COMPAT is not set
-+CONFIG_MTD_PHYSMAP_OF=y
-+# CONFIG_MTD_PLATRAM is not set
-+
-+#
-+# Self-contained MTD device drivers
-+#
-+# CONFIG_MTD_DATAFLASH is not set
-+CONFIG_MTD_M25P80=y
-+# CONFIG_M25PXX_USE_FAST_READ is not set
-+# CONFIG_MTD_SST25L is not set
-+# CONFIG_MTD_SLRAM is not set
-+# CONFIG_MTD_PHRAM is not set
-+# CONFIG_MTD_MTDRAM is not set
-+# CONFIG_MTD_BLOCK2MTD is not set
-+
-+#
-+# Disk-On-Chip Device Drivers
-+#
-+# CONFIG_MTD_DOCG3 is not set
-+CONFIG_MTD_NAND_ECC=y
-+# CONFIG_MTD_NAND_ECC_SMC is not set
-+CONFIG_MTD_NAND=y
-+# CONFIG_MTD_NAND_ECC_BCH is not set
-+# CONFIG_MTD_SM_COMMON is not set
-+# CONFIG_MTD_NAND_DENALI is not set
-+# CONFIG_MTD_NAND_GPIO is not set
-+CONFIG_MTD_NAND_IDS=y
-+# CONFIG_MTD_NAND_DISKONCHIP is not set
-+# CONFIG_MTD_NAND_DOCG4 is not set
-+# CONFIG_MTD_NAND_NANDSIM is not set
-+# CONFIG_MTD_NAND_PLATFORM is not set
-+# CONFIG_MTD_ALAUDA is not set
-+CONFIG_MTD_NAND_XILINX_PS=y
-+# CONFIG_MTD_ONENAND is not set
-+
-+#
-+# LPDDR flash memory drivers
-+#
-+# CONFIG_MTD_LPDDR is not set
-+# CONFIG_MTD_UBI is not set
-+CONFIG_DTC=y
-+CONFIG_OF=y
-+
-+#
-+# Device Tree and Open Firmware support
-+#
-+CONFIG_PROC_DEVICETREE=y
-+# CONFIG_OF_SELFTEST is not set
-+CONFIG_OF_FLATTREE=y
-+CONFIG_OF_EARLY_FLATTREE=y
-+CONFIG_OF_ADDRESS=y
-+CONFIG_OF_IRQ=y
-+CONFIG_OF_DEVICE=y
-+CONFIG_OF_I2C=y
-+CONFIG_OF_NET=y
-+CONFIG_OF_MDIO=y
-+CONFIG_OF_MTD=y
-+# CONFIG_PARPORT is not set
-+CONFIG_BLK_DEV=y
-+# CONFIG_BLK_DEV_COW_COMMON is not set
-+CONFIG_BLK_DEV_LOOP=y
-+CONFIG_BLK_DEV_LOOP_MIN_COUNT=8
-+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
-+# CONFIG_BLK_DEV_DRBD is not set
-+# CONFIG_BLK_DEV_NBD is not set
-+CONFIG_BLK_DEV_RAM=y
-+CONFIG_BLK_DEV_RAM_COUNT=16
-+CONFIG_BLK_DEV_RAM_SIZE=16384
-+# CONFIG_BLK_DEV_XIP is not set
-+# CONFIG_CDROM_PKTCDVD is not set
-+# CONFIG_ATA_OVER_ETH is not set
-+# CONFIG_MG_DISK is not set
-+# CONFIG_BLK_DEV_RBD is not set
-+
-+#
-+# Misc devices
-+#
-+# CONFIG_SENSORS_LIS3LV02D is not set
-+# CONFIG_AD525X_DPOT is not set
-+# CONFIG_ATMEL_PWM is not set
-+# CONFIG_DUMMY_IRQ is not set
-+# CONFIG_ICS932S401 is not set
-+# CONFIG_ATMEL_SSC is not set
-+# CONFIG_ENCLOSURE_SERVICES is not set
-+# CONFIG_APDS9802ALS is not set
-+# CONFIG_ISL29003 is not set
-+# CONFIG_ISL29020 is not set
-+# CONFIG_SENSORS_TSL2550 is not set
-+# CONFIG_SENSORS_BH1780 is not set
-+# CONFIG_SENSORS_BH1770 is not set
-+# CONFIG_SENSORS_APDS990X is not set
-+# CONFIG_HMC6352 is not set
-+# CONFIG_DS1682 is not set
-+# CONFIG_TI_DAC7512 is not set
-+# CONFIG_ARM_CHARLCD is not set
-+# CONFIG_BMP085_I2C is not set
-+# CONFIG_BMP085_SPI is not set
-+# CONFIG_USB_SWITCH_FSA9480 is not set
-+CONFIG_SI570=y
-+# CONFIG_LATTICE_ECP3_CONFIG is not set
-+CONFIG_SRAM=y
-+# CONFIG_C2PORT is not set
-+
-+#
-+# EEPROM support
-+#
-+CONFIG_EEPROM_AT24=y
-+CONFIG_EEPROM_AT25=y
-+# CONFIG_EEPROM_LEGACY is not set
-+# CONFIG_EEPROM_MAX6875 is not set
-+# CONFIG_EEPROM_93CX6 is not set
-+# CONFIG_EEPROM_93XX46 is not set
-+
-+#
-+# Texas Instruments shared transport line discipline
-+#
-+# CONFIG_TI_ST is not set
-+# CONFIG_SENSORS_LIS3_SPI is not set
-+# CONFIG_SENSORS_LIS3_I2C is not set
-+
-+#
-+# Altera FPGA firmware download module
-+#
-+# CONFIG_ALTERA_STAPL is not set
-+
-+#
-+# SCSI device support
-+#
-+CONFIG_SCSI_MOD=y
-+# CONFIG_RAID_ATTRS is not set
-+CONFIG_SCSI=y
-+CONFIG_SCSI_DMA=y
-+# CONFIG_SCSI_TGT is not set
-+# CONFIG_SCSI_NETLINK is not set
-+CONFIG_SCSI_PROC_FS=y
-+
-+#
-+# SCSI support type (disk, tape, CD-ROM)
-+#
-+CONFIG_BLK_DEV_SD=y
-+# CONFIG_CHR_DEV_ST is not set
-+# CONFIG_CHR_DEV_OSST is not set
-+# CONFIG_BLK_DEV_SR is not set
-+CONFIG_CHR_DEV_SG=y
-+# CONFIG_CHR_DEV_SCH is not set
-+CONFIG_SCSI_MULTI_LUN=y
-+# CONFIG_SCSI_CONSTANTS is not set
-+# CONFIG_SCSI_LOGGING is not set
-+# CONFIG_SCSI_SCAN_ASYNC is not set
-+
-+#
-+# SCSI Transports
-+#
-+# CONFIG_SCSI_SPI_ATTRS is not set
-+# CONFIG_SCSI_FC_ATTRS is not set
-+# CONFIG_SCSI_ISCSI_ATTRS is not set
-+# CONFIG_SCSI_SAS_ATTRS is not set
-+# CONFIG_SCSI_SAS_LIBSAS is not set
-+# CONFIG_SCSI_SRP_ATTRS is not set
-+CONFIG_SCSI_LOWLEVEL=y
-+# CONFIG_ISCSI_TCP is not set
-+# CONFIG_ISCSI_BOOT_SYSFS is not set
-+# CONFIG_SCSI_UFSHCD is not set
-+# CONFIG_LIBFC is not set
-+# CONFIG_LIBFCOE is not set
-+# CONFIG_SCSI_DEBUG is not set
-+# CONFIG_SCSI_DH is not set
-+# CONFIG_SCSI_OSD_INITIATOR is not set
-+CONFIG_HAVE_PATA_PLATFORM=y
-+# CONFIG_ATA is not set
-+# CONFIG_MD is not set
-+# CONFIG_TARGET_CORE is not set
-+CONFIG_NETDEVICES=y
-+CONFIG_NET_CORE=y
-+# CONFIG_BONDING is not set
-+# CONFIG_DUMMY is not set
-+# CONFIG_EQUALIZER is not set
-+CONFIG_MII=y
-+# CONFIG_NET_TEAM is not set
-+# CONFIG_MACVLAN is not set
-+# CONFIG_VXLAN is not set
-+# CONFIG_NETCONSOLE is not set
-+# CONFIG_NETPOLL is not set
-+# CONFIG_NET_POLL_CONTROLLER is not set
-+# CONFIG_TUN is not set
-+# CONFIG_VETH is not set
-+
-+#
-+# CAIF transport drivers
-+#
-+
-+#
-+# Distributed Switch Architecture drivers
-+#
-+# CONFIG_NET_DSA_MV88E6XXX is not set
-+# CONFIG_NET_DSA_MV88E6060 is not set
-+# CONFIG_NET_DSA_MV88E6XXX_NEED_PPU is not set
-+# CONFIG_NET_DSA_MV88E6131 is not set
-+# CONFIG_NET_DSA_MV88E6123_61_65 is not set
-+CONFIG_ETHERNET=y
-+CONFIG_NET_CADENCE=y
-+# CONFIG_ARM_AT91_ETHER is not set
-+CONFIG_MACB=y
-+CONFIG_NET_VENDOR_BROADCOM=y
-+# CONFIG_B44 is not set
-+# CONFIG_NET_CALXEDA_XGMAC is not set
-+# CONFIG_NET_VENDOR_CIRRUS is not set
-+# CONFIG_DM9000 is not set
-+# CONFIG_DNET is not set
-+# CONFIG_NET_VENDOR_FARADAY is not set
-+CONFIG_NET_VENDOR_INTEL=y
-+CONFIG_NET_VENDOR_I825XX=y
-+# CONFIG_NET_VENDOR_MARVELL is not set
-+# CONFIG_NET_VENDOR_MICREL is not set
-+# CONFIG_NET_VENDOR_MICROCHIP is not set
-+# CONFIG_NET_VENDOR_NATSEMI is not set
-+# CONFIG_ETHOC is not set
-+# CONFIG_NET_VENDOR_SEEQ is not set
-+# CONFIG_NET_VENDOR_SMSC is not set
-+# CONFIG_NET_VENDOR_STMICRO is not set
-+# CONFIG_NET_VENDOR_WIZNET is not set
-+CONFIG_NET_VENDOR_XILINX=y
-+CONFIG_XILINX_EMACLITE=y
-+CONFIG_XILINX_AXI_EMAC=y
-+CONFIG_XILINX_PS_EMAC=y
-+# CONFIG_XILINX_PS_EMAC_HWTSTAMP is not set
-+CONFIG_PHYLIB=y
-+
-+#
-+# MII PHY device drivers
-+#
-+# CONFIG_AT803X_PHY is not set
-+# CONFIG_AMD_PHY is not set
-+CONFIG_MARVELL_PHY=y
-+# CONFIG_DAVICOM_PHY is not set
-+# CONFIG_QSEMI_PHY is not set
-+# CONFIG_LXT_PHY is not set
-+# CONFIG_CICADA_PHY is not set
-+CONFIG_VITESSE_PHY=y
-+# CONFIG_SMSC_PHY is not set
-+# CONFIG_BROADCOM_PHY is not set
-+# CONFIG_BCM87XX_PHY is not set
-+# CONFIG_ICPLUS_PHY is not set
-+# CONFIG_REALTEK_PHY is not set
-+# CONFIG_NATIONAL_PHY is not set
-+# CONFIG_STE10XP is not set
-+# CONFIG_LSI_ET1011C_PHY is not set
-+# CONFIG_MICREL_PHY is not set
-+# CONFIG_FIXED_PHY is not set
-+CONFIG_MDIO_BITBANG=y
-+# CONFIG_MDIO_GPIO is not set
-+# CONFIG_MDIO_BUS_MUX_GPIO is not set
-+# CONFIG_MDIO_BUS_MUX_MMIOREG is not set
-+# CONFIG_MICREL_KS8995MA is not set
-+# CONFIG_PPP is not set
-+# CONFIG_SLIP is not set
-+
-+#
-+# USB Network Adapters
-+#
-+# CONFIG_USB_CATC is not set
-+# CONFIG_USB_KAWETH is not set
-+# CONFIG_USB_PEGASUS is not set
-+# CONFIG_USB_RTL8150 is not set
-+# CONFIG_USB_RTL8152 is not set
-+# CONFIG_USB_USBNET is not set
-+# CONFIG_USB_IPHETH is not set
-+CONFIG_WLAN=y
-+# CONFIG_USB_ZD1201 is not set
-+# CONFIG_HOSTAP is not set
-+# CONFIG_WL_TI is not set
-+
-+#
-+# Enable WiMAX (Networking options) to see the WiMAX drivers
-+#
-+# CONFIG_WAN is not set
-+# CONFIG_ISDN is not set
-+
-+#
-+# Input device support
-+#
-+CONFIG_INPUT=y
-+# CONFIG_INPUT_FF_MEMLESS is not set
-+# CONFIG_INPUT_POLLDEV is not set
-+CONFIG_INPUT_SPARSEKMAP=y
-+# CONFIG_INPUT_MATRIXKMAP is not set
-+
-+#
-+# Userland interfaces
-+#
-+CONFIG_INPUT_MOUSEDEV=y
-+CONFIG_INPUT_MOUSEDEV_PSAUX=y
-+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
-+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
-+# CONFIG_INPUT_JOYDEV is not set
-+CONFIG_INPUT_EVDEV=y
-+# CONFIG_INPUT_EVBUG is not set
-+
-+#
-+# Input Device Drivers
-+#
-+CONFIG_INPUT_KEYBOARD=y
-+# CONFIG_KEYBOARD_ADP5588 is not set
-+# CONFIG_KEYBOARD_ADP5589 is not set
-+CONFIG_KEYBOARD_ATKBD=y
-+# CONFIG_KEYBOARD_QT1070 is not set
-+# CONFIG_KEYBOARD_QT2160 is not set
-+# CONFIG_KEYBOARD_LKKBD is not set
-+# CONFIG_KEYBOARD_GPIO is not set
-+# CONFIG_KEYBOARD_TCA6416 is not set
-+# CONFIG_KEYBOARD_TCA8418 is not set
-+# CONFIG_KEYBOARD_MATRIX is not set
-+# CONFIG_KEYBOARD_LM8333 is not set
-+# CONFIG_KEYBOARD_MAX7359 is not set
-+# CONFIG_KEYBOARD_MCS is not set
-+# CONFIG_KEYBOARD_MPR121 is not set
-+# CONFIG_KEYBOARD_NEWTON is not set
-+# CONFIG_KEYBOARD_OPENCORES is not set
-+# CONFIG_KEYBOARD_SAMSUNG is not set
-+# CONFIG_KEYBOARD_STOWAWAY is not set
-+# CONFIG_KEYBOARD_SUNKBD is not set
-+# CONFIG_KEYBOARD_XTKBD is not set
-+CONFIG_INPUT_MOUSE=y
-+CONFIG_MOUSE_PS2=y
-+CONFIG_MOUSE_PS2_ALPS=y
-+CONFIG_MOUSE_PS2_LOGIPS2PP=y
-+CONFIG_MOUSE_PS2_SYNAPTICS=y
-+CONFIG_MOUSE_PS2_CYPRESS=y
-+CONFIG_MOUSE_PS2_TRACKPOINT=y
-+# CONFIG_MOUSE_PS2_ELANTECH is not set
-+# CONFIG_MOUSE_PS2_SENTELIC is not set
-+# CONFIG_MOUSE_PS2_TOUCHKIT is not set
-+# CONFIG_MOUSE_SERIAL is not set
-+# CONFIG_MOUSE_APPLETOUCH is not set
-+# CONFIG_MOUSE_BCM5974 is not set
-+# CONFIG_MOUSE_CYAPA is not set
-+# CONFIG_MOUSE_VSXXXAA is not set
-+# CONFIG_MOUSE_GPIO is not set
-+# CONFIG_MOUSE_SYNAPTICS_I2C is not set
-+# CONFIG_MOUSE_SYNAPTICS_USB is not set
-+# CONFIG_INPUT_JOYSTICK is not set
-+# CONFIG_INPUT_TABLET is not set
-+# CONFIG_INPUT_TOUCHSCREEN is not set
-+# CONFIG_INPUT_MISC is not set
-+
-+#
-+# Hardware I/O ports
-+#
-+CONFIG_SERIO=y
-+CONFIG_SERIO_SERPORT=y
-+# CONFIG_SERIO_AMBAKMI is not set
-+CONFIG_SERIO_LIBPS2=y
-+# CONFIG_SERIO_RAW is not set
-+# CONFIG_SERIO_ALTERA_PS2 is not set
-+# CONFIG_SERIO_PS2MULT is not set
-+# CONFIG_SERIO_ARC_PS2 is not set
-+# CONFIG_SERIO_APBPS2 is not set
-+# CONFIG_GAMEPORT is not set
-+
-+#
-+# Character devices
-+#
-+CONFIG_TTY=y
-+CONFIG_VT=y
-+CONFIG_CONSOLE_TRANSLATIONS=y
-+CONFIG_VT_CONSOLE=y
-+CONFIG_VT_CONSOLE_SLEEP=y
-+CONFIG_HW_CONSOLE=y
-+CONFIG_VT_HW_CONSOLE_BINDING=y
-+CONFIG_UNIX98_PTYS=y
-+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
-+# CONFIG_LEGACY_PTYS is not set
-+# CONFIG_SERIAL_NONSTANDARD is not set
-+# CONFIG_N_GSM is not set
-+# CONFIG_TRACE_SINK is not set
-+# CONFIG_DEVKMEM is not set
-+
-+#
-+# Serial drivers
-+#
-+# CONFIG_SERIAL_8250 is not set
-+
-+#
-+# Non-8250 serial port support
-+#
-+# CONFIG_SERIAL_AMBA_PL010 is not set
-+# CONFIG_SERIAL_AMBA_PL011 is not set
-+# CONFIG_SERIAL_MAX3100 is not set
-+# CONFIG_SERIAL_MAX310X is not set
-+CONFIG_SERIAL_CORE=y
-+CONFIG_SERIAL_CORE_CONSOLE=y
-+# CONFIG_SERIAL_SCCNXP is not set
-+# CONFIG_SERIAL_TIMBERDALE is not set
-+# CONFIG_SERIAL_ALTERA_JTAGUART is not set
-+# CONFIG_SERIAL_ALTERA_UART is not set
-+# CONFIG_SERIAL_IFX6X60 is not set
-+CONFIG_SERIAL_XILINX_PS_UART=y
-+CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y
-+# CONFIG_SERIAL_ARC is not set
-+# CONFIG_TTY_PRINTK is not set
-+# CONFIG_HVC_DCC is not set
-+# CONFIG_IPMI_HANDLER is not set
-+# CONFIG_HW_RANDOM is not set
-+# CONFIG_R3964 is not set
-+# CONFIG_RAW_DRIVER is not set
-+# CONFIG_TCG_TPM is not set
-+CONFIG_I2C=y
-+CONFIG_I2C_BOARDINFO=y
-+CONFIG_I2C_COMPAT=y
-+CONFIG_I2C_CHARDEV=y
-+CONFIG_I2C_MUX=y
-+
-+#
-+# Multiplexer I2C Chip support
-+#
-+# CONFIG_I2C_ARB_GPIO_CHALLENGE is not set
-+# CONFIG_I2C_MUX_GPIO is not set
-+# CONFIG_I2C_MUX_PCA9541 is not set
-+CONFIG_I2C_MUX_PCA954x=y
-+CONFIG_I2C_HELPER_AUTO=y
-+
-+#
-+# I2C Hardware Bus support
-+#
-+
-+#
-+# I2C system bus drivers (mostly embedded / system-on-chip)
-+#
-+# CONFIG_I2C_CBUS_GPIO is not set
-+# CONFIG_I2C_DESIGNWARE_PLATFORM is not set
-+# CONFIG_I2C_GPIO is not set
-+# CONFIG_I2C_NOMADIK is not set
-+# CONFIG_I2C_OCORES is not set
-+# CONFIG_I2C_PCA_PLATFORM is not set
-+# CONFIG_I2C_PXA_PCI is not set
-+# CONFIG_I2C_SIMTEC is not set
-+# CONFIG_I2C_VERSATILE is not set
-+CONFIG_I2C_XILINX_PS=y
-+CONFIG_I2C_XILINX=y
-+
-+#
-+# External I2C/SMBus adapter drivers
-+#
-+# CONFIG_I2C_DIOLAN_U2C is not set
-+# CONFIG_I2C_PARPORT_LIGHT is not set
-+# CONFIG_I2C_TAOS_EVM is not set
-+# CONFIG_I2C_TINY_USB is not set
-+
-+#
-+# Other I2C/SMBus bus drivers
-+#
-+# CONFIG_I2C_DEBUG_CORE is not set
-+# CONFIG_I2C_DEBUG_ALGO is not set
-+# CONFIG_I2C_DEBUG_BUS is not set
-+CONFIG_SPI=y
-+# CONFIG_SPI_DEBUG is not set
-+CONFIG_SPI_MASTER=y
-+
-+#
-+# SPI Master Controller Drivers
-+#
-+# CONFIG_SPI_ALTERA is not set
-+CONFIG_SPI_BITBANG=y
-+# CONFIG_SPI_GPIO is not set
-+# CONFIG_SPI_FSL_SPI is not set
-+# CONFIG_SPI_OC_TINY is not set
-+# CONFIG_SPI_PL022 is not set
-+# CONFIG_SPI_PXA2XX_PCI is not set
-+# CONFIG_SPI_SC18IS602 is not set
-+# CONFIG_SPI_XCOMM is not set
-+CONFIG_SPI_XILINX=y
-+CONFIG_SPI_XILINX_PS_QSPI=y
-+# CONFIG_SPI_XILINX_PS_QSPI_DUAL_STACKED is not set
-+CONFIG_SPI_XILINX_PS_SPI=y
-+# CONFIG_SPI_DESIGNWARE is not set
-+
-+#
-+# SPI Protocol Masters
-+#
-+# CONFIG_SPI_SPIDEV is not set
-+# CONFIG_SPI_TLE62X0 is not set
-+
-+#
-+# Qualcomm MSM SSBI bus support
-+#
-+# CONFIG_SSBI is not set
-+# CONFIG_HSI is not set
-+
-+#
-+# PPS support
-+#
-+CONFIG_PPS=y
-+# CONFIG_PPS_DEBUG is not set
-+
-+#
-+# PPS clients support
-+#
-+# CONFIG_PPS_CLIENT_KTIMER is not set
-+# CONFIG_PPS_CLIENT_LDISC is not set
-+# CONFIG_PPS_CLIENT_GPIO is not set
-+
-+#
-+# PPS generators support
-+#
-+
-+#
-+# PTP clock support
-+#
-+CONFIG_PTP_1588_CLOCK=y
-+
-+#
-+# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks.
-+#
-+# CONFIG_PTP_1588_CLOCK_PCH is not set
-+CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
-+CONFIG_ARCH_REQUIRE_GPIOLIB=y
-+CONFIG_GPIO_DEVRES=y
-+CONFIG_GPIOLIB=y
-+CONFIG_OF_GPIO=y
-+# CONFIG_DEBUG_GPIO is not set
-+CONFIG_GPIO_SYSFS=y
-+
-+#
-+# Memory mapped GPIO drivers:
-+#
-+# CONFIG_GPIO_GENERIC_PLATFORM is not set
-+# CONFIG_GPIO_EM is not set
-+# CONFIG_GPIO_PL061 is not set
-+# CONFIG_GPIO_RCAR is not set
-+# CONFIG_GPIO_TS5500 is not set
-+CONFIG_GPIO_XILINX=y
-+CONFIG_GPIO_XILINX_PS=y
-+# CONFIG_GPIO_GRGPIO is not set
-+
-+#
-+# I2C GPIO expanders:
-+#
-+# CONFIG_GPIO_MAX7300 is not set
-+# CONFIG_GPIO_MAX732X is not set
-+# CONFIG_GPIO_PCF857X is not set
-+# CONFIG_GPIO_SX150X is not set
-+# CONFIG_GPIO_ADP5588 is not set
-+# CONFIG_GPIO_ADNP is not set
-+
-+#
-+# PCI GPIO expanders:
-+#
-+
-+#
-+# SPI GPIO expanders:
-+#
-+# CONFIG_GPIO_MAX7301 is not set
-+# CONFIG_GPIO_MCP23S08 is not set
-+# CONFIG_GPIO_MC33880 is not set
-+# CONFIG_GPIO_74X164 is not set
-+
-+#
-+# AC97 GPIO expanders:
-+#
-+
-+#
-+# MODULbus GPIO expanders:
-+#
-+
-+#
-+# USB GPIO expanders:
-+#
-+# CONFIG_W1 is not set
-+CONFIG_POWER_SUPPLY=y
-+# CONFIG_POWER_SUPPLY_DEBUG is not set
-+# CONFIG_PDA_POWER is not set
-+# CONFIG_TEST_POWER is not set
-+# CONFIG_BATTERY_DS2780 is not set
-+# CONFIG_BATTERY_DS2781 is not set
-+# CONFIG_BATTERY_DS2782 is not set
-+# CONFIG_BATTERY_SBS is not set
-+# CONFIG_BATTERY_BQ27x00 is not set
-+# CONFIG_BATTERY_MAX17040 is not set
-+# CONFIG_BATTERY_MAX17042 is not set
-+# CONFIG_CHARGER_ISP1704 is not set
-+# CONFIG_CHARGER_MAX8903 is not set
-+# CONFIG_CHARGER_LP8727 is not set
-+# CONFIG_CHARGER_GPIO is not set
-+# CONFIG_CHARGER_BQ2415X is not set
-+# CONFIG_CHARGER_SMB347 is not set
-+# CONFIG_BATTERY_GOLDFISH is not set
-+CONFIG_POWER_RESET=y
-+# CONFIG_POWER_RESET_GPIO is not set
-+# CONFIG_POWER_RESET_RESTART is not set
-+CONFIG_POWER_RESET_VEXPRESS=y
-+# CONFIG_POWER_AVS is not set
-+CONFIG_HWMON=y
-+# CONFIG_HWMON_VID is not set
-+# CONFIG_HWMON_DEBUG_CHIP is not set
-+
-+#
-+# Native drivers
-+#
-+# CONFIG_SENSORS_AD7314 is not set
-+# CONFIG_SENSORS_AD7414 is not set
-+# CONFIG_SENSORS_AD7418 is not set
-+# CONFIG_SENSORS_ADCXX is not set
-+# CONFIG_SENSORS_ADM1021 is not set
-+# CONFIG_SENSORS_ADM1025 is not set
-+# CONFIG_SENSORS_ADM1026 is not set
-+# CONFIG_SENSORS_ADM1029 is not set
-+# CONFIG_SENSORS_ADM1031 is not set
-+# CONFIG_SENSORS_ADM9240 is not set
-+# CONFIG_SENSORS_ADT7310 is not set
-+# CONFIG_SENSORS_ADT7410 is not set
-+# CONFIG_SENSORS_ADT7411 is not set
-+# CONFIG_SENSORS_ADT7462 is not set
-+# CONFIG_SENSORS_ADT7470 is not set
-+# CONFIG_SENSORS_ADT7475 is not set
-+# CONFIG_SENSORS_ASC7621 is not set
-+# CONFIG_SENSORS_ATXP1 is not set
-+# CONFIG_SENSORS_DS620 is not set
-+# CONFIG_SENSORS_DS1621 is not set
-+# CONFIG_SENSORS_F71805F is not set
-+# CONFIG_SENSORS_F71882FG is not set
-+# CONFIG_SENSORS_F75375S is not set
-+# CONFIG_SENSORS_G760A is not set
-+# CONFIG_SENSORS_GL518SM is not set
-+# CONFIG_SENSORS_GL520SM is not set
-+# CONFIG_SENSORS_GPIO_FAN is not set
-+# CONFIG_SENSORS_HIH6130 is not set
-+# CONFIG_SENSORS_IT87 is not set
-+# CONFIG_SENSORS_JC42 is not set
-+# CONFIG_SENSORS_LINEAGE is not set
-+# CONFIG_SENSORS_LM63 is not set
-+# CONFIG_SENSORS_LM70 is not set
-+# CONFIG_SENSORS_LM73 is not set
-+# CONFIG_SENSORS_LM75 is not set
-+# CONFIG_SENSORS_LM77 is not set
-+# CONFIG_SENSORS_LM78 is not set
-+# CONFIG_SENSORS_LM80 is not set
-+# CONFIG_SENSORS_LM83 is not set
-+# CONFIG_SENSORS_LM85 is not set
-+# CONFIG_SENSORS_LM87 is not set
-+# CONFIG_SENSORS_LM90 is not set
-+# CONFIG_SENSORS_LM92 is not set
-+# CONFIG_SENSORS_LM93 is not set
-+# CONFIG_SENSORS_LTC4151 is not set
-+# CONFIG_SENSORS_LTC4215 is not set
-+# CONFIG_SENSORS_LTC4245 is not set
-+# CONFIG_SENSORS_LTC4261 is not set
-+# CONFIG_SENSORS_LM95234 is not set
-+# CONFIG_SENSORS_LM95241 is not set
-+# CONFIG_SENSORS_LM95245 is not set
-+# CONFIG_SENSORS_MAX1111 is not set
-+# CONFIG_SENSORS_MAX16065 is not set
-+# CONFIG_SENSORS_MAX1619 is not set
-+# CONFIG_SENSORS_MAX1668 is not set
-+# CONFIG_SENSORS_MAX197 is not set
-+# CONFIG_SENSORS_MAX6639 is not set
-+# CONFIG_SENSORS_MAX6642 is not set
-+# CONFIG_SENSORS_MAX6650 is not set
-+# CONFIG_SENSORS_MAX6697 is not set
-+# CONFIG_SENSORS_MCP3021 is not set
-+# CONFIG_SENSORS_NCT6775 is not set
-+# CONFIG_SENSORS_PC87360 is not set
-+# CONFIG_SENSORS_PC87427 is not set
-+# CONFIG_SENSORS_PCF8591 is not set
-+# CONFIG_PMBUS is not set
-+# CONFIG_SENSORS_SHT15 is not set
-+# CONFIG_SENSORS_SHT21 is not set
-+# CONFIG_SENSORS_SMM665 is not set
-+# CONFIG_SENSORS_DME1737 is not set
-+# CONFIG_SENSORS_EMC1403 is not set
-+# CONFIG_SENSORS_EMC2103 is not set
-+# CONFIG_SENSORS_EMC6W201 is not set
-+# CONFIG_SENSORS_SMSC47M1 is not set
-+# CONFIG_SENSORS_SMSC47M192 is not set
-+# CONFIG_SENSORS_SMSC47B397 is not set
-+# CONFIG_SENSORS_SCH56XX_COMMON is not set
-+# CONFIG_SENSORS_SCH5627 is not set
-+# CONFIG_SENSORS_SCH5636 is not set
-+# CONFIG_SENSORS_ADS1015 is not set
-+# CONFIG_SENSORS_ADS7828 is not set
-+# CONFIG_SENSORS_ADS7871 is not set
-+# CONFIG_SENSORS_AMC6821 is not set
-+# CONFIG_SENSORS_INA209 is not set
-+# CONFIG_SENSORS_INA2XX is not set
-+# CONFIG_SENSORS_THMC50 is not set
-+# CONFIG_SENSORS_TMP102 is not set
-+# CONFIG_SENSORS_TMP401 is not set
-+# CONFIG_SENSORS_TMP421 is not set
-+# CONFIG_SENSORS_VEXPRESS is not set
-+# CONFIG_SENSORS_VT1211 is not set
-+# CONFIG_SENSORS_W83781D is not set
-+# CONFIG_SENSORS_W83791D is not set
-+# CONFIG_SENSORS_W83792D is not set
-+# CONFIG_SENSORS_W83793 is not set
-+# CONFIG_SENSORS_W83795 is not set
-+# CONFIG_SENSORS_W83L785TS is not set
-+# CONFIG_SENSORS_W83L786NG is not set
-+# CONFIG_SENSORS_W83627HF is not set
-+# CONFIG_SENSORS_W83627EHF is not set
-+# CONFIG_THERMAL is not set
-+CONFIG_WATCHDOG=y
-+CONFIG_WATCHDOG_CORE=y
-+# CONFIG_WATCHDOG_NOWAYOUT is not set
-+
-+#
-+# Watchdog Device Drivers
-+#
-+# CONFIG_SOFT_WATCHDOG is not set
-+# CONFIG_ARM_SP805_WATCHDOG is not set
-+# CONFIG_DW_WATCHDOG is not set
-+CONFIG_MPCORE_WATCHDOG=y
-+CONFIG_XILINX_PS_WATCHDOG=y
-+# CONFIG_MAX63XX_WATCHDOG is not set
-+CONFIG_XILINX_WATCHDOG=y
-+
-+#
-+# USB-based Watchdog Cards
-+#
-+# CONFIG_USBPCWATCHDOG is not set
-+CONFIG_SSB_POSSIBLE=y
-+
-+#
-+# Sonics Silicon Backplane
-+#
-+# CONFIG_SSB is not set
-+CONFIG_BCMA_POSSIBLE=y
-+
-+#
-+# Broadcom specific AMBA
-+#
-+# CONFIG_BCMA is not set
-+
-+#
-+# Multifunction device drivers
-+#
-+# CONFIG_MFD_CORE is not set
-+# CONFIG_MFD_AS3711 is not set
-+# CONFIG_PMIC_ADP5520 is not set
-+# CONFIG_MFD_AAT2870_CORE is not set
-+# CONFIG_MFD_CROS_EC is not set
-+# CONFIG_MFD_ASIC3 is not set
-+# CONFIG_PMIC_DA903X is not set
-+# CONFIG_MFD_DA9052_SPI is not set
-+# CONFIG_MFD_DA9052_I2C is not set
-+# CONFIG_MFD_DA9055 is not set
-+# CONFIG_MFD_MC13XXX_SPI is not set
-+# CONFIG_MFD_MC13XXX_I2C is not set
-+# CONFIG_HTC_EGPIO is not set
-+# CONFIG_HTC_PASIC3 is not set
-+# CONFIG_HTC_I2CPLD is not set
-+# CONFIG_MFD_88PM800 is not set
-+# CONFIG_MFD_88PM805 is not set
-+# CONFIG_MFD_88PM860X is not set
-+# CONFIG_MFD_MAX77686 is not set
-+# CONFIG_MFD_MAX77693 is not set
-+# CONFIG_MFD_MAX8907 is not set
-+# CONFIG_MFD_MAX8925 is not set
-+# CONFIG_MFD_MAX8997 is not set
-+# CONFIG_MFD_MAX8998 is not set
-+# CONFIG_EZX_PCAP is not set
-+# CONFIG_MFD_VIPERBOARD is not set
-+# CONFIG_MFD_RETU is not set
-+# CONFIG_MFD_PCF50633 is not set
-+# CONFIG_MFD_RC5T583 is not set
-+# CONFIG_MFD_SEC_CORE is not set
-+# CONFIG_MFD_SI476X_CORE is not set
-+# CONFIG_MFD_SM501 is not set
-+# CONFIG_MFD_SMSC is not set
-+# CONFIG_ABX500_CORE is not set
-+# CONFIG_MFD_STMPE is not set
-+# CONFIG_MFD_SYSCON is not set
-+# CONFIG_MFD_TI_AM335X_TSCADC is not set
-+# CONFIG_MFD_LP8788 is not set
-+# CONFIG_MFD_PALMAS is not set
-+# CONFIG_TPS6105X is not set
-+# CONFIG_TPS65010 is not set
-+# CONFIG_TPS6507X is not set
-+# CONFIG_MFD_TPS65090 is not set
-+# CONFIG_MFD_TPS65217 is not set
-+# CONFIG_MFD_TPS6586X is not set
-+# CONFIG_MFD_TPS65910 is not set
-+# CONFIG_MFD_TPS65912 is not set
-+# CONFIG_MFD_TPS65912_I2C is not set
-+# CONFIG_MFD_TPS65912_SPI is not set
-+# CONFIG_MFD_TPS80031 is not set
-+# CONFIG_TWL4030_CORE is not set
-+# CONFIG_TWL6040_CORE is not set
-+# CONFIG_MFD_WL1273_CORE is not set
-+# CONFIG_MFD_LM3533 is not set
-+# CONFIG_MFD_TC3589X is not set
-+# CONFIG_MFD_TMIO is not set
-+# CONFIG_MFD_T7L66XB is not set
-+# CONFIG_MFD_TC6387XB is not set
-+# CONFIG_MFD_TC6393XB is not set
-+# CONFIG_MFD_ARIZONA_I2C is not set
-+# CONFIG_MFD_ARIZONA_SPI is not set
-+# CONFIG_MFD_WM8400 is not set
-+# CONFIG_MFD_WM831X_I2C is not set
-+# CONFIG_MFD_WM831X_SPI is not set
-+# CONFIG_MFD_WM8350_I2C is not set
-+# CONFIG_MFD_WM8994 is not set
-+CONFIG_VEXPRESS_CONFIG=y
-+# CONFIG_REGULATOR is not set
-+CONFIG_MEDIA_SUPPORT=y
-+
-+#
-+# Multimedia core support
-+#
-+# CONFIG_MEDIA_CAMERA_SUPPORT is not set
-+# CONFIG_MEDIA_ANALOG_TV_SUPPORT is not set
-+# CONFIG_MEDIA_DIGITAL_TV_SUPPORT is not set
-+# CONFIG_MEDIA_RADIO_SUPPORT is not set
-+# CONFIG_MEDIA_RC_SUPPORT is not set
-+# CONFIG_VIDEO_ADV_DEBUG is not set
-+# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
-+# CONFIG_TTPCI_EEPROM is not set
-+
-+#
-+# Media drivers
-+#
-+# CONFIG_MEDIA_USB_SUPPORT is not set
-+
-+#
-+# Supported MMC/SDIO adapters
-+#
-+# CONFIG_CYPRESS_FIRMWARE is not set
-+
-+#
-+# Media ancillary drivers (tuners, sensors, i2c, frontends)
-+#
-+
-+#
-+# Customise DVB Frontends
-+#
-+# CONFIG_DVB_TUNER_DIB0070 is not set
-+# CONFIG_DVB_TUNER_DIB0090 is not set
-+
-+#
-+# Tools to develop new frontends
-+#
-+# CONFIG_DVB_DUMMY_FE is not set
-+
-+#
-+# Graphics support
-+#
-+# CONFIG_DRM is not set
-+# CONFIG_TEGRA_HOST1X is not set
-+# CONFIG_VGASTATE is not set
-+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
-+CONFIG_FB=y
-+# CONFIG_FIRMWARE_EDID is not set
-+# CONFIG_FB_DDC is not set
-+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
-+# CONFIG_FB_CFB_FILLRECT is not set
-+# CONFIG_FB_CFB_COPYAREA is not set
-+# CONFIG_FB_CFB_IMAGEBLIT is not set
-+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
-+# CONFIG_FB_SYS_FILLRECT is not set
-+# CONFIG_FB_SYS_COPYAREA is not set
-+# CONFIG_FB_SYS_IMAGEBLIT is not set
-+# CONFIG_FB_FOREIGN_ENDIAN is not set
-+# CONFIG_FB_SYS_FOPS is not set
-+# CONFIG_FB_SVGALIB is not set
-+# CONFIG_FB_MACMODES is not set
-+# CONFIG_FB_BACKLIGHT is not set
-+# CONFIG_FB_MODE_HELPERS is not set
-+# CONFIG_FB_TILEBLITTING is not set
-+
-+#
-+# Frame buffer hardware drivers
-+#
-+# CONFIG_FB_ARMCLCD is not set
-+# CONFIG_FB_UVESA is not set
-+# CONFIG_FB_S1D13XXX is not set
-+# CONFIG_FB_SMSCUFX is not set
-+# CONFIG_FB_UDL is not set
-+# CONFIG_FB_GOLDFISH is not set
-+# CONFIG_FB_VIRTUAL is not set
-+# CONFIG_FB_METRONOME is not set
-+# CONFIG_FB_BROADSHEET is not set
-+# CONFIG_FB_AUO_K190X is not set
-+# CONFIG_FB_SIMPLE is not set
-+# CONFIG_EXYNOS_VIDEO is not set
-+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
-+
-+#
-+# Console display driver support
-+#
-+CONFIG_DUMMY_CONSOLE=y
-+CONFIG_FRAMEBUFFER_CONSOLE=y
-+# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
-+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
-+CONFIG_FONTS=y
-+CONFIG_FONT_8x8=y
-+CONFIG_FONT_8x16=y
-+# CONFIG_FONT_6x11 is not set
-+# CONFIG_FONT_7x14 is not set
-+# CONFIG_FONT_PEARL_8x8 is not set
-+# CONFIG_FONT_ACORN_8x8 is not set
-+# CONFIG_FONT_MINI_4x6 is not set
-+# CONFIG_FONT_SUN8x16 is not set
-+# CONFIG_FONT_SUN12x22 is not set
-+# CONFIG_FONT_10x18 is not set
-+# CONFIG_LOGO is not set
-+# CONFIG_FB_SSD1307 is not set
-+# CONFIG_SOUND is not set
-+
-+#
-+# HID support
-+#
-+CONFIG_HID=y
-+# CONFIG_HID_BATTERY_STRENGTH is not set
-+# CONFIG_HIDRAW is not set
-+# CONFIG_UHID is not set
-+CONFIG_HID_GENERIC=y
-+
-+#
-+# Special HID drivers
-+#
-+# CONFIG_HID_A4TECH is not set
-+# CONFIG_HID_ACRUX is not set
-+# CONFIG_HID_APPLE is not set
-+# CONFIG_HID_APPLEIR is not set
-+# CONFIG_HID_AUREAL is not set
-+# CONFIG_HID_BELKIN is not set
-+# CONFIG_HID_CHERRY is not set
-+# CONFIG_HID_CHICONY is not set
-+# CONFIG_HID_CYPRESS is not set
-+# CONFIG_HID_DRAGONRISE is not set
-+# CONFIG_HID_EMS_FF is not set
-+# CONFIG_HID_ELECOM is not set
-+# CONFIG_HID_EZKEY is not set
-+# CONFIG_HID_HOLTEK is not set
-+# CONFIG_HID_KEYTOUCH is not set
-+# CONFIG_HID_KYE is not set
-+# CONFIG_HID_UCLOGIC is not set
-+# CONFIG_HID_WALTOP is not set
-+# CONFIG_HID_GYRATION is not set
-+# CONFIG_HID_ICADE is not set
-+# CONFIG_HID_TWINHAN is not set
-+# CONFIG_HID_KENSINGTON is not set
-+# CONFIG_HID_LCPOWER is not set
-+# CONFIG_HID_LENOVO_TPKBD is not set
-+# CONFIG_HID_LOGITECH is not set
-+# CONFIG_HID_MAGICMOUSE is not set
-+CONFIG_HID_MICROSOFT=y
-+# CONFIG_HID_MONTEREY is not set
-+# CONFIG_HID_MULTITOUCH is not set
-+# CONFIG_HID_NTRIG is not set
-+# CONFIG_HID_ORTEK is not set
-+# CONFIG_HID_PANTHERLORD is not set
-+# CONFIG_HID_PETALYNX is not set
-+# CONFIG_HID_PICOLCD is not set
-+# CONFIG_HID_PRIMAX is not set
-+# CONFIG_HID_PS3REMOTE is not set
-+# CONFIG_HID_ROCCAT is not set
-+# CONFIG_HID_SAITEK is not set
-+# CONFIG_HID_SAMSUNG is not set
-+# CONFIG_HID_SONY is not set
-+# CONFIG_HID_SPEEDLINK is not set
-+# CONFIG_HID_STEELSERIES is not set
-+# CONFIG_HID_SUNPLUS is not set
-+# CONFIG_HID_GREENASIA is not set
-+# CONFIG_HID_SMARTJOYPLUS is not set
-+# CONFIG_HID_TIVO is not set
-+# CONFIG_HID_TOPSEED is not set
-+# CONFIG_HID_THRUSTMASTER is not set
-+# CONFIG_HID_ZEROPLUS is not set
-+# CONFIG_HID_ZYDACRON is not set
-+# CONFIG_HID_SENSOR_HUB is not set
-+
-+#
-+# USB HID support
-+#
-+CONFIG_USB_HID=y
-+# CONFIG_HID_PID is not set
-+# CONFIG_USB_HIDDEV is not set
-+
-+#
-+# I2C HID support
-+#
-+# CONFIG_I2C_HID is not set
-+# CONFIG_USB_ARCH_HAS_OHCI is not set
-+CONFIG_USB_ARCH_HAS_EHCI=y
-+# CONFIG_USB_ARCH_HAS_XHCI is not set
-+CONFIG_USB_SUPPORT=y
-+CONFIG_USB_COMMON=y
-+CONFIG_USB_ARCH_HAS_HCD=y
-+CONFIG_USB=y
-+# CONFIG_USB_DEBUG is not set
-+# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
-+
-+#
-+# Miscellaneous USB options
-+#
-+CONFIG_USB_DEFAULT_PERSIST=y
-+# CONFIG_USB_DYNAMIC_MINORS is not set
-+CONFIG_USB_OTG=y
-+# CONFIG_USB_OTG_WHITELIST is not set
-+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
-+# CONFIG_USB_MON is not set
-+# CONFIG_USB_WUSB_CBAF is not set
-+
-+#
-+# USB Host Controller Drivers
-+#
-+# CONFIG_USB_C67X00_HCD is not set
-+CONFIG_USB_EHCI_HCD=y
-+CONFIG_USB_EHCI_ROOT_HUB_TT=y
-+# CONFIG_USB_EHCI_TT_NEWSCHED is not set
-+CONFIG_USB_XUSBPS_DR_OF=y
-+CONFIG_USB_EHCI_XUSBPS=y
-+# CONFIG_USB_EHCI_HCD_PLATFORM is not set
-+# CONFIG_USB_OXU210HP_HCD is not set
-+# CONFIG_USB_ISP116X_HCD is not set
-+# CONFIG_USB_ISP1760_HCD is not set
-+# CONFIG_USB_ISP1362_HCD is not set
-+# CONFIG_USB_SL811_HCD is not set
-+# CONFIG_USB_R8A66597_HCD is not set
-+# CONFIG_USB_MUSB_HDRC is not set
-+# CONFIG_USB_RENESAS_USBHS is not set
-+
-+#
-+# USB Device Class drivers
-+#
-+# CONFIG_USB_ACM is not set
-+# CONFIG_USB_PRINTER is not set
-+# CONFIG_USB_WDM is not set
-+# CONFIG_USB_TMC is not set
-+
-+#
-+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
-+#
-+
-+#
-+# also be needed; see USB_STORAGE Help for more info
-+#
-+CONFIG_USB_STORAGE=y
-+# CONFIG_USB_STORAGE_DEBUG is not set
-+# CONFIG_USB_STORAGE_REALTEK is not set
-+# CONFIG_USB_STORAGE_DATAFAB is not set
-+# CONFIG_USB_STORAGE_FREECOM is not set
-+# CONFIG_USB_STORAGE_ISD200 is not set
-+# CONFIG_USB_STORAGE_USBAT is not set
-+# CONFIG_USB_STORAGE_SDDR09 is not set
-+# CONFIG_USB_STORAGE_SDDR55 is not set
-+# CONFIG_USB_STORAGE_JUMPSHOT is not set
-+# CONFIG_USB_STORAGE_ALAUDA is not set
-+# CONFIG_USB_STORAGE_ONETOUCH is not set
-+# CONFIG_USB_STORAGE_KARMA is not set
-+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
-+# CONFIG_USB_STORAGE_ENE_UB6250 is not set
-+
-+#
-+# USB Imaging devices
-+#
-+# CONFIG_USB_MDC800 is not set
-+# CONFIG_USB_MICROTEK is not set
-+# CONFIG_USB_DWC3 is not set
-+# CONFIG_USB_CHIPIDEA is not set
-+
-+#
-+# USB port drivers
-+#
-+# CONFIG_USB_SERIAL is not set
-+
-+#
-+# USB Miscellaneous drivers
-+#
-+# CONFIG_USB_EMI62 is not set
-+# CONFIG_USB_EMI26 is not set
-+# CONFIG_USB_ADUTUX is not set
-+# CONFIG_USB_SEVSEG is not set
-+# CONFIG_USB_RIO500 is not set
-+# CONFIG_USB_LEGOTOWER is not set
-+# CONFIG_USB_LCD is not set
-+# CONFIG_USB_LED is not set
-+# CONFIG_USB_CYPRESS_CY7C63 is not set
-+# CONFIG_USB_CYTHERM is not set
-+# CONFIG_USB_IDMOUSE is not set
-+# CONFIG_USB_FTDI_ELAN is not set
-+# CONFIG_USB_APPLEDISPLAY is not set
-+# CONFIG_USB_SISUSBVGA is not set
-+# CONFIG_USB_LD is not set
-+# CONFIG_USB_TRANCEVIBRATOR is not set
-+# CONFIG_USB_IOWARRIOR is not set
-+# CONFIG_USB_TEST is not set
-+# CONFIG_USB_ISIGHTFW is not set
-+# CONFIG_USB_YUREX is not set
-+# CONFIG_USB_EZUSB_FX2 is not set
-+# CONFIG_USB_HSIC_USB3503 is not set
-+CONFIG_USB_PHY=y
-+# CONFIG_NOP_USB_XCEIV is not set
-+# CONFIG_OMAP_CONTROL_USB is not set
-+# CONFIG_OMAP_USB3 is not set
-+# CONFIG_SAMSUNG_USBPHY is not set
-+# CONFIG_SAMSUNG_USB2PHY is not set
-+# CONFIG_SAMSUNG_USB3PHY is not set
-+# CONFIG_USB_GPIO_VBUS is not set
-+# CONFIG_USB_ISP1301 is not set
-+# CONFIG_USB_RCAR_PHY is not set
-+CONFIG_USB_ULPI=y
-+CONFIG_USB_ULPI_VIEWPORT=y
-+CONFIG_USB_GADGET=y
-+# CONFIG_USB_GADGET_DEBUG is not set
-+# CONFIG_USB_GADGET_DEBUG_FILES is not set
-+# CONFIG_USB_GADGET_DEBUG_FS is not set
-+CONFIG_USB_GADGET_VBUS_DRAW=2
-+CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2
-+
-+#
-+# USB Peripheral Controller
-+#
-+# CONFIG_USB_FUSB300 is not set
-+# CONFIG_USB_R8A66597 is not set
-+# CONFIG_USB_PXA27X is not set
-+# CONFIG_USB_MV_UDC is not set
-+# CONFIG_USB_MV_U3D is not set
-+# CONFIG_USB_M66592 is not set
-+# CONFIG_USB_NET2272 is not set
-+# CONFIG_USB_DUMMY_HCD is not set
-+CONFIG_USB_LIBCOMPOSITE=y
-+# CONFIG_USB_ZERO is not set
-+CONFIG_USB_ETH=y
-+CONFIG_USB_ETH_RNDIS=y
-+# CONFIG_USB_ETH_EEM is not set
-+# CONFIG_USB_G_NCM is not set
-+# CONFIG_USB_GADGETFS is not set
-+# CONFIG_USB_FUNCTIONFS is not set
-+# CONFIG_USB_MASS_STORAGE is not set
-+# CONFIG_USB_G_SERIAL is not set
-+# CONFIG_USB_G_PRINTER is not set
-+# CONFIG_USB_CDC_COMPOSITE is not set
-+# CONFIG_USB_G_ACM_MS is not set
-+# CONFIG_USB_G_MULTI is not set
-+# CONFIG_USB_G_HID is not set
-+# CONFIG_USB_G_DBGP is not set
-+CONFIG_MMC=y
-+# CONFIG_MMC_DEBUG is not set
-+# CONFIG_MMC_UNSAFE_RESUME is not set
-+# CONFIG_MMC_CLKGATE is not set
-+
-+#
-+# MMC/SD/SDIO Card Drivers
-+#
-+CONFIG_MMC_BLOCK=y
-+CONFIG_MMC_BLOCK_MINORS=8
-+CONFIG_MMC_BLOCK_BOUNCE=y
-+# CONFIG_SDIO_UART is not set
-+# CONFIG_MMC_TEST is not set
-+
-+#
-+# MMC/SD/SDIO Host Controller Drivers
-+#
-+# CONFIG_MMC_ARMMMCI is not set
-+CONFIG_MMC_SDHCI=y
-+CONFIG_MMC_SDHCI_PLTFM=y
-+CONFIG_MMC_SDHCI_OF_ARASAN=y
-+# CONFIG_MMC_SDHCI_PXAV3 is not set
-+# CONFIG_MMC_SDHCI_PXAV2 is not set
-+# CONFIG_MMC_DW is not set
-+# CONFIG_MMC_VUB300 is not set
-+# CONFIG_MMC_USHC is not set
-+# CONFIG_MEMSTICK is not set
-+# CONFIG_NEW_LEDS is not set
-+# CONFIG_ACCESSIBILITY is not set
-+CONFIG_EDAC=y
-+CONFIG_EDAC_LEGACY_SYSFS=y
-+# CONFIG_EDAC_DEBUG is not set
-+CONFIG_EDAC_MM_EDAC=y
-+CONFIG_RTC_LIB=y
-+CONFIG_RTC_CLASS=y
-+CONFIG_RTC_HCTOSYS=y
-+CONFIG_RTC_SYSTOHC=y
-+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
-+# CONFIG_RTC_DEBUG is not set
-+
-+#
-+# RTC interfaces
-+#
-+CONFIG_RTC_INTF_SYSFS=y
-+CONFIG_RTC_INTF_PROC=y
-+CONFIG_RTC_INTF_DEV=y
-+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
-+# CONFIG_RTC_DRV_TEST is not set
-+
-+#
-+# I2C RTC drivers
-+#
-+# CONFIG_RTC_DRV_DS1307 is not set
-+# CONFIG_RTC_DRV_DS1374 is not set
-+# CONFIG_RTC_DRV_DS1672 is not set
-+# CONFIG_RTC_DRV_DS3232 is not set
-+# CONFIG_RTC_DRV_MAX6900 is not set
-+# CONFIG_RTC_DRV_RS5C372 is not set
-+# CONFIG_RTC_DRV_ISL1208 is not set
-+# CONFIG_RTC_DRV_ISL12022 is not set
-+# CONFIG_RTC_DRV_X1205 is not set
-+# CONFIG_RTC_DRV_PCF8523 is not set
-+CONFIG_RTC_DRV_PCF8563=y
-+# CONFIG_RTC_DRV_PCF8583 is not set
-+# CONFIG_RTC_DRV_M41T80 is not set
-+# CONFIG_RTC_DRV_BQ32K is not set
-+# CONFIG_RTC_DRV_S35390A is not set
-+# CONFIG_RTC_DRV_FM3130 is not set
-+# CONFIG_RTC_DRV_RX8581 is not set
-+# CONFIG_RTC_DRV_RX8025 is not set
-+# CONFIG_RTC_DRV_EM3027 is not set
-+# CONFIG_RTC_DRV_RV3029C2 is not set
-+
-+#
-+# SPI RTC drivers
-+#
-+# CONFIG_RTC_DRV_M41T93 is not set
-+# CONFIG_RTC_DRV_M41T94 is not set
-+# CONFIG_RTC_DRV_DS1305 is not set
-+# CONFIG_RTC_DRV_DS1390 is not set
-+# CONFIG_RTC_DRV_MAX6902 is not set
-+# CONFIG_RTC_DRV_R9701 is not set
-+# CONFIG_RTC_DRV_RS5C348 is not set
-+# CONFIG_RTC_DRV_DS3234 is not set
-+# CONFIG_RTC_DRV_PCF2123 is not set
-+# CONFIG_RTC_DRV_RX4581 is not set
-+
-+#
-+# Platform RTC drivers
-+#
-+# CONFIG_RTC_DRV_CMOS is not set
-+# CONFIG_RTC_DRV_DS1286 is not set
-+# CONFIG_RTC_DRV_DS1511 is not set
-+# CONFIG_RTC_DRV_DS1553 is not set
-+# CONFIG_RTC_DRV_DS1742 is not set
-+# CONFIG_RTC_DRV_STK17TA8 is not set
-+# CONFIG_RTC_DRV_M48T86 is not set
-+# CONFIG_RTC_DRV_M48T35 is not set
-+# CONFIG_RTC_DRV_M48T59 is not set
-+# CONFIG_RTC_DRV_MSM6242 is not set
-+# CONFIG_RTC_DRV_BQ4802 is not set
-+# CONFIG_RTC_DRV_RP5C01 is not set
-+# CONFIG_RTC_DRV_V3020 is not set
-+# CONFIG_RTC_DRV_DS2404 is not set
-+
-+#
-+# on-CPU RTC drivers
-+#
-+# CONFIG_RTC_DRV_PL030 is not set
-+# CONFIG_RTC_DRV_PL031 is not set
-+# CONFIG_RTC_DRV_SNVS is not set
-+
-+#
-+# HID Sensor RTC drivers
-+#
-+# CONFIG_RTC_DRV_HID_SENSOR_TIME is not set
-+CONFIG_DMADEVICES=y
-+# CONFIG_DMADEVICES_DEBUG is not set
-+
-+#
-+# DMA Devices
-+#
-+# CONFIG_AMBA_PL08X is not set
-+# CONFIG_DW_DMAC is not set
-+# CONFIG_TIMB_DMA is not set
-+CONFIG_PL330_DMA=y
-+CONFIG_DMA_ENGINE=y
-+CONFIG_DMA_OF=y
-+
-+#
-+# DMA Clients
-+#
-+# CONFIG_NET_DMA is not set
-+# CONFIG_ASYNC_TX_DMA is not set
-+# CONFIG_DMATEST is not set
-+# CONFIG_AUXDISPLAY is not set
-+CONFIG_UIO=y
-+# CONFIG_UIO_PDRV is not set
-+CONFIG_UIO_PDRV_GENIRQ=y
-+# CONFIG_UIO_DMEM_GENIRQ is not set
-+# CONFIG_VIRT_DRIVERS is not set
-+
-+#
-+# Virtio drivers
-+#
-+# CONFIG_VIRTIO_MMIO is not set
-+
-+#
-+# Microsoft Hyper-V guest support
-+#
-+# CONFIG_STAGING is not set
-+CONFIG_CLKDEV_LOOKUP=y
-+CONFIG_HAVE_CLK_PREPARE=y
-+CONFIG_COMMON_CLK=y
-+
-+#
-+# Common Clock Framework
-+#
-+CONFIG_COMMON_CLK_DEBUG=y
-+CONFIG_COMMON_CLK_VERSATILE=y
-+# CONFIG_COMMON_CLK_SI5351 is not set
-+# CONFIG_COMMON_CLK_AXI_CLKGEN is not set
-+
-+#
-+# Hardware Spinlock drivers
-+#
-+CONFIG_CLKSRC_OF=y
-+CONFIG_CLKSRC_MMIO=y
-+CONFIG_CADENCE_TTC_TIMER=y
-+# CONFIG_MAILBOX is not set
-+CONFIG_IOMMU_SUPPORT=y
-+CONFIG_OF_IOMMU=y
-+
-+#
-+# Remoteproc drivers
-+#
-+# CONFIG_STE_MODEM_RPROC is not set
-+
-+#
-+# Rpmsg drivers
-+#
-+# CONFIG_PM_DEVFREQ is not set
-+# CONFIG_EXTCON is not set
-+CONFIG_MEMORY=y
-+# CONFIG_IIO is not set
-+# CONFIG_PWM is not set
-+CONFIG_IRQCHIP=y
-+CONFIG_ARM_GIC=y
-+# CONFIG_IPACK_BUS is not set
-+# CONFIG_RESET_CONTROLLER is not set
-+
-+#
-+# File systems
-+#
-+CONFIG_DCACHE_WORD_ACCESS=y
-+CONFIG_EXT2_FS=y
-+# CONFIG_EXT2_FS_XATTR is not set
-+# CONFIG_EXT2_FS_XIP is not set
-+CONFIG_EXT3_FS=y
-+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
-+CONFIG_EXT3_FS_XATTR=y
-+# CONFIG_EXT3_FS_POSIX_ACL is not set
-+# CONFIG_EXT3_FS_SECURITY is not set
-+CONFIG_EXT4_FS=y
-+# CONFIG_EXT4_FS_POSIX_ACL is not set
-+# CONFIG_EXT4_FS_SECURITY is not set
-+# CONFIG_EXT4_DEBUG is not set
-+CONFIG_JBD=y
-+# CONFIG_JBD_DEBUG is not set
-+CONFIG_JBD2=y
-+# CONFIG_JBD2_DEBUG is not set
-+CONFIG_FS_MBCACHE=y
-+# CONFIG_REISERFS_FS is not set
-+# CONFIG_JFS_FS is not set
-+# CONFIG_XFS_FS is not set
-+# CONFIG_GFS2_FS is not set
-+# CONFIG_OCFS2_FS is not set
-+# CONFIG_BTRFS_FS is not set
-+# CONFIG_NILFS2_FS is not set
-+# CONFIG_FS_POSIX_ACL is not set
-+CONFIG_FILE_LOCKING=y
-+CONFIG_FSNOTIFY=y
-+# CONFIG_DNOTIFY is not set
-+CONFIG_INOTIFY_USER=y
-+# CONFIG_FANOTIFY is not set
-+# CONFIG_QUOTA is not set
-+# CONFIG_QUOTACTL is not set
-+# CONFIG_AUTOFS4_FS is not set
-+# CONFIG_FUSE_FS is not set
-+
-+#
-+# Caches
-+#
-+# CONFIG_FSCACHE is not set
-+
-+#
-+# CD-ROM/DVD Filesystems
-+#
-+# CONFIG_ISO9660_FS is not set
-+# CONFIG_UDF_FS is not set
-+
-+#
-+# DOS/FAT/NT Filesystems
-+#
-+CONFIG_FAT_FS=y
-+CONFIG_MSDOS_FS=y
-+CONFIG_VFAT_FS=y
-+CONFIG_FAT_DEFAULT_CODEPAGE=437
-+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
-+# CONFIG_NTFS_FS is not set
-+
-+#
-+# Pseudo filesystems
-+#
-+CONFIG_PROC_FS=y
-+CONFIG_PROC_SYSCTL=y
-+CONFIG_PROC_PAGE_MONITOR=y
-+CONFIG_SYSFS=y
-+CONFIG_TMPFS=y
-+# CONFIG_TMPFS_POSIX_ACL is not set
-+# CONFIG_TMPFS_XATTR is not set
-+# CONFIG_HUGETLB_PAGE is not set
-+CONFIG_CONFIGFS_FS=y
-+CONFIG_MISC_FILESYSTEMS=y
-+# CONFIG_ADFS_FS is not set
-+# CONFIG_AFFS_FS is not set
-+# CONFIG_HFS_FS is not set
-+# CONFIG_HFSPLUS_FS is not set
-+# CONFIG_BEFS_FS is not set
-+# CONFIG_BFS_FS is not set
-+# CONFIG_EFS_FS is not set
-+CONFIG_JFFS2_FS=y
-+CONFIG_JFFS2_FS_DEBUG=0
-+CONFIG_JFFS2_FS_WRITEBUFFER=y
-+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
-+CONFIG_JFFS2_SUMMARY=y
-+# CONFIG_JFFS2_FS_XATTR is not set
-+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
-+CONFIG_JFFS2_ZLIB=y
-+# CONFIG_JFFS2_LZO is not set
-+CONFIG_JFFS2_RTIME=y
-+# CONFIG_JFFS2_RUBIN is not set
-+# CONFIG_LOGFS is not set
-+# CONFIG_CRAMFS is not set
-+# CONFIG_SQUASHFS is not set
-+# CONFIG_VXFS_FS is not set
-+# CONFIG_MINIX_FS is not set
-+# CONFIG_OMFS_FS is not set
-+# CONFIG_HPFS_FS is not set
-+# CONFIG_QNX4FS_FS is not set
-+# CONFIG_QNX6FS_FS is not set
-+# CONFIG_ROMFS_FS is not set
-+# CONFIG_PSTORE is not set
-+# CONFIG_SYSV_FS is not set
-+# CONFIG_UFS_FS is not set
-+# CONFIG_F2FS_FS is not set
-+CONFIG_NETWORK_FILESYSTEMS=y
-+CONFIG_NFS_FS=y
-+CONFIG_NFS_V2=y
-+CONFIG_NFS_V3=y
-+# CONFIG_NFS_V3_ACL is not set
-+# CONFIG_NFS_V4 is not set
-+# CONFIG_NFS_SWAP is not set
-+CONFIG_ROOT_NFS=y
-+# CONFIG_NFSD is not set
-+CONFIG_LOCKD=y
-+CONFIG_LOCKD_V4=y
-+CONFIG_NFS_COMMON=y
-+CONFIG_SUNRPC=y
-+# CONFIG_SUNRPC_DEBUG is not set
-+# CONFIG_CEPH_FS is not set
-+# CONFIG_CIFS is not set
-+# CONFIG_NCP_FS is not set
-+# CONFIG_CODA_FS is not set
-+# CONFIG_AFS_FS is not set
-+CONFIG_NLS=y
-+CONFIG_NLS_DEFAULT="iso8859-1"
-+CONFIG_NLS_CODEPAGE_437=y
-+# CONFIG_NLS_CODEPAGE_737 is not set
-+# CONFIG_NLS_CODEPAGE_775 is not set
-+# CONFIG_NLS_CODEPAGE_850 is not set
-+# CONFIG_NLS_CODEPAGE_852 is not set
-+# CONFIG_NLS_CODEPAGE_855 is not set
-+# CONFIG_NLS_CODEPAGE_857 is not set
-+# CONFIG_NLS_CODEPAGE_860 is not set
-+# CONFIG_NLS_CODEPAGE_861 is not set
-+# CONFIG_NLS_CODEPAGE_862 is not set
-+# CONFIG_NLS_CODEPAGE_863 is not set
-+# CONFIG_NLS_CODEPAGE_864 is not set
-+# CONFIG_NLS_CODEPAGE_865 is not set
-+# CONFIG_NLS_CODEPAGE_866 is not set
-+# CONFIG_NLS_CODEPAGE_869 is not set
-+# CONFIG_NLS_CODEPAGE_936 is not set
-+# CONFIG_NLS_CODEPAGE_950 is not set
-+# CONFIG_NLS_CODEPAGE_932 is not set
-+# CONFIG_NLS_CODEPAGE_949 is not set
-+# CONFIG_NLS_CODEPAGE_874 is not set
-+# CONFIG_NLS_ISO8859_8 is not set
-+# CONFIG_NLS_CODEPAGE_1250 is not set
-+# CONFIG_NLS_CODEPAGE_1251 is not set
-+CONFIG_NLS_ASCII=y
-+CONFIG_NLS_ISO8859_1=y
-+# CONFIG_NLS_ISO8859_2 is not set
-+# CONFIG_NLS_ISO8859_3 is not set
-+# CONFIG_NLS_ISO8859_4 is not set
-+# CONFIG_NLS_ISO8859_5 is not set
-+# CONFIG_NLS_ISO8859_6 is not set
-+# CONFIG_NLS_ISO8859_7 is not set
-+# CONFIG_NLS_ISO8859_9 is not set
-+# CONFIG_NLS_ISO8859_13 is not set
-+# CONFIG_NLS_ISO8859_14 is not set
-+# CONFIG_NLS_ISO8859_15 is not set
-+# CONFIG_NLS_KOI8_R is not set
-+# CONFIG_NLS_KOI8_U is not set
-+# CONFIG_NLS_MAC_ROMAN is not set
-+# CONFIG_NLS_MAC_CELTIC is not set
-+# CONFIG_NLS_MAC_CENTEURO is not set
-+# CONFIG_NLS_MAC_CROATIAN is not set
-+# CONFIG_NLS_MAC_CYRILLIC is not set
-+# CONFIG_NLS_MAC_GAELIC is not set
-+# CONFIG_NLS_MAC_GREEK is not set
-+# CONFIG_NLS_MAC_ICELAND is not set
-+# CONFIG_NLS_MAC_INUIT is not set
-+# CONFIG_NLS_MAC_ROMANIAN is not set
-+# CONFIG_NLS_MAC_TURKISH is not set
-+# CONFIG_NLS_UTF8 is not set
-+# CONFIG_DLM is not set
-+
-+#
-+# Kernel hacking
-+#
-+# CONFIG_PRINTK_TIME is not set
-+CONFIG_DEFAULT_MESSAGE_LOGLEVEL=4
-+# CONFIG_ENABLE_WARN_DEPRECATED is not set
-+# CONFIG_ENABLE_MUST_CHECK is not set
-+CONFIG_FRAME_WARN=1024
-+# CONFIG_MAGIC_SYSRQ is not set
-+# CONFIG_STRIP_ASM_SYMS is not set
-+# CONFIG_READABLE_ASM is not set
-+# CONFIG_UNUSED_SYMBOLS is not set
-+CONFIG_DEBUG_FS=y
-+# CONFIG_HEADERS_CHECK is not set
-+# CONFIG_DEBUG_SECTION_MISMATCH is not set
-+CONFIG_DEBUG_KERNEL=y
-+# CONFIG_DEBUG_SHIRQ is not set
-+# CONFIG_LOCKUP_DETECTOR is not set
-+# CONFIG_PANIC_ON_OOPS is not set
-+CONFIG_PANIC_ON_OOPS_VALUE=0
-+# CONFIG_DETECT_HUNG_TASK is not set
-+# CONFIG_SCHED_DEBUG is not set
-+# CONFIG_SCHEDSTATS is not set
-+CONFIG_TIMER_STATS=y
-+# CONFIG_DEBUG_OBJECTS is not set
-+# CONFIG_DEBUG_SLAB is not set
-+CONFIG_HAVE_DEBUG_KMEMLEAK=y
-+# CONFIG_DEBUG_KMEMLEAK is not set
-+# CONFIG_DEBUG_PREEMPT is not set
-+# CONFIG_DEBUG_RT_MUTEXES is not set
-+# CONFIG_RT_MUTEX_TESTER is not set
-+# CONFIG_DEBUG_SPINLOCK is not set
-+# CONFIG_DEBUG_MUTEXES is not set
-+# CONFIG_DEBUG_LOCK_ALLOC is not set
-+# CONFIG_PROVE_LOCKING is not set
-+# CONFIG_LOCK_STAT is not set
-+# CONFIG_DEBUG_ATOMIC_SLEEP is not set
-+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
-+# CONFIG_DEBUG_STACK_USAGE is not set
-+# CONFIG_DEBUG_KOBJECT is not set
-+# CONFIG_DEBUG_HIGHMEM is not set
-+# CONFIG_DEBUG_BUGVERBOSE is not set
-+# CONFIG_DEBUG_INFO is not set
-+# CONFIG_DEBUG_VM is not set
-+# CONFIG_DEBUG_WRITECOUNT is not set
-+# CONFIG_DEBUG_MEMORY_INIT is not set
-+# CONFIG_DEBUG_LIST is not set
-+# CONFIG_TEST_LIST_SORT is not set
-+# CONFIG_DEBUG_SG is not set
-+# CONFIG_DEBUG_NOTIFIERS is not set
-+# CONFIG_DEBUG_CREDENTIALS is not set
-+# CONFIG_BOOT_PRINTK_DELAY is not set
-+
-+#
-+# RCU Debugging
-+#
-+# CONFIG_PROVE_RCU_DELAY is not set
-+# CONFIG_SPARSE_RCU_POINTER is not set
-+# CONFIG_RCU_TORTURE_TEST is not set
-+CONFIG_RCU_CPU_STALL_TIMEOUT=60
-+# CONFIG_RCU_CPU_STALL_VERBOSE is not set
-+# CONFIG_RCU_CPU_STALL_INFO is not set
-+# CONFIG_RCU_TRACE is not set
-+# CONFIG_BACKTRACE_SELF_TEST is not set
-+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
-+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
-+# CONFIG_DEBUG_PER_CPU_MAPS is not set
-+# CONFIG_LKDTM is not set
-+# CONFIG_NOTIFIER_ERROR_INJECTION is not set
-+# CONFIG_FAULT_INJECTION is not set
-+# CONFIG_DEBUG_PAGEALLOC is not set
-+CONFIG_HAVE_FUNCTION_TRACER=y
-+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
-+CONFIG_HAVE_DYNAMIC_FTRACE=y
-+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
-+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
-+CONFIG_HAVE_C_RECORDMCOUNT=y
-+CONFIG_TRACING_SUPPORT=y
-+# CONFIG_FTRACE is not set
-+CONFIG_DYNAMIC_DEBUG=y
-+# CONFIG_DMA_API_DEBUG is not set
-+# CONFIG_ATOMIC64_SELFTEST is not set
-+# CONFIG_SAMPLES is not set
-+CONFIG_HAVE_ARCH_KGDB=y
-+# CONFIG_KGDB is not set
-+# CONFIG_TEST_STRING_HELPERS is not set
-+# CONFIG_TEST_KSTRTOX is not set
-+# CONFIG_STRICT_DEVMEM is not set
-+CONFIG_ARM_UNWIND=y
-+# CONFIG_DEBUG_USER is not set
-+CONFIG_DEBUG_LL=y
-+# CONFIG_DEBUG_ZYNQ_UART0 is not set
-+CONFIG_DEBUG_ZYNQ_UART1=y
-+# CONFIG_DEBUG_VEXPRESS_UART0_DETECT is not set
-+# CONFIG_DEBUG_VEXPRESS_UART0_CA9 is not set
-+# CONFIG_DEBUG_VEXPRESS_UART0_RS1 is not set
-+# CONFIG_DEBUG_ICEDCC is not set
-+# CONFIG_DEBUG_SEMIHOSTING is not set
-+CONFIG_DEBUG_LL_INCLUDE="debug/zynq.S"
-+CONFIG_DEBUG_UNCOMPRESS=y
-+CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h"
-+CONFIG_EARLY_PRINTK=y
-+# CONFIG_OC_ETM is not set
-+# CONFIG_PID_IN_CONTEXTIDR is not set
-+
-+#
-+# Security options
-+#
-+# CONFIG_KEYS is not set
-+# CONFIG_SECURITY_DMESG_RESTRICT is not set
-+# CONFIG_SECURITY is not set
-+# CONFIG_SECURITYFS is not set
-+CONFIG_DEFAULT_SECURITY_DAC=y
-+CONFIG_DEFAULT_SECURITY=""
-+CONFIG_CRYPTO=y
-+
-+#
-+# Crypto core or helper
-+#
-+# CONFIG_CRYPTO_FIPS is not set
-+CONFIG_CRYPTO_ALGAPI=y
-+CONFIG_CRYPTO_ALGAPI2=y
-+CONFIG_CRYPTO_HASH=y
-+CONFIG_CRYPTO_HASH2=y
-+CONFIG_CRYPTO_RNG=y
-+CONFIG_CRYPTO_RNG2=y
-+# CONFIG_CRYPTO_MANAGER is not set
-+# CONFIG_CRYPTO_MANAGER2 is not set
-+# CONFIG_CRYPTO_USER is not set
-+# CONFIG_CRYPTO_GF128MUL is not set
-+# CONFIG_CRYPTO_NULL is not set
-+# CONFIG_CRYPTO_PCRYPT is not set
-+# CONFIG_CRYPTO_CRYPTD is not set
-+# CONFIG_CRYPTO_AUTHENC is not set
-+
-+#
-+# Authenticated Encryption with Associated Data
-+#
-+# CONFIG_CRYPTO_CCM is not set
-+# CONFIG_CRYPTO_GCM is not set
-+# CONFIG_CRYPTO_SEQIV is not set
-+
-+#
-+# Block modes
-+#
-+# CONFIG_CRYPTO_CBC is not set
-+# CONFIG_CRYPTO_CTR is not set
-+# CONFIG_CRYPTO_CTS is not set
-+# CONFIG_CRYPTO_ECB is not set
-+# CONFIG_CRYPTO_LRW is not set
-+# CONFIG_CRYPTO_PCBC is not set
-+# CONFIG_CRYPTO_XTS is not set
-+
-+#
-+# Hash modes
-+#
-+# CONFIG_CRYPTO_CMAC is not set
-+# CONFIG_CRYPTO_HMAC is not set
-+# CONFIG_CRYPTO_XCBC is not set
-+# CONFIG_CRYPTO_VMAC is not set
-+
-+#
-+# Digest
-+#
-+CONFIG_CRYPTO_CRC32C=y
-+# CONFIG_CRYPTO_CRC32 is not set
-+# CONFIG_CRYPTO_GHASH is not set
-+# CONFIG_CRYPTO_MD4 is not set
-+# CONFIG_CRYPTO_MD5 is not set
-+# CONFIG_CRYPTO_MICHAEL_MIC is not set
-+# CONFIG_CRYPTO_RMD128 is not set
-+# CONFIG_CRYPTO_RMD160 is not set
-+# CONFIG_CRYPTO_RMD256 is not set
-+# CONFIG_CRYPTO_RMD320 is not set
-+# CONFIG_CRYPTO_SHA1 is not set
-+# CONFIG_CRYPTO_SHA1_ARM is not set
-+# CONFIG_CRYPTO_SHA256 is not set
-+# CONFIG_CRYPTO_SHA512 is not set
-+# CONFIG_CRYPTO_TGR192 is not set
-+# CONFIG_CRYPTO_WP512 is not set
-+
-+#
-+# Ciphers
-+#
-+CONFIG_CRYPTO_AES=y
-+# CONFIG_CRYPTO_AES_ARM is not set
-+# CONFIG_CRYPTO_ANUBIS is not set
-+# CONFIG_CRYPTO_ARC4 is not set
-+# CONFIG_CRYPTO_BLOWFISH is not set
-+# CONFIG_CRYPTO_CAMELLIA is not set
-+# CONFIG_CRYPTO_CAST5 is not set
-+# CONFIG_CRYPTO_CAST6 is not set
-+# CONFIG_CRYPTO_DES is not set
-+# CONFIG_CRYPTO_FCRYPT is not set
-+# CONFIG_CRYPTO_KHAZAD is not set
-+# CONFIG_CRYPTO_SALSA20 is not set
-+# CONFIG_CRYPTO_SEED is not set
-+# CONFIG_CRYPTO_SERPENT is not set
-+# CONFIG_CRYPTO_TEA is not set
-+# CONFIG_CRYPTO_TWOFISH is not set
-+
-+#
-+# Compression
-+#
-+# CONFIG_CRYPTO_DEFLATE is not set
-+# CONFIG_CRYPTO_ZLIB is not set
-+# CONFIG_CRYPTO_LZO is not set
-+
-+#
-+# Random Number Generation
-+#
-+CONFIG_CRYPTO_ANSI_CPRNG=y
-+# CONFIG_CRYPTO_USER_API_HASH is not set
-+# CONFIG_CRYPTO_USER_API_SKCIPHER is not set
-+CONFIG_CRYPTO_HW=y
-+# CONFIG_BINARY_PRINTF is not set
-+
-+#
-+# Library routines
-+#
-+CONFIG_BITREVERSE=y
-+CONFIG_GENERIC_STRNCPY_FROM_USER=y
-+CONFIG_GENERIC_STRNLEN_USER=y
-+CONFIG_GENERIC_PCI_IOMAP=y
-+CONFIG_GENERIC_IO=y
-+# CONFIG_CRC_CCITT is not set
-+CONFIG_CRC16=y
-+# CONFIG_CRC_T10DIF is not set
-+# CONFIG_CRC_ITU_T is not set
-+CONFIG_CRC32=y
-+# CONFIG_CRC32_SELFTEST is not set
-+CONFIG_CRC32_SLICEBY8=y
-+# CONFIG_CRC32_SLICEBY4 is not set
-+# CONFIG_CRC32_SARWATE is not set
-+# CONFIG_CRC32_BIT is not set
-+# CONFIG_CRC7 is not set
-+# CONFIG_LIBCRC32C is not set
-+# CONFIG_CRC8 is not set
-+CONFIG_ZLIB_INFLATE=y
-+CONFIG_ZLIB_DEFLATE=y
-+# CONFIG_XZ_DEC is not set
-+# CONFIG_XZ_DEC_BCJ is not set
-+CONFIG_DECOMPRESS_GZIP=y
-+CONFIG_GENERIC_ALLOCATOR=y
-+CONFIG_HAS_IOMEM=y
-+CONFIG_HAS_DMA=y
-+CONFIG_CPU_RMAP=y
-+CONFIG_DQL=y
-+CONFIG_NLATTR=y
-+CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y
-+# CONFIG_AVERAGE is not set
-+# CONFIG_CORDIC is not set
-+# CONFIG_DDR is not set
-+CONFIG_VIRTUALIZATION=y
-+CONFIG_KVM_ARM_MAX_VCPUS=0
-+
-+#
-+# Virtio drivers
-+#
diff --git a/patches.zynq/0013-tty-xuartps-Remove-suspend-resume-functions.patch b/patches.zynq/0013-tty-xuartps-Remove-suspend-resume-functions.patch
deleted file mode 100644
index 4d78520adf59c..0000000000000
--- a/patches.zynq/0013-tty-xuartps-Remove-suspend-resume-functions.patch
+++ /dev/null
@@ -1,70 +0,0 @@
-From 664379fd28a8af165267f4d322a1bf250c8228c2 Mon Sep 17 00:00:00 2001
-From: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Date: Mon, 13 May 2013 10:46:35 -0700
-Subject: tty: xuartps: Remove suspend/resume functions
-
-Currently Zynq does not support suspend/resume.
-The driver callbacks are never used or tested, broken and using the old
-PM interface.
-
-Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Cc: Jiri Slaby <jslaby@suse.cz>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit e424259e2e27290c457f65161ae62f7c89215b88)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/tty/serial/xilinx_uartps.c | 30 ------------------------------
- 1 file changed, 30 deletions(-)
-
-diff --git a/drivers/tty/serial/xilinx_uartps.c b/drivers/tty/serial/xilinx_uartps.c
-index 4e5c77834c50..b5f655d10098 100644
---- a/drivers/tty/serial/xilinx_uartps.c
-+++ b/drivers/tty/serial/xilinx_uartps.c
-@@ -1006,34 +1006,6 @@ static int xuartps_remove(struct platform_device *pdev)
- 	return rc;
- }
- 
--/**
-- * xuartps_suspend - suspend event
-- * @pdev: Pointer to the platform device structure
-- * @state: State of the device
-- *
-- * Returns 0
-- **/
--static int xuartps_suspend(struct platform_device *pdev, pm_message_t state)
--{
--	/* Call the API provided in serial_core.c file which handles
--	 * the suspend.
--	 */
--	uart_suspend_port(&xuartps_uart_driver, &xuartps_port[pdev->id]);
--	return 0;
--}
--
--/**
-- * xuartps_resume - Resume after a previous suspend
-- * @pdev: Pointer to the platform device structure
-- *
-- * Returns 0
-- **/
--static int xuartps_resume(struct platform_device *pdev)
--{
--	uart_resume_port(&xuartps_uart_driver, &xuartps_port[pdev->id]);
--	return 0;
--}
--
- /* Match table for of_platform binding */
- static struct of_device_id xuartps_of_match[] = {
- 	{ .compatible = "xlnx,xuartps", },
-@@ -1044,8 +1016,6 @@ MODULE_DEVICE_TABLE(of, xuartps_of_match);
- static struct platform_driver xuartps_platform_driver = {
- 	.probe   = xuartps_probe,		/* Probe method */
- 	.remove  = xuartps_remove,		/* Detach method */
--	.suspend = xuartps_suspend,		/* Suspend */
--	.resume  = xuartps_resume,		/* Resume after a suspend */
- 	.driver  = {
- 		.owner = THIS_MODULE,
- 		.name = XUARTPS_NAME,		/* Driver name */
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0014-arm-zynq-Migrate-platform-to-clock-controller.patch b/patches.zynq/0014-arm-zynq-Migrate-platform-to-clock-controller.patch
deleted file mode 100644
index fb6ebca5e6f63..0000000000000
--- a/patches.zynq/0014-arm-zynq-Migrate-platform-to-clock-controller.patch
+++ /dev/null
@@ -1,412 +0,0 @@
-From 036eae88dd3e2eee9c2227661f0a21060529ecef Mon Sep 17 00:00:00 2001
-From: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Date: Mon, 13 May 2013 10:46:38 -0700
-Subject: arm: zynq: Migrate platform to clock controller
-
-Migrate the Zynq platform and its drivers to use the new clock
-controller driver.
-
-Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Cc: John Stultz <john.stultz@linaro.org>
-Cc: Thomas Gleixner <tglx@linutronix.de>
-Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-Cc: Jiri Slaby <jslaby@suse.cz>
-Cc: linux-serial@vger.kernel.org
-Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-Acked-by: Mike Turquette <mturquette@linaro.org>
-(cherry picked from commit 30e1e28598c2674c133148d8aec6d431d7acd314)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- arch/arm/boot/dts/zynq-7000.dtsi        |   71 +++++++-------------------
- arch/arm/boot/dts/zynq-zc702.dts        |    4 -
- arch/arm/mach-zynq/slcr.c               |    2 
- drivers/clk/Makefile                    |    2 
- drivers/clk/zynq/Makefile               |    3 +
- drivers/clocksource/cadence_ttc_timer.c |   23 ++++++--
- drivers/tty/serial/xilinx_uartps.c      |   85 +++++++++++++++++++++++++-------
- include/linux/clk/zynq.h                |    8 ++-
- 8 files changed, 118 insertions(+), 80 deletions(-)
- create mode 100644 drivers/clk/zynq/Makefile
-
---- a/arch/arm/boot/dts/zynq-7000.dtsi
-+++ b/arch/arm/boot/dts/zynq-7000.dtsi
-@@ -49,16 +49,18 @@
- 
- 		uart0: uart@e0000000 {
- 			compatible = "xlnx,xuartps";
-+			clocks = <&clkc 23>, <&clkc 40>;
-+			clock-names = "ref_clk", "aper_clk";
- 			reg = <0xE0000000 0x1000>;
- 			interrupts = <0 27 4>;
--			clocks = <&uart_clk 0>;
- 		};
- 
- 		uart1: uart@e0001000 {
- 			compatible = "xlnx,xuartps";
-+			clocks = <&clkc 24>, <&clkc 41>;
-+			clock-names = "ref_clk", "aper_clk";
- 			reg = <0xE0001000 0x1000>;
- 			interrupts = <0 50 4>;
--			clocks = <&uart_clk 1>;
- 		};
- 
- 		slcr: slcr@f8000000 {
-@@ -69,50 +71,21 @@
- 				#address-cells = <1>;
- 				#size-cells = <0>;
- 
--				ps_clk: ps_clk {
--					#clock-cells = <0>;
--					compatible = "fixed-clock";
--					/* clock-frequency set in board-specific file */
--					clock-output-names = "ps_clk";
--				};
--				armpll: armpll {
--					#clock-cells = <0>;
--					compatible = "xlnx,zynq-pll";
--					clocks = <&ps_clk>;
--					reg = <0x100 0x110>;
--					clock-output-names = "armpll";
--				};
--				ddrpll: ddrpll {
--					#clock-cells = <0>;
--					compatible = "xlnx,zynq-pll";
--					clocks = <&ps_clk>;
--					reg = <0x104 0x114>;
--					clock-output-names = "ddrpll";
--				};
--				iopll: iopll {
--					#clock-cells = <0>;
--					compatible = "xlnx,zynq-pll";
--					clocks = <&ps_clk>;
--					reg = <0x108 0x118>;
--					clock-output-names = "iopll";
--				};
--				uart_clk: uart_clk {
-+				clkc: clkc {
- 					#clock-cells = <1>;
--					compatible = "xlnx,zynq-periph-clock";
--					clocks = <&iopll &armpll &ddrpll>;
--					reg = <0x154>;
--					clock-output-names = "uart0_ref_clk",
--							     "uart1_ref_clk";
--				};
--				cpu_clk: cpu_clk {
--					#clock-cells = <1>;
--					compatible = "xlnx,zynq-cpu-clock";
--					clocks = <&iopll &armpll &ddrpll>;
--					reg = <0x120 0x1C4>;
--					clock-output-names = "cpu_6x4x",
--							     "cpu_3x2x",
--							     "cpu_2x",
--							     "cpu_1x";
-+					compatible = "xlnx,ps7-clkc";
-+					ps-clk-frequency = <33333333>;
-+					clock-output-names = "armpll", "ddrpll", "iopll", "cpu_6or4x",
-+							"cpu_3or2x", "cpu_2x", "cpu_1x", "ddr2x", "ddr3x",
-+							"dci", "lqspi", "smc", "pcap", "gem0", "gem1",
-+							"fclk0", "fclk1", "fclk2", "fclk3", "can0", "can1",
-+							"sdio0", "sdio1", "uart0", "uart1", "spi0", "spi1",
-+							"dma", "usb0_aper", "usb1_aper", "gem0_aper",
-+							"gem1_aper", "sdio0_aper", "sdio1_aper",
-+							"spi0_aper", "spi1_aper", "can0_aper", "can1_aper",
-+							"i2c0_aper", "i2c1_aper", "uart0_aper", "uart1_aper",
-+							"gpio_aper", "lqspi_aper", "smc_aper", "swdt",
-+							"dbg_trc", "dbg_apb";
- 				};
- 			};
- 		};
-@@ -129,9 +102,8 @@
- 			interrupt-parent = <&intc>;
- 			interrupts = < 0 10 4 0 11 4 0 12 4 >;
- 			compatible = "cdns,ttc";
-+			clocks = <&clkc 6>;
- 			reg = <0xF8001000 0x1000>;
--			clocks = <&cpu_clk 3>;
--			clock-names = "cpu_1x";
- 			clock-ranges;
- 		};
- 
-@@ -139,9 +111,8 @@
- 			interrupt-parent = <&intc>;
- 			interrupts = < 0 37 4 0 38 4 0 39 4 >;
- 			compatible = "cdns,ttc";
-+			clocks = <&clkc 6>;
- 			reg = <0xF8002000 0x1000>;
--			clocks = <&cpu_clk 3>;
--			clock-names = "cpu_1x";
- 			clock-ranges;
- 		};
- 		scutimer: scutimer@f8f00600 {
-@@ -149,7 +120,7 @@
- 			interrupts = < 1 13 0x301 >;
- 			compatible = "arm,cortex-a9-twd-timer";
- 			reg = < 0xf8f00600 0x20 >;
--			clocks = <&cpu_clk 1>;
-+			clocks = <&clkc 4>;
- 		} ;
- 	};
- };
---- a/arch/arm/boot/dts/zynq-zc702.dts
-+++ b/arch/arm/boot/dts/zynq-zc702.dts
-@@ -28,7 +28,3 @@
- 	};
- 
- };
--
--&ps_clk {
--	clock-frequency = <33333330>;
--};
---- a/arch/arm/mach-zynq/slcr.c
-+++ b/arch/arm/mach-zynq/slcr.c
-@@ -106,7 +106,7 @@ int __init zynq_slcr_init(void)
- 
- 	pr_info("%s mapped to %p\n", np->name, zynq_slcr_base);
- 
--	xilinx_zynq_clocks_init(zynq_slcr_base);
-+	zynq_clock_init(zynq_slcr_base);
- 
- 	of_node_put(np);
- 
---- a/drivers/clk/Makefile
-+++ b/drivers/clk/Makefile
-@@ -27,7 +27,7 @@ obj-$(CONFIG_MACH_LOONGSON1)	+= clk-ls1x
- obj-$(CONFIG_ARCH_SUNXI)	+= sunxi/
- obj-$(CONFIG_ARCH_U8500)	+= ux500/
- obj-$(CONFIG_ARCH_VT8500)	+= clk-vt8500.o
--obj-$(CONFIG_ARCH_ZYNQ)		+= clk-zynq.o
-+obj-$(CONFIG_ARCH_ZYNQ)		+= zynq/
- obj-$(CONFIG_ARCH_TEGRA)	+= tegra/
- obj-$(CONFIG_PLAT_SAMSUNG)	+= samsung/
- obj-$(CONFIG_ARCH_SHMOBILE_MULTI)	+= shmobile/
---- /dev/null
-+++ b/drivers/clk/zynq/Makefile
-@@ -0,0 +1,3 @@
-+# Zynq clock specific Makefile
-+
-+obj-$(CONFIG_ARCH_ZYNQ)	+= clkc.o pll.o
---- a/drivers/clocksource/cadence_ttc_timer.c
-+++ b/drivers/clocksource/cadence_ttc_timer.c
-@@ -51,6 +51,8 @@
- 
- #define TTC_CNT_CNTRL_DISABLE_MASK	0x1
- 
-+#define TTC_CLK_CNTRL_CSRC_MASK		(1 << 5)	/* clock source */
-+
- /*
-  * Setup the timers to use pre-scaling, using a fixed value for now that will
-  * work across most input frequency, but it may need to be more dynamic
-@@ -396,8 +398,9 @@ static void __init ttc_timer_init(struct
- {
- 	unsigned int irq;
- 	void __iomem *timer_baseaddr;
--	struct clk *clk;
-+	struct clk *clk_cs, *clk_ce;
- 	static int initialized;
-+	int clksel;
- 
- 	if (initialized)
- 		return;
-@@ -421,14 +424,24 @@ static void __init ttc_timer_init(struct
- 		BUG();
- 	}
- 
--	clk = of_clk_get_by_name(timer, "cpu_1x");
--	if (IS_ERR(clk)) {
-+	clksel = __raw_readl(timer_baseaddr + TTC_CLK_CNTRL_OFFSET);
-+	clksel = !!(clksel & TTC_CLK_CNTRL_CSRC_MASK);
-+	clk_cs = of_clk_get(timer, clksel);
-+	if (IS_ERR(clk_cs)) {
-+		pr_err("ERROR: timer input clock not found\n");
-+		BUG();
-+	}
-+
-+	clksel = __raw_readl(timer_baseaddr + 4 + TTC_CLK_CNTRL_OFFSET);
-+	clksel = !!(clksel & TTC_CLK_CNTRL_CSRC_MASK);
-+	clk_ce = of_clk_get(timer, clksel);
-+	if (IS_ERR(clk_ce)) {
- 		pr_err("ERROR: timer input clock not found\n");
- 		BUG();
- 	}
- 
--	ttc_setup_clocksource(clk, timer_baseaddr);
--	ttc_setup_clockevent(clk, timer_baseaddr + 4, irq);
-+	ttc_setup_clocksource(clk_cs, timer_baseaddr);
-+	ttc_setup_clockevent(clk_ce, timer_baseaddr + 4, irq);
- 
- 	pr_info("%s #0 at %p, irq=%d\n", timer->name, timer_baseaddr, irq);
- }
---- a/drivers/tty/serial/xilinx_uartps.c
-+++ b/drivers/tty/serial/xilinx_uartps.c
-@@ -14,6 +14,7 @@
- #include <linux/platform_device.h>
- #include <linux/serial.h>
- #include <linux/serial_core.h>
-+#include <linux/slab.h>
- #include <linux/tty.h>
- #include <linux/tty_flip.h>
- #include <linux/console.h>
-@@ -139,6 +140,16 @@
- #define XUARTPS_SR_RXTRIG	0x00000001 /* Rx Trigger */
- 
- /**
-+ * struct xuartps - device data
-+ * @refclk	Reference clock
-+ * @aperclk	APB clock
-+ */
-+struct xuartps {
-+	struct clk		*refclk;
-+	struct clk		*aperclk;
-+};
-+
-+/**
-  * xuartps_isr - Interrupt handler
-  * @irq: Irq number
-  * @dev_id: Id of the port
-@@ -936,34 +947,55 @@ static int xuartps_probe(struct platform
- 	int rc;
- 	struct uart_port *port;
- 	struct resource *res, *res2;
--	struct clk *clk;
-+	struct xuartps *xuartps_data;
- 
--	clk = of_clk_get(pdev->dev.of_node, 0);
--	if (IS_ERR(clk)) {
--		dev_err(&pdev->dev, "no clock specified\n");
--		return PTR_ERR(clk);
-+	xuartps_data = kzalloc(sizeof(*xuartps_data), GFP_KERNEL);
-+	if (!xuartps_data)
-+		return -ENOMEM;
-+
-+	xuartps_data->aperclk = clk_get(&pdev->dev, "aper_clk");
-+	if (IS_ERR(xuartps_data->aperclk)) {
-+		dev_err(&pdev->dev, "aper_clk clock not found.\n");
-+		rc = PTR_ERR(xuartps_data->aperclk);
-+		goto err_out_free;
-+	}
-+	xuartps_data->refclk = clk_get(&pdev->dev, "ref_clk");
-+	if (IS_ERR(xuartps_data->refclk)) {
-+		dev_err(&pdev->dev, "ref_clk clock not found.\n");
-+		rc = PTR_ERR(xuartps_data->refclk);
-+		goto err_out_clk_put_aper;
- 	}
- 
--	rc = clk_prepare_enable(clk);
-+	rc = clk_prepare_enable(xuartps_data->aperclk);
-+	if (rc) {
-+		dev_err(&pdev->dev, "Unable to enable APER clock.\n");
-+		goto err_out_clk_put;
-+	}
-+	rc = clk_prepare_enable(xuartps_data->refclk);
- 	if (rc) {
--		dev_err(&pdev->dev, "could not enable clock\n");
--		return -EBUSY;
-+		dev_err(&pdev->dev, "Unable to enable device clock.\n");
-+		goto err_out_clk_dis_aper;
- 	}
- 
- 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
--	if (!res)
--		return -ENODEV;
-+	if (!res) {
-+		rc = -ENODEV;
-+		goto err_out_clk_disable;
-+	}
- 
- 	res2 = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
--	if (!res2)
--		return -ENODEV;
-+	if (!res2) {
-+		rc = -ENODEV;
-+		goto err_out_clk_disable;
-+	}
- 
- 	/* Initialize the port structure */
- 	port = xuartps_get_port();
- 
- 	if (!port) {
- 		dev_err(&pdev->dev, "Cannot get uart_port structure\n");
--		return -ENODEV;
-+		rc = -ENODEV;
-+		goto err_out_clk_disable;
- 	} else {
- 		/* Register the port.
- 		 * This function also registers this device with the tty layer
-@@ -972,18 +1004,31 @@ static int xuartps_probe(struct platform
- 		port->mapbase = res->start;
- 		port->irq = res2->start;
- 		port->dev = &pdev->dev;
--		port->uartclk = clk_get_rate(clk);
--		port->private_data = clk;
-+		port->uartclk = clk_get_rate(xuartps_data->refclk);
-+		port->private_data = xuartps_data;
- 		dev_set_drvdata(&pdev->dev, port);
- 		rc = uart_add_one_port(&xuartps_uart_driver, port);
- 		if (rc) {
- 			dev_err(&pdev->dev,
- 				"uart_add_one_port() failed; err=%i\n", rc);
- 			dev_set_drvdata(&pdev->dev, NULL);
--			return rc;
-+			goto err_out_clk_disable;
- 		}
- 		return 0;
- 	}
-+
-+err_out_clk_disable:
-+	clk_disable_unprepare(xuartps_data->refclk);
-+err_out_clk_dis_aper:
-+	clk_disable_unprepare(xuartps_data->aperclk);
-+err_out_clk_put:
-+	clk_put(xuartps_data->refclk);
-+err_out_clk_put_aper:
-+	clk_put(xuartps_data->aperclk);
-+err_out_free:
-+	kfree(xuartps_data);
-+
-+	return rc;
- }
- 
- /**
-@@ -995,14 +1040,18 @@ static int xuartps_probe(struct platform
- static int xuartps_remove(struct platform_device *pdev)
- {
- 	struct uart_port *port = dev_get_drvdata(&pdev->dev);
--	struct clk *clk = port->private_data;
-+	struct xuartps *xuartps_data = port->private_data;
- 	int rc;
- 
- 	/* Remove the xuartps port from the serial core */
- 	rc = uart_remove_one_port(&xuartps_uart_driver, port);
- 	dev_set_drvdata(&pdev->dev, NULL);
- 	port->mapbase = 0;
--	clk_disable_unprepare(clk);
-+	clk_disable_unprepare(xuartps_data->refclk);
-+	clk_disable_unprepare(xuartps_data->aperclk);
-+	clk_put(xuartps_data->refclk);
-+	clk_put(xuartps_data->aperclk);
-+	kfree(xuartps_data);
- 	return rc;
- }
- 
---- a/include/linux/clk/zynq.h
-+++ b/include/linux/clk/zynq.h
-@@ -1,4 +1,5 @@
- /*
-+ * Copyright (C) 2013 Xilinx Inc.
-  * Copyright (C) 2012 National Instruments
-  *
-  * This program is free software; you can redistribute it and/or modify
-@@ -19,6 +20,11 @@
- #ifndef __LINUX_CLK_ZYNQ_H_
- #define __LINUX_CLK_ZYNQ_H_
- 
--void __init xilinx_zynq_clocks_init(void __iomem *slcr);
-+#include <linux/spinlock.h>
- 
-+void zynq_clock_init(void __iomem *slcr);
-+
-+struct clk *clk_register_zynq_pll(const char *name, const char *parent,
-+		void __iomem *pll_ctrl, void __iomem *pll_status, u8 lock_index,
-+		spinlock_t *lock);
- #endif
diff --git a/patches.zynq/0015-serial-use-platform_-get-set-_drvdata.patch b/patches.zynq/0015-serial-use-platform_-get-set-_drvdata.patch
deleted file mode 100644
index abf27e91aadb2..0000000000000
--- a/patches.zynq/0015-serial-use-platform_-get-set-_drvdata.patch
+++ /dev/null
@@ -1,58 +0,0 @@
-From 24151ccc15c826111d385037d237f6f2d7c06473 Mon Sep 17 00:00:00 2001
-From: Jingoo Han <jg1.han@samsung.com>
-Date: Mon, 2 Dec 2013 09:24:29 +0900
-Subject: serial: use platform_{get,set}_drvdata()
-
-    Use the wrapper functions for getting and setting the driver data using
-    platform_device instead of using dev_{get,set}_drvdata() with &pdev->dev,
-    so we can directly pass a struct platform_device.
-
-    Also, unnecessary dev_set_drvdata() is removed, because the driver core
-    clears the driver data to NULL after device_release or on probe failure.
-
-    Signed-off-by: Jingoo Han <jg1.han@samsung.com>
-    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-    (cherry picked from commit 696faedd616e202f5c510cd03dcc8853c11ca6db)
-    Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/tty/serial/xilinx_uartps.c | 6 ++----
- 1 file changed, 2 insertions(+), 4 deletions(-)
-
-diff --git a/drivers/tty/serial/xilinx_uartps.c b/drivers/tty/serial/xilinx_uartps.c
-index 916305a573b8..2f76ad938b4b 100644
---- a/drivers/tty/serial/xilinx_uartps.c
-+++ b/drivers/tty/serial/xilinx_uartps.c
-@@ -1006,12 +1006,11 @@ static int xuartps_probe(struct platform_device *pdev)
- 		port->dev = &pdev->dev;
- 		port->uartclk = clk_get_rate(xuartps_data->refclk);
- 		port->private_data = xuartps_data;
--		dev_set_drvdata(&pdev->dev, port);
-+                platform_set_drvdata(pdev, port);
- 		rc = uart_add_one_port(&xuartps_uart_driver, port);
- 		if (rc) {
- 			dev_err(&pdev->dev,
- 				"uart_add_one_port() failed; err=%i\n", rc);
--			dev_set_drvdata(&pdev->dev, NULL);
- 			goto err_out_clk_disable;
- 		}
- 		return 0;
-@@ -1039,13 +1038,12 @@ err_out_free:
-  **/
- static int xuartps_remove(struct platform_device *pdev)
- {
--	struct uart_port *port = dev_get_drvdata(&pdev->dev);
-+	struct uart_port *port = platform_get_drvdata(pdev);
- 	struct xuartps *xuartps_data = port->private_data;
- 	int rc;
- 
- 	/* Remove the xuartps port from the serial core */
- 	rc = uart_remove_one_port(&xuartps_uart_driver, port);
--	dev_set_drvdata(&pdev->dev, NULL);
- 	port->mapbase = 0;
- 	clk_disable_unprepare(xuartps_data->refclk);
- 	clk_disable_unprepare(xuartps_data->aperclk);
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0016-tty-xuartps-Use-devm_clk_get.patch b/patches.zynq/0016-tty-xuartps-Use-devm_clk_get.patch
deleted file mode 100644
index 9e21eeedf27ad..0000000000000
--- a/patches.zynq/0016-tty-xuartps-Use-devm_clk_get.patch
+++ /dev/null
@@ -1,71 +0,0 @@
-From ddc3257df7309ac066b59ac6c67a0463320414a0 Mon Sep 17 00:00:00 2001
-From: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Date: Thu, 17 Oct 2013 14:08:04 -0700
-Subject: tty: xuartps: Use devm_clk_get()
-
-Use the device managed interface for clocks, simplifying error paths.
-
-Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 991fc259361eb812ebf6c4527343d60ab4b2e1a6)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/tty/serial/xilinx_uartps.c | 14 ++++----------
- 1 file changed, 4 insertions(+), 10 deletions(-)
-
-diff --git a/drivers/tty/serial/xilinx_uartps.c b/drivers/tty/serial/xilinx_uartps.c
-index 2f76ad938b4b..afa3a2d6856f 100644
---- a/drivers/tty/serial/xilinx_uartps.c
-+++ b/drivers/tty/serial/xilinx_uartps.c
-@@ -953,23 +953,23 @@ static int xuartps_probe(struct platform_device *pdev)
- 	if (!xuartps_data)
- 		return -ENOMEM;
- 
--	xuartps_data->aperclk = clk_get(&pdev->dev, "aper_clk");
-+	xuartps_data->aperclk = devm_clk_get(&pdev->dev, "aper_clk");
- 	if (IS_ERR(xuartps_data->aperclk)) {
- 		dev_err(&pdev->dev, "aper_clk clock not found.\n");
- 		rc = PTR_ERR(xuartps_data->aperclk);
- 		goto err_out_free;
- 	}
--	xuartps_data->refclk = clk_get(&pdev->dev, "ref_clk");
-+	xuartps_data->refclk = devm_clk_get(&pdev->dev, "ref_clk");
- 	if (IS_ERR(xuartps_data->refclk)) {
- 		dev_err(&pdev->dev, "ref_clk clock not found.\n");
- 		rc = PTR_ERR(xuartps_data->refclk);
--		goto err_out_clk_put_aper;
-+		goto err_out_free;
- 	}
- 
- 	rc = clk_prepare_enable(xuartps_data->aperclk);
- 	if (rc) {
- 		dev_err(&pdev->dev, "Unable to enable APER clock.\n");
--		goto err_out_clk_put;
-+		goto err_out_free;
- 	}
- 	rc = clk_prepare_enable(xuartps_data->refclk);
- 	if (rc) {
-@@ -1020,10 +1020,6 @@ err_out_clk_disable:
- 	clk_disable_unprepare(xuartps_data->refclk);
- err_out_clk_dis_aper:
- 	clk_disable_unprepare(xuartps_data->aperclk);
--err_out_clk_put:
--	clk_put(xuartps_data->refclk);
--err_out_clk_put_aper:
--	clk_put(xuartps_data->aperclk);
- err_out_free:
- 	kfree(xuartps_data);
- 
-@@ -1047,8 +1043,6 @@ static int xuartps_remove(struct platform_device *pdev)
- 	port->mapbase = 0;
- 	clk_disable_unprepare(xuartps_data->refclk);
- 	clk_disable_unprepare(xuartps_data->aperclk);
--	clk_put(xuartps_data->refclk);
--	clk_put(xuartps_data->aperclk);
- 	kfree(xuartps_data);
- 	return rc;
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0017-tty-xuartps-Use-devm_kzalloc.patch b/patches.zynq/0017-tty-xuartps-Use-devm_kzalloc.patch
deleted file mode 100644
index b1cc2426c7440..0000000000000
--- a/patches.zynq/0017-tty-xuartps-Use-devm_kzalloc.patch
+++ /dev/null
@@ -1,74 +0,0 @@
-From 1603078a9e33591ba9d89b4b4a6cc58c84debf02 Mon Sep 17 00:00:00 2001
-From: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Date: Thu, 17 Oct 2013 14:08:05 -0700
-Subject: tty: xuartps: Use devm_kzalloc
-
-Use the device managed interface for memory allocation, simplifying
-error paths.
-
-Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit c03cae1791407f4f4f9bc6b0354ecaeb50df787f)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/tty/serial/xilinx_uartps.c | 14 +++++---------
- 1 file changed, 5 insertions(+), 9 deletions(-)
-
-diff --git a/drivers/tty/serial/xilinx_uartps.c b/drivers/tty/serial/xilinx_uartps.c
-index afa3a2d6856f..2b3fe10362ba 100644
---- a/drivers/tty/serial/xilinx_uartps.c
-+++ b/drivers/tty/serial/xilinx_uartps.c
-@@ -949,27 +949,26 @@ static int xuartps_probe(struct platform_device *pdev)
- 	struct resource *res, *res2;
- 	struct xuartps *xuartps_data;
- 
--	xuartps_data = kzalloc(sizeof(*xuartps_data), GFP_KERNEL);
-+	xuartps_data = devm_kzalloc(&pdev->dev, sizeof(*xuartps_data),
-+			GFP_KERNEL);
- 	if (!xuartps_data)
- 		return -ENOMEM;
- 
- 	xuartps_data->aperclk = devm_clk_get(&pdev->dev, "aper_clk");
- 	if (IS_ERR(xuartps_data->aperclk)) {
- 		dev_err(&pdev->dev, "aper_clk clock not found.\n");
--		rc = PTR_ERR(xuartps_data->aperclk);
--		goto err_out_free;
-+		return PTR_ERR(xuartps_data->aperclk);
- 	}
- 	xuartps_data->refclk = devm_clk_get(&pdev->dev, "ref_clk");
- 	if (IS_ERR(xuartps_data->refclk)) {
- 		dev_err(&pdev->dev, "ref_clk clock not found.\n");
--		rc = PTR_ERR(xuartps_data->refclk);
--		goto err_out_free;
-+		return PTR_ERR(xuartps_data->refclk);
- 	}
- 
- 	rc = clk_prepare_enable(xuartps_data->aperclk);
- 	if (rc) {
- 		dev_err(&pdev->dev, "Unable to enable APER clock.\n");
--		goto err_out_free;
-+		return rc;
- 	}
- 	rc = clk_prepare_enable(xuartps_data->refclk);
- 	if (rc) {
-@@ -1020,8 +1019,6 @@ err_out_clk_disable:
- 	clk_disable_unprepare(xuartps_data->refclk);
- err_out_clk_dis_aper:
- 	clk_disable_unprepare(xuartps_data->aperclk);
--err_out_free:
--	kfree(xuartps_data);
- 
- 	return rc;
- }
-@@ -1043,7 +1040,6 @@ static int xuartps_remove(struct platform_device *pdev)
- 	port->mapbase = 0;
- 	clk_disable_unprepare(xuartps_data->refclk);
- 	clk_disable_unprepare(xuartps_data->aperclk);
--	kfree(xuartps_data);
- 	return rc;
- }
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0018-tty-xuartps-Implement-BREAK-detection-add-SYSRQ-supp.patch b/patches.zynq/0018-tty-xuartps-Implement-BREAK-detection-add-SYSRQ-supp.patch
deleted file mode 100644
index ec2b420484908..0000000000000
--- a/patches.zynq/0018-tty-xuartps-Implement-BREAK-detection-add-SYSRQ-supp.patch
+++ /dev/null
@@ -1,111 +0,0 @@
-From dda80081e00ca6472b11591293a7c46cb7ef6527 Mon Sep 17 00:00:00 2001
-From: Vlad Lungu <vlad.lungu@windriver.com>
-Date: Thu, 17 Oct 2013 14:08:06 -0700
-Subject: tty: xuartps: Implement BREAK detection, add SYSRQ support
-
-The Cadence UART does not do break detection, even if the
-datasheet says it does. This patch adds break detection in
-software (tested in 8N1 mode only) and enables SYSRQ,
-allowing for Break-g to enter KDB and all the other goodies.
-
-Signed-off-by: Vlad Lungu <vlad.lungu@windriver.com>
-Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 0c0c47bc40a2e358d593b2d7fb93b50027fbfc0c)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/tty/serial/xilinx_uartps.c | 50 +++++++++++++++++++++++++++++++++++++-
- 1 file changed, 49 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/tty/serial/xilinx_uartps.c b/drivers/tty/serial/xilinx_uartps.c
-index 2b3fe10362ba..2f94b8b2512e 100644
---- a/drivers/tty/serial/xilinx_uartps.c
-+++ b/drivers/tty/serial/xilinx_uartps.c
-@@ -11,13 +11,17 @@
-  *
-  */
- 
-+#if defined(CONFIG_SERIAL_XILINX_PS_UART_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
-+#define SUPPORT_SYSRQ
-+#endif
-+
- #include <linux/platform_device.h>
- #include <linux/serial.h>
-+#include <linux/console.h>
- #include <linux/serial_core.h>
- #include <linux/slab.h>
- #include <linux/tty.h>
- #include <linux/tty_flip.h>
--#include <linux/console.h>
- #include <linux/clk.h>
- #include <linux/irq.h>
- #include <linux/io.h>
-@@ -128,6 +132,9 @@
- #define XUARTPS_IXR_RXEMPTY	0x00000002 /* RX FIFO empty interrupt. */
- #define XUARTPS_IXR_MASK	0x00001FFF /* Valid bit mask */
- 
-+/* Goes in read_status_mask for break detection as the HW doesn't do it*/
-+#define XUARTPS_IXR_BRK		0x80000000
-+
- /** Channel Status Register
-  *
-  * The channel status register (CSR) is provided to enable the control logic
-@@ -171,6 +178,23 @@ static irqreturn_t xuartps_isr(int irq, void *dev_id)
- 	 */
- 	isrstatus = xuartps_readl(XUARTPS_ISR_OFFSET);
- 
-+	/*
-+	 * There is no hardware break detection, so we interpret framing
-+	 * error with all-zeros data as a break sequence. Most of the time,
-+	 * there's another non-zero byte at the end of the sequence.
-+	 */
-+
-+	if (isrstatus & XUARTPS_IXR_FRAMING) {
-+		while (!(xuartps_readl(XUARTPS_SR_OFFSET) &
-+					XUARTPS_SR_RXEMPTY)) {
-+			if (!xuartps_readl(XUARTPS_FIFO_OFFSET)) {
-+				port->read_status_mask |= XUARTPS_IXR_BRK;
-+				isrstatus &= ~XUARTPS_IXR_FRAMING;
-+			}
-+		}
-+		xuartps_writel(XUARTPS_IXR_FRAMING, XUARTPS_ISR_OFFSET);
-+	}
-+
- 	/* drop byte with parity error if IGNPAR specified */
- 	if (isrstatus & port->ignore_status_mask & XUARTPS_IXR_PARITY)
- 		isrstatus &= ~(XUARTPS_IXR_RXTRIG | XUARTPS_IXR_TOUT);
-@@ -184,6 +208,30 @@ static irqreturn_t xuartps_isr(int irq, void *dev_id)
- 		while ((xuartps_readl(XUARTPS_SR_OFFSET) &
- 			XUARTPS_SR_RXEMPTY) != XUARTPS_SR_RXEMPTY) {
- 			data = xuartps_readl(XUARTPS_FIFO_OFFSET);
-+
-+			/* Non-NULL byte after BREAK is garbage (99%) */
-+			if (data && (port->read_status_mask &
-+						XUARTPS_IXR_BRK)) {
-+				port->read_status_mask &= ~XUARTPS_IXR_BRK;
-+				port->icount.brk++;
-+				if (uart_handle_break(port))
-+					continue;
-+			}
-+
-+			/*
-+			 * uart_handle_sysrq_char() doesn't work if
-+			 * spinlocked, for some reason
-+			 */
-+			 if (port->sysrq) {
-+				spin_unlock(&port->lock);
-+				if (uart_handle_sysrq_char(port,
-+							(unsigned char)data)) {
-+					spin_lock(&port->lock);
-+					continue;
-+				}
-+				spin_lock(&port->lock);
-+			}
-+
- 			port->icount.rx++;
- 
- 			if (isrstatus & XUARTPS_IXR_PARITY) {
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0019-tty-xuartps-Add-polled-mode-support-for-xuartps.patch b/patches.zynq/0019-tty-xuartps-Add-polled-mode-support-for-xuartps.patch
deleted file mode 100644
index 3fec51cfd6c25..0000000000000
--- a/patches.zynq/0019-tty-xuartps-Add-polled-mode-support-for-xuartps.patch
+++ /dev/null
@@ -1,90 +0,0 @@
-From 68c9e7ed1cb3dbfa9cdfbd043dcc6e237b5ed7a7 Mon Sep 17 00:00:00 2001
-From: Vlad Lungu <vlad.lungu@windriver.com>
-Date: Thu, 17 Oct 2013 14:08:07 -0700
-Subject: tty: xuartps: Add polled mode support for xuartps
-
-This allows KDB/KGDB to run.
-
-Signed-off-by: Vlad Lungu <vlad.lungu@windriver.com>
-Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 6ee04c6c5488b2b7fdfa22c771c127411f86e610)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/tty/serial/xilinx_uartps.c | 52 ++++++++++++++++++++++++++++++++++++++
- 1 file changed, 52 insertions(+)
-
-diff --git a/drivers/tty/serial/xilinx_uartps.c b/drivers/tty/serial/xilinx_uartps.c
-index 2f94b8b2512e..5a0489fc3e11 100644
---- a/drivers/tty/serial/xilinx_uartps.c
-+++ b/drivers/tty/serial/xilinx_uartps.c
-@@ -775,6 +775,54 @@ static void xuartps_enable_ms(struct uart_port *port)
- 	/* N/A */
- }
- 
-+#ifdef CONFIG_CONSOLE_POLL
-+static int xuartps_poll_get_char(struct uart_port *port)
-+{
-+	u32 imr;
-+	int c;
-+
-+	/* Disable all interrupts */
-+	imr = xuartps_readl(XUARTPS_IMR_OFFSET);
-+	xuartps_writel(imr, XUARTPS_IDR_OFFSET);
-+
-+	/* Check if FIFO is empty */
-+	if (xuartps_readl(XUARTPS_SR_OFFSET) & XUARTPS_SR_RXEMPTY)
-+		c = NO_POLL_CHAR;
-+	else /* Read a character */
-+		c = (unsigned char) xuartps_readl(XUARTPS_FIFO_OFFSET);
-+
-+	/* Enable interrupts */
-+	xuartps_writel(imr, XUARTPS_IER_OFFSET);
-+
-+	return c;
-+}
-+
-+static void xuartps_poll_put_char(struct uart_port *port, unsigned char c)
-+{
-+	u32 imr;
-+
-+	/* Disable all interrupts */
-+	imr = xuartps_readl(XUARTPS_IMR_OFFSET);
-+	xuartps_writel(imr, XUARTPS_IDR_OFFSET);
-+
-+	/* Wait until FIFO is empty */
-+	while (!(xuartps_readl(XUARTPS_SR_OFFSET) & XUARTPS_SR_TXEMPTY))
-+		cpu_relax();
-+
-+	/* Write a character */
-+	xuartps_writel(c, XUARTPS_FIFO_OFFSET);
-+
-+	/* Wait until FIFO is empty */
-+	while (!(xuartps_readl(XUARTPS_SR_OFFSET) & XUARTPS_SR_TXEMPTY))
-+		cpu_relax();
-+
-+	/* Enable interrupts */
-+	xuartps_writel(imr, XUARTPS_IER_OFFSET);
-+
-+	return;
-+}
-+#endif
-+
- /** The UART operations structure
-  */
- static struct uart_ops xuartps_ops = {
-@@ -807,6 +855,10 @@ static struct uart_ops xuartps_ops = {
- 	.config_port	= xuartps_config_port,	/* Configure when driver
- 						 * adds a xuartps port
- 						 */
-+#ifdef CONFIG_CONSOLE_POLL
-+	.poll_get_char	= xuartps_poll_get_char,
-+	.poll_put_char	= xuartps_poll_put_char,
-+#endif
- };
- 
- static struct uart_port xuartps_port[2];
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0020-tty-xuartps-support-64-byte-FIFO-size.patch b/patches.zynq/0020-tty-xuartps-support-64-byte-FIFO-size.patch
deleted file mode 100644
index a10e00e66d12e..0000000000000
--- a/patches.zynq/0020-tty-xuartps-support-64-byte-FIFO-size.patch
+++ /dev/null
@@ -1,90 +0,0 @@
-From 8f0f5797bba6f41237925f535eed94e29a549998 Mon Sep 17 00:00:00 2001
-From: Suneel <suneelg@xilinx.com>
-Date: Thu, 17 Oct 2013 14:08:08 -0700
-Subject: tty: xuartps: support 64 byte FIFO size
-
-Changes to use the 64 byte FIFO depth and fix the issue
-by clearing the txempty interrupt in isr status for tx
-after filling in data in start_tx function
-
-Signed-off-by: Suneel Garapati <suneelg@xilinx.com>
-Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 85baf542d54ec321642194b0ebfa7316e3190dc2)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/tty/serial/xilinx_uartps.c | 30 +++++++++++++++++++++++-------
- 1 file changed, 23 insertions(+), 7 deletions(-)
-
-diff --git a/drivers/tty/serial/xilinx_uartps.c b/drivers/tty/serial/xilinx_uartps.c
-index 5a0489fc3e11..4a1f6080ef59 100644
---- a/drivers/tty/serial/xilinx_uartps.c
-+++ b/drivers/tty/serial/xilinx_uartps.c
-@@ -33,12 +33,22 @@
- #define XUARTPS_MAJOR		0	/* use dynamic node allocation */
- #define XUARTPS_MINOR		0	/* works best with devtmpfs */
- #define XUARTPS_NR_PORTS	2
--#define XUARTPS_FIFO_SIZE	16	/* FIFO size */
-+#define XUARTPS_FIFO_SIZE	64	/* FIFO size */
- #define XUARTPS_REGISTER_SPACE	0xFFF
- 
- #define xuartps_readl(offset)		ioread32(port->membase + offset)
- #define xuartps_writel(val, offset)	iowrite32(val, port->membase + offset)
- 
-+/* Rx Trigger level */
-+static int rx_trigger_level = 56;
-+module_param(rx_trigger_level, uint, S_IRUGO);
-+MODULE_PARM_DESC(rx_trigger_level, "Rx trigger level, 1-63 bytes");
-+
-+/* Rx Timeout */
-+static int rx_timeout = 10;
-+module_param(rx_timeout, uint, S_IRUGO);
-+MODULE_PARM_DESC(rx_timeout, "Rx timeout, 1-255");
-+
- /********************************Register Map********************************/
- /** UART
-  *
-@@ -394,7 +404,7 @@ static void xuartps_start_tx(struct uart_port *port)
- 		port->state->xmit.tail = (port->state->xmit.tail + 1) &
- 					(UART_XMIT_SIZE - 1);
- 	}
--
-+	xuartps_writel(XUARTPS_IXR_TXEMPTY, XUARTPS_ISR_OFFSET);
- 	/* Enable the TX Empty interrupt */
- 	xuartps_writel(XUARTPS_IXR_TXEMPTY, XUARTPS_IER_OFFSET);
- 
-@@ -528,7 +538,7 @@ static void xuartps_set_termios(struct uart_port *port,
- 			| (XUARTPS_CR_TX_EN | XUARTPS_CR_RX_EN),
- 			XUARTPS_CR_OFFSET);
- 
--	xuartps_writel(10, XUARTPS_RXTOUT_OFFSET);
-+	xuartps_writel(rx_timeout, XUARTPS_RXTOUT_OFFSET);
- 
- 	port->read_status_mask = XUARTPS_IXR_TXEMPTY | XUARTPS_IXR_RXTRIG |
- 			XUARTPS_IXR_OVERRUN | XUARTPS_IXR_TOUT;
-@@ -631,11 +641,17 @@ static int xuartps_startup(struct uart_port *port)
- 		| XUARTPS_MR_PARITY_NONE | XUARTPS_MR_CHARLEN_8_BIT,
- 		 XUARTPS_MR_OFFSET);
- 
--	/* Set the RX FIFO Trigger level to 14 assuming FIFO size as 16 */
--	xuartps_writel(14, XUARTPS_RXWM_OFFSET);
-+	/*
-+	 * Set the RX FIFO Trigger level to use most of the FIFO, but it
-+	 * can be tuned with a module parameter
-+	 */
-+	xuartps_writel(rx_trigger_level, XUARTPS_RXWM_OFFSET);
- 
--	/* Receive Timeout register is enabled with value of 10 */
--	xuartps_writel(10, XUARTPS_RXTOUT_OFFSET);
-+	/*
-+	 * Receive Timeout register is enabled but it
-+	 * can be tuned with a module parameter
-+	 */
-+	xuartps_writel(rx_timeout, XUARTPS_RXTOUT_OFFSET);
- 
- 	/* Clear out any pending interrupts before enabling them */
- 	xuartps_writel(xuartps_readl(XUARTPS_ISR_OFFSET), XUARTPS_ISR_OFFSET);
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0021-tty-xuartps-Force-enable-the-UART-in-xuartps_console.patch b/patches.zynq/0021-tty-xuartps-Force-enable-the-UART-in-xuartps_console.patch
deleted file mode 100644
index d67c13b81a458..0000000000000
--- a/patches.zynq/0021-tty-xuartps-Force-enable-the-UART-in-xuartps_console.patch
+++ /dev/null
@@ -1,59 +0,0 @@
-From 2de507b6c59647a1a907c18f62785ddf8d36ed50 Mon Sep 17 00:00:00 2001
-From: Lars-Peter Clausen <lars@metafoo.de>
-Date: Thu, 17 Oct 2013 14:08:09 -0700
-Subject: tty: xuartps: Force enable the UART in xuartps_console_write
-
-It is possible that under certain circumstances xuartps_console_write is entered
-while the UART disabled. When this happens the code will busy loop in
-xuartps_console_putchar, since the character is never written and the TXEMPTY
-flag is never set. The result is a system lockup. This patch force enables the
-UART for the duration of xuartps_console_write to avoid this.
-
-Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
-Signed-off-by: John Linn <john.linn@xilinx.com>
-Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit d3755f5e6cd222cd5aff949228d32aa8446023a5)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/tty/serial/xilinx_uartps.c | 12 +++++++++++-
- 1 file changed, 11 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/tty/serial/xilinx_uartps.c b/drivers/tty/serial/xilinx_uartps.c
-index 4a1f6080ef59..cf5487841362 100644
---- a/drivers/tty/serial/xilinx_uartps.c
-+++ b/drivers/tty/serial/xilinx_uartps.c
-@@ -953,7 +953,7 @@ static void xuartps_console_write(struct console *co, const char *s,
- {
- 	struct uart_port *port = &xuartps_port[co->index];
- 	unsigned long flags;
--	unsigned int imr;
-+	unsigned int imr, ctrl;
- 	int locked = 1;
- 
- 	if (oops_in_progress)
-@@ -965,9 +965,19 @@ static void xuartps_console_write(struct console *co, const char *s,
- 	imr = xuartps_readl(XUARTPS_IMR_OFFSET);
- 	xuartps_writel(imr, XUARTPS_IDR_OFFSET);
- 
-+	/*
-+	 * Make sure that the tx part is enabled. Set the TX enable bit and
-+	 * clear the TX disable bit to enable the transmitter.
-+	 */
-+	ctrl = xuartps_readl(XUARTPS_CR_OFFSET);
-+	xuartps_writel((ctrl & ~XUARTPS_CR_TX_DIS) | XUARTPS_CR_TX_EN,
-+		XUARTPS_CR_OFFSET);
-+
- 	uart_console_write(port, s, count, xuartps_console_putchar);
- 	xuartps_console_wait_tx(port);
- 
-+	xuartps_writel(ctrl, XUARTPS_CR_OFFSET);
-+
- 	/* restore interrupt state, it seems like there may be a h/w bug
- 	 * in that the interrupt enable register should not need to be
- 	 * written based on the data sheet
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0022-tty-xuartps-Updating-set_baud_rate.patch b/patches.zynq/0022-tty-xuartps-Updating-set_baud_rate.patch
deleted file mode 100644
index 0411c86c77ecc..0000000000000
--- a/patches.zynq/0022-tty-xuartps-Updating-set_baud_rate.patch
+++ /dev/null
@@ -1,218 +0,0 @@
-From 9ad9305ff9d38b67ab53642596bd59555f92658e Mon Sep 17 00:00:00 2001
-From: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Date: Thu, 17 Oct 2013 14:08:10 -0700
-Subject: tty: xuartps: Updating set_baud_rate()
-
-The original algorithm to find the best baud rate dividers does not necessarily
-find the best set of dividers. And in the worst case may even write illegal
-values to the hardware.
-The new function should make better use of the hardware capabilities and be able
-to provide valid settings for a wider range of baud rates and also input clocks.
-
-Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit e6b39bfd0db207d2e9f3f78468d18f529f3b7901)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/tty/serial/xilinx_uartps.c | 136 +++++++++++++++++++++++++------------
- 1 file changed, 93 insertions(+), 43 deletions(-)
-
-diff --git a/drivers/tty/serial/xilinx_uartps.c b/drivers/tty/serial/xilinx_uartps.c
-index cf5487841362..3f15e8048448 100644
---- a/drivers/tty/serial/xilinx_uartps.c
-+++ b/drivers/tty/serial/xilinx_uartps.c
-@@ -156,6 +156,11 @@ MODULE_PARM_DESC(rx_timeout, "Rx timeout, 1-255");
- #define XUARTPS_SR_TXFULL	0x00000010 /* TX FIFO full */
- #define XUARTPS_SR_RXTRIG	0x00000001 /* Rx Trigger */
- 
-+/* baud dividers min/max values */
-+#define XUARTPS_BDIV_MIN	4
-+#define XUARTPS_BDIV_MAX	255
-+#define XUARTPS_CD_MAX		65535
-+
- /**
-  * struct xuartps - device data
-  * @refclk	Reference clock
-@@ -305,59 +310,94 @@ static irqreturn_t xuartps_isr(int irq, void *dev_id)
- }
- 
- /**
-- * xuartps_set_baud_rate - Calculate and set the baud rate
-- * @port: Handle to the uart port structure
-- * @baud: Baud rate to set
-- *
-+ * xuartps_calc_baud_divs - Calculate baud rate divisors
-+ * @clk: UART module input clock
-+ * @baud: Desired baud rate
-+ * @rbdiv: BDIV value (return value)
-+ * @rcd: CD value (return value)
-+ * @div8: Value for clk_sel bit in mod (return value)
-  * Returns baud rate, requested baud when possible, or actual baud when there
-- *	was too much error
-- **/
--static unsigned int xuartps_set_baud_rate(struct uart_port *port,
--						unsigned int baud)
-+ *	was too much error, zero if no valid divisors are found.
-+ *
-+ * Formula to obtain baud rate is
-+ *	baud_tx/rx rate = clk/CD * (BDIV + 1)
-+ *	input_clk = (Uart User Defined Clock or Apb Clock)
-+ *		depends on UCLKEN in MR Reg
-+ *	clk = input_clk or input_clk/8;
-+ *		depends on CLKS in MR reg
-+ *	CD and BDIV depends on values in
-+ *			baud rate generate register
-+ *			baud rate clock divisor register
-+ */
-+static unsigned int xuartps_calc_baud_divs(unsigned int clk, unsigned int baud,
-+		u32 *rbdiv, u32 *rcd, int *div8)
- {
--	unsigned int sel_clk;
--	unsigned int calc_baud = 0;
--	unsigned int brgr_val, brdiv_val;
-+	u32 cd, bdiv;
-+	unsigned int calc_baud;
-+	unsigned int bestbaud = 0;
- 	unsigned int bauderror;
-+	unsigned int besterror = ~0;
- 
--	/* Formula to obtain baud rate is
--	 *	baud_tx/rx rate = sel_clk/CD * (BDIV + 1)
--	 *	input_clk = (Uart User Defined Clock or Apb Clock)
--	 *		depends on UCLKEN in MR Reg
--	 *	sel_clk = input_clk or input_clk/8;
--	 *		depends on CLKS in MR reg
--	 *	CD and BDIV depends on values in
--	 *			baud rate generate register
--	 *			baud rate clock divisor register
--	 */
--	sel_clk = port->uartclk;
--	if (xuartps_readl(XUARTPS_MR_OFFSET) & XUARTPS_MR_CLKSEL)
--		sel_clk = sel_clk / 8;
--
--	/* Find the best values for baud generation */
--	for (brdiv_val = 4; brdiv_val < 255; brdiv_val++) {
-+	if (baud < clk / ((XUARTPS_BDIV_MAX + 1) * XUARTPS_CD_MAX)) {
-+		*div8 = 1;
-+		clk /= 8;
-+	} else {
-+		*div8 = 0;
-+	}
- 
--		brgr_val = sel_clk / (baud * (brdiv_val + 1));
--		if (brgr_val < 2 || brgr_val > 65535)
-+	for (bdiv = XUARTPS_BDIV_MIN; bdiv <= XUARTPS_BDIV_MAX; bdiv++) {
-+		cd = DIV_ROUND_CLOSEST(clk, baud * (bdiv + 1));
-+		if (cd < 1 || cd > XUARTPS_CD_MAX)
- 			continue;
- 
--		calc_baud = sel_clk / (brgr_val * (brdiv_val + 1));
-+		calc_baud = clk / (cd * (bdiv + 1));
- 
- 		if (baud > calc_baud)
- 			bauderror = baud - calc_baud;
- 		else
- 			bauderror = calc_baud - baud;
- 
--		/* use the values when percent error is acceptable */
--		if (((bauderror * 100) / baud) < 3) {
--			calc_baud = baud;
--			break;
-+		if (besterror > bauderror) {
-+			*rbdiv = bdiv;
-+			*rcd = cd;
-+			bestbaud = calc_baud;
-+			besterror = bauderror;
- 		}
- 	}
-+	/* use the values when percent error is acceptable */
-+	if (((besterror * 100) / baud) < 3)
-+		bestbaud = baud;
-+
-+	return bestbaud;
-+}
- 
--	/* Set the values for the new baud rate */
--	xuartps_writel(brgr_val, XUARTPS_BAUDGEN_OFFSET);
--	xuartps_writel(brdiv_val, XUARTPS_BAUDDIV_OFFSET);
-+/**
-+ * xuartps_set_baud_rate - Calculate and set the baud rate
-+ * @port: Handle to the uart port structure
-+ * @baud: Baud rate to set
-+ * Returns baud rate, requested baud when possible, or actual baud when there
-+ *	   was too much error, zero if no valid divisors are found.
-+ */
-+static unsigned int xuartps_set_baud_rate(struct uart_port *port,
-+		unsigned int baud)
-+{
-+	unsigned int calc_baud;
-+	u32 cd, bdiv;
-+	u32 mreg;
-+	int div8;
-+
-+	calc_baud = xuartps_calc_baud_divs(port->uartclk, baud, &bdiv, &cd,
-+			&div8);
-+
-+	/* Write new divisors to hardware */
-+	mreg = xuartps_readl(XUARTPS_MR_OFFSET);
-+	if (div8)
-+		mreg |= XUARTPS_MR_CLKSEL;
-+	else
-+		mreg &= ~XUARTPS_MR_CLKSEL;
-+	xuartps_writel(mreg, XUARTPS_MR_OFFSET);
-+	xuartps_writel(cd, XUARTPS_BAUDGEN_OFFSET);
-+	xuartps_writel(bdiv, XUARTPS_BAUDDIV_OFFSET);
- 
- 	return calc_baud;
- }
-@@ -495,7 +535,7 @@ static void xuartps_set_termios(struct uart_port *port,
- 				struct ktermios *termios, struct ktermios *old)
- {
- 	unsigned int cval = 0;
--	unsigned int baud;
-+	unsigned int baud, minbaud, maxbaud;
- 	unsigned long flags;
- 	unsigned int ctrl_reg, mode_reg;
- 
-@@ -512,8 +552,14 @@ static void xuartps_set_termios(struct uart_port *port,
- 			(XUARTPS_CR_TX_DIS | XUARTPS_CR_RX_DIS),
- 			XUARTPS_CR_OFFSET);
- 
--	/* Min baud rate = 6bps and Max Baud Rate is 10Mbps for 100Mhz clk */
--	baud = uart_get_baud_rate(port, termios, old, 0, 10000000);
-+	/*
-+	 * Min baud rate = 6bps and Max Baud Rate is 10Mbps for 100Mhz clk
-+	 * min and max baud should be calculated here based on port->uartclk.
-+	 * this way we get a valid baud and can safely call set_baud()
-+	 */
-+	minbaud = port->uartclk / ((XUARTPS_BDIV_MAX + 1) * XUARTPS_CD_MAX * 8);
-+	maxbaud = port->uartclk / (XUARTPS_BDIV_MIN + 1);
-+	baud = uart_get_baud_rate(port, termios, old, minbaud, maxbaud);
- 	baud = xuartps_set_baud_rate(port, baud);
- 	if (tty_termios_baud_rate(termios))
- 		tty_termios_encode_baud_rate(termios, baud, baud);
-@@ -589,13 +635,17 @@ static void xuartps_set_termios(struct uart_port *port,
- 				cval |= XUARTPS_MR_PARITY_MARK;
- 			else
- 				cval |= XUARTPS_MR_PARITY_SPACE;
--		} else if (termios->c_cflag & PARODD)
-+		} else {
-+			if (termios->c_cflag & PARODD)
- 				cval |= XUARTPS_MR_PARITY_ODD;
- 			else
- 				cval |= XUARTPS_MR_PARITY_EVEN;
--	} else
-+		}
-+	} else {
- 		cval |= XUARTPS_MR_PARITY_NONE;
--	xuartps_writel(cval , XUARTPS_MR_OFFSET);
-+	}
-+	cval |= mode_reg & 1;
-+	xuartps_writel(cval, XUARTPS_MR_OFFSET);
- 
- 	spin_unlock_irqrestore(&port->lock, flags);
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0023-tty-xuartps-Dynamically-adjust-to-input-frequency-ch.patch b/patches.zynq/0023-tty-xuartps-Dynamically-adjust-to-input-frequency-ch.patch
deleted file mode 100644
index 1e6eaadd12cc1..0000000000000
--- a/patches.zynq/0023-tty-xuartps-Dynamically-adjust-to-input-frequency-ch.patch
+++ /dev/null
@@ -1,215 +0,0 @@
-From 287e3beb8f7e3e2176b426f418b27f46daa42df9 Mon Sep 17 00:00:00 2001
-From: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Date: Thu, 17 Oct 2013 14:08:11 -0700
-Subject: tty: xuartps: Dynamically adjust to input frequency changes
-
-Add a clock notifier to dynamically handle frequency changes of the
-input clock by reprogramming the UART in order to keep the baud rate
-constant.
-
-Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit c4b0510cc1571ff44e1d6024d92683d49a8bcfde)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/tty/serial/xilinx_uartps.c | 125 +++++++++++++++++++++++++++++++++++--
- 1 file changed, 120 insertions(+), 5 deletions(-)
-
-diff --git a/drivers/tty/serial/xilinx_uartps.c b/drivers/tty/serial/xilinx_uartps.c
-index 3f15e8048448..82195040e906 100644
---- a/drivers/tty/serial/xilinx_uartps.c
-+++ b/drivers/tty/serial/xilinx_uartps.c
-@@ -163,13 +163,20 @@ MODULE_PARM_DESC(rx_timeout, "Rx timeout, 1-255");
- 
- /**
-  * struct xuartps - device data
-- * @refclk	Reference clock
-- * @aperclk	APB clock
-+ * @port		Pointer to the UART port
-+ * @refclk		Reference clock
-+ * @aperclk		APB clock
-+ * @baud		Current baud rate
-+ * @clk_rate_change_nb	Notifier block for clock changes
-  */
- struct xuartps {
-+	struct uart_port	*port;
- 	struct clk		*refclk;
- 	struct clk		*aperclk;
-+	unsigned int		baud;
-+	struct notifier_block	clk_rate_change_nb;
- };
-+#define to_xuartps(_nb) container_of(_nb, struct xuartps, clk_rate_change_nb);
- 
- /**
-  * xuartps_isr - Interrupt handler
-@@ -385,6 +392,7 @@ static unsigned int xuartps_set_baud_rate(struct uart_port *port,
- 	u32 cd, bdiv;
- 	u32 mreg;
- 	int div8;
-+	struct xuartps *xuartps = port->private_data;
- 
- 	calc_baud = xuartps_calc_baud_divs(port->uartclk, baud, &bdiv, &cd,
- 			&div8);
-@@ -398,10 +406,105 @@ static unsigned int xuartps_set_baud_rate(struct uart_port *port,
- 	xuartps_writel(mreg, XUARTPS_MR_OFFSET);
- 	xuartps_writel(cd, XUARTPS_BAUDGEN_OFFSET);
- 	xuartps_writel(bdiv, XUARTPS_BAUDDIV_OFFSET);
-+	xuartps->baud = baud;
- 
- 	return calc_baud;
- }
- 
-+/**
-+ * xuartps_clk_notitifer_cb - Clock notifier callback
-+ * @nb:		Notifier block
-+ * @event:	Notify event
-+ * @data:	Notifier data
-+ * Returns NOTIFY_OK on success, NOTIFY_BAD on error.
-+ */
-+static int xuartps_clk_notifier_cb(struct notifier_block *nb,
-+		unsigned long event, void *data)
-+{
-+	u32 ctrl_reg;
-+	struct uart_port *port;
-+	int locked = 0;
-+	struct clk_notifier_data *ndata = data;
-+	unsigned long flags = 0;
-+	struct xuartps *xuartps = to_xuartps(nb);
-+
-+	port = xuartps->port;
-+	if (port->suspended)
-+		return NOTIFY_OK;
-+
-+	switch (event) {
-+	case PRE_RATE_CHANGE:
-+	{
-+		u32 bdiv;
-+		u32 cd;
-+		int div8;
-+
-+		/*
-+		 * Find out if current baud-rate can be achieved with new clock
-+		 * frequency.
-+		 */
-+		if (!xuartps_calc_baud_divs(ndata->new_rate, xuartps->baud,
-+					&bdiv, &cd, &div8))
-+			return NOTIFY_BAD;
-+
-+		spin_lock_irqsave(&xuartps->port->lock, flags);
-+
-+		/* Disable the TX and RX to set baud rate */
-+		xuartps_writel(xuartps_readl(XUARTPS_CR_OFFSET) |
-+				(XUARTPS_CR_TX_DIS | XUARTPS_CR_RX_DIS),
-+				XUARTPS_CR_OFFSET);
-+
-+		spin_unlock_irqrestore(&xuartps->port->lock, flags);
-+
-+		return NOTIFY_OK;
-+	}
-+	case POST_RATE_CHANGE:
-+		/*
-+		 * Set clk dividers to generate correct baud with new clock
-+		 * frequency.
-+		 */
-+
-+		spin_lock_irqsave(&xuartps->port->lock, flags);
-+
-+		locked = 1;
-+		port->uartclk = ndata->new_rate;
-+
-+		xuartps->baud = xuartps_set_baud_rate(xuartps->port,
-+				xuartps->baud);
-+		/* fall through */
-+	case ABORT_RATE_CHANGE:
-+		if (!locked)
-+			spin_lock_irqsave(&xuartps->port->lock, flags);
-+
-+		/* Set TX/RX Reset */
-+		xuartps_writel(xuartps_readl(XUARTPS_CR_OFFSET) |
-+				(XUARTPS_CR_TXRST | XUARTPS_CR_RXRST),
-+				XUARTPS_CR_OFFSET);
-+
-+		while (xuartps_readl(XUARTPS_CR_OFFSET) &
-+				(XUARTPS_CR_TXRST | XUARTPS_CR_RXRST))
-+			cpu_relax();
-+
-+		/*
-+		 * Clear the RX disable and TX disable bits and then set the TX
-+		 * enable bit and RX enable bit to enable the transmitter and
-+		 * receiver.
-+		 */
-+		xuartps_writel(rx_timeout, XUARTPS_RXTOUT_OFFSET);
-+		ctrl_reg = xuartps_readl(XUARTPS_CR_OFFSET);
-+		xuartps_writel(
-+			(ctrl_reg & ~(XUARTPS_CR_TX_DIS | XUARTPS_CR_RX_DIS)) |
-+			(XUARTPS_CR_TX_EN | XUARTPS_CR_RX_EN),
-+			XUARTPS_CR_OFFSET);
-+
-+		spin_unlock_irqrestore(&xuartps->port->lock, flags);
-+
-+		return NOTIFY_OK;
-+	default:
-+		return NOTIFY_DONE;
-+	}
-+}
-+
- /*----------------------Uart Operations---------------------------*/
- 
- /**
-@@ -1164,13 +1267,19 @@ static int xuartps_probe(struct platform_device *pdev)
- 		goto err_out_clk_disable;
- 	}
- 
-+	xuartps_data->clk_rate_change_nb.notifier_call =
-+			xuartps_clk_notifier_cb;
-+	if (clk_notifier_register(xuartps_data->refclk,
-+				&xuartps_data->clk_rate_change_nb))
-+		dev_warn(&pdev->dev, "Unable to register clock notifier.\n");
-+
- 	/* Initialize the port structure */
- 	port = xuartps_get_port();
- 
- 	if (!port) {
- 		dev_err(&pdev->dev, "Cannot get uart_port structure\n");
- 		rc = -ENODEV;
--		goto err_out_clk_disable;
-+		goto err_out_notif_unreg;
- 	} else {
- 		/* Register the port.
- 		 * This function also registers this device with the tty layer
-@@ -1181,16 +1290,20 @@ static int xuartps_probe(struct platform_device *pdev)
- 		port->dev = &pdev->dev;
- 		port->uartclk = clk_get_rate(xuartps_data->refclk);
- 		port->private_data = xuartps_data;
--                platform_set_drvdata(pdev, port);
-+		xuartps_data->port = port;
-+		platform_set_drvdata(pdev, port);
- 		rc = uart_add_one_port(&xuartps_uart_driver, port);
- 		if (rc) {
- 			dev_err(&pdev->dev,
- 				"uart_add_one_port() failed; err=%i\n", rc);
--			goto err_out_clk_disable;
-+			goto err_out_notif_unreg;
- 		}
- 		return 0;
- 	}
- 
-+err_out_notif_unreg:
-+	clk_notifier_unregister(xuartps_data->refclk,
-+			&xuartps_data->clk_rate_change_nb);
- err_out_clk_disable:
- 	clk_disable_unprepare(xuartps_data->refclk);
- err_out_clk_dis_aper:
-@@ -1212,6 +1325,8 @@ static int xuartps_remove(struct platform_device *pdev)
- 	int rc;
- 
- 	/* Remove the xuartps port from the serial core */
-+	clk_notifier_unregister(xuartps_data->refclk,
-+			&xuartps_data->clk_rate_change_nb);
- 	rc = uart_remove_one_port(&xuartps_uart_driver, port);
- 	port->mapbase = 0;
- 	clk_disable_unprepare(xuartps_data->refclk);
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0024-tty-xuartps-Implement-suspend-resume-callbacks.patch b/patches.zynq/0024-tty-xuartps-Implement-suspend-resume-callbacks.patch
deleted file mode 100644
index 354b21e117716..0000000000000
--- a/patches.zynq/0024-tty-xuartps-Implement-suspend-resume-callbacks.patch
+++ /dev/null
@@ -1,152 +0,0 @@
-From 11c054affc9e6d0074cbf7978f0af3511fc2d19d Mon Sep 17 00:00:00 2001
-From: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Date: Thu, 17 Oct 2013 14:08:12 -0700
-Subject: tty: xuartps: Implement suspend/resume callbacks
-
-Implement suspend and resume callbacks in order to support system
-suspend/hibernation.
-
-Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 4b47d9aa1e3b54b73f9399f3d64b47495cc67a1e)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/tty/serial/xilinx_uartps.c | 114 +++++++++++++++++++++++++++++++++++++
- 1 file changed, 114 insertions(+)
-
-diff --git a/drivers/tty/serial/xilinx_uartps.c b/drivers/tty/serial/xilinx_uartps.c
-index 82195040e906..9ecd8ea4f3ae 100644
---- a/drivers/tty/serial/xilinx_uartps.c
-+++ b/drivers/tty/serial/xilinx_uartps.c
-@@ -1198,6 +1198,119 @@ console_initcall(xuartps_console_init);
- 
- #endif /* CONFIG_SERIAL_XILINX_PS_UART_CONSOLE */
- 
-+#ifdef CONFIG_PM_SLEEP
-+/**
-+ * xuartps_suspend - suspend event
-+ * @device: Pointer to the device structure
-+ *
-+ * Returns 0
-+ */
-+static int xuartps_suspend(struct device *device)
-+{
-+	struct uart_port *port = dev_get_drvdata(device);
-+	struct tty_struct *tty;
-+	struct device *tty_dev;
-+	int may_wake = 0;
-+
-+	/* Get the tty which could be NULL so don't assume it's valid */
-+	tty = tty_port_tty_get(&port->state->port);
-+	if (tty) {
-+		tty_dev = tty->dev;
-+		may_wake = device_may_wakeup(tty_dev);
-+		tty_kref_put(tty);
-+	}
-+
-+	/*
-+	 * Call the API provided in serial_core.c file which handles
-+	 * the suspend.
-+	 */
-+	uart_suspend_port(&xuartps_uart_driver, port);
-+	if (console_suspend_enabled && !may_wake) {
-+		struct xuartps *xuartps = port->private_data;
-+
-+		clk_disable(xuartps->refclk);
-+		clk_disable(xuartps->aperclk);
-+	} else {
-+		unsigned long flags = 0;
-+
-+		spin_lock_irqsave(&port->lock, flags);
-+		/* Empty the receive FIFO 1st before making changes */
-+		while (!(xuartps_readl(XUARTPS_SR_OFFSET) & XUARTPS_SR_RXEMPTY))
-+			xuartps_readl(XUARTPS_FIFO_OFFSET);
-+		/* set RX trigger level to 1 */
-+		xuartps_writel(1, XUARTPS_RXWM_OFFSET);
-+		/* disable RX timeout interrups */
-+		xuartps_writel(XUARTPS_IXR_TOUT, XUARTPS_IDR_OFFSET);
-+		spin_unlock_irqrestore(&port->lock, flags);
-+	}
-+
-+	return 0;
-+}
-+
-+/**
-+ * xuartps_resume - Resume after a previous suspend
-+ * @device: Pointer to the device structure
-+ *
-+ * Returns 0
-+ */
-+static int xuartps_resume(struct device *device)
-+{
-+	struct uart_port *port = dev_get_drvdata(device);
-+	unsigned long flags = 0;
-+	u32 ctrl_reg;
-+	struct tty_struct *tty;
-+	struct device *tty_dev;
-+	int may_wake = 0;
-+
-+	/* Get the tty which could be NULL so don't assume it's valid */
-+	tty = tty_port_tty_get(&port->state->port);
-+	if (tty) {
-+		tty_dev = tty->dev;
-+		may_wake = device_may_wakeup(tty_dev);
-+		tty_kref_put(tty);
-+	}
-+
-+	if (console_suspend_enabled && !may_wake) {
-+		struct xuartps *xuartps = port->private_data;
-+
-+		clk_enable(xuartps->aperclk);
-+		clk_enable(xuartps->refclk);
-+
-+		spin_lock_irqsave(&port->lock, flags);
-+
-+		/* Set TX/RX Reset */
-+		xuartps_writel(xuartps_readl(XUARTPS_CR_OFFSET) |
-+				(XUARTPS_CR_TXRST | XUARTPS_CR_RXRST),
-+				XUARTPS_CR_OFFSET);
-+		while (xuartps_readl(XUARTPS_CR_OFFSET) &
-+				(XUARTPS_CR_TXRST | XUARTPS_CR_RXRST))
-+			cpu_relax();
-+
-+		/* restore rx timeout value */
-+		xuartps_writel(rx_timeout, XUARTPS_RXTOUT_OFFSET);
-+		/* Enable Tx/Rx */
-+		ctrl_reg = xuartps_readl(XUARTPS_CR_OFFSET);
-+		xuartps_writel(
-+			(ctrl_reg & ~(XUARTPS_CR_TX_DIS | XUARTPS_CR_RX_DIS)) |
-+			(XUARTPS_CR_TX_EN | XUARTPS_CR_RX_EN),
-+			XUARTPS_CR_OFFSET);
-+
-+		spin_unlock_irqrestore(&port->lock, flags);
-+	} else {
-+		spin_lock_irqsave(&port->lock, flags);
-+		/* restore original rx trigger level */
-+		xuartps_writel(rx_trigger_level, XUARTPS_RXWM_OFFSET);
-+		/* enable RX timeout interrupt */
-+		xuartps_writel(XUARTPS_IXR_TOUT, XUARTPS_IER_OFFSET);
-+		spin_unlock_irqrestore(&port->lock, flags);
-+	}
-+
-+	return uart_resume_port(&xuartps_uart_driver, port);
-+}
-+#endif /* ! CONFIG_PM_SLEEP */
-+
-+static SIMPLE_DEV_PM_OPS(xuartps_dev_pm_ops, xuartps_suspend, xuartps_resume);
-+
- /** Structure Definitions
-  */
- static struct uart_driver xuartps_uart_driver = {
-@@ -1348,6 +1461,7 @@ static struct platform_driver xuartps_platform_driver = {
- 		.owner = THIS_MODULE,
- 		.name = XUARTPS_NAME,		/* Driver name */
- 		.of_match_table = xuartps_of_match,
-+		.pm = &xuartps_dev_pm_ops,
- 		},
- };
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0025-tty-xuartps-Update-copyright-information.patch b/patches.zynq/0025-tty-xuartps-Update-copyright-information.patch
deleted file mode 100644
index aa89898ad9778..0000000000000
--- a/patches.zynq/0025-tty-xuartps-Update-copyright-information.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From 2f9b1698a6b1a02f3aa6bc80d843341260c97915 Mon Sep 17 00:00:00 2001
-From: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Date: Thu, 17 Oct 2013 14:08:13 -0700
-Subject: tty: xuartps: Update copyright information
-
-Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 37cd940b2044ca0c481e70742da37278a2d736ae)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/tty/serial/xilinx_uartps.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/tty/serial/xilinx_uartps.c b/drivers/tty/serial/xilinx_uartps.c
-index 9ecd8ea4f3ae..c7c96c2f149c 100644
---- a/drivers/tty/serial/xilinx_uartps.c
-+++ b/drivers/tty/serial/xilinx_uartps.c
-@@ -1,7 +1,7 @@
- /*
-  * Xilinx PS UART driver
-  *
-- * 2011 (c) Xilinx Inc.
-+ * 2011 - 2013 (C) Xilinx Inc.
-  *
-  * This program is free software; you can redistribute it
-  * and/or modify it under the terms of the GNU General Public
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0026-tty-xuartps-Fix-may-be-used-uninitialized-build-warn.patch b/patches.zynq/0026-tty-xuartps-Fix-may-be-used-uninitialized-build-warn.patch
deleted file mode 100644
index cc954710bf2aa..0000000000000
--- a/patches.zynq/0026-tty-xuartps-Fix-may-be-used-uninitialized-build-warn.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From 4cc7cfa290341d350951af60eb237a0bc4b8bb99 Mon Sep 17 00:00:00 2001
-From: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Date: Mon, 21 Oct 2013 16:40:59 -0700
-Subject: tty: xuartps: Fix "may be used uninitialized" build warning
-
-Initialize varibles for which a 'may be used uninitalized' warning is
-issued.
-
-Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Reported-by: kbuild test robot <fengguang.wu@intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit d54b181ea65682914cae0430f2a1efcbb6517dba)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/tty/serial/xilinx_uartps.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/tty/serial/xilinx_uartps.c b/drivers/tty/serial/xilinx_uartps.c
-index c7c96c2f149c..5ac6c480df43 100644
---- a/drivers/tty/serial/xilinx_uartps.c
-+++ b/drivers/tty/serial/xilinx_uartps.c
-@@ -389,7 +389,7 @@ static unsigned int xuartps_set_baud_rate(struct uart_port *port,
- 		unsigned int baud)
- {
- 	unsigned int calc_baud;
--	u32 cd, bdiv;
-+	u32 cd = 0, bdiv = 0;
- 	u32 mreg;
- 	int div8;
- 	struct xuartps *xuartps = port->private_data;
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0027-tty-xuartps-Fix-build-error-due-to-missing-forward-d.patch b/patches.zynq/0027-tty-xuartps-Fix-build-error-due-to-missing-forward-d.patch
deleted file mode 100644
index b2daae9fd99b8..0000000000000
--- a/patches.zynq/0027-tty-xuartps-Fix-build-error-due-to-missing-forward-d.patch
+++ /dev/null
@@ -1,70 +0,0 @@
-From 34f391544b7f23c038293fff1b51a93e0cf3d598 Mon Sep 17 00:00:00 2001
-From: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Date: Mon, 21 Oct 2013 16:41:00 -0700
-Subject: tty: xuartps: Fix build error due to missing forward declaration
-
-If CONFIG_PM_SLEEP is enabled and CONFIG_SERIAL_XILINX_PS_UART_CONSOLE
-is not, a forward declaration of the uart_driver struct is not
-included, leading to a build error due to an undeclared variable.
-Fixing this by moving the definition of the struct uart_driver before
-the definition of the suspend/resume callbacks.
-
-Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Reported-by: kbuild test robot <fengguang.wu@intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit d3641f64bc71765682754722fd42fae24366bb3a)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/tty/serial/xilinx_uartps.c | 28 ++++++++++++++--------------
- 1 file changed, 14 insertions(+), 14 deletions(-)
-
-diff --git a/drivers/tty/serial/xilinx_uartps.c b/drivers/tty/serial/xilinx_uartps.c
-index 5ac6c480df43..ca4a2f1fbca9 100644
---- a/drivers/tty/serial/xilinx_uartps.c
-+++ b/drivers/tty/serial/xilinx_uartps.c
-@@ -1198,6 +1198,20 @@ console_initcall(xuartps_console_init);
- 
- #endif /* CONFIG_SERIAL_XILINX_PS_UART_CONSOLE */
- 
-+/** Structure Definitions
-+ */
-+static struct uart_driver xuartps_uart_driver = {
-+	.owner		= THIS_MODULE,		/* Owner */
-+	.driver_name	= XUARTPS_NAME,		/* Driver name */
-+	.dev_name	= XUARTPS_TTY_NAME,	/* Node name */
-+	.major		= XUARTPS_MAJOR,	/* Major number */
-+	.minor		= XUARTPS_MINOR,	/* Minor number */
-+	.nr		= XUARTPS_NR_PORTS,	/* Number of UART ports */
-+#ifdef CONFIG_SERIAL_XILINX_PS_UART_CONSOLE
-+	.cons		= &xuartps_console,	/* Console */
-+#endif
-+};
-+
- #ifdef CONFIG_PM_SLEEP
- /**
-  * xuartps_suspend - suspend event
-@@ -1311,20 +1325,6 @@ static int xuartps_resume(struct device *device)
- 
- static SIMPLE_DEV_PM_OPS(xuartps_dev_pm_ops, xuartps_suspend, xuartps_resume);
- 
--/** Structure Definitions
-- */
--static struct uart_driver xuartps_uart_driver = {
--	.owner		= THIS_MODULE,		/* Owner */
--	.driver_name	= XUARTPS_NAME,		/* Driver name */
--	.dev_name	= XUARTPS_TTY_NAME,	/* Node name */
--	.major		= XUARTPS_MAJOR,	/* Major number */
--	.minor		= XUARTPS_MINOR,	/* Minor number */
--	.nr		= XUARTPS_NR_PORTS,	/* Number of UART ports */
--#ifdef CONFIG_SERIAL_XILINX_PS_UART_CONSOLE
--	.cons		= &xuartps_console,	/* Console */
--#endif
--};
--
- /* ---------------------------------------------------------------------
-  * Platform bus binding
-  */
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0028-tty-xuartps-Fix-build-error-when-COMMON_CLK-is-not-s.patch b/patches.zynq/0028-tty-xuartps-Fix-build-error-when-COMMON_CLK-is-not-s.patch
deleted file mode 100644
index 6921786226d73..0000000000000
--- a/patches.zynq/0028-tty-xuartps-Fix-build-error-when-COMMON_CLK-is-not-s.patch
+++ /dev/null
@@ -1,78 +0,0 @@
-From 987416b050d5a2866459fae75ee599bb2bb5e903 Mon Sep 17 00:00:00 2001
-From: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Date: Mon, 21 Oct 2013 16:41:01 -0700
-Subject: tty: xuartps: Fix build error when COMMON_CLK is not set
-
-Clock notifiers are only available when CONFIG_COMMON_CLK is enabled.
-Hence all notifier related code has to be protected by corresponsing
-ifdefs.
-
-Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Reported-by: kbuild test robot <fengguang.wu@intel.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 7ac57347c23de6b6fcaf8f0a1f91067cedea57bc)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/tty/serial/xilinx_uartps.c | 8 ++++++++
- 1 file changed, 8 insertions(+)
-
-diff --git a/drivers/tty/serial/xilinx_uartps.c b/drivers/tty/serial/xilinx_uartps.c
-index ca4a2f1fbca9..e46e9f3f19b9 100644
---- a/drivers/tty/serial/xilinx_uartps.c
-+++ b/drivers/tty/serial/xilinx_uartps.c
-@@ -411,6 +411,7 @@ static unsigned int xuartps_set_baud_rate(struct uart_port *port,
- 	return calc_baud;
- }
- 
-+#ifdef CONFIG_COMMON_CLK
- /**
-  * xuartps_clk_notitifer_cb - Clock notifier callback
-  * @nb:		Notifier block
-@@ -504,6 +505,7 @@ static int xuartps_clk_notifier_cb(struct notifier_block *nb,
- 		return NOTIFY_DONE;
- 	}
- }
-+#endif
- 
- /*----------------------Uart Operations---------------------------*/
- 
-@@ -1380,11 +1382,13 @@ static int xuartps_probe(struct platform_device *pdev)
- 		goto err_out_clk_disable;
- 	}
- 
-+#ifdef CONFIG_COMMON_CLK
- 	xuartps_data->clk_rate_change_nb.notifier_call =
- 			xuartps_clk_notifier_cb;
- 	if (clk_notifier_register(xuartps_data->refclk,
- 				&xuartps_data->clk_rate_change_nb))
- 		dev_warn(&pdev->dev, "Unable to register clock notifier.\n");
-+#endif
- 
- 	/* Initialize the port structure */
- 	port = xuartps_get_port();
-@@ -1415,8 +1419,10 @@ static int xuartps_probe(struct platform_device *pdev)
- 	}
- 
- err_out_notif_unreg:
-+#ifdef CONFIG_COMMON_CLK
- 	clk_notifier_unregister(xuartps_data->refclk,
- 			&xuartps_data->clk_rate_change_nb);
-+#endif
- err_out_clk_disable:
- 	clk_disable_unprepare(xuartps_data->refclk);
- err_out_clk_dis_aper:
-@@ -1438,8 +1444,10 @@ static int xuartps_remove(struct platform_device *pdev)
- 	int rc;
- 
- 	/* Remove the xuartps port from the serial core */
-+#ifdef CONFIG_COMMON_CLK
- 	clk_notifier_unregister(xuartps_data->refclk,
- 			&xuartps_data->clk_rate_change_nb);
-+#endif
- 	rc = uart_remove_one_port(&xuartps_uart_driver, port);
- 	port->mapbase = 0;
- 	clk_disable_unprepare(xuartps_data->refclk);
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0029-GPIO-xilinx-Simplify-driver-probe-function.patch b/patches.zynq/0029-GPIO-xilinx-Simplify-driver-probe-function.patch
deleted file mode 100644
index 94709b7134c2e..0000000000000
--- a/patches.zynq/0029-GPIO-xilinx-Simplify-driver-probe-function.patch
+++ /dev/null
@@ -1,60 +0,0 @@
-From 60a225735b974232b7b1e0dcce1f2812af26c09d Mon Sep 17 00:00:00 2001
-From: Michal Simek <michal.simek@xilinx.com>
-Date: Mon, 3 Jun 2013 14:31:16 +0200
-Subject: GPIO: xilinx: Simplify driver probe function
-
-Simplification is done by using OF helper function
-which increase readability of code and remove
-(if (var) var = be32_to_cpup;) assignment.
-
-Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-(cherry picked from commit 6f8bf50031a68f533ae7eba3d3277c38ee7806f5)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/gpio/gpio-xilinx.c | 24 ++++++++++--------------
- 1 file changed, 10 insertions(+), 14 deletions(-)
-
-diff --git a/drivers/gpio/gpio-xilinx.c b/drivers/gpio/gpio-xilinx.c
-index 9ae7aa8ca48a..2aad53497a63 100644
---- a/drivers/gpio/gpio-xilinx.c
-+++ b/drivers/gpio/gpio-xilinx.c
-@@ -170,24 +170,20 @@ static int xgpio_of_probe(struct device_node *np)
- 		return -ENOMEM;
- 
- 	/* Update GPIO state shadow register with default value */
--	tree_info = of_get_property(np, "xlnx,dout-default", NULL);
--	if (tree_info)
--		chip->gpio_state = be32_to_cpup(tree_info);
-+	of_property_read_u32(np, "xlnx,dout-default", &chip->gpio_state);
-+
-+	/* By default, all pins are inputs */
-+	chip->gpio_dir = 0xFFFFFFFF;
- 
- 	/* Update GPIO direction shadow register with default value */
--	chip->gpio_dir = 0xFFFFFFFF; /* By default, all pins are inputs */
--	tree_info = of_get_property(np, "xlnx,tri-default", NULL);
--	if (tree_info)
--		chip->gpio_dir = be32_to_cpup(tree_info);
-+	of_property_read_u32(np, "xlnx,tri-default", &chip->gpio_dir);
-+
-+	/* By default assume full GPIO controller */
-+	chip->mmchip.gc.ngpio = 32;
- 
- 	/* Check device node and parent device node for device width */
--	chip->mmchip.gc.ngpio = 32; /* By default assume full GPIO controller */
--	tree_info = of_get_property(np, "xlnx,gpio-width", NULL);
--	if (!tree_info)
--		tree_info = of_get_property(np->parent,
--					    "xlnx,gpio-width", NULL);
--	if (tree_info)
--		chip->mmchip.gc.ngpio = be32_to_cpup(tree_info);
-+	of_property_read_u32(np, "xlnx,gpio-width",
-+			      (u32 *)&chip->mmchip.gc.ngpio);
- 
- 	spin_lock_init(&chip->gpio_lock);
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0030-GPIO-xilinx-Add-support-for-dual-channel.patch b/patches.zynq/0030-GPIO-xilinx-Add-support-for-dual-channel.patch
deleted file mode 100644
index 1dc40d12346a1..0000000000000
--- a/patches.zynq/0030-GPIO-xilinx-Add-support-for-dual-channel.patch
+++ /dev/null
@@ -1,215 +0,0 @@
-From 182740a085e83bd94a291554eee572946ada657e Mon Sep 17 00:00:00 2001
-From: Michal Simek <michal.simek@xilinx.com>
-Date: Mon, 3 Jun 2013 14:31:17 +0200
-Subject: GPIO: xilinx: Add support for dual channel
-
-Supporting the second channel in the driver.
-Offset is 0x8 and both channnels share the same
-IRQ.
-
-Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-(cherry picked from commit 74600ee017557b2ebb669e45237f655e9e2fbac8)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/gpio/gpio-xilinx.c | 103 +++++++++++++++++++++++++++++++++++++++------
- 1 file changed, 91 insertions(+), 12 deletions(-)
-
-diff --git a/drivers/gpio/gpio-xilinx.c b/drivers/gpio/gpio-xilinx.c
-index 2aad53497a63..626eaa876f09 100644
---- a/drivers/gpio/gpio-xilinx.c
-+++ b/drivers/gpio/gpio-xilinx.c
-@@ -1,7 +1,7 @@
- /*
-- * Xilinx gpio driver
-+ * Xilinx gpio driver for xps/axi_gpio IP.
-  *
-- * Copyright 2008 Xilinx, Inc.
-+ * Copyright 2008 - 2013 Xilinx, Inc.
-  *
-  * This program is free software; you can redistribute it and/or modify
-  * it under the terms of the GNU General Public License version 2
-@@ -12,6 +12,7 @@
-  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
-  */
- 
-+#include <linux/bitops.h>
- #include <linux/init.h>
- #include <linux/errno.h>
- #include <linux/module.h>
-@@ -26,11 +27,26 @@
- #define XGPIO_DATA_OFFSET   (0x0)	/* Data register  */
- #define XGPIO_TRI_OFFSET    (0x4)	/* I/O direction register  */
- 
-+#define XGPIO_CHANNEL_OFFSET	0x8
-+
-+/* Read/Write access to the GPIO registers */
-+#define xgpio_readreg(offset)		in_be32(offset)
-+#define xgpio_writereg(offset, val)	out_be32(offset, val)
-+
-+/**
-+ * struct xgpio_instance - Stores information about GPIO device
-+ * struct of_mm_gpio_chip mmchip: OF GPIO chip for memory mapped banks
-+ * gpio_state: GPIO state shadow register
-+ * gpio_dir: GPIO direction shadow register
-+ * offset: GPIO channel offset
-+ * gpio_lock: Lock used for synchronization
-+ */
- struct xgpio_instance {
- 	struct of_mm_gpio_chip mmchip;
--	u32 gpio_state;		/* GPIO state shadow register */
--	u32 gpio_dir;		/* GPIO direction shadow register */
--	spinlock_t gpio_lock;	/* Lock used for synchronization */
-+	u32 gpio_state;
-+	u32 gpio_dir;
-+	u32 offset;
-+	spinlock_t gpio_lock;
- };
- 
- /**
-@@ -44,8 +60,12 @@ struct xgpio_instance {
- static int xgpio_get(struct gpio_chip *gc, unsigned int gpio)
- {
- 	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
-+	struct xgpio_instance *chip =
-+	    container_of(mm_gc, struct xgpio_instance, mmchip);
- 
--	return (in_be32(mm_gc->regs + XGPIO_DATA_OFFSET) >> gpio) & 1;
-+	void __iomem *regs = mm_gc->regs + chip->offset;
-+
-+	return !!(xgpio_readreg(regs + XGPIO_DATA_OFFSET) & BIT(gpio));
- }
- 
- /**
-@@ -63,6 +83,7 @@ static void xgpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
- 	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
- 	struct xgpio_instance *chip =
- 	    container_of(mm_gc, struct xgpio_instance, mmchip);
-+	void __iomem *regs = mm_gc->regs;
- 
- 	spin_lock_irqsave(&chip->gpio_lock, flags);
- 
-@@ -71,7 +92,9 @@ static void xgpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
- 		chip->gpio_state |= 1 << gpio;
- 	else
- 		chip->gpio_state &= ~(1 << gpio);
--	out_be32(mm_gc->regs + XGPIO_DATA_OFFSET, chip->gpio_state);
-+
-+	xgpio_writereg(regs + chip->offset + XGPIO_DATA_OFFSET,
-+							 chip->gpio_state);
- 
- 	spin_unlock_irqrestore(&chip->gpio_lock, flags);
- }
-@@ -91,12 +114,13 @@ static int xgpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
- 	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
- 	struct xgpio_instance *chip =
- 	    container_of(mm_gc, struct xgpio_instance, mmchip);
-+	void __iomem *regs = mm_gc->regs;
- 
- 	spin_lock_irqsave(&chip->gpio_lock, flags);
- 
- 	/* Set the GPIO bit in shadow register and set direction as input */
- 	chip->gpio_dir |= (1 << gpio);
--	out_be32(mm_gc->regs + XGPIO_TRI_OFFSET, chip->gpio_dir);
-+	xgpio_writereg(regs + chip->offset + XGPIO_TRI_OFFSET, chip->gpio_dir);
- 
- 	spin_unlock_irqrestore(&chip->gpio_lock, flags);
- 
-@@ -119,6 +143,7 @@ static int xgpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
- 	struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
- 	struct xgpio_instance *chip =
- 	    container_of(mm_gc, struct xgpio_instance, mmchip);
-+	void __iomem *regs = mm_gc->regs;
- 
- 	spin_lock_irqsave(&chip->gpio_lock, flags);
- 
-@@ -127,11 +152,12 @@ static int xgpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
- 		chip->gpio_state |= 1 << gpio;
- 	else
- 		chip->gpio_state &= ~(1 << gpio);
--	out_be32(mm_gc->regs + XGPIO_DATA_OFFSET, chip->gpio_state);
-+	xgpio_writereg(regs + chip->offset + XGPIO_DATA_OFFSET,
-+		       chip->gpio_state);
- 
- 	/* Clear the GPIO bit in shadow register and set direction as output */
- 	chip->gpio_dir &= (~(1 << gpio));
--	out_be32(mm_gc->regs + XGPIO_TRI_OFFSET, chip->gpio_dir);
-+	xgpio_writereg(regs + chip->offset + XGPIO_TRI_OFFSET, chip->gpio_dir);
- 
- 	spin_unlock_irqrestore(&chip->gpio_lock, flags);
- 
-@@ -147,8 +173,10 @@ static void xgpio_save_regs(struct of_mm_gpio_chip *mm_gc)
- 	struct xgpio_instance *chip =
- 	    container_of(mm_gc, struct xgpio_instance, mmchip);
- 
--	out_be32(mm_gc->regs + XGPIO_DATA_OFFSET, chip->gpio_state);
--	out_be32(mm_gc->regs + XGPIO_TRI_OFFSET, chip->gpio_dir);
-+	xgpio_writereg(mm_gc->regs + chip->offset + XGPIO_DATA_OFFSET,
-+							chip->gpio_state);
-+	xgpio_writereg(mm_gc->regs + chip->offset + XGPIO_TRI_OFFSET,
-+							 chip->gpio_dir);
- }
- 
- /**
-@@ -202,6 +230,57 @@ static int xgpio_of_probe(struct device_node *np)
- 		       np->full_name, status);
- 		return status;
- 	}
-+
-+	pr_info("XGpio: %s: registered, base is %d\n", np->full_name,
-+							chip->mmchip.gc.base);
-+
-+	tree_info = of_get_property(np, "xlnx,is-dual", NULL);
-+	if (tree_info && be32_to_cpup(tree_info)) {
-+		chip = kzalloc(sizeof(*chip), GFP_KERNEL);
-+		if (!chip)
-+			return -ENOMEM;
-+
-+		/* Add dual channel offset */
-+		chip->offset = XGPIO_CHANNEL_OFFSET;
-+
-+		/* Update GPIO state shadow register with default value */
-+		of_property_read_u32(np, "xlnx,dout-default-2",
-+				     &chip->gpio_state);
-+
-+		/* By default, all pins are inputs */
-+		chip->gpio_dir = 0xFFFFFFFF;
-+
-+		/* Update GPIO direction shadow register with default value */
-+		of_property_read_u32(np, "xlnx,tri-default-2", &chip->gpio_dir);
-+
-+		/* By default assume full GPIO controller */
-+		chip->mmchip.gc.ngpio = 32;
-+
-+		/* Check device node and parent device node for device width */
-+		of_property_read_u32(np, "xlnx,gpio2-width",
-+				     (u32 *)&chip->mmchip.gc.ngpio);
-+
-+		spin_lock_init(&chip->gpio_lock);
-+
-+		chip->mmchip.gc.direction_input = xgpio_dir_in;
-+		chip->mmchip.gc.direction_output = xgpio_dir_out;
-+		chip->mmchip.gc.get = xgpio_get;
-+		chip->mmchip.gc.set = xgpio_set;
-+
-+		chip->mmchip.save_regs = xgpio_save_regs;
-+
-+		/* Call the OF gpio helper to setup and register the GPIO dev */
-+		status = of_mm_gpiochip_add(np, &chip->mmchip);
-+		if (status) {
-+			kfree(chip);
-+			pr_err("%s: error in probe function with status %d\n",
-+			np->full_name, status);
-+			return status;
-+		}
-+		pr_info("XGpio: %s: dual channel registered, base is %d\n",
-+					np->full_name, chip->mmchip.gc.base);
-+	}
-+
- 	return 0;
- }
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0031-GPIO-xilinx-Use-__raw_readl-__raw_writel-IO-function.patch b/patches.zynq/0031-GPIO-xilinx-Use-__raw_readl-__raw_writel-IO-function.patch
deleted file mode 100644
index 767acc3524e38..0000000000000
--- a/patches.zynq/0031-GPIO-xilinx-Use-__raw_readl-__raw_writel-IO-function.patch
+++ /dev/null
@@ -1,49 +0,0 @@
-From bd45cfaebc9d2b27a8d6ba0395e91500129f9f78 Mon Sep 17 00:00:00 2001
-From: Michal Simek <michal.simek@xilinx.com>
-Date: Mon, 3 Jun 2013 14:31:18 +0200
-Subject: GPIO: xilinx: Use __raw_readl/__raw_writel IO functions
-
-This driver can be used on Xilinx ARM Zynq platform
-where in_be32/out_be32 functions are not implemented.
-Use __raw_readl/__raw_writel functions which are
-implemented on Microblaze and PowerPC.
-For ARM readl/writel functions are used instead.
-
-The correct way how to implement this is to detect
-endians directly on IP. But for the gpio case
-without interrupt connected(it means without
-interrupt logic) there are just 2 registers
-data and tristate where auto detection can't be done.
-
-Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-(cherry picked from commit cc090d61d1a88f30f2fb75a91bce684ad1bd2e94)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/gpio/gpio-xilinx.c | 9 +++++++--
- 1 file changed, 7 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpio/gpio-xilinx.c b/drivers/gpio/gpio-xilinx.c
-index 626eaa876f09..791ddaedbfb4 100644
---- a/drivers/gpio/gpio-xilinx.c
-+++ b/drivers/gpio/gpio-xilinx.c
-@@ -30,8 +30,13 @@
- #define XGPIO_CHANNEL_OFFSET	0x8
- 
- /* Read/Write access to the GPIO registers */
--#define xgpio_readreg(offset)		in_be32(offset)
--#define xgpio_writereg(offset, val)	out_be32(offset, val)
-+#ifdef CONFIG_ARCH_ZYNQ
-+# define xgpio_readreg(offset)		readl(offset)
-+# define xgpio_writereg(offset, val)	writel(val, offset)
-+#else
-+# define xgpio_readreg(offset)		__raw_readl(offset)
-+# define xgpio_writereg(offset, val)	__raw_writel(val, offset)
-+#endif
- 
- /**
-  * struct xgpio_instance - Stores information about GPIO device
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0032-GPIO-xilinx-Use-BIT-macro.patch b/patches.zynq/0032-GPIO-xilinx-Use-BIT-macro.patch
deleted file mode 100644
index 672380f113761..0000000000000
--- a/patches.zynq/0032-GPIO-xilinx-Use-BIT-macro.patch
+++ /dev/null
@@ -1,62 +0,0 @@
-From 2fb27a6b5067c894c64152bc57d08def0ccfb530 Mon Sep 17 00:00:00 2001
-From: Michal Simek <michal.simek@xilinx.com>
-Date: Mon, 3 Jun 2013 14:31:19 +0200
-Subject: GPIO: xilinx: Use BIT macro
-
-Use BIT macro from linux/bitops.h.
-
-Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-(cherry picked from commit 9f7f0b2bbcff719233e6724d756a8c93d3285ade)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/gpio/gpio-xilinx.c | 12 ++++++------
- 1 file changed, 6 insertions(+), 6 deletions(-)
-
-diff --git a/drivers/gpio/gpio-xilinx.c b/drivers/gpio/gpio-xilinx.c
-index 791ddaedbfb4..792a05ad4649 100644
---- a/drivers/gpio/gpio-xilinx.c
-+++ b/drivers/gpio/gpio-xilinx.c
-@@ -94,9 +94,9 @@ static void xgpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
- 
- 	/* Write to GPIO signal and set its direction to output */
- 	if (val)
--		chip->gpio_state |= 1 << gpio;
-+		chip->gpio_state |= BIT(gpio);
- 	else
--		chip->gpio_state &= ~(1 << gpio);
-+		chip->gpio_state &= ~BIT(gpio);
- 
- 	xgpio_writereg(regs + chip->offset + XGPIO_DATA_OFFSET,
- 							 chip->gpio_state);
-@@ -124,7 +124,7 @@ static int xgpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
- 	spin_lock_irqsave(&chip->gpio_lock, flags);
- 
- 	/* Set the GPIO bit in shadow register and set direction as input */
--	chip->gpio_dir |= (1 << gpio);
-+	chip->gpio_dir |= BIT(gpio);
- 	xgpio_writereg(regs + chip->offset + XGPIO_TRI_OFFSET, chip->gpio_dir);
- 
- 	spin_unlock_irqrestore(&chip->gpio_lock, flags);
-@@ -154,14 +154,14 @@ static int xgpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
- 
- 	/* Write state of GPIO signal */
- 	if (val)
--		chip->gpio_state |= 1 << gpio;
-+		chip->gpio_state |= BIT(gpio);
- 	else
--		chip->gpio_state &= ~(1 << gpio);
-+		chip->gpio_state &= ~BIT(gpio);
- 	xgpio_writereg(regs + chip->offset + XGPIO_DATA_OFFSET,
- 		       chip->gpio_state);
- 
- 	/* Clear the GPIO bit in shadow register and set direction as output */
--	chip->gpio_dir &= (~(1 << gpio));
-+	chip->gpio_dir &= ~BIT(gpio);
- 	xgpio_writereg(regs + chip->offset + XGPIO_TRI_OFFSET, chip->gpio_dir);
- 
- 	spin_unlock_irqrestore(&chip->gpio_lock, flags);
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0033-arm-dt-zynq-Use-status-property-for-UART-nodes.patch b/patches.zynq/0033-arm-dt-zynq-Use-status-property-for-UART-nodes.patch
deleted file mode 100644
index 67ce2a61dd659..0000000000000
--- a/patches.zynq/0033-arm-dt-zynq-Use-status-property-for-UART-nodes.patch
+++ /dev/null
@@ -1,59 +0,0 @@
-From 10cc62facb9705eddcce5f684e89430deb641923 Mon Sep 17 00:00:00 2001
-From: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Date: Thu, 13 Jun 2013 09:37:16 -0700
-Subject: arm: dt: zynq: Use 'status' property for UART nodes
-
-Set the default status for UARTs to disabled in the zynq-7000.dtsi file
-and let board dts files enable the UARTs on demand.
-
-Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Reviewed-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
-Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-(cherry picked from commit ec11ebcf2fab2d367e18c45712f7216aa6452243)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- arch/arm/boot/dts/zynq-7000.dtsi | 2 ++
- arch/arm/boot/dts/zynq-zc702.dts | 6 +++++-
- 2 files changed, 7 insertions(+), 1 deletion(-)
-
-diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi
-index 952b61d39b0a..713ba2adc76c 100644
---- a/arch/arm/boot/dts/zynq-7000.dtsi
-+++ b/arch/arm/boot/dts/zynq-7000.dtsi
-@@ -49,6 +49,7 @@
- 
- 		uart0: uart@e0000000 {
- 			compatible = "xlnx,xuartps";
-+			status = "disabled";
- 			clocks = <&clkc 23>, <&clkc 40>;
- 			clock-names = "ref_clk", "aper_clk";
- 			reg = <0xE0000000 0x1000>;
-@@ -57,6 +58,7 @@
- 
- 		uart1: uart@e0001000 {
- 			compatible = "xlnx,xuartps";
-+			status = "disabled";
- 			clocks = <&clkc 24>, <&clkc 41>;
- 			clock-names = "ref_clk", "aper_clk";
- 			reg = <0xE0001000 0x1000>;
-diff --git a/arch/arm/boot/dts/zynq-zc702.dts b/arch/arm/boot/dts/zynq-zc702.dts
-index e25a307438ad..21aea99a067b 100644
---- a/arch/arm/boot/dts/zynq-zc702.dts
-+++ b/arch/arm/boot/dts/zynq-zc702.dts
-@@ -24,7 +24,11 @@
- 	};
- 
- 	chosen {
--		bootargs = "console=ttyPS1,115200 earlyprintk";
-+		bootargs = "console=ttyPS0,115200 earlyprintk";
- 	};
- 
- };
-+
-+&uart1 {
-+	status = "okay";
-+};
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0034-arm-zynq-dt-Set-correct-L2-ram-latencies.patch b/patches.zynq/0034-arm-zynq-dt-Set-correct-L2-ram-latencies.patch
deleted file mode 100644
index edec022422724..0000000000000
--- a/patches.zynq/0034-arm-zynq-dt-Set-correct-L2-ram-latencies.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From 29dc40ba4b009e2b3e5fa1feb9bfb148af3aa7f7 Mon Sep 17 00:00:00 2001
-From: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Date: Wed, 31 Jul 2013 16:24:59 -0700
-Subject: arm: zynq: dt: Set correct L2 ram latencies
-
-Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-(cherry picked from commit 39c41df9c1950fba0ee6a4e7a63be281e89fe437)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- arch/arm/boot/dts/zynq-7000.dtsi | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi
-index 713ba2adc76c..e7f73b2e4550 100644
---- a/arch/arm/boot/dts/zynq-7000.dtsi
-+++ b/arch/arm/boot/dts/zynq-7000.dtsi
-@@ -41,8 +41,8 @@
- 		L2: cache-controller {
- 			compatible = "arm,pl310-cache";
- 			reg = <0xF8F02000 0x1000>;
--			arm,data-latency = <2 3 2>;
--			arm,tag-latency = <2 3 2>;
-+			arm,data-latency = <3 2 2>;
-+			arm,tag-latency = <2 2 2>;
- 			cache-unified;
- 			cache-level = <2>;
- 		};
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0035-clk-zynq-Add-clock-controller-driver.patch b/patches.zynq/0035-clk-zynq-Add-clock-controller-driver.patch
deleted file mode 100644
index f4af10e600ac1..0000000000000
--- a/patches.zynq/0035-clk-zynq-Add-clock-controller-driver.patch
+++ /dev/null
@@ -1,674 +0,0 @@
-From 31b50f8cf40690de284a7694ba19676e96d8c1d8 Mon Sep 17 00:00:00 2001
-From: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Date: Mon, 13 May 2013 10:46:37 -0700
-Subject: clk: zynq: Add clock controller driver
-
-Add a clock controller driver and documentation.
-
-Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Cc: Grant Likely <grant.likely@linaro.org>
-Cc: Rob Herring <rob.herring@calxeda.com>
-Cc: Rob Landley <rob@landley.net>
-Cc: devicetree-discuss@lists.ozlabs.org
-Cc: linux-doc@vger.kernel.org
-Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-Acked-by: Mike Turquette <mturquette@linaro.org>
-(cherry picked from commit 0ee52b157b8ed88550ddd6291e54bb4bfabde364)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- .../devicetree/bindings/clock/zynq-7000.txt        |  97 ++++
- drivers/clk/zynq/clkc.c                            | 533 +++++++++++++++++++++
- 2 files changed, 630 insertions(+)
- create mode 100644 drivers/clk/zynq/clkc.c
-
-diff --git a/Documentation/devicetree/bindings/clock/zynq-7000.txt b/Documentation/devicetree/bindings/clock/zynq-7000.txt
-index 23ae1db1bc13..1049a313933c 100644
---- a/Documentation/devicetree/bindings/clock/zynq-7000.txt
-+++ b/Documentation/devicetree/bindings/clock/zynq-7000.txt
-@@ -6,6 +6,103 @@ The purpose of this document is to document their usage.
- See clock_bindings.txt for more information on the generic clock bindings.
- See Chapter 25 of Zynq TRM for more information about Zynq clocks.
- 
-+== Clock Controller ==
-+The clock controller is a logical abstraction of Zynq's clock tree. It reads
-+required input clock frequencies from the devicetree and acts as clock provider
-+for all clock consumers of PS clocks.
-+
-+Required properties:
-+ - #clock-cells : Must be 1
-+ - compatible : "xlnx,ps7-clkc"
-+ - ps-clk-frequency : Frequency of the oscillator providing ps_clk in HZ
-+		      (usually 33 MHz oscillators are used for Zynq platforms)
-+ - clock-output-names : List of strings used to name the clock outputs. Shall be
-+			a list of the outputs given below.
-+
-+Optional properties:
-+ - clocks : as described in the clock bindings
-+ - clock-names : as described in the clock bindings
-+
-+Clock inputs:
-+The following strings are optional parameters to the 'clock-names' property in
-+order to provide an optional (E)MIO clock source.
-+ - swdt_ext_clk
-+ - gem0_emio_clk
-+ - gem1_emio_clk
-+ - mio_clk_XX		# with XX = 00..53
-+...
-+
-+Clock outputs:
-+ 0:  armpll
-+ 1:  ddrpll
-+ 2:  iopll
-+ 3:  cpu_6or4x
-+ 4:  cpu_3or2x
-+ 5:  cpu_2x
-+ 6:  cpu_1x
-+ 7:  ddr2x
-+ 8:  ddr3x
-+ 9:  dci
-+ 10: lqspi
-+ 11: smc
-+ 12: pcap
-+ 13: gem0
-+ 14: gem1
-+ 15: fclk0
-+ 16: fclk1
-+ 17: fclk2
-+ 18: fclk3
-+ 19: can0
-+ 20: can1
-+ 21: sdio0
-+ 22: sdio1
-+ 23: uart0
-+ 24: uart1
-+ 25: spi0
-+ 26: spi1
-+ 27: dma
-+ 28: usb0_aper
-+ 29: usb1_aper
-+ 30: gem0_aper
-+ 31: gem1_aper
-+ 32: sdio0_aper
-+ 33: sdio1_aper
-+ 34: spi0_aper
-+ 35: spi1_aper
-+ 36: can0_aper
-+ 37: can1_aper
-+ 38: i2c0_aper
-+ 39: i2c1_aper
-+ 40: uart0_aper
-+ 41: uart1_aper
-+ 42: gpio_aper
-+ 43: lqspi_aper
-+ 44: smc_aper
-+ 45: swdt
-+ 46: dbg_trc
-+ 47: dbg_apb
-+
-+Example:
-+	clkc: clkc {
-+		#clock-cells = <1>;
-+		compatible = "xlnx,ps7-clkc";
-+		ps-clk-frequency = <33333333>;
-+		clock-output-names = "armpll", "ddrpll", "iopll", "cpu_6or4x",
-+				"cpu_3or2x", "cpu_2x", "cpu_1x", "ddr2x", "ddr3x",
-+				"dci", "lqspi", "smc", "pcap", "gem0", "gem1",
-+				"fclk0", "fclk1", "fclk2", "fclk3", "can0", "can1",
-+				"sdio0", "sdio1", "uart0", "uart1", "spi0", "spi1",
-+				"dma", "usb0_aper", "usb1_aper", "gem0_aper",
-+				"gem1_aper", "sdio0_aper", "sdio1_aper",
-+				"spi0_aper", "spi1_aper", "can0_aper", "can1_aper",
-+				"i2c0_aper", "i2c1_aper", "uart0_aper", "uart1_aper",
-+				"gpio_aper", "lqspi_aper", "smc_aper", "swdt",
-+				"dbg_trc", "dbg_apb";
-+		# optional props
-+		clocks = <&clkc 16>, <&clk_foo>;
-+		clock-names = "gem1_emio_clk", "can_mio_clk_23";
-+	};
-+
- == PLLs ==
- 
- Used to describe the ARM_PLL, DDR_PLL, and IO_PLL.
-diff --git a/drivers/clk/zynq/clkc.c b/drivers/clk/zynq/clkc.c
-new file mode 100644
-index 000000000000..5c205b60a82a
---- /dev/null
-+++ b/drivers/clk/zynq/clkc.c
-@@ -0,0 +1,533 @@
-+/*
-+ * Zynq clock controller
-+ *
-+ *  Copyright (C) 2012 - 2013 Xilinx
-+ *
-+ *  Sören Brinkmann <soren.brinkmann@xilinx.com>
-+ *
-+ * This program is free software: you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License v2 as published by
-+ * the Free Software Foundation.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
-+ */
-+
-+#include <linux/clk/zynq.h>
-+#include <linux/clk-provider.h>
-+#include <linux/of.h>
-+#include <linux/slab.h>
-+#include <linux/string.h>
-+#include <linux/io.h>
-+
-+static void __iomem *zynq_slcr_base_priv;
-+
-+#define SLCR_ARMPLL_CTRL		(zynq_slcr_base_priv + 0x100)
-+#define SLCR_DDRPLL_CTRL		(zynq_slcr_base_priv + 0x104)
-+#define SLCR_IOPLL_CTRL			(zynq_slcr_base_priv + 0x108)
-+#define SLCR_PLL_STATUS			(zynq_slcr_base_priv + 0x10c)
-+#define SLCR_ARM_CLK_CTRL		(zynq_slcr_base_priv + 0x120)
-+#define SLCR_DDR_CLK_CTRL		(zynq_slcr_base_priv + 0x124)
-+#define SLCR_DCI_CLK_CTRL		(zynq_slcr_base_priv + 0x128)
-+#define SLCR_APER_CLK_CTRL		(zynq_slcr_base_priv + 0x12c)
-+#define SLCR_GEM0_CLK_CTRL		(zynq_slcr_base_priv + 0x140)
-+#define SLCR_GEM1_CLK_CTRL		(zynq_slcr_base_priv + 0x144)
-+#define SLCR_SMC_CLK_CTRL		(zynq_slcr_base_priv + 0x148)
-+#define SLCR_LQSPI_CLK_CTRL		(zynq_slcr_base_priv + 0x14c)
-+#define SLCR_SDIO_CLK_CTRL		(zynq_slcr_base_priv + 0x150)
-+#define SLCR_UART_CLK_CTRL		(zynq_slcr_base_priv + 0x154)
-+#define SLCR_SPI_CLK_CTRL		(zynq_slcr_base_priv + 0x158)
-+#define SLCR_CAN_CLK_CTRL		(zynq_slcr_base_priv + 0x15c)
-+#define SLCR_CAN_MIOCLK_CTRL		(zynq_slcr_base_priv + 0x160)
-+#define SLCR_DBG_CLK_CTRL		(zynq_slcr_base_priv + 0x164)
-+#define SLCR_PCAP_CLK_CTRL		(zynq_slcr_base_priv + 0x168)
-+#define SLCR_FPGA0_CLK_CTRL		(zynq_slcr_base_priv + 0x170)
-+#define SLCR_621_TRUE			(zynq_slcr_base_priv + 0x1c4)
-+#define SLCR_SWDT_CLK_SEL		(zynq_slcr_base_priv + 0x304)
-+
-+#define NUM_MIO_PINS	54
-+
-+enum zynq_clk {
-+	armpll, ddrpll, iopll,
-+	cpu_6or4x, cpu_3or2x, cpu_2x, cpu_1x,
-+	ddr2x, ddr3x, dci,
-+	lqspi, smc, pcap, gem0, gem1, fclk0, fclk1, fclk2, fclk3, can0, can1,
-+	sdio0, sdio1, uart0, uart1, spi0, spi1, dma,
-+	usb0_aper, usb1_aper, gem0_aper, gem1_aper,
-+	sdio0_aper, sdio1_aper, spi0_aper, spi1_aper, can0_aper, can1_aper,
-+	i2c0_aper, i2c1_aper, uart0_aper, uart1_aper, gpio_aper, lqspi_aper,
-+	smc_aper, swdt, dbg_trc, dbg_apb, clk_max};
-+
-+static struct clk *ps_clk;
-+static struct clk *clks[clk_max];
-+static struct clk_onecell_data clk_data;
-+
-+static DEFINE_SPINLOCK(armpll_lock);
-+static DEFINE_SPINLOCK(ddrpll_lock);
-+static DEFINE_SPINLOCK(iopll_lock);
-+static DEFINE_SPINLOCK(armclk_lock);
-+static DEFINE_SPINLOCK(ddrclk_lock);
-+static DEFINE_SPINLOCK(dciclk_lock);
-+static DEFINE_SPINLOCK(gem0clk_lock);
-+static DEFINE_SPINLOCK(gem1clk_lock);
-+static DEFINE_SPINLOCK(canclk_lock);
-+static DEFINE_SPINLOCK(canmioclk_lock);
-+static DEFINE_SPINLOCK(dbgclk_lock);
-+static DEFINE_SPINLOCK(aperclk_lock);
-+
-+static const char dummy_nm[] __initconst = "dummy_name";
-+
-+static const char *armpll_parents[] __initdata = {"armpll_int", "ps_clk"};
-+static const char *ddrpll_parents[] __initdata = {"ddrpll_int", "ps_clk"};
-+static const char *iopll_parents[] __initdata = {"iopll_int", "ps_clk"};
-+static const char *gem0_mux_parents[] __initdata = {"gem0_div1", dummy_nm};
-+static const char *gem1_mux_parents[] __initdata = {"gem1_div1", dummy_nm};
-+static const char *can0_mio_mux2_parents[] __initdata = {"can0_gate",
-+	"can0_mio_mux"};
-+static const char *can1_mio_mux2_parents[] __initdata = {"can1_gate",
-+	"can1_mio_mux"};
-+static const char *dbg_emio_mux_parents[] __initdata = {"dbg_div",
-+	dummy_nm};
-+
-+static const char *dbgtrc_emio_input_names[] __initdata = {"trace_emio_clk"};
-+static const char *gem0_emio_input_names[] __initdata = {"gem0_emio_clk"};
-+static const char *gem1_emio_input_names[] __initdata = {"gem1_emio_clk"};
-+static const char *swdt_ext_clk_input_names[] __initdata = {"swdt_ext_clk"};
-+
-+static void __init zynq_clk_register_fclk(enum zynq_clk fclk,
-+		const char *clk_name, void __iomem *fclk_ctrl_reg,
-+		const char **parents)
-+{
-+	struct clk *clk;
-+	char *mux_name;
-+	char *div0_name;
-+	char *div1_name;
-+	spinlock_t *fclk_lock;
-+	spinlock_t *fclk_gate_lock;
-+	void __iomem *fclk_gate_reg = fclk_ctrl_reg + 8;
-+
-+	fclk_lock = kmalloc(sizeof(*fclk_lock), GFP_KERNEL);
-+	if (!fclk_lock)
-+		goto err;
-+	fclk_gate_lock = kmalloc(sizeof(*fclk_gate_lock), GFP_KERNEL);
-+	if (!fclk_gate_lock)
-+		goto err;
-+	spin_lock_init(fclk_lock);
-+	spin_lock_init(fclk_gate_lock);
-+
-+	mux_name = kasprintf(GFP_KERNEL, "%s_mux", clk_name);
-+	div0_name = kasprintf(GFP_KERNEL, "%s_div0", clk_name);
-+	div1_name = kasprintf(GFP_KERNEL, "%s_div1", clk_name);
-+
-+	clk = clk_register_mux(NULL, mux_name, parents, 4, 0,
-+			fclk_ctrl_reg, 4, 2, 0, fclk_lock);
-+
-+	clk = clk_register_divider(NULL, div0_name, mux_name,
-+			0, fclk_ctrl_reg, 8, 6, CLK_DIVIDER_ONE_BASED |
-+			CLK_DIVIDER_ALLOW_ZERO, fclk_lock);
-+
-+	clk = clk_register_divider(NULL, div1_name, div0_name,
-+			CLK_SET_RATE_PARENT, fclk_ctrl_reg, 20, 6,
-+			CLK_DIVIDER_ONE_BASED | CLK_DIVIDER_ALLOW_ZERO,
-+			fclk_lock);
-+
-+	clks[fclk] = clk_register_gate(NULL, clk_name,
-+			div1_name, CLK_SET_RATE_PARENT, fclk_gate_reg,
-+			0, CLK_GATE_SET_TO_DISABLE, fclk_gate_lock);
-+	kfree(mux_name);
-+	kfree(div0_name);
-+	kfree(div1_name);
-+
-+	return;
-+
-+err:
-+	clks[fclk] = ERR_PTR(-ENOMEM);
-+}
-+
-+static void __init zynq_clk_register_periph_clk(enum zynq_clk clk0,
-+		enum zynq_clk clk1, const char *clk_name0,
-+		const char *clk_name1, void __iomem *clk_ctrl,
-+		const char **parents, unsigned int two_gates)
-+{
-+	struct clk *clk;
-+	char *mux_name;
-+	char *div_name;
-+	spinlock_t *lock;
-+
-+	lock = kmalloc(sizeof(*lock), GFP_KERNEL);
-+	if (!lock)
-+		goto err;
-+	spin_lock_init(lock);
-+
-+	mux_name = kasprintf(GFP_KERNEL, "%s_mux", clk_name0);
-+	div_name = kasprintf(GFP_KERNEL, "%s_div", clk_name0);
-+
-+	clk = clk_register_mux(NULL, mux_name, parents, 4, 0,
-+			clk_ctrl, 4, 2, 0, lock);
-+
-+	clk = clk_register_divider(NULL, div_name, mux_name, 0, clk_ctrl, 8, 6,
-+			CLK_DIVIDER_ONE_BASED | CLK_DIVIDER_ALLOW_ZERO, lock);
-+
-+	clks[clk0] = clk_register_gate(NULL, clk_name0, div_name,
-+			CLK_SET_RATE_PARENT, clk_ctrl, 0, 0, lock);
-+	if (two_gates)
-+		clks[clk1] = clk_register_gate(NULL, clk_name1, div_name,
-+				CLK_SET_RATE_PARENT, clk_ctrl, 1, 0, lock);
-+
-+	kfree(mux_name);
-+	kfree(div_name);
-+
-+	return;
-+
-+err:
-+	clks[clk0] = ERR_PTR(-ENOMEM);
-+	if (two_gates)
-+		clks[clk1] = ERR_PTR(-ENOMEM);
-+}
-+
-+static void __init zynq_clk_setup(struct device_node *np)
-+{
-+	int i;
-+	u32 tmp;
-+	int ret;
-+	struct clk *clk;
-+	char *clk_name;
-+	const char *clk_output_name[clk_max];
-+	const char *cpu_parents[4];
-+	const char *periph_parents[4];
-+	const char *swdt_ext_clk_mux_parents[2];
-+	const char *can_mio_mux_parents[NUM_MIO_PINS];
-+
-+	pr_info("Zynq clock init\n");
-+
-+	/* get clock output names from DT */
-+	for (i = 0; i < clk_max; i++) {
-+		if (of_property_read_string_index(np, "clock-output-names",
-+				  i, &clk_output_name[i])) {
-+			pr_err("%s: clock output name not in DT\n", __func__);
-+			BUG();
-+		}
-+	}
-+	cpu_parents[0] = clk_output_name[armpll];
-+	cpu_parents[1] = clk_output_name[armpll];
-+	cpu_parents[2] = clk_output_name[ddrpll];
-+	cpu_parents[3] = clk_output_name[iopll];
-+	periph_parents[0] = clk_output_name[iopll];
-+	periph_parents[1] = clk_output_name[iopll];
-+	periph_parents[2] = clk_output_name[armpll];
-+	periph_parents[3] = clk_output_name[ddrpll];
-+
-+	/* ps_clk */
-+	ret = of_property_read_u32(np, "ps-clk-frequency", &tmp);
-+	if (ret) {
-+		pr_warn("ps_clk frequency not specified, using 33 MHz.\n");
-+		tmp = 33333333;
-+	}
-+	ps_clk = clk_register_fixed_rate(NULL, "ps_clk", NULL, CLK_IS_ROOT,
-+			tmp);
-+
-+	/* PLLs */
-+	clk = clk_register_zynq_pll("armpll_int", "ps_clk", SLCR_ARMPLL_CTRL,
-+			SLCR_PLL_STATUS, 0, &armpll_lock);
-+	clks[armpll] = clk_register_mux(NULL, clk_output_name[armpll],
-+			armpll_parents, 2, 0, SLCR_ARMPLL_CTRL, 4, 1, 0,
-+			&armpll_lock);
-+
-+	clk = clk_register_zynq_pll("ddrpll_int", "ps_clk", SLCR_DDRPLL_CTRL,
-+			SLCR_PLL_STATUS, 1, &ddrpll_lock);
-+	clks[ddrpll] = clk_register_mux(NULL, clk_output_name[ddrpll],
-+			ddrpll_parents, 2, 0, SLCR_DDRPLL_CTRL, 4, 1, 0,
-+			&ddrpll_lock);
-+
-+	clk = clk_register_zynq_pll("iopll_int", "ps_clk", SLCR_IOPLL_CTRL,
-+			SLCR_PLL_STATUS, 2, &iopll_lock);
-+	clks[iopll] = clk_register_mux(NULL, clk_output_name[iopll],
-+			iopll_parents, 2, 0, SLCR_IOPLL_CTRL, 4, 1, 0,
-+			&iopll_lock);
-+
-+	/* CPU clocks */
-+	tmp = readl(SLCR_621_TRUE) & 1;
-+	clk = clk_register_mux(NULL, "cpu_mux", cpu_parents, 4, 0,
-+			SLCR_ARM_CLK_CTRL, 4, 2, 0, &armclk_lock);
-+	clk = clk_register_divider(NULL, "cpu_div", "cpu_mux", 0,
-+			SLCR_ARM_CLK_CTRL, 8, 6, CLK_DIVIDER_ONE_BASED |
-+			CLK_DIVIDER_ALLOW_ZERO, &armclk_lock);
-+
-+	clks[cpu_6or4x] = clk_register_gate(NULL, clk_output_name[cpu_6or4x],
-+			"cpu_div", CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
-+			SLCR_ARM_CLK_CTRL, 24, 0, &armclk_lock);
-+
-+	clk = clk_register_fixed_factor(NULL, "cpu_3or2x_div", "cpu_div", 0,
-+			1, 2);
-+	clks[cpu_3or2x] = clk_register_gate(NULL, clk_output_name[cpu_3or2x],
-+			"cpu_3or2x_div", CLK_IGNORE_UNUSED,
-+			SLCR_ARM_CLK_CTRL, 25, 0, &armclk_lock);
-+
-+	clk = clk_register_fixed_factor(NULL, "cpu_2x_div", "cpu_div", 0, 1,
-+			2 + tmp);
-+	clks[cpu_2x] = clk_register_gate(NULL, clk_output_name[cpu_2x],
-+			"cpu_2x_div", CLK_IGNORE_UNUSED, SLCR_ARM_CLK_CTRL,
-+			26, 0, &armclk_lock);
-+
-+	clk = clk_register_fixed_factor(NULL, "cpu_1x_div", "cpu_div", 0, 1,
-+			4 + 2 * tmp);
-+	clks[cpu_1x] = clk_register_gate(NULL, clk_output_name[cpu_1x],
-+			"cpu_1x_div", CLK_IGNORE_UNUSED, SLCR_ARM_CLK_CTRL, 27,
-+			0, &armclk_lock);
-+
-+	/* Timers */
-+	swdt_ext_clk_mux_parents[0] = clk_output_name[cpu_1x];
-+	for (i = 0; i < ARRAY_SIZE(swdt_ext_clk_input_names); i++) {
-+		int idx = of_property_match_string(np, "clock-names",
-+				swdt_ext_clk_input_names[i]);
-+		if (idx >= 0)
-+			swdt_ext_clk_mux_parents[i + 1] =
-+				of_clk_get_parent_name(np, idx);
-+		else
-+			swdt_ext_clk_mux_parents[i + 1] = dummy_nm;
-+	}
-+	clks[swdt] = clk_register_mux(NULL, clk_output_name[swdt],
-+			swdt_ext_clk_mux_parents, 2, CLK_SET_RATE_PARENT,
-+			SLCR_SWDT_CLK_SEL, 0, 1, 0, &gem0clk_lock);
-+
-+	/* DDR clocks */
-+	clk = clk_register_divider(NULL, "ddr2x_div", "ddrpll", 0,
-+			SLCR_DDR_CLK_CTRL, 26, 6, CLK_DIVIDER_ONE_BASED |
-+			CLK_DIVIDER_ALLOW_ZERO, &ddrclk_lock);
-+	clks[ddr2x] = clk_register_gate(NULL, clk_output_name[ddr2x],
-+			"ddr2x_div", 0, SLCR_DDR_CLK_CTRL, 1, 0, &ddrclk_lock);
-+	clk_prepare_enable(clks[ddr2x]);
-+	clk = clk_register_divider(NULL, "ddr3x_div", "ddrpll", 0,
-+			SLCR_DDR_CLK_CTRL, 20, 6, CLK_DIVIDER_ONE_BASED |
-+			CLK_DIVIDER_ALLOW_ZERO, &ddrclk_lock);
-+	clks[ddr3x] = clk_register_gate(NULL, clk_output_name[ddr3x],
-+			"ddr3x_div", 0, SLCR_DDR_CLK_CTRL, 0, 0, &ddrclk_lock);
-+	clk_prepare_enable(clks[ddr3x]);
-+
-+	clk = clk_register_divider(NULL, "dci_div0", "ddrpll", 0,
-+			SLCR_DCI_CLK_CTRL, 8, 6, CLK_DIVIDER_ONE_BASED |
-+			CLK_DIVIDER_ALLOW_ZERO, &dciclk_lock);
-+	clk = clk_register_divider(NULL, "dci_div1", "dci_div0",
-+			CLK_SET_RATE_PARENT, SLCR_DCI_CLK_CTRL, 20, 6,
-+			CLK_DIVIDER_ONE_BASED | CLK_DIVIDER_ALLOW_ZERO,
-+			&dciclk_lock);
-+	clks[dci] = clk_register_gate(NULL, clk_output_name[dci], "dci_div1",
-+			CLK_SET_RATE_PARENT, SLCR_DCI_CLK_CTRL, 0, 0,
-+			&dciclk_lock);
-+	clk_prepare_enable(clks[dci]);
-+
-+	/* Peripheral clocks */
-+	for (i = fclk0; i <= fclk3; i++)
-+		zynq_clk_register_fclk(i, clk_output_name[i],
-+				SLCR_FPGA0_CLK_CTRL + 0x10 * (i - fclk0),
-+				periph_parents);
-+
-+	zynq_clk_register_periph_clk(lqspi, 0, clk_output_name[lqspi], NULL,
-+			SLCR_LQSPI_CLK_CTRL, periph_parents, 0);
-+
-+	zynq_clk_register_periph_clk(smc, 0, clk_output_name[smc], NULL,
-+			SLCR_SMC_CLK_CTRL, periph_parents, 0);
-+
-+	zynq_clk_register_periph_clk(pcap, 0, clk_output_name[pcap], NULL,
-+			SLCR_PCAP_CLK_CTRL, periph_parents, 0);
-+
-+	zynq_clk_register_periph_clk(sdio0, sdio1, clk_output_name[sdio0],
-+			clk_output_name[sdio1], SLCR_SDIO_CLK_CTRL,
-+			periph_parents, 1);
-+
-+	zynq_clk_register_periph_clk(uart0, uart1, clk_output_name[uart0],
-+			clk_output_name[uart1], SLCR_UART_CLK_CTRL,
-+			periph_parents, 1);
-+
-+	zynq_clk_register_periph_clk(spi0, spi1, clk_output_name[spi0],
-+			clk_output_name[spi1], SLCR_SPI_CLK_CTRL,
-+			periph_parents, 1);
-+
-+	for (i = 0; i < ARRAY_SIZE(gem0_emio_input_names); i++) {
-+		int idx = of_property_match_string(np, "clock-names",
-+				gem0_emio_input_names[i]);
-+		if (idx >= 0)
-+			gem0_mux_parents[i + 1] = of_clk_get_parent_name(np,
-+					idx);
-+	}
-+	clk = clk_register_mux(NULL, "gem0_mux", periph_parents, 4, 0,
-+			SLCR_GEM0_CLK_CTRL, 4, 2, 0, &gem0clk_lock);
-+	clk = clk_register_divider(NULL, "gem0_div0", "gem0_mux", 0,
-+			SLCR_GEM0_CLK_CTRL, 8, 6, CLK_DIVIDER_ONE_BASED |
-+			CLK_DIVIDER_ALLOW_ZERO, &gem0clk_lock);
-+	clk = clk_register_divider(NULL, "gem0_div1", "gem0_div0",
-+			CLK_SET_RATE_PARENT, SLCR_GEM0_CLK_CTRL, 20, 6,
-+			CLK_DIVIDER_ONE_BASED | CLK_DIVIDER_ALLOW_ZERO,
-+			&gem0clk_lock);
-+	clk = clk_register_mux(NULL, "gem0_emio_mux", gem0_mux_parents, 2, 0,
-+			SLCR_GEM0_CLK_CTRL, 6, 1, 0, &gem0clk_lock);
-+	clks[gem0] = clk_register_gate(NULL, clk_output_name[gem0],
-+			"gem0_emio_mux", CLK_SET_RATE_PARENT,
-+			SLCR_GEM0_CLK_CTRL, 0, 0, &gem0clk_lock);
-+
-+	for (i = 0; i < ARRAY_SIZE(gem1_emio_input_names); i++) {
-+		int idx = of_property_match_string(np, "clock-names",
-+				gem1_emio_input_names[i]);
-+		if (idx >= 0)
-+			gem1_mux_parents[i + 1] = of_clk_get_parent_name(np,
-+					idx);
-+	}
-+	clk = clk_register_mux(NULL, "gem1_mux", periph_parents, 4, 0,
-+			SLCR_GEM1_CLK_CTRL, 4, 2, 0, &gem1clk_lock);
-+	clk = clk_register_divider(NULL, "gem1_div0", "gem1_mux", 0,
-+			SLCR_GEM1_CLK_CTRL, 8, 6, CLK_DIVIDER_ONE_BASED |
-+			CLK_DIVIDER_ALLOW_ZERO, &gem1clk_lock);
-+	clk = clk_register_divider(NULL, "gem1_div1", "gem1_div0",
-+			CLK_SET_RATE_PARENT, SLCR_GEM1_CLK_CTRL, 20, 6,
-+			CLK_DIVIDER_ONE_BASED | CLK_DIVIDER_ALLOW_ZERO,
-+			&gem1clk_lock);
-+	clk = clk_register_mux(NULL, "gem1_emio_mux", gem1_mux_parents, 2, 0,
-+			SLCR_GEM1_CLK_CTRL, 6, 1, 0, &gem1clk_lock);
-+	clks[gem1] = clk_register_gate(NULL, clk_output_name[gem1],
-+			"gem1_emio_mux", CLK_SET_RATE_PARENT,
-+			SLCR_GEM1_CLK_CTRL, 0, 0, &gem1clk_lock);
-+
-+	tmp = strlen("mio_clk_00x");
-+	clk_name = kmalloc(tmp, GFP_KERNEL);
-+	for (i = 0; i < NUM_MIO_PINS; i++) {
-+		int idx;
-+
-+		snprintf(clk_name, tmp, "mio_clk_%2.2d", i);
-+		idx = of_property_match_string(np, "clock-names", clk_name);
-+		if (idx >= 0)
-+			can_mio_mux_parents[i] = of_clk_get_parent_name(np,
-+						idx);
-+		else
-+			can_mio_mux_parents[i] = dummy_nm;
-+	}
-+	kfree(clk_name);
-+	clk = clk_register_mux(NULL, "can_mux", periph_parents, 4, 0,
-+			SLCR_CAN_CLK_CTRL, 4, 2, 0, &canclk_lock);
-+	clk = clk_register_divider(NULL, "can_div0", "can_mux", 0,
-+			SLCR_CAN_CLK_CTRL, 8, 6, CLK_DIVIDER_ONE_BASED |
-+			CLK_DIVIDER_ALLOW_ZERO, &canclk_lock);
-+	clk = clk_register_divider(NULL, "can_div1", "can_div0",
-+			CLK_SET_RATE_PARENT, SLCR_CAN_CLK_CTRL, 20, 6,
-+			CLK_DIVIDER_ONE_BASED | CLK_DIVIDER_ALLOW_ZERO,
-+			&canclk_lock);
-+	clk = clk_register_gate(NULL, "can0_gate", "can_div1",
-+			CLK_SET_RATE_PARENT, SLCR_CAN_CLK_CTRL, 0, 0,
-+			&canclk_lock);
-+	clk = clk_register_gate(NULL, "can1_gate", "can_div1",
-+			CLK_SET_RATE_PARENT, SLCR_CAN_CLK_CTRL, 1, 0,
-+			&canclk_lock);
-+	clk = clk_register_mux(NULL, "can0_mio_mux",
-+			can_mio_mux_parents, 54, CLK_SET_RATE_PARENT,
-+			SLCR_CAN_MIOCLK_CTRL, 0, 6, 0, &canmioclk_lock);
-+	clk = clk_register_mux(NULL, "can1_mio_mux",
-+			can_mio_mux_parents, 54, CLK_SET_RATE_PARENT,
-+			SLCR_CAN_MIOCLK_CTRL, 16, 6, 0, &canmioclk_lock);
-+	clks[can0] = clk_register_mux(NULL, clk_output_name[can0],
-+			can0_mio_mux2_parents, 2, CLK_SET_RATE_PARENT,
-+			SLCR_CAN_MIOCLK_CTRL, 6, 1, 0, &canmioclk_lock);
-+	clks[can1] = clk_register_mux(NULL, clk_output_name[can1],
-+			can1_mio_mux2_parents, 2, CLK_SET_RATE_PARENT,
-+			SLCR_CAN_MIOCLK_CTRL, 22, 1, 0, &canmioclk_lock);
-+
-+	for (i = 0; i < ARRAY_SIZE(dbgtrc_emio_input_names); i++) {
-+		int idx = of_property_match_string(np, "clock-names",
-+				dbgtrc_emio_input_names[i]);
-+		if (idx >= 0)
-+			dbg_emio_mux_parents[i + 1] = of_clk_get_parent_name(np,
-+					idx);
-+	}
-+	clk = clk_register_mux(NULL, "dbg_mux", periph_parents, 4, 0,
-+			SLCR_DBG_CLK_CTRL, 4, 2, 0, &dbgclk_lock);
-+	clk = clk_register_divider(NULL, "dbg_div", "dbg_mux", 0,
-+			SLCR_DBG_CLK_CTRL, 8, 6, CLK_DIVIDER_ONE_BASED |
-+			CLK_DIVIDER_ALLOW_ZERO, &dbgclk_lock);
-+	clk = clk_register_mux(NULL, "dbg_emio_mux", dbg_emio_mux_parents, 2, 0,
-+			SLCR_DBG_CLK_CTRL, 6, 1, 0, &dbgclk_lock);
-+	clks[dbg_trc] = clk_register_gate(NULL, clk_output_name[dbg_trc],
-+			"dbg_emio_mux", CLK_SET_RATE_PARENT, SLCR_DBG_CLK_CTRL,
-+			0, 0, &dbgclk_lock);
-+	clks[dbg_apb] = clk_register_gate(NULL, clk_output_name[dbg_apb],
-+			clk_output_name[cpu_1x], 0, SLCR_DBG_CLK_CTRL, 1, 0,
-+			&dbgclk_lock);
-+
-+	/* One gated clock for all APER clocks. */
-+	clks[dma] = clk_register_gate(NULL, clk_output_name[dma],
-+			clk_output_name[cpu_2x], 0, SLCR_APER_CLK_CTRL, 0, 0,
-+			&aperclk_lock);
-+	clks[usb0_aper] = clk_register_gate(NULL, clk_output_name[usb0_aper],
-+			clk_output_name[cpu_1x], 0, SLCR_APER_CLK_CTRL, 2, 0,
-+			&aperclk_lock);
-+	clks[usb1_aper] = clk_register_gate(NULL, clk_output_name[usb1_aper],
-+			clk_output_name[cpu_1x], 0, SLCR_APER_CLK_CTRL, 3, 0,
-+			&aperclk_lock);
-+	clks[gem0_aper] = clk_register_gate(NULL, clk_output_name[gem0_aper],
-+			clk_output_name[cpu_1x], 0, SLCR_APER_CLK_CTRL, 6, 0,
-+			&aperclk_lock);
-+	clks[gem1_aper] = clk_register_gate(NULL, clk_output_name[gem1_aper],
-+			clk_output_name[cpu_1x], 0, SLCR_APER_CLK_CTRL, 7, 0,
-+			&aperclk_lock);
-+	clks[sdio0_aper] = clk_register_gate(NULL, clk_output_name[sdio0_aper],
-+			clk_output_name[cpu_1x], 0, SLCR_APER_CLK_CTRL, 10, 0,
-+			&aperclk_lock);
-+	clks[sdio1_aper] = clk_register_gate(NULL, clk_output_name[sdio1_aper],
-+			clk_output_name[cpu_1x], 0, SLCR_APER_CLK_CTRL, 11, 0,
-+			&aperclk_lock);
-+	clks[spi0_aper] = clk_register_gate(NULL, clk_output_name[spi0_aper],
-+			clk_output_name[cpu_1x], 0, SLCR_APER_CLK_CTRL, 14, 0,
-+			&aperclk_lock);
-+	clks[spi1_aper] = clk_register_gate(NULL, clk_output_name[spi1_aper],
-+			clk_output_name[cpu_1x], 0, SLCR_APER_CLK_CTRL, 15, 0,
-+			&aperclk_lock);
-+	clks[can0_aper] = clk_register_gate(NULL, clk_output_name[can0_aper],
-+			clk_output_name[cpu_1x], 0, SLCR_APER_CLK_CTRL, 16, 0,
-+			&aperclk_lock);
-+	clks[can1_aper] = clk_register_gate(NULL, clk_output_name[can1_aper],
-+			clk_output_name[cpu_1x], 0, SLCR_APER_CLK_CTRL, 17, 0,
-+			&aperclk_lock);
-+	clks[i2c0_aper] = clk_register_gate(NULL, clk_output_name[i2c0_aper],
-+			clk_output_name[cpu_1x], 0, SLCR_APER_CLK_CTRL, 18, 0,
-+			&aperclk_lock);
-+	clks[i2c1_aper] = clk_register_gate(NULL, clk_output_name[i2c1_aper],
-+			clk_output_name[cpu_1x], 0, SLCR_APER_CLK_CTRL, 19, 0,
-+			&aperclk_lock);
-+	clks[uart0_aper] = clk_register_gate(NULL, clk_output_name[uart0_aper],
-+			clk_output_name[cpu_1x], 0, SLCR_APER_CLK_CTRL, 20, 0,
-+			&aperclk_lock);
-+	clks[uart1_aper] = clk_register_gate(NULL, clk_output_name[uart1_aper],
-+			clk_output_name[cpu_1x], 0, SLCR_APER_CLK_CTRL, 21, 0,
-+			&aperclk_lock);
-+	clks[gpio_aper] = clk_register_gate(NULL, clk_output_name[gpio_aper],
-+			clk_output_name[cpu_1x], 0, SLCR_APER_CLK_CTRL, 22, 0,
-+			&aperclk_lock);
-+	clks[lqspi_aper] = clk_register_gate(NULL, clk_output_name[lqspi_aper],
-+			clk_output_name[cpu_1x], 0, SLCR_APER_CLK_CTRL, 23, 0,
-+			&aperclk_lock);
-+	clks[smc_aper] = clk_register_gate(NULL, clk_output_name[smc_aper],
-+			clk_output_name[cpu_1x], 0, SLCR_APER_CLK_CTRL, 24, 0,
-+			&aperclk_lock);
-+
-+	for (i = 0; i < ARRAY_SIZE(clks); i++) {
-+		if (IS_ERR(clks[i])) {
-+			pr_err("Zynq clk %d: register failed with %ld\n",
-+			       i, PTR_ERR(clks[i]));
-+			BUG();
-+		}
-+	}
-+
-+	clk_data.clks = clks;
-+	clk_data.clk_num = ARRAY_SIZE(clks);
-+	of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
-+}
-+
-+CLK_OF_DECLARE(zynq_clkc, "xlnx,ps7-clkc", zynq_clk_setup);
-+
-+void __init zynq_clock_init(void __iomem *slcr_base)
-+{
-+	zynq_slcr_base_priv = slcr_base;
-+	of_clk_init(NULL);
-+}
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0036-clk-zynq-Remove-deprecated-clock-code.patch b/patches.zynq/0036-clk-zynq-Remove-deprecated-clock-code.patch
deleted file mode 100644
index 5f78ff4790d0d..0000000000000
--- a/patches.zynq/0036-clk-zynq-Remove-deprecated-clock-code.patch
+++ /dev/null
@@ -1,465 +0,0 @@
-From 271b78195ed174bef0601532aa9504c9f2ee9363 Mon Sep 17 00:00:00 2001
-From: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Date: Mon, 13 May 2013 10:46:39 -0700
-Subject: clk: zynq: Remove deprecated clock code
-
-Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Cc: Grant Likely <grant.likely@linaro.org>
-Cc: Rob Herring <rob.herring@calxeda.com>
-Cc: Rob Landley <rob@landley.net>
-Cc: devicetree-discuss@lists.ozlabs.org
-Cc: linux-doc@vger.kernel.org
-Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-Acked-by: Mike Turquette <mturquette@linaro.org>
-(cherry picked from commit 97c4e87d45498fb4d18c995721bba72345a7d257)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- .../devicetree/bindings/clock/zynq-7000.txt        |  48 ---
- drivers/clk/clk-zynq.c                             | 378 ---------------------
- 2 files changed, 426 deletions(-)
- delete mode 100644 drivers/clk/clk-zynq.c
-
-diff --git a/Documentation/devicetree/bindings/clock/zynq-7000.txt b/Documentation/devicetree/bindings/clock/zynq-7000.txt
-index 1049a313933c..d99af878f5d7 100644
---- a/Documentation/devicetree/bindings/clock/zynq-7000.txt
-+++ b/Documentation/devicetree/bindings/clock/zynq-7000.txt
-@@ -102,51 +102,3 @@ Example:
- 		clocks = <&clkc 16>, <&clk_foo>;
- 		clock-names = "gem1_emio_clk", "can_mio_clk_23";
- 	};
--
--== PLLs ==
--
--Used to describe the ARM_PLL, DDR_PLL, and IO_PLL.
--
--Required properties:
--- #clock-cells : shall be 0 (only one clock is output from this node)
--- compatible : "xlnx,zynq-pll"
--- reg : pair of u32 values, which are the address offsets within the SLCR
--        of the relevant PLL_CTRL register and PLL_CFG register respectively
--- clocks : phandle for parent clock.  should be the phandle for ps_clk
--
--Optional properties:
--- clock-output-names : name of the output clock
--
--Example:
--	armpll: armpll {
--		#clock-cells = <0>;
--		compatible = "xlnx,zynq-pll";
--		clocks = <&ps_clk>;
--		reg = <0x100 0x110>;
--		clock-output-names = "armpll";
--	};
--
--== Peripheral clocks ==
--
--Describes clock node for the SDIO, SMC, SPI, QSPI, and UART clocks.
--
--Required properties:
--- #clock-cells : shall be 1
--- compatible : "xlnx,zynq-periph-clock"
--- reg : a single u32 value, describing the offset within the SLCR where
--        the CLK_CTRL register is found for this peripheral
--- clocks : phandle for parent clocks.  should hold phandles for
--           the IO_PLL, ARM_PLL, and DDR_PLL in order
--- clock-output-names : names of the output clock(s).  For peripherals that have
--                       two output clocks (for example, the UART), two clocks
--                       should be listed.
--
--Example:
--	uart_clk: uart_clk {
--		#clock-cells = <1>;
--		compatible = "xlnx,zynq-periph-clock";
--		clocks = <&iopll &armpll &ddrpll>;
--		reg = <0x154>;
--		clock-output-names = "uart0_ref_clk",
--				     "uart1_ref_clk";
--	};
-diff --git a/drivers/clk/clk-zynq.c b/drivers/clk/clk-zynq.c
-deleted file mode 100644
-index 32062977f453..000000000000
---- a/drivers/clk/clk-zynq.c
-+++ /dev/null
-@@ -1,378 +0,0 @@
--/*
-- * Copyright (c) 2012 National Instruments
-- *
-- * Josh Cartwright <josh.cartwright@ni.com>
-- *
-- * This program is free software; you can redistribute it and/or modify it
-- * under the terms and conditions of the GNU General Public License,
-- * version 2, as published by the Free Software Foundation.
-- *
-- * This program is distributed in the hope it will be useful, but WITHOUT
-- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
-- * more details.
-- *
-- * You should have received a copy of the GNU General Public License along with
-- * this program.  If not, see <http://www.gnu.org/licenses/>.
-- */
--#include <linux/io.h>
--#include <linux/of.h>
--#include <linux/slab.h>
--#include <linux/kernel.h>
--#include <linux/clk-provider.h>
--#include <linux/clk/zynq.h>
--
--static void __iomem *slcr_base;
--
--struct zynq_pll_clk {
--	struct clk_hw	hw;
--	void __iomem	*pll_ctrl;
--	void __iomem	*pll_cfg;
--};
--
--#define to_zynq_pll_clk(hw)	container_of(hw, struct zynq_pll_clk, hw)
--
--#define CTRL_PLL_FDIV(x)	((x) >> 12)
--
--static unsigned long zynq_pll_recalc_rate(struct clk_hw *hw,
--					  unsigned long parent_rate)
--{
--	struct zynq_pll_clk *pll = to_zynq_pll_clk(hw);
--	return parent_rate * CTRL_PLL_FDIV(ioread32(pll->pll_ctrl));
--}
--
--static const struct clk_ops zynq_pll_clk_ops = {
--	.recalc_rate	= zynq_pll_recalc_rate,
--};
--
--static void __init zynq_pll_clk_setup(struct device_node *np)
--{
--	struct clk_init_data init;
--	struct zynq_pll_clk *pll;
--	const char *parent_name;
--	struct clk *clk;
--	u32 regs[2];
--	int ret;
--
--	ret = of_property_read_u32_array(np, "reg", regs, ARRAY_SIZE(regs));
--	if (WARN_ON(ret))
--		return;
--
--	pll = kzalloc(sizeof(*pll), GFP_KERNEL);
--	if (WARN_ON(!pll))
--		return;
--
--	pll->pll_ctrl = slcr_base + regs[0];
--	pll->pll_cfg  = slcr_base + regs[1];
--
--	of_property_read_string(np, "clock-output-names", &init.name);
--
--	init.ops = &zynq_pll_clk_ops;
--	parent_name = of_clk_get_parent_name(np, 0);
--	init.parent_names = &parent_name;
--	init.num_parents = 1;
--
--	pll->hw.init = &init;
--
--	clk = clk_register(NULL, &pll->hw);
--	if (WARN_ON(IS_ERR(clk)))
--		return;
--
--	ret = of_clk_add_provider(np, of_clk_src_simple_get, clk);
--	if (WARN_ON(ret))
--		return;
--}
--CLK_OF_DECLARE(zynq_pll, "xlnx,zynq-pll", zynq_pll_clk_setup);
--
--struct zynq_periph_clk {
--	struct clk_hw		hw;
--	struct clk_onecell_data	onecell_data;
--	struct clk		*gates[2];
--	void __iomem		*clk_ctrl;
--	spinlock_t		clkact_lock;
--};
--
--#define to_zynq_periph_clk(hw)	container_of(hw, struct zynq_periph_clk, hw)
--
--static const u8 periph_clk_parent_map[] = {
--	0, 0, 1, 2
--};
--#define PERIPH_CLK_CTRL_SRC(x)	(periph_clk_parent_map[((x) & 0x30) >> 4])
--#define PERIPH_CLK_CTRL_DIV(x)	(((x) & 0x3F00) >> 8)
--
--static unsigned long zynq_periph_recalc_rate(struct clk_hw *hw,
--					     unsigned long parent_rate)
--{
--	struct zynq_periph_clk *periph = to_zynq_periph_clk(hw);
--	return parent_rate / PERIPH_CLK_CTRL_DIV(ioread32(periph->clk_ctrl));
--}
--
--static u8 zynq_periph_get_parent(struct clk_hw *hw)
--{
--	struct zynq_periph_clk *periph = to_zynq_periph_clk(hw);
--	return PERIPH_CLK_CTRL_SRC(ioread32(periph->clk_ctrl));
--}
--
--static const struct clk_ops zynq_periph_clk_ops = {
--	.recalc_rate	= zynq_periph_recalc_rate,
--	.get_parent	= zynq_periph_get_parent,
--};
--
--static void __init zynq_periph_clk_setup(struct device_node *np)
--{
--	struct zynq_periph_clk *periph;
--	const char *parent_names[3];
--	struct clk_init_data init;
--	int clk_num = 0, err;
--	const char *name;
--	struct clk *clk;
--	u32 reg;
--	int i;
--
--	err = of_property_read_u32(np, "reg", &reg);
--	if (WARN_ON(err))
--		return;
--
--	periph = kzalloc(sizeof(*periph), GFP_KERNEL);
--	if (WARN_ON(!periph))
--		return;
--
--	periph->clk_ctrl = slcr_base + reg;
--	spin_lock_init(&periph->clkact_lock);
--
--	init.name = np->name;
--	init.ops = &zynq_periph_clk_ops;
--	for (i = 0; i < ARRAY_SIZE(parent_names); i++)
--		parent_names[i] = of_clk_get_parent_name(np, i);
--	init.parent_names = parent_names;
--	init.num_parents = ARRAY_SIZE(parent_names);
--
--	periph->hw.init = &init;
--
--	clk = clk_register(NULL, &periph->hw);
--	if (WARN_ON(IS_ERR(clk)))
--		return;
--
--	err = of_clk_add_provider(np, of_clk_src_simple_get, clk);
--	if (WARN_ON(err))
--		return;
--
--	err = of_property_read_string_index(np, "clock-output-names", 0,
--					    &name);
--	if (WARN_ON(err))
--		return;
--
--	periph->gates[0] = clk_register_gate(NULL, name, np->name, 0,
--					     periph->clk_ctrl, 0, 0,
--					     &periph->clkact_lock);
--	if (WARN_ON(IS_ERR(periph->gates[0])))
--		return;
--	clk_num++;
--
--	/* some periph clks have 2 downstream gates */
--	err = of_property_read_string_index(np, "clock-output-names", 1,
--					    &name);
--	if (err != -ENODATA) {
--		periph->gates[1] = clk_register_gate(NULL, name, np->name, 0,
--						     periph->clk_ctrl, 1, 0,
--						     &periph->clkact_lock);
--		if (WARN_ON(IS_ERR(periph->gates[1])))
--			return;
--		clk_num++;
--	}
--
--	periph->onecell_data.clks = periph->gates;
--	periph->onecell_data.clk_num = clk_num;
--
--	err = of_clk_add_provider(np, of_clk_src_onecell_get,
--				  &periph->onecell_data);
--	if (WARN_ON(err))
--		return;
--}
--CLK_OF_DECLARE(zynq_periph, "xlnx,zynq-periph-clock", zynq_periph_clk_setup);
--
--/* CPU Clock domain is modelled as a mux with 4 children subclks, whose
-- * derivative rates depend on CLK_621_TRUE
-- */
--
--struct zynq_cpu_clk {
--	struct clk_hw		hw;
--	struct clk_onecell_data	onecell_data;
--	struct clk		*subclks[4];
--	void __iomem		*clk_ctrl;
--	spinlock_t		clkact_lock;
--};
--
--#define to_zynq_cpu_clk(hw)	container_of(hw, struct zynq_cpu_clk, hw)
--
--static const u8 zynq_cpu_clk_parent_map[] = {
--	1, 1, 2, 0
--};
--#define CPU_CLK_SRCSEL(x)	(zynq_cpu_clk_parent_map[(((x) & 0x30) >> 4)])
--#define CPU_CLK_CTRL_DIV(x)	(((x) & 0x3F00) >> 8)
--
--static u8 zynq_cpu_clk_get_parent(struct clk_hw *hw)
--{
--	struct zynq_cpu_clk *cpuclk = to_zynq_cpu_clk(hw);
--	return CPU_CLK_SRCSEL(ioread32(cpuclk->clk_ctrl));
--}
--
--static unsigned long zynq_cpu_clk_recalc_rate(struct clk_hw *hw,
--					      unsigned long parent_rate)
--{
--	struct zynq_cpu_clk *cpuclk = to_zynq_cpu_clk(hw);
--	return parent_rate / CPU_CLK_CTRL_DIV(ioread32(cpuclk->clk_ctrl));
--}
--
--static const struct clk_ops zynq_cpu_clk_ops = {
--	.get_parent	= zynq_cpu_clk_get_parent,
--	.recalc_rate	= zynq_cpu_clk_recalc_rate,
--};
--
--struct zynq_cpu_subclk {
--	struct clk_hw	hw;
--	void __iomem	*clk_621;
--	enum {
--		CPU_SUBCLK_6X4X,
--		CPU_SUBCLK_3X2X,
--		CPU_SUBCLK_2X,
--		CPU_SUBCLK_1X,
--	} which;
--};
--
--#define CLK_621_TRUE(x)	((x) & 1)
--
--#define to_zynq_cpu_subclk(hw)	container_of(hw, struct zynq_cpu_subclk, hw);
--
--static unsigned long zynq_cpu_subclk_recalc_rate(struct clk_hw *hw,
--						 unsigned long parent_rate)
--{
--	unsigned long uninitialized_var(rate);
--	struct zynq_cpu_subclk *subclk;
--	bool is_621;
--
--	subclk = to_zynq_cpu_subclk(hw)
--	is_621 = CLK_621_TRUE(ioread32(subclk->clk_621));
--
--	switch (subclk->which) {
--	case CPU_SUBCLK_6X4X:
--		rate = parent_rate;
--		break;
--	case CPU_SUBCLK_3X2X:
--		rate = parent_rate / 2;
--		break;
--	case CPU_SUBCLK_2X:
--		rate = parent_rate / (is_621 ? 3 : 2);
--		break;
--	case CPU_SUBCLK_1X:
--		rate = parent_rate / (is_621 ? 6 : 4);
--		break;
--	};
--
--	return rate;
--}
--
--static const struct clk_ops zynq_cpu_subclk_ops = {
--	.recalc_rate	= zynq_cpu_subclk_recalc_rate,
--};
--
--static struct clk *zynq_cpu_subclk_setup(struct device_node *np, u8 which,
--					 void __iomem *clk_621)
--{
--	struct zynq_cpu_subclk *subclk;
--	struct clk_init_data init;
--	struct clk *clk;
--	int err;
--
--	err = of_property_read_string_index(np, "clock-output-names",
--					    which, &init.name);
--	if (WARN_ON(err))
--		goto err_read_output_name;
--
--	subclk = kzalloc(sizeof(*subclk), GFP_KERNEL);
--	if (!subclk)
--		goto err_subclk_alloc;
--
--	subclk->clk_621 = clk_621;
--	subclk->which = which;
--
--	init.ops = &zynq_cpu_subclk_ops;
--	init.parent_names = &np->name;
--	init.num_parents = 1;
--
--	subclk->hw.init = &init;
--
--	clk = clk_register(NULL, &subclk->hw);
--	if (WARN_ON(IS_ERR(clk)))
--		goto err_clk_register;
--
--	return clk;
--
--err_clk_register:
--	kfree(subclk);
--err_subclk_alloc:
--err_read_output_name:
--	return ERR_PTR(-EINVAL);
--}
--
--static void __init zynq_cpu_clk_setup(struct device_node *np)
--{
--	struct zynq_cpu_clk *cpuclk;
--	const char *parent_names[3];
--	struct clk_init_data init;
--	void __iomem *clk_621;
--	struct clk *clk;
--	u32 reg[2];
--	int err;
--	int i;
--
--	err = of_property_read_u32_array(np, "reg", reg, ARRAY_SIZE(reg));
--	if (WARN_ON(err))
--		return;
--
--	cpuclk = kzalloc(sizeof(*cpuclk), GFP_KERNEL);
--	if (WARN_ON(!cpuclk))
--		return;
--
--	cpuclk->clk_ctrl = slcr_base + reg[0];
--	clk_621 = slcr_base + reg[1];
--	spin_lock_init(&cpuclk->clkact_lock);
--
--	init.name = np->name;
--	init.ops = &zynq_cpu_clk_ops;
--	for (i = 0; i < ARRAY_SIZE(parent_names); i++)
--		parent_names[i] = of_clk_get_parent_name(np, i);
--	init.parent_names = parent_names;
--	init.num_parents = ARRAY_SIZE(parent_names);
--
--	cpuclk->hw.init = &init;
--
--	clk = clk_register(NULL, &cpuclk->hw);
--	if (WARN_ON(IS_ERR(clk)))
--		return;
--
--	err = of_clk_add_provider(np, of_clk_src_simple_get, clk);
--	if (WARN_ON(err))
--		return;
--
--	for (i = 0; i < 4; i++) {
--		cpuclk->subclks[i] = zynq_cpu_subclk_setup(np, i, clk_621);
--		if (WARN_ON(IS_ERR(cpuclk->subclks[i])))
--			return;
--	}
--
--	cpuclk->onecell_data.clks = cpuclk->subclks;
--	cpuclk->onecell_data.clk_num = i;
--
--	err = of_clk_add_provider(np, of_clk_src_onecell_get,
--				  &cpuclk->onecell_data);
--	if (WARN_ON(err))
--		return;
--}
--CLK_OF_DECLARE(zynq_cpu, "xlnx,zynq-cpu-clock", zynq_cpu_clk_setup);
--
--void __init xilinx_zynq_clocks_init(void __iomem *slcr)
--{
--	slcr_base = slcr;
--	of_clk_init(NULL);
--}
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0037-clk-zynq-clkc-Add-dedicated-spinlock-for-the-SWDT.patch b/patches.zynq/0037-clk-zynq-clkc-Add-dedicated-spinlock-for-the-SWDT.patch
deleted file mode 100644
index cc38cb3671d06..0000000000000
--- a/patches.zynq/0037-clk-zynq-clkc-Add-dedicated-spinlock-for-the-SWDT.patch
+++ /dev/null
@@ -1,49 +0,0 @@
-From 8f1f273065be3102c89727c356355ebbe6d9c022 Mon Sep 17 00:00:00 2001
-From: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Date: Mon, 17 Jun 2013 15:03:46 -0700
-Subject: clk/zynq/clkc: Add dedicated spinlock for the SWDT
-
-The clk_mux for the system watchdog timer reused the register lock
-dedicated to the Ethernet module - for no apparent reason.
-Add a lock dedicated to the SWDT's clock register to remove this
-wrong dependency.
-
-This does not fix a specific regression but the clock driver was merged
-for 3.11-rc1, so best to fix the known bugs before the release.
-
-Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-Signed-off-by: Mike Turquette <mturquette@linaro.org>
-[mturquette@linaro.org: added to changelog]
-
-(cherry picked from commit 252957cc3a2d59179df1a2d44d219e07dc5c3f06)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/clk/zynq/clkc.c | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/clk/zynq/clkc.c b/drivers/clk/zynq/clkc.c
-index 5c205b60a82a..515a5732d391 100644
---- a/drivers/clk/zynq/clkc.c
-+++ b/drivers/clk/zynq/clkc.c
-@@ -71,6 +71,7 @@ static DEFINE_SPINLOCK(armpll_lock);
- static DEFINE_SPINLOCK(ddrpll_lock);
- static DEFINE_SPINLOCK(iopll_lock);
- static DEFINE_SPINLOCK(armclk_lock);
-+static DEFINE_SPINLOCK(swdtclk_lock);
- static DEFINE_SPINLOCK(ddrclk_lock);
- static DEFINE_SPINLOCK(dciclk_lock);
- static DEFINE_SPINLOCK(gem0clk_lock);
-@@ -293,7 +294,7 @@ static void __init zynq_clk_setup(struct device_node *np)
- 	}
- 	clks[swdt] = clk_register_mux(NULL, clk_output_name[swdt],
- 			swdt_ext_clk_mux_parents, 2, CLK_SET_RATE_PARENT,
--			SLCR_SWDT_CLK_SEL, 0, 1, 0, &gem0clk_lock);
-+			SLCR_SWDT_CLK_SEL, 0, 1, 0, &swdtclk_lock);
- 
- 	/* DDR clocks */
- 	clk = clk_register_divider(NULL, "ddr2x_div", "ddrpll", 0,
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0038-clk-zynq-clkc-Add-CLK_SET_RATE_PARENT-flag-to-ethern.patch b/patches.zynq/0038-clk-zynq-clkc-Add-CLK_SET_RATE_PARENT-flag-to-ethern.patch
deleted file mode 100644
index 05e8cf7e66970..0000000000000
--- a/patches.zynq/0038-clk-zynq-clkc-Add-CLK_SET_RATE_PARENT-flag-to-ethern.patch
+++ /dev/null
@@ -1,57 +0,0 @@
-From 96733aac27bad6e23fb1bfb25c14c59369bb371d Mon Sep 17 00:00:00 2001
-From: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Date: Mon, 17 Jun 2013 15:47:40 -0700
-Subject: clk/zynq/clkc: Add CLK_SET_RATE_PARENT flag to ethernet muxes
-
-Zynq's Ethernet clocks are created by the following hierarchy:
-	mux0 ---> div0 ---> div1 ---> mux1 ---> gate
-Rate change requests on the gate have to propagate all the way up to
-div0 to properly leverage all dividers. Mux1 was missing the
-CLK_SET_RATE_PARENT flag, which is required to achieve this.
-
-This does not fix a specific regression but the clock driver was merged
-for 3.11-rc1, so best to fix the known bugs before the release.
-
-Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-Signed-off-by: Mike Turquette <mturquette@linaro.org>
-[mturquette@linaro.org: added to changelog]
-
-(cherry picked from commit 765b7d4c4cb376465f81d0dd44b50861514dbcba)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/clk/zynq/clkc.c | 10 ++++++----
- 1 file changed, 6 insertions(+), 4 deletions(-)
-
-diff --git a/drivers/clk/zynq/clkc.c b/drivers/clk/zynq/clkc.c
-index 515a5732d391..089d3e30e221 100644
---- a/drivers/clk/zynq/clkc.c
-+++ b/drivers/clk/zynq/clkc.c
-@@ -365,8 +365,9 @@ static void __init zynq_clk_setup(struct device_node *np)
- 			CLK_SET_RATE_PARENT, SLCR_GEM0_CLK_CTRL, 20, 6,
- 			CLK_DIVIDER_ONE_BASED | CLK_DIVIDER_ALLOW_ZERO,
- 			&gem0clk_lock);
--	clk = clk_register_mux(NULL, "gem0_emio_mux", gem0_mux_parents, 2, 0,
--			SLCR_GEM0_CLK_CTRL, 6, 1, 0, &gem0clk_lock);
-+	clk = clk_register_mux(NULL, "gem0_emio_mux", gem0_mux_parents, 2,
-+			CLK_SET_RATE_PARENT, SLCR_GEM0_CLK_CTRL, 6, 1, 0,
-+			&gem0clk_lock);
- 	clks[gem0] = clk_register_gate(NULL, clk_output_name[gem0],
- 			"gem0_emio_mux", CLK_SET_RATE_PARENT,
- 			SLCR_GEM0_CLK_CTRL, 0, 0, &gem0clk_lock);
-@@ -387,8 +388,9 @@ static void __init zynq_clk_setup(struct device_node *np)
- 			CLK_SET_RATE_PARENT, SLCR_GEM1_CLK_CTRL, 20, 6,
- 			CLK_DIVIDER_ONE_BASED | CLK_DIVIDER_ALLOW_ZERO,
- 			&gem1clk_lock);
--	clk = clk_register_mux(NULL, "gem1_emio_mux", gem1_mux_parents, 2, 0,
--			SLCR_GEM1_CLK_CTRL, 6, 1, 0, &gem1clk_lock);
-+	clk = clk_register_mux(NULL, "gem1_emio_mux", gem1_mux_parents, 2,
-+			CLK_SET_RATE_PARENT, SLCR_GEM1_CLK_CTRL, 6, 1, 0,
-+			&gem1clk_lock);
- 	clks[gem1] = clk_register_gate(NULL, clk_output_name[gem1],
- 			"gem1_emio_mux", CLK_SET_RATE_PARENT,
- 			SLCR_GEM1_CLK_CTRL, 0, 0, &gem1clk_lock);
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0039-clk-add-CLK_SET_RATE_NO_REPARENT-flag.patch b/patches.zynq/0039-clk-add-CLK_SET_RATE_NO_REPARENT-flag.patch
deleted file mode 100644
index ec8840b5ca447..0000000000000
--- a/patches.zynq/0039-clk-add-CLK_SET_RATE_NO_REPARENT-flag.patch
+++ /dev/null
@@ -1,244 +0,0 @@
-From 1ce16914cbed078b39c1c752888825e02ce86b1c Mon Sep 17 00:00:00 2001
-From: James Hogan <james.hogan@imgtec.com>
-Date: Mon, 29 Jul 2013 12:25:01 +0100
-Subject: clk: add CLK_SET_RATE_NO_REPARENT flag
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Add a CLK_SET_RATE_NO_REPARENT clock flag, which will prevent muxes
-being reparented during clk_set_rate.
-
-To avoid breaking existing platforms, all callers of clk_register_mux()
-are adjusted to pass the new flag. Platform maintainers are encouraged
-to remove the flag if they wish to allow mux reparenting on set_rate.
-
-Signed-off-by: James Hogan <james.hogan@imgtec.com>
-Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
-Cc: Mike Turquette <mturquette@linaro.org>
-Cc: Russell King <linux@arm.linux.org.uk>
-Cc: Sascha Hauer <kernel@pengutronix.de>
-Cc: Stephen Warren <swarren@wwwdotorg.org>
-Cc: Viresh Kumar <viresh.linux@gmail.com>
-Cc: Kukjin Kim <kgene.kim@samsung.com>
-Cc: Haojian Zhuang <haojian.zhuang@linaro.org>
-Cc: Chao Xie <xiechao.mail@gmail.com>
-Cc: Arnd Bergmann <arnd@arndb.de>
-Cc: "Emilio López" <emilio@elopez.com.ar>
-Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
-Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
-Cc: Prashant Gaikwad <pgaikwad@nvidia.com>
-Cc: Thierry Reding <thierry.reding@gmail.com>
-Cc: Peter De Schrijver <pdeschrijver@nvidia.com>
-Cc: Pawel Moll <pawel.moll@arm.com>
-Cc: Catalin Marinas <catalin.marinas@arm.com>
-Cc: Andrew Chew <achew@nvidia.com>
-Cc: Doug Anderson <dianders@chromium.org>
-Cc: Heiko Stuebner <heiko@sntech.de>
-Cc: Paul Walmsley <pwalmsley@nvidia.com>
-Cc: Sylwester Nawrocki <s.nawrocki@samsung.com>
-Cc: Thomas Abraham <thomas.abraham@linaro.org>
-Cc: Tomasz Figa <t.figa@samsung.com>
-Cc: linux-arm-kernel@lists.infradead.org
-Cc: linux-samsung-soc@vger.kernel.org
-Cc: spear-devel@list.st.com
-Cc: linux-tegra@vger.kernel.org
-Tested-by: Haojian Zhuang <haojian.zhuang@gmail.com>
-Acked-by: Stephen Warren <swarren@nvidia.com> [tegra]
-Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> [sunxi]
-Acked-by: Sören Brinkmann <soren.brinkmann@xilinx.com> [Zynq]
-Signed-off-by: Mike Turquette <mturquette@linaro.org>
-(cherry picked from commit 819c1de344c5b8350bffd35be9a0fa74541292d3)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/clk/zynq/clkc.c      |   80 ++++++++++++++++++++++++-------------------
- include/linux/clk-provider.h |    1 
- 2 files changed, 47 insertions(+), 34 deletions(-)
-
---- a/drivers/clk/zynq/clkc.c
-+++ b/drivers/clk/zynq/clkc.c
-@@ -125,8 +125,9 @@ static void __init zynq_clk_register_fcl
- 	div0_name = kasprintf(GFP_KERNEL, "%s_div0", clk_name);
- 	div1_name = kasprintf(GFP_KERNEL, "%s_div1", clk_name);
- 
--	clk = clk_register_mux(NULL, mux_name, parents, 4, 0,
--			fclk_ctrl_reg, 4, 2, 0, fclk_lock);
-+	clk = clk_register_mux(NULL, mux_name, parents, 4,
-+			CLK_SET_RATE_NO_REPARENT, fclk_ctrl_reg, 4, 2, 0,
-+			fclk_lock);
- 
- 	clk = clk_register_divider(NULL, div0_name, mux_name,
- 			0, fclk_ctrl_reg, 8, 6, CLK_DIVIDER_ONE_BASED |
-@@ -168,8 +169,8 @@ static void __init zynq_clk_register_per
- 	mux_name = kasprintf(GFP_KERNEL, "%s_mux", clk_name0);
- 	div_name = kasprintf(GFP_KERNEL, "%s_div", clk_name0);
- 
--	clk = clk_register_mux(NULL, mux_name, parents, 4, 0,
--			clk_ctrl, 4, 2, 0, lock);
-+	clk = clk_register_mux(NULL, mux_name, parents, 4,
-+			CLK_SET_RATE_NO_REPARENT, clk_ctrl, 4, 2, 0, lock);
- 
- 	clk = clk_register_divider(NULL, div_name, mux_name, 0, clk_ctrl, 8, 6,
- 			CLK_DIVIDER_ONE_BASED | CLK_DIVIDER_ALLOW_ZERO, lock);
-@@ -236,25 +237,26 @@ static void __init zynq_clk_setup(struct
- 	clk = clk_register_zynq_pll("armpll_int", "ps_clk", SLCR_ARMPLL_CTRL,
- 			SLCR_PLL_STATUS, 0, &armpll_lock);
- 	clks[armpll] = clk_register_mux(NULL, clk_output_name[armpll],
--			armpll_parents, 2, 0, SLCR_ARMPLL_CTRL, 4, 1, 0,
--			&armpll_lock);
-+			armpll_parents, 2, CLK_SET_RATE_NO_REPARENT,
-+			SLCR_ARMPLL_CTRL, 4, 1, 0, &armpll_lock);
- 
- 	clk = clk_register_zynq_pll("ddrpll_int", "ps_clk", SLCR_DDRPLL_CTRL,
- 			SLCR_PLL_STATUS, 1, &ddrpll_lock);
- 	clks[ddrpll] = clk_register_mux(NULL, clk_output_name[ddrpll],
--			ddrpll_parents, 2, 0, SLCR_DDRPLL_CTRL, 4, 1, 0,
--			&ddrpll_lock);
-+			ddrpll_parents, 2, CLK_SET_RATE_NO_REPARENT,
-+			SLCR_DDRPLL_CTRL, 4, 1, 0, &ddrpll_lock);
- 
- 	clk = clk_register_zynq_pll("iopll_int", "ps_clk", SLCR_IOPLL_CTRL,
- 			SLCR_PLL_STATUS, 2, &iopll_lock);
- 	clks[iopll] = clk_register_mux(NULL, clk_output_name[iopll],
--			iopll_parents, 2, 0, SLCR_IOPLL_CTRL, 4, 1, 0,
--			&iopll_lock);
-+			iopll_parents, 2, CLK_SET_RATE_NO_REPARENT,
-+			SLCR_IOPLL_CTRL, 4, 1, 0, &iopll_lock);
- 
- 	/* CPU clocks */
- 	tmp = readl(SLCR_621_TRUE) & 1;
--	clk = clk_register_mux(NULL, "cpu_mux", cpu_parents, 4, 0,
--			SLCR_ARM_CLK_CTRL, 4, 2, 0, &armclk_lock);
-+	clk = clk_register_mux(NULL, "cpu_mux", cpu_parents, 4,
-+			CLK_SET_RATE_NO_REPARENT, SLCR_ARM_CLK_CTRL, 4, 2, 0,
-+			&armclk_lock);
- 	clk = clk_register_divider(NULL, "cpu_div", "cpu_mux", 0,
- 			SLCR_ARM_CLK_CTRL, 8, 6, CLK_DIVIDER_ONE_BASED |
- 			CLK_DIVIDER_ALLOW_ZERO, &armclk_lock);
-@@ -293,8 +295,9 @@ static void __init zynq_clk_setup(struct
- 			swdt_ext_clk_mux_parents[i + 1] = dummy_nm;
- 	}
- 	clks[swdt] = clk_register_mux(NULL, clk_output_name[swdt],
--			swdt_ext_clk_mux_parents, 2, CLK_SET_RATE_PARENT,
--			SLCR_SWDT_CLK_SEL, 0, 1, 0, &swdtclk_lock);
-+			swdt_ext_clk_mux_parents, 2, CLK_SET_RATE_PARENT |
-+			CLK_SET_RATE_NO_REPARENT, SLCR_SWDT_CLK_SEL, 0, 1, 0,
-+			&gem0clk_lock);
- 
- 	/* DDR clocks */
- 	clk = clk_register_divider(NULL, "ddr2x_div", "ddrpll", 0,
-@@ -356,8 +359,9 @@ static void __init zynq_clk_setup(struct
- 			gem0_mux_parents[i + 1] = of_clk_get_parent_name(np,
- 					idx);
- 	}
--	clk = clk_register_mux(NULL, "gem0_mux", periph_parents, 4, 0,
--			SLCR_GEM0_CLK_CTRL, 4, 2, 0, &gem0clk_lock);
-+	clk = clk_register_mux(NULL, "gem0_mux", periph_parents, 4,
-+			CLK_SET_RATE_NO_REPARENT, SLCR_GEM0_CLK_CTRL, 4, 2, 0,
-+			&gem0clk_lock);
- 	clk = clk_register_divider(NULL, "gem0_div0", "gem0_mux", 0,
- 			SLCR_GEM0_CLK_CTRL, 8, 6, CLK_DIVIDER_ONE_BASED |
- 			CLK_DIVIDER_ALLOW_ZERO, &gem0clk_lock);
-@@ -366,7 +370,7 @@ static void __init zynq_clk_setup(struct
- 			CLK_DIVIDER_ONE_BASED | CLK_DIVIDER_ALLOW_ZERO,
- 			&gem0clk_lock);
- 	clk = clk_register_mux(NULL, "gem0_emio_mux", gem0_mux_parents, 2,
--			CLK_SET_RATE_PARENT, SLCR_GEM0_CLK_CTRL, 6, 1, 0,
-+			CLK_SET_RATE_NO_REPARENT, SLCR_GEM0_CLK_CTRL, 6, 1, 0,
- 			&gem0clk_lock);
- 	clks[gem0] = clk_register_gate(NULL, clk_output_name[gem0],
- 			"gem0_emio_mux", CLK_SET_RATE_PARENT,
-@@ -379,8 +383,9 @@ static void __init zynq_clk_setup(struct
- 			gem1_mux_parents[i + 1] = of_clk_get_parent_name(np,
- 					idx);
- 	}
--	clk = clk_register_mux(NULL, "gem1_mux", periph_parents, 4, 0,
--			SLCR_GEM1_CLK_CTRL, 4, 2, 0, &gem1clk_lock);
-+	clk = clk_register_mux(NULL, "gem1_mux", periph_parents, 4,
-+			CLK_SET_RATE_NO_REPARENT, SLCR_GEM1_CLK_CTRL, 4, 2, 0,
-+			&gem1clk_lock);
- 	clk = clk_register_divider(NULL, "gem1_div0", "gem1_mux", 0,
- 			SLCR_GEM1_CLK_CTRL, 8, 6, CLK_DIVIDER_ONE_BASED |
- 			CLK_DIVIDER_ALLOW_ZERO, &gem1clk_lock);
-@@ -389,7 +394,7 @@ static void __init zynq_clk_setup(struct
- 			CLK_DIVIDER_ONE_BASED | CLK_DIVIDER_ALLOW_ZERO,
- 			&gem1clk_lock);
- 	clk = clk_register_mux(NULL, "gem1_emio_mux", gem1_mux_parents, 2,
--			CLK_SET_RATE_PARENT, SLCR_GEM1_CLK_CTRL, 6, 1, 0,
-+			CLK_SET_RATE_NO_REPARENT, SLCR_GEM1_CLK_CTRL, 6, 1, 0,
- 			&gem1clk_lock);
- 	clks[gem1] = clk_register_gate(NULL, clk_output_name[gem1],
- 			"gem1_emio_mux", CLK_SET_RATE_PARENT,
-@@ -409,8 +414,9 @@ static void __init zynq_clk_setup(struct
- 			can_mio_mux_parents[i] = dummy_nm;
- 	}
- 	kfree(clk_name);
--	clk = clk_register_mux(NULL, "can_mux", periph_parents, 4, 0,
--			SLCR_CAN_CLK_CTRL, 4, 2, 0, &canclk_lock);
-+	clk = clk_register_mux(NULL, "can_mux", periph_parents, 4,
-+			CLK_SET_RATE_NO_REPARENT, SLCR_CAN_CLK_CTRL, 4, 2, 0,
-+			&canclk_lock);
- 	clk = clk_register_divider(NULL, "can_div0", "can_mux", 0,
- 			SLCR_CAN_CLK_CTRL, 8, 6, CLK_DIVIDER_ONE_BASED |
- 			CLK_DIVIDER_ALLOW_ZERO, &canclk_lock);
-@@ -425,17 +431,21 @@ static void __init zynq_clk_setup(struct
- 			CLK_SET_RATE_PARENT, SLCR_CAN_CLK_CTRL, 1, 0,
- 			&canclk_lock);
- 	clk = clk_register_mux(NULL, "can0_mio_mux",
--			can_mio_mux_parents, 54, CLK_SET_RATE_PARENT,
--			SLCR_CAN_MIOCLK_CTRL, 0, 6, 0, &canmioclk_lock);
-+			can_mio_mux_parents, 54, CLK_SET_RATE_PARENT |
-+			CLK_SET_RATE_NO_REPARENT, SLCR_CAN_MIOCLK_CTRL, 0, 6, 0,
-+			&canmioclk_lock);
- 	clk = clk_register_mux(NULL, "can1_mio_mux",
--			can_mio_mux_parents, 54, CLK_SET_RATE_PARENT,
--			SLCR_CAN_MIOCLK_CTRL, 16, 6, 0, &canmioclk_lock);
-+			can_mio_mux_parents, 54, CLK_SET_RATE_PARENT |
-+			CLK_SET_RATE_NO_REPARENT, SLCR_CAN_MIOCLK_CTRL, 16, 6,
-+			0, &canmioclk_lock);
- 	clks[can0] = clk_register_mux(NULL, clk_output_name[can0],
--			can0_mio_mux2_parents, 2, CLK_SET_RATE_PARENT,
--			SLCR_CAN_MIOCLK_CTRL, 6, 1, 0, &canmioclk_lock);
-+			can0_mio_mux2_parents, 2, CLK_SET_RATE_PARENT |
-+			CLK_SET_RATE_NO_REPARENT, SLCR_CAN_MIOCLK_CTRL, 6, 1, 0,
-+			&canmioclk_lock);
- 	clks[can1] = clk_register_mux(NULL, clk_output_name[can1],
--			can1_mio_mux2_parents, 2, CLK_SET_RATE_PARENT,
--			SLCR_CAN_MIOCLK_CTRL, 22, 1, 0, &canmioclk_lock);
-+			can1_mio_mux2_parents, 2, CLK_SET_RATE_PARENT |
-+			CLK_SET_RATE_NO_REPARENT, SLCR_CAN_MIOCLK_CTRL, 22, 1,
-+			0, &canmioclk_lock);
- 
- 	for (i = 0; i < ARRAY_SIZE(dbgtrc_emio_input_names); i++) {
- 		int idx = of_property_match_string(np, "clock-names",
-@@ -444,13 +454,15 @@ static void __init zynq_clk_setup(struct
- 			dbg_emio_mux_parents[i + 1] = of_clk_get_parent_name(np,
- 					idx);
- 	}
--	clk = clk_register_mux(NULL, "dbg_mux", periph_parents, 4, 0,
--			SLCR_DBG_CLK_CTRL, 4, 2, 0, &dbgclk_lock);
-+	clk = clk_register_mux(NULL, "dbg_mux", periph_parents, 4,
-+			CLK_SET_RATE_NO_REPARENT, SLCR_DBG_CLK_CTRL, 4, 2, 0,
-+			&dbgclk_lock);
- 	clk = clk_register_divider(NULL, "dbg_div", "dbg_mux", 0,
- 			SLCR_DBG_CLK_CTRL, 8, 6, CLK_DIVIDER_ONE_BASED |
- 			CLK_DIVIDER_ALLOW_ZERO, &dbgclk_lock);
--	clk = clk_register_mux(NULL, "dbg_emio_mux", dbg_emio_mux_parents, 2, 0,
--			SLCR_DBG_CLK_CTRL, 6, 1, 0, &dbgclk_lock);
-+	clk = clk_register_mux(NULL, "dbg_emio_mux", dbg_emio_mux_parents, 2,
-+			CLK_SET_RATE_NO_REPARENT, SLCR_DBG_CLK_CTRL, 6, 1, 0,
-+			&dbgclk_lock);
- 	clks[dbg_trc] = clk_register_gate(NULL, clk_output_name[dbg_trc],
- 			"dbg_emio_mux", CLK_SET_RATE_PARENT, SLCR_DBG_CLK_CTRL,
- 			0, 0, &dbgclk_lock);
---- a/include/linux/clk-provider.h
-+++ b/include/linux/clk-provider.h
-@@ -28,6 +28,7 @@
- #define CLK_IS_ROOT		BIT(4) /* root clk, has no parent */
- #define CLK_IS_BASIC		BIT(5) /* Basic clk, can't do a to_clk_foo() */
- #define CLK_GET_RATE_NOCACHE	BIT(6) /* do not use the cached clk rate */
-+#define CLK_SET_RATE_NO_REPARENT BIT(7) /* don't re-parent on rate change */
- 
- struct clk_hw;
- 
diff --git a/patches.zynq/0040-Merge-tag-clk-for-linus-3.12-of-git-git.linaro.org-p.patch b/patches.zynq/0040-Merge-tag-clk-for-linus-3.12-of-git-git.linaro.org-p.patch
deleted file mode 100644
index c0486dbfa0fab..0000000000000
--- a/patches.zynq/0040-Merge-tag-clk-for-linus-3.12-of-git-git.linaro.org-p.patch
+++ /dev/null
@@ -1,78 +0,0 @@
-From aac5b796df5c5322b8646f83804db6d83aca46c3 Mon Sep 17 00:00:00 2001
-From: Linus Torvalds <torvalds@linux-foundation.org>
-Date: Mon, 2 Dec 2013 10:39:23 +0900
-Subject: Merge tag 'clk-for-linus-3.12' of
- git://git.linaro.org/people/mturquette/linux
-
-Pull clock framework changes from Michael Turquette:
-"The common clk framework changes for 3.12 are dominated by clock
-driver patches, both new drivers and fixes to existing.  A high
-percentage of these are for Samsung platforms like Exynos.  Core
-framework fixes and some new features like automagical clock
-re-parenting round out the patches"
-
-* tag 'clk-for-linus-3.12' of git://git.linaro.org/people/mturquette/linux: (102 commits)
-clk: only call get_parent if there is one
-clk: samsung: exynos5250: Simplify registration of PLL rate tables
-clk: samsung: exynos4: Register PLL rate tables for Exynos4x12
-clk: samsung: exynos4: Register PLL rate tables for Exynos4210
-clk: samsung: exynos4: Reorder registration of mout_vpllsrc
-clk: samsung: pll: Add support for rate configuration of PLL46xx
-clk: samsung: pll: Use new registration method for PLL46xx
-clk: samsung: pll: Add support for rate configuration of PLL45xx
-clk: samsung: pll: Use new registration method for PLL45xx
-clk: samsung: exynos4: Rename exynos4_plls to exynos4x12_plls
-clk: samsung: exynos4: Remove checks for DT node
-clk: samsung: exynos4: Remove unused static clkdev aliases
-clk: samsung: Modify _get_rate() helper to use __clk_lookup()
-clk: samsung: exynos4: Use separate aliases for cpufreq related clocks
-clocksource: samsung_pwm_timer: Get clock from device tree
-ARM: dts: exynos4: Specify PWM clocks in PWM node
-pwm: samsung: Update DT bindings documentation to cover clocks
-clk: Move symbol export to proper location
-clk: fix new_parent dereference before null check
-clk: wm831x: Initialise wm831x pointer on init
-
-(cherry picked from commit bef4a0ab984662d4ccd68d431a7c4ef3daebcb43)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/clk/zynq/clkc.c | 8 +++++---
- 1 file changed, 5 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/clk/zynq/clkc.c b/drivers/clk/zynq/clkc.c
-index 6169d56fb6f1..cc40fe64f2dc 100644
---- a/drivers/clk/zynq/clkc.c
-+++ b/drivers/clk/zynq/clkc.c
-@@ -297,7 +297,7 @@ static void __init zynq_clk_setup(struct device_node *np)
- 	clks[swdt] = clk_register_mux(NULL, clk_output_name[swdt],
- 			swdt_ext_clk_mux_parents, 2, CLK_SET_RATE_PARENT |
- 			CLK_SET_RATE_NO_REPARENT, SLCR_SWDT_CLK_SEL, 0, 1, 0,
--			&gem0clk_lock);
-+			&swdtclk_lock);
- 
- 	/* DDR clocks */
- 	clk = clk_register_divider(NULL, "ddr2x_div", "ddrpll", 0,
-@@ -370,7 +370,8 @@ static void __init zynq_clk_setup(struct device_node *np)
- 			CLK_DIVIDER_ONE_BASED | CLK_DIVIDER_ALLOW_ZERO,
- 			&gem0clk_lock);
- 	clk = clk_register_mux(NULL, "gem0_emio_mux", gem0_mux_parents, 2,
--			CLK_SET_RATE_NO_REPARENT, SLCR_GEM0_CLK_CTRL, 6, 1, 0,
-+			CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
-+			SLCR_GEM0_CLK_CTRL, 6, 1, 0,
- 			&gem0clk_lock);
- 	clks[gem0] = clk_register_gate(NULL, clk_output_name[gem0],
- 			"gem0_emio_mux", CLK_SET_RATE_PARENT,
-@@ -394,7 +395,8 @@ static void __init zynq_clk_setup(struct device_node *np)
- 			CLK_DIVIDER_ONE_BASED | CLK_DIVIDER_ALLOW_ZERO,
- 			&gem1clk_lock);
- 	clk = clk_register_mux(NULL, "gem1_emio_mux", gem1_mux_parents, 2,
--			CLK_SET_RATE_NO_REPARENT, SLCR_GEM1_CLK_CTRL, 6, 1, 0,
-+			CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
-+			SLCR_GEM1_CLK_CTRL, 6, 1, 0,
- 			&gem1clk_lock);
- 	clks[gem1] = clk_register_gate(NULL, clk_output_name[gem1],
- 			"gem1_emio_mux", CLK_SET_RATE_PARENT,
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0041-clk-zynq-Fix-possible-memory-leak.patch b/patches.zynq/0041-clk-zynq-Fix-possible-memory-leak.patch
deleted file mode 100644
index 4fd314016a44b..0000000000000
--- a/patches.zynq/0041-clk-zynq-Fix-possible-memory-leak.patch
+++ /dev/null
@@ -1,64 +0,0 @@
-From 39b5005431c5abedee2ee97e6083bea8e5c1cf98 Mon Sep 17 00:00:00 2001
-From: Felipe Pena <felipensp@gmail.com>
-Date: Mon, 7 Oct 2013 23:25:44 -0300
-Subject: clk/zynq: Fix possible memory leak
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The zynq_clk_register_fclk function can leak memory (fclk_lock) when unable
-to alloc memory for fclk_gate_lock
-
-Signed-off-by: Felipe Pena <felipensp@gmail.com>
-Acked-by: Sören Brinkmann <soren.brinkmann@xilinx.com>
-Signed-off-by: Mike Turquette <mturquette@linaro.org>
-(cherry picked from commit f8fe36f6083a70270a7305f7740b124ff1e8aea7)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/clk/zynq/clkc.c | 16 +++++++++++++++-
- 1 file changed, 15 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/clk/zynq/clkc.c b/drivers/clk/zynq/clkc.c
-index cc40fe64f2dc..10772aa72e4e 100644
---- a/drivers/clk/zynq/clkc.c
-+++ b/drivers/clk/zynq/clkc.c
-@@ -117,13 +117,19 @@ static void __init zynq_clk_register_fclk(enum zynq_clk fclk,
- 		goto err;
- 	fclk_gate_lock = kmalloc(sizeof(*fclk_gate_lock), GFP_KERNEL);
- 	if (!fclk_gate_lock)
--		goto err;
-+		goto err_fclk_gate_lock;
- 	spin_lock_init(fclk_lock);
- 	spin_lock_init(fclk_gate_lock);
- 
- 	mux_name = kasprintf(GFP_KERNEL, "%s_mux", clk_name);
-+	if (!mux_name)
-+		goto err_mux_name;
- 	div0_name = kasprintf(GFP_KERNEL, "%s_div0", clk_name);
-+	if (!div0_name)
-+		goto err_div0_name;
- 	div1_name = kasprintf(GFP_KERNEL, "%s_div1", clk_name);
-+	if (!div1_name)
-+		goto err_div1_name;
- 
- 	clk = clk_register_mux(NULL, mux_name, parents, 4,
- 			CLK_SET_RATE_NO_REPARENT, fclk_ctrl_reg, 4, 2, 0,
-@@ -147,6 +153,14 @@ static void __init zynq_clk_register_fclk(enum zynq_clk fclk,
- 
- 	return;
- 
-+err_div1_name:
-+	kfree(div0_name);
-+err_div0_name:
-+	kfree(mux_name);
-+err_mux_name:
-+	kfree(fclk_gate_lock);
-+err_fclk_gate_lock:
-+	kfree(fclk_lock);
- err:
- 	clks[fclk] = ERR_PTR(-ENOMEM);
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0042-clk-zynq-Factor-out-PLL-driver.patch b/patches.zynq/0042-clk-zynq-Factor-out-PLL-driver.patch
deleted file mode 100644
index f660dfc0ed607..0000000000000
--- a/patches.zynq/0042-clk-zynq-Factor-out-PLL-driver.patch
+++ /dev/null
@@ -1,262 +0,0 @@
-From c941bcb6045b8a2a89fe393c4a71452996055bf7 Mon Sep 17 00:00:00 2001
-From: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Date: Mon, 13 May 2013 10:46:36 -0700
-Subject: clk: zynq: Factor out PLL driver
-
-Refactor the PLL driver so it works with the clock controller driver.
-
-Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-Acked-by: Mike Turquette <mturquette@linaro.org>
-(cherry picked from commit 3682af46d55f2c97898b9cc1c8c80afad81f62be)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/clk/zynq/pll.c | 235 +++++++++++++++++++++++++++++++++++++++++++++++++
- 1 file changed, 235 insertions(+)
- create mode 100644 drivers/clk/zynq/pll.c
-
-diff --git a/drivers/clk/zynq/pll.c b/drivers/clk/zynq/pll.c
-new file mode 100644
-index 000000000000..47e307c25a7b
---- /dev/null
-+++ b/drivers/clk/zynq/pll.c
-@@ -0,0 +1,235 @@
-+/*
-+ * Zynq PLL driver
-+ *
-+ *  Copyright (C) 2013 Xilinx
-+ *
-+ *  Sören Brinkmann <soren.brinkmann@xilinx.com>
-+ *
-+ * This program is free software: you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License v2 as published by
-+ * the Free Software Foundation.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
-+ *
-+ */
-+#include <linux/clk/zynq.h>
-+#include <linux/clk-provider.h>
-+#include <linux/slab.h>
-+#include <linux/io.h>
-+
-+/**
-+ * struct zynq_pll
-+ * @hw:		Handle between common and hardware-specific interfaces
-+ * @pll_ctrl:	PLL control register
-+ * @pll_status:	PLL status register
-+ * @lock:	Register lock
-+ * @lockbit:	Indicates the associated PLL_LOCKED bit in the PLL status
-+ *		register.
-+ */
-+struct zynq_pll {
-+	struct clk_hw	hw;
-+	void __iomem	*pll_ctrl;
-+	void __iomem	*pll_status;
-+	spinlock_t	*lock;
-+	u8		lockbit;
-+};
-+#define to_zynq_pll(_hw)	container_of(_hw, struct zynq_pll, hw)
-+
-+/* Register bitfield defines */
-+#define PLLCTRL_FBDIV_MASK	0x7f000
-+#define PLLCTRL_FBDIV_SHIFT	12
-+#define PLLCTRL_BPQUAL_MASK	(1 << 3)
-+#define PLLCTRL_PWRDWN_MASK	2
-+#define PLLCTRL_PWRDWN_SHIFT	1
-+#define PLLCTRL_RESET_MASK	1
-+#define PLLCTRL_RESET_SHIFT	0
-+
-+/**
-+ * zynq_pll_round_rate() - Round a clock frequency
-+ * @hw:		Handle between common and hardware-specific interfaces
-+ * @rate:	Desired clock frequency
-+ * @prate:	Clock frequency of parent clock
-+ * Returns frequency closest to @rate the hardware can generate.
-+ */
-+static long zynq_pll_round_rate(struct clk_hw *hw, unsigned long rate,
-+		unsigned long *prate)
-+{
-+	u32 fbdiv;
-+
-+	fbdiv = DIV_ROUND_CLOSEST(rate, *prate);
-+	if (fbdiv < 13)
-+		fbdiv = 13;
-+	else if (fbdiv > 66)
-+		fbdiv = 66;
-+
-+	return *prate * fbdiv;
-+}
-+
-+/**
-+ * zynq_pll_recalc_rate() - Recalculate clock frequency
-+ * @hw:			Handle between common and hardware-specific interfaces
-+ * @parent_rate:	Clock frequency of parent clock
-+ * Returns current clock frequency.
-+ */
-+static unsigned long zynq_pll_recalc_rate(struct clk_hw *hw,
-+		unsigned long parent_rate)
-+{
-+	struct zynq_pll *clk = to_zynq_pll(hw);
-+	u32 fbdiv;
-+
-+	/*
-+	 * makes probably sense to redundantly save fbdiv in the struct
-+	 * zynq_pll to save the IO access.
-+	 */
-+	fbdiv = (readl(clk->pll_ctrl) & PLLCTRL_FBDIV_MASK) >>
-+			PLLCTRL_FBDIV_SHIFT;
-+
-+	return parent_rate * fbdiv;
-+}
-+
-+/**
-+ * zynq_pll_is_enabled - Check if a clock is enabled
-+ * @hw:		Handle between common and hardware-specific interfaces
-+ * Returns 1 if the clock is enabled, 0 otherwise.
-+ *
-+ * Not sure this is a good idea, but since disabled means bypassed for
-+ * this clock implementation we say we are always enabled.
-+ */
-+static int zynq_pll_is_enabled(struct clk_hw *hw)
-+{
-+	unsigned long flags = 0;
-+	u32 reg;
-+	struct zynq_pll *clk = to_zynq_pll(hw);
-+
-+	spin_lock_irqsave(clk->lock, flags);
-+
-+	reg = readl(clk->pll_ctrl);
-+
-+	spin_unlock_irqrestore(clk->lock, flags);
-+
-+	return !(reg & (PLLCTRL_RESET_MASK | PLLCTRL_PWRDWN_MASK));
-+}
-+
-+/**
-+ * zynq_pll_enable - Enable clock
-+ * @hw:		Handle between common and hardware-specific interfaces
-+ * Returns 0 on success
-+ */
-+static int zynq_pll_enable(struct clk_hw *hw)
-+{
-+	unsigned long flags = 0;
-+	u32 reg;
-+	struct zynq_pll *clk = to_zynq_pll(hw);
-+
-+	if (zynq_pll_is_enabled(hw))
-+		return 0;
-+
-+	pr_info("PLL: enable\n");
-+
-+	/* Power up PLL and wait for lock */
-+	spin_lock_irqsave(clk->lock, flags);
-+
-+	reg = readl(clk->pll_ctrl);
-+	reg &= ~(PLLCTRL_RESET_MASK | PLLCTRL_PWRDWN_MASK);
-+	writel(reg, clk->pll_ctrl);
-+	while (!(readl(clk->pll_status) & (1 << clk->lockbit)))
-+		;
-+
-+	spin_unlock_irqrestore(clk->lock, flags);
-+
-+	return 0;
-+}
-+
-+/**
-+ * zynq_pll_disable - Disable clock
-+ * @hw:		Handle between common and hardware-specific interfaces
-+ * Returns 0 on success
-+ */
-+static void zynq_pll_disable(struct clk_hw *hw)
-+{
-+	unsigned long flags = 0;
-+	u32 reg;
-+	struct zynq_pll *clk = to_zynq_pll(hw);
-+
-+	if (!zynq_pll_is_enabled(hw))
-+		return;
-+
-+	pr_info("PLL: shutdown\n");
-+
-+	/* shut down PLL */
-+	spin_lock_irqsave(clk->lock, flags);
-+
-+	reg = readl(clk->pll_ctrl);
-+	reg |= PLLCTRL_RESET_MASK | PLLCTRL_PWRDWN_MASK;
-+	writel(reg, clk->pll_ctrl);
-+
-+	spin_unlock_irqrestore(clk->lock, flags);
-+}
-+
-+static const struct clk_ops zynq_pll_ops = {
-+	.enable = zynq_pll_enable,
-+	.disable = zynq_pll_disable,
-+	.is_enabled = zynq_pll_is_enabled,
-+	.round_rate = zynq_pll_round_rate,
-+	.recalc_rate = zynq_pll_recalc_rate
-+};
-+
-+/**
-+ * clk_register_zynq_pll() - Register PLL with the clock framework
-+ * @np	Pointer to the DT device node
-+ */
-+struct clk *clk_register_zynq_pll(const char *name, const char *parent,
-+		void __iomem *pll_ctrl, void __iomem *pll_status, u8 lock_index,
-+		spinlock_t *lock)
-+{
-+	struct zynq_pll *pll;
-+	struct clk *clk;
-+	u32 reg;
-+	const char *parent_arr[1] = {parent};
-+	unsigned long flags = 0;
-+	struct clk_init_data initd = {
-+		.name = name,
-+		.parent_names = parent_arr,
-+		.ops = &zynq_pll_ops,
-+		.num_parents = 1,
-+		.flags = 0
-+	};
-+
-+	pll = kmalloc(sizeof(*pll), GFP_KERNEL);
-+	if (!pll) {
-+		pr_err("%s: Could not allocate Zynq PLL clk.\n", __func__);
-+		return ERR_PTR(-ENOMEM);
-+	}
-+
-+	/* Populate the struct */
-+	pll->hw.init = &initd;
-+	pll->pll_ctrl = pll_ctrl;
-+	pll->pll_status = pll_status;
-+	pll->lockbit = lock_index;
-+	pll->lock = lock;
-+
-+	spin_lock_irqsave(pll->lock, flags);
-+
-+	reg = readl(pll->pll_ctrl);
-+	reg &= ~PLLCTRL_BPQUAL_MASK;
-+	writel(reg, pll->pll_ctrl);
-+
-+	spin_unlock_irqrestore(pll->lock, flags);
-+
-+	clk = clk_register(NULL, &pll->hw);
-+	if (WARN_ON(IS_ERR(clk)))
-+		goto free_pll;
-+
-+	return clk;
-+
-+free_pll:
-+	kfree(pll);
-+
-+	return clk;
-+}
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0043-clk-zynq-pll-Fix-documentation-for-PLL-register-func.patch b/patches.zynq/0043-clk-zynq-pll-Fix-documentation-for-PLL-register-func.patch
deleted file mode 100644
index 0e297c4e31774..0000000000000
--- a/patches.zynq/0043-clk-zynq-pll-Fix-documentation-for-PLL-register-func.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From bb636310249b365d2bb98cdc56ac4b31643016fa Mon Sep 17 00:00:00 2001
-From: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Date: Fri, 19 Jul 2013 10:16:44 -0700
-Subject: clk/zynq/pll: Fix documentation for PLL register function
-
-Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-(cherry picked from commit 14924ba288921c536a72e71baeb14322ece44b39)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/clk/zynq/pll.c | 8 +++++++-
- 1 file changed, 7 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/clk/zynq/pll.c b/drivers/clk/zynq/pll.c
-index 47e307c25a7b..6daa7b6702ed 100644
---- a/drivers/clk/zynq/pll.c
-+++ b/drivers/clk/zynq/pll.c
-@@ -182,7 +182,13 @@ static const struct clk_ops zynq_pll_ops = {
- 
- /**
-  * clk_register_zynq_pll() - Register PLL with the clock framework
-- * @np	Pointer to the DT device node
-+ * @name	PLL name
-+ * @parent	Parent clock name
-+ * @pll_ctrl	Pointer to PLL control register
-+ * @pll_status	Pointer to PLL status register
-+ * @lock_index	Bit index to this PLL's lock status bit in @pll_status
-+ * @lock	Register lock
-+ * Returns handle to the registered clock.
-  */
- struct clk *clk_register_zynq_pll(const char *name, const char *parent,
- 		void __iomem *pll_ctrl, void __iomem *pll_status, u8 lock_index,
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0044-clk-zynq-pll-Use-defines-for-fbdiv-min-max-values.patch b/patches.zynq/0044-clk-zynq-pll-Use-defines-for-fbdiv-min-max-values.patch
deleted file mode 100644
index 9803e32de10b3..0000000000000
--- a/patches.zynq/0044-clk-zynq-pll-Use-defines-for-fbdiv-min-max-values.patch
+++ /dev/null
@@ -1,49 +0,0 @@
-From c9ae039aa0af3eac0f187339fcffb1b0e71c0a96 Mon Sep 17 00:00:00 2001
-From: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Date: Fri, 19 Jul 2013 10:16:45 -0700
-Subject: clk/zynq/pll: Use #defines for fbdiv min/max values
-
-Use more descriptive #defines for the minimum and maximum PLL
-feedback divider.
-
-Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-(cherry picked from commit 353dc6c47d67c83f7cc20334f8deb251674e6864)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/clk/zynq/pll.c | 11 +++++++----
- 1 file changed, 7 insertions(+), 4 deletions(-)
-
-diff --git a/drivers/clk/zynq/pll.c b/drivers/clk/zynq/pll.c
-index 6daa7b6702ed..3226f54fa595 100644
---- a/drivers/clk/zynq/pll.c
-+++ b/drivers/clk/zynq/pll.c
-@@ -50,6 +50,9 @@ struct zynq_pll {
- #define PLLCTRL_RESET_MASK	1
- #define PLLCTRL_RESET_SHIFT	0
- 
-+#define PLL_FBDIV_MIN	13
-+#define PLL_FBDIV_MAX	66
-+
- /**
-  * zynq_pll_round_rate() - Round a clock frequency
-  * @hw:		Handle between common and hardware-specific interfaces
-@@ -63,10 +66,10 @@ static long zynq_pll_round_rate(struct clk_hw *hw, unsigned long rate,
- 	u32 fbdiv;
- 
- 	fbdiv = DIV_ROUND_CLOSEST(rate, *prate);
--	if (fbdiv < 13)
--		fbdiv = 13;
--	else if (fbdiv > 66)
--		fbdiv = 66;
-+	if (fbdiv < PLL_FBDIV_MIN)
-+		fbdiv = PLL_FBDIV_MIN;
-+	else if (fbdiv > PLL_FBDIV_MAX)
-+		fbdiv = PLL_FBDIV_MAX;
- 
- 	return *prate * fbdiv;
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0045-spi-spi-xilinx-Add-run-run-time-endian-detection.patch b/patches.zynq/0045-spi-spi-xilinx-Add-run-run-time-endian-detection.patch
deleted file mode 100644
index fc0c067e8b990..0000000000000
--- a/patches.zynq/0045-spi-spi-xilinx-Add-run-run-time-endian-detection.patch
+++ /dev/null
@@ -1,127 +0,0 @@
-From 779734a79029a3703ddb2eda774fb6cbb3dfeb62 Mon Sep 17 00:00:00 2001
-From: Michal Simek <michal.simek@xilinx.com>
-Date: Tue, 4 Jun 2013 16:02:36 +0200
-Subject: spi: spi-xilinx: Add run run-time endian detection
-
-Do not load endian value from platform data
-and rather autodetect it.
-
-Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-Signed-off-by: Mark Brown <broonie@linaro.org>
-(cherry picked from commit 082339bc63cccf8ea49b1f3cf4ee39ce00742849)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/mfd/timberdale.c       |  1 -
- drivers/spi/spi-xilinx.c       | 29 +++++++++++++++++++++--------
- include/linux/spi/xilinx_spi.h |  1 -
- 3 files changed, 21 insertions(+), 10 deletions(-)
-
-diff --git a/drivers/mfd/timberdale.c b/drivers/mfd/timberdale.c
-index 59e0ee247e86..0c1fcbc23d04 100644
---- a/drivers/mfd/timberdale.c
-+++ b/drivers/mfd/timberdale.c
-@@ -145,7 +145,6 @@ static struct spi_board_info timberdale_spi_8bit_board_info[] = {
- 
- static struct xspi_platform_data timberdale_xspi_platform_data = {
- 	.num_chipselect = 3,
--	.little_endian = true,
- 	/* bits per word and devices will be filled in runtime depending
- 	 * on the HW config
- 	 */
-diff --git a/drivers/spi/spi-xilinx.c b/drivers/spi/spi-xilinx.c
-index 34d18dcfa0db..882f2cf3edbd 100644
---- a/drivers/spi/spi-xilinx.c
-+++ b/drivers/spi/spi-xilinx.c
-@@ -30,6 +30,7 @@
-  */
- #define XSPI_CR_OFFSET		0x60	/* Control Register */
- 
-+#define XSPI_CR_LOOP		0x01
- #define XSPI_CR_ENABLE		0x02
- #define XSPI_CR_MASTER_MODE	0x04
- #define XSPI_CR_CPOL		0x08
-@@ -355,11 +356,12 @@ static const struct of_device_id xilinx_spi_of_match[] = {
- MODULE_DEVICE_TABLE(of, xilinx_spi_of_match);
- 
- struct spi_master *xilinx_spi_init(struct device *dev, struct resource *mem,
--	u32 irq, s16 bus_num, int num_cs, int little_endian, int bits_per_word)
-+	u32 irq, s16 bus_num, int num_cs, int bits_per_word)
- {
- 	struct spi_master *master;
- 	struct xilinx_spi *xspi;
- 	int ret;
-+	u32 tmp;
- 
- 	master = spi_alloc_master(dev, sizeof(struct xilinx_spi));
- 	if (!master)
-@@ -392,13 +394,25 @@ struct spi_master *xilinx_spi_init(struct device *dev, struct resource *mem,
- 
- 	xspi->mem = *mem;
- 	xspi->irq = irq;
--	if (little_endian) {
--		xspi->read_fn = xspi_read32;
--		xspi->write_fn = xspi_write32;
--	} else {
-+
-+	/*
-+	 * Detect endianess on the IP via loop bit in CR. Detection
-+	 * must be done before reset is sent because incorrect reset
-+	 * value generates error interrupt.
-+	 * Setup little endian helper functions first and try to use them
-+	 * and check if bit was correctly setup or not.
-+	 */
-+	xspi->read_fn = xspi_read32;
-+	xspi->write_fn = xspi_write32;
-+
-+	xspi->write_fn(XSPI_CR_LOOP, xspi->regs + XSPI_CR_OFFSET);
-+	tmp = xspi->read_fn(xspi->regs + XSPI_CR_OFFSET);
-+	tmp &= XSPI_CR_LOOP;
-+	if (tmp != XSPI_CR_LOOP) {
- 		xspi->read_fn = xspi_read32_be;
- 		xspi->write_fn = xspi_write32_be;
- 	}
-+
- 	xspi->bits_per_word = bits_per_word;
- 	if (xspi->bits_per_word == 8) {
- 		xspi->tx_fn = xspi_tx8;
-@@ -462,14 +476,13 @@ static int xilinx_spi_probe(struct platform_device *dev)
- {
- 	struct xspi_platform_data *pdata;
- 	struct resource *r;
--	int irq, num_cs = 0, little_endian = 0, bits_per_word = 8;
-+	int irq, num_cs = 0, bits_per_word = 8;
- 	struct spi_master *master;
- 	u8 i;
- 
- 	pdata = dev->dev.platform_data;
- 	if (pdata) {
- 		num_cs = pdata->num_chipselect;
--		little_endian = pdata->little_endian;
- 		bits_per_word = pdata->bits_per_word;
- 	}
- 
-@@ -501,7 +514,7 @@ static int xilinx_spi_probe(struct platform_device *dev)
- 		return -ENXIO;
- 
- 	master = xilinx_spi_init(&dev->dev, r, irq, dev->id, num_cs,
--				 little_endian, bits_per_word);
-+				 bits_per_word);
- 	if (!master)
- 		return -ENODEV;
- 
-diff --git a/include/linux/spi/xilinx_spi.h b/include/linux/spi/xilinx_spi.h
-index 6f17278810b0..333ecdfee0d9 100644
---- a/include/linux/spi/xilinx_spi.h
-+++ b/include/linux/spi/xilinx_spi.h
-@@ -11,7 +11,6 @@
-  */
- struct xspi_platform_data {
- 	u16 num_chipselect;
--	bool little_endian;
- 	u8 bits_per_word;
- 	struct spi_board_info *devices;
- 	u8 num_devices;
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0046-spi-spi-xilinx-Remove-redundant-platform_set_drvdata.patch b/patches.zynq/0046-spi-spi-xilinx-Remove-redundant-platform_set_drvdata.patch
deleted file mode 100644
index b6df6eae45987..0000000000000
--- a/patches.zynq/0046-spi-spi-xilinx-Remove-redundant-platform_set_drvdata.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From 3bee85fa29ad04923a703f5c3dccda442f35a15d Mon Sep 17 00:00:00 2001
-From: Sachin Kamat <sachin.kamat@linaro.org>
-Date: Fri, 31 May 2013 17:17:49 +0530
-Subject: spi: spi-xilinx: Remove redundant platform_set_drvdata()
-
-Setting platform data to NULL is not necessary.
-Also fixes the following sparse warning:
-drivers/spi/spi-xilinx.c:508:35: warning: Using plain integer as NULL pointer
-
-Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
-Signed-off-by: Mark Brown <broonie@linaro.org>
-(cherry picked from commit 913b19660e166e718d419cccd753c3990881f17c)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/spi/spi-xilinx.c | 1 -
- 1 file changed, 1 deletion(-)
-
-diff --git a/drivers/spi/spi-xilinx.c b/drivers/spi/spi-xilinx.c
-index 882f2cf3edbd..a6c475b43dcc 100644
---- a/drivers/spi/spi-xilinx.c
-+++ b/drivers/spi/spi-xilinx.c
-@@ -530,7 +530,6 @@ static int xilinx_spi_probe(struct platform_device *dev)
- static int xilinx_spi_remove(struct platform_device *dev)
- {
- 	xilinx_spi_deinit(platform_get_drvdata(dev));
--	platform_set_drvdata(dev, 0);
- 
- 	return 0;
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0047-spi-spi-xilinx-cleanup-a-check-in-xilinx_spi_txrx_bu.patch b/patches.zynq/0047-spi-spi-xilinx-cleanup-a-check-in-xilinx_spi_txrx_bu.patch
deleted file mode 100644
index fbfdfa242e519..0000000000000
--- a/patches.zynq/0047-spi-spi-xilinx-cleanup-a-check-in-xilinx_spi_txrx_bu.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From cbe328377241c633b4b543cc0df99ff7483f2ec4 Mon Sep 17 00:00:00 2001
-From: "dan.carpenter@oracle.com" <dan.carpenter@oracle.com>
-Date: Sun, 9 Jun 2013 16:07:28 +0300
-Subject: spi: spi-xilinx: cleanup a check in xilinx_spi_txrx_bufs()
-
-'!' has higher precedence than comparisons so the original condition
-is equivalent to "if (xspi->remaining_bytes == 0)".  This makes the
-static checkers complain.
-
-xspi->remaining_bytes is signed and from looking at the code
-briefly, I think it might be able to go negative.  I suspect that
-going negative may cause a bug, but I don't have the hardware and
-can't test.
-
-Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
-Signed-off-by: Mark Brown <broonie@linaro.org>
-(cherry picked from commit e33d085d11e54bc9fb07b2555cd104d8e7b3089b)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/spi/spi-xilinx.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/spi/spi-xilinx.c b/drivers/spi/spi-xilinx.c
-index a6c475b43dcc..09a942852593 100644
---- a/drivers/spi/spi-xilinx.c
-+++ b/drivers/spi/spi-xilinx.c
-@@ -316,7 +316,7 @@ static int xilinx_spi_txrx_bufs(struct spi_device *spi, struct spi_transfer *t)
- 		}
- 
- 		/* See if there is more data to send */
--		if (!xspi->remaining_bytes > 0)
-+		if (xspi->remaining_bytes <= 0)
- 			break;
- 	}
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0048-spi-xilinx-Convert-to-devm_ioremap_resource.patch b/patches.zynq/0048-spi-xilinx-Convert-to-devm_ioremap_resource.patch
deleted file mode 100644
index 6886527ebdfbe..0000000000000
--- a/patches.zynq/0048-spi-xilinx-Convert-to-devm_ioremap_resource.patch
+++ /dev/null
@@ -1,79 +0,0 @@
-From db08d8a5dba3caf55f6e9bd8c799046a80bbecc4 Mon Sep 17 00:00:00 2001
-From: Mark Brown <broonie@linaro.org>
-Date: Mon, 1 Jul 2013 20:33:01 +0100
-Subject: spi/xilinx: Convert to devm_ioremap_resource()
-
-Saves code and reduces the possibility of error.
-
-Signed-off-by: Mark Brown <broonie@linaro.org>
-(cherry picked from commit c40537d008ab1b4fe2f12641cca1462de10a95f7)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/spi/spi-xilinx.c | 20 +++++---------------
- 1 file changed, 5 insertions(+), 15 deletions(-)
-
-diff --git a/drivers/spi/spi-xilinx.c b/drivers/spi/spi-xilinx.c
-index 09a942852593..6dd660818f05 100644
---- a/drivers/spi/spi-xilinx.c
-+++ b/drivers/spi/spi-xilinx.c
-@@ -378,14 +378,10 @@ struct spi_master *xilinx_spi_init(struct device *dev, struct resource *mem,
- 	xspi->bitbang.master->setup = xilinx_spi_setup;
- 	init_completion(&xspi->done);
- 
--	if (!request_mem_region(mem->start, resource_size(mem),
--		XILINX_SPI_NAME))
-+	xspi->regs = devm_ioremap_resource(dev, mem);
-+	if (IS_ERR(xspi->regs)) {
-+		ret = PTR_ERR(xspi->regs);
- 		goto put_master;
--
--	xspi->regs = ioremap(mem->start, resource_size(mem));
--	if (xspi->regs == NULL) {
--		dev_warn(dev, "ioremap failure\n");
--		goto map_failed;
- 	}
- 
- 	master->bus_num = bus_num;
-@@ -424,7 +420,7 @@ struct spi_master *xilinx_spi_init(struct device *dev, struct resource *mem,
- 		xspi->tx_fn = xspi_tx32;
- 		xspi->rx_fn = xspi_rx32;
- 	} else
--		goto unmap_io;
-+		goto put_master;
- 
- 
- 	/* SPI controller initializations */
-@@ -433,7 +429,7 @@ struct spi_master *xilinx_spi_init(struct device *dev, struct resource *mem,
- 	/* Register for SPI Interrupt */
- 	ret = request_irq(xspi->irq, xilinx_spi_irq, 0, XILINX_SPI_NAME, xspi);
- 	if (ret)
--		goto unmap_io;
-+		goto put_master;
- 
- 	ret = spi_bitbang_start(&xspi->bitbang);
- 	if (ret) {
-@@ -447,10 +443,6 @@ struct spi_master *xilinx_spi_init(struct device *dev, struct resource *mem,
- 
- free_irq:
- 	free_irq(xspi->irq, xspi);
--unmap_io:
--	iounmap(xspi->regs);
--map_failed:
--	release_mem_region(mem->start, resource_size(mem));
- put_master:
- 	spi_master_put(master);
- 	return NULL;
-@@ -465,9 +457,7 @@ void xilinx_spi_deinit(struct spi_master *master)
- 
- 	spi_bitbang_stop(&xspi->bitbang);
- 	free_irq(xspi->irq, xspi);
--	iounmap(xspi->regs);
- 
--	release_mem_region(xspi->mem.start, resource_size(&xspi->mem));
- 	spi_master_put(xspi->bitbang.master);
- }
- EXPORT_SYMBOL(xilinx_spi_deinit);
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0049-spi-xilinx-Remove-remains-of-of_platform-device-regi.patch b/patches.zynq/0049-spi-xilinx-Remove-remains-of-of_platform-device-regi.patch
deleted file mode 100644
index 58894b00c9c65..0000000000000
--- a/patches.zynq/0049-spi-xilinx-Remove-remains-of-of_platform-device-regi.patch
+++ /dev/null
@@ -1,228 +0,0 @@
-From 0dd0b5d53c655f5181e2bca2c29a1301007a0ca3 Mon Sep 17 00:00:00 2001
-From: Mark Brown <broonie@linaro.org>
-Date: Wed, 3 Jul 2013 12:05:42 +0100
-Subject: spi/xilinx: Remove remains of of_platform device registration
-
-In the past there used to be a separate platform device type for device
-tree systems so the probe and removal functions were split into generic
-and bus sections. Since this is no longer the case simplify the code (and
-remove some unprototyped exports) by factoring everything into the bus
-probe() and remove().
-
-Signed-off-by: Mark Brown <broonie@linaro.org>
-(cherry picked from commit d81c0bbbf84086568b559bee59e4a93aba4a6e0f)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/spi/spi-xilinx.c | 145 ++++++++++++++++++++---------------------------
- 1 file changed, 63 insertions(+), 82 deletions(-)
-
-diff --git a/drivers/spi/spi-xilinx.c b/drivers/spi/spi-xilinx.c
-index 6dd660818f05..dc9df0cf086d 100644
---- a/drivers/spi/spi-xilinx.c
-+++ b/drivers/spi/spi-xilinx.c
-@@ -355,17 +355,51 @@ static const struct of_device_id xilinx_spi_of_match[] = {
- };
- MODULE_DEVICE_TABLE(of, xilinx_spi_of_match);
- 
--struct spi_master *xilinx_spi_init(struct device *dev, struct resource *mem,
--	u32 irq, s16 bus_num, int num_cs, int bits_per_word)
-+static int xilinx_spi_probe(struct platform_device *dev)
- {
--	struct spi_master *master;
- 	struct xilinx_spi *xspi;
--	int ret;
-+	struct xspi_platform_data *pdata;
-+	struct resource *r;
-+	int ret, irq, num_cs = 0, bits_per_word = 8;
-+	struct spi_master *master;
- 	u32 tmp;
-+	u8 i;
-+
-+	pdata = dev->dev.platform_data;
-+	if (pdata) {
-+		num_cs = pdata->num_chipselect;
-+		bits_per_word = pdata->bits_per_word;
-+	}
-+
-+#ifdef CONFIG_OF
-+	if (dev->dev.of_node) {
-+		const __be32 *prop;
-+		int len;
-+
-+		/* number of slave select bits is required */
-+		prop = of_get_property(dev->dev.of_node, "xlnx,num-ss-bits",
-+				       &len);
-+		if (prop && len >= sizeof(*prop))
-+			num_cs = __be32_to_cpup(prop);
-+	}
-+#endif
- 
--	master = spi_alloc_master(dev, sizeof(struct xilinx_spi));
-+	if (!num_cs) {
-+		dev_err(&dev->dev, "Missing slave select configuration data\n");
-+		return -EINVAL;
-+	}
-+
-+	r = platform_get_resource(dev, IORESOURCE_MEM, 0);
-+	if (!r)
-+		return -ENODEV;
-+
-+	irq = platform_get_irq(dev, 0);
-+	if (irq < 0)
-+		return -ENXIO;
-+
-+	master = spi_alloc_master(&dev->dev, sizeof(struct xilinx_spi));
- 	if (!master)
--		return NULL;
-+		return -ENODEV;
- 
- 	/* the spi->mode bits understood by this driver: */
- 	master->mode_bits = SPI_CPOL | SPI_CPHA;
-@@ -378,17 +412,17 @@ struct spi_master *xilinx_spi_init(struct device *dev, struct resource *mem,
- 	xspi->bitbang.master->setup = xilinx_spi_setup;
- 	init_completion(&xspi->done);
- 
--	xspi->regs = devm_ioremap_resource(dev, mem);
-+	xspi->regs = devm_ioremap_resource(&dev->dev, r);
- 	if (IS_ERR(xspi->regs)) {
- 		ret = PTR_ERR(xspi->regs);
- 		goto put_master;
- 	}
- 
--	master->bus_num = bus_num;
-+	master->bus_num = dev->dev.id;
- 	master->num_chipselect = num_cs;
--	master->dev.of_node = dev->of_node;
-+	master->dev.of_node = dev->dev.of_node;
- 
--	xspi->mem = *mem;
-+	xspi->mem = *r;
- 	xspi->irq = irq;
- 
- 	/*
-@@ -419,8 +453,10 @@ struct spi_master *xilinx_spi_init(struct device *dev, struct resource *mem,
- 	} else if (xspi->bits_per_word == 32) {
- 		xspi->tx_fn = xspi_tx32;
- 		xspi->rx_fn = xspi_rx32;
--	} else
-+	} else {
-+		ret = -EINVAL;
- 		goto put_master;
-+	}
- 
- 
- 	/* SPI controller initializations */
-@@ -433,93 +469,38 @@ struct spi_master *xilinx_spi_init(struct device *dev, struct resource *mem,
- 
- 	ret = spi_bitbang_start(&xspi->bitbang);
- 	if (ret) {
--		dev_err(dev, "spi_bitbang_start FAILED\n");
-+		dev_err(&dev->dev, "spi_bitbang_start FAILED\n");
- 		goto free_irq;
- 	}
- 
--	dev_info(dev, "at 0x%08llX mapped to 0x%p, irq=%d\n",
--		(unsigned long long)mem->start, xspi->regs, xspi->irq);
--	return master;
-+	dev_info(&dev->dev, "at 0x%08llX mapped to 0x%p, irq=%d\n",
-+		(unsigned long long)r->start, xspi->regs, xspi->irq);
-+
-+	if (pdata) {
-+		for (i = 0; i < pdata->num_devices; i++)
-+			spi_new_device(master, pdata->devices + i);
-+	}
-+
-+	platform_set_drvdata(dev, master);
-+	return 0;
- 
- free_irq:
- 	free_irq(xspi->irq, xspi);
- put_master:
- 	spi_master_put(master);
--	return NULL;
-+
-+	return ret;
- }
--EXPORT_SYMBOL(xilinx_spi_init);
- 
--void xilinx_spi_deinit(struct spi_master *master)
-+static int xilinx_spi_remove(struct platform_device *dev)
- {
--	struct xilinx_spi *xspi;
--
--	xspi = spi_master_get_devdata(master);
-+	struct spi_master *master = platform_get_drvdata(dev);
-+	struct xilinx_spi *xspi = spi_master_get_devdata(master);
- 
- 	spi_bitbang_stop(&xspi->bitbang);
- 	free_irq(xspi->irq, xspi);
- 
- 	spi_master_put(xspi->bitbang.master);
--}
--EXPORT_SYMBOL(xilinx_spi_deinit);
--
--static int xilinx_spi_probe(struct platform_device *dev)
--{
--	struct xspi_platform_data *pdata;
--	struct resource *r;
--	int irq, num_cs = 0, bits_per_word = 8;
--	struct spi_master *master;
--	u8 i;
--
--	pdata = dev->dev.platform_data;
--	if (pdata) {
--		num_cs = pdata->num_chipselect;
--		bits_per_word = pdata->bits_per_word;
--	}
--
--#ifdef CONFIG_OF
--	if (dev->dev.of_node) {
--		const __be32 *prop;
--		int len;
--
--		/* number of slave select bits is required */
--		prop = of_get_property(dev->dev.of_node, "xlnx,num-ss-bits",
--				       &len);
--		if (prop && len >= sizeof(*prop))
--			num_cs = __be32_to_cpup(prop);
--	}
--#endif
--
--	if (!num_cs) {
--		dev_err(&dev->dev, "Missing slave select configuration data\n");
--		return -EINVAL;
--	}
--
--
--	r = platform_get_resource(dev, IORESOURCE_MEM, 0);
--	if (!r)
--		return -ENODEV;
--
--	irq = platform_get_irq(dev, 0);
--	if (irq < 0)
--		return -ENXIO;
--
--	master = xilinx_spi_init(&dev->dev, r, irq, dev->id, num_cs,
--				 bits_per_word);
--	if (!master)
--		return -ENODEV;
--
--	if (pdata) {
--		for (i = 0; i < pdata->num_devices; i++)
--			spi_new_device(master, pdata->devices + i);
--	}
--
--	platform_set_drvdata(dev, master);
--	return 0;
--}
--
--static int xilinx_spi_remove(struct platform_device *dev)
--{
--	xilinx_spi_deinit(platform_get_drvdata(dev));
- 
- 	return 0;
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0050-spi-xilinx-Refer-to-platform-device-as-pdev-in-probe.patch b/patches.zynq/0050-spi-xilinx-Refer-to-platform-device-as-pdev-in-probe.patch
deleted file mode 100644
index 301cbbcb451bb..0000000000000
--- a/patches.zynq/0050-spi-xilinx-Refer-to-platform-device-as-pdev-in-probe.patch
+++ /dev/null
@@ -1,135 +0,0 @@
-From 0fd5137aabbcf9212b33c07566bab6732c90b1f1 Mon Sep 17 00:00:00 2001
-From: Mark Brown <broonie@linaro.org>
-Date: Fri, 5 Jul 2013 11:24:26 +0100
-Subject: spi/xilinx: Refer to platform device as pdev in probe() and remove()
-
-This is a more traditional name and makes things a bit clearer when
-referring to actual struct devices as we do frequently during probe().
-
-Signed-off-by: Mark Brown <broonie@linaro.org>
-Acked-by: Michal Simek <michal.simek@xilinx.com>
-(cherry picked from commit 7cb2abd05fe1f9aea70b8ee38004b60bc882ffb5)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/spi/spi-xilinx.c | 33 +++++++++++++++++----------------
- 1 file changed, 17 insertions(+), 16 deletions(-)
-
-diff --git a/drivers/spi/spi-xilinx.c b/drivers/spi/spi-xilinx.c
-index dc9df0cf086d..faae198ba7ea 100644
---- a/drivers/spi/spi-xilinx.c
-+++ b/drivers/spi/spi-xilinx.c
-@@ -355,7 +355,7 @@ static const struct of_device_id xilinx_spi_of_match[] = {
- };
- MODULE_DEVICE_TABLE(of, xilinx_spi_of_match);
- 
--static int xilinx_spi_probe(struct platform_device *dev)
-+static int xilinx_spi_probe(struct platform_device *pdev)
- {
- 	struct xilinx_spi *xspi;
- 	struct xspi_platform_data *pdata;
-@@ -365,19 +365,19 @@ static int xilinx_spi_probe(struct platform_device *dev)
- 	u32 tmp;
- 	u8 i;
- 
--	pdata = dev->dev.platform_data;
-+	pdata = pdev->dev.platform_data;
- 	if (pdata) {
- 		num_cs = pdata->num_chipselect;
- 		bits_per_word = pdata->bits_per_word;
- 	}
- 
- #ifdef CONFIG_OF
--	if (dev->dev.of_node) {
-+	if (pdev->dev.of_node) {
- 		const __be32 *prop;
- 		int len;
- 
- 		/* number of slave select bits is required */
--		prop = of_get_property(dev->dev.of_node, "xlnx,num-ss-bits",
-+		prop = of_get_property(pdev->dev.of_node, "xlnx,num-ss-bits",
- 				       &len);
- 		if (prop && len >= sizeof(*prop))
- 			num_cs = __be32_to_cpup(prop);
-@@ -385,19 +385,20 @@ static int xilinx_spi_probe(struct platform_device *dev)
- #endif
- 
- 	if (!num_cs) {
--		dev_err(&dev->dev, "Missing slave select configuration data\n");
-+		dev_err(&pdev->dev,
-+			"Missing slave select configuration data\n");
- 		return -EINVAL;
- 	}
- 
--	r = platform_get_resource(dev, IORESOURCE_MEM, 0);
-+	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- 	if (!r)
- 		return -ENODEV;
- 
--	irq = platform_get_irq(dev, 0);
-+	irq = platform_get_irq(pdev, 0);
- 	if (irq < 0)
- 		return -ENXIO;
- 
--	master = spi_alloc_master(&dev->dev, sizeof(struct xilinx_spi));
-+	master = spi_alloc_master(&pdev->dev, sizeof(struct xilinx_spi));
- 	if (!master)
- 		return -ENODEV;
- 
-@@ -412,15 +413,15 @@ static int xilinx_spi_probe(struct platform_device *dev)
- 	xspi->bitbang.master->setup = xilinx_spi_setup;
- 	init_completion(&xspi->done);
- 
--	xspi->regs = devm_ioremap_resource(&dev->dev, r);
-+	xspi->regs = devm_ioremap_resource(&pdev->dev, r);
- 	if (IS_ERR(xspi->regs)) {
- 		ret = PTR_ERR(xspi->regs);
- 		goto put_master;
- 	}
- 
--	master->bus_num = dev->dev.id;
-+	master->bus_num = pdev->dev.id;
- 	master->num_chipselect = num_cs;
--	master->dev.of_node = dev->dev.of_node;
-+	master->dev.of_node = pdev->dev.of_node;
- 
- 	xspi->mem = *r;
- 	xspi->irq = irq;
-@@ -469,11 +470,11 @@ static int xilinx_spi_probe(struct platform_device *dev)
- 
- 	ret = spi_bitbang_start(&xspi->bitbang);
- 	if (ret) {
--		dev_err(&dev->dev, "spi_bitbang_start FAILED\n");
-+		dev_err(&pdev->dev, "spi_bitbang_start FAILED\n");
- 		goto free_irq;
- 	}
- 
--	dev_info(&dev->dev, "at 0x%08llX mapped to 0x%p, irq=%d\n",
-+	dev_info(&pdev->dev, "at 0x%08llX mapped to 0x%p, irq=%d\n",
- 		(unsigned long long)r->start, xspi->regs, xspi->irq);
- 
- 	if (pdata) {
-@@ -481,7 +482,7 @@ static int xilinx_spi_probe(struct platform_device *dev)
- 			spi_new_device(master, pdata->devices + i);
- 	}
- 
--	platform_set_drvdata(dev, master);
-+	platform_set_drvdata(pdev, master);
- 	return 0;
- 
- free_irq:
-@@ -492,9 +493,9 @@ put_master:
- 	return ret;
- }
- 
--static int xilinx_spi_remove(struct platform_device *dev)
-+static int xilinx_spi_remove(struct platform_device *pdev)
- {
--	struct spi_master *master = platform_get_drvdata(dev);
-+	struct spi_master *master = platform_get_drvdata(pdev);
- 	struct xilinx_spi *xspi = spi_master_get_devdata(master);
- 
- 	spi_bitbang_stop(&xspi->bitbang);
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0051-spi-xilinx-Remove-CONFIG_OF-from-the-driver.patch b/patches.zynq/0051-spi-xilinx-Remove-CONFIG_OF-from-the-driver.patch
deleted file mode 100644
index 8a4d99c37ec63..0000000000000
--- a/patches.zynq/0051-spi-xilinx-Remove-CONFIG_OF-from-the-driver.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From 8e3fa31d013096a9c7451a6db8674955e31decde Mon Sep 17 00:00:00 2001
-From: Michal Simek <michal.simek@xilinx.com>
-Date: Mon, 8 Jul 2013 15:29:14 +0200
-Subject: spi/xilinx: Remove CONFIG_OF from the driver
-
-dev.of_node is in struct device all the time.
-
-Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-Signed-off-by: Mark Brown <broonie@linaro.org>
-(cherry picked from commit 5586c09e19b0dea5c1b4fd9838ca73575def223f)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/spi/spi-xilinx.c | 2 --
- 1 file changed, 2 deletions(-)
-
-diff --git a/drivers/spi/spi-xilinx.c b/drivers/spi/spi-xilinx.c
-index faae198ba7ea..5c98859f3cd6 100644
---- a/drivers/spi/spi-xilinx.c
-+++ b/drivers/spi/spi-xilinx.c
-@@ -371,7 +371,6 @@ static int xilinx_spi_probe(struct platform_device *pdev)
- 		bits_per_word = pdata->bits_per_word;
- 	}
- 
--#ifdef CONFIG_OF
- 	if (pdev->dev.of_node) {
- 		const __be32 *prop;
- 		int len;
-@@ -382,7 +381,6 @@ static int xilinx_spi_probe(struct platform_device *pdev)
- 		if (prop && len >= sizeof(*prop))
- 			num_cs = __be32_to_cpup(prop);
- 	}
--#endif
- 
- 	if (!num_cs) {
- 		dev_err(&pdev->dev,
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0052-spi-xilinx-Clean-ioremap-calling.patch b/patches.zynq/0052-spi-xilinx-Clean-ioremap-calling.patch
deleted file mode 100644
index f8b304413aac2..0000000000000
--- a/patches.zynq/0052-spi-xilinx-Clean-ioremap-calling.patch
+++ /dev/null
@@ -1,82 +0,0 @@
-From abf247b64fcc5e48ad84b8f7f93a004bd39d3605 Mon Sep 17 00:00:00 2001
-From: Michal Simek <michal.simek@xilinx.com>
-Date: Mon, 8 Jul 2013 15:29:15 +0200
-Subject: spi/xilinx: Clean ioremap calling
-
-devm_ioremap_resource() automatically checks that
-struct resource is initialized.
-Also group platform_get_resource() and devm_ioremap_resource()
-together.
-And remove mem resource from struct xilinx_spi.
-
-Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-Signed-off-by: Mark Brown <broonie@linaro.org>
-(cherry picked from commit ad3fdbcaf98dc1258f7ee1503703e7fcbc0d8d8e)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/spi/spi-xilinx.c | 13 ++++---------
- 1 file changed, 4 insertions(+), 9 deletions(-)
-
-diff --git a/drivers/spi/spi-xilinx.c b/drivers/spi/spi-xilinx.c
-index 5c98859f3cd6..c3ea6cad568f 100644
---- a/drivers/spi/spi-xilinx.c
-+++ b/drivers/spi/spi-xilinx.c
-@@ -80,7 +80,6 @@ struct xilinx_spi {
- 	/* bitbang has to be first */
- 	struct spi_bitbang bitbang;
- 	struct completion done;
--	struct resource mem; /* phys mem */
- 	void __iomem	*regs;	/* virt. address of the control registers */
- 
- 	u32		irq;
-@@ -359,7 +358,7 @@ static int xilinx_spi_probe(struct platform_device *pdev)
- {
- 	struct xilinx_spi *xspi;
- 	struct xspi_platform_data *pdata;
--	struct resource *r;
-+	struct resource *res;
- 	int ret, irq, num_cs = 0, bits_per_word = 8;
- 	struct spi_master *master;
- 	u32 tmp;
-@@ -388,10 +387,6 @@ static int xilinx_spi_probe(struct platform_device *pdev)
- 		return -EINVAL;
- 	}
- 
--	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
--	if (!r)
--		return -ENODEV;
--
- 	irq = platform_get_irq(pdev, 0);
- 	if (irq < 0)
- 		return -ENXIO;
-@@ -411,7 +406,8 @@ static int xilinx_spi_probe(struct platform_device *pdev)
- 	xspi->bitbang.master->setup = xilinx_spi_setup;
- 	init_completion(&xspi->done);
- 
--	xspi->regs = devm_ioremap_resource(&pdev->dev, r);
-+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+	xspi->regs = devm_ioremap_resource(&pdev->dev, res);
- 	if (IS_ERR(xspi->regs)) {
- 		ret = PTR_ERR(xspi->regs);
- 		goto put_master;
-@@ -421,7 +417,6 @@ static int xilinx_spi_probe(struct platform_device *pdev)
- 	master->num_chipselect = num_cs;
- 	master->dev.of_node = pdev->dev.of_node;
- 
--	xspi->mem = *r;
- 	xspi->irq = irq;
- 
- 	/*
-@@ -473,7 +468,7 @@ static int xilinx_spi_probe(struct platform_device *pdev)
- 	}
- 
- 	dev_info(&pdev->dev, "at 0x%08llX mapped to 0x%p, irq=%d\n",
--		(unsigned long long)r->start, xspi->regs, xspi->irq);
-+		(unsigned long long)res->start, xspi->regs, xspi->irq);
- 
- 	if (pdata) {
- 		for (i = 0; i < pdata->num_devices; i++)
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0053-spi-xilinx-Use-of_property_read_u32-for-reading-valu.patch b/patches.zynq/0053-spi-xilinx-Use-of_property_read_u32-for-reading-valu.patch
deleted file mode 100644
index 75151f1cb8bea..0000000000000
--- a/patches.zynq/0053-spi-xilinx-Use-of_property_read_u32-for-reading-valu.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From 3b0944d8f563cdb3a7f7766d112f3cd7ab0aa2f1 Mon Sep 17 00:00:00 2001
-From: Michal Simek <michal.simek@xilinx.com>
-Date: Mon, 8 Jul 2013 15:29:17 +0200
-Subject: spi/xilinx: Use of_property_read_u32 for reading value from node
-
-It simplifies driver probing.
-
-Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-Signed-off-by: Mark Brown <broonie@linaro.org>
-(cherry picked from commit be3acdff943f46c32e9b2f453f0033bbae01a804)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/spi/spi-xilinx.c | 14 +++-----------
- 1 file changed, 3 insertions(+), 11 deletions(-)
-
-diff --git a/drivers/spi/spi-xilinx.c b/drivers/spi/spi-xilinx.c
-index c3ea6cad568f..1c3372084bc8 100644
---- a/drivers/spi/spi-xilinx.c
-+++ b/drivers/spi/spi-xilinx.c
-@@ -368,17 +368,9 @@ static int xilinx_spi_probe(struct platform_device *pdev)
- 	if (pdata) {
- 		num_cs = pdata->num_chipselect;
- 		bits_per_word = pdata->bits_per_word;
--	}
--
--	if (pdev->dev.of_node) {
--		const __be32 *prop;
--		int len;
--
--		/* number of slave select bits is required */
--		prop = of_get_property(pdev->dev.of_node, "xlnx,num-ss-bits",
--				       &len);
--		if (prop && len >= sizeof(*prop))
--			num_cs = __be32_to_cpup(prop);
-+	} else {
-+		of_property_read_u32(pdev->dev.of_node, "xlnx,num-ss-bits",
-+					  &num_cs);
- 	}
- 
- 	if (!num_cs) {
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0054-spi-xilinx-Simplify-irq-allocation.patch b/patches.zynq/0054-spi-xilinx-Simplify-irq-allocation.patch
deleted file mode 100644
index ea490044ae087..0000000000000
--- a/patches.zynq/0054-spi-xilinx-Simplify-irq-allocation.patch
+++ /dev/null
@@ -1,107 +0,0 @@
-From 323e7ddbed538321ad3ed02299d4f305a18db001 Mon Sep 17 00:00:00 2001
-From: Michal Simek <michal.simek@xilinx.com>
-Date: Tue, 9 Jul 2013 18:05:16 +0200
-Subject: spi/xilinx: Simplify irq allocation
-
-Use devm_request_irq() for irq allocation which
-simplify driver code.
-
-Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-Signed-off-by: Mark Brown <broonie@linaro.org>
-(cherry picked from commit 7b3b7432ae7848a269671921393148ff1aae3881)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/spi/spi-xilinx.c | 29 ++++++++++++++++-------------
- 1 file changed, 16 insertions(+), 13 deletions(-)
-
-diff --git a/drivers/spi/spi-xilinx.c b/drivers/spi/spi-xilinx.c
-index 1c3372084bc8..fea815c2bc95 100644
---- a/drivers/spi/spi-xilinx.c
-+++ b/drivers/spi/spi-xilinx.c
-@@ -359,7 +359,7 @@ static int xilinx_spi_probe(struct platform_device *pdev)
- 	struct xilinx_spi *xspi;
- 	struct xspi_platform_data *pdata;
- 	struct resource *res;
--	int ret, irq, num_cs = 0, bits_per_word = 8;
-+	int ret, num_cs = 0, bits_per_word = 8;
- 	struct spi_master *master;
- 	u32 tmp;
- 	u8 i;
-@@ -379,10 +379,6 @@ static int xilinx_spi_probe(struct platform_device *pdev)
- 		return -EINVAL;
- 	}
- 
--	irq = platform_get_irq(pdev, 0);
--	if (irq < 0)
--		return -ENXIO;
--
- 	master = spi_alloc_master(&pdev->dev, sizeof(struct xilinx_spi));
- 	if (!master)
- 		return -ENODEV;
-@@ -409,8 +405,6 @@ static int xilinx_spi_probe(struct platform_device *pdev)
- 	master->num_chipselect = num_cs;
- 	master->dev.of_node = pdev->dev.of_node;
- 
--	xspi->irq = irq;
--
- 	/*
- 	 * Detect endianess on the IP via loop bit in CR. Detection
- 	 * must be done before reset is sent because incorrect reset
-@@ -444,19 +438,25 @@ static int xilinx_spi_probe(struct platform_device *pdev)
- 		goto put_master;
- 	}
- 
--
- 	/* SPI controller initializations */
- 	xspi_init_hw(xspi);
- 
-+	xspi->irq = platform_get_irq(pdev, 0);
-+	if (xspi->irq < 0) {
-+		ret = xspi->irq;
-+		goto put_master;
-+	}
-+
- 	/* Register for SPI Interrupt */
--	ret = request_irq(xspi->irq, xilinx_spi_irq, 0, XILINX_SPI_NAME, xspi);
-+	ret = devm_request_irq(&pdev->dev, xspi->irq, xilinx_spi_irq, 0,
-+			       dev_name(&pdev->dev), xspi);
- 	if (ret)
- 		goto put_master;
- 
- 	ret = spi_bitbang_start(&xspi->bitbang);
- 	if (ret) {
- 		dev_err(&pdev->dev, "spi_bitbang_start FAILED\n");
--		goto free_irq;
-+		goto put_master;
- 	}
- 
- 	dev_info(&pdev->dev, "at 0x%08llX mapped to 0x%p, irq=%d\n",
-@@ -470,8 +470,6 @@ static int xilinx_spi_probe(struct platform_device *pdev)
- 	platform_set_drvdata(pdev, master);
- 	return 0;
- 
--free_irq:
--	free_irq(xspi->irq, xspi);
- put_master:
- 	spi_master_put(master);
- 
-@@ -482,9 +480,14 @@ static int xilinx_spi_remove(struct platform_device *pdev)
- {
- 	struct spi_master *master = platform_get_drvdata(pdev);
- 	struct xilinx_spi *xspi = spi_master_get_devdata(master);
-+	void __iomem *regs_base = xspi->regs;
- 
- 	spi_bitbang_stop(&xspi->bitbang);
--	free_irq(xspi->irq, xspi);
-+
-+	/* Disable all the interrupts just in case */
-+	xspi->write_fn(0, regs_base + XIPIF_V123B_IIER_OFFSET);
-+	/* Disable the global IPIF interrupt */
-+	xspi->write_fn(0, regs_base + XIPIF_V123B_DGIER_OFFSET);
- 
- 	spi_master_put(xspi->bitbang.master);
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0055-spi-xilinx-signedness-issue-checking-platform_get_ir.patch b/patches.zynq/0055-spi-xilinx-signedness-issue-checking-platform_get_ir.patch
deleted file mode 100644
index 6e4c6aff5295b..0000000000000
--- a/patches.zynq/0055-spi-xilinx-signedness-issue-checking-platform_get_ir.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From 5dc3d5b675ac2e9b1399d7fc1fbd753ae4a0fa8a Mon Sep 17 00:00:00 2001
-From: Dan Carpenter <dan.carpenter@oracle.com>
-Date: Wed, 17 Jul 2013 18:34:48 +0300
-Subject: spi/xilinx: signedness issue checking platform_get_irq()
-
-In xilinx_spi_probe() we use xspi->irq to store negative error codes so
-it has to be signed.  We weren't going to use the upper bit any way so
-this is fine.
-
-Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
-Signed-off-by: Mark Brown <broonie@linaro.org>
-(cherry picked from commit 9ca1273bb9d35c81bfb73215556bf794a73a2d83)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/spi/spi-xilinx.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/spi/spi-xilinx.c b/drivers/spi/spi-xilinx.c
-index fea815c2bc95..0f4a093ca8d5 100644
---- a/drivers/spi/spi-xilinx.c
-+++ b/drivers/spi/spi-xilinx.c
-@@ -82,7 +82,7 @@ struct xilinx_spi {
- 	struct completion done;
- 	void __iomem	*regs;	/* virt. address of the control registers */
- 
--	u32		irq;
-+	int		irq;
- 
- 	u8 *rx_ptr;		/* pointer in the Tx buffer */
- 	const u8 *tx_ptr;	/* pointer in the Rx buffer */
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0056-spi-bitbang-Drop-empty-setup-functions.patch b/patches.zynq/0056-spi-bitbang-Drop-empty-setup-functions.patch
deleted file mode 100644
index 014a379ecbc6c..0000000000000
--- a/patches.zynq/0056-spi-bitbang-Drop-empty-setup-functions.patch
+++ /dev/null
@@ -1,54 +0,0 @@
-From debd2e0bd920027d3bb19d25d41d9df04c2377da Mon Sep 17 00:00:00 2001
-From: Mark Brown <broonie@linaro.org>
-Date: Fri, 9 Aug 2013 17:26:37 +0100
-Subject: spi/bitbang: Drop empty setup() functions
-
-Now that the bitbang core does not require a setup() function we can
-drop the check in the altera, nuc900 and xilinx drivers.
-
-Signed-off-by: Mark Brown <broonie@linaro.org>
-(cherry picked from commit 30af9b558a56200bda5febd140d5b826581d1f15
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>)
-
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/spi/spi-xilinx.c | 16 ----------------
- 1 file changed, 16 deletions(-)
-
-diff --git a/drivers/spi/spi-xilinx.c b/drivers/spi/spi-xilinx.c
-index 0f4a093ca8d5..dec7e71a833c 100644
---- a/drivers/spi/spi-xilinx.c
-+++ b/drivers/spi/spi-xilinx.c
-@@ -232,21 +232,6 @@ static int xilinx_spi_setup_transfer(struct spi_device *spi,
- 	return 0;
- }
- 
--static int xilinx_spi_setup(struct spi_device *spi)
--{
--	/* always return 0, we can not check the number of bits.
--	 * There are cases when SPI setup is called before any driver is
--	 * there, in that case the SPI core defaults to 8 bits, which we
--	 * do not support in some cases. But if we return an error, the
--	 * SPI device would not be registered and no driver can get hold of it
--	 * When the driver is there, it will call SPI setup again with the
--	 * correct number of bits per transfer.
--	 * If a driver setups with the wrong bit number, it will fail when
--	 * it tries to do a transfer
--	 */
--	return 0;
--}
--
- static void xilinx_spi_fill_tx_fifo(struct xilinx_spi *xspi)
- {
- 	u8 sr;
-@@ -391,7 +376,6 @@ static int xilinx_spi_probe(struct platform_device *pdev)
- 	xspi->bitbang.chipselect = xilinx_spi_chipselect;
- 	xspi->bitbang.setup_transfer = xilinx_spi_setup_transfer;
- 	xspi->bitbang.txrx_bufs = xilinx_spi_txrx_bufs;
--	xspi->bitbang.master->setup = xilinx_spi_setup;
- 	init_completion(&xspi->done);
- 
- 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0057-spi-use-dev_get_platdata.patch b/patches.zynq/0057-spi-use-dev_get_platdata.patch
deleted file mode 100644
index 01530137119de..0000000000000
--- a/patches.zynq/0057-spi-use-dev_get_platdata.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From 7369d65d3586d733226f05af08cc7899ef2d9c2f Mon Sep 17 00:00:00 2001
-From: Jingoo Han <jg1.han@samsung.com>
-Date: Tue, 30 Jul 2013 16:58:59 +0900
-Subject: spi: use dev_get_platdata()
-
-Use the wrapper function for retrieving the platform data instead of
-accessing dev->platform_data directly.
-
-Signed-off-by: Jingoo Han <jg1.han@samsung.com>
-Signed-off-by: Mark Brown <broonie@linaro.org>
-(cherry picked from commit 8074cf063e410a2c0cf1704c3b31002e21f5df7c
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>)
-
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/spi/spi-xilinx.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/spi/spi-xilinx.c b/drivers/spi/spi-xilinx.c
-index dec7e71a833c..0bf1b2c457a1 100644
---- a/drivers/spi/spi-xilinx.c
-+++ b/drivers/spi/spi-xilinx.c
-@@ -349,7 +349,7 @@ static int xilinx_spi_probe(struct platform_device *pdev)
- 	u32 tmp;
- 	u8 i;
- 
--	pdata = pdev->dev.platform_data;
-+	pdata = dev_get_platdata(&pdev->dev);
- 	if (pdata) {
- 		num_cs = pdata->num_chipselect;
- 		bits_per_word = pdata->bits_per_word;
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0058-spi-bitbang-Let-spi_bitbang_start-take-a-reference-t.patch b/patches.zynq/0058-spi-bitbang-Let-spi_bitbang_start-take-a-reference-t.patch
deleted file mode 100644
index 79e949d48b56b..0000000000000
--- a/patches.zynq/0058-spi-bitbang-Let-spi_bitbang_start-take-a-reference-t.patch
+++ /dev/null
@@ -1,53 +0,0 @@
-From 81a4e56c65f5df67e124ad02e2a4e93940bf2ed2 Mon Sep 17 00:00:00 2001
-From: Axel Lin <axel.lin@ingics.com>
-Date: Tue, 10 Sep 2013 15:43:41 +0800
-Subject: spi: bitbang: Let spi_bitbang_start() take a reference to master
-
-Many drivers that use bitbang library have a leak on probe error paths.
-This is because once a spi_master_get() call succeeds, we need an additional
-spi_master_put() call to free the memory.
-
-Fix this issue by moving the code taking a reference to master to
-spi_bitbang_start(), so spi_bitbang_start() will take a reference to master on
-success. With this change, the caller is responsible for calling
-spi_bitbang_stop() to decrement the reference and spi_master_put() as
-counterpart of spi_alloc_master() to prevent a memory leak.
-
-So now we have below patten for drivers using bitbang library:
-
-probe:
-spi_alloc_master        -> Init reference count to 1
-spi_bitbang_start       -> Increment reference count
-remove:
-spi_bitbang_stop        -> Decrement reference count
-spi_master_put          -> Decrement reference count (reference count reaches 0)
-
-Fixup all users accordingly.
-
-Signed-off-by: Axel Lin <axel.lin@ingics.com>
-Suggested-by: Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
-Acked-by: Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
-Signed-off-by: Mark Brown <broonie@linaro.org>
-(cherry picked from commit 94c69f765f1b4a658d96905ec59928e3e3e07e6a)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/spi/spi-xilinx.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/spi/spi-xilinx.c b/drivers/spi/spi-xilinx.c
-index 0bf1b2c457a1..ec3a83f52ea2 100644
---- a/drivers/spi/spi-xilinx.c
-+++ b/drivers/spi/spi-xilinx.c
-@@ -372,7 +372,7 @@ static int xilinx_spi_probe(struct platform_device *pdev)
- 	master->mode_bits = SPI_CPOL | SPI_CPHA;
- 
- 	xspi = spi_master_get_devdata(master);
--	xspi->bitbang.master = spi_master_get(master);
-+	xspi->bitbang.master = master;
- 	xspi->bitbang.chipselect = xilinx_spi_chipselect;
- 	xspi->bitbang.setup_transfer = xilinx_spi_setup_transfer;
- 	xspi->bitbang.txrx_bufs = xilinx_spi_txrx_bufs;
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0059-Input-xilinx_ps2-remove-redundant-platform_set_drvda.patch b/patches.zynq/0059-Input-xilinx_ps2-remove-redundant-platform_set_drvda.patch
deleted file mode 100644
index 7bf5e7ca568f1..0000000000000
--- a/patches.zynq/0059-Input-xilinx_ps2-remove-redundant-platform_set_drvda.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From cda8b02933c2e3d6798b785f06905e27264ee01d Mon Sep 17 00:00:00 2001
-From: Sachin Kamat <sachin.kamat@linaro.org>
-Date: Mon, 27 May 2013 23:40:33 -0700
-Subject: Input: xilinx_ps2 - remove redundant platform_set_drvdata()
-
-Commit 0998d06310 (device-core: Ensure drvdata = NULL when no
-driver is bound) removes the need to set driver data field to
-NULL.
-
-Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
-Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
-(cherry picked from commit f6e63f8032571bb58d054071edfd35d88f9dd07a)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/input/serio/xilinx_ps2.c | 2 --
- 1 file changed, 2 deletions(-)
-
-diff --git a/drivers/input/serio/xilinx_ps2.c b/drivers/input/serio/xilinx_ps2.c
-index 17be85948ffd..4b7662a17ae9 100644
---- a/drivers/input/serio/xilinx_ps2.c
-+++ b/drivers/input/serio/xilinx_ps2.c
-@@ -349,8 +349,6 @@ static int xps2_of_remove(struct platform_device *of_dev)
- 
- 	kfree(drvdata);
- 
--	platform_set_drvdata(of_dev, NULL);
--
- 	return 0;
- }
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0060-drivers-clean-up-prom.h-implicit-includes.patch b/patches.zynq/0060-drivers-clean-up-prom.h-implicit-includes.patch
deleted file mode 100644
index 43c52543ee730..0000000000000
--- a/patches.zynq/0060-drivers-clean-up-prom.h-implicit-includes.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From 189f21efa238c81683514631d6d8845f1b863d48 Mon Sep 17 00:00:00 2001
-From: Rob Herring <rob.herring@calxeda.com>
-Date: Tue, 17 Sep 2013 14:28:33 -0500
-Subject: drivers: clean-up prom.h implicit includes
-
-Powerpc is a mess of implicit includes by prom.h. Add the necessary
-explicit includes to drivers in preparation of prom.h cleanup.
-
-Signed-off-by: Rob Herring <rob.herring@calxeda.com>
-Acked-by: Grant Likely <grant.likely@linaro.org>
-(cherry picked from commit 5af5073004071cedd0343eee51d77955037ec6f3)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/input/serio/xilinx_ps2.c | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/drivers/input/serio/xilinx_ps2.c b/drivers/input/serio/xilinx_ps2.c
-index 4b7662a17ae9..b90eb4fb2b5b 100644
---- a/drivers/input/serio/xilinx_ps2.c
-+++ b/drivers/input/serio/xilinx_ps2.c
-@@ -25,6 +25,7 @@
- #include <linux/io.h>
- #include <linux/of_address.h>
- #include <linux/of_device.h>
-+#include <linux/of_irq.h>
- #include <linux/of_platform.h>
- 
- #define DRIVER_NAME		"xilinx_ps2"
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0061-of-irq-Use-irq_of_parse_and_map.patch b/patches.zynq/0061-of-irq-Use-irq_of_parse_and_map.patch
deleted file mode 100644
index cfa1a98da5512..0000000000000
--- a/patches.zynq/0061-of-irq-Use-irq_of_parse_and_map.patch
+++ /dev/null
@@ -1,60 +0,0 @@
-From 73b01d8722b34add7077b92b98a69b2123f749aa Mon Sep 17 00:00:00 2001
-From: Thierry Reding <thierry.reding@gmail.com>
-Date: Wed, 18 Sep 2013 15:24:44 +0200
-Subject: of/irq: Use irq_of_parse_and_map()
-
-Replace some instances of of_irq_map_one()/irq_create_of_mapping() and
-of_irq_to_resource() by the simpler equivalent irq_of_parse_and_map().
-
-Signed-off-by: Thierry Reding <treding@nvidia.com>
-Acked-by: Rob Herring <rob.herring@calxeda.com>
-[grant.likely: resolved conflicts with core code renames]
-Signed-off-by: Grant Likely <grant.likely@linaro.org>
-(cherry picked from commit f7578496a671a96e501f16a5104893275e32c33a)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/input/serio/xilinx_ps2.c | 7 ++++---
- 1 file changed, 4 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/input/serio/xilinx_ps2.c b/drivers/input/serio/xilinx_ps2.c
-index b90eb4fb2b5b..dfbcd872f95e 100644
---- a/drivers/input/serio/xilinx_ps2.c
-+++ b/drivers/input/serio/xilinx_ps2.c
-@@ -236,12 +236,12 @@ static void sxps2_close(struct serio *pserio)
-  */
- static int xps2_of_probe(struct platform_device *ofdev)
- {
--	struct resource r_irq; /* Interrupt resources */
- 	struct resource r_mem; /* IO mem resources */
- 	struct xps2data *drvdata;
- 	struct serio *serio;
- 	struct device *dev = &ofdev->dev;
- 	resource_size_t remap_size, phys_addr;
-+	unsigned int irq;
- 	int error;
- 
- 	dev_info(dev, "Device Tree Probing \'%s\'\n",
-@@ -255,7 +255,8 @@ static int xps2_of_probe(struct platform_device *ofdev)
- 	}
- 
- 	/* Get IRQ for the device */
--	if (!of_irq_to_resource(ofdev->dev.of_node, 0, &r_irq)) {
-+	irq = irq_of_parse_and_map(ofdev->dev.of_node, 0);
-+	if (!irq) {
- 		dev_err(dev, "no IRQ found\n");
- 		return -ENODEV;
- 	}
-@@ -268,7 +269,7 @@ static int xps2_of_probe(struct platform_device *ofdev)
- 	}
- 
- 	spin_lock_init(&drvdata->lock);
--	drvdata->irq = r_irq.start;
-+	drvdata->irq = irq;
- 	drvdata->serio = serio;
- 	drvdata->dev = dev;
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0062-char-xilinx_hwicap-Remove-casting-the-return-value-w.patch b/patches.zynq/0062-char-xilinx_hwicap-Remove-casting-the-return-value-w.patch
deleted file mode 100644
index 31e857e996f17..0000000000000
--- a/patches.zynq/0062-char-xilinx_hwicap-Remove-casting-the-return-value-w.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From 4275a801013a2f960af28ac9ffc95f656744cf88 Mon Sep 17 00:00:00 2001
-From: Jingoo Han <jg1.han@samsung.com>
-Date: Mon, 9 Sep 2013 14:14:50 +0900
-Subject: char: xilinx_hwicap: Remove casting the return value which is a void
- pointer
-
-Casting the return value which is a void pointer is redundant.
-The conversion from void pointer to any other pointer type is
-guaranteed by the C programming language.
-
-Signed-off-by: Jingoo Han <jg1.han@samsung.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 20055477566958e751a20290aa45ae21bd4b5e11)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/char/xilinx_hwicap/xilinx_hwicap.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/char/xilinx_hwicap/xilinx_hwicap.c b/drivers/char/xilinx_hwicap/xilinx_hwicap.c
-index 5224da5202d3..a7f65c2b2cb5 100644
---- a/drivers/char/xilinx_hwicap/xilinx_hwicap.c
-+++ b/drivers/char/xilinx_hwicap/xilinx_hwicap.c
-@@ -721,7 +721,7 @@ static int hwicap_remove(struct device *dev)
- {
- 	struct hwicap_drvdata *drvdata;
- 
--	drvdata = (struct hwicap_drvdata *)dev_get_drvdata(dev);
-+	drvdata = dev_get_drvdata(dev);
- 
- 	if (!drvdata)
- 		return 0;
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0063-char-hwicap-Remove-unnecessary-dev_set_drvdata.patch b/patches.zynq/0063-char-hwicap-Remove-unnecessary-dev_set_drvdata.patch
deleted file mode 100644
index de4367093b9af..0000000000000
--- a/patches.zynq/0063-char-hwicap-Remove-unnecessary-dev_set_drvdata.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From 38a2ec46d4dc7b60d9b919ebeee5ad7458a1eb63 Mon Sep 17 00:00:00 2001
-From: Michal Simek <michal.simek@xilinx.com>
-Date: Mon, 30 Sep 2013 09:28:36 +0200
-Subject: char: hwicap: Remove unnecessary dev_set_drvdata()
-
-Driver core clears the driver data to NULL after device_release
-or on probe failure, so just remove it from here.
-
-Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 12b3af3096cdfb0613da374021167868c6abc9ce)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/char/xilinx_hwicap/xilinx_hwicap.c | 1 -
- 1 file changed, 1 deletion(-)
-
-diff --git a/drivers/char/xilinx_hwicap/xilinx_hwicap.c b/drivers/char/xilinx_hwicap/xilinx_hwicap.c
-index a7f65c2b2cb5..f6345f932e46 100644
---- a/drivers/char/xilinx_hwicap/xilinx_hwicap.c
-+++ b/drivers/char/xilinx_hwicap/xilinx_hwicap.c
-@@ -731,7 +731,6 @@ static int hwicap_remove(struct device *dev)
- 	iounmap(drvdata->base_address);
- 	release_mem_region(drvdata->mem_start, drvdata->mem_size);
- 	kfree(drvdata);
--	dev_set_drvdata(dev, NULL);
- 
- 	mutex_lock(&icap_sem);
- 	probed_devices[MINOR(dev->devt)-XHWICAP_MINOR] = 0;
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0064-char-xilinx_hwicap-Checkpatch.pl-cleanup.patch b/patches.zynq/0064-char-xilinx_hwicap-Checkpatch.pl-cleanup.patch
deleted file mode 100644
index 340aecff2e389..0000000000000
--- a/patches.zynq/0064-char-xilinx_hwicap-Checkpatch.pl-cleanup.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From 52e527233de5b99f0b08bd5d926cfc5c2c924c1a Mon Sep 17 00:00:00 2001
-From: Michal Simek <michal.simek@xilinx.com>
-Date: Thu, 23 May 2013 14:52:33 +0200
-Subject: char: xilinx_hwicap: Checkpatch.pl cleanup
-
-Remove checkpatch warning:
-WARNING: Use #include <linux/io.h> instead of <asm/io.h>
-
-Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 1dd24daef9c5a4b51f4981a9c65a36a32b2ea98a)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/char/xilinx_hwicap/xilinx_hwicap.h | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/char/xilinx_hwicap/xilinx_hwicap.h b/drivers/char/xilinx_hwicap/xilinx_hwicap.h
-index d31ee23c9f13..96677fc7ea4d 100644
---- a/drivers/char/xilinx_hwicap/xilinx_hwicap.h
-+++ b/drivers/char/xilinx_hwicap/xilinx_hwicap.h
-@@ -37,7 +37,7 @@
- #include <linux/cdev.h>
- #include <linux/platform_device.h>
- 
--#include <asm/io.h>
-+#include <linux/io.h>
- 
- struct hwicap_drvdata {
- 	u32 write_buffer_in_use;  /* Always in [0,3] */
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0065-char-xilinx_hwicap-Fix-typo-in-comment-and-extend-it.patch b/patches.zynq/0065-char-xilinx_hwicap-Fix-typo-in-comment-and-extend-it.patch
deleted file mode 100644
index fb09fc55b46ba..0000000000000
--- a/patches.zynq/0065-char-xilinx_hwicap-Fix-typo-in-comment-and-extend-it.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From d412e999fddebea19b40024ae935489fb0ed870b Mon Sep 17 00:00:00 2001
-From: Michal Simek <monstr@monstr.eu>
-Date: Thu, 23 May 2013 14:52:34 +0200
-Subject: char: xilinx_hwicap: Fix typo in comment and extend it
-
-s/regsiter/register/
-
-Use origin comment from the first driver version
-which also explain the usage of XHI_MAX_RETRIES better.
-
-Signed-off-by: Michal Simek <monstr@monstr.eu>
-Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 84524cf43d693746896782628466205ccc193e0d)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/char/xilinx_hwicap/xilinx_hwicap.h | 8 +++++++-
- 1 file changed, 7 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/char/xilinx_hwicap/xilinx_hwicap.h b/drivers/char/xilinx_hwicap/xilinx_hwicap.h
-index 96677fc7ea4d..38b145eaf24d 100644
---- a/drivers/char/xilinx_hwicap/xilinx_hwicap.h
-+++ b/drivers/char/xilinx_hwicap/xilinx_hwicap.h
-@@ -85,7 +85,13 @@ struct hwicap_driver_config {
- 	void (*reset)(struct hwicap_drvdata *drvdata);
- };
- 
--/* Number of times to poll the done regsiter */
-+/* Number of times to poll the done register. This has to be large
-+ * enough to allow an entire configuration to complete. If an entire
-+ * page (4kb) is configured at once, that could take up to 4k cycles
-+ * with a byte-wide icap interface. In most cases, this driver is
-+ * used with a much smaller fifo, but this should be sufficient in the
-+ * worst case.
-+ */
- #define XHI_MAX_RETRIES     5000
- 
- /************ Constant Definitions *************/
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0066-watchdog-xilinx-Fix-driver-header.patch b/patches.zynq/0066-watchdog-xilinx-Fix-driver-header.patch
deleted file mode 100644
index ef2ec994de819..0000000000000
--- a/patches.zynq/0066-watchdog-xilinx-Fix-driver-header.patch
+++ /dev/null
@@ -1,67 +0,0 @@
-From f87fd16bb0d675fadda290df5969a7d1f394b0a1 Mon Sep 17 00:00:00 2001
-From: Michal Simek <michal.simek@xilinx.com>
-Date: Fri, 31 May 2013 07:56:33 +0200
-Subject: watchdog: xilinx: Fix driver header
-
-- Remove reference for IP version
-- Fix header coding style
-- Remove notes which are visible from the code
-- Fix driver license according to header
-
-Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-Reviewed-by: Guenter Roeck <linux@roeck-us.net>
-Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
-(cherry picked from commit 9419c07ccebf6080159b4440dab9b3e484c96d7a)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/watchdog/of_xilinx_wdt.c | 30 ++++++++++--------------------
- 1 file changed, 10 insertions(+), 20 deletions(-)
-
-diff --git a/drivers/watchdog/of_xilinx_wdt.c b/drivers/watchdog/of_xilinx_wdt.c
-index 2761ddb08501..d4a35ab89e01 100644
---- a/drivers/watchdog/of_xilinx_wdt.c
-+++ b/drivers/watchdog/of_xilinx_wdt.c
-@@ -1,23 +1,13 @@
- /*
--*   of_xilinx_wdt.c  1.01  A Watchdog Device Driver for Xilinx xps_timebase_wdt
--*
--*   (C) Copyright 2011 (Alejandro Cabrera <aldaya@gmail.com>)
--*
--*       -----------------------
--*
--*   This program is free software; you can redistribute it and/or
--*   modify it under the terms of the GNU General Public License
--*   as published by the Free Software Foundation; either version
--*   2 of the License, or (at your option) any later version.
--*
--*       -----------------------
--*	30-May-2011 Alejandro Cabrera <aldaya@gmail.com>
--*		- If "xlnx,wdt-enable-once" wasn't found on device tree the
--*		  module will use CONFIG_WATCHDOG_NOWAYOUT
--*		- If the device tree parameters ("clock-frequency" and
--*		  "xlnx,wdt-interval") wasn't found the driver won't
--*		  know the wdt reset interval
--*/
-+ * Watchdog Device Driver for Xilinx axi/xps_timebase_wdt
-+ *
-+ * (C) Copyright 2011 (Alejandro Cabrera <aldaya@gmail.com>)
-+ *
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License
-+ * as published by the Free Software Foundation; either version
-+ * 2 of the License, or (at your option) any later version.
-+ */
- 
- #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
- 
-@@ -413,5 +403,5 @@ module_platform_driver(xwdt_driver);
- 
- MODULE_AUTHOR("Alejandro Cabrera <aldaya@gmail.com>");
- MODULE_DESCRIPTION("Xilinx Watchdog driver");
--MODULE_LICENSE("GPL");
-+MODULE_LICENSE("GPL v2");
- MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0067-watchdog-xilinx-Setup-the-origin-compatible-string.patch b/patches.zynq/0067-watchdog-xilinx-Setup-the-origin-compatible-string.patch
deleted file mode 100644
index f7858cd0c28ad..0000000000000
--- a/patches.zynq/0067-watchdog-xilinx-Setup-the-origin-compatible-string.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From 8ed5d9d9e4d3af298977fc4488cbb712b5d82576 Mon Sep 17 00:00:00 2001
-From: Michal Simek <michal.simek@xilinx.com>
-Date: Fri, 31 May 2013 07:56:34 +0200
-Subject: watchdog: xilinx: Setup the origin compatible string
-
-Watchdog 1.01.a is also compatible with 1.00.a.
-Add the origin version to compatible list.
-
-Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-Reviewed-by: Guenter Roeck <linux@roeck-us.net>
-Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
-(cherry picked from commit 8fce9b367d672332d2d101175b10737ee5c18b59)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/watchdog/of_xilinx_wdt.c | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/drivers/watchdog/of_xilinx_wdt.c b/drivers/watchdog/of_xilinx_wdt.c
-index d4a35ab89e01..4dd281f2c33f 100644
---- a/drivers/watchdog/of_xilinx_wdt.c
-+++ b/drivers/watchdog/of_xilinx_wdt.c
-@@ -384,6 +384,7 @@ static int xwdt_remove(struct platform_device *dev)
- 
- /* Match table for of_platform binding */
- static struct of_device_id xwdt_of_match[] = {
-+	{ .compatible = "xlnx,xps-timebase-wdt-1.00.a", },
- 	{ .compatible = "xlnx,xps-timebase-wdt-1.01.a", },
- 	{},
- };
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0068-watchdog-Get-rid-of-MODULE_ALIAS_MISCDEV-statements.patch b/patches.zynq/0068-watchdog-Get-rid-of-MODULE_ALIAS_MISCDEV-statements.patch
deleted file mode 100644
index 79a7dd27e9986..0000000000000
--- a/patches.zynq/0068-watchdog-Get-rid-of-MODULE_ALIAS_MISCDEV-statements.patch
+++ /dev/null
@@ -1,55 +0,0 @@
-From 430a9757ebdaa09122c5f6429e2e791f34a27ec7 Mon Sep 17 00:00:00 2001
-From: Jean Delvare <jdelvare@suse.de>
-Date: Mon, 21 Oct 2013 17:38:49 +0200
-Subject: watchdog: Get rid of MODULE_ALIAS_MISCDEV statements
-
-I just can't find any value in MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR)
-and MODULE_ALIAS_MISCDEV(TEMP_MINOR) statements.
-
-Either the device is enumerated and the driver already has a module
-alias (e.g. PCI, USB etc.) that will get the right driver loaded
-automatically.
-
-Or the device is not enumerated and loading its driver will lead to
-more or less intrusive hardware poking. Such hardware poking should be
-limited to a bare minimum, so the user should really decide which
-drivers should be tried and in what order. Trying them all in
-arbitrary order can't do any good.
-
-On top of that, loading that many drivers at once bloats the kernel
-log. Also many drivers will stay loaded afterward, bloating the output
-of "lsmod" and wasting memory. Some modules (cs5535_mfgpt which gets
-loaded as a dependency) can't even be unloaded!
-
-If defining char-major-10-130 is needed then it should happen in
-user-space.
-
-Signed-off-by: Jean Delvare <jdelvare@suse.de>
-Acked-by: Guenter Roeck <linux@roeck-us.net>
-Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
-Cc: Stephen Warren <swarren@wwwdotorg.org>
-Cc: Mike Frysinger <vapier.adi@gmail.com>
-Cc: Wan ZongShun <mcuos.com@gmail.com>
-Cc: Ben Dooks <ben-linux@fluff.org>
-Cc: Kukjin Kim <kgene.kim@samsung.com>
-Cc: Zwane Mwaikambo <zwane@arm.linux.org.uk>
-Cc: Jim Cromie <jim.cromie@gmail.com>
-(cherry picked from commit 487722cf2d66126338217896642bd5eec832c34b)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/watchdog/of_xilinx_wdt.c | 1 -
- 1 file changed, 1 deletion(-)
-
-diff --git a/drivers/watchdog/of_xilinx_wdt.c b/drivers/watchdog/of_xilinx_wdt.c
-index 4dd281f2c33f..fb57103c8ebc 100644
---- a/drivers/watchdog/of_xilinx_wdt.c
-+++ b/drivers/watchdog/of_xilinx_wdt.c
-@@ -405,4 +405,3 @@ module_platform_driver(xwdt_driver);
- MODULE_AUTHOR("Alejandro Cabrera <aldaya@gmail.com>");
- MODULE_DESCRIPTION("Xilinx Watchdog driver");
- MODULE_LICENSE("GPL v2");
--MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0069-DT-Add-documentation-for-gpio-xilinx.patch b/patches.zynq/0069-DT-Add-documentation-for-gpio-xilinx.patch
deleted file mode 100644
index a72a7e9f1f7a5..0000000000000
--- a/patches.zynq/0069-DT-Add-documentation-for-gpio-xilinx.patch
+++ /dev/null
@@ -1,74 +0,0 @@
-From 97bee269bbd0af7c8757d37a6ae3683f7f7575b4 Mon Sep 17 00:00:00 2001
-From: Michal Simek <michal.simek@xilinx.com>
-Date: Mon, 3 Jun 2013 14:31:21 +0200
-Subject: DT: Add documentation for gpio-xilinx
-
-Describe gpio-xilinx binding.
-
-Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-(cherry picked from commit 6090a0fa5cefe6cc0aa95786b21dcf1bf19942da)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- .../devicetree/bindings/gpio/gpio-xilinx.txt       | 48 ++++++++++++++++++++++
- 1 file changed, 48 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/gpio/gpio-xilinx.txt
-
-diff --git a/Documentation/devicetree/bindings/gpio/gpio-xilinx.txt b/Documentation/devicetree/bindings/gpio/gpio-xilinx.txt
-new file mode 100644
-index 000000000000..63bf4becd5f0
---- /dev/null
-+++ b/Documentation/devicetree/bindings/gpio/gpio-xilinx.txt
-@@ -0,0 +1,48 @@
-+Xilinx plb/axi GPIO controller
-+
-+Dual channel GPIO controller with configurable number of pins
-+(from 1 to 32 per channel). Every pin can be configured as
-+input/output/tristate. Both channels share the same global IRQ but
-+local interrupts can be enabled on channel basis.
-+
-+Required properties:
-+- compatible : Should be "xlnx,xps-gpio-1.00.a"
-+- reg : Address and length of the register set for the device
-+- #gpio-cells : Should be two. The first cell is the pin number and the
-+  second cell is used to specify optional parameters (currently unused).
-+- gpio-controller : Marks the device node as a GPIO controller.
-+
-+Optional properties:
-+- interrupts : Interrupt mapping for GPIO IRQ.
-+- interrupt-parent : Phandle for the interrupt controller that
-+  services interrupts for this device.
-+- xlnx,all-inputs : if n-th bit is setup, GPIO-n is input
-+- xlnx,dout-default : if n-th bit is 1, GPIO-n default value is 1
-+- xlnx,gpio-width : gpio width
-+- xlnx,tri-default : if n-th bit is 1, GPIO-n is in tristate mode
-+- xlnx,is-dual : if 1, controller also uses the second channel
-+- xlnx,all-inputs-2 : as above but for the second channel
-+- xlnx,dout-default-2 : as above but the second channel
-+- xlnx,gpio2-width : as above but for the second channel
-+- xlnx,tri-default-2 : as above but for the second channel
-+
-+
-+Example:
-+gpio: gpio@40000000 {
-+	#gpio-cells = <2>;
-+	compatible = "xlnx,xps-gpio-1.00.a";
-+	gpio-controller ;
-+	interrupt-parent = <&microblaze_0_intc>;
-+	interrupts = < 6 2 >;
-+	reg = < 0x40000000 0x10000 >;
-+	xlnx,all-inputs = <0x0>;
-+	xlnx,all-inputs-2 = <0x0>;
-+	xlnx,dout-default = <0x0>;
-+	xlnx,dout-default-2 = <0x0>;
-+	xlnx,gpio-width = <0x2>;
-+	xlnx,gpio2-width = <0x2>;
-+	xlnx,interrupt-present = <0x1>;
-+	xlnx,is-dual = <0x1>;
-+	xlnx,tri-default = <0xffffffff>;
-+	xlnx,tri-default-2 = <0xffffffff>;
-+} ;
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0070-arm-dt-zynq-Add-support-for-the-zc706-platform.patch b/patches.zynq/0070-arm-dt-zynq-Add-support-for-the-zc706-platform.patch
deleted file mode 100644
index adaaecadb53c6..0000000000000
--- a/patches.zynq/0070-arm-dt-zynq-Add-support-for-the-zc706-platform.patch
+++ /dev/null
@@ -1,70 +0,0 @@
-From d429e826cbf1e3f1bac97f81e24d07cfb2880ed6 Mon Sep 17 00:00:00 2001
-From: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Date: Thu, 13 Jun 2013 09:37:17 -0700
-Subject: arm: dt: zynq: Add support for the zc706 platform
-
-Add a DT fragment for the zc706 Zynq platform and a corresponding
-target to the Makefile.
-
-Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Reviewed-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
-Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-(cherry picked from commit 4bda2670e4759b99f725176dd31caa612ea098b6)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- arch/arm/boot/dts/Makefile       |    3 ++-
- arch/arm/boot/dts/zynq-zc706.dts |   35 +++++++++++++++++++++++++++++++++++
- 2 files changed, 37 insertions(+), 1 deletion(-)
- create mode 100644 arch/arm/boot/dts/zynq-zc706.dts
-
---- a/arch/arm/boot/dts/Makefile
-+++ b/arch/arm/boot/dts/Makefile
-@@ -219,7 +219,8 @@ dtb-$(CONFIG_ARCH_VT8500) += vt8500-bv07
- 	wm8505-ref.dtb \
- 	wm8650-mid.dtb \
- 	wm8850-w70v2.dtb
--dtb-$(CONFIG_ARCH_ZYNQ) += zynq-zc702.dtb
-+dtb-$(CONFIG_ARCH_ZYNQ) += zynq-zc702.dtb \
-+	zynq-zc706.dtb
- 
- targets += dtbs
- targets += $(dtb-y)
---- /dev/null
-+++ b/arch/arm/boot/dts/zynq-zc706.dts
-@@ -0,0 +1,35 @@
-+/*
-+ *  Copyright (C) 2011 Xilinx
-+ *  Copyright (C) 2012 National Instruments Corp.
-+ *  Copyright (C) 2013 Xilinx
-+ *
-+ * This software is licensed under the terms of the GNU General Public
-+ * License version 2, as published by the Free Software Foundation, and
-+ * may be copied, distributed, and modified under those terms.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ */
-+/dts-v1/;
-+/include/ "zynq-7000.dtsi"
-+
-+/ {
-+	model = "Zynq ZC706 Development Board";
-+	compatible = "xlnx,zynq-zc706", "xlnx,zynq-7000";
-+
-+	memory {
-+		device_type = "memory";
-+		reg = <0 0x40000000>;
-+	};
-+
-+	chosen {
-+		bootargs = "console=ttyPS0,115200 earlyprintk";
-+	};
-+
-+};
-+
-+&uart1 {
-+	status = "okay";
-+};
diff --git a/patches.zynq/0071-USB-host-use-platform_-get-set-_drvdata.patch b/patches.zynq/0071-USB-host-use-platform_-get-set-_drvdata.patch
deleted file mode 100644
index fbf4d4ce34546..0000000000000
--- a/patches.zynq/0071-USB-host-use-platform_-get-set-_drvdata.patch
+++ /dev/null
@@ -1,48 +0,0 @@
-From 7e8ff703fd299418886672365a64f85e93c5f50b Mon Sep 17 00:00:00 2001
-From: Jingoo Han <jg1.han@samsung.com>
-Date: Thu, 23 May 2013 19:18:39 +0900
-Subject: USB: host: use platform_{get,set}_drvdata()
-
-Use the wrapper functions for getting and setting the driver data using
-platform_device instead of using dev_{get,set}_drvdata() with &pdev->dev,
-so we can directly pass a struct platform_device.
-
-Also, unnecessary dev_set_drvdata() is removed, because the driver core
-clears the driver data to NULL after device_release or on probe failure.
-
-Signed-off-by: Jingoo Han <jg1.han@samsung.com>
-Acked-by: Alan Stern <stern@rowland.harvard.edu>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit 477527baf6a8d4c8652f979f0aa3546216635184)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/usb/host/ehci-xilinx-of.c | 5 ++---
- 1 file changed, 2 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/usb/host/ehci-xilinx-of.c b/drivers/usb/host/ehci-xilinx-of.c
-index d845e3bcfaff..35c7f90384a6 100644
---- a/drivers/usb/host/ehci-xilinx-of.c
-+++ b/drivers/usb/host/ehci-xilinx-of.c
-@@ -209,8 +209,7 @@ err_irq:
-  */
- static int ehci_hcd_xilinx_of_remove(struct platform_device *op)
- {
--	struct usb_hcd *hcd = dev_get_drvdata(&op->dev);
--	dev_set_drvdata(&op->dev, NULL);
-+	struct usb_hcd *hcd = platform_get_drvdata(op);
- 
- 	dev_dbg(&op->dev, "stopping XILINX-OF USB Controller\n");
- 
-@@ -229,7 +228,7 @@ static int ehci_hcd_xilinx_of_remove(struct platform_device *op)
-  */
- static void ehci_hcd_xilinx_of_shutdown(struct platform_device *op)
- {
--	struct usb_hcd *hcd = dev_get_drvdata(&op->dev);
-+	struct usb_hcd *hcd = platform_get_drvdata(op);
- 
- 	if (hcd->driver->shutdown)
- 		hcd->driver->shutdown(hcd);
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0072-USB-host-Use-usb_hcd_platform_shutdown-wherever-poss.patch b/patches.zynq/0072-USB-host-Use-usb_hcd_platform_shutdown-wherever-poss.patch
deleted file mode 100644
index 086b068d61050..0000000000000
--- a/patches.zynq/0072-USB-host-Use-usb_hcd_platform_shutdown-wherever-poss.patch
+++ /dev/null
@@ -1,58 +0,0 @@
-From 11a94a61d5a3eb4f6c44af725ae51786338fcb7b Mon Sep 17 00:00:00 2001
-From: Roger Quadros <rogerq@ti.com>
-Date: Mon, 22 Jul 2013 15:04:50 +0300
-Subject: USB: host: Use usb_hcd_platform_shutdown() wherever possible
-
-Most HCD drivers are doing the same thing in their ".shutdown" callback
-so it makes sense to use the generic usb_hcd_platform_shutdown()
-handler there.
-
-Signed-off-by: Roger Quadros <rogerq@ti.com>
-Reviewed-by: Felipe Balbi <balbi@ti.com>
-Acked-by: Alan Stern <stern@rowland.harvard.edu>
-Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-(cherry picked from commit aaf6b52d50f85ed792c9c8987f5169f3dce2adea)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/usb/host/ehci-xilinx-of.c | 17 +----------------
- 1 file changed, 1 insertion(+), 16 deletions(-)
-
-diff --git a/drivers/usb/host/ehci-xilinx-of.c b/drivers/usb/host/ehci-xilinx-of.c
-index 35c7f90384a6..eba962e6ebfb 100644
---- a/drivers/usb/host/ehci-xilinx-of.c
-+++ b/drivers/usb/host/ehci-xilinx-of.c
-@@ -220,21 +220,6 @@ static int ehci_hcd_xilinx_of_remove(struct platform_device *op)
- 	return 0;
- }
- 
--/**
-- * ehci_hcd_xilinx_of_shutdown - shutdown the hcd
-- * @op:		pointer to platform_device structure that is to be removed
-- *
-- * Properly shutdown the hcd, call driver's shutdown routine.
-- */
--static void ehci_hcd_xilinx_of_shutdown(struct platform_device *op)
--{
--	struct usb_hcd *hcd = platform_get_drvdata(op);
--
--	if (hcd->driver->shutdown)
--		hcd->driver->shutdown(hcd);
--}
--
--
- static const struct of_device_id ehci_hcd_xilinx_of_match[] = {
- 		{.compatible = "xlnx,xps-usb-host-1.00.a",},
- 	{},
-@@ -244,7 +229,7 @@ MODULE_DEVICE_TABLE(of, ehci_hcd_xilinx_of_match);
- static struct platform_driver ehci_hcd_xilinx_of_driver = {
- 	.probe		= ehci_hcd_xilinx_of_probe,
- 	.remove		= ehci_hcd_xilinx_of_remove,
--	.shutdown	= ehci_hcd_xilinx_of_shutdown,
-+	.shutdown	= usb_hcd_platform_shutdown,
- 	.driver = {
- 		.name = "xilinx-of-ehci",
- 		.owner = THIS_MODULE,
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0073-clocksource-cadence_ttc-Remove-unused-header.patch b/patches.zynq/0073-clocksource-cadence_ttc-Remove-unused-header.patch
deleted file mode 100644
index f0ab2c47b0273..0000000000000
--- a/patches.zynq/0073-clocksource-cadence_ttc-Remove-unused-header.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From 513f6e9cee5ca385c71ef30d66015e6c9d8605fe Mon Sep 17 00:00:00 2001
-From: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Date: Mon, 8 Jul 2013 09:51:37 -0700
-Subject: clocksource: cadence_ttc: Remove unused header
-
-The clk-provider.h header is not required by this driver.
-
-Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
-Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
-(cherry picked from commit 9bbf914043e04f65e619f3c0ff67c387812f9458)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/clocksource/cadence_ttc_timer.c | 1 -
- 1 file changed, 1 deletion(-)
-
-diff --git a/drivers/clocksource/cadence_ttc_timer.c b/drivers/clocksource/cadence_ttc_timer.c
-index 4cbe28c74631..0eefc8d8622b 100644
---- a/drivers/clocksource/cadence_ttc_timer.c
-+++ b/drivers/clocksource/cadence_ttc_timer.c
-@@ -21,7 +21,6 @@
- #include <linux/of_address.h>
- #include <linux/of_irq.h>
- #include <linux/slab.h>
--#include <linux/clk-provider.h>
- 
- /*
-  * This driver configures the 2 16-bit count-up timers as follows:
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0074-net-ethernet-use-platform_-get-set-_drvdata.patch b/patches.zynq/0074-net-ethernet-use-platform_-get-set-_drvdata.patch
deleted file mode 100644
index b295671ab81c6..0000000000000
--- a/patches.zynq/0074-net-ethernet-use-platform_-get-set-_drvdata.patch
+++ /dev/null
@@ -1,79 +0,0 @@
-From 5f3f406e9cb151174bfe553025a1f1e0e05e64fd Mon Sep 17 00:00:00 2001
-From: Jingoo Han <jg1.han@samsung.com>
-Date: Thu, 23 May 2013 00:52:31 +0000
-Subject: net: ethernet: use platform_{get,set}_drvdata()
-
-Use the wrapper functions for getting and setting the driver data using
-platform_device instead of using dev_{get,set}_drvdata() with &pdev->dev,
-so we can directly pass a struct platform_device.
-
-Also, unnecessary dev_set_drvdata() is removed, because the driver core
-clears the driver data to NULL after device_release or on probe failure.
-
-Signed-off-by: Jingoo Han <jg1.han@samsung.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit 8513fbd880093f00a47e85a552f14ca2de8d84d6)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/net/ethernet/xilinx/ll_temac_main.c       |    5 ++---
- drivers/net/ethernet/xilinx/xilinx_axienet_main.c |    6 ++----
- 2 files changed, 4 insertions(+), 7 deletions(-)
-
---- a/drivers/net/ethernet/xilinx/ll_temac_main.c
-+++ b/drivers/net/ethernet/xilinx/ll_temac_main.c
-@@ -1013,7 +1013,7 @@ static int temac_of_probe(struct platfor
- 		return -ENOMEM;
- 
- 	ether_setup(ndev);
--	dev_set_drvdata(&op->dev, ndev);
-+	platform_set_drvdata(op, ndev);
- 	SET_NETDEV_DEV(ndev, &op->dev);
- 	ndev->flags &= ~IFF_MULTICAST;  /* clear multicast */
- 	ndev->features = NETIF_F_SG;
-@@ -1142,7 +1142,7 @@ static int temac_of_probe(struct platfor
- 
- static int temac_of_remove(struct platform_device *op)
- {
--	struct net_device *ndev = dev_get_drvdata(&op->dev);
-+	struct net_device *ndev = platform_get_drvdata(op);
- 	struct temac_local *lp = netdev_priv(ndev);
- 
- 	temac_mdio_teardown(lp);
-@@ -1151,7 +1151,6 @@ static int temac_of_remove(struct platfo
- 	if (lp->phy_node)
- 		of_node_put(lp->phy_node);
- 	lp->phy_node = NULL;
--	dev_set_drvdata(&op->dev, NULL);
- 	iounmap(lp->regs);
- 	if (lp->sdma_regs)
- 		iounmap(lp->sdma_regs);
---- a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
-+++ b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
-@@ -1484,7 +1484,7 @@ static int axienet_of_probe(struct platf
- 		return -ENOMEM;
- 
- 	ether_setup(ndev);
--	dev_set_drvdata(&op->dev, ndev);
-+	platform_set_drvdata(op, ndev);
- 
- 	SET_NETDEV_DEV(ndev, &op->dev);
- 	ndev->flags &= ~IFF_MULTICAST;  /* clear multicast */
-@@ -1622,7 +1622,7 @@ nodev:
- 
- static int axienet_of_remove(struct platform_device *op)
- {
--	struct net_device *ndev = dev_get_drvdata(&op->dev);
-+	struct net_device *ndev = platform_get_drvdata(op);
- 	struct axienet_local *lp = netdev_priv(ndev);
- 
- 	axienet_mdio_teardown(lp);
-@@ -1632,8 +1632,6 @@ static int axienet_of_remove(struct plat
- 		of_node_put(lp->phy_node);
- 	lp->phy_node = NULL;
- 
--	dev_set_drvdata(&op->dev, NULL);
--
- 	iounmap(lp->regs);
- 	if (lp->dma_regs)
- 		iounmap(lp->dma_regs);
diff --git a/patches.zynq/0075-drivers-net-Convert-dma_alloc_coherent-.__GFP_ZERO-t.patch b/patches.zynq/0075-drivers-net-Convert-dma_alloc_coherent-.__GFP_ZERO-t.patch
deleted file mode 100644
index 43cf3f5173fde..0000000000000
--- a/patches.zynq/0075-drivers-net-Convert-dma_alloc_coherent-.__GFP_ZERO-t.patch
+++ /dev/null
@@ -1,89 +0,0 @@
-From f9b4ed9ae06661e53e45507d4cab61cf0a192cc8 Mon Sep 17 00:00:00 2001
-From: Joe Perches <joe@perches.com>
-Date: Mon, 26 Aug 2013 22:45:23 -0700
-Subject: drivers:net: Convert dma_alloc_coherent(...__GFP_ZERO) to
- dma_zalloc_coherent
-
-__GFP_ZERO is an uncommon flag and perhaps is better
-not used.  static inline dma_zalloc_coherent exists
-so convert the uses of dma_alloc_coherent with __GFP_ZERO
-to the more common kernel style with zalloc.
-
-Remove memset from the static inline dma_zalloc_coherent
-and add just one use of __GFP_ZERO instead.
-
-Trivially reduces the size of the existing uses of
-dma_zalloc_coherent.
-
-Realign arguments as appropriate.
-
-Signed-off-by: Joe Perches <joe@perches.com>
-Acked-by: Neil Horman <nhorman@tuxdriver.com>
-Acked-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
-Acked-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit ede23fa8161c1a04aa1b3bf5447812ca14b3fef1)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/net/ethernet/xilinx/ll_temac_main.c       | 12 ++++++------
- drivers/net/ethernet/xilinx/xilinx_axienet_main.c | 14 ++++++--------
- 2 files changed, 12 insertions(+), 14 deletions(-)
-
-diff --git a/drivers/net/ethernet/xilinx/ll_temac_main.c b/drivers/net/ethernet/xilinx/ll_temac_main.c
-index 96cb89795ee4..0029148077a9 100644
---- a/drivers/net/ethernet/xilinx/ll_temac_main.c
-+++ b/drivers/net/ethernet/xilinx/ll_temac_main.c
-@@ -243,15 +243,15 @@ static int temac_dma_bd_init(struct net_device *ndev)
- 
- 	/* allocate the tx and rx ring buffer descriptors. */
- 	/* returns a virtual address and a physical address. */
--	lp->tx_bd_v = dma_alloc_coherent(ndev->dev.parent,
--					 sizeof(*lp->tx_bd_v) * TX_BD_NUM,
--					 &lp->tx_bd_p, GFP_KERNEL | __GFP_ZERO);
-+	lp->tx_bd_v = dma_zalloc_coherent(ndev->dev.parent,
-+					  sizeof(*lp->tx_bd_v) * TX_BD_NUM,
-+					  &lp->tx_bd_p, GFP_KERNEL);
- 	if (!lp->tx_bd_v)
- 		goto out;
- 
--	lp->rx_bd_v = dma_alloc_coherent(ndev->dev.parent,
--					 sizeof(*lp->rx_bd_v) * RX_BD_NUM,
--					 &lp->rx_bd_p, GFP_KERNEL | __GFP_ZERO);
-+	lp->rx_bd_v = dma_zalloc_coherent(ndev->dev.parent,
-+					  sizeof(*lp->rx_bd_v) * RX_BD_NUM,
-+					  &lp->rx_bd_p, GFP_KERNEL);
- 	if (!lp->rx_bd_v)
- 		goto out;
- 
-diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
-index fb7d1c28a2ea..b2ff038d6d20 100644
---- a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
-+++ b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
-@@ -201,17 +201,15 @@ static int axienet_dma_bd_init(struct net_device *ndev)
- 	/*
- 	 * Allocate the Tx and Rx buffer descriptors.
- 	 */
--	lp->tx_bd_v = dma_alloc_coherent(ndev->dev.parent,
--					 sizeof(*lp->tx_bd_v) * TX_BD_NUM,
--					 &lp->tx_bd_p,
--					 GFP_KERNEL | __GFP_ZERO);
-+	lp->tx_bd_v = dma_zalloc_coherent(ndev->dev.parent,
-+					  sizeof(*lp->tx_bd_v) * TX_BD_NUM,
-+					  &lp->tx_bd_p, GFP_KERNEL);
- 	if (!lp->tx_bd_v)
- 		goto out;
- 
--	lp->rx_bd_v = dma_alloc_coherent(ndev->dev.parent,
--					 sizeof(*lp->rx_bd_v) * RX_BD_NUM,
--					 &lp->rx_bd_p,
--					 GFP_KERNEL | __GFP_ZERO);
-+	lp->rx_bd_v = dma_zalloc_coherent(ndev->dev.parent,
-+					  sizeof(*lp->rx_bd_v) * RX_BD_NUM,
-+					  &lp->rx_bd_p, GFP_KERNEL);
- 	if (!lp->rx_bd_v)
- 		goto out;
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0076-net-emaclite-Report-failures-in-mdio-setup.patch b/patches.zynq/0076-net-emaclite-Report-failures-in-mdio-setup.patch
deleted file mode 100644
index 4a45e78ca6a47..0000000000000
--- a/patches.zynq/0076-net-emaclite-Report-failures-in-mdio-setup.patch
+++ /dev/null
@@ -1,59 +0,0 @@
-From 6e811ed59c47a4fdfefb4cbfc672e9cfd13c3c07 Mon Sep 17 00:00:00 2001
-From: Michal Simek <michal.simek@xilinx.com>
-Date: Thu, 30 May 2013 00:28:03 +0000
-Subject: net: emaclite: Report failures in mdio setup
-
-Be more verbose when any problem happens.
-
-Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit ccfecdfe16a872ed3e8322ea48e34502568eb849)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/net/ethernet/xilinx/xilinx_emaclite.c | 12 +++++++++---
- 1 file changed, 9 insertions(+), 3 deletions(-)
-
-diff --git a/drivers/net/ethernet/xilinx/xilinx_emaclite.c b/drivers/net/ethernet/xilinx/xilinx_emaclite.c
-index b7268b3dae77..1fabaef46d7b 100644
---- a/drivers/net/ethernet/xilinx/xilinx_emaclite.c
-+++ b/drivers/net/ethernet/xilinx/xilinx_emaclite.c
-@@ -852,8 +852,10 @@ static int xemaclite_mdio_setup(struct net_local *lp, struct device *dev)
- 	/* Don't register the MDIO bus if the phy_node or its parent node
- 	 * can't be found.
- 	 */
--	if (!np)
-+	if (!np) {
-+		dev_err(dev, "Failed to register mdio bus.\n");
- 		return -ENODEV;
-+	}
- 
- 	/* Enable the MDIO bus by asserting the enable bit in MDIO Control
- 	 * register.
-@@ -862,8 +864,10 @@ static int xemaclite_mdio_setup(struct net_local *lp, struct device *dev)
- 		 XEL_MDIOCTRL_MDIOEN_MASK);
- 
- 	bus = mdiobus_alloc();
--	if (!bus)
-+	if (!bus) {
-+		dev_err(dev, "Failed to allocal mdiobus\n");
- 		return -ENOMEM;
-+	}
- 
- 	of_address_to_resource(np, 0, &res);
- 	snprintf(bus->id, MII_BUS_ID_SIZE, "%.8llx",
-@@ -879,8 +883,10 @@ static int xemaclite_mdio_setup(struct net_local *lp, struct device *dev)
- 	lp->mii_bus = bus;
- 
- 	rc = of_mdiobus_register(bus, np);
--	if (rc)
-+	if (rc) {
-+		dev_err(dev, "Failed to register mdio bus.\n");
- 		goto err_register;
-+	}
- 
- 	return 0;
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0077-net-emaclite-Support-multiple-phys-connected-to-one-.patch b/patches.zynq/0077-net-emaclite-Support-multiple-phys-connected-to-one-.patch
deleted file mode 100644
index 02042aa97689c..0000000000000
--- a/patches.zynq/0077-net-emaclite-Support-multiple-phys-connected-to-one-.patch
+++ /dev/null
@@ -1,100 +0,0 @@
-From 4278cc5433cdac8006a1f207ef8eeeceed9f4bfa Mon Sep 17 00:00:00 2001
-From: Michal Simek <michal.simek@xilinx.com>
-Date: Thu, 30 May 2013 00:28:04 +0000
-Subject: net: emaclite: Support multiple phys connected to one MDIO bus
-
-For system which contains at least two ethernet IP where
-one IP manage MDIO bus with several PHYs.
-
-Example dts node:
-ethernet_mac0: ethernet@81000000 {
-	compatible = "xlnx,xps-ethernetlite-1.00.a";
-	device_type = "network";
-	interrupt-parent = <&xps_intc_0>;
-	interrupts = < 1 0 >;
-		local-mac-address = [ 00 0a 35 00 db bb ];
-	phy-handle = <&ethernet_mac0_phy0>;
-	reg = < 0x81000000 0x10000 >;
-	xlnx,duplex = <0x1>;
-	xlnx,family = "spartan3e";
-	xlnx,include-internal-loopback = <0x0>;
-	xlnx,include-mdio = <0x1>;
-	xlnx,rx-ping-pong = <0x0>;
-	xlnx,tx-ping-pong = <0x0>;
-	ethernet_mac0_mdio {
-		#address-cells = <1>;
-		#size-cells = <0>;
-		ethernet_mac0_phy0: phy@1 {
-			reg = <0x1>;
-		} ;
-		ethernet_mac0_phy1: phy@3 {
-			reg = <0x3>;
-		} ;
-	} ;
-} ;
-ethernet_mac2: ethernet@81040000 {
-	compatible = "xlnx,xps-ethernetlite-1.00.a";
-	device_type = "network";
-	interrupt-parent = <&xps_intc_0>;
-	interrupts = < 11 0 >;
-		local-mac-address = [ 00 0a 35 00 db bb ];
-	phy-handle = <&ethernet_mac0_phy1>;
-	reg = < 0x81040000 0x10000 >;
-	xlnx,duplex = <0x1>;
-	xlnx,family = "spartan3e";
-	xlnx,include-internal-loopback = <0x0>;
-	xlnx,include-mdio = <0x0>;
-	xlnx,rx-ping-pong = <0x0>;
-	xlnx,tx-ping-pong = <0x0>;
-} ;
-
-Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit e0a3bc65448c01289a74329ddf6c84d8c0594e59)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/net/ethernet/xilinx/xilinx_emaclite.c | 13 ++++++++++++-
- 1 file changed, 12 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/net/ethernet/xilinx/xilinx_emaclite.c b/drivers/net/ethernet/xilinx/xilinx_emaclite.c
-index 1fabaef46d7b..c13081e1f593 100644
---- a/drivers/net/ethernet/xilinx/xilinx_emaclite.c
-+++ b/drivers/net/ethernet/xilinx/xilinx_emaclite.c
-@@ -848,6 +848,7 @@ static int xemaclite_mdio_setup(struct net_local *lp, struct device *dev)
- 	int rc;
- 	struct resource res;
- 	struct device_node *np = of_get_parent(lp->phy_node);
-+	struct device_node *npp;
- 
- 	/* Don't register the MDIO bus if the phy_node or its parent node
- 	 * can't be found.
-@@ -856,6 +857,17 @@ static int xemaclite_mdio_setup(struct net_local *lp, struct device *dev)
- 		dev_err(dev, "Failed to register mdio bus.\n");
- 		return -ENODEV;
- 	}
-+	npp = of_get_parent(np);
-+
-+	of_address_to_resource(npp, 0, &res);
-+	if (lp->ndev->mem_start != res.start) {
-+		struct phy_device *phydev;
-+		phydev = of_phy_find_device(lp->phy_node);
-+		if (!phydev)
-+			dev_info(dev,
-+				 "MDIO of the phy is not registered yet\n");
-+		return 0;
-+	}
- 
- 	/* Enable the MDIO bus by asserting the enable bit in MDIO Control
- 	 * register.
-@@ -869,7 +881,6 @@ static int xemaclite_mdio_setup(struct net_local *lp, struct device *dev)
- 		return -ENOMEM;
- 	}
- 
--	of_address_to_resource(np, 0, &res);
- 	snprintf(bus->id, MII_BUS_ID_SIZE, "%.8llx",
- 		 (unsigned long long)res.start);
- 	bus->priv = lp;
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0078-net-emaclite-Let-s-make-xemaclite_adjust_link-static.patch b/patches.zynq/0078-net-emaclite-Let-s-make-xemaclite_adjust_link-static.patch
deleted file mode 100644
index b787e345406fe..0000000000000
--- a/patches.zynq/0078-net-emaclite-Let-s-make-xemaclite_adjust_link-static.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From 5fe49777c7c349f4bdce20bce9c26a6f7374fb1c Mon Sep 17 00:00:00 2001
-From: Michal Simek <michal.simek@xilinx.com>
-Date: Thu, 30 May 2013 00:28:05 +0000
-Subject: net: emaclite: Let's make xemaclite_adjust_link static
-
-xemaclite_adjust_link is used locally.
-It removes sparse warning:
-drivers/net/ethernet/xilinx/xilinx_emaclite.c:916:6: warning:
-symbol 'xemaclite_adjust_link' was not declared. Should it be static?
-
-Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit 3fb99fa7c7d2310791bf39929285da44b201fd40)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/net/ethernet/xilinx/xilinx_emaclite.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/net/ethernet/xilinx/xilinx_emaclite.c b/drivers/net/ethernet/xilinx/xilinx_emaclite.c
-index c13081e1f593..bda574db42ff 100644
---- a/drivers/net/ethernet/xilinx/xilinx_emaclite.c
-+++ b/drivers/net/ethernet/xilinx/xilinx_emaclite.c
-@@ -913,7 +913,7 @@ err_register:
-  * There's nothing in the Emaclite device to be configured when the link
-  * state changes. We just print the status.
-  */
--void xemaclite_adjust_link(struct net_device *ndev)
-+static void xemaclite_adjust_link(struct net_device *ndev)
- {
- 	struct net_local *lp = netdev_priv(ndev);
- 	struct phy_device *phy = lp->phy_dev;
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0079-net-emaclite-Do-not-use-microblaze-and-ppc-IO-functi.patch b/patches.zynq/0079-net-emaclite-Do-not-use-microblaze-and-ppc-IO-functi.patch
deleted file mode 100644
index dee2c90c7732f..0000000000000
--- a/patches.zynq/0079-net-emaclite-Do-not-use-microblaze-and-ppc-IO-functi.patch
+++ /dev/null
@@ -1,345 +0,0 @@
-From 0e9dfb478e21866f4bcc39a5c01a4dea34782897 Mon Sep 17 00:00:00 2001
-From: Michal Simek <michal.simek@xilinx.com>
-Date: Thu, 30 May 2013 00:28:06 +0000
-Subject: net: emaclite: Do not use microblaze and ppc IO functions
-
-Emaclite can be used on ARM zynq where in_be32/out_be32 IO
-functions are not present. Use standard __raw_readl/__raw_writel
-IO functions instead.
-
-Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit 123c1407af877b9b036b852b77013a6f9f6049b0)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/net/ethernet/xilinx/xilinx_emaclite.c | 138 +++++++++++++-------------
- 1 file changed, 69 insertions(+), 69 deletions(-)
-
-diff --git a/drivers/net/ethernet/xilinx/xilinx_emaclite.c b/drivers/net/ethernet/xilinx/xilinx_emaclite.c
-index bda574db42ff..476ce5bb385f 100644
---- a/drivers/net/ethernet/xilinx/xilinx_emaclite.c
-+++ b/drivers/net/ethernet/xilinx/xilinx_emaclite.c
-@@ -159,34 +159,32 @@ static void xemaclite_enable_interrupts(struct net_local *drvdata)
- 	u32 reg_data;
- 
- 	/* Enable the Tx interrupts for the first Buffer */
--	reg_data = in_be32(drvdata->base_addr + XEL_TSR_OFFSET);
--	out_be32(drvdata->base_addr + XEL_TSR_OFFSET,
--		 reg_data | XEL_TSR_XMIT_IE_MASK);
-+	reg_data = __raw_readl(drvdata->base_addr + XEL_TSR_OFFSET);
-+	__raw_writel(reg_data | XEL_TSR_XMIT_IE_MASK,
-+		     drvdata->base_addr + XEL_TSR_OFFSET);
- 
- 	/* Enable the Tx interrupts for the second Buffer if
- 	 * configured in HW */
- 	if (drvdata->tx_ping_pong != 0) {
--		reg_data = in_be32(drvdata->base_addr +
-+		reg_data = __raw_readl(drvdata->base_addr +
- 				   XEL_BUFFER_OFFSET + XEL_TSR_OFFSET);
--		out_be32(drvdata->base_addr + XEL_BUFFER_OFFSET +
--			 XEL_TSR_OFFSET,
--			 reg_data | XEL_TSR_XMIT_IE_MASK);
-+		__raw_writel(reg_data | XEL_TSR_XMIT_IE_MASK,
-+			     drvdata->base_addr + XEL_BUFFER_OFFSET +
-+			     XEL_TSR_OFFSET);
- 	}
- 
- 	/* Enable the Rx interrupts for the first buffer */
--	out_be32(drvdata->base_addr + XEL_RSR_OFFSET,
--		 XEL_RSR_RECV_IE_MASK);
-+	__raw_writel(XEL_RSR_RECV_IE_MASK, drvdata->base_addr + XEL_RSR_OFFSET);
- 
- 	/* Enable the Rx interrupts for the second Buffer if
- 	 * configured in HW */
- 	if (drvdata->rx_ping_pong != 0) {
--		out_be32(drvdata->base_addr + XEL_BUFFER_OFFSET +
--			 XEL_RSR_OFFSET,
--			 XEL_RSR_RECV_IE_MASK);
-+		__raw_writel(XEL_RSR_RECV_IE_MASK, drvdata->base_addr +
-+			     XEL_BUFFER_OFFSET + XEL_RSR_OFFSET);
- 	}
- 
- 	/* Enable the Global Interrupt Enable */
--	out_be32(drvdata->base_addr + XEL_GIER_OFFSET, XEL_GIER_GIE_MASK);
-+	__raw_writel(XEL_GIER_GIE_MASK, drvdata->base_addr + XEL_GIER_OFFSET);
- }
- 
- /**
-@@ -201,37 +199,37 @@ static void xemaclite_disable_interrupts(struct net_local *drvdata)
- 	u32 reg_data;
- 
- 	/* Disable the Global Interrupt Enable */
--	out_be32(drvdata->base_addr + XEL_GIER_OFFSET, XEL_GIER_GIE_MASK);
-+	__raw_writel(XEL_GIER_GIE_MASK, drvdata->base_addr + XEL_GIER_OFFSET);
- 
- 	/* Disable the Tx interrupts for the first buffer */
--	reg_data = in_be32(drvdata->base_addr + XEL_TSR_OFFSET);
--	out_be32(drvdata->base_addr + XEL_TSR_OFFSET,
--		 reg_data & (~XEL_TSR_XMIT_IE_MASK));
-+	reg_data = __raw_readl(drvdata->base_addr + XEL_TSR_OFFSET);
-+	__raw_writel(reg_data & (~XEL_TSR_XMIT_IE_MASK),
-+		     drvdata->base_addr + XEL_TSR_OFFSET);
- 
- 	/* Disable the Tx interrupts for the second Buffer
- 	 * if configured in HW */
- 	if (drvdata->tx_ping_pong != 0) {
--		reg_data = in_be32(drvdata->base_addr + XEL_BUFFER_OFFSET +
-+		reg_data = __raw_readl(drvdata->base_addr + XEL_BUFFER_OFFSET +
- 				   XEL_TSR_OFFSET);
--		out_be32(drvdata->base_addr + XEL_BUFFER_OFFSET +
--			 XEL_TSR_OFFSET,
--			 reg_data & (~XEL_TSR_XMIT_IE_MASK));
-+		__raw_writel(reg_data & (~XEL_TSR_XMIT_IE_MASK),
-+			     drvdata->base_addr + XEL_BUFFER_OFFSET +
-+			     XEL_TSR_OFFSET);
- 	}
- 
- 	/* Disable the Rx interrupts for the first buffer */
--	reg_data = in_be32(drvdata->base_addr + XEL_RSR_OFFSET);
--	out_be32(drvdata->base_addr + XEL_RSR_OFFSET,
--		 reg_data & (~XEL_RSR_RECV_IE_MASK));
-+	reg_data = __raw_readl(drvdata->base_addr + XEL_RSR_OFFSET);
-+	__raw_writel(reg_data & (~XEL_RSR_RECV_IE_MASK),
-+		     drvdata->base_addr + XEL_RSR_OFFSET);
- 
- 	/* Disable the Rx interrupts for the second buffer
- 	 * if configured in HW */
- 	if (drvdata->rx_ping_pong != 0) {
- 
--		reg_data = in_be32(drvdata->base_addr + XEL_BUFFER_OFFSET +
-+		reg_data = __raw_readl(drvdata->base_addr + XEL_BUFFER_OFFSET +
- 				   XEL_RSR_OFFSET);
--		out_be32(drvdata->base_addr + XEL_BUFFER_OFFSET +
--			 XEL_RSR_OFFSET,
--			 reg_data & (~XEL_RSR_RECV_IE_MASK));
-+		__raw_writel(reg_data & (~XEL_RSR_RECV_IE_MASK),
-+			     drvdata->base_addr + XEL_BUFFER_OFFSET +
-+			     XEL_RSR_OFFSET);
- 	}
- }
- 
-@@ -351,7 +349,7 @@ static int xemaclite_send_data(struct net_local *drvdata, u8 *data,
- 		byte_count = ETH_FRAME_LEN;
- 
- 	/* Check if the expected buffer is available */
--	reg_data = in_be32(addr + XEL_TSR_OFFSET);
-+	reg_data = __raw_readl(addr + XEL_TSR_OFFSET);
- 	if ((reg_data & (XEL_TSR_XMIT_BUSY_MASK |
- 	     XEL_TSR_XMIT_ACTIVE_MASK)) == 0) {
- 
-@@ -364,7 +362,7 @@ static int xemaclite_send_data(struct net_local *drvdata, u8 *data,
- 
- 		addr = (void __iomem __force *)((u32 __force)addr ^
- 						 XEL_BUFFER_OFFSET);
--		reg_data = in_be32(addr + XEL_TSR_OFFSET);
-+		reg_data = __raw_readl(addr + XEL_TSR_OFFSET);
- 
- 		if ((reg_data & (XEL_TSR_XMIT_BUSY_MASK |
- 		     XEL_TSR_XMIT_ACTIVE_MASK)) != 0)
-@@ -375,15 +373,16 @@ static int xemaclite_send_data(struct net_local *drvdata, u8 *data,
- 	/* Write the frame to the buffer */
- 	xemaclite_aligned_write(data, (u32 __force *) addr, byte_count);
- 
--	out_be32(addr + XEL_TPLR_OFFSET, (byte_count & XEL_TPLR_LENGTH_MASK));
-+	__raw_writel((byte_count & XEL_TPLR_LENGTH_MASK),
-+		     addr + XEL_TPLR_OFFSET);
- 
- 	/* Update the Tx Status Register to indicate that there is a
- 	 * frame to send. Set the XEL_TSR_XMIT_ACTIVE_MASK flag which
- 	 * is used by the interrupt handler to check whether a frame
- 	 * has been transmitted */
--	reg_data = in_be32(addr + XEL_TSR_OFFSET);
-+	reg_data = __raw_readl(addr + XEL_TSR_OFFSET);
- 	reg_data |= (XEL_TSR_XMIT_BUSY_MASK | XEL_TSR_XMIT_ACTIVE_MASK);
--	out_be32(addr + XEL_TSR_OFFSET, reg_data);
-+	__raw_writel(reg_data, addr + XEL_TSR_OFFSET);
- 
- 	return 0;
- }
-@@ -408,7 +407,7 @@ static u16 xemaclite_recv_data(struct net_local *drvdata, u8 *data)
- 	addr = (drvdata->base_addr + drvdata->next_rx_buf_to_use);
- 
- 	/* Verify which buffer has valid data */
--	reg_data = in_be32(addr + XEL_RSR_OFFSET);
-+	reg_data = __raw_readl(addr + XEL_RSR_OFFSET);
- 
- 	if ((reg_data & XEL_RSR_RECV_DONE_MASK) == XEL_RSR_RECV_DONE_MASK) {
- 		if (drvdata->rx_ping_pong != 0)
-@@ -425,14 +424,14 @@ static u16 xemaclite_recv_data(struct net_local *drvdata, u8 *data)
- 			return 0;	/* No data was available */
- 
- 		/* Verify that buffer has valid data */
--		reg_data = in_be32(addr + XEL_RSR_OFFSET);
-+		reg_data = __raw_readl(addr + XEL_RSR_OFFSET);
- 		if ((reg_data & XEL_RSR_RECV_DONE_MASK) !=
- 		     XEL_RSR_RECV_DONE_MASK)
- 			return 0;	/* No data was available */
- 	}
- 
- 	/* Get the protocol type of the ethernet frame that arrived */
--	proto_type = ((ntohl(in_be32(addr + XEL_HEADER_OFFSET +
-+	proto_type = ((ntohl(__raw_readl(addr + XEL_HEADER_OFFSET +
- 			XEL_RXBUFF_OFFSET)) >> XEL_HEADER_SHIFT) &
- 			XEL_RPLR_LENGTH_MASK);
- 
-@@ -441,7 +440,7 @@ static u16 xemaclite_recv_data(struct net_local *drvdata, u8 *data)
- 	if (proto_type > (ETH_FRAME_LEN + ETH_FCS_LEN)) {
- 
- 		if (proto_type == ETH_P_IP) {
--			length = ((ntohl(in_be32(addr +
-+			length = ((ntohl(__raw_readl(addr +
- 					XEL_HEADER_IP_LENGTH_OFFSET +
- 					XEL_RXBUFF_OFFSET)) >>
- 					XEL_HEADER_SHIFT) &
-@@ -463,9 +462,9 @@ static u16 xemaclite_recv_data(struct net_local *drvdata, u8 *data)
- 				data, length);
- 
- 	/* Acknowledge the frame */
--	reg_data = in_be32(addr + XEL_RSR_OFFSET);
-+	reg_data = __raw_readl(addr + XEL_RSR_OFFSET);
- 	reg_data &= ~XEL_RSR_RECV_DONE_MASK;
--	out_be32(addr + XEL_RSR_OFFSET, reg_data);
-+	__raw_writel(reg_data, addr + XEL_RSR_OFFSET);
- 
- 	return length;
- }
-@@ -492,14 +491,14 @@ static void xemaclite_update_address(struct net_local *drvdata,
- 
- 	xemaclite_aligned_write(address_ptr, (u32 __force *) addr, ETH_ALEN);
- 
--	out_be32(addr + XEL_TPLR_OFFSET, ETH_ALEN);
-+	__raw_writel(ETH_ALEN, addr + XEL_TPLR_OFFSET);
- 
- 	/* Update the MAC address in the EmacLite */
--	reg_data = in_be32(addr + XEL_TSR_OFFSET);
--	out_be32(addr + XEL_TSR_OFFSET, reg_data | XEL_TSR_PROG_MAC_ADDR);
-+	reg_data = __raw_readl(addr + XEL_TSR_OFFSET);
-+	__raw_writel(reg_data | XEL_TSR_PROG_MAC_ADDR, addr + XEL_TSR_OFFSET);
- 
- 	/* Wait for EmacLite to finish with the MAC address update */
--	while ((in_be32(addr + XEL_TSR_OFFSET) &
-+	while ((__raw_readl(addr + XEL_TSR_OFFSET) &
- 		XEL_TSR_PROG_MAC_ADDR) != 0)
- 		;
- }
-@@ -669,31 +668,32 @@ static irqreturn_t xemaclite_interrupt(int irq, void *dev_id)
- 	u32 tx_status;
- 
- 	/* Check if there is Rx Data available */
--	if ((in_be32(base_addr + XEL_RSR_OFFSET) & XEL_RSR_RECV_DONE_MASK) ||
--			(in_be32(base_addr + XEL_BUFFER_OFFSET + XEL_RSR_OFFSET)
-+	if ((__raw_readl(base_addr + XEL_RSR_OFFSET) &
-+			 XEL_RSR_RECV_DONE_MASK) ||
-+	    (__raw_readl(base_addr + XEL_BUFFER_OFFSET + XEL_RSR_OFFSET)
- 			 & XEL_RSR_RECV_DONE_MASK))
- 
- 		xemaclite_rx_handler(dev);
- 
- 	/* Check if the Transmission for the first buffer is completed */
--	tx_status = in_be32(base_addr + XEL_TSR_OFFSET);
-+	tx_status = __raw_readl(base_addr + XEL_TSR_OFFSET);
- 	if (((tx_status & XEL_TSR_XMIT_BUSY_MASK) == 0) &&
- 		(tx_status & XEL_TSR_XMIT_ACTIVE_MASK) != 0) {
- 
- 		tx_status &= ~XEL_TSR_XMIT_ACTIVE_MASK;
--		out_be32(base_addr + XEL_TSR_OFFSET, tx_status);
-+		__raw_writel(tx_status, base_addr + XEL_TSR_OFFSET);
- 
- 		tx_complete = true;
- 	}
- 
- 	/* Check if the Transmission for the second buffer is completed */
--	tx_status = in_be32(base_addr + XEL_BUFFER_OFFSET + XEL_TSR_OFFSET);
-+	tx_status = __raw_readl(base_addr + XEL_BUFFER_OFFSET + XEL_TSR_OFFSET);
- 	if (((tx_status & XEL_TSR_XMIT_BUSY_MASK) == 0) &&
- 		(tx_status & XEL_TSR_XMIT_ACTIVE_MASK) != 0) {
- 
- 		tx_status &= ~XEL_TSR_XMIT_ACTIVE_MASK;
--		out_be32(base_addr + XEL_BUFFER_OFFSET + XEL_TSR_OFFSET,
--			 tx_status);
-+		__raw_writel(tx_status, base_addr + XEL_BUFFER_OFFSET +
-+			     XEL_TSR_OFFSET);
- 
- 		tx_complete = true;
- 	}
-@@ -726,7 +726,7 @@ static int xemaclite_mdio_wait(struct net_local *lp)
- 	/* wait for the MDIO interface to not be busy or timeout
- 	   after some time.
- 	*/
--	while (in_be32(lp->base_addr + XEL_MDIOCTRL_OFFSET) &
-+	while (__raw_readl(lp->base_addr + XEL_MDIOCTRL_OFFSET) &
- 			XEL_MDIOCTRL_MDIOSTS_MASK) {
- 		if (end - jiffies <= 0) {
- 			WARN_ON(1);
-@@ -762,17 +762,17 @@ static int xemaclite_mdio_read(struct mii_bus *bus, int phy_id, int reg)
- 	 * MDIO Address register. Set the Status bit in the MDIO Control
- 	 * register to start a MDIO read transaction.
- 	 */
--	ctrl_reg = in_be32(lp->base_addr + XEL_MDIOCTRL_OFFSET);
--	out_be32(lp->base_addr + XEL_MDIOADDR_OFFSET,
--		 XEL_MDIOADDR_OP_MASK |
--		 ((phy_id << XEL_MDIOADDR_PHYADR_SHIFT) | reg));
--	out_be32(lp->base_addr + XEL_MDIOCTRL_OFFSET,
--		 ctrl_reg | XEL_MDIOCTRL_MDIOSTS_MASK);
-+	ctrl_reg = __raw_readl(lp->base_addr + XEL_MDIOCTRL_OFFSET);
-+	__raw_writel(XEL_MDIOADDR_OP_MASK |
-+		     ((phy_id << XEL_MDIOADDR_PHYADR_SHIFT) | reg),
-+		     lp->base_addr + XEL_MDIOADDR_OFFSET);
-+	__raw_writel(ctrl_reg | XEL_MDIOCTRL_MDIOSTS_MASK,
-+		     lp->base_addr + XEL_MDIOCTRL_OFFSET);
- 
- 	if (xemaclite_mdio_wait(lp))
- 		return -ETIMEDOUT;
- 
--	rc = in_be32(lp->base_addr + XEL_MDIORD_OFFSET);
-+	rc = __raw_readl(lp->base_addr + XEL_MDIORD_OFFSET);
- 
- 	dev_dbg(&lp->ndev->dev,
- 		"xemaclite_mdio_read(phy_id=%i, reg=%x) == %x\n",
-@@ -809,13 +809,13 @@ static int xemaclite_mdio_write(struct mii_bus *bus, int phy_id, int reg,
- 	 * Data register. Finally, set the Status bit in the MDIO Control
- 	 * register to start a MDIO write transaction.
- 	 */
--	ctrl_reg = in_be32(lp->base_addr + XEL_MDIOCTRL_OFFSET);
--	out_be32(lp->base_addr + XEL_MDIOADDR_OFFSET,
--		 ~XEL_MDIOADDR_OP_MASK &
--		 ((phy_id << XEL_MDIOADDR_PHYADR_SHIFT) | reg));
--	out_be32(lp->base_addr + XEL_MDIOWR_OFFSET, val);
--	out_be32(lp->base_addr + XEL_MDIOCTRL_OFFSET,
--		 ctrl_reg | XEL_MDIOCTRL_MDIOSTS_MASK);
-+	ctrl_reg = __raw_readl(lp->base_addr + XEL_MDIOCTRL_OFFSET);
-+	__raw_writel(~XEL_MDIOADDR_OP_MASK &
-+		     ((phy_id << XEL_MDIOADDR_PHYADR_SHIFT) | reg),
-+		     lp->base_addr + XEL_MDIOADDR_OFFSET);
-+	__raw_writel(val, lp->base_addr + XEL_MDIOWR_OFFSET);
-+	__raw_writel(ctrl_reg | XEL_MDIOCTRL_MDIOSTS_MASK,
-+		     lp->base_addr + XEL_MDIOCTRL_OFFSET);
- 
- 	return 0;
- }
-@@ -872,8 +872,8 @@ static int xemaclite_mdio_setup(struct net_local *lp, struct device *dev)
- 	/* Enable the MDIO bus by asserting the enable bit in MDIO Control
- 	 * register.
- 	 */
--	out_be32(lp->base_addr + XEL_MDIOCTRL_OFFSET,
--		 XEL_MDIOCTRL_MDIOEN_MASK);
-+	__raw_writel(XEL_MDIOCTRL_MDIOEN_MASK,
-+		     lp->base_addr + XEL_MDIOCTRL_OFFSET);
- 
- 	bus = mdiobus_alloc();
- 	if (!bus) {
-@@ -1198,8 +1198,8 @@ static int xemaclite_of_probe(struct platform_device *ofdev)
- 		dev_warn(dev, "No MAC address found\n");
- 
- 	/* Clear the Tx CSR's in case this is a restart */
--	out_be32(lp->base_addr + XEL_TSR_OFFSET, 0);
--	out_be32(lp->base_addr + XEL_BUFFER_OFFSET + XEL_TSR_OFFSET, 0);
-+	__raw_writel(0, lp->base_addr + XEL_TSR_OFFSET);
-+	__raw_writel(0, lp->base_addr + XEL_BUFFER_OFFSET + XEL_TSR_OFFSET);
- 
- 	/* Set the MAC address in the EmacLite device */
- 	xemaclite_update_address(lp, ndev->dev_addr);
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0080-net-emaclite-Update-driver-header.patch b/patches.zynq/0080-net-emaclite-Update-driver-header.patch
deleted file mode 100644
index 03c75054d5350..0000000000000
--- a/patches.zynq/0080-net-emaclite-Update-driver-header.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From 2dab913ba0a6e9d1db99eee05f0f4fb87f6be856 Mon Sep 17 00:00:00 2001
-From: Michal Simek <michal.simek@xilinx.com>
-Date: Thu, 30 May 2013 00:28:08 +0000
-Subject: net: emaclite: Update driver header
-
-Correct email address and years.
-
-Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit 9e7c414350a6fa4e5f9b7e5f7e074fa75ba850c3)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/net/ethernet/xilinx/xilinx_emaclite.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/net/ethernet/xilinx/xilinx_emaclite.c b/drivers/net/ethernet/xilinx/xilinx_emaclite.c
-index 476ce5bb385f..db16a063d2db 100644
---- a/drivers/net/ethernet/xilinx/xilinx_emaclite.c
-+++ b/drivers/net/ethernet/xilinx/xilinx_emaclite.c
-@@ -2,9 +2,9 @@
-  * Xilinx EmacLite Linux driver for the Xilinx Ethernet MAC Lite device.
-  *
-  * This is a new flat driver which is based on the original emac_lite
-- * driver from John Williams <john.williams@petalogix.com>.
-+ * driver from John Williams <john.williams@xilinx.com>.
-  *
-- * 2007-2009 (c) Xilinx, Inc.
-+ * 2007 - 2013 (c) Xilinx, Inc.
-  *
-  * This program is free software; you can redistribute it and/or modify it
-  * under the terms of the GNU General Public License as published by the
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0081-net-emaclite-Fix-typo-in-error-message.patch b/patches.zynq/0081-net-emaclite-Fix-typo-in-error-message.patch
deleted file mode 100644
index 52a2c7b291541..0000000000000
--- a/patches.zynq/0081-net-emaclite-Fix-typo-in-error-message.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From be3069672ca5b9e0bf0e091e02a4e23e1c8b912a Mon Sep 17 00:00:00 2001
-From: "Jens Renner \\\\\\\\(EFE\\\\\\\\)" <renner@efe-gmbh.de>
-Date: Sun, 2 Jun 2013 05:19:06 +0000
-Subject: net: emaclite: Fix typo in error message
-
-s/allocal/allocate/
-
-Signed-off-by: Jens Renner <renner@efe-gmbh.de>
-Acked-by: Michal Simek <monstr@monstr.eu>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit f1362e378ab27844f968f1f390e33b6c77861ec0)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/net/ethernet/xilinx/xilinx_emaclite.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/net/ethernet/xilinx/xilinx_emaclite.c b/drivers/net/ethernet/xilinx/xilinx_emaclite.c
-index db16a063d2db..277ed5df8b51 100644
---- a/drivers/net/ethernet/xilinx/xilinx_emaclite.c
-+++ b/drivers/net/ethernet/xilinx/xilinx_emaclite.c
-@@ -877,7 +877,7 @@ static int xemaclite_mdio_setup(struct net_local *lp, struct device *dev)
- 
- 	bus = mdiobus_alloc();
- 	if (!bus) {
--		dev_err(dev, "Failed to allocal mdiobus\n");
-+		dev_err(dev, "Failed to allocate mdiobus\n");
- 		return -ENOMEM;
- 	}
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0082-net-emaclite-Use-platform-resource-table.patch b/patches.zynq/0082-net-emaclite-Use-platform-resource-table.patch
deleted file mode 100644
index 7b579fb373c0e..0000000000000
--- a/patches.zynq/0082-net-emaclite-Use-platform-resource-table.patch
+++ /dev/null
@@ -1,153 +0,0 @@
-From 84657794da4cb1c84d487de1612a61feee13da4a Mon Sep 17 00:00:00 2001
-From: Michal Simek <michal.simek@xilinx.com>
-Date: Tue, 4 Jun 2013 00:03:27 +0000
-Subject: net: emaclite: Use platform resource table
-
-Read data directly from platform recource table
-and do not use of_irq_to_resource().
-Also use devm_request_and_ioremap() for probe
-functions simplification.
-
-Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-Acked-by: Arnd Bergmann <arnd@arndb.de>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit 7a3e2585f2fd543ac7284a1f09641628f730f720)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/net/ethernet/xilinx/xilinx_emaclite.c | 67 +++++++++------------------
- 1 file changed, 22 insertions(+), 45 deletions(-)
-
-diff --git a/drivers/net/ethernet/xilinx/xilinx_emaclite.c b/drivers/net/ethernet/xilinx/xilinx_emaclite.c
-index 277ed5df8b51..1cd131bde680 100644
---- a/drivers/net/ethernet/xilinx/xilinx_emaclite.c
-+++ b/drivers/net/ethernet/xilinx/xilinx_emaclite.c
-@@ -1075,13 +1075,14 @@ static int xemaclite_send(struct sk_buff *orig_skb, struct net_device *dev)
-  * This function un maps the IO region of the Emaclite device and frees the net
-  * device.
-  */
--static void xemaclite_remove_ndev(struct net_device *ndev)
-+static void xemaclite_remove_ndev(struct net_device *ndev,
-+				  struct platform_device *pdev)
- {
- 	if (ndev) {
- 		struct net_local *lp = netdev_priv(ndev);
- 
- 		if (lp->base_addr)
--			iounmap((void __iomem __force *) (lp->base_addr));
-+			devm_iounmap(&pdev->dev, lp->base_addr);
- 		free_netdev(ndev);
- 	}
- }
-@@ -1127,8 +1128,7 @@ static struct net_device_ops xemaclite_netdev_ops;
-  */
- static int xemaclite_of_probe(struct platform_device *ofdev)
- {
--	struct resource r_irq; /* Interrupt resources */
--	struct resource r_mem; /* IO mem resources */
-+	struct resource *res;
- 	struct net_device *ndev = NULL;
- 	struct net_local *lp = NULL;
- 	struct device *dev = &ofdev->dev;
-@@ -1138,20 +1138,6 @@ static int xemaclite_of_probe(struct platform_device *ofdev)
- 
- 	dev_info(dev, "Device Tree Probing\n");
- 
--	/* Get iospace for the device */
--	rc = of_address_to_resource(ofdev->dev.of_node, 0, &r_mem);
--	if (rc) {
--		dev_err(dev, "invalid address\n");
--		return rc;
--	}
--
--	/* Get IRQ for the device */
--	rc = of_irq_to_resource(ofdev->dev.of_node, 0, &r_irq);
--	if (!rc) {
--		dev_err(dev, "no IRQ found\n");
--		return rc;
--	}
--
- 	/* Create an ethernet device instance */
- 	ndev = alloc_etherdev(sizeof(struct net_local));
- 	if (!ndev)
-@@ -1160,29 +1146,25 @@ static int xemaclite_of_probe(struct platform_device *ofdev)
- 	dev_set_drvdata(dev, ndev);
- 	SET_NETDEV_DEV(ndev, &ofdev->dev);
- 
--	ndev->irq = r_irq.start;
--	ndev->mem_start = r_mem.start;
--	ndev->mem_end = r_mem.end;
--
- 	lp = netdev_priv(ndev);
- 	lp->ndev = ndev;
- 
--	if (!request_mem_region(ndev->mem_start,
--				ndev->mem_end - ndev->mem_start + 1,
--				DRIVER_NAME)) {
--		dev_err(dev, "Couldn't lock memory region at %p\n",
--			(void *)ndev->mem_start);
--		rc = -EBUSY;
--		goto error2;
-+	/* Get IRQ for the device */
-+	res = platform_get_resource(ofdev, IORESOURCE_IRQ, 0);
-+	if (!res) {
-+		dev_err(dev, "no IRQ found\n");
-+		goto error;
- 	}
- 
--	/* Get the virtual base address for the device */
--	lp->base_addr = ioremap(r_mem.start, resource_size(&r_mem));
--	if (NULL == lp->base_addr) {
--		dev_err(dev, "EmacLite: Could not allocate iomem\n");
--		rc = -EIO;
--		goto error1;
--	}
-+	ndev->irq = res->start;
-+
-+	res = platform_get_resource(ofdev, IORESOURCE_MEM, 0);
-+	lp->base_addr = devm_request_and_ioremap(&ofdev->dev, res);
-+	if (!lp->base_addr)
-+		goto error;
-+
-+	ndev->mem_start = res->start;
-+	ndev->mem_end = res->end;
- 
- 	spin_lock_init(&lp->reset_lock);
- 	lp->next_tx_buf_to_use = 0x0;
-@@ -1220,7 +1202,7 @@ static int xemaclite_of_probe(struct platform_device *ofdev)
- 	if (rc) {
- 		dev_err(dev,
- 			"Cannot register network device, aborting\n");
--		goto error1;
-+		goto error;
- 	}
- 
- 	dev_info(dev,
-@@ -1229,11 +1211,8 @@ static int xemaclite_of_probe(struct platform_device *ofdev)
- 		 (unsigned int __force)lp->base_addr, ndev->irq);
- 	return 0;
- 
--error1:
--	release_mem_region(ndev->mem_start, resource_size(&r_mem));
--
--error2:
--	xemaclite_remove_ndev(ndev);
-+error:
-+	xemaclite_remove_ndev(ndev, ofdev);
- 	return rc;
- }
- 
-@@ -1268,9 +1247,7 @@ static int xemaclite_of_remove(struct platform_device *of_dev)
- 		of_node_put(lp->phy_node);
- 	lp->phy_node = NULL;
- 
--	release_mem_region(ndev->mem_start, ndev->mem_end-ndev->mem_start + 1);
--
--	xemaclite_remove_ndev(ndev);
-+	xemaclite_remove_ndev(ndev, of_dev);
- 	dev_set_drvdata(dev, NULL);
- 
- 	return 0;
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0083-net-emaclite-Convert-to-use-devm_ioremap_resource.patch b/patches.zynq/0083-net-emaclite-Convert-to-use-devm_ioremap_resource.patch
deleted file mode 100644
index 22b3288c3bf76..0000000000000
--- a/patches.zynq/0083-net-emaclite-Convert-to-use-devm_ioremap_resource.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From 6c30c07d8845bf77822a34b374dd2315751f9d64 Mon Sep 17 00:00:00 2001
-From: Tushar Behera <tushar.behera@linaro.org>
-Date: Mon, 10 Jun 2013 17:05:06 +0530
-Subject: net: emaclite: Convert to use devm_ioremap_resource
-
-Commit 75096579c3ac ("lib: devres: Introduce devm_ioremap_resource()")
-introduced devm_ioremap_resource() and deprecated the use of
-devm_request_and_ioremap().
-
-Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
-CC: netdev@vger.kernel.org
-CC: "David S. Miller" <davem@davemloft.net>
-CC: Michal Simek <michal.simek@xilinx.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit eed5d29d7818cc7a84e60123555cae154e5b4a73)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/net/ethernet/xilinx/xilinx_emaclite.c | 6 ++++--
- 1 file changed, 4 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/net/ethernet/xilinx/xilinx_emaclite.c b/drivers/net/ethernet/xilinx/xilinx_emaclite.c
-index 1cd131bde680..fd4dbdae5331 100644
---- a/drivers/net/ethernet/xilinx/xilinx_emaclite.c
-+++ b/drivers/net/ethernet/xilinx/xilinx_emaclite.c
-@@ -1159,9 +1159,11 @@ static int xemaclite_of_probe(struct platform_device *ofdev)
- 	ndev->irq = res->start;
- 
- 	res = platform_get_resource(ofdev, IORESOURCE_MEM, 0);
--	lp->base_addr = devm_request_and_ioremap(&ofdev->dev, res);
--	if (!lp->base_addr)
-+	lp->base_addr = devm_ioremap_resource(&ofdev->dev, res);
-+	if (IS_ERR(lp->base_addr)) {
-+		rc = PTR_ERR(lp->base_addr);
- 		goto error;
-+	}
- 
- 	ndev->mem_start = res->start;
- 	ndev->mem_end = res->end;
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0084-net-xilinx_emaclite-use-platform_-get-set-_drvdata.patch b/patches.zynq/0084-net-xilinx_emaclite-use-platform_-get-set-_drvdata.patch
deleted file mode 100644
index a70bb812bba88..0000000000000
--- a/patches.zynq/0084-net-xilinx_emaclite-use-platform_-get-set-_drvdata.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From faaca44d1439cafd192cddd3697a26f9c447e459 Mon Sep 17 00:00:00 2001
-From: Libo Chen <clbchenlibo.chen@huawei.com>
-Date: Mon, 19 Aug 2013 20:00:25 +0800
-Subject: net: xilinx_emaclite: use platform_{get,set}_drvdata()
-
-Use the wrapper functions for getting and setting the driver data using
-platform_device instead of using dev_{get,set}_drvdata() with &of_dev->dev,
-so we can directly pass a struct platform_device.
-
-Signed-off-by: Libo Chen <libo.chen@huawei.com>
-Acked-by: Michal Simek <monstr@monstr.eu>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit 34e0184d98bd3a0e19b1d55bfdbd2186bfe5eca4)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/net/ethernet/xilinx/xilinx_emaclite.c | 3 +--
- 1 file changed, 1 insertion(+), 2 deletions(-)
-
-diff --git a/drivers/net/ethernet/xilinx/xilinx_emaclite.c b/drivers/net/ethernet/xilinx/xilinx_emaclite.c
-index fd4dbdae5331..7c1ccbcb47be 100644
---- a/drivers/net/ethernet/xilinx/xilinx_emaclite.c
-+++ b/drivers/net/ethernet/xilinx/xilinx_emaclite.c
-@@ -1230,8 +1230,7 @@ error:
-  */
- static int xemaclite_of_remove(struct platform_device *of_dev)
- {
--	struct device *dev = &of_dev->dev;
--	struct net_device *ndev = dev_get_drvdata(dev);
-+	struct net_device *ndev = platform_get_drvdata(of_dev);
- 
- 	struct net_local *lp = netdev_priv(ndev);
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0085-net-xilinx_emaclite-remove-unnecessary-dev_set_drvda.patch b/patches.zynq/0085-net-xilinx_emaclite-remove-unnecessary-dev_set_drvda.patch
deleted file mode 100644
index df2de0fab6f43..0000000000000
--- a/patches.zynq/0085-net-xilinx_emaclite-remove-unnecessary-dev_set_drvda.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From d86c156dc2af3f3ca187be9b613a594b80b0c662 Mon Sep 17 00:00:00 2001
-From: Libo Chen <libo.chen@huawei.com>
-Date: Wed, 21 Aug 2013 15:02:36 +0800
-Subject: net: xilinx_emaclite: remove unnecessary dev_set_drvdata()
-
-Unnecessary dev_set_drvdata() is removed, because the driver core
-clears the driver data to NULL after device_release or on probe failure.
-
-Signed-off-by: Libo Chen <libo.chen@huawei.com>
-Acked-by: Michal Simek <monstr@monstr.eu>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit 0c671dc0c4979e69e0b342c8f4e80690660929db)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/net/ethernet/xilinx/xilinx_emaclite.c | 1 -
- 1 file changed, 1 deletion(-)
-
-diff --git a/drivers/net/ethernet/xilinx/xilinx_emaclite.c b/drivers/net/ethernet/xilinx/xilinx_emaclite.c
-index 7c1ccbcb47be..4c619ea5189f 100644
---- a/drivers/net/ethernet/xilinx/xilinx_emaclite.c
-+++ b/drivers/net/ethernet/xilinx/xilinx_emaclite.c
-@@ -1249,7 +1249,6 @@ static int xemaclite_of_remove(struct platform_device *of_dev)
- 	lp->phy_node = NULL;
- 
- 	xemaclite_remove_ndev(ndev, of_dev);
--	dev_set_drvdata(dev, NULL);
- 
- 	return 0;
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0086-net-emaclite-Not-necessary-to-call-devm_iounmap.patch b/patches.zynq/0086-net-emaclite-Not-necessary-to-call-devm_iounmap.patch
deleted file mode 100644
index adf93d97f2185..0000000000000
--- a/patches.zynq/0086-net-emaclite-Not-necessary-to-call-devm_iounmap.patch
+++ /dev/null
@@ -1,57 +0,0 @@
-From d06fa8fb32fbcea7f449009d6907fe860a7c9148 Mon Sep 17 00:00:00 2001
-From: Michal Simek <michal.simek@xilinx.com>
-Date: Thu, 12 Sep 2013 09:05:10 +0200
-Subject: net: emaclite: Not necessary to call devm_iounmap
-
-devm_iounmap is called automatically.
-
-Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit 37c67c6e2bb5b8f287d92e543acb0f8fa41af0e9)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/net/ethernet/xilinx/xilinx_emaclite.c | 11 +++--------
- 1 file changed, 3 insertions(+), 8 deletions(-)
-
-diff --git a/drivers/net/ethernet/xilinx/xilinx_emaclite.c b/drivers/net/ethernet/xilinx/xilinx_emaclite.c
-index 4c619ea5189f..de3909878f42 100644
---- a/drivers/net/ethernet/xilinx/xilinx_emaclite.c
-+++ b/drivers/net/ethernet/xilinx/xilinx_emaclite.c
-@@ -1075,14 +1075,9 @@ static int xemaclite_send(struct sk_buff *orig_skb, struct net_device *dev)
-  * This function un maps the IO region of the Emaclite device and frees the net
-  * device.
-  */
--static void xemaclite_remove_ndev(struct net_device *ndev,
--				  struct platform_device *pdev)
-+static void xemaclite_remove_ndev(struct net_device *ndev)
- {
- 	if (ndev) {
--		struct net_local *lp = netdev_priv(ndev);
--
--		if (lp->base_addr)
--			devm_iounmap(&pdev->dev, lp->base_addr);
- 		free_netdev(ndev);
- 	}
- }
-@@ -1214,7 +1209,7 @@ static int xemaclite_of_probe(struct platform_device *ofdev)
- 	return 0;
- 
- error:
--	xemaclite_remove_ndev(ndev, ofdev);
-+	xemaclite_remove_ndev(ndev);
- 	return rc;
- }
- 
-@@ -1248,7 +1243,7 @@ static int xemaclite_of_remove(struct platform_device *of_dev)
- 		of_node_put(lp->phy_node);
- 	lp->phy_node = NULL;
- 
--	xemaclite_remove_ndev(ndev, of_dev);
-+	xemaclite_remove_ndev(ndev);
- 
- 	return 0;
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0087-net-emaclite-Code-cleanup.patch b/patches.zynq/0087-net-emaclite-Code-cleanup.patch
deleted file mode 100644
index fc80008384130..0000000000000
--- a/patches.zynq/0087-net-emaclite-Code-cleanup.patch
+++ /dev/null
@@ -1,81 +0,0 @@
-From 719ac1a1d2302ca98fa5552738915e7556e8e1df Mon Sep 17 00:00:00 2001
-From: Michal Simek <michal.simek@xilinx.com>
-Date: Thu, 12 Sep 2013 09:05:11 +0200
-Subject: net: emaclite: Code cleanup
-
-No function changes (s/\ \t/\t/g)
-
-Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit cd738c4edeb30507789bcd69ca25c4c569c60971)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/net/ethernet/xilinx/xilinx_emaclite.c | 28 +++++++++++++--------------
- 1 file changed, 14 insertions(+), 14 deletions(-)
-
-diff --git a/drivers/net/ethernet/xilinx/xilinx_emaclite.c b/drivers/net/ethernet/xilinx/xilinx_emaclite.c
-index de3909878f42..80dd40417850 100644
---- a/drivers/net/ethernet/xilinx/xilinx_emaclite.c
-+++ b/drivers/net/ethernet/xilinx/xilinx_emaclite.c
-@@ -31,7 +31,7 @@
- #define DRIVER_NAME "xilinx_emaclite"
- 
- /* Register offsets for the EmacLite Core */
--#define XEL_TXBUFF_OFFSET 	0x0		/* Transmit Buffer */
-+#define XEL_TXBUFF_OFFSET	0x0		/* Transmit Buffer */
- #define XEL_MDIOADDR_OFFSET	0x07E4		/* MDIO Address Register */
- #define XEL_MDIOWR_OFFSET	0x07E8		/* MDIO Write Data Register */
- #define XEL_MDIORD_OFFSET	0x07EC		/* MDIO Read Data Register */
-@@ -63,13 +63,13 @@
- #define XEL_MDIOCTRL_MDIOEN_MASK  0x00000008	/* MDIO Enable */
- 
- /* Global Interrupt Enable Register (GIER) Bit Masks */
--#define XEL_GIER_GIE_MASK	0x80000000 	/* Global Enable */
-+#define XEL_GIER_GIE_MASK	0x80000000	/* Global Enable */
- 
- /* Transmit Status Register (TSR) Bit Masks */
--#define XEL_TSR_XMIT_BUSY_MASK	 0x00000001 	/* Tx complete */
--#define XEL_TSR_PROGRAM_MASK	 0x00000002 	/* Program the MAC address */
--#define XEL_TSR_XMIT_IE_MASK	 0x00000008 	/* Tx interrupt enable bit */
--#define XEL_TSR_XMIT_ACTIVE_MASK 0x80000000 	/* Buffer is active, SW bit
-+#define XEL_TSR_XMIT_BUSY_MASK	 0x00000001	/* Tx complete */
-+#define XEL_TSR_PROGRAM_MASK	 0x00000002	/* Program the MAC address */
-+#define XEL_TSR_XMIT_IE_MASK	 0x00000008	/* Tx interrupt enable bit */
-+#define XEL_TSR_XMIT_ACTIVE_MASK 0x80000000	/* Buffer is active, SW bit
- 						 * only. This is not documented
- 						 * in the HW spec */
- 
-@@ -77,21 +77,21 @@
- #define XEL_TSR_PROG_MAC_ADDR	(XEL_TSR_XMIT_BUSY_MASK | XEL_TSR_PROGRAM_MASK)
- 
- /* Receive Status Register (RSR) */
--#define XEL_RSR_RECV_DONE_MASK	0x00000001 	/* Rx complete */
--#define XEL_RSR_RECV_IE_MASK	0x00000008 	/* Rx interrupt enable bit */
-+#define XEL_RSR_RECV_DONE_MASK	0x00000001	/* Rx complete */
-+#define XEL_RSR_RECV_IE_MASK	0x00000008	/* Rx interrupt enable bit */
- 
- /* Transmit Packet Length Register (TPLR) */
--#define XEL_TPLR_LENGTH_MASK	0x0000FFFF 	/* Tx packet length */
-+#define XEL_TPLR_LENGTH_MASK	0x0000FFFF	/* Tx packet length */
- 
- /* Receive Packet Length Register (RPLR) */
--#define XEL_RPLR_LENGTH_MASK	0x0000FFFF 	/* Rx packet length */
-+#define XEL_RPLR_LENGTH_MASK	0x0000FFFF	/* Rx packet length */
- 
--#define XEL_HEADER_OFFSET	12 		/* Offset to length field */
--#define XEL_HEADER_SHIFT	16 		/* Shift value for length */
-+#define XEL_HEADER_OFFSET	12		/* Offset to length field */
-+#define XEL_HEADER_SHIFT	16		/* Shift value for length */
- 
- /* General Ethernet Definitions */
--#define XEL_ARP_PACKET_SIZE		28 	/* Max ARP packet size */
--#define XEL_HEADER_IP_LENGTH_OFFSET	16 	/* IP Length Offset */
-+#define XEL_ARP_PACKET_SIZE		28	/* Max ARP packet size */
-+#define XEL_HEADER_IP_LENGTH_OFFSET	16	/* IP Length Offset */
- 
- 
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0088-net-drivers-net-Miscellaneous-conversions-to-ETH_ALE.patch b/patches.zynq/0088-net-drivers-net-Miscellaneous-conversions-to-ETH_ALE.patch
deleted file mode 100644
index 4a7c687facd28..0000000000000
--- a/patches.zynq/0088-net-drivers-net-Miscellaneous-conversions-to-ETH_ALE.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 2adf21bf924409584d87c91c14352a17ffbe3cec Mon Sep 17 00:00:00 2001
-From: Joe Perches <joe@perches.com>
-Date: Tue, 1 Oct 2013 19:04:40 -0700
-Subject: net:drivers/net: Miscellaneous conversions to ETH_ALEN
-
-Convert the memset/memcpy uses of 6 to ETH_ALEN
-where appropriate.
-
-Also convert some struct definitions and u8 array
-declarations of [6] to ETH_ALEN.
-
-Signed-off-by: Joe Perches <joe@perches.com>
-Acked-by: Arend van Spriel <arend@broadcom.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit d458cdf712e0c671e8e819abb16ecd6e44f9daec)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/net/ethernet/xilinx/xilinx_emaclite.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/net/ethernet/xilinx/xilinx_emaclite.c b/drivers/net/ethernet/xilinx/xilinx_emaclite.c
-index 80dd40417850..74234a51c851 100644
---- a/drivers/net/ethernet/xilinx/xilinx_emaclite.c
-+++ b/drivers/net/ethernet/xilinx/xilinx_emaclite.c
-@@ -1172,7 +1172,7 @@ static int xemaclite_of_probe(struct platform_device *ofdev)
- 
- 	if (mac_address)
- 		/* Set the MAC address. */
--		memcpy(ndev->dev_addr, mac_address, 6);
-+		memcpy(ndev->dev_addr, mac_address, ETH_ALEN);
- 	else
- 		dev_warn(dev, "No MAC address found\n");
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0089-net-xilinx-fix-memleak.patch b/patches.zynq/0089-net-xilinx-fix-memleak.patch
deleted file mode 100644
index e15b595c0050a..0000000000000
--- a/patches.zynq/0089-net-xilinx-fix-memleak.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From c5edcd0ec952e1793f75641ab413d3c06f7426cc Mon Sep 17 00:00:00 2001
-From: Libo Chen <clbchenlibo.chen@huawei.com>
-Date: Mon, 26 Aug 2013 11:30:55 +0800
-Subject: net: xilinx: fix memleak
-
-decrease device_node refcount np1 in err case.
-
-Signed-off-by: Libo Chen <libo.chen@huawei.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit 282a1dffc1b9976cdf1b0eea3f6f68fda23a7c7e)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/net/ethernet/xilinx/xilinx_axienet_mdio.c | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet_mdio.c b/drivers/net/ethernet/xilinx/xilinx_axienet_mdio.c
-index e90e1f46121e..64b4639f43b6 100644
---- a/drivers/net/ethernet/xilinx/xilinx_axienet_mdio.c
-+++ b/drivers/net/ethernet/xilinx/xilinx_axienet_mdio.c
-@@ -175,6 +175,7 @@ int axienet_mdio_setup(struct axienet_local *lp, struct device_node *np)
- 		printk(KERN_WARNING "Setting MDIO clock divisor to "
- 		       "default %d\n", DEFAULT_CLOCK_DIVISOR);
- 		clk_div = DEFAULT_CLOCK_DIVISOR;
-+		of_node_put(np1);
- 		goto issue;
- 	}
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0090-net-emaclite-Enable-emaclite-for-Xilinx-Arm-Zynq-pla.patch b/patches.zynq/0090-net-emaclite-Enable-emaclite-for-Xilinx-Arm-Zynq-pla.patch
deleted file mode 100644
index cd2f8e09bbb6c..0000000000000
--- a/patches.zynq/0090-net-emaclite-Enable-emaclite-for-Xilinx-Arm-Zynq-pla.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From 718522d276fb1e1d51825b2e4bc4f95ad66aa486 Mon Sep 17 00:00:00 2001
-From: Michal Simek <michal.simek@xilinx.com>
-Date: Thu, 30 May 2013 00:28:07 +0000
-Subject: net: emaclite: Enable emaclite for Xilinx Arm Zynq platform
-
-Enable emaclite for Xilinx ARM Zynq platform.
-
-Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
-(cherry picked from commit 1156ee88dd3992bbacd5e4c659530f9d18c07378)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/net/ethernet/xilinx/Kconfig | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/net/ethernet/xilinx/Kconfig b/drivers/net/ethernet/xilinx/Kconfig
-index 122d60c0481b..7b90a5eba099 100644
---- a/drivers/net/ethernet/xilinx/Kconfig
-+++ b/drivers/net/ethernet/xilinx/Kconfig
-@@ -5,7 +5,7 @@
- config NET_VENDOR_XILINX
- 	bool "Xilinx devices"
- 	default y
--	depends on PPC || PPC32 || MICROBLAZE
-+	depends on PPC || PPC32 || MICROBLAZE || ARCH_ZYNQ
- 	---help---
- 	  If you have a network (Ethernet) card belonging to this class, say Y
- 	  and read the Ethernet-HOWTO, available from
-@@ -20,7 +20,7 @@ if NET_VENDOR_XILINX
- 
- config XILINX_EMACLITE
- 	tristate "Xilinx 10/100 Ethernet Lite support"
--	depends on (PPC32 || MICROBLAZE)
-+	depends on (PPC32 || MICROBLAZE || ARCH_ZYNQ)
- 	select PHYLIB
- 	---help---
- 	  This driver supports the 10/100 Ethernet Lite from Xilinx.
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0091-microblaze-clean-up-prom.h-implicit-includes.patch b/patches.zynq/0091-microblaze-clean-up-prom.h-implicit-includes.patch
deleted file mode 100644
index 54ff315e737dc..0000000000000
--- a/patches.zynq/0091-microblaze-clean-up-prom.h-implicit-includes.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From 14ec0ffcfb7545768e634df49a932ab297892eab Mon Sep 17 00:00:00 2001
-From: Rob Herring <rob.herring@calxeda.com>
-Date: Sat, 7 Sep 2013 14:05:10 -0500
-Subject: microblaze: clean-up prom.h implicit includes
-
-While powerpc is a mess of implicit includes by prom.h, microblaze just
-copied this and is easily fixed. Add the necessary explicit includes and
-remove unnecessary includes and other parts from prom.h
-
-Signed-off-by: Rob Herring <rob.herring@calxeda.com>
-Acked-by: Grant Likely <grant.likely@linaro.org>
-Cc: Michal Simek <monstr@monstr.eu>
-Cc: microblaze-uclinux@itee.uq.edu.au
-Cc: netdev@vger.kernel.org
-(cherry picked from commit 5c9f303e996516dd0dcc2ce8c2b95504d3137b19)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/net/ethernet/xilinx/ll_temac_main.c | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/drivers/net/ethernet/xilinx/ll_temac_main.c b/drivers/net/ethernet/xilinx/ll_temac_main.c
-index 0029148077a9..1f2364126323 100644
---- a/drivers/net/ethernet/xilinx/ll_temac_main.c
-+++ b/drivers/net/ethernet/xilinx/ll_temac_main.c
-@@ -36,6 +36,7 @@
- #include <linux/netdevice.h>
- #include <linux/of.h>
- #include <linux/of_device.h>
-+#include <linux/of_irq.h>
- #include <linux/of_mdio.h>
- #include <linux/of_platform.h>
- #include <linux/of_address.h>
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0092-video-xilinxfb-Fix-OF-probing-on-little-endian-syste.patch b/patches.zynq/0092-video-xilinxfb-Fix-OF-probing-on-little-endian-syste.patch
deleted file mode 100644
index 3b65e5498012e..0000000000000
--- a/patches.zynq/0092-video-xilinxfb-Fix-OF-probing-on-little-endian-syste.patch
+++ /dev/null
@@ -1,47 +0,0 @@
-From 6eab05d19e8c76621d29e41a4b1101b9c3fe61a9 Mon Sep 17 00:00:00 2001
-From: Michal Simek <monstr@monstr.eu>
-Date: Mon, 3 Jun 2013 12:13:16 +0200
-Subject: video: xilinxfb: Fix OF probing on little-endian systems
-
-DTB is always big-endian that's why it is necessary
-to properly convert value (*p).
-It is automatically done in of_property_read_u32().
-
-Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-Acked-by: Arnd Bergmann <arnd@arndb.de>
-Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
-(cherry picked from commit 0f5e17c5fde5d28b26cd83e077c21d28bbf50a80)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/video/xilinxfb.c | 7 +++----
- 1 file changed, 3 insertions(+), 4 deletions(-)
-
-diff --git a/drivers/video/xilinxfb.c b/drivers/video/xilinxfb.c
-index af0b4fdf9aa9..aecd15d0b8e5 100644
---- a/drivers/video/xilinxfb.c
-+++ b/drivers/video/xilinxfb.c
-@@ -406,8 +406,7 @@ static int xilinxfb_release(struct device *dev)
- static int xilinxfb_of_probe(struct platform_device *op)
- {
- 	const u32 *prop;
--	u32 *p;
--	u32 tft_access;
-+	u32 tft_access = 0;
- 	struct xilinxfb_platform_data pdata;
- 	struct resource res;
- 	int size, rc;
-@@ -427,8 +426,8 @@ static int xilinxfb_of_probe(struct platform_device *op)
- 	 * To check whether the core is connected directly to DCR or PLB
- 	 * interface and initialize the tft_access accordingly.
- 	 */
--	p = (u32 *)of_get_property(op->dev.of_node, "xlnx,dcr-splb-slave-if", NULL);
--	tft_access = p ? *p : 0;
-+	of_property_read_u32(op->dev.of_node, "xlnx,dcr-splb-slave-if",
-+			     &tft_access);
- 
- 	/*
- 	 * Fill the resource structure if its direct PLB interface
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0093-video-xilinxfb-Do-not-name-out_be32-in-function-name.patch b/patches.zynq/0093-video-xilinxfb-Do-not-name-out_be32-in-function-name.patch
deleted file mode 100644
index dc532abb7aeef..0000000000000
--- a/patches.zynq/0093-video-xilinxfb-Do-not-name-out_be32-in-function-name.patch
+++ /dev/null
@@ -1,97 +0,0 @@
-From 06d9bcbefcf59969ffce43888d5d319d4d89b0c9 Mon Sep 17 00:00:00 2001
-From: Michal Simek <michal.simek@xilinx.com>
-Date: Mon, 3 Jun 2013 12:13:17 +0200
-Subject: video: xilinxfb: Do not name out_be32 in function name
-
-out_be32 IO function is not supported by ARM.
-It is only available for PPC and Microblaze.
-Because this driver can be used on ARM let's
-remove out_be32 from function name.
-
-Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-Acked-by: Arnd Bergmann <arnd@arndb.de>
-Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
-(cherry picked from commit ec05e7a8aaf5fd73a64d28fc9f28384ea247cc1c)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/video/xilinxfb.c | 16 ++++++++--------
- 1 file changed, 8 insertions(+), 8 deletions(-)
-
-diff --git a/drivers/video/xilinxfb.c b/drivers/video/xilinxfb.c
-index aecd15d0b8e5..c9b442b928e5 100644
---- a/drivers/video/xilinxfb.c
-+++ b/drivers/video/xilinxfb.c
-@@ -57,7 +57,7 @@
-  * In case of direct PLB access the second control register will be at
-  * an offset of 4 as compared to the DCR access where the offset is 1
-  * i.e. REG_CTRL. So this is taken care in the function
-- * xilinx_fb_out_be32 where it left shifts the offset 2 times in case of
-+ * xilinx_fb_out32 where it left shifts the offset 2 times in case of
-  * direct PLB access.
-  */
- #define NUM_REGS	2
-@@ -150,7 +150,7 @@ struct xilinxfb_drvdata {
-  * To perform the read/write on the registers we need to check on
-  * which bus its connected and call the appropriate write API.
-  */
--static void xilinx_fb_out_be32(struct xilinxfb_drvdata *drvdata, u32 offset,
-+static void xilinx_fb_out32(struct xilinxfb_drvdata *drvdata, u32 offset,
- 				u32 val)
- {
- 	if (drvdata->flags & PLB_ACCESS_FLAG)
-@@ -197,7 +197,7 @@ xilinx_fb_blank(int blank_mode, struct fb_info *fbi)
- 	switch (blank_mode) {
- 	case FB_BLANK_UNBLANK:
- 		/* turn on panel */
--		xilinx_fb_out_be32(drvdata, REG_CTRL, drvdata->reg_ctrl_default);
-+		xilinx_fb_out32(drvdata, REG_CTRL, drvdata->reg_ctrl_default);
- 		break;
- 
- 	case FB_BLANK_NORMAL:
-@@ -205,7 +205,7 @@ xilinx_fb_blank(int blank_mode, struct fb_info *fbi)
- 	case FB_BLANK_HSYNC_SUSPEND:
- 	case FB_BLANK_POWERDOWN:
- 		/* turn off panel */
--		xilinx_fb_out_be32(drvdata, REG_CTRL, 0);
-+		xilinx_fb_out32(drvdata, REG_CTRL, 0);
- 	default:
- 		break;
- 
-@@ -280,13 +280,13 @@ static int xilinxfb_assign(struct device *dev,
- 	memset_io((void __iomem *)drvdata->fb_virt, 0, fbsize);
- 
- 	/* Tell the hardware where the frame buffer is */
--	xilinx_fb_out_be32(drvdata, REG_FB_ADDR, drvdata->fb_phys);
-+	xilinx_fb_out32(drvdata, REG_FB_ADDR, drvdata->fb_phys);
- 
- 	/* Turn on the display */
- 	drvdata->reg_ctrl_default = REG_CTRL_ENABLE;
- 	if (pdata->rotate_screen)
- 		drvdata->reg_ctrl_default |= REG_CTRL_ROTATE;
--	xilinx_fb_out_be32(drvdata, REG_CTRL,
-+	xilinx_fb_out32(drvdata, REG_CTRL,
- 					drvdata->reg_ctrl_default);
- 
- 	/* Fill struct fb_info */
-@@ -345,7 +345,7 @@ err_cmap:
- 		iounmap(drvdata->fb_virt);
- 
- 	/* Turn off the display */
--	xilinx_fb_out_be32(drvdata, REG_CTRL, 0);
-+	xilinx_fb_out32(drvdata, REG_CTRL, 0);
- 
- err_fbmem:
- 	if (drvdata->flags & PLB_ACCESS_FLAG)
-@@ -381,7 +381,7 @@ static int xilinxfb_release(struct device *dev)
- 		iounmap(drvdata->fb_virt);
- 
- 	/* Turn off the display */
--	xilinx_fb_out_be32(drvdata, REG_CTRL, 0);
-+	xilinx_fb_out32(drvdata, REG_CTRL, 0);
- 
- 	/* Release the resources, as allocated based on interface */
- 	if (drvdata->flags & PLB_ACCESS_FLAG) {
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0094-video-xilinxfb-Rename-PLB_ACCESS_FLAG-to-BUS_ACCESS_.patch b/patches.zynq/0094-video-xilinxfb-Rename-PLB_ACCESS_FLAG-to-BUS_ACCESS_.patch
deleted file mode 100644
index 5c7a36782c904..0000000000000
--- a/patches.zynq/0094-video-xilinxfb-Rename-PLB_ACCESS_FLAG-to-BUS_ACCESS_.patch
+++ /dev/null
@@ -1,151 +0,0 @@
-From d0d6431effc0e1841db0555b9ad4eefa8da18491 Mon Sep 17 00:00:00 2001
-From: Michal Simek <michal.simek@xilinx.com>
-Date: Mon, 3 Jun 2013 12:13:18 +0200
-Subject: video: xilinxfb: Rename PLB_ACCESS_FLAG to BUS_ACCESS_FLAG
-
-Using only PLB name is wrong for a long time because
-the same access functions are also used for AXI.
-s/PLB/BUS/g
-
-Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-Acked-by: Arnd Bergmann <arnd@arndb.de>
-Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
-(cherry picked from commit 5130af35bf34e7b57e86c7f72c08b8c68adbb425)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/video/xilinxfb.c | 32 ++++++++++++++++----------------
- 1 file changed, 16 insertions(+), 16 deletions(-)
-
-diff --git a/drivers/video/xilinxfb.c b/drivers/video/xilinxfb.c
-index c9b442b928e5..d94c99280144 100644
---- a/drivers/video/xilinxfb.c
-+++ b/drivers/video/xilinxfb.c
-@@ -44,7 +44,7 @@
- 
- 
- /*
-- * Xilinx calls it "PLB TFT LCD Controller" though it can also be used for
-+ * Xilinx calls it "TFT LCD Controller" though it can also be used for
-  * the VGA port on the Xilinx ML40x board. This is a hardware display
-  * controller for a 640x480 resolution TFT or VGA screen.
-  *
-@@ -54,11 +54,11 @@
-  * don't start thinking about scrolling).  The second allows the LCD to
-  * be turned on or off as well as rotated 180 degrees.
-  *
-- * In case of direct PLB access the second control register will be at
-+ * In case of direct BUS access the second control register will be at
-  * an offset of 4 as compared to the DCR access where the offset is 1
-  * i.e. REG_CTRL. So this is taken care in the function
-  * xilinx_fb_out32 where it left shifts the offset 2 times in case of
-- * direct PLB access.
-+ * direct BUS access.
-  */
- #define NUM_REGS	2
- #define REG_FB_ADDR	0
-@@ -116,7 +116,7 @@ static struct fb_var_screeninfo xilinx_fb_var = {
- };
- 
- 
--#define PLB_ACCESS_FLAG	0x1		/* 1 = PLB, 0 = DCR */
-+#define BUS_ACCESS_FLAG		0x1 /* 1 = BUS, 0 = DCR */
- 
- struct xilinxfb_drvdata {
- 
-@@ -146,14 +146,14 @@ struct xilinxfb_drvdata {
- 	container_of(_info, struct xilinxfb_drvdata, info)
- 
- /*
-- * The XPS TFT Controller can be accessed through PLB or DCR interface.
-+ * The XPS TFT Controller can be accessed through BUS or DCR interface.
-  * To perform the read/write on the registers we need to check on
-  * which bus its connected and call the appropriate write API.
-  */
- static void xilinx_fb_out32(struct xilinxfb_drvdata *drvdata, u32 offset,
- 				u32 val)
- {
--	if (drvdata->flags & PLB_ACCESS_FLAG)
-+	if (drvdata->flags & BUS_ACCESS_FLAG)
- 		out_be32(drvdata->regs + (offset << 2), val);
- #ifdef CONFIG_PPC_DCR
- 	else
-@@ -235,10 +235,10 @@ static int xilinxfb_assign(struct device *dev,
- 	int rc;
- 	int fbsize = pdata->xvirt * pdata->yvirt * BYTES_PER_PIXEL;
- 
--	if (drvdata->flags & PLB_ACCESS_FLAG) {
-+	if (drvdata->flags & BUS_ACCESS_FLAG) {
- 		/*
- 		 * Map the control registers in if the controller
--		 * is on direct PLB interface.
-+		 * is on direct BUS interface.
- 		 */
- 		if (!request_mem_region(physaddr, 8, DRIVER_NAME)) {
- 			dev_err(dev, "Couldn't lock memory region at 0x%08lX\n",
-@@ -270,7 +270,7 @@ static int xilinxfb_assign(struct device *dev,
- 	if (!drvdata->fb_virt) {
- 		dev_err(dev, "Could not allocate frame buffer memory\n");
- 		rc = -ENOMEM;
--		if (drvdata->flags & PLB_ACCESS_FLAG)
-+		if (drvdata->flags & BUS_ACCESS_FLAG)
- 			goto err_fbmem;
- 		else
- 			goto err_region;
-@@ -323,7 +323,7 @@ static int xilinxfb_assign(struct device *dev,
- 		goto err_regfb;
- 	}
- 
--	if (drvdata->flags & PLB_ACCESS_FLAG) {
-+	if (drvdata->flags & BUS_ACCESS_FLAG) {
- 		/* Put a banner in the log (for DEBUG) */
- 		dev_dbg(dev, "regs: phys=%lx, virt=%p\n", physaddr,
- 					drvdata->regs);
-@@ -348,11 +348,11 @@ err_cmap:
- 	xilinx_fb_out32(drvdata, REG_CTRL, 0);
- 
- err_fbmem:
--	if (drvdata->flags & PLB_ACCESS_FLAG)
-+	if (drvdata->flags & BUS_ACCESS_FLAG)
- 		iounmap(drvdata->regs);
- 
- err_map:
--	if (drvdata->flags & PLB_ACCESS_FLAG)
-+	if (drvdata->flags & BUS_ACCESS_FLAG)
- 		release_mem_region(physaddr, 8);
- 
- err_region:
-@@ -384,7 +384,7 @@ static int xilinxfb_release(struct device *dev)
- 	xilinx_fb_out32(drvdata, REG_CTRL, 0);
- 
- 	/* Release the resources, as allocated based on interface */
--	if (drvdata->flags & PLB_ACCESS_FLAG) {
-+	if (drvdata->flags & BUS_ACCESS_FLAG) {
- 		iounmap(drvdata->regs);
- 		release_mem_region(drvdata->regs_phys, 8);
- 	}
-@@ -423,18 +423,18 @@ static int xilinxfb_of_probe(struct platform_device *op)
- 	}
- 
- 	/*
--	 * To check whether the core is connected directly to DCR or PLB
-+	 * To check whether the core is connected directly to DCR or BUS
- 	 * interface and initialize the tft_access accordingly.
- 	 */
- 	of_property_read_u32(op->dev.of_node, "xlnx,dcr-splb-slave-if",
- 			     &tft_access);
- 
- 	/*
--	 * Fill the resource structure if its direct PLB interface
-+	 * Fill the resource structure if its direct BUS interface
- 	 * otherwise fill the dcr_host structure.
- 	 */
- 	if (tft_access) {
--		drvdata->flags |= PLB_ACCESS_FLAG;
-+		drvdata->flags |= BUS_ACCESS_FLAG;
- 		rc = of_address_to_resource(op->dev.of_node, 0, &res);
- 		if (rc) {
- 			dev_err(&op->dev, "invalid address\n");
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0095-video-xilinxfb-Use-drvdata-regs_phys-instead-of-phys.patch b/patches.zynq/0095-video-xilinxfb-Use-drvdata-regs_phys-instead-of-phys.patch
deleted file mode 100644
index c57a462c0ffb2..0000000000000
--- a/patches.zynq/0095-video-xilinxfb-Use-drvdata-regs_phys-instead-of-phys.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From 384f3bb3d5a332ad2f21bea84f1c2e5afc225b09 Mon Sep 17 00:00:00 2001
-From: Michal Simek <michal.simek@xilinx.com>
-Date: Mon, 3 Jun 2013 12:13:19 +0200
-Subject: video: xilinxfb: Use drvdata->regs_phys instead of physaddr
-
-physaddr will be remove in the next patch.
-
-Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-Acked-by: Arnd Bergmann <arnd@arndb.de>
-Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
-(cherry picked from commit c88fafef0135e1e1c3e23c3e32ccbeeabc587f81)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/video/xilinxfb.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/video/xilinxfb.c b/drivers/video/xilinxfb.c
-index d94c99280144..1b55f18e0b42 100644
---- a/drivers/video/xilinxfb.c
-+++ b/drivers/video/xilinxfb.c
-@@ -325,7 +325,7 @@ static int xilinxfb_assign(struct device *dev,
- 
- 	if (drvdata->flags & BUS_ACCESS_FLAG) {
- 		/* Put a banner in the log (for DEBUG) */
--		dev_dbg(dev, "regs: phys=%lx, virt=%p\n", physaddr,
-+		dev_dbg(dev, "regs: phys=%x, virt=%p\n", drvdata->regs_phys,
- 					drvdata->regs);
- 	}
- 	/* Put a banner in the log (for DEBUG) */
-@@ -353,7 +353,7 @@ err_fbmem:
- 
- err_map:
- 	if (drvdata->flags & BUS_ACCESS_FLAG)
--		release_mem_region(physaddr, 8);
-+		release_mem_region(drvdata->regs_phys, 8);
- 
- err_region:
- 	kfree(drvdata);
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0096-video-xilinxfb-Group-bus-initialization.patch b/patches.zynq/0096-video-xilinxfb-Group-bus-initialization.patch
deleted file mode 100644
index a59e414cefcb2..0000000000000
--- a/patches.zynq/0096-video-xilinxfb-Group-bus-initialization.patch
+++ /dev/null
@@ -1,141 +0,0 @@
-From 5dcdbd8fc9a080df4abc050cffbe75974cc481b9 Mon Sep 17 00:00:00 2001
-From: Michal Simek <michal.simek@xilinx.com>
-Date: Mon, 3 Jun 2013 12:13:20 +0200
-Subject: video: xilinxfb: Group bus initialization
-
-Move of_address_to_resource() to xilinxfb_assign()
-which simplify driver probing.
-
-Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-Acked-by: Arnd Bergmann <arnd@arndb.de>
-Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
-(cherry picked from commit a8f045aa07b3d40f46e35536eeb54e3c5423c5c2)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/video/xilinxfb.c | 56 +++++++++++++-----------------------------------
- 1 file changed, 15 insertions(+), 41 deletions(-)
-
-diff --git a/drivers/video/xilinxfb.c b/drivers/video/xilinxfb.c
-index 1b55f18e0b42..bd3b85d890d4 100644
---- a/drivers/video/xilinxfb.c
-+++ b/drivers/video/xilinxfb.c
-@@ -227,33 +227,23 @@ static struct fb_ops xilinxfb_ops =
-  * Bus independent setup/teardown
-  */
- 
--static int xilinxfb_assign(struct device *dev,
-+static int xilinxfb_assign(struct platform_device *pdev,
- 			   struct xilinxfb_drvdata *drvdata,
--			   unsigned long physaddr,
- 			   struct xilinxfb_platform_data *pdata)
- {
- 	int rc;
-+	struct device *dev = &pdev->dev;
- 	int fbsize = pdata->xvirt * pdata->yvirt * BYTES_PER_PIXEL;
- 
- 	if (drvdata->flags & BUS_ACCESS_FLAG) {
--		/*
--		 * Map the control registers in if the controller
--		 * is on direct BUS interface.
--		 */
--		if (!request_mem_region(physaddr, 8, DRIVER_NAME)) {
--			dev_err(dev, "Couldn't lock memory region at 0x%08lX\n",
--				physaddr);
--			rc = -ENODEV;
--			goto err_region;
--		}
-+		struct resource *res;
- 
--		drvdata->regs_phys = physaddr;
--		drvdata->regs = ioremap(physaddr, 8);
-+		res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+		drvdata->regs_phys = res->start;
-+		drvdata->regs = devm_request_and_ioremap(&pdev->dev, res);
- 		if (!drvdata->regs) {
--			dev_err(dev, "Couldn't lock memory region at 0x%08lX\n",
--				physaddr);
--			rc = -ENODEV;
--			goto err_map;
-+			rc = -EADDRNOTAVAIL;
-+			goto err_region;
- 		}
- 	}
- 
-@@ -349,11 +339,7 @@ err_cmap:
- 
- err_fbmem:
- 	if (drvdata->flags & BUS_ACCESS_FLAG)
--		iounmap(drvdata->regs);
--
--err_map:
--	if (drvdata->flags & BUS_ACCESS_FLAG)
--		release_mem_region(drvdata->regs_phys, 8);
-+		devm_iounmap(dev, drvdata->regs);
- 
- err_region:
- 	kfree(drvdata);
-@@ -384,10 +370,8 @@ static int xilinxfb_release(struct device *dev)
- 	xilinx_fb_out32(drvdata, REG_CTRL, 0);
- 
- 	/* Release the resources, as allocated based on interface */
--	if (drvdata->flags & BUS_ACCESS_FLAG) {
--		iounmap(drvdata->regs);
--		release_mem_region(drvdata->regs_phys, 8);
--	}
-+	if (drvdata->flags & BUS_ACCESS_FLAG)
-+		devm_iounmap(dev, drvdata->regs);
- #ifdef CONFIG_PPC_DCR
- 	else
- 		dcr_unmap(drvdata->dcr_host, drvdata->dcr_len);
-@@ -408,8 +392,7 @@ static int xilinxfb_of_probe(struct platform_device *op)
- 	const u32 *prop;
- 	u32 tft_access = 0;
- 	struct xilinxfb_platform_data pdata;
--	struct resource res;
--	int size, rc;
-+	int size;
- 	struct xilinxfb_drvdata *drvdata;
- 
- 	/* Copy with the default pdata (not a ptr reference!) */
-@@ -435,22 +418,17 @@ static int xilinxfb_of_probe(struct platform_device *op)
- 	 */
- 	if (tft_access) {
- 		drvdata->flags |= BUS_ACCESS_FLAG;
--		rc = of_address_to_resource(op->dev.of_node, 0, &res);
--		if (rc) {
--			dev_err(&op->dev, "invalid address\n");
--			goto err;
--		}
- 	}
- #ifdef CONFIG_PPC_DCR
- 	else {
- 		int start;
--		res.start = 0;
- 		start = dcr_resource_start(op->dev.of_node, 0);
- 		drvdata->dcr_len = dcr_resource_len(op->dev.of_node, 0);
- 		drvdata->dcr_host = dcr_map(op->dev.of_node, start, drvdata->dcr_len);
- 		if (!DCR_MAP_OK(drvdata->dcr_host)) {
- 			dev_err(&op->dev, "invalid DCR address\n");
--			goto err;
-+			kfree(drvdata);
-+			return -ENODEV;
- 		}
- 	}
- #endif
-@@ -477,11 +455,7 @@ static int xilinxfb_of_probe(struct platform_device *op)
- 		pdata.rotate_screen = 1;
- 
- 	dev_set_drvdata(&op->dev, drvdata);
--	return xilinxfb_assign(&op->dev, drvdata, res.start, &pdata);
--
-- err:
--	kfree(drvdata);
--	return -ENODEV;
-+	return xilinxfb_assign(op, drvdata, &pdata);
- }
- 
- static int xilinxfb_of_remove(struct platform_device *op)
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0097-video-xilinxfb-Add-support-for-little-endian-accesse.patch b/patches.zynq/0097-video-xilinxfb-Add-support-for-little-endian-accesse.patch
deleted file mode 100644
index da4d2ef619892..0000000000000
--- a/patches.zynq/0097-video-xilinxfb-Add-support-for-little-endian-accesse.patch
+++ /dev/null
@@ -1,83 +0,0 @@
-From 34682d82bb5fdacc605bebe92375d30d6fe5d96b Mon Sep 17 00:00:00 2001
-From: Michal Simek <michal.simek@xilinx.com>
-Date: Mon, 3 Jun 2013 12:13:21 +0200
-Subject: video: xilinxfb: Add support for little endian accesses
-
-Dynamically detect endianess on IP and use
-ioread/iowrite functions instead of powerpc and microblaze
-specific out_be32.
-
-Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-Acked-by: Arnd Bergmann <arnd@arndb.de>
-Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
-(cherry picked from commit 2121c339eb6fd234df16172d6a748d7007eceba8)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/video/xilinxfb.c | 30 ++++++++++++++++++++++++++++--
- 1 file changed, 28 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/video/xilinxfb.c b/drivers/video/xilinxfb.c
-index bd3b85d890d4..f3d4a69e1e4e 100644
---- a/drivers/video/xilinxfb.c
-+++ b/drivers/video/xilinxfb.c
-@@ -117,6 +117,7 @@ static struct fb_var_screeninfo xilinx_fb_var = {
- 
- 
- #define BUS_ACCESS_FLAG		0x1 /* 1 = BUS, 0 = DCR */
-+#define LITTLE_ENDIAN_ACCESS	0x2 /* LITTLE ENDIAN IO functions */
- 
- struct xilinxfb_drvdata {
- 
-@@ -153,14 +154,33 @@ struct xilinxfb_drvdata {
- static void xilinx_fb_out32(struct xilinxfb_drvdata *drvdata, u32 offset,
- 				u32 val)
- {
--	if (drvdata->flags & BUS_ACCESS_FLAG)
--		out_be32(drvdata->regs + (offset << 2), val);
-+	if (drvdata->flags & BUS_ACCESS_FLAG) {
-+		if (drvdata->flags & LITTLE_ENDIAN_ACCESS)
-+			iowrite32(val, drvdata->regs + (offset << 2));
-+		else
-+			iowrite32be(val, drvdata->regs + (offset << 2));
-+	}
- #ifdef CONFIG_PPC_DCR
- 	else
- 		dcr_write(drvdata->dcr_host, offset, val);
- #endif
- }
- 
-+static u32 xilinx_fb_in32(struct xilinxfb_drvdata *drvdata, u32 offset)
-+{
-+	if (drvdata->flags & BUS_ACCESS_FLAG) {
-+		if (drvdata->flags & LITTLE_ENDIAN_ACCESS)
-+			return ioread32(drvdata->regs + (offset << 2));
-+		else
-+			return ioread32be(drvdata->regs + (offset << 2));
-+	}
-+#ifdef CONFIG_PPC_DCR
-+	else
-+		return dcr_read(drvdata->dcr_host, offset);
-+#endif
-+	return 0;
-+}
-+
- static int
- xilinx_fb_setcolreg(unsigned regno, unsigned red, unsigned green, unsigned blue,
- 	unsigned transp, struct fb_info *fbi)
-@@ -271,6 +291,12 @@ static int xilinxfb_assign(struct platform_device *pdev,
- 
- 	/* Tell the hardware where the frame buffer is */
- 	xilinx_fb_out32(drvdata, REG_FB_ADDR, drvdata->fb_phys);
-+	rc = xilinx_fb_in32(drvdata, REG_FB_ADDR);
-+	/* Endianess detection */
-+	if (rc != drvdata->fb_phys) {
-+		drvdata->flags |= LITTLE_ENDIAN_ACCESS;
-+		xilinx_fb_out32(drvdata, REG_FB_ADDR, drvdata->fb_phys);
-+	}
- 
- 	/* Turn on the display */
- 	drvdata->reg_ctrl_default = REG_CTRL_ENABLE;
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0098-video-xilinxfb-Fix-compilation-warning.patch b/patches.zynq/0098-video-xilinxfb-Fix-compilation-warning.patch
deleted file mode 100644
index 25c9af4f407ab..0000000000000
--- a/patches.zynq/0098-video-xilinxfb-Fix-compilation-warning.patch
+++ /dev/null
@@ -1,40 +0,0 @@
-From f0205aa6dbc7b4a17a5aa0d15eb769a683477288 Mon Sep 17 00:00:00 2001
-From: Michal Simek <michal.simek@xilinx.com>
-Date: Thu, 25 Jul 2013 15:45:26 +0200
-Subject: video: xilinxfb: Fix compilation warning
-
-regs_phys is phys_addr_t (u32 or u64).
-Lets use %pa printk format specifier.
-
-Fixes compilation warning introduced by:
-video: xilinxfb: Use drvdata->regs_phys instead of physaddr
-(sha1: c88fafef0135e1e1c3e23c3e32ccbeeabc587f81)
-
-Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-Reviewed-by: Jingoo Han <jg1.han@samsung.com>
-Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
-(cherry picked from commit bf265c848f162c3189f6e3f0ba619de1a82bcbdc)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/video/xilinxfb.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/video/xilinxfb.c b/drivers/video/xilinxfb.c
-index f3d4a69e1e4e..6629b29a8202 100644
---- a/drivers/video/xilinxfb.c
-+++ b/drivers/video/xilinxfb.c
-@@ -341,8 +341,8 @@ static int xilinxfb_assign(struct platform_device *pdev,
- 
- 	if (drvdata->flags & BUS_ACCESS_FLAG) {
- 		/* Put a banner in the log (for DEBUG) */
--		dev_dbg(dev, "regs: phys=%x, virt=%p\n", drvdata->regs_phys,
--					drvdata->regs);
-+		dev_dbg(dev, "regs: phys=%pa, virt=%p\n",
-+			&drvdata->regs_phys, drvdata->regs);
- 	}
- 	/* Put a banner in the log (for DEBUG) */
- 	dev_dbg(dev, "fb: phys=%llx, virt=%p, size=%x\n",
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0099-video-xilinxfb-replace-devm_request_and_ioremap-by-d.patch b/patches.zynq/0099-video-xilinxfb-replace-devm_request_and_ioremap-by-d.patch
deleted file mode 100644
index 6acd06386265f..0000000000000
--- a/patches.zynq/0099-video-xilinxfb-replace-devm_request_and_ioremap-by-d.patch
+++ /dev/null
@@ -1,47 +0,0 @@
-From 14f73b96a69880d35af29002ff017f4787f73c84 Mon Sep 17 00:00:00 2001
-From: Julia Lawall <Julia.Lawall@lip6.fr>
-Date: Mon, 19 Aug 2013 13:20:40 +0200
-Subject: video: xilinxfb: replace devm_request_and_ioremap by
- devm_ioremap_resource
-
-Use devm_ioremap_resource instead of devm_request_and_ioremap.
-
-This was done using the semantic patch
-scripts/coccinelle/api/devm_ioremap_resource.cocci
-
-The initialization of drvdata->regs_phys was manually moved lower, to take
-advantage of the NULL test on res performed by devm_ioremap_resource.
-
-Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
-Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
-(cherry picked from commit b1a9329cd5c4a26cdc2b12015ad055174a09e4ad)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/video/xilinxfb.c | 8 ++++----
- 1 file changed, 4 insertions(+), 4 deletions(-)
-
-diff --git a/drivers/video/xilinxfb.c b/drivers/video/xilinxfb.c
-index 6629b29a8202..84c664ea8eb9 100644
---- a/drivers/video/xilinxfb.c
-+++ b/drivers/video/xilinxfb.c
-@@ -259,12 +259,12 @@ static int xilinxfb_assign(struct platform_device *pdev,
- 		struct resource *res;
- 
- 		res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
--		drvdata->regs_phys = res->start;
--		drvdata->regs = devm_request_and_ioremap(&pdev->dev, res);
--		if (!drvdata->regs) {
--			rc = -EADDRNOTAVAIL;
-+		drvdata->regs = devm_ioremap_resource(&pdev->dev, res);
-+		if (IS_ERR(drvdata->regs)) {
-+			rc = PTR_ERR(drvdata->regs);
- 			goto err_region;
- 		}
-+		drvdata->regs_phys = res->start;
- 	}
- 
- 	/* Allocate the framebuffer memory */
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0100-video-xilinxfb-Remove-redundant-dev_set_drvdata.patch b/patches.zynq/0100-video-xilinxfb-Remove-redundant-dev_set_drvdata.patch
deleted file mode 100644
index 06a45124cb748..0000000000000
--- a/patches.zynq/0100-video-xilinxfb-Remove-redundant-dev_set_drvdata.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From 85ebfe9c18110d7953d460fc7e0ba644a88c5d61 Mon Sep 17 00:00:00 2001
-From: Sachin Kamat <sachin.kamat@linaro.org>
-Date: Fri, 20 Sep 2013 12:02:24 +0530
-Subject: video: xilinxfb: Remove redundant dev_set_drvdata
-
-Driver core sets driver data to NULL upon failure or remove.
-
-Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
-Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
-(cherry picked from commit 090fd59308c9d50b8eabf71cd28b5513250a7b79)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/video/xilinxfb.c | 2 --
- 1 file changed, 2 deletions(-)
-
-diff --git a/drivers/video/xilinxfb.c b/drivers/video/xilinxfb.c
-index 84c664ea8eb9..0e1dd3380a1e 100644
---- a/drivers/video/xilinxfb.c
-+++ b/drivers/video/xilinxfb.c
-@@ -369,7 +369,6 @@ err_fbmem:
- 
- err_region:
- 	kfree(drvdata);
--	dev_set_drvdata(dev, NULL);
- 
- 	return rc;
- }
-@@ -404,7 +403,6 @@ static int xilinxfb_release(struct device *dev)
- #endif
- 
- 	kfree(drvdata);
--	dev_set_drvdata(dev, NULL);
- 
- 	return 0;
- }
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0101-video-xilinxfb-Use-standard-variable-name-convention.patch b/patches.zynq/0101-video-xilinxfb-Use-standard-variable-name-convention.patch
deleted file mode 100644
index 8f78064a0dfc9..0000000000000
--- a/patches.zynq/0101-video-xilinxfb-Use-standard-variable-name-convention.patch
+++ /dev/null
@@ -1,87 +0,0 @@
-From edb72c418671f12b26b12967477c0c9b6a301156 Mon Sep 17 00:00:00 2001
-From: Michal Simek <michal.simek@xilinx.com>
-Date: Thu, 10 Oct 2013 08:30:20 +0200
-Subject: video: xilinxfb: Use standard variable name convention
-
-s/op/pdev/ in xilinxfb_of_probe().
-No functional chagnes.
-
-Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
-(cherry picked from commit 353846fb8bb7d84986116a5be110eefed451af3c)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/video/xilinxfb.c | 18 +++++++++---------
- 1 file changed, 9 insertions(+), 9 deletions(-)
-
-diff --git a/drivers/video/xilinxfb.c b/drivers/video/xilinxfb.c
-index 0e1dd3380a1e..d12345f7fca4 100644
---- a/drivers/video/xilinxfb.c
-+++ b/drivers/video/xilinxfb.c
-@@ -411,7 +411,7 @@ static int xilinxfb_release(struct device *dev)
-  * OF bus binding
-  */
- 
--static int xilinxfb_of_probe(struct platform_device *op)
-+static int xilinxfb_of_probe(struct platform_device *pdev)
- {
- 	const u32 *prop;
- 	u32 tft_access = 0;
-@@ -425,7 +425,7 @@ static int xilinxfb_of_probe(struct platform_device *op)
- 	/* Allocate the driver data region */
- 	drvdata = kzalloc(sizeof(*drvdata), GFP_KERNEL);
- 	if (!drvdata) {
--		dev_err(&op->dev, "Couldn't allocate device private record\n");
-+		dev_err(&pdev->dev, "Couldn't allocate device private record\n");
- 		return -ENOMEM;
- 	}
- 
-@@ -433,7 +433,7 @@ static int xilinxfb_of_probe(struct platform_device *op)
- 	 * To check whether the core is connected directly to DCR or BUS
- 	 * interface and initialize the tft_access accordingly.
- 	 */
--	of_property_read_u32(op->dev.of_node, "xlnx,dcr-splb-slave-if",
-+	of_property_read_u32(pdev->dev.of_node, "xlnx,dcr-splb-slave-if",
- 			     &tft_access);
- 
- 	/*
-@@ -457,29 +457,29 @@ static int xilinxfb_of_probe(struct platform_device *op)
- 	}
- #endif
- 
--	prop = of_get_property(op->dev.of_node, "phys-size", &size);
-+	prop = of_get_property(pdev->dev.of_node, "phys-size", &size);
- 	if ((prop) && (size >= sizeof(u32)*2)) {
- 		pdata.screen_width_mm = prop[0];
- 		pdata.screen_height_mm = prop[1];
- 	}
- 
--	prop = of_get_property(op->dev.of_node, "resolution", &size);
-+	prop = of_get_property(pdev->dev.of_node, "resolution", &size);
- 	if ((prop) && (size >= sizeof(u32)*2)) {
- 		pdata.xres = prop[0];
- 		pdata.yres = prop[1];
- 	}
- 
--	prop = of_get_property(op->dev.of_node, "virtual-resolution", &size);
-+	prop = of_get_property(pdev->dev.of_node, "virtual-resolution", &size);
- 	if ((prop) && (size >= sizeof(u32)*2)) {
- 		pdata.xvirt = prop[0];
- 		pdata.yvirt = prop[1];
- 	}
- 
--	if (of_find_property(op->dev.of_node, "rotate-display", NULL))
-+	if (of_find_property(pdev->dev.of_node, "rotate-display", NULL))
- 		pdata.rotate_screen = 1;
- 
--	dev_set_drvdata(&op->dev, drvdata);
--	return xilinxfb_assign(op, drvdata, &pdata);
-+	dev_set_drvdata(&pdev->dev, drvdata);
-+	return xilinxfb_assign(pdev, drvdata, &pdata);
- }
- 
- static int xilinxfb_of_remove(struct platform_device *op)
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0102-video-xilinxfb-Use-devm_kzalloc-instead-of-kzalloc.patch b/patches.zynq/0102-video-xilinxfb-Use-devm_kzalloc-instead-of-kzalloc.patch
deleted file mode 100644
index 82601b15a8de0..0000000000000
--- a/patches.zynq/0102-video-xilinxfb-Use-devm_kzalloc-instead-of-kzalloc.patch
+++ /dev/null
@@ -1,64 +0,0 @@
-From b845f6e9f70e2a0e1008d9238e19e4305f780d04 Mon Sep 17 00:00:00 2001
-From: Michal Simek <michal.simek@xilinx.com>
-Date: Thu, 10 Oct 2013 08:30:21 +0200
-Subject: video: xilinxfb: Use devm_kzalloc instead of kzalloc
-
-Simplify driver probe and release function.
-
-Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-Reviewed-by: Jingoo Han <jg1.han@samsung.com>
-Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
-(cherry picked from commit 5c128df7471a6917f84cde3cea786541aaa404a2)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/video/xilinxfb.c | 11 ++---------
- 1 file changed, 2 insertions(+), 9 deletions(-)
-
-diff --git a/drivers/video/xilinxfb.c b/drivers/video/xilinxfb.c
-index d12345f7fca4..c420328afb40 100644
---- a/drivers/video/xilinxfb.c
-+++ b/drivers/video/xilinxfb.c
-@@ -368,8 +368,6 @@ err_fbmem:
- 		devm_iounmap(dev, drvdata->regs);
- 
- err_region:
--	kfree(drvdata);
--
- 	return rc;
- }
- 
-@@ -402,8 +400,6 @@ static int xilinxfb_release(struct device *dev)
- 		dcr_unmap(drvdata->dcr_host, drvdata->dcr_len);
- #endif
- 
--	kfree(drvdata);
--
- 	return 0;
- }
- 
-@@ -423,11 +419,9 @@ static int xilinxfb_of_probe(struct platform_device *pdev)
- 	pdata = xilinx_fb_default_pdata;
- 
- 	/* Allocate the driver data region */
--	drvdata = kzalloc(sizeof(*drvdata), GFP_KERNEL);
--	if (!drvdata) {
--		dev_err(&pdev->dev, "Couldn't allocate device private record\n");
-+	drvdata = devm_kzalloc(&pdev->dev, sizeof(*drvdata), GFP_KERNEL);
-+	if (!drvdata)
- 		return -ENOMEM;
--	}
- 
- 	/*
- 	 * To check whether the core is connected directly to DCR or BUS
-@@ -451,7 +445,6 @@ static int xilinxfb_of_probe(struct platform_device *pdev)
- 		drvdata->dcr_host = dcr_map(op->dev.of_node, start, drvdata->dcr_len);
- 		if (!DCR_MAP_OK(drvdata->dcr_host)) {
- 			dev_err(&op->dev, "invalid DCR address\n");
--			kfree(drvdata);
- 			return -ENODEV;
- 		}
- 	}
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0103-video-xilinxfb-Simplify-error-path.patch b/patches.zynq/0103-video-xilinxfb-Simplify-error-path.patch
deleted file mode 100644
index fb78e53ff18a6..0000000000000
--- a/patches.zynq/0103-video-xilinxfb-Simplify-error-path.patch
+++ /dev/null
@@ -1,80 +0,0 @@
-From c3de3f9aaa8948a1a39093eb17725d01c01daa85 Mon Sep 17 00:00:00 2001
-From: Michal Simek <michal.simek@xilinx.com>
-Date: Thu, 10 Oct 2013 08:30:22 +0200
-Subject: video: xilinxfb: Simplify error path
-
-devm_iounmap is called automatically that's why remove it from the code
-dev_set_drvdata(dev, NULL) is called by generic code
-after device_release or on probe failure.
-
-Signed-off-by: Michal Simek <michal.simek@xilinx.com>
-
-Reviewed-by: Jingoo Han <jg1.han@samsung.com>
-Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
-(cherry picked from commit 718b90ac4c21c81f42b6db062ca0867f3cac7648)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/video/xilinxfb.c | 24 ++++++------------------
- 1 file changed, 6 insertions(+), 18 deletions(-)
-
-diff --git a/drivers/video/xilinxfb.c b/drivers/video/xilinxfb.c
-index c420328afb40..9eedf9673b7f 100644
---- a/drivers/video/xilinxfb.c
-+++ b/drivers/video/xilinxfb.c
-@@ -260,10 +260,9 @@ static int xilinxfb_assign(struct platform_device *pdev,
- 
- 		res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- 		drvdata->regs = devm_ioremap_resource(&pdev->dev, res);
--		if (IS_ERR(drvdata->regs)) {
--			rc = PTR_ERR(drvdata->regs);
--			goto err_region;
--		}
-+		if (IS_ERR(drvdata->regs))
-+			return PTR_ERR(drvdata->regs);
-+
- 		drvdata->regs_phys = res->start;
- 	}
- 
-@@ -279,11 +278,7 @@ static int xilinxfb_assign(struct platform_device *pdev,
- 
- 	if (!drvdata->fb_virt) {
- 		dev_err(dev, "Could not allocate frame buffer memory\n");
--		rc = -ENOMEM;
--		if (drvdata->flags & BUS_ACCESS_FLAG)
--			goto err_fbmem;
--		else
--			goto err_region;
-+		return -ENOMEM;
- 	}
- 
- 	/* Clear (turn to black) the framebuffer */
-@@ -363,11 +358,6 @@ err_cmap:
- 	/* Turn off the display */
- 	xilinx_fb_out32(drvdata, REG_CTRL, 0);
- 
--err_fbmem:
--	if (drvdata->flags & BUS_ACCESS_FLAG)
--		devm_iounmap(dev, drvdata->regs);
--
--err_region:
- 	return rc;
- }
- 
-@@ -392,11 +382,9 @@ static int xilinxfb_release(struct device *dev)
- 	/* Turn off the display */
- 	xilinx_fb_out32(drvdata, REG_CTRL, 0);
- 
--	/* Release the resources, as allocated based on interface */
--	if (drvdata->flags & BUS_ACCESS_FLAG)
--		devm_iounmap(dev, drvdata->regs);
- #ifdef CONFIG_PPC_DCR
--	else
-+	/* Release the resources, as allocated based on interface */
-+	if (!(drvdata->flags & BUS_ACCESS_FLAG))
- 		dcr_unmap(drvdata->dcr_host, drvdata->dcr_len);
- #endif
- 
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0104-video-xilinxfb-Fix-for-Use-standard-variable-name-co.patch b/patches.zynq/0104-video-xilinxfb-Fix-for-Use-standard-variable-name-co.patch
deleted file mode 100644
index 3419e4dce88ce..0000000000000
--- a/patches.zynq/0104-video-xilinxfb-Fix-for-Use-standard-variable-name-co.patch
+++ /dev/null
@@ -1,38 +0,0 @@
-From 8b7cfe2778ce23971f159dddb0205a78eb56dd50 Mon Sep 17 00:00:00 2001
-From: Stephen Rothwell <sfr@canb.auug.org.au>
-Date: Tue, 29 Oct 2013 01:18:22 +1100
-Subject: video: xilinxfb: Fix for "Use standard variable name convention"
-
-Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
-Tested-by: Michal Simek <monstr@monstr.eu>
-Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
-(cherry picked from commit 33826d01d0f7e46eccd670e1ecdae1dff1cebfd2)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/video/xilinxfb.c | 8 ++++----
- 1 file changed, 4 insertions(+), 4 deletions(-)
-
-diff --git a/drivers/video/xilinxfb.c b/drivers/video/xilinxfb.c
-index 9eedf9673b7f..6ff1a91e9dfd 100644
---- a/drivers/video/xilinxfb.c
-+++ b/drivers/video/xilinxfb.c
-@@ -428,11 +428,11 @@ static int xilinxfb_of_probe(struct platform_device *pdev)
- #ifdef CONFIG_PPC_DCR
- 	else {
- 		int start;
--		start = dcr_resource_start(op->dev.of_node, 0);
--		drvdata->dcr_len = dcr_resource_len(op->dev.of_node, 0);
--		drvdata->dcr_host = dcr_map(op->dev.of_node, start, drvdata->dcr_len);
-+		start = dcr_resource_start(pdev->dev.of_node, 0);
-+		drvdata->dcr_len = dcr_resource_len(pdev->dev.of_node, 0);
-+		drvdata->dcr_host = dcr_map(pdev->dev.of_node, start, drvdata->dcr_len);
- 		if (!DCR_MAP_OK(drvdata->dcr_host)) {
--			dev_err(&op->dev, "invalid DCR address\n");
-+			dev_err(&pdev->dev, "invalid DCR address\n");
- 			return -ENODEV;
- 		}
- 	}
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0105-i2c-use-dev_get_platdata.patch b/patches.zynq/0105-i2c-use-dev_get_platdata.patch
deleted file mode 100644
index 8072215cbb653..0000000000000
--- a/patches.zynq/0105-i2c-use-dev_get_platdata.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From 0c162606d98f39f2d8736e91bc79b6fffea7b2c3 Mon Sep 17 00:00:00 2001
-From: Jingoo Han <jg1.han@samsung.com>
-Date: Tue, 30 Jul 2013 16:59:33 +0900
-Subject: i2c: use dev_get_platdata()
-
-Use the wrapper function for retrieving the platform data instead of
-accessing dev->platform_data directly.
-
-Signed-off-by: Jingoo Han <jg1.han@samsung.com>
-Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-(cherry picked from commit 6d4028c644edc0a2e4a8c948ebf81e8f2f09726e)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/i2c/busses/i2c-xiic.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/i2c/busses/i2c-xiic.c b/drivers/i2c/busses/i2c-xiic.c
-index 3d0f0520c1b4..433f377b3869 100644
---- a/drivers/i2c/busses/i2c-xiic.c
-+++ b/drivers/i2c/busses/i2c-xiic.c
-@@ -703,7 +703,7 @@ static int xiic_i2c_probe(struct platform_device *pdev)
- 	if (irq < 0)
- 		goto resource_missing;
- 
--	pdata = (struct xiic_i2c_platform_data *) pdev->dev.platform_data;
-+	pdata = (struct xiic_i2c_platform_data *)dev_get_platdata(&pdev->dev);
- 
- 	i2c = kzalloc(sizeof(*i2c), GFP_KERNEL);
- 	if (!i2c)
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0106-i2c-move-OF-helpers-into-the-core.patch b/patches.zynq/0106-i2c-move-OF-helpers-into-the-core.patch
deleted file mode 100644
index 00f9cae0ea2e8..0000000000000
--- a/patches.zynq/0106-i2c-move-OF-helpers-into-the-core.patch
+++ /dev/null
@@ -1,43 +0,0 @@
-From 7a39796c4ef5ae419ab7c7c03487298bfef4c48b Mon Sep 17 00:00:00 2001
-From: Wolfram Sang <wsa@the-dreams.de>
-Date: Thu, 11 Jul 2013 12:56:15 +0100
-Subject: i2c: move OF helpers into the core
-
-I2C of helpers used to live in of_i2c.c but experience (from SPI) shows
-that it is much cleaner to have this in the core. This also removes a
-circular dependency between the helpers and the core, and so we can
-finally register child nodes in the core instead of doing this manually
-in each driver. So, fix the drivers and documentation, too.
-
-Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-(cherry picked from commit 687b81d083c082bc1e853032e3a2a54f8c251d27)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/i2c/busses/i2c-xiic.c | 3 ---
- 1 file changed, 3 deletions(-)
-
-diff --git a/drivers/i2c/busses/i2c-xiic.c b/drivers/i2c/busses/i2c-xiic.c
-index 433f377b3869..4c8b368d463b 100644
---- a/drivers/i2c/busses/i2c-xiic.c
-+++ b/drivers/i2c/busses/i2c-xiic.c
-@@ -40,7 +40,6 @@
- #include <linux/i2c-xiic.h>
- #include <linux/io.h>
- #include <linux/slab.h>
--#include <linux/of_i2c.h>
- 
- #define DRIVER_NAME "xiic-i2c"
- 
-@@ -752,8 +751,6 @@ static int xiic_i2c_probe(struct platform_device *pdev)
- 			i2c_new_device(&i2c->adap, pdata->devices + i);
- 	}
- 
--	of_i2c_register_devices(&i2c->adap);
--
- 	return 0;
- 
- add_adapter_failed:
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0107-i2c-xiic-Remove-casting-the-return-value-which-is-a-.patch b/patches.zynq/0107-i2c-xiic-Remove-casting-the-return-value-which-is-a-.patch
deleted file mode 100644
index f35a02b98f1fb..0000000000000
--- a/patches.zynq/0107-i2c-xiic-Remove-casting-the-return-value-which-is-a-.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From 31c6919def0a6fa9d1a688cc88135d24bdd67ff0 Mon Sep 17 00:00:00 2001
-From: Jingoo Han <jg1.han@samsung.com>
-Date: Mon, 9 Sep 2013 14:31:29 +0900
-Subject: i2c: xiic: Remove casting the return value which is a void pointer
-
-Casting the return value which is a void pointer is redundant.
-The conversion from void pointer to any other pointer type is
-guaranteed by the C programming language.
-
-Signed-off-by: Jingoo Han <jg1.han@samsung.com>
-Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-(cherry picked from commit ab0dc7a81df2595a18b328d2c7031b00bd7efb1e)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/i2c/busses/i2c-xiic.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/i2c/busses/i2c-xiic.c b/drivers/i2c/busses/i2c-xiic.c
-index 4c8b368d463b..6e7b09c1804e 100644
---- a/drivers/i2c/busses/i2c-xiic.c
-+++ b/drivers/i2c/busses/i2c-xiic.c
-@@ -702,7 +702,7 @@ static int xiic_i2c_probe(struct platform_device *pdev)
- 	if (irq < 0)
- 		goto resource_missing;
- 
--	pdata = (struct xiic_i2c_platform_data *)dev_get_platdata(&pdev->dev);
-+	pdata = dev_get_platdata(&pdev->dev);
- 
- 	i2c = kzalloc(sizeof(*i2c), GFP_KERNEL);
- 	if (!i2c)
--- 
-1.8.5.rc3
-
diff --git a/patches.zynq/0108-i2c-Include-linux-of.h-header.patch b/patches.zynq/0108-i2c-Include-linux-of.h-header.patch
deleted file mode 100644
index e58b20192df18..0000000000000
--- a/patches.zynq/0108-i2c-Include-linux-of.h-header.patch
+++ /dev/null
@@ -1,27 +0,0 @@
-From b23190e75268c9d372d2ba5f0c258b32a4fffe82 Mon Sep 17 00:00:00 2001
-From: Sachin Kamat <sachin.kamat@linaro.org>
-Date: Wed, 16 Oct 2013 15:26:33 +0530
-Subject: i2c: Include linux/of.h header
-
-'of_match_ptr' is defined in linux/of.h. Include it explicitly to
-avoid build breakage in the future.
-
-Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
-Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-(cherry picked from commit 4edd65e63fe4a998164a8d7d8c8c86f4300825d7)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/i2c/busses/i2c-xiic.c |    1 +
- 1 file changed, 1 insertion(+)
-
---- a/drivers/i2c/busses/i2c-xiic.c
-+++ b/drivers/i2c/busses/i2c-xiic.c
-@@ -40,6 +40,7 @@
- #include <linux/i2c-xiic.h>
- #include <linux/io.h>
- #include <linux/slab.h>
-+#include <linux/of.h>
- 
- #define DRIVER_NAME "xiic-i2c"
- 
diff --git a/patches.zynq/i2c-si570-merge-support-for-si570-clock-generator.patch b/patches.zynq/i2c-si570-merge-support-for-si570-clock-generator.patch
deleted file mode 100644
index 58be836572e9e..0000000000000
--- a/patches.zynq/i2c-si570-merge-support-for-si570-clock-generator.patch
+++ /dev/null
@@ -1,667 +0,0 @@
-From foo@baz Fri Jan 10 14:47:34 PST 2014
-From: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Date: Tue,  7 Jan 2014 15:48:10 +0900
-Subject: [PATCH V2 02/12] i2c: si570: merge support for si570 clock generator
-To: ltsi-dev@lists.linuxfoundation.org
-Cc: gregkh@linuxfoundation.org, michal.simek@xilinx.com
-Message-ID: <1389077290-13613-3-git-send-email-daniel.sangorrin@toshiba.co.jp>
-
-
-From: Rob Armstrong <ra@xilinx.com>
-
-This merges support for the si5790 clock generator from the Xilinx
-repository (commit efc27505715e64526653f35274717c0fc56491e3 from
-master branch).
-
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- drivers/misc/Kconfig      |   10 
- drivers/misc/Makefile     |    1 
- drivers/misc/si570.c      |  575 ++++++++++++++++++++++++++++++++++++++++++++++
- include/linux/i2c/si570.h |   31 ++
- 4 files changed, 617 insertions(+)
- create mode 100644 drivers/misc/si570.c
- create mode 100644 include/linux/i2c/si570.h
-
---- a/drivers/misc/Kconfig
-+++ b/drivers/misc/Kconfig
-@@ -507,6 +507,16 @@ config USB_SWITCH_FSA9480
- 	  stereo and mono audio, video, microphone and UART data to use
- 	  a common connector port.
- 
-+config SI570
-+	tristate "Silicon Labs Si570 Clock Generator"
-+	depends on I2C && SYSFS
-+	help
-+	  If you say yes here you get support for the Silicon Labs Si570
-+	  digital clock generator.
-+
-+	  To compile this driver as a module, choose M here: the module
-+	  will be called si570
-+
- config LATTICE_ECP3_CONFIG
- 	tristate "Lattice ECP3 FPGA bitstream configuration via SPI"
- 	depends on SPI && SYSFS
---- a/drivers/misc/Makefile
-+++ b/drivers/misc/Makefile
-@@ -50,6 +50,7 @@ obj-y				+= carma/
- obj-$(CONFIG_USB_SWITCH_FSA9480) += fsa9480.o
- obj-$(CONFIG_ALTERA_STAPL)	+=altera-stapl/
- obj-$(CONFIG_INTEL_MEI)		+= mei/
-+obj-$(CONFIG_SI570)		+= si570.o
- obj-$(CONFIG_VMWARE_VMCI)	+= vmw_vmci/
- obj-$(CONFIG_LATTICE_ECP3_CONFIG)	+= lattice-ecp3-config.o
- obj-$(CONFIG_SRAM)		+= sram.o
---- /dev/null
-+++ b/drivers/misc/si570.c
-@@ -0,0 +1,575 @@
-+/*
-+ * Driver for Silicon Labs Si570/Si571 Programmable XO/VCXO
-+ *
-+ * Copyright (C) 2010, 2011 Ericsson AB.
-+ * Copyright (C) 2011 Guenter Roeck.
-+ *
-+ * Author: Guenter Roeck <guenter.roeck@ericsson.com>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ */
-+
-+#include <linux/module.h>
-+#include <linux/jiffies.h>
-+#include <linux/i2c.h>
-+#include <linux/err.h>
-+#include <linux/mutex.h>
-+#include <linux/delay.h>
-+#include <linux/log2.h>
-+#include <linux/slab.h>
-+#include <linux/i2c/si570.h>
-+
-+/* Si570 registers */
-+#define SI570_REG_HS_N1		7
-+#define SI570_REG_N1_RFREQ0	8
-+#define SI570_REG_RFREQ1	9
-+#define SI570_REG_RFREQ2	10
-+#define SI570_REG_RFREQ3	11
-+#define SI570_REG_RFREQ4	12
-+#define SI570_REG_CONTROL	135
-+#define SI570_REG_FREEZE_DCO	137
-+
-+#define HS_DIV_SHIFT		5
-+#define HS_DIV_MASK		0xe0
-+#define HS_DIV_OFFSET		4
-+#define N1_6_2_MASK		0x1f
-+#define N1_1_0_MASK		0xc0
-+#define RFREQ_37_32_MASK	0x3f
-+
-+#define SI570_FOUT_FACTORY_DFLT	156250000LL
-+#define SI598_FOUT_FACTORY_DFLT	10000000LL
-+
-+#define SI570_MIN_FREQ		10000000L
-+#define SI570_MAX_FREQ		1417500000L
-+#define SI598_MAX_FREQ		525000000L
-+
-+#define FDCO_MIN		4850000000LL
-+#define FDCO_MAX		5670000000LL
-+#define FDCO_CENTER		((FDCO_MIN + FDCO_MAX) / 2)
-+
-+#define SI570_CNTRL_RECALL	(1 << 0)
-+#define SI570_CNTRL_FREEZE_ADC	(1 << 4)
-+#define SI570_CNTRL_FREEZE_M	(1 << 5)
-+#define SI570_CNTRL_NEWFREQ	(1 << 6)
-+#define SI570_CNTRL_RESET	(1 << 7)
-+
-+#define SI570_FREEZE_DCO	(1 << 4)
-+#define SI570_UNFREEZE_DCO	0xEF
-+
-+struct si570_data {
-+	struct attribute_group attrs;
-+	struct mutex lock;
-+	u64 max_freq;
-+	u64 fout;		/* Factory default frequency */
-+	u64 fxtal;		/* Factory xtal frequency */
-+	unsigned int n1;
-+	unsigned int hs_div;
-+	u64 rfreq;
-+	u64 frequency;
-+};
-+
-+
-+static struct i2c_client *si570_client;
-+
-+
-+static int si570_get_defaults(struct i2c_client *client)
-+{
-+	struct si570_data *data = i2c_get_clientdata(client);
-+	int reg1, reg2, reg3, reg4, reg5, reg6;
-+	u64 fdco;
-+
-+	i2c_smbus_write_byte_data(client, SI570_REG_CONTROL,
-+				  SI570_CNTRL_RECALL);
-+
-+	reg1 = i2c_smbus_read_byte_data(client, SI570_REG_HS_N1);
-+	if (reg1 < 0)
-+		return reg1;
-+	reg2 = i2c_smbus_read_byte_data(client, SI570_REG_N1_RFREQ0);
-+	if (reg2 < 0)
-+		return reg2;
-+	reg3 = i2c_smbus_read_byte_data(client, SI570_REG_RFREQ1);
-+	if (reg3 < 0)
-+		return reg3;
-+	reg4 = i2c_smbus_read_byte_data(client, SI570_REG_RFREQ2);
-+	if (reg4 < 0)
-+		return reg4;
-+	reg5 = i2c_smbus_read_byte_data(client, SI570_REG_RFREQ3);
-+	if (reg5 < 0)
-+		return reg5;
-+	reg6 = i2c_smbus_read_byte_data(client, SI570_REG_RFREQ4);
-+	if (reg6 < 0)
-+		return reg6;
-+
-+	data->hs_div = ((reg1 & HS_DIV_MASK) >> HS_DIV_SHIFT) + HS_DIV_OFFSET;
-+	data->n1 = ((reg1 & N1_6_2_MASK) << 2) + ((reg2 & N1_1_0_MASK) >> 6)
-+	  + 1;
-+	/* Handle invalid cases */
-+	if (data->n1 > 1)
-+		data->n1 &= ~1;
-+
-+	data->rfreq = reg2 & RFREQ_37_32_MASK;
-+	data->rfreq = (data->rfreq << 8) + reg3;
-+	data->rfreq = (data->rfreq << 8) + reg4;
-+	data->rfreq = (data->rfreq << 8) + reg5;
-+	data->rfreq = (data->rfreq << 8) + reg6;
-+
-+	/*
-+	 * Accept optional precision loss to avoid arithmetic overflows.
-+	 * Acceptable per Silicon Labs Application Note AN334.
-+	 */
-+	fdco = data->fout * data->n1 * data->hs_div;
-+	if (fdco >= (1LL << 36))
-+		data->fxtal = div64_u64((fdco << 24), (data->rfreq >> 4));
-+	else
-+		data->fxtal = div64_u64((fdco << 28), data->rfreq);
-+
-+	data->frequency = data->fout;
-+
-+	return 0;
-+}
-+
-+/*
-+ * Update rfreq registers
-+ * This function must be called with update mutex lock held.
-+ */
-+static void si570_update_rfreq(struct i2c_client *client,
-+			       struct si570_data *data)
-+{
-+	int status;
-+	status = i2c_smbus_write_byte_data(client, SI570_REG_N1_RFREQ0,
-+				  ((data->n1 - 1) << 6)
-+				  | ((data->rfreq >> 32) & RFREQ_37_32_MASK));
-+	if (status < 0)
-+		dev_err(&client->dev,
-+			"unable to write 0x%llX to REG_N1_RFREQ0: %d\n",
-+			(((data->n1 - 1) << 6) | ((data->rfreq >> 32) &
-+			RFREQ_37_32_MASK)) & 0xff, status);
-+	status = i2c_smbus_write_byte_data(client, SI570_REG_RFREQ1,
-+				  (data->rfreq >> 24) & 0xff);
-+	if (status < 0)
-+		dev_err(&client->dev,
-+			"unable to write 0x%llX to REG_RFREQ1: %d\n",
-+			(data->rfreq >> 24) & 0xff, status);
-+	status = i2c_smbus_write_byte_data(client, SI570_REG_RFREQ2,
-+				  (data->rfreq >> 16) & 0xff);
-+	if (status < 0)
-+		dev_err(&client->dev,
-+			"unable to write 0x%llX to REG_RFREQ2: %d\n",
-+			(data->rfreq >> 16) & 0xff, status);
-+	status = i2c_smbus_write_byte_data(client, SI570_REG_RFREQ3,
-+				  (data->rfreq >> 8) & 0xff);
-+	if (status < 0)
-+		dev_err(&client->dev,
-+			"unable to write 0x%llX to REG_RFREQ3: %d\n",
-+			(data->rfreq >> 8) & 0xff, status);
-+	status = i2c_smbus_write_byte_data(client, SI570_REG_RFREQ4,
-+				  data->rfreq & 0xff);
-+	if (status < 0)
-+		dev_err(&client->dev,
-+			"unable to write 0x%llX to REG_RFREQ4: %d\n",
-+			data->rfreq & 0xff, status);
-+}
-+
-+/*
-+ * Update si570 frequency for small frequency changes (< 3,500 ppm)
-+ * This function must be called with update mutex lock held.
-+ */
-+static int si570_set_frequency_small(struct i2c_client *client,
-+				     struct si570_data *data,
-+				     unsigned long frequency)
-+{
-+	data->frequency = frequency;
-+	/* This is a re-implementation of DIV_ROUND_CLOSEST
-+	 * using the div64_u64 function lieu of letting the compiler
-+	 * insert EABI calls
-+	 */
-+	data->rfreq = div64_u64((data->rfreq * frequency) +
-+		div64_u64(data->frequency, 2), data->frequency);
-+	i2c_smbus_write_byte_data(client, SI570_REG_CONTROL,
-+				  SI570_CNTRL_FREEZE_M);
-+	si570_update_rfreq(client, data);
-+	i2c_smbus_write_byte_data(client, SI570_REG_CONTROL, 0);
-+
-+	return 0;
-+}
-+
-+static const uint8_t si570_hs_div_values[] = { 11, 9, 7, 6, 5, 4 };
-+
-+/*
-+ * Set si570 frequency.
-+ * This function must be called with update mutex lock held.
-+ */
-+static int si570_set_frequency(struct i2c_client *client,
-+			       struct si570_data *data,
-+			       unsigned long frequency)
-+{
-+	int i, n1, hs_div;
-+	u64 fdco, best_fdco = ULLONG_MAX;
-+
-+	for (i = 0; i < ARRAY_SIZE(si570_hs_div_values); i++) {
-+		hs_div = si570_hs_div_values[i];
-+		/* Calculate lowest possible value for n1 */
-+		n1 = div64_u64(div64_u64(FDCO_MIN, (u64)hs_div),
-+			(u64)frequency);
-+		if (!n1 || (n1 & 1))
-+			n1++;
-+		while (n1 <= 128) {
-+			fdco = (u64)frequency * (u64)hs_div * (u64)n1;
-+			if (fdco > FDCO_MAX)
-+				break;
-+			if (fdco >= FDCO_MIN && fdco < best_fdco) {
-+				data->n1 = n1;
-+				data->hs_div = hs_div;
-+				data->frequency = frequency;
-+				data->rfreq = div64_u64((fdco << 28),
-+					data->fxtal);
-+				best_fdco = fdco;
-+			}
-+			n1 += (n1 == 1 ? 1 : 2);
-+		}
-+	}
-+	if (best_fdco == ULLONG_MAX) {
-+		dev_err(&client->dev, "error - best FDCO is out of range\n");
-+		return -EINVAL;
-+	}
-+
-+	/* The DCO reg should be accessed with a read-modify-write operation
-+	 * per AN334
-+	 */
-+	i2c_smbus_write_byte_data(client, SI570_REG_FREEZE_DCO,
-+				  SI570_FREEZE_DCO);
-+	i2c_smbus_write_byte_data(client, SI570_REG_HS_N1,
-+				  ((data->hs_div - HS_DIV_OFFSET) <<
-+				   HS_DIV_SHIFT)
-+				  | (((data->n1 - 1) >> 2) & N1_6_2_MASK));
-+	si570_update_rfreq(client, data);
-+	i2c_smbus_write_byte_data(client, SI570_REG_FREEZE_DCO,
-+				  0);
-+	i2c_smbus_write_byte_data(client, SI570_REG_CONTROL,
-+				  SI570_CNTRL_NEWFREQ);
-+	return 0;
-+}
-+
-+/*
-+ * Reset chip.
-+ * This function must be called with update mutex lock held.
-+ */
-+static int si570_reset(struct i2c_client *client, struct si570_data *data)
-+{
-+	i2c_smbus_write_byte_data(client, SI570_REG_CONTROL,
-+				  SI570_CNTRL_RESET);
-+	usleep_range(1000, 5000);
-+	return si570_set_frequency(client, data, data->frequency);
-+}
-+
-+static ssize_t show_frequency_attr(struct device *dev,
-+			      struct device_attribute *devattr,
-+			      char *buf)
-+{
-+	struct i2c_client *client = to_i2c_client(dev);
-+	struct si570_data *data = i2c_get_clientdata(client);
-+
-+	return sprintf(buf, "%llu\n", data->frequency);
-+}
-+
-+int get_frequency_si570(struct device *dev, unsigned long *freq)
-+{
-+	int err;
-+	char buf[10+1];
-+
-+	if ((!dev) || (to_i2c_client(dev) != si570_client))
-+		return -EINVAL;
-+
-+	show_frequency_attr(dev, NULL, buf);
-+
-+	err = kstrtoul(buf, 10, freq);
-+	if (err)
-+		return err;
-+
-+	return 0;
-+}
-+EXPORT_SYMBOL(get_frequency_si570);
-+
-+static ssize_t set_frequency_attr(struct device *dev,
-+			     struct device_attribute *attr,
-+			     const char *buf, size_t count)
-+{
-+	struct i2c_client *client = to_i2c_client(dev);
-+	struct si570_data *data = i2c_get_clientdata(client);
-+	unsigned long val;
-+	int err;
-+
-+	err = kstrtoul(buf, 10, &val);
-+	if (err)
-+		return err;
-+
-+	if (val < SI570_MIN_FREQ || val > data->max_freq) {
-+		dev_err(&client->dev,
-+			"requested frequency %lu Hz is out of range\n", val);
-+		return -EINVAL;
-+	}
-+
-+	mutex_lock(&data->lock);
-+
-+	if (div64_u64(abs(val - data->frequency) * 10000LL,
-+		data->frequency) < 35)
-+		err = si570_set_frequency_small(client, data, val);
-+	else
-+		err = si570_set_frequency(client, data, val);
-+	mutex_unlock(&data->lock);
-+	if (err) {
-+		dev_warn(&client->dev,
-+			"unable to set output frequency %lu Hz: %d\n",
-+			val, err);
-+		return err;
-+	}
-+
-+	dev_info(&client->dev,
-+		"set new output frequency %lu Hz\n", val);
-+
-+	return count;
-+}
-+
-+int set_frequency_si570(struct device *dev, unsigned long freq)
-+{
-+	char buf[10+1];
-+
-+	if ((!dev) || (to_i2c_client(dev) != si570_client))
-+		return -EINVAL;
-+
-+	sprintf(buf, "%lu", freq);
-+
-+	return set_frequency_attr(dev, NULL, buf,  0);
-+}
-+EXPORT_SYMBOL(set_frequency_si570);
-+
-+static ssize_t show_reset_attr(struct device *dev,
-+			  struct device_attribute *devattr,
-+			  char *buf)
-+{
-+	return sprintf(buf, "%d\n", 0);
-+}
-+
-+static ssize_t set_reset_attr(struct device *dev,
-+			 struct device_attribute *attr,
-+			 const char *buf, size_t count)
-+{
-+	struct i2c_client *client = to_i2c_client(dev);
-+	struct si570_data *data = i2c_get_clientdata(client);
-+	unsigned long val;
-+	int err;
-+
-+	err = kstrtoul(buf, 10, &val);
-+	if (err)
-+		return err;
-+	if (val == 0)
-+		goto done;
-+
-+	mutex_lock(&data->lock);
-+	err = si570_reset(client, data);
-+	mutex_unlock(&data->lock);
-+	if (err)
-+		return err;
-+done:
-+	return count;
-+}
-+
-+int reset_si570(struct device *dev, int id)
-+{
-+	char buf[4];
-+
-+	if ((!dev) || (to_i2c_client(dev) != si570_client))
-+		return -EINVAL;
-+
-+	sprintf(buf, "%lu", (unsigned long)id);
-+	return set_reset_attr(dev, NULL, buf, 0);
-+}
-+EXPORT_SYMBOL(reset_si570);
-+
-+struct i2c_client *get_i2c_client_si570(void)
-+{
-+	return si570_client;
-+}
-+EXPORT_SYMBOL(get_i2c_client_si570);
-+
-+static DEVICE_ATTR(frequency, S_IWUSR | S_IRUGO, show_frequency_attr,
-+		   set_frequency_attr);
-+static DEVICE_ATTR(reset, S_IWUSR | S_IRUGO, show_reset_attr, set_reset_attr);
-+
-+static struct attribute *si570_attr[] = {
-+	&dev_attr_frequency.attr,
-+	&dev_attr_reset.attr,
-+	NULL
-+};
-+
-+static const struct i2c_device_id si570_id[] = {
-+	{ "si570", 0 },
-+	{ "si571", 0 },
-+	{ "si598", 1 },
-+	{ "si599", 1 },
-+	{ }
-+};
-+MODULE_DEVICE_TABLE(i2c, si570_id);
-+
-+static int si570_probe(struct i2c_client *client,
-+		       const struct i2c_device_id *id)
-+{
-+	struct si570_platform_data *pdata = client->dev.platform_data;
-+	struct si570_data *data;
-+	int err;
-+	unsigned long initial_fout;
-+	u32 tmp = SI570_FOUT_FACTORY_DFLT;
-+
-+	data = kzalloc(sizeof(struct si570_data), GFP_KERNEL);
-+	if (!data) {
-+		err = -ENOMEM;
-+		goto exit;
-+	}
-+
-+	if (id->driver_data) {
-+		data->fout = SI598_FOUT_FACTORY_DFLT;
-+		data->max_freq = SI598_MAX_FREQ;
-+	} else {
-+		data->fout = SI570_FOUT_FACTORY_DFLT;
-+		data->max_freq = SI570_MAX_FREQ;
-+	}
-+
-+	if (pdata && pdata->factory_fout)
-+		data->fout = pdata->factory_fout;
-+
-+	if (client->dev.of_node &&
-+		(of_property_read_u32(client->dev.of_node, "factory-fout",
-+			&tmp) < 0))
-+		dev_warn(&client->dev,
-+			"DTS does not contain factory-fout, using default\n");
-+	else
-+		data->fout = tmp;
-+
-+	i2c_set_clientdata(client, data);
-+	err = si570_get_defaults(client);
-+	if (err < 0)
-+		goto exit_free;
-+
-+	mutex_init(&data->lock);
-+
-+	/* Register sysfs hooks */
-+	data->attrs.attrs = si570_attr;
-+	err = sysfs_create_group(&client->dev.kobj, &data->attrs);
-+	if (err)
-+		goto exit_free;
-+
-+	/* Display a message indicating that we've successfully registered */
-+	dev_info(&client->dev,
-+		"registered %s with default frequency %llu Hz\n",
-+		id->name, data->fout);
-+
-+	/* Read the requested initial fout from either platform data or the
-+	 * device tree
-+	 */
-+	initial_fout = 0;
-+	if (pdata && pdata->initial_fout)
-+		initial_fout = pdata->initial_fout;
-+	if (client->dev.of_node) {
-+		of_property_read_u32(client->dev.of_node, "initial-fout",
-+			(u32 *)&initial_fout);
-+		if (pdata && pdata->initial_fout &&
-+			(pdata->initial_fout != initial_fout)) {
-+			dev_warn(&client->dev,
-+				"OF initial fout %lu overrides platform data fout %lu\n",
-+				initial_fout,
-+				pdata->initial_fout);
-+		}
-+	}
-+
-+	if (initial_fout != 0) {
-+		if (initial_fout < SI570_MIN_FREQ ||
-+			initial_fout > data->max_freq) {
-+			dev_err(&client->dev,
-+				"requested initial frequency %lu is out of range, using default\n",
-+				initial_fout);
-+			return 0;
-+		}
-+
-+		mutex_lock(&data->lock);
-+
-+		if (div64_u64(abs(initial_fout - data->frequency) *
-+			10000LL, data->frequency) < 35)
-+			err = si570_set_frequency_small(client, data,
-+				initial_fout);
-+		else
-+			err = si570_set_frequency(client, data,
-+				initial_fout);
-+		mutex_unlock(&data->lock);
-+		if (err) {
-+			dev_warn(&client->dev,
-+				"unable to set initial output frequency %lu: %d\n",
-+				initial_fout, err);
-+			return err;
-+		}
-+
-+		dev_info(&client->dev,
-+			"set initial output frequency %lu Hz\n",
-+			initial_fout);
-+	}
-+
-+	si570_client = client;
-+
-+	return 0;
-+
-+exit_free:
-+	kfree(data);
-+exit:
-+	return err;
-+}
-+
-+static int si570_remove(struct i2c_client *client)
-+{
-+	struct si570_data *data = i2c_get_clientdata(client);
-+
-+	sysfs_remove_group(&client->dev.kobj, &data->attrs);
-+	kfree(data);
-+	return 0;
-+}
-+
-+#ifdef CONFIG_OF
-+static const struct of_device_id i2c_si570_of_match[] = {
-+	{ .compatible = "si570" },
-+	{ },
-+};
-+MODULE_DEVICE_TABLE(of, i2c_si570_of_match);
-+#endif
-+
-+static struct i2c_driver si570_driver = {
-+	.driver = {
-+		.name	= "si570",
-+		.of_match_table = of_match_ptr(i2c_si570_of_match),
-+	},
-+	.probe		= si570_probe,
-+	.remove		= si570_remove,
-+	.id_table	= si570_id,
-+};
-+
-+static int __init si570_init(void)
-+{
-+	return i2c_add_driver(&si570_driver);
-+}
-+
-+static void __exit si570_exit(void)
-+{
-+	i2c_del_driver(&si570_driver);
-+}
-+
-+MODULE_AUTHOR("Guenter Roeck <guenter.roeck@ericsson.com>");
-+MODULE_DESCRIPTION("Si570 driver");
-+MODULE_LICENSE("GPL");
-+
-+module_init(si570_init);
-+module_exit(si570_exit);
---- /dev/null
-+++ b/include/linux/i2c/si570.h
-@@ -0,0 +1,31 @@
-+/*
-+ * si570.h - Configuration for si570 misc driver.
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation (version 2 of the License only).
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ */
-+
-+#ifndef __LINUX_SI570_H
-+#define __LINUX_SI570_H
-+
-+#include <linux/types.h>
-+#include <linux/device.h>
-+#include <linux/i2c.h>
-+
-+struct si570_platform_data {
-+	u64 factory_fout;		/* Factory default output frequency */
-+	unsigned long initial_fout;	/* Requested initial frequency */
-+};
-+
-+int get_frequency_si570(struct device *dev, unsigned long *freq);
-+int set_frequency_si570(struct device *dev, unsigned long freq);
-+int reset_si570(struct device *dev, int id);
-+struct i2c_client *get_i2c_client_si570(void);
-+
-+#endif /* __LINUX_SI570_H */
diff --git a/patches.zynq/of-remove-ifdef-from-linux-of_platform.h.patch b/patches.zynq/of-remove-ifdef-from-linux-of_platform.h.patch
deleted file mode 100644
index b168a924fce2e..0000000000000
--- a/patches.zynq/of-remove-ifdef-from-linux-of_platform.h.patch
+++ /dev/null
@@ -1,77 +0,0 @@
-From foo@baz Fri Jan 10 14:47:34 PST 2014
-From: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Date: Tue,  7 Jan 2014 15:48:09 +0900
-Subject: [PATCH] of: remove #ifdef from linux/of_platform.h
-To: ltsi-dev@lists.linuxfoundation.org
-Cc: gregkh@linuxfoundation.org, michal.simek@xilinx.com
-Message-ID: <1389077290-13613-2-git-send-email-daniel.sangorrin@toshiba.co.jp>
-
-
-From: Arnd Bergmann <arnd@arndb.de>
-
-A lot of code uses the functions from of_platform.h when built for
-devicetree-enabled platforms but can also be built without them.
-In order to avoid using #ifdef everywhere in drivers, this
-makes all the function declarations visible, which means we
-can use "if (IS_ENABLED(CONFIG_OF))" in driver code and get build
-coverage over the code but let the compiler drop the reference
-in the object code.
-
-Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-Cc: Grant Likely <grant.likely@linaro.org>
-Cc: Rob Herring <rob.herring@calxeda.com>
-Signed-off-by: Grant Likely <grant.likely@linaro.org>
-(cherry picked from commit 8a46f4f7f95f2bece108998a2e1b87b58f99d590)
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- include/linux/of_platform.h |   14 +++-----------
- 1 file changed, 3 insertions(+), 11 deletions(-)
-
---- a/include/linux/of_platform.h
-+++ b/include/linux/of_platform.h
-@@ -13,8 +13,6 @@
- 
- #include <linux/device.h>
- #include <linux/mod_devicetable.h>
--
--#ifdef CONFIG_OF_DEVICE
- #include <linux/pm.h>
- #include <linux/of_device.h>
- #include <linux/platform_device.h>
-@@ -82,7 +80,6 @@ extern struct platform_device *of_device
- 					 struct device *parent);
- extern struct platform_device *of_find_device_by_node(struct device_node *np);
- 
--#ifdef CONFIG_OF_ADDRESS /* device reg helpers depend on OF_ADDRESS */
- /* Platform devices and busses creation */
- extern struct platform_device *of_platform_device_create(struct device_node *np,
- 						   const char *bus_id,
-@@ -91,17 +88,12 @@ extern struct platform_device *of_platfo
- extern int of_platform_bus_probe(struct device_node *root,
- 				 const struct of_device_id *matches,
- 				 struct device *parent);
-+#ifdef CONFIG_OF_ADDRESS
- extern int of_platform_populate(struct device_node *root,
- 				const struct of_device_id *matches,
- 				const struct of_dev_auxdata *lookup,
- 				struct device *parent);
--#endif /* CONFIG_OF_ADDRESS */
--
--#endif /* CONFIG_OF_DEVICE */
--
--#if !defined(CONFIG_OF_ADDRESS)
--struct of_dev_auxdata;
--struct device_node;
-+#else
- static inline int of_platform_populate(struct device_node *root,
- 					const struct of_device_id *matches,
- 					const struct of_dev_auxdata *lookup,
-@@ -109,6 +101,6 @@ static inline int of_platform_populate(s
- {
- 	return -ENODEV;
- }
--#endif /* !CONFIG_OF_ADDRESS */
-+#endif
- 
- #endif	/* _LINUX_OF_PLATFORM_H */
diff --git a/patches.zynq/xilinx-arm-arasan-put-arasan-as-default-driver-for-zynq-in-dt.patch b/patches.zynq/xilinx-arm-arasan-put-arasan-as-default-driver-for-zynq-in-dt.patch
deleted file mode 100644
index a3bc072a43722..0000000000000
--- a/patches.zynq/xilinx-arm-arasan-put-arasan-as-default-driver-for-zynq-in-dt.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From daniel.sangorrin@toshiba.co.jp Mon Jan 20 22:23:17 2014
-From: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Date: Tue, 21 Jan 2014 15:23:07 +0900
-Subject: [PATCH 2/2] Xilinx: ARM: Arasan: put Arasan as default driver for Zynq in DT
-To: ltsi-dev@lists.linuxfoundation.org
-Cc: gregkh@linuxfoundation.org, michal.simek@xilinx.com
-Message-ID: <1390285387-30514-4-git-send-email-daniel.sangorrin@toshiba.co.jp>
-
-
-From: Soren Brinkmann <soren.brinkmann@xilinx.com>
-
-Just a fix so that Arasan SDCard driver is chosen over the generic driver.
-
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- arch/arm/boot/dts/zynq-zc702.dts |    2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/arch/arm/boot/dts/zynq-zc702.dts
-+++ b/arch/arm/boot/dts/zynq-zc702.dts
-@@ -301,7 +301,7 @@
- 			clock-frequency = <50000000>;
- 			clock-names = "clk_xin", "clk_ahb";
- 			clocks = <&clkc 21>, <&clkc 32>;
--			compatible = "xlnx,ps7-sdio-1.00.a", "generic-sdhci", "arasan,sdhci-8.9a";
-+			compatible = "arasan,sdhci-8.9a", "xlnx,ps7-sdio-1.00.a", "generic-sdhci";
- 			interrupt-parent = <&ps7_scugic_0>;
- 			interrupts = <0 24 4>;
- 			reg = <0xe0100000 0x1000>;
diff --git a/patches.zynq/xilinx-arm-bsp-prevent-dma-into-lower-memory.patch b/patches.zynq/xilinx-arm-bsp-prevent-dma-into-lower-memory.patch
deleted file mode 100644
index f7742beeef021..0000000000000
--- a/patches.zynq/xilinx-arm-bsp-prevent-dma-into-lower-memory.patch
+++ /dev/null
@@ -1,64 +0,0 @@
-From daniel.sangorrin@toshiba.co.jp Mon Jan 20 22:23:22 2014
-From: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Date: Tue, 21 Jan 2014 15:23:06 +0900
-Subject: [PATCH 1/2] Xilinx: ARM: BSP: prevent DMA into lower memory
-To: ltsi-dev@lists.linuxfoundation.org
-Cc: gregkh@linuxfoundation.org, michal.simek@xilinx.com
-Message-ID: <1390285387-30514-3-git-send-email-daniel.sangorrin@toshiba.co.jp>
-
-
-From: John Linn <john.linn@xilinx.com>
-
-The DMA zone from 2.6.39 is no longer supported such that
-a new method was needed. The old method was lost in the
-move to 3.0 and USB was seeing failures.
-(commit 83e198c01c381a1d90ba07e241a517d1dabf7c84 in Xilinx
-repository)
-
-Signed-off-by: Daniel Sangorrin <daniel.sangorrin@toshiba.co.jp>
-Signed-off-by: Yoshitake Kobayashi <yoshitake.kobayashi@toshiba.co.jp>
----
- arch/arm/mach-zynq/common.c |   19 ++++++++++++++++++-
- 1 file changed, 18 insertions(+), 1 deletion(-)
-
---- a/arch/arm/mach-zynq/common.c
-+++ b/arch/arm/mach-zynq/common.c
-@@ -25,7 +25,7 @@
- #include <linux/of_irq.h>
- #include <linux/of_platform.h>
- #include <linux/of.h>
--
-+#include <linux/memblock.h>
- #include <asm/mach/arch.h>
- #include <asm/mach/map.h>
- #include <asm/mach/time.h>
-@@ -39,6 +39,22 @@
- 
- void __iomem *zynq_scu_base;
- 
-+/**
-+ * zynq_memory_init() - Initialize special memory
-+ *
-+ * We need to stop things allocating the low memory as DMA can't work in
-+ * the 1st 512K of memory.  Using reserve vs remove is not totally clear yet.
-+ */
-+static void __init zynq_memory_init(void)
-+{
-+	/*
-+	 * Reserve the 0-0x4000 addresses (before page tables and kernel)
-+	 * which can't be used for DMA
-+	 */
-+	if (!__pa(PAGE_OFFSET))
-+		memblock_reserve(0, 0x4000);
-+}
-+
- static struct of_device_id zynq_of_bus_ids[] __initdata = {
- 	{ .compatible = "simple-bus", },
- 	{}
-@@ -113,5 +129,6 @@ DT_MACHINE_START(XILINX_EP107, "Xilinx Z
- 	.init_machine	= zynq_init_machine,
- 	.init_time	= zynq_timer_init,
- 	.dt_compat	= zynq_dt_match,
-+	.reserve	= zynq_memory_init,
- 	.restart	= zynq_system_reset,
- MACHINE_END
diff --git a/series b/series
index 7f572abfcbe90..f316f2893e2f3 100644
--- a/series
+++ b/series
@@ -30,2544 +30,5 @@ patches.lttng/lttng-2.3.4.patch
 
 
 #############################################################################
-# Power efficient workqueues
-#
-patches.workqueues/0001-workqueues-Introduce-new-flag-WQ_POWER_EFFICIENT-for.patch
-patches.workqueues/0002-workqueue-Add-system-wide-power_efficient-workqueues.patch
-patches.workqueues/0003-PHYLIB-queue-work-on-system_power_efficient_wq.patch
-patches.workqueues/0004-block-queue-work-on-power-efficient-wq.patch
-patches.workqueues/0005-fbcon-queue-work-on-power-efficient-wq.patch
-patches.workqueues/0006-ASoC-pcm-Use-the-power-efficient-workqueue-for-delay.patch
-patches.workqueues/0007-regulator-core-Use-the-power-efficient-workqueue-for.patch
-patches.workqueues/0008-ASoC-jack-Use-power-efficient-workqueue.patch
-patches.workqueues/0009-extcon-gpio-Use-power-efficient-workqueue-for-deboun.patch
-patches.workqueues/0010-extcon-adc-jack-Use-power-efficient-workqueue.patch
-patches.workqueues/0011-ASoC-compress-Use-power-efficient-workqueue.patch
-
-
-#############################################################################
-# Renesas SOC patches
-#
-patches.renesas/0001-serial-sh-sci-HSCIF-support.patch
-patches.renesas/0002-serial-sh-sci-Initialise-variables-before-access-in-.patch
-patches.renesas/0003-serial-sh-sci-use-dev_get_platdata.patch
-patches.renesas/0004-ata-use-platform_-get-set-_drvdata.patch
-patches.renesas/0005-sata_rcar-kill-superfluous-code-in-sata_rcar_bmdma_f.patch
-patches.renesas/0006-sata_rcar-correct-sata_rcar_sht.patch
-patches.renesas/0007-sata_rcar-add-base-local-variable-to-some-functions.patch
-patches.renesas/0008-sata_rcar-fix-compilation-warning-in-sata_rcar_thaw.patch
-patches.renesas/0009-drivers-ata-sata_rcar.c-simplify-use-of-devm_ioremap.patch
-patches.renesas/0010-drivers-irq-chip-irq-gic-introduce-gic_cpu_if_down.patch
-patches.renesas/0011-irqchip-renesas-intc-irqpin-DT-binding-for-sense-bit.patch
-patches.renesas/0012-ARM-shmobile-irqpin-add-a-DT-property-to-enable-mask.patch
-patches.renesas/0015-clocksource-arch_timer-Make-register-accessors-less-.patch
-patches.renesas/0016-clocksource-arch_timer-Push-the-read-write-wrappers-.patch
-patches.renesas/0017-clocksource-em_sti-Convert-to-devm_-managed-helpers.patch
-patches.renesas/0020-gpio-rcar-Make-the-platform-data-gpio_base-field-sig.patch
-patches.renesas/0021-gpio-rcar-Add-support-for-IRQ_TYPE_EDGE_BOTH.patch
-patches.renesas/0022-gpio-rcar-Add-RCAR_GP_PIN-macro.patch
-patches.renesas/0023-gpio-rcar-Add-DT-support.patch
-patches.renesas/0024-gpio-rcar-Use-OUTDT-when-reading-GPIOs-configured-as.patch
-patches.renesas/0025-gpio-rcar-Reference-core-gpio-documentation-in-the-D.patch
-patches.renesas/0026-gpio-rcar-Remove-ifdef-CONFIG_OF-around-OF-specific-.patch
-patches.renesas/0027-gpio-rcar-fix-gpio_rcar_of_table.patch
-patches.renesas/0028-gpio-rcar-Add-interrupt-controller-support-to-the-DT.patch
-patches.renesas/0029-i2c-rcar-add-rcar-H2-support.patch
-patches.renesas/0030-thermal-rcar-Fix-typo-in-probe-information-message.patch
-patches.renesas/0031-Thermal-rcar-Remove-redundant-platform_set_drvdata.patch
-patches.renesas/0032-ASoC-fsi-fixup-sparse-errors.patch
-patches.renesas/0033-ASoC-add-Renesas-R-Car-core-feature.patch
-patches.renesas/0034-ASoC-fsi-reserve-prefetch-period-on-DMA-transferring.patch
-patches.renesas/0035-backlight-Add-GPIO-based-backlight-driver.patch
-patches.renesas/0036-pwm-Add-Renesas-TPU-PWM-driver.patch
-patches.renesas/0037-pwm-renesas-tpu-fix-return-value-check-in-tpu_probe.patch
-patches.renesas/0038-pwm-renesas-tpu-Add-MODULE_ALIAS-to-make-module-auto.patch
-patches.renesas/0039-pwm-renesas-tpu-Add-DT-support.patch
-patches.renesas/0040-pwm-simplify-use-of-devm_ioremap_resource.patch
-patches.renesas/0041-phy-rcar-usb-remove-EHCI-internal-buffer-setup.patch
-patches.renesas/0042-phy-rcar-usb-correct-base-address.patch
-patches.renesas/0043-phy-rcar-usb-add-platform-data.patch
-patches.renesas/0044-phy-rcar-usb-handle-platform-data.patch
-patches.renesas/0045-phy-rcar-usb-add-R8A7778-support.patch
-patches.renesas/0046-usb-phy-don-t-check-resource-with-devm_ioremap_resou.patch
-patches.renesas/0047-of-introduce-of_parse_phandle_with_fixed_args.patch
-patches.renesas/0048-gpio-implement-gpio-ranges-binding-document-fix.patch
-patches.renesas/0049-gpio-rcar-Remove-gpio-range-cells-DT-property-usage.patch
-patches.renesas/0050-media-soc-camera-move-common-code-to-soc_camera.c.patch
-patches.renesas/0051-mmc-return-mmc_of_parse-errors-to-caller.patch
-patches.renesas/0052-mmc-slot-gpio-Add-debouncing-capability-to-mmc_gpio_.patch
-patches.renesas/0053-mmc-sh_mmcif-don-t-clear-masked-interrupts.patch
-patches.renesas/0054-mmc-sh_mmcif-handle-mmc_of_parse-errors-during-probe.patch
-patches.renesas/0055-mmc-sh_mmcif-Remove-.down_pwr-callback-from-platform.patch
-patches.renesas/0056-mmc-sh_mmcif-Remove-.set_pwr-callback-from-platform-.patch
-patches.renesas/0057-mmc-sh_mmcif-move-header-include-from-header-into-.c.patch
-patches.renesas/0058-mmc-sh_mmcif-add-support-for-Device-Tree-DMA-binding.patch
-patches.renesas/0059-mmc-sh_mmcif-revision-specific-Command-Completion-Si.patch
-patches.renesas/0060-mmc-sh_mmcif-revision-specific-CLK_CTRL2-handling.patch
-patches.renesas/0061-media-soc-camera-add-host-clock-callbacks-to-start-a.patch
-patches.renesas/0062-media-sh-mobile-ceu-camera-move-interface-activation.patch
-patches.renesas/0063-media-sh-mobile-ceu-camera-add-primitive-OF-support.patch
-patches.renesas/0064-media-sh-mobile-ceu-driver-support-max-width-and-hei.patch
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-patches.renesas/0167-ARM-shmobile-armadillo-add-FSI-support-for-DTS.patch
-patches.renesas/0168-ARM-shmobile-Use-sh73a0-suffix-for-INTC-compat-strin.patch
-patches.renesas/0169-ARM-shmobile-Use-r8a7740-suffix-for-INTC-compat-stri.patch
-patches.renesas/0170-ARM-shmobile-Use-r8a7778-suffix-for-INTC-compat-stri.patch
-patches.renesas/0171-ARM-shmobile-Use-r8a7779-suffix-for-INTC-compat-stri.patch
-patches.renesas/0172-ARM-shmobile-r8a7779-add-HSPI-support-to-DTSI.patch
-patches.renesas/0173-ARM-shmobile-marzen-enable-HSPI0-in-DTS.patch
-patches.renesas/0174-ARM-shmobile-r8a7790-Add-clock-index-macros-for-DT-s.patch
-patches.renesas/0175-ARM-shmobile-r8a7791-Add-clock-index-macros-for-DT-s.patch
-patches.renesas/0176-ARM-shmobile-lager-add-gpio-regulator-support-on-def.patch
-patches.renesas/0177-ARM-shmobile-lager-fixup-I2C-device-on-defconfig.patch
-patches.renesas/0178-ARM-shmobile-genmai-Rename-ARCH_SHMOBILE-to-ARCH_SHM.patch
-patches.renesas/0179-ARM-shmobile-bockw-use-regulator-for-MMCIF.patch
-patches.renesas/0180-ARM-shmobile-Enable-PFC-GPIO-on-the-Koelsch-board.patch
-patches.renesas/0181-ARM-shmobile-Add-Koelsch-LED6-LED7-and-LED8-support.patch
-patches.renesas/0182-ARM-shmobile-Add-Koelsch-SW2-support.patch
-patches.renesas/0183-ARM-shmobile-r8a7791-Koelsch-DT-reference-C-bits.patch
-patches.renesas/0184-ARM-shmobile-bockw-fixup-FPGA-ioremap-area.patch
-patches.renesas/0185-ARM-shmobile-bockw-add-pin-pull-up-setting-for-SDHI.patch
-patches.renesas/0186-ARM-shmobile-lager-set-.debounce_interval.patch
-patches.renesas/0187-ARM-shmobile-koelsch-set-.debounce_interval.patch
-patches.renesas/0188-ARM-shmobile-Initial-r8a7791-and-Koelsch-multiplatfo.patch
-patches.renesas/0189-ARM-shmobile-r7s72100-Genmai-DT-reference-C-bits.patch
-patches.renesas/0190-ARM-shmobile-r7s72100-Genmai-Multiplatform.patch
-patches.renesas/0191-ARM-shmobile-lager-mark-GPIO-keys-as-wake-up-sources.patch
-patches.renesas/0192-ARM-shmobile-Use-init_late-on-Koelsch.patch
-patches.renesas/0193-ARM-shmobile-koelsch-mark-GPIO-keys-as-wake-up-sourc.patch
-patches.renesas/0194-ARM-shmobile-Hook-up-SW30-SW36-on-Koelsch.patch
-patches.renesas/0195-ARM-shmobile-Use-init_late-on-Lager.patch
-patches.renesas/0196-ARM-shmobile-Add-pinctrl_register_mappings-for-Koels.patch
-patches.renesas/0197-ARM-shmobile-mackerel-clk_round_rate-can-return-a-ze.patch
-patches.renesas/0198-ARM-shmobile-Lager-add-SPI-FLASH-support-on-QSPI.patch
-patches.renesas/0199-ARM-shmobile-mackerel-Use-pinconf-API-to-configure-p.patch
-patches.renesas/0200-ARM-Kconfig-Mention-Renesas-ARM-SoCs-instead-of-SH-M.patch
-patches.renesas/0201-ARM-shmobile-armadillo-fixup-FSI-address-size.patch
-patches.renesas/0202-ARM-shmobile-bockw-remove-unused-RSND_SSI_CLK_FROM_A.patch
-patches.renesas/0203-ARM-shmobile-lager-add-gpio-fixed-regulator-for-SDHI.patch
-patches.renesas/0204-ARM-shmobile-r8a7778-add-SSIx-DMAEngine-support.patch
-patches.renesas/0205-ARM-shmobile-r8a7790-add-I2C-support.patch
-patches.renesas/0206-ARM-shmobile-sh73a0-add-FSI-clock-support-for-DT.patch
-patches.renesas/0207-ARM-shmobile-sh73a0-add-FSI-support-via-DTSI.patch
-patches.renesas/0208-ARM-shmobile-kzm9g-add-FSI-support-for-DTS.patch
-patches.renesas/0209-ARM-shmobile-r8a7778-camera-rcar-header-cleanup.patch
-patches.renesas/0210-ARM-shmobile-r8a7791-add-Ether-clock.patch
-patches.renesas/0211-ARM-shmobile-Koelsch-enable-Ether-in-defconfig.patch
-patches.renesas/0212-ARM-shmobile-remove-unnecessary-platform_device-as-h.patch
-patches.renesas/0213-ARM-rcar-gen2-Do-not-setup-timer-in-non-secure-mode.patch
-patches.renesas/0214-ARM-shmobile-r8a7778-add-USB-Func-DMAEngine-support.patch
-patches.renesas/0215-ARM-shmobile-koelsch-dts-Add-gpio-keys-device.patch
-patches.renesas/0216-ARM-shmobile-Add-select-MIGHT_HAVE_PCI-for-PCI-AHB-b.patch
-patches.renesas/0217-ARM-shmobile-armadillo800eva-Enable-backlight-contro.patch
-patches.renesas/0218-ARM-shmobile-armadillo-Add-PWM-backlight-power-suppl.patch
-patches.renesas/0219-ARM-shmobile-rcar-gen2-Initialize-CCF-before-clock-s.patch
-patches.renesas/0220-ARM-shmobile-koelsch-Conditionally-select-MICREL_PHY.patch
-patches.renesas/0221-ARM-shmobile-koelsch-Enable-CONFIG_PACKET-in-defconf.patch
-patches.renesas/0222-ARM-shmobile-koelsch-Do-not-disable-CONFIG_-INOTIFY_.patch
-patches.renesas/0223-ARM-shmobile-bockw-fixup-DMA-mask.patch
-patches.renesas/0224-ARM-shmobile-r8a7790-fix-shdi-resource-sizes.patch
-patches.renesas/0225-arm-shmobile-clks-remove-duplicated-clock-from-r7s72.patch
-patches.renesas/0226-ARM-shmobile-koelsch-Add-DU-device.patch
-patches.renesas/0227-ARM-shmobile-Koelsch-add-Ether-support.patch
-patches.renesas/0228-ARM-shmobile-armadillo-Set-backlight-enable-GPIO.patch
-patches.renesas/0229-ARM-shmobile-lager-reference-Enable-multiplaform-ker.patch
-patches.renesas/0230-ARM-shmobile-koelsch-reference-Remove-duplicate-CCF-.patch
-patches.renesas/0231-ARM-shmobile-lager-reference-Instantiate-clkdevs-for.patch
-patches.renesas/0232-ARM-shmobile-koelsch-reference-Instantiate-clkdevs-f.patch
-patches.renesas/0233-ARM-shmobile-Remove-non-multiplatform-Lager-referenc.patch
-patches.renesas/0234-ARM-shmobile-Remove-non-multiplatform-Koelsch-refere.patch
-patches.renesas/0235-ARM-shmobile-Let-Lager-multiplatform-boot-with-Lager.patch
-patches.renesas/0236-ARM-shmobile-Let-Koelsch-multiplatform-boot-with-Koe.patch
-patches.renesas/0237-ARM-shmobile-mackerel-Fix-USBHS-pinconf-entry.patch
-patches.renesas/0238-ARM-shmobile-armadillo-dts-Add-PWM-backlight-power-s.patch
-patches.renesas/0239-ARM-shmobile-armadillo-dts-Add-PWM-backlight-enable-.patch
-patches.renesas/0240-ARM-shmobile-r8a73a4-Specify-PFC-interrupts-in-DT.patch
-patches.renesas/0241-ARM-shmobile-r8a7740-Specify-PFC-interrupts-in-DT.patch
-patches.renesas/0242-ARM-shmobile-sh73a0-Specify-PFC-interrupts-in-DT.patch
-patches.renesas/0243-ARM-shmobile-armadillo-dts-Add-gpio-keys-device.patch
-patches.renesas/0244-ARM-shmobile-r8a7790-Add-clocks.patch
-patches.renesas/0245-ARM-shmobile-r8a7790-Reference-clocks.patch
-patches.renesas/0246-ARM-shmobile-r8a7791-Add-clocks.patch
-patches.renesas/0247-ARM-shmobile-Sync-Lager-DTS-with-Lager-reference-DTS.patch
-patches.renesas/0248-ARM-shmobile-Sync-Koelsch-DTS-with-Koelsch-reference.patch
-patches.renesas/0249-ARM-shmobile-lager-Specify-external-clock-frequency-.patch
-patches.renesas/0250-ARM-shmobile-koelsch-Specify-external-clock-frequenc.patch
-patches.renesas/0251-ARM-shmobile-Remove-Lager-reference-DTS.patch
-patches.renesas/0252-ARM-shmobile-Lager-conditionally-select-CONFIG_MICRE.patch
-patches.renesas/0253-ARM-shmobile-r8a7778-add-sound-SCU-clock-support.patch
-patches.renesas/0254-ARM-shmobile-sh7372-Use-macros-to-declare-SCIF-devic.patch
-patches.renesas/0255-ARM-shmobile-sh73a0-Use-macros-to-declare-SCIF-devic.patch
-patches.renesas/0256-ARM-shmobile-r8a7740-Use-macros-to-declare-SCIF-devi.patch
-patches.renesas/0257-ARM-shmobile-r8a7779-Use-macros-to-declare-SCIF-devi.patch
-patches.renesas/0258-ARM-shmobile-r8a73a4-Don-t-define-SCIF-platform-data.patch
-patches.renesas/0259-ARM-shmobile-r7s72100-Don-t-define-SCIF-platform-dat.patch
-patches.renesas/0260-ARM-shmobile-r8a7778-Don-t-define-SCIF-platform-data.patch
-patches.renesas/0261-ARM-shmobile-r8a7791-Don-t-define-SCIF-platform-data.patch
-patches.renesas/0262-ARM-shmobile-r8a7790-Don-t-define-SCIF-platform-data.patch
-patches.renesas/0263-ARM-shmobile-sh7372-Declare-SCIF-register-base-and-I.patch
-patches.renesas/0264-ARM-shmobile-sh73a0-Declare-SCIF-register-base-and-I.patch
-patches.renesas/0265-ARM-shmobile-r7s72100-Declare-SCIF-register-base-and.patch
-patches.renesas/0266-ARM-shmobile-r8a73a4-Declare-SCIF-register-base-and-.patch
-patches.renesas/0267-ARM-shmobile-r8a7740-Declare-SCIF-register-base-and-.patch
-patches.renesas/0268-ARM-shmobile-r8a7779-Declare-SCIF-register-base-and-.patch
-patches.renesas/0269-ARM-shmobile-sh7372-Don-t-set-plat_sci_port-scbrr_al.patch
-patches.renesas/0270-ARM-shmobile-r8a7778-Declare-SCIF-register-base-and-.patch
-patches.renesas/0271-ARM-shmobile-r8a7791-Declare-SCIF-register-base-and-.patch
-patches.renesas/0272-ARM-shmobile-r8a7790-Declare-SCIF-register-base-and-.patch
-patches.renesas/0273-ARM-shmobile-sh73a0-Don-t-set-plat_sci_port-scbrr_al.patch
-patches.renesas/0274-ARM-shmobile-r7s72100-Don-t-set-plat_sci_port-scbrr_.patch
-patches.renesas/0275-ARM-shmobile-r8a7778-Don-t-set-plat_sci_port-scbrr_a.patch
-patches.renesas/0276-ARM-shmobile-r8a73a4-Don-t-set-plat_sci_port-scbrr_a.patch
-patches.renesas/0277-ARM-shmobile-r8a7740-Don-t-set-plat_sci_port-scbrr_a.patch
-patches.renesas/0278-ARM-shmobile-r8a7790-Don-t-set-plat_sci_port-scbrr_a.patch
-patches.renesas/0279-ARM-shmobile-r8a7779-Don-t-set-plat_sci_port-scbrr_a.patch
-patches.renesas/0280-ARM-shmobile-r8a7791-Don-t-set-plat_sci_port-scbrr_a.patch
-patches.renesas/0281-arm-shmobile-r7s72100-add-i2c-clocks.patch
-patches.renesas/0282-net-sh_eth-do-not-issue-a-wild-PHY-reset-through-BMC.patch
-patches.renesas/0283-sh_eth-add-R8A7791-support.patch
-patches.renesas/0284-sh_eth-add-PHY-IRQ-to-platform-data.patch
-patches.renesas/0285-sh_eth-do-not-reset-PHY-needlessly.patch
-patches.renesas/0286-ARM-7789-1-Do-not-run-dummy_flush_tlb_a15_erratum-on.patch
-
-
-#############################################################################
-# Intel Baytrail backports (includes ChromeOS patches as well).
-#
-patches.baytrail/0001-xhci-Refactor-port-status-into-a-new-function.patch
-patches.baytrail/0002-usb-Fix-xHCI-host-issues-on-remote-wakeup.patch
-patches.baytrail/0003-usb-xhci-check-usb2-port-capabilities-before-adding-.patch
-patches.baytrail/0004-usb-xhci-define-port-register-names-and-use-them-ins.patch
-patches.baytrail/0005-usb-xhci-add-USB2-Link-power-management-BESL-support.patch
-patches.baytrail/0006-usb-add-usb2-Link-PM-variables-to-sysfs-and-usb_devi.patch
-patches.baytrail/0007-xhci-fix-port-BESL-LPM-capability-checking.patch
-patches.baytrail/0008-usb-Don-t-enable-USB-2.0-Link-PM-by-default.patch
-patches.baytrail/0009-drm-i915-quirk-away-phantom-LVDS-on-Intel-s-D525MW-m.patch
-patches.baytrail/0010-drm-i915-don-t-enable-the-plane-too-early-in-i9xx_cr.patch
-patches.baytrail/0011-drm-i915-drop-redundant-vblank-waits.patch
-patches.baytrail/0012-drm-i915-add-pipe-asserts-for-the-crtc-enable-sequen.patch
-patches.baytrail/0013-drm-i915-add-i9xx-pfit-pipe-asserts.patch
-patches.baytrail/0014-drm-i915-move-debug-output-back-to-the-right-place.patch
-patches.baytrail/0015-drm-i915-Use-pipe_name-and-port_name-where-appropria.patch
-patches.baytrail/0016-drm-i915-Use-port_name-in-PCH-port-audio-power-chang.patch
-patches.baytrail/0017-drm-i915-Print-plane-pipe-port-names-as-alphabetical.patch
-patches.baytrail/0018-drm-i915-Use-alphabetical-names-for-transcoders-too.patch
-patches.baytrail/0019-drm-i915-Use-alphabetical-names-for-sprites.patch
-patches.baytrail/0020-drm-i915-VLV-GPU-frequency-to-opcode-functions.patch
-patches.baytrail/0021-drm-i915-turbo-RC6-support-for-VLV-v7.patch
-patches.baytrail/0022-drm-i915-fix-VLV-limits.patch
-patches.baytrail/0023-drm-i915-magic-VLV-PLL-registers-in-the-dpio-sideban.patch
-patches.baytrail/0024-drm-i915-dp-program-VSwing-and-Preemphasis-control-s.patch
-patches.baytrail/0025-drm-i915-drop-init_dpio-shouldn-t-be-needed.patch
-patches.baytrail/0026-drm-i915-update-VLV-PLL-and-DPIO-code-v11.patch
-patches.baytrail/0027-drm-i915-report-Gen5-CPU-and-PCH-FIFO-underruns.patch
-patches.baytrail/0028-drm-i915-print-Gen5-CPU-PCH-poison-interrupts.patch
-patches.baytrail/0029-drm-i915-check-the-power-well-inside-haswell_get_pip.patch
-patches.baytrail/0030-drm-i915-use-cpu_transcoder-for-TRANS_DDI_FUNC_CTL.patch
-patches.baytrail/0031-drm-i915-Move-the-CSC_MODE-bits-next-to-the-register.patch
-patches.baytrail/0032-drm-i915-Remove-mention-of-Haswell-in-DDI-code.patch
-patches.baytrail/0033-drm-i915-use-vlv_dport_to_channel-in-vlv_signal_leve.patch
-patches.baytrail/0034-drm-i915-Make-struct-dpll-intel_clock_t.patch
-patches.baytrail/0035-drm-i915-Add-PTE-encoding-function-to-the-gtt-ppgtt-.patch
-patches.baytrail/0036-drm-i915-Fix-page-table-entries-for-Bay-Trail.patch
-patches.baytrail/0037-drm-i915-Split-out-Haswell-code-from-gen6_pte_encode.patch
-patches.baytrail/0038-drm-i915-fix-locking-around-punit-access-in-cur_dela.patch
-patches.baytrail/0039-drm-i915-Add-bit-field-to-record-which-pins-have-rec.patch
-patches.baytrail/0040-drm-i915-Only-reprobe-display-on-encoder-which-has-r.patch
-patches.baytrail/0041-drm-i915-Turn-DEV_INFO_FLAGS-into-a-foreach-style-ma.patch
-patches.baytrail/0042-drm-i915-Replace-the-line-of-s-by-a-DEV_INFO_FOR_EAC.patch
-patches.baytrail/0043-drm-i915-Use-DEV_INFO_FOR_EACH_FLAG-to-declare-flags.patch
-patches.baytrail/0044-drm-i915-Turn-HAS_DDI-into-a-device_info-flag.patch
-patches.baytrail/0045-drm-i915-Introduce-HAS_FPGA_DBG_UNCLAIMED.patch
-patches.baytrail/0046-drm-i915-Turn-HAS_FPGA_DBG_UNCLAIMED-into-a-device_i.patch
-patches.baytrail/0047-drm-i915-make-sure-GPU-freq-drops-to-minimum-after-e.patch
-patches.baytrail/0048-drm-i915-cancel-RPS-work-before-disabling-RPS.patch
-patches.baytrail/0049-drm-i915-create-spearate-VLV-disable_rps-function.patch
-patches.baytrail/0050-drm-i915-disable-interrupts-earlier-in-the-driver-un.patch
-patches.baytrail/0051-drm-i915-Disable-high-bpc-on-pre-1.4-EDID-screens.patch
-patches.baytrail/0052-drm-i915-Fixup-non-24bpp-support-for-VGA-screens-on-.patch
-patches.baytrail/0053-drm-i915-keep-max-backlight-internal-to-intel_panel..patch
-patches.baytrail/0054-drm-i915-protect-backlight-registers-and-data-with-a.patch
-patches.baytrail/0055-drm-i915-don-t-pretend-we-support-ASLE-ALS-PFIT-or-P.patch
-patches.baytrail/0056-drm-i915-opregion-don-t-pretend-we-did-something-whe.patch
-patches.baytrail/0057-drm-i915-drop-code-duplication-in-favor-of-asle-inte.patch
-patches.baytrail/0058-drm-i915-hsw-backlight-registers-need-transcoder-ins.patch
-patches.baytrail/0059-drm-i915-Ivybridge-is-the-odd-one-when-it-comes-to-p.patch
-patches.baytrail/0060-drm-i915-consolidate-pch-pll-computations-a-bit.patch
-patches.baytrail/0061-drm-i915-shovel-compute-clock-into-crtc-config.dpll-.patch
-patches.baytrail/0062-drm-i915-move-dp-clock-computations-to-encoder-compu.patch
-patches.baytrail/0063-drm-i915-use-pipe_config-for-lvds-dithering.patch
-patches.baytrail/0064-drm-i915-don-t-force-matching-p1-for-g4x-ilk-reduced.patch
-patches.baytrail/0065-drm-i915-remove-redundant-has_pch_encoder-check.patch
-patches.baytrail/0066-drm-i915-simplify-config-pixel_multiplier-handling.patch
-patches.baytrail/0067-drm-i915-factor-out-GMCH-panel-fitting-code-and-use-.patch
-patches.baytrail/0068-drm-i915-move-PCH-pfit-controls-into-pipe_config.patch
-patches.baytrail/0069-drm-i915-warn-about-invalid-pfit-modes.patch
-patches.baytrail/0070-drm-i915-remove-VLV-MSI-IRQ-hack.patch
-patches.baytrail/0071-drm-i915-Only-print-the-info-message-about-incresing.patch
-patches.baytrail/0072-drm-i915-put-the-right-cpu_transcoder-into-pipe_conf.patch
-patches.baytrail/0073-drm-i915-force-bpp-for-eDP-panels.patch
-patches.baytrail/0074-drm-i915-drop-adjusted_mode-from-_set_pipeconf-funct.patch
-patches.baytrail/0075-drm-i915-implement-high-bpc-pipeconf-dither-support-.patch
-patches.baytrail/0076-drm-i915-allow-high-bpc-modes-on-DP.patch
-patches.baytrail/0077-drm-i915-move-intel_crtc-fdi_lanes-to-pipe_config.patch
-patches.baytrail/0078-drm-i915-hw-state-readout-support-for-pipe_config-fd.patch
-patches.baytrail/0079-drm-i915-split-up-fdi_set_m_n-into-computation-and-h.patch
-patches.baytrail/0080-drm-i915-compute-fdi-lane-config-earlier.patch
-patches.baytrail/0081-drm-i915-Split-up-ironlake_check_fdi_lanes.patch
-patches.baytrail/0082-drm-i915-move-fdi-lane-configuration-checks-ahead.patch
-patches.baytrail/0083-drm-i915-don-t-count-cpu-ports-for-fdi-B-C-lane-shar.patch
-patches.baytrail/0084-drm-i915-fixup-12bpc-hdmi-dotclock-handling.patch
-patches.baytrail/0085-drm-i915-implement-fdi-auto-dithering.patch
-patches.baytrail/0086-drm-i915-stop-for_each_intel_crtc_masked-macro-from-.patch
-patches.baytrail/0087-drm-i915-introduce-macros-to-check-pipe-config-prope.patch
-patches.baytrail/0088-drm-i915-hw-state-readout-support-for-fdi-m-n.patch
-patches.baytrail/0089-drm-i915-hw-state-readout-support-for-pipe-timings.patch
-patches.baytrail/0090-drm-i915-cleanup-opregion-technology-enabled-indicat.patch
-patches.baytrail/0091-drm-i915-manage-opregion-asle-driver-readiness-prope.patch
-patches.baytrail/0092-drm-i915-untie-opregion-init-and-asle-irq-pipestat-e.patch
-patches.baytrail/0093-drm-i915-cleanup-redundant-checks-from-intel_enable_.patch
-patches.baytrail/0094-drm-i915-cleanup-opregion-asle-pipestat-enable.patch
-patches.baytrail/0095-drm-i915-move-lvds_border_bits-to-pipe_config.patch
-patches.baytrail/0096-drm-i915-rip-out-indirection-for-pfit-pipe_config-as.patch
-patches.baytrail/0097-drm-i915-move-border-color-writes-to-pfit_enable.patch
-patches.baytrail/0098-drm-Add-struct-drm_rect-and-assorted-utility-functio.patch
-patches.baytrail/0099-drm-Add-drm_rect_calc_-hscale-vscale-utility-functio.patch
-patches.baytrail/0100-drm-Add-drm_rect_debug_print.patch
-patches.baytrail/0101-drm-Add-drm_rect_equals.patch
-patches.baytrail/0102-drm-i915-Implement-proper-clipping-for-video-sprites.patch
-patches.baytrail/0103-drm-i915-Relax-the-sprite-scaling-limits-checks.patch
-patches.baytrail/0104-drm-i915-reference-count-for-i915_hw_contexts.patch
-patches.baytrail/0105-drm-i915-simplify-DP-DDI-port-width-macros.patch
-patches.baytrail/0106-drm-i915-unreference-default-context-on-module-unloa.patch
-patches.baytrail/0107-drm-i915-fix-Haswell-pfit-power-well-check-v2.patch
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-patches.baytrail/0468-drm-i915-We-implement-WaFbcWaitForVBlankBeforeEnable.patch
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-patches.baytrail/0470-drm-i915-We-implement-WaFbcDisableDpfcClockGating-on.patch
-patches.baytrail/0471-drm-i915-We-implement-WaMPhyProgramming-on-Haswell.patch
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-patches.baytrail/0486-drm-i915-Added-debugfs-support-for-PSR-Status.patch
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-patches.baytrail/0494-drm-i915-extract-lpt_enable_clkout_dp-from-lpt_init_.patch
-patches.baytrail/0495-drm-i915-checking-for-NULL-instead-of-IS_ERR.patch
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-patches.baytrail/0519-drm-add-unified-vma-offset-manager.patch
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-patches.baytrail/0534-drm-i915-Replace-open-coded-offset_in_page.patch
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-patches.baytrail/0544-drm-i915-hdmi-use-native-encoder-mode_set-callback.patch
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-patches.baytrail/0548-drm-i915-rip-out-legacy-encoder-mode_set-callback.patch
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-patches.baytrail/0556-drm-i915-Calculate-the-sprite-WM-based-on-the-source.patch
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-patches.baytrail/0558-drm-i915-Rename-most-wm-compute-functions-to-ilk_-pr.patch
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-patches.baytrail/0564-drm-i915-enable-IPS-for-bpp-24.patch
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-patches.baytrail/0567-drm-i915-rearrange-vlv-hdmi-enable-and-pre_enable-ca.patch
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-patches.baytrail/0573-drm-i915-Rework-drop-caches-for-checkpatch.patch
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-patches.baytrail/0810-drm-i915-ban-badly-behaving-contexts.patch
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-patches.baytrail/0812-drm-i915-Delay-disabling-of-VGA-memory-until-vgacon-.patch
-patches.baytrail/0813-drm-i915-Track-pfit-enable-state-separately-from-siz.patch
-patches.baytrail/0814-drm-i915-Use-proper-print-format-for-debug-prints.patch
-patches.baytrail/0815-drm-i915-Pass-crtc-to-intel_update_watermarks.patch
-patches.baytrail/0816-drm-i915-Call-intel_update_watermarks-in-specific-pl.patch
-patches.baytrail/0817-drm-i915-Constify-some-watermark-data.patch
-patches.baytrail/0818-drm-i915-Use-ilk_compute_wm_level-to-compute-WM_PIPE.patch
-patches.baytrail/0819-drm-i915-Refactor-max-WM-level.patch
-patches.baytrail/0820-drm-i915-sdvo-Fully-translate-sync-flags-in-the-dtd-.patch
-patches.baytrail/0821-drm-i915-Write-RING_TAIL-once-per-request.patch
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-patches.baytrail/0823-drm-i915-Fix-HSW-sync-flags-to-use-pipe-config-adjus.patch
-patches.baytrail/0824-drm-i915-vlv-re-enable-hotplug-detect-based-probing-.patch
-patches.baytrail/0825-drm-i915-sdvo-Robustify-the-dtd-drm_mode-conversions.patch
-patches.baytrail/0826-drm-i915-dvo-set-crtc-timings-again-for-panel-fixed-.patch
-patches.baytrail/0827-drm-i915-Synchronize-pread-pwrite-with-wait_renderin.patch
-patches.baytrail/0828-drm-i915-Extract-vm-specific-part-of-eviction.patch
-patches.baytrail/0829-drm-i915-evict-VM-instead-of-everything.patch
-patches.baytrail/0830-drm-i915-kill-set_need_resched.patch
-patches.baytrail/0831-drm-i915-move-more-code-to-__i915_drm_thaw.patch
-patches.baytrail/0832-drm-i915-don-t-save-restore-LBB-on-Gen5.patch
-patches.baytrail/0833-drm-i915-Don-t-factor-in-pixel-multplier-when-derivi.patch
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-patches.baytrail/0835-drm-i915-Add-support-for-pipe_bpp-readout.patch
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-patches.baytrail/0837-drm-i915-Make-intel_fuzzy_clock_check-take-in-arbitr.patch
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-patches.baytrail/0839-drm-i915-Round-l3-parity-reads-down.patch
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-patches.baytrail/0841-drm-i915-add-asserts-for-cursor-disabled.patch
-patches.baytrail/0842-drm-i915-clear-opregon-lid_state-after-we-unmap-it.patch
-patches.baytrail/0843-drm-i915-Add-intel_dotclock_calculate.patch
-patches.baytrail/0844-drm-i915-Make-i9xx_crtc_clock_get-use-dpll_hw_state.patch
-patches.baytrail/0845-drm-i915-Make-i9xx_crtc_clock_get-work-for-PCH-DPLLs.patch
-patches.baytrail/0846-drm-i915-Fix-port_clock-and-adjusted_mode.clock-read.patch
-patches.baytrail/0847-drm-i915-Add-PIPE_CONF_CHECK_CLOCK_FUZZY.patch
-patches.baytrail/0848-drm-i915-Add-fuzzy-clock-check-for-port_clock.patch
-patches.baytrail/0849-drm-i915-Grab-the-pixel-clock-from-adjusted_mode-not.patch
-patches.baytrail/0850-drm-i915-Use-adjusted_mode-clock-in-lpt_program_iclk.patch
-patches.baytrail/0851-drm-i915-Use-adjusted_mode-in-HDMI-12bpc-clock-check.patch
-patches.baytrail/0852-drm-i915-Use-adjusted_mode-in-intel_update_fbc.patch
-patches.baytrail/0853-drm-i915-Use-adjusted_mode-appropriately-when-comput.patch
-patches.baytrail/0854-drm-i915-Check-the-clock-from-adjusted-mode-in-intel.patch
-patches.baytrail/0855-drm-i915-Use-adjusted_mode-when-checking-conditions-.patch
-patches.baytrail/0856-drm-i915-Make-intel_crtc_active-available-outside-in.patch
-patches.baytrail/0857-drm-i915-Use-pipe-config-in-sprite-code.patch
-patches.baytrail/0858-drm-i915-Use-adjusted_mode-in-DSI-PLL-calculations.patch
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-patches.baytrail/0861-drm-i915-Document-the-inteded-use-of-requested_mode.patch
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-patches.baytrail/0863-drm-i915-Fix-cursor-visibility-checks-also-for-the-r.patch
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-patches.baytrail/0869-drm-i915-Fix-up-pipe-vs.-double-wide-confusion.patch
-patches.baytrail/0870-drm-i915-Convert-overlay-double-wide-check-over-to-p.patch
-patches.baytrail/0871-drm-i915-WARN-is-the-DP-aux-read-or-write-is-too-big.patch
-patches.baytrail/0872-drm-i915-only-report-hpd-connector-status-change-whe.patch
-patches.baytrail/0873-drm-i915-check-for-more-ASLC-interrupts.patch
-patches.baytrail/0874-drm-i915-do-not-update-cursor-in-crtc-mode-set.patch
-patches.baytrail/0875-drm-i915-Don-t-enable-the-cursor-on-a-disable-pipe.patch
-patches.baytrail/0876-drm-i915-write-D_COMP-using-the-mailbox.patch
-patches.baytrail/0877-drm-i915-register-backlight-device-also-when-backlig.patch
-patches.baytrail/0878-drm-i915-dump-crtc-timings-from-the-pipe-config.patch
-patches.baytrail/0879-drm-i915-Fix-HSW-parity-test.patch
-patches.baytrail/0880-drm-i915-Add-second-slice-l3-remapping.patch
-patches.baytrail/0881-drm-i915-Make-l3-remapping-use-the-ring.patch
-patches.baytrail/0882-drm-i915-Keep-a-list-of-all-contexts.patch
-patches.baytrail/0883-drm-i915-Do-remaps-for-all-contexts.patch
-patches.baytrail/0884-drm-i915-s-HAS_L3_GPU_CACHE-HAS_L3_DPF.patch
-patches.baytrail/0885-drm-i915-vlv-honor-i915_enable_rc6-boot-param-on-VLV.patch
-patches.baytrail/0886-drm-i915-vlv-disable-rc6p-and-rc6pp-residency-report.patch
-patches.baytrail/0887-drm-i915-don-t-disable-ERR_INT-on-the-IRQ-handler.patch
-patches.baytrail/0888-drm-i915-POSTING_READ-IPS_CTL-before-waiting-for-the.patch
-patches.baytrail/0889-drm-i915-Change-i915_request-power-well-handling.patch
-patches.baytrail/0890-drm-i915-Add-intel_display_power_-get-put-to-request.patch
-patches.baytrail/0891-drm-i915-Refactor-power-well-refcount-inc-dec-operat.patch
-patches.baytrail/0892-drm-i915-Add-POWER_DOMAIN_VGA.patch
-patches.baytrail/0893-drm-i915-Pull-intel_init_power_well-out-of-intel_mod.patch
-patches.baytrail/0894-drm-i915-cleanup-a-min_t-cast.patch
-patches.baytrail/0895-drm-i915-assume-all-GM45-Acer-laptops-use-inverted-b.patch
-patches.baytrail/0896-Re-create-dirty-merge-b599c89.patch
-patches.baytrail/0897-drm-i915-Use-a-temporary-va_list-for-two-pass-string.patch
-patches.baytrail/0898-drm-dp-add-defines-for-downstream-port-types.patch
-patches.baytrail/0899-drm-i915-dp-downstream-port-capabilities-are-not-pre.patch
-patches.baytrail/0900-drm-i915-use-pointer-k-cmz.-alloc-sizeof-pointer-.-p.patch
-patches.baytrail/0901-drm-i915-Use-kcalloc-more.patch
-patches.baytrail/0902-drm-i915-Ditch-INTELFB_CONN_LIMIT.patch
-patches.baytrail/0903-drm-i915-Use-unsigned-for-overflow-checks-in-execbuf.patch
-patches.baytrail/0904-drm-i915-Do-not-unlock-upon-error-in-i915_gem_idle.patch
-patches.baytrail/0905-drm-i915-VBT-s-child_device_config-changes-over-time.patch
-patches.baytrail/0906-drm-i915-use-the-HDMI-DDI-buffer-translations-from-V.patch
-patches.baytrail/0907-drm-i915-check-the-DDC-and-AUX-bits-of-the-VBT-on-DD.patch
-patches.baytrail/0908-drm-i915-add-some-assertions-about-VBT-DDI-port-type.patch
-patches.baytrail/0909-drm-i915-don-t-init-DP-or-HDMI-when-not-supported-by.patch
-patches.baytrail/0910-drm-i915-Rip-out-SUPPORTS_EDP.patch
-patches.baytrail/0911-drm-i915-Fix-unclaimed-register-access-due-to-delaye.patch
-patches.baytrail/0912-drm-i915-Redisable-VGA-before-the-modeset-on-resume.patch
-patches.baytrail/0913-drm-i915-Move-power-well-init-earlier-during-driver-.patch
-patches.baytrail/0914-drm-i915-Move-power-well-resume-earlier.patch
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-patches.baytrail/0917-drm-i915-dp-read-DPCD-PSR-capability-only-on-eDP.patch
-patches.baytrail/0918-drm-i915-Calculate-PSR-register-offsets-from-base-ge.patch
-patches.baytrail/0919-drm-i915-Fix-intel_crtc_mode_get-mode-clock.patch
-patches.baytrail/0920-drm-i915-precendence-bug-in-GT_PARITY_ERROR.patch
-patches.baytrail/0921-drm-i915-Delay-the-release-of-the-forcewake-by-a-jif.patch
-patches.baytrail/0922-drm-i915-Add-some-debug-spam-for-intialising-SDVO.patch
-patches.baytrail/0923-drm-i915-clean-up-and-simplify-i9xx_crtc_mode_set-wr.patch
-patches.baytrail/0924-drm-i915-Add-HSW-CRT-output-readout-support.patch
-patches.baytrail/0925-drm-i915-backlight-combination-mode-bit-is-gen4-only.patch
-patches.baytrail/0926-drm-i915-reorganize-intel_drv.h.patch
-patches.baytrail/0927-drm-i915-make-intel_pipe_has_type-static.patch
-patches.baytrail/0928-drm-i915-make-intel_crtc_load_lut-static.patch
-patches.baytrail/0929-drm-i915-make-intel_crtc_fb_gamma_-set-get-static.patch
-patches.baytrail/0930-drm-i915-make-hsw_-disable-restore-_lcpll-static.patch
-patches.baytrail/0931-drm-i915-remove-extern-keywords-from-intel_drv.h-fun.patch
-patches.baytrail/0932-drm-i915-trace-vm-eviction-instead-of-everything.patch
-patches.baytrail/0933-drm-i915-Provide-a-cheap-ggtt-vma-lookup.patch
-patches.baytrail/0934-drm-i915-Convert-active-API-to-VMA.patch
-patches.baytrail/0935-drm-i915-Move-the-conditional-seqno-query-into-the-t.patch
-patches.baytrail/0936-drm-i915-Fix-VLV-eDP-timing-v2.patch
-patches.baytrail/0937-drm-i915-Show-WT-caching-in-debugfs.patch
-patches.baytrail/0938-drm-i915-Add-a-tracepoint-for-using-a-semaphore.patch
-patches.baytrail/0939-drm-i915-vlv-add-VLV-specific-clock_get-function-v3.patch
-patches.baytrail/0940-drm-i915-vlv-fix-up-broken-precision-in-vlv_crtc_clo.patch
-patches.baytrail/0941-drm-Remove-clock_index-from-struct-drm_display_mode.patch
-patches.baytrail/0942-drm-Remove-synth_clock-from-struct-drm_display_mode.patch
-patches.baytrail/0943-drm-Introduce-a-crtc_clock-for-struct-drm_display_mo.patch
-patches.baytrail/0944-drm-i915-Use-crtc_clock-in-intel_dump_crtc_timings.patch
-patches.baytrail/0945-drm-i915-Use-crtc_clock-with-the-adjusted-mode.patch
-patches.baytrail/0946-drm-Implement-timings-adjustments-for-frame-packing.patch
-patches.baytrail/0947-drm-i915-Ask-the-DRM-core-do-make-stereo-timings-adj.patch
-patches.baytrail/0948-drm-i915-Prefer-crtc_-h-v-display-for-pipe-src-dimen.patch
-patches.baytrail/0949-drm-Make-exposing-stereo-modes-a-per-connector-opt-i.patch
-patches.baytrail/0950-drm-i915-Allow-stereo-modes-on-HDMI.patch
-patches.baytrail/0951-drm-i915-vlv-hack-to-init-backlight-regs-if-BIOS-fai.patch
-patches.baytrail/0952-drm-i915-Program-GMBUS-Frequency-based-on-the-CDCLK-.patch
-patches.baytrail/0953-drm-i915-Eliminate-one-indent-leel-from-vlv_find_bes.patch
-patches.baytrail/0954-drm-i915-Use-DIV_ROUND_CLOSEST.patch
-patches.baytrail/0955-drm-i915-vlv-use-lower-precision-RC6-counter.patch
-patches.baytrail/0956-drm-i915-vlv-use-correct-units-for-rc6-residency-v2.patch
-patches.baytrail/0957-drm-i915-vlv-reduce-GT-FIFO-error-info-to-a-debug-me.patch
-patches.baytrail/0958-drm-i915-dp-retry-i2c-over-aux-seven-times-on-AUX-DE.patch
-patches.baytrail/0959-drm-i915-dp-do-not-write-DP_TRAINING_PATTERN_SET-all.patch
-patches.baytrail/0960-drm-i915-destroy-connector-sysfs-files-earlier.patch
-patches.baytrail/0961-drm-i915-Make-intel_resume_power_well-static.patch
-patches.baytrail/0962-drm-i915-fix-typo-s-PatherPoint-PantherPoint.patch
-patches.baytrail/0963-i915-vlv-untangle-integrated-clock-source-handling-v.patch
-patches.baytrail/0964-drm-i915-Disable-enable-planes-as-the-first-last-thi.patch
-patches.baytrail/0965-drm-i915-implement-the-Haswell-mode-set-sequence-wor.patch
-patches.baytrail/0966-drm-i915-Don-t-populate-pipe_src_-w-h-multiple-times.patch
-patches.baytrail/0967-drm-i915-Clean-up-the-ring-scaling-calculations.patch
-patches.baytrail/0968-drm-i915-Add-some-missing-steps-to-i915_driver_load-.patch
-patches.baytrail/0969-drm-i915-Fix-__wait_seqno-to-use-true-infinite-timeo.patch
-patches.baytrail/0970-drm-i915-Boost-RPS-frequency-for-CPU-stalls.patch
-patches.baytrail/0971-drm-i915-Tweak-RPS-thresholds-to-more-aggressively-d.patch
-patches.baytrail/0972-drm-i915-Simplify-PSR-debugfs.patch
-patches.baytrail/0973-drm-i915-vlv-reset-DPIO-on-load-and-resume-v2.patch
-patches.baytrail/0974-drm-i915-vlv-Turn-off-power-gate-for-BIOS-less-syste.patch
-patches.baytrail/0975-drm-i915-Add-a-more-detailed-comment-about-the-set_b.patch
-patches.baytrail/0976-drm-i915-Use-adjusted_mode-in-the-fastboot-hack-to-d.patch
-patches.baytrail/0977-drm-gem-remove-drm_gem_object_handle_unreference.patch
-patches.baytrail/0978-drm-gem-move-drm_gem_object_handle_unreference_unloc.patch
-patches.baytrail/0979-drm-gem-remove-bogus-NULL-check-from-drm_gem_object_.patch
-patches.baytrail/0980-drm-gem-WARN-about-unbalanced-handle-refcounts.patch
-patches.baytrail/0981-drm-gem-fix-up-flink-name-create-race.patch
-patches.baytrail/0982-drm-prime-fix-error-path-in-drm_gem_prime_fd_to_hand.patch
-patches.baytrail/0983-drm-gem-make-drm_gem_object_handle_unreference_unloc.patch
-patches.baytrail/0984-drm-fix-locking-in-gem-debugfs-procfs-file.patch
-patches.baytrail/0985-drm-gem-switch-dev-object_name_lock-to-a-mutex.patch
-patches.baytrail/0986-drm-prime-fix-to-put-an-exported-dma_buf-for-adding-.patch
-patches.baytrail/0987-drm-prime-add-return-check-for-dma_buf_fd.patch
-patches.baytrail/0988-drm-prime-use-proper-pointer-in-drm_gem_prime_handle.patch
-patches.baytrail/0989-drm-gem-completely-close-gem_open-vs.-gem_close-race.patch
-patches.baytrail/0990-drm-prime-proper-locking-refcounting-for-obj-dma_buf.patch
-patches.baytrail/0991-drm-cirrus-remove-unused-driver_private-access.patch
-patches.baytrail/0992-drm-edid-add-drm_edid_duplicate.patch
-patches.baytrail/0993-drm-i915-dp-use-drm_edid_duplicate.patch
-patches.baytrail/0994-drm-Make-vblank_disable_allowed-bool.patch
-patches.baytrail/0995-drm-Make-vblank_enabled-bool.patch
-patches.baytrail/0996-drm-Make-vblank_inmodeset-unsigned.patch
-patches.baytrail/0997-drm-Collect-per-crtc-vblank-stuff-to-a-struct.patch
-patches.baytrail/0998-drm-Make-irq_enabled-bool.patch
-patches.baytrail/0999-drm-add-drm_dev_alloc-helper.patch
-patches.baytrail/1000-drm-gma500-Add-IS_CDV-macro.patch
-patches.baytrail/1001-drm-Remove-pci_vendor-and-pci_device-from-struct-drm.patch
-patches.baytrail/1002-drm-fold-in-drm_sg_alloc-into-the-ioctl.patch
-patches.baytrail/1003-drm-hide-legacy-sg-cleanup-better-from-common-code.patch
-patches.baytrail/1004-drm-mark-dma-setup-teardown-as-legacy-systems.patch
-patches.baytrail/1005-drm-move-dev-data-clearing-from-drm_setup-to-lastclo.patch
-patches.baytrail/1006-drm-move-drm_lastclose-to-drm_fops.c.patch
-patches.baytrail/1007-drm-no-op-out-GET_STATS-ioctl.patch
-patches.baytrail/1008-drm-Kill-drm-perf-counter-leftovers.patch
-patches.baytrail/1009-drm-dp-add-helper-for-checking-DP_ENHANCED_FRAME_CAP.patch
-patches.baytrail/1010-drm-i915-dp-get-rid-of-intel_dp-link_configuration.patch
-patches.baytrail/1011-drm-i915-Call-io_schedule-whilst-whilsting-for-the-G.patch
-patches.baytrail/1012-drm-i915-Remove-yet-another-unused-define.patch
-patches.baytrail/1013-drm-i915-dp-use-sizeof-for-memset-instead-of-magic-v.patch
-patches.baytrail/1014-drm-i915-Make-vlv_find_best_dpll-ppm-calculation-saf.patch
-patches.baytrail/1015-drm-i915-Don-t-underflow-bestppm.patch
-patches.baytrail/1016-drm-i915-Rewrite-vlv_find_best_dpll.patch
-patches.baytrail/1017-drm-i915-De-magic-the-VLV-p2-divider-step-size.patch
-patches.baytrail/1018-drm-i915-Make-sure-we-respect-n.max-on-VLV.patch
-patches.baytrail/1019-drm-i915-Clarify-VLV-PLL-p1-limits.patch
-patches.baytrail/1020-drm-i915-Allow-p1-divider-2-on-VLV.patch
-patches.baytrail/1021-drm-i915-Respect-p2-divider-minimum-limit-on-VLV.patch
-patches.baytrail/1022-drm-i915-Remove-the-unused-p-and-m-limits-for-VLV.patch
-patches.baytrail/1023-drm-i915-Remove-unused-dot_limit-from-VLV-PLL-limits.patch
-patches.baytrail/1024-drm-i915-intel_limits_vlv_dac-and-intel_limits_vlv_h.patch
-patches.baytrail/1025-drm-i915-Don-t-lie-about-findind-suitable-PLL-settin.patch
-patches.baytrail/1026-drm-i915-Use-intel_PLL_is_valid-in-vlv_find_best_dpl.patch
-patches.baytrail/1027-drm-i915-Fix-VGA_DISP_DISABLE-check.patch
-patches.baytrail/1028-drm-i915-dp-promote-clock-recovery-failures-to-DRM_E.patch
-patches.baytrail/1029-drm-i915-Set-primary_disabled-in-intel_-enable-disab.patch
-patches.baytrail/1030-drm-i915-Allow-sprites-to-be-configured-on-a-disable.patch
-patches.baytrail/1031-drm-i915-Reduce-the-time-we-hold-struct-mutex-in-spr.patch
-patches.baytrail/1032-drm-i915-Kill-a-goto-from-sprite-disable-code.patch
-patches.baytrail/1033-drm-i915-Do-a-bit-of-cleanup-in-the-sprite-code.patch
-patches.baytrail/1034-drm-i915-Save-user-requested-plane-coordinates-only-.patch
-patches.baytrail/1035-drm-i915-Do-the-fbc-vs.-primary-plane-enable-disable.patch
-patches.baytrail/1036-drm-i915-Enable-disable-IPS-when-primary-is-enabled-.patch
-patches.baytrail/1037-drm-i915-Rename-intel_flush_display_plane-to-intel_f.patch
-patches.baytrail/1038-drm-i915-Rename-intel_-enable-disable-_plane-to-inte.patch
-patches.baytrail/1039-drm-i915-WARN-if-primary-plane-state-doesn-t-match-e.patch
-patches.baytrail/1040-drm-i915-Flush-primary-plane-changes-in-sprite-code.patch
-patches.baytrail/1041-drm-i915-Use-the-real-cpu-max-frequency-for-ring-sca.patch
-patches.baytrail/1042-drm-i915-Undo-the-PIPEA-quirk-for-i845.patch
-patches.baytrail/1043-drm-i915-check-that-the-i965g-gm-4G-limit-is-really-.patch
-patches.baytrail/1044-drm-i915-rip-out-gen2-reset-code.patch
-patches.baytrail/1045-drm-i915-Prevent-using-uninitialized-MMIO-funcs.patch
-patches.baytrail/1046-drm-i915-Move-edram-detection-early_sanitize.patch
-patches.baytrail/1047-drm-i915-Create-MMIO-virtual-functions.patch
-patches.baytrail/1048-drm-i915-Extract-common-MMIO-lines.patch
-patches.baytrail/1049-drm-i915-Create-GEN-specific-read-MMIO.patch
-patches.baytrail/1050-drm-i915-Create-GEN-specific-write-MMIO.patch
-patches.baytrail/1051-drm-i915-Remove-gen-specific-checks-in-MMIO.patch
-patches.baytrail/1052-drm-i915-Keep-intel_drv.h-tidy.patch
-patches.baytrail/1053-drm-i915-wait-for-IPS_ENABLE-when-enabling-IPS.patch
-patches.baytrail/1054-drm-i915-Do-PCH-and-uncore-init-earlier.patch
-patches.baytrail/1055-drm-i915-dp-update-training-set-in-a-burst-write-wit.patch
-patches.baytrail/1056-drm-i915-don-t-leak-dp_connector-at-intel_ddi_init.patch
-patches.baytrail/1057-drm-i915-Populate-primary_disabled-in-intel_modeset_.patch
-patches.baytrail/1058-drm-i915-Rename-primary_disabled-to-primary_enabled.patch
-patches.baytrail/1059-drm-i915-Capture-the-initial-error-state-when-kickin.patch
-patches.baytrail/1060-drm-i915-Finish-enabling-rps-before-use-by-sysfs-or-.patch
-patches.baytrail/1061-drm-i915-Educate-users-in-dmesg-about-reporting-gpu-.patch
-patches.baytrail/1062-drm-i915-tell-the-user-KMS-is-required-for-gen6.patch
-patches.baytrail/1063-drm-i915-Avoid-tweaking-RPS-before-it-is-enabled.patch
-patches.baytrail/1064-drm-i915-increase-the-SWSCI-DSLP-default-timeout-to-.patch
-patches.baytrail/1065-drm-i915-Fix-pipe-off-timeout-handling-for-pre-gen4.patch
-patches.baytrail/1066-drm-i915-don-t-save-restore-CACHE_MODE_0-on-gen7.patch
-patches.baytrail/1067-drm-i915-vlv-add-doc-names-to-sideband-file.patch
-patches.baytrail/1068-drm-i915-Fix-VLV-frame-counter-registers.patch
-patches.baytrail/1069-drm-nouveau-always-select-ACPI_VIDEO-if-ACPI-is-enab.patch
-patches.baytrail/1070-drm-Add-separate-Kconfig-option-for-fbdev-helpers.patch
-patches.baytrail/1071-drm-i915-Kconfig-option-to-disable-the-legacy-fbdev-.patch
-patches.baytrail/1072-drm-i915-rename-intel_fb.c-to-intel_fbdev.c.patch
-patches.baytrail/1073-drm-i915-Fix-pre-CTG-vblank-counter.patch
-patches.baytrail/1074-drm-i915-Add-breadcrumbs-for-why-the-backlight-is-be.patch
-patches.baytrail/1075-drm-i915-Use-DIV_ROUND_CLOSEST-to-calculate-dot-vco.patch
-patches.baytrail/1076-drm-i915-Use-vlv_clock-in-vlv_crtc_clock_get.patch
-patches.baytrail/1077-drm-i915-Skip-register-reads-in-i915_get_crtc_scanou.patch
-patches.baytrail/1078-drm-i915-Fix-scanoutpos-calculations.patch
-patches.baytrail/1079-drm-i915-Improve-the-accuracy-of-get_scanout_pos-on-.patch
-patches.baytrail/1080-drm-i915-Fix-gen2-scanout-position-readout.patch
-patches.baytrail/1081-drm-i915-Don-t-pretend-that-gen2-has-a-hardware-fram.patch
-patches.baytrail/1082-drm-dp-constify-DP-DPCD-helpers.patch
-patches.baytrail/1083-drm-i915-dp-constify-link_status.patch
-patches.baytrail/1084-drm-i915-Add-intel_pipe_wm-and-prepare-for-watermark.patch
-patches.baytrail/1085-drm-i915-Don-t-re-compute-pipe-watermarks-except-for.patch
-patches.baytrail/1086-drm-i915-Move-LP1-watermark-merging-out-from-hsw_com.patch
-patches.baytrail/1087-drm-i915-Use-intel_pipe_wm-in-hsw_find_best_results.patch
-patches.baytrail/1088-drm-i915-Move-some-computations-out-from-hsw_compute.patch
-patches.baytrail/1089-drm-i915-Check-5-6-DDB-split-only-when-sprites-are-e.patch
-patches.baytrail/1090-drm-i915-Refactor-wm_lp-to-level-calculation.patch
-patches.baytrail/1091-drm-i915-Kill-fbc_wm_enabled-from-intel_wm_config.patch
-patches.baytrail/1092-drm-i915-Store-current-watermark-state-in-dev_priv-w.patch
-patches.baytrail/1093-drm-i915-Improve-watermark-dirtyness-checks.patch
-patches.baytrail/1094-drm-i915-Init-HSW-watermark-tracking-in-intel_modese.patch
-patches.baytrail/1095-drm-i915-Remove-a-somewhat-silly-debug-print-from-wa.patch
-patches.baytrail/1096-drm-i915-Adjust-watermark-register-masks.patch
-patches.baytrail/1097-drm-i915-Rename-ilk_wm_max-to-ilk_compute_wm_maximum.patch
-patches.baytrail/1098-drm-i915-Rename-ilk_check_wm-to-ilk_validate_wm_leve.patch
-patches.baytrail/1099-drm-i915-Check-5-6-DDB-split-only-when-sprites-are-e.patch
-patches.baytrail/1100-imx-drm-imx-tve-Let-device-core-handle-pinctrl.patch
-patches.baytrail/1101-i2c-stu300-device-tree-support.patch
-patches.baytrail/1102-i2c-stu300-do-not-request-a-specific-clock-name.patch
-patches.baytrail/1103-pinctrl-add-pin-list-based-GPIO-ranges.patch
-patches.baytrail/1104-pinctrl-add-Intel-BayTrail-GPIO-pinctrl-support.patch
-patches.baytrail/1105-spi-pxa2xx-fix-compile-warning-in-pxa2xx_spi_acpi_ge.patch
-patches.baytrail/1106-spi-pxa2xx-convert-to-dma_request_slave_channel_comp.patch
-patches.baytrail/1107-spi-pxa2xx-add-Intel-BayTrail-ACPI-ID.patch
-patches.baytrail/1108-ACPI-LPSS-add-support-for-Intel-BayTrail.patch
-patches.baytrail/1109-ACPI-LPSS-mask-the-UART-TX-completion-interrupt.patch
-patches.baytrail/1110-ACPI-LPSS-override-SDIO-private-register-space-size-.patch
-patches.baytrail/1111-ALSA-hda-add-PCI-IDs-for-Intel-BayTrail.patch
-patches.baytrail/1112-ASoC-fsl-add-imx-wm8962-machine-driver.patch
-patches.baytrail/1113-I2C-mv64xxx-use-return-value-from-mv64xxx_i2c_map_re.patch
-patches.baytrail/1114-I2C-mv64xxx-use-devm_ioremap_resource.patch
-patches.baytrail/1115-I2C-mv64xxx-use-devm_clk_get-to-avoid-missing-clk_pu.patch
-patches.baytrail/1116-I2C-mv64xxx-use-devm_kzalloc.patch
-patches.baytrail/1117-I2C-mv64xxx-fix-error-handling-for-request_irq.patch
-patches.baytrail/1118-I2C-mv64xxx-remove-I2C_M_NOSTART-code.patch
-patches.baytrail/1119-I2C-mv64xxx-move-mv64xxx_i2c_prepare_for_io.patch
-patches.baytrail/1120-I2C-mv64xxx-fix-race-between-FSM-interrupt-and-proce.patch
-patches.baytrail/1121-i2c-imx-Let-device-core-handle-pinctrl.patch
-patches.baytrail/1122-i2c-designware-prevent-signals-from-aborting-I2C-tra.patch
-patches.baytrail/1123-drivers-i2c-busses-don-t-check-resource-with-devm_io.patch
-patches.baytrail/1124-i2c-designware-fix-race-between-subsequent-xfers.patch
-patches.baytrail/1125-i2c-vt8500-Add-support-for-I2C-bus-on-Wondermedia-So.patch
-patches.baytrail/1126-i2c-mv64xxx-Add-macros-to-access-parts-of-registers.patch
-patches.baytrail/1127-i2c-mv64xxx-make-the-registers-offset-configurable.patch
-patches.baytrail/1128-i2c-mv64xxx-Add-Allwinner-sun4i-compatible.patch
-patches.baytrail/1129-i2c-mv64xxx-Fix-transfer-error-code.patch
-patches.baytrail/1130-i2c-imx-allow-autoloading-on-dt-ids.patch
-patches.baytrail/1131-i2c-mv64xxx-Set-bus-frequency-to-100kHz-if-clock-fre.patch
-patches.baytrail/1132-i2c-designware-make-SDA-hold-time-configurable.patch
-patches.baytrail/1133-i2c-designware-use-div_u64-to-fix-link.patch
-patches.baytrail/1134-of-remove-CONFIG_OF_DEVICE.patch
-patches.baytrail/1135-dw_dmac-remove-inline-marking-of-EXPORT_SYMBOL-funct.patch
-patches.baytrail/1136-dw_dmac-don-t-check-resource-with-devm_ioremap_resou.patch
-patches.baytrail/1137-dma-move-dw_dmac-driver-to-an-own-directory.patch
-patches.baytrail/1138-dma-dw-split-driver-to-library-part-and-platform-cod.patch
-patches.baytrail/1139-dma-dw-add-PCI-part-of-the-driver.patch
-patches.baytrail/1140-dmaengine-dw-select-DW_DMAC_BIG_ENDIAN_IO-automagica.patch
-patches.baytrail/1141-mmc-sdhci-add-ability-to-stay-runtime-resumed-if-the.patch
-patches.baytrail/1142-mmc-sdhci-acpi-support-runtime-PM-for-ACPI-HID-80860.patch
-patches.baytrail/1143-mmc-sdhci-pci-support-runtime-PM-for-BYT-SD-cards.patch
-patches.baytrail/1144-mmc-sdhci-acpi-fix-error-return-code-in-sdhci_acpi_a.patch
-patches.baytrail/1145-mmc-sdhci-pci-add-support-for-eMMC-hardware-reset-fo.patch
-patches.baytrail/1146-mmc-sdhci-acpi-add-support-for-eMMC-hardware-reset-f.patch
-patches.baytrail/1147-mmc-sdhci-pci-add-another-device-id.patch
-patches.baytrail/1148-tty-8250_dw-Add-support-for-OCTEON-UARTS.patch
-patches.baytrail/1149-i2c-mv64xxx-Document-the-newly-introduced-allwinner-.patch
-patches.baytrail/1150-spi-pxa2xx-enable-DMA-on-newer-Intel-LPSS-silicon.patch
-patches.baytrail/1151-Intel-xhci-refactor-EHCI-xHCI-port-switching.patch
-patches.baytrail/1152-serial-8250_dw-Report-CTS-asserted-for-auto-flow.patch
-patches.baytrail/1153-pinctrl-baytrail-fix-indentations.patch
-patches.baytrail/1154-pinctrl-baytrail-change-lvl-to-level.patch
-patches.baytrail/1155-pinctrl-baytrail-remove-redundant-ptr-variable.patch
-patches.baytrail/1156-pinctrl-baytrail-introduce-to_byt_gpio-macro.patch
-patches.baytrail/1157-pinctrl-baytrail-fix-to-avoid-sparse-warnings.patch
-patches.baytrail/1158-ASoC-fsl-imx-wm8962-Fix-error-path.patch
-patches.baytrail/1159-i2c-designware-Manually-set-RESTART-bit-between-mess.patch
-patches.baytrail/1160-i2c-designware-add-CONFIG_PM_SLEEP-to-suspend-resume.patch
-patches.baytrail/1161-i2c-stu300-add-CONFIG_PM_SLEEP-to-suspend-resume-fun.patch
-patches.baytrail/1162-i2c-imx-use-struct-representing-i2c-clk-div-val-pair.patch
-patches.baytrail/1163-i2c-imx-enable-clk-before-write-to-registers.patch
-patches.baytrail/1164-i2c-imx-don-t-change-platform-device-id_entry-direct.patch
-patches.baytrail/1165-i2c-imx-wrap-registers-read-write-to-inline-function.patch
-patches.baytrail/1166-i2c-imx-change-register-offset-representation.patch
-patches.baytrail/1167-i2c-imx-add-INT-flag-and-IEN-bit-operatation-codes.patch
-patches.baytrail/1168-i2c-imx-add-struct-to-hold-more-configurable-quirks.patch
-patches.baytrail/1169-i2c-imx-Add-Vybrid-VF610-I2C-controller-support.patch
-patches.baytrail/1170-i2c-use-dev_get_platdata.patch
-patches.baytrail/1171-i2c-mv64xxx-Add-I2C-Transaction-Generator-support.patch
-patches.baytrail/1172-i2c-mv64xxx-Fix-timing-issue-on-Armada-XP-errata-FE-.patch
-patches.baytrail/1173-i2c-move-OF-helpers-into-the-core.patch
-patches.baytrail/1174-i2c-move-ACPI-helpers-into-the-core.patch
-patches.baytrail/1175-i2c-designware-make-HCNT-LCNT-values-configurable.patch
-patches.baytrail/1176-i2c-designware-get-SDA-hold-time-HCNT-and-LCNT-confi.patch
-patches.baytrail/1177-dma-dw-append-MODULE_DEVICE_TABLE-for-ACPI-case.patch
-patches.baytrail/1178-dma-dw-improve-comparison-with-0.patch
-patches.baytrail/1179-dma-dw-allow-shared-interrupts.patch
-patches.baytrail/1180-dma-dw-return-DMA_SUCCESS-immediately-from-device_tx.patch
-patches.baytrail/1181-dma-dw-return-DMA_PAUSED-only-if-cookie-status-is-DM.patch
-patches.baytrail/1182-x86-intel-lpss-Add-pin-control-support-to-Intel-low-.patch
-patches.baytrail/1183-i2c-designware-10-bit-addressing-mode-enabling-if-I2.patch
-patches.baytrail/1184-i2c-i2c-imx-replace-platform_driver_probe-to-support.patch
-patches.baytrail/1185-serial-8250_dw-don-t-limit-DMA-support-to-ACPI.patch
-patches.baytrail/1186-serial-8250_dw-provide-a-filter-for-DMA-channel-dete.patch
-patches.baytrail/1187-serial-8250_dw-fix-broken-function-call.patch
-patches.baytrail/1188-ACPI-LPSS-fix-UART-Auto-Flow-Control.patch
-patches.baytrail/1189-ACPI-LPSS-add-ACPI-IDs-for-newer-Intel-PCHs.patch
-patches.baytrail/1190-spi-pxa2xx-Restore-private-register-bits.patch
-patches.baytrail/1191-ARM-EXYNOS-Select-PINCTRL_EXYNOS-for-exynos4-5-at-ch.patch
-patches.baytrail/1192-radeon-Switch-to-arch_phys_wc_add-and-add-a-missing-.patch
-patches.baytrail/1193-PENDING-mmc-sdhci-pci-Fix-BYT-sd-card-getting-stuck-.patch
-
-
-#############################################################################
-# GMA500 patches
-#
-patches.gma500/0001-drm-gma500-Add-generic-code-for-clock-calculation.patch
-patches.gma500/0002-drm-gma500-cdv-Make-use-of-the-generic-clock-code.patch
-patches.gma500/0003-drm-gma500-Make-use-of-gma_pipe_has_type.patch
-patches.gma500/0004-drm-gma500-psb-Make-use-of-generic-clock-code.patch
-patches.gma500/0005-drm-gma500-Remove-the-unused-psb_intel_display.h.patch
-patches.gma500/0006-drm-gma500-Add-generic-pipe-crtc-functions.patch
-patches.gma500/0007-drm-gma500-cdv-Use-identical-generic-crtc-funcs.patch
-patches.gma500/0008-drm-gma500-Make-all-chips-use-gma_wait_for_vblank.patch
-patches.gma500/0009-drm-gma500-psb-Use-identical-generic-crtc-funcs.patch
-patches.gma500/0010-drm-gma500-cdv-Convert-to-gma_pipe_set_base.patch
-patches.gma500/0012-drm-gma500-cdv-Convert-to-gma_crtc_dpms.patch
-patches.gma500/0013-drm-gma500-cdv-Convert-to-generic-gamma-funcs.patch
-patches.gma500/0014-drm-gma500-psb-Convert-to-gma_pipe_set_base.patch
-patches.gma500/0015-drm-gma500-Convert-to-generic-gamma-funcs.patch
-patches.gma500/0016-drm-gma500-psb-Convert-to-gma_crtc_dpms.patch
-patches.gma500/0017-drm-gma500-oak-Use-identical-generic-crtc-funcs.patch
-patches.gma500/0018-drm-gma500-mdfld-Use-identical-generic-crtc-funcs.patch
-patches.gma500/0019-drm-gma500-psb-Convert-to-generic-crtc-destroy.patch
-patches.gma500/0020-drm-gma500-Add-generic-cursor-functions.patch
-patches.gma500/0021-drm-gma500-cdv-Convert-to-generic-cursor-funcs.patch
-patches.gma500/0022-drm-gma500-psb-Convert-to-generic-cursor-funcs.patch
-patches.gma500/0023-drm-gma500-Add-generic-encoder-functions.patch
-patches.gma500/0024-drm-gma500-Convert-to-generic-encoder-funcs.patch
-patches.gma500/0025-drm-gma500-Add-generic-crtc-save-restore-funcs.patch
-patches.gma500/0026-drm-gma500-psb-Convert-to-generic-save-restore.patch
-patches.gma500/0027-drm-gma500-cdv-Convert-to-generic-save-restore.patch
-patches.gma500/0028-drm-gma500-Add-generic-set_config-function.patch
-patches.gma500/0029-drm-gma500-psb-Convert-to-generic-set_config.patch
-patches.gma500/0030-drm-gma500-cdv-Convert-to-generic-set_config.patch
-patches.gma500/0031-drm-gma500-Rename-psb_intel_crtc-to-gma_crtc.patch
-patches.gma500/0032-drm-gma500-Rename-psb_intel_connector-to-gma_connect.patch
-patches.gma500/0033-drm-gma500-Rename-psb_intel_encoder-to-gma_encoder.patch
-patches.gma500/0034-drm-gma500-Add-Minnowboard-to-the-IS_MRST-macro.patch
-patches.gma500/0035-drm-gma500-Add-chip-specific-sdvo-masks.patch
-patches.gma500/0036-drm-gma500-Add-support-for-aux-pci-vdc-device.patch
-patches.gma500/0037-drm-gma500-Add-aux-device-support-for-gmbus.patch
-patches.gma500/0038-drm-gma500-mrst-Add-SDVO-clock-calculation.patch
-patches.gma500/0039-drm-gma500-mrst-Add-aux-register-writes-when-program.patch
-patches.gma500/0040-drm-gma500-mrst-Properly-route-oaktrail-hdmi-hooks.patch
-patches.gma500/0041-drm-gma500-mrst-Add-aux-register-writes-to-SDVO.patch
-patches.gma500/0042-drm-gma500-mrst-Replace-WMs-and-chickenbits-with-val.patch
-patches.gma500/0043-drm-gma500-mrst-Setup-GMBUS-for-oaktrail-mrst.patch
-patches.gma500/0044-drm-gma500-mrst-Don-t-blindly-guess-a-mode-for-LVDS.patch
-patches.gma500/0045-drm-gma500-mrst-Add-SDVO-to-output-init.patch
-patches.gma500/0046-drm-gma500-cdv-Add-and-hook-up-chip-op-for-watermark.patch
-patches.gma500/0047-drm-gma500-cdv-Add-and-hook-up-chip-op-for-disabling.patch
-
-
-#############################################################################
-# Zynq SOC patches
-#
-patches.zynq/0001-ARM-zynq-Remove-init_irq-declaration-in-machine-desc.patch
-patches.zynq/0002-ARM-zynq-Not-to-rewrite-jump-code-when-starting-addr.patch
-patches.zynq/0003-arm-zynq-Remove-board-specific-compatibility-string.patch
-patches.zynq/0004-ARM-zynq-use-DT_MACHINE_START.patch
-patches.zynq/0005-arm-zynq-slcr-Remove-redundant-header-includes.patch
-patches.zynq/0006-arm-zynq-slcr-Clean-up-defines.patch
-patches.zynq/0007-arm-zynq-slcr-Use-read-modify-write-for-register-wri.patch
-patches.zynq/0008-arm-zynq-hotplug-Remove-unreachable-code.patch
-patches.zynq/0009-arm-zynq-Enable-arm_global_timer.patch
-patches.zynq/0010-ARM-zynq-Add-cpuidle-support.patch
-patches.zynq/0011-ARM-zynq-cpuidle-Remove-useless-compatibility-string.patch
-patches.zynq/0012-ARM-zynq-cpuidle-convert-to-platform-driver.patch
-patches.zynq/0013-tty-xuartps-Remove-suspend-resume-functions.patch
-patches.zynq/0014-arm-zynq-Migrate-platform-to-clock-controller.patch
-patches.zynq/0015-serial-use-platform_-get-set-_drvdata.patch
-patches.zynq/0016-tty-xuartps-Use-devm_clk_get.patch
-patches.zynq/0017-tty-xuartps-Use-devm_kzalloc.patch
-patches.zynq/0018-tty-xuartps-Implement-BREAK-detection-add-SYSRQ-supp.patch
-patches.zynq/0019-tty-xuartps-Add-polled-mode-support-for-xuartps.patch
-patches.zynq/0020-tty-xuartps-support-64-byte-FIFO-size.patch
-patches.zynq/0021-tty-xuartps-Force-enable-the-UART-in-xuartps_console.patch
-patches.zynq/0022-tty-xuartps-Updating-set_baud_rate.patch
-patches.zynq/0023-tty-xuartps-Dynamically-adjust-to-input-frequency-ch.patch
-patches.zynq/0024-tty-xuartps-Implement-suspend-resume-callbacks.patch
-patches.zynq/0025-tty-xuartps-Update-copyright-information.patch
-patches.zynq/0026-tty-xuartps-Fix-may-be-used-uninitialized-build-warn.patch
-patches.zynq/0027-tty-xuartps-Fix-build-error-due-to-missing-forward-d.patch
-patches.zynq/0028-tty-xuartps-Fix-build-error-when-COMMON_CLK-is-not-s.patch
-patches.zynq/0029-GPIO-xilinx-Simplify-driver-probe-function.patch
-patches.zynq/0030-GPIO-xilinx-Add-support-for-dual-channel.patch
-patches.zynq/0031-GPIO-xilinx-Use-__raw_readl-__raw_writel-IO-function.patch
-patches.zynq/0032-GPIO-xilinx-Use-BIT-macro.patch
-patches.zynq/0033-arm-dt-zynq-Use-status-property-for-UART-nodes.patch
-patches.zynq/0034-arm-zynq-dt-Set-correct-L2-ram-latencies.patch
-patches.zynq/0035-clk-zynq-Add-clock-controller-driver.patch
-patches.zynq/0036-clk-zynq-Remove-deprecated-clock-code.patch
-patches.zynq/0037-clk-zynq-clkc-Add-dedicated-spinlock-for-the-SWDT.patch
-patches.zynq/0038-clk-zynq-clkc-Add-CLK_SET_RATE_PARENT-flag-to-ethern.patch
-patches.zynq/0039-clk-add-CLK_SET_RATE_NO_REPARENT-flag.patch
-patches.zynq/0040-Merge-tag-clk-for-linus-3.12-of-git-git.linaro.org-p.patch
-patches.zynq/0041-clk-zynq-Fix-possible-memory-leak.patch
-patches.zynq/0042-clk-zynq-Factor-out-PLL-driver.patch
-patches.zynq/0043-clk-zynq-pll-Fix-documentation-for-PLL-register-func.patch
-patches.zynq/0044-clk-zynq-pll-Use-defines-for-fbdiv-min-max-values.patch
-patches.zynq/0045-spi-spi-xilinx-Add-run-run-time-endian-detection.patch
-patches.zynq/0046-spi-spi-xilinx-Remove-redundant-platform_set_drvdata.patch
-patches.zynq/0047-spi-spi-xilinx-cleanup-a-check-in-xilinx_spi_txrx_bu.patch
-patches.zynq/0048-spi-xilinx-Convert-to-devm_ioremap_resource.patch
-patches.zynq/0049-spi-xilinx-Remove-remains-of-of_platform-device-regi.patch
-patches.zynq/0050-spi-xilinx-Refer-to-platform-device-as-pdev-in-probe.patch
-patches.zynq/0051-spi-xilinx-Remove-CONFIG_OF-from-the-driver.patch
-patches.zynq/0052-spi-xilinx-Clean-ioremap-calling.patch
-patches.zynq/0053-spi-xilinx-Use-of_property_read_u32-for-reading-valu.patch
-patches.zynq/0054-spi-xilinx-Simplify-irq-allocation.patch
-patches.zynq/0055-spi-xilinx-signedness-issue-checking-platform_get_ir.patch
-patches.zynq/0056-spi-bitbang-Drop-empty-setup-functions.patch
-patches.zynq/0057-spi-use-dev_get_platdata.patch
-patches.zynq/0058-spi-bitbang-Let-spi_bitbang_start-take-a-reference-t.patch
-patches.zynq/0059-Input-xilinx_ps2-remove-redundant-platform_set_drvda.patch
-patches.zynq/0060-drivers-clean-up-prom.h-implicit-includes.patch
-patches.zynq/0061-of-irq-Use-irq_of_parse_and_map.patch
-patches.zynq/0062-char-xilinx_hwicap-Remove-casting-the-return-value-w.patch
-patches.zynq/0063-char-hwicap-Remove-unnecessary-dev_set_drvdata.patch
-patches.zynq/0064-char-xilinx_hwicap-Checkpatch.pl-cleanup.patch
-patches.zynq/0065-char-xilinx_hwicap-Fix-typo-in-comment-and-extend-it.patch
-patches.zynq/0066-watchdog-xilinx-Fix-driver-header.patch
-patches.zynq/0067-watchdog-xilinx-Setup-the-origin-compatible-string.patch
-patches.zynq/0068-watchdog-Get-rid-of-MODULE_ALIAS_MISCDEV-statements.patch
-patches.zynq/0069-DT-Add-documentation-for-gpio-xilinx.patch
-patches.zynq/0070-arm-dt-zynq-Add-support-for-the-zc706-platform.patch
-patches.zynq/0071-USB-host-use-platform_-get-set-_drvdata.patch
-patches.zynq/0072-USB-host-Use-usb_hcd_platform_shutdown-wherever-poss.patch
-patches.zynq/0073-clocksource-cadence_ttc-Remove-unused-header.patch
-patches.zynq/0074-net-ethernet-use-platform_-get-set-_drvdata.patch
-patches.zynq/0075-drivers-net-Convert-dma_alloc_coherent-.__GFP_ZERO-t.patch
-patches.zynq/0076-net-emaclite-Report-failures-in-mdio-setup.patch
-patches.zynq/0077-net-emaclite-Support-multiple-phys-connected-to-one-.patch
-patches.zynq/0078-net-emaclite-Let-s-make-xemaclite_adjust_link-static.patch
-patches.zynq/0079-net-emaclite-Do-not-use-microblaze-and-ppc-IO-functi.patch
-patches.zynq/0080-net-emaclite-Update-driver-header.patch
-patches.zynq/0081-net-emaclite-Fix-typo-in-error-message.patch
-patches.zynq/0082-net-emaclite-Use-platform-resource-table.patch
-patches.zynq/0083-net-emaclite-Convert-to-use-devm_ioremap_resource.patch
-patches.zynq/0084-net-xilinx_emaclite-use-platform_-get-set-_drvdata.patch
-patches.zynq/0085-net-xilinx_emaclite-remove-unnecessary-dev_set_drvda.patch
-patches.zynq/0086-net-emaclite-Not-necessary-to-call-devm_iounmap.patch
-patches.zynq/0087-net-emaclite-Code-cleanup.patch
-patches.zynq/0088-net-drivers-net-Miscellaneous-conversions-to-ETH_ALE.patch
-patches.zynq/0089-net-xilinx-fix-memleak.patch
-patches.zynq/0090-net-emaclite-Enable-emaclite-for-Xilinx-Arm-Zynq-pla.patch
-patches.zynq/0091-microblaze-clean-up-prom.h-implicit-includes.patch
-patches.zynq/0092-video-xilinxfb-Fix-OF-probing-on-little-endian-syste.patch
-patches.zynq/0093-video-xilinxfb-Do-not-name-out_be32-in-function-name.patch
-patches.zynq/0094-video-xilinxfb-Rename-PLB_ACCESS_FLAG-to-BUS_ACCESS_.patch
-patches.zynq/0095-video-xilinxfb-Use-drvdata-regs_phys-instead-of-phys.patch
-patches.zynq/0096-video-xilinxfb-Group-bus-initialization.patch
-patches.zynq/0097-video-xilinxfb-Add-support-for-little-endian-accesse.patch
-patches.zynq/0098-video-xilinxfb-Fix-compilation-warning.patch
-patches.zynq/0099-video-xilinxfb-replace-devm_request_and_ioremap-by-d.patch
-patches.zynq/0100-video-xilinxfb-Remove-redundant-dev_set_drvdata.patch
-patches.zynq/0101-video-xilinxfb-Use-standard-variable-name-convention.patch
-patches.zynq/0102-video-xilinxfb-Use-devm_kzalloc-instead-of-kzalloc.patch
-patches.zynq/0103-video-xilinxfb-Simplify-error-path.patch
-patches.zynq/0104-video-xilinxfb-Fix-for-Use-standard-variable-name-co.patch
-#patches.zynq/0105-i2c-use-dev_get_platdata.patch
-#patches.zynq/0106-i2c-move-OF-helpers-into-the-core.patch
-patches.zynq/0107-i2c-xiic-Remove-casting-the-return-value-which-is-a-.patch
-patches.zynq/0108-i2c-Include-linux-of.h-header.patch
-patches.zynq/0001-i2c-xilinx-merge-i2c-driver-from-Xilinx-repository-i.patch
-patches.zynq/0003-mmc-arasan-add-a-driver-for-Arasan-s-SDHCI-controlle.patch
-patches.zynq/0004-net-ethernet-xilinx-Merge-driver-from-Xilinx-reposit.patch
-patches.zynq/0005-gpio-xilinx-merge-Xilinx-gpio-support-into-LTSI-3.10.patch
-patches.zynq/0006-spi-xilinx-merge-qspi-support-from-xilinx-repository.patch
-patches.zynq/0007-mtd-xilinx-merge-nand-flash-support-from-xilinx-repo.patch
-patches.zynq/0008-watchdog-xilinx-merge-support-for-xilinx-watchdog.patch
-patches.zynq/0009-usb-zynq-merge-usb-support-for-xilinx-zynq-soc.patch
-patches.zynq/0010-memory-zynq-merge-driver-for-Zynq-SMC.patch
-patches.zynq/0011-arm-dts-zynq-Merge-zynq-zc702.dts-with-Xilinx-reposi.patch
-patches.zynq/0012-defconfig-zynq-merge-xilinx-zynq-defconfig-from-xili.patch
-patches.zynq/of-remove-ifdef-from-linux-of_platform.h.patch
-patches.zynq/i2c-si570-merge-support-for-si570-clock-generator.patch
-patches.zynq/xilinx-arm-bsp-prevent-dma-into-lower-memory.patch
-patches.zynq/xilinx-arm-arasan-put-arasan-as-default-driver-for-zynq-in-dt.patch
-
-
-#############################################################################
-# MinnowBoard patches
-#
-patches.minnowboard/pch_uart-use-dmi-interface-for-board-detection.patch
-patches.minnowboard/serial-pch_uart-remove-__initdata-annotation-from-dmi_table.patch
-patches.minnowboard/serial-pch_uart-fix-signed-ness-and-casting-of-uartclk-related-fields.patch
-patches.minnowboard/serial-pch_uart-fix-compilation-warning.patch
-patches.minnowboard/pch_gbe-convert-pr_-to-netdev_.patch
-patches.minnowboard/pch_gbe-use-managed-functions-pcim_-and-devm_.patch
-patches.minnowboard/pch_gbe-use-pch_gbe_phy_regs_len-instead-of-32.patch
-patches.minnowboard/pci-add-circuitco-vendor-id-and-subsystem-id.patch
-patches.minnowboard/pch_gbe-add-minnowboard-support.patch
-patches.minnowboard/0001-gpio-sch-Add-sch_gpio_resume_set_enable.patch
-patches.minnowboard/0002-minnowboard-Add-base-platform-driver-for-the-MinnowB.patch
-patches.minnowboard/0003-minnowboard-gpio-Export-MinnowBoard-expansion-GPIO.patch
-patches.minnowboard/0004-minnowboard-keys-Bind-MinnowBoard-buttons-to-arrow-k.patch
-
-
-#############################################################################
 # fixes that go after all of the above
 #
-patches.fixes/0001-drm-remove-FASYNC-support.patch
-patches.fixes/0002-drm-Pass-page-flip-ioctl-flags-to-driver.patch
-patches.fixes/0003-drm-gem-create-drm_gem_dumb_destroy.patch
-patches.fixes/0004-drm-cma-add-low-level-hook-functions-to-use-prime-he.patch
-patches.fixes/0005-drm-cma-remove-GEM-CMA-specific-dma_buf-functionalit.patch
-patches.fixes/0006-drm-add-mmap-function-to-prime-helpers.patch
-patches.fixes/0007-drm-rcar-du-Use-the-GEM-PRIME-helpers.patch
-patches.fixes/0008-fb-make-fp_get_options-name-argument-const.patch
-patches.fixes/0009-ARM-shmobile-r7s72100-Genmai-DT-reference-DTS-bits.patch
-patches.fixes/0010-i2c-mv64xxx-Do-not-use-writel_relaxed.patch